diff --git a/.gitignore b/.gitignore
index 59e571c..1cd4dec 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,3 +1,10 @@
-#Ignore modules added by the repo script
-Device
-#Ignore IDE generated files
\ No newline at end of file
+*.breadcrumb
+*.junit
+**/__pycache__
+Local_Release/
+CMSIS/Documentation/
+CMSIS/RTOS2/RTX/Library/ARM/MDK/RTX_CM.uvguix.*
+CMSIS/CoreValidation/Tests/build
+CMSIS/CoreValidation/Tests/bootloader/build
+*.uvguix.*
+*.uvmpw.uvgui.*
diff --git a/ARM.CMSIS.pdsc b/ARM.CMSIS.pdsc
index 0684a32..90f5845 100644
--- a/ARM.CMSIS.pdsc
+++ b/ARM.CMSIS.pdsc
@@ -8,6 +8,70 @@
   <url>http://www.keil.com/pack/</url>
 
   <releases>
+    <release version="5.6.0" date="2019-07-10">
+      CMSIS-Core(M): 5.3.0 (see revision history for details)
+       - Added provisions for compiler-independent C startup code.
+      CMSIS-Core(A): 1.1.4 (see revision history for details)
+       - Fixed __FPU_Enable.
+      CMSIS-DSP: 1.7.0 (see revision history for details)
+        - New Neon versions of f32 functions
+        - Python wrapper
+        - Preliminary cmake build
+        - Compilation flags for FFTs
+        - Changes to arm_math.h
+      CMSIS-NN: 1.2.0 (see revision history for details)
+        - New function for depthwise convolution with asymmetric quantization.
+        - New support functions for requantization.
+      CMSIS-RTOS:
+        - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
+      CMSIS-RTOS2:
+        - RTX 5.5.1 (see revision history for details)
+      CMSIS-Driver: 2.7.1
+        - WiFi Interface API 1.0.0
+      Devices:
+       - Generalized C startup code for all Cortex-M familiy devices.
+       - Updated Cortex-A default memory regions and MMU configurations
+       - Moved Cortex-A memory and system config files to avoid include path issues
+    </release>
+    <release version="5.5.1" date="2019-03-20">
+      The following folders are deprecated
+        - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
+
+      CMSIS-Core(M): 5.2.1 (see revision history for details)
+        - Fixed compilation issue in cmsis_armclang_ltm.h
+    </release>
+    <release version="5.5.0" date="2019-03-18">
+      The following folders have been removed:
+        - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
+        - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
+      The following folders are deprecated
+        - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
+
+      CMSIS-Core(M): 5.2.0 (see revision history for details)
+        - Reworked Stack/Heap configuration for ARM startup files.
+        - Added Cortex-M35P device support.
+        - Added generic Armv8.1-M Mainline device support.
+      CMSIS-Core(A): 1.1.3 (see revision history for details)
+      CMSIS-DSP: 1.6.0 (see revision history for details)
+        - reworked DSP library source files
+        - reworked DSP library documentation
+        - Changed DSP folder structure
+        - moved DSP libraries to folder ./DSP/Lib
+        - ARM DSP Libraries are built with ARMCLANG
+        - Added DSP Libraries Source variant
+      CMSIS-RTOS2:
+        - RTX 5.5.0 (see revision history for details)
+      CMSIS-Driver: 2.7.0
+        - Added WiFi Interface API 1.0.0-beta
+        - Added components for project specific driver implementations
+      CMSIS-Pack: 1.6.0 (see revision history for details)
+      Devices:
+        - Added Cortex-M35P and ARMv81MML device templates.
+        - Fixed C-Startup Code for GCC (aligned with other compilers)
+      Utilities:
+        - SVDConv 3.3.25
+        - PackChk 1.3.82
+    </release>
     <release version="5.4.0" date="2018-08-01">
       Aligned pack structure with repository.
       The following folders are deprecated:
@@ -183,7 +247,7 @@
       - added Taxonomy for Graphics
       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
     </release>
-    <release version="4.0.0">
+    <!-- release version="4.0.0">
       - CMSIS-Driver   2.00  Preliminary (incompatible update)
       - CMSIS-Pack     1.1   Preliminary
       - CMSIS-DSP      1.4.2 (see revision history for details)
@@ -191,25 +255,25 @@
       - CMSIS-RTOS RTX 4.74  (see revision history for details)
       - CMSIS-RTOS API 1.02  (unchanged)
       - CMSIS-SVD      1.10  (unchanged)
-    </release>
-    <release version="3.20.4">
+    </release -->
+    <release version="3.20.4" date="2014-02-20">
       - CMSIS-RTOS 4.74 (see revision history for details)
       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
     </release>
-    <release version="3.20.3">
+    <!-- release version="3.20.3">
       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
       - CMSIS-RTOS 4.73 (see revision history for details)
-    </release>
-    <release version="3.20.2">
+    </release -->
+    <!-- release version="3.20.2">
       - CMSIS-Pack documentation has been added
       - CMSIS-Drivers header and documentation have been added to PACK
       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
-    </release>
-    <release version="3.20.1">
+    </release -->
+    <!-- release version="3.20.1">
       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
-    </release>
-    <release version="3.20.0">
+    </release -->
+    <!-- release version="3.20.0">
       The software portions that are deployed in the application program are now under a BSD license which allows usage
       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
       The individual components have been update as listed below:
@@ -217,20 +281,28 @@
       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
       - CMSIS-SVD is unchanged.
-    </release>
+    </release -->
   </releases>
 
   <taxonomy>
+    <description Cclass="Audio">Software components for audio processing</description>
     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
+    <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
+    <description Cclass="Compiler">Compiler Software Extensions</description>
     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
-    <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
+    <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
+    <description Cclass="Data Exchange">Data exchange or data formatter</description>
+    <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
     <description Cclass="File System">File Drive Support and File System</description>
+    <description Cclass="IoT Client">IoT cloud client connector</description>
+    <description Cclass="IoT Utility">IoT specific software utility</description>
     <description Cclass="Graphics">Graphical User Interface</description>
     <description Cclass="Network">Network Stack using Internet Protocols</description>
-    <description Cclass="USB">Universal Serial Bus Stack</description>
-    <description Cclass="Compiler">Compiler Software Extensions</description>
     <description Cclass="RTOS">Real-time Operating System</description>
+    <description Cclass="Security">Encryption for secure communication or storage</description>
+    <description Cclass="USB">Universal Serial Bus Stack</description>
+    <description Cclass="Utility">Generic software utility components</description>
   </taxonomy>
 
   <devices>
@@ -455,6 +527,54 @@
       </device>
     </family>
 
+    <!-- ******************************  Cortex-M35P  ****************************** -->
+    <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
+      <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
+      <description>
+The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
+class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
+      </description>
+
+      <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
+      <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
+      <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
+      <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
+      <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
+      <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
+
+      <device Dname="ARMCM35P">
+        <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
+        <description>
+          no DSP Instructions, no Floating Point Unit, no TrustZone
+        </description>
+        <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
+      </device>
+
+      <device Dname="ARMCM35P_TZ">
+        <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
+        <description>
+          no DSP Instructions, no Floating Point Unit, TrustZone
+        </description>
+        <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
+      </device>
+
+      <device Dname="ARMCM35P_DSP_FP">
+        <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
+        <description>
+          DSP Instructions, Single Precision Floating Point Unit, no TrustZone
+        </description>
+        <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
+      </device>
+
+      <device Dname="ARMCM35P_DSP_FP_TZ">
+        <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
+        <description>
+          DSP Instructions, Single Precision Floating Point Unit, TrustZone
+        </description>
+        <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
+      </device>
+    </family>
+
     <!-- ******************************  ARMSC000  ****************************** -->
     <family Dfamily="ARM SC000" Dvendor="ARM:82">
       <description>
@@ -575,6 +695,29 @@
         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
       </device>
     </family>
+    
+    <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
+    <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
+      <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
+      <description>
+Armv8.1-M Mainline based device with TrustZone and MVE 
+      </description>
+      <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
+      <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
+      <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
+      <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
+      <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
+      <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
+
+   
+      <device Dname="ARMv81MML_DSP_DP_MVE_FP">
+        <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
+        <description>
+          Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
+        </description>
+        <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
+      </device>   
+    </family>
 
     <!-- ******************************  Cortex-A5  ****************************** -->
     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
@@ -585,11 +728,13 @@
 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
       </description>
 
-      <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
-      <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
+      <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
+      <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
+      <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
+      <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 
       <device Dname="ARMCA5">
-        <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
+        <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
       </device>
     </family>
@@ -603,11 +748,13 @@
 an optional integrated GIC, and an optional L2 cache controller.
       </description>
 
-      <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
-      <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
+      <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
+      <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
+      <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
+      <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 
       <device Dname="ARMCA7">
-        <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
+        <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
       </device>
     </family>
@@ -621,11 +768,13 @@
 and 8-bit Java bytecodes in Jazelle state.
       </description>
 
-      <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
-      <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
+      <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
+      <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
+      <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
+      <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 
       <device Dname="ARMCA9">
-        <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
+        <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
       </device>
     </family>
@@ -753,6 +902,13 @@
         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
       </files>
     </api>
+    <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.0.0" exclusive="0">
+      <description>WiFi driver</description>
+      <files>
+        <file category="doc"  name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
+        <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
+      </files>
+    </api>
   </apis>
 
   <!-- conditions are dependency rules that can apply to a component or an individual file -->
@@ -803,8 +959,10 @@
       <description>Armv8-M architecture based device</description>
       <accept Dcore="ARMV8MBL"/>
       <accept Dcore="ARMV8MML"/>
+      <accept Dcore="ARMV81MML"/>
       <accept Dcore="Cortex-M23"/>
       <accept Dcore="Cortex-M33"/>
+      <accept Dcore="Cortex-M35P"/>
     </condition>
     <condition id="ARMv8-M TZ Device">
       <description>Armv8-M architecture based device with TrustZone</description>
@@ -884,6 +1042,14 @@
       <description>Cortex-M33 processor based device using Floating Point Unit</description>
       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
     </condition>
+    <condition id="CM35P">
+      <description>Cortex-M35P processor based device</description>
+      <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
+    </condition>
+    <condition id="CM35P_FP">
+      <description>Cortex-M35P processor based device using Floating Point Unit</description>
+      <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
+    </condition>
     <condition id="ARMv8MBL">
       <description>Armv8-M Baseline processor based device</description>
       <require Dcore="ARMV8MBL"/>
@@ -915,6 +1081,23 @@
       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
     </condition>
 
+    <condition id="CM35P_NODSP_NOFPU">
+      <description>CM35P, no DSP, no FPU</description>
+      <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
+    </condition>
+    <condition id="CM35P_DSP_NOFPU">
+      <description>CM35P, DSP, no FPU</description>
+      <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
+    </condition>
+    <condition id="CM35P_NODSP_SP">
+      <description>CM35P, no DSP, SP FPU</description>
+      <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
+    </condition>
+    <condition id="CM35P_DSP_SP">
+      <description>CM35P, DSP, SP FPU</description>
+      <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
+    </condition>
+
     <condition id="ARMv8MML_NODSP_NOFPU">
       <description>Armv8-M Mainline, no DSP, no FPU</description>
       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
@@ -1109,11 +1292,6 @@
       <require condition="CM23_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
-    <condition id="CM23_BE_ARMCC">
-      <description>Cortex-M23 processor based device in big endian mode for the Arm Compiler</description>
-      <require condition="CM23_ARMCC"/>
-      <require Dendian="Big-endian"/>
-    </condition>
 
     <condition id="CM33_ARMCC">
       <description>Cortex-M33 processor based device for the Arm Compiler</description>
@@ -1125,11 +1303,6 @@
       <require condition="CM33_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
-    <condition id="CM33_BE_ARMCC">
-      <description>Cortex-M33 processor based device in big endian mode for the Arm Compiler</description>
-      <require condition="CM33_ARMCC"/>
-      <require Dendian="Big-endian"/>
-    </condition>
 
     <condition id="CM33_FP_ARMCC">
       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
@@ -1141,11 +1314,6 @@
       <require condition="CM33_FP_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
-    <condition id="CM33_FP_BE_ARMCC">
-      <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
-      <require condition="CM33_FP_ARMCC"/>
-      <require Dendian="Big-endian"/>
-    </condition>
 
     <condition id="CM33_NODSP_NOFPU_ARMCC">
       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
@@ -1188,6 +1356,69 @@
       <require Dendian="Little-endian"/>
     </condition>
 
+    <condition id="CM35P_ARMCC">
+      <description>Cortex-M35P processor based device for the Arm Compiler</description>
+      <require condition="CM35P"/>
+      <require Tcompiler="ARMCC"/>
+    </condition>
+    <condition id="CM35P_LE_ARMCC">
+      <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
+      <require condition="CM35P_ARMCC"/>
+      <require Dendian="Little-endian"/>
+    </condition>
+
+    <condition id="CM35P_FP_ARMCC">
+      <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
+      <require condition="CM35P_FP"/>
+      <require Tcompiler="ARMCC"/>
+    </condition>
+    <condition id="CM35P_FP_LE_ARMCC">
+      <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
+      <require condition="CM35P_FP_ARMCC"/>
+      <require Dendian="Little-endian"/>
+    </condition>
+
+    <condition id="CM35P_NODSP_NOFPU_ARMCC">
+      <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
+      <require condition="CM35P_NODSP_NOFPU"/>
+      <require Tcompiler="ARMCC"/>
+    </condition>
+    <condition id="CM35P_DSP_NOFPU_ARMCC">
+      <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
+      <require condition="CM35P_DSP_NOFPU"/>
+      <require Tcompiler="ARMCC"/>
+    </condition>
+    <condition id="CM35P_NODSP_SP_ARMCC">
+      <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
+      <require condition="CM35P_NODSP_SP"/>
+      <require Tcompiler="ARMCC"/>
+    </condition>
+    <condition id="CM35P_DSP_SP_ARMCC">
+      <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
+      <require condition="CM35P_DSP_SP"/>
+      <require Tcompiler="ARMCC"/>
+    </condition>
+    <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
+      <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
+      <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
+      <require Dendian="Little-endian"/>
+    </condition>
+    <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
+      <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
+      <require condition="CM35P_DSP_NOFPU_ARMCC"/>
+      <require Dendian="Little-endian"/>
+    </condition>
+    <condition id="CM35P_NODSP_SP_LE_ARMCC">
+      <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
+      <require condition="CM35P_NODSP_SP_ARMCC"/>
+      <require Dendian="Little-endian"/>
+    </condition>
+    <condition id="CM35P_DSP_SP_LE_ARMCC">
+      <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
+      <require condition="CM35P_DSP_SP_ARMCC"/>
+      <require Dendian="Little-endian"/>
+    </condition>
+
     <condition id="ARMv8MBL_ARMCC">
       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
       <require condition="ARMv8MBL"/>
@@ -1198,11 +1429,6 @@
       <require condition="ARMv8MBL_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
-    <condition id="ARMv8MBL_BE_ARMCC">
-      <description>Armv8-M Baseline processor based device in big endian mode for the Arm Compiler</description>
-      <require condition="ARMv8MBL_ARMCC"/>
-      <require Dendian="Big-endian"/>
-    </condition>
 
     <condition id="ARMv8MML_ARMCC">
       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
@@ -1214,11 +1440,6 @@
       <require condition="ARMv8MML_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
-    <condition id="ARMv8MML_BE_ARMCC">
-      <description>Armv8-M Mainline processor based device in big endian mode for the Arm Compiler</description>
-      <require condition="ARMv8MML_ARMCC"/>
-      <require Dendian="Big-endian"/>
-    </condition>
 
     <condition id="ARMv8MML_FP_ARMCC">
       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
@@ -1230,11 +1451,6 @@
       <require condition="ARMv8MML_FP_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
-    <condition id="ARMv8MML_FP_BE_ARMCC">
-      <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
-      <require condition="ARMv8MML_FP_ARMCC"/>
-      <require Dendian="Big-endian"/>
-    </condition>
 
     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
@@ -1276,7 +1492,7 @@
       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
       <require Dendian="Little-endian"/>
     </condition>
-
+    
     <!-- GCC compiler -->
     <condition id="CA_GCC">
       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
@@ -1406,11 +1622,6 @@
       <require condition="CM7_SP_GCC"/>
       <require Dendian="Little-endian"/>
     </condition>
-    <condition id="CM7_SP_BE_GCC">
-      <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
-      <require condition="CM7_SP_GCC"/>
-      <require Dendian="Big-endian"/>
-    </condition>
 
     <condition id="CM7_DP_GCC">
       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
@@ -1422,11 +1633,6 @@
       <require condition="CM7_DP_GCC"/>
       <require Dendian="Little-endian"/>
     </condition>
-    <condition id="CM7_DP_BE_GCC">
-      <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
-      <require condition="CM7_DP_GCC"/>
-      <require Dendian="Big-endian"/>
-    </condition>
 
     <condition id="CM23_GCC">
       <description>Cortex-M23 processor based device for the GCC Compiler</description>
@@ -1438,11 +1644,6 @@
       <require condition="CM23_GCC"/>
       <require Dendian="Little-endian"/>
     </condition>
-    <condition id="CM23_BE_GCC">
-      <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
-      <require condition="CM23_GCC"/>
-      <require Dendian="Big-endian"/>
-    </condition>
 
     <condition id="CM33_GCC">
       <description>Cortex-M33 processor based device for the GCC Compiler</description>
@@ -1454,11 +1655,6 @@
       <require condition="CM33_GCC"/>
       <require Dendian="Little-endian"/>
     </condition>
-    <condition id="CM33_BE_GCC">
-      <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
-      <require condition="CM33_GCC"/>
-      <require Dendian="Big-endian"/>
-    </condition>
 
     <condition id="CM33_FP_GCC">
       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
@@ -1470,11 +1666,6 @@
       <require condition="CM33_FP_GCC"/>
       <require Dendian="Little-endian"/>
     </condition>
-    <condition id="CM33_FP_BE_GCC">
-      <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
-      <require condition="CM33_FP_GCC"/>
-      <require Dendian="Big-endian"/>
-    </condition>
 
     <condition id="CM33_NODSP_NOFPU_GCC">
       <description>CM33, no DSP, no FPU, GCC Compiler</description>
@@ -1517,6 +1708,69 @@
       <require Dendian="Little-endian"/>
     </condition>
 
+    <condition id="CM35P_GCC">
+      <description>Cortex-M35P processor based device for the GCC Compiler</description>
+      <require condition="CM35P"/>
+      <require Tcompiler="GCC"/>
+    </condition>
+    <condition id="CM35P_LE_GCC">
+      <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
+      <require condition="CM35P_GCC"/>
+      <require Dendian="Little-endian"/>
+    </condition>
+
+    <condition id="CM35P_FP_GCC">
+      <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
+      <require condition="CM35P_FP"/>
+      <require Tcompiler="GCC"/>
+    </condition>
+    <condition id="CM35P_FP_LE_GCC">
+      <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
+      <require condition="CM35P_FP_GCC"/>
+      <require Dendian="Little-endian"/>
+    </condition>
+
+    <condition id="CM35P_NODSP_NOFPU_GCC">
+      <description>CM35P, no DSP, no FPU, GCC Compiler</description>
+      <require condition="CM35P_NODSP_NOFPU"/>
+      <require Tcompiler="GCC"/>
+    </condition>
+    <condition id="CM35P_DSP_NOFPU_GCC">
+      <description>CM35P, DSP, no FPU, GCC Compiler</description>
+      <require condition="CM35P_DSP_NOFPU"/>
+      <require Tcompiler="GCC"/>
+    </condition>
+    <condition id="CM35P_NODSP_SP_GCC">
+      <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
+      <require condition="CM35P_NODSP_SP"/>
+      <require Tcompiler="GCC"/>
+    </condition>
+    <condition id="CM35P_DSP_SP_GCC">
+      <description>CM35P, DSP, SP FPU, GCC Compiler</description>
+      <require condition="CM35P_DSP_SP"/>
+      <require Tcompiler="GCC"/>
+    </condition>
+    <condition id="CM35P_NODSP_NOFPU_LE_GCC">
+      <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
+      <require condition="CM35P_NODSP_NOFPU_GCC"/>
+      <require Dendian="Little-endian"/>
+    </condition>
+    <condition id="CM35P_DSP_NOFPU_LE_GCC">
+      <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
+      <require condition="CM35P_DSP_NOFPU_GCC"/>
+      <require Dendian="Little-endian"/>
+    </condition>
+    <condition id="CM35P_NODSP_SP_LE_GCC">
+      <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
+      <require condition="CM35P_NODSP_SP_GCC"/>
+      <require Dendian="Little-endian"/>
+    </condition>
+    <condition id="CM35P_DSP_SP_LE_GCC">
+      <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
+      <require condition="CM35P_DSP_SP_GCC"/>
+      <require Dendian="Little-endian"/>
+    </condition>
+
     <condition id="ARMv8MBL_GCC">
       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
       <require condition="ARMv8MBL"/>
@@ -1527,11 +1781,6 @@
       <require condition="ARMv8MBL_GCC"/>
       <require Dendian="Little-endian"/>
     </condition>
-    <condition id="ARMv8MBL_BE_GCC">
-      <description>Armv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
-      <require condition="ARMv8MBL_GCC"/>
-      <require Dendian="Big-endian"/>
-    </condition>
 
     <condition id="ARMv8MML_GCC">
       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
@@ -1543,11 +1792,6 @@
       <require condition="ARMv8MML_GCC"/>
       <require Dendian="Little-endian"/>
     </condition>
-    <condition id="ARMv8MML_BE_GCC">
-      <description>Armv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
-      <require condition="ARMv8MML_GCC"/>
-      <require Dendian="Big-endian"/>
-    </condition>
 
     <condition id="ARMv8MML_FP_GCC">
       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
@@ -1559,11 +1803,6 @@
       <require condition="ARMv8MML_FP_GCC"/>
       <require Dendian="Little-endian"/>
     </condition>
-    <condition id="ARMv8MML_FP_BE_GCC">
-      <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
-      <require condition="ARMv8MML_FP_GCC"/>
-      <require Dendian="Big-endian"/>
-    </condition>
 
     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
@@ -1767,11 +2006,6 @@
       <require condition="CM23_IAR"/>
       <require Dendian="Little-endian"/>
     </condition>
-    <condition id="CM23_BE_IAR">
-      <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
-      <require condition="CM23_IAR"/>
-      <require Dendian="Big-endian"/>
-    </condition>
 
     <condition id="CM33_IAR">
       <description>Cortex-M33 processor based device for the IAR Compiler</description>
@@ -1783,11 +2017,6 @@
       <require condition="CM33_IAR"/>
       <require Dendian="Little-endian"/>
     </condition>
-    <condition id="CM33_BE_IAR">
-      <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
-      <require condition="CM33_IAR"/>
-      <require Dendian="Big-endian"/>
-    </condition>
 
     <condition id="CM33_FP_IAR">
       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
@@ -1799,11 +2028,6 @@
       <require condition="CM33_FP_IAR"/>
       <require Dendian="Little-endian"/>
     </condition>
-    <condition id="CM33_FP_BE_IAR">
-      <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
-      <require condition="CM33_FP_IAR"/>
-      <require Dendian="Big-endian"/>
-    </condition>
 
     <condition id="CM33_NODSP_NOFPU_IAR">
       <description>CM33, no DSP, no FPU, IAR Compiler</description>
@@ -1846,6 +2070,69 @@
       <require Dendian="Little-endian"/>
     </condition>
 
+    <condition id="CM35P_IAR">
+      <description>Cortex-M35P processor based device for the IAR Compiler</description>
+      <require condition="CM35P"/>
+      <require Tcompiler="IAR"/>
+    </condition>
+    <condition id="CM35P_LE_IAR">
+      <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
+      <require condition="CM35P_IAR"/>
+      <require Dendian="Little-endian"/>
+    </condition>
+
+    <condition id="CM35P_FP_IAR">
+      <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
+      <require condition="CM35P_FP"/>
+      <require Tcompiler="IAR"/>
+    </condition>
+    <condition id="CM35P_FP_LE_IAR">
+      <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
+      <require condition="CM35P_FP_IAR"/>
+      <require Dendian="Little-endian"/>
+    </condition>
+
+    <condition id="CM35P_NODSP_NOFPU_IAR">
+      <description>CM35P, no DSP, no FPU, IAR Compiler</description>
+      <require condition="CM35P_NODSP_NOFPU"/>
+      <require Tcompiler="IAR"/>
+    </condition>
+    <condition id="CM35P_DSP_NOFPU_IAR">
+      <description>CM35P, DSP, no FPU, IAR Compiler</description>
+      <require condition="CM35P_DSP_NOFPU"/>
+      <require Tcompiler="IAR"/>
+    </condition>
+    <condition id="CM35P_NODSP_SP_IAR">
+      <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
+      <require condition="CM35P_NODSP_SP"/>
+      <require Tcompiler="IAR"/>
+    </condition>
+    <condition id="CM35P_DSP_SP_IAR">
+      <description>CM35P, DSP, SP FPU, IAR Compiler</description>
+      <require condition="CM35P_DSP_SP"/>
+      <require Tcompiler="IAR"/>
+    </condition>
+    <condition id="CM35P_NODSP_NOFPU_LE_IAR">
+      <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
+      <require condition="CM35P_NODSP_NOFPU_IAR"/>
+      <require Dendian="Little-endian"/>
+    </condition>
+    <condition id="CM35P_DSP_NOFPU_LE_IAR">
+      <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
+      <require condition="CM35P_DSP_NOFPU_IAR"/>
+      <require Dendian="Little-endian"/>
+    </condition>
+    <condition id="CM35P_NODSP_SP_LE_IAR">
+      <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
+      <require condition="CM35P_NODSP_SP_IAR"/>
+      <require Dendian="Little-endian"/>
+    </condition>
+    <condition id="CM35P_DSP_SP_LE_IAR">
+      <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
+      <require condition="CM35P_DSP_SP_IAR"/>
+      <require Dendian="Little-endian"/>
+    </condition>
+
     <condition id="ARMv8MBL_IAR">
       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
       <require condition="ARMv8MBL"/>
@@ -1856,11 +2143,6 @@
       <require condition="ARMv8MBL_IAR"/>
       <require Dendian="Little-endian"/>
     </condition>
-    <condition id="ARMv8MBL_BE_IAR">
-      <description>Armv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
-      <require condition="ARMv8MBL_IAR"/>
-      <require Dendian="Big-endian"/>
-    </condition>
 
     <condition id="ARMv8MML_IAR">
       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
@@ -1872,11 +2154,6 @@
       <require condition="ARMv8MML_IAR"/>
       <require Dendian="Little-endian"/>
     </condition>
-    <condition id="ARMv8MML_BE_IAR">
-      <description>Armv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
-      <require condition="ARMv8MML_IAR"/>
-      <require Dendian="Big-endian"/>
-    </condition>
 
     <condition id="ARMv8MML_FP_IAR">
       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
@@ -1888,11 +2165,6 @@
       <require condition="ARMv8MML_FP_IAR"/>
       <require Dendian="Little-endian"/>
     </condition>
-    <condition id="ARMv8MML_FP_BE_IAR">
-      <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
-      <require condition="ARMv8MML_FP_IAR"/>
-      <require Dendian="Big-endian"/>
-    </condition>
 
     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
@@ -1936,93 +2208,58 @@
     </condition>
 
     <!-- conditions selecting single devices and CMSIS Core -->
-    <!-- used for component startup, GCC version is used for C-Startup -->
     <condition id="ARMCM0 CMSIS">
       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMCM0"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
-    <condition id="ARMCM0 CMSIS GCC">
-      <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
-      <require condition="ARMCM0 CMSIS"/>
-      <require condition="GCC"/>
-    </condition>
 
     <condition id="ARMCM0+ CMSIS">
       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
-    <condition id="ARMCM0+ CMSIS GCC">
-      <description>Generic Arm Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
-      <require condition="ARMCM0+ CMSIS"/>
-      <require condition="GCC"/>
-    </condition>
 
     <condition id="ARMCM1 CMSIS">
       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMCM1"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
-    <condition id="ARMCM1 CMSIS GCC">
-      <description>Generic ARM Cortex-M1 device startup and depends on CMSIS Core requiring GCC</description>
-      <require condition="ARMCM1 CMSIS"/>
-      <require condition="GCC"/>
-    </condition>
 
     <condition id="ARMCM3 CMSIS">
       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMCM3"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
-    <condition id="ARMCM3 CMSIS GCC">
-      <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
-      <require condition="ARMCM3 CMSIS"/>
-      <require condition="GCC"/>
-    </condition>
 
     <condition id="ARMCM4 CMSIS">
       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
-    <condition id="ARMCM4 CMSIS GCC">
-      <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
-      <require condition="ARMCM4 CMSIS"/>
-      <require condition="GCC"/>
-    </condition>
 
     <condition id="ARMCM7 CMSIS">
       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
-    <condition id="ARMCM7 CMSIS GCC">
-      <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
-      <require condition="ARMCM7 CMSIS"/>
-      <require condition="GCC"/>
-    </condition>
 
     <condition id="ARMCM23 CMSIS">
       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
-    <condition id="ARMCM23 CMSIS GCC">
-      <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
-      <require condition="ARMCM23 CMSIS"/>
-      <require condition="GCC"/>
-    </condition>
 
     <condition id="ARMCM33 CMSIS">
       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
-    <condition id="ARMCM33 CMSIS GCC">
-      <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
-      <require condition="ARMCM33 CMSIS"/>
-      <require condition="GCC"/>
+
+    <condition id="ARMCM35P CMSIS">
+      <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
+      <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
+      <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
 
     <condition id="ARMSC000 CMSIS">
@@ -2030,43 +2267,29 @@
       <require Dvendor="ARM:82" Dname="ARMSC000"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
-    <condition id="ARMSC000 CMSIS GCC">
-      <description>Generic Arm SC000 device startup and depends on CMSIS Core requiring GCC</description>
-      <require condition="ARMSC000 CMSIS"/>
-      <require condition="GCC"/>
-    </condition>
 
     <condition id="ARMSC300 CMSIS">
       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMSC300"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
-    <condition id="ARMSC300 CMSIS GCC">
-      <description>Generic Arm SC300 device startup and dependson CMSIS Core requiring GCC</description>
-      <require condition="ARMSC300 CMSIS"/>
-      <require condition="GCC"/>
-    </condition>
 
     <condition id="ARMv8MBL CMSIS">
       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
-    <condition id="ARMv8MBL CMSIS GCC">
-      <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core requiring GCC</description>
-      <require condition="ARMv8MBL CMSIS"/>
-      <require condition="GCC"/>
-    </condition>
 
     <condition id="ARMv8MML CMSIS">
       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
       <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
-    <condition id="ARMv8MML CMSIS GCC">
-      <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
-      <require condition="ARMv8MML CMSIS"/>
-      <require condition="GCC"/>
+
+    <condition id="ARMv81MML CMSIS">
+      <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
+      <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
+      <require Cclass="CMSIS" Cgroup="CORE"/>
     </condition>
 
     <condition id="ARMCA5 CMSIS">
@@ -2171,20 +2394,20 @@
 
   <components>
     <!-- CMSIS-Core component -->
-    <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.1.2"  condition="ARMv6_7_8-M Device" >
-      <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
+    <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.3.0"  condition="ARMv6_7_8-M Device" >
+      <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
       <files>
         <!-- CPU independent -->
         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
         <file category="include" name="CMSIS/Core/Include/"/>
         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
         <!-- Code template -->
-        <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
-        <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
+        <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
+        <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
       </files>
     </component>
-
-    <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.2"  condition="ARMv7-A Device" >
+   
+    <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.4"  condition="ARMv7-A Device" >
       <description>CMSIS-CORE for Cortex-A</description>
       <files>
         <!-- CPU independent -->
@@ -2195,185 +2418,198 @@
 
     <!-- CMSIS-Startup components -->
     <!-- Cortex-M0 -->
-    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM0 CMSIS">
       <description>System and Startup for Generic Arm Cortex-M0 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
         <!-- startup / system file -->
+        <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.0" attr="config"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
+      </files>
+    </component>
+    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM0 CMSIS">
+      <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
+      <files>
+        <!-- include folder / device header file -->
+        <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
+        <!-- startup / system file -->
         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
       </files>
     </component>
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
-      <description>System and Startup for Generic Arm Cortex-M0 device</description>
-      <files>
-        <!-- include folder / device header file -->
-        <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
-        <!-- startup / system file -->
-        <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
-        <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
-      </files>
-    </component>
 
     <!-- Cortex-M0+ -->
-    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM0+ CMSIS">
       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
         <!-- startup / system file -->
+        <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.0" attr="config"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
+      </files>
+    </component>
+    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM0+ CMSIS">
+      <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
+      <files>
+        <!-- include folder / device header file -->
+        <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
+        <!-- startup / system file -->
         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
       </files>
     </component>
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
-      <description>System and Startup for Generic Arm Cortex-M0+ device</description>
-      <files>
-        <!-- include folder / device header file -->
-        <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
-        <!-- startup / system file -->
-        <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
-        <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
-      </files>
-    </component>
 
     <!-- Cortex-M1 -->
-    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM1 CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM1 CMSIS">
       <description>System and Startup for Generic Arm Cortex-M1 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
         <!-- startup / system file -->
+        <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.0" attr="config"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
+      </files>
+    </component>
+    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM1 CMSIS">
+      <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
+      <files>
+        <!-- include folder / device header file -->
+        <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
+        <!-- startup / system file -->
         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.0" attr="config" condition="ARMCC"/>
-        <file category="sourceC"      name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
       </files>
     </component>
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM1 CMSIS GCC">
-      <description>System and Startup for Generic Arm Cortex-M1 device</description>
-      <files>
-        <!-- include folder / device header file -->
-        <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
-        <!-- startup / system file -->
-        <file category="sourceC"      name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.c" version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
-        <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
-      </files>
-    </component>
 
     <!-- Cortex-M3 -->
-    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM3 CMSIS">
       <description>System and Startup for Generic Arm Cortex-M3 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
         <!-- startup / system file -->
+        <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.0" attr="config"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
+      </files>
+    </component>
+    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM3 CMSIS">
+      <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
+      <files>
+        <!-- include folder / device header file -->
+        <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
+        <!-- startup / system file -->
         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
       </files>
     </component>
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
-      <description>System and Startup for Generic Arm Cortex-M3 device</description>
-      <files>
-        <!-- include folder / device header file -->
-        <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
-        <!-- startup / system file -->
-        <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
-        <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
-      </files>
-    </component>
 
     <!-- Cortex-M4 -->
-    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM4 CMSIS">
       <description>System and Startup for Generic Arm Cortex-M4 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
         <!-- startup / system file -->
+        <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.0" attr="config"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
+      </files>
+    </component>
+    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM4 CMSIS">
+      <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
+      <files>
+        <!-- include folder / device header file -->
+        <file category="include" name="Device/ARM/ARMCM4/Include/"/>
+        <!-- startup / system file -->
         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
       </files>
     </component>
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
-      <description>System and Startup for Generic Arm Cortex-M4 device</description>
-      <files>
-        <!-- include folder / device header file -->
-        <file category="include" name="Device/ARM/ARMCM4/Include/"/>
-        <!-- startup / system file -->
-        <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
-        <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
-      </files>
-    </component>
 
     <!-- Cortex-M7 -->
-    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM7 CMSIS">
       <description>System and Startup for Generic Arm Cortex-M7 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
         <!-- startup / system file -->
+        <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.0" attr="config"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
+      </files>
+    </component>
+    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM7 CMSIS">
+      <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
+      <files>
+        <!-- include folder / device header file -->
+        <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
+        <!-- startup / system file -->
         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
       </files>
     </component>
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
-      <description>System and Startup for Generic Arm Cortex-M7 device</description>
-      <files>
-        <!-- include folder / device header file -->
-        <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
-        <!-- startup / system file -->
-        <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
-        <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
-      </files>
-    </component>
 
     <!-- Cortex-M23 -->
-    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM23 CMSIS">
       <description>System and Startup for Generic Arm Cortex-M23 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
         <!-- startup / system file -->
-        <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
+        <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"    version="2.0.0" attr="config"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"  version="1.0.0" attr="config" condition="ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
         <!-- SAU configuration -->
         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
       </files>
     </component>
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
-      <description>System and Startup for Generic Arm Cortex-M23 device</description>
+    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM23 CMSIS">
+      <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
         <!-- startup / system file -->
-        <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
         <!-- SAU configuration -->
         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
@@ -2381,145 +2617,199 @@
     </component>
 
     <!-- Cortex-M33 -->
-    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM33 CMSIS">
       <description>System and Startup for Generic Arm Cortex-M33 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
         <!-- startup / system file -->
-        <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
+        <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.0.0" attr="config"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
         <!-- SAU configuration -->
-        <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
+        <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
       </files>
     </component>
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
-      <description>System and Startup for Generic Arm Cortex-M33 device</description>
+    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM33 CMSIS">
+      <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
         <!-- startup / system file -->
-        <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
         <!-- SAU configuration -->
-        <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
+        <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
+      </files>
+    </component>
+
+    <!-- Cortex-M35P -->
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM35P CMSIS">
+      <description>System and Startup for Generic Arm Cortex-M35P device</description>
+      <files>
+        <!-- include folder / device header file -->
+        <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
+        <!-- startup / system file -->
+        <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.0.0" attr="config"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
+        <!-- SAU configuration -->
+        <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
+      </files>
+    </component>
+    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM35P CMSIS">
+      <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
+      <files>
+        <!-- include folder / device header file -->
+        <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
+        <!-- startup / system file -->
+        <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.0" attr="config" condition="ARMCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.0.0" attr="config" condition="IAR"/>
+        <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
+        <!-- SAU configuration -->
+        <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
       </files>
     </component>
 
     <!-- Cortex-SC000 -->
-    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMSC000 CMSIS">
       <description>System and Startup for Generic Arm SC000 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
         <!-- startup / system file -->
+        <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.0" attr="config"/>
+        <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
+        <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
+      </files>
+    </component>
+    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMSC000 CMSIS">
+      <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
+      <files>
+        <!-- include folder / device header file -->
+        <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
+        <!-- startup / system file -->
         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
       </files>
     </component>
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
-      <description>System and Startup for Generic Arm SC000 device</description>
-      <files>
-        <!-- include folder / device header file -->
-        <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
-        <!-- startup / system file -->
-        <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
-        <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
-      </files>
-    </component>
 
     <!-- Cortex-SC300 -->
-    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMSC300 CMSIS">
       <description>System and Startup for Generic Arm SC300 device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
         <!-- startup / system file -->
+        <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.0" attr="config"/>
+        <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
+        <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
+      </files>
+    </component>
+    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMSC300 CMSIS">
+      <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
+      <files>
+        <!-- include folder / device header file -->
+        <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
+        <!-- startup / system file -->
         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
       </files>
     </component>
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
-      <description>System and Startup for Generic Arm SC300 device</description>
-      <files>
-        <!-- include folder / device header file -->
-        <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
-        <!-- startup / system file -->
-        <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
-        <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
-      </files>
-    </component>
 
     <!-- ARMv8MBL -->
-    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMv8MBL CMSIS">
       <description>System and Startup for Generic Armv8-M Baseline device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
         <!-- startup / system file -->
+        <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"            version="2.0.0" attr="config"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"          version="1.0.0" attr="config" condition="ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.0" attr="config"/>
+        <!-- SAU configuration -->
+        <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
+      </files>
+    </component>
+    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MBL CMSIS">
+      <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
+      <files>
+        <!-- include folder / device header file -->
+        <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
+        <!-- startup / system file -->
         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
         <!-- SAU configuration -->
         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
       </files>
     </component>
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
-      <description>System and Startup for Generic Armv8-M Baseline device</description>
-      <files>
-        <!-- include folder / device header file -->
-        <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
-        <!-- startup / system file -->
-        <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
-        <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
-        <!-- SAU configuration -->
-        <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
-      </files>
-    </component>
 
     <!-- ARMv8MML -->
-    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMv8MML CMSIS">
       <description>System and Startup for Generic Armv8-M Mainline device</description>
       <files>
         <!-- include folder / device header file -->
         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
         <!-- startup / system file -->
+        <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.0.0" attr="config"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
+        <!-- SAU configuration -->
+        <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
+      </files>
+    </component>
+    <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMv8MML CMSIS">
+      <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
+      <files>
+        <!-- include folder / device header file -->
+        <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
+        <!-- startup / system file -->
         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
         <!-- SAU configuration -->
-        <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
-      </files>
-    </component>
-    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
-      <description>System and Startup for Generic Armv8-M Mainline device</description>
-      <files>
-        <!-- include folder / device header file -->
-        <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
-        <!-- startup / system file -->
-        <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
-        <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
-        <!-- SAU configuration -->
-        <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
+        <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
       </files>
     </component>
 
+    <!-- ARMv81MML -->
+    <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMv81MML CMSIS">
+      <description>System and Startup for Generic Armv8.1-M Mainline device</description>
+      <files>
+        <!-- include folder / device header file -->
+        <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
+        <!-- startup / system file -->
+        <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.0.0" attr="config"/>
+        <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"               version="1.0.0" attr="config" condition="ARMCC6"/>
+        <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.0.0" attr="config"/>
+        <!-- SAU configuration -->
+        <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
+      </files>
+    </component>
+    
     <!-- Cortex-A5 -->
     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
       <description>System and Startup for Generic Arm Cortex-A5 device</description>
@@ -2535,10 +2825,10 @@
         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
-        <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
-        <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
-        <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
-        <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
+        <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
+        <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
+        <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
+        <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
 
       </files>
     </component>
@@ -2558,10 +2848,10 @@
         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
-        <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
-        <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
-        <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
-        <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
+        <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
+        <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
+        <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
+        <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
       </files>
     </component>
 
@@ -2580,10 +2870,10 @@
         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
-        <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
-        <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
-        <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
-        <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
+        <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
+        <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
+        <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
+        <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
       </files>
     </component>
 
@@ -2611,7 +2901,7 @@
     </component>
 
     <!-- CMSIS-DSP component -->
-    <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
+    <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.7.0" isDefaultVariant="true" condition="CMSIS DSP">
       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
       <files>
         <!-- CPU independent -->
@@ -2620,97 +2910,128 @@
 
         <!-- CPU and Compiler dependent -->
         <!-- ARMCC -->
-        <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="CM1_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="CM1_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
 
-        <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
-        <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
-        <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
-        <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
+        <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
+        <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
+        <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
+        <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
 
         <!-- GCC -->
-        <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
-        <file category="library" condition="CM1_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
-        <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
-        <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
-        <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
-        <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
-        <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
-        <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
+        <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
+        <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
+        <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
+        <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
+        <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
+        <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
+        <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
+        <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
 
-        <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
-        <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
-        <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
-        <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
-        <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
-        <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
-        <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
-        <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
-        <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
-        <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
-        <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
-        <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
+        <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
+        <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
+        <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
+        <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
+        <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
+        <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
+        <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
+        <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
+        <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
+        <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
+        <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
+        <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
+        <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
+        <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
+        <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
+        <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
 
 	<!-- IAR -->
-        <file category="library" condition="CM0_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="CM0_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="CM1_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="CM1_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="CM3_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="CM3_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="CM4_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="CM4_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="CM4_FP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="CM4_FP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="CM7_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="CM7_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="CM7_DP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="CM7_DP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="CM7_SP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="CM7_SP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
 
-        <file category="library" condition="CM23_LE_IAR"              name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="CM33_LE_IAR"              name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="CM33_DSP_SP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="CM33_FP_LE_IAR"           name="CMSIS/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"    name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="CM33_DSP_SP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
-        <!--file category="library" condition="CM33_DSP_DP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
-        <file category="library" condition="ARMv8MBL_LE_IAR"          name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="ARMv8MML_LE_IAR"          name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="ARMv8MML_FP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
-        <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
-        <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
+        <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
+        <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
+        <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
+        <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
+
+      </files>
+    </component>
+    <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.7.0" condition="CMSIS DSP">
+      <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
+      <files>
+        <!-- CPU independent -->
+        <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
+        <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
+
+        <!-- DSP sources (core) -->
+        <file category="source" name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
+        <file category="source" name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
+        <file category="source" name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
+        <file category="source" name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
+        <file category="source" name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
+        <file category="source" name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
+        <file category="source" name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
+        <file category="source" name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
+        <file category="source" name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
+        <file category="source" name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
 
       </files>
     </component>
 
     <!-- CMSIS-NN component -->
-    <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.1.0" condition="CMSIS NN">
+    <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.2.0" condition="CMSIS NN">
       <description>CMSIS-NN Neural Network Library</description>
       <files>
         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
@@ -2733,6 +3054,7 @@
         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
+        <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
 
         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
@@ -2755,7 +3077,7 @@
     </component>
 
     <!-- CMSIS-RTOS Keil RTX component -->
-    <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
+    <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
       <RTE_Components_h>
         <!-- the following content goes into file 'RTE_Components.h' -->
@@ -2832,7 +3154,7 @@
       </files>
     </component>
     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
-    <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
+    <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
       <RTE_Components_h>
         <!-- the following content goes into file 'RTE_Components.h' -->
@@ -2872,7 +3194,7 @@
     </component>
 
     <!-- CMSIS-RTOS Keil RTX5 component -->
-    <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.4.0" Capiversion="1.0.0" condition="RTOS RTX5">
+    <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.1" Capiversion="1.0.0" condition="RTOS RTX5">
       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
       <RTE_Components_h>
         <!-- the following content goes into file 'RTE_Components.h' -->
@@ -2888,7 +3210,7 @@
     </component>
 
     <!-- CMSIS-RTOS2 Keil RTX5 component -->
-    <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
+    <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
       <RTE_Components_h>
         <!-- the following content goes into file 'RTE_Components.h' -->
@@ -2903,11 +3225,11 @@
         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
 
         <!-- RTX configuration -->
-        <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
+        <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
 
         <!-- RTX templates -->
-        <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
+        <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
@@ -2933,6 +3255,8 @@
         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
@@ -2947,6 +3271,8 @@
         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
@@ -2958,9 +3284,17 @@
         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
       </files>
     </component>
-    <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
+    <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
       <RTE_Components_h>
         <!-- the following content goes into file 'RTE_Components.h' -->
@@ -2976,11 +3310,11 @@
         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
 
         <!-- RTX configuration -->
-        <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
+        <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
 
         <!-- RTX templates -->
-        <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
+        <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
@@ -2999,6 +3333,8 @@
         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
@@ -3006,12 +3342,23 @@
         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
+        <!-- IAR -->
+        <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
+        <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
       </files>
     </component>
-    <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5">
+    <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5">
       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
       <RTE_Components_h>
         <!-- the following content goes into file 'RTE_Components.h' -->
@@ -3027,11 +3374,11 @@
         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
 
         <!-- RTX configuration -->
-        <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
+        <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
 
         <!-- RTX templates -->
-        <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
+        <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
@@ -3068,6 +3415,8 @@
         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
+        <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_ARMCC"/>
+        <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_FP_ARMCC"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
@@ -3082,6 +3431,8 @@
         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
+        <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
+        <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM35P_FP_GCC"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
@@ -3096,6 +3447,8 @@
         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
+        <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_IAR"/>
+        <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_FP_IAR"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
@@ -3103,7 +3456,7 @@
         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
       </files>
     </component>
-    <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
+    <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
       <RTE_Components_h>
         <!-- the following content goes into file 'RTE_Components.h' -->
@@ -3119,13 +3472,13 @@
         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
 
         <!-- RTX configuration -->
-        <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
+        <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
 
         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
 
         <!-- RTX templates -->
-        <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
+        <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
@@ -3160,7 +3513,7 @@
         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
       </files>
     </component>
-    <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
+    <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
       <RTE_Components_h>
         <!-- the following content goes into file 'RTE_Components.h' -->
@@ -3177,11 +3530,11 @@
         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
 
         <!-- RTX configuration -->
-        <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
+        <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
 
         <!-- RTX templates -->
-        <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
+        <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
@@ -3211,6 +3564,8 @@
         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
+        <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_ARMCC"/>
+        <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_FP_ARMCC"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
@@ -3218,6 +3573,8 @@
         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
+        <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM35P_GCC"/>
+        <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM35P_FP_GCC"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
@@ -3225,6 +3582,8 @@
         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
+        <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_IAR"/>
+        <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_FP_IAR"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
@@ -3232,7 +3591,108 @@
         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
       </files>
     </component>
-
+    
+    <!-- CMSIS-Driver Custom components -->
+    <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
+      <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
+      <files>
+        <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
+        <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
+      </files>
+    </component>
+    <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
+      <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
+      <files>
+        <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
+        <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
+      </files>
+    </component>
+    <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.1.0" Capiversion="1.1.0">
+      <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
+      <files>
+        <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
+        <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
+      </files>
+    </component>
+    <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
+      <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
+      <files>
+        <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
+        <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
+      </files>
+    </component>
+    <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.2.0" Capiversion="1.2.0">
+      <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
+      <files>
+        <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
+        <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
+      </files>
+    </component>
+    <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
+      <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
+      <files>
+        <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
+        <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
+      </files>
+    </component>
+    <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
+      <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
+      <files>
+        <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
+        <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
+      </files>
+    </component>
+    <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
+      <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
+      <files>
+        <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
+        <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/> -->
+      </files>
+    </component>
+    <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
+      <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
+      <files>
+        <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
+        <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
+        <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
+        <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
+      </files>
+    </component>
+    <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
+      <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
+      <files>
+        <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
+        <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
+      </files>
+    </component>
+    <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
+      <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
+      <files>
+        <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
+        <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
+      </files>
+    </component>
+    <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
+      <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
+      <files>
+        <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
+        <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
+      </files>
+    </component>
+    <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
+      <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
+      <files>
+        <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
+        <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
+      </files>
+    </component>
+    <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.0.0">
+      <description>Access to #include Driver_WiFi.h file</description>
+      <files>
+        <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
+        <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/> -->
+      </files>
+    </component>
   </components>
 
   <boards>
@@ -3258,13 +3718,38 @@
       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
     </board>
 
-    <board name="Fixed Virtual Platform" vendor="ARM">
-      <description>Fixed Virtual Platform</description>
-      <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
-      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
-      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
+    <board name="EWARM Simulator" vendor="IAR">
+      <description>EWARM Simulator</description>
+      <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
+      <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
     </board>
   </boards>
 
@@ -3438,6 +3923,21 @@
       </attributes>
     </example>
 
+    <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
+      <description>Neural Network CIFAR10 example</description>
+      <board name="EWARM Simulator" vendor="IAR"/>
+      <project>
+        <environment name="iar" load="NN-example-cifar10.ewp"/>
+      </project>
+      <attributes>
+        <component Cclass="CMSIS" Cgroup="CORE"/>
+        <component Cclass="CMSIS" Cgroup="DSP"/>
+        <component Cclass="CMSIS" Cgroup="NN Lib"/>
+        <component Cclass="Device" Cgroup="Startup"/>
+        <category>Getting Started</category>
+      </attributes>
+    </example>
+
     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
       <description>Neural Network GRU example</description>
       <board name="uVision Simulator" vendor="Keil"/>
@@ -3453,6 +3953,21 @@
       </attributes>
     </example>
 
+    <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
+      <description>Neural Network GRU example</description>
+      <board name="EWARM Simulator" vendor="IAR"/>
+      <project>
+        <environment name="iar" load="NN-example-gru.ewp"/>
+      </project>
+      <attributes>
+        <component Cclass="CMSIS" Cgroup="CORE"/>
+        <component Cclass="CMSIS" Cgroup="DSP"/>
+        <component Cclass="CMSIS" Cgroup="NN Lib"/>
+        <component Cclass="Device" Cgroup="Startup"/>
+        <category>Getting Started</category>
+      </attributes>
+    </example>
+
     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
       <description>CMSIS-RTOS2 Blinky example</description>
       <board name="uVision Simulator" vendor="Keil"/>
@@ -3498,7 +4013,7 @@
 
     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
       <description>CMSIS-RTOS2 Memory Pool Example</description>
-      <board name="Fixed Virtual Platform" vendor="ARM"/>
+      <board name="uVision Simulator" vendor="Keil"/>
       <project>
         <environment name="uv" load="MemPool.uvprojx"/>
       </project>
diff --git a/Core/Include/cmsis_armcc.h b/Core/Include/cmsis_armcc.h
index 4d9d064..59f173a 100644
--- a/Core/Include/cmsis_armcc.h
+++ b/Core/Include/cmsis_armcc.h
@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     cmsis_armcc.h
  * @brief    CMSIS compiler ARMCC (Arm Compiler 5) header file
- * @version  V5.0.4
- * @date     10. January 2018
+ * @version  V5.1.0
+ * @date     08. May 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -47,6 +47,10 @@
   /* __ARM_ARCH_8M_BASE__  not applicable */
   /* __ARM_ARCH_8M_MAIN__  not applicable */
 
+/* CMSIS compiler control DSP macros */
+#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
+  #define __ARM_FEATURE_DSP         1
+#endif
 
 /* CMSIS compiler specific defines */
 #ifndef   __ASM
@@ -100,6 +104,31 @@
 #ifndef   __RESTRICT
   #define __RESTRICT                             __restrict
 #endif
+#ifndef   __COMPILER_BARRIER
+  #define __COMPILER_BARRIER()                   __memory_changed()
+#endif
+
+/* #########################  Startup and Lowlevel Init  ######################## */
+
+#ifndef __PROGRAM_START
+#define __PROGRAM_START           __main
+#endif
+
+#ifndef __INITIAL_SP
+#define __INITIAL_SP              Image$$ARM_LIB_STACK$$ZI$$Limit
+#endif
+
+#ifndef __STACK_LIMIT
+#define __STACK_LIMIT             Image$$ARM_LIB_STACK$$ZI$$Base
+#endif
+
+#ifndef __VECTOR_TABLE
+#define __VECTOR_TABLE            __Vectors
+#endif
+
+#ifndef __VECTOR_TABLE_ATTRIBUTE
+#define __VECTOR_TABLE_ATTRIBUTE  __attribute((used, section("RESET")))
+#endif
 
 /* ###########################  Core Function Access  ########################### */
 /** \ingroup  CMSIS_Core_FunctionInterface
diff --git a/Core/Include/cmsis_armclang.h b/Core/Include/cmsis_armclang.h
index 162a400..e917f35 100644
--- a/Core/Include/cmsis_armclang.h
+++ b/Core/Include/cmsis_armclang.h
@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     cmsis_armclang.h
  * @brief    CMSIS compiler armclang (Arm Compiler 6) header file
- * @version  V5.0.4
- * @date     10. January 2018
+ * @version  V5.2.0
+ * @date     08. May 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -43,9 +43,9 @@
 #ifndef   __STATIC_INLINE
   #define __STATIC_INLINE                        static __inline
 #endif
-#ifndef   __STATIC_FORCEINLINE                 
+#ifndef   __STATIC_FORCEINLINE
   #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static __inline
-#endif                                           
+#endif
 #ifndef   __NO_RETURN
   #define __NO_RETURN                            __attribute__((__noreturn__))
 #endif
@@ -110,7 +110,31 @@
 #ifndef   __RESTRICT
   #define __RESTRICT                             __restrict
 #endif
+#ifndef   __COMPILER_BARRIER
+  #define __COMPILER_BARRIER()                   __ASM volatile("":::"memory")
+#endif
 
+/* #########################  Startup and Lowlevel Init  ######################## */
+
+#ifndef __PROGRAM_START
+#define __PROGRAM_START           __main
+#endif
+
+#ifndef __INITIAL_SP
+#define __INITIAL_SP              Image$$ARM_LIB_STACK$$ZI$$Limit
+#endif
+
+#ifndef __STACK_LIMIT
+#define __STACK_LIMIT             Image$$ARM_LIB_STACK$$ZI$$Base
+#endif
+
+#ifndef __VECTOR_TABLE
+#define __VECTOR_TABLE            __Vectors
+#endif
+
+#ifndef __VECTOR_TABLE_ATTRIBUTE
+#define __VECTOR_TABLE_ATTRIBUTE  __attribute((used, section("RESET")))
+#endif
 
 /* ###########################  Core Function Access  ########################### */
 /** \ingroup  CMSIS_Core_FunctionInterface
@@ -781,9 +805,11 @@
  * Otherwise, use general registers, specified by constraint "r" */
 #if defined (__thumb__) && !defined (__thumb2__)
 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
+#define __CMSIS_GCC_RW_REG(r) "+l" (r)
 #define __CMSIS_GCC_USE_REG(r) "l" (r)
 #else
 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
+#define __CMSIS_GCC_RW_REG(r) "+r" (r)
 #define __CMSIS_GCC_USE_REG(r) "r" (r)
 #endif
 
@@ -821,14 +847,14 @@
            so that all instructions following the ISB are fetched from cache or memory,
            after the instruction has been completed.
  */
-#define __ISB()        __builtin_arm_isb(0xF);
+#define __ISB()        __builtin_arm_isb(0xF)
 
 /**
   \brief   Data Synchronization Barrier
   \details Acts as a special kind of Data Memory Barrier.
            It completes when all explicit memory accesses before this instruction complete.
  */
-#define __DSB()        __builtin_arm_dsb(0xF);
+#define __DSB()        __builtin_arm_dsb(0xF)
 
 
 /**
@@ -836,7 +862,7 @@
   \details Ensures the apparent order of the explicit memory operations before
            and after the instruction, without ensuring their completion.
  */
-#define __DMB()        __builtin_arm_dmb(0xF);
+#define __DMB()        __builtin_arm_dmb(0xF)
 
 
 /**
@@ -908,7 +934,23 @@
   \param [in]  value  Value to count the leading zeros
   \return             number of leading zeros in value
  */
-#define __CLZ             (uint8_t)__builtin_clz
+__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
+{
+  /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
+     __builtin_clz(0) is undefined behaviour, so handle this case specially.
+     This guarantees ARM-compatible results if happening to compile on a non-ARM
+     target, and ensures the compiler doesn't decide to activate any
+     optimisations using the logic "value was passed to __builtin_clz, so it
+     is non-zero".
+     ARM Compiler 6.10 and possibly earlier will optimise this test away, leaving a
+     single CLZ instruction.
+   */
+  if (value == 0U)
+  {
+    return 32U;
+  }
+  return __builtin_clz(value);
+}
 
 
 #if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
@@ -1321,532 +1363,65 @@
 
 #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
 
-__STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-
-__STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-
-__STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-#define __SSAT16(ARG1,ARG2) \
-({                          \
-  int32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
-#define __USAT16(ARG1,ARG2) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("usat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
-__STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
-{
-  uint32_t result;
-
-  __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
-{
-  uint32_t result;
-
-  __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUAD  (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUSD  (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint32_t __SEL  (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE  int32_t __QADD( int32_t op1,  int32_t op2)
-{
-  int32_t result;
-
-  __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE  int32_t __QSUB( int32_t op1,  int32_t op2)
-{
-  int32_t result;
-
-  __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-#if 0
-#define __PKHBT(ARG1,ARG2,ARG3) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
-  __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2), "I" (ARG3)  ); \
-  __RES; \
- })
-
-#define __PKHTB(ARG1,ARG2,ARG3) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
-  if (ARG3 == 0) \
-    __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2)  ); \
-  else \
-    __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2), "I" (ARG3)  ); \
-  __RES; \
- })
-#endif
+#define     __SADD8                 __builtin_arm_sadd8
+#define     __QADD8                 __builtin_arm_qadd8
+#define     __SHADD8                __builtin_arm_shadd8
+#define     __UADD8                 __builtin_arm_uadd8
+#define     __UQADD8                __builtin_arm_uqadd8
+#define     __UHADD8                __builtin_arm_uhadd8
+#define     __SSUB8                 __builtin_arm_ssub8
+#define     __QSUB8                 __builtin_arm_qsub8
+#define     __SHSUB8                __builtin_arm_shsub8
+#define     __USUB8                 __builtin_arm_usub8
+#define     __UQSUB8                __builtin_arm_uqsub8
+#define     __UHSUB8                __builtin_arm_uhsub8
+#define     __SADD16                __builtin_arm_sadd16
+#define     __QADD16                __builtin_arm_qadd16
+#define     __SHADD16               __builtin_arm_shadd16
+#define     __UADD16                __builtin_arm_uadd16
+#define     __UQADD16               __builtin_arm_uqadd16
+#define     __UHADD16               __builtin_arm_uhadd16
+#define     __SSUB16                __builtin_arm_ssub16
+#define     __QSUB16                __builtin_arm_qsub16
+#define     __SHSUB16               __builtin_arm_shsub16
+#define     __USUB16                __builtin_arm_usub16
+#define     __UQSUB16               __builtin_arm_uqsub16
+#define     __UHSUB16               __builtin_arm_uhsub16
+#define     __SASX                  __builtin_arm_sasx
+#define     __QASX                  __builtin_arm_qasx
+#define     __SHASX                 __builtin_arm_shasx
+#define     __UASX                  __builtin_arm_uasx
+#define     __UQASX                 __builtin_arm_uqasx
+#define     __UHASX                 __builtin_arm_uhasx
+#define     __SSAX                  __builtin_arm_ssax
+#define     __QSAX                  __builtin_arm_qsax
+#define     __SHSAX                 __builtin_arm_shsax
+#define     __USAX                  __builtin_arm_usax
+#define     __UQSAX                 __builtin_arm_uqsax
+#define     __UHSAX                 __builtin_arm_uhsax
+#define     __USAD8                 __builtin_arm_usad8
+#define     __USADA8                __builtin_arm_usada8
+#define     __SSAT16                __builtin_arm_ssat16
+#define     __USAT16                __builtin_arm_usat16
+#define     __UXTB16                __builtin_arm_uxtb16
+#define     __UXTAB16               __builtin_arm_uxtab16
+#define     __SXTB16                __builtin_arm_sxtb16
+#define     __SXTAB16               __builtin_arm_sxtab16
+#define     __SMUAD                 __builtin_arm_smuad
+#define     __SMUADX                __builtin_arm_smuadx
+#define     __SMLAD                 __builtin_arm_smlad
+#define     __SMLADX                __builtin_arm_smladx
+#define     __SMLALD                __builtin_arm_smlald
+#define     __SMLALDX               __builtin_arm_smlaldx
+#define     __SMUSD                 __builtin_arm_smusd
+#define     __SMUSDX                __builtin_arm_smusdx
+#define     __SMLSD                 __builtin_arm_smlsd
+#define     __SMLSDX                __builtin_arm_smlsdx
+#define     __SMLSLD                __builtin_arm_smlsld
+#define     __SMLSLDX               __builtin_arm_smlsldx
+#define     __SEL                   __builtin_arm_sel
+#define     __QADD                  __builtin_arm_qadd
+#define     __QSUB                  __builtin_arm_qsub
 
 #define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \
                                            ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )
diff --git a/Core/Include/cmsis_armclang_ltm.h b/Core/Include/cmsis_armclang_ltm.h
new file mode 100644
index 0000000..feec324
--- /dev/null
+++ b/Core/Include/cmsis_armclang_ltm.h
@@ -0,0 +1,1891 @@
+/**************************************************************************//**
+ * @file     cmsis_armclang_ltm.h
+ * @brief    CMSIS compiler armclang (Arm Compiler 6) header file
+ * @version  V1.2.0
+ * @date     08. May 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2018-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */
+
+#ifndef __CMSIS_ARMCLANG_H
+#define __CMSIS_ARMCLANG_H
+
+#pragma clang system_header   /* treat file as system include file */
+
+#ifndef __ARM_COMPAT_H
+#include <arm_compat.h>    /* Compatibility header for Arm Compiler 5 intrinsics */
+#endif
+
+/* CMSIS compiler specific defines */
+#ifndef   __ASM
+  #define __ASM                                  __asm
+#endif
+#ifndef   __INLINE
+  #define __INLINE                               __inline
+#endif
+#ifndef   __STATIC_INLINE
+  #define __STATIC_INLINE                        static __inline
+#endif
+#ifndef   __STATIC_FORCEINLINE
+  #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static __inline
+#endif
+#ifndef   __NO_RETURN
+  #define __NO_RETURN                            __attribute__((__noreturn__))
+#endif
+#ifndef   __USED
+  #define __USED                                 __attribute__((used))
+#endif
+#ifndef   __WEAK
+  #define __WEAK                                 __attribute__((weak))
+#endif
+#ifndef   __PACKED
+  #define __PACKED                               __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __PACKED_STRUCT
+  #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __PACKED_UNION
+  #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __UNALIGNED_UINT32        /* deprecated */
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */
+  struct __attribute__((packed)) T_UINT32 { uint32_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+#endif
+#ifndef   __UNALIGNED_UINT16_WRITE
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */
+  __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT16_READ
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */
+  __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+#endif
+#ifndef   __UNALIGNED_UINT32_WRITE
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */
+  __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT32_READ
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */
+  __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+#endif
+#ifndef   __ALIGNED
+  #define __ALIGNED(x)                           __attribute__((aligned(x)))
+#endif
+#ifndef   __RESTRICT
+  #define __RESTRICT                             __restrict
+#endif
+#ifndef   __COMPILER_BARRIER
+  #define __COMPILER_BARRIER()                   __ASM volatile("":::"memory")
+#endif
+
+/* #########################  Startup and Lowlevel Init  ######################## */
+
+#ifndef __PROGRAM_START
+#define __PROGRAM_START           __main
+#endif
+
+#ifndef __INITIAL_SP
+#define __INITIAL_SP              Image$$ARM_LIB_STACK$$ZI$$Limit
+#endif
+
+#ifndef __STACK_LIMIT
+#define __STACK_LIMIT             Image$$ARM_LIB_STACK$$ZI$$Base
+#endif
+
+#ifndef __VECTOR_TABLE
+#define __VECTOR_TABLE            __Vectors
+#endif
+
+#ifndef __VECTOR_TABLE_ATTRIBUTE
+#define __VECTOR_TABLE_ATTRIBUTE  __attribute((used, section("RESET")))
+#endif
+
+
+/* ###########################  Core Function Access  ########################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
+  @{
+ */
+
+/**
+  \brief   Enable IRQ Interrupts
+  \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+/* intrinsic void __enable_irq();  see arm_compat.h */
+
+
+/**
+  \brief   Disable IRQ Interrupts
+  \details Disables IRQ interrupts by setting the I-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+/* intrinsic void __disable_irq();  see arm_compat.h */
+
+
+/**
+  \brief   Get Control Register
+  \details Returns the content of the Control Register.
+  \return               Control Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, control" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Control Register (non-secure)
+  \details Returns the content of the non-secure Control Register when in secure mode.
+  \return               non-secure Control Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Control Register
+  \details Writes the given value to the Control Register.
+  \param [in]    control  Control Register value to set
+ */
+__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
+{
+  __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Control Register (non-secure)
+  \details Writes the given value to the non-secure Control Register when in secure state.
+  \param [in]    control  Control Register value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
+{
+  __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
+}
+#endif
+
+
+/**
+  \brief   Get IPSR Register
+  \details Returns the content of the IPSR Register.
+  \return               IPSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get APSR Register
+  \details Returns the content of the APSR Register.
+  \return               APSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_APSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, apsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get xPSR Register
+  \details Returns the content of the xPSR Register.
+  \return               xPSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_xPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get Process Stack Pointer
+  \details Returns the current value of the Process Stack Pointer (PSP).
+  \return               PSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PSP(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, psp"  : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Process Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
+  \return               PSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, psp_ns"  : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Process Stack Pointer
+  \details Assigns the given value to the Process Stack Pointer (PSP).
+  \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
+{
+  __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Process Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
+  \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
+{
+  __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
+}
+#endif
+
+
+/**
+  \brief   Get Main Stack Pointer
+  \details Returns the current value of the Main Stack Pointer (MSP).
+  \return               MSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_MSP(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, msp" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Main Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
+  \return               MSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Main Stack Pointer
+  \details Assigns the given value to the Main Stack Pointer (MSP).
+  \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
+{
+  __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Main Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
+  \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
+{
+  __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
+}
+#endif
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
+  \return               SP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Set Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
+  \param [in]    topOfStack  Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
+{
+  __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
+}
+#endif
+
+
+/**
+  \brief   Get Priority Mask
+  \details Returns the current state of the priority mask bit from the Priority Mask Register.
+  \return               Priority Mask value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, primask" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Priority Mask (non-secure)
+  \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
+  \return               Priority Mask value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Priority Mask
+  \details Assigns the given value to the Priority Mask Register.
+  \param [in]    priMask  Priority Mask
+ */
+__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
+{
+  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Priority Mask (non-secure)
+  \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
+  \param [in]    priMask  Priority Mask
+ */
+__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
+{
+  __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
+}
+#endif
+
+
+#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
+/**
+  \brief   Enable FIQ
+  \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+#define __enable_fault_irq                __enable_fiq   /* see arm_compat.h */
+
+
+/**
+  \brief   Disable FIQ
+  \details Disables FIQ interrupts by setting the F-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+#define __disable_fault_irq               __disable_fiq   /* see arm_compat.h */
+
+
+/**
+  \brief   Get Base Priority
+  \details Returns the current value of the Base Priority register.
+  \return               Base Priority register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, basepri" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Base Priority (non-secure)
+  \details Returns the current value of the non-secure Base Priority register when in secure state.
+  \return               Base Priority register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Base Priority
+  \details Assigns the given value to the Base Priority register.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Base Priority (non-secure)
+  \details Assigns the given value to the non-secure Base Priority register when in secure state.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
+}
+#endif
+
+
+/**
+  \brief   Set Base Priority with condition
+  \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
+           or the new value increases the BASEPRI priority level.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
+}
+
+
+/**
+  \brief   Get Fault Mask
+  \details Returns the current value of the Fault Mask register.
+  \return               Fault Mask register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Fault Mask (non-secure)
+  \details Returns the current value of the non-secure Fault Mask register when in secure state.
+  \return               Fault Mask register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Fault Mask
+  \details Assigns the given value to the Fault Mask register.
+  \param [in]    faultMask  Fault Mask value to set
+ */
+__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
+{
+  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Fault Mask (non-secure)
+  \details Assigns the given value to the non-secure Fault Mask register when in secure state.
+  \param [in]    faultMask  Fault Mask value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
+{
+  __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
+}
+#endif
+
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
+
+
+#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+
+/**
+  \brief   Get Process Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always in non-secure
+  mode.
+  
+  \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
+  \return               PSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure PSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, psplim"  : "=r" (result) );
+  return result;
+#endif
+}
+
+#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Process Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always in non-secure
+  mode.
+
+  \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
+  \return               PSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, psplim_ns"  : "=r" (result) );
+  return result;
+#endif
+}
+#endif
+
+
+/**
+  \brief   Set Process Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored in non-secure
+  mode.
+  
+  \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
+  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  (void)ProcStackPtrLimit;
+#else
+  __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Set Process Stack Pointer (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored in non-secure
+  mode.
+
+  \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
+  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  (void)ProcStackPtrLimit;
+#else
+  __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
+#endif
+}
+#endif
+
+
+/**
+  \brief   Get Main Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always.
+
+  \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
+  \return               MSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, msplim" : "=r" (result) );
+  return result;
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Get Main Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always.
+
+  \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
+  \return               MSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
+  return result;
+#endif
+}
+#endif
+
+
+/**
+  \brief   Set Main Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored.
+
+  \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
+  \param [in]    MainStackPtrLimit  Main Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  (void)MainStackPtrLimit;
+#else
+  __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Set Main Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored.
+
+  \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
+  \param [in]    MainStackPtrLimit  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  (void)MainStackPtrLimit;
+#else
+  __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
+#endif
+}
+#endif
+
+#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
+
+/**
+  \brief   Get FPSCR
+  \details Returns the current value of the Floating Point Status/Control register.
+  \return               Floating Point Status/Control register value
+ */
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+#define __get_FPSCR      (uint32_t)__builtin_arm_get_fpscr
+#else
+#define __get_FPSCR()      ((uint32_t)0U)
+#endif
+
+/**
+  \brief   Set FPSCR
+  \details Assigns the given value to the Floating Point Status/Control register.
+  \param [in]    fpscr  Floating Point Status/Control value to set
+ */
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+#define __set_FPSCR      __builtin_arm_set_fpscr
+#else
+#define __set_FPSCR(x)      ((void)(x))
+#endif
+
+
+/*@} end of CMSIS_Core_RegAccFunctions */
+
+
+/* ##########################  Core Instruction Access  ######################### */
+/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
+  Access to dedicated instructions
+  @{
+*/
+
+/* Define macros for porting to both thumb1 and thumb2.
+ * For thumb1, use low register (r0-r7), specified by constraint "l"
+ * Otherwise, use general registers, specified by constraint "r" */
+#if defined (__thumb__) && !defined (__thumb2__)
+#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
+#define __CMSIS_GCC_USE_REG(r) "l" (r)
+#else
+#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
+#define __CMSIS_GCC_USE_REG(r) "r" (r)
+#endif
+
+/**
+  \brief   No Operation
+  \details No Operation does nothing. This instruction can be used for code alignment purposes.
+ */
+#define __NOP          __builtin_arm_nop
+
+/**
+  \brief   Wait For Interrupt
+  \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
+ */
+#define __WFI          __builtin_arm_wfi
+
+
+/**
+  \brief   Wait For Event
+  \details Wait For Event is a hint instruction that permits the processor to enter
+           a low-power state until one of a number of events occurs.
+ */
+#define __WFE          __builtin_arm_wfe
+
+
+/**
+  \brief   Send Event
+  \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
+ */
+#define __SEV          __builtin_arm_sev
+
+
+/**
+  \brief   Instruction Synchronization Barrier
+  \details Instruction Synchronization Barrier flushes the pipeline in the processor,
+           so that all instructions following the ISB are fetched from cache or memory,
+           after the instruction has been completed.
+ */
+#define __ISB()        __builtin_arm_isb(0xF)
+
+/**
+  \brief   Data Synchronization Barrier
+  \details Acts as a special kind of Data Memory Barrier.
+           It completes when all explicit memory accesses before this instruction complete.
+ */
+#define __DSB()        __builtin_arm_dsb(0xF)
+
+
+/**
+  \brief   Data Memory Barrier
+  \details Ensures the apparent order of the explicit memory operations before
+           and after the instruction, without ensuring their completion.
+ */
+#define __DMB()        __builtin_arm_dmb(0xF)
+
+
+/**
+  \brief   Reverse byte order (32 bit)
+  \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __REV(value)   __builtin_bswap32(value)
+
+
+/**
+  \brief   Reverse byte order (16 bit)
+  \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __REV16(value) __ROR(__REV(value), 16)
+
+
+/**
+  \brief   Reverse byte order (16 bit)
+  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __REVSH(value) (int16_t)__builtin_bswap16(value)
+
+
+/**
+  \brief   Rotate Right in unsigned value (32 bit)
+  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
+  \param [in]    op1  Value to rotate
+  \param [in]    op2  Number of Bits to rotate
+  \return               Rotated value
+ */
+__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
+{
+  op2 %= 32U;
+  if (op2 == 0U)
+  {
+    return op1;
+  }
+  return (op1 >> op2) | (op1 << (32U - op2));
+}
+
+
+/**
+  \brief   Breakpoint
+  \details Causes the processor to enter Debug state.
+           Debug tools can use this to investigate system state when the instruction at a particular address is reached.
+  \param [in]    value  is ignored by the processor.
+                 If required, a debugger can use it to store additional information about the breakpoint.
+ */
+#define __BKPT(value)     __ASM volatile ("bkpt "#value)
+
+
+/**
+  \brief   Reverse bit order of value
+  \details Reverses the bit order of the given value.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __RBIT            __builtin_arm_rbit
+
+/**
+  \brief   Count leading zeros
+  \details Counts the number of leading zeros of a data value.
+  \param [in]  value  Value to count the leading zeros
+  \return             number of leading zeros in value
+ */
+__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
+{
+  /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
+     __builtin_clz(0) is undefined behaviour, so handle this case specially.
+     This guarantees ARM-compatible results if happening to compile on a non-ARM
+     target, and ensures the compiler doesn't decide to activate any
+     optimisations using the logic "value was passed to __builtin_clz, so it
+     is non-zero".
+     ARM Compiler 6.10 and possibly earlier will optimise this test away, leaving a
+     single CLZ instruction.
+   */
+  if (value == 0U)
+  {
+    return 32U;
+  }
+  return __builtin_clz(value);
+}
+
+
+#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+/**
+  \brief   LDR Exclusive (8 bit)
+  \details Executes a exclusive LDR instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+#define __LDREXB        (uint8_t)__builtin_arm_ldrex
+
+
+/**
+  \brief   LDR Exclusive (16 bit)
+  \details Executes a exclusive LDR instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+#define __LDREXH        (uint16_t)__builtin_arm_ldrex
+
+
+/**
+  \brief   LDR Exclusive (32 bit)
+  \details Executes a exclusive LDR instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+#define __LDREXW        (uint32_t)__builtin_arm_ldrex
+
+
+/**
+  \brief   STR Exclusive (8 bit)
+  \details Executes a exclusive STR instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define __STREXB        (uint32_t)__builtin_arm_strex
+
+
+/**
+  \brief   STR Exclusive (16 bit)
+  \details Executes a exclusive STR instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define __STREXH        (uint32_t)__builtin_arm_strex
+
+
+/**
+  \brief   STR Exclusive (32 bit)
+  \details Executes a exclusive STR instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define __STREXW        (uint32_t)__builtin_arm_strex
+
+
+/**
+  \brief   Remove the exclusive lock
+  \details Removes the exclusive lock which is created by LDREX.
+ */
+#define __CLREX             __builtin_arm_clrex
+
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
+
+
+#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
+
+/**
+  \brief   Signed Saturate
+  \details Saturates a signed value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (1..32)
+  \return             Saturated value
+ */
+#define __SSAT             __builtin_arm_ssat
+
+
+/**
+  \brief   Unsigned Saturate
+  \details Saturates an unsigned value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (0..31)
+  \return             Saturated value
+ */
+#define __USAT             __builtin_arm_usat
+
+
+/**
+  \brief   Rotate Right with Extend (32 bit)
+  \details Moves each bit of a bitstring right by one bit.
+           The carry input is shifted in at the left end of the bitstring.
+  \param [in]    value  Value to rotate
+  \return               Rotated value
+ */
+__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
+{
+  uint32_t result;
+
+  __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return(result);
+}
+
+
+/**
+  \brief   LDRT Unprivileged (8 bit)
+  \details Executes a Unprivileged LDRT instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return ((uint8_t) result);    /* Add explicit type cast here */
+}
+
+
+/**
+  \brief   LDRT Unprivileged (16 bit)
+  \details Executes a Unprivileged LDRT instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return ((uint16_t) result);    /* Add explicit type cast here */
+}
+
+
+/**
+  \brief   LDRT Unprivileged (32 bit)
+  \details Executes a Unprivileged LDRT instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return(result);
+}
+
+
+/**
+  \brief   STRT Unprivileged (8 bit)
+  \details Executes a Unprivileged STRT instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
+{
+  __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   STRT Unprivileged (16 bit)
+  \details Executes a Unprivileged STRT instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
+{
+  __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   STRT Unprivileged (32 bit)
+  \details Executes a Unprivileged STRT instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
+{
+  __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
+}
+
+#else  /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
+
+/**
+  \brief   Signed Saturate
+  \details Saturates a signed value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (1..32)
+  \return             Saturated value
+ */
+__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
+{
+  if ((sat >= 1U) && (sat <= 32U))
+  {
+    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
+    const int32_t min = -1 - max ;
+    if (val > max)
+    {
+      return max;
+    }
+    else if (val < min)
+    {
+      return min;
+    }
+  }
+  return val;
+}
+
+/**
+  \brief   Unsigned Saturate
+  \details Saturates an unsigned value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (0..31)
+  \return             Saturated value
+ */
+__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
+{
+  if (sat <= 31U)
+  {
+    const uint32_t max = ((1U << sat) - 1U);
+    if (val > (int32_t)max)
+    {
+      return max;
+    }
+    else if (val < 0)
+    {
+      return 0U;
+    }
+  }
+  return (uint32_t)val;
+}
+
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
+
+
+#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+/**
+  \brief   Load-Acquire (8 bit)
+  \details Executes a LDAB instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return ((uint8_t) result);
+}
+
+
+/**
+  \brief   Load-Acquire (16 bit)
+  \details Executes a LDAH instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return ((uint16_t) result);
+}
+
+
+/**
+  \brief   Load-Acquire (32 bit)
+  \details Executes a LDA instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return(result);
+}
+
+
+/**
+  \brief   Store-Release (8 bit)
+  \details Executes a STLB instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
+{
+  __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   Store-Release (16 bit)
+  \details Executes a STLH instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
+{
+  __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   Store-Release (32 bit)
+  \details Executes a STL instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
+{
+  __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   Load-Acquire Exclusive (8 bit)
+  \details Executes a LDAB exclusive instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+#define     __LDAEXB                 (uint8_t)__builtin_arm_ldaex
+
+
+/**
+  \brief   Load-Acquire Exclusive (16 bit)
+  \details Executes a LDAH exclusive instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+#define     __LDAEXH                 (uint16_t)__builtin_arm_ldaex
+
+
+/**
+  \brief   Load-Acquire Exclusive (32 bit)
+  \details Executes a LDA exclusive instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+#define     __LDAEX                  (uint32_t)__builtin_arm_ldaex
+
+
+/**
+  \brief   Store-Release Exclusive (8 bit)
+  \details Executes a STLB exclusive instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define     __STLEXB                 (uint32_t)__builtin_arm_stlex
+
+
+/**
+  \brief   Store-Release Exclusive (16 bit)
+  \details Executes a STLH exclusive instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define     __STLEXH                 (uint32_t)__builtin_arm_stlex
+
+
+/**
+  \brief   Store-Release Exclusive (32 bit)
+  \details Executes a STL exclusive instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define     __STLEX                  (uint32_t)__builtin_arm_stlex
+
+#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
+
+/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
+
+
+/* ###################  Compiler specific Intrinsics  ########################### */
+/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
+  Access to dedicated SIMD instructions
+  @{
+*/
+
+#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
+
+__STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+
+__STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+
+__STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+#define __SSAT16(ARG1,ARG2) \
+({                          \
+  int32_t __RES, __ARG1 = (ARG1); \
+  __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
+  __RES; \
+ })
+
+#define __USAT16(ARG1,ARG2) \
+({                          \
+  uint32_t __RES, __ARG1 = (ARG1); \
+  __ASM ("usat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
+  __RES; \
+ })
+
+__STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
+{
+  uint32_t result;
+
+  __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
+{
+  uint32_t result;
+
+  __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMUAD  (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMUSD  (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint32_t __SEL  (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE  int32_t __QADD( int32_t op1,  int32_t op2)
+{
+  int32_t result;
+
+  __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE  int32_t __QSUB( int32_t op1,  int32_t op2)
+{
+  int32_t result;
+
+  __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \
+                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )
+
+#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \
+                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )
+
+__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
+{
+  int32_t result;
+
+  __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r"  (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+#endif /* (__ARM_FEATURE_DSP == 1) */
+/*@} end of group CMSIS_SIMD_intrinsics */
+
+
+#endif /* __CMSIS_ARMCLANG_H */
diff --git a/Core/Include/cmsis_compiler.h b/Core/Include/cmsis_compiler.h
index 94212eb..adbf296 100644
--- a/Core/Include/cmsis_compiler.h
+++ b/Core/Include/cmsis_compiler.h
@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     cmsis_compiler.h
  * @brief    CMSIS compiler generic header file
- * @version  V5.0.4
- * @date     10. January 2018
+ * @version  V5.1.0
+ * @date     09. October 2018
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -35,9 +35,15 @@
 
 
 /*
- * Arm Compiler 6 (armclang)
+ * Arm Compiler 6.6 LTM (armclang)
  */
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
+  #include "cmsis_armclang_ltm.h"
+
+  /*
+ * Arm Compiler above 6.10.1 (armclang)
+ */
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
   #include "cmsis_armclang.h"
 
 
@@ -115,8 +121,11 @@
     #define __ALIGNED(x)                           __attribute__((aligned(x)))
   #endif
   #ifndef   __RESTRICT
-    #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
-    #define __RESTRICT
+    #define __RESTRICT                             __restrict
+  #endif
+  #ifndef   __COMPILER_BARRIER
+    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
+    #define __COMPILER_BARRIER()                   (void)0
   #endif
 
 
@@ -187,6 +196,10 @@
     #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
     #define __RESTRICT
   #endif
+  #ifndef   __COMPILER_BARRIER
+    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
+    #define __COMPILER_BARRIER()                   (void)0
+  #endif
 
 
 /*
@@ -255,6 +268,10 @@
     #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
     #define __RESTRICT
   #endif
+  #ifndef   __COMPILER_BARRIER
+    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
+    #define __COMPILER_BARRIER()                   (void)0
+  #endif
 
 
 #else
diff --git a/Core/Include/cmsis_gcc.h b/Core/Include/cmsis_gcc.h
index 2d9db15..3ddcc58 100644
--- a/Core/Include/cmsis_gcc.h
+++ b/Core/Include/cmsis_gcc.h
@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     cmsis_gcc.h
  * @brief    CMSIS compiler GCC header file
- * @version  V5.0.4
- * @date     09. April 2018
+ * @version  V5.2.0
+ * @date     08. May 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -113,7 +113,74 @@
 #ifndef   __RESTRICT
   #define __RESTRICT                             __restrict
 #endif
+#ifndef   __COMPILER_BARRIER
+  #define __COMPILER_BARRIER()                   __ASM volatile("":::"memory")
+#endif
 
+/* #########################  Startup and Lowlevel Init  ######################## */
+
+#ifndef __PROGRAM_START
+
+/**
+  \brief   Initializes data and bss sections
+  \details This default implementations initialized all data and additional bss
+           sections relying on .copy.table and .zero.table specified properly
+           in the used linker script.
+  
+ */
+__STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
+{
+  extern void _start(void) __NO_RETURN;
+  
+  typedef struct {
+    uint32_t const* src;
+    uint32_t* dest;
+    uint32_t  wlen;
+  } __copy_table_t;
+  
+  typedef struct {
+    uint32_t* dest;
+    uint32_t  wlen;
+  } __zero_table_t;
+  
+  extern const __copy_table_t __copy_table_start__;
+  extern const __copy_table_t __copy_table_end__;
+  extern const __zero_table_t __zero_table_start__;
+  extern const __zero_table_t __zero_table_end__;
+
+  for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable) {
+    for(uint32_t i=0u; i<pTable->wlen; ++i) {
+      pTable->dest[i] = pTable->src[i];
+    }
+  }
+ 
+  for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable) {
+    for(uint32_t i=0u; i<pTable->wlen; ++i) {
+      pTable->dest[i] = 0u;
+    }
+  }
+ 
+  _start();
+}
+  
+#define __PROGRAM_START           __cmsis_start
+#endif
+
+#ifndef __INITIAL_SP
+#define __INITIAL_SP              __StackTop
+#endif
+
+#ifndef __STACK_LIMIT
+#define __STACK_LIMIT             __StackLimit
+#endif
+
+#ifndef __VECTOR_TABLE
+#define __VECTOR_TABLE            __Vectors
+#endif
+
+#ifndef __VECTOR_TABLE_ATTRIBUTE
+#define __VECTOR_TABLE_ATTRIBUTE  __attribute((used, section(".vectors")))
+#endif
 
 /* ###########################  Core Function Access  ########################### */
 /** \ingroup  CMSIS_Core_FunctionInterface
@@ -1008,7 +1075,23 @@
   \param [in]  value  Value to count the leading zeros
   \return             number of leading zeros in value
  */
-#define __CLZ             (uint8_t)__builtin_clz
+__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
+{
+  /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
+     __builtin_clz(0) is undefined behaviour, so handle this case specially.
+     This guarantees ARM-compatible results if happening to compile on a non-ARM
+     target, and ensures the compiler doesn't decide to activate any
+     optimisations using the logic "value was passed to __builtin_clz, so it
+     is non-zero".
+     ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a
+     single CLZ instruction.
+   */
+  if (value == 0U)
+  {
+    return 32U;
+  }
+  return __builtin_clz(value);
+}
 
 
 #if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
diff --git a/Core/Include/cmsis_iccarm.h b/Core/Include/cmsis_iccarm.h
index 11c4af0..12d68fd 100644
--- a/Core/Include/cmsis_iccarm.h
+++ b/Core/Include/cmsis_iccarm.h
@@ -1,13 +1,14 @@
 /**************************************************************************//**
  * @file     cmsis_iccarm.h
  * @brief    CMSIS compiler ICCARM (IAR Compiler for Arm) header file
- * @version  V5.0.7
- * @date     19. June 2018
+ * @version  V5.1.0
+ * @date     08. May 2019
  ******************************************************************************/
 
 //------------------------------------------------------------------------------
 //
-// Copyright (c) 2017-2018 IAR Systems
+// Copyright (c) 2017-2019 IAR Systems
+// Copyright (c) 2017-2019 Arm Limited. All rights reserved. 
 //
 // Licensed under the Apache License, Version 2.0 (the "License")
 // you may not use this file except in compliance with the License.
@@ -110,6 +111,10 @@
   #define __ASM __asm
 #endif
 
+#ifndef   __COMPILER_BARRIER
+  #define __COMPILER_BARRIER() __ASM volatile("":::"memory")
+#endif
+
 #ifndef __INLINE
   #define __INLINE inline
 #endif
@@ -150,7 +155,12 @@
 #endif
 
 #ifndef   __RESTRICT
-  #define __RESTRICT            __restrict
+  #if __ICCARM_V8
+    #define __RESTRICT            __restrict
+  #else
+    /* Needs IAR language extensions */
+    #define __RESTRICT            restrict
+  #endif
 #endif
 
 #ifndef   __STATIC_INLINE
@@ -234,6 +244,25 @@
   #endif
 #endif
 
+#ifndef __PROGRAM_START
+#define __PROGRAM_START           __iar_program_start
+#endif
+
+#ifndef __INITIAL_SP
+#define __INITIAL_SP              CSTACK$$Limit
+#endif
+
+#ifndef __STACK_LIMIT
+#define __STACK_LIMIT             CSTACK$$Base
+#endif
+
+#ifndef __VECTOR_TABLE
+#define __VECTOR_TABLE            __vector_table
+#endif
+
+#ifndef __VECTOR_TABLE_ATTRIBUTE
+#define __VECTOR_TABLE_ATTRIBUTE  @".intvec"
+#endif
 
 #ifndef __ICCARM_INTRINSICS_VERSION__
   #define __ICCARM_INTRINSICS_VERSION__  0
diff --git a/Core/Include/cmsis_version.h b/Core/Include/cmsis_version.h
index 660f612..f2e2746 100644
--- a/Core/Include/cmsis_version.h
+++ b/Core/Include/cmsis_version.h
@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     cmsis_version.h
  * @brief    CMSIS Core(M) Version definitions
- * @version  V5.0.2
- * @date     19. April 2017
+ * @version  V5.0.3
+ * @date     24. June 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
+ * Copyright (c) 2009-2019 ARM Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -33,7 +33,7 @@
 
 /*  CMSIS Version definitions */
 #define __CM_CMSIS_VERSION_MAIN  ( 5U)                                      /*!< [31:16] CMSIS Core(M) main version */
-#define __CM_CMSIS_VERSION_SUB   ( 1U)                                      /*!< [15:0]  CMSIS Core(M) sub version */
+#define __CM_CMSIS_VERSION_SUB   ( 3U)                                      /*!< [15:0]  CMSIS Core(M) sub version */
 #define __CM_CMSIS_VERSION       ((__CM_CMSIS_VERSION_MAIN << 16U) | \
                                    __CM_CMSIS_VERSION_SUB           )       /*!< CMSIS Core(M) version number */
 #endif
diff --git a/Core/Include/core_armv81mml.h b/Core/Include/core_armv81mml.h
new file mode 100644
index 0000000..8441e57
--- /dev/null
+++ b/Core/Include/core_armv81mml.h
@@ -0,0 +1,2968 @@
+/**************************************************************************//**
+ * @file     core_armv81mml.h
+ * @brief    CMSIS Armv8.1-M Mainline Core Peripheral Access Layer Header File
+ * @version  V1.0.0
+ * @date     15. March 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2018-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CORE_ARMV81MML_H_GENERIC
+#define __CORE_ARMV81MML_H_GENERIC
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_ARMV81MML
+  @{
+ */
+
+#include "cmsis_version.h"
+ 
+#define __ARM_ARCH_8M_MAIN__    1  // patching for now
+/*  CMSIS ARMV81MML definitions */
+#define __ARMv81MML_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __ARMv81MML_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __ARMv81MML_CMSIS_VERSION       ((__ARMv81MML_CMSIS_VERSION_MAIN << 16U) | \
+                                         __ARMv81MML_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                     (81U)                                       /*!< Cortex-M Core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
+*/
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U    
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+  
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U    
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+  
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U    
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+  
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U    
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+  
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_ARMV81MML_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_ARMV81MML_H_DEPENDANT
+#define __CORE_ARMV81MML_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __ARMv81MML_REV
+    #define __ARMv81MML_REV               0x0000U
+    #warning "__ARMv81MML_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __FPU_PRESENT
+    #define __FPU_PRESENT             0U
+    #warning "__FPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __SAUREGION_PRESENT
+    #define __SAUREGION_PRESENT       0U
+    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __DSP_PRESENT
+    #define __DSP_PRESENT             0U
+    #warning "__DSP_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          3U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group ARMv81MML */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+  - Core SAU Register
+  - Core FPU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
+#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
+
+#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
+#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
+#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
+
+#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */
+#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
+#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
+    uint32_t FPCA:1;                     /*!< bit:      2  Floating-point context active */
+    uint32_t SFPA:1;                     /*!< bit:      3  Secure floating-point active */
+    uint32_t _reserved1:28;              /*!< bit:  4..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SFPA_Pos                    3U                                            /*!< CONTROL: SFPA Position */
+#define CONTROL_SFPA_Msk                   (1UL << CONTROL_SFPA_Pos)                      /*!< CONTROL: SFPA Mask */
+
+#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
+#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
+
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[16U];
+  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RSERVED1[16U];
+  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[16U];
+  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[16U];
+  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[16U];
+  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
+        uint32_t RESERVED5[16U];
+  __IOM uint8_t  IPR[496U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        uint32_t RESERVED6[580U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
+}  NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+  __IM  uint32_t ID_ADR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+  __IM  uint32_t ID_MMFR[4U];            /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+  __IM  uint32_t ID_ISAR[6U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
+  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
+  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
+  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
+  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
+  __IOM uint32_t NSACR;                  /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */
+        uint32_t RESERVED3[92U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
+        uint32_t RESERVED4[15U];
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
+        uint32_t RESERVED5[1U];
+  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
+        uint32_t RESERVED6[1U];
+  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
+  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
+  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
+  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
+  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
+  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
+  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
+  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
+        uint32_t RESERVED7[6U];
+  __IOM uint32_t ITCMCR;                 /*!< Offset: 0x290 (R/W)  Instruction Tightly-Coupled Memory Control Register */
+  __IOM uint32_t DTCMCR;                 /*!< Offset: 0x294 (R/W)  Data Tightly-Coupled Memory Control Registers */
+  __IOM uint32_t AHBPCR;                 /*!< Offset: 0x298 (R/W)  AHBP Control Register */
+  __IOM uint32_t CACR;                   /*!< Offset: 0x29C (R/W)  L1 Cache Control Register */
+  __IOM uint32_t AHBSCR;                 /*!< Offset: 0x2A0 (R/W)  AHB Slave Control Register */
+        uint32_t RESERVED8[1U];
+  __IOM uint32_t ABFSR;                  /*!< Offset: 0x2A8 (R/W)  Auxiliary Bus Fault Status Register */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
+#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
+
+#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
+#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
+
+#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
+#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
+#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
+#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
+
+#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
+#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
+#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
+#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
+#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
+
+#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
+#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
+
+#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
+#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
+
+#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
+#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
+#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTPENDED_Pos    20U                                            /*!< SCB SHCSR: SECUREFAULTPENDED Position */
+#define SCB_SHCSR_SECUREFAULTPENDED_Msk    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos)       /*!< SCB SHCSR: SECUREFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTENA_Pos       19U                                            /*!< SCB SHCSR: SECUREFAULTENA Position */
+#define SCB_SHCSR_SECUREFAULTENA_Msk       (1UL << SCB_SHCSR_SECUREFAULTENA_Pos)          /*!< SCB SHCSR: SECUREFAULTENA Mask */
+
+#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
+#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
+
+#define SCB_SHCSR_SECUREFAULTACT_Pos        4U                                            /*!< SCB SHCSR: SECUREFAULTACT Position */
+#define SCB_SHCSR_SECUREFAULTACT_Msk       (1UL << SCB_SHCSR_SECUREFAULTACT_Pos)          /*!< SCB SHCSR: SECUREFAULTACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
+#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */
+#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
+
+#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
+#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
+
+#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_STKOF_Pos                (SCB_CFSR_USGFAULTSR_Pos + 4U)                  /*!< SCB CFSR (UFSR): STKOF Position */
+#define SCB_CFSR_STKOF_Msk                (1UL << SCB_CFSR_STKOF_Pos)                     /*!< SCB CFSR (UFSR): STKOF Mask */
+
+#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
+
+/* SCB Non-Secure Access Control Register Definitions */
+#define SCB_NSACR_CP11_Pos                 11U                                            /*!< SCB NSACR: CP11 Position */
+#define SCB_NSACR_CP11_Msk                 (1UL << SCB_NSACR_CP11_Pos)                    /*!< SCB NSACR: CP11 Mask */
+
+#define SCB_NSACR_CP10_Pos                 10U                                            /*!< SCB NSACR: CP10 Position */
+#define SCB_NSACR_CP10_Msk                 (1UL << SCB_NSACR_CP10_Pos)                    /*!< SCB NSACR: CP10 Mask */
+
+#define SCB_NSACR_CPn_Pos                   0U                                            /*!< SCB NSACR: CPn Position */
+#define SCB_NSACR_CPn_Msk                  (1UL /*<< SCB_NSACR_CPn_Pos*/)                 /*!< SCB NSACR: CPn Mask */
+
+/* SCB Cache Level ID Register Definitions */
+#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
+#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
+
+#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
+#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
+
+/* SCB Cache Type Register Definitions */
+#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
+#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
+
+#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
+#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
+
+#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
+#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
+
+#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
+#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
+
+#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
+#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
+
+/* SCB Cache Size ID Register Definitions */
+#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
+#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
+
+#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
+#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
+
+#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
+#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
+
+#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
+#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
+
+#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
+#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
+
+#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
+#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
+
+#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
+#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
+
+/* SCB Cache Size Selection Register Definitions */
+#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
+#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
+
+#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
+#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
+
+/* SCB Software Triggered Interrupt Register Definitions */
+#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
+#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
+
+/* SCB D-Cache Invalidate by Set-way Register Definitions */
+#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
+#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
+
+#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
+#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
+
+/* SCB D-Cache Clean by Set-way Register Definitions */
+#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
+#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
+
+#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
+#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
+
+/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
+#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
+#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
+
+#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
+#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
+
+/* Instruction Tightly-Coupled Memory Control Register Definitions */
+#define SCB_ITCMCR_SZ_Pos                   3U                                            /*!< SCB ITCMCR: SZ Position */
+#define SCB_ITCMCR_SZ_Msk                  (0xFUL << SCB_ITCMCR_SZ_Pos)                   /*!< SCB ITCMCR: SZ Mask */
+
+#define SCB_ITCMCR_RETEN_Pos                2U                                            /*!< SCB ITCMCR: RETEN Position */
+#define SCB_ITCMCR_RETEN_Msk               (1UL << SCB_ITCMCR_RETEN_Pos)                  /*!< SCB ITCMCR: RETEN Mask */
+
+#define SCB_ITCMCR_RMW_Pos                  1U                                            /*!< SCB ITCMCR: RMW Position */
+#define SCB_ITCMCR_RMW_Msk                 (1UL << SCB_ITCMCR_RMW_Pos)                    /*!< SCB ITCMCR: RMW Mask */
+
+#define SCB_ITCMCR_EN_Pos                   0U                                            /*!< SCB ITCMCR: EN Position */
+#define SCB_ITCMCR_EN_Msk                  (1UL /*<< SCB_ITCMCR_EN_Pos*/)                 /*!< SCB ITCMCR: EN Mask */
+
+/* Data Tightly-Coupled Memory Control Register Definitions */
+#define SCB_DTCMCR_SZ_Pos                   3U                                            /*!< SCB DTCMCR: SZ Position */
+#define SCB_DTCMCR_SZ_Msk                  (0xFUL << SCB_DTCMCR_SZ_Pos)                   /*!< SCB DTCMCR: SZ Mask */
+
+#define SCB_DTCMCR_RETEN_Pos                2U                                            /*!< SCB DTCMCR: RETEN Position */
+#define SCB_DTCMCR_RETEN_Msk               (1UL << SCB_DTCMCR_RETEN_Pos)                   /*!< SCB DTCMCR: RETEN Mask */
+
+#define SCB_DTCMCR_RMW_Pos                  1U                                            /*!< SCB DTCMCR: RMW Position */
+#define SCB_DTCMCR_RMW_Msk                 (1UL << SCB_DTCMCR_RMW_Pos)                    /*!< SCB DTCMCR: RMW Mask */
+
+#define SCB_DTCMCR_EN_Pos                   0U                                            /*!< SCB DTCMCR: EN Position */
+#define SCB_DTCMCR_EN_Msk                  (1UL /*<< SCB_DTCMCR_EN_Pos*/)                 /*!< SCB DTCMCR: EN Mask */
+
+/* AHBP Control Register Definitions */
+#define SCB_AHBPCR_SZ_Pos                   1U                                            /*!< SCB AHBPCR: SZ Position */
+#define SCB_AHBPCR_SZ_Msk                  (7UL << SCB_AHBPCR_SZ_Pos)                     /*!< SCB AHBPCR: SZ Mask */
+
+#define SCB_AHBPCR_EN_Pos                   0U                                            /*!< SCB AHBPCR: EN Position */
+#define SCB_AHBPCR_EN_Msk                  (1UL /*<< SCB_AHBPCR_EN_Pos*/)                 /*!< SCB AHBPCR: EN Mask */
+
+/* L1 Cache Control Register Definitions */
+#define SCB_CACR_FORCEWT_Pos                2U                                            /*!< SCB CACR: FORCEWT Position */
+#define SCB_CACR_FORCEWT_Msk               (1UL << SCB_CACR_FORCEWT_Pos)                  /*!< SCB CACR: FORCEWT Mask */
+
+#define SCB_CACR_ECCEN_Pos                  1U                                            /*!< SCB CACR: ECCEN Position */
+#define SCB_CACR_ECCEN_Msk                 (1UL << SCB_CACR_ECCEN_Pos)                    /*!< SCB CACR: ECCEN Mask */
+
+#define SCB_CACR_SIWT_Pos                   0U                                            /*!< SCB CACR: SIWT Position */
+#define SCB_CACR_SIWT_Msk                  (1UL /*<< SCB_CACR_SIWT_Pos*/)                 /*!< SCB CACR: SIWT Mask */
+
+/* AHBS Control Register Definitions */
+#define SCB_AHBSCR_INITCOUNT_Pos           11U                                            /*!< SCB AHBSCR: INITCOUNT Position */
+#define SCB_AHBSCR_INITCOUNT_Msk           (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos)           /*!< SCB AHBSCR: INITCOUNT Mask */
+
+#define SCB_AHBSCR_TPRI_Pos                 2U                                            /*!< SCB AHBSCR: TPRI Position */
+#define SCB_AHBSCR_TPRI_Msk                (0x1FFUL << SCB_AHBPCR_TPRI_Pos)               /*!< SCB AHBSCR: TPRI Mask */
+
+#define SCB_AHBSCR_CTL_Pos                  0U                                            /*!< SCB AHBSCR: CTL Position*/
+#define SCB_AHBSCR_CTL_Msk                 (3UL /*<< SCB_AHBPCR_CTL_Pos*/)                /*!< SCB AHBSCR: CTL Mask */
+
+/* Auxiliary Bus Fault Status Register Definitions */
+#define SCB_ABFSR_AXIMTYPE_Pos              8U                                            /*!< SCB ABFSR: AXIMTYPE Position*/
+#define SCB_ABFSR_AXIMTYPE_Msk             (3UL << SCB_ABFSR_AXIMTYPE_Pos)                /*!< SCB ABFSR: AXIMTYPE Mask */
+
+#define SCB_ABFSR_EPPB_Pos                  4U                                            /*!< SCB ABFSR: EPPB Position*/
+#define SCB_ABFSR_EPPB_Msk                 (1UL << SCB_ABFSR_EPPB_Pos)                    /*!< SCB ABFSR: EPPB Mask */
+
+#define SCB_ABFSR_AXIM_Pos                  3U                                            /*!< SCB ABFSR: AXIM Position*/
+#define SCB_ABFSR_AXIM_Msk                 (1UL << SCB_ABFSR_AXIM_Pos)                    /*!< SCB ABFSR: AXIM Mask */
+
+#define SCB_ABFSR_AHBP_Pos                  2U                                            /*!< SCB ABFSR: AHBP Position*/
+#define SCB_ABFSR_AHBP_Msk                 (1UL << SCB_ABFSR_AHBP_Pos)                    /*!< SCB ABFSR: AHBP Mask */
+
+#define SCB_ABFSR_DTCM_Pos                  1U                                            /*!< SCB ABFSR: DTCM Position*/
+#define SCB_ABFSR_DTCM_Msk                 (1UL << SCB_ABFSR_DTCM_Pos)                    /*!< SCB ABFSR: DTCM Mask */
+
+#define SCB_ABFSR_ITCM_Pos                  0U                                            /*!< SCB ABFSR: ITCM Position*/
+#define SCB_ABFSR_ITCM_Msk                 (1UL /*<< SCB_ABFSR_ITCM_Pos*/)                /*!< SCB ABFSR: ITCM Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
+  __IOM uint32_t CPPWR;                  /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+  __OM  union
+  {
+    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+        uint32_t RESERVED0[864U];
+  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        uint32_t RESERVED1[15U];
+  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        uint32_t RESERVED2[15U];
+  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        uint32_t RESERVED3[29U];
+  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
+  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
+  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
+        uint32_t RESERVED4[43U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        uint32_t RESERVED5[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */
+        uint32_t RESERVED6[4U];
+  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+} ITM_Type;
+
+/* ITM Stimulus Port Register Definitions */
+#define ITM_STIM_DISABLED_Pos               1U                                            /*!< ITM STIM: DISABLED Position */
+#define ITM_STIM_DISABLED_Msk              (0x1UL << ITM_STIM_DISABLED_Pos)               /*!< ITM STIM: DISABLED Mask */
+
+#define ITM_STIM_FIFOREADY_Pos              0U                                            /*!< ITM STIM: FIFOREADY Position */
+#define ITM_STIM_FIFOREADY_Msk             (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/)          /*!< ITM STIM: FIFOREADY Mask */
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/)            /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TRACEBUSID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TRACEBUSID_Msk             (0x7FUL << ITM_TCR_TRACEBUSID_Pos)             /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPRESCALE_Pos              8U                                            /*!< ITM TCR: TSPRESCALE Position */
+#define ITM_TCR_TSPRESCALE_Msk             (3UL << ITM_TCR_TSPRESCALE_Pos)                /*!< ITM TCR: TSPRESCALE Mask */
+
+#define ITM_TCR_STALLENA_Pos                5U                                            /*!< ITM TCR: STALLENA Position */
+#define ITM_TCR_STALLENA_Msk               (1UL << ITM_TCR_STALLENA_Pos)                  /*!< ITM TCR: STALLENA Mask */
+
+#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Integration Write Register Definitions */
+#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */
+#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
+
+/* ITM Integration Read Register Definitions */
+#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */
+#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
+
+/* ITM Integration Mode Control Register Definitions */
+#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */
+#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
+  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
+  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+        uint32_t RESERVED3[1U];
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+        uint32_t RESERVED5[1U];
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED6[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+        uint32_t RESERVED7[1U];
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+        uint32_t RESERVED8[1U];
+  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
+        uint32_t RESERVED9[1U];
+  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
+        uint32_t RESERVED10[1U];
+  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
+        uint32_t RESERVED11[1U];
+  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
+        uint32_t RESERVED12[1U];
+  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
+        uint32_t RESERVED13[1U];
+  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
+        uint32_t RESERVED14[1U];
+  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
+        uint32_t RESERVED15[1U];
+  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
+        uint32_t RESERVED16[1U];
+  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
+        uint32_t RESERVED17[1U];
+  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
+        uint32_t RESERVED18[1U];
+  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
+        uint32_t RESERVED19[1U];
+  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
+        uint32_t RESERVED20[1U];
+  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
+        uint32_t RESERVED21[1U];
+  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
+        uint32_t RESERVED22[1U];
+  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
+        uint32_t RESERVED23[1U];
+  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
+        uint32_t RESERVED24[1U];
+  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
+        uint32_t RESERVED25[1U];
+  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
+        uint32_t RESERVED26[1U];
+  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
+        uint32_t RESERVED27[1U];
+  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
+        uint32_t RESERVED28[1U];
+  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
+        uint32_t RESERVED29[1U];
+  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
+        uint32_t RESERVED30[1U];
+  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
+        uint32_t RESERVED31[1U];
+  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
+        uint32_t RESERVED32[934U];
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
+        uint32_t RESERVED33[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  Device Architecture Register */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCDISS_Pos               23U                                         /*!< DWT CTRL: CYCDISS Position */
+#define DWT_CTRL_CYCDISS_Msk               (0x1UL << DWT_CTRL_CYCDISS_Pos)             /*!< DWT CTRL: CYCDISS Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
+#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
+
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
+#define DWT_FUNCTION_ACTION_Msk            (0x1UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
+
+#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
+#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Sizes Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Sizes Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
+        uint32_t RESERVED3[759U];
+  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER */
+  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
+  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
+        uint32_t RESERVED4[1U];
+  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
+  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
+  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+        uint32_t RESERVED5[39U];
+  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+        uint32_t RESERVED7[8U];
+  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI TRIGGER Register Definitions */
+#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
+
+/* TPI Integration ETM Data Register Definitions (FIFO0) */
+#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
+#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+
+#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
+#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
+
+#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
+#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+
+#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
+#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
+
+#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */
+#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
+
+#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */
+#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
+
+#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */
+#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */
+
+/* TPI ITATBCTR2 Register Definitions */
+#define TPI_ITATBCTR2_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR2: ATREADY Position */
+#define TPI_ITATBCTR2_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/)    /*!< TPI ITATBCTR2: ATREADY Mask */
+
+/* TPI Integration ITM Data Register Definitions (FIFO1) */
+#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
+#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+
+#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
+#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
+
+#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
+#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+
+#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
+#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
+
+#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */
+#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
+
+#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */
+#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
+
+#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */
+#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */
+
+/* TPI ITATBCTR0 Register Definitions */
+#define TPI_ITATBCTR0_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR0: ATREADY Position */
+#define TPI_ITATBCTR0_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/)    /*!< TPI ITATBCTR0: ATREADY Mask */
+
+/* TPI Integration Mode Control Register Definitions */
+#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk                (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */
+#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
+
+#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */
+#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
+
+#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_MajorType_Pos           4U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+#define TPI_DEVTYPE_SubType_Pos             0U                                         /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
+  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */
+  __IOM uint32_t RLAR_A1;                /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */
+  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */
+  __IOM uint32_t RLAR_A2;                /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */
+  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */
+  __IOM uint32_t RLAR_A3;                /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */
+        uint32_t RESERVED0[1];
+  union {
+  __IOM uint32_t MAIR[2];
+  struct {
+  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
+  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
+  };
+  };
+} MPU_Type;
+
+#define MPU_TYPE_RALIASES                  4U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */
+#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
+
+#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
+#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
+
+#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
+#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
+
+#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
+#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
+
+/* MPU Region Limit Address Register Definitions */
+#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
+#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
+
+#define MPU_RLAR_PXN_Pos                    4U                                            /*!< MPU RLAR: PXN Position */
+#define MPU_RLAR_PXN_Msk                   (0x1UL << MPU_RLAR_PXN_Pos)                    /*!< MPU RLAR: PXN Mask */
+
+#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
+#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
+
+#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: Region enable bit Position */
+#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: Region enable bit Disable Mask */
+
+/* MPU Memory Attribute Indirection Register 0 Definitions */
+#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
+#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
+
+#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
+#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
+
+#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
+#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
+
+#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
+#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
+
+/* MPU Memory Attribute Indirection Register 1 Definitions */
+#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
+#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
+
+#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
+#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
+
+#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
+#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
+
+#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
+#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
+  \brief    Type definitions for the Security Attribution Unit (SAU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Security Attribution Unit (SAU).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
+#else
+        uint32_t RESERVED0[3];
+#endif
+  __IOM uint32_t SFSR;                   /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */
+  __IOM uint32_t SFAR;                   /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */
+} SAU_Type;
+
+/* SAU Control Register Definitions */
+#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
+#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
+
+#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
+#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
+
+/* SAU Type Register Definitions */
+#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
+#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
+
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+/* SAU Region Number Register Definitions */
+#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
+#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
+
+/* SAU Region Base Address Register Definitions */
+#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
+#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
+
+/* SAU Region Limit Address Register Definitions */
+#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
+#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
+
+#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
+#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
+
+#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
+#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
+
+#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
+
+/* Secure Fault Status Register Definitions */
+#define SAU_SFSR_LSERR_Pos                  7U                                            /*!< SAU SFSR: LSERR Position */
+#define SAU_SFSR_LSERR_Msk                 (1UL << SAU_SFSR_LSERR_Pos)                    /*!< SAU SFSR: LSERR Mask */
+
+#define SAU_SFSR_SFARVALID_Pos              6U                                            /*!< SAU SFSR: SFARVALID Position */
+#define SAU_SFSR_SFARVALID_Msk             (1UL << SAU_SFSR_SFARVALID_Pos)                /*!< SAU SFSR: SFARVALID Mask */
+
+#define SAU_SFSR_LSPERR_Pos                 5U                                            /*!< SAU SFSR: LSPERR Position */
+#define SAU_SFSR_LSPERR_Msk                (1UL << SAU_SFSR_LSPERR_Pos)                   /*!< SAU SFSR: LSPERR Mask */
+
+#define SAU_SFSR_INVTRAN_Pos                4U                                            /*!< SAU SFSR: INVTRAN Position */
+#define SAU_SFSR_INVTRAN_Msk               (1UL << SAU_SFSR_INVTRAN_Pos)                  /*!< SAU SFSR: INVTRAN Mask */
+
+#define SAU_SFSR_AUVIOL_Pos                 3U                                            /*!< SAU SFSR: AUVIOL Position */
+#define SAU_SFSR_AUVIOL_Msk                (1UL << SAU_SFSR_AUVIOL_Pos)                   /*!< SAU SFSR: AUVIOL Mask */
+
+#define SAU_SFSR_INVER_Pos                  2U                                            /*!< SAU SFSR: INVER Position */
+#define SAU_SFSR_INVER_Msk                 (1UL << SAU_SFSR_INVER_Pos)                    /*!< SAU SFSR: INVER Mask */
+
+#define SAU_SFSR_INVIS_Pos                  1U                                            /*!< SAU SFSR: INVIS Position */
+#define SAU_SFSR_INVIS_Msk                 (1UL << SAU_SFSR_INVIS_Pos)                    /*!< SAU SFSR: INVIS Mask */
+
+#define SAU_SFSR_INVEP_Pos                  0U                                            /*!< SAU SFSR: INVEP Position */
+#define SAU_SFSR_INVEP_Msk                 (1UL /*<< SAU_SFSR_INVEP_Pos*/)                /*!< SAU SFSR: INVEP Mask */
+
+/*@} end of group CMSIS_SAU */
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
+  \brief    Type definitions for the Floating Point Unit (FPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Floating Point Unit (FPU).
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
+  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
+  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
+} FPU_Type;
+
+/* Floating-Point Context Control Register Definitions */
+#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
+#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
+
+#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
+#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
+
+#define FPU_FPCCR_LSPENS_Pos               29U                                            /*!< FPCCR: LSPENS Position */
+#define FPU_FPCCR_LSPENS_Msk               (1UL << FPU_FPCCR_LSPENS_Pos)                  /*!< FPCCR: LSPENS bit Mask */
+
+#define FPU_FPCCR_CLRONRET_Pos             28U                                            /*!< FPCCR: CLRONRET Position */
+#define FPU_FPCCR_CLRONRET_Msk             (1UL << FPU_FPCCR_CLRONRET_Pos)                /*!< FPCCR: CLRONRET bit Mask */
+
+#define FPU_FPCCR_CLRONRETS_Pos            27U                                            /*!< FPCCR: CLRONRETS Position */
+#define FPU_FPCCR_CLRONRETS_Msk            (1UL << FPU_FPCCR_CLRONRETS_Pos)               /*!< FPCCR: CLRONRETS bit Mask */
+
+#define FPU_FPCCR_TS_Pos                   26U                                            /*!< FPCCR: TS Position */
+#define FPU_FPCCR_TS_Msk                   (1UL << FPU_FPCCR_TS_Pos)                      /*!< FPCCR: TS bit Mask */
+
+#define FPU_FPCCR_UFRDY_Pos                10U                                            /*!< FPCCR: UFRDY Position */
+#define FPU_FPCCR_UFRDY_Msk                (1UL << FPU_FPCCR_UFRDY_Pos)                   /*!< FPCCR: UFRDY bit Mask */
+
+#define FPU_FPCCR_SPLIMVIOL_Pos             9U                                            /*!< FPCCR: SPLIMVIOL Position */
+#define FPU_FPCCR_SPLIMVIOL_Msk            (1UL << FPU_FPCCR_SPLIMVIOL_Pos)               /*!< FPCCR: SPLIMVIOL bit Mask */
+
+#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
+#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
+
+#define FPU_FPCCR_SFRDY_Pos                 7U                                            /*!< FPCCR: SFRDY Position */
+#define FPU_FPCCR_SFRDY_Msk                (1UL << FPU_FPCCR_SFRDY_Pos)                   /*!< FPCCR: SFRDY bit Mask */
+
+#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
+#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
+
+#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
+#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
+
+#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
+#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
+
+#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
+#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
+
+#define FPU_FPCCR_S_Pos                     2U                                            /*!< FPCCR: Security status of the FP context bit Position */
+#define FPU_FPCCR_S_Msk                    (1UL << FPU_FPCCR_S_Pos)                       /*!< FPCCR: Security status of the FP context bit Mask */
+
+#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
+#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
+
+#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
+#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
+
+/* Floating-Point Context Address Register Definitions */
+#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
+#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
+
+/* Floating-Point Default Status Control Register Definitions */
+#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
+#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
+
+#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
+#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
+
+#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
+#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
+
+#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
+#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
+
+/* Media and FP Feature Register 0 Definitions */
+#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
+#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
+
+#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
+#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
+
+#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
+#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
+
+#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
+#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
+
+#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
+#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
+
+#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
+#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
+
+#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
+#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
+
+#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
+#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
+
+/* Media and FP Feature Register 1 Definitions */
+#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
+#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
+
+#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
+#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
+
+#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
+#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
+
+#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
+#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
+
+/*@} end of group CMSIS_FPU */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */
+#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+
+/* Debug Authentication Control Register Definitions */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
+
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
+
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
+
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
+
+/* Debug Security Control and Status Register Definitions */
+#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */
+#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */
+
+#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */
+#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */
+
+#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */
+#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
+  #define ITM_BASE            (0xE0000000UL)                             /*!< ITM Base Address */
+  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
+  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
+  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */
+  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
+  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
+  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
+
+  #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE         ) /*!< System control Register not in SCB */
+  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
+  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
+  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
+  #define ITM                 ((ITM_Type       *)     ITM_BASE         ) /*!< ITM configuration struct */
+  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
+  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
+  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
+    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
+  #endif
+
+  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
+    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
+  #endif
+
+  #define FPU_BASE            (SCS_BASE +  0x0F30UL)                     /*!< Floating Point Unit */
+  #define FPU                 ((FPU_Type       *)     FPU_BASE         ) /*!< Floating Point Unit */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
+  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */
+  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
+  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
+  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
+
+  #define SCnSCB_NS           ((SCnSCB_Type    *)     SCS_BASE_NS      ) /*!< System control Register not in SCB(non-secure address space) */
+  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
+  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
+  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
+  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
+    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
+  #endif
+
+  #define FPU_BASE_NS         (SCS_BASE_NS +  0x0F30UL)                  /*!< Floating Point Unit               (non-secure address space) */
+  #define FPU_NS              ((FPU_Type       *)     FPU_BASE_NS      ) /*!< Floating Point Unit               (non-secure address space) */
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Debug Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+
+/**
+  \brief   Set Priority Grouping
+  \details Sets the priority grouping field using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
+  SCB->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Interrupt Target State
+  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+  \return             1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Target State
+  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Clear Interrupt Target State
+  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
+                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Set Priority Grouping (non-secure)
+  \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB_NS->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk));             /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
+  SCB_NS->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping (non-secure)
+  \details Reads the priority grouping field from the non-secure NVIC when in secure state.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
+{
+  return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt (non-secure)
+  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status (non-secure)
+  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt (non-secure)
+  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt (non-secure)
+  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt (non-secure)
+  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt (non-secure)
+  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt (non-secure)
+  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority (non-secure)
+  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every non-secure processor exception.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority (non-secure)
+  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+/* ##########################  MPU functions  #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv8.h"
+
+#endif
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+  uint32_t mvfr0;
+
+  mvfr0 = FPU->MVFR0;
+  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
+  {
+    return 2U;           /* Double + Single precision FPU */
+  }
+  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
+  {
+    return 1U;           /* Single precision FPU */
+  }
+  else
+  {
+    return 0U;           /* No FPU */
+  }
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+
+/* ##########################   SAU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SAUFunctions SAU Functions
+  \brief    Functions that configure the SAU.
+  @{
+ */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
+/**
+  \brief   Enable SAU
+  \details Enables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Enable(void)
+{
+    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
+}
+
+
+
+/**
+  \brief   Disable SAU
+  \details Disables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Disable(void)
+{
+    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
+}
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_SAUFunctions */
+
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   System Tick Configuration (non-secure)
+  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                         /* Reload value impossible */
+  }
+
+  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
+  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
+  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                      SysTick_CTRL_TICKINT_Msk   |
+                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                           /* Function successful */
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_core_DebugFunctions ITM Functions
+  \brief    Functions that access the ITM debug interface.
+  @{
+ */
+
+extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
+#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/**
+  \brief   ITM Send Character
+  \details Transmits a character via the ITM channel 0, and
+           \li Just returns when no debugger is connected that has booked the output.
+           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+  \param [in]     ch  Character to transmit.
+  \returns            Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
+      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
+  {
+    while (ITM->PORT[0U].u32 == 0UL)
+    {
+      __NOP();
+    }
+    ITM->PORT[0U].u8 = (uint8_t)ch;
+  }
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Receive Character
+  \details Inputs a character via the external variable \ref ITM_RxBuffer.
+  \return             Received character.
+  \return         -1  No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
+  int32_t ch = -1;                           /* no character available */
+
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+  {
+    ch = ITM_RxBuffer;
+    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
+  }
+
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Check Character
+  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+  \return          0  No character available.
+  \return          1  Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
+
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+  {
+    return (0);                              /* no character available */
+  }
+  else
+  {
+    return (1);                              /*    character available */
+  }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_ARMV81MML_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Core/Include/core_armv8mbl.h b/Core/Include/core_armv8mbl.h
index 251e4ed..344dca5 100644
--- a/Core/Include/core_armv8mbl.h
+++ b/Core/Include/core_armv8mbl.h
@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     core_armv8mbl.h
  * @brief    CMSIS Armv8-M Baseline Core Peripheral Access Layer Header File
- * @version  V5.0.7
- * @date     22. June 2018
+ * @version  V5.0.8
+ * @date     12. November 2018
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -81,7 +81,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
+  #if defined __ARM_FP
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
@@ -1223,7 +1223,7 @@
 #define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
 #define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
 #define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
-#define EXC_RETURN_SPSEL           (0x00000002UL)     /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP           */
+#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
 #define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
 
 /* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
@@ -1253,7 +1253,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -1552,6 +1554,7 @@
   uint32_t *vectors = (uint32_t *)0x0U;
 #endif
   vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
 }
 
 
diff --git a/Core/Include/core_armv8mml.h b/Core/Include/core_armv8mml.h
index 3a3148e..5ddb8ae 100644
--- a/Core/Include/core_armv8mml.h
+++ b/Core/Include/core_armv8mml.h
@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     core_armv8mml.h
  * @brief    CMSIS Armv8-M Mainline Core Peripheral Access Layer Header File
- * @version  V5.0.7
- * @date     06. July 2018
+ * @version  V5.1.0
+ * @date     12. September 2018
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -97,7 +97,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
+  #if defined __ARM_FP
     #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
       #define __FPU_USED       1U
     #else
@@ -538,14 +538,6 @@
   __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
   __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
   __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
-        uint32_t RESERVED7[6U];
-  __IOM uint32_t ITCMCR;                 /*!< Offset: 0x290 (R/W)  Instruction Tightly-Coupled Memory Control Register */
-  __IOM uint32_t DTCMCR;                 /*!< Offset: 0x294 (R/W)  Data Tightly-Coupled Memory Control Registers */
-  __IOM uint32_t AHBPCR;                 /*!< Offset: 0x298 (R/W)  AHBP Control Register */
-  __IOM uint32_t CACR;                   /*!< Offset: 0x29C (R/W)  L1 Cache Control Register */
-  __IOM uint32_t AHBSCR;                 /*!< Offset: 0x2A0 (R/W)  AHB Slave Control Register */
-        uint32_t RESERVED8[1U];
-  __IOM uint32_t ABFSR;                  /*!< Offset: 0x2A8 (R/W)  Auxiliary Bus Fault Status Register */
 } SCB_Type;
 
 /* SCB CPUID Register Definitions */
@@ -921,78 +913,6 @@
 #define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
 #define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
 
-/* Instruction Tightly-Coupled Memory Control Register Definitions */
-#define SCB_ITCMCR_SZ_Pos                   3U                                            /*!< SCB ITCMCR: SZ Position */
-#define SCB_ITCMCR_SZ_Msk                  (0xFUL << SCB_ITCMCR_SZ_Pos)                   /*!< SCB ITCMCR: SZ Mask */
-
-#define SCB_ITCMCR_RETEN_Pos                2U                                            /*!< SCB ITCMCR: RETEN Position */
-#define SCB_ITCMCR_RETEN_Msk               (1UL << SCB_ITCMCR_RETEN_Pos)                  /*!< SCB ITCMCR: RETEN Mask */
-
-#define SCB_ITCMCR_RMW_Pos                  1U                                            /*!< SCB ITCMCR: RMW Position */
-#define SCB_ITCMCR_RMW_Msk                 (1UL << SCB_ITCMCR_RMW_Pos)                    /*!< SCB ITCMCR: RMW Mask */
-
-#define SCB_ITCMCR_EN_Pos                   0U                                            /*!< SCB ITCMCR: EN Position */
-#define SCB_ITCMCR_EN_Msk                  (1UL /*<< SCB_ITCMCR_EN_Pos*/)                 /*!< SCB ITCMCR: EN Mask */
-
-/* Data Tightly-Coupled Memory Control Register Definitions */
-#define SCB_DTCMCR_SZ_Pos                   3U                                            /*!< SCB DTCMCR: SZ Position */
-#define SCB_DTCMCR_SZ_Msk                  (0xFUL << SCB_DTCMCR_SZ_Pos)                   /*!< SCB DTCMCR: SZ Mask */
-
-#define SCB_DTCMCR_RETEN_Pos                2U                                            /*!< SCB DTCMCR: RETEN Position */
-#define SCB_DTCMCR_RETEN_Msk               (1UL << SCB_DTCMCR_RETEN_Pos)                   /*!< SCB DTCMCR: RETEN Mask */
-
-#define SCB_DTCMCR_RMW_Pos                  1U                                            /*!< SCB DTCMCR: RMW Position */
-#define SCB_DTCMCR_RMW_Msk                 (1UL << SCB_DTCMCR_RMW_Pos)                    /*!< SCB DTCMCR: RMW Mask */
-
-#define SCB_DTCMCR_EN_Pos                   0U                                            /*!< SCB DTCMCR: EN Position */
-#define SCB_DTCMCR_EN_Msk                  (1UL /*<< SCB_DTCMCR_EN_Pos*/)                 /*!< SCB DTCMCR: EN Mask */
-
-/* AHBP Control Register Definitions */
-#define SCB_AHBPCR_SZ_Pos                   1U                                            /*!< SCB AHBPCR: SZ Position */
-#define SCB_AHBPCR_SZ_Msk                  (7UL << SCB_AHBPCR_SZ_Pos)                     /*!< SCB AHBPCR: SZ Mask */
-
-#define SCB_AHBPCR_EN_Pos                   0U                                            /*!< SCB AHBPCR: EN Position */
-#define SCB_AHBPCR_EN_Msk                  (1UL /*<< SCB_AHBPCR_EN_Pos*/)                 /*!< SCB AHBPCR: EN Mask */
-
-/* L1 Cache Control Register Definitions */
-#define SCB_CACR_FORCEWT_Pos                2U                                            /*!< SCB CACR: FORCEWT Position */
-#define SCB_CACR_FORCEWT_Msk               (1UL << SCB_CACR_FORCEWT_Pos)                  /*!< SCB CACR: FORCEWT Mask */
-
-#define SCB_CACR_ECCEN_Pos                  1U                                            /*!< SCB CACR: ECCEN Position */
-#define SCB_CACR_ECCEN_Msk                 (1UL << SCB_CACR_ECCEN_Pos)                    /*!< SCB CACR: ECCEN Mask */
-
-#define SCB_CACR_SIWT_Pos                   0U                                            /*!< SCB CACR: SIWT Position */
-#define SCB_CACR_SIWT_Msk                  (1UL /*<< SCB_CACR_SIWT_Pos*/)                 /*!< SCB CACR: SIWT Mask */
-
-/* AHBS Control Register Definitions */
-#define SCB_AHBSCR_INITCOUNT_Pos           11U                                            /*!< SCB AHBSCR: INITCOUNT Position */
-#define SCB_AHBSCR_INITCOUNT_Msk           (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos)           /*!< SCB AHBSCR: INITCOUNT Mask */
-
-#define SCB_AHBSCR_TPRI_Pos                 2U                                            /*!< SCB AHBSCR: TPRI Position */
-#define SCB_AHBSCR_TPRI_Msk                (0x1FFUL << SCB_AHBPCR_TPRI_Pos)               /*!< SCB AHBSCR: TPRI Mask */
-
-#define SCB_AHBSCR_CTL_Pos                  0U                                            /*!< SCB AHBSCR: CTL Position*/
-#define SCB_AHBSCR_CTL_Msk                 (3UL /*<< SCB_AHBPCR_CTL_Pos*/)                /*!< SCB AHBSCR: CTL Mask */
-
-/* Auxiliary Bus Fault Status Register Definitions */
-#define SCB_ABFSR_AXIMTYPE_Pos              8U                                            /*!< SCB ABFSR: AXIMTYPE Position*/
-#define SCB_ABFSR_AXIMTYPE_Msk             (3UL << SCB_ABFSR_AXIMTYPE_Pos)                /*!< SCB ABFSR: AXIMTYPE Mask */
-
-#define SCB_ABFSR_EPPB_Pos                  4U                                            /*!< SCB ABFSR: EPPB Position*/
-#define SCB_ABFSR_EPPB_Msk                 (1UL << SCB_ABFSR_EPPB_Pos)                    /*!< SCB ABFSR: EPPB Mask */
-
-#define SCB_ABFSR_AXIM_Pos                  3U                                            /*!< SCB ABFSR: AXIM Position*/
-#define SCB_ABFSR_AXIM_Msk                 (1UL << SCB_ABFSR_AXIM_Pos)                    /*!< SCB ABFSR: AXIM Mask */
-
-#define SCB_ABFSR_AHBP_Pos                  2U                                            /*!< SCB ABFSR: AHBP Position*/
-#define SCB_ABFSR_AHBP_Msk                 (1UL << SCB_ABFSR_AHBP_Pos)                    /*!< SCB ABFSR: AHBP Mask */
-
-#define SCB_ABFSR_DTCM_Pos                  1U                                            /*!< SCB ABFSR: DTCM Position*/
-#define SCB_ABFSR_DTCM_Msk                 (1UL << SCB_ABFSR_DTCM_Pos)                    /*!< SCB ABFSR: DTCM Mask */
-
-#define SCB_ABFSR_ITCM_Pos                  0U                                            /*!< SCB ABFSR: ITCM Position*/
-#define SCB_ABFSR_ITCM_Msk                 (1UL /*<< SCB_ABFSR_ITCM_Pos*/)                /*!< SCB ABFSR: ITCM Mask */
-
 /*@} end of group CMSIS_SCB */
 
 
@@ -1097,10 +1017,7 @@
   __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
         uint32_t RESERVED2[15U];
   __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[29U];
-  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
-  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
-  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
+        uint32_t RESERVED3[32U];
         uint32_t RESERVED4[43U];
   __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
   __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
@@ -1163,18 +1080,6 @@
 #define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
 #define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
 
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
-
 /* ITM Lock Status Register Definitions */
 #define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
 #define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
@@ -2093,7 +1998,7 @@
 #define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
 #define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
 #define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
-#define EXC_RETURN_SPSEL           (0x00000002UL)     /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP           */
+#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
 #define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
 
 /* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
@@ -2122,7 +2027,7 @@
   reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
   reg_value  =  (reg_value                                   |
                 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
   SCB->AIRCR =  reg_value;
 }
 
@@ -2148,7 +2053,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -2440,6 +2347,7 @@
 {
   uint32_t *vectors = (uint32_t *)SCB->VTOR;
   vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
 }
 
 
@@ -2496,7 +2404,7 @@
   reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk));             /* clear bits to change               */
   reg_value  =  (reg_value                                   |
                 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)                      );              /* Insert write key and priority group */
   SCB_NS->AIRCR =  reg_value;
 }
 
diff --git a/Core/Include/core_cm0.h b/Core/Include/core_cm0.h
index f929bba..cafae5a 100644
--- a/Core/Include/core_cm0.h
+++ b/Core/Include/core_cm0.h
@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     core_cm0.h
  * @brief    CMSIS Cortex-M0 Core Peripheral Access Layer Header File
- * @version  V5.0.5
- * @date     28. May 2018
+ * @version  V5.0.6
+ * @date     13. March 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -81,7 +81,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
+  #if defined __ARM_FP
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
@@ -316,7 +316,7 @@
   __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
         uint32_t RESERVED0[31U];
   __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[31U];
+        uint32_t RESERVED1[31U];
   __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
         uint32_t RESERVED2[31U];
   __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
@@ -624,7 +624,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -829,8 +831,9 @@
  */
 __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
 {
-  uint32_t *vectors = (uint32_t *)0x0U;
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  uint32_t vectors = 0x0U;
+  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
+  /* ARM Application Note 321 states that the M0 does not require the architectural barrier */
 }
 
 
@@ -844,8 +847,8 @@
  */
 __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
 {
-  uint32_t *vectors = (uint32_t *)0x0U;
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+  uint32_t vectors = 0x0U;
+  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
 }
 
 
diff --git a/Core/Include/core_cm0plus.h b/Core/Include/core_cm0plus.h
index 424011a..d104965 100644
--- a/Core/Include/core_cm0plus.h
+++ b/Core/Include/core_cm0plus.h
@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     core_cm0plus.h
  * @brief    CMSIS Cortex-M0+ Core Peripheral Access Layer Header File
- * @version  V5.0.6
- * @date     28. May 2018
+ * @version  V5.0.7
+ * @date     13. March 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -81,7 +81,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
+  #if defined __ARM_FP
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
@@ -330,7 +330,7 @@
   __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
         uint32_t RESERVED0[31U];
   __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[31U];
+        uint32_t RESERVED1[31U];
   __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
         uint32_t RESERVED2[31U];
   __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
@@ -742,7 +742,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -948,11 +950,12 @@
 __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
 {
 #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  uint32_t vectors = SCB->VTOR;
 #else
-    uint32_t *vectors = (uint32_t *)0x0U;
+  uint32_t vectors = 0x0U;
 #endif
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
+  /* ARM Application Note 321 states that the M0+ does not require the architectural barrier */
 }
 
 
@@ -967,12 +970,11 @@
 __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
 {
 #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  uint32_t vectors = SCB->VTOR;
 #else
-  uint32_t *vectors = (uint32_t *)0x0U;
+  uint32_t vectors = 0x0U;
 #endif
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-
+  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
 }
 
 
diff --git a/Core/Include/core_cm1.h b/Core/Include/core_cm1.h
index 0ed678e..76b4569 100644
--- a/Core/Include/core_cm1.h
+++ b/Core/Include/core_cm1.h
@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     core_cm1.h
  * @brief    CMSIS Cortex-M1 Core Peripheral Access Layer Header File
- * @version  V1.0.0
- * @date     23. July 2018
+ * @version  V1.0.1
+ * @date     12. November 2018
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -81,7 +81,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
+  #if defined __ARM_FP
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
@@ -651,7 +651,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -858,6 +860,7 @@
 {
   uint32_t *vectors = (uint32_t *)0x0U;
   vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  /* ARM Application Note 321 states that the M1 does not require the architectural barrier */
 }
 
 
diff --git a/Core/Include/core_cm23.h b/Core/Include/core_cm23.h
index acbc5df..b79c6af 100644
--- a/Core/Include/core_cm23.h
+++ b/Core/Include/core_cm23.h
@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     core_cm23.h
  * @brief    CMSIS Cortex-M23 Core Peripheral Access Layer Header File
- * @version  V5.0.7
- * @date     22. June 2018
+ * @version  V5.0.8
+ * @date     12. November 2018
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -81,7 +81,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
+  #if defined __ARM_FP
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
@@ -1298,7 +1298,7 @@
 #define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
 #define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
 #define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
-#define EXC_RETURN_SPSEL           (0x00000002UL)     /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP           */
+#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
 #define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
 
 /* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
@@ -1328,7 +1328,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -1627,6 +1629,7 @@
   uint32_t *vectors = (uint32_t *)0x0U;
 #endif
   vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
 }
 
 
diff --git a/Core/Include/core_cm3.h b/Core/Include/core_cm3.h
index 74bff64..8157ca7 100644
--- a/Core/Include/core_cm3.h
+++ b/Core/Include/core_cm3.h
@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     core_cm3.h
  * @brief    CMSIS Cortex-M3 Core Peripheral Access Layer Header File
- * @version  V5.0.8
- * @date     04. June 2018
+ * @version  V5.1.0
+ * @date     13. March 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -81,7 +81,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
+  #if defined __ARM_FP
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
@@ -342,7 +342,7 @@
   __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
         uint32_t RESERVED0[24U];
   __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[24U];
+        uint32_t RESERVED1[24U];
   __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
         uint32_t RESERVED2[24U];
   __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
@@ -668,6 +668,12 @@
 #define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
 
 /* Auxiliary Control Register Definitions */
+#if defined (__CM3_REV) && (__CM3_REV >= 0x200U)
+#define SCnSCB_ACTLR_DISOOFP_Pos            9U                                         /*!< ACTLR: DISOOFP Position */
+#define SCnSCB_ACTLR_DISOOFP_Msk           (1UL << SCnSCB_ACTLR_DISOOFP_Pos)           /*!< ACTLR: DISOOFP Mask */
+
+#define SCnSCB_ACTLR_DISFPCA_Pos            8U                                         /*!< ACTLR: DISFPCA Position */
+#define SCnSCB_ACTLR_DISFPCA_Msk           (1UL << SCnSCB_ACTLR_DISFPCA_Pos)           /*!< ACTLR: DISFPCA Mask */
 
 #define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: DISFOLD Position */
 #define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */
@@ -677,6 +683,7 @@
 
 #define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
 #define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
+#endif
 
 /*@} end of group CMSIS_SCnotSCB */
 
@@ -757,10 +764,7 @@
   __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
         uint32_t RESERVED2[15U];
   __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[29U];
-  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
-  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
-  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
+        uint32_t RESERVED3[32U];
         uint32_t RESERVED4[43U];
   __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
   __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
@@ -811,18 +815,6 @@
 #define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
 #define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
 
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
-
 /* ITM Lock Status Register Definitions */
 #define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
 #define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
@@ -1055,13 +1047,13 @@
 
 /* TPI Integration ETM Data Register Definitions (FIFO0) */
 #define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
 
 #define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
 #define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
 
 #define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
 
 #define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
 #define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
@@ -1084,13 +1076,13 @@
 
 /* TPI Integration ITM Data Register Definitions (FIFO1) */
 #define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
 
 #define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
 #define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
 
 #define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
 
 #define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
 #define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
@@ -1512,7 +1504,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -1735,8 +1729,9 @@
  */
 __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
 {
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
+  /* ARM Application Note 321 states that the M3 does not require the architectural barrier */
 }
 
 
@@ -1750,8 +1745,8 @@
  */
 __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
 {
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
 }
 
 
@@ -1784,6 +1779,7 @@
 
 #endif
 
+
 /* ##########################  FPU functions  #################################### */
 /**
   \ingroup  CMSIS_Core_FunctionInterface
diff --git a/Core/Include/core_cm33.h b/Core/Include/core_cm33.h
index 6cd2db7..7fed59a 100644
--- a/Core/Include/core_cm33.h
+++ b/Core/Include/core_cm33.h
@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     core_cm33.h
  * @brief    CMSIS Cortex-M33 Core Peripheral Access Layer Header File
- * @version  V5.0.9
- * @date     06. July 2018
+ * @version  V5.1.0
+ * @date     12. November 2018
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -97,7 +97,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined (__ARM_PCS_VFP)
+  #if defined (__ARM_FP)
     #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
       #define __FPU_USED       1U
     #else
@@ -538,14 +538,6 @@
   __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
   __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
   __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
-        uint32_t RESERVED7[6U];
-  __IOM uint32_t ITCMCR;                 /*!< Offset: 0x290 (R/W)  Instruction Tightly-Coupled Memory Control Register */
-  __IOM uint32_t DTCMCR;                 /*!< Offset: 0x294 (R/W)  Data Tightly-Coupled Memory Control Registers */
-  __IOM uint32_t AHBPCR;                 /*!< Offset: 0x298 (R/W)  AHBP Control Register */
-  __IOM uint32_t CACR;                   /*!< Offset: 0x29C (R/W)  L1 Cache Control Register */
-  __IOM uint32_t AHBSCR;                 /*!< Offset: 0x2A0 (R/W)  AHB Slave Control Register */
-        uint32_t RESERVED8[1U];
-  __IOM uint32_t ABFSR;                  /*!< Offset: 0x2A8 (R/W)  Auxiliary Bus Fault Status Register */
 } SCB_Type;
 
 /* SCB CPUID Register Definitions */
@@ -921,78 +913,6 @@
 #define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
 #define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
 
-/* Instruction Tightly-Coupled Memory Control Register Definitions */
-#define SCB_ITCMCR_SZ_Pos                   3U                                            /*!< SCB ITCMCR: SZ Position */
-#define SCB_ITCMCR_SZ_Msk                  (0xFUL << SCB_ITCMCR_SZ_Pos)                   /*!< SCB ITCMCR: SZ Mask */
-
-#define SCB_ITCMCR_RETEN_Pos                2U                                            /*!< SCB ITCMCR: RETEN Position */
-#define SCB_ITCMCR_RETEN_Msk               (1UL << SCB_ITCMCR_RETEN_Pos)                  /*!< SCB ITCMCR: RETEN Mask */
-
-#define SCB_ITCMCR_RMW_Pos                  1U                                            /*!< SCB ITCMCR: RMW Position */
-#define SCB_ITCMCR_RMW_Msk                 (1UL << SCB_ITCMCR_RMW_Pos)                    /*!< SCB ITCMCR: RMW Mask */
-
-#define SCB_ITCMCR_EN_Pos                   0U                                            /*!< SCB ITCMCR: EN Position */
-#define SCB_ITCMCR_EN_Msk                  (1UL /*<< SCB_ITCMCR_EN_Pos*/)                 /*!< SCB ITCMCR: EN Mask */
-
-/* Data Tightly-Coupled Memory Control Register Definitions */
-#define SCB_DTCMCR_SZ_Pos                   3U                                            /*!< SCB DTCMCR: SZ Position */
-#define SCB_DTCMCR_SZ_Msk                  (0xFUL << SCB_DTCMCR_SZ_Pos)                   /*!< SCB DTCMCR: SZ Mask */
-
-#define SCB_DTCMCR_RETEN_Pos                2U                                            /*!< SCB DTCMCR: RETEN Position */
-#define SCB_DTCMCR_RETEN_Msk               (1UL << SCB_DTCMCR_RETEN_Pos)                   /*!< SCB DTCMCR: RETEN Mask */
-
-#define SCB_DTCMCR_RMW_Pos                  1U                                            /*!< SCB DTCMCR: RMW Position */
-#define SCB_DTCMCR_RMW_Msk                 (1UL << SCB_DTCMCR_RMW_Pos)                    /*!< SCB DTCMCR: RMW Mask */
-
-#define SCB_DTCMCR_EN_Pos                   0U                                            /*!< SCB DTCMCR: EN Position */
-#define SCB_DTCMCR_EN_Msk                  (1UL /*<< SCB_DTCMCR_EN_Pos*/)                 /*!< SCB DTCMCR: EN Mask */
-
-/* AHBP Control Register Definitions */
-#define SCB_AHBPCR_SZ_Pos                   1U                                            /*!< SCB AHBPCR: SZ Position */
-#define SCB_AHBPCR_SZ_Msk                  (7UL << SCB_AHBPCR_SZ_Pos)                     /*!< SCB AHBPCR: SZ Mask */
-
-#define SCB_AHBPCR_EN_Pos                   0U                                            /*!< SCB AHBPCR: EN Position */
-#define SCB_AHBPCR_EN_Msk                  (1UL /*<< SCB_AHBPCR_EN_Pos*/)                 /*!< SCB AHBPCR: EN Mask */
-
-/* L1 Cache Control Register Definitions */
-#define SCB_CACR_FORCEWT_Pos                2U                                            /*!< SCB CACR: FORCEWT Position */
-#define SCB_CACR_FORCEWT_Msk               (1UL << SCB_CACR_FORCEWT_Pos)                  /*!< SCB CACR: FORCEWT Mask */
-
-#define SCB_CACR_ECCEN_Pos                  1U                                            /*!< SCB CACR: ECCEN Position */
-#define SCB_CACR_ECCEN_Msk                 (1UL << SCB_CACR_ECCEN_Pos)                    /*!< SCB CACR: ECCEN Mask */
-
-#define SCB_CACR_SIWT_Pos                   0U                                            /*!< SCB CACR: SIWT Position */
-#define SCB_CACR_SIWT_Msk                  (1UL /*<< SCB_CACR_SIWT_Pos*/)                 /*!< SCB CACR: SIWT Mask */
-
-/* AHBS Control Register Definitions */
-#define SCB_AHBSCR_INITCOUNT_Pos           11U                                            /*!< SCB AHBSCR: INITCOUNT Position */
-#define SCB_AHBSCR_INITCOUNT_Msk           (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos)           /*!< SCB AHBSCR: INITCOUNT Mask */
-
-#define SCB_AHBSCR_TPRI_Pos                 2U                                            /*!< SCB AHBSCR: TPRI Position */
-#define SCB_AHBSCR_TPRI_Msk                (0x1FFUL << SCB_AHBPCR_TPRI_Pos)               /*!< SCB AHBSCR: TPRI Mask */
-
-#define SCB_AHBSCR_CTL_Pos                  0U                                            /*!< SCB AHBSCR: CTL Position*/
-#define SCB_AHBSCR_CTL_Msk                 (3UL /*<< SCB_AHBPCR_CTL_Pos*/)                /*!< SCB AHBSCR: CTL Mask */
-
-/* Auxiliary Bus Fault Status Register Definitions */
-#define SCB_ABFSR_AXIMTYPE_Pos              8U                                            /*!< SCB ABFSR: AXIMTYPE Position*/
-#define SCB_ABFSR_AXIMTYPE_Msk             (3UL << SCB_ABFSR_AXIMTYPE_Pos)                /*!< SCB ABFSR: AXIMTYPE Mask */
-
-#define SCB_ABFSR_EPPB_Pos                  4U                                            /*!< SCB ABFSR: EPPB Position*/
-#define SCB_ABFSR_EPPB_Msk                 (1UL << SCB_ABFSR_EPPB_Pos)                    /*!< SCB ABFSR: EPPB Mask */
-
-#define SCB_ABFSR_AXIM_Pos                  3U                                            /*!< SCB ABFSR: AXIM Position*/
-#define SCB_ABFSR_AXIM_Msk                 (1UL << SCB_ABFSR_AXIM_Pos)                    /*!< SCB ABFSR: AXIM Mask */
-
-#define SCB_ABFSR_AHBP_Pos                  2U                                            /*!< SCB ABFSR: AHBP Position*/
-#define SCB_ABFSR_AHBP_Msk                 (1UL << SCB_ABFSR_AHBP_Pos)                    /*!< SCB ABFSR: AHBP Mask */
-
-#define SCB_ABFSR_DTCM_Pos                  1U                                            /*!< SCB ABFSR: DTCM Position*/
-#define SCB_ABFSR_DTCM_Msk                 (1UL << SCB_ABFSR_DTCM_Pos)                    /*!< SCB ABFSR: DTCM Mask */
-
-#define SCB_ABFSR_ITCM_Pos                  0U                                            /*!< SCB ABFSR: ITCM Position*/
-#define SCB_ABFSR_ITCM_Msk                 (1UL /*<< SCB_ABFSR_ITCM_Pos*/)                /*!< SCB ABFSR: ITCM Mask */
-
 /*@} end of group CMSIS_SCB */
 
 
@@ -1097,10 +1017,7 @@
   __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
         uint32_t RESERVED2[15U];
   __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[29U];
-  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
-  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
-  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
+        uint32_t RESERVED3[32U];
         uint32_t RESERVED4[43U];
   __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
   __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
@@ -1163,18 +1080,6 @@
 #define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
 #define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
 
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
-
 /* ITM Lock Status Register Definitions */
 #define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
 #define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
@@ -2168,7 +2073,7 @@
 #define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
 #define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
 #define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
-#define EXC_RETURN_SPSEL           (0x00000002UL)     /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP           */
+#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
 #define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
 
 /* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
@@ -2197,7 +2102,7 @@
   reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
   reg_value  =  (reg_value                                   |
                 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priority group */
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
   SCB->AIRCR =  reg_value;
 }
 
@@ -2223,7 +2128,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -2515,6 +2422,7 @@
 {
   uint32_t *vectors = (uint32_t *)SCB->VTOR;
   vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
 }
 
 
diff --git a/Core/Include/core_cm35p.h b/Core/Include/core_cm35p.h
new file mode 100644
index 0000000..5579c82
--- /dev/null
+++ b/Core/Include/core_cm35p.h
@@ -0,0 +1,2910 @@
+/**************************************************************************//**
+ * @file     core_cm35p.h
+ * @brief    CMSIS Cortex-M35P Core Peripheral Access Layer Header File
+ * @version  V1.0.0
+ * @date     12. November 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CORE_CM35P_H_GENERIC
+#define __CORE_CM35P_H_GENERIC
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_M35P
+  @{
+ */
+
+#include "cmsis_version.h"
+
+/*  CMSIS CM35P definitions */
+#define __CM35P_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                  /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM35P_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                   /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __CM35P_CMSIS_VERSION       ((__CM35P_CMSIS_VERSION_MAIN << 16U) | \
+                                      __CM35P_CMSIS_VERSION_SUB           )    /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                 (35U)                                       /*!< Cortex-M Core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
+*/
+#if defined ( __CC_ARM )
+  #if defined (__TARGET_FPU_VFP)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined (__ARM_FP)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined (__ARMVFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined (__TI_VFP_SUPPORT__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined (__FPU_VFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM35P_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM35P_H_DEPENDANT
+#define __CORE_CM35P_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __CM35P_REV
+    #define __CM35P_REV               0x0000U
+    #warning "__CM35P_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __FPU_PRESENT
+    #define __FPU_PRESENT             0U
+    #warning "__FPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __SAUREGION_PRESENT
+    #define __SAUREGION_PRESENT       0U
+    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __DSP_PRESENT
+    #define __DSP_PRESENT             0U
+    #warning "__DSP_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          3U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group Cortex_M35P */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+  - Core SAU Register
+  - Core FPU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
+#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
+
+#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
+#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
+#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
+
+#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */
+#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
+#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
+    uint32_t FPCA:1;                     /*!< bit:      2  Floating-point context active */
+    uint32_t SFPA:1;                     /*!< bit:      3  Secure floating-point active */
+    uint32_t _reserved1:28;              /*!< bit:  4..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SFPA_Pos                    3U                                            /*!< CONTROL: SFPA Position */
+#define CONTROL_SFPA_Msk                   (1UL << CONTROL_SFPA_Pos)                      /*!< CONTROL: SFPA Mask */
+
+#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
+#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
+
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[16U];
+  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RSERVED1[16U];
+  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[16U];
+  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[16U];
+  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[16U];
+  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
+        uint32_t RESERVED5[16U];
+  __IOM uint8_t  IPR[496U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        uint32_t RESERVED6[580U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
+}  NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+  __IM  uint32_t ID_ADR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+  __IM  uint32_t ID_MMFR[4U];            /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+  __IM  uint32_t ID_ISAR[6U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
+  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
+  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
+  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
+  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
+  __IOM uint32_t NSACR;                  /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */
+        uint32_t RESERVED3[92U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
+        uint32_t RESERVED4[15U];
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
+        uint32_t RESERVED5[1U];
+  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
+        uint32_t RESERVED6[1U];
+  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
+  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
+  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
+  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
+  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
+  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
+  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
+  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
+#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
+
+#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
+#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
+
+#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
+#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
+#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
+#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
+
+#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
+#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
+#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
+#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
+#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
+
+#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
+#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
+
+#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
+#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
+
+#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
+#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
+#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTPENDED_Pos    20U                                            /*!< SCB SHCSR: SECUREFAULTPENDED Position */
+#define SCB_SHCSR_SECUREFAULTPENDED_Msk    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos)       /*!< SCB SHCSR: SECUREFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTENA_Pos       19U                                            /*!< SCB SHCSR: SECUREFAULTENA Position */
+#define SCB_SHCSR_SECUREFAULTENA_Msk       (1UL << SCB_SHCSR_SECUREFAULTENA_Pos)          /*!< SCB SHCSR: SECUREFAULTENA Mask */
+
+#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
+#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
+
+#define SCB_SHCSR_SECUREFAULTACT_Pos        4U                                            /*!< SCB SHCSR: SECUREFAULTACT Position */
+#define SCB_SHCSR_SECUREFAULTACT_Msk       (1UL << SCB_SHCSR_SECUREFAULTACT_Pos)          /*!< SCB SHCSR: SECUREFAULTACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
+#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */
+#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
+
+#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
+#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
+
+#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_STKOF_Pos                (SCB_CFSR_USGFAULTSR_Pos + 4U)                  /*!< SCB CFSR (UFSR): STKOF Position */
+#define SCB_CFSR_STKOF_Msk                (1UL << SCB_CFSR_STKOF_Pos)                     /*!< SCB CFSR (UFSR): STKOF Mask */
+
+#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
+
+/* SCB Non-Secure Access Control Register Definitions */
+#define SCB_NSACR_CP11_Pos                 11U                                            /*!< SCB NSACR: CP11 Position */
+#define SCB_NSACR_CP11_Msk                 (1UL << SCB_NSACR_CP11_Pos)                    /*!< SCB NSACR: CP11 Mask */
+
+#define SCB_NSACR_CP10_Pos                 10U                                            /*!< SCB NSACR: CP10 Position */
+#define SCB_NSACR_CP10_Msk                 (1UL << SCB_NSACR_CP10_Pos)                    /*!< SCB NSACR: CP10 Mask */
+
+#define SCB_NSACR_CPn_Pos                   0U                                            /*!< SCB NSACR: CPn Position */
+#define SCB_NSACR_CPn_Msk                  (1UL /*<< SCB_NSACR_CPn_Pos*/)                 /*!< SCB NSACR: CPn Mask */
+
+/* SCB Cache Level ID Register Definitions */
+#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
+#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
+
+#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
+#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
+
+/* SCB Cache Type Register Definitions */
+#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
+#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
+
+#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
+#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
+
+#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
+#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
+
+#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
+#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
+
+#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
+#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
+
+/* SCB Cache Size ID Register Definitions */
+#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
+#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
+
+#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
+#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
+
+#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
+#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
+
+#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
+#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
+
+#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
+#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
+
+#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
+#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
+
+#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
+#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
+
+/* SCB Cache Size Selection Register Definitions */
+#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
+#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
+
+#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
+#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
+
+/* SCB Software Triggered Interrupt Register Definitions */
+#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
+#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
+
+/* SCB D-Cache Invalidate by Set-way Register Definitions */
+#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
+#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
+
+#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
+#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
+
+/* SCB D-Cache Clean by Set-way Register Definitions */
+#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
+#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
+
+#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
+#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
+
+/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
+#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
+#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
+
+#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
+#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
+  __IOM uint32_t CPPWR;                  /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+  __OM  union
+  {
+    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+        uint32_t RESERVED0[864U];
+  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        uint32_t RESERVED1[15U];
+  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        uint32_t RESERVED2[15U];
+  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        uint32_t RESERVED3[32U];
+        uint32_t RESERVED4[43U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        uint32_t RESERVED5[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */
+        uint32_t RESERVED6[4U];
+  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+} ITM_Type;
+
+/* ITM Stimulus Port Register Definitions */
+#define ITM_STIM_DISABLED_Pos               1U                                            /*!< ITM STIM: DISABLED Position */
+#define ITM_STIM_DISABLED_Msk              (0x1UL << ITM_STIM_DISABLED_Pos)               /*!< ITM STIM: DISABLED Mask */
+
+#define ITM_STIM_FIFOREADY_Pos              0U                                            /*!< ITM STIM: FIFOREADY Position */
+#define ITM_STIM_FIFOREADY_Msk             (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/)          /*!< ITM STIM: FIFOREADY Mask */
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TRACEBUSID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TRACEBUSID_Msk             (0x7FUL << ITM_TCR_TRACEBUSID_Pos)             /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPRESCALE_Pos              8U                                            /*!< ITM TCR: TSPRESCALE Position */
+#define ITM_TCR_TSPRESCALE_Msk             (3UL << ITM_TCR_TSPRESCALE_Pos)                /*!< ITM TCR: TSPRESCALE Mask */
+
+#define ITM_TCR_STALLENA_Pos                5U                                            /*!< ITM TCR: STALLENA Position */
+#define ITM_TCR_STALLENA_Msk               (1UL << ITM_TCR_STALLENA_Pos)                  /*!< ITM TCR: STALLENA Mask */
+
+#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
+  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
+  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+        uint32_t RESERVED3[1U];
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+        uint32_t RESERVED5[1U];
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED6[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+        uint32_t RESERVED7[1U];
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+        uint32_t RESERVED8[1U];
+  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
+        uint32_t RESERVED9[1U];
+  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
+        uint32_t RESERVED10[1U];
+  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
+        uint32_t RESERVED11[1U];
+  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
+        uint32_t RESERVED12[1U];
+  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
+        uint32_t RESERVED13[1U];
+  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
+        uint32_t RESERVED14[1U];
+  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
+        uint32_t RESERVED15[1U];
+  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
+        uint32_t RESERVED16[1U];
+  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
+        uint32_t RESERVED17[1U];
+  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
+        uint32_t RESERVED18[1U];
+  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
+        uint32_t RESERVED19[1U];
+  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
+        uint32_t RESERVED20[1U];
+  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
+        uint32_t RESERVED21[1U];
+  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
+        uint32_t RESERVED22[1U];
+  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
+        uint32_t RESERVED23[1U];
+  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
+        uint32_t RESERVED24[1U];
+  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
+        uint32_t RESERVED25[1U];
+  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
+        uint32_t RESERVED26[1U];
+  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
+        uint32_t RESERVED27[1U];
+  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
+        uint32_t RESERVED28[1U];
+  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
+        uint32_t RESERVED29[1U];
+  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
+        uint32_t RESERVED30[1U];
+  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
+        uint32_t RESERVED31[1U];
+  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
+        uint32_t RESERVED32[934U];
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
+        uint32_t RESERVED33[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  Device Architecture Register */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCDISS_Pos               23U                                         /*!< DWT CTRL: CYCDISS Position */
+#define DWT_CTRL_CYCDISS_Msk               (0x1UL << DWT_CTRL_CYCDISS_Pos)             /*!< DWT CTRL: CYCDISS Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
+#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
+
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
+#define DWT_FUNCTION_ACTION_Msk            (0x1UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
+
+#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
+#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */
+        uint32_t RESERVED3[759U];
+  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
+  __IM  uint32_t ITFTTD0;                /*!< Offset: 0xEEC (R/ )  Integration Test FIFO Test Data 0 Register */
+  __IOM uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/W)  Integration Test ATB Control Register 2 */
+        uint32_t RESERVED4[1U];
+  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  Integration Test ATB Control Register 0 */
+  __IM  uint32_t ITFTTD1;                /*!< Offset: 0xEFC (R/ )  Integration Test FIFO Test Data 1 Register */
+  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+        uint32_t RESERVED5[39U];
+  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+        uint32_t RESERVED7[8U];
+  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  Device Configuration Register */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Identifier Register */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */
+#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */
+
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI TRIGGER Register Definitions */
+#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
+
+/* TPI Integration Test FIFO Test Data 0 Register Definitions */
+#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */
+#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */
+
+#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */
+#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */
+#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */
+#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data2_Pos      16U                                         /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */
+#define TPI_ITFTTD0_ATB_IF1_data2_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data1_Pos       8U                                         /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */
+#define TPI_ITFTTD0_ATB_IF1_data1_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data0_Pos       0U                                          /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */
+#define TPI_ITFTTD0_ATB_IF1_data0_Msk      (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */
+
+/* TPI Integration Test ATB Control Register 2 Register Definitions */
+#define TPI_ITATBCTR2_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID2S Position */
+#define TPI_ITATBCTR2_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos)      /*!< TPI ITATBCTR2: AFVALID2SS Mask */
+
+#define TPI_ITATBCTR2_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID1S Position */
+#define TPI_ITATBCTR2_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos)      /*!< TPI ITATBCTR2: AFVALID1SS Mask */
+
+#define TPI_ITATBCTR2_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY2S Position */
+#define TPI_ITATBCTR2_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY2S Mask */
+
+#define TPI_ITATBCTR2_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY1S Position */
+#define TPI_ITATBCTR2_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY1S Mask */
+
+/* TPI Integration Test FIFO Test Data 1 Register Definitions */
+#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */
+#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */
+#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */
+
+#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */
+#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */
+
+#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */
+#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data2_Pos      16U                                         /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */
+#define TPI_ITFTTD1_ATB_IF2_data2_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data1_Pos       8U                                         /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */
+#define TPI_ITFTTD1_ATB_IF2_data1_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data0_Pos       0U                                          /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */
+#define TPI_ITFTTD1_ATB_IF2_data0_Msk      (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */
+
+/* TPI Integration Test ATB Control Register 0 Definitions */
+#define TPI_ITATBCTR0_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID2S Position */
+#define TPI_ITATBCTR0_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos)      /*!< TPI ITATBCTR0: AFVALID2SS Mask */
+
+#define TPI_ITATBCTR0_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID1S Position */
+#define TPI_ITATBCTR0_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos)      /*!< TPI ITATBCTR0: AFVALID1SS Mask */
+
+#define TPI_ITATBCTR0_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY2S Position */
+#define TPI_ITATBCTR0_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY2S Mask */
+
+#define TPI_ITATBCTR0_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY1S Position */
+#define TPI_ITATBCTR0_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY1S Mask */
+
+/* TPI Integration Mode Control Register Definitions */
+#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFOSZ Position */
+#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFOSZ Mask */
+
+#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk         (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+
+#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
+  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */
+  __IOM uint32_t RLAR_A1;                /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */
+  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */
+  __IOM uint32_t RLAR_A2;                /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */
+  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */
+  __IOM uint32_t RLAR_A3;                /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */
+        uint32_t RESERVED0[1];
+  union {
+  __IOM uint32_t MAIR[2];
+  struct {
+  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
+  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
+  };
+  };
+} MPU_Type;
+
+#define MPU_TYPE_RALIASES                  4U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */
+#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */
+
+#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
+#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
+
+#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
+#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
+
+#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
+#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
+
+/* MPU Region Limit Address Register Definitions */
+#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
+#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
+
+#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
+#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
+
+#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: Region enable bit Position */
+#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: Region enable bit Disable Mask */
+
+/* MPU Memory Attribute Indirection Register 0 Definitions */
+#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
+#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
+
+#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
+#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
+
+#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
+#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
+
+#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
+#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
+
+/* MPU Memory Attribute Indirection Register 1 Definitions */
+#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
+#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
+
+#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
+#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
+
+#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
+#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
+
+#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
+#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
+  \brief    Type definitions for the Security Attribution Unit (SAU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Security Attribution Unit (SAU).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
+#else
+        uint32_t RESERVED0[3];
+#endif
+  __IOM uint32_t SFSR;                   /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */
+  __IOM uint32_t SFAR;                   /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */
+} SAU_Type;
+
+/* SAU Control Register Definitions */
+#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
+#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
+
+#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
+#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
+
+/* SAU Type Register Definitions */
+#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
+#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
+
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+/* SAU Region Number Register Definitions */
+#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
+#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
+
+/* SAU Region Base Address Register Definitions */
+#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
+#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
+
+/* SAU Region Limit Address Register Definitions */
+#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
+#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
+
+#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
+#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
+
+#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
+#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
+
+#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
+
+/* Secure Fault Status Register Definitions */
+#define SAU_SFSR_LSERR_Pos                  7U                                            /*!< SAU SFSR: LSERR Position */
+#define SAU_SFSR_LSERR_Msk                 (1UL << SAU_SFSR_LSERR_Pos)                    /*!< SAU SFSR: LSERR Mask */
+
+#define SAU_SFSR_SFARVALID_Pos              6U                                            /*!< SAU SFSR: SFARVALID Position */
+#define SAU_SFSR_SFARVALID_Msk             (1UL << SAU_SFSR_SFARVALID_Pos)                /*!< SAU SFSR: SFARVALID Mask */
+
+#define SAU_SFSR_LSPERR_Pos                 5U                                            /*!< SAU SFSR: LSPERR Position */
+#define SAU_SFSR_LSPERR_Msk                (1UL << SAU_SFSR_LSPERR_Pos)                   /*!< SAU SFSR: LSPERR Mask */
+
+#define SAU_SFSR_INVTRAN_Pos                4U                                            /*!< SAU SFSR: INVTRAN Position */
+#define SAU_SFSR_INVTRAN_Msk               (1UL << SAU_SFSR_INVTRAN_Pos)                  /*!< SAU SFSR: INVTRAN Mask */
+
+#define SAU_SFSR_AUVIOL_Pos                 3U                                            /*!< SAU SFSR: AUVIOL Position */
+#define SAU_SFSR_AUVIOL_Msk                (1UL << SAU_SFSR_AUVIOL_Pos)                   /*!< SAU SFSR: AUVIOL Mask */
+
+#define SAU_SFSR_INVER_Pos                  2U                                            /*!< SAU SFSR: INVER Position */
+#define SAU_SFSR_INVER_Msk                 (1UL << SAU_SFSR_INVER_Pos)                    /*!< SAU SFSR: INVER Mask */
+
+#define SAU_SFSR_INVIS_Pos                  1U                                            /*!< SAU SFSR: INVIS Position */
+#define SAU_SFSR_INVIS_Msk                 (1UL << SAU_SFSR_INVIS_Pos)                    /*!< SAU SFSR: INVIS Mask */
+
+#define SAU_SFSR_INVEP_Pos                  0U                                            /*!< SAU SFSR: INVEP Position */
+#define SAU_SFSR_INVEP_Msk                 (1UL /*<< SAU_SFSR_INVEP_Pos*/)                /*!< SAU SFSR: INVEP Mask */
+
+/*@} end of group CMSIS_SAU */
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
+  \brief    Type definitions for the Floating Point Unit (FPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Floating Point Unit (FPU).
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
+  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
+  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
+} FPU_Type;
+
+/* Floating-Point Context Control Register Definitions */
+#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
+#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
+
+#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
+#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
+
+#define FPU_FPCCR_LSPENS_Pos               29U                                            /*!< FPCCR: LSPENS Position */
+#define FPU_FPCCR_LSPENS_Msk               (1UL << FPU_FPCCR_LSPENS_Pos)                  /*!< FPCCR: LSPENS bit Mask */
+
+#define FPU_FPCCR_CLRONRET_Pos             28U                                            /*!< FPCCR: CLRONRET Position */
+#define FPU_FPCCR_CLRONRET_Msk             (1UL << FPU_FPCCR_CLRONRET_Pos)                /*!< FPCCR: CLRONRET bit Mask */
+
+#define FPU_FPCCR_CLRONRETS_Pos            27U                                            /*!< FPCCR: CLRONRETS Position */
+#define FPU_FPCCR_CLRONRETS_Msk            (1UL << FPU_FPCCR_CLRONRETS_Pos)               /*!< FPCCR: CLRONRETS bit Mask */
+
+#define FPU_FPCCR_TS_Pos                   26U                                            /*!< FPCCR: TS Position */
+#define FPU_FPCCR_TS_Msk                   (1UL << FPU_FPCCR_TS_Pos)                      /*!< FPCCR: TS bit Mask */
+
+#define FPU_FPCCR_UFRDY_Pos                10U                                            /*!< FPCCR: UFRDY Position */
+#define FPU_FPCCR_UFRDY_Msk                (1UL << FPU_FPCCR_UFRDY_Pos)                   /*!< FPCCR: UFRDY bit Mask */
+
+#define FPU_FPCCR_SPLIMVIOL_Pos             9U                                            /*!< FPCCR: SPLIMVIOL Position */
+#define FPU_FPCCR_SPLIMVIOL_Msk            (1UL << FPU_FPCCR_SPLIMVIOL_Pos)               /*!< FPCCR: SPLIMVIOL bit Mask */
+
+#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
+#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
+
+#define FPU_FPCCR_SFRDY_Pos                 7U                                            /*!< FPCCR: SFRDY Position */
+#define FPU_FPCCR_SFRDY_Msk                (1UL << FPU_FPCCR_SFRDY_Pos)                   /*!< FPCCR: SFRDY bit Mask */
+
+#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
+#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
+
+#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
+#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
+
+#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
+#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
+
+#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
+#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
+
+#define FPU_FPCCR_S_Pos                     2U                                            /*!< FPCCR: Security status of the FP context bit Position */
+#define FPU_FPCCR_S_Msk                    (1UL << FPU_FPCCR_S_Pos)                       /*!< FPCCR: Security status of the FP context bit Mask */
+
+#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
+#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
+
+#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
+#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
+
+/* Floating-Point Context Address Register Definitions */
+#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
+#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
+
+/* Floating-Point Default Status Control Register Definitions */
+#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
+#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
+
+#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
+#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
+
+#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
+#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
+
+#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
+#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
+
+/* Media and FP Feature Register 0 Definitions */
+#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
+#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
+
+#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
+#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
+
+#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
+#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
+
+#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
+#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
+
+#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
+#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
+
+#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
+#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
+
+#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
+#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
+
+#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
+#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
+
+/* Media and FP Feature Register 1 Definitions */
+#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
+#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
+
+#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
+#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
+
+#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
+#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
+
+#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
+#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
+
+/*@} end of group CMSIS_FPU */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */
+#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+
+/* Debug Authentication Control Register Definitions */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
+
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
+
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
+
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
+
+/* Debug Security Control and Status Register Definitions */
+#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */
+#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */
+
+#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */
+#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */
+
+#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */
+#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
+  #define ITM_BASE            (0xE0000000UL)                             /*!< ITM Base Address */
+  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
+  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
+  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */
+  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
+  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
+  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
+
+  #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE         ) /*!< System control Register not in SCB */
+  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
+  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
+  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
+  #define ITM                 ((ITM_Type       *)     ITM_BASE         ) /*!< ITM configuration struct */
+  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
+  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
+  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
+    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
+  #endif
+
+  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
+    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
+  #endif
+
+  #define FPU_BASE            (SCS_BASE +  0x0F30UL)                     /*!< Floating Point Unit */
+  #define FPU                 ((FPU_Type       *)     FPU_BASE         ) /*!< Floating Point Unit */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
+  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */
+  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
+  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
+  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
+
+  #define SCnSCB_NS           ((SCnSCB_Type    *)     SCS_BASE_NS      ) /*!< System control Register not in SCB(non-secure address space) */
+  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
+  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
+  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
+  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
+    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
+  #endif
+
+  #define FPU_BASE_NS         (SCS_BASE_NS +  0x0F30UL)                  /*!< Floating Point Unit               (non-secure address space) */
+  #define FPU_NS              ((FPU_Type       *)     FPU_BASE_NS      ) /*!< Floating Point Unit               (non-secure address space) */
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Debug Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */
+
+/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */ 
+#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */
+
+/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
+#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */
+#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */
+#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
+#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
+#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
+#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
+#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
+
+/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
+#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */
+#else 
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */
+#endif
+
+
+/**
+  \brief   Set Priority Grouping
+  \details Sets the priority grouping field using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+  SCB->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Interrupt Target State
+  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+  \return             1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Target State
+  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Clear Interrupt Target State
+  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
+                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Set Priority Grouping (non-secure)
+  \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB_NS->AIRCR;                                                /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+  SCB_NS->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping (non-secure)
+  \details Reads the priority grouping field from the non-secure NVIC when in secure state.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
+{
+  return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt (non-secure)
+  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status (non-secure)
+  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt (non-secure)
+  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt (non-secure)
+  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt (non-secure)
+  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt (non-secure)
+  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt (non-secure)
+  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority (non-secure)
+  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every non-secure processor exception.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority (non-secure)
+  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+/* ##########################  MPU functions  #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv8.h"
+
+#endif
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+  uint32_t mvfr0;
+
+  mvfr0 = FPU->MVFR0;
+  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
+  {
+    return 2U;           /* Double + Single precision FPU */
+  }
+  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
+  {
+    return 1U;           /* Single precision FPU */
+  }
+  else
+  {
+    return 0U;           /* No FPU */
+  }
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+
+/* ##########################   SAU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SAUFunctions SAU Functions
+  \brief    Functions that configure the SAU.
+  @{
+ */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
+/**
+  \brief   Enable SAU
+  \details Enables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Enable(void)
+{
+    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
+}
+
+
+
+/**
+  \brief   Disable SAU
+  \details Disables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Disable(void)
+{
+    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
+}
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_SAUFunctions */
+
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   System Tick Configuration (non-secure)
+  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                         /* Reload value impossible */
+  }
+
+  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
+  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
+  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                      SysTick_CTRL_TICKINT_Msk   |
+                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                           /* Function successful */
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_core_DebugFunctions ITM Functions
+  \brief    Functions that access the ITM debug interface.
+  @{
+ */
+
+extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
+#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/**
+  \brief   ITM Send Character
+  \details Transmits a character via the ITM channel 0, and
+           \li Just returns when no debugger is connected that has booked the output.
+           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+  \param [in]     ch  Character to transmit.
+  \returns            Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
+      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
+  {
+    while (ITM->PORT[0U].u32 == 0UL)
+    {
+      __NOP();
+    }
+    ITM->PORT[0U].u8 = (uint8_t)ch;
+  }
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Receive Character
+  \details Inputs a character via the external variable \ref ITM_RxBuffer.
+  \return             Received character.
+  \return         -1  No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
+  int32_t ch = -1;                           /* no character available */
+
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+  {
+    ch = ITM_RxBuffer;
+    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
+  }
+
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Check Character
+  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+  \return          0  No character available.
+  \return          1  Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
+
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+  {
+    return (0);                              /* no character available */
+  }
+  else
+  {
+    return (1);                              /*    character available */
+  }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM35P_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Core/Include/core_cm4.h b/Core/Include/core_cm4.h
index 7d56873..12c023b 100644
--- a/Core/Include/core_cm4.h
+++ b/Core/Include/core_cm4.h
@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     core_cm4.h
  * @brief    CMSIS Cortex-M4 Core Peripheral Access Layer Header File
- * @version  V5.0.8
- * @date     04. June 2018
+ * @version  V5.1.0
+ * @date     13. March 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -86,7 +86,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
+  #if defined __ARM_FP
     #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
       #define __FPU_USED       1U
     #else
@@ -408,7 +408,7 @@
   __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
         uint32_t RESERVED0[24U];
   __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[24U];
+        uint32_t RESERVED1[24U];
   __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
         uint32_t RESERVED2[24U];
   __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
@@ -822,10 +822,7 @@
   __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
         uint32_t RESERVED2[15U];
   __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[29U];
-  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
-  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
-  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
+        uint32_t RESERVED3[32U];
         uint32_t RESERVED4[43U];
   __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
   __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
@@ -876,18 +873,6 @@
 #define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
 #define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
 
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
-
 /* ITM Lock Status Register Definitions */
 #define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
 #define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
@@ -1120,13 +1105,13 @@
 
 /* TPI Integration ETM Data Register Definitions (FIFO0) */
 #define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
 
 #define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
 #define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
 
 #define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
 
 #define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
 #define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
@@ -1149,13 +1134,13 @@
 
 /* TPI Integration ITM Data Register Definitions (FIFO1) */
 #define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
 
 #define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
 #define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
 
 #define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
 
 #define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
 #define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
@@ -1324,6 +1309,7 @@
   __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
   __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
   __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x018 (R/ )  Media and FP Feature Register 2 */
 } FPU_Type;
 
 /* Floating-Point Context Control Register Definitions */
@@ -1409,6 +1395,11 @@
 #define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
 #define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
 
+/* Media and FP Feature Register 2 Definitions */
+
+#define FPU_MVFR2_VFP_Misc_Pos              4U                                            /*!< MVFR2: VFP Misc bits Position */
+#define FPU_MVFR2_VFP_Misc_Msk             (0xFUL << FPU_MVFR2_VFP_Misc_Pos)              /*!< MVFR2: VFP Misc bits Mask */
+
 /*@} end of group CMSIS_FPU */
 
 
@@ -1625,7 +1616,7 @@
 
 #ifdef CMSIS_VECTAB_VIRTUAL
   #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-   #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
   #endif
   #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
 #else
@@ -1689,7 +1680,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -1912,8 +1905,9 @@
  */
 __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
 {
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
+  /* ARM Application Note 321 states that the M4 does not require the architectural barrier */
 }
 
 
@@ -1927,8 +1921,8 @@
  */
 __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
 {
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
 }
 
 
@@ -1953,6 +1947,7 @@
 
 /*@} end of CMSIS_Core_NVICFunctions */
 
+
 /* ##########################  MPU functions  #################################### */
 
 #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
diff --git a/Core/Include/core_cm7.h b/Core/Include/core_cm7.h
index a14dc62..c4515d8 100644
--- a/Core/Include/core_cm7.h
+++ b/Core/Include/core_cm7.h
@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     core_cm7.h
  * @brief    CMSIS Cortex-M7 Core Peripheral Access Layer Header File
- * @version  V5.0.8
- * @date     04. June 2018
+ * @version  V5.1.1
+ * @date     28. March 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -86,7 +86,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
+  #if defined __ARM_FP
     #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
       #define __FPU_USED       1U
     #else
@@ -423,7 +423,7 @@
   __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
         uint32_t RESERVED0[24U];
   __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[24U];
+        uint32_t RESERVED1[24U];
   __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
         uint32_t RESERVED2[24U];
   __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
@@ -930,6 +930,24 @@
 #define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
 
 /* Auxiliary Control Register Definitions */
+#define SCnSCB_ACTLR_DISDYNADD_Pos         26U                                         /*!< ACTLR: DISDYNADD Position */
+#define SCnSCB_ACTLR_DISDYNADD_Msk         (1UL << SCnSCB_ACTLR_DISDYNADD_Pos)         /*!< ACTLR: DISDYNADD Mask */
+
+#define SCnSCB_ACTLR_DISISSCH1_Pos         21U                                         /*!< ACTLR: DISISSCH1 Position */
+#define SCnSCB_ACTLR_DISISSCH1_Msk         (0x1FUL << SCnSCB_ACTLR_DISISSCH1_Pos)      /*!< ACTLR: DISISSCH1 Mask */
+
+#define SCnSCB_ACTLR_DISDI_Pos             16U                                         /*!< ACTLR: DISDI Position */
+#define SCnSCB_ACTLR_DISDI_Msk             (0x1FUL << SCnSCB_ACTLR_DISDI_Pos)          /*!< ACTLR: DISDI Mask */
+
+#define SCnSCB_ACTLR_DISCRITAXIRUR_Pos     15U                                         /*!< ACTLR: DISCRITAXIRUR Position */
+#define SCnSCB_ACTLR_DISCRITAXIRUR_Msk     (1UL << SCnSCB_ACTLR_DISCRITAXIRUR_Pos)     /*!< ACTLR: DISCRITAXIRUR Mask */
+
+#define SCnSCB_ACTLR_DISBTACALLOC_Pos      14U                                         /*!< ACTLR: DISBTACALLOC Position */
+#define SCnSCB_ACTLR_DISBTACALLOC_Msk      (1UL << SCnSCB_ACTLR_DISBTACALLOC_Pos)      /*!< ACTLR: DISBTACALLOC Mask */
+
+#define SCnSCB_ACTLR_DISBTACREAD_Pos       13U                                         /*!< ACTLR: DISBTACREAD Position */
+#define SCnSCB_ACTLR_DISBTACREAD_Msk       (1UL << SCnSCB_ACTLR_DISBTACREAD_Pos)       /*!< ACTLR: DISBTACREAD Mask */
+
 #define SCnSCB_ACTLR_DISITMATBFLUSH_Pos    12U                                         /*!< ACTLR: DISITMATBFLUSH Position */
 #define SCnSCB_ACTLR_DISITMATBFLUSH_Msk    (1UL << SCnSCB_ACTLR_DISITMATBFLUSH_Pos)    /*!< ACTLR: DISITMATBFLUSH Mask */
 
@@ -1024,10 +1042,7 @@
   __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
         uint32_t RESERVED2[15U];
   __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[29U];
-  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
-  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
-  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
+        uint32_t RESERVED3[32U];
         uint32_t RESERVED4[43U];
   __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
   __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
@@ -1078,18 +1093,6 @@
 #define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
 #define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
 
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
-
 /* ITM Lock Status Register Definitions */
 #define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
 #define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
@@ -1325,13 +1328,13 @@
 
 /* TPI Integration ETM Data Register Definitions (FIFO0) */
 #define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
 
 #define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
 #define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
 
 #define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
 
 #define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
 #define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
@@ -1354,13 +1357,13 @@
 
 /* TPI Integration ITM Data Register Definitions (FIFO1) */
 #define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
 
 #define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
 #define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
 
 #define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
 
 #define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
 #define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
@@ -1617,6 +1620,9 @@
 
 /* Media and FP Feature Register 2 Definitions */
 
+#define FPU_MVFR2_VFP_Misc_Pos              4U                                            /*!< MVFR2: VFP Misc bits Position */
+#define FPU_MVFR2_VFP_Misc_Msk             (0xFUL << FPU_MVFR2_VFP_Misc_Pos)              /*!< MVFR2: VFP Misc bits Mask */
+
 /*@} end of group CMSIS_FPU */
 
 
@@ -1897,7 +1903,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -2120,8 +2128,9 @@
  */
 __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
 {
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
+  __DSB();
 }
 
 
@@ -2135,8 +2144,8 @@
  */
 __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
 {
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
 }
 
 
@@ -2161,6 +2170,7 @@
 
 /*@} end of CMSIS_Core_NVICFunctions */
 
+
 /* ##########################  MPU functions  #################################### */
 
 #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
@@ -2169,6 +2179,7 @@
 
 #endif
 
+
 /* ##########################  FPU functions  #################################### */
 /**
   \ingroup  CMSIS_Core_FunctionInterface
@@ -2204,7 +2215,6 @@
   }
 }
 
-
 /*@} end of CMSIS_Core_FpuFunctions */
 
 
@@ -2221,14 +2231,18 @@
 #define CCSIDR_WAYS(x)         (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)
 #define CCSIDR_SETS(x)         (((x) & SCB_CCSIDR_NUMSETS_Msk      ) >> SCB_CCSIDR_NUMSETS_Pos      )
 
+#define __SCB_DCACHE_LINE_SIZE  32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
+#define __SCB_ICACHE_LINE_SIZE  32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
 
 /**
   \brief   Enable I-Cache
   \details Turns on I-Cache
   */
-__STATIC_INLINE void SCB_EnableICache (void)
+__STATIC_FORCEINLINE void SCB_EnableICache (void)
 {
   #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
+    if (SCB->CCR & SCB_CCR_IC_Msk) return;  /* return if ICache is already enabled */
+
     __DSB();
     __ISB();
     SCB->ICIALLU = 0UL;                     /* invalidate I-Cache */
@@ -2245,7 +2259,7 @@
   \brief   Disable I-Cache
   \details Turns off I-Cache
   */
-__STATIC_INLINE void SCB_DisableICache (void)
+__STATIC_FORCEINLINE void SCB_DisableICache (void)
 {
   #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
     __DSB();
@@ -2262,7 +2276,7 @@
   \brief   Invalidate I-Cache
   \details Invalidates I-Cache
   */
-__STATIC_INLINE void SCB_InvalidateICache (void)
+__STATIC_FORCEINLINE void SCB_InvalidateICache (void)
 {
   #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
     __DSB();
@@ -2275,17 +2289,49 @@
 
 
 /**
+  \brief   I-Cache Invalidate by address
+  \details Invalidates I-Cache for the given address.
+           I-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
+           I-Cache memory blocks which are part of given address + given size are invalidated.
+  \param[in]   addr    address
+  \param[in]   isize   size of memory block (in number of bytes)
+*/
+__STATIC_FORCEINLINE void SCB_InvalidateICache_by_Addr (void *addr, int32_t isize)
+{
+  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
+    if ( isize > 0 ) {
+       int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U));
+      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_ICACHE_LINE_SIZE - 1U) */;
+
+      __DSB();
+
+      do {
+        SCB->ICIMVAU = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */
+        op_addr += __SCB_ICACHE_LINE_SIZE;
+        op_size -= __SCB_ICACHE_LINE_SIZE;
+      } while ( op_size > 0 );
+
+      __DSB();
+      __ISB();
+    }
+  #endif
+}
+
+
+/**
   \brief   Enable D-Cache
   \details Turns on D-Cache
   */
-__STATIC_INLINE void SCB_EnableDCache (void)
+__STATIC_FORCEINLINE void SCB_EnableDCache (void)
 {
   #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
     uint32_t ccsidr;
     uint32_t sets;
     uint32_t ways;
 
-    SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/  /* Level 1 data cache */
+    if (SCB->CCR & SCB_CCR_DC_Msk) return;  /* return if DCache is already enabled */
+
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
     __DSB();
 
     ccsidr = SCB->CCSIDR;
@@ -2316,14 +2362,14 @@
   \brief   Disable D-Cache
   \details Turns off D-Cache
   */
-__STATIC_INLINE void SCB_DisableDCache (void)
+__STATIC_FORCEINLINE void SCB_DisableDCache (void)
 {
   #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
     uint32_t ccsidr;
     uint32_t sets;
     uint32_t ways;
 
-    SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/  /* Level 1 data cache */
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
     __DSB();
 
     SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk;  /* disable D-Cache */
@@ -2354,14 +2400,14 @@
   \brief   Invalidate D-Cache
   \details Invalidates D-Cache
   */
-__STATIC_INLINE void SCB_InvalidateDCache (void)
+__STATIC_FORCEINLINE void SCB_InvalidateDCache (void)
 {
   #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
     uint32_t ccsidr;
     uint32_t sets;
     uint32_t ways;
 
-    SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/  /* Level 1 data cache */
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
     __DSB();
 
     ccsidr = SCB->CCSIDR;
@@ -2389,15 +2435,15 @@
   \brief   Clean D-Cache
   \details Cleans D-Cache
   */
-__STATIC_INLINE void SCB_CleanDCache (void)
+__STATIC_FORCEINLINE void SCB_CleanDCache (void)
 {
   #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
     uint32_t ccsidr;
     uint32_t sets;
     uint32_t ways;
 
-     SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/  /* Level 1 data cache */
-   __DSB();
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
+    __DSB();
 
     ccsidr = SCB->CCSIDR;
 
@@ -2424,14 +2470,14 @@
   \brief   Clean & Invalidate D-Cache
   \details Cleans and Invalidates D-Cache
   */
-__STATIC_INLINE void SCB_CleanInvalidateDCache (void)
+__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void)
 {
   #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
     uint32_t ccsidr;
     uint32_t sets;
     uint32_t ways;
 
-    SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/  /* Level 1 data cache */
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
     __DSB();
 
     ccsidr = SCB->CCSIDR;
@@ -2457,27 +2503,30 @@
 
 /**
   \brief   D-Cache Invalidate by address
-  \details Invalidates D-Cache for the given address
-  \param[in]   addr    address (aligned to 32-byte boundary)
+  \details Invalidates D-Cache for the given address.
+           D-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
+           D-Cache memory blocks which are part of given address + given size are invalidated.
+  \param[in]   addr    address
   \param[in]   dsize   size of memory block (in number of bytes)
 */
-__STATIC_INLINE void SCB_InvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
+__STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (void *addr, int32_t dsize)
 {
   #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
-     int32_t op_size = dsize;
-    uint32_t op_addr = (uint32_t)addr;
-     int32_t linesize = 32;                /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */
+    if ( dsize > 0 ) { 
+       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
+      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
+    
+      __DSB();
 
-    __DSB();
+      do {
+        SCB->DCIMVAC = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */
+        op_addr += __SCB_DCACHE_LINE_SIZE;
+        op_size -= __SCB_DCACHE_LINE_SIZE;
+      } while ( op_size > 0 );
 
-    while (op_size > 0) {
-      SCB->DCIMVAC = op_addr;
-      op_addr += (uint32_t)linesize;
-      op_size -=           linesize;
+      __DSB();
+      __ISB();
     }
-
-    __DSB();
-    __ISB();
   #endif
 }
 
@@ -2485,26 +2534,29 @@
 /**
   \brief   D-Cache Clean by address
   \details Cleans D-Cache for the given address
-  \param[in]   addr    address (aligned to 32-byte boundary)
+           D-Cache is cleaned starting from a 32 byte aligned address in 32 byte granularity.
+           D-Cache memory blocks which are part of given address + given size are cleaned.
+  \param[in]   addr    address
   \param[in]   dsize   size of memory block (in number of bytes)
 */
-__STATIC_INLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize)
+__STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize)
 {
   #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
-     int32_t op_size = dsize;
-    uint32_t op_addr = (uint32_t) addr;
-     int32_t linesize = 32;                /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */
+    if ( dsize > 0 ) { 
+       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
+      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
+    
+      __DSB();
 
-    __DSB();
+      do {
+        SCB->DCCMVAC = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */
+        op_addr += __SCB_DCACHE_LINE_SIZE;
+        op_size -= __SCB_DCACHE_LINE_SIZE;
+      } while ( op_size > 0 );
 
-    while (op_size > 0) {
-      SCB->DCCMVAC = op_addr;
-      op_addr += (uint32_t)linesize;
-      op_size -=           linesize;
+      __DSB();
+      __ISB();
     }
-
-    __DSB();
-    __ISB();
   #endif
 }
 
@@ -2512,30 +2564,32 @@
 /**
   \brief   D-Cache Clean and Invalidate by address
   \details Cleans and invalidates D_Cache for the given address
+           D-Cache is cleaned and invalidated starting from a 32 byte aligned address in 32 byte granularity.
+           D-Cache memory blocks which are part of given address + given size are cleaned and invalidated.
   \param[in]   addr    address (aligned to 32-byte boundary)
   \param[in]   dsize   size of memory block (in number of bytes)
 */
-__STATIC_INLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
+__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
 {
   #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
-     int32_t op_size = dsize;
-    uint32_t op_addr = (uint32_t) addr;
-     int32_t linesize = 32;                /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */
+    if ( dsize > 0 ) { 
+       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
+      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
+    
+      __DSB();
 
-    __DSB();
+      do {
+        SCB->DCCIMVAC = op_addr;            /* register accepts only 32byte aligned values, only bits 31..5 are valid */
+        op_addr +=          __SCB_DCACHE_LINE_SIZE;
+        op_size -=          __SCB_DCACHE_LINE_SIZE;
+      } while ( op_size > 0 );
 
-    while (op_size > 0) {
-      SCB->DCCIMVAC = op_addr;
-      op_addr += (uint32_t)linesize;
-      op_size -=           linesize;
+      __DSB();
+      __ISB();
     }
-
-    __DSB();
-    __ISB();
   #endif
 }
 
-
 /*@} end of CMSIS_Core_CacheFunctions */
 
 
diff --git a/Core/Include/core_sc000.h b/Core/Include/core_sc000.h
index 9b67c92..cf92577 100644
--- a/Core/Include/core_sc000.h
+++ b/Core/Include/core_sc000.h
@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     core_sc000.h
  * @brief    CMSIS SC000 Core Peripheral Access Layer Header File
- * @version  V5.0.5
- * @date     28. May 2018
+ * @version  V5.0.6
+ * @date     12. November 2018
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -81,7 +81,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
+  #if defined __ARM_FP
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
@@ -750,7 +750,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -904,6 +906,7 @@
 {
   uint32_t *vectors = (uint32_t *)SCB->VTOR;
   vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  /* ARM Application Note 321 states that the M0 and M0+ do not require the architectural barrier - assume SC000 is the same */
 }
 
 
diff --git a/Core/Include/core_sc300.h b/Core/Include/core_sc300.h
index 3e8a471..40f3af8 100644
--- a/Core/Include/core_sc300.h
+++ b/Core/Include/core_sc300.h
@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     core_sc300.h
  * @brief    CMSIS SC300 Core Peripheral Access Layer Header File
- * @version  V5.0.6
- * @date     04. June 2018
+ * @version  V5.0.8
+ * @date     31. May 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -81,7 +81,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
+  #if defined __ARM_FP
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
@@ -342,7 +342,7 @@
   __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
         uint32_t RESERVED0[24U];
   __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[24U];
+        uint32_t RESERVED1[24U];
   __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
         uint32_t RESERVED2[24U];
   __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
@@ -653,13 +653,23 @@
 {
         uint32_t RESERVED0[1U];
   __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
-        uint32_t RESERVED1[1U];
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
 } SCnSCB_Type;
 
 /* Interrupt Controller Type Register Definitions */
 #define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
 #define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
 
+/* Auxiliary Control Register Definitions */
+#define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: DISFOLD Position */
+#define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */
+
+#define SCnSCB_ACTLR_DISDEFWBUF_Pos         1U                                         /*!< ACTLR: DISDEFWBUF Position */
+#define SCnSCB_ACTLR_DISDEFWBUF_Msk        (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)        /*!< ACTLR: DISDEFWBUF Mask */
+
+#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
+#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
+
 /*@} end of group CMSIS_SCnotSCB */
 
 
@@ -739,10 +749,7 @@
   __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
         uint32_t RESERVED2[15U];
   __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[29U];
-  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
-  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
-  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
+        uint32_t RESERVED3[32U];
         uint32_t RESERVED4[43U];
   __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
   __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
@@ -793,18 +800,6 @@
 #define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
 #define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
 
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
-
 /* ITM Lock Status Register Definitions */
 #define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
 #define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
@@ -1037,13 +1032,13 @@
 
 /* TPI Integration ETM Data Register Definitions (FIFO0) */
 #define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
 
 #define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
 #define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
 
 #define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
 
 #define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
 #define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
@@ -1066,13 +1061,13 @@
 
 /* TPI Integration ITM Data Register Definitions (FIFO1) */
 #define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
 
 #define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
 #define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
 
 #define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
 
 #define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
 #define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
@@ -1448,7 +1443,6 @@
 #define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
 
 
-
 /**
   \brief   Set Priority Grouping
   \details Sets the priority grouping field using the required unlock sequence.
@@ -1467,7 +1461,7 @@
   reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
   reg_value  =  (reg_value                                   |
                 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
   SCB->AIRCR =  reg_value;
 }
 
@@ -1493,7 +1487,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -1716,8 +1712,9 @@
  */
 __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
 {
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
+  /* ARM Application Note 321 states that the M3 does not require the architectural barrier */
 }
 
 
@@ -1731,8 +1728,8 @@
  */
 __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
 {
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
 }
 
 
diff --git a/Core/Include/mpu_armv7.h b/Core/Include/mpu_armv7.h
index 0142203..66ef59b 100644
--- a/Core/Include/mpu_armv7.h
+++ b/Core/Include/mpu_armv7.h
@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     mpu_armv7.h
  * @brief    CMSIS MPU API for Armv7-M MPU
- * @version  V5.0.4
- * @date     10. January 2018
+ * @version  V5.1.0
+ * @date     08. March 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2017-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -86,10 +86,10 @@
 * \param IsBufferable      Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
 */  
 #define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable)   \
-  ((((TypeExtField ) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk)                 | \
-   (((IsShareable ) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk)                      | \
-   (((IsCacheable ) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk)                      | \
-   (((IsBufferable ) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk))
+  ((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk)                  | \
+   (((IsShareable)  << MPU_RASR_S_Pos)   & MPU_RASR_S_Msk)                    | \
+   (((IsCacheable)  << MPU_RASR_C_Pos)   & MPU_RASR_C_Msk)                    | \
+   (((IsBufferable) << MPU_RASR_B_Pos)   & MPU_RASR_B_Msk))
 
 /**
 * MPU Region Attribute and Size Register Value
@@ -100,11 +100,14 @@
 * \param SubRegionDisable  Sub-region disable field.
 * \param Size              Region size of the region to be configured, for example 4K, 8K.
 */
-#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size)      \
-  ((((DisableExec ) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk)                                          | \
-   (((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk)                                      | \
-   (((AccessAttributes) ) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk)))
-  
+#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size)    \
+  ((((DisableExec)      << MPU_RASR_XN_Pos)   & MPU_RASR_XN_Msk)                                  | \
+   (((AccessPermission) << MPU_RASR_AP_Pos)   & MPU_RASR_AP_Msk)                                  | \
+   (((AccessAttributes) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) | \
+   (((SubRegionDisable) << MPU_RASR_SRD_Pos)  & MPU_RASR_SRD_Msk)                                 | \
+   (((Size)             << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk)                                | \
+   (((MPU_RASR_ENABLE_Msk))))
+
 /**
 * MPU Region Attribute and Size Register Value
 * 
@@ -131,7 +134,7 @@
 
 /**
 * MPU Memory Access Attribute for device memory.
-*  - TEX: 000b (if non-shareable) or 010b (if shareable)
+*  - TEX: 000b (if shareable) or 010b (if non-shareable)
 *  - Shareable or non-shareable
 *  - Non-cacheable
 *  - Bufferable (if shareable) or non-bufferable (if non-shareable)
@@ -187,20 +190,19 @@
 */
 __STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
 {
-  __DSB();
-  __ISB();
   MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
 #ifdef SCB_SHCSR_MEMFAULTENA_Msk
   SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
 #endif
+  __DSB();
+  __ISB();
 }
 
 /** Disable the MPU.
 */
 __STATIC_INLINE void ARM_MPU_Disable(void)
 {
-  __DSB();
-  __ISB();
+  __DMB();
 #ifdef SCB_SHCSR_MEMFAULTENA_Msk
   SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
 #endif
@@ -243,7 +245,7 @@
 * \param src Source data is copied from.
 * \param len Amount of data words to be copied.
 */
-__STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
+__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
 {
   uint32_t i;
   for (i = 0U; i < len; ++i) 
@@ -260,11 +262,11 @@
 {
   const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
   while (cnt > MPU_TYPE_RALIASES) {
-    orderedCpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
+    ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
     table += MPU_TYPE_RALIASES;
     cnt -= MPU_TYPE_RALIASES;
   }
-  orderedCpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
+  ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
 }
 
 #endif
diff --git a/Core/Include/mpu_armv8.h b/Core/Include/mpu_armv8.h
index 62571da..0041d4d 100644
--- a/Core/Include/mpu_armv8.h
+++ b/Core/Include/mpu_armv8.h
@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     mpu_armv8.h
- * @brief    CMSIS MPU API for Armv8-M MPU
- * @version  V5.0.4
- * @date     10. January 2018
+ * @brief    CMSIS MPU API for Armv8-M and Armv8.1-M MPU
+ * @version  V5.1.0
+ * @date     08. March 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2017-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -101,6 +101,21 @@
   ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
   (MPU_RLAR_EN_Msk))
 
+#if defined(MPU_RLAR_PXN_Pos)
+  
+/** \brief Region Limit Address Register with PXN value
+* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
+* \param PXN Privileged execute never. Defines whether code can be executed from this privileged region.
+* \param IDX The attribute index to be associated with this memory region.
+*/
+#define ARM_MPU_RLAR_PXN(LIMIT, PXN, IDX) \
+  ((LIMIT & MPU_RLAR_LIMIT_Msk) | \
+  ((PXN << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \
+  ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
+  (MPU_RLAR_EN_Msk))
+  
+#endif
+
 /**
 * Struct for a single MPU Region
 */
@@ -114,20 +129,19 @@
 */
 __STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
 {
-  __DSB();
-  __ISB();
   MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
 #ifdef SCB_SHCSR_MEMFAULTENA_Msk
   SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
 #endif
+  __DSB();
+  __ISB();
 }
 
 /** Disable the MPU.
 */
 __STATIC_INLINE void ARM_MPU_Disable(void)
 {
-  __DSB();
-  __ISB();
+  __DMB();
 #ifdef SCB_SHCSR_MEMFAULTENA_Msk
   SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
 #endif
@@ -140,20 +154,19 @@
 */
 __STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)
 {
-  __DSB();
-  __ISB();
   MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
 #ifdef SCB_SHCSR_MEMFAULTENA_Msk
   SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
 #endif
+  __DSB();
+  __ISB();
 }
 
 /** Disable the Non-secure MPU.
 */
 __STATIC_INLINE void ARM_MPU_Disable_NS(void)
 {
-  __DSB();
-  __ISB();
+  __DMB();
 #ifdef SCB_SHCSR_MEMFAULTENA_Msk
   SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
 #endif
@@ -267,7 +280,7 @@
 * \param src Source data is copied from.
 * \param len Amount of data words to be copied.
 */
-__STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
+__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
 {
   uint32_t i;
   for (i = 0U; i < len; ++i) 
@@ -287,7 +300,7 @@
   const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
   if (cnt == 1U) {
     mpu->RNR = rnr;
-    orderedCpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);
+    ARM_MPU_OrderedMemcpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);
   } else {
     uint32_t rnrBase   = rnr & ~(MPU_TYPE_RALIASES-1U);
     uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
@@ -295,7 +308,7 @@
     mpu->RNR = rnrBase;
     while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
       uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
-      orderedCpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize);
+      ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize);
       table += c;
       cnt -= c;
       rnrOffset = 0U;
@@ -303,7 +316,7 @@
       mpu->RNR = rnrBase;
     }
     
-    orderedCpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
+    ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
   }
 }
 
diff --git a/Core_A/Include/cmsis_armcc.h b/Core_A/Include/cmsis_armcc.h
deleted file mode 100644
index 313d743..0000000
--- a/Core_A/Include/cmsis_armcc.h
+++ /dev/null
@@ -1,544 +0,0 @@
-/**************************************************************************//**
- * @file     cmsis_armcc.h
- * @brief    CMSIS compiler specific macros, functions, instructions
- * @version  V1.0.2
- * @date     10. January 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __CMSIS_ARMCC_H
-#define __CMSIS_ARMCC_H
-
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
-  #error "Please use Arm Compiler Toolchain V4.0.677 or later!"
-#endif
-
-/* CMSIS compiler control architecture macros */
-#if (defined (__TARGET_ARCH_7_A ) && (__TARGET_ARCH_7_A  == 1))
-  #define __ARM_ARCH_7A__           1
-#endif
-
-/* CMSIS compiler specific defines */
-#ifndef   __ASM
-  #define __ASM                                  __asm
-#endif
-#ifndef   __INLINE
-  #define __INLINE                               __inline
-#endif
-#ifndef   __FORCEINLINE
-  #define __FORCEINLINE                          __forceinline
-#endif
-#ifndef   __STATIC_INLINE
-  #define __STATIC_INLINE                        static __inline
-#endif
-#ifndef   __STATIC_FORCEINLINE
-  #define __STATIC_FORCEINLINE                   static __forceinline
-#endif
-#ifndef   __NO_RETURN
-  #define __NO_RETURN                            __declspec(noreturn)
-#endif
-#ifndef   CMSIS_DEPRECATED
-  #define CMSIS_DEPRECATED                       __attribute__((deprecated))
-#endif
-#ifndef   __USED
-  #define __USED                                 __attribute__((used))
-#endif
-#ifndef   __WEAK
-  #define __WEAK                                 __attribute__((weak))
-#endif
-#ifndef   __PACKED
-  #define __PACKED                               __attribute__((packed))
-#endif
-#ifndef   __PACKED_STRUCT
-  #define __PACKED_STRUCT                        __packed struct
-#endif
-#ifndef   __UNALIGNED_UINT16_WRITE
-  #define __UNALIGNED_UINT16_WRITE(addr, val)    ((*((__packed uint16_t *)(addr))) = (val))
-#endif
-#ifndef   __UNALIGNED_UINT16_READ
-  #define __UNALIGNED_UINT16_READ(addr)          (*((const __packed uint16_t *)(addr)))
-#endif
-#ifndef   __UNALIGNED_UINT32_WRITE
-  #define __UNALIGNED_UINT32_WRITE(addr, val)    ((*((__packed uint32_t *)(addr))) = (val))
-#endif
-#ifndef   __UNALIGNED_UINT32_READ
-  #define __UNALIGNED_UINT32_READ(addr)          (*((const __packed uint32_t *)(addr)))
-#endif
-#ifndef   __ALIGNED
-  #define __ALIGNED(x)                           __attribute__((aligned(x)))
-#endif
-#ifndef   __PACKED
-  #define __PACKED                               __attribute__((packed))
-#endif
-
-/* ##########################  Core Instruction Access  ######################### */
-/**
-  \brief   No Operation
- */
-#define __NOP                             __nop
-
-/**
-  \brief   Wait For Interrupt
- */
-#define __WFI                             __wfi
-
-/**
-  \brief   Wait For Event
- */
-#define __WFE                             __wfe
-
-/**
-  \brief   Send Event
- */
-#define __SEV                             __sev
-
-/**
-  \brief   Instruction Synchronization Barrier
- */
-#define __ISB() do {\
-                   __schedule_barrier();\
-                   __isb(0xF);\
-                   __schedule_barrier();\
-                } while (0U)
-
-/**
-  \brief   Data Synchronization Barrier
- */
-#define __DSB() do {\
-                   __schedule_barrier();\
-                   __dsb(0xF);\
-                   __schedule_barrier();\
-                } while (0U)
-
-/**
-  \brief   Data Memory Barrier
- */
-#define __DMB() do {\
-                   __schedule_barrier();\
-                   __dmb(0xF);\
-                   __schedule_barrier();\
-                } while (0U)
-
-/**
-  \brief   Reverse byte order (32 bit)
-  \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#define __REV                             __rev
-
-/**
-  \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
-{
-  rev16 r0, r0
-  bx lr
-}
-#endif
-
-/**
-  \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value)
-{
-  revsh r0, r0
-  bx lr
-}
-#endif
-
-/**
-  \brief   Rotate Right in unsigned value (32 bit)
-  \param [in]    op1  Value to rotate
-  \param [in]    op2  Number of Bits to rotate
-  \return               Rotated value
- */
-#define __ROR                             __ror
-
-/**
-  \brief   Breakpoint
-  \param [in]    value  is ignored by the processor.
-                 If required, a debugger can use it to store additional information about the breakpoint.
- */
-#define __BKPT(value)                     __breakpoint(value)
-
-/**
-  \brief   Reverse bit order of value
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#define __RBIT                            __rbit
-
-/**
-  \brief   Count leading zeros
-  \param [in]  value  Value to count the leading zeros
-  \return             number of leading zeros in value
- */
-#define __CLZ                             __clz
-
-/**
-  \brief   LDR Exclusive (8 bit)
-  \details Executes a exclusive LDR instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __LDREXB(ptr)                                                        ((uint8_t ) __ldrex(ptr))
-#else
-  #define __LDREXB(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr))  _Pragma("pop")
-#endif
-
-/**
-  \brief   LDR Exclusive (16 bit)
-  \details Executes a exclusive LDR instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __LDREXH(ptr)                                                        ((uint16_t) __ldrex(ptr))
-#else
-  #define __LDREXH(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr))  _Pragma("pop")
-#endif
-
-/**
-  \brief   LDR Exclusive (32 bit)
-  \details Executes a exclusive LDR instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __LDREXW(ptr)                                                        ((uint32_t ) __ldrex(ptr))
-#else
-  #define __LDREXW(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr))  _Pragma("pop")
-#endif
-
-/**
-  \brief   STR Exclusive (8 bit)
-  \details Executes a exclusive STR instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __STREXB(value, ptr)                                                 __strex(value, ptr)
-#else
-  #define __STREXB(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
-#endif
-
-/**
-  \brief   STR Exclusive (16 bit)
-  \details Executes a exclusive STR instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __STREXH(value, ptr)                                                 __strex(value, ptr)
-#else
-  #define __STREXH(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
-#endif
-
-/**
-  \brief   STR Exclusive (32 bit)
-  \details Executes a exclusive STR instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __STREXW(value, ptr)                                                 __strex(value, ptr)
-#else
-  #define __STREXW(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
-#endif
-
-/**
-  \brief   Remove the exclusive lock
-  \details Removes the exclusive lock which is created by LDREX.
- */
-#define __CLREX                           __clrex
-
-
-/**
-  \brief   Signed Saturate
-  \details Saturates a signed value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (1..32)
-  \return             Saturated value
- */
-#define __SSAT                            __ssat
-
-/**
-  \brief   Unsigned Saturate
-  \details Saturates an unsigned value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (0..31)
-  \return             Saturated value
- */
-#define __USAT                            __usat
-
-/* ###########################  Core Function Access  ########################### */
-
-/**
-  \brief   Get FPSCR (Floating Point Status/Control)
-  \return               Floating Point Status/Control register value
- */
-__STATIC_INLINE uint32_t __get_FPSCR(void)
-{
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-  register uint32_t __regfpscr         __ASM("fpscr");
-  return(__regfpscr);
-#else
-   return(0U);
-#endif
-}
-
-/**
-  \brief   Set FPSCR (Floating Point Status/Control)
-  \param [in]    fpscr  Floating Point Status/Control value to set
- */
-__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-  register uint32_t __regfpscr         __ASM("fpscr");
-  __regfpscr = (fpscr);
-#else
-  (void)fpscr;
-#endif
-}
-
-/** \brief  Get CPSR (Current Program Status Register)
-    \return               CPSR Register value
- */
-__STATIC_INLINE uint32_t __get_CPSR(void)
-{
-  register uint32_t __regCPSR          __ASM("cpsr");
-  return(__regCPSR);
-}
-
-
-/** \brief  Set CPSR (Current Program Status Register)
-    \param [in]    cpsr  CPSR value to set
- */
-__STATIC_INLINE void __set_CPSR(uint32_t cpsr)
-{
-  register uint32_t __regCPSR          __ASM("cpsr");
-  __regCPSR = cpsr;
-}
-
-/** \brief  Get Mode
-    \return                Processor Mode
- */
-__STATIC_INLINE uint32_t __get_mode(void)
-{
-  return (__get_CPSR() & 0x1FU);
-}
-
-/** \brief  Set Mode
-    \param [in]    mode  Mode value to set
- */
-__STATIC_INLINE __ASM void __set_mode(uint32_t mode)
-{
-  MOV  r1, lr
-  MSR  CPSR_C, r0
-  BX   r1
-}
-
-/** \brief  Get Stack Pointer
-    \return Stack Pointer
- */
-__STATIC_INLINE __ASM uint32_t __get_SP(void)
-{
-  MOV  r0, sp
-  BX   lr
-}
-
-/** \brief  Set Stack Pointer
-    \param [in]    stack  Stack Pointer value to set
- */
-__STATIC_INLINE __ASM void __set_SP(uint32_t stack)
-{
-  MOV  sp, r0
-  BX   lr
-}
-
-
-/** \brief  Get USR/SYS Stack Pointer
-    \return USR/SYSStack Pointer
- */
-__STATIC_INLINE __ASM uint32_t __get_SP_usr(void)
-{
-  ARM
-  PRESERVE8
-
-  MRS     R1, CPSR
-  CPS     #0x1F       ;no effect in USR mode
-  MOV     R0, SP
-  MSR     CPSR_c, R1  ;no effect in USR mode
-  ISB
-  BX      LR
-}
-
-/** \brief  Set USR/SYS Stack Pointer
-    \param [in]    topOfProcStack  USR/SYS Stack Pointer value to set
- */
-__STATIC_INLINE __ASM void __set_SP_usr(uint32_t topOfProcStack)
-{
-  ARM
-  PRESERVE8
-
-  MRS     R1, CPSR
-  CPS     #0x1F       ;no effect in USR mode
-  MOV     SP, R0
-  MSR     CPSR_c, R1  ;no effect in USR mode
-  ISB
-  BX      LR
-}
-
-/** \brief  Get FPEXC (Floating Point Exception Control Register)
-    \return               Floating Point Exception Control Register value
- */
-__STATIC_INLINE uint32_t __get_FPEXC(void)
-{
-#if (__FPU_PRESENT == 1)
-  register uint32_t __regfpexc         __ASM("fpexc");
-  return(__regfpexc);
-#else
-  return(0);
-#endif
-}
-
-/** \brief  Set FPEXC (Floating Point Exception Control Register)
-    \param [in]    fpexc  Floating Point Exception Control value to set
- */
-__STATIC_INLINE void __set_FPEXC(uint32_t fpexc)
-{
-#if (__FPU_PRESENT == 1)
-  register uint32_t __regfpexc         __ASM("fpexc");
-  __regfpexc = (fpexc);
-#endif
-}
-
-/*
- * Include common core functions to access Coprocessor 15 registers
- */
-
-#define __get_CP(cp, op1, Rt, CRn, CRm, op2) do { register volatile uint32_t tmp __ASM("cp" # cp ":" # op1 ":c" # CRn ":c" # CRm ":" # op2); (Rt) = tmp; } while(0)
-#define __set_CP(cp, op1, Rt, CRn, CRm, op2) do { register volatile uint32_t tmp __ASM("cp" # cp ":" # op1 ":c" # CRn ":c" # CRm ":" # op2); tmp = (Rt); } while(0)
-#define __get_CP64(cp, op1, Rt, CRm) \
-  do { \
-    uint32_t ltmp, htmp; \
-    __ASM volatile("MRRC p" # cp ", " # op1 ", ltmp, htmp, c" # CRm); \
-    (Rt) = ((((uint64_t)htmp) << 32U) | ((uint64_t)ltmp)); \
-  } while(0)
-
-#define __set_CP64(cp, op1, Rt, CRm) \
-  do { \
-    const uint64_t tmp = (Rt); \
-    const uint32_t ltmp = (uint32_t)(tmp); \
-    const uint32_t htmp = (uint32_t)(tmp >> 32U); \
-    __ASM volatile("MCRR p" # cp ", " # op1 ", ltmp, htmp, c" # CRm); \
-  } while(0)
-
-#include "cmsis_cp15.h"
-
-/** \brief  Enable Floating Point Unit
-
-  Critical section, called from undef handler, so systick is disabled
- */
-__STATIC_INLINE __ASM void __FPU_Enable(void)
-{
-        ARM
-
-        //Permit access to VFP/NEON, registers by modifying CPACR
-        MRC     p15,0,R1,c1,c0,2
-        ORR     R1,R1,#0x00F00000
-        MCR     p15,0,R1,c1,c0,2
-
-        //Ensure that subsequent instructions occur in the context of VFP/NEON access permitted
-        ISB
-
-        //Enable VFP/NEON
-        VMRS    R1,FPEXC
-        ORR     R1,R1,#0x40000000
-        VMSR    FPEXC,R1
-
-        //Initialise VFP/NEON registers to 0
-        MOV     R2,#0
-
-        //Initialise D16 registers to 0
-        VMOV    D0, R2,R2
-        VMOV    D1, R2,R2
-        VMOV    D2, R2,R2
-        VMOV    D3, R2,R2
-        VMOV    D4, R2,R2
-        VMOV    D5, R2,R2
-        VMOV    D6, R2,R2
-        VMOV    D7, R2,R2
-        VMOV    D8, R2,R2
-        VMOV    D9, R2,R2
-        VMOV    D10,R2,R2
-        VMOV    D11,R2,R2
-        VMOV    D12,R2,R2
-        VMOV    D13,R2,R2
-        VMOV    D14,R2,R2
-        VMOV    D15,R2,R2
-
-  IF {TARGET_FEATURE_EXTENSION_REGISTER_COUNT} == 32
-        //Initialise D32 registers to 0
-        VMOV    D16,R2,R2
-        VMOV    D17,R2,R2
-        VMOV    D18,R2,R2
-        VMOV    D19,R2,R2
-        VMOV    D20,R2,R2
-        VMOV    D21,R2,R2
-        VMOV    D22,R2,R2
-        VMOV    D23,R2,R2
-        VMOV    D24,R2,R2
-        VMOV    D25,R2,R2
-        VMOV    D26,R2,R2
-        VMOV    D27,R2,R2
-        VMOV    D28,R2,R2
-        VMOV    D29,R2,R2
-        VMOV    D30,R2,R2
-        VMOV    D31,R2,R2
-  ENDIF
-
-        //Initialise FPSCR to a known state
-        VMRS    R2,FPSCR
-        LDR     R3,=0x00086060 //Mask off all bits that do not have to be preserved. Non-preserved bits can/should be zero.
-        AND     R2,R2,R3
-        VMSR    FPSCR,R2
-
-        BX      LR
-}
-
-#endif /* __CMSIS_ARMCC_H */
diff --git a/Core_A/Include/cmsis_armclang.h b/Core_A/Include/cmsis_armclang.h
deleted file mode 100644
index 5883364..0000000
--- a/Core_A/Include/cmsis_armclang.h
+++ /dev/null
@@ -1,503 +0,0 @@
-/**************************************************************************//**
- * @file     cmsis_armclang.h
- * @brief    CMSIS compiler specific macros, functions, instructions
- * @version  V1.0.2
- * @date     10. January 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __CMSIS_ARMCLANG_H
-#define __CMSIS_ARMCLANG_H
-
-#pragma clang system_header   /* treat file as system include file */
-
-#ifndef __ARM_COMPAT_H
-#include <arm_compat.h>    /* Compatibility header for Arm Compiler 5 intrinsics */
-#endif
-
-/* CMSIS compiler specific defines */
-#ifndef   __ASM
-  #define __ASM                                  __asm
-#endif
-#ifndef   __INLINE
-  #define __INLINE                               __inline
-#endif
-#ifndef   __FORCEINLINE
-  #define __FORCEINLINE                          __attribute__((always_inline))
-#endif
-#ifndef   __STATIC_INLINE
-  #define __STATIC_INLINE                        static __inline
-#endif
-#ifndef   __STATIC_FORCEINLINE
-  #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static __inline
-#endif
-#ifndef   __NO_RETURN
-  #define __NO_RETURN                            __attribute__((__noreturn__))
-#endif
-#ifndef   CMSIS_DEPRECATED
-  #define CMSIS_DEPRECATED                       __attribute__((deprecated))
-#endif
-#ifndef   __USED
-  #define __USED                                 __attribute__((used))
-#endif
-#ifndef   __WEAK
-  #define __WEAK                                 __attribute__((weak))
-#endif
-#ifndef   __PACKED
-  #define __PACKED                               __attribute__((packed, aligned(1)))
-#endif
-#ifndef   __PACKED_STRUCT
-  #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
-#endif
-#ifndef   __UNALIGNED_UINT16_WRITE
-  #pragma clang diagnostic push
-  #pragma clang diagnostic ignored "-Wpacked"
-/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */
-  __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
-  #pragma clang diagnostic pop
-  #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
-#endif
-#ifndef   __UNALIGNED_UINT16_READ
-  #pragma clang diagnostic push
-  #pragma clang diagnostic ignored "-Wpacked"
-/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */
-  __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
-  #pragma clang diagnostic pop
-  #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
-#endif
-#ifndef   __UNALIGNED_UINT32_WRITE
-  #pragma clang diagnostic push
-  #pragma clang diagnostic ignored "-Wpacked"
-/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */
-  __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
-  #pragma clang diagnostic pop
-  #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
-#endif
-#ifndef   __UNALIGNED_UINT32_READ
-  #pragma clang diagnostic push
-  #pragma clang diagnostic ignored "-Wpacked"
-  __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
-  #pragma clang diagnostic pop
-  #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
-#endif
-#ifndef   __ALIGNED
-  #define __ALIGNED(x)                           __attribute__((aligned(x)))
-#endif
-#ifndef   __PACKED
-  #define __PACKED                               __attribute__((packed))
-#endif
-
-/* ##########################  Core Instruction Access  ######################### */
-/**
-  \brief   No Operation
- */
-#define __NOP                             __builtin_arm_nop
-
-/**
-  \brief   Wait For Interrupt
- */
-#define __WFI                             __builtin_arm_wfi
-
-/**
-  \brief   Wait For Event
- */
-#define __WFE                             __builtin_arm_wfe
-
-/**
-  \brief   Send Event
- */
-#define __SEV                             __builtin_arm_sev
-
-/**
-  \brief   Instruction Synchronization Barrier
- */
-#define __ISB() do {\
-                   __schedule_barrier();\
-                   __builtin_arm_isb(0xF);\
-                   __schedule_barrier();\
-                } while (0U)
-
-/**
-  \brief   Data Synchronization Barrier
- */
-#define __DSB() do {\
-                   __schedule_barrier();\
-                   __builtin_arm_dsb(0xF);\
-                   __schedule_barrier();\
-                } while (0U)
-
-/**
-  \brief   Data Memory Barrier
- */
-#define __DMB() do {\
-                   __schedule_barrier();\
-                   __builtin_arm_dmb(0xF);\
-                   __schedule_barrier();\
-                } while (0U)
-
-/**
-  \brief   Reverse byte order (32 bit)
-  \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#define __REV(value)   __builtin_bswap32(value)
-
-/**
-  \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#define __REV16(value) __ROR(__REV(value), 16)
-
-
-/**
-  \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#define __REVSH(value) (int16_t)__builtin_bswap16(value)
-
-
-/**
-  \brief   Rotate Right in unsigned value (32 bit)
-  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
-  \param [in]    op1  Value to rotate
-  \param [in]    op2  Number of Bits to rotate
-  \return               Rotated value
- */
-__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
-{
-  op2 %= 32U;
-  if (op2 == 0U)
-  {
-    return op1;
-  }
-  return (op1 >> op2) | (op1 << (32U - op2));
-}
-
-
-/**
-  \brief   Breakpoint
-  \param [in]    value  is ignored by the processor.
-                 If required, a debugger can use it to store additional information about the breakpoint.
- */
-#define __BKPT(value)   __ASM volatile ("bkpt "#value)
-
-/**
-  \brief   Reverse bit order of value
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#define __RBIT          __builtin_arm_rbit
-
-/**
-  \brief   Count leading zeros
-  \param [in]  value  Value to count the leading zeros
-  \return             number of leading zeros in value
- */
-#define __CLZ           (uint8_t)__builtin_clz
-
-/**
-  \brief   LDR Exclusive (8 bit)
-  \details Executes a exclusive LDR instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-#define __LDREXB        (uint8_t)__builtin_arm_ldrex
-
-
-/**
-  \brief   LDR Exclusive (16 bit)
-  \details Executes a exclusive LDR instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-#define __LDREXH        (uint16_t)__builtin_arm_ldrex
-
-/**
-  \brief   LDR Exclusive (32 bit)
-  \details Executes a exclusive LDR instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-#define __LDREXW        (uint32_t)__builtin_arm_ldrex
-
-/**
-  \brief   STR Exclusive (8 bit)
-  \details Executes a exclusive STR instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#define __STREXB        (uint32_t)__builtin_arm_strex
-
-/**
-  \brief   STR Exclusive (16 bit)
-  \details Executes a exclusive STR instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#define __STREXH        (uint32_t)__builtin_arm_strex
-
-/**
-  \brief   STR Exclusive (32 bit)
-  \details Executes a exclusive STR instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#define __STREXW        (uint32_t)__builtin_arm_strex
-
-/**
-  \brief   Remove the exclusive lock
-  \details Removes the exclusive lock which is created by LDREX.
- */
-#define __CLREX             __builtin_arm_clrex
-
-/**
-  \brief   Signed Saturate
-  \details Saturates a signed value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (1..32)
-  \return             Saturated value
- */
-#define __SSAT             __builtin_arm_ssat
-
-/**
-  \brief   Unsigned Saturate
-  \details Saturates an unsigned value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (0..31)
-  \return             Saturated value
- */
-#define __USAT             __builtin_arm_usat
-
-
-/* ###########################  Core Function Access  ########################### */
-
-/**
-  \brief   Get FPSCR
-  \details Returns the current value of the Floating Point Status/Control register.
-  \return               Floating Point Status/Control register value
- */
-#define __get_FPSCR      __builtin_arm_get_fpscr
-
-/**
-  \brief   Set FPSCR
-  \details Assigns the given value to the Floating Point Status/Control register.
-  \param [in]    fpscr  Floating Point Status/Control value to set
- */
-#define __set_FPSCR      __builtin_arm_set_fpscr
-
-/** \brief  Get CPSR Register
-    \return               CPSR Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_CPSR(void)
-{
-  uint32_t result;
-  __ASM volatile("MRS %0, cpsr" : "=r" (result) );
-  return(result);
-}
-
-/** \brief  Set CPSR Register
-    \param [in]    cpsr  CPSR value to set
- */
-__STATIC_FORCEINLINE void __set_CPSR(uint32_t cpsr)
-{
-__ASM volatile ("MSR cpsr, %0" : : "r" (cpsr) : "memory");
-}
-
-/** \brief  Get Mode
-    \return                Processor Mode
- */
-__STATIC_FORCEINLINE uint32_t __get_mode(void)
-{
-	return (__get_CPSR() & 0x1FU);
-}
-
-/** \brief  Set Mode
-    \param [in]    mode  Mode value to set
- */
-__STATIC_FORCEINLINE void __set_mode(uint32_t mode)
-{
-  __ASM volatile("MSR  cpsr_c, %0" : : "r" (mode) : "memory");
-}
-
-/** \brief  Get Stack Pointer
-    \return Stack Pointer value
- */
-__STATIC_FORCEINLINE uint32_t __get_SP()
-{
-  uint32_t result;
-  __ASM volatile("MOV  %0, sp" : "=r" (result) : : "memory");
-  return result;
-}
-
-/** \brief  Set Stack Pointer
-    \param [in]    stack  Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __set_SP(uint32_t stack)
-{
-  __ASM volatile("MOV  sp, %0" : : "r" (stack) : "memory");
-}
-
-/** \brief  Get USR/SYS Stack Pointer
-    \return USR/SYS Stack Pointer value
- */
-__STATIC_FORCEINLINE uint32_t __get_SP_usr()
-{
-  uint32_t cpsr;
-  uint32_t result;
-  __ASM volatile(
-    "MRS     %0, cpsr   \n"
-    "CPS     #0x1F      \n" // no effect in USR mode
-    "MOV     %1, sp     \n"
-    "MSR     cpsr_c, %2 \n" // no effect in USR mode
-    "ISB" :  "=r"(cpsr), "=r"(result) : "r"(cpsr) : "memory"
-   );
-  return result;
-}
-
-/** \brief  Set USR/SYS Stack Pointer
-    \param [in]    topOfProcStack  USR/SYS Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __set_SP_usr(uint32_t topOfProcStack)
-{
-  uint32_t cpsr;
-  __ASM volatile(
-    "MRS     %0, cpsr   \n"
-    "CPS     #0x1F      \n" // no effect in USR mode
-    "MOV     sp, %1     \n"
-    "MSR     cpsr_c, %2 \n" // no effect in USR mode
-    "ISB" : "=r"(cpsr) : "r" (topOfProcStack), "r"(cpsr) : "memory"
-   );
-}
-
-/** \brief  Get FPEXC
-    \return               Floating Point Exception Control register value
- */
-__STATIC_FORCEINLINE uint32_t __get_FPEXC(void)
-{
-#if (__FPU_PRESENT == 1)
-  uint32_t result;
-  __ASM volatile("VMRS %0, fpexc" : "=r" (result) : : "memory");
-  return(result);
-#else
-  return(0);
-#endif
-}
-
-/** \brief  Set FPEXC
-    \param [in]    fpexc  Floating Point Exception Control value to set
- */
-__STATIC_FORCEINLINE void __set_FPEXC(uint32_t fpexc)
-{
-#if (__FPU_PRESENT == 1)
-  __ASM volatile ("VMSR fpexc, %0" : : "r" (fpexc) : "memory");
-#endif
-}
-
-/*
- * Include common core functions to access Coprocessor 15 registers
- */
-
-#define __get_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : "=r" (Rt) : : "memory" )
-#define __set_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MCR p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : : "r" (Rt) : "memory" )
-#define __get_CP64(cp, op1, Rt, CRm)         __ASM volatile("MRRC p" # cp ", " # op1 ", %Q0, %R0, c" # CRm  : "=r" (Rt) : : "memory" )
-#define __set_CP64(cp, op1, Rt, CRm)         __ASM volatile("MCRR p" # cp ", " # op1 ", %Q0, %R0, c" # CRm  : : "r" (Rt) : "memory" )
-
-#include "cmsis_cp15.h"
-
-/** \brief  Enable Floating Point Unit
-
-  Critical section, called from undef handler, so systick is disabled
- */
-__STATIC_INLINE void __FPU_Enable(void)
-{
-  __ASM volatile(
-    //Permit access to VFP/NEON, registers by modifying CPACR
-    "        MRC     p15,0,R1,c1,c0,2  \n"
-    "        ORR     R1,R1,#0x00F00000 \n"
-    "        MCR     p15,0,R1,c1,c0,2  \n"
-
-    //Ensure that subsequent instructions occur in the context of VFP/NEON access permitted
-    "        ISB                       \n"
-
-    //Enable VFP/NEON
-    "        VMRS    R1,FPEXC          \n"
-    "        ORR     R1,R1,#0x40000000 \n"
-    "        VMSR    FPEXC,R1          \n"
-
-    //Initialise VFP/NEON registers to 0
-    "        MOV     R2,#0             \n"
-
-    //Initialise D16 registers to 0
-    "        VMOV    D0, R2,R2         \n"
-    "        VMOV    D1, R2,R2         \n"
-    "        VMOV    D2, R2,R2         \n"
-    "        VMOV    D3, R2,R2         \n"
-    "        VMOV    D4, R2,R2         \n"
-    "        VMOV    D5, R2,R2         \n"
-    "        VMOV    D6, R2,R2         \n"
-    "        VMOV    D7, R2,R2         \n"
-    "        VMOV    D8, R2,R2         \n"
-    "        VMOV    D9, R2,R2         \n"
-    "        VMOV    D10,R2,R2         \n"
-    "        VMOV    D11,R2,R2         \n"
-    "        VMOV    D12,R2,R2         \n"
-    "        VMOV    D13,R2,R2         \n"
-    "        VMOV    D14,R2,R2         \n"
-    "        VMOV    D15,R2,R2         \n"
-
-#if __ARM_NEON == 1
-    //Initialise D32 registers to 0
-    "        VMOV    D16,R2,R2         \n"
-    "        VMOV    D17,R2,R2         \n"
-    "        VMOV    D18,R2,R2         \n"
-    "        VMOV    D19,R2,R2         \n"
-    "        VMOV    D20,R2,R2         \n"
-    "        VMOV    D21,R2,R2         \n"
-    "        VMOV    D22,R2,R2         \n"
-    "        VMOV    D23,R2,R2         \n"
-    "        VMOV    D24,R2,R2         \n"
-    "        VMOV    D25,R2,R2         \n"
-    "        VMOV    D26,R2,R2         \n"
-    "        VMOV    D27,R2,R2         \n"
-    "        VMOV    D28,R2,R2         \n"
-    "        VMOV    D29,R2,R2         \n"
-    "        VMOV    D30,R2,R2         \n"
-    "        VMOV    D31,R2,R2         \n"
-#endif
-
-    //Initialise FPSCR to a known state
-    "        VMRS    R2,FPSCR          \n"
-    "        LDR     R3,=0x00086060    \n" //Mask off all bits that do not have to be preserved. Non-preserved bits can/should be zero.
-    "        AND     R2,R2,R3          \n"
-    "        VMSR    FPSCR,R2            "
-  );
-}
-
-#endif /* __CMSIS_ARMCLANG_H */
diff --git a/Core_A/Include/cmsis_compiler.h b/Core_A/Include/cmsis_compiler.h
deleted file mode 100644
index b00c6ba..0000000
--- a/Core_A/Include/cmsis_compiler.h
+++ /dev/null
@@ -1,201 +0,0 @@
-/**************************************************************************//**
- * @file     cmsis_compiler.h
- * @brief    CMSIS compiler specific macros, functions, instructions
- * @version  V1.0.2
- * @date     10. January 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __CMSIS_COMPILER_H
-#define __CMSIS_COMPILER_H
-
-#include <stdint.h>
-
-/*
- * Arm Compiler 4/5
- */
-#if   defined ( __CC_ARM )
-  #include "cmsis_armcc.h"
-
-
-/*
- * Arm Compiler 6 (armclang)
- */
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #include "cmsis_armclang.h"
-
-
-/*
- * GNU Compiler
- */
-#elif defined ( __GNUC__ )
-  #include "cmsis_gcc.h"
-
-
-/*
- * IAR Compiler
- */
-#elif defined ( __ICCARM__ )
-  #include "cmsis_iccarm.h"
-
-
-/*
- * TI Arm Compiler
- */
-#elif defined ( __TI_ARM__ )
-  #include <cmsis_ccs.h>
-
-  #ifndef   __ASM
-    #define __ASM                     __asm
-  #endif
-  #ifndef   __INLINE
-    #define __INLINE                  inline
-  #endif
-  #ifndef   __STATIC_INLINE
-    #define __STATIC_INLINE           static inline
-  #endif
-  #ifndef   __STATIC_INLINE
-    #define __STATIC_INLINE           static inline
-  #endif
-  #ifndef   __STATIC_FORCEINLINE
-    #define __STATIC_FORCEINLINE      __STATIC_INLINE
-  #endif
-  #ifndef   __NO_RETURN
-    #define __NO_RETURN               __attribute__((noreturn))
-  #endif
-  #ifndef   CMSIS_DEPRECATED
-    #define CMSIS_DEPRECATED          __attribute__((deprecated))
-  #endif
-  #ifndef   __USED
-    #define __USED                    __attribute__((used))
-  #endif
-  #ifndef   __WEAK
-    #define __WEAK                    __attribute__((weak))
-  #endif
-  #ifndef   __UNALIGNED_UINT32
-    struct __attribute__((packed)) T_UINT32 { uint32_t v; };
-    #define __UNALIGNED_UINT32(x)     (((struct T_UINT32 *)(x))->v)
-  #endif
-  #ifndef   __ALIGNED
-    #define __ALIGNED(x)              __attribute__((aligned(x)))
-  #endif
-  #ifndef   __PACKED
-    #define __PACKED                  __attribute__((packed))
-  #endif
-
-
-/*
- * TASKING Compiler
- */
-#elif defined ( __TASKING__ )
-  /*
-   * The CMSIS functions have been implemented as intrinsics in the compiler.
-   * Please use "carm -?i" to get an up to date list of all intrinsics,
-   * Including the CMSIS ones.
-   */
-
-  #ifndef   __ASM
-    #define __ASM                     __asm
-  #endif
-  #ifndef   __INLINE
-    #define __INLINE                  inline
-  #endif
-  #ifndef   __STATIC_INLINE
-    #define __STATIC_INLINE           static inline
-  #endif
-  #ifndef   __STATIC_FORCEINLINE
-    #define __STATIC_FORCEINLINE      __STATIC_INLINE
-  #endif
-  #ifndef   __NO_RETURN
-    #define __NO_RETURN               __attribute__((noreturn))
-  #endif
-  #ifndef   CMSIS_DEPRECATED
-    #define CMSIS_DEPRECATED          __attribute__((deprecated))
-  #endif
-  #ifndef   __USED
-    #define __USED                    __attribute__((used))
-  #endif
-  #ifndef   __WEAK
-    #define __WEAK                    __attribute__((weak))
-  #endif
-  #ifndef   __UNALIGNED_UINT32
-    struct __packed__ T_UINT32 { uint32_t v; };
-    #define __UNALIGNED_UINT32(x)     (((struct T_UINT32 *)(x))->v)
-  #endif
-  #ifndef   __ALIGNED
-    #define __ALIGNED(x)              __align(x)
-  #endif
-  #ifndef   __PACKED
-    #define __PACKED                  __packed__
-  #endif
-
-
-/*
- * COSMIC Compiler
- */
-#elif defined ( __CSMC__ )
-   #include <cmsis_csm.h>
-
- #ifndef   __ASM
-    #define __ASM                     _asm
-  #endif
-  #ifndef   __INLINE
-    #define __INLINE                  inline
-  #endif
-  #ifndef   __STATIC_INLINE
-    #define __STATIC_INLINE           static inline
-  #endif
-  #ifndef   __STATIC_FORCEINLINE
-    #define __STATIC_FORCEINLINE      __STATIC_INLINE
-  #endif
-  #ifndef   __NO_RETURN
-    // NO RETURN is automatically detected hence no warning here
-    #define __NO_RETURN
-  #endif
-  #ifndef   __USED
-    #warning No compiler specific solution for __USED. __USED is ignored.
-    #define __USED
-  #endif
-  #ifndef   CMSIS_DEPRECATED
-    #warning No compiler specific solution for CMSIS_DEPRECATED. CMSIS_DEPRECATED is ignored.
-    #define CMSIS_DEPRECATED
-  #endif
-  #ifndef   __WEAK
-    #define __WEAK                    __weak
-  #endif
-  #ifndef   __UNALIGNED_UINT32
-    @packed struct T_UINT32 { uint32_t v; };
-    #define __UNALIGNED_UINT32(x)     (((struct T_UINT32 *)(x))->v)
-  #endif
-  #ifndef   __ALIGNED
-    #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
-    #define __ALIGNED(x)
-  #endif
-  #ifndef   __PACKED
-    #define __PACKED                  @packed
-  #endif
-
-
-#else
-  #error Unknown compiler.
-#endif
-
-
-#endif /* __CMSIS_COMPILER_H */
-
diff --git a/Core_A/Include/cmsis_cp15.h b/Core_A/Include/cmsis_cp15.h
deleted file mode 100644
index 891bec2..0000000
--- a/Core_A/Include/cmsis_cp15.h
+++ /dev/null
@@ -1,514 +0,0 @@
-/**************************************************************************//**
- * @file     cmsis_cp15.h
- * @brief    CMSIS compiler specific macros, functions, instructions
- * @version  V1.0.1
- * @date     07. Sep 2017
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CMSIS_CP15_H
-#define __CMSIS_CP15_H
-
-/** \brief  Get ACTLR
-    \return               Auxiliary Control register value
- */
-__STATIC_FORCEINLINE uint32_t __get_ACTLR(void)
-{
-  uint32_t result;
-  __get_CP(15, 0, result, 1, 0, 1);
-  return(result);
-}
-
-/** \brief  Set ACTLR
-    \param [in]    actlr  Auxiliary Control value to set
- */
-__STATIC_FORCEINLINE void __set_ACTLR(uint32_t actlr)
-{
-  __set_CP(15, 0, actlr, 1, 0, 1);
-}
-
-/** \brief  Get CPACR
-    \return               Coprocessor Access Control register value
- */
-__STATIC_FORCEINLINE uint32_t __get_CPACR(void)
-{
-  uint32_t result;
-  __get_CP(15, 0, result, 1, 0, 2);
-  return result;
-}
-
-/** \brief  Set CPACR
-    \param [in]    cpacr  Coprocessor Access Control value to set
- */
-__STATIC_FORCEINLINE void __set_CPACR(uint32_t cpacr)
-{
-  __set_CP(15, 0, cpacr, 1, 0, 2);
-}
-
-/** \brief  Get DFSR
-    \return               Data Fault Status Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_DFSR(void)
-{
-  uint32_t result;
-  __get_CP(15, 0, result, 5, 0, 0);
-  return result;
-}
-
-/** \brief  Set DFSR
-    \param [in]    dfsr  Data Fault Status value to set
- */
-__STATIC_FORCEINLINE void __set_DFSR(uint32_t dfsr)
-{
-  __set_CP(15, 0, dfsr, 5, 0, 0);
-}
-
-/** \brief  Get IFSR
-    \return               Instruction Fault Status Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_IFSR(void)
-{
-  uint32_t result;
-  __get_CP(15, 0, result, 5, 0, 1);
-  return result;
-}
-
-/** \brief  Set IFSR
-    \param [in]    ifsr  Instruction Fault Status value to set
- */
-__STATIC_FORCEINLINE void __set_IFSR(uint32_t ifsr)
-{
-  __set_CP(15, 0, ifsr, 5, 0, 1);
-}
-
-/** \brief  Get ISR
-    \return               Interrupt Status Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_ISR(void)
-{
-  uint32_t result;
-  __get_CP(15, 0, result, 12, 1, 0);
-  return result;
-}
-
-/** \brief  Get CBAR
-    \return               Configuration Base Address register value
- */
-__STATIC_FORCEINLINE uint32_t __get_CBAR(void)
-{
-  uint32_t result;
-  __get_CP(15, 4, result, 15, 0, 0);
-  return result;
-}
-
-/** \brief  Get TTBR0
-
-    This function returns the value of the Translation Table Base Register 0.
-
-    \return               Translation Table Base Register 0 value
- */
-__STATIC_FORCEINLINE uint32_t __get_TTBR0(void)
-{
-  uint32_t result;
-  __get_CP(15, 0, result, 2, 0, 0);
-  return result;
-}
-
-/** \brief  Set TTBR0
-
-    This function assigns the given value to the Translation Table Base Register 0.
-
-    \param [in]    ttbr0  Translation Table Base Register 0 value to set
- */
-__STATIC_FORCEINLINE void __set_TTBR0(uint32_t ttbr0)
-{
-  __set_CP(15, 0, ttbr0, 2, 0, 0);
-}
-
-/** \brief  Get DACR
-
-    This function returns the value of the Domain Access Control Register.
-
-    \return               Domain Access Control Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_DACR(void)
-{
-  uint32_t result;
-  __get_CP(15, 0, result, 3, 0, 0);
-  return result;
-}
-
-/** \brief  Set DACR
-
-    This function assigns the given value to the Domain Access Control Register.
-
-    \param [in]    dacr   Domain Access Control Register value to set
- */
-__STATIC_FORCEINLINE void __set_DACR(uint32_t dacr)
-{
-  __set_CP(15, 0, dacr, 3, 0, 0);
-}
-
-/** \brief  Set SCTLR
-
-    This function assigns the given value to the System Control Register.
-
-    \param [in]    sctlr  System Control Register value to set
- */
-__STATIC_FORCEINLINE void __set_SCTLR(uint32_t sctlr)
-{
-  __set_CP(15, 0, sctlr, 1, 0, 0);
-}
-
-/** \brief  Get SCTLR
-    \return               System Control Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_SCTLR(void)
-{
-  uint32_t result;
-  __get_CP(15, 0, result, 1, 0, 0);
-  return result;
-}
-
-/** \brief  Set ACTRL
-    \param [in]    actrl  Auxiliary Control Register value to set
- */
-__STATIC_FORCEINLINE void __set_ACTRL(uint32_t actrl)
-{
-  __set_CP(15, 0, actrl, 1, 0, 1);
-}
-
-/** \brief  Get ACTRL
-    \return               Auxiliary Control Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_ACTRL(void)
-{
-  uint32_t result;
-  __get_CP(15, 0, result, 1, 0, 1);
-  return result;
-}
-
-/** \brief  Get MPIDR
-
-    This function returns the value of the Multiprocessor Affinity Register.
-
-    \return               Multiprocessor Affinity Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_MPIDR(void)
-{
-  uint32_t result;
-  __get_CP(15, 0, result, 0, 0, 5);
-  return result;
-}
-
-/** \brief  Get VBAR
-
-    This function returns the value of the Vector Base Address Register.
-
-    \return               Vector Base Address Register
- */
-__STATIC_FORCEINLINE uint32_t __get_VBAR(void)
-{
-  uint32_t result;
-  __get_CP(15, 0, result, 12, 0, 0);
-  return result;
-}
-
-/** \brief  Set VBAR
-
-    This function assigns the given value to the Vector Base Address Register.
-
-    \param [in]    vbar  Vector Base Address Register value to set
- */
-__STATIC_FORCEINLINE void __set_VBAR(uint32_t vbar)
-{
-  __set_CP(15, 0, vbar, 12, 0, 0);
-}
-
-/** \brief  Get MVBAR
-
-    This function returns the value of the Monitor Vector Base Address Register.
-
-    \return               Monitor Vector Base Address Register
- */
-__STATIC_FORCEINLINE uint32_t __get_MVBAR(void)
-{
-  uint32_t result;
-  __get_CP(15, 0, result, 12, 0, 1);
-  return result;
-}
-
-/** \brief  Set MVBAR
-
-    This function assigns the given value to the Monitor Vector Base Address Register.
-
-    \param [in]    mvbar  Monitor Vector Base Address Register value to set
- */
-__STATIC_FORCEINLINE void __set_MVBAR(uint32_t mvbar)
-{
-  __set_CP(15, 0, mvbar, 12, 0, 1);
-}
-
-#if (defined(__CORTEX_A) && (__CORTEX_A == 7U) && \
-    defined(__TIM_PRESENT) && (__TIM_PRESENT == 1U)) || \
-    defined(DOXYGEN)
-
-/** \brief  Set CNTFRQ
-
-  This function assigns the given value to PL1 Physical Timer Counter Frequency Register (CNTFRQ).
-
-  \param [in]    value  CNTFRQ Register value to set
-*/
-__STATIC_FORCEINLINE void __set_CNTFRQ(uint32_t value)
-{
-  __set_CP(15, 0, value, 14, 0, 0);
-}
-
-/** \brief  Get CNTFRQ
-
-    This function returns the value of the PL1 Physical Timer Counter Frequency Register (CNTFRQ).
-
-    \return               CNTFRQ Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_CNTFRQ(void)
-{
-  uint32_t result;
-  __get_CP(15, 0, result, 14, 0 , 0);
-  return result;
-}
-
-/** \brief  Set CNTP_TVAL
-
-  This function assigns the given value to PL1 Physical Timer Value Register (CNTP_TVAL).
-
-  \param [in]    value  CNTP_TVAL Register value to set
-*/
-__STATIC_FORCEINLINE void __set_CNTP_TVAL(uint32_t value)
-{
-  __set_CP(15, 0, value, 14, 2, 0);
-}
-
-/** \brief  Get CNTP_TVAL
-
-    This function returns the value of the PL1 Physical Timer Value Register (CNTP_TVAL).
-
-    \return               CNTP_TVAL Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_CNTP_TVAL(void)
-{
-  uint32_t result;
-  __get_CP(15, 0, result, 14, 2, 0);
-  return result;
-}
-
-/** \brief  Get CNTPCT
-
-    This function returns the value of the 64 bits PL1 Physical Count Register (CNTPCT).
-
-    \return               CNTPCT Register value
- */
-__STATIC_FORCEINLINE uint64_t __get_CNTPCT(void)
-{
-  uint64_t result;
-  __get_CP64(15, 0, result, 14);
-  return result;
-}
-
-/** \brief  Set CNTP_CVAL
-
-  This function assigns the given value to 64bits PL1 Physical Timer CompareValue Register (CNTP_CVAL).
-
-  \param [in]    value  CNTP_CVAL Register value to set
-*/
-__STATIC_FORCEINLINE void __set_CNTP_CVAL(uint64_t value)
-{
-  __set_CP64(15, 2, value, 14);
-}
-
-/** \brief  Get CNTP_CVAL
-
-    This function returns the value of the 64 bits PL1 Physical Timer CompareValue Register (CNTP_CVAL).
-
-    \return               CNTP_CVAL Register value
- */
-__STATIC_FORCEINLINE uint64_t __get_CNTP_CVAL(void)
-{
-  uint64_t result;
-  __get_CP64(15, 2, result, 14);
-  return result;
-}
-
-/** \brief  Set CNTP_CTL
-
-  This function assigns the given value to PL1 Physical Timer Control Register (CNTP_CTL).
-
-  \param [in]    value  CNTP_CTL Register value to set
-*/
-__STATIC_FORCEINLINE void __set_CNTP_CTL(uint32_t value)
-{
-  __set_CP(15, 0, value, 14, 2, 1);
-}
-
-/** \brief  Get CNTP_CTL register
-    \return               CNTP_CTL Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_CNTP_CTL(void)
-{
-  uint32_t result;
-  __get_CP(15, 0, result, 14, 2, 1);
-  return result;
-}
-
-#endif
-
-/** \brief  Set TLBIALL
-
-  TLB Invalidate All
- */
-__STATIC_FORCEINLINE void __set_TLBIALL(uint32_t value)
-{
-  __set_CP(15, 0, value, 8, 7, 0);
-}
-
-/** \brief  Set BPIALL.
-
-  Branch Predictor Invalidate All
- */
-__STATIC_FORCEINLINE void __set_BPIALL(uint32_t value)
-{
-  __set_CP(15, 0, value, 7, 5, 6);
-}
-
-/** \brief  Set ICIALLU
-
-  Instruction Cache Invalidate All
- */
-__STATIC_FORCEINLINE void __set_ICIALLU(uint32_t value)
-{
-  __set_CP(15, 0, value, 7, 5, 0);
-}
-
-/** \brief  Set DCCMVAC
-
-  Data cache clean
- */
-__STATIC_FORCEINLINE void __set_DCCMVAC(uint32_t value)
-{
-  __set_CP(15, 0, value, 7, 10, 1);
-}
-
-/** \brief  Set DCIMVAC
-
-  Data cache invalidate
- */
-__STATIC_FORCEINLINE void __set_DCIMVAC(uint32_t value)
-{
-  __set_CP(15, 0, value, 7, 6, 1);
-}
-
-/** \brief  Set DCCIMVAC
-
-  Data cache clean and invalidate
- */
-__STATIC_FORCEINLINE void __set_DCCIMVAC(uint32_t value)
-{
-  __set_CP(15, 0, value, 7, 14, 1);
-}
-
-/** \brief  Set CSSELR
- */
-__STATIC_FORCEINLINE void __set_CSSELR(uint32_t value)
-{
-//  __ASM volatile("MCR p15, 2, %0, c0, c0, 0" : : "r"(value) : "memory");
-  __set_CP(15, 2, value, 0, 0, 0);
-}
-
-/** \brief  Get CSSELR
-    \return CSSELR Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_CSSELR(void)
-{
-  uint32_t result;
-//  __ASM volatile("MRC p15, 2, %0, c0, c0, 0" : "=r"(result) : : "memory");
-  __get_CP(15, 2, result, 0, 0, 0);
-  return result;
-}
-
-/** \brief  Set CCSIDR
-    \deprecated CCSIDR itself is read-only. Use __set_CSSELR to select cache level instead.
- */
-CMSIS_DEPRECATED
-__STATIC_FORCEINLINE void __set_CCSIDR(uint32_t value)
-{
-  __set_CSSELR(value);
-}
-
-/** \brief  Get CCSIDR
-    \return CCSIDR Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_CCSIDR(void)
-{
-  uint32_t result;
-//  __ASM volatile("MRC p15, 1, %0, c0, c0, 0" : "=r"(result) : : "memory");
-  __get_CP(15, 1, result, 0, 0, 0);
-  return result;
-}
-
-/** \brief  Get CLIDR
-    \return CLIDR Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_CLIDR(void)
-{
-  uint32_t result;
-//  __ASM volatile("MRC p15, 1, %0, c0, c0, 1" : "=r"(result) : : "memory");
-  __get_CP(15, 1, result, 0, 0, 1);
-  return result;
-}
-
-/** \brief  Set DCISW
- */
-__STATIC_FORCEINLINE void __set_DCISW(uint32_t value)
-{
-//  __ASM volatile("MCR p15, 0, %0, c7, c6, 2" : : "r"(value) : "memory")
-  __set_CP(15, 0, value, 7, 6, 2);
-}
-
-/** \brief  Set DCCSW
- */
-__STATIC_FORCEINLINE void __set_DCCSW(uint32_t value)
-{
-//  __ASM volatile("MCR p15, 0, %0, c7, c10, 2" : : "r"(value) : "memory")
-  __set_CP(15, 0, value, 7, 10, 2);
-}
-
-/** \brief  Set DCCISW
- */
-__STATIC_FORCEINLINE void __set_DCCISW(uint32_t value)
-{
-//  __ASM volatile("MCR p15, 0, %0, c7, c14, 2" : : "r"(value) : "memory")
-  __set_CP(15, 0, value, 7, 14, 2);
-}
-
-#endif
diff --git a/Core_A/Include/cmsis_gcc.h b/Core_A/Include/cmsis_gcc.h
deleted file mode 100644
index 4f46462..0000000
--- a/Core_A/Include/cmsis_gcc.h
+++ /dev/null
@@ -1,679 +0,0 @@
-/**************************************************************************//**
- * @file     cmsis_gcc.h
- * @brief    CMSIS compiler specific macros, functions, instructions
- * @version  V1.0.2
- * @date     09. April 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __CMSIS_GCC_H
-#define __CMSIS_GCC_H
-
-/* ignore some GCC warnings */
-#pragma GCC diagnostic push
-#pragma GCC diagnostic ignored "-Wsign-conversion"
-#pragma GCC diagnostic ignored "-Wconversion"
-#pragma GCC diagnostic ignored "-Wunused-parameter"
-
-/* Fallback for __has_builtin */
-#ifndef __has_builtin
-  #define __has_builtin(x) (0)
-#endif
-
-/* CMSIS compiler specific defines */
-#ifndef   __ASM
-  #define __ASM                                  asm
-#endif
-#ifndef   __INLINE
-  #define __INLINE                               inline
-#endif
-#ifndef   __FORCEINLINE
-  #define __FORCEINLINE                          __attribute__((always_inline))
-#endif
-#ifndef   __STATIC_INLINE
-  #define __STATIC_INLINE                        static inline
-#endif
-#ifndef   __STATIC_FORCEINLINE
-  #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static inline
-#endif
-#ifndef   __NO_RETURN
-  #define __NO_RETURN                            __attribute__((__noreturn__))
-#endif
-#ifndef   CMSIS_DEPRECATED
- #define  CMSIS_DEPRECATED                       __attribute__((deprecated))
-#endif
-#ifndef   __USED
-  #define __USED                                 __attribute__((used))
-#endif
-#ifndef   __WEAK
-  #define __WEAK                                 __attribute__((weak))
-#endif
-#ifndef   __PACKED
-  #define __PACKED                               __attribute__((packed, aligned(1)))
-#endif
-#ifndef   __PACKED_STRUCT
-  #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
-#endif
-#ifndef   __UNALIGNED_UINT16_WRITE
-  #pragma GCC diagnostic push
-  #pragma GCC diagnostic ignored "-Wpacked"
-/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */
-  __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
-  #pragma GCC diagnostic pop
-  #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
-#endif
-#ifndef   __UNALIGNED_UINT16_READ
-  #pragma GCC diagnostic push
-  #pragma GCC diagnostic ignored "-Wpacked"
-/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */
-  __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
-  #pragma GCC diagnostic pop
-  #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
-#endif
-#ifndef   __UNALIGNED_UINT32_WRITE
-  #pragma GCC diagnostic push
-  #pragma GCC diagnostic ignored "-Wpacked"
-/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */
-  __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
-  #pragma GCC diagnostic pop
-  #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
-#endif
-#ifndef   __UNALIGNED_UINT32_READ
-  #pragma GCC diagnostic push
-  #pragma GCC diagnostic ignored "-Wpacked"
-  __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
-  #pragma GCC diagnostic pop
-  #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
-#endif
-#ifndef   __ALIGNED
-  #define __ALIGNED(x)                           __attribute__((aligned(x)))
-#endif
-
-/* ##########################  Core Instruction Access  ######################### */
-/**
-  \brief   No Operation
- */
-#define __NOP()                             __ASM volatile ("nop")
-
-/**
-  \brief   Wait For Interrupt
- */
-#define __WFI()                             __ASM volatile ("wfi")
-
-/**
-  \brief   Wait For Event
- */
-#define __WFE()                             __ASM volatile ("wfe")
-
-/**
-  \brief   Send Event
- */
-#define __SEV()                             __ASM volatile ("sev")
-
-/**
-  \brief   Instruction Synchronization Barrier
-  \details Instruction Synchronization Barrier flushes the pipeline in the processor,
-           so that all instructions following the ISB are fetched from cache or memory,
-           after the instruction has been completed.
- */
-__STATIC_FORCEINLINE  void __ISB(void)
-{
-  __ASM volatile ("isb 0xF":::"memory");
-}
-
-
-/**
-  \brief   Data Synchronization Barrier
-  \details Acts as a special kind of Data Memory Barrier.
-           It completes when all explicit memory accesses before this instruction complete.
- */
-__STATIC_FORCEINLINE  void __DSB(void)
-{
-  __ASM volatile ("dsb 0xF":::"memory");
-}
-
-/**
-  \brief   Data Memory Barrier
-  \details Ensures the apparent order of the explicit memory operations before
-           and after the instruction, without ensuring their completion.
- */
-__STATIC_FORCEINLINE  void __DMB(void)
-{
-  __ASM volatile ("dmb 0xF":::"memory");
-}
-
-/**
-  \brief   Reverse byte order (32 bit)
-  \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-__STATIC_FORCEINLINE  uint32_t __REV(uint32_t value)
-{
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
-  return __builtin_bswap32(value);
-#else
-  uint32_t result;
-
-  __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return result;
-#endif
-}
-
-/**
-  \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".rev16_text"))) __STATIC_INLINE uint32_t __REV16(uint32_t value)
-{
-  uint32_t result;
-  __ASM volatile("rev16 %0, %1" : "=r" (result) : "r" (value));
-  return result;
-}
-#endif
-
-/**
-  \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-__STATIC_FORCEINLINE  int16_t __REVSH(int16_t value)
-{
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-  return (int16_t)__builtin_bswap16(value);
-#else
-  int16_t result;
-
-  __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return result;
-#endif
-}
-
-/**
-  \brief   Rotate Right in unsigned value (32 bit)
-  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
-  \param [in]    op1  Value to rotate
-  \param [in]    op2  Number of Bits to rotate
-  \return               Rotated value
- */
-__STATIC_FORCEINLINE  uint32_t __ROR(uint32_t op1, uint32_t op2)
-{
-  op2 %= 32U;
-  if (op2 == 0U) {
-    return op1;
-  }
-  return (op1 >> op2) | (op1 << (32U - op2));
-}
-
-
-/**
-  \brief   Breakpoint
-  \param [in]    value  is ignored by the processor.
-                 If required, a debugger can use it to store additional information about the breakpoint.
- */
-#define __BKPT(value)                       __ASM volatile ("bkpt "#value)
-
-/**
-  \brief   Reverse bit order of value
-  \details Reverses the bit order of the given value.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-__STATIC_FORCEINLINE  uint32_t __RBIT(uint32_t value)
-{
-  uint32_t result;
-
-#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
-   __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
-#else
-  int32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
-
-  result = value;                      /* r will be reversed bits of v; first get LSB of v */
-  for (value >>= 1U; value; value >>= 1U)
-  {
-    result <<= 1U;
-    result |= value & 1U;
-    s--;
-  }
-  result <<= s;                        /* shift when v's highest bits are zero */
-#endif
-  return result;
-}
-
-/**
-  \brief   Count leading zeros
-  \param [in]  value  Value to count the leading zeros
-  \return             number of leading zeros in value
- */
-#define __CLZ                             (uint8_t)__builtin_clz
-
-/**
-  \brief   LDR Exclusive (8 bit)
-  \details Executes a exclusive LDR instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-__STATIC_FORCEINLINE  uint8_t __LDREXB(volatile uint8_t *addr)
-{
-    uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-   __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
-#else
-    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
-       accepted by assembler. So has to use following less efficient pattern.
-    */
-   __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
-#endif
-   return ((uint8_t) result);    /* Add explicit type cast here */
-}
-
-
-/**
-  \brief   LDR Exclusive (16 bit)
-  \details Executes a exclusive LDR instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-__STATIC_FORCEINLINE  uint16_t __LDREXH(volatile uint16_t *addr)
-{
-    uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-   __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
-#else
-    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
-       accepted by assembler. So has to use following less efficient pattern.
-    */
-   __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
-#endif
-   return ((uint16_t) result);    /* Add explicit type cast here */
-}
-
-
-/**
-  \brief   LDR Exclusive (32 bit)
-  \details Executes a exclusive LDR instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-__STATIC_FORCEINLINE  uint32_t __LDREXW(volatile uint32_t *addr)
-{
-    uint32_t result;
-
-   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
-   return(result);
-}
-
-
-/**
-  \brief   STR Exclusive (8 bit)
-  \details Executes a exclusive STR instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-__STATIC_FORCEINLINE  uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
-{
-   uint32_t result;
-
-   __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
-   return(result);
-}
-
-
-/**
-  \brief   STR Exclusive (16 bit)
-  \details Executes a exclusive STR instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-__STATIC_FORCEINLINE  uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
-{
-   uint32_t result;
-
-   __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
-   return(result);
-}
-
-
-/**
-  \brief   STR Exclusive (32 bit)
-  \details Executes a exclusive STR instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-__STATIC_FORCEINLINE  uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
-{
-   uint32_t result;
-
-   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
-   return(result);
-}
-
-
-/**
-  \brief   Remove the exclusive lock
-  \details Removes the exclusive lock which is created by LDREX.
- */
-__STATIC_FORCEINLINE  void __CLREX(void)
-{
-  __ASM volatile ("clrex" ::: "memory");
-}
-
-/**
-  \brief   Signed Saturate
-  \details Saturates a signed value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (1..32)
-  \return             Saturated value
- */
-#define __SSAT(ARG1,ARG2) \
-__extension__ \
-({                          \
-  int32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("ssat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
-
-/**
-  \brief   Unsigned Saturate
-  \details Saturates an unsigned value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (0..31)
-  \return             Saturated value
- */
-#define __USAT(ARG1,ARG2) \
-__extension__ \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("usat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
-/* ###########################  Core Function Access  ########################### */
-
-/**
-  \brief   Enable IRQ Interrupts
-  \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-__STATIC_FORCEINLINE void __enable_irq(void)
-{
-  __ASM volatile ("cpsie i" : : : "memory");
-}
-
-/**
-  \brief   Disable IRQ Interrupts
-  \details Disables IRQ interrupts by setting the I-bit in the CPSR.
-  Can only be executed in Privileged modes.
- */
-__STATIC_FORCEINLINE  void __disable_irq(void)
-{
-  __ASM volatile ("cpsid i" : : : "memory");
-}
-
-/**
-  \brief   Get FPSCR
-  \details Returns the current value of the Floating Point Status/Control register.
-  \return Floating Point Status/Control register value
-*/
-__STATIC_FORCEINLINE  uint32_t __get_FPSCR(void)
-{
-  #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-       (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-  #if __has_builtin(__builtin_arm_get_fpscr) 
-  // Re-enable using built-in when GCC has been fixed
-  // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
-    /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
-    return __builtin_arm_get_fpscr();
-  #else
-    uint32_t result;
-
-    __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
-    return(result);
-  #endif
-  #else
-    return(0U);
-  #endif
-}
-
-/**
-  \brief   Set FPSCR
-  \details Assigns the given value to the Floating Point Status/Control register.
-  \param [in] fpscr  Floating Point Status/Control value to set
-*/
-__STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
-{
-  #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-       (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-  #if __has_builtin(__builtin_arm_set_fpscr)
-  // Re-enable using built-in when GCC has been fixed
-  // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
-    /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
-    __builtin_arm_set_fpscr(fpscr);
-  #else
-    __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
-  #endif
-  #else
-    (void)fpscr;
-  #endif
-}
-
-/** \brief  Get CPSR Register
-    \return               CPSR Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_CPSR(void)
-{
-  uint32_t result;
-  __ASM volatile("MRS %0, cpsr" : "=r" (result) );
-  return(result);
-}
-
-/** \brief  Set CPSR Register
-    \param [in]    cpsr  CPSR value to set
- */
-__STATIC_FORCEINLINE void __set_CPSR(uint32_t cpsr)
-{
-__ASM volatile ("MSR cpsr, %0" : : "r" (cpsr) : "memory");
-}
-
-/** \brief  Get Mode
-    \return                Processor Mode
- */
-__STATIC_FORCEINLINE uint32_t __get_mode(void)
-{
-    return (__get_CPSR() & 0x1FU);
-}
-
-/** \brief  Set Mode
-    \param [in]    mode  Mode value to set
- */
-__STATIC_FORCEINLINE void __set_mode(uint32_t mode)
-{
-  __ASM volatile("MSR  cpsr_c, %0" : : "r" (mode) : "memory");
-}
-
-/** \brief  Get Stack Pointer
-    \return Stack Pointer value
- */
-__STATIC_FORCEINLINE uint32_t __get_SP(void)
-{
-  uint32_t result;
-  __ASM volatile("MOV  %0, sp" : "=r" (result) : : "memory");
-  return result;
-}
-
-/** \brief  Set Stack Pointer
-    \param [in]    stack  Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __set_SP(uint32_t stack)
-{
-  __ASM volatile("MOV  sp, %0" : : "r" (stack) : "memory");
-}
-
-/** \brief  Get USR/SYS Stack Pointer
-    \return USR/SYS Stack Pointer value
- */
-__STATIC_FORCEINLINE uint32_t __get_SP_usr(void)
-{
-  uint32_t cpsr = __get_CPSR();
-  uint32_t result;
-  __ASM volatile(
-    "CPS     #0x1F  \n"
-    "MOV     %0, sp   " : "=r"(result) : : "memory"
-   );
-  __set_CPSR(cpsr);
-  __ISB();
-  return result;
-}
-
-/** \brief  Set USR/SYS Stack Pointer
-    \param [in]    topOfProcStack  USR/SYS Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __set_SP_usr(uint32_t topOfProcStack)
-{
-  uint32_t cpsr = __get_CPSR();
-  __ASM volatile(
-    "CPS     #0x1F  \n"
-    "MOV     sp, %0   " : : "r" (topOfProcStack) : "memory"
-   );
-  __set_CPSR(cpsr);
-  __ISB();
-}
-
-/** \brief  Get FPEXC
-    \return               Floating Point Exception Control register value
- */
-__STATIC_FORCEINLINE uint32_t __get_FPEXC(void)
-{
-#if (__FPU_PRESENT == 1)
-  uint32_t result;
-  __ASM volatile("VMRS %0, fpexc" : "=r" (result) );
-  return(result);
-#else
-  return(0);
-#endif
-}
-
-/** \brief  Set FPEXC
-    \param [in]    fpexc  Floating Point Exception Control value to set
- */
-__STATIC_FORCEINLINE void __set_FPEXC(uint32_t fpexc)
-{
-#if (__FPU_PRESENT == 1)
-  __ASM volatile ("VMSR fpexc, %0" : : "r" (fpexc) : "memory");
-#endif
-}
-
-/*
- * Include common core functions to access Coprocessor 15 registers
- */
-
-#define __get_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : "=r" (Rt) : : "memory" )
-#define __set_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MCR p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : : "r" (Rt) : "memory" )
-#define __get_CP64(cp, op1, Rt, CRm) __ASM volatile("MRRC p" # cp ", " # op1 ", %Q0, %R0, c" # CRm  : "=r" (Rt) : : "memory" )
-#define __set_CP64(cp, op1, Rt, CRm) __ASM volatile("MCRR p" # cp ", " # op1 ", %Q0, %R0, c" # CRm  : : "r" (Rt) : "memory" )
-
-#include "cmsis_cp15.h"
-
-/** \brief  Enable Floating Point Unit
-
-  Critical section, called from undef handler, so systick is disabled
- */
-__STATIC_INLINE void __FPU_Enable(void)
-{
-  __ASM volatile(
-    //Permit access to VFP/NEON, registers by modifying CPACR
-    "        MRC     p15,0,R1,c1,c0,2  \n"
-    "        ORR     R1,R1,#0x00F00000 \n"
-    "        MCR     p15,0,R1,c1,c0,2  \n"
-
-    //Ensure that subsequent instructions occur in the context of VFP/NEON access permitted
-    "        ISB                       \n"
-
-    //Enable VFP/NEON
-    "        VMRS    R1,FPEXC          \n"
-    "        ORR     R1,R1,#0x40000000 \n"
-    "        VMSR    FPEXC,R1          \n"
-
-    //Initialise VFP/NEON registers to 0
-    "        MOV     R2,#0             \n"
-
-    //Initialise D16 registers to 0
-    "        VMOV    D0, R2,R2         \n"
-    "        VMOV    D1, R2,R2         \n"
-    "        VMOV    D2, R2,R2         \n"
-    "        VMOV    D3, R2,R2         \n"
-    "        VMOV    D4, R2,R2         \n"
-    "        VMOV    D5, R2,R2         \n"
-    "        VMOV    D6, R2,R2         \n"
-    "        VMOV    D7, R2,R2         \n"
-    "        VMOV    D8, R2,R2         \n"
-    "        VMOV    D9, R2,R2         \n"
-    "        VMOV    D10,R2,R2         \n"
-    "        VMOV    D11,R2,R2         \n"
-    "        VMOV    D12,R2,R2         \n"
-    "        VMOV    D13,R2,R2         \n"
-    "        VMOV    D14,R2,R2         \n"
-    "        VMOV    D15,R2,R2         \n"
-
-#if (defined(__ARM_NEON) && (__ARM_NEON == 1))
-    //Initialise D32 registers to 0
-    "        VMOV    D16,R2,R2         \n"
-    "        VMOV    D17,R2,R2         \n"
-    "        VMOV    D18,R2,R2         \n"
-    "        VMOV    D19,R2,R2         \n"
-    "        VMOV    D20,R2,R2         \n"
-    "        VMOV    D21,R2,R2         \n"
-    "        VMOV    D22,R2,R2         \n"
-    "        VMOV    D23,R2,R2         \n"
-    "        VMOV    D24,R2,R2         \n"
-    "        VMOV    D25,R2,R2         \n"
-    "        VMOV    D26,R2,R2         \n"
-    "        VMOV    D27,R2,R2         \n"
-    "        VMOV    D28,R2,R2         \n"
-    "        VMOV    D29,R2,R2         \n"
-    "        VMOV    D30,R2,R2         \n"
-    "        VMOV    D31,R2,R2         \n"
-#endif
-
-    //Initialise FPSCR to a known state
-    "        VMRS    R2,FPSCR          \n"
-    "        LDR     R3,=0x00086060    \n" //Mask off all bits that do not have to be preserved. Non-preserved bits can/should be zero.
-    "        AND     R2,R2,R3          \n"
-    "        VMSR    FPSCR,R2            "
-  );
-}
-
-#pragma GCC diagnostic pop
-
-#endif /* __CMSIS_GCC_H */
diff --git a/Core_A/Include/cmsis_iccarm.h b/Core_A/Include/cmsis_iccarm.h
deleted file mode 100644
index bb0248d..0000000
--- a/Core_A/Include/cmsis_iccarm.h
+++ /dev/null
@@ -1,559 +0,0 @@
-/**************************************************************************//**
- * @file     cmsis_iccarm.h
- * @brief    CMSIS compiler ICCARM (IAR Compiler for Arm) header file
- * @version  V5.0.6
- * @date     02. March 2018
- ******************************************************************************/
-
-//------------------------------------------------------------------------------
-//
-// Copyright (c) 2017-2018 IAR Systems
-//
-// Licensed under the Apache License, Version 2.0 (the "License")
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-//
-//------------------------------------------------------------------------------
-
-
-#ifndef __CMSIS_ICCARM_H__
-#define __CMSIS_ICCARM_H__
-
-#ifndef __ICCARM__
-  #error This file should only be compiled by ICCARM
-#endif
-
-#pragma system_include
-
-#define __IAR_FT _Pragma("inline=forced") __intrinsic
-
-#if (__VER__ >= 8000000)
-  #define __ICCARM_V8 1
-#else
-  #define __ICCARM_V8 0
-#endif
-
-#pragma language=extended
-
-#ifndef __ALIGNED
-  #if __ICCARM_V8
-    #define __ALIGNED(x) __attribute__((aligned(x)))
-  #elif (__VER__ >= 7080000)
-    /* Needs IAR language extensions */
-    #define __ALIGNED(x) __attribute__((aligned(x)))
-  #else
-    #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored.
-    #define __ALIGNED(x)
-  #endif
-#endif
-
-
-/* Define compiler macros for CPU architecture, used in CMSIS 5.
- */
-#if __ARM_ARCH_7A__
-/* Macro already defined */
-#else
-  #if defined(__ARM7A__)
-    #define __ARM_ARCH_7A__ 1
-  #endif
-#endif
-
-#ifndef __ASM
-  #define __ASM __asm
-#endif
-
-#ifndef __INLINE
-  #define __INLINE inline
-#endif
-
-#ifndef   __NO_RETURN
-  #if __ICCARM_V8
-    #define __NO_RETURN __attribute__((__noreturn__))
-  #else
-    #define __NO_RETURN _Pragma("object_attribute=__noreturn")
-  #endif
-#endif
-
-#ifndef   __PACKED
-  /* Needs IAR language extensions */
-  #if __ICCARM_V8
-    #define __PACKED __attribute__((packed, aligned(1)))
-  #else
-    #define __PACKED __packed
-  #endif
-#endif
-
-#ifndef   __PACKED_STRUCT
-  /* Needs IAR language extensions */
-  #if __ICCARM_V8
-    #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
-  #else
-    #define __PACKED_STRUCT __packed struct
-  #endif
-#endif
-
-#ifndef   __PACKED_UNION
-  /* Needs IAR language extensions */
-  #if __ICCARM_V8
-    #define __PACKED_UNION union __attribute__((packed, aligned(1)))
-  #else
-    #define __PACKED_UNION __packed union
-  #endif
-#endif
-
-#ifndef   __RESTRICT
-  #define __RESTRICT            __restrict
-#endif
-
-#ifndef   __STATIC_INLINE
-  #define __STATIC_INLINE       static inline
-#endif
-
-#ifndef   __FORCEINLINE
-  #define __FORCEINLINE         _Pragma("inline=forced")
-#endif
-
-#ifndef   __STATIC_FORCEINLINE
-  #define __STATIC_FORCEINLINE  __FORCEINLINE __STATIC_INLINE
-#endif
-
-#ifndef   CMSIS_DEPRECATED
-  #define CMSIS_DEPRECATED      __attribute__((deprecated))
-#endif
-
-#ifndef __UNALIGNED_UINT16_READ
-  #pragma language=save
-  #pragma language=extended
-  __IAR_FT uint16_t __iar_uint16_read(void const *ptr)
-  {
-    return *(__packed uint16_t*)(ptr);
-  }
-  #pragma language=restore
-  #define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR)
-#endif
-
-
-#ifndef __UNALIGNED_UINT16_WRITE
-  #pragma language=save
-  #pragma language=extended
-  __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
-  {
-    *(__packed uint16_t*)(ptr) = val;;
-  }
-  #pragma language=restore
-  #define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
-#endif
-
-#ifndef __UNALIGNED_UINT32_READ
-  #pragma language=save
-  #pragma language=extended
-  __IAR_FT uint32_t __iar_uint32_read(void const *ptr)
-  {
-    return *(__packed uint32_t*)(ptr);
-  }
-  #pragma language=restore
-  #define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR)
-#endif
-
-#ifndef __UNALIGNED_UINT32_WRITE
-  #pragma language=save
-  #pragma language=extended
-  __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
-  {
-    *(__packed uint32_t*)(ptr) = val;;
-  }
-  #pragma language=restore
-  #define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
-#endif
-
-#if 0
-#ifndef __UNALIGNED_UINT32   /* deprecated */
-  #pragma language=save
-  #pragma language=extended
-  __packed struct  __iar_u32 { uint32_t v; };
-  #pragma language=restore
-  #define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v)
-#endif
-#endif
-
-#ifndef   __USED
-  #if __ICCARM_V8
-    #define __USED __attribute__((used))
-  #else
-    #define __USED _Pragma("__root")
-  #endif
-#endif
-
-#ifndef   __WEAK
-  #if __ICCARM_V8
-    #define __WEAK __attribute__((weak))
-  #else
-    #define __WEAK _Pragma("__weak")
-  #endif
-#endif
-
-
-#ifndef __ICCARM_INTRINSICS_VERSION__
-  #define __ICCARM_INTRINSICS_VERSION__  0
-#endif
-
-#if __ICCARM_INTRINSICS_VERSION__ == 2
-
-  #if defined(__CLZ)
-    #undef __CLZ
-  #endif
-  #if defined(__REVSH)
-    #undef __REVSH
-  #endif
-  #if defined(__RBIT)
-    #undef __RBIT
-  #endif
-  #if defined(__SSAT)
-    #undef __SSAT
-  #endif
-  #if defined(__USAT)
-    #undef __USAT
-  #endif
-
-  #include "iccarm_builtin.h"
-
-  #define __enable_irq        __iar_builtin_enable_interrupt
-  #define __disable_irq       __iar_builtin_disable_interrupt
-  #define __enable_fault_irq    __iar_builtin_enable_fiq
-  #define __disable_fault_irq   __iar_builtin_disable_fiq
-  #define __arm_rsr           __iar_builtin_rsr
-  #define __arm_wsr           __iar_builtin_wsr
-
-  #if __FPU_PRESENT
-    #define __get_FPSCR()             (__arm_rsr("FPSCR"))
-  #else
-    #define __get_FPSCR()             ( 0 )
-  #endif
-
-  #define __set_FPSCR(VALUE)          (__arm_wsr("FPSCR", VALUE))
-
-  #define __get_CPSR()                (__arm_rsr("CPSR"))
-  #define __get_mode()                (__get_CPSR() & 0x1FU)
-
-  #define __set_CPSR(VALUE)           (__arm_wsr("CPSR", (VALUE)))
-  #define __set_mode(VALUE)           (__arm_wsr("CPSR_c", (VALUE)))
-
-
-  #define __get_FPEXC()       (__arm_rsr("FPEXC"))
-  #define __set_FPEXC(VALUE)    (__arm_wsr("FPEXC", VALUE))
-
-  #define __get_CP(cp, op1, RT, CRn, CRm, op2) \
-    ((RT) = __arm_rsr("p" # cp ":" # op1 ":c" # CRn ":c" # CRm ":" # op2))
-
-  #define __set_CP(cp, op1, RT, CRn, CRm, op2) \
-    (__arm_wsr("p" # cp ":" # op1 ":c" # CRn ":c" # CRm ":" # op2, (RT)))
-
-  #define __get_CP64(cp, op1, Rt, CRm) \
-    __ASM volatile("MRRC p" # cp ", " # op1 ", %Q0, %R0, c" # CRm  : "=r" (Rt) : : "memory" )
-
-  #define __set_CP64(cp, op1, Rt, CRm) \
-    __ASM volatile("MCRR p" # cp ", " # op1 ", %Q0, %R0, c" # CRm  : : "r" (Rt) : "memory" )
-
-  #include "cmsis_cp15.h"
-
-  #define __NOP     __iar_builtin_no_operation
-
-  #define __CLZ     __iar_builtin_CLZ
-  #define __CLREX   __iar_builtin_CLREX
-
-  #define __DMB     __iar_builtin_DMB
-  #define __DSB     __iar_builtin_DSB
-  #define __ISB     __iar_builtin_ISB
-
-  #define __LDREXB  __iar_builtin_LDREXB
-  #define __LDREXH  __iar_builtin_LDREXH
-  #define __LDREXW  __iar_builtin_LDREX
-
-  #define __RBIT    __iar_builtin_RBIT
-  #define __REV     __iar_builtin_REV
-  #define __REV16   __iar_builtin_REV16
-
-  __IAR_FT int16_t __REVSH(int16_t val)
-  {
-    return (int16_t) __iar_builtin_REVSH(val);
-  }
-
-  #define __ROR     __iar_builtin_ROR
-  #define __RRX     __iar_builtin_RRX
-
-  #define __SEV     __iar_builtin_SEV
-
-  #define __SSAT    __iar_builtin_SSAT
-
-  #define __STREXB  __iar_builtin_STREXB
-  #define __STREXH  __iar_builtin_STREXH
-  #define __STREXW  __iar_builtin_STREX
-
-  #define __USAT    __iar_builtin_USAT
-
-  #define __WFE     __iar_builtin_WFE
-  #define __WFI     __iar_builtin_WFI
-
-  #define __SADD8   __iar_builtin_SADD8
-  #define __QADD8   __iar_builtin_QADD8
-  #define __SHADD8  __iar_builtin_SHADD8
-  #define __UADD8   __iar_builtin_UADD8
-  #define __UQADD8  __iar_builtin_UQADD8
-  #define __UHADD8  __iar_builtin_UHADD8
-  #define __SSUB8   __iar_builtin_SSUB8
-  #define __QSUB8   __iar_builtin_QSUB8
-  #define __SHSUB8  __iar_builtin_SHSUB8
-  #define __USUB8   __iar_builtin_USUB8
-  #define __UQSUB8  __iar_builtin_UQSUB8
-  #define __UHSUB8  __iar_builtin_UHSUB8
-  #define __SADD16  __iar_builtin_SADD16
-  #define __QADD16  __iar_builtin_QADD16
-  #define __SHADD16 __iar_builtin_SHADD16
-  #define __UADD16  __iar_builtin_UADD16
-  #define __UQADD16 __iar_builtin_UQADD16
-  #define __UHADD16 __iar_builtin_UHADD16
-  #define __SSUB16  __iar_builtin_SSUB16
-  #define __QSUB16  __iar_builtin_QSUB16
-  #define __SHSUB16 __iar_builtin_SHSUB16
-  #define __USUB16  __iar_builtin_USUB16
-  #define __UQSUB16 __iar_builtin_UQSUB16
-  #define __UHSUB16 __iar_builtin_UHSUB16
-  #define __SASX    __iar_builtin_SASX
-  #define __QASX    __iar_builtin_QASX
-  #define __SHASX   __iar_builtin_SHASX
-  #define __UASX    __iar_builtin_UASX
-  #define __UQASX   __iar_builtin_UQASX
-  #define __UHASX   __iar_builtin_UHASX
-  #define __SSAX    __iar_builtin_SSAX
-  #define __QSAX    __iar_builtin_QSAX
-  #define __SHSAX   __iar_builtin_SHSAX
-  #define __USAX    __iar_builtin_USAX
-  #define __UQSAX   __iar_builtin_UQSAX
-  #define __UHSAX   __iar_builtin_UHSAX
-  #define __USAD8   __iar_builtin_USAD8
-  #define __USADA8  __iar_builtin_USADA8
-  #define __SSAT16  __iar_builtin_SSAT16
-  #define __USAT16  __iar_builtin_USAT16
-  #define __UXTB16  __iar_builtin_UXTB16
-  #define __UXTAB16 __iar_builtin_UXTAB16
-  #define __SXTB16  __iar_builtin_SXTB16
-  #define __SXTAB16 __iar_builtin_SXTAB16
-  #define __SMUAD   __iar_builtin_SMUAD
-  #define __SMUADX  __iar_builtin_SMUADX
-  #define __SMMLA   __iar_builtin_SMMLA
-  #define __SMLAD   __iar_builtin_SMLAD
-  #define __SMLADX  __iar_builtin_SMLADX
-  #define __SMLALD  __iar_builtin_SMLALD
-  #define __SMLALDX __iar_builtin_SMLALDX
-  #define __SMUSD   __iar_builtin_SMUSD
-  #define __SMUSDX  __iar_builtin_SMUSDX
-  #define __SMLSD   __iar_builtin_SMLSD
-  #define __SMLSDX  __iar_builtin_SMLSDX
-  #define __SMLSLD  __iar_builtin_SMLSLD
-  #define __SMLSLDX __iar_builtin_SMLSLDX
-  #define __SEL     __iar_builtin_SEL
-  #define __QADD    __iar_builtin_QADD
-  #define __QSUB    __iar_builtin_QSUB
-  #define __PKHBT   __iar_builtin_PKHBT
-  #define __PKHTB   __iar_builtin_PKHTB
-
-#else /* __ICCARM_INTRINSICS_VERSION__ == 2 */
-
-  #if !__FPU_PRESENT
-  #define __get_FPSCR __cmsis_iar_get_FPSR_not_active
-  #endif
-
-  #ifdef __INTRINSICS_INCLUDED
-  #error intrinsics.h is already included previously!
-  #endif
-
-  #include <intrinsics.h>
-
-  #if !__FPU_PRESENT
-  #define __get_FPSCR() (0)
-  #endif
-
-  #pragma diag_suppress=Pe940
-  #pragma diag_suppress=Pe177
-
-  #define __enable_irq        __enable_interrupt
-  #define __disable_irq       __disable_interrupt
-  #define __enable_fault_irq    __enable_fiq
-  #define __disable_fault_irq   __disable_fiq
-  #define __NOP               __no_operation
-
-  #define __get_xPSR          __get_PSR
-
-  __IAR_FT void __set_mode(uint32_t mode)
-  {
-    __ASM volatile("MSR  cpsr_c, %0" : : "r" (mode) : "memory");
-  }
-
-  __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr)
-  {
-    return __LDREX((unsigned long *)ptr);
-  }
-
-  __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr)
-  {
-    return __STREX(value, (unsigned long *)ptr);
-  }
-
-
-  __IAR_FT uint32_t __RRX(uint32_t value)
-  {
-    uint32_t result;
-    __ASM("RRX      %0, %1" : "=r"(result) : "r" (value) : "cc");
-    return(result);
-  }
-
-
-  __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)
-  {
-    return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2));
-  }
-
-  __IAR_FT uint32_t __get_FPEXC(void)
-  {
-  #if (__FPU_PRESENT == 1)
-    uint32_t result;
-    __ASM volatile("VMRS %0, fpexc" : "=r" (result) : : "memory");
-    return(result);
-  #else
-    return(0);
-  #endif
-  }
-
-  __IAR_FT void __set_FPEXC(uint32_t fpexc)
-  {
-  #if (__FPU_PRESENT == 1)
-    __ASM volatile ("VMSR fpexc, %0" : : "r" (fpexc) : "memory");
-  #endif
-  }
-
-
-  #define __get_CP(cp, op1, Rt, CRn, CRm, op2) \
-    __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : "=r" (Rt) : : "memory" )
-  #define __set_CP(cp, op1, Rt, CRn, CRm, op2) \
-    __ASM volatile("MCR p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : : "r" (Rt) : "memory" )
-  #define __get_CP64(cp, op1, Rt, CRm) \
-    __ASM volatile("MRRC p" # cp ", " # op1 ", %Q0, %R0, c" # CRm  : "=r" (Rt) : : "memory" )
-  #define __set_CP64(cp, op1, Rt, CRm) \
-    __ASM volatile("MCRR p" # cp ", " # op1 ", %Q0, %R0, c" # CRm  : : "r" (Rt) : "memory" )
-
-  #include "cmsis_cp15.h"
-
-#endif   /* __ICCARM_INTRINSICS_VERSION__ == 2 */
-
-#define __BKPT(value)    __asm volatile ("BKPT     %0" : : "i"(value))
-
-
-__IAR_FT uint32_t __get_SP_usr(void)
-{
-  uint32_t cpsr;
-  uint32_t result;
-  __ASM volatile(
-    "MRS     %0, cpsr   \n"
-    "CPS     #0x1F      \n" // no effect in USR mode
-    "MOV     %1, sp     \n"
-    "MSR     cpsr_c, %2 \n" // no effect in USR mode
-    "ISB" :  "=r"(cpsr), "=r"(result) : "r"(cpsr) : "memory"
-   );
-  return result;
-}
-
-__IAR_FT void __set_SP_usr(uint32_t topOfProcStack)
-{
-  uint32_t cpsr;
-  __ASM volatile(
-    "MRS     %0, cpsr   \n"
-    "CPS     #0x1F      \n" // no effect in USR mode
-    "MOV     sp, %1     \n"
-    "MSR     cpsr_c, %2 \n" // no effect in USR mode
-    "ISB" : "=r"(cpsr) : "r" (topOfProcStack), "r"(cpsr) : "memory"
-   );
-}
-
-#define __get_mode()                (__get_CPSR() & 0x1FU)
-
-__STATIC_INLINE
-void __FPU_Enable(void)
-{
-  __ASM volatile(
-    //Permit access to VFP/NEON, registers by modifying CPACR
-    "        MRC     p15,0,R1,c1,c0,2  \n"
-    "        ORR     R1,R1,#0x00F00000 \n"
-    "        MCR     p15,0,R1,c1,c0,2  \n"
-
-    //Ensure that subsequent instructions occur in the context of VFP/NEON access permitted
-    "        ISB                       \n"
-
-    //Enable VFP/NEON
-    "        VMRS    R1,FPEXC          \n"
-    "        ORR     R1,R1,#0x40000000 \n"
-    "        VMSR    FPEXC,R1          \n"
-
-    //Initialise VFP/NEON registers to 0
-    "        MOV     R2,#0             \n"
-
-    //Initialise D16 registers to 0
-    "        VMOV    D0, R2,R2         \n"
-    "        VMOV    D1, R2,R2         \n"
-    "        VMOV    D2, R2,R2         \n"
-    "        VMOV    D3, R2,R2         \n"
-    "        VMOV    D4, R2,R2         \n"
-    "        VMOV    D5, R2,R2         \n"
-    "        VMOV    D6, R2,R2         \n"
-    "        VMOV    D7, R2,R2         \n"
-    "        VMOV    D8, R2,R2         \n"
-    "        VMOV    D9, R2,R2         \n"
-    "        VMOV    D10,R2,R2         \n"
-    "        VMOV    D11,R2,R2         \n"
-    "        VMOV    D12,R2,R2         \n"
-    "        VMOV    D13,R2,R2         \n"
-    "        VMOV    D14,R2,R2         \n"
-    "        VMOV    D15,R2,R2         \n"
-
-#ifdef __ARM_ADVANCED_SIMD__
-    //Initialise D32 registers to 0
-    "        VMOV    D16,R2,R2         \n"
-    "        VMOV    D17,R2,R2         \n"
-    "        VMOV    D18,R2,R2         \n"
-    "        VMOV    D19,R2,R2         \n"
-    "        VMOV    D20,R2,R2         \n"
-    "        VMOV    D21,R2,R2         \n"
-    "        VMOV    D22,R2,R2         \n"
-    "        VMOV    D23,R2,R2         \n"
-    "        VMOV    D24,R2,R2         \n"
-    "        VMOV    D25,R2,R2         \n"
-    "        VMOV    D26,R2,R2         \n"
-    "        VMOV    D27,R2,R2         \n"
-    "        VMOV    D28,R2,R2         \n"
-    "        VMOV    D29,R2,R2         \n"
-    "        VMOV    D30,R2,R2         \n"
-    "        VMOV    D31,R2,R2         \n"
-#endif
-
-    //Initialise FPSCR to a known state
-    "        VMRS    R2,FPSCR          \n"
-    "        MOV32   R3,#0x00086060    \n" //Mask off all bits that do not have to be preserved. Non-preserved bits can/should be zero.
-    "        AND     R2,R2,R3          \n"
-    "        VMSR    FPSCR,R2          \n");
-}
-
-
-
-#undef __IAR_FT
-#undef __ICCARM_V8
-
-#pragma diag_default=Pe940
-#pragma diag_default=Pe177
-
-#endif /* __CMSIS_ICCARM_H__ */
diff --git a/Core_A/Include/core_ca.h b/Core_A/Include/core_ca.h
deleted file mode 100644
index dbe9794..0000000
--- a/Core_A/Include/core_ca.h
+++ /dev/null
@@ -1,2614 +0,0 @@
-/**************************************************************************//**
- * @file     core_ca.h
- * @brief    CMSIS Cortex-A Core Peripheral Access Layer Header File
- * @version  V1.0.1
- * @date     07. May 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#ifndef __CORE_CA_H_GENERIC
-#define __CORE_CA_H_GENERIC
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-
-/*  CMSIS CA definitions */
-#define __CA_CMSIS_VERSION_MAIN  (1U)                                      /*!< \brief [31:16] CMSIS-Core(A) main version   */
-#define __CA_CMSIS_VERSION_SUB   (1U)                                      /*!< \brief [15:0]  CMSIS-Core(A) sub version    */
-#define __CA_CMSIS_VERSION       ((__CA_CMSIS_VERSION_MAIN << 16U) | \
-                                   __CA_CMSIS_VERSION_SUB          )       /*!< \brief CMSIS-Core(A) version number         */
-
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #if (__FPU_PRESENT == 1)
-      #define __FPU_USED       1U
-    #else
-      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #if (__FPU_PRESENT == 1)
-      #define __FPU_USED       1U
-    #else
-      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __TMS470__ )
-  #if defined __TI_VFP_SUPPORT__
-    #if (__FPU_PRESENT == 1)
-      #define __FPU_USED       1U
-    #else
-      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #if (__FPU_PRESENT == 1)
-      #define __FPU_USED       1U
-    #else
-      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #if (__FPU_PRESENT == 1)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-#endif
-
-#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CA_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CA_H_DEPENDANT
-#define __CORE_CA_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
- /* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __CA_REV
-    #define __CA_REV              0x0000U
-    #warning "__CA_REV not defined in device header file; using default!"
-  #endif
-  
-  #ifndef __FPU_PRESENT
-    #define __FPU_PRESENT             0U
-    #warning "__FPU_PRESENT not defined in device header file; using default!"
-  #endif
-    
-  #ifndef __GIC_PRESENT
-    #define __GIC_PRESENT             1U
-    #warning "__GIC_PRESENT not defined in device header file; using default!"
-  #endif
-  
-  #ifndef __TIM_PRESENT
-    #define __TIM_PRESENT             1U
-    #warning "__TIM_PRESENT not defined in device header file; using default!"
-  #endif
-  
-  #ifndef __L2C_PRESENT
-    #define __L2C_PRESENT             0U
-    #warning "__L2C_PRESENT not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< \brief Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< \brief Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< \brief Defines 'write only' permissions */
-#define     __IO    volatile             /*!< \brief Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*!< \brief Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*!< \brief Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*!< \brief Defines 'read / write' structure member permissions */
-#define RESERVED(N, T) T RESERVED##N;    // placeholder struct members used for "reserved" areas
-
- /*******************************************************************************
-  *                 Register Abstraction
-   Core Register contain:
-   - CPSR
-   - CP15 Registers
-   - L2C-310 Cache Controller
-   - Generic Interrupt Controller Distributor
-   - Generic Interrupt Controller Interface
-  ******************************************************************************/
-
-/* Core Register CPSR */
-typedef union
-{
-  struct
-  {
-    uint32_t M:5;                        /*!< \brief bit:  0.. 4  Mode field */
-    uint32_t T:1;                        /*!< \brief bit:      5  Thumb execution state bit */
-    uint32_t F:1;                        /*!< \brief bit:      6  FIQ mask bit */
-    uint32_t I:1;                        /*!< \brief bit:      7  IRQ mask bit */
-    uint32_t A:1;                        /*!< \brief bit:      8  Asynchronous abort mask bit */
-    uint32_t E:1;                        /*!< \brief bit:      9  Endianness execution state bit */
-    uint32_t IT1:6;                      /*!< \brief bit: 10..15  If-Then execution state bits 2-7 */
-    uint32_t GE:4;                       /*!< \brief bit: 16..19  Greater than or Equal flags */
-    RESERVED(0:4, uint32_t)              
-    uint32_t J:1;                        /*!< \brief bit:     24  Jazelle bit */
-    uint32_t IT0:2;                      /*!< \brief bit: 25..26  If-Then execution state bits 0-1 */
-    uint32_t Q:1;                        /*!< \brief bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< \brief bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< \brief bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< \brief bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< \brief bit:     31  Negative condition code flag */
-  } b;                                   /*!< \brief Structure used for bit  access */
-  uint32_t w;                            /*!< \brief Type      used for word access */
-} CPSR_Type;
-
-
-
-/* CPSR Register Definitions */
-#define CPSR_N_Pos                       31U                                    /*!< \brief CPSR: N Position */
-#define CPSR_N_Msk                       (1UL << CPSR_N_Pos)                    /*!< \brief CPSR: N Mask */
-
-#define CPSR_Z_Pos                       30U                                    /*!< \brief CPSR: Z Position */
-#define CPSR_Z_Msk                       (1UL << CPSR_Z_Pos)                    /*!< \brief CPSR: Z Mask */
-
-#define CPSR_C_Pos                       29U                                    /*!< \brief CPSR: C Position */
-#define CPSR_C_Msk                       (1UL << CPSR_C_Pos)                    /*!< \brief CPSR: C Mask */
-
-#define CPSR_V_Pos                       28U                                    /*!< \brief CPSR: V Position */
-#define CPSR_V_Msk                       (1UL << CPSR_V_Pos)                    /*!< \brief CPSR: V Mask */
-
-#define CPSR_Q_Pos                       27U                                    /*!< \brief CPSR: Q Position */
-#define CPSR_Q_Msk                       (1UL << CPSR_Q_Pos)                    /*!< \brief CPSR: Q Mask */
-
-#define CPSR_IT0_Pos                     25U                                    /*!< \brief CPSR: IT0 Position */
-#define CPSR_IT0_Msk                     (3UL << CPSR_IT0_Pos)                  /*!< \brief CPSR: IT0 Mask */
-
-#define CPSR_J_Pos                       24U                                    /*!< \brief CPSR: J Position */
-#define CPSR_J_Msk                       (1UL << CPSR_J_Pos)                    /*!< \brief CPSR: J Mask */
-
-#define CPSR_GE_Pos                      16U                                    /*!< \brief CPSR: GE Position */
-#define CPSR_GE_Msk                      (0xFUL << CPSR_GE_Pos)                 /*!< \brief CPSR: GE Mask */
-
-#define CPSR_IT1_Pos                     10U                                    /*!< \brief CPSR: IT1 Position */
-#define CPSR_IT1_Msk                     (0x3FUL << CPSR_IT1_Pos)               /*!< \brief CPSR: IT1 Mask */
-
-#define CPSR_E_Pos                       9U                                     /*!< \brief CPSR: E Position */
-#define CPSR_E_Msk                       (1UL << CPSR_E_Pos)                    /*!< \brief CPSR: E Mask */
-
-#define CPSR_A_Pos                       8U                                     /*!< \brief CPSR: A Position */
-#define CPSR_A_Msk                       (1UL << CPSR_A_Pos)                    /*!< \brief CPSR: A Mask */
-
-#define CPSR_I_Pos                       7U                                     /*!< \brief CPSR: I Position */
-#define CPSR_I_Msk                       (1UL << CPSR_I_Pos)                    /*!< \brief CPSR: I Mask */
-
-#define CPSR_F_Pos                       6U                                     /*!< \brief CPSR: F Position */
-#define CPSR_F_Msk                       (1UL << CPSR_F_Pos)                    /*!< \brief CPSR: F Mask */
-
-#define CPSR_T_Pos                       5U                                     /*!< \brief CPSR: T Position */
-#define CPSR_T_Msk                       (1UL << CPSR_T_Pos)                    /*!< \brief CPSR: T Mask */
-
-#define CPSR_M_Pos                       0U                                     /*!< \brief CPSR: M Position */
-#define CPSR_M_Msk                       (0x1FUL << CPSR_M_Pos)                 /*!< \brief CPSR: M Mask */
-
-#define CPSR_M_USR                       0x10U                                  /*!< \brief CPSR: M User mode (PL0) */
-#define CPSR_M_FIQ                       0x11U                                  /*!< \brief CPSR: M Fast Interrupt mode (PL1) */
-#define CPSR_M_IRQ                       0x12U                                  /*!< \brief CPSR: M Interrupt mode (PL1) */
-#define CPSR_M_SVC                       0x13U                                  /*!< \brief CPSR: M Supervisor mode (PL1) */
-#define CPSR_M_MON                       0x16U                                  /*!< \brief CPSR: M Monitor mode (PL1) */
-#define CPSR_M_ABT                       0x17U                                  /*!< \brief CPSR: M Abort mode (PL1) */
-#define CPSR_M_HYP                       0x1AU                                  /*!< \brief CPSR: M Hypervisor mode (PL2) */
-#define CPSR_M_UND                       0x1BU                                  /*!< \brief CPSR: M Undefined mode (PL1) */
-#define CPSR_M_SYS                       0x1FU                                  /*!< \brief CPSR: M System mode (PL1) */
-
-/* CP15 Register SCTLR */
-typedef union
-{
-  struct
-  {
-    uint32_t M:1;                        /*!< \brief bit:     0  MMU enable */
-    uint32_t A:1;                        /*!< \brief bit:     1  Alignment check enable */
-    uint32_t C:1;                        /*!< \brief bit:     2  Cache enable */
-    RESERVED(0:2, uint32_t)              
-    uint32_t CP15BEN:1;                  /*!< \brief bit:     5  CP15 barrier enable */
-    RESERVED(1:1, uint32_t)              
-    uint32_t B:1;                        /*!< \brief bit:     7  Endianness model */
-    RESERVED(2:2, uint32_t)              
-    uint32_t SW:1;                       /*!< \brief bit:    10  SWP and SWPB enable */
-    uint32_t Z:1;                        /*!< \brief bit:    11  Branch prediction enable */
-    uint32_t I:1;                        /*!< \brief bit:    12  Instruction cache enable */
-    uint32_t V:1;                        /*!< \brief bit:    13  Vectors bit */
-    uint32_t RR:1;                       /*!< \brief bit:    14  Round Robin select */
-    RESERVED(3:2, uint32_t)              
-    uint32_t HA:1;                       /*!< \brief bit:    17  Hardware Access flag enable */
-    RESERVED(4:1, uint32_t)              
-    uint32_t WXN:1;                      /*!< \brief bit:    19  Write permission implies XN */
-    uint32_t UWXN:1;                     /*!< \brief bit:    20  Unprivileged write permission implies PL1 XN */
-    uint32_t FI:1;                       /*!< \brief bit:    21  Fast interrupts configuration enable */
-    uint32_t U:1;                        /*!< \brief bit:    22  Alignment model */
-    RESERVED(5:1, uint32_t)              
-    uint32_t VE:1;                       /*!< \brief bit:    24  Interrupt Vectors Enable */
-    uint32_t EE:1;                       /*!< \brief bit:    25  Exception Endianness */
-    RESERVED(6:1, uint32_t)              
-    uint32_t NMFI:1;                     /*!< \brief bit:    27  Non-maskable FIQ (NMFI) support */
-    uint32_t TRE:1;                      /*!< \brief bit:    28  TEX remap enable. */
-    uint32_t AFE:1;                      /*!< \brief bit:    29  Access flag enable */
-    uint32_t TE:1;                       /*!< \brief bit:    30  Thumb Exception enable */
-    RESERVED(7:1, uint32_t)              
-  } b;                                   /*!< \brief Structure used for bit  access */
-  uint32_t w;                            /*!< \brief Type      used for word access */
-} SCTLR_Type;
-
-#define SCTLR_TE_Pos                     30U                                    /*!< \brief SCTLR: TE Position */
-#define SCTLR_TE_Msk                     (1UL << SCTLR_TE_Pos)                  /*!< \brief SCTLR: TE Mask */
-
-#define SCTLR_AFE_Pos                    29U                                    /*!< \brief SCTLR: AFE Position */
-#define SCTLR_AFE_Msk                    (1UL << SCTLR_AFE_Pos)                 /*!< \brief SCTLR: AFE Mask */
-
-#define SCTLR_TRE_Pos                    28U                                    /*!< \brief SCTLR: TRE Position */
-#define SCTLR_TRE_Msk                    (1UL << SCTLR_TRE_Pos)                 /*!< \brief SCTLR: TRE Mask */
-
-#define SCTLR_NMFI_Pos                   27U                                    /*!< \brief SCTLR: NMFI Position */
-#define SCTLR_NMFI_Msk                   (1UL << SCTLR_NMFI_Pos)                /*!< \brief SCTLR: NMFI Mask */
-
-#define SCTLR_EE_Pos                     25U                                    /*!< \brief SCTLR: EE Position */
-#define SCTLR_EE_Msk                     (1UL << SCTLR_EE_Pos)                  /*!< \brief SCTLR: EE Mask */
-
-#define SCTLR_VE_Pos                     24U                                    /*!< \brief SCTLR: VE Position */
-#define SCTLR_VE_Msk                     (1UL << SCTLR_VE_Pos)                  /*!< \brief SCTLR: VE Mask */
-
-#define SCTLR_U_Pos                      22U                                    /*!< \brief SCTLR: U Position */
-#define SCTLR_U_Msk                      (1UL << SCTLR_U_Pos)                   /*!< \brief SCTLR: U Mask */
-
-#define SCTLR_FI_Pos                     21U                                    /*!< \brief SCTLR: FI Position */
-#define SCTLR_FI_Msk                     (1UL << SCTLR_FI_Pos)                  /*!< \brief SCTLR: FI Mask */
-
-#define SCTLR_UWXN_Pos                   20U                                    /*!< \brief SCTLR: UWXN Position */
-#define SCTLR_UWXN_Msk                   (1UL << SCTLR_UWXN_Pos)                /*!< \brief SCTLR: UWXN Mask */
-
-#define SCTLR_WXN_Pos                    19U                                    /*!< \brief SCTLR: WXN Position */
-#define SCTLR_WXN_Msk                    (1UL << SCTLR_WXN_Pos)                 /*!< \brief SCTLR: WXN Mask */
-
-#define SCTLR_HA_Pos                     17U                                    /*!< \brief SCTLR: HA Position */
-#define SCTLR_HA_Msk                     (1UL << SCTLR_HA_Pos)                  /*!< \brief SCTLR: HA Mask */
-
-#define SCTLR_RR_Pos                     14U                                    /*!< \brief SCTLR: RR Position */
-#define SCTLR_RR_Msk                     (1UL << SCTLR_RR_Pos)                  /*!< \brief SCTLR: RR Mask */
-
-#define SCTLR_V_Pos                      13U                                    /*!< \brief SCTLR: V Position */
-#define SCTLR_V_Msk                      (1UL << SCTLR_V_Pos)                   /*!< \brief SCTLR: V Mask */
-
-#define SCTLR_I_Pos                      12U                                    /*!< \brief SCTLR: I Position */
-#define SCTLR_I_Msk                      (1UL << SCTLR_I_Pos)                   /*!< \brief SCTLR: I Mask */
-
-#define SCTLR_Z_Pos                      11U                                    /*!< \brief SCTLR: Z Position */
-#define SCTLR_Z_Msk                      (1UL << SCTLR_Z_Pos)                   /*!< \brief SCTLR: Z Mask */
-
-#define SCTLR_SW_Pos                     10U                                    /*!< \brief SCTLR: SW Position */
-#define SCTLR_SW_Msk                     (1UL << SCTLR_SW_Pos)                  /*!< \brief SCTLR: SW Mask */
-
-#define SCTLR_B_Pos                      7U                                     /*!< \brief SCTLR: B Position */
-#define SCTLR_B_Msk                      (1UL << SCTLR_B_Pos)                   /*!< \brief SCTLR: B Mask */
-
-#define SCTLR_CP15BEN_Pos                5U                                     /*!< \brief SCTLR: CP15BEN Position */
-#define SCTLR_CP15BEN_Msk                (1UL << SCTLR_CP15BEN_Pos)             /*!< \brief SCTLR: CP15BEN Mask */
-
-#define SCTLR_C_Pos                      2U                                     /*!< \brief SCTLR: C Position */
-#define SCTLR_C_Msk                      (1UL << SCTLR_C_Pos)                   /*!< \brief SCTLR: C Mask */
-
-#define SCTLR_A_Pos                      1U                                     /*!< \brief SCTLR: A Position */
-#define SCTLR_A_Msk                      (1UL << SCTLR_A_Pos)                   /*!< \brief SCTLR: A Mask */
-
-#define SCTLR_M_Pos                      0U                                     /*!< \brief SCTLR: M Position */
-#define SCTLR_M_Msk                      (1UL << SCTLR_M_Pos)                   /*!< \brief SCTLR: M Mask */
-
-/* CP15 Register ACTLR */
-typedef union
-{
-#if __CORTEX_A == 5 || defined(DOXYGEN)
-  /** \brief Structure used for bit access on Cortex-A5 */
-  struct
-  {
-    uint32_t FW:1;                      /*!< \brief bit:      0  Cache and TLB maintenance broadcast */
-    RESERVED(0:5, uint32_t)              
-    uint32_t SMP:1;                      /*!< \brief bit:     6  Enables coherent requests to the processor */
-    uint32_t EXCL:1;                     /*!< \brief bit:     7  Exclusive L1/L2 cache control */
-    RESERVED(1:2, uint32_t)
-    uint32_t DODMBS:1;                   /*!< \brief bit:    10  Disable optimized data memory barrier behavior */
-    uint32_t DWBST:1;                    /*!< \brief bit:    11  AXI data write bursts to Normal memory */
-    uint32_t RADIS:1;                    /*!< \brief bit:    12  L1 Data Cache read-allocate mode disable */
-    uint32_t L1PCTL:2;                   /*!< \brief bit:13..14  L1 Data prefetch control */    
-    uint32_t BP:2;                       /*!< \brief bit:16..15  Branch prediction policy */
-    uint32_t RSDIS:1;                    /*!< \brief bit:    17  Disable return stack operation */
-    uint32_t BTDIS:1;                    /*!< \brief bit:    18  Disable indirect Branch Target Address Cache (BTAC) */
-    RESERVED(3:9, uint32_t)             
-    uint32_t DBDI:1;                     /*!< \brief bit:    28  Disable branch dual issue */
-    RESERVED(7:3, uint32_t)              
- } b;
-#endif  
-#if __CORTEX_A == 7 || defined(DOXYGEN)
-  /** \brief Structure used for bit access on Cortex-A7 */
-  struct
-  {
-    RESERVED(0:6, uint32_t)              
-    uint32_t SMP:1;                      /*!< \brief bit:     6  Enables coherent requests to the processor */
-    RESERVED(1:3, uint32_t)              
-    uint32_t DODMBS:1;                   /*!< \brief bit:    10  Disable optimized data memory barrier behavior */
-    uint32_t L2RADIS:1;                  /*!< \brief bit:    11  L2 Data Cache read-allocate mode disable */
-    uint32_t L1RADIS:1;                  /*!< \brief bit:    12  L1 Data Cache read-allocate mode disable */
-    uint32_t L1PCTL:2;                   /*!< \brief bit:13..14  L1 Data prefetch control */
-    uint32_t DDVM:1;                     /*!< \brief bit:    15  Disable Distributed Virtual Memory (DVM) transactions */
-    RESERVED(3:12, uint32_t)             
-    uint32_t DDI:1;                      /*!< \brief bit:    28  Disable dual issue */
-    RESERVED(7:3, uint32_t)              
-  } b;
-#endif  
-#if __CORTEX_A == 9 || defined(DOXYGEN)
-  /** \brief Structure used for bit access on Cortex-A9 */
-  struct
-  {
-    uint32_t FW:1;                       /*!< \brief bit:     0  Cache and TLB maintenance broadcast */
-    RESERVED(0:1, uint32_t)
-    uint32_t L1PE:1;                     /*!< \brief bit:     2  Dside prefetch */
-    uint32_t WFLZM:1;                    /*!< \brief bit:     3  Cache and TLB maintenance broadcast */
-    RESERVED(1:2, uint32_t)
-    uint32_t SMP:1;                      /*!< \brief bit:     6  Enables coherent requests to the processor */
-    uint32_t EXCL:1;                     /*!< \brief bit:     7  Exclusive L1/L2 cache control */
-    uint32_t AOW:1;                      /*!< \brief bit:     8  Enable allocation in one cache way only */
-    uint32_t PARITY:1;                   /*!< \brief bit:     9  Support for parity checking, if implemented */
-    RESERVED(7:22, uint32_t)              
-  } b;
-#endif  
-  uint32_t w;                            /*!< \brief Type      used for word access */
-} ACTLR_Type;
-
-#define ACTLR_DDI_Pos                    28U                                     /*!< \brief ACTLR: DDI Position */
-#define ACTLR_DDI_Msk                    (1UL << ACTLR_DDI_Pos)                  /*!< \brief ACTLR: DDI Mask */
-
-#define ACTLR_DBDI_Pos                   28U                                     /*!< \brief ACTLR: DBDI Position */
-#define ACTLR_DBDI_Msk                   (1UL << ACTLR_DBDI_Pos)                 /*!< \brief ACTLR: DBDI Mask */
-
-#define ACTLR_BTDIS_Pos                  18U                                     /*!< \brief ACTLR: BTDIS Position */
-#define ACTLR_BTDIS_Msk                  (1UL << ACTLR_BTDIS_Pos)                /*!< \brief ACTLR: BTDIS Mask */
-
-#define ACTLR_RSDIS_Pos                  17U                                     /*!< \brief ACTLR: RSDIS Position */
-#define ACTLR_RSDIS_Msk                  (1UL << ACTLR_RSDIS_Pos)                /*!< \brief ACTLR: RSDIS Mask */
-
-#define ACTLR_BP_Pos                     15U                                     /*!< \brief ACTLR: BP Position */
-#define ACTLR_BP_Msk                     (3UL << ACTLR_BP_Pos)                   /*!< \brief ACTLR: BP Mask */
-
-#define ACTLR_DDVM_Pos                   15U                                     /*!< \brief ACTLR: DDVM Position */
-#define ACTLR_DDVM_Msk                   (1UL << ACTLR_DDVM_Pos)                 /*!< \brief ACTLR: DDVM Mask */
-
-#define ACTLR_L1PCTL_Pos                 13U                                     /*!< \brief ACTLR: L1PCTL Position */
-#define ACTLR_L1PCTL_Msk                 (3UL << ACTLR_L1PCTL_Pos)               /*!< \brief ACTLR: L1PCTL Mask */
-
-#define ACTLR_RADIS_Pos                  12U                                     /*!< \brief ACTLR: RADIS Position */
-#define ACTLR_RADIS_Msk                  (1UL << ACTLR_RADIS_Pos)                /*!< \brief ACTLR: RADIS Mask */
-
-#define ACTLR_L1RADIS_Pos                12U                                     /*!< \brief ACTLR: L1RADIS Position */
-#define ACTLR_L1RADIS_Msk                (1UL << ACTLR_L1RADIS_Pos)              /*!< \brief ACTLR: L1RADIS Mask */
-
-#define ACTLR_DWBST_Pos                  11U                                     /*!< \brief ACTLR: DWBST Position */
-#define ACTLR_DWBST_Msk                  (1UL << ACTLR_DWBST_Pos)                /*!< \brief ACTLR: DWBST Mask */
-
-#define ACTLR_L2RADIS_Pos                11U                                     /*!< \brief ACTLR: L2RADIS Position */
-#define ACTLR_L2RADIS_Msk                (1UL << ACTLR_L2RADIS_Pos)              /*!< \brief ACTLR: L2RADIS Mask */
-
-#define ACTLR_DODMBS_Pos                 10U                                     /*!< \brief ACTLR: DODMBS Position */
-#define ACTLR_DODMBS_Msk                 (1UL << ACTLR_DODMBS_Pos)               /*!< \brief ACTLR: DODMBS Mask */
-
-#define ACTLR_PARITY_Pos                 9U                                      /*!< \brief ACTLR: PARITY Position */
-#define ACTLR_PARITY_Msk                 (1UL << ACTLR_PARITY_Pos)               /*!< \brief ACTLR: PARITY Mask */
-
-#define ACTLR_AOW_Pos                    8U                                      /*!< \brief ACTLR: AOW Position */
-#define ACTLR_AOW_Msk                    (1UL << ACTLR_AOW_Pos)                  /*!< \brief ACTLR: AOW Mask */
-
-#define ACTLR_EXCL_Pos                   7U                                      /*!< \brief ACTLR: EXCL Position */
-#define ACTLR_EXCL_Msk                   (1UL << ACTLR_EXCL_Pos)                 /*!< \brief ACTLR: EXCL Mask */
-
-#define ACTLR_SMP_Pos                    6U                                      /*!< \brief ACTLR: SMP Position */
-#define ACTLR_SMP_Msk                    (1UL << ACTLR_SMP_Pos)                  /*!< \brief ACTLR: SMP Mask */
-
-#define ACTLR_WFLZM_Pos                  3U                                      /*!< \brief ACTLR: WFLZM Position */
-#define ACTLR_WFLZM_Msk                  (1UL << ACTLR_WFLZM_Pos)                /*!< \brief ACTLR: WFLZM Mask */
-
-#define ACTLR_L1PE_Pos                   2U                                      /*!< \brief ACTLR: L1PE Position */
-#define ACTLR_L1PE_Msk                   (1UL << ACTLR_L1PE_Pos)                 /*!< \brief ACTLR: L1PE Mask */
-
-#define ACTLR_FW_Pos                     0U                                      /*!< \brief ACTLR: FW Position */
-#define ACTLR_FW_Msk                     (1UL << ACTLR_FW_Pos)                   /*!< \brief ACTLR: FW Mask */
-
-/* CP15 Register CPACR */
-typedef union
-{
-  struct
-  {
-    uint32_t CP0:2;                      /*!< \brief bit:  0..1  Access rights for coprocessor 0 */
-    uint32_t CP1:2;                      /*!< \brief bit:  2..3  Access rights for coprocessor 1 */
-    uint32_t CP2:2;                      /*!< \brief bit:  4..5  Access rights for coprocessor 2 */
-    uint32_t CP3:2;                      /*!< \brief bit:  6..7  Access rights for coprocessor 3 */
-    uint32_t CP4:2;                      /*!< \brief bit:  8..9  Access rights for coprocessor 4 */
-    uint32_t CP5:2;                      /*!< \brief bit:10..11  Access rights for coprocessor 5 */
-    uint32_t CP6:2;                      /*!< \brief bit:12..13  Access rights for coprocessor 6 */
-    uint32_t CP7:2;                      /*!< \brief bit:14..15  Access rights for coprocessor 7 */
-    uint32_t CP8:2;                      /*!< \brief bit:16..17  Access rights for coprocessor 8 */
-    uint32_t CP9:2;                      /*!< \brief bit:18..19  Access rights for coprocessor 9 */
-    uint32_t CP10:2;                     /*!< \brief bit:20..21  Access rights for coprocessor 10 */
-    uint32_t CP11:2;                     /*!< \brief bit:22..23  Access rights for coprocessor 11 */
-    uint32_t CP12:2;                     /*!< \brief bit:24..25  Access rights for coprocessor 11 */
-    uint32_t CP13:2;                     /*!< \brief bit:26..27  Access rights for coprocessor 11 */
-    uint32_t TRCDIS:1;                   /*!< \brief bit:    28  Disable CP14 access to trace registers */
-    RESERVED(0:1, uint32_t)              
-    uint32_t D32DIS:1;                   /*!< \brief bit:    30  Disable use of registers D16-D31 of the VFP register file */
-    uint32_t ASEDIS:1;                   /*!< \brief bit:    31  Disable Advanced SIMD Functionality */
-  } b;                                   /*!< \brief Structure used for bit  access */
-  uint32_t w;                            /*!< \brief Type      used for word access */
-} CPACR_Type;
-
-#define CPACR_ASEDIS_Pos                 31U                                    /*!< \brief CPACR: ASEDIS Position */
-#define CPACR_ASEDIS_Msk                 (1UL << CPACR_ASEDIS_Pos)              /*!< \brief CPACR: ASEDIS Mask */
-
-#define CPACR_D32DIS_Pos                 30U                                    /*!< \brief CPACR: D32DIS Position */
-#define CPACR_D32DIS_Msk                 (1UL << CPACR_D32DIS_Pos)              /*!< \brief CPACR: D32DIS Mask */
-
-#define CPACR_TRCDIS_Pos                 28U                                    /*!< \brief CPACR: D32DIS Position */
-#define CPACR_TRCDIS_Msk                 (1UL << CPACR_D32DIS_Pos)              /*!< \brief CPACR: D32DIS Mask */
-
-#define CPACR_CP_Pos_(n)                 (n*2U)                                 /*!< \brief CPACR: CPn Position */
-#define CPACR_CP_Msk_(n)                 (3UL << CPACR_CP_Pos_(n))              /*!< \brief CPACR: CPn Mask */
-
-#define CPACR_CP_NA                      0U                                     /*!< \brief CPACR CPn field: Access denied. */
-#define CPACR_CP_PL1                     1U                                     /*!< \brief CPACR CPn field: Accessible from PL1 only. */
-#define CPACR_CP_FA                      3U                                     /*!< \brief CPACR CPn field: Full access. */
-
-/* CP15 Register DFSR */
-typedef union
-{
-  struct
-  {
-    uint32_t FS0:4;                      /*!< \brief bit: 0.. 3  Fault Status bits bit 0-3 */
-    uint32_t Domain:4;                   /*!< \brief bit: 4.. 7  Fault on which domain */
-    RESERVED(0:1, uint32_t)              
-    uint32_t LPAE:1;                     /*!< \brief bit:     9  Large Physical Address Extension */
-    uint32_t FS1:1;                      /*!< \brief bit:    10  Fault Status bits bit 4 */
-    uint32_t WnR:1;                      /*!< \brief bit:    11  Write not Read bit */
-    uint32_t ExT:1;                      /*!< \brief bit:    12  External abort type */
-    uint32_t CM:1;                       /*!< \brief bit:    13  Cache maintenance fault */
-    RESERVED(1:18, uint32_t)             
-  } s;                                   /*!< \brief Structure used for bit  access in short format */
-  struct
-  {
-    uint32_t STATUS:5;                   /*!< \brief bit: 0.. 5  Fault Status bits */
-    RESERVED(0:3, uint32_t)              
-    uint32_t LPAE:1;                     /*!< \brief bit:     9  Large Physical Address Extension */
-    RESERVED(1:1, uint32_t)              
-    uint32_t WnR:1;                      /*!< \brief bit:    11  Write not Read bit */
-    uint32_t ExT:1;                      /*!< \brief bit:    12  External abort type */
-    uint32_t CM:1;                       /*!< \brief bit:    13  Cache maintenance fault */
-    RESERVED(2:18, uint32_t)             
-  } l;                                   /*!< \brief Structure used for bit  access in long format */
-  uint32_t w;                            /*!< \brief Type      used for word access */
-} DFSR_Type;
-
-#define DFSR_CM_Pos                      13U                                    /*!< \brief DFSR: CM Position */
-#define DFSR_CM_Msk                      (1UL << DFSR_CM_Pos)                   /*!< \brief DFSR: CM Mask */
-
-#define DFSR_Ext_Pos                     12U                                    /*!< \brief DFSR: Ext Position */
-#define DFSR_Ext_Msk                     (1UL << DFSR_Ext_Pos)                  /*!< \brief DFSR: Ext Mask */
-
-#define DFSR_WnR_Pos                     11U                                    /*!< \brief DFSR: WnR Position */
-#define DFSR_WnR_Msk                     (1UL << DFSR_WnR_Pos)                  /*!< \brief DFSR: WnR Mask */
-
-#define DFSR_FS1_Pos                     10U                                    /*!< \brief DFSR: FS1 Position */
-#define DFSR_FS1_Msk                     (1UL << DFSR_FS1_Pos)                  /*!< \brief DFSR: FS1 Mask */
-
-#define DFSR_LPAE_Pos                    9U                                    /*!< \brief DFSR: LPAE Position */
-#define DFSR_LPAE_Msk                    (1UL << DFSR_LPAE_Pos)                /*!< \brief DFSR: LPAE Mask */
-
-#define DFSR_Domain_Pos                  4U                                     /*!< \brief DFSR: Domain Position */
-#define DFSR_Domain_Msk                  (0xFUL << DFSR_Domain_Pos)             /*!< \brief DFSR: Domain Mask */
-
-#define DFSR_FS0_Pos                     0U                                     /*!< \brief DFSR: FS0 Position */
-#define DFSR_FS0_Msk                     (0xFUL << DFSR_FS0_Pos)                /*!< \brief DFSR: FS0 Mask */
-
-#define DFSR_STATUS_Pos                  0U                                     /*!< \brief DFSR: STATUS Position */
-#define DFSR_STATUS_Msk                  (0x3FUL << DFSR_STATUS_Pos)            /*!< \brief DFSR: STATUS Mask */
-
-/* CP15 Register IFSR */
-typedef union
-{
-  struct
-  {
-    uint32_t FS0:4;                      /*!< \brief bit: 0.. 3  Fault Status bits bit 0-3 */
-    RESERVED(0:5, uint32_t)              
-    uint32_t LPAE:1;                     /*!< \brief bit:     9  Large Physical Address Extension */
-    uint32_t FS1:1;                      /*!< \brief bit:    10  Fault Status bits bit 4 */
-    RESERVED(1:1, uint32_t)              
-    uint32_t ExT:1;                      /*!< \brief bit:    12  External abort type */
-    RESERVED(2:19, uint32_t)             
-  } s;                                   /*!< \brief Structure used for bit access in short format */
-  struct
-  {
-    uint32_t STATUS:6;                   /*!< \brief bit: 0.. 5  Fault Status bits */
-    RESERVED(0:3, uint32_t)              
-    uint32_t LPAE:1;                     /*!< \brief bit:     9  Large Physical Address Extension */
-    RESERVED(1:2, uint32_t)              
-    uint32_t ExT:1;                      /*!< \brief bit:    12  External abort type */
-    RESERVED(2:19, uint32_t)             
-  } l;                                   /*!< \brief Structure used for bit access in long format */
-  uint32_t w;                            /*!< \brief Type      used for word access */
-} IFSR_Type;
-
-#define IFSR_ExT_Pos                     12U                                    /*!< \brief IFSR: ExT Position */
-#define IFSR_ExT_Msk                     (1UL << IFSR_ExT_Pos)                  /*!< \brief IFSR: ExT Mask */
-
-#define IFSR_FS1_Pos                     10U                                    /*!< \brief IFSR: FS1 Position */
-#define IFSR_FS1_Msk                     (1UL << IFSR_FS1_Pos)                  /*!< \brief IFSR: FS1 Mask */
-
-#define IFSR_LPAE_Pos                    9U                                     /*!< \brief IFSR: LPAE Position */
-#define IFSR_LPAE_Msk                    (0x1UL << IFSR_LPAE_Pos)               /*!< \brief IFSR: LPAE Mask */
-
-#define IFSR_FS0_Pos                     0U                                     /*!< \brief IFSR: FS0 Position */
-#define IFSR_FS0_Msk                     (0xFUL << IFSR_FS0_Pos)                /*!< \brief IFSR: FS0 Mask */
-
-#define IFSR_STATUS_Pos                  0U                                     /*!< \brief IFSR: STATUS Position */
-#define IFSR_STATUS_Msk                  (0x3FUL << IFSR_STATUS_Pos)            /*!< \brief IFSR: STATUS Mask */
-
-/* CP15 Register ISR */
-typedef union
-{
-  struct
-  {
-    RESERVED(0:6, uint32_t)              
-    uint32_t F:1;                        /*!< \brief bit:     6  FIQ pending bit */
-    uint32_t I:1;                        /*!< \brief bit:     7  IRQ pending bit */
-    uint32_t A:1;                        /*!< \brief bit:     8  External abort pending bit */
-    RESERVED(1:23, uint32_t)             
-  } b;                                   /*!< \brief Structure used for bit  access */
-  uint32_t w;                            /*!< \brief Type      used for word access */
-} ISR_Type;
-
-#define ISR_A_Pos                        13U                                    /*!< \brief ISR: A Position */
-#define ISR_A_Msk                        (1UL << ISR_A_Pos)                     /*!< \brief ISR: A Mask */
-
-#define ISR_I_Pos                        12U                                    /*!< \brief ISR: I Position */
-#define ISR_I_Msk                        (1UL << ISR_I_Pos)                     /*!< \brief ISR: I Mask */
-
-#define ISR_F_Pos                        11U                                    /*!< \brief ISR: F Position */
-#define ISR_F_Msk                        (1UL << ISR_F_Pos)                     /*!< \brief ISR: F Mask */
-
-/* DACR Register */
-#define DACR_D_Pos_(n)                   (2U*n)                                 /*!< \brief DACR: Dn Position */
-#define DACR_D_Msk_(n)                   (3UL << DACR_D_Pos_(n))                /*!< \brief DACR: Dn Mask */
-#define DACR_Dn_NOACCESS                 0U                                     /*!< \brief DACR Dn field: No access */
-#define DACR_Dn_CLIENT                   1U                                     /*!< \brief DACR Dn field: Client */
-#define DACR_Dn_MANAGER                  3U                                     /*!< \brief DACR Dn field: Manager */
-
-/**
-  \brief     Mask and shift a bit field value for use in a register bit range.
-  \param [in] field  Name of the register bit field.
-  \param [in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param [in] field  Name of the register bit field.
-  \param [in] value  Value of register. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-
-/**
- \brief  Union type to access the L2C_310 Cache Controller.
-*/
-#if (__L2C_PRESENT == 1U) || defined(DOXYGEN)
-typedef struct
-{
-  __IM  uint32_t CACHE_ID;                   /*!< \brief Offset: 0x0000 (R/ ) Cache ID Register               */
-  __IM  uint32_t CACHE_TYPE;                 /*!< \brief Offset: 0x0004 (R/ ) Cache Type Register             */
-        RESERVED(0[0x3e], uint32_t)
-  __IOM uint32_t CONTROL;                    /*!< \brief Offset: 0x0100 (R/W) Control Register                */
-  __IOM uint32_t AUX_CNT;                    /*!< \brief Offset: 0x0104 (R/W) Auxiliary Control               */
-        RESERVED(1[0x3e], uint32_t)
-  __IOM uint32_t EVENT_CONTROL;              /*!< \brief Offset: 0x0200 (R/W) Event Counter Control           */
-  __IOM uint32_t EVENT_COUNTER1_CONF;        /*!< \brief Offset: 0x0204 (R/W) Event Counter 1 Configuration   */
-  __IOM uint32_t EVENT_COUNTER0_CONF;        /*!< \brief Offset: 0x0208 (R/W) Event Counter 1 Configuration   */
-        RESERVED(2[0x2], uint32_t)
-  __IOM uint32_t INTERRUPT_MASK;             /*!< \brief Offset: 0x0214 (R/W) Interrupt Mask                  */
-  __IM  uint32_t MASKED_INT_STATUS;          /*!< \brief Offset: 0x0218 (R/ ) Masked Interrupt Status         */
-  __IM  uint32_t RAW_INT_STATUS;             /*!< \brief Offset: 0x021c (R/ ) Raw Interrupt Status            */
-  __OM  uint32_t INTERRUPT_CLEAR;            /*!< \brief Offset: 0x0220 ( /W) Interrupt Clear                 */
-        RESERVED(3[0x143], uint32_t)
-  __IOM uint32_t CACHE_SYNC;                 /*!< \brief Offset: 0x0730 (R/W) Cache Sync                      */
-        RESERVED(4[0xf], uint32_t)
-  __IOM uint32_t INV_LINE_PA;                /*!< \brief Offset: 0x0770 (R/W) Invalidate Line By PA           */
-        RESERVED(6[2], uint32_t)
-  __IOM uint32_t INV_WAY;                    /*!< \brief Offset: 0x077c (R/W) Invalidate by Way               */
-        RESERVED(5[0xc], uint32_t)
-  __IOM uint32_t CLEAN_LINE_PA;              /*!< \brief Offset: 0x07b0 (R/W) Clean Line by PA                */
-        RESERVED(7[1], uint32_t)
-  __IOM uint32_t CLEAN_LINE_INDEX_WAY;       /*!< \brief Offset: 0x07b8 (R/W) Clean Line by Index/Way         */
-  __IOM uint32_t CLEAN_WAY;                  /*!< \brief Offset: 0x07bc (R/W) Clean by Way                    */
-        RESERVED(8[0xc], uint32_t)
-  __IOM uint32_t CLEAN_INV_LINE_PA;          /*!< \brief Offset: 0x07f0 (R/W) Clean and Invalidate Line by PA  */
-        RESERVED(9[1], uint32_t)
-  __IOM uint32_t CLEAN_INV_LINE_INDEX_WAY;   /*!< \brief Offset: 0x07f8 (R/W) Clean and Invalidate Line by Index/Way  */
-  __IOM uint32_t CLEAN_INV_WAY;              /*!< \brief Offset: 0x07fc (R/W) Clean and Invalidate by Way     */
-        RESERVED(10[0x40], uint32_t)
-  __IOM uint32_t DATA_LOCK_0_WAY;            /*!< \brief Offset: 0x0900 (R/W) Data Lockdown 0 by Way          */
-  __IOM uint32_t INST_LOCK_0_WAY;            /*!< \brief Offset: 0x0904 (R/W) Instruction Lockdown 0 by Way   */
-  __IOM uint32_t DATA_LOCK_1_WAY;            /*!< \brief Offset: 0x0908 (R/W) Data Lockdown 1 by Way          */
-  __IOM uint32_t INST_LOCK_1_WAY;            /*!< \brief Offset: 0x090c (R/W) Instruction Lockdown 1 by Way   */
-  __IOM uint32_t DATA_LOCK_2_WAY;            /*!< \brief Offset: 0x0910 (R/W) Data Lockdown 2 by Way          */
-  __IOM uint32_t INST_LOCK_2_WAY;            /*!< \brief Offset: 0x0914 (R/W) Instruction Lockdown 2 by Way   */
-  __IOM uint32_t DATA_LOCK_3_WAY;            /*!< \brief Offset: 0x0918 (R/W) Data Lockdown 3 by Way          */
-  __IOM uint32_t INST_LOCK_3_WAY;            /*!< \brief Offset: 0x091c (R/W) Instruction Lockdown 3 by Way   */
-  __IOM uint32_t DATA_LOCK_4_WAY;            /*!< \brief Offset: 0x0920 (R/W) Data Lockdown 4 by Way          */
-  __IOM uint32_t INST_LOCK_4_WAY;            /*!< \brief Offset: 0x0924 (R/W) Instruction Lockdown 4 by Way   */
-  __IOM uint32_t DATA_LOCK_5_WAY;            /*!< \brief Offset: 0x0928 (R/W) Data Lockdown 5 by Way          */
-  __IOM uint32_t INST_LOCK_5_WAY;            /*!< \brief Offset: 0x092c (R/W) Instruction Lockdown 5 by Way   */
-  __IOM uint32_t DATA_LOCK_6_WAY;            /*!< \brief Offset: 0x0930 (R/W) Data Lockdown 5 by Way          */
-  __IOM uint32_t INST_LOCK_6_WAY;            /*!< \brief Offset: 0x0934 (R/W) Instruction Lockdown 5 by Way   */
-  __IOM uint32_t DATA_LOCK_7_WAY;            /*!< \brief Offset: 0x0938 (R/W) Data Lockdown 6 by Way          */
-  __IOM uint32_t INST_LOCK_7_WAY;            /*!< \brief Offset: 0x093c (R/W) Instruction Lockdown 6 by Way   */
-        RESERVED(11[0x4], uint32_t)
-  __IOM uint32_t LOCK_LINE_EN;               /*!< \brief Offset: 0x0950 (R/W) Lockdown by Line Enable         */
-  __IOM uint32_t UNLOCK_ALL_BY_WAY;          /*!< \brief Offset: 0x0954 (R/W) Unlock All Lines by Way         */
-        RESERVED(12[0xaa], uint32_t)
-  __IOM uint32_t ADDRESS_FILTER_START;       /*!< \brief Offset: 0x0c00 (R/W) Address Filtering Start         */
-  __IOM uint32_t ADDRESS_FILTER_END;         /*!< \brief Offset: 0x0c04 (R/W) Address Filtering End           */
-        RESERVED(13[0xce], uint32_t)
-  __IOM uint32_t DEBUG_CONTROL;              /*!< \brief Offset: 0x0f40 (R/W) Debug Control Register          */
-} L2C_310_TypeDef;
-
-#define L2C_310           ((L2C_310_TypeDef *)L2C_310_BASE) /*!< \brief L2C_310 register set access pointer */
-#endif
-
-#if (__GIC_PRESENT == 1U) || defined(DOXYGEN)
-    
-/** \brief  Structure type to access the Generic Interrupt Controller Distributor (GICD)
-*/
-typedef struct
-{
-  __IOM uint32_t CTLR;                 /*!< \brief  Offset: 0x000 (R/W) Distributor Control Register */
-  __IM  uint32_t TYPER;                /*!< \brief  Offset: 0x004 (R/ ) Interrupt Controller Type Register */
-  __IM  uint32_t IIDR;                 /*!< \brief  Offset: 0x008 (R/ ) Distributor Implementer Identification Register */
-        RESERVED(0, uint32_t)
-  __IOM uint32_t STATUSR;              /*!< \brief  Offset: 0x010 (R/W) Error Reporting Status Register, optional */
-        RESERVED(1[11], uint32_t)
-  __OM  uint32_t SETSPI_NSR;           /*!< \brief  Offset: 0x040 ( /W) Set SPI Register */
-        RESERVED(2, uint32_t)
-  __OM  uint32_t CLRSPI_NSR;           /*!< \brief  Offset: 0x048 ( /W) Clear SPI Register */
-        RESERVED(3, uint32_t)
-  __OM  uint32_t SETSPI_SR;            /*!< \brief  Offset: 0x050 ( /W) Set SPI, Secure Register */
-        RESERVED(4, uint32_t)
-  __OM  uint32_t CLRSPI_SR;            /*!< \brief  Offset: 0x058 ( /W) Clear SPI, Secure Register */
-        RESERVED(5[9], uint32_t)
-  __IOM uint32_t IGROUPR[32];          /*!< \brief  Offset: 0x080 (R/W) Interrupt Group Registers */
-  __IOM uint32_t ISENABLER[32];        /*!< \brief  Offset: 0x100 (R/W) Interrupt Set-Enable Registers */
-  __IOM uint32_t ICENABLER[32];        /*!< \brief  Offset: 0x180 (R/W) Interrupt Clear-Enable Registers */
-  __IOM uint32_t ISPENDR[32];          /*!< \brief  Offset: 0x200 (R/W) Interrupt Set-Pending Registers */
-  __IOM uint32_t ICPENDR[32];          /*!< \brief  Offset: 0x280 (R/W) Interrupt Clear-Pending Registers */
-  __IOM uint32_t ISACTIVER[32];        /*!< \brief  Offset: 0x300 (R/W) Interrupt Set-Active Registers */
-  __IOM uint32_t ICACTIVER[32];        /*!< \brief  Offset: 0x380 (R/W) Interrupt Clear-Active Registers */
-  __IOM uint32_t IPRIORITYR[255];      /*!< \brief  Offset: 0x400 (R/W) Interrupt Priority Registers */
-        RESERVED(6, uint32_t)
-  __IOM uint32_t  ITARGETSR[255];      /*!< \brief  Offset: 0x800 (R/W) Interrupt Targets Registers */
-        RESERVED(7, uint32_t)
-  __IOM uint32_t ICFGR[64];            /*!< \brief  Offset: 0xC00 (R/W) Interrupt Configuration Registers */
-  __IOM uint32_t IGRPMODR[32];         /*!< \brief  Offset: 0xD00 (R/W) Interrupt Group Modifier Registers */
-        RESERVED(8[32], uint32_t)
-  __IOM uint32_t NSACR[64];            /*!< \brief  Offset: 0xE00 (R/W) Non-secure Access Control Registers */
-  __OM  uint32_t SGIR;                 /*!< \brief  Offset: 0xF00 ( /W) Software Generated Interrupt Register */
-        RESERVED(9[3], uint32_t)
-  __IOM uint32_t CPENDSGIR[4];         /*!< \brief  Offset: 0xF10 (R/W) SGI Clear-Pending Registers */
-  __IOM uint32_t SPENDSGIR[4];         /*!< \brief  Offset: 0xF20 (R/W) SGI Set-Pending Registers */
-        RESERVED(10[5236], uint32_t)
-  __IOM uint64_t IROUTER[988];         /*!< \brief  Offset: 0x6100(R/W) Interrupt Routing Registers */
-}  GICDistributor_Type;
-
-#define GICDistributor      ((GICDistributor_Type      *)     GIC_DISTRIBUTOR_BASE ) /*!< \brief GIC Distributor register set access pointer */
-
-/** \brief  Structure type to access the Generic Interrupt Controller Interface (GICC)
-*/
-typedef struct
-{
-  __IOM uint32_t CTLR;                 /*!< \brief  Offset: 0x000 (R/W) CPU Interface Control Register */
-  __IOM uint32_t PMR;                  /*!< \brief  Offset: 0x004 (R/W) Interrupt Priority Mask Register */
-  __IOM uint32_t BPR;                  /*!< \brief  Offset: 0x008 (R/W) Binary Point Register */
-  __IM  uint32_t IAR;                  /*!< \brief  Offset: 0x00C (R/ ) Interrupt Acknowledge Register */
-  __OM  uint32_t EOIR;                 /*!< \brief  Offset: 0x010 ( /W) End Of Interrupt Register */
-  __IM  uint32_t RPR;                  /*!< \brief  Offset: 0x014 (R/ ) Running Priority Register */
-  __IM  uint32_t HPPIR;                /*!< \brief  Offset: 0x018 (R/ ) Highest Priority Pending Interrupt Register */
-  __IOM uint32_t ABPR;                 /*!< \brief  Offset: 0x01C (R/W) Aliased Binary Point Register */
-  __IM  uint32_t AIAR;                 /*!< \brief  Offset: 0x020 (R/ ) Aliased Interrupt Acknowledge Register */
-  __OM  uint32_t AEOIR;                /*!< \brief  Offset: 0x024 ( /W) Aliased End Of Interrupt Register */
-  __IM  uint32_t AHPPIR;               /*!< \brief  Offset: 0x028 (R/ ) Aliased Highest Priority Pending Interrupt Register */
-  __IOM uint32_t STATUSR;              /*!< \brief  Offset: 0x02C (R/W) Error Reporting Status Register, optional */
-        RESERVED(1[40], uint32_t)
-  __IOM uint32_t APR[4];               /*!< \brief  Offset: 0x0D0 (R/W) Active Priority Register */
-  __IOM uint32_t NSAPR[4];             /*!< \brief  Offset: 0x0E0 (R/W) Non-secure Active Priority Register */
-        RESERVED(2[3], uint32_t)
-  __IM  uint32_t IIDR;                 /*!< \brief  Offset: 0x0FC (R/ ) CPU Interface Identification Register */
-        RESERVED(3[960], uint32_t)
-  __OM  uint32_t DIR;                  /*!< \brief  Offset: 0x1000( /W) Deactivate Interrupt Register */
-}  GICInterface_Type;
-
-#define GICInterface        ((GICInterface_Type        *)     GIC_INTERFACE_BASE )   /*!< \brief GIC Interface register set access pointer */
-#endif
-
-#if (__TIM_PRESENT == 1U) || defined(DOXYGEN)
-#if ((__CORTEX_A == 5U) || (__CORTEX_A == 9U)) || defined(DOXYGEN)
-/** \brief Structure type to access the Private Timer
-*/
-typedef struct
-{
-  __IOM uint32_t LOAD;            //!< \brief  Offset: 0x000 (R/W) Private Timer Load Register
-  __IOM uint32_t COUNTER;         //!< \brief  Offset: 0x004 (R/W) Private Timer Counter Register
-  __IOM uint32_t CONTROL;         //!< \brief  Offset: 0x008 (R/W) Private Timer Control Register
-  __IOM uint32_t ISR;             //!< \brief  Offset: 0x00C (R/W) Private Timer Interrupt Status Register
-        RESERVED(0[4], uint32_t)
-  __IOM uint32_t WLOAD;           //!< \brief  Offset: 0x020 (R/W) Watchdog Load Register
-  __IOM uint32_t WCOUNTER;        //!< \brief  Offset: 0x024 (R/W) Watchdog Counter Register
-  __IOM uint32_t WCONTROL;        //!< \brief  Offset: 0x028 (R/W) Watchdog Control Register
-  __IOM uint32_t WISR;            //!< \brief  Offset: 0x02C (R/W) Watchdog Interrupt Status Register
-  __IOM uint32_t WRESET;          //!< \brief  Offset: 0x030 (R/W) Watchdog Reset Status Register
-  __OM  uint32_t WDISABLE;        //!< \brief  Offset: 0x034 ( /W) Watchdog Disable Register
-} Timer_Type;
-#define PTIM ((Timer_Type *) TIMER_BASE )   /*!< \brief Timer register struct */
-#endif
-#endif
-
- /*******************************************************************************
-  *                Hardware Abstraction Layer
-   Core Function Interface contains:
-   - L1 Cache Functions
-   - L2C-310 Cache Controller Functions 
-   - PL1 Timer Functions
-   - GIC Functions
-   - MMU Functions
-  ******************************************************************************/
- 
-/* ##########################  L1 Cache functions  ################################# */
-
-/** \brief Enable Caches by setting I and C bits in SCTLR register.
-*/
-__STATIC_FORCEINLINE void L1C_EnableCaches(void) {
-  __set_SCTLR( __get_SCTLR() | SCTLR_I_Msk | SCTLR_C_Msk);
-  __ISB();
-}
-
-/** \brief Disable Caches by clearing I and C bits in SCTLR register.
-*/
-__STATIC_FORCEINLINE void L1C_DisableCaches(void) {
-  __set_SCTLR( __get_SCTLR() & (~SCTLR_I_Msk) & (~SCTLR_C_Msk));
-  __ISB();
-}
-
-/** \brief  Enable Branch Prediction by setting Z bit in SCTLR register.
-*/
-__STATIC_FORCEINLINE void L1C_EnableBTAC(void) {
-  __set_SCTLR( __get_SCTLR() | SCTLR_Z_Msk);
-  __ISB();
-}
-
-/** \brief  Disable Branch Prediction by clearing Z bit in SCTLR register.
-*/
-__STATIC_FORCEINLINE void L1C_DisableBTAC(void) {
-  __set_SCTLR( __get_SCTLR() & (~SCTLR_Z_Msk));
-  __ISB();
-}
-
-/** \brief  Invalidate entire branch predictor array
-*/
-__STATIC_FORCEINLINE void L1C_InvalidateBTAC(void) {
-  __set_BPIALL(0);
-  __DSB();     //ensure completion of the invalidation
-  __ISB();     //ensure instruction fetch path sees new state
-}
-
-/** \brief  Invalidate the whole instruction cache
-*/
-__STATIC_FORCEINLINE void L1C_InvalidateICacheAll(void) {
-  __set_ICIALLU(0);
-  __DSB();     //ensure completion of the invalidation
-  __ISB();     //ensure instruction fetch path sees new I cache state
-}
-
-/** \brief  Clean data cache line by address.
-* \param [in] va Pointer to data to clear the cache for.
-*/
-__STATIC_FORCEINLINE void L1C_CleanDCacheMVA(void *va) {
-  __set_DCCMVAC((uint32_t)va);
-  __DMB();     //ensure the ordering of data cache maintenance operations and their effects
-}
-
-/** \brief  Invalidate data cache line by address.
-* \param [in] va Pointer to data to invalidate the cache for.
-*/
-__STATIC_FORCEINLINE void L1C_InvalidateDCacheMVA(void *va) {
-  __set_DCIMVAC((uint32_t)va);
-  __DMB();     //ensure the ordering of data cache maintenance operations and their effects
-}
-
-/** \brief  Clean and Invalidate data cache by address.
-* \param [in] va Pointer to data to invalidate the cache for.
-*/
-__STATIC_FORCEINLINE void L1C_CleanInvalidateDCacheMVA(void *va) {
-  __set_DCCIMVAC((uint32_t)va);
-  __DMB();     //ensure the ordering of data cache maintenance operations and their effects
-}
-
-/** \brief Calculate log2 rounded up
-*  - log(0)  => 0
-*  - log(1)  => 0
-*  - log(2)  => 1
-*  - log(3)  => 2
-*  - log(4)  => 2
-*  - log(5)  => 3
-*        :      :
-*  - log(16) => 4
-*  - log(32) => 5
-*        :      :
-* \param [in] n input value parameter 
-* \return log2(n)
-*/
-__STATIC_FORCEINLINE uint8_t __log2_up(uint32_t n)
-{
-  if (n < 2U) {
-    return 0U;
-  }
-  uint8_t log = 0U;
-  uint32_t t = n;
-  while(t > 1U)
-  {
-    log++;
-    t >>= 1U;
-  }
-  if (n & 1U) { log++; }
-  return log;
-}
-
-/** \brief  Apply cache maintenance to given cache level.
-* \param [in] level cache level to be maintained
-* \param [in] maint 0 - invalidate, 1 - clean, otherwise - invalidate and clean
-*/
-__STATIC_FORCEINLINE void __L1C_MaintainDCacheSetWay(uint32_t level, uint32_t maint)
-{
-  uint32_t Dummy;
-  uint32_t ccsidr;
-  uint32_t num_sets;
-  uint32_t num_ways;
-  uint32_t shift_way;
-  uint32_t log2_linesize;
-   int32_t log2_num_ways;
-
-  Dummy = level << 1U;
-  /* set csselr, select ccsidr register */
-  __set_CSSELR(Dummy);
-  /* get current ccsidr register */
-  ccsidr = __get_CCSIDR();
-  num_sets = ((ccsidr & 0x0FFFE000U) >> 13U) + 1U;
-  num_ways = ((ccsidr & 0x00001FF8U) >> 3U) + 1U;
-  log2_linesize = (ccsidr & 0x00000007U) + 2U + 2U;
-  log2_num_ways = __log2_up(num_ways);
-  if ((log2_num_ways < 0) || (log2_num_ways > 32)) {
-    return; // FATAL ERROR
-  }
-  shift_way = 32U - (uint32_t)log2_num_ways;
-  for(int32_t way = num_ways-1; way >= 0; way--)
-  {
-    for(int32_t set = num_sets-1; set >= 0; set--)
-    {
-      Dummy = (level << 1U) | (((uint32_t)set) << log2_linesize) | (((uint32_t)way) << shift_way);
-      switch (maint)
-      {
-        case 0U: __set_DCISW(Dummy);  break;
-        case 1U: __set_DCCSW(Dummy);  break;
-        default: __set_DCCISW(Dummy); break;
-      }
-    }
-  }
-  __DMB();
-}
-
-/** \brief  Clean and Invalidate the entire data or unified cache
-* Generic mechanism for cleaning/invalidating the entire data or unified cache to the point of coherency
-* \param [in] op 0 - invalidate, 1 - clean, otherwise - invalidate and clean
-*/
-__STATIC_FORCEINLINE void L1C_CleanInvalidateCache(uint32_t op) {
-  uint32_t clidr;
-  uint32_t cache_type;
-  clidr =  __get_CLIDR();
-  for(uint32_t i = 0U; i<7U; i++)
-  {
-    cache_type = (clidr >> i*3U) & 0x7UL;
-    if ((cache_type >= 2U) && (cache_type <= 4U))
-    {
-      __L1C_MaintainDCacheSetWay(i, op);
-    }
-  }
-}
-
-/** \brief  Clean and Invalidate the entire data or unified cache
-* Generic mechanism for cleaning/invalidating the entire data or unified cache to the point of coherency
-* \param [in] op 0 - invalidate, 1 - clean, otherwise - invalidate and clean
-* \deprecated Use generic L1C_CleanInvalidateCache instead.
-*/
-CMSIS_DEPRECATED
-__STATIC_FORCEINLINE void __L1C_CleanInvalidateCache(uint32_t op) {
-  L1C_CleanInvalidateCache(op);
-}
-
-/** \brief  Invalidate the whole data cache.
-*/
-__STATIC_FORCEINLINE void L1C_InvalidateDCacheAll(void) {
-  L1C_CleanInvalidateCache(0);
-}
-
-/** \brief  Clean the whole data cache.
- */
-__STATIC_FORCEINLINE void L1C_CleanDCacheAll(void) {
-  L1C_CleanInvalidateCache(1);
-}
-
-/** \brief  Clean and invalidate the whole data cache.
- */
-__STATIC_FORCEINLINE void L1C_CleanInvalidateDCacheAll(void) {
-  L1C_CleanInvalidateCache(2);
-}
-
-/* ##########################  L2 Cache functions  ################################# */
-#if (__L2C_PRESENT == 1U) || defined(DOXYGEN)
-/** \brief Cache Sync operation by writing CACHE_SYNC register.
-*/
-__STATIC_INLINE void L2C_Sync(void)
-{
-  L2C_310->CACHE_SYNC = 0x0;
-}
-
-/** \brief Read cache controller cache ID from CACHE_ID register.
- * \return L2C_310_TypeDef::CACHE_ID
- */
-__STATIC_INLINE int L2C_GetID (void)
-{
-  return L2C_310->CACHE_ID;
-}
-
-/** \brief Read cache controller cache type from CACHE_TYPE register.
-*  \return L2C_310_TypeDef::CACHE_TYPE
-*/
-__STATIC_INLINE int L2C_GetType (void)
-{
-  return L2C_310->CACHE_TYPE;
-}
-
-/** \brief Invalidate all cache by way
-*/
-__STATIC_INLINE void L2C_InvAllByWay (void)
-{
-  unsigned int assoc;
-
-  if (L2C_310->AUX_CNT & (1U << 16U)) {
-    assoc = 16U;
-  } else {
-    assoc =  8U;
-  }
-  
-  L2C_310->INV_WAY = (1U << assoc) - 1U;
-  while(L2C_310->INV_WAY & ((1U << assoc) - 1U)); //poll invalidate
-
-  L2C_Sync();
-}
-
-/** \brief Clean and Invalidate all cache by way
-*/
-__STATIC_INLINE void L2C_CleanInvAllByWay (void)
-{
-  unsigned int assoc;
-
-  if (L2C_310->AUX_CNT & (1U << 16U)) {
-    assoc = 16U;
-  } else {
-    assoc =  8U;
-  }
-
-  L2C_310->CLEAN_INV_WAY = (1U << assoc) - 1U;
-  while(L2C_310->CLEAN_INV_WAY & ((1U << assoc) - 1U)); //poll invalidate
-
-  L2C_Sync();
-}
-
-/** \brief Enable Level 2 Cache
-*/
-__STATIC_INLINE void L2C_Enable(void)
-{
-  L2C_310->CONTROL = 0;
-  L2C_310->INTERRUPT_CLEAR = 0x000001FFuL;
-  L2C_310->DEBUG_CONTROL = 0;
-  L2C_310->DATA_LOCK_0_WAY = 0;
-  L2C_310->CACHE_SYNC = 0;
-  L2C_310->CONTROL = 0x01;
-  L2C_Sync();
-}
-
-/** \brief Disable Level 2 Cache
-*/
-__STATIC_INLINE void L2C_Disable(void)
-{
-  L2C_310->CONTROL = 0x00;
-  L2C_Sync();
-}
-
-/** \brief Invalidate cache by physical address
-* \param [in] pa Pointer to data to invalidate cache for.
-*/
-__STATIC_INLINE void L2C_InvPa (void *pa)
-{
-  L2C_310->INV_LINE_PA = (unsigned int)pa;
-  L2C_Sync();
-}
-
-/** \brief Clean cache by physical address
-* \param [in] pa Pointer to data to invalidate cache for.
-*/
-__STATIC_INLINE void L2C_CleanPa (void *pa)
-{
-  L2C_310->CLEAN_LINE_PA = (unsigned int)pa;
-  L2C_Sync();
-}
-
-/** \brief Clean and invalidate cache by physical address
-* \param [in] pa Pointer to data to invalidate cache for.
-*/
-__STATIC_INLINE void L2C_CleanInvPa (void *pa)
-{
-  L2C_310->CLEAN_INV_LINE_PA = (unsigned int)pa;
-  L2C_Sync();
-}
-#endif
-
-/* ##########################  GIC functions  ###################################### */
-#if (__GIC_PRESENT == 1U) || defined(DOXYGEN)
-  
-/** \brief  Enable the interrupt distributor using the GIC's CTLR register.
-*/
-__STATIC_INLINE void GIC_EnableDistributor(void)
-{
-  GICDistributor->CTLR |= 1U;
-}
-
-/** \brief Disable the interrupt distributor using the GIC's CTLR register.
-*/
-__STATIC_INLINE void GIC_DisableDistributor(void)
-{
-  GICDistributor->CTLR &=~1U;
-}
-
-/** \brief Read the GIC's TYPER register.
-* \return GICDistributor_Type::TYPER
-*/
-__STATIC_INLINE uint32_t GIC_DistributorInfo(void)
-{
-  return (GICDistributor->TYPER);
-}
-
-/** \brief Reads the GIC's IIDR register.
-* \return GICDistributor_Type::IIDR
-*/
-__STATIC_INLINE uint32_t GIC_DistributorImplementer(void)
-{
-  return (GICDistributor->IIDR);
-}
-
-/** \brief Sets the GIC's ITARGETSR register for the given interrupt.
-* \param [in] IRQn Interrupt to be configured.
-* \param [in] cpu_target CPU interfaces to assign this interrupt to.
-*/
-__STATIC_INLINE void GIC_SetTarget(IRQn_Type IRQn, uint32_t cpu_target)
-{
-  uint32_t mask = GICDistributor->ITARGETSR[IRQn / 4U] & ~(0xFFUL << ((IRQn % 4U) * 8U));
-  GICDistributor->ITARGETSR[IRQn / 4U] = mask | ((cpu_target & 0xFFUL) << ((IRQn % 4U) * 8U));
-}
-
-/** \brief Read the GIC's ITARGETSR register.
-* \param [in] IRQn Interrupt to acquire the configuration for.
-* \return GICDistributor_Type::ITARGETSR
-*/
-__STATIC_INLINE uint32_t GIC_GetTarget(IRQn_Type IRQn)
-{
-  return (GICDistributor->ITARGETSR[IRQn / 4U] >> ((IRQn % 4U) * 8U)) & 0xFFUL;
-}
-
-/** \brief Enable the CPU's interrupt interface.
-*/
-__STATIC_INLINE void GIC_EnableInterface(void)
-{
-  GICInterface->CTLR |= 1U; //enable interface
-}
-
-/** \brief Disable the CPU's interrupt interface.
-*/
-__STATIC_INLINE void GIC_DisableInterface(void)
-{
-  GICInterface->CTLR &=~1U; //disable distributor
-}
-
-/** \brief Read the CPU's IAR register.
-* \return GICInterface_Type::IAR
-*/
-__STATIC_INLINE IRQn_Type GIC_AcknowledgePending(void)
-{
-  return (IRQn_Type)(GICInterface->IAR);
-}
-
-/** \brief Writes the given interrupt number to the CPU's EOIR register.
-* \param [in] IRQn The interrupt to be signaled as finished.
-*/
-__STATIC_INLINE void GIC_EndInterrupt(IRQn_Type IRQn)
-{
-  GICInterface->EOIR = IRQn;
-}
-
-/** \brief Enables the given interrupt using GIC's ISENABLER register.
-* \param [in] IRQn The interrupt to be enabled.
-*/
-__STATIC_INLINE void GIC_EnableIRQ(IRQn_Type IRQn)
-{
-  GICDistributor->ISENABLER[IRQn / 32U] = 1U << (IRQn % 32U);
-}
-
-/** \brief Get interrupt enable status using GIC's ISENABLER register.
-* \param [in] IRQn The interrupt to be queried.
-* \return 0 - interrupt is not enabled, 1 - interrupt is enabled.
-*/
-__STATIC_INLINE uint32_t GIC_GetEnableIRQ(IRQn_Type IRQn)
-{
-  return (GICDistributor->ISENABLER[IRQn / 32U] >> (IRQn % 32U)) & 1UL;
-}
-
-/** \brief Disables the given interrupt using GIC's ICENABLER register.
-* \param [in] IRQn The interrupt to be disabled.
-*/
-__STATIC_INLINE void GIC_DisableIRQ(IRQn_Type IRQn)
-{
-  GICDistributor->ICENABLER[IRQn / 32U] = 1U << (IRQn % 32U);
-}
-
-/** \brief Get interrupt pending status from GIC's ISPENDR register.
-* \param [in] IRQn The interrupt to be queried.
-* \return 0 - interrupt is not pending, 1 - interrupt is pendig.
-*/
-__STATIC_INLINE uint32_t GIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  uint32_t pend;
-
-  if (IRQn >= 16U) {
-    pend = (GICDistributor->ISPENDR[IRQn / 32U] >> (IRQn % 32U)) & 1UL;
-  } else {
-    // INTID 0-15 Software Generated Interrupt
-    pend = (GICDistributor->SPENDSGIR[IRQn / 4U] >> ((IRQn % 4U) * 8U)) & 0xFFUL;
-    // No CPU identification offered
-    if (pend != 0U) {
-      pend = 1U;
-    } else {
-      pend = 0U;
-    }
-  }
-
-  return (pend);
-}
-
-/** \brief Sets the given interrupt as pending using GIC's ISPENDR register.
-* \param [in] IRQn The interrupt to be enabled.
-*/
-__STATIC_INLINE void GIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  if (IRQn >= 16U) {
-    GICDistributor->ISPENDR[IRQn / 32U] = 1U << (IRQn % 32U);
-  } else {
-    // INTID 0-15 Software Generated Interrupt
-    GICDistributor->SPENDSGIR[IRQn / 4U] = 1U << ((IRQn % 4U) * 8U);
-  }
-}
-
-/** \brief Clears the given interrupt from being pending using GIC's ICPENDR register.
-* \param [in] IRQn The interrupt to be enabled.
-*/
-__STATIC_INLINE void GIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  if (IRQn >= 16U) {
-    GICDistributor->ICPENDR[IRQn / 32U] = 1U << (IRQn % 32U);
-  } else {
-    // INTID 0-15 Software Generated Interrupt
-    GICDistributor->CPENDSGIR[IRQn / 4U] = 1U << ((IRQn % 4U) * 8U);
-  }
-}
-
-/** \brief Sets the interrupt configuration using GIC's ICFGR register.
-* \param [in] IRQn The interrupt to be configured.
-* \param [in] int_config Int_config field value. Bit 0: Reserved (0 - N-N model, 1 - 1-N model for some GIC before v1)
-*                                           Bit 1: 0 - level sensitive, 1 - edge triggered
-*/
-__STATIC_INLINE void GIC_SetConfiguration(IRQn_Type IRQn, uint32_t int_config)
-{
-  uint32_t icfgr = GICDistributor->ICFGR[IRQn / 16U];
-  uint32_t shift = (IRQn % 16U) << 1U;
-
-  icfgr &= (~(3U         << shift));
-  icfgr |= (  int_config << shift);
-
-  GICDistributor->ICFGR[IRQn / 16U] = icfgr;
-}
-
-/** \brief Get the interrupt configuration from the GIC's ICFGR register.
-* \param [in] IRQn Interrupt to acquire the configuration for.
-* \return Int_config field value. Bit 0: Reserved (0 - N-N model, 1 - 1-N model for some GIC before v1)
-*                                 Bit 1: 0 - level sensitive, 1 - edge triggered
-*/
-__STATIC_INLINE uint32_t GIC_GetConfiguration(IRQn_Type IRQn)
-{
-  return (GICDistributor->ICFGR[IRQn / 16U] >> ((IRQn % 16U) >> 1U));
-}
-
-/** \brief Set the priority for the given interrupt in the GIC's IPRIORITYR register.
-* \param [in] IRQn The interrupt to be configured.
-* \param [in] priority The priority for the interrupt, lower values denote higher priorities.
-*/
-__STATIC_INLINE void GIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  uint32_t mask = GICDistributor->IPRIORITYR[IRQn / 4U] & ~(0xFFUL << ((IRQn % 4U) * 8U));
-  GICDistributor->IPRIORITYR[IRQn / 4U] = mask | ((priority & 0xFFUL) << ((IRQn % 4U) * 8U));
-}
-
-/** \brief Read the current interrupt priority from GIC's IPRIORITYR register.
-* \param [in] IRQn The interrupt to be queried.
-*/
-__STATIC_INLINE uint32_t GIC_GetPriority(IRQn_Type IRQn)
-{
-  return (GICDistributor->IPRIORITYR[IRQn / 4U] >> ((IRQn % 4U) * 8U)) & 0xFFUL;
-}
-
-/** \brief Set the interrupt priority mask using CPU's PMR register.
-* \param [in] priority Priority mask to be set.
-*/
-__STATIC_INLINE void GIC_SetInterfacePriorityMask(uint32_t priority)
-{
-  GICInterface->PMR = priority & 0xFFUL; //set priority mask
-}
-
-/** \brief Read the current interrupt priority mask from CPU's PMR register.
-* \result GICInterface_Type::PMR
-*/
-__STATIC_INLINE uint32_t GIC_GetInterfacePriorityMask(void)
-{
-  return GICInterface->PMR;
-}
-
-/** \brief Configures the group priority and subpriority split point using CPU's BPR register.
-* \param [in] binary_point Amount of bits used as subpriority.
-*/
-__STATIC_INLINE void GIC_SetBinaryPoint(uint32_t binary_point)
-{
-  GICInterface->BPR = binary_point & 7U; //set binary point
-}
-
-/** \brief Read the current group priority and subpriority split point from CPU's BPR register.
-* \return GICInterface_Type::BPR
-*/
-__STATIC_INLINE uint32_t GIC_GetBinaryPoint(void)
-{
-  return GICInterface->BPR;
-}
-
-/** \brief Get the status for a given interrupt.
-* \param [in] IRQn The interrupt to get status for.
-* \return 0 - not pending/active, 1 - pending, 2 - active, 3 - pending and active
-*/
-__STATIC_INLINE uint32_t GIC_GetIRQStatus(IRQn_Type IRQn)
-{
-  uint32_t pending, active;
-
-  active = ((GICDistributor->ISACTIVER[IRQn / 32U])  >> (IRQn % 32U)) & 1UL;
-  pending = ((GICDistributor->ISPENDR[IRQn / 32U]) >> (IRQn % 32U)) & 1UL;
-
-  return ((active<<1U) | pending);
-}
-
-/** \brief Generate a software interrupt using GIC's SGIR register.
-* \param [in] IRQn Software interrupt to be generated.
-* \param [in] target_list List of CPUs the software interrupt should be forwarded to.
-* \param [in] filter_list Filter to be applied to determine interrupt receivers.
-*/
-__STATIC_INLINE void GIC_SendSGI(IRQn_Type IRQn, uint32_t target_list, uint32_t filter_list)
-{
-  GICDistributor->SGIR = ((filter_list & 3U) << 24U) | ((target_list & 0xFFUL) << 16U) | (IRQn & 0x0FUL);
-}
-
-/** \brief Get the interrupt number of the highest interrupt pending from CPU's HPPIR register.
-* \return GICInterface_Type::HPPIR
-*/
-__STATIC_INLINE uint32_t GIC_GetHighPendingIRQ(void) 
-{ 
-  return GICInterface->HPPIR; 
-}
-
-/** \brief Provides information about the implementer and revision of the CPU interface.
-* \return GICInterface_Type::IIDR
-*/
-__STATIC_INLINE uint32_t GIC_GetInterfaceId(void)
-{ 
-  return GICInterface->IIDR; 
-}
-
-/** \brief Set the interrupt group from the GIC's IGROUPR register.
-* \param [in] IRQn The interrupt to be queried.
-* \param [in] group Interrupt group number: 0 - Group 0, 1 - Group 1
-*/
-__STATIC_INLINE void GIC_SetGroup(IRQn_Type IRQn, uint32_t group)
-{
-  uint32_t igroupr = GICDistributor->IGROUPR[IRQn / 32U];
-  uint32_t shift   = (IRQn % 32U);
-
-  igroupr &= (~(1U          << shift));
-  igroupr |= ( (group & 1U) << shift);
-
-  GICDistributor->IGROUPR[IRQn / 32U] = igroupr;
-}
-#define GIC_SetSecurity         GIC_SetGroup
-
-/** \brief Get the interrupt group from the GIC's IGROUPR register.
-* \param [in] IRQn The interrupt to be queried.
-* \return 0 - Group 0, 1 - Group 1
-*/
-__STATIC_INLINE uint32_t GIC_GetGroup(IRQn_Type IRQn)
-{
-  return (GICDistributor->IGROUPR[IRQn / 32U] >> (IRQn % 32U)) & 1UL;
-}
-#define GIC_GetSecurity         GIC_GetGroup
-
-/** \brief Initialize the interrupt distributor.
-*/
-__STATIC_INLINE void GIC_DistInit(void)
-{
-  uint32_t i;
-  uint32_t num_irq = 0U;
-  uint32_t priority_field;
-
-  //A reset sets all bits in the IGROUPRs corresponding to the SPIs to 0,
-  //configuring all of the interrupts as Secure.
-
-  //Disable interrupt forwarding
-  GIC_DisableDistributor();
-  //Get the maximum number of interrupts that the GIC supports
-  num_irq = 32U * ((GIC_DistributorInfo() & 0x1FU) + 1U);
-
-  /* Priority level is implementation defined.
-   To determine the number of priority bits implemented write 0xFF to an IPRIORITYR
-   priority field and read back the value stored.*/
-  GIC_SetPriority((IRQn_Type)0U, 0xFFU);
-  priority_field = GIC_GetPriority((IRQn_Type)0U);
-
-  for (i = 32U; i < num_irq; i++)
-  {
-      //Disable the SPI interrupt
-      GIC_DisableIRQ((IRQn_Type)i);
-      //Set level-sensitive (and N-N model)
-      GIC_SetConfiguration((IRQn_Type)i, 0U);
-      //Set priority
-      GIC_SetPriority((IRQn_Type)i, priority_field/2U);
-      //Set target list to CPU0
-      GIC_SetTarget((IRQn_Type)i, 1U);
-  }
-  //Enable distributor
-  GIC_EnableDistributor();
-}
-
-/** \brief Initialize the CPU's interrupt interface
-*/
-__STATIC_INLINE void GIC_CPUInterfaceInit(void)
-{
-  uint32_t i;
-  uint32_t priority_field;
-
-  //A reset sets all bits in the IGROUPRs corresponding to the SPIs to 0,
-  //configuring all of the interrupts as Secure.
-
-  //Disable interrupt forwarding
-  GIC_DisableInterface();
-
-  /* Priority level is implementation defined.
-   To determine the number of priority bits implemented write 0xFF to an IPRIORITYR
-   priority field and read back the value stored.*/
-  GIC_SetPriority((IRQn_Type)0U, 0xFFU);
-  priority_field = GIC_GetPriority((IRQn_Type)0U);
-
-  //SGI and PPI
-  for (i = 0U; i < 32U; i++)
-  {
-    if(i > 15U) {
-      //Set level-sensitive (and N-N model) for PPI
-      GIC_SetConfiguration((IRQn_Type)i, 0U);
-    }
-    //Disable SGI and PPI interrupts
-    GIC_DisableIRQ((IRQn_Type)i);
-    //Set priority
-    GIC_SetPriority((IRQn_Type)i, priority_field/2U);
-  }
-  //Enable interface
-  GIC_EnableInterface();
-  //Set binary point to 0
-  GIC_SetBinaryPoint(0U);
-  //Set priority mask
-  GIC_SetInterfacePriorityMask(0xFFU);
-}
-
-/** \brief Initialize and enable the GIC
-*/
-__STATIC_INLINE void GIC_Enable(void)
-{
-  GIC_DistInit();
-  GIC_CPUInterfaceInit(); //per CPU
-}
-#endif
-
-/* ##########################  Generic Timer functions  ############################ */
-#if (__TIM_PRESENT == 1U) || defined(DOXYGEN)
-  
-/* PL1 Physical Timer */
-#if (__CORTEX_A == 7U) || defined(DOXYGEN)
-  
-/** \brief Physical Timer Control register */
-typedef union
-{
-  struct
-  {
-    uint32_t ENABLE:1;      /*!< \brief bit: 0      Enables the timer. */
-    uint32_t IMASK:1;       /*!< \brief bit: 1      Timer output signal mask bit. */
-    uint32_t ISTATUS:1;     /*!< \brief bit: 2      The status of the timer. */
-    RESERVED(0:29, uint32_t)
-  } b;                      /*!< \brief Structure used for bit  access */
-  uint32_t w;               /*!< \brief Type      used for word access */
-} CNTP_CTL_Type;
-
-/** \brief Configures the frequency the timer shall run at.
-* \param [in] value The timer frequency in Hz.
-*/
-__STATIC_INLINE void PL1_SetCounterFrequency(uint32_t value)
-{
-  __set_CNTFRQ(value);
-  __ISB();
-}
-
-/** \brief Sets the reset value of the timer.
-* \param [in] value The value the timer is loaded with.
-*/
-__STATIC_INLINE void PL1_SetLoadValue(uint32_t value)
-{
-  __set_CNTP_TVAL(value);
-  __ISB();
-}
-
-/** \brief Get the current counter value.
-* \return Current counter value.
-*/
-__STATIC_INLINE uint32_t PL1_GetCurrentValue(void)
-{
-  return(__get_CNTP_TVAL());
-}
-
-/** \brief Get the current physical counter value.
-* \return Current physical counter value.
-*/
-__STATIC_INLINE uint64_t PL1_GetCurrentPhysicalValue(void)
-{
-  return(__get_CNTPCT());
-}
-
-/** \brief Set the physical compare value.
-* \param [in] value New physical timer compare value.
-*/
-__STATIC_INLINE void PL1_SetPhysicalCompareValue(uint64_t value)
-{
-  __set_CNTP_CVAL(value);
-  __ISB();
-}
-
-/** \brief Get the physical compare value.
-* \return Physical compare value.
-*/
-__STATIC_INLINE uint64_t PL1_GetPhysicalCompareValue(void)
-{
-  return(__get_CNTP_CVAL());
-}
-
-/** \brief Configure the timer by setting the control value.
-* \param [in] value New timer control value.
-*/
-__STATIC_INLINE void PL1_SetControl(uint32_t value)
-{
-  __set_CNTP_CTL(value);
-  __ISB();
-}
-
-/** \brief Get the control value.
-* \return Control value.
-*/
-__STATIC_INLINE uint32_t PL1_GetControl(void)
-{
-  return(__get_CNTP_CTL());
-}
-#endif
-
-/* Private Timer */
-#if ((__CORTEX_A == 5U) || (__CORTEX_A == 9U)) || defined(DOXYGEN)
-/** \brief Set the load value to timers LOAD register.
-* \param [in] value The load value to be set.
-*/
-__STATIC_INLINE void PTIM_SetLoadValue(uint32_t value)
-{
-  PTIM->LOAD = value;
-}
-
-/** \brief Get the load value from timers LOAD register.
-* \return Timer_Type::LOAD
-*/
-__STATIC_INLINE uint32_t PTIM_GetLoadValue(void)
-{
-  return(PTIM->LOAD);
-}
-
-/** \brief Set current counter value from its COUNTER register.
-*/
-__STATIC_INLINE void PTIM_SetCurrentValue(uint32_t value)
-{
-  PTIM->COUNTER = value;
-}
-
-/** \brief Get current counter value from timers COUNTER register.
-* \result Timer_Type::COUNTER
-*/
-__STATIC_INLINE uint32_t PTIM_GetCurrentValue(void)
-{
-  return(PTIM->COUNTER);
-}
-
-/** \brief Configure the timer using its CONTROL register.
-* \param [in] value The new configuration value to be set.
-*/
-__STATIC_INLINE void PTIM_SetControl(uint32_t value)
-{
-  PTIM->CONTROL = value;
-}
-
-/** ref Timer_Type::CONTROL Get the current timer configuration from its CONTROL register.
-* \return Timer_Type::CONTROL
-*/
-__STATIC_INLINE uint32_t PTIM_GetControl(void)
-{
-  return(PTIM->CONTROL);
-}
-
-/** ref Timer_Type::CONTROL Get the event flag in timers ISR register.
-* \return 0 - flag is not set, 1- flag is set
-*/
-__STATIC_INLINE uint32_t PTIM_GetEventFlag(void)
-{
-  return (PTIM->ISR & 1UL);
-}
-
-/** ref Timer_Type::CONTROL Clears the event flag in timers ISR register.
-*/
-__STATIC_INLINE void PTIM_ClearEventFlag(void)
-{
-  PTIM->ISR = 1;
-}
-#endif
-#endif
-
-/* ##########################  MMU functions  ###################################### */
-
-#define SECTION_DESCRIPTOR      (0x2)
-#define SECTION_MASK            (0xFFFFFFFC)
-
-#define SECTION_TEXCB_MASK      (0xFFFF8FF3)
-#define SECTION_B_SHIFT         (2)
-#define SECTION_C_SHIFT         (3)
-#define SECTION_TEX0_SHIFT      (12)
-#define SECTION_TEX1_SHIFT      (13)
-#define SECTION_TEX2_SHIFT      (14)
-
-#define SECTION_XN_MASK         (0xFFFFFFEF)
-#define SECTION_XN_SHIFT        (4)
-
-#define SECTION_DOMAIN_MASK     (0xFFFFFE1F)
-#define SECTION_DOMAIN_SHIFT    (5)
-
-#define SECTION_P_MASK          (0xFFFFFDFF)
-#define SECTION_P_SHIFT         (9)
-
-#define SECTION_AP_MASK         (0xFFFF73FF)
-#define SECTION_AP_SHIFT        (10)
-#define SECTION_AP2_SHIFT       (15)
-
-#define SECTION_S_MASK          (0xFFFEFFFF)
-#define SECTION_S_SHIFT         (16)
-
-#define SECTION_NG_MASK         (0xFFFDFFFF)
-#define SECTION_NG_SHIFT        (17)
-
-#define SECTION_NS_MASK         (0xFFF7FFFF)
-#define SECTION_NS_SHIFT        (19)
-
-#define PAGE_L1_DESCRIPTOR      (0x1)
-#define PAGE_L1_MASK            (0xFFFFFFFC)
-
-#define PAGE_L2_4K_DESC         (0x2)
-#define PAGE_L2_4K_MASK         (0xFFFFFFFD)
-
-#define PAGE_L2_64K_DESC        (0x1)
-#define PAGE_L2_64K_MASK        (0xFFFFFFFC)
-
-#define PAGE_4K_TEXCB_MASK      (0xFFFFFE33)
-#define PAGE_4K_B_SHIFT         (2)
-#define PAGE_4K_C_SHIFT         (3)
-#define PAGE_4K_TEX0_SHIFT      (6)
-#define PAGE_4K_TEX1_SHIFT      (7)
-#define PAGE_4K_TEX2_SHIFT      (8)
-
-#define PAGE_64K_TEXCB_MASK     (0xFFFF8FF3)
-#define PAGE_64K_B_SHIFT        (2)
-#define PAGE_64K_C_SHIFT        (3)
-#define PAGE_64K_TEX0_SHIFT     (12)
-#define PAGE_64K_TEX1_SHIFT     (13)
-#define PAGE_64K_TEX2_SHIFT     (14)
-
-#define PAGE_TEXCB_MASK         (0xFFFF8FF3)
-#define PAGE_B_SHIFT            (2)
-#define PAGE_C_SHIFT            (3)
-#define PAGE_TEX_SHIFT          (12)
-
-#define PAGE_XN_4K_MASK         (0xFFFFFFFE)
-#define PAGE_XN_4K_SHIFT        (0)
-#define PAGE_XN_64K_MASK        (0xFFFF7FFF)
-#define PAGE_XN_64K_SHIFT       (15)
-
-#define PAGE_DOMAIN_MASK        (0xFFFFFE1F)
-#define PAGE_DOMAIN_SHIFT       (5)
-
-#define PAGE_P_MASK             (0xFFFFFDFF)
-#define PAGE_P_SHIFT            (9)
-
-#define PAGE_AP_MASK            (0xFFFFFDCF)
-#define PAGE_AP_SHIFT           (4)
-#define PAGE_AP2_SHIFT          (9)
-
-#define PAGE_S_MASK             (0xFFFFFBFF)
-#define PAGE_S_SHIFT            (10)
-
-#define PAGE_NG_MASK            (0xFFFFF7FF)
-#define PAGE_NG_SHIFT           (11)
-
-#define PAGE_NS_MASK            (0xFFFFFFF7)
-#define PAGE_NS_SHIFT           (3)
-
-#define OFFSET_1M               (0x00100000)
-#define OFFSET_64K              (0x00010000)
-#define OFFSET_4K               (0x00001000)
-
-#define DESCRIPTOR_FAULT        (0x00000000)
-
-/* Attributes enumerations */
-
-/* Region size attributes */
-typedef enum
-{
-   SECTION,
-   PAGE_4k,
-   PAGE_64k,
-} mmu_region_size_Type;
-
-/* Region type attributes */
-typedef enum
-{
-   NORMAL,
-   DEVICE,
-   SHARED_DEVICE,
-   NON_SHARED_DEVICE,
-   STRONGLY_ORDERED
-} mmu_memory_Type;
-
-/* Region cacheability attributes */
-typedef enum
-{
-   NON_CACHEABLE,
-   WB_WA,
-   WT,
-   WB_NO_WA,
-} mmu_cacheability_Type;
-
-/* Region parity check attributes */
-typedef enum
-{
-   ECC_DISABLED,
-   ECC_ENABLED,
-} mmu_ecc_check_Type;
-
-/* Region execution attributes */
-typedef enum
-{
-   EXECUTE,
-   NON_EXECUTE,
-} mmu_execute_Type;
-
-/* Region global attributes */
-typedef enum
-{
-   GLOBAL,
-   NON_GLOBAL,
-} mmu_global_Type;
-
-/* Region shareability attributes */
-typedef enum
-{
-   NON_SHARED,
-   SHARED,
-} mmu_shared_Type;
-
-/* Region security attributes */
-typedef enum
-{
-   SECURE,
-   NON_SECURE,
-} mmu_secure_Type;
-
-/* Region access attributes */
-typedef enum
-{
-   NO_ACCESS,
-   RW,
-   READ,
-} mmu_access_Type;
-
-/* Memory Region definition */
-typedef struct RegionStruct {
-    mmu_region_size_Type rg_t;
-    mmu_memory_Type mem_t;
-    uint8_t domain;
-    mmu_cacheability_Type inner_norm_t;
-    mmu_cacheability_Type outer_norm_t;
-    mmu_ecc_check_Type e_t;
-    mmu_execute_Type xn_t;
-    mmu_global_Type g_t;
-    mmu_secure_Type sec_t;
-    mmu_access_Type priv_t;
-    mmu_access_Type user_t;
-    mmu_shared_Type sh_t;
-
-} mmu_region_attributes_Type;
-
-//Following macros define the descriptors and attributes
-//Sect_Normal. Outer & inner wb/wa, non-shareable, executable, rw, domain 0
-#define section_normal(descriptor_l1, region)     region.rg_t = SECTION; \
-                                   region.domain = 0x0; \
-                                   region.e_t = ECC_DISABLED; \
-                                   region.g_t = GLOBAL; \
-                                   region.inner_norm_t = WB_WA; \
-                                   region.outer_norm_t = WB_WA; \
-                                   region.mem_t = NORMAL; \
-                                   region.sec_t = SECURE; \
-                                   region.xn_t = EXECUTE; \
-                                   region.priv_t = RW; \
-                                   region.user_t = RW; \
-                                   region.sh_t = NON_SHARED; \
-                                   MMU_GetSectionDescriptor(&descriptor_l1, region);
-
-//Sect_Normal_NC. Outer & inner non-cacheable, non-shareable, executable, rw, domain 0
-#define section_normal_nc(descriptor_l1, region)     region.rg_t = SECTION; \
-                                   region.domain = 0x0; \
-                                   region.e_t = ECC_DISABLED; \
-                                   region.g_t = GLOBAL; \
-                                   region.inner_norm_t = NON_CACHEABLE; \
-                                   region.outer_norm_t = NON_CACHEABLE; \
-                                   region.mem_t = NORMAL; \
-                                   region.sec_t = SECURE; \
-                                   region.xn_t = EXECUTE; \
-                                   region.priv_t = RW; \
-                                   region.user_t = RW; \
-                                   region.sh_t = NON_SHARED; \
-                                   MMU_GetSectionDescriptor(&descriptor_l1, region);
-
-//Sect_Normal_Cod. Outer & inner wb/wa, non-shareable, executable, ro, domain 0
-#define section_normal_cod(descriptor_l1, region) region.rg_t = SECTION; \
-                                   region.domain = 0x0; \
-                                   region.e_t = ECC_DISABLED; \
-                                   region.g_t = GLOBAL; \
-                                   region.inner_norm_t = WB_WA; \
-                                   region.outer_norm_t = WB_WA; \
-                                   region.mem_t = NORMAL; \
-                                   region.sec_t = SECURE; \
-                                   region.xn_t = EXECUTE; \
-                                   region.priv_t = READ; \
-                                   region.user_t = READ; \
-                                   region.sh_t = NON_SHARED; \
-                                   MMU_GetSectionDescriptor(&descriptor_l1, region);
-
-//Sect_Normal_RO. Sect_Normal_Cod, but not executable
-#define section_normal_ro(descriptor_l1, region)  region.rg_t = SECTION; \
-                                   region.domain = 0x0; \
-                                   region.e_t = ECC_DISABLED; \
-                                   region.g_t = GLOBAL; \
-                                   region.inner_norm_t = WB_WA; \
-                                   region.outer_norm_t = WB_WA; \
-                                   region.mem_t = NORMAL; \
-                                   region.sec_t = SECURE; \
-                                   region.xn_t = NON_EXECUTE; \
-                                   region.priv_t = READ; \
-                                   region.user_t = READ; \
-                                   region.sh_t = NON_SHARED; \
-                                   MMU_GetSectionDescriptor(&descriptor_l1, region);
-
-//Sect_Normal_RW. Sect_Normal_Cod, but writeable and not executable
-#define section_normal_rw(descriptor_l1, region) region.rg_t = SECTION; \
-                                   region.domain = 0x0; \
-                                   region.e_t = ECC_DISABLED; \
-                                   region.g_t = GLOBAL; \
-                                   region.inner_norm_t = WB_WA; \
-                                   region.outer_norm_t = WB_WA; \
-                                   region.mem_t = NORMAL; \
-                                   region.sec_t = SECURE; \
-                                   region.xn_t = NON_EXECUTE; \
-                                   region.priv_t = RW; \
-                                   region.user_t = RW; \
-                                   region.sh_t = NON_SHARED; \
-                                   MMU_GetSectionDescriptor(&descriptor_l1, region);
-//Sect_SO. Strongly-ordered (therefore shareable), not executable, rw, domain 0, base addr 0
-#define section_so(descriptor_l1, region) region.rg_t = SECTION; \
-                                   region.domain = 0x0; \
-                                   region.e_t = ECC_DISABLED; \
-                                   region.g_t = GLOBAL; \
-                                   region.inner_norm_t = NON_CACHEABLE; \
-                                   region.outer_norm_t = NON_CACHEABLE; \
-                                   region.mem_t = STRONGLY_ORDERED; \
-                                   region.sec_t = SECURE; \
-                                   region.xn_t = NON_EXECUTE; \
-                                   region.priv_t = RW; \
-                                   region.user_t = RW; \
-                                   region.sh_t = NON_SHARED; \
-                                   MMU_GetSectionDescriptor(&descriptor_l1, region);
-
-//Sect_Device_RO. Device, non-shareable, non-executable, ro, domain 0, base addr 0
-#define section_device_ro(descriptor_l1, region) region.rg_t = SECTION; \
-                                   region.domain = 0x0; \
-                                   region.e_t = ECC_DISABLED; \
-                                   region.g_t = GLOBAL; \
-                                   region.inner_norm_t = NON_CACHEABLE; \
-                                   region.outer_norm_t = NON_CACHEABLE; \
-                                   region.mem_t = STRONGLY_ORDERED; \
-                                   region.sec_t = SECURE; \
-                                   region.xn_t = NON_EXECUTE; \
-                                   region.priv_t = READ; \
-                                   region.user_t = READ; \
-                                   region.sh_t = NON_SHARED; \
-                                   MMU_GetSectionDescriptor(&descriptor_l1, region);
-
-//Sect_Device_RW. Sect_Device_RO, but writeable
-#define section_device_rw(descriptor_l1, region) region.rg_t = SECTION; \
-                                   region.domain = 0x0; \
-                                   region.e_t = ECC_DISABLED; \
-                                   region.g_t = GLOBAL; \
-                                   region.inner_norm_t = NON_CACHEABLE; \
-                                   region.outer_norm_t = NON_CACHEABLE; \
-                                   region.mem_t = STRONGLY_ORDERED; \
-                                   region.sec_t = SECURE; \
-                                   region.xn_t = NON_EXECUTE; \
-                                   region.priv_t = RW; \
-                                   region.user_t = RW; \
-                                   region.sh_t = NON_SHARED; \
-                                   MMU_GetSectionDescriptor(&descriptor_l1, region);
-//Page_4k_Device_RW.  Shared device, not executable, rw, domain 0
-#define page4k_device_rw(descriptor_l1, descriptor_l2, region) region.rg_t = PAGE_4k; \
-                                   region.domain = 0x0; \
-                                   region.e_t = ECC_DISABLED; \
-                                   region.g_t = GLOBAL; \
-                                   region.inner_norm_t = NON_CACHEABLE; \
-                                   region.outer_norm_t = NON_CACHEABLE; \
-                                   region.mem_t = SHARED_DEVICE; \
-                                   region.sec_t = SECURE; \
-                                   region.xn_t = NON_EXECUTE; \
-                                   region.priv_t = RW; \
-                                   region.user_t = RW; \
-                                   region.sh_t = NON_SHARED; \
-                                   MMU_GetPageDescriptor(&descriptor_l1, &descriptor_l2, region);
-
-//Page_64k_Device_RW.  Shared device, not executable, rw, domain 0
-#define page64k_device_rw(descriptor_l1, descriptor_l2, region)  region.rg_t = PAGE_64k; \
-                                   region.domain = 0x0; \
-                                   region.e_t = ECC_DISABLED; \
-                                   region.g_t = GLOBAL; \
-                                   region.inner_norm_t = NON_CACHEABLE; \
-                                   region.outer_norm_t = NON_CACHEABLE; \
-                                   region.mem_t = SHARED_DEVICE; \
-                                   region.sec_t = SECURE; \
-                                   region.xn_t = NON_EXECUTE; \
-                                   region.priv_t = RW; \
-                                   region.user_t = RW; \
-                                   region.sh_t = NON_SHARED; \
-                                   MMU_GetPageDescriptor(&descriptor_l1, &descriptor_l2, region);
-
-/** \brief  Set section execution-never attribute
-
-  \param [out]    descriptor_l1  L1 descriptor.
-  \param [in]                xn  Section execution-never attribute : EXECUTE , NON_EXECUTE.
-
-  \return          0
-*/
-__STATIC_INLINE int MMU_XNSection(uint32_t *descriptor_l1, mmu_execute_Type xn)
-{
-  *descriptor_l1 &= SECTION_XN_MASK;
-  *descriptor_l1 |= ((xn & 0x1) << SECTION_XN_SHIFT);
-  return 0;
-}
-
-/** \brief  Set section domain
-
-  \param [out]    descriptor_l1  L1 descriptor.
-  \param [in]            domain  Section domain
-
-  \return          0
-*/
-__STATIC_INLINE int MMU_DomainSection(uint32_t *descriptor_l1, uint8_t domain)
-{
-  *descriptor_l1 &= SECTION_DOMAIN_MASK;
-  *descriptor_l1 |= ((domain & 0xF) << SECTION_DOMAIN_SHIFT);
-  return 0;
-}
-
-/** \brief  Set section parity check
-
-  \param [out]    descriptor_l1  L1 descriptor.
-  \param [in]              p_bit Parity check: ECC_DISABLED, ECC_ENABLED
-
-  \return          0
-*/
-__STATIC_INLINE int MMU_PSection(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit)
-{
-  *descriptor_l1 &= SECTION_P_MASK;
-  *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT);
-  return 0;
-}
-
-/** \brief  Set section access privileges
-
-  \param [out]    descriptor_l1  L1 descriptor.
-  \param [in]              user  User Level Access: NO_ACCESS, RW, READ
-  \param [in]              priv  Privilege Level Access: NO_ACCESS, RW, READ
-  \param [in]               afe  Access flag enable
-
-  \return          0
-*/
-__STATIC_INLINE int MMU_APSection(uint32_t *descriptor_l1, mmu_access_Type user, mmu_access_Type priv, uint32_t afe)
-{
-  uint32_t ap = 0;
-
-  if (afe == 0) { //full access
-    if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; }
-    else if ((priv == RW) && (user == NO_ACCESS))   { ap = 0x1; }
-    else if ((priv == RW) && (user == READ))        { ap = 0x2; }
-    else if ((priv == RW) && (user == RW))          { ap = 0x3; }
-    else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
-    else if ((priv == READ) && (user == READ))      { ap = 0x7; }
-  }
-
-  else { //Simplified access
-    if ((priv == RW) && (user == NO_ACCESS))        { ap = 0x1; }
-    else if ((priv == RW) && (user == RW))          { ap = 0x3; }
-    else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
-    else if ((priv == READ) && (user == READ))      { ap = 0x7; }
-  }
-
-  *descriptor_l1 &= SECTION_AP_MASK;
-  *descriptor_l1 |= (ap & 0x3) << SECTION_AP_SHIFT;
-  *descriptor_l1 |= ((ap & 0x4)>>2) << SECTION_AP2_SHIFT;
-
-  return 0;
-}
-
-/** \brief  Set section shareability
-
-  \param [out]    descriptor_l1  L1 descriptor.
-  \param [in]             s_bit  Section shareability: NON_SHARED, SHARED
-
-  \return          0
-*/
-__STATIC_INLINE int MMU_SharedSection(uint32_t *descriptor_l1, mmu_shared_Type s_bit)
-{
-  *descriptor_l1 &= SECTION_S_MASK;
-  *descriptor_l1 |= ((s_bit & 0x1) << SECTION_S_SHIFT);
-  return 0;
-}
-
-/** \brief  Set section Global attribute
-
-  \param [out]    descriptor_l1  L1 descriptor.
-  \param [in]             g_bit  Section attribute: GLOBAL, NON_GLOBAL
-
-  \return          0
-*/
-__STATIC_INLINE int MMU_GlobalSection(uint32_t *descriptor_l1, mmu_global_Type g_bit)
-{
-  *descriptor_l1 &= SECTION_NG_MASK;
-  *descriptor_l1 |= ((g_bit & 0x1) << SECTION_NG_SHIFT);
-  return 0;
-}
-
-/** \brief  Set section Security attribute
-
-  \param [out]    descriptor_l1  L1 descriptor.
-  \param [in]             s_bit  Section Security attribute: SECURE, NON_SECURE
-
-  \return          0
-*/
-__STATIC_INLINE int MMU_SecureSection(uint32_t *descriptor_l1, mmu_secure_Type s_bit)
-{
-  *descriptor_l1 &= SECTION_NS_MASK;
-  *descriptor_l1 |= ((s_bit & 0x1) << SECTION_NS_SHIFT);
-  return 0;
-}
-
-/* Page 4k or 64k */
-/** \brief  Set 4k/64k page execution-never attribute
-
-  \param [out]    descriptor_l2  L2 descriptor.
-  \param [in]                xn  Page execution-never attribute : EXECUTE , NON_EXECUTE.
-  \param [in]              page  Page size: PAGE_4k, PAGE_64k,
-
-  \return          0
-*/
-__STATIC_INLINE int MMU_XNPage(uint32_t *descriptor_l2, mmu_execute_Type xn, mmu_region_size_Type page)
-{
-  if (page == PAGE_4k)
-  {
-      *descriptor_l2 &= PAGE_XN_4K_MASK;
-      *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_4K_SHIFT);
-  }
-  else
-  {
-      *descriptor_l2 &= PAGE_XN_64K_MASK;
-      *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_64K_SHIFT);
-  }
-  return 0;
-}
-
-/** \brief  Set 4k/64k page domain
-
-  \param [out]    descriptor_l1  L1 descriptor.
-  \param [in]            domain  Page domain
-
-  \return          0
-*/
-__STATIC_INLINE int MMU_DomainPage(uint32_t *descriptor_l1, uint8_t domain)
-{
-  *descriptor_l1 &= PAGE_DOMAIN_MASK;
-  *descriptor_l1 |= ((domain & 0xf) << PAGE_DOMAIN_SHIFT);
-  return 0;
-}
-
-/** \brief  Set 4k/64k page parity check
-
-  \param [out]    descriptor_l1  L1 descriptor.
-  \param [in]              p_bit Parity check: ECC_DISABLED, ECC_ENABLED
-
-  \return          0
-*/
-__STATIC_INLINE int MMU_PPage(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit)
-{
-  *descriptor_l1 &= SECTION_P_MASK;
-  *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT);
-  return 0;
-}
-
-/** \brief  Set 4k/64k page access privileges
-
-  \param [out]    descriptor_l2  L2 descriptor.
-  \param [in]              user  User Level Access: NO_ACCESS, RW, READ
-  \param [in]              priv  Privilege Level Access: NO_ACCESS, RW, READ
-  \param [in]               afe  Access flag enable
-
-  \return          0
-*/
-__STATIC_INLINE int MMU_APPage(uint32_t *descriptor_l2, mmu_access_Type user, mmu_access_Type priv, uint32_t afe)
-{
-  uint32_t ap = 0;
-
-  if (afe == 0) { //full access
-    if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; }
-    else if ((priv == RW) && (user == NO_ACCESS))   { ap = 0x1; }
-    else if ((priv == RW) && (user == READ))        { ap = 0x2; }
-    else if ((priv == RW) && (user == RW))          { ap = 0x3; }
-    else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
-    else if ((priv == READ) && (user == READ))      { ap = 0x6; }
-  }
-
-  else { //Simplified access
-    if ((priv == RW) && (user == NO_ACCESS))        { ap = 0x1; }
-    else if ((priv == RW) && (user == RW))          { ap = 0x3; }
-    else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
-    else if ((priv == READ) && (user == READ))      { ap = 0x7; }
-  }
-
-  *descriptor_l2 &= PAGE_AP_MASK;
-  *descriptor_l2 |= (ap & 0x3) << PAGE_AP_SHIFT;
-  *descriptor_l2 |= ((ap & 0x4)>>2) << PAGE_AP2_SHIFT;
-
-  return 0;
-}
-
-/** \brief  Set 4k/64k page shareability
-
-  \param [out]    descriptor_l2  L2 descriptor.
-  \param [in]             s_bit  4k/64k page shareability: NON_SHARED, SHARED
-
-  \return          0
-*/
-__STATIC_INLINE int MMU_SharedPage(uint32_t *descriptor_l2, mmu_shared_Type s_bit)
-{
-  *descriptor_l2 &= PAGE_S_MASK;
-  *descriptor_l2 |= ((s_bit & 0x1) << PAGE_S_SHIFT);
-  return 0;
-}
-
-/** \brief  Set 4k/64k page Global attribute
-
-  \param [out]    descriptor_l2  L2 descriptor.
-  \param [in]             g_bit  4k/64k page attribute: GLOBAL, NON_GLOBAL
-
-  \return          0
-*/
-__STATIC_INLINE int MMU_GlobalPage(uint32_t *descriptor_l2, mmu_global_Type g_bit)
-{
-  *descriptor_l2 &= PAGE_NG_MASK;
-  *descriptor_l2 |= ((g_bit & 0x1) << PAGE_NG_SHIFT);
-  return 0;
-}
-
-/** \brief  Set 4k/64k page Security attribute
-
-  \param [out]    descriptor_l1  L1 descriptor.
-  \param [in]             s_bit  4k/64k page Security attribute: SECURE, NON_SECURE
-
-  \return          0
-*/
-__STATIC_INLINE int MMU_SecurePage(uint32_t *descriptor_l1, mmu_secure_Type s_bit)
-{
-  *descriptor_l1 &= PAGE_NS_MASK;
-  *descriptor_l1 |= ((s_bit & 0x1) << PAGE_NS_SHIFT);
-  return 0;
-}
-
-/** \brief  Set Section memory attributes
-
-  \param [out]    descriptor_l1  L1 descriptor.
-  \param [in]               mem  Section memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED
-  \param [in]             outer  Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
-  \param [in]             inner  Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
-
-  \return          0
-*/
-__STATIC_INLINE int MMU_MemorySection(uint32_t *descriptor_l1, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner)
-{
-  *descriptor_l1 &= SECTION_TEXCB_MASK;
-
-  if (STRONGLY_ORDERED == mem)
-  {
-    return 0;
-  }
-  else if (SHARED_DEVICE == mem)
-  {
-    *descriptor_l1 |= (1 << SECTION_B_SHIFT);
-  }
-  else if (NON_SHARED_DEVICE == mem)
-  {
-    *descriptor_l1 |= (1 << SECTION_TEX1_SHIFT);
-  }
-  else if (NORMAL == mem)
-  {
-   *descriptor_l1 |= 1 << SECTION_TEX2_SHIFT;
-   switch(inner)
-   {
-      case NON_CACHEABLE:
-        break;
-      case WB_WA:
-        *descriptor_l1 |= (1 << SECTION_B_SHIFT);
-        break;
-      case WT:
-        *descriptor_l1 |= 1 << SECTION_C_SHIFT;
-        break;
-      case WB_NO_WA:
-        *descriptor_l1 |= (1 << SECTION_B_SHIFT) | (1 << SECTION_C_SHIFT);
-        break;
-    }
-    switch(outer)
-    {
-      case NON_CACHEABLE:
-        break;
-      case WB_WA:
-        *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT);
-        break;
-      case WT:
-        *descriptor_l1 |= 1 << SECTION_TEX1_SHIFT;
-        break;
-      case WB_NO_WA:
-        *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT) | (1 << SECTION_TEX0_SHIFT);
-        break;
-    }
-  }
-  return 0;
-}
-
-/** \brief  Set 4k/64k page memory attributes
-
-  \param [out]    descriptor_l2  L2 descriptor.
-  \param [in]               mem  4k/64k page memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED
-  \param [in]             outer  Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
-  \param [in]             inner  Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
-  \param [in]              page  Page size
-
-  \return          0
-*/
-__STATIC_INLINE int MMU_MemoryPage(uint32_t *descriptor_l2, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner, mmu_region_size_Type page)
-{
-  *descriptor_l2 &= PAGE_4K_TEXCB_MASK;
-
-  if (page == PAGE_64k)
-  {
-    //same as section
-    MMU_MemorySection(descriptor_l2, mem, outer, inner);
-  }
-  else
-  {
-    if (STRONGLY_ORDERED == mem)
-    {
-      return 0;
-    }
-    else if (SHARED_DEVICE == mem)
-    {
-      *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT);
-    }
-    else if (NON_SHARED_DEVICE == mem)
-    {
-      *descriptor_l2 |= (1 << PAGE_4K_TEX1_SHIFT);
-    }
-    else if (NORMAL == mem)
-    {
-      *descriptor_l2 |= 1 << PAGE_4K_TEX2_SHIFT;
-      switch(inner)
-      {
-        case NON_CACHEABLE:
-          break;
-        case WB_WA:
-          *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT);
-          break;
-        case WT:
-          *descriptor_l2 |= 1 << PAGE_4K_C_SHIFT;
-          break;
-        case WB_NO_WA:
-          *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT) | (1 << PAGE_4K_C_SHIFT);
-          break;
-      }
-      switch(outer)
-      {
-        case NON_CACHEABLE:
-          break;
-        case WB_WA:
-          *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT);
-          break;
-        case WT:
-          *descriptor_l2 |= 1 << PAGE_4K_TEX1_SHIFT;
-          break;
-        case WB_NO_WA:
-          *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT) | (1 << PAGE_4K_TEX0_SHIFT);
-          break;
-      }
-    }
-  }
-
-  return 0;
-}
-
-/** \brief  Create a L1 section descriptor
-
-  \param [out]     descriptor  L1 descriptor
-  \param [in]      reg  Section attributes
-  
-  \return          0
-*/
-__STATIC_INLINE int MMU_GetSectionDescriptor(uint32_t *descriptor, mmu_region_attributes_Type reg)
-{
-  *descriptor  = 0;
-
-  MMU_MemorySection(descriptor, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t);
-  MMU_XNSection(descriptor,reg.xn_t);
-  MMU_DomainSection(descriptor, reg.domain);
-  MMU_PSection(descriptor, reg.e_t);
-  MMU_APSection(descriptor, reg.priv_t, reg.user_t, 1);
-  MMU_SharedSection(descriptor,reg.sh_t);
-  MMU_GlobalSection(descriptor,reg.g_t);
-  MMU_SecureSection(descriptor,reg.sec_t);
-  *descriptor &= SECTION_MASK;
-  *descriptor |= SECTION_DESCRIPTOR;
- 
-  return 0;
-}
-
-
-/** \brief  Create a L1 and L2 4k/64k page descriptor
-
-  \param [out]       descriptor  L1 descriptor
-  \param [out]      descriptor2  L2 descriptor
-  \param [in]               reg  4k/64k page attributes
-
-  \return          0
-*/
-__STATIC_INLINE int MMU_GetPageDescriptor(uint32_t *descriptor, uint32_t *descriptor2, mmu_region_attributes_Type reg)
-{
-  *descriptor  = 0;
-  *descriptor2 = 0;
-
-  switch (reg.rg_t)
-  {
-    case PAGE_4k:
-      MMU_MemoryPage(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_4k);
-      MMU_XNPage(descriptor2, reg.xn_t, PAGE_4k);
-      MMU_DomainPage(descriptor, reg.domain);
-      MMU_PPage(descriptor, reg.e_t);
-      MMU_APPage(descriptor2, reg.priv_t, reg.user_t, 1);
-      MMU_SharedPage(descriptor2,reg.sh_t);
-      MMU_GlobalPage(descriptor2,reg.g_t);
-      MMU_SecurePage(descriptor,reg.sec_t);
-      *descriptor &= PAGE_L1_MASK;
-      *descriptor |= PAGE_L1_DESCRIPTOR;
-      *descriptor2 &= PAGE_L2_4K_MASK;
-      *descriptor2 |= PAGE_L2_4K_DESC;
-      break;
-
-    case PAGE_64k:
-      MMU_MemoryPage(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_64k);
-      MMU_XNPage(descriptor2, reg.xn_t, PAGE_64k);
-      MMU_DomainPage(descriptor, reg.domain);
-      MMU_PPage(descriptor, reg.e_t);
-      MMU_APPage(descriptor2, reg.priv_t, reg.user_t, 1);
-      MMU_SharedPage(descriptor2,reg.sh_t);
-      MMU_GlobalPage(descriptor2,reg.g_t);
-      MMU_SecurePage(descriptor,reg.sec_t);
-      *descriptor &= PAGE_L1_MASK;
-      *descriptor |= PAGE_L1_DESCRIPTOR;
-      *descriptor2 &= PAGE_L2_64K_MASK;
-      *descriptor2 |= PAGE_L2_64K_DESC;
-      break;
-
-    case SECTION:
-      //error
-      break;
-  }
-  
-  return 0;
-}
-
-/** \brief  Create a 1MB Section
-
-  \param [in]               ttb  Translation table base address
-  \param [in]      base_address  Section base address
-  \param [in]             count  Number of sections to create
-  \param [in]     descriptor_l1  L1 descriptor (region attributes)
-
-*/
-__STATIC_INLINE void MMU_TTSection(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1)
-{
-  uint32_t offset;
-  uint32_t entry;
-  uint32_t i;
-
-  offset = base_address >> 20;
-  entry  = (base_address & 0xFFF00000) | descriptor_l1;
-
-  //4 bytes aligned
-  ttb = ttb + offset;
-
-  for (i = 0; i < count; i++ )
-  {
-    //4 bytes aligned
-    *ttb++ = entry;
-    entry += OFFSET_1M;
-  }
-}
-
-/** \brief  Create a 4k page entry
-
-  \param [in]               ttb  L1 table base address
-  \param [in]      base_address  4k base address
-  \param [in]             count  Number of 4k pages to create
-  \param [in]     descriptor_l1  L1 descriptor (region attributes)
-  \param [in]            ttb_l2  L2 table base address
-  \param [in]     descriptor_l2  L2 descriptor (region attributes)
-
-*/
-__STATIC_INLINE void MMU_TTPage4k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 )
-{
-
-  uint32_t offset, offset2;
-  uint32_t entry, entry2;
-  uint32_t i;
-
-  offset = base_address >> 20;
-  entry  = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1;
-
-  //4 bytes aligned
-  ttb += offset;
-  //create l1_entry
-  *ttb = entry;
-
-  offset2 = (base_address & 0xff000) >> 12;
-  ttb_l2 += offset2;
-  entry2 = (base_address & 0xFFFFF000) | descriptor_l2;
-  for (i = 0; i < count; i++ )
-  {
-    //4 bytes aligned
-    *ttb_l2++ = entry2;
-    entry2 += OFFSET_4K;
-  }
-}
-
-/** \brief  Create a 64k page entry
-
-  \param [in]               ttb  L1 table base address
-  \param [in]      base_address  64k base address
-  \param [in]             count  Number of 64k pages to create
-  \param [in]     descriptor_l1  L1 descriptor (region attributes)
-  \param [in]            ttb_l2  L2 table base address
-  \param [in]     descriptor_l2  L2 descriptor (region attributes)
-
-*/
-__STATIC_INLINE void MMU_TTPage64k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 )
-{
-  uint32_t offset, offset2;
-  uint32_t entry, entry2;
-  uint32_t i,j;
-
-
-  offset = base_address >> 20;
-  entry  = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1;
-
-  //4 bytes aligned
-  ttb += offset;
-  //create l1_entry
-  *ttb = entry;
-
-  offset2 = (base_address & 0xff000) >> 12;
-  ttb_l2 += offset2;
-  entry2 = (base_address & 0xFFFF0000) | descriptor_l2;
-  for (i = 0; i < count; i++ )
-  {
-    //create 16 entries
-    for (j = 0; j < 16; j++)
-    {
-      //4 bytes aligned
-      *ttb_l2++ = entry2;
-    }
-    entry2 += OFFSET_64K;
-  }
-}
-
-/** \brief  Enable MMU
-*/
-__STATIC_INLINE void MMU_Enable(void)
-{
-  // Set M bit 0 to enable the MMU
-  // Set AFE bit to enable simplified access permissions model
-  // Clear TRE bit to disable TEX remap and A bit to disable strict alignment fault checking
-  __set_SCTLR( (__get_SCTLR() & ~(1 << 28) & ~(1 << 1)) | 1 | (1 << 29));
-  __ISB();
-}
-
-/** \brief  Disable MMU
-*/
-__STATIC_INLINE void MMU_Disable(void)
-{
-  // Clear M bit 0 to disable the MMU
-  __set_SCTLR( __get_SCTLR() & ~1);
-  __ISB();
-}
-
-/** \brief  Invalidate entire unified TLB
-*/
-
-__STATIC_INLINE void MMU_InvalidateTLB(void)
-{
-  __set_TLBIALL(0);
-  __DSB();     //ensure completion of the invalidation
-  __ISB();     //ensure instruction fetch path sees new state
-}
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CA_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
diff --git a/Core_A/Include/irq_ctrl.h b/Core_A/Include/irq_ctrl.h
deleted file mode 100644
index b171ef0..0000000
--- a/Core_A/Include/irq_ctrl.h
+++ /dev/null
@@ -1,186 +0,0 @@
-/**************************************************************************//**
- * @file     irq_ctrl.h
- * @brief    Interrupt Controller API header file
- * @version  V1.0.0
- * @date     23. June 2017
- ******************************************************************************/
-/*
- * Copyright (c) 2017 ARM Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef IRQ_CTRL_H_
-#define IRQ_CTRL_H_
-
-#include <stdint.h>
-
-#ifndef IRQHANDLER_T
-#define IRQHANDLER_T
-/// Interrupt handler data type
-typedef void (*IRQHandler_t) (void);
-#endif
-
-#ifndef IRQN_ID_T
-#define IRQN_ID_T
-/// Interrupt ID number data type
-typedef int32_t IRQn_ID_t;
-#endif
-
-/* Interrupt mode bit-masks */
-#define IRQ_MODE_TRIG_Pos           (0U)
-#define IRQ_MODE_TRIG_Msk           (0x07UL /*<< IRQ_MODE_TRIG_Pos*/)
-#define IRQ_MODE_TRIG_LEVEL         (0x00UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: level triggered interrupt
-#define IRQ_MODE_TRIG_LEVEL_LOW     (0x01UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: low level triggered interrupt
-#define IRQ_MODE_TRIG_LEVEL_HIGH    (0x02UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: high level triggered interrupt
-#define IRQ_MODE_TRIG_EDGE          (0x04UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: edge triggered interrupt
-#define IRQ_MODE_TRIG_EDGE_RISING   (0x05UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: rising edge triggered interrupt
-#define IRQ_MODE_TRIG_EDGE_FALLING  (0x06UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: falling edge triggered interrupt
-#define IRQ_MODE_TRIG_EDGE_BOTH     (0x07UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: rising and falling edge triggered interrupt
-
-#define IRQ_MODE_TYPE_Pos           (3U)
-#define IRQ_MODE_TYPE_Msk           (0x01UL << IRQ_MODE_TYPE_Pos)
-#define IRQ_MODE_TYPE_IRQ           (0x00UL << IRQ_MODE_TYPE_Pos)     ///< Type: interrupt source triggers CPU IRQ line
-#define IRQ_MODE_TYPE_FIQ           (0x01UL << IRQ_MODE_TYPE_Pos)     ///< Type: interrupt source triggers CPU FIQ line
-
-#define IRQ_MODE_DOMAIN_Pos         (4U)
-#define IRQ_MODE_DOMAIN_Msk         (0x01UL << IRQ_MODE_DOMAIN_Pos)
-#define IRQ_MODE_DOMAIN_NONSECURE   (0x00UL << IRQ_MODE_DOMAIN_Pos)   ///< Domain: interrupt is targeting non-secure domain
-#define IRQ_MODE_DOMAIN_SECURE      (0x01UL << IRQ_MODE_DOMAIN_Pos)   ///< Domain: interrupt is targeting secure domain
-
-#define IRQ_MODE_CPU_Pos            (5U)
-#define IRQ_MODE_CPU_Msk            (0xFFUL << IRQ_MODE_CPU_Pos)
-#define IRQ_MODE_CPU_ALL            (0x00UL << IRQ_MODE_CPU_Pos)      ///< CPU: interrupt targets all CPUs
-#define IRQ_MODE_CPU_0              (0x01UL << IRQ_MODE_CPU_Pos)      ///< CPU: interrupt targets CPU 0
-#define IRQ_MODE_CPU_1              (0x02UL << IRQ_MODE_CPU_Pos)      ///< CPU: interrupt targets CPU 1
-#define IRQ_MODE_CPU_2              (0x04UL << IRQ_MODE_CPU_Pos)      ///< CPU: interrupt targets CPU 2
-#define IRQ_MODE_CPU_3              (0x08UL << IRQ_MODE_CPU_Pos)      ///< CPU: interrupt targets CPU 3
-#define IRQ_MODE_CPU_4              (0x10UL << IRQ_MODE_CPU_Pos)      ///< CPU: interrupt targets CPU 4
-#define IRQ_MODE_CPU_5              (0x20UL << IRQ_MODE_CPU_Pos)      ///< CPU: interrupt targets CPU 5
-#define IRQ_MODE_CPU_6              (0x40UL << IRQ_MODE_CPU_Pos)      ///< CPU: interrupt targets CPU 6
-#define IRQ_MODE_CPU_7              (0x80UL << IRQ_MODE_CPU_Pos)      ///< CPU: interrupt targets CPU 7
-
-#define IRQ_MODE_ERROR              (0x80000000UL)                    ///< Bit indicating mode value error
-
-/* Interrupt priority bit-masks */
-#define IRQ_PRIORITY_Msk            (0x0000FFFFUL)                    ///< Interrupt priority value bit-mask
-#define IRQ_PRIORITY_ERROR          (0x80000000UL)                    ///< Bit indicating priority value error
-
-/// Initialize interrupt controller.
-/// \return 0 on success, -1 on error.
-int32_t IRQ_Initialize (void);
-
-/// Register interrupt handler.
-/// \param[in]     irqn          interrupt ID number
-/// \param[in]     handler       interrupt handler function address
-/// \return 0 on success, -1 on error.
-int32_t IRQ_SetHandler (IRQn_ID_t irqn, IRQHandler_t handler);
-
-/// Get the registered interrupt handler.
-/// \param[in]     irqn          interrupt ID number
-/// \return registered interrupt handler function address.
-IRQHandler_t IRQ_GetHandler (IRQn_ID_t irqn);
-
-/// Enable interrupt.
-/// \param[in]     irqn          interrupt ID number
-/// \return 0 on success, -1 on error.
-int32_t IRQ_Enable (IRQn_ID_t irqn);
-
-/// Disable interrupt.
-/// \param[in]     irqn          interrupt ID number
-/// \return 0 on success, -1 on error.
-int32_t IRQ_Disable (IRQn_ID_t irqn);
-
-/// Get interrupt enable state.
-/// \param[in]     irqn          interrupt ID number
-/// \return 0 - interrupt is disabled, 1 - interrupt is enabled.
-uint32_t IRQ_GetEnableState (IRQn_ID_t irqn);
-
-/// Configure interrupt request mode.
-/// \param[in]     irqn          interrupt ID number
-/// \param[in]     mode          mode configuration
-/// \return 0 on success, -1 on error.
-int32_t IRQ_SetMode (IRQn_ID_t irqn, uint32_t mode);
-
-/// Get interrupt mode configuration.
-/// \param[in]     irqn          interrupt ID number
-/// \return current interrupt mode configuration with optional IRQ_MODE_ERROR bit set.
-uint32_t IRQ_GetMode (IRQn_ID_t irqn);
-
-/// Get ID number of current interrupt request (IRQ).
-/// \return interrupt ID number.
-IRQn_ID_t IRQ_GetActiveIRQ (void);
-
-/// Get ID number of current fast interrupt request (FIQ).
-/// \return interrupt ID number.
-IRQn_ID_t IRQ_GetActiveFIQ (void);
-
-/// Signal end of interrupt processing.
-/// \param[in]     irqn          interrupt ID number
-/// \return 0 on success, -1 on error.
-int32_t IRQ_EndOfInterrupt (IRQn_ID_t irqn);
-
-/// Set interrupt pending flag.
-/// \param[in]     irqn          interrupt ID number
-/// \return 0 on success, -1 on error.
-int32_t IRQ_SetPending (IRQn_ID_t irqn);
-
-/// Get interrupt pending flag.
-/// \param[in]     irqn          interrupt ID number
-/// \return 0 - interrupt is not pending, 1 - interrupt is pending.
-uint32_t IRQ_GetPending (IRQn_ID_t irqn);
-
-/// Clear interrupt pending flag.
-/// \param[in]     irqn          interrupt ID number
-/// \return 0 on success, -1 on error.
-int32_t IRQ_ClearPending (IRQn_ID_t irqn);
-
-/// Set interrupt priority value.
-/// \param[in]     irqn          interrupt ID number
-/// \param[in]     priority      interrupt priority value
-/// \return 0 on success, -1 on error.
-int32_t IRQ_SetPriority (IRQn_ID_t irqn, uint32_t priority);
-
-/// Get interrupt priority.
-/// \param[in]     irqn          interrupt ID number
-/// \return current interrupt priority value with optional IRQ_PRIORITY_ERROR bit set.
-uint32_t IRQ_GetPriority (IRQn_ID_t irqn);
-
-/// Set priority masking threshold.
-/// \param[in]     priority      priority masking threshold value
-/// \return 0 on success, -1 on error.
-int32_t IRQ_SetPriorityMask (uint32_t priority);
-
-/// Get priority masking threshold
-/// \return current priority masking threshold value with optional IRQ_PRIORITY_ERROR bit set.
-uint32_t IRQ_GetPriorityMask (void);
-
-/// Set priority grouping field split point
-/// \param[in]     bits          number of MSB bits included in the group priority field comparison
-/// \return 0 on success, -1 on error.
-int32_t IRQ_SetPriorityGroupBits (uint32_t bits);
-
-/// Get priority grouping field split point
-/// \return current number of MSB bits included in the group priority field comparison with
-///         optional IRQ_PRIORITY_ERROR bit set.
-uint32_t IRQ_GetPriorityGroupBits (void);
-
-#endif  // IRQ_CTRL_H_
diff --git a/Core_A/Source/irq_ctrl_gic.c b/Core_A/Source/irq_ctrl_gic.c
deleted file mode 100644
index 25d1359..0000000
--- a/Core_A/Source/irq_ctrl_gic.c
+++ /dev/null
@@ -1,410 +0,0 @@
-/**************************************************************************//**
- * @file     irq_ctrl_gic.c
- * @brief    Interrupt controller handling implementation for GIC
- * @version  V1.0.1
- * @date     9. April 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2017 ARM Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <stddef.h>
-
-#include "RTE_Components.h"
-#include CMSIS_device_header
-
-#include "irq_ctrl.h"
-
-#if defined(__GIC_PRESENT) && (__GIC_PRESENT == 1U)
-
-/// Number of implemented interrupt lines
-#ifndef IRQ_GIC_LINE_COUNT
-#define IRQ_GIC_LINE_COUNT      (1020U)
-#endif
-
-static IRQHandler_t IRQTable[IRQ_GIC_LINE_COUNT] = { 0U };
-static uint32_t     IRQ_ID0;
-
-/// Initialize interrupt controller.
-__WEAK int32_t IRQ_Initialize (void) {
-  uint32_t i;
-
-  for (i = 0U; i < IRQ_GIC_LINE_COUNT; i++) {
-    IRQTable[i] = (IRQHandler_t)NULL;
-  }
-  GIC_Enable();
-  return (0);
-}
-
-
-/// Register interrupt handler.
-__WEAK int32_t IRQ_SetHandler (IRQn_ID_t irqn, IRQHandler_t handler) {
-  int32_t status;
-
-  if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {
-    IRQTable[irqn] = handler;
-    status =  0;
-  } else {
-    status = -1;
-  }
-
-  return (status);
-}
-
-
-/// Get the registered interrupt handler.
-__WEAK IRQHandler_t IRQ_GetHandler (IRQn_ID_t irqn) {
-  IRQHandler_t h;
-
-  // Ignore CPUID field (software generated interrupts)
-  irqn &= 0x3FFU;
-
-  if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {
-    h = IRQTable[irqn];
-  } else {
-    h = (IRQHandler_t)0;
-  }
-
-  return (h);
-}
-
-
-/// Enable interrupt.
-__WEAK int32_t IRQ_Enable (IRQn_ID_t irqn) {
-  int32_t status;
-
-  if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {
-    GIC_EnableIRQ ((IRQn_Type)irqn);
-    status = 0;
-  } else {
-    status = -1;
-  }
-
-  return (status);
-}
-
-
-/// Disable interrupt.
-__WEAK int32_t IRQ_Disable (IRQn_ID_t irqn) {
-  int32_t status;
-
-  if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {
-    GIC_DisableIRQ ((IRQn_Type)irqn);
-    status = 0;
-  } else {
-    status = -1;
-  }
-
-  return (status);
-}
-
-
-/// Get interrupt enable state.
-__WEAK uint32_t IRQ_GetEnableState (IRQn_ID_t irqn) {
-  uint32_t enable;
-
-  if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {
-    enable = GIC_GetEnableIRQ((IRQn_Type)irqn);
-  } else {
-    enable = 0U;
-  }
-
-  return (enable);
-}
-
-
-/// Configure interrupt request mode.
-__WEAK int32_t IRQ_SetMode (IRQn_ID_t irqn, uint32_t mode) {
-  uint32_t val;
-  uint8_t cfg;
-  uint8_t secure;
-  uint8_t cpu;
-  int32_t status = 0;
-
-  if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {
-    // Check triggering mode
-    val = (mode & IRQ_MODE_TRIG_Msk);
-
-    if (val == IRQ_MODE_TRIG_LEVEL) {
-      cfg = 0x00U;
-    } else if (val == IRQ_MODE_TRIG_EDGE) {
-      cfg = 0x02U;
-    } else {
-      cfg = 0x00U;
-      status = -1;
-    }
-
-    // Check interrupt type
-    val = mode & IRQ_MODE_TYPE_Msk;
-
-    if (val != IRQ_MODE_TYPE_IRQ) {
-      status = -1;
-    }
-
-    // Check interrupt domain
-    val = mode & IRQ_MODE_DOMAIN_Msk;
-
-    if (val == IRQ_MODE_DOMAIN_NONSECURE) {
-      secure = 0U;
-    } else {
-      // Check security extensions support
-      val = GIC_DistributorInfo() & (1UL << 10U);
-
-      if (val != 0U) {
-        // Security extensions are supported
-        secure = 1U;
-      } else {
-        secure = 0U;
-        status = -1;
-      }
-    }
-
-    // Check interrupt CPU targets
-    val = mode & IRQ_MODE_CPU_Msk;
-
-    if (val == IRQ_MODE_CPU_ALL) {
-      cpu = 0xFFU;
-    } else {
-      cpu = val >> IRQ_MODE_CPU_Pos;
-    }
-
-    // Apply configuration if no mode error
-    if (status == 0) {
-      GIC_SetConfiguration((IRQn_Type)irqn, cfg);
-      GIC_SetTarget       ((IRQn_Type)irqn, cpu);
-
-      if (secure != 0U) {
-        GIC_SetGroup ((IRQn_Type)irqn, secure);
-      }
-    }
-  }
-
-  return (status);
-}
-
-
-/// Get interrupt mode configuration.
-__WEAK uint32_t IRQ_GetMode (IRQn_ID_t irqn) {
-  uint32_t mode;
-  uint32_t val;
-
-  if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {
-    mode = IRQ_MODE_TYPE_IRQ;
-
-    // Get trigger mode
-    val = GIC_GetConfiguration((IRQn_Type)irqn);
-
-    if ((val & 2U) != 0U) {
-      // Corresponding interrupt is edge triggered
-      mode |= IRQ_MODE_TRIG_EDGE;
-    } else {
-      // Corresponding interrupt is level triggered
-      mode |= IRQ_MODE_TRIG_LEVEL;
-    }
-
-    // Get interrupt CPU targets
-    mode |= GIC_GetTarget ((IRQn_Type)irqn) << IRQ_MODE_CPU_Pos;
-
-  } else {
-    mode = IRQ_MODE_ERROR;
-  }
-
-  return (mode);
-}
-
-
-/// Get ID number of current interrupt request (IRQ).
-__WEAK IRQn_ID_t IRQ_GetActiveIRQ (void) {
-  IRQn_ID_t irqn;
-  uint32_t prio;
-
-  /* Dummy read to avoid GIC 390 errata 801120 */
-  GIC_GetHighPendingIRQ();
-
-  irqn = GIC_AcknowledgePending();
-
-  __DSB();
-
-  /* Workaround GIC 390 errata 733075 (GIC-390_Errata_Notice_v6.pdf, 09-Jul-2014)  */
-  /* The following workaround code is for a single-core system.  It would be       */
-  /* different in a multi-core system.                                             */
-  /* If the ID is 0 or 0x3FE or 0x3FF, then the GIC CPU interface may be locked-up */
-  /* so unlock it, otherwise service the interrupt as normal.                      */
-  /* Special IDs 1020=0x3FC and 1021=0x3FD are reserved values in GICv1 and GICv2  */
-  /* so will not occur here.                                                       */
-
-  if ((irqn == 0) || (irqn >= 0x3FE)) {
-    /* Unlock the CPU interface with a dummy write to Interrupt Priority Register */
-    prio = GIC_GetPriority((IRQn_Type)0);
-    GIC_SetPriority ((IRQn_Type)0, prio);
-
-    __DSB();
-
-    if ((irqn == 0U) && ((GIC_GetIRQStatus ((IRQn_Type)irqn) & 1U) != 0U) && (IRQ_ID0 == 0U)) {
-      /* If the ID is 0, is active and has not been seen before */
-      IRQ_ID0 = 1U;
-    }
-    /* End of Workaround GIC 390 errata 733075 */
-  }
-
-  return (irqn);
-}
-
-
-/// Get ID number of current fast interrupt request (FIQ).
-__WEAK IRQn_ID_t IRQ_GetActiveFIQ (void) {
-  return ((IRQn_ID_t)-1);
-}
-
-
-/// Signal end of interrupt processing.
-__WEAK int32_t IRQ_EndOfInterrupt (IRQn_ID_t irqn) {
-  int32_t status;
-  IRQn_Type irq = (IRQn_Type)irqn;
-
-  irqn &= 0x3FFU;
-
-  if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {
-    GIC_EndInterrupt (irq);
-
-    if (irqn == 0) {
-      IRQ_ID0 = 0U;
-    }
-
-    status = 0;
-  } else {
-    status = -1;
-  }
-
-  return (status);
-}
-
-
-/// Set interrupt pending flag.
-__WEAK int32_t IRQ_SetPending (IRQn_ID_t irqn) {
-  int32_t status;
-
-  if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {
-    GIC_SetPendingIRQ ((IRQn_Type)irqn);
-    status = 0;
-  } else {
-    status = -1;
-  }
-
-  return (status);
-}
-
-/// Get interrupt pending flag.
-__WEAK uint32_t IRQ_GetPending (IRQn_ID_t irqn) {
-  uint32_t pending;
-
-  if ((irqn >= 16) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {
-    pending = GIC_GetPendingIRQ ((IRQn_Type)irqn);
-  } else {
-    pending = 0U;
-  }
-
-  return (pending & 1U);
-}
-
-
-/// Clear interrupt pending flag.
-__WEAK int32_t IRQ_ClearPending (IRQn_ID_t irqn) {
-  int32_t status;
-
-  if ((irqn >= 16) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {
-    GIC_ClearPendingIRQ ((IRQn_Type)irqn);
-    status = 0;
-  } else {
-    status = -1;
-  }
-
-  return (status);
-}
-
-
-/// Set interrupt priority value.
-__WEAK int32_t IRQ_SetPriority (IRQn_ID_t irqn, uint32_t priority) {
-  int32_t status;
-
-  if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {
-    GIC_SetPriority ((IRQn_Type)irqn, priority);
-    status = 0;
-  } else {
-    status = -1;
-  }
-
-  return (status);
-}
-
-
-/// Get interrupt priority.
-__WEAK uint32_t IRQ_GetPriority (IRQn_ID_t irqn) {
-  uint32_t priority;
-
-  if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {
-    priority = GIC_GetPriority ((IRQn_Type)irqn);
-  } else {
-    priority = IRQ_PRIORITY_ERROR;
-  }
-
-  return (priority);
-}
-
-
-/// Set priority masking threshold.
-__WEAK int32_t IRQ_SetPriorityMask (uint32_t priority) {
-  GIC_SetInterfacePriorityMask (priority);
-  return (0);
-}
-
-
-/// Get priority masking threshold
-__WEAK uint32_t IRQ_GetPriorityMask (void) {
-  return GIC_GetInterfacePriorityMask();
-}
-
-
-/// Set priority grouping field split point
-__WEAK int32_t IRQ_SetPriorityGroupBits (uint32_t bits) {
-  int32_t status;
-
-  if (bits == IRQ_PRIORITY_Msk) {
-    bits = 7U;
-  }
-
-  if (bits < 8U) {
-    GIC_SetBinaryPoint (7U - bits);
-    status = 0;
-  } else {
-    status = -1;
-  }
-
-  return (status);
-}
-
-
-/// Get priority grouping field split point
-__WEAK uint32_t IRQ_GetPriorityGroupBits (void) {
-  uint32_t bp;
-
-  bp = GIC_GetBinaryPoint() & 0x07U;
-
-  return (7U - bp);
-}
-
-#endif
diff --git a/DSP/DSP_Lib_TestSuite/CMakeLists.txt b/DSP/DSP_Lib_TestSuite/CMakeLists.txt
new file mode 100644
index 0000000..3d8e4e9
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/CMakeLists.txt
@@ -0,0 +1,136 @@
+cmake_minimum_required (VERSION 3.6)
+cmake_policy(SET CMP0077 NEW)
+# The tests are assuming that MATRIX_CHECK is enabled when building
+# CMSIS-DSP.
+set(MATRIXCHECK ON)
+set(FASTMATHCOMPUTATIONS OFF)
+option(DUMPPATTERN "Dump test patterns when test is failing" ON)
+
+option(CUSTOMIZE_TESTS "Enable customizations of tests" ON)
+option(BASICMATH_TESTS "Enable Basic Math testing" ON)
+option(COMPLEXMATH_TESTS "Enable Complex Math testing" ON)
+option(CONTROLLER_TESTS "Enable Controller testing" ON)
+option(FASTMATH_TESTS "Enable Fast Math testing" ON)
+option(INTRINSICS_TESTS "Enable Intrinsics testing" ON)
+option(FILTERING_TESTS "Enable Filtering testing" ON)
+option(MATRIX_TESTS "Enable Matrix testing" ON)
+option(STATISTICS_TESTS "Enable Statistics testing" ON)
+option(SUPPORT_TESTS "Enable Support testing" ON)
+option(TRANSFORM_TESTS "Enable Transform testing" ON)
+
+
+project(DSP_Lib_TestSuite)
+
+# Needed to find the config modules
+list(APPEND CMAKE_MODULE_PATH ${CMAKE_CURRENT_SOURCE_DIR}/..)
+
+
+set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../..)
+
+
+file(GLOB MAIN "Common/src/*.c")
+file(GLOB BASICMATH_TESTS_SRC "Common/src/basic_math_tests/*.c")
+file(GLOB COMPLEXMATH_TESTS_SRC "Common/src/complex_math_tests/*.c")
+file(GLOB CONTROLLER_TESTS_SRC "Common/src/controller_tests/*.c")
+file(GLOB FASTMATH_TESTS_SRC "Common/src/fast_math_tests/*.c")
+file(GLOB FILTERING_TESTS_SRC "Common/src/filtering_tests/*.c")
+file(GLOB INTRINSINCS_TESTS_SRC "Common/src/intrinsics_tests/*.c")
+file(GLOB MATRIX_TESTS_SRC "Common/src/matrix_tests/*.c")
+file(GLOB STATISTICS_TESTS_SRC "Common/src/statistics_tests/*.c")
+file(GLOB SUPPORT_TESTS_SRC "Common/src/support_tests/*.c")
+file(GLOB TRANSFORM_TESTS_SRC "Common/src/transform_tests/*.c")
+file(GLOB JTEST_MAIN "Common/JTest/src/*.c")
+
+set(TESTSRC ${MAIN}
+  ${BASICMATH_TESTS_SRC}
+  ${COMPLEXMATH_TESTS_SRC}
+  ${CONTROLLER_TESTS_SRC}
+  ${FASTMATH_TESTS_SRC}
+  ${FILTERING_TESTS_SRC}
+  ${INTRINSINCS_TESTS_SRC}
+  ${MATRIX_TESTS_SRC}
+  ${STATISTICS_TESTS_SRC}
+  ${SUPPORT_TESTS_SRC}
+  ${TRANSFORM_TESTS_SRC}
+  ${JTEST_MAIN}
+  )
+
+set(JINCS 
+  Common/JTest/inc
+  Common/JTest/inc/arr_desc
+  Common/inc/basic_math_tests
+  Common/inc/complex_math_tests
+  Common/inc/controller_tests
+  Common/inc/fast_math_tests
+  Common/inc/filtering_tests
+  Common/inc/intrinsics_tests
+  Common/inc/matrix_tests
+  Common/inc/statistics_tests 
+  Common/inc/support_tests 
+  Common/inc/transform_tests
+  )
+
+add_subdirectory(../Source bin_dsp)
+add_subdirectory(RefLibs bin_ref)
+
+
+add_executable(DSP_Lib_TestSuite)
+
+if (CUSTOMIZE_TESTS)
+      target_compile_definitions(DSP_Lib_TestSuite PRIVATE CUSTOMIZE_TESTS)
+endif()
+
+if (BASICMATH_TESTS)
+      target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_BASICMATH_TESTS)
+endif()
+if (COMPLEXMATH_TESTS)
+      target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_COMPLEXMATH_TESTS)
+endif()
+if (CONTROLLER_TESTS)
+      target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_CONTROLLER_TESTS)
+endif()
+if (FASTMATH_TESTS)
+      target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_FASTMATH_TESTS)
+endif()
+if (FILTERING_TESTS)
+      target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_FILTERING_TESTS)
+endif()
+if (INTRINSICS_TESTS)
+      target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_INTRINSICS_TESTS)
+endif()
+if (MATRIX_TESTS)
+      target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_MATRIX_TESTS)
+endif()
+if (STATISTICS_TESTS)
+      target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_STATISTICS_TESTS)
+endif()
+if (SUPPORT_TESTS)
+      target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_SUPPORT_TESTS)
+endif()
+if (TRANSFORM_TESTS)
+      target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_TRANSFORM_TESTS)
+endif()
+
+
+if (DUMPPATTERN)
+      target_compile_definitions(DSP_Lib_TestSuite PRIVATE DUMPPATTERN)
+endif()
+
+# Change behavior of configBoot for scatter file
+set(TESTFRAMEWORK ON)
+
+include(configBoot)
+
+file(COPY ${ROOT}/CMSIS/DSP/Examples/ARM/boot/RTE_Components.h DESTINATION tempLink)
+
+target_link_libraries(DSP_Lib_TestSuite PRIVATE CMSISDSP)
+target_link_libraries(DSP_Lib_TestSuite PRIVATE DspRefLibs)
+
+target_sources(DSP_Lib_TestSuite PRIVATE ${TESTSRC})
+
+### Includes
+target_include_directories(DSP_Lib_TestSuite PRIVATE "Common/inc")
+target_include_directories(DSP_Lib_TestSuite PRIVATE "Common/inc/templates")
+target_include_directories(DSP_Lib_TestSuite PRIVATE ${JINCS})
+
+
diff --git a/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_cycle.h b/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_cycle.h
index d1b4db5..ed09f95 100644
--- a/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_cycle.h
+++ b/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_cycle.h
@@ -43,6 +43,8 @@
                          __jtest_cycle_end_count));     \
     } while (0)
 */
+#ifndef ARMv7A
+
 #define JTEST_COUNT_CYCLES(fn_call)                     \
     do                                                  \
     {                                                   \
@@ -56,10 +58,22 @@
         __jtest_cycle_end_count =                       \
             JTEST_SYSTICK_VALUE(SysTick);               \
                                                         \
-		JTEST_SYSTICK_RESET(SysTick);                   \
+		JTEST_SYSTICK_RESET(SysTick);           \
         JTEST_DUMP_STRF(JTEST_CYCLE_STRF,               \
                         (JTEST_SYSTICK_INITIAL_VALUE -  \
                          __jtest_cycle_end_count));     \
     } while (0)
 
+#else
+/* TODO */
+#define JTEST_COUNT_CYCLES(fn_call)                     \
+    do                                                  \
+    {                                                   \
+		fn_call;   										\
+    } while (0)
+
+#endif
+
 #endif /* _JTEST_CYCLE_H_ */
+
+
diff --git a/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_fw.h b/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_fw.h
index c655cfd..e48c0c5 100644
--- a/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_fw.h
+++ b/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_fw.h
@@ -141,6 +141,19 @@
  *  Fill the buffer named buf_name with value and dump it to the Keil debugger
  *  using action.
  */
+#if defined(ARMv7A) || defined(FILEIO)
+
+#define JTEST_ACT_DUMP(action, buf_name, value) \
+    do                                          \
+    {                                           \
+        JTEST_CLEAR_BUFFER(buf_name);           \
+	    printf("%s",value);                     \
+        strcpy(JTEST_FW.buf_name, (value));     \
+        JTEST_TRIGGER_ACTION(action);           \
+    } while (0)
+
+#else
+
 #define JTEST_ACT_DUMP(action, buf_name, value) \
     do                                          \
     {                                           \
@@ -149,6 +162,7 @@
         JTEST_TRIGGER_ACTION(action);           \
     } while (0)
 
+#endif
 /**
  *  Trigger the "Exit Framework" action in the Keil Debugger.
  */
@@ -192,6 +206,19 @@
 /**
  *  Dump a formatted string to the Keil Debugger.
  */
+#if defined(ARMv7A) || defined(FILEIO)
+
+#define JTEST_DUMP_STRF(format_str, ... )                               \
+    do                                                                  \
+    {                                                                   \
+        JTEST_CLEAR_STR_BUFFER();                                       \
+        sprintf(JTEST_FW.str_buffer,format_str, __VA_ARGS__);           \
+        printf("%s",JTEST_FW.str_buffer);                               \
+        jtest_dump_str_segments();                                      \
+    } while (0)
+
+#else
+
 #define JTEST_DUMP_STRF(format_str, ... )                               \
     do                                                                  \
     {                                                                   \
@@ -200,6 +227,8 @@
         jtest_dump_str_segments();                                      \
     } while (0)
 
+#endif
+
 /* Pass/Fail Macros */
 /*--------------------------------------------------------------------------------*/
 
diff --git a/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_systick.h b/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_systick.h
index ec3e317..afb6e05 100644
--- a/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_systick.h
+++ b/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_systick.h
@@ -2,7 +2,7 @@
 #define _JTEST_SYSTICK_H_
 
 /*--------------------------------------------------------------------------------*/
-/* Includes */
+/* Includes                                                                       */
 /*--------------------------------------------------------------------------------*/
 
 /* Get access to the SysTick structure. */
@@ -10,6 +10,8 @@
   #include "ARMCM0.h"
 #elif defined ARMCM0P
   #include "ARMCM0plus.h"
+#elif defined ARMCM0P_MPU
+  #include "ARMCM0plus_MPU.h"
 #elif defined ARMCM3
   #include "ARMCM3.h"
 #elif defined ARMCM4
@@ -40,22 +42,22 @@
   #include "ARMv8MML_DP.h"
 #elif defined ARMv8MML_DSP_DP
   #include "ARMv8MML_DSP_DP.h"
-
+#elif defined ARMv7A
+  /* TODO */
 #else
   #warning "no appropriate header file found!"
 #endif
 
 /*--------------------------------------------------------------------------------*/
-/* Macros and Defines */
+/* Macros and Defines                                                             */
 /*--------------------------------------------------------------------------------*/
 
 /**
  *  Initial value for the SysTick module.
  *
- *  @note This is also the maximum value, important as SysTick is a decrementing
- *  counter.
+ *  This is also the maximum value, important as SysTick is a decrementing counter.
  */
-#define JTEST_SYSTICK_INITIAL_VALUE 0xFFFFFF
+#define JTEST_SYSTICK_INITIAL_VALUE       0xFFFFFF
 
 /**
  *  Reset the SysTick, decrementing timer to it's maximum value and disable it.
@@ -66,11 +68,10 @@
 #define JTEST_SYSTICK_RESET(systick_ptr)                    \
     do                                                      \
     {                                                       \
-        (systick_ptr)->LOAD = JTEST_SYSTICK_INITIAL_VALUE;  \
-        (systick_ptr)->VAL = 1;                             \
+        (systick_ptr)->CTRL = SysTick_CTRL_CLKSOURCE_Msk;   \
                                                             \
-        /* Disable the SysTick module. */                   \
-        (systick_ptr)->CTRL = UINT32_C(0x000000);           \
+        (systick_ptr)->LOAD = JTEST_SYSTICK_INITIAL_VALUE;  \
+        (systick_ptr)->VAL  = JTEST_SYSTICK_INITIAL_VALUE;  \
     } while (0)
 
 /**
@@ -81,13 +82,13 @@
     {                                                       \
         (systick_ptr)->CTRL =                               \
             SysTick_CTRL_ENABLE_Msk |                       \
-            SysTick_CTRL_CLKSOURCE_Msk; /* Internal clk*/   \
+            SysTick_CTRL_CLKSOURCE_Msk;                     \
     } while (0)
 
 /**
  *  Evaluate to the current value of the SysTick timer.
  */
-#define JTEST_SYSTICK_VALUE(systick_ptr)        \
+#define JTEST_SYSTICK_VALUE(systick_ptr)                    \
     ((systick_ptr)->VAL)
            
 #endif /* _JTEST_SYSTICK_H_ */
diff --git a/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_FVP.ini b/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_FVP.ini
index 44d22eb..cfb438f 100644
--- a/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_FVP.ini
+++ b/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_FVP.ini
@@ -12,7 +12,7 @@
 BK *                                                /* Remove existing breakpoints. */
 
 INCLUDE ../../Common/JTest/jtest_fns.ini            /* Load the JTEST helper functions */
-INCLUDE ../../Common/JTest/jtest_log_FVP.ini        /* Include a log file if specified by jtest_log.ini */
+INCLUDE ../../Common/JTest/jtest_log_FVP.ini        /* Include specified log file */
 
 /* Break on special members of the JTEST framework.  The framework's
    name is defined in jtest_fw.h by the #DEFINE JTEST_FW. */
diff --git a/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_Simulator.ini b/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_Simulator.ini
index 8f2a6b1..d6c87b8 100644
--- a/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_Simulator.ini
+++ b/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_Simulator.ini
@@ -17,12 +17,12 @@
 
 /* Break on special members of the JTEST framework.  The framework's
    name is defined in jtest_fw.h by the #DEFINE JTEST_FW. */
-BS test_start  , 1, "coverage_clear(); test_start_msg();"
-BS test_end    , 1, "coverage_msg(); test_end_msg();"
+BS test_start  , 1, "test_start_msg();"
+BS test_end    , 1, "test_end_msg();"
 BS group_start , 1, "group_start_msg();"
 BS group_end   , 1, "group_end_msg();"
 BS dump_str    , 1, "dump_str_fn();"
-BS dump_data   , 1, "dump_data_fn();"
+//BS dump_data   , 1, "dump_data_fn();"
 BS exit_fw     , 1, "break_fn(); debug_clean_fn(); log_off_fn();"
 
 debug_setup_finished_msg()      /* Output a message to let the output
diff --git a/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_Simulator.ini.withCoverage b/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_Simulator.ini.withCoverage
new file mode 100644
index 0000000..8f2a6b1
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_Simulator.ini.withCoverage
@@ -0,0 +1,32 @@
+/* This demonstrates how to setup a Debugger '*.ini' file to interface with the
+ * C-code using the JTEST test framework.
+ */
+
+MAP  0x00000000, 0x001FFFFF  EXEC READ              /* 2048K Flash */
+MAP  0x20000000, 0x201FFFFF  READ WRITE             /* 2048K RAM   */
+
+LOAD %L INCREMENTAL
+
+
+RESET                                               /* Reset the target processor */
+LOG OFF                                             /* Turn off Logging by default. */
+BK *                                                /* Remove existing breakpoints. */
+
+INCLUDE ../../Common/JTest/jtest_fns.ini            /* Load the JTEST helper functions */
+INCLUDE ../../Common/JTest/jtest_log_Simulator.ini  /* Include specified log file */
+
+/* Break on special members of the JTEST framework.  The framework's
+   name is defined in jtest_fw.h by the #DEFINE JTEST_FW. */
+BS test_start  , 1, "coverage_clear(); test_start_msg();"
+BS test_end    , 1, "coverage_msg(); test_end_msg();"
+BS group_start , 1, "group_start_msg();"
+BS group_end   , 1, "group_end_msg();"
+BS dump_str    , 1, "dump_str_fn();"
+BS dump_data   , 1, "dump_data_fn();"
+BS exit_fw     , 1, "break_fn(); debug_clean_fn(); log_off_fn();"
+
+debug_setup_finished_msg()      /* Output a message to let the output
+                                   parser know that setup has
+                                   finished. */
+
+G                                                   /* Start the Tests */
diff --git a/DSP/DSP_Lib_TestSuite/Common/inc/templates/test_templates.h b/DSP/DSP_Lib_TestSuite/Common/inc/templates/test_templates.h
index 69c3488..3badc80 100644
--- a/DSP/DSP_Lib_TestSuite/Common/inc/templates/test_templates.h
+++ b/DSP/DSP_Lib_TestSuite/Common/inc/templates/test_templates.h
@@ -62,25 +62,29 @@
 /**
  *  Assert that buffers A and B are byte-equivalent for a number of bytes.
  */
-#define TEST_ASSERT_BUFFERS_EQUAL(buf_a, buf_b, bytes)  \
-    do                                                  \
-    {                                                   \
-        if (memcmp(buf_a, buf_b, bytes) != 0)           \
-        {                                               \
-            return JTEST_TEST_FAILED;                   \
-        }                                               \
+
+#define TEST_ASSERT_BUFFERS_EQUAL(buf_a, buf_b, bytes)\
+    do                                                \
+    {                                                 \
+        if (memcmp(buf_a, buf_b, bytes) != 0)         \
+        {                                             \
+            return JTEST_TEST_FAILED;                 \
+        }                                             \
     } while (0)
 
+
+
+
 /**
  *  Assert that the two entities are equal.
  */
-#define TEST_ASSERT_EQUAL(a, b)                         \
-    do                                                  \
-    {                                                   \
-        if ((a) != (b))                                 \
-        {                                               \
-            return JTEST_TEST_FAILED;                   \
-        }                                               \
+#define TEST_ASSERT_EQUAL(a, b)      \
+    do                               \
+    {                                \
+        if ((a) != (b))              \
+        {                            \
+            return JTEST_TEST_FAILED;\
+        }                            \
     } while (0)
 
 /**
@@ -111,31 +115,35 @@
  *  Assert that the SNR between a reference and test sample is above a given
  *  threshold.
  */
-#define TEST_ASSERT_SNR(ref_ptr, tst_ptr, block_size, threshold)    \
-    do                                                              \
-    {                                                               \
-        float32_t snr = arm_snr_f32(ref_ptr, tst_ptr, block_size);  \
-        if ( snr <= threshold)                                       \
-        {                                                           \
-            JTEST_DUMP_STRF("SNR: %f\n", snr);                      \
-            return JTEST_TEST_FAILED;                               \
-        }                                                           \
-    } while (0)                                                      \
+
+#define TEST_ASSERT_SNR(ref_ptr, tst_ptr, block_size, threshold)  \
+    do                                                            \
+    {                                                             \
+        float32_t snr = arm_snr_f32(ref_ptr, tst_ptr, block_size);\
+        if ( snr <= threshold)                                    \
+        {                                                         \
+            JTEST_DUMP_STRF("SNR: %f\n", snr);                    \
+            return JTEST_TEST_FAILED;                             \
+        }                                                         \
+    } while (0)
+
 
 /**
  *  Assert that the SNR between a reference and test sample is above a given
  *  threshold.  Special case for float64_t
  */
-#define TEST_ASSERT_DBL_SNR(ref_ptr, tst_ptr, block_size, threshold)    \
+
+#define TEST_ASSERT_DBL_SNR(ref_ptr, tst_ptr, block_size, threshold)\
     do                                                              \
     {                                                               \
         float64_t snr = arm_snr_f64(ref_ptr, tst_ptr, block_size);  \
-        if ( snr <= threshold)                                       \
+        if ( snr <= threshold)                                      \
         {                                                           \
             JTEST_DUMP_STRF("SNR: %f\n", snr);                      \
             return JTEST_TEST_FAILED;                               \
         }                                                           \
-    } while (0)                                                      \
+    } while (0)
+
 
 /**
  *  Compare test and reference elements by converting to float and
diff --git a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/armcc5_arm.sct b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/armcc5_arm.sct
new file mode 100644
index 0000000..987f554
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/armcc5_arm.sct
@@ -0,0 +1,70 @@
+#! armcc -E
+; command above MUST be in first line (no comment above!)
+
+/*
+;-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+*/
+
+/*--------------------- Flash Configuration -------------------------
+; <h> Flash Configuration
+;   <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+;   <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __ROM_BASE     0x00000000
+#define __ROM_SIZE     0x00200000
+
+/*--------------------- Embedded RAM Configuration ---------------------------
+; <h> RAM Configuration
+;   <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+;   <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_BASE     0x20000000
+#define __RAM_SIZE     0x00200000
+
+/*--------------------- Stack / Heap Configuration ---------------------------
+; <h> Stack / Heap Configuration
+;   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __STACK_SIZE       0x00000400
+#define __HEAP_SIZE        0x00000C00
+
+
+/*----------------------------------------------------------------------------
+  User Stack & Heap boundery definition
+ *----------------------------------------------------------------------------*/
+#define __STACK_TOP        (__RAM_BASE + __RAM_SIZE)
+#define __HEAP_BASE        (__RAM_BASE + __RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
+
+
+/*----------------------------------------------------------------------------
+  Scatter File Definitions definition
+ *----------------------------------------------------------------------------*/
+#define __RO_BASE         __ROM_BASE
+#define __RO_SIZE         __ROM_SIZE
+
+#define __RW_BASE        (__RAM_BASE        )
+#define __RW_SIZE        (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
+
+
+
+LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
+  ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+  }
+  
+  RW_RAM __RW_BASE __RW_SIZE  {                     ; RW data
+   .ANY (+RW +ZI)
+  }
+
+  ARM_LIB_HEAP  __HEAP_BASE EMPTY  __HEAP_SIZE  { ; Reserve empty region for heap
+  }
+
+  ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack 
+  }
+}
diff --git a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv6-m.s b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv6-m.s
index e9731e3..056174c 100644
--- a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv6-m.s
+++ b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv6-m.s
@@ -31,33 +31,6 @@
 ;   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 ;   POSSIBILITY OF SUCH DAMAGE.
 ;   ---------------------------------------------------------------------------*/
-;/*
-;  //-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-;*/
-
-
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000C00
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
 
                 PRESERVE8
                 THUMB
@@ -66,11 +39,12 @@
 ; Vector Table Mapped to Address 0 at Reset
 
                 AREA    RESET, DATA, READONLY
+                IMPORT  ||Image$$ARM_LIB_STACK$$ZI$$Limit||
                 EXPORT  __Vectors
                 EXPORT  __Vectors_End
                 EXPORT  __Vectors_Size
 
-__Vectors       DCD     __initial_sp              ; Top of Stack
+__Vectors       DCD     ||Image$$ARM_LIB_STACK$$ZI$$Limit||              ; Top of Stack
                 DCD     Reset_Handler             ; Reset Handler
                 DCD     NMI_Handler               ; NMI Handler
                 DCD     HardFault_Handler         ; Hard Fault Handler
@@ -134,62 +108,4 @@
 
                 ALIGN
 
-; User Initial Stack & Heap
-                IF      :DEF:__MICROLIB
-
-                EXPORT  __initial_sp
-                EXPORT  __heap_base
-                EXPORT  __heap_limit
-
-                ELSE
-
-                IMPORT  __use_two_region_memory
-
-;/*
-;  __user_setup_stackheap() returns the:
-;     - heap base in r0 (if the program uses the heap)
-;     - stack base in sp
-;     - heap limit in r2 (if the program uses the heap and uses two-region memory).
-; */
-                EXPORT  __user_setup_stackheap
-
-__user_setup_stackheap PROC
-                LDR     R0, = __initial_sp
-                MOV     SP, R0
-				IF Heap_Size > 0
-                LDR     R2, = __heap_limit
-                LDR     R0, = __heap_base
-				ELSE
-                MOV     R0, #0
-                MOV     R2, #0
-                ENDIF
-                BX      LR
-                ENDP
-
-
-;/*
-;__user_initial_stackheap() returns the:
-;   - heap base in r0
-;   - stack base in r1, that is, the highest address in the stack region
-;   - heap limit in r2
-;   - stack limit in r3, that is, the lowest address in the stack region.
-; */
-;
-;/* DEPRICATED
-;                EXPORT  __user_initial_stackheap
-;
-;__user_initial_stackheap PROC
-;                LDR     R0, =  Heap_Mem
-;                LDR     R1, =(Stack_Mem + Stack_Size)
-;                LDR     R2, = (Heap_Mem +  Heap_Size)
-;                LDR     R3, = Stack_Mem
-;                BX      LR
-;                ENDP
-; */
-
-                ALIGN
-
-                ENDIF
-
-
                 END
diff --git a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv6-m.s.noSCT b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv6-m.s.noSCT
new file mode 100644
index 0000000..e9731e3
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv6-m.s.noSCT
@@ -0,0 +1,195 @@
+;/* File: startup_armv6-m.s
+; * Purpose: startup file for armv7-m architecture devices.
+; *          Should be used with ARMCC
+; * Version: V2.00
+; * Date: 16 November 2015
+; *
+; */
+;/* Copyright (c) 2011 - 2014 ARM LIMITED
+;
+;   All rights reserved.
+;   Redistribution and use in source and binary forms, with or without
+;   modification, are permitted provided that the following conditions are met:
+;   - Redistributions of source code must retain the above copyright
+;     notice, this list of conditions and the following disclaimer.
+;   - Redistributions in binary form must reproduce the above copyright
+;     notice, this list of conditions and the following disclaimer in the
+;     documentation and/or other materials provided with the distribution.
+;   - Neither the name of ARM nor the names of its contributors may be used
+;     to endorse or promote products derived from this software without
+;     specific prior written permission.
+;   *
+;   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+;   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+;   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+;   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+;   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+;   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+;   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+;   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+;   POSSIBILITY OF SUCH DAMAGE.
+;   ---------------------------------------------------------------------------*/
+;/*
+;  //-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size      EQU     0x00000400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size       EQU     0x00000C00
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp              ; Top of Stack
+                DCD     Reset_Handler             ; Reset Handler
+                DCD     NMI_Handler               ; NMI Handler
+                DCD     HardFault_Handler         ; Hard Fault Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     SVC_Handler               ; SVCall Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     PendSV_Handler            ; PendSV Handler
+                DCD     SysTick_Handler           ; SysTick Handler
+__Vectors_End
+
+__Vectors_Size  EQU     __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT  Reset_Handler             [WEAK]
+                IMPORT  SystemInit
+                IMPORT  __main
+                LDR     R0, =SystemInit
+                BLX     R0
+                LDR     R0, =__main
+                BX      R0
+                ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler               [WEAK]
+                BKPT #0
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler         [WEAK]
+                BKPT #0
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler               [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler            [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler           [WEAK]
+                B       .
+                ENDP
+
+                ALIGN
+
+; User Initial Stack & Heap
+                IF      :DEF:__MICROLIB
+
+                EXPORT  __initial_sp
+                EXPORT  __heap_base
+                EXPORT  __heap_limit
+
+                ELSE
+
+                IMPORT  __use_two_region_memory
+
+;/*
+;  __user_setup_stackheap() returns the:
+;     - heap base in r0 (if the program uses the heap)
+;     - stack base in sp
+;     - heap limit in r2 (if the program uses the heap and uses two-region memory).
+; */
+                EXPORT  __user_setup_stackheap
+
+__user_setup_stackheap PROC
+                LDR     R0, = __initial_sp
+                MOV     SP, R0
+				IF Heap_Size > 0
+                LDR     R2, = __heap_limit
+                LDR     R0, = __heap_base
+				ELSE
+                MOV     R0, #0
+                MOV     R2, #0
+                ENDIF
+                BX      LR
+                ENDP
+
+
+;/*
+;__user_initial_stackheap() returns the:
+;   - heap base in r0
+;   - stack base in r1, that is, the highest address in the stack region
+;   - heap limit in r2
+;   - stack limit in r3, that is, the lowest address in the stack region.
+; */
+;
+;/* DEPRICATED
+;                EXPORT  __user_initial_stackheap
+;
+;__user_initial_stackheap PROC
+;                LDR     R0, =  Heap_Mem
+;                LDR     R1, =(Stack_Mem + Stack_Size)
+;                LDR     R2, = (Heap_Mem +  Heap_Size)
+;                LDR     R3, = Stack_Mem
+;                BX      LR
+;                ENDP
+; */
+
+                ALIGN
+
+                ENDIF
+
+
+                END
diff --git a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv7-m.s b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv7-m.s
index 2b00ab9..b40c565 100644
--- a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv7-m.s
+++ b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv7-m.s
@@ -31,33 +31,6 @@
 ;   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 ;   POSSIBILITY OF SUCH DAMAGE.
 ;   ---------------------------------------------------------------------------*/
-;/*
-;  //-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-;*/
-
-
-; <h> Stack Configuration
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Stack_Size      EQU     0x00000400
-
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem       SPACE   Stack_Size
-__initial_sp
-
-
-; <h> Heap Configuration
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-; </h>
-
-Heap_Size       EQU     0x00000C00
-
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem        SPACE   Heap_Size
-__heap_limit
-
 
                 PRESERVE8
                 THUMB
@@ -66,11 +39,12 @@
 ; Vector Table Mapped to Address 0 at Reset
 
                 AREA    RESET, DATA, READONLY
+                IMPORT  ||Image$$ARM_LIB_STACK$$ZI$$Limit||
                 EXPORT  __Vectors
                 EXPORT  __Vectors_End
                 EXPORT  __Vectors_Size
 
-__Vectors       DCD     __initial_sp              ; Top of Stack
+__Vectors       DCD     ||Image$$ARM_LIB_STACK$$ZI$$Limit||              ; Top of Stack
                 DCD     Reset_Handler             ; Reset Handler
                 DCD     NMI_Handler               ; NMI Handler
                 DCD     HardFault_Handler         ; Hard Fault Handler
@@ -157,62 +131,4 @@
 
                 ALIGN
 
-; User Initial Stack & Heap
-                IF      :DEF:__MICROLIB
-
-                EXPORT  __initial_sp
-                EXPORT  __heap_base
-                EXPORT  __heap_limit
-
-                ELSE
-
-                IMPORT  __use_two_region_memory
-
-;/*
-;  __user_setup_stackheap() returns the:
-;     - heap base in r0 (if the program uses the heap)
-;     - stack base in sp
-;     - heap limit in r2 (if the program uses the heap and uses two-region memory).
-; */
-                EXPORT  __user_setup_stackheap
-
-__user_setup_stackheap PROC
-                LDR     R0, = __initial_sp
-                MOV     SP, R0
-				IF Heap_Size > 0
-                LDR     R2, = __heap_limit
-                LDR     R0, = __heap_base
-				ELSE
-                MOV     R0, #0
-                MOV     R2, #0
-                ENDIF
-                BX      LR
-                ENDP
-
-
-;/*
-;__user_initial_stackheap() returns the:
-;   - heap base in r0
-;   - stack base in r1, that is, the highest address in the stack region
-;   - heap limit in r2
-;   - stack limit in r3, that is, the lowest address in the stack region.
-; */
-;
-;/* DEPRICATED
-;                EXPORT  __user_initial_stackheap
-;
-;__user_initial_stackheap PROC
-;                LDR     R0, =  Heap_Mem
-;                LDR     R1, =(Stack_Mem + Stack_Size)
-;                LDR     R2, = (Heap_Mem +  Heap_Size)
-;                LDR     R3, = Stack_Mem
-;                BX      LR
-;                ENDP
-; */
-
-                ALIGN
-
-                ENDIF
-
-
                 END
diff --git a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv7-m.s.noSCT b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv7-m.s.noSCT
new file mode 100644
index 0000000..2b00ab9
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv7-m.s.noSCT
@@ -0,0 +1,218 @@
+;/* File: startup_armv7-m.s
+; * Purpose: startup file for armv7-m architecture devices.
+; *          Should be used with ARMCC
+; * Version: V2.00
+; * Date: 16 November 2015
+; *
+; */
+;/* Copyright (c) 2011 - 2014 ARM LIMITED
+;
+;   All rights reserved.
+;   Redistribution and use in source and binary forms, with or without
+;   modification, are permitted provided that the following conditions are met:
+;   - Redistributions of source code must retain the above copyright
+;     notice, this list of conditions and the following disclaimer.
+;   - Redistributions in binary form must reproduce the above copyright
+;     notice, this list of conditions and the following disclaimer in the
+;     documentation and/or other materials provided with the distribution.
+;   - Neither the name of ARM nor the names of its contributors may be used
+;     to endorse or promote products derived from this software without
+;     specific prior written permission.
+;   *
+;   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+;   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+;   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+;   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+;   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+;   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+;   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+;   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+;   POSSIBILITY OF SUCH DAMAGE.
+;   ---------------------------------------------------------------------------*/
+;/*
+;  //-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size      EQU     0x00000400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size       EQU     0x00000C00
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp              ; Top of Stack
+                DCD     Reset_Handler             ; Reset Handler
+                DCD     NMI_Handler               ; NMI Handler
+                DCD     HardFault_Handler         ; Hard Fault Handler
+                DCD     MemManage_Handler         ; MPU Fault Handler
+                DCD     BusFault_Handler          ; Bus Fault Handler
+                DCD     UsageFault_Handler        ; Usage Fault Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     SVC_Handler               ; SVCall Handler
+                DCD     DebugMon_Handler          ; Debug Monitor Handler
+                DCD     0                         ; Reserved
+                DCD     PendSV_Handler            ; PendSV Handler
+                DCD     SysTick_Handler           ; SysTick Handler
+__Vectors_End
+
+__Vectors_Size  EQU     __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT  Reset_Handler             [WEAK]
+                IMPORT  SystemInit
+                IMPORT  __main
+                LDR     R0, =SystemInit
+                BLX     R0
+                LDR     R0, =__main
+                BX      R0
+                ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler               [WEAK]
+                BKPT #0
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler         [WEAK]
+                BKPT #0
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler         [WEAK]
+                BKPT #0
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler          [WEAK]
+                BKPT #0
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler        [WEAK]
+                BKPT #0
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler               [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler          [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler            [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler           [WEAK]
+                B       .
+                ENDP
+
+                ALIGN
+
+; User Initial Stack & Heap
+                IF      :DEF:__MICROLIB
+
+                EXPORT  __initial_sp
+                EXPORT  __heap_base
+                EXPORT  __heap_limit
+
+                ELSE
+
+                IMPORT  __use_two_region_memory
+
+;/*
+;  __user_setup_stackheap() returns the:
+;     - heap base in r0 (if the program uses the heap)
+;     - stack base in sp
+;     - heap limit in r2 (if the program uses the heap and uses two-region memory).
+; */
+                EXPORT  __user_setup_stackheap
+
+__user_setup_stackheap PROC
+                LDR     R0, = __initial_sp
+                MOV     SP, R0
+				IF Heap_Size > 0
+                LDR     R2, = __heap_limit
+                LDR     R0, = __heap_base
+				ELSE
+                MOV     R0, #0
+                MOV     R2, #0
+                ENDIF
+                BX      LR
+                ENDP
+
+
+;/*
+;__user_initial_stackheap() returns the:
+;   - heap base in r0
+;   - stack base in r1, that is, the highest address in the stack region
+;   - heap limit in r2
+;   - stack limit in r3, that is, the lowest address in the stack region.
+; */
+;
+;/* DEPRICATED
+;                EXPORT  __user_initial_stackheap
+;
+;__user_initial_stackheap PROC
+;                LDR     R0, =  Heap_Mem
+;                LDR     R1, =(Stack_Mem + Stack_Size)
+;                LDR     R2, = (Heap_Mem +  Heap_Size)
+;                LDR     R3, = Stack_Mem
+;                BX      LR
+;                ENDP
+; */
+
+                ALIGN
+
+                ENDIF
+
+
+                END
diff --git a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/armcc6_arm.sct b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/armcc6_arm.sct
new file mode 100644
index 0000000..8de3ce7
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/armcc6_arm.sct
@@ -0,0 +1,70 @@
+#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m0 -xc
+; command above MUST be in first line (no comment above!)
+
+/*
+;-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+*/
+
+/*--------------------- Flash Configuration -------------------------
+; <h> Flash Configuration
+;   <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
+;   <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __ROM_BASE     0x00000000
+#define __ROM_SIZE     0x00200000
+
+/*--------------------- Embedded RAM Configuration ---------------------------
+; <h> RAM Configuration
+;   <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+;   <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_BASE     0x20000000
+#define __RAM_SIZE     0x00200000
+
+/*--------------------- Stack / Heap Configuration ---------------------------
+; <h> Stack / Heap Configuration
+;   <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;   <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+ *----------------------------------------------------------------------------*/
+#define __STACK_SIZE       0x00000400
+#define __HEAP_SIZE        0x00000C00
+
+
+/*----------------------------------------------------------------------------
+  User Stack & Heap boundery definition
+ *----------------------------------------------------------------------------*/
+#define __STACK_TOP        (__RAM_BASE + __RAM_SIZE)
+#define __HEAP_BASE        (__RAM_BASE + __RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
+
+
+/*----------------------------------------------------------------------------
+  Scatter File Definitions definition
+ *----------------------------------------------------------------------------*/
+#define __RO_BASE         __ROM_BASE
+#define __RO_SIZE         __ROM_SIZE
+
+#define __RW_BASE        (__RAM_BASE        )
+#define __RW_SIZE        (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE)
+
+
+
+LR_ROM __RO_BASE __RO_SIZE  {                       ; load region size_region
+  ER_ROM __RO_BASE __RO_SIZE  {                     ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+  }
+  
+  RW_RAM __RW_BASE __RW_SIZE  {                     ; RW data
+   .ANY (+RW +ZI)
+  }
+
+  ARM_LIB_HEAP  __HEAP_BASE EMPTY  __HEAP_SIZE  { ; Reserve empty region for heap
+  }
+
+  ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack 
+  }
+}
diff --git a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv6-m.S b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv6-m.S
index 3d18268..d3499af 100644
--- a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv6-m.S
+++ b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv6-m.S
@@ -42,39 +42,7 @@
 /* .eabi_attribute Tag_ABI_align8_preserved,1    www.support.code-red-tech.com/CodeRedWiki/Preserve8 */
 .eabi_attribute 25, 1   /* Tag_ABI_align_preserved */
 
-
-/*
-  ;<h> Stack Configuration
-  ;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-  ;</h>
-*/
-    .equ    Stack_Size, 0x00000400
-
-    .section STACK, "w"
-    .align  3
-    .globl  __StackTop
-    .globl  __StackLimit
-__StackLimit:
-    .space  Stack_Size
-__StackTop:   /* formerly known as __initial_sp */
-
-
-/*
-  ;<h> Heap Configuration
-  ;  <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-  ;</h>
-*/
-    .equ    Heap_Size, 0x00000C00
-
-    .section HEAP, "w"
-    .align  3
-    .globl  __HeapBase
-    .globl  __HeapLimit
-__HeapBase:
-    .if Heap_Size
-    .space  Heap_Size
-    .endif
-__HeapLimit:
+    .global    Image$$ARM_LIB_STACK$$ZI$$Limit
 
 
     .section RESET, "x"
@@ -83,7 +51,7 @@
     .globl  __Vectors_End
     .globl  __Vectors_Size
 __Vectors:
-    .long   __StackTop            /* Top of Stack */
+    .long   Image$$ARM_LIB_STACK$$ZI$$Limit            /* Top of Stack */
     .long   Reset_Handler         /* Reset Handler */
     .long   NMI_Handler           /* NMI Handler */
     .long   HardFault_Handler     /* Hard Fault Handler */
@@ -156,48 +124,4 @@
     bkpt    #0
     b       .
 
-
-    .global __use_two_region_memory
-
-/*
-  __user_setup_stackheap() returns the:
-     - heap base in r0 (if the program uses the heap)
-     - stack base in sp
-     - heap limit in r2 (if the program uses the heap and uses two-region memory).
- */
-    .globl  __user_setup_stackheap
-    .type   __user_setup_stackheap, %function
-    .thumb_func
-__user_setup_stackheap:
-    ldr     r0, =__StackTop
-    mov     sp, r0
-    .if Heap_Size
-    ldr     r0, =__HeapBase
-    ldr     r2, =__HeapLimit
-    .else
-    mov     r0, #0
-    mov     r2, #0
-    .endif
-    bx      lr
-
-
-/*
-__user_initial_stackheap() returns the:
-   - heap base in r0
-   - stack base in r1, that is, the highest address in the stack region
-   - heap limit in r2
-   - stack limit in r3, that is, the lowest address in the stack region.
- */
-/* DEPRICATED
-    .globl  __user_initial_stackheap
-    .type   __user_initial_stackheap, %function
-    .thumb_func
-__user_initial_stackheap:
-    ldr     r0, = __HeapBase
-    ldr     r1, = __StackTop
-    ldr     r2, = __HeapLimit
-    ldr     r3, = __StackLimit
-    bx      lr
-*/
-
     .end
diff --git a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv6-m.S.noSCT b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv6-m.S.noSCT
new file mode 100644
index 0000000..3d18268
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv6-m.S.noSCT
@@ -0,0 +1,203 @@
+/* File: startup_armv6-m.S
+ * Purpose: startup file for armv6-m architecture devices.
+ *          Should be used with ARMCLANG
+ * Version: V2.00
+ * Date: 16 November 2015
+ *
+ */
+/* Copyright (c) 2011 - 2015 ARM LIMITED
+
+   All rights reserved.
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+   - Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+   - Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+   - Neither the name of ARM nor the names of its contributors may be used
+     to endorse or promote products derived from this software without
+     specific prior written permission.
+   *
+   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   POSSIBILITY OF SUCH DAMAGE.
+   ---------------------------------------------------------------------------*/
+/*
+  ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+*/
+
+
+    .syntax unified
+    .arch   armv6-m
+
+/* .eabi_attribute Tag_ABI_align8_preserved,1    www.support.code-red-tech.com/CodeRedWiki/Preserve8 */
+.eabi_attribute 25, 1   /* Tag_ABI_align_preserved */
+
+
+/*
+  ;<h> Stack Configuration
+  ;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+  ;</h>
+*/
+    .equ    Stack_Size, 0x00000400
+
+    .section STACK, "w"
+    .align  3
+    .globl  __StackTop
+    .globl  __StackLimit
+__StackLimit:
+    .space  Stack_Size
+__StackTop:   /* formerly known as __initial_sp */
+
+
+/*
+  ;<h> Heap Configuration
+  ;  <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+  ;</h>
+*/
+    .equ    Heap_Size, 0x00000C00
+
+    .section HEAP, "w"
+    .align  3
+    .globl  __HeapBase
+    .globl  __HeapLimit
+__HeapBase:
+    .if Heap_Size
+    .space  Heap_Size
+    .endif
+__HeapLimit:
+
+
+    .section RESET, "x"
+    .align  2
+    .globl  __Vectors
+    .globl  __Vectors_End
+    .globl  __Vectors_Size
+__Vectors:
+    .long   __StackTop            /* Top of Stack */
+    .long   Reset_Handler         /* Reset Handler */
+    .long   NMI_Handler           /* NMI Handler */
+    .long   HardFault_Handler     /* Hard Fault Handler */
+    .long   0                     /* Reserved */
+    .long   0                     /* Reserved */
+    .long   0                     /* Reserved */
+    .long   0                     /* Reserved */
+    .long   0                     /* Reserved */
+    .long   0                     /* Reserved */
+    .long   0                     /* Reserved */
+    .long   SVC_Handler           /* SVCall Handler */
+    .long   0                     /* Reserved */
+    .long   0                     /* Reserved */
+    .long   PendSV_Handler        /* PendSV Handler */
+    .long   SysTick_Handler       /* SysTick Handler */
+__Vectors_End:
+
+    .equ    __Vectors_Size, __Vectors_End - __Vectors
+
+
+    .text
+    .thumb
+    .align  2
+
+    .globl  Reset_Handler
+    .weak   Reset_Handler
+    .type   Reset_Handler, %function
+    .thumb_func
+Reset_Handler:
+    bl      SystemInit
+    bl      __main
+
+    .globl  NMI_Handler
+    .weak   NMI_Handler
+    .type   NMI_Handler, %function
+    .thumb_func
+NMI_Handler:
+    bkpt    #0
+    b       .
+
+    .globl  HardFault_Handler
+    .weak   HardFault_Handler
+    .type   HardFault_Handler, %function
+    .thumb_func
+HardFault_Handler:
+    bkpt    #0
+    b       .
+
+    .globl  SVC_Handler
+    .weak   SVC_Handler
+    .type   SVC_Handler, %function
+    .thumb_func
+SVC_Handler:
+    bkpt    #0
+    b       .
+
+    .globl  PendSV_Handler
+    .weak   PendSV_Handler
+    .type   PendSV_Handler, %function
+    .thumb_func
+PendSV_Handler:
+    bkpt    #0
+    b       .
+
+    .globl  SysTick_Handler
+    .weak   SysTick_Handler
+    .type   SysTick_Handler, %function
+    .thumb_func
+SysTick_Handler:
+    bkpt    #0
+    b       .
+
+
+    .global __use_two_region_memory
+
+/*
+  __user_setup_stackheap() returns the:
+     - heap base in r0 (if the program uses the heap)
+     - stack base in sp
+     - heap limit in r2 (if the program uses the heap and uses two-region memory).
+ */
+    .globl  __user_setup_stackheap
+    .type   __user_setup_stackheap, %function
+    .thumb_func
+__user_setup_stackheap:
+    ldr     r0, =__StackTop
+    mov     sp, r0
+    .if Heap_Size
+    ldr     r0, =__HeapBase
+    ldr     r2, =__HeapLimit
+    .else
+    mov     r0, #0
+    mov     r2, #0
+    .endif
+    bx      lr
+
+
+/*
+__user_initial_stackheap() returns the:
+   - heap base in r0
+   - stack base in r1, that is, the highest address in the stack region
+   - heap limit in r2
+   - stack limit in r3, that is, the lowest address in the stack region.
+ */
+/* DEPRICATED
+    .globl  __user_initial_stackheap
+    .type   __user_initial_stackheap, %function
+    .thumb_func
+__user_initial_stackheap:
+    ldr     r0, = __HeapBase
+    ldr     r1, = __StackTop
+    ldr     r2, = __HeapLimit
+    ldr     r3, = __StackLimit
+    bx      lr
+*/
+
+    .end
diff --git a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv7-m.S b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv7-m.S
index 4bdb549..53a307e 100644
--- a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv7-m.S
+++ b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv7-m.S
@@ -37,44 +37,12 @@
 
 
     .syntax unified
-    .arch   armv6-m
+    .arch   armv7-m
 
 /* .eabi_attribute Tag_ABI_align8_preserved,1    www.support.code-red-tech.com/CodeRedWiki/Preserve8 */
 .eabi_attribute 25, 1   /* Tag_ABI_align_preserved */
 
-
-/*
-  ;<h> Stack Configuration
-  ;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-  ;</h>
-*/
-    .equ    Stack_Size, 0x00000400
-
-    .section STACK, "w"
-    .align  3
-    .globl  __StackTop
-    .globl  __StackLimit
-__StackLimit:
-    .space  Stack_Size
-__StackTop:   /* formerly known as __initial_sp */
-
-
-/*
-  ;<h> Heap Configuration
-  ;  <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-  ;</h>
-*/
-    .equ    Heap_Size, 0x00000C00
-
-    .section HEAP, "w"
-    .align  3
-    .globl  __HeapBase
-    .globl  __HeapLimit
-__HeapBase:
-    .if Heap_Size
-    .space  Heap_Size
-    .endif
-__HeapLimit:
+    .global    Image$$ARM_LIB_STACK$$ZI$$Limit
 
 
     .section RESET, "x"
@@ -83,7 +51,7 @@
     .globl  __Vectors_End
     .globl  __Vectors_Size
 __Vectors:
-    .long   __StackTop            /* Top of Stack */
+    .long   Image$$ARM_LIB_STACK$$ZI$$Limit            /* Top of Stack */
     .long   Reset_Handler         /* Reset Handler */
     .long   NMI_Handler           /* NMI Handler */
     .long   HardFault_Handler     /* Hard Fault Handler */
@@ -188,48 +156,4 @@
     bkpt    #0
     b       .
 
-
-    .global __use_two_region_memory
-
-/*
-  __user_setup_stackheap() returns the:
-     - heap base in r0 (if the program uses the heap)
-     - stack base in sp
-     - heap limit in r2 (if the program uses the heap and uses two-region memory).
- */
-    .globl  __user_setup_stackheap
-    .type   __user_setup_stackheap, %function
-    .thumb_func
-__user_setup_stackheap:
-    ldr     r0, =__StackTop
-    mov     sp, r0
-    .if Heap_Size
-    ldr     r0, =__HeapBase
-    ldr     r2, =__HeapLimit
-    .else
-    mov     r0, #0
-    mov     r2, #0
-    .endif
-    bx      lr
-
-
-/*
-__user_initial_stackheap() returns the:
-   - heap base in r0
-   - stack base in r1, that is, the highest address in the stack region
-   - heap limit in r2
-   - stack limit in r3, that is, the lowest address in the stack region.
- */
-/* DEPRICATED
-    .globl  __user_initial_stackheap
-    .type   __user_initial_stackheap, %function
-    .thumb_func
-__user_initial_stackheap:
-    ldr     r0, = __HeapBase
-    ldr     r1, = __StackTop
-    ldr     r2, = __HeapLimit
-    ldr     r3, = __StackLimit
-    bx      lr
-*/
-
     .end
diff --git a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv7-m.S.noSCT b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv7-m.S.noSCT
new file mode 100644
index 0000000..4bdb549
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv7-m.S.noSCT
@@ -0,0 +1,235 @@
+/* File: startup_armv7-m.S
+ * Purpose: startup file for armv7-m architecture devices.
+ *          Should be used with ARMCLANG
+ * Version: V2.00
+ * Date: 16 November 2015
+ *
+ */
+/* Copyright (c) 2011 - 2015 ARM LIMITED
+
+   All rights reserved.
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+   - Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+   - Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+   - Neither the name of ARM nor the names of its contributors may be used
+     to endorse or promote products derived from this software without
+     specific prior written permission.
+   *
+   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   POSSIBILITY OF SUCH DAMAGE.
+   ---------------------------------------------------------------------------*/
+/*
+  ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+*/
+
+
+    .syntax unified
+    .arch   armv6-m
+
+/* .eabi_attribute Tag_ABI_align8_preserved,1    www.support.code-red-tech.com/CodeRedWiki/Preserve8 */
+.eabi_attribute 25, 1   /* Tag_ABI_align_preserved */
+
+
+/*
+  ;<h> Stack Configuration
+  ;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+  ;</h>
+*/
+    .equ    Stack_Size, 0x00000400
+
+    .section STACK, "w"
+    .align  3
+    .globl  __StackTop
+    .globl  __StackLimit
+__StackLimit:
+    .space  Stack_Size
+__StackTop:   /* formerly known as __initial_sp */
+
+
+/*
+  ;<h> Heap Configuration
+  ;  <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+  ;</h>
+*/
+    .equ    Heap_Size, 0x00000C00
+
+    .section HEAP, "w"
+    .align  3
+    .globl  __HeapBase
+    .globl  __HeapLimit
+__HeapBase:
+    .if Heap_Size
+    .space  Heap_Size
+    .endif
+__HeapLimit:
+
+
+    .section RESET, "x"
+    .align  2
+    .globl  __Vectors
+    .globl  __Vectors_End
+    .globl  __Vectors_Size
+__Vectors:
+    .long   __StackTop            /* Top of Stack */
+    .long   Reset_Handler         /* Reset Handler */
+    .long   NMI_Handler           /* NMI Handler */
+    .long   HardFault_Handler     /* Hard Fault Handler */
+    .long   MemManage_Handler     /* MPU Fault Handler */
+    .long   BusFault_Handler      /* Bus Fault Handler */
+    .long   UsageFault_Handler    /* Usage Fault Handler */
+    .long   0                     /* Reserved */
+    .long   0                     /* Reserved */
+    .long   0                     /* Reserved */
+    .long   0                     /* Reserved */
+    .long   SVC_Handler           /* SVCall Handler */
+    .long   DebugMon_Handler      /* Debug Monitor Handler */
+    .long   0                     /* Reserved */
+    .long   PendSV_Handler        /* PendSV Handler */
+    .long   SysTick_Handler       /* SysTick Handler */
+__Vectors_End:
+
+    .equ    __Vectors_Size, __Vectors_End - __Vectors
+
+
+    .text
+    .thumb
+    .align  2
+
+    .globl  Reset_Handler
+    .weak   Reset_Handler
+    .type   Reset_Handler, %function
+    .thumb_func
+Reset_Handler:
+    bl      SystemInit
+    bl      __main
+
+    .globl  NMI_Handler
+    .weak   NMI_Handler
+    .type   NMI_Handler, %function
+    .thumb_func
+NMI_Handler:
+    bkpt    #0
+    b       .
+
+    .globl  HardFault_Handler
+    .weak   HardFault_Handler
+    .type   HardFault_Handler, %function
+    .thumb_func
+HardFault_Handler:
+    bkpt    #0
+    b       .
+
+    .globl  MemManage_Handler
+    .weak   MemManage_Handler
+    .type   MemManage_Handler, %function
+    .thumb_func
+MemManage_Handler:
+    bkpt    #0
+    b       .
+
+    .globl  BusFault_Handler
+    .weak   BusFault_Handler
+    .type   BusFault_Handler, %function
+    .thumb_func
+BusFault_Handler:
+    bkpt    #0
+    b       .
+
+    .globl  UsageFault_Handler
+    .weak   UsageFault_Handler
+    .type   UsageFault_Handler, %function
+    .thumb_func
+UsageFault_Handler:
+    bkpt    #0
+    b       .
+
+    .globl  SVC_Handler
+    .weak   SVC_Handler
+    .type   SVC_Handler, %function
+    .thumb_func
+SVC_Handler:
+    bkpt    #0
+    b       .
+
+    .globl  DebugMon_Handler
+    .weak   DebugMon_Handler
+    .type   DebugMon_Handler, %function
+    .thumb_func
+DebugMon_Handler:
+    bkpt    #0
+    b       .
+
+    .globl  PendSV_Handler
+    .weak   PendSV_Handler
+    .type   PendSV_Handler, %function
+    .thumb_func
+PendSV_Handler:
+    bkpt    #0
+    b       .
+
+    .globl  SysTick_Handler
+    .weak   SysTick_Handler
+    .type   SysTick_Handler, %function
+    .thumb_func
+SysTick_Handler:
+    bkpt    #0
+    b       .
+
+
+    .global __use_two_region_memory
+
+/*
+  __user_setup_stackheap() returns the:
+     - heap base in r0 (if the program uses the heap)
+     - stack base in sp
+     - heap limit in r2 (if the program uses the heap and uses two-region memory).
+ */
+    .globl  __user_setup_stackheap
+    .type   __user_setup_stackheap, %function
+    .thumb_func
+__user_setup_stackheap:
+    ldr     r0, =__StackTop
+    mov     sp, r0
+    .if Heap_Size
+    ldr     r0, =__HeapBase
+    ldr     r2, =__HeapLimit
+    .else
+    mov     r0, #0
+    mov     r2, #0
+    .endif
+    bx      lr
+
+
+/*
+__user_initial_stackheap() returns the:
+   - heap base in r0
+   - stack base in r1, that is, the highest address in the stack region
+   - heap limit in r2
+   - stack limit in r3, that is, the lowest address in the stack region.
+ */
+/* DEPRICATED
+    .globl  __user_initial_stackheap
+    .type   __user_initial_stackheap, %function
+    .thumb_func
+__user_initial_stackheap:
+    ldr     r0, = __HeapBase
+    ldr     r1, = __StackTop
+    ldr     r2, = __HeapLimit
+    ldr     r3, = __StackLimit
+    bx      lr
+*/
+
+    .end
diff --git a/DSP/DSP_Lib_TestSuite/Common/platform/startup_generic.S b/DSP/DSP_Lib_TestSuite/Common/platform/startup_generic.S
index 6d68355..91a9ea3 100644
--- a/DSP/DSP_Lib_TestSuite/Common/platform/startup_generic.S
+++ b/DSP/DSP_Lib_TestSuite/Common/platform/startup_generic.S
@@ -1,56 +1,62 @@
 
 #if defined (__CC_ARM)
-  #if   (defined (ARM_MATH_CM0))
+  #if   (defined (ARMCM0))
     #include "ARMCC\startup_armv6-m.s"
-  #elif (defined (ARM_MATH_CM0P))
+  #elif (defined (ARMCM0P) || defined (ARMCM0P_MPU))
     #include "ARMCC\startup_armv6-m.s"
-  #elif (defined (ARM_MATH_CM3))
+  #elif (defined (ARMCM3))
     #include "ARMCC\startup_armv7-m.s"
-  #elif (defined (ARM_MATH_CM4))
+  #elif (defined (ARMCM4) || defined (ARMCM4_FP))
     #include "ARMCC\startup_armv7-m.s"
-  #elif (defined (ARM_MATH_CM7))
+  #elif (defined (ARMCM7) || defined (ARMCM7_SP) || defined (ARMCM7_DP))
     #include "ARMCC\startup_armv7-m.s"
-  #elif (defined (ARM_MATH_ARMV8MBL))
+  #elif (defined (ARMv8MBL))
     #include "ARMCC\startup_armv6-m.s"
-  #elif (defined (ARM_MATH_ARMV8MML))
+  #elif (defined (ARMv8MML)    || defined (ARMv8MML_DSP)    || \
+         defined (ARMv8MML_SP) || defined (ARMv8MML_DSP_SP) || \
+         defined (ARMv8MML_DP) || defined (ARMv8MML_DSP_DP)   )
     #include "ARMCC\startup_armv7-m.s"
   #else
     #error "No appropriate startup file found!"
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if   (defined (ARM_MATH_CM0))
+  #if   (defined (ARMCM0))
     #include "ARMCLANG\startup_armv6-m.S"
-  #elif (defined (ARM_MATH_CM0P))
+  #elif (defined (ARMCM0P) || defined (ARMCM0P_MPU))
     #include "ARMCLANG\startup_armv6-m.S"
-  #elif (defined (ARM_MATH_CM3))
+  #elif (defined (ARMCM3))
     #include "ARMCLANG\startup_armv7-m.S"
-  #elif (defined (ARM_MATH_CM4))
+  #elif (defined (ARMCM4) || defined (ARMCM4_FP))
     #include "ARMCLANG\startup_armv7-m.S"
-  #elif (defined (ARM_MATH_CM7))
+  #elif (defined (ARMCM7) || defined (ARMCM7_SP) || defined (ARMCM7_DP))
     #include "ARMCLANG\startup_armv7-m.S"
-  #elif (defined (ARM_MATH_ARMV8MBL))
+  #elif (defined (ARMv8MBL))
     #include "ARMCLANG\startup_armv6-m.S"
-  #elif (defined (ARM_MATH_ARMV8MML))
+  #elif (defined (ARMv8MML)    || defined (ARMv8MML_DSP)    || \
+         defined (ARMv8MML_SP) || defined (ARMv8MML_DSP_SP) || \
+         defined (ARMv8MML_DP) || defined (ARMv8MML_DSP_DP)   )
     #include "ARMCLANG\startup_armv7-m.S"
   #else
     #error "No appropriate startup file found!"
   #endif
 
 #elif defined (__GNUC__)
-  #if   (defined (ARM_MATH_CM0))
+  #if   (defined (ARMCM0))
     #include "GCC\startup_armv6-m.S"
-  #elif (defined (ARM_MATH_CM0P))
+  #elif (defined (ARMCM0P) || defined (ARMCM0P_MPU))
     #include "GCC\startup_armv6-m.S"
-  #elif (defined (ARM_MATH_CM3))
+  #elif (defined (ARMCM3))
     #include "GCC\startup_armv7-m.S"
-  #elif (defined (ARM_MATH_CM4))
+  #elif (defined (ARMCM4) || defined (ARMCM4_FP))
     #include "GCC\startup_armv7-m.S"
-  #elif (defined (ARM_MATH_CM7))
+  #elif (defined (ARMCM7) || defined (ARMCM7_SP) || defined (ARMCM7_DP))
     #include "GCC\startup_armv7-m.S"
-  #elif (defined (ARM_MATH_ARMV8MBL))
+  #elif (defined (ARMv8MBL))
     #include "GCC\startup_armv6-m.S"
-  #elif (defined (ARM_MATH_ARMV8MML))
+  #elif (defined (ARMv8MML)    || defined (ARMv8MML_DSP)    || \
+         defined (ARMv8MML_SP) || defined (ARMv8MML_DSP_SP) || \
+         defined (ARMv8MML_DP) || defined (ARMv8MML_DSP_DP)   )
     #include "GCC\startup_armv7-m.S"
   #else
     #error "No appropriate startup file found!"
diff --git a/DSP/DSP_Lib_TestSuite/Common/src/all_tests.c b/DSP/DSP_Lib_TestSuite/Common/src/all_tests.c
index aaa4524..2926273 100644
--- a/DSP/DSP_Lib_TestSuite/Common/src/all_tests.c
+++ b/DSP/DSP_Lib_TestSuite/Common/src/all_tests.c
@@ -12,19 +12,51 @@
 
 JTEST_DEFINE_GROUP(all_tests)
 {
-    /*
-      To skip a test, comment it out
-    */
-    JTEST_GROUP_CALL(basic_math_tests);
-    JTEST_GROUP_CALL(complex_math_tests);
-    JTEST_GROUP_CALL(controller_tests);
-    JTEST_GROUP_CALL(fast_math_tests);
-    JTEST_GROUP_CALL(filtering_tests);
-    JTEST_GROUP_CALL(matrix_tests);
-    JTEST_GROUP_CALL(statistics_tests);
-    JTEST_GROUP_CALL(support_tests);
-    JTEST_GROUP_CALL(transform_tests);
-    JTEST_GROUP_CALL(intrinsics_tests);
+  /*
+    To skip a test, comment it out
+  */
+#if !defined(CUSTOMIZE_TESTS) || defined(ENABLE_BASICMATH_TESTS)
+  JTEST_GROUP_CALL(basic_math_tests);
+#endif 
 
-    return;
+#if !defined(CUSTOMIZE_TESTS) || defined(ENABLE_COMPLEXMATH_TESTS)
+  JTEST_GROUP_CALL(complex_math_tests);
+#endif
+
+#if !defined(CUSTOMIZE_TESTS) || defined(ENABLE_CONTROLLER_TESTS)
+  JTEST_GROUP_CALL(controller_tests);
+#endif
+
+#if !defined(CUSTOMIZE_TESTS) || defined(ENABLE_FASTMATH_TESTS)
+  JTEST_GROUP_CALL(fast_math_tests);
+#endif
+
+#if !defined(CUSTOMIZE_TESTS) || defined(ENABLE_FILTERING_TESTS)
+  /* Biquad df2T_f32 will fail with Neon. The test must be updated.
+  Neon implementation is requiring a different initialization.
+  */
+  JTEST_GROUP_CALL(filtering_tests);
+#endif
+
+#if !defined(CUSTOMIZE_TESTS) || defined(ENABLE_MATRIX_TESTS)
+  JTEST_GROUP_CALL(matrix_tests);
+#endif 
+
+#if !defined(CUSTOMIZE_TESTS) || defined(ENABLE_STATISTICS_TESTS)
+  JTEST_GROUP_CALL(statistics_tests);
+#endif()
+
+#if !defined(CUSTOMIZE_TESTS) || defined(ENABLE_SUPPORT_TESTS)
+  JTEST_GROUP_CALL(support_tests);
+#endif
+
+#if !defined(CUSTOMIZE_TESTS) || defined(ENABLE_TRANSFORM_TESTS)
+  JTEST_GROUP_CALL(transform_tests);
+#endif
+
+#if !defined(CUSTOMIZE_TESTS) || defined(ENABLE_INTRINSICS_TESTS)
+  JTEST_GROUP_CALL(intrinsics_tests);
+#endif
+
+  return;
 }
diff --git a/DSP/DSP_Lib_TestSuite/Common/src/fast_math_tests/fast_math_tests_common_data.c b/DSP/DSP_Lib_TestSuite/Common/src/fast_math_tests/fast_math_tests_common_data.c
index 01dda76..db74d35 100644
--- a/DSP/DSP_Lib_TestSuite/Common/src/fast_math_tests/fast_math_tests_common_data.c
+++ b/DSP/DSP_Lib_TestSuite/Common/src/fast_math_tests/fast_math_tests_common_data.c
@@ -190,175 +190,181 @@
 
 const float32_t fast_math_f32_inputs[FAST_MATH_MAX_LEN] =
 {
-       -1.5E-07, 5.0545058, 6.1958757, 0.1884450, 3.3656774, 0.5471223,
-        -5.0396892, 6.2149808, 0.4206357, 5.9024140, 0.1142128, 4.2966847,
-        -4.9243615, 3.3560853, 5.5628775, 5.6486144, 3.9328821, 0.8662564,
-        -1.3684878, 1.1444261, 0.2627620, 0.6719343, 3.8732286, 5.9040643,
-        -2.2271110, 2.5800587, 6.1848498, 5.9412493, 4.2514839, 6.2096863,
-        -4.8181437, 2.1155439, 4.1618680, 1.5341357, 1.8567268, 4.2736867,
-        -3.3165594, 2.5861183, 3.7864876, 4.7156566, 3.6664471, 3.4670146,
-        -3.6666823, 3.2158594, 0.5189454, 4.5211925, 6.2590334, 2.2276047,
-        -6.1025991, 2.1768018, 5.5703194, 2.8569321, 2.5976403, 1.3680509,
-        -0.7895111, 1.9409676, 4.5622487, 4.9189303, 4.3591961, 0.0615894,
-        -5.2980657, 5.7951829, 4.8440482, 0.2680398, 2.3762136, 4.4254964,
-        -4.5836656, 1.4091744, 1.6905207, 4.2287795, 3.0001720, 3.9189258,
-        -1.4856273, 1.1129014, 5.2128031, 4.8187110, 5.8715002, 0.6778860,
-        -1.1449692, 0.6226340, 3.0772767, 1.2141962, 5.6290528, 0.6225986,
-        -0.2775005, 3.5015887, 4.8537297, 1.9599772, 1.1245801, 2.1297213,
-        -1.3203840, 3.2053828, 5.6948550, 3.9516457, 0.6379562, 2.4558128,
-        -0.3431663, 3.1496534, 2.7125841, 6.2678565, 5.0994494, 3.0514394,
-        -5.6199810, 0.8642307, 2.4504731, 5.8267510, 5.7647838, 4.4835177,
-        3.8851284, 2.1569414, 5.8812331, 0.7839784, 4.5904032, 4.0619375,
-        5.2348483, 2.5024810, 4.7112719, 5.2478452, 2.0260784, 3.4699621,
-        6.1520498, 3.4514073, 2.0761128, 3.8922546, 2.2659464, 4.7532896,
-        2.6006151, 3.0934955, 4.3652005, 6.1118673, 2.0593452, 5.2640727,
-        4.6437278, 5.9952549, 0.2005758, 2.2422740, 4.1635768, 1.7687265,
-        1.4475395, 4.4681525, 3.9243074, 3.7109036, 4.1496541, 0.2987948,
-        2.1914796, 2.8358565, 1.5136507, 4.4927603, 5.3795520, 1.7687650,
-        4.5933278, 0.8655898, 5.2572843, 0.8708603, 3.6958286, 2.3006310,
-        5.0690197, 3.1653480, 3.0762120, 5.5106597, 2.2188555, 2.8239372,
-        6.0540393, 0.2657649, 6.1132775, 1.1888217, 4.1916405, 3.6847088,
-        4.2418564, 2.2683684, 3.8973243, 5.0966113, 0.1209983, 0.5269928,
-        6.1248595, 4.0925498, 1.4529100, 2.5352096, 0.7666775, 1.6866509,
-        1.6200953, 2.0839142, 0.9565145, 2.1865966, 0.7644026, 5.5552975,
-        0.5923686, 5.8436176, 2.5071164, 0.2978322, 2.1511962, 4.6242118,
-        4.9931353, 3.4237447, 4.3116692, 5.6148598, 0.3442670, 1.9079607,
-        0.2902301, 1.2282167, 4.5249352, 4.5349096, 5.5153742, 3.6595342,
-        0.4441228, 5.7977751, 5.0288862, 1.7966571, 3.4159368, 6.1875316,
-        4.4967379, 5.2714014, 2.7222564, 2.9570223, 3.5230663, 1.6907520,
-        4.7062218, 3.1660203, 4.0640250, 1.9336225, 0.8716326, 2.9881129,
-        2.2773988, 4.9518627, 4.9027432, 4.2003861, 0.8388295, 0.1354396,
-        3.5175829, 1.8901016, 5.9024853, 6.1631993, 1.8008890, 5.0317023,
-        5.6304337, 3.7543702, 5.5544410, 5.9296402, 3.4504620, 4.5765894,
-        3.6238793, 0.1624673, 2.8056369, 4.0608350, 3.2748147, 2.3393094,
-        5.8881908, 5.2121085, 5.3349614, 2.3407017, 3.7270886, 5.4824095,
-        5.8653636, 4.2000849, 1.2992148, 4.1082644, 0.4527132, 2.5555406,
-        4.1904544, 5.8667713, 5.0953493, 3.0445066, 4.7547955, 2.6203864,
-        6.1059115, 6.2076281, 5.4295991, 2.4434288, 2.8572272, 1.5499814,
-        4.9286757, 5.5470323, 5.7410198, 3.5078076, 3.7627993, 0.9354200,
-        5.6530665, 2.8299063, 1.2922774, 5.6526739, 4.7914663, 5.5448250,
-        1.7903950, 4.2300036, 4.1737937, 0.7716694, 2.5592571, 1.7296789,
-        4.5029688, 1.7805566, 5.6309835, 5.1935484, 2.4506089, 3.1284165,
-        4.3655898, 5.2424950, 3.8304163, 3.6111801, 2.0485834, 2.8678003,
-        4.4849099, 5.5568808, 4.5292698, 0.1169475, 4.2397456, 2.7552322,
-        2.7509053, 0.7353640, 5.1187960, 2.0411269, 1.5470969, 2.1533307,
-        2.3605433, 3.4340988, 3.5306485, 2.4870244, 2.5015301, 3.2381477,
-        4.1313862, 5.9747764, 4.5386496, 2.5137752, 5.2268018, 0.8440727,
-        0.3799239, 0.5293398, 0.0000000, 2.0371338, 1.8958053, 0.0733938,
-        3.3923238, 0.5992443, 0.9205800, 3.9655772, 5.3992694, 6.1212150,
-        3.5866836, 6.2633946, 3.4780043, 3.2387210, 2.0777367, 2.7017810,
-        3.0901098, 0.4463392, 5.5778300, 0.4061048, 2.7406309, 5.1938664,
-        2.4789345, 3.8545764, 5.1436714, 5.5683790, 5.8503469, 1.1987353,
-        1.6247202, 5.6414565, 3.7282025, 3.1657206, 3.8503962, 5.1485818,
-        3.3419582, 1.2696753, 2.8518968, 2.6886436, 6.0698884, 3.8959208,
-        4.3692639, 4.5249277, 2.1796068, 3.2483466, 3.4978155, 0.9832885,
-        3.5315023, 4.3655778, 2.6794992, 5.2544420, 4.5954405, 2.2621418,
-        2.8539005, 2.4277593, 4.8729535, 4.6135614, 2.7035154, 4.3589760,
-        5.9389515, 4.9274787, 4.4332387, 0.6869673, 2.4500066, 3.7127639,
-        2.8863700, 0.3162955, 1.4368865, 5.2413645, 0.0982985, 5.4268554,
-        0.4905223, 4.2037186, 3.1429204, 1.3696954, 3.5915675, 0.7677371,
-        4.2170618, 3.7673071, 0.3517086, 0.3540136, 0.9581898, 0.1232828,
-        2.7342886, 5.2290017, 3.8791769, 3.2680695, 5.4278441, 0.6138541,
-        5.7054603, 0.6786889, 3.2483864, 0.8994758, 3.5146290, 0.0287746,
-        4.8172051, 5.3325973, 5.7605579, 6.2013046, 3.1738449, 1.7053924,
-        0.6330341, 3.1909083, 3.6794907, 4.7933610, 0.5212697, 4.1569315,
-        3.2482749, 1.0747264, 5.8971330, 3.7101152, 2.7685894, 5.9182512,
-        4.1212281, 2.8396586, 5.2759745, 3.3465722, 3.4801751, 4.2729777,
-        2.3071222, 1.5035072, 3.6374836, 5.4468120, 2.5558538, 0.7075818,
-        2.7887656, 1.8861142, 2.5219880, 5.2361777, 2.5360737, 2.4515477,
-        2.2647672, 0.8812504, 1.6344462, 0.5454754, 2.6979830, 1.6165554,
-        1.8695956, 2.6694641, 0.7490013, 3.1105972, 4.4384875, 1.5304166,
-        4.9327408, 0.4655185, 2.4748426, 0.0213259, 1.3865538, 0.0081717,
-        1.1886509, 0.8952537, 1.6843712, 1.0988793, 0.8711572, 3.7629093,
-        5.6615138, 5.9022971, 1.3897429, 3.0327137, 2.3625475, 3.2910070,
-        1.6642436, 0.4295011, 2.7415239, 1.0923508, 0.1640358, 5.9984205,
-        2.7055177, 6.0416507, 4.7903915, 0.0461730, 4.2728088, 4.4356194,
-        4.0534637, 3.4702651, 1.3704176, 4.8529200, 1.4327442, 2.3302118,
-        5.5978709, 5.3807748, 2.5285646, 1.9981730, 3.8241692, 5.7189253,
-        5.7120324, 3.7170973, 2.0896078, 5.3599569, 2.7796679, 5.6822331,
-        0.2084724, 3.3453343, 4.5018856, 1.1265867, 2.1144987, 1.1794352,
-        2.0227281, 2.5375066, 3.4467437, 0.3062336, 3.4729184, 1.7266910,
-        1.5174002, 1.5277262, 0.9686124, 6.0093412, 5.8789338, 5.1441345,
-        4.5758041, 1.1046577, 2.2642776, 1.1862024, 0.0075297, 1.9881224,
-        4.3958232, 3.9285942, 3.4121603, 2.7585521, 1.8059588, 3.1520171,
-        4.7849358, 4.7903511, 3.6194660, 4.6977042, 4.0560129, 0.7742111,
-        3.1692252, 2.1819072, 0.5789810, 0.9289656, 1.2451370, 4.2239985,
-        2.7112647, 4.3630684, 1.6134250, 0.0613154, 3.3444332, 1.7554715,
-        5.9453394, 5.6953510, 2.4673100, 0.1561700, 4.2187618, 5.2600982,
-        6.1041123, 0.3577199, 2.8294680, 3.6597688, 4.3142726, 4.5203293,
-        4.0843265, 4.5673388, 2.3489542, 3.6541880, 0.7295941, 0.3622530,
-        6.1560465, 1.7896003, 3.7383338, 6.0454361, 1.1672793, 1.2129049,
-        2.1466132, 5.8615704, 2.4546365, 1.7166712, 0.9547117, 2.4951084,
-        2.3544507, 0.8238180, 2.7334414, 0.5749942, 3.8618151, 0.0689837,
-        3.6019012, 4.9620190, 1.4788531, 2.8149909, 3.5773830, 0.3857966,
-        3.1182750, 4.0357856, 1.3902536, 5.2593808, 6.1014456, 5.3179177,
-        3.1792883, 1.7522271, 4.6911344, 1.4886775, 6.0151778, 3.8972087,
-        3.7715583, 1.0845061, 0.5676653, 1.6038597, 5.3945577, 5.7244031,
-        4.3959286, 4.5564551, 1.4444168, 3.6194506, 5.0933266, 2.5374227,
-        6.2105471, 0.5654792, 2.0165320, 3.2132771, 0.3808010, 4.5596317,
-        3.4969429, 3.3260664, 5.2149334, 5.3957421, 4.9576149, 1.9970040,
-        2.8413032, 4.7263877, 0.6902815, 0.6895316, 1.6957291, 3.2963937,
-        6.1113470, 4.4636294, 1.9594738, 1.8312791, 5.3429527, 5.7280497,
-        4.0166905, 1.6045389, 0.5571039, 5.2669152, 3.6738954, 5.9571429,
-        0.3834561, 3.6734096, 1.7913869, 5.2007946, 1.2000032, 2.7804978,
-        2.4718774, 5.1935175, 4.2529065, 1.3044083, 1.9987109, 0.8407592,
-        4.2189258, 3.5876427, 1.0666779, 0.9277486, 2.9912971, 5.7057758,
-        3.4694180, 0.2069675, 0.3384307, 5.0583614, 2.8360719, 2.4042372,
-        4.9614777, 2.2888819, 3.3448533, 4.4714710, 5.4756485, 2.0652177,
-        4.0848120, 6.1250762, 0.4773170, 3.6883502, 2.6005256, 1.9423615,
-        1.6577182, 4.7674690, 6.2531264, 1.1722630, 4.9080805, 1.2302350,
-        6.2351753, 5.0407581, 2.6654950, 4.5795867, 3.1312479, 5.0830358,
-        2.2400117, 0.4602021, 3.7133088, 5.7188788, 1.2174673, 2.7166470,
-        4.7071094, 0.2462034, 5.9459353, 4.7983010, 3.5111731, 1.1551193,
-        3.1287047, 3.2537199, 6.2470131, 5.3711915, 6.0469623, 4.2659122,
-        2.5352740, 5.8746469, 3.0126903, 1.4563896, 2.4899651, 4.4301324,
-        3.5095299, 4.7540509, 6.2547920, 6.0471349, 3.3619258, 6.0561746,
-        0.7264988, 0.3232592, 1.9122808, 3.6454528, 3.3361480, 5.6624574,
-        3.3963785, 2.7142142, 3.4096772, 4.4762342, 0.1047703, 5.0323343,
-        0.8954125, 3.0063438, 1.6137441, 2.3190715, 4.1579916, 1.0656836,
-        1.7516517, 1.2454643, 1.2256706, 2.0535941, 5.5313259, 2.9600203,
-        2.5382144, 1.1261446, 6.0879353, 2.5601199, 5.3060708, 3.8662016,
-        2.3663172, 5.5114955, 4.9313732, 2.9213939, 5.1143679, 5.6450910,
-        2.6969853, 2.1006537, 3.7488443, 5.6673754, 4.4112136, 2.3716204,
-        4.6178643, 5.9948046, 3.4105954, 3.3935850, 1.9547595, 0.4475800,
-        1.1434170, 0.5842667, 2.9121888, 0.0586379, 5.7492774, 4.0384655,
-        0.0089162, 0.1909163, 1.3098570, 2.8586366, 0.7996361, 0.0543350,
-        4.5683759, 2.2249794, 4.9036865, 2.7435946, 2.7429546, 0.3092155,
-        0.3118464, 0.5723993, 3.7324447, 1.5147758, 5.2864780, 5.3860266,
-        6.0545540, 3.0718480, 1.3842492, 1.4213108, 3.3727372, 4.7884765,
-        2.1838288, 2.8980046, 4.0169897, 5.7637923, 1.0151904, 4.4964699,
-        3.6300404, 2.7224978, 5.5558613, 2.4696170, 1.1245340, 3.9793522,
-        3.9207111, 2.0605178, 5.0451799, 6.2799046, 6.1636676, 0.7981966,
-        1.4592079, 0.1484872, 3.8166117, 0.6962355, 2.5601436, 5.5548184,
-        3.4440198, 2.3185147, 1.3090764, 2.7705283, 6.0079576, 0.7792778,
-        2.9578927, 5.3840384, 0.2726304, 4.3456090, 6.1511471, 1.7798247,
-        0.8405677, 4.3057392, 5.7142715, 3.8382030, 5.6547587, 1.2153801,
-        4.7401894, 2.1756202, 2.6303011, 0.9784166, 5.1459324, 3.9265103,
-        4.6405120, 5.0586705, 0.4223724, 5.9739917, 3.1263686, 4.7447217,
-        4.6646686, 5.2221411, 0.9833301, 2.8733554, 3.8836400, 5.8570808,
-       -5.2470141, 5.6261119, 3.6600718, 3.6615062, 5.3716581, 0.2190677,
-       -5.5632585, 2.5618482, 0.2285950, 4.6881858, 0.9728179, 0.9042027,
-       -3.8073530, 1.5989503, 2.0367209, 2.5245268, 2.5533189, 2.4265105,
-       -3.8314979, 1.0486053, 1.1818174, 0.5945707, 2.0306392, 4.8355201,
-       -1.4710068, 4.6518534, 4.3531065, 5.1778361, 5.2023364, 1.8432851,
-       -1.9438243, 3.2862931, 2.0439139, 5.2266206, 5.0912323, 3.4997233,
-       -1.6522518, 4.2761236, 1.4680860, 2.8678051, 2.4163051, 3.3841326,
-       -6.2310582, 4.7451897, 6.1603795, 1.4751828, 3.3210347, 0.3231823,
-       -4.7555888, 3.7823504, 5.3857498, 6.2095284, 5.8401232, 2.5730582,
-       -0.0021455, 3.3984387, 1.3052100, 1.3777994, 2.0471011, 0.6028680,
-       -4.6968925, 4.7030205, 3.4136510, 2.1245480, 5.2297066, 3.4719134,
-       -6.0164208, 5.6098372, 2.2399783, 3.4331443, 2.1782657, 3.9131853,
-       -5.0053405, 4.6864702, 0.7887674, 5.1672539, 0.1580253, 2.6039335,
-       -4.5955687, 4.9095176, 2.3077255, 4.6801428, 5.6062801, 1.5243220,
-       -0.8142818, 1.4141432, 2.1992023, 1.8038058, 5.8275790, 0.3224138,
-       -3.7238350, 1.0235240, 5.2678588, 1.0528164, 3.1554195, 6.2789723,
-       -2.2330890, 0.2957980, 1.3424690, 2.4996969, 2.0964990, 1.4426353,
-       -5.8818165, 4.2926017, 6.0451393, 2.7518666, 5.9083095, 0.0366581,
-       -3.8346722, 5.0333074, 1.4638661, 5.8588735, 4.7957215, 5.1927356,
-       -3.6031780, 4.9799375, 2.0674268, 1.4040530, 1.9627813, 3.6726693,
-       -5.2145043, 1.8250297, 2.5293238, 5.4164658, 3.8625225, 6.2278165,
-       -1.2798778, 5.1975080, 4.2465638, 1.5641957, 2.9894493, 2.5074636,
-       -3.7663816, 5.0298329, 0.6601666, 5.1612735, 5.2847013, 2.2274284,
-       -2.7022061, 3.5954850, 4.4034117, 4.6650751, 4.7619266, 2.4449681,
-       -2.6973871, 6.0088907, 3.6000853, 5.3389611
+    /* Special values close to increments of pi/2 */
+    -0.0,       0.0,        -1.5E-07,   1.5E-07,    1.5707964,  1.5707965,
+    -1.5707964, -1.5707965, 3.1415925,  3.1415927,  -3.1415925, -3.1415927, 
+    6.2831855,  6.283186,   -6.2831855, -6.283186, 
+
+    /* Test some slightly larger values too */
+    10.1,       -13.2,
+
+    /* Random values (0, 2pi) */
+    -1.3684878, 1.1444261, 0.2627620, 0.6719343, 3.8732286, 5.9040643,
+    -2.2271110, 2.5800587, 6.1848498, 5.9412493, 4.2514839, 6.2096863,
+    -4.8181437, 2.1155439, 4.1618680, 1.5341357, 1.8567268, 4.2736867,
+    -3.3165594, 2.5861183, 3.7864876, 4.7156566, 3.6664471, 3.4670146,
+    -3.6666823, 3.2158594, 0.5189454, 4.5211925, 6.2590334, 2.2276047,
+    -6.1025991, 2.1768018, 5.5703194, 2.8569321, 2.5976403, 1.3680509,
+    -0.7895111, 1.9409676, 4.5622487, 4.9189303, 4.3591961, 0.0615894,
+    -5.2980657, 5.7951829, 4.8440482, 0.2680398, 2.3762136, 4.4254964,
+    -4.5836656, 1.4091744, 1.6905207, 4.2287795, 3.0001720, 3.9189258,
+    -1.4856273, 1.1129014, 5.2128031, 4.8187110, 5.8715002, 0.6778860,
+    -1.1449692, 0.6226340, 3.0772767, 1.2141962, 5.6290528, 0.6225986,
+    -0.2775005, 3.5015887, 4.8537297, 1.9599772, 1.1245801, 2.1297213,
+    -1.3203840, 3.2053828, 5.6948550, 3.9516457, 0.6379562, 2.4558128,
+    -0.3431663, 3.1496534, 2.7125841, 6.2678565, 5.0994494, 3.0514394,
+    -5.6199810, 0.8642307, 2.4504731, 5.8267510, 5.7647838, 4.4835177,
+    3.8851284, 2.1569414, 5.8812331, 0.7839784, 4.5904032, 4.0619375,
+    5.2348483, 2.5024810, 4.7112719, 5.2478452, 2.0260784, 3.4699621,
+    6.1520498, 3.4514073, 2.0761128, 3.8922546, 2.2659464, 4.7532896,
+    2.6006151, 3.0934955, 4.3652005, 6.1118673, 2.0593452, 5.2640727,
+    4.6437278, 5.9952549, 0.2005758, 2.2422740, 4.1635768, 1.7687265,
+    1.4475395, 4.4681525, 3.9243074, 3.7109036, 4.1496541, 0.2987948,
+    2.1914796, 2.8358565, 1.5136507, 4.4927603, 5.3795520, 1.7687650,
+    4.5933278, 0.8655898, 5.2572843, 0.8708603, 3.6958286, 2.3006310,
+    5.0690197, 3.1653480, 3.0762120, 5.5106597, 2.2188555, 2.8239372,
+    6.0540393, 0.2657649, 6.1132775, 1.1888217, 4.1916405, 3.6847088,
+    4.2418564, 2.2683684, 3.8973243, 5.0966113, 0.1209983, 0.5269928,
+    6.1248595, 4.0925498, 1.4529100, 2.5352096, 0.7666775, 1.6866509,
+    1.6200953, 2.0839142, 0.9565145, 2.1865966, 0.7644026, 5.5552975,
+    0.5923686, 5.8436176, 2.5071164, 0.2978322, 2.1511962, 4.6242118,
+    4.9931353, 3.4237447, 4.3116692, 5.6148598, 0.3442670, 1.9079607,
+    0.2902301, 1.2282167, 4.5249352, 4.5349096, 5.5153742, 3.6595342,
+    0.4441228, 5.7977751, 5.0288862, 1.7966571, 3.4159368, 6.1875316,
+    4.4967379, 5.2714014, 2.7222564, 2.9570223, 3.5230663, 1.6907520,
+    4.7062218, 3.1660203, 4.0640250, 1.9336225, 0.8716326, 2.9881129,
+    2.2773988, 4.9518627, 4.9027432, 4.2003861, 0.8388295, 0.1354396,
+    3.5175829, 1.8901016, 5.9024853, 6.1631993, 1.8008890, 5.0317023,
+    5.6304337, 3.7543702, 5.5544410, 5.9296402, 3.4504620, 4.5765894,
+    3.6238793, 0.1624673, 2.8056369, 4.0608350, 3.2748147, 2.3393094,
+    5.8881908, 5.2121085, 5.3349614, 2.3407017, 3.7270886, 5.4824095,
+    5.8653636, 4.2000849, 1.2992148, 4.1082644, 0.4527132, 2.5555406,
+    4.1904544, 5.8667713, 5.0953493, 3.0445066, 4.7547955, 2.6203864,
+    6.1059115, 6.2076281, 5.4295991, 2.4434288, 2.8572272, 1.5499814,
+    4.9286757, 5.5470323, 5.7410198, 3.5078076, 3.7627993, 0.9354200,
+    5.6530665, 2.8299063, 1.2922774, 5.6526739, 4.7914663, 5.5448250,
+    1.7903950, 4.2300036, 4.1737937, 0.7716694, 2.5592571, 1.7296789,
+    4.5029688, 1.7805566, 5.6309835, 5.1935484, 2.4506089, 3.1284165,
+    4.3655898, 5.2424950, 3.8304163, 3.6111801, 2.0485834, 2.8678003,
+    4.4849099, 5.5568808, 4.5292698, 0.1169475, 4.2397456, 2.7552322,
+    2.7509053, 0.7353640, 5.1187960, 2.0411269, 1.5470969, 2.1533307,
+    2.3605433, 3.4340988, 3.5306485, 2.4870244, 2.5015301, 3.2381477,
+    4.1313862, 5.9747764, 4.5386496, 2.5137752, 5.2268018, 0.8440727,
+    0.3799239, 0.5293398, 0.0000000, 2.0371338, 1.8958053, 0.0733938,
+    3.3923238, 0.5992443, 0.9205800, 3.9655772, 5.3992694, 6.1212150,
+    3.5866836, 6.2633946, 3.4780043, 3.2387210, 2.0777367, 2.7017810,
+    3.0901098, 0.4463392, 5.5778300, 0.4061048, 2.7406309, 5.1938664,
+    2.4789345, 3.8545764, 5.1436714, 5.5683790, 5.8503469, 1.1987353,
+    1.6247202, 5.6414565, 3.7282025, 3.1657206, 3.8503962, 5.1485818,
+    3.3419582, 1.2696753, 2.8518968, 2.6886436, 6.0698884, 3.8959208,
+    4.3692639, 4.5249277, 2.1796068, 3.2483466, 3.4978155, 0.9832885,
+    3.5315023, 4.3655778, 2.6794992, 5.2544420, 4.5954405, 2.2621418,
+    2.8539005, 2.4277593, 4.8729535, 4.6135614, 2.7035154, 4.3589760,
+    5.9389515, 4.9274787, 4.4332387, 0.6869673, 2.4500066, 3.7127639,
+    2.8863700, 0.3162955, 1.4368865, 5.2413645, 0.0982985, 5.4268554,
+    0.4905223, 4.2037186, 3.1429204, 1.3696954, 3.5915675, 0.7677371,
+    4.2170618, 3.7673071, 0.3517086, 0.3540136, 0.9581898, 0.1232828,
+    2.7342886, 5.2290017, 3.8791769, 3.2680695, 5.4278441, 0.6138541,
+    5.7054603, 0.6786889, 3.2483864, 0.8994758, 3.5146290, 0.0287746,
+    4.8172051, 5.3325973, 5.7605579, 6.2013046, 3.1738449, 1.7053924,
+    0.6330341, 3.1909083, 3.6794907, 4.7933610, 0.5212697, 4.1569315,
+    3.2482749, 1.0747264, 5.8971330, 3.7101152, 2.7685894, 5.9182512,
+    4.1212281, 2.8396586, 5.2759745, 3.3465722, 3.4801751, 4.2729777,
+    2.3071222, 1.5035072, 3.6374836, 5.4468120, 2.5558538, 0.7075818,
+    2.7887656, 1.8861142, 2.5219880, 5.2361777, 2.5360737, 2.4515477,
+    2.2647672, 0.8812504, 1.6344462, 0.5454754, 2.6979830, 1.6165554,
+    1.8695956, 2.6694641, 0.7490013, 3.1105972, 4.4384875, 1.5304166,
+    4.9327408, 0.4655185, 2.4748426, 0.0213259, 1.3865538, 0.0081717,
+    1.1886509, 0.8952537, 1.6843712, 1.0988793, 0.8711572, 3.7629093,
+    5.6615138, 5.9022971, 1.3897429, 3.0327137, 2.3625475, 3.2910070,
+    1.6642436, 0.4295011, 2.7415239, 1.0923508, 0.1640358, 5.9984205,
+    2.7055177, 6.0416507, 4.7903915, 0.0461730, 4.2728088, 4.4356194,
+    4.0534637, 3.4702651, 1.3704176, 4.8529200, 1.4327442, 2.3302118,
+    5.5978709, 5.3807748, 2.5285646, 1.9981730, 3.8241692, 5.7189253,
+    5.7120324, 3.7170973, 2.0896078, 5.3599569, 2.7796679, 5.6822331,
+    0.2084724, 3.3453343, 4.5018856, 1.1265867, 2.1144987, 1.1794352,
+    2.0227281, 2.5375066, 3.4467437, 0.3062336, 3.4729184, 1.7266910,
+    1.5174002, 1.5277262, 0.9686124, 6.0093412, 5.8789338, 5.1441345,
+    4.5758041, 1.1046577, 2.2642776, 1.1862024, 0.0075297, 1.9881224,
+    4.3958232, 3.9285942, 3.4121603, 2.7585521, 1.8059588, 3.1520171,
+    4.7849358, 4.7903511, 3.6194660, 4.6977042, 4.0560129, 0.7742111,
+    3.1692252, 2.1819072, 0.5789810, 0.9289656, 1.2451370, 4.2239985,
+    2.7112647, 4.3630684, 1.6134250, 0.0613154, 3.3444332, 1.7554715,
+    5.9453394, 5.6953510, 2.4673100, 0.1561700, 4.2187618, 5.2600982,
+    6.1041123, 0.3577199, 2.8294680, 3.6597688, 4.3142726, 4.5203293,
+    4.0843265, 4.5673388, 2.3489542, 3.6541880, 0.7295941, 0.3622530,
+    6.1560465, 1.7896003, 3.7383338, 6.0454361, 1.1672793, 1.2129049,
+    2.1466132, 5.8615704, 2.4546365, 1.7166712, 0.9547117, 2.4951084,
+    2.3544507, 0.8238180, 2.7334414, 0.5749942, 3.8618151, 0.0689837,
+    3.6019012, 4.9620190, 1.4788531, 2.8149909, 3.5773830, 0.3857966,
+    3.1182750, 4.0357856, 1.3902536, 5.2593808, 6.1014456, 5.3179177,
+    3.1792883, 1.7522271, 4.6911344, 1.4886775, 6.0151778, 3.8972087,
+    3.7715583, 1.0845061, 0.5676653, 1.6038597, 5.3945577, 5.7244031,
+    4.3959286, 4.5564551, 1.4444168, 3.6194506, 5.0933266, 2.5374227,
+    6.2105471, 0.5654792, 2.0165320, 3.2132771, 0.3808010, 4.5596317,
+    3.4969429, 3.3260664, 5.2149334, 5.3957421, 4.9576149, 1.9970040,
+    2.8413032, 4.7263877, 0.6902815, 0.6895316, 1.6957291, 3.2963937,
+    6.1113470, 4.4636294, 1.9594738, 1.8312791, 5.3429527, 5.7280497,
+    4.0166905, 1.6045389, 0.5571039, 5.2669152, 3.6738954, 5.9571429,
+    0.3834561, 3.6734096, 1.7913869, 5.2007946, 1.2000032, 2.7804978,
+    2.4718774, 5.1935175, 4.2529065, 1.3044083, 1.9987109, 0.8407592,
+    4.2189258, 3.5876427, 1.0666779, 0.9277486, 2.9912971, 5.7057758,
+    3.4694180, 0.2069675, 0.3384307, 5.0583614, 2.8360719, 2.4042372,
+    4.9614777, 2.2888819, 3.3448533, 4.4714710, 5.4756485, 2.0652177,
+    4.0848120, 6.1250762, 0.4773170, 3.6883502, 2.6005256, 1.9423615,
+    1.6577182, 4.7674690, 6.2531264, 1.1722630, 4.9080805, 1.2302350,
+    6.2351753, 5.0407581, 2.6654950, 4.5795867, 3.1312479, 5.0830358,
+    2.2400117, 0.4602021, 3.7133088, 5.7188788, 1.2174673, 2.7166470,
+    4.7071094, 0.2462034, 5.9459353, 4.7983010, 3.5111731, 1.1551193,
+    3.1287047, 3.2537199, 6.2470131, 5.3711915, 6.0469623, 4.2659122,
+    2.5352740, 5.8746469, 3.0126903, 1.4563896, 2.4899651, 4.4301324,
+    3.5095299, 4.7540509, 6.2547920, 6.0471349, 3.3619258, 6.0561746,
+    0.7264988, 0.3232592, 1.9122808, 3.6454528, 3.3361480, 5.6624574,
+    3.3963785, 2.7142142, 3.4096772, 4.4762342, 0.1047703, 5.0323343,
+    0.8954125, 3.0063438, 1.6137441, 2.3190715, 4.1579916, 1.0656836,
+    1.7516517, 1.2454643, 1.2256706, 2.0535941, 5.5313259, 2.9600203,
+    2.5382144, 1.1261446, 6.0879353, 2.5601199, 5.3060708, 3.8662016,
+    2.3663172, 5.5114955, 4.9313732, 2.9213939, 5.1143679, 5.6450910,
+    2.6969853, 2.1006537, 3.7488443, 5.6673754, 4.4112136, 2.3716204,
+    4.6178643, 5.9948046, 3.4105954, 3.3935850, 1.9547595, 0.4475800,
+    1.1434170, 0.5842667, 2.9121888, 0.0586379, 5.7492774, 4.0384655,
+    0.0089162, 0.1909163, 1.3098570, 2.8586366, 0.7996361, 0.0543350,
+    4.5683759, 2.2249794, 4.9036865, 2.7435946, 2.7429546, 0.3092155,
+    0.3118464, 0.5723993, 3.7324447, 1.5147758, 5.2864780, 5.3860266,
+    6.0545540, 3.0718480, 1.3842492, 1.4213108, 3.3727372, 4.7884765,
+    2.1838288, 2.8980046, 4.0169897, 5.7637923, 1.0151904, 4.4964699,
+    3.6300404, 2.7224978, 5.5558613, 2.4696170, 1.1245340, 3.9793522,
+    3.9207111, 2.0605178, 5.0451799, 6.2799046, 6.1636676, 0.7981966,
+    1.4592079, 0.1484872, 3.8166117, 0.6962355, 2.5601436, 5.5548184,
+    3.4440198, 2.3185147, 1.3090764, 2.7705283, 6.0079576, 0.7792778,
+    2.9578927, 5.3840384, 0.2726304, 4.3456090, 6.1511471, 1.7798247,
+    0.8405677, 4.3057392, 5.7142715, 3.8382030, 5.6547587, 1.2153801,
+    4.7401894, 2.1756202, 2.6303011, 0.9784166, 5.1459324, 3.9265103,
+    4.6405120, 5.0586705, 0.4223724, 5.9739917, 3.1263686, 4.7447217,
+    4.6646686, 5.2221411, 0.9833301, 2.8733554, 3.8836400, 5.8570808,
+    -5.2470141, 5.6261119, 3.6600718, 3.6615062, 5.3716581, 0.2190677,
+    -5.5632585, 2.5618482, 0.2285950, 4.6881858, 0.9728179, 0.9042027,
+    -3.8073530, 1.5989503, 2.0367209, 2.5245268, 2.5533189, 2.4265105,
+    -3.8314979, 1.0486053, 1.1818174, 0.5945707, 2.0306392, 4.8355201,
+    -1.4710068, 4.6518534, 4.3531065, 5.1778361, 5.2023364, 1.8432851,
+    -1.9438243, 3.2862931, 2.0439139, 5.2266206, 5.0912323, 3.4997233,
+    -1.6522518, 4.2761236, 1.4680860, 2.8678051, 2.4163051, 3.3841326,
+    -6.2310582, 4.7451897, 6.1603795, 1.4751828, 3.3210347, 0.3231823,
+    -4.7555888, 3.7823504, 5.3857498, 6.2095284, 5.8401232, 2.5730582,
+    -0.0021455, 3.3984387, 1.3052100, 1.3777994, 2.0471011, 0.6028680,
+    -4.6968925, 4.7030205, 3.4136510, 2.1245480, 5.2297066, 3.4719134,
+    -6.0164208, 5.6098372, 2.2399783, 3.4331443, 2.1782657, 3.9131853,
+    -5.0053405, 4.6864702, 0.7887674, 5.1672539, 0.1580253, 2.6039335,
+    -4.5955687, 4.9095176, 2.3077255, 4.6801428, 5.6062801, 1.5243220,
+    -0.8142818, 1.4141432, 2.1992023, 1.8038058, 5.8275790, 0.3224138,
+    -3.7238350, 1.0235240, 5.2678588, 1.0528164, 3.1554195, 6.2789723,
+    -2.2330890, 0.2957980, 1.3424690, 2.4996969, 2.0964990, 1.4426353,
+    -5.8818165, 4.2926017, 6.0451393, 2.7518666, 5.9083095, 0.0366581,
+    -3.8346722, 5.0333074, 1.4638661, 5.8588735, 4.7957215, 5.1927356,
+    -3.6031780, 4.9799375, 2.0674268, 1.4040530, 1.9627813, 3.6726693,
+    -5.2145043, 1.8250297, 2.5293238, 5.4164658, 3.8625225, 6.2278165,
+    -1.2798778, 5.1975080, 4.2465638, 1.5641957, 2.9894493, 2.5074636,
+    -3.7663816, 5.0298329, 0.6601666, 5.1612735, 5.2847013, 2.2274284,
+    -2.7022061, 3.5954850, 4.4034117, 4.6650751, 4.7619266, 2.4449681,
+    -2.6973871, 6.0088907, 3.6000853, 5.3389611
 };
diff --git a/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/conv_tests.c b/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/conv_tests.c
index fc45819..981004b 100644
--- a/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/conv_tests.c
+++ b/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/conv_tests.c
@@ -442,32 +442,32 @@
 
 JTEST_DEFINE_GROUP(conv_tests)
 {
-    /*
-      To skip a test, comment it out.
-    */
-    JTEST_TEST_CALL(arm_conv_f32_tests);
-    JTEST_TEST_CALL(arm_conv_q31_tests);
-    JTEST_TEST_CALL(arm_conv_q15_tests);
-    JTEST_TEST_CALL(arm_conv_q7_tests);
+  /*
+    To skip a test, comment it out.
+  */
+  JTEST_TEST_CALL(arm_conv_f32_tests);
+  JTEST_TEST_CALL(arm_conv_q31_tests);
+  JTEST_TEST_CALL(arm_conv_q15_tests);
+  JTEST_TEST_CALL(arm_conv_q7_tests);
 
-    JTEST_TEST_CALL(arm_conv_opt_q15_tests);
-    JTEST_TEST_CALL(arm_conv_opt_q7_tests);
+  JTEST_TEST_CALL(arm_conv_opt_q15_tests);
+  JTEST_TEST_CALL(arm_conv_opt_q7_tests);
 
-    JTEST_TEST_CALL(arm_conv_fast_q31_tests);
-    JTEST_TEST_CALL(arm_conv_fast_q15_tests);
+  JTEST_TEST_CALL(arm_conv_fast_q31_tests);
+  JTEST_TEST_CALL(arm_conv_fast_q15_tests);
 
-    JTEST_TEST_CALL(arm_conv_fast_opt_q15_tests);
+  JTEST_TEST_CALL(arm_conv_fast_opt_q15_tests);
 
-    JTEST_TEST_CALL(arm_conv_partial_f32_tests);
-    JTEST_TEST_CALL(arm_conv_partial_q31_tests);
-    JTEST_TEST_CALL(arm_conv_partial_q15_tests);
-    JTEST_TEST_CALL(arm_conv_partial_q7_tests);
+  JTEST_TEST_CALL(arm_conv_partial_f32_tests);
+  JTEST_TEST_CALL(arm_conv_partial_q31_tests);
+  JTEST_TEST_CALL(arm_conv_partial_q15_tests);
+  JTEST_TEST_CALL(arm_conv_partial_q7_tests);
 
-    JTEST_TEST_CALL(arm_conv_partial_fast_q31_tests);
-    JTEST_TEST_CALL(arm_conv_partial_fast_q15_tests);
+  JTEST_TEST_CALL(arm_conv_partial_fast_q31_tests);
+  JTEST_TEST_CALL(arm_conv_partial_fast_q15_tests);
 
-    JTEST_TEST_CALL(arm_conv_partial_fast_opt_q15_tests);
+  JTEST_TEST_CALL(arm_conv_partial_fast_opt_q15_tests);
 
-    JTEST_TEST_CALL(arm_conv_partial_opt_q15_tests);
-    JTEST_TEST_CALL(arm_conv_partial_opt_q7_tests);
+  JTEST_TEST_CALL(arm_conv_partial_opt_q15_tests);
+  JTEST_TEST_CALL(arm_conv_partial_opt_q7_tests);
 }
diff --git a/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/filtering_test_common_data.c b/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/filtering_test_common_data.c
index 49c4eb7..0fc4178 100644
--- a/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/filtering_test_common_data.c
+++ b/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/filtering_test_common_data.c
@@ -10,7 +10,7 @@
 float32_t filtering_output_f32_fut[LMS_MAX_BLOCKSIZE*2] = {0};
 float32_t filtering_output_f32_ref[LMS_MAX_BLOCKSIZE*2] = {0};
 float32_t filtering_input_lms[LMS_MAX_BLOCKSIZE*2] = {0};
-float32_t filtering_pState[LMS_MAX_BLOCKSIZE + FILTERING_MAX_NUMTAPS] = {0};
+__ALIGNED(8) float32_t filtering_pState[LMS_MAX_BLOCKSIZE + FILTERING_MAX_NUMTAPS] = {0};
 float32_t filtering_scratch[FILTERING_MAX_BLOCKSIZE * 3] = {0};
 float32_t filtering_scratch2[FILTERING_MAX_BLOCKSIZE * 3] = {0};
 float32_t filtering_coeffs_lms[FILTERING_MAX_NUMTAPS];
diff --git a/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/filtering_test_group.c b/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/filtering_test_group.c
index 7132556..453bad6 100644
--- a/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/filtering_test_group.c
+++ b/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/filtering_test_group.c
@@ -3,15 +3,15 @@
 
 JTEST_DEFINE_GROUP(filtering_tests)
 {
-    /*
-      To skip a test, comment it out.
-    */
-    JTEST_GROUP_CALL(biquad_tests);
-    JTEST_GROUP_CALL(conv_tests);
-    JTEST_GROUP_CALL(correlate_tests);
-    JTEST_GROUP_CALL(fir_tests);
-    JTEST_GROUP_CALL(iir_tests);
-    JTEST_GROUP_CALL(lms_tests);
+  /*
+    To skip a test, comment it out.
+  */
+  JTEST_GROUP_CALL(biquad_tests);
+  JTEST_GROUP_CALL(conv_tests);
+  JTEST_GROUP_CALL(correlate_tests);
+  JTEST_GROUP_CALL(fir_tests);
+  JTEST_GROUP_CALL(iir_tests);
+  JTEST_GROUP_CALL(lms_tests);
 
-    return;
+  return;
 }
diff --git a/DSP/DSP_Lib_TestSuite/Common/src/main.c b/DSP/DSP_Lib_TestSuite/Common/src/main.c
index 8dd4b40..a41de7d 100644
--- a/DSP/DSP_Lib_TestSuite/Common/src/main.c
+++ b/DSP/DSP_Lib_TestSuite/Common/src/main.c
@@ -3,8 +3,8 @@
 #include "arm_math.h"
 
 
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-asm(" .global __ARM_use_no_argv\n");
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && !defined (__MICROLIB)
+__asm(" .global __ARM_use_no_argv\n");
 #endif
 
 
@@ -16,12 +16,16 @@
 
 int main(void)
 {
+#if !defined(FILEIO)
     debug_init();
+#endif
 
     JTEST_INIT();               /* Initialize test framework. */
 
     JTEST_GROUP_CALL(all_tests); /* Run all tests. */
 
     JTEST_ACT_EXIT_FW();        /* Exit test framework.  */
+#if !defined(FILEIO)
     while (1);                   /* Never return. */
+#endif
 }
diff --git a/DSP/DSP_Lib_TestSuite/Common/src/math_helper.c b/DSP/DSP_Lib_TestSuite/Common/src/math_helper.c
index 35925c8..2b1d30d 100644
--- a/DSP/DSP_Lib_TestSuite/Common/src/math_helper.c
+++ b/DSP/DSP_Lib_TestSuite/Common/src/math_helper.c
@@ -64,7 +64,7 @@
 
       if (temp == 0x7FC00000)
       {
-            return(0);
+        return(100000.0);
       }
 
       /* Checking for a NAN value in pTest array */
@@ -73,7 +73,7 @@
 
       if (temp == 0x7FC00000)
       {
-            return(0);
+        return(100000.0);
       }
       EnergySignal += pRef[i] * pRef[i];
       EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]);
@@ -85,12 +85,21 @@
 
     if (temp == 0x7FC00000)
     {
-        return(0);
+        return(100000.0);
     }
 
 
   SNR = 10 * log10f (EnergySignal / EnergyError);
 
+    /* Checking for a NAN value in SNR */
+    test =   (int *)(&SNR);
+    temp =  *test;
+
+    if (temp == 0x7FC00000)
+    {
+        return(100000.0);
+    }
+
 	return (SNR);
 
 }
@@ -113,7 +122,7 @@
 
       if (temp == 0x7FC00000)
       {
-            return(0);
+        return(100000.0);
       }
 
       /* Checking for a NAN value in pTest array */
@@ -122,7 +131,7 @@
 
       if (temp == 0x7FC00000)
       {
-            return(0);
+        return(100000.0);
       }
       EnergySignal += pRef[i] * pRef[i];
       EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]);
@@ -134,12 +143,21 @@
 
     if (temp == 0x7FC00000)
     {
-        return(0);
+        return(100000.0);
     }
 
 
   SNR = 10 * log10 (EnergySignal / EnergyError);
 
+    /* Checking for a NAN value in SNR */
+    test =   (int *)(&SNR);
+    temp =  *test;
+
+    if (temp == 0x7FC00000)
+    {
+        return(10000.0);
+    }
+
   return (SNR);
 
 }
diff --git a/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/matrix_test_common_data.c b/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/matrix_test_common_data.c
index 0394892..9043a23 100644
--- a/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/matrix_test_common_data.c
+++ b/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/matrix_test_common_data.c
@@ -45,7 +45,10 @@
  *  Pool of random data to base matrix inputs from.
  */
 float32_t matrix_f32_100_rand[100] = {
-    -45.0345569674258,  -11.0261163038747, -14.6841428777929,
+/*    -45.0345569674258, first number negativ causes fault in 1x1 multiplay with 0.
+                         AC6 DSP_Lib calculatas a -0.0 which is not a 0.0 in memcmp!
+ */
+     45.0345569674258,  -11.0261163038747, -14.6841428777929,
     0.0345569674258,    -11.0261163038747, -14.6841428777929,
     -20.3679194392227,  27.5712678608402,  -12.1390617339732,
     -19.8753669720509,  42.3379642103244,  -23.7788252219155,
@@ -82,7 +85,8 @@
 };
 
 float64_t matrix_f64_100_rand[100] = {
-    -45.0345569674258,  -11.0261163038747, -14.6841428777929,
+//    -45.0345569674258,  -11.0261163038747, -14.6841428777929,
+     45.0345569674258,  -11.0261163038747, -14.6841428777929,
     0.0345569674258,    -11.0261163038747, -14.6841428777929,
     -20.3679194392227,  27.5712678608402,  -12.1390617339732,
     -19.8753669720509,  42.3379642103244,  -23.7788252219155,
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvoptx
index 5145d60..fbd1ae9 100644
--- a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvoptx
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvoptx
@@ -101,7 +101,9 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
-        <nTsel>4</nTsel>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -138,7 +140,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFM</Key>
-          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF -MA</Name>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF"../cortexM0l_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -185,6 +187,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -268,7 +274,9 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
-        <nTsel>4</nTsel>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -285,7 +293,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFM</Key>
-          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF -MA</Name>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF"../cortexM3l_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -332,6 +340,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -415,7 +427,9 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
-        <nTsel>4</nTsel>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -432,7 +446,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFM</Key>
-          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF -MA</Name>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"../cortexM4l_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -479,6 +493,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -562,7 +580,9 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
-        <nTsel>4</nTsel>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -599,7 +619,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFM</Key>
-          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF -MA</Name>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4lf_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -646,6 +666,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -729,7 +753,9 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
-        <nTsel>4</nTsel>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -766,7 +792,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFM</Key>
-          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF -MA</Name>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"../cortexM7l_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -813,6 +839,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -896,7 +926,9 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
-        <nTsel>4</nTsel>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -933,7 +965,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFM</Key>
-          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF -MA</Name>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"../cortexM7lfsp_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -980,6 +1012,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1063,7 +1099,9 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
-        <nTsel>4</nTsel>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -1080,7 +1118,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFM</Key>
-          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF -MA</Name>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"../cortexM7lfdp_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -1127,6 +1165,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1210,6 +1252,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>15</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1242,7 +1286,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFMv8M</Key>
-          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMCM23_config.txt" -MA</Name>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMv8MBLl_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -1289,6 +1333,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1372,6 +1420,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>15</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1389,7 +1439,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFMv8M</Key>
-          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMCM33_config.txt" -MA</Name>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLl_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -1436,6 +1486,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1519,6 +1573,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>15</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1551,7 +1607,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFMv8M</Key>
-          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMCM33_FP_config.txt" -MA</Name>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLlfsp_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -1598,141 +1654,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
-    </TargetOption>
-  </Target>
-
-  <Target>
-    <TargetName>ARMv8MMLlfdp.DoNotUse</TargetName>
-    <ToolsetNumber>0x4</ToolsetNumber>
-    <ToolsetName>ARM-ADS</ToolsetName>
-    <TargetOption>
-      <CLKADS>12000000</CLKADS>
-      <OPTTT>
-        <gFlags>0</gFlags>
-        <BeepAtEnd>1</BeepAtEnd>
-        <RunSim>1</RunSim>
-        <RunTarget>0</RunTarget>
-        <RunAbUc>0</RunAbUc>
-      </OPTTT>
-      <OPTHX>
-        <HexSelection>1</HexSelection>
-        <FlashByte>65535</FlashByte>
-        <HexRangeLowAddress>0</HexRangeLowAddress>
-        <HexRangeHighAddress>0</HexRangeHighAddress>
-        <HexOffset>0</HexOffset>
-      </OPTHX>
-      <OPTLEX>
-        <PageWidth>79</PageWidth>
-        <PageLength>66</PageLength>
-        <TabStop>8</TabStop>
-        <ListingPath>.\IntermediateFiles\ARMv8MMLlfdp\</ListingPath>
-      </OPTLEX>
-      <ListingPage>
-        <CreateCListing>1</CreateCListing>
-        <CreateAListing>1</CreateAListing>
-        <CreateLListing>1</CreateLListing>
-        <CreateIListing>0</CreateIListing>
-        <AsmCond>1</AsmCond>
-        <AsmSymb>1</AsmSymb>
-        <AsmXref>0</AsmXref>
-        <CCond>1</CCond>
-        <CCode>0</CCode>
-        <CListInc>0</CListInc>
-        <CSymb>0</CSymb>
-        <LinkerCodeListing>0</LinkerCodeListing>
-      </ListingPage>
-      <OPTXL>
-        <LMap>1</LMap>
-        <LComments>1</LComments>
-        <LGenerateSymbols>1</LGenerateSymbols>
-        <LLibSym>1</LLibSym>
-        <LLines>1</LLines>
-        <LLocSym>1</LLocSym>
-        <LPubSym>1</LPubSym>
-        <LXref>0</LXref>
-        <LExpSel>0</LExpSel>
-      </OPTXL>
-      <OPTFL>
-        <tvExp>0</tvExp>
-        <tvExpOptDlg>0</tvExpOptDlg>
-        <IsCurrentTarget>0</IsCurrentTarget>
-      </OPTFL>
-      <CpuCode>7</CpuCode>
-      <DebugOpt>
-        <uSim>1</uSim>
-        <uTrg>0</uTrg>
-        <sLdApp>1</sLdApp>
-        <sGomain>1</sGomain>
-        <sRbreak>1</sRbreak>
-        <sRwatch>1</sRwatch>
-        <sRmem>1</sRmem>
-        <sRfunc>1</sRfunc>
-        <sRbox>1</sRbox>
-        <tLdApp>1</tLdApp>
-        <tGomain>0</tGomain>
-        <tRbreak>1</tRbreak>
-        <tRwatch>1</tRwatch>
-        <tRmem>1</tRmem>
-        <tRfunc>0</tRfunc>
-        <tRbox>1</tRbox>
-        <tRtrace>1</tRtrace>
-        <sRSysVw>1</sRSysVw>
-        <tRSysVw>1</tRSysVw>
-        <sRunDeb>0</sRunDeb>
-        <sLrtime>0</sLrtime>
-        <bEvRecOn>1</bEvRecOn>
-        <nTsel>-1</nTsel>
-        <sDll></sDll>
-        <sDllPa></sDllPa>
-        <sDlgDll></sDlgDll>
-        <sDlgPa></sDlgPa>
-        <sIfile></sIfile>
-        <tDll></tDll>
-        <tDllPa></tDllPa>
-        <tDlgDll></tDlgDll>
-        <tDlgPa></tDlgPa>
-        <tIfile></tIfile>
-        <pMon></pMon>
-      </DebugOpt>
-      <Breakpoint/>
-      <Tracepoint>
-        <THDelay>0</THDelay>
-      </Tracepoint>
-      <DebugFlag>
-        <trace>0</trace>
-        <periodic>0</periodic>
-        <aLwin>0</aLwin>
-        <aCover>0</aCover>
-        <aSer1>0</aSer1>
-        <aSer2>0</aSer2>
-        <aPa>0</aPa>
-        <viewmode>0</viewmode>
-        <vrSel>0</vrSel>
-        <aSym>0</aSym>
-        <aTbox>0</aTbox>
-        <AscS1>0</AscS1>
-        <AscS2>0</AscS2>
-        <AscS3>0</AscS3>
-        <aSer3>0</aSer3>
-        <eProf>0</eProf>
-        <aLa>0</aLa>
-        <aPa1>0</aPa1>
-        <AscS4>0</AscS4>
-        <aSer4>0</aSer4>
-        <StkLoc>0</StkLoc>
-        <TrcWin>0</TrcWin>
-        <newCpu>0</newCpu>
-        <uProt>0</uProt>
-      </DebugFlag>
-      <LintExecutable></LintExecutable>
-      <LintConfigFile></LintConfigFile>
-      <bLintAuto>0</bLintAuto>
-      <bAutoGenD>0</bAutoGenD>
-      <LntExFlags>0</LntExFlags>
-      <pMisraName></pMisraName>
-      <pszMrule></pszMrule>
-      <pSingCmds></pSingCmds>
-      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1816,6 +1741,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>15</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1848,7 +1775,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFMv8M</Key>
-          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMCM33_DSP_config.txt" -MA</Name>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLld_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -1895,6 +1822,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1978,6 +1909,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>15</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2010,7 +1943,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFMv8M</Key>
-          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMCM33_DSP_FP_config.txt" -MA</Name>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLldfsp_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -2057,141 +1990,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
-    </TargetOption>
-  </Target>
-
-  <Target>
-    <TargetName>ARMv8MMLldfdp.DoNotUse</TargetName>
-    <ToolsetNumber>0x4</ToolsetNumber>
-    <ToolsetName>ARM-ADS</ToolsetName>
-    <TargetOption>
-      <CLKADS>12000000</CLKADS>
-      <OPTTT>
-        <gFlags>0</gFlags>
-        <BeepAtEnd>1</BeepAtEnd>
-        <RunSim>1</RunSim>
-        <RunTarget>0</RunTarget>
-        <RunAbUc>0</RunAbUc>
-      </OPTTT>
-      <OPTHX>
-        <HexSelection>1</HexSelection>
-        <FlashByte>65535</FlashByte>
-        <HexRangeLowAddress>0</HexRangeLowAddress>
-        <HexRangeHighAddress>0</HexRangeHighAddress>
-        <HexOffset>0</HexOffset>
-      </OPTHX>
-      <OPTLEX>
-        <PageWidth>79</PageWidth>
-        <PageLength>66</PageLength>
-        <TabStop>8</TabStop>
-        <ListingPath>.\IntermediateFiles\ARMv8MMLldfdp\</ListingPath>
-      </OPTLEX>
-      <ListingPage>
-        <CreateCListing>1</CreateCListing>
-        <CreateAListing>1</CreateAListing>
-        <CreateLListing>1</CreateLListing>
-        <CreateIListing>0</CreateIListing>
-        <AsmCond>1</AsmCond>
-        <AsmSymb>1</AsmSymb>
-        <AsmXref>0</AsmXref>
-        <CCond>1</CCond>
-        <CCode>0</CCode>
-        <CListInc>0</CListInc>
-        <CSymb>0</CSymb>
-        <LinkerCodeListing>0</LinkerCodeListing>
-      </ListingPage>
-      <OPTXL>
-        <LMap>1</LMap>
-        <LComments>1</LComments>
-        <LGenerateSymbols>1</LGenerateSymbols>
-        <LLibSym>1</LLibSym>
-        <LLines>1</LLines>
-        <LLocSym>1</LLocSym>
-        <LPubSym>1</LPubSym>
-        <LXref>0</LXref>
-        <LExpSel>0</LExpSel>
-      </OPTXL>
-      <OPTFL>
-        <tvExp>0</tvExp>
-        <tvExpOptDlg>0</tvExpOptDlg>
-        <IsCurrentTarget>0</IsCurrentTarget>
-      </OPTFL>
-      <CpuCode>7</CpuCode>
-      <DebugOpt>
-        <uSim>1</uSim>
-        <uTrg>0</uTrg>
-        <sLdApp>1</sLdApp>
-        <sGomain>1</sGomain>
-        <sRbreak>1</sRbreak>
-        <sRwatch>1</sRwatch>
-        <sRmem>1</sRmem>
-        <sRfunc>1</sRfunc>
-        <sRbox>1</sRbox>
-        <tLdApp>1</tLdApp>
-        <tGomain>0</tGomain>
-        <tRbreak>1</tRbreak>
-        <tRwatch>1</tRwatch>
-        <tRmem>1</tRmem>
-        <tRfunc>0</tRfunc>
-        <tRbox>1</tRbox>
-        <tRtrace>1</tRtrace>
-        <sRSysVw>1</sRSysVw>
-        <tRSysVw>1</tRSysVw>
-        <sRunDeb>0</sRunDeb>
-        <sLrtime>0</sLrtime>
-        <bEvRecOn>1</bEvRecOn>
-        <nTsel>-1</nTsel>
-        <sDll></sDll>
-        <sDllPa></sDllPa>
-        <sDlgDll></sDlgDll>
-        <sDlgPa></sDlgPa>
-        <sIfile></sIfile>
-        <tDll></tDll>
-        <tDllPa></tDllPa>
-        <tDlgDll></tDlgDll>
-        <tDlgPa></tDlgPa>
-        <tIfile></tIfile>
-        <pMon></pMon>
-      </DebugOpt>
-      <Breakpoint/>
-      <Tracepoint>
-        <THDelay>0</THDelay>
-      </Tracepoint>
-      <DebugFlag>
-        <trace>0</trace>
-        <periodic>0</periodic>
-        <aLwin>0</aLwin>
-        <aCover>0</aCover>
-        <aSer1>0</aSer1>
-        <aSer2>0</aSer2>
-        <aPa>0</aPa>
-        <viewmode>0</viewmode>
-        <vrSel>0</vrSel>
-        <aSym>0</aSym>
-        <aTbox>0</aTbox>
-        <AscS1>0</AscS1>
-        <AscS2>0</AscS2>
-        <AscS3>0</AscS3>
-        <aSer3>0</aSer3>
-        <eProf>0</eProf>
-        <aLa>0</aLa>
-        <aPa1>0</aPa1>
-        <AscS4>0</AscS4>
-        <aSer4>0</aSer4>
-        <StkLoc>0</StkLoc>
-        <TrcWin>0</TrcWin>
-        <newCpu>0</newCpu>
-        <uProt>0</uProt>
-      </DebugFlag>
-      <LintExecutable></LintExecutable>
-      <LintConfigFile></LintConfigFile>
-      <bLintAuto>0</bLintAuto>
-      <bAutoGenD>0</bAutoGenD>
-      <LntExFlags>0</LntExFlags>
-      <pMisraName></pMisraName>
-      <pszMrule></pszMrule>
-      <pSingCmds></pSingCmds>
-      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2705,7 +2507,7 @@
       <GroupNumber>8</GroupNumber>
       <FileNumber>38</FileNumber>
       <FileType>1</FileType>
-      <tvExp>0</tvExp>
+      <tvExp>1</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
       <bDave2>0</bDave2>
       <PathWithFileName>..\..\Common\src\controller_tests\pid_reset_tests.c</PathWithFileName>
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvprojx b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvprojx
index 7296f06..bc06615 100644
--- a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvprojx
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvprojx
@@ -10,11 +10,13 @@
       <TargetName>cortexM0l</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM0</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -131,7 +133,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4096</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -182,6 +184,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -322,6 +325,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -332,9 +336,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM0</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -349,8 +353,8 @@
             <useXO>0</useXO>
             <uClangAs>0</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM0</MiscControls>
-              <Define>ARM_MATH_CM0</Define>
+              <MiscControls>--cpreproc --cpreproc_opts=-D,ARMCM0</MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -365,7 +369,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>..\..\Common\platform\ARMCC\armcc5_arm.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -851,11 +855,12 @@
       <TargetName>cortexM3l</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM3</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -911,8 +916,8 @@
           <BeforeMake>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>python Scripts/get_ref_and_dsp_libs.py ARM M3l</UserProg1Name>
-            <UserProg2Name>python Scripts/get_ref_and_dsp_libs.py GCC M3l</UserProg2Name>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
             <nStopB1X>0</nStopB1X>
@@ -972,7 +977,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4096</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -1023,6 +1028,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -1163,6 +1169,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -1173,9 +1180,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM3</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -1190,8 +1197,8 @@
             <useXO>0</useXO>
             <uClangAs>0</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM3</MiscControls>
-              <Define>ARM_MATH_CM3</Define>
+              <MiscControls>--cpreproc --cpreproc_opts=-D,ARMCM3</MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -1206,7 +1213,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>..\..\Common\platform\ARMCC\armcc5_arm.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -1692,11 +1699,12 @@
       <TargetName>cortexM4l</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -1752,8 +1760,8 @@
           <BeforeMake>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>python Scripts/get_ref_and_dsp_libs.py ARM M4l</UserProg1Name>
-            <UserProg2Name>python Scripts/get_ref_and_dsp_libs.py GCC M4l</UserProg2Name>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
             <nStopB1X>0</nStopB1X>
@@ -1813,7 +1821,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4096</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -1864,6 +1872,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -2004,6 +2013,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -2014,9 +2024,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM4</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -2031,8 +2041,8 @@
             <useXO>0</useXO>
             <uClangAs>0</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM4</MiscControls>
-              <Define>ARM_MATH_CM4</Define>
+              <MiscControls>--cpreproc --cpreproc_opts=-D,ARMCM4</MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -2047,7 +2057,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>..\..\Common\platform\ARMCC\armcc5_arm.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -2533,11 +2543,12 @@
       <TargetName>cortexM4lf</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4_FP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -2593,8 +2604,8 @@
           <BeforeMake>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>python Scripts/get_ref_and_dsp_libs.py ARM M4lf</UserProg1Name>
-            <UserProg2Name>python Scripts/get_ref_and_dsp_libs.py GCC M4lf</UserProg2Name>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
             <nStopB1X>0</nStopB1X>
@@ -2654,7 +2665,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4096</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -2705,6 +2716,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -2845,6 +2857,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -2855,9 +2868,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM4 __FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -2872,8 +2885,8 @@
             <useXO>0</useXO>
             <uClangAs>0</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM4</MiscControls>
-              <Define>ARM_MATH_CM4</Define>
+              <MiscControls>--cpreproc --cpreproc_opts=-D,ARMCM4</MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -2888,7 +2901,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>..\..\Common\platform\ARMCC\armcc5_arm.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -3374,11 +3387,12 @@
       <TargetName>cortexM7l</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -3434,8 +3448,8 @@
           <BeforeMake>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>python Scripts/get_ref_and_dsp_libs.py ARM M4l</UserProg1Name>
-            <UserProg2Name>python Scripts/get_ref_and_dsp_libs.py GCC M4l</UserProg2Name>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
             <nStopB1X>0</nStopB1X>
@@ -3495,7 +3509,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4096</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -3546,6 +3560,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -3686,6 +3701,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -3696,9 +3712,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM7</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -3713,8 +3729,8 @@
             <useXO>0</useXO>
             <uClangAs>0</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM7</MiscControls>
-              <Define>ARM_MATH_CM7</Define>
+              <MiscControls>--cpreproc --cpreproc_opts=-D,ARMCM7</MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -3729,7 +3745,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>..\..\Common\platform\ARMCC\armcc5_arm.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -4215,11 +4231,12 @@
       <TargetName>cortexM7lfsp</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7_SP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -4275,8 +4292,8 @@
           <BeforeMake>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>python Scripts/get_ref_and_dsp_libs.py ARM M4lf</UserProg1Name>
-            <UserProg2Name>python Scripts/get_ref_and_dsp_libs.py GCC M4lf</UserProg2Name>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
             <nStopB1X>0</nStopB1X>
@@ -4336,7 +4353,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4096</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -4387,6 +4404,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -4527,6 +4545,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -4537,9 +4556,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM7 __FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -4554,8 +4573,8 @@
             <useXO>0</useXO>
             <uClangAs>0</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM7</MiscControls>
-              <Define>ARM_MATH_CM7</Define>
+              <MiscControls>--cpreproc --cpreproc_opts=-D,ARMCM7</MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -4570,7 +4589,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>..\..\Common\platform\ARMCC\armcc5_arm.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -5056,11 +5075,12 @@
       <TargetName>cortexM7lfdp</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7_DP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -5177,7 +5197,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4096</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -5228,6 +5248,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>3</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -5368,6 +5389,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -5378,9 +5400,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM7 __FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -5395,8 +5417,8 @@
             <useXO>0</useXO>
             <uClangAs>0</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM7</MiscControls>
-              <Define>ARM_MATH_CM7</Define>
+              <MiscControls>--cpreproc --cpreproc_opts=-D,ARMCM7</MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -5411,7 +5433,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>..\..\Common\platform\ARMCC\armcc5_arm.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -5897,12 +5919,13 @@
       <TargetName>ARMv8MBLl</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6060000::V6.6::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG_6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MBL</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("ARMV8MBL") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -6019,7 +6042,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4097</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -6045,7 +6068,7 @@
             <ldmm>1</ldmm>
             <ldXref>1</ldXref>
             <BigEnd>0</BigEnd>
-            <AdsALst>1</AdsALst>
+            <AdsALst>0</AdsALst>
             <AdsACrf>1</AdsACrf>
             <AdsANop>0</AdsANop>
             <AdsANot>0</AdsANot>
@@ -6070,6 +6093,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -6197,32 +6221,33 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>1</Optim>
+            <Optim>2</Optim>
             <oTime>0</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls>-fhonor-nans</MiscControls>
-              <Define>ARM_MATH_ARMV8MBL</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -6235,10 +6260,10 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc</MiscControls>
-              <Define>ARM_MATH_ARMV8MBL __CC_ARM</Define>
+              <MiscControls></MiscControls>
+              <Define>ARMv8MBL</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -6253,7 +6278,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>..\..\Common\platform\ARMCLANG\armcc6_arm.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -6740,11 +6765,12 @@
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
       <pCCUsed>6060000::V6.6::.\ARMCLANG</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -6861,7 +6887,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4097</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -6912,6 +6938,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <StupSel>8</StupSel>
@@ -7039,32 +7066,33 @@
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           <Cads>
             <interw>1</interw>
-            <Optim>1</Optim>
+            <Optim>2</Optim>
             <oTime>0</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
-              <MiscControls>-Xclang -target-feature -Xclang +t2xtpk -fhonor-nans</MiscControls>
-              <Define>ARM_MATH_ARMV8MML</Define>
+              <MiscControls>-fhonor-nans</MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -7077,10 +7105,10 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc</MiscControls>
-              <Define>ARM_MATH_ARMV8MML __CC_ARM</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
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@@ -7095,7 +7123,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>..\..\Common\platform\ARMCLANG\armcc6_arm.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -7582,11 +7610,12 @@
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
       <pCCUsed>6060000::V6.6::.\ARMCLANG</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_SP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -7703,7 +7732,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4097</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -7754,6 +7783,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <StupSel>8</StupSel>
@@ -7881,32 +7911,33 @@
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           <Cads>
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+            <Optim>2</Optim>
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             <SplitLS>0</SplitLS>
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+            <OneElfS>1</OneElfS>
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             <PlainCh>0</PlainCh>
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-            <wLevel>0</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
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-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
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+            <vShortWch>1</vShortWch>
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-              <MiscControls>-Xclang -target-feature -Xclang +t2xtpk -fhonor-nans</MiscControls>
-              <Define>ARM_MATH_ARMV8MML __FPU_PRESENT=1U</Define>
+              <MiscControls>-fhonor-nans</MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
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           <Aads>
@@ -7919,10 +7950,10 @@
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             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc</MiscControls>
-              <Define>ARM_MATH_ARMV8MML __CC_ARM</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
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@@ -7937,849 +7968,7 @@
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             <pXoBase></pXoBase>
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-            <DisabledWarnings></DisabledWarnings>
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-        </TargetArmAds>
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-              <FilePath>..\..\Common\src\statistics_tests\mean_tests.c</FilePath>
-            </File>
-            <File>
-              <FileName>min_tests.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\statistics_tests\min_tests.c</FilePath>
-            </File>
-            <File>
-              <FileName>power_tests.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\statistics_tests\power_tests.c</FilePath>
-            </File>
-            <File>
-              <FileName>rms_tests.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\statistics_tests\rms_tests.c</FilePath>
-            </File>
-            <File>
-              <FileName>std_tests.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\statistics_tests\std_tests.c</FilePath>
-            </File>
-            <File>
-              <FileName>var_tests.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\statistics_tests\var_tests.c</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>Support</GroupName>
-          <Files>
-            <File>
-              <FileName>copy_tests.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\support_tests\copy_tests.c</FilePath>
-            </File>
-            <File>
-              <FileName>support_test_common_data.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\support_tests\support_test_common_data.c</FilePath>
-            </File>
-            <File>
-              <FileName>support_test_group.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\support_tests\support_test_group.c</FilePath>
-            </File>
-            <File>
-              <FileName>fill_tests.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\support_tests\fill_tests.c</FilePath>
-            </File>
-            <File>
-              <FileName>x_to_y_tests.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\support_tests\x_to_y_tests.c</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>Intrinsics</GroupName>
-          <Files>
-            <File>
-              <FileName>intrinsics_tests.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests.c</FilePath>
-            </File>
-            <File>
-              <FileName>intrinsics_tests_common_data.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>MathHelper</GroupName>
-          <Files>
-            <File>
-              <FileName>math_helper.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\math_helper.c</FilePath>
-            </File>
-          </Files>
-        </Group>
-      </Groups>
-    </Target>
-    <Target>
-      <TargetName>ARMv8MMLlfdp.DoNotUse</TargetName>
-      <ToolsetNumber>0x4</ToolsetNumber>
-      <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6060000::V6.6::.\ARMCLANG</pCCUsed>
-      <TargetOption>
-        <TargetCommonOption>
-          <Device>ARMv8MML_DP</Device>
-          <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
-          <PackURL>http://www.keil.com/pack/</PackURL>
-          <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
-          <FlashUtilSpec></FlashUtilSpec>
-          <StartupFile></StartupFile>
-          <FlashDriverDll>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</FlashDriverDll>
-          <DeviceId>0</DeviceId>
-          <RegisterFile>$$Device:ARMv8MML_DP$Device\ARM\ARMv8MML\Include\ARMv8MML_DP.h</RegisterFile>
-          <MemoryEnv></MemoryEnv>
-          <Cmp></Cmp>
-          <Asm></Asm>
-          <Linker></Linker>
-          <OHString></OHString>
-          <InfinionOptionDll></InfinionOptionDll>
-          <SLE66CMisc></SLE66CMisc>
-          <SLE66AMisc></SLE66AMisc>
-          <SLE66LinkerMisc></SLE66LinkerMisc>
-          <SFDFile>$$Device:ARMv8MML_DP$Device\ARM\SVD\ARMv8MML.svd</SFDFile>
-          <bCustSvd>0</bCustSvd>
-          <UseEnv>0</UseEnv>
-          <BinPath></BinPath>
-          <IncludePath></IncludePath>
-          <LibPath></LibPath>
-          <RegisterFilePath></RegisterFilePath>
-          <DBRegisterFilePath></DBRegisterFilePath>
-          <TargetStatus>
-            <Error>0</Error>
-            <ExitCodeStop>0</ExitCodeStop>
-            <ButtonStop>0</ButtonStop>
-            <NotGenerated>0</NotGenerated>
-            <InvalidFlash>1</InvalidFlash>
-          </TargetStatus>
-          <OutputDirectory>.\IntermediateFiles\ARMv8MMLlfdp\</OutputDirectory>
-          <OutputName>DspLibTest_FVP</OutputName>
-          <CreateExecutable>1</CreateExecutable>
-          <CreateLib>0</CreateLib>
-          <CreateHexFile>0</CreateHexFile>
-          <DebugInformation>1</DebugInformation>
-          <BrowseInformation>1</BrowseInformation>
-          <ListingPath>.\IntermediateFiles\ARMv8MMLlfdp\</ListingPath>
-          <HexFormatSelection>1</HexFormatSelection>
-          <Merge32K>0</Merge32K>
-          <CreateBatchFile>0</CreateBatchFile>
-          <BeforeCompile>
-            <RunUserProg1>0</RunUserProg1>
-            <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name></UserProg1Name>
-            <UserProg2Name></UserProg2Name>
-            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
-            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
-            <nStopU1X>0</nStopU1X>
-            <nStopU2X>0</nStopU2X>
-          </BeforeCompile>
-          <BeforeMake>
-            <RunUserProg1>0</RunUserProg1>
-            <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name></UserProg1Name>
-            <UserProg2Name></UserProg2Name>
-            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
-            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
-            <nStopB1X>0</nStopB1X>
-            <nStopB2X>0</nStopB2X>
-          </BeforeMake>
-          <AfterMake>
-            <RunUserProg1>0</RunUserProg1>
-            <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name></UserProg1Name>
-            <UserProg2Name></UserProg2Name>
-            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
-            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
-            <nStopA1X>0</nStopA1X>
-            <nStopA2X>0</nStopA2X>
-          </AfterMake>
-          <SelectedForBatchBuild>0</SelectedForBatchBuild>
-          <SVCSIdString></SVCSIdString>
-        </TargetCommonOption>
-        <CommonProperty>
-          <UseCPPCompiler>0</UseCPPCompiler>
-          <RVCTCodeConst>0</RVCTCodeConst>
-          <RVCTZI>0</RVCTZI>
-          <RVCTOtherData>0</RVCTOtherData>
-          <ModuleSelection>0</ModuleSelection>
-          <IncludeInBuild>1</IncludeInBuild>
-          <AlwaysBuild>0</AlwaysBuild>
-          <GenerateAssemblyFile>0</GenerateAssemblyFile>
-          <AssembleAssemblyFile>0</AssembleAssemblyFile>
-          <PublicsOnly>0</PublicsOnly>
-          <StopOnExitCode>3</StopOnExitCode>
-          <CustomArgument></CustomArgument>
-          <IncludeLibraryModules></IncludeLibraryModules>
-          <ComprImg>1</ComprImg>
-        </CommonProperty>
-        <DllOption>
-          <SimDllName></SimDllName>
-          <SimDllArguments></SimDllArguments>
-          <SimDlgDll></SimDlgDll>
-          <SimDlgDllArguments></SimDlgDllArguments>
-          <TargetDllName>SARMV8M.DLL</TargetDllName>
-          <TargetDllArguments> -MPU</TargetDllArguments>
-          <TargetDlgDll>TCM.DLL</TargetDlgDll>
-          <TargetDlgDllArguments>-pV8MML</TargetDlgDllArguments>
-        </DllOption>
-        <DebugOption>
-          <OPTHX>
-            <HexSelection>1</HexSelection>
-            <HexRangeLowAddress>0</HexRangeLowAddress>
-            <HexRangeHighAddress>0</HexRangeHighAddress>
-            <HexOffset>0</HexOffset>
-            <Oh166RecLen>16</Oh166RecLen>
-          </OPTHX>
-        </DebugOption>
-        <Utilities>
-          <Flash1>
-            <UseTargetDll>1</UseTargetDll>
-            <UseExternalTool>0</UseExternalTool>
-            <RunIndependent>0</RunIndependent>
-            <UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
-            <DriverSelection>4097</DriverSelection>
-          </Flash1>
-          <bUseTDR>1</bUseTDR>
-          <Flash2>BIN\UL2V8M.DLL</Flash2>
-          <Flash3></Flash3>
-          <Flash4></Flash4>
-          <pFcarmOut></pFcarmOut>
-          <pFcarmGrp></pFcarmGrp>
-          <pFcArmRoot></pFcArmRoot>
-          <FcArmLst>0</FcArmLst>
-        </Utilities>
-        <TargetArmAds>
-          <ArmAdsMisc>
-            <GenerateListings>0</GenerateListings>
-            <asHll>1</asHll>
-            <asAsm>1</asAsm>
-            <asMacX>1</asMacX>
-            <asSyms>1</asSyms>
-            <asFals>1</asFals>
-            <asDbgD>1</asDbgD>
-            <asForm>1</asForm>
-            <ldLst>0</ldLst>
-            <ldmm>1</ldmm>
-            <ldXref>1</ldXref>
-            <BigEnd>0</BigEnd>
-            <AdsALst>0</AdsALst>
-            <AdsACrf>1</AdsACrf>
-            <AdsANop>0</AdsANop>
-            <AdsANot>0</AdsANot>
-            <AdsLLst>1</AdsLLst>
-            <AdsLmap>1</AdsLmap>
-            <AdsLcgr>1</AdsLcgr>
-            <AdsLsym>1</AdsLsym>
-            <AdsLszi>1</AdsLszi>
-            <AdsLtoi>1</AdsLtoi>
-            <AdsLsun>1</AdsLsun>
-            <AdsLven>1</AdsLven>
-            <AdsLsxf>1</AdsLsxf>
-            <RvctClst>0</RvctClst>
-            <GenPPlst>0</GenPPlst>
-            <AdsCpuType>"ARMV8MML"</AdsCpuType>
-            <RvctDeviceName></RvctDeviceName>
-            <mOS>0</mOS>
-            <uocRom>0</uocRom>
-            <uocRam>0</uocRam>
-            <hadIROM>1</hadIROM>
-            <hadIRAM>1</hadIRAM>
-            <hadXRAM>0</hadXRAM>
-            <uocXRam>0</uocXRam>
-            <RvdsVP>3</RvdsVP>
-            <hadIRAM2>1</hadIRAM2>
-            <hadIROM2>1</hadIROM2>
-            <StupSel>8</StupSel>
-            <useUlib>0</useUlib>
-            <EndSel>1</EndSel>
-            <uLtcg>0</uLtcg>
-            <nSecure>0</nSecure>
-            <RoSelD>3</RoSelD>
-            <RwSelD>3</RwSelD>
-            <CodeSel>0</CodeSel>
-            <OptFeed>0</OptFeed>
-            <NoZi1>0</NoZi1>
-            <NoZi2>0</NoZi2>
-            <NoZi3>0</NoZi3>
-            <NoZi4>0</NoZi4>
-            <NoZi5>0</NoZi5>
-            <Ro1Chk>0</Ro1Chk>
-            <Ro2Chk>0</Ro2Chk>
-            <Ro3Chk>0</Ro3Chk>
-            <Ir1Chk>1</Ir1Chk>
-            <Ir2Chk>0</Ir2Chk>
-            <Ra1Chk>0</Ra1Chk>
-            <Ra2Chk>0</Ra2Chk>
-            <Ra3Chk>0</Ra3Chk>
-            <Im1Chk>1</Im1Chk>
-            <Im2Chk>0</Im2Chk>
-            <OnChipMemories>
-              <Ocm1>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm1>
-              <Ocm2>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm2>
-              <Ocm3>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm3>
-              <Ocm4>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm4>
-              <Ocm5>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm5>
-              <Ocm6>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm6>
-              <IRAM>
-                <Type>0</Type>
-                <StartAddress>0x20000000</StartAddress>
-                <Size>0x20000</Size>
-              </IRAM>
-              <IROM>
-                <Type>1</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x200000</Size>
-              </IROM>
-              <XRAM>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </XRAM>
-              <OCR_RVCT1>
-                <Type>1</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </OCR_RVCT1>
-              <OCR_RVCT2>
-                <Type>1</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </OCR_RVCT2>
-              <OCR_RVCT3>
-                <Type>1</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </OCR_RVCT3>
-              <OCR_RVCT4>
-                <Type>1</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x200000</Size>
-              </OCR_RVCT4>
-              <OCR_RVCT5>
-                <Type>1</Type>
-                <StartAddress>0x200000</StartAddress>
-                <Size>0x200000</Size>
-              </OCR_RVCT5>
-              <OCR_RVCT6>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </OCR_RVCT6>
-              <OCR_RVCT7>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </OCR_RVCT7>
-              <OCR_RVCT8>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </OCR_RVCT8>
-              <OCR_RVCT9>
-                <Type>0</Type>
-                <StartAddress>0x20000000</StartAddress>
-                <Size>0x20000</Size>
-              </OCR_RVCT9>
-              <OCR_RVCT10>
-                <Type>0</Type>
-                <StartAddress>0x20200000</StartAddress>
-                <Size>0x20000</Size>
-              </OCR_RVCT10>
-            </OnChipMemories>
-            <RvctStartVector></RvctStartVector>
-          </ArmAdsMisc>
-          <Cads>
-            <interw>1</interw>
-            <Optim>1</Optim>
-            <oTime>0</oTime>
-            <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
-            <Strict>0</Strict>
-            <EnumInt>0</EnumInt>
-            <PlainCh>0</PlainCh>
-            <Ropi>0</Ropi>
-            <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
-            <uThumb>0</uThumb>
-            <uSurpInc>0</uSurpInc>
-            <uC99>0</uC99>
-            <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
-            <v6Lto>0</v6Lto>
-            <v6WtE>0</v6WtE>
-            <v6Rtti>0</v6Rtti>
-            <VariousControls>
-              <MiscControls>-Xclang -target-feature -Xclang +t2xtpk -fhonor-nans</MiscControls>
-              <Define>ARM_MATH_ARMV8MML __FPU_PRESENT=1U</Define>
-              <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
-            </VariousControls>
-          </Cads>
-          <Aads>
-            <interw>1</interw>
-            <Ropi>0</Ropi>
-            <Rwpi>0</Rwpi>
-            <thumb>1</thumb>
-            <SplitLS>0</SplitLS>
-            <SwStkChk>0</SwStkChk>
-            <NoWarn>0</NoWarn>
-            <uSurpInc>0</uSurpInc>
-            <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
-            <VariousControls>
-              <MiscControls>--cpreproc</MiscControls>
-              <Define>ARM_MATH_ARMV8MML __CC_ARM</Define>
-              <Undefine></Undefine>
-              <IncludePath></IncludePath>
-            </VariousControls>
-          </Aads>
-          <LDads>
-            <umfTarg>0</umfTarg>
-            <Ropi>0</Ropi>
-            <Rwpi>0</Rwpi>
-            <noStLib>0</noStLib>
-            <RepFail>1</RepFail>
-            <useFile>0</useFile>
-            <TextAddressRange>0x00000000</TextAddressRange>
-            <DataAddressRange>0x20000000</DataAddressRange>
-            <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>..\..\Common\platform\ARMCLANG\armcc6_arm.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -9266,11 +8455,12 @@
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
       <pCCUsed>6060000::V6.6::.\ARMCLANG</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_DSP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -9387,7 +8577,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4097</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -9438,6 +8628,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <StupSel>8</StupSel>
@@ -9565,32 +8756,33 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>1</Optim>
+            <Optim>2</Optim>
             <oTime>0</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
-              <MiscControls>-Xclang -target-feature -Xclang +t2xtpk -fhonor-nans</MiscControls>
-              <Define>ARM_MATH_ARMV8MML __DSP_PRESENT=1U</Define>
+              <MiscControls>-fhonor-nans</MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -9603,10 +8795,10 @@
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             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc</MiscControls>
-              <Define>ARM_MATH_ARMV8MML __CC_ARM</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
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@@ -9621,7 +8813,7 @@
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             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>..\..\Common\platform\ARMCLANG\armcc6_arm.sct</ScatterFile>
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             <IncludeLibsPath></IncludeLibsPath>
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@@ -10107,12 +9299,13 @@
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       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6060000::V6.6::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_DSP_SP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -10229,7 +9422,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4097</DriverSelection>
           </Flash1>
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@@ -10280,6 +9473,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <StupSel>8</StupSel>
@@ -10407,32 +9601,33 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>1</Optim>
+            <Optim>2</Optim>
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             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
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             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
+            <wLevel>3</wLevel>
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             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
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-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
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             <v6Rtti>0</v6Rtti>
             <VariousControls>
-              <MiscControls>-Xclang -target-feature -Xclang +t2xtpk -fhonor-nans</MiscControls>
-              <Define>ARM_MATH_ARMV8MML __DSP_PRESENT=1U __FPU_PRESENT=1U</Define>
+              <MiscControls>-fhonor-nans</MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
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+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
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           <Aads>
@@ -10445,10 +9640,10 @@
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             <useXO>0</useXO>
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+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc</MiscControls>
-              <Define>ARM_MATH_ARMV8MML __CC_ARM</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
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@@ -10463,849 +9658,7 @@
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-          <GroupName>MathHelper</GroupName>
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-            <File>
-              <FileName>math_helper.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\math_helper.c</FilePath>
-            </File>
-          </Files>
-        </Group>
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-    </Target>
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-          <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
-          <PackURL>http://www.keil.com/pack/</PackURL>
-          <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
-          <FlashUtilSpec></FlashUtilSpec>
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-          <FlashDriverDll>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</FlashDriverDll>
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-        </CommonProperty>
-        <DllOption>
-          <SimDllName></SimDllName>
-          <SimDllArguments></SimDllArguments>
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-          <TargetDllName>SARMV8M.DLL</TargetDllName>
-          <TargetDllArguments> -MPU</TargetDllArguments>
-          <TargetDlgDll>TCM.DLL</TargetDlgDll>
-          <TargetDlgDllArguments>-pV8MML</TargetDlgDllArguments>
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-        <DebugOption>
-          <OPTHX>
-            <HexSelection>1</HexSelection>
-            <HexRangeLowAddress>0</HexRangeLowAddress>
-            <HexRangeHighAddress>0</HexRangeHighAddress>
-            <HexOffset>0</HexOffset>
-            <Oh166RecLen>16</Oh166RecLen>
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-        </DebugOption>
-        <Utilities>
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-            <UseExternalTool>0</UseExternalTool>
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-            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
-            <DriverSelection>4096</DriverSelection>
-          </Flash1>
-          <bUseTDR>1</bUseTDR>
-          <Flash2>BIN\UL2V8M.DLL</Flash2>
-          <Flash3></Flash3>
-          <Flash4></Flash4>
-          <pFcarmOut></pFcarmOut>
-          <pFcarmGrp></pFcarmGrp>
-          <pFcArmRoot></pFcArmRoot>
-          <FcArmLst>0</FcArmLst>
-        </Utilities>
-        <TargetArmAds>
-          <ArmAdsMisc>
-            <GenerateListings>0</GenerateListings>
-            <asHll>1</asHll>
-            <asAsm>1</asAsm>
-            <asMacX>1</asMacX>
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-            <AdsLLst>1</AdsLLst>
-            <AdsLmap>1</AdsLmap>
-            <AdsLcgr>1</AdsLcgr>
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-            <AdsLszi>1</AdsLszi>
-            <AdsLtoi>1</AdsLtoi>
-            <AdsLsun>1</AdsLsun>
-            <AdsLven>1</AdsLven>
-            <AdsLsxf>1</AdsLsxf>
-            <RvctClst>0</RvctClst>
-            <GenPPlst>0</GenPPlst>
-            <AdsCpuType>"ARMV8MML"</AdsCpuType>
-            <RvctDeviceName></RvctDeviceName>
-            <mOS>0</mOS>
-            <uocRom>0</uocRom>
-            <uocRam>0</uocRam>
-            <hadIROM>1</hadIROM>
-            <hadIRAM>1</hadIRAM>
-            <hadXRAM>0</hadXRAM>
-            <uocXRam>0</uocXRam>
-            <RvdsVP>3</RvdsVP>
-            <hadIRAM2>1</hadIRAM2>
-            <hadIROM2>1</hadIROM2>
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-            <EndSel>1</EndSel>
-            <uLtcg>0</uLtcg>
-            <nSecure>0</nSecure>
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-            <RwSelD>3</RwSelD>
-            <CodeSel>0</CodeSel>
-            <OptFeed>0</OptFeed>
-            <NoZi1>0</NoZi1>
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-            <NoZi3>0</NoZi3>
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-            <Ro1Chk>0</Ro1Chk>
-            <Ro2Chk>0</Ro2Chk>
-            <Ro3Chk>0</Ro3Chk>
-            <Ir1Chk>1</Ir1Chk>
-            <Ir2Chk>0</Ir2Chk>
-            <Ra1Chk>0</Ra1Chk>
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-                <StartAddress>0x0</StartAddress>
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-                <StartAddress>0x0</StartAddress>
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-                <StartAddress>0x20000000</StartAddress>
-                <Size>0x20000</Size>
-              </IRAM>
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-                <Type>1</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x200000</Size>
-              </IROM>
-              <XRAM>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
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-              <OCR_RVCT1>
-                <Type>1</Type>
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-                <StartAddress>0x0</StartAddress>
-                <Size>0x200000</Size>
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-                <Type>1</Type>
-                <StartAddress>0x200000</StartAddress>
-                <Size>0x200000</Size>
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-                <Type>0</Type>
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-                <Size>0x0</Size>
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-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
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-                <Type>0</Type>
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-                <Size>0x20000</Size>
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-                <Type>0</Type>
-                <StartAddress>0x20200000</StartAddress>
-                <Size>0x20000</Size>
-              </OCR_RVCT10>
-            </OnChipMemories>
-            <RvctStartVector></RvctStartVector>
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-          <Cads>
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-              <MiscControls>-Xclang -target-feature -Xclang +t2xtpk -fhonor-nans</MiscControls>
-              <Define>ARM_MATH_ARMV8MML __DSP_PRESENT=1U __FPU_PRESENT=1U</Define>
-              <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
-            </VariousControls>
-          </Cads>
-          <Aads>
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-            <thumb>1</thumb>
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-            <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
-            <VariousControls>
-              <MiscControls>--cpreproc</MiscControls>
-              <Define>ARM_MATH_ARMV8MML __CC_ARM</Define>
-              <Undefine></Undefine>
-              <IncludePath></IncludePath>
-            </VariousControls>
-          </Aads>
-          <LDads>
-            <umfTarg>0</umfTarg>
-            <Ropi>0</Ropi>
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-            <noStLib>0</noStLib>
-            <RepFail>1</RepFail>
-            <useFile>0</useFile>
-            <TextAddressRange>0x00000000</TextAddressRange>
-            <DataAddressRange>0x20000000</DataAddressRange>
-            <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>..\..\Common\platform\ARMCLANG\armcc6_arm.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/DspLibTest_FVP.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/DspLibTest_FVP.uvoptx
new file mode 100644
index 0000000..770e9c5
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/DspLibTest_FVP.uvoptx
@@ -0,0 +1,3068 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>cortexM0l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM0l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF"..\cortexM0l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM3l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM3l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF"..\cortexM3l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4lf</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4lf\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4lf_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7lfsp</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7lfsp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfsp_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7lfdp</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7lfdp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfdp_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MBLl</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MBLl\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>15</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFMv8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFMv8M</Key>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMv8MBLl_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MMLl</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MMLl\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>15</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFMv8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFMv8M</Key>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLl_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MMLlfsp</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MMLlfsp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>15</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFMv8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFMv8M</Key>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLlfsp_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MMLld</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MMLld\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>15</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFMv8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFMv8M</Key>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLld_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
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new file mode 100644
index 0000000..3600651
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/DspLibTest_FVP.uvprojx
@@ -0,0 +1,10151 @@
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+              <FileName>cmplx_mag_squared_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_dot_prod_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mult_cmplx_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mult_real_test.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Controller</GroupName>
+          <Files>
+            <File>
+              <FileName>controller_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\controller_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>pid_reset_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\pid_reset_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>sin_cos_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\sin_cos_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>pid_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\pid_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>controller_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\controller_test_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>FastMath</GroupName>
+          <Files>
+            <File>
+              <FileName>fast_math_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>fast_math_tests_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Filtering</GroupName>
+          <Files>
+            <File>
+              <FileName>filtering_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\filtering_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>filtering_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\filtering_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>biquad_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\biquad_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>conv_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\conv_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>correlate_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\correlate_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>fir_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\fir_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>iir_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\iir_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>lms_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\lms_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Matrix</GroupName>
+          <Files>
+            <File>
+              <FileName>matrix_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\matrix_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>matrix_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\matrix_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_cmplx_mult_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_add_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_add_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_mult_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_mult_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_mult_fast_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_mult_fast_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_sub_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_sub_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_inverse_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_inverse_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_trans_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_trans_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_init_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_init_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_scale_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_scale_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Statistics</GroupName>
+          <Files>
+            <File>
+              <FileName>max_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\max_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>statistics_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\statistics_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>statistics_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\statistics_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>mean_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\mean_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>min_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\min_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>power_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\power_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>rms_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\rms_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>std_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\std_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>var_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\var_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Support</GroupName>
+          <Files>
+            <File>
+              <FileName>copy_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\copy_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>support_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\support_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>support_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\support_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>fill_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\fill_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>x_to_y_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\x_to_y_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Intrinsics</GroupName>
+          <Files>
+            <File>
+              <FileName>intrinsics_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>intrinsics_tests_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>MathHelper</GroupName>
+          <Files>
+            <File>
+              <FileName>math_helper.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\math_helper.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/Lib/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/Lib/.gitignore
new file mode 100644
index 0000000..5e7d273
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/Lib/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# Except this file
+!.gitignore
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/Logs/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/Logs/.gitignore
new file mode 100644
index 0000000..5e7d273
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/Logs/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# Except this file
+!.gitignore
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM23_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM23_config.txt
deleted file mode 100644
index 79e96c4..0000000
--- a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM23_config.txt
+++ /dev/null
@@ -1,163 +0,0 @@
-# Parameters:
-# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
-#----------------------------------------------------------------------------------------------
-cpu0.semihosting-enable=0                             # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
-cpu0.NUM_IDAU_REGION=0x0                              # (int   , init-time) default = '0xA'    : 
-cpu0.SECEXT=0                                         # (bool  , init-time) default = '1'      : Whether the ARMv8-M Security Extensions are included
-fvp_mps2.platform_type=0x0                            # (int   , init-time) default = '0x0'    : 0:MPS2 ; 1:IoT Kit ; 2:Castor : [0x0..0x2]
-fvp_mps2.extra_psram=0                                # (bool  , init-time) default = '0'      : Increases PSRAM to 32Mb
-fvp_mps2.DISABLE_GATING=1                             # (bool  , init-time) default = '0'      : Disable Memory gating logic
-fvp_mps2.NUM_IDAU_REGION=0x0                          # (int   , init-time) default = '0xA'    : 
-fvp_mps2.UART2.out_file=""                            # (string, init-time) default = ''       : Output file to hold data written by the UART (use '-' to send all output to stdout)
-fvp_mps2.UART2.in_file=""                             # (string, init-time) default = ''       : Input file for data to be read by the UART
-fvp_mps2.UART2.unbuffered_output=0                    # (bool  , init-time) default = '0'      : Unbuffered output
-fvp_mps2.UART2.in_file_escape_sequence="##"           # (string, init-time) default = '##'     : Input file escape sequence
-fvp_mps2.UART2.shutdown_on_eot=0                      # (bool  , init-time) default = '0'      : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available)
-fvp_mps2.UART2.shutdown_tag=""                        # (string, run-time ) default = ''       : Shutdown simulation when a string is transmitted
-fvp_mps2.UART1.out_file=""                            # (string, init-time) default = ''       : Output file to hold data written by the UART (use '-' to send all output to stdout)
-fvp_mps2.UART1.in_file=""                             # (string, init-time) default = ''       : Input file for data to be read by the UART
-fvp_mps2.UART1.unbuffered_output=0                    # (bool  , init-time) default = '0'      : Unbuffered output
-fvp_mps2.UART1.in_file_escape_sequence="##"           # (string, init-time) default = '##'     : Input file escape sequence
-fvp_mps2.UART1.shutdown_on_eot=0                      # (bool  , init-time) default = '0'      : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available)
-fvp_mps2.UART1.shutdown_tag=""                        # (string, run-time ) default = ''       : Shutdown simulation when a string is transmitted
-fvp_mps2.mps2_visualisation.rate_limit-enable=1       # (bool  , init-time) default = '1'      : Rate limit simulation.
-fvp_mps2.mps2_visualisation.disable-visualisation=0   # (bool  , init-time) default = '0'      : Enable/disable visualisation
-fvp_mps2.mps2_visualisation.window_title="CLCD %cpu%"  # (string, init-time) default = 'CLCD %cpu%' : Window title (%cpu% is replaced by cpu_name)
-fvp_mps2.mps2_visualisation.idler.delay_ms=0x32       # (int   , init-time) default = '0x32'   : Determines the period, in milliseconds of real time, between gui_callback() calls.
-fvp_mps2.telnetterminal0.mode="telnet"                # (string, init-time) default = 'telnet' : Terminal initialisation mode
-fvp_mps2.telnetterminal0.start_telnet=1               # (bool  , init-time) default = '1'      : Start telnet if nothing connected
-fvp_mps2.telnetterminal0.start_port=0x1388            # (int   , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF]
-fvp_mps2.telnetterminal0.quiet=0                      # (bool  , init-time) default = '0'      : Avoid output on stdout/stderr
-fvp_mps2.telnetterminal0.terminal_command=""          # (string, init-time) default = ''       : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows)
-fvp_mps2.telnetterminal1.mode="telnet"                # (string, init-time) default = 'telnet' : Terminal initialisation mode
-fvp_mps2.telnetterminal1.start_telnet=1               # (bool  , init-time) default = '1'      : Start telnet if nothing connected
-fvp_mps2.telnetterminal1.start_port=0x1388            # (int   , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF]
-fvp_mps2.telnetterminal1.quiet=0                      # (bool  , init-time) default = '0'      : Avoid output on stdout/stderr
-fvp_mps2.telnetterminal1.terminal_command=""          # (string, init-time) default = ''       : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows)
-fvp_mps2.telnetterminal2.mode="telnet"                # (string, init-time) default = 'telnet' : Terminal initialisation mode
-fvp_mps2.telnetterminal2.start_telnet=1               # (bool  , init-time) default = '1'      : Start telnet if nothing connected
-fvp_mps2.telnetterminal2.start_port=0x1388            # (int   , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF]
-fvp_mps2.telnetterminal2.quiet=0                      # (bool  , init-time) default = '0'      : Avoid output on stdout/stderr
-fvp_mps2.telnetterminal2.terminal_command=""          # (string, init-time) default = ''       : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows)
-fvp_mps2.PSRAM_M7.size=0x100000000                    # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.PSRAM_M7.fill1=0xDFDFDFCF                    # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.PSRAM_M7.fill2=0xCFDFDFDF                    # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.UART0.out_file=""                            # (string, init-time) default = ''       : Output file to hold data written by the UART (use '-' to send all output to stdout)
-fvp_mps2.UART0.in_file=""                             # (string, init-time) default = ''       : Input file for data to be read by the UART
-fvp_mps2.UART0.unbuffered_output=0                    # (bool  , init-time) default = '0'      : Unbuffered output
-fvp_mps2.UART0.in_file_escape_sequence="##"           # (string, init-time) default = '##'     : Input file escape sequence
-fvp_mps2.UART0.shutdown_on_eot=0                      # (bool  , init-time) default = '0'      : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available)
-fvp_mps2.UART0.shutdown_tag=""                        # (string, run-time ) default = ''       : Shutdown simulation when a string is transmitted
-fvp_mps2.cmsdk_watchdog.simhalt=0                     # (bool  , run-time ) default = '0'      : Halt on reset.
-fvp_mps2.s32k_watchdog.simhalt=0                      # (bool  , run-time ) default = '0'      : Halt on reset.
-fvp_mps2.secure_watchdog.simhalt=0                    # (bool  , run-time ) default = '0'      : Halt on reset.
-fvp_mps2.nonsecure_watchdog.simhalt=0                 # (bool  , run-time ) default = '0'      : Halt on reset.
-fvp_mps2.PSRAM.size=0x100000000                       # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.PSRAM.fill1=0xDFDFDFCF                       # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.PSRAM.fill2=0xCFDFDFDF                       # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.ssram2.size=0x100000000                      # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.ssram2.fill1=0xDFDFDFCF                      # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.ssram2.fill2=0xCFDFDFDF                      # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.ssram1.size=0x100000000                      # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.ssram1.fill1=0xDFDFDFCF                      # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.ssram1.fill2=0xCFDFDFDF                      # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.stub.size=0x100000000                        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram0.size=0x100000000        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram0.fill1=0xDFDFDFCF        # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram0.fill2=0xCFDFDFDF        # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram1.size=0x100000000        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram1.fill1=0xDFDFDFCF        # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram1.fill2=0xCFDFDFDF        # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram2.size=0x100000000        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram2.fill1=0xDFDFDFCF        # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram2.fill2=0xCFDFDFDF        # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram3.size=0x100000000        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram3.fill1=0xDFDFDFCF        # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram3.fill2=0xCFDFDFDF        # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.sys_ppu.use_active_signal=0                  # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.sys_ppu.revision="r0p0"                      # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cpu0core_ppu.revision="r0p0"                 # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cpu0dbg_ppu.revision="r0p0"                  # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cpu1core_ppu.use_active_signal=0             # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.cpu1core_ppu.revision="r0p0"                 # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cpu1dbg_ppu.use_active_signal=0              # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.cpu1dbg_ppu.revision="r0p0"                  # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.crypto_ppu.use_active_signal=0               # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.crypto_ppu.revision="r0p0"                   # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cordio_ppu.use_active_signal=0               # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.cordio_ppu.revision="r0p0"                   # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.dbg_ppu.use_active_signal=0                  # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.dbg_ppu.revision="r0p0"                      # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.ram0_ppu.use_active_signal=0                 # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.ram0_ppu.revision="r0p0"                     # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.ram1_ppu.use_active_signal=0                 # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.ram1_ppu.revision="r0p0"                     # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.ram2_ppu.use_active_signal=0                 # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.ram2_ppu.revision="r0p0"                     # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.ram3_ppu.use_active_signal=0                 # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.ram3_ppu.revision="r0p0"                     # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.smsc_91c111.enabled=0                        # (bool  , init-time) default = '0'      : Host interface connection enabled
-fvp_mps2.smsc_91c111.mac_address="00:02:f7:ef:5d:a2"  # (string, init-time) default = '00:02:f7:ef:5d:a2' : Host/model MAC address
-fvp_mps2.smsc_91c111.promiscuous=1                    # (bool  , init-time) default = '1'      : Put host into promiscuous mode
-fvp_mps2.hostbridge.interfaceName="ARM0"              # (string, init-time) default = 'ARM0'   : Host Interface
-fvp_mps2.hostbridge.userNetworking=0                  # (bool  , init-time) default = '0'      : Enable user-mode networking
-fvp_mps2.hostbridge.userNetSubnet="172.20.51.0/24"    # (string, init-time) default = '172.20.51.0/24' : Virtual subnet for user-mode networking
-fvp_mps2.hostbridge.userNetPorts=""                   # (string, init-time) default = ''       : Listening ports to expose in user-mode networking
-fvp_mps2.secure_control_register_block.FLASH_BLOCK_CFG=0x3  # (int   , init-time) default = '0x3'    : Flash Block size configuration : [0x0..0x31]
-fvp_mps2.secure_control_register_block.SRAM_BLOCK_CFG=0x3  # (int   , init-time) default = '0x3'    : SRAM Block size configuration : [0x0..0x31]
-fvp_mps2.secure_control_register_block.FLASH_WATERMARK_SUPPORTED=1  # (bool  , init-time) default = '1'      : Flash Watermark supported
-fvp_mps2.secure_control_register_block.SRAM_WATERMARK_SUPPORTED=1  # (bool  , init-time) default = '1'      : SRAM Watermark supported
-fvp_mps2.exclusive_monitor_psram.enable_component=1   # (bool  , init-time) default = '1'      : Enable component
-fvp_mps2.exclusive_monitor_psram.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]
-fvp_mps2.exclusive_monitor_psram.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]
-fvp_mps2.exclusive_monitor_psram.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master
-fvp_mps2.exclusive_monitor_psram.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit
-fvp_mps2.exclusive_monitor_psram.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]
-fvp_mps2.exclusive_monitor_psram.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores
-fvp_mps2.exclusive_monitor_zbtsram1.enable_component=1  # (bool  , init-time) default = '1'      : Enable component
-fvp_mps2.exclusive_monitor_zbtsram1.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]
-fvp_mps2.exclusive_monitor_zbtsram1.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]
-fvp_mps2.exclusive_monitor_zbtsram1.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master
-fvp_mps2.exclusive_monitor_zbtsram1.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit
-fvp_mps2.exclusive_monitor_zbtsram1.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]
-fvp_mps2.exclusive_monitor_zbtsram1.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores
-fvp_mps2.exclusive_monitor_zbtsram2.enable_component=1  # (bool  , init-time) default = '1'      : Enable component
-fvp_mps2.exclusive_monitor_zbtsram2.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]
-fvp_mps2.exclusive_monitor_zbtsram2.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]
-fvp_mps2.exclusive_monitor_zbtsram2.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master
-fvp_mps2.exclusive_monitor_zbtsram2.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit
-fvp_mps2.exclusive_monitor_zbtsram2.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]
-fvp_mps2.exclusive_monitor_zbtsram2.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores
-fvp_mps2.exclusive_monitor_iotss_internal_sram.enable_component=1  # (bool  , init-time) default = '1'      : Enable component
-fvp_mps2.exclusive_monitor_iotss_internal_sram.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]
-fvp_mps2.exclusive_monitor_iotss_internal_sram.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]
-fvp_mps2.exclusive_monitor_iotss_internal_sram.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master
-fvp_mps2.exclusive_monitor_iotss_internal_sram.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit
-fvp_mps2.exclusive_monitor_iotss_internal_sram.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]
-fvp_mps2.exclusive_monitor_iotss_internal_sram.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores
-fvp_mps2.dma0_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S
-fvp_mps2.dma0_securitymodifier.behaviour_s_to_ns=0x0  # (int   , init-time) default = '0x0'    : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS
-fvp_mps2.dma1_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S
-fvp_mps2.dma1_securitymodifier.behaviour_s_to_ns=0x0  # (int   , init-time) default = '0x0'    : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS
-fvp_mps2.dma2_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S
-fvp_mps2.dma2_securitymodifier.behaviour_s_to_ns=0x0  # (int   , init-time) default = '0x0'    : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS
-fvp_mps2.dma3_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S
-fvp_mps2.dma3_securitymodifier.behaviour_s_to_ns=0x0  # (int   , init-time) default = '0x0'    : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS
-fvp_mps2.dma0.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes
-fvp_mps2.dma0.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer
-fvp_mps2.dma0.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response
-fvp_mps2.dma0.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay
-fvp_mps2.dma1.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes
-fvp_mps2.dma1.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer
-fvp_mps2.dma1.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response
-fvp_mps2.dma1.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay
-fvp_mps2.dma2.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes
-fvp_mps2.dma2.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer
-fvp_mps2.dma2.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response
-fvp_mps2.dma2.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay
-fvp_mps2.dma3.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes
-fvp_mps2.dma3.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer
-fvp_mps2.dma3.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response
-fvp_mps2.dma3.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay
-fvp_mps2.iotss_cpuidentity.debugger_master_id=0xFFFFFFFF  # (int   , init-time) default = '0xFFFFFFFF' :  : [0x0..0xFFFFFFFF]
-#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_DSP_FP_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_DSP_FP_config.txt
deleted file mode 100644
index 8ff1d62..0000000
--- a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_DSP_FP_config.txt
+++ /dev/null
@@ -1,183 +0,0 @@
-# Parameters:
-# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
-#----------------------------------------------------------------------------------------------
-cpu0.FPU=1                                            # (bool  , init-time) default = '1'      : Set whether the model has VFP support
-cpu0.DSP=1                                            # (bool  , init-time) default = '1'      : Set whether the model has the DSP extension
-cpu0.semihosting-enable=0                             # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
-cpu0.MPU_S=0x8                                        # (int   , init-time) default = '0x8'    : Number of regions in the Secure MPU. If Security Extentions are absent, this is ignored : [0x0..0x10]
-cpu0.MPU_NS=0x8                                       # (int   , init-time) default = '0x8'    : Number of regions in the Non-Secure MPU. If Security Extentions are absent, this is the total number of MPU regions : [0x0..0x10]
-cpu0.ITM=0                                            # (bool  , init-time) default = '1'      : Level of instrumentation trace supported. false : No ITM trace included, true: ITM trace included
-cpu0.IRQLVL=0x3                                       # (int   , init-time) default = '0x3'    : Number of bits of interrupt priority : [0x3..0x8]
-cpu0.BIGENDINIT=0                                     # (bool  , init-time) default = '0'      : Initialize processor to big endian mode
-cpu0.INITSVTOR=0x00000000                             # (int   , init-time) default = '0x10000000' : Secure vector-table offset at reset : [0x0..0xFFFFFF80]
-cpu0.INITNSVTOR=0x0                                   # (int   , init-time) default = '0x0'    : Non-Secure vector-table offset at reset : [0x0..0xFFFFFF80]
-cpu0.SAU=0x0                                          # (int   , init-time) default = '0x4'    : Number of SAU regions (0 => no SAU) : [0x0..0x8]
-cpu0.SAU_CTRL.ENABLE=0                                # (bool  , init-time) default = '0'      : Enable SAU at reset
-cpu0.SAU_CTRL.ALLNS=0                                 # (bool  , init-time) default = '0'      : At reset, the SAU treats entire memory space as NS when the SAU is disabled if this is set
-cpu0.NUM_IDAU_REGION=0x0                              # (int   , init-time) default = '0xA'    : 
-cpu0.LOCK_SAU=0                                       # (bool  , init-time) default = '0'      : Lock down of SAU registers write
-cpu0.LOCK_S_MPU=0                                     # (bool  , init-time) default = '0'      : Lock down of Secure MPU registers write
-cpu0.LOCK_NS_MPU=0                                    # (bool  , init-time) default = '0'      : Lock down of Non-Secure MPU registers write
-cpu0.CPIF=1                                           # (bool  , init-time) default = '1'      : Specifies whether the external coprocessor interface is included
-cpu0.SECEXT=0                                         # (bool  , init-time) default = '1'      : Whether the ARMv8-M Security Extensions are included
-fvp_mps2.DISABLE_GATING=1                             # (bool  , init-time) default = '0'      : Disable Memory gating logic
-fvp_mps2.NUM_IDAU_REGION=0x0                          # (int   , init-time) default = '0xA'    : 
-fvp_mps2.SCC_ID.Variant=0x0                           # (int   , init-time) default = '0x0'    : SCC_ID[23:20], X in the FGPA version 'rXpY' : [0x0..0xF]
-fvp_mps2.SCC_ID.Revision=0x1                          # (int   , init-time) default = '0x1'    : SCC_ID[3:0], Y in the FGPA version 'rXpY' : [0x0..0xF]
-fvp_mps2.platform_type=0x0                            # (int   , init-time) default = '0x0'    : 0:MPS2 ; 1:IoT Kit ; 2:Castor : [0x0..0x2]
-fvp_mps2.extra_psram=0                                # (bool  , init-time) default = '0'      : Increases PSRAM to 32Mb
-fvp_mps2.UART2.out_file=""                            # (string, init-time) default = ''       : Output file to hold data written by the UART (use '-' to send all output to stdout)
-fvp_mps2.UART2.in_file=""                             # (string, init-time) default = ''       : Input file for data to be read by the UART
-fvp_mps2.UART2.unbuffered_output=0                    # (bool  , init-time) default = '0'      : Unbuffered output
-fvp_mps2.UART2.in_file_escape_sequence="##"           # (string, init-time) default = '##'     : Input file escape sequence
-fvp_mps2.UART2.shutdown_on_eot=0                      # (bool  , init-time) default = '0'      : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available)
-fvp_mps2.UART2.shutdown_tag=""                        # (string, run-time ) default = ''       : Shutdown simulation when a string is transmitted
-fvp_mps2.UART1.out_file=""                            # (string, init-time) default = ''       : Output file to hold data written by the UART (use '-' to send all output to stdout)
-fvp_mps2.UART1.in_file=""                             # (string, init-time) default = ''       : Input file for data to be read by the UART
-fvp_mps2.UART1.unbuffered_output=0                    # (bool  , init-time) default = '0'      : Unbuffered output
-fvp_mps2.UART1.in_file_escape_sequence="##"           # (string, init-time) default = '##'     : Input file escape sequence
-fvp_mps2.UART1.shutdown_on_eot=0                      # (bool  , init-time) default = '0'      : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available)
-fvp_mps2.UART1.shutdown_tag=""                        # (string, run-time ) default = ''       : Shutdown simulation when a string is transmitted
-fvp_mps2.mps2_visualisation.rate_limit-enable=1       # (bool  , init-time) default = '1'      : Rate limit simulation.
-fvp_mps2.mps2_visualisation.disable-visualisation=0   # (bool  , init-time) default = '0'      : Enable/disable visualisation
-fvp_mps2.mps2_visualisation.window_title="CLCD %cpu%"  # (string, init-time) default = 'CLCD %cpu%' : Window title (%cpu% is replaced by cpu_name)
-fvp_mps2.mps2_visualisation.idler.delay_ms=0x32       # (int   , init-time) default = '0x32'   : Determines the period, in milliseconds of real time, between gui_callback() calls.
-fvp_mps2.telnetterminal0.mode="telnet"                # (string, init-time) default = 'telnet' : Terminal initialisation mode
-fvp_mps2.telnetterminal0.start_telnet=1               # (bool  , init-time) default = '1'      : Start telnet if nothing connected
-fvp_mps2.telnetterminal0.start_port=0x1388            # (int   , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF]
-fvp_mps2.telnetterminal0.quiet=0                      # (bool  , init-time) default = '0'      : Avoid output on stdout/stderr
-fvp_mps2.telnetterminal0.terminal_command=""          # (string, init-time) default = ''       : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows)
-fvp_mps2.telnetterminal1.mode="telnet"                # (string, init-time) default = 'telnet' : Terminal initialisation mode
-fvp_mps2.telnetterminal1.start_telnet=1               # (bool  , init-time) default = '1'      : Start telnet if nothing connected
-fvp_mps2.telnetterminal1.start_port=0x1388            # (int   , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF]
-fvp_mps2.telnetterminal1.quiet=0                      # (bool  , init-time) default = '0'      : Avoid output on stdout/stderr
-fvp_mps2.telnetterminal1.terminal_command=""          # (string, init-time) default = ''       : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows)
-fvp_mps2.telnetterminal2.mode="telnet"                # (string, init-time) default = 'telnet' : Terminal initialisation mode
-fvp_mps2.telnetterminal2.start_telnet=1               # (bool  , init-time) default = '1'      : Start telnet if nothing connected
-fvp_mps2.telnetterminal2.start_port=0x1388            # (int   , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF]
-fvp_mps2.telnetterminal2.quiet=0                      # (bool  , init-time) default = '0'      : Avoid output on stdout/stderr
-fvp_mps2.telnetterminal2.terminal_command=""          # (string, init-time) default = ''       : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows)
-fvp_mps2.PSRAM_M7.size=0x100000000                    # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.PSRAM_M7.fill1=0xDFDFDFCF                    # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.PSRAM_M7.fill2=0xCFDFDFDF                    # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.UART0.out_file=""                            # (string, init-time) default = ''       : Output file to hold data written by the UART (use '-' to send all output to stdout)
-fvp_mps2.UART0.in_file=""                             # (string, init-time) default = ''       : Input file for data to be read by the UART
-fvp_mps2.UART0.unbuffered_output=0                    # (bool  , init-time) default = '0'      : Unbuffered output
-fvp_mps2.UART0.in_file_escape_sequence="##"           # (string, init-time) default = '##'     : Input file escape sequence
-fvp_mps2.UART0.shutdown_on_eot=0                      # (bool  , init-time) default = '0'      : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available)
-fvp_mps2.UART0.shutdown_tag=""                        # (string, run-time ) default = ''       : Shutdown simulation when a string is transmitted
-fvp_mps2.cmsdk_watchdog.simhalt=0                     # (bool  , run-time ) default = '0'      : Halt on reset.
-fvp_mps2.s32k_watchdog.simhalt=0                      # (bool  , run-time ) default = '0'      : Halt on reset.
-fvp_mps2.secure_watchdog.simhalt=0                    # (bool  , run-time ) default = '0'      : Halt on reset.
-fvp_mps2.nonsecure_watchdog.simhalt=0                 # (bool  , run-time ) default = '0'      : Halt on reset.
-fvp_mps2.PSRAM.size=0x100000000                       # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.PSRAM.fill1=0xDFDFDFCF                       # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.PSRAM.fill2=0xCFDFDFDF                       # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.ssram2.size=0x100000000                      # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.ssram2.fill1=0xDFDFDFCF                      # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.ssram2.fill2=0xCFDFDFDF                      # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.ssram1.size=0x100000000                      # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.ssram1.fill1=0xDFDFDFCF                      # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.ssram1.fill2=0xCFDFDFDF                      # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.stub.size=0x100000000                        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram0.size=0x100000000        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram0.fill1=0xDFDFDFCF        # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram0.fill2=0xCFDFDFDF        # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram1.size=0x100000000        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram1.fill1=0xDFDFDFCF        # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram1.fill2=0xCFDFDFDF        # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram2.size=0x100000000        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram2.fill1=0xDFDFDFCF        # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram2.fill2=0xCFDFDFDF        # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram3.size=0x100000000        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram3.fill1=0xDFDFDFCF        # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram3.fill2=0xCFDFDFDF        # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.sys_ppu.use_active_signal=0                  # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.sys_ppu.revision="r0p0"                      # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cpu0core_ppu.revision="r0p0"                 # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cpu0dbg_ppu.revision="r0p0"                  # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cpu1core_ppu.use_active_signal=0             # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.cpu1core_ppu.revision="r0p0"                 # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cpu1dbg_ppu.use_active_signal=0              # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.cpu1dbg_ppu.revision="r0p0"                  # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.crypto_ppu.use_active_signal=0               # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.crypto_ppu.revision="r0p0"                   # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cordio_ppu.use_active_signal=0               # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.cordio_ppu.revision="r0p0"                   # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.dbg_ppu.use_active_signal=0                  # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.dbg_ppu.revision="r0p0"                      # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.ram0_ppu.use_active_signal=0                 # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.ram0_ppu.revision="r0p0"                     # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.ram1_ppu.use_active_signal=0                 # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.ram1_ppu.revision="r0p0"                     # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.ram2_ppu.use_active_signal=0                 # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.ram2_ppu.revision="r0p0"                     # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.ram3_ppu.use_active_signal=0                 # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.ram3_ppu.revision="r0p0"                     # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.smsc_91c111.enabled=0                        # (bool  , init-time) default = '0'      : Host interface connection enabled
-fvp_mps2.smsc_91c111.mac_address="00:02:f7:ef:5d:a2"  # (string, init-time) default = '00:02:f7:ef:5d:a2' : Host/model MAC address
-fvp_mps2.smsc_91c111.promiscuous=1                    # (bool  , init-time) default = '1'      : Put host into promiscuous mode
-fvp_mps2.hostbridge.interfaceName="ARM0"              # (string, init-time) default = 'ARM0'   : Host Interface
-fvp_mps2.hostbridge.userNetworking=0                  # (bool  , init-time) default = '0'      : Enable user-mode networking
-fvp_mps2.hostbridge.userNetSubnet="172.20.51.0/24"    # (string, init-time) default = '172.20.51.0/24' : Virtual subnet for user-mode networking
-fvp_mps2.hostbridge.userNetPorts=""                   # (string, init-time) default = ''       : Listening ports to expose in user-mode networking
-fvp_mps2.secure_control_register_block.FLASH_BLOCK_CFG=0x3  # (int   , init-time) default = '0x3'    : Flash Block size configuration : [0x0..0x31]
-fvp_mps2.secure_control_register_block.SRAM_BLOCK_CFG=0x3  # (int   , init-time) default = '0x3'    : SRAM Block size configuration : [0x0..0x31]
-fvp_mps2.secure_control_register_block.FLASH_WATERMARK_SUPPORTED=1  # (bool  , init-time) default = '1'      : Flash Watermark supported
-fvp_mps2.secure_control_register_block.SRAM_WATERMARK_SUPPORTED=1  # (bool  , init-time) default = '1'      : SRAM Watermark supported
-fvp_mps2.exclusive_monitor_psram.enable_component=1   # (bool  , init-time) default = '1'      : Enable component
-fvp_mps2.exclusive_monitor_psram.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]
-fvp_mps2.exclusive_monitor_psram.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]
-fvp_mps2.exclusive_monitor_psram.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master
-fvp_mps2.exclusive_monitor_psram.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit
-fvp_mps2.exclusive_monitor_psram.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]
-fvp_mps2.exclusive_monitor_psram.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores
-fvp_mps2.exclusive_monitor_zbtsram1.enable_component=1  # (bool  , init-time) default = '1'      : Enable component
-fvp_mps2.exclusive_monitor_zbtsram1.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]
-fvp_mps2.exclusive_monitor_zbtsram1.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]
-fvp_mps2.exclusive_monitor_zbtsram1.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master
-fvp_mps2.exclusive_monitor_zbtsram1.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit
-fvp_mps2.exclusive_monitor_zbtsram1.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]
-fvp_mps2.exclusive_monitor_zbtsram1.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores
-fvp_mps2.exclusive_monitor_zbtsram2.enable_component=1  # (bool  , init-time) default = '1'      : Enable component
-fvp_mps2.exclusive_monitor_zbtsram2.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]
-fvp_mps2.exclusive_monitor_zbtsram2.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]
-fvp_mps2.exclusive_monitor_zbtsram2.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master
-fvp_mps2.exclusive_monitor_zbtsram2.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit
-fvp_mps2.exclusive_monitor_zbtsram2.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]
-fvp_mps2.exclusive_monitor_zbtsram2.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores
-fvp_mps2.exclusive_monitor_iotss_internal_sram.enable_component=1  # (bool  , init-time) default = '1'      : Enable component
-fvp_mps2.exclusive_monitor_iotss_internal_sram.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]
-fvp_mps2.exclusive_monitor_iotss_internal_sram.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]
-fvp_mps2.exclusive_monitor_iotss_internal_sram.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master
-fvp_mps2.exclusive_monitor_iotss_internal_sram.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit
-fvp_mps2.exclusive_monitor_iotss_internal_sram.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]
-fvp_mps2.exclusive_monitor_iotss_internal_sram.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores
-fvp_mps2.dma0_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S
-fvp_mps2.dma0_securitymodifier.behaviour_s_to_ns=0x0  # (int   , init-time) default = '0x0'    : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS
-fvp_mps2.dma1_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S
-fvp_mps2.dma1_securitymodifier.behaviour_s_to_ns=0x0  # (int   , init-time) default = '0x0'    : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS
-fvp_mps2.dma2_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S
-fvp_mps2.dma2_securitymodifier.behaviour_s_to_ns=0x0  # (int   , init-time) default = '0x0'    : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS
-fvp_mps2.dma3_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S
-fvp_mps2.dma3_securitymodifier.behaviour_s_to_ns=0x0  # (int   , init-time) default = '0x0'    : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS
-fvp_mps2.dma0.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes
-fvp_mps2.dma0.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer
-fvp_mps2.dma0.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response
-fvp_mps2.dma0.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay
-fvp_mps2.dma1.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes
-fvp_mps2.dma1.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer
-fvp_mps2.dma1.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response
-fvp_mps2.dma1.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay
-fvp_mps2.dma2.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes
-fvp_mps2.dma2.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer
-fvp_mps2.dma2.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response
-fvp_mps2.dma2.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay
-fvp_mps2.dma3.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes
-fvp_mps2.dma3.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer
-fvp_mps2.dma3.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response
-fvp_mps2.dma3.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay
-fvp_mps2.iotss_systemcontrol.cpu0wait=0               # (bool  , init-time) default = '0'      : Whether to hold cpu1 in reset at boot
-fvp_mps2.iotss_systemcontrol.cpu1wait=1               # (bool  , init-time) default = '1'      : Whether to hold cpu1 in reset at boot
-fvp_mps2.iotss_cpuidentity.debugger_master_id=0xFFFFFFFF  # (int   , init-time) default = '0xFFFFFFFF' :  : [0x0..0xFFFFFFFF]
-#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_DSP_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_DSP_config.txt
deleted file mode 100644
index e6f8798..0000000
--- a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_DSP_config.txt
+++ /dev/null
@@ -1,183 +0,0 @@
-# Parameters:
-# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
-#----------------------------------------------------------------------------------------------
-cpu0.FPU=0                                            # (bool  , init-time) default = '1'      : Set whether the model has VFP support
-cpu0.DSP=1                                            # (bool  , init-time) default = '1'      : Set whether the model has the DSP extension
-cpu0.semihosting-enable=0                             # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
-cpu0.MPU_S=0x8                                        # (int   , init-time) default = '0x8'    : Number of regions in the Secure MPU. If Security Extentions are absent, this is ignored : [0x0..0x10]
-cpu0.MPU_NS=0x8                                       # (int   , init-time) default = '0x8'    : Number of regions in the Non-Secure MPU. If Security Extentions are absent, this is the total number of MPU regions : [0x0..0x10]
-cpu0.ITM=0                                            # (bool  , init-time) default = '1'      : Level of instrumentation trace supported. false : No ITM trace included, true: ITM trace included
-cpu0.IRQLVL=0x3                                       # (int   , init-time) default = '0x3'    : Number of bits of interrupt priority : [0x3..0x8]
-cpu0.BIGENDINIT=0                                     # (bool  , init-time) default = '0'      : Initialize processor to big endian mode
-cpu0.INITSVTOR=0x00000000                             # (int   , init-time) default = '0x10000000' : Secure vector-table offset at reset : [0x0..0xFFFFFF80]
-cpu0.INITNSVTOR=0x0                                   # (int   , init-time) default = '0x0'    : Non-Secure vector-table offset at reset : [0x0..0xFFFFFF80]
-cpu0.SAU=0x0                                          # (int   , init-time) default = '0x4'    : Number of SAU regions (0 => no SAU) : [0x0..0x8]
-cpu0.SAU_CTRL.ENABLE=0                                # (bool  , init-time) default = '0'      : Enable SAU at reset
-cpu0.SAU_CTRL.ALLNS=0                                 # (bool  , init-time) default = '0'      : At reset, the SAU treats entire memory space as NS when the SAU is disabled if this is set
-cpu0.NUM_IDAU_REGION=0x0                              # (int   , init-time) default = '0xA'    : 
-cpu0.LOCK_SAU=0                                       # (bool  , init-time) default = '0'      : Lock down of SAU registers write
-cpu0.LOCK_S_MPU=0                                     # (bool  , init-time) default = '0'      : Lock down of Secure MPU registers write
-cpu0.LOCK_NS_MPU=0                                    # (bool  , init-time) default = '0'      : Lock down of Non-Secure MPU registers write
-cpu0.CPIF=1                                           # (bool  , init-time) default = '1'      : Specifies whether the external coprocessor interface is included
-cpu0.SECEXT=0                                         # (bool  , init-time) default = '1'      : Whether the ARMv8-M Security Extensions are included
-fvp_mps2.DISABLE_GATING=1                             # (bool  , init-time) default = '0'      : Disable Memory gating logic
-fvp_mps2.NUM_IDAU_REGION=0x0                          # (int   , init-time) default = '0xA'    : 
-fvp_mps2.SCC_ID.Variant=0x0                           # (int   , init-time) default = '0x0'    : SCC_ID[23:20], X in the FGPA version 'rXpY' : [0x0..0xF]
-fvp_mps2.SCC_ID.Revision=0x1                          # (int   , init-time) default = '0x1'    : SCC_ID[3:0], Y in the FGPA version 'rXpY' : [0x0..0xF]
-fvp_mps2.platform_type=0x0                            # (int   , init-time) default = '0x0'    : 0:MPS2 ; 1:IoT Kit ; 2:Castor : [0x0..0x2]
-fvp_mps2.extra_psram=0                                # (bool  , init-time) default = '0'      : Increases PSRAM to 32Mb
-fvp_mps2.UART2.out_file=""                            # (string, init-time) default = ''       : Output file to hold data written by the UART (use '-' to send all output to stdout)
-fvp_mps2.UART2.in_file=""                             # (string, init-time) default = ''       : Input file for data to be read by the UART
-fvp_mps2.UART2.unbuffered_output=0                    # (bool  , init-time) default = '0'      : Unbuffered output
-fvp_mps2.UART2.in_file_escape_sequence="##"           # (string, init-time) default = '##'     : Input file escape sequence
-fvp_mps2.UART2.shutdown_on_eot=0                      # (bool  , init-time) default = '0'      : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available)
-fvp_mps2.UART2.shutdown_tag=""                        # (string, run-time ) default = ''       : Shutdown simulation when a string is transmitted
-fvp_mps2.UART1.out_file=""                            # (string, init-time) default = ''       : Output file to hold data written by the UART (use '-' to send all output to stdout)
-fvp_mps2.UART1.in_file=""                             # (string, init-time) default = ''       : Input file for data to be read by the UART
-fvp_mps2.UART1.unbuffered_output=0                    # (bool  , init-time) default = '0'      : Unbuffered output
-fvp_mps2.UART1.in_file_escape_sequence="##"           # (string, init-time) default = '##'     : Input file escape sequence
-fvp_mps2.UART1.shutdown_on_eot=0                      # (bool  , init-time) default = '0'      : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available)
-fvp_mps2.UART1.shutdown_tag=""                        # (string, run-time ) default = ''       : Shutdown simulation when a string is transmitted
-fvp_mps2.mps2_visualisation.rate_limit-enable=1       # (bool  , init-time) default = '1'      : Rate limit simulation.
-fvp_mps2.mps2_visualisation.disable-visualisation=0   # (bool  , init-time) default = '0'      : Enable/disable visualisation
-fvp_mps2.mps2_visualisation.window_title="CLCD %cpu%"  # (string, init-time) default = 'CLCD %cpu%' : Window title (%cpu% is replaced by cpu_name)
-fvp_mps2.mps2_visualisation.idler.delay_ms=0x32       # (int   , init-time) default = '0x32'   : Determines the period, in milliseconds of real time, between gui_callback() calls.
-fvp_mps2.telnetterminal0.mode="telnet"                # (string, init-time) default = 'telnet' : Terminal initialisation mode
-fvp_mps2.telnetterminal0.start_telnet=1               # (bool  , init-time) default = '1'      : Start telnet if nothing connected
-fvp_mps2.telnetterminal0.start_port=0x1388            # (int   , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF]
-fvp_mps2.telnetterminal0.quiet=0                      # (bool  , init-time) default = '0'      : Avoid output on stdout/stderr
-fvp_mps2.telnetterminal0.terminal_command=""          # (string, init-time) default = ''       : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows)
-fvp_mps2.telnetterminal1.mode="telnet"                # (string, init-time) default = 'telnet' : Terminal initialisation mode
-fvp_mps2.telnetterminal1.start_telnet=1               # (bool  , init-time) default = '1'      : Start telnet if nothing connected
-fvp_mps2.telnetterminal1.start_port=0x1388            # (int   , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF]
-fvp_mps2.telnetterminal1.quiet=0                      # (bool  , init-time) default = '0'      : Avoid output on stdout/stderr
-fvp_mps2.telnetterminal1.terminal_command=""          # (string, init-time) default = ''       : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows)
-fvp_mps2.telnetterminal2.mode="telnet"                # (string, init-time) default = 'telnet' : Terminal initialisation mode
-fvp_mps2.telnetterminal2.start_telnet=1               # (bool  , init-time) default = '1'      : Start telnet if nothing connected
-fvp_mps2.telnetterminal2.start_port=0x1388            # (int   , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF]
-fvp_mps2.telnetterminal2.quiet=0                      # (bool  , init-time) default = '0'      : Avoid output on stdout/stderr
-fvp_mps2.telnetterminal2.terminal_command=""          # (string, init-time) default = ''       : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows)
-fvp_mps2.PSRAM_M7.size=0x100000000                    # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.PSRAM_M7.fill1=0xDFDFDFCF                    # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.PSRAM_M7.fill2=0xCFDFDFDF                    # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.UART0.out_file=""                            # (string, init-time) default = ''       : Output file to hold data written by the UART (use '-' to send all output to stdout)
-fvp_mps2.UART0.in_file=""                             # (string, init-time) default = ''       : Input file for data to be read by the UART
-fvp_mps2.UART0.unbuffered_output=0                    # (bool  , init-time) default = '0'      : Unbuffered output
-fvp_mps2.UART0.in_file_escape_sequence="##"           # (string, init-time) default = '##'     : Input file escape sequence
-fvp_mps2.UART0.shutdown_on_eot=0                      # (bool  , init-time) default = '0'      : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available)
-fvp_mps2.UART0.shutdown_tag=""                        # (string, run-time ) default = ''       : Shutdown simulation when a string is transmitted
-fvp_mps2.cmsdk_watchdog.simhalt=0                     # (bool  , run-time ) default = '0'      : Halt on reset.
-fvp_mps2.s32k_watchdog.simhalt=0                      # (bool  , run-time ) default = '0'      : Halt on reset.
-fvp_mps2.secure_watchdog.simhalt=0                    # (bool  , run-time ) default = '0'      : Halt on reset.
-fvp_mps2.nonsecure_watchdog.simhalt=0                 # (bool  , run-time ) default = '0'      : Halt on reset.
-fvp_mps2.PSRAM.size=0x100000000                       # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.PSRAM.fill1=0xDFDFDFCF                       # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.PSRAM.fill2=0xCFDFDFDF                       # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.ssram2.size=0x100000000                      # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.ssram2.fill1=0xDFDFDFCF                      # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.ssram2.fill2=0xCFDFDFDF                      # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.ssram1.size=0x100000000                      # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.ssram1.fill1=0xDFDFDFCF                      # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.ssram1.fill2=0xCFDFDFDF                      # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.stub.size=0x100000000                        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram0.size=0x100000000        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram0.fill1=0xDFDFDFCF        # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram0.fill2=0xCFDFDFDF        # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram1.size=0x100000000        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram1.fill1=0xDFDFDFCF        # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram1.fill2=0xCFDFDFDF        # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram2.size=0x100000000        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram2.fill1=0xDFDFDFCF        # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram2.fill2=0xCFDFDFDF        # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram3.size=0x100000000        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram3.fill1=0xDFDFDFCF        # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram3.fill2=0xCFDFDFDF        # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.sys_ppu.use_active_signal=0                  # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.sys_ppu.revision="r0p0"                      # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cpu0core_ppu.revision="r0p0"                 # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cpu0dbg_ppu.revision="r0p0"                  # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cpu1core_ppu.use_active_signal=0             # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.cpu1core_ppu.revision="r0p0"                 # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cpu1dbg_ppu.use_active_signal=0              # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.cpu1dbg_ppu.revision="r0p0"                  # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.crypto_ppu.use_active_signal=0               # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.crypto_ppu.revision="r0p0"                   # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cordio_ppu.use_active_signal=0               # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.cordio_ppu.revision="r0p0"                   # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.dbg_ppu.use_active_signal=0                  # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.dbg_ppu.revision="r0p0"                      # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.ram0_ppu.use_active_signal=0                 # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.ram0_ppu.revision="r0p0"                     # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.ram1_ppu.use_active_signal=0                 # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.ram1_ppu.revision="r0p0"                     # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.ram2_ppu.use_active_signal=0                 # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.ram2_ppu.revision="r0p0"                     # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.ram3_ppu.use_active_signal=0                 # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.ram3_ppu.revision="r0p0"                     # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.smsc_91c111.enabled=0                        # (bool  , init-time) default = '0'      : Host interface connection enabled
-fvp_mps2.smsc_91c111.mac_address="00:02:f7:ef:5d:a2"  # (string, init-time) default = '00:02:f7:ef:5d:a2' : Host/model MAC address
-fvp_mps2.smsc_91c111.promiscuous=1                    # (bool  , init-time) default = '1'      : Put host into promiscuous mode
-fvp_mps2.hostbridge.interfaceName="ARM0"              # (string, init-time) default = 'ARM0'   : Host Interface
-fvp_mps2.hostbridge.userNetworking=0                  # (bool  , init-time) default = '0'      : Enable user-mode networking
-fvp_mps2.hostbridge.userNetSubnet="172.20.51.0/24"    # (string, init-time) default = '172.20.51.0/24' : Virtual subnet for user-mode networking
-fvp_mps2.hostbridge.userNetPorts=""                   # (string, init-time) default = ''       : Listening ports to expose in user-mode networking
-fvp_mps2.secure_control_register_block.FLASH_BLOCK_CFG=0x3  # (int   , init-time) default = '0x3'    : Flash Block size configuration : [0x0..0x31]
-fvp_mps2.secure_control_register_block.SRAM_BLOCK_CFG=0x3  # (int   , init-time) default = '0x3'    : SRAM Block size configuration : [0x0..0x31]
-fvp_mps2.secure_control_register_block.FLASH_WATERMARK_SUPPORTED=1  # (bool  , init-time) default = '1'      : Flash Watermark supported
-fvp_mps2.secure_control_register_block.SRAM_WATERMARK_SUPPORTED=1  # (bool  , init-time) default = '1'      : SRAM Watermark supported
-fvp_mps2.exclusive_monitor_psram.enable_component=1   # (bool  , init-time) default = '1'      : Enable component
-fvp_mps2.exclusive_monitor_psram.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]
-fvp_mps2.exclusive_monitor_psram.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]
-fvp_mps2.exclusive_monitor_psram.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master
-fvp_mps2.exclusive_monitor_psram.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit
-fvp_mps2.exclusive_monitor_psram.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]
-fvp_mps2.exclusive_monitor_psram.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores
-fvp_mps2.exclusive_monitor_zbtsram1.enable_component=1  # (bool  , init-time) default = '1'      : Enable component
-fvp_mps2.exclusive_monitor_zbtsram1.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]
-fvp_mps2.exclusive_monitor_zbtsram1.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]
-fvp_mps2.exclusive_monitor_zbtsram1.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master
-fvp_mps2.exclusive_monitor_zbtsram1.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit
-fvp_mps2.exclusive_monitor_zbtsram1.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]
-fvp_mps2.exclusive_monitor_zbtsram1.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores
-fvp_mps2.exclusive_monitor_zbtsram2.enable_component=1  # (bool  , init-time) default = '1'      : Enable component
-fvp_mps2.exclusive_monitor_zbtsram2.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]
-fvp_mps2.exclusive_monitor_zbtsram2.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]
-fvp_mps2.exclusive_monitor_zbtsram2.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master
-fvp_mps2.exclusive_monitor_zbtsram2.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit
-fvp_mps2.exclusive_monitor_zbtsram2.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]
-fvp_mps2.exclusive_monitor_zbtsram2.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores
-fvp_mps2.exclusive_monitor_iotss_internal_sram.enable_component=1  # (bool  , init-time) default = '1'      : Enable component
-fvp_mps2.exclusive_monitor_iotss_internal_sram.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]
-fvp_mps2.exclusive_monitor_iotss_internal_sram.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]
-fvp_mps2.exclusive_monitor_iotss_internal_sram.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master
-fvp_mps2.exclusive_monitor_iotss_internal_sram.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit
-fvp_mps2.exclusive_monitor_iotss_internal_sram.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]
-fvp_mps2.exclusive_monitor_iotss_internal_sram.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores
-fvp_mps2.dma0_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S
-fvp_mps2.dma0_securitymodifier.behaviour_s_to_ns=0x0  # (int   , init-time) default = '0x0'    : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS
-fvp_mps2.dma1_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S
-fvp_mps2.dma1_securitymodifier.behaviour_s_to_ns=0x0  # (int   , init-time) default = '0x0'    : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS
-fvp_mps2.dma2_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S
-fvp_mps2.dma2_securitymodifier.behaviour_s_to_ns=0x0  # (int   , init-time) default = '0x0'    : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS
-fvp_mps2.dma3_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S
-fvp_mps2.dma3_securitymodifier.behaviour_s_to_ns=0x0  # (int   , init-time) default = '0x0'    : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS
-fvp_mps2.dma0.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes
-fvp_mps2.dma0.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer
-fvp_mps2.dma0.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response
-fvp_mps2.dma0.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay
-fvp_mps2.dma1.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes
-fvp_mps2.dma1.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer
-fvp_mps2.dma1.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response
-fvp_mps2.dma1.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay
-fvp_mps2.dma2.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes
-fvp_mps2.dma2.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer
-fvp_mps2.dma2.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response
-fvp_mps2.dma2.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay
-fvp_mps2.dma3.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes
-fvp_mps2.dma3.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer
-fvp_mps2.dma3.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response
-fvp_mps2.dma3.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay
-fvp_mps2.iotss_systemcontrol.cpu0wait=0               # (bool  , init-time) default = '0'      : Whether to hold cpu1 in reset at boot
-fvp_mps2.iotss_systemcontrol.cpu1wait=1               # (bool  , init-time) default = '1'      : Whether to hold cpu1 in reset at boot
-fvp_mps2.iotss_cpuidentity.debugger_master_id=0xFFFFFFFF  # (int   , init-time) default = '0xFFFFFFFF' :  : [0x0..0xFFFFFFFF]
-#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_FP_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_FP_config.txt
deleted file mode 100644
index 5c562f2..0000000
--- a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_FP_config.txt
+++ /dev/null
@@ -1,183 +0,0 @@
-# Parameters:
-# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
-#----------------------------------------------------------------------------------------------
-cpu0.FPU=1                                            # (bool  , init-time) default = '1'      : Set whether the model has VFP support
-cpu0.DSP=0                                            # (bool  , init-time) default = '1'      : Set whether the model has the DSP extension
-cpu0.semihosting-enable=0                             # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
-cpu0.MPU_S=0x8                                        # (int   , init-time) default = '0x8'    : Number of regions in the Secure MPU. If Security Extentions are absent, this is ignored : [0x0..0x10]
-cpu0.MPU_NS=0x8                                       # (int   , init-time) default = '0x8'    : Number of regions in the Non-Secure MPU. If Security Extentions are absent, this is the total number of MPU regions : [0x0..0x10]
-cpu0.ITM=0                                            # (bool  , init-time) default = '1'      : Level of instrumentation trace supported. false : No ITM trace included, true: ITM trace included
-cpu0.IRQLVL=0x3                                       # (int   , init-time) default = '0x3'    : Number of bits of interrupt priority : [0x3..0x8]
-cpu0.BIGENDINIT=0                                     # (bool  , init-time) default = '0'      : Initialize processor to big endian mode
-cpu0.INITSVTOR=0x00000000                             # (int   , init-time) default = '0x10000000' : Secure vector-table offset at reset : [0x0..0xFFFFFF80]
-cpu0.INITNSVTOR=0x0                                   # (int   , init-time) default = '0x0'    : Non-Secure vector-table offset at reset : [0x0..0xFFFFFF80]
-cpu0.SAU=0x0                                          # (int   , init-time) default = '0x4'    : Number of SAU regions (0 => no SAU) : [0x0..0x8]
-cpu0.SAU_CTRL.ENABLE=0                                # (bool  , init-time) default = '0'      : Enable SAU at reset
-cpu0.SAU_CTRL.ALLNS=0                                 # (bool  , init-time) default = '0'      : At reset, the SAU treats entire memory space as NS when the SAU is disabled if this is set
-cpu0.NUM_IDAU_REGION=0x0                              # (int   , init-time) default = '0xA'    : 
-cpu0.LOCK_SAU=0                                       # (bool  , init-time) default = '0'      : Lock down of SAU registers write
-cpu0.LOCK_S_MPU=0                                     # (bool  , init-time) default = '0'      : Lock down of Secure MPU registers write
-cpu0.LOCK_NS_MPU=0                                    # (bool  , init-time) default = '0'      : Lock down of Non-Secure MPU registers write
-cpu0.CPIF=1                                           # (bool  , init-time) default = '1'      : Specifies whether the external coprocessor interface is included
-cpu0.SECEXT=0                                         # (bool  , init-time) default = '1'      : Whether the ARMv8-M Security Extensions are included
-fvp_mps2.DISABLE_GATING=1                             # (bool  , init-time) default = '0'      : Disable Memory gating logic
-fvp_mps2.NUM_IDAU_REGION=0x0                          # (int   , init-time) default = '0xA'    : 
-fvp_mps2.SCC_ID.Variant=0x0                           # (int   , init-time) default = '0x0'    : SCC_ID[23:20], X in the FGPA version 'rXpY' : [0x0..0xF]
-fvp_mps2.SCC_ID.Revision=0x1                          # (int   , init-time) default = '0x1'    : SCC_ID[3:0], Y in the FGPA version 'rXpY' : [0x0..0xF]
-fvp_mps2.platform_type=0x0                            # (int   , init-time) default = '0x0'    : 0:MPS2 ; 1:IoT Kit ; 2:Castor : [0x0..0x2]
-fvp_mps2.extra_psram=0                                # (bool  , init-time) default = '0'      : Increases PSRAM to 32Mb
-fvp_mps2.UART2.out_file=""                            # (string, init-time) default = ''       : Output file to hold data written by the UART (use '-' to send all output to stdout)
-fvp_mps2.UART2.in_file=""                             # (string, init-time) default = ''       : Input file for data to be read by the UART
-fvp_mps2.UART2.unbuffered_output=0                    # (bool  , init-time) default = '0'      : Unbuffered output
-fvp_mps2.UART2.in_file_escape_sequence="##"           # (string, init-time) default = '##'     : Input file escape sequence
-fvp_mps2.UART2.shutdown_on_eot=0                      # (bool  , init-time) default = '0'      : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available)
-fvp_mps2.UART2.shutdown_tag=""                        # (string, run-time ) default = ''       : Shutdown simulation when a string is transmitted
-fvp_mps2.UART1.out_file=""                            # (string, init-time) default = ''       : Output file to hold data written by the UART (use '-' to send all output to stdout)
-fvp_mps2.UART1.in_file=""                             # (string, init-time) default = ''       : Input file for data to be read by the UART
-fvp_mps2.UART1.unbuffered_output=0                    # (bool  , init-time) default = '0'      : Unbuffered output
-fvp_mps2.UART1.in_file_escape_sequence="##"           # (string, init-time) default = '##'     : Input file escape sequence
-fvp_mps2.UART1.shutdown_on_eot=0                      # (bool  , init-time) default = '0'      : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available)
-fvp_mps2.UART1.shutdown_tag=""                        # (string, run-time ) default = ''       : Shutdown simulation when a string is transmitted
-fvp_mps2.mps2_visualisation.rate_limit-enable=1       # (bool  , init-time) default = '1'      : Rate limit simulation.
-fvp_mps2.mps2_visualisation.disable-visualisation=0   # (bool  , init-time) default = '0'      : Enable/disable visualisation
-fvp_mps2.mps2_visualisation.window_title="CLCD %cpu%"  # (string, init-time) default = 'CLCD %cpu%' : Window title (%cpu% is replaced by cpu_name)
-fvp_mps2.mps2_visualisation.idler.delay_ms=0x32       # (int   , init-time) default = '0x32'   : Determines the period, in milliseconds of real time, between gui_callback() calls.
-fvp_mps2.telnetterminal0.mode="telnet"                # (string, init-time) default = 'telnet' : Terminal initialisation mode
-fvp_mps2.telnetterminal0.start_telnet=1               # (bool  , init-time) default = '1'      : Start telnet if nothing connected
-fvp_mps2.telnetterminal0.start_port=0x1388            # (int   , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF]
-fvp_mps2.telnetterminal0.quiet=0                      # (bool  , init-time) default = '0'      : Avoid output on stdout/stderr
-fvp_mps2.telnetterminal0.terminal_command=""          # (string, init-time) default = ''       : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows)
-fvp_mps2.telnetterminal1.mode="telnet"                # (string, init-time) default = 'telnet' : Terminal initialisation mode
-fvp_mps2.telnetterminal1.start_telnet=1               # (bool  , init-time) default = '1'      : Start telnet if nothing connected
-fvp_mps2.telnetterminal1.start_port=0x1388            # (int   , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF]
-fvp_mps2.telnetterminal1.quiet=0                      # (bool  , init-time) default = '0'      : Avoid output on stdout/stderr
-fvp_mps2.telnetterminal1.terminal_command=""          # (string, init-time) default = ''       : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows)
-fvp_mps2.telnetterminal2.mode="telnet"                # (string, init-time) default = 'telnet' : Terminal initialisation mode
-fvp_mps2.telnetterminal2.start_telnet=1               # (bool  , init-time) default = '1'      : Start telnet if nothing connected
-fvp_mps2.telnetterminal2.start_port=0x1388            # (int   , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF]
-fvp_mps2.telnetterminal2.quiet=0                      # (bool  , init-time) default = '0'      : Avoid output on stdout/stderr
-fvp_mps2.telnetterminal2.terminal_command=""          # (string, init-time) default = ''       : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows)
-fvp_mps2.PSRAM_M7.size=0x100000000                    # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.PSRAM_M7.fill1=0xDFDFDFCF                    # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.PSRAM_M7.fill2=0xCFDFDFDF                    # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.UART0.out_file=""                            # (string, init-time) default = ''       : Output file to hold data written by the UART (use '-' to send all output to stdout)
-fvp_mps2.UART0.in_file=""                             # (string, init-time) default = ''       : Input file for data to be read by the UART
-fvp_mps2.UART0.unbuffered_output=0                    # (bool  , init-time) default = '0'      : Unbuffered output
-fvp_mps2.UART0.in_file_escape_sequence="##"           # (string, init-time) default = '##'     : Input file escape sequence
-fvp_mps2.UART0.shutdown_on_eot=0                      # (bool  , init-time) default = '0'      : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available)
-fvp_mps2.UART0.shutdown_tag=""                        # (string, run-time ) default = ''       : Shutdown simulation when a string is transmitted
-fvp_mps2.cmsdk_watchdog.simhalt=0                     # (bool  , run-time ) default = '0'      : Halt on reset.
-fvp_mps2.s32k_watchdog.simhalt=0                      # (bool  , run-time ) default = '0'      : Halt on reset.
-fvp_mps2.secure_watchdog.simhalt=0                    # (bool  , run-time ) default = '0'      : Halt on reset.
-fvp_mps2.nonsecure_watchdog.simhalt=0                 # (bool  , run-time ) default = '0'      : Halt on reset.
-fvp_mps2.PSRAM.size=0x100000000                       # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.PSRAM.fill1=0xDFDFDFCF                       # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.PSRAM.fill2=0xCFDFDFDF                       # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.ssram2.size=0x100000000                      # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.ssram2.fill1=0xDFDFDFCF                      # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.ssram2.fill2=0xCFDFDFDF                      # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.ssram1.size=0x100000000                      # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.ssram1.fill1=0xDFDFDFCF                      # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.ssram1.fill2=0xCFDFDFDF                      # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.stub.size=0x100000000                        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram0.size=0x100000000        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram0.fill1=0xDFDFDFCF        # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram0.fill2=0xCFDFDFDF        # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram1.size=0x100000000        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram1.fill1=0xDFDFDFCF        # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram1.fill2=0xCFDFDFDF        # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram2.size=0x100000000        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram2.fill1=0xDFDFDFCF        # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram2.fill2=0xCFDFDFDF        # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram3.size=0x100000000        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram3.fill1=0xDFDFDFCF        # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram3.fill2=0xCFDFDFDF        # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.sys_ppu.use_active_signal=0                  # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.sys_ppu.revision="r0p0"                      # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cpu0core_ppu.revision="r0p0"                 # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cpu0dbg_ppu.revision="r0p0"                  # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cpu1core_ppu.use_active_signal=0             # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.cpu1core_ppu.revision="r0p0"                 # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cpu1dbg_ppu.use_active_signal=0              # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.cpu1dbg_ppu.revision="r0p0"                  # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.crypto_ppu.use_active_signal=0               # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.crypto_ppu.revision="r0p0"                   # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cordio_ppu.use_active_signal=0               # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.cordio_ppu.revision="r0p0"                   # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.dbg_ppu.use_active_signal=0                  # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.dbg_ppu.revision="r0p0"                      # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.ram0_ppu.use_active_signal=0                 # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.ram0_ppu.revision="r0p0"                     # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.ram1_ppu.use_active_signal=0                 # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.ram1_ppu.revision="r0p0"                     # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.ram2_ppu.use_active_signal=0                 # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.ram2_ppu.revision="r0p0"                     # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.ram3_ppu.use_active_signal=0                 # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.ram3_ppu.revision="r0p0"                     # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.smsc_91c111.enabled=0                        # (bool  , init-time) default = '0'      : Host interface connection enabled
-fvp_mps2.smsc_91c111.mac_address="00:02:f7:ef:5d:a2"  # (string, init-time) default = '00:02:f7:ef:5d:a2' : Host/model MAC address
-fvp_mps2.smsc_91c111.promiscuous=1                    # (bool  , init-time) default = '1'      : Put host into promiscuous mode
-fvp_mps2.hostbridge.interfaceName="ARM0"              # (string, init-time) default = 'ARM0'   : Host Interface
-fvp_mps2.hostbridge.userNetworking=0                  # (bool  , init-time) default = '0'      : Enable user-mode networking
-fvp_mps2.hostbridge.userNetSubnet="172.20.51.0/24"    # (string, init-time) default = '172.20.51.0/24' : Virtual subnet for user-mode networking
-fvp_mps2.hostbridge.userNetPorts=""                   # (string, init-time) default = ''       : Listening ports to expose in user-mode networking
-fvp_mps2.secure_control_register_block.FLASH_BLOCK_CFG=0x3  # (int   , init-time) default = '0x3'    : Flash Block size configuration : [0x0..0x31]
-fvp_mps2.secure_control_register_block.SRAM_BLOCK_CFG=0x3  # (int   , init-time) default = '0x3'    : SRAM Block size configuration : [0x0..0x31]
-fvp_mps2.secure_control_register_block.FLASH_WATERMARK_SUPPORTED=1  # (bool  , init-time) default = '1'      : Flash Watermark supported
-fvp_mps2.secure_control_register_block.SRAM_WATERMARK_SUPPORTED=1  # (bool  , init-time) default = '1'      : SRAM Watermark supported
-fvp_mps2.exclusive_monitor_psram.enable_component=1   # (bool  , init-time) default = '1'      : Enable component
-fvp_mps2.exclusive_monitor_psram.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]
-fvp_mps2.exclusive_monitor_psram.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]
-fvp_mps2.exclusive_monitor_psram.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master
-fvp_mps2.exclusive_monitor_psram.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit
-fvp_mps2.exclusive_monitor_psram.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]
-fvp_mps2.exclusive_monitor_psram.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores
-fvp_mps2.exclusive_monitor_zbtsram1.enable_component=1  # (bool  , init-time) default = '1'      : Enable component
-fvp_mps2.exclusive_monitor_zbtsram1.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]
-fvp_mps2.exclusive_monitor_zbtsram1.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]
-fvp_mps2.exclusive_monitor_zbtsram1.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master
-fvp_mps2.exclusive_monitor_zbtsram1.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit
-fvp_mps2.exclusive_monitor_zbtsram1.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]
-fvp_mps2.exclusive_monitor_zbtsram1.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores
-fvp_mps2.exclusive_monitor_zbtsram2.enable_component=1  # (bool  , init-time) default = '1'      : Enable component
-fvp_mps2.exclusive_monitor_zbtsram2.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]
-fvp_mps2.exclusive_monitor_zbtsram2.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]
-fvp_mps2.exclusive_monitor_zbtsram2.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master
-fvp_mps2.exclusive_monitor_zbtsram2.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit
-fvp_mps2.exclusive_monitor_zbtsram2.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]
-fvp_mps2.exclusive_monitor_zbtsram2.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores
-fvp_mps2.exclusive_monitor_iotss_internal_sram.enable_component=1  # (bool  , init-time) default = '1'      : Enable component
-fvp_mps2.exclusive_monitor_iotss_internal_sram.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]
-fvp_mps2.exclusive_monitor_iotss_internal_sram.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]
-fvp_mps2.exclusive_monitor_iotss_internal_sram.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master
-fvp_mps2.exclusive_monitor_iotss_internal_sram.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit
-fvp_mps2.exclusive_monitor_iotss_internal_sram.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]
-fvp_mps2.exclusive_monitor_iotss_internal_sram.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores
-fvp_mps2.dma0_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S
-fvp_mps2.dma0_securitymodifier.behaviour_s_to_ns=0x0  # (int   , init-time) default = '0x0'    : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS
-fvp_mps2.dma1_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S
-fvp_mps2.dma1_securitymodifier.behaviour_s_to_ns=0x0  # (int   , init-time) default = '0x0'    : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS
-fvp_mps2.dma2_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S
-fvp_mps2.dma2_securitymodifier.behaviour_s_to_ns=0x0  # (int   , init-time) default = '0x0'    : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS
-fvp_mps2.dma3_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S
-fvp_mps2.dma3_securitymodifier.behaviour_s_to_ns=0x0  # (int   , init-time) default = '0x0'    : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS
-fvp_mps2.dma0.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes
-fvp_mps2.dma0.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer
-fvp_mps2.dma0.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response
-fvp_mps2.dma0.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay
-fvp_mps2.dma1.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes
-fvp_mps2.dma1.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer
-fvp_mps2.dma1.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response
-fvp_mps2.dma1.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay
-fvp_mps2.dma2.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes
-fvp_mps2.dma2.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer
-fvp_mps2.dma2.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response
-fvp_mps2.dma2.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay
-fvp_mps2.dma3.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes
-fvp_mps2.dma3.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer
-fvp_mps2.dma3.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response
-fvp_mps2.dma3.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay
-fvp_mps2.iotss_systemcontrol.cpu0wait=0               # (bool  , init-time) default = '0'      : Whether to hold cpu1 in reset at boot
-fvp_mps2.iotss_systemcontrol.cpu1wait=1               # (bool  , init-time) default = '1'      : Whether to hold cpu1 in reset at boot
-fvp_mps2.iotss_cpuidentity.debugger_master_id=0xFFFFFFFF  # (int   , init-time) default = '0xFFFFFFFF' :  : [0x0..0xFFFFFFFF]
-#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_config.txt
deleted file mode 100644
index de6a271..0000000
--- a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_config.txt
+++ /dev/null
@@ -1,183 +0,0 @@
-# Parameters:
-# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
-#----------------------------------------------------------------------------------------------
-cpu0.FPU=0                                            # (bool  , init-time) default = '1'      : Set whether the model has VFP support
-cpu0.DSP=0                                            # (bool  , init-time) default = '1'      : Set whether the model has the DSP extension
-cpu0.semihosting-enable=0                             # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
-cpu0.MPU_S=0x8                                        # (int   , init-time) default = '0x8'    : Number of regions in the Secure MPU. If Security Extentions are absent, this is ignored : [0x0..0x10]
-cpu0.MPU_NS=0x8                                       # (int   , init-time) default = '0x8'    : Number of regions in the Non-Secure MPU. If Security Extentions are absent, this is the total number of MPU regions : [0x0..0x10]
-cpu0.ITM=0                                            # (bool  , init-time) default = '1'      : Level of instrumentation trace supported. false : No ITM trace included, true: ITM trace included
-cpu0.IRQLVL=0x3                                       # (int   , init-time) default = '0x3'    : Number of bits of interrupt priority : [0x3..0x8]
-cpu0.BIGENDINIT=0                                     # (bool  , init-time) default = '0'      : Initialize processor to big endian mode
-cpu0.INITSVTOR=0x00000000                             # (int   , init-time) default = '0x10000000' : Secure vector-table offset at reset : [0x0..0xFFFFFF80]
-cpu0.INITNSVTOR=0x0                                   # (int   , init-time) default = '0x0'    : Non-Secure vector-table offset at reset : [0x0..0xFFFFFF80]
-cpu0.SAU=0x0                                          # (int   , init-time) default = '0x4'    : Number of SAU regions (0 => no SAU) : [0x0..0x8]
-cpu0.SAU_CTRL.ENABLE=0                                # (bool  , init-time) default = '0'      : Enable SAU at reset
-cpu0.SAU_CTRL.ALLNS=0                                 # (bool  , init-time) default = '0'      : At reset, the SAU treats entire memory space as NS when the SAU is disabled if this is set
-cpu0.NUM_IDAU_REGION=0x0                              # (int   , init-time) default = '0xA'    : 
-cpu0.LOCK_SAU=0                                       # (bool  , init-time) default = '0'      : Lock down of SAU registers write
-cpu0.LOCK_S_MPU=0                                     # (bool  , init-time) default = '0'      : Lock down of Secure MPU registers write
-cpu0.LOCK_NS_MPU=0                                    # (bool  , init-time) default = '0'      : Lock down of Non-Secure MPU registers write
-cpu0.CPIF=1                                           # (bool  , init-time) default = '1'      : Specifies whether the external coprocessor interface is included
-cpu0.SECEXT=0                                         # (bool  , init-time) default = '1'      : Whether the ARMv8-M Security Extensions are included
-fvp_mps2.DISABLE_GATING=1                             # (bool  , init-time) default = '0'      : Disable Memory gating logic
-fvp_mps2.NUM_IDAU_REGION=0x0                          # (int   , init-time) default = '0xA'    : 
-fvp_mps2.SCC_ID.Variant=0x0                           # (int   , init-time) default = '0x0'    : SCC_ID[23:20], X in the FGPA version 'rXpY' : [0x0..0xF]
-fvp_mps2.SCC_ID.Revision=0x1                          # (int   , init-time) default = '0x1'    : SCC_ID[3:0], Y in the FGPA version 'rXpY' : [0x0..0xF]
-fvp_mps2.platform_type=0x0                            # (int   , init-time) default = '0x0'    : 0:MPS2 ; 1:IoT Kit ; 2:Castor : [0x0..0x2]
-fvp_mps2.extra_psram=0                                # (bool  , init-time) default = '0'      : Increases PSRAM to 32Mb
-fvp_mps2.UART2.out_file=""                            # (string, init-time) default = ''       : Output file to hold data written by the UART (use '-' to send all output to stdout)
-fvp_mps2.UART2.in_file=""                             # (string, init-time) default = ''       : Input file for data to be read by the UART
-fvp_mps2.UART2.unbuffered_output=0                    # (bool  , init-time) default = '0'      : Unbuffered output
-fvp_mps2.UART2.in_file_escape_sequence="##"           # (string, init-time) default = '##'     : Input file escape sequence
-fvp_mps2.UART2.shutdown_on_eot=0                      # (bool  , init-time) default = '0'      : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available)
-fvp_mps2.UART2.shutdown_tag=""                        # (string, run-time ) default = ''       : Shutdown simulation when a string is transmitted
-fvp_mps2.UART1.out_file=""                            # (string, init-time) default = ''       : Output file to hold data written by the UART (use '-' to send all output to stdout)
-fvp_mps2.UART1.in_file=""                             # (string, init-time) default = ''       : Input file for data to be read by the UART
-fvp_mps2.UART1.unbuffered_output=0                    # (bool  , init-time) default = '0'      : Unbuffered output
-fvp_mps2.UART1.in_file_escape_sequence="##"           # (string, init-time) default = '##'     : Input file escape sequence
-fvp_mps2.UART1.shutdown_on_eot=0                      # (bool  , init-time) default = '0'      : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available)
-fvp_mps2.UART1.shutdown_tag=""                        # (string, run-time ) default = ''       : Shutdown simulation when a string is transmitted
-fvp_mps2.mps2_visualisation.rate_limit-enable=1       # (bool  , init-time) default = '1'      : Rate limit simulation.
-fvp_mps2.mps2_visualisation.disable-visualisation=0   # (bool  , init-time) default = '0'      : Enable/disable visualisation
-fvp_mps2.mps2_visualisation.window_title="CLCD %cpu%"  # (string, init-time) default = 'CLCD %cpu%' : Window title (%cpu% is replaced by cpu_name)
-fvp_mps2.mps2_visualisation.idler.delay_ms=0x32       # (int   , init-time) default = '0x32'   : Determines the period, in milliseconds of real time, between gui_callback() calls.
-fvp_mps2.telnetterminal0.mode="telnet"                # (string, init-time) default = 'telnet' : Terminal initialisation mode
-fvp_mps2.telnetterminal0.start_telnet=1               # (bool  , init-time) default = '1'      : Start telnet if nothing connected
-fvp_mps2.telnetterminal0.start_port=0x1388            # (int   , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF]
-fvp_mps2.telnetterminal0.quiet=0                      # (bool  , init-time) default = '0'      : Avoid output on stdout/stderr
-fvp_mps2.telnetterminal0.terminal_command=""          # (string, init-time) default = ''       : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows)
-fvp_mps2.telnetterminal1.mode="telnet"                # (string, init-time) default = 'telnet' : Terminal initialisation mode
-fvp_mps2.telnetterminal1.start_telnet=1               # (bool  , init-time) default = '1'      : Start telnet if nothing connected
-fvp_mps2.telnetterminal1.start_port=0x1388            # (int   , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF]
-fvp_mps2.telnetterminal1.quiet=0                      # (bool  , init-time) default = '0'      : Avoid output on stdout/stderr
-fvp_mps2.telnetterminal1.terminal_command=""          # (string, init-time) default = ''       : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows)
-fvp_mps2.telnetterminal2.mode="telnet"                # (string, init-time) default = 'telnet' : Terminal initialisation mode
-fvp_mps2.telnetterminal2.start_telnet=1               # (bool  , init-time) default = '1'      : Start telnet if nothing connected
-fvp_mps2.telnetterminal2.start_port=0x1388            # (int   , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF]
-fvp_mps2.telnetterminal2.quiet=0                      # (bool  , init-time) default = '0'      : Avoid output on stdout/stderr
-fvp_mps2.telnetterminal2.terminal_command=""          # (string, init-time) default = ''       : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows)
-fvp_mps2.PSRAM_M7.size=0x100000000                    # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.PSRAM_M7.fill1=0xDFDFDFCF                    # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.PSRAM_M7.fill2=0xCFDFDFDF                    # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.UART0.out_file=""                            # (string, init-time) default = ''       : Output file to hold data written by the UART (use '-' to send all output to stdout)
-fvp_mps2.UART0.in_file=""                             # (string, init-time) default = ''       : Input file for data to be read by the UART
-fvp_mps2.UART0.unbuffered_output=0                    # (bool  , init-time) default = '0'      : Unbuffered output
-fvp_mps2.UART0.in_file_escape_sequence="##"           # (string, init-time) default = '##'     : Input file escape sequence
-fvp_mps2.UART0.shutdown_on_eot=0                      # (bool  , init-time) default = '0'      : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available)
-fvp_mps2.UART0.shutdown_tag=""                        # (string, run-time ) default = ''       : Shutdown simulation when a string is transmitted
-fvp_mps2.cmsdk_watchdog.simhalt=0                     # (bool  , run-time ) default = '0'      : Halt on reset.
-fvp_mps2.s32k_watchdog.simhalt=0                      # (bool  , run-time ) default = '0'      : Halt on reset.
-fvp_mps2.secure_watchdog.simhalt=0                    # (bool  , run-time ) default = '0'      : Halt on reset.
-fvp_mps2.nonsecure_watchdog.simhalt=0                 # (bool  , run-time ) default = '0'      : Halt on reset.
-fvp_mps2.PSRAM.size=0x100000000                       # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.PSRAM.fill1=0xDFDFDFCF                       # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.PSRAM.fill2=0xCFDFDFDF                       # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.ssram2.size=0x100000000                      # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.ssram2.fill1=0xDFDFDFCF                      # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.ssram2.fill2=0xCFDFDFDF                      # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.ssram1.size=0x100000000                      # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.ssram1.fill1=0xDFDFDFCF                      # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.ssram1.fill2=0xCFDFDFDF                      # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.stub.size=0x100000000                        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram0.size=0x100000000        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram0.fill1=0xDFDFDFCF        # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram0.fill2=0xCFDFDFDF        # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram1.size=0x100000000        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram1.fill1=0xDFDFDFCF        # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram1.fill2=0xCFDFDFDF        # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram2.size=0x100000000        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram2.fill1=0xDFDFDFCF        # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram2.fill2=0xCFDFDFDF        # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram3.size=0x100000000        # (int   , init-time) default = '0x100000000' : Memory Size
-fvp_mps2.iotss_internal_sram3.fill1=0xDFDFDFCF        # (int   , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.iotss_internal_sram3.fill2=0xCFDFDFDF        # (int   , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern
-fvp_mps2.sys_ppu.use_active_signal=0                  # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.sys_ppu.revision="r0p0"                      # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cpu0core_ppu.revision="r0p0"                 # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cpu0dbg_ppu.revision="r0p0"                  # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cpu1core_ppu.use_active_signal=0             # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.cpu1core_ppu.revision="r0p0"                 # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cpu1dbg_ppu.use_active_signal=0              # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.cpu1dbg_ppu.revision="r0p0"                  # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.crypto_ppu.use_active_signal=0               # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.crypto_ppu.revision="r0p0"                   # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.cordio_ppu.use_active_signal=0               # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.cordio_ppu.revision="r0p0"                   # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.dbg_ppu.use_active_signal=0                  # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.dbg_ppu.revision="r0p0"                      # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.ram0_ppu.use_active_signal=0                 # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.ram0_ppu.revision="r0p0"                     # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.ram1_ppu.use_active_signal=0                 # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.ram1_ppu.revision="r0p0"                     # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.ram2_ppu.use_active_signal=0                 # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.ram2_ppu.revision="r0p0"                     # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.ram3_ppu.use_active_signal=0                 # (bool  , init-time) default = '0'      : Use device-active signal
-fvp_mps2.ram3_ppu.revision="r0p0"                     # (string, init-time) default = 'r0p0'   : Revision
-fvp_mps2.smsc_91c111.enabled=0                        # (bool  , init-time) default = '0'      : Host interface connection enabled
-fvp_mps2.smsc_91c111.mac_address="00:02:f7:ef:5d:a2"  # (string, init-time) default = '00:02:f7:ef:5d:a2' : Host/model MAC address
-fvp_mps2.smsc_91c111.promiscuous=1                    # (bool  , init-time) default = '1'      : Put host into promiscuous mode
-fvp_mps2.hostbridge.interfaceName="ARM0"              # (string, init-time) default = 'ARM0'   : Host Interface
-fvp_mps2.hostbridge.userNetworking=0                  # (bool  , init-time) default = '0'      : Enable user-mode networking
-fvp_mps2.hostbridge.userNetSubnet="172.20.51.0/24"    # (string, init-time) default = '172.20.51.0/24' : Virtual subnet for user-mode networking
-fvp_mps2.hostbridge.userNetPorts=""                   # (string, init-time) default = ''       : Listening ports to expose in user-mode networking
-fvp_mps2.secure_control_register_block.FLASH_BLOCK_CFG=0x3  # (int   , init-time) default = '0x3'    : Flash Block size configuration : [0x0..0x31]
-fvp_mps2.secure_control_register_block.SRAM_BLOCK_CFG=0x3  # (int   , init-time) default = '0x3'    : SRAM Block size configuration : [0x0..0x31]
-fvp_mps2.secure_control_register_block.FLASH_WATERMARK_SUPPORTED=1  # (bool  , init-time) default = '1'      : Flash Watermark supported
-fvp_mps2.secure_control_register_block.SRAM_WATERMARK_SUPPORTED=1  # (bool  , init-time) default = '1'      : SRAM Watermark supported
-fvp_mps2.exclusive_monitor_psram.enable_component=1   # (bool  , init-time) default = '1'      : Enable component
-fvp_mps2.exclusive_monitor_psram.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]
-fvp_mps2.exclusive_monitor_psram.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]
-fvp_mps2.exclusive_monitor_psram.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master
-fvp_mps2.exclusive_monitor_psram.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit
-fvp_mps2.exclusive_monitor_psram.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]
-fvp_mps2.exclusive_monitor_psram.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores
-fvp_mps2.exclusive_monitor_zbtsram1.enable_component=1  # (bool  , init-time) default = '1'      : Enable component
-fvp_mps2.exclusive_monitor_zbtsram1.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]
-fvp_mps2.exclusive_monitor_zbtsram1.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]
-fvp_mps2.exclusive_monitor_zbtsram1.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master
-fvp_mps2.exclusive_monitor_zbtsram1.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit
-fvp_mps2.exclusive_monitor_zbtsram1.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]
-fvp_mps2.exclusive_monitor_zbtsram1.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores
-fvp_mps2.exclusive_monitor_zbtsram2.enable_component=1  # (bool  , init-time) default = '1'      : Enable component
-fvp_mps2.exclusive_monitor_zbtsram2.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]
-fvp_mps2.exclusive_monitor_zbtsram2.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]
-fvp_mps2.exclusive_monitor_zbtsram2.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master
-fvp_mps2.exclusive_monitor_zbtsram2.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit
-fvp_mps2.exclusive_monitor_zbtsram2.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]
-fvp_mps2.exclusive_monitor_zbtsram2.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores
-fvp_mps2.exclusive_monitor_iotss_internal_sram.enable_component=1  # (bool  , init-time) default = '1'      : Enable component
-fvp_mps2.exclusive_monitor_iotss_internal_sram.number_of_monitors=0x8  # (int   , init-time) default = '0x8'    : Number of monitors : [0x1..0xFFFFFFFF]
-fvp_mps2.exclusive_monitor_iotss_internal_sram.log2_granule_size=0x0  # (int   , init-time) default = '0x0'    : log2 of address granule size : [0x0..0xB]
-fvp_mps2.exclusive_monitor_iotss_internal_sram.monitor_non_excl_stores=0  # (bool  , init-time) default = '0'      : Monitor non-exclusive stores from the same master
-fvp_mps2.exclusive_monitor_iotss_internal_sram.match_secure_state=1  # (bool  , init-time) default = '1'      : Treat the secure state like an address bit
-fvp_mps2.exclusive_monitor_iotss_internal_sram.shareability_domain=0x3  # (int   , init-time) default = '0x3'    : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3]
-fvp_mps2.exclusive_monitor_iotss_internal_sram.apply_access_width_criteria_to_non_excl_stores=1  # (bool  , init-time) default = '1'      : Apply the given exclusive store width matching criteria to non-exclusive stores
-fvp_mps2.dma0_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S
-fvp_mps2.dma0_securitymodifier.behaviour_s_to_ns=0x0  # (int   , init-time) default = '0x0'    : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS
-fvp_mps2.dma1_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S
-fvp_mps2.dma1_securitymodifier.behaviour_s_to_ns=0x0  # (int   , init-time) default = '0x0'    : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS
-fvp_mps2.dma2_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S
-fvp_mps2.dma2_securitymodifier.behaviour_s_to_ns=0x0  # (int   , init-time) default = '0x0'    : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS
-fvp_mps2.dma3_securitymodifier.behaviour_ns_to_s=0x0  # (int   , init-time) default = '0x0'    : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S
-fvp_mps2.dma3_securitymodifier.behaviour_s_to_ns=0x0  # (int   , init-time) default = '0x0'    : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS
-fvp_mps2.dma0.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes
-fvp_mps2.dma0.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer
-fvp_mps2.dma0.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response
-fvp_mps2.dma0.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay
-fvp_mps2.dma1.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes
-fvp_mps2.dma1.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer
-fvp_mps2.dma1.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response
-fvp_mps2.dma1.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay
-fvp_mps2.dma2.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes
-fvp_mps2.dma2.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer
-fvp_mps2.dma2.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response
-fvp_mps2.dma2.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay
-fvp_mps2.dma3.fifo_size=0x10                          # (int   , init-time) default = '0x10'   : Channel FIFO size in bytes
-fvp_mps2.dma3.max_transfer=0x100                      # (int   , init-time) default = '0x100'  : Largest atomic transfer
-fvp_mps2.dma3.generate_clear=0                        # (bool  , init-time) default = '0'      : Generate clear response
-fvp_mps2.dma3.activate_delay=0x0                      # (int   , init-time) default = '0x0'    : request delay
-fvp_mps2.iotss_systemcontrol.cpu0wait=0               # (bool  , init-time) default = '0'      : Whether to hold cpu1 in reset at boot
-fvp_mps2.iotss_systemcontrol.cpu1wait=1               # (bool  , init-time) default = '1'      : Whether to hold cpu1 in reset at boot
-fvp_mps2.iotss_cpuidentity.debugger_master_id=0xFFFFFFFF  # (int   , init-time) default = '0xFFFFFFFF' :  : [0x0..0xFFFFFFFF]
-#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MBLl_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MBLl_config.txt
new file mode 100644
index 0000000..d9cb90a
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MBLl_config.txt
@@ -0,0 +1,11 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.semihosting-enable=0                             # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3                               # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1                                      # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1                                      # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0                                         # (bool  , init-time) default = '1'      : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0                              # (int   , init-time) default = '0xA'    : 
+fvp_mps2.DISABLE_GATING=1                             # (bool  , init-time) default = '0'      : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLl_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLl_config.txt
new file mode 100644
index 0000000..9c3cfc2
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLl_config.txt
@@ -0,0 +1,13 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.FPU=0                                            # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+cpu0.DSP=0                                            # (bool  , init-time) default = '1'      : Set whether the model has the DSP extension
+cpu0.semihosting-enable=0                             # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3                               # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1                                      # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1                                      # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0                                         # (bool  , init-time) default = '1'      : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0                              # (int   , init-time) default = '0xA'    : 
+fvp_mps2.DISABLE_GATING=1                             # (bool  , init-time) default = '0'      : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLld_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLld_config.txt
new file mode 100644
index 0000000..011260a
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLld_config.txt
@@ -0,0 +1,13 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.FPU=0                                            # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+cpu0.DSP=1                                            # (bool  , init-time) default = '1'      : Set whether the model has the DSP extension
+cpu0.semihosting-enable=0                             # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3                               # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1                                      # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1                                      # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0                                         # (bool  , init-time) default = '1'      : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0                              # (int   , init-time) default = '0xA'    : 
+fvp_mps2.DISABLE_GATING=1                             # (bool  , init-time) default = '0'      : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLldfsp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLldfsp_config.txt
new file mode 100644
index 0000000..2a0a82a
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLldfsp_config.txt
@@ -0,0 +1,13 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.FPU=1                                            # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+cpu0.DSP=1                                            # (bool  , init-time) default = '1'      : Set whether the model has the DSP extension
+cpu0.semihosting-enable=0                             # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3                               # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1                                      # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1                                      # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0                                         # (bool  , init-time) default = '1'      : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0                              # (int   , init-time) default = '0xA'    : 
+fvp_mps2.DISABLE_GATING=1                             # (bool  , init-time) default = '0'      : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLlfsp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLlfsp_config.txt
new file mode 100644
index 0000000..4140d9b
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLlfsp_config.txt
@@ -0,0 +1,13 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.FPU=1                                            # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+cpu0.DSP=0                                            # (bool  , init-time) default = '1'      : Set whether the model has the DSP extension
+cpu0.semihosting-enable=0                             # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3                               # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1                                      # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1                                      # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0                                         # (bool  , init-time) default = '1'      : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0                              # (int   , init-time) default = '0xA'    : 
+fvp_mps2.DISABLE_GATING=1                             # (bool  , init-time) default = '0'      : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvoptx
index 48cafe1..79f27f0 100644
--- a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvoptx
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvoptx
@@ -101,7 +101,9 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
-        <nTsel>4</nTsel>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -138,7 +140,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFM</Key>
-          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF -MA</Name>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF"..\cortexM0l_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -185,6 +187,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -268,7 +274,9 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
-        <nTsel>4</nTsel>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -285,7 +293,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFM</Key>
-          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF -MA</Name>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF"..\cortexM3l_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -332,6 +340,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -415,7 +427,9 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
-        <nTsel>4</nTsel>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -432,7 +446,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFM</Key>
-          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF -MA</Name>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4l_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -479,6 +493,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -562,7 +580,9 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
-        <nTsel>4</nTsel>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -599,7 +619,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFM</Key>
-          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF -MA</Name>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4lf_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -646,6 +666,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -729,7 +753,9 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
-        <nTsel>4</nTsel>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -766,7 +792,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFM</Key>
-          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF -MA</Name>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7l_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -813,6 +839,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -896,7 +926,9 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
-        <nTsel>4</nTsel>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -933,7 +965,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFM</Key>
-          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF -MA</Name>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfsp_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -980,6 +1012,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1063,7 +1099,9 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
-        <nTsel>4</nTsel>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -1080,7 +1118,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFM</Key>
-          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF -MA</Name>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfdp_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -1127,6 +1165,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1210,6 +1252,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>15</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1242,7 +1286,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFMv8M</Key>
-          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMCM23_config.txt" -MA</Name>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMv8MBLl_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -1289,6 +1333,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1372,6 +1420,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>15</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1389,7 +1439,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFMv8M</Key>
-          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMCM33_config.txt" -MA</Name>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLl_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -1436,6 +1486,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1519,6 +1573,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>15</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1551,7 +1607,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFMv8M</Key>
-          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMCM33_FP_config.txt" -MA</Name>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLlfsp_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -1598,141 +1654,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
-    </TargetOption>
-  </Target>
-
-  <Target>
-    <TargetName>ARMv8MMLlfdp.DoNotUse</TargetName>
-    <ToolsetNumber>0x3</ToolsetNumber>
-    <ToolsetName>ARM-GNU</ToolsetName>
-    <TargetOption>
-      <CLKARM>12000000</CLKARM>
-      <OPTTT>
-        <gFlags>0</gFlags>
-        <BeepAtEnd>1</BeepAtEnd>
-        <RunSim>1</RunSim>
-        <RunTarget>0</RunTarget>
-        <RunAbUc>0</RunAbUc>
-      </OPTTT>
-      <OPTHX>
-        <HexSelection>1</HexSelection>
-        <FlashByte>65535</FlashByte>
-        <HexRangeLowAddress>0</HexRangeLowAddress>
-        <HexRangeHighAddress>0</HexRangeHighAddress>
-        <HexOffset>0</HexOffset>
-      </OPTHX>
-      <OPTLEX>
-        <PageWidth>120</PageWidth>
-        <PageLength>65</PageLength>
-        <TabStop>8</TabStop>
-        <ListingPath>.\IntermediateFiles\ARMv8MMLlfdp\</ListingPath>
-      </OPTLEX>
-      <ListingPage>
-        <CreateCListing>1</CreateCListing>
-        <CreateAListing>1</CreateAListing>
-        <CreateLListing>1</CreateLListing>
-        <CreateIListing>0</CreateIListing>
-        <AsmCond>1</AsmCond>
-        <AsmSymb>1</AsmSymb>
-        <AsmXref>0</AsmXref>
-        <CCond>1</CCond>
-        <CCode>0</CCode>
-        <CListInc>0</CListInc>
-        <CSymb>0</CSymb>
-        <LinkerCodeListing>0</LinkerCodeListing>
-      </ListingPage>
-      <OPTXL>
-        <LMap>1</LMap>
-        <LComments>1</LComments>
-        <LGenerateSymbols>1</LGenerateSymbols>
-        <LLibSym>1</LLibSym>
-        <LLines>1</LLines>
-        <LLocSym>1</LLocSym>
-        <LPubSym>1</LPubSym>
-        <LXref>0</LXref>
-        <LExpSel>0</LExpSel>
-      </OPTXL>
-      <OPTFL>
-        <tvExp>0</tvExp>
-        <tvExpOptDlg>0</tvExpOptDlg>
-        <IsCurrentTarget>0</IsCurrentTarget>
-      </OPTFL>
-      <CpuCode>7</CpuCode>
-      <DebugOpt>
-        <uSim>1</uSim>
-        <uTrg>0</uTrg>
-        <sLdApp>1</sLdApp>
-        <sGomain>1</sGomain>
-        <sRbreak>1</sRbreak>
-        <sRwatch>1</sRwatch>
-        <sRmem>1</sRmem>
-        <sRfunc>1</sRfunc>
-        <sRbox>1</sRbox>
-        <tLdApp>1</tLdApp>
-        <tGomain>0</tGomain>
-        <tRbreak>1</tRbreak>
-        <tRwatch>1</tRwatch>
-        <tRmem>1</tRmem>
-        <tRfunc>0</tRfunc>
-        <tRbox>1</tRbox>
-        <tRtrace>1</tRtrace>
-        <sRSysVw>1</sRSysVw>
-        <tRSysVw>1</tRSysVw>
-        <sRunDeb>0</sRunDeb>
-        <sLrtime>0</sLrtime>
-        <bEvRecOn>1</bEvRecOn>
-        <nTsel>-1</nTsel>
-        <sDll></sDll>
-        <sDllPa></sDllPa>
-        <sDlgDll></sDlgDll>
-        <sDlgPa></sDlgPa>
-        <sIfile></sIfile>
-        <tDll></tDll>
-        <tDllPa></tDllPa>
-        <tDlgDll></tDlgDll>
-        <tDlgPa></tDlgPa>
-        <tIfile></tIfile>
-        <pMon></pMon>
-      </DebugOpt>
-      <Breakpoint/>
-      <Tracepoint>
-        <THDelay>0</THDelay>
-      </Tracepoint>
-      <DebugFlag>
-        <trace>0</trace>
-        <periodic>0</periodic>
-        <aLwin>0</aLwin>
-        <aCover>0</aCover>
-        <aSer1>0</aSer1>
-        <aSer2>0</aSer2>
-        <aPa>0</aPa>
-        <viewmode>0</viewmode>
-        <vrSel>0</vrSel>
-        <aSym>0</aSym>
-        <aTbox>0</aTbox>
-        <AscS1>0</AscS1>
-        <AscS2>0</AscS2>
-        <AscS3>0</AscS3>
-        <aSer3>0</aSer3>
-        <eProf>0</eProf>
-        <aLa>0</aLa>
-        <aPa1>0</aPa1>
-        <AscS4>0</AscS4>
-        <aSer4>0</aSer4>
-        <StkLoc>0</StkLoc>
-        <TrcWin>0</TrcWin>
-        <newCpu>0</newCpu>
-        <uProt>0</uProt>
-      </DebugFlag>
-      <LintExecutable></LintExecutable>
-      <LintConfigFile></LintConfigFile>
-      <bLintAuto>0</bLintAuto>
-      <bAutoGenD>0</bAutoGenD>
-      <LntExFlags>0</LntExFlags>
-      <pMisraName></pMisraName>
-      <pszMrule></pszMrule>
-      <pSingCmds></pSingCmds>
-      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1816,6 +1741,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>15</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1848,7 +1775,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFMv8M</Key>
-          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMCM33_DSP_config.txt" -MA</Name>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLld_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -1895,6 +1822,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1978,6 +1909,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>15</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2010,7 +1943,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DbgFMv8M</Key>
-          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMCM33_DSP_FP_config.txt" -MA</Name>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLldfsp_config.txt" -MA"-Q 1"</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -2057,141 +1990,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
-    </TargetOption>
-  </Target>
-
-  <Target>
-    <TargetName>ARMv8MMLldfdp.DoNotUse</TargetName>
-    <ToolsetNumber>0x3</ToolsetNumber>
-    <ToolsetName>ARM-GNU</ToolsetName>
-    <TargetOption>
-      <CLKARM>12000000</CLKARM>
-      <OPTTT>
-        <gFlags>0</gFlags>
-        <BeepAtEnd>1</BeepAtEnd>
-        <RunSim>1</RunSim>
-        <RunTarget>0</RunTarget>
-        <RunAbUc>0</RunAbUc>
-      </OPTTT>
-      <OPTHX>
-        <HexSelection>1</HexSelection>
-        <FlashByte>65535</FlashByte>
-        <HexRangeLowAddress>0</HexRangeLowAddress>
-        <HexRangeHighAddress>0</HexRangeHighAddress>
-        <HexOffset>0</HexOffset>
-      </OPTHX>
-      <OPTLEX>
-        <PageWidth>120</PageWidth>
-        <PageLength>65</PageLength>
-        <TabStop>8</TabStop>
-        <ListingPath>.\IntermediateFiles\ARMv8MMLldfdp\</ListingPath>
-      </OPTLEX>
-      <ListingPage>
-        <CreateCListing>1</CreateCListing>
-        <CreateAListing>1</CreateAListing>
-        <CreateLListing>1</CreateLListing>
-        <CreateIListing>0</CreateIListing>
-        <AsmCond>1</AsmCond>
-        <AsmSymb>1</AsmSymb>
-        <AsmXref>0</AsmXref>
-        <CCond>1</CCond>
-        <CCode>0</CCode>
-        <CListInc>0</CListInc>
-        <CSymb>0</CSymb>
-        <LinkerCodeListing>0</LinkerCodeListing>
-      </ListingPage>
-      <OPTXL>
-        <LMap>1</LMap>
-        <LComments>1</LComments>
-        <LGenerateSymbols>1</LGenerateSymbols>
-        <LLibSym>1</LLibSym>
-        <LLines>1</LLines>
-        <LLocSym>1</LLocSym>
-        <LPubSym>1</LPubSym>
-        <LXref>0</LXref>
-        <LExpSel>0</LExpSel>
-      </OPTXL>
-      <OPTFL>
-        <tvExp>0</tvExp>
-        <tvExpOptDlg>0</tvExpOptDlg>
-        <IsCurrentTarget>0</IsCurrentTarget>
-      </OPTFL>
-      <CpuCode>7</CpuCode>
-      <DebugOpt>
-        <uSim>1</uSim>
-        <uTrg>0</uTrg>
-        <sLdApp>1</sLdApp>
-        <sGomain>1</sGomain>
-        <sRbreak>1</sRbreak>
-        <sRwatch>1</sRwatch>
-        <sRmem>1</sRmem>
-        <sRfunc>1</sRfunc>
-        <sRbox>1</sRbox>
-        <tLdApp>1</tLdApp>
-        <tGomain>0</tGomain>
-        <tRbreak>1</tRbreak>
-        <tRwatch>1</tRwatch>
-        <tRmem>1</tRmem>
-        <tRfunc>0</tRfunc>
-        <tRbox>1</tRbox>
-        <tRtrace>1</tRtrace>
-        <sRSysVw>1</sRSysVw>
-        <tRSysVw>1</tRSysVw>
-        <sRunDeb>0</sRunDeb>
-        <sLrtime>0</sLrtime>
-        <bEvRecOn>1</bEvRecOn>
-        <nTsel>-1</nTsel>
-        <sDll></sDll>
-        <sDllPa></sDllPa>
-        <sDlgDll></sDlgDll>
-        <sDlgPa></sDlgPa>
-        <sIfile></sIfile>
-        <tDll></tDll>
-        <tDllPa></tDllPa>
-        <tDlgDll></tDlgDll>
-        <tDlgPa></tDlgPa>
-        <tIfile></tIfile>
-        <pMon></pMon>
-      </DebugOpt>
-      <Breakpoint/>
-      <Tracepoint>
-        <THDelay>0</THDelay>
-      </Tracepoint>
-      <DebugFlag>
-        <trace>0</trace>
-        <periodic>0</periodic>
-        <aLwin>0</aLwin>
-        <aCover>0</aCover>
-        <aSer1>0</aSer1>
-        <aSer2>0</aSer2>
-        <aPa>0</aPa>
-        <viewmode>0</viewmode>
-        <vrSel>0</vrSel>
-        <aSym>0</aSym>
-        <aTbox>0</aTbox>
-        <AscS1>0</AscS1>
-        <AscS2>0</AscS2>
-        <AscS3>0</AscS3>
-        <aSer3>0</aSer3>
-        <eProf>0</eProf>
-        <aLa>0</aLa>
-        <aPa1>0</aPa1>
-        <AscS4>0</AscS4>
-        <aSer4>0</aSer4>
-        <StkLoc>0</StkLoc>
-        <TrcWin>0</TrcWin>
-        <newCpu>0</newCpu>
-        <uProt>0</uProt>
-      </DebugFlag>
-      <LintExecutable></LintExecutable>
-      <LintConfigFile></LintConfigFile>
-      <bLintAuto>0</bLintAuto>
-      <bAutoGenD>0</bAutoGenD>
-      <LntExFlags>0</LntExFlags>
-      <pMisraName></pMisraName>
-      <pszMrule></pszMrule>
-      <pSingCmds></pSingCmds>
-      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvprojx b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvprojx
index 0b5c53b..7d12245 100644
--- a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvprojx
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvprojx
@@ -10,11 +10,12 @@
       <TargetName>cortexM0l</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM0</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -131,7 +132,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4096</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -166,6 +167,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -238,9 +240,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM0</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -248,7 +250,7 @@
             <interw>0</interw>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM0</Define>
+              <Define>ARMCM0</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -734,11 +736,12 @@
       <TargetName>cortexM3l</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM3</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -855,7 +858,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4096</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -890,6 +893,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -962,9 +966,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM3</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -972,7 +976,7 @@
             <interw>0</interw>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM3</Define>
+              <Define>ARMCM3</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -1458,11 +1462,12 @@
       <TargetName>cortexM4l</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -1579,7 +1584,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4096</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -1614,6 +1619,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -1686,9 +1692,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM4</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -1696,7 +1702,7 @@
             <interw>0</interw>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM4</Define>
+              <Define>ARMCM4</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -2182,11 +2188,12 @@
       <TargetName>cortexM4lf</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4_FP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -2303,7 +2310,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4096</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -2338,6 +2345,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -2410,9 +2418,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_CM4 __FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -2420,7 +2428,7 @@
             <interw>0</interw>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM4</Define>
+              <Define>ARMCM4</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -2906,11 +2914,12 @@
       <TargetName>cortexM7l</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -3027,7 +3036,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4096</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -3062,6 +3071,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -3134,9 +3144,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM7</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -3144,7 +3154,7 @@
             <interw>0</interw>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM7</Define>
+              <Define>ARMCM7</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -3630,11 +3640,12 @@
       <TargetName>cortexM7lfsp</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7_SP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -3751,7 +3762,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4096</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -3786,6 +3797,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -3858,9 +3870,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_CM7 __FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -3868,7 +3880,7 @@
             <interw>0</interw>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM7</Define>
+              <Define>ARMCM7</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -4354,11 +4366,12 @@
       <TargetName>cortexM7lfdp</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7_DP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -4475,7 +4488,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4096</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -4510,6 +4523,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>3</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -4582,9 +4596,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_CM7 __FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -4592,7 +4606,7 @@
             <interw>0</interw>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM7</Define>
+              <Define>ARMCM7</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -5078,11 +5092,12 @@
       <TargetName>ARMv8MBLl</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MBL</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MBL") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -5199,7 +5214,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4096</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -5234,6 +5249,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <OnChipMemories>
@@ -5306,9 +5322,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.base</MiscControls>
-              <Define>ARM_MATH_ARMV8MBL</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -5316,7 +5332,7 @@
             <interw>0</interw>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_ARMV8MBL</Define>
+              <Define>ARMv8MBL</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -5802,11 +5818,12 @@
       <TargetName>ARMv8MMLl</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -5923,7 +5940,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4096</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -5958,6 +5975,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <OnChipMemories>
@@ -6030,9 +6048,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main</MiscControls>
-              <Define>ARM_MATH_ARMV8MML</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -6040,7 +6058,7 @@
             <interw>0</interw>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_ARMV8MML</Define>
+              <Define>ARMv8MML</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -6526,11 +6544,12 @@
       <TargetName>ARMv8MMLlfsp</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_SP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -6647,7 +6666,7 @@
             <UseExternalTool>0</UseExternalTool>
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4096</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
@@ -6682,6 +6701,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <OnChipMemories>
@@ -6754,9 +6774,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_ARMV8MML __FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -6764,7 +6784,7 @@
             <interw>0</interw>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_ARMV8MML</Define>
+              <Define>ARMv8MML</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -7247,738 +7267,15 @@
       </Groups>
     </Target>
     <Target>
-      <TargetName>ARMv8MMLlfdp.DoNotUse</TargetName>
-      <ToolsetNumber>0x3</ToolsetNumber>
-      <ToolsetName>ARM-GNU</ToolsetName>
-      <TargetOption>
-        <TargetCommonOption>
-          <Device>ARMv8MML_DP</Device>
-          <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
-          <PackURL>http://www.keil.com/pack/</PackURL>
-          <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
-          <FlashUtilSpec></FlashUtilSpec>
-          <StartupFile></StartupFile>
-          <FlashDriverDll>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</FlashDriverDll>
-          <DeviceId>0</DeviceId>
-          <RegisterFile>$$Device:ARMv8MML_DP$Device\ARM\ARMv8MML\Include\ARMv8MML_DP.h</RegisterFile>
-          <MemoryEnv></MemoryEnv>
-          <Cmp></Cmp>
-          <Asm></Asm>
-          <Linker></Linker>
-          <OHString></OHString>
-          <InfinionOptionDll></InfinionOptionDll>
-          <SLE66CMisc></SLE66CMisc>
-          <SLE66AMisc></SLE66AMisc>
-          <SLE66LinkerMisc></SLE66LinkerMisc>
-          <SFDFile>$$Device:ARMv8MML_DP$Device\ARM\SVD\ARMv8MML.svd</SFDFile>
-          <bCustSvd>0</bCustSvd>
-          <UseEnv>0</UseEnv>
-          <BinPath></BinPath>
-          <IncludePath></IncludePath>
-          <LibPath></LibPath>
-          <RegisterFilePath></RegisterFilePath>
-          <DBRegisterFilePath></DBRegisterFilePath>
-          <TargetStatus>
-            <Error>0</Error>
-            <ExitCodeStop>0</ExitCodeStop>
-            <ButtonStop>0</ButtonStop>
-            <NotGenerated>0</NotGenerated>
-            <InvalidFlash>1</InvalidFlash>
-          </TargetStatus>
-          <OutputDirectory>.\IntermediateFiles\ARMv8MMLlfdp\</OutputDirectory>
-          <OutputName>DspLibTest_FVP</OutputName>
-          <CreateExecutable>1</CreateExecutable>
-          <CreateLib>0</CreateLib>
-          <CreateHexFile>0</CreateHexFile>
-          <DebugInformation>1</DebugInformation>
-          <BrowseInformation>1</BrowseInformation>
-          <ListingPath>.\IntermediateFiles\ARMv8MMLlfdp\</ListingPath>
-          <HexFormatSelection>1</HexFormatSelection>
-          <Merge32K>0</Merge32K>
-          <CreateBatchFile>0</CreateBatchFile>
-          <BeforeCompile>
-            <RunUserProg1>0</RunUserProg1>
-            <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name></UserProg1Name>
-            <UserProg2Name></UserProg2Name>
-            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
-            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
-            <nStopU1X>0</nStopU1X>
-            <nStopU2X>0</nStopU2X>
-          </BeforeCompile>
-          <BeforeMake>
-            <RunUserProg1>0</RunUserProg1>
-            <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name></UserProg1Name>
-            <UserProg2Name></UserProg2Name>
-            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
-            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
-            <nStopB1X>0</nStopB1X>
-            <nStopB2X>0</nStopB2X>
-          </BeforeMake>
-          <AfterMake>
-            <RunUserProg1>0</RunUserProg1>
-            <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name></UserProg1Name>
-            <UserProg2Name></UserProg2Name>
-            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
-            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
-            <nStopA1X>0</nStopA1X>
-            <nStopA2X>0</nStopA2X>
-          </AfterMake>
-          <SelectedForBatchBuild>0</SelectedForBatchBuild>
-          <SVCSIdString></SVCSIdString>
-        </TargetCommonOption>
-        <CommonProperty>
-          <UseCPPCompiler>0</UseCPPCompiler>
-          <RVCTCodeConst>0</RVCTCodeConst>
-          <RVCTZI>0</RVCTZI>
-          <RVCTOtherData>0</RVCTOtherData>
-          <ModuleSelection>0</ModuleSelection>
-          <IncludeInBuild>1</IncludeInBuild>
-          <AlwaysBuild>0</AlwaysBuild>
-          <GenerateAssemblyFile>0</GenerateAssemblyFile>
-          <AssembleAssemblyFile>0</AssembleAssemblyFile>
-          <PublicsOnly>0</PublicsOnly>
-          <StopOnExitCode>3</StopOnExitCode>
-          <CustomArgument></CustomArgument>
-          <IncludeLibraryModules></IncludeLibraryModules>
-          <ComprImg>1</ComprImg>
-        </CommonProperty>
-        <DllOption>
-          <SimDllName></SimDllName>
-          <SimDllArguments></SimDllArguments>
-          <SimDlgDll></SimDlgDll>
-          <SimDlgDllArguments></SimDlgDllArguments>
-          <TargetDllName>SARMV8M.DLL</TargetDllName>
-          <TargetDllArguments> -MPU</TargetDllArguments>
-          <TargetDlgDll>TCM.DLL</TargetDlgDll>
-          <TargetDlgDllArguments>-pV8MML</TargetDlgDllArguments>
-        </DllOption>
-        <DebugOption>
-          <OPTHX>
-            <HexSelection>1</HexSelection>
-            <HexRangeLowAddress>0</HexRangeLowAddress>
-            <HexRangeHighAddress>0</HexRangeHighAddress>
-            <HexOffset>0</HexOffset>
-            <Oh166RecLen>16</Oh166RecLen>
-          </OPTHX>
-        </DebugOption>
-        <Utilities>
-          <Flash1>
-            <UseTargetDll>1</UseTargetDll>
-            <UseExternalTool>0</UseExternalTool>
-            <RunIndependent>0</RunIndependent>
-            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
-            <DriverSelection>4096</DriverSelection>
-          </Flash1>
-          <bUseTDR>1</bUseTDR>
-          <Flash2>BIN\UL2V8M.DLL</Flash2>
-          <Flash3></Flash3>
-          <Flash4></Flash4>
-          <pFcarmOut></pFcarmOut>
-          <pFcarmGrp></pFcarmGrp>
-          <pFcArmRoot></pFcArmRoot>
-          <FcArmLst>0</FcArmLst>
-        </Utilities>
-        <TargetArm>
-          <ArmMisc>
-            <asLst>0</asLst>
-            <asHll>1</asHll>
-            <asAsm>1</asAsm>
-            <asMacX>1</asMacX>
-            <asSyms>1</asSyms>
-            <asFals>1</asFals>
-            <asDbgD>1</asDbgD>
-            <asForm>1</asForm>
-            <ldLst>0</ldLst>
-            <ldmm>1</ldmm>
-            <ldXref>1</ldXref>
-            <BigEnd>0</BigEnd>
-            <GCPUTYP>"ARMV8MML"</GCPUTYP>
-            <mOS>0</mOS>
-            <uocRom>0</uocRom>
-            <uocRam>0</uocRam>
-            <hadIROM>1</hadIROM>
-            <hadIRAM>1</hadIRAM>
-            <hadXRAM>0</hadXRAM>
-            <uocXRam>0</uocXRam>
-            <RvdsVP>3</RvdsVP>
-            <hadIRAM2>1</hadIRAM2>
-            <hadIROM2>1</hadIROM2>
-            <OnChipMemories>
-              <Ocm1>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm1>
-              <Ocm2>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm2>
-              <Ocm3>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm3>
-              <Ocm4>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm4>
-              <Ocm5>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm5>
-              <Ocm6>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </Ocm6>
-              <IRAM>
-                <Type>0</Type>
-                <StartAddress>0x20000000</StartAddress>
-                <Size>0x20000</Size>
-              </IRAM>
-              <IROM>
-                <Type>1</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x200000</Size>
-              </IROM>
-              <XRAM>
-                <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
-              </XRAM>
-              <IRAM2>
-                <Type>0</Type>
-                <StartAddress>0x20200000</StartAddress>
-                <Size>0x20000</Size>
-              </IRAM2>
-              <IROM2>
-                <Type>1</Type>
-                <StartAddress>0x200000</StartAddress>
-                <Size>0x200000</Size>
-              </IROM2>
-            </OnChipMemories>
-          </ArmMisc>
-          <Carm>
-            <arpcs>0</arpcs>
-            <stkchk>0</stkchk>
-            <reentr>0</reentr>
-            <interw>0</interw>
-            <bigend>0</bigend>
-            <Strict>0</Strict>
-            <Optim>1</Optim>
-            <wLevel>2</wLevel>
-            <uThumb>1</uThumb>
-            <VariousControls>
-              <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_ARMV8MML __FPU_PRESENT=1U</Define>
-              <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
-            </VariousControls>
-          </Carm>
-          <Aarm>
-            <bBE>0</bBE>
-            <interw>0</interw>
-            <VariousControls>
-              <MiscControls></MiscControls>
-              <Define>ARM_MATH_ARMV8MML</Define>
-              <Undefine></Undefine>
-              <IncludePath></IncludePath>
-            </VariousControls>
-          </Aarm>
-          <LDarm>
-            <umfTarg>1</umfTarg>
-            <enaGarb>0</enaGarb>
-            <noStart>0</noStart>
-            <noStLib>0</noStLib>
-            <uMathLib>1</uMathLib>
-            <TextAddressRange></TextAddressRange>
-            <DataAddressRange></DataAddressRange>
-            <BSSAddressRange></BSSAddressRange>
-            <IncludeLibs>arm_math -larm_ref</IncludeLibs>
-            <IncludeDir>.\Lib</IncludeDir>
-            <Misc>-Wl,--gc-sections -march=armv8-m.main -mfpu=fpv5-d16 -mfloat-abi=hard</Misc>
-            <ScatterFile>..\..\Common\platform\GCC\ARMCMx.ld</ScatterFile>
-          </LDarm>
-        </TargetArm>
-      </TargetOption>
-      <Groups>
-        <Group>
-          <GroupName>Libraries</GroupName>
-        </Group>
-        <Group>
-          <GroupName>Startup</GroupName>
-          <Files>
-            <File>
-              <FileName>main.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\main.c</FilePath>
-            </File>
-            <File>
-              <FileName>system_generic.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\platform\system_generic.c</FilePath>
-            </File>
-            <File>
-              <FileName>startup_generic.S</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\platform\startup_generic.S</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>JTest</GroupName>
-          <Files>
-            <File>
-              <FileName>jtest_cycle.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\JTest\src\jtest_cycle.c</FilePath>
-            </File>
-            <File>
-              <FileName>jtest_fw.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\JTest\src\jtest_fw.c</FilePath>
-            </File>
-            <File>
-              <FileName>jtest_dump_str_segments.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\JTest\src\jtest_dump_str_segments.c</FilePath>
-            </File>
-            <File>
-              <FileName>jtest_trigger_action.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\JTest\src\jtest_trigger_action.c</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>AllTests</GroupName>
-          <Files>
-            <File>
-              <FileName>all_tests.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\all_tests.c</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>Transform</GroupName>
-          <Files>
-            <File>
-              <FileName>cfft_tests.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\transform_tests\cfft_tests.c</FilePath>
-            </File>
-            <File>
-              <FileName>transform_test_group.c</FileName>
-              <FileType>1</FileType>
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-            </File>
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       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
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           <Vendor>ARM</Vendor>
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+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
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@@ -8095,7 +7392,7 @@
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+            <Capability>0</Capability>
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@@ -8130,6 +7427,7 @@
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             <uocXRam>0</uocXRam>
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+            <RvdsMve>0</RvdsMve>
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@@ -8202,9 +7500,9 @@
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-              <Define>ARM_MATH_ARMV8MML __DSP_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
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+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
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@@ -8212,7 +7510,7 @@
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               <MiscControls></MiscControls>
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+              <Define>ARMv8MML</Define>
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@@ -8698,11 +7996,12 @@
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       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
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           <Vendor>ARM</Vendor>
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+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
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           <FlashUtilSpec></FlashUtilSpec>
@@ -8819,7 +8118,7 @@
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             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>1</Capability>
+            <Capability>0</Capability>
             <DriverSelection>4096</DriverSelection>
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@@ -8854,6 +8153,7 @@
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             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
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@@ -8926,9 +8226,9 @@
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-              <Define>ARM_MATH_ARMV8MML __DSP_PRESENT=1U __FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
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+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
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@@ -8936,7 +8236,7 @@
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               <MiscControls></MiscControls>
-              <Define>ARM_MATH_ARMV8MML</Define>
+              <Define>ARMv8MML</Define>
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               <IncludePath></IncludePath>
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@@ -9418,730 +8718,6 @@
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-          <Vendor>ARM</Vendor>
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-          <PackURL>http://www.keil.com/pack/</PackURL>
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-          <FlashUtilSpec></FlashUtilSpec>
-          <StartupFile></StartupFile>
-          <FlashDriverDll>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</FlashDriverDll>
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-          <SLE66LinkerMisc></SLE66LinkerMisc>
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-            </File>
-            <File>
-              <FileName>statistics_test_group.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\statistics_tests\statistics_test_group.c</FilePath>
-            </File>
-            <File>
-              <FileName>mean_tests.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\statistics_tests\mean_tests.c</FilePath>
-            </File>
-            <File>
-              <FileName>min_tests.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\statistics_tests\min_tests.c</FilePath>
-            </File>
-            <File>
-              <FileName>power_tests.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\statistics_tests\power_tests.c</FilePath>
-            </File>
-            <File>
-              <FileName>rms_tests.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\statistics_tests\rms_tests.c</FilePath>
-            </File>
-            <File>
-              <FileName>std_tests.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\statistics_tests\std_tests.c</FilePath>
-            </File>
-            <File>
-              <FileName>var_tests.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\statistics_tests\var_tests.c</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>Support</GroupName>
-          <Files>
-            <File>
-              <FileName>copy_tests.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\support_tests\copy_tests.c</FilePath>
-            </File>
-            <File>
-              <FileName>support_test_common_data.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\support_tests\support_test_common_data.c</FilePath>
-            </File>
-            <File>
-              <FileName>support_test_group.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\support_tests\support_test_group.c</FilePath>
-            </File>
-            <File>
-              <FileName>fill_tests.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\support_tests\fill_tests.c</FilePath>
-            </File>
-            <File>
-              <FileName>x_to_y_tests.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\support_tests\x_to_y_tests.c</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>Intrinsics</GroupName>
-          <Files>
-            <File>
-              <FileName>intrinsics_tests.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests.c</FilePath>
-            </File>
-            <File>
-              <FileName>intrinsics_tests_common_data.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>MathHelper</GroupName>
-          <Files>
-            <File>
-              <FileName>math_helper.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Common\src\math_helper.c</FilePath>
-            </File>
-          </Files>
-        </Group>
-      </Groups>
-    </Target>
   </Targets>
 
   <RTE>
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM0l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM0l_config.txt
new file mode 100644
index 0000000..8e33c76
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM0l_config.txt
@@ -0,0 +1,8 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm0ct.semihosting-enable=0                    # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm0ct.min_sync_level=0x3                      # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm0ct.cpi_mul=0x1                             # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm0ct.cpi_div=0x1                             # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM3l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM3l_config.txt
new file mode 100644
index 0000000..2caf254
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM3l_config.txt
@@ -0,0 +1,8 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm3ct.semihosting-enable=0                    # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm3ct.min_sync_level=0x3                      # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm3ct.cpi_mul=0x1                             # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm3ct.cpi_div=0x1                             # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM4l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM4l_config.txt
new file mode 100644
index 0000000..1c9fece
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM4l_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm4ct.vfp-present=0                           # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+armcortexm4ct.semihosting-enable=0                    # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm4ct.min_sync_level=0x3                      # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm4ct.cpi_mul=0x1                             # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm4ct.cpi_div=0x1                             # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM4lf_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM4lf_config.txt
new file mode 100644
index 0000000..eb832ed
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM4lf_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm4ct.vfp-present=1                           # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+armcortexm4ct.semihosting-enable=0                    # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm4ct.min_sync_level=0x3                      # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm4ct.cpi_mul=0x1                             # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm4ct.cpi_div=0x1                             # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM7l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM7l_config.txt
new file mode 100644
index 0000000..4e591c9
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM7l_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm7ct.vfp-present=0                           # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+armcortexm7ct.semihosting-enable=0                    # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm7ct.min_sync_level=0x3                      # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm7ct.cpi_mul=0x1                             # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm7ct.cpi_div=0x1                             # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM7lfdp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM7lfdp_config.txt
new file mode 100644
index 0000000..1888d60
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM7lfdp_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm7ct.vfp-present=1                           # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+armcortexm7ct.semihosting-enable=0                    # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm7ct.min_sync_level=0x3                      # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm7ct.cpi_mul=0x1                             # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm7ct.cpi_div=0x1                             # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM7lfsp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM7lfsp_config.txt
new file mode 100644
index 0000000..1888d60
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM7lfsp_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm7ct.vfp-present=1                           # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+armcortexm7ct.semihosting-enable=0                    # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm7ct.min_sync_level=0x3                      # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm7ct.cpi_mul=0x1                             # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm7ct.cpi_div=0x1                             # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.cproject b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.cproject
new file mode 100644
index 0000000..58d2bf0
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.cproject
@@ -0,0 +1,273 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
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+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.arm.eclipse.build.config.baremetal.exe.debug.base.var.arm_compiler_5-5.1602530321" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions/>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="clean" description="" errorParsers="" id="com.arm.eclipse.build.config.baremetal.exe.debug.base.var.arm_compiler_5-5.1602530321" name="Debug" parent="com.arm.eclipse.build.config.baremetal.exe.debug.base.var.arm_compiler_5-5">
+					<folderInfo id="com.arm.eclipse.build.config.baremetal.exe.debug.base.var.arm_compiler_5-5.1602530321." name="/" resourcePath="">
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+									<listOptionValue builtIn="false" value="&quot;${cmsis_pack_root}/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/GCC&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${cmsis_pack_root}/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Template&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${cmsis_pack_root}/ARM/CMSIS/5.5.1/Device/ARM/ARMCA5/Include&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}}/RTE&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}}/RTE/CMSIS&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}}/RTE/Device/ARMCA5&quot;"/>
+								</option>
+								<inputType id="com.arm.tool.assembler.input.875241965" superClass="com.arm.tool.assembler.input"/>
+							</tool>
+							<tool id="com.arm.tool.c.linker.base.var.arm_compiler_5-5.1003890971" name="ARM Linker 5" superClass="com.arm.tool.c.linker.base.var.arm_compiler_5-5">
+								<option id="com.arm.tool.c.linker.option.cpu.1931299256" name="Target CPU (--cpu)" superClass="com.arm.tool.c.linker.option.cpu" useByScannerDiscovery="true" value="Cortex-A5.vfp" valueType="string"/>
+								<option id="com.arm.tool.c.linker.option.scatter.456779995" name="Scatter file (--scatter)" superClass="com.arm.tool.c.linker.option.scatter" value="${workspace_loc:/${ProjName}}/RTE/Device/ARMCA5/ARMCA5.sct" valueType="string"/>
+								<option id="com.arm.tool.c.linker.option.entry.1297402141" name="Image entry point (--entry)" superClass="com.arm.tool.c.linker.option.entry" value="Vectors" valueType="string"/>
+							</tool>
+							<tool id="com.arm.tool.librarian.base.var.arm_compiler_5-5.769289600" name="ARM Librarian 5" superClass="com.arm.tool.librarian.base.var.arm_compiler_5-5"/>
+						</toolChain>
+					</folderInfo>
+					<sourceEntries>
+						<entry excluding="Sources/test_src/main.c|Sources/DSP_src/CommonTables/CommonTables.c|Sources/reflibs_src/FilteringFunctions/FilteringFunctions.c|Sources/reflibs_src/HelperFunctions/HelperFunctions.c|Sources/reflibs_src/Intrinsics/Intrinsics_.c|Sources/reflibs_src/MatrixFunctions/MatrixFunctions.c|Sources/reflibs_src/StatisticsFunctions/StatisticsFunctions.c|Sources/reflibs_src/SupportFunctions/SupportFunctions.c|Sources/reflibs_src/FastMathFunctions/FastMathFunctions.c|Sources/reflibs_src/ControllerFunctions/ControllerFunctions.c|Sources/reflibs_src/ComplexMathFunctions/ComplexMathFunctions.c|Sources/reflibs_src/BasicMathFunctions/BasicMathFunctions.c|Sources/DSP_src/SupportFunctions/SupportFunctions.c|Sources/DSP_src/StatisticsFunctions/StatisticsFunctions.c|Sources/DSP_src/MatrixFunctions/MatrixFunctions.c|Sources/DSP_src/FilteringFunctions/FilteringFunctions.c|Sources/DSP_src/FastMathFunctions/FastMathFunctions.c|Sources/DSP_src/ControllerFunctions/ControllerFunctions.c|Sources/DSP_src/ComplexMathFunctions/ComplexMathFunctions.c|Sources/DSP_src/BasicMathFunctions/BasicMathFunctions.c|Sources/reflibs_src/TransformFunctions|Sources/DSP_src/CommonTables/arm_const_structs.c|Sources/test_src/transform_tests|Sources/DSP_src/TransformFunctions" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+					</sourceEntries>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="com.arm.cmsis.project">
+		<rteConfig name="DspLibTest_FVP_A5.rteconfig"/>
+		<toolChainAdapter id="com.arm.cmsis.pack.build.armcc5.Armcc5ToolChainAdapter" name="Adapter for ARM C/C++ 5.x and 6.x toolchains"/>
+		<device Dcore="Cortex-A5" DcoreVersion="r0p1" Dendian="Little-endian" Dfamily="ARM Cortex A5" Dfpu="DP_FPU" Dmpu="MPU" Dname="ARMCA5" Dvendor="ARM:82" info="ARM , 2 MB RAM, 2 MB ROM" url="http://www.keil.com/dd2/arm/armca5"/>
+		<files>
+			<file name="RTE/Device/ARMCA5/ARMCA5.sct" version="1.0.0"/>
+			<file name="RTE/Device/ARMCA5/mem_ARMCA5.h" version="1.0.0"/>
+			<file name="RTE/Device/ARMCA5/mmu_ARMCA5.c" version="1.0.0"/>
+			<file name="RTE/Device/ARMCA5/system_ARMCA5.c" version="1.0.1"/>
+			<file name="RTE/CMSIS/RTX_Config.c" version="5.1.0"/>
+			<file name="RTE/Device/ARMCA5/startup_ARMCA5.c" version="1.0.0"/>
+			<file name="RTE/CMSIS/RTX_Config.h" version="5.5.0"/>
+			<file name="RTE/CMSIS/handlers.c" version="5.1.0"/>
+			<file name="RTE/Device/ARMCA5/system_ARMCA5.h" version="1.0.0"/>
+		</files>
+	</storageModule>
+	<storageModule moduleId="com.arm.projectSettings" version="5.25"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="DspLibTest_FVP_A5.null.368084077" name="DspLibTest_FVP_A5"/>
+	</storageModule>
+	<storageModule moduleId="refreshScope" versionNumber="2">
+		<configuration configurationName="Debug">
+			<resource resourceType="PROJECT" workspacePath="/DspLibTest_FVP_A5"/>
+		</configuration>
+		<configuration configurationName="Release">
+			<resource resourceType="PROJECT" workspacePath="/DspLibTest_FVP_A5"/>
+		</configuration>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
+</cproject>
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.gitignore
new file mode 100644
index 0000000..3df573f
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.gitignore
@@ -0,0 +1 @@
+/Debug/
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.project b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.project
new file mode 100644
index 0000000..6212766
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.project
@@ -0,0 +1,148 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>DspLibTest_FVP_A5</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+		<nature>com.arm.cmsis.pack.project.RteNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>Includes/DSP_includes</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/Include</locationURI>
+		</link>
+		<link>
+			<name>Includes/common_includes</name>
+			<type>2</type>
+			<locationURI>PARENT-1-PROJECT_LOC/Common/inc</locationURI>
+		</link>
+		<link>
+			<name>Includes/jtest_includes</name>
+			<type>2</type>
+			<locationURI>PARENT-1-PROJECT_LOC/Common/JTest/inc</locationURI>
+		</link>
+		<link>
+			<name>Includes/reflibs_includes</name>
+			<type>2</type>
+			<locationURI>PARENT-1-PROJECT_LOC/RefLibs/inc</locationURI>
+		</link>
+		<link>
+			<name>Sources/DSP_src</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/Source</locationURI>
+		</link>
+		<link>
+			<name>Sources/jtest_src</name>
+			<type>2</type>
+			<locationURI>PARENT-1-PROJECT_LOC/Common/JTest/src</locationURI>
+		</link>
+		<link>
+			<name>Sources/reflibs_src</name>
+			<type>2</type>
+			<locationURI>PARENT-1-PROJECT_LOC/RefLibs/src</locationURI>
+		</link>
+		<link>
+			<name>Sources/test_src</name>
+			<type>2</type>
+			<locationURI>PARENT-1-PROJECT_LOC/Common/src</locationURI>
+		</link>
+		<link>
+			<name>RTE/CMSIS/irq_ca.S</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S</locationURI>
+		</link>
+		<link>
+			<name>RTE/CMSIS/rtx_delay.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_delay.c</locationURI>
+		</link>
+		<link>
+			<name>RTE/CMSIS/rtx_evflags.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_evflags.c</locationURI>
+		</link>
+		<link>
+			<name>RTE/CMSIS/rtx_evr.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_evr.c</locationURI>
+		</link>
+		<link>
+			<name>RTE/CMSIS/rtx_kernel.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_kernel.c</locationURI>
+		</link>
+		<link>
+			<name>RTE/CMSIS/rtx_lib.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_lib.c</locationURI>
+		</link>
+		<link>
+			<name>RTE/CMSIS/rtx_memory.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_memory.c</locationURI>
+		</link>
+		<link>
+			<name>RTE/CMSIS/rtx_mempool.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_mempool.c</locationURI>
+		</link>
+		<link>
+			<name>RTE/CMSIS/rtx_msgqueue.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c</locationURI>
+		</link>
+		<link>
+			<name>RTE/CMSIS/rtx_mutex.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_mutex.c</locationURI>
+		</link>
+		<link>
+			<name>RTE/CMSIS/rtx_semaphore.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_semaphore.c</locationURI>
+		</link>
+		<link>
+			<name>RTE/CMSIS/rtx_system.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_system.c</locationURI>
+		</link>
+		<link>
+			<name>RTE/CMSIS/rtx_thread.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_thread.c</locationURI>
+		</link>
+		<link>
+			<name>RTE/CMSIS/rtx_timer.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_timer.c</locationURI>
+		</link>
+		<link>
+			<name>RTE/Device/ARMCA5/irq_ctrl_gic.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/Core_A/Source/irq_ctrl_gic.c</locationURI>
+		</link>
+		<link>
+			<name>RTE/Device/ARMCA5/os_tick_ptim.c</name>
+			<type>1</type>
+			<locationURI>$%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/Source/os_tick_ptim.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.settings/language.settings.xml b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.settings/language.settings.xml
new file mode 100644
index 0000000..e70059d
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.settings/language.settings.xml
@@ -0,0 +1,25 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<project>
+	<configuration id="com.arm.eclipse.build.config.baremetal.exe.debug.base.var.arm_compiler_5-5.1602530321" name="Debug">
+		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
+			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
+			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
+			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
+			<provider class="com.arm.eclipse.builder.armcc.discovery.ArmCompiler6LanguageSettingsProvider" console="false" env-hash="-1406983329259045156" id="com.arm.eclipse.builder.armcc.v6.langprovider" keep-relative-paths="false" name="Arm Compiler 6 Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+				<language-scope id="org.eclipse.cdt.core.gcc"/>
+				<language-scope id="org.eclipse.cdt.core.g++"/>
+			</provider>
+		</extension>
+	</configuration>
+	<configuration id="com.arm.eclipse.build.config.baremetal.exe.release.base.var.arm_compiler_5-5.233016572" name="Release">
+		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
+			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
+			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
+			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
+			<provider class="com.arm.eclipse.builder.armcc.discovery.ArmCompiler5LanguageSettingsProvider" console="false" env-hash="-1446449183757281068" id="com.arm.eclipse.builder.armcc.v5.langprovider" keep-relative-paths="false" name="Arm Compiler 5 Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} --list-macros &quot;${INPUTS}&quot;" prefer-non-shared="true">
+				<language-scope id="com.arm.eclipse.builder.armcc.lang.c"/>
+				<language-scope id="com.arm.eclipse.builder.armcc.lang.cpp"/>
+			</provider>
+		</extension>
+	</configuration>
+</project>
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.settings/org.eclipse.ltk.core.refactoring.prefs b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.settings/org.eclipse.ltk.core.refactoring.prefs
new file mode 100644
index 0000000..b196c64
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.settings/org.eclipse.ltk.core.refactoring.prefs
@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+org.eclipse.ltk.core.refactoring.enable.project.refactoring.history=false
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/DspLibTest_FVP_A5.launch b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/DspLibTest_FVP_A5.launch
new file mode 100644
index 0000000..58e8a9f
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/DspLibTest_FVP_A5.launch
@@ -0,0 +1,179 @@
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+<stringAttribute key="FILES.DOWNLOAD_DEBUG.RESOURCES.2.TYPE" value="TARGET_WORKING_DIR"/>
+<stringAttribute key="FILES.DOWNLOAD_DEBUG.RESOURCES.2.VALUE" value=""/>
+<intAttribute key="FILES.DOWNLOAD_DEBUG.RESOURCES.COUNT" value="3"/>
+<intAttribute key="FILES.DOWNLOAD_DEBUG_ANDROID.RESOURCES.COUNT" value="0"/>
+<listAttribute key="FILES.ICE_DEBUG">
+<listEntry value="ON_DEMAND_LOAD"/>
+<listEntry value="ALSO_LOAD_SYMBOLS"/>
+</listAttribute>
+<stringAttribute key="FILES.ICE_DEBUG.RESOURCES.0.OPTION.ALSO_LOAD_SYMBOLS" value="true"/>
+<stringAttribute key="FILES.ICE_DEBUG.RESOURCES.0.OPTION.ON_DEMAND_LOAD" value="true"/>
+<stringAttribute key="FILES.ICE_DEBUG.RESOURCES.0.TYPE" value="APP_ON_HOST_TO_DOWNLOAD"/>
+<stringAttribute key="FILES.ICE_DEBUG.RESOURCES.0.VALUE" value="${workspace_loc:/DspLibTest_FVP_A5/Debug/DspLibTest_FVP_A5.axf}"/>
+<intAttribute key="FILES.ICE_DEBUG.RESOURCES.COUNT" value="1"/>
+<listAttribute key="FILES.ICE_DEBUG_WITH_ETB_TRACE">
+<listEntry value="ON_DEMAND_LOAD"/>
+<listEntry value="ALSO_LOAD_SYMBOLS"/>
+</listAttribute>
+<stringAttribute key="FILES.ICE_DEBUG_WITH_ETB_TRACE.RESOURCES.0.OPTION.ALSO_LOAD_SYMBOLS" value="true"/>
+<stringAttribute key="FILES.ICE_DEBUG_WITH_ETB_TRACE.RESOURCES.0.OPTION.ON_DEMAND_LOAD" value="true"/>
+<stringAttribute key="FILES.ICE_DEBUG_WITH_ETB_TRACE.RESOURCES.0.TYPE" value="APP_ON_HOST_TO_DOWNLOAD"/>
+<stringAttribute key="FILES.ICE_DEBUG_WITH_ETB_TRACE.RESOURCES.0.VALUE" value=""/>
+<intAttribute key="FILES.ICE_DEBUG_WITH_ETB_TRACE.RESOURCES.COUNT" value="1"/>
+<listAttribute key="FILES.ICE_DEBUG_WITH_TRACE">
+<listEntry value="ON_DEMAND_LOAD"/>
+<listEntry value="ALSO_LOAD_SYMBOLS"/>
+</listAttribute>
+<stringAttribute key="FILES.ICE_DEBUG_WITH_TRACE.RESOURCES.0.OPTION.ALSO_LOAD_SYMBOLS" value="true"/>
+<stringAttribute key="FILES.ICE_DEBUG_WITH_TRACE.RESOURCES.0.OPTION.ON_DEMAND_LOAD" value="true"/>
+<stringAttribute key="FILES.ICE_DEBUG_WITH_TRACE.RESOURCES.0.TYPE" value="APP_ON_HOST_TO_DOWNLOAD"/>
+<stringAttribute key="FILES.ICE_DEBUG_WITH_TRACE.RESOURCES.0.VALUE" value=""/>
+<intAttribute key="FILES.ICE_DEBUG_WITH_TRACE.RESOURCES.COUNT" value="1"/>
+<stringAttribute key="FILES.SELECTED_DEBUG_OPEATION" value="ICE_DEBUG"/>
+<stringAttribute key="HOST_WORKING_DIR" value="${workspace_loc}"/>
+<booleanAttribute key="HOST_WORKING_DIR_USE_DEFAULT" value="true"/>
+<booleanAttribute key="KEY_COMMANDS_AFTER_CONNECT" value="false"/>
+<stringAttribute key="KEY_COMMANDS_AFTER_CONNECT_TEXT" value=""/>
+<booleanAttribute key="KEY_COMMANDS_AS_CONNECT" value="false"/>
+<stringAttribute key="RSE_CONFIGURATION" value=""/>
+<booleanAttribute key="RSE_USE_HOSTNAME" value="true"/>
+<stringAttribute key="TCP_DISABLE_EXTENDED_MODE" value="true"/>
+<booleanAttribute key="TCP_KILL_ON_EXIT" value="false"/>
+<booleanAttribute key="VFS_ENABLED" value="true"/>
+<stringAttribute key="VFS_LOCAL_DIR" value="${workspace_loc}"/>
+<stringAttribute key="VFS_REMOTE_MOUNT" value="/writeable"/>
+<stringAttribute key="breakpoints" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?&gt;&#10;&lt;breakpoints&gt;&#10;&lt;/breakpoints&gt;&#10;"/>
+<listAttribute key="com.arm.debug.views.common.AddressTracker.debugger.view.DisassemblyView.addresses">
+<listEntry value="&lt;Next Instruction&gt;"/>
+</listAttribute>
+<listAttribute key="com.arm.debug.views.common.AddressTracker.debugger.view.DisassemblyView.ranges">
+<listEntry value="100"/>
+</listAttribute>
+<listAttribute key="com.arm.debug.views.common.AddressTracker.debugger.view.MemoryView.addresses">
+<listEntry value=""/>
+</listAttribute>
+<listAttribute key="com.arm.debug.views.common.AddressTracker.debugger.view.MemoryView.ranges">
+<listEntry value=""/>
+</listAttribute>
+<stringAttribute key="com.arm.debug.views.debugConsole.DebugCommandLine.History" value="set semihosting disabled;set ?;set help;info set;armclang.exe"/>
+<stringAttribute key="config_db_activity_name" value="Debug Cortex-A5"/>
+<stringAttribute key="config_db_connection_keys" value="dtsl_config dtsl_tracecapture_option dtsl_config_script model_params config_file setup TCP_KILL_ON_EXIT TCP_DISABLE_EXTENDED_MODE"/>
+<stringAttribute key="config_db_connection_type" value="Bare Metal Debug"/>
+<stringAttribute key="config_db_platform_name" value="Arm FVP (Installed with Arm DS) - VE_Cortex_A5x1"/>
+<stringAttribute key="config_db_project_type" value="Bare Metal Debug"/>
+<stringAttribute key="config_db_project_type_id" value="BARE_METAL"/>
+<stringAttribute key="config_db_taxonomy_id" value="/platform/armfvp_installedwitharmds_/ve_cortex_a5x1"/>
+<stringAttribute key="config_file" value="CDB://cadi_config.xml"/>
+<booleanAttribute key="connectOnly" value="false"/>
+<listAttribute key="debugger.view.DisassemblyView:current">
+<listEntry value="&lt;Next Instruction&gt;"/>
+<listEntry value="100"/>
+</listAttribute>
+<stringAttribute key="debugger.view.MemoryView" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?&gt;&#10;&lt;page&gt;&#10;&#9;&lt;memoryView/&gt;&#10;&lt;/page&gt;&#10;"/>
+<listAttribute key="debugger.view.MemoryView:current">
+<listEntry value=""/>
+<listEntry value=""/>
+</listAttribute>
+<stringAttribute key="debugger.view.NewRegisterView:DebugOutlineColumnState" value="OutlineConfig1&#9;8&#9;0&#9;true&#9;true&#9;49&#9;-1&#9;true&#9;1&#9;false&#9;true&#9;90&#9;-1&#9;true&#9;2&#9;true&#9;true&#9;45&#9;-1&#9;true&#9;3&#9;false&#9;true&#9;42&#9;-1&#9;true&#9;4&#9;false&#9;true&#9;50&#9;-1&#9;true&#9;5&#9;true&#9;true&#9;37&#9;-1&#9;true&#9;6&#9;false&#9;true&#9;62&#9;-1&#9;true&#9;7&#9;true&#9;true&#9;53&#9;-1&#9;true"/>
+<stringAttribute key="debugger.view.NewRegisterView:_selectedRegisterSet" value="All registers"/>
+<mapAttribute key="debugger.view.NewRegisterView_registerSets"/>
+<listAttribute key="debugger.view.TraceView:TRACE_EXPORT_FILTERS"/>
+<stringAttribute key="debugger.view.VariableTreeView:DebugOutlineColumnState" value="OutlineConfig1&#9;8&#9;0&#9;true&#9;true&#9;149&#9;-1&#9;true&#9;1&#9;false&#9;true&#9;90&#9;-1&#9;true&#9;2&#9;true&#9;true&#9;95&#9;-1&#9;true&#9;3&#9;true&#9;true&#9;42&#9;-1&#9;true&#9;4&#9;true&#9;true&#9;50&#9;-1&#9;true&#9;5&#9;true&#9;true&#9;37&#9;-1&#9;true&#9;6&#9;true&#9;true&#9;62&#9;-1&#9;true&#9;7&#9;true&#9;true&#9;53&#9;-1&#9;true"/>
+<listAttribute key="debugger.view.VariableTreeView:USER_ADDED_FILE_STATICS"/>
+<listAttribute key="debugger.view.VariableTreeView:USER_ADDED_GLOBALS"/>
+<booleanAttribute key="debugger.view.register.DrawAsHex" value="false"/>
+<booleanAttribute key="debugger.view.variable.DrawAsHex" value="false"/>
+<stringAttribute key="dtsl_config" value="DtslScript"/>
+<stringAttribute key="dtsl_config_script" value="CDB://dtsl_config_script.py"/>
+<stringAttribute key="dtsl_options_file" value="default"/>
+<stringAttribute key="dtsl_tracecapture_option" value="options.traceBuffer.traceCaptureDevice"/>
+<stringAttribute key="launch_configuration_version" value="2018.0"/>
+<booleanAttribute key="linuxOS" value="false"/>
+<stringAttribute key="model_params" value=""/>
+<booleanAttribute key="runAfterConnect" value="false"/>
+<listAttribute key="setup">
+<listEntry value="CDB://Scripts/rtsm_launcher.py"/>
+<listEntry value="&quot;FVP_VE_Cortex-A5x1&quot;"/>
+</listAttribute>
+<booleanAttribute key="single_platform" value="false"/>
+<stringAttribute key="stopAtExpression" value="*$ENTRYPOINT"/>
+<stringAttribute key="watchpoints" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?&gt;&#10;&lt;watchpoints&gt;&#10;&lt;/watchpoints&gt;&#10;"/>
+</launchConfiguration>
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/DspLibTest_FVP_A5.rteconfig b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/DspLibTest_FVP_A5.rteconfig
new file mode 100644
index 0000000..00e2637
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/DspLibTest_FVP_A5.rteconfig
@@ -0,0 +1,83 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<configuration xmlns:xs="http://www.w3.org/2001/XMLSchema-instance">
+  <toolchain Tcompiler="ARMCC" Toutput="exe"/>
+  <components>
+    <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="1.1.3">
+      <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.1"/>
+      <file category="doc" name="CMSIS/Documentation/Core_A/html/index.html"/>
+      <file category="include" name="CMSIS/Core_A/Include/"/>
+    </component>
+    <component Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cvendor="ARM" Cversion="5.5.0">
+      <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.1"/>
+      <file category="doc" name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
+      <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
+      <file attr="config" category="header" name="CMSIS/RTOS2/RTX/Config/RTX_Config.h" version="5.5.0"/>
+      <file attr="config" category="source" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.1.0"/>
+      <file attr="config" category="source" name="CMSIS/RTOS2/RTX/Config/handlers.c" version="5.1.0"/>
+      <file attr="template" category="source" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS2 'main' function" version="2.1.0"/>
+      <file attr="template" category="source" name="CMSIS/RTOS2/RTX/Template/Events.c" select="CMSIS-RTOS2 Events" version="2.0.0"/>
+      <file attr="template" category="source" name="CMSIS/RTOS2/RTX/Template/MemPool.c" select="CMSIS-RTOS2 Memory Pool" version="2.0.0"/>
+      <file attr="template" category="source" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c" select="CMSIS-RTOS2 Message Queue" version="2.0.0"/>
+      <file attr="template" category="source" name="CMSIS/RTOS2/RTX/Template/Mutex.c" select="CMSIS-RTOS2 Mutex" version="2.0.0"/>
+      <file attr="template" category="source" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" select="CMSIS-RTOS2 Semaphore" version="2.0.0"/>
+      <file attr="template" category="source" name="CMSIS/RTOS2/RTX/Template/Thread.c" select="CMSIS-RTOS2 Thread" version="2.0.0"/>
+      <file attr="template" category="source" name="CMSIS/RTOS2/RTX/Template/Timer.c" select="CMSIS-RTOS2 Timer" version="2.0.1"/>
+      <file attr="template" category="source" name="CMSIS/RTOS2/RTX/Template/svc_user.c" select="CMSIS-RTOS2 SVC User Table" version="1.0.0"/>
+      <file category="other" name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
+      <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
+      <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
+      <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
+      <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
+      <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
+      <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
+      <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
+      <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
+      <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
+      <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
+      <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
+      <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
+      <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
+      <file category="source" condition="CA_ARMCC5" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"/>
+      <file category="source" condition="CA_ARMCC6" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"/>
+    </component>
+    <component Capiversion="1.0.0" Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Cvendor="ARM" Cversion="1.0.1" deviceDependent="1">
+      <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.1"/>
+      <file category="sourceC" deviceDependent="1" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
+    </component>
+    <component Capiversion="1.0.1" Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Cvendor="ARM" Cversion="1.0.2" deviceDependent="1">
+      <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.1"/>
+      <file category="sourceC" deviceDependent="1" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
+    </component>
+    <component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.0" deviceDependent="1">
+      <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.1"/>
+      <file category="include" deviceDependent="1" name="Device/ARM/ARMCA5/Include/"/>
+      <file attr="config" category="sourceC" condition="ARMCC5" deviceDependent="1" name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0"/>
+      <file attr="config" category="linkerScript" condition="ARMCC5" deviceDependent="1" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct" version="1.0.0"/>
+      <file attr="config" category="sourceC" condition="ARMCC6" deviceDependent="1" name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0"/>
+      <file attr="config" category="linkerScript" condition="ARMCC6" deviceDependent="1" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct" version="1.0.0"/>
+      <file attr="config" category="sourceC" deviceDependent="1" name="Device/ARM/ARMCA5/Source/system_ARMCA5.c" version="1.0.1"/>
+      <file attr="config" category="sourceC" deviceDependent="1" name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c" version="1.0.0"/>
+      <file attr="config" category="header" deviceDependent="1" name="Device/ARM/ARMCA5/Include/system_ARMCA5.h" version="1.0.0"/>
+      <file attr="config" category="header" deviceDependent="1" name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h" version="1.0.0"/>
+    </component>
+  </components>
+  <apis>
+    <api Capiversion="2.1.3" Cclass="CMSIS" Cgroup="RTOS2" Cvendor="ARM" Cversion="2.1.3" exclusive="1">
+      <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.1"/>
+      <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
+      <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
+    </api>
+    <api Capiversion="1.0.0" Cclass="Device" Cgroup="IRQ Controller" Cvendor="ARM" Cversion="1.0.0" exclusive="1">
+      <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.1"/>
+      <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
+    </api>
+    <api Capiversion="1.0.1" Cclass="Device" Cgroup="OS Tick" Cvendor="ARM" Cversion="1.0.1" exclusive="1">
+      <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.1"/>
+      <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
+    </api>
+  </apis>
+  <device Dcore="Cortex-A5" DcoreVersion="r0p1" Dendian="Little-endian" Dfamily="ARM Cortex A5" Dfpu="DP_FPU" Dmpu="MPU" Dname="ARMCA5" Dvendor="ARM:82" info="ARM , 2 MB RAM, 2 MB ROM" url="http://www.keil.com/dd2/arm/armca5">
+    <package info="CMSIS (Cortex Microcontroller Software Interface Standard)" name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.1"/>
+  </device>
+  <packages useAllLatestPacks="1"/>
+</configuration>
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/CMSIS/RTX_Config.c b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/CMSIS/RTX_Config.c
new file mode 100644
index 0000000..da85ffe
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/CMSIS/RTX_Config.c
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2013-2017 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * -----------------------------------------------------------------------------
+ *
+ * $Revision:   V5.1.0
+ *
+ * Project:     CMSIS-RTOS RTX
+ * Title:       RTX Configuration
+ *
+ * -----------------------------------------------------------------------------
+ */
+ 
+#include "cmsis_compiler.h"
+#include "rtx_os.h"
+ 
+// OS Idle Thread
+__WEAK __NO_RETURN void osRtxIdleThread (void *argument) {
+  (void)argument;
+
+  for (;;) {}
+}
+ 
+// OS Error Callback function
+__WEAK uint32_t osRtxErrorNotify (uint32_t code, void *object_id) {
+  (void)object_id;
+
+  switch (code) {
+    case osRtxErrorStackUnderflow:
+      // Stack underflow detected for thread (thread_id=object_id)
+      break;
+    case osRtxErrorISRQueueOverflow:
+      // ISR Queue overflow detected when inserting object (object_id)
+      break;
+    case osRtxErrorTimerQueueOverflow:
+      // User Timer Callback Queue overflow detected for timer (timer_id=object_id)
+      break;
+    case osRtxErrorClibSpace:
+      // Standard C/C++ library libspace not available: increase OS_THREAD_LIBSPACE_NUM
+      break;
+    case osRtxErrorClibMutex:
+      // Standard C/C++ library mutex initialization failed
+      break;
+    default:
+      break;
+  }
+  for (;;) {}
+return 0U;
+}
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/CMSIS/RTX_Config.h b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/CMSIS/RTX_Config.h
new file mode 100644
index 0000000..f567411
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/CMSIS/RTX_Config.h
@@ -0,0 +1,578 @@
+/*
+ * Copyright (c) 2013-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * -----------------------------------------------------------------------------
+ *
+ * $Revision:   V5.5.0
+ *
+ * Project:     CMSIS-RTOS RTX
+ * Title:       RTX Configuration definitions
+ *
+ * -----------------------------------------------------------------------------
+ */
+ 
+#ifndef RTX_CONFIG_H_
+#define RTX_CONFIG_H_
+ 
+#ifdef   _RTE_
+#include "RTE_Components.h"
+#ifdef    RTE_RTX_CONFIG_H
+#include  RTE_RTX_CONFIG_H
+#endif
+#endif
+ 
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+ 
+// <h>System Configuration
+// =======================
+ 
+//   <o>Global Dynamic Memory size [bytes] <0-1073741824:8>
+//   <i> Defines the combined global dynamic memory size.
+//   <i> Default: 4096
+#ifndef OS_DYNAMIC_MEM_SIZE
+#define OS_DYNAMIC_MEM_SIZE         4096
+#endif
+ 
+//   <o>Kernel Tick Frequency [Hz] <1-1000000>
+//   <i> Defines base time unit for delays and timeouts.
+//   <i> Default: 1000 (1ms tick)
+#ifndef OS_TICK_FREQ
+#define OS_TICK_FREQ                1000
+#endif
+ 
+//   <e>Round-Robin Thread switching
+//   <i> Enables Round-Robin Thread switching.
+#ifndef OS_ROBIN_ENABLE
+#define OS_ROBIN_ENABLE             1
+#endif
+ 
+//     <o>Round-Robin Timeout <1-1000>
+//     <i> Defines how many ticks a thread will execute before a thread switch.
+//     <i> Default: 5
+#ifndef OS_ROBIN_TIMEOUT
+#define OS_ROBIN_TIMEOUT            5
+#endif
+ 
+//   </e>
+ 
+//   <o>ISR FIFO Queue 
+//      <4=>  4 entries    <8=>   8 entries   <12=>  12 entries   <16=>  16 entries
+//     <24=> 24 entries   <32=>  32 entries   <48=>  48 entries   <64=>  64 entries
+//     <96=> 96 entries  <128=> 128 entries  <196=> 196 entries  <256=> 256 entries
+//   <i> RTOS Functions called from ISR store requests to this buffer.
+//   <i> Default: 16 entries
+#ifndef OS_ISR_FIFO_QUEUE
+#define OS_ISR_FIFO_QUEUE           16
+#endif
+ 
+//   <q>Object Memory usage counters
+//   <i> Enables object memory usage counters (requires RTX source variant).
+#ifndef OS_OBJ_MEM_USAGE
+#define OS_OBJ_MEM_USAGE            0
+#endif
+ 
+// </h>
+ 
+// <h>Thread Configuration
+// =======================
+ 
+//   <e>Object specific Memory allocation
+//   <i> Enables object specific memory allocation.
+#ifndef OS_THREAD_OBJ_MEM
+#define OS_THREAD_OBJ_MEM           0
+#endif
+ 
+//     <o>Number of user Threads <1-1000>
+//     <i> Defines maximum number of user threads that can be active at the same time.
+//     <i> Applies to user threads with system provided memory for control blocks.
+#ifndef OS_THREAD_NUM
+#define OS_THREAD_NUM               1
+#endif
+ 
+//     <o>Number of user Threads with default Stack size <0-1000>
+//     <i> Defines maximum number of user threads with default stack size.
+//     <i> Applies to user threads with zero stack size specified.
+#ifndef OS_THREAD_DEF_STACK_NUM
+#define OS_THREAD_DEF_STACK_NUM     0
+#endif
+ 
+//     <o>Total Stack size [bytes] for user Threads with user-provided Stack size <0-1073741824:8>
+//     <i> Defines the combined stack size for user threads with user-provided stack size.
+//     <i> Applies to user threads with user-provided stack size and system provided memory for stack.
+//     <i> Default: 0
+#ifndef OS_THREAD_USER_STACK_SIZE
+#define OS_THREAD_USER_STACK_SIZE   0
+#endif
+ 
+//   </e>
+ 
+//   <o>Default Thread Stack size [bytes] <96-1073741824:8>
+//   <i> Defines stack size for threads with zero stack size specified.
+//   <i> Default: 256
+#ifndef OS_STACK_SIZE
+#define OS_STACK_SIZE               512
+#endif
+ 
+//   <o>Idle Thread Stack size [bytes] <72-1073741824:8>
+//   <i> Defines stack size for Idle thread.
+//   <i> Default: 256
+#ifndef OS_IDLE_THREAD_STACK_SIZE
+#define OS_IDLE_THREAD_STACK_SIZE   512
+#endif
+ 
+//   <o>Idle Thread TrustZone Module Identifier
+//   <i> Defines TrustZone Thread Context Management Identifier.
+//   <i> Applies only to cores with TrustZone technology.
+//   <i> Default: 0 (not used)
+#ifndef OS_IDLE_THREAD_TZ_MOD_ID
+#define OS_IDLE_THREAD_TZ_MOD_ID    0
+#endif
+ 
+//   <q>Stack overrun checking
+//   <i> Enables stack overrun check at thread switch.
+//   <i> Enabling this option increases slightly the execution time of a thread switch.
+#ifndef OS_STACK_CHECK
+#define OS_STACK_CHECK              1
+#endif
+ 
+//   <q>Stack usage watermark
+//   <i> Initializes thread stack with watermark pattern for analyzing stack usage.
+//   <i> Enabling this option increases significantly the execution time of thread creation.
+#ifndef OS_STACK_WATERMARK
+#define OS_STACK_WATERMARK          0
+#endif
+ 
+//   <o>Processor mode for Thread execution 
+//     <0=> Unprivileged mode 
+//     <1=> Privileged mode
+//   <i> Default: Privileged mode
+#ifndef OS_PRIVILEGE_MODE
+#define OS_PRIVILEGE_MODE           1
+#endif
+ 
+// </h>
+ 
+// <h>Timer Configuration
+// ======================
+ 
+//   <e>Object specific Memory allocation
+//   <i> Enables object specific memory allocation.
+#ifndef OS_TIMER_OBJ_MEM
+#define OS_TIMER_OBJ_MEM            0
+#endif
+ 
+//     <o>Number of Timer objects <1-1000>
+//     <i> Defines maximum number of objects that can be active at the same time.
+//     <i> Applies to objects with system provided memory for control blocks.
+#ifndef OS_TIMER_NUM
+#define OS_TIMER_NUM                1
+#endif
+ 
+//   </e>
+ 
+//   <o>Timer Thread Priority
+//      <8=> Low
+//     <16=> Below Normal  <24=> Normal  <32=> Above Normal
+//     <40=> High
+//     <48=> Realtime
+//   <i> Defines priority for timer thread
+//   <i> Default: High
+#ifndef OS_TIMER_THREAD_PRIO
+#define OS_TIMER_THREAD_PRIO        40
+#endif
+ 
+//   <o>Timer Thread Stack size [bytes] <0-1073741824:8>
+//   <i> Defines stack size for Timer thread.
+//   <i> May be set to 0 when timers are not used.
+//   <i> Default: 256
+#ifndef OS_TIMER_THREAD_STACK_SIZE
+#define OS_TIMER_THREAD_STACK_SIZE  256
+#endif
+ 
+//   <o>Timer Thread TrustZone Module Identifier
+//   <i> Defines TrustZone Thread Context Management Identifier.
+//   <i> Applies only to cores with TrustZone technology.
+//   <i> Default: 0 (not used)
+#ifndef OS_TIMER_THREAD_TZ_MOD_ID
+#define OS_TIMER_THREAD_TZ_MOD_ID   0
+#endif
+ 
+//   <o>Timer Callback Queue entries <0-256>
+//   <i> Number of concurrent active timer callback functions.
+//   <i> May be set to 0 when timers are not used.
+//   <i> Default: 4
+#ifndef OS_TIMER_CB_QUEUE
+#define OS_TIMER_CB_QUEUE           4
+#endif
+ 
+// </h>
+ 
+// <h>Event Flags Configuration
+// ============================
+ 
+//   <e>Object specific Memory allocation
+//   <i> Enables object specific memory allocation.
+#ifndef OS_EVFLAGS_OBJ_MEM
+#define OS_EVFLAGS_OBJ_MEM          0
+#endif
+ 
+//     <o>Number of Event Flags objects <1-1000>
+//     <i> Defines maximum number of objects that can be active at the same time.
+//     <i> Applies to objects with system provided memory for control blocks.
+#ifndef OS_EVFLAGS_NUM
+#define OS_EVFLAGS_NUM              1
+#endif
+ 
+//   </e>
+ 
+// </h>
+ 
+// <h>Mutex Configuration
+// ======================
+ 
+//   <e>Object specific Memory allocation
+//   <i> Enables object specific memory allocation.
+#ifndef OS_MUTEX_OBJ_MEM
+#define OS_MUTEX_OBJ_MEM            0
+#endif
+ 
+//     <o>Number of Mutex objects <1-1000>
+//     <i> Defines maximum number of objects that can be active at the same time.
+//     <i> Applies to objects with system provided memory for control blocks.
+#ifndef OS_MUTEX_NUM
+#define OS_MUTEX_NUM                1
+#endif
+ 
+//   </e>
+ 
+// </h>
+ 
+// <h>Semaphore Configuration
+// ==========================
+ 
+//   <e>Object specific Memory allocation
+//   <i> Enables object specific memory allocation.
+#ifndef OS_SEMAPHORE_OBJ_MEM
+#define OS_SEMAPHORE_OBJ_MEM        0
+#endif
+ 
+//     <o>Number of Semaphore objects <1-1000>
+//     <i> Defines maximum number of objects that can be active at the same time.
+//     <i> Applies to objects with system provided memory for control blocks.
+#ifndef OS_SEMAPHORE_NUM
+#define OS_SEMAPHORE_NUM            1
+#endif
+ 
+//   </e>
+ 
+// </h>
+ 
+// <h>Memory Pool Configuration
+// ============================
+ 
+//   <e>Object specific Memory allocation
+//   <i> Enables object specific memory allocation.
+#ifndef OS_MEMPOOL_OBJ_MEM
+#define OS_MEMPOOL_OBJ_MEM          0
+#endif
+ 
+//     <o>Number of Memory Pool objects <1-1000>
+//     <i> Defines maximum number of objects that can be active at the same time.
+//     <i> Applies to objects with system provided memory for control blocks.
+#ifndef OS_MEMPOOL_NUM
+#define OS_MEMPOOL_NUM              1
+#endif
+ 
+//     <o>Data Storage Memory size [bytes] <0-1073741824:8>
+//     <i> Defines the combined data storage memory size.
+//     <i> Applies to objects with system provided memory for data storage.
+//     <i> Default: 0
+#ifndef OS_MEMPOOL_DATA_SIZE
+#define OS_MEMPOOL_DATA_SIZE        0
+#endif
+ 
+//   </e>
+ 
+// </h>
+ 
+// <h>Message Queue Configuration
+// ==============================
+ 
+//   <e>Object specific Memory allocation
+//   <i> Enables object specific memory allocation.
+#ifndef OS_MSGQUEUE_OBJ_MEM
+#define OS_MSGQUEUE_OBJ_MEM         0
+#endif
+ 
+//     <o>Number of Message Queue objects <1-1000>
+//     <i> Defines maximum number of objects that can be active at the same time.
+//     <i> Applies to objects with system provided memory for control blocks.
+#ifndef OS_MSGQUEUE_NUM
+#define OS_MSGQUEUE_NUM             1
+#endif
+ 
+//     <o>Data Storage Memory size [bytes] <0-1073741824:8>
+//     <i> Defines the combined data storage memory size.
+//     <i> Applies to objects with system provided memory for data storage.
+//     <i> Default: 0
+#ifndef OS_MSGQUEUE_DATA_SIZE
+#define OS_MSGQUEUE_DATA_SIZE       0
+#endif
+ 
+//   </e>
+ 
+// </h>
+ 
+// <h>Event Recorder Configuration
+// ===============================
+ 
+//   <e>Global Initialization
+//   <i> Initialize Event Recorder during 'osKernelInitialize'.
+#ifndef OS_EVR_INIT
+#define OS_EVR_INIT                 0
+#endif
+ 
+//     <q>Start recording
+//     <i> Start event recording after initialization.
+#ifndef OS_EVR_START
+#define OS_EVR_START                1
+#endif
+ 
+//     <h>Global Event Filter Setup
+//     <i> Initial recording level applied to all components.
+//       <o.0>Error events
+//       <o.1>API function call events
+//       <o.2>Operation events
+//       <o.3>Detailed operation events
+//     </h>
+#ifndef OS_EVR_LEVEL
+#define OS_EVR_LEVEL                0x00U
+#endif
+ 
+//     <h>RTOS Event Filter Setup
+//     <i> Recording levels for RTX components.
+//     <i> Only applicable if events for the respective component are generated.
+ 
+//       <h>Memory Management
+//       <i> Recording level for Memory Management events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_MEMORY_LEVEL 
+#define OS_EVR_MEMORY_LEVEL         0x01U
+#endif
+ 
+//       <h>Kernel
+//       <i> Recording level for Kernel events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_KERNEL_LEVEL 
+#define OS_EVR_KERNEL_LEVEL         0x01U
+#endif
+ 
+//       <h>Thread
+//       <i> Recording level for Thread events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_THREAD_LEVEL 
+#define OS_EVR_THREAD_LEVEL         0x05U
+#endif
+ 
+//       <h>Generic Wait
+//       <i> Recording level for Generic Wait events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_WAIT_LEVEL 
+#define OS_EVR_WAIT_LEVEL           0x01U
+#endif
+ 
+//       <h>Thread Flags
+//       <i> Recording level for Thread Flags events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_THFLAGS_LEVEL 
+#define OS_EVR_THFLAGS_LEVEL        0x01U
+#endif
+ 
+//       <h>Event Flags
+//       <i> Recording level for Event Flags events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_EVFLAGS_LEVEL 
+#define OS_EVR_EVFLAGS_LEVEL        0x01U
+#endif
+ 
+//       <h>Timer
+//       <i> Recording level for Timer events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_TIMER_LEVEL 
+#define OS_EVR_TIMER_LEVEL          0x01U
+#endif
+ 
+//       <h>Mutex
+//       <i> Recording level for Mutex events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_MUTEX_LEVEL 
+#define OS_EVR_MUTEX_LEVEL          0x01U
+#endif
+ 
+//       <h>Semaphore
+//       <i> Recording level for Semaphore events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_SEMAPHORE_LEVEL 
+#define OS_EVR_SEMAPHORE_LEVEL      0x01U
+#endif
+ 
+//       <h>Memory Pool
+//       <i> Recording level for Memory Pool events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_MEMPOOL_LEVEL 
+#define OS_EVR_MEMPOOL_LEVEL        0x01U
+#endif
+ 
+//       <h>Message Queue
+//       <i> Recording level for Message Queue events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </h>
+#ifndef OS_EVR_MSGQUEUE_LEVEL 
+#define OS_EVR_MSGQUEUE_LEVEL       0x01U
+#endif
+ 
+//     </h>
+ 
+//   </e>
+ 
+//   <h>RTOS Event Generation
+//   <i> Enables event generation for RTX components (requires RTX source variant).
+ 
+//     <q>Memory Management
+//     <i> Enables Memory Management event generation.
+#ifndef OS_EVR_MEMORY
+#define OS_EVR_MEMORY               1
+#endif
+ 
+//     <q>Kernel
+//     <i> Enables Kernel event generation.
+#ifndef OS_EVR_KERNEL
+#define OS_EVR_KERNEL               1
+#endif
+ 
+//     <q>Thread
+//     <i> Enables Thread event generation.
+#ifndef OS_EVR_THREAD
+#define OS_EVR_THREAD               1
+#endif
+ 
+//     <q>Generic Wait
+//     <i> Enables Generic Wait event generation.
+#ifndef OS_EVR_WAIT
+#define OS_EVR_WAIT                 1
+#endif
+ 
+//     <q>Thread Flags
+//     <i> Enables Thread Flags event generation.
+#ifndef OS_EVR_THFLAGS
+#define OS_EVR_THFLAGS              1
+#endif
+ 
+//     <q>Event Flags
+//     <i> Enables Event Flags event generation.
+#ifndef OS_EVR_EVFLAGS
+#define OS_EVR_EVFLAGS              1
+#endif
+ 
+//     <q>Timer
+//     <i> Enables Timer event generation.
+#ifndef OS_EVR_TIMER
+#define OS_EVR_TIMER                1
+#endif
+ 
+//     <q>Mutex
+//     <i> Enables Mutex event generation.
+#ifndef OS_EVR_MUTEX
+#define OS_EVR_MUTEX                1
+#endif
+ 
+//     <q>Semaphore
+//     <i> Enables Semaphore event generation.
+#ifndef OS_EVR_SEMAPHORE
+#define OS_EVR_SEMAPHORE            1
+#endif
+ 
+//     <q>Memory Pool
+//     <i> Enables Memory Pool event generation.
+#ifndef OS_EVR_MEMPOOL
+#define OS_EVR_MEMPOOL              1
+#endif
+ 
+//     <q>Message Queue
+//     <i> Enables Message Queue event generation.
+#ifndef OS_EVR_MSGQUEUE
+#define OS_EVR_MSGQUEUE             1
+#endif
+ 
+//   </h>
+ 
+// </h>
+ 
+// Number of Threads which use standard C/C++ library libspace
+// (when thread specific memory allocation is not used).
+#if (OS_THREAD_OBJ_MEM == 0)
+#define OS_THREAD_LIBSPACE_NUM      4
+#else
+#define OS_THREAD_LIBSPACE_NUM      OS_THREAD_NUM
+#endif
+ 
+//------------- <<< end of configuration section >>> ---------------------------
+ 
+#endif  // RTX_CONFIG_H_
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/CMSIS/handlers.c b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/CMSIS/handlers.c
new file mode 100644
index 0000000..6afdccc
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/CMSIS/handlers.c
@@ -0,0 +1,153 @@
+/*
+ * Copyright (c) 2013-2017 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * -----------------------------------------------------------------------------
+ *
+ * Project:     CMSIS-RTOS RTX
+ * Title:       Exception handlers (C functions)
+ *
+ * -----------------------------------------------------------------------------
+ */
+#include "RTE_Components.h"
+#include CMSIS_device_header
+
+
+//Fault Status Register (IFSR/DFSR) definitions
+#define FSR_ALIGNMENT_FAULT                  0x01   //DFSR only. Fault on first lookup
+#define FSR_INSTRUCTION_CACHE_MAINTENANCE    0x04   //DFSR only - async/external
+#define FSR_SYNC_EXT_TTB_WALK_FIRST          0x0c   //sync/external
+#define FSR_SYNC_EXT_TTB_WALK_SECOND         0x0e   //sync/external
+#define FSR_SYNC_PARITY_TTB_WALK_FIRST       0x1c   //sync/external
+#define FSR_SYNC_PARITY_TTB_WALK_SECOND      0x1e   //sync/external
+#define FSR_TRANSLATION_FAULT_FIRST          0x05   //MMU Fault - internal
+#define FSR_TRANSLATION_FAULT_SECOND         0x07   //MMU Fault - internal
+#define FSR_ACCESS_FLAG_FAULT_FIRST          0x03   //MMU Fault - internal
+#define FSR_ACCESS_FLAG_FAULT_SECOND         0x06   //MMU Fault - internal
+#define FSR_DOMAIN_FAULT_FIRST               0x09   //MMU Fault - internal
+#define FSR_DOMAIN_FAULT_SECOND              0x0b   //MMU Fault - internal
+#define FSR_PERMISSION_FAULT_FIRST           0x0f   //MMU Fault - internal
+#define FSR_PERMISSION_FAULT_SECOND          0x0d   //MMU Fault - internal
+#define FSR_DEBUG_EVENT                      0x02   //internal
+#define FSR_SYNC_EXT_ABORT                   0x08   //sync/external
+#define FSR_TLB_CONFLICT_ABORT               0x10   //sync/external
+#define FSR_LOCKDOWN                         0x14   //internal
+#define FSR_COPROCESSOR_ABORT                0x1a   //internal
+#define FSR_SYNC_PARITY_ERROR                0x19   //sync/external
+#define FSR_ASYNC_EXTERNAL_ABORT             0x16   //DFSR only - async/external
+#define FSR_ASYNC_PARITY_ERROR               0x18   //DFSR only - async/external
+
+void CDAbtHandler(uint32_t DFSR, uint32_t DFAR, uint32_t LR) {
+    uint32_t FS = (DFSR & (1 << 10)) >> 6 | (DFSR & 0x0f); //Store Fault Status
+
+    switch(FS) {
+        //Synchronous parity errors - retry
+        case FSR_SYNC_PARITY_ERROR:
+        case FSR_SYNC_PARITY_TTB_WALK_FIRST:
+        case FSR_SYNC_PARITY_TTB_WALK_SECOND:
+            return;
+
+        //Your code here. Value in DFAR is invalid for some fault statuses.
+        case FSR_ALIGNMENT_FAULT:
+        case FSR_INSTRUCTION_CACHE_MAINTENANCE:
+        case FSR_SYNC_EXT_TTB_WALK_FIRST:
+        case FSR_SYNC_EXT_TTB_WALK_SECOND:
+        case FSR_TRANSLATION_FAULT_FIRST:
+        case FSR_TRANSLATION_FAULT_SECOND:
+        case FSR_ACCESS_FLAG_FAULT_FIRST:
+        case FSR_ACCESS_FLAG_FAULT_SECOND:
+        case FSR_DOMAIN_FAULT_FIRST:
+        case FSR_DOMAIN_FAULT_SECOND:
+        case FSR_PERMISSION_FAULT_FIRST:
+        case FSR_PERMISSION_FAULT_SECOND:
+        case FSR_DEBUG_EVENT:
+        case FSR_SYNC_EXT_ABORT:
+        case FSR_TLB_CONFLICT_ABORT:
+        case FSR_LOCKDOWN:
+        case FSR_COPROCESSOR_ABORT:
+        case FSR_ASYNC_EXTERNAL_ABORT: //DFAR invalid
+        case FSR_ASYNC_PARITY_ERROR:   //DFAR invalid
+        default:
+            while(1);
+    }
+}
+
+void CPAbtHandler(uint32_t IFSR, uint32_t IFAR, uint32_t LR) {
+    uint32_t FS = (IFSR & (1 << 10)) >> 6 | (IFSR & 0x0f); //Store Fault Status
+
+    switch(FS) {
+        //Synchronous parity errors - retry
+        case FSR_SYNC_PARITY_ERROR:
+        case FSR_SYNC_PARITY_TTB_WALK_FIRST:
+        case FSR_SYNC_PARITY_TTB_WALK_SECOND:
+            return;
+
+        //Your code here. Value in IFAR is invalid for some fault statuses.
+        case FSR_SYNC_EXT_TTB_WALK_FIRST:
+        case FSR_SYNC_EXT_TTB_WALK_SECOND:
+        case FSR_TRANSLATION_FAULT_FIRST:
+        case FSR_TRANSLATION_FAULT_SECOND:
+        case FSR_ACCESS_FLAG_FAULT_FIRST:
+        case FSR_ACCESS_FLAG_FAULT_SECOND:
+        case FSR_DOMAIN_FAULT_FIRST:
+        case FSR_DOMAIN_FAULT_SECOND:
+        case FSR_PERMISSION_FAULT_FIRST:
+        case FSR_PERMISSION_FAULT_SECOND:
+        case FSR_DEBUG_EVENT: //IFAR invalid
+        case FSR_SYNC_EXT_ABORT:
+        case FSR_TLB_CONFLICT_ABORT:
+        case FSR_LOCKDOWN:
+        case FSR_COPROCESSOR_ABORT:
+        default:
+            while(1);
+    }
+}
+
+
+//returns amount to decrement lr by
+//this will be 0 when we have emulated the instruction and want to execute the next instruction
+//this will be 2 when we have performed some maintenance and want to retry the instruction in Thumb (state == 2)
+//this will be 4 when we have performed some maintenance and want to retry the instruction in ARM   (state == 4)
+uint32_t CUndefHandler(uint32_t opcode, uint32_t state, uint32_t LR) {
+    const int THUMB = 2;
+    const int ARM = 4;
+    //Lazy VFP/NEON initialisation and switching
+
+    // (ARM ARM section A7.5) VFP data processing instruction?
+    // (ARM ARM section A7.6) VFP/NEON register load/store instruction?
+    // (ARM ARM section A7.8) VFP/NEON register data transfer instruction?
+    // (ARM ARM section A7.9) VFP/NEON 64-bit register data transfer instruction?
+    if ((state == ARM   && ((opcode & 0x0C000000) >> 26 == 0x03)) ||
+        (state == THUMB && ((opcode & 0xEC000000) >> 26 == 0x3B))) {
+        if (((opcode & 0x00000E00) >> 9) == 5) {
+            __FPU_Enable();
+            return state;
+        }
+    }
+
+    // (ARM ARM section A7.4) NEON data processing instruction?
+    if ((state == ARM   && ((opcode & 0xFE000000) >> 24 == 0xF2)) ||
+        (state == THUMB && ((opcode & 0xEF000000) >> 24 == 0xEF)) ||
+    // (ARM ARM section A7.7) NEON load/store instruction?
+        (state == ARM   && ((opcode >> 24) == 0xF4)) ||
+        (state == THUMB && ((opcode >> 24) == 0xF9))) {
+            __FPU_Enable();
+            return state;
+    }
+
+    //Add code here for other Undef cases
+    while(1);
+}
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/ARMCA5.sct b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/ARMCA5.sct
new file mode 100644
index 0000000..41e562c
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/ARMCA5.sct
@@ -0,0 +1,77 @@
+#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-a5 -xc
+;**************************************************
+; Copyright (c) 2017 ARM Ltd.  All rights reserved.
+;**************************************************
+
+; Scatter-file for RTX Example on Versatile Express
+
+; This scatter-file places application code, data, stack and heap at suitable addresses in the memory map.
+
+; This platform has 2GB SDRAM starting at 0x80000000.
+
+#include "mem_ARMCA5.h"
+
+SDRAM __ROM_BASE __ROM_SIZE       ; load region size_region
+{
+  VECTORS __ROM_BASE __ROM_SIZE ; load address = execution address
+  {
+      * (RESET, +FIRST)         ; Vector table and other startup code
+      * (InRoot$$Sections)      ; All (library) code that must be in a root region
+      * (+RO-CODE)              ; Application RO code (.text)
+      * (+RO-DATA)              ; Application RO data (.constdata)
+  }
+  
+  RW_DATA __RAM_BASE __RW_DATA_SIZE
+  { * (+RW) }                   ; Application RW data (.data)
+  
+  ZI_DATA (__RAM_BASE+
+           __RW_DATA_SIZE) __ZI_DATA_SIZE
+  { * (+ZI) }                   ; Application ZI data (.bss)
+  
+  ARM_LIB_HEAP  (__RAM_BASE
+                +__RW_DATA_SIZE
+                +__ZI_DATA_SIZE)    EMPTY __HEAP_SIZE        ; Heap region growing up
+  { }
+    
+  ARM_LIB_STACK (__RAM_BASE
+                +__RAM_SIZE       
+                -__FIQ_STACK_SIZE
+                -__IRQ_STACK_SIZE
+                -__SVC_STACK_SIZE
+                -__ABT_STACK_SIZE
+                -__UND_STACK_SIZE) EMPTY -__STACK_SIZE      ; Stack region growing down
+  { }              
+                
+  UND_STACK     (__RAM_BASE
+                +__RAM_SIZE
+                -__FIQ_STACK_SIZE
+                -__IRQ_STACK_SIZE
+                -__SVC_STACK_SIZE
+                -__ABT_STACK_SIZE) EMPTY -__UND_STACK_SIZE  ; UND mode stack
+  { }
+  
+  ABT_STACK     (__RAM_BASE
+                +__RAM_SIZE
+                -__FIQ_STACK_SIZE
+                -__IRQ_STACK_SIZE
+                -__SVC_STACK_SIZE) EMPTY -__ABT_STACK_SIZE  ; ABT mode stack
+  { }
+  
+  SVC_STACK     (__RAM_BASE
+                +__RAM_SIZE
+                -__FIQ_STACK_SIZE
+                -__IRQ_STACK_SIZE) EMPTY -__SVC_STACK_SIZE  ; SVC mode stack
+  { }  
+  
+  IRQ_STACK     (__RAM_BASE
+                +__RAM_SIZE
+                -__FIQ_STACK_SIZE) EMPTY -__IRQ_STACK_SIZE  ; IRQ mode stack
+  { }  
+  
+  FIQ_STACK     (__RAM_BASE
+                +__RAM_SIZE)       EMPTY -__FIQ_STACK_SIZE  ; FIQ mode stack
+  { }
+  
+  TTB            __TTB_BASE        EMPTY __TTB_SIZE         ; Level-1 Translation Table for MMU
+  { }                                        
+}
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/mem_ARMCA5.h b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/mem_ARMCA5.h
new file mode 100644
index 0000000..04669d0
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/mem_ARMCA5.h
@@ -0,0 +1,94 @@
+/**************************************************************************//**
+ * @file     mem_ARMCA5.h
+ * @brief    Memory base and size definitions (used in scatter file)
+ * @version  V1.00
+ * @date     10. January 2018
+ *
+ * @note
+ *
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __MEM_ARMCA5_H
+#define __MEM_ARMCA5_H
+
+/*----------------------------------------------------------------------------
+  User Stack & Heap size definition
+ *----------------------------------------------------------------------------*/
+/*
+//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+*/
+
+/*--------------------- ROM Configuration ------------------------------------
+//
+// <h> ROM Configuration
+//   <o0> ROM Base Address <0x0-0xFFFFFFFF:8>
+//   <o1> ROM Size (in Bytes) <0x0-0xFFFFFFFF:8>
+// </h>
+ *----------------------------------------------------------------------------*/
+#define __ROM_BASE       0x80000000
+#define __ROM_SIZE       0x00200000
+
+/*--------------------- RAM Configuration -----------------------------------
+// <h> RAM Configuration
+//   <o0> RAM Base Address    <0x0-0xFFFFFFFF:8>
+//   <o1> RAM Total Size (in Bytes) <0x0-0xFFFFFFFF:8>
+//   <o2> RW_DATA Size (in Bytes) <0x0-0xFFFFFFFF:8>
+//   <o3> ZI_DATA Size (in Bytes) <0x0-0xFFFFFFFF:8>
+//   <h> Stack / Heap Configuration
+//     <o4>  Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+//     <o5>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+//     <h> Exceptional Modes
+//       <o6> UND Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+//       <o7> ABT Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+//       <o8> SVC Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+//       <o9> IRQ Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+//       <o10> FIQ Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+//     </h>
+//   </h>
+// </h>
+ *----------------------------------------------------------------------------*/
+#define __RAM_BASE       0x80200000
+#define __RAM_SIZE       0x00200000
+
+#define __RW_DATA_SIZE   0x00100000
+#define __ZI_DATA_SIZE   0x000F0000
+
+#define __STACK_SIZE     0x00001000
+#define __HEAP_SIZE      0x00008000
+
+#define __UND_STACK_SIZE 0x00000100
+#define __ABT_STACK_SIZE 0x00000100
+#define __SVC_STACK_SIZE 0x00000100
+#define __IRQ_STACK_SIZE 0x00000100
+#define __FIQ_STACK_SIZE 0x00000100
+
+/*----------------------------------------------------------------------------*/
+
+/*--------------------- TTB Configuration ------------------------------------
+//
+// <h> TTB Configuration
+//   <o0> TTB Base Address <0x0-0xFFFFFFFF:8>
+//   <o1> TTB Size (in Bytes) <0x0-0xFFFFFFFF:8>
+// </h>
+ *----------------------------------------------------------------------------*/
+#define __TTB_BASE       0x80500000
+#define __TTB_SIZE       0x00004000
+
+#endif /* __MEM_ARMCA5_H */
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/mmu_ARMCA5.c b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/mmu_ARMCA5.c
new file mode 100644
index 0000000..2aa1a8d
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/mmu_ARMCA5.c
@@ -0,0 +1,235 @@
+/**************************************************************************//**
+ * @file     mmu_ARMCA5.c
+ * @brief    MMU Configuration for ARM Cortex-A5 Device Series
+ * @version  V1.1.0
+ * @date     23. November 2018
+ *
+ * @note
+ *
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* Memory map description from: DUI0447G_v2m_p1_trm.pdf 4.2.2 ARM Cortex-A Series memory map
+
+                                                     Memory Type
+0xffffffff |--------------------------|             ------------
+           |       FLAG SYNC          |             Device Memory
+0xfffff000 |--------------------------|             ------------
+           |         Fault            |                Fault
+0xfff00000 |--------------------------|             ------------
+           |                          |                Normal
+           |                          |
+           |      Daughterboard       |
+           |         memory           |
+           |                          |
+0x80505000 |--------------------------|             ------------
+           |TTB (L2 Sync Flags   ) 4k |                Normal
+0x80504C00 |--------------------------|             ------------
+           |TTB (L2 Peripherals-B) 16k|                Normal
+0x80504800 |--------------------------|             ------------
+           |TTB (L2 Peripherals-A) 16k|                Normal
+0x80504400 |--------------------------|             ------------
+           |TTB (L2 Priv Periphs)  4k |                Normal
+0x80504000 |--------------------------|             ------------
+           |    TTB (L1 Descriptors)  |                Normal
+0x80500000 |--------------------------|             ------------
+           |           Heap           |                Normal
+           |--------------------------|             ------------
+           |          Stack           |                Normal
+0x80400000 |--------------------------|             ------------
+           |         ZI Data          |                Normal
+0x80300000 |--------------------------|             ------------
+           |         RW Data          |                Normal
+0x80200000 |--------------------------|             ------------
+           |         RO Data          |                Normal
+           |--------------------------|             ------------
+           |         RO Code          |              USH Normal
+0x80000000 |--------------------------|             ------------
+           |      Daughterboard       |                Fault
+           |      HSB AXI buses       |
+0x40000000 |--------------------------|             ------------
+           |      Daughterboard       |                Fault
+           |  test chips peripherals  |
+0x2c002000 |--------------------------|             ------------
+           |     Private Address      |            Device Memory
+0x2c000000 |--------------------------|             ------------
+           |      Daughterboard       |                Fault
+           |  test chips peripherals  |
+0x20000000 |--------------------------|             ------------
+           |       Peripherals        |           Device Memory RW/RO
+           |                          |              & Fault
+0x00000000 |--------------------------|
+*/
+
+// L1 Cache info and restrictions about architecture of the caches (CCSIR register):
+// Write-Through support *not* available
+// Write-Back support available.
+// Read allocation support available.
+// Write allocation support available.
+
+//Note: You should use the Shareable attribute carefully.
+//For cores without coherency logic (such as SCU) marking a region as shareable forces the processor to not cache that region regardless of the inner cache settings.
+//Cortex-A versions of RTX use LDREX/STREX instructions relying on Local monitors. Local monitors will be used only when the region gets cached, regions that are not cached will use the Global Monitor.
+//Some Cortex-A implementations do not include Global Monitors, so wrongly setting the attribute Shareable may cause STREX to fail.
+
+//Recall: When the Shareable attribute is applied to a memory region that is not Write-Back, Normal memory, data held in this region is treated as Non-cacheable.
+//When SMP bit = 0, Inner WB/WA Cacheable Shareable attributes are treated as Non-cacheable.
+//When SMP bit = 1, Inner WB/WA Cacheable Shareable attributes are treated as Cacheable.
+
+
+//Following MMU configuration is expected
+//SCTLR.AFE == 1 (Simplified access permissions model - AP[2:1] define access permissions, AP[0] is an access flag)
+//SCTLR.TRE == 0 (TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor)
+//Domain 0 is always the Client domain
+//Descriptors should place all memory in domain 0
+
+#include "ARMCA5.h"
+
+
+// L2 table pointers
+//----------------------------------------
+#define PRIVATE_TABLE_L2_BASE_4k       (0x80504000) //Map 4k Private Address space
+#define SYNC_FLAGS_TABLE_L2_BASE_4k    (0x80504C00) //Map 4k Flag synchronization
+#define PERIPHERAL_A_TABLE_L2_BASE_64k (0x80504400) //Map 64k Peripheral #1 0x1C000000 - 0x1C00FFFFF
+#define PERIPHERAL_B_TABLE_L2_BASE_64k (0x80504800) //Map 64k Peripheral #2 0x1C100000 - 0x1C1FFFFFF
+
+//--------------------- PERIPHERALS -------------------
+#define PERIPHERAL_A_FAULT (0x00000000 + 0x1c000000) //0x1C000000-0x1C00FFFF (1M)
+#define PERIPHERAL_B_FAULT (0x00100000 + 0x1c000000) //0x1C100000-0x1C10FFFF (1M)
+
+//--------------------- SYNC FLAGS --------------------
+#define FLAG_SYNC     0xFFFFF000
+#define F_SYNC_BASE   0xFFF00000  //1M aligned
+
+//Import symbols from linker
+extern uint32_t Image$$VECTORS$$Base;
+extern uint32_t Image$$RW_DATA$$Base;
+extern uint32_t Image$$ZI_DATA$$Base;
+extern uint32_t Image$$TTB$$ZI$$Base;
+
+static uint32_t Sect_Normal;     //outer & inner wb/wa, non-shareable, executable, rw, domain 0, base addr 0
+static uint32_t Sect_Normal_Cod; //outer & inner wb/wa, non-shareable, executable, ro, domain 0, base addr 0
+static uint32_t Sect_Normal_RO;  //as Sect_Normal_Cod, but not executable
+static uint32_t Sect_Normal_RW;  //as Sect_Normal_Cod, but writeable and not executable
+static uint32_t Sect_Device_RO;  //device, non-shareable, non-executable, ro, domain 0, base addr 0
+static uint32_t Sect_Device_RW;  //as Sect_Device_RO, but writeable
+
+/* Define global descriptors */
+static uint32_t Page_L1_4k  = 0x0;  //generic
+static uint32_t Page_L1_64k = 0x0;  //generic
+static uint32_t Page_4k_Device_RW;  //Shared device, not executable, rw, domain 0
+static uint32_t Page_64k_Device_RW; //Shared device, not executable, rw, domain 0
+
+void MMU_CreateTranslationTable(void)
+{
+    mmu_region_attributes_Type region;
+
+    //Create 4GB of faulting entries
+    MMU_TTSection (&Image$$TTB$$ZI$$Base, 0, 4096, DESCRIPTOR_FAULT);
+
+    /*
+     * Generate descriptors. Refer to core_ca.h to get information about attributes
+     *
+     */
+    //Create descriptors for Vectors, RO, RW, ZI sections
+    section_normal(Sect_Normal, region);
+    section_normal_cod(Sect_Normal_Cod, region);
+    section_normal_ro(Sect_Normal_RO, region);
+    section_normal_rw(Sect_Normal_RW, region);
+    //Create descriptors for peripherals
+    section_device_ro(Sect_Device_RO, region);
+    section_device_rw(Sect_Device_RW, region);
+    //Create descriptors for 64k pages
+    page64k_device_rw(Page_L1_64k, Page_64k_Device_RW, region);
+    //Create descriptors for 4k pages
+    page4k_device_rw(Page_L1_4k, Page_4k_Device_RW, region);
+
+
+    /*
+     *  Define MMU flat-map regions and attributes
+     *
+     */
+
+    //Define Image
+    MMU_TTSection (&Image$$TTB$$ZI$$Base, (uint32_t)&Image$$VECTORS$$Base, 2, Sect_Normal_Cod);
+    MMU_TTSection (&Image$$TTB$$ZI$$Base, (uint32_t)&Image$$RW_DATA$$Base, 1, Sect_Normal_RW);
+    MMU_TTSection (&Image$$TTB$$ZI$$Base, (uint32_t)&Image$$ZI_DATA$$Base, 1, Sect_Normal_RW);
+
+    //all DRAM executable, rw, cacheable - applications may choose to divide memory into ro executable
+    MMU_TTSection (&Image$$TTB$$ZI$$Base, (uint32_t)&Image$$TTB$$ZI$$Base, 2043, Sect_Normal);
+
+    //--------------------- PERIPHERALS -------------------
+    MMU_TTSection (&Image$$TTB$$ZI$$Base, VE_A5_MP_FLASH_BASE0    , 64, Sect_Device_RO);
+    MMU_TTSection (&Image$$TTB$$ZI$$Base, VE_A5_MP_FLASH_BASE1    , 64, Sect_Device_RO);
+    MMU_TTSection (&Image$$TTB$$ZI$$Base, VE_A5_MP_SRAM_BASE      , 64, Sect_Device_RW);
+    MMU_TTSection (&Image$$TTB$$ZI$$Base, VE_A5_MP_VRAM_BASE      , 32, Sect_Device_RW);
+    MMU_TTSection (&Image$$TTB$$ZI$$Base, VE_A5_MP_ETHERNET_BASE  , 16, Sect_Device_RW);
+    MMU_TTSection (&Image$$TTB$$ZI$$Base, VE_A5_MP_USB_BASE       , 16, Sect_Device_RW);
+
+    // Create (16 * 64k)=1MB faulting entries to cover peripheral range 0x1C000000-0x1C00FFFF
+    MMU_TTPage64k(&Image$$TTB$$ZI$$Base, PERIPHERAL_A_FAULT      , 16, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_64k, DESCRIPTOR_FAULT);
+    // Define peripheral range 0x1C000000-0x1C00FFFF
+    MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_DAP_BASE       ,  1, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_64k, Page_64k_Device_RW);
+    MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_SYSTEM_REG_BASE,  1, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_64k, Page_64k_Device_RW);
+    MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_SERIAL_BASE    ,  1, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_64k, Page_64k_Device_RW);
+    MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_AACI_BASE      ,  1, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_64k, Page_64k_Device_RW);
+    MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_MMCI_BASE      ,  1, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_64k, Page_64k_Device_RW);
+    MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_KMI0_BASE      ,  2, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_64k, Page_64k_Device_RW);
+    MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_UART_BASE      ,  4, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_64k, Page_64k_Device_RW);
+    MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_WDT_BASE       ,  1, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_64k, Page_64k_Device_RW);
+
+    // Create (16 * 64k)=1MB faulting entries to cover peripheral range 0x1C100000-0x1C10FFFF
+    MMU_TTPage64k(&Image$$TTB$$ZI$$Base, PERIPHERAL_B_FAULT      , 16, Page_L1_64k, (uint32_t *)PERIPHERAL_B_TABLE_L2_BASE_64k, DESCRIPTOR_FAULT);
+    // Define peripheral range 0x1C100000-0x1C10FFFF
+    MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_TIMER_BASE     ,  2, Page_L1_64k, (uint32_t *)PERIPHERAL_B_TABLE_L2_BASE_64k, Page_64k_Device_RW);
+    MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_DVI_BASE       ,  1, Page_L1_64k, (uint32_t *)PERIPHERAL_B_TABLE_L2_BASE_64k, Page_64k_Device_RW);
+    MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_RTC_BASE       ,  1, Page_L1_64k, (uint32_t *)PERIPHERAL_B_TABLE_L2_BASE_64k, Page_64k_Device_RW);
+    MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_UART4_BASE     ,  1, Page_L1_64k, (uint32_t *)PERIPHERAL_B_TABLE_L2_BASE_64k, Page_64k_Device_RW);
+    MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_CLCD_BASE      ,  1, Page_L1_64k, (uint32_t *)PERIPHERAL_B_TABLE_L2_BASE_64k, Page_64k_Device_RW);
+
+    // Create (256 * 4k)=1MB faulting entries to cover private address space. Needs to be marked as Device memory
+    MMU_TTPage4k (&Image$$TTB$$ZI$$Base, __get_CBAR()            ,256,  Page_L1_4k, (uint32_t *)PRIVATE_TABLE_L2_BASE_4k, DESCRIPTOR_FAULT);
+    // Define private address space entry.
+    MMU_TTPage4k (&Image$$TTB$$ZI$$Base, __get_CBAR()            ,  3,  Page_L1_4k, (uint32_t *)PRIVATE_TABLE_L2_BASE_4k, Page_4k_Device_RW);
+    // Define L2CC entry.  Uncomment if PL310 is present
+    //    MMU_TTPage4k (&Image$$TTB$$ZI$$Base, VE_A5_MP_PL310_BASE     ,  1,  Page_L1_4k, (uint32_t *)PRIVATE_TABLE_L2_BASE_4k, Page_4k_Device_RW);
+
+    // Create (256 * 4k)=1MB faulting entries to synchronization space (Useful if some non-cacheable DMA agent is present in the SoC)
+    MMU_TTPage4k (&Image$$TTB$$ZI$$Base, F_SYNC_BASE , 256, Page_L1_4k, (uint32_t *)SYNC_FLAGS_TABLE_L2_BASE_4k, DESCRIPTOR_FAULT);
+    // Define synchronization space entry.
+    MMU_TTPage4k (&Image$$TTB$$ZI$$Base, FLAG_SYNC   ,   1, Page_L1_4k, (uint32_t *)SYNC_FLAGS_TABLE_L2_BASE_4k, Page_4k_Device_RW);
+
+    /* Set location of level 1 page table
+    ; 31:14 - Translation table base addr (31:14-TTBCR.N, TTBCR.N is 0 out of reset)
+    ; 13:7  - 0x0
+    ; 6     - IRGN[0] 0x1  (Inner WB WA)
+    ; 5     - NOS     0x0  (Non-shared)
+    ; 4:3   - RGN     0x01 (Outer WB WA)
+    ; 2     - IMP     0x0  (Implementation Defined)
+    ; 1     - S       0x0  (Non-shared)
+    ; 0     - IRGN[1] 0x0  (Inner WB WA) */
+    __set_TTBR0(((uint32_t)&Image$$TTB$$ZI$$Base) | 0x48);
+    __ISB();
+
+    /* Set up domain access control register
+    ; We set domain 0 to Client and all other domains to No Access.
+    ; All translation table entries specify domain 0 */
+    __set_DACR(1);
+    __ISB();
+}
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/startup_ARMCA5.c b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/startup_ARMCA5.c
new file mode 100644
index 0000000..535a200
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/startup_ARMCA5.c
@@ -0,0 +1,138 @@
+/******************************************************************************
+ * @file     startup_ARMCA5.c
+ * @brief    CMSIS Device System Source File for Arm Cortex-A5 Device Series
+ * @version  V1.00
+ * @date     10. January 2018
+ *
+ * @note
+ *
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <ARMCA5.h>
+
+/*----------------------------------------------------------------------------
+  Definitions
+ *----------------------------------------------------------------------------*/
+#define USR_MODE 0x10            // User mode
+#define FIQ_MODE 0x11            // Fast Interrupt Request mode
+#define IRQ_MODE 0x12            // Interrupt Request mode
+#define SVC_MODE 0x13            // Supervisor mode
+#define ABT_MODE 0x17            // Abort mode
+#define UND_MODE 0x1B            // Undefined Instruction mode
+#define SYS_MODE 0x1F            // System mode
+
+/*----------------------------------------------------------------------------
+  Internal References
+ *----------------------------------------------------------------------------*/
+void Vectors       (void) __attribute__ ((naked, section("RESET")));
+void Reset_Handler (void) __attribute__ ((naked));
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler
+ *----------------------------------------------------------------------------*/
+void Undef_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void SVC_Handler   (void) __attribute__ ((weak, alias("Default_Handler")));
+void PAbt_Handler  (void) __attribute__ ((weak, alias("Default_Handler")));
+void DAbt_Handler  (void) __attribute__ ((weak, alias("Default_Handler")));
+void IRQ_Handler   (void) __attribute__ ((weak, alias("Default_Handler")));
+void FIQ_Handler   (void) __attribute__ ((weak, alias("Default_Handler")));
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Vector Table
+ *----------------------------------------------------------------------------*/
+void Vectors(void) {
+  __ASM volatile(
+  "LDR    PC, =Reset_Handler                        \n"
+  "LDR    PC, =Undef_Handler                        \n"
+  "LDR    PC, =SVC_Handler                          \n"
+  "LDR    PC, =PAbt_Handler                         \n"
+  "LDR    PC, =DAbt_Handler                         \n"
+  "NOP                                              \n"
+  "LDR    PC, =IRQ_Handler                          \n"
+  "LDR    PC, =FIQ_Handler                          \n"
+  );
+}
+
+/*----------------------------------------------------------------------------
+  Reset Handler called on controller reset
+ *----------------------------------------------------------------------------*/
+void Reset_Handler(void) {
+  __ASM volatile(
+
+  // Mask interrupts
+  "CPSID   if                                      \n"
+
+  // Put any cores other than 0 to sleep
+  "MRC     p15, 0, R0, c0, c0, 5                   \n"  // Read MPIDR
+  "ANDS    R0, R0, #3                              \n"
+  "goToSleep:                                      \n"
+  "WFINE                                           \n"
+  "BNE     goToSleep                               \n"
+
+  // Reset SCTLR Settings
+  "MRC     p15, 0, R0, c1, c0, 0                   \n"  // Read CP15 System Control register
+  "BIC     R0, R0, #(0x1 << 12)                    \n"  // Clear I bit 12 to disable I Cache
+  "BIC     R0, R0, #(0x1 <<  2)                    \n"  // Clear C bit  2 to disable D Cache
+  "BIC     R0, R0, #0x1                            \n"  // Clear M bit  0 to disable MMU
+  "BIC     R0, R0, #(0x1 << 11)                    \n"  // Clear Z bit 11 to disable branch prediction
+  "BIC     R0, R0, #(0x1 << 13)                    \n"  // Clear V bit 13 to disable hivecs
+  "MCR     p15, 0, R0, c1, c0, 0                   \n"  // Write value back to CP15 System Control register
+  "ISB                                             \n"
+
+  // Configure ACTLR
+  "MRC     p15, 0, r0, c1, c0, 1                   \n"  // Read CP15 Auxiliary Control Register
+  "ORR     r0, r0, #(1 <<  1)                      \n"  // Enable L2 prefetch hint (UNK/WI since r4p1)
+  "MCR     p15, 0, r0, c1, c0, 1                   \n"  // Write CP15 Auxiliary Control Register
+
+  // Set Vector Base Address Register (VBAR) to point to this application's vector table
+  "LDR    R0, =Vectors                             \n"
+  "MCR    p15, 0, R0, c12, c0, 0                   \n"
+
+  // Setup Stack for each exceptional mode
+  "CPS    #0x11                                    \n"
+  "LDR    SP, =Image$$FIQ_STACK$$ZI$$Limit         \n"
+  "CPS    #0x12                                    \n"
+  "LDR    SP, =Image$$IRQ_STACK$$ZI$$Limit         \n"
+  "CPS    #0x13                                    \n"
+  "LDR    SP, =Image$$SVC_STACK$$ZI$$Limit         \n"
+  "CPS    #0x17                                    \n"
+  "LDR    SP, =Image$$ABT_STACK$$ZI$$Limit         \n"
+  "CPS    #0x1B                                    \n"
+  "LDR    SP, =Image$$UND_STACK$$ZI$$Limit         \n"
+  "CPS    #0x1F                                    \n"
+  "LDR    SP, =Image$$ARM_LIB_STACK$$ZI$$Limit     \n"
+
+  // Call SystemInit
+  "BL     SystemInit                               \n"
+
+  // Unmask interrupts
+  "CPSIE  if                                       \n"
+
+  // Call __main
+  "BL     __main                                   \n"
+  );
+}
+
+/*----------------------------------------------------------------------------
+  Default Handler for Exceptions / Interrupts
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void) {
+  while(1);
+}
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/system_ARMCA5.c b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/system_ARMCA5.c
new file mode 100644
index 0000000..5f599f6
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/system_ARMCA5.c
@@ -0,0 +1,93 @@
+/******************************************************************************
+ * @file     system_ARMCA5.c
+ * @brief    CMSIS Device System Source File for Arm Cortex-A5 Device Series
+ * @version  V1.0.1
+ * @date     13. February 2019
+ *
+ * @note
+ *
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "RTE_Components.h"
+#include CMSIS_device_header
+#include "irq_ctrl.h"
+
+#define  SYSTEM_CLOCK  12000000U
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System Initialization
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+/* do not use global variables because this function is called before
+   reaching pre-main. RW section may be overwritten afterwards.          */
+
+  // Invalidate entire Unified TLB
+  __set_TLBIALL(0);
+
+  // Invalidate entire branch predictor array
+  __set_BPIALL(0);
+  __DSB();
+  __ISB();
+
+  //  Invalidate instruction cache and flush branch target cache
+  __set_ICIALLU(0);
+  __DSB();
+  __ISB();
+
+  //  Invalidate data cache
+  L1C_InvalidateDCacheAll();
+
+#if ((__FPU_PRESENT == 1) && (__FPU_USED == 1))
+  // Enable FPU
+  __FPU_Enable();
+#endif
+
+  // Create Translation Table
+  MMU_CreateTranslationTable();
+
+  // Enable MMU
+  MMU_Enable();
+
+  // Enable Caches
+  L1C_EnableCaches();
+  L1C_EnableBTAC();
+
+#if (__L2C_PRESENT == 1) 
+  // Enable GIC
+  L2C_Enable();
+#endif
+
+  // IRQ Initialize
+  IRQ_Initialize();
+}
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/system_ARMCA5.h b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/system_ARMCA5.h
new file mode 100644
index 0000000..6a2a6da
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/system_ARMCA5.h
@@ -0,0 +1,65 @@
+/******************************************************************************
+ * @file     system_ARMCA5.h
+ * @brief    CMSIS Device System Header File for Arm Cortex-A5 Device Series
+ * @version  V1.00
+ * @date     10. January 2018
+ *
+ * @note
+ *
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __SYSTEM_ARMCA5_H
+#define __SYSTEM_ARMCA5_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+extern uint32_t SystemCoreClock;     /*!< System Clock Frequency (Core Clock)  */
+
+/**
+  \brief Setup the microcontroller system.
+
+   Initialize the System and update the SystemCoreClock variable.
+ */
+extern void SystemInit (void);
+
+
+/**
+  \brief  Update SystemCoreClock variable.
+
+   Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
+ */
+extern void SystemCoreClockUpdate (void);
+
+/**
+  \brief  Create Translation Table.
+
+   Creates Memory Management Unit Translation Table.
+ */
+extern void MMU_CreateTranslationTable(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __SYSTEM_ARMCA5_H */
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/RTE_Components.h b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/RTE_Components.h
new file mode 100644
index 0000000..e894dc6
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/RTE_Components.h
@@ -0,0 +1,20 @@
+/*
+ * Auto generated Run-Time-Environment Component Configuration File
+ *      *** Do not modify ! ***
+ *
+ * Project: DspLibTest_FVP_A5
+ * RTE configuration: DspLibTest_FVP_A5.rteconfig
+*/
+#ifndef RTE_COMPONENTS_H
+#define RTE_COMPONENTS_H
+
+/*
+ * Define the Device Header File:
+*/
+#define CMSIS_device_header "ARMCA5.h"
+
+#define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
+        #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
+        #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
+
+#endif /* RTE_COMPONENTS_H */
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/main.c b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/main.c
new file mode 100644
index 0000000..6ca58ab
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/main.c
@@ -0,0 +1,34 @@
+/* -------------------------------------------------------------------------- 
+ * Copyright (c) 2013-2017 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ *---------------------------------------------------------------------------*/
+
+#include <stdio.h>
+
+#include "jtest.h"
+#include "all_tests.h"
+#include "arm_math.h"
+
+
+int main (void) {
+
+  JTEST_INIT();                 /* Initialize test framework. */
+  JTEST_GROUP_CALL(all_tests);  /* Run all tests. */
+  JTEST_ACT_EXIT_FW();          /* Exit test framework.  */
+
+  while(1);						/* Never return */
+}
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/ARM/DspLibTest_MPS2.uvprojx b/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/ARM/DspLibTest_MPS2.uvprojx
index 15df8ff..3d9cf53 100644
--- a/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/ARM/DspLibTest_MPS2.uvprojx
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/ARM/DspLibTest_MPS2.uvprojx
@@ -334,7 +334,7 @@
               <MiscControls></MiscControls>
               <Define>ARM_MATH_CM0</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -1175,7 +1175,7 @@
               <MiscControls></MiscControls>
               <Define>ARM_MATH_CM3</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -2016,7 +2016,7 @@
               <MiscControls></MiscControls>
               <Define>ARM_MATH_CM4</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -2857,7 +2857,7 @@
               <MiscControls></MiscControls>
               <Define>ARM_MATH_CM4 __FPU_PRESENT=1U</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -3698,7 +3698,7 @@
               <MiscControls></MiscControls>
               <Define>ARM_MATH_CM7</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -4539,7 +4539,7 @@
               <MiscControls></MiscControls>
               <Define>ARM_MATH_CM7 __FPU_PRESENT=1U</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -5380,7 +5380,7 @@
               <MiscControls></MiscControls>
               <Define>ARM_MATH_CM7 __FPU_PRESENT=1U</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -6222,7 +6222,7 @@
               <MiscControls>-fhonor-nans</MiscControls>
               <Define>ARM_MATH_ARMV8MBL</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -7064,7 +7064,7 @@
               <MiscControls>-Xclang -target-feature -Xclang +t2xtpk -fhonor-nans</MiscControls>
               <Define>ARM_MATH_ARMV8MML</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -7906,7 +7906,7 @@
               <MiscControls>-Xclang -target-feature -Xclang +t2xtpk -fhonor-nans</MiscControls>
               <Define>ARM_MATH_ARMV8MML __FPU_PRESENT=1U</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -8748,7 +8748,7 @@
               <MiscControls>-Xclang -target-feature -Xclang +t2xtpk -fhonor-nans</MiscControls>
               <Define>ARM_MATH_ARMV8MML __FPU_PRESENT=1U</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -9590,7 +9590,7 @@
               <MiscControls>-Xclang -target-feature -Xclang +t2xtpk -fhonor-nans</MiscControls>
               <Define>ARM_MATH_ARMV8MML __DSP_PRESENT=1U</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -10432,7 +10432,7 @@
               <MiscControls>-Xclang -target-feature -Xclang +t2xtpk -fhonor-nans</MiscControls>
               <Define>ARM_MATH_ARMV8MML __DSP_PRESENT=1U __FPU_PRESENT=1U</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -11274,7 +11274,7 @@
               <MiscControls>-Xclang -target-feature -Xclang +t2xtpk -fhonor-nans</MiscControls>
               <Define>ARM_MATH_ARMV8MML __DSP_PRESENT=1U __FPU_PRESENT=1U</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/GCC/DspLibTest_MPS2.uvprojx b/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/GCC/DspLibTest_MPS2.uvprojx
index cfc18b2..451ab46 100644
--- a/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/GCC/DspLibTest_MPS2.uvprojx
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/GCC/DspLibTest_MPS2.uvprojx
@@ -240,7 +240,7 @@
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
               <Define>ARM_MATH_CM0</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -964,7 +964,7 @@
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
               <Define>ARM_MATH_CM3</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -1688,7 +1688,7 @@
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
               <Define>ARM_MATH_CM4</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -2412,7 +2412,7 @@
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
               <Define>ARM_MATH_CM4 __FPU_PRESENT=1U</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -3136,7 +3136,7 @@
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
               <Define>ARM_MATH_CM7</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -3860,7 +3860,7 @@
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
               <Define>ARM_MATH_CM7 __FPU_PRESENT=1U</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -4584,7 +4584,7 @@
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
               <Define>ARM_MATH_CM7 __FPU_PRESENT=1U</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -5308,7 +5308,7 @@
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.base</MiscControls>
               <Define>ARM_MATH_ARMV8MBL</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -6032,7 +6032,7 @@
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main</MiscControls>
               <Define>ARM_MATH_ARMV8MML</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -6756,7 +6756,7 @@
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
               <Define>ARM_MATH_ARMV8MML __FPU_PRESENT=1U</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -7480,7 +7480,7 @@
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
               <Define>ARM_MATH_ARMV8MML __FPU_PRESENT=1U</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -8204,7 +8204,7 @@
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp</MiscControls>
               <Define>ARM_MATH_ARMV8MML __DSP_PRESENT=1U</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -8928,7 +8928,7 @@
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
               <Define>ARM_MATH_ARMV8MML __DSP_PRESENT=1U __FPU_PRESENT=1U</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -9652,7 +9652,7 @@
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
               <Define>ARM_MATH_ARMV8MML __DSP_PRESENT=1U __FPU_PRESENT=1U</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARM/DspLibTest_FVP.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARM/DspLibTest_FVP.uvoptx
new file mode 100644
index 0000000..f1a60d5
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARM/DspLibTest_FVP.uvoptx
@@ -0,0 +1,2479 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>cortexM0l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM0l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF"../cortexM0l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
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+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
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+        <aSer1>0</aSer1>
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+        <viewmode>1</viewmode>
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+        <aSer3>0</aSer3>
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+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
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+      <LintExecutable></LintExecutable>
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+      <pMisraName></pMisraName>
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+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM3l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM3l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
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+        <LLibSym>1</LLibSym>
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+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
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+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
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+        <bEvRecOn>1</bEvRecOn>
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+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF"../cortexM3l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
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+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
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+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
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+        <aSym>0</aSym>
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+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
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+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
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+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
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+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
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+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
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+        <sRfunc>1</sRfunc>
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+        <tRfunc>0</tRfunc>
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+        <nTsel>5</nTsel>
+        <sDll></sDll>
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+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"../cortexM4l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
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+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4lf</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4lf\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4lf_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"../cortexM7l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7lfsp</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7lfsp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"../cortexM7lfsp_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7lfdp</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
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new file mode 100644
index 0000000..af0aa08
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARM/DspLibTest_FVP.uvprojx
@@ -0,0 +1,7114 @@
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+              <FilePath>..\..\Common\src\basic_math_tests\offset_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>shift_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\shift_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>scale_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\scale_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>ComplexMath</GroupName>
+          <Files>
+            <File>
+              <FileName>complex_math_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\complex_math_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>complex_math_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\complex_math_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_conj_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_conj_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mag_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mag_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mag_squared_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_dot_prod_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mult_cmplx_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mult_real_test.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Controller</GroupName>
+          <Files>
+            <File>
+              <FileName>controller_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\controller_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>pid_reset_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\pid_reset_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>sin_cos_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\sin_cos_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>pid_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\pid_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>controller_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\controller_test_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>FastMath</GroupName>
+          <Files>
+            <File>
+              <FileName>fast_math_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>fast_math_tests_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Filtering</GroupName>
+          <Files>
+            <File>
+              <FileName>filtering_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\filtering_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>filtering_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\filtering_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>biquad_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\biquad_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>conv_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\conv_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>correlate_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\correlate_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>fir_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\fir_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>iir_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\iir_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>lms_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\lms_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Matrix</GroupName>
+          <Files>
+            <File>
+              <FileName>matrix_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\matrix_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>matrix_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\matrix_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_cmplx_mult_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_add_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_add_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_mult_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_mult_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_mult_fast_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_mult_fast_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_sub_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_sub_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_inverse_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_inverse_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_trans_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_trans_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_init_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_init_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_scale_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_scale_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Statistics</GroupName>
+          <Files>
+            <File>
+              <FileName>max_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\max_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>statistics_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\statistics_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>statistics_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\statistics_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>mean_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\mean_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>min_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\min_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>power_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\power_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>rms_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\rms_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>std_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\std_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>var_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\var_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Support</GroupName>
+          <Files>
+            <File>
+              <FileName>copy_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\copy_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>support_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\support_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>support_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\support_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>fill_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\fill_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>x_to_y_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\x_to_y_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Intrinsics</GroupName>
+          <Files>
+            <File>
+              <FileName>intrinsics_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>intrinsics_tests_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>MathHelper</GroupName>
+          <Files>
+            <File>
+              <FileName>math_helper.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\math_helper.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARM/Logs/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARM/Logs/.gitignore
new file mode 100644
index 0000000..5e7d273
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARM/Logs/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# Except this file
+!.gitignore
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMCLANG/DspLibTest_FVP.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMCLANG/DspLibTest_FVP.uvoptx
new file mode 100644
index 0000000..6edc42b
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMCLANG/DspLibTest_FVP.uvoptx
@@ -0,0 +1,3304 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>cortexM0l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM0l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF"..\cortexM0l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
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+        <viewmode>1</viewmode>
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+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
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+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM3l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM3l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF"..\cortexM3l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4lf</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4lf\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4lf_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7lfsp</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7lfsp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfsp_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7lfdp</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7lfdp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfdp_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MBLl</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MBLl\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>15</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFMv8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFMv8M</Key>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMv8MBLl_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MMLl</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MMLl\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>15</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFMv8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFMv8M</Key>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLl_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MMLlfsp</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MMLlfsp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>15</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFMv8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFMv8M</Key>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLlfsp_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MMLld</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MMLld\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>15</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFMv8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFMv8M</Key>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLld_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MMLldfsp</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MMLldfsp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
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+                  <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
+                  <Undefine></Undefine>
+                  <IncludePath></IncludePath>
+                </VariousControls>
+              </Cads>
+              <Aads>
+                <interw>2</interw>
+                <Ropi>2</Ropi>
+                <Rwpi>2</Rwpi>
+                <thumb>2</thumb>
+                <SplitLS>2</SplitLS>
+                <SwStkChk>2</SwStkChk>
+                <NoWarn>2</NoWarn>
+                <uSurpInc>2</uSurpInc>
+                <useXO>2</useXO>
+                <uClangAs>2</uClangAs>
+                <VariousControls>
+                  <MiscControls></MiscControls>
+                  <Define></Define>
+                  <Undefine></Undefine>
+                  <IncludePath></IncludePath>
+                </VariousControls>
+              </Aads>
+            </GroupArmAds>
+          </GroupOption>
+          <Files>
+            <File>
+              <FileName>BasicMathFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\Source\BasicMathFunctions\BasicMathFunctions.c</FilePath>
+            </File>
+            <File>
+              <FileName>CommonTables.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\Source\CommonTables\CommonTables.c</FilePath>
+            </File>
+            <File>
+              <FileName>ComplexMathFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\Source\ComplexMathFunctions\ComplexMathFunctions.c</FilePath>
+            </File>
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+              <FileType>1</FileType>
+              <FilePath>..\..\..\Source\ControllerFunctions\ControllerFunctions.c</FilePath>
+            </File>
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+              <FileName>FastMathFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\Source\FastMathFunctions\FastMathFunctions.c</FilePath>
+            </File>
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+              <FileType>1</FileType>
+              <FilePath>..\..\..\Source\FilteringFunctions\FilteringFunctions.c</FilePath>
+            </File>
+            <File>
+              <FileName>MatrixFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\Source\MatrixFunctions\MatrixFunctions.c</FilePath>
+            </File>
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+              <FilePath>..\..\..\Source\StatisticsFunctions\StatisticsFunctions.c</FilePath>
+            </File>
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+              <FileName>SupportFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\Source\SupportFunctions\SupportFunctions.c</FilePath>
+            </File>
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+              <FileName>TransformFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\Source\TransformFunctions\TransformFunctions.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Ref_Lib Files</GroupName>
+          <Files>
+            <File>
+              <FileName>BasicMathFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\BasicMathFunctions\BasicMathFunctions.c</FilePath>
+            </File>
+            <File>
+              <FileName>ComplexMathFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\ComplexMathFunctions\ComplexMathFunctions.c</FilePath>
+            </File>
+            <File>
+              <FileName>ControllerFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\ControllerFunctions\ControllerFunctions.c</FilePath>
+            </File>
+            <File>
+              <FileName>FastMathFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\FastMathFunctions\FastMathFunctions.c</FilePath>
+            </File>
+            <File>
+              <FileName>FilteringFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\FilteringFunctions\FilteringFunctions.c</FilePath>
+            </File>
+            <File>
+              <FileName>HelperFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\HelperFunctions\HelperFunctions.c</FilePath>
+            </File>
+            <File>
+              <FileName>Intrinsics_.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\Intrinsics\Intrinsics_.c</FilePath>
+            </File>
+            <File>
+              <FileName>MatrixFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c</FilePath>
+            </File>
+            <File>
+              <FileName>StatisticsFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\StatisticsFunctions\StatisticsFunctions.c</FilePath>
+            </File>
+            <File>
+              <FileName>SupportFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\SupportFunctions\SupportFunctions.c</FilePath>
+            </File>
+            <File>
+              <FileName>TransformFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\TransformFunctions\TransformFunctions.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Startup</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\main.c</FilePath>
+            </File>
+            <File>
+              <FileName>system_generic.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\platform\system_generic.c</FilePath>
+            </File>
+            <File>
+              <FileName>startup_generic.S</FileName>
+              <FileType>2</FileType>
+              <FilePath>..\..\Common\platform\startup_generic.S</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>JTest</GroupName>
+          <Files>
+            <File>
+              <FileName>jtest_cycle.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\JTest\src\jtest_cycle.c</FilePath>
+            </File>
+            <File>
+              <FileName>jtest_fw.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\JTest\src\jtest_fw.c</FilePath>
+            </File>
+            <File>
+              <FileName>jtest_dump_str_segments.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\JTest\src\jtest_dump_str_segments.c</FilePath>
+            </File>
+            <File>
+              <FileName>jtest_trigger_action.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\JTest\src\jtest_trigger_action.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>AllTests</GroupName>
+          <Files>
+            <File>
+              <FileName>all_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\all_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Transform</GroupName>
+          <Files>
+            <File>
+              <FileName>cfft_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\cfft_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>transform_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\transform_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>transform_tests_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\transform_tests_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>cfft_family_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\cfft_family_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>rfft_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\rfft_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>rfft_fast_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\rfft_fast_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>dct4_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\dct4_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>BasicMath</GroupName>
+          <Files>
+            <File>
+              <FileName>basic_math_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\basic_math_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>abs_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\abs_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>basic_math_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\basic_math_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>negate_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\negate_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>add_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\add_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mult_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\mult_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>sub_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\sub_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>dot_prod_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\dot_prod_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>offset_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\offset_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>shift_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\shift_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>scale_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\scale_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>ComplexMath</GroupName>
+          <Files>
+            <File>
+              <FileName>complex_math_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\complex_math_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>complex_math_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\complex_math_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_conj_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_conj_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mag_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mag_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mag_squared_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_dot_prod_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mult_cmplx_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mult_real_test.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Controller</GroupName>
+          <Files>
+            <File>
+              <FileName>controller_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\controller_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>pid_reset_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\pid_reset_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>sin_cos_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\sin_cos_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>pid_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\pid_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>controller_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\controller_test_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>FastMath</GroupName>
+          <Files>
+            <File>
+              <FileName>fast_math_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>fast_math_tests_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Filtering</GroupName>
+          <Files>
+            <File>
+              <FileName>filtering_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\filtering_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>filtering_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\filtering_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>biquad_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\biquad_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>conv_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\conv_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>correlate_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\correlate_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>fir_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\fir_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>iir_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\iir_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>lms_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\lms_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Matrix</GroupName>
+          <Files>
+            <File>
+              <FileName>matrix_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\matrix_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>matrix_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\matrix_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_cmplx_mult_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_add_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_add_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_mult_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_mult_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_mult_fast_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_mult_fast_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_sub_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_sub_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_inverse_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_inverse_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_trans_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_trans_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_init_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_init_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_scale_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_scale_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Statistics</GroupName>
+          <Files>
+            <File>
+              <FileName>max_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\max_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>statistics_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\statistics_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>statistics_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\statistics_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>mean_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\mean_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>min_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\min_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>power_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\power_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>rms_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\rms_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>std_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\std_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>var_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\var_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Support</GroupName>
+          <Files>
+            <File>
+              <FileName>copy_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\copy_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>support_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\support_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>support_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\support_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>fill_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\fill_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>x_to_y_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\x_to_y_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Intrinsics</GroupName>
+          <Files>
+            <File>
+              <FileName>intrinsics_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>intrinsics_tests_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>MathHelper</GroupName>
+          <Files>
+            <File>
+              <FileName>math_helper.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\math_helper.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMCLANG/Logs/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMCLANG/Logs/.gitignore
new file mode 100644
index 0000000..5e7d273
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMCLANG/Logs/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# Except this file
+!.gitignore
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MBLl_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MBLl_config.txt
new file mode 100644
index 0000000..d9cb90a
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MBLl_config.txt
@@ -0,0 +1,11 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.semihosting-enable=0                             # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3                               # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1                                      # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1                                      # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0                                         # (bool  , init-time) default = '1'      : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0                              # (int   , init-time) default = '0xA'    : 
+fvp_mps2.DISABLE_GATING=1                             # (bool  , init-time) default = '0'      : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLl_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLl_config.txt
new file mode 100644
index 0000000..9c3cfc2
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLl_config.txt
@@ -0,0 +1,13 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.FPU=0                                            # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+cpu0.DSP=0                                            # (bool  , init-time) default = '1'      : Set whether the model has the DSP extension
+cpu0.semihosting-enable=0                             # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3                               # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1                                      # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1                                      # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0                                         # (bool  , init-time) default = '1'      : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0                              # (int   , init-time) default = '0xA'    : 
+fvp_mps2.DISABLE_GATING=1                             # (bool  , init-time) default = '0'      : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLld_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLld_config.txt
new file mode 100644
index 0000000..011260a
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLld_config.txt
@@ -0,0 +1,13 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.FPU=0                                            # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+cpu0.DSP=1                                            # (bool  , init-time) default = '1'      : Set whether the model has the DSP extension
+cpu0.semihosting-enable=0                             # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3                               # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1                                      # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1                                      # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0                                         # (bool  , init-time) default = '1'      : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0                              # (int   , init-time) default = '0xA'    : 
+fvp_mps2.DISABLE_GATING=1                             # (bool  , init-time) default = '0'      : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLldfsp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLldfsp_config.txt
new file mode 100644
index 0000000..2a0a82a
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLldfsp_config.txt
@@ -0,0 +1,13 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.FPU=1                                            # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+cpu0.DSP=1                                            # (bool  , init-time) default = '1'      : Set whether the model has the DSP extension
+cpu0.semihosting-enable=0                             # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3                               # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1                                      # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1                                      # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0                                         # (bool  , init-time) default = '1'      : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0                              # (int   , init-time) default = '0xA'    : 
+fvp_mps2.DISABLE_GATING=1                             # (bool  , init-time) default = '0'      : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLlfsp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLlfsp_config.txt
new file mode 100644
index 0000000..4140d9b
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLlfsp_config.txt
@@ -0,0 +1,13 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.FPU=1                                            # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+cpu0.DSP=0                                            # (bool  , init-time) default = '1'      : Set whether the model has the DSP extension
+cpu0.semihosting-enable=0                             # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3                               # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1                                      # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1                                      # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0                                         # (bool  , init-time) default = '1'      : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0                              # (int   , init-time) default = '0xA'    : 
+fvp_mps2.DISABLE_GATING=1                             # (bool  , init-time) default = '0'      : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/GCC/DspLibTest_FVP.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/GCC/DspLibTest_FVP.uvoptx
new file mode 100644
index 0000000..44294c2
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/GCC/DspLibTest_FVP.uvoptx
@@ -0,0 +1,3304 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>cortexM0l</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM0l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
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+        <tRtrace>1</tRtrace>
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+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF"..\cortexM0l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
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+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
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+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM3l</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
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+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM3l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
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+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
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+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF"..\cortexM3l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
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+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
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+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
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+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4l</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4lf</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4lf\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4lf_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7l</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7lfsp</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7lfsp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfsp_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7lfdp</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7lfdp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>5</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFM.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfdp_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MBLl</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MBLl\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>15</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFMv8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFMv8M</Key>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMv8MBLl_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MMLl</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MMLl\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>15</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFMv8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFMv8M</Key>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLl_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MMLlfsp</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MMLlfsp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>15</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFMv8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFMv8M</Key>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLlfsp_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MMLld</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MMLld\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>15</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFMv8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFMv8M</Key>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLld_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MMLldfsp</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MMLldfsp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>15</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_FVP.ini</tIfile>
+        <pMon>BIN\DbgFMv8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFMv8M</Key>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLldfsp_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
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new file mode 100644
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+                  <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
+                  <Undefine></Undefine>
+                  <IncludePath></IncludePath>
+                </VariousControls>
+              </Carm>
+              <Aarm>
+                <bBE>2</bBE>
+                <interw>2</interw>
+                <VariousControls>
+                  <MiscControls></MiscControls>
+                  <Define></Define>
+                  <Undefine></Undefine>
+                  <IncludePath></IncludePath>
+                </VariousControls>
+              </Aarm>
+            </GroupArm>
+          </GroupOption>
+          <Files>
+            <File>
+              <FileName>BasicMathFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\Source\BasicMathFunctions\BasicMathFunctions.c</FilePath>
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+              <FileType>1</FileType>
+              <FilePath>..\..\..\Source\CommonTables\CommonTables.c</FilePath>
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+              <FileType>1</FileType>
+              <FilePath>..\..\..\Source\ComplexMathFunctions\ComplexMathFunctions.c</FilePath>
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+              <FilePath>..\..\..\Source\ControllerFunctions\ControllerFunctions.c</FilePath>
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+              <FilePath>..\..\..\Source\FilteringFunctions\FilteringFunctions.c</FilePath>
+            </File>
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+              <FileType>1</FileType>
+              <FilePath>..\..\..\Source\MatrixFunctions\MatrixFunctions.c</FilePath>
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+            </File>
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+            </File>
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+          <GroupName>Ref_Lib Files</GroupName>
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+              <FilePath>..\..\RefLibs\src\BasicMathFunctions\BasicMathFunctions.c</FilePath>
+            </File>
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+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\ComplexMathFunctions\ComplexMathFunctions.c</FilePath>
+            </File>
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+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\ControllerFunctions\ControllerFunctions.c</FilePath>
+            </File>
+            <File>
+              <FileName>FastMathFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\FastMathFunctions\FastMathFunctions.c</FilePath>
+            </File>
+            <File>
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+              <FilePath>..\..\RefLibs\src\FilteringFunctions\FilteringFunctions.c</FilePath>
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+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\HelperFunctions\HelperFunctions.c</FilePath>
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+              <FilePath>..\..\RefLibs\src\Intrinsics\Intrinsics_.c</FilePath>
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+            <File>
+              <FileName>MatrixFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c</FilePath>
+            </File>
+            <File>
+              <FileName>StatisticsFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\StatisticsFunctions\StatisticsFunctions.c</FilePath>
+            </File>
+            <File>
+              <FileName>SupportFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\SupportFunctions\SupportFunctions.c</FilePath>
+            </File>
+            <File>
+              <FileName>TransformFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\TransformFunctions\TransformFunctions.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Startup</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\main.c</FilePath>
+            </File>
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+              <FilePath>..\..\Common\platform\system_generic.c</FilePath>
+            </File>
+            <File>
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+              <FileType>1</FileType>
+              <FilePath>..\..\Common\platform\startup_generic.S</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>JTest</GroupName>
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+            <File>
+              <FileName>jtest_cycle.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\JTest\src\jtest_cycle.c</FilePath>
+            </File>
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+              <FilePath>..\..\Common\JTest\src\jtest_fw.c</FilePath>
+            </File>
+            <File>
+              <FileName>jtest_dump_str_segments.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\JTest\src\jtest_dump_str_segments.c</FilePath>
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+            <File>
+              <FileName>jtest_trigger_action.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\JTest\src\jtest_trigger_action.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>AllTests</GroupName>
+          <Files>
+            <File>
+              <FileName>all_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\all_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Transform</GroupName>
+          <Files>
+            <File>
+              <FileName>cfft_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\cfft_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>transform_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\transform_test_group.c</FilePath>
+            </File>
+            <File>
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+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\transform_tests_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>cfft_family_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\cfft_family_tests.c</FilePath>
+            </File>
+            <File>
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+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\rfft_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>rfft_fast_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\rfft_fast_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>dct4_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\dct4_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>BasicMath</GroupName>
+          <Files>
+            <File>
+              <FileName>basic_math_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\basic_math_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>abs_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\abs_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>basic_math_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\basic_math_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>negate_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\negate_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>add_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\add_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mult_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\mult_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>sub_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\sub_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>dot_prod_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\dot_prod_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>offset_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\offset_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>shift_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\shift_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>scale_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\scale_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>ComplexMath</GroupName>
+          <Files>
+            <File>
+              <FileName>complex_math_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\complex_math_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>complex_math_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\complex_math_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_conj_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_conj_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mag_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mag_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mag_squared_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_dot_prod_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mult_cmplx_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mult_real_test.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Controller</GroupName>
+          <Files>
+            <File>
+              <FileName>controller_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\controller_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>pid_reset_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\pid_reset_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>sin_cos_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\sin_cos_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>pid_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\pid_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>controller_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\controller_test_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>FastMath</GroupName>
+          <Files>
+            <File>
+              <FileName>fast_math_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>fast_math_tests_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Filtering</GroupName>
+          <Files>
+            <File>
+              <FileName>filtering_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\filtering_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>filtering_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\filtering_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>biquad_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\biquad_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>conv_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\conv_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>correlate_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\correlate_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>fir_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\fir_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>iir_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\iir_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>lms_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\lms_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Matrix</GroupName>
+          <Files>
+            <File>
+              <FileName>matrix_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\matrix_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>matrix_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\matrix_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_cmplx_mult_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_add_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_add_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_mult_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_mult_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_mult_fast_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_mult_fast_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_sub_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_sub_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_inverse_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_inverse_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_trans_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_trans_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_init_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_init_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_scale_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_scale_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Statistics</GroupName>
+          <Files>
+            <File>
+              <FileName>max_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\max_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>statistics_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\statistics_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>statistics_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\statistics_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>mean_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\mean_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>min_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\min_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>power_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\power_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>rms_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\rms_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>std_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\std_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>var_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\var_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Support</GroupName>
+          <Files>
+            <File>
+              <FileName>copy_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\copy_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>support_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\support_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>support_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\support_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>fill_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\fill_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>x_to_y_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\x_to_y_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Intrinsics</GroupName>
+          <Files>
+            <File>
+              <FileName>intrinsics_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>intrinsics_tests_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>MathHelper</GroupName>
+          <Files>
+            <File>
+              <FileName>math_helper.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\math_helper.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/GCC/Logs/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/GCC/Logs/.gitignore
new file mode 100644
index 0000000..5e7d273
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/GCC/Logs/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# Except this file
+!.gitignore
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM0l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM0l_config.txt
new file mode 100644
index 0000000..8e33c76
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM0l_config.txt
@@ -0,0 +1,8 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm0ct.semihosting-enable=0                    # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm0ct.min_sync_level=0x3                      # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm0ct.cpi_mul=0x1                             # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm0ct.cpi_div=0x1                             # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM3l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM3l_config.txt
new file mode 100644
index 0000000..2caf254
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM3l_config.txt
@@ -0,0 +1,8 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm3ct.semihosting-enable=0                    # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm3ct.min_sync_level=0x3                      # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm3ct.cpi_mul=0x1                             # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm3ct.cpi_div=0x1                             # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM4l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM4l_config.txt
new file mode 100644
index 0000000..1c9fece
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM4l_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm4ct.vfp-present=0                           # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+armcortexm4ct.semihosting-enable=0                    # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm4ct.min_sync_level=0x3                      # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm4ct.cpi_mul=0x1                             # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm4ct.cpi_div=0x1                             # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM4lf_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM4lf_config.txt
new file mode 100644
index 0000000..eb832ed
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM4lf_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm4ct.vfp-present=1                           # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+armcortexm4ct.semihosting-enable=0                    # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm4ct.min_sync_level=0x3                      # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm4ct.cpi_mul=0x1                             # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm4ct.cpi_div=0x1                             # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7l_config.txt
new file mode 100644
index 0000000..4e591c9
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7l_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm7ct.vfp-present=0                           # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+armcortexm7ct.semihosting-enable=0                    # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm7ct.min_sync_level=0x3                      # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm7ct.cpi_mul=0x1                             # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm7ct.cpi_div=0x1                             # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7lfdp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7lfdp_config.txt
new file mode 100644
index 0000000..1888d60
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7lfdp_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm7ct.vfp-present=1                           # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+armcortexm7ct.semihosting-enable=0                    # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm7ct.min_sync_level=0x3                      # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm7ct.cpi_mul=0x1                             # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm7ct.cpi_div=0x1                             # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7lfsp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7lfsp_config.txt
new file mode 100644
index 0000000..1888d60
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7lfsp_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm7ct.vfp-present=1                           # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+armcortexm7ct.semihosting-enable=0                    # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm7ct.min_sync_level=0x3                      # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm7ct.cpi_mul=0x1                             # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm7ct.cpi_div=0x1                             # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARM/DspLibTest_MPS2.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARM/DspLibTest_MPS2.uvoptx
new file mode 100644
index 0000000..4806df2
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARM/DspLibTest_MPS2.uvoptx
@@ -0,0 +1,2479 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>cortexM0l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM0l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>0</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>1</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULP2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF"../cortexM0l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM3l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM3l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>2</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULPL2CM3.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF"../cortexM3l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>2</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULPL2CM3.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"../cortexM4l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4lf</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4lf\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>2</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULPL2CM3.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4lf_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>2</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULPL2CM3.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"../cortexM7l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7lfsp</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7lfsp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
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index 0000000..8f0763f
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARM/DspLibTest_MPS2.uvprojx
@@ -0,0 +1,7114 @@
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+              <FilePath>..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c</FilePath>
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+            </File>
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+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\SupportFunctions\SupportFunctions.c</FilePath>
+            </File>
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+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\TransformFunctions\TransformFunctions.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Startup</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\main.c</FilePath>
+            </File>
+            <File>
+              <FileName>system_generic.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\platform\system_generic.c</FilePath>
+            </File>
+            <File>
+              <FileName>startup_generic.S</FileName>
+              <FileType>2</FileType>
+              <FilePath>..\..\Common\platform\startup_generic.S</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>JTest</GroupName>
+          <Files>
+            <File>
+              <FileName>jtest_cycle.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\JTest\src\jtest_cycle.c</FilePath>
+            </File>
+            <File>
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+              <FileType>1</FileType>
+              <FilePath>..\..\Common\JTest\src\jtest_fw.c</FilePath>
+            </File>
+            <File>
+              <FileName>jtest_dump_str_segments.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\JTest\src\jtest_dump_str_segments.c</FilePath>
+            </File>
+            <File>
+              <FileName>jtest_trigger_action.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\JTest\src\jtest_trigger_action.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>AllTests</GroupName>
+          <Files>
+            <File>
+              <FileName>all_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\all_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Transform</GroupName>
+          <Files>
+            <File>
+              <FileName>cfft_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\cfft_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>transform_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\transform_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>transform_tests_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\transform_tests_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>cfft_family_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\cfft_family_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>rfft_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\rfft_tests.c</FilePath>
+            </File>
+            <File>
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+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\rfft_fast_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>dct4_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\dct4_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>BasicMath</GroupName>
+          <Files>
+            <File>
+              <FileName>basic_math_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\basic_math_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>abs_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\abs_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>basic_math_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\basic_math_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>negate_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\negate_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>add_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\add_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mult_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\mult_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>sub_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\sub_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>dot_prod_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\dot_prod_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>offset_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\offset_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>shift_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\shift_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>scale_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\scale_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>ComplexMath</GroupName>
+          <Files>
+            <File>
+              <FileName>complex_math_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\complex_math_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>complex_math_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\complex_math_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_conj_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_conj_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mag_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mag_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mag_squared_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_dot_prod_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mult_cmplx_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mult_real_test.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Controller</GroupName>
+          <Files>
+            <File>
+              <FileName>controller_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\controller_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>pid_reset_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\pid_reset_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>sin_cos_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\sin_cos_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>pid_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\pid_tests.c</FilePath>
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+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\controller_test_common_data.c</FilePath>
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+          </Files>
+        </Group>
+        <Group>
+          <GroupName>FastMath</GroupName>
+          <Files>
+            <File>
+              <FileName>fast_math_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>fast_math_tests_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Filtering</GroupName>
+          <Files>
+            <File>
+              <FileName>filtering_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\filtering_test_common_data.c</FilePath>
+            </File>
+            <File>
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+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\filtering_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>biquad_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\biquad_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>conv_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\conv_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>correlate_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\correlate_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>fir_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\fir_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>iir_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\iir_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>lms_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\lms_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Matrix</GroupName>
+          <Files>
+            <File>
+              <FileName>matrix_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\matrix_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>matrix_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\matrix_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_cmplx_mult_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_add_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_add_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_mult_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_mult_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_mult_fast_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_mult_fast_tests.c</FilePath>
+            </File>
+            <File>
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+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_sub_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_inverse_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_inverse_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_trans_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_trans_tests.c</FilePath>
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+            <File>
+              <FileName>mat_init_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_init_tests.c</FilePath>
+            </File>
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+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_scale_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
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+          <GroupName>Statistics</GroupName>
+          <Files>
+            <File>
+              <FileName>max_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\max_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>statistics_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\statistics_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>statistics_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\statistics_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>mean_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\mean_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>min_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\min_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>power_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\power_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>rms_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\rms_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>std_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\std_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>var_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\var_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Support</GroupName>
+          <Files>
+            <File>
+              <FileName>copy_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\copy_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>support_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\support_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>support_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\support_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>fill_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\fill_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>x_to_y_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\x_to_y_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Intrinsics</GroupName>
+          <Files>
+            <File>
+              <FileName>intrinsics_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>intrinsics_tests_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>MathHelper</GroupName>
+          <Files>
+            <File>
+              <FileName>math_helper.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\math_helper.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
+</Project>
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new file mode 100644
index 0000000..5e7d273
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARM/Logs/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# Except this file
+!.gitignore
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMCLANG/DspLibTest_MPS2.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMCLANG/DspLibTest_MPS2.uvoptx
new file mode 100644
index 0000000..f0a68be
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMCLANG/DspLibTest_MPS2.uvoptx
@@ -0,0 +1,3304 @@
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+
+  <Extensions>
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+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>cortexM0l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
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+        <BeepAtEnd>1</BeepAtEnd>
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+        <tvExp>1</tvExp>
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+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
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+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>2</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULPL2CM3.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF"..\cortexM0l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM3l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM3l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>2</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULPL2CM3.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF"..\cortexM3l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>2</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULPL2CM3.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4lf</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4lf\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>2</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULPL2CM3.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4lf_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>2</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULPL2CM3.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7lfsp</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7lfsp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>2</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULPL2CM3.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfsp_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7lfdp</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7lfdp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>2</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULPL2CM3.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfdp_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MBLl</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MBLl\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>12</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULP2V8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFMv8M</Key>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMv8MBLl_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MMLl</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MMLl\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>12</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULP2V8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFMv8M</Key>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLl_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MMLlfsp</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MMLlfsp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>12</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULP2V8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFMv8M</Key>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLlfsp_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MMLld</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MMLld\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>12</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
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+              <FilePath>..\..\Common\src\matrix_tests\mat_mult_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_mult_fast_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_mult_fast_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_sub_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_sub_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_inverse_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_inverse_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_trans_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_trans_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_init_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_init_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_scale_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_scale_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Statistics</GroupName>
+          <Files>
+            <File>
+              <FileName>max_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\max_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>statistics_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\statistics_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>statistics_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\statistics_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>mean_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\mean_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>min_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\min_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>power_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\power_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>rms_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\rms_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>std_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\std_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>var_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\var_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Support</GroupName>
+          <Files>
+            <File>
+              <FileName>copy_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\copy_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>support_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\support_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>support_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\support_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>fill_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\fill_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>x_to_y_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\x_to_y_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Intrinsics</GroupName>
+          <Files>
+            <File>
+              <FileName>intrinsics_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>intrinsics_tests_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>MathHelper</GroupName>
+          <Files>
+            <File>
+              <FileName>math_helper.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\math_helper.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMCLANG/Logs/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMCLANG/Logs/.gitignore
new file mode 100644
index 0000000..5e7d273
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMCLANG/Logs/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# Except this file
+!.gitignore
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MBLl_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MBLl_config.txt
new file mode 100644
index 0000000..d9cb90a
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MBLl_config.txt
@@ -0,0 +1,11 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.semihosting-enable=0                             # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3                               # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1                                      # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1                                      # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0                                         # (bool  , init-time) default = '1'      : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0                              # (int   , init-time) default = '0xA'    : 
+fvp_mps2.DISABLE_GATING=1                             # (bool  , init-time) default = '0'      : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLl_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLl_config.txt
new file mode 100644
index 0000000..9c3cfc2
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLl_config.txt
@@ -0,0 +1,13 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.FPU=0                                            # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+cpu0.DSP=0                                            # (bool  , init-time) default = '1'      : Set whether the model has the DSP extension
+cpu0.semihosting-enable=0                             # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3                               # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1                                      # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1                                      # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0                                         # (bool  , init-time) default = '1'      : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0                              # (int   , init-time) default = '0xA'    : 
+fvp_mps2.DISABLE_GATING=1                             # (bool  , init-time) default = '0'      : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLld_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLld_config.txt
new file mode 100644
index 0000000..011260a
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLld_config.txt
@@ -0,0 +1,13 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.FPU=0                                            # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+cpu0.DSP=1                                            # (bool  , init-time) default = '1'      : Set whether the model has the DSP extension
+cpu0.semihosting-enable=0                             # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3                               # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1                                      # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1                                      # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0                                         # (bool  , init-time) default = '1'      : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0                              # (int   , init-time) default = '0xA'    : 
+fvp_mps2.DISABLE_GATING=1                             # (bool  , init-time) default = '0'      : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLldfsp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLldfsp_config.txt
new file mode 100644
index 0000000..2a0a82a
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLldfsp_config.txt
@@ -0,0 +1,13 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.FPU=1                                            # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+cpu0.DSP=1                                            # (bool  , init-time) default = '1'      : Set whether the model has the DSP extension
+cpu0.semihosting-enable=0                             # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3                               # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1                                      # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1                                      # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0                                         # (bool  , init-time) default = '1'      : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0                              # (int   , init-time) default = '0xA'    : 
+fvp_mps2.DISABLE_GATING=1                             # (bool  , init-time) default = '0'      : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLlfsp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLlfsp_config.txt
new file mode 100644
index 0000000..4140d9b
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLlfsp_config.txt
@@ -0,0 +1,13 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+cpu0.FPU=1                                            # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+cpu0.DSP=0                                            # (bool  , init-time) default = '1'      : Set whether the model has the DSP extension
+cpu0.semihosting-enable=0                             # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+cpu0.min_sync_level=0x3                               # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+cpu0.cpi_mul=0x1                                      # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.cpi_div=0x1                                      # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+cpu0.SECEXT=0                                         # (bool  , init-time) default = '1'      : Whether the ARMv8-M Security Extensions are included
+idau.NUM_IDAU_REGION=0x0                              # (int   , init-time) default = '0xA'    : 
+fvp_mps2.DISABLE_GATING=1                             # (bool  , init-time) default = '0'      : Disable Memory gating logic
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/GCC/DspLibTest_MPS2.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/GCC/DspLibTest_MPS2.uvoptx
new file mode 100644
index 0000000..dd586a5
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/GCC/DspLibTest_MPS2.uvoptx
@@ -0,0 +1,3304 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>cortexM0l</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM0l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
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+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
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+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>0</tRtrace>
+        <sRSysVw>1</sRSysVw>
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+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>1</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULP2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
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+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
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+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
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+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF"..\cortexM0l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
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+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM3l</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM3l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>0</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>1</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULP2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF"..\cortexM3l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4l</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>0</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>1</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULP2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4lf</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4lf\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>0</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>1</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULP2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4lf_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7l</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>0</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>1</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULP2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7l_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7lfsp</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7lfsp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>0</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>1</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULP2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfsp_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7lfdp</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7lfdp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>0</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>1</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULP2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFM</Key>
+          <Name>-I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfdp_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MBLl</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MBLl\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>12</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULP2V8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFMv8M</Key>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMv8MBLl_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MMLl</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MMLl\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>12</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULP2V8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFMv8M</Key>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLl_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MMLlfsp</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MMLlfsp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>12</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULP2V8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFMv8M</Key>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLlfsp_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MMLld</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MMLld\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>12</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>..\..\Common\JTest\jtest_MPS2.ini</tIfile>
+        <pMon>BIN\ULP2V8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DbgFMv8M</Key>
+          <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLld_config.txt" -MA"-Q 1"</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MMLldfsp</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
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+              <FilePath>..\..\Common\src\matrix_tests\mat_mult_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_mult_fast_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_mult_fast_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_sub_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_sub_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_inverse_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_inverse_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_trans_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_trans_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_init_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_init_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_scale_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_scale_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Statistics</GroupName>
+          <Files>
+            <File>
+              <FileName>max_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\max_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>statistics_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\statistics_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>statistics_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\statistics_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>mean_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\mean_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>min_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\min_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>power_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\power_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>rms_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\rms_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>std_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\std_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>var_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\var_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Support</GroupName>
+          <Files>
+            <File>
+              <FileName>copy_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\copy_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>support_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\support_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>support_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\support_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>fill_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\fill_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>x_to_y_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\x_to_y_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Intrinsics</GroupName>
+          <Files>
+            <File>
+              <FileName>intrinsics_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>intrinsics_tests_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>MathHelper</GroupName>
+          <Files>
+            <File>
+              <FileName>math_helper.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\math_helper.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/GCC/Logs/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/GCC/Logs/.gitignore
new file mode 100644
index 0000000..5e7d273
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/GCC/Logs/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# Except this file
+!.gitignore
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM0l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM0l_config.txt
new file mode 100644
index 0000000..8e33c76
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM0l_config.txt
@@ -0,0 +1,8 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm0ct.semihosting-enable=0                    # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm0ct.min_sync_level=0x3                      # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm0ct.cpi_mul=0x1                             # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm0ct.cpi_div=0x1                             # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM3l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM3l_config.txt
new file mode 100644
index 0000000..2caf254
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM3l_config.txt
@@ -0,0 +1,8 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm3ct.semihosting-enable=0                    # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm3ct.min_sync_level=0x3                      # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm3ct.cpi_mul=0x1                             # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm3ct.cpi_div=0x1                             # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM4l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM4l_config.txt
new file mode 100644
index 0000000..1c9fece
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM4l_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm4ct.vfp-present=0                           # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+armcortexm4ct.semihosting-enable=0                    # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm4ct.min_sync_level=0x3                      # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm4ct.cpi_mul=0x1                             # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm4ct.cpi_div=0x1                             # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM4lf_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM4lf_config.txt
new file mode 100644
index 0000000..eb832ed
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM4lf_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm4ct.vfp-present=1                           # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+armcortexm4ct.semihosting-enable=0                    # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm4ct.min_sync_level=0x3                      # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm4ct.cpi_mul=0x1                             # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm4ct.cpi_div=0x1                             # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7l_config.txt
new file mode 100644
index 0000000..4e591c9
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7l_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm7ct.vfp-present=0                           # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+armcortexm7ct.semihosting-enable=0                    # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm7ct.min_sync_level=0x3                      # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm7ct.cpi_mul=0x1                             # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm7ct.cpi_div=0x1                             # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7lfdp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7lfdp_config.txt
new file mode 100644
index 0000000..1888d60
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7lfdp_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm7ct.vfp-present=1                           # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+armcortexm7ct.semihosting-enable=0                    # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm7ct.min_sync_level=0x3                      # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm7ct.cpi_mul=0x1                             # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm7ct.cpi_div=0x1                             # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7lfsp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7lfsp_config.txt
new file mode 100644
index 0000000..1888d60
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7lfsp_config.txt
@@ -0,0 +1,9 @@
+# Parameters:
+# instance.parameter=value       #(type, mode) default = 'def value' : description : [min..max]
+#----------------------------------------------------------------------------------------------
+armcortexm7ct.vfp-present=1                           # (bool  , init-time) default = '1'      : Set whether the model has VFP support
+armcortexm7ct.semihosting-enable=0                    # (bool  , init-time) default = '1'      : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false.
+armcortexm7ct.min_sync_level=0x3                      # (int   , run-time ) default = '0x0'    : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3]
+armcortexm7ct.cpi_mul=0x1                             # (int   , run-time ) default = '0x1'    : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+armcortexm7ct.cpi_div=0x1                             # (int   , run-time ) default = '0x1'    : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF]
+#----------------------------------------------------------------------------------------------
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/DspLibTest_Simulator.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/DspLibTest_Simulator.uvoptx
new file mode 100644
index 0000000..576bcd4
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/DspLibTest_Simulator.uvoptx
@@ -0,0 +1,3077 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>cortexM0l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM0l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name>-T0</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
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+        <eProf>0</eProf>
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+        <aPa1>0</aPa1>
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+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM0b</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM0b\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name>-T0</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint>
+        <Bp>
+          <Number>0</Number>
+          <Type>0</Type>
+          <LineNumber>184</LineNumber>
+          <EnabledFlag>1</EnabledFlag>
+          <Address>0</Address>
+          <ByteObject>0</ByteObject>
+          <HtxType>0</HtxType>
+          <ManyObjects>0</ManyObjects>
+          <SizeOfObject>0</SizeOfObject>
+          <BreakByAccess>0</BreakByAccess>
+          <BreakIfRCount>0</BreakIfRCount>
+          <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+          <ExecCommand></ExecCommand>
+          <Expression></Expression>
+        </Bp>
+      </Breakpoint>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM3l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM3l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=1744,166,1978,703,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name>-T0</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM3b</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM3b\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name>-T0</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint>
+        <Bp>
+          <Number>0</Number>
+          <Type>0</Type>
+          <LineNumber>184</LineNumber>
+          <EnabledFlag>1</EnabledFlag>
+          <Address>0</Address>
+          <ByteObject>0</ByteObject>
+          <HtxType>0</HtxType>
+          <ManyObjects>0</ManyObjects>
+          <SizeOfObject>0</SizeOfObject>
+          <BreakByAccess>0</BreakByAccess>
+          <BreakIfRCount>0</BreakIfRCount>
+          <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+          <ExecCommand></ExecCommand>
+          <Expression></Expression>
+        </Bp>
+      </Breakpoint>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name>-T0</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint>
+        <Bp>
+          <Number>0</Number>
+          <Type>0</Type>
+          <LineNumber>184</LineNumber>
+          <EnabledFlag>1</EnabledFlag>
+          <Address>0</Address>
+          <ByteObject>0</ByteObject>
+          <HtxType>0</HtxType>
+          <ManyObjects>0</ManyObjects>
+          <SizeOfObject>0</SizeOfObject>
+          <BreakByAccess>0</BreakByAccess>
+          <BreakIfRCount>0</BreakIfRCount>
+          <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+          <ExecCommand></ExecCommand>
+          <Expression></Expression>
+        </Bp>
+      </Breakpoint>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4b</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4b\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name>-T0</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint>
+        <Bp>
+          <Number>0</Number>
+          <Type>0</Type>
+          <LineNumber>184</LineNumber>
+          <EnabledFlag>1</EnabledFlag>
+          <Address>0</Address>
+          <ByteObject>0</ByteObject>
+          <HtxType>0</HtxType>
+          <ManyObjects>0</ManyObjects>
+          <SizeOfObject>0</SizeOfObject>
+          <BreakByAccess>0</BreakByAccess>
+          <BreakIfRCount>0</BreakIfRCount>
+          <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+          <ExecCommand></ExecCommand>
+          <Expression></Expression>
+        </Bp>
+      </Breakpoint>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4lf</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4lf\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name>-T0</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4bf</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4bf\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
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diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/DspLibTest_Simulator.uvprojx b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/DspLibTest_Simulator.uvprojx
new file mode 100644
index 0000000..041a0aa
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/DspLibTest_Simulator.uvprojx
@@ -0,0 +1,10157 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>cortexM0l</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>ARMCM0</Device>
+          <Vendor>ARM</Vendor>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
+          <PackURL>http://www.keil.com/pack/</PackURL>
+          <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM0$Device\ARM\Flash\NEW_DEVICE.FLM))</FlashDriverDll>
+          <DeviceId>0</DeviceId>
+          <RegisterFile>$$Device:ARMCM0$Device\ARM\ARMCM0\Include\ARMCM0.h</RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:ARMCM0$Device\ARM\SVD\ARMCM0.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
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+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>.\IntermediateFiles\cortexM0l\</OutputDirectory>
+          <OutputName>DspLibTest_Simulator</OutputName>
+          <CreateExecutable>1</CreateExecutable>
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+          <CreateHexFile>0</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
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+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
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+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
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+          </BeforeCompile>
+          <BeforeMake>
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+            <UserProg1Name></UserProg1Name>
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+          <SimDlgDll>DARMCM1.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM0</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
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+          <Flash4></Flash4>
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+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
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+        <TargetArmAds>
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+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M0"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
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+              <FileName>matrix_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\matrix_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_cmplx_mult_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_add_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_add_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_mult_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_mult_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_mult_fast_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_mult_fast_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_sub_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_sub_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_inverse_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_inverse_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_trans_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_trans_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_init_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_init_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_scale_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_scale_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Statistics</GroupName>
+          <Files>
+            <File>
+              <FileName>max_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\max_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>statistics_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\statistics_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>statistics_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\statistics_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>mean_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\mean_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>min_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\min_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>power_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\power_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>rms_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\rms_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>std_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\std_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>var_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\var_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Support</GroupName>
+          <Files>
+            <File>
+              <FileName>copy_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\copy_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>support_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\support_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>support_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\support_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>fill_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\fill_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>x_to_y_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\x_to_y_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Intrinsics</GroupName>
+          <Files>
+            <File>
+              <FileName>intrinsics_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>intrinsics_tests_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>MathHelper</GroupName>
+          <Files>
+            <File>
+              <FileName>math_helper.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\math_helper.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/Logs/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/Logs/.gitignore
new file mode 100644
index 0000000..5e7d273
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/Logs/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# Except this file
+!.gitignore
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARMCLANG/DspLibTest_Simulator.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARMCLANG/DspLibTest_Simulator.uvoptx
new file mode 100644
index 0000000..71442d8
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARMCLANG/DspLibTest_Simulator.uvoptx
@@ -0,0 +1,3065 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>cortexM0l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM0l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=880,228,1280,657,0)(1007=1093,261,1280,477,0)(1008=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name>-T0</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
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+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM0b</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM0b\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name>-T0</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint>
+        <Bp>
+          <Number>0</Number>
+          <Type>0</Type>
+          <LineNumber>184</LineNumber>
+          <EnabledFlag>1</EnabledFlag>
+          <Address>0</Address>
+          <ByteObject>0</ByteObject>
+          <HtxType>0</HtxType>
+          <ManyObjects>0</ManyObjects>
+          <SizeOfObject>0</SizeOfObject>
+          <BreakByAccess>0</BreakByAccess>
+          <BreakIfRCount>0</BreakIfRCount>
+          <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+          <ExecCommand></ExecCommand>
+          <Expression></Expression>
+        </Bp>
+      </Breakpoint>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
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+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
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+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM3l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM3l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=1744,166,1978,703,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name>-T0</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM3b</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM3b\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name>-T0</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint>
+        <Bp>
+          <Number>0</Number>
+          <Type>0</Type>
+          <LineNumber>184</LineNumber>
+          <EnabledFlag>1</EnabledFlag>
+          <Address>0</Address>
+          <ByteObject>0</ByteObject>
+          <HtxType>0</HtxType>
+          <ManyObjects>0</ManyObjects>
+          <SizeOfObject>0</SizeOfObject>
+          <BreakByAccess>0</BreakByAccess>
+          <BreakIfRCount>0</BreakIfRCount>
+          <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+          <ExecCommand></ExecCommand>
+          <Expression></Expression>
+        </Bp>
+      </Breakpoint>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name>-T0</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4b</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4b\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name>-T0</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint>
+        <Bp>
+          <Number>0</Number>
+          <Type>0</Type>
+          <LineNumber>184</LineNumber>
+          <EnabledFlag>1</EnabledFlag>
+          <Address>0</Address>
+          <ByteObject>0</ByteObject>
+          <HtxType>0</HtxType>
+          <ManyObjects>0</ManyObjects>
+          <SizeOfObject>0</SizeOfObject>
+          <BreakByAccess>0</BreakByAccess>
+          <BreakIfRCount>0</BreakIfRCount>
+          <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+          <ExecCommand></ExecCommand>
+          <Expression></Expression>
+        </Bp>
+      </Breakpoint>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4lf</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4lf\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>PWSTATINFO</Key>
+          <Name>200,50,700</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=151,128,395,676,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name>-T0</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4bf</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4bf\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name>-T0</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint>
+        <Bp>
+          <Number>0</Number>
+          <Type>0</Type>
+          <LineNumber>184</LineNumber>
+          <EnabledFlag>1</EnabledFlag>
+          <Address>0</Address>
+          <ByteObject>0</ByteObject>
+          <HtxType>0</HtxType>
+          <ManyObjects>0</ManyObjects>
+          <SizeOfObject>0</SizeOfObject>
+          <BreakByAccess>0</BreakByAccess>
+          <BreakIfRCount>0</BreakIfRCount>
+          <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+          <ExecCommand></ExecCommand>
+          <Expression></Expression>
+        </Bp>
+      </Breakpoint>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name>-T0</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint>
+        <Bp>
+          <Number>0</Number>
+          <Type>0</Type>
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+              <FilePath>..\..\..\Source\SupportFunctions\SupportFunctions.c</FilePath>
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+              <FileType>1</FileType>
+              <FilePath>..\..\..\Source\TransformFunctions\TransformFunctions.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Ref_Lib Files</GroupName>
+          <Files>
+            <File>
+              <FileName>BasicMathFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\BasicMathFunctions\BasicMathFunctions.c</FilePath>
+            </File>
+            <File>
+              <FileName>ComplexMathFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\ComplexMathFunctions\ComplexMathFunctions.c</FilePath>
+            </File>
+            <File>
+              <FileName>ControllerFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\ControllerFunctions\ControllerFunctions.c</FilePath>
+            </File>
+            <File>
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+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\FastMathFunctions\FastMathFunctions.c</FilePath>
+            </File>
+            <File>
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+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\FilteringFunctions\FilteringFunctions.c</FilePath>
+            </File>
+            <File>
+              <FileName>HelperFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\HelperFunctions\HelperFunctions.c</FilePath>
+            </File>
+            <File>
+              <FileName>Intrinsics_.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\Intrinsics\Intrinsics_.c</FilePath>
+            </File>
+            <File>
+              <FileName>MatrixFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c</FilePath>
+            </File>
+            <File>
+              <FileName>StatisticsFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\StatisticsFunctions\StatisticsFunctions.c</FilePath>
+            </File>
+            <File>
+              <FileName>SupportFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\SupportFunctions\SupportFunctions.c</FilePath>
+            </File>
+            <File>
+              <FileName>TransformFunctions.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\RefLibs\src\TransformFunctions\TransformFunctions.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Startup</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\main.c</FilePath>
+            </File>
+            <File>
+              <FileName>system_generic.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\platform\system_generic.c</FilePath>
+            </File>
+            <File>
+              <FileName>startup_generic.S</FileName>
+              <FileType>2</FileType>
+              <FilePath>..\..\Common\platform\startup_generic.S</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>JTest</GroupName>
+          <Files>
+            <File>
+              <FileName>jtest_cycle.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\JTest\src\jtest_cycle.c</FilePath>
+            </File>
+            <File>
+              <FileName>jtest_fw.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\JTest\src\jtest_fw.c</FilePath>
+            </File>
+            <File>
+              <FileName>jtest_dump_str_segments.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\JTest\src\jtest_dump_str_segments.c</FilePath>
+            </File>
+            <File>
+              <FileName>jtest_trigger_action.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\JTest\src\jtest_trigger_action.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>AllTests</GroupName>
+          <Files>
+            <File>
+              <FileName>all_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\all_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Transform</GroupName>
+          <Files>
+            <File>
+              <FileName>cfft_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\cfft_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>transform_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\transform_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>transform_tests_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\transform_tests_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>cfft_family_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\cfft_family_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>rfft_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\rfft_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>rfft_fast_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\rfft_fast_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>dct4_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\dct4_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>BasicMath</GroupName>
+          <Files>
+            <File>
+              <FileName>basic_math_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\basic_math_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>abs_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\abs_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>basic_math_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\basic_math_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>negate_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\negate_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>add_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\add_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mult_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\mult_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>sub_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\sub_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>dot_prod_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\dot_prod_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>offset_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\offset_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>shift_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\shift_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>scale_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\scale_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>ComplexMath</GroupName>
+          <Files>
+            <File>
+              <FileName>complex_math_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\complex_math_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>complex_math_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\complex_math_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_conj_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_conj_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mag_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mag_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mag_squared_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_dot_prod_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mult_cmplx_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mult_real_test.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Controller</GroupName>
+          <Files>
+            <File>
+              <FileName>controller_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\controller_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>pid_reset_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\pid_reset_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>sin_cos_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\sin_cos_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>pid_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\pid_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>controller_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\controller_test_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>FastMath</GroupName>
+          <Files>
+            <File>
+              <FileName>fast_math_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>fast_math_tests_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Filtering</GroupName>
+          <Files>
+            <File>
+              <FileName>filtering_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\filtering_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>filtering_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\filtering_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>biquad_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\biquad_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>conv_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\conv_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>correlate_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\correlate_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>fir_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\fir_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>iir_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\iir_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>lms_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\lms_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Matrix</GroupName>
+          <Files>
+            <File>
+              <FileName>matrix_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\matrix_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>matrix_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\matrix_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_cmplx_mult_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_add_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_add_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_mult_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_mult_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_mult_fast_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_mult_fast_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_sub_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_sub_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_inverse_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_inverse_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_trans_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_trans_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_init_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_init_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_scale_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_scale_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Statistics</GroupName>
+          <Files>
+            <File>
+              <FileName>max_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\max_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>statistics_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\statistics_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>statistics_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\statistics_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>mean_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\mean_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>min_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\min_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>power_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\power_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>rms_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\rms_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>std_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\std_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>var_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\var_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Support</GroupName>
+          <Files>
+            <File>
+              <FileName>copy_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\copy_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>support_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\support_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>support_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\support_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>fill_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\fill_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>x_to_y_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\x_to_y_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Intrinsics</GroupName>
+          <Files>
+            <File>
+              <FileName>intrinsics_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>intrinsics_tests_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>MathHelper</GroupName>
+          <Files>
+            <File>
+              <FileName>math_helper.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\math_helper.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARMCLANG/Logs/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARMCLANG/Logs/.gitignore
new file mode 100644
index 0000000..5e7d273
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARMCLANG/Logs/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# Except this file
+!.gitignore
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/GCC/DspLibTest_Simulator.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/GCC/DspLibTest_Simulator.uvoptx
new file mode 100644
index 0000000..a0396d8
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/GCC/DspLibTest_Simulator.uvoptx
@@ -0,0 +1,3509 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>cortexM0l</TargetName>
+    <ToolsetNumber>0x3</ToolsetNumber>
+    <ToolsetName>ARM-GNU</ToolsetName>
+    <TargetOption>
+      <CLKARM>12000000</CLKARM>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
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+      <OPTLEX>
+        <PageWidth>120</PageWidth>
+        <PageLength>65</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM0l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
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new file mode 100644
index 0000000..7c686d1
--- /dev/null
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+            <File>
+              <FileName>startup_generic.S</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\platform\startup_generic.S</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>JTest</GroupName>
+          <Files>
+            <File>
+              <FileName>jtest_cycle.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\JTest\src\jtest_cycle.c</FilePath>
+            </File>
+            <File>
+              <FileName>jtest_fw.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\JTest\src\jtest_fw.c</FilePath>
+            </File>
+            <File>
+              <FileName>jtest_dump_str_segments.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\JTest\src\jtest_dump_str_segments.c</FilePath>
+            </File>
+            <File>
+              <FileName>jtest_trigger_action.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\JTest\src\jtest_trigger_action.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>AllTests</GroupName>
+          <Files>
+            <File>
+              <FileName>all_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\all_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Transform</GroupName>
+          <Files>
+            <File>
+              <FileName>cfft_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\cfft_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>transform_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\transform_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>transform_tests_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\transform_tests_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>cfft_family_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\cfft_family_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>rfft_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\rfft_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>rfft_fast_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\rfft_fast_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>dct4_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\transform_tests\dct4_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>BasicMath</GroupName>
+          <Files>
+            <File>
+              <FileName>basic_math_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\basic_math_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>abs_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\abs_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>basic_math_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\basic_math_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>negate_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\negate_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>add_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\add_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mult_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\mult_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>sub_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\sub_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>dot_prod_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\dot_prod_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>offset_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\offset_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>shift_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\shift_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>scale_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\basic_math_tests\scale_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>ComplexMath</GroupName>
+          <Files>
+            <File>
+              <FileName>complex_math_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\complex_math_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>complex_math_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\complex_math_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_conj_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_conj_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mag_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mag_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mag_squared_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_dot_prod_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mult_cmplx_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mult_real_test.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Controller</GroupName>
+          <Files>
+            <File>
+              <FileName>controller_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\controller_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>pid_reset_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\pid_reset_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>sin_cos_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\sin_cos_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>pid_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\pid_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>controller_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\controller_tests\controller_test_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>FastMath</GroupName>
+          <Files>
+            <File>
+              <FileName>fast_math_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>fast_math_tests_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Filtering</GroupName>
+          <Files>
+            <File>
+              <FileName>filtering_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\filtering_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>filtering_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\filtering_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>biquad_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\biquad_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>conv_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\conv_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>correlate_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\correlate_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>fir_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\fir_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>iir_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\iir_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>lms_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\filtering_tests\lms_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Matrix</GroupName>
+          <Files>
+            <File>
+              <FileName>matrix_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\matrix_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>matrix_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\matrix_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_cmplx_mult_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_add_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_add_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_mult_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_mult_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_mult_fast_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_mult_fast_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_sub_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_sub_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_inverse_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_inverse_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_trans_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_trans_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_init_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_init_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_scale_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\matrix_tests\mat_scale_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Statistics</GroupName>
+          <Files>
+            <File>
+              <FileName>max_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\max_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>statistics_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\statistics_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>statistics_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\statistics_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>mean_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\mean_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>min_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\min_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>power_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\power_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>rms_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\rms_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>std_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\std_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>var_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\var_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Support</GroupName>
+          <Files>
+            <File>
+              <FileName>copy_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\copy_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>support_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\support_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>support_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\support_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>fill_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\fill_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>x_to_y_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\x_to_y_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Intrinsics</GroupName>
+          <Files>
+            <File>
+              <FileName>intrinsics_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>intrinsics_tests_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>MathHelper</GroupName>
+          <Files>
+            <File>
+              <FileName>math_helper.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\math_helper.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/GCC/Logs/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/GCC/Logs/.gitignore
new file mode 100644
index 0000000..5e7d273
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/GCC/Logs/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# Except this file
+!.gitignore
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARM/DspLibTest_Simulator.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARM/DspLibTest_Simulator.uvoptx
index 6f982a6..3599739 100644
--- a/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARM/DspLibTest_Simulator.uvoptx
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARM/DspLibTest_Simulator.uvoptx
@@ -101,6 +101,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -175,6 +177,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -258,6 +264,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -349,6 +357,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -432,6 +444,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -506,6 +520,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -589,6 +607,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -680,6 +700,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -763,6 +787,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -854,6 +880,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -937,6 +967,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1028,6 +1060,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1111,6 +1147,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1185,6 +1223,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1268,6 +1310,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1359,6 +1403,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1442,6 +1490,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1533,6 +1583,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1616,6 +1670,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1707,6 +1763,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARM/DspLibTest_Simulator.uvprojx b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARM/DspLibTest_Simulator.uvprojx
index c243680..c0b17be 100644
--- a/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARM/DspLibTest_Simulator.uvprojx
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARM/DspLibTest_Simulator.uvprojx
@@ -11,11 +11,12 @@
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
       <pCCUsed>5060020::V5.06 (build 20)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM0</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -183,6 +184,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -323,6 +325,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -333,9 +336,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM0</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -350,8 +353,8 @@
             <useXO>0</useXO>
             <uClangAs>0</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM0</MiscControls>
-              <Define>ARM_MATH_CM0</Define>
+              <MiscControls>--cpreproc --cpreproc_opts=-D,ARMCM0</MiscControls>
+              <Define>ARMCM0</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -366,7 +369,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>..\..\Common\platform\ARMCC\armcc5_arm.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -853,11 +856,12 @@
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
       <pCCUsed>5060020::V5.06 (build 20)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM0</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -1025,6 +1029,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -1165,6 +1170,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -1175,9 +1181,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM0, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -1192,8 +1198,8 @@
             <useXO>0</useXO>
             <uClangAs>0</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM0</MiscControls>
-              <Define>ARM_MATH_CM0</Define>
+              <MiscControls>--cpreproc --cpreproc_opts=-D,ARMCM0</MiscControls>
+              <Define>ARMCM0</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -1208,7 +1214,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>..\..\Common\platform\ARMCC\armcc5_arm.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -1695,11 +1701,12 @@
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
       <pCCUsed>5060020::V5.06 (build 20)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM3</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -1867,6 +1874,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -2007,6 +2015,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -2017,9 +2026,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM3</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -2034,8 +2043,8 @@
             <useXO>0</useXO>
             <uClangAs>0</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM3</MiscControls>
-              <Define>ARM_MATH_CM3</Define>
+              <MiscControls>--cpreproc --cpreproc_opts=-D,ARMCM3</MiscControls>
+              <Define>ARMCM3</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -2050,7 +2059,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>..\..\Common\platform\ARMCC\armcc5_arm.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -2537,11 +2546,12 @@
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
       <pCCUsed>5060020::V5.06 (build 20)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM3</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -2709,6 +2719,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -2849,6 +2860,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -2859,9 +2871,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM3,ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -2876,8 +2888,8 @@
             <useXO>0</useXO>
             <uClangAs>0</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM3</MiscControls>
-              <Define>ARM_MATH_CM3</Define>
+              <MiscControls>--cpreproc --cpreproc_opts=-D,ARMCM3</MiscControls>
+              <Define>ARMCM3</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -2892,7 +2904,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>..\..\Common\platform\ARMCC\armcc5_arm.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -3379,11 +3391,12 @@
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
       <pCCUsed>5060020::V5.06 (build 20)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -3551,6 +3564,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -3691,6 +3705,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -3701,9 +3716,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM4</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -3718,8 +3733,8 @@
             <useXO>0</useXO>
             <uClangAs>0</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM4</MiscControls>
-              <Define>ARM_MATH_CM4</Define>
+              <MiscControls>--cpreproc --cpreproc_opts=-D,ARMCM4</MiscControls>
+              <Define>ARMCM4</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -3734,7 +3749,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>..\..\Common\platform\ARMCC\armcc5_arm.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -4221,11 +4236,12 @@
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
       <pCCUsed>5060020::V5.06 (build 20)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -4393,6 +4409,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -4533,6 +4550,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -4543,9 +4561,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM4, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -4560,8 +4578,8 @@
             <useXO>0</useXO>
             <uClangAs>0</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM4</MiscControls>
-              <Define>ARM_MATH_CM4</Define>
+              <MiscControls>--cpreproc --cpreproc_opts=-D,ARMCM4</MiscControls>
+              <Define>ARMCM4</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -4576,7 +4594,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>..\..\Common\platform\ARMCC\armcc5_arm.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -5062,12 +5080,13 @@
       <TargetName>cortexM4lf</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4_FP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -5235,6 +5254,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -5375,6 +5395,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -5385,9 +5406,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM4 __FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -5402,8 +5423,8 @@
             <useXO>0</useXO>
             <uClangAs>0</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM4</MiscControls>
-              <Define>ARM_MATH_CM4</Define>
+              <MiscControls>--cpreproc --cpreproc_opts=-D,ARMCM4</MiscControls>
+              <Define>ARMCM4</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -5418,7 +5439,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>..\..\Common\platform\ARMCC\armcc5_arm.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -5905,11 +5926,12 @@
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
       <pCCUsed>5060020::V5.06 (build 20)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4_FP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -6077,6 +6099,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -6217,6 +6240,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -6227,9 +6251,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM4,ARM_MATH_BIG_ENDIAN, __FPU_PRESENT=1U</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -6244,8 +6268,8 @@
             <useXO>0</useXO>
             <uClangAs>0</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM4</MiscControls>
-              <Define>ARM_MATH_CM4</Define>
+              <MiscControls>--cpreproc --cpreproc_opts=-D,ARMCM4</MiscControls>
+              <Define>ARMCM4</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -6260,7 +6284,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>..\..\Common\platform\ARMCC\armcc5_arm.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -6747,11 +6771,12 @@
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
       <pCCUsed>5060020::V5.06 (build 20)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -6919,6 +6944,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -7059,6 +7085,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -7069,9 +7096,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM7</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -7086,8 +7113,8 @@
             <useXO>0</useXO>
             <uClangAs>0</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM7</MiscControls>
-              <Define>ARM_MATH_CM7</Define>
+              <MiscControls>--cpreproc --cpreproc_opts=-D,ARMCM7</MiscControls>
+              <Define>ARMCM7</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -7102,7 +7129,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>..\..\Common\platform\ARMCC\armcc5_arm.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -7589,11 +7616,12 @@
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
       <pCCUsed>5060020::V5.06 (build 20)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -7761,6 +7789,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -7901,6 +7930,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -7911,9 +7941,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM7, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -7928,8 +7958,8 @@
             <useXO>0</useXO>
             <uClangAs>0</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM7</MiscControls>
-              <Define>ARM_MATH_CM7</Define>
+              <MiscControls>--cpreproc --cpreproc_opts=-D,ARMCM7</MiscControls>
+              <Define>ARMCM7</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -7944,7 +7974,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile></ScatterFile>
+            <ScatterFile>..\..\Common\platform\ARMCC\armcc5_arm.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARMCLANG/DspLibTest_Simulator.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARMCLANG/DspLibTest_Simulator.uvoptx
new file mode 100644
index 0000000..0092179
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARMCLANG/DspLibTest_Simulator.uvoptx
@@ -0,0 +1,2829 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>cortexM0l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM0l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=880,228,1280,657,0)(1007=1093,261,1280,477,0)(1008=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name>-T0</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM0b</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM0b\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name>-T0</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint>
+        <Bp>
+          <Number>0</Number>
+          <Type>0</Type>
+          <LineNumber>184</LineNumber>
+          <EnabledFlag>1</EnabledFlag>
+          <Address>0</Address>
+          <ByteObject>0</ByteObject>
+          <HtxType>0</HtxType>
+          <ManyObjects>0</ManyObjects>
+          <SizeOfObject>0</SizeOfObject>
+          <BreakByAccess>0</BreakByAccess>
+          <BreakIfRCount>0</BreakIfRCount>
+          <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+          <ExecCommand></ExecCommand>
+          <Expression></Expression>
+        </Bp>
+      </Breakpoint>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM3l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM3l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=1744,166,1978,703,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name>-T0</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM3b</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM3b\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name>-T0</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint>
+        <Bp>
+          <Number>0</Number>
+          <Type>0</Type>
+          <LineNumber>184</LineNumber>
+          <EnabledFlag>1</EnabledFlag>
+          <Address>0</Address>
+          <ByteObject>0</ByteObject>
+          <HtxType>0</HtxType>
+          <ManyObjects>0</ManyObjects>
+          <SizeOfObject>0</SizeOfObject>
+          <BreakByAccess>0</BreakByAccess>
+          <BreakIfRCount>0</BreakIfRCount>
+          <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+          <ExecCommand></ExecCommand>
+          <Expression></Expression>
+        </Bp>
+      </Breakpoint>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name>-T0</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4b</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4b\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name>-T0</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint>
+        <Bp>
+          <Number>0</Number>
+          <Type>0</Type>
+          <LineNumber>184</LineNumber>
+          <EnabledFlag>1</EnabledFlag>
+          <Address>0</Address>
+          <ByteObject>0</ByteObject>
+          <HtxType>0</HtxType>
+          <ManyObjects>0</ManyObjects>
+          <SizeOfObject>0</SizeOfObject>
+          <BreakByAccess>0</BreakByAccess>
+          <BreakIfRCount>0</BreakIfRCount>
+          <Filename>D:\CMSIS\CMSIS_Setup_V4.xx\CMSIS\DSP_Lib_TestSuit\Common\platform\ARM\startup_armv7-m.s</Filename>
+          <ExecCommand></ExecCommand>
+          <Expression></Expression>
+        </Bp>
+      </Breakpoint>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4lf</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4lf\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>0</sRbreak>
+        <sRwatch>0</sRwatch>
+        <sRmem>0</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>0</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>0</tGomain>
+        <tRbreak>0</tRbreak>
+        <tRwatch>0</tRwatch>
+        <tRmem>0</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>0</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>0</sRSysVw>
+        <tRSysVw>0</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>..\..\Common\JTest\jtest_Simulator.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>PWSTATINFO</Key>
+          <Name>200,50,700</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-U -O142 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGDARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=151,128,395,676,0)(1012=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name>-T0</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4bf</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4bf\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
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+              <FileName>statistics_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\statistics_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>statistics_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\statistics_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>mean_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\mean_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>min_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\min_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>power_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\power_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>rms_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\rms_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>std_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\std_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>var_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\statistics_tests\var_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Support</GroupName>
+          <Files>
+            <File>
+              <FileName>copy_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\copy_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>support_test_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\support_test_common_data.c</FilePath>
+            </File>
+            <File>
+              <FileName>support_test_group.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\support_test_group.c</FilePath>
+            </File>
+            <File>
+              <FileName>fill_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\fill_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>x_to_y_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\support_tests\x_to_y_tests.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Intrinsics</GroupName>
+          <Files>
+            <File>
+              <FileName>intrinsics_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>intrinsics_tests_common_data.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>MathHelper</GroupName>
+          <Files>
+            <File>
+              <FileName>math_helper.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Common\src\math_helper.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARMCLANG/Lib/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARMCLANG/Lib/.gitignore
new file mode 100644
index 0000000..5e7d273
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARMCLANG/Lib/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# Except this file
+!.gitignore
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARMCLANG/Logs/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARMCLANG/Logs/.gitignore
new file mode 100644
index 0000000..5e7d273
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARMCLANG/Logs/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# Except this file
+!.gitignore
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvoptx
index ccc34c2..b703132 100644
--- a/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvoptx
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvoptx
@@ -101,6 +101,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -175,6 +177,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -258,6 +264,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -438,6 +446,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -521,6 +533,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -595,6 +609,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -678,6 +696,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -891,6 +911,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -974,6 +998,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1048,6 +1074,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1131,6 +1161,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1306,6 +1338,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1389,6 +1425,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1416,7 +1454,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>DLGDARM</Key>
-          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=2393,275,2627,812,0)(1012=-1,-1,-1,-1,0)</Name>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=1046,183,1280,720,0)(1012=-1,-1,-1,-1,0)</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -1463,6 +1501,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1546,6 +1588,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1724,6 +1768,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1807,6 +1855,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1881,6 +1931,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1964,6 +2018,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2139,6 +2195,10 @@
       <pszMrule></pszMrule>
       <pSingCmds></pSingCmds>
       <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvprojx b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvprojx
index 033eba8..564f2ef 100644
--- a/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvprojx
+++ b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvprojx
@@ -10,11 +10,12 @@
       <TargetName>cortexM0l</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM0</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -166,6 +167,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -238,9 +240,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM0</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -248,7 +250,7 @@
             <interw>0</interw>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM0</Define>
+              <Define>ARMCM0</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -734,11 +736,12 @@
       <TargetName>cortexM0b</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM0</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -890,6 +893,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -962,9 +966,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM0 ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -972,7 +976,7 @@
             <interw>0</interw>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM0</Define>
+              <Define>ARMCM0</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -1458,11 +1462,12 @@
       <TargetName>cortexM3l</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM3</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -1614,6 +1619,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -1686,9 +1692,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM3</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -1696,7 +1702,7 @@
             <interw>0</interw>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM3</Define>
+              <Define>ARMCM3</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -2182,11 +2188,12 @@
       <TargetName>cortexM3b</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM3</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -2338,6 +2345,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -2410,9 +2418,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM3,ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -2420,7 +2428,7 @@
             <interw>0</interw>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM3</Define>
+              <Define>ARMCM3</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -2906,11 +2914,12 @@
       <TargetName>cortexM4l</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -3062,6 +3071,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -3134,9 +3144,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM4</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -3144,7 +3154,7 @@
             <interw>0</interw>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM4</Define>
+              <Define>ARMCM4</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -3630,11 +3640,12 @@
       <TargetName>cortexM4b</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -3786,6 +3797,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -3858,9 +3870,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM4, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -3868,7 +3880,7 @@
             <interw>0</interw>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM4</Define>
+              <Define>ARMCM4</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -4354,11 +4366,12 @@
       <TargetName>cortexM4lf</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4_FP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -4510,6 +4523,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -4582,9 +4596,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_CM4 __FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -4592,7 +4606,7 @@
             <interw>0</interw>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM4</Define>
+              <Define>ARMCM4</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -5078,11 +5092,12 @@
       <TargetName>cortexM4bf</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4_FP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -5234,6 +5249,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -5306,9 +5322,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_CM4,ARM_MATH_BIG_ENDIAN, __FPU_PRESENT=1U</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -5316,7 +5332,7 @@
             <interw>0</interw>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM4</Define>
+              <Define>ARMCM4</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -5802,11 +5818,12 @@
       <TargetName>cortexM7l</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -5958,6 +5975,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -6030,9 +6048,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM7</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -6040,7 +6058,7 @@
             <interw>0</interw>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM7</Define>
+              <Define>ARMCM7</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -6526,11 +6544,12 @@
       <TargetName>cortexM7b</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.1-dev6</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -6682,6 +6701,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -6754,9 +6774,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM7, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -6764,7 +6784,7 @@
             <interw>0</interw>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM7</Define>
+              <Define>ARMCM7</Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
diff --git a/DSP/DSP_Lib_TestSuite/HowTo.txt b/DSP/DSP_Lib_TestSuite/HowTo.txt
index 1e51404..41ca5a6 100644
--- a/DSP/DSP_Lib_TestSuite/HowTo.txt
+++ b/DSP/DSP_Lib_TestSuite/HowTo.txt
@@ -1,4 +1,4 @@
-HowTo DSP_Lib_TestSuite     16.12.2016
+HowTo DSP_Lib_TestSuite     18.02.2019
 =======================================
 
 This file describes the folder structure, content, prerequisites and instructions to validate the
@@ -34,17 +34,10 @@
 
 Setup
 ------
- - Copy DSP_Lib_TestSuite to the CMSIS installation/pack folder.
-      ...
-      .\Keil_v5\ARM\PACK\ARM\CMSIS\DSP_Lib
-      .\Keil_v5\ARM\PACK\ARM\CMSIS\DSP_Lib_TestSuite                <- location of DSP_Lib_TestSuite
-      .\Keil_v5\ARM\PACK\ARM\CMSIS\Include
-      ...
-
- - remove 'read-only' tag from folder ./CMSIS/Lib
+ - remove 'read-only' tag from folder .\CMSIS\DSP\Lib
    (required for rebuild of the DSP_Lib libraries)
 
- - open a Windows command window in folder .\CMSIS\DSP_Lib_TestSuite.
+ - open a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite.
 
 
 
@@ -54,23 +47,23 @@
 a) build the DSP_Lib libraries:
  - batch file: buildDspLibs.bat 
    Note: only require if the DSP_Lib source code got updated or the desired configuration is missing
-   buildDspLibs.bat overwrites the prebuild libraries in .\CMSIS\Lib.
-   Log files of the build process are generated in folder .\CMSIS\DSP_Lib/[ARM|GCC]
- - run:  buildDspLibs.bat in a Windows command window in folder ./CMSIS/DSP_Lib_TestSuite
+   buildDspLibs.bat overwrites the prebuild libraries in .\CMSIS\DSP\Lib.
+   Log files of the build process are generated in folder .\CMSIS\DSP\DSP_Lib/[ARM|GCC]
+ - run:  buildDspLibs.bat in a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite
          buildDspLibs ARM        -> builds the ARMCC libraries
          buildDspLibs GCC        -> builds the GCC libraries
 
 b) build the reference libraries:
  - batch file: buildRefLibs.bat
    
-   Log files of the build process are generated in folder .\CMSIS\DSP_Lib_TestSuite\RefLibs/[ARM|GCC]
- - run: buildRefLibs.bat in a Windows command window in folder .\CMSIS\DSP_Lib_TestSuite
+   Log files of the build process are generated in folder .\CMSIS\DSP\DSP_Lib_TestSuite\RefLibs/[ARM|GCC]
+ - run: buildRefLibs.bat in a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite
         buildRefLibs ARM        -> builds the ARMCC reference libraries
         buildRefLibs GCC        -> builds the GCC reference libraries
 
 c) running an individual test using uVision (MDK-ARM):
  - batch file: runTest.bat
- - run:  runTest.bat in a Windows command window in folder .\CMSIS\DSP_Lib_TestSuite
+ - run:  runTest.bat in a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite
          runTest                                -> prints usage information
     e.g. runTest ARM cortexM4lf Simulator       -> runs the test for toolchain ARM, Cortex-M4 littel endian with FPU, uVision Simulator.
 
@@ -78,7 +71,7 @@
 
 d) parsing the test output log file
  - script: parseLog.py 
- - run:  parseLog.py python script in a Windows command window in folder .\CMSIS\DSP_Lib_TestSuite
+ - run:  parseLog.py python script in a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite
    command line options should match the invocation of the runTest executed before.
    e.g: runTest ARM cortexM4lf Simulator  ->  python parseLog.py ARM cortexM4lf Simulator
    
@@ -118,15 +111,15 @@
 
 How to select tests for "run all tests"
 ----------------------------------------
- - edit .\CMSIS\DSP_Lib_TestSuite\Common\src\all_tests.c
+ - edit .\CMSIS\DSP\DSP_Lib_TestSuite\Common\src\all_tests.c
    comment out all unwanted test groups.
    e.g.  //    JTEST_GROUP_CALL(complex_math_tests);
 
- - edit .\CMSIS\DSP_Lib_TestSuite\Common\src\<test group>/<test group>_group.c
+ - edit .\CMSIS\DSP\DSP_Lib_TestSuite\Common\src\<test group>/<test group>_group.c
    comment out all unwanted sub test groups.
    e.g. file .\DSP_Lib_TestSuite\Common\src\basic_math_tests\basic_math_test_group.c ->  //    JTEST_GROUP_CALL(abs_tests);
 
- - edit .\CMSIS\DSP_Lib_TestSuite\Common\src\<test group>/<test>_tests.c
+ - edit .\CMSIS\DSP\DSP_Lib_TestSuite\Common\src\<test group>/<test>_tests.c
    comment out all unwanted tests.
    e.g. file .\DSP_Lib_TestSuite\Common\src\basic_math_tests\abs_tests.c  ->  //    JTEST_TEST_CALL(arm_abs_f32_test);
 
diff --git a/DSP/DSP_Lib_TestSuite/HowTo_SV.txt b/DSP/DSP_Lib_TestSuite/HowTo_SV.txt
new file mode 100644
index 0000000..ccf7531
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/HowTo_SV.txt
@@ -0,0 +1,117 @@
+HowTo DSP_Lib_TestSuite  (Source Variant)   18.02.2019
+======================================================
+
+This file describes the folder structure, content, prerequisites and instructions to validate the
+build of the CMSIS-DSP library. This is done by processing input data sets using the DSP Library
+functions executing on a target simulator or hardware. The output data sets are then compared 
+with the reference data set produced by unoptimized DSP functions and a Signal to Noise Ratio (SNR)
+is computed. If the SNR is below a defined threshold the test is considered "passed".
+
+
+Folder structure
+----------------
+	.\DSP_Lib_TestSuite                                       Batch files for building the reference libraries and running the tests.
+	.\DSP_Lib_TestSuite\Common
+	.\DSP_Lib_TestSuite\Common\inc                            DSP_Lib test include files
+	.\DSP_Lib_TestSuite\Common\JTest                          JTEST Test Framework + INI files for uVision
+	.\DSP_Lib_TestSuite\Common\platform                       ARM/GCC device startup/system files
+	.\DSP_Lib_TestSuite\Common\src                            DSP_Lib test source files
+	.\DSP_Lib_TestSuite\DspLibTest_FVP                        ARM/GCC DSP_Lib test projects for Fixed Virtual Platforms
+	.\DSP_Lib_TestSuite\DspLibTest_MPS2                       ARM/GCC DSP_Lib test projects for MPS2
+	.\DSP_Lib_TestSuite\DspLibTest_Simulator                  ARM/GCC DSP_Lib test projects for uVision simulator
+	.\DSP_Lib_TestSuite\RefLibs                               ARM/GCC DSP_Lib reference libraries (and projects)
+
+
+
+Prerequisites
+--------------
+ - Python (running on Windows). Tested with ActivePython 2.7.8.10.
+ - Keil MDK-ARM (tested with MDK-ARM 5.22: http://www2.keil.com/mdk5)
+ - ULINKpro debug adapter (http://www2.keil.com/mdk5/ulink)
+ - MPS2 (Cortex-M Prototyping System:https://www.arm.com/products/tools/development-boards/versatile-express/cortex-m-prototyping-system.php)
+ - CMSIS 5.0.0 (https://github.com/ARM-software/CMSIS_5/releases/tag/5.0.0)
+
+
+Setup
+------
+ - open a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite.
+
+
+
+How to run the tests
+---------------------
+
+a) running an individual test using uVision (MDK-ARM):
+ - batch file: runTest_SV.bat
+ - run:  runTest_SV.bat in a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite
+         runTest_SV                                -> prints usage information
+    e.g. runTest_SV ARM cortexM4lf Simulator       -> runs the test for toolchain ARM, Cortex-M4 littel endian with FPU, uVision Simulator.
+
+   Tests running on MPS2 requires additional steps to setup. See section 'MPS2'.
+
+d) parsing the test output log file
+ - script: parseLog_SV.py 
+ - run:  parseLog_SV.py python script in a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite
+   command line options should match the invocation of the runTest executed before.
+   e.g: runTest ARM cortexM4lf Simulator  ->  python parseLog.py ARM cortexM4lf Simulator
+   
+ - check the test log
+   depending on your test parameters change into the required folder
+      .\DSP_Lib_TestSuite\DspLibTest_[FVP|MPS2|Simulator]\[ARM|GCC]\Logs
+   the folder will contain the following files (e.g. for a 'runTest') :
+       DspLibTest_Simulator.log                    raw result of the last test run.
+       DspLibTest_Simulator_cortexM4lf.log         raw result of a cortexM4lf test run
+       DspLibTest_Simulator_cortexM4lf_build.log   build result of cortexM4lf test
+       DspLibTest_Simulator_cortexM4lf_parsed.log  parsed log of raw result of a cortexM4lf test run
+       DspLibTest_Simulator_cortexM4lf_time.log    log how long the test took (some tests e.g. M0 take really a long time!).
+   'runTest' produces files of the format:     DspLibTest_<test>_<core>...
+
+
+Differences between the tests for FVP, MPS2, Simulator
+------------------------------------------------------
+ - all tests are identical except for:
+    'Simulator' uses uVision with uVision simulator and generates also code coverage information
+         can be used for little/big endian tests
+         ! do not use 'Simulator' for M7 with FPU      -> no uVision simulation available.
+         ! do not use 'Simulator' for ARMv8-M devices  -> no uVision simulation available.
+    'MPS2' uses uVision with ULINKpro debugger and MPS2. No code coverage information is generated.
+         can be used for little endian only (because of the lack of MPS2 FPGA images).
+    'FVP' uses uVision with Models debugger. No code coverage information is generated.
+         can be used for little/big endian tests.
+         ! config files must be prepared.
+         ! uVision target for big endianess are not yet prepared.
+
+
+Setup 'MPS2'
+-------------
+ - load the appropriate FPGA image to the MPS2 board matching the CPU of the test builds prior to running the test
+ - check if ULINKpro can connect with the configured debug connection (JTAG or SWD) as this must
+   match the protocol implemented in the FPGA image.
+ 
+
+How to select tests for "run all tests"
+----------------------------------------
+ - edit .\CMSIS\DSP\DSP_Lib_TestSuite\Common\src\all_tests.c
+   comment out all unwanted test groups.
+   e.g.  //    JTEST_GROUP_CALL(complex_math_tests);
+
+ - edit .\CMSIS\DSP\DSP_Lib_TestSuite\Common\src\<test group>/<test group>_group.c
+   comment out all unwanted sub test groups.
+   e.g. file .\DSP_Lib_TestSuite\Common\src\basic_math_tests\basic_math_test_group.c ->  //    JTEST_GROUP_CALL(abs_tests);
+
+ - edit .\CMSIS\DSP\DSP_Lib_TestSuite\Common\src\<test group>/<test>_tests.c
+   comment out all unwanted tests.
+   e.g. file .\DSP_Lib_TestSuite\Common\src\basic_math_tests\abs_tests.c  ->  //    JTEST_TEST_CALL(arm_abs_f32_test);
+
+
+Notes
+-----
+ - How to use ARM Clang (ARM Compiler 6):
+   in uVision 'Options for Target' tab you can select which compiler to use
+   by default uVision uses ARMCC V5 for Cortex-M devices and ARMCLANG V6 only for ARMv8M.
+   Only ARMv8M cores have been tested using ARMCLANG
+
+ - test data used for the tests is used as provided by DSP Concepts.
+
+ - some tests run for a very long time before they finish. This is expected
+ 
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/ARM/RefLibs.uvoptx b/DSP/DSP_Lib_TestSuite/RefLibs/ARM/RefLibs.uvoptx
index b45ee7f..a5dd9e8 100644
--- a/DSP/DSP_Lib_TestSuite/RefLibs/ARM/RefLibs.uvoptx
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/ARM/RefLibs.uvoptx
@@ -101,6 +101,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
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@@ -154,11 +156,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -242,6 +249,8 @@
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         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
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@@ -295,11 +304,16 @@
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-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
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+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -383,6 +397,8 @@
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+        <bSchkAxf>0</bSchkAxf>
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@@ -436,11 +452,16 @@
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-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
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+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -524,6 +545,8 @@
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+        <bSchkAxf>0</bSchkAxf>
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@@ -577,11 +600,16 @@
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-      <bLin2Auto>0</bLin2Auto>
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-      <bAuto2GenD>0</bAuto2GenD>
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+      <pszMrule></pszMrule>
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+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
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@@ -665,6 +693,8 @@
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@@ -718,11 +748,16 @@
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-      <bAuto2GenD>0</bAuto2GenD>
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     </TargetOption>
   </Target>
 
@@ -806,6 +841,8 @@
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@@ -859,11 +896,16 @@
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-      <bAuto2GenD>0</bAuto2GenD>
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+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -947,6 +989,8 @@
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+        <bTchkAxf>0</bTchkAxf>
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@@ -1000,11 +1044,16 @@
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-      <bLin2Auto>0</bLin2Auto>
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-      <bAuto2GenD>0</bAuto2GenD>
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@@ -1088,6 +1137,8 @@
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@@ -1141,11 +1192,16 @@
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@@ -1229,6 +1285,8 @@
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@@ -1846,11 +1932,16 @@
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@@ -1934,6 +2025,8 @@
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@@ -1987,11 +2080,16 @@
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-      <bLin2Auto>0</bLin2Auto>
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-      <bAuto2GenD>0</bAuto2GenD>
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@@ -2075,6 +2173,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2133,11 +2233,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2221,6 +2326,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2284,11 +2391,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2372,6 +2484,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2435,11 +2549,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2523,6 +2642,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2586,11 +2707,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2674,6 +2800,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2737,11 +2865,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2825,6 +2958,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2888,11 +3023,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2976,6 +3116,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -3039,11 +3181,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/ARM/RefLibs.uvprojx b/DSP/DSP_Lib_TestSuite/RefLibs/ARM/RefLibs.uvprojx
index 6b3db76..4cd53ae 100644
--- a/DSP/DSP_Lib_TestSuite/RefLibs/ARM/RefLibs.uvprojx
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/ARM/RefLibs.uvprojx
@@ -10,12 +10,13 @@
       <TargetName>cortexM0l</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM0</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -183,6 +184,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -323,6 +325,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -333,9 +336,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM0</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -712,12 +715,13 @@
       <TargetName>cortexM0b</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060417::V5.06 update 4 (build 417)::ARMCC</pCCUsed>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM0</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -885,6 +889,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -1025,6 +1030,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -1035,9 +1041,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM0, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -1414,12 +1420,13 @@
       <TargetName>cortexM3l</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060417::V5.06 update 4 (build 417)::ARMCC</pCCUsed>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM3</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -1587,6 +1594,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -1727,6 +1735,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -1737,9 +1746,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM3</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -2116,12 +2125,13 @@
       <TargetName>cortexM3b</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060417::V5.06 update 4 (build 417)::ARMCC</pCCUsed>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM3</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -2289,6 +2299,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -2429,6 +2440,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -2439,9 +2451,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM3, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -2818,12 +2830,13 @@
       <TargetName>cortexM4l</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060417::V5.06 update 4 (build 417)::ARMCC</pCCUsed>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -2991,6 +3004,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -3131,6 +3145,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -3141,9 +3156,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM4</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -3520,12 +3535,13 @@
       <TargetName>cortexM4b</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060417::V5.06 update 4 (build 417)::ARMCC</pCCUsed>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -3693,6 +3709,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -3833,6 +3850,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -3843,9 +3861,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM4, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -4222,12 +4240,13 @@
       <TargetName>cortexM4lf</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060417::V5.06 update 4 (build 417)::ARMCC</pCCUsed>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4_FP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -4395,6 +4414,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -4535,6 +4555,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -4545,9 +4566,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM4,__FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -4924,12 +4945,13 @@
       <TargetName>cortexM4bf</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060417::V5.06 update 4 (build 417)::ARMCC</pCCUsed>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4_FP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -5097,6 +5119,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -5237,6 +5260,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -5247,9 +5271,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM4,ARM_MATH_BIG_ENDIAN,__FPU_PRESENT=1U</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -5626,12 +5650,13 @@
       <TargetName>cortexM7l</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060417::V5.06 update 4 (build 417)::ARMCC</pCCUsed>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -5799,6 +5824,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -5939,6 +5965,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -5949,9 +5976,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM7</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -6328,12 +6355,13 @@
       <TargetName>cortexM7lfsp</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060417::V5.06 update 4 (build 417)::ARMCC</pCCUsed>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7_SP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -6501,6 +6529,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -6641,6 +6670,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -6651,9 +6681,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM7,__FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -7030,12 +7060,13 @@
       <TargetName>cortexM7lfdp</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060417::V5.06 update 4 (build 417)::ARMCC</pCCUsed>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7_DP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -7203,6 +7234,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>3</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -7343,6 +7375,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -7353,9 +7386,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM7,__FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -7732,12 +7765,13 @@
       <TargetName>cortexM7b</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060417::V5.06 update 4 (build 417)::ARMCC</pCCUsed>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -7905,6 +7939,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -8045,6 +8080,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -8055,9 +8091,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM7, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -8434,12 +8470,13 @@
       <TargetName>cortexM7bfsp</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060417::V5.06 update 4 (build 417)::ARMCC</pCCUsed>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7_SP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -8607,6 +8644,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -8747,6 +8785,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -8757,9 +8796,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM7,ARM_MATH_BIG_ENDIAN,__FPU_PRESENT=1U</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -9136,12 +9175,13 @@
       <TargetName>cortexM7bfdp</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060417::V5.06 update 4 (build 417)::ARMCC</pCCUsed>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7_DP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -9309,6 +9349,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>3</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -9449,6 +9490,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>0</v6Lang>
             <v6LangP>0</v6LangP>
@@ -9459,9 +9501,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM7,ARM_MATH_BIG_ENDIAN,__FPU_PRESENT=1U</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -9838,12 +9880,13 @@
       <TargetName>ARMv8MBLl</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6060000::V6.6::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MBL</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("ARMV8MBL") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -10011,6 +10054,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -10138,32 +10182,33 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>1</Optim>
+            <Optim>2</Optim>
             <oTime>0</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_ARMV8MBL</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -10540,12 +10585,13 @@
       <TargetName>ARMv8MMLl</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6060000::V6.6::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -10713,6 +10759,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <StupSel>8</StupSel>
@@ -10840,39 +10887,40 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>1</Optim>
+            <Optim>2</Optim>
             <oTime>0</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_ARMV8MML</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
             <interw>1</interw>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <thumb>1</thumb>
+            <thumb>0</thumb>
             <SplitLS>0</SplitLS>
             <SwStkChk>0</SwStkChk>
             <NoWarn>0</NoWarn>
@@ -11242,12 +11290,13 @@
       <TargetName>ARMv8MMLlfsp</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6060000::V6.6::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_SP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -11415,6 +11464,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <StupSel>8</StupSel>
@@ -11542,39 +11592,40 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>1</Optim>
+            <Optim>2</Optim>
             <oTime>0</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_ARMV8MML, __FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
             <interw>1</interw>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <thumb>1</thumb>
+            <thumb>0</thumb>
             <SplitLS>0</SplitLS>
             <SwStkChk>0</SwStkChk>
             <NoWarn>0</NoWarn>
@@ -11944,12 +11995,13 @@
       <TargetName>ARMv8MMLlfdp</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6060000::V6.6::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_DP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -12117,6 +12169,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>3</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <StupSel>8</StupSel>
@@ -12244,39 +12297,40 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>1</Optim>
+            <Optim>2</Optim>
             <oTime>0</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_ARMV8MML, __FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
             <interw>1</interw>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <thumb>1</thumb>
+            <thumb>0</thumb>
             <SplitLS>0</SplitLS>
             <SwStkChk>0</SwStkChk>
             <NoWarn>0</NoWarn>
@@ -12646,12 +12700,13 @@
       <TargetName>ARMv8MMLld</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6060000::V6.6::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_DSP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -12819,6 +12874,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <StupSel>8</StupSel>
@@ -12946,39 +13002,40 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>1</Optim>
+            <Optim>2</Optim>
             <oTime>0</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_ARMV8MML, __DSP_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
             <interw>1</interw>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <thumb>1</thumb>
+            <thumb>0</thumb>
             <SplitLS>0</SplitLS>
             <SwStkChk>0</SwStkChk>
             <NoWarn>0</NoWarn>
@@ -13348,12 +13405,13 @@
       <TargetName>ARMv8MMLldfsp</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6060000::V6.6::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_DSP_SP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -13521,6 +13579,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <StupSel>8</StupSel>
@@ -13648,39 +13707,40 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>1</Optim>
+            <Optim>2</Optim>
             <oTime>0</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_ARMV8MML, __DSP_PRESENT=1U, __FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
             <interw>1</interw>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <thumb>1</thumb>
+            <thumb>0</thumb>
             <SplitLS>0</SplitLS>
             <SwStkChk>0</SwStkChk>
             <NoWarn>0</NoWarn>
@@ -14050,12 +14110,13 @@
       <TargetName>ARMv8MMLldfdp</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6060000::V6.6::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_DSP_DP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -14223,6 +14284,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>3</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <StupSel>8</StupSel>
@@ -14350,32 +14412,33 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>1</Optim>
+            <Optim>2</Optim>
             <oTime>0</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_ARMV8MML, __DSP_PRESENT=1U, __FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -14750,4 +14813,10 @@
     </Target>
   </Targets>
 
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
 </Project>
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/ARMCLANG/Lib/.gitignore b/DSP/DSP_Lib_TestSuite/RefLibs/ARMCLANG/Lib/.gitignore
new file mode 100644
index 0000000..5e7d273
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/ARMCLANG/Lib/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# Except this file
+!.gitignore
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/ARMCLANG/RefLibs.uvoptx b/DSP/DSP_Lib_TestSuite/RefLibs/ARMCLANG/RefLibs.uvoptx
new file mode 100644
index 0000000..a5dd9e8
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/ARMCLANG/RefLibs.uvoptx
@@ -0,0 +1,3945 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>cortexM0l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM0l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM0$Device\ARM\Flash\NEW_DEVICE.FLM))</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM0b</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM0b\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM0$Device\ARM\Flash\NEW_DEVICE.FLM))</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM3l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM3l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM3$Device\ARM\Flash\NEW_DEVICE.FLM))</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM3b</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM3b\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM3$Device\ARM\Flash\NEW_DEVICE.FLM))</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM4$Device\ARM\Flash\NEW_DEVICE.FLM))</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4b</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4b\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM4$Device\ARM\Flash\NEW_DEVICE.FLM))</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4lf</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4lf\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM4_FP$Device\ARM\Flash\NEW_DEVICE.FLM))</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM4bf</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM4bf\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM4_FP$Device\ARM\Flash\NEW_DEVICE.FLM))</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7l</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7l\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 )  -FN1 -FC1000 -FD20000000 -FF0NEW_DEVICE -FL080000 -FS00 -FP0($$Device:ARMCM7$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7lfsp</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7lfsp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 )  -FN1 -FC1000 -FD20000000 -FF0NEW_DEVICE -FL080000 -FS00 -FP0($$Device:ARMCM7_SP$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7lfdp</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7lfdp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 )  -FN1 -FC1000 -FD20000000 -FF0NEW_DEVICE -FL080000 -FS00 -FP0($$Device:ARMCM7_DP$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7b</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7b\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 )  -FN1 -FC1000 -FD20000000 -FF0NEW_DEVICE -FL080000 -FS00 -FP0($$Device:ARMCM7$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7bfsp</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7bfsp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 )  -FN1 -FC1000 -FD20000000 -FF0NEW_DEVICE -FL080000 -FS00 -FP0($$Device:ARMCM7_SP$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>cortexM7bfdp</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\cortexM7bfdp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>1</uSim>
+        <uTrg>0</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>0</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 )  -FN1 -FC1000 -FD20000000 -FF0NEW_DEVICE -FL080000 -FS00 -FP0($$Device:ARMCM7_DP$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MBLl</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MBLl\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>13</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2V8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM0$Device\ARM\Flash\NEW_DEVICE.FLM))</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MMLl</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MMLl\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>13</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2V8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ULP2V8M</Key>
+          <Name>-UAny -O206 -S0 -C0 -P00 -TO18 -TC10000000 -TP18 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE.FLM -FS00 -FL040000 -FP0($$Device:ARMCM0$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>-U -O14 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7  -FC1000 -FD20000000</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM0$Device\ARM\Flash\NEW_DEVICE.FLM))</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MMLlfsp</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MMLlfsp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>13</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2V8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ULP2V8M</Key>
+          <Name>-UAny -O206 -S0 -C0 -P00 -TO18 -TC10000000 -TP18 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE.FLM -FS00 -FL040000 -FP0($$Device:ARMCM0$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>-U -O14 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7  -FC1000 -FD20000000</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM0$Device\ARM\Flash\NEW_DEVICE.FLM))</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MMLlfdp</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MMLlfdp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>13</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2V8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ULP2V8M</Key>
+          <Name>-UAny -O206 -S0 -C0 -P00 -TO18 -TC10000000 -TP18 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE.FLM -FS00 -FL040000 -FP0($$Device:ARMCM0$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>-U -O14 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7  -FC1000 -FD20000000</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM0$Device\ARM\Flash\NEW_DEVICE.FLM))</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MMLld</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MMLld\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>13</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2V8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ULP2V8M</Key>
+          <Name>-UAny -O206 -S0 -C0 -P00 -TO18 -TC10000000 -TP18 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE.FLM -FS00 -FL040000 -FP0($$Device:ARMCM0$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>-U -O14 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7  -FC1000 -FD20000000</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM0$Device\ARM\Flash\NEW_DEVICE.FLM))</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Target>
+    <TargetName>ARMv8MMLldfsp</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\IntermediateFiles\ARMv8MMLldfsp\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>0</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>0</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>0</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>13</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2V8M.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ULP2V8M</Key>
+          <Name>-UAny -O206 -S0 -C0 -P00 -TO18 -TC10000000 -TP18 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE.FLM -FS00 -FL040000 -FP0($$Device:ARMCM0$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2V8M</Key>
+          <Name>-U -O14 -S0 -C0 -P00 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7  -FC1000 -FD20000000</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
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index 0000000..ee20804
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+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x200000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x200000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x200000</StartAddress>
+                <Size>0x200000</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x20200000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>2</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>3</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>0</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>0</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x00000000</TextAddressRange>
+            <DataAddressRange>0x00000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile></ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>BasicMathFunctions</GroupName>
+          <Files>
+            <File>
+              <FileName>abs.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\BasicMathFunctions\abs.c</FilePath>
+            </File>
+            <File>
+              <FileName>add.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\BasicMathFunctions\add.c</FilePath>
+            </File>
+            <File>
+              <FileName>dot_prod.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\BasicMathFunctions\dot_prod.c</FilePath>
+            </File>
+            <File>
+              <FileName>mult.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\BasicMathFunctions\mult.c</FilePath>
+            </File>
+            <File>
+              <FileName>negate.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\BasicMathFunctions\negate.c</FilePath>
+            </File>
+            <File>
+              <FileName>offset.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\BasicMathFunctions\offset.c</FilePath>
+            </File>
+            <File>
+              <FileName>scale.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\BasicMathFunctions\scale.c</FilePath>
+            </File>
+            <File>
+              <FileName>shift.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\BasicMathFunctions\shift.c</FilePath>
+            </File>
+            <File>
+              <FileName>sub.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\BasicMathFunctions\sub.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>ComplexMathFunctions</GroupName>
+          <Files>
+            <File>
+              <FileName>cmplx_conj.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\ComplexMathFunctions\cmplx_conj.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_dot_prod.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\ComplexMathFunctions\cmplx_dot_prod.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mag.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\ComplexMathFunctions\cmplx_mag.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mag_squared.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\ComplexMathFunctions\cmplx_mag_squared.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mult_cmplx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\ComplexMathFunctions\cmplx_mult_cmplx.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmplx_mult_real.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\ComplexMathFunctions\cmplx_mult_real.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>ControllerFunctions</GroupName>
+          <Files>
+            <File>
+              <FileName>sin_cos.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\ControllerFunctions\sin_cos.c</FilePath>
+            </File>
+            <File>
+              <FileName>pid.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\ControllerFunctions\pid.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>FastMathFunctions</GroupName>
+          <Files>
+            <File>
+              <FileName>cos.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\FastMathFunctions\cos.c</FilePath>
+            </File>
+            <File>
+              <FileName>sin.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\FastMathFunctions\sin.c</FilePath>
+            </File>
+            <File>
+              <FileName>sqrt.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\FastMathFunctions\sqrt.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>FilteringFunctions</GroupName>
+          <Files>
+            <File>
+              <FileName>biquad.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\FilteringFunctions\biquad.c</FilePath>
+            </File>
+            <File>
+              <FileName>conv.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\FilteringFunctions\conv.c</FilePath>
+            </File>
+            <File>
+              <FileName>correlate.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\FilteringFunctions\correlate.c</FilePath>
+            </File>
+            <File>
+              <FileName>fir.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\FilteringFunctions\fir.c</FilePath>
+            </File>
+            <File>
+              <FileName>fir_decimate.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\FilteringFunctions\fir_decimate.c</FilePath>
+            </File>
+            <File>
+              <FileName>fir_lattice.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\FilteringFunctions\fir_lattice.c</FilePath>
+            </File>
+            <File>
+              <FileName>fir_sparse.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\FilteringFunctions\fir_sparse.c</FilePath>
+            </File>
+            <File>
+              <FileName>iir_lattice.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\FilteringFunctions\iir_lattice.c</FilePath>
+            </File>
+            <File>
+              <FileName>lms.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\FilteringFunctions\lms.c</FilePath>
+            </File>
+            <File>
+              <FileName>fir_interpolate.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\FilteringFunctions\fir_interpolate.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>MatrixFunctions</GroupName>
+          <Files>
+            <File>
+              <FileName>mat_cmplx_mult.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\MatrixFunctions\mat_cmplx_mult.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_inverse.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\MatrixFunctions\mat_inverse.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_mult.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\MatrixFunctions\mat_mult.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_scale.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\MatrixFunctions\mat_scale.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_sub.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\MatrixFunctions\mat_sub.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_trans.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\MatrixFunctions\mat_trans.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_add.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\MatrixFunctions\mat_add.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>StatisticsFunctions</GroupName>
+          <Files>
+            <File>
+              <FileName>max.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\StatisticsFunctions\max.c</FilePath>
+            </File>
+            <File>
+              <FileName>mean.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\StatisticsFunctions\mean.c</FilePath>
+            </File>
+            <File>
+              <FileName>min.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\StatisticsFunctions\min.c</FilePath>
+            </File>
+            <File>
+              <FileName>power.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\StatisticsFunctions\power.c</FilePath>
+            </File>
+            <File>
+              <FileName>rms.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\StatisticsFunctions\rms.c</FilePath>
+            </File>
+            <File>
+              <FileName>std.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\StatisticsFunctions\std.c</FilePath>
+            </File>
+            <File>
+              <FileName>var.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\StatisticsFunctions\var.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>SupportFunctions</GroupName>
+          <Files>
+            <File>
+              <FileName>copy.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\SupportFunctions\copy.c</FilePath>
+            </File>
+            <File>
+              <FileName>fill.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\SupportFunctions\fill.c</FilePath>
+            </File>
+            <File>
+              <FileName>fixed_to_fixed.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\SupportFunctions\fixed_to_fixed.c</FilePath>
+            </File>
+            <File>
+              <FileName>fixed_to_float.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\SupportFunctions\fixed_to_float.c</FilePath>
+            </File>
+            <File>
+              <FileName>float_to_fixed.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\SupportFunctions\float_to_fixed.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>TransformFunctions</GroupName>
+          <Files>
+            <File>
+              <FileName>cfft.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\TransformFunctions\cfft.c</FilePath>
+            </File>
+            <File>
+              <FileName>rfft.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\TransformFunctions\rfft.c</FilePath>
+            </File>
+            <File>
+              <FileName>dct4.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\TransformFunctions\dct4.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Intrinsics</GroupName>
+          <Files>
+            <File>
+              <FileName>intrinsics.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\Intrinsics\intrinsics.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>HelperFunctions</GroupName>
+          <Files>
+            <File>
+              <FileName>ref_helper.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\HelperFunctions\ref_helper.c</FilePath>
+            </File>
+            <File>
+              <FileName>mat_helper.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\src\HelperFunctions\mat_helper.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
+</Project>
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/CMakeLists.txt b/DSP/DSP_Lib_TestSuite/RefLibs/CMakeLists.txt
new file mode 100644
index 0000000..2fbb191
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/CMakeLists.txt
@@ -0,0 +1,78 @@
+cmake_minimum_required (VERSION 3.6)
+
+project(DspRefLibs)
+
+# Needed to find the config modules
+list(APPEND CMAKE_MODULE_PATH ${CMAKE_CURRENT_SOURCE_DIR}/../..)
+
+
+
+
+set(REFSRC src/BasicMathFunctions/abs.c
+  src/BasicMathFunctions/add.c
+  src/BasicMathFunctions/dot_prod.c
+  src/BasicMathFunctions/mult.c
+  src/BasicMathFunctions/negate.c
+  src/BasicMathFunctions/offset.c
+  src/BasicMathFunctions/scale.c
+  src/BasicMathFunctions/shift.c
+  src/BasicMathFunctions/sub.c
+  src/ComplexMathFunctions/cmplx_conj.c
+  src/ComplexMathFunctions/cmplx_dot_prod.c
+  src/ComplexMathFunctions/cmplx_mag.c
+  src/ComplexMathFunctions/cmplx_mag_squared.c
+  src/ComplexMathFunctions/cmplx_mult_cmplx.c
+  src/ComplexMathFunctions/cmplx_mult_real.c
+  src/ControllerFunctions/pid.c
+  src/ControllerFunctions/sin_cos.c
+  src/FastMathFunctions/cos.c
+  src/FastMathFunctions/sin.c
+  src/FastMathFunctions/sqrt.c
+  src/FilteringFunctions/biquad.c
+  src/FilteringFunctions/conv.c
+  src/FilteringFunctions/correlate.c
+  src/FilteringFunctions/fir.c
+  src/FilteringFunctions/fir_decimate.c
+  src/FilteringFunctions/fir_interpolate.c
+  src/FilteringFunctions/fir_lattice.c
+  src/FilteringFunctions/fir_sparse.c
+  src/FilteringFunctions/iir_lattice.c
+  src/FilteringFunctions/lms.c
+  src/HelperFunctions/mat_helper.c
+  src/HelperFunctions/ref_helper.c
+  src/Intrinsics/intrinsics.c
+  src/MatrixFunctions/mat_add.c
+  src/MatrixFunctions/mat_cmplx_mult.c
+  src/MatrixFunctions/mat_inverse.c
+  src/MatrixFunctions/mat_mult.c
+  src/MatrixFunctions/mat_scale.c
+  src/MatrixFunctions/mat_sub.c
+  src/MatrixFunctions/mat_trans.c
+  src/StatisticsFunctions/max.c
+  src/StatisticsFunctions/mean.c
+  src/StatisticsFunctions/min.c
+  src/StatisticsFunctions/power.c
+  src/StatisticsFunctions/rms.c
+  src/StatisticsFunctions/std.c
+  src/StatisticsFunctions/var.c
+  src/SupportFunctions/copy.c
+  src/SupportFunctions/fill.c
+  src/SupportFunctions/fixed_to_fixed.c
+  src/SupportFunctions/fixed_to_float.c
+  src/SupportFunctions/float_to_fixed.c
+  src/TransformFunctions/bitreversal.c
+  src/TransformFunctions/cfft.c
+  src/TransformFunctions/dct4.c
+  src/TransformFunctions/rfft.c
+  )
+
+add_library(DspRefLibs STATIC ${REFSRC})
+
+include(config)
+configdsp(DspRefLibs ../../Source)
+
+### Includes
+target_include_directories(DspRefLibs PUBLIC "inc")
+target_include_directories(DspRefLibs PUBLIC "../../Include")
+
+
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/GCC/RefLibs.uvoptx b/DSP/DSP_Lib_TestSuite/RefLibs/GCC/RefLibs.uvoptx
index 206acb2..65c2f34 100644
--- a/DSP/DSP_Lib_TestSuite/RefLibs/GCC/RefLibs.uvoptx
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/GCC/RefLibs.uvoptx
@@ -101,6 +101,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -154,11 +156,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -242,6 +249,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -295,11 +304,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -383,6 +397,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -436,11 +452,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -524,6 +545,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -577,11 +600,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -665,6 +693,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -718,11 +748,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -806,6 +841,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -859,11 +896,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -947,6 +989,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1000,11 +1044,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1088,6 +1137,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1141,11 +1192,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1229,6 +1285,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1282,11 +1340,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1370,6 +1433,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1423,11 +1488,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1511,6 +1581,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1564,11 +1636,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1652,6 +1729,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1705,11 +1784,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1793,6 +1877,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1846,11 +1932,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1934,6 +2025,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1987,11 +2080,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2075,6 +2173,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2133,11 +2233,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2221,6 +2326,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2279,11 +2386,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2367,6 +2479,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2425,11 +2539,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2513,6 +2632,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2571,11 +2692,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2659,6 +2785,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2717,11 +2845,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2805,6 +2938,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2863,11 +2998,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2951,6 +3091,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -3009,11 +3151,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/GCC/RefLibs.uvprojx b/DSP/DSP_Lib_TestSuite/RefLibs/GCC/RefLibs.uvprojx
index b0f0526..c9f78a0 100644
--- a/DSP/DSP_Lib_TestSuite/RefLibs/GCC/RefLibs.uvprojx
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/GCC/RefLibs.uvprojx
@@ -10,11 +10,12 @@
       <TargetName>cortexM0l</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM0</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -166,6 +167,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -238,9 +240,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM0</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -606,11 +608,12 @@
       <TargetName>cortexM0b</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM0</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -762,6 +765,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -834,9 +838,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM0, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -1202,11 +1206,12 @@
       <TargetName>cortexM3l</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM3</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -1358,6 +1363,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -1430,9 +1436,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM3</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -1798,11 +1804,12 @@
       <TargetName>cortexM3b</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM3</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -1954,6 +1961,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -2026,9 +2034,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM3, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -2394,11 +2402,12 @@
       <TargetName>cortexM4l</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -2550,6 +2559,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -2622,9 +2632,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM4</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -2990,11 +3000,12 @@
       <TargetName>cortexM4b</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -3146,6 +3157,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -3218,9 +3230,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM4, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -3586,11 +3598,12 @@
       <TargetName>cortexM4lf</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4_FP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -3742,6 +3755,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -3814,9 +3828,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_CM4,__FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -4182,11 +4196,12 @@
       <TargetName>cortexM4bf</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4_FP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -4338,6 +4353,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -4410,9 +4426,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_CM4,ARM_MATH_BIG_ENDIAN,__FPU_PRESENT=1U</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -4778,11 +4794,12 @@
       <TargetName>cortexM7l</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -4934,6 +4951,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -5006,9 +5024,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM7</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -5374,11 +5392,12 @@
       <TargetName>cortexM7b</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -5530,6 +5549,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -5602,9 +5622,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM7, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -5970,11 +5990,12 @@
       <TargetName>cortexM7lfsp</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7_SP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -6126,6 +6147,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -6198,9 +6220,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_CM7,__FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -6566,11 +6588,12 @@
       <TargetName>cortexM7bfsp</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7_SP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -6722,6 +6745,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -6794,9 +6818,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_CM7,ARM_MATH_BIG_ENDIAN,__FPU_PRESENT=1U</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -7162,11 +7186,12 @@
       <TargetName>cortexM7lfdp</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7_DP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -7318,6 +7343,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>3</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -7390,9 +7416,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_CM7,__FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -7758,11 +7784,12 @@
       <TargetName>cortexM7bfdp</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7_DP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -7914,6 +7941,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>3</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -7986,9 +8014,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_CM7,ARM_MATH_BIG_ENDIAN,__FPU_PRESENT=1U</Define>
+              <Define>ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -8354,11 +8382,12 @@
       <TargetName>ARMv8MBLl</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MBL</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MBL") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -8510,6 +8539,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <OnChipMemories>
@@ -8582,9 +8612,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.base</MiscControls>
-              <Define>ARM_MATH_ARMV8MBL</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -8950,11 +8980,12 @@
       <TargetName>ARMv8MMLl</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -9106,6 +9137,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <OnChipMemories>
@@ -9178,9 +9210,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main</MiscControls>
-              <Define>ARM_MATH_ARMV8MML</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -9546,11 +9578,12 @@
       <TargetName>ARMv8MMLlfsp</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_SP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -9702,6 +9735,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <OnChipMemories>
@@ -9774,9 +9808,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_ARMV8MML, __FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -10142,11 +10176,12 @@
       <TargetName>ARMv8MMLlfdp</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_DP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -10298,6 +10333,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>3</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <OnChipMemories>
@@ -10370,9 +10406,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_ARMV8MML, __FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -10738,11 +10774,12 @@
       <TargetName>ARMv8MMLld</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_DSP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -10894,6 +10931,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <OnChipMemories>
@@ -10966,9 +11004,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp</MiscControls>
-              <Define>ARM_MATH_ARMV8MML, __DSP_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -11334,11 +11372,12 @@
       <TargetName>ARMv8MMLldfsp</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_DSP_SP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -11490,6 +11529,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <OnChipMemories>
@@ -11562,9 +11602,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_ARMV8MML, __DSP_PRESENT=1U, __FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -11930,11 +11970,12 @@
       <TargetName>ARMv8MMLldfdp</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_DSP_DP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev2</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -12086,6 +12127,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>3</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <OnChipMemories>
@@ -12158,9 +12200,9 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_ARMV8MML, __DSP_PRESENT=1U, __FPU_PRESENT=1U</Define>
+              <Define></Define>
               <Undefine></Undefine>
-              <IncludePath>..\inc;..\..\..\Include</IncludePath>
+              <IncludePath>..\..\..\..\Core\Include;..\..\..\Include;..\inc</IncludePath>
             </VariousControls>
           </Carm>
           <Aarm>
@@ -12524,4 +12566,10 @@
     </Target>
   </Targets>
 
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
 </Project>
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/inc/ref.h b/DSP/DSP_Lib_TestSuite/RefLibs/inc/ref.h
index 3a6e6df..69d83d1 100644
--- a/DSP/DSP_Lib_TestSuite/RefLibs/inc/ref.h
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/inc/ref.h
@@ -59,10 +59,15 @@
   } dataType;
 
 
+#ifndef FLT_MAX
 #define FLT_MAX  3.40282347e+38F
+#endif 
+
 #define DBL_MAX  1.79769313486231571e+308
 
+#ifndef FLT_MIN
 #define FLT_MIN  1.175494351e-38F
+#endif
 #define DBL_MIN  2.22507385850720138e-308
 
 #define SCHAR_MIN (-128)
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/BasicMathFunctions/BasicMathFunctions.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/BasicMathFunctions/BasicMathFunctions.c
new file mode 100644
index 0000000..3f4dfbc
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/BasicMathFunctions/BasicMathFunctions.c
@@ -0,0 +1,11 @@
+
+#include "abs.c"
+#include "add.c"
+#include "dot_prod.c"
+#include "mult.c"
+#include "negate.c"
+#include "offset.c"
+#include "scale.c"
+#include "shift.c"
+#include "sub.c"
+
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/ComplexMathFunctions/ComplexMathFunctions.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/ComplexMathFunctions/ComplexMathFunctions.c
new file mode 100644
index 0000000..4db36be
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/ComplexMathFunctions/ComplexMathFunctions.c
@@ -0,0 +1,8 @@
+
+#include "cmplx_conj.c"
+#include "cmplx_dot_prod.c"
+#include "cmplx_mag.c"
+#include "cmplx_mag_squared.c"
+#include "cmplx_mult_cmplx.c"
+#include "cmplx_mult_real.c"
+
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/ControllerFunctions/ControllerFunctions.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/ControllerFunctions/ControllerFunctions.c
new file mode 100644
index 0000000..0c39953
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/ControllerFunctions/ControllerFunctions.c
@@ -0,0 +1,4 @@
+
+#include "pid.c"
+#include "sin_cos.c"
+
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/FastMathFunctions/FastMathFunctions.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/FastMathFunctions/FastMathFunctions.c
new file mode 100644
index 0000000..bc59cb4
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/FastMathFunctions/FastMathFunctions.c
@@ -0,0 +1,5 @@
+
+#include "cos.c"
+#include "sin.c"
+#include "sqrt.c"
+
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/FilteringFunctions.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/FilteringFunctions.c
new file mode 100644
index 0000000..8faec35
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/FilteringFunctions.c
@@ -0,0 +1,12 @@
+
+#include "biquad.c"
+#include "conv.c"
+#include "correlate.c"
+#include "fir.c"
+#include "fir_decimate.c"
+#include "fir_interpolate.c"
+#include "fir_lattice.c"
+#include "fir_sparse.c"
+#include "iir_lattice.c"
+#include "lms.c"
+
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/biquad.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/biquad.c
index c340deb..1eb7667 100644
--- a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/biquad.c
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/biquad.c
@@ -6,15 +6,15 @@
 	float32_t * pDst,
 	uint32_t blockSize)
 {
-   float32_t *pIn = pSrc;                         /*  source pointer            */
-   float32_t *pOut = pDst;                        /*  destination pointer       */
-   float32_t *pState = S->pState;                 /*  State pointer             */
-   float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
-   float32_t acc;                                 /*  accumulator               */
-   float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
-   float32_t Xn;                                  /*  temporary input           */
-   float32_t d1, d2;                              /*  state variables           */
-   uint32_t sample, stage = S->numStages;         /*  loop counters             */
+        float32_t *pIn = pSrc;                         /*  source pointer            */
+        float32_t *pOut = pDst;                        /*  destination pointer       */
+        float32_t *pState = S->pState;                 /*  State pointer             */
+  const float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
+        float32_t acc;                                 /*  accumulator               */
+        float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
+        float32_t Xn;                                  /*  temporary input           */
+        float32_t d1, d2;                              /*  state variables           */
+        uint32_t sample, stage = S->numStages;         /*  loop counters             */
 
    do
    {
@@ -72,19 +72,19 @@
 
 void ref_biquad_cascade_stereo_df2T_f32(
 	const arm_biquad_cascade_stereo_df2T_instance_f32 * S,
-	float32_t * pSrc,
-	float32_t * pDst,
-	uint32_t blockSize)
+	      float32_t * pSrc,
+	      float32_t * pDst,
+	      uint32_t blockSize)
 {
-    float32_t *pIn = pSrc;                         /*  source pointer            */
-    float32_t *pOut = pDst;                        /*  destination pointer       */
-    float32_t *pState = S->pState;                 /*  State pointer             */
-    float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
-    float32_t acc1a, acc1b;                        /*  accumulator               */
-    float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
-    float32_t Xn1a, Xn1b;                          /*  temporary input           */
-    float32_t d1a, d2a, d1b, d2b;                  /*  state variables           */
-    uint32_t sample, stage = S->numStages;         /*  loop counters             */
+        float32_t *pIn = pSrc;                         /*  source pointer            */
+        float32_t *pOut = pDst;                        /*  destination pointer       */
+        float32_t *pState = S->pState;                 /*  State pointer             */
+  const float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
+        float32_t acc1a, acc1b;                        /*  accumulator               */
+        float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
+        float32_t Xn1a, Xn1b;                          /*  temporary input           */
+        float32_t d1a, d2a, d1b, d2b;                  /*  state variables           */
+        uint32_t sample, stage = S->numStages;         /*  loop counters             */
 
     do
     {
@@ -220,19 +220,19 @@
 
 void ref_biquad_cascade_df1_f32(
   const arm_biquad_casd_df1_inst_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
+        float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
 {
-  float32_t *pIn = pSrc;                         /*  source pointer            */
-  float32_t *pOut = pDst;                        /*  destination pointer       */
-  float32_t *pState = S->pState;                 /*  pState pointer            */
-  float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
-  float32_t acc;                                 /*  Simulates the accumulator */
-  float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
-  float32_t Xn1, Xn2, Yn1, Yn2;                  /*  Filter pState variables   */
-  float32_t Xn;                                  /*  temporary input           */
-  uint32_t sample, stage = S->numStages;         /*  loop counters             */
+        float32_t *pIn = pSrc;                         /*  source pointer            */
+        float32_t *pOut = pDst;                        /*  destination pointer       */
+        float32_t *pState = S->pState;                 /*  pState pointer            */
+  const float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
+        float32_t acc;                                 /*  Simulates the accumulator */
+        float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
+        float32_t Xn1, Xn2, Yn1, Yn2;                  /*  Filter pState variables   */
+        float32_t Xn;                                  /*  temporary input           */
+        uint32_t sample, stage = S->numStages;         /*  loop counters             */
 
   do
   {
@@ -302,24 +302,24 @@
 
 void ref_biquad_cas_df1_32x64_q31(
   const arm_biquad_cas_df1_32x64_ins_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
+        q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-  q31_t *pIn = pSrc;                             /*  input pointer initialization  			*/
-  q31_t *pOut = pDst;                            /*  output pointer initialization 			*/
-  q63_t *pState = S->pState;                     /*  state pointer initialization  			*/
-  q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  			*/
-  q63_t acc;                                     /*  accumulator                   			*/
-  q31_t Xn1, Xn2;                                /*  Input Filter state variables  			*/
-  q63_t Yn1, Yn2;                                /*  Output Filter state variables 			*/
-  q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           			*/
-  q31_t Xn;                                      /*  temporary input               			*/
-  int32_t shift = (int32_t) S->postShift + 1;    /*  Shift to be applied to the output 	*/
-  uint32_t sample, stage = S->numStages;         /*  loop counters                     	*/
-  q31_t acc_l, acc_h;                            /*  temporary output               		*/
-  uint32_t uShift = ((uint32_t) S->postShift + 1U);
-  uint32_t lShift = 32U - uShift;                /*  Shift to be applied to the output 	*/
+        q31_t *pIn = pSrc;                             /*  input pointer initialization  			*/
+        q31_t *pOut = pDst;                            /*  output pointer initialization 			*/
+        q63_t *pState = S->pState;                     /*  state pointer initialization  			*/
+  const q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  			*/
+        q63_t acc;                                     /*  accumulator                   			*/
+        q31_t Xn1, Xn2;                                /*  Input Filter state variables  			*/
+        q63_t Yn1, Yn2;                                /*  Output Filter state variables 			*/
+        q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           			*/
+        q31_t Xn;                                      /*  temporary input               			*/
+        int32_t shift = (int32_t) S->postShift + 1;    /*  Shift to be applied to the output 	*/
+        uint32_t sample, stage = S->numStages;         /*  loop counters                     	*/
+        q31_t acc_l, acc_h;                            /*  temporary output               		*/
+        uint32_t uShift = ((uint32_t) S->postShift + 1U);
+        uint32_t lShift = 32U - uShift;                /*  Shift to be applied to the output 	*/
 
   do
   {
@@ -395,17 +395,17 @@
   q31_t * pDst,
   uint32_t blockSize)
 {	
-  q63_t acc;                                     /*  accumulator                   */
-  uint32_t uShift = ((uint32_t) S->postShift + 1U);
-  uint32_t lShift = 32U - uShift;                /*  Shift to be applied to the output */
-  q31_t *pIn = pSrc;                             /*  input pointer initialization  */
-  q31_t *pOut = pDst;                            /*  output pointer initialization */
-  q31_t *pState = S->pState;                     /*  pState pointer initialization */
-  q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  */
-  q31_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
-  q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
-  q31_t Xn;                                      /*  temporary input               */
-  uint32_t sample, stage = S->numStages;         /*  loop counters                 */
+        q63_t acc;                                     /*  accumulator                   */
+        uint32_t uShift = ((uint32_t) S->postShift + 1U);
+        uint32_t lShift = 32U - uShift;                /*  Shift to be applied to the output */
+        q31_t *pIn = pSrc;                             /*  input pointer initialization  */
+        q31_t *pOut = pDst;                            /*  output pointer initialization */
+        q31_t *pState = S->pState;                     /*  pState pointer initialization */
+  const q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  */
+        q31_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
+        q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
+        q31_t Xn;                                      /*  temporary input               */
+        uint32_t sample, stage = S->numStages;         /*  loop counters                 */
 
   do
   {
@@ -490,16 +490,16 @@
   q31_t * pDst,
   uint32_t blockSize)
 {
-  q31_t acc = 0;                                 /*  accumulator                   */
-  q31_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
-  q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
-  q31_t *pIn = pSrc;                             /*  input pointer initialization  */
-  q31_t *pOut = pDst;                            /*  output pointer initialization */
-  q31_t *pState = S->pState;                     /*  pState pointer initialization */
-  q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  */
-  q31_t Xn;                                      /*  temporary input               */
-  int32_t shift = (int32_t) S->postShift + 1;    /*  Shift to be applied to the output */
-  uint32_t sample, stage = S->numStages;         /*  loop counters                     */
+        q31_t acc = 0;                                 /*  accumulator                   */
+        q31_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
+        q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
+        q31_t *pIn = pSrc;                             /*  input pointer initialization  */
+        q31_t *pOut = pDst;                            /*  output pointer initialization */
+        q31_t *pState = S->pState;                     /*  pState pointer initialization */
+  const q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  */
+        q31_t Xn;                                      /*  temporary input               */
+        int32_t shift = (int32_t) S->postShift + 1;    /*  Shift to be applied to the output */
+        uint32_t sample, stage = S->numStages;         /*  loop counters                     */
 
   do
   {
@@ -568,16 +568,16 @@
   q15_t * pDst,
   uint32_t blockSize)
 {
-	q15_t *pIn = pSrc;                             			/*  Source pointer                           */
-	q15_t *pOut = pDst;                            			/*  Destination pointer                      */
-	q15_t b0, b1, b2, a1, a2;                      			/*  Filter coefficients           				*/
-	q15_t Xn1, Xn2, Yn1, Yn2;                      			/*  Filter state variables        				*/
-	q15_t Xn;                                      			/*  temporary input               				*/
-	q31_t acc;                                     			/*  Accumulator                              */
-	int32_t shift = (15 - (int32_t) S->postShift); 			/*  Post shift                               */
-	q15_t *pState = S->pState;                     			/*  State pointer                            */
-	q15_t *pCoeffs = S->pCoeffs;                   			/*  Coefficient pointer                      */
-  uint32_t sample, stage = (uint32_t) S->numStages;   /*  Stage loop counter                          */
+	      q15_t *pIn = pSrc;                             			/*  Source pointer                           */
+	      q15_t *pOut = pDst;                            			/*  Destination pointer                      */
+	      q15_t b0, b1, b2, a1, a2;                      			/*  Filter coefficients           				*/
+	      q15_t Xn1, Xn2, Yn1, Yn2;                      			/*  Filter state variables        				*/
+	      q15_t Xn;                                      			/*  temporary input               				*/
+	      q31_t acc;                                     			/*  Accumulator                              */
+	      int32_t shift = (15 - (int32_t) S->postShift); 			/*  Post shift                               */
+	      q15_t *pState = S->pState;                     			/*  State pointer                            */
+  const q15_t *pCoeffs = S->pCoeffs;                   			/*  Coefficient pointer                      */
+        uint32_t sample, stage = (uint32_t) S->numStages;   /*  Stage loop counter                          */
 
   do
   {
@@ -643,16 +643,16 @@
   q15_t * pDst,
   uint32_t blockSize)
 {
-	q15_t *pIn = pSrc;                             			/*  Source pointer                           */
-	q15_t *pOut = pDst;                            			/*  Destination pointer                      */
-	q15_t b0, b1, b2, a1, a2;                      			/*  Filter coefficients           				*/
-	q15_t Xn1, Xn2, Yn1, Yn2;                      			/*  Filter state variables        				*/
-	q15_t Xn;                                      			/*  temporary input               				*/
-	q63_t acc;                                     			/*  Accumulator                              */
-	int32_t shift = (15 - (int32_t) S->postShift); 			/*  Post shift                               */
-	q15_t *pState = S->pState;                     			/*  State pointer                            */
-	q15_t *pCoeffs = S->pCoeffs;                   			/*  Coefficient pointer                      */
-  uint32_t sample, stage = (uint32_t) S->numStages;   /*  Stage loop counter                          */
+	      q15_t *pIn = pSrc;                             			/*  Source pointer                           */
+	      q15_t *pOut = pDst;                            			/*  Destination pointer                      */
+	      q15_t b0, b1, b2, a1, a2;                      			/*  Filter coefficients           				*/
+	      q15_t Xn1, Xn2, Yn1, Yn2;                      			/*  Filter state variables        				*/
+	      q15_t Xn;                                      			/*  temporary input               				*/
+	      q63_t acc;                                     			/*  Accumulator                              */
+	      int32_t shift = (15 - (int32_t) S->postShift); 			/*  Post shift                               */
+	      q15_t *pState = S->pState;                     			/*  State pointer                            */
+  const q15_t *pCoeffs = S->pCoeffs;                   			/*  Coefficient pointer                      */
+        uint32_t sample, stage = (uint32_t) S->numStages;   /*  Stage loop counter                          */
 
   do
   {
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir.c
index 8a7a90c..40ab773 100644
--- a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir.c
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir.c
@@ -2,16 +2,16 @@
 
 void ref_fir_f32(
 	const arm_fir_instance_f32 * S,
-	float32_t * pSrc,
-	float32_t * pDst,
-	uint32_t blockSize)
+	      float32_t * pSrc,
+	      float32_t * pDst,
+	      uint32_t blockSize)
 {
-   float32_t *pState = S->pState;                 /* State pointer */
-   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-   uint32_t i;                    								/* Loop counters */
-   float32_t acc;
+        float32_t *pState = S->pState;                 /* State pointer */
+	const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i;                    								/* Loop counters */
+        float32_t acc;
 
    /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
    /* pStateCurnt points to the location where the new input data should be written */
@@ -56,16 +56,16 @@
 
 void ref_fir_q31(
   const arm_fir_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
+        q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-   q31_t *pState = S->pState;                 /* State pointer */
-   q31_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-   q31_t *pStateCurnt;                        /* Points to the current sample of the state */
-   uint32_t numTaps = S->numTaps;             /* Number of filter coefficients in the filter */
-   uint32_t i;                    						/* Loop counters */
-   q63_t acc;
+        q31_t *pState = S->pState;                 /* State pointer */
+	const q31_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        q31_t *pStateCurnt;                        /* Points to the current sample of the state */
+        uint32_t numTaps = S->numTaps;             /* Number of filter coefficients in the filter */
+        uint32_t i;                                /* Loop counter */
+        q63_t acc;
 
    /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
    /* pStateCurnt points to the location where the new input data should be written */
@@ -110,16 +110,16 @@
 
 void ref_fir_fast_q31(
   const arm_fir_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
+        q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-   q31_t *pState = S->pState;                 /* State pointer */
-   q31_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-   q31_t *pStateCurnt;                        /* Points to the current sample of the state */
-   uint32_t numTaps = S->numTaps;             /* Number of filter coefficients in the filter */
-   uint32_t i;                    						/* Loop counters */
-   q31_t acc;
+        q31_t *pState = S->pState;                 /* State pointer */
+	const q31_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        q31_t *pStateCurnt;                        /* Points to the current sample of the state */
+        uint32_t numTaps = S->numTaps;             /* Number of filter coefficients in the filter */
+        uint32_t i;                                /* Loop counter */
+        q31_t acc;
 
    /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
    /* pStateCurnt points to the location where the new input data should be written */
@@ -164,16 +164,16 @@
 
 void ref_fir_q15(
   const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
+        q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
-   q15_t *pState = S->pState;                 /* State pointer */
-   q15_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-   q15_t *pStateCurnt;                        /* Points to the current sample of the state */
-   uint32_t numTaps = S->numTaps;             /* Number of filter coefficients in the filter */
-   uint32_t i;                    						/* Loop counters */
-   q63_t acc;
+        q15_t *pState = S->pState;                 /* State pointer */
+	const q15_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        q15_t *pStateCurnt;                        /* Points to the current sample of the state */
+        uint32_t numTaps = S->numTaps;             /* Number of filter coefficients in the filter */
+        uint32_t i;                                /* Loop counter */
+        q63_t acc;
 
    /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
    /* pStateCurnt points to the location where the new input data should be written */
@@ -218,16 +218,16 @@
 
 void ref_fir_fast_q15(
   const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
+        q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
-   q15_t *pState = S->pState;                 /* State pointer */
-   q15_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-   q15_t *pStateCurnt;                        /* Points to the current sample of the state */
-   uint32_t numTaps = S->numTaps;             /* Number of filter coefficients in the filter */
-   uint32_t i;                    						/* Loop counters */
-   q31_t acc;
+        q15_t *pState = S->pState;                 /* State pointer */
+	const q15_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        q15_t *pStateCurnt;                        /* Points to the current sample of the state */
+        uint32_t numTaps = S->numTaps;             /* Number of filter coefficients in the filter */
+        uint32_t i;                                /* Loop counter */
+        q31_t acc;
 
    /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
    /* pStateCurnt points to the location where the new input data should be written */
@@ -272,16 +272,16 @@
 
 void ref_fir_q7(
   const arm_fir_instance_q7 * S,
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
+        q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
 {
-   q7_t *pState = S->pState;                 /* State pointer */
-   q7_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-   q7_t *pStateCurnt;                        /* Points to the current sample of the state */
-   uint32_t numTaps = S->numTaps;            /* Number of filter coefficients in the filter */
-   uint32_t i;                    					 /* Loop counters */
-   q31_t acc;
+        q7_t *pState = S->pState;                 /* State pointer */
+	const q7_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        q7_t *pStateCurnt;                        /* Points to the current sample of the state */
+        uint32_t numTaps = S->numTaps;            /* Number of filter coefficients in the filter */
+        uint32_t i;                               /* Loop counter */
+        q31_t acc;
 
    /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
    /* pStateCurnt points to the location where the new input data should be written */
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_decimate.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_decimate.c
index 9ef1e5e..fc82124 100644
--- a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_decimate.c
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_decimate.c
@@ -6,13 +6,13 @@
   float32_t * pDst,
   uint32_t blockSize)
 {
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t sum0;                                /* Accumulator */
-  float32_t x0, c0;                              /* Temporary variables to hold state and coefficient values */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t i, blkCnt;  									 				 /* Loop counters */
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+        float32_t sum0;                                /* Accumulator */
+        float32_t x0, c0;                              /* Temporary variables to hold state and coefficient values */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, blkCnt;  									 				 /* Loop counters */
 
   /* S->pState buffer contains previous frame (numTaps - 1) samples */
   /* pStateCurnt points to the location where the new input data should be written */
@@ -82,13 +82,13 @@
   q31_t * pDst,
   uint32_t blockSize)
 {
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  q63_t sum0;                                    /* Accumulator */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt;  													 /* Loop counters */
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
+        q63_t sum0;                                    /* Accumulator */
+        uint32_t numTaps = S->numTaps;                 /* Number of taps */
+        uint32_t i, blkCnt;  													 /* Loop counters */
 
   /* S->pState buffer contains previous frame (numTaps - 1) samples */
   /* pStateCurnt points to the location where the new input data should be written */
@@ -159,13 +159,13 @@
   q31_t * pDst,
   uint32_t blockSize)
 {
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  q31_t sum0;                                    /* Accumulator */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt;  													 /* Loop counters */
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
+        q31_t sum0;                                    /* Accumulator */
+        uint32_t numTaps = S->numTaps;                 /* Number of taps */
+        uint32_t i, blkCnt;  													 /* Loop counters */
 
   /* S->pState buffer contains previous frame (numTaps - 1) samples */
   /* pStateCurnt points to the location where the new input data should be written */
@@ -236,13 +236,13 @@
   q15_t * pDst,
   uint32_t blockSize)
 {
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  q63_t sum0;                                    /* Accumulator */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt;  													 /* Loop counters */
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
+        q63_t sum0;                                    /* Accumulator */
+        uint32_t numTaps = S->numTaps;                 /* Number of taps */
+        uint32_t i, blkCnt;  													 /* Loop counters */
 
   /* S->pState buffer contains previous frame (numTaps - 1) samples */
   /* pStateCurnt points to the location where the new input data should be written */
@@ -313,13 +313,13 @@
   q15_t * pDst,
   uint32_t blockSize)
 {
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  q31_t sum0;                                    /* Accumulator */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt;  													 /* Loop counters */
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q15_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
+        q31_t sum0;                                    /* Accumulator */
+        uint32_t numTaps = S->numTaps;                 /* Number of taps */
+        uint32_t i, blkCnt;  													 /* Loop counters */
 
   /* S->pState buffer contains previous frame (numTaps - 1) samples */
   /* pStateCurnt points to the location where the new input data should be written */
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_interpolate.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_interpolate.c
index 4cb52eb..bfc5c09 100644
--- a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_interpolate.c
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_interpolate.c
@@ -2,17 +2,18 @@
 
 void ref_fir_interpolate_f32(
   const arm_fir_interpolate_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
+        float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
 {
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *ptr1, *ptr2;                        /* Temporary pointers for state and coefficient buffers */
-  float32_t sum;                                 /* Accumulator */
-  uint32_t i, blkCnt;                            /* Loop counters */
-  uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+        float32_t *ptr1;                               /* Temporary pointer for state buffer */
+  const float32_t *ptr2;                               /* Temporary pointer for coefficient buffer */
+        float32_t sum;                                 /* Accumulator */
+        uint32_t i, blkCnt;                            /* Loop counters */
+        uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
 
 
   /* S->pState buffer contains previous frame (phaseLen - 1) samples */
@@ -93,21 +94,19 @@
 
 void ref_fir_interpolate_q31(
   const arm_fir_interpolate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
+        q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t *ptr1, *ptr2;                            /* Temporary pointers for state and coefficient buffers */
-
-  /* Run the below code for Cortex-M0 */
-
-  q63_t sum;                                     /* Accumulator */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  uint32_t i, blkCnt;                            /* Loop counters */
-  uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q31_t *ptr1;                                   /* Temporary pointer for state buffer */
+  const q31_t *ptr2;                                   /* Temporary pointer for coefficient buffer */
+        q63_t sum;                                     /* Accumulator */
+        q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
+        uint32_t i, blkCnt;                            /* Loop counters */
+        uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
 
 
   /* S->pState buffer contains previous frame (phaseLen - 1) samples */
@@ -194,18 +193,19 @@
 
 void ref_fir_interpolate_q15(
   const arm_fir_interpolate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
+        q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
-  q15_t *pState = S->pState;                     /* State pointer                                            */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer                                      */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state                */
-  q15_t *ptr1, *ptr2;                            /* Temporary pointers for state and coefficient buffers     */
-  q63_t sum;                                     /* Accumulator */
-  q15_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  uint32_t i, blkCnt, tapCnt;                    /* Loop counters                                            */
-  uint16_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
+        q15_t *pState = S->pState;                     /* State pointer                                            */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer                                      */
+        q15_t *pStateCurnt;                            /* Points to the current sample of the state                */
+        q15_t *ptr1;                                   /* Temporary pointer for state buffer */
+  const q15_t *ptr2;                                   /* Temporary pointer for coefficient buffer */
+        q63_t sum;                                     /* Accumulator */
+        q15_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
+        uint32_t i, blkCnt, tapCnt;                    /* Loop counters                                            */
+        uint16_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
 
 
   /* S->pState buffer contains previous frame (phaseLen - 1) samples */
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_lattice.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_lattice.c
index b7178a7..efaa44a 100644
--- a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_lattice.c
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_lattice.c
@@ -2,17 +2,17 @@
 
 void ref_fir_lattice_f32(
   const arm_fir_lattice_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
+        float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
 {
-  float32_t *pState;                             /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *px;                                 /* temporary state pointer */
-  float32_t *pk;                                 /* temporary coefficient pointer */
-  float32_t fcurr, fnext, gcurr, gnext;          /* temporary variables */
-  uint32_t numStages = S->numStages;             /* Length of the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
+        float32_t *pState;                             /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *px;                                 /* temporary state pointer */
+  const float32_t *pk;                                 /* temporary coefficient pointer */
+        float32_t fcurr, fnext, gcurr, gnext;          /* temporary variables */
+        uint32_t numStages = S->numStages;             /* Length of the filter */
+        uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
 
   pState = &S->pState[0];
 
@@ -78,17 +78,17 @@
 
 void ref_fir_lattice_q31(
   const arm_fir_lattice_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
+        q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-  q31_t *pState;                                 /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *px;                                     /* temporary state pointer */
-  q31_t *pk;                                     /* temporary coefficient pointer */
-  q31_t fcurr, fnext, gcurr, gnext;              /* temporary variables */
-  uint32_t numStages = S->numStages;             /* Length of the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
+        q31_t *pState;                                 /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *px;                                     /* temporary state pointer */
+  const q31_t *pk;                                     /* temporary coefficient pointer */
+        q31_t fcurr, fnext, gcurr, gnext;              /* temporary variables */
+        uint32_t numStages = S->numStages;             /* Length of the filter */
+        uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
 
   pState = &S->pState[0];
 
@@ -155,17 +155,17 @@
 
 void ref_fir_lattice_q15(
   const arm_fir_lattice_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
+        q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
-  q15_t *pState;                                 /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *px;                                     /* temporary state pointer */
-  q15_t *pk;                                     /* temporary coefficient pointer */
-  q31_t fcurnt, fnext, gcurnt, gnext;            /* temporary variables */
-  uint32_t numStages = S->numStages;             /* Length of the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
+        q15_t *pState;                                 /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *px;                                     /* temporary state pointer */
+  const q15_t *pk;                                     /* temporary coefficient pointer */
+        q31_t fcurnt, fnext, gcurnt, gnext;            /* temporary variables */
+        uint32_t numStages = S->numStages;             /* Length of the filter */
+        uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
 
   pState = &S->pState[0];
 
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_sparse.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_sparse.c
index 11e79f9..060128f 100644
--- a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_sparse.c
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_sparse.c
@@ -1,24 +1,24 @@
 #include "ref.h"
 
 void ref_fir_sparse_f32(
-  arm_fir_sparse_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  float32_t * pScratchIn,
-  uint32_t blockSize)
+        arm_fir_sparse_instance_f32 * S,
+        float32_t * pSrc,
+        float32_t * pDst,
+        float32_t * pScratchIn,
+        uint32_t blockSize)
 {
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *px;                                 /* Scratch buffer pointer */
-  float32_t *py = pState;                        /* Temporary pointers for state buffer */
-  float32_t *pb = pScratchIn;                    /* Temporary pointers for scratch buffer */
-  float32_t *pOut;                               /* Destination pointer */
-  int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-  uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-  uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
-  int32_t readIndex;                             /* Read index of the state buffer */
-  uint32_t tapCnt, blkCnt;                       /* loop counters */
-  float32_t coeff = *pCoeffs++;                  /* Read the first coefficient value */
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *px;                                 /* Scratch buffer pointer */
+        float32_t *py = pState;                        /* Temporary pointers for state buffer */
+        float32_t *pb = pScratchIn;                    /* Temporary pointers for scratch buffer */
+        float32_t *pOut;                               /* Destination pointer */
+        int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
+        uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
+        uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
+        int32_t readIndex;                             /* Read index of the state buffer */
+        uint32_t tapCnt, blkCnt;                       /* loop counters */
+        float32_t coeff = *pCoeffs++;                  /* Read the first coefficient value */
 
 
   /* BlockSize of Input samples are copied into the state buffer */
@@ -110,26 +110,26 @@
 }
 
 void ref_fir_sparse_q31(
-  arm_fir_sparse_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  q31_t * pScratchIn,
-  uint32_t blockSize)
+        arm_fir_sparse_instance_q31 * S,
+        q31_t * pSrc,
+        q31_t * pDst,
+        q31_t * pScratchIn,
+        uint32_t blockSize)
 {
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *px;                                     /* Scratch buffer pointer */
-  q31_t *py = pState;                            /* Temporary pointers for state buffer */
-  q31_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
-  q31_t *pOut;                                   /* Destination pointer */
-  q63_t out;                                     /* Temporary output variable */
-  int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-  uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-  uint16_t numTaps = S->numTaps;                 /* Filter order */
-  int32_t readIndex;                             /* Read index of the state buffer */
-  uint32_t tapCnt, blkCnt;                       /* loop counters */
-  q31_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
-  q31_t in;
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *px;                                     /* Scratch buffer pointer */
+        q31_t *py = pState;                            /* Temporary pointers for state buffer */
+        q31_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
+        q31_t *pOut;                                   /* Destination pointer */
+        q63_t out;                                     /* Temporary output variable */
+        int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
+        uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
+        uint16_t numTaps = S->numTaps;                 /* Filter order */
+        int32_t readIndex;                             /* Read index of the state buffer */
+        uint32_t tapCnt, blkCnt;                       /* loop counters */
+        q31_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
+        q31_t in;
 
 
   /* BlockSize of Input samples are copied into the state buffer */
@@ -237,27 +237,27 @@
 }
 
 void ref_fir_sparse_q15(
-  arm_fir_sparse_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  q15_t * pScratchIn,
-  q31_t * pScratchOut,
-  uint32_t blockSize)
+        arm_fir_sparse_instance_q15 * S,
+        q15_t * pSrc,
+        q15_t * pDst,
+        q15_t * pScratchIn,
+        q31_t * pScratchOut,
+        uint32_t blockSize)
 {
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pIn = pSrc;                             /* Working pointer for input */
-  q15_t *pOut = pDst;                            /* Working pointer for output */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *px;                                     /* Temporary pointers for scratch buffer */
-  q15_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
-  q15_t *py = pState;                            /* Temporary pointers for state buffer */
-  int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-  uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-  uint16_t numTaps = S->numTaps;                 /* Filter order */
-  int32_t readIndex;                             /* Read index of the state buffer */
-  uint32_t tapCnt, blkCnt;                       /* loop counters */
-  q15_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
-  q31_t *pScr2 = pScratchOut;                    /* Working pointer for pScratchOut */
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pIn = pSrc;                             /* Working pointer for input */
+        q15_t *pOut = pDst;                            /* Working pointer for output */
+        q15_t *px;                                     /* Temporary pointers for scratch buffer */
+        q15_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
+        q15_t *py = pState;                            /* Temporary pointers for state buffer */
+        int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
+        uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
+        uint16_t numTaps = S->numTaps;                 /* Filter order */
+        int32_t readIndex;                             /* Read index of the state buffer */
+        uint32_t tapCnt, blkCnt;                       /* loop counters */
+        q15_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
+        q31_t *pScr2 = pScratchOut;                    /* Working pointer for pScratchOut */
 
   /* BlockSize of Input samples are copied into the state buffer */
   /* StateIndex points to the starting position to write in the state buffer */
@@ -358,27 +358,27 @@
 }
 
 void ref_fir_sparse_q7(
-  arm_fir_sparse_instance_q7 * S,
-  q7_t *pSrc,
-  q7_t *pDst,
-  q7_t *pScratchIn,
-  q31_t * pScratchOut,
-  uint32_t blockSize)
+        arm_fir_sparse_instance_q7 * S,
+        q7_t *pSrc,
+        q7_t *pDst,
+        q7_t *pScratchIn,
+        q31_t * pScratchOut,
+        uint32_t blockSize)
 {
-  q7_t *pState = S->pState;                      /* State pointer */
-  q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
-  q7_t *px;                                      /* Scratch buffer pointer */
-  q7_t *py = pState;                             /* Temporary pointers for state buffer */
-  q7_t *pb = pScratchIn;                         /* Temporary pointers for scratch buffer */
-  q7_t *pOut = pDst;                             /* Destination pointer */
-  int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-  uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-  uint16_t numTaps = S->numTaps;                 /* Filter order */
-  int32_t readIndex;                             /* Read index of the state buffer */
-  uint32_t tapCnt, blkCnt;                       /* loop counters */
-  q7_t coeff = *pCoeffs++;                       /* Read the coefficient value */
-  q31_t *pScr2 = pScratchOut;                    /* Working pointer for scratch buffer of output values */
-  q31_t in;
+        q7_t *pState = S->pState;                      /* State pointer */
+  const q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
+        q7_t *px;                                      /* Scratch buffer pointer */
+        q7_t *py = pState;                             /* Temporary pointers for state buffer */
+        q7_t *pb = pScratchIn;                         /* Temporary pointers for scratch buffer */
+        q7_t *pOut = pDst;                             /* Destination pointer */
+        int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
+        uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
+        uint16_t numTaps = S->numTaps;                 /* Filter order */
+        int32_t readIndex;                             /* Read index of the state buffer */
+        uint32_t tapCnt, blkCnt;                       /* loop counters */
+        q7_t coeff = *pCoeffs++;                       /* Read the coefficient value */
+        q31_t *pScr2 = pScratchOut;                    /* Working pointer for scratch buffer of output values */
+        q31_t in;
 
   /* BlockSize of Input samples are copied into the state buffer */
   /* StateIndex points to the starting position to write in the state buffer */
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/HelperFunctions/HelperFunctions.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/HelperFunctions/HelperFunctions.c
new file mode 100644
index 0000000..aa5a40f
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/HelperFunctions/HelperFunctions.c
@@ -0,0 +1,4 @@
+
+#include "mat_helper.c"
+#include "ref_helper.c"
+
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/Intrinsics/Intrinsics_.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/Intrinsics/Intrinsics_.c
new file mode 100644
index 0000000..ed4b7c5
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/Intrinsics/Intrinsics_.c
@@ -0,0 +1,3 @@
+
+#include "intrinsics.c"
+
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/MatrixFunctions/MatrixFunctions.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/MatrixFunctions/MatrixFunctions.c
new file mode 100644
index 0000000..b611bfd
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/MatrixFunctions/MatrixFunctions.c
@@ -0,0 +1,9 @@
+
+#include "mat_add.c"
+#include "mat_cmplx_mult.c"
+#include "mat_inverse.c"
+#include "mat_mult.c"
+#include "mat_scale.c"
+#include "mat_sub.c"
+#include "mat_trans.c"
+
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/StatisticsFunctions.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/StatisticsFunctions.c
new file mode 100644
index 0000000..426c3f7
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/StatisticsFunctions.c
@@ -0,0 +1,8 @@
+
+#include "max.c"
+#include "mean.c"
+#include "min.c"
+#include "power.c"
+#include "rms.c"
+#include "std.c"
+#include "var.c"
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/rms.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/rms.c
index 7b91163..58393ca 100644
--- a/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/rms.c
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/rms.c
@@ -21,7 +21,7 @@
   q31_t * pResult)
 {
 	uint32_t i;
-	q63_t sumsq=0;
+    uint64_t sumsq = 0;             /* accumulator (can get never negative. changed type from q63 to uint64 */
 	q63_t tmp1;
 	q31_t tmp2;
   
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/SupportFunctions/SupportFunctions.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/SupportFunctions/SupportFunctions.c
new file mode 100644
index 0000000..647eb46
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/SupportFunctions/SupportFunctions.c
@@ -0,0 +1,6 @@
+
+#include "copy.c"
+#include "fill.c"
+#include "fixed_to_fixed.c"
+#include "fixed_to_float.c"
+#include "float_to_fixed.c"
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/TransformFunctions/TransformFunctions.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/TransformFunctions/TransformFunctions.c
new file mode 100644
index 0000000..d0d10c4
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/TransformFunctions/TransformFunctions.c
@@ -0,0 +1,4 @@
+
+#include "cfft.c"
+#include "dct4.c"
+#include "rfft.c"
diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/TransformFunctions/bitreversal.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/TransformFunctions/bitreversal.c
index 1f2be89..1b564fc 100644
--- a/DSP/DSP_Lib_TestSuite/RefLibs/src/TransformFunctions/bitreversal.c
+++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/TransformFunctions/bitreversal.c
@@ -8,7 +8,7 @@
 ;* @param[in]      *pBitRevTab  points to bit reversal table.   
 ;* @return none.   
 ;*/
-void arm_bitreversal_32(uint32_t *pSrc, uint32_t bitRevLen, uint32_t *pBitRevTab)
+void ref_arm_bitreversal_32(uint32_t *pSrc, uint32_t bitRevLen, uint32_t *pBitRevTab)
 {
 	uint32_t a,b,i,tmp;
 	
diff --git a/DSP/DSP_Lib_TestSuite/buildDspLibs.bat b/DSP/DSP_Lib_TestSuite/buildDspLibs.bat
new file mode 100644
index 0000000..aca6675
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/buildDspLibs.bat
@@ -0,0 +1,116 @@
+@echo off
+
+set UVEXE=C:\Keil_v5\UV4\UV4.EXE
+set CURDIR=%CD%
+
+if .%1==. goto help
+for %%a in (ARM GCC) do if %1==%%a goto startBuild
+goto help
+
+:startBuild
+echo.
+echo Building DSP Libraries %1
+
+if %1==ARM                goto buildARM
+if %1==GCC                goto buildGCC
+goto err
+
+:buildARM
+:buildGCC
+cd ..\Projects\%1
+
+echo   Building DSP Library for Cortex-M0 Little Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0l"     -o "DspLib_cortexM0l_build.log"
+
+echo   Building DSP Library for Cortex-M3 Little Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3l"     -o "DspLib_cortexM3l_build.log"
+
+echo   Building DSP Library for Cortex-M4 Little Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4l"     -o "DspLib_cortexM4l_build.log"
+
+echo   Building DSP Library for Cortex-M4 Little Endian with single precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4lf"    -o "DspLib_cortexM4lf_build.log"
+
+echo   Building DSP Library for Cortex-M7 Little Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7l"     -o "DspLib_cortexM7l_build.log"
+
+echo   Building DSP Library for Cortex-M7 Little Endian with single precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfsp"  -o "DspLib_cortexM7lfsp_build.log"
+
+echo   Building DSP Library for Cortex-M7 Little Endian with double precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfdp"  -o "DspLib_cortexM7lfdp_build.log"
+
+echo   Building DSP Library for ARMv8-M Baseline Little Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MBLl"     -o "DspLib_ARMv8MBLl_build.log"
+
+echo   Building DSP Library for ARMv8-M Mainline Little Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLl"     -o "DspLib_ARMv8MMLl_build.log"
+
+echo   Building DSP Library for ARMv8-M Mainline Little Endian with single precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfsp"  -o "DspLib_ARMv8MMLlfsp_build.log"
+
+REM echo   Building DSP Library for ARMv8-M Mainline Little Endian with double precision FPU
+REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfdp"  -o "DspLib_ARMv8MMLlfdp_build.log"
+
+echo   Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLld"    -o "DspLib_ARMv8MMLld_build.log"
+
+echo   Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, single precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfsp" -o "DspLib_ARMv8MMLldfsp_build.log"
+
+REM echo   Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, double precision FPU
+REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfdp" -o "DspLib_ARMv8MMLldfdp_build.log"
+
+
+REM big endian libraries are skipped!
+
+REM echo   Building DSP Library for Cortex-M0 Big Endian
+REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0b"    -o "DspLib_cortexM0b_build.log"
+
+REM echo   Building DSP Library for Cortex-M3 Big Endian
+REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3b"    -o "DspLib_cortexM3b_build.log"
+
+REM echo   Building DSP Library for Cortex-M4 Big Endian
+REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4b"    -o "DspLib_cortexM4b_build.log"
+
+REM echo   Building DSP Library for Cortex-M4 Big Endian with single precision FPU
+REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4bf"   -o "DspLib_cortexM4bf_build.log"
+
+REM echo   Building DSP Library for Cortex-M7 Big Endian
+REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7b"    -o "DspLib_cortexM7b_build.log"
+
+REM echo   Building DSP Library for Cortex-M7 Big Endian with single precision FPU
+REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfsp" -o "DspLib_cortexM7bfsp_build.log"
+
+REM echo   Building DSP Library for Cortex-M7 Big Endian with double precision FPU
+REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfdp" -o "DspLib_cortexM7bfdp_build.log"
+
+goto deleteIntermediateFiles
+
+
+:deleteIntermediateFiles
+echo.
+echo   Deleting intermediate files
+rmdir /S /Q IntermediateFiles
+del /Q *.bak
+del /Q *.dep
+del /Q *.uvguix.*
+del /Q ArInp.*
+
+goto changeDir
+
+
+:changeDir
+cd %CURDIR%
+goto end
+
+:err
+
+:help
+echo   Syntax: buildDspLibs toolchain
+echo.
+echo     toolchain:     ARM ^| GCC
+echo.
+echo   e.g.: buildDspLibs ARM
+
+:end
diff --git a/DSP/DSP_Lib_TestSuite/buildRefLibs.bat b/DSP/DSP_Lib_TestSuite/buildRefLibs.bat
new file mode 100644
index 0000000..0f101eb
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/buildRefLibs.bat
@@ -0,0 +1,118 @@
+@echo off
+
+set UVEXE=C:\Keil_v5\UV4\UV4.EXE
+set CURDIR=%CD%
+
+if .%1==. goto help
+for %%a in (ARM ARMCLANG GCC) do if %1==%%a goto startBuild
+goto help
+
+:startBuild
+echo.
+echo Building DSP Reference Libraries %1
+
+if %1==ARM                goto buildARM
+if %1==ARMCLANG           goto buildARMCLANG
+if %1==GCC                goto buildGCC
+goto err
+
+:buildARM
+:buildARMCLANG
+:buildGCC
+cd .\RefLibs\%1
+
+echo   Building DSP Reference Library for Cortex-M0 Little Endian
+%UVEXE% -rb -j0  RefLibs.uvprojx -t "cortexM0l"    -o "RefLib_cortexM0l_build.log"
+
+echo   Building DSP Reference Library for Cortex-M3 Little Endian
+%UVEXE% -rb -j0  RefLibs.uvprojx -t "cortexM3l"    -o "RefLib_cortexM3l_build.log"
+
+echo   Building DSP Reference Library for Cortex-M4 Little Endian
+%UVEXE% -rb -j0  RefLibs.uvprojx -t "cortexM4l"    -o "RefLib_cortexM4l_build.log"
+
+echo   Building DSP Reference Library for Cortex-M4 Little Endian with single precision FPU
+%UVEXE% -rb -j0  RefLibs.uvprojx -t "cortexM4lf"   -o "RefLib_cortexM4lf_build.log"
+
+echo   Building DSP Reference Library for Cortex-M7 Little Endian
+%UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM7l"     -o "RefLib_cortexM7l_build.log"
+
+echo   Building DSP Reference Library for Cortex-M7 Little Endian with single precision FPU
+%UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM7lfsp"  -o "RefLib_cortexM7lfsp_build.log"
+
+echo   Building DSP Reference Library for Cortex-M7 Little Endian with double precision FPU
+%UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM7lfdp"  -o "RefLib_cortexM7lfdp_build.log"
+
+echo   Building DSP Reference Library for ARMv8-M Baseline Little Endian
+%UVEXE% -rb -j0 RefLibs.uvprojx -t "ARMv8MBLl"     -o "RefLib_ARMv8MBLl_build.log"
+
+echo   Building DSP Reference Library for ARMv8-M Mainline Little Endian
+%UVEXE% -rb -j0 RefLibs.uvprojx -t "ARMv8MMLl"     -o "RefLib_ARMv8MMLl_build.log"
+
+echo   Building DSP Reference Library for ARMv8-M Mainline Little Endian with single precision FPU
+%UVEXE% -rb -j0 RefLibs.uvprojx -t "ARMv8MMLlfsp"  -o "RefLib_ARMv8MMLlfsp_build.log"
+
+REM echo   Building DSP Reference Library for ARMv8-M Mainline Little Endian with double precision FPU
+REM %UVEXE% -rb -j0 RefLibs.uvprojx -t "ARMv8MMLlfdp"  -o "RefLib_ARMv8MMLlfdp_build.log"
+
+echo   Building DSP Reference Library for ARMv8-M Mainline Little Endian with DSP instructions
+%UVEXE% -rb -j0 RefLibs.uvprojx -t "ARMv8MMLld"    -o "RefLib_ARMv8MMLld_build.log"
+
+echo   Building DSP Reference Library for ARMv8-M Mainline Little Endian with DSP instructions, single precision FPU
+%UVEXE% -rb -j0 RefLibs.uvprojx -t "ARMv8MMLldfsp" -o "RefLib_ARMv8MMLldfsp_build.log"
+
+REM echo   Building DSP Reference Library for ARMv8-M Mainline Little Endian with DSP instructions, double precision FPU
+REM %UVEXE% -rb -j0 RefLibs.uvprojx -t "ARMv8MMLldfdp" -o "RefLib_ARMv8MMLldfdp_build.log"
+
+
+REM big endian libraries are skipped!
+
+REM echo   Building DSP Reference Library for Cortex-M0 Big Endian
+REM %UVEXE% -rb -j0  RefLibs.uvprojx -t"cortexM0b"    -o "RefLib_cortexM0b_build.log"
+
+REM echo   Building DSP Reference Library for Cortex-M3 Big Endian
+REM %UVEXE% -rb -j0  RefLibs.uvprojx -t"cortexM3b"    -o "RefLib_cortexM3b_build.log"
+
+REM echo   Building DSP Reference Library for Cortex-M4 Big Endian
+REM %UVEXE% -rb -j0  RefLibs.uvprojx -t"cortexM4b"    -o "RefLib_cortexM4b_build.log"
+
+REM echo   Building DSP Reference Library for Cortex-M4 Big Endian Big Endian with single precision FPU
+REM %UVEXE% -rb -j0  RefLibs.uvprojx -t"cortexM4bf"   -o "RefLib_cortexM4bf_build.log"
+
+REM echo   Building DSP Reference Library for Cortex-M7 Big Endian
+REM %UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM7b"    -o "RefLib_cortexM7b_build.log"
+
+REM echo   Building DSP Reference Library for Cortex-M7 Big Endian with single precision FPU
+REM %UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM7bfsp" -o "RefLib_cortexM7bfsp_build.log"
+
+REM echo   Building DSP Reference Library for Cortex-M7 Big Endian with double precision FPU
+REM %UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM7bfdp" -o "RefLib_cortexM7bfdp_build.log"
+
+goto deleteIntermediateFiles
+
+
+:deleteIntermediateFiles
+echo.
+echo   Deleting intermediate files
+rmdir /S /Q IntermediateFiles
+del /Q *.bak
+del /Q *.dep
+del /Q *.uvguix.*
+del /Q ArInp.*
+
+goto changeDir
+
+
+:changeDir
+cd %CURDIR%
+goto end
+
+:err
+
+:help
+echo   Syntax: buildRefLibs toolchain
+echo.
+echo     toolchain:     ARM ^| ARMCLANG ^| GCC
+echo.
+echo   e.g.: buildRefLibs ARM
+
+:end
diff --git a/DSP/DSP_Lib_TestSuite/log2txt.py b/DSP/DSP_Lib_TestSuite/log2txt.py
new file mode 100644
index 0000000..7cbbb96
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/log2txt.py
@@ -0,0 +1,110 @@
+#!/usr/bin/python3
+
+import sys
+import os
+
+error          = 1
+
+
+def parseLog(filename):
+
+    inFileName  = filename
+    outFileName = os.path.splitext(inFileName)[0] + '_parsed' + os.path.splitext(inFileName)[1]
+
+    infile = open(inFileName).read()
+    infile = infile.split('\n')
+
+    outfile = open(outFileName, 'w')
+
+    count = 0
+    strName = ""
+    strNr = -1
+    strFUT = ""
+    coverageInfo = 0
+
+    for line in infile:
+        if line.find("==================================================") != -1:
+            continue
+        if line.find("--------------------------------------------------") != -1:
+            continue
+        if line.find("Start: Group") != -1:
+            outfile.write("\n")
+            continue
+        if line.find("End: Group") != -1:
+            outfile.write("\n")
+            continue
+        if line.find("Start: Test") != -1:
+            outfile.write("\n")
+            continue
+        if line.find("End: Test") != -1:
+            outfile.write("\n")
+            continue
+        if line.find("Start Dump: String") != -1:
+            continue
+        if line.find("End Dump: String")   != -1:
+            strName = strName.rstrip("\n")
+            outfile.write(strName)
+            if strNr == 3:
+                strFUT = strName
+#            else:
+#                strFUT == ""
+            if   strName == "Group Name:":
+                strNr = 1
+                outfile.write("  ")
+            elif strName == "Test Name:":
+                strNr = 2
+                outfile.write("  ")
+            elif strName == "Function Under Test:":
+                strNr = 3
+                outfile.write("  ")
+            else:
+                strNr = 4
+                if len(strName) < 128:
+                    outfile.write("\n")
+            strName = ""
+            continue
+        if line.find("Start: Coverage Information") != -1:
+            coverageInfo = 1
+            outfile.write(line)
+            outfile.write("\n")
+        if line.find("End: Coverage Information")   != -1:
+            strFUT == ""
+            coverageInfo = 0
+        if coverageInfo == 1:
+#            if line.find(strFUT) == -1: #this line contains no relevant coverage info
+#                continue
+            if line.find("- 0%") == -1 and line.find("src") == -1 and line.find("Functions") != -1:
+                outfile.write(line + "\n")
+            continue
+        if line.find("0x") == 0: #this is a line to translate
+            line = line[12:35] + line[37:61]
+            nums = line.split(' ')
+            for num in nums:
+                intNum = int(num, base=16)
+#                if intNum == 10:
+#                    continue
+                if intNum == 0:
+                    continue
+                strName += str(chr(intNum))
+            continue
+        outfile.write(line)
+        outfile.write("\n")
+
+def print_usage(sys_argv):
+    script_name    = sys_argv[0]
+    usage_str      = "Syntax: {0} filename\n"
+
+    print (usage_str)
+
+def exit_on_error(sys_argv):
+    print_usage(sys_argv)
+    exit(1)
+
+if __name__ == '__main__':
+    arg_len = len(sys.argv)
+
+    if arg_len != 2:
+        exit_on_error(sys.argv)
+
+    if error == parseLog(sys.argv[1]):
+        exit_on_error(sys.argv)
diff --git a/DSP/DSP_Lib_TestSuite/parseLog.py b/DSP/DSP_Lib_TestSuite/parseLog.py
index 0bbc357..97354f7 100644
--- a/DSP/DSP_Lib_TestSuite/parseLog.py
+++ b/DSP/DSP_Lib_TestSuite/parseLog.py
@@ -1,6 +1,8 @@
+#!/usr/bin/python3
+
 import sys
 
-toolchain_list = ["ARM", "GCC"]
+toolchain_list = ["ARM", "GCC", "ARMCLANG"]
 core_list      = ["cortexM0l", "cortexM3l", "cortexM4l", "cortexM4lf", "cortexM7l", "cortexM7lfsp", "cortexM7lfdp", 
                   "ARMv8MBLl", "ARMv8MMLl", "ARMv8MMLlfsp", "ARMv8MMLlfdp", "ARMv8MMLld", "ARMv8MMLldfsp", "ARMv8MMLldfdp" ]
 test_list      = ["MPS2", "FVP", "Simulator"]
@@ -9,15 +11,15 @@
 
 def parseLog(toolchain, core, test):
     if toolchain not in toolchain_list:
-        print "Error: Unkown toolchain '{0}'".format(toolchain)
+        print ("Error: Unkown toolchain '{0}'".format(toolchain))
         return error
 
     if core not in core_list:
-        print "Error: Unkown core '{0}'".format(core)
+        print ("Error: Unkown core '{0}'".format(core))
         return error
 
     if test not in test_list:
-        print "Error: Unkown test '{0}'".format(test)
+        print ("Error: Unkown test '{0}'".format(test))
         return error
 
     inFileName  = ".\DspLibTest_{2}\{0}\Logs\DspLibTest_{2}_{1}.log".format(toolchain, core, test)
@@ -110,7 +112,7 @@
     argument_desc += "\n  test:      {0}".format(" ".join(test_list))
     argument_desc += "\n\ne.g.: parseLog ARM cortexM3l FVP"
 
-    print usage_str + argument_desc
+    print (usage_str + argument_desc)
 
 def exit_on_error(sys_argv):
     print_usage(sys_argv)
diff --git a/DSP/DSP_Lib_TestSuite/parseLog_SV.py b/DSP/DSP_Lib_TestSuite/parseLog_SV.py
new file mode 100644
index 0000000..19d507c
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/parseLog_SV.py
@@ -0,0 +1,128 @@
+#!/usr/bin/python3
+
+import sys
+
+toolchain_list = ["ARM", "GCC", "ARMCLANG"]
+core_list      = ["cortexM0l", "cortexM3l", "cortexM4l", "cortexM4lf", "cortexM7l", "cortexM7lfsp", "cortexM7lfdp", 
+                  "ARMv8MBLl", "ARMv8MMLl", "ARMv8MMLlfsp", "ARMv8MMLlfdp", "ARMv8MMLld", "ARMv8MMLldfsp", "ARMv8MMLldfdp" ]
+test_list      = ["MPS2", "FVP", "Simulator"]
+error          = 1
+
+
+def parseLog(toolchain, core, test):
+    if toolchain not in toolchain_list:
+        print ("Error: Unkown toolchain '{0}'".format(toolchain))
+        return error
+
+    if core not in core_list:
+        print ("Error: Unkown core '{0}'".format(core))
+        return error
+
+    if test not in test_list:
+        print ("Error: Unkown test '{0}'".format(test))
+        return error
+
+    inFileName  = ".\DspLibTest_SV_{2}\{0}\Logs\DspLibTest_{2}_{1}.log".format(toolchain, core, test)
+    outFileName = ".\DspLibTest_SV_{2}\{0}\Logs\DspLibTest_{2}_{1}_parsed.log".format(toolchain, core, test)
+
+    infile = open(inFileName).read()
+    infile = infile.split('\n')
+
+    outfile = open(outFileName, 'w')
+
+    count = 0
+    strName = ""
+    strNr = -1
+    strFUT = ""
+    coverageInfo = 0
+
+    for line in infile:
+        if line.find("==================================================") != -1:
+            continue
+        if line.find("--------------------------------------------------") != -1:
+            continue
+        if line.find("Start: Group") != -1:
+            outfile.write("\n")
+            continue
+        if line.find("End: Group") != -1:
+            outfile.write("\n")
+            continue
+        if line.find("Start: Test") != -1:
+            outfile.write("\n")
+            continue
+        if line.find("End: Test") != -1:
+            outfile.write("\n")
+            continue
+        if line.find("Start Dump: String") != -1:
+            continue
+        if line.find("End Dump: String")   != -1:
+            strName = strName.rstrip("\n")
+            outfile.write(strName)
+            if strNr == 3:
+                strFUT = strName
+#            else:
+#                strFUT == ""
+            if   strName == "Group Name:":
+                strNr = 1
+                outfile.write("  ")
+            elif strName == "Test Name:":
+                strNr = 2
+                outfile.write("  ")
+            elif strName == "Function Under Test:":
+                strNr = 3
+                outfile.write("  ")
+            else:
+                strNr = 4
+                if len(strName) < 128:
+                    outfile.write("\n")
+            strName = ""
+            continue
+        if line.find("Start: Coverage Information") != -1:
+            coverageInfo = 1
+            outfile.write(line)
+            outfile.write("\n")
+        if line.find("End: Coverage Information")   != -1:
+            strFUT == ""
+            coverageInfo = 0
+        if coverageInfo == 1:
+#            if line.find(strFUT) == -1: #this line contains no relevant coverage info
+#                continue
+            if line.find("- 0%") == -1 and line.find("src") == -1 and line.find("Functions") != -1:
+                outfile.write(line + "\n")
+            continue
+        if line.find("0x") == 0: #this is a line to translate
+            line = line[12:35] + line[37:61]
+            nums = line.split(' ')
+            for num in nums:
+                intNum = int(num, base=16)
+#                if intNum == 10:
+#                    continue
+                if intNum == 0:
+                    continue
+                strName += str(chr(intNum))
+            continue
+        outfile.write(line)
+        outfile.write("\n")
+
+def print_usage(sys_argv):
+    script_name    = sys_argv[0]
+    usage_str      = "Syntax: {0} toolchain core test\n".format(sys.argv[0])
+    argument_desc  = "\n  toolchain: {0}".format(" ".join(toolchain_list))
+    argument_desc += "\n  core:      {0}".format(" ".join(core_list))
+    argument_desc += "\n  test:      {0}".format(" ".join(test_list))
+    argument_desc += "\n\ne.g.: parseLog ARM cortexM3l FVP"
+
+    print (usage_str + argument_desc)
+
+def exit_on_error(sys_argv):
+    print_usage(sys_argv)
+    exit(1)
+
+if __name__ == '__main__':
+    arg_len = len(sys.argv)
+
+    if arg_len != 4:
+        exit_on_error(sys.argv)
+
+    if error == parseLog(sys.argv[1], sys.argv[2], sys.argv[3]):
+        exit_on_error(sys.argv)
diff --git a/DSP/DSP_Lib_TestSuite/runTest.bat b/DSP/DSP_Lib_TestSuite/runTest.bat
new file mode 100644
index 0000000..1d8d4b7
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/runTest.bat
@@ -0,0 +1,141 @@
+@echo off
+
+set UVEXE=C:\Keil_v5\UV4\UV4.EXE
+
+if .%1==. goto help
+for %%a in (ARM GCC ARMCLANG) do if %1==%%a goto checkParam2
+echo   parameter %1 not supported.
+goto help
+
+:checkParam2
+if .%2==. goto help
+for %%a in ( ^
+ cortexM0l ^
+ cortexM3l ^
+ cortexM4l ^
+ cortexM4lf ^
+ cortexM7l ^
+ cortexM7lfsp ^
+ cortexM7lfdp ^
+ ARMv8MBLl ^
+ ARMv8MMLl ^
+ ARMv8MMLlfsp ^
+ ARMv8MMLlfdp ^
+ ARMv8MMLld ^
+ ARMv8MMLldfsp ^
+ ARMv8MMLldfdp ^
+           ) do if %2==%%a goto checkParam3
+echo   parameter %2 not supported.
+goto help
+
+:checkParam3
+if .%3==. goto help
+for %%a in (MPS2 FVP Simulator) do if %3==%%a goto CheckLibraries
+echo   parameter %3 not supported.
+goto help
+
+:CheckLibraries
+if %1==ARM                goto CheckLibrariesARM
+if %1==ARMCLANG           goto CheckLibrariesARMCLANG
+if %1==GCC                goto CheckLibrariesGCC
+goto end
+
+:CheckLibrariesARM
+if not exist ".\RefLibs\%1\Lib\arm_%2_ref.lib"   (echo ".\RefLibs\%1\Lib\arm_%2_ref.lib" not found.  & goto end)
+if not exist "..\Lib\%1\arm_%2_math.lib"         (echo "..\Lib\%1\arm_%2_ref.lib" not found.         & goto end)
+goto CopyLibrariesARM
+
+:CheckLibrariesARMCLANG
+if not exist ".\RefLibs\%1\Lib\arm_%2_ref.lib"   (echo ".\RefLibs\%1\Lib\arm_%2_ref.lib" not found.  & goto end)
+if not exist "..\Lib\%1\arm_%2_math.lib"         (echo "..\Lib\%1\arm_%2_ref.lib" not found.         & goto end)
+goto CopyLibrariesARMCLANG
+
+:CheckLibrariesGCC
+if not exist ".\RefLibs\%1\Lib\libarm_%2_ref.a"  (echo ".\RefLibs\%1\Lib\libarm_%2_ref.a" not found.  & goto end)
+if not exist "..\Lib\%1\libarm_%2_math.a"        (echo "..\Lib\%1\libarm_%2_math.a" not found.        & goto end)
+goto CopyLibrariesGCC
+
+:CopyLibrariesARM
+copy /B ".\RefLibs\%1\Lib\arm_%2_ref.lib"    .\DspLibTest_%3\%1\Lib\arm_ref.lib  /B /Y
+copy /B "..\Lib\%1\arm_%2_math.lib"          .\DspLibTest_%3\%1\Lib\arm_math.lib /B /Y
+goto buildProject
+
+:CopyLibrariesARMCLANG
+copy /B ".\RefLibs\%1\Lib\arm_%2_ref.lib"    .\DspLibTest_%3\%1\Lib\arm_ref.lib  /B /Y
+copy /B "..\Lib\%1\arm_%2_math.lib"          .\DspLibTest_%3\%1\Lib\arm_math.lib /B /Y
+goto buildProject
+
+:CopyLibrariesGCC
+copy /B ".\RefLibs\%1\Lib\libarm_%2_ref.a"   .\DspLibTest_%3\%1\Lib\libarm_ref.a  /B /Y
+copy /B "..\Lib\%1\libarm_%2_math.a"         .\DspLibTest_%3\%1\Lib\libarm_math.a /B /Y
+goto buildProject
+
+:buildProject
+  echo   Build Test Project ...
+%UVEXE%  -r -j0 .\DspLibTest_%3\%1\DspLibTest_%3.uvprojx -t "%2" -o ".\Logs\DspLibTest_%3_%2_build.log"
+
+  echo   Run Test ...
+del /Q ".\DspLibTest_%3\%1\Logs\DspLibTest_%3.log" 2>NUL
+del /Q ".\DspLibTest_%3\%1\Logs\DspLibTest_%3_%2.log" 2>NUL
+
+rem get start time (The format of %TIME% is HH:MM:SS,CS for example 23:59:59,99)
+set STARTTIME=%TIME%
+
+rem run the test
+%UVEXE% -d .\DspLibTest_%3\%1\DspLibTest_%3.uvprojx -t "%2"
+
+rem get end time
+set ENDTIME=%TIME%
+
+rem calculate duration
+rem Change formatting for the start and end times
+for /F "tokens=1-4 delims=:.," %%a in ("%STARTTIME%") do (
+   set /A "start=(((%%a*60)+1%%b %% 100)*60+1%%c %% 100)*100+1%%d %% 100"
+)
+
+for /F "tokens=1-4 delims=:.," %%a in ("%ENDTIME%") do (
+   set /A "end=(((%%a*60)+1%%b %% 100)*60+1%%c %% 100)*100+1%%d %% 100"
+)
+
+rem Test midnight rollover. If so, add 1 day=8640000 1/100ths secs
+if %end% lss %start% set /a end+=8640000
+
+rem Calculate the elapsed time by subtracting values
+set /A elapsed=end-start
+
+rem Format the results for output
+set /A hh=elapsed/(60*60*100), rest=elapsed%%(60*60*100), mm=rest/(60*100), rest%%=60*100, ss=rest/100, cc=rest%%100
+if %hh% lss 10 set hh=0%hh%
+if %mm% lss 10 set mm=0%mm%
+if %ss% lss 10 set ss=0%ss%
+if %cc% lss 10 set cc=0%cc%
+
+set DURATION=%hh%:%mm%:%ss%,%cc%
+
+rem write time to file
+echo Test %1 %2 :             > ".\DspLibTest_%3\%1\Logs\DspLibTest_%3_%2_time.log"
+echo Start time: %STARTTIME% >> ".\DspLibTest_%3\%1\Logs\DspLibTest_%3_%2_time.log"
+echo End time:   %ENDTIME%   >> ".\DspLibTest_%3\%1\Logs\DspLibTest_%3_%2_time.log"
+echo Duration:   %DURATION%  >> ".\DspLibTest_%3\%1\Logs\DspLibTest_%3_%2_time.log"
+
+  echo   Copy Logfile ...
+copy /B ".\DspLibTest_%3\%1\Logs\DspLibTest_%3.log" ".\DspLibTest_%3\%1\Logs\DspLibTest_%3_%2.log"
+
+goto end
+
+
+:help
+echo.
+echo   Syntax: runTest toolchain core test
+echo.
+echo     toolchain: ARM ^| GCC
+echo     core:      cortexM0l ^| cortexM3l ^| cortexM4l ^| cortexM4lf ^| cortexM7l ^| cortexM7lfsp ^| cortexM7lfdp
+echo                ARMv8MBLl
+echo                ARMv8MMLl ^| ARMv8MMLlfsp ^| ARMv8MMLlfdp
+echo                ARMv8MMLld ^| ARMv8MMLldfsp ^| ARMv8MMLldfdp
+echo     test:      MPS2 ^| FVP ^| Simulator
+echo.
+echo   e.g.: runTest ARM cortexM3l Simulator
+
+:end
+@echo on
diff --git a/DSP/DSP_Lib_TestSuite/runTest_SV.bat b/DSP/DSP_Lib_TestSuite/runTest_SV.bat
new file mode 100644
index 0000000..e695441
--- /dev/null
+++ b/DSP/DSP_Lib_TestSuite/runTest_SV.bat
@@ -0,0 +1,105 @@
+@echo off
+
+set UVEXE=C:\Keil_v5\UV4\UV4.EXE
+
+if .%1==. goto help
+for %%a in (ARM GCC ARMCLANG) do if %1==%%a goto checkParam2
+echo   parameter %1 not supported.
+goto help
+
+:checkParam2
+if .%2==. goto help
+for %%a in ( ^
+ cortexM0l ^
+ cortexM3l ^
+ cortexM4l ^
+ cortexM4lf ^
+ cortexM7l ^
+ cortexM7lfsp ^
+ cortexM7lfdp ^
+ ARMv8MBLl ^
+ ARMv8MMLl ^
+ ARMv8MMLlfsp ^
+ ARMv8MMLlfdp ^
+ ARMv8MMLld ^
+ ARMv8MMLldfsp ^
+ ARMv8MMLldfdp ^
+           ) do if %2==%%a goto checkParam3
+echo   parameter %2 not supported.
+goto help
+
+:checkParam3
+if .%3==. goto help
+for %%a in (MPS2 FVP Simulator) do if %3==%%a goto buildProject
+echo   parameter %3 not supported.
+goto help
+
+:buildProject
+  echo   Build Test Project ...
+%UVEXE%  -r -j0 .\DspLibTest_SV_%3\%1\DspLibTest_%3.uvprojx -t "%2" -o ".\Logs\DspLibTest_%3_%2_build.log"
+
+  echo   Run Test ...
+del /Q ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3.log" 2>NUL
+del /Q ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2.log" 2>NUL
+
+rem get start time (The format of %TIME% is HH:MM:SS,CS for example 23:59:59,99)
+set STARTTIME=%TIME%
+
+rem run the test
+%UVEXE% -d .\DspLibTest_SV_%3\%1\DspLibTest_%3.uvprojx -t "%2"
+
+rem get end time
+set ENDTIME=%TIME%
+
+rem calculate duration
+rem Change formatting for the start and end times
+for /F "tokens=1-4 delims=:.," %%a in ("%STARTTIME%") do (
+   set /A "start=(((%%a*60)+1%%b %% 100)*60+1%%c %% 100)*100+1%%d %% 100"
+)
+
+for /F "tokens=1-4 delims=:.," %%a in ("%ENDTIME%") do (
+   set /A "end=(((%%a*60)+1%%b %% 100)*60+1%%c %% 100)*100+1%%d %% 100"
+)
+
+rem Test midnight rollover. If so, add 1 day=8640000 1/100ths secs
+if %end% lss %start% set /a end+=8640000
+
+rem Calculate the elapsed time by subtracting values
+set /A elapsed=end-start
+
+rem Format the results for output
+set /A hh=elapsed/(60*60*100), rest=elapsed%%(60*60*100), mm=rest/(60*100), rest%%=60*100, ss=rest/100, cc=rest%%100
+if %hh% lss 10 set hh=0%hh%
+if %mm% lss 10 set mm=0%mm%
+if %ss% lss 10 set ss=0%ss%
+if %cc% lss 10 set cc=0%cc%
+
+set DURATION=%hh%:%mm%:%ss%,%cc%
+
+rem write time to file
+echo Test %1 %2 :             > ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2_time.log"
+echo Start time: %STARTTIME% >> ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2_time.log"
+echo End time:   %ENDTIME%   >> ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2_time.log"
+echo Duration:   %DURATION%  >> ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2_time.log"
+
+  echo   Copy Logfile ...
+copy /B ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3.log" ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2.log"
+
+goto end
+
+
+:help
+echo.
+echo   Syntax: runTest toolchain core test
+echo.
+echo     toolchain: ARM ^| ARMCLANG ^| GCC
+echo     core:      cortexM0l ^| cortexM3l ^| cortexM4l ^| cortexM4lf ^| cortexM7l ^| cortexM7lfsp ^| cortexM7lfdp
+echo                ARMv8MBLl
+echo                ARMv8MMLl ^| ARMv8MMLlfsp ^| ARMv8MMLlfdp
+echo                ARMv8MMLld ^| ARMv8MMLldfsp ^| ARMv8MMLldfdp
+echo     test:      MPS2 ^| FVP ^| Simulator
+echo.
+echo   e.g.: runTest ARM cortexM3l Simulator
+
+:end
+@echo on
diff --git a/DSP/Examples/.gitignore b/DSP/Examples/.gitignore
new file mode 100644
index 0000000..567609b
--- /dev/null
+++ b/DSP/Examples/.gitignore
@@ -0,0 +1 @@
+build/
diff --git a/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM0/startup_ARMCM0.s b/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM0/startup_ARMCM0.s
new file mode 100644
index 0000000..3333bc6
--- /dev/null
+++ b/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM0/startup_ARMCM0.s
@@ -0,0 +1,159 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM0.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM0 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    ( 22 * 4)                           ; Interrupts 10 .. 31 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM0/system_ARMCM0.c b/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM0/system_ARMCM0.c
new file mode 100644
index 0000000..66a364c
--- /dev/null
+++ b/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM0/system_ARMCM0.c
@@ -0,0 +1,56 @@
+/**************************************************************************//**
+ * @file     system_ARMCM0.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM0 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM0.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM3/startup_ARMCM3.s b/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM3/startup_ARMCM3.s
new file mode 100644
index 0000000..2bf6f19
--- /dev/null
+++ b/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM3/startup_ARMCM3.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM3.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM3 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM3/system_ARMCM3.c b/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM3/system_ARMCM3.c
new file mode 100644
index 0000000..f56b85f
--- /dev/null
+++ b/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM3/system_ARMCM3.c
@@ -0,0 +1,68 @@
+/**************************************************************************//**
+ * @file     system_ARMCM3.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM3 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM3.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s b/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
new file mode 100644
index 0000000..f5270c0
--- /dev/null
+++ b/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM4.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM4 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
new file mode 100644
index 0000000..731facd
--- /dev/null
+++ b/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
@@ -0,0 +1,83 @@
+/**************************************************************************//**
+ * @file     system_ARMCM4.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM4 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM4)
+  #include "ARMCM4.h"
+#elif defined (ARMCM4_FP)
+  #include "ARMCM4_FP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+  SCB->CPACR |= ((3U << 10U*2U) |           /* enable CP10 Full Access */
+                 (3U << 11U*2U)  );         /* enable CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s b/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
new file mode 100644
index 0000000..abddc8d
--- /dev/null
+++ b/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM7.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM7 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
new file mode 100644
index 0000000..69e2a8d
--- /dev/null
+++ b/DSP/Examples/ARM/arm_class_marks_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
@@ -0,0 +1,85 @@
+/**************************************************************************//**
+ * @file     system_ARMCM7.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM7 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM7)
+  #include "ARMCM7.h"
+#elif defined (ARMCM7_SP)
+  #include "ARMCM7_SP.h"
+#elif defined (ARMCM7_DP)
+  #include "ARMCM7_DP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+  SCB->CPACR |= ((3U << 10U*2U) |           /* enable CP10 Full Access */
+                 (3U << 11U*2U)  );         /* enable CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM0/startup_ARMCM0.s b/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM0/startup_ARMCM0.s
new file mode 100644
index 0000000..3333bc6
--- /dev/null
+++ b/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM0/startup_ARMCM0.s
@@ -0,0 +1,159 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM0.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM0 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    ( 22 * 4)                           ; Interrupts 10 .. 31 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM0/system_ARMCM0.c b/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM0/system_ARMCM0.c
new file mode 100644
index 0000000..66a364c
--- /dev/null
+++ b/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM0/system_ARMCM0.c
@@ -0,0 +1,56 @@
+/**************************************************************************//**
+ * @file     system_ARMCM0.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM0 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM0.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM3/startup_ARMCM3.s b/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM3/startup_ARMCM3.s
new file mode 100644
index 0000000..2bf6f19
--- /dev/null
+++ b/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM3/startup_ARMCM3.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM3.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM3 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM3/system_ARMCM3.c b/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM3/system_ARMCM3.c
new file mode 100644
index 0000000..f56b85f
--- /dev/null
+++ b/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM3/system_ARMCM3.c
@@ -0,0 +1,68 @@
+/**************************************************************************//**
+ * @file     system_ARMCM3.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM3 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM3.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s b/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
new file mode 100644
index 0000000..f5270c0
--- /dev/null
+++ b/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM4.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM4 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
new file mode 100644
index 0000000..731facd
--- /dev/null
+++ b/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
@@ -0,0 +1,83 @@
+/**************************************************************************//**
+ * @file     system_ARMCM4.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM4 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM4)
+  #include "ARMCM4.h"
+#elif defined (ARMCM4_FP)
+  #include "ARMCM4_FP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+  SCB->CPACR |= ((3U << 10U*2U) |           /* enable CP10 Full Access */
+                 (3U << 11U*2U)  );         /* enable CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s b/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
new file mode 100644
index 0000000..abddc8d
--- /dev/null
+++ b/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM7.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM7 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
new file mode 100644
index 0000000..69e2a8d
--- /dev/null
+++ b/DSP/Examples/ARM/arm_convolution_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
@@ -0,0 +1,85 @@
+/**************************************************************************//**
+ * @file     system_ARMCM7.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM7 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM7)
+  #include "ARMCM7.h"
+#elif defined (ARMCM7_SP)
+  #include "ARMCM7_SP.h"
+#elif defined (ARMCM7_DP)
+  #include "ARMCM7_DP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+  SCB->CPACR |= ((3U << 10U*2U) |           /* enable CP10 Full Access */
+                 (3U << 11U*2U)  );         /* enable CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM0/startup_ARMCM0.s b/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM0/startup_ARMCM0.s
new file mode 100644
index 0000000..3333bc6
--- /dev/null
+++ b/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM0/startup_ARMCM0.s
@@ -0,0 +1,159 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM0.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM0 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    ( 22 * 4)                           ; Interrupts 10 .. 31 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM0/system_ARMCM0.c b/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM0/system_ARMCM0.c
new file mode 100644
index 0000000..66a364c
--- /dev/null
+++ b/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM0/system_ARMCM0.c
@@ -0,0 +1,56 @@
+/**************************************************************************//**
+ * @file     system_ARMCM0.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM0 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM0.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM3/startup_ARMCM3.s b/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM3/startup_ARMCM3.s
new file mode 100644
index 0000000..2bf6f19
--- /dev/null
+++ b/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM3/startup_ARMCM3.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM3.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM3 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM3/system_ARMCM3.c b/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM3/system_ARMCM3.c
new file mode 100644
index 0000000..f56b85f
--- /dev/null
+++ b/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM3/system_ARMCM3.c
@@ -0,0 +1,68 @@
+/**************************************************************************//**
+ * @file     system_ARMCM3.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM3 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM3.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s b/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
new file mode 100644
index 0000000..f5270c0
--- /dev/null
+++ b/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM4.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM4 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
new file mode 100644
index 0000000..731facd
--- /dev/null
+++ b/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
@@ -0,0 +1,83 @@
+/**************************************************************************//**
+ * @file     system_ARMCM4.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM4 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM4)
+  #include "ARMCM4.h"
+#elif defined (ARMCM4_FP)
+  #include "ARMCM4_FP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+  SCB->CPACR |= ((3U << 10U*2U) |           /* enable CP10 Full Access */
+                 (3U << 11U*2U)  );         /* enable CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s b/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
new file mode 100644
index 0000000..abddc8d
--- /dev/null
+++ b/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM7.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM7 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
new file mode 100644
index 0000000..69e2a8d
--- /dev/null
+++ b/DSP/Examples/ARM/arm_dotproduct_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
@@ -0,0 +1,85 @@
+/**************************************************************************//**
+ * @file     system_ARMCM7.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM7 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM7)
+  #include "ARMCM7.h"
+#elif defined (ARMCM7_SP)
+  #include "ARMCM7_SP.h"
+#elif defined (ARMCM7_DP)
+  #include "ARMCM7_DP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+  SCB->CPACR |= ((3U << 10U*2U) |           /* enable CP10 Full Access */
+                 (3U << 11U*2U)  );         /* enable CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM0/startup_ARMCM0.s b/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM0/startup_ARMCM0.s
new file mode 100644
index 0000000..3333bc6
--- /dev/null
+++ b/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM0/startup_ARMCM0.s
@@ -0,0 +1,159 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM0.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM0 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    ( 22 * 4)                           ; Interrupts 10 .. 31 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM0/system_ARMCM0.c b/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM0/system_ARMCM0.c
new file mode 100644
index 0000000..66a364c
--- /dev/null
+++ b/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM0/system_ARMCM0.c
@@ -0,0 +1,56 @@
+/**************************************************************************//**
+ * @file     system_ARMCM0.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM0 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM0.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM3/startup_ARMCM3.s b/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM3/startup_ARMCM3.s
new file mode 100644
index 0000000..2bf6f19
--- /dev/null
+++ b/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM3/startup_ARMCM3.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM3.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM3 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM3/system_ARMCM3.c b/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM3/system_ARMCM3.c
new file mode 100644
index 0000000..f56b85f
--- /dev/null
+++ b/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM3/system_ARMCM3.c
@@ -0,0 +1,68 @@
+/**************************************************************************//**
+ * @file     system_ARMCM3.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM3 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM3.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s b/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
new file mode 100644
index 0000000..f5270c0
--- /dev/null
+++ b/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM4.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM4 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
new file mode 100644
index 0000000..731facd
--- /dev/null
+++ b/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
@@ -0,0 +1,83 @@
+/**************************************************************************//**
+ * @file     system_ARMCM4.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM4 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM4)
+  #include "ARMCM4.h"
+#elif defined (ARMCM4_FP)
+  #include "ARMCM4_FP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+  SCB->CPACR |= ((3U << 10U*2U) |           /* enable CP10 Full Access */
+                 (3U << 11U*2U)  );         /* enable CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s b/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
new file mode 100644
index 0000000..abddc8d
--- /dev/null
+++ b/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM7.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM7 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
new file mode 100644
index 0000000..69e2a8d
--- /dev/null
+++ b/DSP/Examples/ARM/arm_fft_bin_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
@@ -0,0 +1,85 @@
+/**************************************************************************//**
+ * @file     system_ARMCM7.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM7 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM7)
+  #include "ARMCM7.h"
+#elif defined (ARMCM7_SP)
+  #include "ARMCM7_SP.h"
+#elif defined (ARMCM7_DP)
+  #include "ARMCM7_DP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+  SCB->CPACR |= ((3U << 10U*2U) |           /* enable CP10 Full Access */
+                 (3U << 11U*2U)  );         /* enable CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM0/startup_ARMCM0.s b/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM0/startup_ARMCM0.s
new file mode 100644
index 0000000..3333bc6
--- /dev/null
+++ b/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM0/startup_ARMCM0.s
@@ -0,0 +1,159 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM0.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM0 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    ( 22 * 4)                           ; Interrupts 10 .. 31 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM0/system_ARMCM0.c b/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM0/system_ARMCM0.c
new file mode 100644
index 0000000..66a364c
--- /dev/null
+++ b/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM0/system_ARMCM0.c
@@ -0,0 +1,56 @@
+/**************************************************************************//**
+ * @file     system_ARMCM0.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM0 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM0.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM3/startup_ARMCM3.s b/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM3/startup_ARMCM3.s
new file mode 100644
index 0000000..2bf6f19
--- /dev/null
+++ b/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM3/startup_ARMCM3.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM3.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM3 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM3/system_ARMCM3.c b/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM3/system_ARMCM3.c
new file mode 100644
index 0000000..f56b85f
--- /dev/null
+++ b/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM3/system_ARMCM3.c
@@ -0,0 +1,68 @@
+/**************************************************************************//**
+ * @file     system_ARMCM3.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM3 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM3.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s b/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
new file mode 100644
index 0000000..f5270c0
--- /dev/null
+++ b/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM4.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM4 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
new file mode 100644
index 0000000..731facd
--- /dev/null
+++ b/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
@@ -0,0 +1,83 @@
+/**************************************************************************//**
+ * @file     system_ARMCM4.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM4 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM4)
+  #include "ARMCM4.h"
+#elif defined (ARMCM4_FP)
+  #include "ARMCM4_FP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+  SCB->CPACR |= ((3U << 10U*2U) |           /* enable CP10 Full Access */
+                 (3U << 11U*2U)  );         /* enable CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s b/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
new file mode 100644
index 0000000..abddc8d
--- /dev/null
+++ b/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM7.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM7 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
new file mode 100644
index 0000000..69e2a8d
--- /dev/null
+++ b/DSP/Examples/ARM/arm_fir_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
@@ -0,0 +1,85 @@
+/**************************************************************************//**
+ * @file     system_ARMCM7.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM7 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM7)
+  #include "ARMCM7.h"
+#elif defined (ARMCM7_SP)
+  #include "ARMCM7_SP.h"
+#elif defined (ARMCM7_DP)
+  #include "ARMCM7_DP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+  SCB->CPACR |= ((3U << 10U*2U) |           /* enable CP10 Full Access */
+                 (3U << 11U*2U)  );         /* enable CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM0/startup_ARMCM0.s b/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM0/startup_ARMCM0.s
new file mode 100644
index 0000000..3333bc6
--- /dev/null
+++ b/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM0/startup_ARMCM0.s
@@ -0,0 +1,159 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM0.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM0 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    ( 22 * 4)                           ; Interrupts 10 .. 31 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM0/system_ARMCM0.c b/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM0/system_ARMCM0.c
new file mode 100644
index 0000000..66a364c
--- /dev/null
+++ b/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM0/system_ARMCM0.c
@@ -0,0 +1,56 @@
+/**************************************************************************//**
+ * @file     system_ARMCM0.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM0 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM0.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM3/startup_ARMCM3.s b/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM3/startup_ARMCM3.s
new file mode 100644
index 0000000..2bf6f19
--- /dev/null
+++ b/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM3/startup_ARMCM3.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM3.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM3 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM3/system_ARMCM3.c b/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM3/system_ARMCM3.c
new file mode 100644
index 0000000..f56b85f
--- /dev/null
+++ b/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM3/system_ARMCM3.c
@@ -0,0 +1,68 @@
+/**************************************************************************//**
+ * @file     system_ARMCM3.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM3 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM3.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s b/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
new file mode 100644
index 0000000..f5270c0
--- /dev/null
+++ b/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM4.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM4 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
new file mode 100644
index 0000000..731facd
--- /dev/null
+++ b/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
@@ -0,0 +1,83 @@
+/**************************************************************************//**
+ * @file     system_ARMCM4.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM4 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM4)
+  #include "ARMCM4.h"
+#elif defined (ARMCM4_FP)
+  #include "ARMCM4_FP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+  SCB->CPACR |= ((3U << 10U*2U) |           /* enable CP10 Full Access */
+                 (3U << 11U*2U)  );         /* enable CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s b/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
new file mode 100644
index 0000000..abddc8d
--- /dev/null
+++ b/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM7.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM7 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
new file mode 100644
index 0000000..69e2a8d
--- /dev/null
+++ b/DSP/Examples/ARM/arm_graphic_equalizer_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
@@ -0,0 +1,85 @@
+/**************************************************************************//**
+ * @file     system_ARMCM7.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM7 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM7)
+  #include "ARMCM7.h"
+#elif defined (ARMCM7_SP)
+  #include "ARMCM7_SP.h"
+#elif defined (ARMCM7_DP)
+  #include "ARMCM7_DP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+  SCB->CPACR |= ((3U << 10U*2U) |           /* enable CP10 Full Access */
+                 (3U << 11U*2U)  );         /* enable CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM0/startup_ARMCM0.s b/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM0/startup_ARMCM0.s
new file mode 100644
index 0000000..3333bc6
--- /dev/null
+++ b/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM0/startup_ARMCM0.s
@@ -0,0 +1,159 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM0.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM0 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    ( 22 * 4)                           ; Interrupts 10 .. 31 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM0/system_ARMCM0.c b/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM0/system_ARMCM0.c
new file mode 100644
index 0000000..66a364c
--- /dev/null
+++ b/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM0/system_ARMCM0.c
@@ -0,0 +1,56 @@
+/**************************************************************************//**
+ * @file     system_ARMCM0.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM0 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM0.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM3/startup_ARMCM3.s b/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM3/startup_ARMCM3.s
new file mode 100644
index 0000000..2bf6f19
--- /dev/null
+++ b/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM3/startup_ARMCM3.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM3.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM3 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM3/system_ARMCM3.c b/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM3/system_ARMCM3.c
new file mode 100644
index 0000000..f56b85f
--- /dev/null
+++ b/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM3/system_ARMCM3.c
@@ -0,0 +1,68 @@
+/**************************************************************************//**
+ * @file     system_ARMCM3.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM3 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM3.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s b/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
new file mode 100644
index 0000000..f5270c0
--- /dev/null
+++ b/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM4.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM4 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
new file mode 100644
index 0000000..731facd
--- /dev/null
+++ b/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
@@ -0,0 +1,83 @@
+/**************************************************************************//**
+ * @file     system_ARMCM4.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM4 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM4)
+  #include "ARMCM4.h"
+#elif defined (ARMCM4_FP)
+  #include "ARMCM4_FP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+  SCB->CPACR |= ((3U << 10U*2U) |           /* enable CP10 Full Access */
+                 (3U << 11U*2U)  );         /* enable CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s b/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
new file mode 100644
index 0000000..abddc8d
--- /dev/null
+++ b/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM7.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM7 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
new file mode 100644
index 0000000..69e2a8d
--- /dev/null
+++ b/DSP/Examples/ARM/arm_linear_interp_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
@@ -0,0 +1,85 @@
+/**************************************************************************//**
+ * @file     system_ARMCM7.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM7 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM7)
+  #include "ARMCM7.h"
+#elif defined (ARMCM7_SP)
+  #include "ARMCM7_SP.h"
+#elif defined (ARMCM7_DP)
+  #include "ARMCM7_DP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+  SCB->CPACR |= ((3U << 10U*2U) |           /* enable CP10 Full Access */
+                 (3U << 11U*2U)  );         /* enable CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM0/startup_ARMCM0.s b/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM0/startup_ARMCM0.s
new file mode 100644
index 0000000..3333bc6
--- /dev/null
+++ b/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM0/startup_ARMCM0.s
@@ -0,0 +1,159 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM0.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM0 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    ( 22 * 4)                           ; Interrupts 10 .. 31 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM0/system_ARMCM0.c b/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM0/system_ARMCM0.c
new file mode 100644
index 0000000..66a364c
--- /dev/null
+++ b/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM0/system_ARMCM0.c
@@ -0,0 +1,56 @@
+/**************************************************************************//**
+ * @file     system_ARMCM0.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM0 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM0.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM3/startup_ARMCM3.s b/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM3/startup_ARMCM3.s
new file mode 100644
index 0000000..2bf6f19
--- /dev/null
+++ b/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM3/startup_ARMCM3.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM3.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM3 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM3/system_ARMCM3.c b/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM3/system_ARMCM3.c
new file mode 100644
index 0000000..f56b85f
--- /dev/null
+++ b/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM3/system_ARMCM3.c
@@ -0,0 +1,68 @@
+/**************************************************************************//**
+ * @file     system_ARMCM3.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM3 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM3.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s b/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
new file mode 100644
index 0000000..f5270c0
--- /dev/null
+++ b/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM4.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM4 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
new file mode 100644
index 0000000..731facd
--- /dev/null
+++ b/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
@@ -0,0 +1,83 @@
+/**************************************************************************//**
+ * @file     system_ARMCM4.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM4 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM4)
+  #include "ARMCM4.h"
+#elif defined (ARMCM4_FP)
+  #include "ARMCM4_FP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+  SCB->CPACR |= ((3U << 10U*2U) |           /* enable CP10 Full Access */
+                 (3U << 11U*2U)  );         /* enable CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s b/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
new file mode 100644
index 0000000..abddc8d
--- /dev/null
+++ b/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM7.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM7 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
new file mode 100644
index 0000000..69e2a8d
--- /dev/null
+++ b/DSP/Examples/ARM/arm_matrix_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
@@ -0,0 +1,85 @@
+/**************************************************************************//**
+ * @file     system_ARMCM7.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM7 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM7)
+  #include "ARMCM7.h"
+#elif defined (ARMCM7_SP)
+  #include "ARMCM7_SP.h"
+#elif defined (ARMCM7_DP)
+  #include "ARMCM7_DP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+  SCB->CPACR |= ((3U << 10U*2U) |           /* enable CP10 Full Access */
+                 (3U << 11U*2U)  );         /* enable CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM0/startup_ARMCM0.s b/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM0/startup_ARMCM0.s
new file mode 100644
index 0000000..3333bc6
--- /dev/null
+++ b/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM0/startup_ARMCM0.s
@@ -0,0 +1,159 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM0.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM0 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    ( 22 * 4)                           ; Interrupts 10 .. 31 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM0/system_ARMCM0.c b/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM0/system_ARMCM0.c
new file mode 100644
index 0000000..66a364c
--- /dev/null
+++ b/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM0/system_ARMCM0.c
@@ -0,0 +1,56 @@
+/**************************************************************************//**
+ * @file     system_ARMCM0.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM0 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM0.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM3/startup_ARMCM3.s b/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM3/startup_ARMCM3.s
new file mode 100644
index 0000000..2bf6f19
--- /dev/null
+++ b/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM3/startup_ARMCM3.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM3.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM3 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM3/system_ARMCM3.c b/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM3/system_ARMCM3.c
new file mode 100644
index 0000000..f56b85f
--- /dev/null
+++ b/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM3/system_ARMCM3.c
@@ -0,0 +1,68 @@
+/**************************************************************************//**
+ * @file     system_ARMCM3.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM3 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM3.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s b/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
new file mode 100644
index 0000000..f5270c0
--- /dev/null
+++ b/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM4.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM4 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
new file mode 100644
index 0000000..731facd
--- /dev/null
+++ b/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
@@ -0,0 +1,83 @@
+/**************************************************************************//**
+ * @file     system_ARMCM4.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM4 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM4)
+  #include "ARMCM4.h"
+#elif defined (ARMCM4_FP)
+  #include "ARMCM4_FP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+  SCB->CPACR |= ((3U << 10U*2U) |           /* enable CP10 Full Access */
+                 (3U << 11U*2U)  );         /* enable CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s b/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
new file mode 100644
index 0000000..abddc8d
--- /dev/null
+++ b/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM7.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM7 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
new file mode 100644
index 0000000..69e2a8d
--- /dev/null
+++ b/DSP/Examples/ARM/arm_signal_converge_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
@@ -0,0 +1,85 @@
+/**************************************************************************//**
+ * @file     system_ARMCM7.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM7 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM7)
+  #include "ARMCM7.h"
+#elif defined (ARMCM7_SP)
+  #include "ARMCM7_SP.h"
+#elif defined (ARMCM7_DP)
+  #include "ARMCM7_DP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+  SCB->CPACR |= ((3U << 10U*2U) |           /* enable CP10 Full Access */
+                 (3U << 11U*2U)  );         /* enable CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM0/startup_ARMCM0.s b/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM0/startup_ARMCM0.s
new file mode 100644
index 0000000..3333bc6
--- /dev/null
+++ b/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM0/startup_ARMCM0.s
@@ -0,0 +1,159 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM0.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM0 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    ( 22 * 4)                           ; Interrupts 10 .. 31 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM0/system_ARMCM0.c b/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM0/system_ARMCM0.c
new file mode 100644
index 0000000..66a364c
--- /dev/null
+++ b/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM0/system_ARMCM0.c
@@ -0,0 +1,56 @@
+/**************************************************************************//**
+ * @file     system_ARMCM0.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM0 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM0.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM3/startup_ARMCM3.s b/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM3/startup_ARMCM3.s
new file mode 100644
index 0000000..2bf6f19
--- /dev/null
+++ b/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM3/startup_ARMCM3.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM3.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM3 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM3/system_ARMCM3.c b/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM3/system_ARMCM3.c
new file mode 100644
index 0000000..f56b85f
--- /dev/null
+++ b/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM3/system_ARMCM3.c
@@ -0,0 +1,68 @@
+/**************************************************************************//**
+ * @file     system_ARMCM3.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM3 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM3.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s b/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
new file mode 100644
index 0000000..f5270c0
--- /dev/null
+++ b/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM4.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM4 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
new file mode 100644
index 0000000..731facd
--- /dev/null
+++ b/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
@@ -0,0 +1,83 @@
+/**************************************************************************//**
+ * @file     system_ARMCM4.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM4 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM4)
+  #include "ARMCM4.h"
+#elif defined (ARMCM4_FP)
+  #include "ARMCM4_FP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+  SCB->CPACR |= ((3U << 10U*2U) |           /* enable CP10 Full Access */
+                 (3U << 11U*2U)  );         /* enable CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s b/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
new file mode 100644
index 0000000..abddc8d
--- /dev/null
+++ b/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM7.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM7 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
new file mode 100644
index 0000000..69e2a8d
--- /dev/null
+++ b/DSP/Examples/ARM/arm_sin_cos_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
@@ -0,0 +1,85 @@
+/**************************************************************************//**
+ * @file     system_ARMCM7.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM7 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM7)
+  #include "ARMCM7.h"
+#elif defined (ARMCM7_SP)
+  #include "ARMCM7_SP.h"
+#elif defined (ARMCM7_DP)
+  #include "ARMCM7_DP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+  SCB->CPACR |= ((3U << 10U*2U) |           /* enable CP10 Full Access */
+                 (3U << 11U*2U)  );         /* enable CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_variance_example/CMakeLists.txt b/DSP/Examples/ARM/arm_variance_example/CMakeLists.txt
new file mode 100644
index 0000000..a2084d7
--- /dev/null
+++ b/DSP/Examples/ARM/arm_variance_example/CMakeLists.txt
@@ -0,0 +1,46 @@
+cmake_minimum_required (VERSION 3.6)
+project (arm_variance_example VERSION 0.1)
+
+# Needed to include the configBoot module
+list(APPEND CMAKE_MODULE_PATH ${CMAKE_CURRENT_SOURCE_DIR}/../../..)
+
+################################### 
+#
+# LIBRARIES
+#
+###################################
+
+########### 
+#
+# CMSIS DSP
+#
+
+add_subdirectory(../../../Source bin_dsp)
+
+
+################################### 
+#
+# TEST APPLICATION
+#
+###################################
+
+
+add_executable(arm_variance_example)
+
+set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..)
+
+include(configBoot)
+
+target_sources(arm_variance_example PRIVATE arm_variance_example_f32.c)
+
+### Sources and libs
+
+target_link_libraries(arm_variance_example PRIVATE CMSISDSP)
+
+################################### 
+#
+# INSTALLATION
+#
+###################################
+
+install (TARGETS arm_variance_example DESTINATION "${PROJECT_SOURCE_DIR}/varianceExampleBuild.axf")
\ No newline at end of file
diff --git a/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM0/startup_ARMCM0.s b/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM0/startup_ARMCM0.s
new file mode 100644
index 0000000..3333bc6
--- /dev/null
+++ b/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM0/startup_ARMCM0.s
@@ -0,0 +1,159 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM0.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM0 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    ( 22 * 4)                           ; Interrupts 10 .. 31 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM0/system_ARMCM0.c b/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM0/system_ARMCM0.c
new file mode 100644
index 0000000..66a364c
--- /dev/null
+++ b/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM0/system_ARMCM0.c
@@ -0,0 +1,56 @@
+/**************************************************************************//**
+ * @file     system_ARMCM0.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM0 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM0.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM3/startup_ARMCM3.s b/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM3/startup_ARMCM3.s
new file mode 100644
index 0000000..2bf6f19
--- /dev/null
+++ b/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM3/startup_ARMCM3.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM3.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM3 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM3/system_ARMCM3.c b/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM3/system_ARMCM3.c
new file mode 100644
index 0000000..f56b85f
--- /dev/null
+++ b/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM3/system_ARMCM3.c
@@ -0,0 +1,68 @@
+/**************************************************************************//**
+ * @file     system_ARMCM3.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM3 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM3.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s b/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
new file mode 100644
index 0000000..f5270c0
--- /dev/null
+++ b/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM4.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM4 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
new file mode 100644
index 0000000..731facd
--- /dev/null
+++ b/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM4_FP/system_ARMCM4.c
@@ -0,0 +1,83 @@
+/**************************************************************************//**
+ * @file     system_ARMCM4.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM4 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM4)
+  #include "ARMCM4.h"
+#elif defined (ARMCM4_FP)
+  #include "ARMCM4_FP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+  SCB->CPACR |= ((3U << 10U*2U) |           /* enable CP10 Full Access */
+                 (3U << 11U*2U)  );         /* enable CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s b/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
new file mode 100644
index 0000000..abddc8d
--- /dev/null
+++ b/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
@@ -0,0 +1,163 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM7.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM7 Device
+; * @version  V5.3.1
+; * @date     09. July 2018
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+;<h> Stack Configuration
+;  <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Stack_Size      EQU      0x00000400
+
+                AREA     STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem       SPACE    Stack_Size
+__initial_sp
+
+
+;<h> Heap Configuration
+;  <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;</h>
+
+Heap_Size       EQU      0x00000C00
+
+                IF       Heap_Size != 0                      ; Heap is provided
+                AREA     HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE    Heap_Size
+__heap_limit
+                ENDIF
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA     RESET, DATA, READONLY
+                EXPORT   __Vectors
+                EXPORT   __Vectors_End
+                EXPORT   __Vectors_Size
+
+__Vectors       DCD      __initial_sp                        ;     Top of Stack
+                DCD      Reset_Handler                       ;     Reset Handler
+                DCD      NMI_Handler                         ; -14 NMI Handler
+                DCD      HardFault_Handler                   ; -13 Hard Fault Handler
+                DCD      MemManage_Handler                   ; -12 MPU Fault Handler
+                DCD      BusFault_Handler                    ; -11 Bus Fault Handler
+                DCD      UsageFault_Handler                  ; -10 Usage Fault Handler
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      0                                   ;     Reserved
+                DCD      SVC_Handler                         ;  -5 SVCall Handler
+                DCD      DebugMon_Handler                    ;  -4 Debug Monitor Handler
+                DCD      0                                   ;     Reserved
+                DCD      PendSV_Handler                      ;  -2 PendSV Handler
+                DCD      SysTick_Handler                     ;  -1 SysTick Handler
+
+                ; Interrupts
+                DCD      Interrupt0_Handler                  ;   0 Interrupt 0
+                DCD      Interrupt1_Handler                  ;   1 Interrupt 1
+                DCD      Interrupt2_Handler                  ;   2 Interrupt 2
+                DCD      Interrupt3_Handler                  ;   3 Interrupt 3
+                DCD      Interrupt4_Handler                  ;   4 Interrupt 4
+                DCD      Interrupt5_Handler                  ;   5 Interrupt 5
+                DCD      Interrupt6_Handler                  ;   6 Interrupt 6
+                DCD      Interrupt7_Handler                  ;   7 Interrupt 7
+                DCD      Interrupt8_Handler                  ;   8 Interrupt 8
+                DCD      Interrupt9_Handler                  ;   9 Interrupt 9
+
+                SPACE    (214 * 4)                           ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size  EQU      __Vectors_End - __Vectors
+
+
+                AREA     |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT   Reset_Handler             [WEAK]
+                IMPORT   SystemInit
+                IMPORT   __main
+
+                LDR      R0, =SystemInit
+                BLX      R0
+                LDR      R0, =__main
+                BX       R0
+                ENDP
+
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+                MACRO
+                Set_Default_Handler  $Handler_Name
+$Handler_Name   PROC
+                EXPORT   $Handler_Name             [WEAK]
+                B        .
+                ENDP
+                MEND
+
+
+; Default exception/interrupt handler
+
+                Set_Default_Handler  NMI_Handler
+                Set_Default_Handler  HardFault_Handler
+                Set_Default_Handler  MemManage_Handler
+                Set_Default_Handler  BusFault_Handler
+                Set_Default_Handler  UsageFault_Handler
+                Set_Default_Handler  SVC_Handler
+                Set_Default_Handler  DebugMon_Handler
+                Set_Default_Handler  PendSV_Handler
+                Set_Default_Handler  SysTick_Handler
+
+                Set_Default_Handler  Interrupt0_Handler
+                Set_Default_Handler  Interrupt1_Handler
+                Set_Default_Handler  Interrupt2_Handler
+                Set_Default_Handler  Interrupt3_Handler
+                Set_Default_Handler  Interrupt4_Handler
+                Set_Default_Handler  Interrupt5_Handler
+                Set_Default_Handler  Interrupt6_Handler
+                Set_Default_Handler  Interrupt7_Handler
+                Set_Default_Handler  Interrupt8_Handler
+                Set_Default_Handler  Interrupt9_Handler
+
+                ALIGN
+
+
+; User setup Stack & Heap
+
+                EXPORT   __stack_limit
+                EXPORT   __initial_sp
+                IF       Heap_Size != 0                      ; Heap is provided
+                EXPORT   __heap_base
+                EXPORT   __heap_limit
+                ENDIF
+
+                END
diff --git a/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
new file mode 100644
index 0000000..69e2a8d
--- /dev/null
+++ b/DSP/Examples/ARM/arm_variance_example/RTE/Device/ARMCM7_SP/system_ARMCM7.c
@@ -0,0 +1,85 @@
+/**************************************************************************//**
+ * @file     system_ARMCM7.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM7 Device
+ * @version  V5.3.1
+ * @date     09. July 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM7)
+  #include "ARMCM7.h"
+#elif defined (ARMCM7_SP)
+  #include "ARMCM7_SP.h"
+#elif defined (ARMCM7_DP)
+  #include "ARMCM7_DP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            (50000000UL)     /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (XTAL / 2U)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;  /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+  SCB->CPACR |= ((3U << 10U*2U) |           /* enable CP10 Full Access */
+                 (3U << 11U*2U)  );         /* enable CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/DSP/Examples/ARM/arm_variance_example/arm_variance_example_f32.c b/DSP/Examples/ARM/arm_variance_example/arm_variance_example_f32.c
index b067a84..13dde7b 100644
--- a/DSP/Examples/ARM/arm_variance_example/arm_variance_example_f32.c
+++ b/DSP/Examples/ARM/arm_variance_example/arm_variance_example_f32.c
@@ -90,6 +90,7 @@
 
 /** \example arm_variance_example_f32.c
   */
+
 #include <math.h>
 #include "arm_math.h"
 
@@ -144,6 +145,11 @@
 
   status = ARM_MATH_SUCCESS;
 
+#if defined(FILEIO)
+  printf("START\n");
+#endif
+
+ 
   /* Calculation of mean value of input */
 
   /* x' = 1/blockSize * (x(0)* 1 + x(1) * 1 + ... + x(n-1) * 1) */
@@ -188,17 +194,32 @@
   diff = fabsf(refVarianceOut - variance);
 
   /* Comparison of variance value with reference */
+  
   if (diff > DELTA)
   {
     status = ARM_MATH_TEST_FAILURE;
   }
 
+
+#if !defined(FILEIO)
   if ( status != ARM_MATH_SUCCESS)
   {
     while (1);
   }
 
-  while (1);                             /* main function does not return */
+  while (1);                            /* main function does not return */
+#else
+  if (status == ARM_MATH_SUCCESS)
+  {
+     printf("SUCCESS\n");
+  }
+  else
+  {
+     printf("FAILURE\n");
+  }
+#endif
 }
 
  /** \endlink */
+
+
diff --git a/DSP/Examples/ARM/arm_variance_example/buildmake.bat b/DSP/Examples/ARM/arm_variance_example/buildmake.bat
new file mode 100644
index 0000000..8ee72d2
--- /dev/null
+++ b/DSP/Examples/ARM/arm_variance_example/buildmake.bat
@@ -0,0 +1,16 @@
+REM Example cmake command.
+cmake -DBASICMATH=OFF ^
+-DCOMPLEXMATH=OFF ^
+-DCONTROLLER=OFF ^
+-DFASTMATH=OFF ^
+-DFILTERING=ON ^
+-DMATRIX=OFF ^
+-DSTATISTICS=OFF ^
+-DSUPPORT=OFF ^
+-DTRANSFORM=OFF ^
+-DCONFIGTABLE=ON ^
+-DARM_LMS_NORM_Q15=ON ^
+-DCMAKE_TOOLCHAIN_FILE=../../../../armcc.cmake ^
+-DNEON=ON ^
+-DARM_CPU="cortex-a5" ^
+-G "Unix Makefiles" ..
\ No newline at end of file
diff --git a/DSP/Examples/ARM/arm_variance_example/run.bat b/DSP/Examples/ARM/arm_variance_example/run.bat
new file mode 100644
index 0000000..a7d2f34
--- /dev/null
+++ b/DSP/Examples/ARM/arm_variance_example/run.bat
@@ -0,0 +1,6 @@
+REM Example commands to run on ArmDS FVP
+
+REM "C:\Program Files\ARM\Development Studio 2019.0\sw\models\bin\FVP_MPS2_Cortex-M7.exe" -a arm_variance_example
+
+"C:\Program Files\ARM\Development Studio 2019.0\sw\models\bin\FVP_VE_Cortex-A5x1.exe" -a arm_variance_example
+
diff --git a/DSP/Examples/ARM/boot/RTE_Components.h b/DSP/Examples/ARM/boot/RTE_Components.h
new file mode 100644
index 0000000..db747a6
--- /dev/null
+++ b/DSP/Examples/ARM/boot/RTE_Components.h
@@ -0,0 +1,5 @@
+#ifndef RTE_COMPONENTS_H
+#define RTE_COMPONENTS_H
+
+
+#endif /* RTE_COMPONENTS_H */
\ No newline at end of file
diff --git a/DSP/Include/arm_common_tables.h b/DSP/Include/arm_common_tables.h
index dfea746..6a4337f 100644
--- a/DSP/Include/arm_common_tables.h
+++ b/DSP/Include/arm_common_tables.h
@@ -31,91 +31,348 @@
 
 #include "arm_math.h"
 
-extern const uint16_t armBitRevTable[1024];
-extern const q15_t armRecipTableQ15[64];
-extern const q31_t armRecipTableQ31[64];
-extern const float32_t twiddleCoef_16[32];
-extern const float32_t twiddleCoef_32[64];
-extern const float32_t twiddleCoef_64[128];
-extern const float32_t twiddleCoef_128[256];
-extern const float32_t twiddleCoef_256[512];
-extern const float32_t twiddleCoef_512[1024];
-extern const float32_t twiddleCoef_1024[2048];
-extern const float32_t twiddleCoef_2048[4096];
-extern const float32_t twiddleCoef_4096[8192];
-#define twiddleCoef twiddleCoef_4096
-extern const q31_t twiddleCoef_16_q31[24];
-extern const q31_t twiddleCoef_32_q31[48];
-extern const q31_t twiddleCoef_64_q31[96];
-extern const q31_t twiddleCoef_128_q31[192];
-extern const q31_t twiddleCoef_256_q31[384];
-extern const q31_t twiddleCoef_512_q31[768];
-extern const q31_t twiddleCoef_1024_q31[1536];
-extern const q31_t twiddleCoef_2048_q31[3072];
-extern const q31_t twiddleCoef_4096_q31[6144];
-extern const q15_t twiddleCoef_16_q15[24];
-extern const q15_t twiddleCoef_32_q15[48];
-extern const q15_t twiddleCoef_64_q15[96];
-extern const q15_t twiddleCoef_128_q15[192];
-extern const q15_t twiddleCoef_256_q15[384];
-extern const q15_t twiddleCoef_512_q15[768];
-extern const q15_t twiddleCoef_1024_q15[1536];
-extern const q15_t twiddleCoef_2048_q15[3072];
-extern const q15_t twiddleCoef_4096_q15[6144];
-extern const float32_t twiddleCoef_rfft_32[32];
-extern const float32_t twiddleCoef_rfft_64[64];
-extern const float32_t twiddleCoef_rfft_128[128];
-extern const float32_t twiddleCoef_rfft_256[256];
-extern const float32_t twiddleCoef_rfft_512[512];
-extern const float32_t twiddleCoef_rfft_1024[1024];
-extern const float32_t twiddleCoef_rfft_2048[2048];
-extern const float32_t twiddleCoef_rfft_4096[4096];
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) 
 
-/* floating-point bit reversal tables */
-#define ARMBITREVINDEXTABLE_16_TABLE_LENGTH ((uint16_t)20)
-#define ARMBITREVINDEXTABLE_32_TABLE_LENGTH ((uint16_t)48)
-#define ARMBITREVINDEXTABLE_64_TABLE_LENGTH ((uint16_t)56)
-#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208)
-#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440)
-#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448)
-#define ARMBITREVINDEXTABLE_1024_TABLE_LENGTH ((uint16_t)1800)
-#define ARMBITREVINDEXTABLE_2048_TABLE_LENGTH ((uint16_t)3808)
-#define ARMBITREVINDEXTABLE_4096_TABLE_LENGTH ((uint16_t)4032)
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024)
+    extern const uint16_t armBitRevTable[1024];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
-extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH];
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_16)
+    extern const float32_t twiddleCoef_16[32];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_32)
+    extern const float32_t twiddleCoef_32[64];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_64)
+    extern const float32_t twiddleCoef_64[128];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_128)
+    extern const float32_t twiddleCoef_128[256];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_256)
+    extern const float32_t twiddleCoef_256[512];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_512)
+    extern const float32_t twiddleCoef_512[1024];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_1024)
+    extern const float32_t twiddleCoef_1024[2048];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048)
+    extern const float32_t twiddleCoef_2048[4096];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096)
+    extern const float32_t twiddleCoef_4096[8192];
+    #define twiddleCoef twiddleCoef_4096
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_16)
+    extern const q31_t twiddleCoef_16_q31[24];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_32)
+    extern const q31_t twiddleCoef_32_q31[48];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_64)
+    extern const q31_t twiddleCoef_64_q31[96];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_128)
+    extern const q31_t twiddleCoef_128_q31[192];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_256)
+    extern const q31_t twiddleCoef_256_q31[384];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_512)
+    extern const q31_t twiddleCoef_512_q31[768];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_1024)
+    extern const q31_t twiddleCoef_1024_q31[1536];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_2048)
+    extern const q31_t twiddleCoef_2048_q31[3072];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096)
+    extern const q31_t twiddleCoef_4096_q31[6144];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_16)
+    extern const q15_t twiddleCoef_16_q15[24];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_32)
+    extern const q15_t twiddleCoef_32_q15[48];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_64)
+    extern const q15_t twiddleCoef_64_q15[96];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_128)
+    extern const q15_t twiddleCoef_128_q15[192];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_256)
+    extern const q15_t twiddleCoef_256_q15[384];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_512)
+    extern const q15_t twiddleCoef_512_q15[768];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_1024)
+    extern const q15_t twiddleCoef_1024_q15[1536];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_2048)
+    extern const q15_t twiddleCoef_2048_q15[3072];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096)
+    extern const q15_t twiddleCoef_4096_q15[6144];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32)
+    extern const float32_t twiddleCoef_rfft_32[32];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64)
+    extern const float32_t twiddleCoef_rfft_64[64];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128)
+    extern const float32_t twiddleCoef_rfft_128[128];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256)
+    extern const float32_t twiddleCoef_rfft_256[256];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512)
+    extern const float32_t twiddleCoef_rfft_512[512];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024)
+    extern const float32_t twiddleCoef_rfft_1024[1024];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048)
+    extern const float32_t twiddleCoef_rfft_2048[2048];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096)
+    extern const float32_t twiddleCoef_rfft_4096[4096];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  /* floating-point bit reversal tables */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_16)
+    #define ARMBITREVINDEXTABLE_16_TABLE_LENGTH ((uint16_t)20)
+    extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_32)
+    #define ARMBITREVINDEXTABLE_32_TABLE_LENGTH ((uint16_t)48)
+    extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_64)
+    #define ARMBITREVINDEXTABLE_64_TABLE_LENGTH ((uint16_t)56)
+    extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_128)
+    #define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208)
+    extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_256)
+    #define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440)
+    extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_512)
+    #define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448)
+    extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_1024)
+    #define ARMBITREVINDEXTABLE_1024_TABLE_LENGTH ((uint16_t)1800)
+    extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_2048)
+    #define ARMBITREVINDEXTABLE_2048_TABLE_LENGTH ((uint16_t)3808)
+    extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_4096)
+    #define ARMBITREVINDEXTABLE_4096_TABLE_LENGTH ((uint16_t)4032)
+    extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  
+  /* fixed-point bit reversal tables */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_16)
+    #define ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH ((uint16_t)12)
+    extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_32)
+    #define ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH ((uint16_t)24)
+    extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_64)
+    #define ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH ((uint16_t)56)
+    extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_128)
+    #define ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH ((uint16_t)112)
+    extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_256)
+    #define ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH ((uint16_t)240)
+    extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_512)
+    #define ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH ((uint16_t)480)
+    extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_1024)
+    #define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992)
+    extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_2048)
+    #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
+    extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_4096)
+    #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
+    extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
-/* fixed-point bit reversal tables */
-#define ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH ((uint16_t)12)
-#define ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH ((uint16_t)24)
-#define ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH ((uint16_t)56)
-#define ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH ((uint16_t)112)
-#define ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH ((uint16_t)240)
-#define ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH ((uint16_t)480)
-#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992)
-#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
-#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_F32)
+    extern const float32_t realCoefA[8192];
+    extern const float32_t realCoefB[8192];
+  #endif
 
-extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q31)
+    extern const q31_t realCoefAQ31[8192];
+    extern const q31_t realCoefBQ31[8192];
+  #endif
 
-/* Tables for Fast Math Sine and Cosine */
-extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
-extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
-extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q15)
+    extern const q15_t realCoefAQ15[8192];
+    extern const q15_t realCoefBQ15[8192];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_128)
+    extern const float32_t Weights_128[256];
+    extern const float32_t cos_factors_128[128];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_512)
+    extern const float32_t Weights_512[1024];
+    extern const float32_t cos_factors_512[512];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_2048)
+    extern const float32_t Weights_2048[4096];
+    extern const float32_t cos_factors_2048[2048];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_8192)
+    extern const float32_t Weights_8192[16384];
+    extern const float32_t cos_factors_8192[8192];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_128)
+    extern const q15_t WeightsQ15_128[256];
+    extern const q15_t cos_factorsQ15_128[128];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_512)
+    extern const q15_t WeightsQ15_512[1024];
+    extern const q15_t cos_factorsQ15_512[512];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_2048)
+    extern const q15_t WeightsQ15_2048[4096];
+    extern const q15_t cos_factorsQ15_2048[2048];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_8192)
+    extern const q15_t WeightsQ15_8192[16384];
+    extern const q15_t cos_factorsQ15_8192[8192];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_128)  
+    extern const q31_t WeightsQ31_128[256];
+    extern const q31_t cos_factorsQ31_128[128];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_512) 
+    extern const q31_t WeightsQ31_512[1024];
+    extern const q31_t cos_factorsQ31_512[512];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_2048) 
+    extern const q31_t WeightsQ31_2048[4096];
+    extern const q31_t cos_factorsQ31_2048[2048];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_8192) 
+    extern const q31_t WeightsQ31_8192[16384];
+    extern const q31_t cos_factorsQ31_8192[8192];
+  #endif
+    
+#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_ALLOW_TABLES)
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q15)
+    extern const q15_t armRecipTableQ15[64];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q31)
+    extern const q31_t armRecipTableQ31[64];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
+  
+  /* Tables for Fast Math Sine and Cosine */
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_F32)
+    extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q31)
+    extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q15)
+    extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
+
+#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_TABLES) */
 
 #endif /*  ARM_COMMON_TABLES_H */
diff --git a/DSP/Include/arm_math.h b/DSP/Include/arm_math.h
index ea9dd26..eb37f82 100644
--- a/DSP/Include/arm_math.h
+++ b/DSP/Include/arm_math.h
@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     arm_math.h
- * @brief    Public header file for CMSIS DSP LibraryU
- * @version  V1.5.3
- * @date     10. January 2018
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.6.0
+ * @date     18. March 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2010-2018 Arm Limited or its affiliates. All rights reserved.
+ * Copyright (c) 2010-2019 Arm Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -37,7 +37,7 @@
    * - Complex math functions
    * - Filters
    * - Matrix functions
-   * - Transforms
+   * - Transform functions
    * - Motor control functions
    * - Statistical functions
    * - Support functions
@@ -73,11 +73,7 @@
    * The library functions are declared in the public file <code>arm_math.h</code> which is placed in the <code>Include</code> folder.
    * Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single
    * public header file <code> arm_math.h</code> for Cortex-M cores with little endian and big endian. Same header file will be used for floating point unit(FPU) variants.
-   * Define the appropriate preprocessor macro ARM_MATH_CM7 or ARM_MATH_CM4 or ARM_MATH_CM3 or
-   * ARM_MATH_CM0 or ARM_MATH_CM0PLUS depending on the target processor in the application.
-   * For Armv8-M cores define preprocessor macro ARM_MATH_ARMV8MBL or ARM_MATH_ARMV8MML.
-   * Set preprocessor macro __DSP_PRESENT if Armv8-M Mainline core supports DSP instructions.
-   * 
+   *
    *
    * Examples
    * --------
@@ -93,7 +89,7 @@
    * Building the Library
    * ------------
    *
-   * The library installer contains a project file to rebuild libraries on MDK toolchain in the <code>CMSIS\\DSP_Lib\\Source\\ARM</code> folder.
+   * The library installer contains a project file to rebuild libraries on MDK toolchain in the <code>CMSIS\\DSP\\Projects\\ARM</code> folder.
    * - arm_cortexM_math.uvprojx
    *
    *
@@ -104,10 +100,6 @@
    *
    * Each library project have different preprocessor macros.
    *
-   * - UNALIGNED_SUPPORT_DISABLE:
-   *
-   * Define macro UNALIGNED_SUPPORT_DISABLE, If the silicon does not support unaligned memory access
-   *
    * - ARM_MATH_BIG_ENDIAN:
    *
    * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets.
@@ -120,46 +112,41 @@
    *
    * Define macro ARM_MATH_ROUNDING for rounding on support functions
    *
-   * - ARM_MATH_CMx:
+   * - ARM_MATH_LOOPUNROLL:
    *
-   * Define macro ARM_MATH_CM4 for building the library on Cortex-M4 target, ARM_MATH_CM3 for building library on Cortex-M3 target
-   * and ARM_MATH_CM0 for building library on Cortex-M0 target, ARM_MATH_CM0PLUS for building library on Cortex-M0+ target, and
-   * ARM_MATH_CM7 for building the library on cortex-M7.
+   * Define macro ARM_MATH_LOOPUNROLL to enable manual loop unrolling in DSP functions
    *
-   * - ARM_MATH_ARMV8MxL:
+   * - ARM_MATH_NEON:
    *
-   * Define macro ARM_MATH_ARMV8MBL for building the library on Armv8-M Baseline target, ARM_MATH_ARMV8MML for building library
-   * on Armv8-M Mainline target.
+   * Define macro ARM_MATH_NEON to enable Neon versions of the DSP functions.
+   * It is not enabled by default when Neon is available because performances are 
+   * dependent on the compiler and target architecture.
    *
-   * - __FPU_PRESENT:
+   * - ARM_MATH_NEON_EXPERIMENTAL:
    *
-   * Initialize macro __FPU_PRESENT = 1 when building on FPU supported Targets. Enable this macro for floating point libraries.
-   *
-   * - __DSP_PRESENT:
-   *
-   * Initialize macro __DSP_PRESENT = 1 when Armv8-M Mainline core supports DSP instructions.
+   * Define macro ARM_MATH_NEON_EXPERIMENTAL to enable experimental Neon versions of 
+   * of some DSP functions. Experimental Neon versions currently do not have better
+   * performances than the scalar versions.
    *
    * <hr>
    * CMSIS-DSP in ARM::CMSIS Pack
    * -----------------------------
    *
    * The following files relevant to CMSIS-DSP are present in the <b>ARM::CMSIS</b> Pack directories:
-   * |File/Folder                   |Content                                                                 |
-   * |------------------------------|------------------------------------------------------------------------|
-   * |\b CMSIS\\Documentation\\DSP  | This documentation                                                     |
-   * |\b CMSIS\\DSP_Lib             | Software license agreement (license.txt)                               |
-   * |\b CMSIS\\DSP_Lib\\Examples   | Example projects demonstrating the usage of the library functions      |
-   * |\b CMSIS\\DSP_Lib\\Source     | Source files for rebuilding the library                                |
+   * |File/Folder                      |Content                                                                 |
+   * |---------------------------------|------------------------------------------------------------------------|
+   * |\b CMSIS\\Documentation\\DSP     | This documentation                                                     |
+   * |\b CMSIS\\DSP\\DSP_Lib_TestSuite | DSP_Lib test suite                                                     |
+   * |\b CMSIS\\DSP\\Examples          | Example projects demonstrating the usage of the library functions      |
+   * |\b CMSIS\\DSP\\Include           | DSP_Lib include files                                                  |
+   * |\b CMSIS\\DSP\\Lib               | DSP_Lib binaries                                                       |
+   * |\b CMSIS\\DSP\\Projects          | Projects to rebuild DSP_Lib binaries                                   |
+   * |\b CMSIS\\DSP\\Source            | DSP_Lib source files                                                   |
    *
    * <hr>
    * Revision History of CMSIS-DSP
    * ------------
    * Please refer to \ref ChangeLog_pg.
-   *
-   * Copyright Notice
-   * ------------
-   *
-   * Copyright (C) 2010-2015 Arm Limited. All rights reserved.
    */
 
 
@@ -220,8 +207,8 @@
  * There is an associated initialization function for each type of matrix
  * data structure.
  * The initialization function sets the values of the internal structure fields.
- * Refer to the function <code>arm_mat_init_f32()</code>, <code>arm_mat_init_q31()</code>
- * and <code>arm_mat_init_q15()</code> for floating-point, Q31 and Q15 types,  respectively.
+ * Refer to \ref arm_mat_init_f32(), \ref arm_mat_init_q31() and \ref arm_mat_init_q15()
+ * for floating-point, Q31 and Q15 types,  respectively.
  *
  * \par
  * Use of the initialization function is optional. However, if initialization function is used
@@ -272,6 +259,7 @@
 /**
  * @defgroup groupStats Statistics Functions
  */
+
 /**
  * @defgroup groupSupport Support Functions
  */
@@ -286,6 +274,8 @@
 /**
  * @defgroup groupExamples Examples
  */
+
+
 #ifndef _ARM_MATH_H
 #define _ARM_MATH_H
 
@@ -295,10 +285,10 @@
 #elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
 
 #elif defined ( __GNUC__ )
-#pragma GCC diagnostic push
-#pragma GCC diagnostic ignored "-Wsign-conversion"
-#pragma GCC diagnostic ignored "-Wconversion"
-#pragma GCC diagnostic ignored "-Wunused-parameter"
+  #pragma GCC diagnostic push
+  #pragma GCC diagnostic ignored "-Wsign-conversion"
+  #pragma GCC diagnostic ignored "-Wconversion"
+  #pragma GCC diagnostic ignored "-Wunused-parameter"
 
 #elif defined ( __ICCARM__ )
 
@@ -308,42 +298,40 @@
 
 #elif defined ( __TASKING__ )
 
+#elif defined ( _MSC_VER )
+
 #else
   #error Unknown compiler
 #endif
 
 
-#define __CMSIS_GENERIC         /* disable NVIC and Systick functions */
-
-#if defined(ARM_MATH_CM7)
-  #include "core_cm7.h"
-  #define ARM_MATH_DSP
-#elif defined (ARM_MATH_CM4)
-  #include "core_cm4.h"
-  #define ARM_MATH_DSP
-#elif defined (ARM_MATH_CM3)
-  #include "core_cm3.h"
-#elif defined (ARM_MATH_CM0)
-  #include "core_cm0.h"
-  #define ARM_MATH_CM0_FAMILY
-#elif defined (ARM_MATH_CM0PLUS)
-  #include "core_cm0plus.h"
-  #define ARM_MATH_CM0_FAMILY
-#elif defined (ARM_MATH_ARMV8MBL)
-  #include "core_armv8mbl.h"
-  #define ARM_MATH_CM0_FAMILY
-#elif defined (ARM_MATH_ARMV8MML)
-  #include "core_armv8mml.h"
-  #if (defined (__DSP_PRESENT) && (__DSP_PRESENT == 1))
-    #define ARM_MATH_DSP
-  #endif
+/* Included for instrinsics definitions */
+#if !defined ( _MSC_VER )
+#include "cmsis_compiler.h"
 #else
-  #error "Define according the used Cortex core ARM_MATH_CM7, ARM_MATH_CM4, ARM_MATH_CM3, ARM_MATH_CM0PLUS, ARM_MATH_CM0, ARM_MATH_ARMV8MBL, ARM_MATH_ARMV8MML"
+#include <stdint.h>
+#define __STATIC_FORCEINLINE static __forceinline
+#define __ALIGNED(x) __declspec(align(x))
+#define LOW_OPTIMIZATION_ENTER
+#define LOW_OPTIMIZATION_EXIT
+#define IAR_ONLY_LOW_OPTIMIZATION_ENTER 
+#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
 #endif
 
-#undef  __CMSIS_GENERIC         /* enable NVIC and Systick functions */
 #include "string.h"
 #include "math.h"
+#include "float.h"
+
+/* evaluate ARM DSP feature */
+#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
+  #define ARM_MATH_DSP                   1
+#endif
+
+#if defined(__ARM_NEON)
+#include <arm_neon.h>
+#endif
+
+
 #ifdef   __cplusplus
 extern "C"
 {
@@ -379,18 +367,6 @@
   /* -1 to +1 is divided into 360 values so total spacing is (2/360) */
 #define INPUT_SPACING         0xB60B61
 
-  /**
-   * @brief Macro for Unaligned Support
-   */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-    #define ALIGN4
-#else
-  #if defined  (__GNUC__)
-    #define ALIGN4 __attribute__((aligned(4)))
-  #else
-    #define ALIGN4 __align(4)
-  #endif
-#endif   /* #ifndef UNALIGNED_SUPPORT_DISABLE */
 
   /**
    * @brief Error status returned by some functions in the library.
@@ -398,13 +374,13 @@
 
   typedef enum
   {
-    ARM_MATH_SUCCESS = 0,                /**< No error */
+    ARM_MATH_SUCCESS        =  0,        /**< No error */
     ARM_MATH_ARGUMENT_ERROR = -1,        /**< One or more arguments are incorrect */
-    ARM_MATH_LENGTH_ERROR = -2,          /**< Length of data buffer is incorrect */
-    ARM_MATH_SIZE_MISMATCH = -3,         /**< Size of matrices is not compatible with the operation. */
-    ARM_MATH_NANINF = -4,                /**< Not-a-number (NaN) or infinity is generated */
-    ARM_MATH_SINGULAR = -5,              /**< Generated by matrix inversion if the input matrix is singular and cannot be inverted. */
-    ARM_MATH_TEST_FAILURE = -6           /**< Test Failed  */
+    ARM_MATH_LENGTH_ERROR   = -2,        /**< Length of data buffer is incorrect */
+    ARM_MATH_SIZE_MISMATCH  = -3,        /**< Size of matrices is not compatible with the operation */
+    ARM_MATH_NANINF         = -4,        /**< Not-a-number (NaN) or infinity is generated */
+    ARM_MATH_SINGULAR       = -5,        /**< Input matrix is singular and cannot be inverted */
+    ARM_MATH_TEST_FAILURE   = -6         /**< Test Failed */
   } arm_status;
 
   /**
@@ -437,87 +413,261 @@
    */
   typedef double float64_t;
 
-  /**
-   * @brief definition to read/write two 16 bit values.
-   */
+
+/**
+  @brief definition to read/write two 16 bit values.
+  @deprecated
+ */
 #if   defined ( __CC_ARM )
   #define __SIMD32_TYPE int32_t __packed
-  #define CMSIS_UNUSED __attribute__((unused))
-  #define CMSIS_INLINE __attribute__((always_inline))
-
 #elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
   #define __SIMD32_TYPE int32_t
-  #define CMSIS_UNUSED __attribute__((unused))
-  #define CMSIS_INLINE __attribute__((always_inline))
-
 #elif defined ( __GNUC__ )
   #define __SIMD32_TYPE int32_t
-  #define CMSIS_UNUSED __attribute__((unused))
-  #define CMSIS_INLINE __attribute__((always_inline))
-
 #elif defined ( __ICCARM__ )
   #define __SIMD32_TYPE int32_t __packed
-  #define CMSIS_UNUSED
-  #define CMSIS_INLINE
-
 #elif defined ( __TI_ARM__ )
   #define __SIMD32_TYPE int32_t
-  #define CMSIS_UNUSED __attribute__((unused))
-  #define CMSIS_INLINE
-
 #elif defined ( __CSMC__ )
   #define __SIMD32_TYPE int32_t
-  #define CMSIS_UNUSED
-  #define CMSIS_INLINE
-
 #elif defined ( __TASKING__ )
-  #define __SIMD32_TYPE __unaligned int32_t
-  #define CMSIS_UNUSED
-  #define CMSIS_INLINE
-
+  #define __SIMD32_TYPE __un(aligned) int32_t
+#elif defined(_MSC_VER )
+  #define __SIMD32_TYPE int32_t
 #else
   #error Unknown compiler
 #endif
 
 #define __SIMD32(addr)        (*(__SIMD32_TYPE **) & (addr))
-#define __SIMD32_CONST(addr)  ((__SIMD32_TYPE *)(addr))
-#define _SIMD32_OFFSET(addr)  (*(__SIMD32_TYPE *)  (addr))
-#define __SIMD64(addr)        (*(int64_t **) & (addr))
+#define __SIMD32_CONST(addr)  ( (__SIMD32_TYPE * )   (addr))
+#define _SIMD32_OFFSET(addr)  (*(__SIMD32_TYPE * )   (addr))
+#define __SIMD64(addr)        (*(      int64_t **) & (addr))
 
-#if !defined (ARM_MATH_DSP)
+/* SIMD replacement */
+
+
+/**
+  @brief         Read 2 Q15 from Q15 pointer.
+  @param[in]     pQ15      points to input value
+  @return        Q31 value
+ */
+__STATIC_FORCEINLINE q31_t read_q15x2 (
+  q15_t * pQ15)
+{
+  q31_t val;
+
+  memcpy (&val, pQ15, 4);
+
+  return (val);
+}
+
+/**
+  @brief         Read 2 Q15 from Q15 pointer and increment pointer afterwards.
+  @param[in]     pQ15      points to input value
+  @return        Q31 value
+ */
+__STATIC_FORCEINLINE q31_t read_q15x2_ia (
+  q15_t ** pQ15)
+{
+  q31_t val;
+
+  memcpy (&val, *pQ15, 4);
+  *pQ15 += 2;
+
+  return (val);
+}
+
+/**
+  @brief         Read 2 Q15 from Q15 pointer and decrement pointer afterwards.
+  @param[in]     pQ15      points to input value
+  @return        Q31 value
+ */
+__STATIC_FORCEINLINE q31_t read_q15x2_da (
+  q15_t ** pQ15)
+{
+  q31_t val;
+
+  memcpy (&val, *pQ15, 4);
+  *pQ15 -= 2;
+
+  return (val);
+}
+
+/**
+  @brief         Write 2 Q15 to Q15 pointer and increment pointer afterwards.
+  @param[in]     pQ15      points to input value
+  @param[in]     value     Q31 value
+  @return        none
+ */
+__STATIC_FORCEINLINE void write_q15x2_ia (
+  q15_t ** pQ15,
+  q31_t    value)
+{
+  q31_t val = value;
+
+  memcpy (*pQ15, &val, 4);
+  *pQ15 += 2;
+}
+
+/**
+  @brief         Write 2 Q15 to Q15 pointer.
+  @param[in]     pQ15      points to input value
+  @param[in]     value     Q31 value
+  @return        none
+ */
+__STATIC_FORCEINLINE void write_q15x2 (
+  q15_t * pQ15,
+  q31_t   value)
+{
+  q31_t val = value;
+
+  memcpy (pQ15, &val, 4);
+}
+
+
+/**
+  @brief         Read 4 Q7 from Q7 pointer and increment pointer afterwards.
+  @param[in]     pQ7       points to input value
+  @return        Q31 value
+ */
+__STATIC_FORCEINLINE q31_t read_q7x4_ia (
+  q7_t ** pQ7)
+{
+  q31_t val;
+
+  memcpy (&val, *pQ7, 4);
+  *pQ7 += 4;
+
+  return (val);
+}
+
+/**
+  @brief         Read 4 Q7 from Q7 pointer and decrement pointer afterwards.
+  @param[in]     pQ7       points to input value
+  @return        Q31 value
+ */
+__STATIC_FORCEINLINE q31_t read_q7x4_da (
+  q7_t ** pQ7)
+{
+  q31_t val;
+
+  memcpy (&val, *pQ7, 4);
+  *pQ7 -= 4;
+
+  return (val);
+}
+
+/**
+  @brief         Write 4 Q7 to Q7 pointer and increment pointer afterwards.
+  @param[in]     pQ7       points to input value
+  @param[in]     value     Q31 value
+  @return        none
+ */
+__STATIC_FORCEINLINE void write_q7x4_ia (
+  q7_t ** pQ7,
+  q31_t   value)
+{
+  q31_t val = value;
+
+  memcpy (*pQ7, &val, 4);
+  *pQ7 += 4;
+}
+
+/*
+
+Normally those kind of definitions are in a compiler file
+in Core or Core_A.
+
+But for MSVC compiler it is a bit special. The goal is very specific
+to CMSIS-DSP and only to allow the use of this library from other
+systems like Python or Matlab.
+
+MSVC is not going to be used to cross-compile to ARM. So, having a MSVC
+compiler file in Core or Core_A would not make sense.
+
+*/
+#if defined ( _MSC_VER )
+    __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t data)
+    {
+      if (data == 0U) { return 32U; }
+
+      uint32_t count = 0U;
+      uint32_t mask = 0x80000000U;
+
+      while ((data & mask) == 0U)
+      {
+        count += 1U;
+        mask = mask >> 1U;
+      }
+      return count;
+    }
+
+  __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
+  {
+    if ((sat >= 1U) && (sat <= 32U))
+    {
+      const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
+      const int32_t min = -1 - max ;
+      if (val > max)
+      {
+        return max;
+      }
+      else if (val < min)
+      {
+        return min;
+      }
+    }
+    return val;
+  }
+
+  __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
+  {
+    if (sat <= 31U)
+    {
+      const uint32_t max = ((1U << sat) - 1U);
+      if (val > (int32_t)max)
+      {
+        return max;
+      }
+      else if (val < 0)
+      {
+        return 0U;
+      }
+    }
+    return (uint32_t)val;
+  }
+#endif
+
+#ifndef ARM_MATH_DSP
   /**
    * @brief definition to pack two 16 bit values.
    */
-#define __PKHBT(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) <<    0) & (int32_t)0x0000FFFF) | \
-                                    (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000)  )
-#define __PKHTB(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) <<    0) & (int32_t)0xFFFF0000) | \
-                                    (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF)  )
-
-#endif /* !defined (ARM_MATH_DSP) */
+  #define __PKHBT(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) <<    0) & (int32_t)0x0000FFFF) | \
+                                      (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000)  )
+  #define __PKHTB(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) <<    0) & (int32_t)0xFFFF0000) | \
+                                      (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF)  )
+#endif
 
    /**
    * @brief definition to pack four 8 bit values.
    */
 #ifndef ARM_MATH_BIG_ENDIAN
-
-#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) <<  0) & (int32_t)0x000000FF) | \
-                                (((int32_t)(v1) <<  8) & (int32_t)0x0000FF00) | \
-                                (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \
-                                (((int32_t)(v3) << 24) & (int32_t)0xFF000000)  )
+  #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) <<  0) & (int32_t)0x000000FF) | \
+                                  (((int32_t)(v1) <<  8) & (int32_t)0x0000FF00) | \
+                                  (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \
+                                  (((int32_t)(v3) << 24) & (int32_t)0xFF000000)  )
 #else
-
-#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) <<  0) & (int32_t)0x000000FF) | \
-                                (((int32_t)(v2) <<  8) & (int32_t)0x0000FF00) | \
-                                (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \
-                                (((int32_t)(v0) << 24) & (int32_t)0xFF000000)  )
-
+  #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) <<  0) & (int32_t)0x000000FF) | \
+                                  (((int32_t)(v2) <<  8) & (int32_t)0x0000FF00) | \
+                                  (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \
+                                  (((int32_t)(v0) << 24) & (int32_t)0xFF000000)  )
 #endif
 
 
   /**
    * @brief Clips Q63 to Q31 values.
    */
-  CMSIS_INLINE __STATIC_INLINE q31_t clip_q63_to_q31(
+  __STATIC_FORCEINLINE q31_t clip_q63_to_q31(
   q63_t x)
   {
     return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
@@ -527,7 +677,7 @@
   /**
    * @brief Clips Q63 to Q15 values.
    */
-  CMSIS_INLINE __STATIC_INLINE q15_t clip_q63_to_q15(
+  __STATIC_FORCEINLINE q15_t clip_q63_to_q15(
   q63_t x)
   {
     return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
@@ -537,7 +687,7 @@
   /**
    * @brief Clips Q31 to Q7 values.
    */
-  CMSIS_INLINE __STATIC_INLINE q7_t clip_q31_to_q7(
+  __STATIC_FORCEINLINE q7_t clip_q31_to_q7(
   q31_t x)
   {
     return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ?
@@ -547,7 +697,7 @@
   /**
    * @brief Clips Q31 to Q15 values.
    */
-  CMSIS_INLINE __STATIC_INLINE q15_t clip_q31_to_q15(
+  __STATIC_FORCEINLINE q15_t clip_q31_to_q15(
   q31_t x)
   {
     return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ?
@@ -557,23 +707,21 @@
   /**
    * @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format.
    */
-
-  CMSIS_INLINE __STATIC_INLINE q63_t mult32x64(
+  __STATIC_FORCEINLINE q63_t mult32x64(
   q63_t x,
   q31_t y)
   {
     return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) +
-            (((q63_t) (x >> 32) * y)));
+            (((q63_t) (x >> 32)                * y)      )  );
   }
 
   /**
    * @brief Function to Calculates 1/in (reciprocal) value of Q31 Data type.
    */
-
-  CMSIS_INLINE __STATIC_INLINE uint32_t arm_recip_q31(
-  q31_t in,
-  q31_t * dst,
-  q31_t * pRecipTable)
+  __STATIC_FORCEINLINE uint32_t arm_recip_q31(
+        q31_t in,
+        q31_t * dst,
+  const q31_t * pRecipTable)
   {
     q31_t out;
     uint32_t tempVal;
@@ -621,10 +769,10 @@
   /**
    * @brief Function to Calculates 1/in (reciprocal) value of Q15 Data type.
    */
-  CMSIS_INLINE __STATIC_INLINE uint32_t arm_recip_q15(
-  q15_t in,
-  q15_t * dst,
-  q15_t * pRecipTable)
+  __STATIC_FORCEINLINE uint32_t arm_recip_q15(
+        q15_t in,
+        q15_t * dst,
+  const q15_t * pRecipTable)
   {
     q15_t out = 0;
     uint32_t tempVal = 0;
@@ -668,16 +816,55 @@
     return (signBits + 1);
   }
 
+#if defined(ARM_MATH_NEON)
+
+static inline float32x4_t __arm_vec_sqrt_f32_neon(float32x4_t  x)
+{
+    float32x4_t x1 = vmaxq_f32(x, vdupq_n_f32(FLT_MIN));
+    float32x4_t e = vrsqrteq_f32(x1);
+    e = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x1, e), e), e);
+    e = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x1, e), e), e);
+    return vmulq_f32(x, e);
+}
+
+static inline int16x8_t __arm_vec_sqrt_q15_neon(int16x8_t vec)
+{
+    float32x4_t tempF;
+    int32x4_t tempHI,tempLO;
+
+    tempLO = vmovl_s16(vget_low_s16(vec));
+    tempF = vcvtq_n_f32_s32(tempLO,15);
+    tempF = __arm_vec_sqrt_f32_neon(tempF);
+    tempLO = vcvtq_n_s32_f32(tempF,15);
+
+    tempHI = vmovl_s16(vget_high_s16(vec));
+    tempF = vcvtq_n_f32_s32(tempHI,15);
+    tempF = __arm_vec_sqrt_f32_neon(tempF);
+    tempHI = vcvtq_n_s32_f32(tempF,15);
+
+    return(vcombine_s16(vqmovn_s32(tempLO),vqmovn_s32(tempHI)));
+}
+
+static inline int32x4_t __arm_vec_sqrt_q31_neon(int32x4_t vec)
+{
+  float32x4_t temp;
+
+  temp = vcvtq_n_f32_s32(vec,31);
+  temp = __arm_vec_sqrt_f32_neon(temp);
+  return(vcvtq_n_s32_f32(temp,31));
+}
+
+#endif
 
 /*
- * @brief C custom defined intrinsic function for M3 and M0 processors
+ * @brief C custom defined intrinsic functions
  */
 #if !defined (ARM_MATH_DSP)
 
   /*
-   * @brief C custom defined QADD8 for M3 and M0 processors
+   * @brief C custom defined QADD8
    */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __QADD8(
+  __STATIC_FORCEINLINE uint32_t __QADD8(
   uint32_t x,
   uint32_t y)
   {
@@ -693,9 +880,9 @@
 
 
   /*
-   * @brief C custom defined QSUB8 for M3 and M0 processors
+   * @brief C custom defined QSUB8
    */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __QSUB8(
+  __STATIC_FORCEINLINE uint32_t __QSUB8(
   uint32_t x,
   uint32_t y)
   {
@@ -711,9 +898,9 @@
 
 
   /*
-   * @brief C custom defined QADD16 for M3 and M0 processors
+   * @brief C custom defined QADD16
    */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __QADD16(
+  __STATIC_FORCEINLINE uint32_t __QADD16(
   uint32_t x,
   uint32_t y)
   {
@@ -728,9 +915,9 @@
 
 
   /*
-   * @brief C custom defined SHADD16 for M3 and M0 processors
+   * @brief C custom defined SHADD16
    */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SHADD16(
+  __STATIC_FORCEINLINE uint32_t __SHADD16(
   uint32_t x,
   uint32_t y)
   {
@@ -744,9 +931,9 @@
 
 
   /*
-   * @brief C custom defined QSUB16 for M3 and M0 processors
+   * @brief C custom defined QSUB16
    */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __QSUB16(
+  __STATIC_FORCEINLINE uint32_t __QSUB16(
   uint32_t x,
   uint32_t y)
   {
@@ -760,9 +947,9 @@
 
 
   /*
-   * @brief C custom defined SHSUB16 for M3 and M0 processors
+   * @brief C custom defined SHSUB16
    */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SHSUB16(
+  __STATIC_FORCEINLINE uint32_t __SHSUB16(
   uint32_t x,
   uint32_t y)
   {
@@ -776,9 +963,9 @@
 
 
   /*
-   * @brief C custom defined QASX for M3 and M0 processors
+   * @brief C custom defined QASX
    */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __QASX(
+  __STATIC_FORCEINLINE uint32_t __QASX(
   uint32_t x,
   uint32_t y)
   {
@@ -792,9 +979,9 @@
 
 
   /*
-   * @brief C custom defined SHASX for M3 and M0 processors
+   * @brief C custom defined SHASX
    */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SHASX(
+  __STATIC_FORCEINLINE uint32_t __SHASX(
   uint32_t x,
   uint32_t y)
   {
@@ -808,9 +995,9 @@
 
 
   /*
-   * @brief C custom defined QSAX for M3 and M0 processors
+   * @brief C custom defined QSAX
    */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __QSAX(
+  __STATIC_FORCEINLINE uint32_t __QSAX(
   uint32_t x,
   uint32_t y)
   {
@@ -824,9 +1011,9 @@
 
 
   /*
-   * @brief C custom defined SHSAX for M3 and M0 processors
+   * @brief C custom defined SHSAX
    */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SHSAX(
+  __STATIC_FORCEINLINE uint32_t __SHSAX(
   uint32_t x,
   uint32_t y)
   {
@@ -840,9 +1027,9 @@
 
 
   /*
-   * @brief C custom defined SMUSDX for M3 and M0 processors
+   * @brief C custom defined SMUSDX
    */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SMUSDX(
+  __STATIC_FORCEINLINE uint32_t __SMUSDX(
   uint32_t x,
   uint32_t y)
   {
@@ -851,9 +1038,9 @@
   }
 
   /*
-   * @brief C custom defined SMUADX for M3 and M0 processors
+   * @brief C custom defined SMUADX
    */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SMUADX(
+  __STATIC_FORCEINLINE uint32_t __SMUADX(
   uint32_t x,
   uint32_t y)
   {
@@ -863,9 +1050,9 @@
 
 
   /*
-   * @brief C custom defined QADD for M3 and M0 processors
+   * @brief C custom defined QADD
    */
-  CMSIS_INLINE __STATIC_INLINE int32_t __QADD(
+  __STATIC_FORCEINLINE int32_t __QADD(
   int32_t x,
   int32_t y)
   {
@@ -874,9 +1061,9 @@
 
 
   /*
-   * @brief C custom defined QSUB for M3 and M0 processors
+   * @brief C custom defined QSUB
    */
-  CMSIS_INLINE __STATIC_INLINE int32_t __QSUB(
+  __STATIC_FORCEINLINE int32_t __QSUB(
   int32_t x,
   int32_t y)
   {
@@ -885,9 +1072,9 @@
 
 
   /*
-   * @brief C custom defined SMLAD for M3 and M0 processors
+   * @brief C custom defined SMLAD
    */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SMLAD(
+  __STATIC_FORCEINLINE uint32_t __SMLAD(
   uint32_t x,
   uint32_t y,
   uint32_t sum)
@@ -899,9 +1086,9 @@
 
 
   /*
-   * @brief C custom defined SMLADX for M3 and M0 processors
+   * @brief C custom defined SMLADX
    */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SMLADX(
+  __STATIC_FORCEINLINE uint32_t __SMLADX(
   uint32_t x,
   uint32_t y,
   uint32_t sum)
@@ -913,9 +1100,9 @@
 
 
   /*
-   * @brief C custom defined SMLSDX for M3 and M0 processors
+   * @brief C custom defined SMLSDX
    */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SMLSDX(
+  __STATIC_FORCEINLINE uint32_t __SMLSDX(
   uint32_t x,
   uint32_t y,
   uint32_t sum)
@@ -927,9 +1114,9 @@
 
 
   /*
-   * @brief C custom defined SMLALD for M3 and M0 processors
+   * @brief C custom defined SMLALD
    */
-  CMSIS_INLINE __STATIC_INLINE uint64_t __SMLALD(
+  __STATIC_FORCEINLINE uint64_t __SMLALD(
   uint32_t x,
   uint32_t y,
   uint64_t sum)
@@ -942,9 +1129,9 @@
 
 
   /*
-   * @brief C custom defined SMLALDX for M3 and M0 processors
+   * @brief C custom defined SMLALDX
    */
-  CMSIS_INLINE __STATIC_INLINE uint64_t __SMLALDX(
+  __STATIC_FORCEINLINE uint64_t __SMLALDX(
   uint32_t x,
   uint32_t y,
   uint64_t sum)
@@ -957,9 +1144,9 @@
 
 
   /*
-   * @brief C custom defined SMUAD for M3 and M0 processors
+   * @brief C custom defined SMUAD
    */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SMUAD(
+  __STATIC_FORCEINLINE uint32_t __SMUAD(
   uint32_t x,
   uint32_t y)
   {
@@ -969,9 +1156,9 @@
 
 
   /*
-   * @brief C custom defined SMUSD for M3 and M0 processors
+   * @brief C custom defined SMUSD
    */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SMUSD(
+  __STATIC_FORCEINLINE uint32_t __SMUSD(
   uint32_t x,
   uint32_t y)
   {
@@ -981,9 +1168,9 @@
 
 
   /*
-   * @brief C custom defined SXTB16 for M3 and M0 processors
+   * @brief C custom defined SXTB16
    */
-  CMSIS_INLINE __STATIC_INLINE uint32_t __SXTB16(
+  __STATIC_FORCEINLINE uint32_t __SXTB16(
   uint32_t x)
   {
     return ((uint32_t)(((((q31_t)x << 24) >> 24) & (q31_t)0x0000FFFF) |
@@ -991,9 +1178,9 @@
   }
 
   /*
-   * @brief C custom defined SMMLA for M3 and M0 processors
+   * @brief C custom defined SMMLA
    */
-  CMSIS_INLINE __STATIC_INLINE int32_t __SMMLA(
+  __STATIC_FORCEINLINE int32_t __SMMLA(
   int32_t x,
   int32_t y,
   int32_t sum)
@@ -1009,9 +1196,9 @@
    */
   typedef struct
   {
-    uint16_t numTaps;        /**< number of filter coefficients in the filter. */
-    q7_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q7_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
+          uint16_t numTaps;        /**< number of filter coefficients in the filter. */
+          q7_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    const q7_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
   } arm_fir_instance_q7;
 
   /**
@@ -1019,9 +1206,9 @@
    */
   typedef struct
   {
-    uint16_t numTaps;         /**< number of filter coefficients in the filter. */
-    q15_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q15_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
+          uint16_t numTaps;         /**< number of filter coefficients in the filter. */
+          q15_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    const q15_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
   } arm_fir_instance_q15;
 
   /**
@@ -1029,9 +1216,9 @@
    */
   typedef struct
   {
-    uint16_t numTaps;         /**< number of filter coefficients in the filter. */
-    q31_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q31_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps. */
+          uint16_t numTaps;         /**< number of filter coefficients in the filter. */
+          q31_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    const q31_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps. */
   } arm_fir_instance_q31;
 
   /**
@@ -1039,12 +1226,11 @@
    */
   typedef struct
   {
-    uint16_t numTaps;     /**< number of filter coefficients in the filter. */
-    float32_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    float32_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps. */
+          uint16_t numTaps;     /**< number of filter coefficients in the filter. */
+          float32_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    const float32_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps. */
   } arm_fir_instance_f32;
 
-
   /**
    * @brief Processing function for the Q7 FIR filter.
    * @param[in]  S          points to an instance of the Q7 FIR filter structure.
@@ -1054,10 +1240,9 @@
    */
   void arm_fir_q7(
   const arm_fir_instance_q7 * S,
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
-
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize);
 
   /**
    * @brief  Initialization function for the Q7 FIR filter.
@@ -1068,12 +1253,11 @@
    * @param[in]     blockSize  number of samples that are processed.
    */
   void arm_fir_init_q7(
-  arm_fir_instance_q7 * S,
-  uint16_t numTaps,
-  q7_t * pCoeffs,
-  q7_t * pState,
-  uint32_t blockSize);
-
+        arm_fir_instance_q7 * S,
+        uint16_t numTaps,
+  const q7_t * pCoeffs,
+        q7_t * pState,
+        uint32_t blockSize);
 
   /**
    * @brief Processing function for the Q15 FIR filter.
@@ -1084,13 +1268,12 @@
    */
   void arm_fir_q15(
   const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
 
   /**
-   * @brief Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4.
+   * @brief Processing function for the fast Q15 FIR filter (fast version).
    * @param[in]  S          points to an instance of the Q15 FIR filter structure.
    * @param[in]  pSrc       points to the block of input data.
    * @param[out] pDst       points to the block of output data.
@@ -1098,10 +1281,9 @@
    */
   void arm_fir_fast_q15(
   const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
 
   /**
    * @brief  Initialization function for the Q15 FIR filter.
@@ -1110,16 +1292,16 @@
    * @param[in]     pCoeffs    points to the filter coefficients.
    * @param[in]     pState     points to the state buffer.
    * @param[in]     blockSize  number of samples that are processed at a time.
-   * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_ARGUMENT_ERROR if
-   * <code>numTaps</code> is not a supported value.
+   * @return     The function returns either
+   * <code>ARM_MATH_SUCCESS</code> if initialization was successful or
+   * <code>ARM_MATH_ARGUMENT_ERROR</code> if <code>numTaps</code> is not a supported value.
    */
   arm_status arm_fir_init_q15(
-  arm_fir_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize);
-
+        arm_fir_instance_q15 * S,
+        uint16_t numTaps,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        uint32_t blockSize);
 
   /**
    * @brief Processing function for the Q31 FIR filter.
@@ -1130,24 +1312,22 @@
    */
   void arm_fir_q31(
   const arm_fir_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
 
   /**
-   * @brief Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4.
-   * @param[in]  S          points to an instance of the Q31 FIR structure.
+   * @brief Processing function for the fast Q31 FIR filter (fast version).
+   * @param[in]  S          points to an instance of the Q31 FIR filter structure.
    * @param[in]  pSrc       points to the block of input data.
    * @param[out] pDst       points to the block of output data.
    * @param[in]  blockSize  number of samples to process.
    */
   void arm_fir_fast_q31(
   const arm_fir_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
 
   /**
    * @brief  Initialization function for the Q31 FIR filter.
@@ -1158,12 +1338,11 @@
    * @param[in]     blockSize  number of samples that are processed at a time.
    */
   void arm_fir_init_q31(
-  arm_fir_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize);
-
+        arm_fir_instance_q31 * S,
+        uint16_t numTaps,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        uint32_t blockSize);
 
   /**
    * @brief Processing function for the floating-point FIR filter.
@@ -1174,10 +1353,9 @@
    */
   void arm_fir_f32(
   const arm_fir_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
 
   /**
    * @brief  Initialization function for the floating-point FIR filter.
@@ -1188,22 +1366,21 @@
    * @param[in]     blockSize  number of samples that are processed at a time.
    */
   void arm_fir_init_f32(
-  arm_fir_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize);
-
+        arm_fir_instance_f32 * S,
+        uint16_t numTaps,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        uint32_t blockSize);
 
   /**
    * @brief Instance structure for the Q15 Biquad cascade filter.
    */
   typedef struct
   {
-    int8_t numStages;        /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    q15_t *pState;           /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
-    q15_t *pCoeffs;          /**< Points to the array of coefficients.  The array is of length 5*numStages. */
-    int8_t postShift;        /**< Additional shift, in bits, applied to each output sample. */
+          int8_t numStages;        /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          q15_t *pState;           /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
+    const q15_t *pCoeffs;          /**< Points to the array of coefficients.  The array is of length 5*numStages. */
+          int8_t postShift;        /**< Additional shift, in bits, applied to each output sample. */
   } arm_biquad_casd_df1_inst_q15;
 
   /**
@@ -1211,10 +1388,10 @@
    */
   typedef struct
   {
-    uint32_t numStages;      /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    q31_t *pState;           /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
-    q31_t *pCoeffs;          /**< Points to the array of coefficients.  The array is of length 5*numStages. */
-    uint8_t postShift;       /**< Additional shift, in bits, applied to each output sample. */
+          uint32_t numStages;      /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          q31_t *pState;           /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
+    const q31_t *pCoeffs;          /**< Points to the array of coefficients.  The array is of length 5*numStages. */
+          uint8_t postShift;       /**< Additional shift, in bits, applied to each output sample. */
   } arm_biquad_casd_df1_inst_q31;
 
   /**
@@ -1222,12 +1399,11 @@
    */
   typedef struct
   {
-    uint32_t numStages;      /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    float32_t *pState;       /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
-    float32_t *pCoeffs;      /**< Points to the array of coefficients.  The array is of length 5*numStages. */
+          uint32_t numStages;      /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          float32_t *pState;       /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
+    const float32_t *pCoeffs;      /**< Points to the array of coefficients.  The array is of length 5*numStages. */
   } arm_biquad_casd_df1_inst_f32;
 
-
   /**
    * @brief Processing function for the Q15 Biquad cascade filter.
    * @param[in]  S          points to an instance of the Q15 Biquad cascade structure.
@@ -1237,10 +1413,9 @@
    */
   void arm_biquad_cascade_df1_q15(
   const arm_biquad_casd_df1_inst_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
 
   /**
    * @brief  Initialization function for the Q15 Biquad cascade filter.
@@ -1251,12 +1426,11 @@
    * @param[in]     postShift  Shift to be applied to the output. Varies according to the coefficients format
    */
   void arm_biquad_cascade_df1_init_q15(
-  arm_biquad_casd_df1_inst_q15 * S,
-  uint8_t numStages,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  int8_t postShift);
-
+        arm_biquad_casd_df1_inst_q15 * S,
+        uint8_t numStages,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        int8_t postShift);
 
   /**
    * @brief Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.
@@ -1267,10 +1441,9 @@
    */
   void arm_biquad_cascade_df1_fast_q15(
   const arm_biquad_casd_df1_inst_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
 
   /**
    * @brief Processing function for the Q31 Biquad cascade filter
@@ -1281,10 +1454,9 @@
    */
   void arm_biquad_cascade_df1_q31(
   const arm_biquad_casd_df1_inst_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
 
   /**
    * @brief Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.
@@ -1295,10 +1467,9 @@
    */
   void arm_biquad_cascade_df1_fast_q31(
   const arm_biquad_casd_df1_inst_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
 
   /**
    * @brief  Initialization function for the Q31 Biquad cascade filter.
@@ -1309,12 +1480,11 @@
    * @param[in]     postShift  Shift to be applied to the output. Varies according to the coefficients format
    */
   void arm_biquad_cascade_df1_init_q31(
-  arm_biquad_casd_df1_inst_q31 * S,
-  uint8_t numStages,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  int8_t postShift);
-
+        arm_biquad_casd_df1_inst_q31 * S,
+        uint8_t numStages,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        int8_t postShift);
 
   /**
    * @brief Processing function for the floating-point Biquad cascade filter.
@@ -1325,10 +1495,9 @@
    */
   void arm_biquad_cascade_df1_f32(
   const arm_biquad_casd_df1_inst_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
 
   /**
    * @brief  Initialization function for the floating-point Biquad cascade filter.
@@ -1338,11 +1507,10 @@
    * @param[in]     pState     points to the state buffer.
    */
   void arm_biquad_cascade_df1_init_f32(
-  arm_biquad_casd_df1_inst_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState);
-
+        arm_biquad_casd_df1_inst_f32 * S,
+        uint8_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState);
 
   /**
    * @brief Instance structure for the floating-point matrix structure.
@@ -1385,7 +1553,6 @@
     q31_t *pData;         /**< points to the data of the matrix. */
   } arm_matrix_instance_q31;
 
-
   /**
    * @brief Floating-point matrix addition.
    * @param[in]  pSrcA  points to the first input matrix structure
@@ -1394,11 +1561,10 @@
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
-  arm_status arm_mat_add_f32(
+arm_status arm_mat_add_f32(
   const arm_matrix_instance_f32 * pSrcA,
   const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst);
-
+        arm_matrix_instance_f32 * pDst);
 
   /**
    * @brief Q15 matrix addition.
@@ -1408,11 +1574,10 @@
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
-  arm_status arm_mat_add_q15(
+arm_status arm_mat_add_q15(
   const arm_matrix_instance_q15 * pSrcA,
   const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst);
-
+        arm_matrix_instance_q15 * pDst);
 
   /**
    * @brief Q31 matrix addition.
@@ -1422,11 +1587,10 @@
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
-  arm_status arm_mat_add_q31(
+arm_status arm_mat_add_q31(
   const arm_matrix_instance_q31 * pSrcA,
   const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst);
-
+        arm_matrix_instance_q31 * pDst);
 
   /**
    * @brief Floating-point, complex, matrix multiplication.
@@ -1436,11 +1600,10 @@
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
-  arm_status arm_mat_cmplx_mult_f32(
+arm_status arm_mat_cmplx_mult_f32(
   const arm_matrix_instance_f32 * pSrcA,
   const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst);
-
+        arm_matrix_instance_f32 * pDst);
 
   /**
    * @brief Q15, complex,  matrix multiplication.
@@ -1450,12 +1613,11 @@
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
-  arm_status arm_mat_cmplx_mult_q15(
+arm_status arm_mat_cmplx_mult_q15(
   const arm_matrix_instance_q15 * pSrcA,
   const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst,
-  q15_t * pScratch);
-
+        arm_matrix_instance_q15 * pDst,
+        q15_t * pScratch);
 
   /**
    * @brief Q31, complex, matrix multiplication.
@@ -1465,11 +1627,10 @@
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
-  arm_status arm_mat_cmplx_mult_q31(
+arm_status arm_mat_cmplx_mult_q31(
   const arm_matrix_instance_q31 * pSrcA,
   const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst);
-
+        arm_matrix_instance_q31 * pDst);
 
   /**
    * @brief Floating-point matrix transpose.
@@ -1478,10 +1639,9 @@
    * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
    * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
-  arm_status arm_mat_trans_f32(
+arm_status arm_mat_trans_f32(
   const arm_matrix_instance_f32 * pSrc,
-  arm_matrix_instance_f32 * pDst);
-
+        arm_matrix_instance_f32 * pDst);
 
   /**
    * @brief Q15 matrix transpose.
@@ -1490,10 +1650,9 @@
    * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
    * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
-  arm_status arm_mat_trans_q15(
+arm_status arm_mat_trans_q15(
   const arm_matrix_instance_q15 * pSrc,
-  arm_matrix_instance_q15 * pDst);
-
+        arm_matrix_instance_q15 * pDst);
 
   /**
    * @brief Q31 matrix transpose.
@@ -1502,10 +1661,9 @@
    * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
    * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
-  arm_status arm_mat_trans_q31(
+arm_status arm_mat_trans_q31(
   const arm_matrix_instance_q31 * pSrc,
-  arm_matrix_instance_q31 * pDst);
-
+        arm_matrix_instance_q31 * pDst);
 
   /**
    * @brief Floating-point matrix multiplication
@@ -1515,11 +1673,10 @@
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
-  arm_status arm_mat_mult_f32(
+arm_status arm_mat_mult_f32(
   const arm_matrix_instance_f32 * pSrcA,
   const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst);
-
+        arm_matrix_instance_f32 * pDst);
 
   /**
    * @brief Q15 matrix multiplication
@@ -1530,12 +1687,11 @@
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
-  arm_status arm_mat_mult_q15(
+arm_status arm_mat_mult_q15(
   const arm_matrix_instance_q15 * pSrcA,
   const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst,
-  q15_t * pState);
-
+        arm_matrix_instance_q15 * pDst,
+        q15_t * pState);
 
   /**
    * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
@@ -1546,12 +1702,11 @@
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
-  arm_status arm_mat_mult_fast_q15(
+arm_status arm_mat_mult_fast_q15(
   const arm_matrix_instance_q15 * pSrcA,
   const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst,
-  q15_t * pState);
-
+        arm_matrix_instance_q15 * pDst,
+        q15_t * pState);
 
   /**
    * @brief Q31 matrix multiplication
@@ -1561,11 +1716,10 @@
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
-  arm_status arm_mat_mult_q31(
+arm_status arm_mat_mult_q31(
   const arm_matrix_instance_q31 * pSrcA,
   const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst);
-
+        arm_matrix_instance_q31 * pDst);
 
   /**
    * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
@@ -1575,11 +1729,10 @@
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
-  arm_status arm_mat_mult_fast_q31(
+arm_status arm_mat_mult_fast_q31(
   const arm_matrix_instance_q31 * pSrcA,
   const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst);
-
+        arm_matrix_instance_q31 * pDst);
 
   /**
    * @brief Floating-point matrix subtraction
@@ -1589,11 +1742,10 @@
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
-  arm_status arm_mat_sub_f32(
+arm_status arm_mat_sub_f32(
   const arm_matrix_instance_f32 * pSrcA,
   const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst);
-
+        arm_matrix_instance_f32 * pDst);
 
   /**
    * @brief Q15 matrix subtraction
@@ -1603,11 +1755,10 @@
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
-  arm_status arm_mat_sub_q15(
+arm_status arm_mat_sub_q15(
   const arm_matrix_instance_q15 * pSrcA,
   const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst);
-
+        arm_matrix_instance_q15 * pDst);
 
   /**
    * @brief Q31 matrix subtraction
@@ -1617,11 +1768,10 @@
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
-  arm_status arm_mat_sub_q31(
+arm_status arm_mat_sub_q31(
   const arm_matrix_instance_q31 * pSrcA,
   const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst);
-
+        arm_matrix_instance_q31 * pDst);
 
   /**
    * @brief Floating-point matrix scaling.
@@ -1631,11 +1781,10 @@
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
-  arm_status arm_mat_scale_f32(
+arm_status arm_mat_scale_f32(
   const arm_matrix_instance_f32 * pSrc,
-  float32_t scale,
-  arm_matrix_instance_f32 * pDst);
-
+        float32_t scale,
+        arm_matrix_instance_f32 * pDst);
 
   /**
    * @brief Q15 matrix scaling.
@@ -1646,12 +1795,11 @@
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
-  arm_status arm_mat_scale_q15(
+arm_status arm_mat_scale_q15(
   const arm_matrix_instance_q15 * pSrc,
-  q15_t scaleFract,
-  int32_t shift,
-  arm_matrix_instance_q15 * pDst);
-
+        q15_t scaleFract,
+        int32_t shift,
+        arm_matrix_instance_q15 * pDst);
 
   /**
    * @brief Q31 matrix scaling.
@@ -1662,12 +1810,11 @@
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
    */
-  arm_status arm_mat_scale_q31(
+arm_status arm_mat_scale_q31(
   const arm_matrix_instance_q31 * pSrc,
-  q31_t scaleFract,
-  int32_t shift,
-  arm_matrix_instance_q31 * pDst);
-
+        q31_t scaleFract,
+        int32_t shift,
+        arm_matrix_instance_q31 * pDst);
 
   /**
    * @brief  Q31 matrix initialization.
@@ -1676,12 +1823,11 @@
    * @param[in]     nColumns  number of columns in the matrix.
    * @param[in]     pData     points to the matrix data array.
    */
-  void arm_mat_init_q31(
-  arm_matrix_instance_q31 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  q31_t * pData);
-
+void arm_mat_init_q31(
+        arm_matrix_instance_q31 * S,
+        uint16_t nRows,
+        uint16_t nColumns,
+        q31_t * pData);
 
   /**
    * @brief  Q15 matrix initialization.
@@ -1690,12 +1836,11 @@
    * @param[in]     nColumns  number of columns in the matrix.
    * @param[in]     pData     points to the matrix data array.
    */
-  void arm_mat_init_q15(
-  arm_matrix_instance_q15 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  q15_t * pData);
-
+void arm_mat_init_q15(
+        arm_matrix_instance_q15 * S,
+        uint16_t nRows,
+        uint16_t nColumns,
+        q15_t * pData);
 
   /**
    * @brief  Floating-point matrix initialization.
@@ -1704,12 +1849,11 @@
    * @param[in]     nColumns  number of columns in the matrix.
    * @param[in]     pData     points to the matrix data array.
    */
-  void arm_mat_init_f32(
-  arm_matrix_instance_f32 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  float32_t * pData);
-
+void arm_mat_init_f32(
+        arm_matrix_instance_f32 * S,
+        uint16_t nRows,
+        uint16_t nColumns,
+        float32_t * pData);
 
 
   /**
@@ -1717,17 +1861,17 @@
    */
   typedef struct
   {
-    q15_t A0;           /**< The derived gain, A0 = Kp + Ki + Kd . */
+          q15_t A0;           /**< The derived gain, A0 = Kp + Ki + Kd . */
 #if !defined (ARM_MATH_DSP)
-    q15_t A1;
-    q15_t A2;
+          q15_t A1;
+          q15_t A2;
 #else
-    q31_t A1;           /**< The derived gain A1 = -Kp - 2Kd | Kd.*/
+          q31_t A1;           /**< The derived gain A1 = -Kp - 2Kd | Kd.*/
 #endif
-    q15_t state[3];     /**< The state array of length 3. */
-    q15_t Kp;           /**< The proportional gain. */
-    q15_t Ki;           /**< The integral gain. */
-    q15_t Kd;           /**< The derivative gain. */
+          q15_t state[3];     /**< The state array of length 3. */
+          q15_t Kp;           /**< The proportional gain. */
+          q15_t Ki;           /**< The integral gain. */
+          q15_t Kd;           /**< The derivative gain. */
   } arm_pid_instance_q15;
 
   /**
@@ -1735,13 +1879,13 @@
    */
   typedef struct
   {
-    q31_t A0;            /**< The derived gain, A0 = Kp + Ki + Kd . */
-    q31_t A1;            /**< The derived gain, A1 = -Kp - 2Kd. */
-    q31_t A2;            /**< The derived gain, A2 = Kd . */
-    q31_t state[3];      /**< The state array of length 3. */
-    q31_t Kp;            /**< The proportional gain. */
-    q31_t Ki;            /**< The integral gain. */
-    q31_t Kd;            /**< The derivative gain. */
+          q31_t A0;            /**< The derived gain, A0 = Kp + Ki + Kd . */
+          q31_t A1;            /**< The derived gain, A1 = -Kp - 2Kd. */
+          q31_t A2;            /**< The derived gain, A2 = Kd . */
+          q31_t state[3];      /**< The state array of length 3. */
+          q31_t Kp;            /**< The proportional gain. */
+          q31_t Ki;            /**< The integral gain. */
+          q31_t Kd;            /**< The derivative gain. */
   } arm_pid_instance_q31;
 
   /**
@@ -1749,13 +1893,13 @@
    */
   typedef struct
   {
-    float32_t A0;          /**< The derived gain, A0 = Kp + Ki + Kd . */
-    float32_t A1;          /**< The derived gain, A1 = -Kp - 2Kd. */
-    float32_t A2;          /**< The derived gain, A2 = Kd . */
-    float32_t state[3];    /**< The state array of length 3. */
-    float32_t Kp;          /**< The proportional gain. */
-    float32_t Ki;          /**< The integral gain. */
-    float32_t Kd;          /**< The derivative gain. */
+          float32_t A0;          /**< The derived gain, A0 = Kp + Ki + Kd . */
+          float32_t A1;          /**< The derived gain, A1 = -Kp - 2Kd. */
+          float32_t A2;          /**< The derived gain, A2 = Kd . */
+          float32_t state[3];    /**< The state array of length 3. */
+          float32_t Kp;          /**< The proportional gain. */
+          float32_t Ki;          /**< The integral gain. */
+          float32_t Kd;          /**< The derivative gain. */
   } arm_pid_instance_f32;
 
 
@@ -1766,8 +1910,8 @@
    * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
    */
   void arm_pid_init_f32(
-  arm_pid_instance_f32 * S,
-  int32_t resetStateFlag);
+        arm_pid_instance_f32 * S,
+        int32_t resetStateFlag);
 
 
   /**
@@ -1775,7 +1919,7 @@
    * @param[in,out] S  is an instance of the floating-point PID Control structure
    */
   void arm_pid_reset_f32(
-  arm_pid_instance_f32 * S);
+        arm_pid_instance_f32 * S);
 
 
   /**
@@ -1784,8 +1928,8 @@
    * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
    */
   void arm_pid_init_q31(
-  arm_pid_instance_q31 * S,
-  int32_t resetStateFlag);
+        arm_pid_instance_q31 * S,
+        int32_t resetStateFlag);
 
 
   /**
@@ -1794,7 +1938,7 @@
    */
 
   void arm_pid_reset_q31(
-  arm_pid_instance_q31 * S);
+        arm_pid_instance_q31 * S);
 
 
   /**
@@ -1803,8 +1947,8 @@
    * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
    */
   void arm_pid_init_q15(
-  arm_pid_instance_q15 * S,
-  int32_t resetStateFlag);
+        arm_pid_instance_q15 * S,
+        int32_t resetStateFlag);
 
 
   /**
@@ -1812,7 +1956,7 @@
    * @param[in,out] S  points to an instance of the q15 PID Control structure
    */
   void arm_pid_reset_q15(
-  arm_pid_instance_q15 * S);
+        arm_pid_instance_q15 * S);
 
 
   /**
@@ -1820,10 +1964,10 @@
    */
   typedef struct
   {
-    uint32_t nValues;           /**< nValues */
-    float32_t x1;               /**< x1 */
-    float32_t xSpacing;         /**< xSpacing */
-    float32_t *pYData;          /**< pointer to the table of Y values */
+          uint32_t nValues;           /**< nValues */
+          float32_t x1;               /**< x1 */
+          float32_t xSpacing;         /**< xSpacing */
+          float32_t *pYData;          /**< pointer to the table of Y values */
   } arm_linear_interp_instance_f32;
 
   /**
@@ -1831,9 +1975,9 @@
    */
   typedef struct
   {
-    uint16_t numRows;   /**< number of rows in the data table. */
-    uint16_t numCols;   /**< number of columns in the data table. */
-    float32_t *pData;   /**< points to the data table. */
+          uint16_t numRows;   /**< number of rows in the data table. */
+          uint16_t numCols;   /**< number of columns in the data table. */
+          float32_t *pData;   /**< points to the data table. */
   } arm_bilinear_interp_instance_f32;
 
    /**
@@ -1841,9 +1985,9 @@
    */
   typedef struct
   {
-    uint16_t numRows;   /**< number of rows in the data table. */
-    uint16_t numCols;   /**< number of columns in the data table. */
-    q31_t *pData;       /**< points to the data table. */
+          uint16_t numRows;   /**< number of rows in the data table. */
+          uint16_t numCols;   /**< number of columns in the data table. */
+          q31_t *pData;       /**< points to the data table. */
   } arm_bilinear_interp_instance_q31;
 
    /**
@@ -1851,9 +1995,9 @@
    */
   typedef struct
   {
-    uint16_t numRows;   /**< number of rows in the data table. */
-    uint16_t numCols;   /**< number of columns in the data table. */
-    q15_t *pData;       /**< points to the data table. */
+          uint16_t numRows;   /**< number of rows in the data table. */
+          uint16_t numCols;   /**< number of columns in the data table. */
+          q15_t *pData;       /**< points to the data table. */
   } arm_bilinear_interp_instance_q15;
 
    /**
@@ -1861,9 +2005,9 @@
    */
   typedef struct
   {
-    uint16_t numRows;   /**< number of rows in the data table. */
-    uint16_t numCols;   /**< number of columns in the data table. */
-    q7_t *pData;        /**< points to the data table. */
+          uint16_t numRows;   /**< number of rows in the data table. */
+          uint16_t numCols;   /**< number of columns in the data table. */
+          q7_t *pData;        /**< points to the data table. */
   } arm_bilinear_interp_instance_q7;
 
 
@@ -1875,10 +2019,10 @@
    * @param[in]  blockSize  number of samples in each vector
    */
   void arm_mult_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  q7_t * pDst,
-  uint32_t blockSize);
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        q7_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -1889,10 +2033,10 @@
    * @param[in]  blockSize  number of samples in each vector
    */
   void arm_mult_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t blockSize);
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -1903,10 +2047,10 @@
    * @param[in]  blockSize  number of samples in each vector
    */
   void arm_mult_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t blockSize);
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -1917,10 +2061,10 @@
    * @param[in]  blockSize  number of samples in each vector
    */
   void arm_mult_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t blockSize);
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -1928,26 +2072,26 @@
    */
   typedef struct
   {
-    uint16_t fftLen;                 /**< length of the FFT. */
-    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    q15_t *pTwiddle;                 /**< points to the Sin twiddle factor table. */
-    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+          uint16_t fftLen;                 /**< length of the FFT. */
+          uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+          uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    const q15_t *pTwiddle;                 /**< points to the Sin twiddle factor table. */
+    const uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
+          uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+          uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
   } arm_cfft_radix2_instance_q15;
 
 /* Deprecated */
   arm_status arm_cfft_radix2_init_q15(
-  arm_cfft_radix2_instance_q15 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
+        arm_cfft_radix2_instance_q15 * S,
+        uint16_t fftLen,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
 
 /* Deprecated */
   void arm_cfft_radix2_q15(
   const arm_cfft_radix2_instance_q15 * S,
-  q15_t * pSrc);
+        q15_t * pSrc);
 
 
   /**
@@ -1955,292 +2099,309 @@
    */
   typedef struct
   {
-    uint16_t fftLen;                 /**< length of the FFT. */
-    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    q15_t *pTwiddle;                 /**< points to the twiddle factor table. */
-    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+          uint16_t fftLen;                 /**< length of the FFT. */
+          uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+          uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    const q15_t *pTwiddle;                 /**< points to the twiddle factor table. */
+    const uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
+          uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+          uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
   } arm_cfft_radix4_instance_q15;
 
 /* Deprecated */
   arm_status arm_cfft_radix4_init_q15(
-  arm_cfft_radix4_instance_q15 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
+        arm_cfft_radix4_instance_q15 * S,
+        uint16_t fftLen,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
 
 /* Deprecated */
   void arm_cfft_radix4_q15(
   const arm_cfft_radix4_instance_q15 * S,
-  q15_t * pSrc);
+        q15_t * pSrc);
 
   /**
    * @brief Instance structure for the Radix-2 Q31 CFFT/CIFFT function.
    */
   typedef struct
   {
-    uint16_t fftLen;                 /**< length of the FFT. */
-    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    q31_t *pTwiddle;                 /**< points to the Twiddle factor table. */
-    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+          uint16_t fftLen;                 /**< length of the FFT. */
+          uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+          uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    const q31_t *pTwiddle;                 /**< points to the Twiddle factor table. */
+    const uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
+          uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+          uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
   } arm_cfft_radix2_instance_q31;
 
 /* Deprecated */
   arm_status arm_cfft_radix2_init_q31(
-  arm_cfft_radix2_instance_q31 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
+        arm_cfft_radix2_instance_q31 * S,
+        uint16_t fftLen,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
 
 /* Deprecated */
   void arm_cfft_radix2_q31(
   const arm_cfft_radix2_instance_q31 * S,
-  q31_t * pSrc);
+        q31_t * pSrc);
 
   /**
    * @brief Instance structure for the Q31 CFFT/CIFFT function.
    */
   typedef struct
   {
-    uint16_t fftLen;                 /**< length of the FFT. */
-    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    q31_t *pTwiddle;                 /**< points to the twiddle factor table. */
-    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+          uint16_t fftLen;                 /**< length of the FFT. */
+          uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+          uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    const q31_t *pTwiddle;                 /**< points to the twiddle factor table. */
+    const uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
+          uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+          uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
   } arm_cfft_radix4_instance_q31;
 
 /* Deprecated */
   void arm_cfft_radix4_q31(
   const arm_cfft_radix4_instance_q31 * S,
-  q31_t * pSrc);
+        q31_t * pSrc);
 
 /* Deprecated */
   arm_status arm_cfft_radix4_init_q31(
-  arm_cfft_radix4_instance_q31 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
+        arm_cfft_radix4_instance_q31 * S,
+        uint16_t fftLen,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
 
   /**
    * @brief Instance structure for the floating-point CFFT/CIFFT function.
    */
   typedef struct
   {
-    uint16_t fftLen;                   /**< length of the FFT. */
-    uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    float32_t *pTwiddle;               /**< points to the Twiddle factor table. */
-    uint16_t *pBitRevTable;            /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-    float32_t onebyfftLen;             /**< value of 1/fftLen. */
+          uint16_t fftLen;                   /**< length of the FFT. */
+          uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+          uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    const float32_t *pTwiddle;               /**< points to the Twiddle factor table. */
+    const uint16_t *pBitRevTable;            /**< points to the bit reversal table. */
+          uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+          uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+          float32_t onebyfftLen;             /**< value of 1/fftLen. */
   } arm_cfft_radix2_instance_f32;
 
 /* Deprecated */
   arm_status arm_cfft_radix2_init_f32(
-  arm_cfft_radix2_instance_f32 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
+        arm_cfft_radix2_instance_f32 * S,
+        uint16_t fftLen,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
 
 /* Deprecated */
   void arm_cfft_radix2_f32(
   const arm_cfft_radix2_instance_f32 * S,
-  float32_t * pSrc);
+        float32_t * pSrc);
 
   /**
    * @brief Instance structure for the floating-point CFFT/CIFFT function.
    */
   typedef struct
   {
-    uint16_t fftLen;                   /**< length of the FFT. */
-    uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    float32_t *pTwiddle;               /**< points to the Twiddle factor table. */
-    uint16_t *pBitRevTable;            /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-    float32_t onebyfftLen;             /**< value of 1/fftLen. */
+          uint16_t fftLen;                   /**< length of the FFT. */
+          uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+          uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    const float32_t *pTwiddle;               /**< points to the Twiddle factor table. */
+    const uint16_t *pBitRevTable;            /**< points to the bit reversal table. */
+          uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+          uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+          float32_t onebyfftLen;             /**< value of 1/fftLen. */
   } arm_cfft_radix4_instance_f32;
 
 /* Deprecated */
   arm_status arm_cfft_radix4_init_f32(
-  arm_cfft_radix4_instance_f32 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
+        arm_cfft_radix4_instance_f32 * S,
+        uint16_t fftLen,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
 
 /* Deprecated */
   void arm_cfft_radix4_f32(
   const arm_cfft_radix4_instance_f32 * S,
-  float32_t * pSrc);
+        float32_t * pSrc);
 
   /**
    * @brief Instance structure for the fixed-point CFFT/CIFFT function.
    */
   typedef struct
   {
-    uint16_t fftLen;                   /**< length of the FFT. */
+          uint16_t fftLen;                   /**< length of the FFT. */
     const q15_t *pTwiddle;             /**< points to the Twiddle factor table. */
     const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
-    uint16_t bitRevLength;             /**< bit reversal table length. */
+          uint16_t bitRevLength;             /**< bit reversal table length. */
   } arm_cfft_instance_q15;
 
 void arm_cfft_q15(
     const arm_cfft_instance_q15 * S,
-    q15_t * p1,
-    uint8_t ifftFlag,
-    uint8_t bitReverseFlag);
+          q15_t * p1,
+          uint8_t ifftFlag,
+          uint8_t bitReverseFlag);
 
   /**
    * @brief Instance structure for the fixed-point CFFT/CIFFT function.
    */
   typedef struct
   {
-    uint16_t fftLen;                   /**< length of the FFT. */
+          uint16_t fftLen;                   /**< length of the FFT. */
     const q31_t *pTwiddle;             /**< points to the Twiddle factor table. */
     const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
-    uint16_t bitRevLength;             /**< bit reversal table length. */
+          uint16_t bitRevLength;             /**< bit reversal table length. */
   } arm_cfft_instance_q31;
 
 void arm_cfft_q31(
     const arm_cfft_instance_q31 * S,
-    q31_t * p1,
-    uint8_t ifftFlag,
-    uint8_t bitReverseFlag);
+          q31_t * p1,
+          uint8_t ifftFlag,
+          uint8_t bitReverseFlag);
 
   /**
    * @brief Instance structure for the floating-point CFFT/CIFFT function.
    */
   typedef struct
   {
-    uint16_t fftLen;                   /**< length of the FFT. */
+          uint16_t fftLen;                   /**< length of the FFT. */
     const float32_t *pTwiddle;         /**< points to the Twiddle factor table. */
     const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
-    uint16_t bitRevLength;             /**< bit reversal table length. */
+          uint16_t bitRevLength;             /**< bit reversal table length. */
   } arm_cfft_instance_f32;
 
   void arm_cfft_f32(
   const arm_cfft_instance_f32 * S,
-  float32_t * p1,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
+        float32_t * p1,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
 
   /**
    * @brief Instance structure for the Q15 RFFT/RIFFT function.
    */
   typedef struct
   {
-    uint32_t fftLenReal;                      /**< length of the real FFT. */
-    uint8_t ifftFlagR;                        /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
-    uint8_t bitReverseFlagR;                  /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
-    uint32_t twidCoefRModifier;               /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    q15_t *pTwiddleAReal;                     /**< points to the real twiddle factor table. */
-    q15_t *pTwiddleBReal;                     /**< points to the imag twiddle factor table. */
+          uint32_t fftLenReal;                      /**< length of the real FFT. */
+          uint8_t ifftFlagR;                        /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
+          uint8_t bitReverseFlagR;                  /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
+          uint32_t twidCoefRModifier;               /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+    const q15_t *pTwiddleAReal;                     /**< points to the real twiddle factor table. */
+    const q15_t *pTwiddleBReal;                     /**< points to the imag twiddle factor table. */
     const arm_cfft_instance_q15 *pCfft;       /**< points to the complex FFT instance. */
   } arm_rfft_instance_q15;
 
   arm_status arm_rfft_init_q15(
-  arm_rfft_instance_q15 * S,
-  uint32_t fftLenReal,
-  uint32_t ifftFlagR,
-  uint32_t bitReverseFlag);
+        arm_rfft_instance_q15 * S,
+        uint32_t fftLenReal,
+        uint32_t ifftFlagR,
+        uint32_t bitReverseFlag);
 
   void arm_rfft_q15(
   const arm_rfft_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst);
+        q15_t * pSrc,
+        q15_t * pDst);
 
   /**
    * @brief Instance structure for the Q31 RFFT/RIFFT function.
    */
   typedef struct
   {
-    uint32_t fftLenReal;                        /**< length of the real FFT. */
-    uint8_t ifftFlagR;                          /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
-    uint8_t bitReverseFlagR;                    /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
-    uint32_t twidCoefRModifier;                 /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    q31_t *pTwiddleAReal;                       /**< points to the real twiddle factor table. */
-    q31_t *pTwiddleBReal;                       /**< points to the imag twiddle factor table. */
+          uint32_t fftLenReal;                        /**< length of the real FFT. */
+          uint8_t ifftFlagR;                          /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
+          uint8_t bitReverseFlagR;                    /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
+          uint32_t twidCoefRModifier;                 /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+    const q31_t *pTwiddleAReal;                       /**< points to the real twiddle factor table. */
+    const q31_t *pTwiddleBReal;                       /**< points to the imag twiddle factor table. */
     const arm_cfft_instance_q31 *pCfft;         /**< points to the complex FFT instance. */
   } arm_rfft_instance_q31;
 
   arm_status arm_rfft_init_q31(
-  arm_rfft_instance_q31 * S,
-  uint32_t fftLenReal,
-  uint32_t ifftFlagR,
-  uint32_t bitReverseFlag);
+        arm_rfft_instance_q31 * S,
+        uint32_t fftLenReal,
+        uint32_t ifftFlagR,
+        uint32_t bitReverseFlag);
 
   void arm_rfft_q31(
   const arm_rfft_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst);
+        q31_t * pSrc,
+        q31_t * pDst);
 
   /**
    * @brief Instance structure for the floating-point RFFT/RIFFT function.
    */
   typedef struct
   {
-    uint32_t fftLenReal;                        /**< length of the real FFT. */
-    uint16_t fftLenBy2;                         /**< length of the complex FFT. */
-    uint8_t ifftFlagR;                          /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
-    uint8_t bitReverseFlagR;                    /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
-    uint32_t twidCoefRModifier;                     /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    float32_t *pTwiddleAReal;                   /**< points to the real twiddle factor table. */
-    float32_t *pTwiddleBReal;                   /**< points to the imag twiddle factor table. */
-    arm_cfft_radix4_instance_f32 *pCfft;        /**< points to the complex FFT instance. */
+          uint32_t fftLenReal;                        /**< length of the real FFT. */
+          uint16_t fftLenBy2;                         /**< length of the complex FFT. */
+          uint8_t ifftFlagR;                          /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
+          uint8_t bitReverseFlagR;                    /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
+          uint32_t twidCoefRModifier;                     /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+    const float32_t *pTwiddleAReal;                   /**< points to the real twiddle factor table. */
+    const float32_t *pTwiddleBReal;                   /**< points to the imag twiddle factor table. */
+          arm_cfft_radix4_instance_f32 *pCfft;        /**< points to the complex FFT instance. */
   } arm_rfft_instance_f32;
 
   arm_status arm_rfft_init_f32(
-  arm_rfft_instance_f32 * S,
-  arm_cfft_radix4_instance_f32 * S_CFFT,
-  uint32_t fftLenReal,
-  uint32_t ifftFlagR,
-  uint32_t bitReverseFlag);
+        arm_rfft_instance_f32 * S,
+        arm_cfft_radix4_instance_f32 * S_CFFT,
+        uint32_t fftLenReal,
+        uint32_t ifftFlagR,
+        uint32_t bitReverseFlag);
 
   void arm_rfft_f32(
   const arm_rfft_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst);
+        float32_t * pSrc,
+        float32_t * pDst);
 
   /**
    * @brief Instance structure for the floating-point RFFT/RIFFT function.
    */
 typedef struct
   {
-    arm_cfft_instance_f32 Sint;      /**< Internal CFFT structure. */
-    uint16_t fftLenRFFT;             /**< length of the real sequence */
-    float32_t * pTwiddleRFFT;        /**< Twiddle factors real stage  */
+          arm_cfft_instance_f32 Sint;      /**< Internal CFFT structure. */
+          uint16_t fftLenRFFT;             /**< length of the real sequence */
+    const float32_t * pTwiddleRFFT;        /**< Twiddle factors real stage  */
   } arm_rfft_fast_instance_f32 ;
 
 arm_status arm_rfft_fast_init_f32 (
-   arm_rfft_fast_instance_f32 * S,
-   uint16_t fftLen);
+         arm_rfft_fast_instance_f32 * S,
+         uint16_t fftLen);
 
-void arm_rfft_fast_f32(
-  arm_rfft_fast_instance_f32 * S,
-  float32_t * p, float32_t * pOut,
-  uint8_t ifftFlag);
+arm_status arm_rfft_32_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
+
+arm_status arm_rfft_64_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
+
+arm_status arm_rfft_128_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
+
+arm_status arm_rfft_256_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
+
+arm_status arm_rfft_512_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
+
+arm_status arm_rfft_1024_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
+
+arm_status arm_rfft_2048_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
+
+arm_status arm_rfft_4096_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
+
+
+  void arm_rfft_fast_f32(
+        arm_rfft_fast_instance_f32 * S,
+        float32_t * p, float32_t * pOut,
+        uint8_t ifftFlag);
 
   /**
    * @brief Instance structure for the floating-point DCT4/IDCT4 function.
    */
   typedef struct
   {
-    uint16_t N;                          /**< length of the DCT4. */
-    uint16_t Nby2;                       /**< half of the length of the DCT4. */
-    float32_t normalize;                 /**< normalizing factor. */
-    float32_t *pTwiddle;                 /**< points to the twiddle factor table. */
-    float32_t *pCosFactor;               /**< points to the cosFactor table. */
-    arm_rfft_instance_f32 *pRfft;        /**< points to the real FFT instance. */
-    arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
+          uint16_t N;                          /**< length of the DCT4. */
+          uint16_t Nby2;                       /**< half of the length of the DCT4. */
+          float32_t normalize;                 /**< normalizing factor. */
+    const float32_t *pTwiddle;                 /**< points to the twiddle factor table. */
+    const float32_t *pCosFactor;               /**< points to the cosFactor table. */
+          arm_rfft_instance_f32 *pRfft;        /**< points to the real FFT instance. */
+          arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
   } arm_dct4_instance_f32;
 
 
@@ -2255,12 +2416,12 @@
    * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported transform length.
    */
   arm_status arm_dct4_init_f32(
-  arm_dct4_instance_f32 * S,
-  arm_rfft_instance_f32 * S_RFFT,
-  arm_cfft_radix4_instance_f32 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  float32_t normalize);
+        arm_dct4_instance_f32 * S,
+        arm_rfft_instance_f32 * S_RFFT,
+        arm_cfft_radix4_instance_f32 * S_CFFT,
+        uint16_t N,
+        uint16_t Nby2,
+        float32_t normalize);
 
 
   /**
@@ -2271,8 +2432,8 @@
    */
   void arm_dct4_f32(
   const arm_dct4_instance_f32 * S,
-  float32_t * pState,
-  float32_t * pInlineBuffer);
+        float32_t * pState,
+        float32_t * pInlineBuffer);
 
 
   /**
@@ -2280,13 +2441,13 @@
    */
   typedef struct
   {
-    uint16_t N;                          /**< length of the DCT4. */
-    uint16_t Nby2;                       /**< half of the length of the DCT4. */
-    q31_t normalize;                     /**< normalizing factor. */
-    q31_t *pTwiddle;                     /**< points to the twiddle factor table. */
-    q31_t *pCosFactor;                   /**< points to the cosFactor table. */
-    arm_rfft_instance_q31 *pRfft;        /**< points to the real FFT instance. */
-    arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */
+          uint16_t N;                          /**< length of the DCT4. */
+          uint16_t Nby2;                       /**< half of the length of the DCT4. */
+          q31_t normalize;                     /**< normalizing factor. */
+    const q31_t *pTwiddle;                     /**< points to the twiddle factor table. */
+    const q31_t *pCosFactor;                   /**< points to the cosFactor table. */
+          arm_rfft_instance_q31 *pRfft;        /**< points to the real FFT instance. */
+          arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */
   } arm_dct4_instance_q31;
 
 
@@ -2301,12 +2462,12 @@
    * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
    */
   arm_status arm_dct4_init_q31(
-  arm_dct4_instance_q31 * S,
-  arm_rfft_instance_q31 * S_RFFT,
-  arm_cfft_radix4_instance_q31 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  q31_t normalize);
+        arm_dct4_instance_q31 * S,
+        arm_rfft_instance_q31 * S_RFFT,
+        arm_cfft_radix4_instance_q31 * S_CFFT,
+        uint16_t N,
+        uint16_t Nby2,
+        q31_t normalize);
 
 
   /**
@@ -2317,8 +2478,8 @@
    */
   void arm_dct4_q31(
   const arm_dct4_instance_q31 * S,
-  q31_t * pState,
-  q31_t * pInlineBuffer);
+        q31_t * pState,
+        q31_t * pInlineBuffer);
 
 
   /**
@@ -2326,13 +2487,13 @@
    */
   typedef struct
   {
-    uint16_t N;                          /**< length of the DCT4. */
-    uint16_t Nby2;                       /**< half of the length of the DCT4. */
-    q15_t normalize;                     /**< normalizing factor. */
-    q15_t *pTwiddle;                     /**< points to the twiddle factor table. */
-    q15_t *pCosFactor;                   /**< points to the cosFactor table. */
-    arm_rfft_instance_q15 *pRfft;        /**< points to the real FFT instance. */
-    arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */
+          uint16_t N;                          /**< length of the DCT4. */
+          uint16_t Nby2;                       /**< half of the length of the DCT4. */
+          q15_t normalize;                     /**< normalizing factor. */
+    const q15_t *pTwiddle;                     /**< points to the twiddle factor table. */
+    const q15_t *pCosFactor;                   /**< points to the cosFactor table. */
+          arm_rfft_instance_q15 *pRfft;        /**< points to the real FFT instance. */
+          arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */
   } arm_dct4_instance_q15;
 
 
@@ -2347,12 +2508,12 @@
    * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
    */
   arm_status arm_dct4_init_q15(
-  arm_dct4_instance_q15 * S,
-  arm_rfft_instance_q15 * S_RFFT,
-  arm_cfft_radix4_instance_q15 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  q15_t normalize);
+        arm_dct4_instance_q15 * S,
+        arm_rfft_instance_q15 * S_RFFT,
+        arm_cfft_radix4_instance_q15 * S_CFFT,
+        uint16_t N,
+        uint16_t Nby2,
+        q15_t normalize);
 
 
   /**
@@ -2363,8 +2524,8 @@
    */
   void arm_dct4_q15(
   const arm_dct4_instance_q15 * S,
-  q15_t * pState,
-  q15_t * pInlineBuffer);
+        q15_t * pState,
+        q15_t * pInlineBuffer);
 
 
   /**
@@ -2375,10 +2536,10 @@
    * @param[in]  blockSize  number of samples in each vector
    */
   void arm_add_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t blockSize);
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2389,10 +2550,10 @@
    * @param[in]  blockSize  number of samples in each vector
    */
   void arm_add_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  q7_t * pDst,
-  uint32_t blockSize);
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        q7_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2403,10 +2564,10 @@
    * @param[in]  blockSize  number of samples in each vector
    */
   void arm_add_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t blockSize);
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2417,10 +2578,10 @@
    * @param[in]  blockSize  number of samples in each vector
    */
   void arm_add_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t blockSize);
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2431,10 +2592,10 @@
    * @param[in]  blockSize  number of samples in each vector
    */
   void arm_sub_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t blockSize);
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2445,10 +2606,10 @@
    * @param[in]  blockSize  number of samples in each vector
    */
   void arm_sub_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  q7_t * pDst,
-  uint32_t blockSize);
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        q7_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2459,10 +2620,10 @@
    * @param[in]  blockSize  number of samples in each vector
    */
   void arm_sub_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t blockSize);
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2473,10 +2634,10 @@
    * @param[in]  blockSize  number of samples in each vector
    */
   void arm_sub_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t blockSize);
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2487,10 +2648,10 @@
    * @param[in]  blockSize  number of samples in the vector
    */
   void arm_scale_f32(
-  float32_t * pSrc,
-  float32_t scale,
-  float32_t * pDst,
-  uint32_t blockSize);
+  const float32_t * pSrc,
+        float32_t scale,
+        float32_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2502,11 +2663,11 @@
    * @param[in]  blockSize   number of samples in the vector
    */
   void arm_scale_q7(
-  q7_t * pSrc,
-  q7_t scaleFract,
-  int8_t shift,
-  q7_t * pDst,
-  uint32_t blockSize);
+  const q7_t * pSrc,
+        q7_t scaleFract,
+        int8_t shift,
+        q7_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2518,11 +2679,11 @@
    * @param[in]  blockSize   number of samples in the vector
    */
   void arm_scale_q15(
-  q15_t * pSrc,
-  q15_t scaleFract,
-  int8_t shift,
-  q15_t * pDst,
-  uint32_t blockSize);
+  const q15_t * pSrc,
+        q15_t scaleFract,
+        int8_t shift,
+        q15_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2534,11 +2695,11 @@
    * @param[in]  blockSize   number of samples in the vector
    */
   void arm_scale_q31(
-  q31_t * pSrc,
-  q31_t scaleFract,
-  int8_t shift,
-  q31_t * pDst,
-  uint32_t blockSize);
+  const q31_t * pSrc,
+        q31_t scaleFract,
+        int8_t shift,
+        q31_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2548,9 +2709,9 @@
    * @param[in]  blockSize  number of samples in each vector
    */
   void arm_abs_q7(
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2560,9 +2721,9 @@
    * @param[in]  blockSize  number of samples in each vector
    */
   void arm_abs_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2572,9 +2733,9 @@
    * @param[in]  blockSize  number of samples in each vector
    */
   void arm_abs_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2584,9 +2745,9 @@
    * @param[in]  blockSize  number of samples in each vector
    */
   void arm_abs_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2597,10 +2758,10 @@
    * @param[out] result     output result returned here
    */
   void arm_dot_prod_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  uint32_t blockSize,
-  float32_t * result);
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        uint32_t blockSize,
+        float32_t * result);
 
 
   /**
@@ -2611,10 +2772,10 @@
    * @param[out] result     output result returned here
    */
   void arm_dot_prod_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  uint32_t blockSize,
-  q31_t * result);
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        uint32_t blockSize,
+        q31_t * result);
 
 
   /**
@@ -2625,10 +2786,10 @@
    * @param[out] result     output result returned here
    */
   void arm_dot_prod_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  uint32_t blockSize,
-  q63_t * result);
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        uint32_t blockSize,
+        q63_t * result);
 
 
   /**
@@ -2639,10 +2800,10 @@
    * @param[out] result     output result returned here
    */
   void arm_dot_prod_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  uint32_t blockSize,
-  q63_t * result);
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        uint32_t blockSize,
+        q63_t * result);
 
 
   /**
@@ -2653,10 +2814,10 @@
    * @param[in]  blockSize  number of samples in the vector
    */
   void arm_shift_q7(
-  q7_t * pSrc,
-  int8_t shiftBits,
-  q7_t * pDst,
-  uint32_t blockSize);
+  const q7_t * pSrc,
+        int8_t shiftBits,
+        q7_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2667,10 +2828,10 @@
    * @param[in]  blockSize  number of samples in the vector
    */
   void arm_shift_q15(
-  q15_t * pSrc,
-  int8_t shiftBits,
-  q15_t * pDst,
-  uint32_t blockSize);
+  const q15_t * pSrc,
+        int8_t shiftBits,
+        q15_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2681,10 +2842,10 @@
    * @param[in]  blockSize  number of samples in the vector
    */
   void arm_shift_q31(
-  q31_t * pSrc,
-  int8_t shiftBits,
-  q31_t * pDst,
-  uint32_t blockSize);
+  const q31_t * pSrc,
+        int8_t shiftBits,
+        q31_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2695,10 +2856,10 @@
    * @param[in]  blockSize  number of samples in the vector
    */
   void arm_offset_f32(
-  float32_t * pSrc,
-  float32_t offset,
-  float32_t * pDst,
-  uint32_t blockSize);
+  const float32_t * pSrc,
+        float32_t offset,
+        float32_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2709,10 +2870,10 @@
    * @param[in]  blockSize  number of samples in the vector
    */
   void arm_offset_q7(
-  q7_t * pSrc,
-  q7_t offset,
-  q7_t * pDst,
-  uint32_t blockSize);
+  const q7_t * pSrc,
+        q7_t offset,
+        q7_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2723,10 +2884,10 @@
    * @param[in]  blockSize  number of samples in the vector
    */
   void arm_offset_q15(
-  q15_t * pSrc,
-  q15_t offset,
-  q15_t * pDst,
-  uint32_t blockSize);
+  const q15_t * pSrc,
+        q15_t offset,
+        q15_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2737,10 +2898,10 @@
    * @param[in]  blockSize  number of samples in the vector
    */
   void arm_offset_q31(
-  q31_t * pSrc,
-  q31_t offset,
-  q31_t * pDst,
-  uint32_t blockSize);
+  const q31_t * pSrc,
+        q31_t offset,
+        q31_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2750,9 +2911,9 @@
    * @param[in]  blockSize  number of samples in the vector
    */
   void arm_negate_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2762,9 +2923,9 @@
    * @param[in]  blockSize  number of samples in the vector
    */
   void arm_negate_q7(
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2774,9 +2935,9 @@
    * @param[in]  blockSize  number of samples in the vector
    */
   void arm_negate_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2786,9 +2947,9 @@
    * @param[in]  blockSize  number of samples in the vector
    */
   void arm_negate_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2798,9 +2959,9 @@
    * @param[in]  blockSize  number of samples to process
    */
   void arm_copy_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2810,9 +2971,9 @@
    * @param[in]  blockSize  number of samples to process
    */
   void arm_copy_q7(
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2822,9 +2983,9 @@
    * @param[in]  blockSize  number of samples to process
    */
   void arm_copy_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2834,9 +2995,9 @@
    * @param[in]  blockSize  number of samples to process
    */
   void arm_copy_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2846,9 +3007,9 @@
    * @param[in]  blockSize  number of samples to process
    */
   void arm_fill_f32(
-  float32_t value,
-  float32_t * pDst,
-  uint32_t blockSize);
+        float32_t value,
+        float32_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2858,9 +3019,9 @@
    * @param[in]  blockSize  number of samples to process
    */
   void arm_fill_q7(
-  q7_t value,
-  q7_t * pDst,
-  uint32_t blockSize);
+        q7_t value,
+        q7_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2870,9 +3031,9 @@
    * @param[in]  blockSize  number of samples to process
    */
   void arm_fill_q15(
-  q15_t value,
-  q15_t * pDst,
-  uint32_t blockSize);
+        q15_t value,
+        q15_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -2882,9 +3043,9 @@
    * @param[in]  blockSize  number of samples to process
    */
   void arm_fill_q31(
-  q31_t value,
-  q31_t * pDst,
-  uint32_t blockSize);
+        q31_t value,
+        q31_t * pDst,
+        uint32_t blockSize);
 
 
 /**
@@ -2896,11 +3057,11 @@
  * @param[out] pDst     points to the location where the output result is written.  Length srcALen+srcBLen-1.
  */
   void arm_conv_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst);
+  const float32_t * pSrcA,
+        uint32_t srcALen,
+  const float32_t * pSrcB,
+        uint32_t srcBLen,
+        float32_t * pDst);
 
 
   /**
@@ -2914,13 +3075,13 @@
    * @param[in]  pScratch2  points to scratch buffer of size min(srcALen, srcBLen).
    */
   void arm_conv_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2);
 
 
 /**
@@ -2932,11 +3093,11 @@
  * @param[out] pDst     points to the location where the output result is written.  Length srcALen+srcBLen-1.
  */
   void arm_conv_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst);
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst);
 
 
   /**
@@ -2948,11 +3109,11 @@
    * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
    */
   void arm_conv_fast_q15(
-          q15_t * pSrcA,
-          uint32_t srcALen,
-          q15_t * pSrcB,
-          uint32_t srcBLen,
-          q15_t * pDst);
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst);
 
 
   /**
@@ -2966,13 +3127,13 @@
    * @param[in]  pScratch2  points to scratch buffer of size min(srcALen, srcBLen).
    */
   void arm_conv_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2);
 
 
   /**
@@ -2984,11 +3145,11 @@
    * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
    */
   void arm_conv_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst);
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst);
 
 
   /**
@@ -3000,11 +3161,11 @@
    * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
    */
   void arm_conv_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst);
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst);
 
 
     /**
@@ -3018,13 +3179,13 @@
    * @param[in]  pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
    */
   void arm_conv_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2);
 
 
   /**
@@ -3036,11 +3197,11 @@
    * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
    */
   void arm_conv_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst);
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst);
 
 
   /**
@@ -3055,13 +3216,13 @@
    * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    */
   arm_status arm_conv_partial_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints);
+  const float32_t * pSrcA,
+        uint32_t srcALen,
+  const float32_t * pSrcB,
+        uint32_t srcBLen,
+        float32_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints);
 
 
   /**
@@ -3078,15 +3239,15 @@
    * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    */
   arm_status arm_conv_partial_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints,
+        q15_t * pScratch1,
+        q15_t * pScratch2);
 
 
   /**
@@ -3101,13 +3262,13 @@
    * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    */
   arm_status arm_conv_partial_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints);
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints);
 
 
   /**
@@ -3122,13 +3283,13 @@
    * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    */
   arm_status arm_conv_partial_fast_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints);
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints);
 
 
   /**
@@ -3145,15 +3306,15 @@
    * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    */
   arm_status arm_conv_partial_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints,
+        q15_t * pScratch1,
+        q15_t * pScratch2);
 
 
   /**
@@ -3168,13 +3329,13 @@
    * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    */
   arm_status arm_conv_partial_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints);
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints);
 
 
   /**
@@ -3189,13 +3350,13 @@
    * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    */
   arm_status arm_conv_partial_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints);
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints);
 
 
   /**
@@ -3212,15 +3373,15 @@
    * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    */
   arm_status arm_conv_partial_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints,
+        q15_t * pScratch1,
+        q15_t * pScratch2);
 
 
 /**
@@ -3235,13 +3396,13 @@
    * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    */
   arm_status arm_conv_partial_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints);
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints);
 
 
   /**
@@ -3249,10 +3410,10 @@
    */
   typedef struct
   {
-    uint8_t M;                  /**< decimation factor. */
-    uint16_t numTaps;           /**< number of coefficients in the filter. */
-    q15_t *pCoeffs;             /**< points to the coefficient array. The array is of length numTaps.*/
-    q15_t *pState;              /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+          uint8_t M;                  /**< decimation factor. */
+          uint16_t numTaps;           /**< number of coefficients in the filter. */
+    const q15_t *pCoeffs;             /**< points to the coefficient array. The array is of length numTaps.*/
+          q15_t *pState;              /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
   } arm_fir_decimate_instance_q15;
 
   /**
@@ -3260,56 +3421,57 @@
    */
   typedef struct
   {
-    uint8_t M;                  /**< decimation factor. */
-    uint16_t numTaps;           /**< number of coefficients in the filter. */
-    q31_t *pCoeffs;             /**< points to the coefficient array. The array is of length numTaps.*/
-    q31_t *pState;              /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+          uint8_t M;                  /**< decimation factor. */
+          uint16_t numTaps;           /**< number of coefficients in the filter. */
+    const q31_t *pCoeffs;             /**< points to the coefficient array. The array is of length numTaps.*/
+          q31_t *pState;              /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
   } arm_fir_decimate_instance_q31;
 
-  /**
-   * @brief Instance structure for the floating-point FIR decimator.
-   */
-  typedef struct
+/**
+  @brief Instance structure for floating-point FIR decimator.
+ */
+typedef struct
   {
-    uint8_t M;                  /**< decimation factor. */
-    uint16_t numTaps;           /**< number of coefficients in the filter. */
-    float32_t *pCoeffs;         /**< points to the coefficient array. The array is of length numTaps.*/
-    float32_t *pState;          /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+          uint8_t M;                  /**< decimation factor. */
+          uint16_t numTaps;           /**< number of coefficients in the filter. */
+    const float32_t *pCoeffs;         /**< points to the coefficient array. The array is of length numTaps.*/
+          float32_t *pState;          /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
   } arm_fir_decimate_instance_f32;
 
 
-  /**
-   * @brief Processing function for the floating-point FIR decimator.
-   * @param[in]  S          points to an instance of the floating-point FIR decimator structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of input samples to process per call.
-   */
-  void arm_fir_decimate_f32(
+/**
+  @brief         Processing function for floating-point FIR decimator.
+  @param[in]     S         points to an instance of the floating-point FIR decimator structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process
+ */
+void arm_fir_decimate_f32(
   const arm_fir_decimate_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
 
 
-  /**
-   * @brief  Initialization function for the floating-point FIR decimator.
-   * @param[in,out] S          points to an instance of the floating-point FIR decimator structure.
-   * @param[in]     numTaps    number of coefficients in the filter.
-   * @param[in]     M          decimation factor.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of input samples to process per call.
-   * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * <code>blockSize</code> is not a multiple of <code>M</code>.
-   */
-  arm_status arm_fir_decimate_init_f32(
-  arm_fir_decimate_instance_f32 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize);
+/**
+  @brief         Initialization function for the floating-point FIR decimator.
+  @param[in,out] S          points to an instance of the floating-point FIR decimator structure
+  @param[in]     numTaps    number of coefficients in the filter
+  @param[in]     M          decimation factor
+  @param[in]     pCoeffs    points to the filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     blockSize  number of input samples to process per call
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS      : Operation successful
+                   - \ref ARM_MATH_LENGTH_ERROR : <code>blockSize</code> is not a multiple of <code>M</code>
+ */
+arm_status arm_fir_decimate_init_f32(
+        arm_fir_decimate_instance_f32 * S,
+        uint16_t numTaps,
+        uint8_t M,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        uint32_t blockSize);
 
 
   /**
@@ -3321,9 +3483,9 @@
    */
   void arm_fir_decimate_q15(
   const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -3335,9 +3497,9 @@
    */
   void arm_fir_decimate_fast_q15(
   const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -3352,12 +3514,12 @@
    * <code>blockSize</code> is not a multiple of <code>M</code>.
    */
   arm_status arm_fir_decimate_init_q15(
-  arm_fir_decimate_instance_q15 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize);
+        arm_fir_decimate_instance_q15 * S,
+        uint16_t numTaps,
+        uint8_t M,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        uint32_t blockSize);
 
 
   /**
@@ -3369,9 +3531,9 @@
    */
   void arm_fir_decimate_q31(
   const arm_fir_decimate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
 
   /**
    * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
@@ -3381,10 +3543,10 @@
    * @param[in]  blockSize  number of input samples to process per call.
    */
   void arm_fir_decimate_fast_q31(
-  arm_fir_decimate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
+  const arm_fir_decimate_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -3399,12 +3561,12 @@
    * <code>blockSize</code> is not a multiple of <code>M</code>.
    */
   arm_status arm_fir_decimate_init_q31(
-  arm_fir_decimate_instance_q31 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize);
+        arm_fir_decimate_instance_q31 * S,
+        uint16_t numTaps,
+        uint8_t M,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        uint32_t blockSize);
 
 
   /**
@@ -3412,10 +3574,10 @@
    */
   typedef struct
   {
-    uint8_t L;                      /**< upsample factor. */
-    uint16_t phaseLength;           /**< length of each polyphase filter component. */
-    q15_t *pCoeffs;                 /**< points to the coefficient array. The array is of length L*phaseLength. */
-    q15_t *pState;                  /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
+        uint8_t L;                      /**< upsample factor. */
+        uint16_t phaseLength;           /**< length of each polyphase filter component. */
+  const q15_t *pCoeffs;                 /**< points to the coefficient array. The array is of length L*phaseLength. */
+        q15_t *pState;                  /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
   } arm_fir_interpolate_instance_q15;
 
   /**
@@ -3423,10 +3585,10 @@
    */
   typedef struct
   {
-    uint8_t L;                      /**< upsample factor. */
-    uint16_t phaseLength;           /**< length of each polyphase filter component. */
-    q31_t *pCoeffs;                 /**< points to the coefficient array. The array is of length L*phaseLength. */
-    q31_t *pState;                  /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
+        uint8_t L;                      /**< upsample factor. */
+        uint16_t phaseLength;           /**< length of each polyphase filter component. */
+  const q31_t *pCoeffs;                 /**< points to the coefficient array. The array is of length L*phaseLength. */
+        q31_t *pState;                  /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
   } arm_fir_interpolate_instance_q31;
 
   /**
@@ -3434,10 +3596,10 @@
    */
   typedef struct
   {
-    uint8_t L;                     /**< upsample factor. */
-    uint16_t phaseLength;          /**< length of each polyphase filter component. */
-    float32_t *pCoeffs;            /**< points to the coefficient array. The array is of length L*phaseLength. */
-    float32_t *pState;             /**< points to the state variable array. The array is of length phaseLength+numTaps-1. */
+        uint8_t L;                     /**< upsample factor. */
+        uint16_t phaseLength;          /**< length of each polyphase filter component. */
+  const float32_t *pCoeffs;            /**< points to the coefficient array. The array is of length L*phaseLength. */
+        float32_t *pState;             /**< points to the state variable array. The array is of length phaseLength+numTaps-1. */
   } arm_fir_interpolate_instance_f32;
 
 
@@ -3450,9 +3612,9 @@
    */
   void arm_fir_interpolate_q15(
   const arm_fir_interpolate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -3467,12 +3629,12 @@
    * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
    */
   arm_status arm_fir_interpolate_init_q15(
-  arm_fir_interpolate_instance_q15 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize);
+        arm_fir_interpolate_instance_q15 * S,
+        uint8_t L,
+        uint16_t numTaps,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        uint32_t blockSize);
 
 
   /**
@@ -3484,9 +3646,9 @@
    */
   void arm_fir_interpolate_q31(
   const arm_fir_interpolate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -3501,12 +3663,12 @@
    * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
    */
   arm_status arm_fir_interpolate_init_q31(
-  arm_fir_interpolate_instance_q31 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize);
+        arm_fir_interpolate_instance_q31 * S,
+        uint8_t L,
+        uint16_t numTaps,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        uint32_t blockSize);
 
 
   /**
@@ -3518,9 +3680,9 @@
    */
   void arm_fir_interpolate_f32(
   const arm_fir_interpolate_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -3535,12 +3697,12 @@
    * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
    */
   arm_status arm_fir_interpolate_init_f32(
-  arm_fir_interpolate_instance_f32 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize);
+        arm_fir_interpolate_instance_f32 * S,
+        uint8_t L,
+        uint16_t numTaps,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        uint32_t blockSize);
 
 
   /**
@@ -3548,10 +3710,10 @@
    */
   typedef struct
   {
-    uint8_t numStages;       /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    q63_t *pState;           /**< points to the array of state coefficients.  The array is of length 4*numStages. */
-    q31_t *pCoeffs;          /**< points to the array of coefficients.  The array is of length 5*numStages. */
-    uint8_t postShift;       /**< additional shift, in bits, applied to each output sample. */
+          uint8_t numStages;       /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          q63_t *pState;           /**< points to the array of state coefficients.  The array is of length 4*numStages. */
+    const q31_t *pCoeffs;          /**< points to the array of coefficients.  The array is of length 5*numStages. */
+          uint8_t postShift;       /**< additional shift, in bits, applied to each output sample. */
   } arm_biquad_cas_df1_32x64_ins_q31;
 
 
@@ -3563,9 +3725,9 @@
    */
   void arm_biquad_cas_df1_32x64_q31(
   const arm_biquad_cas_df1_32x64_ins_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
+        q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -3576,11 +3738,11 @@
    * @param[in]     postShift  shift to be applied to the output. Varies according to the coefficients format
    */
   void arm_biquad_cas_df1_32x64_init_q31(
-  arm_biquad_cas_df1_32x64_ins_q31 * S,
-  uint8_t numStages,
-  q31_t * pCoeffs,
-  q63_t * pState,
-  uint8_t postShift);
+        arm_biquad_cas_df1_32x64_ins_q31 * S,
+        uint8_t numStages,
+  const q31_t * pCoeffs,
+        q63_t * pState,
+        uint8_t postShift);
 
 
   /**
@@ -3588,9 +3750,9 @@
    */
   typedef struct
   {
-    uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    float32_t *pState;         /**< points to the array of state coefficients.  The array is of length 2*numStages. */
-    float32_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
+          uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          float32_t *pState;         /**< points to the array of state coefficients.  The array is of length 2*numStages. */
+    const float32_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
   } arm_biquad_cascade_df2T_instance_f32;
 
   /**
@@ -3598,9 +3760,9 @@
    */
   typedef struct
   {
-    uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    float32_t *pState;         /**< points to the array of state coefficients.  The array is of length 4*numStages. */
-    float32_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
+          uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          float32_t *pState;         /**< points to the array of state coefficients.  The array is of length 4*numStages. */
+    const float32_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
   } arm_biquad_cascade_stereo_df2T_instance_f32;
 
   /**
@@ -3608,9 +3770,9 @@
    */
   typedef struct
   {
-    uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    float64_t *pState;         /**< points to the array of state coefficients.  The array is of length 2*numStages. */
-    float64_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
+          uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          float64_t *pState;         /**< points to the array of state coefficients.  The array is of length 2*numStages. */
+          float64_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
   } arm_biquad_cascade_df2T_instance_f64;
 
 
@@ -3623,9 +3785,9 @@
    */
   void arm_biquad_cascade_df2T_f32(
   const arm_biquad_cascade_df2T_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -3637,9 +3799,9 @@
    */
   void arm_biquad_cascade_stereo_df2T_f32(
   const arm_biquad_cascade_stereo_df2T_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -3651,11 +3813,17 @@
    */
   void arm_biquad_cascade_df2T_f64(
   const arm_biquad_cascade_df2T_instance_f64 * S,
-  float64_t * pSrc,
-  float64_t * pDst,
-  uint32_t blockSize);
+        float64_t * pSrc,
+        float64_t * pDst,
+        uint32_t blockSize);
 
 
+#if defined(ARM_MATH_NEON) 
+void arm_biquad_cascade_df2T_compute_coefs_f32(
+  arm_biquad_cascade_df2T_instance_f32 * S,
+  uint8_t numStages,
+  float32_t * pCoeffs);
+#endif
   /**
    * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
    * @param[in,out] S          points to an instance of the filter data structure.
@@ -3664,10 +3832,10 @@
    * @param[in]     pState     points to the state buffer.
    */
   void arm_biquad_cascade_df2T_init_f32(
-  arm_biquad_cascade_df2T_instance_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState);
+        arm_biquad_cascade_df2T_instance_f32 * S,
+        uint8_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState);
 
 
   /**
@@ -3678,10 +3846,10 @@
    * @param[in]     pState     points to the state buffer.
    */
   void arm_biquad_cascade_stereo_df2T_init_f32(
-  arm_biquad_cascade_stereo_df2T_instance_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState);
+        arm_biquad_cascade_stereo_df2T_instance_f32 * S,
+        uint8_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState);
 
 
   /**
@@ -3692,10 +3860,10 @@
    * @param[in]     pState     points to the state buffer.
    */
   void arm_biquad_cascade_df2T_init_f64(
-  arm_biquad_cascade_df2T_instance_f64 * S,
-  uint8_t numStages,
-  float64_t * pCoeffs,
-  float64_t * pState);
+        arm_biquad_cascade_df2T_instance_f64 * S,
+        uint8_t numStages,
+        float64_t * pCoeffs,
+        float64_t * pState);
 
 
   /**
@@ -3703,9 +3871,9 @@
    */
   typedef struct
   {
-    uint16_t numStages;                  /**< number of filter stages. */
-    q15_t *pState;                       /**< points to the state variable array. The array is of length numStages. */
-    q15_t *pCoeffs;                      /**< points to the coefficient array. The array is of length numStages. */
+          uint16_t numStages;                  /**< number of filter stages. */
+          q15_t *pState;                       /**< points to the state variable array. The array is of length numStages. */
+    const q15_t *pCoeffs;                      /**< points to the coefficient array. The array is of length numStages. */
   } arm_fir_lattice_instance_q15;
 
   /**
@@ -3713,9 +3881,9 @@
    */
   typedef struct
   {
-    uint16_t numStages;                  /**< number of filter stages. */
-    q31_t *pState;                       /**< points to the state variable array. The array is of length numStages. */
-    q31_t *pCoeffs;                      /**< points to the coefficient array. The array is of length numStages. */
+          uint16_t numStages;                  /**< number of filter stages. */
+          q31_t *pState;                       /**< points to the state variable array. The array is of length numStages. */
+    const q31_t *pCoeffs;                      /**< points to the coefficient array. The array is of length numStages. */
   } arm_fir_lattice_instance_q31;
 
   /**
@@ -3723,9 +3891,9 @@
    */
   typedef struct
   {
-    uint16_t numStages;                  /**< number of filter stages. */
-    float32_t *pState;                   /**< points to the state variable array. The array is of length numStages. */
-    float32_t *pCoeffs;                  /**< points to the coefficient array. The array is of length numStages. */
+          uint16_t numStages;                  /**< number of filter stages. */
+          float32_t *pState;                   /**< points to the state variable array. The array is of length numStages. */
+    const float32_t *pCoeffs;                  /**< points to the coefficient array. The array is of length numStages. */
   } arm_fir_lattice_instance_f32;
 
 
@@ -3737,10 +3905,10 @@
    * @param[in] pState     points to the state buffer.  The array is of length numStages.
    */
   void arm_fir_lattice_init_q15(
-  arm_fir_lattice_instance_q15 * S,
-  uint16_t numStages,
-  q15_t * pCoeffs,
-  q15_t * pState);
+        arm_fir_lattice_instance_q15 * S,
+        uint16_t numStages,
+  const q15_t * pCoeffs,
+        q15_t * pState);
 
 
   /**
@@ -3752,9 +3920,9 @@
    */
   void arm_fir_lattice_q15(
   const arm_fir_lattice_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -3765,10 +3933,10 @@
    * @param[in] pState     points to the state buffer.   The array is of length numStages.
    */
   void arm_fir_lattice_init_q31(
-  arm_fir_lattice_instance_q31 * S,
-  uint16_t numStages,
-  q31_t * pCoeffs,
-  q31_t * pState);
+        arm_fir_lattice_instance_q31 * S,
+        uint16_t numStages,
+  const q31_t * pCoeffs,
+        q31_t * pState);
 
 
   /**
@@ -3780,9 +3948,9 @@
    */
   void arm_fir_lattice_q31(
   const arm_fir_lattice_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
 
 
 /**
@@ -3793,10 +3961,10 @@
  * @param[in] pState     points to the state buffer.  The array is of length numStages.
  */
   void arm_fir_lattice_init_f32(
-  arm_fir_lattice_instance_f32 * S,
-  uint16_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState);
+        arm_fir_lattice_instance_f32 * S,
+        uint16_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState);
 
 
   /**
@@ -3808,9 +3976,9 @@
    */
   void arm_fir_lattice_f32(
   const arm_fir_lattice_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -3818,10 +3986,10 @@
    */
   typedef struct
   {
-    uint16_t numStages;                  /**< number of stages in the filter. */
-    q15_t *pState;                       /**< points to the state variable array. The array is of length numStages+blockSize. */
-    q15_t *pkCoeffs;                     /**< points to the reflection coefficient array. The array is of length numStages. */
-    q15_t *pvCoeffs;                     /**< points to the ladder coefficient array. The array is of length numStages+1. */
+          uint16_t numStages;                  /**< number of stages in the filter. */
+          q15_t *pState;                       /**< points to the state variable array. The array is of length numStages+blockSize. */
+          q15_t *pkCoeffs;                     /**< points to the reflection coefficient array. The array is of length numStages. */
+          q15_t *pvCoeffs;                     /**< points to the ladder coefficient array. The array is of length numStages+1. */
   } arm_iir_lattice_instance_q15;
 
   /**
@@ -3829,10 +3997,10 @@
    */
   typedef struct
   {
-    uint16_t numStages;                  /**< number of stages in the filter. */
-    q31_t *pState;                       /**< points to the state variable array. The array is of length numStages+blockSize. */
-    q31_t *pkCoeffs;                     /**< points to the reflection coefficient array. The array is of length numStages. */
-    q31_t *pvCoeffs;                     /**< points to the ladder coefficient array. The array is of length numStages+1. */
+          uint16_t numStages;                  /**< number of stages in the filter. */
+          q31_t *pState;                       /**< points to the state variable array. The array is of length numStages+blockSize. */
+          q31_t *pkCoeffs;                     /**< points to the reflection coefficient array. The array is of length numStages. */
+          q31_t *pvCoeffs;                     /**< points to the ladder coefficient array. The array is of length numStages+1. */
   } arm_iir_lattice_instance_q31;
 
   /**
@@ -3840,10 +4008,10 @@
    */
   typedef struct
   {
-    uint16_t numStages;                  /**< number of stages in the filter. */
-    float32_t *pState;                   /**< points to the state variable array. The array is of length numStages+blockSize. */
-    float32_t *pkCoeffs;                 /**< points to the reflection coefficient array. The array is of length numStages. */
-    float32_t *pvCoeffs;                 /**< points to the ladder coefficient array. The array is of length numStages+1. */
+          uint16_t numStages;                  /**< number of stages in the filter. */
+          float32_t *pState;                   /**< points to the state variable array. The array is of length numStages+blockSize. */
+          float32_t *pkCoeffs;                 /**< points to the reflection coefficient array. The array is of length numStages. */
+          float32_t *pvCoeffs;                 /**< points to the ladder coefficient array. The array is of length numStages+1. */
   } arm_iir_lattice_instance_f32;
 
 
@@ -3856,9 +4024,9 @@
    */
   void arm_iir_lattice_f32(
   const arm_iir_lattice_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -3871,12 +4039,12 @@
    * @param[in] blockSize  number of samples to process.
    */
   void arm_iir_lattice_init_f32(
-  arm_iir_lattice_instance_f32 * S,
-  uint16_t numStages,
-  float32_t * pkCoeffs,
-  float32_t * pvCoeffs,
-  float32_t * pState,
-  uint32_t blockSize);
+        arm_iir_lattice_instance_f32 * S,
+        uint16_t numStages,
+        float32_t * pkCoeffs,
+        float32_t * pvCoeffs,
+        float32_t * pState,
+        uint32_t blockSize);
 
 
   /**
@@ -3888,9 +4056,9 @@
    */
   void arm_iir_lattice_q31(
   const arm_iir_lattice_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -3903,12 +4071,12 @@
    * @param[in] blockSize  number of samples to process.
    */
   void arm_iir_lattice_init_q31(
-  arm_iir_lattice_instance_q31 * S,
-  uint16_t numStages,
-  q31_t * pkCoeffs,
-  q31_t * pvCoeffs,
-  q31_t * pState,
-  uint32_t blockSize);
+        arm_iir_lattice_instance_q31 * S,
+        uint16_t numStages,
+        q31_t * pkCoeffs,
+        q31_t * pvCoeffs,
+        q31_t * pState,
+        uint32_t blockSize);
 
 
   /**
@@ -3920,9 +4088,9 @@
    */
   void arm_iir_lattice_q15(
   const arm_iir_lattice_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
 
 
 /**
@@ -3935,12 +4103,12 @@
  * @param[in] blockSize  number of samples to process per call.
  */
   void arm_iir_lattice_init_q15(
-  arm_iir_lattice_instance_q15 * S,
-  uint16_t numStages,
-  q15_t * pkCoeffs,
-  q15_t * pvCoeffs,
-  q15_t * pState,
-  uint32_t blockSize);
+        arm_iir_lattice_instance_q15 * S,
+        uint16_t numStages,
+        q15_t * pkCoeffs,
+        q15_t * pvCoeffs,
+        q15_t * pState,
+        uint32_t blockSize);
 
 
   /**
@@ -3948,10 +4116,10 @@
    */
   typedef struct
   {
-    uint16_t numTaps;    /**< number of coefficients in the filter. */
-    float32_t *pState;   /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    float32_t *pCoeffs;  /**< points to the coefficient array. The array is of length numTaps. */
-    float32_t mu;        /**< step size that controls filter coefficient updates. */
+          uint16_t numTaps;    /**< number of coefficients in the filter. */
+          float32_t *pState;   /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+          float32_t *pCoeffs;  /**< points to the coefficient array. The array is of length numTaps. */
+          float32_t mu;        /**< step size that controls filter coefficient updates. */
   } arm_lms_instance_f32;
 
 
@@ -3966,11 +4134,11 @@
    */
   void arm_lms_f32(
   const arm_lms_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pRef,
-  float32_t * pOut,
-  float32_t * pErr,
-  uint32_t blockSize);
+  const float32_t * pSrc,
+        float32_t * pRef,
+        float32_t * pOut,
+        float32_t * pErr,
+        uint32_t blockSize);
 
 
   /**
@@ -3983,12 +4151,12 @@
    * @param[in] blockSize  number of samples to process.
    */
   void arm_lms_init_f32(
-  arm_lms_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  float32_t mu,
-  uint32_t blockSize);
+        arm_lms_instance_f32 * S,
+        uint16_t numTaps,
+        float32_t * pCoeffs,
+        float32_t * pState,
+        float32_t mu,
+        uint32_t blockSize);
 
 
   /**
@@ -3996,11 +4164,11 @@
    */
   typedef struct
   {
-    uint16_t numTaps;    /**< number of coefficients in the filter. */
-    q15_t *pState;       /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q15_t *pCoeffs;      /**< points to the coefficient array. The array is of length numTaps. */
-    q15_t mu;            /**< step size that controls filter coefficient updates. */
-    uint32_t postShift;  /**< bit shift applied to coefficients. */
+          uint16_t numTaps;    /**< number of coefficients in the filter. */
+          q15_t *pState;       /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+          q15_t *pCoeffs;      /**< points to the coefficient array. The array is of length numTaps. */
+          q15_t mu;            /**< step size that controls filter coefficient updates. */
+          uint32_t postShift;  /**< bit shift applied to coefficients. */
   } arm_lms_instance_q15;
 
 
@@ -4015,13 +4183,13 @@
    * @param[in] postShift  bit shift applied to coefficients.
    */
   void arm_lms_init_q15(
-  arm_lms_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  q15_t mu,
-  uint32_t blockSize,
-  uint32_t postShift);
+        arm_lms_instance_q15 * S,
+        uint16_t numTaps,
+        q15_t * pCoeffs,
+        q15_t * pState,
+        q15_t mu,
+        uint32_t blockSize,
+        uint32_t postShift);
 
 
   /**
@@ -4035,11 +4203,11 @@
    */
   void arm_lms_q15(
   const arm_lms_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pRef,
-  q15_t * pOut,
-  q15_t * pErr,
-  uint32_t blockSize);
+  const q15_t * pSrc,
+        q15_t * pRef,
+        q15_t * pOut,
+        q15_t * pErr,
+        uint32_t blockSize);
 
 
   /**
@@ -4047,11 +4215,11 @@
    */
   typedef struct
   {
-    uint16_t numTaps;    /**< number of coefficients in the filter. */
-    q31_t *pState;       /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q31_t *pCoeffs;      /**< points to the coefficient array. The array is of length numTaps. */
-    q31_t mu;            /**< step size that controls filter coefficient updates. */
-    uint32_t postShift;  /**< bit shift applied to coefficients. */
+          uint16_t numTaps;    /**< number of coefficients in the filter. */
+          q31_t *pState;       /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+          q31_t *pCoeffs;      /**< points to the coefficient array. The array is of length numTaps. */
+          q31_t mu;            /**< step size that controls filter coefficient updates. */
+          uint32_t postShift;  /**< bit shift applied to coefficients. */
   } arm_lms_instance_q31;
 
 
@@ -4066,11 +4234,11 @@
    */
   void arm_lms_q31(
   const arm_lms_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pRef,
-  q31_t * pOut,
-  q31_t * pErr,
-  uint32_t blockSize);
+  const q31_t * pSrc,
+        q31_t * pRef,
+        q31_t * pOut,
+        q31_t * pErr,
+        uint32_t blockSize);
 
 
   /**
@@ -4084,13 +4252,13 @@
    * @param[in] postShift  bit shift applied to coefficients.
    */
   void arm_lms_init_q31(
-  arm_lms_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  q31_t mu,
-  uint32_t blockSize,
-  uint32_t postShift);
+        arm_lms_instance_q31 * S,
+        uint16_t numTaps,
+        q31_t * pCoeffs,
+        q31_t * pState,
+        q31_t mu,
+        uint32_t blockSize,
+        uint32_t postShift);
 
 
   /**
@@ -4098,12 +4266,12 @@
    */
   typedef struct
   {
-    uint16_t numTaps;     /**< number of coefficients in the filter. */
-    float32_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    float32_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps. */
-    float32_t mu;         /**< step size that control filter coefficient updates. */
-    float32_t energy;     /**< saves previous frame energy. */
-    float32_t x0;         /**< saves previous input sample. */
+          uint16_t numTaps;     /**< number of coefficients in the filter. */
+          float32_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+          float32_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps. */
+          float32_t mu;         /**< step size that control filter coefficient updates. */
+          float32_t energy;     /**< saves previous frame energy. */
+          float32_t x0;         /**< saves previous input sample. */
   } arm_lms_norm_instance_f32;
 
 
@@ -4117,12 +4285,12 @@
    * @param[in]  blockSize  number of samples to process.
    */
   void arm_lms_norm_f32(
-  arm_lms_norm_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pRef,
-  float32_t * pOut,
-  float32_t * pErr,
-  uint32_t blockSize);
+        arm_lms_norm_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pRef,
+        float32_t * pOut,
+        float32_t * pErr,
+        uint32_t blockSize);
 
 
   /**
@@ -4135,12 +4303,12 @@
    * @param[in] blockSize  number of samples to process.
    */
   void arm_lms_norm_init_f32(
-  arm_lms_norm_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  float32_t mu,
-  uint32_t blockSize);
+        arm_lms_norm_instance_f32 * S,
+        uint16_t numTaps,
+        float32_t * pCoeffs,
+        float32_t * pState,
+        float32_t mu,
+        uint32_t blockSize);
 
 
   /**
@@ -4148,14 +4316,14 @@
    */
   typedef struct
   {
-    uint16_t numTaps;     /**< number of coefficients in the filter. */
-    q31_t *pState;        /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q31_t *pCoeffs;       /**< points to the coefficient array. The array is of length numTaps. */
-    q31_t mu;             /**< step size that controls filter coefficient updates. */
-    uint8_t postShift;    /**< bit shift applied to coefficients. */
-    q31_t *recipTable;    /**< points to the reciprocal initial value table. */
-    q31_t energy;         /**< saves previous frame energy. */
-    q31_t x0;             /**< saves previous input sample. */
+          uint16_t numTaps;     /**< number of coefficients in the filter. */
+          q31_t *pState;        /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+          q31_t *pCoeffs;       /**< points to the coefficient array. The array is of length numTaps. */
+          q31_t mu;             /**< step size that controls filter coefficient updates. */
+          uint8_t postShift;    /**< bit shift applied to coefficients. */
+    const q31_t *recipTable;    /**< points to the reciprocal initial value table. */
+          q31_t energy;         /**< saves previous frame energy. */
+          q31_t x0;             /**< saves previous input sample. */
   } arm_lms_norm_instance_q31;
 
 
@@ -4169,12 +4337,12 @@
    * @param[in]  blockSize  number of samples to process.
    */
   void arm_lms_norm_q31(
-  arm_lms_norm_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pRef,
-  q31_t * pOut,
-  q31_t * pErr,
-  uint32_t blockSize);
+        arm_lms_norm_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pRef,
+        q31_t * pOut,
+        q31_t * pErr,
+        uint32_t blockSize);
 
 
   /**
@@ -4188,13 +4356,13 @@
    * @param[in] postShift  bit shift applied to coefficients.
    */
   void arm_lms_norm_init_q31(
-  arm_lms_norm_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  q31_t mu,
-  uint32_t blockSize,
-  uint8_t postShift);
+        arm_lms_norm_instance_q31 * S,
+        uint16_t numTaps,
+        q31_t * pCoeffs,
+        q31_t * pState,
+        q31_t mu,
+        uint32_t blockSize,
+        uint8_t postShift);
 
 
   /**
@@ -4202,14 +4370,14 @@
    */
   typedef struct
   {
-    uint16_t numTaps;     /**< Number of coefficients in the filter. */
-    q15_t *pState;        /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q15_t *pCoeffs;       /**< points to the coefficient array. The array is of length numTaps. */
-    q15_t mu;             /**< step size that controls filter coefficient updates. */
-    uint8_t postShift;    /**< bit shift applied to coefficients. */
-    q15_t *recipTable;    /**< Points to the reciprocal initial value table. */
-    q15_t energy;         /**< saves previous frame energy. */
-    q15_t x0;             /**< saves previous input sample. */
+          uint16_t numTaps;     /**< Number of coefficients in the filter. */
+          q15_t *pState;        /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+          q15_t *pCoeffs;       /**< points to the coefficient array. The array is of length numTaps. */
+          q15_t mu;             /**< step size that controls filter coefficient updates. */
+          uint8_t postShift;    /**< bit shift applied to coefficients. */
+    const q15_t *recipTable;    /**< Points to the reciprocal initial value table. */
+          q15_t energy;         /**< saves previous frame energy. */
+          q15_t x0;             /**< saves previous input sample. */
   } arm_lms_norm_instance_q15;
 
 
@@ -4223,12 +4391,12 @@
    * @param[in]  blockSize  number of samples to process.
    */
   void arm_lms_norm_q15(
-  arm_lms_norm_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pRef,
-  q15_t * pOut,
-  q15_t * pErr,
-  uint32_t blockSize);
+        arm_lms_norm_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pRef,
+        q15_t * pOut,
+        q15_t * pErr,
+        uint32_t blockSize);
 
 
   /**
@@ -4242,13 +4410,13 @@
    * @param[in] postShift  bit shift applied to coefficients.
    */
   void arm_lms_norm_init_q15(
-  arm_lms_norm_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  q15_t mu,
-  uint32_t blockSize,
-  uint8_t postShift);
+        arm_lms_norm_instance_q15 * S,
+        uint16_t numTaps,
+        q15_t * pCoeffs,
+        q15_t * pState,
+        q15_t mu,
+        uint32_t blockSize,
+        uint8_t postShift);
 
 
   /**
@@ -4260,81 +4428,80 @@
    * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
    */
   void arm_correlate_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst);
+  const float32_t * pSrcA,
+        uint32_t srcALen,
+  const float32_t * pSrcB,
+        uint32_t srcBLen,
+        float32_t * pDst);
 
 
-   /**
-   * @brief Correlation of Q15 sequences
-   * @param[in]  pSrcA     points to the first input sequence.
-   * @param[in]  srcALen   length of the first input sequence.
-   * @param[in]  pSrcB     points to the second input sequence.
-   * @param[in]  srcBLen   length of the second input sequence.
-   * @param[out] pDst      points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   * @param[in]  pScratch  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   */
-  void arm_correlate_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch);
+/**
+ @brief Correlation of Q15 sequences
+ @param[in]  pSrcA     points to the first input sequence
+ @param[in]  srcALen   length of the first input sequence
+ @param[in]  pSrcB     points to the second input sequence
+ @param[in]  srcBLen   length of the second input sequence
+ @param[out] pDst      points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+ @param[in]  pScratch  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+*/
+void arm_correlate_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch);
 
 
-  /**
-   * @brief Correlation of Q15 sequences.
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   */
-
+/**
+  @brief Correlation of Q15 sequences.
+  @param[in]  pSrcA    points to the first input sequence
+  @param[in]  srcALen  length of the first input sequence
+  @param[in]  pSrcB    points to the second input sequence
+  @param[in]  srcBLen  length of the second input sequence
+  @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+ */
   void arm_correlate_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst);
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst);
 
 
-  /**
-   * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   */
-
-  void arm_correlate_fast_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst);
+/**
+  @brief         Correlation of Q15 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
+ */
+void arm_correlate_fast_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst);
 
 
-  /**
-   * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
-   * @param[in]  pSrcA     points to the first input sequence.
-   * @param[in]  srcALen   length of the first input sequence.
-   * @param[in]  pSrcB     points to the second input sequence.
-   * @param[in]  srcBLen   length of the second input sequence.
-   * @param[out] pDst      points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   * @param[in]  pScratch  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   */
-  void arm_correlate_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch);
+/**
+  @brief Correlation of Q15 sequences (fast version).
+  @param[in]  pSrcA     points to the first input sequence.
+  @param[in]  srcALen   length of the first input sequence.
+  @param[in]  pSrcB     points to the second input sequence.
+  @param[in]  srcBLen   length of the second input sequence.
+  @param[out] pDst      points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+  @param[in]  pScratch  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+ */
+void arm_correlate_fast_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch);
 
 
   /**
@@ -4346,27 +4513,27 @@
    * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
    */
   void arm_correlate_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst);
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst);
 
 
-  /**
-   * @brief Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   */
-  void arm_correlate_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst);
+/**
+  @brief Correlation of Q31 sequences (fast version).
+  @param[in]  pSrcA    points to the first input sequence
+  @param[in]  srcALen  length of the first input sequence
+  @param[in]  pSrcB    points to the second input sequence
+  @param[in]  srcBLen  length of the second input sequence
+  @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+ */
+void arm_correlate_fast_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst);
 
 
  /**
@@ -4380,13 +4547,13 @@
    * @param[in]  pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
    */
   void arm_correlate_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2);
 
 
   /**
@@ -4398,11 +4565,11 @@
    * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
    */
   void arm_correlate_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst);
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst);
 
 
   /**
@@ -4410,12 +4577,12 @@
    */
   typedef struct
   {
-    uint16_t numTaps;             /**< number of coefficients in the filter. */
-    uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
-    float32_t *pState;            /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
-    float32_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
-    uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
-    int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
+          uint16_t numTaps;             /**< number of coefficients in the filter. */
+          uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
+          float32_t *pState;            /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+    const float32_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
+          uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
+          int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
   } arm_fir_sparse_instance_f32;
 
   /**
@@ -4423,12 +4590,12 @@
    */
   typedef struct
   {
-    uint16_t numTaps;             /**< number of coefficients in the filter. */
-    uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
-    q31_t *pState;                /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
-    q31_t *pCoeffs;               /**< points to the coefficient array. The array is of length numTaps.*/
-    uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
-    int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
+          uint16_t numTaps;             /**< number of coefficients in the filter. */
+          uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
+          q31_t *pState;                /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+    const q31_t *pCoeffs;               /**< points to the coefficient array. The array is of length numTaps.*/
+          uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
+          int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
   } arm_fir_sparse_instance_q31;
 
   /**
@@ -4436,12 +4603,12 @@
    */
   typedef struct
   {
-    uint16_t numTaps;             /**< number of coefficients in the filter. */
-    uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
-    q15_t *pState;                /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
-    q15_t *pCoeffs;               /**< points to the coefficient array. The array is of length numTaps.*/
-    uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
-    int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
+          uint16_t numTaps;             /**< number of coefficients in the filter. */
+          uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
+          q15_t *pState;                /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+    const q15_t *pCoeffs;               /**< points to the coefficient array. The array is of length numTaps.*/
+          uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
+          int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
   } arm_fir_sparse_instance_q15;
 
   /**
@@ -4449,12 +4616,12 @@
    */
   typedef struct
   {
-    uint16_t numTaps;             /**< number of coefficients in the filter. */
-    uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
-    q7_t *pState;                 /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
-    q7_t *pCoeffs;                /**< points to the coefficient array. The array is of length numTaps.*/
-    uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
-    int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
+          uint16_t numTaps;             /**< number of coefficients in the filter. */
+          uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
+          q7_t *pState;                 /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+    const q7_t *pCoeffs;                /**< points to the coefficient array. The array is of length numTaps.*/
+          uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
+          int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
   } arm_fir_sparse_instance_q7;
 
 
@@ -4467,11 +4634,11 @@
    * @param[in]  blockSize   number of input samples to process per call.
    */
   void arm_fir_sparse_f32(
-  arm_fir_sparse_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  float32_t * pScratchIn,
-  uint32_t blockSize);
+        arm_fir_sparse_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        float32_t * pScratchIn,
+        uint32_t blockSize);
 
 
   /**
@@ -4485,13 +4652,13 @@
    * @param[in]     blockSize  number of samples that will be processed per block.
    */
   void arm_fir_sparse_init_f32(
-  arm_fir_sparse_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize);
+        arm_fir_sparse_instance_f32 * S,
+        uint16_t numTaps,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize);
 
 
   /**
@@ -4503,11 +4670,11 @@
    * @param[in]  blockSize   number of input samples to process per call.
    */
   void arm_fir_sparse_q31(
-  arm_fir_sparse_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  q31_t * pScratchIn,
-  uint32_t blockSize);
+        arm_fir_sparse_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        q31_t * pScratchIn,
+        uint32_t blockSize);
 
 
   /**
@@ -4521,13 +4688,13 @@
    * @param[in]     blockSize  number of samples that will be processed per block.
    */
   void arm_fir_sparse_init_q31(
-  arm_fir_sparse_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize);
+        arm_fir_sparse_instance_q31 * S,
+        uint16_t numTaps,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize);
 
 
   /**
@@ -4540,12 +4707,12 @@
    * @param[in]  blockSize    number of input samples to process per call.
    */
   void arm_fir_sparse_q15(
-  arm_fir_sparse_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  q15_t * pScratchIn,
-  q31_t * pScratchOut,
-  uint32_t blockSize);
+        arm_fir_sparse_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        q15_t * pScratchIn,
+        q31_t * pScratchOut,
+        uint32_t blockSize);
 
 
   /**
@@ -4559,13 +4726,13 @@
    * @param[in]     blockSize  number of samples that will be processed per block.
    */
   void arm_fir_sparse_init_q15(
-  arm_fir_sparse_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize);
+        arm_fir_sparse_instance_q15 * S,
+        uint16_t numTaps,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize);
 
 
   /**
@@ -4578,12 +4745,12 @@
    * @param[in]  blockSize    number of input samples to process per call.
    */
   void arm_fir_sparse_q7(
-  arm_fir_sparse_instance_q7 * S,
-  q7_t * pSrc,
-  q7_t * pDst,
-  q7_t * pScratchIn,
-  q31_t * pScratchOut,
-  uint32_t blockSize);
+        arm_fir_sparse_instance_q7 * S,
+  const q7_t * pSrc,
+        q7_t * pDst,
+        q7_t * pScratchIn,
+        q31_t * pScratchOut,
+        uint32_t blockSize);
 
 
   /**
@@ -4597,13 +4764,13 @@
    * @param[in]     blockSize  number of samples that will be processed per block.
    */
   void arm_fir_sparse_init_q7(
-  arm_fir_sparse_instance_q7 * S,
-  uint16_t numTaps,
-  q7_t * pCoeffs,
-  q7_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize);
+        arm_fir_sparse_instance_q7 * S,
+        uint16_t numTaps,
+  const q7_t * pCoeffs,
+        q7_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize);
 
 
   /**
@@ -4613,9 +4780,9 @@
    * @param[out] pCosVal  points to the processed cos output.
    */
   void arm_sin_cos_f32(
-  float32_t theta,
-  float32_t * pSinVal,
-  float32_t * pCosVal);
+        float32_t theta,
+        float32_t * pSinVal,
+        float32_t * pCosVal);
 
 
   /**
@@ -4625,9 +4792,9 @@
    * @param[out] pCosVal  points to the processed cosine output.
    */
   void arm_sin_cos_q31(
-  q31_t theta,
-  q31_t * pSinVal,
-  q31_t * pCosVal);
+        q31_t theta,
+        q31_t * pSinVal,
+        q31_t * pCosVal);
 
 
   /**
@@ -4637,9 +4804,9 @@
    * @param[in]  numSamples  number of complex samples in each vector
    */
   void arm_cmplx_conj_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples);
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t numSamples);
 
   /**
    * @brief  Q31 complex conjugate.
@@ -4648,9 +4815,9 @@
    * @param[in]  numSamples  number of complex samples in each vector
    */
   void arm_cmplx_conj_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples);
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t numSamples);
 
 
   /**
@@ -4660,9 +4827,9 @@
    * @param[in]  numSamples  number of complex samples in each vector
    */
   void arm_cmplx_conj_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples);
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples);
 
 
   /**
@@ -4672,9 +4839,9 @@
    * @param[in]  numSamples  number of complex samples in the input vector
    */
   void arm_cmplx_mag_squared_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples);
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t numSamples);
 
 
   /**
@@ -4684,9 +4851,9 @@
    * @param[in]  numSamples  number of complex samples in the input vector
    */
   void arm_cmplx_mag_squared_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples);
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t numSamples);
 
 
   /**
@@ -4696,9 +4863,9 @@
    * @param[in]  numSamples  number of complex samples in the input vector
    */
   void arm_cmplx_mag_squared_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples);
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples);
 
 
  /**
@@ -4723,7 +4890,8 @@
    *    y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
    *    A0 = Kp + Ki + Kd
    *    A1 = (-Kp ) - (2 * Kd )
-   *    A2 = Kd  </pre>
+   *    A2 = Kd
+   * </pre>
    *
    * \par
    * where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative constant
@@ -4768,12 +4936,12 @@
    */
 
   /**
-   * @brief  Process function for the floating-point PID Control.
+   * @brief         Process function for the floating-point PID Control.
    * @param[in,out] S   is an instance of the floating-point PID Control structure
    * @param[in]     in  input sample to process
-   * @return out processed output sample.
+   * @return        processed output sample.
    */
-  CMSIS_INLINE __STATIC_INLINE float32_t arm_pid_f32(
+  __STATIC_FORCEINLINE float32_t arm_pid_f32(
   arm_pid_instance_f32 * S,
   float32_t in)
   {
@@ -4793,21 +4961,20 @@
 
   }
 
-  /**
-   * @brief  Process function for the Q31 PID Control.
-   * @param[in,out] S  points to an instance of the Q31 PID Control structure
-   * @param[in]     in  input sample to process
-   * @return out processed output sample.
-   *
-   * <b>Scaling and Overflow Behavior:</b>
-   * \par
-   * The function is implemented using an internal 64-bit accumulator.
-   * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
-   * Thus, if the accumulator result overflows it wraps around rather than clip.
-   * In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions.
-   * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
-   */
-  CMSIS_INLINE __STATIC_INLINE q31_t arm_pid_q31(
+/**
+  @brief         Process function for the Q31 PID Control.
+  @param[in,out] S  points to an instance of the Q31 PID Control structure
+  @param[in]     in  input sample to process
+  @return        processed output sample.
+
+  \par Scaling and Overflow Behavior
+         The function is implemented using an internal 64-bit accumulator.
+         The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+         Thus, if the accumulator result overflows it wraps around rather than clip.
+         In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions.
+         After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
+ */
+__STATIC_FORCEINLINE q31_t arm_pid_q31(
   arm_pid_instance_q31 * S,
   q31_t in)
   {
@@ -4839,22 +5006,21 @@
   }
 
 
-  /**
-   * @brief  Process function for the Q15 PID Control.
-   * @param[in,out] S   points to an instance of the Q15 PID Control structure
-   * @param[in]     in  input sample to process
-   * @return out processed output sample.
-   *
-   * <b>Scaling and Overflow Behavior:</b>
-   * \par
-   * The function is implemented using a 64-bit internal accumulator.
-   * Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
-   * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
-   * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
-   * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
-   * Lastly, the accumulator is saturated to yield a result in 1.15 format.
-   */
-  CMSIS_INLINE __STATIC_INLINE q15_t arm_pid_q15(
+/**
+  @brief         Process function for the Q15 PID Control.
+  @param[in,out] S   points to an instance of the Q15 PID Control structure
+  @param[in]     in  input sample to process
+  @return        processed output sample.
+
+  \par Scaling and Overflow Behavior
+         The function is implemented using a 64-bit internal accumulator.
+         Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+         The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+         There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+         After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+         Lastly, the accumulator is saturated to yield a result in 1.15 format.
+ */
+__STATIC_FORCEINLINE q15_t arm_pid_q15(
   arm_pid_instance_q15 * S,
   q15_t in)
   {
@@ -4862,16 +5028,13 @@
     q15_t out;
 
 #if defined (ARM_MATH_DSP)
-    __SIMD32_TYPE *vstate;
-
     /* Implementation of PID controller */
 
     /* acc = A0 * x[n]  */
     acc = (q31_t) __SMUAD((uint32_t)S->A0, (uint32_t)in);
 
     /* acc += A1 * x[n-1] + A2 * x[n-2]  */
-    vstate = __SIMD32_CONST(S->state);
-    acc = (q63_t)__SMLALD((uint32_t)S->A1, (uint32_t)*vstate, (uint64_t)acc);
+    acc = (q63_t)__SMLALD((uint32_t)S->A1, (uint32_t)read_q15x2 (S->state), (uint64_t)acc);
 #else
     /* acc = A0 * x[n]  */
     acc = ((q31_t) S->A0) * in;
@@ -4964,8 +5127,9 @@
    * @param[in]  Ib       input three-phase coordinate <code>b</code>
    * @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
    * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
+   * @return        none
    */
-  CMSIS_INLINE __STATIC_INLINE void arm_clarke_f32(
+  __STATIC_FORCEINLINE void arm_clarke_f32(
   float32_t Ia,
   float32_t Ib,
   float32_t * pIalpha,
@@ -4979,20 +5143,20 @@
   }
 
 
-  /**
-   * @brief  Clarke transform for Q31 version
-   * @param[in]  Ia       input three-phase coordinate <code>a</code>
-   * @param[in]  Ib       input three-phase coordinate <code>b</code>
-   * @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
-   * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
-   *
-   * <b>Scaling and Overflow Behavior:</b>
-   * \par
-   * The function is implemented using an internal 32-bit accumulator.
-   * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
-   * There is saturation on the addition, hence there is no risk of overflow.
-   */
-  CMSIS_INLINE __STATIC_INLINE void arm_clarke_q31(
+/**
+  @brief  Clarke transform for Q31 version
+  @param[in]  Ia       input three-phase coordinate <code>a</code>
+  @param[in]  Ib       input three-phase coordinate <code>b</code>
+  @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
+  @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
+  @return     none
+
+  \par Scaling and Overflow Behavior
+         The function is implemented using an internal 32-bit accumulator.
+         The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+         There is saturation on the addition, hence there is no risk of overflow.
+ */
+__STATIC_FORCEINLINE void arm_clarke_q31(
   q31_t Ia,
   q31_t Ib,
   q31_t * pIalpha,
@@ -5017,18 +5181,6 @@
    * @} end of clarke group
    */
 
-  /**
-   * @brief  Converts the elements of the Q7 vector to Q31 vector.
-   * @param[in]  pSrc       input pointer
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_q7_to_q31(
-  q7_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
 
   /**
    * @ingroup groupController
@@ -5061,8 +5213,9 @@
    * @param[in]  Ibeta   input two-phase orthogonal vector axis beta
    * @param[out] pIa     points to output three-phase coordinate <code>a</code>
    * @param[out] pIb     points to output three-phase coordinate <code>b</code>
+   * @return     none
    */
-  CMSIS_INLINE __STATIC_INLINE void arm_inv_clarke_f32(
+  __STATIC_FORCEINLINE void arm_inv_clarke_f32(
   float32_t Ialpha,
   float32_t Ibeta,
   float32_t * pIa,
@@ -5076,20 +5229,20 @@
   }
 
 
-  /**
-   * @brief  Inverse Clarke transform for Q31 version
-   * @param[in]  Ialpha  input two-phase orthogonal vector axis alpha
-   * @param[in]  Ibeta   input two-phase orthogonal vector axis beta
-   * @param[out] pIa     points to output three-phase coordinate <code>a</code>
-   * @param[out] pIb     points to output three-phase coordinate <code>b</code>
-   *
-   * <b>Scaling and Overflow Behavior:</b>
-   * \par
-   * The function is implemented using an internal 32-bit accumulator.
-   * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
-   * There is saturation on the subtraction, hence there is no risk of overflow.
-   */
-  CMSIS_INLINE __STATIC_INLINE void arm_inv_clarke_q31(
+/**
+  @brief  Inverse Clarke transform for Q31 version
+  @param[in]  Ialpha  input two-phase orthogonal vector axis alpha
+  @param[in]  Ibeta   input two-phase orthogonal vector axis beta
+  @param[out] pIa     points to output three-phase coordinate <code>a</code>
+  @param[out] pIb     points to output three-phase coordinate <code>b</code>
+  @return     none
+
+  \par Scaling and Overflow Behavior
+         The function is implemented using an internal 32-bit accumulator.
+         The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+         There is saturation on the subtraction, hence there is no risk of overflow.
+ */
+__STATIC_FORCEINLINE void arm_inv_clarke_q31(
   q31_t Ialpha,
   q31_t Ibeta,
   q31_t * pIa,
@@ -5114,17 +5267,6 @@
    * @} end of inv_clarke group
    */
 
-  /**
-   * @brief  Converts the elements of the Q7 vector to Q15 vector.
-   * @param[in]  pSrc       input pointer
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_q7_to_q15(
-  q7_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
 
 
   /**
@@ -5168,11 +5310,12 @@
    * @param[out] pIq     points to output   rotor reference frame q
    * @param[in]  sinVal  sine value of rotation angle theta
    * @param[in]  cosVal  cosine value of rotation angle theta
+   * @return     none
    *
    * The function implements the forward Park transform.
    *
    */
-  CMSIS_INLINE __STATIC_INLINE void arm_park_f32(
+  __STATIC_FORCEINLINE void arm_park_f32(
   float32_t Ialpha,
   float32_t Ibeta,
   float32_t * pId,
@@ -5188,22 +5331,22 @@
   }
 
 
-  /**
-   * @brief  Park transform for Q31 version
-   * @param[in]  Ialpha  input two-phase vector coordinate alpha
-   * @param[in]  Ibeta   input two-phase vector coordinate beta
-   * @param[out] pId     points to output rotor reference frame d
-   * @param[out] pIq     points to output rotor reference frame q
-   * @param[in]  sinVal  sine value of rotation angle theta
-   * @param[in]  cosVal  cosine value of rotation angle theta
-   *
-   * <b>Scaling and Overflow Behavior:</b>
-   * \par
-   * The function is implemented using an internal 32-bit accumulator.
-   * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
-   * There is saturation on the addition and subtraction, hence there is no risk of overflow.
-   */
-  CMSIS_INLINE __STATIC_INLINE void arm_park_q31(
+/**
+  @brief  Park transform for Q31 version
+  @param[in]  Ialpha  input two-phase vector coordinate alpha
+  @param[in]  Ibeta   input two-phase vector coordinate beta
+  @param[out] pId     points to output rotor reference frame d
+  @param[out] pIq     points to output rotor reference frame q
+  @param[in]  sinVal  sine value of rotation angle theta
+  @param[in]  cosVal  cosine value of rotation angle theta
+  @return     none
+
+  \par Scaling and Overflow Behavior
+         The function is implemented using an internal 32-bit accumulator.
+         The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+         There is saturation on the addition and subtraction, hence there is no risk of overflow.
+ */
+__STATIC_FORCEINLINE void arm_park_q31(
   q31_t Ialpha,
   q31_t Ibeta,
   q31_t * pId,
@@ -5238,17 +5381,6 @@
    * @} end of park group
    */
 
-  /**
-   * @brief  Converts the elements of the Q7 vector to floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[out] pDst       is output pointer
-   * @param[in]  blockSize  is the number of samples to process
-   */
-  void arm_q7_to_float(
-  q7_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
 
   /**
    * @ingroup groupController
@@ -5284,8 +5416,9 @@
    * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
    * @param[in]  sinVal   sine value of rotation angle theta
    * @param[in]  cosVal   cosine value of rotation angle theta
+   * @return     none
    */
-  CMSIS_INLINE __STATIC_INLINE void arm_inv_park_f32(
+  __STATIC_FORCEINLINE void arm_inv_park_f32(
   float32_t Id,
   float32_t Iq,
   float32_t * pIalpha,
@@ -5301,22 +5434,22 @@
   }
 
 
-  /**
-   * @brief  Inverse Park transform for   Q31 version
-   * @param[in]  Id       input coordinate of rotor reference frame d
-   * @param[in]  Iq       input coordinate of rotor reference frame q
-   * @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
-   * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
-   * @param[in]  sinVal   sine value of rotation angle theta
-   * @param[in]  cosVal   cosine value of rotation angle theta
-   *
-   * <b>Scaling and Overflow Behavior:</b>
-   * \par
-   * The function is implemented using an internal 32-bit accumulator.
-   * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
-   * There is saturation on the addition, hence there is no risk of overflow.
-   */
-  CMSIS_INLINE __STATIC_INLINE void arm_inv_park_q31(
+/**
+  @brief  Inverse Park transform for   Q31 version
+  @param[in]  Id       input coordinate of rotor reference frame d
+  @param[in]  Iq       input coordinate of rotor reference frame q
+  @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
+  @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
+  @param[in]  sinVal   sine value of rotation angle theta
+  @param[in]  cosVal   cosine value of rotation angle theta
+  @return     none
+
+  @par Scaling and Overflow Behavior
+         The function is implemented using an internal 32-bit accumulator.
+         The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+         There is saturation on the addition, hence there is no risk of overflow.
+ */
+__STATIC_FORCEINLINE void arm_inv_park_q31(
   q31_t Id,
   q31_t Iq,
   q31_t * pIalpha,
@@ -5353,17 +5486,6 @@
 
 
   /**
-   * @brief  Converts the elements of the Q31 vector to floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[out] pDst       is output pointer
-   * @param[in]  blockSize  is the number of samples to process
-   */
-  void arm_q31_to_float(
-  q31_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-  /**
    * @ingroup groupInterpolation
    */
 
@@ -5411,7 +5533,7 @@
    * @return y processed output sample.
    *
    */
-  CMSIS_INLINE __STATIC_INLINE float32_t arm_linear_interp_f32(
+  __STATIC_FORCEINLINE float32_t arm_linear_interp_f32(
   arm_linear_interp_instance_f32 * S,
   float32_t x)
   {
@@ -5468,7 +5590,7 @@
    * This function can support maximum of table size 2^12.
    *
    */
-  CMSIS_INLINE __STATIC_INLINE q31_t arm_linear_interp_q31(
+  __STATIC_FORCEINLINE q31_t arm_linear_interp_q31(
   q31_t * pYData,
   q31_t x,
   uint32_t nValues)
@@ -5526,7 +5648,7 @@
    * This function can support maximum of table size 2^12.
    *
    */
-  CMSIS_INLINE __STATIC_INLINE q15_t arm_linear_interp_q15(
+  __STATIC_FORCEINLINE q15_t arm_linear_interp_q15(
   q15_t * pYData,
   q31_t x,
   uint32_t nValues)
@@ -5583,7 +5705,7 @@
    * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
    * This function can support maximum of table size 2^12.
    */
-  CMSIS_INLINE __STATIC_INLINE q7_t arm_linear_interp_q7(
+  __STATIC_FORCEINLINE q7_t arm_linear_interp_q7(
   q7_t * pYData,
   q31_t x,
   uint32_t nValues)
@@ -5716,28 +5838,34 @@
    * @{
    */
 
-  /**
-   * @brief  Floating-point square root function.
-   * @param[in]  in    input value.
-   * @param[out] pOut  square root of input value.
-   * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
-   * <code>in</code> is negative value and returns zero output for negative values.
-   */
-  CMSIS_INLINE __STATIC_INLINE arm_status arm_sqrt_f32(
+/**
+  @brief         Floating-point square root function.
+  @param[in]     in    input value
+  @param[out]    pOut  square root of input value
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : input value is positive
+                   - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
+ */
+__STATIC_FORCEINLINE arm_status arm_sqrt_f32(
   float32_t in,
   float32_t * pOut)
   {
     if (in >= 0.0f)
     {
-
-#if   (__FPU_USED == 1) && defined ( __CC_ARM   )
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
       *pOut = __sqrtf(in);
-#elif (__FPU_USED == 1) && (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
-      *pOut = __builtin_sqrtf(in);
-#elif (__FPU_USED == 1) && defined(__GNUC__)
-      *pOut = __builtin_sqrtf(in);
-#elif (__FPU_USED == 1) && defined ( __ICCARM__ ) && (__VER__ >= 6040000)
+  #else
+      *pOut = sqrtf(in);
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
       __ASM("VSQRT.F32 %0,%1" : "=t"(*pOut) : "t"(in));
+  #else
+      *pOut = sqrtf(in);
+  #endif
+
 #else
       *pOut = sqrtf(in);
 #endif
@@ -5752,28 +5880,53 @@
   }
 
 
-  /**
-   * @brief Q31 square root function.
-   * @param[in]  in    input value.  The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF.
-   * @param[out] pOut  square root of input value.
-   * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
-   * <code>in</code> is negative value and returns zero output for negative values.
-   */
-  arm_status arm_sqrt_q31(
+/**
+  @brief         Q31 square root function.
+  @param[in]     in    input value.  The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF
+  @param[out]    pOut  points to square root of input value
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : input value is positive
+                   - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
+ */
+arm_status arm_sqrt_q31(
   q31_t in,
   q31_t * pOut);
 
 
+/**
+  @brief         Q15 square root function.
+  @param[in]     in    input value.  The range of the input value is [0 +1) or 0x0000 to 0x7FFF
+  @param[out]    pOut  points to square root of input value
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : input value is positive
+                   - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
+ */
+arm_status arm_sqrt_q15(
+  q15_t in,
+  q15_t * pOut);
+
   /**
-   * @brief  Q15 square root function.
-   * @param[in]  in    input value.  The range of the input value is [0 +1) or 0x0000 to 0x7FFF.
-   * @param[out] pOut  square root of input value.
+   * @brief  Vector Floating-point square root function.
+   * @param[in]  pIn   input vector.
+   * @param[out] pOut  vector of square roots of input elements.
+   * @param[in]  len   length of input vector.
    * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
    * <code>in</code> is negative value and returns zero output for negative values.
    */
-  arm_status arm_sqrt_q15(
-  q15_t in,
-  q15_t * pOut);
+  void arm_vsqrt_f32(
+  float32_t * pIn,
+  float32_t * pOut,
+  uint16_t len);
+
+  void arm_vsqrt_q31(
+  q31_t * pIn,
+  q31_t * pOut,
+  uint16_t len);
+
+  void arm_vsqrt_q15(
+  q15_t * pIn,
+  q15_t * pOut,
+  uint16_t len);
 
   /**
    * @} end of SQRT group
@@ -5783,7 +5936,7 @@
   /**
    * @brief floating-point Circular write function.
    */
-  CMSIS_INLINE __STATIC_INLINE void arm_circularWrite_f32(
+  __STATIC_FORCEINLINE void arm_circularWrite_f32(
   int32_t * circBuffer,
   int32_t L,
   uint16_t * writeOffset,
@@ -5828,7 +5981,7 @@
   /**
    * @brief floating-point Circular Read function.
    */
-  CMSIS_INLINE __STATIC_INLINE void arm_circularRead_f32(
+  __STATIC_FORCEINLINE void arm_circularRead_f32(
   int32_t * circBuffer,
   int32_t L,
   int32_t * readOffset,
@@ -5840,12 +5993,13 @@
   uint32_t blockSize)
   {
     uint32_t i = 0U;
-    int32_t rOffset, dst_end;
+    int32_t rOffset;
+    int32_t* dst_end;
 
     /* Copy the value of Index pointer that points
      * to the current location from where the input samples to be read */
     rOffset = *readOffset;
-    dst_end = (int32_t) (dst_base + dst_length);
+    dst_end = dst_base + dst_length;
 
     /* Loop over the blockSize */
     i = blockSize;
@@ -5858,7 +6012,7 @@
       /* Update the input pointer */
       dst += dstInc;
 
-      if (dst == (int32_t *) dst_end)
+      if (dst == dst_end)
       {
         dst = dst_base;
       }
@@ -5883,7 +6037,7 @@
   /**
    * @brief Q15 Circular write function.
    */
-  CMSIS_INLINE __STATIC_INLINE void arm_circularWrite_q15(
+  __STATIC_FORCEINLINE void arm_circularWrite_q15(
   q15_t * circBuffer,
   int32_t L,
   uint16_t * writeOffset,
@@ -5927,7 +6081,7 @@
   /**
    * @brief Q15 Circular Read function.
    */
-  CMSIS_INLINE __STATIC_INLINE void arm_circularRead_q15(
+  __STATIC_FORCEINLINE void arm_circularRead_q15(
   q15_t * circBuffer,
   int32_t L,
   int32_t * readOffset,
@@ -5939,13 +6093,14 @@
   uint32_t blockSize)
   {
     uint32_t i = 0;
-    int32_t rOffset, dst_end;
+    int32_t rOffset;
+    q15_t* dst_end;
 
     /* Copy the value of Index pointer that points
      * to the current location from where the input samples to be read */
     rOffset = *readOffset;
 
-    dst_end = (int32_t) (dst_base + dst_length);
+    dst_end = dst_base + dst_length;
 
     /* Loop over the blockSize */
     i = blockSize;
@@ -5958,7 +6113,7 @@
       /* Update the input pointer */
       dst += dstInc;
 
-      if (dst == (q15_t *) dst_end)
+      if (dst == dst_end)
       {
         dst = dst_base;
       }
@@ -5983,7 +6138,7 @@
   /**
    * @brief Q7 Circular write function.
    */
-  CMSIS_INLINE __STATIC_INLINE void arm_circularWrite_q7(
+  __STATIC_FORCEINLINE void arm_circularWrite_q7(
   q7_t * circBuffer,
   int32_t L,
   uint16_t * writeOffset,
@@ -6027,7 +6182,7 @@
   /**
    * @brief Q7 Circular Read function.
    */
-  CMSIS_INLINE __STATIC_INLINE void arm_circularRead_q7(
+  __STATIC_FORCEINLINE void arm_circularRead_q7(
   q7_t * circBuffer,
   int32_t L,
   int32_t * readOffset,
@@ -6039,13 +6194,14 @@
   uint32_t blockSize)
   {
     uint32_t i = 0;
-    int32_t rOffset, dst_end;
+    int32_t rOffset;
+    q7_t* dst_end;
 
     /* Copy the value of Index pointer that points
      * to the current location from where the input samples to be read */
     rOffset = *readOffset;
 
-    dst_end = (int32_t) (dst_base + dst_length);
+    dst_end = dst_base + dst_length;
 
     /* Loop over the blockSize */
     i = blockSize;
@@ -6058,7 +6214,7 @@
       /* Update the input pointer */
       dst += dstInc;
 
-      if (dst == (q7_t *) dst_end)
+      if (dst == dst_end)
       {
         dst = dst_base;
       }
@@ -6087,9 +6243,9 @@
    * @param[out] pResult    is output value.
    */
   void arm_power_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q63_t * pResult);
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q63_t * pResult);
 
 
   /**
@@ -6099,9 +6255,9 @@
    * @param[out] pResult    is output value.
    */
   void arm_power_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult);
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult);
 
 
   /**
@@ -6111,9 +6267,9 @@
    * @param[out] pResult    is output value.
    */
   void arm_power_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q63_t * pResult);
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q63_t * pResult);
 
 
   /**
@@ -6123,9 +6279,9 @@
    * @param[out] pResult    is output value.
    */
   void arm_power_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult);
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult);
 
 
   /**
@@ -6135,9 +6291,9 @@
    * @param[out] pResult    is output value.
    */
   void arm_mean_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * pResult);
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult);
 
 
   /**
@@ -6147,9 +6303,9 @@
    * @param[out] pResult    is output value.
    */
   void arm_mean_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult);
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult);
 
 
   /**
@@ -6159,9 +6315,9 @@
    * @param[out] pResult    is output value.
    */
   void arm_mean_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult);
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult);
 
 
   /**
@@ -6171,9 +6327,9 @@
    * @param[out] pResult    is output value.
    */
   void arm_mean_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult);
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult);
 
 
   /**
@@ -6183,9 +6339,9 @@
    * @param[out] pResult    is output value.
    */
   void arm_var_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult);
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult);
 
 
   /**
@@ -6195,9 +6351,9 @@
    * @param[out] pResult    is output value.
    */
   void arm_var_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult);
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult);
 
 
   /**
@@ -6207,9 +6363,9 @@
    * @param[out] pResult    is output value.
    */
   void arm_var_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult);
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult);
 
 
   /**
@@ -6219,9 +6375,9 @@
    * @param[out] pResult    is output value.
    */
   void arm_rms_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult);
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult);
 
 
   /**
@@ -6231,9 +6387,9 @@
    * @param[out] pResult    is output value.
    */
   void arm_rms_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult);
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult);
 
 
   /**
@@ -6243,9 +6399,9 @@
    * @param[out] pResult    is output value.
    */
   void arm_rms_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult);
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult);
 
 
   /**
@@ -6255,9 +6411,9 @@
    * @param[out] pResult    is output value.
    */
   void arm_std_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult);
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult);
 
 
   /**
@@ -6267,9 +6423,9 @@
    * @param[out] pResult    is output value.
    */
   void arm_std_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult);
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult);
 
 
   /**
@@ -6279,9 +6435,9 @@
    * @param[out] pResult    is output value.
    */
   void arm_std_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult);
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult);
 
 
   /**
@@ -6291,9 +6447,9 @@
    * @param[in]  numSamples  number of complex samples in the input vector
    */
   void arm_cmplx_mag_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples);
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t numSamples);
 
 
   /**
@@ -6303,9 +6459,9 @@
    * @param[in]  numSamples  number of complex samples in the input vector
    */
   void arm_cmplx_mag_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples);
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t numSamples);
 
 
   /**
@@ -6315,9 +6471,9 @@
    * @param[in]  numSamples  number of complex samples in the input vector
    */
   void arm_cmplx_mag_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples);
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples);
 
 
   /**
@@ -6329,11 +6485,11 @@
    * @param[out] imagResult  imaginary part of the result returned here
    */
   void arm_cmplx_dot_prod_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  uint32_t numSamples,
-  q31_t * realResult,
-  q31_t * imagResult);
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        uint32_t numSamples,
+        q31_t * realResult,
+        q31_t * imagResult);
 
 
   /**
@@ -6345,11 +6501,11 @@
    * @param[out] imagResult  imaginary part of the result returned here
    */
   void arm_cmplx_dot_prod_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  uint32_t numSamples,
-  q63_t * realResult,
-  q63_t * imagResult);
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        uint32_t numSamples,
+        q63_t * realResult,
+        q63_t * imagResult);
 
 
   /**
@@ -6361,11 +6517,11 @@
    * @param[out] imagResult  imaginary part of the result returned here
    */
   void arm_cmplx_dot_prod_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  uint32_t numSamples,
-  float32_t * realResult,
-  float32_t * imagResult);
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        uint32_t numSamples,
+        float32_t * realResult,
+        float32_t * imagResult);
 
 
   /**
@@ -6376,10 +6532,10 @@
    * @param[in]  numSamples  number of samples in each vector
    */
   void arm_cmplx_mult_real_q15(
-  q15_t * pSrcCmplx,
-  q15_t * pSrcReal,
-  q15_t * pCmplxDst,
-  uint32_t numSamples);
+  const q15_t * pSrcCmplx,
+  const q15_t * pSrcReal,
+        q15_t * pCmplxDst,
+        uint32_t numSamples);
 
 
   /**
@@ -6390,10 +6546,10 @@
    * @param[in]  numSamples  number of samples in each vector
    */
   void arm_cmplx_mult_real_q31(
-  q31_t * pSrcCmplx,
-  q31_t * pSrcReal,
-  q31_t * pCmplxDst,
-  uint32_t numSamples);
+  const q31_t * pSrcCmplx,
+  const q31_t * pSrcReal,
+        q31_t * pCmplxDst,
+        uint32_t numSamples);
 
 
   /**
@@ -6404,10 +6560,10 @@
    * @param[in]  numSamples  number of samples in each vector
    */
   void arm_cmplx_mult_real_f32(
-  float32_t * pSrcCmplx,
-  float32_t * pSrcReal,
-  float32_t * pCmplxDst,
-  uint32_t numSamples);
+  const float32_t * pSrcCmplx,
+  const float32_t * pSrcReal,
+        float32_t * pCmplxDst,
+        uint32_t numSamples);
 
 
   /**
@@ -6418,10 +6574,10 @@
    * @param[in]  index      is the array index of the minimum value in the input buffer.
    */
   void arm_min_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * result,
-  uint32_t * index);
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * result,
+        uint32_t * index);
 
 
   /**
@@ -6432,10 +6588,10 @@
    * @param[in]  pIndex     is the array index of the minimum value in the input buffer.
    */
   void arm_min_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult,
-  uint32_t * pIndex);
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult,
+        uint32_t * pIndex);
 
 
   /**
@@ -6446,10 +6602,10 @@
    * @param[out] pIndex     is the array index of the minimum value in the input buffer.
    */
   void arm_min_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult,
-  uint32_t * pIndex);
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult,
+        uint32_t * pIndex);
 
 
   /**
@@ -6460,10 +6616,10 @@
    * @param[out] pIndex     is the array index of the minimum value in the input buffer.
    */
   void arm_min_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult,
-  uint32_t * pIndex);
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult,
+        uint32_t * pIndex);
 
 
 /**
@@ -6474,10 +6630,10 @@
  * @param[out] pIndex     index of maximum value returned here
  */
   void arm_max_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * pResult,
-  uint32_t * pIndex);
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult,
+        uint32_t * pIndex);
 
 
 /**
@@ -6488,10 +6644,10 @@
  * @param[out] pIndex     index of maximum value returned here
  */
   void arm_max_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult,
-  uint32_t * pIndex);
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult,
+        uint32_t * pIndex);
 
 
 /**
@@ -6502,10 +6658,10 @@
  * @param[out] pIndex     index of maximum value returned here
  */
   void arm_max_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult,
-  uint32_t * pIndex);
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult,
+        uint32_t * pIndex);
 
 
 /**
@@ -6516,10 +6672,10 @@
  * @param[out] pIndex     index of maximum value returned here
  */
   void arm_max_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult,
-  uint32_t * pIndex);
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult,
+        uint32_t * pIndex);
 
 
   /**
@@ -6530,10 +6686,10 @@
    * @param[in]  numSamples  number of complex samples in each vector
    */
   void arm_cmplx_mult_cmplx_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t numSamples);
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t numSamples);
 
 
   /**
@@ -6544,10 +6700,10 @@
    * @param[in]  numSamples  number of complex samples in each vector
    */
   void arm_cmplx_mult_cmplx_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t numSamples);
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t numSamples);
 
 
   /**
@@ -6558,10 +6714,10 @@
    * @param[in]  numSamples  number of complex samples in each vector
    */
   void arm_cmplx_mult_cmplx_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t numSamples);
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t numSamples);
 
 
   /**
@@ -6571,9 +6727,9 @@
    * @param[in]  blockSize  length of the input vector
    */
   void arm_float_to_q31(
-  float32_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
+  const float32_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -6583,9 +6739,9 @@
    * @param[in]  blockSize  length of the input vector
    */
   void arm_float_to_q15(
-  float32_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
+  const float32_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -6595,9 +6751,21 @@
    * @param[in]  blockSize  length of the input vector
    */
   void arm_float_to_q7(
-  float32_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
+  const float32_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q31 vector to floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[out] pDst       is output pointer
+   * @param[in]  blockSize  is the number of samples to process
+   */
+  void arm_q31_to_float(
+  const q31_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -6607,9 +6775,9 @@
    * @param[in]  blockSize  is the number of samples to process
    */
   void arm_q31_to_q15(
-  q31_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
+  const q31_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -6619,9 +6787,9 @@
    * @param[in]  blockSize  is the number of samples to process
    */
   void arm_q31_to_q7(
-  q31_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
+  const q31_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -6631,9 +6799,9 @@
    * @param[in]  blockSize  is the number of samples to process
    */
   void arm_q15_to_float(
-  q15_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
+  const q15_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -6643,9 +6811,9 @@
    * @param[in]  blockSize  is the number of samples to process
    */
   void arm_q15_to_q31(
-  q15_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
+  const q15_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -6655,9 +6823,45 @@
    * @param[in]  blockSize  is the number of samples to process
    */
   void arm_q15_to_q7(
-  q15_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
+  const q15_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q7 vector to floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[out] pDst       is output pointer
+   * @param[in]  blockSize  is the number of samples to process
+   */
+  void arm_q7_to_float(
+  const q7_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q7 vector to Q31 vector.
+   * @param[in]  pSrc       input pointer
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_q7_to_q31(
+  const q7_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q7 vector to Q15 vector.
+   * @param[in]  pSrc       input pointer
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_q7_to_q15(
+  const q7_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
 
 
   /**
@@ -6716,21 +6920,20 @@
    * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output.
    */
 
+
   /**
    * @addtogroup BilinearInterpolate
    * @{
    */
 
-
   /**
-  *
   * @brief  Floating-point bilinear interpolation.
   * @param[in,out] S  points to an instance of the interpolation structure.
   * @param[in]     X  interpolation coordinate.
   * @param[in]     Y  interpolation coordinate.
   * @return out interpolated value.
   */
-  CMSIS_INLINE __STATIC_INLINE float32_t arm_bilinear_interp_f32(
+  __STATIC_FORCEINLINE float32_t arm_bilinear_interp_f32(
   const arm_bilinear_interp_instance_f32 * S,
   float32_t X,
   float32_t Y)
@@ -6789,14 +6992,13 @@
 
 
   /**
-  *
   * @brief  Q31 bilinear interpolation.
   * @param[in,out] S  points to an instance of the interpolation structure.
   * @param[in]     X  interpolation coordinate in 12.20 format.
   * @param[in]     Y  interpolation coordinate in 12.20 format.
   * @return out interpolated value.
   */
-  CMSIS_INLINE __STATIC_INLINE q31_t arm_bilinear_interp_q31(
+  __STATIC_FORCEINLINE q31_t arm_bilinear_interp_q31(
   arm_bilinear_interp_instance_q31 * S,
   q31_t X,
   q31_t Y)
@@ -6870,7 +7072,7 @@
   * @param[in]     Y  interpolation coordinate in 12.20 format.
   * @return out interpolated value.
   */
-  CMSIS_INLINE __STATIC_INLINE q15_t arm_bilinear_interp_q15(
+  __STATIC_FORCEINLINE q15_t arm_bilinear_interp_q15(
   arm_bilinear_interp_instance_q15 * S,
   q31_t X,
   q31_t Y)
@@ -6948,7 +7150,7 @@
   * @param[in]     Y  interpolation coordinate in 12.20 format.
   * @return out interpolated value.
   */
-  CMSIS_INLINE __STATIC_INLINE q7_t arm_bilinear_interp_q7(
+  __STATIC_FORCEINLINE q7_t arm_bilinear_interp_q7(
   arm_bilinear_interp_instance_q7 * S,
   q31_t X,
   q31_t Y)
@@ -7046,7 +7248,7 @@
 
 #if   defined ( __CC_ARM )
   /* Enter low optimization region - place directly above function definition */
-  #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7)
+  #if defined( __ARM_ARCH_7EM__ )
     #define LOW_OPTIMIZATION_ENTER \
        _Pragma ("push")         \
        _Pragma ("O1")
@@ -7055,7 +7257,7 @@
   #endif
 
   /* Exit low optimization region - place directly after end of function definition */
-  #if defined ( ARM_MATH_CM4 ) || defined ( ARM_MATH_CM7 )
+  #if defined ( __ARM_ARCH_7EM__ )
     #define LOW_OPTIMIZATION_EXIT \
        _Pragma ("pop")
   #else
@@ -7083,7 +7285,7 @@
 
 #elif defined ( __ICCARM__ )
   /* Enter low optimization region - place directly above function definition */
-  #if defined ( ARM_MATH_CM4 ) || defined ( ARM_MATH_CM7 )
+  #if defined ( __ARM_ARCH_7EM__ )
     #define LOW_OPTIMIZATION_ENTER \
        _Pragma ("optimize=low")
   #else
@@ -7094,7 +7296,7 @@
   #define LOW_OPTIMIZATION_EXIT
 
   /* Enter low optimization region - place directly above function definition */
-  #if defined ( ARM_MATH_CM4 ) || defined ( ARM_MATH_CM7 )
+  #if defined ( __ARM_ARCH_7EM__ )
     #define IAR_ONLY_LOW_OPTIMIZATION_ENTER \
        _Pragma ("optimize=low")
   #else
@@ -7145,6 +7347,8 @@
 
 #elif defined ( __TASKING__ )
 
+#elif defined ( _MSC_VER )
+
 #else
   #error Unknown compiler
 #endif
diff --git a/DSP/Lib/ARM/arm_cortexM4b_math.lib b/DSP/Lib/ARM/arm_cortexM4b_math.lib
new file mode 100644
index 0000000..699fb0c
--- /dev/null
+++ b/DSP/Lib/ARM/arm_cortexM4b_math.lib
Binary files differ
diff --git a/DSP/Lib/ARM/arm_cortexM4bf_math.lib b/DSP/Lib/ARM/arm_cortexM4bf_math.lib
new file mode 100644
index 0000000..8e32bb1
--- /dev/null
+++ b/DSP/Lib/ARM/arm_cortexM4bf_math.lib
Binary files differ
diff --git a/DSP/Lib/ARM/arm_cortexM4l_math.lib b/DSP/Lib/ARM/arm_cortexM4l_math.lib
new file mode 100644
index 0000000..49930a0
--- /dev/null
+++ b/DSP/Lib/ARM/arm_cortexM4l_math.lib
Binary files differ
diff --git a/DSP/Lib/ARM/arm_cortexM4lf_math.lib b/DSP/Lib/ARM/arm_cortexM4lf_math.lib
new file mode 100644
index 0000000..fc5cd80
--- /dev/null
+++ b/DSP/Lib/ARM/arm_cortexM4lf_math.lib
Binary files differ
diff --git a/DSP/Lib/GCC/libarm_cortexM4l_math.a b/DSP/Lib/GCC/libarm_cortexM4l_math.a
new file mode 100644
index 0000000..3084c44
--- /dev/null
+++ b/DSP/Lib/GCC/libarm_cortexM4l_math.a
Binary files differ
diff --git a/DSP/Lib/GCC/libarm_cortexM4lf_math.a b/DSP/Lib/GCC/libarm_cortexM4lf_math.a
new file mode 100644
index 0000000..66efc87
--- /dev/null
+++ b/DSP/Lib/GCC/libarm_cortexM4lf_math.a
Binary files differ
diff --git a/DSP/Lib/IAR/iar_cortexM4b_math.a b/DSP/Lib/IAR/iar_cortexM4b_math.a
new file mode 100644
index 0000000..cb746f6
--- /dev/null
+++ b/DSP/Lib/IAR/iar_cortexM4b_math.a
Binary files differ
diff --git a/DSP/Lib/IAR/iar_cortexM4bf_math.a b/DSP/Lib/IAR/iar_cortexM4bf_math.a
new file mode 100644
index 0000000..55b870d
--- /dev/null
+++ b/DSP/Lib/IAR/iar_cortexM4bf_math.a
Binary files differ
diff --git a/DSP/Lib/IAR/iar_cortexM4l_math.a b/DSP/Lib/IAR/iar_cortexM4l_math.a
new file mode 100644
index 0000000..8fc7b37
--- /dev/null
+++ b/DSP/Lib/IAR/iar_cortexM4l_math.a
Binary files differ
diff --git a/DSP/Lib/IAR/iar_cortexM4lf_math.a b/DSP/Lib/IAR/iar_cortexM4lf_math.a
new file mode 100644
index 0000000..f3e0bb5
--- /dev/null
+++ b/DSP/Lib/IAR/iar_cortexM4lf_math.a
Binary files differ
diff --git a/DSP/Projects/ARM/arm_cortexM_math.uvoptx b/DSP/Projects/ARM/arm_cortexM_math.uvoptx
index 8e4f8bc..85a5df4 100644
--- a/DSP/Projects/ARM/arm_cortexM_math.uvoptx
+++ b/DSP/Projects/ARM/arm_cortexM_math.uvoptx
@@ -8,7 +8,7 @@
   <Extensions>
     <cExt>*.c</cExt>
     <aExt>*.s*; *.src; *.a*</aExt>
-    <oExt>*.obj</oExt>
+    <oExt>*.obj; *.o</oExt>
     <lExt>*.lib</lExt>
     <tExt>*.txt; *.h; *.inc</tExt>
     <pExt>*.plm</pExt>
@@ -101,6 +101,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -154,11 +156,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -242,6 +249,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -295,11 +304,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -383,6 +397,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -436,11 +452,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -524,6 +545,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -577,11 +600,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -665,6 +693,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -718,11 +748,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -806,6 +841,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -859,11 +896,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -947,6 +989,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1000,11 +1044,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1088,6 +1137,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1141,11 +1192,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1229,6 +1285,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1282,11 +1340,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1370,6 +1433,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1423,11 +1488,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1511,6 +1581,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1564,11 +1636,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1652,6 +1729,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1705,11 +1784,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
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-      <Lin2Executable></Lin2Executable>
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-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1793,6 +1877,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1846,11 +1932,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1934,6 +2025,8 @@
         <sRunDeb>0</sRunDeb>
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         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
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         <sDll></sDll>
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@@ -1987,11 +2080,16 @@
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       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2075,6 +2173,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2133,11 +2233,16 @@
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-      <Lin2Executable></Lin2Executable>
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-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2221,6 +2326,8 @@
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+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
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         <sDll></sDll>
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@@ -2279,11 +2386,16 @@
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       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2367,6 +2479,8 @@
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+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
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@@ -2425,11 +2539,16 @@
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       <bAutoGenD>0</bAutoGenD>
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+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
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+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
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@@ -2513,6 +2632,8 @@
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+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
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         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2571,11 +2692,16 @@
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       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2659,6 +2785,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2717,11 +2845,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2805,6 +2938,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2863,11 +2998,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2951,6 +3091,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -3009,11 +3151,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -5290,6 +5437,30 @@
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
       <bDave2>0</bDave2>
+      <PathWithFileName>..\..\Source\TransformFunctions\arm_bitreversal.c</PathWithFileName>
+      <FilenameWithoutPath>arm_bitreversal.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>6</GroupNumber>
+      <FileNumber>187</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\Source\TransformFunctions\arm_bitreversal2.c</PathWithFileName>
+      <FilenameWithoutPath>arm_bitreversal2.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>6</GroupNumber>
+      <FileNumber>188</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
       <PathWithFileName>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</PathWithFileName>
       <FilenameWithoutPath>arm_cfft_radix4_f32.c</FilenameWithoutPath>
       <RteFlg>0</RteFlg>
@@ -5297,7 +5468,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>187</FileNumber>
+      <FileNumber>189</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5309,7 +5480,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>188</FileNumber>
+      <FileNumber>190</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5321,7 +5492,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>189</FileNumber>
+      <FileNumber>191</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5333,7 +5504,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>190</FileNumber>
+      <FileNumber>192</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5345,7 +5516,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>191</FileNumber>
+      <FileNumber>193</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5357,7 +5528,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>192</FileNumber>
+      <FileNumber>194</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5369,7 +5540,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>193</FileNumber>
+      <FileNumber>195</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5381,7 +5552,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>194</FileNumber>
+      <FileNumber>196</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5393,7 +5564,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>195</FileNumber>
+      <FileNumber>197</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5405,7 +5576,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>196</FileNumber>
+      <FileNumber>198</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5417,7 +5588,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>197</FileNumber>
+      <FileNumber>199</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5429,7 +5600,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>198</FileNumber>
+      <FileNumber>200</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5441,7 +5612,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>199</FileNumber>
+      <FileNumber>201</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5453,7 +5624,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>200</FileNumber>
+      <FileNumber>202</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5465,7 +5636,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>201</FileNumber>
+      <FileNumber>203</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5477,7 +5648,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>202</FileNumber>
+      <FileNumber>204</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5489,7 +5660,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>203</FileNumber>
+      <FileNumber>205</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5501,19 +5672,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>204</FileNumber>
-      <FileType>1</FileType>
-      <tvExp>0</tvExp>
-      <tvExpOptDlg>0</tvExpOptDlg>
-      <bDave2>0</bDave2>
-      <PathWithFileName>..\..\Source\TransformFunctions\arm_bitreversal.c</PathWithFileName>
-      <FilenameWithoutPath>arm_bitreversal.c</FilenameWithoutPath>
-      <RteFlg>0</RteFlg>
-      <bShared>0</bShared>
-    </File>
-    <File>
-      <GroupNumber>6</GroupNumber>
-      <FileNumber>205</FileNumber>
+      <FileNumber>206</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5525,7 +5684,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>206</FileNumber>
+      <FileNumber>207</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5537,7 +5696,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>207</FileNumber>
+      <FileNumber>208</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5549,7 +5708,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>208</FileNumber>
+      <FileNumber>209</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5561,7 +5720,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>209</FileNumber>
+      <FileNumber>210</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5573,7 +5732,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>210</FileNumber>
+      <FileNumber>211</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5585,7 +5744,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>211</FileNumber>
+      <FileNumber>212</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5597,7 +5756,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>212</FileNumber>
+      <FileNumber>213</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5609,18 +5768,6 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>213</FileNumber>
-      <FileType>2</FileType>
-      <tvExp>0</tvExp>
-      <tvExpOptDlg>0</tvExpOptDlg>
-      <bDave2>0</bDave2>
-      <PathWithFileName>..\..\Source\TransformFunctions\arm_bitreversal2.S</PathWithFileName>
-      <FilenameWithoutPath>arm_bitreversal2.S</FilenameWithoutPath>
-      <RteFlg>0</RteFlg>
-      <bShared>0</bShared>
-    </File>
-    <File>
-      <GroupNumber>6</GroupNumber>
       <FileNumber>214</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
diff --git a/DSP/Projects/ARM/arm_cortexM_math.uvprojx b/DSP/Projects/ARM/arm_cortexM_math.uvprojx
index ee515c6..a7976ee 100644
--- a/DSP/Projects/ARM/arm_cortexM_math.uvprojx
+++ b/DSP/Projects/ARM/arm_cortexM_math.uvprojx
@@ -10,12 +10,13 @@
       <TargetName>cortexM0l</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM0</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -81,7 +82,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -183,6 +184,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -310,30 +312,31 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>4</Optim>
+            <Optim>6</Optim>
             <oTime>1</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>2</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM0, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -348,10 +351,10 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM0</MiscControls>
-              <Define>ARM_MATH_CM0</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -1330,6 +1333,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -1420,11 +1433,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -1465,11 +1473,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -1792,12 +1795,13 @@
       <TargetName>cortexM0b</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM0</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -1863,7 +1867,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -1965,6 +1969,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -2092,30 +2097,31 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>4</Optim>
+            <Optim>6</Optim>
             <oTime>1</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>2</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM0, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -2130,10 +2136,10 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM0</MiscControls>
-              <Define>ARM_MATH_CM0</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -3112,6 +3118,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -3202,11 +3218,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -3247,11 +3258,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -3574,12 +3580,13 @@
       <TargetName>cortexM3l</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM3</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -3645,7 +3652,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -3747,6 +3754,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -3874,30 +3882,31 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>4</Optim>
+            <Optim>6</Optim>
             <oTime>1</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>2</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM3, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -3912,10 +3921,10 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM3</MiscControls>
-              <Define>ARM_MATH_CM3</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -4894,6 +4903,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -4984,11 +5003,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -5029,11 +5043,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -5356,12 +5365,13 @@
       <TargetName>cortexM3b</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM3</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -5427,7 +5437,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -5529,6 +5539,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -5656,30 +5667,31 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>4</Optim>
+            <Optim>6</Optim>
             <oTime>1</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>2</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM3, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -5694,10 +5706,10 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM3</MiscControls>
-              <Define>ARM_MATH_CM3</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -6676,6 +6688,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -6766,11 +6788,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -6811,11 +6828,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -7138,12 +7150,13 @@
       <TargetName>cortexM4l</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -7209,7 +7222,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -7311,6 +7324,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -7438,30 +7452,31 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>4</Optim>
+            <Optim>6</Optim>
             <oTime>1</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>2</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM4, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -7476,10 +7491,10 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM4</MiscControls>
-              <Define>ARM_MATH_CM4</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -8458,6 +8473,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -8548,11 +8573,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -8593,11 +8613,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -8920,12 +8935,13 @@
       <TargetName>cortexM4b</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -8991,7 +9007,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -9093,6 +9109,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -9220,30 +9237,31 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>4</Optim>
+            <Optim>6</Optim>
             <oTime>1</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>2</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM4, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -9258,10 +9276,10 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM4</MiscControls>
-              <Define>ARM_MATH_CM4</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -10240,6 +10258,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -10330,11 +10358,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -10375,11 +10398,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -10702,12 +10720,13 @@
       <TargetName>cortexM4lf</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4_FP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -10773,7 +10792,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -10875,6 +10894,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -11002,30 +11022,31 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>4</Optim>
+            <Optim>6</Optim>
             <oTime>1</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>2</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
-              <MiscControls>--fpmode=ieee_full</MiscControls>
-              <Define>ARM_MATH_CM4, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, __FPU_PRESENT=1U</Define>
+              <MiscControls></MiscControls>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -11040,10 +11061,10 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM4</MiscControls>
-              <Define>ARM_MATH_CM4</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -12022,6 +12043,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -12112,11 +12143,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -12157,11 +12183,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -12484,12 +12505,13 @@
       <TargetName>cortexM4bf</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4_FP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -12555,7 +12577,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -12657,6 +12679,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -12784,30 +12807,31 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>4</Optim>
+            <Optim>6</Optim>
             <oTime>1</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>2</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM4, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, __FPU_PRESENT=1U, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -12822,10 +12846,10 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM4</MiscControls>
-              <Define>ARM_MATH_CM4</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -13804,6 +13828,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -13894,11 +13928,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -13939,11 +13968,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -14266,12 +14290,13 @@
       <TargetName>cortexM7l</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -14337,7 +14362,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -14439,6 +14464,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -14566,30 +14592,31 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>4</Optim>
+            <Optim>6</Optim>
             <oTime>1</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>2</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -14604,10 +14631,10 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM7</MiscControls>
-              <Define>ARM_MATH_CM7</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -15586,6 +15613,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -15676,11 +15713,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -15721,11 +15753,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -16048,12 +16075,13 @@
       <TargetName>cortexM7b</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -16119,7 +16147,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -16221,6 +16249,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -16348,30 +16377,31 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>4</Optim>
+            <Optim>6</Optim>
             <oTime>1</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>2</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -16386,10 +16416,10 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM7</MiscControls>
-              <Define>ARM_MATH_CM7</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -17368,6 +17398,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -17458,11 +17498,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -17503,11 +17538,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -17830,12 +17860,13 @@
       <TargetName>cortexM7lfsp</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7_SP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -17901,7 +17932,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -18003,6 +18034,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -18130,30 +18162,31 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>4</Optim>
+            <Optim>6</Optim>
             <oTime>1</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>2</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
-              <MiscControls>--fpmode=ieee_full</MiscControls>
-              <Define>ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, __FPU_PRESENT=1U</Define>
+              <MiscControls></MiscControls>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -18168,10 +18201,10 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM7</MiscControls>
-              <Define>ARM_MATH_CM7</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -19150,6 +19183,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -19240,11 +19283,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -19285,11 +19323,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -19612,12 +19645,13 @@
       <TargetName>cortexM7bfsp</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7_SP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -19683,7 +19717,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -19785,6 +19819,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -19912,30 +19947,31 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>4</Optim>
+            <Optim>6</Optim>
             <oTime>1</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>2</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
-              <MiscControls>--fpmode=ieee_full</MiscControls>
-              <Define>ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, __FPU_PRESENT=1U, ARM_MATH_BIG_ENDIAN</Define>
+              <MiscControls></MiscControls>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -19950,10 +19986,10 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM7</MiscControls>
-              <Define>ARM_MATH_CM7</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -20932,6 +20968,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -21022,11 +21068,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -21067,11 +21108,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -21394,12 +21430,13 @@
       <TargetName>cortexM7lfdp</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7_DP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -21465,7 +21502,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -21567,6 +21604,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>3</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -21694,30 +21732,31 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>4</Optim>
+            <Optim>6</Optim>
             <oTime>1</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>2</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
-              <MiscControls>--fpmode=ieee_full</MiscControls>
-              <Define>ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, __FPU_PRESENT=1U</Define>
+              <MiscControls></MiscControls>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -21732,10 +21771,10 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM7</MiscControls>
-              <Define>ARM_MATH_CM7</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -22714,6 +22753,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -22804,11 +22853,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -22849,11 +22893,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -23176,12 +23215,13 @@
       <TargetName>cortexM7bfdp</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7_DP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -23247,7 +23287,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -23349,6 +23389,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>3</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -23476,30 +23517,31 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>4</Optim>
+            <Optim>6</Optim>
             <oTime>1</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>2</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
-              <MiscControls>--fpmode=ieee_full</MiscControls>
-              <Define>ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, __FPU_PRESENT=1U, ARM_MATH_BIG_ENDIAN</Define>
+              <MiscControls></MiscControls>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -23514,10 +23556,10 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc --cpreproc_opts=-D,ARM_MATH_CM7</MiscControls>
-              <Define>ARM_MATH_CM7</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -24496,6 +24538,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -24586,11 +24638,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -24631,11 +24678,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -24958,12 +25000,13 @@
       <TargetName>ARMv8MBLl</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6060000::V6.6::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MBL</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MBL") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -25029,7 +25072,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -25131,6 +25174,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <StupSel>8</StupSel>
@@ -25258,30 +25302,31 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>4</Optim>
+            <Optim>6</Optim>
             <oTime>1</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_ARMV8MBL, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -25296,10 +25341,10 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc</MiscControls>
-              <Define>ARM_MATH_ARMV8MBL __CC_ARM</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -26278,6 +26323,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -26368,11 +26423,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -26413,11 +26463,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -26740,12 +26785,13 @@
       <TargetName>ARMv8MMLl</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6060000::V6.6::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("ARMV8MML") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -26811,7 +26857,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -26913,6 +26959,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -27040,30 +27087,31 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>4</Optim>
+            <Optim>6</Optim>
             <oTime>1</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_ARMV8MML, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -27078,10 +27126,10 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc</MiscControls>
-              <Define>ARM_MATH_ARMV8MML __CC_ARM</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -28060,6 +28108,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -28150,11 +28208,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -28195,11 +28248,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -28522,12 +28570,13 @@
       <TargetName>ARMv8MMLlfsp</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6060000::V6.6::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_SP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("ARMV8MML") FPU3(SFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -28593,7 +28642,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -28695,6 +28744,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -28822,30 +28872,31 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>4</Optim>
+            <Optim>6</Optim>
             <oTime>1</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_ARMV8MML, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __FPU_PRESENT=1U</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -28860,10 +28911,10 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc</MiscControls>
-              <Define>ARM_MATH_ARMV8MML __CC_ARM</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -29842,6 +29893,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -29932,11 +29993,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -29977,11 +30033,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -30304,12 +30355,13 @@
       <TargetName>ARMv8MMLlfdp</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6060000::V6.6::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_DP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("ARMV8MML") FPU3(DFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -30375,7 +30427,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -30477,6 +30529,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>3</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -30604,30 +30657,31 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>4</Optim>
+            <Optim>6</Optim>
             <oTime>1</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>ARM_MATH_ARMV8MML, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __FPU_PRESENT=1U</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -30642,10 +30696,10 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc</MiscControls>
-              <Define>ARM_MATH_ARMV8MML __CC_ARM</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -31624,6 +31678,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -31714,11 +31778,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -31759,11 +31818,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -32086,12 +32140,13 @@
       <TargetName>ARMv8MMLld</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6060000::V6.6::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_DSP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -32157,7 +32212,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -32259,6 +32314,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <StupSel>8</StupSel>
@@ -32386,30 +32442,31 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>4</Optim>
+            <Optim>6</Optim>
             <oTime>1</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
-              <MiscControls>-Wno-gnu-statement-expression -Xclang -target-feature -Xclang +t2xtpk</MiscControls>
-              <Define>ARM_MATH_ARMV8MML, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __DSP_PRESENT=1U</Define>
+              <MiscControls></MiscControls>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -32424,10 +32481,10 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc</MiscControls>
-              <Define>ARM_MATH_ARMV8MML __CC_ARM</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -33406,6 +33463,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -33496,11 +33563,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -33541,11 +33603,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -33868,12 +33925,13 @@
       <TargetName>ARMv8MMLldfsp</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6060000::V6.6::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_DSP_SP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -33939,7 +33997,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -34041,6 +34099,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <StupSel>8</StupSel>
@@ -34168,30 +34227,31 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>4</Optim>
+            <Optim>6</Optim>
             <oTime>1</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
-              <MiscControls>-Wno-gnu-statement-expression -Xclang -target-feature -Xclang +t2xtpk</MiscControls>
-              <Define>ARM_MATH_ARMV8MML, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __DSP_PRESENT=1U, __FPU_PRESENT=1U</Define>
+              <MiscControls></MiscControls>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -34206,10 +34266,10 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc</MiscControls>
-              <Define>ARM_MATH_ARMV8MML __CC_ARM</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -35188,6 +35248,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -35278,11 +35348,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -35323,11 +35388,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -35650,12 +35710,13 @@
       <TargetName>ARMv8MMLldfdp</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6060000::V6.6::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6110000::V6.11::.\ARMCLANG 6.11</pCCUsed>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_DSP_DP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -35721,7 +35782,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "!L" "..\..\..\Lib\ARM\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "!L" "..\..\Lib\ARM\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -35823,6 +35884,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>3</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <StupSel>8</StupSel>
@@ -35950,30 +36012,31 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>4</Optim>
+            <Optim>6</Optim>
             <oTime>1</oTime>
             <SplitLS>0</SplitLS>
-            <OneElfS>0</OneElfS>
+            <OneElfS>1</OneElfS>
             <Strict>0</Strict>
             <EnumInt>0</EnumInt>
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>0</wLevel>
+            <wLevel>3</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>0</v6Lang>
-            <v6LangP>0</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>3</v6Lang>
+            <v6LangP>3</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
-              <MiscControls>-Wno-gnu-statement-expression -Xclang -target-feature -Xclang +t2xtpk</MiscControls>
-              <Define>ARM_MATH_ARMV8MML, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __DSP_PRESENT=1U, __FPU_PRESENT=1U</Define>
+              <MiscControls></MiscControls>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -35988,10 +36051,10 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <uClangAs>1</uClangAs>
             <VariousControls>
-              <MiscControls>--cpreproc</MiscControls>
-              <Define>ARM_MATH_ARMV8MML __CC_ARM</Define>
+              <MiscControls></MiscControls>
+              <Define></Define>
               <Undefine></Undefine>
               <IncludePath></IncludePath>
             </VariousControls>
@@ -36970,6 +37033,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -37060,11 +37133,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -37105,11 +37173,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -37430,4 +37493,10 @@
     </Target>
   </Targets>
 
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
 </Project>
diff --git a/DSP/Projects/ARM/arm_cortexM_math_Build.bat b/DSP/Projects/ARM/arm_cortexM_math_Build.bat
new file mode 100644
index 0000000..988b285
--- /dev/null
+++ b/DSP/Projects/ARM/arm_cortexM_math_Build.bat
@@ -0,0 +1,84 @@
+@echo off
+
+mkdir Temp
+set TMP=Temp
+set TEMP=Temp
+set UVEXE=C:\Keil_v5\UV4\UV4.EXE
+
+echo.
+echo Building DSP Libraries ARM
+
+echo   Building DSP Library for Cortex-M0 Little Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0l"     -o "DspLib_cortexM0l_build.log"
+
+echo   Building DSP Library for Cortex-M3 Little Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3l"     -o "DspLib_cortexM3l_build.log"
+
+echo   Building DSP Library for Cortex-M4 Little Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4l"     -o "DspLib_cortexM4l_build.log"
+
+echo   Building DSP Library for Cortex-M4 Little Endian with single precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4lf"    -o "DspLib_cortexM4lf_build.log"
+
+echo   Building DSP Library for Cortex-M7 Little Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7l"     -o "DspLib_cortexM7l_build.log"
+
+echo   Building DSP Library for Cortex-M7 Little Endian with single precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfsp"  -o "DspLib_cortexM7lfsp_build.log"
+
+echo   Building DSP Library for Cortex-M7 Little Endian with double precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfdp"  -o "DspLib_cortexM7lfdp_build.log"
+
+echo   Building DSP Library for ARMv8-M Baseline Little Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MBLl"     -o "DspLib_ARMv8MBLl_build.log"
+
+echo   Building DSP Library for ARMv8-M Mainline Little Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLl"     -o "DspLib_ARMv8MMLl_build.log"
+
+echo   Building DSP Library for ARMv8-M Mainline Little Endian with single precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfsp"  -o "DspLib_ARMv8MMLlfsp_build.log"
+
+echo   Building DSP Library for ARMv8-M Mainline Little Endian with double precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfdp"  -o "DspLib_ARMv8MMLlfdp_build.log"
+
+echo   Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLld"    -o "DspLib_ARMv8MMLld_build.log"
+
+echo   Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, single precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfsp" -o "DspLib_ARMv8MMLldfsp_build.log"
+
+echo   Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, double precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfdp" -o "DspLib_ARMv8MMLldfdp_build.log"
+
+
+REM big endian libraries
+
+echo   Building DSP Library for Cortex-M0 Big Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0b"    -o "DspLib_cortexM0b_build.log"
+
+echo   Building DSP Library for Cortex-M3 Big Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3b"    -o "DspLib_cortexM3b_build.log"
+
+echo   Building DSP Library for Cortex-M4 Big Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4b"    -o "DspLib_cortexM4b_build.log"
+
+echo   Building DSP Library for Cortex-M4 Big Endian with single precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4bf"   -o "DspLib_cortexM4bf_build.log"
+
+echo   Building DSP Library for Cortex-M7 Big Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7b"    -o "DspLib_cortexM7b_build.log"
+
+echo   Building DSP Library for Cortex-M7 Big Endian with single precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfsp" -o "DspLib_cortexM7bfsp_build.log"
+
+echo   Building DSP Library for Cortex-M7 Big Endian with double precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfdp" -o "DspLib_cortexM7bfdp_build.log"
+
+echo.
+echo   Deleting intermediate files
+rmdir /S /Q Temp
+rmdir /S /Q IntermediateFiles
+del /Q *.bak
+del /Q *.dep
+del /Q *.uvguix.*
+del /Q ArInp.*
diff --git a/DSP/Projects/GCC/arm_cortexM_math.uvoptx b/DSP/Projects/GCC/arm_cortexM_math.uvoptx
index eb2f591..4319d1e 100644
--- a/DSP/Projects/GCC/arm_cortexM_math.uvoptx
+++ b/DSP/Projects/GCC/arm_cortexM_math.uvoptx
@@ -8,7 +8,7 @@
   <Extensions>
     <cExt>*.c</cExt>
     <aExt>*.s*; *.src; *.a*</aExt>
-    <oExt>*.obj</oExt>
+    <oExt>*.obj; *.o</oExt>
     <lExt>*.lib</lExt>
     <tExt>*.txt; *.h; *.inc</tExt>
     <pExt>*.plm</pExt>
@@ -101,6 +101,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -154,11 +156,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -242,6 +249,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -295,11 +304,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -383,6 +397,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -436,11 +452,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -524,6 +545,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -577,11 +600,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -665,6 +693,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -718,11 +748,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -806,6 +841,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -859,11 +896,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -947,6 +989,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1000,11 +1044,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1088,6 +1137,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1141,11 +1192,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1229,6 +1285,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1282,11 +1340,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1370,6 +1433,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1423,11 +1488,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1511,6 +1581,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1564,11 +1636,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1652,6 +1729,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1705,11 +1784,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1793,6 +1877,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1851,11 +1937,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -1939,6 +2030,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>0</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -1992,11 +2085,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2080,6 +2178,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2138,11 +2238,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2226,6 +2331,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2284,11 +2391,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2372,6 +2484,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2430,11 +2544,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2518,6 +2637,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2576,11 +2697,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2664,6 +2790,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2722,11 +2850,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2810,6 +2943,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -2868,11 +3003,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -2956,6 +3096,8 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
         <nTsel>13</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
@@ -3014,11 +3156,16 @@
       <LintExecutable></LintExecutable>
       <LintConfigFile></LintConfigFile>
       <bLintAuto>0</bLintAuto>
-      <Lin2Executable></Lin2Executable>
-      <Lin2ConfigFile></Lin2ConfigFile>
-      <bLin2Auto>0</bLin2Auto>
       <bAutoGenD>0</bAutoGenD>
-      <bAuto2GenD>0</bAuto2GenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
     </TargetOption>
   </Target>
 
@@ -5295,6 +5442,30 @@
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
       <bDave2>0</bDave2>
+      <PathWithFileName>..\..\Source\TransformFunctions\arm_bitreversal.c</PathWithFileName>
+      <FilenameWithoutPath>arm_bitreversal.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>6</GroupNumber>
+      <FileNumber>187</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\Source\TransformFunctions\arm_bitreversal2.c</PathWithFileName>
+      <FilenameWithoutPath>arm_bitreversal2.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>6</GroupNumber>
+      <FileNumber>188</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
       <PathWithFileName>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</PathWithFileName>
       <FilenameWithoutPath>arm_cfft_radix4_f32.c</FilenameWithoutPath>
       <RteFlg>0</RteFlg>
@@ -5302,7 +5473,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>187</FileNumber>
+      <FileNumber>189</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5314,7 +5485,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>188</FileNumber>
+      <FileNumber>190</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5326,7 +5497,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>189</FileNumber>
+      <FileNumber>191</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5338,7 +5509,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>190</FileNumber>
+      <FileNumber>192</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5350,7 +5521,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>191</FileNumber>
+      <FileNumber>193</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5362,7 +5533,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>192</FileNumber>
+      <FileNumber>194</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5374,7 +5545,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>193</FileNumber>
+      <FileNumber>195</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5386,7 +5557,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>194</FileNumber>
+      <FileNumber>196</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5398,7 +5569,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>195</FileNumber>
+      <FileNumber>197</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5410,7 +5581,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>196</FileNumber>
+      <FileNumber>198</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5422,7 +5593,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>197</FileNumber>
+      <FileNumber>199</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5434,7 +5605,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>198</FileNumber>
+      <FileNumber>200</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5446,7 +5617,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>199</FileNumber>
+      <FileNumber>201</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5458,7 +5629,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>200</FileNumber>
+      <FileNumber>202</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5470,7 +5641,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>201</FileNumber>
+      <FileNumber>203</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5482,7 +5653,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>202</FileNumber>
+      <FileNumber>204</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5494,7 +5665,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>203</FileNumber>
+      <FileNumber>205</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5506,19 +5677,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>204</FileNumber>
-      <FileType>1</FileType>
-      <tvExp>0</tvExp>
-      <tvExpOptDlg>0</tvExpOptDlg>
-      <bDave2>0</bDave2>
-      <PathWithFileName>..\..\Source\TransformFunctions\arm_bitreversal.c</PathWithFileName>
-      <FilenameWithoutPath>arm_bitreversal.c</FilenameWithoutPath>
-      <RteFlg>0</RteFlg>
-      <bShared>0</bShared>
-    </File>
-    <File>
-      <GroupNumber>6</GroupNumber>
-      <FileNumber>205</FileNumber>
+      <FileNumber>206</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5530,7 +5689,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>206</FileNumber>
+      <FileNumber>207</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5542,7 +5701,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>207</FileNumber>
+      <FileNumber>208</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5554,7 +5713,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>208</FileNumber>
+      <FileNumber>209</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5566,7 +5725,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>209</FileNumber>
+      <FileNumber>210</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5578,7 +5737,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>210</FileNumber>
+      <FileNumber>211</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5590,7 +5749,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>211</FileNumber>
+      <FileNumber>212</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5602,7 +5761,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>212</FileNumber>
+      <FileNumber>213</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -5614,18 +5773,6 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>213</FileNumber>
-      <FileType>1</FileType>
-      <tvExp>0</tvExp>
-      <tvExpOptDlg>0</tvExpOptDlg>
-      <bDave2>0</bDave2>
-      <PathWithFileName>..\..\Source\TransformFunctions\arm_bitreversal2.S</PathWithFileName>
-      <FilenameWithoutPath>arm_bitreversal2.S</FilenameWithoutPath>
-      <RteFlg>0</RteFlg>
-      <bShared>0</bShared>
-    </File>
-    <File>
-      <GroupNumber>6</GroupNumber>
       <FileNumber>214</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
diff --git a/DSP/Projects/GCC/arm_cortexM_math.uvprojx b/DSP/Projects/GCC/arm_cortexM_math.uvprojx
index 69f5e6a..6329b9a 100644
--- a/DSP/Projects/GCC/arm_cortexM_math.uvprojx
+++ b/DSP/Projects/GCC/arm_cortexM_math.uvprojx
@@ -10,11 +10,12 @@
       <TargetName>cortexM0l</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM0</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -80,7 +81,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -166,6 +167,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -238,7 +240,7 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM0, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+              <Define>ARM_MATH_CM0_FAMILY, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -1224,6 +1226,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -1314,11 +1326,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -1359,11 +1366,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -1686,11 +1688,12 @@
       <TargetName>cortexM0b</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM0</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -1756,7 +1759,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -1842,6 +1845,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -1914,7 +1918,7 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM0, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_CM0_FAMILY, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -2900,6 +2904,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -2990,11 +3004,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -3035,11 +3044,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -3362,11 +3366,12 @@
       <TargetName>cortexM3l</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM3</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -3432,7 +3437,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -3518,6 +3523,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -3590,7 +3596,7 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM3, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -4576,6 +4582,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -4666,11 +4682,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -4711,11 +4722,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -5038,11 +5044,12 @@
       <TargetName>cortexM3b</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM3</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -5108,7 +5115,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -5194,6 +5201,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -5266,7 +5274,7 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM3, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -6252,6 +6260,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -6342,11 +6360,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -6387,11 +6400,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -6714,11 +6722,12 @@
       <TargetName>cortexM4l</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -6784,7 +6793,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -6870,6 +6879,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -6942,7 +6952,7 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM4, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -7928,6 +7938,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -8018,11 +8038,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -8063,11 +8078,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -8390,11 +8400,12 @@
       <TargetName>cortexM4b</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -8460,7 +8471,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -8546,6 +8557,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -8618,7 +8630,7 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM4, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -9604,6 +9616,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -9694,11 +9716,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -9739,11 +9756,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -10066,11 +10078,12 @@
       <TargetName>cortexM4lf</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4_FP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -10136,7 +10149,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
             <UserProg2Name>cmd.exe /C getSizeInfo "$L\lib@L.a" "@L_SizeInfo.txt"</UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -10222,6 +10235,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -10294,7 +10308,7 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_CM4, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __FPU_PRESENT=1U</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -11280,6 +11294,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -11370,11 +11394,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -11415,11 +11434,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -11742,11 +11756,12 @@
       <TargetName>cortexM4bf</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM4_FP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -11812,7 +11827,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -11898,6 +11913,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -11970,7 +11986,7 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_CM4, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __FPU_PRESENT=1U, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -12956,6 +12972,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -13046,11 +13072,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -13091,11 +13112,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -13418,11 +13434,12 @@
       <TargetName>cortexM7l</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -13488,7 +13505,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -13574,6 +13591,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -13646,7 +13664,7 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -14632,6 +14650,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -14722,11 +14750,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -14767,11 +14790,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -15094,11 +15112,12 @@
       <TargetName>cortexM7b</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -15164,7 +15183,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -15250,6 +15269,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -15322,7 +15342,7 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections</MiscControls>
-              <Define>ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -16308,6 +16328,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -16398,11 +16428,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -16443,11 +16468,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -16770,11 +16790,12 @@
       <TargetName>cortexM7lfsp</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7_SP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -16840,7 +16861,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -16926,6 +16947,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -16998,7 +17020,7 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __FPU_PRESENT=1U</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -17984,6 +18006,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -18074,11 +18106,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -18119,11 +18146,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -18446,11 +18468,12 @@
       <TargetName>cortexM7bfsp</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7_SP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -18516,7 +18539,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -18602,6 +18625,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -18674,7 +18698,7 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __FPU_PRESENT=1U, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -19660,6 +19684,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -19750,11 +19784,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -19795,11 +19824,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -20122,11 +20146,12 @@
       <TargetName>cortexM7lfdp</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7_DP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -20192,7 +20217,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -20278,6 +20303,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>3</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -20350,7 +20376,7 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __FPU_PRESENT=1U</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -21336,6 +21362,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -21426,11 +21462,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -21471,11 +21502,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -21798,11 +21824,12 @@
       <TargetName>cortexM7bfdp</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMCM7_DP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -21868,7 +21895,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -21954,6 +21981,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>3</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <OnChipMemories>
@@ -22026,7 +22054,7 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_CM7, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __FPU_PRESENT=1U, ARM_MATH_BIG_ENDIAN</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL, ARM_MATH_BIG_ENDIAN</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -23012,6 +23040,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -23102,11 +23140,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -23147,11 +23180,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -23474,11 +23502,12 @@
       <TargetName>ARMv8MBLl</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MBL</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MBL") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -23544,7 +23573,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -23630,6 +23659,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>3</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <OnChipMemories>
@@ -23702,7 +23732,7 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.base</MiscControls>
-              <Define>ARM_MATH_ARMV8MBL, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+              <Define>ARM_MATH_CM0_FAMILY, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -24688,6 +24718,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -24778,11 +24818,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -24823,11 +24858,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -25150,11 +25180,12 @@
       <TargetName>ARMv8MMLl</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -25220,7 +25251,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -25306,6 +25337,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <OnChipMemories>
@@ -25378,7 +25410,7 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main</MiscControls>
-              <Define>ARM_MATH_ARMV8MML, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -26364,6 +26396,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -26454,11 +26496,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -26499,11 +26536,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -26826,11 +26858,12 @@
       <TargetName>ARMv8MMLlfsp</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_SP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -26896,7 +26929,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -26982,6 +27015,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <OnChipMemories>
@@ -27054,7 +27088,7 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_ARMV8MML, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __FPU_PRESENT=1U</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -28040,6 +28074,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -28130,11 +28174,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -28175,11 +28214,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -28502,11 +28536,12 @@
       <TargetName>ARMv8MMLlfdp</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_DP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -28572,7 +28607,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -28658,6 +28693,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>3</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <OnChipMemories>
@@ -28730,7 +28766,7 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_ARMV8MML, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __FPU_PRESENT=1U</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -29716,6 +29752,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -29806,11 +29852,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -29851,11 +29892,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -30178,11 +30214,12 @@
       <TargetName>ARMv8MMLld</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_DSP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -30248,7 +30285,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -30334,6 +30371,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <OnChipMemories>
@@ -30406,7 +30444,7 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp</MiscControls>
-              <Define>ARM_MATH_ARMV8MML, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __DSP_PRESENT=1U</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -31392,6 +31430,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -31482,11 +31530,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -31527,11 +31570,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -31854,11 +31892,12 @@
       <TargetName>ARMv8MMLldfsp</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_DSP_SP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -31924,7 +31963,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -32010,6 +32049,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <OnChipMemories>
@@ -32082,7 +32122,7 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_ARMV8MML, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __DSP_PRESENT=1U, __FPU_PRESENT=1U</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -33068,6 +33108,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -33158,11 +33208,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -33203,11 +33248,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -33530,11 +33570,12 @@
       <TargetName>ARMv8MMLldfdp</TargetName>
       <ToolsetNumber>0x3</ToolsetNumber>
       <ToolsetName>ARM-GNU</ToolsetName>
+      <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>ARMv8MML_DSP_DP</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.0.0</PackID>
+          <PackID>ARM.CMSIS.5.5.0-dev52</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -33600,7 +33641,7 @@
           <AfterMake>
             <RunUserProg1>1</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\..\Lib\GCC\"</UserProg1Name>
+            <UserProg1Name>cmd.exe /C copy "$L\lib@L.a" "..\..\Lib\GCC\"</UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -33686,6 +33727,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>3</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>1</hadIROM2>
             <OnChipMemories>
@@ -33758,7 +33800,7 @@
             <uThumb>1</uThumb>
             <VariousControls>
               <MiscControls>-fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off</MiscControls>
-              <Define>ARM_MATH_ARMV8MML, ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, UNALIGNED_SUPPORT_DISABLE, __DSP_PRESENT=1U, __FPU_PRESENT=1U</Define>
+              <Define>ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL</Define>
               <Undefine></Undefine>
               <IncludePath>..\..\Include;..\..\..\Core\Include;..\..\..\Include</IncludePath>
             </VariousControls>
@@ -34744,6 +34786,16 @@
           <GroupName>TransformFunctions</GroupName>
           <Files>
             <File>
+              <FileName>arm_bitreversal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
+            </File>
+            <File>
+              <FileName>arm_bitreversal2.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.c</FilePath>
+            </File>
+            <File>
               <FileName>arm_cfft_radix4_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix4_f32.c</FilePath>
@@ -34834,11 +34886,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_q31.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal.c</FilePath>
-            </File>
-            <File>
               <FileName>arm_cfft_radix2_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix2_f32.c</FilePath>
@@ -34879,11 +34926,6 @@
               <FilePath>..\..\Source\TransformFunctions\arm_cfft_radix8_f32.c</FilePath>
             </File>
             <File>
-              <FileName>arm_bitreversal2.S</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\Source\TransformFunctions\arm_bitreversal2.S</FilePath>
-            </File>
-            <File>
               <FileName>arm_rfft_fast_f32.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\Source\TransformFunctions\arm_rfft_fast_f32.c</FilePath>
@@ -35204,4 +35246,10 @@
     </Target>
   </Targets>
 
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
 </Project>
diff --git a/DSP/Projects/GCC/arm_cortexM_math_Build.bat b/DSP/Projects/GCC/arm_cortexM_math_Build.bat
new file mode 100644
index 0000000..6904763
--- /dev/null
+++ b/DSP/Projects/GCC/arm_cortexM_math_Build.bat
@@ -0,0 +1,84 @@
+@echo off
+
+mkdir Temp
+set TMP=Temp
+set TEMP=Temp
+set UVEXE=C:\Keil_v5\UV4\UV4.EXE
+
+echo.
+echo Building DSP Libraries GCC
+
+echo   Building DSP Library for Cortex-M0 Little Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0l"     -o "DspLib_cortexM0l_build.log"
+
+echo   Building DSP Library for Cortex-M3 Little Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3l"     -o "DspLib_cortexM3l_build.log"
+
+echo   Building DSP Library for Cortex-M4 Little Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4l"     -o "DspLib_cortexM4l_build.log"
+
+echo   Building DSP Library for Cortex-M4 Little Endian with single precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4lf"    -o "DspLib_cortexM4lf_build.log"
+
+echo   Building DSP Library for Cortex-M7 Little Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7l"     -o "DspLib_cortexM7l_build.log"
+
+echo   Building DSP Library for Cortex-M7 Little Endian with single precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfsp"  -o "DspLib_cortexM7lfsp_build.log"
+
+echo   Building DSP Library for Cortex-M7 Little Endian with double precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfdp"  -o "DspLib_cortexM7lfdp_build.log"
+
+echo   Building DSP Library for ARMv8-M Baseline Little Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MBLl"     -o "DspLib_ARMv8MBLl_build.log"
+
+echo   Building DSP Library for ARMv8-M Mainline Little Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLl"     -o "DspLib_ARMv8MMLl_build.log"
+
+echo   Building DSP Library for ARMv8-M Mainline Little Endian with single precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfsp"  -o "DspLib_ARMv8MMLlfsp_build.log"
+
+echo   Building DSP Library for ARMv8-M Mainline Little Endian with double precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfdp"  -o "DspLib_ARMv8MMLlfdp_build.log"
+
+echo   Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLld"    -o "DspLib_ARMv8MMLld_build.log"
+
+echo   Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, single precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfsp" -o "DspLib_ARMv8MMLldfsp_build.log"
+
+echo   Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, double precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfdp" -o "DspLib_ARMv8MMLldfdp_build.log"
+
+
+REM big endian libraries
+
+echo   Building DSP Library for Cortex-M0 Big Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0b"    -o "DspLib_cortexM0b_build.log"
+
+echo   Building DSP Library for Cortex-M3 Big Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3b"    -o "DspLib_cortexM3b_build.log"
+
+echo   Building DSP Library for Cortex-M4 Big Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4b"    -o "DspLib_cortexM4b_build.log"
+
+echo   Building DSP Library for Cortex-M4 Big Endian with single precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4bf"   -o "DspLib_cortexM4bf_build.log"
+
+echo   Building DSP Library for Cortex-M7 Big Endian
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7b"    -o "DspLib_cortexM7b_build.log"
+
+echo   Building DSP Library for Cortex-M7 Big Endian with single precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfsp" -o "DspLib_cortexM7bfsp_build.log"
+
+echo   Building DSP Library for Cortex-M7 Big Endian with double precision FPU
+%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfdp" -o "DspLib_cortexM7bfdp_build.log"
+
+echo.
+echo   Deleting intermediate files
+rmdir /S /Q Temp
+rmdir /S /Q IntermediateFiles
+del /Q *.bak
+del /Q *.dep
+del /Q *.uvguix.*
+del /Q ArInp.*
diff --git a/DSP/Projects/IAR/arm_cortexM_math.ewp b/DSP/Projects/IAR/arm_cortexM_math.ewp
index b02ac80..7486e94 100644
--- a/DSP/Projects/IAR/arm_cortexM_math.ewp
+++ b/DSP/Projects/IAR/arm_cortexM_math.ewp
@@ -11,7 +11,7 @@
             <name>General</name>
             <archiveVersion>3</archiveVersion>
             <data>
-                <version>30</version>
+                <version>31</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -66,7 +66,7 @@
                 </option>
                 <option>
                     <name>OGLastSavedByProductVersion</name>
-                    <state>8.22.1.15696</state>
+                    <state>8.32.3.20186</state>
                 </option>
                 <option>
                     <name>GeneralEnableMisra</name>
@@ -112,11 +112,11 @@
                 </option>
                 <option>
                     <name>RTConfigPath2</name>
-                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+                    <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
                 </option>
                 <option>
                     <name>GBECoreSlave</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>34</state>
                 </option>
                 <option>
@@ -133,7 +133,7 @@
                 </option>
                 <option>
                     <name>CoreVariant</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>34</state>
                 </option>
                 <option>
@@ -156,7 +156,7 @@
                 </option>
                 <option>
                     <name>GFPUCoreSlave2</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>34</state>
                 </option>
                 <option>
@@ -204,20 +204,25 @@
                     <name>TrustZone</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>TrustZoneModes</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
             </data>
         </settings>
         <settings>
             <name>ICCARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>34</version>
+                <version>35</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
                     <name>CCDefines</name>
-                    <state>ARM_MATH_CM0</state>
                     <state>ARM_MATH_MATRIX_CHECK</state>
                     <state>ARM_MATH_ROUNDING</state>
+                    <state>ARM_MATH_LOOPUNROLL</state>
                 </option>
                 <option>
                     <name>CCPreprocFile</name>
@@ -462,6 +467,10 @@
                     <name>IccRTTI2</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OICompilerExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -518,8 +527,7 @@
                 </option>
                 <option>
                     <name>ADefines</name>
-                    <state>ARM_MATH_CM0
-</state>
+                    <state></state>
                 </option>
                 <option>
                     <name>AList</name>
@@ -683,7 +691,7 @@
             <name>ILINK</name>
             <archiveVersion>0</archiveVersion>
             <data>
-                <version>20</version>
+                <version>22</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -995,6 +1003,14 @@
                     <name>IlinkLocaleSelect</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>IlinkTrustzoneImportLibraryOut</name>
+                    <state>###Unitialized###</state>
+                </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -1034,7 +1050,7 @@
             <name>General</name>
             <archiveVersion>3</archiveVersion>
             <data>
-                <version>30</version>
+                <version>31</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -1089,7 +1105,7 @@
                 </option>
                 <option>
                     <name>OGLastSavedByProductVersion</name>
-                    <state>8.22.1.15696</state>
+                    <state>8.32.3.20186</state>
                 </option>
                 <option>
                     <name>GeneralEnableMisra</name>
@@ -1135,11 +1151,11 @@
                 </option>
                 <option>
                     <name>RTConfigPath2</name>
-                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+                    <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
                 </option>
                 <option>
                     <name>GBECoreSlave</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>34</state>
                 </option>
                 <option>
@@ -1156,7 +1172,7 @@
                 </option>
                 <option>
                     <name>CoreVariant</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>34</state>
                 </option>
                 <option>
@@ -1179,7 +1195,7 @@
                 </option>
                 <option>
                     <name>GFPUCoreSlave2</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>34</state>
                 </option>
                 <option>
@@ -1227,20 +1243,25 @@
                     <name>TrustZone</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>TrustZoneModes</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
             </data>
         </settings>
         <settings>
             <name>ICCARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>34</version>
+                <version>35</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
                     <name>CCDefines</name>
-                    <state>ARM_MATH_CM0</state>
                     <state>ARM_MATH_MATRIX_CHECK</state>
                     <state>ARM_MATH_ROUNDING</state>
+                    <state>ARM_MATH_LOOPUNROLL</state>
                     <state>ARM_MATH_BIG_ENDIAN</state>
                 </option>
                 <option>
@@ -1486,6 +1507,10 @@
                     <name>IccRTTI2</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OICompilerExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -1542,8 +1567,7 @@
                 </option>
                 <option>
                     <name>ADefines</name>
-                    <state>ARM_MATH_CM0
-</state>
+                    <state></state>
                 </option>
                 <option>
                     <name>AList</name>
@@ -1707,7 +1731,7 @@
             <name>ILINK</name>
             <archiveVersion>0</archiveVersion>
             <data>
-                <version>20</version>
+                <version>22</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -2019,6 +2043,14 @@
                     <name>IlinkLocaleSelect</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>IlinkTrustzoneImportLibraryOut</name>
+                    <state>###Unitialized###</state>
+                </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -2058,7 +2090,7 @@
             <name>General</name>
             <archiveVersion>3</archiveVersion>
             <data>
-                <version>30</version>
+                <version>31</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -2113,7 +2145,7 @@
                 </option>
                 <option>
                     <name>OGLastSavedByProductVersion</name>
-                    <state>8.22.1.15696</state>
+                    <state>8.32.3.20186</state>
                 </option>
                 <option>
                     <name>GeneralEnableMisra</name>
@@ -2159,11 +2191,11 @@
                 </option>
                 <option>
                     <name>RTConfigPath2</name>
-                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+                    <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
                 </option>
                 <option>
                     <name>GBECoreSlave</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>38</state>
                 </option>
                 <option>
@@ -2180,7 +2212,7 @@
                 </option>
                 <option>
                     <name>CoreVariant</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>38</state>
                 </option>
                 <option>
@@ -2203,7 +2235,7 @@
                 </option>
                 <option>
                     <name>GFPUCoreSlave2</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>38</state>
                 </option>
                 <option>
@@ -2251,20 +2283,25 @@
                     <name>TrustZone</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>TrustZoneModes</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
             </data>
         </settings>
         <settings>
             <name>ICCARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>34</version>
+                <version>35</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
                     <name>CCDefines</name>
-                    <state>ARM_MATH_CM3</state>
                     <state>ARM_MATH_MATRIX_CHECK</state>
                     <state>ARM_MATH_ROUNDING</state>
+                    <state>ARM_MATH_LOOPUNROLL</state>
                 </option>
                 <option>
                     <name>CCPreprocFile</name>
@@ -2509,6 +2546,10 @@
                     <name>IccRTTI2</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OICompilerExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -2565,8 +2606,7 @@
                 </option>
                 <option>
                     <name>ADefines</name>
-                    <state>ARM_MATH_CM3
-</state>
+                    <state></state>
                 </option>
                 <option>
                     <name>AList</name>
@@ -2730,7 +2770,7 @@
             <name>ILINK</name>
             <archiveVersion>0</archiveVersion>
             <data>
-                <version>20</version>
+                <version>22</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -3042,6 +3082,14 @@
                     <name>IlinkLocaleSelect</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>IlinkTrustzoneImportLibraryOut</name>
+                    <state>###Unitialized###</state>
+                </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -3081,7 +3129,7 @@
             <name>General</name>
             <archiveVersion>3</archiveVersion>
             <data>
-                <version>30</version>
+                <version>31</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -3136,7 +3184,7 @@
                 </option>
                 <option>
                     <name>OGLastSavedByProductVersion</name>
-                    <state>8.22.1.15696</state>
+                    <state>8.32.3.20186</state>
                 </option>
                 <option>
                     <name>GeneralEnableMisra</name>
@@ -3182,11 +3230,11 @@
                 </option>
                 <option>
                     <name>RTConfigPath2</name>
-                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+                    <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
                 </option>
                 <option>
                     <name>GBECoreSlave</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>38</state>
                 </option>
                 <option>
@@ -3203,7 +3251,7 @@
                 </option>
                 <option>
                     <name>CoreVariant</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>38</state>
                 </option>
                 <option>
@@ -3226,7 +3274,7 @@
                 </option>
                 <option>
                     <name>GFPUCoreSlave2</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>38</state>
                 </option>
                 <option>
@@ -3274,20 +3322,25 @@
                     <name>TrustZone</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>TrustZoneModes</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
             </data>
         </settings>
         <settings>
             <name>ICCARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>34</version>
+                <version>35</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
                     <name>CCDefines</name>
-                    <state>ARM_MATH_CM3</state>
                     <state>ARM_MATH_MATRIX_CHECK</state>
                     <state>ARM_MATH_ROUNDING</state>
+                    <state>ARM_MATH_LOOPUNROLL</state>
                     <state>ARM_MATH_BIG_ENDIAN</state>
                 </option>
                 <option>
@@ -3533,6 +3586,10 @@
                     <name>IccRTTI2</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OICompilerExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -3589,8 +3646,7 @@
                 </option>
                 <option>
                     <name>ADefines</name>
-                    <state>ARM_MATH_CM3
-</state>
+                    <state></state>
                 </option>
                 <option>
                     <name>AList</name>
@@ -3754,7 +3810,7 @@
             <name>ILINK</name>
             <archiveVersion>0</archiveVersion>
             <data>
-                <version>20</version>
+                <version>22</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -4066,6 +4122,14 @@
                     <name>IlinkLocaleSelect</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>IlinkTrustzoneImportLibraryOut</name>
+                    <state>###Unitialized###</state>
+                </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -4105,7 +4169,7 @@
             <name>General</name>
             <archiveVersion>3</archiveVersion>
             <data>
-                <version>30</version>
+                <version>31</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -4160,7 +4224,7 @@
                 </option>
                 <option>
                     <name>OGLastSavedByProductVersion</name>
-                    <state>8.22.1.15696</state>
+                    <state>8.32.3.20186</state>
                 </option>
                 <option>
                     <name>GeneralEnableMisra</name>
@@ -4206,11 +4270,11 @@
                 </option>
                 <option>
                     <name>RTConfigPath2</name>
-                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+                    <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
                 </option>
                 <option>
                     <name>GBECoreSlave</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>39</state>
                 </option>
                 <option>
@@ -4227,7 +4291,7 @@
                 </option>
                 <option>
                     <name>CoreVariant</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>39</state>
                 </option>
                 <option>
@@ -4250,7 +4314,7 @@
                 </option>
                 <option>
                     <name>GFPUCoreSlave2</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>39</state>
                 </option>
                 <option>
@@ -4298,20 +4362,25 @@
                     <name>TrustZone</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>TrustZoneModes</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
             </data>
         </settings>
         <settings>
             <name>ICCARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>34</version>
+                <version>35</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
                     <name>CCDefines</name>
-                    <state>ARM_MATH_CM4</state>
                     <state>ARM_MATH_MATRIX_CHECK</state>
                     <state>ARM_MATH_ROUNDING</state>
+                    <state>ARM_MATH_LOOPUNROLL</state>
                 </option>
                 <option>
                     <name>CCPreprocFile</name>
@@ -4556,6 +4625,10 @@
                     <name>IccRTTI2</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OICompilerExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -4612,8 +4685,7 @@
                 </option>
                 <option>
                     <name>ADefines</name>
-                    <state>ARM_MATH_CM4
-</state>
+                    <state></state>
                 </option>
                 <option>
                     <name>AList</name>
@@ -4777,7 +4849,7 @@
             <name>ILINK</name>
             <archiveVersion>0</archiveVersion>
             <data>
-                <version>20</version>
+                <version>22</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -5089,6 +5161,14 @@
                     <name>IlinkLocaleSelect</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>IlinkTrustzoneImportLibraryOut</name>
+                    <state>###Unitialized###</state>
+                </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -5128,7 +5208,7 @@
             <name>General</name>
             <archiveVersion>3</archiveVersion>
             <data>
-                <version>30</version>
+                <version>31</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -5183,7 +5263,7 @@
                 </option>
                 <option>
                     <name>OGLastSavedByProductVersion</name>
-                    <state>8.22.1.15696</state>
+                    <state>8.32.3.20186</state>
                 </option>
                 <option>
                     <name>GeneralEnableMisra</name>
@@ -5229,11 +5309,11 @@
                 </option>
                 <option>
                     <name>RTConfigPath2</name>
-                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+                    <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
                 </option>
                 <option>
                     <name>GBECoreSlave</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>39</state>
                 </option>
                 <option>
@@ -5250,7 +5330,7 @@
                 </option>
                 <option>
                     <name>CoreVariant</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>39</state>
                 </option>
                 <option>
@@ -5273,7 +5353,7 @@
                 </option>
                 <option>
                     <name>GFPUCoreSlave2</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>39</state>
                 </option>
                 <option>
@@ -5321,20 +5401,25 @@
                     <name>TrustZone</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>TrustZoneModes</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
             </data>
         </settings>
         <settings>
             <name>ICCARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>34</version>
+                <version>35</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
                     <name>CCDefines</name>
-                    <state>ARM_MATH_CM4</state>
                     <state>ARM_MATH_MATRIX_CHECK</state>
                     <state>ARM_MATH_ROUNDING</state>
+                    <state>ARM_MATH_LOOPUNROLL</state>
                     <state>ARM_MATH_BIG_ENDIAN</state>
                 </option>
                 <option>
@@ -5580,6 +5665,10 @@
                     <name>IccRTTI2</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OICompilerExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -5636,8 +5725,7 @@
                 </option>
                 <option>
                     <name>ADefines</name>
-                    <state>ARM_MATH_CM4
-</state>
+                    <state></state>
                 </option>
                 <option>
                     <name>AList</name>
@@ -5801,7 +5889,7 @@
             <name>ILINK</name>
             <archiveVersion>0</archiveVersion>
             <data>
-                <version>20</version>
+                <version>22</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -6113,6 +6201,14 @@
                     <name>IlinkLocaleSelect</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>IlinkTrustzoneImportLibraryOut</name>
+                    <state>###Unitialized###</state>
+                </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -6152,7 +6248,7 @@
             <name>General</name>
             <archiveVersion>3</archiveVersion>
             <data>
-                <version>30</version>
+                <version>31</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -6207,7 +6303,7 @@
                 </option>
                 <option>
                     <name>OGLastSavedByProductVersion</name>
-                    <state>8.22.1.15696</state>
+                    <state>8.32.3.20186</state>
                 </option>
                 <option>
                     <name>GeneralEnableMisra</name>
@@ -6253,11 +6349,11 @@
                 </option>
                 <option>
                     <name>RTConfigPath2</name>
-                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+                    <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
                 </option>
                 <option>
                     <name>GBECoreSlave</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>39</state>
                 </option>
                 <option>
@@ -6274,7 +6370,7 @@
                 </option>
                 <option>
                     <name>CoreVariant</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>39</state>
                 </option>
                 <option>
@@ -6297,7 +6393,7 @@
                 </option>
                 <option>
                     <name>GFPUCoreSlave2</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>39</state>
                 </option>
                 <option>
@@ -6345,21 +6441,25 @@
                     <name>TrustZone</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>TrustZoneModes</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
             </data>
         </settings>
         <settings>
             <name>ICCARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>34</version>
+                <version>35</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
                     <name>CCDefines</name>
-                    <state>ARM_MATH_CM4</state>
                     <state>ARM_MATH_MATRIX_CHECK</state>
                     <state>ARM_MATH_ROUNDING</state>
-                    <state>__FPU_PRESENT=1U</state>
+                    <state>ARM_MATH_LOOPUNROLL</state>
                 </option>
                 <option>
                     <name>CCPreprocFile</name>
@@ -6604,6 +6704,10 @@
                     <name>IccRTTI2</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OICompilerExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -6660,8 +6764,7 @@
                 </option>
                 <option>
                     <name>ADefines</name>
-                    <state>ARM_MATH_CM4
-</state>
+                    <state></state>
                 </option>
                 <option>
                     <name>AList</name>
@@ -6825,7 +6928,7 @@
             <name>ILINK</name>
             <archiveVersion>0</archiveVersion>
             <data>
-                <version>20</version>
+                <version>22</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -7137,6 +7240,14 @@
                     <name>IlinkLocaleSelect</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>IlinkTrustzoneImportLibraryOut</name>
+                    <state>###Unitialized###</state>
+                </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -7176,7 +7287,7 @@
             <name>General</name>
             <archiveVersion>3</archiveVersion>
             <data>
-                <version>30</version>
+                <version>31</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -7231,7 +7342,7 @@
                 </option>
                 <option>
                     <name>OGLastSavedByProductVersion</name>
-                    <state>8.22.1.15696</state>
+                    <state>8.32.3.20186</state>
                 </option>
                 <option>
                     <name>GeneralEnableMisra</name>
@@ -7277,11 +7388,11 @@
                 </option>
                 <option>
                     <name>RTConfigPath2</name>
-                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+                    <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
                 </option>
                 <option>
                     <name>GBECoreSlave</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>39</state>
                 </option>
                 <option>
@@ -7298,7 +7409,7 @@
                 </option>
                 <option>
                     <name>CoreVariant</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>39</state>
                 </option>
                 <option>
@@ -7321,7 +7432,7 @@
                 </option>
                 <option>
                     <name>GFPUCoreSlave2</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>39</state>
                 </option>
                 <option>
@@ -7369,21 +7480,25 @@
                     <name>TrustZone</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>TrustZoneModes</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
             </data>
         </settings>
         <settings>
             <name>ICCARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>34</version>
+                <version>35</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
                     <name>CCDefines</name>
-                    <state>ARM_MATH_CM4</state>
                     <state>ARM_MATH_MATRIX_CHECK</state>
                     <state>ARM_MATH_ROUNDING</state>
-                    <state>__FPU_PRESENT=1U</state>
+                    <state>ARM_MATH_LOOPUNROLL</state>
                     <state>ARM_MATH_BIG_ENDIAN</state>
                 </option>
                 <option>
@@ -7629,6 +7744,10 @@
                     <name>IccRTTI2</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OICompilerExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -7685,8 +7804,7 @@
                 </option>
                 <option>
                     <name>ADefines</name>
-                    <state>ARM_MATH_CM4
-</state>
+                    <state></state>
                 </option>
                 <option>
                     <name>AList</name>
@@ -7850,7 +7968,7 @@
             <name>ILINK</name>
             <archiveVersion>0</archiveVersion>
             <data>
-                <version>20</version>
+                <version>22</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -8162,6 +8280,14 @@
                     <name>IlinkLocaleSelect</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>IlinkTrustzoneImportLibraryOut</name>
+                    <state>###Unitialized###</state>
+                </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -8201,7 +8327,7 @@
             <name>General</name>
             <archiveVersion>3</archiveVersion>
             <data>
-                <version>30</version>
+                <version>31</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -8256,7 +8382,7 @@
                 </option>
                 <option>
                     <name>OGLastSavedByProductVersion</name>
-                    <state>8.22.1.15696</state>
+                    <state>8.32.3.20186</state>
                 </option>
                 <option>
                     <name>GeneralEnableMisra</name>
@@ -8302,11 +8428,11 @@
                 </option>
                 <option>
                     <name>RTConfigPath2</name>
-                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+                    <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
                 </option>
                 <option>
                     <name>GBECoreSlave</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>41</state>
                 </option>
                 <option>
@@ -8323,7 +8449,7 @@
                 </option>
                 <option>
                     <name>CoreVariant</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>41</state>
                 </option>
                 <option>
@@ -8346,7 +8472,7 @@
                 </option>
                 <option>
                     <name>GFPUCoreSlave2</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>41</state>
                 </option>
                 <option>
@@ -8394,20 +8520,25 @@
                     <name>TrustZone</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>TrustZoneModes</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
             </data>
         </settings>
         <settings>
             <name>ICCARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>34</version>
+                <version>35</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
                     <name>CCDefines</name>
-                    <state>ARM_MATH_CM7</state>
                     <state>ARM_MATH_MATRIX_CHECK</state>
                     <state>ARM_MATH_ROUNDING</state>
+                    <state>ARM_MATH_LOOPUNROLL</state>
                 </option>
                 <option>
                     <name>CCPreprocFile</name>
@@ -8652,6 +8783,10 @@
                     <name>IccRTTI2</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OICompilerExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -8708,8 +8843,7 @@
                 </option>
                 <option>
                     <name>ADefines</name>
-                    <state>ARM_MATH_CM7
-</state>
+                    <state></state>
                 </option>
                 <option>
                     <name>AList</name>
@@ -8873,7 +9007,7 @@
             <name>ILINK</name>
             <archiveVersion>0</archiveVersion>
             <data>
-                <version>20</version>
+                <version>22</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -9185,6 +9319,14 @@
                     <name>IlinkLocaleSelect</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>IlinkTrustzoneImportLibraryOut</name>
+                    <state>###Unitialized###</state>
+                </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -9224,7 +9366,7 @@
             <name>General</name>
             <archiveVersion>3</archiveVersion>
             <data>
-                <version>30</version>
+                <version>31</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -9279,7 +9421,7 @@
                 </option>
                 <option>
                     <name>OGLastSavedByProductVersion</name>
-                    <state>8.22.1.15696</state>
+                    <state>8.32.3.20186</state>
                 </option>
                 <option>
                     <name>GeneralEnableMisra</name>
@@ -9325,11 +9467,11 @@
                 </option>
                 <option>
                     <name>RTConfigPath2</name>
-                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+                    <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
                 </option>
                 <option>
                     <name>GBECoreSlave</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>39</state>
                 </option>
                 <option>
@@ -9346,7 +9488,7 @@
                 </option>
                 <option>
                     <name>CoreVariant</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>39</state>
                 </option>
                 <option>
@@ -9369,7 +9511,7 @@
                 </option>
                 <option>
                     <name>GFPUCoreSlave2</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>39</state>
                 </option>
                 <option>
@@ -9417,20 +9559,25 @@
                     <name>TrustZone</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>TrustZoneModes</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
             </data>
         </settings>
         <settings>
             <name>ICCARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>34</version>
+                <version>35</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
                     <name>CCDefines</name>
-                    <state>ARM_MATH_CM7</state>
                     <state>ARM_MATH_MATRIX_CHECK</state>
                     <state>ARM_MATH_ROUNDING</state>
+                    <state>ARM_MATH_LOOPUNROLL</state>
                     <state>ARM_MATH_BIG_ENDIAN</state>
                 </option>
                 <option>
@@ -9676,6 +9823,10 @@
                     <name>IccRTTI2</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OICompilerExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -9732,8 +9883,7 @@
                 </option>
                 <option>
                     <name>ADefines</name>
-                    <state>ARM_MATH_CM7
-</state>
+                    <state></state>
                 </option>
                 <option>
                     <name>AList</name>
@@ -9897,7 +10047,7 @@
             <name>ILINK</name>
             <archiveVersion>0</archiveVersion>
             <data>
-                <version>20</version>
+                <version>22</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -10209,6 +10359,14 @@
                     <name>IlinkLocaleSelect</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>IlinkTrustzoneImportLibraryOut</name>
+                    <state>###Unitialized###</state>
+                </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -10248,7 +10406,7 @@
             <name>General</name>
             <archiveVersion>3</archiveVersion>
             <data>
-                <version>30</version>
+                <version>31</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -10303,7 +10461,7 @@
                 </option>
                 <option>
                     <name>OGLastSavedByProductVersion</name>
-                    <state>8.22.1.15696</state>
+                    <state>8.32.3.20186</state>
                 </option>
                 <option>
                     <name>GeneralEnableMisra</name>
@@ -10349,11 +10507,11 @@
                 </option>
                 <option>
                     <name>RTConfigPath2</name>
-                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+                    <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
                 </option>
                 <option>
                     <name>GBECoreSlave</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>41</state>
                 </option>
                 <option>
@@ -10370,7 +10528,7 @@
                 </option>
                 <option>
                     <name>CoreVariant</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>41</state>
                 </option>
                 <option>
@@ -10393,7 +10551,7 @@
                 </option>
                 <option>
                     <name>GFPUCoreSlave2</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>41</state>
                 </option>
                 <option>
@@ -10441,21 +10599,25 @@
                     <name>TrustZone</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>TrustZoneModes</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
             </data>
         </settings>
         <settings>
             <name>ICCARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>34</version>
+                <version>35</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
                     <name>CCDefines</name>
-                    <state>ARM_MATH_CM7</state>
                     <state>ARM_MATH_MATRIX_CHECK</state>
                     <state>ARM_MATH_ROUNDING</state>
-                    <state>__FPU_PRESENT=1U</state>
+                    <state>ARM_MATH_LOOPUNROLL</state>
                 </option>
                 <option>
                     <name>CCPreprocFile</name>
@@ -10700,6 +10862,10 @@
                     <name>IccRTTI2</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OICompilerExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -10756,8 +10922,7 @@
                 </option>
                 <option>
                     <name>ADefines</name>
-                    <state>ARM_MATH_CM7
-</state>
+                    <state></state>
                 </option>
                 <option>
                     <name>AList</name>
@@ -10921,7 +11086,7 @@
             <name>ILINK</name>
             <archiveVersion>0</archiveVersion>
             <data>
-                <version>20</version>
+                <version>22</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -11233,6 +11398,14 @@
                     <name>IlinkLocaleSelect</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>IlinkTrustzoneImportLibraryOut</name>
+                    <state>###Unitialized###</state>
+                </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -11272,7 +11445,7 @@
             <name>General</name>
             <archiveVersion>3</archiveVersion>
             <data>
-                <version>30</version>
+                <version>31</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -11327,7 +11500,7 @@
                 </option>
                 <option>
                     <name>OGLastSavedByProductVersion</name>
-                    <state>8.22.1.15696</state>
+                    <state>8.32.3.20186</state>
                 </option>
                 <option>
                     <name>GeneralEnableMisra</name>
@@ -11373,11 +11546,11 @@
                 </option>
                 <option>
                     <name>RTConfigPath2</name>
-                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+                    <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
                 </option>
                 <option>
                     <name>GBECoreSlave</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>41</state>
                 </option>
                 <option>
@@ -11394,7 +11567,7 @@
                 </option>
                 <option>
                     <name>CoreVariant</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>41</state>
                 </option>
                 <option>
@@ -11417,7 +11590,7 @@
                 </option>
                 <option>
                     <name>GFPUCoreSlave2</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>41</state>
                 </option>
                 <option>
@@ -11465,21 +11638,25 @@
                     <name>TrustZone</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>TrustZoneModes</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
             </data>
         </settings>
         <settings>
             <name>ICCARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>34</version>
+                <version>35</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
                     <name>CCDefines</name>
-                    <state>ARM_MATH_CM7</state>
                     <state>ARM_MATH_MATRIX_CHECK</state>
                     <state>ARM_MATH_ROUNDING</state>
-                    <state>__FPU_PRESENT=1U</state>
+                    <state>ARM_MATH_LOOPUNROLL</state>
                     <state>ARM_MATH_BIG_ENDIAN</state>
                 </option>
                 <option>
@@ -11725,6 +11902,10 @@
                     <name>IccRTTI2</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OICompilerExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -11781,8 +11962,7 @@
                 </option>
                 <option>
                     <name>ADefines</name>
-                    <state>ARM_MATH_CM7
-</state>
+                    <state></state>
                 </option>
                 <option>
                     <name>AList</name>
@@ -11946,7 +12126,7 @@
             <name>ILINK</name>
             <archiveVersion>0</archiveVersion>
             <data>
-                <version>20</version>
+                <version>22</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -12258,6 +12438,14 @@
                     <name>IlinkLocaleSelect</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>IlinkTrustzoneImportLibraryOut</name>
+                    <state>###Unitialized###</state>
+                </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -12297,7 +12485,7 @@
             <name>General</name>
             <archiveVersion>3</archiveVersion>
             <data>
-                <version>30</version>
+                <version>31</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -12352,7 +12540,7 @@
                 </option>
                 <option>
                     <name>OGLastSavedByProductVersion</name>
-                    <state>8.22.1.15696</state>
+                    <state>8.32.3.20186</state>
                 </option>
                 <option>
                     <name>GeneralEnableMisra</name>
@@ -12398,11 +12586,11 @@
                 </option>
                 <option>
                     <name>RTConfigPath2</name>
-                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+                    <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
                 </option>
                 <option>
                     <name>GBECoreSlave</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>41</state>
                 </option>
                 <option>
@@ -12419,7 +12607,7 @@
                 </option>
                 <option>
                     <name>CoreVariant</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>41</state>
                 </option>
                 <option>
@@ -12442,7 +12630,7 @@
                 </option>
                 <option>
                     <name>GFPUCoreSlave2</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>41</state>
                 </option>
                 <option>
@@ -12490,21 +12678,25 @@
                     <name>TrustZone</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>TrustZoneModes</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
             </data>
         </settings>
         <settings>
             <name>ICCARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>34</version>
+                <version>35</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
                     <name>CCDefines</name>
-                    <state>ARM_MATH_CM7</state>
                     <state>ARM_MATH_MATRIX_CHECK</state>
                     <state>ARM_MATH_ROUNDING</state>
-                    <state>__FPU_PRESENT=1U</state>
+                    <state>ARM_MATH_LOOPUNROLL</state>
                 </option>
                 <option>
                     <name>CCPreprocFile</name>
@@ -12749,6 +12941,10 @@
                     <name>IccRTTI2</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OICompilerExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -12805,8 +13001,7 @@
                 </option>
                 <option>
                     <name>ADefines</name>
-                    <state>ARM_MATH_CM7
-</state>
+                    <state></state>
                 </option>
                 <option>
                     <name>AList</name>
@@ -12970,7 +13165,7 @@
             <name>ILINK</name>
             <archiveVersion>0</archiveVersion>
             <data>
-                <version>20</version>
+                <version>22</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -13282,6 +13477,14 @@
                     <name>IlinkLocaleSelect</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>IlinkTrustzoneImportLibraryOut</name>
+                    <state>###Unitialized###</state>
+                </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -13321,7 +13524,7 @@
             <name>General</name>
             <archiveVersion>3</archiveVersion>
             <data>
-                <version>30</version>
+                <version>31</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -13376,7 +13579,7 @@
                 </option>
                 <option>
                     <name>OGLastSavedByProductVersion</name>
-                    <state>8.22.1.15696</state>
+                    <state>8.32.3.20186</state>
                 </option>
                 <option>
                     <name>GeneralEnableMisra</name>
@@ -13422,11 +13625,11 @@
                 </option>
                 <option>
                     <name>RTConfigPath2</name>
-                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+                    <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
                 </option>
                 <option>
                     <name>GBECoreSlave</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>41</state>
                 </option>
                 <option>
@@ -13443,7 +13646,7 @@
                 </option>
                 <option>
                     <name>CoreVariant</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>41</state>
                 </option>
                 <option>
@@ -13466,7 +13669,7 @@
                 </option>
                 <option>
                     <name>GFPUCoreSlave2</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>41</state>
                 </option>
                 <option>
@@ -13514,21 +13717,25 @@
                     <name>TrustZone</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>TrustZoneModes</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
             </data>
         </settings>
         <settings>
             <name>ICCARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>34</version>
+                <version>35</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
                     <name>CCDefines</name>
-                    <state>ARM_MATH_CM7</state>
                     <state>ARM_MATH_MATRIX_CHECK</state>
                     <state>ARM_MATH_ROUNDING</state>
-                    <state>__FPU_PRESENT=1U</state>
+                    <state>ARM_MATH_LOOPUNROLL</state>
                     <state>ARM_MATH_BIG_ENDIAN</state>
                 </option>
                 <option>
@@ -13774,6 +13981,10 @@
                     <name>IccRTTI2</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OICompilerExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -13830,8 +14041,7 @@
                 </option>
                 <option>
                     <name>ADefines</name>
-                    <state>ARM_MATH_CM7
-</state>
+                    <state></state>
                 </option>
                 <option>
                     <name>AList</name>
@@ -13995,7 +14205,7 @@
             <name>ILINK</name>
             <archiveVersion>0</archiveVersion>
             <data>
-                <version>20</version>
+                <version>22</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -14307,6 +14517,14 @@
                     <name>IlinkLocaleSelect</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>IlinkTrustzoneImportLibraryOut</name>
+                    <state>###Unitialized###</state>
+                </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -14346,7 +14564,7 @@
             <name>General</name>
             <archiveVersion>3</archiveVersion>
             <data>
-                <version>30</version>
+                <version>31</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -14401,7 +14619,7 @@
                 </option>
                 <option>
                     <name>OGLastSavedByProductVersion</name>
-                    <state>8.22.1.15696</state>
+                    <state>8.32.3.20186</state>
                 </option>
                 <option>
                     <name>GeneralEnableMisra</name>
@@ -14447,11 +14665,11 @@
                 </option>
                 <option>
                     <name>RTConfigPath2</name>
-                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+                    <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
                 </option>
                 <option>
                     <name>GBECoreSlave</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>58</state>
                 </option>
                 <option>
@@ -14468,7 +14686,7 @@
                 </option>
                 <option>
                     <name>CoreVariant</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>58</state>
                 </option>
                 <option>
@@ -14491,7 +14709,7 @@
                 </option>
                 <option>
                     <name>GFPUCoreSlave2</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>58</state>
                 </option>
                 <option>
@@ -14537,6 +14755,11 @@
                 </option>
                 <option>
                     <name>TrustZone</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>TrustZoneModes</name>
+                    <version>0</version>
                     <state>1</state>
                 </option>
             </data>
@@ -14545,15 +14768,14 @@
             <name>ICCARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>34</version>
+                <version>35</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
                     <name>CCDefines</name>
-                    <state>ARM_MATH_ARMV8MBL</state>
                     <state>ARM_MATH_MATRIX_CHECK</state>
                     <state>ARM_MATH_ROUNDING</state>
-                    <state>__DSP_PRESENT=1U</state>
+                    <state>ARM_MATH_LOOPUNROLL</state>
                 </option>
                 <option>
                     <name>CCPreprocFile</name>
@@ -14798,6 +15020,10 @@
                     <name>IccRTTI2</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OICompilerExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -14854,7 +15080,7 @@
                 </option>
                 <option>
                     <name>ADefines</name>
-                    <state>ARM_MATH_ARMV8MBL</state>
+                    <state></state>
                 </option>
                 <option>
                     <name>AList</name>
@@ -15018,7 +15244,7 @@
             <name>ILINK</name>
             <archiveVersion>0</archiveVersion>
             <data>
-                <version>20</version>
+                <version>22</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -15330,6 +15556,14 @@
                     <name>IlinkLocaleSelect</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>IlinkTrustzoneImportLibraryOut</name>
+                    <state>###Unitialized###</state>
+                </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -15369,7 +15603,7 @@
             <name>General</name>
             <archiveVersion>3</archiveVersion>
             <data>
-                <version>30</version>
+                <version>31</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -15424,7 +15658,7 @@
                 </option>
                 <option>
                     <name>OGLastSavedByProductVersion</name>
-                    <state>8.22.1.15696</state>
+                    <state>8.32.3.20186</state>
                 </option>
                 <option>
                     <name>GeneralEnableMisra</name>
@@ -15470,11 +15704,11 @@
                 </option>
                 <option>
                     <name>RTConfigPath2</name>
-                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+                    <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
                 </option>
                 <option>
                     <name>GBECoreSlave</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>59</state>
                 </option>
                 <option>
@@ -15491,7 +15725,7 @@
                 </option>
                 <option>
                     <name>CoreVariant</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>59</state>
                 </option>
                 <option>
@@ -15514,7 +15748,7 @@
                 </option>
                 <option>
                     <name>GFPUCoreSlave2</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>59</state>
                 </option>
                 <option>
@@ -15556,10 +15790,15 @@
                 </option>
                 <option>
                     <name>DSPExtension</name>
-                    <state>1</state>
+                    <state>0</state>
                 </option>
                 <option>
                     <name>TrustZone</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>TrustZoneModes</name>
+                    <version>0</version>
                     <state>1</state>
                 </option>
             </data>
@@ -15568,15 +15807,14 @@
             <name>ICCARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>34</version>
+                <version>35</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
                     <name>CCDefines</name>
-                    <state>ARM_MATH_ARMV8MML</state>
                     <state>ARM_MATH_MATRIX_CHECK</state>
                     <state>ARM_MATH_ROUNDING</state>
-                    <state>__DSP_PRESENT=1U</state>
+                    <state>ARM_MATH_LOOPUNROLL</state>
                 </option>
                 <option>
                     <name>CCPreprocFile</name>
@@ -15821,6 +16059,10 @@
                     <name>IccRTTI2</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OICompilerExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -15877,7 +16119,7 @@
                 </option>
                 <option>
                     <name>ADefines</name>
-                    <state>ARM_MATH_ARMV8MML</state>
+                    <state></state>
                 </option>
                 <option>
                     <name>AList</name>
@@ -16041,7 +16283,7 @@
             <name>ILINK</name>
             <archiveVersion>0</archiveVersion>
             <data>
-                <version>20</version>
+                <version>22</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -16353,6 +16595,14 @@
                     <name>IlinkLocaleSelect</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>IlinkTrustzoneImportLibraryOut</name>
+                    <state>###Unitialized###</state>
+                </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -16392,7 +16642,7 @@
             <name>General</name>
             <archiveVersion>3</archiveVersion>
             <data>
-                <version>30</version>
+                <version>31</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -16447,7 +16697,7 @@
                 </option>
                 <option>
                     <name>OGLastSavedByProductVersion</name>
-                    <state>8.22.1.15696</state>
+                    <state>8.32.3.20186</state>
                 </option>
                 <option>
                     <name>GeneralEnableMisra</name>
@@ -16493,11 +16743,11 @@
                 </option>
                 <option>
                     <name>RTConfigPath2</name>
-                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+                    <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
                 </option>
                 <option>
                     <name>GBECoreSlave</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>59</state>
                 </option>
                 <option>
@@ -16514,7 +16764,7 @@
                 </option>
                 <option>
                     <name>CoreVariant</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>59</state>
                 </option>
                 <option>
@@ -16537,7 +16787,7 @@
                 </option>
                 <option>
                     <name>GFPUCoreSlave2</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>59</state>
                 </option>
                 <option>
@@ -16579,10 +16829,15 @@
                 </option>
                 <option>
                     <name>DSPExtension</name>
-                    <state>1</state>
+                    <state>0</state>
                 </option>
                 <option>
                     <name>TrustZone</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>TrustZoneModes</name>
+                    <version>0</version>
                     <state>1</state>
                 </option>
             </data>
@@ -16591,17 +16846,14 @@
             <name>ICCARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>34</version>
+                <version>35</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
                     <name>CCDefines</name>
-                    <state>ARM_MATH_ARMV8MML</state>
                     <state>ARM_MATH_MATRIX_CHECK</state>
                     <state>ARM_MATH_ROUNDING</state>
-                    <state>__DSP_PRESENT=1U</state>
-                    <state>__FPU_PRESENT=1U</state>
-                    <state>__FPU_PRESENT=1U</state>
+                    <state>ARM_MATH_LOOPUNROLL</state>
                 </option>
                 <option>
                     <name>CCPreprocFile</name>
@@ -16846,6 +17098,10 @@
                     <name>IccRTTI2</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OICompilerExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -16902,7 +17158,7 @@
                 </option>
                 <option>
                     <name>ADefines</name>
-                    <state>ARM_MATH_ARMV8MML</state>
+                    <state></state>
                 </option>
                 <option>
                     <name>AList</name>
@@ -17066,7 +17322,7 @@
             <name>ILINK</name>
             <archiveVersion>0</archiveVersion>
             <data>
-                <version>20</version>
+                <version>22</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -17378,6 +17634,14 @@
                     <name>IlinkLocaleSelect</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>IlinkTrustzoneImportLibraryOut</name>
+                    <state>###Unitialized###</state>
+                </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -17417,7 +17681,7 @@
             <name>General</name>
             <archiveVersion>3</archiveVersion>
             <data>
-                <version>30</version>
+                <version>31</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -17472,7 +17736,7 @@
                 </option>
                 <option>
                     <name>OGLastSavedByProductVersion</name>
-                    <state>8.22.1.15696</state>
+                    <state>8.32.3.20186</state>
                 </option>
                 <option>
                     <name>GeneralEnableMisra</name>
@@ -17518,11 +17782,11 @@
                 </option>
                 <option>
                     <name>RTConfigPath2</name>
-                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+                    <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
                 </option>
                 <option>
                     <name>GBECoreSlave</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>59</state>
                 </option>
                 <option>
@@ -17539,7 +17803,7 @@
                 </option>
                 <option>
                     <name>CoreVariant</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>59</state>
                 </option>
                 <option>
@@ -17562,7 +17826,7 @@
                 </option>
                 <option>
                     <name>GFPUCoreSlave2</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>59</state>
                 </option>
                 <option>
@@ -17604,10 +17868,15 @@
                 </option>
                 <option>
                     <name>DSPExtension</name>
-                    <state>1</state>
+                    <state>0</state>
                 </option>
                 <option>
                     <name>TrustZone</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>TrustZoneModes</name>
+                    <version>0</version>
                     <state>1</state>
                 </option>
             </data>
@@ -17616,17 +17885,14 @@
             <name>ICCARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>34</version>
+                <version>35</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
                     <name>CCDefines</name>
-                    <state>ARM_MATH_ARMV8MML</state>
                     <state>ARM_MATH_MATRIX_CHECK</state>
                     <state>ARM_MATH_ROUNDING</state>
-                    <state>__DSP_PRESENT=1U</state>
-                    <state>__FPU_PRESENT=1U</state>
-                    <state>__FPU_PRESENT=1U</state>
+                    <state>ARM_MATH_LOOPUNROLL</state>
                 </option>
                 <option>
                     <name>CCPreprocFile</name>
@@ -17871,6 +18137,10 @@
                     <name>IccRTTI2</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OICompilerExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -17927,7 +18197,7 @@
                 </option>
                 <option>
                     <name>ADefines</name>
-                    <state>ARM_MATH_ARMV8MML</state>
+                    <state></state>
                 </option>
                 <option>
                     <name>AList</name>
@@ -18091,7 +18361,7 @@
             <name>ILINK</name>
             <archiveVersion>0</archiveVersion>
             <data>
-                <version>20</version>
+                <version>22</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -18403,6 +18673,14 @@
                     <name>IlinkLocaleSelect</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>IlinkTrustzoneImportLibraryOut</name>
+                    <state>###Unitialized###</state>
+                </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -18442,7 +18720,7 @@
             <name>General</name>
             <archiveVersion>3</archiveVersion>
             <data>
-                <version>30</version>
+                <version>31</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -18497,7 +18775,7 @@
                 </option>
                 <option>
                     <name>OGLastSavedByProductVersion</name>
-                    <state>8.22.1.15696</state>
+                    <state>8.32.3.20186</state>
                 </option>
                 <option>
                     <name>GeneralEnableMisra</name>
@@ -18543,11 +18821,11 @@
                 </option>
                 <option>
                     <name>RTConfigPath2</name>
-                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+                    <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
                 </option>
                 <option>
                     <name>GBECoreSlave</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>59</state>
                 </option>
                 <option>
@@ -18564,7 +18842,7 @@
                 </option>
                 <option>
                     <name>CoreVariant</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>59</state>
                 </option>
                 <option>
@@ -18587,7 +18865,7 @@
                 </option>
                 <option>
                     <name>GFPUCoreSlave2</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>59</state>
                 </option>
                 <option>
@@ -18633,6 +18911,11 @@
                 </option>
                 <option>
                     <name>TrustZone</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>TrustZoneModes</name>
+                    <version>0</version>
                     <state>1</state>
                 </option>
             </data>
@@ -18641,16 +18924,14 @@
             <name>ICCARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>34</version>
+                <version>35</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
                     <name>CCDefines</name>
-                    <state>ARM_MATH_ARMV8MML</state>
                     <state>ARM_MATH_MATRIX_CHECK</state>
                     <state>ARM_MATH_ROUNDING</state>
-                    <state>__DSP_PRESENT=1U</state>
-                    <state>__DSP_PRESENT=1U</state>
+                    <state>ARM_MATH_LOOPUNROLL</state>
                 </option>
                 <option>
                     <name>CCPreprocFile</name>
@@ -18895,6 +19176,10 @@
                     <name>IccRTTI2</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OICompilerExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -18951,7 +19236,7 @@
                 </option>
                 <option>
                     <name>ADefines</name>
-                    <state>ARM_MATH_ARMV8MML</state>
+                    <state></state>
                 </option>
                 <option>
                     <name>AList</name>
@@ -19115,7 +19400,7 @@
             <name>ILINK</name>
             <archiveVersion>0</archiveVersion>
             <data>
-                <version>20</version>
+                <version>22</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -19427,6 +19712,14 @@
                     <name>IlinkLocaleSelect</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>IlinkTrustzoneImportLibraryOut</name>
+                    <state>###Unitialized###</state>
+                </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -19466,7 +19759,7 @@
             <name>General</name>
             <archiveVersion>3</archiveVersion>
             <data>
-                <version>30</version>
+                <version>31</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -19521,7 +19814,7 @@
                 </option>
                 <option>
                     <name>OGLastSavedByProductVersion</name>
-                    <state>8.22.1.15696</state>
+                    <state>8.32.3.20186</state>
                 </option>
                 <option>
                     <name>GeneralEnableMisra</name>
@@ -19567,11 +19860,11 @@
                 </option>
                 <option>
                     <name>RTConfigPath2</name>
-                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+                    <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
                 </option>
                 <option>
                     <name>GBECoreSlave</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>59</state>
                 </option>
                 <option>
@@ -19588,7 +19881,7 @@
                 </option>
                 <option>
                     <name>CoreVariant</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>59</state>
                 </option>
                 <option>
@@ -19611,7 +19904,7 @@
                 </option>
                 <option>
                     <name>GFPUCoreSlave2</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>59</state>
                 </option>
                 <option>
@@ -19657,6 +19950,11 @@
                 </option>
                 <option>
                     <name>TrustZone</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>TrustZoneModes</name>
+                    <version>0</version>
                     <state>1</state>
                 </option>
             </data>
@@ -19665,18 +19963,14 @@
             <name>ICCARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>34</version>
+                <version>35</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
                     <name>CCDefines</name>
-                    <state>ARM_MATH_ARMV8MML</state>
                     <state>ARM_MATH_MATRIX_CHECK</state>
                     <state>ARM_MATH_ROUNDING</state>
-                    <state>__DSP_PRESENT=1U</state>
-                    <state>__FPU_PRESENT=1U</state>
-                    <state>__DSP_PRESENT=1U</state>
-                    <state>__FPU_PRESENT=1U</state>
+                    <state>ARM_MATH_LOOPUNROLL</state>
                 </option>
                 <option>
                     <name>CCPreprocFile</name>
@@ -19921,6 +20215,10 @@
                     <name>IccRTTI2</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OICompilerExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -19977,7 +20275,7 @@
                 </option>
                 <option>
                     <name>ADefines</name>
-                    <state>ARM_MATH_ARMV8MML</state>
+                    <state></state>
                 </option>
                 <option>
                     <name>AList</name>
@@ -20141,7 +20439,7 @@
             <name>ILINK</name>
             <archiveVersion>0</archiveVersion>
             <data>
-                <version>20</version>
+                <version>22</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -20453,6 +20751,14 @@
                     <name>IlinkLocaleSelect</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>IlinkTrustzoneImportLibraryOut</name>
+                    <state>###Unitialized###</state>
+                </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -20492,7 +20798,7 @@
             <name>General</name>
             <archiveVersion>3</archiveVersion>
             <data>
-                <version>30</version>
+                <version>31</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -20547,7 +20853,7 @@
                 </option>
                 <option>
                     <name>OGLastSavedByProductVersion</name>
-                    <state>8.22.1.15696</state>
+                    <state>8.32.3.20186</state>
                 </option>
                 <option>
                     <name>GeneralEnableMisra</name>
@@ -20593,11 +20899,11 @@
                 </option>
                 <option>
                     <name>RTConfigPath2</name>
-                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+                    <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
                 </option>
                 <option>
                     <name>GBECoreSlave</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>59</state>
                 </option>
                 <option>
@@ -20614,7 +20920,7 @@
                 </option>
                 <option>
                     <name>CoreVariant</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>59</state>
                 </option>
                 <option>
@@ -20637,7 +20943,7 @@
                 </option>
                 <option>
                     <name>GFPUCoreSlave2</name>
-                    <version>26</version>
+                    <version>27</version>
                     <state>59</state>
                 </option>
                 <option>
@@ -20683,6 +20989,11 @@
                 </option>
                 <option>
                     <name>TrustZone</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>TrustZoneModes</name>
+                    <version>0</version>
                     <state>1</state>
                 </option>
             </data>
@@ -20691,16 +21002,14 @@
             <name>ICCARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>34</version>
+                <version>35</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
                     <name>CCDefines</name>
-                    <state>ARM_MATH_ARMV8MML</state>
                     <state>ARM_MATH_MATRIX_CHECK</state>
                     <state>ARM_MATH_ROUNDING</state>
-                    <state>__DSP_PRESENT=1U</state>
-                    <state>__FPU_PRESENT=1U</state>
+                    <state>ARM_MATH_LOOPUNROLL</state>
                 </option>
                 <option>
                     <name>CCPreprocFile</name>
@@ -20945,6 +21254,10 @@
                     <name>IccRTTI2</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OICompilerExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -21001,7 +21314,7 @@
                 </option>
                 <option>
                     <name>ADefines</name>
-                    <state>ARM_MATH_ARMV8MML</state>
+                    <state></state>
                 </option>
                 <option>
                     <name>AList</name>
@@ -21165,7 +21478,7 @@
             <name>ILINK</name>
             <archiveVersion>0</archiveVersion>
             <data>
-                <version>20</version>
+                <version>22</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>1</debug>
                 <option>
@@ -21477,6 +21790,14 @@
                     <name>IlinkLocaleSelect</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>IlinkTrustzoneImportLibraryOut</name>
+                    <state>###Unitialized###</state>
+                </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -22259,7 +22580,7 @@
             <name>$PROJ_DIR$\..\..\Source\TransformFunctions\arm_bitreversal.c</name>
         </file>
         <file>
-            <name>$PROJ_DIR$\..\..\Source\TransformFunctions\arm_bitreversal2.S</name>
+            <name>$PROJ_DIR$\..\..\Source\TransformFunctions\arm_bitreversal2.c</name>
         </file>
         <file>
             <name>$PROJ_DIR$\..\..\Source\TransformFunctions\arm_cfft_f32.c</name>
diff --git a/DSP/Projects/IAR/arm_cortexM_math_Build.bat b/DSP/Projects/IAR/arm_cortexM_math_Build.bat
new file mode 100644
index 0000000..0afdf65
--- /dev/null
+++ b/DSP/Projects/IAR/arm_cortexM_math_Build.bat
@@ -0,0 +1,106 @@
+@echo off
+
+mkdir Temp
+set TMP=Temp
+set TEMP=Temp
+rem set IAREXE=..\..\..\..\..\common\bin\iarbuild.exe
+set IAREXE=iarbuild.exe
+
+echo.
+echo Building DSP Libraries ARM
+
+echo   Building DSP Library for Cortex-M0 Little Endian
+%IAREXE% arm_cortexM_math.ewp -build cortexM0l
+
+echo   Building DSP Library for Cortex-M3 Little Endian
+%IAREXE% arm_cortexM_math.ewp -build cortexM3l
+
+echo   Building DSP Library for Cortex-M4 Little Endian
+%IAREXE% arm_cortexM_math.ewp -build cortexM4l
+
+echo   Building DSP Library for Cortex-M4 Little Endian with single precision FPU
+%IAREXE% arm_cortexM_math.ewp -build cortexM4lf
+
+echo   Building DSP Library for Cortex-M7 Little Endian
+%IAREXE% arm_cortexM_math.ewp -build cortexM7l
+
+echo   Building DSP Library for Cortex-M7 Little Endian with single precision FPU
+%IAREXE% arm_cortexM_math.ewp -build cortexM7lfsp
+
+echo   Building DSP Library for Cortex-M7 Little Endian with double precision FPU
+%IAREXE% arm_cortexM_math.ewp -build cortexM7lfdp
+
+echo   Building DSP Library for ARMv8-M Baseline Little Endian
+%IAREXE% arm_cortexM_math.ewp -build ARMv8MBLl
+
+echo   Building DSP Library for ARMv8-M Mainline Little Endian
+%IAREXE% arm_cortexM_math.ewp -build ARMv8MMLl
+
+echo   Building DSP Library for ARMv8-M Mainline Little Endian with single precision FPU
+%IAREXE% arm_cortexM_math.ewp -build ARMv8MMLlfsp
+
+echo   Building DSP Library for ARMv8-M Mainline Little Endian with double precision FPU
+%IAREXE% arm_cortexM_math.ewp -build ARMv8MMLlfdp
+
+echo   Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions
+%IAREXE% arm_cortexM_math.ewp -build ARMv8MMLld
+
+echo   Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, single precision FPU
+%IAREXE% arm_cortexM_math.ewp -build ARMv8MMLldfsp
+
+echo   Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, double precision FPU
+%IAREXE% arm_cortexM_math.ewp -build ARMv8MMLldfdp
+
+
+REM big endian libraries
+
+echo   Building DSP Library for Cortex-M0 Big Endian
+%IAREXE% arm_cortexM_math.ewp -build cortexM0b
+
+echo   Building DSP Library for Cortex-M3 Big Endian
+%IAREXE% arm_cortexM_math.ewp -build cortexM3b
+
+echo   Building DSP Library for Cortex-M4 Big Endian
+%IAREXE% arm_cortexM_math.ewp -build cortexM4b
+
+echo   Building DSP Library for Cortex-M4 Big Endian with single precision FPU
+%IAREXE% arm_cortexM_math.ewp -build cortexM4bf
+
+echo   Building DSP Library for Cortex-M7 Big Endian
+%IAREXE% arm_cortexM_math.ewp -build cortexM7b
+
+echo   Building DSP Library for Cortex-M7 Big Endian with single precision FPU
+%IAREXE% arm_cortexM_math.ewp -build cortexM7bfsp
+
+echo   Building DSP Library for Cortex-M7 Big Endian with double precision FPU
+%IAREXE% arm_cortexM_math.ewp -build cortexM7bfdp
+
+echo Copy libs to CMSIS\lib\IAR
+mkdir ..\..\lib\IAR
+copy ReleaseM0BE\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM0LE\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM3BE\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM3LE\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM4BE\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM4BE_FPU\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM4LE\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM4LE_FPU\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM7BE\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM7BE_FPU_DP\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM7BE_FPU_SP\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM7LE\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM7LE_FPU_DP\Exe\*.a ..\..\lib\IAR\ /Y
+copy ReleaseM7LE_FPU_SP\Exe\*.a ..\..\lib\IAR\ /Y
+copy ARMv8MBLl\Exe\*.a ..\..\lib\IAR\ /Y
+copy ARMv8MMLl\Exe\*.a ..\..\lib\IAR\ /Y
+copy ARMv8MMLld\Exe\*.a ..\..\lib\IAR\ /Y
+copy ARMv8MMLldfdp\Exe\*.a ..\..\lib\IAR\ /Y
+copy ARMv8MMLldfsp\Exe\*.a ..\..\lib\IAR\ /Y
+copy ARMv8MMLlfdp\Exe\*.a ..\..\lib\IAR\ /Y
+copy ARMv8MMLlfsp\Exe\*.a ..\..\lib\IAR\ /Y
+
+echo.
+echo   Deleting intermediate files
+for /d %%a in (Temp ARMv8M* ReleaseM*) do rmdir /s /q "%%~a"
+del /Q *.bak
+del /Q *.dep
diff --git a/DSP/PythonWrapper/README.md b/DSP/PythonWrapper/README.md
new file mode 100644
index 0000000..23419fe
--- /dev/null
+++ b/DSP/PythonWrapper/README.md
@@ -0,0 +1,220 @@
+# README
+
+This Python wrapper for CMSIS-DSP is compatible with numpy.
+
+It is a very experimental wrapper with lots of limitations as described in the corresponding section below.
+
+But even with those limitations, it can be very useful to test a CMSIS-DSP implemention of an algorithm with all the power of numpy and scipy.
+
+# How to build and install
+
+## Tested configurations
+
+The building of this package has been tested on Windows with the Python install from python.org and Microsoft Visual 2017. 
+
+It has also been tested with cygwin. In that case, python-devel must be installed too. To run the examples, scipy and matplotlib must also be installed in cygwin.
+
+On Linux, it worked with standard installation.
+
+Other configurations should work but the setup.py file would have to be improved. It is a first version and the build process will have to be improved.
+
+The package is working with Python 2 and 3.
+
+## Building
+
+The build is using a customized arm_math.h in folder cmsisdsp_pkg/src to be able to compile on windows.
+
+As a consequence, if you build on an ARM computer, you won't get the optimizations of the CMSIS library. It is possible to get them by replacing the customized arm_math.h by the official one.
+
+Since the CMSIS-DSP wrapper is using numpy, you must first install it if not already done. So, for instance to install it locally you could do:
+
+    > pip install numpy --user
+
+Once numpy is installed, you can build the CMSIS-DSP python wrapper. Go to folder CMSIS/DSP/PythonWrapper.
+
+Following command will build in place if you have the right compiler and if Python can find it.
+
+    > python setup.py build_ext --inplace
+
+Then, if you launch Python from same directory you'll be able to play with the test scripts. You'll need to install a few additional Python packages to run the examples (scipy and matplotlib). See below.
+
+If you want to install the cmsisdsp package, it is advised to install it into a virtualenv
+
+With Python 3 you could:
+
+Create a folder for this virtual environment. For instance : cmsisdsp_tests
+
+Go to this folder.
+
+Type:
+
+    > python -m venv env
+
+Activate the environment:
+
+    > env\Scripts\activate
+
+Install some packages to be able to run the examples
+
+    > pip install numpy
+    > pip install scipy
+    > pip install matplotlib
+
+Now, you can install the cmsisdsp package in editable mode:
+
+    > pip install -e "Path To The Folder Containing setup.py"
+
+Then you can copy the scripts testdsp.py and example.py and try to run them from this virtual environment. example.y is requiring a data file to be downloaded from the web. See below in this document for the link.
+
+# Usage
+
+You can look at testdsp.py and example.py for some examples.
+
+The idea is to follow as closely as possible the CMSIS-DSP API to ease the migration to the final implementation on a board.
+
+First you need to import the module
+
+    > import cmsisdsp as dsp
+
+If you use numpy:
+
+    > import numpy as np
+
+If you use scipy signal processing functions:
+
+    > from scipy import signal
+
+## Functions with no instance arguments
+
+You can use a CMSIS-DSP function with numpy arrays:
+
+    > r = dsp.arm_add_f32(np.array([1.,2,3]),np.array([4.,5,7]))
+
+The function can also be called more simply with
+
+    > r = dsp.arm_add_f32([1.,2,3],[4.,5,7])
+
+The result of a CMSIS-DSP function will always be a numpy array whatever the arguments were (numpy array or list).
+
+## Functions with instance arguments 
+
+When the CMSIS-DSP function is requiring an instance data structure, it is just a bit more complex to use it:
+
+First you need to create this instance:
+
+    > firf32 = dsp.arm_fir_instance_f32()
+
+Although the initialization function on Python side can also be used to initialize some of the fields of the corresponding instance using named arguments, it is not advised to do so. In CMSIS-DSP there are initialization functions for this and they may do some additional processing.
+
+So, you need to call an init function:
+
+    > dsp.arm_fir_init_f32(firf32,3,[1.,2,3],[0,0,0,0,0,0,0])
+
+The third argument in this function is the state. Since all arguments (except the instance ones) are read-only in this Python API, this state will never be changed ! It is just used to communicate the length of the state array which must be allocated by the init function. This argument is required because it is present in the CMSIS-DSP API and in the final C implementation you'll need to allocate a state array with the right dimension.
+
+Since the goal is to be as close as possible to the C API, the API is forcing the use of this argument.
+
+The only change compared to the C API is that the size variables (like blockSize for filter) are computed automatically from the other arguments. This choice was made to make it a bit easier the use of numpy array with the API.
+
+Now, you can check that the instance was initialized correctly.
+
+    > print(firf32.numTaps())
+
+Then, you can filter with CMSIS-DSP.:
+
+    > print(dsp.arm_fir_f32(firf32,[1,2,3,4,5]))
+
+The size of this signal should be blockSize. blockSize was inferred from the size of the state array : numTaps + blockSize - 1 according to CMSIS-DSP. So here the signal must have 5 samples.
+
+If you want to filter more than 5 samples, then you can just call the function again. The state variable inside firf32 will ensure that it works like in the CMSIS-DSP C code. 
+
+    > print(dsp.arm_fir_f32(firf32,[6,7,8,9,10]))
+
+If you want to compare with scipy it is easy but warning : coefficients for the filter are in opposite order in scipy :
+
+    > filtered_x = signal.lfilter([3,2,1.], 1.0, [1,2,3,4,5,6,7,8,9,10])
+    > print(filtered_x)
+
+The principles are the same for all other APIs.
+
+## FFT 
+
+For Fourier transforms there are no init functions in the CMSIS-DSP for the instance variables. They must be initialized from a C struct. To make it simpler to use them from Python, the wrapper is introducing its own init functions.
+
+Here is an example for using FFT from the Python interface:
+
+Let's define a signal you will use for the FFT.
+
+    > nb = 16
+    > signal = np.cos(2 * np.pi * np.arange(nb) / nb)
+
+The CMSIS-DSP cfft is requiring complex signals with a specific layout in memory.
+
+To remain as close as possible to the C API, we are not using complex numbers in the wrapper. So a complex signal must be converted into a real one. The function imToReal1D is defined in testdsp.py 
+
+    > signalR = imToReal1D(signal)
+
+Then, you create the FFT instance with:
+
+    > cfftf32=dsp.arm_cfft_instance_f32()
+
+You initialize the instance with the init function provided by the wrapper:
+
+    > status=dsp.arm_cfft_init_f32(cfftf32, nb)
+    > print(status)
+
+You compute the FFT of the signal with:
+
+    > resultR = dsp.arm_cfft_f32(cfftf32,signalR,0,1)
+
+You convert back to a complex format to compare with scipy:
+
+    > resultI = realToIm1D(resultR)
+    > print(resultI)
+
+## Matrix 
+
+For matrix, the instance variables are masked by the Python API. We decided that for matrix only there was no use for having the CMSIS-DSP instance visibles since they contain the same information as the numpy array (samples and dimension).
+
+So to use a CMSIS-DSP matrix function, it is very simple:
+
+    > a=np.array([[1.,2,3,4],[5,6,7,8],[9,10,11,12]])
+    > b=np.array([[1.,2,3],[5.1,6,7],[9.1,10,11],[5,8,4]])
+
+Numpy result as reference:
+
+    > print(np.dot(a , b))
+
+CMSIS-DSP result:
+
+    > v=dsp.arm_mat_mult_f32(a,b)
+    > print(v)
+
+In a real C code, a pointer to a data structure for the result v would have to be passed as argument of the function.
+
+## example.py
+
+This example depends on a data file which can be downloaded here:
+
+https://www.physionet.org/pn3/ecgiddb/Person_87/rec_2.dat
+
+This signal was created for a master thesis:
+
+Lugovaya T.S. Biometric human identification based on electrocardiogram. [Master's thesis] Faculty of Computing Technologies and Informatics, Electrotechnical University "LETI", Saint-Petersburg, Russian Federation; June 2005. 
+
+and it is part of the PhysioNet database
+
+Goldberger AL, Amaral LAN, Glass L, Hausdorff JM, Ivanov PCh, Mark RG, Mietus JE, Moody GB, Peng C-K, Stanley HE. PhysioBank, PhysioToolkit, and PhysioNet: Components of a New Research Resource for Complex Physiologic Signals. Circulation 101(23):e215-e220 [Circulation Electronic Pages; http://circ.ahajournals.org/cgi/content/full/101/23/e215]; 2000 (June 13). 
+
+
+# LIMITATIONS
+
+Due to the high number of functions in the CMSIS-DSP, the first version of the wrapper was generated automatically from a custom script.
+
+Only a subset of the functions has been tested.
+
+It is likely that some problems are present. The API is quite regular in CMSIS-DSP but there are a few exceptions and the generation script is not managing all of them.
+
+So, the API may crash due to unallocated variables or wrong data conversions.
+
+The generated C code is a first version for bootstrapping the process. Now that this C file exists, the improvements will be done on the C code rather than on the generation script.
diff --git a/DSP/PythonWrapper/cmsisdsp_pkg/src/cmsismodule.c b/DSP/PythonWrapper/cmsisdsp_pkg/src/cmsismodule.c
new file mode 100644
index 0000000..7bd04d4
--- /dev/null
+++ b/DSP/PythonWrapper/cmsisdsp_pkg/src/cmsismodule.c
@@ -0,0 +1,408 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Python Wrapper
+ * Title:        cmsismodule.c
+ * Description:  C code for the CMSIS-DSP Python wrapper
+ *
+ * $Date:        25. March 2019
+ * $Revision:    V0.0.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#define NPY_NO_DEPRECATED_API NPY_1_15_API_VERSION
+
+#ifdef WIN
+#pragma warning( disable : 4013 ) 
+#pragma warning( disable : 4244 ) 
+#endif
+
+#include <Python.h>
+#define MAX(A,B) (A) < (B) ? (B) : (A)
+
+#define CAT1(A,B) A##B
+#define CAT(A,B) CAT1(A,B)
+
+
+#ifdef CMSISDSP
+#include "arm_math.h"
+#define MODNAME "cmsisdsp"
+#define MODINITNAME cmsisdsp
+#endif 
+
+#include <numpy/arrayobject.h>
+#include <numpy/ndarraytypes.h>
+
+#if PY_MAJOR_VERSION >= 3
+#define IS_PY3K
+#endif
+
+struct module_state {
+    PyObject *error;
+};
+
+#if PY_MAJOR_VERSION >= 3
+#define GETSTATE(m) ((struct module_state*)PyModule_GetState(m))
+#else
+#define GETSTATE(m) (&_state)
+static struct module_state _state;
+#endif
+
+static PyObject *
+error_out(PyObject *m) {
+    struct module_state *st = GETSTATE(m);
+    PyErr_SetString(st->error, "something bad happened");
+    return NULL;
+}
+
+#define MLTYPE(name,thenewfunc,deallocfunc,initfunc,methods)\
+static PyTypeObject ml_##name##Type = {          \
+    PyVarObject_HEAD_INIT(NULL, 0)               \
+    .tp_name=MODNAME".##name",                   \
+    .tp_basicsize = sizeof(ml_##name##Object),   \
+    .tp_itemsize = 0,                            \
+    .tp_dealloc = (destructor)deallocfunc,       \
+    .tp_flags =  Py_TPFLAGS_DEFAULT,           \
+    .tp_doc = #name,                             \
+    .tp_init = (initproc)initfunc,               \
+    .tp_new = (newfunc)thenewfunc,                \
+    .tp_methods = methods  \
+   };
+
+
+#define MEMCPY(DST,SRC,NB,FORMAT) \
+for(memCpyIndex = 0; memCpyIndex < (NB) ; memCpyIndex++)\
+{                                \
+  (DST)[memCpyIndex] = (FORMAT)(SRC)[memCpyIndex];       \
+}
+
+#define GETFIELD(NAME,FIELD,FORMAT)                                           \
+static PyObject *                                                             \
+Method_##NAME##_##FIELD(ml_##NAME##Object *self, PyObject *ignored)\
+{                                                                             \
+    return(Py_BuildValue(FORMAT,self->instance->FIELD));                      \
+}                                                                             
+    
+#define GETFIELDARRAY(NAME,FIELD,FORMAT)                                           \
+static PyObject *                                                             \
+Method_##NAME##_##FIELD(ml_##NAME##Object *self, PyObject *ignored)\
+{                                                                             \
+    return(specific_##NAME##_##FIELD(self->instance));                      \
+}  
+
+#define INITARRAYFIELD(FIELD,FORMAT,SRCFORMAT,DSTFORMAT)                         \
+    if (FIELD)                                                                \
+    {                                                                         \
+       PyArray_Descr *desct=PyArray_DescrFromType(FORMAT);                    \
+       PyArrayObject *FIELD##c = (PyArrayObject *)PyArray_FromAny(FIELD,desct,\
+        1,0,NPY_ARRAY_C_CONTIGUOUS | NPY_ARRAY_ALIGNED | NPY_ARRAY_FORCECAST, \
+        NULL);                                                                \
+       if (FIELD##c)                                                          \
+       {                                                                      \
+           uint32_t memCpyIndex; \
+           SRCFORMAT *f=(SRCFORMAT*)PyArray_DATA(FIELD##c);                   \
+           uint32_t n = PyArray_SIZE(FIELD##c);                               \
+           self->instance->FIELD =PyMem_Malloc(sizeof(DSTFORMAT)*n);                \
+           MEMCPY(self->instance->FIELD ,f,n,DSTFORMAT);                      \
+           Py_DECREF(FIELD##c);                                               \
+       }                                                                      \
+    }
+#define GETCARRAY(PYVAR,CVAR,FORMAT,SRCFORMAT,DSTFORMAT)                                \
+    if (PYVAR)                                                                \
+    {                                                                         \
+       PyArray_Descr *desct=PyArray_DescrFromType(FORMAT);                    \
+       PyArrayObject *PYVAR##c = (PyArrayObject *)PyArray_FromAny(PYVAR,desct,\
+        1,0,NPY_ARRAY_C_CONTIGUOUS | NPY_ARRAY_ALIGNED | NPY_ARRAY_FORCECAST, \
+        NULL);                                                                \
+       if (PYVAR##c)                                                          \
+       {                                                                      \
+           uint32_t memCpyIndex; \
+           SRCFORMAT *f=(SRCFORMAT*)PyArray_DATA(PYVAR##c);                         \
+           uint32_t n = PyArray_SIZE(PYVAR##c);                               \
+           CVAR =PyMem_Malloc(sizeof(DSTFORMAT)*n);                                 \
+           MEMCPY(CVAR ,f,n,DSTFORMAT);                               \
+           Py_DECREF(PYVAR##c);                                               \
+       }                                                                      \
+    }
+
+#define GETARGUMENT(FIELD,FORMAT,SRCFORMAT,DSTFORMAT)                          \
+    uint32_t arraySize##FIELD=0;                                               \
+    if (FIELD)                                                                 \
+    {                                                                          \
+       PyArray_Descr *desct=PyArray_DescrFromType(FORMAT);                     \
+       PyArrayObject *FIELD##c = (PyArrayObject *)PyArray_FromAny(FIELD,desct, \
+        1,0,NPY_ARRAY_C_CONTIGUOUS | NPY_ARRAY_ALIGNED | NPY_ARRAY_FORCECAST,  \
+        NULL);                                                                 \
+       if (FIELD##c)                                                           \
+       {                                                                       \
+           uint32_t memCpyIndex; \
+           SRCFORMAT *f=(SRCFORMAT*)PyArray_DATA(FIELD##c);                    \
+           arraySize##FIELD = PyArray_SIZE(FIELD##c);                          \
+           FIELD##_converted =PyMem_Malloc(sizeof(DSTFORMAT)*arraySize##FIELD);\
+           MEMCPY(FIELD##_converted ,f,arraySize##FIELD,DSTFORMAT);            \
+           Py_DECREF(FIELD##c);                                                \
+       }                                                                       \
+    }
+
+#define FREEARGUMENT(FIELD) \
+    PyMem_Free(FIELD)
+
+#ifdef IS_PY3K
+#define ADDTYPE(name)                                               \
+    if (PyType_Ready(&ml_##name##Type) < 0)                         \
+        return;                                              \
+                                                                    \
+    Py_INCREF(&ml_##name##Type);                                    \
+    PyModule_AddObject(module, #name, (PyObject *)&ml_##name##Type);
+#else
+#define ADDTYPE(name)                                               \
+    if (PyType_Ready(&ml_##name##Type) < 0)                         \
+        return;                                                     \
+                                                                    \
+    Py_INCREF(&ml_##name##Type);                                    \
+    PyModule_AddObject(module, #name, (PyObject *)&ml_##name##Type);
+#endif
+
+#define FLOATARRAY2(OBJ,NB1,NB2,DATA)                                      \
+    npy_intp dims[2];                                                  \
+    dims[0]=NB1;                                                       \
+    dims[1]=NB2;                                                       \
+    const int ND=2;                                                    \
+    PyObject *OBJ=PyArray_SimpleNewFromData(ND, dims, NPY_FLOAT, DATA);
+
+#define FLOATARRAY1(OBJ,NB1,DATA)                                          \
+    npy_intp dims[1];                                                  \
+    dims[0]=NB1;                                                       \
+    const int ND=1;                                                    \
+    PyObject *OBJ=PyArray_SimpleNewFromData(ND, dims, NPY_FLOAT, DATA);
+
+#define FLOAT64ARRAY1(OBJ,NB1,DATA)                                          \
+    npy_intp dims[1];                                                  \
+    dims[0]=NB1;                                                       \
+    const int ND=1;                                                    \
+    PyObject *OBJ=PyArray_SimpleNewFromData(ND, dims, NPY_DOUBLE, DATA);
+
+#define UINT32ARRAY1(OBJ,NB1,DATA)                                          \
+    npy_intp dims[1];                                                   \
+    dims[0]=NB1;                                                        \
+    const int ND=1;                                                     \
+    PyObject *OBJ=PyArray_SimpleNewFromData(ND, dims, NPY_UINT32, DATA);
+
+#define INT32ARRAY1(OBJ,NB1,DATA)                                          \
+    npy_intp dims[1];                                                   \
+    dims[0]=NB1;                                                        \
+    const int ND=1;                                                     \
+    PyObject *OBJ=PyArray_SimpleNewFromData(ND, dims, NPY_INT32, DATA);
+
+#define INT16ARRAY1(OBJ,NB1,DATA)                                          \
+    npy_intp dims[1];                                                   \
+    dims[0]=NB1;                                                        \
+    const int ND=1;                                                     \
+    PyObject *OBJ=PyArray_SimpleNewFromData(ND, dims, NPY_INT16, DATA);
+
+#define INT8ARRAY1(OBJ,NB1,DATA)                                          \
+    npy_intp dims[1];                                                   \
+    dims[0]=NB1;                                                        \
+    const int ND=1;                                                     \
+    PyObject *OBJ=PyArray_SimpleNewFromData(ND, dims, NPY_BYTE, DATA);
+
+
+#define MATRIXFROMNUMPY(EXT,TYP,SRCTYPE,NUMPYTYPE)                                   \
+arm_matrix_instance_##EXT *EXT##MatrixFromNumpy(PyObject *o)                   \
+{                                                                            \
+    arm_matrix_instance_##EXT *s;                                              \
+                                                                             \
+    s=PyMem_Malloc(sizeof(arm_matrix_instance_##EXT));                               \
+    s->pData=NULL;                                                           \
+    s->numRows=0;                                                            \
+    s->numCols=0;                                                            \
+                                                                             \
+    PyArray_Descr *desct=PyArray_DescrFromType(NUMPYTYPE);                    \
+    PyArrayObject *cdata = (PyArrayObject *)PyArray_FromAny(o,desct,         \
+        1,0,NPY_ARRAY_C_CONTIGUOUS | NPY_ARRAY_ALIGNED | NPY_ARRAY_FORCECAST, \
+        NULL);                                                                \
+    if (cdata)                                                               \
+    {                                                                        \
+           uint32_t memCpyIndex;                                             \
+           SRCTYPE *f=(SRCTYPE*)PyArray_DATA(cdata);                           \
+           s->numRows=PyArray_DIM(cdata,0);                                  \
+           s->numCols=PyArray_DIM(cdata,1);                                  \
+           uint32_t nb = PyArray_SIZE(cdata);                                \
+           s->pData = PyMem_Malloc(sizeof(TYP)*nb);                                \
+           MEMCPY(s->pData ,f,nb,TYP);                                       \
+           Py_DECREF(cdata);                                                 \
+    }                                                                        \
+                                                                             \
+                                                                             \
+    return(s);                                                               \
+                                                                             \
+}
+
+MATRIXFROMNUMPY(f32,float32_t,double,NPY_DOUBLE);
+MATRIXFROMNUMPY(f64,float64_t,double,NPY_DOUBLE);
+MATRIXFROMNUMPY(q31,q31_t,int32_t,NPY_INT32);
+MATRIXFROMNUMPY(q15,q15_t,int16_t,NPY_INT16);
+
+#define CREATEMATRIX(EXT,TYP)                                        \
+arm_matrix_instance_##EXT *create##EXT##Matrix(uint32_t r,uint32_t c)\
+{                                                                    \
+    arm_matrix_instance_##EXT *s;                                      \
+                                                                     \
+    s=PyMem_Malloc(sizeof(arm_matrix_instance_##EXT));                     \
+    s->pData=PyMem_Malloc(sizeof(TYP)*r*c);                                \
+    s->numRows=r;                                                    \
+    s->numCols=c;                                                    \
+    return(s);                                                       \
+}
+
+CREATEMATRIX(f32,float32_t);
+CREATEMATRIX(f64,float64_t);
+CREATEMATRIX(q31,q31_t);
+CREATEMATRIX(q15,q15_t);
+
+#define NUMPYARRAYFROMMATRIX(EXT,NUMPYTYPE_FROMC)                                  \
+PyObject *NumpyArrayFrom##EXT##Matrix(arm_matrix_instance_##EXT *mat)              \
+{                                                                                  \
+    npy_intp dims[2];                                                              \
+    dims[0]=mat->numRows;                                                          \
+    dims[1]=mat->numCols;                                                          \
+    const int ND=2;                                                                \
+    PyObject *OBJ=PyArray_SimpleNewFromData(ND, dims, NUMPYTYPE_FROMC, mat->pData);\
+    return(OBJ);                                                                   \
+}
+
+NUMPYARRAYFROMMATRIX(f32,NPY_FLOAT);
+NUMPYARRAYFROMMATRIX(f64,NPY_DOUBLE);
+NUMPYARRAYFROMMATRIX(q31,NPY_INT32);
+NUMPYARRAYFROMMATRIX(q15,NPY_INT16);
+
+//#include "specific.h"
+#include "cmsismodule.h"
+
+#if 0
+static PyObject *cmsisml_test(PyObject *obj, PyObject *args)
+{
+    ml_arm_svm_linear_instance_f32Object *self=NULL;
+    PyObject *svm, *vector=NULL;
+
+    if (!PyArg_ParseTuple(args, "OO", &svm,&vector))
+        return NULL;
+
+    self=(ml_arm_svm_linear_instance_f32Object*)svm;
+    if (self)
+    {
+        if (self->instance)
+        {
+            int result;
+            float32_t *input=NULL;
+            GETCARRAY(vector,input,NPY_DOUBLE,double,float32_t);
+            
+            arm_svm_linear_predict_f32(self->instance,input,&result);
+            /*
+            printf("Dual\n");
+            for(int i = 0 ; i < self->instance->nbOfSupportVectors ; i++)
+            {
+                printf("%f\n",self->instance->dualCoefficients[i]);
+            }
+            printf("Vectors\n");
+            int k=0;
+            for(int i = 0 ; i < self->instance->nbOfSupportVectors ; i++)
+            {
+                printf("Vector %d\n",i);
+                for(int j = 0 ; j < self->instance->vectorDimension ; j++)
+                {
+                    printf("%f\n",self->instance->supportVectors[k]);
+                    k++;
+                }
+            }
+            printf("Classes\n");
+            for(int i = 0 ; i < 2 ; i++)
+            {
+                printf("%d\n",self->instance->classes[i]);
+            }
+            printf("Intercept %f\n",self->instance->intercept);
+*/
+            PyMem_Free(input);
+            return(Py_BuildValue("i",result));
+        }
+    }
+    return(Py_BuildValue("i",-1));
+}
+#endif
+
+#ifdef IS_PY3K
+static int cmsisml_traverse(PyObject *m, visitproc visit, void *arg) {
+    Py_VISIT(GETSTATE(m)->error);
+    return 0;
+}
+
+static int cmsisml_clear(PyObject *m) {
+    Py_CLEAR(GETSTATE(m)->error);
+    return 0;
+}
+
+
+static struct PyModuleDef moduledef = {
+        PyModuleDef_HEAD_INIT,
+        MODNAME,
+        NULL,
+        sizeof(struct module_state),
+        CMSISMLMethods,
+        NULL,
+        cmsisml_traverse,
+        cmsisml_clear,
+        NULL
+};
+
+#define INITERROR return NULL
+
+PyMODINIT_FUNC
+CAT(PyInit_,MODINITNAME)(void)
+
+
+#else
+#define INITERROR return
+
+void CAT(init,MODINITNAME)(void)
+#endif
+{
+    import_array();
+
+  #ifdef IS_PY3K
+    PyObject *module = PyModule_Create(&moduledef);
+  #else
+    PyObject *module = Py_InitModule(MODNAME, CMSISMLMethods);
+  #endif
+
+  if (module == NULL)
+      INITERROR;
+  struct module_state *st = GETSTATE(module);
+  
+  st->error = PyErr_NewException(MODNAME".Error", NULL, NULL);
+  if (st->error == NULL) {
+      Py_DECREF(module);
+      INITERROR;
+  }
+
+
+  typeRegistration(module);
+
+  #ifdef IS_PY3K
+    return module;
+  #endif
+}
\ No newline at end of file
diff --git a/DSP/PythonWrapper/cmsisdsp_pkg/src/cmsismodule.h b/DSP/PythonWrapper/cmsisdsp_pkg/src/cmsismodule.h
new file mode 100644
index 0000000..c7c7943
--- /dev/null
+++ b/DSP/PythonWrapper/cmsisdsp_pkg/src/cmsismodule.h
@@ -0,0 +1,15360 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Python Wrapper
+ * Title:        cmsismodule.h
+ * Description:  Automatically generated C code for the CMSIS-DSP Python wrapper
+ *
+ * $Date:        25. March 2019
+ * $Revision:    V0.0.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+typedef struct {
+    PyObject_HEAD
+    arm_fir_instance_q7 *instance;
+} ml_arm_fir_instance_q7Object;
+
+
+static void
+arm_fir_instance_q7_dealloc(ml_arm_fir_instance_q7Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_fir_instance_q7_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_fir_instance_q7Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_fir_instance_q7Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_fir_instance_q7));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_fir_instance_q7_init(ml_arm_fir_instance_q7Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+char *kwlist[] = {
+"numTaps",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|h", kwlist,&self->instance->numTaps
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_fir_instance_q7,numTaps,"h");
+
+
+static PyMethodDef arm_fir_instance_q7_methods[] = {
+
+    {"numTaps", (PyCFunction) Method_arm_fir_instance_q7_numTaps,METH_NOARGS,"numTaps"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_fir_instance_q7,arm_fir_instance_q7_new,arm_fir_instance_q7_dealloc,arm_fir_instance_q7_init,arm_fir_instance_q7_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_fir_instance_q15 *instance;
+} ml_arm_fir_instance_q15Object;
+
+
+static void
+arm_fir_instance_q15_dealloc(ml_arm_fir_instance_q15Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_fir_instance_q15_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_fir_instance_q15Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_fir_instance_q15Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_fir_instance_q15));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_fir_instance_q15_init(ml_arm_fir_instance_q15Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+char *kwlist[] = {
+"numTaps",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|h", kwlist,&self->instance->numTaps
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_fir_instance_q15,numTaps,"h");
+
+
+static PyMethodDef arm_fir_instance_q15_methods[] = {
+
+    {"numTaps", (PyCFunction) Method_arm_fir_instance_q15_numTaps,METH_NOARGS,"numTaps"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_fir_instance_q15,arm_fir_instance_q15_new,arm_fir_instance_q15_dealloc,arm_fir_instance_q15_init,arm_fir_instance_q15_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_fir_instance_q31 *instance;
+} ml_arm_fir_instance_q31Object;
+
+
+static void
+arm_fir_instance_q31_dealloc(ml_arm_fir_instance_q31Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_fir_instance_q31_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_fir_instance_q31Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_fir_instance_q31Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_fir_instance_q31));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_fir_instance_q31_init(ml_arm_fir_instance_q31Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+char *kwlist[] = {
+"numTaps",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|h", kwlist,&self->instance->numTaps
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_fir_instance_q31,numTaps,"h");
+
+
+static PyMethodDef arm_fir_instance_q31_methods[] = {
+
+    {"numTaps", (PyCFunction) Method_arm_fir_instance_q31_numTaps,METH_NOARGS,"numTaps"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_fir_instance_q31,arm_fir_instance_q31_new,arm_fir_instance_q31_dealloc,arm_fir_instance_q31_init,arm_fir_instance_q31_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_fir_instance_f32 *instance;
+} ml_arm_fir_instance_f32Object;
+
+
+static void
+arm_fir_instance_f32_dealloc(ml_arm_fir_instance_f32Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_fir_instance_f32_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_fir_instance_f32Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_fir_instance_f32Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_fir_instance_f32));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_fir_instance_f32_init(ml_arm_fir_instance_f32Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+char *kwlist[] = {
+"numTaps",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|h", kwlist,&self->instance->numTaps
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_fir_instance_f32,numTaps,"h");
+
+
+static PyMethodDef arm_fir_instance_f32_methods[] = {
+
+    {"numTaps", (PyCFunction) Method_arm_fir_instance_f32_numTaps,METH_NOARGS,"numTaps"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_fir_instance_f32,arm_fir_instance_f32_new,arm_fir_instance_f32_dealloc,arm_fir_instance_f32_init,arm_fir_instance_f32_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_biquad_casd_df1_inst_q15 *instance;
+} ml_arm_biquad_casd_df1_inst_q15Object;
+
+
+static void
+arm_biquad_casd_df1_inst_q15_dealloc(ml_arm_biquad_casd_df1_inst_q15Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_biquad_casd_df1_inst_q15_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_biquad_casd_df1_inst_q15Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_biquad_casd_df1_inst_q15Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_biquad_casd_df1_inst_q15));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_biquad_casd_df1_inst_q15_init(ml_arm_biquad_casd_df1_inst_q15Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+char *kwlist[] = {
+"numStages","postShift",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|ii", kwlist,&self->instance->numStages
+,&self->instance->postShift
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_biquad_casd_df1_inst_q15,numStages,"i");
+GETFIELD(arm_biquad_casd_df1_inst_q15,postShift,"i");
+
+
+static PyMethodDef arm_biquad_casd_df1_inst_q15_methods[] = {
+
+    {"numStages", (PyCFunction) Method_arm_biquad_casd_df1_inst_q15_numStages,METH_NOARGS,"numStages"},
+    {"postShift", (PyCFunction) Method_arm_biquad_casd_df1_inst_q15_postShift,METH_NOARGS,"postShift"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_biquad_casd_df1_inst_q15,arm_biquad_casd_df1_inst_q15_new,arm_biquad_casd_df1_inst_q15_dealloc,arm_biquad_casd_df1_inst_q15_init,arm_biquad_casd_df1_inst_q15_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_biquad_casd_df1_inst_q31 *instance;
+} ml_arm_biquad_casd_df1_inst_q31Object;
+
+
+static void
+arm_biquad_casd_df1_inst_q31_dealloc(ml_arm_biquad_casd_df1_inst_q31Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_biquad_casd_df1_inst_q31_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_biquad_casd_df1_inst_q31Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_biquad_casd_df1_inst_q31Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_biquad_casd_df1_inst_q31));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_biquad_casd_df1_inst_q31_init(ml_arm_biquad_casd_df1_inst_q31Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+char *kwlist[] = {
+"numStages","postShift",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|ii", kwlist,&self->instance->numStages
+,&self->instance->postShift
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_biquad_casd_df1_inst_q31,numStages,"i");
+GETFIELD(arm_biquad_casd_df1_inst_q31,postShift,"i");
+
+
+static PyMethodDef arm_biquad_casd_df1_inst_q31_methods[] = {
+
+    {"numStages", (PyCFunction) Method_arm_biquad_casd_df1_inst_q31_numStages,METH_NOARGS,"numStages"},
+    {"postShift", (PyCFunction) Method_arm_biquad_casd_df1_inst_q31_postShift,METH_NOARGS,"postShift"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_biquad_casd_df1_inst_q31,arm_biquad_casd_df1_inst_q31_new,arm_biquad_casd_df1_inst_q31_dealloc,arm_biquad_casd_df1_inst_q31_init,arm_biquad_casd_df1_inst_q31_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_biquad_casd_df1_inst_f32 *instance;
+} ml_arm_biquad_casd_df1_inst_f32Object;
+
+
+static void
+arm_biquad_casd_df1_inst_f32_dealloc(ml_arm_biquad_casd_df1_inst_f32Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_biquad_casd_df1_inst_f32_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_biquad_casd_df1_inst_f32Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_biquad_casd_df1_inst_f32Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_biquad_casd_df1_inst_f32));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_biquad_casd_df1_inst_f32_init(ml_arm_biquad_casd_df1_inst_f32Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+char *kwlist[] = {
+"numStages",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|i", kwlist,&self->instance->numStages
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_biquad_casd_df1_inst_f32,numStages,"i");
+
+
+static PyMethodDef arm_biquad_casd_df1_inst_f32_methods[] = {
+
+    {"numStages", (PyCFunction) Method_arm_biquad_casd_df1_inst_f32_numStages,METH_NOARGS,"numStages"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_biquad_casd_df1_inst_f32,arm_biquad_casd_df1_inst_f32_new,arm_biquad_casd_df1_inst_f32_dealloc,arm_biquad_casd_df1_inst_f32_init,arm_biquad_casd_df1_inst_f32_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_matrix_instance_f32 *instance;
+} ml_arm_matrix_instance_f32Object;
+
+
+static void
+arm_matrix_instance_f32_dealloc(ml_arm_matrix_instance_f32Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pData)
+       {
+          PyMem_Free(self->instance->pData);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_matrix_instance_f32_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_matrix_instance_f32Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_matrix_instance_f32Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_matrix_instance_f32));
+
+        self->instance->pData = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_matrix_instance_f32_init(ml_arm_matrix_instance_f32Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pData=NULL;
+char *kwlist[] = {
+"numRows","numCols","pData",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hhO", kwlist,&self->instance->numRows
+,&self->instance->numCols
+,&pData
+))
+    {
+
+    INITARRAYFIELD(pData,NPY_DOUBLE,double,float32_t);
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_matrix_instance_f32,numRows,"h");
+GETFIELD(arm_matrix_instance_f32,numCols,"h");
+
+
+static PyMethodDef arm_matrix_instance_f32_methods[] = {
+
+    {"numRows", (PyCFunction) Method_arm_matrix_instance_f32_numRows,METH_NOARGS,"numRows"},
+    {"numCols", (PyCFunction) Method_arm_matrix_instance_f32_numCols,METH_NOARGS,"numCols"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_matrix_instance_f32,arm_matrix_instance_f32_new,arm_matrix_instance_f32_dealloc,arm_matrix_instance_f32_init,arm_matrix_instance_f32_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_matrix_instance_f64 *instance;
+} ml_arm_matrix_instance_f64Object;
+
+
+static void
+arm_matrix_instance_f64_dealloc(ml_arm_matrix_instance_f64Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pData)
+       {
+          PyMem_Free(self->instance->pData);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_matrix_instance_f64_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_matrix_instance_f64Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_matrix_instance_f64Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_matrix_instance_f64));
+
+        self->instance->pData = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_matrix_instance_f64_init(ml_arm_matrix_instance_f64Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pData=NULL;
+char *kwlist[] = {
+"numRows","numCols","pData",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hhO", kwlist,&self->instance->numRows
+,&self->instance->numCols
+,&pData
+))
+    {
+
+    INITARRAYFIELD(pData,NPY_FLOAT64,float64_t,float64_t);
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_matrix_instance_f64,numRows,"h");
+GETFIELD(arm_matrix_instance_f64,numCols,"h");
+
+
+static PyMethodDef arm_matrix_instance_f64_methods[] = {
+
+    {"numRows", (PyCFunction) Method_arm_matrix_instance_f64_numRows,METH_NOARGS,"numRows"},
+    {"numCols", (PyCFunction) Method_arm_matrix_instance_f64_numCols,METH_NOARGS,"numCols"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_matrix_instance_f64,arm_matrix_instance_f64_new,arm_matrix_instance_f64_dealloc,arm_matrix_instance_f64_init,arm_matrix_instance_f64_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_matrix_instance_q15 *instance;
+} ml_arm_matrix_instance_q15Object;
+
+
+static void
+arm_matrix_instance_q15_dealloc(ml_arm_matrix_instance_q15Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pData)
+       {
+          PyMem_Free(self->instance->pData);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_matrix_instance_q15_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_matrix_instance_q15Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_matrix_instance_q15Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_matrix_instance_q15));
+
+        self->instance->pData = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_matrix_instance_q15_init(ml_arm_matrix_instance_q15Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pData=NULL;
+char *kwlist[] = {
+"numRows","numCols","pData",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hhO", kwlist,&self->instance->numRows
+,&self->instance->numCols
+,&pData
+))
+    {
+
+    INITARRAYFIELD(pData,NPY_INT16,int16_t,int16_t);
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_matrix_instance_q15,numRows,"h");
+GETFIELD(arm_matrix_instance_q15,numCols,"h");
+
+
+static PyMethodDef arm_matrix_instance_q15_methods[] = {
+
+    {"numRows", (PyCFunction) Method_arm_matrix_instance_q15_numRows,METH_NOARGS,"numRows"},
+    {"numCols", (PyCFunction) Method_arm_matrix_instance_q15_numCols,METH_NOARGS,"numCols"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_matrix_instance_q15,arm_matrix_instance_q15_new,arm_matrix_instance_q15_dealloc,arm_matrix_instance_q15_init,arm_matrix_instance_q15_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_matrix_instance_q31 *instance;
+} ml_arm_matrix_instance_q31Object;
+
+
+static void
+arm_matrix_instance_q31_dealloc(ml_arm_matrix_instance_q31Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pData)
+       {
+          PyMem_Free(self->instance->pData);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_matrix_instance_q31_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_matrix_instance_q31Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_matrix_instance_q31Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_matrix_instance_q31));
+
+        self->instance->pData = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_matrix_instance_q31_init(ml_arm_matrix_instance_q31Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pData=NULL;
+char *kwlist[] = {
+"numRows","numCols","pData",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hhO", kwlist,&self->instance->numRows
+,&self->instance->numCols
+,&pData
+))
+    {
+
+    INITARRAYFIELD(pData,NPY_INT32,int32_t,int32_t);
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_matrix_instance_q31,numRows,"h");
+GETFIELD(arm_matrix_instance_q31,numCols,"h");
+
+
+static PyMethodDef arm_matrix_instance_q31_methods[] = {
+
+    {"numRows", (PyCFunction) Method_arm_matrix_instance_q31_numRows,METH_NOARGS,"numRows"},
+    {"numCols", (PyCFunction) Method_arm_matrix_instance_q31_numCols,METH_NOARGS,"numCols"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_matrix_instance_q31,arm_matrix_instance_q31_new,arm_matrix_instance_q31_dealloc,arm_matrix_instance_q31_init,arm_matrix_instance_q31_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_pid_instance_q15 *instance;
+} ml_arm_pid_instance_q15Object;
+
+
+static void
+arm_pid_instance_q15_dealloc(ml_arm_pid_instance_q15Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_pid_instance_q15_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_pid_instance_q15Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_pid_instance_q15Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_pid_instance_q15));
+
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_pid_instance_q15_init(ml_arm_pid_instance_q15Object *self, PyObject *args, PyObject *kwds)
+{
+
+char *kwlist[] = {
+"A0","A1","A2","state","Kp","Ki","Kd",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hhhhhhh", kwlist,&self->instance->A0
+,&self->instance->A1
+,&self->instance->A2
+,&self->instance->state
+,&self->instance->Kp
+,&self->instance->Ki
+,&self->instance->Kd
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_pid_instance_q15,A0,"h");
+GETFIELD(arm_pid_instance_q15,A1,"h");
+GETFIELD(arm_pid_instance_q15,A2,"h");
+GETFIELD(arm_pid_instance_q15,state,"h");
+GETFIELD(arm_pid_instance_q15,Kp,"h");
+GETFIELD(arm_pid_instance_q15,Ki,"h");
+GETFIELD(arm_pid_instance_q15,Kd,"h");
+
+
+static PyMethodDef arm_pid_instance_q15_methods[] = {
+
+    {"A0", (PyCFunction) Method_arm_pid_instance_q15_A0,METH_NOARGS,"A0"},
+    {"A1", (PyCFunction) Method_arm_pid_instance_q15_A1,METH_NOARGS,"A1"},
+    {"A2", (PyCFunction) Method_arm_pid_instance_q15_A2,METH_NOARGS,"A2"},
+    {"state", (PyCFunction) Method_arm_pid_instance_q15_state,METH_NOARGS,"state"},
+    {"Kp", (PyCFunction) Method_arm_pid_instance_q15_Kp,METH_NOARGS,"Kp"},
+    {"Ki", (PyCFunction) Method_arm_pid_instance_q15_Ki,METH_NOARGS,"Ki"},
+    {"Kd", (PyCFunction) Method_arm_pid_instance_q15_Kd,METH_NOARGS,"Kd"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_pid_instance_q15,arm_pid_instance_q15_new,arm_pid_instance_q15_dealloc,arm_pid_instance_q15_init,arm_pid_instance_q15_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_pid_instance_q31 *instance;
+} ml_arm_pid_instance_q31Object;
+
+
+static void
+arm_pid_instance_q31_dealloc(ml_arm_pid_instance_q31Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_pid_instance_q31_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_pid_instance_q31Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_pid_instance_q31Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_pid_instance_q31));
+
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_pid_instance_q31_init(ml_arm_pid_instance_q31Object *self, PyObject *args, PyObject *kwds)
+{
+
+char *kwlist[] = {
+"A0","A1","A2","state","Kp","Ki","Kd",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|iiiiiii", kwlist,&self->instance->A0
+,&self->instance->A1
+,&self->instance->A2
+,&self->instance->state
+,&self->instance->Kp
+,&self->instance->Ki
+,&self->instance->Kd
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_pid_instance_q31,A0,"i");
+GETFIELD(arm_pid_instance_q31,A1,"i");
+GETFIELD(arm_pid_instance_q31,A2,"i");
+GETFIELD(arm_pid_instance_q31,state,"i");
+GETFIELD(arm_pid_instance_q31,Kp,"i");
+GETFIELD(arm_pid_instance_q31,Ki,"i");
+GETFIELD(arm_pid_instance_q31,Kd,"i");
+
+
+static PyMethodDef arm_pid_instance_q31_methods[] = {
+
+    {"A0", (PyCFunction) Method_arm_pid_instance_q31_A0,METH_NOARGS,"A0"},
+    {"A1", (PyCFunction) Method_arm_pid_instance_q31_A1,METH_NOARGS,"A1"},
+    {"A2", (PyCFunction) Method_arm_pid_instance_q31_A2,METH_NOARGS,"A2"},
+    {"state", (PyCFunction) Method_arm_pid_instance_q31_state,METH_NOARGS,"state"},
+    {"Kp", (PyCFunction) Method_arm_pid_instance_q31_Kp,METH_NOARGS,"Kp"},
+    {"Ki", (PyCFunction) Method_arm_pid_instance_q31_Ki,METH_NOARGS,"Ki"},
+    {"Kd", (PyCFunction) Method_arm_pid_instance_q31_Kd,METH_NOARGS,"Kd"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_pid_instance_q31,arm_pid_instance_q31_new,arm_pid_instance_q31_dealloc,arm_pid_instance_q31_init,arm_pid_instance_q31_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_pid_instance_f32 *instance;
+} ml_arm_pid_instance_f32Object;
+
+
+static void
+arm_pid_instance_f32_dealloc(ml_arm_pid_instance_f32Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_pid_instance_f32_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_pid_instance_f32Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_pid_instance_f32Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_pid_instance_f32));
+
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_pid_instance_f32_init(ml_arm_pid_instance_f32Object *self, PyObject *args, PyObject *kwds)
+{
+
+char *kwlist[] = {
+"A0","A1","A2","state","Kp","Ki","Kd",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|fffffff", kwlist,&self->instance->A0
+,&self->instance->A1
+,&self->instance->A2
+,&self->instance->state
+,&self->instance->Kp
+,&self->instance->Ki
+,&self->instance->Kd
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_pid_instance_f32,A0,"f");
+GETFIELD(arm_pid_instance_f32,A1,"f");
+GETFIELD(arm_pid_instance_f32,A2,"f");
+GETFIELD(arm_pid_instance_f32,state,"f");
+GETFIELD(arm_pid_instance_f32,Kp,"f");
+GETFIELD(arm_pid_instance_f32,Ki,"f");
+GETFIELD(arm_pid_instance_f32,Kd,"f");
+
+
+static PyMethodDef arm_pid_instance_f32_methods[] = {
+
+    {"A0", (PyCFunction) Method_arm_pid_instance_f32_A0,METH_NOARGS,"A0"},
+    {"A1", (PyCFunction) Method_arm_pid_instance_f32_A1,METH_NOARGS,"A1"},
+    {"A2", (PyCFunction) Method_arm_pid_instance_f32_A2,METH_NOARGS,"A2"},
+    {"state", (PyCFunction) Method_arm_pid_instance_f32_state,METH_NOARGS,"state"},
+    {"Kp", (PyCFunction) Method_arm_pid_instance_f32_Kp,METH_NOARGS,"Kp"},
+    {"Ki", (PyCFunction) Method_arm_pid_instance_f32_Ki,METH_NOARGS,"Ki"},
+    {"Kd", (PyCFunction) Method_arm_pid_instance_f32_Kd,METH_NOARGS,"Kd"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_pid_instance_f32,arm_pid_instance_f32_new,arm_pid_instance_f32_dealloc,arm_pid_instance_f32_init,arm_pid_instance_f32_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_linear_interp_instance_f32 *instance;
+} ml_arm_linear_interp_instance_f32Object;
+
+
+static void
+arm_linear_interp_instance_f32_dealloc(ml_arm_linear_interp_instance_f32Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pYData)
+       {
+          PyMem_Free(self->instance->pYData);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_linear_interp_instance_f32_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_linear_interp_instance_f32Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_linear_interp_instance_f32Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_linear_interp_instance_f32));
+
+        self->instance->pYData = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_linear_interp_instance_f32_init(ml_arm_linear_interp_instance_f32Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pYData=NULL;
+char *kwlist[] = {
+"nValues","x1","xSpacing","pYData",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|iffO", kwlist,&self->instance->nValues
+,&self->instance->x1
+,&self->instance->xSpacing
+,&pYData
+))
+    {
+
+    INITARRAYFIELD(pYData,NPY_DOUBLE,double,float32_t);
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_linear_interp_instance_f32,nValues,"i");
+GETFIELD(arm_linear_interp_instance_f32,x1,"f");
+GETFIELD(arm_linear_interp_instance_f32,xSpacing,"f");
+
+
+static PyMethodDef arm_linear_interp_instance_f32_methods[] = {
+
+    {"nValues", (PyCFunction) Method_arm_linear_interp_instance_f32_nValues,METH_NOARGS,"nValues"},
+    {"x1", (PyCFunction) Method_arm_linear_interp_instance_f32_x1,METH_NOARGS,"x1"},
+    {"xSpacing", (PyCFunction) Method_arm_linear_interp_instance_f32_xSpacing,METH_NOARGS,"xSpacing"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_linear_interp_instance_f32,arm_linear_interp_instance_f32_new,arm_linear_interp_instance_f32_dealloc,arm_linear_interp_instance_f32_init,arm_linear_interp_instance_f32_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_bilinear_interp_instance_f32 *instance;
+} ml_arm_bilinear_interp_instance_f32Object;
+
+
+static void
+arm_bilinear_interp_instance_f32_dealloc(ml_arm_bilinear_interp_instance_f32Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pData)
+       {
+          PyMem_Free(self->instance->pData);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_bilinear_interp_instance_f32_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_bilinear_interp_instance_f32Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_bilinear_interp_instance_f32Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_bilinear_interp_instance_f32));
+
+        self->instance->pData = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_bilinear_interp_instance_f32_init(ml_arm_bilinear_interp_instance_f32Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pData=NULL;
+char *kwlist[] = {
+"numRows","numCols","pData",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hhO", kwlist,&self->instance->numRows
+,&self->instance->numCols
+,&pData
+))
+    {
+
+    INITARRAYFIELD(pData,NPY_DOUBLE,double,float32_t);
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_bilinear_interp_instance_f32,numRows,"h");
+GETFIELD(arm_bilinear_interp_instance_f32,numCols,"h");
+
+
+static PyMethodDef arm_bilinear_interp_instance_f32_methods[] = {
+
+    {"numRows", (PyCFunction) Method_arm_bilinear_interp_instance_f32_numRows,METH_NOARGS,"numRows"},
+    {"numCols", (PyCFunction) Method_arm_bilinear_interp_instance_f32_numCols,METH_NOARGS,"numCols"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_bilinear_interp_instance_f32,arm_bilinear_interp_instance_f32_new,arm_bilinear_interp_instance_f32_dealloc,arm_bilinear_interp_instance_f32_init,arm_bilinear_interp_instance_f32_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_bilinear_interp_instance_q31 *instance;
+} ml_arm_bilinear_interp_instance_q31Object;
+
+
+static void
+arm_bilinear_interp_instance_q31_dealloc(ml_arm_bilinear_interp_instance_q31Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pData)
+       {
+          PyMem_Free(self->instance->pData);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_bilinear_interp_instance_q31_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_bilinear_interp_instance_q31Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_bilinear_interp_instance_q31Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_bilinear_interp_instance_q31));
+
+        self->instance->pData = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_bilinear_interp_instance_q31_init(ml_arm_bilinear_interp_instance_q31Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pData=NULL;
+char *kwlist[] = {
+"numRows","numCols","pData",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hhO", kwlist,&self->instance->numRows
+,&self->instance->numCols
+,&pData
+))
+    {
+
+    INITARRAYFIELD(pData,NPY_INT32,int32_t,int32_t);
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_bilinear_interp_instance_q31,numRows,"h");
+GETFIELD(arm_bilinear_interp_instance_q31,numCols,"h");
+
+
+static PyMethodDef arm_bilinear_interp_instance_q31_methods[] = {
+
+    {"numRows", (PyCFunction) Method_arm_bilinear_interp_instance_q31_numRows,METH_NOARGS,"numRows"},
+    {"numCols", (PyCFunction) Method_arm_bilinear_interp_instance_q31_numCols,METH_NOARGS,"numCols"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_bilinear_interp_instance_q31,arm_bilinear_interp_instance_q31_new,arm_bilinear_interp_instance_q31_dealloc,arm_bilinear_interp_instance_q31_init,arm_bilinear_interp_instance_q31_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_bilinear_interp_instance_q15 *instance;
+} ml_arm_bilinear_interp_instance_q15Object;
+
+
+static void
+arm_bilinear_interp_instance_q15_dealloc(ml_arm_bilinear_interp_instance_q15Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pData)
+       {
+          PyMem_Free(self->instance->pData);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_bilinear_interp_instance_q15_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_bilinear_interp_instance_q15Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_bilinear_interp_instance_q15Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_bilinear_interp_instance_q15));
+
+        self->instance->pData = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_bilinear_interp_instance_q15_init(ml_arm_bilinear_interp_instance_q15Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pData=NULL;
+char *kwlist[] = {
+"numRows","numCols","pData",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hhO", kwlist,&self->instance->numRows
+,&self->instance->numCols
+,&pData
+))
+    {
+
+    INITARRAYFIELD(pData,NPY_INT16,int16_t,int16_t);
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_bilinear_interp_instance_q15,numRows,"h");
+GETFIELD(arm_bilinear_interp_instance_q15,numCols,"h");
+
+
+static PyMethodDef arm_bilinear_interp_instance_q15_methods[] = {
+
+    {"numRows", (PyCFunction) Method_arm_bilinear_interp_instance_q15_numRows,METH_NOARGS,"numRows"},
+    {"numCols", (PyCFunction) Method_arm_bilinear_interp_instance_q15_numCols,METH_NOARGS,"numCols"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_bilinear_interp_instance_q15,arm_bilinear_interp_instance_q15_new,arm_bilinear_interp_instance_q15_dealloc,arm_bilinear_interp_instance_q15_init,arm_bilinear_interp_instance_q15_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_bilinear_interp_instance_q7 *instance;
+} ml_arm_bilinear_interp_instance_q7Object;
+
+
+static void
+arm_bilinear_interp_instance_q7_dealloc(ml_arm_bilinear_interp_instance_q7Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pData)
+       {
+          PyMem_Free(self->instance->pData);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_bilinear_interp_instance_q7_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_bilinear_interp_instance_q7Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_bilinear_interp_instance_q7Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_bilinear_interp_instance_q7));
+
+        self->instance->pData = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_bilinear_interp_instance_q7_init(ml_arm_bilinear_interp_instance_q7Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pData=NULL;
+char *kwlist[] = {
+"numRows","numCols","pData",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hhO", kwlist,&self->instance->numRows
+,&self->instance->numCols
+,&pData
+))
+    {
+
+    INITARRAYFIELD(pData,NPY_BYTE,int8_t,q7_t);
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_bilinear_interp_instance_q7,numRows,"h");
+GETFIELD(arm_bilinear_interp_instance_q7,numCols,"h");
+
+
+static PyMethodDef arm_bilinear_interp_instance_q7_methods[] = {
+
+    {"numRows", (PyCFunction) Method_arm_bilinear_interp_instance_q7_numRows,METH_NOARGS,"numRows"},
+    {"numCols", (PyCFunction) Method_arm_bilinear_interp_instance_q7_numCols,METH_NOARGS,"numCols"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_bilinear_interp_instance_q7,arm_bilinear_interp_instance_q7_new,arm_bilinear_interp_instance_q7_dealloc,arm_bilinear_interp_instance_q7_init,arm_bilinear_interp_instance_q7_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_cfft_radix2_instance_q15 *instance;
+} ml_arm_cfft_radix2_instance_q15Object;
+
+
+static void
+arm_cfft_radix2_instance_q15_dealloc(ml_arm_cfft_radix2_instance_q15Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_cfft_radix2_instance_q15_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_cfft_radix2_instance_q15Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_cfft_radix2_instance_q15Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_cfft_radix2_instance_q15));
+
+        self->instance->pTwiddle = NULL;
+        self->instance->pBitRevTable = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_cfft_radix2_instance_q15_init(ml_arm_cfft_radix2_instance_q15Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pTwiddle=NULL;
+    PyObject *pBitRevTable=NULL;
+char *kwlist[] = {
+"fftLen","ifftFlag","bitReverseFlag","twidCoefModifier","bitRevFactor",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hiihh", kwlist,&self->instance->fftLen
+,&self->instance->ifftFlag
+,&self->instance->bitReverseFlag
+,&self->instance->twidCoefModifier
+,&self->instance->bitRevFactor
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_cfft_radix2_instance_q15,fftLen,"h");
+GETFIELD(arm_cfft_radix2_instance_q15,ifftFlag,"i");
+GETFIELD(arm_cfft_radix2_instance_q15,bitReverseFlag,"i");
+GETFIELD(arm_cfft_radix2_instance_q15,twidCoefModifier,"h");
+GETFIELD(arm_cfft_radix2_instance_q15,bitRevFactor,"h");
+
+
+static PyMethodDef arm_cfft_radix2_instance_q15_methods[] = {
+
+    {"fftLen", (PyCFunction) Method_arm_cfft_radix2_instance_q15_fftLen,METH_NOARGS,"fftLen"},
+    {"ifftFlag", (PyCFunction) Method_arm_cfft_radix2_instance_q15_ifftFlag,METH_NOARGS,"ifftFlag"},
+    {"bitReverseFlag", (PyCFunction) Method_arm_cfft_radix2_instance_q15_bitReverseFlag,METH_NOARGS,"bitReverseFlag"},
+    {"twidCoefModifier", (PyCFunction) Method_arm_cfft_radix2_instance_q15_twidCoefModifier,METH_NOARGS,"twidCoefModifier"},
+    {"bitRevFactor", (PyCFunction) Method_arm_cfft_radix2_instance_q15_bitRevFactor,METH_NOARGS,"bitRevFactor"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_cfft_radix2_instance_q15,arm_cfft_radix2_instance_q15_new,arm_cfft_radix2_instance_q15_dealloc,arm_cfft_radix2_instance_q15_init,arm_cfft_radix2_instance_q15_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_cfft_radix4_instance_q15 *instance;
+} ml_arm_cfft_radix4_instance_q15Object;
+
+
+static void
+arm_cfft_radix4_instance_q15_dealloc(ml_arm_cfft_radix4_instance_q15Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_cfft_radix4_instance_q15_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_cfft_radix4_instance_q15Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_cfft_radix4_instance_q15Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_cfft_radix4_instance_q15));
+
+        self->instance->pTwiddle = NULL;
+        self->instance->pBitRevTable = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_cfft_radix4_instance_q15_init(ml_arm_cfft_radix4_instance_q15Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pTwiddle=NULL;
+    PyObject *pBitRevTable=NULL;
+char *kwlist[] = {
+"fftLen","ifftFlag","bitReverseFlag","twidCoefModifier","bitRevFactor",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hiihh", kwlist,&self->instance->fftLen
+,&self->instance->ifftFlag
+,&self->instance->bitReverseFlag
+,&self->instance->twidCoefModifier
+,&self->instance->bitRevFactor
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_cfft_radix4_instance_q15,fftLen,"h");
+GETFIELD(arm_cfft_radix4_instance_q15,ifftFlag,"i");
+GETFIELD(arm_cfft_radix4_instance_q15,bitReverseFlag,"i");
+GETFIELD(arm_cfft_radix4_instance_q15,twidCoefModifier,"h");
+GETFIELD(arm_cfft_radix4_instance_q15,bitRevFactor,"h");
+
+
+static PyMethodDef arm_cfft_radix4_instance_q15_methods[] = {
+
+    {"fftLen", (PyCFunction) Method_arm_cfft_radix4_instance_q15_fftLen,METH_NOARGS,"fftLen"},
+    {"ifftFlag", (PyCFunction) Method_arm_cfft_radix4_instance_q15_ifftFlag,METH_NOARGS,"ifftFlag"},
+    {"bitReverseFlag", (PyCFunction) Method_arm_cfft_radix4_instance_q15_bitReverseFlag,METH_NOARGS,"bitReverseFlag"},
+    {"twidCoefModifier", (PyCFunction) Method_arm_cfft_radix4_instance_q15_twidCoefModifier,METH_NOARGS,"twidCoefModifier"},
+    {"bitRevFactor", (PyCFunction) Method_arm_cfft_radix4_instance_q15_bitRevFactor,METH_NOARGS,"bitRevFactor"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_cfft_radix4_instance_q15,arm_cfft_radix4_instance_q15_new,arm_cfft_radix4_instance_q15_dealloc,arm_cfft_radix4_instance_q15_init,arm_cfft_radix4_instance_q15_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_cfft_radix2_instance_q31 *instance;
+} ml_arm_cfft_radix2_instance_q31Object;
+
+
+static void
+arm_cfft_radix2_instance_q31_dealloc(ml_arm_cfft_radix2_instance_q31Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_cfft_radix2_instance_q31_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_cfft_radix2_instance_q31Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_cfft_radix2_instance_q31Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_cfft_radix2_instance_q31));
+
+        self->instance->pTwiddle = NULL;
+        self->instance->pBitRevTable = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_cfft_radix2_instance_q31_init(ml_arm_cfft_radix2_instance_q31Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pTwiddle=NULL;
+    PyObject *pBitRevTable=NULL;
+char *kwlist[] = {
+"fftLen","ifftFlag","bitReverseFlag","twidCoefModifier","bitRevFactor",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hiihh", kwlist,&self->instance->fftLen
+,&self->instance->ifftFlag
+,&self->instance->bitReverseFlag
+,&self->instance->twidCoefModifier
+,&self->instance->bitRevFactor
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_cfft_radix2_instance_q31,fftLen,"h");
+GETFIELD(arm_cfft_radix2_instance_q31,ifftFlag,"i");
+GETFIELD(arm_cfft_radix2_instance_q31,bitReverseFlag,"i");
+GETFIELD(arm_cfft_radix2_instance_q31,twidCoefModifier,"h");
+GETFIELD(arm_cfft_radix2_instance_q31,bitRevFactor,"h");
+
+
+static PyMethodDef arm_cfft_radix2_instance_q31_methods[] = {
+
+    {"fftLen", (PyCFunction) Method_arm_cfft_radix2_instance_q31_fftLen,METH_NOARGS,"fftLen"},
+    {"ifftFlag", (PyCFunction) Method_arm_cfft_radix2_instance_q31_ifftFlag,METH_NOARGS,"ifftFlag"},
+    {"bitReverseFlag", (PyCFunction) Method_arm_cfft_radix2_instance_q31_bitReverseFlag,METH_NOARGS,"bitReverseFlag"},
+    {"twidCoefModifier", (PyCFunction) Method_arm_cfft_radix2_instance_q31_twidCoefModifier,METH_NOARGS,"twidCoefModifier"},
+    {"bitRevFactor", (PyCFunction) Method_arm_cfft_radix2_instance_q31_bitRevFactor,METH_NOARGS,"bitRevFactor"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_cfft_radix2_instance_q31,arm_cfft_radix2_instance_q31_new,arm_cfft_radix2_instance_q31_dealloc,arm_cfft_radix2_instance_q31_init,arm_cfft_radix2_instance_q31_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_cfft_radix4_instance_q31 *instance;
+} ml_arm_cfft_radix4_instance_q31Object;
+
+
+static void
+arm_cfft_radix4_instance_q31_dealloc(ml_arm_cfft_radix4_instance_q31Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_cfft_radix4_instance_q31_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_cfft_radix4_instance_q31Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_cfft_radix4_instance_q31Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_cfft_radix4_instance_q31));
+
+        self->instance->pTwiddle = NULL;
+        self->instance->pBitRevTable = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_cfft_radix4_instance_q31_init(ml_arm_cfft_radix4_instance_q31Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pTwiddle=NULL;
+    PyObject *pBitRevTable=NULL;
+char *kwlist[] = {
+"fftLen","ifftFlag","bitReverseFlag","twidCoefModifier","bitRevFactor",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hiihh", kwlist,&self->instance->fftLen
+,&self->instance->ifftFlag
+,&self->instance->bitReverseFlag
+,&self->instance->twidCoefModifier
+,&self->instance->bitRevFactor
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_cfft_radix4_instance_q31,fftLen,"h");
+GETFIELD(arm_cfft_radix4_instance_q31,ifftFlag,"i");
+GETFIELD(arm_cfft_radix4_instance_q31,bitReverseFlag,"i");
+GETFIELD(arm_cfft_radix4_instance_q31,twidCoefModifier,"h");
+GETFIELD(arm_cfft_radix4_instance_q31,bitRevFactor,"h");
+
+
+static PyMethodDef arm_cfft_radix4_instance_q31_methods[] = {
+
+    {"fftLen", (PyCFunction) Method_arm_cfft_radix4_instance_q31_fftLen,METH_NOARGS,"fftLen"},
+    {"ifftFlag", (PyCFunction) Method_arm_cfft_radix4_instance_q31_ifftFlag,METH_NOARGS,"ifftFlag"},
+    {"bitReverseFlag", (PyCFunction) Method_arm_cfft_radix4_instance_q31_bitReverseFlag,METH_NOARGS,"bitReverseFlag"},
+    {"twidCoefModifier", (PyCFunction) Method_arm_cfft_radix4_instance_q31_twidCoefModifier,METH_NOARGS,"twidCoefModifier"},
+    {"bitRevFactor", (PyCFunction) Method_arm_cfft_radix4_instance_q31_bitRevFactor,METH_NOARGS,"bitRevFactor"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_cfft_radix4_instance_q31,arm_cfft_radix4_instance_q31_new,arm_cfft_radix4_instance_q31_dealloc,arm_cfft_radix4_instance_q31_init,arm_cfft_radix4_instance_q31_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_cfft_radix2_instance_f32 *instance;
+} ml_arm_cfft_radix2_instance_f32Object;
+
+
+static void
+arm_cfft_radix2_instance_f32_dealloc(ml_arm_cfft_radix2_instance_f32Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_cfft_radix2_instance_f32_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_cfft_radix2_instance_f32Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_cfft_radix2_instance_f32Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_cfft_radix2_instance_f32));
+
+        self->instance->pTwiddle = NULL;
+        self->instance->pBitRevTable = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_cfft_radix2_instance_f32_init(ml_arm_cfft_radix2_instance_f32Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pTwiddle=NULL;
+    PyObject *pBitRevTable=NULL;
+char *kwlist[] = {
+"fftLen","ifftFlag","bitReverseFlag","twidCoefModifier","bitRevFactor","onebyfftLen",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hiihhf", kwlist,&self->instance->fftLen
+,&self->instance->ifftFlag
+,&self->instance->bitReverseFlag
+,&self->instance->twidCoefModifier
+,&self->instance->bitRevFactor
+,&self->instance->onebyfftLen
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_cfft_radix2_instance_f32,fftLen,"h");
+GETFIELD(arm_cfft_radix2_instance_f32,ifftFlag,"i");
+GETFIELD(arm_cfft_radix2_instance_f32,bitReverseFlag,"i");
+GETFIELD(arm_cfft_radix2_instance_f32,twidCoefModifier,"h");
+GETFIELD(arm_cfft_radix2_instance_f32,bitRevFactor,"h");
+GETFIELD(arm_cfft_radix2_instance_f32,onebyfftLen,"f");
+
+
+static PyMethodDef arm_cfft_radix2_instance_f32_methods[] = {
+
+    {"fftLen", (PyCFunction) Method_arm_cfft_radix2_instance_f32_fftLen,METH_NOARGS,"fftLen"},
+    {"ifftFlag", (PyCFunction) Method_arm_cfft_radix2_instance_f32_ifftFlag,METH_NOARGS,"ifftFlag"},
+    {"bitReverseFlag", (PyCFunction) Method_arm_cfft_radix2_instance_f32_bitReverseFlag,METH_NOARGS,"bitReverseFlag"},
+    {"twidCoefModifier", (PyCFunction) Method_arm_cfft_radix2_instance_f32_twidCoefModifier,METH_NOARGS,"twidCoefModifier"},
+    {"bitRevFactor", (PyCFunction) Method_arm_cfft_radix2_instance_f32_bitRevFactor,METH_NOARGS,"bitRevFactor"},
+    {"onebyfftLen", (PyCFunction) Method_arm_cfft_radix2_instance_f32_onebyfftLen,METH_NOARGS,"onebyfftLen"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_cfft_radix2_instance_f32,arm_cfft_radix2_instance_f32_new,arm_cfft_radix2_instance_f32_dealloc,arm_cfft_radix2_instance_f32_init,arm_cfft_radix2_instance_f32_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_cfft_radix4_instance_f32 *instance;
+} ml_arm_cfft_radix4_instance_f32Object;
+
+
+static void
+arm_cfft_radix4_instance_f32_dealloc(ml_arm_cfft_radix4_instance_f32Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_cfft_radix4_instance_f32_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_cfft_radix4_instance_f32Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_cfft_radix4_instance_f32Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_cfft_radix4_instance_f32));
+
+        self->instance->pTwiddle = NULL;
+        self->instance->pBitRevTable = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_cfft_radix4_instance_f32_init(ml_arm_cfft_radix4_instance_f32Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pTwiddle=NULL;
+    PyObject *pBitRevTable=NULL;
+char *kwlist[] = {
+"fftLen","ifftFlag","bitReverseFlag","twidCoefModifier","bitRevFactor","onebyfftLen",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hiihhf", kwlist,&self->instance->fftLen
+,&self->instance->ifftFlag
+,&self->instance->bitReverseFlag
+,&self->instance->twidCoefModifier
+,&self->instance->bitRevFactor
+,&self->instance->onebyfftLen
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_cfft_radix4_instance_f32,fftLen,"h");
+GETFIELD(arm_cfft_radix4_instance_f32,ifftFlag,"i");
+GETFIELD(arm_cfft_radix4_instance_f32,bitReverseFlag,"i");
+GETFIELD(arm_cfft_radix4_instance_f32,twidCoefModifier,"h");
+GETFIELD(arm_cfft_radix4_instance_f32,bitRevFactor,"h");
+GETFIELD(arm_cfft_radix4_instance_f32,onebyfftLen,"f");
+
+
+static PyMethodDef arm_cfft_radix4_instance_f32_methods[] = {
+
+    {"fftLen", (PyCFunction) Method_arm_cfft_radix4_instance_f32_fftLen,METH_NOARGS,"fftLen"},
+    {"ifftFlag", (PyCFunction) Method_arm_cfft_radix4_instance_f32_ifftFlag,METH_NOARGS,"ifftFlag"},
+    {"bitReverseFlag", (PyCFunction) Method_arm_cfft_radix4_instance_f32_bitReverseFlag,METH_NOARGS,"bitReverseFlag"},
+    {"twidCoefModifier", (PyCFunction) Method_arm_cfft_radix4_instance_f32_twidCoefModifier,METH_NOARGS,"twidCoefModifier"},
+    {"bitRevFactor", (PyCFunction) Method_arm_cfft_radix4_instance_f32_bitRevFactor,METH_NOARGS,"bitRevFactor"},
+    {"onebyfftLen", (PyCFunction) Method_arm_cfft_radix4_instance_f32_onebyfftLen,METH_NOARGS,"onebyfftLen"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_cfft_radix4_instance_f32,arm_cfft_radix4_instance_f32_new,arm_cfft_radix4_instance_f32_dealloc,arm_cfft_radix4_instance_f32_init,arm_cfft_radix4_instance_f32_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_cfft_instance_q15 *instance;
+} ml_arm_cfft_instance_q15Object;
+
+
+static void
+arm_cfft_instance_q15_dealloc(ml_arm_cfft_instance_q15Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_cfft_instance_q15_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_cfft_instance_q15Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_cfft_instance_q15Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_cfft_instance_q15));
+
+        self->instance->pTwiddle = NULL;
+        self->instance->pBitRevTable = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_cfft_instance_q15_init(ml_arm_cfft_instance_q15Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pTwiddle=NULL;
+    PyObject *pBitRevTable=NULL;
+char *kwlist[] = {
+"fftLen","bitRevLength",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hh", kwlist,&self->instance->fftLen
+,&self->instance->bitRevLength
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_cfft_instance_q15,fftLen,"h");
+GETFIELD(arm_cfft_instance_q15,bitRevLength,"h");
+
+
+static PyMethodDef arm_cfft_instance_q15_methods[] = {
+
+    {"fftLen", (PyCFunction) Method_arm_cfft_instance_q15_fftLen,METH_NOARGS,"fftLen"},
+    {"bitRevLength", (PyCFunction) Method_arm_cfft_instance_q15_bitRevLength,METH_NOARGS,"bitRevLength"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_cfft_instance_q15,arm_cfft_instance_q15_new,arm_cfft_instance_q15_dealloc,arm_cfft_instance_q15_init,arm_cfft_instance_q15_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_cfft_instance_q31 *instance;
+} ml_arm_cfft_instance_q31Object;
+
+
+static void
+arm_cfft_instance_q31_dealloc(ml_arm_cfft_instance_q31Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_cfft_instance_q31_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_cfft_instance_q31Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_cfft_instance_q31Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_cfft_instance_q31));
+
+        self->instance->pTwiddle = NULL;
+        self->instance->pBitRevTable = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_cfft_instance_q31_init(ml_arm_cfft_instance_q31Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pTwiddle=NULL;
+    PyObject *pBitRevTable=NULL;
+char *kwlist[] = {
+"fftLen","bitRevLength",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hh", kwlist,&self->instance->fftLen
+,&self->instance->bitRevLength
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_cfft_instance_q31,fftLen,"h");
+GETFIELD(arm_cfft_instance_q31,bitRevLength,"h");
+
+
+static PyMethodDef arm_cfft_instance_q31_methods[] = {
+
+    {"fftLen", (PyCFunction) Method_arm_cfft_instance_q31_fftLen,METH_NOARGS,"fftLen"},
+    {"bitRevLength", (PyCFunction) Method_arm_cfft_instance_q31_bitRevLength,METH_NOARGS,"bitRevLength"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_cfft_instance_q31,arm_cfft_instance_q31_new,arm_cfft_instance_q31_dealloc,arm_cfft_instance_q31_init,arm_cfft_instance_q31_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_cfft_instance_f32 *instance;
+} ml_arm_cfft_instance_f32Object;
+
+
+static void
+arm_cfft_instance_f32_dealloc(ml_arm_cfft_instance_f32Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_cfft_instance_f32_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_cfft_instance_f32Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_cfft_instance_f32Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_cfft_instance_f32));
+
+        self->instance->pTwiddle = NULL;
+        self->instance->pBitRevTable = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_cfft_instance_f32_init(ml_arm_cfft_instance_f32Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pTwiddle=NULL;
+    PyObject *pBitRevTable=NULL;
+char *kwlist[] = {
+"fftLen","bitRevLength",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hh", kwlist,&self->instance->fftLen
+,&self->instance->bitRevLength
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_cfft_instance_f32,fftLen,"h");
+GETFIELD(arm_cfft_instance_f32,bitRevLength,"h");
+
+
+static PyMethodDef arm_cfft_instance_f32_methods[] = {
+
+    {"fftLen", (PyCFunction) Method_arm_cfft_instance_f32_fftLen,METH_NOARGS,"fftLen"},
+    {"bitRevLength", (PyCFunction) Method_arm_cfft_instance_f32_bitRevLength,METH_NOARGS,"bitRevLength"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_cfft_instance_f32,arm_cfft_instance_f32_new,arm_cfft_instance_f32_dealloc,arm_cfft_instance_f32_init,arm_cfft_instance_f32_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_rfft_instance_q15 *instance;
+} ml_arm_rfft_instance_q15Object;
+
+
+static void
+arm_rfft_instance_q15_dealloc(ml_arm_rfft_instance_q15Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_rfft_instance_q15_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_rfft_instance_q15Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_rfft_instance_q15Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_rfft_instance_q15));
+
+        self->instance->pTwiddleAReal = NULL;
+        self->instance->pTwiddleBReal = NULL;
+        self->instance->pCfft = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_rfft_instance_q15_init(ml_arm_rfft_instance_q15Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pTwiddleAReal=NULL;
+    PyObject *pTwiddleBReal=NULL;
+    PyObject *pCfft=NULL;
+char *kwlist[] = {
+"fftLenReal","ifftFlagR","bitReverseFlagR","twidCoefRModifier",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|iiii", kwlist,&self->instance->fftLenReal
+,&self->instance->ifftFlagR
+,&self->instance->bitReverseFlagR
+,&self->instance->twidCoefRModifier
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_rfft_instance_q15,fftLenReal,"i");
+GETFIELD(arm_rfft_instance_q15,ifftFlagR,"i");
+GETFIELD(arm_rfft_instance_q15,bitReverseFlagR,"i");
+GETFIELD(arm_rfft_instance_q15,twidCoefRModifier,"i");
+
+
+static PyMethodDef arm_rfft_instance_q15_methods[] = {
+
+    {"fftLenReal", (PyCFunction) Method_arm_rfft_instance_q15_fftLenReal,METH_NOARGS,"fftLenReal"},
+    {"ifftFlagR", (PyCFunction) Method_arm_rfft_instance_q15_ifftFlagR,METH_NOARGS,"ifftFlagR"},
+    {"bitReverseFlagR", (PyCFunction) Method_arm_rfft_instance_q15_bitReverseFlagR,METH_NOARGS,"bitReverseFlagR"},
+    {"twidCoefRModifier", (PyCFunction) Method_arm_rfft_instance_q15_twidCoefRModifier,METH_NOARGS,"twidCoefRModifier"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_rfft_instance_q15,arm_rfft_instance_q15_new,arm_rfft_instance_q15_dealloc,arm_rfft_instance_q15_init,arm_rfft_instance_q15_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_rfft_instance_q31 *instance;
+} ml_arm_rfft_instance_q31Object;
+
+
+static void
+arm_rfft_instance_q31_dealloc(ml_arm_rfft_instance_q31Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_rfft_instance_q31_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_rfft_instance_q31Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_rfft_instance_q31Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_rfft_instance_q31));
+
+        self->instance->pTwiddleAReal = NULL;
+        self->instance->pTwiddleBReal = NULL;
+        self->instance->pCfft = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_rfft_instance_q31_init(ml_arm_rfft_instance_q31Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pTwiddleAReal=NULL;
+    PyObject *pTwiddleBReal=NULL;
+    PyObject *pCfft=NULL;
+char *kwlist[] = {
+"fftLenReal","ifftFlagR","bitReverseFlagR","twidCoefRModifier",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|iiii", kwlist,&self->instance->fftLenReal
+,&self->instance->ifftFlagR
+,&self->instance->bitReverseFlagR
+,&self->instance->twidCoefRModifier
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_rfft_instance_q31,fftLenReal,"i");
+GETFIELD(arm_rfft_instance_q31,ifftFlagR,"i");
+GETFIELD(arm_rfft_instance_q31,bitReverseFlagR,"i");
+GETFIELD(arm_rfft_instance_q31,twidCoefRModifier,"i");
+
+
+static PyMethodDef arm_rfft_instance_q31_methods[] = {
+
+    {"fftLenReal", (PyCFunction) Method_arm_rfft_instance_q31_fftLenReal,METH_NOARGS,"fftLenReal"},
+    {"ifftFlagR", (PyCFunction) Method_arm_rfft_instance_q31_ifftFlagR,METH_NOARGS,"ifftFlagR"},
+    {"bitReverseFlagR", (PyCFunction) Method_arm_rfft_instance_q31_bitReverseFlagR,METH_NOARGS,"bitReverseFlagR"},
+    {"twidCoefRModifier", (PyCFunction) Method_arm_rfft_instance_q31_twidCoefRModifier,METH_NOARGS,"twidCoefRModifier"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_rfft_instance_q31,arm_rfft_instance_q31_new,arm_rfft_instance_q31_dealloc,arm_rfft_instance_q31_init,arm_rfft_instance_q31_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_rfft_instance_f32 *instance;
+} ml_arm_rfft_instance_f32Object;
+
+
+static void
+arm_rfft_instance_f32_dealloc(ml_arm_rfft_instance_f32Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_rfft_instance_f32_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_rfft_instance_f32Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_rfft_instance_f32Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_rfft_instance_f32));
+
+        self->instance->pTwiddleAReal = NULL;
+        self->instance->pTwiddleBReal = NULL;
+        self->instance->pCfft = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_rfft_instance_f32_init(ml_arm_rfft_instance_f32Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pTwiddleAReal=NULL;
+    PyObject *pTwiddleBReal=NULL;
+    PyObject *pCfft=NULL;
+char *kwlist[] = {
+"fftLenReal","fftLenBy2","ifftFlagR","bitReverseFlagR","twidCoefRModifier",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|ihiii", kwlist,&self->instance->fftLenReal
+,&self->instance->fftLenBy2
+,&self->instance->ifftFlagR
+,&self->instance->bitReverseFlagR
+,&self->instance->twidCoefRModifier
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_rfft_instance_f32,fftLenReal,"i");
+GETFIELD(arm_rfft_instance_f32,fftLenBy2,"h");
+GETFIELD(arm_rfft_instance_f32,ifftFlagR,"i");
+GETFIELD(arm_rfft_instance_f32,bitReverseFlagR,"i");
+GETFIELD(arm_rfft_instance_f32,twidCoefRModifier,"i");
+
+
+static PyMethodDef arm_rfft_instance_f32_methods[] = {
+
+    {"fftLenReal", (PyCFunction) Method_arm_rfft_instance_f32_fftLenReal,METH_NOARGS,"fftLenReal"},
+    {"fftLenBy2", (PyCFunction) Method_arm_rfft_instance_f32_fftLenBy2,METH_NOARGS,"fftLenBy2"},
+    {"ifftFlagR", (PyCFunction) Method_arm_rfft_instance_f32_ifftFlagR,METH_NOARGS,"ifftFlagR"},
+    {"bitReverseFlagR", (PyCFunction) Method_arm_rfft_instance_f32_bitReverseFlagR,METH_NOARGS,"bitReverseFlagR"},
+    {"twidCoefRModifier", (PyCFunction) Method_arm_rfft_instance_f32_twidCoefRModifier,METH_NOARGS,"twidCoefRModifier"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_rfft_instance_f32,arm_rfft_instance_f32_new,arm_rfft_instance_f32_dealloc,arm_rfft_instance_f32_init,arm_rfft_instance_f32_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_rfft_fast_instance_f32 *instance;
+} ml_arm_rfft_fast_instance_f32Object;
+
+
+static void
+arm_rfft_fast_instance_f32_dealloc(ml_arm_rfft_fast_instance_f32Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_rfft_fast_instance_f32_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_rfft_fast_instance_f32Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_rfft_fast_instance_f32Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_rfft_fast_instance_f32));
+
+        self->instance->pTwiddleRFFT = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_rfft_fast_instance_f32_init(ml_arm_rfft_fast_instance_f32Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pTwiddleRFFT=NULL;
+char *kwlist[] = {
+"Sint","fftLenRFFT",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|?h", kwlist,&self->instance->Sint
+,&self->instance->fftLenRFFT
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_rfft_fast_instance_f32,Sint,"?");
+GETFIELD(arm_rfft_fast_instance_f32,fftLenRFFT,"h");
+
+
+static PyMethodDef arm_rfft_fast_instance_f32_methods[] = {
+
+    {"Sint", (PyCFunction) Method_arm_rfft_fast_instance_f32_Sint,METH_NOARGS,"Sint"},
+    {"fftLenRFFT", (PyCFunction) Method_arm_rfft_fast_instance_f32_fftLenRFFT,METH_NOARGS,"fftLenRFFT"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_rfft_fast_instance_f32,arm_rfft_fast_instance_f32_new,arm_rfft_fast_instance_f32_dealloc,arm_rfft_fast_instance_f32_init,arm_rfft_fast_instance_f32_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_dct4_instance_f32 *instance;
+} ml_arm_dct4_instance_f32Object;
+
+
+static void
+arm_dct4_instance_f32_dealloc(ml_arm_dct4_instance_f32Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_dct4_instance_f32_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_dct4_instance_f32Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_dct4_instance_f32Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_dct4_instance_f32));
+
+        self->instance->pTwiddle = NULL;
+        self->instance->pCosFactor = NULL;
+        self->instance->pRfft = NULL;
+        self->instance->pCfft = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_dct4_instance_f32_init(ml_arm_dct4_instance_f32Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pTwiddle=NULL;
+    PyObject *pCosFactor=NULL;
+    PyObject *pRfft=NULL;
+    PyObject *pCfft=NULL;
+char *kwlist[] = {
+"N","Nby2","normalize",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hhf", kwlist,&self->instance->N
+,&self->instance->Nby2
+,&self->instance->normalize
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_dct4_instance_f32,N,"h");
+GETFIELD(arm_dct4_instance_f32,Nby2,"h");
+GETFIELD(arm_dct4_instance_f32,normalize,"f");
+
+
+static PyMethodDef arm_dct4_instance_f32_methods[] = {
+
+    {"N", (PyCFunction) Method_arm_dct4_instance_f32_N,METH_NOARGS,"N"},
+    {"Nby2", (PyCFunction) Method_arm_dct4_instance_f32_Nby2,METH_NOARGS,"Nby2"},
+    {"normalize", (PyCFunction) Method_arm_dct4_instance_f32_normalize,METH_NOARGS,"normalize"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_dct4_instance_f32,arm_dct4_instance_f32_new,arm_dct4_instance_f32_dealloc,arm_dct4_instance_f32_init,arm_dct4_instance_f32_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_dct4_instance_q31 *instance;
+} ml_arm_dct4_instance_q31Object;
+
+
+static void
+arm_dct4_instance_q31_dealloc(ml_arm_dct4_instance_q31Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_dct4_instance_q31_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_dct4_instance_q31Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_dct4_instance_q31Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_dct4_instance_q31));
+
+        self->instance->pTwiddle = NULL;
+        self->instance->pCosFactor = NULL;
+        self->instance->pRfft = NULL;
+        self->instance->pCfft = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_dct4_instance_q31_init(ml_arm_dct4_instance_q31Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pTwiddle=NULL;
+    PyObject *pCosFactor=NULL;
+    PyObject *pRfft=NULL;
+    PyObject *pCfft=NULL;
+char *kwlist[] = {
+"N","Nby2","normalize",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hhi", kwlist,&self->instance->N
+,&self->instance->Nby2
+,&self->instance->normalize
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_dct4_instance_q31,N,"h");
+GETFIELD(arm_dct4_instance_q31,Nby2,"h");
+GETFIELD(arm_dct4_instance_q31,normalize,"i");
+
+
+static PyMethodDef arm_dct4_instance_q31_methods[] = {
+
+    {"N", (PyCFunction) Method_arm_dct4_instance_q31_N,METH_NOARGS,"N"},
+    {"Nby2", (PyCFunction) Method_arm_dct4_instance_q31_Nby2,METH_NOARGS,"Nby2"},
+    {"normalize", (PyCFunction) Method_arm_dct4_instance_q31_normalize,METH_NOARGS,"normalize"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_dct4_instance_q31,arm_dct4_instance_q31_new,arm_dct4_instance_q31_dealloc,arm_dct4_instance_q31_init,arm_dct4_instance_q31_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_dct4_instance_q15 *instance;
+} ml_arm_dct4_instance_q15Object;
+
+
+static void
+arm_dct4_instance_q15_dealloc(ml_arm_dct4_instance_q15Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_dct4_instance_q15_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_dct4_instance_q15Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_dct4_instance_q15Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_dct4_instance_q15));
+
+        self->instance->pTwiddle = NULL;
+        self->instance->pCosFactor = NULL;
+        self->instance->pRfft = NULL;
+        self->instance->pCfft = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_dct4_instance_q15_init(ml_arm_dct4_instance_q15Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pTwiddle=NULL;
+    PyObject *pCosFactor=NULL;
+    PyObject *pRfft=NULL;
+    PyObject *pCfft=NULL;
+char *kwlist[] = {
+"N","Nby2","normalize",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hhh", kwlist,&self->instance->N
+,&self->instance->Nby2
+,&self->instance->normalize
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_dct4_instance_q15,N,"h");
+GETFIELD(arm_dct4_instance_q15,Nby2,"h");
+GETFIELD(arm_dct4_instance_q15,normalize,"h");
+
+
+static PyMethodDef arm_dct4_instance_q15_methods[] = {
+
+    {"N", (PyCFunction) Method_arm_dct4_instance_q15_N,METH_NOARGS,"N"},
+    {"Nby2", (PyCFunction) Method_arm_dct4_instance_q15_Nby2,METH_NOARGS,"Nby2"},
+    {"normalize", (PyCFunction) Method_arm_dct4_instance_q15_normalize,METH_NOARGS,"normalize"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_dct4_instance_q15,arm_dct4_instance_q15_new,arm_dct4_instance_q15_dealloc,arm_dct4_instance_q15_init,arm_dct4_instance_q15_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_fir_decimate_instance_q15 *instance;
+} ml_arm_fir_decimate_instance_q15Object;
+
+
+static void
+arm_fir_decimate_instance_q15_dealloc(ml_arm_fir_decimate_instance_q15Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_fir_decimate_instance_q15_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_fir_decimate_instance_q15Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_fir_decimate_instance_q15Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_fir_decimate_instance_q15));
+
+        self->instance->pCoeffs = NULL;
+        self->instance->pState = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_fir_decimate_instance_q15_init(ml_arm_fir_decimate_instance_q15Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pCoeffs=NULL;
+    PyObject *pState=NULL;
+char *kwlist[] = {
+"M","numTaps",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|ih", kwlist,&self->instance->M
+,&self->instance->numTaps
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_fir_decimate_instance_q15,M,"i");
+GETFIELD(arm_fir_decimate_instance_q15,numTaps,"h");
+
+
+static PyMethodDef arm_fir_decimate_instance_q15_methods[] = {
+
+    {"M", (PyCFunction) Method_arm_fir_decimate_instance_q15_M,METH_NOARGS,"M"},
+    {"numTaps", (PyCFunction) Method_arm_fir_decimate_instance_q15_numTaps,METH_NOARGS,"numTaps"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_fir_decimate_instance_q15,arm_fir_decimate_instance_q15_new,arm_fir_decimate_instance_q15_dealloc,arm_fir_decimate_instance_q15_init,arm_fir_decimate_instance_q15_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_fir_decimate_instance_q31 *instance;
+} ml_arm_fir_decimate_instance_q31Object;
+
+
+static void
+arm_fir_decimate_instance_q31_dealloc(ml_arm_fir_decimate_instance_q31Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_fir_decimate_instance_q31_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_fir_decimate_instance_q31Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_fir_decimate_instance_q31Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_fir_decimate_instance_q31));
+
+        self->instance->pCoeffs = NULL;
+        self->instance->pState = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_fir_decimate_instance_q31_init(ml_arm_fir_decimate_instance_q31Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pCoeffs=NULL;
+    PyObject *pState=NULL;
+char *kwlist[] = {
+"M","numTaps",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|ih", kwlist,&self->instance->M
+,&self->instance->numTaps
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_fir_decimate_instance_q31,M,"i");
+GETFIELD(arm_fir_decimate_instance_q31,numTaps,"h");
+
+
+static PyMethodDef arm_fir_decimate_instance_q31_methods[] = {
+
+    {"M", (PyCFunction) Method_arm_fir_decimate_instance_q31_M,METH_NOARGS,"M"},
+    {"numTaps", (PyCFunction) Method_arm_fir_decimate_instance_q31_numTaps,METH_NOARGS,"numTaps"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_fir_decimate_instance_q31,arm_fir_decimate_instance_q31_new,arm_fir_decimate_instance_q31_dealloc,arm_fir_decimate_instance_q31_init,arm_fir_decimate_instance_q31_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_fir_decimate_instance_f32 *instance;
+} ml_arm_fir_decimate_instance_f32Object;
+
+
+static void
+arm_fir_decimate_instance_f32_dealloc(ml_arm_fir_decimate_instance_f32Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_fir_decimate_instance_f32_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_fir_decimate_instance_f32Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_fir_decimate_instance_f32Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_fir_decimate_instance_f32));
+
+        self->instance->pCoeffs = NULL;
+        self->instance->pState = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_fir_decimate_instance_f32_init(ml_arm_fir_decimate_instance_f32Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pCoeffs=NULL;
+    PyObject *pState=NULL;
+char *kwlist[] = {
+"M","numTaps",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|ih", kwlist,&self->instance->M
+,&self->instance->numTaps
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_fir_decimate_instance_f32,M,"i");
+GETFIELD(arm_fir_decimate_instance_f32,numTaps,"h");
+
+
+static PyMethodDef arm_fir_decimate_instance_f32_methods[] = {
+
+    {"M", (PyCFunction) Method_arm_fir_decimate_instance_f32_M,METH_NOARGS,"M"},
+    {"numTaps", (PyCFunction) Method_arm_fir_decimate_instance_f32_numTaps,METH_NOARGS,"numTaps"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_fir_decimate_instance_f32,arm_fir_decimate_instance_f32_new,arm_fir_decimate_instance_f32_dealloc,arm_fir_decimate_instance_f32_init,arm_fir_decimate_instance_f32_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_fir_interpolate_instance_q15 *instance;
+} ml_arm_fir_interpolate_instance_q15Object;
+
+
+static void
+arm_fir_interpolate_instance_q15_dealloc(ml_arm_fir_interpolate_instance_q15Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_fir_interpolate_instance_q15_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_fir_interpolate_instance_q15Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_fir_interpolate_instance_q15Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_fir_interpolate_instance_q15));
+
+        self->instance->pCoeffs = NULL;
+        self->instance->pState = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_fir_interpolate_instance_q15_init(ml_arm_fir_interpolate_instance_q15Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pCoeffs=NULL;
+    PyObject *pState=NULL;
+char *kwlist[] = {
+"L","phaseLength",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|ih", kwlist,&self->instance->L
+,&self->instance->phaseLength
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_fir_interpolate_instance_q15,L,"i");
+GETFIELD(arm_fir_interpolate_instance_q15,phaseLength,"h");
+
+
+static PyMethodDef arm_fir_interpolate_instance_q15_methods[] = {
+
+    {"L", (PyCFunction) Method_arm_fir_interpolate_instance_q15_L,METH_NOARGS,"L"},
+    {"phaseLength", (PyCFunction) Method_arm_fir_interpolate_instance_q15_phaseLength,METH_NOARGS,"phaseLength"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_fir_interpolate_instance_q15,arm_fir_interpolate_instance_q15_new,arm_fir_interpolate_instance_q15_dealloc,arm_fir_interpolate_instance_q15_init,arm_fir_interpolate_instance_q15_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_fir_interpolate_instance_q31 *instance;
+} ml_arm_fir_interpolate_instance_q31Object;
+
+
+static void
+arm_fir_interpolate_instance_q31_dealloc(ml_arm_fir_interpolate_instance_q31Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_fir_interpolate_instance_q31_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_fir_interpolate_instance_q31Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_fir_interpolate_instance_q31Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_fir_interpolate_instance_q31));
+
+        self->instance->pCoeffs = NULL;
+        self->instance->pState = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_fir_interpolate_instance_q31_init(ml_arm_fir_interpolate_instance_q31Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pCoeffs=NULL;
+    PyObject *pState=NULL;
+char *kwlist[] = {
+"L","phaseLength",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|ih", kwlist,&self->instance->L
+,&self->instance->phaseLength
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_fir_interpolate_instance_q31,L,"i");
+GETFIELD(arm_fir_interpolate_instance_q31,phaseLength,"h");
+
+
+static PyMethodDef arm_fir_interpolate_instance_q31_methods[] = {
+
+    {"L", (PyCFunction) Method_arm_fir_interpolate_instance_q31_L,METH_NOARGS,"L"},
+    {"phaseLength", (PyCFunction) Method_arm_fir_interpolate_instance_q31_phaseLength,METH_NOARGS,"phaseLength"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_fir_interpolate_instance_q31,arm_fir_interpolate_instance_q31_new,arm_fir_interpolate_instance_q31_dealloc,arm_fir_interpolate_instance_q31_init,arm_fir_interpolate_instance_q31_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_fir_interpolate_instance_f32 *instance;
+} ml_arm_fir_interpolate_instance_f32Object;
+
+
+static void
+arm_fir_interpolate_instance_f32_dealloc(ml_arm_fir_interpolate_instance_f32Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_fir_interpolate_instance_f32_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_fir_interpolate_instance_f32Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_fir_interpolate_instance_f32Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_fir_interpolate_instance_f32));
+
+        self->instance->pCoeffs = NULL;
+        self->instance->pState = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_fir_interpolate_instance_f32_init(ml_arm_fir_interpolate_instance_f32Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pCoeffs=NULL;
+    PyObject *pState=NULL;
+char *kwlist[] = {
+"L","phaseLength",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|ih", kwlist,&self->instance->L
+,&self->instance->phaseLength
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_fir_interpolate_instance_f32,L,"i");
+GETFIELD(arm_fir_interpolate_instance_f32,phaseLength,"h");
+
+
+static PyMethodDef arm_fir_interpolate_instance_f32_methods[] = {
+
+    {"L", (PyCFunction) Method_arm_fir_interpolate_instance_f32_L,METH_NOARGS,"L"},
+    {"phaseLength", (PyCFunction) Method_arm_fir_interpolate_instance_f32_phaseLength,METH_NOARGS,"phaseLength"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_fir_interpolate_instance_f32,arm_fir_interpolate_instance_f32_new,arm_fir_interpolate_instance_f32_dealloc,arm_fir_interpolate_instance_f32_init,arm_fir_interpolate_instance_f32_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_biquad_cas_df1_32x64_ins_q31 *instance;
+} ml_arm_biquad_cas_df1_32x64_ins_q31Object;
+
+
+static void
+arm_biquad_cas_df1_32x64_ins_q31_dealloc(ml_arm_biquad_cas_df1_32x64_ins_q31Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_biquad_cas_df1_32x64_ins_q31_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_biquad_cas_df1_32x64_ins_q31Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_biquad_cas_df1_32x64_ins_q31Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_biquad_cas_df1_32x64_ins_q31));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_biquad_cas_df1_32x64_ins_q31_init(ml_arm_biquad_cas_df1_32x64_ins_q31Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+char *kwlist[] = {
+"numStages","postShift",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|ii", kwlist,&self->instance->numStages
+,&self->instance->postShift
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_biquad_cas_df1_32x64_ins_q31,numStages,"i");
+GETFIELD(arm_biquad_cas_df1_32x64_ins_q31,postShift,"i");
+
+
+static PyMethodDef arm_biquad_cas_df1_32x64_ins_q31_methods[] = {
+
+    {"numStages", (PyCFunction) Method_arm_biquad_cas_df1_32x64_ins_q31_numStages,METH_NOARGS,"numStages"},
+    {"postShift", (PyCFunction) Method_arm_biquad_cas_df1_32x64_ins_q31_postShift,METH_NOARGS,"postShift"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_biquad_cas_df1_32x64_ins_q31,arm_biquad_cas_df1_32x64_ins_q31_new,arm_biquad_cas_df1_32x64_ins_q31_dealloc,arm_biquad_cas_df1_32x64_ins_q31_init,arm_biquad_cas_df1_32x64_ins_q31_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_biquad_cascade_df2T_instance_f32 *instance;
+} ml_arm_biquad_cascade_df2T_instance_f32Object;
+
+
+static void
+arm_biquad_cascade_df2T_instance_f32_dealloc(ml_arm_biquad_cascade_df2T_instance_f32Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_biquad_cascade_df2T_instance_f32_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_biquad_cascade_df2T_instance_f32Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_biquad_cascade_df2T_instance_f32Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_biquad_cascade_df2T_instance_f32));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_biquad_cascade_df2T_instance_f32_init(ml_arm_biquad_cascade_df2T_instance_f32Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+char *kwlist[] = {
+"numStages",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|i", kwlist,&self->instance->numStages
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_biquad_cascade_df2T_instance_f32,numStages,"i");
+
+
+static PyMethodDef arm_biquad_cascade_df2T_instance_f32_methods[] = {
+
+    {"numStages", (PyCFunction) Method_arm_biquad_cascade_df2T_instance_f32_numStages,METH_NOARGS,"numStages"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_biquad_cascade_df2T_instance_f32,arm_biquad_cascade_df2T_instance_f32_new,arm_biquad_cascade_df2T_instance_f32_dealloc,arm_biquad_cascade_df2T_instance_f32_init,arm_biquad_cascade_df2T_instance_f32_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_biquad_cascade_stereo_df2T_instance_f32 *instance;
+} ml_arm_biquad_cascade_stereo_df2T_instance_f32Object;
+
+
+static void
+arm_biquad_cascade_stereo_df2T_instance_f32_dealloc(ml_arm_biquad_cascade_stereo_df2T_instance_f32Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_biquad_cascade_stereo_df2T_instance_f32_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_biquad_cascade_stereo_df2T_instance_f32Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_biquad_cascade_stereo_df2T_instance_f32Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_biquad_cascade_stereo_df2T_instance_f32));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_biquad_cascade_stereo_df2T_instance_f32_init(ml_arm_biquad_cascade_stereo_df2T_instance_f32Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+char *kwlist[] = {
+"numStages",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|i", kwlist,&self->instance->numStages
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_biquad_cascade_stereo_df2T_instance_f32,numStages,"i");
+
+
+static PyMethodDef arm_biquad_cascade_stereo_df2T_instance_f32_methods[] = {
+
+    {"numStages", (PyCFunction) Method_arm_biquad_cascade_stereo_df2T_instance_f32_numStages,METH_NOARGS,"numStages"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_biquad_cascade_stereo_df2T_instance_f32,arm_biquad_cascade_stereo_df2T_instance_f32_new,arm_biquad_cascade_stereo_df2T_instance_f32_dealloc,arm_biquad_cascade_stereo_df2T_instance_f32_init,arm_biquad_cascade_stereo_df2T_instance_f32_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_biquad_cascade_df2T_instance_f64 *instance;
+} ml_arm_biquad_cascade_df2T_instance_f64Object;
+
+
+static void
+arm_biquad_cascade_df2T_instance_f64_dealloc(ml_arm_biquad_cascade_df2T_instance_f64Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_biquad_cascade_df2T_instance_f64_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_biquad_cascade_df2T_instance_f64Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_biquad_cascade_df2T_instance_f64Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_biquad_cascade_df2T_instance_f64));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_biquad_cascade_df2T_instance_f64_init(ml_arm_biquad_cascade_df2T_instance_f64Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+char *kwlist[] = {
+"numStages",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|i", kwlist,&self->instance->numStages
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_biquad_cascade_df2T_instance_f64,numStages,"i");
+
+
+static PyMethodDef arm_biquad_cascade_df2T_instance_f64_methods[] = {
+
+    {"numStages", (PyCFunction) Method_arm_biquad_cascade_df2T_instance_f64_numStages,METH_NOARGS,"numStages"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_biquad_cascade_df2T_instance_f64,arm_biquad_cascade_df2T_instance_f64_new,arm_biquad_cascade_df2T_instance_f64_dealloc,arm_biquad_cascade_df2T_instance_f64_init,arm_biquad_cascade_df2T_instance_f64_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_fir_lattice_instance_q15 *instance;
+} ml_arm_fir_lattice_instance_q15Object;
+
+
+static void
+arm_fir_lattice_instance_q15_dealloc(ml_arm_fir_lattice_instance_q15Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_fir_lattice_instance_q15_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_fir_lattice_instance_q15Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_fir_lattice_instance_q15Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_fir_lattice_instance_q15));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_fir_lattice_instance_q15_init(ml_arm_fir_lattice_instance_q15Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+char *kwlist[] = {
+"numStages",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|h", kwlist,&self->instance->numStages
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_fir_lattice_instance_q15,numStages,"h");
+
+
+static PyMethodDef arm_fir_lattice_instance_q15_methods[] = {
+
+    {"numStages", (PyCFunction) Method_arm_fir_lattice_instance_q15_numStages,METH_NOARGS,"numStages"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_fir_lattice_instance_q15,arm_fir_lattice_instance_q15_new,arm_fir_lattice_instance_q15_dealloc,arm_fir_lattice_instance_q15_init,arm_fir_lattice_instance_q15_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_fir_lattice_instance_q31 *instance;
+} ml_arm_fir_lattice_instance_q31Object;
+
+
+static void
+arm_fir_lattice_instance_q31_dealloc(ml_arm_fir_lattice_instance_q31Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_fir_lattice_instance_q31_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_fir_lattice_instance_q31Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_fir_lattice_instance_q31Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_fir_lattice_instance_q31));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_fir_lattice_instance_q31_init(ml_arm_fir_lattice_instance_q31Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+char *kwlist[] = {
+"numStages",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|h", kwlist,&self->instance->numStages
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_fir_lattice_instance_q31,numStages,"h");
+
+
+static PyMethodDef arm_fir_lattice_instance_q31_methods[] = {
+
+    {"numStages", (PyCFunction) Method_arm_fir_lattice_instance_q31_numStages,METH_NOARGS,"numStages"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_fir_lattice_instance_q31,arm_fir_lattice_instance_q31_new,arm_fir_lattice_instance_q31_dealloc,arm_fir_lattice_instance_q31_init,arm_fir_lattice_instance_q31_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_fir_lattice_instance_f32 *instance;
+} ml_arm_fir_lattice_instance_f32Object;
+
+
+static void
+arm_fir_lattice_instance_f32_dealloc(ml_arm_fir_lattice_instance_f32Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_fir_lattice_instance_f32_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_fir_lattice_instance_f32Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_fir_lattice_instance_f32Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_fir_lattice_instance_f32));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_fir_lattice_instance_f32_init(ml_arm_fir_lattice_instance_f32Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+char *kwlist[] = {
+"numStages",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|h", kwlist,&self->instance->numStages
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_fir_lattice_instance_f32,numStages,"h");
+
+
+static PyMethodDef arm_fir_lattice_instance_f32_methods[] = {
+
+    {"numStages", (PyCFunction) Method_arm_fir_lattice_instance_f32_numStages,METH_NOARGS,"numStages"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_fir_lattice_instance_f32,arm_fir_lattice_instance_f32_new,arm_fir_lattice_instance_f32_dealloc,arm_fir_lattice_instance_f32_init,arm_fir_lattice_instance_f32_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_iir_lattice_instance_q15 *instance;
+} ml_arm_iir_lattice_instance_q15Object;
+
+
+static void
+arm_iir_lattice_instance_q15_dealloc(ml_arm_iir_lattice_instance_q15Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pkCoeffs)
+       {
+          PyMem_Free(self->instance->pkCoeffs);
+       }
+
+
+       if (self->instance->pvCoeffs)
+       {
+          PyMem_Free(self->instance->pvCoeffs);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_iir_lattice_instance_q15_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_iir_lattice_instance_q15Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_iir_lattice_instance_q15Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_iir_lattice_instance_q15));
+
+        self->instance->pState = NULL;
+        self->instance->pkCoeffs = NULL;
+        self->instance->pvCoeffs = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_iir_lattice_instance_q15_init(ml_arm_iir_lattice_instance_q15Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pkCoeffs=NULL;
+    PyObject *pvCoeffs=NULL;
+char *kwlist[] = {
+"numStages","pkCoeffs","pvCoeffs",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hOO", kwlist,&self->instance->numStages
+,&pkCoeffs
+,&pvCoeffs
+))
+    {
+
+    INITARRAYFIELD(pkCoeffs,NPY_INT16,int16_t,int16_t);
+    INITARRAYFIELD(pvCoeffs,NPY_INT16,int16_t,int16_t);
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_iir_lattice_instance_q15,numStages,"h");
+
+
+static PyMethodDef arm_iir_lattice_instance_q15_methods[] = {
+
+    {"numStages", (PyCFunction) Method_arm_iir_lattice_instance_q15_numStages,METH_NOARGS,"numStages"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_iir_lattice_instance_q15,arm_iir_lattice_instance_q15_new,arm_iir_lattice_instance_q15_dealloc,arm_iir_lattice_instance_q15_init,arm_iir_lattice_instance_q15_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_iir_lattice_instance_q31 *instance;
+} ml_arm_iir_lattice_instance_q31Object;
+
+
+static void
+arm_iir_lattice_instance_q31_dealloc(ml_arm_iir_lattice_instance_q31Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pkCoeffs)
+       {
+          PyMem_Free(self->instance->pkCoeffs);
+       }
+
+
+       if (self->instance->pvCoeffs)
+       {
+          PyMem_Free(self->instance->pvCoeffs);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_iir_lattice_instance_q31_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_iir_lattice_instance_q31Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_iir_lattice_instance_q31Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_iir_lattice_instance_q31));
+
+        self->instance->pState = NULL;
+        self->instance->pkCoeffs = NULL;
+        self->instance->pvCoeffs = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_iir_lattice_instance_q31_init(ml_arm_iir_lattice_instance_q31Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pkCoeffs=NULL;
+    PyObject *pvCoeffs=NULL;
+char *kwlist[] = {
+"numStages","pkCoeffs","pvCoeffs",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hOO", kwlist,&self->instance->numStages
+,&pkCoeffs
+,&pvCoeffs
+))
+    {
+
+    INITARRAYFIELD(pkCoeffs,NPY_INT32,int32_t,int32_t);
+    INITARRAYFIELD(pvCoeffs,NPY_INT32,int32_t,int32_t);
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_iir_lattice_instance_q31,numStages,"h");
+
+
+static PyMethodDef arm_iir_lattice_instance_q31_methods[] = {
+
+    {"numStages", (PyCFunction) Method_arm_iir_lattice_instance_q31_numStages,METH_NOARGS,"numStages"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_iir_lattice_instance_q31,arm_iir_lattice_instance_q31_new,arm_iir_lattice_instance_q31_dealloc,arm_iir_lattice_instance_q31_init,arm_iir_lattice_instance_q31_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_iir_lattice_instance_f32 *instance;
+} ml_arm_iir_lattice_instance_f32Object;
+
+
+static void
+arm_iir_lattice_instance_f32_dealloc(ml_arm_iir_lattice_instance_f32Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pkCoeffs)
+       {
+          PyMem_Free(self->instance->pkCoeffs);
+       }
+
+
+       if (self->instance->pvCoeffs)
+       {
+          PyMem_Free(self->instance->pvCoeffs);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_iir_lattice_instance_f32_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_iir_lattice_instance_f32Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_iir_lattice_instance_f32Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_iir_lattice_instance_f32));
+
+        self->instance->pState = NULL;
+        self->instance->pkCoeffs = NULL;
+        self->instance->pvCoeffs = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_iir_lattice_instance_f32_init(ml_arm_iir_lattice_instance_f32Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pkCoeffs=NULL;
+    PyObject *pvCoeffs=NULL;
+char *kwlist[] = {
+"numStages","pkCoeffs","pvCoeffs",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hOO", kwlist,&self->instance->numStages
+,&pkCoeffs
+,&pvCoeffs
+))
+    {
+
+    INITARRAYFIELD(pkCoeffs,NPY_DOUBLE,double,float32_t);
+    INITARRAYFIELD(pvCoeffs,NPY_DOUBLE,double,float32_t);
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_iir_lattice_instance_f32,numStages,"h");
+
+
+static PyMethodDef arm_iir_lattice_instance_f32_methods[] = {
+
+    {"numStages", (PyCFunction) Method_arm_iir_lattice_instance_f32_numStages,METH_NOARGS,"numStages"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_iir_lattice_instance_f32,arm_iir_lattice_instance_f32_new,arm_iir_lattice_instance_f32_dealloc,arm_iir_lattice_instance_f32_init,arm_iir_lattice_instance_f32_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_lms_instance_f32 *instance;
+} ml_arm_lms_instance_f32Object;
+
+
+static void
+arm_lms_instance_f32_dealloc(ml_arm_lms_instance_f32Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_lms_instance_f32_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_lms_instance_f32Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_lms_instance_f32Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_lms_instance_f32));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_lms_instance_f32_init(ml_arm_lms_instance_f32Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+char *kwlist[] = {
+"numTaps","mu",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hf", kwlist,&self->instance->numTaps
+,&self->instance->mu
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_lms_instance_f32,numTaps,"h");
+GETFIELD(arm_lms_instance_f32,mu,"f");
+
+
+static PyMethodDef arm_lms_instance_f32_methods[] = {
+
+    {"numTaps", (PyCFunction) Method_arm_lms_instance_f32_numTaps,METH_NOARGS,"numTaps"},
+    {"mu", (PyCFunction) Method_arm_lms_instance_f32_mu,METH_NOARGS,"mu"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_lms_instance_f32,arm_lms_instance_f32_new,arm_lms_instance_f32_dealloc,arm_lms_instance_f32_init,arm_lms_instance_f32_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_lms_instance_q15 *instance;
+} ml_arm_lms_instance_q15Object;
+
+
+static void
+arm_lms_instance_q15_dealloc(ml_arm_lms_instance_q15Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_lms_instance_q15_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_lms_instance_q15Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_lms_instance_q15Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_lms_instance_q15));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_lms_instance_q15_init(ml_arm_lms_instance_q15Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+char *kwlist[] = {
+"numTaps","mu","postShift",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hhi", kwlist,&self->instance->numTaps
+,&self->instance->mu
+,&self->instance->postShift
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_lms_instance_q15,numTaps,"h");
+GETFIELD(arm_lms_instance_q15,mu,"h");
+GETFIELD(arm_lms_instance_q15,postShift,"i");
+
+
+static PyMethodDef arm_lms_instance_q15_methods[] = {
+
+    {"numTaps", (PyCFunction) Method_arm_lms_instance_q15_numTaps,METH_NOARGS,"numTaps"},
+    {"mu", (PyCFunction) Method_arm_lms_instance_q15_mu,METH_NOARGS,"mu"},
+    {"postShift", (PyCFunction) Method_arm_lms_instance_q15_postShift,METH_NOARGS,"postShift"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_lms_instance_q15,arm_lms_instance_q15_new,arm_lms_instance_q15_dealloc,arm_lms_instance_q15_init,arm_lms_instance_q15_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_lms_instance_q31 *instance;
+} ml_arm_lms_instance_q31Object;
+
+
+static void
+arm_lms_instance_q31_dealloc(ml_arm_lms_instance_q31Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_lms_instance_q31_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_lms_instance_q31Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_lms_instance_q31Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_lms_instance_q31));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_lms_instance_q31_init(ml_arm_lms_instance_q31Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+char *kwlist[] = {
+"numTaps","mu","postShift",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hii", kwlist,&self->instance->numTaps
+,&self->instance->mu
+,&self->instance->postShift
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_lms_instance_q31,numTaps,"h");
+GETFIELD(arm_lms_instance_q31,mu,"i");
+GETFIELD(arm_lms_instance_q31,postShift,"i");
+
+
+static PyMethodDef arm_lms_instance_q31_methods[] = {
+
+    {"numTaps", (PyCFunction) Method_arm_lms_instance_q31_numTaps,METH_NOARGS,"numTaps"},
+    {"mu", (PyCFunction) Method_arm_lms_instance_q31_mu,METH_NOARGS,"mu"},
+    {"postShift", (PyCFunction) Method_arm_lms_instance_q31_postShift,METH_NOARGS,"postShift"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_lms_instance_q31,arm_lms_instance_q31_new,arm_lms_instance_q31_dealloc,arm_lms_instance_q31_init,arm_lms_instance_q31_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_lms_norm_instance_f32 *instance;
+} ml_arm_lms_norm_instance_f32Object;
+
+
+static void
+arm_lms_norm_instance_f32_dealloc(ml_arm_lms_norm_instance_f32Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_lms_norm_instance_f32_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_lms_norm_instance_f32Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_lms_norm_instance_f32Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_lms_norm_instance_f32));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_lms_norm_instance_f32_init(ml_arm_lms_norm_instance_f32Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+char *kwlist[] = {
+"numTaps","mu","energy","x0",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hfff", kwlist,&self->instance->numTaps
+,&self->instance->mu
+,&self->instance->energy
+,&self->instance->x0
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_lms_norm_instance_f32,numTaps,"h");
+GETFIELD(arm_lms_norm_instance_f32,mu,"f");
+GETFIELD(arm_lms_norm_instance_f32,energy,"f");
+GETFIELD(arm_lms_norm_instance_f32,x0,"f");
+
+
+static PyMethodDef arm_lms_norm_instance_f32_methods[] = {
+
+    {"numTaps", (PyCFunction) Method_arm_lms_norm_instance_f32_numTaps,METH_NOARGS,"numTaps"},
+    {"mu", (PyCFunction) Method_arm_lms_norm_instance_f32_mu,METH_NOARGS,"mu"},
+    {"energy", (PyCFunction) Method_arm_lms_norm_instance_f32_energy,METH_NOARGS,"energy"},
+    {"x0", (PyCFunction) Method_arm_lms_norm_instance_f32_x0,METH_NOARGS,"x0"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_lms_norm_instance_f32,arm_lms_norm_instance_f32_new,arm_lms_norm_instance_f32_dealloc,arm_lms_norm_instance_f32_init,arm_lms_norm_instance_f32_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_lms_norm_instance_q31 *instance;
+} ml_arm_lms_norm_instance_q31Object;
+
+
+static void
+arm_lms_norm_instance_q31_dealloc(ml_arm_lms_norm_instance_q31Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_lms_norm_instance_q31_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_lms_norm_instance_q31Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_lms_norm_instance_q31Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_lms_norm_instance_q31));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+        self->instance->recipTable = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_lms_norm_instance_q31_init(ml_arm_lms_norm_instance_q31Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+    PyObject *recipTable=NULL;
+char *kwlist[] = {
+"numTaps","mu","postShift","energy","x0",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hiiii", kwlist,&self->instance->numTaps
+,&self->instance->mu
+,&self->instance->postShift
+,&self->instance->energy
+,&self->instance->x0
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_lms_norm_instance_q31,numTaps,"h");
+GETFIELD(arm_lms_norm_instance_q31,mu,"i");
+GETFIELD(arm_lms_norm_instance_q31,postShift,"i");
+GETFIELD(arm_lms_norm_instance_q31,energy,"i");
+GETFIELD(arm_lms_norm_instance_q31,x0,"i");
+
+
+static PyMethodDef arm_lms_norm_instance_q31_methods[] = {
+
+    {"numTaps", (PyCFunction) Method_arm_lms_norm_instance_q31_numTaps,METH_NOARGS,"numTaps"},
+    {"mu", (PyCFunction) Method_arm_lms_norm_instance_q31_mu,METH_NOARGS,"mu"},
+    {"postShift", (PyCFunction) Method_arm_lms_norm_instance_q31_postShift,METH_NOARGS,"postShift"},
+    {"energy", (PyCFunction) Method_arm_lms_norm_instance_q31_energy,METH_NOARGS,"energy"},
+    {"x0", (PyCFunction) Method_arm_lms_norm_instance_q31_x0,METH_NOARGS,"x0"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_lms_norm_instance_q31,arm_lms_norm_instance_q31_new,arm_lms_norm_instance_q31_dealloc,arm_lms_norm_instance_q31_init,arm_lms_norm_instance_q31_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_lms_norm_instance_q15 *instance;
+} ml_arm_lms_norm_instance_q15Object;
+
+
+static void
+arm_lms_norm_instance_q15_dealloc(ml_arm_lms_norm_instance_q15Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_lms_norm_instance_q15_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_lms_norm_instance_q15Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_lms_norm_instance_q15Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_lms_norm_instance_q15));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+        self->instance->recipTable = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_lms_norm_instance_q15_init(ml_arm_lms_norm_instance_q15Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+    PyObject *recipTable=NULL;
+char *kwlist[] = {
+"numTaps","mu","postShift","energy","x0",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hhihh", kwlist,&self->instance->numTaps
+,&self->instance->mu
+,&self->instance->postShift
+,&self->instance->energy
+,&self->instance->x0
+))
+    {
+
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_lms_norm_instance_q15,numTaps,"h");
+GETFIELD(arm_lms_norm_instance_q15,mu,"h");
+GETFIELD(arm_lms_norm_instance_q15,postShift,"i");
+GETFIELD(arm_lms_norm_instance_q15,energy,"h");
+GETFIELD(arm_lms_norm_instance_q15,x0,"h");
+
+
+static PyMethodDef arm_lms_norm_instance_q15_methods[] = {
+
+    {"numTaps", (PyCFunction) Method_arm_lms_norm_instance_q15_numTaps,METH_NOARGS,"numTaps"},
+    {"mu", (PyCFunction) Method_arm_lms_norm_instance_q15_mu,METH_NOARGS,"mu"},
+    {"postShift", (PyCFunction) Method_arm_lms_norm_instance_q15_postShift,METH_NOARGS,"postShift"},
+    {"energy", (PyCFunction) Method_arm_lms_norm_instance_q15_energy,METH_NOARGS,"energy"},
+    {"x0", (PyCFunction) Method_arm_lms_norm_instance_q15_x0,METH_NOARGS,"x0"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_lms_norm_instance_q15,arm_lms_norm_instance_q15_new,arm_lms_norm_instance_q15_dealloc,arm_lms_norm_instance_q15_init,arm_lms_norm_instance_q15_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_fir_sparse_instance_f32 *instance;
+} ml_arm_fir_sparse_instance_f32Object;
+
+
+static void
+arm_fir_sparse_instance_f32_dealloc(ml_arm_fir_sparse_instance_f32Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       if (self->instance->pTapDelay)
+       {
+          PyMem_Free(self->instance->pTapDelay);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_fir_sparse_instance_f32_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_fir_sparse_instance_f32Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_fir_sparse_instance_f32Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_fir_sparse_instance_f32));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+        self->instance->pTapDelay = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_fir_sparse_instance_f32_init(ml_arm_fir_sparse_instance_f32Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+    PyObject *pTapDelay=NULL;
+char *kwlist[] = {
+"numTaps","stateIndex","maxDelay","pTapDelay",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hhhO", kwlist,&self->instance->numTaps
+,&self->instance->stateIndex
+,&self->instance->maxDelay
+,&pTapDelay
+))
+    {
+
+    INITARRAYFIELD(pTapDelay,NPY_INT32,int32_t,int32_t);
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_fir_sparse_instance_f32,numTaps,"h");
+GETFIELD(arm_fir_sparse_instance_f32,stateIndex,"h");
+GETFIELD(arm_fir_sparse_instance_f32,maxDelay,"h");
+
+
+static PyMethodDef arm_fir_sparse_instance_f32_methods[] = {
+
+    {"numTaps", (PyCFunction) Method_arm_fir_sparse_instance_f32_numTaps,METH_NOARGS,"numTaps"},
+    {"stateIndex", (PyCFunction) Method_arm_fir_sparse_instance_f32_stateIndex,METH_NOARGS,"stateIndex"},
+    {"maxDelay", (PyCFunction) Method_arm_fir_sparse_instance_f32_maxDelay,METH_NOARGS,"maxDelay"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_fir_sparse_instance_f32,arm_fir_sparse_instance_f32_new,arm_fir_sparse_instance_f32_dealloc,arm_fir_sparse_instance_f32_init,arm_fir_sparse_instance_f32_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_fir_sparse_instance_q31 *instance;
+} ml_arm_fir_sparse_instance_q31Object;
+
+
+static void
+arm_fir_sparse_instance_q31_dealloc(ml_arm_fir_sparse_instance_q31Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       if (self->instance->pTapDelay)
+       {
+          PyMem_Free(self->instance->pTapDelay);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_fir_sparse_instance_q31_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_fir_sparse_instance_q31Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_fir_sparse_instance_q31Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_fir_sparse_instance_q31));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+        self->instance->pTapDelay = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_fir_sparse_instance_q31_init(ml_arm_fir_sparse_instance_q31Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+    PyObject *pTapDelay=NULL;
+char *kwlist[] = {
+"numTaps","stateIndex","maxDelay","pTapDelay",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hhhO", kwlist,&self->instance->numTaps
+,&self->instance->stateIndex
+,&self->instance->maxDelay
+,&pTapDelay
+))
+    {
+
+    INITARRAYFIELD(pTapDelay,NPY_INT32,int32_t,int32_t);
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_fir_sparse_instance_q31,numTaps,"h");
+GETFIELD(arm_fir_sparse_instance_q31,stateIndex,"h");
+GETFIELD(arm_fir_sparse_instance_q31,maxDelay,"h");
+
+
+static PyMethodDef arm_fir_sparse_instance_q31_methods[] = {
+
+    {"numTaps", (PyCFunction) Method_arm_fir_sparse_instance_q31_numTaps,METH_NOARGS,"numTaps"},
+    {"stateIndex", (PyCFunction) Method_arm_fir_sparse_instance_q31_stateIndex,METH_NOARGS,"stateIndex"},
+    {"maxDelay", (PyCFunction) Method_arm_fir_sparse_instance_q31_maxDelay,METH_NOARGS,"maxDelay"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_fir_sparse_instance_q31,arm_fir_sparse_instance_q31_new,arm_fir_sparse_instance_q31_dealloc,arm_fir_sparse_instance_q31_init,arm_fir_sparse_instance_q31_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_fir_sparse_instance_q15 *instance;
+} ml_arm_fir_sparse_instance_q15Object;
+
+
+static void
+arm_fir_sparse_instance_q15_dealloc(ml_arm_fir_sparse_instance_q15Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       if (self->instance->pTapDelay)
+       {
+          PyMem_Free(self->instance->pTapDelay);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_fir_sparse_instance_q15_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_fir_sparse_instance_q15Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_fir_sparse_instance_q15Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_fir_sparse_instance_q15));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+        self->instance->pTapDelay = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_fir_sparse_instance_q15_init(ml_arm_fir_sparse_instance_q15Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+    PyObject *pTapDelay=NULL;
+char *kwlist[] = {
+"numTaps","stateIndex","maxDelay","pTapDelay",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hhhO", kwlist,&self->instance->numTaps
+,&self->instance->stateIndex
+,&self->instance->maxDelay
+,&pTapDelay
+))
+    {
+
+    INITARRAYFIELD(pTapDelay,NPY_INT32,int32_t,int32_t);
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_fir_sparse_instance_q15,numTaps,"h");
+GETFIELD(arm_fir_sparse_instance_q15,stateIndex,"h");
+GETFIELD(arm_fir_sparse_instance_q15,maxDelay,"h");
+
+
+static PyMethodDef arm_fir_sparse_instance_q15_methods[] = {
+
+    {"numTaps", (PyCFunction) Method_arm_fir_sparse_instance_q15_numTaps,METH_NOARGS,"numTaps"},
+    {"stateIndex", (PyCFunction) Method_arm_fir_sparse_instance_q15_stateIndex,METH_NOARGS,"stateIndex"},
+    {"maxDelay", (PyCFunction) Method_arm_fir_sparse_instance_q15_maxDelay,METH_NOARGS,"maxDelay"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_fir_sparse_instance_q15,arm_fir_sparse_instance_q15_new,arm_fir_sparse_instance_q15_dealloc,arm_fir_sparse_instance_q15_init,arm_fir_sparse_instance_q15_methods);
+
+
+typedef struct {
+    PyObject_HEAD
+    arm_fir_sparse_instance_q7 *instance;
+} ml_arm_fir_sparse_instance_q7Object;
+
+
+static void
+arm_fir_sparse_instance_q7_dealloc(ml_arm_fir_sparse_instance_q7Object* self)
+{
+    //printf("Dealloc called\n");
+    if (self->instance)
+    {
+
+
+       if (self->instance->pState)
+       {
+          PyMem_Free(self->instance->pState);
+       }
+
+
+       if (self->instance->pCoeffs)
+       {
+          PyMem_Free(self->instance->pCoeffs);
+       }
+
+
+       if (self->instance->pTapDelay)
+       {
+          PyMem_Free(self->instance->pTapDelay);
+       }
+
+
+       PyMem_Free(self->instance);
+    }
+
+    Py_TYPE(self)->tp_free((PyObject*)self);
+}
+
+
+static PyObject *
+arm_fir_sparse_instance_q7_new(PyTypeObject *type, PyObject *args, PyObject *kwds)
+{
+    ml_arm_fir_sparse_instance_q7Object *self;
+    //printf("New called\n");
+
+    self = (ml_arm_fir_sparse_instance_q7Object *)type->tp_alloc(type, 0);
+    //printf("alloc called\n");
+
+    if (self != NULL) {
+
+        self->instance = PyMem_Malloc(sizeof(arm_fir_sparse_instance_q7));
+
+        self->instance->pState = NULL;
+        self->instance->pCoeffs = NULL;
+        self->instance->pTapDelay = NULL;
+
+    }
+ 
+   
+    return (PyObject *)self;
+}
+
+static int
+arm_fir_sparse_instance_q7_init(ml_arm_fir_sparse_instance_q7Object *self, PyObject *args, PyObject *kwds)
+{
+
+    PyObject *pState=NULL;
+    PyObject *pCoeffs=NULL;
+    PyObject *pTapDelay=NULL;
+char *kwlist[] = {
+"numTaps","stateIndex","maxDelay","pTapDelay",NULL
+};
+
+if (PyArg_ParseTupleAndKeywords(args, kwds, "|hhhO", kwlist,&self->instance->numTaps
+,&self->instance->stateIndex
+,&self->instance->maxDelay
+,&pTapDelay
+))
+    {
+
+    INITARRAYFIELD(pTapDelay,NPY_INT32,int32_t,int32_t);
+
+    }
+    return 0;
+}
+
+GETFIELD(arm_fir_sparse_instance_q7,numTaps,"h");
+GETFIELD(arm_fir_sparse_instance_q7,stateIndex,"h");
+GETFIELD(arm_fir_sparse_instance_q7,maxDelay,"h");
+
+
+static PyMethodDef arm_fir_sparse_instance_q7_methods[] = {
+
+    {"numTaps", (PyCFunction) Method_arm_fir_sparse_instance_q7_numTaps,METH_NOARGS,"numTaps"},
+    {"stateIndex", (PyCFunction) Method_arm_fir_sparse_instance_q7_stateIndex,METH_NOARGS,"stateIndex"},
+    {"maxDelay", (PyCFunction) Method_arm_fir_sparse_instance_q7_maxDelay,METH_NOARGS,"maxDelay"},
+
+    {NULL}  /* Sentinel */
+};
+
+
+MLTYPE(arm_fir_sparse_instance_q7,arm_fir_sparse_instance_q7_new,arm_fir_sparse_instance_q7_dealloc,arm_fir_sparse_instance_q7_init,arm_fir_sparse_instance_q7_methods);
+
+
+void typeRegistration(PyObject *module) {
+
+  ADDTYPE(arm_fir_instance_q7);
+  ADDTYPE(arm_fir_instance_q15);
+  ADDTYPE(arm_fir_instance_q31);
+  ADDTYPE(arm_fir_instance_f32);
+  ADDTYPE(arm_biquad_casd_df1_inst_q15);
+  ADDTYPE(arm_biquad_casd_df1_inst_q31);
+  ADDTYPE(arm_biquad_casd_df1_inst_f32);
+  ADDTYPE(arm_matrix_instance_f32);
+  ADDTYPE(arm_matrix_instance_f64);
+  ADDTYPE(arm_matrix_instance_q15);
+  ADDTYPE(arm_matrix_instance_q31);
+  ADDTYPE(arm_pid_instance_q15);
+  ADDTYPE(arm_pid_instance_q31);
+  ADDTYPE(arm_pid_instance_f32);
+  ADDTYPE(arm_linear_interp_instance_f32);
+  ADDTYPE(arm_bilinear_interp_instance_f32);
+  ADDTYPE(arm_bilinear_interp_instance_q31);
+  ADDTYPE(arm_bilinear_interp_instance_q15);
+  ADDTYPE(arm_bilinear_interp_instance_q7);
+  ADDTYPE(arm_cfft_radix2_instance_q15);
+  ADDTYPE(arm_cfft_radix4_instance_q15);
+  ADDTYPE(arm_cfft_radix2_instance_q31);
+  ADDTYPE(arm_cfft_radix4_instance_q31);
+  ADDTYPE(arm_cfft_radix2_instance_f32);
+  ADDTYPE(arm_cfft_radix4_instance_f32);
+  ADDTYPE(arm_cfft_instance_q15);
+  ADDTYPE(arm_cfft_instance_q31);
+  ADDTYPE(arm_cfft_instance_f32);
+  ADDTYPE(arm_rfft_instance_q15);
+  ADDTYPE(arm_rfft_instance_q31);
+  ADDTYPE(arm_rfft_instance_f32);
+  ADDTYPE(arm_rfft_fast_instance_f32);
+  ADDTYPE(arm_dct4_instance_f32);
+  ADDTYPE(arm_dct4_instance_q31);
+  ADDTYPE(arm_dct4_instance_q15);
+  ADDTYPE(arm_fir_decimate_instance_q15);
+  ADDTYPE(arm_fir_decimate_instance_q31);
+  ADDTYPE(arm_fir_decimate_instance_f32);
+  ADDTYPE(arm_fir_interpolate_instance_q15);
+  ADDTYPE(arm_fir_interpolate_instance_q31);
+  ADDTYPE(arm_fir_interpolate_instance_f32);
+  ADDTYPE(arm_biquad_cas_df1_32x64_ins_q31);
+  ADDTYPE(arm_biquad_cascade_df2T_instance_f32);
+  ADDTYPE(arm_biquad_cascade_stereo_df2T_instance_f32);
+  ADDTYPE(arm_biquad_cascade_df2T_instance_f64);
+  ADDTYPE(arm_fir_lattice_instance_q15);
+  ADDTYPE(arm_fir_lattice_instance_q31);
+  ADDTYPE(arm_fir_lattice_instance_f32);
+  ADDTYPE(arm_iir_lattice_instance_q15);
+  ADDTYPE(arm_iir_lattice_instance_q31);
+  ADDTYPE(arm_iir_lattice_instance_f32);
+  ADDTYPE(arm_lms_instance_f32);
+  ADDTYPE(arm_lms_instance_q15);
+  ADDTYPE(arm_lms_instance_q31);
+  ADDTYPE(arm_lms_norm_instance_f32);
+  ADDTYPE(arm_lms_norm_instance_q31);
+  ADDTYPE(arm_lms_norm_instance_q15);
+  ADDTYPE(arm_fir_sparse_instance_f32);
+  ADDTYPE(arm_fir_sparse_instance_q31);
+  ADDTYPE(arm_fir_sparse_instance_q15);
+  ADDTYPE(arm_fir_sparse_instance_q7);
+
+}
+
+
+static PyObject *
+cmsis_arm_recip_q31(PyObject *obj, PyObject *args)
+{
+
+  q31_t in; // input
+  q31_t *dst=NULL; // output
+  PyObject *pRecipTable=NULL; // input
+  q31_t *pRecipTable_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"iO",&in,&pRecipTable))
+  {
+
+    GETARGUMENT(pRecipTable,NPY_INT32,int32_t,int32_t);
+    
+    dst=PyMem_Malloc(sizeof(q31_t)*1);
+
+
+    uint32_t returnValue = arm_recip_q31(in,dst,pRecipTable_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* dstOBJ=Py_BuildValue("i",*dst);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,dstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    Py_DECREF(dstOBJ);
+    FREEARGUMENT(pRecipTable_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_recip_q15(PyObject *obj, PyObject *args)
+{
+
+  q15_t in; // input
+  q15_t *dst=NULL; // output
+  PyObject *pRecipTable=NULL; // input
+  q15_t *pRecipTable_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"hO",&in,&pRecipTable))
+  {
+
+    GETARGUMENT(pRecipTable,NPY_INT16,int16_t,int16_t);
+    
+    dst=PyMem_Malloc(sizeof(q15_t)*1);
+
+
+    uint32_t returnValue = arm_recip_q15(in,dst,pRecipTable_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* dstOBJ=Py_BuildValue("h",*dst);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,dstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    Py_DECREF(dstOBJ);
+    FREEARGUMENT(pRecipTable_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q7_t *pSrc_converted=NULL; // input
+  q7_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_fir_instance_q7Object *selfS = (ml_arm_fir_instance_q7Object *)S;
+    GETARGUMENT(pSrc,NPY_BYTE,int8_t,q7_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q7_t)*blockSize);
+
+
+    arm_fir_q7(selfS->instance,pSrc_converted,pDst,blockSize);
+ INT8ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_init_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t numTaps; // input
+  PyObject *pCoeffs=NULL; // input
+  q7_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  q7_t *pState_converted=NULL; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OhOO",&S,&numTaps,&pCoeffs,&pState))
+  {
+
+    ml_arm_fir_instance_q7Object *selfS = (ml_arm_fir_instance_q7Object *)S;
+    GETARGUMENT(pCoeffs,NPY_BYTE,int8_t,q7_t);
+    GETARGUMENT(pState,NPY_BYTE,int8_t,q7_t);
+    blockSize = arraySizepState - arraySizepCoeffs + 1;
+
+    arm_fir_init_q7(selfS->instance,numTaps,pCoeffs_converted,pState_converted,blockSize);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  q15_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_fir_instance_q15Object *selfS = (ml_arm_fir_instance_q15Object *)S;
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*blockSize);
+
+
+    arm_fir_q15(selfS->instance,pSrc_converted,pDst,blockSize);
+ INT16ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_fast_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  q15_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_fir_instance_q15Object *selfS = (ml_arm_fir_instance_q15Object *)S;
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*blockSize);
+
+
+    arm_fir_fast_q15(selfS->instance,pSrc_converted,pDst,blockSize);
+ INT16ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_init_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t numTaps; // input
+  PyObject *pCoeffs=NULL; // input
+  q15_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  q15_t *pState_converted=NULL; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OhOO",&S,&numTaps,&pCoeffs,&pState))
+  {
+
+    ml_arm_fir_instance_q15Object *selfS = (ml_arm_fir_instance_q15Object *)S;
+    GETARGUMENT(pCoeffs,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pState,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepState - arraySizepCoeffs + 1;
+
+    arm_status returnValue = arm_fir_init_q15(selfS->instance,numTaps,pCoeffs_converted,pState_converted,blockSize);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_fir_instance_q31Object *selfS = (ml_arm_fir_instance_q31Object *)S;
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_fir_q31(selfS->instance,pSrc_converted,pDst,blockSize);
+ INT32ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_fast_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_fir_instance_q31Object *selfS = (ml_arm_fir_instance_q31Object *)S;
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_fir_fast_q31(selfS->instance,pSrc_converted,pDst,blockSize);
+ INT32ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_init_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t numTaps; // input
+  PyObject *pCoeffs=NULL; // input
+  q31_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  q31_t *pState_converted=NULL; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OhOO",&S,&numTaps,&pCoeffs,&pState))
+  {
+
+    ml_arm_fir_instance_q31Object *selfS = (ml_arm_fir_instance_q31Object *)S;
+    GETARGUMENT(pCoeffs,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pState,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepState - arraySizepCoeffs + 1;
+
+    arm_fir_init_q31(selfS->instance,numTaps,pCoeffs_converted,pState_converted,blockSize);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  float32_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_fir_instance_f32Object *selfS = (ml_arm_fir_instance_f32Object *)S;
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*blockSize);
+
+
+    arm_fir_f32(selfS->instance,pSrc_converted,pDst,blockSize);
+ FLOATARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t numTaps; // input
+  PyObject *pCoeffs=NULL; // input
+  float32_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  float32_t *pState_converted=NULL; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OhOO",&S,&numTaps,&pCoeffs,&pState))
+  {
+
+    ml_arm_fir_instance_f32Object *selfS = (ml_arm_fir_instance_f32Object *)S;
+    GETARGUMENT(pCoeffs,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pState,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepState - arraySizepCoeffs + 1;
+
+    arm_fir_init_f32(selfS->instance,numTaps,pCoeffs_converted,pState_converted,blockSize);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_biquad_cascade_df1_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  q15_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_biquad_casd_df1_inst_q15Object *selfS = (ml_arm_biquad_casd_df1_inst_q15Object *)S;
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*blockSize);
+
+
+    arm_biquad_cascade_df1_q15(selfS->instance,pSrc_converted,pDst,blockSize);
+ INT16ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_biquad_cascade_df1_init_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint32_t numStages; // input
+  PyObject *pCoeffs=NULL; // input
+  q15_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  q15_t *pState_converted=NULL; // input
+  int32_t postShift; // input
+
+  if (PyArg_ParseTuple(args,"OiOOi",&S,&numStages,&pCoeffs,&pState,&postShift))
+  {
+
+    ml_arm_biquad_casd_df1_inst_q15Object *selfS = (ml_arm_biquad_casd_df1_inst_q15Object *)S;
+    GETARGUMENT(pCoeffs,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pState,NPY_INT16,int16_t,int16_t);
+
+    arm_biquad_cascade_df1_init_q15(selfS->instance,(uint8_t)numStages,pCoeffs_converted,pState_converted,(int8_t)postShift);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_biquad_cascade_df1_fast_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  q15_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_biquad_casd_df1_inst_q15Object *selfS = (ml_arm_biquad_casd_df1_inst_q15Object *)S;
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*blockSize);
+
+
+    arm_biquad_cascade_df1_fast_q15(selfS->instance,pSrc_converted,pDst,blockSize);
+ INT16ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_biquad_cascade_df1_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_biquad_casd_df1_inst_q31Object *selfS = (ml_arm_biquad_casd_df1_inst_q31Object *)S;
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_biquad_cascade_df1_q31(selfS->instance,pSrc_converted,pDst,blockSize);
+ INT32ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_biquad_cascade_df1_fast_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_biquad_casd_df1_inst_q31Object *selfS = (ml_arm_biquad_casd_df1_inst_q31Object *)S;
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_biquad_cascade_df1_fast_q31(selfS->instance,pSrc_converted,pDst,blockSize);
+ INT32ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_biquad_cascade_df1_init_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint32_t numStages; // input
+  PyObject *pCoeffs=NULL; // input
+  q31_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  q31_t *pState_converted=NULL; // input
+  int32_t postShift; // input
+
+  if (PyArg_ParseTuple(args,"OiOOi",&S,&numStages,&pCoeffs,&pState,&postShift))
+  {
+
+    ml_arm_biquad_casd_df1_inst_q31Object *selfS = (ml_arm_biquad_casd_df1_inst_q31Object *)S;
+    GETARGUMENT(pCoeffs,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pState,NPY_INT32,int32_t,int32_t);
+
+    arm_biquad_cascade_df1_init_q31(selfS->instance,(uint8_t)numStages,pCoeffs_converted,pState_converted,(int8_t)postShift);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_biquad_cascade_df1_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  float32_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_biquad_casd_df1_inst_f32Object *selfS = (ml_arm_biquad_casd_df1_inst_f32Object *)S;
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*blockSize);
+
+
+    arm_biquad_cascade_df1_f32(selfS->instance,pSrc_converted,pDst,blockSize);
+ FLOATARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_biquad_cascade_df1_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint32_t numStages; // input
+  PyObject *pCoeffs=NULL; // input
+  float32_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  float32_t *pState_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OiOO",&S,&numStages,&pCoeffs,&pState))
+  {
+
+    ml_arm_biquad_casd_df1_inst_f32Object *selfS = (ml_arm_biquad_casd_df1_inst_f32Object *)S;
+    GETARGUMENT(pCoeffs,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pState,NPY_DOUBLE,double,float32_t);
+
+    arm_biquad_cascade_df1_init_f32(selfS->instance,(uint8_t)numStages,pCoeffs_converted,pState_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mat_add_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  arm_matrix_instance_f32 *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  arm_matrix_instance_f32 *pSrcB_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    arm_matrix_instance_f32 *pSrcA_converted = f32MatrixFromNumpy(pSrcA);
+    arm_matrix_instance_f32 *pSrcB_converted = f32MatrixFromNumpy(pSrcB);
+    uint32_t row = pSrcA_converted->numRows ;
+    uint32_t column = pSrcB_converted->numCols ;
+    arm_matrix_instance_f32 *pDst_converted = createf32Matrix(row,column);
+
+    arm_status returnValue = arm_mat_add_f32(pSrcA_converted,pSrcB_converted,pDst_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* pDstOBJ=NumpyArrayFromf32Matrix(pDst_converted);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mat_add_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  arm_matrix_instance_q15 *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  arm_matrix_instance_q15 *pSrcB_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    arm_matrix_instance_q15 *pSrcA_converted = q15MatrixFromNumpy(pSrcA);
+    arm_matrix_instance_q15 *pSrcB_converted = q15MatrixFromNumpy(pSrcB);
+    uint32_t row = pSrcA_converted->numRows ;
+    uint32_t column = pSrcB_converted->numCols ;
+    arm_matrix_instance_q15 *pDst_converted = createq15Matrix(row,column);
+
+    arm_status returnValue = arm_mat_add_q15(pSrcA_converted,pSrcB_converted,pDst_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* pDstOBJ=NumpyArrayFromq15Matrix(pDst_converted);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mat_add_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  arm_matrix_instance_q31 *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  arm_matrix_instance_q31 *pSrcB_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    arm_matrix_instance_q31 *pSrcA_converted = q31MatrixFromNumpy(pSrcA);
+    arm_matrix_instance_q31 *pSrcB_converted = q31MatrixFromNumpy(pSrcB);
+    uint32_t row = pSrcA_converted->numRows ;
+    uint32_t column = pSrcB_converted->numCols ;
+    arm_matrix_instance_q31 *pDst_converted = createq31Matrix(row,column);
+
+    arm_status returnValue = arm_mat_add_q31(pSrcA_converted,pSrcB_converted,pDst_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* pDstOBJ=NumpyArrayFromq31Matrix(pDst_converted);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mat_cmplx_mult_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  arm_matrix_instance_f32 *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  arm_matrix_instance_f32 *pSrcB_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    arm_matrix_instance_f32 *pSrcA_converted = f32MatrixFromNumpy(pSrcA);
+    arm_matrix_instance_f32 *pSrcB_converted = f32MatrixFromNumpy(pSrcB);
+    pSrcA_converted->numCols = pSrcA_converted->numCols / 2;
+    pSrcB_converted->numCols = pSrcB_converted->numCols / 2;
+    uint32_t row = pSrcA_converted->numRows ;
+    uint32_t column = pSrcB_converted->numCols * 2;
+    arm_matrix_instance_f32 *pDst_converted = createf32Matrix(row,column);
+
+    arm_status returnValue = arm_mat_cmplx_mult_f32(pSrcA_converted,pSrcB_converted,pDst_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* pDstOBJ=NumpyArrayFromf32Matrix(pDst_converted);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mat_cmplx_mult_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  arm_matrix_instance_q15 *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  arm_matrix_instance_q15 *pSrcB_converted=NULL; // input
+  PyObject *pScratch=NULL; // input
+  q15_t *pScratch_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OOO",&pSrcA,&pSrcB,&pScratch))
+  {
+
+    arm_matrix_instance_q15 *pSrcA_converted = q15MatrixFromNumpy(pSrcA);
+    arm_matrix_instance_q15 *pSrcB_converted = q15MatrixFromNumpy(pSrcB);
+    GETARGUMENT(pScratch,NPY_INT16,int16_t,int16_t);
+    pSrcA_converted->numCols = pSrcA_converted->numCols / 2;
+    pSrcB_converted->numCols = pSrcB_converted->numCols / 2;
+    uint32_t row = pSrcA_converted->numRows ;
+    uint32_t column = pSrcB_converted->numCols * 2;
+    arm_matrix_instance_q15 *pDst_converted = createq15Matrix(row,column);
+
+    arm_status returnValue = arm_mat_cmplx_mult_q15(pSrcA_converted,pSrcB_converted,pDst_converted,pScratch_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* pDstOBJ=NumpyArrayFromq15Matrix(pDst_converted);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    FREEARGUMENT(pScratch_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mat_cmplx_mult_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  arm_matrix_instance_q31 *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  arm_matrix_instance_q31 *pSrcB_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    arm_matrix_instance_q31 *pSrcA_converted = q31MatrixFromNumpy(pSrcA);
+    arm_matrix_instance_q31 *pSrcB_converted = q31MatrixFromNumpy(pSrcB);
+    pSrcA_converted->numCols = pSrcA_converted->numCols / 2;
+    pSrcB_converted->numCols = pSrcB_converted->numCols / 2;
+    uint32_t row = pSrcA_converted->numRows ;
+    uint32_t column = pSrcB_converted->numCols * 2;
+    arm_matrix_instance_q31 *pDst_converted = createq31Matrix(row,column);
+
+    arm_status returnValue = arm_mat_cmplx_mult_q31(pSrcA_converted,pSrcB_converted,pDst_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* pDstOBJ=NumpyArrayFromq31Matrix(pDst_converted);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mat_trans_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  arm_matrix_instance_f32 *pSrc_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    arm_matrix_instance_f32 *pSrc_converted = f32MatrixFromNumpy(pSrc);
+    uint32_t row = pSrc_converted->numCols ;
+    uint32_t column = pSrc_converted->numRows ;
+    arm_matrix_instance_f32 *pDst_converted = createf32Matrix(row,column);
+
+    arm_status returnValue = arm_mat_trans_f32(pSrc_converted,pDst_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* pDstOBJ=NumpyArrayFromf32Matrix(pDst_converted);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mat_trans_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  arm_matrix_instance_q15 *pSrc_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    arm_matrix_instance_q15 *pSrc_converted = q15MatrixFromNumpy(pSrc);
+    uint32_t row = pSrc_converted->numCols ;
+    uint32_t column = pSrc_converted->numRows ;
+    arm_matrix_instance_q15 *pDst_converted = createq15Matrix(row,column);
+
+    arm_status returnValue = arm_mat_trans_q15(pSrc_converted,pDst_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* pDstOBJ=NumpyArrayFromq15Matrix(pDst_converted);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mat_trans_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  arm_matrix_instance_q31 *pSrc_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    arm_matrix_instance_q31 *pSrc_converted = q31MatrixFromNumpy(pSrc);
+    uint32_t row = pSrc_converted->numCols ;
+    uint32_t column = pSrc_converted->numRows ;
+    arm_matrix_instance_q31 *pDst_converted = createq31Matrix(row,column);
+
+    arm_status returnValue = arm_mat_trans_q31(pSrc_converted,pDst_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* pDstOBJ=NumpyArrayFromq31Matrix(pDst_converted);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mat_mult_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  arm_matrix_instance_f32 *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  arm_matrix_instance_f32 *pSrcB_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    arm_matrix_instance_f32 *pSrcA_converted = f32MatrixFromNumpy(pSrcA);
+    arm_matrix_instance_f32 *pSrcB_converted = f32MatrixFromNumpy(pSrcB);
+    uint32_t row = pSrcA_converted->numRows ;
+    uint32_t column = pSrcB_converted->numCols ;
+    arm_matrix_instance_f32 *pDst_converted = createf32Matrix(row,column);
+
+    arm_status returnValue = arm_mat_mult_f32(pSrcA_converted,pSrcB_converted,pDst_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* pDstOBJ=NumpyArrayFromf32Matrix(pDst_converted);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mat_mult_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  arm_matrix_instance_q15 *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  arm_matrix_instance_q15 *pSrcB_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  q15_t *pState_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OOO",&pSrcA,&pSrcB,&pState))
+  {
+
+    arm_matrix_instance_q15 *pSrcA_converted = q15MatrixFromNumpy(pSrcA);
+    arm_matrix_instance_q15 *pSrcB_converted = q15MatrixFromNumpy(pSrcB);
+    GETARGUMENT(pState,NPY_INT16,int16_t,int16_t);
+    uint32_t row = pSrcA_converted->numRows ;
+    uint32_t column = pSrcB_converted->numCols ;
+    arm_matrix_instance_q15 *pDst_converted = createq15Matrix(row,column);
+
+    arm_status returnValue = arm_mat_mult_q15(pSrcA_converted,pSrcB_converted,pDst_converted,pState_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* pDstOBJ=NumpyArrayFromq15Matrix(pDst_converted);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    FREEARGUMENT(pState_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mat_mult_fast_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  arm_matrix_instance_q15 *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  arm_matrix_instance_q15 *pSrcB_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  q15_t *pState_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OOO",&pSrcA,&pSrcB,&pState))
+  {
+
+    arm_matrix_instance_q15 *pSrcA_converted = q15MatrixFromNumpy(pSrcA);
+    arm_matrix_instance_q15 *pSrcB_converted = q15MatrixFromNumpy(pSrcB);
+    GETARGUMENT(pState,NPY_INT16,int16_t,int16_t);
+    uint32_t row = pSrcA_converted->numRows ;
+    uint32_t column = pSrcB_converted->numCols ;
+    arm_matrix_instance_q15 *pDst_converted = createq15Matrix(row,column);
+
+    arm_status returnValue = arm_mat_mult_fast_q15(pSrcA_converted,pSrcB_converted,pDst_converted,pState_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* pDstOBJ=NumpyArrayFromq15Matrix(pDst_converted);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    FREEARGUMENT(pState_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mat_mult_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  arm_matrix_instance_q31 *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  arm_matrix_instance_q31 *pSrcB_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    arm_matrix_instance_q31 *pSrcA_converted = q31MatrixFromNumpy(pSrcA);
+    arm_matrix_instance_q31 *pSrcB_converted = q31MatrixFromNumpy(pSrcB);
+    uint32_t row = pSrcA_converted->numRows ;
+    uint32_t column = pSrcB_converted->numCols ;
+    arm_matrix_instance_q31 *pDst_converted = createq31Matrix(row,column);
+
+    arm_status returnValue = arm_mat_mult_q31(pSrcA_converted,pSrcB_converted,pDst_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* pDstOBJ=NumpyArrayFromq31Matrix(pDst_converted);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mat_mult_fast_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  arm_matrix_instance_q31 *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  arm_matrix_instance_q31 *pSrcB_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    arm_matrix_instance_q31 *pSrcA_converted = q31MatrixFromNumpy(pSrcA);
+    arm_matrix_instance_q31 *pSrcB_converted = q31MatrixFromNumpy(pSrcB);
+    uint32_t row = pSrcA_converted->numRows ;
+    uint32_t column = pSrcB_converted->numCols ;
+    arm_matrix_instance_q31 *pDst_converted = createq31Matrix(row,column);
+
+    arm_status returnValue = arm_mat_mult_fast_q31(pSrcA_converted,pSrcB_converted,pDst_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* pDstOBJ=NumpyArrayFromq31Matrix(pDst_converted);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mat_sub_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  arm_matrix_instance_f32 *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  arm_matrix_instance_f32 *pSrcB_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    arm_matrix_instance_f32 *pSrcA_converted = f32MatrixFromNumpy(pSrcA);
+    arm_matrix_instance_f32 *pSrcB_converted = f32MatrixFromNumpy(pSrcB);
+    uint32_t row = pSrcA_converted->numRows ;
+    uint32_t column = pSrcB_converted->numCols ;
+    arm_matrix_instance_f32 *pDst_converted = createf32Matrix(row,column);
+
+    arm_status returnValue = arm_mat_sub_f32(pSrcA_converted,pSrcB_converted,pDst_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* pDstOBJ=NumpyArrayFromf32Matrix(pDst_converted);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mat_sub_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  arm_matrix_instance_q15 *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  arm_matrix_instance_q15 *pSrcB_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    arm_matrix_instance_q15 *pSrcA_converted = q15MatrixFromNumpy(pSrcA);
+    arm_matrix_instance_q15 *pSrcB_converted = q15MatrixFromNumpy(pSrcB);
+    uint32_t row = pSrcA_converted->numRows ;
+    uint32_t column = pSrcB_converted->numCols ;
+    arm_matrix_instance_q15 *pDst_converted = createq15Matrix(row,column);
+
+    arm_status returnValue = arm_mat_sub_q15(pSrcA_converted,pSrcB_converted,pDst_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* pDstOBJ=NumpyArrayFromq15Matrix(pDst_converted);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mat_sub_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  arm_matrix_instance_q31 *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  arm_matrix_instance_q31 *pSrcB_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    arm_matrix_instance_q31 *pSrcA_converted = q31MatrixFromNumpy(pSrcA);
+    arm_matrix_instance_q31 *pSrcB_converted = q31MatrixFromNumpy(pSrcB);
+    uint32_t row = pSrcA_converted->numRows ;
+    uint32_t column = pSrcB_converted->numCols ;
+    arm_matrix_instance_q31 *pDst_converted = createq31Matrix(row,column);
+
+    arm_status returnValue = arm_mat_sub_q31(pSrcA_converted,pSrcB_converted,pDst_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* pDstOBJ=NumpyArrayFromq31Matrix(pDst_converted);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mat_scale_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  arm_matrix_instance_f32 *pSrc_converted=NULL; // input
+  float32_t scale; // input
+
+  if (PyArg_ParseTuple(args,"Of",&pSrc,&scale))
+  {
+
+    arm_matrix_instance_f32 *pSrc_converted = f32MatrixFromNumpy(pSrc);
+    uint32_t row = pSrc_converted->numRows ;
+    uint32_t column = pSrc_converted->numCols ;
+    arm_matrix_instance_f32 *pDst_converted = createf32Matrix(row,column);
+
+    arm_status returnValue = arm_mat_scale_f32(pSrc_converted,scale,pDst_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* pDstOBJ=NumpyArrayFromf32Matrix(pDst_converted);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mat_scale_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  arm_matrix_instance_q15 *pSrc_converted=NULL; // input
+  q15_t scaleFract; // input
+  int32_t shift; // input
+
+  if (PyArg_ParseTuple(args,"Ohi",&pSrc,&scaleFract,&shift))
+  {
+
+    arm_matrix_instance_q15 *pSrc_converted = q15MatrixFromNumpy(pSrc);
+    uint32_t row = pSrc_converted->numRows ;
+    uint32_t column = pSrc_converted->numCols ;
+    arm_matrix_instance_q15 *pDst_converted = createq15Matrix(row,column);
+
+    arm_status returnValue = arm_mat_scale_q15(pSrc_converted,scaleFract,shift,pDst_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* pDstOBJ=NumpyArrayFromq15Matrix(pDst_converted);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mat_scale_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  arm_matrix_instance_q31 *pSrc_converted=NULL; // input
+  q31_t scaleFract; // input
+  int32_t shift; // input
+
+  if (PyArg_ParseTuple(args,"Oii",&pSrc,&scaleFract,&shift))
+  {
+
+    arm_matrix_instance_q31 *pSrc_converted = q31MatrixFromNumpy(pSrc);
+    uint32_t row = pSrc_converted->numRows ;
+    uint32_t column = pSrc_converted->numCols ;
+    arm_matrix_instance_q31 *pDst_converted = createq31Matrix(row,column);
+
+    arm_status returnValue = arm_mat_scale_q31(pSrc_converted,scaleFract,shift,pDst_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* pDstOBJ=NumpyArrayFromq31Matrix(pDst_converted);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_pid_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  int32_t resetStateFlag; // input
+
+  if (PyArg_ParseTuple(args,"Oi",&S,&resetStateFlag))
+  {
+
+    ml_arm_pid_instance_f32Object *selfS = (ml_arm_pid_instance_f32Object *)S;
+
+    arm_pid_init_f32(selfS->instance,resetStateFlag);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_pid_reset_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+
+  if (PyArg_ParseTuple(args,"O",&S))
+  {
+
+    ml_arm_pid_instance_f32Object *selfS = (ml_arm_pid_instance_f32Object *)S;
+
+    arm_pid_reset_f32(selfS->instance);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_pid_init_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  int32_t resetStateFlag; // input
+
+  if (PyArg_ParseTuple(args,"Oi",&S,&resetStateFlag))
+  {
+
+    ml_arm_pid_instance_q31Object *selfS = (ml_arm_pid_instance_q31Object *)S;
+
+    arm_pid_init_q31(selfS->instance,resetStateFlag);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_pid_reset_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+
+  if (PyArg_ParseTuple(args,"O",&S))
+  {
+
+    ml_arm_pid_instance_q31Object *selfS = (ml_arm_pid_instance_q31Object *)S;
+
+    arm_pid_reset_q31(selfS->instance);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_pid_init_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  int32_t resetStateFlag; // input
+
+  if (PyArg_ParseTuple(args,"Oi",&S,&resetStateFlag))
+  {
+
+    ml_arm_pid_instance_q15Object *selfS = (ml_arm_pid_instance_q15Object *)S;
+
+    arm_pid_init_q15(selfS->instance,resetStateFlag);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_pid_reset_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+
+  if (PyArg_ParseTuple(args,"O",&S))
+  {
+
+    ml_arm_pid_instance_q15Object *selfS = (ml_arm_pid_instance_q15Object *)S;
+
+    arm_pid_reset_q15(selfS->instance);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mult_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q7_t *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  q7_t *pSrcB_converted=NULL; // input
+  q7_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    GETARGUMENT(pSrcA,NPY_BYTE,int8_t,q7_t);
+    GETARGUMENT(pSrcB,NPY_BYTE,int8_t,q7_t);
+    blockSize = arraySizepSrcA ;
+    
+    pDst=PyMem_Malloc(sizeof(q7_t)*blockSize);
+
+
+    arm_mult_q7(pSrcA_converted,pSrcB_converted,pDst,blockSize);
+ INT8ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mult_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q15_t *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  q15_t *pSrcB_converted=NULL; // input
+  q15_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pSrcB,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrcA ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*blockSize);
+
+
+    arm_mult_q15(pSrcA_converted,pSrcB_converted,pDst,blockSize);
+ INT16ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mult_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q31_t *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  q31_t *pSrcB_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pSrcB,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrcA ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_mult_q31(pSrcA_converted,pSrcB_converted,pDst,blockSize);
+ INT32ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mult_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  float32_t *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  float32_t *pSrcB_converted=NULL; // input
+  float32_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    GETARGUMENT(pSrcA,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pSrcB,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrcA ;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*blockSize);
+
+
+    arm_mult_f32(pSrcA_converted,pSrcB_converted,pDst,blockSize);
+ FLOATARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cfft_radix2_init_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t fftLen; // input
+  uint32_t ifftFlag; // input
+  uint32_t bitReverseFlag; // input
+
+  if (PyArg_ParseTuple(args,"Ohii",&S,&fftLen,&ifftFlag,&bitReverseFlag))
+  {
+
+    ml_arm_cfft_radix2_instance_q15Object *selfS = (ml_arm_cfft_radix2_instance_q15Object *)S;
+
+    arm_status returnValue = arm_cfft_radix2_init_q15(selfS->instance,fftLen,(uint8_t)ifftFlag,(uint8_t)bitReverseFlag);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cfft_radix2_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_cfft_radix2_instance_q15Object *selfS = (ml_arm_cfft_radix2_instance_q15Object *)S;
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+
+    arm_cfft_radix2_q15(selfS->instance,pSrc_converted);
+    FREEARGUMENT(pSrc_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cfft_radix4_init_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t fftLen; // input
+  uint32_t ifftFlag; // input
+  uint32_t bitReverseFlag; // input
+
+  if (PyArg_ParseTuple(args,"Ohii",&S,&fftLen,&ifftFlag,&bitReverseFlag))
+  {
+
+    ml_arm_cfft_radix4_instance_q15Object *selfS = (ml_arm_cfft_radix4_instance_q15Object *)S;
+
+    arm_status returnValue = arm_cfft_radix4_init_q15(selfS->instance,fftLen,(uint8_t)ifftFlag,(uint8_t)bitReverseFlag);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cfft_radix4_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_cfft_radix4_instance_q15Object *selfS = (ml_arm_cfft_radix4_instance_q15Object *)S;
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+
+    arm_cfft_radix4_q15(selfS->instance,pSrc_converted);
+    FREEARGUMENT(pSrc_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cfft_radix2_init_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t fftLen; // input
+  uint32_t ifftFlag; // input
+  uint32_t bitReverseFlag; // input
+
+  if (PyArg_ParseTuple(args,"Ohii",&S,&fftLen,&ifftFlag,&bitReverseFlag))
+  {
+
+    ml_arm_cfft_radix2_instance_q31Object *selfS = (ml_arm_cfft_radix2_instance_q31Object *)S;
+
+    arm_status returnValue = arm_cfft_radix2_init_q31(selfS->instance,fftLen,(uint8_t)ifftFlag,(uint8_t)bitReverseFlag);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cfft_radix2_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_cfft_radix2_instance_q31Object *selfS = (ml_arm_cfft_radix2_instance_q31Object *)S;
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+
+    arm_cfft_radix2_q31(selfS->instance,pSrc_converted);
+    FREEARGUMENT(pSrc_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cfft_radix4_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_cfft_radix4_instance_q31Object *selfS = (ml_arm_cfft_radix4_instance_q31Object *)S;
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+
+    arm_cfft_radix4_q31(selfS->instance,pSrc_converted);
+    FREEARGUMENT(pSrc_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cfft_radix4_init_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t fftLen; // input
+  uint32_t ifftFlag; // input
+  uint32_t bitReverseFlag; // input
+
+  if (PyArg_ParseTuple(args,"Ohii",&S,&fftLen,&ifftFlag,&bitReverseFlag))
+  {
+
+    ml_arm_cfft_radix4_instance_q31Object *selfS = (ml_arm_cfft_radix4_instance_q31Object *)S;
+
+    arm_status returnValue = arm_cfft_radix4_init_q31(selfS->instance,fftLen,(uint8_t)ifftFlag,(uint8_t)bitReverseFlag);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cfft_radix2_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t fftLen; // input
+  uint32_t ifftFlag; // input
+  uint32_t bitReverseFlag; // input
+
+  if (PyArg_ParseTuple(args,"Ohii",&S,&fftLen,&ifftFlag,&bitReverseFlag))
+  {
+
+    ml_arm_cfft_radix2_instance_f32Object *selfS = (ml_arm_cfft_radix2_instance_f32Object *)S;
+
+    arm_status returnValue = arm_cfft_radix2_init_f32(selfS->instance,fftLen,(uint8_t)ifftFlag,(uint8_t)bitReverseFlag);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cfft_radix2_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_cfft_radix2_instance_f32Object *selfS = (ml_arm_cfft_radix2_instance_f32Object *)S;
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+
+    arm_cfft_radix2_f32(selfS->instance,pSrc_converted);
+    FREEARGUMENT(pSrc_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cfft_radix4_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t fftLen; // input
+  uint32_t ifftFlag; // input
+  uint32_t bitReverseFlag; // input
+
+  if (PyArg_ParseTuple(args,"Ohii",&S,&fftLen,&ifftFlag,&bitReverseFlag))
+  {
+
+    ml_arm_cfft_radix4_instance_f32Object *selfS = (ml_arm_cfft_radix4_instance_f32Object *)S;
+
+    arm_status returnValue = arm_cfft_radix4_init_f32(selfS->instance,fftLen,(uint8_t)ifftFlag,(uint8_t)bitReverseFlag);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cfft_radix4_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_cfft_radix4_instance_f32Object *selfS = (ml_arm_cfft_radix4_instance_f32Object *)S;
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+
+    arm_cfft_radix4_f32(selfS->instance,pSrc_converted);
+    FREEARGUMENT(pSrc_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cfft_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *p1=NULL; // input
+  q15_t *p1_converted=NULL; // input
+  uint32_t ifftFlag; // input
+  uint32_t bitReverseFlag; // input
+
+  if (PyArg_ParseTuple(args,"OOii",&S,&p1,&ifftFlag,&bitReverseFlag))
+  {
+
+    ml_arm_cfft_instance_q15Object *selfS = (ml_arm_cfft_instance_q15Object *)S;
+    GETARGUMENT(p1,NPY_INT16,int16_t,int16_t);
+
+    arm_cfft_q15(selfS->instance,p1_converted,(uint8_t)ifftFlag,(uint8_t)bitReverseFlag);
+ INT16ARRAY1(p1OBJ,2*selfS->instance->fftLen,p1_converted);
+
+    PyObject *pythonResult = Py_BuildValue("O",p1OBJ);
+
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cfft_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *p1=NULL; // input
+  q31_t *p1_converted=NULL; // input
+  uint32_t ifftFlag; // input
+  uint32_t bitReverseFlag; // input
+
+  if (PyArg_ParseTuple(args,"OOii",&S,&p1,&ifftFlag,&bitReverseFlag))
+  {
+
+    ml_arm_cfft_instance_q31Object *selfS = (ml_arm_cfft_instance_q31Object *)S;
+    GETARGUMENT(p1,NPY_INT32,int32_t,int32_t);
+
+    arm_cfft_q31(selfS->instance,p1_converted,(uint8_t)ifftFlag,(uint8_t)bitReverseFlag);
+ INT32ARRAY1(p1OBJ,2*selfS->instance->fftLen,p1_converted);
+
+    PyObject *pythonResult = Py_BuildValue("O",p1OBJ);
+
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cfft_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *p1=NULL; // input
+  float32_t *p1_converted=NULL; // input
+  uint32_t ifftFlag; // input
+  uint32_t bitReverseFlag; // input
+
+  if (PyArg_ParseTuple(args,"OOii",&S,&p1,&ifftFlag,&bitReverseFlag))
+  {
+
+    ml_arm_cfft_instance_f32Object *selfS = (ml_arm_cfft_instance_f32Object *)S;
+    GETARGUMENT(p1,NPY_DOUBLE,double,float32_t);
+
+    arm_cfft_f32(selfS->instance,p1_converted,(uint8_t)ifftFlag,(uint8_t)bitReverseFlag);
+ FLOATARRAY1(p1OBJ,2*selfS->instance->fftLen,p1_converted);
+
+    PyObject *pythonResult = Py_BuildValue("O",p1OBJ);
+
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_rfft_init_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint32_t fftLenReal; // input
+  uint32_t ifftFlagR; // input
+  uint32_t bitReverseFlag; // input
+
+  if (PyArg_ParseTuple(args,"Oiii",&S,&fftLenReal,&ifftFlagR,&bitReverseFlag))
+  {
+
+    ml_arm_rfft_instance_q15Object *selfS = (ml_arm_rfft_instance_q15Object *)S;
+
+    arm_status returnValue = arm_rfft_init_q15(selfS->instance,fftLenReal,ifftFlagR,bitReverseFlag);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_rfft_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  q15_t *pDst=NULL; // output
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_rfft_instance_q15Object *selfS = (ml_arm_rfft_instance_q15Object *)S;
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*2*selfS->instance->fftLenReal);
+
+
+    arm_rfft_q15(selfS->instance,pSrc_converted,pDst);
+ INT16ARRAY1(pDstOBJ,2*selfS->instance->fftLenReal,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_rfft_init_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint32_t fftLenReal; // input
+  uint32_t ifftFlagR; // input
+  uint32_t bitReverseFlag; // input
+
+  if (PyArg_ParseTuple(args,"Oiii",&S,&fftLenReal,&ifftFlagR,&bitReverseFlag))
+  {
+
+    ml_arm_rfft_instance_q31Object *selfS = (ml_arm_rfft_instance_q31Object *)S;
+
+    arm_status returnValue = arm_rfft_init_q31(selfS->instance,fftLenReal,ifftFlagR,bitReverseFlag);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_rfft_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_rfft_instance_q31Object *selfS = (ml_arm_rfft_instance_q31Object *)S;
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*2*selfS->instance->fftLenReal);
+
+
+    arm_rfft_q31(selfS->instance,pSrc_converted,pDst);
+ INT32ARRAY1(pDstOBJ,2*selfS->instance->fftLenReal,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_rfft_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *S_CFFT=NULL; // input
+  uint32_t fftLenReal; // input
+  uint32_t ifftFlagR; // input
+  uint32_t bitReverseFlag; // input
+
+  if (PyArg_ParseTuple(args,"OOiii",&S,&S_CFFT,&fftLenReal,&ifftFlagR,&bitReverseFlag))
+  {
+
+    ml_arm_rfft_instance_f32Object *selfS = (ml_arm_rfft_instance_f32Object *)S;
+    ml_arm_cfft_radix4_instance_f32Object *selfS_CFFT = (ml_arm_cfft_radix4_instance_f32Object *)S_CFFT;
+
+    arm_status returnValue = arm_rfft_init_f32(selfS->instance,selfS_CFFT->instance,fftLenReal,ifftFlagR,bitReverseFlag);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_rfft_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  float32_t *pDst=NULL; // output
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_rfft_instance_f32Object *selfS = (ml_arm_rfft_instance_f32Object *)S;
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*2*selfS->instance->fftLenReal);
+
+
+    arm_rfft_f32(selfS->instance,pSrc_converted,pDst);
+ FLOATARRAY1(pDstOBJ,2*selfS->instance->fftLenReal,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_rfft_fast_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t fftLen; // input
+
+  if (PyArg_ParseTuple(args,"Oh",&S,&fftLen))
+  {
+
+    ml_arm_rfft_fast_instance_f32Object *selfS = (ml_arm_rfft_fast_instance_f32Object *)S;
+
+    arm_status returnValue = arm_rfft_fast_init_f32(selfS->instance,fftLen);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_rfft_32_fast_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+
+  if (PyArg_ParseTuple(args,"O",&S))
+  {
+
+    ml_arm_rfft_fast_instance_f32Object *selfS = (ml_arm_rfft_fast_instance_f32Object *)S;
+
+    arm_status returnValue = arm_rfft_32_fast_init_f32(selfS->instance);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_rfft_64_fast_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+
+  if (PyArg_ParseTuple(args,"O",&S))
+  {
+
+    ml_arm_rfft_fast_instance_f32Object *selfS = (ml_arm_rfft_fast_instance_f32Object *)S;
+
+    arm_status returnValue = arm_rfft_64_fast_init_f32(selfS->instance);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_rfft_128_fast_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+
+  if (PyArg_ParseTuple(args,"O",&S))
+  {
+
+    ml_arm_rfft_fast_instance_f32Object *selfS = (ml_arm_rfft_fast_instance_f32Object *)S;
+
+    arm_status returnValue = arm_rfft_128_fast_init_f32(selfS->instance);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_rfft_256_fast_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+
+  if (PyArg_ParseTuple(args,"O",&S))
+  {
+
+    ml_arm_rfft_fast_instance_f32Object *selfS = (ml_arm_rfft_fast_instance_f32Object *)S;
+
+    arm_status returnValue = arm_rfft_256_fast_init_f32(selfS->instance);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_rfft_512_fast_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+
+  if (PyArg_ParseTuple(args,"O",&S))
+  {
+
+    ml_arm_rfft_fast_instance_f32Object *selfS = (ml_arm_rfft_fast_instance_f32Object *)S;
+
+    arm_status returnValue = arm_rfft_512_fast_init_f32(selfS->instance);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_rfft_1024_fast_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+
+  if (PyArg_ParseTuple(args,"O",&S))
+  {
+
+    ml_arm_rfft_fast_instance_f32Object *selfS = (ml_arm_rfft_fast_instance_f32Object *)S;
+
+    arm_status returnValue = arm_rfft_1024_fast_init_f32(selfS->instance);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_rfft_2048_fast_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+
+  if (PyArg_ParseTuple(args,"O",&S))
+  {
+
+    ml_arm_rfft_fast_instance_f32Object *selfS = (ml_arm_rfft_fast_instance_f32Object *)S;
+
+    arm_status returnValue = arm_rfft_2048_fast_init_f32(selfS->instance);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_rfft_4096_fast_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+
+  if (PyArg_ParseTuple(args,"O",&S))
+  {
+
+    ml_arm_rfft_fast_instance_f32Object *selfS = (ml_arm_rfft_fast_instance_f32Object *)S;
+
+    arm_status returnValue = arm_rfft_4096_fast_init_f32(selfS->instance);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_rfft_fast_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *p=NULL; // input
+  float32_t *p_converted=NULL; // input
+  float32_t *pOut=NULL; // output
+  uint32_t ifftFlag; // input
+
+  if (PyArg_ParseTuple(args,"OOi",&S,&p,&ifftFlag))
+  {
+
+    ml_arm_rfft_fast_instance_f32Object *selfS = (ml_arm_rfft_fast_instance_f32Object *)S;
+    GETARGUMENT(p,NPY_DOUBLE,double,float32_t);
+    
+    pOut=PyMem_Malloc(sizeof(float32_t)*2*selfS->instance->fftLenRFFT);
+
+
+    arm_rfft_fast_f32(selfS->instance,p_converted,pOut,(uint8_t)ifftFlag);
+ FLOATARRAY1(pOutOBJ,2*selfS->instance->fftLenRFFT,pOut);
+
+    PyObject *pythonResult = Py_BuildValue("O",pOutOBJ);
+
+    FREEARGUMENT(p_converted);
+    Py_DECREF(pOutOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_dct4_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *S_RFFT=NULL; // input
+  PyObject *S_CFFT=NULL; // input
+  uint16_t N; // input
+  uint16_t Nby2; // input
+  float32_t normalize; // input
+
+  if (PyArg_ParseTuple(args,"OOOhhf",&S,&S_RFFT,&S_CFFT,&N,&Nby2,&normalize))
+  {
+
+    ml_arm_dct4_instance_f32Object *selfS = (ml_arm_dct4_instance_f32Object *)S;
+    ml_arm_rfft_instance_f32Object *selfS_RFFT = (ml_arm_rfft_instance_f32Object *)S_RFFT;
+    ml_arm_cfft_radix4_instance_f32Object *selfS_CFFT = (ml_arm_cfft_radix4_instance_f32Object *)S_CFFT;
+    uint32_t outputLength = selfS->instance->N ;
+
+    arm_status returnValue = arm_dct4_init_f32(selfS->instance,selfS_RFFT->instance,selfS_CFFT->instance,N,Nby2,normalize);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_dct4_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pState=NULL; // input
+  float32_t *pState_converted=NULL; // input
+  PyObject *pInlineBuffer=NULL; // input
+  float32_t *pInlineBuffer_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OOO",&S,&pState,&pInlineBuffer))
+  {
+
+    ml_arm_dct4_instance_f32Object *selfS = (ml_arm_dct4_instance_f32Object *)S;
+    GETARGUMENT(pState,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pInlineBuffer,NPY_DOUBLE,double,float32_t);
+    uint32_t outputLength = selfS->instance->N ;
+
+    arm_dct4_f32(selfS->instance,pState_converted,pInlineBuffer_converted);
+ FLOATARRAY1(pInlineBufferOBJ,outputLength,pInlineBuffer_converted);
+
+    PyObject *pythonResult = Py_BuildValue("O",pInlineBufferOBJ);
+
+    FREEARGUMENT(pState_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_dct4_init_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *S_RFFT=NULL; // input
+  PyObject *S_CFFT=NULL; // input
+  uint16_t N; // input
+  uint16_t Nby2; // input
+  q31_t normalize; // input
+
+  if (PyArg_ParseTuple(args,"OOOhhi",&S,&S_RFFT,&S_CFFT,&N,&Nby2,&normalize))
+  {
+
+    ml_arm_dct4_instance_q31Object *selfS = (ml_arm_dct4_instance_q31Object *)S;
+    ml_arm_rfft_instance_q31Object *selfS_RFFT = (ml_arm_rfft_instance_q31Object *)S_RFFT;
+    ml_arm_cfft_radix4_instance_q31Object *selfS_CFFT = (ml_arm_cfft_radix4_instance_q31Object *)S_CFFT;
+    uint32_t outputLength = selfS->instance->N ;
+
+    arm_status returnValue = arm_dct4_init_q31(selfS->instance,selfS_RFFT->instance,selfS_CFFT->instance,N,Nby2,normalize);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_dct4_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pState=NULL; // input
+  q31_t *pState_converted=NULL; // input
+  PyObject *pInlineBuffer=NULL; // input
+  q31_t *pInlineBuffer_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OOO",&S,&pState,&pInlineBuffer))
+  {
+
+    ml_arm_dct4_instance_q31Object *selfS = (ml_arm_dct4_instance_q31Object *)S;
+    GETARGUMENT(pState,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pInlineBuffer,NPY_INT32,int32_t,int32_t);
+    uint32_t outputLength = selfS->instance->N ;
+
+    arm_dct4_q31(selfS->instance,pState_converted,pInlineBuffer_converted);
+ INT32ARRAY1(pInlineBufferOBJ,outputLength,pInlineBuffer_converted);
+
+    PyObject *pythonResult = Py_BuildValue("O",pInlineBufferOBJ);
+
+    FREEARGUMENT(pState_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_dct4_init_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *S_RFFT=NULL; // input
+  PyObject *S_CFFT=NULL; // input
+  uint16_t N; // input
+  uint16_t Nby2; // input
+  q15_t normalize; // input
+
+  if (PyArg_ParseTuple(args,"OOOhhh",&S,&S_RFFT,&S_CFFT,&N,&Nby2,&normalize))
+  {
+
+    ml_arm_dct4_instance_q15Object *selfS = (ml_arm_dct4_instance_q15Object *)S;
+    ml_arm_rfft_instance_q15Object *selfS_RFFT = (ml_arm_rfft_instance_q15Object *)S_RFFT;
+    ml_arm_cfft_radix4_instance_q15Object *selfS_CFFT = (ml_arm_cfft_radix4_instance_q15Object *)S_CFFT;
+    uint32_t outputLength = selfS->instance->N ;
+
+    arm_status returnValue = arm_dct4_init_q15(selfS->instance,selfS_RFFT->instance,selfS_CFFT->instance,N,Nby2,normalize);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_dct4_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pState=NULL; // input
+  q15_t *pState_converted=NULL; // input
+  PyObject *pInlineBuffer=NULL; // input
+  q15_t *pInlineBuffer_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OOO",&S,&pState,&pInlineBuffer))
+  {
+
+    ml_arm_dct4_instance_q15Object *selfS = (ml_arm_dct4_instance_q15Object *)S;
+    GETARGUMENT(pState,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pInlineBuffer,NPY_INT16,int16_t,int16_t);
+    uint32_t outputLength = selfS->instance->N ;
+
+    arm_dct4_q15(selfS->instance,pState_converted,pInlineBuffer_converted);
+ INT16ARRAY1(pInlineBufferOBJ,outputLength,pInlineBuffer_converted);
+
+    PyObject *pythonResult = Py_BuildValue("O",pInlineBufferOBJ);
+
+    FREEARGUMENT(pState_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_add_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  float32_t *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  float32_t *pSrcB_converted=NULL; // input
+  float32_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    GETARGUMENT(pSrcA,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pSrcB,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrcA ;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*blockSize);
+
+
+    arm_add_f32(pSrcA_converted,pSrcB_converted,pDst,blockSize);
+ FLOATARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_add_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q7_t *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  q7_t *pSrcB_converted=NULL; // input
+  q7_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    GETARGUMENT(pSrcA,NPY_BYTE,int8_t,q7_t);
+    GETARGUMENT(pSrcB,NPY_BYTE,int8_t,q7_t);
+    blockSize = arraySizepSrcA ;
+    
+    pDst=PyMem_Malloc(sizeof(q7_t)*blockSize);
+
+
+    arm_add_q7(pSrcA_converted,pSrcB_converted,pDst,blockSize);
+ INT8ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_add_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q15_t *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  q15_t *pSrcB_converted=NULL; // input
+  q15_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pSrcB,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrcA ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*blockSize);
+
+
+    arm_add_q15(pSrcA_converted,pSrcB_converted,pDst,blockSize);
+ INT16ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_add_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q31_t *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  q31_t *pSrcB_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pSrcB,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrcA ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_add_q31(pSrcA_converted,pSrcB_converted,pDst,blockSize);
+ INT32ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_sub_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  float32_t *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  float32_t *pSrcB_converted=NULL; // input
+  float32_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    GETARGUMENT(pSrcA,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pSrcB,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrcA ;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*blockSize);
+
+
+    arm_sub_f32(pSrcA_converted,pSrcB_converted,pDst,blockSize);
+ FLOATARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_sub_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q7_t *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  q7_t *pSrcB_converted=NULL; // input
+  q7_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    GETARGUMENT(pSrcA,NPY_BYTE,int8_t,q7_t);
+    GETARGUMENT(pSrcB,NPY_BYTE,int8_t,q7_t);
+    blockSize = arraySizepSrcA ;
+    
+    pDst=PyMem_Malloc(sizeof(q7_t)*blockSize);
+
+
+    arm_sub_q7(pSrcA_converted,pSrcB_converted,pDst,blockSize);
+ INT8ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_sub_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q15_t *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  q15_t *pSrcB_converted=NULL; // input
+  q15_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pSrcB,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrcA ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*blockSize);
+
+
+    arm_sub_q15(pSrcA_converted,pSrcB_converted,pDst,blockSize);
+ INT16ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_sub_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q31_t *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  q31_t *pSrcB_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pSrcB,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrcA ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_sub_q31(pSrcA_converted,pSrcB_converted,pDst,blockSize);
+ INT32ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_scale_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  float32_t scale; // input
+  float32_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"Of",&pSrc,&scale))
+  {
+
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*blockSize);
+
+
+    arm_scale_f32(pSrc_converted,scale,pDst,blockSize);
+ FLOATARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_scale_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q7_t *pSrc_converted=NULL; // input
+  int32_t scaleFract; // input
+  int32_t shift; // input
+  q7_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"Oii",&pSrc,&scaleFract,&shift))
+  {
+
+    GETARGUMENT(pSrc,NPY_BYTE,int8_t,q7_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q7_t)*blockSize);
+
+
+    arm_scale_q7(pSrc_converted,(q7_t)scaleFract,(int8_t)shift,pDst,blockSize);
+ INT8ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_scale_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  q15_t scaleFract; // input
+  int32_t shift; // input
+  q15_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"Ohi",&pSrc,&scaleFract,&shift))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*blockSize);
+
+
+    arm_scale_q15(pSrc_converted,scaleFract,(int8_t)shift,pDst,blockSize);
+ INT16ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_scale_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  q31_t scaleFract; // input
+  int32_t shift; // input
+  q31_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"Oii",&pSrc,&scaleFract,&shift))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_scale_q31(pSrc_converted,scaleFract,(int8_t)shift,pDst,blockSize);
+ INT32ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_abs_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q7_t *pSrc_converted=NULL; // input
+  q7_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_BYTE,int8_t,q7_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q7_t)*blockSize);
+
+
+    arm_abs_q7(pSrc_converted,pDst,blockSize);
+ INT8ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_abs_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  float32_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*blockSize);
+
+
+    arm_abs_f32(pSrc_converted,pDst,blockSize);
+ FLOATARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_abs_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  q15_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*blockSize);
+
+
+    arm_abs_q15(pSrc_converted,pDst,blockSize);
+ INT16ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_abs_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_abs_q31(pSrc_converted,pDst,blockSize);
+ INT32ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_dot_prod_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  float32_t *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  float32_t *pSrcB_converted=NULL; // input
+  uint32_t blockSize; // input
+  float32_t *result=NULL; // output
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    GETARGUMENT(pSrcA,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pSrcB,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrcA ;
+    
+    result=PyMem_Malloc(sizeof(float32_t)*1);
+
+
+    arm_dot_prod_f32(pSrcA_converted,pSrcB_converted,blockSize,result);
+    PyObject* resultOBJ=Py_BuildValue("f",*result);
+
+    PyObject *pythonResult = Py_BuildValue("O",resultOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(resultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_dot_prod_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q7_t *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  q7_t *pSrcB_converted=NULL; // input
+  uint32_t blockSize; // input
+  q31_t *result=NULL; // output
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    GETARGUMENT(pSrcA,NPY_BYTE,int8_t,q7_t);
+    GETARGUMENT(pSrcB,NPY_BYTE,int8_t,q7_t);
+    blockSize = arraySizepSrcA ;
+    
+    result=PyMem_Malloc(sizeof(q31_t)*1);
+
+
+    arm_dot_prod_q7(pSrcA_converted,pSrcB_converted,blockSize,result);
+    PyObject* resultOBJ=Py_BuildValue("i",*result);
+
+    PyObject *pythonResult = Py_BuildValue("O",resultOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(resultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_dot_prod_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q15_t *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  q15_t *pSrcB_converted=NULL; // input
+  uint32_t blockSize; // input
+  q63_t *result=NULL; // output
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pSrcB,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrcA ;
+    
+    result=PyMem_Malloc(sizeof(q63_t)*1);
+
+
+    arm_dot_prod_q15(pSrcA_converted,pSrcB_converted,blockSize,result);
+    PyObject* resultOBJ=Py_BuildValue("L",*result);
+
+    PyObject *pythonResult = Py_BuildValue("O",resultOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(resultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_dot_prod_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q31_t *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  q31_t *pSrcB_converted=NULL; // input
+  uint32_t blockSize; // input
+  q63_t *result=NULL; // output
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pSrcB,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrcA ;
+    
+    result=PyMem_Malloc(sizeof(q63_t)*1);
+
+
+    arm_dot_prod_q31(pSrcA_converted,pSrcB_converted,blockSize,result);
+    PyObject* resultOBJ=Py_BuildValue("L",*result);
+
+    PyObject *pythonResult = Py_BuildValue("O",resultOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(resultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_shift_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q7_t *pSrc_converted=NULL; // input
+  int32_t shiftBits; // input
+  q7_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"Oi",&pSrc,&shiftBits))
+  {
+
+    GETARGUMENT(pSrc,NPY_BYTE,int8_t,q7_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q7_t)*blockSize);
+
+
+    arm_shift_q7(pSrc_converted,(int8_t)shiftBits,pDst,blockSize);
+ INT8ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_shift_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  int32_t shiftBits; // input
+  q15_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"Oi",&pSrc,&shiftBits))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*blockSize);
+
+
+    arm_shift_q15(pSrc_converted,(int8_t)shiftBits,pDst,blockSize);
+ INT16ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_shift_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  int32_t shiftBits; // input
+  q31_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"Oi",&pSrc,&shiftBits))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_shift_q31(pSrc_converted,(int8_t)shiftBits,pDst,blockSize);
+ INT32ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_offset_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  float32_t offset; // input
+  float32_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"Of",&pSrc,&offset))
+  {
+
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*blockSize);
+
+
+    arm_offset_f32(pSrc_converted,offset,pDst,blockSize);
+ FLOATARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_offset_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q7_t *pSrc_converted=NULL; // input
+  int32_t offset; // input
+  q7_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"Oi",&pSrc,&offset))
+  {
+
+    GETARGUMENT(pSrc,NPY_BYTE,int8_t,q7_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q7_t)*blockSize);
+
+
+    arm_offset_q7(pSrc_converted,(q7_t)offset,pDst,blockSize);
+ INT8ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_offset_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  q15_t offset; // input
+  q15_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"Oh",&pSrc,&offset))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*blockSize);
+
+
+    arm_offset_q15(pSrc_converted,offset,pDst,blockSize);
+ INT16ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_offset_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  q31_t offset; // input
+  q31_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"Oi",&pSrc,&offset))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_offset_q31(pSrc_converted,offset,pDst,blockSize);
+ INT32ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_negate_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  float32_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*blockSize);
+
+
+    arm_negate_f32(pSrc_converted,pDst,blockSize);
+ FLOATARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_negate_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q7_t *pSrc_converted=NULL; // input
+  q7_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_BYTE,int8_t,q7_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q7_t)*blockSize);
+
+
+    arm_negate_q7(pSrc_converted,pDst,blockSize);
+ INT8ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_negate_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  q15_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*blockSize);
+
+
+    arm_negate_q15(pSrc_converted,pDst,blockSize);
+ INT16ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_negate_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_negate_q31(pSrc_converted,pDst,blockSize);
+ INT32ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_copy_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  float32_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*blockSize);
+
+
+    arm_copy_f32(pSrc_converted,pDst,blockSize);
+ FLOATARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_copy_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q7_t *pSrc_converted=NULL; // input
+  q7_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_BYTE,int8_t,q7_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q7_t)*blockSize);
+
+
+    arm_copy_q7(pSrc_converted,pDst,blockSize);
+ INT8ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_copy_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  q15_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*blockSize);
+
+
+    arm_copy_q15(pSrc_converted,pDst,blockSize);
+ INT16ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_copy_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_copy_q31(pSrc_converted,pDst,blockSize);
+ INT32ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_conv_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  float32_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  float32_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  float32_t *pDst=NULL; // output
+
+  if (PyArg_ParseTuple(args,"OiOi",&pSrcA,&srcALen,&pSrcB,&srcBLen))
+  {
+
+    GETARGUMENT(pSrcA,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pSrcB,NPY_DOUBLE,double,float32_t);
+    uint32_t outputLength = srcALen + srcBLen - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*outputLength);
+
+
+    arm_conv_f32(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst);
+ FLOATARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_conv_opt_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q15_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q15_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q15_t *pDst=NULL; // output
+  PyObject *pScratch1=NULL; // input
+  q15_t *pScratch1_converted=NULL; // input
+  PyObject *pScratch2=NULL; // input
+  q15_t *pScratch2_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OiOiOO",&pSrcA,&srcALen,&pSrcB,&srcBLen,&pScratch1,&pScratch2))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pSrcB,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pScratch1,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pScratch2,NPY_INT16,int16_t,int16_t);
+    uint32_t outputLength = srcALen + srcBLen - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*outputLength);
+
+
+    arm_conv_opt_q15(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst,pScratch1_converted,pScratch2_converted);
+ INT16ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    FREEARGUMENT(pScratch1_converted);
+    FREEARGUMENT(pScratch2_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_conv_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q15_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q15_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q15_t *pDst=NULL; // output
+
+  if (PyArg_ParseTuple(args,"OiOi",&pSrcA,&srcALen,&pSrcB,&srcBLen))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pSrcB,NPY_INT16,int16_t,int16_t);
+    uint32_t outputLength = srcALen + srcBLen - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*outputLength);
+
+
+    arm_conv_q15(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst);
+ INT16ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_conv_fast_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q15_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q15_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q15_t *pDst=NULL; // output
+
+  if (PyArg_ParseTuple(args,"OiOi",&pSrcA,&srcALen,&pSrcB,&srcBLen))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pSrcB,NPY_INT16,int16_t,int16_t);
+    uint32_t outputLength = srcALen + srcBLen - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*outputLength);
+
+
+    arm_conv_fast_q15(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst);
+ INT16ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_conv_fast_opt_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q15_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q15_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q15_t *pDst=NULL; // output
+  PyObject *pScratch1=NULL; // input
+  q15_t *pScratch1_converted=NULL; // input
+  PyObject *pScratch2=NULL; // input
+  q15_t *pScratch2_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OiOiOO",&pSrcA,&srcALen,&pSrcB,&srcBLen,&pScratch1,&pScratch2))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pSrcB,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pScratch1,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pScratch2,NPY_INT16,int16_t,int16_t);
+    uint32_t outputLength = srcALen + srcBLen - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*outputLength);
+
+
+    arm_conv_fast_opt_q15(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst,pScratch1_converted,pScratch2_converted);
+ INT16ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    FREEARGUMENT(pScratch1_converted);
+    FREEARGUMENT(pScratch2_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_conv_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q31_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q31_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q31_t *pDst=NULL; // output
+
+  if (PyArg_ParseTuple(args,"OiOi",&pSrcA,&srcALen,&pSrcB,&srcBLen))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pSrcB,NPY_INT32,int32_t,int32_t);
+    uint32_t outputLength = srcALen + srcBLen - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*outputLength);
+
+
+    arm_conv_q31(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst);
+ INT32ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_conv_fast_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q31_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q31_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q31_t *pDst=NULL; // output
+
+  if (PyArg_ParseTuple(args,"OiOi",&pSrcA,&srcALen,&pSrcB,&srcBLen))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pSrcB,NPY_INT32,int32_t,int32_t);
+    uint32_t outputLength = srcALen + srcBLen - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*outputLength);
+
+
+    arm_conv_fast_q31(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst);
+ INT32ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_conv_opt_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q7_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q7_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q7_t *pDst=NULL; // output
+  PyObject *pScratch1=NULL; // input
+  q15_t *pScratch1_converted=NULL; // input
+  PyObject *pScratch2=NULL; // input
+  q15_t *pScratch2_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OiOiOO",&pSrcA,&srcALen,&pSrcB,&srcBLen,&pScratch1,&pScratch2))
+  {
+
+    GETARGUMENT(pSrcA,NPY_BYTE,int8_t,q7_t);
+    GETARGUMENT(pSrcB,NPY_BYTE,int8_t,q7_t);
+    GETARGUMENT(pScratch1,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pScratch2,NPY_INT16,int16_t,int16_t);
+    uint32_t outputLength = srcALen + srcBLen - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q7_t)*outputLength);
+
+
+    arm_conv_opt_q7(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst,pScratch1_converted,pScratch2_converted);
+ INT8ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    FREEARGUMENT(pScratch1_converted);
+    FREEARGUMENT(pScratch2_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_conv_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q7_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q7_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q7_t *pDst=NULL; // output
+
+  if (PyArg_ParseTuple(args,"OiOi",&pSrcA,&srcALen,&pSrcB,&srcBLen))
+  {
+
+    GETARGUMENT(pSrcA,NPY_BYTE,int8_t,q7_t);
+    GETARGUMENT(pSrcB,NPY_BYTE,int8_t,q7_t);
+    uint32_t outputLength = srcALen + srcBLen - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q7_t)*outputLength);
+
+
+    arm_conv_q7(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst);
+ INT8ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_conv_partial_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  float32_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  float32_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  float32_t *pDst=NULL; // output
+  uint32_t firstIndex; // input
+  uint32_t numPoints; // input
+
+  if (PyArg_ParseTuple(args,"OiOiii",&pSrcA,&srcALen,&pSrcB,&srcBLen,&firstIndex,&numPoints))
+  {
+
+    GETARGUMENT(pSrcA,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pSrcB,NPY_DOUBLE,double,float32_t);
+    uint32_t outputLength = srcALen + srcBLen - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*outputLength);
+
+
+    arm_status returnValue = arm_conv_partial_f32(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst,firstIndex,numPoints);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+ FLOATARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_conv_partial_opt_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q15_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q15_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q15_t *pDst=NULL; // output
+  uint32_t firstIndex; // input
+  uint32_t numPoints; // input
+  PyObject *pScratch1=NULL; // input
+  q15_t *pScratch1_converted=NULL; // input
+  PyObject *pScratch2=NULL; // input
+  q15_t *pScratch2_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OiOiiiOO",&pSrcA,&srcALen,&pSrcB,&srcBLen,&firstIndex,&numPoints,&pScratch1,&pScratch2))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pSrcB,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pScratch1,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pScratch2,NPY_INT16,int16_t,int16_t);
+    uint32_t outputLength = srcALen + srcBLen - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*outputLength);
+
+
+    arm_status returnValue = arm_conv_partial_opt_q15(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst,firstIndex,numPoints,pScratch1_converted,pScratch2_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+ INT16ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    FREEARGUMENT(pScratch1_converted);
+    FREEARGUMENT(pScratch2_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_conv_partial_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q15_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q15_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q15_t *pDst=NULL; // output
+  uint32_t firstIndex; // input
+  uint32_t numPoints; // input
+
+  if (PyArg_ParseTuple(args,"OiOiii",&pSrcA,&srcALen,&pSrcB,&srcBLen,&firstIndex,&numPoints))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pSrcB,NPY_INT16,int16_t,int16_t);
+    uint32_t outputLength = srcALen + srcBLen - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*outputLength);
+
+
+    arm_status returnValue = arm_conv_partial_q15(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst,firstIndex,numPoints);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+ INT16ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_conv_partial_fast_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q15_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q15_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q15_t *pDst=NULL; // output
+  uint32_t firstIndex; // input
+  uint32_t numPoints; // input
+
+  if (PyArg_ParseTuple(args,"OiOiii",&pSrcA,&srcALen,&pSrcB,&srcBLen,&firstIndex,&numPoints))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pSrcB,NPY_INT16,int16_t,int16_t);
+    uint32_t outputLength = srcALen + srcBLen - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*outputLength);
+
+
+    arm_status returnValue = arm_conv_partial_fast_q15(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst,firstIndex,numPoints);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+ INT16ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_conv_partial_fast_opt_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q15_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q15_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q15_t *pDst=NULL; // output
+  uint32_t firstIndex; // input
+  uint32_t numPoints; // input
+  PyObject *pScratch1=NULL; // input
+  q15_t *pScratch1_converted=NULL; // input
+  PyObject *pScratch2=NULL; // input
+  q15_t *pScratch2_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OiOiiiOO",&pSrcA,&srcALen,&pSrcB,&srcBLen,&firstIndex,&numPoints,&pScratch1,&pScratch2))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pSrcB,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pScratch1,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pScratch2,NPY_INT16,int16_t,int16_t);
+    uint32_t outputLength = srcALen + srcBLen - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*outputLength);
+
+
+    arm_status returnValue = arm_conv_partial_fast_opt_q15(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst,firstIndex,numPoints,pScratch1_converted,pScratch2_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+ INT16ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    FREEARGUMENT(pScratch1_converted);
+    FREEARGUMENT(pScratch2_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_conv_partial_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q31_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q31_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q31_t *pDst=NULL; // output
+  uint32_t firstIndex; // input
+  uint32_t numPoints; // input
+
+  if (PyArg_ParseTuple(args,"OiOiii",&pSrcA,&srcALen,&pSrcB,&srcBLen,&firstIndex,&numPoints))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pSrcB,NPY_INT32,int32_t,int32_t);
+    uint32_t outputLength = srcALen + srcBLen - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*outputLength);
+
+
+    arm_status returnValue = arm_conv_partial_q31(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst,firstIndex,numPoints);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+ INT32ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_conv_partial_fast_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q31_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q31_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q31_t *pDst=NULL; // output
+  uint32_t firstIndex; // input
+  uint32_t numPoints; // input
+
+  if (PyArg_ParseTuple(args,"OiOiii",&pSrcA,&srcALen,&pSrcB,&srcBLen,&firstIndex,&numPoints))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pSrcB,NPY_INT32,int32_t,int32_t);
+    uint32_t outputLength = srcALen + srcBLen - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*outputLength);
+
+
+    arm_status returnValue = arm_conv_partial_fast_q31(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst,firstIndex,numPoints);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+ INT32ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_conv_partial_opt_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q7_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q7_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q7_t *pDst=NULL; // output
+  uint32_t firstIndex; // input
+  uint32_t numPoints; // input
+  PyObject *pScratch1=NULL; // input
+  q15_t *pScratch1_converted=NULL; // input
+  PyObject *pScratch2=NULL; // input
+  q15_t *pScratch2_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OiOiiiOO",&pSrcA,&srcALen,&pSrcB,&srcBLen,&firstIndex,&numPoints,&pScratch1,&pScratch2))
+  {
+
+    GETARGUMENT(pSrcA,NPY_BYTE,int8_t,q7_t);
+    GETARGUMENT(pSrcB,NPY_BYTE,int8_t,q7_t);
+    GETARGUMENT(pScratch1,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pScratch2,NPY_INT16,int16_t,int16_t);
+    uint32_t outputLength = srcALen + srcBLen - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q7_t)*outputLength);
+
+
+    arm_status returnValue = arm_conv_partial_opt_q7(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst,firstIndex,numPoints,pScratch1_converted,pScratch2_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+ INT8ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    FREEARGUMENT(pScratch1_converted);
+    FREEARGUMENT(pScratch2_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_conv_partial_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q7_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q7_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q7_t *pDst=NULL; // output
+  uint32_t firstIndex; // input
+  uint32_t numPoints; // input
+
+  if (PyArg_ParseTuple(args,"OiOiii",&pSrcA,&srcALen,&pSrcB,&srcBLen,&firstIndex,&numPoints))
+  {
+
+    GETARGUMENT(pSrcA,NPY_BYTE,int8_t,q7_t);
+    GETARGUMENT(pSrcB,NPY_BYTE,int8_t,q7_t);
+    uint32_t outputLength = srcALen + srcBLen - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q7_t)*outputLength);
+
+
+    arm_status returnValue = arm_conv_partial_q7(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst,firstIndex,numPoints);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+ INT8ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pDstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_decimate_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  float32_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_fir_decimate_instance_f32Object *selfS = (ml_arm_fir_decimate_instance_f32Object *)S;
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*blockSize);
+
+
+    arm_fir_decimate_f32(selfS->instance,pSrc_converted,pDst,blockSize);
+ FLOATARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_decimate_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t numTaps; // input
+  uint32_t M; // input
+  PyObject *pCoeffs=NULL; // input
+  float32_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  float32_t *pState_converted=NULL; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OhiOO",&S,&numTaps,&M,&pCoeffs,&pState))
+  {
+
+    ml_arm_fir_decimate_instance_f32Object *selfS = (ml_arm_fir_decimate_instance_f32Object *)S;
+    GETARGUMENT(pCoeffs,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pState,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepState - arraySizepCoeffs + 1;
+
+    arm_status returnValue = arm_fir_decimate_init_f32(selfS->instance,numTaps,(uint8_t)M,pCoeffs_converted,pState_converted,blockSize);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_decimate_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  q15_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_fir_decimate_instance_q15Object *selfS = (ml_arm_fir_decimate_instance_q15Object *)S;
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*blockSize);
+
+
+    arm_fir_decimate_q15(selfS->instance,pSrc_converted,pDst,blockSize);
+ INT16ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_decimate_fast_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  q15_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_fir_decimate_instance_q15Object *selfS = (ml_arm_fir_decimate_instance_q15Object *)S;
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*blockSize);
+
+
+    arm_fir_decimate_fast_q15(selfS->instance,pSrc_converted,pDst,blockSize);
+ INT16ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_decimate_init_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t numTaps; // input
+  uint32_t M; // input
+  PyObject *pCoeffs=NULL; // input
+  q15_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  q15_t *pState_converted=NULL; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OhiOO",&S,&numTaps,&M,&pCoeffs,&pState))
+  {
+
+    ml_arm_fir_decimate_instance_q15Object *selfS = (ml_arm_fir_decimate_instance_q15Object *)S;
+    GETARGUMENT(pCoeffs,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pState,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepState - arraySizepCoeffs + 1;
+
+    arm_status returnValue = arm_fir_decimate_init_q15(selfS->instance,numTaps,(uint8_t)M,pCoeffs_converted,pState_converted,blockSize);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_decimate_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_fir_decimate_instance_q31Object *selfS = (ml_arm_fir_decimate_instance_q31Object *)S;
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_fir_decimate_q31(selfS->instance,pSrc_converted,pDst,blockSize);
+ INT32ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_decimate_fast_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_fir_decimate_instance_q31Object *selfS = (ml_arm_fir_decimate_instance_q31Object *)S;
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_fir_decimate_fast_q31(selfS->instance,pSrc_converted,pDst,blockSize);
+ INT32ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_decimate_init_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t numTaps; // input
+  uint32_t M; // input
+  PyObject *pCoeffs=NULL; // input
+  q31_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  q31_t *pState_converted=NULL; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OhiOO",&S,&numTaps,&M,&pCoeffs,&pState))
+  {
+
+    ml_arm_fir_decimate_instance_q31Object *selfS = (ml_arm_fir_decimate_instance_q31Object *)S;
+    GETARGUMENT(pCoeffs,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pState,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepState - arraySizepCoeffs + 1;
+
+    arm_status returnValue = arm_fir_decimate_init_q31(selfS->instance,numTaps,(uint8_t)M,pCoeffs_converted,pState_converted,blockSize);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_interpolate_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  q15_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_fir_interpolate_instance_q15Object *selfS = (ml_arm_fir_interpolate_instance_q15Object *)S;
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*blockSize);
+
+
+    arm_fir_interpolate_q15(selfS->instance,pSrc_converted,pDst,blockSize);
+ INT16ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_interpolate_init_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint32_t L; // input
+  uint16_t numTaps; // input
+  PyObject *pCoeffs=NULL; // input
+  q15_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  q15_t *pState_converted=NULL; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OihOO",&S,&L,&numTaps,&pCoeffs,&pState))
+  {
+
+    ml_arm_fir_interpolate_instance_q15Object *selfS = (ml_arm_fir_interpolate_instance_q15Object *)S;
+    GETARGUMENT(pCoeffs,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pState,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepState - arraySizepCoeffs + 1;
+
+    arm_status returnValue = arm_fir_interpolate_init_q15(selfS->instance,(uint8_t)L,numTaps,pCoeffs_converted,pState_converted,blockSize);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_interpolate_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_fir_interpolate_instance_q31Object *selfS = (ml_arm_fir_interpolate_instance_q31Object *)S;
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_fir_interpolate_q31(selfS->instance,pSrc_converted,pDst,blockSize);
+ INT32ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_interpolate_init_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint32_t L; // input
+  uint16_t numTaps; // input
+  PyObject *pCoeffs=NULL; // input
+  q31_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  q31_t *pState_converted=NULL; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OihOO",&S,&L,&numTaps,&pCoeffs,&pState))
+  {
+
+    ml_arm_fir_interpolate_instance_q31Object *selfS = (ml_arm_fir_interpolate_instance_q31Object *)S;
+    GETARGUMENT(pCoeffs,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pState,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepState - arraySizepCoeffs + 1;
+
+    arm_status returnValue = arm_fir_interpolate_init_q31(selfS->instance,(uint8_t)L,numTaps,pCoeffs_converted,pState_converted,blockSize);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_interpolate_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  float32_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_fir_interpolate_instance_f32Object *selfS = (ml_arm_fir_interpolate_instance_f32Object *)S;
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*blockSize);
+
+
+    arm_fir_interpolate_f32(selfS->instance,pSrc_converted,pDst,blockSize);
+ FLOATARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_interpolate_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint32_t L; // input
+  uint16_t numTaps; // input
+  PyObject *pCoeffs=NULL; // input
+  float32_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  float32_t *pState_converted=NULL; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OihOO",&S,&L,&numTaps,&pCoeffs,&pState))
+  {
+
+    ml_arm_fir_interpolate_instance_f32Object *selfS = (ml_arm_fir_interpolate_instance_f32Object *)S;
+    GETARGUMENT(pCoeffs,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pState,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepState - arraySizepCoeffs + 1;
+
+    arm_status returnValue = arm_fir_interpolate_init_f32(selfS->instance,(uint8_t)L,numTaps,pCoeffs_converted,pState_converted,blockSize);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_biquad_cas_df1_32x64_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  arm_biquad_cas_df1_32x64_ins_q31 *S_converted=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_biquad_cas_df1_32x64_q31(S_converted,pSrc_converted,pDst,blockSize);
+ INT32ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_biquad_cas_df1_32x64_init_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  arm_biquad_cas_df1_32x64_ins_q31 *S_converted=NULL; // input
+  uint32_t numStages; // input
+  PyObject *pCoeffs=NULL; // input
+  q31_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  q63_t *pState_converted=NULL; // input
+  uint32_t postShift; // input
+
+  if (PyArg_ParseTuple(args,"OiOOi",&S,&numStages,&pCoeffs,&pState,&postShift))
+  {
+
+    GETARGUMENT(pCoeffs,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pState,NPY_INT64,q63_t,q63_t);
+
+    arm_biquad_cas_df1_32x64_init_q31(S_converted,(uint8_t)numStages,pCoeffs_converted,pState_converted,(uint8_t)postShift);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_biquad_cascade_df2T_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  float32_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_biquad_cascade_df2T_instance_f32Object *selfS = (ml_arm_biquad_cascade_df2T_instance_f32Object *)S;
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*blockSize);
+
+
+    arm_biquad_cascade_df2T_f32(selfS->instance,pSrc_converted,pDst,blockSize);
+ FLOATARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_biquad_cascade_stereo_df2T_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  float32_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_biquad_cascade_stereo_df2T_instance_f32Object *selfS = (ml_arm_biquad_cascade_stereo_df2T_instance_f32Object *)S;
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*blockSize);
+
+
+    arm_biquad_cascade_stereo_df2T_f32(selfS->instance,pSrc_converted,pDst,blockSize);
+ FLOATARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_biquad_cascade_df2T_f64(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  float64_t *pSrc_converted=NULL; // input
+  float64_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_biquad_cascade_df2T_instance_f64Object *selfS = (ml_arm_biquad_cascade_df2T_instance_f64Object *)S;
+    GETARGUMENT(pSrc,NPY_FLOAT64,float64_t,float64_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(float64_t)*blockSize);
+
+
+    arm_biquad_cascade_df2T_f64(selfS->instance,pSrc_converted,pDst,blockSize);
+ FLOAT64ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_biquad_cascade_df2T_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint32_t numStages; // input
+  PyObject *pCoeffs=NULL; // input
+  float32_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  float32_t *pState_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OiOO",&S,&numStages,&pCoeffs,&pState))
+  {
+
+    ml_arm_biquad_cascade_df2T_instance_f32Object *selfS = (ml_arm_biquad_cascade_df2T_instance_f32Object *)S;
+    GETARGUMENT(pCoeffs,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pState,NPY_DOUBLE,double,float32_t);
+
+    arm_biquad_cascade_df2T_init_f32(selfS->instance,(uint8_t)numStages,pCoeffs_converted,pState_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_biquad_cascade_stereo_df2T_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint32_t numStages; // input
+  PyObject *pCoeffs=NULL; // input
+  float32_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  float32_t *pState_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OiOO",&S,&numStages,&pCoeffs,&pState))
+  {
+
+    ml_arm_biquad_cascade_stereo_df2T_instance_f32Object *selfS = (ml_arm_biquad_cascade_stereo_df2T_instance_f32Object *)S;
+    GETARGUMENT(pCoeffs,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pState,NPY_DOUBLE,double,float32_t);
+
+    arm_biquad_cascade_stereo_df2T_init_f32(selfS->instance,(uint8_t)numStages,pCoeffs_converted,pState_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_biquad_cascade_df2T_init_f64(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint32_t numStages; // input
+  PyObject *pCoeffs=NULL; // input
+  float64_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  float64_t *pState_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OiOO",&S,&numStages,&pCoeffs,&pState))
+  {
+
+    ml_arm_biquad_cascade_df2T_instance_f64Object *selfS = (ml_arm_biquad_cascade_df2T_instance_f64Object *)S;
+    GETARGUMENT(pCoeffs,NPY_FLOAT64,float64_t,float64_t);
+    GETARGUMENT(pState,NPY_FLOAT64,float64_t,float64_t);
+
+    arm_biquad_cascade_df2T_init_f64(selfS->instance,(uint8_t)numStages,pCoeffs_converted,pState_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_lattice_init_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t numStages; // input
+  PyObject *pCoeffs=NULL; // input
+  q15_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  q15_t *pState_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OhOO",&S,&numStages,&pCoeffs,&pState))
+  {
+
+    ml_arm_fir_lattice_instance_q15Object *selfS = (ml_arm_fir_lattice_instance_q15Object *)S;
+    GETARGUMENT(pCoeffs,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pState,NPY_INT16,int16_t,int16_t);
+
+    arm_fir_lattice_init_q15(selfS->instance,numStages,pCoeffs_converted,pState_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_lattice_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  q15_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_fir_lattice_instance_q15Object *selfS = (ml_arm_fir_lattice_instance_q15Object *)S;
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*blockSize);
+
+
+    arm_fir_lattice_q15(selfS->instance,pSrc_converted,pDst,blockSize);
+ INT16ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_lattice_init_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t numStages; // input
+  PyObject *pCoeffs=NULL; // input
+  q31_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  q31_t *pState_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OhOO",&S,&numStages,&pCoeffs,&pState))
+  {
+
+    ml_arm_fir_lattice_instance_q31Object *selfS = (ml_arm_fir_lattice_instance_q31Object *)S;
+    GETARGUMENT(pCoeffs,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pState,NPY_INT32,int32_t,int32_t);
+
+    arm_fir_lattice_init_q31(selfS->instance,numStages,pCoeffs_converted,pState_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_lattice_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_fir_lattice_instance_q31Object *selfS = (ml_arm_fir_lattice_instance_q31Object *)S;
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_fir_lattice_q31(selfS->instance,pSrc_converted,pDst,blockSize);
+ INT32ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_lattice_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t numStages; // input
+  PyObject *pCoeffs=NULL; // input
+  float32_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  float32_t *pState_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OhOO",&S,&numStages,&pCoeffs,&pState))
+  {
+
+    ml_arm_fir_lattice_instance_f32Object *selfS = (ml_arm_fir_lattice_instance_f32Object *)S;
+    GETARGUMENT(pCoeffs,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pState,NPY_DOUBLE,double,float32_t);
+
+    arm_fir_lattice_init_f32(selfS->instance,numStages,pCoeffs_converted,pState_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_lattice_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  float32_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_fir_lattice_instance_f32Object *selfS = (ml_arm_fir_lattice_instance_f32Object *)S;
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*blockSize);
+
+
+    arm_fir_lattice_f32(selfS->instance,pSrc_converted,pDst,blockSize);
+ FLOATARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_iir_lattice_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  float32_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_iir_lattice_instance_f32Object *selfS = (ml_arm_iir_lattice_instance_f32Object *)S;
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*blockSize);
+
+
+    arm_iir_lattice_f32(selfS->instance,pSrc_converted,pDst,blockSize);
+ FLOATARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_iir_lattice_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t numStages; // input
+  PyObject *pkCoeffs=NULL; // input
+  float32_t *pkCoeffs_converted=NULL; // input
+  PyObject *pvCoeffs=NULL; // input
+  float32_t *pvCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  float32_t *pState_converted=NULL; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OhOOO",&S,&numStages,&pkCoeffs,&pvCoeffs,&pState))
+  {
+
+    ml_arm_iir_lattice_instance_f32Object *selfS = (ml_arm_iir_lattice_instance_f32Object *)S;
+    GETARGUMENT(pkCoeffs,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pvCoeffs,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pState,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepkCoeffs ;
+
+    arm_iir_lattice_init_f32(selfS->instance,numStages,pkCoeffs_converted,pvCoeffs_converted,pState_converted,blockSize);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_iir_lattice_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_iir_lattice_instance_q31Object *selfS = (ml_arm_iir_lattice_instance_q31Object *)S;
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_iir_lattice_q31(selfS->instance,pSrc_converted,pDst,blockSize);
+ INT32ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_iir_lattice_init_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t numStages; // input
+  PyObject *pkCoeffs=NULL; // input
+  q31_t *pkCoeffs_converted=NULL; // input
+  PyObject *pvCoeffs=NULL; // input
+  q31_t *pvCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  q31_t *pState_converted=NULL; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OhOOO",&S,&numStages,&pkCoeffs,&pvCoeffs,&pState))
+  {
+
+    ml_arm_iir_lattice_instance_q31Object *selfS = (ml_arm_iir_lattice_instance_q31Object *)S;
+    GETARGUMENT(pkCoeffs,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pvCoeffs,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pState,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepkCoeffs ;
+
+    arm_iir_lattice_init_q31(selfS->instance,numStages,pkCoeffs_converted,pvCoeffs_converted,pState_converted,blockSize);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_iir_lattice_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  q15_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OO",&S,&pSrc))
+  {
+
+    ml_arm_iir_lattice_instance_q15Object *selfS = (ml_arm_iir_lattice_instance_q15Object *)S;
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*blockSize);
+
+
+    arm_iir_lattice_q15(selfS->instance,pSrc_converted,pDst,blockSize);
+ INT16ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_iir_lattice_init_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t numStages; // input
+  PyObject *pkCoeffs=NULL; // input
+  q15_t *pkCoeffs_converted=NULL; // input
+  PyObject *pvCoeffs=NULL; // input
+  q15_t *pvCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  q15_t *pState_converted=NULL; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OhOOO",&S,&numStages,&pkCoeffs,&pvCoeffs,&pState))
+  {
+
+    ml_arm_iir_lattice_instance_q15Object *selfS = (ml_arm_iir_lattice_instance_q15Object *)S;
+    GETARGUMENT(pkCoeffs,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pvCoeffs,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pState,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepkCoeffs ;
+
+    arm_iir_lattice_init_q15(selfS->instance,numStages,pkCoeffs_converted,pvCoeffs_converted,pState_converted,blockSize);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cfft_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t fftLen; // input
+
+  if (PyArg_ParseTuple(args,"Oh",&S,&fftLen))
+  {
+
+    ml_arm_cfft_instance_f32Object *selfS = (ml_arm_cfft_instance_f32Object *)S;
+
+    arm_status returnValue = arm_cfft_init_f32(selfS->instance,fftLen);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cfft_init_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t fftLen; // input
+
+  if (PyArg_ParseTuple(args,"Oh",&S,&fftLen))
+  {
+
+    ml_arm_cfft_instance_q31Object *selfS = (ml_arm_cfft_instance_q31Object *)S;
+
+    arm_status returnValue = arm_cfft_init_q31(selfS->instance,fftLen);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cfft_init_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t fftLen; // input
+
+  if (PyArg_ParseTuple(args,"Oh",&S,&fftLen))
+  {
+
+    ml_arm_cfft_instance_q15Object *selfS = (ml_arm_cfft_instance_q15Object *)S;
+
+    arm_status returnValue = arm_cfft_init_q15(selfS->instance,fftLen);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_lms_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  PyObject *pRef=NULL; // input
+  float32_t *pRef_converted=NULL; // input
+  float32_t *pOut=NULL; // output
+  PyObject *pErr=NULL; // input
+  float32_t *pErr_converted=NULL; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OOOO",&S,&pSrc,&pRef,&pErr))
+  {
+
+    ml_arm_lms_instance_f32Object *selfS = (ml_arm_lms_instance_f32Object *)S;
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pRef,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pErr,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pOut=PyMem_Malloc(sizeof(float32_t)*blockSize);
+
+
+    arm_lms_f32(selfS->instance,pSrc_converted,pRef_converted,pOut,pErr_converted,blockSize);
+ FLOATARRAY1(pOutOBJ,blockSize,pOut);
+
+    PyObject *pythonResult = Py_BuildValue("O",pOutOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    FREEARGUMENT(pRef_converted);
+    Py_DECREF(pOutOBJ);
+    FREEARGUMENT(pErr_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_lms_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t numTaps; // input
+  PyObject *pCoeffs=NULL; // input
+  float32_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  float32_t *pState_converted=NULL; // input
+  float32_t mu; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OhOOf",&S,&numTaps,&pCoeffs,&pState,&mu))
+  {
+
+    ml_arm_lms_instance_f32Object *selfS = (ml_arm_lms_instance_f32Object *)S;
+    GETARGUMENT(pCoeffs,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pState,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepState - arraySizepCoeffs + 1 ;
+
+    arm_lms_init_f32(selfS->instance,numTaps,pCoeffs_converted,pState_converted,mu,blockSize);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_lms_init_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t numTaps; // input
+  PyObject *pCoeffs=NULL; // input
+  q15_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  q15_t *pState_converted=NULL; // input
+  q15_t mu; // input
+  uint32_t blockSize; // input
+  uint32_t postShift; // input
+
+  if (PyArg_ParseTuple(args,"OhOOhi",&S,&numTaps,&pCoeffs,&pState,&mu,&postShift))
+  {
+
+    ml_arm_lms_instance_q15Object *selfS = (ml_arm_lms_instance_q15Object *)S;
+    GETARGUMENT(pCoeffs,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pState,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepState - arraySizepCoeffs + 1 ;
+
+    arm_lms_init_q15(selfS->instance,numTaps,pCoeffs_converted,pState_converted,mu,blockSize,postShift);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_lms_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  PyObject *pRef=NULL; // input
+  q15_t *pRef_converted=NULL; // input
+  q15_t *pOut=NULL; // output
+  PyObject *pErr=NULL; // input
+  q15_t *pErr_converted=NULL; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OOOO",&S,&pSrc,&pRef,&pErr))
+  {
+
+    ml_arm_lms_instance_q15Object *selfS = (ml_arm_lms_instance_q15Object *)S;
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pRef,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pErr,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pOut=PyMem_Malloc(sizeof(q15_t)*blockSize);
+
+
+    arm_lms_q15(selfS->instance,pSrc_converted,pRef_converted,pOut,pErr_converted,blockSize);
+ INT16ARRAY1(pOutOBJ,blockSize,pOut);
+
+    PyObject *pythonResult = Py_BuildValue("O",pOutOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    FREEARGUMENT(pRef_converted);
+    Py_DECREF(pOutOBJ);
+    FREEARGUMENT(pErr_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_lms_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  PyObject *pRef=NULL; // input
+  q31_t *pRef_converted=NULL; // input
+  q31_t *pOut=NULL; // output
+  PyObject *pErr=NULL; // input
+  q31_t *pErr_converted=NULL; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OOOO",&S,&pSrc,&pRef,&pErr))
+  {
+
+    ml_arm_lms_instance_q31Object *selfS = (ml_arm_lms_instance_q31Object *)S;
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pRef,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pErr,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pOut=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_lms_q31(selfS->instance,pSrc_converted,pRef_converted,pOut,pErr_converted,blockSize);
+ INT32ARRAY1(pOutOBJ,blockSize,pOut);
+
+    PyObject *pythonResult = Py_BuildValue("O",pOutOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    FREEARGUMENT(pRef_converted);
+    Py_DECREF(pOutOBJ);
+    FREEARGUMENT(pErr_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_lms_init_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t numTaps; // input
+  PyObject *pCoeffs=NULL; // input
+  q31_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  q31_t *pState_converted=NULL; // input
+  q31_t mu; // input
+  uint32_t blockSize; // input
+  uint32_t postShift; // input
+
+  if (PyArg_ParseTuple(args,"OhOOii",&S,&numTaps,&pCoeffs,&pState,&mu,&postShift))
+  {
+
+    ml_arm_lms_instance_q31Object *selfS = (ml_arm_lms_instance_q31Object *)S;
+    GETARGUMENT(pCoeffs,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pState,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepState - arraySizepCoeffs + 1 ;
+
+    arm_lms_init_q31(selfS->instance,numTaps,pCoeffs_converted,pState_converted,mu,blockSize,postShift);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_lms_norm_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  PyObject *pRef=NULL; // input
+  float32_t *pRef_converted=NULL; // input
+  float32_t *pOut=NULL; // output
+  PyObject *pErr=NULL; // input
+  float32_t *pErr_converted=NULL; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OOOO",&S,&pSrc,&pRef,&pErr))
+  {
+
+    ml_arm_lms_norm_instance_f32Object *selfS = (ml_arm_lms_norm_instance_f32Object *)S;
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pRef,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pErr,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pOut=PyMem_Malloc(sizeof(float32_t)*blockSize);
+
+
+    arm_lms_norm_f32(selfS->instance,pSrc_converted,pRef_converted,pOut,pErr_converted,blockSize);
+ FLOATARRAY1(pOutOBJ,blockSize,pOut);
+
+    PyObject *pythonResult = Py_BuildValue("O",pOutOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    FREEARGUMENT(pRef_converted);
+    Py_DECREF(pOutOBJ);
+    FREEARGUMENT(pErr_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_lms_norm_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t numTaps; // input
+  PyObject *pCoeffs=NULL; // input
+  float32_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  float32_t *pState_converted=NULL; // input
+  float32_t mu; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OhOOf",&S,&numTaps,&pCoeffs,&pState,&mu))
+  {
+
+    ml_arm_lms_norm_instance_f32Object *selfS = (ml_arm_lms_norm_instance_f32Object *)S;
+    GETARGUMENT(pCoeffs,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pState,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepState - arraySizepCoeffs + 1 ;
+
+    arm_lms_norm_init_f32(selfS->instance,numTaps,pCoeffs_converted,pState_converted,mu,blockSize);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_lms_norm_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  PyObject *pRef=NULL; // input
+  q31_t *pRef_converted=NULL; // input
+  q31_t *pOut=NULL; // output
+  PyObject *pErr=NULL; // input
+  q31_t *pErr_converted=NULL; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OOOO",&S,&pSrc,&pRef,&pErr))
+  {
+
+    ml_arm_lms_norm_instance_q31Object *selfS = (ml_arm_lms_norm_instance_q31Object *)S;
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pRef,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pErr,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pOut=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_lms_norm_q31(selfS->instance,pSrc_converted,pRef_converted,pOut,pErr_converted,blockSize);
+ INT32ARRAY1(pOutOBJ,blockSize,pOut);
+
+    PyObject *pythonResult = Py_BuildValue("O",pOutOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    FREEARGUMENT(pRef_converted);
+    Py_DECREF(pOutOBJ);
+    FREEARGUMENT(pErr_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_lms_norm_init_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t numTaps; // input
+  PyObject *pCoeffs=NULL; // input
+  q31_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  q31_t *pState_converted=NULL; // input
+  q31_t mu; // input
+  uint32_t blockSize; // input
+  uint32_t postShift; // input
+
+  if (PyArg_ParseTuple(args,"OhOOii",&S,&numTaps,&pCoeffs,&pState,&mu,&postShift))
+  {
+
+    ml_arm_lms_norm_instance_q31Object *selfS = (ml_arm_lms_norm_instance_q31Object *)S;
+    GETARGUMENT(pCoeffs,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pState,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepState - arraySizepCoeffs + 1 ;
+
+    arm_lms_norm_init_q31(selfS->instance,numTaps,pCoeffs_converted,pState_converted,mu,blockSize,(uint8_t)postShift);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_lms_norm_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  PyObject *pRef=NULL; // input
+  q15_t *pRef_converted=NULL; // input
+  q15_t *pOut=NULL; // output
+  PyObject *pErr=NULL; // input
+  q15_t *pErr_converted=NULL; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OOOO",&S,&pSrc,&pRef,&pErr))
+  {
+
+    ml_arm_lms_norm_instance_q15Object *selfS = (ml_arm_lms_norm_instance_q15Object *)S;
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pRef,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pErr,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pOut=PyMem_Malloc(sizeof(q15_t)*blockSize);
+
+
+    arm_lms_norm_q15(selfS->instance,pSrc_converted,pRef_converted,pOut,pErr_converted,blockSize);
+ INT16ARRAY1(pOutOBJ,blockSize,pOut);
+
+    PyObject *pythonResult = Py_BuildValue("O",pOutOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    FREEARGUMENT(pRef_converted);
+    Py_DECREF(pOutOBJ);
+    FREEARGUMENT(pErr_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_lms_norm_init_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t numTaps; // input
+  PyObject *pCoeffs=NULL; // input
+  q15_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  q15_t *pState_converted=NULL; // input
+  q15_t mu; // input
+  uint32_t blockSize; // input
+  uint32_t postShift; // input
+
+  if (PyArg_ParseTuple(args,"OhOOhi",&S,&numTaps,&pCoeffs,&pState,&mu,&postShift))
+  {
+
+    ml_arm_lms_norm_instance_q15Object *selfS = (ml_arm_lms_norm_instance_q15Object *)S;
+    GETARGUMENT(pCoeffs,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pState,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepState - arraySizepCoeffs + 1 ;
+
+    arm_lms_norm_init_q15(selfS->instance,numTaps,pCoeffs_converted,pState_converted,mu,blockSize,(uint8_t)postShift);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_correlate_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  float32_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  float32_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  float32_t *pDst=NULL; // output
+
+  if (PyArg_ParseTuple(args,"OiOi",&pSrcA,&srcALen,&pSrcB,&srcBLen))
+  {
+
+    GETARGUMENT(pSrcA,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pSrcB,NPY_DOUBLE,double,float32_t);
+    uint32_t outputLength = 2*MAX(srcALen,srcBLen) - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*outputLength);
+
+
+    arm_correlate_f32(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst);
+ FLOATARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_correlate_opt_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q15_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q15_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q15_t *pDst=NULL; // output
+  PyObject *pScratch=NULL; // input
+  q15_t *pScratch_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OiOiO",&pSrcA,&srcALen,&pSrcB,&srcBLen,&pScratch))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pSrcB,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pScratch,NPY_INT16,int16_t,int16_t);
+    uint32_t outputLength = 2*MAX(srcALen,srcBLen) - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*outputLength);
+
+
+    arm_correlate_opt_q15(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst,pScratch_converted);
+ INT16ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    FREEARGUMENT(pScratch_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_correlate_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q15_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q15_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q15_t *pDst=NULL; // output
+
+  if (PyArg_ParseTuple(args,"OiOi",&pSrcA,&srcALen,&pSrcB,&srcBLen))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pSrcB,NPY_INT16,int16_t,int16_t);
+    uint32_t outputLength = 2*MAX(srcALen,srcBLen) - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*outputLength);
+
+
+    arm_correlate_q15(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst);
+ INT16ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_correlate_fast_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q15_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q15_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q15_t *pDst=NULL; // output
+
+  if (PyArg_ParseTuple(args,"OiOi",&pSrcA,&srcALen,&pSrcB,&srcBLen))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pSrcB,NPY_INT16,int16_t,int16_t);
+    uint32_t outputLength = 2*MAX(srcALen,srcBLen) - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*outputLength);
+
+
+    arm_correlate_fast_q15(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst);
+ INT16ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_correlate_fast_opt_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q15_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q15_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q15_t *pDst=NULL; // output
+  PyObject *pScratch=NULL; // input
+  q15_t *pScratch_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OiOiO",&pSrcA,&srcALen,&pSrcB,&srcBLen,&pScratch))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pSrcB,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pScratch,NPY_INT16,int16_t,int16_t);
+    uint32_t outputLength = 2*MAX(srcALen,srcBLen) - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*outputLength);
+
+
+    arm_correlate_fast_opt_q15(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst,pScratch_converted);
+ INT16ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    FREEARGUMENT(pScratch_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_correlate_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q31_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q31_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q31_t *pDst=NULL; // output
+
+  if (PyArg_ParseTuple(args,"OiOi",&pSrcA,&srcALen,&pSrcB,&srcBLen))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pSrcB,NPY_INT32,int32_t,int32_t);
+    uint32_t outputLength = 2*MAX(srcALen,srcBLen) - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*outputLength);
+
+
+    arm_correlate_q31(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst);
+ INT32ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_correlate_fast_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q31_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q31_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q31_t *pDst=NULL; // output
+
+  if (PyArg_ParseTuple(args,"OiOi",&pSrcA,&srcALen,&pSrcB,&srcBLen))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pSrcB,NPY_INT32,int32_t,int32_t);
+    uint32_t outputLength = 2*MAX(srcALen,srcBLen) - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*outputLength);
+
+
+    arm_correlate_fast_q31(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst);
+ INT32ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_correlate_opt_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q7_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q7_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q7_t *pDst=NULL; // output
+  PyObject *pScratch1=NULL; // input
+  q15_t *pScratch1_converted=NULL; // input
+  PyObject *pScratch2=NULL; // input
+  q15_t *pScratch2_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OiOiOO",&pSrcA,&srcALen,&pSrcB,&srcBLen,&pScratch1,&pScratch2))
+  {
+
+    GETARGUMENT(pSrcA,NPY_BYTE,int8_t,q7_t);
+    GETARGUMENT(pSrcB,NPY_BYTE,int8_t,q7_t);
+    GETARGUMENT(pScratch1,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pScratch2,NPY_INT16,int16_t,int16_t);
+    uint32_t outputLength = 2*MAX(srcALen,srcBLen) - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q7_t)*outputLength);
+
+
+    arm_correlate_opt_q7(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst,pScratch1_converted,pScratch2_converted);
+ INT8ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    FREEARGUMENT(pScratch1_converted);
+    FREEARGUMENT(pScratch2_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_correlate_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q7_t *pSrcA_converted=NULL; // input
+  uint32_t srcALen; // input
+  PyObject *pSrcB=NULL; // input
+  q7_t *pSrcB_converted=NULL; // input
+  uint32_t srcBLen; // input
+  q7_t *pDst=NULL; // output
+
+  if (PyArg_ParseTuple(args,"OiOi",&pSrcA,&srcALen,&pSrcB,&srcBLen))
+  {
+
+    GETARGUMENT(pSrcA,NPY_BYTE,int8_t,q7_t);
+    GETARGUMENT(pSrcB,NPY_BYTE,int8_t,q7_t);
+    uint32_t outputLength = 2*MAX(srcALen,srcBLen) - 1 ;
+    
+    pDst=PyMem_Malloc(sizeof(q7_t)*outputLength);
+
+
+    arm_correlate_q7(pSrcA_converted,srcALen,pSrcB_converted,srcBLen,pDst);
+ INT8ARRAY1(pDstOBJ,outputLength,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_sparse_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  float32_t *pDst=NULL; // output
+  PyObject *pScratchIn=NULL; // input
+  float32_t *pScratchIn_converted=NULL; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OOO",&S,&pSrc,&pScratchIn))
+  {
+
+    ml_arm_fir_sparse_instance_f32Object *selfS = (ml_arm_fir_sparse_instance_f32Object *)S;
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pScratchIn,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*blockSize);
+
+
+    arm_fir_sparse_f32(selfS->instance,pSrc_converted,pDst,pScratchIn_converted,blockSize);
+ FLOATARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    FREEARGUMENT(pScratchIn_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_sparse_init_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t numTaps; // input
+  PyObject *pCoeffs=NULL; // input
+  float32_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  float32_t *pState_converted=NULL; // input
+  PyObject *pTapDelay=NULL; // input
+  int32_t *pTapDelay_converted=NULL; // input
+  uint16_t maxDelay; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OhOOOh",&S,&numTaps,&pCoeffs,&pState,&pTapDelay,&maxDelay))
+  {
+
+    ml_arm_fir_sparse_instance_f32Object *selfS = (ml_arm_fir_sparse_instance_f32Object *)S;
+    GETARGUMENT(pCoeffs,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pState,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pTapDelay,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepState - arraySizepCoeffs + 1;
+
+    arm_fir_sparse_init_f32(selfS->instance,numTaps,pCoeffs_converted,pState_converted,pTapDelay_converted,maxDelay,blockSize);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_sparse_init_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t numTaps; // input
+  PyObject *pCoeffs=NULL; // input
+  q31_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  q31_t *pState_converted=NULL; // input
+  PyObject *pTapDelay=NULL; // input
+  int32_t *pTapDelay_converted=NULL; // input
+  uint16_t maxDelay; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OhOOOh",&S,&numTaps,&pCoeffs,&pState,&pTapDelay,&maxDelay))
+  {
+
+    ml_arm_fir_sparse_instance_q31Object *selfS = (ml_arm_fir_sparse_instance_q31Object *)S;
+    GETARGUMENT(pCoeffs,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pState,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pTapDelay,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepState - arraySizepCoeffs + 1;
+
+    arm_fir_sparse_init_q31(selfS->instance,numTaps,pCoeffs_converted,pState_converted,pTapDelay_converted,maxDelay,blockSize);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_sparse_init_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t numTaps; // input
+  PyObject *pCoeffs=NULL; // input
+  q15_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  q15_t *pState_converted=NULL; // input
+  PyObject *pTapDelay=NULL; // input
+  int32_t *pTapDelay_converted=NULL; // input
+  uint16_t maxDelay; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OhOOOh",&S,&numTaps,&pCoeffs,&pState,&pTapDelay,&maxDelay))
+  {
+
+    ml_arm_fir_sparse_instance_q15Object *selfS = (ml_arm_fir_sparse_instance_q15Object *)S;
+    GETARGUMENT(pCoeffs,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pState,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pTapDelay,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepState - arraySizepCoeffs + 1;
+
+    arm_fir_sparse_init_q15(selfS->instance,numTaps,pCoeffs_converted,pState_converted,pTapDelay_converted,maxDelay,blockSize);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_fir_sparse_init_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  uint16_t numTaps; // input
+  PyObject *pCoeffs=NULL; // input
+  q7_t *pCoeffs_converted=NULL; // input
+  PyObject *pState=NULL; // input
+  q7_t *pState_converted=NULL; // input
+  PyObject *pTapDelay=NULL; // input
+  int32_t *pTapDelay_converted=NULL; // input
+  uint16_t maxDelay; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OhOOOh",&S,&numTaps,&pCoeffs,&pState,&pTapDelay,&maxDelay))
+  {
+
+    ml_arm_fir_sparse_instance_q7Object *selfS = (ml_arm_fir_sparse_instance_q7Object *)S;
+    GETARGUMENT(pCoeffs,NPY_BYTE,int8_t,q7_t);
+    GETARGUMENT(pState,NPY_BYTE,int8_t,q7_t);
+    GETARGUMENT(pTapDelay,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepState - arraySizepCoeffs + 1;
+
+    arm_fir_sparse_init_q7(selfS->instance,numTaps,pCoeffs_converted,pState_converted,pTapDelay_converted,maxDelay,blockSize);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_sin_cos_f32(PyObject *obj, PyObject *args)
+{
+
+  float32_t theta; // input
+  PyObject *pSinVal=NULL; // input
+  float32_t *pSinVal_converted=NULL; // input
+  PyObject *pCosVal=NULL; // input
+  float32_t *pCosVal_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"fOO",&theta,&pSinVal,&pCosVal))
+  {
+
+    GETARGUMENT(pSinVal,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pCosVal,NPY_DOUBLE,double,float32_t);
+
+    arm_sin_cos_f32(theta,pSinVal_converted,pCosVal_converted);
+    FREEARGUMENT(pSinVal_converted);
+    FREEARGUMENT(pCosVal_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_sin_cos_q31(PyObject *obj, PyObject *args)
+{
+
+  q31_t theta; // input
+  PyObject *pSinVal=NULL; // input
+  q31_t *pSinVal_converted=NULL; // input
+  PyObject *pCosVal=NULL; // input
+  q31_t *pCosVal_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"iOO",&theta,&pSinVal,&pCosVal))
+  {
+
+    GETARGUMENT(pSinVal,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pCosVal,NPY_INT32,int32_t,int32_t);
+
+    arm_sin_cos_q31(theta,pSinVal_converted,pCosVal_converted);
+    FREEARGUMENT(pSinVal_converted);
+    FREEARGUMENT(pCosVal_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cmplx_conj_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  float32_t *pDst=NULL; // output
+  uint32_t numSamples; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    numSamples = arraySizepSrc ;
+    numSamples = numSamples / 2;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*2*numSamples);
+
+
+    arm_cmplx_conj_f32(pSrc_converted,pDst,numSamples);
+ FLOATARRAY1(pDstOBJ,2*numSamples,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cmplx_conj_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+  uint32_t numSamples; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    numSamples = arraySizepSrc ;
+    numSamples = numSamples / 2;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*2*numSamples);
+
+
+    arm_cmplx_conj_q31(pSrc_converted,pDst,numSamples);
+ INT32ARRAY1(pDstOBJ,2*numSamples,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cmplx_conj_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  q15_t *pDst=NULL; // output
+  uint32_t numSamples; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    numSamples = arraySizepSrc ;
+    numSamples = numSamples / 2;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*2*numSamples);
+
+
+    arm_cmplx_conj_q15(pSrc_converted,pDst,numSamples);
+ INT16ARRAY1(pDstOBJ,2*numSamples,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cmplx_mag_squared_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  float32_t *pDst=NULL; // output
+  uint32_t numSamples; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    numSamples = arraySizepSrc ;
+    numSamples = numSamples / 2;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*2*numSamples);
+
+
+    arm_cmplx_mag_squared_f32(pSrc_converted,pDst,numSamples);
+ FLOATARRAY1(pDstOBJ,2*numSamples,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cmplx_mag_squared_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+  uint32_t numSamples; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    numSamples = arraySizepSrc ;
+    numSamples = numSamples / 2;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*2*numSamples);
+
+
+    arm_cmplx_mag_squared_q31(pSrc_converted,pDst,numSamples);
+ INT32ARRAY1(pDstOBJ,2*numSamples,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cmplx_mag_squared_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  q15_t *pDst=NULL; // output
+  uint32_t numSamples; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    numSamples = arraySizepSrc ;
+    numSamples = numSamples / 2;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*2*numSamples);
+
+
+    arm_cmplx_mag_squared_q15(pSrc_converted,pDst,numSamples);
+ INT16ARRAY1(pDstOBJ,2*numSamples,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_pid_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  float32_t in; // input
+
+  if (PyArg_ParseTuple(args,"Of",&S,&in))
+  {
+
+    ml_arm_pid_instance_f32Object *selfS = (ml_arm_pid_instance_f32Object *)S;
+
+    float32_t returnValue = arm_pid_f32(selfS->instance,in);
+    PyObject* theReturnOBJ=Py_BuildValue("f",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_pid_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  q31_t in; // input
+
+  if (PyArg_ParseTuple(args,"Oi",&S,&in))
+  {
+
+    ml_arm_pid_instance_q31Object *selfS = (ml_arm_pid_instance_q31Object *)S;
+
+    q31_t returnValue = arm_pid_q31(selfS->instance,in);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_pid_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  q15_t in; // input
+
+  if (PyArg_ParseTuple(args,"Oh",&S,&in))
+  {
+
+    ml_arm_pid_instance_q15Object *selfS = (ml_arm_pid_instance_q15Object *)S;
+
+    q15_t returnValue = arm_pid_q15(selfS->instance,in);
+    PyObject* theReturnOBJ=Py_BuildValue("h",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mat_inverse_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *src=NULL; // input
+  arm_matrix_instance_f32 *src_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"O",&src))
+  {
+
+    arm_matrix_instance_f32 *src_converted = f32MatrixFromNumpy(src);
+    uint32_t row = src_converted->numCols ;
+    uint32_t column = src_converted->numRows ;
+    arm_matrix_instance_f32 *dst_converted = createf32Matrix(row,column);
+
+    arm_status returnValue = arm_mat_inverse_f32(src_converted,dst_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* dstOBJ=NumpyArrayFromf32Matrix(dst_converted);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,dstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(src_converted);
+    Py_DECREF(dstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mat_inverse_f64(PyObject *obj, PyObject *args)
+{
+
+  PyObject *src=NULL; // input
+  arm_matrix_instance_f64 *src_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"O",&src))
+  {
+
+    arm_matrix_instance_f64 *src_converted = f64MatrixFromNumpy(src);
+    uint32_t row = src_converted->numCols ;
+    uint32_t column = src_converted->numRows ;
+    arm_matrix_instance_f64 *dst_converted = createf64Matrix(row,column);
+
+    arm_status returnValue = arm_mat_inverse_f64(src_converted,dst_converted);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* dstOBJ=NumpyArrayFromf64Matrix(dst_converted);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,dstOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(src_converted);
+    Py_DECREF(dstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_clarke_f32(PyObject *obj, PyObject *args)
+{
+
+  float32_t Ia; // input
+  float32_t Ib; // input
+  PyObject *pIalpha=NULL; // input
+  float32_t *pIalpha_converted=NULL; // input
+  PyObject *pIbeta=NULL; // input
+  float32_t *pIbeta_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"ffOO",&Ia,&Ib,&pIalpha,&pIbeta))
+  {
+
+    GETARGUMENT(pIalpha,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pIbeta,NPY_DOUBLE,double,float32_t);
+
+    arm_clarke_f32(Ia,Ib,pIalpha_converted,pIbeta_converted);
+    FREEARGUMENT(pIalpha_converted);
+    FREEARGUMENT(pIbeta_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_clarke_q31(PyObject *obj, PyObject *args)
+{
+
+  q31_t Ia; // input
+  q31_t Ib; // input
+  PyObject *pIalpha=NULL; // input
+  q31_t *pIalpha_converted=NULL; // input
+  PyObject *pIbeta=NULL; // input
+  q31_t *pIbeta_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"iiOO",&Ia,&Ib,&pIalpha,&pIbeta))
+  {
+
+    GETARGUMENT(pIalpha,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pIbeta,NPY_INT32,int32_t,int32_t);
+
+    arm_clarke_q31(Ia,Ib,pIalpha_converted,pIbeta_converted);
+    FREEARGUMENT(pIalpha_converted);
+    FREEARGUMENT(pIbeta_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_q7_to_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q7_t *pSrc_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_BYTE,int8_t,q7_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_q7_to_q31(pSrc_converted,pDst,blockSize);
+ INT32ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_inv_clarke_f32(PyObject *obj, PyObject *args)
+{
+
+  float32_t Ialpha; // input
+  float32_t Ibeta; // input
+  PyObject *pIa=NULL; // input
+  float32_t *pIa_converted=NULL; // input
+  PyObject *pIb=NULL; // input
+  float32_t *pIb_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"ffOO",&Ialpha,&Ibeta,&pIa,&pIb))
+  {
+
+    GETARGUMENT(pIa,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pIb,NPY_DOUBLE,double,float32_t);
+
+    arm_inv_clarke_f32(Ialpha,Ibeta,pIa_converted,pIb_converted);
+    FREEARGUMENT(pIa_converted);
+    FREEARGUMENT(pIb_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_inv_clarke_q31(PyObject *obj, PyObject *args)
+{
+
+  q31_t Ialpha; // input
+  q31_t Ibeta; // input
+  PyObject *pIa=NULL; // input
+  q31_t *pIa_converted=NULL; // input
+  PyObject *pIb=NULL; // input
+  q31_t *pIb_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"iiOO",&Ialpha,&Ibeta,&pIa,&pIb))
+  {
+
+    GETARGUMENT(pIa,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pIb,NPY_INT32,int32_t,int32_t);
+
+    arm_inv_clarke_q31(Ialpha,Ibeta,pIa_converted,pIb_converted);
+    FREEARGUMENT(pIa_converted);
+    FREEARGUMENT(pIb_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_q7_to_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q7_t *pSrc_converted=NULL; // input
+  q15_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_BYTE,int8_t,q7_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*blockSize);
+
+
+    arm_q7_to_q15(pSrc_converted,pDst,blockSize);
+ INT16ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_park_f32(PyObject *obj, PyObject *args)
+{
+
+  float32_t Ialpha; // input
+  float32_t Ibeta; // input
+  PyObject *pId=NULL; // input
+  float32_t *pId_converted=NULL; // input
+  PyObject *pIq=NULL; // input
+  float32_t *pIq_converted=NULL; // input
+  float32_t sinVal; // input
+  float32_t cosVal; // input
+
+  if (PyArg_ParseTuple(args,"ffOOff",&Ialpha,&Ibeta,&pId,&pIq,&sinVal,&cosVal))
+  {
+
+    GETARGUMENT(pId,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pIq,NPY_DOUBLE,double,float32_t);
+
+    arm_park_f32(Ialpha,Ibeta,pId_converted,pIq_converted,sinVal,cosVal);
+    FREEARGUMENT(pId_converted);
+    FREEARGUMENT(pIq_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_park_q31(PyObject *obj, PyObject *args)
+{
+
+  q31_t Ialpha; // input
+  q31_t Ibeta; // input
+  PyObject *pId=NULL; // input
+  q31_t *pId_converted=NULL; // input
+  PyObject *pIq=NULL; // input
+  q31_t *pIq_converted=NULL; // input
+  q31_t sinVal; // input
+  q31_t cosVal; // input
+
+  if (PyArg_ParseTuple(args,"iiOOii",&Ialpha,&Ibeta,&pId,&pIq,&sinVal,&cosVal))
+  {
+
+    GETARGUMENT(pId,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pIq,NPY_INT32,int32_t,int32_t);
+
+    arm_park_q31(Ialpha,Ibeta,pId_converted,pIq_converted,sinVal,cosVal);
+    FREEARGUMENT(pId_converted);
+    FREEARGUMENT(pIq_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_q7_to_float(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q7_t *pSrc_converted=NULL; // input
+  float32_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_BYTE,int8_t,q7_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*blockSize);
+
+
+    arm_q7_to_float(pSrc_converted,pDst,blockSize);
+ FLOATARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_inv_park_f32(PyObject *obj, PyObject *args)
+{
+
+  float32_t Id; // input
+  float32_t Iq; // input
+  PyObject *pIalpha=NULL; // input
+  float32_t *pIalpha_converted=NULL; // input
+  PyObject *pIbeta=NULL; // input
+  float32_t *pIbeta_converted=NULL; // input
+  float32_t sinVal; // input
+  float32_t cosVal; // input
+
+  if (PyArg_ParseTuple(args,"ffOOff",&Id,&Iq,&pIalpha,&pIbeta,&sinVal,&cosVal))
+  {
+
+    GETARGUMENT(pIalpha,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pIbeta,NPY_DOUBLE,double,float32_t);
+
+    arm_inv_park_f32(Id,Iq,pIalpha_converted,pIbeta_converted,sinVal,cosVal);
+    FREEARGUMENT(pIalpha_converted);
+    FREEARGUMENT(pIbeta_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_inv_park_q31(PyObject *obj, PyObject *args)
+{
+
+  q31_t Id; // input
+  q31_t Iq; // input
+  PyObject *pIalpha=NULL; // input
+  q31_t *pIalpha_converted=NULL; // input
+  PyObject *pIbeta=NULL; // input
+  q31_t *pIbeta_converted=NULL; // input
+  q31_t sinVal; // input
+  q31_t cosVal; // input
+
+  if (PyArg_ParseTuple(args,"iiOOii",&Id,&Iq,&pIalpha,&pIbeta,&sinVal,&cosVal))
+  {
+
+    GETARGUMENT(pIalpha,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pIbeta,NPY_INT32,int32_t,int32_t);
+
+    arm_inv_park_q31(Id,Iq,pIalpha_converted,pIbeta_converted,sinVal,cosVal);
+    FREEARGUMENT(pIalpha_converted);
+    FREEARGUMENT(pIbeta_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_q31_to_float(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  float32_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*blockSize);
+
+
+    arm_q31_to_float(pSrc_converted,pDst,blockSize);
+ FLOATARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_linear_interp_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  float32_t x; // input
+
+  if (PyArg_ParseTuple(args,"Of",&S,&x))
+  {
+
+    ml_arm_linear_interp_instance_f32Object *selfS = (ml_arm_linear_interp_instance_f32Object *)S;
+
+    float32_t returnValue = arm_linear_interp_f32(selfS->instance,x);
+    PyObject* theReturnOBJ=Py_BuildValue("f",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_linear_interp_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pYData=NULL; // input
+  q31_t *pYData_converted=NULL; // input
+  q31_t x; // input
+  uint32_t nValues; // input
+
+  if (PyArg_ParseTuple(args,"Oii",&pYData,&x,&nValues))
+  {
+
+    GETARGUMENT(pYData,NPY_INT32,int32_t,int32_t);
+
+    q31_t returnValue = arm_linear_interp_q31(pYData_converted,x,nValues);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pYData_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_linear_interp_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pYData=NULL; // input
+  q15_t *pYData_converted=NULL; // input
+  q31_t x; // input
+  uint32_t nValues; // input
+
+  if (PyArg_ParseTuple(args,"Oii",&pYData,&x,&nValues))
+  {
+
+    GETARGUMENT(pYData,NPY_INT16,int16_t,int16_t);
+
+    q15_t returnValue = arm_linear_interp_q15(pYData_converted,x,nValues);
+    PyObject* theReturnOBJ=Py_BuildValue("h",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pYData_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_linear_interp_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pYData=NULL; // input
+  q7_t *pYData_converted=NULL; // input
+  q31_t x; // input
+  uint32_t nValues; // input
+
+  if (PyArg_ParseTuple(args,"Oii",&pYData,&x,&nValues))
+  {
+
+    GETARGUMENT(pYData,NPY_BYTE,int8_t,q7_t);
+
+    q7_t returnValue = arm_linear_interp_q7(pYData_converted,x,nValues);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    FREEARGUMENT(pYData_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_sin_f32(PyObject *obj, PyObject *args)
+{
+
+  float32_t x; // input
+
+  if (PyArg_ParseTuple(args,"f",&x))
+  {
+
+
+    float32_t returnValue = arm_sin_f32(x);
+    PyObject* theReturnOBJ=Py_BuildValue("f",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_sin_q31(PyObject *obj, PyObject *args)
+{
+
+  q31_t x; // input
+
+  if (PyArg_ParseTuple(args,"i",&x))
+  {
+
+
+    q31_t returnValue = arm_sin_q31(x);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_sin_q15(PyObject *obj, PyObject *args)
+{
+
+  q15_t x; // input
+
+  if (PyArg_ParseTuple(args,"h",&x))
+  {
+
+
+    q15_t returnValue = arm_sin_q15(x);
+    PyObject* theReturnOBJ=Py_BuildValue("h",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cos_f32(PyObject *obj, PyObject *args)
+{
+
+  float32_t x; // input
+
+  if (PyArg_ParseTuple(args,"f",&x))
+  {
+
+
+    float32_t returnValue = arm_cos_f32(x);
+    PyObject* theReturnOBJ=Py_BuildValue("f",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cos_q31(PyObject *obj, PyObject *args)
+{
+
+  q31_t x; // input
+
+  if (PyArg_ParseTuple(args,"i",&x))
+  {
+
+
+    q31_t returnValue = arm_cos_q31(x);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cos_q15(PyObject *obj, PyObject *args)
+{
+
+  q15_t x; // input
+
+  if (PyArg_ParseTuple(args,"h",&x))
+  {
+
+
+    q15_t returnValue = arm_cos_q15(x);
+    PyObject* theReturnOBJ=Py_BuildValue("h",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_sqrt_f32(PyObject *obj, PyObject *args)
+{
+
+  float32_t in; // input
+  float32_t *pOut=NULL; // output
+
+  if (PyArg_ParseTuple(args,"f",&in))
+  {
+
+    
+    pOut=PyMem_Malloc(sizeof(float32_t)*1);
+
+
+    arm_status returnValue = arm_sqrt_f32(in,pOut);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* pOutOBJ=Py_BuildValue("f",*pOut);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pOutOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    Py_DECREF(pOutOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_sqrt_q31(PyObject *obj, PyObject *args)
+{
+
+  q31_t in; // input
+  q31_t *pOut=NULL; // output
+
+  if (PyArg_ParseTuple(args,"i",&in))
+  {
+
+    
+    pOut=PyMem_Malloc(sizeof(q31_t)*1);
+
+
+    arm_status returnValue = arm_sqrt_q31(in,pOut);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* pOutOBJ=Py_BuildValue("i",*pOut);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pOutOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    Py_DECREF(pOutOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_sqrt_q15(PyObject *obj, PyObject *args)
+{
+
+  q15_t in; // input
+  q15_t *pOut=NULL; // output
+
+  if (PyArg_ParseTuple(args,"h",&in))
+  {
+
+    
+    pOut=PyMem_Malloc(sizeof(q15_t)*1);
+
+
+    arm_status returnValue = arm_sqrt_q15(in,pOut);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+    PyObject* pOutOBJ=Py_BuildValue("h",*pOut);
+
+    PyObject *pythonResult = Py_BuildValue("OO",theReturnOBJ,pOutOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    Py_DECREF(pOutOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_circularWrite_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *circBuffer=NULL; // input
+  int32_t *circBuffer_converted=NULL; // input
+  int32_t L; // input
+  PyObject *writeOffset=NULL; // input
+  uint16_t *writeOffset_converted=NULL; // input
+  int32_t bufferInc; // input
+  PyObject *src=NULL; // input
+  int32_t *src_converted=NULL; // input
+  int32_t srcInc; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OiOiOi",&circBuffer,&L,&writeOffset,&bufferInc,&src,&srcInc))
+  {
+
+    GETARGUMENT(circBuffer,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(writeOffset,NPY_UINT16,uint16_t,uint16_t);
+    GETARGUMENT(src,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizecircBuffer ;
+
+    arm_circularWrite_f32(circBuffer_converted,L,writeOffset_converted,bufferInc,src_converted,srcInc,blockSize);
+    FREEARGUMENT(circBuffer_converted);
+    FREEARGUMENT(writeOffset_converted);
+    FREEARGUMENT(src_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_circularWrite_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *circBuffer=NULL; // input
+  q15_t *circBuffer_converted=NULL; // input
+  int32_t L; // input
+  PyObject *writeOffset=NULL; // input
+  uint16_t *writeOffset_converted=NULL; // input
+  int32_t bufferInc; // input
+  PyObject *src=NULL; // input
+  q15_t *src_converted=NULL; // input
+  int32_t srcInc; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OiOiOi",&circBuffer,&L,&writeOffset,&bufferInc,&src,&srcInc))
+  {
+
+    GETARGUMENT(circBuffer,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(writeOffset,NPY_UINT16,uint16_t,uint16_t);
+    GETARGUMENT(src,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizecircBuffer ;
+
+    arm_circularWrite_q15(circBuffer_converted,L,writeOffset_converted,bufferInc,src_converted,srcInc,blockSize);
+    FREEARGUMENT(circBuffer_converted);
+    FREEARGUMENT(writeOffset_converted);
+    FREEARGUMENT(src_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_circularWrite_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *circBuffer=NULL; // input
+  q7_t *circBuffer_converted=NULL; // input
+  int32_t L; // input
+  PyObject *writeOffset=NULL; // input
+  uint16_t *writeOffset_converted=NULL; // input
+  int32_t bufferInc; // input
+  PyObject *src=NULL; // input
+  q7_t *src_converted=NULL; // input
+  int32_t srcInc; // input
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"OiOiOi",&circBuffer,&L,&writeOffset,&bufferInc,&src,&srcInc))
+  {
+
+    GETARGUMENT(circBuffer,NPY_BYTE,int8_t,q7_t);
+    GETARGUMENT(writeOffset,NPY_UINT16,uint16_t,uint16_t);
+    GETARGUMENT(src,NPY_BYTE,int8_t,q7_t);
+    blockSize = arraySizecircBuffer ;
+
+    arm_circularWrite_q7(circBuffer_converted,L,writeOffset_converted,bufferInc,src_converted,srcInc,blockSize);
+    FREEARGUMENT(circBuffer_converted);
+    FREEARGUMENT(writeOffset_converted);
+    FREEARGUMENT(src_converted);
+    Py_RETURN_NONE;
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_power_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  q63_t *pResult=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(q63_t)*1);
+
+
+    arm_power_q31(pSrc_converted,blockSize,pResult);
+    PyObject* pResultOBJ=Py_BuildValue("L",*pResult);
+
+    PyObject *pythonResult = Py_BuildValue("O",pResultOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_power_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  float32_t *pResult=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(float32_t)*1);
+
+
+    arm_power_f32(pSrc_converted,blockSize,pResult);
+    PyObject* pResultOBJ=Py_BuildValue("f",*pResult);
+
+    PyObject *pythonResult = Py_BuildValue("O",pResultOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_power_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  q63_t *pResult=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(q63_t)*1);
+
+
+    arm_power_q15(pSrc_converted,blockSize,pResult);
+    PyObject* pResultOBJ=Py_BuildValue("L",*pResult);
+
+    PyObject *pythonResult = Py_BuildValue("O",pResultOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_power_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q7_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  q31_t *pResult=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_BYTE,int8_t,q7_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(q31_t)*1);
+
+
+    arm_power_q7(pSrc_converted,blockSize,pResult);
+    PyObject* pResultOBJ=Py_BuildValue("i",*pResult);
+
+    PyObject *pythonResult = Py_BuildValue("O",pResultOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mean_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q7_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  q7_t *pResult=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_BYTE,int8_t,q7_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(q7_t)*1);
+
+
+    arm_mean_q7(pSrc_converted,blockSize,pResult);
+    PyObject* pResultOBJ=Py_BuildValue("i",*pResult);
+
+    PyObject *pythonResult = Py_BuildValue("O",pResultOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mean_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  q15_t *pResult=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(q15_t)*1);
+
+
+    arm_mean_q15(pSrc_converted,blockSize,pResult);
+    PyObject* pResultOBJ=Py_BuildValue("h",*pResult);
+
+    PyObject *pythonResult = Py_BuildValue("O",pResultOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mean_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  q31_t *pResult=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(q31_t)*1);
+
+
+    arm_mean_q31(pSrc_converted,blockSize,pResult);
+    PyObject* pResultOBJ=Py_BuildValue("i",*pResult);
+
+    PyObject *pythonResult = Py_BuildValue("O",pResultOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_mean_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  float32_t *pResult=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(float32_t)*1);
+
+
+    arm_mean_f32(pSrc_converted,blockSize,pResult);
+    PyObject* pResultOBJ=Py_BuildValue("f",*pResult);
+
+    PyObject *pythonResult = Py_BuildValue("O",pResultOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_var_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  float32_t *pResult=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(float32_t)*1);
+
+
+    arm_var_f32(pSrc_converted,blockSize,pResult);
+    PyObject* pResultOBJ=Py_BuildValue("f",*pResult);
+
+    PyObject *pythonResult = Py_BuildValue("O",pResultOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_var_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  q31_t *pResult=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(q31_t)*1);
+
+
+    arm_var_q31(pSrc_converted,blockSize,pResult);
+    PyObject* pResultOBJ=Py_BuildValue("i",*pResult);
+
+    PyObject *pythonResult = Py_BuildValue("O",pResultOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_var_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  q15_t *pResult=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(q15_t)*1);
+
+
+    arm_var_q15(pSrc_converted,blockSize,pResult);
+    PyObject* pResultOBJ=Py_BuildValue("h",*pResult);
+
+    PyObject *pythonResult = Py_BuildValue("O",pResultOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_rms_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  float32_t *pResult=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(float32_t)*1);
+
+
+    arm_rms_f32(pSrc_converted,blockSize,pResult);
+    PyObject* pResultOBJ=Py_BuildValue("f",*pResult);
+
+    PyObject *pythonResult = Py_BuildValue("O",pResultOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_rms_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  q31_t *pResult=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(q31_t)*1);
+
+
+    arm_rms_q31(pSrc_converted,blockSize,pResult);
+    PyObject* pResultOBJ=Py_BuildValue("i",*pResult);
+
+    PyObject *pythonResult = Py_BuildValue("O",pResultOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_rms_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  q15_t *pResult=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(q15_t)*1);
+
+
+    arm_rms_q15(pSrc_converted,blockSize,pResult);
+    PyObject* pResultOBJ=Py_BuildValue("h",*pResult);
+
+    PyObject *pythonResult = Py_BuildValue("O",pResultOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_std_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  float32_t *pResult=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(float32_t)*1);
+
+
+    arm_std_f32(pSrc_converted,blockSize,pResult);
+    PyObject* pResultOBJ=Py_BuildValue("f",*pResult);
+
+    PyObject *pythonResult = Py_BuildValue("O",pResultOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_std_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  q31_t *pResult=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(q31_t)*1);
+
+
+    arm_std_q31(pSrc_converted,blockSize,pResult);
+    PyObject* pResultOBJ=Py_BuildValue("i",*pResult);
+
+    PyObject *pythonResult = Py_BuildValue("O",pResultOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_std_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  q15_t *pResult=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(q15_t)*1);
+
+
+    arm_std_q15(pSrc_converted,blockSize,pResult);
+    PyObject* pResultOBJ=Py_BuildValue("h",*pResult);
+
+    PyObject *pythonResult = Py_BuildValue("O",pResultOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cmplx_mag_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  float32_t *pDst=NULL; // output
+  uint32_t numSamples; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    numSamples = arraySizepSrc ;
+    numSamples = numSamples / 2;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*2*numSamples);
+
+
+    arm_cmplx_mag_f32(pSrc_converted,pDst,numSamples);
+ FLOATARRAY1(pDstOBJ,2*numSamples,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cmplx_mag_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+  uint32_t numSamples; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    numSamples = arraySizepSrc ;
+    numSamples = numSamples / 2;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*2*numSamples);
+
+
+    arm_cmplx_mag_q31(pSrc_converted,pDst,numSamples);
+ INT32ARRAY1(pDstOBJ,2*numSamples,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cmplx_mag_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  q15_t *pDst=NULL; // output
+  uint32_t numSamples; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    numSamples = arraySizepSrc ;
+    numSamples = numSamples / 2;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*2*numSamples);
+
+
+    arm_cmplx_mag_q15(pSrc_converted,pDst,numSamples);
+ INT16ARRAY1(pDstOBJ,2*numSamples,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cmplx_dot_prod_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q15_t *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  q15_t *pSrcB_converted=NULL; // input
+  uint32_t numSamples; // input
+  q31_t *realResult=NULL; // output
+  q31_t *imagResult=NULL; // output
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pSrcB,NPY_INT16,int16_t,int16_t);
+    numSamples = arraySizepSrcA ;
+    numSamples = numSamples / 2;
+    
+    realResult=PyMem_Malloc(sizeof(q31_t)*1);
+
+    
+    imagResult=PyMem_Malloc(sizeof(q31_t)*1);
+
+
+    arm_cmplx_dot_prod_q15(pSrcA_converted,pSrcB_converted,numSamples,realResult,imagResult);
+    PyObject* realResultOBJ=Py_BuildValue("i",*realResult);
+    PyObject* imagResultOBJ=Py_BuildValue("i",*imagResult);
+
+    PyObject *pythonResult = Py_BuildValue("OO",realResultOBJ,imagResultOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(realResultOBJ);
+    Py_DECREF(imagResultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cmplx_dot_prod_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q31_t *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  q31_t *pSrcB_converted=NULL; // input
+  uint32_t numSamples; // input
+  q63_t *realResult=NULL; // output
+  q63_t *imagResult=NULL; // output
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pSrcB,NPY_INT32,int32_t,int32_t);
+    numSamples = arraySizepSrcA ;
+    numSamples = numSamples / 2;
+    
+    realResult=PyMem_Malloc(sizeof(q63_t)*1);
+
+    
+    imagResult=PyMem_Malloc(sizeof(q63_t)*1);
+
+
+    arm_cmplx_dot_prod_q31(pSrcA_converted,pSrcB_converted,numSamples,realResult,imagResult);
+    PyObject* realResultOBJ=Py_BuildValue("L",*realResult);
+    PyObject* imagResultOBJ=Py_BuildValue("L",*imagResult);
+
+    PyObject *pythonResult = Py_BuildValue("OO",realResultOBJ,imagResultOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(realResultOBJ);
+    Py_DECREF(imagResultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cmplx_dot_prod_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  float32_t *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  float32_t *pSrcB_converted=NULL; // input
+  uint32_t numSamples; // input
+  float32_t *realResult=NULL; // output
+  float32_t *imagResult=NULL; // output
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    GETARGUMENT(pSrcA,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pSrcB,NPY_DOUBLE,double,float32_t);
+    numSamples = arraySizepSrcA ;
+    numSamples = numSamples / 2;
+    
+    realResult=PyMem_Malloc(sizeof(float32_t)*1);
+
+    
+    imagResult=PyMem_Malloc(sizeof(float32_t)*1);
+
+
+    arm_cmplx_dot_prod_f32(pSrcA_converted,pSrcB_converted,numSamples,realResult,imagResult);
+    PyObject* realResultOBJ=Py_BuildValue("f",*realResult);
+    PyObject* imagResultOBJ=Py_BuildValue("f",*imagResult);
+
+    PyObject *pythonResult = Py_BuildValue("OO",realResultOBJ,imagResultOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(realResultOBJ);
+    Py_DECREF(imagResultOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cmplx_mult_real_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcCmplx=NULL; // input
+  q15_t *pSrcCmplx_converted=NULL; // input
+  PyObject *pSrcReal=NULL; // input
+  q15_t *pSrcReal_converted=NULL; // input
+  q15_t *pCmplxDst=NULL; // output
+  uint32_t numSamples; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcCmplx,&pSrcReal))
+  {
+
+    GETARGUMENT(pSrcCmplx,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pSrcReal,NPY_INT16,int16_t,int16_t);
+    numSamples = arraySizepSrcCmplx ;
+    numSamples = numSamples / 2;
+    
+    pCmplxDst=PyMem_Malloc(sizeof(q15_t)*2*numSamples);
+
+
+    arm_cmplx_mult_real_q15(pSrcCmplx_converted,pSrcReal_converted,pCmplxDst,numSamples);
+ INT16ARRAY1(pCmplxDstOBJ,2*numSamples,pCmplxDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pCmplxDstOBJ);
+
+    FREEARGUMENT(pSrcCmplx_converted);
+    FREEARGUMENT(pSrcReal_converted);
+    Py_DECREF(pCmplxDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cmplx_mult_real_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcCmplx=NULL; // input
+  q31_t *pSrcCmplx_converted=NULL; // input
+  PyObject *pSrcReal=NULL; // input
+  q31_t *pSrcReal_converted=NULL; // input
+  q31_t *pCmplxDst=NULL; // output
+  uint32_t numSamples; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcCmplx,&pSrcReal))
+  {
+
+    GETARGUMENT(pSrcCmplx,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pSrcReal,NPY_INT32,int32_t,int32_t);
+    numSamples = arraySizepSrcCmplx ;
+    numSamples = numSamples / 2;
+    
+    pCmplxDst=PyMem_Malloc(sizeof(q31_t)*2*numSamples);
+
+
+    arm_cmplx_mult_real_q31(pSrcCmplx_converted,pSrcReal_converted,pCmplxDst,numSamples);
+ INT32ARRAY1(pCmplxDstOBJ,2*numSamples,pCmplxDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pCmplxDstOBJ);
+
+    FREEARGUMENT(pSrcCmplx_converted);
+    FREEARGUMENT(pSrcReal_converted);
+    Py_DECREF(pCmplxDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cmplx_mult_real_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcCmplx=NULL; // input
+  float32_t *pSrcCmplx_converted=NULL; // input
+  PyObject *pSrcReal=NULL; // input
+  float32_t *pSrcReal_converted=NULL; // input
+  float32_t *pCmplxDst=NULL; // output
+  uint32_t numSamples; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcCmplx,&pSrcReal))
+  {
+
+    GETARGUMENT(pSrcCmplx,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pSrcReal,NPY_DOUBLE,double,float32_t);
+    numSamples = arraySizepSrcCmplx ;
+    numSamples = numSamples / 2;
+    
+    pCmplxDst=PyMem_Malloc(sizeof(float32_t)*2*numSamples);
+
+
+    arm_cmplx_mult_real_f32(pSrcCmplx_converted,pSrcReal_converted,pCmplxDst,numSamples);
+ FLOATARRAY1(pCmplxDstOBJ,2*numSamples,pCmplxDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pCmplxDstOBJ);
+
+    FREEARGUMENT(pSrcCmplx_converted);
+    FREEARGUMENT(pSrcReal_converted);
+    Py_DECREF(pCmplxDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_min_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q7_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  q7_t *result=NULL; // output
+  PyObject *index=NULL; // input
+  uint32_t *index_converted=NULL; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrc,&index))
+  {
+
+    GETARGUMENT(pSrc,NPY_BYTE,int8_t,q7_t);
+    GETARGUMENT(index,NPY_UINT32,uint32_t,uint32_t);
+    blockSize = arraySizepSrc ;
+    
+    result=PyMem_Malloc(sizeof(q7_t)*1);
+
+
+    arm_min_q7(pSrc_converted,blockSize,result,index_converted);
+    PyObject* resultOBJ=Py_BuildValue("i",*result);
+
+    PyObject *pythonResult = Py_BuildValue("O",resultOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(resultOBJ);
+    FREEARGUMENT(index_converted);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_min_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  q15_t *pResult=NULL; // output
+  uint32_t *pIndex=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(q15_t)*1);
+
+    
+    pIndex=PyMem_Malloc(sizeof(uint32_t)*1);
+
+
+    arm_min_q15(pSrc_converted,blockSize,pResult,pIndex);
+    PyObject* pResultOBJ=Py_BuildValue("h",*pResult);
+    PyObject* pIndexOBJ=Py_BuildValue("i",*pIndex);
+
+    PyObject *pythonResult = Py_BuildValue("OO",pResultOBJ,pIndexOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    Py_DECREF(pIndexOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_min_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  q31_t *pResult=NULL; // output
+  uint32_t *pIndex=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(q31_t)*1);
+
+    
+    pIndex=PyMem_Malloc(sizeof(uint32_t)*1);
+
+
+    arm_min_q31(pSrc_converted,blockSize,pResult,pIndex);
+    PyObject* pResultOBJ=Py_BuildValue("i",*pResult);
+    PyObject* pIndexOBJ=Py_BuildValue("i",*pIndex);
+
+    PyObject *pythonResult = Py_BuildValue("OO",pResultOBJ,pIndexOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    Py_DECREF(pIndexOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_min_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  float32_t *pResult=NULL; // output
+  uint32_t *pIndex=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(float32_t)*1);
+
+    
+    pIndex=PyMem_Malloc(sizeof(uint32_t)*1);
+
+
+    arm_min_f32(pSrc_converted,blockSize,pResult,pIndex);
+    PyObject* pResultOBJ=Py_BuildValue("f",*pResult);
+    PyObject* pIndexOBJ=Py_BuildValue("i",*pIndex);
+
+    PyObject *pythonResult = Py_BuildValue("OO",pResultOBJ,pIndexOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    Py_DECREF(pIndexOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_max_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q7_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  q7_t *pResult=NULL; // output
+  uint32_t *pIndex=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_BYTE,int8_t,q7_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(q7_t)*1);
+
+    
+    pIndex=PyMem_Malloc(sizeof(uint32_t)*1);
+
+
+    arm_max_q7(pSrc_converted,blockSize,pResult,pIndex);
+    PyObject* pResultOBJ=Py_BuildValue("i",*pResult);
+    PyObject* pIndexOBJ=Py_BuildValue("i",*pIndex);
+
+    PyObject *pythonResult = Py_BuildValue("OO",pResultOBJ,pIndexOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    Py_DECREF(pIndexOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_max_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  q15_t *pResult=NULL; // output
+  uint32_t *pIndex=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(q15_t)*1);
+
+    
+    pIndex=PyMem_Malloc(sizeof(uint32_t)*1);
+
+
+    arm_max_q15(pSrc_converted,blockSize,pResult,pIndex);
+    PyObject* pResultOBJ=Py_BuildValue("h",*pResult);
+    PyObject* pIndexOBJ=Py_BuildValue("i",*pIndex);
+
+    PyObject *pythonResult = Py_BuildValue("OO",pResultOBJ,pIndexOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    Py_DECREF(pIndexOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_max_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  q31_t *pResult=NULL; // output
+  uint32_t *pIndex=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(q31_t)*1);
+
+    
+    pIndex=PyMem_Malloc(sizeof(uint32_t)*1);
+
+
+    arm_max_q31(pSrc_converted,blockSize,pResult,pIndex);
+    PyObject* pResultOBJ=Py_BuildValue("i",*pResult);
+    PyObject* pIndexOBJ=Py_BuildValue("i",*pIndex);
+
+    PyObject *pythonResult = Py_BuildValue("OO",pResultOBJ,pIndexOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    Py_DECREF(pIndexOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_max_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  uint32_t blockSize; // input
+  float32_t *pResult=NULL; // output
+  uint32_t *pIndex=NULL; // output
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pResult=PyMem_Malloc(sizeof(float32_t)*1);
+
+    
+    pIndex=PyMem_Malloc(sizeof(uint32_t)*1);
+
+
+    arm_max_f32(pSrc_converted,blockSize,pResult,pIndex);
+    PyObject* pResultOBJ=Py_BuildValue("f",*pResult);
+    PyObject* pIndexOBJ=Py_BuildValue("i",*pIndex);
+
+    PyObject *pythonResult = Py_BuildValue("OO",pResultOBJ,pIndexOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pResultOBJ);
+    Py_DECREF(pIndexOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cmplx_mult_cmplx_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q15_t *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  q15_t *pSrcB_converted=NULL; // input
+  q15_t *pDst=NULL; // output
+  uint32_t numSamples; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT16,int16_t,int16_t);
+    GETARGUMENT(pSrcB,NPY_INT16,int16_t,int16_t);
+    numSamples = arraySizepSrcA ;
+    numSamples = numSamples / 2;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*2*numSamples);
+
+
+    arm_cmplx_mult_cmplx_q15(pSrcA_converted,pSrcB_converted,pDst,numSamples);
+ INT16ARRAY1(pDstOBJ,2*numSamples,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cmplx_mult_cmplx_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  q31_t *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  q31_t *pSrcB_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+  uint32_t numSamples; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    GETARGUMENT(pSrcA,NPY_INT32,int32_t,int32_t);
+    GETARGUMENT(pSrcB,NPY_INT32,int32_t,int32_t);
+    numSamples = arraySizepSrcA ;
+    numSamples = numSamples / 2;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*2*numSamples);
+
+
+    arm_cmplx_mult_cmplx_q31(pSrcA_converted,pSrcB_converted,pDst,numSamples);
+ INT32ARRAY1(pDstOBJ,2*numSamples,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_cmplx_mult_cmplx_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrcA=NULL; // input
+  float32_t *pSrcA_converted=NULL; // input
+  PyObject *pSrcB=NULL; // input
+  float32_t *pSrcB_converted=NULL; // input
+  float32_t *pDst=NULL; // output
+  uint32_t numSamples; // input
+
+  if (PyArg_ParseTuple(args,"OO",&pSrcA,&pSrcB))
+  {
+
+    GETARGUMENT(pSrcA,NPY_DOUBLE,double,float32_t);
+    GETARGUMENT(pSrcB,NPY_DOUBLE,double,float32_t);
+    numSamples = arraySizepSrcA ;
+    numSamples = numSamples / 2;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*2*numSamples);
+
+
+    arm_cmplx_mult_cmplx_f32(pSrcA_converted,pSrcB_converted,pDst,numSamples);
+ FLOATARRAY1(pDstOBJ,2*numSamples,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrcA_converted);
+    FREEARGUMENT(pSrcB_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_float_to_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_float_to_q31(pSrc_converted,pDst,blockSize);
+ INT32ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_float_to_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  q15_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*blockSize);
+
+
+    arm_float_to_q15(pSrc_converted,pDst,blockSize);
+ INT16ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_float_to_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  float32_t *pSrc_converted=NULL; // input
+  q7_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_DOUBLE,double,float32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q7_t)*blockSize);
+
+
+    arm_float_to_q7(pSrc_converted,pDst,blockSize);
+ INT8ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_q31_to_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  q15_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q15_t)*blockSize);
+
+
+    arm_q31_to_q15(pSrc_converted,pDst,blockSize);
+ INT16ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_q31_to_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q31_t *pSrc_converted=NULL; // input
+  q7_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT32,int32_t,int32_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q7_t)*blockSize);
+
+
+    arm_q31_to_q7(pSrc_converted,pDst,blockSize);
+ INT8ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_q15_to_float(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  float32_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(float32_t)*blockSize);
+
+
+    arm_q15_to_float(pSrc_converted,pDst,blockSize);
+ FLOATARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_q15_to_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  q31_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q31_t)*blockSize);
+
+
+    arm_q15_to_q31(pSrc_converted,pDst,blockSize);
+ INT32ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_q15_to_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *pSrc=NULL; // input
+  q15_t *pSrc_converted=NULL; // input
+  q7_t *pDst=NULL; // output
+  uint32_t blockSize; // input
+
+  if (PyArg_ParseTuple(args,"O",&pSrc))
+  {
+
+    GETARGUMENT(pSrc,NPY_INT16,int16_t,int16_t);
+    blockSize = arraySizepSrc ;
+    
+    pDst=PyMem_Malloc(sizeof(q7_t)*blockSize);
+
+
+    arm_q15_to_q7(pSrc_converted,pDst,blockSize);
+ INT8ARRAY1(pDstOBJ,blockSize,pDst);
+
+    PyObject *pythonResult = Py_BuildValue("O",pDstOBJ);
+
+    FREEARGUMENT(pSrc_converted);
+    Py_DECREF(pDstOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_bilinear_interp_f32(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  float32_t X; // input
+  float32_t Y; // input
+
+  if (PyArg_ParseTuple(args,"Off",&S,&X,&Y))
+  {
+
+    ml_arm_bilinear_interp_instance_f32Object *selfS = (ml_arm_bilinear_interp_instance_f32Object *)S;
+
+    float32_t returnValue = arm_bilinear_interp_f32(selfS->instance,X,Y);
+    PyObject* theReturnOBJ=Py_BuildValue("f",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_bilinear_interp_q31(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  q31_t X; // input
+  q31_t Y; // input
+
+  if (PyArg_ParseTuple(args,"Oii",&S,&X,&Y))
+  {
+
+    ml_arm_bilinear_interp_instance_q31Object *selfS = (ml_arm_bilinear_interp_instance_q31Object *)S;
+
+    q31_t returnValue = arm_bilinear_interp_q31(selfS->instance,X,Y);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_bilinear_interp_q15(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  q31_t X; // input
+  q31_t Y; // input
+
+  if (PyArg_ParseTuple(args,"Oii",&S,&X,&Y))
+  {
+
+    ml_arm_bilinear_interp_instance_q15Object *selfS = (ml_arm_bilinear_interp_instance_q15Object *)S;
+
+    q15_t returnValue = arm_bilinear_interp_q15(selfS->instance,X,Y);
+    PyObject* theReturnOBJ=Py_BuildValue("h",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyObject *
+cmsis_arm_bilinear_interp_q7(PyObject *obj, PyObject *args)
+{
+
+  PyObject *S=NULL; // input
+  q31_t X; // input
+  q31_t Y; // input
+
+  if (PyArg_ParseTuple(args,"Oii",&S,&X,&Y))
+  {
+
+    ml_arm_bilinear_interp_instance_q7Object *selfS = (ml_arm_bilinear_interp_instance_q7Object *)S;
+
+    q7_t returnValue = arm_bilinear_interp_q7(selfS->instance,X,Y);
+    PyObject* theReturnOBJ=Py_BuildValue("i",returnValue);
+
+    PyObject *pythonResult = Py_BuildValue("O",theReturnOBJ);
+
+    Py_DECREF(theReturnOBJ);
+    return(pythonResult);
+
+  }
+  return(NULL);
+}
+
+
+static PyMethodDef CMSISMLMethods[] = {
+
+{"arm_recip_q31",  cmsis_arm_recip_q31, METH_VARARGS,""},
+{"arm_recip_q15",  cmsis_arm_recip_q15, METH_VARARGS,""},
+{"arm_fir_q7",  cmsis_arm_fir_q7, METH_VARARGS,""},
+{"arm_fir_init_q7",  cmsis_arm_fir_init_q7, METH_VARARGS,""},
+{"arm_fir_q15",  cmsis_arm_fir_q15, METH_VARARGS,""},
+{"arm_fir_fast_q15",  cmsis_arm_fir_fast_q15, METH_VARARGS,""},
+{"arm_fir_init_q15",  cmsis_arm_fir_init_q15, METH_VARARGS,""},
+{"arm_fir_q31",  cmsis_arm_fir_q31, METH_VARARGS,""},
+{"arm_fir_fast_q31",  cmsis_arm_fir_fast_q31, METH_VARARGS,""},
+{"arm_fir_init_q31",  cmsis_arm_fir_init_q31, METH_VARARGS,""},
+{"arm_fir_f32",  cmsis_arm_fir_f32, METH_VARARGS,""},
+{"arm_fir_init_f32",  cmsis_arm_fir_init_f32, METH_VARARGS,""},
+{"arm_biquad_cascade_df1_q15",  cmsis_arm_biquad_cascade_df1_q15, METH_VARARGS,""},
+{"arm_biquad_cascade_df1_init_q15",  cmsis_arm_biquad_cascade_df1_init_q15, METH_VARARGS,""},
+{"arm_biquad_cascade_df1_fast_q15",  cmsis_arm_biquad_cascade_df1_fast_q15, METH_VARARGS,""},
+{"arm_biquad_cascade_df1_q31",  cmsis_arm_biquad_cascade_df1_q31, METH_VARARGS,""},
+{"arm_biquad_cascade_df1_fast_q31",  cmsis_arm_biquad_cascade_df1_fast_q31, METH_VARARGS,""},
+{"arm_biquad_cascade_df1_init_q31",  cmsis_arm_biquad_cascade_df1_init_q31, METH_VARARGS,""},
+{"arm_biquad_cascade_df1_f32",  cmsis_arm_biquad_cascade_df1_f32, METH_VARARGS,""},
+{"arm_biquad_cascade_df1_init_f32",  cmsis_arm_biquad_cascade_df1_init_f32, METH_VARARGS,""},
+{"arm_mat_add_f32",  cmsis_arm_mat_add_f32, METH_VARARGS,""},
+{"arm_mat_add_q15",  cmsis_arm_mat_add_q15, METH_VARARGS,""},
+{"arm_mat_add_q31",  cmsis_arm_mat_add_q31, METH_VARARGS,""},
+{"arm_mat_cmplx_mult_f32",  cmsis_arm_mat_cmplx_mult_f32, METH_VARARGS,""},
+{"arm_mat_cmplx_mult_q15",  cmsis_arm_mat_cmplx_mult_q15, METH_VARARGS,""},
+{"arm_mat_cmplx_mult_q31",  cmsis_arm_mat_cmplx_mult_q31, METH_VARARGS,""},
+{"arm_mat_trans_f32",  cmsis_arm_mat_trans_f32, METH_VARARGS,""},
+{"arm_mat_trans_q15",  cmsis_arm_mat_trans_q15, METH_VARARGS,""},
+{"arm_mat_trans_q31",  cmsis_arm_mat_trans_q31, METH_VARARGS,""},
+{"arm_mat_mult_f32",  cmsis_arm_mat_mult_f32, METH_VARARGS,""},
+{"arm_mat_mult_q15",  cmsis_arm_mat_mult_q15, METH_VARARGS,""},
+{"arm_mat_mult_fast_q15",  cmsis_arm_mat_mult_fast_q15, METH_VARARGS,""},
+{"arm_mat_mult_q31",  cmsis_arm_mat_mult_q31, METH_VARARGS,""},
+{"arm_mat_mult_fast_q31",  cmsis_arm_mat_mult_fast_q31, METH_VARARGS,""},
+{"arm_mat_sub_f32",  cmsis_arm_mat_sub_f32, METH_VARARGS,""},
+{"arm_mat_sub_q15",  cmsis_arm_mat_sub_q15, METH_VARARGS,""},
+{"arm_mat_sub_q31",  cmsis_arm_mat_sub_q31, METH_VARARGS,""},
+{"arm_mat_scale_f32",  cmsis_arm_mat_scale_f32, METH_VARARGS,""},
+{"arm_mat_scale_q15",  cmsis_arm_mat_scale_q15, METH_VARARGS,""},
+{"arm_mat_scale_q31",  cmsis_arm_mat_scale_q31, METH_VARARGS,""},
+{"arm_pid_init_f32",  cmsis_arm_pid_init_f32, METH_VARARGS,""},
+{"arm_pid_reset_f32",  cmsis_arm_pid_reset_f32, METH_VARARGS,""},
+{"arm_pid_init_q31",  cmsis_arm_pid_init_q31, METH_VARARGS,""},
+{"arm_pid_reset_q31",  cmsis_arm_pid_reset_q31, METH_VARARGS,""},
+{"arm_pid_init_q15",  cmsis_arm_pid_init_q15, METH_VARARGS,""},
+{"arm_pid_reset_q15",  cmsis_arm_pid_reset_q15, METH_VARARGS,""},
+{"arm_mult_q7",  cmsis_arm_mult_q7, METH_VARARGS,""},
+{"arm_mult_q15",  cmsis_arm_mult_q15, METH_VARARGS,""},
+{"arm_mult_q31",  cmsis_arm_mult_q31, METH_VARARGS,""},
+{"arm_mult_f32",  cmsis_arm_mult_f32, METH_VARARGS,""},
+{"arm_cfft_radix2_init_q15",  cmsis_arm_cfft_radix2_init_q15, METH_VARARGS,""},
+{"arm_cfft_radix2_q15",  cmsis_arm_cfft_radix2_q15, METH_VARARGS,""},
+{"arm_cfft_radix4_init_q15",  cmsis_arm_cfft_radix4_init_q15, METH_VARARGS,""},
+{"arm_cfft_radix4_q15",  cmsis_arm_cfft_radix4_q15, METH_VARARGS,""},
+{"arm_cfft_radix2_init_q31",  cmsis_arm_cfft_radix2_init_q31, METH_VARARGS,""},
+{"arm_cfft_radix2_q31",  cmsis_arm_cfft_radix2_q31, METH_VARARGS,""},
+{"arm_cfft_radix4_q31",  cmsis_arm_cfft_radix4_q31, METH_VARARGS,""},
+{"arm_cfft_radix4_init_q31",  cmsis_arm_cfft_radix4_init_q31, METH_VARARGS,""},
+{"arm_cfft_radix2_init_f32",  cmsis_arm_cfft_radix2_init_f32, METH_VARARGS,""},
+{"arm_cfft_radix2_f32",  cmsis_arm_cfft_radix2_f32, METH_VARARGS,""},
+{"arm_cfft_radix4_init_f32",  cmsis_arm_cfft_radix4_init_f32, METH_VARARGS,""},
+{"arm_cfft_radix4_f32",  cmsis_arm_cfft_radix4_f32, METH_VARARGS,""},
+{"arm_cfft_q15",  cmsis_arm_cfft_q15, METH_VARARGS,""},
+{"arm_cfft_q31",  cmsis_arm_cfft_q31, METH_VARARGS,""},
+{"arm_cfft_f32",  cmsis_arm_cfft_f32, METH_VARARGS,""},
+{"arm_rfft_init_q15",  cmsis_arm_rfft_init_q15, METH_VARARGS,""},
+{"arm_rfft_q15",  cmsis_arm_rfft_q15, METH_VARARGS,""},
+{"arm_rfft_init_q31",  cmsis_arm_rfft_init_q31, METH_VARARGS,""},
+{"arm_rfft_q31",  cmsis_arm_rfft_q31, METH_VARARGS,""},
+{"arm_rfft_init_f32",  cmsis_arm_rfft_init_f32, METH_VARARGS,""},
+{"arm_rfft_f32",  cmsis_arm_rfft_f32, METH_VARARGS,""},
+{"arm_rfft_fast_init_f32",  cmsis_arm_rfft_fast_init_f32, METH_VARARGS,""},
+{"arm_rfft_32_fast_init_f32",  cmsis_arm_rfft_32_fast_init_f32, METH_VARARGS,""},
+{"arm_rfft_64_fast_init_f32",  cmsis_arm_rfft_64_fast_init_f32, METH_VARARGS,""},
+{"arm_rfft_128_fast_init_f32",  cmsis_arm_rfft_128_fast_init_f32, METH_VARARGS,""},
+{"arm_rfft_256_fast_init_f32",  cmsis_arm_rfft_256_fast_init_f32, METH_VARARGS,""},
+{"arm_rfft_512_fast_init_f32",  cmsis_arm_rfft_512_fast_init_f32, METH_VARARGS,""},
+{"arm_rfft_1024_fast_init_f32",  cmsis_arm_rfft_1024_fast_init_f32, METH_VARARGS,""},
+{"arm_rfft_2048_fast_init_f32",  cmsis_arm_rfft_2048_fast_init_f32, METH_VARARGS,""},
+{"arm_rfft_4096_fast_init_f32",  cmsis_arm_rfft_4096_fast_init_f32, METH_VARARGS,""},
+{"arm_rfft_fast_f32",  cmsis_arm_rfft_fast_f32, METH_VARARGS,""},
+{"arm_dct4_init_f32",  cmsis_arm_dct4_init_f32, METH_VARARGS,""},
+{"arm_dct4_f32",  cmsis_arm_dct4_f32, METH_VARARGS,""},
+{"arm_dct4_init_q31",  cmsis_arm_dct4_init_q31, METH_VARARGS,""},
+{"arm_dct4_q31",  cmsis_arm_dct4_q31, METH_VARARGS,""},
+{"arm_dct4_init_q15",  cmsis_arm_dct4_init_q15, METH_VARARGS,""},
+{"arm_dct4_q15",  cmsis_arm_dct4_q15, METH_VARARGS,""},
+{"arm_add_f32",  cmsis_arm_add_f32, METH_VARARGS,""},
+{"arm_add_q7",  cmsis_arm_add_q7, METH_VARARGS,""},
+{"arm_add_q15",  cmsis_arm_add_q15, METH_VARARGS,""},
+{"arm_add_q31",  cmsis_arm_add_q31, METH_VARARGS,""},
+{"arm_sub_f32",  cmsis_arm_sub_f32, METH_VARARGS,""},
+{"arm_sub_q7",  cmsis_arm_sub_q7, METH_VARARGS,""},
+{"arm_sub_q15",  cmsis_arm_sub_q15, METH_VARARGS,""},
+{"arm_sub_q31",  cmsis_arm_sub_q31, METH_VARARGS,""},
+{"arm_scale_f32",  cmsis_arm_scale_f32, METH_VARARGS,""},
+{"arm_scale_q7",  cmsis_arm_scale_q7, METH_VARARGS,""},
+{"arm_scale_q15",  cmsis_arm_scale_q15, METH_VARARGS,""},
+{"arm_scale_q31",  cmsis_arm_scale_q31, METH_VARARGS,""},
+{"arm_abs_q7",  cmsis_arm_abs_q7, METH_VARARGS,""},
+{"arm_abs_f32",  cmsis_arm_abs_f32, METH_VARARGS,""},
+{"arm_abs_q15",  cmsis_arm_abs_q15, METH_VARARGS,""},
+{"arm_abs_q31",  cmsis_arm_abs_q31, METH_VARARGS,""},
+{"arm_dot_prod_f32",  cmsis_arm_dot_prod_f32, METH_VARARGS,""},
+{"arm_dot_prod_q7",  cmsis_arm_dot_prod_q7, METH_VARARGS,""},
+{"arm_dot_prod_q15",  cmsis_arm_dot_prod_q15, METH_VARARGS,""},
+{"arm_dot_prod_q31",  cmsis_arm_dot_prod_q31, METH_VARARGS,""},
+{"arm_shift_q7",  cmsis_arm_shift_q7, METH_VARARGS,""},
+{"arm_shift_q15",  cmsis_arm_shift_q15, METH_VARARGS,""},
+{"arm_shift_q31",  cmsis_arm_shift_q31, METH_VARARGS,""},
+{"arm_offset_f32",  cmsis_arm_offset_f32, METH_VARARGS,""},
+{"arm_offset_q7",  cmsis_arm_offset_q7, METH_VARARGS,""},
+{"arm_offset_q15",  cmsis_arm_offset_q15, METH_VARARGS,""},
+{"arm_offset_q31",  cmsis_arm_offset_q31, METH_VARARGS,""},
+{"arm_negate_f32",  cmsis_arm_negate_f32, METH_VARARGS,""},
+{"arm_negate_q7",  cmsis_arm_negate_q7, METH_VARARGS,""},
+{"arm_negate_q15",  cmsis_arm_negate_q15, METH_VARARGS,""},
+{"arm_negate_q31",  cmsis_arm_negate_q31, METH_VARARGS,""},
+{"arm_copy_f32",  cmsis_arm_copy_f32, METH_VARARGS,""},
+{"arm_copy_q7",  cmsis_arm_copy_q7, METH_VARARGS,""},
+{"arm_copy_q15",  cmsis_arm_copy_q15, METH_VARARGS,""},
+{"arm_copy_q31",  cmsis_arm_copy_q31, METH_VARARGS,""},
+{"arm_conv_f32",  cmsis_arm_conv_f32, METH_VARARGS,""},
+{"arm_conv_opt_q15",  cmsis_arm_conv_opt_q15, METH_VARARGS,""},
+{"arm_conv_q15",  cmsis_arm_conv_q15, METH_VARARGS,""},
+{"arm_conv_fast_q15",  cmsis_arm_conv_fast_q15, METH_VARARGS,""},
+{"arm_conv_fast_opt_q15",  cmsis_arm_conv_fast_opt_q15, METH_VARARGS,""},
+{"arm_conv_q31",  cmsis_arm_conv_q31, METH_VARARGS,""},
+{"arm_conv_fast_q31",  cmsis_arm_conv_fast_q31, METH_VARARGS,""},
+{"arm_conv_opt_q7",  cmsis_arm_conv_opt_q7, METH_VARARGS,""},
+{"arm_conv_q7",  cmsis_arm_conv_q7, METH_VARARGS,""},
+{"arm_conv_partial_f32",  cmsis_arm_conv_partial_f32, METH_VARARGS,""},
+{"arm_conv_partial_opt_q15",  cmsis_arm_conv_partial_opt_q15, METH_VARARGS,""},
+{"arm_conv_partial_q15",  cmsis_arm_conv_partial_q15, METH_VARARGS,""},
+{"arm_conv_partial_fast_q15",  cmsis_arm_conv_partial_fast_q15, METH_VARARGS,""},
+{"arm_conv_partial_fast_opt_q15",  cmsis_arm_conv_partial_fast_opt_q15, METH_VARARGS,""},
+{"arm_conv_partial_q31",  cmsis_arm_conv_partial_q31, METH_VARARGS,""},
+{"arm_conv_partial_fast_q31",  cmsis_arm_conv_partial_fast_q31, METH_VARARGS,""},
+{"arm_conv_partial_opt_q7",  cmsis_arm_conv_partial_opt_q7, METH_VARARGS,""},
+{"arm_conv_partial_q7",  cmsis_arm_conv_partial_q7, METH_VARARGS,""},
+{"arm_fir_decimate_f32",  cmsis_arm_fir_decimate_f32, METH_VARARGS,""},
+{"arm_fir_decimate_init_f32",  cmsis_arm_fir_decimate_init_f32, METH_VARARGS,""},
+{"arm_fir_decimate_q15",  cmsis_arm_fir_decimate_q15, METH_VARARGS,""},
+{"arm_fir_decimate_fast_q15",  cmsis_arm_fir_decimate_fast_q15, METH_VARARGS,""},
+{"arm_fir_decimate_init_q15",  cmsis_arm_fir_decimate_init_q15, METH_VARARGS,""},
+{"arm_fir_decimate_q31",  cmsis_arm_fir_decimate_q31, METH_VARARGS,""},
+{"arm_fir_decimate_fast_q31",  cmsis_arm_fir_decimate_fast_q31, METH_VARARGS,""},
+{"arm_fir_decimate_init_q31",  cmsis_arm_fir_decimate_init_q31, METH_VARARGS,""},
+{"arm_fir_interpolate_q15",  cmsis_arm_fir_interpolate_q15, METH_VARARGS,""},
+{"arm_fir_interpolate_init_q15",  cmsis_arm_fir_interpolate_init_q15, METH_VARARGS,""},
+{"arm_fir_interpolate_q31",  cmsis_arm_fir_interpolate_q31, METH_VARARGS,""},
+{"arm_fir_interpolate_init_q31",  cmsis_arm_fir_interpolate_init_q31, METH_VARARGS,""},
+{"arm_fir_interpolate_f32",  cmsis_arm_fir_interpolate_f32, METH_VARARGS,""},
+{"arm_fir_interpolate_init_f32",  cmsis_arm_fir_interpolate_init_f32, METH_VARARGS,""},
+{"arm_biquad_cas_df1_32x64_q31",  cmsis_arm_biquad_cas_df1_32x64_q31, METH_VARARGS,""},
+{"arm_biquad_cas_df1_32x64_init_q31",  cmsis_arm_biquad_cas_df1_32x64_init_q31, METH_VARARGS,""},
+{"arm_biquad_cascade_df2T_f32",  cmsis_arm_biquad_cascade_df2T_f32, METH_VARARGS,""},
+{"arm_biquad_cascade_stereo_df2T_f32",  cmsis_arm_biquad_cascade_stereo_df2T_f32, METH_VARARGS,""},
+{"arm_biquad_cascade_df2T_f64",  cmsis_arm_biquad_cascade_df2T_f64, METH_VARARGS,""},
+{"arm_biquad_cascade_df2T_init_f32",  cmsis_arm_biquad_cascade_df2T_init_f32, METH_VARARGS,""},
+{"arm_biquad_cascade_stereo_df2T_init_f32",  cmsis_arm_biquad_cascade_stereo_df2T_init_f32, METH_VARARGS,""},
+{"arm_biquad_cascade_df2T_init_f64",  cmsis_arm_biquad_cascade_df2T_init_f64, METH_VARARGS,""},
+{"arm_fir_lattice_init_q15",  cmsis_arm_fir_lattice_init_q15, METH_VARARGS,""},
+{"arm_fir_lattice_q15",  cmsis_arm_fir_lattice_q15, METH_VARARGS,""},
+{"arm_fir_lattice_init_q31",  cmsis_arm_fir_lattice_init_q31, METH_VARARGS,""},
+{"arm_fir_lattice_q31",  cmsis_arm_fir_lattice_q31, METH_VARARGS,""},
+{"arm_fir_lattice_init_f32",  cmsis_arm_fir_lattice_init_f32, METH_VARARGS,""},
+{"arm_fir_lattice_f32",  cmsis_arm_fir_lattice_f32, METH_VARARGS,""},
+{"arm_iir_lattice_f32",  cmsis_arm_iir_lattice_f32, METH_VARARGS,""},
+{"arm_iir_lattice_init_f32",  cmsis_arm_iir_lattice_init_f32, METH_VARARGS,""},
+{"arm_iir_lattice_q31",  cmsis_arm_iir_lattice_q31, METH_VARARGS,""},
+{"arm_iir_lattice_init_q31",  cmsis_arm_iir_lattice_init_q31, METH_VARARGS,""},
+{"arm_iir_lattice_q15",  cmsis_arm_iir_lattice_q15, METH_VARARGS,""},
+{"arm_iir_lattice_init_q15",  cmsis_arm_iir_lattice_init_q15, METH_VARARGS,""},
+{"arm_cfft_init_f32",  cmsis_arm_cfft_init_f32, METH_VARARGS,""},
+{"arm_cfft_init_q31",  cmsis_arm_cfft_init_q31, METH_VARARGS,""},
+{"arm_cfft_init_q15",  cmsis_arm_cfft_init_q15, METH_VARARGS,""},
+{"arm_lms_f32",  cmsis_arm_lms_f32, METH_VARARGS,""},
+{"arm_lms_init_f32",  cmsis_arm_lms_init_f32, METH_VARARGS,""},
+{"arm_lms_init_q15",  cmsis_arm_lms_init_q15, METH_VARARGS,""},
+{"arm_lms_q15",  cmsis_arm_lms_q15, METH_VARARGS,""},
+{"arm_lms_q31",  cmsis_arm_lms_q31, METH_VARARGS,""},
+{"arm_lms_init_q31",  cmsis_arm_lms_init_q31, METH_VARARGS,""},
+{"arm_lms_norm_f32",  cmsis_arm_lms_norm_f32, METH_VARARGS,""},
+{"arm_lms_norm_init_f32",  cmsis_arm_lms_norm_init_f32, METH_VARARGS,""},
+{"arm_lms_norm_q31",  cmsis_arm_lms_norm_q31, METH_VARARGS,""},
+{"arm_lms_norm_init_q31",  cmsis_arm_lms_norm_init_q31, METH_VARARGS,""},
+{"arm_lms_norm_q15",  cmsis_arm_lms_norm_q15, METH_VARARGS,""},
+{"arm_lms_norm_init_q15",  cmsis_arm_lms_norm_init_q15, METH_VARARGS,""},
+{"arm_correlate_f32",  cmsis_arm_correlate_f32, METH_VARARGS,""},
+{"arm_correlate_opt_q15",  cmsis_arm_correlate_opt_q15, METH_VARARGS,""},
+{"arm_correlate_q15",  cmsis_arm_correlate_q15, METH_VARARGS,""},
+{"arm_correlate_fast_q15",  cmsis_arm_correlate_fast_q15, METH_VARARGS,""},
+{"arm_correlate_fast_opt_q15",  cmsis_arm_correlate_fast_opt_q15, METH_VARARGS,""},
+{"arm_correlate_q31",  cmsis_arm_correlate_q31, METH_VARARGS,""},
+{"arm_correlate_fast_q31",  cmsis_arm_correlate_fast_q31, METH_VARARGS,""},
+{"arm_correlate_opt_q7",  cmsis_arm_correlate_opt_q7, METH_VARARGS,""},
+{"arm_correlate_q7",  cmsis_arm_correlate_q7, METH_VARARGS,""},
+{"arm_fir_sparse_f32",  cmsis_arm_fir_sparse_f32, METH_VARARGS,""},
+{"arm_fir_sparse_init_f32",  cmsis_arm_fir_sparse_init_f32, METH_VARARGS,""},
+{"arm_fir_sparse_init_q31",  cmsis_arm_fir_sparse_init_q31, METH_VARARGS,""},
+{"arm_fir_sparse_init_q15",  cmsis_arm_fir_sparse_init_q15, METH_VARARGS,""},
+{"arm_fir_sparse_init_q7",  cmsis_arm_fir_sparse_init_q7, METH_VARARGS,""},
+{"arm_sin_cos_f32",  cmsis_arm_sin_cos_f32, METH_VARARGS,""},
+{"arm_sin_cos_q31",  cmsis_arm_sin_cos_q31, METH_VARARGS,""},
+{"arm_cmplx_conj_f32",  cmsis_arm_cmplx_conj_f32, METH_VARARGS,""},
+{"arm_cmplx_conj_q31",  cmsis_arm_cmplx_conj_q31, METH_VARARGS,""},
+{"arm_cmplx_conj_q15",  cmsis_arm_cmplx_conj_q15, METH_VARARGS,""},
+{"arm_cmplx_mag_squared_f32",  cmsis_arm_cmplx_mag_squared_f32, METH_VARARGS,""},
+{"arm_cmplx_mag_squared_q31",  cmsis_arm_cmplx_mag_squared_q31, METH_VARARGS,""},
+{"arm_cmplx_mag_squared_q15",  cmsis_arm_cmplx_mag_squared_q15, METH_VARARGS,""},
+{"arm_pid_f32",  cmsis_arm_pid_f32, METH_VARARGS,""},
+{"arm_pid_q31",  cmsis_arm_pid_q31, METH_VARARGS,""},
+{"arm_pid_q15",  cmsis_arm_pid_q15, METH_VARARGS,""},
+{"arm_mat_inverse_f32",  cmsis_arm_mat_inverse_f32, METH_VARARGS,""},
+{"arm_mat_inverse_f64",  cmsis_arm_mat_inverse_f64, METH_VARARGS,""},
+{"arm_clarke_f32",  cmsis_arm_clarke_f32, METH_VARARGS,""},
+{"arm_clarke_q31",  cmsis_arm_clarke_q31, METH_VARARGS,""},
+{"arm_q7_to_q31",  cmsis_arm_q7_to_q31, METH_VARARGS,""},
+{"arm_inv_clarke_f32",  cmsis_arm_inv_clarke_f32, METH_VARARGS,""},
+{"arm_inv_clarke_q31",  cmsis_arm_inv_clarke_q31, METH_VARARGS,""},
+{"arm_q7_to_q15",  cmsis_arm_q7_to_q15, METH_VARARGS,""},
+{"arm_park_f32",  cmsis_arm_park_f32, METH_VARARGS,""},
+{"arm_park_q31",  cmsis_arm_park_q31, METH_VARARGS,""},
+{"arm_q7_to_float",  cmsis_arm_q7_to_float, METH_VARARGS,""},
+{"arm_inv_park_f32",  cmsis_arm_inv_park_f32, METH_VARARGS,""},
+{"arm_inv_park_q31",  cmsis_arm_inv_park_q31, METH_VARARGS,""},
+{"arm_q31_to_float",  cmsis_arm_q31_to_float, METH_VARARGS,""},
+{"arm_linear_interp_f32",  cmsis_arm_linear_interp_f32, METH_VARARGS,""},
+{"arm_linear_interp_q31",  cmsis_arm_linear_interp_q31, METH_VARARGS,""},
+{"arm_linear_interp_q15",  cmsis_arm_linear_interp_q15, METH_VARARGS,""},
+{"arm_linear_interp_q7",  cmsis_arm_linear_interp_q7, METH_VARARGS,""},
+{"arm_sin_f32",  cmsis_arm_sin_f32, METH_VARARGS,""},
+{"arm_sin_q31",  cmsis_arm_sin_q31, METH_VARARGS,""},
+{"arm_sin_q15",  cmsis_arm_sin_q15, METH_VARARGS,""},
+{"arm_cos_f32",  cmsis_arm_cos_f32, METH_VARARGS,""},
+{"arm_cos_q31",  cmsis_arm_cos_q31, METH_VARARGS,""},
+{"arm_cos_q15",  cmsis_arm_cos_q15, METH_VARARGS,""},
+{"arm_sqrt_f32",  cmsis_arm_sqrt_f32, METH_VARARGS,""},
+{"arm_sqrt_q31",  cmsis_arm_sqrt_q31, METH_VARARGS,""},
+{"arm_sqrt_q15",  cmsis_arm_sqrt_q15, METH_VARARGS,""},
+{"arm_circularWrite_f32",  cmsis_arm_circularWrite_f32, METH_VARARGS,""},
+{"arm_circularWrite_q15",  cmsis_arm_circularWrite_q15, METH_VARARGS,""},
+{"arm_circularWrite_q7",  cmsis_arm_circularWrite_q7, METH_VARARGS,""},
+{"arm_power_q31",  cmsis_arm_power_q31, METH_VARARGS,""},
+{"arm_power_f32",  cmsis_arm_power_f32, METH_VARARGS,""},
+{"arm_power_q15",  cmsis_arm_power_q15, METH_VARARGS,""},
+{"arm_power_q7",  cmsis_arm_power_q7, METH_VARARGS,""},
+{"arm_mean_q7",  cmsis_arm_mean_q7, METH_VARARGS,""},
+{"arm_mean_q15",  cmsis_arm_mean_q15, METH_VARARGS,""},
+{"arm_mean_q31",  cmsis_arm_mean_q31, METH_VARARGS,""},
+{"arm_mean_f32",  cmsis_arm_mean_f32, METH_VARARGS,""},
+{"arm_var_f32",  cmsis_arm_var_f32, METH_VARARGS,""},
+{"arm_var_q31",  cmsis_arm_var_q31, METH_VARARGS,""},
+{"arm_var_q15",  cmsis_arm_var_q15, METH_VARARGS,""},
+{"arm_rms_f32",  cmsis_arm_rms_f32, METH_VARARGS,""},
+{"arm_rms_q31",  cmsis_arm_rms_q31, METH_VARARGS,""},
+{"arm_rms_q15",  cmsis_arm_rms_q15, METH_VARARGS,""},
+{"arm_std_f32",  cmsis_arm_std_f32, METH_VARARGS,""},
+{"arm_std_q31",  cmsis_arm_std_q31, METH_VARARGS,""},
+{"arm_std_q15",  cmsis_arm_std_q15, METH_VARARGS,""},
+{"arm_cmplx_mag_f32",  cmsis_arm_cmplx_mag_f32, METH_VARARGS,""},
+{"arm_cmplx_mag_q31",  cmsis_arm_cmplx_mag_q31, METH_VARARGS,""},
+{"arm_cmplx_mag_q15",  cmsis_arm_cmplx_mag_q15, METH_VARARGS,""},
+{"arm_cmplx_dot_prod_q15",  cmsis_arm_cmplx_dot_prod_q15, METH_VARARGS,""},
+{"arm_cmplx_dot_prod_q31",  cmsis_arm_cmplx_dot_prod_q31, METH_VARARGS,""},
+{"arm_cmplx_dot_prod_f32",  cmsis_arm_cmplx_dot_prod_f32, METH_VARARGS,""},
+{"arm_cmplx_mult_real_q15",  cmsis_arm_cmplx_mult_real_q15, METH_VARARGS,""},
+{"arm_cmplx_mult_real_q31",  cmsis_arm_cmplx_mult_real_q31, METH_VARARGS,""},
+{"arm_cmplx_mult_real_f32",  cmsis_arm_cmplx_mult_real_f32, METH_VARARGS,""},
+{"arm_min_q7",  cmsis_arm_min_q7, METH_VARARGS,""},
+{"arm_min_q15",  cmsis_arm_min_q15, METH_VARARGS,""},
+{"arm_min_q31",  cmsis_arm_min_q31, METH_VARARGS,""},
+{"arm_min_f32",  cmsis_arm_min_f32, METH_VARARGS,""},
+{"arm_max_q7",  cmsis_arm_max_q7, METH_VARARGS,""},
+{"arm_max_q15",  cmsis_arm_max_q15, METH_VARARGS,""},
+{"arm_max_q31",  cmsis_arm_max_q31, METH_VARARGS,""},
+{"arm_max_f32",  cmsis_arm_max_f32, METH_VARARGS,""},
+{"arm_cmplx_mult_cmplx_q15",  cmsis_arm_cmplx_mult_cmplx_q15, METH_VARARGS,""},
+{"arm_cmplx_mult_cmplx_q31",  cmsis_arm_cmplx_mult_cmplx_q31, METH_VARARGS,""},
+{"arm_cmplx_mult_cmplx_f32",  cmsis_arm_cmplx_mult_cmplx_f32, METH_VARARGS,""},
+{"arm_float_to_q31",  cmsis_arm_float_to_q31, METH_VARARGS,""},
+{"arm_float_to_q15",  cmsis_arm_float_to_q15, METH_VARARGS,""},
+{"arm_float_to_q7",  cmsis_arm_float_to_q7, METH_VARARGS,""},
+{"arm_q31_to_q15",  cmsis_arm_q31_to_q15, METH_VARARGS,""},
+{"arm_q31_to_q7",  cmsis_arm_q31_to_q7, METH_VARARGS,""},
+{"arm_q15_to_float",  cmsis_arm_q15_to_float, METH_VARARGS,""},
+{"arm_q15_to_q31",  cmsis_arm_q15_to_q31, METH_VARARGS,""},
+{"arm_q15_to_q7",  cmsis_arm_q15_to_q7, METH_VARARGS,""},
+{"arm_bilinear_interp_f32",  cmsis_arm_bilinear_interp_f32, METH_VARARGS,""},
+{"arm_bilinear_interp_q31",  cmsis_arm_bilinear_interp_q31, METH_VARARGS,""},
+{"arm_bilinear_interp_q15",  cmsis_arm_bilinear_interp_q15, METH_VARARGS,""},
+{"arm_bilinear_interp_q7",  cmsis_arm_bilinear_interp_q7, METH_VARARGS,""},
+
+    {"error_out", (PyCFunction)error_out, METH_NOARGS, NULL},
+    {NULL, NULL, 0, NULL}        /* Sentinel */
+};
+
diff --git a/DSP/PythonWrapper/cmsisdsp_pkg/src/fftinit.c b/DSP/PythonWrapper/cmsisdsp_pkg/src/fftinit.c
new file mode 100644
index 0000000..9845a05
--- /dev/null
+++ b/DSP/PythonWrapper/cmsisdsp_pkg/src/fftinit.c
@@ -0,0 +1,262 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Python Wrapper
+ * Title:        fftinit.c
+ * Description:  FFT init functions for the Python wrapper
+ *
+ * $Date:        25. March 2019
+ * $Revision:    V0.0.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "arm_math.h"
+#include "arm_common_tables.h"
+#include "arm_const_structs.h"
+
+#define FFTINIT(SIZE)                                           \
+  S->bitRevLength = arm_cfft_sR_f32_len##SIZE.bitRevLength;        \
+  S->pBitRevTable = arm_cfft_sR_f32_len##SIZE.pBitRevTable;         \
+  S->pTwiddle = arm_cfft_sR_f32_len##SIZE.pTwiddle;
+
+#define FFTFXTINIT(EXT,SIZE)                                           \
+  S->bitRevLength = arm_cfft_sR_##EXT##_len##SIZE.bitRevLength;        \
+  S->pBitRevTable = arm_cfft_sR_##EXT##_len##SIZE.pBitRevTable;         \
+  S->pTwiddle = arm_cfft_sR_##EXT##_len##SIZE.pTwiddle;
+
+arm_status arm_cfft_init_f32(
+  arm_cfft_instance_f32 * S,
+  uint16_t fftLen)
+{
+        /*  Initialise the default arm status */                                
+        arm_status status = ARM_MATH_SUCCESS;                                   
+                                                                                
+        /*  Initialise the FFT length */                                        
+        S->fftLen = fftLen;          
+                                                                                
+        /*  Initialise the Twiddle coefficient pointer */                       
+        S->pTwiddle = (float32_t *)twiddleCoef_4096;                         
+                                                                                
+                                                                                
+        /*  Initializations of Instance structure depending on the FFT length */
+        switch (S->fftLen) {                                                    
+            /*  Initializations of structure parameters for 4096 point FFT */   
+        case 4096U:                                                             
+            /*  Initialise the bit reversal table modifier */                   
+            FFTINIT(4096);      
+            break;                                                              
+                                                                                
+            /*  Initializations of structure parameters for 2048 point FFT */   
+        case 2048U:                                                             
+            /*  Initialise the bit reversal table modifier */                   
+            FFTINIT(2048);                 
+                                                                            
+            break;                                                              
+                                                                                
+            /*  Initializations of structure parameters for 1024 point FFT */   
+        case 1024U:                                                             
+            /*  Initialise the bit reversal table modifier */                   
+            FFTINIT(1024);                 
+                                                                         
+            break;                                                              
+                                                                                
+            /*  Initializations of structure parameters for 512 point FFT */    
+        case 512U:                                                              
+            /*  Initialise the bit reversal table modifier */                   
+            FFTINIT(512);                                                                                   
+            break;                                                              
+                                                                                
+        case 256U:                                                              
+            FFTINIT(256);                                                                                  
+            break;                                                              
+                                                                                
+        case 128U:                                                              
+            FFTINIT(128);                                                                                  
+            break;                                                              
+                                                                                
+        case 64U:                                                               
+            FFTINIT(64);                                                                               
+            break;                                                              
+                                                                                
+        case 32U:                                                               
+            FFTINIT(32);                                                                                
+            break;                                                              
+                                                                                
+        case 16U:                                                               
+            /*  Initializations of structure parameters for 16 point FFT */     
+            FFTINIT(16);   
+            break;                                                              
+                                                                                
+                                                                                
+        default:                                                                
+            /*  Reporting argument error if fftSize is not valid value */       
+            status = ARM_MATH_ARGUMENT_ERROR;                                   
+            break;                                                              
+        }                                                                       
+                                                                                
+                                                                                
+        return (status);    
+}
+
+arm_status arm_cfft_init_q31(
+  arm_cfft_instance_q31 * S,
+  uint16_t fftLen)
+{
+        /*  Initialise the default arm status */                                
+        arm_status status = ARM_MATH_SUCCESS;                                   
+                                                                                
+        /*  Initialise the FFT length */                                        
+        S->fftLen = fftLen;          
+                                                                                
+        /*  Initialise the Twiddle coefficient pointer */                       
+        S->pTwiddle = (float32_t *)twiddleCoef_4096;                         
+                                                                                
+                                                                                
+        /*  Initializations of Instance structure depending on the FFT length */
+        switch (S->fftLen) {                                                    
+            /*  Initializations of structure parameters for 4096 point FFT */   
+        case 4096U:                                                             
+            /*  Initialise the bit reversal table modifier */                   
+            FFTFXTINIT(q31,4096);      
+            break;                                                              
+                                                                                
+            /*  Initializations of structure parameters for 2048 point FFT */   
+        case 2048U:                                                             
+            /*  Initialise the bit reversal table modifier */                   
+             FFTFXTINIT(q31,2048);                 
+                                                                            
+            break;                                                              
+                                                                                
+            /*  Initializations of structure parameters for 1024 point FFT */   
+        case 1024U:                                                             
+            /*  Initialise the bit reversal table modifier */                   
+             FFTFXTINIT(q31,1024);                 
+                                                                         
+            break;                                                              
+                                                                                
+            /*  Initializations of structure parameters for 512 point FFT */    
+        case 512U:                                                              
+            /*  Initialise the bit reversal table modifier */                   
+             FFTFXTINIT(q31,512);                                                                                   
+            break;                                                              
+                                                                                
+        case 256U:                                                              
+             FFTFXTINIT(q31,256);                                                                                  
+            break;                                                              
+                                                                                
+        case 128U:                                                              
+             FFTFXTINIT(q31,128);                                                                                  
+            break;                                                              
+                                                                                
+        case 64U:                                                               
+             FFTFXTINIT(q31,64);                                                                               
+            break;                                                              
+                                                                                
+        case 32U:                                                               
+             FFTFXTINIT(q31,32);                                                                                
+            break;                                                              
+                                                                                
+        case 16U:                                                               
+            /*  Initializations of structure parameters for 16 point FFT */     
+             FFTFXTINIT(q31,16);   
+            break;                                                              
+                                                                                
+                                                                                
+        default:                                                                
+            /*  Reporting argument error if fftSize is not valid value */       
+            status = ARM_MATH_ARGUMENT_ERROR;                                   
+            break;                                                              
+        }                                                                       
+                                                                                
+                                                                                
+        return (status);    
+}
+
+arm_status arm_cfft_init_q15(
+  arm_cfft_instance_q15 * S,
+  uint16_t fftLen)
+{
+        /*  Initialise the default arm status */                                
+        arm_status status = ARM_MATH_SUCCESS;                                   
+                                                                                
+        /*  Initialise the FFT length */                                        
+        S->fftLen = fftLen;          
+                                                                                
+        /*  Initialise the Twiddle coefficient pointer */                       
+        S->pTwiddle = (float32_t *)twiddleCoef_4096;                         
+                                                                                
+                                                                                
+        /*  Initializations of Instance structure depending on the FFT length */
+        switch (S->fftLen) {                                                    
+            /*  Initializations of structure parameters for 4096 point FFT */   
+        case 4096U:                                                             
+            /*  Initialise the bit reversal table modifier */                   
+            FFTFXTINIT(q15,4096);      
+            break;                                                              
+                                                                                
+            /*  Initializations of structure parameters for 2048 point FFT */   
+        case 2048U:                                                             
+            /*  Initialise the bit reversal table modifier */                   
+             FFTFXTINIT(q15,2048);                 
+                                                                            
+            break;                                                              
+                                                                                
+            /*  Initializations of structure parameters for 1024 point FFT */   
+        case 1024U:                                                             
+            /*  Initialise the bit reversal table modifier */                   
+             FFTFXTINIT(q15,1024);                 
+                                                                         
+            break;                                                              
+                                                                                
+            /*  Initializations of structure parameters for 512 point FFT */    
+        case 512U:                                                              
+            /*  Initialise the bit reversal table modifier */                   
+            FFTFXTINIT(q15,512);                                                                                   
+            break;                                                              
+                                                                                
+        case 256U:                                                              
+            FFTFXTINIT(q15,256);                                                                                  
+            break;                                                              
+                                                                                
+        case 128U:                                                              
+            FFTFXTINIT(q15,128);                                                                                  
+            break;                                                              
+                                                                                
+        case 64U:                                                               
+            FFTFXTINIT(q15,64);                                                                               
+            break;                                                              
+                                                                                
+        case 32U:                                                               
+            FFTFXTINIT(q15,32);                                                                                
+            break;                                                              
+                                                                                
+        case 16U:                                                               
+            /*  Initializations of structure parameters for 16 point FFT */     
+            FFTFXTINIT(q15,16);   
+            break;                                                              
+                                                                                
+                                                                                
+        default:                                                                
+            /*  Reporting argument error if fftSize is not valid value */       
+            status = ARM_MATH_ARGUMENT_ERROR;                                   
+            break;                                                              
+        }                                                                       
+                                                                                
+                                                                                
+        return (status);    
+}
\ No newline at end of file
diff --git a/DSP/PythonWrapper/config.py b/DSP/PythonWrapper/config.py
new file mode 100644
index 0000000..0e75a71
--- /dev/null
+++ b/DSP/PythonWrapper/config.py
@@ -0,0 +1,12 @@
+CMSISDSP = 1
+
+ROOT=".."
+
+config = CMSISDSP
+
+if config == CMSISDSP:
+    extensionName = 'cmsisdsp' 
+    setupName = 'CMSISDSP'
+    setupDescription = 'CMSIS-DSP Python API'
+    cflags="-DCMSISDSP"
+
diff --git a/DSP/PythonWrapper/example.py b/DSP/PythonWrapper/example.py
new file mode 100644
index 0000000..80fd87a
--- /dev/null
+++ b/DSP/PythonWrapper/example.py
@@ -0,0 +1,79 @@
+import cmsisdsp as dsp
+import numpy as np
+from scipy import signal
+from pylab import figure, clf, plot, xlabel, ylabel, xlim, ylim, title, grid, axes, show,semilogx, semilogy
+# Data file from https://www.physionet.org/pn3/ecgiddb/Person_87/rec_2.dat
+
+def q31sat(x):
+     if x > 0x7FFFFFFF:
+          return(np.int32(0x7FFFFFFF))
+     elif x < -0x80000000:
+          return(np.int32(0x80000000))
+     else:
+          return(np.int32(x))
+
+q31satV=np.vectorize(q31sat)
+
+def toQ31(x):
+     return(q31satV(np.round(x * (1<<31))))
+
+def Q31toF32(x):
+     return(1.0*x / 2**31)
+
+filename = 'rec_2.dat'
+
+f = open(filename,"r")
+sig = np.fromfile(f, dtype=np.int16)
+f.closed
+
+sig = 1.0*sig / (1 << 12)
+
+
+p0 = np.exp(1j*0.05) * 0.98 
+p1 = np.exp(1j*0.25) * 0.9 
+p2 = np.exp(1j*0.45) * 0.97
+
+z0 = np.exp(1j*0.02)
+z1 = np.exp(1j*0.65)
+z2 = np.exp(1j*1.0)
+
+g = 0.02
+
+nb = 300
+
+sos = signal.zpk2sos(
+      [z0,np.conj(z0),z1,np.conj(z1),z2,np.conj(z2)]
+     ,[p0, np.conj(p0),p1, np.conj(p1),p2, np.conj(p2)]
+     ,g)
+
+res=signal.sosfilt(sos,sig)
+figure()
+plot(sig[1:nb])
+figure()
+plot(res[1:nb])
+
+
+
+
+biquadQ31 = dsp.arm_biquad_casd_df1_inst_q31()
+numStages=3
+state=np.zeros(numStages*4)
+# For use in CMSIS, denominator coefs must be negated
+# and first a0 coef wihich is always 1 must be removed
+coefs=np.reshape(np.hstack((sos[:,:3],-sos[:,4:])),15)
+coefs = coefs / 4.0 
+coefsQ31 = toQ31(coefs)
+postshift = 2
+dsp.arm_biquad_cascade_df1_init_q31(biquadQ31,numStages,coefsQ31,state,postshift)
+sigQ31=toQ31(sig)
+nbSamples=sigQ31.shape[0]
+# Here we demonstrate how we can process a long sequence of samples per block
+# and thus check that the state of the biquad is well updated and preserved
+# between the calls.
+half = int(round(nbSamples / 2))
+res2a=dsp.arm_biquad_cascade_df1_q31(biquadQ31,sigQ31[1:half])
+res2b=dsp.arm_biquad_cascade_df1_q31(biquadQ31,sigQ31[half+1:nbSamples])
+res2=Q31toF32(np.hstack((res2a,res2b)))
+figure()
+plot(res2[1:nb])
+show()#
\ No newline at end of file
diff --git a/DSP/PythonWrapper/setup.py b/DSP/PythonWrapper/setup.py
new file mode 100644
index 0000000..7884518
--- /dev/null
+++ b/DSP/PythonWrapper/setup.py
@@ -0,0 +1,85 @@
+from distutils.core import setup, Extension
+import glob
+import numpy
+import config
+import sys
+import os
+from config import ROOT
+
+includes = [os.path.join(ROOT,"Include"),os.path.join("cmsisdsp_pkg","src")]
+
+if sys.platform == 'win32':
+  cflags = ["-DWIN",config.cflags,"-DUNALIGNED_SUPPORT_DISABLE"] 
+  # Custom because a customized arm_math.h is required to build on windows
+  # since the visual compiler and the win platform are
+  # not supported by default in arm_math.h
+else:
+  cflags = ["-Wno-unused-variable","-Wno-implicit-function-declaration",config.cflags]
+
+transform = glob.glob(os.path.join(ROOT,"Source","TransformFunctions","*.c"))
+#transform.remove(os.path.join(ROOT,"Source","TransformFunctions","arm_dct4_init_q15.c"))
+#transform.remove(os.path.join(ROOT,"Source","TransformFunctions","arm_rfft_init_q15.c"))
+transform.remove(os.path.join(ROOT,"Source","TransformFunctions","TransformFunctions.c"))
+
+support = glob.glob(os.path.join(ROOT,"Source","SupportFunctions","*.c"))
+support.remove(os.path.join(ROOT,"Source","SupportFunctions","SupportFunctions.c"))
+
+fastmath = glob.glob(os.path.join(ROOT,"Source","FastMathFunctions","*.c"))
+fastmath.remove(os.path.join(ROOT,"Source","FastMathFunctions","FastMathFunctions.c"))
+
+filtering = glob.glob(os.path.join(ROOT,"Source","FilteringFunctions","*.c"))
+filtering.remove(os.path.join(ROOT,"Source","FilteringFunctions","FilteringFunctions.c"))
+
+matrix = glob.glob(os.path.join(ROOT,"Source","MatrixFunctions","*.c"))
+matrix.remove(os.path.join(ROOT,"Source","MatrixFunctions","MatrixFunctions.c"))
+
+statistics = glob.glob(os.path.join(ROOT,"Source","StatisticsFunctions","*.c"))
+statistics.remove(os.path.join(ROOT,"Source","StatisticsFunctions","StatisticsFunctions.c"))
+
+complexf = glob.glob(os.path.join(ROOT,"Source","ComplexMathFunctions","*.c"))
+complexf.remove(os.path.join(ROOT,"Source","ComplexMathFunctions","ComplexMathFunctions.c"))
+
+basic = glob.glob(os.path.join(ROOT,"Source","BasicMathFunctions","*.c"))
+basic.remove(os.path.join(ROOT,"Source","BasicMathFunctions","BasicMathFunctions.c"))
+
+controller = glob.glob(os.path.join(ROOT,"Source","ControllerFunctions","*.c"))
+controller.remove(os.path.join(ROOT,"Source","ControllerFunctions","ControllerFunctions.c"))
+
+common = glob.glob(os.path.join(ROOT,"Source","CommonTables","*.c"))
+common.remove(os.path.join(ROOT,"Source","CommonTables","CommonTables.c"))
+
+#modulesrc = glob.glob(os.path.join("cmsisdsp_pkg","src","*.c"))
+modulesrc = []
+modulesrc.append(os.path.join("cmsisdsp_pkg","src","fftinit.c"))
+modulesrc.append(os.path.join("cmsisdsp_pkg","src","cmsismodule.c"))
+
+module1 = Extension(config.extensionName,
+                    sources = (support
+                              + fastmath
+                              + filtering
+                              + matrix
+                              + statistics
+                              + complexf
+                              + basic
+                              + controller
+                              + transform
+                              + modulesrc
+                              + common
+                              )
+                              ,
+                    include_dirs =  includes + [numpy.get_include()],
+                    #extra_compile_args = ["-Wno-unused-variable","-Wno-implicit-function-declaration",config.cflags]
+                    extra_compile_args = cflags
+                              )
+
+setup (name = config.setupName,
+       version = '0.0.1',
+       description = config.setupDescription,
+       ext_modules = [module1],
+       author = 'Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.',
+       url="https://github.com/ARM-software/CMSIS_5",
+       classifiers=[
+        "Programming Language :: Python",
+        "License :: OSI Approved :: Apache Software License",
+        "Operating System :: OS Independent",
+    ])
\ No newline at end of file
diff --git a/DSP/PythonWrapper/testdsp.py b/DSP/PythonWrapper/testdsp.py
new file mode 100644
index 0000000..77086c7
--- /dev/null
+++ b/DSP/PythonWrapper/testdsp.py
@@ -0,0 +1,363 @@
+import cmsisdsp as dsp
+import numpy as np
+from scipy import signal
+#import matplotlib.pyplot as plt
+#from scipy.fftpack import dct 
+
+#r = dsp.arm_add_f32(np.array([1.,2,3]),np.array([4.,5,7]))
+#print(r)
+
+#r = dsp.arm_add_q31([1,2,3],[4,5,7])
+#print(r)
+#
+#r = dsp.arm_add_q15([1,2,3],[4,5,7])
+#print(r)
+#
+#r = dsp.arm_add_q7([-1,2,3],[4,127,7])
+#print(r)
+#
+#r = dsp.arm_scale_f32([1.,2,3],2)
+#print(r)
+#
+#r = dsp.arm_scale_q31([0x7FFF,0x3FFF,0x1FFF],1 << 20,2)
+#print(r)
+#
+#r = dsp.arm_scale_q15([0x7FFF,0x3FFF,0x1FFF],1 << 10,2)
+#print(r)
+#
+#r = dsp.arm_scale_q7([0x7F,0x3F,0x1F],1 << 5,2)
+#print(r)
+#
+#
+#r = dsp.arm_negate_f32([1.,2,3])
+#print(r)
+#
+#r = dsp.arm_negate_q31([1,2,3])
+#print(r)
+#
+#r = dsp.arm_negate_q15([1,2,3])
+#print(r)
+#
+#r = dsp.arm_negate_q7(np.array([0x80,0x81,0x82]))
+#print(r)
+
+#r = dsp.arm_cmplx_conj_f32([1.,2,3,4])
+#print(r)
+
+#r = dsp.arm_cmplx_conj_q31([1,2,3,4])
+#print(r)
+
+#r = dsp.arm_cmplx_conj_q15([1,2,3,4])
+#print(r)
+
+#r = dsp.arm_cmplx_dot_prod_f32([1.,2,3,4],[1.,2,3,4])
+#print(r)
+
+#r = dsp.arm_cmplx_dot_prod_q31([0x1FFF,0x3FFF,0x1FFF,0x3FFF],[0x1FFF,0x3FFF,0x1FFF,0x3FFF])
+#print(r)
+
+#r = dsp.arm_cmplx_mult_real_f32([1.0,2,3,4],[5.,5.,5.,5.])
+#print(r)
+
+#pidf32 = dsp.arm_pid_instance_f32(Kp=1.0,Ki=1.2,Kd=0.4)
+#print(pidf32.Kp())
+#print(pidf32.Ki())
+#print(pidf32.Kd())
+#print(pidf32.A0())
+#
+#dsp.arm_pid_init_f32(pidf32,0)
+#print(pidf32.A0())
+
+#print(dsp.arm_cos_f32(3.14/4.))
+
+#print(dsp.arm_sqrt_q31(0x7FFF))
+
+firf32 = dsp.arm_fir_instance_f32()
+dsp.arm_fir_init_f32(firf32,3,[1.,2,3],[0,0,0,0,0,0,0])
+print(firf32.numTaps())
+filtered_x = signal.lfilter([3,2,1.], 1.0, [1,2,3,4,5,1,2,3,4,5])
+print(filtered_x)
+print(dsp.arm_fir_f32(firf32,[1,2,3,4,5]))
+print(dsp.arm_fir_f32(firf32,[1,2,3,4,5]))
+
+def q31sat(x):
+     if x > 0x7FFFFFFF:
+          return(np.int32(0x7FFFFFFF))
+     elif x < -0x80000000:
+          return(np.int32(0x80000000))
+     else:
+          return(np.int32(x))
+
+q31satV=np.vectorize(q31sat)
+
+def toQ31(x):
+     return(q31satV(np.round(x * (1<<31))))
+
+def q15sat(x):
+     if x > 0x7FFF:
+          return(np.int16(0x7FFF))
+     elif x < -0x8000:
+          return(np.int16(0x8000))
+     else:
+          return(np.int16(x))
+
+q15satV=np.vectorize(q15sat)
+
+def toQ15(x):
+     return(q15satV(np.round(x * (1<<15))))
+
+def q7sat(x):
+     if x > 0x7F:
+          return(np.int8(0x7F))
+     elif x < -0x80:
+          return(np.int8(0x80))
+     else:
+          return(np.int8(x))
+
+q7satV=np.vectorize(q7sat)
+
+def toQ7(x):
+     return(q7satV(np.round(x * (1<<7))))
+
+def Q31toF32(x):
+     return(1.0*x / 2**31)
+
+def Q15toF32(x):
+     return(1.0*x / 2**15)
+
+def Q7toF32(x):
+     return(1.0*x / 2**7)
+
+#firq31 = dsp.arm_fir_instance_q31()
+#x=np.array([1,2,3,4,5])/10.0
+#taps=np.array([1,2,3])/10.0
+#xQ31=toQ31(x)
+#tapsQ31=toQ31(taps)
+#dsp.arm_fir_init_q31(firq31,3,tapsQ31,[0,0,0,0,0,0,0])
+#print(firq31.numTaps())
+#resultQ31=dsp.arm_fir_q31(firq31,xQ31)
+#result=Q31toF32(resultQ31)
+#print(result)
+
+#a=np.array([[1.,2,3,4],[5,6,7,8],[9,10,11,12]])
+#b=np.array([[1.,2,3,4],[5.1,6,7,8],[9.1,10,11,12]])
+#print(a+b)
+#v=dsp.arm_mat_add_f32(a,b)
+#print(v)
+
+#a=np.array([[1.,2,3,4],[5,6,7,8],[9,10,11,12]])
+#b=np.array([[1.,2,3],[5.1,6,7],[9.1,10,11],[5,8,4]])
+#print(np.dot(a , b))
+#v=dsp.arm_mat_mult_f32(a,b)
+#print(v)
+
+def imToReal2D(a):
+    ar=np.zeros(np.array(a.shape) * [1,2])
+    ar[::,0::2]=a.real
+    ar[::,1::2]=a.imag
+    return(ar)
+
+def realToIm2D(ar):
+    return(ar[::,0::2] + 1j * ar[::,1::2])
+
+#a=np.array([[1. + 2j,3 + 4j],[5 + 6j,7 + 8j],[9 + 10j,11 + 12j]])
+#b=np.array([[1. + 2j, 3 + 5.1j ,6 + 7j],[9.1 + 10j,11 + 5j,8 +4j]])
+#print(np.dot(a , b))
+#
+# Convert complex array to real array for use in CMSIS DSP
+#ar = imToReal2D(a)
+#br = imToReal2D(b)
+#
+#v=dsp.arm_mat_cmplx_mult_f32(ar,br)
+#print(v)
+
+#a=np.array([[1.,2,3,4],[5,6,7,8],[9,10,11,12]]) / 30.0
+#b=np.array([[1.,2,3,4],[5.1,6,7,8],[9.1,10,11,12]]) / 30.0
+#print(a+b)
+#
+#aQ31=toQ31(a)
+#bQ31=toQ31(b)
+#v=dsp.arm_mat_add_q31(aQ31,bQ31)
+#rQ31=v[1]
+#r=Q31toF32(rQ31)
+#print(r)#
+
+#a=np.array([[1.,2,3,4],[5,6,7,8],[9,10,11,12]])
+#print(np.transpose(a))
+#print(dsp.arm_mat_trans_f32(a))
+
+#a = np.array([[1., 2.], [3., 4.]])
+#print(np.linalg.inv(a))
+#print(dsp.arm_mat_inverse_f32(a))
+
+#a = np.array([[1., 2.], [3., 4.]])
+#print(np.linalg.inv(a))
+#print(dsp.arm_mat_inverse_f64(a))
+
+#a=np.array([[1.,2,3,4],[5,6,7,8],[9,10,11,12]])
+#print(2.5*a)
+#print(dsp.arm_mat_scale_f32(a,2.5))
+
+#a=np.array([1.,2,3,4,5,6,7,8,9,10,11,12])
+#print(np.max(a))
+#print(np.argmax(a))
+#print(dsp.arm_max_f32(a))
+#
+#print(np.mean(a))
+#print(dsp.arm_mean_f32(a))
+#
+#print(np.dot(a,a))
+#print(dsp.arm_power_f32(a))
+#
+
+def imToReal1D(a):
+    ar=np.zeros(np.array(a.shape) * 2)
+    ar[0::2]=a.real
+    ar[1::2]=a.imag
+    return(ar)
+
+def realToIm1D(ar):
+    return(ar[0::2] + 1j * ar[1::2])
+
+#nb = 16
+#signal = np.cos(2 * np.pi * np.arange(nb) / nb)
+
+#result=np.fft.fft(signal)
+#print(result)
+#signalR = imToReal1D(signal)
+#cfftf32=dsp.arm_cfft_instance_f32()
+#status=dsp.arm_cfft_init_f32(cfftf32,nb)
+#print(status)
+#resultR = dsp.arm_cfft_f32(cfftf32,signalR,0,1)
+#resultI = realToIm1D(resultR)
+#print(resultI)
+
+#signal = signal / 10.0
+#result=np.fft.fft(signal)
+#print(result)
+#
+#signalR = imToReal1D(signal)
+#signalRQ31=toQ31(signalR)
+#cfftq31=dsp.arm_cfft_instance_q31()
+#status=dsp.arm_cfft_init_q31(cfftq31,nb)
+#print(status)
+#resultR = dsp.arm_cfft_q31(cfftq31,signalRQ31,0,1)
+#resultI = realToIm1D(Q31toF32(resultR))*16
+#print(resultI)
+
+#signal = signal / 10.0
+#result=np.fft.fft(signal)
+#print(result)
+##
+#signalR = imToReal1D(signal)
+#signalRQ15=toQ15(signalR)
+#cfftq15=dsp.arm_cfft_instance_q15()
+#status=dsp.arm_cfft_init_q15(cfftq15,nb)
+#print(status)
+#resultR = dsp.arm_cfft_q15(cfftq15,signalRQ15,0,1)
+#resultR=Q15toF32(resultR)
+#resultI = realToIm1D(resultR)*16
+#print(resultI)
+
+#nb = 128
+#signal = np.cos(2 * np.pi * np.arange(nb) / nb)
+#
+#result=np.fft.fft(signal)
+##print(result)
+#cfftradix4f32=dsp.arm_cfft_radix4_instance_f32()
+#rfftf32=dsp.arm_rfft_instance_f32()
+#status=dsp.arm_rfft_init_f32(rfftf32,cfftradix4f32,nb,0,1)
+#print(status)
+#resultI = dsp.arm_rfft_f32(rfftf32,signal)
+#print(result)
+
+#nb = 128
+#signal = np.cos(2 * np.pi * np.arange(nb) / nb)
+#signalRQ31=toQ31(signal)
+#
+#result=np.fft.fft(signal)
+##print(result)
+#rfftq31=dsp.arm_rfft_instance_q31()
+#status=dsp.arm_rfft_init_q31(rfftq31,nb,0,1)
+#print(status)
+#resultI = dsp.arm_rfft_q31(rfftq31,signalRQ31)
+#resultI=Q31toF32(resultI)*(1 << 7)
+##print(result)
+
+#nb = 128
+#signal = np.cos(2 * np.pi * np.arange(nb) / nb)
+#signalRQ15=toQ15(signal)
+#
+#result=np.fft.fft(signal)
+##print(result)
+#rfftq15=dsp.arm_rfft_instance_q15()
+#status=dsp.arm_rfft_init_q15(rfftq15,nb,0,1)
+#print(status)
+#resultI = dsp.arm_rfft_q15(rfftq15,signalRQ15)
+#resultI=Q15toF32(resultI)*(1 << 7)
+#print(result)
+
+
+#nb = 128
+#nb2=64
+#signal = np.cos(2 * np.pi * np.arange(nb) / nb)
+#result=dct(signal,4,norm='ortho')
+##print(result)
+
+#cfftradix4f32=dsp.arm_cfft_radix4_instance_f32()
+#rfftf32=dsp.arm_rfft_instance_f32()
+#dct4f32=dsp.arm_dct4_instance_f32()
+#status=dsp.arm_dct4_init_f32(dct4f32,rfftf32,cfftradix4f32,nb,nb2,0.125)
+#print(status)
+#state=np.zeros(2*nb)
+#resultI = dsp.arm_dct4_f32(dct4f32,state,signal)
+##print(resultI)
+
+
+#signal = signal / 10.0
+#result=dct(signal,4,norm='ortho')
+#signalQ31=toQ31(signal)
+#cfftradix4q31=dsp.arm_cfft_radix4_instance_q31()
+#rfftq31=dsp.arm_rfft_instance_q31()
+#dct4q31=dsp.arm_dct4_instance_q31()
+#status=dsp.arm_dct4_init_q31(dct4q31,rfftq31,cfftradix4q31,nb,nb2,0x10000000)
+#print(status)
+#state=np.zeros(2*nb)
+#resultI = dsp.arm_dct4_q31(dct4q31,state,signalQ31)
+#resultI=Q31toF32(resultI)*(1 << 7)
+
+#nb = 128
+#nb2=64
+#signal = np.cos(2 * np.pi * np.arange(nb) / nb)
+#signal = signal / 10.0
+#result=dct(signal,4,norm='ortho')
+#signalQ15=toQ15(signal)
+#cfftradix4q15=dsp.arm_cfft_radix4_instance_q15()
+#rfftq15=dsp.arm_rfft_instance_q15()
+#dct4q15=dsp.arm_dct4_instance_q15()
+#status=dsp.arm_dct4_init_q15(dct4q15,rfftq15,cfftradix4q15,nb,nb2,0x1000)
+#print(status)
+#state=np.zeros(2*nb)
+#resultI = dsp.arm_dct4_q15(dct4q15,state,signalQ15)
+#resultI=Q15toF32(resultI)*(1 << 7)
+#
+#
+#from pylab import figure, clf, plot, xlabel, ylabel, xlim, ylim, title, grid, axes, show
+#figure(1)
+#plot(np.absolute(signal))
+#t = np.arange(nb)
+#freq = np.fft.fftfreq(t.shape[-1])
+#resultmag=np.absolute(result)
+#figure(2)
+#plot(resultmag)
+#figure(3)
+#cmsigmag=np.absolute(resultI)
+#plot(cmsigmag)
+#show()##
+
+#biquadf32 = dsp.arm_biquad_casd_df1_inst_f32()
+#numStages=1
+#state=np.zeros(numStages*4)
+#coefs=[1.,2,3,4,5]
+#dsp.arm_biquad_cascade_df1_init_f32(biquadf32,1,coefs,state)
+#print(dsp.arm_biquad_cascade_df1_f32(biquadf32,[1,2,3,4,5]))#
\ No newline at end of file
diff --git a/DSP/README.md b/DSP/README.md
new file mode 100644
index 0000000..8900dc7
--- /dev/null
+++ b/DSP/README.md
@@ -0,0 +1,101 @@
+# README
+
+## How to use
+
+This document is explaining how to use cmake with CMSIS-DSP and AC6 ARM compiler.
+
+The examples arm_variance_f32 in folder Examples/ARM/arm_variance_f32 has been modified to also
+support cmake and is used as an example in this document.
+
+If you don't use AC6, you'll need to modify the cmake files as explained below.
+
+### Generating the Makefiles
+
+To build example arm_variance_f32 with cmake, you need to create a build folder where the build will take place. Don't build in your source directory.
+
+You can create a build folder in Examples/ARM/arm_variance_f32
+
+Once you are in the build folder, you can use cmake to generate the Makefiles.
+
+For instance, to build for m7 :
+cmake -DCMAKE_TOOLCHAIN_FILE=../../../../armcc.cmake -DARM_CPU="cortex-m7" -G "Unix Makefiles" ..
+
+To build for A5
+cmake -DCMAKE_TOOLCHAIN_FILE=../../../../armcc.cmake -DARM_CPU="cortex-a5" -G "Unix Makefiles" ..
+
+To build for A5 with Neon acceleration
+cmake -DCMAKE_TOOLCHAIN_FILE=../../../../armcc.cmake -DNEON=ON -DARM_CPU="cortex-a5" -G "Unix Makefiles" ..
+
+cmake will check it can find the cross compiling tools as defined in armcc.cmake
+
+### Toolchain 
+
+You may have to change the "tools" variable in armcc.make. It is pointing to your toolchain.
+The version of armcc.cmake on github is using the ARM AC6 compiler coming from the ArmDS environment.  The tools variable is thus pointing to ArmDS.
+
+If you use a different clang toolchain, you can just modify the tools path.
+
+If you build with gcc, you'll need to change armcc.cmake, config.cmake and configUtils.cmake
+
+config.make is defining options like -mfpu and the value to pass to gcc (or other compiler) may be different.
+
+configUtils.cmake is defining the use of a scatter file and it may be different with gcc.
+
+### Building 
+
+make VERBOSE=1
+
+### Running
+
+The executable can run on a FVP. 
+For instance, if you built for m7, you could just do:
+
+FVP_MPS2_Cortex-M7.exe -a arm_variance_example
+
+## Customization
+
+armcc.make is use to cross compil with AC6 coming from ArmDS.
+
+You'll need to create a different toolchain file if you use something different.
+Then you'll need to pass this file to cmake on the command line.
+
+config.cmake is included by the CMSIS-DSP cmake and is defining the options and include paths
+needed to compile CMSIS-DSP.
+
+configBoot.cmake are definitions required to run an executable on a platform. It is using files from the Device folder of CMSIS. The result can run on FVP.
+
+If you need to run on something different, you'll need to modfy configBoot. If you need a different scatter file you'll need to modify configBoot.
+
+configBoot is relying on some functions defined in configUtils and most of the customizations should be done here.
+
+## Compilation symbols for tables
+
+Some new compilations symbols have been introduced to avoid including all the tables if they are not needed.
+
+If no new symbol is defined, everything will behave as usual. If ARM_DSP_CONFIG_TABLES is defined then the new symbols will be taken into account.
+
+Then you can select all FFT tables or all interpolation tables by defining following compilation symbols:
+ARM_ALL_FFT_TABLES : All FFT tables are included 
+ARM_ALL_FAST_TABLES : All interpolation tables are included
+
+If more control is required, there are other symbols but it is not always easy to know which ones need to be enabled for a given use case.
+
+If you use cmake, it is easy since high level options are defined and they will select the right compilation symbols. If you don't use cmake, you can just look at fft.cmake to see which compilation symbols are needed.
+
+For instance, if you want to use the arm_rfft_fast_f32, in fft.cmake you'll see an option RFFT_FAST_F32_32.
+
+We see that following symbols need to be enabled :
+
+* ARM_TABLE_TWIDDLECOEF_F32_16 
+* ARM_TABLE_BITREVIDX_FLT_16
+* ARM_TABLE_TWIDDLECOEF_RFFT_F32_32
+* ARM_TABLE_TWIDDLECOEF_F32_16
+
+In addition to that, ARM_DSP_CONFIG_TABLES must be enabled and finally ARM_FFT_ALLOW_TABLES must also be defined.
+
+This last symbol is required because if you don't want to include the TransformFunctions in your build of CMSIS-DSP then all tables related to FFT must not be included. It is the purpose of this flag.
+
+
+
+
+
diff --git a/DSP/Source/BasicMathFunctions/BasicMathFunctions.c b/DSP/Source/BasicMathFunctions/BasicMathFunctions.c
new file mode 100644
index 0000000..b444c11
--- /dev/null
+++ b/DSP/Source/BasicMathFunctions/BasicMathFunctions.c
@@ -0,0 +1,63 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        BasicMathFunctions.c
+ * Description:  Combination of all basic math function source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_abs_f32.c"
+#include "arm_abs_q15.c"
+#include "arm_abs_q31.c"
+#include "arm_abs_q7.c"
+#include "arm_add_f32.c"
+#include "arm_add_q15.c"
+#include "arm_add_q31.c"
+#include "arm_add_q7.c"
+#include "arm_dot_prod_f32.c"
+#include "arm_dot_prod_q15.c"
+#include "arm_dot_prod_q31.c"
+#include "arm_dot_prod_q7.c"
+#include "arm_mult_f32.c"
+#include "arm_mult_q15.c"
+#include "arm_mult_q31.c"
+#include "arm_mult_q7.c"
+#include "arm_negate_f32.c"
+#include "arm_negate_q15.c"
+#include "arm_negate_q31.c"
+#include "arm_negate_q7.c"
+#include "arm_offset_f32.c"
+#include "arm_offset_q15.c"
+#include "arm_offset_q31.c"
+#include "arm_offset_q7.c"
+#include "arm_scale_f32.c"
+#include "arm_scale_q15.c"
+#include "arm_scale_q31.c"
+#include "arm_scale_q7.c"
+#include "arm_shift_q15.c"
+#include "arm_shift_q31.c"
+#include "arm_shift_q7.c"
+#include "arm_sub_f32.c"
+#include "arm_sub_q15.c"
+#include "arm_sub_q31.c"
+#include "arm_sub_q7.c"
diff --git a/DSP/Source/BasicMathFunctions/CMakeLists.txt b/DSP/Source/BasicMathFunctions/CMakeLists.txt
new file mode 100644
index 0000000..717669f
--- /dev/null
+++ b/DSP/Source/BasicMathFunctions/CMakeLists.txt
@@ -0,0 +1,16 @@
+cmake_minimum_required (VERSION 3.6)
+
+project(CMSISDSPBasicMath)
+
+
+file(GLOB SRC "./*_*.c")
+
+add_library(CMSISDSPBasicMath STATIC ${SRC})
+
+configdsp(CMSISDSPBasicMath ..)
+
+### Includes
+target_include_directories(CMSISDSPBasicMath PUBLIC "${DSP}/../../Include")
+
+
+
diff --git a/DSP/Source/BasicMathFunctions/arm_abs_f32.c b/DSP/Source/BasicMathFunctions/arm_abs_f32.c
index f88ef95..a7d2624 100644
--- a/DSP/Source/BasicMathFunctions/arm_abs_f32.c
+++ b/DSP/Source/BasicMathFunctions/arm_abs_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_abs_f32.c
  * Description:  Floating-point vector absolute value
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,124 +30,117 @@
 #include <math.h>
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @defgroup BasicAbs Vector Absolute Value
- *
- * Computes the absolute value of a vector on an element-by-element basis.
- *
- * <pre>
- *     pDst[n] = abs(pSrc[n]),   0 <= n < blockSize.
- * </pre>
- *
- * The functions support in-place computation allowing the source and
- * destination pointers to reference the same memory buffer.
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+  @defgroup BasicAbs Vector Absolute Value
+
+  Computes the absolute value of a vector on an element-by-element basis.
+
+  <pre>
+      pDst[n] = abs(pSrc[n]),   0 <= n < blockSize.
+  </pre>
+
+  The functions support in-place computation allowing the source and
+  destination pointers to reference the same memory buffer.
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
  */
 
 /**
- * @addtogroup BasicAbs
- * @{
+  @addtogroup BasicAbs
+  @{
  */
 
 /**
- * @brief Floating-point vector absolute value.
- * @param[in]       *pSrc points to the input buffer
- * @param[out]      *pDst points to the output buffer
- * @param[in]       blockSize number of samples in each vector
- * @return none.
+  @brief         Floating-point vector absolute value.
+  @param[in]     pSrc       points to the input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
  */
 
 void arm_abs_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
 
-#if defined (ARM_MATH_DSP)
+#if defined(ARM_MATH_NEON)
+    float32x4_t vec1;
+    float32x4_t res;
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t in1, in2, in3, in4;                  /* temporary variables */
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
 
-  /*loop Unrolling */
+    while (blkCnt > 0U)
+    {
+        /* C = |A| */
+
+    	/* Calculate absolute values and then store the results in the destination buffer. */
+        vec1 = vld1q_f32(pSrc);
+        res = vabsq_f32(vec1);
+        vst1q_f32(pDst, res);
+
+        /* Increment pointers */
+        pSrc += 4;
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = |A| */
-    /* Calculate absolute and then store the results in the destination buffer. */
-    /* read sample from source */
-    in1 = *pSrc;
-    in2 = *(pSrc + 1);
-    in3 = *(pSrc + 2);
 
-    /* find absolute value */
-    in1 = fabsf(in1);
+    /* Calculate absolute and store result in destination buffer. */
+    *pDst++ = fabsf(*pSrc++);
 
-    /* read sample from source */
-    in4 = *(pSrc + 3);
+    *pDst++ = fabsf(*pSrc++);
 
-    /* find absolute value */
-    in2 = fabsf(in2);
+    *pDst++ = fabsf(*pSrc++);
 
-    /* read sample from source */
-    *pDst = in1;
+    *pDst++ = fabsf(*pSrc++);
 
-    /* find absolute value */
-    in3 = fabsf(in3);
-
-    /* find absolute value */
-    in4 = fabsf(in4);
-
-    /* store result to destination */
-    *(pDst + 1) = in2;
-
-    /* store result to destination */
-    *(pDst + 2) = in3;
-
-    /* store result to destination */
-    *(pDst + 3) = in4;
-
-
-    /* Update source pointer to process next sampels */
-    pSrc += 4U;
-
-    /* Update destination pointer to process next sampels */
-    pDst += 4U;
-
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /*   #if defined (ARM_MATH_DSP)   */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
 
   while (blkCnt > 0U)
   {
     /* C = |A| */
-    /* Calculate absolute and then store the results in the destination buffer. */
+
+    /* Calculate absolute and store result in destination buffer. */
     *pDst++ = fabsf(*pSrc++);
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
+
 }
 
 /**
- * @} end of BasicAbs group
+  @} end of BasicAbs group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_abs_q15.c b/DSP/Source/BasicMathFunctions/arm_abs_q15.c
index ec47fff..eb944ce 100644
--- a/DSP/Source/BasicMathFunctions/arm_abs_q15.c
+++ b/DSP/Source/BasicMathFunctions/arm_abs_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_abs_q15.c
  * Description:  Q15 vector absolute value
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,139 +29,104 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup BasicAbs
- * @{
+  @addtogroup BasicAbs
+  @{
  */
 
 /**
- * @brief Q15 vector absolute value.
- * @param[in]       *pSrc points to the input buffer
- * @param[out]      *pDst points to the output buffer
- * @param[in]       blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
+  @brief         Q15 vector absolute value.
+  @param[in]     pSrc       points to the input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
  */
 
 void arm_abs_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+        q15_t in;                                      /* Temporary input variable */
 
-#if defined (ARM_MATH_DSP)
-  __SIMD32_TYPE *simd;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t in1;                                     /* Input value1 */
-  q15_t in2;                                     /* Input value2 */
-
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  simd = __SIMD32_CONST(pDst);
   while (blkCnt > 0U)
   {
     /* C = |A| */
-    /* Read two inputs */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
 
-
-    /* Store the Absolute result in the destination buffer by packing the two values, in a single cycle */
-#ifndef  ARM_MATH_BIG_ENDIAN
-    *simd++ =
-      __PKHBT(((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)),
-              ((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), 16);
-
+    /* Calculate absolute of input (if -1 then saturated to 0x7fff) and store result in destination buffer. */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
 #else
+    *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
+#endif
 
-
-    *simd++ =
-      __PKHBT(((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)),
-              ((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), 16);
-
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-    *simd++ =
-      __PKHBT(((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)),
-              ((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), 16);
-
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
 #else
+    *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
+#endif
 
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
+#endif
 
-    *simd++ =
-      __PKHBT(((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)),
-              ((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), 16);
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
+#endif
 
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
-  pDst = (q15_t *)simd;
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    /* C = |A| */
-    /* Read the input */
-    in1 = *pSrc++;
-
-    /* Calculate absolute value of input and then store the result in the destination buffer. */
-    *pDst++ = (in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  q15_t in;                                      /* Temporary input variable */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     /* C = |A| */
-    /* Read the input */
+
+    /* Calculate absolute of input (if -1 then saturated to 0x7fff) and store result in destination buffer. */
     in = *pSrc++;
-
-    /* Calculate absolute value of input and then store the result in the destination buffer. */
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
+#else
     *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
+#endif
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of BasicAbs group
+  @} end of BasicAbs group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_abs_q31.c b/DSP/Source/BasicMathFunctions/arm_abs_q31.c
index 2733f51..bf7608b 100644
--- a/DSP/Source/BasicMathFunctions/arm_abs_q31.c
+++ b/DSP/Source/BasicMathFunctions/arm_abs_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_abs_q31.c
  * Description:  Q31 vector absolute value
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,90 +29,104 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup BasicAbs
- * @{
+  @addtogroup BasicAbs
+  @{
  */
 
-
 /**
- * @brief Q31 vector absolute value.
- * @param[in]       *pSrc points to the input buffer
- * @param[out]      *pDst points to the output buffer
- * @param[in]       blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
+  @brief         Q31 vector absolute value.
+  @param[in]     pSrc       points to the input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
  */
 
 void arm_abs_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in;                                      /* Input value */
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t in;                                      /* Temporary variable */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = |A| */
-    /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
 
-    *pDst++ = (in1 > 0) ? in1 : (q31_t)__QSUB(0, in1);
-    *pDst++ = (in2 > 0) ? in2 : (q31_t)__QSUB(0, in2);
-    *pDst++ = (in3 > 0) ? in3 : (q31_t)__QSUB(0, in3);
-    *pDst++ = (in4 > 0) ? in4 : (q31_t)__QSUB(0, in4);
+    /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and store result in destination buffer. */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
+#endif
 
-    /* Decrement the loop counter */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
+#endif
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /*   #if defined (ARM_MATH_DSP)   */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* C = |A| */
-    /* Calculate absolute value of the input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */
-    in = *pSrc++;
-    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
 
-    /* Decrement the loop counter */
+    /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and store result in destination buffer. */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
+#endif
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
 }
 
 /**
- * @} end of BasicAbs group
+  @} end of BasicAbs group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_abs_q7.c b/DSP/Source/BasicMathFunctions/arm_abs_q7.c
index d0acbfc..a6c4a6c 100644
--- a/DSP/Source/BasicMathFunctions/arm_abs_q7.c
+++ b/DSP/Source/BasicMathFunctions/arm_abs_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_abs_q7.c
  * Description:  Q7 vector absolute value
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,117 +29,106 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup BasicAbs
- * @{
+  @addtogroup BasicAbs
+  @{
  */
 
 /**
- * @brief Q7 vector absolute value.
- * @param[in]       *pSrc points to the input buffer
- * @param[out]      *pDst points to the output buffer
- * @param[in]       blockSize number of samples in each vector
- * @return none.
- *
- * \par Conditions for optimum performance
- *  Input and output buffers should be aligned by 32-bit
- *
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
+  @brief         Q7 vector absolute value.
+  @param[in]     pSrc       points to the input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Conditions for optimum performance
+                   Input and output buffers should be aligned by 32-bit
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
  */
 
 void arm_abs_q7(
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
-  q7_t in;                                       /* Input value1 */
+        uint32_t blkCnt;                               /* Loop counter */
+        q7_t in;                                       /* Temporary input variable */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;                      /* temporary input variables */
-  q31_t out1, out2, out3, out4;                  /* temporary output variables */
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = |A| */
-    /* Read inputs */
-    in1 = (q31_t) * pSrc;
-    in2 = (q31_t) * (pSrc + 1);
-    in3 = (q31_t) * (pSrc + 2);
 
-    /* find absolute value */
-    out1 = (in1 > 0) ? in1 : (q31_t)__QSUB8(0, in1);
+    /* Calculate absolute of input (if -1 then saturated to 0x7f) and store result in destination buffer. */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q7_t)__QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
+#endif
 
-    /* read input */
-    in4 = (q31_t) * (pSrc + 3);
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q7_t)__QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
+#endif
 
-    /* find absolute value */
-    out2 = (in2 > 0) ? in2 : (q31_t)__QSUB8(0, in2);
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q7_t)__QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
+#endif
 
-    /* store result to destination */
-    *pDst = (q7_t) out1;
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q7_t)__QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
+#endif
 
-    /* find absolute value */
-    out3 = (in3 > 0) ? in3 : (q31_t)__QSUB8(0, in3);
-
-    /* find absolute value */
-    out4 = (in4 > 0) ? in4 : (q31_t)__QSUB8(0, in4);
-
-    /* store result to destination */
-    *(pDst + 1) = (q7_t) out2;
-
-    /* store result to destination */
-    *(pDst + 2) = (q7_t) out3;
-
-    /* store result to destination */
-    *(pDst + 3) = (q7_t) out4;
-
-    /* update pointers to process next samples */
-    pSrc += 4U;
-    pDst += 4U;
-
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
+
 #else
 
-  /* Run the below code for Cortex-M0 */
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #define ARM_MATH_CM0_FAMILY */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* C = |A| */
-    /* Read the input */
+
+    /* Calculate absolute of input (if -1 then saturated to 0x7f) and store result in destination buffer. */
     in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q7_t) __QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
+#endif
 
-    /* Store the Absolute result in the destination buffer */
-    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? 0x7f : -in);
-
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
+
 }
 
 /**
- * @} end of BasicAbs group
+  @} end of BasicAbs group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_add_f32.c b/DSP/Source/BasicMathFunctions/arm_add_f32.c
index 78feb64..1c66a24 100644
--- a/DSP/Source/BasicMathFunctions/arm_add_f32.c
+++ b/DSP/Source/BasicMathFunctions/arm_add_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_add_f32.c
  * Description:  Floating-point vector addition
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,110 +29,117 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @defgroup BasicAdd Vector Addition
- *
- * Element-by-element addition of two vectors.
- *
- * <pre>
- *     pDst[n] = pSrcA[n] + pSrcB[n],   0 <= n < blockSize.
- * </pre>
- *
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+  @defgroup BasicAdd Vector Addition
+
+  Element-by-element addition of two vectors.
+
+  <pre>
+      pDst[n] = pSrcA[n] + pSrcB[n],   0 <= n < blockSize.
+  </pre>
+
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
  */
 
 /**
- * @addtogroup BasicAdd
- * @{
+  @addtogroup BasicAdd
+  @{
  */
 
 /**
- * @brief Floating-point vector addition.
- * @param[in]       *pSrcA points to the first input vector
- * @param[in]       *pSrcB points to the second input vector
- * @param[out]      *pDst points to the output vector
- * @param[in]       blockSize number of samples in each vector
- * @return none.
+  @brief         Floating-point vector addition.
+  @param[in]     pSrcA      points to first input vector
+  @param[in]     pSrcB      points to second input vector
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
  */
 
 void arm_add_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t blockSize)
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
 
-#if defined (ARM_MATH_DSP)
+#if defined(ARM_MATH_NEON)
+    float32x4_t vec1;
+    float32x4_t vec2;
+    float32x4_t res;
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t inA1, inA2, inA3, inA4;              /* temporary input variabels */
-  float32_t inB1, inB2, inB3, inB4;              /* temporary input variables */
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
 
-  /*loop Unrolling */
+    while (blkCnt > 0U)
+    {
+        /* C = A + B */
+
+    	/* Add and then store the results in the destination buffer. */
+        vec1 = vld1q_f32(pSrcA);
+        vec2 = vld1q_f32(pSrcB);
+        res = vaddq_f32(vec1, vec2);
+        vst1q_f32(pDst, res);
+
+        /* Increment pointers */
+        pSrcA += 4;
+        pSrcB += 4; 
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
 
-    /* read four inputs from sourceA and four inputs from sourceB */
-    inA1 = *pSrcA;
-    inB1 = *pSrcB;
-    inA2 = *(pSrcA + 1);
-    inB2 = *(pSrcB + 1);
-    inA3 = *(pSrcA + 2);
-    inB3 = *(pSrcB + 2);
-    inA4 = *(pSrcA + 3);
-    inB4 = *(pSrcB + 3);
+    /* Add and store result in destination buffer. */
+    *pDst++ = (*pSrcA++) + (*pSrcB++);
+    *pDst++ = (*pSrcA++) + (*pSrcB++);
+    *pDst++ = (*pSrcA++) + (*pSrcB++);
+    *pDst++ = (*pSrcA++) + (*pSrcB++);
 
-    /* C = A + B */
-    /* add and store result to destination */
-    *pDst = inA1 + inB1;
-    *(pDst + 1) = inA2 + inB2;
-    *(pDst + 2) = inA3 + inB3;
-    *(pDst + 3) = inA4 + inB4;
-
-    /* update pointers to process next samples */
-    pSrcA += 4U;
-    pSrcB += 4U;
-    pDst += 4U;
-
-
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
 
   while (blkCnt > 0U)
   {
     /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
+
+    /* Add and store result in destination buffer. */
     *pDst++ = (*pSrcA++) + (*pSrcB++);
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
+
 }
 
 /**
- * @} end of BasicAdd group
+  @} end of BasicAdd group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_add_q15.c b/DSP/Source/BasicMathFunctions/arm_add_q15.c
index 80a523f..bc62937 100644
--- a/DSP/Source/BasicMathFunctions/arm_add_q15.c
+++ b/DSP/Source/BasicMathFunctions/arm_add_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_add_q15.c
  * Description:  Q15 vector addition
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,100 +29,98 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup BasicAdd
- * @{
+  @addtogroup BasicAdd
+  @{
  */
 
 /**
- * @brief Q15 vector addition.
- * @param[in]       *pSrcA points to the first input vector
- * @param[in]       *pSrcB points to the second input vector
- * @param[out]      *pDst points to the output vector
- * @param[in]       blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
+  @brief         Q15 vector addition.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
  */
 
 void arm_add_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t blockSize)
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
 
 #if defined (ARM_MATH_DSP)
+  q31_t inA1, inA2;
+  q31_t inB1, inB2;
+#endif
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t inA1, inA2, inB1, inB2;
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    inA1 = *__SIMD32(pSrcA)++;
-    inA2 = *__SIMD32(pSrcA)++;
-    inB1 = *__SIMD32(pSrcB)++;
-    inB2 = *__SIMD32(pSrcB)++;
 
-    *__SIMD32(pDst)++ = __QADD16(inA1, inB1);
-    *__SIMD32(pDst)++ = __QADD16(inA2, inB2);
+#if defined (ARM_MATH_DSP)
+    /* read 2 times 2 samples at a time from sourceA */
+    inA1 = read_q15x2_ia ((q15_t **) &pSrcA);
+    inA2 = read_q15x2_ia ((q15_t **) &pSrcA);
+    /* read 2 times 2 samples at a time from sourceB */
+    inB1 = read_q15x2_ia ((q15_t **) &pSrcB);
+    inB2 = read_q15x2_ia ((q15_t **) &pSrcB);
 
-    /* Decrement the loop counter */
+    /* Add and store 2 times 2 samples at a time */
+    write_q15x2_ia (&pDst, __QADD16(inA1, inB1));
+    write_q15x2_ia (&pDst, __QADD16(inA2, inB2));
+#else
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
+#endif
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    *pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ + *pSrcB++), 16);
 
-    /* Decrement the loop counter */
+    /* Add and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++);
+#else
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
+#endif
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
-
 }
 
 /**
- * @} end of BasicAdd group
+  @} end of BasicAdd group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_add_q31.c b/DSP/Source/BasicMathFunctions/arm_add_q31.c
index c008bcc..3c1cbc2 100644
--- a/DSP/Source/BasicMathFunctions/arm_add_q31.c
+++ b/DSP/Source/BasicMathFunctions/arm_add_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_add_q31.c
  * Description:  Q31 vector addition
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,108 +29,80 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup BasicAdd
- * @{
+  @addtogroup BasicAdd
+  @{
  */
 
-
 /**
- * @brief Q31 vector addition.
- * @param[in]       *pSrcA points to the first input vector
- * @param[in]       *pSrcB points to the second input vector
- * @param[out]      *pDst points to the output vector
- * @param[in]       blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
+  @brief         Q31 vector addition.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
  */
 
 void arm_add_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t blockSize)
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t inA1, inA2, inA3, inA4;
-  q31_t inB1, inB2, inB3, inB4;
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    inA1 = *pSrcA++;
-    inA2 = *pSrcA++;
-    inB1 = *pSrcB++;
-    inB2 = *pSrcB++;
 
-    inA3 = *pSrcA++;
-    inA4 = *pSrcA++;
-    inB3 = *pSrcB++;
-    inB4 = *pSrcB++;
-
-    *pDst++ = __QADD(inA1, inB1);
-    *pDst++ = __QADD(inA2, inB2);
-    *pDst++ = __QADD(inA3, inB3);
-    *pDst++ = __QADD(inA4, inB4);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
+    /* Add and store result in destination buffer. */
     *pDst++ = __QADD(*pSrcA++, *pSrcB++);
 
-    /* Decrement the loop counter */
+    *pDst++ = __QADD(*pSrcA++, *pSrcB++);
+
+    *pDst++ = __QADD(*pSrcA++, *pSrcB++);
+
+    *pDst++ = __QADD(*pSrcA++, *pSrcB++);
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ + *pSrcB++);
 
-    /* Decrement the loop counter */
+    /* Add and store result in destination buffer. */
+    *pDst++ = __QADD(*pSrcA++, *pSrcB++);
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of BasicAdd group
+  @} end of BasicAdd group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_add_q7.c b/DSP/Source/BasicMathFunctions/arm_add_q7.c
index ab4e785..f9c4a95 100644
--- a/DSP/Source/BasicMathFunctions/arm_add_q7.c
+++ b/DSP/Source/BasicMathFunctions/arm_add_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_add_q7.c
  * Description:  Q7 vector addition
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,94 +29,81 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup BasicAdd
- * @{
+  @addtogroup BasicAdd
+  @{
  */
 
 /**
- * @brief Q7 vector addition.
- * @param[in]       *pSrcA points to the first input vector
- * @param[in]       *pSrcB points to the second input vector
- * @param[out]      *pDst points to the output vector
- * @param[in]       blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
+  @brief         Q7 vector addition.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
  */
 
 void arm_add_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  q7_t * pDst,
-  uint32_t blockSize)
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        q7_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
 
-    /* Decrement the loop counter */
+#if defined (ARM_MATH_DSP)
+    /* Add and store result in destination buffer (4 samples at a time). */
+    write_q7x4_ia (&pDst, __QADD8 (read_q7x4_ia ((q7_t **) &pSrcA), read_q7x4_ia ((q7_t **) &pSrcB)));
+#else
+    *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
+    *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
+    *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
+    *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
+#endif
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    *pDst++ = (q7_t) __SSAT(*pSrcA++ + *pSrcB++, 8);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ + *pSrcB++, 8);
 
-    /* Decrement the loop counter */
+    /* Add and store result in destination buffer. */
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ + *pSrcB++, 8);
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
-
 }
 
 /**
- * @} end of BasicAdd group
+  @} end of BasicAdd group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c b/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c
index 0cd0afc..3eee3b9 100644
--- a/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c
+++ b/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_dot_prod_f32.c
  * Description:  Floating-point dot product
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,95 +29,135 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @defgroup dot_prod Vector Dot Product
- *
- * Computes the dot product of two vectors.
- * The vectors are multiplied element-by-element and then summed.
- *
- * <pre>
- *     sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1]
- * </pre>
- *
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+  @defgroup BasicDotProd Vector Dot Product
+
+  Computes the dot product of two vectors.
+  The vectors are multiplied element-by-element and then summed.
+
+  <pre>
+      sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1]
+  </pre>
+
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
  */
 
 /**
- * @addtogroup dot_prod
- * @{
+  @addtogroup BasicDotProd
+  @{
  */
 
 /**
- * @brief Dot product of floating-point vectors.
- * @param[in]       *pSrcA points to the first input vector
- * @param[in]       *pSrcB points to the second input vector
- * @param[in]       blockSize number of samples in each vector
- * @param[out]      *result output result returned here
- * @return none.
+  @brief         Dot product of floating-point vectors.
+  @param[in]     pSrcA      points to the first input vector.
+  @param[in]     pSrcB      points to the second input vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @param[out]    result     output result returned here.
+  @return        none
  */
 
-
 void arm_dot_prod_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  uint32_t blockSize,
-  float32_t * result)
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        uint32_t blockSize,
+        float32_t * result)
 {
-  float32_t sum = 0.0f;                          /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t sum = 0.0f;                          /* Temporary return variable */
 
+#if defined(ARM_MATH_NEON)
+    float32x4_t vec1;
+    float32x4_t vec2;
+    float32x4_t res;
+    float32x4_t accum = vdupq_n_f32(0);    
 
-#if defined (ARM_MATH_DSP)
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  /*loop Unrolling */
+    vec1 = vld1q_f32(pSrcA);
+    vec2 = vld1q_f32(pSrcB);
+
+    while (blkCnt > 0U)
+    {
+        /* C = A[0]*B[0] + A[1]*B[1] + A[2]*B[2] + ... + A[blockSize-1]*B[blockSize-1] */
+        /* Calculate dot product and then store the result in a temporary buffer. */
+        
+	accum = vmlaq_f32(accum, vec1, vec2);
+	
+        /* Increment pointers */
+        pSrcA += 4;
+        pSrcB += 4; 
+
+        vec1 = vld1q_f32(pSrcA);
+        vec2 = vld1q_f32(pSrcB);
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+    
+#if __aarch64__
+    sum = vpadds_f32(vpadd_f32(vget_low_f32(accum), vget_high_f32(accum)));
+#else
+    sum = (vpadd_f32(vget_low_f32(accum), vget_high_f32(accum)))[0] + (vpadd_f32(vget_low_f32(accum), vget_high_f32(accum)))[1];
+#endif    
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+  /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
    ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Calculate dot product and then store the result in a temporary buffer */
-    sum += (*pSrcA++) * (*pSrcB++);
-    sum += (*pSrcA++) * (*pSrcB++);
-    sum += (*pSrcA++) * (*pSrcB++);
+
+    /* Calculate dot product and store result in a temporary buffer. */
     sum += (*pSrcA++) * (*pSrcB++);
 
-    /* Decrement the loop counter */
+    sum += (*pSrcA++) * (*pSrcB++);
+
+    sum += (*pSrcA++) * (*pSrcB++);
+
+    sum += (*pSrcA++) * (*pSrcB++);
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
 
   while (blkCnt > 0U)
   {
     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Calculate dot product and then store the result in a temporary buffer. */
+
+    /* Calculate dot product and store result in a temporary buffer. */
     sum += (*pSrcA++) * (*pSrcB++);
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
-  /* Store the result back in the destination buffer */
+
+  /* Store result in destination buffer */
   *result = sum;
 }
 
 /**
- * @} end of dot_prod group
+  @} end of BasicDotProd group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c b/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c
index dec4ec5..e303b09 100644
--- a/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c
+++ b/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_dot_prod_q15.c
  * Description:  Q15 dot product
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,100 +29,92 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup dot_prod
- * @{
+  @addtogroup BasicDotProd
+  @{
  */
 
 /**
- * @brief Dot product of Q15 vectors.
- * @param[in]       *pSrcA points to the first input vector
- * @param[in]       *pSrcB points to the second input vector
- * @param[in]       blockSize number of samples in each vector
- * @param[out]      *result output result returned here
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these
- * results are added to a 64-bit accumulator in 34.30 format.
- * Nonsaturating additions are used and given that there are 33 guard bits in the accumulator
- * there is no risk of overflow.
- * The return result is in 34.30 format.
+  @brief         Dot product of Q15 vectors.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[in]     blockSize  number of samples in each vector
+  @param[out]    result     output result returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these
+                   results are added to a 64-bit accumulator in 34.30 format.
+                   Nonsaturating additions are used and given that there are 33 guard bits in the accumulator
+                   there is no risk of overflow.
+                   The return result is in 34.30 format.
  */
 
 void arm_dot_prod_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  uint32_t blockSize,
-  q63_t * result)
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        uint32_t blockSize,
+        q63_t * result)
 {
-  q63_t sum = 0;                                 /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Temporary return variable */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Calculate dot product and then store the result in a temporary buffer. */
-    sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
-    sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
 
-    /* Decrement the loop counter */
+#if defined (ARM_MATH_DSP)
+    /* Calculate dot product and store result in a temporary buffer. */
+    sum = __SMLALD(read_q15x2_ia ((q15_t **) &pSrcA), read_q15x2_ia ((q15_t **) &pSrcB), sum);
+    sum = __SMLALD(read_q15x2_ia ((q15_t **) &pSrcA), read_q15x2_ia ((q15_t **) &pSrcB), sum);
+#else
+    sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
+    sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
+    sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
+    sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
+#endif
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Calculate dot product and then store the results in a temporary buffer. */
-    sum = __SMLALD(*pSrcA++, *pSrcB++, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Calculate dot product and then store the results in a temporary buffer. */
-    sum += (q63_t) ((q31_t) * pSrcA++ * *pSrcB++);
 
-    /* Decrement the loop counter */
+    /* Calculate dot product and store result in a temporary buffer. */
+//#if defined (ARM_MATH_DSP)
+//    sum  = __SMLALD(*pSrcA++, *pSrcB++, sum);
+//#else
+    sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
+//#endif
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
-  /* Store the result in the destination buffer in 34.30 format */
+  /* Store result in destination buffer in 34.30 format */
   *result = sum;
-
 }
 
 /**
- * @} end of dot_prod group
+  @} end of BasicDotProd group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c b/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c
index 67ae887..76cd577 100644
--- a/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c
+++ b/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_dot_prod_q31.c
  * Description:  Q31 dot product
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,103 +29,87 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup dot_prod
- * @{
+  @addtogroup BasicDotProd
+  @{
  */
 
 /**
- * @brief Dot product of Q31 vectors.
- * @param[in]       *pSrcA points to the first input vector
- * @param[in]       *pSrcB points to the second input vector
- * @param[in]       blockSize number of samples in each vector
- * @param[out]      *result output result returned here
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these
- * are truncated to 2.48 format by discarding the lower 14 bits.
- * The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
- * There are 15 guard bits in the accumulator and there is no risk of overflow as long as
- * the length of the vectors is less than 2^16 elements.
- * The return result is in 16.48 format.
+  @brief         Dot product of Q31 vectors.
+  @param[in]     pSrcA      points to the first input vector.
+  @param[in]     pSrcB      points to the second input vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @param[out]    result     output result returned here.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these
+                   are truncated to 2.48 format by discarding the lower 14 bits.
+                   The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
+                   There are 15 guard bits in the accumulator and there is no risk of overflow as long as
+                   the length of the vectors is less than 2^16 elements.
+                   The return result is in 16.48 format.
  */
 
 void arm_dot_prod_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  uint32_t blockSize,
-  q63_t * result)
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        uint32_t blockSize,
+        q63_t * result)
 {
-  q63_t sum = 0;                                 /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Temporary return variable */
 
+#if defined (ARM_MATH_LOOPUNROLL)
 
-#if defined (ARM_MATH_DSP)
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t inA1, inA2, inA3, inA4;
-  q31_t inB1, inB2, inB3, inB4;
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Calculate dot product and then store the result in a temporary buffer. */
-    inA1 = *pSrcA++;
-    inA2 = *pSrcA++;
-    inA3 = *pSrcA++;
-    inA4 = *pSrcA++;
-    inB1 = *pSrcB++;
-    inB2 = *pSrcB++;
-    inB3 = *pSrcB++;
-    inB4 = *pSrcB++;
 
-    sum += ((q63_t) inA1 * inB1) >> 14U;
-    sum += ((q63_t) inA2 * inB2) >> 14U;
-    sum += ((q63_t) inA3 * inB3) >> 14U;
-    sum += ((q63_t) inA4 * inB4) >> 14U;
+    /* Calculate dot product and store result in a temporary buffer. */
+    sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
 
-    /* Decrement the loop counter */
+    sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
+
+    sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
+
+    sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Calculate dot product and then store the result in a temporary buffer. */
-    sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14U;
 
-    /* Decrement the loop counter */
+    /* Calculate dot product and store result in a temporary buffer. */
+    sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* Store the result in the destination buffer in 16.48 format */
+  /* Store result in destination buffer in 16.48 format */
   *result = sum;
 }
 
 /**
- * @} end of dot_prod group
+  @} end of BasicDotProd group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c b/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c
index 487efe3..8e18a73 100644
--- a/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c
+++ b/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_dot_prod_q7.c
  * Description:  Q7 dot product
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,61 +29,58 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup dot_prod
- * @{
+  @addtogroup BasicDotProd
+  @{
  */
 
 /**
- * @brief Dot product of Q7 vectors.
- * @param[in]       *pSrcA points to the first input vector
- * @param[in]       *pSrcB points to the second input vector
- * @param[in]       blockSize number of samples in each vector
- * @param[out]      *result output result returned here
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these
- * results are added to an accumulator in 18.14 format.
- * Nonsaturating additions are used and there is no danger of wrap around as long as
- * the vectors are less than 2^18 elements long.
- * The return result is in 18.14 format.
+  @brief         Dot product of Q7 vectors.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[in]     blockSize  number of samples in each vector
+  @param[out]    result     output result returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these
+                   results are added to an accumulator in 18.14 format.
+                   Nonsaturating additions are used and there is no danger of wrap around as long as
+                   the vectors are less than 2^18 elements long.
+                   The return result is in 18.14 format.
  */
 
 void arm_dot_prod_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  uint32_t blockSize,
-  q31_t * result)
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        uint32_t blockSize,
+        q31_t * result)
 {
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t sum = 0;                                 /* Temporary return variable */
 
-  q31_t sum = 0;                                 /* Temporary variables to store output */
+#if defined (ARM_MATH_LOOPUNROLL)
 
 #if defined (ARM_MATH_DSP)
+  q31_t input1, input2;                          /* Temporary variables */
+  q31_t inA1, inA2, inB1, inB2;                  /* Temporary variables */
+#endif
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t input1, input2;                          /* Temporary variables to store input */
-  q31_t inA1, inA2, inB1, inB2;                  /* Temporary variables to store input */
-
-
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+
+#if defined (ARM_MATH_DSP)
     /* read 4 samples at a time from sourceA */
-    input1 = *__SIMD32(pSrcA)++;
+    input1 = read_q7x4_ia ((q7_t **) &pSrcA);
     /* read 4 samples at a time from sourceB */
-    input2 = *__SIMD32(pSrcB)++;
+    input2 = read_q7x4_ia ((q7_t **) &pSrcB);
 
     /* extract two q7_t samples to q15_t samples */
     inA1 = __SXTB16(__ROR(input1, 8));
@@ -97,51 +94,46 @@
     /* multiply and accumulate two samples at a time */
     sum = __SMLAD(inA1, inB1, sum);
     sum = __SMLAD(inA2, inB2, sum);
+#else
+    sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
+    sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
+    sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
+    sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
+#endif
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Dot product and then store the results in a temporary buffer. */
-    sum = __SMLAD(*pSrcA++, *pSrcB++, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Dot product and then store the results in a temporary buffer. */
-    sum += (q31_t) ((q15_t) * pSrcA++ * *pSrcB++);
 
-    /* Decrement the loop counter */
+    /* Calculate dot product and store result in a temporary buffer. */
+//#if defined (ARM_MATH_DSP)
+//    sum  = __SMLAD(*pSrcA++, *pSrcB++, sum);
+//#else
+    sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
+//#endif
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
-
-  /* Store the result in the destination buffer in 18.14 format */
+  /* Store result in destination buffer in 18.14 format */
   *result = sum;
 }
 
 /**
- * @} end of dot_prod group
+  @} end of BasicDotProd group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_mult_f32.c b/DSP/Source/BasicMathFunctions/arm_mult_f32.c
index e4a9ef2..53ad73c 100644
--- a/DSP/Source/BasicMathFunctions/arm_mult_f32.c
+++ b/DSP/Source/BasicMathFunctions/arm_mult_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_mult_f32.c
  * Description:  Floating-point vector multiplication
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,134 +29,120 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @defgroup BasicMult Vector Multiplication
- *
- * Element-by-element multiplication of two vectors.
- *
- * <pre>
- *     pDst[n] = pSrcA[n] * pSrcB[n],   0 <= n < blockSize.
- * </pre>
- *
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+  @defgroup BasicMult Vector Multiplication
+
+  Element-by-element multiplication of two vectors.
+
+  <pre>
+      pDst[n] = pSrcA[n] * pSrcB[n],   0 <= n < blockSize.
+  </pre>
+
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
  */
 
 /**
- * @addtogroup BasicMult
- * @{
+  @addtogroup BasicMult
+  @{
  */
 
 /**
- * @brief Floating-point vector multiplication.
- * @param[in]       *pSrcA points to the first input vector
- * @param[in]       *pSrcB points to the second input vector
- * @param[out]      *pDst points to the output vector
- * @param[in]       blockSize number of samples in each vector
- * @return none.
+  @brief         Floating-point vector multiplication.
+  @param[in]     pSrcA      points to the first input vector.
+  @param[in]     pSrcB      points to the second input vector.
+  @param[out]    pDst       points to the output vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @return        none
  */
 
 void arm_mult_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t blockSize)
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counters */
-#if defined (ARM_MATH_DSP)
+    uint32_t blkCnt;                               /* Loop counter */
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t inA1, inA2, inA3, inA4;              /* temporary input variables */
-  float32_t inB1, inB2, inB3, inB4;              /* temporary input variables */
-  float32_t out1, out2, out3, out4;              /* temporary output variables */
+#if defined(ARM_MATH_NEON)
+    float32x4_t vec1;
+    float32x4_t vec2;
+    float32x4_t res;
 
-  /* loop Unrolling */
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = A * B */
+
+    	/* Multiply the inputs and then store the results in the destination buffer. */
+        vec1 = vld1q_f32(pSrcA);
+        vec2 = vld1q_f32(pSrcB);
+        res = vmulq_f32(vec1, vec2);
+        vst1q_f32(pDst, res);
+
+        /* Increment pointers */
+        pSrcA += 4;
+        pSrcB += 4; 
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = A * B */
-    /* Multiply the inputs and store the results in output buffer */
-    /* read sample from sourceA */
-    inA1 = *pSrcA;
-    /* read sample from sourceB */
-    inB1 = *pSrcB;
-    /* read sample from sourceA */
-    inA2 = *(pSrcA + 1);
-    /* read sample from sourceB */
-    inB2 = *(pSrcB + 1);
 
-    /* out = sourceA * sourceB */
-    out1 = inA1 * inB1;
+    /* Multiply inputs and store result in destination buffer. */
+    *pDst++ = (*pSrcA++) * (*pSrcB++);
 
-    /* read sample from sourceA */
-    inA3 = *(pSrcA + 2);
-    /* read sample from sourceB */
-    inB3 = *(pSrcB + 2);
+    *pDst++ = (*pSrcA++) * (*pSrcB++);
 
-    /* out = sourceA * sourceB */
-    out2 = inA2 * inB2;
+    *pDst++ = (*pSrcA++) * (*pSrcB++);
 
-    /* read sample from sourceA */
-    inA4 = *(pSrcA + 3);
+    *pDst++ = (*pSrcA++) * (*pSrcB++);
 
-    /* store result to destination buffer */
-    *pDst = out1;
-
-    /* read sample from sourceB */
-    inB4 = *(pSrcB + 3);
-
-    /* out = sourceA * sourceB */
-    out3 = inA3 * inB3;
-
-    /* store result to destination buffer */
-    *(pDst + 1) = out2;
-
-    /* out = sourceA * sourceB */
-    out4 = inA4 * inB4;
-    /* store result to destination buffer */
-    *(pDst + 2) = out3;
-    /* store result to destination buffer */
-    *(pDst + 3) = out4;
-
-
-    /* update pointers to process next samples */
-    pSrcA += 4U;
-    pSrcB += 4U;
-    pDst += 4U;
-
-    /* Decrement the blockSize loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
 
   while (blkCnt > 0U)
   {
     /* C = A * B */
-    /* Multiply the inputs and store the results in output buffer */
+
+    /* Multiply input and store result in destination buffer. */
     *pDst++ = (*pSrcA++) * (*pSrcB++);
 
-    /* Decrement the blockSize loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
+
 }
 
 /**
- * @} end of BasicMult group
+  @} end of BasicMult group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_mult_q15.c b/DSP/Source/BasicMathFunctions/arm_mult_q15.c
index 8e20963..37aa924 100644
--- a/DSP/Source/BasicMathFunctions/arm_mult_q15.c
+++ b/DSP/Source/BasicMathFunctions/arm_mult_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_mult_q15.c
  * Description:  Q15 vector multiplication
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,65 +29,65 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup BasicMult
- * @{
+  @addtogroup BasicMult
+  @{
  */
 
-
 /**
- * @brief           Q15 vector multiplication
- * @param[in]       *pSrcA points to the first input vector
- * @param[in]       *pSrcB points to the second input vector
- * @param[out]      *pDst points to the output vector
- * @param[in]       blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
+  @brief         Q15 vector multiplication
+  @param[in]     pSrcA      points to first input vector
+  @param[in]     pSrcB      points to second input vector
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
  */
 
 void arm_mult_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t blockSize)
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counters */
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
 
 #if defined (ARM_MATH_DSP)
+  q31_t inA1, inA2, inB1, inB2;                  /* Temporary input variables */
+  q15_t out1, out2, out3, out4;                  /* Temporary output variables */
+  q31_t mul1, mul2, mul3, mul4;                  /* Temporary variables */
+#endif
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t inA1, inA2, inB1, inB2;                  /* temporary input variables */
-  q15_t out1, out2, out3, out4;                  /* temporary output variables */
-  q31_t mul1, mul2, mul3, mul4;                  /* temporary variables */
-
-  /* loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* read two samples at a time from sourceA */
-    inA1 = *__SIMD32(pSrcA)++;
-    /* read two samples at a time from sourceB */
-    inB1 = *__SIMD32(pSrcB)++;
-    /* read two samples at a time from sourceA */
-    inA2 = *__SIMD32(pSrcA)++;
-    /* read two samples at a time from sourceB */
-    inB2 = *__SIMD32(pSrcB)++;
+    /* C = A * B */
+
+#if defined (ARM_MATH_DSP)
+    /* read 2 samples at a time from sourceA */
+    inA1 = read_q15x2_ia ((q15_t **) &pSrcA);
+    /* read 2 samples at a time from sourceB */
+    inB1 = read_q15x2_ia ((q15_t **) &pSrcB);
+    /* read 2 samples at a time from sourceA */
+    inA2 = read_q15x2_ia ((q15_t **) &pSrcA);
+    /* read 2 samples at a time from sourceB */
+    inB2 = read_q15x2_ia ((q15_t **) &pSrcB);
 
     /* multiply mul = sourceA * sourceB */
     mul1 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
-    mul2 = (q31_t) ((q15_t) inA1 * (q15_t) inB1);
+    mul2 = (q31_t) ((q15_t) (inA1      ) * (q15_t) (inB1      ));
     mul3 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB2 >> 16));
-    mul4 = (q31_t) ((q15_t) inA2 * (q15_t) inB2);
+    mul4 = (q31_t) ((q15_t) (inA2      ) * (q15_t) (inB2      ));
 
     /* saturate result to 16 bit */
     out1 = (q15_t) __SSAT(mul1 >> 15, 16);
@@ -95,48 +95,49 @@
     out3 = (q15_t) __SSAT(mul3 >> 15, 16);
     out4 = (q15_t) __SSAT(mul4 >> 15, 16);
 
-    /* store the result */
+    /* store result to destination */
 #ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16);
-    *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16);
-
+    write_q15x2_ia (&pDst, __PKHBT(out2, out1, 16));
+    write_q15x2_ia (&pDst, __PKHBT(out4, out3, 16));
 #else
-
-    *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16);
-    *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16);
-
+    write_q15x2_ia (&pDst, __PKHBT(out1, out2, 16));
+    write_q15x2_ia (&pDst, __PKHBT(out3, out4, 16));
 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-    /* Decrement the blockSize loop counter */
+#else
+    *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
+    *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
+    *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
+    *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
+#endif
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* C = A * B */
-    /* Multiply the inputs and store the result in the destination buffer */
+
+    /* Multiply inputs and store result in destination buffer. */
     *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
 
-    /* Decrement the blockSize loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
+
 }
 
 /**
- * @} end of BasicMult group
+  @} end of BasicMult group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_mult_q31.c b/DSP/Source/BasicMathFunctions/arm_mult_q31.c
index c302b01..9592684 100644
--- a/DSP/Source/BasicMathFunctions/arm_mult_q31.c
+++ b/DSP/Source/BasicMathFunctions/arm_mult_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_mult_q31.c
  * Description:  Q31 vector multiplication
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,120 +29,91 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup BasicMult
- * @{
+  @addtogroup BasicMult
+  @{
  */
 
 /**
- * @brief Q31 vector multiplication.
- * @param[in]       *pSrcA points to the first input vector
- * @param[in]       *pSrcB points to the second input vector
- * @param[out]      *pDst points to the output vector
- * @param[in]       blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
+  @brief         Q31 vector multiplication.
+  @param[in]     pSrcA      points to the first input vector.
+  @param[in]     pSrcB      points to the second input vector.
+  @param[out]    pDst       points to the output vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] are saturated.
  */
 
 void arm_mult_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t blockSize)
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counters */
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t out;                                     /* Temporary output variable */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t inA1, inA2, inA3, inA4;                  /* temporary input variables */
-  q31_t inB1, inB2, inB3, inB4;                  /* temporary input variables */
-  q31_t out1, out2, out3, out4;                  /* temporary output variables */
-
-  /* loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = A * B */
-    /* Multiply the inputs and then store the results in the destination buffer. */
-    inA1 = *pSrcA++;
-    inA2 = *pSrcA++;
-    inA3 = *pSrcA++;
-    inA4 = *pSrcA++;
-    inB1 = *pSrcB++;
-    inB2 = *pSrcB++;
-    inB3 = *pSrcB++;
-    inB4 = *pSrcB++;
 
-    out1 = ((q63_t) inA1 * inB1) >> 32;
-    out2 = ((q63_t) inA2 * inB2) >> 32;
-    out3 = ((q63_t) inA3 * inB3) >> 32;
-    out4 = ((q63_t) inA4 * inB4) >> 32;
+    /* Multiply inputs and store result in destination buffer. */
+    out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
+    out = __SSAT(out, 31);
+    *pDst++ = out << 1U;
 
-    out1 = __SSAT(out1, 31);
-    out2 = __SSAT(out2, 31);
-    out3 = __SSAT(out3, 31);
-    out4 = __SSAT(out4, 31);
+    out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
+    out = __SSAT(out, 31);
+    *pDst++ = out << 1U;
 
-    *pDst++ = out1 << 1U;
-    *pDst++ = out2 << 1U;
-    *pDst++ = out3 << 1U;
-    *pDst++ = out4 << 1U;
+    out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
+    out = __SSAT(out, 31);
+    *pDst++ = out << 1U;
 
-    /* Decrement the blockSize loop counter */
+    out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
+    out = __SSAT(out, 31);
+    *pDst++ = out << 1U;
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    /* C = A * B */
-    /* Multiply the inputs and then store the results in the destination buffer. */
-    inA1 = *pSrcA++;
-    inB1 = *pSrcB++;
-    out1 = ((q63_t) inA1 * inB1) >> 32;
-    out1 = __SSAT(out1, 31);
-    *pDst++ = out1 << 1U;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* C = A * B */
-    /* Multiply the inputs and then store the results in the destination buffer. */
-    *pDst++ =
-      (q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
 
-    /* Decrement the blockSize loop counter */
+    /* Multiply inputs and store result in destination buffer. */
+    out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
+    out = __SSAT(out, 31);
+    *pDst++ = out << 1U;
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
 }
 
 /**
- * @} end of BasicMult group
+  @} end of BasicMult group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_mult_q7.c b/DSP/Source/BasicMathFunctions/arm_mult_q7.c
index d8a2f8a..5587ce5 100644
--- a/DSP/Source/BasicMathFunctions/arm_mult_q7.c
+++ b/DSP/Source/BasicMathFunctions/arm_mult_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_mult_q7.c
  * Description:  Q7 vector multiplication
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,87 +29,91 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup BasicMult
- * @{
+  @addtogroup BasicMult
+  @{
  */
 
 /**
- * @brief           Q7 vector multiplication
- * @param[in]       *pSrcA points to the first input vector
- * @param[in]       *pSrcB points to the second input vector
- * @param[out]      *pDst points to the output vector
- * @param[in]       blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
+  @brief         Q7 vector multiplication
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
  */
 
 void arm_mult_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  q7_t * pDst,
-  uint32_t blockSize)
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        q7_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counters */
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
 
 #if defined (ARM_MATH_DSP)
+  q7_t out1, out2, out3, out4;                   /* Temporary output variables */
+#endif
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q7_t out1, out2, out3, out4;                   /* Temporary variables to store the product */
-
-  /* loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = A * B */
-    /* Multiply the inputs and store the results in temporary variables */
+
+#if defined (ARM_MATH_DSP)
+    /* Multiply inputs and store results in temporary variables */
     out1 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
     out2 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
     out3 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
     out4 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
 
-    /* Store the results of 4 inputs in the destination buffer in single cycle by packing */
-    *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
+    /* Pack and store result in destination buffer (in single write) */
+    write_q7x4_ia (&pDst, __PACKq7(out1, out2, out3, out4));
+#else
+    *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+    *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+    *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+    *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+#endif
 
-    /* Decrement the blockSize loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* C = A * B */
-    /* Multiply the inputs and store the result in the destination buffer */
+
+    /* Multiply input and store result in destination buffer. */
     *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
 
-    /* Decrement the blockSize loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
+
 }
 
 /**
- * @} end of BasicMult group
+  @} end of BasicMult group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_negate_f32.c b/DSP/Source/BasicMathFunctions/arm_negate_f32.c
index e39624c..f807112 100644
--- a/DSP/Source/BasicMathFunctions/arm_negate_f32.c
+++ b/DSP/Source/BasicMathFunctions/arm_negate_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_negate_f32.c
  * Description:  Negates floating-point vectors
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,106 +29,117 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @defgroup negate Vector Negate
- *
- * Negates the elements of a vector.
- *
- * <pre>
- *     pDst[n] = -pSrc[n],   0 <= n < blockSize.
- * </pre>
- *
- * The functions support in-place computation allowing the source and
- * destination pointers to reference the same memory buffer.
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+  @defgroup BasicNegate Vector Negate
+
+  Negates the elements of a vector.
+
+  <pre>
+      pDst[n] = -pSrc[n],   0 <= n < blockSize.
+  </pre>
+
+  The functions support in-place computation allowing the source and
+  destination pointers to reference the same memory buffer.
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
  */
 
 /**
- * @addtogroup negate
- * @{
+  @addtogroup BasicNegate
+  @{
  */
 
 /**
- * @brief  Negates the elements of a floating-point vector.
- * @param[in]  *pSrc points to the input vector
- * @param[out]  *pDst points to the output vector
- * @param[in]  blockSize number of samples in the vector
- * @return none.
+  @brief         Negates the elements of a floating-point vector.
+  @param[in]     pSrc       points to input vector.
+  @param[out]    pDst       points to output vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @return        none
  */
 
 void arm_negate_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
 
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
+    float32x4_t vec1;
+    float32x4_t res;
 
-#if defined (ARM_MATH_DSP)
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t in1, in2, in3, in4;                  /* temporary variables */
+    while (blkCnt > 0U)
+    {
+        /* C = -A */
 
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2U;
+    	/* Negate and then store the results in the destination buffer. */
+        vec1 = vld1q_f32(pSrc);
+        res = vnegq_f32(vec1);
+        vst1q_f32(pDst, res);
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while (blkCnt > 0U)
-  {
-    /* read inputs from source */
-    in1 = *pSrc;
-    in2 = *(pSrc + 1);
-    in3 = *(pSrc + 2);
-    in4 = *(pSrc + 3);
+        /* Increment pointers */
+        pSrc += 4;
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
 
-    /* negate the input */
-    in1 = -in1;
-    in2 = -in2;
-    in3 = -in3;
-    in4 = -in4;
-
-    /* store the result to destination */
-    *pDst = in1;
-    *(pDst + 1) = in2;
-    *(pDst + 2) = in3;
-    *(pDst + 3) = in4;
-
-    /* update pointers to process next samples */
-    pSrc += 4U;
-    pDst += 4U;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4U;
+    /* Tail */
+    blkCnt = blockSize & 0x3;
 
 #else
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_DSP) */
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
 
   while (blkCnt > 0U)
   {
     /* C = -A */
-    /* Negate and then store the results in the destination buffer. */
+
+    /* Negate and store result in destination buffer. */
     *pDst++ = -*pSrc++;
 
-    /* Decrement the loop counter */
+    *pDst++ = -*pSrc++;
+
+    *pDst++ = -*pSrc++;
+
+    *pDst++ = -*pSrc++;
+
+    /* Decrement loop counter */
     blkCnt--;
   }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON_EXPERIMENTAL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = -A */
+
+    /* Negate and store result in destination buffer. */
+    *pDst++ = -*pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
 }
 
 /**
- * @} end of negate group
+  @} end of BasicNegate group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_negate_q15.c b/DSP/Source/BasicMathFunctions/arm_negate_q15.c
index 9624160..267e4cc 100644
--- a/DSP/Source/BasicMathFunctions/arm_negate_q15.c
+++ b/DSP/Source/BasicMathFunctions/arm_negate_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_negate_q15.c
  * Description:  Negates Q15 vectors
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,103 +29,98 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup negate
- * @{
+  @addtogroup BasicNegate
+  @{
  */
 
 /**
- * @brief  Negates the elements of a Q15 vector.
- * @param[in]  *pSrc points to the input vector
- * @param[out]  *pDst points to the output vector
- * @param[in]  blockSize number of samples in the vector
- * @return none.
- *
- * \par Conditions for optimum performance
- *  Input and output buffers should be aligned by 32-bit
- *
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
+  @brief         Negates the elements of a Q15 vector.
+  @param[in]     pSrc       points to the input vector.
+  @param[out]    pDst       points to the output vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @return        none
+
+  @par           Conditions for optimum performance
+                   Input and output buffers should be aligned by 32-bit
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q15 value -1 (0x8000) is saturated to the maximum allowable positive value 0x7FFF.
  */
 
 void arm_negate_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
-  q15_t in;
+        uint32_t blkCnt;                               /* Loop counter */
+        q15_t in;                                      /* Temporary input variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
 
 #if defined (ARM_MATH_DSP)
+  q31_t in1;                                    /* Temporary input variables */
+#endif
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in1, in2;                                /* Temporary variables */
-
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = -A */
-    /* Read two inputs at a time */
-    in1 = _SIMD32_OFFSET(pSrc);
-    in2 = _SIMD32_OFFSET(pSrc + 2);
 
-    /* negate two samples at a time */
-    in1 = __QSUB16(0, in1);
+#if defined (ARM_MATH_DSP)
+    /* Negate and store result in destination buffer (2 samples at a time). */
+    in1 = read_q15x2_ia ((q15_t **) &pSrc);
+    write_q15x2_ia (&pDst, __QSUB16(0, in1));
 
-    /* negate two samples at a time */
-    in2 = __QSUB16(0, in2);
+    in1 = read_q15x2_ia ((q15_t **) &pSrc);
+    write_q15x2_ia (&pDst, __QSUB16(0, in1));
+#else
+    in = *pSrc++;
+    *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
 
-    /* store the result to destination 2 samples at a time */
-    _SIMD32_OFFSET(pDst) = in1;
-    /* store the result to destination 2 samples at a time */
-    _SIMD32_OFFSET(pDst + 2) = in2;
+    in = *pSrc++;
+    *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
 
+    in = *pSrc++;
+    *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
 
-    /* update pointers to process next samples */
-    pSrc += 4U;
-    pDst += 4U;
+    in = *pSrc++;
+    *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
+#endif
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* C = -A */
-    /* Negate and then store the result in the destination buffer. */
-    in = *pSrc++;
-    *pDst++ = (in == (q15_t) 0x8000) ? 0x7fff : -in;
 
-    /* Decrement the loop counter */
+    /* Negate and store result in destination buffer. */
+    in = *pSrc++;
+    *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
+
+    /* Decrement loop counter */
     blkCnt--;
   }
+
 }
 
 /**
- * @} end of negate group
+  @} end of BasicNegate group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_negate_q31.c b/DSP/Source/BasicMathFunctions/arm_negate_q31.c
index 4a5a58d..645fb0a 100644
--- a/DSP/Source/BasicMathFunctions/arm_negate_q31.c
+++ b/DSP/Source/BasicMathFunctions/arm_negate_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_negate_q31.c
  * Description:  Negates Q31 vectors
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,89 +29,104 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup negate
- * @{
+  @addtogroup BasicNegate
+  @{
  */
 
 /**
- * @brief  Negates the elements of a Q31 vector.
- * @param[in]  *pSrc points to the input vector
- * @param[out]  *pDst points to the output vector
- * @param[in]  blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
+  @brief         Negates the elements of a Q31 vector.
+  @param[in]     pSrc       points to the input vector.
+  @param[out]    pDst       points to the output vector.
+  @param[in]     blockSize   number of samples in each vector.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q31 value -1 (0x80000000) is saturated to the maximum allowable positive value 0x7FFFFFFF.
  */
 
 void arm_negate_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-  q31_t in;                                      /* Temporary variable */
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t in;                                      /* Temporary input variable */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = -A */
-    /* Negate and then store the results in the destination buffer. */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
 
-    *pDst++ = __QSUB(0, in1);
-    *pDst++ = __QSUB(0, in2);
-    *pDst++ = __QSUB(0, in3);
-    *pDst++ = __QSUB(0, in4);
+    /* Negate and store result in destination buffer. */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
 
-    /* Decrement the loop counter */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* C = -A */
-    /* Negate and then store the result in the destination buffer. */
-    in = *pSrc++;
-    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
 
-    /* Decrement the loop counter */
+    /* Negate and store result in destination buffer. */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    /* Decrement loop counter */
     blkCnt--;
   }
+
 }
 
 /**
- * @} end of negate group
+  @} end of BasicNegate group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_negate_q7.c b/DSP/Source/BasicMathFunctions/arm_negate_q7.c
index d72c317..40a373e 100644
--- a/DSP/Source/BasicMathFunctions/arm_negate_q7.c
+++ b/DSP/Source/BasicMathFunctions/arm_negate_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_negate_q7.c
  * Description:  Negates Q7 vectors
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,85 +29,98 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup negate
- * @{
+  @addtogroup BasicNegate
+  @{
  */
 
 /**
- * @brief  Negates the elements of a Q7 vector.
- * @param[in]  *pSrc points to the input vector
- * @param[out]  *pDst points to the output vector
- * @param[in]  blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
+  @brief         Negates the elements of a Q7 vector.
+  @param[in]     pSrc       points to the input vector.
+  @param[out]    pDst       points to the output vector.
+  @param[in]     blockSize   number of samples in each vector.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q7 value -1 (0x80) is saturated to the maximum allowable positive value 0x7F.
  */
 
 void arm_negate_q7(
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
-  q7_t in;
+        uint32_t blkCnt;                               /* Loop counter */
+        q7_t in;                                       /* Temporary input variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
 
 #if defined (ARM_MATH_DSP)
+  q31_t in1;                                    /* Temporary input variable */
+#endif
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t input;                                   /* Input values1-4 */
-  q31_t zero = 0x00000000;
-
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = -A */
-    /* Read four inputs */
-    input = *__SIMD32(pSrc)++;
 
-    /* Store the Negated results in the destination buffer in a single cycle by packing the results */
-    *__SIMD32(pDst)++ = __QSUB8(zero, input);
+#if defined (ARM_MATH_DSP)
+    /* Negate and store result in destination buffer (4 samples at a time). */
+    in1 = read_q7x4_ia ((q7_t **) &pSrc);
+    write_q7x4_ia (&pDst, __QSUB8(0, in1));
+#else
+    in = *pSrc++;
+    *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
 
-    /* Decrement the loop counter */
+    in = *pSrc++;
+    *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
+
+    in = *pSrc++;
+    *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
+
+    in = *pSrc++;
+    *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
+#endif
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* C = -A */
-    /* Negate and then store the results in the destination buffer. */ \
-      in = *pSrc++;
-    *pDst++ = (in == (q7_t) 0x80) ? 0x7f : -in;
 
-    /* Decrement the loop counter */
+    /* Negate and store result in destination buffer. */
+    in = *pSrc++;
+
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (q7_t) __QSUB(0, in);
+#else
+    *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
+#endif
+
+    /* Decrement loop counter */
     blkCnt--;
   }
+
 }
 
 /**
- * @} end of negate group
+  @} end of BasicNegate group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_offset_f32.c b/DSP/Source/BasicMathFunctions/arm_offset_f32.c
index ebc20a4..b10e3f1 100644
--- a/DSP/Source/BasicMathFunctions/arm_offset_f32.c
+++ b/DSP/Source/BasicMathFunctions/arm_offset_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_offset_f32.c
  * Description:  Floating-point vector offset
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,126 +29,119 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @defgroup offset Vector Offset
- *
- * Adds a constant offset to each element of a vector.
- *
- * <pre>
- *     pDst[n] = pSrc[n] + offset,   0 <= n < blockSize.
- * </pre>
- *
- * The functions support in-place computation allowing the source and
- * destination pointers to reference the same memory buffer.
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+  @defgroup BasicOffset Vector Offset
+
+  Adds a constant offset to each element of a vector.
+
+  <pre>
+      pDst[n] = pSrc[n] + offset,   0 <= n < blockSize.
+  </pre>
+
+  The functions support in-place computation allowing the source and
+  destination pointers to reference the same memory buffer.
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
  */
 
 /**
- * @addtogroup offset
- * @{
+  @addtogroup BasicOffset
+  @{
  */
 
 /**
- * @brief  Adds a constant offset to a floating-point vector.
- * @param[in]  *pSrc points to the input vector
- * @param[in]  offset is the offset to be added
- * @param[out]  *pDst points to the output vector
- * @param[in]  blockSize number of samples in the vector
- * @return none.
+  @brief         Adds a constant offset to a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     offset     is the offset to be added
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
  */
 
-
 void arm_offset_f32(
-  float32_t * pSrc,
-  float32_t offset,
-  float32_t * pDst,
-  uint32_t blockSize)
+  const float32_t * pSrc,
+        float32_t offset,
+        float32_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
 
-#if defined (ARM_MATH_DSP)
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
+    float32x4_t vec1;
+    float32x4_t res;
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t in1, in2, in3, in4;
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
 
-  /*loop Unrolling */
+    while (blkCnt > 0U)
+    {
+        /* C = A + offset */
+ 
+        /* Add offset and then store the results in the destination buffer. */
+        vec1 = vld1q_f32(pSrc);
+        res = vaddq_f32(vec1,vdupq_n_f32(offset));
+        vst1q_f32(pDst, res);
+
+        /* Increment pointers */
+        pSrc += 4;
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = A + offset */
-    /* Add offset and then store the results in the destination buffer. */
-    /* read samples from source */
-    in1 = *pSrc;
-    in2 = *(pSrc + 1);
 
-    /* add offset to input */
-    in1 = in1 + offset;
+    /* Add offset and store result in destination buffer. */
+    *pDst++ = (*pSrc++) + offset;
 
-    /* read samples from source */
-    in3 = *(pSrc + 2);
+    *pDst++ = (*pSrc++) + offset;
 
-    /* add offset to input */
-    in2 = in2 + offset;
+    *pDst++ = (*pSrc++) + offset;
 
-    /* read samples from source */
-    in4 = *(pSrc + 3);
+    *pDst++ = (*pSrc++) + offset;
 
-    /* add offset to input */
-    in3 = in3 + offset;
-
-    /* store result to destination */
-    *pDst = in1;
-
-    /* add offset to input */
-    in4 = in4 + offset;
-
-    /* store result to destination */
-    *(pDst + 1) = in2;
-
-    /* store result to destination */
-    *(pDst + 2) = in3;
-
-    /* store result to destination */
-    *(pDst + 3) = in4;
-
-    /* update pointers to process next samples */
-    pSrc += 4U;
-    pDst += 4U;
-
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON_EXPERIMENTAL) */
 
   while (blkCnt > 0U)
   {
     /* C = A + offset */
-    /* Add offset and then store the result in the destination buffer. */
+
+    /* Add offset and store result in destination buffer. */
     *pDst++ = (*pSrc++) + offset;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
+
 }
 
 /**
- * @} end of offset group
+  @} end of BasicOffset group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_offset_q15.c b/DSP/Source/BasicMathFunctions/arm_offset_q15.c
index dab0b10..cd2f22b 100644
--- a/DSP/Source/BasicMathFunctions/arm_offset_q15.c
+++ b/DSP/Source/BasicMathFunctions/arm_offset_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_offset_q15.c
  * Description:  Q15 vector offset
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,96 +29,93 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup offset
- * @{
+  @addtogroup BasicOffset
+  @{
  */
 
 /**
- * @brief  Adds a constant offset to a Q15 vector.
- * @param[in]  *pSrc points to the input vector
- * @param[in]  offset is the offset to be added
- * @param[out]  *pDst points to the output vector
- * @param[in]  blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+  @brief         Adds a constant offset to a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     offset     is the offset to be added
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
  */
 
 void arm_offset_q15(
-  q15_t * pSrc,
-  q15_t offset,
-  q15_t * pDst,
-  uint32_t blockSize)
+  const q15_t * pSrc,
+        q15_t offset,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
 
 #if defined (ARM_MATH_DSP)
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
   q31_t offset_packed;                           /* Offset packed to 32 bit */
 
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2U;
-
   /* Offset is packed to 32 bit in order to use SIMD32 for addition */
   offset_packed = __PKHBT(offset, offset, 16);
+#endif
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
   while (blkCnt > 0U)
   {
     /* C = A + offset */
-    /* Add offset and then store the results in the destination buffer, 2 samples at a time. */
-    *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
-    *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
 
-    /* Decrement the loop counter */
+#if defined (ARM_MATH_DSP)
+    /* Add offset and store result in destination buffer (2 samples at a time). */
+    write_q15x2_ia (&pDst, __QADD16(read_q15x2_ia ((q15_t **) &pSrc), offset_packed));
+    write_q15x2_ia (&pDst, __QADD16(read_q15x2_ia ((q15_t **) &pSrc), offset_packed));
+#else
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
+#endif
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the results in the destination buffer. */
-    *pDst++ = (q15_t) __QADD16(*pSrc++, offset);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     /* C = A + offset */
-    /* Add offset and then store the results in the destination buffer. */
-    *pDst++ = (q15_t) __SSAT(((q31_t) * pSrc++ + offset), 16);
 
-    /* Decrement the loop counter */
+    /* Add offset and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (q15_t) __QADD16(*pSrc++, offset);
+#else
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
+#endif
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of offset group
+  @} end of BasicOffset group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_offset_q31.c b/DSP/Source/BasicMathFunctions/arm_offset_q31.c
index 655426e..5de36b4 100644
--- a/DSP/Source/BasicMathFunctions/arm_offset_q31.c
+++ b/DSP/Source/BasicMathFunctions/arm_offset_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_offset_q31.c
  * Description:  Q31 vector offset
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,100 +29,100 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup offset
- * @{
+  @addtogroup BasicOffset
+  @{
  */
 
 /**
- * @brief  Adds a constant offset to a Q31 vector.
- * @param[in]  *pSrc points to the input vector
- * @param[in]  offset is the offset to be added
- * @param[out]  *pDst points to the output vector
- * @param[in]  blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
+  @brief         Adds a constant offset to a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     offset     is the offset to be added
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
  */
 
 void arm_offset_q31(
-  q31_t * pSrc,
-  q31_t offset,
-  q31_t * pDst,
-  uint32_t blockSize)
+  const q31_t * pSrc,
+        q31_t offset,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
-
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = A + offset */
-    /* Add offset and then store the results in the destination buffer. */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
 
-    *pDst++ = __QADD(in1, offset);
-    *pDst++ = __QADD(in2, offset);
-    *pDst++ = __QADD(in3, offset);
-    *pDst++ = __QADD(in4, offset);
+    /* Add offset and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QADD(*pSrc++, offset);
+#else
+    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
+#endif
 
-    /* Decrement the loop counter */
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QADD(*pSrc++, offset);
+#else
+    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
+#endif
+
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QADD(*pSrc++, offset);
+#else
+    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
+#endif
+
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QADD(*pSrc++, offset);
+#else
+    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
+#endif
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the result in the destination buffer. */
-    *pDst++ = __QADD(*pSrc++, offset);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     /* C = A + offset */
-    /* Add offset and then store the result in the destination buffer. */
-    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
 
-    /* Decrement the loop counter */
+    /* Add offset and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QADD(*pSrc++, offset);
+#else
+    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
+#endif
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of offset group
+  @} end of BasicOffset group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_offset_q7.c b/DSP/Source/BasicMathFunctions/arm_offset_q7.c
index 5de6241..f67db45 100644
--- a/DSP/Source/BasicMathFunctions/arm_offset_q7.c
+++ b/DSP/Source/BasicMathFunctions/arm_offset_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_offset_q7.c
  * Description:  Q7 vector offset
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,95 +29,88 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup offset
- * @{
+  @addtogroup BasicOffset
+  @{
  */
 
 /**
- * @brief  Adds a constant offset to a Q7 vector.
- * @param[in]  *pSrc points to the input vector
- * @param[in]  offset is the offset to be added
- * @param[out]  *pDst points to the output vector
- * @param[in]  blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
+  @brief         Adds a constant offset to a Q7 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     offset     is the offset to be added
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
  */
 
 void arm_offset_q7(
-  q7_t * pSrc,
-  q7_t offset,
-  q7_t * pDst,
-  uint32_t blockSize)
+  const q7_t * pSrc,
+        q7_t offset,
+        q7_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
 
 #if defined (ARM_MATH_DSP)
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
   q31_t offset_packed;                           /* Offset packed to 32 bit */
 
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2U;
-
   /* Offset is packed to 32 bit in order to use SIMD32 for addition */
   offset_packed = __PACKq7(offset, offset, offset, offset);
+#endif
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
   while (blkCnt > 0U)
   {
     /* C = A + offset */
-    /* Add offset and then store the results in the destination bufferfor 4 samples at a time. */
-    *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrc)++, offset_packed);
 
-    /* Decrement the loop counter */
+#if defined (ARM_MATH_DSP)
+    /* Add offset and store result in destination buffer (4 samples at a time). */
+    write_q7x4_ia (&pDst, __QADD8(read_q7x4_ia ((q7_t **) &pSrc), offset_packed));
+#else
+    *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
+    *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
+    *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
+    *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
+#endif
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the result in the destination buffer. */
-    *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     /* C = A + offset */
-    /* Add offset and then store the result in the destination buffer. */
-    *pDst++ = (q7_t) __SSAT((q15_t) * pSrc++ + offset, 8);
 
-    /* Decrement the loop counter */
+    /* Add offset and store result in destination buffer. */
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrc++ + offset, 8);
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of offset group
+  @} end of BasicOffset group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_scale_f32.c b/DSP/Source/BasicMathFunctions/arm_scale_f32.c
index c90c037..72ecbe5 100644
--- a/DSP/Source/BasicMathFunctions/arm_scale_f32.c
+++ b/DSP/Source/BasicMathFunctions/arm_scale_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_scale_f32.c
  * Description:  Multiplies a floating-point vector by a scalar
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,129 +29,131 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @defgroup scale Vector Scale
- *
- * Multiply a vector by a scalar value.  For floating-point data, the algorithm used is:
- *
- * <pre>
- *     pDst[n] = pSrc[n] * scale,   0 <= n < blockSize.
- * </pre>
- *
- * In the fixed-point Q7, Q15, and Q31 functions, <code>scale</code> is represented by
- * a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>.
- * The shift allows the gain of the scaling operation to exceed 1.0.
- * The algorithm used with fixed-point data is:
- *
- * <pre>
- *     pDst[n] = (pSrc[n] * scaleFract) << shift,   0 <= n < blockSize.
- * </pre>
- *
- * The overall scale factor applied to the fixed-point data is
- * <pre>
- *     scale = scaleFract * 2^shift.
- * </pre>
- *
- * The functions support in-place computation allowing the source and destination
- * pointers to reference the same memory buffer.
+  @defgroup BasicScale Vector Scale
+
+  Multiply a vector by a scalar value.  For floating-point data, the algorithm used is:
+
+  <pre>
+      pDst[n] = pSrc[n] * scale,   0 <= n < blockSize.
+  </pre>
+
+  In the fixed-point Q7, Q15, and Q31 functions, <code>scale</code> is represented by
+  a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>.
+  The shift allows the gain of the scaling operation to exceed 1.0.
+  The algorithm used with fixed-point data is:
+
+  <pre>
+      pDst[n] = (pSrc[n] * scaleFract) << shift,   0 <= n < blockSize.
+  </pre>
+
+  The overall scale factor applied to the fixed-point data is
+  <pre>
+      scale = scaleFract * 2^shift.
+  </pre>
+
+  The functions support in-place computation allowing the source and destination
+  pointers to reference the same memory buffer.
  */
 
 /**
- * @addtogroup scale
- * @{
+  @addtogroup BasicScale
+  @{
  */
 
 /**
- * @brief Multiplies a floating-point vector by a scalar.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       scale scale factor to be applied
- * @param[out]      *pDst points to the output vector
- * @param[in]       blockSize number of samples in the vector
- * @return none.
+  @brief         Multiplies a floating-point vector by a scalar.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     scale      scale factor to be applied
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
  */
 
-
 void arm_scale_f32(
-  float32_t * pSrc,
-  float32_t scale,
-  float32_t * pDst,
-  uint32_t blockSize)
+  const float32_t *pSrc,
+        float32_t scale,
+        float32_t *pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
-#if defined (ARM_MATH_DSP)
+  uint32_t blkCnt;                               /* Loop counter */
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
+    float32x4_t vec1;
+    float32x4_t res;
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t in1, in2, in3, in4;                  /* temporary variabels */
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
 
-  /*loop Unrolling */
+    while (blkCnt > 0U)
+    {
+        /* C = A * scale */
+
+    	/* Scale the input and then store the results in the destination buffer. */
+        vec1 = vld1q_f32(pSrc);
+        res = vmulq_f32(vec1, vdupq_n_f32(scale));
+        vst1q_f32(pDst, res);
+
+        /* Increment pointers */
+        pSrc += 4; 
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = A * scale */
-    /* Scale the input and then store the results in the destination buffer. */
-    /* read input samples from source */
-    in1 = *pSrc;
-    in2 = *(pSrc + 1);
 
-    /* multiply with scaling factor */
-    in1 = in1 * scale;
+    /* Scale input and store result in destination buffer. */
+    *pDst++ = (*pSrc++) * scale;
 
-    /* read input sample from source */
-    in3 = *(pSrc + 2);
+    *pDst++ = (*pSrc++) * scale;
 
-    /* multiply with scaling factor */
-    in2 = in2 * scale;
+    *pDst++ = (*pSrc++) * scale;
 
-    /* read input sample from source */
-    in4 = *(pSrc + 3);
+    *pDst++ = (*pSrc++) * scale;
 
-    /* multiply with scaling factor */
-    in3 = in3 * scale;
-    in4 = in4 * scale;
-    /* store the result to destination */
-    *pDst = in1;
-    *(pDst + 1) = in2;
-    *(pDst + 2) = in3;
-    *(pDst + 3) = in4;
-
-    /* update pointers to process next samples */
-    pSrc += 4U;
-    pDst += 4U;
-
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON_EXPERIMENTAL) */
 
   while (blkCnt > 0U)
   {
     /* C = A * scale */
-    /* Scale the input and then store the result in the destination buffer. */
+
+    /* Scale input and store result in destination buffer. */
     *pDst++ = (*pSrc++) * scale;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
+
 }
 
 /**
- * @} end of scale group
+  @} end of BasicScale group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_scale_q15.c b/DSP/Source/BasicMathFunctions/arm_scale_q15.c
index 9d5727d..039b93d 100644
--- a/DSP/Source/BasicMathFunctions/arm_scale_q15.c
+++ b/DSP/Source/BasicMathFunctions/arm_scale_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_scale_q15.c
  * Description:  Multiplies a Q15 vector by a scalar
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,66 +29,66 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup scale
- * @{
+  @addtogroup BasicScale
+  @{
  */
 
 /**
- * @brief Multiplies a Q15 vector by a scalar.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       scaleFract fractional portion of the scale value
- * @param[in]       shift number of bits to shift the result by
- * @param[out]      *pDst points to the output vector
- * @param[in]       blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format.
- * These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
- */
+  @brief         Multiplies a Q15 vector by a scalar.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     scaleFract fractional portion of the scale value
+  @param[in]     shift      number of bits to shift the result by
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
 
+  @par           Scaling and Overflow Behavior
+                   The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format.
+                   These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
+ */
 
 void arm_scale_q15(
-  q15_t * pSrc,
-  q15_t scaleFract,
-  int8_t shift,
-  q15_t * pDst,
-  uint32_t blockSize)
+  const q15_t *pSrc,
+        q15_t scaleFract,
+        int8_t shift,
+        q15_t *pDst,
+        uint32_t blockSize)
 {
-  int8_t kShift = 15 - shift;                    /* shift to apply after scaling */
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+        int8_t kShift = 15 - shift;                    /* Shift to apply after scaling */
 
+#if defined (ARM_MATH_LOOPUNROLL)
 #if defined (ARM_MATH_DSP)
+  q31_t inA1, inA2;
+  q31_t out1, out2, out3, out4;                  /* Temporary output variables */
+  q15_t in1, in2, in3, in4;                      /* Temporary input variables */
+#endif
+#endif
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q15_t in1, in2, in3, in4;
-  q31_t inA1, inA2;                              /* Temporary variables */
-  q31_t out1, out2, out3, out4;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* Reading 2 inputs from memory */
-    inA1 = *__SIMD32(pSrc)++;
-    inA2 = *__SIMD32(pSrc)++;
-
     /* C = A * scale */
-    /* Scale the inputs and then store the 2 results in the destination buffer
+
+#if defined (ARM_MATH_DSP)
+    /* read 2 times 2 samples at a time from source */
+    inA1 = read_q15x2_ia ((q15_t **) &pSrc);
+    inA2 = read_q15x2_ia ((q15_t **) &pSrc);
+
+    /* Scale inputs and store result in temporary variables
      * in single cycle by packing the outputs */
     out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract);
-    out2 = (q31_t) ((q15_t) inA1 * scaleFract);
+    out2 = (q31_t) ((q15_t) (inA1      ) * scaleFract);
     out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract);
-    out4 = (q31_t) ((q15_t) inA2 * scaleFract);
+    out4 = (q31_t) ((q15_t) (inA2      ) * scaleFract);
 
     /* apply shifting */
     out1 = out1 >> kShift;
@@ -102,49 +102,43 @@
     in3 = (q15_t) (__SSAT(out3, 16));
     in4 = (q15_t) (__SSAT(out4, 16));
 
-    /* store the result to destination */
-    *__SIMD32(pDst)++ = __PKHBT(in2, in1, 16);
-    *__SIMD32(pDst)++ = __PKHBT(in4, in3, 16);
+    /* store result to destination */
+    write_q15x2_ia (&pDst, __PKHBT(in2, in1, 16));
+    write_q15x2_ia (&pDst, __PKHBT(in4, in3, 16));
+#else
+    *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
+    *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
+    *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
+    *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
+#endif
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    /* C = A * scale */
-    /* Scale the input and then store the result in the destination buffer. */
-    *pDst++ = (q15_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 16));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     /* C = A * scale */
-    /* Scale the input and then store the result in the destination buffer. */
-    *pDst++ = (q15_t) (__SSAT(((q31_t) * pSrc++ * scaleFract) >> kShift, 16));
 
-    /* Decrement the loop counter */
+    /* Scale input and store result in destination buffer. */
+    *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of scale group
+  @} end of BasicScale group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_scale_q31.c b/DSP/Source/BasicMathFunctions/arm_scale_q31.c
index e89524d..d762ca7 100644
--- a/DSP/Source/BasicMathFunctions/arm_scale_q31.c
+++ b/DSP/Source/BasicMathFunctions/arm_scale_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_scale_q31.c
  * Description:  Multiplies a Q31 vector by a scalar
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,199 +29,163 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup scale
- * @{
+  @addtogroup BasicScale
+  @{
  */
 
 /**
- * @brief Multiplies a Q31 vector by a scalar.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       scaleFract fractional portion of the scale value
- * @param[in]       shift number of bits to shift the result by
- * @param[out]      *pDst points to the output vector
- * @param[in]       blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format.
- * These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.
+  @brief         Multiplies a Q31 vector by a scalar.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     scaleFract fractional portion of the scale value
+  @param[in]     shift      number of bits to shift the result by
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format.
+                   These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.
  */
 
 void arm_scale_q31(
-  q31_t * pSrc,
-  q31_t scaleFract,
-  int8_t shift,
-  q31_t * pDst,
-  uint32_t blockSize)
+  const q31_t *pSrc,
+        q31_t scaleFract,
+        int8_t shift,
+        q31_t *pDst,
+        uint32_t blockSize)
 {
-  int8_t kShift = shift + 1;                     /* Shift to apply after scaling */
-  int8_t sign = (kShift & 0x80);
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in, out;
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t in, out;                                 /* Temporary variables */
+        int8_t kShift = shift + 1;                     /* Shift to apply after scaling */
+        int8_t sign = (kShift & 0x80);
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in1, in2, in3, in4;                      /* temporary input variables */
-  q31_t out1, out2, out3, out4;                  /* temporary output variabels */
-
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
   if (sign == 0U)
   {
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-     ** a second loop below computes the remaining 1 to 3 samples. */
     while (blkCnt > 0U)
     {
-      /* read four inputs from source */
-      in1 = *pSrc;
-      in2 = *(pSrc + 1);
-      in3 = *(pSrc + 2);
-      in4 = *(pSrc + 3);
+      /* C = A * scale */
 
-      /* multiply input with scaler value */
-      in1 = ((q63_t) in1 * scaleFract) >> 32;
-      in2 = ((q63_t) in2 * scaleFract) >> 32;
-      in3 = ((q63_t) in3 * scaleFract) >> 32;
-      in4 = ((q63_t) in4 * scaleFract) >> 32;
+      /* Scale input and store result in destination buffer. */
+      in = *pSrc++;                                /* read input from source */
+      in = ((q63_t) in * scaleFract) >> 32;        /* multiply input with scaler value */
+      out = in << kShift;                          /* apply shifting */
+      if (in != (out >> kShift))                   /* saturate the result */
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;                               /* Store result destination */
 
-      /* apply shifting */
-      out1 = in1 << kShift;
-      out2 = in2 << kShift;
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
 
-      /* saturate the results. */
-      if (in1 != (out1 >> kShift))
-        out1 = 0x7FFFFFFF ^ (in1 >> 31);
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
 
-      if (in2 != (out2 >> kShift))
-        out2 = 0x7FFFFFFF ^ (in2 >> 31);
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
 
-      out3 = in3 << kShift;
-      out4 = in4 << kShift;
-
-      *pDst = out1;
-      *(pDst + 1) = out2;
-
-      if (in3 != (out3 >> kShift))
-        out3 = 0x7FFFFFFF ^ (in3 >> 31);
-
-      if (in4 != (out4 >> kShift))
-        out4 = 0x7FFFFFFF ^ (in4 >> 31);
-
-      /* Store result destination */
-      *(pDst + 2) = out3;
-      *(pDst + 3) = out4;
-
-      /* Update pointers to process next sampels */
-      pSrc += 4U;
-      pDst += 4U;
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
-
   }
   else
   {
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-     ** a second loop below computes the remaining 1 to 3 samples. */
     while (blkCnt > 0U)
     {
-      /* read four inputs from source */
-      in1 = *pSrc;
-      in2 = *(pSrc + 1);
-      in3 = *(pSrc + 2);
-      in4 = *(pSrc + 3);
+      /* C = A * scale */
 
-      /* multiply input with scaler value */
-      in1 = ((q63_t) in1 * scaleFract) >> 32;
-      in2 = ((q63_t) in2 * scaleFract) >> 32;
-      in3 = ((q63_t) in3 * scaleFract) >> 32;
-      in4 = ((q63_t) in4 * scaleFract) >> 32;
+      /* Scale input and store result in destination buffer. */
+      in = *pSrc++;                                /* read four inputs from source */
+      in = ((q63_t) in * scaleFract) >> 32;        /* multiply input with scaler value */
+      out = in >> -kShift;                         /* apply shifting */
+      *pDst++ = out;                               /* Store result destination */
 
-      /* apply shifting */
-      out1 = in1 >> -kShift;
-      out2 = in2 >> -kShift;
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in >> -kShift;
+      *pDst++ = out;
 
-      out3 = in3 >> -kShift;
-      out4 = in4 >> -kShift;
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in >> -kShift;
+      *pDst++ = out;
 
-      /* Store result destination */
-      *pDst = out1;
-      *(pDst + 1) = out2;
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in >> -kShift;
+      *pDst++ = out;
 
-      *(pDst + 2) = out3;
-      *(pDst + 3) = out4;
-
-      /* Update pointers to process next sampels */
-      pSrc += 4U;
-      pDst += 4U;
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
-  if (sign == 0)
+  if (sign == 0U)
   {
-	  while (blkCnt > 0U)
-	  {
-		/* C = A * scale */
-		/* Scale the input and then store the result in the destination buffer. */
-		in = *pSrc++;
-		in = ((q63_t) in * scaleFract) >> 32;
+    while (blkCnt > 0U)
+    {
+      /* C = A * scale */
 
-		out = in << kShift;
+      /* Scale input and store result in destination buffer. */
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+          out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
 
-		if (in != (out >> kShift))
-			out = 0x7FFFFFFF ^ (in >> 31);
-
-		*pDst++ = out;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	  }
+      /* Decrement loop counter */
+      blkCnt--;
+    }
   }
   else
   {
-	  while (blkCnt > 0U)
-	  {
-		/* C = A * scale */
-		/* Scale the input and then store the result in the destination buffer. */
-		in = *pSrc++;
-		in = ((q63_t) in * scaleFract) >> 32;
+    while (blkCnt > 0U)
+    {
+      /* C = A * scale */
 
-		out = in >> -kShift;
+      /* Scale input and store result in destination buffer. */
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in >> -kShift;
+      *pDst++ = out;
 
-		*pDst++ = out;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	  }
-
+      /* Decrement loop counter */
+      blkCnt--;
+    }
   }
+
 }
 
 /**
- * @} end of scale group
+  @} end of BasicScale group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_scale_q7.c b/DSP/Source/BasicMathFunctions/arm_scale_q7.c
index 6cf1bbb..cb967d2 100644
--- a/DSP/Source/BasicMathFunctions/arm_scale_q7.c
+++ b/DSP/Source/BasicMathFunctions/arm_scale_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_scale_q7.c
  * Description:  Multiplies a Q7 vector by a scalar
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,109 +29,101 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup scale
- * @{
+  @addtogroup BasicScale
+  @{
  */
 
 /**
- * @brief Multiplies a Q7 vector by a scalar.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       scaleFract fractional portion of the scale value
- * @param[in]       shift number of bits to shift the result by
- * @param[out]      *pDst points to the output vector
- * @param[in]       blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.7 format.
- * These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format.
+  @brief         Multiplies a Q7 vector by a scalar.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     scaleFract fractional portion of the scale value
+  @param[in]     shift      number of bits to shift the result by
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.7 format.
+                   These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format.
  */
 
 void arm_scale_q7(
-  q7_t * pSrc,
-  q7_t scaleFract,
-  int8_t shift,
-  q7_t * pDst,
-  uint32_t blockSize)
+  const q7_t * pSrc,
+        q7_t scaleFract,
+        int8_t shift,
+        q7_t * pDst,
+        uint32_t blockSize)
 {
-  int8_t kShift = 7 - shift;                     /* shift to apply after scaling */
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+        int8_t kShift = 7 - shift;                     /* Shift to apply after scaling */
+
+#if defined (ARM_MATH_LOOPUNROLL)
 
 #if defined (ARM_MATH_DSP)
+  q7_t in1,  in2,  in3,  in4;                    /* Temporary input variables */
+  q7_t out1, out2, out3, out4;                   /* Temporary output variables */
+#endif
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q7_t in1, in2, in3, in4, out1, out2, out3, out4;      /* Temporary variables to store input & output */
-
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
+    /* C = A * scale */
+
+#if defined (ARM_MATH_DSP)
     /* Reading 4 inputs from memory */
     in1 = *pSrc++;
     in2 = *pSrc++;
     in3 = *pSrc++;
     in4 = *pSrc++;
 
-    /* C = A * scale */
-    /* Scale the inputs and then store the results in the temporary variables. */
+    /* Scale inputs and store result in the temporary variable. */
     out1 = (q7_t) (__SSAT(((in1) * scaleFract) >> kShift, 8));
     out2 = (q7_t) (__SSAT(((in2) * scaleFract) >> kShift, 8));
     out3 = (q7_t) (__SSAT(((in3) * scaleFract) >> kShift, 8));
     out4 = (q7_t) (__SSAT(((in4) * scaleFract) >> kShift, 8));
 
-    /* Packing the individual outputs into 32bit and storing in
-     * destination buffer in single write */
-    *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
+    /* Pack and store result in destination buffer (in single write) */
+    write_q7x4_ia (&pDst, __PACKq7(out1, out2, out3, out4));
+#else
+    *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
+    *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
+    *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
+    *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
+#endif
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    /* C = A * scale */
-    /* Scale the input and then store the result in the destination buffer. */
-    *pDst++ = (q7_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 8));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     /* C = A * scale */
-    /* Scale the input and then store the result in the destination buffer. */
-    *pDst++ = (q7_t) (__SSAT((((q15_t) * pSrc++ * scaleFract) >> kShift), 8));
 
-    /* Decrement the loop counter */
+    /* Scale input and store result in destination buffer. */
+    *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of scale group
+  @} end of BasicScale group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_shift_q15.c b/DSP/Source/BasicMathFunctions/arm_shift_q15.c
index d2cd037..8a15155 100644
--- a/DSP/Source/BasicMathFunctions/arm_shift_q15.c
+++ b/DSP/Source/BasicMathFunctions/arm_shift_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_shift_q15.c
  * Description:  Shifts the elements of a Q15 vector by a specified number of bits
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,208 +29,173 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup shift
- * @{
+  @addtogroup BasicShift
+  @{
  */
 
 /**
- * @brief  Shifts the elements of a Q15 vector a specified number of bits.
- * @param[in]  *pSrc points to the input vector
- * @param[in]  shiftBits number of bits to shift.  A positive value shifts left; a negative value shifts right.
- * @param[out]  *pDst points to the output vector
- * @param[in]  blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
+  @brief         Shifts the elements of a Q15 vector a specified number of bits
+  @param[in]     pSrc       points to the input vector
+  @param[in]     shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
  */
 
 void arm_shift_q15(
-  q15_t * pSrc,
-  int8_t shiftBits,
-  q15_t * pDst,
-  uint32_t blockSize)
+  const q15_t * pSrc,
+        int8_t shiftBits,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
-  uint8_t sign;                                  /* Sign of shiftBits */
+        uint32_t blkCnt;                               /* Loop counter */
+        uint8_t sign = (shiftBits & 0x80);             /* Sign of shiftBits */
+
+#if defined (ARM_MATH_LOOPUNROLL)
 
 #if defined (ARM_MATH_DSP)
+  q15_t in1, in2;                                /* Temporary input variables */
+#endif
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t in1, in2;                                /* Temporary variables */
-
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* Getting the sign of shiftBits */
-  sign = (shiftBits & 0x80);
-
   /* If the shift value is positive then do right shift else left shift */
   if (sign == 0U)
   {
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-     ** a second loop below computes the remaining 1 to 3 samples. */
     while (blkCnt > 0U)
     {
-      /* Read 2 inputs */
+      /* C = A << shiftBits */
+
+#if defined (ARM_MATH_DSP)
+      /* read 2 samples from source */
       in1 = *pSrc++;
       in2 = *pSrc++;
-      /* C = A << shiftBits */
+
       /* Shift the inputs and then store the results in the destination buffer. */
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16),
-                                  __SSAT((in2 << shiftBits), 16), 16);
-
+#ifndef ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pDst, __PKHBT(__SSAT((in1 << shiftBits), 16),
+                                     __SSAT((in2 << shiftBits), 16), 16));
 #else
+      write_q15x2_ia (&pDst, __PKHBT(__SSAT((in2 << shiftBits), 16),
+                                      __SSAT((in1 << shiftBits), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-      *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16),
-                                  __SSAT((in1 << shiftBits), 16), 16);
-
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
-
+      /* read 2 samples from source */
       in1 = *pSrc++;
       in2 = *pSrc++;
 
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16),
-                                  __SSAT((in2 << shiftBits), 16), 16);
+#ifndef ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pDst, __PKHBT(__SSAT((in1 << shiftBits), 16),
+                                     __SSAT((in2 << shiftBits), 16), 16));
+#else
+      write_q15x2_ia (&pDst, __PKHBT(__SSAT((in2 << shiftBits), 16),
+                                     __SSAT((in1 << shiftBits), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
 #else
+      *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
+      *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
+      *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
+      *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
+#endif
 
-      *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16),
-                                  __SSAT((in1 << shiftBits), 16), 16);
-
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
-    blkCnt = blockSize % 0x4U;
-
-    while (blkCnt > 0U)
-    {
-      /* C = A << shiftBits */
-      /* Shift and then store the results in the destination buffer. */
-      *pDst++ = __SSAT((*pSrc++ << shiftBits), 16);
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
   else
   {
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while (blkCnt > 0U)
-    {
-      /* Read 2 inputs */
-      in1 = *pSrc++;
-      in2 = *pSrc++;
-
-      /* C = A >> shiftBits */
-      /* Shift the inputs and then store the results in the destination buffer. */
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits),
-                                  (in2 >> -shiftBits), 16);
-
-#else
-
-      *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits),
-                                  (in1 >> -shiftBits), 16);
-
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      in1 = *pSrc++;
-      in2 = *pSrc++;
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits),
-                                  (in2 >> -shiftBits), 16);
-
-#else
-
-      *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits),
-                                  (in1 >> -shiftBits), 16);
-
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
-    blkCnt = blockSize % 0x4U;
-
     while (blkCnt > 0U)
     {
       /* C = A >> shiftBits */
+
+#if defined (ARM_MATH_DSP)
+      /* read 2 samples from source */
+      in1 = *pSrc++;
+      in2 = *pSrc++;
+
       /* Shift the inputs and then store the results in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pDst, __PKHBT((in1 >> -shiftBits),
+                                     (in2 >> -shiftBits), 16));
+#else
+      write_q15x2_ia (&pDst, __PKHBT((in2 >> -shiftBits),
+                                     (in1 >> -shiftBits), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+      /* read 2 samples from source */
+      in1 = *pSrc++;
+      in2 = *pSrc++;
+
+#ifndef ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pDst, __PKHBT((in1 >> -shiftBits),
+                                     (in2 >> -shiftBits), 16));
+#else
+      write_q15x2_ia (&pDst, __PKHBT((in2 >> -shiftBits),
+                                     (in1 >> -shiftBits), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+#else
       *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+#endif
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
 
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
 #else
 
-  /* Run the below code for Cortex-M0 */
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
 
-  /* Getting the sign of shiftBits */
-  sign = (shiftBits & 0x80);
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   /* If the shift value is positive then do right shift else left shift */
   if (sign == 0U)
   {
-    /* Initialize blkCnt with number of samples */
-    blkCnt = blockSize;
-
     while (blkCnt > 0U)
     {
       /* C = A << shiftBits */
-      /* Shift and then store the results in the destination buffer. */
-      *pDst++ = __SSAT(((q31_t) * pSrc++ << shiftBits), 16);
 
-      /* Decrement the loop counter */
+      /* Shift input and store result in destination buffer. */
+      *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
+
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
   else
   {
-    /* Initialize blkCnt with number of samples */
-    blkCnt = blockSize;
-
     while (blkCnt > 0U)
     {
       /* C = A >> shiftBits */
-      /* Shift the inputs and then store the results in the destination buffer. */
+
+      /* Shift input and store result in destination buffer. */
       *pDst++ = (*pSrc++ >> -shiftBits);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of shift group
+  @} end of BasicShift group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_shift_q31.c b/DSP/Source/BasicMathFunctions/arm_shift_q31.c
index 7e728d4..db6060a 100644
--- a/DSP/Source/BasicMathFunctions/arm_shift_q31.c
+++ b/DSP/Source/BasicMathFunctions/arm_shift_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_shift_q31.c
  * Description:  Shifts the elements of a Q31 vector by a specified number of bits
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,163 +29,153 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 /**
- * @defgroup shift Vector Shift
- *
- * Shifts the elements of a fixed-point vector by a specified number of bits.
- * There are separate functions for Q7, Q15, and Q31 data types.
- * The underlying algorithm used is:
- *
- * <pre>
- *     pDst[n] = pSrc[n] << shift,   0 <= n < blockSize.
- * </pre>
- *
- * If <code>shift</code> is positive then the elements of the vector are shifted to the left.
- * If <code>shift</code> is negative then the elements of the vector are shifted to the right.
- *
- * The functions support in-place computation allowing the source and destination
- * pointers to reference the same memory buffer.
+  @defgroup BasicShift Vector Shift
+
+  Shifts the elements of a fixed-point vector by a specified number of bits.
+  There are separate functions for Q7, Q15, and Q31 data types.
+  The underlying algorithm used is:
+
+  <pre>
+      pDst[n] = pSrc[n] << shift,   0 <= n < blockSize.
+  </pre>
+
+  If <code>shift</code> is positive then the elements of the vector are shifted to the left.
+  If <code>shift</code> is negative then the elements of the vector are shifted to the right.
+
+  The functions support in-place computation allowing the source and destination
+  pointers to reference the same memory buffer.
  */
 
 /**
- * @addtogroup shift
- * @{
+  @addtogroup BasicShift
+  @{
  */
 
 /**
- * @brief  Shifts the elements of a Q31 vector a specified number of bits.
- * @param[in]  *pSrc points to the input vector
- * @param[in]  shiftBits number of bits to shift.  A positive value shifts left; a negative value shifts right.
- * @param[out]  *pDst points to the output vector
- * @param[in]  blockSize number of samples in the vector
- * @return none.
- *
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
+  @brief         Shifts the elements of a Q31 vector a specified number of bits.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in the vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
  */
 
 void arm_shift_q31(
-  q31_t * pSrc,
-  int8_t shiftBits,
-  q31_t * pDst,
-  uint32_t blockSize)
+  const q31_t * pSrc,
+        int8_t shiftBits,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
-  uint8_t sign = (shiftBits & 0x80);             /* Sign of shiftBits */
+        uint32_t blkCnt;                               /* Loop counter */
+        uint8_t sign = (shiftBits & 0x80);             /* Sign of shiftBits */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  q31_t in1, in2, in3, in4;                      /* Temporary input variables */
-  q31_t out1, out2, out3, out4;                  /* Temporary output variables */
+  q31_t in, out;                                 /* Temporary variables */
 
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-
+  /* If the shift value is positive then do right shift else left shift */
   if (sign == 0U)
   {
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-     ** a second loop below computes the remaining 1 to 3 samples. */
     while (blkCnt > 0U)
     {
-      /* C = A  << shiftBits */
-      /* Shift the input and then store the results in the destination buffer. */
-      in1 = *pSrc;
-      in2 = *(pSrc + 1);
-      out1 = in1 << shiftBits;
-      in3 = *(pSrc + 2);
-      out2 = in2 << shiftBits;
-      in4 = *(pSrc + 3);
-      if (in1 != (out1 >> shiftBits))
-        out1 = 0x7FFFFFFF ^ (in1 >> 31);
+      /* C = A << shiftBits */
 
-      if (in2 != (out2 >> shiftBits))
-        out2 = 0x7FFFFFFF ^ (in2 >> 31);
+      /* Shift input and store result in destination buffer. */
+      in = *pSrc++;
+      out = in << shiftBits;
+      if (in != (out >> shiftBits))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
 
-      *pDst = out1;
-      out3 = in3 << shiftBits;
-      *(pDst + 1) = out2;
-      out4 = in4 << shiftBits;
+      in = *pSrc++;
+      out = in << shiftBits;
+      if (in != (out >> shiftBits))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
 
-      if (in3 != (out3 >> shiftBits))
-        out3 = 0x7FFFFFFF ^ (in3 >> 31);
+      in = *pSrc++;
+      out = in << shiftBits;
+      if (in != (out >> shiftBits))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
 
-      if (in4 != (out4 >> shiftBits))
-        out4 = 0x7FFFFFFF ^ (in4 >> 31);
+      in = *pSrc++;
+      out = in << shiftBits;
+      if (in != (out >> shiftBits))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
 
-      *(pDst + 2) = out3;
-      *(pDst + 3) = out4;
-
-      /* Update destination pointer to process next sampels */
-      pSrc += 4U;
-      pDst += 4U;
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
   else
   {
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-     ** a second loop below computes the remaining 1 to 3 samples. */
     while (blkCnt > 0U)
     {
-      /* C = A >>  shiftBits */
-      /* Shift the input and then store the results in the destination buffer. */
-      in1 = *pSrc;
-      in2 = *(pSrc + 1);
-      in3 = *(pSrc + 2);
-      in4 = *(pSrc + 3);
+      /* C = A >> shiftBits */
 
-      *pDst = (in1 >> -shiftBits);
-      *(pDst + 1) = (in2 >> -shiftBits);
-      *(pDst + 2) = (in3 >> -shiftBits);
-      *(pDst + 3) = (in4 >> -shiftBits);
+      /* Shift input and store results in destination buffer. */
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
 
-
-      pSrc += 4U;
-      pDst += 4U;
-
+      /* Decrement loop counter */
       blkCnt--;
     }
-
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
-
-  while (blkCnt > 0U)
+  /* If the shift value is positive then do right shift else left shift */
+  if (sign == 0U)
   {
-    /* C = A (>> or <<) shiftBits */
-    /* Shift the input and then store the result in the destination buffer. */
-    *pDst++ = (sign == 0U) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
-      (*pSrc++ >> -shiftBits);
+    while (blkCnt > 0U)
+    {
+      /* C = A << shiftBits */
 
-    /* Decrement the loop counter */
-    blkCnt--;
+      /* Shift input and store result in destination buffer. */
+      *pDst++ = clip_q63_to_q31((q63_t) *pSrc++ << shiftBits);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
   }
+  else
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A >> shiftBits */
 
+      /* Shift input and store result in destination buffer. */
+      *pDst++ = (*pSrc++ >> -shiftBits);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
 
 }
 
 /**
- * @} end of shift group
+  @} end of BasicShift group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_shift_q7.c b/DSP/Source/BasicMathFunctions/arm_shift_q7.c
index fd508b4..c4163fc 100644
--- a/DSP/Source/BasicMathFunctions/arm_shift_q7.c
+++ b/DSP/Source/BasicMathFunctions/arm_shift_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_shift_q7.c
  * Description:  Processing function for the Q7 Shifting
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,180 +29,147 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup shift
- * @{
+  @addtogroup BasicShift
+  @{
  */
 
-
 /**
- * @brief  Shifts the elements of a Q7 vector a specified number of bits.
- * @param[in]  *pSrc points to the input vector
- * @param[in]  shiftBits number of bits to shift.  A positive value shifts left; a negative value shifts right.
- * @param[out]  *pDst points to the output vector
- * @param[in]  blockSize number of samples in the vector
- * @return none.
- *
- * \par Conditions for optimum performance
- *  Input and output buffers should be aligned by 32-bit
- *
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q7 range [0x8 0x7F] will be saturated.
+  @brief         Shifts the elements of a Q7 vector a specified number of bits
+  @param[in]     pSrc       points to the input vector
+  @param[in]     shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           onditions for optimum performance
+                   Input and output buffers should be aligned by 32-bit
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
  */
 
 void arm_shift_q7(
-  q7_t * pSrc,
-  int8_t shiftBits,
-  q7_t * pDst,
-  uint32_t blockSize)
+  const q7_t * pSrc,
+        int8_t shiftBits,
+        q7_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
-  uint8_t sign;                                  /* Sign of shiftBits */
+        uint32_t blkCnt;                               /* Loop counter */
+        uint8_t sign = (shiftBits & 0x80);             /* Sign of shiftBits */
+
+#if defined (ARM_MATH_LOOPUNROLL)
 
 #if defined (ARM_MATH_DSP)
+  q7_t in1,  in2,  in3,  in4;                    /* Temporary input variables */
+#endif
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q7_t in1;                                      /* Input value1 */
-  q7_t in2;                                      /* Input value2 */
-  q7_t in3;                                      /* Input value3 */
-  q7_t in4;                                      /* Input value4 */
-
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* Getting the sign of shiftBits */
-  sign = (shiftBits & 0x80);
-
   /* If the shift value is positive then do right shift else left shift */
   if (sign == 0U)
   {
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-     ** a second loop below computes the remaining 1 to 3 samples. */
     while (blkCnt > 0U)
     {
       /* C = A << shiftBits */
+
+#if defined (ARM_MATH_DSP)
       /* Read 4 inputs */
-      in1 = *pSrc;
-      in2 = *(pSrc + 1);
-      in3 = *(pSrc + 2);
-      in4 = *(pSrc + 3);
+      in1 = *pSrc++;
+      in2 = *pSrc++;
+      in3 = *pSrc++;
+      in4 = *pSrc++;
 
-      /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
-      *__SIMD32(pDst)++ = __PACKq7(__SSAT((in1 << shiftBits), 8),
-                                   __SSAT((in2 << shiftBits), 8),
-                                   __SSAT((in3 << shiftBits), 8),
-                                   __SSAT((in4 << shiftBits), 8));
-      /* Update source pointer to process next sampels */
-      pSrc += 4U;
+    /* Pack and store result in destination buffer (in single write) */
+      write_q7x4_ia (&pDst, __PACKq7(__SSAT((in1 << shiftBits), 8),
+                                     __SSAT((in2 << shiftBits), 8),
+                                     __SSAT((in3 << shiftBits), 8),
+                                     __SSAT((in4 << shiftBits), 8) ));
+#else
+      *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
+      *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
+      *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
+      *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
+#endif
 
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
-    blkCnt = blockSize % 0x4U;
-
-    while (blkCnt > 0U)
-    {
-      /* C = A << shiftBits */
-      /* Shift the input and then store the result in the destination buffer. */
-      *pDst++ = (q7_t) __SSAT((*pSrc++ << shiftBits), 8);
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
   else
   {
-    shiftBits = -shiftBits;
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-     ** a second loop below computes the remaining 1 to 3 samples. */
     while (blkCnt > 0U)
     {
       /* C = A >> shiftBits */
+
+#if defined (ARM_MATH_DSP)
       /* Read 4 inputs */
-      in1 = *pSrc;
-      in2 = *(pSrc + 1);
-      in3 = *(pSrc + 2);
-      in4 = *(pSrc + 3);
-
-      /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
-      *__SIMD32(pDst)++ = __PACKq7((in1 >> shiftBits), (in2 >> shiftBits),
-                                   (in3 >> shiftBits), (in4 >> shiftBits));
-
-
-      pSrc += 4U;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
-    blkCnt = blockSize % 0x4U;
-
-    while (blkCnt > 0U)
-    {
-      /* C = A >> shiftBits */
-      /* Shift the input and then store the result in the destination buffer. */
       in1 = *pSrc++;
-      *pDst++ = (in1 >> shiftBits);
+      in2 = *pSrc++;
+      in3 = *pSrc++;
+      in4 = *pSrc++;
 
-      /* Decrement the loop counter */
+    /* Pack and store result in destination buffer (in single write) */
+      write_q7x4_ia (&pDst, __PACKq7((in1 >> -shiftBits),
+                                     (in2 >> -shiftBits),
+                                     (in3 >> -shiftBits),
+                                     (in4 >> -shiftBits) ));
+#else
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+#endif
+
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
 
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
 #else
 
-  /* Run the below code for Cortex-M0 */
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
 
-  /* Getting the sign of shiftBits */
-  sign = (shiftBits & 0x80);
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   /* If the shift value is positive then do right shift else left shift */
   if (sign == 0U)
   {
-    /* Initialize blkCnt with number of samples */
-    blkCnt = blockSize;
-
     while (blkCnt > 0U)
     {
       /* C = A << shiftBits */
-      /* Shift the input and then store the result in the destination buffer. */
-      *pDst++ = (q7_t) __SSAT(((q15_t) * pSrc++ << shiftBits), 8);
 
-      /* Decrement the loop counter */
+      /* Shift input and store result in destination buffer. */
+      *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
+
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
   else
   {
-    /* Initialize blkCnt with number of samples */
-    blkCnt = blockSize;
-
     while (blkCnt > 0U)
     {
       /* C = A >> shiftBits */
-      /* Shift the input and then store the result in the destination buffer. */
+
+      /* Shift input and store result in destination buffer. */
       *pDst++ = (*pSrc++ >> -shiftBits);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
 }
 
 /**
- * @} end of shift group
+  @} end of BasicShift group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_sub_f32.c b/DSP/Source/BasicMathFunctions/arm_sub_f32.c
index 74a2944..4c97af3 100644
--- a/DSP/Source/BasicMathFunctions/arm_sub_f32.c
+++ b/DSP/Source/BasicMathFunctions/arm_sub_f32.c
@@ -1,15 +1,15 @@
 /* ----------------------------------------------------------------------
  * Project:      CMSIS DSP Library
  * Title:        arm_sub_f32.c
- * Description:  Floating-point vector subtraction.
+ * Description:  Floating-point vector subtraction
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,110 +29,120 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @defgroup BasicSub Vector Subtraction
- *
- * Element-by-element subtraction of two vectors.
- *
- * <pre>
- *     pDst[n] = pSrcA[n] - pSrcB[n],   0 <= n < blockSize.
- * </pre>
- *
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+  @defgroup BasicSub Vector Subtraction
+
+  Element-by-element subtraction of two vectors.
+
+  <pre>
+      pDst[n] = pSrcA[n] - pSrcB[n],   0 <= n < blockSize.
+  </pre>
+
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
  */
 
 /**
- * @addtogroup BasicSub
- * @{
+  @addtogroup BasicSub
+  @{
  */
 
-
 /**
- * @brief Floating-point vector subtraction.
- * @param[in]       *pSrcA points to the first input vector
- * @param[in]       *pSrcB points to the second input vector
- * @param[out]      *pDst points to the output vector
- * @param[in]       blockSize number of samples in each vector
- * @return none.
+  @brief         Floating-point vector subtraction.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
  */
 
 void arm_sub_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t blockSize)
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
 
-#if defined (ARM_MATH_DSP)
+#if defined(ARM_MATH_NEON)
+    float32x4_t vec1;
+    float32x4_t vec2;
+    float32x4_t res;
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t inA1, inA2, inA3, inA4;              /* temporary variables */
-  float32_t inB1, inB2, inB3, inB4;              /* temporary variables */
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
 
-  /*loop Unrolling */
+    while (blkCnt > 0U)
+    {
+        /* C = A - B */
+
+        /* Subtract and then store the results in the destination buffer. */
+        vec1 = vld1q_f32(pSrcA);
+        vec2 = vld1q_f32(pSrcB);
+        res = vsubq_f32(vec1, vec2);
+        vst1q_f32(pDst, res);
+
+        /* Increment pointers */
+        pSrcA += 4;
+        pSrcB += 4; 
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = A - B */
-    /* Subtract and then store the results in the destination buffer. */
-    /* Read 4 input samples from sourceA and sourceB */
-    inA1 = *pSrcA;
-    inB1 = *pSrcB;
-    inA2 = *(pSrcA + 1);
-    inB2 = *(pSrcB + 1);
-    inA3 = *(pSrcA + 2);
-    inB3 = *(pSrcB + 2);
-    inA4 = *(pSrcA + 3);
-    inB4 = *(pSrcB + 3);
 
-    /* dst = srcA - srcB */
-    /* subtract and store the result */
-    *pDst = inA1 - inB1;
-    *(pDst + 1) = inA2 - inB2;
-    *(pDst + 2) = inA3 - inB3;
-    *(pDst + 3) = inA4 - inB4;
+    /* Subtract and store result in destination buffer. */
+    *pDst++ = (*pSrcA++) - (*pSrcB++);
 
+    *pDst++ = (*pSrcA++) - (*pSrcB++);
 
-    /* Update pointers to process next sampels */
-    pSrcA += 4U;
-    pSrcB += 4U;
-    pDst += 4U;
+    *pDst++ = (*pSrcA++) - (*pSrcB++);
 
-    /* Decrement the loop counter */
+    *pDst++ = (*pSrcA++) - (*pSrcB++);
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
 
   while (blkCnt > 0U)
   {
     /* C = A - B */
-    /* Subtract and then store the results in the destination buffer. */
+
+    /* Subtract and store result in destination buffer. */
     *pDst++ = (*pSrcA++) - (*pSrcB++);
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
+
 }
 
 /**
- * @} end of BasicSub group
+  @} end of BasicSub group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_sub_q15.c b/DSP/Source/BasicMathFunctions/arm_sub_q15.c
index 17942eb..835917e 100644
--- a/DSP/Source/BasicMathFunctions/arm_sub_q15.c
+++ b/DSP/Source/BasicMathFunctions/arm_sub_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_sub_q15.c
  * Description:  Q15 vector subtraction
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,100 +29,98 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup BasicSub
- * @{
+  @addtogroup BasicSub
+  @{
  */
 
 /**
- * @brief Q15 vector subtraction.
- * @param[in]       *pSrcA points to the first input vector
- * @param[in]       *pSrcB points to the second input vector
- * @param[out]      *pDst points to the output vector
- * @param[in]       blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
+  @brief         Q15 vector subtraction.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
  */
 
 void arm_sub_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t blockSize)
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
 
+#if defined (ARM_MATH_LOOPUNROLL)
 
 #if defined (ARM_MATH_DSP)
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
   q31_t inA1, inA2;
   q31_t inB1, inB2;
+#endif
 
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = A - B */
-    /* Subtract and then store the results in the destination buffer two samples at a time. */
-    inA1 = *__SIMD32(pSrcA)++;
-    inA2 = *__SIMD32(pSrcA)++;
-    inB1 = *__SIMD32(pSrcB)++;
-    inB2 = *__SIMD32(pSrcB)++;
 
-    *__SIMD32(pDst)++ = __QSUB16(inA1, inB1);
-    *__SIMD32(pDst)++ = __QSUB16(inA2, inB2);
+#if defined (ARM_MATH_DSP)
+    /* read 2 times 2 samples at a time from sourceA */
+    inA1 = read_q15x2_ia ((q15_t **) &pSrcA);
+    inA2 = read_q15x2_ia ((q15_t **) &pSrcA);
+    /* read 2 times 2 samples at a time from sourceB */
+    inB1 = read_q15x2_ia ((q15_t **) &pSrcB);
+    inB2 = read_q15x2_ia ((q15_t **) &pSrcB);
 
-    /* Decrement the loop counter */
+    /* Subtract and store 2 times 2 samples at a time */
+    write_q15x2_ia (&pDst, __QSUB16(inA1, inB1));
+    write_q15x2_ia (&pDst, __QSUB16(inA2, inB2));
+#else
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
+#endif
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    /* C = A - B */
-    /* Subtract and then store the result in the destination buffer. */
-    *pDst++ = (q15_t) __QSUB16(*pSrcA++, *pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     /* C = A - B */
-    /* Subtract and then store the result in the destination buffer. */
-    *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ - *pSrcB++), 16);
 
-    /* Decrement the loop counter */
+    /* Subtract and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (q15_t) __QSUB16(*pSrcA++, *pSrcB++);
+#else
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
+#endif
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
-
 }
 
 /**
- * @} end of BasicSub group
+  @} end of BasicSub group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_sub_q31.c b/DSP/Source/BasicMathFunctions/arm_sub_q31.c
index 72b8597..bac1927 100644
--- a/DSP/Source/BasicMathFunctions/arm_sub_q31.c
+++ b/DSP/Source/BasicMathFunctions/arm_sub_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_sub_q31.c
  * Description:  Q31 vector subtraction
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,106 +29,80 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup BasicSub
- * @{
+  @addtogroup BasicSub
+  @{
  */
 
 /**
- * @brief Q31 vector subtraction.
- * @param[in]       *pSrcA points to the first input vector
- * @param[in]       *pSrcB points to the second input vector
- * @param[out]      *pDst points to the output vector
- * @param[in]       blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
+  @brief         Q31 vector subtraction.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
  */
 
 void arm_sub_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t blockSize)
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
 
+#if defined (ARM_MATH_LOOPUNROLL)
 
-#if defined (ARM_MATH_DSP)
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t inA1, inA2, inA3, inA4;
-  q31_t inB1, inB2, inB3, inB4;
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = A - B */
-    /* Subtract and then store the results in the destination buffer. */
-    inA1 = *pSrcA++;
-    inA2 = *pSrcA++;
-    inB1 = *pSrcB++;
-    inB2 = *pSrcB++;
 
-    inA3 = *pSrcA++;
-    inA4 = *pSrcA++;
-    inB3 = *pSrcB++;
-    inB4 = *pSrcB++;
-
-    *pDst++ = __QSUB(inA1, inB1);
-    *pDst++ = __QSUB(inA2, inB2);
-    *pDst++ = __QSUB(inA3, inB3);
-    *pDst++ = __QSUB(inA4, inB4);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A - B */
-    /* Subtract and then store the result in the destination buffer. */
+    /* Subtract and store result in destination buffer. */
     *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
 
-    /* Decrement the loop counter */
+    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
+
+    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
+
+    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#else
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
 
-  /* Run the below code for Cortex-M0 */
+#else
 
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     /* C = A - B */
-    /* Subtract and then store the result in the destination buffer. */
-    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ - *pSrcB++);
 
-    /* Decrement the loop counter */
+    /* Subtract and store result in destination buffer. */
+    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of BasicSub group
+  @} end of BasicSub group
  */
diff --git a/DSP/Source/BasicMathFunctions/arm_sub_q7.c b/DSP/Source/BasicMathFunctions/arm_sub_q7.c
index d211f40..a55a8fd 100644
--- a/DSP/Source/BasicMathFunctions/arm_sub_q7.c
+++ b/DSP/Source/BasicMathFunctions/arm_sub_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_sub_q7.c
  * Description:  Q7 vector subtraction
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,91 +29,81 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMath
+  @ingroup groupMath
  */
 
 /**
- * @addtogroup BasicSub
- * @{
+  @addtogroup BasicSub
+  @{
  */
 
 /**
- * @brief Q7 vector subtraction.
- * @param[in]       *pSrcA points to the first input vector
- * @param[in]       *pSrcB points to the second input vector
- * @param[out]      *pDst points to the output vector
- * @param[in]       blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
+  @brief         Q7 vector subtraction.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
  */
 
 void arm_sub_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  q7_t * pDst,
-  uint32_t blockSize)
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        q7_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = A - B */
-    /* Subtract and then store the results in the destination buffer 4 samples at a time. */
-    *__SIMD32(pDst)++ = __QSUB8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
 
-    /* Decrement the loop counter */
+#if defined (ARM_MATH_DSP)
+    /* Subtract and store result in destination buffer (4 samples at a time). */
+    write_q7x4_ia (&pDst, __QSUB8(read_q7x4_ia ((q7_t **) &pSrcA), read_q7x4_ia ((q7_t **) &pSrcB)));
+#else
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
+#endif
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    /* C = A - B */
-    /* Subtract and then store the result in the destination buffer. */
-    *pDst++ = __SSAT(*pSrcA++ - *pSrcB++, 8);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     /* C = A - B */
-    /* Subtract and then store the result in the destination buffer. */
-    *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ - *pSrcB++, 8);
 
-    /* Decrement the loop counter */
+    /* Subtract and store result in destination buffer. */
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
-
 }
 
 /**
- * @} end of BasicSub group
+  @} end of BasicSub group
  */
diff --git a/DSP/Source/CMakeLists.txt b/DSP/Source/CMakeLists.txt
new file mode 100644
index 0000000..f5c58a7
--- /dev/null
+++ b/DSP/Source/CMakeLists.txt
@@ -0,0 +1,223 @@
+cmake_minimum_required (VERSION 3.6)
+
+project(CMSISDSP)
+
+# Needed to find the config modules
+list(APPEND CMAKE_MODULE_PATH ${CMAKE_CURRENT_SOURCE_DIR}/..)
+
+# Select which parts of the CMSIS-DSP must be compiled.
+# There are some dependencies between the parts but they are not tracked
+# by this cmake. So, enabling some functions may require to enable some
+# other ones.
+option(BASICMATH            "Basic Math Functions"              ON)
+option(COMPLEXMATH          "Complex Math Functions"            ON)
+option(CONTROLLER           "Controller Functions"              ON)
+option(FASTMATH             "Fast Math Functions"               ON)
+option(FILTERING            "Filtering Functions"               ON)
+option(MATRIX               "Matrix Functions"                  ON)
+option(STATISTICS           "Statistics Functions"              ON)
+option(SUPPORT              "Support Functions"                 ON)
+option(TRANSFORM            "Transform Functions"               ON)
+
+# When OFF it is the default behavior : all tables are included.
+option(CONFIGTABLE          "Configuration of table allowed"    OFF)
+
+# When CONFIGTABLE is ON, select if all interpolation tables must be included
+option(ALLFAST              "All interpolation tables included" OFF)
+# When CONFIGTABLE is ON, select if all FFT tables must be included
+option(ALLFFT               "All fft tables included"           OFF)
+
+# Features which require inclusion of a data table.
+# Since some tables may be big, the corresponding feature can be
+# disabled.
+# Those options are taken into account only when CONFIGTABLE is ON
+option(ARM_COS_F32          "cos f32"                           OFF)
+option(ARM_COS_Q31          "cos q31"                           OFF)
+option(ARM_COS_Q15          "cos q15"                           OFF)
+option(ARM_SIN_F32          "sin f32"                           OFF)
+option(ARM_SIN_Q31          "sin q31"                           OFF)
+option(ARM_SIN_Q15          "sin q15"                           OFF)
+option(ARM_SIN_COS_F32      "sin cos f32"                       OFF)
+option(ARM_SIN_COS_Q31      "sin cos q31"                       OFF)
+             
+option(ARM_LMS_NORM_Q31     "lms norm q31"                      OFF)
+option(ARM_LMS_NORM_Q15     "lms norm q15"                      OFF)
+             
+option(CFFT_F32_16          "cfft f32 16"                       OFF)
+option(CFFT_F32_32          "cfft f32 32"                       OFF)
+option(CFFT_F32_64          "cfft f32 64"                       OFF)
+option(CFFT_F32_128         "cfft f32 128"                      OFF)
+option(CFFT_F32_256         "cfft f32 256"                      OFF)
+option(CFFT_F32_512         "cfft f32 512"                      OFF)
+option(CFFT_F32_1024        "cfft f32 1024"                     OFF)
+option(CFFT_F32_2048        "cfft f32 2048"                     OFF)
+option(CFFT_F32_4096        "cfft f32 4096"                     OFF)
+                  
+option(CFFT_Q31_16          "cfft q31 16"                       OFF)
+option(CFFT_Q31_32          "cfft q31 32"                       OFF)
+option(CFFT_Q31_64          "cfft q31 64"                       OFF)
+option(CFFT_Q31_128         "cfft q31 128"                      OFF)
+option(CFFT_Q31_256         "cfft q31 256"                      OFF)
+option(CFFT_Q31_512         "cfft q31 512"                      OFF)
+option(CFFT_Q31_1024        "cfft q31 1024"                     OFF)
+option(CFFT_Q31_2048        "cfft q31 2048"                     OFF)
+option(CFFT_Q31_4096        "cfft q31 4096"                     OFF)
+                  
+option(CFFT_Q15_16          "cfft q15 16"                       OFF)
+option(CFFT_Q15_32          "cfft q15 32"                       OFF)
+option(CFFT_Q15_64          "cfft q15 64"                       OFF)
+option(CFFT_Q15_128         "cfft q15 128"                      OFF)
+option(CFFT_Q15_256         "cfft q15 256"                      OFF)
+option(CFFT_Q15_512         "cfft q15 512"                      OFF)
+option(CFFT_Q15_1024        "cfft q15 1024"                     OFF)
+option(CFFT_Q15_2048        "cfft q15 2048"                     OFF)
+option(CFFT_Q15_4096        "cfft q15 4096"                     OFF)
+             
+option(RFFT_FAST_F32_32     "rfft fast f32 32"                  OFF)
+option(RFFT_FAST_F32_64     "rfft fast f32 64"                  OFF)
+option(RFFT_FAST_F32_128    "rfft fast f32 128"                 OFF)
+option(RFFT_FAST_F32_256    "rfft fast f32 256"                 OFF)
+option(RFFT_FAST_F32_512    "rfft fast f32 512"                 OFF)
+option(RFFT_FAST_F32_1024   "rfft fast f32 1024"                OFF)
+option(RFFT_FAST_F32_2048   "rfft fast f32 2048"                OFF)
+option(RFFT_FAST_F32_4096   "rfft fast f32 4096"                OFF)
+             
+             
+option(RFFT_F32_128         "rfft f32 128"                      OFF)
+option(RFFT_F32_512         "rfft f32 512"                      OFF)
+option(RFFT_F32_2048        "rfft f32 2048"                     OFF)
+option(RFFT_F32_8192        "rfft f32 8192"                     OFF)
+             
+option(RFFT_Q31_32          "rfft q31 32"                       OFF)
+option(RFFT_Q31_64          "rfft q31 64"                       OFF)
+option(RFFT_Q31_128         "rfft q31 128"                      OFF)
+option(RFFT_Q31_256         "rfft q31 256"                      OFF)
+option(RFFT_Q31_512         "rfft q31 512"                      OFF)
+option(RFFT_Q31_1024        "rfft q31 1024"                     OFF)
+option(RFFT_Q31_2048        "rfft q31 2048"                     OFF)
+option(RFFT_Q31_4096        "rfft q31 4096"                     OFF)
+option(RFFT_Q31_8192        "rfft q31 8192"                     OFF)
+             
+option(RFFT_Q15_32          "rfft q15 32"                       OFF)
+option(RFFT_Q15_64          "rfft q15 64"                       OFF)
+option(RFFT_Q15_128         "rfft q15 128"                      OFF)
+option(RFFT_Q15_256         "rfft q15 256"                      OFF)
+option(RFFT_Q15_512         "rfft q15 512"                      OFF)
+option(RFFT_Q15_1024        "rfft q15 1024"                     OFF)
+option(RFFT_Q15_2048        "rfft q15 2048"                     OFF)
+option(RFFT_Q15_4096        "rfft q15 4096"                     OFF)
+option(RFFT_Q15_8192        "rfft q15 8192"                     OFF)
+             
+option(DCT4_F32_128          "dct4 f32 128"                     OFF)
+option(DCT4_F32_512          "dct4 f32 512"                     OFF)
+option(DCT4_F32_2048         "dct4 f32 2048"                    OFF)
+option(DCT4_F32_8192         "dct4 f32 8192"                    OFF)
+             
+option(DCT4_Q31_128          "dct4 q31 128"                     OFF)
+option(DCT4_Q31_512          "dct4 q31 512"                     OFF)
+option(DCT4_Q31_2048         "dct4 q31 2048"                    OFF)
+option(DCT4_Q31_8192         "dct4 q31 8192"                    OFF)
+             
+option(DCT4_Q15_128          "dct4 q15 128"                     OFF)
+option(DCT4_Q15_512          "dct4 q15 512"                     OFF)
+option(DCT4_Q15_2048         "dct4 q15 2048"                    OFF)
+option(DCT4_Q15_8192         "dct4 q15 8192"                    OFF)
+
+
+###########################
+#
+# CMSIS DSP
+#
+###########################
+
+# DSP Sources
+SET(DSP ".")
+
+add_library(CMSISDSP INTERFACE)
+
+include(config)
+
+
+if (BASICMATH)
+  add_subdirectory(BasicMathFunctions)
+  target_link_libraries(CMSISDSP INTERFACE CMSISDSPBasicMath)
+endif()
+
+if (COMPLEXMATH)
+  add_subdirectory(ComplexMathFunctions)
+  target_link_libraries(CMSISDSP INTERFACE CMSISDSPComplexMath)
+endif()
+
+if (CONTROLLER)
+  add_subdirectory(ControllerFunctions)
+  # Fast tables inclusion is allowed
+  if (CONFIGTABLE)
+    target_compile_definitions(CMSISDSPController PUBLIC ARM_FAST_ALLOW_TABLES) 
+  endif()
+  target_link_libraries(CMSISDSP INTERFACE CMSISDSPController)
+endif()
+
+if (FASTMATH)
+  add_subdirectory(FastMathFunctions)
+  # Fast tables inclusion is allowed
+  if (CONFIGTABLE)
+    target_compile_definitions(CMSISDSPFastMath PUBLIC ARM_FAST_ALLOW_TABLES) 
+  endif()
+  target_link_libraries(CMSISDSP INTERFACE CMSISDSPFastMath)
+endif()
+
+if (FILTERING)
+  add_subdirectory(FilteringFunctions)
+  # Fast tables inclusion is allowed
+  if (CONFIGTABLE)
+    target_compile_definitions(CMSISDSPFiltering PUBLIC ARM_FAST_ALLOW_TABLES)
+  endif() 
+  target_link_libraries(CMSISDSP INTERFACE CMSISDSPFiltering)
+endif()
+
+if (MATRIX)
+  add_subdirectory(MatrixFunctions)
+  target_link_libraries(CMSISDSP INTERFACE CMSISDSPMatrix)
+endif()
+
+if (STATISTICS)
+  add_subdirectory(StatisticsFunctions)
+  target_link_libraries(CMSISDSP INTERFACE CMSISDSPStatistics)
+endif()
+
+if (SUPPORT)
+  add_subdirectory(SupportFunctions)
+  target_link_libraries(CMSISDSP INTERFACE CMSISDSPSupport)
+endif()
+
+if (TRANSFORM)
+  add_subdirectory(TransformFunctions)
+  # FFT tables inclusion is allowed
+  if (CONFIGTABLE)
+    target_compile_definitions(CMSISDSPTransform PUBLIC ARM_FFT_ALLOW_TABLES)
+  endif()
+  target_link_libraries(CMSISDSP INTERFACE CMSISDSPTransform)
+endif()
+
+if (FILTERING OR CONTROLLER OR FASTMATH OR TRANSFORM)
+  add_subdirectory(CommonTables)
+  if (TRANSFORM)
+    # FFT tables inclusion is allowed
+    if (CONFIGTABLE)
+      target_compile_definitions(CMSISDSPCommon PUBLIC ARM_FFT_ALLOW_TABLES) 
+    endif()
+  endif()
+  if (FILTERING OR CONTROLLER OR FASTMATH)
+    # Select which tables to include
+    if (CONFIGTABLE)
+      target_compile_definitions(CMSISDSPCommon PUBLIC ARM_FAST_ALLOW_TABLES) 
+    endif()
+  endif()
+  target_link_libraries(CMSISDSP INTERFACE CMSISDSPCommon)
+endif()
+
+### Includes
+target_include_directories(CMSISDSP INTERFACE "${DSP}/../Include")
+
+
+
diff --git a/DSP/Source/CommonTables/CMakeLists.txt b/DSP/Source/CommonTables/CMakeLists.txt
new file mode 100644
index 0000000..7bdad93
--- /dev/null
+++ b/DSP/Source/CommonTables/CMakeLists.txt
@@ -0,0 +1,31 @@
+cmake_minimum_required (VERSION 3.6)
+
+project(CMSISDSPCommon)
+
+
+
+add_library(CMSISDSPCommon STATIC arm_common_tables.c)
+
+if (CONFIGTABLE AND ALLFFT)
+    target_compile_definitions(CMSISDSPCommon PUBLIC ARM_ALL_FFT_TABLES) 
+endif()
+
+if (CONFIGTABLE AND ALLFAST)
+    target_compile_definitions(CMSISDSPCommon PUBLIC ARM_ALL_FAST_TABLES) 
+endif()
+
+include(fft)
+fft(CMSISDSPCommon)
+
+include(interpol)
+interpol(CMSISDSPCommon)
+
+target_sources(CMSISDSPCommon PRIVATE arm_const_structs.c)
+
+configdsp(CMSISDSPCommon ..)
+
+### Includes
+target_include_directories(CMSISDSPCommon PUBLIC "${DSP}/../../Include")
+
+
+
diff --git a/DSP/Source/CommonTables/CommonTables.c b/DSP/Source/CommonTables/CommonTables.c
new file mode 100644
index 0000000..acda9f8
--- /dev/null
+++ b/DSP/Source/CommonTables/CommonTables.c
@@ -0,0 +1,31 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        CommonTables.c
+ * Description:  Combination of all common table source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_common_tables.c"
+#include "arm_const_structs.c"
+
diff --git a/DSP/Source/CommonTables/arm_common_tables.c b/DSP/Source/CommonTables/arm_common_tables.c
index 1f8f589..4b49b34 100644
--- a/DSP/Source/CommonTables/arm_common_tables.c
+++ b/DSP/Source/CommonTables/arm_common_tables.c
@@ -3,13 +3,13 @@
  * Title:        arm_common_tables.c
  * Description:  common tables like fft twiddle factors, Bitreverse, reciprocal etc
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,165 +30,167 @@
 #include "arm_common_tables.h"
 
 /**
- * @ingroup ComplexFFT
+  @ingroup ComplexFFT
  */
 
 /**
- * @addtogroup CFFT_CIFFT Complex FFT Tables
- * @{
+  @addtogroup CFFT_CIFFT Complex FFT Tables
+  @{
  */
 
 /**
-* \par
-* Pseudo code for Generation of Bit reversal Table is
-* \par
-* <pre>for(l=1;l <= N/4;l++)
-* {
-*   for(i=0;i<logN2;i++)
-*   {
-*     a[i]=l&(1<<i);
-*   }
-*   for(j=0; j<logN2; j++)
-*   {
-*     if (a[j]!=0)
-*     y[l]+=(1<<((logN2-1)-j));
-*   }
-*   y[l] = y[l] >> 1;
-*  } </pre>
-* \par
-* where N = 4096	logN2 = 12
-* \par
-* N is the maximum FFT Size supported
+  @par
+  Pseudo code for Generation of Bit reversal Table is
+  @par
+  <pre>for (l = 1; l <= N/4; l++)
+  {
+    for (i = 0; i< logN2; i++)
+    {
+      a[i] = l & (1 << i);
+    }
+    for (j = 0; j < logN2; j++)
+    {
+      if (a[j] != 0)
+      y[l] += (1 << ((logN2 - 1) - j));
+    }
+    y[l] = y[l] >> 1;
+   } </pre>
+  @par
+  where N = 4096, logN2 = 12
+  @par
+  N is the maximum FFT Size supported
 */
 
-/*
-* @brief  Table for bit reversal process
+/**
+  @brief  Table for bit reversal process
 */
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024)
 const uint16_t armBitRevTable[1024] = {
-   0x400, 0x200, 0x600, 0x100, 0x500, 0x300, 0x700, 0x80, 0x480, 0x280,
-   0x680, 0x180, 0x580, 0x380, 0x780, 0x40, 0x440, 0x240, 0x640, 0x140,
-   0x540, 0x340, 0x740, 0xc0, 0x4c0, 0x2c0, 0x6c0, 0x1c0, 0x5c0, 0x3c0,
-   0x7c0, 0x20, 0x420, 0x220, 0x620, 0x120, 0x520, 0x320, 0x720, 0xa0,
-   0x4a0, 0x2a0, 0x6a0, 0x1a0, 0x5a0, 0x3a0, 0x7a0, 0x60, 0x460, 0x260,
-   0x660, 0x160, 0x560, 0x360, 0x760, 0xe0, 0x4e0, 0x2e0, 0x6e0, 0x1e0,
-   0x5e0, 0x3e0, 0x7e0, 0x10, 0x410, 0x210, 0x610, 0x110, 0x510, 0x310,
-   0x710, 0x90, 0x490, 0x290, 0x690, 0x190, 0x590, 0x390, 0x790, 0x50,
-   0x450, 0x250, 0x650, 0x150, 0x550, 0x350, 0x750, 0xd0, 0x4d0, 0x2d0,
-   0x6d0, 0x1d0, 0x5d0, 0x3d0, 0x7d0, 0x30, 0x430, 0x230, 0x630, 0x130,
-   0x530, 0x330, 0x730, 0xb0, 0x4b0, 0x2b0, 0x6b0, 0x1b0, 0x5b0, 0x3b0,
-   0x7b0, 0x70, 0x470, 0x270, 0x670, 0x170, 0x570, 0x370, 0x770, 0xf0,
-   0x4f0, 0x2f0, 0x6f0, 0x1f0, 0x5f0, 0x3f0, 0x7f0, 0x8, 0x408, 0x208,
-   0x608, 0x108, 0x508, 0x308, 0x708, 0x88, 0x488, 0x288, 0x688, 0x188,
-   0x588, 0x388, 0x788, 0x48, 0x448, 0x248, 0x648, 0x148, 0x548, 0x348,
-   0x748, 0xc8, 0x4c8, 0x2c8, 0x6c8, 0x1c8, 0x5c8, 0x3c8, 0x7c8, 0x28,
-   0x428, 0x228, 0x628, 0x128, 0x528, 0x328, 0x728, 0xa8, 0x4a8, 0x2a8,
-   0x6a8, 0x1a8, 0x5a8, 0x3a8, 0x7a8, 0x68, 0x468, 0x268, 0x668, 0x168,
-   0x568, 0x368, 0x768, 0xe8, 0x4e8, 0x2e8, 0x6e8, 0x1e8, 0x5e8, 0x3e8,
-   0x7e8, 0x18, 0x418, 0x218, 0x618, 0x118, 0x518, 0x318, 0x718, 0x98,
-   0x498, 0x298, 0x698, 0x198, 0x598, 0x398, 0x798, 0x58, 0x458, 0x258,
-   0x658, 0x158, 0x558, 0x358, 0x758, 0xd8, 0x4d8, 0x2d8, 0x6d8, 0x1d8,
-   0x5d8, 0x3d8, 0x7d8, 0x38, 0x438, 0x238, 0x638, 0x138, 0x538, 0x338,
-   0x738, 0xb8, 0x4b8, 0x2b8, 0x6b8, 0x1b8, 0x5b8, 0x3b8, 0x7b8, 0x78,
-   0x478, 0x278, 0x678, 0x178, 0x578, 0x378, 0x778, 0xf8, 0x4f8, 0x2f8,
-   0x6f8, 0x1f8, 0x5f8, 0x3f8, 0x7f8, 0x4, 0x404, 0x204, 0x604, 0x104,
-   0x504, 0x304, 0x704, 0x84, 0x484, 0x284, 0x684, 0x184, 0x584, 0x384,
-   0x784, 0x44, 0x444, 0x244, 0x644, 0x144, 0x544, 0x344, 0x744, 0xc4,
-   0x4c4, 0x2c4, 0x6c4, 0x1c4, 0x5c4, 0x3c4, 0x7c4, 0x24, 0x424, 0x224,
-   0x624, 0x124, 0x524, 0x324, 0x724, 0xa4, 0x4a4, 0x2a4, 0x6a4, 0x1a4,
-   0x5a4, 0x3a4, 0x7a4, 0x64, 0x464, 0x264, 0x664, 0x164, 0x564, 0x364,
-   0x764, 0xe4, 0x4e4, 0x2e4, 0x6e4, 0x1e4, 0x5e4, 0x3e4, 0x7e4, 0x14,
-   0x414, 0x214, 0x614, 0x114, 0x514, 0x314, 0x714, 0x94, 0x494, 0x294,
-   0x694, 0x194, 0x594, 0x394, 0x794, 0x54, 0x454, 0x254, 0x654, 0x154,
-   0x554, 0x354, 0x754, 0xd4, 0x4d4, 0x2d4, 0x6d4, 0x1d4, 0x5d4, 0x3d4,
-   0x7d4, 0x34, 0x434, 0x234, 0x634, 0x134, 0x534, 0x334, 0x734, 0xb4,
-   0x4b4, 0x2b4, 0x6b4, 0x1b4, 0x5b4, 0x3b4, 0x7b4, 0x74, 0x474, 0x274,
-   0x674, 0x174, 0x574, 0x374, 0x774, 0xf4, 0x4f4, 0x2f4, 0x6f4, 0x1f4,
-   0x5f4, 0x3f4, 0x7f4, 0xc, 0x40c, 0x20c, 0x60c, 0x10c, 0x50c, 0x30c,
-   0x70c, 0x8c, 0x48c, 0x28c, 0x68c, 0x18c, 0x58c, 0x38c, 0x78c, 0x4c,
-   0x44c, 0x24c, 0x64c, 0x14c, 0x54c, 0x34c, 0x74c, 0xcc, 0x4cc, 0x2cc,
-   0x6cc, 0x1cc, 0x5cc, 0x3cc, 0x7cc, 0x2c, 0x42c, 0x22c, 0x62c, 0x12c,
-   0x52c, 0x32c, 0x72c, 0xac, 0x4ac, 0x2ac, 0x6ac, 0x1ac, 0x5ac, 0x3ac,
-   0x7ac, 0x6c, 0x46c, 0x26c, 0x66c, 0x16c, 0x56c, 0x36c, 0x76c, 0xec,
-   0x4ec, 0x2ec, 0x6ec, 0x1ec, 0x5ec, 0x3ec, 0x7ec, 0x1c, 0x41c, 0x21c,
-   0x61c, 0x11c, 0x51c, 0x31c, 0x71c, 0x9c, 0x49c, 0x29c, 0x69c, 0x19c,
-   0x59c, 0x39c, 0x79c, 0x5c, 0x45c, 0x25c, 0x65c, 0x15c, 0x55c, 0x35c,
-   0x75c, 0xdc, 0x4dc, 0x2dc, 0x6dc, 0x1dc, 0x5dc, 0x3dc, 0x7dc, 0x3c,
-   0x43c, 0x23c, 0x63c, 0x13c, 0x53c, 0x33c, 0x73c, 0xbc, 0x4bc, 0x2bc,
-   0x6bc, 0x1bc, 0x5bc, 0x3bc, 0x7bc, 0x7c, 0x47c, 0x27c, 0x67c, 0x17c,
-   0x57c, 0x37c, 0x77c, 0xfc, 0x4fc, 0x2fc, 0x6fc, 0x1fc, 0x5fc, 0x3fc,
-   0x7fc, 0x2, 0x402, 0x202, 0x602, 0x102, 0x502, 0x302, 0x702, 0x82,
-   0x482, 0x282, 0x682, 0x182, 0x582, 0x382, 0x782, 0x42, 0x442, 0x242,
-   0x642, 0x142, 0x542, 0x342, 0x742, 0xc2, 0x4c2, 0x2c2, 0x6c2, 0x1c2,
-   0x5c2, 0x3c2, 0x7c2, 0x22, 0x422, 0x222, 0x622, 0x122, 0x522, 0x322,
-   0x722, 0xa2, 0x4a2, 0x2a2, 0x6a2, 0x1a2, 0x5a2, 0x3a2, 0x7a2, 0x62,
-   0x462, 0x262, 0x662, 0x162, 0x562, 0x362, 0x762, 0xe2, 0x4e2, 0x2e2,
-   0x6e2, 0x1e2, 0x5e2, 0x3e2, 0x7e2, 0x12, 0x412, 0x212, 0x612, 0x112,
-   0x512, 0x312, 0x712, 0x92, 0x492, 0x292, 0x692, 0x192, 0x592, 0x392,
-   0x792, 0x52, 0x452, 0x252, 0x652, 0x152, 0x552, 0x352, 0x752, 0xd2,
-   0x4d2, 0x2d2, 0x6d2, 0x1d2, 0x5d2, 0x3d2, 0x7d2, 0x32, 0x432, 0x232,
-   0x632, 0x132, 0x532, 0x332, 0x732, 0xb2, 0x4b2, 0x2b2, 0x6b2, 0x1b2,
-   0x5b2, 0x3b2, 0x7b2, 0x72, 0x472, 0x272, 0x672, 0x172, 0x572, 0x372,
-   0x772, 0xf2, 0x4f2, 0x2f2, 0x6f2, 0x1f2, 0x5f2, 0x3f2, 0x7f2, 0xa,
-   0x40a, 0x20a, 0x60a, 0x10a, 0x50a, 0x30a, 0x70a, 0x8a, 0x48a, 0x28a,
-   0x68a, 0x18a, 0x58a, 0x38a, 0x78a, 0x4a, 0x44a, 0x24a, 0x64a, 0x14a,
-   0x54a, 0x34a, 0x74a, 0xca, 0x4ca, 0x2ca, 0x6ca, 0x1ca, 0x5ca, 0x3ca,
-   0x7ca, 0x2a, 0x42a, 0x22a, 0x62a, 0x12a, 0x52a, 0x32a, 0x72a, 0xaa,
-   0x4aa, 0x2aa, 0x6aa, 0x1aa, 0x5aa, 0x3aa, 0x7aa, 0x6a, 0x46a, 0x26a,
-   0x66a, 0x16a, 0x56a, 0x36a, 0x76a, 0xea, 0x4ea, 0x2ea, 0x6ea, 0x1ea,
-   0x5ea, 0x3ea, 0x7ea, 0x1a, 0x41a, 0x21a, 0x61a, 0x11a, 0x51a, 0x31a,
-   0x71a, 0x9a, 0x49a, 0x29a, 0x69a, 0x19a, 0x59a, 0x39a, 0x79a, 0x5a,
-   0x45a, 0x25a, 0x65a, 0x15a, 0x55a, 0x35a, 0x75a, 0xda, 0x4da, 0x2da,
-   0x6da, 0x1da, 0x5da, 0x3da, 0x7da, 0x3a, 0x43a, 0x23a, 0x63a, 0x13a,
-   0x53a, 0x33a, 0x73a, 0xba, 0x4ba, 0x2ba, 0x6ba, 0x1ba, 0x5ba, 0x3ba,
-   0x7ba, 0x7a, 0x47a, 0x27a, 0x67a, 0x17a, 0x57a, 0x37a, 0x77a, 0xfa,
-   0x4fa, 0x2fa, 0x6fa, 0x1fa, 0x5fa, 0x3fa, 0x7fa, 0x6, 0x406, 0x206,
-   0x606, 0x106, 0x506, 0x306, 0x706, 0x86, 0x486, 0x286, 0x686, 0x186,
-   0x586, 0x386, 0x786, 0x46, 0x446, 0x246, 0x646, 0x146, 0x546, 0x346,
-   0x746, 0xc6, 0x4c6, 0x2c6, 0x6c6, 0x1c6, 0x5c6, 0x3c6, 0x7c6, 0x26,
-   0x426, 0x226, 0x626, 0x126, 0x526, 0x326, 0x726, 0xa6, 0x4a6, 0x2a6,
-   0x6a6, 0x1a6, 0x5a6, 0x3a6, 0x7a6, 0x66, 0x466, 0x266, 0x666, 0x166,
-   0x566, 0x366, 0x766, 0xe6, 0x4e6, 0x2e6, 0x6e6, 0x1e6, 0x5e6, 0x3e6,
-   0x7e6, 0x16, 0x416, 0x216, 0x616, 0x116, 0x516, 0x316, 0x716, 0x96,
-   0x496, 0x296, 0x696, 0x196, 0x596, 0x396, 0x796, 0x56, 0x456, 0x256,
-   0x656, 0x156, 0x556, 0x356, 0x756, 0xd6, 0x4d6, 0x2d6, 0x6d6, 0x1d6,
-   0x5d6, 0x3d6, 0x7d6, 0x36, 0x436, 0x236, 0x636, 0x136, 0x536, 0x336,
-   0x736, 0xb6, 0x4b6, 0x2b6, 0x6b6, 0x1b6, 0x5b6, 0x3b6, 0x7b6, 0x76,
-   0x476, 0x276, 0x676, 0x176, 0x576, 0x376, 0x776, 0xf6, 0x4f6, 0x2f6,
-   0x6f6, 0x1f6, 0x5f6, 0x3f6, 0x7f6, 0xe, 0x40e, 0x20e, 0x60e, 0x10e,
-   0x50e, 0x30e, 0x70e, 0x8e, 0x48e, 0x28e, 0x68e, 0x18e, 0x58e, 0x38e,
-   0x78e, 0x4e, 0x44e, 0x24e, 0x64e, 0x14e, 0x54e, 0x34e, 0x74e, 0xce,
-   0x4ce, 0x2ce, 0x6ce, 0x1ce, 0x5ce, 0x3ce, 0x7ce, 0x2e, 0x42e, 0x22e,
-   0x62e, 0x12e, 0x52e, 0x32e, 0x72e, 0xae, 0x4ae, 0x2ae, 0x6ae, 0x1ae,
-   0x5ae, 0x3ae, 0x7ae, 0x6e, 0x46e, 0x26e, 0x66e, 0x16e, 0x56e, 0x36e,
-   0x76e, 0xee, 0x4ee, 0x2ee, 0x6ee, 0x1ee, 0x5ee, 0x3ee, 0x7ee, 0x1e,
-   0x41e, 0x21e, 0x61e, 0x11e, 0x51e, 0x31e, 0x71e, 0x9e, 0x49e, 0x29e,
-   0x69e, 0x19e, 0x59e, 0x39e, 0x79e, 0x5e, 0x45e, 0x25e, 0x65e, 0x15e,
-   0x55e, 0x35e, 0x75e, 0xde, 0x4de, 0x2de, 0x6de, 0x1de, 0x5de, 0x3de,
-   0x7de, 0x3e, 0x43e, 0x23e, 0x63e, 0x13e, 0x53e, 0x33e, 0x73e, 0xbe,
-   0x4be, 0x2be, 0x6be, 0x1be, 0x5be, 0x3be, 0x7be, 0x7e, 0x47e, 0x27e,
-   0x67e, 0x17e, 0x57e, 0x37e, 0x77e, 0xfe, 0x4fe, 0x2fe, 0x6fe, 0x1fe,
-   0x5fe, 0x3fe, 0x7fe, 0x1
+   0x400, 0x200, 0x600, 0x100, 0x500, 0x300, 0x700, 0x080, 0x480, 0x280,
+   0x680, 0x180, 0x580, 0x380, 0x780, 0x040, 0x440, 0x240, 0x640, 0x140,
+   0x540, 0x340, 0x740, 0x0c0, 0x4c0, 0x2c0, 0x6c0, 0x1c0, 0x5c0, 0x3c0,
+   0x7c0, 0x020, 0x420, 0x220, 0x620, 0x120, 0x520, 0x320, 0x720, 0x0a0,
+   0x4a0, 0x2a0, 0x6a0, 0x1a0, 0x5a0, 0x3a0, 0x7a0, 0x060, 0x460, 0x260,
+   0x660, 0x160, 0x560, 0x360, 0x760, 0x0e0, 0x4e0, 0x2e0, 0x6e0, 0x1e0,
+   0x5e0, 0x3e0, 0x7e0, 0x010, 0x410, 0x210, 0x610, 0x110, 0x510, 0x310,
+   0x710, 0x090, 0x490, 0x290, 0x690, 0x190, 0x590, 0x390, 0x790, 0x050,
+   0x450, 0x250, 0x650, 0x150, 0x550, 0x350, 0x750, 0x0d0, 0x4d0, 0x2d0,
+   0x6d0, 0x1d0, 0x5d0, 0x3d0, 0x7d0, 0x030, 0x430, 0x230, 0x630, 0x130,
+   0x530, 0x330, 0x730, 0x0b0, 0x4b0, 0x2b0, 0x6b0, 0x1b0, 0x5b0, 0x3b0,
+   0x7b0, 0x070, 0x470, 0x270, 0x670, 0x170, 0x570, 0x370, 0x770, 0x0f0,
+   0x4f0, 0x2f0, 0x6f0, 0x1f0, 0x5f0, 0x3f0, 0x7f0, 0x008, 0x408, 0x208,
+   0x608, 0x108, 0x508, 0x308, 0x708, 0x088, 0x488, 0x288, 0x688, 0x188,
+   0x588, 0x388, 0x788, 0x048, 0x448, 0x248, 0x648, 0x148, 0x548, 0x348,
+   0x748, 0x0c8, 0x4c8, 0x2c8, 0x6c8, 0x1c8, 0x5c8, 0x3c8, 0x7c8, 0x028,
+   0x428, 0x228, 0x628, 0x128, 0x528, 0x328, 0x728, 0x0a8, 0x4a8, 0x2a8,
+   0x6a8, 0x1a8, 0x5a8, 0x3a8, 0x7a8, 0x068, 0x468, 0x268, 0x668, 0x168,
+   0x568, 0x368, 0x768, 0x0e8, 0x4e8, 0x2e8, 0x6e8, 0x1e8, 0x5e8, 0x3e8,
+   0x7e8, 0x018, 0x418, 0x218, 0x618, 0x118, 0x518, 0x318, 0x718, 0x098,
+   0x498, 0x298, 0x698, 0x198, 0x598, 0x398, 0x798, 0x058, 0x458, 0x258,
+   0x658, 0x158, 0x558, 0x358, 0x758, 0x0d8, 0x4d8, 0x2d8, 0x6d8, 0x1d8,
+   0x5d8, 0x3d8, 0x7d8, 0x038, 0x438, 0x238, 0x638, 0x138, 0x538, 0x338,
+   0x738, 0x0b8, 0x4b8, 0x2b8, 0x6b8, 0x1b8, 0x5b8, 0x3b8, 0x7b8, 0x078,
+   0x478, 0x278, 0x678, 0x178, 0x578, 0x378, 0x778, 0x0f8, 0x4f8, 0x2f8,
+   0x6f8, 0x1f8, 0x5f8, 0x3f8, 0x7f8, 0x004, 0x404, 0x204, 0x604, 0x104,
+   0x504, 0x304, 0x704, 0x084, 0x484, 0x284, 0x684, 0x184, 0x584, 0x384,
+   0x784, 0x044, 0x444, 0x244, 0x644, 0x144, 0x544, 0x344, 0x744, 0x0c4,
+   0x4c4, 0x2c4, 0x6c4, 0x1c4, 0x5c4, 0x3c4, 0x7c4, 0x024, 0x424, 0x224,
+   0x624, 0x124, 0x524, 0x324, 0x724, 0x0a4, 0x4a4, 0x2a4, 0x6a4, 0x1a4,
+   0x5a4, 0x3a4, 0x7a4, 0x064, 0x464, 0x264, 0x664, 0x164, 0x564, 0x364,
+   0x764, 0x0e4, 0x4e4, 0x2e4, 0x6e4, 0x1e4, 0x5e4, 0x3e4, 0x7e4, 0x014,
+   0x414, 0x214, 0x614, 0x114, 0x514, 0x314, 0x714, 0x094, 0x494, 0x294,
+   0x694, 0x194, 0x594, 0x394, 0x794, 0x054, 0x454, 0x254, 0x654, 0x154,
+   0x554, 0x354, 0x754, 0x0d4, 0x4d4, 0x2d4, 0x6d4, 0x1d4, 0x5d4, 0x3d4,
+   0x7d4, 0x034, 0x434, 0x234, 0x634, 0x134, 0x534, 0x334, 0x734, 0x0b4,
+   0x4b4, 0x2b4, 0x6b4, 0x1b4, 0x5b4, 0x3b4, 0x7b4, 0x074, 0x474, 0x274,
+   0x674, 0x174, 0x574, 0x374, 0x774, 0x0f4, 0x4f4, 0x2f4, 0x6f4, 0x1f4,
+   0x5f4, 0x3f4, 0x7f4, 0x00c, 0x40c, 0x20c, 0x60c, 0x10c, 0x50c, 0x30c,
+   0x70c, 0x08c, 0x48c, 0x28c, 0x68c, 0x18c, 0x58c, 0x38c, 0x78c, 0x04c,
+   0x44c, 0x24c, 0x64c, 0x14c, 0x54c, 0x34c, 0x74c, 0x0cc, 0x4cc, 0x2cc,
+   0x6cc, 0x1cc, 0x5cc, 0x3cc, 0x7cc, 0x02c, 0x42c, 0x22c, 0x62c, 0x12c,
+   0x52c, 0x32c, 0x72c, 0x0ac, 0x4ac, 0x2ac, 0x6ac, 0x1ac, 0x5ac, 0x3ac,
+   0x7ac, 0x06c, 0x46c, 0x26c, 0x66c, 0x16c, 0x56c, 0x36c, 0x76c, 0x0ec,
+   0x4ec, 0x2ec, 0x6ec, 0x1ec, 0x5ec, 0x3ec, 0x7ec, 0x01c, 0x41c, 0x21c,
+   0x61c, 0x11c, 0x51c, 0x31c, 0x71c, 0x09c, 0x49c, 0x29c, 0x69c, 0x19c,
+   0x59c, 0x39c, 0x79c, 0x05c, 0x45c, 0x25c, 0x65c, 0x15c, 0x55c, 0x35c,
+   0x75c, 0x0dc, 0x4dc, 0x2dc, 0x6dc, 0x1dc, 0x5dc, 0x3dc, 0x7dc, 0x03c,
+   0x43c, 0x23c, 0x63c, 0x13c, 0x53c, 0x33c, 0x73c, 0x0bc, 0x4bc, 0x2bc,
+   0x6bc, 0x1bc, 0x5bc, 0x3bc, 0x7bc, 0x07c, 0x47c, 0x27c, 0x67c, 0x17c,
+   0x57c, 0x37c, 0x77c, 0x0fc, 0x4fc, 0x2fc, 0x6fc, 0x1fc, 0x5fc, 0x3fc,
+   0x7fc, 0x002, 0x402, 0x202, 0x602, 0x102, 0x502, 0x302, 0x702, 0x082,
+   0x482, 0x282, 0x682, 0x182, 0x582, 0x382, 0x782, 0x042, 0x442, 0x242,
+   0x642, 0x142, 0x542, 0x342, 0x742, 0x0c2, 0x4c2, 0x2c2, 0x6c2, 0x1c2,
+   0x5c2, 0x3c2, 0x7c2, 0x022, 0x422, 0x222, 0x622, 0x122, 0x522, 0x322,
+   0x722, 0x0a2, 0x4a2, 0x2a2, 0x6a2, 0x1a2, 0x5a2, 0x3a2, 0x7a2, 0x062,
+   0x462, 0x262, 0x662, 0x162, 0x562, 0x362, 0x762, 0x0e2, 0x4e2, 0x2e2,
+   0x6e2, 0x1e2, 0x5e2, 0x3e2, 0x7e2, 0x012, 0x412, 0x212, 0x612, 0x112,
+   0x512, 0x312, 0x712, 0x092, 0x492, 0x292, 0x692, 0x192, 0x592, 0x392,
+   0x792, 0x052, 0x452, 0x252, 0x652, 0x152, 0x552, 0x352, 0x752, 0x0d2,
+   0x4d2, 0x2d2, 0x6d2, 0x1d2, 0x5d2, 0x3d2, 0x7d2, 0x032, 0x432, 0x232,
+   0x632, 0x132, 0x532, 0x332, 0x732, 0x0b2, 0x4b2, 0x2b2, 0x6b2, 0x1b2,
+   0x5b2, 0x3b2, 0x7b2, 0x072, 0x472, 0x272, 0x672, 0x172, 0x572, 0x372,
+   0x772, 0x0f2, 0x4f2, 0x2f2, 0x6f2, 0x1f2, 0x5f2, 0x3f2, 0x7f2, 0x00a,
+   0x40a, 0x20a, 0x60a, 0x10a, 0x50a, 0x30a, 0x70a, 0x08a, 0x48a, 0x28a,
+   0x68a, 0x18a, 0x58a, 0x38a, 0x78a, 0x04a, 0x44a, 0x24a, 0x64a, 0x14a,
+   0x54a, 0x34a, 0x74a, 0x0ca, 0x4ca, 0x2ca, 0x6ca, 0x1ca, 0x5ca, 0x3ca,
+   0x7ca, 0x02a, 0x42a, 0x22a, 0x62a, 0x12a, 0x52a, 0x32a, 0x72a, 0x0aa,
+   0x4aa, 0x2aa, 0x6aa, 0x1aa, 0x5aa, 0x3aa, 0x7aa, 0x06a, 0x46a, 0x26a,
+   0x66a, 0x16a, 0x56a, 0x36a, 0x76a, 0x0ea, 0x4ea, 0x2ea, 0x6ea, 0x1ea,
+   0x5ea, 0x3ea, 0x7ea, 0x01a, 0x41a, 0x21a, 0x61a, 0x11a, 0x51a, 0x31a,
+   0x71a, 0x09a, 0x49a, 0x29a, 0x69a, 0x19a, 0x59a, 0x39a, 0x79a, 0x5a,
+   0x45a, 0x25a, 0x65a, 0x15a, 0x55a, 0x35a, 0x75a, 0x0da, 0x4da, 0x2da,
+   0x6da, 0x1da, 0x5da, 0x3da, 0x7da, 0x03a, 0x43a, 0x23a, 0x63a, 0x13a,
+   0x53a, 0x33a, 0x73a, 0x0ba, 0x4ba, 0x2ba, 0x6ba, 0x1ba, 0x5ba, 0x3ba,
+   0x7ba, 0x07a, 0x47a, 0x27a, 0x67a, 0x17a, 0x57a, 0x37a, 0x77a, 0x0fa,
+   0x4fa, 0x2fa, 0x6fa, 0x1fa, 0x5fa, 0x3fa, 0x7fa, 0x006, 0x406, 0x206,
+   0x606, 0x106, 0x506, 0x306, 0x706, 0x086, 0x486, 0x286, 0x686, 0x186,
+   0x586, 0x386, 0x786, 0x046, 0x446, 0x246, 0x646, 0x146, 0x546, 0x346,
+   0x746, 0x0c6, 0x4c6, 0x2c6, 0x6c6, 0x1c6, 0x5c6, 0x3c6, 0x7c6, 0x026,
+   0x426, 0x226, 0x626, 0x126, 0x526, 0x326, 0x726, 0x0a6, 0x4a6, 0x2a6,
+   0x6a6, 0x1a6, 0x5a6, 0x3a6, 0x7a6, 0x066, 0x466, 0x266, 0x666, 0x166,
+   0x566, 0x366, 0x766, 0x0e6, 0x4e6, 0x2e6, 0x6e6, 0x1e6, 0x5e6, 0x3e6,
+   0x7e6, 0x016, 0x416, 0x216, 0x616, 0x116, 0x516, 0x316, 0x716, 0x096,
+   0x496, 0x296, 0x696, 0x196, 0x596, 0x396, 0x796, 0x056, 0x456, 0x256,
+   0x656, 0x156, 0x556, 0x356, 0x756, 0x0d6, 0x4d6, 0x2d6, 0x6d6, 0x1d6,
+   0x5d6, 0x3d6, 0x7d6, 0x036, 0x436, 0x236, 0x636, 0x136, 0x536, 0x336,
+   0x736, 0x0b6, 0x4b6, 0x2b6, 0x6b6, 0x1b6, 0x5b6, 0x3b6, 0x7b6, 0x076,
+   0x476, 0x276, 0x676, 0x176, 0x576, 0x376, 0x776, 0x0f6, 0x4f6, 0x2f6,
+   0x6f6, 0x1f6, 0x5f6, 0x3f6, 0x7f6, 0x00e, 0x40e, 0x20e, 0x60e, 0x10e,
+   0x50e, 0x30e, 0x70e, 0x08e, 0x48e, 0x28e, 0x68e, 0x18e, 0x58e, 0x38e,
+   0x78e, 0x04e, 0x44e, 0x24e, 0x64e, 0x14e, 0x54e, 0x34e, 0x74e, 0x0ce,
+   0x4ce, 0x2ce, 0x6ce, 0x1ce, 0x5ce, 0x3ce, 0x7ce, 0x02e, 0x42e, 0x22e,
+   0x62e, 0x12e, 0x52e, 0x32e, 0x72e, 0x0ae, 0x4ae, 0x2ae, 0x6ae, 0x1ae,
+   0x5ae, 0x3ae, 0x7ae, 0x06e, 0x46e, 0x26e, 0x66e, 0x16e, 0x56e, 0x36e,
+   0x76e, 0x0ee, 0x4ee, 0x2ee, 0x6ee, 0x1ee, 0x5ee, 0x3ee, 0x7ee, 0x01e,
+   0x41e, 0x21e, 0x61e, 0x11e, 0x51e, 0x31e, 0x71e, 0x09e, 0x49e, 0x29e,
+   0x69e, 0x19e, 0x59e, 0x39e, 0x79e, 0x05e, 0x45e, 0x25e, 0x65e, 0x15e,
+   0x55e, 0x35e, 0x75e, 0x0de, 0x4de, 0x2de, 0x6de, 0x1de, 0x5de, 0x3de,
+   0x7de, 0x03e, 0x43e, 0x23e, 0x63e, 0x13e, 0x53e, 0x33e, 0x73e, 0x0be,
+   0x4be, 0x2be, 0x6be, 0x1be, 0x5be, 0x3be, 0x7be, 0x07e, 0x47e, 0x27e,
+   0x67e, 0x17e, 0x57e, 0x37e, 0x77e, 0x0fe, 0x4fe, 0x2fe, 0x6fe, 0x1fe,
+   0x5fe, 0x3fe, 0x7fe, 0x001
 };
-
-
-/*
-* @brief  Floating-point Twiddle factors Table Generation
+#endif
+/**
+  @brief  Floating-point Twiddle factors Table Generation
 */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_16)
 /**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 16	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  <pre>for (i = 0; i < N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 16, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
 */
 const float32_t twiddleCoef_16[32] = {
     1.000000000f,  0.000000000f,
@@ -209,20 +211,23 @@
     0.923879533f, -0.382683432f
 };
 
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_32)
+
 /**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 32	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  <pre>for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 32, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
 */
 const float32_t twiddleCoef_32[64] = {
     1.000000000f,  0.000000000f,
@@ -259,20 +264,22 @@
     0.980785280f, -0.195090322f
 };
 
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_64)
 /**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 64	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  <pre>for(i = 0; i < N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 64, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
 */
 const float32_t twiddleCoef_64[128] = {
     1.000000000f,  0.000000000f,
@@ -341,22 +348,23 @@
     0.995184727f, -0.098017140f
 };
 
-/**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 128	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
-*/
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_128)
+/**
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  <pre>for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 128, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
 const float32_t twiddleCoef_128[256] = {
     1.000000000f,  0.000000000f,
     0.998795456f,  0.049067674f,
@@ -488,20 +496,22 @@
     0.998795456f, -0.049067674f
 };
 
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_256)
 /**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 256	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  <pre>for(i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 256, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
 */
 const float32_t twiddleCoef_256[512] = {
     1.000000000f,  0.000000000f,
@@ -762,20 +772,22 @@
     0.999698819f, -0.024541229f
 };
 
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_512)
 /**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 512	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  <pre>for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 512, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
 */
 const float32_t twiddleCoef_512[1024] = {
     1.000000000f,  0.000000000f,
@@ -1291,20 +1303,23 @@
     0.999698819f, -0.024541229f,
     0.999924702f, -0.012271538f
 };
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_1024)
 /**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 1024	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  <pre>for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 1024, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
 */
 const float32_t twiddleCoef_1024[2048] = {
     1.000000000f,  0.000000000f,
@@ -2333,20 +2348,22 @@
     0.999981175f, -0.006135885f
 };
 
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048)
 /**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 2048	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  <pre>for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 2048, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
 */
 const float32_t twiddleCoef_2048[4096] = {
     1.000000000f,  0.000000000f,
@@ -4399,20 +4416,22 @@
     0.999995294f, -0.003067957f
 };
 
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096)
 /**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 4096	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  <pre>for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 4096, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
 */
 const float32_t twiddleCoef_4096[8192] = {
     1.000000000f,  0.000000000f,
@@ -8513,29 +8532,30 @@
     0.999998823f, -0.001533980f
 };
 
-/*
-* @brief  Q31 Twiddle factors Table
-*/
-
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
 /**
-* \par
-* Example code for Q31 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 16	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to Q31(Fixed point 1.31):
-*	round(twiddleCoefQ31(i) * pow(2, 31))
-*
+  @brief  Q31 Twiddle factors Table
 */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_16)
+/**
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  <pre> for(i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 16, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ */
 const q31_t twiddleCoef_16_q31[24] = {
     (q31_t)0x7FFFFFFF, (q31_t)0x00000000,
     (q31_t)0x7641AF3C, (q31_t)0x30FBC54D,
@@ -8551,24 +8571,26 @@
     (q31_t)0xCF043AB2, (q31_t)0x89BE50C3
 };
 
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_32)
 /**
-* \par
-* Example code for Q31 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 32	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to Q31(Fixed point 1.31):
-*	round(twiddleCoefQ31(i) * pow(2, 31))
-*
-*/
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 32, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ */
 const q31_t twiddleCoef_32_q31[48] = {
     (q31_t)0x7FFFFFFF, (q31_t)0x00000000,
     (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C,
@@ -8596,24 +8618,26 @@
     (q31_t)0xE70747C3, (q31_t)0x8275A0C0
 };
 
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_64)
 /**
-* \par
-* Example code for Q31 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 64	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to Q31(Fixed point 1.31):
-*	round(twiddleCoefQ31(i) * pow(2, 31))
-*
-*/
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 64, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ */
 const q31_t twiddleCoef_64_q31[96] = {
 	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7F62368F,
 	(q31_t)0x0C8BD35E, (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C,
@@ -8649,24 +8673,26 @@
 	(q31_t)0x8275A0C0, (q31_t)0xF3742CA1, (q31_t)0x809DC970
 };
 
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_128)
 /**
-* \par
-* Example code for Q31 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 128	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to Q31(Fixed point 1.31):
-*	round(twiddleCoefQ31(i) * pow(2, 31))
-*
-*/
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i < 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 128, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ */
 const q31_t twiddleCoef_128_q31[192] = {
 	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FD8878D,
 	(q31_t)0x0647D97C, (q31_t)0x7F62368F, (q31_t)0x0C8BD35E,
@@ -8734,24 +8760,27 @@
 	(q31_t)0x809DC970, (q31_t)0xF9B82683, (q31_t)0x80277872
 };
 
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_256)
 /**
-* \par
-* Example code for Q31 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 256	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to Q31(Fixed point 1.31):
-*	round(twiddleCoefQ31(i) * pow(2, 31))
-*
-*/
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 256, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ 
+ */
 const q31_t twiddleCoef_256_q31[384] = {
 	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FF62182,
 	(q31_t)0x03242ABF, (q31_t)0x7FD8878D, (q31_t)0x0647D97C,
@@ -8883,24 +8912,27 @@
 	(q31_t)0x80277872, (q31_t)0xFCDBD541, (q31_t)0x8009DE7D
 };
 
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_512)
 /**
-* \par
-* Example code for Q31 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 512	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to Q31(Fixed point 1.31):
-*	round(twiddleCoefQ31(i) * pow(2, 31))
-*
-*/
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 512, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ 
+ */
 const q31_t twiddleCoef_512_q31[768] = {
     (q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFD885A,
 	(q31_t)0x01921D1F, (q31_t)0x7FF62182, (q31_t)0x03242ABF,
@@ -9160,24 +9192,27 @@
 	(q31_t)0x8009DE7D, (q31_t)0xFE6DE2E0, (q31_t)0x800277A5
 };
 
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_1024)
 /**
-* \par
-* Example code for Q31 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 1024	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to Q31(Fixed point 1.31):
-*	round(twiddleCoefQ31(i) * pow(2, 31))
-*
-*/
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 1024, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ 
+ */
 const q31_t twiddleCoef_1024_q31[1536] = {
 	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFF6216,
 	(q31_t)0x00C90F88, (q31_t)0x7FFD885A, (q31_t)0x01921D1F,
@@ -9693,24 +9728,26 @@
 	(q31_t)0x800277A5, (q31_t)0xFF36F078, (q31_t)0x80009DE9
 };
 
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_2048)
 /**
-* \par
-* Example code for Q31 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 2048	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to Q31(Fixed point 1.31):
-*	round(twiddleCoefQ31(i) * pow(2, 31))
-*
-*/
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 2048, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ */
 const q31_t twiddleCoef_2048_q31[3072] = {
 	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFFD885,
 	(q31_t)0x006487E3, (q31_t)0x7FFF6216, (q31_t)0x00C90F88,
@@ -10737,25 +10774,26 @@
 	(q31_t)0xFED2694F, (q31_t)0x8001634D, (q31_t)0xFF36F078,
 	(q31_t)0x80009DE9, (q31_t)0xFF9B781D, (q31_t)0x8000277A
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096)
 /**
-* \par
-* Example code for Q31 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 4096	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to Q31(Fixed point 1.31):
-*	round(twiddleCoefQ31(i) * pow(2, 31))
-*
-*/
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 4096, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ */
 const q31_t twiddleCoef_4096_q31[6144] =
 {
 	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFFF621,
@@ -12808,31 +12846,31 @@
 	(q31_t)0x8000277A, (q31_t)0xFFCDBC0A, (q31_t)0x800009DE
 };
 
-
-
-/*
-* @brief  q15 Twiddle factors Table
-*/
-
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
 /**
-* \par
-* Example code for q15 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 16	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to q15(Fixed point 1.15):
-*	round(twiddleCoefq15(i) * pow(2, 15))
-*
+  @brief  q15 Twiddle factors Table
 */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_16)
+
+/**
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  <pre>fori = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 16, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
 const q15_t twiddleCoef_16_q15[24] = {
     (q15_t)0x7FFF, (q15_t)0x0000,
     (q15_t)0x7641, (q15_t)0x30FB,
@@ -12847,25 +12885,26 @@
     (q15_t)0xA57D, (q15_t)0xA57D,
     (q15_t)0xCF04, (q15_t)0x89BE
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_32)
 /**
-* \par
-* Example code for q15 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 32	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to q15(Fixed point 1.15):
-*	round(twiddleCoefq15(i) * pow(2, 15))
-*
-*/
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 32, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
 const q15_t twiddleCoef_32_q15[48] = {
     (q15_t)0x7FFF, (q15_t)0x0000,
     (q15_t)0x7D8A, (q15_t)0x18F8,
@@ -12892,25 +12931,26 @@
     (q15_t)0xCF04, (q15_t)0x89BE,
     (q15_t)0xE707, (q15_t)0x8275
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_64)
 /**
-* \par
-* Example code for q15 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 64	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to q15(Fixed point 1.15):
-*	round(twiddleCoefq15(i) * pow(2, 15))
-*
-*/
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 64, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
 const q15_t twiddleCoef_64_q15[96] = {
 	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7F62, (q15_t)0x0C8B,
 	(q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7A7D, (q15_t)0x2528,
@@ -12937,25 +12977,26 @@
 	(q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xDAD7, (q15_t)0x8582,
 	(q15_t)0xE707, (q15_t)0x8275, (q15_t)0xF374, (q15_t)0x809D
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_128)
 /**
-* \par
-* Example code for q15 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 128	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to q15(Fixed point 1.15):
-*	round(twiddleCoefq15(i) * pow(2, 15))
-*
-*/
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 128, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
 const q15_t twiddleCoef_128_q15[192] = {
 	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FD8, (q15_t)0x0647,
 	(q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7E9D, (q15_t)0x12C8,
@@ -13006,25 +13047,26 @@
 	(q15_t)0xE707, (q15_t)0x8275, (q15_t)0xED37, (q15_t)0x8162,
 	(q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF9B8, (q15_t)0x8027
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_256)
 /**
-* \par
-* Example code for q15 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 256	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to q15(Fixed point 1.15):
-*	round(twiddleCoefq15(i) * pow(2, 15))
-*
-*/
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 256, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
 const q15_t twiddleCoef_256_q15[384] = {
 	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FF6, (q15_t)0x0324,
 	(q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FA7, (q15_t)0x096A,
@@ -13123,25 +13165,26 @@
 	(q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF695, (q15_t)0x8058,
 	(q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xFCDB, (q15_t)0x8009
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_512)
 /**
-* \par
-* Example code for q15 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 512	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to q15(Fixed point 1.15):
-*	round(twiddleCoefq15(i) * pow(2, 15))
-*
-*/
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 512, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
 const q15_t twiddleCoef_512_q15[768] = {
 	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFD, (q15_t)0x0192,
 	(q15_t)0x7FF6, (q15_t)0x0324, (q15_t)0x7FE9, (q15_t)0x04B6,
@@ -13336,25 +13379,27 @@
 	(q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xFB49, (q15_t)0x8016,
 	(q15_t)0xFCDB, (q15_t)0x8009, (q15_t)0xFE6D, (q15_t)0x8002
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_1024)
 /**
-* \par
-* Example code for q15 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 1024	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to q15(Fixed point 1.15):
-*	round(twiddleCoefq15(i) * pow(2, 15))
-*
-*/
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 1024, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ 
+ */
 const q15_t twiddleCoef_1024_q15[1536] = {
 	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0x00C9,
 	(q15_t)0x7FFD, (q15_t)0x0192, (q15_t)0x7FFA, (q15_t)0x025B,
@@ -13741,25 +13786,26 @@
 	(q15_t)0xFCDB, (q15_t)0x8009, (q15_t)0xFDA4, (q15_t)0x8005,
 	(q15_t)0xFE6D, (q15_t)0x8002, (q15_t)0xFF36, (q15_t)0x8000
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_2048)
 /**
-* \par
-* Example code for q15 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 2048	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to q15(Fixed point 1.15):
-*	round(twiddleCoefq15(i) * pow(2, 15))
-*
-*/
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 2048, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
 const q15_t twiddleCoef_2048_q15[3072] = {
 	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0x0064,
 	(q15_t)0x7FFF, (q15_t)0x00C9, (q15_t)0x7FFE, (q15_t)0x012D,
@@ -14530,25 +14576,26 @@
 	(q15_t)0xFE6D, (q15_t)0x8002, (q15_t)0xFED2, (q15_t)0x8001,
 	(q15_t)0xFF36, (q15_t)0x8000, (q15_t)0xFF9B, (q15_t)0x8000
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096)
 /**
-* \par
-* Example code for q15 Twiddle factors Generation::
-* \par
-* <pre>for(i = 0; i< 3N/4; i++)
-* {
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 4096	and PI = 3.14159265358979
-* \par
-* Cos and Sin values are interleaved fashion
-* \par
-* Convert Floating point to q15(Fixed point 1.15):
-*	round(twiddleCoefq15(i) * pow(2, 15))
-*
-*/
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 4096, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
 const q15_t twiddleCoef_4096_q15[6144] =
 {
 	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0x0032,
@@ -16089,44 +16136,14 @@
 	(q15_t)0xFF9B, (q15_t)0x8000, (q15_t)0xFFCD, (q15_t)0x8000
 };
 
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
 /**
-* @} end of CFFT_CIFFT group
+  @} end of CFFT_CIFFT group
 */
 
-/*
-* @brief  Q15 table for reciprocal
-*/
-const q15_t ALIGN4 armRecipTableQ15[64] = {
- 0x7F03, 0x7D13, 0x7B31, 0x795E, 0x7798, 0x75E0,
- 0x7434, 0x7294, 0x70FF, 0x6F76, 0x6DF6, 0x6C82,
- 0x6B16, 0x69B5, 0x685C, 0x670C, 0x65C4, 0x6484,
- 0x634C, 0x621C, 0x60F3, 0x5FD0, 0x5EB5, 0x5DA0,
- 0x5C91, 0x5B88, 0x5A85, 0x5988, 0x5890, 0x579E,
- 0x56B0, 0x55C8, 0x54E4, 0x5405, 0x532B, 0x5255,
- 0x5183, 0x50B6, 0x4FEC, 0x4F26, 0x4E64, 0x4DA6,
- 0x4CEC, 0x4C34, 0x4B81, 0x4AD0, 0x4A23, 0x4978,
- 0x48D1, 0x482D, 0x478C, 0x46ED, 0x4651, 0x45B8,
- 0x4521, 0x448D, 0x43FC, 0x436C, 0x42DF, 0x4255,
- 0x41CC, 0x4146, 0x40C2, 0x4040
-};
 
-/*
-* @brief  Q31 table for reciprocal
-*/
-const q31_t armRecipTableQ31[64] = {
-  0x7F03F03F, 0x7D137420, 0x7B31E739, 0x795E9F94, 0x7798FD29, 0x75E06928,
-  0x7434554D, 0x72943B4B, 0x70FF9C40, 0x6F760031, 0x6DF6F593, 0x6C8210E3,
-  0x6B16EC3A, 0x69B526F6, 0x685C655F, 0x670C505D, 0x65C4952D, 0x6484E519,
-  0x634CF53E, 0x621C7E4F, 0x60F33C61, 0x5FD0EEB3, 0x5EB55785, 0x5DA03BEB,
-  0x5C9163A1, 0x5B8898E6, 0x5A85A85A, 0x598860DF, 0x58909373, 0x579E1318,
-  0x56B0B4B8, 0x55C84F0B, 0x54E4BA80, 0x5405D124, 0x532B6E8F, 0x52556FD0,
-  0x5183B35A, 0x50B618F3, 0x4FEC81A2, 0x4F26CFA2, 0x4E64E64E, 0x4DA6AA1D,
-  0x4CEC008B, 0x4C34D010, 0x4B810016, 0x4AD078EF, 0x4A2323C4, 0x4978EA96,
-  0x48D1B827, 0x482D77FE, 0x478C1657, 0x46ED801D, 0x4651A2E5, 0x45B86CE2,
-  0x4521CCE1, 0x448DB244, 0x43FC0CFA, 0x436CCD78, 0x42DFE4B4, 0x42554426,
-  0x41CCDDB6, 0x4146A3C6, 0x40C28923, 0x40408102
-};
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_16)
 
 const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH] =
 {
@@ -16134,6 +16151,10 @@
    8,64, 24,72, 16,64, 40,80, 32,64, 56,88, 48,72, 88,104, 72,96, 104,112
 };
 
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_32)
+
 const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH] =
 {
    /* 8x4, size 48 */
@@ -16142,6 +16163,10 @@
    152,224, 176,208, 184,232, 216,240, 200,224, 232,240
 };
 
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_64)
+
 const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH] =
 {
    /* radix 8, size 56 */
@@ -16151,6 +16176,10 @@
    368,424, 376,488, 440,496
 };
 
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_128)
+
 const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH] =
 {
    /* 8x2, size 208 */
@@ -16169,6 +16198,10 @@
    904,928, 912,960, 920,992, 944,968, 952,1000, 968,992, 984,1008
 };
 
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_256)
+
 const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH] =
 {
    /* 8x4, size 440 */
@@ -16207,6 +16240,10 @@
    1960,1968, 2008,2032, 1992,2016, 2024,2032
 };
 
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_512)
+
 const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH] =
 {
    /* radix 8, size 448 */
@@ -16247,6 +16284,10 @@
    3448,3952, 3512,4016, 3576,4080
 };
 
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_1024)
+
 const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH] =
 {
    /* 8x2, size 1800 */
@@ -16399,6 +16440,10 @@
    8112,8136, 8120,8168, 8136,8160, 8152,8176
 };
 
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_2048)
+
 const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH] =
 {
    /* 8x2, size 3808 */
@@ -16740,6 +16785,9 @@
    16248,16368, 16264,16288, 16280,16296, 16296,16304, 16344,16368,
    16328,16352, 16360,16368
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_4096)
 
 const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH] =
 {
@@ -17111,21 +17159,27 @@
    31096,31544, 31160,32056, 31224,32568, 31672,32120, 31736,32632,
    32248,32696
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_16)
 
 const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH] =
 {
    /* radix 4, size 12 */
    8,64, 16,32, 24,96, 40,80, 56,112, 88,104
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_32)
 const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH] =
 {
    /* 4x2, size 24 */
    8,128, 16,64, 24,192, 40,160, 48,96, 56,224, 72,144,
    88,208, 104,176, 120,240, 152,200, 184,232
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_64)
 const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH] =
 {
    /* radix 4, size 56 */
@@ -17133,7 +17187,9 @@
    112,224, 120,480, 136,272, 152,400, 168,336, 176,208, 184,464, 200,304, 216,432,
    232,368, 248,496, 280,392, 296,328, 312,456, 344,424, 376,488, 440,472
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_128)
 const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH] =
 {
    /* 4x2, size 112 */
@@ -17144,7 +17200,9 @@
    472,880, 488,752, 504,1008, 536,776, 552,648, 568,904, 600,840, 616,712, 632,968,
    664,808, 696,936, 728,872, 760,1000, 824,920, 888,984
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_256)
 const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH] =
 {
    /* radix 4, size 240 */
@@ -17163,7 +17221,9 @@
    1368,1704, 1384,1448, 1400,1960, 1432,1640, 1464,1896, 1496,1768, 1528,2024, 1592,1816,
    1624,1688, 1656,1944, 1720,1880, 1784,2008, 1912,1976
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_512)
 const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH] =
 {
    /* 4x2, size 480 */
@@ -17197,7 +17257,9 @@
    3128,3608, 3160,3352, 3192,3864, 3256,3736, 3288,3480, 3320,3992, 3384,3672, 3448,3928,
    3512,3800, 3576,4056, 3704,3896, 3832,4024
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_1024)
 const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH] =
 {
     /* radix 4, size 992 */
@@ -17271,7 +17333,9 @@
     6872,7000, 6904,8024, 6968,7384, 7032,7896, 7096,7640, 7160,8152, 7288,7736,
     7352,7480, 7416,7992, 7544,7864, 7672,8120, 7928,8056
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_2048)
 const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH] =
 {
     /* 4x2, size 1984 */
@@ -17427,7 +17491,9 @@
     14456,15416, 14520,14904, 14584,15928, 14712,15672, 14776,15160, 14840,16184,
     14968,15544, 15096,16056, 15224,15800, 15352,16312, 15608,15992, 15864,16248
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_4096)
 const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH] =
 {
     /* radix 4, size 4032 */
@@ -17765,14 +17831,16 @@
     30456,32184, 30584,31672, 30712,32696, 30968,31864, 31096,31352, 31224,32376,
     31480,32120, 31736,32632, 32248,32504
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32)
 /**
-* \par
-* Example code for Floating-point RFFT Twiddle factors Generation:
-* \par
-* <pre>TW = exp(2*pi*i*[0:L/2-1]/L - pi/2*i).' </pre>
-* \par
-* Real and Imag values are in interleaved fashion
+  @par
+  Example code for Floating-point RFFT Twiddle factors Generation:
+  @par
+  <pre>TW = exp(pi/2*i-2*pi*i*[0:L/2-1]/L).' </pre>
+  @par
+  Real and Imag values are in interleaved fashion
 */
 const float32_t twiddleCoef_rfft_32[32] = {
     0.000000000f,  1.000000000f,
@@ -17792,7 +17860,9 @@
     0.382683432f, -0.923879533f,
     0.195090322f, -0.980785280f
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64)
 const float32_t twiddleCoef_rfft_64[64] = {
     0.000000000000000f,  1.000000000000000f,
     0.098017140329561f,  0.995184726672197f,
@@ -17827,7 +17897,9 @@
     0.195090322016129f, -0.980785280403230f,
     0.098017140329561f, -0.995184726672197f
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128)
 const float32_t twiddleCoef_rfft_128[128] = {
     0.000000000f,  1.000000000f,
     0.049067674f,  0.998795456f,
@@ -17894,7 +17966,9 @@
     0.098017140f, -0.995184727f,
     0.049067674f, -0.998795456f
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256)
 const float32_t twiddleCoef_rfft_256[256] = {
     0.000000000f,  1.000000000f,
     0.024541229f,  0.999698819f,
@@ -18025,7 +18099,9 @@
     0.049067674f, -0.998795456f,
     0.024541229f, -0.999698819f
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512)
 const float32_t twiddleCoef_rfft_512[512] = {
     0.000000000f,  1.000000000f,
     0.012271538f,  0.999924702f,
@@ -18284,7 +18360,9 @@
     0.024541229f, -0.999698819f,
     0.012271538f, -0.999924702f
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024)
 const float32_t twiddleCoef_rfft_1024[1024] = {
     0.000000000f,  1.000000000f,
     0.006135885f,  0.999981175f,
@@ -18799,7 +18877,9 @@
     0.012271538f, -0.999924702f,
     0.006135885f, -0.999981175f
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048)
 const float32_t twiddleCoef_rfft_2048[2048] = {
     0.000000000f,  1.000000000f,
     0.003067957f,  0.999995294f,
@@ -19826,7 +19906,9 @@
     0.006135885f, -0.999981175f,
     0.003067957f, -0.999995294f
 };
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096)
 const float32_t twiddleCoef_rfft_4096[4096] = {
     0.000000000f,  1.000000000f,
     0.001533980f,  0.999998823f,
@@ -21878,20 +21960,34969 @@
     0.001533980f, -0.999998823f
 };
 
+#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALL_TABLES) */
 
 /**
- * \par
- * Example code for the generation of the floating-point sine table:
- * <pre>
- * tableSize = 512;
- * for(n = 0; n < (tableSize + 1); n++)
- * {
- *	sinTable[n]=sin(2*pi*n/tableSize);
- * }</pre>
- * \par
- * where pi value is  3.14159265358979
+  @ingroup RealFFT
  */
 
+/**
+  @addtogroup RealFFT_Table Real FFT Tables
+  @{
+ */
+
+/**
+  @par
+  Generation of realCoefA array:
+  @par
+  n = 4096
+  <pre>for (i = 0; i < n; i++)
+  {
+     pATable[2 * i]     = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
+     pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+  }</pre>
+ */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_F32)
+const float32_t realCoefA[8192] = {
+  0.500000000000000f, -0.500000000000000f, 0.499616503715515f, -0.499999850988388f,
+  0.499233007431030f, -0.499999403953552f, 0.498849511146545f, -0.499998688697815f,
+  0.498466014862061f, -0.499997645616531f, 0.498082518577576f, -0.499996334314346f,
+  0.497699022293091f, -0.499994695186615f, 0.497315555810928f, -0.499992787837982f,
+  0.496932059526443f, -0.499990582466125f, 0.496548563241959f, -0.499988079071045f,
+  0.496165096759796f, -0.499985307455063f, 0.495781600475311f, -0.499982208013535f,
+  0.495398133993149f, -0.499978810548782f, 0.495014637708664f, -0.499975144863129f,
+  0.494631171226501f, -0.499971181154251f, 0.494247704744339f, -0.499966919422150f,
+  0.493864238262177f, -0.499962359666824f, 0.493480771780014f, -0.499957501888275f,
+  0.493097305297852f, -0.499952346086502f, 0.492713838815689f, -0.499946922063828f,
+  0.492330402135849f, -0.499941170215607f, 0.491946935653687f, -0.499935150146484f,
+  0.491563498973846f, -0.499928832054138f, 0.491180062294006f, -0.499922215938568f,
+  0.490796625614166f, -0.499915301799774f, 0.490413218736649f, -0.499908089637756f,
+  0.490029782056808f, -0.499900579452515f, 0.489646375179291f, -0.499892801046371f,
+  0.489262968301773f, -0.499884694814682f, 0.488879561424255f, -0.499876320362091f,
+  0.488496154546738f, -0.499867647886276f, 0.488112777471542f, -0.499858677387238f,
+  0.487729400396347f, -0.499849408864975f, 0.487346023321152f, -0.499839842319489f,
+  0.486962646245956f, -0.499830007553101f, 0.486579269170761f, -0.499819844961166f,
+  0.486195921897888f, -0.499809414148331f, 0.485812574625015f, -0.499798685312271f,
+  0.485429257154465f, -0.499787658452988f, 0.485045909881592f, -0.499776333570480f,
+  0.484662592411041f, -0.499764710664749f, 0.484279274940491f, -0.499752789735794f,
+  0.483895987272263f, -0.499740600585938f, 0.483512699604034f, -0.499728083610535f,
+  0.483129411935806f, -0.499715298414230f, 0.482746154069901f, -0.499702215194702f,
+  0.482362866401672f, -0.499688833951950f, 0.481979638338089f, -0.499675154685974f,
+  0.481596380472183f, -0.499661177396774f, 0.481213152408600f, -0.499646931886673f,
+  0.480829954147339f, -0.499632388353348f, 0.480446726083755f, -0.499617516994476f,
+  0.480063527822495f, -0.499602377414703f, 0.479680359363556f, -0.499586939811707f,
+  0.479297190904617f, -0.499571204185486f, 0.478914022445679f, -0.499555170536041f,
+  0.478530883789063f, -0.499538868665695f, 0.478147745132446f, -0.499522238969803f,
+  0.477764606475830f, -0.499505341053009f, 0.477381497621536f, -0.499488145112991f,
+  0.476998418569565f, -0.499470651149750f, 0.476615339517593f, -0.499452859163284f,
+  0.476232260465622f, -0.499434769153595f, 0.475849211215973f, -0.499416410923004f,
+  0.475466161966324f, -0.499397724866867f, 0.475083142518997f, -0.499378770589828f,
+  0.474700123071671f, -0.499359518289566f, 0.474317133426666f, -0.499339967966080f,
+  0.473934143781662f, -0.499320119619370f, 0.473551183938980f, -0.499299973249435f,
+  0.473168224096298f, -0.499279528856277f, 0.472785294055939f, -0.499258816242218f,
+  0.472402364015579f, -0.499237775802612f, 0.472019463777542f, -0.499216467142105f,
+  0.471636593341827f, -0.499194860458374f, 0.471253722906113f, -0.499172955751419f,
+  0.470870882272720f, -0.499150782823563f, 0.470488041639328f, -0.499128282070160f,
+  0.470105201005936f, -0.499105513095856f, 0.469722419977188f, -0.499082416296005f,
+  0.469339638948441f, -0.499059051275253f, 0.468956857919693f, -0.499035388231277f,
+  0.468574106693268f, -0.499011427164078f, 0.468191385269165f, -0.498987197875977f,
+  0.467808693647385f, -0.498962640762329f, 0.467426002025604f, -0.498937815427780f,
+  0.467043310403824f, -0.498912662267685f, 0.466660678386688f, -0.498887240886688f,
+  0.466278046369553f, -0.498861521482468f, 0.465895414352417f, -0.498835533857346f,
+  0.465512841939926f, -0.498809218406677f, 0.465130269527435f, -0.498782604932785f,
+  0.464747726917267f, -0.498755723237991f, 0.464365184307098f, -0.498728543519974f,
+  0.463982671499252f, -0.498701065778732f, 0.463600188493729f, -0.498673290014267f,
+  0.463217705488205f, -0.498645216226578f, 0.462835282087326f, -0.498616874217987f,
+  0.462452858686447f, -0.498588204383850f, 0.462070435285568f, -0.498559266328812f,
+  0.461688071489334f, -0.498530030250549f, 0.461305707693100f, -0.498500496149063f,
+  0.460923373699188f, -0.498470664024353f, 0.460541069507599f, -0.498440563678741f,
+  0.460158795118332f, -0.498410135507584f, 0.459776520729065f, -0.498379439115524f,
+  0.459394276142120f, -0.498348444700241f, 0.459012061357498f, -0.498317152261734f,
+  0.458629876375198f, -0.498285561800003f, 0.458247691392899f, -0.498253703117371f,
+  0.457865566015244f, -0.498221516609192f, 0.457483440637589f, -0.498189061880112f,
+  0.457101345062256f, -0.498156309127808f, 0.456719279289246f, -0.498123258352280f,
+  0.456337243318558f, -0.498089909553528f, 0.455955207347870f, -0.498056292533875f,
+  0.455573230981827f, -0.498022347688675f, 0.455191254615784f, -0.497988134622574f,
+  0.454809308052063f, -0.497953623533249f, 0.454427421092987f, -0.497918814420700f,
+  0.454045534133911f, -0.497883707284927f, 0.453663676977158f, -0.497848302125931f,
+  0.453281819820404f, -0.497812628746033f, 0.452900022268295f, -0.497776657342911f,
+  0.452518254518509f, -0.497740387916565f, 0.452136516571045f, -0.497703820466995f,
+  0.451754778623581f, -0.497666954994202f, 0.451373100280762f, -0.497629791498184f,
+  0.450991421937943f, -0.497592359781265f, 0.450609803199768f, -0.497554630041122f,
+  0.450228184461594f, -0.497516602277756f, 0.449846625328064f, -0.497478276491165f,
+  0.449465066194534f, -0.497439652681351f, 0.449083566665649f, -0.497400760650635f,
+  0.448702067136765f, -0.497361570596695f, 0.448320597410202f, -0.497322082519531f,
+  0.447939187288284f, -0.497282296419144f, 0.447557777166367f, -0.497242212295532f,
+  0.447176426649094f, -0.497201830148697f, 0.446795076131821f, -0.497161179780960f,
+  0.446413785219193f, -0.497120231389999f, 0.446032524108887f, -0.497078984975815f,
+  0.445651292800903f, -0.497037440538406f, 0.445270061492920f, -0.496995598077774f,
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+  0.456337243318558f, 0.498089909553528f, 0.456719279289246f, 0.498123258352280f,
+  0.457101345062256f, 0.498156309127808f, 0.457483440637589f, 0.498189061880112f,
+  0.457865566015244f, 0.498221516609192f, 0.458247691392899f, 0.498253703117371f,
+  0.458629876375198f, 0.498285561800003f, 0.459012061357498f, 0.498317152261734f,
+  0.459394276142120f, 0.498348444700241f, 0.459776520729065f, 0.498379439115524f,
+  0.460158795118332f, 0.498410135507584f, 0.460541069507599f, 0.498440563678741f,
+  0.460923373699188f, 0.498470664024353f, 0.461305707693100f, 0.498500496149063f,
+  0.461688071489334f, 0.498530030250549f, 0.462070435285568f, 0.498559266328812f,
+  0.462452858686447f, 0.498588204383850f, 0.462835282087326f, 0.498616874217987f,
+  0.463217705488205f, 0.498645216226578f, 0.463600188493729f, 0.498673290014267f,
+  0.463982671499252f, 0.498701065778732f, 0.464365184307098f, 0.498728543519974f,
+  0.464747726917267f, 0.498755723237991f, 0.465130269527435f, 0.498782604932785f,
+  0.465512841939926f, 0.498809218406677f, 0.465895414352417f, 0.498835533857346f,
+  0.466278046369553f, 0.498861521482468f, 0.466660678386688f, 0.498887240886688f,
+  0.467043310403824f, 0.498912662267685f, 0.467426002025604f, 0.498937815427780f,
+  0.467808693647385f, 0.498962640762329f, 0.468191385269165f, 0.498987197875977f,
+  0.468574106693268f, 0.499011427164078f, 0.468956857919693f, 0.499035388231277f,
+  0.469339638948441f, 0.499059051275253f, 0.469722419977188f, 0.499082416296005f,
+  0.470105201005936f, 0.499105513095856f, 0.470488041639328f, 0.499128282070160f,
+  0.470870882272720f, 0.499150782823563f, 0.471253722906113f, 0.499172955751419f,
+  0.471636593341827f, 0.499194860458374f, 0.472019463777542f, 0.499216467142105f,
+  0.472402364015579f, 0.499237775802612f, 0.472785294055939f, 0.499258816242218f,
+  0.473168224096298f, 0.499279528856277f, 0.473551183938980f, 0.499299973249435f,
+  0.473934143781662f, 0.499320119619370f, 0.474317133426666f, 0.499339967966080f,
+  0.474700123071671f, 0.499359518289566f, 0.475083142518997f, 0.499378770589828f,
+  0.475466161966324f, 0.499397724866867f, 0.475849211215973f, 0.499416410923004f,
+  0.476232260465622f, 0.499434769153595f, 0.476615339517593f, 0.499452859163284f,
+  0.476998418569565f, 0.499470651149750f, 0.477381497621536f, 0.499488145112991f,
+  0.477764606475830f, 0.499505341053009f, 0.478147745132446f, 0.499522238969803f,
+  0.478530883789063f, 0.499538868665695f, 0.478914022445679f, 0.499555170536041f,
+  0.479297190904617f, 0.499571204185486f, 0.479680359363556f, 0.499586939811707f,
+  0.480063527822495f, 0.499602377414703f, 0.480446726083755f, 0.499617516994476f,
+  0.480829954147339f, 0.499632388353348f, 0.481213152408600f, 0.499646931886673f,
+  0.481596380472183f, 0.499661177396774f, 0.481979638338089f, 0.499675154685974f,
+  0.482362866401672f, 0.499688833951950f, 0.482746154069901f, 0.499702215194702f,
+  0.483129411935806f, 0.499715298414230f, 0.483512699604034f, 0.499728083610535f,
+  0.483895987272263f, 0.499740600585938f, 0.484279274940491f, 0.499752789735794f,
+  0.484662592411041f, 0.499764710664749f, 0.485045909881592f, 0.499776333570480f,
+  0.485429257154465f, 0.499787658452988f, 0.485812574625015f, 0.499798685312271f,
+  0.486195921897888f, 0.499809414148331f, 0.486579269170761f, 0.499819844961166f,
+  0.486962646245956f, 0.499830007553101f, 0.487346023321152f, 0.499839842319489f,
+  0.487729400396347f, 0.499849408864975f, 0.488112777471542f, 0.499858677387238f,
+  0.488496154546738f, 0.499867647886276f, 0.488879561424255f, 0.499876320362091f,
+  0.489262968301773f, 0.499884694814682f, 0.489646375179291f, 0.499892801046371f,
+  0.490029782056808f, 0.499900579452515f, 0.490413218736649f, 0.499908089637756f,
+  0.490796625614166f, 0.499915301799774f, 0.491180062294006f, 0.499922215938568f,
+  0.491563498973846f, 0.499928832054138f, 0.491946935653687f, 0.499935150146484f,
+  0.492330402135849f, 0.499941170215607f, 0.492713838815689f, 0.499946922063828f,
+  0.493097305297852f, 0.499952346086502f, 0.493480771780014f, 0.499957501888275f,
+  0.493864238262177f, 0.499962359666824f, 0.494247704744339f, 0.499966919422150f,
+  0.494631171226501f, 0.499971181154251f, 0.495014637708664f, 0.499975144863129f,
+  0.495398133993149f, 0.499978810548782f, 0.495781600475311f, 0.499982208013535f,
+  0.496165096759796f, 0.499985307455063f, 0.496548563241959f, 0.499988079071045f,
+  0.496932059526443f, 0.499990582466125f, 0.497315555810928f, 0.499992787837982f,
+  0.497699022293091f, 0.499994695186615f, 0.498082518577576f, 0.499996334314346f,
+  0.498466014862061f, 0.499997645616531f, 0.498849511146545f, 0.499998688697815f,
+  0.499233007431030f, 0.499999403953552f, 0.499616503715515f, 0.499999850988388f,
+};
+
+
+/**
+  @par
+  Generation of realCoefB array:
+  @par
+  n = 4096
+  <pre>for (i = 0; i < n; i++)
+  {
+     pBTable[2 * i]     = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
+     pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+  }</pre>
+ */
+
+const float32_t realCoefB[8192] = {
+  0.500000000000000f, 0.500000000000000f, 0.500383496284485f, 0.499999850988388f,
+  0.500766992568970f, 0.499999403953552f, 0.501150488853455f, 0.499998688697815f,
+  0.501533985137939f, 0.499997645616531f, 0.501917481422424f, 0.499996334314346f,
+  0.502300977706909f, 0.499994695186615f, 0.502684473991394f, 0.499992787837982f,
+  0.503067970275879f, 0.499990582466125f, 0.503451406955719f, 0.499988079071045f,
+  0.503834903240204f, 0.499985307455063f, 0.504218399524689f, 0.499982208013535f,
+  0.504601895809174f, 0.499978810548782f, 0.504985332489014f, 0.499975144863129f,
+  0.505368828773499f, 0.499971181154251f, 0.505752325057983f, 0.499966919422150f,
+  0.506135761737823f, 0.499962359666824f, 0.506519258022308f, 0.499957501888275f,
+  0.506902694702148f, 0.499952346086502f, 0.507286131381989f, 0.499946922063828f,
+  0.507669627666473f, 0.499941170215607f, 0.508053064346313f, 0.499935150146484f,
+  0.508436501026154f, 0.499928832054138f, 0.508819937705994f, 0.499922215938568f,
+  0.509203374385834f, 0.499915301799774f, 0.509586811065674f, 0.499908089637756f,
+  0.509970188140869f, 0.499900579452515f, 0.510353624820709f, 0.499892801046371f,
+  0.510737061500549f, 0.499884694814682f, 0.511120438575745f, 0.499876320362091f,
+  0.511503815650940f, 0.499867647886276f, 0.511887252330780f, 0.499858677387238f,
+  0.512270629405975f, 0.499849408864975f, 0.512654006481171f, 0.499839842319489f,
+  0.513037383556366f, 0.499830007553101f, 0.513420701026917f, 0.499819844961166f,
+  0.513804078102112f, 0.499809414148331f, 0.514187395572662f, 0.499798685312271f,
+  0.514570772647858f, 0.499787658452988f, 0.514954090118408f, 0.499776333570480f,
+  0.515337407588959f, 0.499764710664749f, 0.515720725059509f, 0.499752789735794f,
+  0.516103982925415f, 0.499740600585938f, 0.516487300395966f, 0.499728083610535f,
+  0.516870558261871f, 0.499715298414230f, 0.517253875732422f, 0.499702215194702f,
+  0.517637133598328f, 0.499688833951950f, 0.518020391464233f, 0.499675154685974f,
+  0.518403589725494f, 0.499661177396774f, 0.518786847591400f, 0.499646931886673f,
+  0.519170045852661f, 0.499632388353348f, 0.519553244113922f, 0.499617516994476f,
+  0.519936442375183f, 0.499602377414703f, 0.520319640636444f, 0.499586939811707f,
+  0.520702838897705f, 0.499571204185486f, 0.521085977554321f, 0.499555170536041f,
+  0.521469116210938f, 0.499538868665695f, 0.521852254867554f, 0.499522238969803f,
+  0.522235393524170f, 0.499505341053009f, 0.522618472576141f, 0.499488145112991f,
+  0.523001611232758f, 0.499470651149750f, 0.523384690284729f, 0.499452859163284f,
+  0.523767769336700f, 0.499434769153595f, 0.524150788784027f, 0.499416410923004f,
+  0.524533808231354f, 0.499397724866867f, 0.524916887283325f, 0.499378770589828f,
+  0.525299847126007f, 0.499359518289566f, 0.525682866573334f, 0.499339967966080f,
+  0.526065826416016f, 0.499320119619370f, 0.526448845863342f, 0.499299973249435f,
+  0.526831746101379f, 0.499279528856277f, 0.527214705944061f, 0.499258816242218f,
+  0.527597606182098f, 0.499237775802612f, 0.527980506420136f, 0.499216467142105f,
+  0.528363406658173f, 0.499194860458374f, 0.528746306896210f, 0.499172955751419f,
+  0.529129147529602f, 0.499150782823563f, 0.529511988162994f, 0.499128282070160f,
+  0.529894769191742f, 0.499105513095856f, 0.530277609825134f, 0.499082416296005f,
+  0.530660390853882f, 0.499059051275253f, 0.531043112277985f, 0.499035388231277f,
+  0.531425893306732f, 0.499011427164078f, 0.531808614730835f, 0.498987197875977f,
+  0.532191336154938f, 0.498962640762329f, 0.532573997974396f, 0.498937815427780f,
+  0.532956659793854f, 0.498912662267685f, 0.533339321613312f, 0.498887240886688f,
+  0.533721983432770f, 0.498861521482468f, 0.534104585647583f, 0.498835533857346f,
+  0.534487187862396f, 0.498809218406677f, 0.534869730472565f, 0.498782604932785f,
+  0.535252273082733f, 0.498755723237991f, 0.535634815692902f, 0.498728543519974f,
+  0.536017298698425f, 0.498701065778732f, 0.536399841308594f, 0.498673290014267f,
+  0.536782264709473f, 0.498645216226578f, 0.537164747714996f, 0.498616874217987f,
+  0.537547171115875f, 0.498588204383850f, 0.537929534912109f, 0.498559266328812f,
+  0.538311958312988f, 0.498530030250549f, 0.538694262504578f, 0.498500496149063f,
+  0.539076626300812f, 0.498470664024353f, 0.539458930492401f, 0.498440563678741f,
+  0.539841234683990f, 0.498410135507584f, 0.540223479270935f, 0.498379439115524f,
+  0.540605723857880f, 0.498348444700241f, 0.540987968444824f, 0.498317152261734f,
+  0.541370153427124f, 0.498285561800003f, 0.541752278804779f, 0.498253703117371f,
+  0.542134463787079f, 0.498221516609192f, 0.542516589164734f, 0.498189061880112f,
+  0.542898654937744f, 0.498156309127808f, 0.543280720710754f, 0.498123258352280f,
+  0.543662786483765f, 0.498089909553528f, 0.544044792652130f, 0.498056292533875f,
+  0.544426798820496f, 0.498022347688675f, 0.544808745384216f, 0.497988134622574f,
+  0.545190691947937f, 0.497953623533249f, 0.545572578907013f, 0.497918814420700f,
+  0.545954465866089f, 0.497883707284927f, 0.546336352825165f, 0.497848302125931f,
+  0.546718180179596f, 0.497812628746033f, 0.547099947929382f, 0.497776657342911f,
+  0.547481775283813f, 0.497740387916565f, 0.547863483428955f, 0.497703820466995f,
+  0.548245191574097f, 0.497666954994202f, 0.548626899719238f, 0.497629791498184f,
+  0.549008548259735f, 0.497592359781265f, 0.549390196800232f, 0.497554630041122f,
+  0.549771785736084f, 0.497516602277756f, 0.550153374671936f, 0.497478276491165f,
+  0.550534904003143f, 0.497439652681351f, 0.550916433334351f, 0.497400760650635f,
+  0.551297962665558f, 0.497361570596695f, 0.551679372787476f, 0.497322082519531f,
+  0.552060842514038f, 0.497282296419144f, 0.552442193031311f, 0.497242212295532f,
+  0.552823603153229f, 0.497201830148697f, 0.553204894065857f, 0.497161179780960f,
+  0.553586184978485f, 0.497120231389999f, 0.553967475891113f, 0.497078984975815f,
+  0.554348707199097f, 0.497037440538406f, 0.554729938507080f, 0.496995598077774f,
+  0.555111110210419f, 0.496953487396240f, 0.555492222309113f, 0.496911078691483f,
+  0.555873334407806f, 0.496868371963501f, 0.556254446506500f, 0.496825367212296f,
+  0.556635499000549f, 0.496782064437866f, 0.557016491889954f, 0.496738493442535f,
+  0.557397484779358f, 0.496694594621658f, 0.557778418064117f, 0.496650427579880f,
+  0.558159291744232f, 0.496605962514877f, 0.558540165424347f, 0.496561229228973f,
+  0.558921039104462f, 0.496516168117523f, 0.559301853179932f, 0.496470838785172f,
+  0.559682607650757f, 0.496425211429596f, 0.560063362121582f, 0.496379286050797f,
+  0.560444056987762f, 0.496333062648773f, 0.560824692249298f, 0.496286571025848f,
+  0.561205327510834f, 0.496239781379700f, 0.561585903167725f, 0.496192663908005f,
+  0.561966478824615f, 0.496145308017731f, 0.562346994876862f, 0.496097624301910f,
+  0.562727510929108f, 0.496049642562866f, 0.563107967376709f, 0.496001392602921f,
+  0.563488364219666f, 0.495952844619751f, 0.563868701457977f, 0.495903998613358f,
+  0.564249038696289f, 0.495854884386063f, 0.564629375934601f, 0.495805442333221f,
+  0.565009593963623f, 0.495755732059479f, 0.565389811992645f, 0.495705723762512f,
+  0.565770030021667f, 0.495655417442322f, 0.566150128841400f, 0.495604842901230f,
+  0.566530287265778f, 0.495553970336914f, 0.566910326480865f, 0.495502769947052f,
+  0.567290365695953f, 0.495451331138611f, 0.567670345306396f, 0.495399564504623f,
+  0.568050265312195f, 0.495347499847412f, 0.568430185317993f, 0.495295166969299f,
+  0.568810045719147f, 0.495242536067963f, 0.569189906120300f, 0.495189607143402f,
+  0.569569647312164f, 0.495136409997940f, 0.569949388504028f, 0.495082914829254f,
+  0.570329129695892f, 0.495029091835022f, 0.570708811283112f, 0.494975030422211f,
+  0.571088373661041f, 0.494920641183853f, 0.571467995643616f, 0.494865983724594f,
+  0.571847498416901f, 0.494810998439789f, 0.572227001190186f, 0.494755744934082f,
+  0.572606444358826f, 0.494700223207474f, 0.572985887527466f, 0.494644373655319f,
+  0.573365211486816f, 0.494588255882263f, 0.573744535446167f, 0.494531840085983f,
+  0.574123859405518f, 0.494475126266479f, 0.574503064155579f, 0.494418144226074f,
+  0.574882268905640f, 0.494360834360123f, 0.575261414051056f, 0.494303256273270f,
+  0.575640499591827f, 0.494245409965515f, 0.576019585132599f, 0.494187235832214f,
+  0.576398611068726f, 0.494128793478012f, 0.576777577400208f, 0.494070053100586f,
+  0.577156484127045f, 0.494011014699936f, 0.577535390853882f, 0.493951678276062f,
+  0.577914178371429f, 0.493892073631287f, 0.578292965888977f, 0.493832170963287f,
+  0.578671753406525f, 0.493771970272064f, 0.579050421714783f, 0.493711471557617f,
+  0.579429090023041f, 0.493650704622269f, 0.579807698726654f, 0.493589639663696f,
+  0.580186247825623f, 0.493528276681900f, 0.580564737319946f, 0.493466645479202f,
+  0.580943167209625f, 0.493404686450958f, 0.581321597099304f, 0.493342459201813f,
+  0.581699967384338f, 0.493279963731766f, 0.582078278064728f, 0.493217140436172f,
+  0.582456588745117f, 0.493154048919678f, 0.582834780216217f, 0.493090659379959f,
+  0.583212971687317f, 0.493026971817017f, 0.583591103553772f, 0.492963016033173f,
+  0.583969175815582f, 0.492898762226105f, 0.584347188472748f, 0.492834210395813f,
+  0.584725141525269f, 0.492769360542297f, 0.585103094577789f, 0.492704242467880f,
+  0.585480928421021f, 0.492638826370239f, 0.585858762264252f, 0.492573112249374f,
+  0.586236536502838f, 0.492507129907608f, 0.586614251136780f, 0.492440819740295f,
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+  0.528363406658173f, -0.499194860458374f, 0.527980506420136f, -0.499216467142105f,
+  0.527597606182098f, -0.499237775802612f, 0.527214705944061f, -0.499258816242218f,
+  0.526831746101379f, -0.499279528856277f, 0.526448845863342f, -0.499299973249435f,
+  0.526065826416016f, -0.499320119619370f, 0.525682866573334f, -0.499339967966080f,
+  0.525299847126007f, -0.499359518289566f, 0.524916887283325f, -0.499378770589828f,
+  0.524533808231354f, -0.499397724866867f, 0.524150788784027f, -0.499416410923004f,
+  0.523767769336700f, -0.499434769153595f, 0.523384690284729f, -0.499452859163284f,
+  0.523001611232758f, -0.499470651149750f, 0.522618472576141f, -0.499488145112991f,
+  0.522235393524170f, -0.499505341053009f, 0.521852254867554f, -0.499522238969803f,
+  0.521469116210938f, -0.499538868665695f, 0.521085977554321f, -0.499555170536041f,
+  0.520702838897705f, -0.499571204185486f, 0.520319640636444f, -0.499586939811707f,
+  0.519936442375183f, -0.499602377414703f, 0.519553244113922f, -0.499617516994476f,
+  0.519170045852661f, -0.499632388353348f, 0.518786847591400f, -0.499646931886673f,
+  0.518403589725494f, -0.499661177396774f, 0.518020391464233f, -0.499675154685974f,
+  0.517637133598328f, -0.499688833951950f, 0.517253875732422f, -0.499702215194702f,
+  0.516870558261871f, -0.499715298414230f, 0.516487300395966f, -0.499728083610535f,
+  0.516103982925415f, -0.499740600585938f, 0.515720725059509f, -0.499752789735794f,
+  0.515337407588959f, -0.499764710664749f, 0.514954090118408f, -0.499776333570480f,
+  0.514570772647858f, -0.499787658452988f, 0.514187395572662f, -0.499798685312271f,
+  0.513804078102112f, -0.499809414148331f, 0.513420701026917f, -0.499819844961166f,
+  0.513037383556366f, -0.499830007553101f, 0.512654006481171f, -0.499839842319489f,
+  0.512270629405975f, -0.499849408864975f, 0.511887252330780f, -0.499858677387238f,
+  0.511503815650940f, -0.499867647886276f, 0.511120438575745f, -0.499876320362091f,
+  0.510737061500549f, -0.499884694814682f, 0.510353624820709f, -0.499892801046371f,
+  0.509970188140869f, -0.499900579452515f, 0.509586811065674f, -0.499908089637756f,
+  0.509203374385834f, -0.499915301799774f, 0.508819937705994f, -0.499922215938568f,
+  0.508436501026154f, -0.499928832054138f, 0.508053064346313f, -0.499935150146484f,
+  0.507669627666473f, -0.499941170215607f, 0.507286131381989f, -0.499946922063828f,
+  0.506902694702148f, -0.499952346086502f, 0.506519258022308f, -0.499957501888275f,
+  0.506135761737823f, -0.499962359666824f, 0.505752325057983f, -0.499966919422150f,
+  0.505368828773499f, -0.499971181154251f, 0.504985332489014f, -0.499975144863129f,
+  0.504601895809174f, -0.499978810548782f, 0.504218399524689f, -0.499982208013535f,
+  0.503834903240204f, -0.499985307455063f, 0.503451406955719f, -0.499988079071045f,
+  0.503067970275879f, -0.499990582466125f, 0.502684473991394f, -0.499992787837982f,
+  0.502300977706909f, -0.499994695186615f, 0.501917481422424f, -0.499996334314346f,
+  0.501533985137939f, -0.499997645616531f, 0.501150488853455f, -0.499998688697815f,
+  0.500766992568970f, -0.499999403953552f, 0.500383496284485f, -0.499999850988388f,
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q31)
+/**
+  @par
+  Generation fixed-point realCoefAQ31 array in Q31 format:
+  @par
+  n = 4096
+  <pre>for (i = 0; i < n; i++)
+  {
+     pATable[2 * i]     = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
+     pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+  }</pre>
+  @par
+  Convert to fixed point Q31 format
+      round(pATable[i] * pow(2, 31))
+*/
+const q31_t realCoefAQ31[8192] = {
+    (q31_t)0x40000000, (q31_t)0xc0000000, (q31_t)0x3ff36f02, (q31_t)0xc000013c,
+    (q31_t)0x3fe6de05, (q31_t)0xc00004ef, (q31_t)0x3fda4d09, (q31_t)0xc0000b1a,
+    (q31_t)0x3fcdbc0f, (q31_t)0xc00013bd, (q31_t)0x3fc12b16, (q31_t)0xc0001ed8,
+    (q31_t)0x3fb49a1f, (q31_t)0xc0002c6a, (q31_t)0x3fa8092c, (q31_t)0xc0003c74,
+    (q31_t)0x3f9b783c, (q31_t)0xc0004ef5, (q31_t)0x3f8ee750, (q31_t)0xc00063ee,
+    (q31_t)0x3f825668, (q31_t)0xc0007b5f, (q31_t)0x3f75c585, (q31_t)0xc0009547,
+    (q31_t)0x3f6934a8, (q31_t)0xc000b1a7, (q31_t)0x3f5ca3d0, (q31_t)0xc000d07e,
+    (q31_t)0x3f5012fe, (q31_t)0xc000f1ce, (q31_t)0x3f438234, (q31_t)0xc0011594,
+    (q31_t)0x3f36f170, (q31_t)0xc0013bd3, (q31_t)0x3f2a60b4, (q31_t)0xc0016489,
+    (q31_t)0x3f1dd001, (q31_t)0xc0018fb6, (q31_t)0x3f113f56, (q31_t)0xc001bd5c,
+    (q31_t)0x3f04aeb5, (q31_t)0xc001ed78, (q31_t)0x3ef81e1d, (q31_t)0xc002200d,
+    (q31_t)0x3eeb8d8f, (q31_t)0xc0025519, (q31_t)0x3edefd0c, (q31_t)0xc0028c9c,
+    (q31_t)0x3ed26c94, (q31_t)0xc002c697, (q31_t)0x3ec5dc28, (q31_t)0xc003030a,
+    (q31_t)0x3eb94bc8, (q31_t)0xc00341f4, (q31_t)0x3eacbb74, (q31_t)0xc0038356,
+    (q31_t)0x3ea02b2e, (q31_t)0xc003c72f, (q31_t)0x3e939af5, (q31_t)0xc0040d80,
+    (q31_t)0x3e870aca, (q31_t)0xc0045648, (q31_t)0x3e7a7aae, (q31_t)0xc004a188,
+    (q31_t)0x3e6deaa1, (q31_t)0xc004ef3f, (q31_t)0x3e615aa3, (q31_t)0xc0053f6e,
+    (q31_t)0x3e54cab5, (q31_t)0xc0059214, (q31_t)0x3e483ad8, (q31_t)0xc005e731,
+    (q31_t)0x3e3bab0b, (q31_t)0xc0063ec6, (q31_t)0x3e2f1b50, (q31_t)0xc00698d3,
+    (q31_t)0x3e228ba7, (q31_t)0xc006f556, (q31_t)0x3e15fc11, (q31_t)0xc0075452,
+    (q31_t)0x3e096c8d, (q31_t)0xc007b5c4, (q31_t)0x3dfcdd1d, (q31_t)0xc00819ae,
+    (q31_t)0x3df04dc0, (q31_t)0xc008800f, (q31_t)0x3de3be78, (q31_t)0xc008e8e8,
+    (q31_t)0x3dd72f45, (q31_t)0xc0095438, (q31_t)0x3dcaa027, (q31_t)0xc009c1ff,
+    (q31_t)0x3dbe111e, (q31_t)0xc00a323d, (q31_t)0x3db1822c, (q31_t)0xc00aa4f3,
+    (q31_t)0x3da4f351, (q31_t)0xc00b1a20, (q31_t)0x3d98648d, (q31_t)0xc00b91c4,
+    (q31_t)0x3d8bd5e1, (q31_t)0xc00c0be0, (q31_t)0x3d7f474d, (q31_t)0xc00c8872,
+    (q31_t)0x3d72b8d2, (q31_t)0xc00d077c, (q31_t)0x3d662a70, (q31_t)0xc00d88fd,
+    (q31_t)0x3d599c28, (q31_t)0xc00e0cf5, (q31_t)0x3d4d0df9, (q31_t)0xc00e9364,
+    (q31_t)0x3d407fe6, (q31_t)0xc00f1c4a, (q31_t)0x3d33f1ed, (q31_t)0xc00fa7a8,
+    (q31_t)0x3d276410, (q31_t)0xc010357c, (q31_t)0x3d1ad650, (q31_t)0xc010c5c7,
+    (q31_t)0x3d0e48ab, (q31_t)0xc011588a, (q31_t)0x3d01bb24, (q31_t)0xc011edc3,
+    (q31_t)0x3cf52dbb, (q31_t)0xc0128574, (q31_t)0x3ce8a06f, (q31_t)0xc0131f9b,
+    (q31_t)0x3cdc1342, (q31_t)0xc013bc39, (q31_t)0x3ccf8634, (q31_t)0xc0145b4e,
+    (q31_t)0x3cc2f945, (q31_t)0xc014fcda, (q31_t)0x3cb66c77, (q31_t)0xc015a0dd,
+    (q31_t)0x3ca9dfc8, (q31_t)0xc0164757, (q31_t)0x3c9d533b, (q31_t)0xc016f047,
+    (q31_t)0x3c90c6cf, (q31_t)0xc0179bae, (q31_t)0x3c843a85, (q31_t)0xc018498c,
+    (q31_t)0x3c77ae5e, (q31_t)0xc018f9e1, (q31_t)0x3c6b2259, (q31_t)0xc019acac,
+    (q31_t)0x3c5e9678, (q31_t)0xc01a61ee, (q31_t)0x3c520aba, (q31_t)0xc01b19a7,
+    (q31_t)0x3c457f21, (q31_t)0xc01bd3d6, (q31_t)0x3c38f3ac, (q31_t)0xc01c907c,
+    (q31_t)0x3c2c685d, (q31_t)0xc01d4f99, (q31_t)0x3c1fdd34, (q31_t)0xc01e112b,
+    (q31_t)0x3c135231, (q31_t)0xc01ed535, (q31_t)0x3c06c754, (q31_t)0xc01f9bb5,
+    (q31_t)0x3bfa3c9f, (q31_t)0xc02064ab, (q31_t)0x3bedb212, (q31_t)0xc0213018,
+    (q31_t)0x3be127ac, (q31_t)0xc021fdfb, (q31_t)0x3bd49d70, (q31_t)0xc022ce54,
+    (q31_t)0x3bc8135c, (q31_t)0xc023a124, (q31_t)0x3bbb8973, (q31_t)0xc024766a,
+    (q31_t)0x3baeffb3, (q31_t)0xc0254e27, (q31_t)0x3ba2761e, (q31_t)0xc0262859,
+    (q31_t)0x3b95ecb4, (q31_t)0xc0270502, (q31_t)0x3b896375, (q31_t)0xc027e421,
+    (q31_t)0x3b7cda63, (q31_t)0xc028c5b6, (q31_t)0x3b70517d, (q31_t)0xc029a9c1,
+    (q31_t)0x3b63c8c4, (q31_t)0xc02a9042, (q31_t)0x3b574039, (q31_t)0xc02b7939,
+    (q31_t)0x3b4ab7db, (q31_t)0xc02c64a6, (q31_t)0x3b3e2fac, (q31_t)0xc02d5289,
+    (q31_t)0x3b31a7ac, (q31_t)0xc02e42e2, (q31_t)0x3b251fdc, (q31_t)0xc02f35b1,
+    (q31_t)0x3b18983b, (q31_t)0xc0302af5, (q31_t)0x3b0c10cb, (q31_t)0xc03122b0,
+    (q31_t)0x3aff898c, (q31_t)0xc0321ce0, (q31_t)0x3af3027e, (q31_t)0xc0331986,
+    (q31_t)0x3ae67ba2, (q31_t)0xc03418a2, (q31_t)0x3ad9f4f8, (q31_t)0xc0351a33,
+    (q31_t)0x3acd6e81, (q31_t)0xc0361e3a, (q31_t)0x3ac0e83d, (q31_t)0xc03724b6,
+    (q31_t)0x3ab4622d, (q31_t)0xc0382da8, (q31_t)0x3aa7dc52, (q31_t)0xc0393910,
+    (q31_t)0x3a9b56ab, (q31_t)0xc03a46ed, (q31_t)0x3a8ed139, (q31_t)0xc03b573f,
+    (q31_t)0x3a824bfd, (q31_t)0xc03c6a07, (q31_t)0x3a75c6f8, (q31_t)0xc03d7f44,
+    (q31_t)0x3a694229, (q31_t)0xc03e96f6, (q31_t)0x3a5cbd91, (q31_t)0xc03fb11d,
+    (q31_t)0x3a503930, (q31_t)0xc040cdba, (q31_t)0x3a43b508, (q31_t)0xc041eccc,
+    (q31_t)0x3a373119, (q31_t)0xc0430e53, (q31_t)0x3a2aad62, (q31_t)0xc044324f,
+    (q31_t)0x3a1e29e5, (q31_t)0xc04558c0, (q31_t)0x3a11a6a3, (q31_t)0xc04681a6,
+    (q31_t)0x3a05239a, (q31_t)0xc047ad01, (q31_t)0x39f8a0cd, (q31_t)0xc048dad1,
+    (q31_t)0x39ec1e3b, (q31_t)0xc04a0b16, (q31_t)0x39df9be6, (q31_t)0xc04b3dcf,
+    (q31_t)0x39d319cc, (q31_t)0xc04c72fe, (q31_t)0x39c697f0, (q31_t)0xc04daaa1,
+    (q31_t)0x39ba1651, (q31_t)0xc04ee4b8, (q31_t)0x39ad94f0, (q31_t)0xc0502145,
+    (q31_t)0x39a113cd, (q31_t)0xc0516045, (q31_t)0x399492ea, (q31_t)0xc052a1bb,
+    (q31_t)0x39881245, (q31_t)0xc053e5a5, (q31_t)0x397b91e1, (q31_t)0xc0552c03,
+    (q31_t)0x396f11bc, (q31_t)0xc05674d6, (q31_t)0x396291d9, (q31_t)0xc057c01d,
+    (q31_t)0x39561237, (q31_t)0xc0590dd8, (q31_t)0x394992d7, (q31_t)0xc05a5e07,
+    (q31_t)0x393d13b8, (q31_t)0xc05bb0ab, (q31_t)0x393094dd, (q31_t)0xc05d05c3,
+    (q31_t)0x39241645, (q31_t)0xc05e5d4e, (q31_t)0x391797f0, (q31_t)0xc05fb74e,
+    (q31_t)0x390b19e0, (q31_t)0xc06113c2, (q31_t)0x38fe9c15, (q31_t)0xc06272aa,
+    (q31_t)0x38f21e8e, (q31_t)0xc063d405, (q31_t)0x38e5a14d, (q31_t)0xc06537d4,
+    (q31_t)0x38d92452, (q31_t)0xc0669e18, (q31_t)0x38cca79e, (q31_t)0xc06806ce,
+    (q31_t)0x38c02b31, (q31_t)0xc06971f9, (q31_t)0x38b3af0c, (q31_t)0xc06adf97,
+    (q31_t)0x38a7332e, (q31_t)0xc06c4fa8, (q31_t)0x389ab799, (q31_t)0xc06dc22e,
+    (q31_t)0x388e3c4d, (q31_t)0xc06f3726, (q31_t)0x3881c14b, (q31_t)0xc070ae92,
+    (q31_t)0x38754692, (q31_t)0xc0722871, (q31_t)0x3868cc24, (q31_t)0xc073a4c3,
+    (q31_t)0x385c5201, (q31_t)0xc0752389, (q31_t)0x384fd829, (q31_t)0xc076a4c2,
+    (q31_t)0x38435e9d, (q31_t)0xc078286e, (q31_t)0x3836e55d, (q31_t)0xc079ae8c,
+    (q31_t)0x382a6c6a, (q31_t)0xc07b371e, (q31_t)0x381df3c5, (q31_t)0xc07cc223,
+    (q31_t)0x38117b6d, (q31_t)0xc07e4f9b, (q31_t)0x38050364, (q31_t)0xc07fdf85,
+    (q31_t)0x37f88ba9, (q31_t)0xc08171e2, (q31_t)0x37ec143e, (q31_t)0xc08306b2,
+    (q31_t)0x37df9d22, (q31_t)0xc0849df4, (q31_t)0x37d32657, (q31_t)0xc08637a9,
+    (q31_t)0x37c6afdc, (q31_t)0xc087d3d0, (q31_t)0x37ba39b3, (q31_t)0xc089726a,
+    (q31_t)0x37adc3db, (q31_t)0xc08b1376, (q31_t)0x37a14e55, (q31_t)0xc08cb6f5,
+    (q31_t)0x3794d922, (q31_t)0xc08e5ce5, (q31_t)0x37886442, (q31_t)0xc0900548,
+    (q31_t)0x377befb5, (q31_t)0xc091b01d, (q31_t)0x376f7b7d, (q31_t)0xc0935d64,
+    (q31_t)0x37630799, (q31_t)0xc0950d1d, (q31_t)0x3756940a, (q31_t)0xc096bf48,
+    (q31_t)0x374a20d0, (q31_t)0xc09873e4, (q31_t)0x373daded, (q31_t)0xc09a2af3,
+    (q31_t)0x37313b60, (q31_t)0xc09be473, (q31_t)0x3724c92a, (q31_t)0xc09da065,
+    (q31_t)0x3718574b, (q31_t)0xc09f5ec8, (q31_t)0x370be5c4, (q31_t)0xc0a11f9d,
+    (q31_t)0x36ff7496, (q31_t)0xc0a2e2e3, (q31_t)0x36f303c0, (q31_t)0xc0a4a89b,
+    (q31_t)0x36e69344, (q31_t)0xc0a670c4, (q31_t)0x36da2321, (q31_t)0xc0a83b5e,
+    (q31_t)0x36cdb359, (q31_t)0xc0aa086a, (q31_t)0x36c143ec, (q31_t)0xc0abd7e6,
+    (q31_t)0x36b4d4d9, (q31_t)0xc0ada9d4, (q31_t)0x36a86623, (q31_t)0xc0af7e33,
+    (q31_t)0x369bf7c9, (q31_t)0xc0b15502, (q31_t)0x368f89cb, (q31_t)0xc0b32e42,
+    (q31_t)0x36831c2b, (q31_t)0xc0b509f3, (q31_t)0x3676aee8, (q31_t)0xc0b6e815,
+    (q31_t)0x366a4203, (q31_t)0xc0b8c8a7, (q31_t)0x365dd57d, (q31_t)0xc0baabaa,
+    (q31_t)0x36516956, (q31_t)0xc0bc911d, (q31_t)0x3644fd8f, (q31_t)0xc0be7901,
+    (q31_t)0x36389228, (q31_t)0xc0c06355, (q31_t)0x362c2721, (q31_t)0xc0c25019,
+    (q31_t)0x361fbc7b, (q31_t)0xc0c43f4d, (q31_t)0x36135237, (q31_t)0xc0c630f2,
+    (q31_t)0x3606e854, (q31_t)0xc0c82506, (q31_t)0x35fa7ed4, (q31_t)0xc0ca1b8a,
+    (q31_t)0x35ee15b7, (q31_t)0xc0cc147f, (q31_t)0x35e1acfd, (q31_t)0xc0ce0fe3,
+    (q31_t)0x35d544a7, (q31_t)0xc0d00db6, (q31_t)0x35c8dcb6, (q31_t)0xc0d20dfa,
+    (q31_t)0x35bc7529, (q31_t)0xc0d410ad, (q31_t)0x35b00e02, (q31_t)0xc0d615cf,
+    (q31_t)0x35a3a740, (q31_t)0xc0d81d61, (q31_t)0x359740e5, (q31_t)0xc0da2762,
+    (q31_t)0x358adaf0, (q31_t)0xc0dc33d2, (q31_t)0x357e7563, (q31_t)0xc0de42b2,
+    (q31_t)0x3572103d, (q31_t)0xc0e05401, (q31_t)0x3565ab80, (q31_t)0xc0e267be,
+    (q31_t)0x3559472b, (q31_t)0xc0e47deb, (q31_t)0x354ce33f, (q31_t)0xc0e69686,
+    (q31_t)0x35407fbd, (q31_t)0xc0e8b190, (q31_t)0x35341ca5, (q31_t)0xc0eacf09,
+    (q31_t)0x3527b9f7, (q31_t)0xc0eceef1, (q31_t)0x351b57b5, (q31_t)0xc0ef1147,
+    (q31_t)0x350ef5de, (q31_t)0xc0f1360b, (q31_t)0x35029473, (q31_t)0xc0f35d3e,
+    (q31_t)0x34f63374, (q31_t)0xc0f586df, (q31_t)0x34e9d2e3, (q31_t)0xc0f7b2ee,
+    (q31_t)0x34dd72be, (q31_t)0xc0f9e16b, (q31_t)0x34d11308, (q31_t)0xc0fc1257,
+    (q31_t)0x34c4b3c0, (q31_t)0xc0fe45b0, (q31_t)0x34b854e7, (q31_t)0xc1007b77,
+    (q31_t)0x34abf67e, (q31_t)0xc102b3ac, (q31_t)0x349f9884, (q31_t)0xc104ee4f,
+    (q31_t)0x34933afa, (q31_t)0xc1072b5f, (q31_t)0x3486dde1, (q31_t)0xc1096add,
+    (q31_t)0x347a8139, (q31_t)0xc10bacc8, (q31_t)0x346e2504, (q31_t)0xc10df120,
+    (q31_t)0x3461c940, (q31_t)0xc11037e6, (q31_t)0x34556def, (q31_t)0xc1128119,
+    (q31_t)0x34491311, (q31_t)0xc114ccb9, (q31_t)0x343cb8a7, (q31_t)0xc1171ac6,
+    (q31_t)0x34305eb0, (q31_t)0xc1196b3f, (q31_t)0x3424052f, (q31_t)0xc11bbe26,
+    (q31_t)0x3417ac22, (q31_t)0xc11e1379, (q31_t)0x340b538b, (q31_t)0xc1206b39,
+    (q31_t)0x33fefb6a, (q31_t)0xc122c566, (q31_t)0x33f2a3bf, (q31_t)0xc12521ff,
+    (q31_t)0x33e64c8c, (q31_t)0xc1278104, (q31_t)0x33d9f5cf, (q31_t)0xc129e276,
+    (q31_t)0x33cd9f8b, (q31_t)0xc12c4653, (q31_t)0x33c149bf, (q31_t)0xc12eac9d,
+    (q31_t)0x33b4f46c, (q31_t)0xc1311553, (q31_t)0x33a89f92, (q31_t)0xc1338075,
+    (q31_t)0x339c4b32, (q31_t)0xc135ee02, (q31_t)0x338ff74d, (q31_t)0xc1385dfb,
+    (q31_t)0x3383a3e2, (q31_t)0xc13ad060, (q31_t)0x337750f2, (q31_t)0xc13d4530,
+    (q31_t)0x336afe7e, (q31_t)0xc13fbc6c, (q31_t)0x335eac86, (q31_t)0xc1423613,
+    (q31_t)0x33525b0b, (q31_t)0xc144b225, (q31_t)0x33460a0d, (q31_t)0xc14730a3,
+    (q31_t)0x3339b98d, (q31_t)0xc149b18b, (q31_t)0x332d698a, (q31_t)0xc14c34df,
+    (q31_t)0x33211a07, (q31_t)0xc14eba9d, (q31_t)0x3314cb02, (q31_t)0xc15142c6,
+    (q31_t)0x33087c7d, (q31_t)0xc153cd5a, (q31_t)0x32fc2e77, (q31_t)0xc1565a58,
+    (q31_t)0x32efe0f2, (q31_t)0xc158e9c1, (q31_t)0x32e393ef, (q31_t)0xc15b7b94,
+    (q31_t)0x32d7476c, (q31_t)0xc15e0fd1, (q31_t)0x32cafb6b, (q31_t)0xc160a678,
+    (q31_t)0x32beafed, (q31_t)0xc1633f8a, (q31_t)0x32b264f2, (q31_t)0xc165db05,
+    (q31_t)0x32a61a7a, (q31_t)0xc16878eb, (q31_t)0x3299d085, (q31_t)0xc16b193a,
+    (q31_t)0x328d8715, (q31_t)0xc16dbbf3, (q31_t)0x32813e2a, (q31_t)0xc1706115,
+    (q31_t)0x3274f5c3, (q31_t)0xc17308a1, (q31_t)0x3268ade3, (q31_t)0xc175b296,
+    (q31_t)0x325c6688, (q31_t)0xc1785ef4, (q31_t)0x32501fb5, (q31_t)0xc17b0dbb,
+    (q31_t)0x3243d968, (q31_t)0xc17dbeec, (q31_t)0x323793a3, (q31_t)0xc1807285,
+    (q31_t)0x322b4e66, (q31_t)0xc1832888, (q31_t)0x321f09b1, (q31_t)0xc185e0f3,
+    (q31_t)0x3212c585, (q31_t)0xc1889bc6, (q31_t)0x320681e3, (q31_t)0xc18b5903,
+    (q31_t)0x31fa3ecb, (q31_t)0xc18e18a7, (q31_t)0x31edfc3d, (q31_t)0xc190dab4,
+    (q31_t)0x31e1ba3a, (q31_t)0xc1939f29, (q31_t)0x31d578c2, (q31_t)0xc1966606,
+    (q31_t)0x31c937d6, (q31_t)0xc1992f4c, (q31_t)0x31bcf777, (q31_t)0xc19bfaf9,
+    (q31_t)0x31b0b7a4, (q31_t)0xc19ec90d, (q31_t)0x31a4785e, (q31_t)0xc1a1998a,
+    (q31_t)0x319839a6, (q31_t)0xc1a46c6e, (q31_t)0x318bfb7d, (q31_t)0xc1a741b9,
+    (q31_t)0x317fbde2, (q31_t)0xc1aa196c, (q31_t)0x317380d6, (q31_t)0xc1acf386,
+    (q31_t)0x31674459, (q31_t)0xc1afd007, (q31_t)0x315b086d, (q31_t)0xc1b2aef0,
+    (q31_t)0x314ecd11, (q31_t)0xc1b5903f, (q31_t)0x31429247, (q31_t)0xc1b873f5,
+    (q31_t)0x3136580d, (q31_t)0xc1bb5a11, (q31_t)0x312a1e66, (q31_t)0xc1be4294,
+    (q31_t)0x311de551, (q31_t)0xc1c12d7e, (q31_t)0x3111accf, (q31_t)0xc1c41ace,
+    (q31_t)0x310574e0, (q31_t)0xc1c70a84, (q31_t)0x30f93d86, (q31_t)0xc1c9fca0,
+    (q31_t)0x30ed06bf, (q31_t)0xc1ccf122, (q31_t)0x30e0d08d, (q31_t)0xc1cfe80a,
+    (q31_t)0x30d49af1, (q31_t)0xc1d2e158, (q31_t)0x30c865ea, (q31_t)0xc1d5dd0c,
+    (q31_t)0x30bc317a, (q31_t)0xc1d8db25, (q31_t)0x30affda0, (q31_t)0xc1dbdba3,
+    (q31_t)0x30a3ca5d, (q31_t)0xc1dede87, (q31_t)0x309797b2, (q31_t)0xc1e1e3d0,
+    (q31_t)0x308b659f, (q31_t)0xc1e4eb7e, (q31_t)0x307f3424, (q31_t)0xc1e7f591,
+    (q31_t)0x30730342, (q31_t)0xc1eb0209, (q31_t)0x3066d2fa, (q31_t)0xc1ee10e5,
+    (q31_t)0x305aa34c, (q31_t)0xc1f12227, (q31_t)0x304e7438, (q31_t)0xc1f435cc,
+    (q31_t)0x304245c0, (q31_t)0xc1f74bd6, (q31_t)0x303617e2, (q31_t)0xc1fa6445,
+    (q31_t)0x3029eaa1, (q31_t)0xc1fd7f17, (q31_t)0x301dbdfb, (q31_t)0xc2009c4e,
+    (q31_t)0x301191f3, (q31_t)0xc203bbe8, (q31_t)0x30056687, (q31_t)0xc206dde6,
+    (q31_t)0x2ff93bba, (q31_t)0xc20a0248, (q31_t)0x2fed118a, (q31_t)0xc20d290d,
+    (q31_t)0x2fe0e7f9, (q31_t)0xc2105236, (q31_t)0x2fd4bf08, (q31_t)0xc2137dc2,
+    (q31_t)0x2fc896b5, (q31_t)0xc216abb1, (q31_t)0x2fbc6f03, (q31_t)0xc219dc03,
+    (q31_t)0x2fb047f2, (q31_t)0xc21d0eb8, (q31_t)0x2fa42181, (q31_t)0xc22043d0,
+    (q31_t)0x2f97fbb2, (q31_t)0xc2237b4b, (q31_t)0x2f8bd685, (q31_t)0xc226b528,
+    (q31_t)0x2f7fb1fa, (q31_t)0xc229f167, (q31_t)0x2f738e12, (q31_t)0xc22d3009,
+    (q31_t)0x2f676ace, (q31_t)0xc230710d, (q31_t)0x2f5b482d, (q31_t)0xc233b473,
+    (q31_t)0x2f4f2630, (q31_t)0xc236fa3b, (q31_t)0x2f4304d8, (q31_t)0xc23a4265,
+    (q31_t)0x2f36e426, (q31_t)0xc23d8cf1, (q31_t)0x2f2ac419, (q31_t)0xc240d9de,
+    (q31_t)0x2f1ea4b2, (q31_t)0xc244292c, (q31_t)0x2f1285f2, (q31_t)0xc2477adc,
+    (q31_t)0x2f0667d9, (q31_t)0xc24aceed, (q31_t)0x2efa4a67, (q31_t)0xc24e255e,
+    (q31_t)0x2eee2d9d, (q31_t)0xc2517e31, (q31_t)0x2ee2117c, (q31_t)0xc254d965,
+    (q31_t)0x2ed5f604, (q31_t)0xc25836f9, (q31_t)0x2ec9db35, (q31_t)0xc25b96ee,
+    (q31_t)0x2ebdc110, (q31_t)0xc25ef943, (q31_t)0x2eb1a796, (q31_t)0xc2625df8,
+    (q31_t)0x2ea58ec6, (q31_t)0xc265c50e, (q31_t)0x2e9976a1, (q31_t)0xc2692e83,
+    (q31_t)0x2e8d5f29, (q31_t)0xc26c9a58, (q31_t)0x2e81485c, (q31_t)0xc270088e,
+    (q31_t)0x2e75323c, (q31_t)0xc2737922, (q31_t)0x2e691cc9, (q31_t)0xc276ec16,
+    (q31_t)0x2e5d0804, (q31_t)0xc27a616a, (q31_t)0x2e50f3ed, (q31_t)0xc27dd91c,
+    (q31_t)0x2e44e084, (q31_t)0xc281532e, (q31_t)0x2e38cdcb, (q31_t)0xc284cf9f,
+    (q31_t)0x2e2cbbc1, (q31_t)0xc2884e6e, (q31_t)0x2e20aa67, (q31_t)0xc28bcf9c,
+    (q31_t)0x2e1499bd, (q31_t)0xc28f5329, (q31_t)0x2e0889c4, (q31_t)0xc292d914,
+    (q31_t)0x2dfc7a7c, (q31_t)0xc296615d, (q31_t)0x2df06be6, (q31_t)0xc299ec05,
+    (q31_t)0x2de45e03, (q31_t)0xc29d790a, (q31_t)0x2dd850d2, (q31_t)0xc2a1086d,
+    (q31_t)0x2dcc4454, (q31_t)0xc2a49a2e, (q31_t)0x2dc0388a, (q31_t)0xc2a82e4d,
+    (q31_t)0x2db42d74, (q31_t)0xc2abc4c9, (q31_t)0x2da82313, (q31_t)0xc2af5da2,
+    (q31_t)0x2d9c1967, (q31_t)0xc2b2f8d8, (q31_t)0x2d901070, (q31_t)0xc2b6966c,
+    (q31_t)0x2d84082f, (q31_t)0xc2ba365c, (q31_t)0x2d7800a5, (q31_t)0xc2bdd8a9,
+    (q31_t)0x2d6bf9d1, (q31_t)0xc2c17d52, (q31_t)0x2d5ff3b5, (q31_t)0xc2c52459,
+    (q31_t)0x2d53ee51, (q31_t)0xc2c8cdbb, (q31_t)0x2d47e9a5, (q31_t)0xc2cc7979,
+    (q31_t)0x2d3be5b1, (q31_t)0xc2d02794, (q31_t)0x2d2fe277, (q31_t)0xc2d3d80a,
+    (q31_t)0x2d23dff7, (q31_t)0xc2d78add, (q31_t)0x2d17de31, (q31_t)0xc2db400a,
+    (q31_t)0x2d0bdd25, (q31_t)0xc2def794, (q31_t)0x2cffdcd4, (q31_t)0xc2e2b178,
+    (q31_t)0x2cf3dd3f, (q31_t)0xc2e66db8, (q31_t)0x2ce7de66, (q31_t)0xc2ea2c53,
+    (q31_t)0x2cdbe04a, (q31_t)0xc2eded49, (q31_t)0x2ccfe2ea, (q31_t)0xc2f1b099,
+    (q31_t)0x2cc3e648, (q31_t)0xc2f57644, (q31_t)0x2cb7ea63, (q31_t)0xc2f93e4a,
+    (q31_t)0x2cabef3d, (q31_t)0xc2fd08a9, (q31_t)0x2c9ff4d6, (q31_t)0xc300d563,
+    (q31_t)0x2c93fb2e, (q31_t)0xc304a477, (q31_t)0x2c880245, (q31_t)0xc30875e5,
+    (q31_t)0x2c7c0a1d, (q31_t)0xc30c49ad, (q31_t)0x2c7012b5, (q31_t)0xc3101fce,
+    (q31_t)0x2c641c0e, (q31_t)0xc313f848, (q31_t)0x2c582629, (q31_t)0xc317d31c,
+    (q31_t)0x2c4c3106, (q31_t)0xc31bb049, (q31_t)0x2c403ca5, (q31_t)0xc31f8fcf,
+    (q31_t)0x2c344908, (q31_t)0xc32371ae, (q31_t)0x2c28562d, (q31_t)0xc32755e5,
+    (q31_t)0x2c1c6417, (q31_t)0xc32b3c75, (q31_t)0x2c1072c4, (q31_t)0xc32f255e,
+    (q31_t)0x2c048237, (q31_t)0xc333109e, (q31_t)0x2bf8926f, (q31_t)0xc336fe37,
+    (q31_t)0x2beca36c, (q31_t)0xc33aee27, (q31_t)0x2be0b52f, (q31_t)0xc33ee070,
+    (q31_t)0x2bd4c7ba, (q31_t)0xc342d510, (q31_t)0x2bc8db0b, (q31_t)0xc346cc07,
+    (q31_t)0x2bbcef23, (q31_t)0xc34ac556, (q31_t)0x2bb10404, (q31_t)0xc34ec0fc,
+    (q31_t)0x2ba519ad, (q31_t)0xc352bef9, (q31_t)0x2b99301f, (q31_t)0xc356bf4d,
+    (q31_t)0x2b8d475b, (q31_t)0xc35ac1f7, (q31_t)0x2b815f60, (q31_t)0xc35ec6f8,
+    (q31_t)0x2b75782f, (q31_t)0xc362ce50, (q31_t)0x2b6991ca, (q31_t)0xc366d7fd,
+    (q31_t)0x2b5dac2f, (q31_t)0xc36ae401, (q31_t)0x2b51c760, (q31_t)0xc36ef25b,
+    (q31_t)0x2b45e35d, (q31_t)0xc373030a, (q31_t)0x2b3a0027, (q31_t)0xc377160f,
+    (q31_t)0x2b2e1dbe, (q31_t)0xc37b2b6a, (q31_t)0x2b223c22, (q31_t)0xc37f4319,
+    (q31_t)0x2b165b54, (q31_t)0xc3835d1e, (q31_t)0x2b0a7b54, (q31_t)0xc3877978,
+    (q31_t)0x2afe9c24, (q31_t)0xc38b9827, (q31_t)0x2af2bdc3, (q31_t)0xc38fb92a,
+    (q31_t)0x2ae6e031, (q31_t)0xc393dc82, (q31_t)0x2adb0370, (q31_t)0xc398022f,
+    (q31_t)0x2acf277f, (q31_t)0xc39c2a2f, (q31_t)0x2ac34c60, (q31_t)0xc3a05484,
+    (q31_t)0x2ab77212, (q31_t)0xc3a4812c, (q31_t)0x2aab9896, (q31_t)0xc3a8b028,
+    (q31_t)0x2a9fbfed, (q31_t)0xc3ace178, (q31_t)0x2a93e817, (q31_t)0xc3b1151b,
+    (q31_t)0x2a881114, (q31_t)0xc3b54b11, (q31_t)0x2a7c3ae5, (q31_t)0xc3b9835a,
+    (q31_t)0x2a70658a, (q31_t)0xc3bdbdf6, (q31_t)0x2a649105, (q31_t)0xc3c1fae5,
+    (q31_t)0x2a58bd54, (q31_t)0xc3c63a26, (q31_t)0x2a4cea79, (q31_t)0xc3ca7bba,
+    (q31_t)0x2a411874, (q31_t)0xc3cebfa0, (q31_t)0x2a354746, (q31_t)0xc3d305d8,
+    (q31_t)0x2a2976ef, (q31_t)0xc3d74e62, (q31_t)0x2a1da770, (q31_t)0xc3db993e,
+    (q31_t)0x2a11d8c8, (q31_t)0xc3dfe66c, (q31_t)0x2a060af9, (q31_t)0xc3e435ea,
+    (q31_t)0x29fa3e03, (q31_t)0xc3e887bb, (q31_t)0x29ee71e6, (q31_t)0xc3ecdbdc,
+    (q31_t)0x29e2a6a3, (q31_t)0xc3f1324e, (q31_t)0x29d6dc3b, (q31_t)0xc3f58b10,
+    (q31_t)0x29cb12ad, (q31_t)0xc3f9e624, (q31_t)0x29bf49fa, (q31_t)0xc3fe4388,
+    (q31_t)0x29b38223, (q31_t)0xc402a33c, (q31_t)0x29a7bb28, (q31_t)0xc4070540,
+    (q31_t)0x299bf509, (q31_t)0xc40b6994, (q31_t)0x29902fc7, (q31_t)0xc40fd037,
+    (q31_t)0x29846b63, (q31_t)0xc414392b, (q31_t)0x2978a7dd, (q31_t)0xc418a46d,
+    (q31_t)0x296ce535, (q31_t)0xc41d11ff, (q31_t)0x2961236c, (q31_t)0xc42181e0,
+    (q31_t)0x29556282, (q31_t)0xc425f410, (q31_t)0x2949a278, (q31_t)0xc42a688f,
+    (q31_t)0x293de34e, (q31_t)0xc42edf5c, (q31_t)0x29322505, (q31_t)0xc4335877,
+    (q31_t)0x2926679c, (q31_t)0xc437d3e1, (q31_t)0x291aab16, (q31_t)0xc43c5199,
+    (q31_t)0x290eef71, (q31_t)0xc440d19e, (q31_t)0x290334af, (q31_t)0xc44553f2,
+    (q31_t)0x28f77acf, (q31_t)0xc449d892, (q31_t)0x28ebc1d3, (q31_t)0xc44e5f80,
+    (q31_t)0x28e009ba, (q31_t)0xc452e8bc, (q31_t)0x28d45286, (q31_t)0xc4577444,
+    (q31_t)0x28c89c37, (q31_t)0xc45c0219, (q31_t)0x28bce6cd, (q31_t)0xc460923b,
+    (q31_t)0x28b13248, (q31_t)0xc46524a9, (q31_t)0x28a57ea9, (q31_t)0xc469b963,
+    (q31_t)0x2899cbf1, (q31_t)0xc46e5069, (q31_t)0x288e1a20, (q31_t)0xc472e9bc,
+    (q31_t)0x28826936, (q31_t)0xc477855a, (q31_t)0x2876b934, (q31_t)0xc47c2344,
+    (q31_t)0x286b0a1a, (q31_t)0xc480c379, (q31_t)0x285f5be9, (q31_t)0xc48565f9,
+    (q31_t)0x2853aea1, (q31_t)0xc48a0ac4, (q31_t)0x28480243, (q31_t)0xc48eb1db,
+    (q31_t)0x283c56cf, (q31_t)0xc4935b3c, (q31_t)0x2830ac45, (q31_t)0xc49806e7,
+    (q31_t)0x282502a7, (q31_t)0xc49cb4dd, (q31_t)0x281959f4, (q31_t)0xc4a1651c,
+    (q31_t)0x280db22d, (q31_t)0xc4a617a6, (q31_t)0x28020b52, (q31_t)0xc4aacc7a,
+    (q31_t)0x27f66564, (q31_t)0xc4af8397, (q31_t)0x27eac063, (q31_t)0xc4b43cfd,
+    (q31_t)0x27df1c50, (q31_t)0xc4b8f8ad, (q31_t)0x27d3792b, (q31_t)0xc4bdb6a6,
+    (q31_t)0x27c7d6f4, (q31_t)0xc4c276e8, (q31_t)0x27bc35ad, (q31_t)0xc4c73972,
+    (q31_t)0x27b09555, (q31_t)0xc4cbfe45, (q31_t)0x27a4f5ed, (q31_t)0xc4d0c560,
+    (q31_t)0x27995776, (q31_t)0xc4d58ec3, (q31_t)0x278db9ef, (q31_t)0xc4da5a6f,
+    (q31_t)0x27821d59, (q31_t)0xc4df2862, (q31_t)0x277681b6, (q31_t)0xc4e3f89c,
+    (q31_t)0x276ae704, (q31_t)0xc4e8cb1e, (q31_t)0x275f4d45, (q31_t)0xc4ed9fe7,
+    (q31_t)0x2753b479, (q31_t)0xc4f276f7, (q31_t)0x27481ca1, (q31_t)0xc4f7504e,
+    (q31_t)0x273c85bc, (q31_t)0xc4fc2bec, (q31_t)0x2730efcc, (q31_t)0xc50109d0,
+    (q31_t)0x27255ad1, (q31_t)0xc505e9fb, (q31_t)0x2719c6cb, (q31_t)0xc50acc6b,
+    (q31_t)0x270e33bb, (q31_t)0xc50fb121, (q31_t)0x2702a1a1, (q31_t)0xc514981d,
+    (q31_t)0x26f7107e, (q31_t)0xc519815f, (q31_t)0x26eb8052, (q31_t)0xc51e6ce6,
+    (q31_t)0x26dff11d, (q31_t)0xc5235ab2, (q31_t)0x26d462e1, (q31_t)0xc5284ac3,
+    (q31_t)0x26c8d59c, (q31_t)0xc52d3d18, (q31_t)0x26bd4951, (q31_t)0xc53231b3,
+    (q31_t)0x26b1bdff, (q31_t)0xc5372891, (q31_t)0x26a633a6, (q31_t)0xc53c21b4,
+    (q31_t)0x269aaa48, (q31_t)0xc5411d1b, (q31_t)0x268f21e5, (q31_t)0xc5461ac6,
+    (q31_t)0x26839a7c, (q31_t)0xc54b1ab4, (q31_t)0x26781410, (q31_t)0xc5501ce5,
+    (q31_t)0x266c8e9f, (q31_t)0xc555215a, (q31_t)0x26610a2a, (q31_t)0xc55a2812,
+    (q31_t)0x265586b3, (q31_t)0xc55f310d, (q31_t)0x264a0438, (q31_t)0xc5643c4a,
+    (q31_t)0x263e82bc, (q31_t)0xc56949ca, (q31_t)0x2633023e, (q31_t)0xc56e598c,
+    (q31_t)0x262782be, (q31_t)0xc5736b90, (q31_t)0x261c043d, (q31_t)0xc5787fd6,
+    (q31_t)0x261086bc, (q31_t)0xc57d965d, (q31_t)0x26050a3b, (q31_t)0xc582af26,
+    (q31_t)0x25f98ebb, (q31_t)0xc587ca31, (q31_t)0x25ee143b, (q31_t)0xc58ce77c,
+    (q31_t)0x25e29abc, (q31_t)0xc5920708, (q31_t)0x25d72240, (q31_t)0xc59728d5,
+    (q31_t)0x25cbaac5, (q31_t)0xc59c4ce3, (q31_t)0x25c0344d, (q31_t)0xc5a17330,
+    (q31_t)0x25b4bed8, (q31_t)0xc5a69bbe, (q31_t)0x25a94a67, (q31_t)0xc5abc68c,
+    (q31_t)0x259dd6f9, (q31_t)0xc5b0f399, (q31_t)0x25926490, (q31_t)0xc5b622e6,
+    (q31_t)0x2586f32c, (q31_t)0xc5bb5472, (q31_t)0x257b82cd, (q31_t)0xc5c0883d,
+    (q31_t)0x25701374, (q31_t)0xc5c5be47, (q31_t)0x2564a521, (q31_t)0xc5caf690,
+    (q31_t)0x255937d5, (q31_t)0xc5d03118, (q31_t)0x254dcb8f, (q31_t)0xc5d56ddd,
+    (q31_t)0x25426051, (q31_t)0xc5daace1, (q31_t)0x2536f61b, (q31_t)0xc5dfee22,
+    (q31_t)0x252b8cee, (q31_t)0xc5e531a1, (q31_t)0x252024c9, (q31_t)0xc5ea775e,
+    (q31_t)0x2514bdad, (q31_t)0xc5efbf58, (q31_t)0x2509579b, (q31_t)0xc5f5098f,
+    (q31_t)0x24fdf294, (q31_t)0xc5fa5603, (q31_t)0x24f28e96, (q31_t)0xc5ffa4b3,
+    (q31_t)0x24e72ba4, (q31_t)0xc604f5a0, (q31_t)0x24dbc9bd, (q31_t)0xc60a48c9,
+    (q31_t)0x24d068e2, (q31_t)0xc60f9e2e, (q31_t)0x24c50914, (q31_t)0xc614f5cf,
+    (q31_t)0x24b9aa52, (q31_t)0xc61a4fac, (q31_t)0x24ae4c9d, (q31_t)0xc61fabc4,
+    (q31_t)0x24a2eff6, (q31_t)0xc6250a18, (q31_t)0x2497945d, (q31_t)0xc62a6aa6,
+    (q31_t)0x248c39d3, (q31_t)0xc62fcd6f, (q31_t)0x2480e057, (q31_t)0xc6353273,
+    (q31_t)0x247587eb, (q31_t)0xc63a99b1, (q31_t)0x246a308f, (q31_t)0xc6400329,
+    (q31_t)0x245eda43, (q31_t)0xc6456edb, (q31_t)0x24538507, (q31_t)0xc64adcc7,
+    (q31_t)0x244830dd, (q31_t)0xc6504ced, (q31_t)0x243cddc4, (q31_t)0xc655bf4c,
+    (q31_t)0x24318bbe, (q31_t)0xc65b33e4, (q31_t)0x24263ac9, (q31_t)0xc660aab5,
+    (q31_t)0x241aeae8, (q31_t)0xc66623be, (q31_t)0x240f9c1a, (q31_t)0xc66b9f01,
+    (q31_t)0x24044e60, (q31_t)0xc6711c7b, (q31_t)0x23f901ba, (q31_t)0xc6769c2e,
+    (q31_t)0x23edb628, (q31_t)0xc67c1e18, (q31_t)0x23e26bac, (q31_t)0xc681a23a,
+    (q31_t)0x23d72245, (q31_t)0xc6872894, (q31_t)0x23cbd9f4, (q31_t)0xc68cb124,
+    (q31_t)0x23c092b9, (q31_t)0xc6923bec, (q31_t)0x23b54c95, (q31_t)0xc697c8eb,
+    (q31_t)0x23aa0788, (q31_t)0xc69d5820, (q31_t)0x239ec393, (q31_t)0xc6a2e98b,
+    (q31_t)0x239380b6, (q31_t)0xc6a87d2d, (q31_t)0x23883ef2, (q31_t)0xc6ae1304,
+    (q31_t)0x237cfe47, (q31_t)0xc6b3ab12, (q31_t)0x2371beb5, (q31_t)0xc6b94554,
+    (q31_t)0x2366803c, (q31_t)0xc6bee1cd, (q31_t)0x235b42df, (q31_t)0xc6c4807a,
+    (q31_t)0x2350069b, (q31_t)0xc6ca215c, (q31_t)0x2344cb73, (q31_t)0xc6cfc472,
+    (q31_t)0x23399167, (q31_t)0xc6d569be, (q31_t)0x232e5876, (q31_t)0xc6db113d,
+    (q31_t)0x232320a2, (q31_t)0xc6e0baf0, (q31_t)0x2317e9eb, (q31_t)0xc6e666d7,
+    (q31_t)0x230cb451, (q31_t)0xc6ec14f2, (q31_t)0x23017fd5, (q31_t)0xc6f1c540,
+    (q31_t)0x22f64c77, (q31_t)0xc6f777c1, (q31_t)0x22eb1a37, (q31_t)0xc6fd2c75,
+    (q31_t)0x22dfe917, (q31_t)0xc702e35c, (q31_t)0x22d4b916, (q31_t)0xc7089c75,
+    (q31_t)0x22c98a35, (q31_t)0xc70e57c0, (q31_t)0x22be5c74, (q31_t)0xc714153e,
+    (q31_t)0x22b32fd4, (q31_t)0xc719d4ed, (q31_t)0x22a80456, (q31_t)0xc71f96ce,
+    (q31_t)0x229cd9f8, (q31_t)0xc7255ae0, (q31_t)0x2291b0bd, (q31_t)0xc72b2123,
+    (q31_t)0x228688a4, (q31_t)0xc730e997, (q31_t)0x227b61af, (q31_t)0xc736b43c,
+    (q31_t)0x22703bdc, (q31_t)0xc73c8111, (q31_t)0x2265172e, (q31_t)0xc7425016,
+    (q31_t)0x2259f3a3, (q31_t)0xc748214c, (q31_t)0x224ed13d, (q31_t)0xc74df4b1,
+    (q31_t)0x2243affc, (q31_t)0xc753ca46, (q31_t)0x22388fe1, (q31_t)0xc759a20a,
+    (q31_t)0x222d70eb, (q31_t)0xc75f7bfe, (q31_t)0x2222531c, (q31_t)0xc7655820,
+    (q31_t)0x22173674, (q31_t)0xc76b3671, (q31_t)0x220c1af3, (q31_t)0xc77116f0,
+    (q31_t)0x22010099, (q31_t)0xc776f99d, (q31_t)0x21f5e768, (q31_t)0xc77cde79,
+    (q31_t)0x21eacf5f, (q31_t)0xc782c582, (q31_t)0x21dfb87f, (q31_t)0xc788aeb9,
+    (q31_t)0x21d4a2c8, (q31_t)0xc78e9a1d, (q31_t)0x21c98e3b, (q31_t)0xc79487ae,
+    (q31_t)0x21be7ad8, (q31_t)0xc79a776c, (q31_t)0x21b368a0, (q31_t)0xc7a06957,
+    (q31_t)0x21a85793, (q31_t)0xc7a65d6e, (q31_t)0x219d47b1, (q31_t)0xc7ac53b1,
+    (q31_t)0x219238fb, (q31_t)0xc7b24c20, (q31_t)0x21872b72, (q31_t)0xc7b846ba,
+    (q31_t)0x217c1f15, (q31_t)0xc7be4381, (q31_t)0x217113e5, (q31_t)0xc7c44272,
+    (q31_t)0x216609e3, (q31_t)0xc7ca438f, (q31_t)0x215b0110, (q31_t)0xc7d046d6,
+    (q31_t)0x214ff96a, (q31_t)0xc7d64c47, (q31_t)0x2144f2f3, (q31_t)0xc7dc53e3,
+    (q31_t)0x2139edac, (q31_t)0xc7e25daa, (q31_t)0x212ee995, (q31_t)0xc7e8699a,
+    (q31_t)0x2123e6ad, (q31_t)0xc7ee77b3, (q31_t)0x2118e4f6, (q31_t)0xc7f487f6,
+    (q31_t)0x210de470, (q31_t)0xc7fa9a62, (q31_t)0x2102e51c, (q31_t)0xc800aef7,
+    (q31_t)0x20f7e6f9, (q31_t)0xc806c5b5, (q31_t)0x20ecea09, (q31_t)0xc80cde9b,
+    (q31_t)0x20e1ee4b, (q31_t)0xc812f9a9, (q31_t)0x20d6f3c1, (q31_t)0xc81916df,
+    (q31_t)0x20cbfa6a, (q31_t)0xc81f363d, (q31_t)0x20c10247, (q31_t)0xc82557c3,
+    (q31_t)0x20b60b58, (q31_t)0xc82b7b70, (q31_t)0x20ab159e, (q31_t)0xc831a143,
+    (q31_t)0x20a0211a, (q31_t)0xc837c93e, (q31_t)0x20952dcb, (q31_t)0xc83df35f,
+    (q31_t)0x208a3bb2, (q31_t)0xc8441fa6, (q31_t)0x207f4acf, (q31_t)0xc84a4e14,
+    (q31_t)0x20745b24, (q31_t)0xc8507ea7, (q31_t)0x20696cb0, (q31_t)0xc856b160,
+    (q31_t)0x205e7f74, (q31_t)0xc85ce63e, (q31_t)0x2053936f, (q31_t)0xc8631d42,
+    (q31_t)0x2048a8a4, (q31_t)0xc869566a, (q31_t)0x203dbf11, (q31_t)0xc86f91b7,
+    (q31_t)0x2032d6b8, (q31_t)0xc875cf28, (q31_t)0x2027ef99, (q31_t)0xc87c0ebd,
+    (q31_t)0x201d09b4, (q31_t)0xc8825077, (q31_t)0x2012250a, (q31_t)0xc8889454,
+    (q31_t)0x2007419b, (q31_t)0xc88eda54, (q31_t)0x1ffc5f67, (q31_t)0xc8952278,
+    (q31_t)0x1ff17e70, (q31_t)0xc89b6cbf, (q31_t)0x1fe69eb4, (q31_t)0xc8a1b928,
+    (q31_t)0x1fdbc036, (q31_t)0xc8a807b4, (q31_t)0x1fd0e2f5, (q31_t)0xc8ae5862,
+    (q31_t)0x1fc606f1, (q31_t)0xc8b4ab32, (q31_t)0x1fbb2c2c, (q31_t)0xc8bb0023,
+    (q31_t)0x1fb052a5, (q31_t)0xc8c15736, (q31_t)0x1fa57a5d, (q31_t)0xc8c7b06b,
+    (q31_t)0x1f9aa354, (q31_t)0xc8ce0bc0, (q31_t)0x1f8fcd8b, (q31_t)0xc8d46936,
+    (q31_t)0x1f84f902, (q31_t)0xc8dac8cd, (q31_t)0x1f7a25ba, (q31_t)0xc8e12a84,
+    (q31_t)0x1f6f53b3, (q31_t)0xc8e78e5b, (q31_t)0x1f6482ed, (q31_t)0xc8edf452,
+    (q31_t)0x1f59b369, (q31_t)0xc8f45c68, (q31_t)0x1f4ee527, (q31_t)0xc8fac69e,
+    (q31_t)0x1f441828, (q31_t)0xc90132f2, (q31_t)0x1f394c6b, (q31_t)0xc907a166,
+    (q31_t)0x1f2e81f3, (q31_t)0xc90e11f7, (q31_t)0x1f23b8be, (q31_t)0xc91484a8,
+    (q31_t)0x1f18f0ce, (q31_t)0xc91af976, (q31_t)0x1f0e2a22, (q31_t)0xc9217062,
+    (q31_t)0x1f0364bc, (q31_t)0xc927e96b, (q31_t)0x1ef8a09b, (q31_t)0xc92e6492,
+    (q31_t)0x1eedddc0, (q31_t)0xc934e1d6, (q31_t)0x1ee31c2b, (q31_t)0xc93b6137,
+    (q31_t)0x1ed85bdd, (q31_t)0xc941e2b4, (q31_t)0x1ecd9cd7, (q31_t)0xc948664d,
+    (q31_t)0x1ec2df18, (q31_t)0xc94eec03, (q31_t)0x1eb822a1, (q31_t)0xc95573d4,
+    (q31_t)0x1ead6773, (q31_t)0xc95bfdc1, (q31_t)0x1ea2ad8d, (q31_t)0xc96289c9,
+    (q31_t)0x1e97f4f1, (q31_t)0xc96917ec, (q31_t)0x1e8d3d9e, (q31_t)0xc96fa82a,
+    (q31_t)0x1e828796, (q31_t)0xc9763a83, (q31_t)0x1e77d2d8, (q31_t)0xc97ccef5,
+    (q31_t)0x1e6d1f65, (q31_t)0xc9836582, (q31_t)0x1e626d3e, (q31_t)0xc989fe29,
+    (q31_t)0x1e57bc62, (q31_t)0xc99098e9, (q31_t)0x1e4d0cd2, (q31_t)0xc99735c2,
+    (q31_t)0x1e425e8f, (q31_t)0xc99dd4b4, (q31_t)0x1e37b199, (q31_t)0xc9a475bf,
+    (q31_t)0x1e2d05f1, (q31_t)0xc9ab18e3, (q31_t)0x1e225b96, (q31_t)0xc9b1be1e,
+    (q31_t)0x1e17b28a, (q31_t)0xc9b86572, (q31_t)0x1e0d0acc, (q31_t)0xc9bf0edd,
+    (q31_t)0x1e02645d, (q31_t)0xc9c5ba60, (q31_t)0x1df7bf3e, (q31_t)0xc9cc67fa,
+    (q31_t)0x1ded1b6e, (q31_t)0xc9d317ab, (q31_t)0x1de278ef, (q31_t)0xc9d9c973,
+    (q31_t)0x1dd7d7c1, (q31_t)0xc9e07d51, (q31_t)0x1dcd37e4, (q31_t)0xc9e73346,
+    (q31_t)0x1dc29958, (q31_t)0xc9edeb50, (q31_t)0x1db7fc1e, (q31_t)0xc9f4a570,
+    (q31_t)0x1dad6036, (q31_t)0xc9fb61a5, (q31_t)0x1da2c5a2, (q31_t)0xca021fef,
+    (q31_t)0x1d982c60, (q31_t)0xca08e04f, (q31_t)0x1d8d9472, (q31_t)0xca0fa2c3,
+    (q31_t)0x1d82fdd8, (q31_t)0xca16674b, (q31_t)0x1d786892, (q31_t)0xca1d2de7,
+    (q31_t)0x1d6dd4a2, (q31_t)0xca23f698, (q31_t)0x1d634206, (q31_t)0xca2ac15b,
+    (q31_t)0x1d58b0c0, (q31_t)0xca318e32, (q31_t)0x1d4e20d0, (q31_t)0xca385d1d,
+    (q31_t)0x1d439236, (q31_t)0xca3f2e19, (q31_t)0x1d3904f4, (q31_t)0xca460129,
+    (q31_t)0x1d2e7908, (q31_t)0xca4cd64b, (q31_t)0x1d23ee74, (q31_t)0xca53ad7e,
+    (q31_t)0x1d196538, (q31_t)0xca5a86c4, (q31_t)0x1d0edd55, (q31_t)0xca61621b,
+    (q31_t)0x1d0456ca, (q31_t)0xca683f83, (q31_t)0x1cf9d199, (q31_t)0xca6f1efc,
+    (q31_t)0x1cef4dc2, (q31_t)0xca760086, (q31_t)0x1ce4cb44, (q31_t)0xca7ce420,
+    (q31_t)0x1cda4a21, (q31_t)0xca83c9ca, (q31_t)0x1ccfca59, (q31_t)0xca8ab184,
+    (q31_t)0x1cc54bec, (q31_t)0xca919b4e, (q31_t)0x1cbacedb, (q31_t)0xca988727,
+    (q31_t)0x1cb05326, (q31_t)0xca9f750f, (q31_t)0x1ca5d8cd, (q31_t)0xcaa66506,
+    (q31_t)0x1c9b5fd2, (q31_t)0xcaad570c, (q31_t)0x1c90e834, (q31_t)0xcab44b1f,
+    (q31_t)0x1c8671f3, (q31_t)0xcabb4141, (q31_t)0x1c7bfd11, (q31_t)0xcac23971,
+    (q31_t)0x1c71898d, (q31_t)0xcac933ae, (q31_t)0x1c671768, (q31_t)0xcad02ff8,
+    (q31_t)0x1c5ca6a2, (q31_t)0xcad72e4f, (q31_t)0x1c52373c, (q31_t)0xcade2eb3,
+    (q31_t)0x1c47c936, (q31_t)0xcae53123, (q31_t)0x1c3d5c91, (q31_t)0xcaec35a0,
+    (q31_t)0x1c32f14d, (q31_t)0xcaf33c28, (q31_t)0x1c28876a, (q31_t)0xcafa44bc,
+    (q31_t)0x1c1e1ee9, (q31_t)0xcb014f5b, (q31_t)0x1c13b7c9, (q31_t)0xcb085c05,
+    (q31_t)0x1c09520d, (q31_t)0xcb0f6aba, (q31_t)0x1bfeedb3, (q31_t)0xcb167b79,
+    (q31_t)0x1bf48abd, (q31_t)0xcb1d8e43, (q31_t)0x1bea292b, (q31_t)0xcb24a316,
+    (q31_t)0x1bdfc8fc, (q31_t)0xcb2bb9f4, (q31_t)0x1bd56a32, (q31_t)0xcb32d2da,
+    (q31_t)0x1bcb0cce, (q31_t)0xcb39edca, (q31_t)0x1bc0b0ce, (q31_t)0xcb410ac3,
+    (q31_t)0x1bb65634, (q31_t)0xcb4829c4, (q31_t)0x1babfd01, (q31_t)0xcb4f4acd,
+    (q31_t)0x1ba1a534, (q31_t)0xcb566ddf, (q31_t)0x1b974ece, (q31_t)0xcb5d92f8,
+    (q31_t)0x1b8cf9cf, (q31_t)0xcb64ba19, (q31_t)0x1b82a638, (q31_t)0xcb6be341,
+    (q31_t)0x1b785409, (q31_t)0xcb730e70, (q31_t)0x1b6e0342, (q31_t)0xcb7a3ba5,
+    (q31_t)0x1b63b3e5, (q31_t)0xcb816ae1, (q31_t)0x1b5965f1, (q31_t)0xcb889c23,
+    (q31_t)0x1b4f1967, (q31_t)0xcb8fcf6b, (q31_t)0x1b44ce46, (q31_t)0xcb9704b9,
+    (q31_t)0x1b3a8491, (q31_t)0xcb9e3c0b, (q31_t)0x1b303c46, (q31_t)0xcba57563,
+    (q31_t)0x1b25f566, (q31_t)0xcbacb0bf, (q31_t)0x1b1baff2, (q31_t)0xcbb3ee20,
+    (q31_t)0x1b116beb, (q31_t)0xcbbb2d85, (q31_t)0x1b072950, (q31_t)0xcbc26eee,
+    (q31_t)0x1afce821, (q31_t)0xcbc9b25a, (q31_t)0x1af2a860, (q31_t)0xcbd0f7ca,
+    (q31_t)0x1ae86a0d, (q31_t)0xcbd83f3d, (q31_t)0x1ade2d28, (q31_t)0xcbdf88b3,
+    (q31_t)0x1ad3f1b1, (q31_t)0xcbe6d42b, (q31_t)0x1ac9b7a9, (q31_t)0xcbee21a5,
+    (q31_t)0x1abf7f11, (q31_t)0xcbf57121, (q31_t)0x1ab547e8, (q31_t)0xcbfcc29f,
+    (q31_t)0x1aab122f, (q31_t)0xcc04161e, (q31_t)0x1aa0dde7, (q31_t)0xcc0b6b9e,
+    (q31_t)0x1a96ab0f, (q31_t)0xcc12c31f, (q31_t)0x1a8c79a9, (q31_t)0xcc1a1ca0,
+    (q31_t)0x1a8249b4, (q31_t)0xcc217822, (q31_t)0x1a781b31, (q31_t)0xcc28d5a3,
+    (q31_t)0x1a6dee21, (q31_t)0xcc303524, (q31_t)0x1a63c284, (q31_t)0xcc3796a5,
+    (q31_t)0x1a599859, (q31_t)0xcc3efa25, (q31_t)0x1a4f6fa3, (q31_t)0xcc465fa3,
+    (q31_t)0x1a454860, (q31_t)0xcc4dc720, (q31_t)0x1a3b2292, (q31_t)0xcc55309b,
+    (q31_t)0x1a30fe38, (q31_t)0xcc5c9c14, (q31_t)0x1a26db54, (q31_t)0xcc64098b,
+    (q31_t)0x1a1cb9e5, (q31_t)0xcc6b78ff, (q31_t)0x1a1299ec, (q31_t)0xcc72ea70,
+    (q31_t)0x1a087b69, (q31_t)0xcc7a5dde, (q31_t)0x19fe5e5e, (q31_t)0xcc81d349,
+    (q31_t)0x19f442c9, (q31_t)0xcc894aaf, (q31_t)0x19ea28ac, (q31_t)0xcc90c412,
+    (q31_t)0x19e01006, (q31_t)0xcc983f70, (q31_t)0x19d5f8d9, (q31_t)0xcc9fbcca,
+    (q31_t)0x19cbe325, (q31_t)0xcca73c1e, (q31_t)0x19c1cee9, (q31_t)0xccaebd6e,
+    (q31_t)0x19b7bc27, (q31_t)0xccb640b8, (q31_t)0x19adaadf, (q31_t)0xccbdc5fc,
+    (q31_t)0x19a39b11, (q31_t)0xccc54d3a, (q31_t)0x19998cbe, (q31_t)0xccccd671,
+    (q31_t)0x198f7fe6, (q31_t)0xccd461a2, (q31_t)0x19857489, (q31_t)0xccdbeecc,
+    (q31_t)0x197b6aa8, (q31_t)0xcce37def, (q31_t)0x19716243, (q31_t)0xcceb0f0a,
+    (q31_t)0x19675b5a, (q31_t)0xccf2a21d, (q31_t)0x195d55ef, (q31_t)0xccfa3729,
+    (q31_t)0x19535201, (q31_t)0xcd01ce2b, (q31_t)0x19494f90, (q31_t)0xcd096725,
+    (q31_t)0x193f4e9e, (q31_t)0xcd110216, (q31_t)0x19354f2a, (q31_t)0xcd189efe,
+    (q31_t)0x192b5135, (q31_t)0xcd203ddc, (q31_t)0x192154bf, (q31_t)0xcd27deb0,
+    (q31_t)0x191759c9, (q31_t)0xcd2f817b, (q31_t)0x190d6053, (q31_t)0xcd37263a,
+    (q31_t)0x1903685d, (q31_t)0xcd3eccef, (q31_t)0x18f971e8, (q31_t)0xcd467599,
+    (q31_t)0x18ef7cf4, (q31_t)0xcd4e2037, (q31_t)0x18e58982, (q31_t)0xcd55ccca,
+    (q31_t)0x18db9792, (q31_t)0xcd5d7b50, (q31_t)0x18d1a724, (q31_t)0xcd652bcb,
+    (q31_t)0x18c7b838, (q31_t)0xcd6cde39, (q31_t)0x18bdcad0, (q31_t)0xcd74929a,
+    (q31_t)0x18b3deeb, (q31_t)0xcd7c48ee, (q31_t)0x18a9f48a, (q31_t)0xcd840134,
+    (q31_t)0x18a00bae, (q31_t)0xcd8bbb6d, (q31_t)0x18962456, (q31_t)0xcd937798,
+    (q31_t)0x188c3e83, (q31_t)0xcd9b35b4, (q31_t)0x18825a35, (q31_t)0xcda2f5c2,
+    (q31_t)0x1878776d, (q31_t)0xcdaab7c0, (q31_t)0x186e962b, (q31_t)0xcdb27bb0,
+    (q31_t)0x1864b670, (q31_t)0xcdba4190, (q31_t)0x185ad83c, (q31_t)0xcdc20960,
+    (q31_t)0x1850fb8e, (q31_t)0xcdc9d320, (q31_t)0x18472069, (q31_t)0xcdd19ed0,
+    (q31_t)0x183d46cc, (q31_t)0xcdd96c6f, (q31_t)0x18336eb7, (q31_t)0xcde13bfd,
+    (q31_t)0x1829982b, (q31_t)0xcde90d79, (q31_t)0x181fc328, (q31_t)0xcdf0e0e4,
+    (q31_t)0x1815efae, (q31_t)0xcdf8b63d, (q31_t)0x180c1dbf, (q31_t)0xce008d84,
+    (q31_t)0x18024d59, (q31_t)0xce0866b8, (q31_t)0x17f87e7f, (q31_t)0xce1041d9,
+    (q31_t)0x17eeb130, (q31_t)0xce181ee8, (q31_t)0x17e4e56c, (q31_t)0xce1ffde2,
+    (q31_t)0x17db1b34, (q31_t)0xce27dec9, (q31_t)0x17d15288, (q31_t)0xce2fc19c,
+    (q31_t)0x17c78b68, (q31_t)0xce37a65b, (q31_t)0x17bdc5d6, (q31_t)0xce3f8d05,
+    (q31_t)0x17b401d1, (q31_t)0xce47759a, (q31_t)0x17aa3f5a, (q31_t)0xce4f6019,
+    (q31_t)0x17a07e70, (q31_t)0xce574c84, (q31_t)0x1796bf16, (q31_t)0xce5f3ad8,
+    (q31_t)0x178d014a, (q31_t)0xce672b16, (q31_t)0x1783450d, (q31_t)0xce6f1d3d,
+    (q31_t)0x17798a60, (q31_t)0xce77114e, (q31_t)0x176fd143, (q31_t)0xce7f0748,
+    (q31_t)0x176619b6, (q31_t)0xce86ff2a, (q31_t)0x175c63ba, (q31_t)0xce8ef8f4,
+    (q31_t)0x1752af4f, (q31_t)0xce96f4a7, (q31_t)0x1748fc75, (q31_t)0xce9ef241,
+    (q31_t)0x173f4b2e, (q31_t)0xcea6f1c2, (q31_t)0x17359b78, (q31_t)0xceaef32b,
+    (q31_t)0x172bed55, (q31_t)0xceb6f67a, (q31_t)0x172240c5, (q31_t)0xcebefbb0,
+    (q31_t)0x171895c9, (q31_t)0xcec702cb, (q31_t)0x170eec60, (q31_t)0xcecf0bcd,
+    (q31_t)0x1705448b, (q31_t)0xced716b4, (q31_t)0x16fb9e4b, (q31_t)0xcedf2380,
+    (q31_t)0x16f1f99f, (q31_t)0xcee73231, (q31_t)0x16e85689, (q31_t)0xceef42c7,
+    (q31_t)0x16deb508, (q31_t)0xcef75541, (q31_t)0x16d5151d, (q31_t)0xceff699f,
+    (q31_t)0x16cb76c9, (q31_t)0xcf077fe1, (q31_t)0x16c1da0b, (q31_t)0xcf0f9805,
+    (q31_t)0x16b83ee4, (q31_t)0xcf17b20d, (q31_t)0x16aea555, (q31_t)0xcf1fcdf8,
+    (q31_t)0x16a50d5d, (q31_t)0xcf27ebc5, (q31_t)0x169b76fe, (q31_t)0xcf300b74,
+    (q31_t)0x1691e237, (q31_t)0xcf382d05, (q31_t)0x16884f09, (q31_t)0xcf405077,
+    (q31_t)0x167ebd74, (q31_t)0xcf4875ca, (q31_t)0x16752d79, (q31_t)0xcf509cfe,
+    (q31_t)0x166b9f18, (q31_t)0xcf58c613, (q31_t)0x16621251, (q31_t)0xcf60f108,
+    (q31_t)0x16588725, (q31_t)0xcf691ddd, (q31_t)0x164efd94, (q31_t)0xcf714c91,
+    (q31_t)0x1645759f, (q31_t)0xcf797d24, (q31_t)0x163bef46, (q31_t)0xcf81af97,
+    (q31_t)0x16326a88, (q31_t)0xcf89e3e8, (q31_t)0x1628e767, (q31_t)0xcf921a17,
+    (q31_t)0x161f65e4, (q31_t)0xcf9a5225, (q31_t)0x1615e5fd, (q31_t)0xcfa28c10,
+    (q31_t)0x160c67b4, (q31_t)0xcfaac7d8, (q31_t)0x1602eb0a, (q31_t)0xcfb3057d,
+    (q31_t)0x15f96ffd, (q31_t)0xcfbb4500, (q31_t)0x15eff690, (q31_t)0xcfc3865e,
+    (q31_t)0x15e67ec1, (q31_t)0xcfcbc999, (q31_t)0x15dd0892, (q31_t)0xcfd40eaf,
+    (q31_t)0x15d39403, (q31_t)0xcfdc55a1, (q31_t)0x15ca2115, (q31_t)0xcfe49e6d,
+    (q31_t)0x15c0afc6, (q31_t)0xcfece915, (q31_t)0x15b74019, (q31_t)0xcff53597,
+    (q31_t)0x15add20d, (q31_t)0xcffd83f4, (q31_t)0x15a465a3, (q31_t)0xd005d42a,
+    (q31_t)0x159afadb, (q31_t)0xd00e2639, (q31_t)0x159191b5, (q31_t)0xd0167a22,
+    (q31_t)0x15882a32, (q31_t)0xd01ecfe4, (q31_t)0x157ec452, (q31_t)0xd027277e,
+    (q31_t)0x15756016, (q31_t)0xd02f80f1, (q31_t)0x156bfd7d, (q31_t)0xd037dc3b,
+    (q31_t)0x15629c89, (q31_t)0xd040395d, (q31_t)0x15593d3a, (q31_t)0xd0489856,
+    (q31_t)0x154fdf8f, (q31_t)0xd050f926, (q31_t)0x15468389, (q31_t)0xd0595bcd,
+    (q31_t)0x153d292a, (q31_t)0xd061c04a, (q31_t)0x1533d070, (q31_t)0xd06a269d,
+    (q31_t)0x152a795d, (q31_t)0xd0728ec6, (q31_t)0x152123f0, (q31_t)0xd07af8c4,
+    (q31_t)0x1517d02b, (q31_t)0xd0836497, (q31_t)0x150e7e0d, (q31_t)0xd08bd23f,
+    (q31_t)0x15052d97, (q31_t)0xd09441bb, (q31_t)0x14fbdec9, (q31_t)0xd09cb30b,
+    (q31_t)0x14f291a4, (q31_t)0xd0a5262f, (q31_t)0x14e94627, (q31_t)0xd0ad9b26,
+    (q31_t)0x14dffc54, (q31_t)0xd0b611f1, (q31_t)0x14d6b42b, (q31_t)0xd0be8a8d,
+    (q31_t)0x14cd6dab, (q31_t)0xd0c704fd, (q31_t)0x14c428d6, (q31_t)0xd0cf813e,
+    (q31_t)0x14bae5ab, (q31_t)0xd0d7ff51, (q31_t)0x14b1a42c, (q31_t)0xd0e07f36,
+    (q31_t)0x14a86458, (q31_t)0xd0e900ec, (q31_t)0x149f2630, (q31_t)0xd0f18472,
+    (q31_t)0x1495e9b3, (q31_t)0xd0fa09c9, (q31_t)0x148caee4, (q31_t)0xd10290f0,
+    (q31_t)0x148375c1, (q31_t)0xd10b19e7, (q31_t)0x147a3e4b, (q31_t)0xd113a4ad,
+    (q31_t)0x14710883, (q31_t)0xd11c3142, (q31_t)0x1467d469, (q31_t)0xd124bfa6,
+    (q31_t)0x145ea1fd, (q31_t)0xd12d4fd9, (q31_t)0x14557140, (q31_t)0xd135e1d9,
+    (q31_t)0x144c4232, (q31_t)0xd13e75a8, (q31_t)0x144314d3, (q31_t)0xd1470b44,
+    (q31_t)0x1439e923, (q31_t)0xd14fa2ad, (q31_t)0x1430bf24, (q31_t)0xd1583be2,
+    (q31_t)0x142796d5, (q31_t)0xd160d6e5, (q31_t)0x141e7037, (q31_t)0xd16973b3,
+    (q31_t)0x14154b4a, (q31_t)0xd172124d, (q31_t)0x140c280e, (q31_t)0xd17ab2b3,
+    (q31_t)0x14030684, (q31_t)0xd18354e4, (q31_t)0x13f9e6ad, (q31_t)0xd18bf8e0,
+    (q31_t)0x13f0c887, (q31_t)0xd1949ea6, (q31_t)0x13e7ac15, (q31_t)0xd19d4636,
+    (q31_t)0x13de9156, (q31_t)0xd1a5ef90, (q31_t)0x13d5784a, (q31_t)0xd1ae9ab4,
+    (q31_t)0x13cc60f2, (q31_t)0xd1b747a0, (q31_t)0x13c34b4f, (q31_t)0xd1bff656,
+    (q31_t)0x13ba3760, (q31_t)0xd1c8a6d4, (q31_t)0x13b12526, (q31_t)0xd1d1591a,
+    (q31_t)0x13a814a2, (q31_t)0xd1da0d28, (q31_t)0x139f05d3, (q31_t)0xd1e2c2fd,
+    (q31_t)0x1395f8ba, (q31_t)0xd1eb7a9a, (q31_t)0x138ced57, (q31_t)0xd1f433fd,
+    (q31_t)0x1383e3ab, (q31_t)0xd1fcef27, (q31_t)0x137adbb6, (q31_t)0xd205ac17,
+    (q31_t)0x1371d579, (q31_t)0xd20e6acc, (q31_t)0x1368d0f3, (q31_t)0xd2172b48,
+    (q31_t)0x135fce26, (q31_t)0xd21fed88, (q31_t)0x1356cd11, (q31_t)0xd228b18d,
+    (q31_t)0x134dcdb4, (q31_t)0xd2317756, (q31_t)0x1344d011, (q31_t)0xd23a3ee4,
+    (q31_t)0x133bd427, (q31_t)0xd2430835, (q31_t)0x1332d9f7, (q31_t)0xd24bd34a,
+    (q31_t)0x1329e181, (q31_t)0xd254a021, (q31_t)0x1320eac6, (q31_t)0xd25d6ebc,
+    (q31_t)0x1317f5c6, (q31_t)0xd2663f19, (q31_t)0x130f0280, (q31_t)0xd26f1138,
+    (q31_t)0x130610f7, (q31_t)0xd277e518, (q31_t)0x12fd2129, (q31_t)0xd280babb,
+    (q31_t)0x12f43318, (q31_t)0xd289921e, (q31_t)0x12eb46c3, (q31_t)0xd2926b41,
+    (q31_t)0x12e25c2b, (q31_t)0xd29b4626, (q31_t)0x12d97350, (q31_t)0xd2a422ca,
+    (q31_t)0x12d08c33, (q31_t)0xd2ad012e, (q31_t)0x12c7a6d4, (q31_t)0xd2b5e151,
+    (q31_t)0x12bec333, (q31_t)0xd2bec333, (q31_t)0x12b5e151, (q31_t)0xd2c7a6d4,
+    (q31_t)0x12ad012e, (q31_t)0xd2d08c33, (q31_t)0x12a422ca, (q31_t)0xd2d97350,
+    (q31_t)0x129b4626, (q31_t)0xd2e25c2b, (q31_t)0x12926b41, (q31_t)0xd2eb46c3,
+    (q31_t)0x1289921e, (q31_t)0xd2f43318, (q31_t)0x1280babb, (q31_t)0xd2fd2129,
+    (q31_t)0x1277e518, (q31_t)0xd30610f7, (q31_t)0x126f1138, (q31_t)0xd30f0280,
+    (q31_t)0x12663f19, (q31_t)0xd317f5c6, (q31_t)0x125d6ebc, (q31_t)0xd320eac6,
+    (q31_t)0x1254a021, (q31_t)0xd329e181, (q31_t)0x124bd34a, (q31_t)0xd332d9f7,
+    (q31_t)0x12430835, (q31_t)0xd33bd427, (q31_t)0x123a3ee4, (q31_t)0xd344d011,
+    (q31_t)0x12317756, (q31_t)0xd34dcdb4, (q31_t)0x1228b18d, (q31_t)0xd356cd11,
+    (q31_t)0x121fed88, (q31_t)0xd35fce26, (q31_t)0x12172b48, (q31_t)0xd368d0f3,
+    (q31_t)0x120e6acc, (q31_t)0xd371d579, (q31_t)0x1205ac17, (q31_t)0xd37adbb6,
+    (q31_t)0x11fcef27, (q31_t)0xd383e3ab, (q31_t)0x11f433fd, (q31_t)0xd38ced57,
+    (q31_t)0x11eb7a9a, (q31_t)0xd395f8ba, (q31_t)0x11e2c2fd, (q31_t)0xd39f05d3,
+    (q31_t)0x11da0d28, (q31_t)0xd3a814a2, (q31_t)0x11d1591a, (q31_t)0xd3b12526,
+    (q31_t)0x11c8a6d4, (q31_t)0xd3ba3760, (q31_t)0x11bff656, (q31_t)0xd3c34b4f,
+    (q31_t)0x11b747a0, (q31_t)0xd3cc60f2, (q31_t)0x11ae9ab4, (q31_t)0xd3d5784a,
+    (q31_t)0x11a5ef90, (q31_t)0xd3de9156, (q31_t)0x119d4636, (q31_t)0xd3e7ac15,
+    (q31_t)0x11949ea6, (q31_t)0xd3f0c887, (q31_t)0x118bf8e0, (q31_t)0xd3f9e6ad,
+    (q31_t)0x118354e4, (q31_t)0xd4030684, (q31_t)0x117ab2b3, (q31_t)0xd40c280e,
+    (q31_t)0x1172124d, (q31_t)0xd4154b4a, (q31_t)0x116973b3, (q31_t)0xd41e7037,
+    (q31_t)0x1160d6e5, (q31_t)0xd42796d5, (q31_t)0x11583be2, (q31_t)0xd430bf24,
+    (q31_t)0x114fa2ad, (q31_t)0xd439e923, (q31_t)0x11470b44, (q31_t)0xd44314d3,
+    (q31_t)0x113e75a8, (q31_t)0xd44c4232, (q31_t)0x1135e1d9, (q31_t)0xd4557140,
+    (q31_t)0x112d4fd9, (q31_t)0xd45ea1fd, (q31_t)0x1124bfa6, (q31_t)0xd467d469,
+    (q31_t)0x111c3142, (q31_t)0xd4710883, (q31_t)0x1113a4ad, (q31_t)0xd47a3e4b,
+    (q31_t)0x110b19e7, (q31_t)0xd48375c1, (q31_t)0x110290f0, (q31_t)0xd48caee4,
+    (q31_t)0x10fa09c9, (q31_t)0xd495e9b3, (q31_t)0x10f18472, (q31_t)0xd49f2630,
+    (q31_t)0x10e900ec, (q31_t)0xd4a86458, (q31_t)0x10e07f36, (q31_t)0xd4b1a42c,
+    (q31_t)0x10d7ff51, (q31_t)0xd4bae5ab, (q31_t)0x10cf813e, (q31_t)0xd4c428d6,
+    (q31_t)0x10c704fd, (q31_t)0xd4cd6dab, (q31_t)0x10be8a8d, (q31_t)0xd4d6b42b,
+    (q31_t)0x10b611f1, (q31_t)0xd4dffc54, (q31_t)0x10ad9b26, (q31_t)0xd4e94627,
+    (q31_t)0x10a5262f, (q31_t)0xd4f291a4, (q31_t)0x109cb30b, (q31_t)0xd4fbdec9,
+    (q31_t)0x109441bb, (q31_t)0xd5052d97, (q31_t)0x108bd23f, (q31_t)0xd50e7e0d,
+    (q31_t)0x10836497, (q31_t)0xd517d02b, (q31_t)0x107af8c4, (q31_t)0xd52123f0,
+    (q31_t)0x10728ec6, (q31_t)0xd52a795d, (q31_t)0x106a269d, (q31_t)0xd533d070,
+    (q31_t)0x1061c04a, (q31_t)0xd53d292a, (q31_t)0x10595bcd, (q31_t)0xd5468389,
+    (q31_t)0x1050f926, (q31_t)0xd54fdf8f, (q31_t)0x10489856, (q31_t)0xd5593d3a,
+    (q31_t)0x1040395d, (q31_t)0xd5629c89, (q31_t)0x1037dc3b, (q31_t)0xd56bfd7d,
+    (q31_t)0x102f80f1, (q31_t)0xd5756016, (q31_t)0x1027277e, (q31_t)0xd57ec452,
+    (q31_t)0x101ecfe4, (q31_t)0xd5882a32, (q31_t)0x10167a22, (q31_t)0xd59191b5,
+    (q31_t)0x100e2639, (q31_t)0xd59afadb, (q31_t)0x1005d42a, (q31_t)0xd5a465a3,
+    (q31_t)0xffd83f4, (q31_t)0xd5add20d, (q31_t)0xff53597, (q31_t)0xd5b74019,
+    (q31_t)0xfece915, (q31_t)0xd5c0afc6, (q31_t)0xfe49e6d, (q31_t)0xd5ca2115,
+    (q31_t)0xfdc55a1, (q31_t)0xd5d39403, (q31_t)0xfd40eaf, (q31_t)0xd5dd0892,
+    (q31_t)0xfcbc999, (q31_t)0xd5e67ec1, (q31_t)0xfc3865e, (q31_t)0xd5eff690,
+    (q31_t)0xfbb4500, (q31_t)0xd5f96ffd, (q31_t)0xfb3057d, (q31_t)0xd602eb0a,
+    (q31_t)0xfaac7d8, (q31_t)0xd60c67b4, (q31_t)0xfa28c10, (q31_t)0xd615e5fd,
+    (q31_t)0xf9a5225, (q31_t)0xd61f65e4, (q31_t)0xf921a17, (q31_t)0xd628e767,
+    (q31_t)0xf89e3e8, (q31_t)0xd6326a88, (q31_t)0xf81af97, (q31_t)0xd63bef46,
+    (q31_t)0xf797d24, (q31_t)0xd645759f, (q31_t)0xf714c91, (q31_t)0xd64efd94,
+    (q31_t)0xf691ddd, (q31_t)0xd6588725, (q31_t)0xf60f108, (q31_t)0xd6621251,
+    (q31_t)0xf58c613, (q31_t)0xd66b9f18, (q31_t)0xf509cfe, (q31_t)0xd6752d79,
+    (q31_t)0xf4875ca, (q31_t)0xd67ebd74, (q31_t)0xf405077, (q31_t)0xd6884f09,
+    (q31_t)0xf382d05, (q31_t)0xd691e237, (q31_t)0xf300b74, (q31_t)0xd69b76fe,
+    (q31_t)0xf27ebc5, (q31_t)0xd6a50d5d, (q31_t)0xf1fcdf8, (q31_t)0xd6aea555,
+    (q31_t)0xf17b20d, (q31_t)0xd6b83ee4, (q31_t)0xf0f9805, (q31_t)0xd6c1da0b,
+    (q31_t)0xf077fe1, (q31_t)0xd6cb76c9, (q31_t)0xeff699f, (q31_t)0xd6d5151d,
+    (q31_t)0xef75541, (q31_t)0xd6deb508, (q31_t)0xeef42c7, (q31_t)0xd6e85689,
+    (q31_t)0xee73231, (q31_t)0xd6f1f99f, (q31_t)0xedf2380, (q31_t)0xd6fb9e4b,
+    (q31_t)0xed716b4, (q31_t)0xd705448b, (q31_t)0xecf0bcd, (q31_t)0xd70eec60,
+    (q31_t)0xec702cb, (q31_t)0xd71895c9, (q31_t)0xebefbb0, (q31_t)0xd72240c5,
+    (q31_t)0xeb6f67a, (q31_t)0xd72bed55, (q31_t)0xeaef32b, (q31_t)0xd7359b78,
+    (q31_t)0xea6f1c2, (q31_t)0xd73f4b2e, (q31_t)0xe9ef241, (q31_t)0xd748fc75,
+    (q31_t)0xe96f4a7, (q31_t)0xd752af4f, (q31_t)0xe8ef8f4, (q31_t)0xd75c63ba,
+    (q31_t)0xe86ff2a, (q31_t)0xd76619b6, (q31_t)0xe7f0748, (q31_t)0xd76fd143,
+    (q31_t)0xe77114e, (q31_t)0xd7798a60, (q31_t)0xe6f1d3d, (q31_t)0xd783450d,
+    (q31_t)0xe672b16, (q31_t)0xd78d014a, (q31_t)0xe5f3ad8, (q31_t)0xd796bf16,
+    (q31_t)0xe574c84, (q31_t)0xd7a07e70, (q31_t)0xe4f6019, (q31_t)0xd7aa3f5a,
+    (q31_t)0xe47759a, (q31_t)0xd7b401d1, (q31_t)0xe3f8d05, (q31_t)0xd7bdc5d6,
+    (q31_t)0xe37a65b, (q31_t)0xd7c78b68, (q31_t)0xe2fc19c, (q31_t)0xd7d15288,
+    (q31_t)0xe27dec9, (q31_t)0xd7db1b34, (q31_t)0xe1ffde2, (q31_t)0xd7e4e56c,
+    (q31_t)0xe181ee8, (q31_t)0xd7eeb130, (q31_t)0xe1041d9, (q31_t)0xd7f87e7f,
+    (q31_t)0xe0866b8, (q31_t)0xd8024d59, (q31_t)0xe008d84, (q31_t)0xd80c1dbf,
+    (q31_t)0xdf8b63d, (q31_t)0xd815efae, (q31_t)0xdf0e0e4, (q31_t)0xd81fc328,
+    (q31_t)0xde90d79, (q31_t)0xd829982b, (q31_t)0xde13bfd, (q31_t)0xd8336eb7,
+    (q31_t)0xdd96c6f, (q31_t)0xd83d46cc, (q31_t)0xdd19ed0, (q31_t)0xd8472069,
+    (q31_t)0xdc9d320, (q31_t)0xd850fb8e, (q31_t)0xdc20960, (q31_t)0xd85ad83c,
+    (q31_t)0xdba4190, (q31_t)0xd864b670, (q31_t)0xdb27bb0, (q31_t)0xd86e962b,
+    (q31_t)0xdaab7c0, (q31_t)0xd878776d, (q31_t)0xda2f5c2, (q31_t)0xd8825a35,
+    (q31_t)0xd9b35b4, (q31_t)0xd88c3e83, (q31_t)0xd937798, (q31_t)0xd8962456,
+    (q31_t)0xd8bbb6d, (q31_t)0xd8a00bae, (q31_t)0xd840134, (q31_t)0xd8a9f48a,
+    (q31_t)0xd7c48ee, (q31_t)0xd8b3deeb, (q31_t)0xd74929a, (q31_t)0xd8bdcad0,
+    (q31_t)0xd6cde39, (q31_t)0xd8c7b838, (q31_t)0xd652bcb, (q31_t)0xd8d1a724,
+    (q31_t)0xd5d7b50, (q31_t)0xd8db9792, (q31_t)0xd55ccca, (q31_t)0xd8e58982,
+    (q31_t)0xd4e2037, (q31_t)0xd8ef7cf4, (q31_t)0xd467599, (q31_t)0xd8f971e8,
+    (q31_t)0xd3eccef, (q31_t)0xd903685d, (q31_t)0xd37263a, (q31_t)0xd90d6053,
+    (q31_t)0xd2f817b, (q31_t)0xd91759c9, (q31_t)0xd27deb0, (q31_t)0xd92154bf,
+    (q31_t)0xd203ddc, (q31_t)0xd92b5135, (q31_t)0xd189efe, (q31_t)0xd9354f2a,
+    (q31_t)0xd110216, (q31_t)0xd93f4e9e, (q31_t)0xd096725, (q31_t)0xd9494f90,
+    (q31_t)0xd01ce2b, (q31_t)0xd9535201, (q31_t)0xcfa3729, (q31_t)0xd95d55ef,
+    (q31_t)0xcf2a21d, (q31_t)0xd9675b5a, (q31_t)0xceb0f0a, (q31_t)0xd9716243,
+    (q31_t)0xce37def, (q31_t)0xd97b6aa8, (q31_t)0xcdbeecc, (q31_t)0xd9857489,
+    (q31_t)0xcd461a2, (q31_t)0xd98f7fe6, (q31_t)0xcccd671, (q31_t)0xd9998cbe,
+    (q31_t)0xcc54d3a, (q31_t)0xd9a39b11, (q31_t)0xcbdc5fc, (q31_t)0xd9adaadf,
+    (q31_t)0xcb640b8, (q31_t)0xd9b7bc27, (q31_t)0xcaebd6e, (q31_t)0xd9c1cee9,
+    (q31_t)0xca73c1e, (q31_t)0xd9cbe325, (q31_t)0xc9fbcca, (q31_t)0xd9d5f8d9,
+    (q31_t)0xc983f70, (q31_t)0xd9e01006, (q31_t)0xc90c412, (q31_t)0xd9ea28ac,
+    (q31_t)0xc894aaf, (q31_t)0xd9f442c9, (q31_t)0xc81d349, (q31_t)0xd9fe5e5e,
+    (q31_t)0xc7a5dde, (q31_t)0xda087b69, (q31_t)0xc72ea70, (q31_t)0xda1299ec,
+    (q31_t)0xc6b78ff, (q31_t)0xda1cb9e5, (q31_t)0xc64098b, (q31_t)0xda26db54,
+    (q31_t)0xc5c9c14, (q31_t)0xda30fe38, (q31_t)0xc55309b, (q31_t)0xda3b2292,
+    (q31_t)0xc4dc720, (q31_t)0xda454860, (q31_t)0xc465fa3, (q31_t)0xda4f6fa3,
+    (q31_t)0xc3efa25, (q31_t)0xda599859, (q31_t)0xc3796a5, (q31_t)0xda63c284,
+    (q31_t)0xc303524, (q31_t)0xda6dee21, (q31_t)0xc28d5a3, (q31_t)0xda781b31,
+    (q31_t)0xc217822, (q31_t)0xda8249b4, (q31_t)0xc1a1ca0, (q31_t)0xda8c79a9,
+    (q31_t)0xc12c31f, (q31_t)0xda96ab0f, (q31_t)0xc0b6b9e, (q31_t)0xdaa0dde7,
+    (q31_t)0xc04161e, (q31_t)0xdaab122f, (q31_t)0xbfcc29f, (q31_t)0xdab547e8,
+    (q31_t)0xbf57121, (q31_t)0xdabf7f11, (q31_t)0xbee21a5, (q31_t)0xdac9b7a9,
+    (q31_t)0xbe6d42b, (q31_t)0xdad3f1b1, (q31_t)0xbdf88b3, (q31_t)0xdade2d28,
+    (q31_t)0xbd83f3d, (q31_t)0xdae86a0d, (q31_t)0xbd0f7ca, (q31_t)0xdaf2a860,
+    (q31_t)0xbc9b25a, (q31_t)0xdafce821, (q31_t)0xbc26eee, (q31_t)0xdb072950,
+    (q31_t)0xbbb2d85, (q31_t)0xdb116beb, (q31_t)0xbb3ee20, (q31_t)0xdb1baff2,
+    (q31_t)0xbacb0bf, (q31_t)0xdb25f566, (q31_t)0xba57563, (q31_t)0xdb303c46,
+    (q31_t)0xb9e3c0b, (q31_t)0xdb3a8491, (q31_t)0xb9704b9, (q31_t)0xdb44ce46,
+    (q31_t)0xb8fcf6b, (q31_t)0xdb4f1967, (q31_t)0xb889c23, (q31_t)0xdb5965f1,
+    (q31_t)0xb816ae1, (q31_t)0xdb63b3e5, (q31_t)0xb7a3ba5, (q31_t)0xdb6e0342,
+    (q31_t)0xb730e70, (q31_t)0xdb785409, (q31_t)0xb6be341, (q31_t)0xdb82a638,
+    (q31_t)0xb64ba19, (q31_t)0xdb8cf9cf, (q31_t)0xb5d92f8, (q31_t)0xdb974ece,
+    (q31_t)0xb566ddf, (q31_t)0xdba1a534, (q31_t)0xb4f4acd, (q31_t)0xdbabfd01,
+    (q31_t)0xb4829c4, (q31_t)0xdbb65634, (q31_t)0xb410ac3, (q31_t)0xdbc0b0ce,
+    (q31_t)0xb39edca, (q31_t)0xdbcb0cce, (q31_t)0xb32d2da, (q31_t)0xdbd56a32,
+    (q31_t)0xb2bb9f4, (q31_t)0xdbdfc8fc, (q31_t)0xb24a316, (q31_t)0xdbea292b,
+    (q31_t)0xb1d8e43, (q31_t)0xdbf48abd, (q31_t)0xb167b79, (q31_t)0xdbfeedb3,
+    (q31_t)0xb0f6aba, (q31_t)0xdc09520d, (q31_t)0xb085c05, (q31_t)0xdc13b7c9,
+    (q31_t)0xb014f5b, (q31_t)0xdc1e1ee9, (q31_t)0xafa44bc, (q31_t)0xdc28876a,
+    (q31_t)0xaf33c28, (q31_t)0xdc32f14d, (q31_t)0xaec35a0, (q31_t)0xdc3d5c91,
+    (q31_t)0xae53123, (q31_t)0xdc47c936, (q31_t)0xade2eb3, (q31_t)0xdc52373c,
+    (q31_t)0xad72e4f, (q31_t)0xdc5ca6a2, (q31_t)0xad02ff8, (q31_t)0xdc671768,
+    (q31_t)0xac933ae, (q31_t)0xdc71898d, (q31_t)0xac23971, (q31_t)0xdc7bfd11,
+    (q31_t)0xabb4141, (q31_t)0xdc8671f3, (q31_t)0xab44b1f, (q31_t)0xdc90e834,
+    (q31_t)0xaad570c, (q31_t)0xdc9b5fd2, (q31_t)0xaa66506, (q31_t)0xdca5d8cd,
+    (q31_t)0xa9f750f, (q31_t)0xdcb05326, (q31_t)0xa988727, (q31_t)0xdcbacedb,
+    (q31_t)0xa919b4e, (q31_t)0xdcc54bec, (q31_t)0xa8ab184, (q31_t)0xdccfca59,
+    (q31_t)0xa83c9ca, (q31_t)0xdcda4a21, (q31_t)0xa7ce420, (q31_t)0xdce4cb44,
+    (q31_t)0xa760086, (q31_t)0xdcef4dc2, (q31_t)0xa6f1efc, (q31_t)0xdcf9d199,
+    (q31_t)0xa683f83, (q31_t)0xdd0456ca, (q31_t)0xa61621b, (q31_t)0xdd0edd55,
+    (q31_t)0xa5a86c4, (q31_t)0xdd196538, (q31_t)0xa53ad7e, (q31_t)0xdd23ee74,
+    (q31_t)0xa4cd64b, (q31_t)0xdd2e7908, (q31_t)0xa460129, (q31_t)0xdd3904f4,
+    (q31_t)0xa3f2e19, (q31_t)0xdd439236, (q31_t)0xa385d1d, (q31_t)0xdd4e20d0,
+    (q31_t)0xa318e32, (q31_t)0xdd58b0c0, (q31_t)0xa2ac15b, (q31_t)0xdd634206,
+    (q31_t)0xa23f698, (q31_t)0xdd6dd4a2, (q31_t)0xa1d2de7, (q31_t)0xdd786892,
+    (q31_t)0xa16674b, (q31_t)0xdd82fdd8, (q31_t)0xa0fa2c3, (q31_t)0xdd8d9472,
+    (q31_t)0xa08e04f, (q31_t)0xdd982c60, (q31_t)0xa021fef, (q31_t)0xdda2c5a2,
+    (q31_t)0x9fb61a5, (q31_t)0xddad6036, (q31_t)0x9f4a570, (q31_t)0xddb7fc1e,
+    (q31_t)0x9edeb50, (q31_t)0xddc29958, (q31_t)0x9e73346, (q31_t)0xddcd37e4,
+    (q31_t)0x9e07d51, (q31_t)0xddd7d7c1, (q31_t)0x9d9c973, (q31_t)0xdde278ef,
+    (q31_t)0x9d317ab, (q31_t)0xdded1b6e, (q31_t)0x9cc67fa, (q31_t)0xddf7bf3e,
+    (q31_t)0x9c5ba60, (q31_t)0xde02645d, (q31_t)0x9bf0edd, (q31_t)0xde0d0acc,
+    (q31_t)0x9b86572, (q31_t)0xde17b28a, (q31_t)0x9b1be1e, (q31_t)0xde225b96,
+    (q31_t)0x9ab18e3, (q31_t)0xde2d05f1, (q31_t)0x9a475bf, (q31_t)0xde37b199,
+    (q31_t)0x99dd4b4, (q31_t)0xde425e8f, (q31_t)0x99735c2, (q31_t)0xde4d0cd2,
+    (q31_t)0x99098e9, (q31_t)0xde57bc62, (q31_t)0x989fe29, (q31_t)0xde626d3e,
+    (q31_t)0x9836582, (q31_t)0xde6d1f65, (q31_t)0x97ccef5, (q31_t)0xde77d2d8,
+    (q31_t)0x9763a83, (q31_t)0xde828796, (q31_t)0x96fa82a, (q31_t)0xde8d3d9e,
+    (q31_t)0x96917ec, (q31_t)0xde97f4f1, (q31_t)0x96289c9, (q31_t)0xdea2ad8d,
+    (q31_t)0x95bfdc1, (q31_t)0xdead6773, (q31_t)0x95573d4, (q31_t)0xdeb822a1,
+    (q31_t)0x94eec03, (q31_t)0xdec2df18, (q31_t)0x948664d, (q31_t)0xdecd9cd7,
+    (q31_t)0x941e2b4, (q31_t)0xded85bdd, (q31_t)0x93b6137, (q31_t)0xdee31c2b,
+    (q31_t)0x934e1d6, (q31_t)0xdeedddc0, (q31_t)0x92e6492, (q31_t)0xdef8a09b,
+    (q31_t)0x927e96b, (q31_t)0xdf0364bc, (q31_t)0x9217062, (q31_t)0xdf0e2a22,
+    (q31_t)0x91af976, (q31_t)0xdf18f0ce, (q31_t)0x91484a8, (q31_t)0xdf23b8be,
+    (q31_t)0x90e11f7, (q31_t)0xdf2e81f3, (q31_t)0x907a166, (q31_t)0xdf394c6b,
+    (q31_t)0x90132f2, (q31_t)0xdf441828, (q31_t)0x8fac69e, (q31_t)0xdf4ee527,
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+    (q31_t)0x8dac8cd, (q31_t)0xdf84f902, (q31_t)0x8d46936, (q31_t)0xdf8fcd8b,
+    (q31_t)0x8ce0bc0, (q31_t)0xdf9aa354, (q31_t)0x8c7b06b, (q31_t)0xdfa57a5d,
+    (q31_t)0x8c15736, (q31_t)0xdfb052a5, (q31_t)0x8bb0023, (q31_t)0xdfbb2c2c,
+    (q31_t)0x8b4ab32, (q31_t)0xdfc606f1, (q31_t)0x8ae5862, (q31_t)0xdfd0e2f5,
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+    (q31_t)0x89b6cbf, (q31_t)0xdff17e70, (q31_t)0x8952278, (q31_t)0xdffc5f67,
+    (q31_t)0x88eda54, (q31_t)0xe007419b, (q31_t)0x8889454, (q31_t)0xe012250a,
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+    (q31_t)0x85ce63e, (q31_t)0xe05e7f74, (q31_t)0x856b160, (q31_t)0xe0696cb0,
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+    (q31_t)0x776f99d, (q31_t)0xe2010099, (q31_t)0x77116f0, (q31_t)0xe20c1af3,
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+    (q31_t)0x4d58ec3, (q31_t)0xe7995776, (q31_t)0x4d0c560, (q31_t)0xe7a4f5ed,
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+    (q31_t)0x4a617a6, (q31_t)0xe80db22d, (q31_t)0x4a1651c, (q31_t)0xe81959f4,
+    (q31_t)0x49cb4dd, (q31_t)0xe82502a7, (q31_t)0x49806e7, (q31_t)0xe830ac45,
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+    (q31_t)0x480c379, (q31_t)0xe86b0a1a, (q31_t)0x47c2344, (q31_t)0xe876b934,
+    (q31_t)0x477855a, (q31_t)0xe8826936, (q31_t)0x472e9bc, (q31_t)0xe88e1a20,
+    (q31_t)0x46e5069, (q31_t)0xe899cbf1, (q31_t)0x469b963, (q31_t)0xe8a57ea9,
+    (q31_t)0x46524a9, (q31_t)0xe8b13248, (q31_t)0x460923b, (q31_t)0xe8bce6cd,
+    (q31_t)0x45c0219, (q31_t)0xe8c89c37, (q31_t)0x4577444, (q31_t)0xe8d45286,
+    (q31_t)0x452e8bc, (q31_t)0xe8e009ba, (q31_t)0x44e5f80, (q31_t)0xe8ebc1d3,
+    (q31_t)0x449d892, (q31_t)0xe8f77acf, (q31_t)0x44553f2, (q31_t)0xe90334af,
+    (q31_t)0x440d19e, (q31_t)0xe90eef71, (q31_t)0x43c5199, (q31_t)0xe91aab16,
+    (q31_t)0x437d3e1, (q31_t)0xe926679c, (q31_t)0x4335877, (q31_t)0xe9322505,
+    (q31_t)0x42edf5c, (q31_t)0xe93de34e, (q31_t)0x42a688f, (q31_t)0xe949a278,
+    (q31_t)0x425f410, (q31_t)0xe9556282, (q31_t)0x42181e0, (q31_t)0xe961236c,
+    (q31_t)0x41d11ff, (q31_t)0xe96ce535, (q31_t)0x418a46d, (q31_t)0xe978a7dd,
+    (q31_t)0x414392b, (q31_t)0xe9846b63, (q31_t)0x40fd037, (q31_t)0xe9902fc7,
+    (q31_t)0x40b6994, (q31_t)0xe99bf509, (q31_t)0x4070540, (q31_t)0xe9a7bb28,
+    (q31_t)0x402a33c, (q31_t)0xe9b38223, (q31_t)0x3fe4388, (q31_t)0xe9bf49fa,
+    (q31_t)0x3f9e624, (q31_t)0xe9cb12ad, (q31_t)0x3f58b10, (q31_t)0xe9d6dc3b,
+    (q31_t)0x3f1324e, (q31_t)0xe9e2a6a3, (q31_t)0x3ecdbdc, (q31_t)0xe9ee71e6,
+    (q31_t)0x3e887bb, (q31_t)0xe9fa3e03, (q31_t)0x3e435ea, (q31_t)0xea060af9,
+    (q31_t)0x3dfe66c, (q31_t)0xea11d8c8, (q31_t)0x3db993e, (q31_t)0xea1da770,
+    (q31_t)0x3d74e62, (q31_t)0xea2976ef, (q31_t)0x3d305d8, (q31_t)0xea354746,
+    (q31_t)0x3cebfa0, (q31_t)0xea411874, (q31_t)0x3ca7bba, (q31_t)0xea4cea79,
+    (q31_t)0x3c63a26, (q31_t)0xea58bd54, (q31_t)0x3c1fae5, (q31_t)0xea649105,
+    (q31_t)0x3bdbdf6, (q31_t)0xea70658a, (q31_t)0x3b9835a, (q31_t)0xea7c3ae5,
+    (q31_t)0x3b54b11, (q31_t)0xea881114, (q31_t)0x3b1151b, (q31_t)0xea93e817,
+    (q31_t)0x3ace178, (q31_t)0xea9fbfed, (q31_t)0x3a8b028, (q31_t)0xeaab9896,
+    (q31_t)0x3a4812c, (q31_t)0xeab77212, (q31_t)0x3a05484, (q31_t)0xeac34c60,
+    (q31_t)0x39c2a2f, (q31_t)0xeacf277f, (q31_t)0x398022f, (q31_t)0xeadb0370,
+    (q31_t)0x393dc82, (q31_t)0xeae6e031, (q31_t)0x38fb92a, (q31_t)0xeaf2bdc3,
+    (q31_t)0x38b9827, (q31_t)0xeafe9c24, (q31_t)0x3877978, (q31_t)0xeb0a7b54,
+    (q31_t)0x3835d1e, (q31_t)0xeb165b54, (q31_t)0x37f4319, (q31_t)0xeb223c22,
+    (q31_t)0x37b2b6a, (q31_t)0xeb2e1dbe, (q31_t)0x377160f, (q31_t)0xeb3a0027,
+    (q31_t)0x373030a, (q31_t)0xeb45e35d, (q31_t)0x36ef25b, (q31_t)0xeb51c760,
+    (q31_t)0x36ae401, (q31_t)0xeb5dac2f, (q31_t)0x366d7fd, (q31_t)0xeb6991ca,
+    (q31_t)0x362ce50, (q31_t)0xeb75782f, (q31_t)0x35ec6f8, (q31_t)0xeb815f60,
+    (q31_t)0x35ac1f7, (q31_t)0xeb8d475b, (q31_t)0x356bf4d, (q31_t)0xeb99301f,
+    (q31_t)0x352bef9, (q31_t)0xeba519ad, (q31_t)0x34ec0fc, (q31_t)0xebb10404,
+    (q31_t)0x34ac556, (q31_t)0xebbcef23, (q31_t)0x346cc07, (q31_t)0xebc8db0b,
+    (q31_t)0x342d510, (q31_t)0xebd4c7ba, (q31_t)0x33ee070, (q31_t)0xebe0b52f,
+    (q31_t)0x33aee27, (q31_t)0xebeca36c, (q31_t)0x336fe37, (q31_t)0xebf8926f,
+    (q31_t)0x333109e, (q31_t)0xec048237, (q31_t)0x32f255e, (q31_t)0xec1072c4,
+    (q31_t)0x32b3c75, (q31_t)0xec1c6417, (q31_t)0x32755e5, (q31_t)0xec28562d,
+    (q31_t)0x32371ae, (q31_t)0xec344908, (q31_t)0x31f8fcf, (q31_t)0xec403ca5,
+    (q31_t)0x31bb049, (q31_t)0xec4c3106, (q31_t)0x317d31c, (q31_t)0xec582629,
+    (q31_t)0x313f848, (q31_t)0xec641c0e, (q31_t)0x3101fce, (q31_t)0xec7012b5,
+    (q31_t)0x30c49ad, (q31_t)0xec7c0a1d, (q31_t)0x30875e5, (q31_t)0xec880245,
+    (q31_t)0x304a477, (q31_t)0xec93fb2e, (q31_t)0x300d563, (q31_t)0xec9ff4d6,
+    (q31_t)0x2fd08a9, (q31_t)0xecabef3d, (q31_t)0x2f93e4a, (q31_t)0xecb7ea63,
+    (q31_t)0x2f57644, (q31_t)0xecc3e648, (q31_t)0x2f1b099, (q31_t)0xeccfe2ea,
+    (q31_t)0x2eded49, (q31_t)0xecdbe04a, (q31_t)0x2ea2c53, (q31_t)0xece7de66,
+    (q31_t)0x2e66db8, (q31_t)0xecf3dd3f, (q31_t)0x2e2b178, (q31_t)0xecffdcd4,
+    (q31_t)0x2def794, (q31_t)0xed0bdd25, (q31_t)0x2db400a, (q31_t)0xed17de31,
+    (q31_t)0x2d78add, (q31_t)0xed23dff7, (q31_t)0x2d3d80a, (q31_t)0xed2fe277,
+    (q31_t)0x2d02794, (q31_t)0xed3be5b1, (q31_t)0x2cc7979, (q31_t)0xed47e9a5,
+    (q31_t)0x2c8cdbb, (q31_t)0xed53ee51, (q31_t)0x2c52459, (q31_t)0xed5ff3b5,
+    (q31_t)0x2c17d52, (q31_t)0xed6bf9d1, (q31_t)0x2bdd8a9, (q31_t)0xed7800a5,
+    (q31_t)0x2ba365c, (q31_t)0xed84082f, (q31_t)0x2b6966c, (q31_t)0xed901070,
+    (q31_t)0x2b2f8d8, (q31_t)0xed9c1967, (q31_t)0x2af5da2, (q31_t)0xeda82313,
+    (q31_t)0x2abc4c9, (q31_t)0xedb42d74, (q31_t)0x2a82e4d, (q31_t)0xedc0388a,
+    (q31_t)0x2a49a2e, (q31_t)0xedcc4454, (q31_t)0x2a1086d, (q31_t)0xedd850d2,
+    (q31_t)0x29d790a, (q31_t)0xede45e03, (q31_t)0x299ec05, (q31_t)0xedf06be6,
+    (q31_t)0x296615d, (q31_t)0xedfc7a7c, (q31_t)0x292d914, (q31_t)0xee0889c4,
+    (q31_t)0x28f5329, (q31_t)0xee1499bd, (q31_t)0x28bcf9c, (q31_t)0xee20aa67,
+    (q31_t)0x2884e6e, (q31_t)0xee2cbbc1, (q31_t)0x284cf9f, (q31_t)0xee38cdcb,
+    (q31_t)0x281532e, (q31_t)0xee44e084, (q31_t)0x27dd91c, (q31_t)0xee50f3ed,
+    (q31_t)0x27a616a, (q31_t)0xee5d0804, (q31_t)0x276ec16, (q31_t)0xee691cc9,
+    (q31_t)0x2737922, (q31_t)0xee75323c, (q31_t)0x270088e, (q31_t)0xee81485c,
+    (q31_t)0x26c9a58, (q31_t)0xee8d5f29, (q31_t)0x2692e83, (q31_t)0xee9976a1,
+    (q31_t)0x265c50e, (q31_t)0xeea58ec6, (q31_t)0x2625df8, (q31_t)0xeeb1a796,
+    (q31_t)0x25ef943, (q31_t)0xeebdc110, (q31_t)0x25b96ee, (q31_t)0xeec9db35,
+    (q31_t)0x25836f9, (q31_t)0xeed5f604, (q31_t)0x254d965, (q31_t)0xeee2117c,
+    (q31_t)0x2517e31, (q31_t)0xeeee2d9d, (q31_t)0x24e255e, (q31_t)0xeefa4a67,
+    (q31_t)0x24aceed, (q31_t)0xef0667d9, (q31_t)0x2477adc, (q31_t)0xef1285f2,
+    (q31_t)0x244292c, (q31_t)0xef1ea4b2, (q31_t)0x240d9de, (q31_t)0xef2ac419,
+    (q31_t)0x23d8cf1, (q31_t)0xef36e426, (q31_t)0x23a4265, (q31_t)0xef4304d8,
+    (q31_t)0x236fa3b, (q31_t)0xef4f2630, (q31_t)0x233b473, (q31_t)0xef5b482d,
+    (q31_t)0x230710d, (q31_t)0xef676ace, (q31_t)0x22d3009, (q31_t)0xef738e12,
+    (q31_t)0x229f167, (q31_t)0xef7fb1fa, (q31_t)0x226b528, (q31_t)0xef8bd685,
+    (q31_t)0x2237b4b, (q31_t)0xef97fbb2, (q31_t)0x22043d0, (q31_t)0xefa42181,
+    (q31_t)0x21d0eb8, (q31_t)0xefb047f2, (q31_t)0x219dc03, (q31_t)0xefbc6f03,
+    (q31_t)0x216abb1, (q31_t)0xefc896b5, (q31_t)0x2137dc2, (q31_t)0xefd4bf08,
+    (q31_t)0x2105236, (q31_t)0xefe0e7f9, (q31_t)0x20d290d, (q31_t)0xefed118a,
+    (q31_t)0x20a0248, (q31_t)0xeff93bba, (q31_t)0x206dde6, (q31_t)0xf0056687,
+    (q31_t)0x203bbe8, (q31_t)0xf01191f3, (q31_t)0x2009c4e, (q31_t)0xf01dbdfb,
+    (q31_t)0x1fd7f17, (q31_t)0xf029eaa1, (q31_t)0x1fa6445, (q31_t)0xf03617e2,
+    (q31_t)0x1f74bd6, (q31_t)0xf04245c0, (q31_t)0x1f435cc, (q31_t)0xf04e7438,
+    (q31_t)0x1f12227, (q31_t)0xf05aa34c, (q31_t)0x1ee10e5, (q31_t)0xf066d2fa,
+    (q31_t)0x1eb0209, (q31_t)0xf0730342, (q31_t)0x1e7f591, (q31_t)0xf07f3424,
+    (q31_t)0x1e4eb7e, (q31_t)0xf08b659f, (q31_t)0x1e1e3d0, (q31_t)0xf09797b2,
+    (q31_t)0x1dede87, (q31_t)0xf0a3ca5d, (q31_t)0x1dbdba3, (q31_t)0xf0affda0,
+    (q31_t)0x1d8db25, (q31_t)0xf0bc317a, (q31_t)0x1d5dd0c, (q31_t)0xf0c865ea,
+    (q31_t)0x1d2e158, (q31_t)0xf0d49af1, (q31_t)0x1cfe80a, (q31_t)0xf0e0d08d,
+    (q31_t)0x1ccf122, (q31_t)0xf0ed06bf, (q31_t)0x1c9fca0, (q31_t)0xf0f93d86,
+    (q31_t)0x1c70a84, (q31_t)0xf10574e0, (q31_t)0x1c41ace, (q31_t)0xf111accf,
+    (q31_t)0x1c12d7e, (q31_t)0xf11de551, (q31_t)0x1be4294, (q31_t)0xf12a1e66,
+    (q31_t)0x1bb5a11, (q31_t)0xf136580d, (q31_t)0x1b873f5, (q31_t)0xf1429247,
+    (q31_t)0x1b5903f, (q31_t)0xf14ecd11, (q31_t)0x1b2aef0, (q31_t)0xf15b086d,
+    (q31_t)0x1afd007, (q31_t)0xf1674459, (q31_t)0x1acf386, (q31_t)0xf17380d6,
+    (q31_t)0x1aa196c, (q31_t)0xf17fbde2, (q31_t)0x1a741b9, (q31_t)0xf18bfb7d,
+    (q31_t)0x1a46c6e, (q31_t)0xf19839a6, (q31_t)0x1a1998a, (q31_t)0xf1a4785e,
+    (q31_t)0x19ec90d, (q31_t)0xf1b0b7a4, (q31_t)0x19bfaf9, (q31_t)0xf1bcf777,
+    (q31_t)0x1992f4c, (q31_t)0xf1c937d6, (q31_t)0x1966606, (q31_t)0xf1d578c2,
+    (q31_t)0x1939f29, (q31_t)0xf1e1ba3a, (q31_t)0x190dab4, (q31_t)0xf1edfc3d,
+    (q31_t)0x18e18a7, (q31_t)0xf1fa3ecb, (q31_t)0x18b5903, (q31_t)0xf20681e3,
+    (q31_t)0x1889bc6, (q31_t)0xf212c585, (q31_t)0x185e0f3, (q31_t)0xf21f09b1,
+    (q31_t)0x1832888, (q31_t)0xf22b4e66, (q31_t)0x1807285, (q31_t)0xf23793a3,
+    (q31_t)0x17dbeec, (q31_t)0xf243d968, (q31_t)0x17b0dbb, (q31_t)0xf2501fb5,
+    (q31_t)0x1785ef4, (q31_t)0xf25c6688, (q31_t)0x175b296, (q31_t)0xf268ade3,
+    (q31_t)0x17308a1, (q31_t)0xf274f5c3, (q31_t)0x1706115, (q31_t)0xf2813e2a,
+    (q31_t)0x16dbbf3, (q31_t)0xf28d8715, (q31_t)0x16b193a, (q31_t)0xf299d085,
+    (q31_t)0x16878eb, (q31_t)0xf2a61a7a, (q31_t)0x165db05, (q31_t)0xf2b264f2,
+    (q31_t)0x1633f8a, (q31_t)0xf2beafed, (q31_t)0x160a678, (q31_t)0xf2cafb6b,
+    (q31_t)0x15e0fd1, (q31_t)0xf2d7476c, (q31_t)0x15b7b94, (q31_t)0xf2e393ef,
+    (q31_t)0x158e9c1, (q31_t)0xf2efe0f2, (q31_t)0x1565a58, (q31_t)0xf2fc2e77,
+    (q31_t)0x153cd5a, (q31_t)0xf3087c7d, (q31_t)0x15142c6, (q31_t)0xf314cb02,
+    (q31_t)0x14eba9d, (q31_t)0xf3211a07, (q31_t)0x14c34df, (q31_t)0xf32d698a,
+    (q31_t)0x149b18b, (q31_t)0xf339b98d, (q31_t)0x14730a3, (q31_t)0xf3460a0d,
+    (q31_t)0x144b225, (q31_t)0xf3525b0b, (q31_t)0x1423613, (q31_t)0xf35eac86,
+    (q31_t)0x13fbc6c, (q31_t)0xf36afe7e, (q31_t)0x13d4530, (q31_t)0xf37750f2,
+    (q31_t)0x13ad060, (q31_t)0xf383a3e2, (q31_t)0x1385dfb, (q31_t)0xf38ff74d,
+    (q31_t)0x135ee02, (q31_t)0xf39c4b32, (q31_t)0x1338075, (q31_t)0xf3a89f92,
+    (q31_t)0x1311553, (q31_t)0xf3b4f46c, (q31_t)0x12eac9d, (q31_t)0xf3c149bf,
+    (q31_t)0x12c4653, (q31_t)0xf3cd9f8b, (q31_t)0x129e276, (q31_t)0xf3d9f5cf,
+    (q31_t)0x1278104, (q31_t)0xf3e64c8c, (q31_t)0x12521ff, (q31_t)0xf3f2a3bf,
+    (q31_t)0x122c566, (q31_t)0xf3fefb6a, (q31_t)0x1206b39, (q31_t)0xf40b538b,
+    (q31_t)0x11e1379, (q31_t)0xf417ac22, (q31_t)0x11bbe26, (q31_t)0xf424052f,
+    (q31_t)0x1196b3f, (q31_t)0xf4305eb0, (q31_t)0x1171ac6, (q31_t)0xf43cb8a7,
+    (q31_t)0x114ccb9, (q31_t)0xf4491311, (q31_t)0x1128119, (q31_t)0xf4556def,
+    (q31_t)0x11037e6, (q31_t)0xf461c940, (q31_t)0x10df120, (q31_t)0xf46e2504,
+    (q31_t)0x10bacc8, (q31_t)0xf47a8139, (q31_t)0x1096add, (q31_t)0xf486dde1,
+    (q31_t)0x1072b5f, (q31_t)0xf4933afa, (q31_t)0x104ee4f, (q31_t)0xf49f9884,
+    (q31_t)0x102b3ac, (q31_t)0xf4abf67e, (q31_t)0x1007b77, (q31_t)0xf4b854e7,
+    (q31_t)0xfe45b0, (q31_t)0xf4c4b3c0, (q31_t)0xfc1257, (q31_t)0xf4d11308,
+    (q31_t)0xf9e16b, (q31_t)0xf4dd72be, (q31_t)0xf7b2ee, (q31_t)0xf4e9d2e3,
+    (q31_t)0xf586df, (q31_t)0xf4f63374, (q31_t)0xf35d3e, (q31_t)0xf5029473,
+    (q31_t)0xf1360b, (q31_t)0xf50ef5de, (q31_t)0xef1147, (q31_t)0xf51b57b5,
+    (q31_t)0xeceef1, (q31_t)0xf527b9f7, (q31_t)0xeacf09, (q31_t)0xf5341ca5,
+    (q31_t)0xe8b190, (q31_t)0xf5407fbd, (q31_t)0xe69686, (q31_t)0xf54ce33f,
+    (q31_t)0xe47deb, (q31_t)0xf559472b, (q31_t)0xe267be, (q31_t)0xf565ab80,
+    (q31_t)0xe05401, (q31_t)0xf572103d, (q31_t)0xde42b2, (q31_t)0xf57e7563,
+    (q31_t)0xdc33d2, (q31_t)0xf58adaf0, (q31_t)0xda2762, (q31_t)0xf59740e5,
+    (q31_t)0xd81d61, (q31_t)0xf5a3a740, (q31_t)0xd615cf, (q31_t)0xf5b00e02,
+    (q31_t)0xd410ad, (q31_t)0xf5bc7529, (q31_t)0xd20dfa, (q31_t)0xf5c8dcb6,
+    (q31_t)0xd00db6, (q31_t)0xf5d544a7, (q31_t)0xce0fe3, (q31_t)0xf5e1acfd,
+    (q31_t)0xcc147f, (q31_t)0xf5ee15b7, (q31_t)0xca1b8a, (q31_t)0xf5fa7ed4,
+    (q31_t)0xc82506, (q31_t)0xf606e854, (q31_t)0xc630f2, (q31_t)0xf6135237,
+    (q31_t)0xc43f4d, (q31_t)0xf61fbc7b, (q31_t)0xc25019, (q31_t)0xf62c2721,
+    (q31_t)0xc06355, (q31_t)0xf6389228, (q31_t)0xbe7901, (q31_t)0xf644fd8f,
+    (q31_t)0xbc911d, (q31_t)0xf6516956, (q31_t)0xbaabaa, (q31_t)0xf65dd57d,
+    (q31_t)0xb8c8a7, (q31_t)0xf66a4203, (q31_t)0xb6e815, (q31_t)0xf676aee8,
+    (q31_t)0xb509f3, (q31_t)0xf6831c2b, (q31_t)0xb32e42, (q31_t)0xf68f89cb,
+    (q31_t)0xb15502, (q31_t)0xf69bf7c9, (q31_t)0xaf7e33, (q31_t)0xf6a86623,
+    (q31_t)0xada9d4, (q31_t)0xf6b4d4d9, (q31_t)0xabd7e6, (q31_t)0xf6c143ec,
+    (q31_t)0xaa086a, (q31_t)0xf6cdb359, (q31_t)0xa83b5e, (q31_t)0xf6da2321,
+    (q31_t)0xa670c4, (q31_t)0xf6e69344, (q31_t)0xa4a89b, (q31_t)0xf6f303c0,
+    (q31_t)0xa2e2e3, (q31_t)0xf6ff7496, (q31_t)0xa11f9d, (q31_t)0xf70be5c4,
+    (q31_t)0x9f5ec8, (q31_t)0xf718574b, (q31_t)0x9da065, (q31_t)0xf724c92a,
+    (q31_t)0x9be473, (q31_t)0xf7313b60, (q31_t)0x9a2af3, (q31_t)0xf73daded,
+    (q31_t)0x9873e4, (q31_t)0xf74a20d0, (q31_t)0x96bf48, (q31_t)0xf756940a,
+    (q31_t)0x950d1d, (q31_t)0xf7630799, (q31_t)0x935d64, (q31_t)0xf76f7b7d,
+    (q31_t)0x91b01d, (q31_t)0xf77befb5, (q31_t)0x900548, (q31_t)0xf7886442,
+    (q31_t)0x8e5ce5, (q31_t)0xf794d922, (q31_t)0x8cb6f5, (q31_t)0xf7a14e55,
+    (q31_t)0x8b1376, (q31_t)0xf7adc3db, (q31_t)0x89726a, (q31_t)0xf7ba39b3,
+    (q31_t)0x87d3d0, (q31_t)0xf7c6afdc, (q31_t)0x8637a9, (q31_t)0xf7d32657,
+    (q31_t)0x849df4, (q31_t)0xf7df9d22, (q31_t)0x8306b2, (q31_t)0xf7ec143e,
+    (q31_t)0x8171e2, (q31_t)0xf7f88ba9, (q31_t)0x7fdf85, (q31_t)0xf8050364,
+    (q31_t)0x7e4f9b, (q31_t)0xf8117b6d, (q31_t)0x7cc223, (q31_t)0xf81df3c5,
+    (q31_t)0x7b371e, (q31_t)0xf82a6c6a, (q31_t)0x79ae8c, (q31_t)0xf836e55d,
+    (q31_t)0x78286e, (q31_t)0xf8435e9d, (q31_t)0x76a4c2, (q31_t)0xf84fd829,
+    (q31_t)0x752389, (q31_t)0xf85c5201, (q31_t)0x73a4c3, (q31_t)0xf868cc24,
+    (q31_t)0x722871, (q31_t)0xf8754692, (q31_t)0x70ae92, (q31_t)0xf881c14b,
+    (q31_t)0x6f3726, (q31_t)0xf88e3c4d, (q31_t)0x6dc22e, (q31_t)0xf89ab799,
+    (q31_t)0x6c4fa8, (q31_t)0xf8a7332e, (q31_t)0x6adf97, (q31_t)0xf8b3af0c,
+    (q31_t)0x6971f9, (q31_t)0xf8c02b31, (q31_t)0x6806ce, (q31_t)0xf8cca79e,
+    (q31_t)0x669e18, (q31_t)0xf8d92452, (q31_t)0x6537d4, (q31_t)0xf8e5a14d,
+    (q31_t)0x63d405, (q31_t)0xf8f21e8e, (q31_t)0x6272aa, (q31_t)0xf8fe9c15,
+    (q31_t)0x6113c2, (q31_t)0xf90b19e0, (q31_t)0x5fb74e, (q31_t)0xf91797f0,
+    (q31_t)0x5e5d4e, (q31_t)0xf9241645, (q31_t)0x5d05c3, (q31_t)0xf93094dd,
+    (q31_t)0x5bb0ab, (q31_t)0xf93d13b8, (q31_t)0x5a5e07, (q31_t)0xf94992d7,
+    (q31_t)0x590dd8, (q31_t)0xf9561237, (q31_t)0x57c01d, (q31_t)0xf96291d9,
+    (q31_t)0x5674d6, (q31_t)0xf96f11bc, (q31_t)0x552c03, (q31_t)0xf97b91e1,
+    (q31_t)0x53e5a5, (q31_t)0xf9881245, (q31_t)0x52a1bb, (q31_t)0xf99492ea,
+    (q31_t)0x516045, (q31_t)0xf9a113cd, (q31_t)0x502145, (q31_t)0xf9ad94f0,
+    (q31_t)0x4ee4b8, (q31_t)0xf9ba1651, (q31_t)0x4daaa1, (q31_t)0xf9c697f0,
+    (q31_t)0x4c72fe, (q31_t)0xf9d319cc, (q31_t)0x4b3dcf, (q31_t)0xf9df9be6,
+    (q31_t)0x4a0b16, (q31_t)0xf9ec1e3b, (q31_t)0x48dad1, (q31_t)0xf9f8a0cd,
+    (q31_t)0x47ad01, (q31_t)0xfa05239a, (q31_t)0x4681a6, (q31_t)0xfa11a6a3,
+    (q31_t)0x4558c0, (q31_t)0xfa1e29e5, (q31_t)0x44324f, (q31_t)0xfa2aad62,
+    (q31_t)0x430e53, (q31_t)0xfa373119, (q31_t)0x41eccc, (q31_t)0xfa43b508,
+    (q31_t)0x40cdba, (q31_t)0xfa503930, (q31_t)0x3fb11d, (q31_t)0xfa5cbd91,
+    (q31_t)0x3e96f6, (q31_t)0xfa694229, (q31_t)0x3d7f44, (q31_t)0xfa75c6f8,
+    (q31_t)0x3c6a07, (q31_t)0xfa824bfd, (q31_t)0x3b573f, (q31_t)0xfa8ed139,
+    (q31_t)0x3a46ed, (q31_t)0xfa9b56ab, (q31_t)0x393910, (q31_t)0xfaa7dc52,
+    (q31_t)0x382da8, (q31_t)0xfab4622d, (q31_t)0x3724b6, (q31_t)0xfac0e83d,
+    (q31_t)0x361e3a, (q31_t)0xfacd6e81, (q31_t)0x351a33, (q31_t)0xfad9f4f8,
+    (q31_t)0x3418a2, (q31_t)0xfae67ba2, (q31_t)0x331986, (q31_t)0xfaf3027e,
+    (q31_t)0x321ce0, (q31_t)0xfaff898c, (q31_t)0x3122b0, (q31_t)0xfb0c10cb,
+    (q31_t)0x302af5, (q31_t)0xfb18983b, (q31_t)0x2f35b1, (q31_t)0xfb251fdc,
+    (q31_t)0x2e42e2, (q31_t)0xfb31a7ac, (q31_t)0x2d5289, (q31_t)0xfb3e2fac,
+    (q31_t)0x2c64a6, (q31_t)0xfb4ab7db, (q31_t)0x2b7939, (q31_t)0xfb574039,
+    (q31_t)0x2a9042, (q31_t)0xfb63c8c4, (q31_t)0x29a9c1, (q31_t)0xfb70517d,
+    (q31_t)0x28c5b6, (q31_t)0xfb7cda63, (q31_t)0x27e421, (q31_t)0xfb896375,
+    (q31_t)0x270502, (q31_t)0xfb95ecb4, (q31_t)0x262859, (q31_t)0xfba2761e,
+    (q31_t)0x254e27, (q31_t)0xfbaeffb3, (q31_t)0x24766a, (q31_t)0xfbbb8973,
+    (q31_t)0x23a124, (q31_t)0xfbc8135c, (q31_t)0x22ce54, (q31_t)0xfbd49d70,
+    (q31_t)0x21fdfb, (q31_t)0xfbe127ac, (q31_t)0x213018, (q31_t)0xfbedb212,
+    (q31_t)0x2064ab, (q31_t)0xfbfa3c9f, (q31_t)0x1f9bb5, (q31_t)0xfc06c754,
+    (q31_t)0x1ed535, (q31_t)0xfc135231, (q31_t)0x1e112b, (q31_t)0xfc1fdd34,
+    (q31_t)0x1d4f99, (q31_t)0xfc2c685d, (q31_t)0x1c907c, (q31_t)0xfc38f3ac,
+    (q31_t)0x1bd3d6, (q31_t)0xfc457f21, (q31_t)0x1b19a7, (q31_t)0xfc520aba,
+    (q31_t)0x1a61ee, (q31_t)0xfc5e9678, (q31_t)0x19acac, (q31_t)0xfc6b2259,
+    (q31_t)0x18f9e1, (q31_t)0xfc77ae5e, (q31_t)0x18498c, (q31_t)0xfc843a85,
+    (q31_t)0x179bae, (q31_t)0xfc90c6cf, (q31_t)0x16f047, (q31_t)0xfc9d533b,
+    (q31_t)0x164757, (q31_t)0xfca9dfc8, (q31_t)0x15a0dd, (q31_t)0xfcb66c77,
+    (q31_t)0x14fcda, (q31_t)0xfcc2f945, (q31_t)0x145b4e, (q31_t)0xfccf8634,
+    (q31_t)0x13bc39, (q31_t)0xfcdc1342, (q31_t)0x131f9b, (q31_t)0xfce8a06f,
+    (q31_t)0x128574, (q31_t)0xfcf52dbb, (q31_t)0x11edc3, (q31_t)0xfd01bb24,
+    (q31_t)0x11588a, (q31_t)0xfd0e48ab, (q31_t)0x10c5c7, (q31_t)0xfd1ad650,
+    (q31_t)0x10357c, (q31_t)0xfd276410, (q31_t)0xfa7a8, (q31_t)0xfd33f1ed,
+    (q31_t)0xf1c4a, (q31_t)0xfd407fe6, (q31_t)0xe9364, (q31_t)0xfd4d0df9,
+    (q31_t)0xe0cf5, (q31_t)0xfd599c28, (q31_t)0xd88fd, (q31_t)0xfd662a70,
+    (q31_t)0xd077c, (q31_t)0xfd72b8d2, (q31_t)0xc8872, (q31_t)0xfd7f474d,
+    (q31_t)0xc0be0, (q31_t)0xfd8bd5e1, (q31_t)0xb91c4, (q31_t)0xfd98648d,
+    (q31_t)0xb1a20, (q31_t)0xfda4f351, (q31_t)0xaa4f3, (q31_t)0xfdb1822c,
+    (q31_t)0xa323d, (q31_t)0xfdbe111e, (q31_t)0x9c1ff, (q31_t)0xfdcaa027,
+    (q31_t)0x95438, (q31_t)0xfdd72f45, (q31_t)0x8e8e8, (q31_t)0xfde3be78,
+    (q31_t)0x8800f, (q31_t)0xfdf04dc0, (q31_t)0x819ae, (q31_t)0xfdfcdd1d,
+    (q31_t)0x7b5c4, (q31_t)0xfe096c8d, (q31_t)0x75452, (q31_t)0xfe15fc11,
+    (q31_t)0x6f556, (q31_t)0xfe228ba7, (q31_t)0x698d3, (q31_t)0xfe2f1b50,
+    (q31_t)0x63ec6, (q31_t)0xfe3bab0b, (q31_t)0x5e731, (q31_t)0xfe483ad8,
+    (q31_t)0x59214, (q31_t)0xfe54cab5, (q31_t)0x53f6e, (q31_t)0xfe615aa3,
+    (q31_t)0x4ef3f, (q31_t)0xfe6deaa1, (q31_t)0x4a188, (q31_t)0xfe7a7aae,
+    (q31_t)0x45648, (q31_t)0xfe870aca, (q31_t)0x40d80, (q31_t)0xfe939af5,
+    (q31_t)0x3c72f, (q31_t)0xfea02b2e, (q31_t)0x38356, (q31_t)0xfeacbb74,
+    (q31_t)0x341f4, (q31_t)0xfeb94bc8, (q31_t)0x3030a, (q31_t)0xfec5dc28,
+    (q31_t)0x2c697, (q31_t)0xfed26c94, (q31_t)0x28c9c, (q31_t)0xfedefd0c,
+    (q31_t)0x25519, (q31_t)0xfeeb8d8f, (q31_t)0x2200d, (q31_t)0xfef81e1d,
+    (q31_t)0x1ed78, (q31_t)0xff04aeb5, (q31_t)0x1bd5c, (q31_t)0xff113f56,
+    (q31_t)0x18fb6, (q31_t)0xff1dd001, (q31_t)0x16489, (q31_t)0xff2a60b4,
+    (q31_t)0x13bd3, (q31_t)0xff36f170, (q31_t)0x11594, (q31_t)0xff438234,
+    (q31_t)0xf1ce, (q31_t)0xff5012fe, (q31_t)0xd07e, (q31_t)0xff5ca3d0,
+    (q31_t)0xb1a7, (q31_t)0xff6934a8, (q31_t)0x9547, (q31_t)0xff75c585,
+    (q31_t)0x7b5f, (q31_t)0xff825668, (q31_t)0x63ee, (q31_t)0xff8ee750,
+    (q31_t)0x4ef5, (q31_t)0xff9b783c, (q31_t)0x3c74, (q31_t)0xffa8092c,
+    (q31_t)0x2c6a, (q31_t)0xffb49a1f, (q31_t)0x1ed8, (q31_t)0xffc12b16,
+    (q31_t)0x13bd, (q31_t)0xffcdbc0f, (q31_t)0xb1a, (q31_t)0xffda4d09,
+    (q31_t)0x4ef, (q31_t)0xffe6de05, (q31_t)0x13c, (q31_t)0xfff36f02,
+    (q31_t)0x0, (q31_t)0x0, (q31_t)0x13c, (q31_t)0xc90fe,
+    (q31_t)0x4ef, (q31_t)0x1921fb, (q31_t)0xb1a, (q31_t)0x25b2f7,
+    (q31_t)0x13bd, (q31_t)0x3243f1, (q31_t)0x1ed8, (q31_t)0x3ed4ea,
+    (q31_t)0x2c6a, (q31_t)0x4b65e1, (q31_t)0x3c74, (q31_t)0x57f6d4,
+    (q31_t)0x4ef5, (q31_t)0x6487c4, (q31_t)0x63ee, (q31_t)0x7118b0,
+    (q31_t)0x7b5f, (q31_t)0x7da998, (q31_t)0x9547, (q31_t)0x8a3a7b,
+    (q31_t)0xb1a7, (q31_t)0x96cb58, (q31_t)0xd07e, (q31_t)0xa35c30,
+    (q31_t)0xf1ce, (q31_t)0xafed02, (q31_t)0x11594, (q31_t)0xbc7dcc,
+    (q31_t)0x13bd3, (q31_t)0xc90e90, (q31_t)0x16489, (q31_t)0xd59f4c,
+    (q31_t)0x18fb6, (q31_t)0xe22fff, (q31_t)0x1bd5c, (q31_t)0xeec0aa,
+    (q31_t)0x1ed78, (q31_t)0xfb514b, (q31_t)0x2200d, (q31_t)0x107e1e3,
+    (q31_t)0x25519, (q31_t)0x1147271, (q31_t)0x28c9c, (q31_t)0x12102f4,
+    (q31_t)0x2c697, (q31_t)0x12d936c, (q31_t)0x3030a, (q31_t)0x13a23d8,
+    (q31_t)0x341f4, (q31_t)0x146b438, (q31_t)0x38356, (q31_t)0x153448c,
+    (q31_t)0x3c72f, (q31_t)0x15fd4d2, (q31_t)0x40d80, (q31_t)0x16c650b,
+    (q31_t)0x45648, (q31_t)0x178f536, (q31_t)0x4a188, (q31_t)0x1858552,
+    (q31_t)0x4ef3f, (q31_t)0x192155f, (q31_t)0x53f6e, (q31_t)0x19ea55d,
+    (q31_t)0x59214, (q31_t)0x1ab354b, (q31_t)0x5e731, (q31_t)0x1b7c528,
+    (q31_t)0x63ec6, (q31_t)0x1c454f5, (q31_t)0x698d3, (q31_t)0x1d0e4b0,
+    (q31_t)0x6f556, (q31_t)0x1dd7459, (q31_t)0x75452, (q31_t)0x1ea03ef,
+    (q31_t)0x7b5c4, (q31_t)0x1f69373, (q31_t)0x819ae, (q31_t)0x20322e3,
+    (q31_t)0x8800f, (q31_t)0x20fb240, (q31_t)0x8e8e8, (q31_t)0x21c4188,
+    (q31_t)0x95438, (q31_t)0x228d0bb, (q31_t)0x9c1ff, (q31_t)0x2355fd9,
+    (q31_t)0xa323d, (q31_t)0x241eee2, (q31_t)0xaa4f3, (q31_t)0x24e7dd4,
+    (q31_t)0xb1a20, (q31_t)0x25b0caf, (q31_t)0xb91c4, (q31_t)0x2679b73,
+    (q31_t)0xc0be0, (q31_t)0x2742a1f, (q31_t)0xc8872, (q31_t)0x280b8b3,
+    (q31_t)0xd077c, (q31_t)0x28d472e, (q31_t)0xd88fd, (q31_t)0x299d590,
+    (q31_t)0xe0cf5, (q31_t)0x2a663d8, (q31_t)0xe9364, (q31_t)0x2b2f207,
+    (q31_t)0xf1c4a, (q31_t)0x2bf801a, (q31_t)0xfa7a8, (q31_t)0x2cc0e13,
+    (q31_t)0x10357c, (q31_t)0x2d89bf0, (q31_t)0x10c5c7, (q31_t)0x2e529b0,
+    (q31_t)0x11588a, (q31_t)0x2f1b755, (q31_t)0x11edc3, (q31_t)0x2fe44dc,
+    (q31_t)0x128574, (q31_t)0x30ad245, (q31_t)0x131f9b, (q31_t)0x3175f91,
+    (q31_t)0x13bc39, (q31_t)0x323ecbe, (q31_t)0x145b4e, (q31_t)0x33079cc,
+    (q31_t)0x14fcda, (q31_t)0x33d06bb, (q31_t)0x15a0dd, (q31_t)0x3499389,
+    (q31_t)0x164757, (q31_t)0x3562038, (q31_t)0x16f047, (q31_t)0x362acc5,
+    (q31_t)0x179bae, (q31_t)0x36f3931, (q31_t)0x18498c, (q31_t)0x37bc57b,
+    (q31_t)0x18f9e1, (q31_t)0x38851a2, (q31_t)0x19acac, (q31_t)0x394dda7,
+    (q31_t)0x1a61ee, (q31_t)0x3a16988, (q31_t)0x1b19a7, (q31_t)0x3adf546,
+    (q31_t)0x1bd3d6, (q31_t)0x3ba80df, (q31_t)0x1c907c, (q31_t)0x3c70c54,
+    (q31_t)0x1d4f99, (q31_t)0x3d397a3, (q31_t)0x1e112b, (q31_t)0x3e022cc,
+    (q31_t)0x1ed535, (q31_t)0x3ecadcf, (q31_t)0x1f9bb5, (q31_t)0x3f938ac,
+    (q31_t)0x2064ab, (q31_t)0x405c361, (q31_t)0x213018, (q31_t)0x4124dee,
+    (q31_t)0x21fdfb, (q31_t)0x41ed854, (q31_t)0x22ce54, (q31_t)0x42b6290,
+    (q31_t)0x23a124, (q31_t)0x437eca4, (q31_t)0x24766a, (q31_t)0x444768d,
+    (q31_t)0x254e27, (q31_t)0x451004d, (q31_t)0x262859, (q31_t)0x45d89e2,
+    (q31_t)0x270502, (q31_t)0x46a134c, (q31_t)0x27e421, (q31_t)0x4769c8b,
+    (q31_t)0x28c5b6, (q31_t)0x483259d, (q31_t)0x29a9c1, (q31_t)0x48fae83,
+    (q31_t)0x2a9042, (q31_t)0x49c373c, (q31_t)0x2b7939, (q31_t)0x4a8bfc7,
+    (q31_t)0x2c64a6, (q31_t)0x4b54825, (q31_t)0x2d5289, (q31_t)0x4c1d054,
+    (q31_t)0x2e42e2, (q31_t)0x4ce5854, (q31_t)0x2f35b1, (q31_t)0x4dae024,
+    (q31_t)0x302af5, (q31_t)0x4e767c5, (q31_t)0x3122b0, (q31_t)0x4f3ef35,
+    (q31_t)0x321ce0, (q31_t)0x5007674, (q31_t)0x331986, (q31_t)0x50cfd82,
+    (q31_t)0x3418a2, (q31_t)0x519845e, (q31_t)0x351a33, (q31_t)0x5260b08,
+    (q31_t)0x361e3a, (q31_t)0x532917f, (q31_t)0x3724b6, (q31_t)0x53f17c3,
+    (q31_t)0x382da8, (q31_t)0x54b9dd3, (q31_t)0x393910, (q31_t)0x55823ae,
+    (q31_t)0x3a46ed, (q31_t)0x564a955, (q31_t)0x3b573f, (q31_t)0x5712ec7,
+    (q31_t)0x3c6a07, (q31_t)0x57db403, (q31_t)0x3d7f44, (q31_t)0x58a3908,
+    (q31_t)0x3e96f6, (q31_t)0x596bdd7, (q31_t)0x3fb11d, (q31_t)0x5a3426f,
+    (q31_t)0x40cdba, (q31_t)0x5afc6d0, (q31_t)0x41eccc, (q31_t)0x5bc4af8,
+    (q31_t)0x430e53, (q31_t)0x5c8cee7, (q31_t)0x44324f, (q31_t)0x5d5529e,
+    (q31_t)0x4558c0, (q31_t)0x5e1d61b, (q31_t)0x4681a6, (q31_t)0x5ee595d,
+    (q31_t)0x47ad01, (q31_t)0x5fadc66, (q31_t)0x48dad1, (q31_t)0x6075f33,
+    (q31_t)0x4a0b16, (q31_t)0x613e1c5, (q31_t)0x4b3dcf, (q31_t)0x620641a,
+    (q31_t)0x4c72fe, (q31_t)0x62ce634, (q31_t)0x4daaa1, (q31_t)0x6396810,
+    (q31_t)0x4ee4b8, (q31_t)0x645e9af, (q31_t)0x502145, (q31_t)0x6526b10,
+    (q31_t)0x516045, (q31_t)0x65eec33, (q31_t)0x52a1bb, (q31_t)0x66b6d16,
+    (q31_t)0x53e5a5, (q31_t)0x677edbb, (q31_t)0x552c03, (q31_t)0x6846e1f,
+    (q31_t)0x5674d6, (q31_t)0x690ee44, (q31_t)0x57c01d, (q31_t)0x69d6e27,
+    (q31_t)0x590dd8, (q31_t)0x6a9edc9, (q31_t)0x5a5e07, (q31_t)0x6b66d29,
+    (q31_t)0x5bb0ab, (q31_t)0x6c2ec48, (q31_t)0x5d05c3, (q31_t)0x6cf6b23,
+    (q31_t)0x5e5d4e, (q31_t)0x6dbe9bb, (q31_t)0x5fb74e, (q31_t)0x6e86810,
+    (q31_t)0x6113c2, (q31_t)0x6f4e620, (q31_t)0x6272aa, (q31_t)0x70163eb,
+    (q31_t)0x63d405, (q31_t)0x70de172, (q31_t)0x6537d4, (q31_t)0x71a5eb3,
+    (q31_t)0x669e18, (q31_t)0x726dbae, (q31_t)0x6806ce, (q31_t)0x7335862,
+    (q31_t)0x6971f9, (q31_t)0x73fd4cf, (q31_t)0x6adf97, (q31_t)0x74c50f4,
+    (q31_t)0x6c4fa8, (q31_t)0x758ccd2, (q31_t)0x6dc22e, (q31_t)0x7654867,
+    (q31_t)0x6f3726, (q31_t)0x771c3b3, (q31_t)0x70ae92, (q31_t)0x77e3eb5,
+    (q31_t)0x722871, (q31_t)0x78ab96e, (q31_t)0x73a4c3, (q31_t)0x79733dc,
+    (q31_t)0x752389, (q31_t)0x7a3adff, (q31_t)0x76a4c2, (q31_t)0x7b027d7,
+    (q31_t)0x78286e, (q31_t)0x7bca163, (q31_t)0x79ae8c, (q31_t)0x7c91aa3,
+    (q31_t)0x7b371e, (q31_t)0x7d59396, (q31_t)0x7cc223, (q31_t)0x7e20c3b,
+    (q31_t)0x7e4f9b, (q31_t)0x7ee8493, (q31_t)0x7fdf85, (q31_t)0x7fafc9c,
+    (q31_t)0x8171e2, (q31_t)0x8077457, (q31_t)0x8306b2, (q31_t)0x813ebc2,
+    (q31_t)0x849df4, (q31_t)0x82062de, (q31_t)0x8637a9, (q31_t)0x82cd9a9,
+    (q31_t)0x87d3d0, (q31_t)0x8395024, (q31_t)0x89726a, (q31_t)0x845c64d,
+    (q31_t)0x8b1376, (q31_t)0x8523c25, (q31_t)0x8cb6f5, (q31_t)0x85eb1ab,
+    (q31_t)0x8e5ce5, (q31_t)0x86b26de, (q31_t)0x900548, (q31_t)0x8779bbe,
+    (q31_t)0x91b01d, (q31_t)0x884104b, (q31_t)0x935d64, (q31_t)0x8908483,
+    (q31_t)0x950d1d, (q31_t)0x89cf867, (q31_t)0x96bf48, (q31_t)0x8a96bf6,
+    (q31_t)0x9873e4, (q31_t)0x8b5df30, (q31_t)0x9a2af3, (q31_t)0x8c25213,
+    (q31_t)0x9be473, (q31_t)0x8cec4a0, (q31_t)0x9da065, (q31_t)0x8db36d6,
+    (q31_t)0x9f5ec8, (q31_t)0x8e7a8b5, (q31_t)0xa11f9d, (q31_t)0x8f41a3c,
+    (q31_t)0xa2e2e3, (q31_t)0x9008b6a, (q31_t)0xa4a89b, (q31_t)0x90cfc40,
+    (q31_t)0xa670c4, (q31_t)0x9196cbc, (q31_t)0xa83b5e, (q31_t)0x925dcdf,
+    (q31_t)0xaa086a, (q31_t)0x9324ca7, (q31_t)0xabd7e6, (q31_t)0x93ebc14,
+    (q31_t)0xada9d4, (q31_t)0x94b2b27, (q31_t)0xaf7e33, (q31_t)0x95799dd,
+    (q31_t)0xb15502, (q31_t)0x9640837, (q31_t)0xb32e42, (q31_t)0x9707635,
+    (q31_t)0xb509f3, (q31_t)0x97ce3d5, (q31_t)0xb6e815, (q31_t)0x9895118,
+    (q31_t)0xb8c8a7, (q31_t)0x995bdfd, (q31_t)0xbaabaa, (q31_t)0x9a22a83,
+    (q31_t)0xbc911d, (q31_t)0x9ae96aa, (q31_t)0xbe7901, (q31_t)0x9bb0271,
+    (q31_t)0xc06355, (q31_t)0x9c76dd8, (q31_t)0xc25019, (q31_t)0x9d3d8df,
+    (q31_t)0xc43f4d, (q31_t)0x9e04385, (q31_t)0xc630f2, (q31_t)0x9ecadc9,
+    (q31_t)0xc82506, (q31_t)0x9f917ac, (q31_t)0xca1b8a, (q31_t)0xa05812c,
+    (q31_t)0xcc147f, (q31_t)0xa11ea49, (q31_t)0xce0fe3, (q31_t)0xa1e5303,
+    (q31_t)0xd00db6, (q31_t)0xa2abb59, (q31_t)0xd20dfa, (q31_t)0xa37234a,
+    (q31_t)0xd410ad, (q31_t)0xa438ad7, (q31_t)0xd615cf, (q31_t)0xa4ff1fe,
+    (q31_t)0xd81d61, (q31_t)0xa5c58c0, (q31_t)0xda2762, (q31_t)0xa68bf1b,
+    (q31_t)0xdc33d2, (q31_t)0xa752510, (q31_t)0xde42b2, (q31_t)0xa818a9d,
+    (q31_t)0xe05401, (q31_t)0xa8defc3, (q31_t)0xe267be, (q31_t)0xa9a5480,
+    (q31_t)0xe47deb, (q31_t)0xaa6b8d5, (q31_t)0xe69686, (q31_t)0xab31cc1,
+    (q31_t)0xe8b190, (q31_t)0xabf8043, (q31_t)0xeacf09, (q31_t)0xacbe35b,
+    (q31_t)0xeceef1, (q31_t)0xad84609, (q31_t)0xef1147, (q31_t)0xae4a84b,
+    (q31_t)0xf1360b, (q31_t)0xaf10a22, (q31_t)0xf35d3e, (q31_t)0xafd6b8d,
+    (q31_t)0xf586df, (q31_t)0xb09cc8c, (q31_t)0xf7b2ee, (q31_t)0xb162d1d,
+    (q31_t)0xf9e16b, (q31_t)0xb228d42, (q31_t)0xfc1257, (q31_t)0xb2eecf8,
+    (q31_t)0xfe45b0, (q31_t)0xb3b4c40, (q31_t)0x1007b77, (q31_t)0xb47ab19,
+    (q31_t)0x102b3ac, (q31_t)0xb540982, (q31_t)0x104ee4f, (q31_t)0xb60677c,
+    (q31_t)0x1072b5f, (q31_t)0xb6cc506, (q31_t)0x1096add, (q31_t)0xb79221f,
+    (q31_t)0x10bacc8, (q31_t)0xb857ec7, (q31_t)0x10df120, (q31_t)0xb91dafc,
+    (q31_t)0x11037e6, (q31_t)0xb9e36c0, (q31_t)0x1128119, (q31_t)0xbaa9211,
+    (q31_t)0x114ccb9, (q31_t)0xbb6ecef, (q31_t)0x1171ac6, (q31_t)0xbc34759,
+    (q31_t)0x1196b3f, (q31_t)0xbcfa150, (q31_t)0x11bbe26, (q31_t)0xbdbfad1,
+    (q31_t)0x11e1379, (q31_t)0xbe853de, (q31_t)0x1206b39, (q31_t)0xbf4ac75,
+    (q31_t)0x122c566, (q31_t)0xc010496, (q31_t)0x12521ff, (q31_t)0xc0d5c41,
+    (q31_t)0x1278104, (q31_t)0xc19b374, (q31_t)0x129e276, (q31_t)0xc260a31,
+    (q31_t)0x12c4653, (q31_t)0xc326075, (q31_t)0x12eac9d, (q31_t)0xc3eb641,
+    (q31_t)0x1311553, (q31_t)0xc4b0b94, (q31_t)0x1338075, (q31_t)0xc57606e,
+    (q31_t)0x135ee02, (q31_t)0xc63b4ce, (q31_t)0x1385dfb, (q31_t)0xc7008b3,
+    (q31_t)0x13ad060, (q31_t)0xc7c5c1e, (q31_t)0x13d4530, (q31_t)0xc88af0e,
+    (q31_t)0x13fbc6c, (q31_t)0xc950182, (q31_t)0x1423613, (q31_t)0xca1537a,
+    (q31_t)0x144b225, (q31_t)0xcada4f5, (q31_t)0x14730a3, (q31_t)0xcb9f5f3,
+    (q31_t)0x149b18b, (q31_t)0xcc64673, (q31_t)0x14c34df, (q31_t)0xcd29676,
+    (q31_t)0x14eba9d, (q31_t)0xcdee5f9, (q31_t)0x15142c6, (q31_t)0xceb34fe,
+    (q31_t)0x153cd5a, (q31_t)0xcf78383, (q31_t)0x1565a58, (q31_t)0xd03d189,
+    (q31_t)0x158e9c1, (q31_t)0xd101f0e, (q31_t)0x15b7b94, (q31_t)0xd1c6c11,
+    (q31_t)0x15e0fd1, (q31_t)0xd28b894, (q31_t)0x160a678, (q31_t)0xd350495,
+    (q31_t)0x1633f8a, (q31_t)0xd415013, (q31_t)0x165db05, (q31_t)0xd4d9b0e,
+    (q31_t)0x16878eb, (q31_t)0xd59e586, (q31_t)0x16b193a, (q31_t)0xd662f7b,
+    (q31_t)0x16dbbf3, (q31_t)0xd7278eb, (q31_t)0x1706115, (q31_t)0xd7ec1d6,
+    (q31_t)0x17308a1, (q31_t)0xd8b0a3d, (q31_t)0x175b296, (q31_t)0xd97521d,
+    (q31_t)0x1785ef4, (q31_t)0xda39978, (q31_t)0x17b0dbb, (q31_t)0xdafe04b,
+    (q31_t)0x17dbeec, (q31_t)0xdbc2698, (q31_t)0x1807285, (q31_t)0xdc86c5d,
+    (q31_t)0x1832888, (q31_t)0xdd4b19a, (q31_t)0x185e0f3, (q31_t)0xde0f64f,
+    (q31_t)0x1889bc6, (q31_t)0xded3a7b, (q31_t)0x18b5903, (q31_t)0xdf97e1d,
+    (q31_t)0x18e18a7, (q31_t)0xe05c135, (q31_t)0x190dab4, (q31_t)0xe1203c3,
+    (q31_t)0x1939f29, (q31_t)0xe1e45c6, (q31_t)0x1966606, (q31_t)0xe2a873e,
+    (q31_t)0x1992f4c, (q31_t)0xe36c82a, (q31_t)0x19bfaf9, (q31_t)0xe430889,
+    (q31_t)0x19ec90d, (q31_t)0xe4f485c, (q31_t)0x1a1998a, (q31_t)0xe5b87a2,
+    (q31_t)0x1a46c6e, (q31_t)0xe67c65a, (q31_t)0x1a741b9, (q31_t)0xe740483,
+    (q31_t)0x1aa196c, (q31_t)0xe80421e, (q31_t)0x1acf386, (q31_t)0xe8c7f2a,
+    (q31_t)0x1afd007, (q31_t)0xe98bba7, (q31_t)0x1b2aef0, (q31_t)0xea4f793,
+    (q31_t)0x1b5903f, (q31_t)0xeb132ef, (q31_t)0x1b873f5, (q31_t)0xebd6db9,
+    (q31_t)0x1bb5a11, (q31_t)0xec9a7f3, (q31_t)0x1be4294, (q31_t)0xed5e19a,
+    (q31_t)0x1c12d7e, (q31_t)0xee21aaf, (q31_t)0x1c41ace, (q31_t)0xeee5331,
+    (q31_t)0x1c70a84, (q31_t)0xefa8b20, (q31_t)0x1c9fca0, (q31_t)0xf06c27a,
+    (q31_t)0x1ccf122, (q31_t)0xf12f941, (q31_t)0x1cfe80a, (q31_t)0xf1f2f73,
+    (q31_t)0x1d2e158, (q31_t)0xf2b650f, (q31_t)0x1d5dd0c, (q31_t)0xf379a16,
+    (q31_t)0x1d8db25, (q31_t)0xf43ce86, (q31_t)0x1dbdba3, (q31_t)0xf500260,
+    (q31_t)0x1dede87, (q31_t)0xf5c35a3, (q31_t)0x1e1e3d0, (q31_t)0xf68684e,
+    (q31_t)0x1e4eb7e, (q31_t)0xf749a61, (q31_t)0x1e7f591, (q31_t)0xf80cbdc,
+    (q31_t)0x1eb0209, (q31_t)0xf8cfcbe, (q31_t)0x1ee10e5, (q31_t)0xf992d06,
+    (q31_t)0x1f12227, (q31_t)0xfa55cb4, (q31_t)0x1f435cc, (q31_t)0xfb18bc8,
+    (q31_t)0x1f74bd6, (q31_t)0xfbdba40, (q31_t)0x1fa6445, (q31_t)0xfc9e81e,
+    (q31_t)0x1fd7f17, (q31_t)0xfd6155f, (q31_t)0x2009c4e, (q31_t)0xfe24205,
+    (q31_t)0x203bbe8, (q31_t)0xfee6e0d, (q31_t)0x206dde6, (q31_t)0xffa9979,
+    (q31_t)0x20a0248, (q31_t)0x1006c446, (q31_t)0x20d290d, (q31_t)0x1012ee76,
+    (q31_t)0x2105236, (q31_t)0x101f1807, (q31_t)0x2137dc2, (q31_t)0x102b40f8,
+    (q31_t)0x216abb1, (q31_t)0x1037694b, (q31_t)0x219dc03, (q31_t)0x104390fd,
+    (q31_t)0x21d0eb8, (q31_t)0x104fb80e, (q31_t)0x22043d0, (q31_t)0x105bde7f,
+    (q31_t)0x2237b4b, (q31_t)0x1068044e, (q31_t)0x226b528, (q31_t)0x1074297b,
+    (q31_t)0x229f167, (q31_t)0x10804e06, (q31_t)0x22d3009, (q31_t)0x108c71ee,
+    (q31_t)0x230710d, (q31_t)0x10989532, (q31_t)0x233b473, (q31_t)0x10a4b7d3,
+    (q31_t)0x236fa3b, (q31_t)0x10b0d9d0, (q31_t)0x23a4265, (q31_t)0x10bcfb28,
+    (q31_t)0x23d8cf1, (q31_t)0x10c91bda, (q31_t)0x240d9de, (q31_t)0x10d53be7,
+    (q31_t)0x244292c, (q31_t)0x10e15b4e, (q31_t)0x2477adc, (q31_t)0x10ed7a0e,
+    (q31_t)0x24aceed, (q31_t)0x10f99827, (q31_t)0x24e255e, (q31_t)0x1105b599,
+    (q31_t)0x2517e31, (q31_t)0x1111d263, (q31_t)0x254d965, (q31_t)0x111dee84,
+    (q31_t)0x25836f9, (q31_t)0x112a09fc, (q31_t)0x25b96ee, (q31_t)0x113624cb,
+    (q31_t)0x25ef943, (q31_t)0x11423ef0, (q31_t)0x2625df8, (q31_t)0x114e586a,
+    (q31_t)0x265c50e, (q31_t)0x115a713a, (q31_t)0x2692e83, (q31_t)0x1166895f,
+    (q31_t)0x26c9a58, (q31_t)0x1172a0d7, (q31_t)0x270088e, (q31_t)0x117eb7a4,
+    (q31_t)0x2737922, (q31_t)0x118acdc4, (q31_t)0x276ec16, (q31_t)0x1196e337,
+    (q31_t)0x27a616a, (q31_t)0x11a2f7fc, (q31_t)0x27dd91c, (q31_t)0x11af0c13,
+    (q31_t)0x281532e, (q31_t)0x11bb1f7c, (q31_t)0x284cf9f, (q31_t)0x11c73235,
+    (q31_t)0x2884e6e, (q31_t)0x11d3443f, (q31_t)0x28bcf9c, (q31_t)0x11df5599,
+    (q31_t)0x28f5329, (q31_t)0x11eb6643, (q31_t)0x292d914, (q31_t)0x11f7763c,
+    (q31_t)0x296615d, (q31_t)0x12038584, (q31_t)0x299ec05, (q31_t)0x120f941a,
+    (q31_t)0x29d790a, (q31_t)0x121ba1fd, (q31_t)0x2a1086d, (q31_t)0x1227af2e,
+    (q31_t)0x2a49a2e, (q31_t)0x1233bbac, (q31_t)0x2a82e4d, (q31_t)0x123fc776,
+    (q31_t)0x2abc4c9, (q31_t)0x124bd28c, (q31_t)0x2af5da2, (q31_t)0x1257dced,
+    (q31_t)0x2b2f8d8, (q31_t)0x1263e699, (q31_t)0x2b6966c, (q31_t)0x126fef90,
+    (q31_t)0x2ba365c, (q31_t)0x127bf7d1, (q31_t)0x2bdd8a9, (q31_t)0x1287ff5b,
+    (q31_t)0x2c17d52, (q31_t)0x1294062f, (q31_t)0x2c52459, (q31_t)0x12a00c4b,
+    (q31_t)0x2c8cdbb, (q31_t)0x12ac11af, (q31_t)0x2cc7979, (q31_t)0x12b8165b,
+    (q31_t)0x2d02794, (q31_t)0x12c41a4f, (q31_t)0x2d3d80a, (q31_t)0x12d01d89,
+    (q31_t)0x2d78add, (q31_t)0x12dc2009, (q31_t)0x2db400a, (q31_t)0x12e821cf,
+    (q31_t)0x2def794, (q31_t)0x12f422db, (q31_t)0x2e2b178, (q31_t)0x1300232c,
+    (q31_t)0x2e66db8, (q31_t)0x130c22c1, (q31_t)0x2ea2c53, (q31_t)0x1318219a,
+    (q31_t)0x2eded49, (q31_t)0x13241fb6, (q31_t)0x2f1b099, (q31_t)0x13301d16,
+    (q31_t)0x2f57644, (q31_t)0x133c19b8, (q31_t)0x2f93e4a, (q31_t)0x1348159d,
+    (q31_t)0x2fd08a9, (q31_t)0x135410c3, (q31_t)0x300d563, (q31_t)0x13600b2a,
+    (q31_t)0x304a477, (q31_t)0x136c04d2, (q31_t)0x30875e5, (q31_t)0x1377fdbb,
+    (q31_t)0x30c49ad, (q31_t)0x1383f5e3, (q31_t)0x3101fce, (q31_t)0x138fed4b,
+    (q31_t)0x313f848, (q31_t)0x139be3f2, (q31_t)0x317d31c, (q31_t)0x13a7d9d7,
+    (q31_t)0x31bb049, (q31_t)0x13b3cefa, (q31_t)0x31f8fcf, (q31_t)0x13bfc35b,
+    (q31_t)0x32371ae, (q31_t)0x13cbb6f8, (q31_t)0x32755e5, (q31_t)0x13d7a9d3,
+    (q31_t)0x32b3c75, (q31_t)0x13e39be9, (q31_t)0x32f255e, (q31_t)0x13ef8d3c,
+    (q31_t)0x333109e, (q31_t)0x13fb7dc9, (q31_t)0x336fe37, (q31_t)0x14076d91,
+    (q31_t)0x33aee27, (q31_t)0x14135c94, (q31_t)0x33ee070, (q31_t)0x141f4ad1,
+    (q31_t)0x342d510, (q31_t)0x142b3846, (q31_t)0x346cc07, (q31_t)0x143724f5,
+    (q31_t)0x34ac556, (q31_t)0x144310dd, (q31_t)0x34ec0fc, (q31_t)0x144efbfc,
+    (q31_t)0x352bef9, (q31_t)0x145ae653, (q31_t)0x356bf4d, (q31_t)0x1466cfe1,
+    (q31_t)0x35ac1f7, (q31_t)0x1472b8a5, (q31_t)0x35ec6f8, (q31_t)0x147ea0a0,
+    (q31_t)0x362ce50, (q31_t)0x148a87d1, (q31_t)0x366d7fd, (q31_t)0x14966e36,
+    (q31_t)0x36ae401, (q31_t)0x14a253d1, (q31_t)0x36ef25b, (q31_t)0x14ae38a0,
+    (q31_t)0x373030a, (q31_t)0x14ba1ca3, (q31_t)0x377160f, (q31_t)0x14c5ffd9,
+    (q31_t)0x37b2b6a, (q31_t)0x14d1e242, (q31_t)0x37f4319, (q31_t)0x14ddc3de,
+    (q31_t)0x3835d1e, (q31_t)0x14e9a4ac, (q31_t)0x3877978, (q31_t)0x14f584ac,
+    (q31_t)0x38b9827, (q31_t)0x150163dc, (q31_t)0x38fb92a, (q31_t)0x150d423d,
+    (q31_t)0x393dc82, (q31_t)0x15191fcf, (q31_t)0x398022f, (q31_t)0x1524fc90,
+    (q31_t)0x39c2a2f, (q31_t)0x1530d881, (q31_t)0x3a05484, (q31_t)0x153cb3a0,
+    (q31_t)0x3a4812c, (q31_t)0x15488dee, (q31_t)0x3a8b028, (q31_t)0x1554676a,
+    (q31_t)0x3ace178, (q31_t)0x15604013, (q31_t)0x3b1151b, (q31_t)0x156c17e9,
+    (q31_t)0x3b54b11, (q31_t)0x1577eeec, (q31_t)0x3b9835a, (q31_t)0x1583c51b,
+    (q31_t)0x3bdbdf6, (q31_t)0x158f9a76, (q31_t)0x3c1fae5, (q31_t)0x159b6efb,
+    (q31_t)0x3c63a26, (q31_t)0x15a742ac, (q31_t)0x3ca7bba, (q31_t)0x15b31587,
+    (q31_t)0x3cebfa0, (q31_t)0x15bee78c, (q31_t)0x3d305d8, (q31_t)0x15cab8ba,
+    (q31_t)0x3d74e62, (q31_t)0x15d68911, (q31_t)0x3db993e, (q31_t)0x15e25890,
+    (q31_t)0x3dfe66c, (q31_t)0x15ee2738, (q31_t)0x3e435ea, (q31_t)0x15f9f507,
+    (q31_t)0x3e887bb, (q31_t)0x1605c1fd, (q31_t)0x3ecdbdc, (q31_t)0x16118e1a,
+    (q31_t)0x3f1324e, (q31_t)0x161d595d, (q31_t)0x3f58b10, (q31_t)0x162923c5,
+    (q31_t)0x3f9e624, (q31_t)0x1634ed53, (q31_t)0x3fe4388, (q31_t)0x1640b606,
+    (q31_t)0x402a33c, (q31_t)0x164c7ddd, (q31_t)0x4070540, (q31_t)0x165844d8,
+    (q31_t)0x40b6994, (q31_t)0x16640af7, (q31_t)0x40fd037, (q31_t)0x166fd039,
+    (q31_t)0x414392b, (q31_t)0x167b949d, (q31_t)0x418a46d, (q31_t)0x16875823,
+    (q31_t)0x41d11ff, (q31_t)0x16931acb, (q31_t)0x42181e0, (q31_t)0x169edc94,
+    (q31_t)0x425f410, (q31_t)0x16aa9d7e, (q31_t)0x42a688f, (q31_t)0x16b65d88,
+    (q31_t)0x42edf5c, (q31_t)0x16c21cb2, (q31_t)0x4335877, (q31_t)0x16cddafb,
+    (q31_t)0x437d3e1, (q31_t)0x16d99864, (q31_t)0x43c5199, (q31_t)0x16e554ea,
+    (q31_t)0x440d19e, (q31_t)0x16f1108f, (q31_t)0x44553f2, (q31_t)0x16fccb51,
+    (q31_t)0x449d892, (q31_t)0x17088531, (q31_t)0x44e5f80, (q31_t)0x17143e2d,
+    (q31_t)0x452e8bc, (q31_t)0x171ff646, (q31_t)0x4577444, (q31_t)0x172bad7a,
+    (q31_t)0x45c0219, (q31_t)0x173763c9, (q31_t)0x460923b, (q31_t)0x17431933,
+    (q31_t)0x46524a9, (q31_t)0x174ecdb8, (q31_t)0x469b963, (q31_t)0x175a8157,
+    (q31_t)0x46e5069, (q31_t)0x1766340f, (q31_t)0x472e9bc, (q31_t)0x1771e5e0,
+    (q31_t)0x477855a, (q31_t)0x177d96ca, (q31_t)0x47c2344, (q31_t)0x178946cc,
+    (q31_t)0x480c379, (q31_t)0x1794f5e6, (q31_t)0x48565f9, (q31_t)0x17a0a417,
+    (q31_t)0x48a0ac4, (q31_t)0x17ac515f, (q31_t)0x48eb1db, (q31_t)0x17b7fdbd,
+    (q31_t)0x4935b3c, (q31_t)0x17c3a931, (q31_t)0x49806e7, (q31_t)0x17cf53bb,
+    (q31_t)0x49cb4dd, (q31_t)0x17dafd59, (q31_t)0x4a1651c, (q31_t)0x17e6a60c,
+    (q31_t)0x4a617a6, (q31_t)0x17f24dd3, (q31_t)0x4aacc7a, (q31_t)0x17fdf4ae,
+    (q31_t)0x4af8397, (q31_t)0x18099a9c, (q31_t)0x4b43cfd, (q31_t)0x18153f9d,
+    (q31_t)0x4b8f8ad, (q31_t)0x1820e3b0, (q31_t)0x4bdb6a6, (q31_t)0x182c86d5,
+    (q31_t)0x4c276e8, (q31_t)0x1838290c, (q31_t)0x4c73972, (q31_t)0x1843ca53,
+    (q31_t)0x4cbfe45, (q31_t)0x184f6aab, (q31_t)0x4d0c560, (q31_t)0x185b0a13,
+    (q31_t)0x4d58ec3, (q31_t)0x1866a88a, (q31_t)0x4da5a6f, (q31_t)0x18724611,
+    (q31_t)0x4df2862, (q31_t)0x187de2a7, (q31_t)0x4e3f89c, (q31_t)0x18897e4a,
+    (q31_t)0x4e8cb1e, (q31_t)0x189518fc, (q31_t)0x4ed9fe7, (q31_t)0x18a0b2bb,
+    (q31_t)0x4f276f7, (q31_t)0x18ac4b87, (q31_t)0x4f7504e, (q31_t)0x18b7e35f,
+    (q31_t)0x4fc2bec, (q31_t)0x18c37a44, (q31_t)0x50109d0, (q31_t)0x18cf1034,
+    (q31_t)0x505e9fb, (q31_t)0x18daa52f, (q31_t)0x50acc6b, (q31_t)0x18e63935,
+    (q31_t)0x50fb121, (q31_t)0x18f1cc45, (q31_t)0x514981d, (q31_t)0x18fd5e5f,
+    (q31_t)0x519815f, (q31_t)0x1908ef82, (q31_t)0x51e6ce6, (q31_t)0x19147fae,
+    (q31_t)0x5235ab2, (q31_t)0x19200ee3, (q31_t)0x5284ac3, (q31_t)0x192b9d1f,
+    (q31_t)0x52d3d18, (q31_t)0x19372a64, (q31_t)0x53231b3, (q31_t)0x1942b6af,
+    (q31_t)0x5372891, (q31_t)0x194e4201, (q31_t)0x53c21b4, (q31_t)0x1959cc5a,
+    (q31_t)0x5411d1b, (q31_t)0x196555b8, (q31_t)0x5461ac6, (q31_t)0x1970de1b,
+    (q31_t)0x54b1ab4, (q31_t)0x197c6584, (q31_t)0x5501ce5, (q31_t)0x1987ebf0,
+    (q31_t)0x555215a, (q31_t)0x19937161, (q31_t)0x55a2812, (q31_t)0x199ef5d6,
+    (q31_t)0x55f310d, (q31_t)0x19aa794d, (q31_t)0x5643c4a, (q31_t)0x19b5fbc8,
+    (q31_t)0x56949ca, (q31_t)0x19c17d44, (q31_t)0x56e598c, (q31_t)0x19ccfdc2,
+    (q31_t)0x5736b90, (q31_t)0x19d87d42, (q31_t)0x5787fd6, (q31_t)0x19e3fbc3,
+    (q31_t)0x57d965d, (q31_t)0x19ef7944, (q31_t)0x582af26, (q31_t)0x19faf5c5,
+    (q31_t)0x587ca31, (q31_t)0x1a067145, (q31_t)0x58ce77c, (q31_t)0x1a11ebc5,
+    (q31_t)0x5920708, (q31_t)0x1a1d6544, (q31_t)0x59728d5, (q31_t)0x1a28ddc0,
+    (q31_t)0x59c4ce3, (q31_t)0x1a34553b, (q31_t)0x5a17330, (q31_t)0x1a3fcbb3,
+    (q31_t)0x5a69bbe, (q31_t)0x1a4b4128, (q31_t)0x5abc68c, (q31_t)0x1a56b599,
+    (q31_t)0x5b0f399, (q31_t)0x1a622907, (q31_t)0x5b622e6, (q31_t)0x1a6d9b70,
+    (q31_t)0x5bb5472, (q31_t)0x1a790cd4, (q31_t)0x5c0883d, (q31_t)0x1a847d33,
+    (q31_t)0x5c5be47, (q31_t)0x1a8fec8c, (q31_t)0x5caf690, (q31_t)0x1a9b5adf,
+    (q31_t)0x5d03118, (q31_t)0x1aa6c82b, (q31_t)0x5d56ddd, (q31_t)0x1ab23471,
+    (q31_t)0x5daace1, (q31_t)0x1abd9faf, (q31_t)0x5dfee22, (q31_t)0x1ac909e5,
+    (q31_t)0x5e531a1, (q31_t)0x1ad47312, (q31_t)0x5ea775e, (q31_t)0x1adfdb37,
+    (q31_t)0x5efbf58, (q31_t)0x1aeb4253, (q31_t)0x5f5098f, (q31_t)0x1af6a865,
+    (q31_t)0x5fa5603, (q31_t)0x1b020d6c, (q31_t)0x5ffa4b3, (q31_t)0x1b0d716a,
+    (q31_t)0x604f5a0, (q31_t)0x1b18d45c, (q31_t)0x60a48c9, (q31_t)0x1b243643,
+    (q31_t)0x60f9e2e, (q31_t)0x1b2f971e, (q31_t)0x614f5cf, (q31_t)0x1b3af6ec,
+    (q31_t)0x61a4fac, (q31_t)0x1b4655ae, (q31_t)0x61fabc4, (q31_t)0x1b51b363,
+    (q31_t)0x6250a18, (q31_t)0x1b5d100a, (q31_t)0x62a6aa6, (q31_t)0x1b686ba3,
+    (q31_t)0x62fcd6f, (q31_t)0x1b73c62d, (q31_t)0x6353273, (q31_t)0x1b7f1fa9,
+    (q31_t)0x63a99b1, (q31_t)0x1b8a7815, (q31_t)0x6400329, (q31_t)0x1b95cf71,
+    (q31_t)0x6456edb, (q31_t)0x1ba125bd, (q31_t)0x64adcc7, (q31_t)0x1bac7af9,
+    (q31_t)0x6504ced, (q31_t)0x1bb7cf23, (q31_t)0x655bf4c, (q31_t)0x1bc3223c,
+    (q31_t)0x65b33e4, (q31_t)0x1bce7442, (q31_t)0x660aab5, (q31_t)0x1bd9c537,
+    (q31_t)0x66623be, (q31_t)0x1be51518, (q31_t)0x66b9f01, (q31_t)0x1bf063e6,
+    (q31_t)0x6711c7b, (q31_t)0x1bfbb1a0, (q31_t)0x6769c2e, (q31_t)0x1c06fe46,
+    (q31_t)0x67c1e18, (q31_t)0x1c1249d8, (q31_t)0x681a23a, (q31_t)0x1c1d9454,
+    (q31_t)0x6872894, (q31_t)0x1c28ddbb, (q31_t)0x68cb124, (q31_t)0x1c34260c,
+    (q31_t)0x6923bec, (q31_t)0x1c3f6d47, (q31_t)0x697c8eb, (q31_t)0x1c4ab36b,
+    (q31_t)0x69d5820, (q31_t)0x1c55f878, (q31_t)0x6a2e98b, (q31_t)0x1c613c6d,
+    (q31_t)0x6a87d2d, (q31_t)0x1c6c7f4a, (q31_t)0x6ae1304, (q31_t)0x1c77c10e,
+    (q31_t)0x6b3ab12, (q31_t)0x1c8301b9, (q31_t)0x6b94554, (q31_t)0x1c8e414b,
+    (q31_t)0x6bee1cd, (q31_t)0x1c997fc4, (q31_t)0x6c4807a, (q31_t)0x1ca4bd21,
+    (q31_t)0x6ca215c, (q31_t)0x1caff965, (q31_t)0x6cfc472, (q31_t)0x1cbb348d,
+    (q31_t)0x6d569be, (q31_t)0x1cc66e99, (q31_t)0x6db113d, (q31_t)0x1cd1a78a,
+    (q31_t)0x6e0baf0, (q31_t)0x1cdcdf5e, (q31_t)0x6e666d7, (q31_t)0x1ce81615,
+    (q31_t)0x6ec14f2, (q31_t)0x1cf34baf, (q31_t)0x6f1c540, (q31_t)0x1cfe802b,
+    (q31_t)0x6f777c1, (q31_t)0x1d09b389, (q31_t)0x6fd2c75, (q31_t)0x1d14e5c9,
+    (q31_t)0x702e35c, (q31_t)0x1d2016e9, (q31_t)0x7089c75, (q31_t)0x1d2b46ea,
+    (q31_t)0x70e57c0, (q31_t)0x1d3675cb, (q31_t)0x714153e, (q31_t)0x1d41a38c,
+    (q31_t)0x719d4ed, (q31_t)0x1d4cd02c, (q31_t)0x71f96ce, (q31_t)0x1d57fbaa,
+    (q31_t)0x7255ae0, (q31_t)0x1d632608, (q31_t)0x72b2123, (q31_t)0x1d6e4f43,
+    (q31_t)0x730e997, (q31_t)0x1d79775c, (q31_t)0x736b43c, (q31_t)0x1d849e51,
+    (q31_t)0x73c8111, (q31_t)0x1d8fc424, (q31_t)0x7425016, (q31_t)0x1d9ae8d2,
+    (q31_t)0x748214c, (q31_t)0x1da60c5d, (q31_t)0x74df4b1, (q31_t)0x1db12ec3,
+    (q31_t)0x753ca46, (q31_t)0x1dbc5004, (q31_t)0x759a20a, (q31_t)0x1dc7701f,
+    (q31_t)0x75f7bfe, (q31_t)0x1dd28f15, (q31_t)0x7655820, (q31_t)0x1dddace4,
+    (q31_t)0x76b3671, (q31_t)0x1de8c98c, (q31_t)0x77116f0, (q31_t)0x1df3e50d,
+    (q31_t)0x776f99d, (q31_t)0x1dfeff67, (q31_t)0x77cde79, (q31_t)0x1e0a1898,
+    (q31_t)0x782c582, (q31_t)0x1e1530a1, (q31_t)0x788aeb9, (q31_t)0x1e204781,
+    (q31_t)0x78e9a1d, (q31_t)0x1e2b5d38, (q31_t)0x79487ae, (q31_t)0x1e3671c5,
+    (q31_t)0x79a776c, (q31_t)0x1e418528, (q31_t)0x7a06957, (q31_t)0x1e4c9760,
+    (q31_t)0x7a65d6e, (q31_t)0x1e57a86d, (q31_t)0x7ac53b1, (q31_t)0x1e62b84f,
+    (q31_t)0x7b24c20, (q31_t)0x1e6dc705, (q31_t)0x7b846ba, (q31_t)0x1e78d48e,
+    (q31_t)0x7be4381, (q31_t)0x1e83e0eb, (q31_t)0x7c44272, (q31_t)0x1e8eec1b,
+    (q31_t)0x7ca438f, (q31_t)0x1e99f61d, (q31_t)0x7d046d6, (q31_t)0x1ea4fef0,
+    (q31_t)0x7d64c47, (q31_t)0x1eb00696, (q31_t)0x7dc53e3, (q31_t)0x1ebb0d0d,
+    (q31_t)0x7e25daa, (q31_t)0x1ec61254, (q31_t)0x7e8699a, (q31_t)0x1ed1166b,
+    (q31_t)0x7ee77b3, (q31_t)0x1edc1953, (q31_t)0x7f487f6, (q31_t)0x1ee71b0a,
+    (q31_t)0x7fa9a62, (q31_t)0x1ef21b90, (q31_t)0x800aef7, (q31_t)0x1efd1ae4,
+    (q31_t)0x806c5b5, (q31_t)0x1f081907, (q31_t)0x80cde9b, (q31_t)0x1f1315f7,
+    (q31_t)0x812f9a9, (q31_t)0x1f1e11b5, (q31_t)0x81916df, (q31_t)0x1f290c3f,
+    (q31_t)0x81f363d, (q31_t)0x1f340596, (q31_t)0x82557c3, (q31_t)0x1f3efdb9,
+    (q31_t)0x82b7b70, (q31_t)0x1f49f4a8, (q31_t)0x831a143, (q31_t)0x1f54ea62,
+    (q31_t)0x837c93e, (q31_t)0x1f5fdee6, (q31_t)0x83df35f, (q31_t)0x1f6ad235,
+    (q31_t)0x8441fa6, (q31_t)0x1f75c44e, (q31_t)0x84a4e14, (q31_t)0x1f80b531,
+    (q31_t)0x8507ea7, (q31_t)0x1f8ba4dc, (q31_t)0x856b160, (q31_t)0x1f969350,
+    (q31_t)0x85ce63e, (q31_t)0x1fa1808c, (q31_t)0x8631d42, (q31_t)0x1fac6c91,
+    (q31_t)0x869566a, (q31_t)0x1fb7575c, (q31_t)0x86f91b7, (q31_t)0x1fc240ef,
+    (q31_t)0x875cf28, (q31_t)0x1fcd2948, (q31_t)0x87c0ebd, (q31_t)0x1fd81067,
+    (q31_t)0x8825077, (q31_t)0x1fe2f64c, (q31_t)0x8889454, (q31_t)0x1feddaf6,
+    (q31_t)0x88eda54, (q31_t)0x1ff8be65, (q31_t)0x8952278, (q31_t)0x2003a099,
+    (q31_t)0x89b6cbf, (q31_t)0x200e8190, (q31_t)0x8a1b928, (q31_t)0x2019614c,
+    (q31_t)0x8a807b4, (q31_t)0x20243fca, (q31_t)0x8ae5862, (q31_t)0x202f1d0b,
+    (q31_t)0x8b4ab32, (q31_t)0x2039f90f, (q31_t)0x8bb0023, (q31_t)0x2044d3d4,
+    (q31_t)0x8c15736, (q31_t)0x204fad5b, (q31_t)0x8c7b06b, (q31_t)0x205a85a3,
+    (q31_t)0x8ce0bc0, (q31_t)0x20655cac, (q31_t)0x8d46936, (q31_t)0x20703275,
+    (q31_t)0x8dac8cd, (q31_t)0x207b06fe, (q31_t)0x8e12a84, (q31_t)0x2085da46,
+    (q31_t)0x8e78e5b, (q31_t)0x2090ac4d, (q31_t)0x8edf452, (q31_t)0x209b7d13,
+    (q31_t)0x8f45c68, (q31_t)0x20a64c97, (q31_t)0x8fac69e, (q31_t)0x20b11ad9,
+    (q31_t)0x90132f2, (q31_t)0x20bbe7d8, (q31_t)0x907a166, (q31_t)0x20c6b395,
+    (q31_t)0x90e11f7, (q31_t)0x20d17e0d, (q31_t)0x91484a8, (q31_t)0x20dc4742,
+    (q31_t)0x91af976, (q31_t)0x20e70f32, (q31_t)0x9217062, (q31_t)0x20f1d5de,
+    (q31_t)0x927e96b, (q31_t)0x20fc9b44, (q31_t)0x92e6492, (q31_t)0x21075f65,
+    (q31_t)0x934e1d6, (q31_t)0x21122240, (q31_t)0x93b6137, (q31_t)0x211ce3d5,
+    (q31_t)0x941e2b4, (q31_t)0x2127a423, (q31_t)0x948664d, (q31_t)0x21326329,
+    (q31_t)0x94eec03, (q31_t)0x213d20e8, (q31_t)0x95573d4, (q31_t)0x2147dd5f,
+    (q31_t)0x95bfdc1, (q31_t)0x2152988d, (q31_t)0x96289c9, (q31_t)0x215d5273,
+    (q31_t)0x96917ec, (q31_t)0x21680b0f, (q31_t)0x96fa82a, (q31_t)0x2172c262,
+    (q31_t)0x9763a83, (q31_t)0x217d786a, (q31_t)0x97ccef5, (q31_t)0x21882d28,
+    (q31_t)0x9836582, (q31_t)0x2192e09b, (q31_t)0x989fe29, (q31_t)0x219d92c2,
+    (q31_t)0x99098e9, (q31_t)0x21a8439e, (q31_t)0x99735c2, (q31_t)0x21b2f32e,
+    (q31_t)0x99dd4b4, (q31_t)0x21bda171, (q31_t)0x9a475bf, (q31_t)0x21c84e67,
+    (q31_t)0x9ab18e3, (q31_t)0x21d2fa0f, (q31_t)0x9b1be1e, (q31_t)0x21dda46a,
+    (q31_t)0x9b86572, (q31_t)0x21e84d76, (q31_t)0x9bf0edd, (q31_t)0x21f2f534,
+    (q31_t)0x9c5ba60, (q31_t)0x21fd9ba3, (q31_t)0x9cc67fa, (q31_t)0x220840c2,
+    (q31_t)0x9d317ab, (q31_t)0x2212e492, (q31_t)0x9d9c973, (q31_t)0x221d8711,
+    (q31_t)0x9e07d51, (q31_t)0x2228283f, (q31_t)0x9e73346, (q31_t)0x2232c81c,
+    (q31_t)0x9edeb50, (q31_t)0x223d66a8, (q31_t)0x9f4a570, (q31_t)0x224803e2,
+    (q31_t)0x9fb61a5, (q31_t)0x22529fca, (q31_t)0xa021fef, (q31_t)0x225d3a5e,
+    (q31_t)0xa08e04f, (q31_t)0x2267d3a0, (q31_t)0xa0fa2c3, (q31_t)0x22726b8e,
+    (q31_t)0xa16674b, (q31_t)0x227d0228, (q31_t)0xa1d2de7, (q31_t)0x2287976e,
+    (q31_t)0xa23f698, (q31_t)0x22922b5e, (q31_t)0xa2ac15b, (q31_t)0x229cbdfa,
+    (q31_t)0xa318e32, (q31_t)0x22a74f40, (q31_t)0xa385d1d, (q31_t)0x22b1df30,
+    (q31_t)0xa3f2e19, (q31_t)0x22bc6dca, (q31_t)0xa460129, (q31_t)0x22c6fb0c,
+    (q31_t)0xa4cd64b, (q31_t)0x22d186f8, (q31_t)0xa53ad7e, (q31_t)0x22dc118c,
+    (q31_t)0xa5a86c4, (q31_t)0x22e69ac8, (q31_t)0xa61621b, (q31_t)0x22f122ab,
+    (q31_t)0xa683f83, (q31_t)0x22fba936, (q31_t)0xa6f1efc, (q31_t)0x23062e67,
+    (q31_t)0xa760086, (q31_t)0x2310b23e, (q31_t)0xa7ce420, (q31_t)0x231b34bc,
+    (q31_t)0xa83c9ca, (q31_t)0x2325b5df, (q31_t)0xa8ab184, (q31_t)0x233035a7,
+    (q31_t)0xa919b4e, (q31_t)0x233ab414, (q31_t)0xa988727, (q31_t)0x23453125,
+    (q31_t)0xa9f750f, (q31_t)0x234facda, (q31_t)0xaa66506, (q31_t)0x235a2733,
+    (q31_t)0xaad570c, (q31_t)0x2364a02e, (q31_t)0xab44b1f, (q31_t)0x236f17cc,
+    (q31_t)0xabb4141, (q31_t)0x23798e0d, (q31_t)0xac23971, (q31_t)0x238402ef,
+    (q31_t)0xac933ae, (q31_t)0x238e7673, (q31_t)0xad02ff8, (q31_t)0x2398e898,
+    (q31_t)0xad72e4f, (q31_t)0x23a3595e, (q31_t)0xade2eb3, (q31_t)0x23adc8c4,
+    (q31_t)0xae53123, (q31_t)0x23b836ca, (q31_t)0xaec35a0, (q31_t)0x23c2a36f,
+    (q31_t)0xaf33c28, (q31_t)0x23cd0eb3, (q31_t)0xafa44bc, (q31_t)0x23d77896,
+    (q31_t)0xb014f5b, (q31_t)0x23e1e117, (q31_t)0xb085c05, (q31_t)0x23ec4837,
+    (q31_t)0xb0f6aba, (q31_t)0x23f6adf3, (q31_t)0xb167b79, (q31_t)0x2401124d,
+    (q31_t)0xb1d8e43, (q31_t)0x240b7543, (q31_t)0xb24a316, (q31_t)0x2415d6d5,
+    (q31_t)0xb2bb9f4, (q31_t)0x24203704, (q31_t)0xb32d2da, (q31_t)0x242a95ce,
+    (q31_t)0xb39edca, (q31_t)0x2434f332, (q31_t)0xb410ac3, (q31_t)0x243f4f32,
+    (q31_t)0xb4829c4, (q31_t)0x2449a9cc, (q31_t)0xb4f4acd, (q31_t)0x245402ff,
+    (q31_t)0xb566ddf, (q31_t)0x245e5acc, (q31_t)0xb5d92f8, (q31_t)0x2468b132,
+    (q31_t)0xb64ba19, (q31_t)0x24730631, (q31_t)0xb6be341, (q31_t)0x247d59c8,
+    (q31_t)0xb730e70, (q31_t)0x2487abf7, (q31_t)0xb7a3ba5, (q31_t)0x2491fcbe,
+    (q31_t)0xb816ae1, (q31_t)0x249c4c1b, (q31_t)0xb889c23, (q31_t)0x24a69a0f,
+    (q31_t)0xb8fcf6b, (q31_t)0x24b0e699, (q31_t)0xb9704b9, (q31_t)0x24bb31ba,
+    (q31_t)0xb9e3c0b, (q31_t)0x24c57b6f, (q31_t)0xba57563, (q31_t)0x24cfc3ba,
+    (q31_t)0xbacb0bf, (q31_t)0x24da0a9a, (q31_t)0xbb3ee20, (q31_t)0x24e4500e,
+    (q31_t)0xbbb2d85, (q31_t)0x24ee9415, (q31_t)0xbc26eee, (q31_t)0x24f8d6b0,
+    (q31_t)0xbc9b25a, (q31_t)0x250317df, (q31_t)0xbd0f7ca, (q31_t)0x250d57a0,
+    (q31_t)0xbd83f3d, (q31_t)0x251795f3, (q31_t)0xbdf88b3, (q31_t)0x2521d2d8,
+    (q31_t)0xbe6d42b, (q31_t)0x252c0e4f, (q31_t)0xbee21a5, (q31_t)0x25364857,
+    (q31_t)0xbf57121, (q31_t)0x254080ef, (q31_t)0xbfcc29f, (q31_t)0x254ab818,
+    (q31_t)0xc04161e, (q31_t)0x2554edd1, (q31_t)0xc0b6b9e, (q31_t)0x255f2219,
+    (q31_t)0xc12c31f, (q31_t)0x256954f1, (q31_t)0xc1a1ca0, (q31_t)0x25738657,
+    (q31_t)0xc217822, (q31_t)0x257db64c, (q31_t)0xc28d5a3, (q31_t)0x2587e4cf,
+    (q31_t)0xc303524, (q31_t)0x259211df, (q31_t)0xc3796a5, (q31_t)0x259c3d7c,
+    (q31_t)0xc3efa25, (q31_t)0x25a667a7, (q31_t)0xc465fa3, (q31_t)0x25b0905d,
+    (q31_t)0xc4dc720, (q31_t)0x25bab7a0, (q31_t)0xc55309b, (q31_t)0x25c4dd6e,
+    (q31_t)0xc5c9c14, (q31_t)0x25cf01c8, (q31_t)0xc64098b, (q31_t)0x25d924ac,
+    (q31_t)0xc6b78ff, (q31_t)0x25e3461b, (q31_t)0xc72ea70, (q31_t)0x25ed6614,
+    (q31_t)0xc7a5dde, (q31_t)0x25f78497, (q31_t)0xc81d349, (q31_t)0x2601a1a2,
+    (q31_t)0xc894aaf, (q31_t)0x260bbd37, (q31_t)0xc90c412, (q31_t)0x2615d754,
+    (q31_t)0xc983f70, (q31_t)0x261feffa, (q31_t)0xc9fbcca, (q31_t)0x262a0727,
+    (q31_t)0xca73c1e, (q31_t)0x26341cdb, (q31_t)0xcaebd6e, (q31_t)0x263e3117,
+    (q31_t)0xcb640b8, (q31_t)0x264843d9, (q31_t)0xcbdc5fc, (q31_t)0x26525521,
+    (q31_t)0xcc54d3a, (q31_t)0x265c64ef, (q31_t)0xcccd671, (q31_t)0x26667342,
+    (q31_t)0xcd461a2, (q31_t)0x2670801a, (q31_t)0xcdbeecc, (q31_t)0x267a8b77,
+    (q31_t)0xce37def, (q31_t)0x26849558, (q31_t)0xceb0f0a, (q31_t)0x268e9dbd,
+    (q31_t)0xcf2a21d, (q31_t)0x2698a4a6, (q31_t)0xcfa3729, (q31_t)0x26a2aa11,
+    (q31_t)0xd01ce2b, (q31_t)0x26acadff, (q31_t)0xd096725, (q31_t)0x26b6b070,
+    (q31_t)0xd110216, (q31_t)0x26c0b162, (q31_t)0xd189efe, (q31_t)0x26cab0d6,
+    (q31_t)0xd203ddc, (q31_t)0x26d4aecb, (q31_t)0xd27deb0, (q31_t)0x26deab41,
+    (q31_t)0xd2f817b, (q31_t)0x26e8a637, (q31_t)0xd37263a, (q31_t)0x26f29fad,
+    (q31_t)0xd3eccef, (q31_t)0x26fc97a3, (q31_t)0xd467599, (q31_t)0x27068e18,
+    (q31_t)0xd4e2037, (q31_t)0x2710830c, (q31_t)0xd55ccca, (q31_t)0x271a767e,
+    (q31_t)0xd5d7b50, (q31_t)0x2724686e, (q31_t)0xd652bcb, (q31_t)0x272e58dc,
+    (q31_t)0xd6cde39, (q31_t)0x273847c8, (q31_t)0xd74929a, (q31_t)0x27423530,
+    (q31_t)0xd7c48ee, (q31_t)0x274c2115, (q31_t)0xd840134, (q31_t)0x27560b76,
+    (q31_t)0xd8bbb6d, (q31_t)0x275ff452, (q31_t)0xd937798, (q31_t)0x2769dbaa,
+    (q31_t)0xd9b35b4, (q31_t)0x2773c17d, (q31_t)0xda2f5c2, (q31_t)0x277da5cb,
+    (q31_t)0xdaab7c0, (q31_t)0x27878893, (q31_t)0xdb27bb0, (q31_t)0x279169d5,
+    (q31_t)0xdba4190, (q31_t)0x279b4990, (q31_t)0xdc20960, (q31_t)0x27a527c4,
+    (q31_t)0xdc9d320, (q31_t)0x27af0472, (q31_t)0xdd19ed0, (q31_t)0x27b8df97,
+    (q31_t)0xdd96c6f, (q31_t)0x27c2b934, (q31_t)0xde13bfd, (q31_t)0x27cc9149,
+    (q31_t)0xde90d79, (q31_t)0x27d667d5, (q31_t)0xdf0e0e4, (q31_t)0x27e03cd8,
+    (q31_t)0xdf8b63d, (q31_t)0x27ea1052, (q31_t)0xe008d84, (q31_t)0x27f3e241,
+    (q31_t)0xe0866b8, (q31_t)0x27fdb2a7, (q31_t)0xe1041d9, (q31_t)0x28078181,
+    (q31_t)0xe181ee8, (q31_t)0x28114ed0, (q31_t)0xe1ffde2, (q31_t)0x281b1a94,
+    (q31_t)0xe27dec9, (q31_t)0x2824e4cc, (q31_t)0xe2fc19c, (q31_t)0x282ead78,
+    (q31_t)0xe37a65b, (q31_t)0x28387498, (q31_t)0xe3f8d05, (q31_t)0x28423a2a,
+    (q31_t)0xe47759a, (q31_t)0x284bfe2f, (q31_t)0xe4f6019, (q31_t)0x2855c0a6,
+    (q31_t)0xe574c84, (q31_t)0x285f8190, (q31_t)0xe5f3ad8, (q31_t)0x286940ea,
+    (q31_t)0xe672b16, (q31_t)0x2872feb6, (q31_t)0xe6f1d3d, (q31_t)0x287cbaf3,
+    (q31_t)0xe77114e, (q31_t)0x288675a0, (q31_t)0xe7f0748, (q31_t)0x28902ebd,
+    (q31_t)0xe86ff2a, (q31_t)0x2899e64a, (q31_t)0xe8ef8f4, (q31_t)0x28a39c46,
+    (q31_t)0xe96f4a7, (q31_t)0x28ad50b1, (q31_t)0xe9ef241, (q31_t)0x28b7038b,
+    (q31_t)0xea6f1c2, (q31_t)0x28c0b4d2, (q31_t)0xeaef32b, (q31_t)0x28ca6488,
+    (q31_t)0xeb6f67a, (q31_t)0x28d412ab, (q31_t)0xebefbb0, (q31_t)0x28ddbf3b,
+    (q31_t)0xec702cb, (q31_t)0x28e76a37, (q31_t)0xecf0bcd, (q31_t)0x28f113a0,
+    (q31_t)0xed716b4, (q31_t)0x28fabb75, (q31_t)0xedf2380, (q31_t)0x290461b5,
+    (q31_t)0xee73231, (q31_t)0x290e0661, (q31_t)0xeef42c7, (q31_t)0x2917a977,
+    (q31_t)0xef75541, (q31_t)0x29214af8, (q31_t)0xeff699f, (q31_t)0x292aeae3,
+    (q31_t)0xf077fe1, (q31_t)0x29348937, (q31_t)0xf0f9805, (q31_t)0x293e25f5,
+    (q31_t)0xf17b20d, (q31_t)0x2947c11c, (q31_t)0xf1fcdf8, (q31_t)0x29515aab,
+    (q31_t)0xf27ebc5, (q31_t)0x295af2a3, (q31_t)0xf300b74, (q31_t)0x29648902,
+    (q31_t)0xf382d05, (q31_t)0x296e1dc9, (q31_t)0xf405077, (q31_t)0x2977b0f7,
+    (q31_t)0xf4875ca, (q31_t)0x2981428c, (q31_t)0xf509cfe, (q31_t)0x298ad287,
+    (q31_t)0xf58c613, (q31_t)0x299460e8, (q31_t)0xf60f108, (q31_t)0x299dedaf,
+    (q31_t)0xf691ddd, (q31_t)0x29a778db, (q31_t)0xf714c91, (q31_t)0x29b1026c,
+    (q31_t)0xf797d24, (q31_t)0x29ba8a61, (q31_t)0xf81af97, (q31_t)0x29c410ba,
+    (q31_t)0xf89e3e8, (q31_t)0x29cd9578, (q31_t)0xf921a17, (q31_t)0x29d71899,
+    (q31_t)0xf9a5225, (q31_t)0x29e09a1c, (q31_t)0xfa28c10, (q31_t)0x29ea1a03,
+    (q31_t)0xfaac7d8, (q31_t)0x29f3984c, (q31_t)0xfb3057d, (q31_t)0x29fd14f6,
+    (q31_t)0xfbb4500, (q31_t)0x2a069003, (q31_t)0xfc3865e, (q31_t)0x2a100970,
+    (q31_t)0xfcbc999, (q31_t)0x2a19813f, (q31_t)0xfd40eaf, (q31_t)0x2a22f76e,
+    (q31_t)0xfdc55a1, (q31_t)0x2a2c6bfd, (q31_t)0xfe49e6d, (q31_t)0x2a35deeb,
+    (q31_t)0xfece915, (q31_t)0x2a3f503a, (q31_t)0xff53597, (q31_t)0x2a48bfe7,
+    (q31_t)0xffd83f4, (q31_t)0x2a522df3, (q31_t)0x1005d42a, (q31_t)0x2a5b9a5d,
+    (q31_t)0x100e2639, (q31_t)0x2a650525, (q31_t)0x10167a22, (q31_t)0x2a6e6e4b,
+    (q31_t)0x101ecfe4, (q31_t)0x2a77d5ce, (q31_t)0x1027277e, (q31_t)0x2a813bae,
+    (q31_t)0x102f80f1, (q31_t)0x2a8a9fea, (q31_t)0x1037dc3b, (q31_t)0x2a940283,
+    (q31_t)0x1040395d, (q31_t)0x2a9d6377, (q31_t)0x10489856, (q31_t)0x2aa6c2c6,
+    (q31_t)0x1050f926, (q31_t)0x2ab02071, (q31_t)0x10595bcd, (q31_t)0x2ab97c77,
+    (q31_t)0x1061c04a, (q31_t)0x2ac2d6d6, (q31_t)0x106a269d, (q31_t)0x2acc2f90,
+    (q31_t)0x10728ec6, (q31_t)0x2ad586a3, (q31_t)0x107af8c4, (q31_t)0x2adedc10,
+    (q31_t)0x10836497, (q31_t)0x2ae82fd5, (q31_t)0x108bd23f, (q31_t)0x2af181f3,
+    (q31_t)0x109441bb, (q31_t)0x2afad269, (q31_t)0x109cb30b, (q31_t)0x2b042137,
+    (q31_t)0x10a5262f, (q31_t)0x2b0d6e5c, (q31_t)0x10ad9b26, (q31_t)0x2b16b9d9,
+    (q31_t)0x10b611f1, (q31_t)0x2b2003ac, (q31_t)0x10be8a8d, (q31_t)0x2b294bd5,
+    (q31_t)0x10c704fd, (q31_t)0x2b329255, (q31_t)0x10cf813e, (q31_t)0x2b3bd72a,
+    (q31_t)0x10d7ff51, (q31_t)0x2b451a55, (q31_t)0x10e07f36, (q31_t)0x2b4e5bd4,
+    (q31_t)0x10e900ec, (q31_t)0x2b579ba8, (q31_t)0x10f18472, (q31_t)0x2b60d9d0,
+    (q31_t)0x10fa09c9, (q31_t)0x2b6a164d, (q31_t)0x110290f0, (q31_t)0x2b73511c,
+    (q31_t)0x110b19e7, (q31_t)0x2b7c8a3f, (q31_t)0x1113a4ad, (q31_t)0x2b85c1b5,
+    (q31_t)0x111c3142, (q31_t)0x2b8ef77d, (q31_t)0x1124bfa6, (q31_t)0x2b982b97,
+    (q31_t)0x112d4fd9, (q31_t)0x2ba15e03, (q31_t)0x1135e1d9, (q31_t)0x2baa8ec0,
+    (q31_t)0x113e75a8, (q31_t)0x2bb3bdce, (q31_t)0x11470b44, (q31_t)0x2bbceb2d,
+    (q31_t)0x114fa2ad, (q31_t)0x2bc616dd, (q31_t)0x11583be2, (q31_t)0x2bcf40dc,
+    (q31_t)0x1160d6e5, (q31_t)0x2bd8692b, (q31_t)0x116973b3, (q31_t)0x2be18fc9,
+    (q31_t)0x1172124d, (q31_t)0x2beab4b6, (q31_t)0x117ab2b3, (q31_t)0x2bf3d7f2,
+    (q31_t)0x118354e4, (q31_t)0x2bfcf97c, (q31_t)0x118bf8e0, (q31_t)0x2c061953,
+    (q31_t)0x11949ea6, (q31_t)0x2c0f3779, (q31_t)0x119d4636, (q31_t)0x2c1853eb,
+    (q31_t)0x11a5ef90, (q31_t)0x2c216eaa, (q31_t)0x11ae9ab4, (q31_t)0x2c2a87b6,
+    (q31_t)0x11b747a0, (q31_t)0x2c339f0e, (q31_t)0x11bff656, (q31_t)0x2c3cb4b1,
+    (q31_t)0x11c8a6d4, (q31_t)0x2c45c8a0, (q31_t)0x11d1591a, (q31_t)0x2c4edada,
+    (q31_t)0x11da0d28, (q31_t)0x2c57eb5e, (q31_t)0x11e2c2fd, (q31_t)0x2c60fa2d,
+    (q31_t)0x11eb7a9a, (q31_t)0x2c6a0746, (q31_t)0x11f433fd, (q31_t)0x2c7312a9,
+    (q31_t)0x11fcef27, (q31_t)0x2c7c1c55, (q31_t)0x1205ac17, (q31_t)0x2c85244a,
+    (q31_t)0x120e6acc, (q31_t)0x2c8e2a87, (q31_t)0x12172b48, (q31_t)0x2c972f0d,
+    (q31_t)0x121fed88, (q31_t)0x2ca031da, (q31_t)0x1228b18d, (q31_t)0x2ca932ef,
+    (q31_t)0x12317756, (q31_t)0x2cb2324c, (q31_t)0x123a3ee4, (q31_t)0x2cbb2fef,
+    (q31_t)0x12430835, (q31_t)0x2cc42bd9, (q31_t)0x124bd34a, (q31_t)0x2ccd2609,
+    (q31_t)0x1254a021, (q31_t)0x2cd61e7f, (q31_t)0x125d6ebc, (q31_t)0x2cdf153a,
+    (q31_t)0x12663f19, (q31_t)0x2ce80a3a, (q31_t)0x126f1138, (q31_t)0x2cf0fd80,
+    (q31_t)0x1277e518, (q31_t)0x2cf9ef09, (q31_t)0x1280babb, (q31_t)0x2d02ded7,
+    (q31_t)0x1289921e, (q31_t)0x2d0bcce8, (q31_t)0x12926b41, (q31_t)0x2d14b93d,
+    (q31_t)0x129b4626, (q31_t)0x2d1da3d5, (q31_t)0x12a422ca, (q31_t)0x2d268cb0,
+    (q31_t)0x12ad012e, (q31_t)0x2d2f73cd, (q31_t)0x12b5e151, (q31_t)0x2d38592c,
+    (q31_t)0x12bec333, (q31_t)0x2d413ccd, (q31_t)0x12c7a6d4, (q31_t)0x2d4a1eaf,
+    (q31_t)0x12d08c33, (q31_t)0x2d52fed2, (q31_t)0x12d97350, (q31_t)0x2d5bdd36,
+    (q31_t)0x12e25c2b, (q31_t)0x2d64b9da, (q31_t)0x12eb46c3, (q31_t)0x2d6d94bf,
+    (q31_t)0x12f43318, (q31_t)0x2d766de2, (q31_t)0x12fd2129, (q31_t)0x2d7f4545,
+    (q31_t)0x130610f7, (q31_t)0x2d881ae8, (q31_t)0x130f0280, (q31_t)0x2d90eec8,
+    (q31_t)0x1317f5c6, (q31_t)0x2d99c0e7, (q31_t)0x1320eac6, (q31_t)0x2da29144,
+    (q31_t)0x1329e181, (q31_t)0x2dab5fdf, (q31_t)0x1332d9f7, (q31_t)0x2db42cb6,
+    (q31_t)0x133bd427, (q31_t)0x2dbcf7cb, (q31_t)0x1344d011, (q31_t)0x2dc5c11c,
+    (q31_t)0x134dcdb4, (q31_t)0x2dce88aa, (q31_t)0x1356cd11, (q31_t)0x2dd74e73,
+    (q31_t)0x135fce26, (q31_t)0x2de01278, (q31_t)0x1368d0f3, (q31_t)0x2de8d4b8,
+    (q31_t)0x1371d579, (q31_t)0x2df19534, (q31_t)0x137adbb6, (q31_t)0x2dfa53e9,
+    (q31_t)0x1383e3ab, (q31_t)0x2e0310d9, (q31_t)0x138ced57, (q31_t)0x2e0bcc03,
+    (q31_t)0x1395f8ba, (q31_t)0x2e148566, (q31_t)0x139f05d3, (q31_t)0x2e1d3d03,
+    (q31_t)0x13a814a2, (q31_t)0x2e25f2d8, (q31_t)0x13b12526, (q31_t)0x2e2ea6e6,
+    (q31_t)0x13ba3760, (q31_t)0x2e37592c, (q31_t)0x13c34b4f, (q31_t)0x2e4009aa,
+    (q31_t)0x13cc60f2, (q31_t)0x2e48b860, (q31_t)0x13d5784a, (q31_t)0x2e51654c,
+    (q31_t)0x13de9156, (q31_t)0x2e5a1070, (q31_t)0x13e7ac15, (q31_t)0x2e62b9ca,
+    (q31_t)0x13f0c887, (q31_t)0x2e6b615a, (q31_t)0x13f9e6ad, (q31_t)0x2e740720,
+    (q31_t)0x14030684, (q31_t)0x2e7cab1c, (q31_t)0x140c280e, (q31_t)0x2e854d4d,
+    (q31_t)0x14154b4a, (q31_t)0x2e8dedb3, (q31_t)0x141e7037, (q31_t)0x2e968c4d,
+    (q31_t)0x142796d5, (q31_t)0x2e9f291b, (q31_t)0x1430bf24, (q31_t)0x2ea7c41e,
+    (q31_t)0x1439e923, (q31_t)0x2eb05d53, (q31_t)0x144314d3, (q31_t)0x2eb8f4bc,
+    (q31_t)0x144c4232, (q31_t)0x2ec18a58, (q31_t)0x14557140, (q31_t)0x2eca1e27,
+    (q31_t)0x145ea1fd, (q31_t)0x2ed2b027, (q31_t)0x1467d469, (q31_t)0x2edb405a,
+    (q31_t)0x14710883, (q31_t)0x2ee3cebe, (q31_t)0x147a3e4b, (q31_t)0x2eec5b53,
+    (q31_t)0x148375c1, (q31_t)0x2ef4e619, (q31_t)0x148caee4, (q31_t)0x2efd6f10,
+    (q31_t)0x1495e9b3, (q31_t)0x2f05f637, (q31_t)0x149f2630, (q31_t)0x2f0e7b8e,
+    (q31_t)0x14a86458, (q31_t)0x2f16ff14, (q31_t)0x14b1a42c, (q31_t)0x2f1f80ca,
+    (q31_t)0x14bae5ab, (q31_t)0x2f2800af, (q31_t)0x14c428d6, (q31_t)0x2f307ec2,
+    (q31_t)0x14cd6dab, (q31_t)0x2f38fb03, (q31_t)0x14d6b42b, (q31_t)0x2f417573,
+    (q31_t)0x14dffc54, (q31_t)0x2f49ee0f, (q31_t)0x14e94627, (q31_t)0x2f5264da,
+    (q31_t)0x14f291a4, (q31_t)0x2f5ad9d1, (q31_t)0x14fbdec9, (q31_t)0x2f634cf5,
+    (q31_t)0x15052d97, (q31_t)0x2f6bbe45, (q31_t)0x150e7e0d, (q31_t)0x2f742dc1,
+    (q31_t)0x1517d02b, (q31_t)0x2f7c9b69, (q31_t)0x152123f0, (q31_t)0x2f85073c,
+    (q31_t)0x152a795d, (q31_t)0x2f8d713a, (q31_t)0x1533d070, (q31_t)0x2f95d963,
+    (q31_t)0x153d292a, (q31_t)0x2f9e3fb6, (q31_t)0x15468389, (q31_t)0x2fa6a433,
+    (q31_t)0x154fdf8f, (q31_t)0x2faf06da, (q31_t)0x15593d3a, (q31_t)0x2fb767aa,
+    (q31_t)0x15629c89, (q31_t)0x2fbfc6a3, (q31_t)0x156bfd7d, (q31_t)0x2fc823c5,
+    (q31_t)0x15756016, (q31_t)0x2fd07f0f, (q31_t)0x157ec452, (q31_t)0x2fd8d882,
+    (q31_t)0x15882a32, (q31_t)0x2fe1301c, (q31_t)0x159191b5, (q31_t)0x2fe985de,
+    (q31_t)0x159afadb, (q31_t)0x2ff1d9c7, (q31_t)0x15a465a3, (q31_t)0x2ffa2bd6,
+    (q31_t)0x15add20d, (q31_t)0x30027c0c, (q31_t)0x15b74019, (q31_t)0x300aca69,
+    (q31_t)0x15c0afc6, (q31_t)0x301316eb, (q31_t)0x15ca2115, (q31_t)0x301b6193,
+    (q31_t)0x15d39403, (q31_t)0x3023aa5f, (q31_t)0x15dd0892, (q31_t)0x302bf151,
+    (q31_t)0x15e67ec1, (q31_t)0x30343667, (q31_t)0x15eff690, (q31_t)0x303c79a2,
+    (q31_t)0x15f96ffd, (q31_t)0x3044bb00, (q31_t)0x1602eb0a, (q31_t)0x304cfa83,
+    (q31_t)0x160c67b4, (q31_t)0x30553828, (q31_t)0x1615e5fd, (q31_t)0x305d73f0,
+    (q31_t)0x161f65e4, (q31_t)0x3065addb, (q31_t)0x1628e767, (q31_t)0x306de5e9,
+    (q31_t)0x16326a88, (q31_t)0x30761c18, (q31_t)0x163bef46, (q31_t)0x307e5069,
+    (q31_t)0x1645759f, (q31_t)0x308682dc, (q31_t)0x164efd94, (q31_t)0x308eb36f,
+    (q31_t)0x16588725, (q31_t)0x3096e223, (q31_t)0x16621251, (q31_t)0x309f0ef8,
+    (q31_t)0x166b9f18, (q31_t)0x30a739ed, (q31_t)0x16752d79, (q31_t)0x30af6302,
+    (q31_t)0x167ebd74, (q31_t)0x30b78a36, (q31_t)0x16884f09, (q31_t)0x30bfaf89,
+    (q31_t)0x1691e237, (q31_t)0x30c7d2fb, (q31_t)0x169b76fe, (q31_t)0x30cff48c,
+    (q31_t)0x16a50d5d, (q31_t)0x30d8143b, (q31_t)0x16aea555, (q31_t)0x30e03208,
+    (q31_t)0x16b83ee4, (q31_t)0x30e84df3, (q31_t)0x16c1da0b, (q31_t)0x30f067fb,
+    (q31_t)0x16cb76c9, (q31_t)0x30f8801f, (q31_t)0x16d5151d, (q31_t)0x31009661,
+    (q31_t)0x16deb508, (q31_t)0x3108aabf, (q31_t)0x16e85689, (q31_t)0x3110bd39,
+    (q31_t)0x16f1f99f, (q31_t)0x3118cdcf, (q31_t)0x16fb9e4b, (q31_t)0x3120dc80,
+    (q31_t)0x1705448b, (q31_t)0x3128e94c, (q31_t)0x170eec60, (q31_t)0x3130f433,
+    (q31_t)0x171895c9, (q31_t)0x3138fd35, (q31_t)0x172240c5, (q31_t)0x31410450,
+    (q31_t)0x172bed55, (q31_t)0x31490986, (q31_t)0x17359b78, (q31_t)0x31510cd5,
+    (q31_t)0x173f4b2e, (q31_t)0x31590e3e, (q31_t)0x1748fc75, (q31_t)0x31610dbf,
+    (q31_t)0x1752af4f, (q31_t)0x31690b59, (q31_t)0x175c63ba, (q31_t)0x3171070c,
+    (q31_t)0x176619b6, (q31_t)0x317900d6, (q31_t)0x176fd143, (q31_t)0x3180f8b8,
+    (q31_t)0x17798a60, (q31_t)0x3188eeb2, (q31_t)0x1783450d, (q31_t)0x3190e2c3,
+    (q31_t)0x178d014a, (q31_t)0x3198d4ea, (q31_t)0x1796bf16, (q31_t)0x31a0c528,
+    (q31_t)0x17a07e70, (q31_t)0x31a8b37c, (q31_t)0x17aa3f5a, (q31_t)0x31b09fe7,
+    (q31_t)0x17b401d1, (q31_t)0x31b88a66, (q31_t)0x17bdc5d6, (q31_t)0x31c072fb,
+    (q31_t)0x17c78b68, (q31_t)0x31c859a5, (q31_t)0x17d15288, (q31_t)0x31d03e64,
+    (q31_t)0x17db1b34, (q31_t)0x31d82137, (q31_t)0x17e4e56c, (q31_t)0x31e0021e,
+    (q31_t)0x17eeb130, (q31_t)0x31e7e118, (q31_t)0x17f87e7f, (q31_t)0x31efbe27,
+    (q31_t)0x18024d59, (q31_t)0x31f79948, (q31_t)0x180c1dbf, (q31_t)0x31ff727c,
+    (q31_t)0x1815efae, (q31_t)0x320749c3, (q31_t)0x181fc328, (q31_t)0x320f1f1c,
+    (q31_t)0x1829982b, (q31_t)0x3216f287, (q31_t)0x18336eb7, (q31_t)0x321ec403,
+    (q31_t)0x183d46cc, (q31_t)0x32269391, (q31_t)0x18472069, (q31_t)0x322e6130,
+    (q31_t)0x1850fb8e, (q31_t)0x32362ce0, (q31_t)0x185ad83c, (q31_t)0x323df6a0,
+    (q31_t)0x1864b670, (q31_t)0x3245be70, (q31_t)0x186e962b, (q31_t)0x324d8450,
+    (q31_t)0x1878776d, (q31_t)0x32554840, (q31_t)0x18825a35, (q31_t)0x325d0a3e,
+    (q31_t)0x188c3e83, (q31_t)0x3264ca4c, (q31_t)0x18962456, (q31_t)0x326c8868,
+    (q31_t)0x18a00bae, (q31_t)0x32744493, (q31_t)0x18a9f48a, (q31_t)0x327bfecc,
+    (q31_t)0x18b3deeb, (q31_t)0x3283b712, (q31_t)0x18bdcad0, (q31_t)0x328b6d66,
+    (q31_t)0x18c7b838, (q31_t)0x329321c7, (q31_t)0x18d1a724, (q31_t)0x329ad435,
+    (q31_t)0x18db9792, (q31_t)0x32a284b0, (q31_t)0x18e58982, (q31_t)0x32aa3336,
+    (q31_t)0x18ef7cf4, (q31_t)0x32b1dfc9, (q31_t)0x18f971e8, (q31_t)0x32b98a67,
+    (q31_t)0x1903685d, (q31_t)0x32c13311, (q31_t)0x190d6053, (q31_t)0x32c8d9c6,
+    (q31_t)0x191759c9, (q31_t)0x32d07e85, (q31_t)0x192154bf, (q31_t)0x32d82150,
+    (q31_t)0x192b5135, (q31_t)0x32dfc224, (q31_t)0x19354f2a, (q31_t)0x32e76102,
+    (q31_t)0x193f4e9e, (q31_t)0x32eefdea, (q31_t)0x19494f90, (q31_t)0x32f698db,
+    (q31_t)0x19535201, (q31_t)0x32fe31d5, (q31_t)0x195d55ef, (q31_t)0x3305c8d7,
+    (q31_t)0x19675b5a, (q31_t)0x330d5de3, (q31_t)0x19716243, (q31_t)0x3314f0f6,
+    (q31_t)0x197b6aa8, (q31_t)0x331c8211, (q31_t)0x19857489, (q31_t)0x33241134,
+    (q31_t)0x198f7fe6, (q31_t)0x332b9e5e, (q31_t)0x19998cbe, (q31_t)0x3333298f,
+    (q31_t)0x19a39b11, (q31_t)0x333ab2c6, (q31_t)0x19adaadf, (q31_t)0x33423a04,
+    (q31_t)0x19b7bc27, (q31_t)0x3349bf48, (q31_t)0x19c1cee9, (q31_t)0x33514292,
+    (q31_t)0x19cbe325, (q31_t)0x3358c3e2, (q31_t)0x19d5f8d9, (q31_t)0x33604336,
+    (q31_t)0x19e01006, (q31_t)0x3367c090, (q31_t)0x19ea28ac, (q31_t)0x336f3bee,
+    (q31_t)0x19f442c9, (q31_t)0x3376b551, (q31_t)0x19fe5e5e, (q31_t)0x337e2cb7,
+    (q31_t)0x1a087b69, (q31_t)0x3385a222, (q31_t)0x1a1299ec, (q31_t)0x338d1590,
+    (q31_t)0x1a1cb9e5, (q31_t)0x33948701, (q31_t)0x1a26db54, (q31_t)0x339bf675,
+    (q31_t)0x1a30fe38, (q31_t)0x33a363ec, (q31_t)0x1a3b2292, (q31_t)0x33aacf65,
+    (q31_t)0x1a454860, (q31_t)0x33b238e0, (q31_t)0x1a4f6fa3, (q31_t)0x33b9a05d,
+    (q31_t)0x1a599859, (q31_t)0x33c105db, (q31_t)0x1a63c284, (q31_t)0x33c8695b,
+    (q31_t)0x1a6dee21, (q31_t)0x33cfcadc, (q31_t)0x1a781b31, (q31_t)0x33d72a5d,
+    (q31_t)0x1a8249b4, (q31_t)0x33de87de, (q31_t)0x1a8c79a9, (q31_t)0x33e5e360,
+    (q31_t)0x1a96ab0f, (q31_t)0x33ed3ce1, (q31_t)0x1aa0dde7, (q31_t)0x33f49462,
+    (q31_t)0x1aab122f, (q31_t)0x33fbe9e2, (q31_t)0x1ab547e8, (q31_t)0x34033d61,
+    (q31_t)0x1abf7f11, (q31_t)0x340a8edf, (q31_t)0x1ac9b7a9, (q31_t)0x3411de5b,
+    (q31_t)0x1ad3f1b1, (q31_t)0x34192bd5, (q31_t)0x1ade2d28, (q31_t)0x3420774d,
+    (q31_t)0x1ae86a0d, (q31_t)0x3427c0c3, (q31_t)0x1af2a860, (q31_t)0x342f0836,
+    (q31_t)0x1afce821, (q31_t)0x34364da6, (q31_t)0x1b072950, (q31_t)0x343d9112,
+    (q31_t)0x1b116beb, (q31_t)0x3444d27b, (q31_t)0x1b1baff2, (q31_t)0x344c11e0,
+    (q31_t)0x1b25f566, (q31_t)0x34534f41, (q31_t)0x1b303c46, (q31_t)0x345a8a9d,
+    (q31_t)0x1b3a8491, (q31_t)0x3461c3f5, (q31_t)0x1b44ce46, (q31_t)0x3468fb47,
+    (q31_t)0x1b4f1967, (q31_t)0x34703095, (q31_t)0x1b5965f1, (q31_t)0x347763dd,
+    (q31_t)0x1b63b3e5, (q31_t)0x347e951f, (q31_t)0x1b6e0342, (q31_t)0x3485c45b,
+    (q31_t)0x1b785409, (q31_t)0x348cf190, (q31_t)0x1b82a638, (q31_t)0x34941cbf,
+    (q31_t)0x1b8cf9cf, (q31_t)0x349b45e7, (q31_t)0x1b974ece, (q31_t)0x34a26d08,
+    (q31_t)0x1ba1a534, (q31_t)0x34a99221, (q31_t)0x1babfd01, (q31_t)0x34b0b533,
+    (q31_t)0x1bb65634, (q31_t)0x34b7d63c, (q31_t)0x1bc0b0ce, (q31_t)0x34bef53d,
+    (q31_t)0x1bcb0cce, (q31_t)0x34c61236, (q31_t)0x1bd56a32, (q31_t)0x34cd2d26,
+    (q31_t)0x1bdfc8fc, (q31_t)0x34d4460c, (q31_t)0x1bea292b, (q31_t)0x34db5cea,
+    (q31_t)0x1bf48abd, (q31_t)0x34e271bd, (q31_t)0x1bfeedb3, (q31_t)0x34e98487,
+    (q31_t)0x1c09520d, (q31_t)0x34f09546, (q31_t)0x1c13b7c9, (q31_t)0x34f7a3fb,
+    (q31_t)0x1c1e1ee9, (q31_t)0x34feb0a5, (q31_t)0x1c28876a, (q31_t)0x3505bb44,
+    (q31_t)0x1c32f14d, (q31_t)0x350cc3d8, (q31_t)0x1c3d5c91, (q31_t)0x3513ca60,
+    (q31_t)0x1c47c936, (q31_t)0x351acedd, (q31_t)0x1c52373c, (q31_t)0x3521d14d,
+    (q31_t)0x1c5ca6a2, (q31_t)0x3528d1b1, (q31_t)0x1c671768, (q31_t)0x352fd008,
+    (q31_t)0x1c71898d, (q31_t)0x3536cc52, (q31_t)0x1c7bfd11, (q31_t)0x353dc68f,
+    (q31_t)0x1c8671f3, (q31_t)0x3544bebf, (q31_t)0x1c90e834, (q31_t)0x354bb4e1,
+    (q31_t)0x1c9b5fd2, (q31_t)0x3552a8f4, (q31_t)0x1ca5d8cd, (q31_t)0x35599afa,
+    (q31_t)0x1cb05326, (q31_t)0x35608af1, (q31_t)0x1cbacedb, (q31_t)0x356778d9,
+    (q31_t)0x1cc54bec, (q31_t)0x356e64b2, (q31_t)0x1ccfca59, (q31_t)0x35754e7c,
+    (q31_t)0x1cda4a21, (q31_t)0x357c3636, (q31_t)0x1ce4cb44, (q31_t)0x35831be0,
+    (q31_t)0x1cef4dc2, (q31_t)0x3589ff7a, (q31_t)0x1cf9d199, (q31_t)0x3590e104,
+    (q31_t)0x1d0456ca, (q31_t)0x3597c07d, (q31_t)0x1d0edd55, (q31_t)0x359e9de5,
+    (q31_t)0x1d196538, (q31_t)0x35a5793c, (q31_t)0x1d23ee74, (q31_t)0x35ac5282,
+    (q31_t)0x1d2e7908, (q31_t)0x35b329b5, (q31_t)0x1d3904f4, (q31_t)0x35b9fed7,
+    (q31_t)0x1d439236, (q31_t)0x35c0d1e7, (q31_t)0x1d4e20d0, (q31_t)0x35c7a2e3,
+    (q31_t)0x1d58b0c0, (q31_t)0x35ce71ce, (q31_t)0x1d634206, (q31_t)0x35d53ea5,
+    (q31_t)0x1d6dd4a2, (q31_t)0x35dc0968, (q31_t)0x1d786892, (q31_t)0x35e2d219,
+    (q31_t)0x1d82fdd8, (q31_t)0x35e998b5, (q31_t)0x1d8d9472, (q31_t)0x35f05d3d,
+    (q31_t)0x1d982c60, (q31_t)0x35f71fb1, (q31_t)0x1da2c5a2, (q31_t)0x35fde011,
+    (q31_t)0x1dad6036, (q31_t)0x36049e5b, (q31_t)0x1db7fc1e, (q31_t)0x360b5a90,
+    (q31_t)0x1dc29958, (q31_t)0x361214b0, (q31_t)0x1dcd37e4, (q31_t)0x3618ccba,
+    (q31_t)0x1dd7d7c1, (q31_t)0x361f82af, (q31_t)0x1de278ef, (q31_t)0x3626368d,
+    (q31_t)0x1ded1b6e, (q31_t)0x362ce855, (q31_t)0x1df7bf3e, (q31_t)0x36339806,
+    (q31_t)0x1e02645d, (q31_t)0x363a45a0, (q31_t)0x1e0d0acc, (q31_t)0x3640f123,
+    (q31_t)0x1e17b28a, (q31_t)0x36479a8e, (q31_t)0x1e225b96, (q31_t)0x364e41e2,
+    (q31_t)0x1e2d05f1, (q31_t)0x3654e71d, (q31_t)0x1e37b199, (q31_t)0x365b8a41,
+    (q31_t)0x1e425e8f, (q31_t)0x36622b4c, (q31_t)0x1e4d0cd2, (q31_t)0x3668ca3e,
+    (q31_t)0x1e57bc62, (q31_t)0x366f6717, (q31_t)0x1e626d3e, (q31_t)0x367601d7,
+    (q31_t)0x1e6d1f65, (q31_t)0x367c9a7e, (q31_t)0x1e77d2d8, (q31_t)0x3683310b,
+    (q31_t)0x1e828796, (q31_t)0x3689c57d, (q31_t)0x1e8d3d9e, (q31_t)0x369057d6,
+    (q31_t)0x1e97f4f1, (q31_t)0x3696e814, (q31_t)0x1ea2ad8d, (q31_t)0x369d7637,
+    (q31_t)0x1ead6773, (q31_t)0x36a4023f, (q31_t)0x1eb822a1, (q31_t)0x36aa8c2c,
+    (q31_t)0x1ec2df18, (q31_t)0x36b113fd, (q31_t)0x1ecd9cd7, (q31_t)0x36b799b3,
+    (q31_t)0x1ed85bdd, (q31_t)0x36be1d4c, (q31_t)0x1ee31c2b, (q31_t)0x36c49ec9,
+    (q31_t)0x1eedddc0, (q31_t)0x36cb1e2a, (q31_t)0x1ef8a09b, (q31_t)0x36d19b6e,
+    (q31_t)0x1f0364bc, (q31_t)0x36d81695, (q31_t)0x1f0e2a22, (q31_t)0x36de8f9e,
+    (q31_t)0x1f18f0ce, (q31_t)0x36e5068a, (q31_t)0x1f23b8be, (q31_t)0x36eb7b58,
+    (q31_t)0x1f2e81f3, (q31_t)0x36f1ee09, (q31_t)0x1f394c6b, (q31_t)0x36f85e9a,
+    (q31_t)0x1f441828, (q31_t)0x36fecd0e, (q31_t)0x1f4ee527, (q31_t)0x37053962,
+    (q31_t)0x1f59b369, (q31_t)0x370ba398, (q31_t)0x1f6482ed, (q31_t)0x37120bae,
+    (q31_t)0x1f6f53b3, (q31_t)0x371871a5, (q31_t)0x1f7a25ba, (q31_t)0x371ed57c,
+    (q31_t)0x1f84f902, (q31_t)0x37253733, (q31_t)0x1f8fcd8b, (q31_t)0x372b96ca,
+    (q31_t)0x1f9aa354, (q31_t)0x3731f440, (q31_t)0x1fa57a5d, (q31_t)0x37384f95,
+    (q31_t)0x1fb052a5, (q31_t)0x373ea8ca, (q31_t)0x1fbb2c2c, (q31_t)0x3744ffdd,
+    (q31_t)0x1fc606f1, (q31_t)0x374b54ce, (q31_t)0x1fd0e2f5, (q31_t)0x3751a79e,
+    (q31_t)0x1fdbc036, (q31_t)0x3757f84c, (q31_t)0x1fe69eb4, (q31_t)0x375e46d8,
+    (q31_t)0x1ff17e70, (q31_t)0x37649341, (q31_t)0x1ffc5f67, (q31_t)0x376add88,
+    (q31_t)0x2007419b, (q31_t)0x377125ac, (q31_t)0x2012250a, (q31_t)0x37776bac,
+    (q31_t)0x201d09b4, (q31_t)0x377daf89, (q31_t)0x2027ef99, (q31_t)0x3783f143,
+    (q31_t)0x2032d6b8, (q31_t)0x378a30d8, (q31_t)0x203dbf11, (q31_t)0x37906e49,
+    (q31_t)0x2048a8a4, (q31_t)0x3796a996, (q31_t)0x2053936f, (q31_t)0x379ce2be,
+    (q31_t)0x205e7f74, (q31_t)0x37a319c2, (q31_t)0x20696cb0, (q31_t)0x37a94ea0,
+    (q31_t)0x20745b24, (q31_t)0x37af8159, (q31_t)0x207f4acf, (q31_t)0x37b5b1ec,
+    (q31_t)0x208a3bb2, (q31_t)0x37bbe05a, (q31_t)0x20952dcb, (q31_t)0x37c20ca1,
+    (q31_t)0x20a0211a, (q31_t)0x37c836c2, (q31_t)0x20ab159e, (q31_t)0x37ce5ebd,
+    (q31_t)0x20b60b58, (q31_t)0x37d48490, (q31_t)0x20c10247, (q31_t)0x37daa83d,
+    (q31_t)0x20cbfa6a, (q31_t)0x37e0c9c3, (q31_t)0x20d6f3c1, (q31_t)0x37e6e921,
+    (q31_t)0x20e1ee4b, (q31_t)0x37ed0657, (q31_t)0x20ecea09, (q31_t)0x37f32165,
+    (q31_t)0x20f7e6f9, (q31_t)0x37f93a4b, (q31_t)0x2102e51c, (q31_t)0x37ff5109,
+    (q31_t)0x210de470, (q31_t)0x3805659e, (q31_t)0x2118e4f6, (q31_t)0x380b780a,
+    (q31_t)0x2123e6ad, (q31_t)0x3811884d, (q31_t)0x212ee995, (q31_t)0x38179666,
+    (q31_t)0x2139edac, (q31_t)0x381da256, (q31_t)0x2144f2f3, (q31_t)0x3823ac1d,
+    (q31_t)0x214ff96a, (q31_t)0x3829b3b9, (q31_t)0x215b0110, (q31_t)0x382fb92a,
+    (q31_t)0x216609e3, (q31_t)0x3835bc71, (q31_t)0x217113e5, (q31_t)0x383bbd8e,
+    (q31_t)0x217c1f15, (q31_t)0x3841bc7f, (q31_t)0x21872b72, (q31_t)0x3847b946,
+    (q31_t)0x219238fb, (q31_t)0x384db3e0, (q31_t)0x219d47b1, (q31_t)0x3853ac4f,
+    (q31_t)0x21a85793, (q31_t)0x3859a292, (q31_t)0x21b368a0, (q31_t)0x385f96a9,
+    (q31_t)0x21be7ad8, (q31_t)0x38658894, (q31_t)0x21c98e3b, (q31_t)0x386b7852,
+    (q31_t)0x21d4a2c8, (q31_t)0x387165e3, (q31_t)0x21dfb87f, (q31_t)0x38775147,
+    (q31_t)0x21eacf5f, (q31_t)0x387d3a7e, (q31_t)0x21f5e768, (q31_t)0x38832187,
+    (q31_t)0x22010099, (q31_t)0x38890663, (q31_t)0x220c1af3, (q31_t)0x388ee910,
+    (q31_t)0x22173674, (q31_t)0x3894c98f, (q31_t)0x2222531c, (q31_t)0x389aa7e0,
+    (q31_t)0x222d70eb, (q31_t)0x38a08402, (q31_t)0x22388fe1, (q31_t)0x38a65df6,
+    (q31_t)0x2243affc, (q31_t)0x38ac35ba, (q31_t)0x224ed13d, (q31_t)0x38b20b4f,
+    (q31_t)0x2259f3a3, (q31_t)0x38b7deb4, (q31_t)0x2265172e, (q31_t)0x38bdafea,
+    (q31_t)0x22703bdc, (q31_t)0x38c37eef, (q31_t)0x227b61af, (q31_t)0x38c94bc4,
+    (q31_t)0x228688a4, (q31_t)0x38cf1669, (q31_t)0x2291b0bd, (q31_t)0x38d4dedd,
+    (q31_t)0x229cd9f8, (q31_t)0x38daa520, (q31_t)0x22a80456, (q31_t)0x38e06932,
+    (q31_t)0x22b32fd4, (q31_t)0x38e62b13, (q31_t)0x22be5c74, (q31_t)0x38ebeac2,
+    (q31_t)0x22c98a35, (q31_t)0x38f1a840, (q31_t)0x22d4b916, (q31_t)0x38f7638b,
+    (q31_t)0x22dfe917, (q31_t)0x38fd1ca4, (q31_t)0x22eb1a37, (q31_t)0x3902d38b,
+    (q31_t)0x22f64c77, (q31_t)0x3908883f, (q31_t)0x23017fd5, (q31_t)0x390e3ac0,
+    (q31_t)0x230cb451, (q31_t)0x3913eb0e, (q31_t)0x2317e9eb, (q31_t)0x39199929,
+    (q31_t)0x232320a2, (q31_t)0x391f4510, (q31_t)0x232e5876, (q31_t)0x3924eec3,
+    (q31_t)0x23399167, (q31_t)0x392a9642, (q31_t)0x2344cb73, (q31_t)0x39303b8e,
+    (q31_t)0x2350069b, (q31_t)0x3935dea4, (q31_t)0x235b42df, (q31_t)0x393b7f86,
+    (q31_t)0x2366803c, (q31_t)0x39411e33, (q31_t)0x2371beb5, (q31_t)0x3946baac,
+    (q31_t)0x237cfe47, (q31_t)0x394c54ee, (q31_t)0x23883ef2, (q31_t)0x3951ecfc,
+    (q31_t)0x239380b6, (q31_t)0x395782d3, (q31_t)0x239ec393, (q31_t)0x395d1675,
+    (q31_t)0x23aa0788, (q31_t)0x3962a7e0, (q31_t)0x23b54c95, (q31_t)0x39683715,
+    (q31_t)0x23c092b9, (q31_t)0x396dc414, (q31_t)0x23cbd9f4, (q31_t)0x39734edc,
+    (q31_t)0x23d72245, (q31_t)0x3978d76c, (q31_t)0x23e26bac, (q31_t)0x397e5dc6,
+    (q31_t)0x23edb628, (q31_t)0x3983e1e8, (q31_t)0x23f901ba, (q31_t)0x398963d2,
+    (q31_t)0x24044e60, (q31_t)0x398ee385, (q31_t)0x240f9c1a, (q31_t)0x399460ff,
+    (q31_t)0x241aeae8, (q31_t)0x3999dc42, (q31_t)0x24263ac9, (q31_t)0x399f554b,
+    (q31_t)0x24318bbe, (q31_t)0x39a4cc1c, (q31_t)0x243cddc4, (q31_t)0x39aa40b4,
+    (q31_t)0x244830dd, (q31_t)0x39afb313, (q31_t)0x24538507, (q31_t)0x39b52339,
+    (q31_t)0x245eda43, (q31_t)0x39ba9125, (q31_t)0x246a308f, (q31_t)0x39bffcd7,
+    (q31_t)0x247587eb, (q31_t)0x39c5664f, (q31_t)0x2480e057, (q31_t)0x39cacd8d,
+    (q31_t)0x248c39d3, (q31_t)0x39d03291, (q31_t)0x2497945d, (q31_t)0x39d5955a,
+    (q31_t)0x24a2eff6, (q31_t)0x39daf5e8, (q31_t)0x24ae4c9d, (q31_t)0x39e0543c,
+    (q31_t)0x24b9aa52, (q31_t)0x39e5b054, (q31_t)0x24c50914, (q31_t)0x39eb0a31,
+    (q31_t)0x24d068e2, (q31_t)0x39f061d2, (q31_t)0x24dbc9bd, (q31_t)0x39f5b737,
+    (q31_t)0x24e72ba4, (q31_t)0x39fb0a60, (q31_t)0x24f28e96, (q31_t)0x3a005b4d,
+    (q31_t)0x24fdf294, (q31_t)0x3a05a9fd, (q31_t)0x2509579b, (q31_t)0x3a0af671,
+    (q31_t)0x2514bdad, (q31_t)0x3a1040a8, (q31_t)0x252024c9, (q31_t)0x3a1588a2,
+    (q31_t)0x252b8cee, (q31_t)0x3a1ace5f, (q31_t)0x2536f61b, (q31_t)0x3a2011de,
+    (q31_t)0x25426051, (q31_t)0x3a25531f, (q31_t)0x254dcb8f, (q31_t)0x3a2a9223,
+    (q31_t)0x255937d5, (q31_t)0x3a2fcee8, (q31_t)0x2564a521, (q31_t)0x3a350970,
+    (q31_t)0x25701374, (q31_t)0x3a3a41b9, (q31_t)0x257b82cd, (q31_t)0x3a3f77c3,
+    (q31_t)0x2586f32c, (q31_t)0x3a44ab8e, (q31_t)0x25926490, (q31_t)0x3a49dd1a,
+    (q31_t)0x259dd6f9, (q31_t)0x3a4f0c67, (q31_t)0x25a94a67, (q31_t)0x3a543974,
+    (q31_t)0x25b4bed8, (q31_t)0x3a596442, (q31_t)0x25c0344d, (q31_t)0x3a5e8cd0,
+    (q31_t)0x25cbaac5, (q31_t)0x3a63b31d, (q31_t)0x25d72240, (q31_t)0x3a68d72b,
+    (q31_t)0x25e29abc, (q31_t)0x3a6df8f8, (q31_t)0x25ee143b, (q31_t)0x3a731884,
+    (q31_t)0x25f98ebb, (q31_t)0x3a7835cf, (q31_t)0x26050a3b, (q31_t)0x3a7d50da,
+    (q31_t)0x261086bc, (q31_t)0x3a8269a3, (q31_t)0x261c043d, (q31_t)0x3a87802a,
+    (q31_t)0x262782be, (q31_t)0x3a8c9470, (q31_t)0x2633023e, (q31_t)0x3a91a674,
+    (q31_t)0x263e82bc, (q31_t)0x3a96b636, (q31_t)0x264a0438, (q31_t)0x3a9bc3b6,
+    (q31_t)0x265586b3, (q31_t)0x3aa0cef3, (q31_t)0x26610a2a, (q31_t)0x3aa5d7ee,
+    (q31_t)0x266c8e9f, (q31_t)0x3aaadea6, (q31_t)0x26781410, (q31_t)0x3aafe31b,
+    (q31_t)0x26839a7c, (q31_t)0x3ab4e54c, (q31_t)0x268f21e5, (q31_t)0x3ab9e53a,
+    (q31_t)0x269aaa48, (q31_t)0x3abee2e5, (q31_t)0x26a633a6, (q31_t)0x3ac3de4c,
+    (q31_t)0x26b1bdff, (q31_t)0x3ac8d76f, (q31_t)0x26bd4951, (q31_t)0x3acdce4d,
+    (q31_t)0x26c8d59c, (q31_t)0x3ad2c2e8, (q31_t)0x26d462e1, (q31_t)0x3ad7b53d,
+    (q31_t)0x26dff11d, (q31_t)0x3adca54e, (q31_t)0x26eb8052, (q31_t)0x3ae1931a,
+    (q31_t)0x26f7107e, (q31_t)0x3ae67ea1, (q31_t)0x2702a1a1, (q31_t)0x3aeb67e3,
+    (q31_t)0x270e33bb, (q31_t)0x3af04edf, (q31_t)0x2719c6cb, (q31_t)0x3af53395,
+    (q31_t)0x27255ad1, (q31_t)0x3afa1605, (q31_t)0x2730efcc, (q31_t)0x3afef630,
+    (q31_t)0x273c85bc, (q31_t)0x3b03d414, (q31_t)0x27481ca1, (q31_t)0x3b08afb2,
+    (q31_t)0x2753b479, (q31_t)0x3b0d8909, (q31_t)0x275f4d45, (q31_t)0x3b126019,
+    (q31_t)0x276ae704, (q31_t)0x3b1734e2, (q31_t)0x277681b6, (q31_t)0x3b1c0764,
+    (q31_t)0x27821d59, (q31_t)0x3b20d79e, (q31_t)0x278db9ef, (q31_t)0x3b25a591,
+    (q31_t)0x27995776, (q31_t)0x3b2a713d, (q31_t)0x27a4f5ed, (q31_t)0x3b2f3aa0,
+    (q31_t)0x27b09555, (q31_t)0x3b3401bb, (q31_t)0x27bc35ad, (q31_t)0x3b38c68e,
+    (q31_t)0x27c7d6f4, (q31_t)0x3b3d8918, (q31_t)0x27d3792b, (q31_t)0x3b42495a,
+    (q31_t)0x27df1c50, (q31_t)0x3b470753, (q31_t)0x27eac063, (q31_t)0x3b4bc303,
+    (q31_t)0x27f66564, (q31_t)0x3b507c69, (q31_t)0x28020b52, (q31_t)0x3b553386,
+    (q31_t)0x280db22d, (q31_t)0x3b59e85a, (q31_t)0x281959f4, (q31_t)0x3b5e9ae4,
+    (q31_t)0x282502a7, (q31_t)0x3b634b23, (q31_t)0x2830ac45, (q31_t)0x3b67f919,
+    (q31_t)0x283c56cf, (q31_t)0x3b6ca4c4, (q31_t)0x28480243, (q31_t)0x3b714e25,
+    (q31_t)0x2853aea1, (q31_t)0x3b75f53c, (q31_t)0x285f5be9, (q31_t)0x3b7a9a07,
+    (q31_t)0x286b0a1a, (q31_t)0x3b7f3c87, (q31_t)0x2876b934, (q31_t)0x3b83dcbc,
+    (q31_t)0x28826936, (q31_t)0x3b887aa6, (q31_t)0x288e1a20, (q31_t)0x3b8d1644,
+    (q31_t)0x2899cbf1, (q31_t)0x3b91af97, (q31_t)0x28a57ea9, (q31_t)0x3b96469d,
+    (q31_t)0x28b13248, (q31_t)0x3b9adb57, (q31_t)0x28bce6cd, (q31_t)0x3b9f6dc5,
+    (q31_t)0x28c89c37, (q31_t)0x3ba3fde7, (q31_t)0x28d45286, (q31_t)0x3ba88bbc,
+    (q31_t)0x28e009ba, (q31_t)0x3bad1744, (q31_t)0x28ebc1d3, (q31_t)0x3bb1a080,
+    (q31_t)0x28f77acf, (q31_t)0x3bb6276e, (q31_t)0x290334af, (q31_t)0x3bbaac0e,
+    (q31_t)0x290eef71, (q31_t)0x3bbf2e62, (q31_t)0x291aab16, (q31_t)0x3bc3ae67,
+    (q31_t)0x2926679c, (q31_t)0x3bc82c1f, (q31_t)0x29322505, (q31_t)0x3bcca789,
+    (q31_t)0x293de34e, (q31_t)0x3bd120a4, (q31_t)0x2949a278, (q31_t)0x3bd59771,
+    (q31_t)0x29556282, (q31_t)0x3bda0bf0, (q31_t)0x2961236c, (q31_t)0x3bde7e20,
+    (q31_t)0x296ce535, (q31_t)0x3be2ee01, (q31_t)0x2978a7dd, (q31_t)0x3be75b93,
+    (q31_t)0x29846b63, (q31_t)0x3bebc6d5, (q31_t)0x29902fc7, (q31_t)0x3bf02fc9,
+    (q31_t)0x299bf509, (q31_t)0x3bf4966c, (q31_t)0x29a7bb28, (q31_t)0x3bf8fac0,
+    (q31_t)0x29b38223, (q31_t)0x3bfd5cc4, (q31_t)0x29bf49fa, (q31_t)0x3c01bc78,
+    (q31_t)0x29cb12ad, (q31_t)0x3c0619dc, (q31_t)0x29d6dc3b, (q31_t)0x3c0a74f0,
+    (q31_t)0x29e2a6a3, (q31_t)0x3c0ecdb2, (q31_t)0x29ee71e6, (q31_t)0x3c132424,
+    (q31_t)0x29fa3e03, (q31_t)0x3c177845, (q31_t)0x2a060af9, (q31_t)0x3c1bca16,
+    (q31_t)0x2a11d8c8, (q31_t)0x3c201994, (q31_t)0x2a1da770, (q31_t)0x3c2466c2,
+    (q31_t)0x2a2976ef, (q31_t)0x3c28b19e, (q31_t)0x2a354746, (q31_t)0x3c2cfa28,
+    (q31_t)0x2a411874, (q31_t)0x3c314060, (q31_t)0x2a4cea79, (q31_t)0x3c358446,
+    (q31_t)0x2a58bd54, (q31_t)0x3c39c5da, (q31_t)0x2a649105, (q31_t)0x3c3e051b,
+    (q31_t)0x2a70658a, (q31_t)0x3c42420a, (q31_t)0x2a7c3ae5, (q31_t)0x3c467ca6,
+    (q31_t)0x2a881114, (q31_t)0x3c4ab4ef, (q31_t)0x2a93e817, (q31_t)0x3c4eeae5,
+    (q31_t)0x2a9fbfed, (q31_t)0x3c531e88, (q31_t)0x2aab9896, (q31_t)0x3c574fd8,
+    (q31_t)0x2ab77212, (q31_t)0x3c5b7ed4, (q31_t)0x2ac34c60, (q31_t)0x3c5fab7c,
+    (q31_t)0x2acf277f, (q31_t)0x3c63d5d1, (q31_t)0x2adb0370, (q31_t)0x3c67fdd1,
+    (q31_t)0x2ae6e031, (q31_t)0x3c6c237e, (q31_t)0x2af2bdc3, (q31_t)0x3c7046d6,
+    (q31_t)0x2afe9c24, (q31_t)0x3c7467d9, (q31_t)0x2b0a7b54, (q31_t)0x3c788688,
+    (q31_t)0x2b165b54, (q31_t)0x3c7ca2e2, (q31_t)0x2b223c22, (q31_t)0x3c80bce7,
+    (q31_t)0x2b2e1dbe, (q31_t)0x3c84d496, (q31_t)0x2b3a0027, (q31_t)0x3c88e9f1,
+    (q31_t)0x2b45e35d, (q31_t)0x3c8cfcf6, (q31_t)0x2b51c760, (q31_t)0x3c910da5,
+    (q31_t)0x2b5dac2f, (q31_t)0x3c951bff, (q31_t)0x2b6991ca, (q31_t)0x3c992803,
+    (q31_t)0x2b75782f, (q31_t)0x3c9d31b0, (q31_t)0x2b815f60, (q31_t)0x3ca13908,
+    (q31_t)0x2b8d475b, (q31_t)0x3ca53e09, (q31_t)0x2b99301f, (q31_t)0x3ca940b3,
+    (q31_t)0x2ba519ad, (q31_t)0x3cad4107, (q31_t)0x2bb10404, (q31_t)0x3cb13f04,
+    (q31_t)0x2bbcef23, (q31_t)0x3cb53aaa, (q31_t)0x2bc8db0b, (q31_t)0x3cb933f9,
+    (q31_t)0x2bd4c7ba, (q31_t)0x3cbd2af0, (q31_t)0x2be0b52f, (q31_t)0x3cc11f90,
+    (q31_t)0x2beca36c, (q31_t)0x3cc511d9, (q31_t)0x2bf8926f, (q31_t)0x3cc901c9,
+    (q31_t)0x2c048237, (q31_t)0x3cccef62, (q31_t)0x2c1072c4, (q31_t)0x3cd0daa2,
+    (q31_t)0x2c1c6417, (q31_t)0x3cd4c38b, (q31_t)0x2c28562d, (q31_t)0x3cd8aa1b,
+    (q31_t)0x2c344908, (q31_t)0x3cdc8e52, (q31_t)0x2c403ca5, (q31_t)0x3ce07031,
+    (q31_t)0x2c4c3106, (q31_t)0x3ce44fb7, (q31_t)0x2c582629, (q31_t)0x3ce82ce4,
+    (q31_t)0x2c641c0e, (q31_t)0x3cec07b8, (q31_t)0x2c7012b5, (q31_t)0x3cefe032,
+    (q31_t)0x2c7c0a1d, (q31_t)0x3cf3b653, (q31_t)0x2c880245, (q31_t)0x3cf78a1b,
+    (q31_t)0x2c93fb2e, (q31_t)0x3cfb5b89, (q31_t)0x2c9ff4d6, (q31_t)0x3cff2a9d,
+    (q31_t)0x2cabef3d, (q31_t)0x3d02f757, (q31_t)0x2cb7ea63, (q31_t)0x3d06c1b6,
+    (q31_t)0x2cc3e648, (q31_t)0x3d0a89bc, (q31_t)0x2ccfe2ea, (q31_t)0x3d0e4f67,
+    (q31_t)0x2cdbe04a, (q31_t)0x3d1212b7, (q31_t)0x2ce7de66, (q31_t)0x3d15d3ad,
+    (q31_t)0x2cf3dd3f, (q31_t)0x3d199248, (q31_t)0x2cffdcd4, (q31_t)0x3d1d4e88,
+    (q31_t)0x2d0bdd25, (q31_t)0x3d21086c, (q31_t)0x2d17de31, (q31_t)0x3d24bff6,
+    (q31_t)0x2d23dff7, (q31_t)0x3d287523, (q31_t)0x2d2fe277, (q31_t)0x3d2c27f6,
+    (q31_t)0x2d3be5b1, (q31_t)0x3d2fd86c, (q31_t)0x2d47e9a5, (q31_t)0x3d338687,
+    (q31_t)0x2d53ee51, (q31_t)0x3d373245, (q31_t)0x2d5ff3b5, (q31_t)0x3d3adba7,
+    (q31_t)0x2d6bf9d1, (q31_t)0x3d3e82ae, (q31_t)0x2d7800a5, (q31_t)0x3d422757,
+    (q31_t)0x2d84082f, (q31_t)0x3d45c9a4, (q31_t)0x2d901070, (q31_t)0x3d496994,
+    (q31_t)0x2d9c1967, (q31_t)0x3d4d0728, (q31_t)0x2da82313, (q31_t)0x3d50a25e,
+    (q31_t)0x2db42d74, (q31_t)0x3d543b37, (q31_t)0x2dc0388a, (q31_t)0x3d57d1b3,
+    (q31_t)0x2dcc4454, (q31_t)0x3d5b65d2, (q31_t)0x2dd850d2, (q31_t)0x3d5ef793,
+    (q31_t)0x2de45e03, (q31_t)0x3d6286f6, (q31_t)0x2df06be6, (q31_t)0x3d6613fb,
+    (q31_t)0x2dfc7a7c, (q31_t)0x3d699ea3, (q31_t)0x2e0889c4, (q31_t)0x3d6d26ec,
+    (q31_t)0x2e1499bd, (q31_t)0x3d70acd7, (q31_t)0x2e20aa67, (q31_t)0x3d743064,
+    (q31_t)0x2e2cbbc1, (q31_t)0x3d77b192, (q31_t)0x2e38cdcb, (q31_t)0x3d7b3061,
+    (q31_t)0x2e44e084, (q31_t)0x3d7eacd2, (q31_t)0x2e50f3ed, (q31_t)0x3d8226e4,
+    (q31_t)0x2e5d0804, (q31_t)0x3d859e96, (q31_t)0x2e691cc9, (q31_t)0x3d8913ea,
+    (q31_t)0x2e75323c, (q31_t)0x3d8c86de, (q31_t)0x2e81485c, (q31_t)0x3d8ff772,
+    (q31_t)0x2e8d5f29, (q31_t)0x3d9365a8, (q31_t)0x2e9976a1, (q31_t)0x3d96d17d,
+    (q31_t)0x2ea58ec6, (q31_t)0x3d9a3af2, (q31_t)0x2eb1a796, (q31_t)0x3d9da208,
+    (q31_t)0x2ebdc110, (q31_t)0x3da106bd, (q31_t)0x2ec9db35, (q31_t)0x3da46912,
+    (q31_t)0x2ed5f604, (q31_t)0x3da7c907, (q31_t)0x2ee2117c, (q31_t)0x3dab269b,
+    (q31_t)0x2eee2d9d, (q31_t)0x3dae81cf, (q31_t)0x2efa4a67, (q31_t)0x3db1daa2,
+    (q31_t)0x2f0667d9, (q31_t)0x3db53113, (q31_t)0x2f1285f2, (q31_t)0x3db88524,
+    (q31_t)0x2f1ea4b2, (q31_t)0x3dbbd6d4, (q31_t)0x2f2ac419, (q31_t)0x3dbf2622,
+    (q31_t)0x2f36e426, (q31_t)0x3dc2730f, (q31_t)0x2f4304d8, (q31_t)0x3dc5bd9b,
+    (q31_t)0x2f4f2630, (q31_t)0x3dc905c5, (q31_t)0x2f5b482d, (q31_t)0x3dcc4b8d,
+    (q31_t)0x2f676ace, (q31_t)0x3dcf8ef3, (q31_t)0x2f738e12, (q31_t)0x3dd2cff7,
+    (q31_t)0x2f7fb1fa, (q31_t)0x3dd60e99, (q31_t)0x2f8bd685, (q31_t)0x3dd94ad8,
+    (q31_t)0x2f97fbb2, (q31_t)0x3ddc84b5, (q31_t)0x2fa42181, (q31_t)0x3ddfbc30,
+    (q31_t)0x2fb047f2, (q31_t)0x3de2f148, (q31_t)0x2fbc6f03, (q31_t)0x3de623fd,
+    (q31_t)0x2fc896b5, (q31_t)0x3de9544f, (q31_t)0x2fd4bf08, (q31_t)0x3dec823e,
+    (q31_t)0x2fe0e7f9, (q31_t)0x3defadca, (q31_t)0x2fed118a, (q31_t)0x3df2d6f3,
+    (q31_t)0x2ff93bba, (q31_t)0x3df5fdb8, (q31_t)0x30056687, (q31_t)0x3df9221a,
+    (q31_t)0x301191f3, (q31_t)0x3dfc4418, (q31_t)0x301dbdfb, (q31_t)0x3dff63b2,
+    (q31_t)0x3029eaa1, (q31_t)0x3e0280e9, (q31_t)0x303617e2, (q31_t)0x3e059bbb,
+    (q31_t)0x304245c0, (q31_t)0x3e08b42a, (q31_t)0x304e7438, (q31_t)0x3e0bca34,
+    (q31_t)0x305aa34c, (q31_t)0x3e0eddd9, (q31_t)0x3066d2fa, (q31_t)0x3e11ef1b,
+    (q31_t)0x30730342, (q31_t)0x3e14fdf7, (q31_t)0x307f3424, (q31_t)0x3e180a6f,
+    (q31_t)0x308b659f, (q31_t)0x3e1b1482, (q31_t)0x309797b2, (q31_t)0x3e1e1c30,
+    (q31_t)0x30a3ca5d, (q31_t)0x3e212179, (q31_t)0x30affda0, (q31_t)0x3e24245d,
+    (q31_t)0x30bc317a, (q31_t)0x3e2724db, (q31_t)0x30c865ea, (q31_t)0x3e2a22f4,
+    (q31_t)0x30d49af1, (q31_t)0x3e2d1ea8, (q31_t)0x30e0d08d, (q31_t)0x3e3017f6,
+    (q31_t)0x30ed06bf, (q31_t)0x3e330ede, (q31_t)0x30f93d86, (q31_t)0x3e360360,
+    (q31_t)0x310574e0, (q31_t)0x3e38f57c, (q31_t)0x3111accf, (q31_t)0x3e3be532,
+    (q31_t)0x311de551, (q31_t)0x3e3ed282, (q31_t)0x312a1e66, (q31_t)0x3e41bd6c,
+    (q31_t)0x3136580d, (q31_t)0x3e44a5ef, (q31_t)0x31429247, (q31_t)0x3e478c0b,
+    (q31_t)0x314ecd11, (q31_t)0x3e4a6fc1, (q31_t)0x315b086d, (q31_t)0x3e4d5110,
+    (q31_t)0x31674459, (q31_t)0x3e502ff9, (q31_t)0x317380d6, (q31_t)0x3e530c7a,
+    (q31_t)0x317fbde2, (q31_t)0x3e55e694, (q31_t)0x318bfb7d, (q31_t)0x3e58be47,
+    (q31_t)0x319839a6, (q31_t)0x3e5b9392, (q31_t)0x31a4785e, (q31_t)0x3e5e6676,
+    (q31_t)0x31b0b7a4, (q31_t)0x3e6136f3, (q31_t)0x31bcf777, (q31_t)0x3e640507,
+    (q31_t)0x31c937d6, (q31_t)0x3e66d0b4, (q31_t)0x31d578c2, (q31_t)0x3e6999fa,
+    (q31_t)0x31e1ba3a, (q31_t)0x3e6c60d7, (q31_t)0x31edfc3d, (q31_t)0x3e6f254c,
+    (q31_t)0x31fa3ecb, (q31_t)0x3e71e759, (q31_t)0x320681e3, (q31_t)0x3e74a6fd,
+    (q31_t)0x3212c585, (q31_t)0x3e77643a, (q31_t)0x321f09b1, (q31_t)0x3e7a1f0d,
+    (q31_t)0x322b4e66, (q31_t)0x3e7cd778, (q31_t)0x323793a3, (q31_t)0x3e7f8d7b,
+    (q31_t)0x3243d968, (q31_t)0x3e824114, (q31_t)0x32501fb5, (q31_t)0x3e84f245,
+    (q31_t)0x325c6688, (q31_t)0x3e87a10c, (q31_t)0x3268ade3, (q31_t)0x3e8a4d6a,
+    (q31_t)0x3274f5c3, (q31_t)0x3e8cf75f, (q31_t)0x32813e2a, (q31_t)0x3e8f9eeb,
+    (q31_t)0x328d8715, (q31_t)0x3e92440d, (q31_t)0x3299d085, (q31_t)0x3e94e6c6,
+    (q31_t)0x32a61a7a, (q31_t)0x3e978715, (q31_t)0x32b264f2, (q31_t)0x3e9a24fb,
+    (q31_t)0x32beafed, (q31_t)0x3e9cc076, (q31_t)0x32cafb6b, (q31_t)0x3e9f5988,
+    (q31_t)0x32d7476c, (q31_t)0x3ea1f02f, (q31_t)0x32e393ef, (q31_t)0x3ea4846c,
+    (q31_t)0x32efe0f2, (q31_t)0x3ea7163f, (q31_t)0x32fc2e77, (q31_t)0x3ea9a5a8,
+    (q31_t)0x33087c7d, (q31_t)0x3eac32a6, (q31_t)0x3314cb02, (q31_t)0x3eaebd3a,
+    (q31_t)0x33211a07, (q31_t)0x3eb14563, (q31_t)0x332d698a, (q31_t)0x3eb3cb21,
+    (q31_t)0x3339b98d, (q31_t)0x3eb64e75, (q31_t)0x33460a0d, (q31_t)0x3eb8cf5d,
+    (q31_t)0x33525b0b, (q31_t)0x3ebb4ddb, (q31_t)0x335eac86, (q31_t)0x3ebdc9ed,
+    (q31_t)0x336afe7e, (q31_t)0x3ec04394, (q31_t)0x337750f2, (q31_t)0x3ec2bad0,
+    (q31_t)0x3383a3e2, (q31_t)0x3ec52fa0, (q31_t)0x338ff74d, (q31_t)0x3ec7a205,
+    (q31_t)0x339c4b32, (q31_t)0x3eca11fe, (q31_t)0x33a89f92, (q31_t)0x3ecc7f8b,
+    (q31_t)0x33b4f46c, (q31_t)0x3eceeaad, (q31_t)0x33c149bf, (q31_t)0x3ed15363,
+    (q31_t)0x33cd9f8b, (q31_t)0x3ed3b9ad, (q31_t)0x33d9f5cf, (q31_t)0x3ed61d8a,
+    (q31_t)0x33e64c8c, (q31_t)0x3ed87efc, (q31_t)0x33f2a3bf, (q31_t)0x3edade01,
+    (q31_t)0x33fefb6a, (q31_t)0x3edd3a9a, (q31_t)0x340b538b, (q31_t)0x3edf94c7,
+    (q31_t)0x3417ac22, (q31_t)0x3ee1ec87, (q31_t)0x3424052f, (q31_t)0x3ee441da,
+    (q31_t)0x34305eb0, (q31_t)0x3ee694c1, (q31_t)0x343cb8a7, (q31_t)0x3ee8e53a,
+    (q31_t)0x34491311, (q31_t)0x3eeb3347, (q31_t)0x34556def, (q31_t)0x3eed7ee7,
+    (q31_t)0x3461c940, (q31_t)0x3eefc81a, (q31_t)0x346e2504, (q31_t)0x3ef20ee0,
+    (q31_t)0x347a8139, (q31_t)0x3ef45338, (q31_t)0x3486dde1, (q31_t)0x3ef69523,
+    (q31_t)0x34933afa, (q31_t)0x3ef8d4a1, (q31_t)0x349f9884, (q31_t)0x3efb11b1,
+    (q31_t)0x34abf67e, (q31_t)0x3efd4c54, (q31_t)0x34b854e7, (q31_t)0x3eff8489,
+    (q31_t)0x34c4b3c0, (q31_t)0x3f01ba50, (q31_t)0x34d11308, (q31_t)0x3f03eda9,
+    (q31_t)0x34dd72be, (q31_t)0x3f061e95, (q31_t)0x34e9d2e3, (q31_t)0x3f084d12,
+    (q31_t)0x34f63374, (q31_t)0x3f0a7921, (q31_t)0x35029473, (q31_t)0x3f0ca2c2,
+    (q31_t)0x350ef5de, (q31_t)0x3f0ec9f5, (q31_t)0x351b57b5, (q31_t)0x3f10eeb9,
+    (q31_t)0x3527b9f7, (q31_t)0x3f13110f, (q31_t)0x35341ca5, (q31_t)0x3f1530f7,
+    (q31_t)0x35407fbd, (q31_t)0x3f174e70, (q31_t)0x354ce33f, (q31_t)0x3f19697a,
+    (q31_t)0x3559472b, (q31_t)0x3f1b8215, (q31_t)0x3565ab80, (q31_t)0x3f1d9842,
+    (q31_t)0x3572103d, (q31_t)0x3f1fabff, (q31_t)0x357e7563, (q31_t)0x3f21bd4e,
+    (q31_t)0x358adaf0, (q31_t)0x3f23cc2e, (q31_t)0x359740e5, (q31_t)0x3f25d89e,
+    (q31_t)0x35a3a740, (q31_t)0x3f27e29f, (q31_t)0x35b00e02, (q31_t)0x3f29ea31,
+    (q31_t)0x35bc7529, (q31_t)0x3f2bef53, (q31_t)0x35c8dcb6, (q31_t)0x3f2df206,
+    (q31_t)0x35d544a7, (q31_t)0x3f2ff24a, (q31_t)0x35e1acfd, (q31_t)0x3f31f01d,
+    (q31_t)0x35ee15b7, (q31_t)0x3f33eb81, (q31_t)0x35fa7ed4, (q31_t)0x3f35e476,
+    (q31_t)0x3606e854, (q31_t)0x3f37dafa, (q31_t)0x36135237, (q31_t)0x3f39cf0e,
+    (q31_t)0x361fbc7b, (q31_t)0x3f3bc0b3, (q31_t)0x362c2721, (q31_t)0x3f3dafe7,
+    (q31_t)0x36389228, (q31_t)0x3f3f9cab, (q31_t)0x3644fd8f, (q31_t)0x3f4186ff,
+    (q31_t)0x36516956, (q31_t)0x3f436ee3, (q31_t)0x365dd57d, (q31_t)0x3f455456,
+    (q31_t)0x366a4203, (q31_t)0x3f473759, (q31_t)0x3676aee8, (q31_t)0x3f4917eb,
+    (q31_t)0x36831c2b, (q31_t)0x3f4af60d, (q31_t)0x368f89cb, (q31_t)0x3f4cd1be,
+    (q31_t)0x369bf7c9, (q31_t)0x3f4eaafe, (q31_t)0x36a86623, (q31_t)0x3f5081cd,
+    (q31_t)0x36b4d4d9, (q31_t)0x3f52562c, (q31_t)0x36c143ec, (q31_t)0x3f54281a,
+    (q31_t)0x36cdb359, (q31_t)0x3f55f796, (q31_t)0x36da2321, (q31_t)0x3f57c4a2,
+    (q31_t)0x36e69344, (q31_t)0x3f598f3c, (q31_t)0x36f303c0, (q31_t)0x3f5b5765,
+    (q31_t)0x36ff7496, (q31_t)0x3f5d1d1d, (q31_t)0x370be5c4, (q31_t)0x3f5ee063,
+    (q31_t)0x3718574b, (q31_t)0x3f60a138, (q31_t)0x3724c92a, (q31_t)0x3f625f9b,
+    (q31_t)0x37313b60, (q31_t)0x3f641b8d, (q31_t)0x373daded, (q31_t)0x3f65d50d,
+    (q31_t)0x374a20d0, (q31_t)0x3f678c1c, (q31_t)0x3756940a, (q31_t)0x3f6940b8,
+    (q31_t)0x37630799, (q31_t)0x3f6af2e3, (q31_t)0x376f7b7d, (q31_t)0x3f6ca29c,
+    (q31_t)0x377befb5, (q31_t)0x3f6e4fe3, (q31_t)0x37886442, (q31_t)0x3f6ffab8,
+    (q31_t)0x3794d922, (q31_t)0x3f71a31b, (q31_t)0x37a14e55, (q31_t)0x3f73490b,
+    (q31_t)0x37adc3db, (q31_t)0x3f74ec8a, (q31_t)0x37ba39b3, (q31_t)0x3f768d96,
+    (q31_t)0x37c6afdc, (q31_t)0x3f782c30, (q31_t)0x37d32657, (q31_t)0x3f79c857,
+    (q31_t)0x37df9d22, (q31_t)0x3f7b620c, (q31_t)0x37ec143e, (q31_t)0x3f7cf94e,
+    (q31_t)0x37f88ba9, (q31_t)0x3f7e8e1e, (q31_t)0x38050364, (q31_t)0x3f80207b,
+    (q31_t)0x38117b6d, (q31_t)0x3f81b065, (q31_t)0x381df3c5, (q31_t)0x3f833ddd,
+    (q31_t)0x382a6c6a, (q31_t)0x3f84c8e2, (q31_t)0x3836e55d, (q31_t)0x3f865174,
+    (q31_t)0x38435e9d, (q31_t)0x3f87d792, (q31_t)0x384fd829, (q31_t)0x3f895b3e,
+    (q31_t)0x385c5201, (q31_t)0x3f8adc77, (q31_t)0x3868cc24, (q31_t)0x3f8c5b3d,
+    (q31_t)0x38754692, (q31_t)0x3f8dd78f, (q31_t)0x3881c14b, (q31_t)0x3f8f516e,
+    (q31_t)0x388e3c4d, (q31_t)0x3f90c8da, (q31_t)0x389ab799, (q31_t)0x3f923dd2,
+    (q31_t)0x38a7332e, (q31_t)0x3f93b058, (q31_t)0x38b3af0c, (q31_t)0x3f952069,
+    (q31_t)0x38c02b31, (q31_t)0x3f968e07, (q31_t)0x38cca79e, (q31_t)0x3f97f932,
+    (q31_t)0x38d92452, (q31_t)0x3f9961e8, (q31_t)0x38e5a14d, (q31_t)0x3f9ac82c,
+    (q31_t)0x38f21e8e, (q31_t)0x3f9c2bfb, (q31_t)0x38fe9c15, (q31_t)0x3f9d8d56,
+    (q31_t)0x390b19e0, (q31_t)0x3f9eec3e, (q31_t)0x391797f0, (q31_t)0x3fa048b2,
+    (q31_t)0x39241645, (q31_t)0x3fa1a2b2, (q31_t)0x393094dd, (q31_t)0x3fa2fa3d,
+    (q31_t)0x393d13b8, (q31_t)0x3fa44f55, (q31_t)0x394992d7, (q31_t)0x3fa5a1f9,
+    (q31_t)0x39561237, (q31_t)0x3fa6f228, (q31_t)0x396291d9, (q31_t)0x3fa83fe3,
+    (q31_t)0x396f11bc, (q31_t)0x3fa98b2a, (q31_t)0x397b91e1, (q31_t)0x3faad3fd,
+    (q31_t)0x39881245, (q31_t)0x3fac1a5b, (q31_t)0x399492ea, (q31_t)0x3fad5e45,
+    (q31_t)0x39a113cd, (q31_t)0x3fae9fbb, (q31_t)0x39ad94f0, (q31_t)0x3fafdebb,
+    (q31_t)0x39ba1651, (q31_t)0x3fb11b48, (q31_t)0x39c697f0, (q31_t)0x3fb2555f,
+    (q31_t)0x39d319cc, (q31_t)0x3fb38d02, (q31_t)0x39df9be6, (q31_t)0x3fb4c231,
+    (q31_t)0x39ec1e3b, (q31_t)0x3fb5f4ea, (q31_t)0x39f8a0cd, (q31_t)0x3fb7252f,
+    (q31_t)0x3a05239a, (q31_t)0x3fb852ff, (q31_t)0x3a11a6a3, (q31_t)0x3fb97e5a,
+    (q31_t)0x3a1e29e5, (q31_t)0x3fbaa740, (q31_t)0x3a2aad62, (q31_t)0x3fbbcdb1,
+    (q31_t)0x3a373119, (q31_t)0x3fbcf1ad, (q31_t)0x3a43b508, (q31_t)0x3fbe1334,
+    (q31_t)0x3a503930, (q31_t)0x3fbf3246, (q31_t)0x3a5cbd91, (q31_t)0x3fc04ee3,
+    (q31_t)0x3a694229, (q31_t)0x3fc1690a, (q31_t)0x3a75c6f8, (q31_t)0x3fc280bc,
+    (q31_t)0x3a824bfd, (q31_t)0x3fc395f9, (q31_t)0x3a8ed139, (q31_t)0x3fc4a8c1,
+    (q31_t)0x3a9b56ab, (q31_t)0x3fc5b913, (q31_t)0x3aa7dc52, (q31_t)0x3fc6c6f0,
+    (q31_t)0x3ab4622d, (q31_t)0x3fc7d258, (q31_t)0x3ac0e83d, (q31_t)0x3fc8db4a,
+    (q31_t)0x3acd6e81, (q31_t)0x3fc9e1c6, (q31_t)0x3ad9f4f8, (q31_t)0x3fcae5cd,
+    (q31_t)0x3ae67ba2, (q31_t)0x3fcbe75e, (q31_t)0x3af3027e, (q31_t)0x3fcce67a,
+    (q31_t)0x3aff898c, (q31_t)0x3fcde320, (q31_t)0x3b0c10cb, (q31_t)0x3fcedd50,
+    (q31_t)0x3b18983b, (q31_t)0x3fcfd50b, (q31_t)0x3b251fdc, (q31_t)0x3fd0ca4f,
+    (q31_t)0x3b31a7ac, (q31_t)0x3fd1bd1e, (q31_t)0x3b3e2fac, (q31_t)0x3fd2ad77,
+    (q31_t)0x3b4ab7db, (q31_t)0x3fd39b5a, (q31_t)0x3b574039, (q31_t)0x3fd486c7,
+    (q31_t)0x3b63c8c4, (q31_t)0x3fd56fbe, (q31_t)0x3b70517d, (q31_t)0x3fd6563f,
+    (q31_t)0x3b7cda63, (q31_t)0x3fd73a4a, (q31_t)0x3b896375, (q31_t)0x3fd81bdf,
+    (q31_t)0x3b95ecb4, (q31_t)0x3fd8fafe, (q31_t)0x3ba2761e, (q31_t)0x3fd9d7a7,
+    (q31_t)0x3baeffb3, (q31_t)0x3fdab1d9, (q31_t)0x3bbb8973, (q31_t)0x3fdb8996,
+    (q31_t)0x3bc8135c, (q31_t)0x3fdc5edc, (q31_t)0x3bd49d70, (q31_t)0x3fdd31ac,
+    (q31_t)0x3be127ac, (q31_t)0x3fde0205, (q31_t)0x3bedb212, (q31_t)0x3fdecfe8,
+    (q31_t)0x3bfa3c9f, (q31_t)0x3fdf9b55, (q31_t)0x3c06c754, (q31_t)0x3fe0644b,
+    (q31_t)0x3c135231, (q31_t)0x3fe12acb, (q31_t)0x3c1fdd34, (q31_t)0x3fe1eed5,
+    (q31_t)0x3c2c685d, (q31_t)0x3fe2b067, (q31_t)0x3c38f3ac, (q31_t)0x3fe36f84,
+    (q31_t)0x3c457f21, (q31_t)0x3fe42c2a, (q31_t)0x3c520aba, (q31_t)0x3fe4e659,
+    (q31_t)0x3c5e9678, (q31_t)0x3fe59e12, (q31_t)0x3c6b2259, (q31_t)0x3fe65354,
+    (q31_t)0x3c77ae5e, (q31_t)0x3fe7061f, (q31_t)0x3c843a85, (q31_t)0x3fe7b674,
+    (q31_t)0x3c90c6cf, (q31_t)0x3fe86452, (q31_t)0x3c9d533b, (q31_t)0x3fe90fb9,
+    (q31_t)0x3ca9dfc8, (q31_t)0x3fe9b8a9, (q31_t)0x3cb66c77, (q31_t)0x3fea5f23,
+    (q31_t)0x3cc2f945, (q31_t)0x3feb0326, (q31_t)0x3ccf8634, (q31_t)0x3feba4b2,
+    (q31_t)0x3cdc1342, (q31_t)0x3fec43c7, (q31_t)0x3ce8a06f, (q31_t)0x3fece065,
+    (q31_t)0x3cf52dbb, (q31_t)0x3fed7a8c, (q31_t)0x3d01bb24, (q31_t)0x3fee123d,
+    (q31_t)0x3d0e48ab, (q31_t)0x3feea776, (q31_t)0x3d1ad650, (q31_t)0x3fef3a39,
+    (q31_t)0x3d276410, (q31_t)0x3fefca84, (q31_t)0x3d33f1ed, (q31_t)0x3ff05858,
+    (q31_t)0x3d407fe6, (q31_t)0x3ff0e3b6, (q31_t)0x3d4d0df9, (q31_t)0x3ff16c9c,
+    (q31_t)0x3d599c28, (q31_t)0x3ff1f30b, (q31_t)0x3d662a70, (q31_t)0x3ff27703,
+    (q31_t)0x3d72b8d2, (q31_t)0x3ff2f884, (q31_t)0x3d7f474d, (q31_t)0x3ff3778e,
+    (q31_t)0x3d8bd5e1, (q31_t)0x3ff3f420, (q31_t)0x3d98648d, (q31_t)0x3ff46e3c,
+    (q31_t)0x3da4f351, (q31_t)0x3ff4e5e0, (q31_t)0x3db1822c, (q31_t)0x3ff55b0d,
+    (q31_t)0x3dbe111e, (q31_t)0x3ff5cdc3, (q31_t)0x3dcaa027, (q31_t)0x3ff63e01,
+    (q31_t)0x3dd72f45, (q31_t)0x3ff6abc8, (q31_t)0x3de3be78, (q31_t)0x3ff71718,
+    (q31_t)0x3df04dc0, (q31_t)0x3ff77ff1, (q31_t)0x3dfcdd1d, (q31_t)0x3ff7e652,
+    (q31_t)0x3e096c8d, (q31_t)0x3ff84a3c, (q31_t)0x3e15fc11, (q31_t)0x3ff8abae,
+    (q31_t)0x3e228ba7, (q31_t)0x3ff90aaa, (q31_t)0x3e2f1b50, (q31_t)0x3ff9672d,
+    (q31_t)0x3e3bab0b, (q31_t)0x3ff9c13a, (q31_t)0x3e483ad8, (q31_t)0x3ffa18cf,
+    (q31_t)0x3e54cab5, (q31_t)0x3ffa6dec, (q31_t)0x3e615aa3, (q31_t)0x3ffac092,
+    (q31_t)0x3e6deaa1, (q31_t)0x3ffb10c1, (q31_t)0x3e7a7aae, (q31_t)0x3ffb5e78,
+    (q31_t)0x3e870aca, (q31_t)0x3ffba9b8, (q31_t)0x3e939af5, (q31_t)0x3ffbf280,
+    (q31_t)0x3ea02b2e, (q31_t)0x3ffc38d1, (q31_t)0x3eacbb74, (q31_t)0x3ffc7caa,
+    (q31_t)0x3eb94bc8, (q31_t)0x3ffcbe0c, (q31_t)0x3ec5dc28, (q31_t)0x3ffcfcf6,
+    (q31_t)0x3ed26c94, (q31_t)0x3ffd3969, (q31_t)0x3edefd0c, (q31_t)0x3ffd7364,
+    (q31_t)0x3eeb8d8f, (q31_t)0x3ffdaae7, (q31_t)0x3ef81e1d, (q31_t)0x3ffddff3,
+    (q31_t)0x3f04aeb5, (q31_t)0x3ffe1288, (q31_t)0x3f113f56, (q31_t)0x3ffe42a4,
+    (q31_t)0x3f1dd001, (q31_t)0x3ffe704a, (q31_t)0x3f2a60b4, (q31_t)0x3ffe9b77,
+    (q31_t)0x3f36f170, (q31_t)0x3ffec42d, (q31_t)0x3f438234, (q31_t)0x3ffeea6c,
+    (q31_t)0x3f5012fe, (q31_t)0x3fff0e32, (q31_t)0x3f5ca3d0, (q31_t)0x3fff2f82,
+    (q31_t)0x3f6934a8, (q31_t)0x3fff4e59, (q31_t)0x3f75c585, (q31_t)0x3fff6ab9,
+    (q31_t)0x3f825668, (q31_t)0x3fff84a1, (q31_t)0x3f8ee750, (q31_t)0x3fff9c12,
+    (q31_t)0x3f9b783c, (q31_t)0x3fffb10b, (q31_t)0x3fa8092c, (q31_t)0x3fffc38c,
+    (q31_t)0x3fb49a1f, (q31_t)0x3fffd396, (q31_t)0x3fc12b16, (q31_t)0x3fffe128,
+    (q31_t)0x3fcdbc0f, (q31_t)0x3fffec43, (q31_t)0x3fda4d09, (q31_t)0x3ffff4e6,
+    (q31_t)0x3fe6de05, (q31_t)0x3ffffb11, (q31_t)0x3ff36f02, (q31_t)0x3ffffec4,
+};
+
+
+/**
+  @par
+  Generation of realCoefBQ31 array:
+  @par
+   n = 4096
+  <pre>for (i = 0; i < n; i++)
+  {
+     pBTable[2 * i]     = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
+     pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+  } </pre>
+  @par
+  Convert to fixed point Q31 format
+      round(pBTable[i] * pow(2, 31))
+ */
+
+const q31_t realCoefBQ31[8192] = {
+    (q31_t)0x40000000, (q31_t)0x40000000, (q31_t)0x400c90fe, (q31_t)0x3ffffec4,
+    (q31_t)0x401921fb, (q31_t)0x3ffffb11, (q31_t)0x4025b2f7, (q31_t)0x3ffff4e6,
+    (q31_t)0x403243f1, (q31_t)0x3fffec43, (q31_t)0x403ed4ea, (q31_t)0x3fffe128,
+    (q31_t)0x404b65e1, (q31_t)0x3fffd396, (q31_t)0x4057f6d4, (q31_t)0x3fffc38c,
+    (q31_t)0x406487c4, (q31_t)0x3fffb10b, (q31_t)0x407118b0, (q31_t)0x3fff9c12,
+    (q31_t)0x407da998, (q31_t)0x3fff84a1, (q31_t)0x408a3a7b, (q31_t)0x3fff6ab9,
+    (q31_t)0x4096cb58, (q31_t)0x3fff4e59, (q31_t)0x40a35c30, (q31_t)0x3fff2f82,
+    (q31_t)0x40afed02, (q31_t)0x3fff0e32, (q31_t)0x40bc7dcc, (q31_t)0x3ffeea6c,
+    (q31_t)0x40c90e90, (q31_t)0x3ffec42d, (q31_t)0x40d59f4c, (q31_t)0x3ffe9b77,
+    (q31_t)0x40e22fff, (q31_t)0x3ffe704a, (q31_t)0x40eec0aa, (q31_t)0x3ffe42a4,
+    (q31_t)0x40fb514b, (q31_t)0x3ffe1288, (q31_t)0x4107e1e3, (q31_t)0x3ffddff3,
+    (q31_t)0x41147271, (q31_t)0x3ffdaae7, (q31_t)0x412102f4, (q31_t)0x3ffd7364,
+    (q31_t)0x412d936c, (q31_t)0x3ffd3969, (q31_t)0x413a23d8, (q31_t)0x3ffcfcf6,
+    (q31_t)0x4146b438, (q31_t)0x3ffcbe0c, (q31_t)0x4153448c, (q31_t)0x3ffc7caa,
+    (q31_t)0x415fd4d2, (q31_t)0x3ffc38d1, (q31_t)0x416c650b, (q31_t)0x3ffbf280,
+    (q31_t)0x4178f536, (q31_t)0x3ffba9b8, (q31_t)0x41858552, (q31_t)0x3ffb5e78,
+    (q31_t)0x4192155f, (q31_t)0x3ffb10c1, (q31_t)0x419ea55d, (q31_t)0x3ffac092,
+    (q31_t)0x41ab354b, (q31_t)0x3ffa6dec, (q31_t)0x41b7c528, (q31_t)0x3ffa18cf,
+    (q31_t)0x41c454f5, (q31_t)0x3ff9c13a, (q31_t)0x41d0e4b0, (q31_t)0x3ff9672d,
+    (q31_t)0x41dd7459, (q31_t)0x3ff90aaa, (q31_t)0x41ea03ef, (q31_t)0x3ff8abae,
+    (q31_t)0x41f69373, (q31_t)0x3ff84a3c, (q31_t)0x420322e3, (q31_t)0x3ff7e652,
+    (q31_t)0x420fb240, (q31_t)0x3ff77ff1, (q31_t)0x421c4188, (q31_t)0x3ff71718,
+    (q31_t)0x4228d0bb, (q31_t)0x3ff6abc8, (q31_t)0x42355fd9, (q31_t)0x3ff63e01,
+    (q31_t)0x4241eee2, (q31_t)0x3ff5cdc3, (q31_t)0x424e7dd4, (q31_t)0x3ff55b0d,
+    (q31_t)0x425b0caf, (q31_t)0x3ff4e5e0, (q31_t)0x42679b73, (q31_t)0x3ff46e3c,
+    (q31_t)0x42742a1f, (q31_t)0x3ff3f420, (q31_t)0x4280b8b3, (q31_t)0x3ff3778e,
+    (q31_t)0x428d472e, (q31_t)0x3ff2f884, (q31_t)0x4299d590, (q31_t)0x3ff27703,
+    (q31_t)0x42a663d8, (q31_t)0x3ff1f30b, (q31_t)0x42b2f207, (q31_t)0x3ff16c9c,
+    (q31_t)0x42bf801a, (q31_t)0x3ff0e3b6, (q31_t)0x42cc0e13, (q31_t)0x3ff05858,
+    (q31_t)0x42d89bf0, (q31_t)0x3fefca84, (q31_t)0x42e529b0, (q31_t)0x3fef3a39,
+    (q31_t)0x42f1b755, (q31_t)0x3feea776, (q31_t)0x42fe44dc, (q31_t)0x3fee123d,
+    (q31_t)0x430ad245, (q31_t)0x3fed7a8c, (q31_t)0x43175f91, (q31_t)0x3fece065,
+    (q31_t)0x4323ecbe, (q31_t)0x3fec43c7, (q31_t)0x433079cc, (q31_t)0x3feba4b2,
+    (q31_t)0x433d06bb, (q31_t)0x3feb0326, (q31_t)0x43499389, (q31_t)0x3fea5f23,
+    (q31_t)0x43562038, (q31_t)0x3fe9b8a9, (q31_t)0x4362acc5, (q31_t)0x3fe90fb9,
+    (q31_t)0x436f3931, (q31_t)0x3fe86452, (q31_t)0x437bc57b, (q31_t)0x3fe7b674,
+    (q31_t)0x438851a2, (q31_t)0x3fe7061f, (q31_t)0x4394dda7, (q31_t)0x3fe65354,
+    (q31_t)0x43a16988, (q31_t)0x3fe59e12, (q31_t)0x43adf546, (q31_t)0x3fe4e659,
+    (q31_t)0x43ba80df, (q31_t)0x3fe42c2a, (q31_t)0x43c70c54, (q31_t)0x3fe36f84,
+    (q31_t)0x43d397a3, (q31_t)0x3fe2b067, (q31_t)0x43e022cc, (q31_t)0x3fe1eed5,
+    (q31_t)0x43ecadcf, (q31_t)0x3fe12acb, (q31_t)0x43f938ac, (q31_t)0x3fe0644b,
+    (q31_t)0x4405c361, (q31_t)0x3fdf9b55, (q31_t)0x44124dee, (q31_t)0x3fdecfe8,
+    (q31_t)0x441ed854, (q31_t)0x3fde0205, (q31_t)0x442b6290, (q31_t)0x3fdd31ac,
+    (q31_t)0x4437eca4, (q31_t)0x3fdc5edc, (q31_t)0x4444768d, (q31_t)0x3fdb8996,
+    (q31_t)0x4451004d, (q31_t)0x3fdab1d9, (q31_t)0x445d89e2, (q31_t)0x3fd9d7a7,
+    (q31_t)0x446a134c, (q31_t)0x3fd8fafe, (q31_t)0x44769c8b, (q31_t)0x3fd81bdf,
+    (q31_t)0x4483259d, (q31_t)0x3fd73a4a, (q31_t)0x448fae83, (q31_t)0x3fd6563f,
+    (q31_t)0x449c373c, (q31_t)0x3fd56fbe, (q31_t)0x44a8bfc7, (q31_t)0x3fd486c7,
+    (q31_t)0x44b54825, (q31_t)0x3fd39b5a, (q31_t)0x44c1d054, (q31_t)0x3fd2ad77,
+    (q31_t)0x44ce5854, (q31_t)0x3fd1bd1e, (q31_t)0x44dae024, (q31_t)0x3fd0ca4f,
+    (q31_t)0x44e767c5, (q31_t)0x3fcfd50b, (q31_t)0x44f3ef35, (q31_t)0x3fcedd50,
+    (q31_t)0x45007674, (q31_t)0x3fcde320, (q31_t)0x450cfd82, (q31_t)0x3fcce67a,
+    (q31_t)0x4519845e, (q31_t)0x3fcbe75e, (q31_t)0x45260b08, (q31_t)0x3fcae5cd,
+    (q31_t)0x4532917f, (q31_t)0x3fc9e1c6, (q31_t)0x453f17c3, (q31_t)0x3fc8db4a,
+    (q31_t)0x454b9dd3, (q31_t)0x3fc7d258, (q31_t)0x455823ae, (q31_t)0x3fc6c6f0,
+    (q31_t)0x4564a955, (q31_t)0x3fc5b913, (q31_t)0x45712ec7, (q31_t)0x3fc4a8c1,
+    (q31_t)0x457db403, (q31_t)0x3fc395f9, (q31_t)0x458a3908, (q31_t)0x3fc280bc,
+    (q31_t)0x4596bdd7, (q31_t)0x3fc1690a, (q31_t)0x45a3426f, (q31_t)0x3fc04ee3,
+    (q31_t)0x45afc6d0, (q31_t)0x3fbf3246, (q31_t)0x45bc4af8, (q31_t)0x3fbe1334,
+    (q31_t)0x45c8cee7, (q31_t)0x3fbcf1ad, (q31_t)0x45d5529e, (q31_t)0x3fbbcdb1,
+    (q31_t)0x45e1d61b, (q31_t)0x3fbaa740, (q31_t)0x45ee595d, (q31_t)0x3fb97e5a,
+    (q31_t)0x45fadc66, (q31_t)0x3fb852ff, (q31_t)0x46075f33, (q31_t)0x3fb7252f,
+    (q31_t)0x4613e1c5, (q31_t)0x3fb5f4ea, (q31_t)0x4620641a, (q31_t)0x3fb4c231,
+    (q31_t)0x462ce634, (q31_t)0x3fb38d02, (q31_t)0x46396810, (q31_t)0x3fb2555f,
+    (q31_t)0x4645e9af, (q31_t)0x3fb11b48, (q31_t)0x46526b10, (q31_t)0x3fafdebb,
+    (q31_t)0x465eec33, (q31_t)0x3fae9fbb, (q31_t)0x466b6d16, (q31_t)0x3fad5e45,
+    (q31_t)0x4677edbb, (q31_t)0x3fac1a5b, (q31_t)0x46846e1f, (q31_t)0x3faad3fd,
+    (q31_t)0x4690ee44, (q31_t)0x3fa98b2a, (q31_t)0x469d6e27, (q31_t)0x3fa83fe3,
+    (q31_t)0x46a9edc9, (q31_t)0x3fa6f228, (q31_t)0x46b66d29, (q31_t)0x3fa5a1f9,
+    (q31_t)0x46c2ec48, (q31_t)0x3fa44f55, (q31_t)0x46cf6b23, (q31_t)0x3fa2fa3d,
+    (q31_t)0x46dbe9bb, (q31_t)0x3fa1a2b2, (q31_t)0x46e86810, (q31_t)0x3fa048b2,
+    (q31_t)0x46f4e620, (q31_t)0x3f9eec3e, (q31_t)0x470163eb, (q31_t)0x3f9d8d56,
+    (q31_t)0x470de172, (q31_t)0x3f9c2bfb, (q31_t)0x471a5eb3, (q31_t)0x3f9ac82c,
+    (q31_t)0x4726dbae, (q31_t)0x3f9961e8, (q31_t)0x47335862, (q31_t)0x3f97f932,
+    (q31_t)0x473fd4cf, (q31_t)0x3f968e07, (q31_t)0x474c50f4, (q31_t)0x3f952069,
+    (q31_t)0x4758ccd2, (q31_t)0x3f93b058, (q31_t)0x47654867, (q31_t)0x3f923dd2,
+    (q31_t)0x4771c3b3, (q31_t)0x3f90c8da, (q31_t)0x477e3eb5, (q31_t)0x3f8f516e,
+    (q31_t)0x478ab96e, (q31_t)0x3f8dd78f, (q31_t)0x479733dc, (q31_t)0x3f8c5b3d,
+    (q31_t)0x47a3adff, (q31_t)0x3f8adc77, (q31_t)0x47b027d7, (q31_t)0x3f895b3e,
+    (q31_t)0x47bca163, (q31_t)0x3f87d792, (q31_t)0x47c91aa3, (q31_t)0x3f865174,
+    (q31_t)0x47d59396, (q31_t)0x3f84c8e2, (q31_t)0x47e20c3b, (q31_t)0x3f833ddd,
+    (q31_t)0x47ee8493, (q31_t)0x3f81b065, (q31_t)0x47fafc9c, (q31_t)0x3f80207b,
+    (q31_t)0x48077457, (q31_t)0x3f7e8e1e, (q31_t)0x4813ebc2, (q31_t)0x3f7cf94e,
+    (q31_t)0x482062de, (q31_t)0x3f7b620c, (q31_t)0x482cd9a9, (q31_t)0x3f79c857,
+    (q31_t)0x48395024, (q31_t)0x3f782c30, (q31_t)0x4845c64d, (q31_t)0x3f768d96,
+    (q31_t)0x48523c25, (q31_t)0x3f74ec8a, (q31_t)0x485eb1ab, (q31_t)0x3f73490b,
+    (q31_t)0x486b26de, (q31_t)0x3f71a31b, (q31_t)0x48779bbe, (q31_t)0x3f6ffab8,
+    (q31_t)0x4884104b, (q31_t)0x3f6e4fe3, (q31_t)0x48908483, (q31_t)0x3f6ca29c,
+    (q31_t)0x489cf867, (q31_t)0x3f6af2e3, (q31_t)0x48a96bf6, (q31_t)0x3f6940b8,
+    (q31_t)0x48b5df30, (q31_t)0x3f678c1c, (q31_t)0x48c25213, (q31_t)0x3f65d50d,
+    (q31_t)0x48cec4a0, (q31_t)0x3f641b8d, (q31_t)0x48db36d6, (q31_t)0x3f625f9b,
+    (q31_t)0x48e7a8b5, (q31_t)0x3f60a138, (q31_t)0x48f41a3c, (q31_t)0x3f5ee063,
+    (q31_t)0x49008b6a, (q31_t)0x3f5d1d1d, (q31_t)0x490cfc40, (q31_t)0x3f5b5765,
+    (q31_t)0x49196cbc, (q31_t)0x3f598f3c, (q31_t)0x4925dcdf, (q31_t)0x3f57c4a2,
+    (q31_t)0x49324ca7, (q31_t)0x3f55f796, (q31_t)0x493ebc14, (q31_t)0x3f54281a,
+    (q31_t)0x494b2b27, (q31_t)0x3f52562c, (q31_t)0x495799dd, (q31_t)0x3f5081cd,
+    (q31_t)0x49640837, (q31_t)0x3f4eaafe, (q31_t)0x49707635, (q31_t)0x3f4cd1be,
+    (q31_t)0x497ce3d5, (q31_t)0x3f4af60d, (q31_t)0x49895118, (q31_t)0x3f4917eb,
+    (q31_t)0x4995bdfd, (q31_t)0x3f473759, (q31_t)0x49a22a83, (q31_t)0x3f455456,
+    (q31_t)0x49ae96aa, (q31_t)0x3f436ee3, (q31_t)0x49bb0271, (q31_t)0x3f4186ff,
+    (q31_t)0x49c76dd8, (q31_t)0x3f3f9cab, (q31_t)0x49d3d8df, (q31_t)0x3f3dafe7,
+    (q31_t)0x49e04385, (q31_t)0x3f3bc0b3, (q31_t)0x49ecadc9, (q31_t)0x3f39cf0e,
+    (q31_t)0x49f917ac, (q31_t)0x3f37dafa, (q31_t)0x4a05812c, (q31_t)0x3f35e476,
+    (q31_t)0x4a11ea49, (q31_t)0x3f33eb81, (q31_t)0x4a1e5303, (q31_t)0x3f31f01d,
+    (q31_t)0x4a2abb59, (q31_t)0x3f2ff24a, (q31_t)0x4a37234a, (q31_t)0x3f2df206,
+    (q31_t)0x4a438ad7, (q31_t)0x3f2bef53, (q31_t)0x4a4ff1fe, (q31_t)0x3f29ea31,
+    (q31_t)0x4a5c58c0, (q31_t)0x3f27e29f, (q31_t)0x4a68bf1b, (q31_t)0x3f25d89e,
+    (q31_t)0x4a752510, (q31_t)0x3f23cc2e, (q31_t)0x4a818a9d, (q31_t)0x3f21bd4e,
+    (q31_t)0x4a8defc3, (q31_t)0x3f1fabff, (q31_t)0x4a9a5480, (q31_t)0x3f1d9842,
+    (q31_t)0x4aa6b8d5, (q31_t)0x3f1b8215, (q31_t)0x4ab31cc1, (q31_t)0x3f19697a,
+    (q31_t)0x4abf8043, (q31_t)0x3f174e70, (q31_t)0x4acbe35b, (q31_t)0x3f1530f7,
+    (q31_t)0x4ad84609, (q31_t)0x3f13110f, (q31_t)0x4ae4a84b, (q31_t)0x3f10eeb9,
+    (q31_t)0x4af10a22, (q31_t)0x3f0ec9f5, (q31_t)0x4afd6b8d, (q31_t)0x3f0ca2c2,
+    (q31_t)0x4b09cc8c, (q31_t)0x3f0a7921, (q31_t)0x4b162d1d, (q31_t)0x3f084d12,
+    (q31_t)0x4b228d42, (q31_t)0x3f061e95, (q31_t)0x4b2eecf8, (q31_t)0x3f03eda9,
+    (q31_t)0x4b3b4c40, (q31_t)0x3f01ba50, (q31_t)0x4b47ab19, (q31_t)0x3eff8489,
+    (q31_t)0x4b540982, (q31_t)0x3efd4c54, (q31_t)0x4b60677c, (q31_t)0x3efb11b1,
+    (q31_t)0x4b6cc506, (q31_t)0x3ef8d4a1, (q31_t)0x4b79221f, (q31_t)0x3ef69523,
+    (q31_t)0x4b857ec7, (q31_t)0x3ef45338, (q31_t)0x4b91dafc, (q31_t)0x3ef20ee0,
+    (q31_t)0x4b9e36c0, (q31_t)0x3eefc81a, (q31_t)0x4baa9211, (q31_t)0x3eed7ee7,
+    (q31_t)0x4bb6ecef, (q31_t)0x3eeb3347, (q31_t)0x4bc34759, (q31_t)0x3ee8e53a,
+    (q31_t)0x4bcfa150, (q31_t)0x3ee694c1, (q31_t)0x4bdbfad1, (q31_t)0x3ee441da,
+    (q31_t)0x4be853de, (q31_t)0x3ee1ec87, (q31_t)0x4bf4ac75, (q31_t)0x3edf94c7,
+    (q31_t)0x4c010496, (q31_t)0x3edd3a9a, (q31_t)0x4c0d5c41, (q31_t)0x3edade01,
+    (q31_t)0x4c19b374, (q31_t)0x3ed87efc, (q31_t)0x4c260a31, (q31_t)0x3ed61d8a,
+    (q31_t)0x4c326075, (q31_t)0x3ed3b9ad, (q31_t)0x4c3eb641, (q31_t)0x3ed15363,
+    (q31_t)0x4c4b0b94, (q31_t)0x3eceeaad, (q31_t)0x4c57606e, (q31_t)0x3ecc7f8b,
+    (q31_t)0x4c63b4ce, (q31_t)0x3eca11fe, (q31_t)0x4c7008b3, (q31_t)0x3ec7a205,
+    (q31_t)0x4c7c5c1e, (q31_t)0x3ec52fa0, (q31_t)0x4c88af0e, (q31_t)0x3ec2bad0,
+    (q31_t)0x4c950182, (q31_t)0x3ec04394, (q31_t)0x4ca1537a, (q31_t)0x3ebdc9ed,
+    (q31_t)0x4cada4f5, (q31_t)0x3ebb4ddb, (q31_t)0x4cb9f5f3, (q31_t)0x3eb8cf5d,
+    (q31_t)0x4cc64673, (q31_t)0x3eb64e75, (q31_t)0x4cd29676, (q31_t)0x3eb3cb21,
+    (q31_t)0x4cdee5f9, (q31_t)0x3eb14563, (q31_t)0x4ceb34fe, (q31_t)0x3eaebd3a,
+    (q31_t)0x4cf78383, (q31_t)0x3eac32a6, (q31_t)0x4d03d189, (q31_t)0x3ea9a5a8,
+    (q31_t)0x4d101f0e, (q31_t)0x3ea7163f, (q31_t)0x4d1c6c11, (q31_t)0x3ea4846c,
+    (q31_t)0x4d28b894, (q31_t)0x3ea1f02f, (q31_t)0x4d350495, (q31_t)0x3e9f5988,
+    (q31_t)0x4d415013, (q31_t)0x3e9cc076, (q31_t)0x4d4d9b0e, (q31_t)0x3e9a24fb,
+    (q31_t)0x4d59e586, (q31_t)0x3e978715, (q31_t)0x4d662f7b, (q31_t)0x3e94e6c6,
+    (q31_t)0x4d7278eb, (q31_t)0x3e92440d, (q31_t)0x4d7ec1d6, (q31_t)0x3e8f9eeb,
+    (q31_t)0x4d8b0a3d, (q31_t)0x3e8cf75f, (q31_t)0x4d97521d, (q31_t)0x3e8a4d6a,
+    (q31_t)0x4da39978, (q31_t)0x3e87a10c, (q31_t)0x4dafe04b, (q31_t)0x3e84f245,
+    (q31_t)0x4dbc2698, (q31_t)0x3e824114, (q31_t)0x4dc86c5d, (q31_t)0x3e7f8d7b,
+    (q31_t)0x4dd4b19a, (q31_t)0x3e7cd778, (q31_t)0x4de0f64f, (q31_t)0x3e7a1f0d,
+    (q31_t)0x4ded3a7b, (q31_t)0x3e77643a, (q31_t)0x4df97e1d, (q31_t)0x3e74a6fd,
+    (q31_t)0x4e05c135, (q31_t)0x3e71e759, (q31_t)0x4e1203c3, (q31_t)0x3e6f254c,
+    (q31_t)0x4e1e45c6, (q31_t)0x3e6c60d7, (q31_t)0x4e2a873e, (q31_t)0x3e6999fa,
+    (q31_t)0x4e36c82a, (q31_t)0x3e66d0b4, (q31_t)0x4e430889, (q31_t)0x3e640507,
+    (q31_t)0x4e4f485c, (q31_t)0x3e6136f3, (q31_t)0x4e5b87a2, (q31_t)0x3e5e6676,
+    (q31_t)0x4e67c65a, (q31_t)0x3e5b9392, (q31_t)0x4e740483, (q31_t)0x3e58be47,
+    (q31_t)0x4e80421e, (q31_t)0x3e55e694, (q31_t)0x4e8c7f2a, (q31_t)0x3e530c7a,
+    (q31_t)0x4e98bba7, (q31_t)0x3e502ff9, (q31_t)0x4ea4f793, (q31_t)0x3e4d5110,
+    (q31_t)0x4eb132ef, (q31_t)0x3e4a6fc1, (q31_t)0x4ebd6db9, (q31_t)0x3e478c0b,
+    (q31_t)0x4ec9a7f3, (q31_t)0x3e44a5ef, (q31_t)0x4ed5e19a, (q31_t)0x3e41bd6c,
+    (q31_t)0x4ee21aaf, (q31_t)0x3e3ed282, (q31_t)0x4eee5331, (q31_t)0x3e3be532,
+    (q31_t)0x4efa8b20, (q31_t)0x3e38f57c, (q31_t)0x4f06c27a, (q31_t)0x3e360360,
+    (q31_t)0x4f12f941, (q31_t)0x3e330ede, (q31_t)0x4f1f2f73, (q31_t)0x3e3017f6,
+    (q31_t)0x4f2b650f, (q31_t)0x3e2d1ea8, (q31_t)0x4f379a16, (q31_t)0x3e2a22f4,
+    (q31_t)0x4f43ce86, (q31_t)0x3e2724db, (q31_t)0x4f500260, (q31_t)0x3e24245d,
+    (q31_t)0x4f5c35a3, (q31_t)0x3e212179, (q31_t)0x4f68684e, (q31_t)0x3e1e1c30,
+    (q31_t)0x4f749a61, (q31_t)0x3e1b1482, (q31_t)0x4f80cbdc, (q31_t)0x3e180a6f,
+    (q31_t)0x4f8cfcbe, (q31_t)0x3e14fdf7, (q31_t)0x4f992d06, (q31_t)0x3e11ef1b,
+    (q31_t)0x4fa55cb4, (q31_t)0x3e0eddd9, (q31_t)0x4fb18bc8, (q31_t)0x3e0bca34,
+    (q31_t)0x4fbdba40, (q31_t)0x3e08b42a, (q31_t)0x4fc9e81e, (q31_t)0x3e059bbb,
+    (q31_t)0x4fd6155f, (q31_t)0x3e0280e9, (q31_t)0x4fe24205, (q31_t)0x3dff63b2,
+    (q31_t)0x4fee6e0d, (q31_t)0x3dfc4418, (q31_t)0x4ffa9979, (q31_t)0x3df9221a,
+    (q31_t)0x5006c446, (q31_t)0x3df5fdb8, (q31_t)0x5012ee76, (q31_t)0x3df2d6f3,
+    (q31_t)0x501f1807, (q31_t)0x3defadca, (q31_t)0x502b40f8, (q31_t)0x3dec823e,
+    (q31_t)0x5037694b, (q31_t)0x3de9544f, (q31_t)0x504390fd, (q31_t)0x3de623fd,
+    (q31_t)0x504fb80e, (q31_t)0x3de2f148, (q31_t)0x505bde7f, (q31_t)0x3ddfbc30,
+    (q31_t)0x5068044e, (q31_t)0x3ddc84b5, (q31_t)0x5074297b, (q31_t)0x3dd94ad8,
+    (q31_t)0x50804e06, (q31_t)0x3dd60e99, (q31_t)0x508c71ee, (q31_t)0x3dd2cff7,
+    (q31_t)0x50989532, (q31_t)0x3dcf8ef3, (q31_t)0x50a4b7d3, (q31_t)0x3dcc4b8d,
+    (q31_t)0x50b0d9d0, (q31_t)0x3dc905c5, (q31_t)0x50bcfb28, (q31_t)0x3dc5bd9b,
+    (q31_t)0x50c91bda, (q31_t)0x3dc2730f, (q31_t)0x50d53be7, (q31_t)0x3dbf2622,
+    (q31_t)0x50e15b4e, (q31_t)0x3dbbd6d4, (q31_t)0x50ed7a0e, (q31_t)0x3db88524,
+    (q31_t)0x50f99827, (q31_t)0x3db53113, (q31_t)0x5105b599, (q31_t)0x3db1daa2,
+    (q31_t)0x5111d263, (q31_t)0x3dae81cf, (q31_t)0x511dee84, (q31_t)0x3dab269b,
+    (q31_t)0x512a09fc, (q31_t)0x3da7c907, (q31_t)0x513624cb, (q31_t)0x3da46912,
+    (q31_t)0x51423ef0, (q31_t)0x3da106bd, (q31_t)0x514e586a, (q31_t)0x3d9da208,
+    (q31_t)0x515a713a, (q31_t)0x3d9a3af2, (q31_t)0x5166895f, (q31_t)0x3d96d17d,
+    (q31_t)0x5172a0d7, (q31_t)0x3d9365a8, (q31_t)0x517eb7a4, (q31_t)0x3d8ff772,
+    (q31_t)0x518acdc4, (q31_t)0x3d8c86de, (q31_t)0x5196e337, (q31_t)0x3d8913ea,
+    (q31_t)0x51a2f7fc, (q31_t)0x3d859e96, (q31_t)0x51af0c13, (q31_t)0x3d8226e4,
+    (q31_t)0x51bb1f7c, (q31_t)0x3d7eacd2, (q31_t)0x51c73235, (q31_t)0x3d7b3061,
+    (q31_t)0x51d3443f, (q31_t)0x3d77b192, (q31_t)0x51df5599, (q31_t)0x3d743064,
+    (q31_t)0x51eb6643, (q31_t)0x3d70acd7, (q31_t)0x51f7763c, (q31_t)0x3d6d26ec,
+    (q31_t)0x52038584, (q31_t)0x3d699ea3, (q31_t)0x520f941a, (q31_t)0x3d6613fb,
+    (q31_t)0x521ba1fd, (q31_t)0x3d6286f6, (q31_t)0x5227af2e, (q31_t)0x3d5ef793,
+    (q31_t)0x5233bbac, (q31_t)0x3d5b65d2, (q31_t)0x523fc776, (q31_t)0x3d57d1b3,
+    (q31_t)0x524bd28c, (q31_t)0x3d543b37, (q31_t)0x5257dced, (q31_t)0x3d50a25e,
+    (q31_t)0x5263e699, (q31_t)0x3d4d0728, (q31_t)0x526fef90, (q31_t)0x3d496994,
+    (q31_t)0x527bf7d1, (q31_t)0x3d45c9a4, (q31_t)0x5287ff5b, (q31_t)0x3d422757,
+    (q31_t)0x5294062f, (q31_t)0x3d3e82ae, (q31_t)0x52a00c4b, (q31_t)0x3d3adba7,
+    (q31_t)0x52ac11af, (q31_t)0x3d373245, (q31_t)0x52b8165b, (q31_t)0x3d338687,
+    (q31_t)0x52c41a4f, (q31_t)0x3d2fd86c, (q31_t)0x52d01d89, (q31_t)0x3d2c27f6,
+    (q31_t)0x52dc2009, (q31_t)0x3d287523, (q31_t)0x52e821cf, (q31_t)0x3d24bff6,
+    (q31_t)0x52f422db, (q31_t)0x3d21086c, (q31_t)0x5300232c, (q31_t)0x3d1d4e88,
+    (q31_t)0x530c22c1, (q31_t)0x3d199248, (q31_t)0x5318219a, (q31_t)0x3d15d3ad,
+    (q31_t)0x53241fb6, (q31_t)0x3d1212b7, (q31_t)0x53301d16, (q31_t)0x3d0e4f67,
+    (q31_t)0x533c19b8, (q31_t)0x3d0a89bc, (q31_t)0x5348159d, (q31_t)0x3d06c1b6,
+    (q31_t)0x535410c3, (q31_t)0x3d02f757, (q31_t)0x53600b2a, (q31_t)0x3cff2a9d,
+    (q31_t)0x536c04d2, (q31_t)0x3cfb5b89, (q31_t)0x5377fdbb, (q31_t)0x3cf78a1b,
+    (q31_t)0x5383f5e3, (q31_t)0x3cf3b653, (q31_t)0x538fed4b, (q31_t)0x3cefe032,
+    (q31_t)0x539be3f2, (q31_t)0x3cec07b8, (q31_t)0x53a7d9d7, (q31_t)0x3ce82ce4,
+    (q31_t)0x53b3cefa, (q31_t)0x3ce44fb7, (q31_t)0x53bfc35b, (q31_t)0x3ce07031,
+    (q31_t)0x53cbb6f8, (q31_t)0x3cdc8e52, (q31_t)0x53d7a9d3, (q31_t)0x3cd8aa1b,
+    (q31_t)0x53e39be9, (q31_t)0x3cd4c38b, (q31_t)0x53ef8d3c, (q31_t)0x3cd0daa2,
+    (q31_t)0x53fb7dc9, (q31_t)0x3cccef62, (q31_t)0x54076d91, (q31_t)0x3cc901c9,
+    (q31_t)0x54135c94, (q31_t)0x3cc511d9, (q31_t)0x541f4ad1, (q31_t)0x3cc11f90,
+    (q31_t)0x542b3846, (q31_t)0x3cbd2af0, (q31_t)0x543724f5, (q31_t)0x3cb933f9,
+    (q31_t)0x544310dd, (q31_t)0x3cb53aaa, (q31_t)0x544efbfc, (q31_t)0x3cb13f04,
+    (q31_t)0x545ae653, (q31_t)0x3cad4107, (q31_t)0x5466cfe1, (q31_t)0x3ca940b3,
+    (q31_t)0x5472b8a5, (q31_t)0x3ca53e09, (q31_t)0x547ea0a0, (q31_t)0x3ca13908,
+    (q31_t)0x548a87d1, (q31_t)0x3c9d31b0, (q31_t)0x54966e36, (q31_t)0x3c992803,
+    (q31_t)0x54a253d1, (q31_t)0x3c951bff, (q31_t)0x54ae38a0, (q31_t)0x3c910da5,
+    (q31_t)0x54ba1ca3, (q31_t)0x3c8cfcf6, (q31_t)0x54c5ffd9, (q31_t)0x3c88e9f1,
+    (q31_t)0x54d1e242, (q31_t)0x3c84d496, (q31_t)0x54ddc3de, (q31_t)0x3c80bce7,
+    (q31_t)0x54e9a4ac, (q31_t)0x3c7ca2e2, (q31_t)0x54f584ac, (q31_t)0x3c788688,
+    (q31_t)0x550163dc, (q31_t)0x3c7467d9, (q31_t)0x550d423d, (q31_t)0x3c7046d6,
+    (q31_t)0x55191fcf, (q31_t)0x3c6c237e, (q31_t)0x5524fc90, (q31_t)0x3c67fdd1,
+    (q31_t)0x5530d881, (q31_t)0x3c63d5d1, (q31_t)0x553cb3a0, (q31_t)0x3c5fab7c,
+    (q31_t)0x55488dee, (q31_t)0x3c5b7ed4, (q31_t)0x5554676a, (q31_t)0x3c574fd8,
+    (q31_t)0x55604013, (q31_t)0x3c531e88, (q31_t)0x556c17e9, (q31_t)0x3c4eeae5,
+    (q31_t)0x5577eeec, (q31_t)0x3c4ab4ef, (q31_t)0x5583c51b, (q31_t)0x3c467ca6,
+    (q31_t)0x558f9a76, (q31_t)0x3c42420a, (q31_t)0x559b6efb, (q31_t)0x3c3e051b,
+    (q31_t)0x55a742ac, (q31_t)0x3c39c5da, (q31_t)0x55b31587, (q31_t)0x3c358446,
+    (q31_t)0x55bee78c, (q31_t)0x3c314060, (q31_t)0x55cab8ba, (q31_t)0x3c2cfa28,
+    (q31_t)0x55d68911, (q31_t)0x3c28b19e, (q31_t)0x55e25890, (q31_t)0x3c2466c2,
+    (q31_t)0x55ee2738, (q31_t)0x3c201994, (q31_t)0x55f9f507, (q31_t)0x3c1bca16,
+    (q31_t)0x5605c1fd, (q31_t)0x3c177845, (q31_t)0x56118e1a, (q31_t)0x3c132424,
+    (q31_t)0x561d595d, (q31_t)0x3c0ecdb2, (q31_t)0x562923c5, (q31_t)0x3c0a74f0,
+    (q31_t)0x5634ed53, (q31_t)0x3c0619dc, (q31_t)0x5640b606, (q31_t)0x3c01bc78,
+    (q31_t)0x564c7ddd, (q31_t)0x3bfd5cc4, (q31_t)0x565844d8, (q31_t)0x3bf8fac0,
+    (q31_t)0x56640af7, (q31_t)0x3bf4966c, (q31_t)0x566fd039, (q31_t)0x3bf02fc9,
+    (q31_t)0x567b949d, (q31_t)0x3bebc6d5, (q31_t)0x56875823, (q31_t)0x3be75b93,
+    (q31_t)0x56931acb, (q31_t)0x3be2ee01, (q31_t)0x569edc94, (q31_t)0x3bde7e20,
+    (q31_t)0x56aa9d7e, (q31_t)0x3bda0bf0, (q31_t)0x56b65d88, (q31_t)0x3bd59771,
+    (q31_t)0x56c21cb2, (q31_t)0x3bd120a4, (q31_t)0x56cddafb, (q31_t)0x3bcca789,
+    (q31_t)0x56d99864, (q31_t)0x3bc82c1f, (q31_t)0x56e554ea, (q31_t)0x3bc3ae67,
+    (q31_t)0x56f1108f, (q31_t)0x3bbf2e62, (q31_t)0x56fccb51, (q31_t)0x3bbaac0e,
+    (q31_t)0x57088531, (q31_t)0x3bb6276e, (q31_t)0x57143e2d, (q31_t)0x3bb1a080,
+    (q31_t)0x571ff646, (q31_t)0x3bad1744, (q31_t)0x572bad7a, (q31_t)0x3ba88bbc,
+    (q31_t)0x573763c9, (q31_t)0x3ba3fde7, (q31_t)0x57431933, (q31_t)0x3b9f6dc5,
+    (q31_t)0x574ecdb8, (q31_t)0x3b9adb57, (q31_t)0x575a8157, (q31_t)0x3b96469d,
+    (q31_t)0x5766340f, (q31_t)0x3b91af97, (q31_t)0x5771e5e0, (q31_t)0x3b8d1644,
+    (q31_t)0x577d96ca, (q31_t)0x3b887aa6, (q31_t)0x578946cc, (q31_t)0x3b83dcbc,
+    (q31_t)0x5794f5e6, (q31_t)0x3b7f3c87, (q31_t)0x57a0a417, (q31_t)0x3b7a9a07,
+    (q31_t)0x57ac515f, (q31_t)0x3b75f53c, (q31_t)0x57b7fdbd, (q31_t)0x3b714e25,
+    (q31_t)0x57c3a931, (q31_t)0x3b6ca4c4, (q31_t)0x57cf53bb, (q31_t)0x3b67f919,
+    (q31_t)0x57dafd59, (q31_t)0x3b634b23, (q31_t)0x57e6a60c, (q31_t)0x3b5e9ae4,
+    (q31_t)0x57f24dd3, (q31_t)0x3b59e85a, (q31_t)0x57fdf4ae, (q31_t)0x3b553386,
+    (q31_t)0x58099a9c, (q31_t)0x3b507c69, (q31_t)0x58153f9d, (q31_t)0x3b4bc303,
+    (q31_t)0x5820e3b0, (q31_t)0x3b470753, (q31_t)0x582c86d5, (q31_t)0x3b42495a,
+    (q31_t)0x5838290c, (q31_t)0x3b3d8918, (q31_t)0x5843ca53, (q31_t)0x3b38c68e,
+    (q31_t)0x584f6aab, (q31_t)0x3b3401bb, (q31_t)0x585b0a13, (q31_t)0x3b2f3aa0,
+    (q31_t)0x5866a88a, (q31_t)0x3b2a713d, (q31_t)0x58724611, (q31_t)0x3b25a591,
+    (q31_t)0x587de2a7, (q31_t)0x3b20d79e, (q31_t)0x58897e4a, (q31_t)0x3b1c0764,
+    (q31_t)0x589518fc, (q31_t)0x3b1734e2, (q31_t)0x58a0b2bb, (q31_t)0x3b126019,
+    (q31_t)0x58ac4b87, (q31_t)0x3b0d8909, (q31_t)0x58b7e35f, (q31_t)0x3b08afb2,
+    (q31_t)0x58c37a44, (q31_t)0x3b03d414, (q31_t)0x58cf1034, (q31_t)0x3afef630,
+    (q31_t)0x58daa52f, (q31_t)0x3afa1605, (q31_t)0x58e63935, (q31_t)0x3af53395,
+    (q31_t)0x58f1cc45, (q31_t)0x3af04edf, (q31_t)0x58fd5e5f, (q31_t)0x3aeb67e3,
+    (q31_t)0x5908ef82, (q31_t)0x3ae67ea1, (q31_t)0x59147fae, (q31_t)0x3ae1931a,
+    (q31_t)0x59200ee3, (q31_t)0x3adca54e, (q31_t)0x592b9d1f, (q31_t)0x3ad7b53d,
+    (q31_t)0x59372a64, (q31_t)0x3ad2c2e8, (q31_t)0x5942b6af, (q31_t)0x3acdce4d,
+    (q31_t)0x594e4201, (q31_t)0x3ac8d76f, (q31_t)0x5959cc5a, (q31_t)0x3ac3de4c,
+    (q31_t)0x596555b8, (q31_t)0x3abee2e5, (q31_t)0x5970de1b, (q31_t)0x3ab9e53a,
+    (q31_t)0x597c6584, (q31_t)0x3ab4e54c, (q31_t)0x5987ebf0, (q31_t)0x3aafe31b,
+    (q31_t)0x59937161, (q31_t)0x3aaadea6, (q31_t)0x599ef5d6, (q31_t)0x3aa5d7ee,
+    (q31_t)0x59aa794d, (q31_t)0x3aa0cef3, (q31_t)0x59b5fbc8, (q31_t)0x3a9bc3b6,
+    (q31_t)0x59c17d44, (q31_t)0x3a96b636, (q31_t)0x59ccfdc2, (q31_t)0x3a91a674,
+    (q31_t)0x59d87d42, (q31_t)0x3a8c9470, (q31_t)0x59e3fbc3, (q31_t)0x3a87802a,
+    (q31_t)0x59ef7944, (q31_t)0x3a8269a3, (q31_t)0x59faf5c5, (q31_t)0x3a7d50da,
+    (q31_t)0x5a067145, (q31_t)0x3a7835cf, (q31_t)0x5a11ebc5, (q31_t)0x3a731884,
+    (q31_t)0x5a1d6544, (q31_t)0x3a6df8f8, (q31_t)0x5a28ddc0, (q31_t)0x3a68d72b,
+    (q31_t)0x5a34553b, (q31_t)0x3a63b31d, (q31_t)0x5a3fcbb3, (q31_t)0x3a5e8cd0,
+    (q31_t)0x5a4b4128, (q31_t)0x3a596442, (q31_t)0x5a56b599, (q31_t)0x3a543974,
+    (q31_t)0x5a622907, (q31_t)0x3a4f0c67, (q31_t)0x5a6d9b70, (q31_t)0x3a49dd1a,
+    (q31_t)0x5a790cd4, (q31_t)0x3a44ab8e, (q31_t)0x5a847d33, (q31_t)0x3a3f77c3,
+    (q31_t)0x5a8fec8c, (q31_t)0x3a3a41b9, (q31_t)0x5a9b5adf, (q31_t)0x3a350970,
+    (q31_t)0x5aa6c82b, (q31_t)0x3a2fcee8, (q31_t)0x5ab23471, (q31_t)0x3a2a9223,
+    (q31_t)0x5abd9faf, (q31_t)0x3a25531f, (q31_t)0x5ac909e5, (q31_t)0x3a2011de,
+    (q31_t)0x5ad47312, (q31_t)0x3a1ace5f, (q31_t)0x5adfdb37, (q31_t)0x3a1588a2,
+    (q31_t)0x5aeb4253, (q31_t)0x3a1040a8, (q31_t)0x5af6a865, (q31_t)0x3a0af671,
+    (q31_t)0x5b020d6c, (q31_t)0x3a05a9fd, (q31_t)0x5b0d716a, (q31_t)0x3a005b4d,
+    (q31_t)0x5b18d45c, (q31_t)0x39fb0a60, (q31_t)0x5b243643, (q31_t)0x39f5b737,
+    (q31_t)0x5b2f971e, (q31_t)0x39f061d2, (q31_t)0x5b3af6ec, (q31_t)0x39eb0a31,
+    (q31_t)0x5b4655ae, (q31_t)0x39e5b054, (q31_t)0x5b51b363, (q31_t)0x39e0543c,
+    (q31_t)0x5b5d100a, (q31_t)0x39daf5e8, (q31_t)0x5b686ba3, (q31_t)0x39d5955a,
+    (q31_t)0x5b73c62d, (q31_t)0x39d03291, (q31_t)0x5b7f1fa9, (q31_t)0x39cacd8d,
+    (q31_t)0x5b8a7815, (q31_t)0x39c5664f, (q31_t)0x5b95cf71, (q31_t)0x39bffcd7,
+    (q31_t)0x5ba125bd, (q31_t)0x39ba9125, (q31_t)0x5bac7af9, (q31_t)0x39b52339,
+    (q31_t)0x5bb7cf23, (q31_t)0x39afb313, (q31_t)0x5bc3223c, (q31_t)0x39aa40b4,
+    (q31_t)0x5bce7442, (q31_t)0x39a4cc1c, (q31_t)0x5bd9c537, (q31_t)0x399f554b,
+    (q31_t)0x5be51518, (q31_t)0x3999dc42, (q31_t)0x5bf063e6, (q31_t)0x399460ff,
+    (q31_t)0x5bfbb1a0, (q31_t)0x398ee385, (q31_t)0x5c06fe46, (q31_t)0x398963d2,
+    (q31_t)0x5c1249d8, (q31_t)0x3983e1e8, (q31_t)0x5c1d9454, (q31_t)0x397e5dc6,
+    (q31_t)0x5c28ddbb, (q31_t)0x3978d76c, (q31_t)0x5c34260c, (q31_t)0x39734edc,
+    (q31_t)0x5c3f6d47, (q31_t)0x396dc414, (q31_t)0x5c4ab36b, (q31_t)0x39683715,
+    (q31_t)0x5c55f878, (q31_t)0x3962a7e0, (q31_t)0x5c613c6d, (q31_t)0x395d1675,
+    (q31_t)0x5c6c7f4a, (q31_t)0x395782d3, (q31_t)0x5c77c10e, (q31_t)0x3951ecfc,
+    (q31_t)0x5c8301b9, (q31_t)0x394c54ee, (q31_t)0x5c8e414b, (q31_t)0x3946baac,
+    (q31_t)0x5c997fc4, (q31_t)0x39411e33, (q31_t)0x5ca4bd21, (q31_t)0x393b7f86,
+    (q31_t)0x5caff965, (q31_t)0x3935dea4, (q31_t)0x5cbb348d, (q31_t)0x39303b8e,
+    (q31_t)0x5cc66e99, (q31_t)0x392a9642, (q31_t)0x5cd1a78a, (q31_t)0x3924eec3,
+    (q31_t)0x5cdcdf5e, (q31_t)0x391f4510, (q31_t)0x5ce81615, (q31_t)0x39199929,
+    (q31_t)0x5cf34baf, (q31_t)0x3913eb0e, (q31_t)0x5cfe802b, (q31_t)0x390e3ac0,
+    (q31_t)0x5d09b389, (q31_t)0x3908883f, (q31_t)0x5d14e5c9, (q31_t)0x3902d38b,
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+    (q31_t)0x5d632608, (q31_t)0x38daa520, (q31_t)0x5d6e4f43, (q31_t)0x38d4dedd,
+    (q31_t)0x5d79775c, (q31_t)0x38cf1669, (q31_t)0x5d849e51, (q31_t)0x38c94bc4,
+    (q31_t)0x5d8fc424, (q31_t)0x38c37eef, (q31_t)0x5d9ae8d2, (q31_t)0x38bdafea,
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+    (q31_t)0x5f081907, (q31_t)0x37f93a4b, (q31_t)0x5f1315f7, (q31_t)0x37f32165,
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+    (q31_t)0x5fa1808c, (q31_t)0x37a319c2, (q31_t)0x5fac6c91, (q31_t)0x379ce2be,
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+    (q31_t)0x5fcd2948, (q31_t)0x378a30d8, (q31_t)0x5fd81067, (q31_t)0x3783f143,
+    (q31_t)0x5fe2f64c, (q31_t)0x377daf89, (q31_t)0x5feddaf6, (q31_t)0x37776bac,
+    (q31_t)0x5ff8be65, (q31_t)0x377125ac, (q31_t)0x6003a099, (q31_t)0x376add88,
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+    (q31_t)0x60243fca, (q31_t)0x3757f84c, (q31_t)0x602f1d0b, (q31_t)0x3751a79e,
+    (q31_t)0x6039f90f, (q31_t)0x374b54ce, (q31_t)0x6044d3d4, (q31_t)0x3744ffdd,
+    (q31_t)0x604fad5b, (q31_t)0x373ea8ca, (q31_t)0x605a85a3, (q31_t)0x37384f95,
+    (q31_t)0x60655cac, (q31_t)0x3731f440, (q31_t)0x60703275, (q31_t)0x372b96ca,
+    (q31_t)0x607b06fe, (q31_t)0x37253733, (q31_t)0x6085da46, (q31_t)0x371ed57c,
+    (q31_t)0x6090ac4d, (q31_t)0x371871a5, (q31_t)0x609b7d13, (q31_t)0x37120bae,
+    (q31_t)0x60a64c97, (q31_t)0x370ba398, (q31_t)0x60b11ad9, (q31_t)0x37053962,
+    (q31_t)0x60bbe7d8, (q31_t)0x36fecd0e, (q31_t)0x60c6b395, (q31_t)0x36f85e9a,
+    (q31_t)0x60d17e0d, (q31_t)0x36f1ee09, (q31_t)0x60dc4742, (q31_t)0x36eb7b58,
+    (q31_t)0x60e70f32, (q31_t)0x36e5068a, (q31_t)0x60f1d5de, (q31_t)0x36de8f9e,
+    (q31_t)0x60fc9b44, (q31_t)0x36d81695, (q31_t)0x61075f65, (q31_t)0x36d19b6e,
+    (q31_t)0x61122240, (q31_t)0x36cb1e2a, (q31_t)0x611ce3d5, (q31_t)0x36c49ec9,
+    (q31_t)0x6127a423, (q31_t)0x36be1d4c, (q31_t)0x61326329, (q31_t)0x36b799b3,
+    (q31_t)0x613d20e8, (q31_t)0x36b113fd, (q31_t)0x6147dd5f, (q31_t)0x36aa8c2c,
+    (q31_t)0x6152988d, (q31_t)0x36a4023f, (q31_t)0x615d5273, (q31_t)0x369d7637,
+    (q31_t)0x61680b0f, (q31_t)0x3696e814, (q31_t)0x6172c262, (q31_t)0x369057d6,
+    (q31_t)0x617d786a, (q31_t)0x3689c57d, (q31_t)0x61882d28, (q31_t)0x3683310b,
+    (q31_t)0x6192e09b, (q31_t)0x367c9a7e, (q31_t)0x619d92c2, (q31_t)0x367601d7,
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+    (q31_t)0x61bda171, (q31_t)0x36622b4c, (q31_t)0x61c84e67, (q31_t)0x365b8a41,
+    (q31_t)0x61d2fa0f, (q31_t)0x3654e71d, (q31_t)0x61dda46a, (q31_t)0x364e41e2,
+    (q31_t)0x61e84d76, (q31_t)0x36479a8e, (q31_t)0x61f2f534, (q31_t)0x3640f123,
+    (q31_t)0x61fd9ba3, (q31_t)0x363a45a0, (q31_t)0x620840c2, (q31_t)0x36339806,
+    (q31_t)0x6212e492, (q31_t)0x362ce855, (q31_t)0x621d8711, (q31_t)0x3626368d,
+    (q31_t)0x6228283f, (q31_t)0x361f82af, (q31_t)0x6232c81c, (q31_t)0x3618ccba,
+    (q31_t)0x623d66a8, (q31_t)0x361214b0, (q31_t)0x624803e2, (q31_t)0x360b5a90,
+    (q31_t)0x62529fca, (q31_t)0x36049e5b, (q31_t)0x625d3a5e, (q31_t)0x35fde011,
+    (q31_t)0x6267d3a0, (q31_t)0x35f71fb1, (q31_t)0x62726b8e, (q31_t)0x35f05d3d,
+    (q31_t)0x627d0228, (q31_t)0x35e998b5, (q31_t)0x6287976e, (q31_t)0x35e2d219,
+    (q31_t)0x62922b5e, (q31_t)0x35dc0968, (q31_t)0x629cbdfa, (q31_t)0x35d53ea5,
+    (q31_t)0x62a74f40, (q31_t)0x35ce71ce, (q31_t)0x62b1df30, (q31_t)0x35c7a2e3,
+    (q31_t)0x62bc6dca, (q31_t)0x35c0d1e7, (q31_t)0x62c6fb0c, (q31_t)0x35b9fed7,
+    (q31_t)0x62d186f8, (q31_t)0x35b329b5, (q31_t)0x62dc118c, (q31_t)0x35ac5282,
+    (q31_t)0x62e69ac8, (q31_t)0x35a5793c, (q31_t)0x62f122ab, (q31_t)0x359e9de5,
+    (q31_t)0x62fba936, (q31_t)0x3597c07d, (q31_t)0x63062e67, (q31_t)0x3590e104,
+    (q31_t)0x6310b23e, (q31_t)0x3589ff7a, (q31_t)0x631b34bc, (q31_t)0x35831be0,
+    (q31_t)0x6325b5df, (q31_t)0x357c3636, (q31_t)0x633035a7, (q31_t)0x35754e7c,
+    (q31_t)0x633ab414, (q31_t)0x356e64b2, (q31_t)0x63453125, (q31_t)0x356778d9,
+    (q31_t)0x634facda, (q31_t)0x35608af1, (q31_t)0x635a2733, (q31_t)0x35599afa,
+    (q31_t)0x6364a02e, (q31_t)0x3552a8f4, (q31_t)0x636f17cc, (q31_t)0x354bb4e1,
+    (q31_t)0x63798e0d, (q31_t)0x3544bebf, (q31_t)0x638402ef, (q31_t)0x353dc68f,
+    (q31_t)0x638e7673, (q31_t)0x3536cc52, (q31_t)0x6398e898, (q31_t)0x352fd008,
+    (q31_t)0x63a3595e, (q31_t)0x3528d1b1, (q31_t)0x63adc8c4, (q31_t)0x3521d14d,
+    (q31_t)0x63b836ca, (q31_t)0x351acedd, (q31_t)0x63c2a36f, (q31_t)0x3513ca60,
+    (q31_t)0x63cd0eb3, (q31_t)0x350cc3d8, (q31_t)0x63d77896, (q31_t)0x3505bb44,
+    (q31_t)0x63e1e117, (q31_t)0x34feb0a5, (q31_t)0x63ec4837, (q31_t)0x34f7a3fb,
+    (q31_t)0x63f6adf3, (q31_t)0x34f09546, (q31_t)0x6401124d, (q31_t)0x34e98487,
+    (q31_t)0x640b7543, (q31_t)0x34e271bd, (q31_t)0x6415d6d5, (q31_t)0x34db5cea,
+    (q31_t)0x64203704, (q31_t)0x34d4460c, (q31_t)0x642a95ce, (q31_t)0x34cd2d26,
+    (q31_t)0x6434f332, (q31_t)0x34c61236, (q31_t)0x643f4f32, (q31_t)0x34bef53d,
+    (q31_t)0x6449a9cc, (q31_t)0x34b7d63c, (q31_t)0x645402ff, (q31_t)0x34b0b533,
+    (q31_t)0x645e5acc, (q31_t)0x34a99221, (q31_t)0x6468b132, (q31_t)0x34a26d08,
+    (q31_t)0x64730631, (q31_t)0x349b45e7, (q31_t)0x647d59c8, (q31_t)0x34941cbf,
+    (q31_t)0x6487abf7, (q31_t)0x348cf190, (q31_t)0x6491fcbe, (q31_t)0x3485c45b,
+    (q31_t)0x649c4c1b, (q31_t)0x347e951f, (q31_t)0x64a69a0f, (q31_t)0x347763dd,
+    (q31_t)0x64b0e699, (q31_t)0x34703095, (q31_t)0x64bb31ba, (q31_t)0x3468fb47,
+    (q31_t)0x64c57b6f, (q31_t)0x3461c3f5, (q31_t)0x64cfc3ba, (q31_t)0x345a8a9d,
+    (q31_t)0x64da0a9a, (q31_t)0x34534f41, (q31_t)0x64e4500e, (q31_t)0x344c11e0,
+    (q31_t)0x64ee9415, (q31_t)0x3444d27b, (q31_t)0x64f8d6b0, (q31_t)0x343d9112,
+    (q31_t)0x650317df, (q31_t)0x34364da6, (q31_t)0x650d57a0, (q31_t)0x342f0836,
+    (q31_t)0x651795f3, (q31_t)0x3427c0c3, (q31_t)0x6521d2d8, (q31_t)0x3420774d,
+    (q31_t)0x652c0e4f, (q31_t)0x34192bd5, (q31_t)0x65364857, (q31_t)0x3411de5b,
+    (q31_t)0x654080ef, (q31_t)0x340a8edf, (q31_t)0x654ab818, (q31_t)0x34033d61,
+    (q31_t)0x6554edd1, (q31_t)0x33fbe9e2, (q31_t)0x655f2219, (q31_t)0x33f49462,
+    (q31_t)0x656954f1, (q31_t)0x33ed3ce1, (q31_t)0x65738657, (q31_t)0x33e5e360,
+    (q31_t)0x657db64c, (q31_t)0x33de87de, (q31_t)0x6587e4cf, (q31_t)0x33d72a5d,
+    (q31_t)0x659211df, (q31_t)0x33cfcadc, (q31_t)0x659c3d7c, (q31_t)0x33c8695b,
+    (q31_t)0x65a667a7, (q31_t)0x33c105db, (q31_t)0x65b0905d, (q31_t)0x33b9a05d,
+    (q31_t)0x65bab7a0, (q31_t)0x33b238e0, (q31_t)0x65c4dd6e, (q31_t)0x33aacf65,
+    (q31_t)0x65cf01c8, (q31_t)0x33a363ec, (q31_t)0x65d924ac, (q31_t)0x339bf675,
+    (q31_t)0x65e3461b, (q31_t)0x33948701, (q31_t)0x65ed6614, (q31_t)0x338d1590,
+    (q31_t)0x65f78497, (q31_t)0x3385a222, (q31_t)0x6601a1a2, (q31_t)0x337e2cb7,
+    (q31_t)0x660bbd37, (q31_t)0x3376b551, (q31_t)0x6615d754, (q31_t)0x336f3bee,
+    (q31_t)0x661feffa, (q31_t)0x3367c090, (q31_t)0x662a0727, (q31_t)0x33604336,
+    (q31_t)0x66341cdb, (q31_t)0x3358c3e2, (q31_t)0x663e3117, (q31_t)0x33514292,
+    (q31_t)0x664843d9, (q31_t)0x3349bf48, (q31_t)0x66525521, (q31_t)0x33423a04,
+    (q31_t)0x665c64ef, (q31_t)0x333ab2c6, (q31_t)0x66667342, (q31_t)0x3333298f,
+    (q31_t)0x6670801a, (q31_t)0x332b9e5e, (q31_t)0x667a8b77, (q31_t)0x33241134,
+    (q31_t)0x66849558, (q31_t)0x331c8211, (q31_t)0x668e9dbd, (q31_t)0x3314f0f6,
+    (q31_t)0x6698a4a6, (q31_t)0x330d5de3, (q31_t)0x66a2aa11, (q31_t)0x3305c8d7,
+    (q31_t)0x66acadff, (q31_t)0x32fe31d5, (q31_t)0x66b6b070, (q31_t)0x32f698db,
+    (q31_t)0x66c0b162, (q31_t)0x32eefdea, (q31_t)0x66cab0d6, (q31_t)0x32e76102,
+    (q31_t)0x66d4aecb, (q31_t)0x32dfc224, (q31_t)0x66deab41, (q31_t)0x32d82150,
+    (q31_t)0x66e8a637, (q31_t)0x32d07e85, (q31_t)0x66f29fad, (q31_t)0x32c8d9c6,
+    (q31_t)0x66fc97a3, (q31_t)0x32c13311, (q31_t)0x67068e18, (q31_t)0x32b98a67,
+    (q31_t)0x6710830c, (q31_t)0x32b1dfc9, (q31_t)0x671a767e, (q31_t)0x32aa3336,
+    (q31_t)0x6724686e, (q31_t)0x32a284b0, (q31_t)0x672e58dc, (q31_t)0x329ad435,
+    (q31_t)0x673847c8, (q31_t)0x329321c7, (q31_t)0x67423530, (q31_t)0x328b6d66,
+    (q31_t)0x674c2115, (q31_t)0x3283b712, (q31_t)0x67560b76, (q31_t)0x327bfecc,
+    (q31_t)0x675ff452, (q31_t)0x32744493, (q31_t)0x6769dbaa, (q31_t)0x326c8868,
+    (q31_t)0x6773c17d, (q31_t)0x3264ca4c, (q31_t)0x677da5cb, (q31_t)0x325d0a3e,
+    (q31_t)0x67878893, (q31_t)0x32554840, (q31_t)0x679169d5, (q31_t)0x324d8450,
+    (q31_t)0x679b4990, (q31_t)0x3245be70, (q31_t)0x67a527c4, (q31_t)0x323df6a0,
+    (q31_t)0x67af0472, (q31_t)0x32362ce0, (q31_t)0x67b8df97, (q31_t)0x322e6130,
+    (q31_t)0x67c2b934, (q31_t)0x32269391, (q31_t)0x67cc9149, (q31_t)0x321ec403,
+    (q31_t)0x67d667d5, (q31_t)0x3216f287, (q31_t)0x67e03cd8, (q31_t)0x320f1f1c,
+    (q31_t)0x67ea1052, (q31_t)0x320749c3, (q31_t)0x67f3e241, (q31_t)0x31ff727c,
+    (q31_t)0x67fdb2a7, (q31_t)0x31f79948, (q31_t)0x68078181, (q31_t)0x31efbe27,
+    (q31_t)0x68114ed0, (q31_t)0x31e7e118, (q31_t)0x681b1a94, (q31_t)0x31e0021e,
+    (q31_t)0x6824e4cc, (q31_t)0x31d82137, (q31_t)0x682ead78, (q31_t)0x31d03e64,
+    (q31_t)0x68387498, (q31_t)0x31c859a5, (q31_t)0x68423a2a, (q31_t)0x31c072fb,
+    (q31_t)0x684bfe2f, (q31_t)0x31b88a66, (q31_t)0x6855c0a6, (q31_t)0x31b09fe7,
+    (q31_t)0x685f8190, (q31_t)0x31a8b37c, (q31_t)0x686940ea, (q31_t)0x31a0c528,
+    (q31_t)0x6872feb6, (q31_t)0x3198d4ea, (q31_t)0x687cbaf3, (q31_t)0x3190e2c3,
+    (q31_t)0x688675a0, (q31_t)0x3188eeb2, (q31_t)0x68902ebd, (q31_t)0x3180f8b8,
+    (q31_t)0x6899e64a, (q31_t)0x317900d6, (q31_t)0x68a39c46, (q31_t)0x3171070c,
+    (q31_t)0x68ad50b1, (q31_t)0x31690b59, (q31_t)0x68b7038b, (q31_t)0x31610dbf,
+    (q31_t)0x68c0b4d2, (q31_t)0x31590e3e, (q31_t)0x68ca6488, (q31_t)0x31510cd5,
+    (q31_t)0x68d412ab, (q31_t)0x31490986, (q31_t)0x68ddbf3b, (q31_t)0x31410450,
+    (q31_t)0x68e76a37, (q31_t)0x3138fd35, (q31_t)0x68f113a0, (q31_t)0x3130f433,
+    (q31_t)0x68fabb75, (q31_t)0x3128e94c, (q31_t)0x690461b5, (q31_t)0x3120dc80,
+    (q31_t)0x690e0661, (q31_t)0x3118cdcf, (q31_t)0x6917a977, (q31_t)0x3110bd39,
+    (q31_t)0x69214af8, (q31_t)0x3108aabf, (q31_t)0x692aeae3, (q31_t)0x31009661,
+    (q31_t)0x69348937, (q31_t)0x30f8801f, (q31_t)0x693e25f5, (q31_t)0x30f067fb,
+    (q31_t)0x6947c11c, (q31_t)0x30e84df3, (q31_t)0x69515aab, (q31_t)0x30e03208,
+    (q31_t)0x695af2a3, (q31_t)0x30d8143b, (q31_t)0x69648902, (q31_t)0x30cff48c,
+    (q31_t)0x696e1dc9, (q31_t)0x30c7d2fb, (q31_t)0x6977b0f7, (q31_t)0x30bfaf89,
+    (q31_t)0x6981428c, (q31_t)0x30b78a36, (q31_t)0x698ad287, (q31_t)0x30af6302,
+    (q31_t)0x699460e8, (q31_t)0x30a739ed, (q31_t)0x699dedaf, (q31_t)0x309f0ef8,
+    (q31_t)0x69a778db, (q31_t)0x3096e223, (q31_t)0x69b1026c, (q31_t)0x308eb36f,
+    (q31_t)0x69ba8a61, (q31_t)0x308682dc, (q31_t)0x69c410ba, (q31_t)0x307e5069,
+    (q31_t)0x69cd9578, (q31_t)0x30761c18, (q31_t)0x69d71899, (q31_t)0x306de5e9,
+    (q31_t)0x69e09a1c, (q31_t)0x3065addb, (q31_t)0x69ea1a03, (q31_t)0x305d73f0,
+    (q31_t)0x69f3984c, (q31_t)0x30553828, (q31_t)0x69fd14f6, (q31_t)0x304cfa83,
+    (q31_t)0x6a069003, (q31_t)0x3044bb00, (q31_t)0x6a100970, (q31_t)0x303c79a2,
+    (q31_t)0x6a19813f, (q31_t)0x30343667, (q31_t)0x6a22f76e, (q31_t)0x302bf151,
+    (q31_t)0x6a2c6bfd, (q31_t)0x3023aa5f, (q31_t)0x6a35deeb, (q31_t)0x301b6193,
+    (q31_t)0x6a3f503a, (q31_t)0x301316eb, (q31_t)0x6a48bfe7, (q31_t)0x300aca69,
+    (q31_t)0x6a522df3, (q31_t)0x30027c0c, (q31_t)0x6a5b9a5d, (q31_t)0x2ffa2bd6,
+    (q31_t)0x6a650525, (q31_t)0x2ff1d9c7, (q31_t)0x6a6e6e4b, (q31_t)0x2fe985de,
+    (q31_t)0x6a77d5ce, (q31_t)0x2fe1301c, (q31_t)0x6a813bae, (q31_t)0x2fd8d882,
+    (q31_t)0x6a8a9fea, (q31_t)0x2fd07f0f, (q31_t)0x6a940283, (q31_t)0x2fc823c5,
+    (q31_t)0x6a9d6377, (q31_t)0x2fbfc6a3, (q31_t)0x6aa6c2c6, (q31_t)0x2fb767aa,
+    (q31_t)0x6ab02071, (q31_t)0x2faf06da, (q31_t)0x6ab97c77, (q31_t)0x2fa6a433,
+    (q31_t)0x6ac2d6d6, (q31_t)0x2f9e3fb6, (q31_t)0x6acc2f90, (q31_t)0x2f95d963,
+    (q31_t)0x6ad586a3, (q31_t)0x2f8d713a, (q31_t)0x6adedc10, (q31_t)0x2f85073c,
+    (q31_t)0x6ae82fd5, (q31_t)0x2f7c9b69, (q31_t)0x6af181f3, (q31_t)0x2f742dc1,
+    (q31_t)0x6afad269, (q31_t)0x2f6bbe45, (q31_t)0x6b042137, (q31_t)0x2f634cf5,
+    (q31_t)0x6b0d6e5c, (q31_t)0x2f5ad9d1, (q31_t)0x6b16b9d9, (q31_t)0x2f5264da,
+    (q31_t)0x6b2003ac, (q31_t)0x2f49ee0f, (q31_t)0x6b294bd5, (q31_t)0x2f417573,
+    (q31_t)0x6b329255, (q31_t)0x2f38fb03, (q31_t)0x6b3bd72a, (q31_t)0x2f307ec2,
+    (q31_t)0x6b451a55, (q31_t)0x2f2800af, (q31_t)0x6b4e5bd4, (q31_t)0x2f1f80ca,
+    (q31_t)0x6b579ba8, (q31_t)0x2f16ff14, (q31_t)0x6b60d9d0, (q31_t)0x2f0e7b8e,
+    (q31_t)0x6b6a164d, (q31_t)0x2f05f637, (q31_t)0x6b73511c, (q31_t)0x2efd6f10,
+    (q31_t)0x6b7c8a3f, (q31_t)0x2ef4e619, (q31_t)0x6b85c1b5, (q31_t)0x2eec5b53,
+    (q31_t)0x6b8ef77d, (q31_t)0x2ee3cebe, (q31_t)0x6b982b97, (q31_t)0x2edb405a,
+    (q31_t)0x6ba15e03, (q31_t)0x2ed2b027, (q31_t)0x6baa8ec0, (q31_t)0x2eca1e27,
+    (q31_t)0x6bb3bdce, (q31_t)0x2ec18a58, (q31_t)0x6bbceb2d, (q31_t)0x2eb8f4bc,
+    (q31_t)0x6bc616dd, (q31_t)0x2eb05d53, (q31_t)0x6bcf40dc, (q31_t)0x2ea7c41e,
+    (q31_t)0x6bd8692b, (q31_t)0x2e9f291b, (q31_t)0x6be18fc9, (q31_t)0x2e968c4d,
+    (q31_t)0x6beab4b6, (q31_t)0x2e8dedb3, (q31_t)0x6bf3d7f2, (q31_t)0x2e854d4d,
+    (q31_t)0x6bfcf97c, (q31_t)0x2e7cab1c, (q31_t)0x6c061953, (q31_t)0x2e740720,
+    (q31_t)0x6c0f3779, (q31_t)0x2e6b615a, (q31_t)0x6c1853eb, (q31_t)0x2e62b9ca,
+    (q31_t)0x6c216eaa, (q31_t)0x2e5a1070, (q31_t)0x6c2a87b6, (q31_t)0x2e51654c,
+    (q31_t)0x6c339f0e, (q31_t)0x2e48b860, (q31_t)0x6c3cb4b1, (q31_t)0x2e4009aa,
+    (q31_t)0x6c45c8a0, (q31_t)0x2e37592c, (q31_t)0x6c4edada, (q31_t)0x2e2ea6e6,
+    (q31_t)0x6c57eb5e, (q31_t)0x2e25f2d8, (q31_t)0x6c60fa2d, (q31_t)0x2e1d3d03,
+    (q31_t)0x6c6a0746, (q31_t)0x2e148566, (q31_t)0x6c7312a9, (q31_t)0x2e0bcc03,
+    (q31_t)0x6c7c1c55, (q31_t)0x2e0310d9, (q31_t)0x6c85244a, (q31_t)0x2dfa53e9,
+    (q31_t)0x6c8e2a87, (q31_t)0x2df19534, (q31_t)0x6c972f0d, (q31_t)0x2de8d4b8,
+    (q31_t)0x6ca031da, (q31_t)0x2de01278, (q31_t)0x6ca932ef, (q31_t)0x2dd74e73,
+    (q31_t)0x6cb2324c, (q31_t)0x2dce88aa, (q31_t)0x6cbb2fef, (q31_t)0x2dc5c11c,
+    (q31_t)0x6cc42bd9, (q31_t)0x2dbcf7cb, (q31_t)0x6ccd2609, (q31_t)0x2db42cb6,
+    (q31_t)0x6cd61e7f, (q31_t)0x2dab5fdf, (q31_t)0x6cdf153a, (q31_t)0x2da29144,
+    (q31_t)0x6ce80a3a, (q31_t)0x2d99c0e7, (q31_t)0x6cf0fd80, (q31_t)0x2d90eec8,
+    (q31_t)0x6cf9ef09, (q31_t)0x2d881ae8, (q31_t)0x6d02ded7, (q31_t)0x2d7f4545,
+    (q31_t)0x6d0bcce8, (q31_t)0x2d766de2, (q31_t)0x6d14b93d, (q31_t)0x2d6d94bf,
+    (q31_t)0x6d1da3d5, (q31_t)0x2d64b9da, (q31_t)0x6d268cb0, (q31_t)0x2d5bdd36,
+    (q31_t)0x6d2f73cd, (q31_t)0x2d52fed2, (q31_t)0x6d38592c, (q31_t)0x2d4a1eaf,
+    (q31_t)0x6d413ccd, (q31_t)0x2d413ccd, (q31_t)0x6d4a1eaf, (q31_t)0x2d38592c,
+    (q31_t)0x6d52fed2, (q31_t)0x2d2f73cd, (q31_t)0x6d5bdd36, (q31_t)0x2d268cb0,
+    (q31_t)0x6d64b9da, (q31_t)0x2d1da3d5, (q31_t)0x6d6d94bf, (q31_t)0x2d14b93d,
+    (q31_t)0x6d766de2, (q31_t)0x2d0bcce8, (q31_t)0x6d7f4545, (q31_t)0x2d02ded7,
+    (q31_t)0x6d881ae8, (q31_t)0x2cf9ef09, (q31_t)0x6d90eec8, (q31_t)0x2cf0fd80,
+    (q31_t)0x6d99c0e7, (q31_t)0x2ce80a3a, (q31_t)0x6da29144, (q31_t)0x2cdf153a,
+    (q31_t)0x6dab5fdf, (q31_t)0x2cd61e7f, (q31_t)0x6db42cb6, (q31_t)0x2ccd2609,
+    (q31_t)0x6dbcf7cb, (q31_t)0x2cc42bd9, (q31_t)0x6dc5c11c, (q31_t)0x2cbb2fef,
+    (q31_t)0x6dce88aa, (q31_t)0x2cb2324c, (q31_t)0x6dd74e73, (q31_t)0x2ca932ef,
+    (q31_t)0x6de01278, (q31_t)0x2ca031da, (q31_t)0x6de8d4b8, (q31_t)0x2c972f0d,
+    (q31_t)0x6df19534, (q31_t)0x2c8e2a87, (q31_t)0x6dfa53e9, (q31_t)0x2c85244a,
+    (q31_t)0x6e0310d9, (q31_t)0x2c7c1c55, (q31_t)0x6e0bcc03, (q31_t)0x2c7312a9,
+    (q31_t)0x6e148566, (q31_t)0x2c6a0746, (q31_t)0x6e1d3d03, (q31_t)0x2c60fa2d,
+    (q31_t)0x6e25f2d8, (q31_t)0x2c57eb5e, (q31_t)0x6e2ea6e6, (q31_t)0x2c4edada,
+    (q31_t)0x6e37592c, (q31_t)0x2c45c8a0, (q31_t)0x6e4009aa, (q31_t)0x2c3cb4b1,
+    (q31_t)0x6e48b860, (q31_t)0x2c339f0e, (q31_t)0x6e51654c, (q31_t)0x2c2a87b6,
+    (q31_t)0x6e5a1070, (q31_t)0x2c216eaa, (q31_t)0x6e62b9ca, (q31_t)0x2c1853eb,
+    (q31_t)0x6e6b615a, (q31_t)0x2c0f3779, (q31_t)0x6e740720, (q31_t)0x2c061953,
+    (q31_t)0x6e7cab1c, (q31_t)0x2bfcf97c, (q31_t)0x6e854d4d, (q31_t)0x2bf3d7f2,
+    (q31_t)0x6e8dedb3, (q31_t)0x2beab4b6, (q31_t)0x6e968c4d, (q31_t)0x2be18fc9,
+    (q31_t)0x6e9f291b, (q31_t)0x2bd8692b, (q31_t)0x6ea7c41e, (q31_t)0x2bcf40dc,
+    (q31_t)0x6eb05d53, (q31_t)0x2bc616dd, (q31_t)0x6eb8f4bc, (q31_t)0x2bbceb2d,
+    (q31_t)0x6ec18a58, (q31_t)0x2bb3bdce, (q31_t)0x6eca1e27, (q31_t)0x2baa8ec0,
+    (q31_t)0x6ed2b027, (q31_t)0x2ba15e03, (q31_t)0x6edb405a, (q31_t)0x2b982b97,
+    (q31_t)0x6ee3cebe, (q31_t)0x2b8ef77d, (q31_t)0x6eec5b53, (q31_t)0x2b85c1b5,
+    (q31_t)0x6ef4e619, (q31_t)0x2b7c8a3f, (q31_t)0x6efd6f10, (q31_t)0x2b73511c,
+    (q31_t)0x6f05f637, (q31_t)0x2b6a164d, (q31_t)0x6f0e7b8e, (q31_t)0x2b60d9d0,
+    (q31_t)0x6f16ff14, (q31_t)0x2b579ba8, (q31_t)0x6f1f80ca, (q31_t)0x2b4e5bd4,
+    (q31_t)0x6f2800af, (q31_t)0x2b451a55, (q31_t)0x6f307ec2, (q31_t)0x2b3bd72a,
+    (q31_t)0x6f38fb03, (q31_t)0x2b329255, (q31_t)0x6f417573, (q31_t)0x2b294bd5,
+    (q31_t)0x6f49ee0f, (q31_t)0x2b2003ac, (q31_t)0x6f5264da, (q31_t)0x2b16b9d9,
+    (q31_t)0x6f5ad9d1, (q31_t)0x2b0d6e5c, (q31_t)0x6f634cf5, (q31_t)0x2b042137,
+    (q31_t)0x6f6bbe45, (q31_t)0x2afad269, (q31_t)0x6f742dc1, (q31_t)0x2af181f3,
+    (q31_t)0x6f7c9b69, (q31_t)0x2ae82fd5, (q31_t)0x6f85073c, (q31_t)0x2adedc10,
+    (q31_t)0x6f8d713a, (q31_t)0x2ad586a3, (q31_t)0x6f95d963, (q31_t)0x2acc2f90,
+    (q31_t)0x6f9e3fb6, (q31_t)0x2ac2d6d6, (q31_t)0x6fa6a433, (q31_t)0x2ab97c77,
+    (q31_t)0x6faf06da, (q31_t)0x2ab02071, (q31_t)0x6fb767aa, (q31_t)0x2aa6c2c6,
+    (q31_t)0x6fbfc6a3, (q31_t)0x2a9d6377, (q31_t)0x6fc823c5, (q31_t)0x2a940283,
+    (q31_t)0x6fd07f0f, (q31_t)0x2a8a9fea, (q31_t)0x6fd8d882, (q31_t)0x2a813bae,
+    (q31_t)0x6fe1301c, (q31_t)0x2a77d5ce, (q31_t)0x6fe985de, (q31_t)0x2a6e6e4b,
+    (q31_t)0x6ff1d9c7, (q31_t)0x2a650525, (q31_t)0x6ffa2bd6, (q31_t)0x2a5b9a5d,
+    (q31_t)0x70027c0c, (q31_t)0x2a522df3, (q31_t)0x700aca69, (q31_t)0x2a48bfe7,
+    (q31_t)0x701316eb, (q31_t)0x2a3f503a, (q31_t)0x701b6193, (q31_t)0x2a35deeb,
+    (q31_t)0x7023aa5f, (q31_t)0x2a2c6bfd, (q31_t)0x702bf151, (q31_t)0x2a22f76e,
+    (q31_t)0x70343667, (q31_t)0x2a19813f, (q31_t)0x703c79a2, (q31_t)0x2a100970,
+    (q31_t)0x7044bb00, (q31_t)0x2a069003, (q31_t)0x704cfa83, (q31_t)0x29fd14f6,
+    (q31_t)0x70553828, (q31_t)0x29f3984c, (q31_t)0x705d73f0, (q31_t)0x29ea1a03,
+    (q31_t)0x7065addb, (q31_t)0x29e09a1c, (q31_t)0x706de5e9, (q31_t)0x29d71899,
+    (q31_t)0x70761c18, (q31_t)0x29cd9578, (q31_t)0x707e5069, (q31_t)0x29c410ba,
+    (q31_t)0x708682dc, (q31_t)0x29ba8a61, (q31_t)0x708eb36f, (q31_t)0x29b1026c,
+    (q31_t)0x7096e223, (q31_t)0x29a778db, (q31_t)0x709f0ef8, (q31_t)0x299dedaf,
+    (q31_t)0x70a739ed, (q31_t)0x299460e8, (q31_t)0x70af6302, (q31_t)0x298ad287,
+    (q31_t)0x70b78a36, (q31_t)0x2981428c, (q31_t)0x70bfaf89, (q31_t)0x2977b0f7,
+    (q31_t)0x70c7d2fb, (q31_t)0x296e1dc9, (q31_t)0x70cff48c, (q31_t)0x29648902,
+    (q31_t)0x70d8143b, (q31_t)0x295af2a3, (q31_t)0x70e03208, (q31_t)0x29515aab,
+    (q31_t)0x70e84df3, (q31_t)0x2947c11c, (q31_t)0x70f067fb, (q31_t)0x293e25f5,
+    (q31_t)0x70f8801f, (q31_t)0x29348937, (q31_t)0x71009661, (q31_t)0x292aeae3,
+    (q31_t)0x7108aabf, (q31_t)0x29214af8, (q31_t)0x7110bd39, (q31_t)0x2917a977,
+    (q31_t)0x7118cdcf, (q31_t)0x290e0661, (q31_t)0x7120dc80, (q31_t)0x290461b5,
+    (q31_t)0x7128e94c, (q31_t)0x28fabb75, (q31_t)0x7130f433, (q31_t)0x28f113a0,
+    (q31_t)0x7138fd35, (q31_t)0x28e76a37, (q31_t)0x71410450, (q31_t)0x28ddbf3b,
+    (q31_t)0x71490986, (q31_t)0x28d412ab, (q31_t)0x71510cd5, (q31_t)0x28ca6488,
+    (q31_t)0x71590e3e, (q31_t)0x28c0b4d2, (q31_t)0x71610dbf, (q31_t)0x28b7038b,
+    (q31_t)0x71690b59, (q31_t)0x28ad50b1, (q31_t)0x7171070c, (q31_t)0x28a39c46,
+    (q31_t)0x717900d6, (q31_t)0x2899e64a, (q31_t)0x7180f8b8, (q31_t)0x28902ebd,
+    (q31_t)0x7188eeb2, (q31_t)0x288675a0, (q31_t)0x7190e2c3, (q31_t)0x287cbaf3,
+    (q31_t)0x7198d4ea, (q31_t)0x2872feb6, (q31_t)0x71a0c528, (q31_t)0x286940ea,
+    (q31_t)0x71a8b37c, (q31_t)0x285f8190, (q31_t)0x71b09fe7, (q31_t)0x2855c0a6,
+    (q31_t)0x71b88a66, (q31_t)0x284bfe2f, (q31_t)0x71c072fb, (q31_t)0x28423a2a,
+    (q31_t)0x71c859a5, (q31_t)0x28387498, (q31_t)0x71d03e64, (q31_t)0x282ead78,
+    (q31_t)0x71d82137, (q31_t)0x2824e4cc, (q31_t)0x71e0021e, (q31_t)0x281b1a94,
+    (q31_t)0x71e7e118, (q31_t)0x28114ed0, (q31_t)0x71efbe27, (q31_t)0x28078181,
+    (q31_t)0x71f79948, (q31_t)0x27fdb2a7, (q31_t)0x71ff727c, (q31_t)0x27f3e241,
+    (q31_t)0x720749c3, (q31_t)0x27ea1052, (q31_t)0x720f1f1c, (q31_t)0x27e03cd8,
+    (q31_t)0x7216f287, (q31_t)0x27d667d5, (q31_t)0x721ec403, (q31_t)0x27cc9149,
+    (q31_t)0x72269391, (q31_t)0x27c2b934, (q31_t)0x722e6130, (q31_t)0x27b8df97,
+    (q31_t)0x72362ce0, (q31_t)0x27af0472, (q31_t)0x723df6a0, (q31_t)0x27a527c4,
+    (q31_t)0x7245be70, (q31_t)0x279b4990, (q31_t)0x724d8450, (q31_t)0x279169d5,
+    (q31_t)0x72554840, (q31_t)0x27878893, (q31_t)0x725d0a3e, (q31_t)0x277da5cb,
+    (q31_t)0x7264ca4c, (q31_t)0x2773c17d, (q31_t)0x726c8868, (q31_t)0x2769dbaa,
+    (q31_t)0x72744493, (q31_t)0x275ff452, (q31_t)0x727bfecc, (q31_t)0x27560b76,
+    (q31_t)0x7283b712, (q31_t)0x274c2115, (q31_t)0x728b6d66, (q31_t)0x27423530,
+    (q31_t)0x729321c7, (q31_t)0x273847c8, (q31_t)0x729ad435, (q31_t)0x272e58dc,
+    (q31_t)0x72a284b0, (q31_t)0x2724686e, (q31_t)0x72aa3336, (q31_t)0x271a767e,
+    (q31_t)0x72b1dfc9, (q31_t)0x2710830c, (q31_t)0x72b98a67, (q31_t)0x27068e18,
+    (q31_t)0x72c13311, (q31_t)0x26fc97a3, (q31_t)0x72c8d9c6, (q31_t)0x26f29fad,
+    (q31_t)0x72d07e85, (q31_t)0x26e8a637, (q31_t)0x72d82150, (q31_t)0x26deab41,
+    (q31_t)0x72dfc224, (q31_t)0x26d4aecb, (q31_t)0x72e76102, (q31_t)0x26cab0d6,
+    (q31_t)0x72eefdea, (q31_t)0x26c0b162, (q31_t)0x72f698db, (q31_t)0x26b6b070,
+    (q31_t)0x72fe31d5, (q31_t)0x26acadff, (q31_t)0x7305c8d7, (q31_t)0x26a2aa11,
+    (q31_t)0x730d5de3, (q31_t)0x2698a4a6, (q31_t)0x7314f0f6, (q31_t)0x268e9dbd,
+    (q31_t)0x731c8211, (q31_t)0x26849558, (q31_t)0x73241134, (q31_t)0x267a8b77,
+    (q31_t)0x732b9e5e, (q31_t)0x2670801a, (q31_t)0x7333298f, (q31_t)0x26667342,
+    (q31_t)0x733ab2c6, (q31_t)0x265c64ef, (q31_t)0x73423a04, (q31_t)0x26525521,
+    (q31_t)0x7349bf48, (q31_t)0x264843d9, (q31_t)0x73514292, (q31_t)0x263e3117,
+    (q31_t)0x7358c3e2, (q31_t)0x26341cdb, (q31_t)0x73604336, (q31_t)0x262a0727,
+    (q31_t)0x7367c090, (q31_t)0x261feffa, (q31_t)0x736f3bee, (q31_t)0x2615d754,
+    (q31_t)0x7376b551, (q31_t)0x260bbd37, (q31_t)0x737e2cb7, (q31_t)0x2601a1a2,
+    (q31_t)0x7385a222, (q31_t)0x25f78497, (q31_t)0x738d1590, (q31_t)0x25ed6614,
+    (q31_t)0x73948701, (q31_t)0x25e3461b, (q31_t)0x739bf675, (q31_t)0x25d924ac,
+    (q31_t)0x73a363ec, (q31_t)0x25cf01c8, (q31_t)0x73aacf65, (q31_t)0x25c4dd6e,
+    (q31_t)0x73b238e0, (q31_t)0x25bab7a0, (q31_t)0x73b9a05d, (q31_t)0x25b0905d,
+    (q31_t)0x73c105db, (q31_t)0x25a667a7, (q31_t)0x73c8695b, (q31_t)0x259c3d7c,
+    (q31_t)0x73cfcadc, (q31_t)0x259211df, (q31_t)0x73d72a5d, (q31_t)0x2587e4cf,
+    (q31_t)0x73de87de, (q31_t)0x257db64c, (q31_t)0x73e5e360, (q31_t)0x25738657,
+    (q31_t)0x73ed3ce1, (q31_t)0x256954f1, (q31_t)0x73f49462, (q31_t)0x255f2219,
+    (q31_t)0x73fbe9e2, (q31_t)0x2554edd1, (q31_t)0x74033d61, (q31_t)0x254ab818,
+    (q31_t)0x740a8edf, (q31_t)0x254080ef, (q31_t)0x7411de5b, (q31_t)0x25364857,
+    (q31_t)0x74192bd5, (q31_t)0x252c0e4f, (q31_t)0x7420774d, (q31_t)0x2521d2d8,
+    (q31_t)0x7427c0c3, (q31_t)0x251795f3, (q31_t)0x742f0836, (q31_t)0x250d57a0,
+    (q31_t)0x74364da6, (q31_t)0x250317df, (q31_t)0x743d9112, (q31_t)0x24f8d6b0,
+    (q31_t)0x7444d27b, (q31_t)0x24ee9415, (q31_t)0x744c11e0, (q31_t)0x24e4500e,
+    (q31_t)0x74534f41, (q31_t)0x24da0a9a, (q31_t)0x745a8a9d, (q31_t)0x24cfc3ba,
+    (q31_t)0x7461c3f5, (q31_t)0x24c57b6f, (q31_t)0x7468fb47, (q31_t)0x24bb31ba,
+    (q31_t)0x74703095, (q31_t)0x24b0e699, (q31_t)0x747763dd, (q31_t)0x24a69a0f,
+    (q31_t)0x747e951f, (q31_t)0x249c4c1b, (q31_t)0x7485c45b, (q31_t)0x2491fcbe,
+    (q31_t)0x748cf190, (q31_t)0x2487abf7, (q31_t)0x74941cbf, (q31_t)0x247d59c8,
+    (q31_t)0x749b45e7, (q31_t)0x24730631, (q31_t)0x74a26d08, (q31_t)0x2468b132,
+    (q31_t)0x74a99221, (q31_t)0x245e5acc, (q31_t)0x74b0b533, (q31_t)0x245402ff,
+    (q31_t)0x74b7d63c, (q31_t)0x2449a9cc, (q31_t)0x74bef53d, (q31_t)0x243f4f32,
+    (q31_t)0x74c61236, (q31_t)0x2434f332, (q31_t)0x74cd2d26, (q31_t)0x242a95ce,
+    (q31_t)0x74d4460c, (q31_t)0x24203704, (q31_t)0x74db5cea, (q31_t)0x2415d6d5,
+    (q31_t)0x74e271bd, (q31_t)0x240b7543, (q31_t)0x74e98487, (q31_t)0x2401124d,
+    (q31_t)0x74f09546, (q31_t)0x23f6adf3, (q31_t)0x74f7a3fb, (q31_t)0x23ec4837,
+    (q31_t)0x74feb0a5, (q31_t)0x23e1e117, (q31_t)0x7505bb44, (q31_t)0x23d77896,
+    (q31_t)0x750cc3d8, (q31_t)0x23cd0eb3, (q31_t)0x7513ca60, (q31_t)0x23c2a36f,
+    (q31_t)0x751acedd, (q31_t)0x23b836ca, (q31_t)0x7521d14d, (q31_t)0x23adc8c4,
+    (q31_t)0x7528d1b1, (q31_t)0x23a3595e, (q31_t)0x752fd008, (q31_t)0x2398e898,
+    (q31_t)0x7536cc52, (q31_t)0x238e7673, (q31_t)0x753dc68f, (q31_t)0x238402ef,
+    (q31_t)0x7544bebf, (q31_t)0x23798e0d, (q31_t)0x754bb4e1, (q31_t)0x236f17cc,
+    (q31_t)0x7552a8f4, (q31_t)0x2364a02e, (q31_t)0x75599afa, (q31_t)0x235a2733,
+    (q31_t)0x75608af1, (q31_t)0x234facda, (q31_t)0x756778d9, (q31_t)0x23453125,
+    (q31_t)0x756e64b2, (q31_t)0x233ab414, (q31_t)0x75754e7c, (q31_t)0x233035a7,
+    (q31_t)0x757c3636, (q31_t)0x2325b5df, (q31_t)0x75831be0, (q31_t)0x231b34bc,
+    (q31_t)0x7589ff7a, (q31_t)0x2310b23e, (q31_t)0x7590e104, (q31_t)0x23062e67,
+    (q31_t)0x7597c07d, (q31_t)0x22fba936, (q31_t)0x759e9de5, (q31_t)0x22f122ab,
+    (q31_t)0x75a5793c, (q31_t)0x22e69ac8, (q31_t)0x75ac5282, (q31_t)0x22dc118c,
+    (q31_t)0x75b329b5, (q31_t)0x22d186f8, (q31_t)0x75b9fed7, (q31_t)0x22c6fb0c,
+    (q31_t)0x75c0d1e7, (q31_t)0x22bc6dca, (q31_t)0x75c7a2e3, (q31_t)0x22b1df30,
+    (q31_t)0x75ce71ce, (q31_t)0x22a74f40, (q31_t)0x75d53ea5, (q31_t)0x229cbdfa,
+    (q31_t)0x75dc0968, (q31_t)0x22922b5e, (q31_t)0x75e2d219, (q31_t)0x2287976e,
+    (q31_t)0x75e998b5, (q31_t)0x227d0228, (q31_t)0x75f05d3d, (q31_t)0x22726b8e,
+    (q31_t)0x75f71fb1, (q31_t)0x2267d3a0, (q31_t)0x75fde011, (q31_t)0x225d3a5e,
+    (q31_t)0x76049e5b, (q31_t)0x22529fca, (q31_t)0x760b5a90, (q31_t)0x224803e2,
+    (q31_t)0x761214b0, (q31_t)0x223d66a8, (q31_t)0x7618ccba, (q31_t)0x2232c81c,
+    (q31_t)0x761f82af, (q31_t)0x2228283f, (q31_t)0x7626368d, (q31_t)0x221d8711,
+    (q31_t)0x762ce855, (q31_t)0x2212e492, (q31_t)0x76339806, (q31_t)0x220840c2,
+    (q31_t)0x763a45a0, (q31_t)0x21fd9ba3, (q31_t)0x7640f123, (q31_t)0x21f2f534,
+    (q31_t)0x76479a8e, (q31_t)0x21e84d76, (q31_t)0x764e41e2, (q31_t)0x21dda46a,
+    (q31_t)0x7654e71d, (q31_t)0x21d2fa0f, (q31_t)0x765b8a41, (q31_t)0x21c84e67,
+    (q31_t)0x76622b4c, (q31_t)0x21bda171, (q31_t)0x7668ca3e, (q31_t)0x21b2f32e,
+    (q31_t)0x766f6717, (q31_t)0x21a8439e, (q31_t)0x767601d7, (q31_t)0x219d92c2,
+    (q31_t)0x767c9a7e, (q31_t)0x2192e09b, (q31_t)0x7683310b, (q31_t)0x21882d28,
+    (q31_t)0x7689c57d, (q31_t)0x217d786a, (q31_t)0x769057d6, (q31_t)0x2172c262,
+    (q31_t)0x7696e814, (q31_t)0x21680b0f, (q31_t)0x769d7637, (q31_t)0x215d5273,
+    (q31_t)0x76a4023f, (q31_t)0x2152988d, (q31_t)0x76aa8c2c, (q31_t)0x2147dd5f,
+    (q31_t)0x76b113fd, (q31_t)0x213d20e8, (q31_t)0x76b799b3, (q31_t)0x21326329,
+    (q31_t)0x76be1d4c, (q31_t)0x2127a423, (q31_t)0x76c49ec9, (q31_t)0x211ce3d5,
+    (q31_t)0x76cb1e2a, (q31_t)0x21122240, (q31_t)0x76d19b6e, (q31_t)0x21075f65,
+    (q31_t)0x76d81695, (q31_t)0x20fc9b44, (q31_t)0x76de8f9e, (q31_t)0x20f1d5de,
+    (q31_t)0x76e5068a, (q31_t)0x20e70f32, (q31_t)0x76eb7b58, (q31_t)0x20dc4742,
+    (q31_t)0x76f1ee09, (q31_t)0x20d17e0d, (q31_t)0x76f85e9a, (q31_t)0x20c6b395,
+    (q31_t)0x76fecd0e, (q31_t)0x20bbe7d8, (q31_t)0x77053962, (q31_t)0x20b11ad9,
+    (q31_t)0x770ba398, (q31_t)0x20a64c97, (q31_t)0x77120bae, (q31_t)0x209b7d13,
+    (q31_t)0x771871a5, (q31_t)0x2090ac4d, (q31_t)0x771ed57c, (q31_t)0x2085da46,
+    (q31_t)0x77253733, (q31_t)0x207b06fe, (q31_t)0x772b96ca, (q31_t)0x20703275,
+    (q31_t)0x7731f440, (q31_t)0x20655cac, (q31_t)0x77384f95, (q31_t)0x205a85a3,
+    (q31_t)0x773ea8ca, (q31_t)0x204fad5b, (q31_t)0x7744ffdd, (q31_t)0x2044d3d4,
+    (q31_t)0x774b54ce, (q31_t)0x2039f90f, (q31_t)0x7751a79e, (q31_t)0x202f1d0b,
+    (q31_t)0x7757f84c, (q31_t)0x20243fca, (q31_t)0x775e46d8, (q31_t)0x2019614c,
+    (q31_t)0x77649341, (q31_t)0x200e8190, (q31_t)0x776add88, (q31_t)0x2003a099,
+    (q31_t)0x777125ac, (q31_t)0x1ff8be65, (q31_t)0x77776bac, (q31_t)0x1feddaf6,
+    (q31_t)0x777daf89, (q31_t)0x1fe2f64c, (q31_t)0x7783f143, (q31_t)0x1fd81067,
+    (q31_t)0x778a30d8, (q31_t)0x1fcd2948, (q31_t)0x77906e49, (q31_t)0x1fc240ef,
+    (q31_t)0x7796a996, (q31_t)0x1fb7575c, (q31_t)0x779ce2be, (q31_t)0x1fac6c91,
+    (q31_t)0x77a319c2, (q31_t)0x1fa1808c, (q31_t)0x77a94ea0, (q31_t)0x1f969350,
+    (q31_t)0x77af8159, (q31_t)0x1f8ba4dc, (q31_t)0x77b5b1ec, (q31_t)0x1f80b531,
+    (q31_t)0x77bbe05a, (q31_t)0x1f75c44e, (q31_t)0x77c20ca1, (q31_t)0x1f6ad235,
+    (q31_t)0x77c836c2, (q31_t)0x1f5fdee6, (q31_t)0x77ce5ebd, (q31_t)0x1f54ea62,
+    (q31_t)0x77d48490, (q31_t)0x1f49f4a8, (q31_t)0x77daa83d, (q31_t)0x1f3efdb9,
+    (q31_t)0x77e0c9c3, (q31_t)0x1f340596, (q31_t)0x77e6e921, (q31_t)0x1f290c3f,
+    (q31_t)0x77ed0657, (q31_t)0x1f1e11b5, (q31_t)0x77f32165, (q31_t)0x1f1315f7,
+    (q31_t)0x77f93a4b, (q31_t)0x1f081907, (q31_t)0x77ff5109, (q31_t)0x1efd1ae4,
+    (q31_t)0x7805659e, (q31_t)0x1ef21b90, (q31_t)0x780b780a, (q31_t)0x1ee71b0a,
+    (q31_t)0x7811884d, (q31_t)0x1edc1953, (q31_t)0x78179666, (q31_t)0x1ed1166b,
+    (q31_t)0x781da256, (q31_t)0x1ec61254, (q31_t)0x7823ac1d, (q31_t)0x1ebb0d0d,
+    (q31_t)0x7829b3b9, (q31_t)0x1eb00696, (q31_t)0x782fb92a, (q31_t)0x1ea4fef0,
+    (q31_t)0x7835bc71, (q31_t)0x1e99f61d, (q31_t)0x783bbd8e, (q31_t)0x1e8eec1b,
+    (q31_t)0x7841bc7f, (q31_t)0x1e83e0eb, (q31_t)0x7847b946, (q31_t)0x1e78d48e,
+    (q31_t)0x784db3e0, (q31_t)0x1e6dc705, (q31_t)0x7853ac4f, (q31_t)0x1e62b84f,
+    (q31_t)0x7859a292, (q31_t)0x1e57a86d, (q31_t)0x785f96a9, (q31_t)0x1e4c9760,
+    (q31_t)0x78658894, (q31_t)0x1e418528, (q31_t)0x786b7852, (q31_t)0x1e3671c5,
+    (q31_t)0x787165e3, (q31_t)0x1e2b5d38, (q31_t)0x78775147, (q31_t)0x1e204781,
+    (q31_t)0x787d3a7e, (q31_t)0x1e1530a1, (q31_t)0x78832187, (q31_t)0x1e0a1898,
+    (q31_t)0x78890663, (q31_t)0x1dfeff67, (q31_t)0x788ee910, (q31_t)0x1df3e50d,
+    (q31_t)0x7894c98f, (q31_t)0x1de8c98c, (q31_t)0x789aa7e0, (q31_t)0x1dddace4,
+    (q31_t)0x78a08402, (q31_t)0x1dd28f15, (q31_t)0x78a65df6, (q31_t)0x1dc7701f,
+    (q31_t)0x78ac35ba, (q31_t)0x1dbc5004, (q31_t)0x78b20b4f, (q31_t)0x1db12ec3,
+    (q31_t)0x78b7deb4, (q31_t)0x1da60c5d, (q31_t)0x78bdafea, (q31_t)0x1d9ae8d2,
+    (q31_t)0x78c37eef, (q31_t)0x1d8fc424, (q31_t)0x78c94bc4, (q31_t)0x1d849e51,
+    (q31_t)0x78cf1669, (q31_t)0x1d79775c, (q31_t)0x78d4dedd, (q31_t)0x1d6e4f43,
+    (q31_t)0x78daa520, (q31_t)0x1d632608, (q31_t)0x78e06932, (q31_t)0x1d57fbaa,
+    (q31_t)0x78e62b13, (q31_t)0x1d4cd02c, (q31_t)0x78ebeac2, (q31_t)0x1d41a38c,
+    (q31_t)0x78f1a840, (q31_t)0x1d3675cb, (q31_t)0x78f7638b, (q31_t)0x1d2b46ea,
+    (q31_t)0x78fd1ca4, (q31_t)0x1d2016e9, (q31_t)0x7902d38b, (q31_t)0x1d14e5c9,
+    (q31_t)0x7908883f, (q31_t)0x1d09b389, (q31_t)0x790e3ac0, (q31_t)0x1cfe802b,
+    (q31_t)0x7913eb0e, (q31_t)0x1cf34baf, (q31_t)0x79199929, (q31_t)0x1ce81615,
+    (q31_t)0x791f4510, (q31_t)0x1cdcdf5e, (q31_t)0x7924eec3, (q31_t)0x1cd1a78a,
+    (q31_t)0x792a9642, (q31_t)0x1cc66e99, (q31_t)0x79303b8e, (q31_t)0x1cbb348d,
+    (q31_t)0x7935dea4, (q31_t)0x1caff965, (q31_t)0x793b7f86, (q31_t)0x1ca4bd21,
+    (q31_t)0x79411e33, (q31_t)0x1c997fc4, (q31_t)0x7946baac, (q31_t)0x1c8e414b,
+    (q31_t)0x794c54ee, (q31_t)0x1c8301b9, (q31_t)0x7951ecfc, (q31_t)0x1c77c10e,
+    (q31_t)0x795782d3, (q31_t)0x1c6c7f4a, (q31_t)0x795d1675, (q31_t)0x1c613c6d,
+    (q31_t)0x7962a7e0, (q31_t)0x1c55f878, (q31_t)0x79683715, (q31_t)0x1c4ab36b,
+    (q31_t)0x796dc414, (q31_t)0x1c3f6d47, (q31_t)0x79734edc, (q31_t)0x1c34260c,
+    (q31_t)0x7978d76c, (q31_t)0x1c28ddbb, (q31_t)0x797e5dc6, (q31_t)0x1c1d9454,
+    (q31_t)0x7983e1e8, (q31_t)0x1c1249d8, (q31_t)0x798963d2, (q31_t)0x1c06fe46,
+    (q31_t)0x798ee385, (q31_t)0x1bfbb1a0, (q31_t)0x799460ff, (q31_t)0x1bf063e6,
+    (q31_t)0x7999dc42, (q31_t)0x1be51518, (q31_t)0x799f554b, (q31_t)0x1bd9c537,
+    (q31_t)0x79a4cc1c, (q31_t)0x1bce7442, (q31_t)0x79aa40b4, (q31_t)0x1bc3223c,
+    (q31_t)0x79afb313, (q31_t)0x1bb7cf23, (q31_t)0x79b52339, (q31_t)0x1bac7af9,
+    (q31_t)0x79ba9125, (q31_t)0x1ba125bd, (q31_t)0x79bffcd7, (q31_t)0x1b95cf71,
+    (q31_t)0x79c5664f, (q31_t)0x1b8a7815, (q31_t)0x79cacd8d, (q31_t)0x1b7f1fa9,
+    (q31_t)0x79d03291, (q31_t)0x1b73c62d, (q31_t)0x79d5955a, (q31_t)0x1b686ba3,
+    (q31_t)0x79daf5e8, (q31_t)0x1b5d100a, (q31_t)0x79e0543c, (q31_t)0x1b51b363,
+    (q31_t)0x79e5b054, (q31_t)0x1b4655ae, (q31_t)0x79eb0a31, (q31_t)0x1b3af6ec,
+    (q31_t)0x79f061d2, (q31_t)0x1b2f971e, (q31_t)0x79f5b737, (q31_t)0x1b243643,
+    (q31_t)0x79fb0a60, (q31_t)0x1b18d45c, (q31_t)0x7a005b4d, (q31_t)0x1b0d716a,
+    (q31_t)0x7a05a9fd, (q31_t)0x1b020d6c, (q31_t)0x7a0af671, (q31_t)0x1af6a865,
+    (q31_t)0x7a1040a8, (q31_t)0x1aeb4253, (q31_t)0x7a1588a2, (q31_t)0x1adfdb37,
+    (q31_t)0x7a1ace5f, (q31_t)0x1ad47312, (q31_t)0x7a2011de, (q31_t)0x1ac909e5,
+    (q31_t)0x7a25531f, (q31_t)0x1abd9faf, (q31_t)0x7a2a9223, (q31_t)0x1ab23471,
+    (q31_t)0x7a2fcee8, (q31_t)0x1aa6c82b, (q31_t)0x7a350970, (q31_t)0x1a9b5adf,
+    (q31_t)0x7a3a41b9, (q31_t)0x1a8fec8c, (q31_t)0x7a3f77c3, (q31_t)0x1a847d33,
+    (q31_t)0x7a44ab8e, (q31_t)0x1a790cd4, (q31_t)0x7a49dd1a, (q31_t)0x1a6d9b70,
+    (q31_t)0x7a4f0c67, (q31_t)0x1a622907, (q31_t)0x7a543974, (q31_t)0x1a56b599,
+    (q31_t)0x7a596442, (q31_t)0x1a4b4128, (q31_t)0x7a5e8cd0, (q31_t)0x1a3fcbb3,
+    (q31_t)0x7a63b31d, (q31_t)0x1a34553b, (q31_t)0x7a68d72b, (q31_t)0x1a28ddc0,
+    (q31_t)0x7a6df8f8, (q31_t)0x1a1d6544, (q31_t)0x7a731884, (q31_t)0x1a11ebc5,
+    (q31_t)0x7a7835cf, (q31_t)0x1a067145, (q31_t)0x7a7d50da, (q31_t)0x19faf5c5,
+    (q31_t)0x7a8269a3, (q31_t)0x19ef7944, (q31_t)0x7a87802a, (q31_t)0x19e3fbc3,
+    (q31_t)0x7a8c9470, (q31_t)0x19d87d42, (q31_t)0x7a91a674, (q31_t)0x19ccfdc2,
+    (q31_t)0x7a96b636, (q31_t)0x19c17d44, (q31_t)0x7a9bc3b6, (q31_t)0x19b5fbc8,
+    (q31_t)0x7aa0cef3, (q31_t)0x19aa794d, (q31_t)0x7aa5d7ee, (q31_t)0x199ef5d6,
+    (q31_t)0x7aaadea6, (q31_t)0x19937161, (q31_t)0x7aafe31b, (q31_t)0x1987ebf0,
+    (q31_t)0x7ab4e54c, (q31_t)0x197c6584, (q31_t)0x7ab9e53a, (q31_t)0x1970de1b,
+    (q31_t)0x7abee2e5, (q31_t)0x196555b8, (q31_t)0x7ac3de4c, (q31_t)0x1959cc5a,
+    (q31_t)0x7ac8d76f, (q31_t)0x194e4201, (q31_t)0x7acdce4d, (q31_t)0x1942b6af,
+    (q31_t)0x7ad2c2e8, (q31_t)0x19372a64, (q31_t)0x7ad7b53d, (q31_t)0x192b9d1f,
+    (q31_t)0x7adca54e, (q31_t)0x19200ee3, (q31_t)0x7ae1931a, (q31_t)0x19147fae,
+    (q31_t)0x7ae67ea1, (q31_t)0x1908ef82, (q31_t)0x7aeb67e3, (q31_t)0x18fd5e5f,
+    (q31_t)0x7af04edf, (q31_t)0x18f1cc45, (q31_t)0x7af53395, (q31_t)0x18e63935,
+    (q31_t)0x7afa1605, (q31_t)0x18daa52f, (q31_t)0x7afef630, (q31_t)0x18cf1034,
+    (q31_t)0x7b03d414, (q31_t)0x18c37a44, (q31_t)0x7b08afb2, (q31_t)0x18b7e35f,
+    (q31_t)0x7b0d8909, (q31_t)0x18ac4b87, (q31_t)0x7b126019, (q31_t)0x18a0b2bb,
+    (q31_t)0x7b1734e2, (q31_t)0x189518fc, (q31_t)0x7b1c0764, (q31_t)0x18897e4a,
+    (q31_t)0x7b20d79e, (q31_t)0x187de2a7, (q31_t)0x7b25a591, (q31_t)0x18724611,
+    (q31_t)0x7b2a713d, (q31_t)0x1866a88a, (q31_t)0x7b2f3aa0, (q31_t)0x185b0a13,
+    (q31_t)0x7b3401bb, (q31_t)0x184f6aab, (q31_t)0x7b38c68e, (q31_t)0x1843ca53,
+    (q31_t)0x7b3d8918, (q31_t)0x1838290c, (q31_t)0x7b42495a, (q31_t)0x182c86d5,
+    (q31_t)0x7b470753, (q31_t)0x1820e3b0, (q31_t)0x7b4bc303, (q31_t)0x18153f9d,
+    (q31_t)0x7b507c69, (q31_t)0x18099a9c, (q31_t)0x7b553386, (q31_t)0x17fdf4ae,
+    (q31_t)0x7b59e85a, (q31_t)0x17f24dd3, (q31_t)0x7b5e9ae4, (q31_t)0x17e6a60c,
+    (q31_t)0x7b634b23, (q31_t)0x17dafd59, (q31_t)0x7b67f919, (q31_t)0x17cf53bb,
+    (q31_t)0x7b6ca4c4, (q31_t)0x17c3a931, (q31_t)0x7b714e25, (q31_t)0x17b7fdbd,
+    (q31_t)0x7b75f53c, (q31_t)0x17ac515f, (q31_t)0x7b7a9a07, (q31_t)0x17a0a417,
+    (q31_t)0x7b7f3c87, (q31_t)0x1794f5e6, (q31_t)0x7b83dcbc, (q31_t)0x178946cc,
+    (q31_t)0x7b887aa6, (q31_t)0x177d96ca, (q31_t)0x7b8d1644, (q31_t)0x1771e5e0,
+    (q31_t)0x7b91af97, (q31_t)0x1766340f, (q31_t)0x7b96469d, (q31_t)0x175a8157,
+    (q31_t)0x7b9adb57, (q31_t)0x174ecdb8, (q31_t)0x7b9f6dc5, (q31_t)0x17431933,
+    (q31_t)0x7ba3fde7, (q31_t)0x173763c9, (q31_t)0x7ba88bbc, (q31_t)0x172bad7a,
+    (q31_t)0x7bad1744, (q31_t)0x171ff646, (q31_t)0x7bb1a080, (q31_t)0x17143e2d,
+    (q31_t)0x7bb6276e, (q31_t)0x17088531, (q31_t)0x7bbaac0e, (q31_t)0x16fccb51,
+    (q31_t)0x7bbf2e62, (q31_t)0x16f1108f, (q31_t)0x7bc3ae67, (q31_t)0x16e554ea,
+    (q31_t)0x7bc82c1f, (q31_t)0x16d99864, (q31_t)0x7bcca789, (q31_t)0x16cddafb,
+    (q31_t)0x7bd120a4, (q31_t)0x16c21cb2, (q31_t)0x7bd59771, (q31_t)0x16b65d88,
+    (q31_t)0x7bda0bf0, (q31_t)0x16aa9d7e, (q31_t)0x7bde7e20, (q31_t)0x169edc94,
+    (q31_t)0x7be2ee01, (q31_t)0x16931acb, (q31_t)0x7be75b93, (q31_t)0x16875823,
+    (q31_t)0x7bebc6d5, (q31_t)0x167b949d, (q31_t)0x7bf02fc9, (q31_t)0x166fd039,
+    (q31_t)0x7bf4966c, (q31_t)0x16640af7, (q31_t)0x7bf8fac0, (q31_t)0x165844d8,
+    (q31_t)0x7bfd5cc4, (q31_t)0x164c7ddd, (q31_t)0x7c01bc78, (q31_t)0x1640b606,
+    (q31_t)0x7c0619dc, (q31_t)0x1634ed53, (q31_t)0x7c0a74f0, (q31_t)0x162923c5,
+    (q31_t)0x7c0ecdb2, (q31_t)0x161d595d, (q31_t)0x7c132424, (q31_t)0x16118e1a,
+    (q31_t)0x7c177845, (q31_t)0x1605c1fd, (q31_t)0x7c1bca16, (q31_t)0x15f9f507,
+    (q31_t)0x7c201994, (q31_t)0x15ee2738, (q31_t)0x7c2466c2, (q31_t)0x15e25890,
+    (q31_t)0x7c28b19e, (q31_t)0x15d68911, (q31_t)0x7c2cfa28, (q31_t)0x15cab8ba,
+    (q31_t)0x7c314060, (q31_t)0x15bee78c, (q31_t)0x7c358446, (q31_t)0x15b31587,
+    (q31_t)0x7c39c5da, (q31_t)0x15a742ac, (q31_t)0x7c3e051b, (q31_t)0x159b6efb,
+    (q31_t)0x7c42420a, (q31_t)0x158f9a76, (q31_t)0x7c467ca6, (q31_t)0x1583c51b,
+    (q31_t)0x7c4ab4ef, (q31_t)0x1577eeec, (q31_t)0x7c4eeae5, (q31_t)0x156c17e9,
+    (q31_t)0x7c531e88, (q31_t)0x15604013, (q31_t)0x7c574fd8, (q31_t)0x1554676a,
+    (q31_t)0x7c5b7ed4, (q31_t)0x15488dee, (q31_t)0x7c5fab7c, (q31_t)0x153cb3a0,
+    (q31_t)0x7c63d5d1, (q31_t)0x1530d881, (q31_t)0x7c67fdd1, (q31_t)0x1524fc90,
+    (q31_t)0x7c6c237e, (q31_t)0x15191fcf, (q31_t)0x7c7046d6, (q31_t)0x150d423d,
+    (q31_t)0x7c7467d9, (q31_t)0x150163dc, (q31_t)0x7c788688, (q31_t)0x14f584ac,
+    (q31_t)0x7c7ca2e2, (q31_t)0x14e9a4ac, (q31_t)0x7c80bce7, (q31_t)0x14ddc3de,
+    (q31_t)0x7c84d496, (q31_t)0x14d1e242, (q31_t)0x7c88e9f1, (q31_t)0x14c5ffd9,
+    (q31_t)0x7c8cfcf6, (q31_t)0x14ba1ca3, (q31_t)0x7c910da5, (q31_t)0x14ae38a0,
+    (q31_t)0x7c951bff, (q31_t)0x14a253d1, (q31_t)0x7c992803, (q31_t)0x14966e36,
+    (q31_t)0x7c9d31b0, (q31_t)0x148a87d1, (q31_t)0x7ca13908, (q31_t)0x147ea0a0,
+    (q31_t)0x7ca53e09, (q31_t)0x1472b8a5, (q31_t)0x7ca940b3, (q31_t)0x1466cfe1,
+    (q31_t)0x7cad4107, (q31_t)0x145ae653, (q31_t)0x7cb13f04, (q31_t)0x144efbfc,
+    (q31_t)0x7cb53aaa, (q31_t)0x144310dd, (q31_t)0x7cb933f9, (q31_t)0x143724f5,
+    (q31_t)0x7cbd2af0, (q31_t)0x142b3846, (q31_t)0x7cc11f90, (q31_t)0x141f4ad1,
+    (q31_t)0x7cc511d9, (q31_t)0x14135c94, (q31_t)0x7cc901c9, (q31_t)0x14076d91,
+    (q31_t)0x7cccef62, (q31_t)0x13fb7dc9, (q31_t)0x7cd0daa2, (q31_t)0x13ef8d3c,
+    (q31_t)0x7cd4c38b, (q31_t)0x13e39be9, (q31_t)0x7cd8aa1b, (q31_t)0x13d7a9d3,
+    (q31_t)0x7cdc8e52, (q31_t)0x13cbb6f8, (q31_t)0x7ce07031, (q31_t)0x13bfc35b,
+    (q31_t)0x7ce44fb7, (q31_t)0x13b3cefa, (q31_t)0x7ce82ce4, (q31_t)0x13a7d9d7,
+    (q31_t)0x7cec07b8, (q31_t)0x139be3f2, (q31_t)0x7cefe032, (q31_t)0x138fed4b,
+    (q31_t)0x7cf3b653, (q31_t)0x1383f5e3, (q31_t)0x7cf78a1b, (q31_t)0x1377fdbb,
+    (q31_t)0x7cfb5b89, (q31_t)0x136c04d2, (q31_t)0x7cff2a9d, (q31_t)0x13600b2a,
+    (q31_t)0x7d02f757, (q31_t)0x135410c3, (q31_t)0x7d06c1b6, (q31_t)0x1348159d,
+    (q31_t)0x7d0a89bc, (q31_t)0x133c19b8, (q31_t)0x7d0e4f67, (q31_t)0x13301d16,
+    (q31_t)0x7d1212b7, (q31_t)0x13241fb6, (q31_t)0x7d15d3ad, (q31_t)0x1318219a,
+    (q31_t)0x7d199248, (q31_t)0x130c22c1, (q31_t)0x7d1d4e88, (q31_t)0x1300232c,
+    (q31_t)0x7d21086c, (q31_t)0x12f422db, (q31_t)0x7d24bff6, (q31_t)0x12e821cf,
+    (q31_t)0x7d287523, (q31_t)0x12dc2009, (q31_t)0x7d2c27f6, (q31_t)0x12d01d89,
+    (q31_t)0x7d2fd86c, (q31_t)0x12c41a4f, (q31_t)0x7d338687, (q31_t)0x12b8165b,
+    (q31_t)0x7d373245, (q31_t)0x12ac11af, (q31_t)0x7d3adba7, (q31_t)0x12a00c4b,
+    (q31_t)0x7d3e82ae, (q31_t)0x1294062f, (q31_t)0x7d422757, (q31_t)0x1287ff5b,
+    (q31_t)0x7d45c9a4, (q31_t)0x127bf7d1, (q31_t)0x7d496994, (q31_t)0x126fef90,
+    (q31_t)0x7d4d0728, (q31_t)0x1263e699, (q31_t)0x7d50a25e, (q31_t)0x1257dced,
+    (q31_t)0x7d543b37, (q31_t)0x124bd28c, (q31_t)0x7d57d1b3, (q31_t)0x123fc776,
+    (q31_t)0x7d5b65d2, (q31_t)0x1233bbac, (q31_t)0x7d5ef793, (q31_t)0x1227af2e,
+    (q31_t)0x7d6286f6, (q31_t)0x121ba1fd, (q31_t)0x7d6613fb, (q31_t)0x120f941a,
+    (q31_t)0x7d699ea3, (q31_t)0x12038584, (q31_t)0x7d6d26ec, (q31_t)0x11f7763c,
+    (q31_t)0x7d70acd7, (q31_t)0x11eb6643, (q31_t)0x7d743064, (q31_t)0x11df5599,
+    (q31_t)0x7d77b192, (q31_t)0x11d3443f, (q31_t)0x7d7b3061, (q31_t)0x11c73235,
+    (q31_t)0x7d7eacd2, (q31_t)0x11bb1f7c, (q31_t)0x7d8226e4, (q31_t)0x11af0c13,
+    (q31_t)0x7d859e96, (q31_t)0x11a2f7fc, (q31_t)0x7d8913ea, (q31_t)0x1196e337,
+    (q31_t)0x7d8c86de, (q31_t)0x118acdc4, (q31_t)0x7d8ff772, (q31_t)0x117eb7a4,
+    (q31_t)0x7d9365a8, (q31_t)0x1172a0d7, (q31_t)0x7d96d17d, (q31_t)0x1166895f,
+    (q31_t)0x7d9a3af2, (q31_t)0x115a713a, (q31_t)0x7d9da208, (q31_t)0x114e586a,
+    (q31_t)0x7da106bd, (q31_t)0x11423ef0, (q31_t)0x7da46912, (q31_t)0x113624cb,
+    (q31_t)0x7da7c907, (q31_t)0x112a09fc, (q31_t)0x7dab269b, (q31_t)0x111dee84,
+    (q31_t)0x7dae81cf, (q31_t)0x1111d263, (q31_t)0x7db1daa2, (q31_t)0x1105b599,
+    (q31_t)0x7db53113, (q31_t)0x10f99827, (q31_t)0x7db88524, (q31_t)0x10ed7a0e,
+    (q31_t)0x7dbbd6d4, (q31_t)0x10e15b4e, (q31_t)0x7dbf2622, (q31_t)0x10d53be7,
+    (q31_t)0x7dc2730f, (q31_t)0x10c91bda, (q31_t)0x7dc5bd9b, (q31_t)0x10bcfb28,
+    (q31_t)0x7dc905c5, (q31_t)0x10b0d9d0, (q31_t)0x7dcc4b8d, (q31_t)0x10a4b7d3,
+    (q31_t)0x7dcf8ef3, (q31_t)0x10989532, (q31_t)0x7dd2cff7, (q31_t)0x108c71ee,
+    (q31_t)0x7dd60e99, (q31_t)0x10804e06, (q31_t)0x7dd94ad8, (q31_t)0x1074297b,
+    (q31_t)0x7ddc84b5, (q31_t)0x1068044e, (q31_t)0x7ddfbc30, (q31_t)0x105bde7f,
+    (q31_t)0x7de2f148, (q31_t)0x104fb80e, (q31_t)0x7de623fd, (q31_t)0x104390fd,
+    (q31_t)0x7de9544f, (q31_t)0x1037694b, (q31_t)0x7dec823e, (q31_t)0x102b40f8,
+    (q31_t)0x7defadca, (q31_t)0x101f1807, (q31_t)0x7df2d6f3, (q31_t)0x1012ee76,
+    (q31_t)0x7df5fdb8, (q31_t)0x1006c446, (q31_t)0x7df9221a, (q31_t)0xffa9979,
+    (q31_t)0x7dfc4418, (q31_t)0xfee6e0d, (q31_t)0x7dff63b2, (q31_t)0xfe24205,
+    (q31_t)0x7e0280e9, (q31_t)0xfd6155f, (q31_t)0x7e059bbb, (q31_t)0xfc9e81e,
+    (q31_t)0x7e08b42a, (q31_t)0xfbdba40, (q31_t)0x7e0bca34, (q31_t)0xfb18bc8,
+    (q31_t)0x7e0eddd9, (q31_t)0xfa55cb4, (q31_t)0x7e11ef1b, (q31_t)0xf992d06,
+    (q31_t)0x7e14fdf7, (q31_t)0xf8cfcbe, (q31_t)0x7e180a6f, (q31_t)0xf80cbdc,
+    (q31_t)0x7e1b1482, (q31_t)0xf749a61, (q31_t)0x7e1e1c30, (q31_t)0xf68684e,
+    (q31_t)0x7e212179, (q31_t)0xf5c35a3, (q31_t)0x7e24245d, (q31_t)0xf500260,
+    (q31_t)0x7e2724db, (q31_t)0xf43ce86, (q31_t)0x7e2a22f4, (q31_t)0xf379a16,
+    (q31_t)0x7e2d1ea8, (q31_t)0xf2b650f, (q31_t)0x7e3017f6, (q31_t)0xf1f2f73,
+    (q31_t)0x7e330ede, (q31_t)0xf12f941, (q31_t)0x7e360360, (q31_t)0xf06c27a,
+    (q31_t)0x7e38f57c, (q31_t)0xefa8b20, (q31_t)0x7e3be532, (q31_t)0xeee5331,
+    (q31_t)0x7e3ed282, (q31_t)0xee21aaf, (q31_t)0x7e41bd6c, (q31_t)0xed5e19a,
+    (q31_t)0x7e44a5ef, (q31_t)0xec9a7f3, (q31_t)0x7e478c0b, (q31_t)0xebd6db9,
+    (q31_t)0x7e4a6fc1, (q31_t)0xeb132ef, (q31_t)0x7e4d5110, (q31_t)0xea4f793,
+    (q31_t)0x7e502ff9, (q31_t)0xe98bba7, (q31_t)0x7e530c7a, (q31_t)0xe8c7f2a,
+    (q31_t)0x7e55e694, (q31_t)0xe80421e, (q31_t)0x7e58be47, (q31_t)0xe740483,
+    (q31_t)0x7e5b9392, (q31_t)0xe67c65a, (q31_t)0x7e5e6676, (q31_t)0xe5b87a2,
+    (q31_t)0x7e6136f3, (q31_t)0xe4f485c, (q31_t)0x7e640507, (q31_t)0xe430889,
+    (q31_t)0x7e66d0b4, (q31_t)0xe36c82a, (q31_t)0x7e6999fa, (q31_t)0xe2a873e,
+    (q31_t)0x7e6c60d7, (q31_t)0xe1e45c6, (q31_t)0x7e6f254c, (q31_t)0xe1203c3,
+    (q31_t)0x7e71e759, (q31_t)0xe05c135, (q31_t)0x7e74a6fd, (q31_t)0xdf97e1d,
+    (q31_t)0x7e77643a, (q31_t)0xded3a7b, (q31_t)0x7e7a1f0d, (q31_t)0xde0f64f,
+    (q31_t)0x7e7cd778, (q31_t)0xdd4b19a, (q31_t)0x7e7f8d7b, (q31_t)0xdc86c5d,
+    (q31_t)0x7e824114, (q31_t)0xdbc2698, (q31_t)0x7e84f245, (q31_t)0xdafe04b,
+    (q31_t)0x7e87a10c, (q31_t)0xda39978, (q31_t)0x7e8a4d6a, (q31_t)0xd97521d,
+    (q31_t)0x7e8cf75f, (q31_t)0xd8b0a3d, (q31_t)0x7e8f9eeb, (q31_t)0xd7ec1d6,
+    (q31_t)0x7e92440d, (q31_t)0xd7278eb, (q31_t)0x7e94e6c6, (q31_t)0xd662f7b,
+    (q31_t)0x7e978715, (q31_t)0xd59e586, (q31_t)0x7e9a24fb, (q31_t)0xd4d9b0e,
+    (q31_t)0x7e9cc076, (q31_t)0xd415013, (q31_t)0x7e9f5988, (q31_t)0xd350495,
+    (q31_t)0x7ea1f02f, (q31_t)0xd28b894, (q31_t)0x7ea4846c, (q31_t)0xd1c6c11,
+    (q31_t)0x7ea7163f, (q31_t)0xd101f0e, (q31_t)0x7ea9a5a8, (q31_t)0xd03d189,
+    (q31_t)0x7eac32a6, (q31_t)0xcf78383, (q31_t)0x7eaebd3a, (q31_t)0xceb34fe,
+    (q31_t)0x7eb14563, (q31_t)0xcdee5f9, (q31_t)0x7eb3cb21, (q31_t)0xcd29676,
+    (q31_t)0x7eb64e75, (q31_t)0xcc64673, (q31_t)0x7eb8cf5d, (q31_t)0xcb9f5f3,
+    (q31_t)0x7ebb4ddb, (q31_t)0xcada4f5, (q31_t)0x7ebdc9ed, (q31_t)0xca1537a,
+    (q31_t)0x7ec04394, (q31_t)0xc950182, (q31_t)0x7ec2bad0, (q31_t)0xc88af0e,
+    (q31_t)0x7ec52fa0, (q31_t)0xc7c5c1e, (q31_t)0x7ec7a205, (q31_t)0xc7008b3,
+    (q31_t)0x7eca11fe, (q31_t)0xc63b4ce, (q31_t)0x7ecc7f8b, (q31_t)0xc57606e,
+    (q31_t)0x7eceeaad, (q31_t)0xc4b0b94, (q31_t)0x7ed15363, (q31_t)0xc3eb641,
+    (q31_t)0x7ed3b9ad, (q31_t)0xc326075, (q31_t)0x7ed61d8a, (q31_t)0xc260a31,
+    (q31_t)0x7ed87efc, (q31_t)0xc19b374, (q31_t)0x7edade01, (q31_t)0xc0d5c41,
+    (q31_t)0x7edd3a9a, (q31_t)0xc010496, (q31_t)0x7edf94c7, (q31_t)0xbf4ac75,
+    (q31_t)0x7ee1ec87, (q31_t)0xbe853de, (q31_t)0x7ee441da, (q31_t)0xbdbfad1,
+    (q31_t)0x7ee694c1, (q31_t)0xbcfa150, (q31_t)0x7ee8e53a, (q31_t)0xbc34759,
+    (q31_t)0x7eeb3347, (q31_t)0xbb6ecef, (q31_t)0x7eed7ee7, (q31_t)0xbaa9211,
+    (q31_t)0x7eefc81a, (q31_t)0xb9e36c0, (q31_t)0x7ef20ee0, (q31_t)0xb91dafc,
+    (q31_t)0x7ef45338, (q31_t)0xb857ec7, (q31_t)0x7ef69523, (q31_t)0xb79221f,
+    (q31_t)0x7ef8d4a1, (q31_t)0xb6cc506, (q31_t)0x7efb11b1, (q31_t)0xb60677c,
+    (q31_t)0x7efd4c54, (q31_t)0xb540982, (q31_t)0x7eff8489, (q31_t)0xb47ab19,
+    (q31_t)0x7f01ba50, (q31_t)0xb3b4c40, (q31_t)0x7f03eda9, (q31_t)0xb2eecf8,
+    (q31_t)0x7f061e95, (q31_t)0xb228d42, (q31_t)0x7f084d12, (q31_t)0xb162d1d,
+    (q31_t)0x7f0a7921, (q31_t)0xb09cc8c, (q31_t)0x7f0ca2c2, (q31_t)0xafd6b8d,
+    (q31_t)0x7f0ec9f5, (q31_t)0xaf10a22, (q31_t)0x7f10eeb9, (q31_t)0xae4a84b,
+    (q31_t)0x7f13110f, (q31_t)0xad84609, (q31_t)0x7f1530f7, (q31_t)0xacbe35b,
+    (q31_t)0x7f174e70, (q31_t)0xabf8043, (q31_t)0x7f19697a, (q31_t)0xab31cc1,
+    (q31_t)0x7f1b8215, (q31_t)0xaa6b8d5, (q31_t)0x7f1d9842, (q31_t)0xa9a5480,
+    (q31_t)0x7f1fabff, (q31_t)0xa8defc3, (q31_t)0x7f21bd4e, (q31_t)0xa818a9d,
+    (q31_t)0x7f23cc2e, (q31_t)0xa752510, (q31_t)0x7f25d89e, (q31_t)0xa68bf1b,
+    (q31_t)0x7f27e29f, (q31_t)0xa5c58c0, (q31_t)0x7f29ea31, (q31_t)0xa4ff1fe,
+    (q31_t)0x7f2bef53, (q31_t)0xa438ad7, (q31_t)0x7f2df206, (q31_t)0xa37234a,
+    (q31_t)0x7f2ff24a, (q31_t)0xa2abb59, (q31_t)0x7f31f01d, (q31_t)0xa1e5303,
+    (q31_t)0x7f33eb81, (q31_t)0xa11ea49, (q31_t)0x7f35e476, (q31_t)0xa05812c,
+    (q31_t)0x7f37dafa, (q31_t)0x9f917ac, (q31_t)0x7f39cf0e, (q31_t)0x9ecadc9,
+    (q31_t)0x7f3bc0b3, (q31_t)0x9e04385, (q31_t)0x7f3dafe7, (q31_t)0x9d3d8df,
+    (q31_t)0x7f3f9cab, (q31_t)0x9c76dd8, (q31_t)0x7f4186ff, (q31_t)0x9bb0271,
+    (q31_t)0x7f436ee3, (q31_t)0x9ae96aa, (q31_t)0x7f455456, (q31_t)0x9a22a83,
+    (q31_t)0x7f473759, (q31_t)0x995bdfd, (q31_t)0x7f4917eb, (q31_t)0x9895118,
+    (q31_t)0x7f4af60d, (q31_t)0x97ce3d5, (q31_t)0x7f4cd1be, (q31_t)0x9707635,
+    (q31_t)0x7f4eaafe, (q31_t)0x9640837, (q31_t)0x7f5081cd, (q31_t)0x95799dd,
+    (q31_t)0x7f52562c, (q31_t)0x94b2b27, (q31_t)0x7f54281a, (q31_t)0x93ebc14,
+    (q31_t)0x7f55f796, (q31_t)0x9324ca7, (q31_t)0x7f57c4a2, (q31_t)0x925dcdf,
+    (q31_t)0x7f598f3c, (q31_t)0x9196cbc, (q31_t)0x7f5b5765, (q31_t)0x90cfc40,
+    (q31_t)0x7f5d1d1d, (q31_t)0x9008b6a, (q31_t)0x7f5ee063, (q31_t)0x8f41a3c,
+    (q31_t)0x7f60a138, (q31_t)0x8e7a8b5, (q31_t)0x7f625f9b, (q31_t)0x8db36d6,
+    (q31_t)0x7f641b8d, (q31_t)0x8cec4a0, (q31_t)0x7f65d50d, (q31_t)0x8c25213,
+    (q31_t)0x7f678c1c, (q31_t)0x8b5df30, (q31_t)0x7f6940b8, (q31_t)0x8a96bf6,
+    (q31_t)0x7f6af2e3, (q31_t)0x89cf867, (q31_t)0x7f6ca29c, (q31_t)0x8908483,
+    (q31_t)0x7f6e4fe3, (q31_t)0x884104b, (q31_t)0x7f6ffab8, (q31_t)0x8779bbe,
+    (q31_t)0x7f71a31b, (q31_t)0x86b26de, (q31_t)0x7f73490b, (q31_t)0x85eb1ab,
+    (q31_t)0x7f74ec8a, (q31_t)0x8523c25, (q31_t)0x7f768d96, (q31_t)0x845c64d,
+    (q31_t)0x7f782c30, (q31_t)0x8395024, (q31_t)0x7f79c857, (q31_t)0x82cd9a9,
+    (q31_t)0x7f7b620c, (q31_t)0x82062de, (q31_t)0x7f7cf94e, (q31_t)0x813ebc2,
+    (q31_t)0x7f7e8e1e, (q31_t)0x8077457, (q31_t)0x7f80207b, (q31_t)0x7fafc9c,
+    (q31_t)0x7f81b065, (q31_t)0x7ee8493, (q31_t)0x7f833ddd, (q31_t)0x7e20c3b,
+    (q31_t)0x7f84c8e2, (q31_t)0x7d59396, (q31_t)0x7f865174, (q31_t)0x7c91aa3,
+    (q31_t)0x7f87d792, (q31_t)0x7bca163, (q31_t)0x7f895b3e, (q31_t)0x7b027d7,
+    (q31_t)0x7f8adc77, (q31_t)0x7a3adff, (q31_t)0x7f8c5b3d, (q31_t)0x79733dc,
+    (q31_t)0x7f8dd78f, (q31_t)0x78ab96e, (q31_t)0x7f8f516e, (q31_t)0x77e3eb5,
+    (q31_t)0x7f90c8da, (q31_t)0x771c3b3, (q31_t)0x7f923dd2, (q31_t)0x7654867,
+    (q31_t)0x7f93b058, (q31_t)0x758ccd2, (q31_t)0x7f952069, (q31_t)0x74c50f4,
+    (q31_t)0x7f968e07, (q31_t)0x73fd4cf, (q31_t)0x7f97f932, (q31_t)0x7335862,
+    (q31_t)0x7f9961e8, (q31_t)0x726dbae, (q31_t)0x7f9ac82c, (q31_t)0x71a5eb3,
+    (q31_t)0x7f9c2bfb, (q31_t)0x70de172, (q31_t)0x7f9d8d56, (q31_t)0x70163eb,
+    (q31_t)0x7f9eec3e, (q31_t)0x6f4e620, (q31_t)0x7fa048b2, (q31_t)0x6e86810,
+    (q31_t)0x7fa1a2b2, (q31_t)0x6dbe9bb, (q31_t)0x7fa2fa3d, (q31_t)0x6cf6b23,
+    (q31_t)0x7fa44f55, (q31_t)0x6c2ec48, (q31_t)0x7fa5a1f9, (q31_t)0x6b66d29,
+    (q31_t)0x7fa6f228, (q31_t)0x6a9edc9, (q31_t)0x7fa83fe3, (q31_t)0x69d6e27,
+    (q31_t)0x7fa98b2a, (q31_t)0x690ee44, (q31_t)0x7faad3fd, (q31_t)0x6846e1f,
+    (q31_t)0x7fac1a5b, (q31_t)0x677edbb, (q31_t)0x7fad5e45, (q31_t)0x66b6d16,
+    (q31_t)0x7fae9fbb, (q31_t)0x65eec33, (q31_t)0x7fafdebb, (q31_t)0x6526b10,
+    (q31_t)0x7fb11b48, (q31_t)0x645e9af, (q31_t)0x7fb2555f, (q31_t)0x6396810,
+    (q31_t)0x7fb38d02, (q31_t)0x62ce634, (q31_t)0x7fb4c231, (q31_t)0x620641a,
+    (q31_t)0x7fb5f4ea, (q31_t)0x613e1c5, (q31_t)0x7fb7252f, (q31_t)0x6075f33,
+    (q31_t)0x7fb852ff, (q31_t)0x5fadc66, (q31_t)0x7fb97e5a, (q31_t)0x5ee595d,
+    (q31_t)0x7fbaa740, (q31_t)0x5e1d61b, (q31_t)0x7fbbcdb1, (q31_t)0x5d5529e,
+    (q31_t)0x7fbcf1ad, (q31_t)0x5c8cee7, (q31_t)0x7fbe1334, (q31_t)0x5bc4af8,
+    (q31_t)0x7fbf3246, (q31_t)0x5afc6d0, (q31_t)0x7fc04ee3, (q31_t)0x5a3426f,
+    (q31_t)0x7fc1690a, (q31_t)0x596bdd7, (q31_t)0x7fc280bc, (q31_t)0x58a3908,
+    (q31_t)0x7fc395f9, (q31_t)0x57db403, (q31_t)0x7fc4a8c1, (q31_t)0x5712ec7,
+    (q31_t)0x7fc5b913, (q31_t)0x564a955, (q31_t)0x7fc6c6f0, (q31_t)0x55823ae,
+    (q31_t)0x7fc7d258, (q31_t)0x54b9dd3, (q31_t)0x7fc8db4a, (q31_t)0x53f17c3,
+    (q31_t)0x7fc9e1c6, (q31_t)0x532917f, (q31_t)0x7fcae5cd, (q31_t)0x5260b08,
+    (q31_t)0x7fcbe75e, (q31_t)0x519845e, (q31_t)0x7fcce67a, (q31_t)0x50cfd82,
+    (q31_t)0x7fcde320, (q31_t)0x5007674, (q31_t)0x7fcedd50, (q31_t)0x4f3ef35,
+    (q31_t)0x7fcfd50b, (q31_t)0x4e767c5, (q31_t)0x7fd0ca4f, (q31_t)0x4dae024,
+    (q31_t)0x7fd1bd1e, (q31_t)0x4ce5854, (q31_t)0x7fd2ad77, (q31_t)0x4c1d054,
+    (q31_t)0x7fd39b5a, (q31_t)0x4b54825, (q31_t)0x7fd486c7, (q31_t)0x4a8bfc7,
+    (q31_t)0x7fd56fbe, (q31_t)0x49c373c, (q31_t)0x7fd6563f, (q31_t)0x48fae83,
+    (q31_t)0x7fd73a4a, (q31_t)0x483259d, (q31_t)0x7fd81bdf, (q31_t)0x4769c8b,
+    (q31_t)0x7fd8fafe, (q31_t)0x46a134c, (q31_t)0x7fd9d7a7, (q31_t)0x45d89e2,
+    (q31_t)0x7fdab1d9, (q31_t)0x451004d, (q31_t)0x7fdb8996, (q31_t)0x444768d,
+    (q31_t)0x7fdc5edc, (q31_t)0x437eca4, (q31_t)0x7fdd31ac, (q31_t)0x42b6290,
+    (q31_t)0x7fde0205, (q31_t)0x41ed854, (q31_t)0x7fdecfe8, (q31_t)0x4124dee,
+    (q31_t)0x7fdf9b55, (q31_t)0x405c361, (q31_t)0x7fe0644b, (q31_t)0x3f938ac,
+    (q31_t)0x7fe12acb, (q31_t)0x3ecadcf, (q31_t)0x7fe1eed5, (q31_t)0x3e022cc,
+    (q31_t)0x7fe2b067, (q31_t)0x3d397a3, (q31_t)0x7fe36f84, (q31_t)0x3c70c54,
+    (q31_t)0x7fe42c2a, (q31_t)0x3ba80df, (q31_t)0x7fe4e659, (q31_t)0x3adf546,
+    (q31_t)0x7fe59e12, (q31_t)0x3a16988, (q31_t)0x7fe65354, (q31_t)0x394dda7,
+    (q31_t)0x7fe7061f, (q31_t)0x38851a2, (q31_t)0x7fe7b674, (q31_t)0x37bc57b,
+    (q31_t)0x7fe86452, (q31_t)0x36f3931, (q31_t)0x7fe90fb9, (q31_t)0x362acc5,
+    (q31_t)0x7fe9b8a9, (q31_t)0x3562038, (q31_t)0x7fea5f23, (q31_t)0x3499389,
+    (q31_t)0x7feb0326, (q31_t)0x33d06bb, (q31_t)0x7feba4b2, (q31_t)0x33079cc,
+    (q31_t)0x7fec43c7, (q31_t)0x323ecbe, (q31_t)0x7fece065, (q31_t)0x3175f91,
+    (q31_t)0x7fed7a8c, (q31_t)0x30ad245, (q31_t)0x7fee123d, (q31_t)0x2fe44dc,
+    (q31_t)0x7feea776, (q31_t)0x2f1b755, (q31_t)0x7fef3a39, (q31_t)0x2e529b0,
+    (q31_t)0x7fefca84, (q31_t)0x2d89bf0, (q31_t)0x7ff05858, (q31_t)0x2cc0e13,
+    (q31_t)0x7ff0e3b6, (q31_t)0x2bf801a, (q31_t)0x7ff16c9c, (q31_t)0x2b2f207,
+    (q31_t)0x7ff1f30b, (q31_t)0x2a663d8, (q31_t)0x7ff27703, (q31_t)0x299d590,
+    (q31_t)0x7ff2f884, (q31_t)0x28d472e, (q31_t)0x7ff3778e, (q31_t)0x280b8b3,
+    (q31_t)0x7ff3f420, (q31_t)0x2742a1f, (q31_t)0x7ff46e3c, (q31_t)0x2679b73,
+    (q31_t)0x7ff4e5e0, (q31_t)0x25b0caf, (q31_t)0x7ff55b0d, (q31_t)0x24e7dd4,
+    (q31_t)0x7ff5cdc3, (q31_t)0x241eee2, (q31_t)0x7ff63e01, (q31_t)0x2355fd9,
+    (q31_t)0x7ff6abc8, (q31_t)0x228d0bb, (q31_t)0x7ff71718, (q31_t)0x21c4188,
+    (q31_t)0x7ff77ff1, (q31_t)0x20fb240, (q31_t)0x7ff7e652, (q31_t)0x20322e3,
+    (q31_t)0x7ff84a3c, (q31_t)0x1f69373, (q31_t)0x7ff8abae, (q31_t)0x1ea03ef,
+    (q31_t)0x7ff90aaa, (q31_t)0x1dd7459, (q31_t)0x7ff9672d, (q31_t)0x1d0e4b0,
+    (q31_t)0x7ff9c13a, (q31_t)0x1c454f5, (q31_t)0x7ffa18cf, (q31_t)0x1b7c528,
+    (q31_t)0x7ffa6dec, (q31_t)0x1ab354b, (q31_t)0x7ffac092, (q31_t)0x19ea55d,
+    (q31_t)0x7ffb10c1, (q31_t)0x192155f, (q31_t)0x7ffb5e78, (q31_t)0x1858552,
+    (q31_t)0x7ffba9b8, (q31_t)0x178f536, (q31_t)0x7ffbf280, (q31_t)0x16c650b,
+    (q31_t)0x7ffc38d1, (q31_t)0x15fd4d2, (q31_t)0x7ffc7caa, (q31_t)0x153448c,
+    (q31_t)0x7ffcbe0c, (q31_t)0x146b438, (q31_t)0x7ffcfcf6, (q31_t)0x13a23d8,
+    (q31_t)0x7ffd3969, (q31_t)0x12d936c, (q31_t)0x7ffd7364, (q31_t)0x12102f4,
+    (q31_t)0x7ffdaae7, (q31_t)0x1147271, (q31_t)0x7ffddff3, (q31_t)0x107e1e3,
+    (q31_t)0x7ffe1288, (q31_t)0xfb514b, (q31_t)0x7ffe42a4, (q31_t)0xeec0aa,
+    (q31_t)0x7ffe704a, (q31_t)0xe22fff, (q31_t)0x7ffe9b77, (q31_t)0xd59f4c,
+    (q31_t)0x7ffec42d, (q31_t)0xc90e90, (q31_t)0x7ffeea6c, (q31_t)0xbc7dcc,
+    (q31_t)0x7fff0e32, (q31_t)0xafed02, (q31_t)0x7fff2f82, (q31_t)0xa35c30,
+    (q31_t)0x7fff4e59, (q31_t)0x96cb58, (q31_t)0x7fff6ab9, (q31_t)0x8a3a7b,
+    (q31_t)0x7fff84a1, (q31_t)0x7da998, (q31_t)0x7fff9c12, (q31_t)0x7118b0,
+    (q31_t)0x7fffb10b, (q31_t)0x6487c4, (q31_t)0x7fffc38c, (q31_t)0x57f6d4,
+    (q31_t)0x7fffd396, (q31_t)0x4b65e1, (q31_t)0x7fffe128, (q31_t)0x3ed4ea,
+    (q31_t)0x7fffec43, (q31_t)0x3243f1, (q31_t)0x7ffff4e6, (q31_t)0x25b2f7,
+    (q31_t)0x7ffffb11, (q31_t)0x1921fb, (q31_t)0x7ffffec4, (q31_t)0xc90fe,
+    (q31_t)0x7fffffff, (q31_t)0x0, (q31_t)0x7ffffec4, (q31_t)0xfff36f02,
+    (q31_t)0x7ffffb11, (q31_t)0xffe6de05, (q31_t)0x7ffff4e6, (q31_t)0xffda4d09,
+    (q31_t)0x7fffec43, (q31_t)0xffcdbc0f, (q31_t)0x7fffe128, (q31_t)0xffc12b16,
+    (q31_t)0x7fffd396, (q31_t)0xffb49a1f, (q31_t)0x7fffc38c, (q31_t)0xffa8092c,
+    (q31_t)0x7fffb10b, (q31_t)0xff9b783c, (q31_t)0x7fff9c12, (q31_t)0xff8ee750,
+    (q31_t)0x7fff84a1, (q31_t)0xff825668, (q31_t)0x7fff6ab9, (q31_t)0xff75c585,
+    (q31_t)0x7fff4e59, (q31_t)0xff6934a8, (q31_t)0x7fff2f82, (q31_t)0xff5ca3d0,
+    (q31_t)0x7fff0e32, (q31_t)0xff5012fe, (q31_t)0x7ffeea6c, (q31_t)0xff438234,
+    (q31_t)0x7ffec42d, (q31_t)0xff36f170, (q31_t)0x7ffe9b77, (q31_t)0xff2a60b4,
+    (q31_t)0x7ffe704a, (q31_t)0xff1dd001, (q31_t)0x7ffe42a4, (q31_t)0xff113f56,
+    (q31_t)0x7ffe1288, (q31_t)0xff04aeb5, (q31_t)0x7ffddff3, (q31_t)0xfef81e1d,
+    (q31_t)0x7ffdaae7, (q31_t)0xfeeb8d8f, (q31_t)0x7ffd7364, (q31_t)0xfedefd0c,
+    (q31_t)0x7ffd3969, (q31_t)0xfed26c94, (q31_t)0x7ffcfcf6, (q31_t)0xfec5dc28,
+    (q31_t)0x7ffcbe0c, (q31_t)0xfeb94bc8, (q31_t)0x7ffc7caa, (q31_t)0xfeacbb74,
+    (q31_t)0x7ffc38d1, (q31_t)0xfea02b2e, (q31_t)0x7ffbf280, (q31_t)0xfe939af5,
+    (q31_t)0x7ffba9b8, (q31_t)0xfe870aca, (q31_t)0x7ffb5e78, (q31_t)0xfe7a7aae,
+    (q31_t)0x7ffb10c1, (q31_t)0xfe6deaa1, (q31_t)0x7ffac092, (q31_t)0xfe615aa3,
+    (q31_t)0x7ffa6dec, (q31_t)0xfe54cab5, (q31_t)0x7ffa18cf, (q31_t)0xfe483ad8,
+    (q31_t)0x7ff9c13a, (q31_t)0xfe3bab0b, (q31_t)0x7ff9672d, (q31_t)0xfe2f1b50,
+    (q31_t)0x7ff90aaa, (q31_t)0xfe228ba7, (q31_t)0x7ff8abae, (q31_t)0xfe15fc11,
+    (q31_t)0x7ff84a3c, (q31_t)0xfe096c8d, (q31_t)0x7ff7e652, (q31_t)0xfdfcdd1d,
+    (q31_t)0x7ff77ff1, (q31_t)0xfdf04dc0, (q31_t)0x7ff71718, (q31_t)0xfde3be78,
+    (q31_t)0x7ff6abc8, (q31_t)0xfdd72f45, (q31_t)0x7ff63e01, (q31_t)0xfdcaa027,
+    (q31_t)0x7ff5cdc3, (q31_t)0xfdbe111e, (q31_t)0x7ff55b0d, (q31_t)0xfdb1822c,
+    (q31_t)0x7ff4e5e0, (q31_t)0xfda4f351, (q31_t)0x7ff46e3c, (q31_t)0xfd98648d,
+    (q31_t)0x7ff3f420, (q31_t)0xfd8bd5e1, (q31_t)0x7ff3778e, (q31_t)0xfd7f474d,
+    (q31_t)0x7ff2f884, (q31_t)0xfd72b8d2, (q31_t)0x7ff27703, (q31_t)0xfd662a70,
+    (q31_t)0x7ff1f30b, (q31_t)0xfd599c28, (q31_t)0x7ff16c9c, (q31_t)0xfd4d0df9,
+    (q31_t)0x7ff0e3b6, (q31_t)0xfd407fe6, (q31_t)0x7ff05858, (q31_t)0xfd33f1ed,
+    (q31_t)0x7fefca84, (q31_t)0xfd276410, (q31_t)0x7fef3a39, (q31_t)0xfd1ad650,
+    (q31_t)0x7feea776, (q31_t)0xfd0e48ab, (q31_t)0x7fee123d, (q31_t)0xfd01bb24,
+    (q31_t)0x7fed7a8c, (q31_t)0xfcf52dbb, (q31_t)0x7fece065, (q31_t)0xfce8a06f,
+    (q31_t)0x7fec43c7, (q31_t)0xfcdc1342, (q31_t)0x7feba4b2, (q31_t)0xfccf8634,
+    (q31_t)0x7feb0326, (q31_t)0xfcc2f945, (q31_t)0x7fea5f23, (q31_t)0xfcb66c77,
+    (q31_t)0x7fe9b8a9, (q31_t)0xfca9dfc8, (q31_t)0x7fe90fb9, (q31_t)0xfc9d533b,
+    (q31_t)0x7fe86452, (q31_t)0xfc90c6cf, (q31_t)0x7fe7b674, (q31_t)0xfc843a85,
+    (q31_t)0x7fe7061f, (q31_t)0xfc77ae5e, (q31_t)0x7fe65354, (q31_t)0xfc6b2259,
+    (q31_t)0x7fe59e12, (q31_t)0xfc5e9678, (q31_t)0x7fe4e659, (q31_t)0xfc520aba,
+    (q31_t)0x7fe42c2a, (q31_t)0xfc457f21, (q31_t)0x7fe36f84, (q31_t)0xfc38f3ac,
+    (q31_t)0x7fe2b067, (q31_t)0xfc2c685d, (q31_t)0x7fe1eed5, (q31_t)0xfc1fdd34,
+    (q31_t)0x7fe12acb, (q31_t)0xfc135231, (q31_t)0x7fe0644b, (q31_t)0xfc06c754,
+    (q31_t)0x7fdf9b55, (q31_t)0xfbfa3c9f, (q31_t)0x7fdecfe8, (q31_t)0xfbedb212,
+    (q31_t)0x7fde0205, (q31_t)0xfbe127ac, (q31_t)0x7fdd31ac, (q31_t)0xfbd49d70,
+    (q31_t)0x7fdc5edc, (q31_t)0xfbc8135c, (q31_t)0x7fdb8996, (q31_t)0xfbbb8973,
+    (q31_t)0x7fdab1d9, (q31_t)0xfbaeffb3, (q31_t)0x7fd9d7a7, (q31_t)0xfba2761e,
+    (q31_t)0x7fd8fafe, (q31_t)0xfb95ecb4, (q31_t)0x7fd81bdf, (q31_t)0xfb896375,
+    (q31_t)0x7fd73a4a, (q31_t)0xfb7cda63, (q31_t)0x7fd6563f, (q31_t)0xfb70517d,
+    (q31_t)0x7fd56fbe, (q31_t)0xfb63c8c4, (q31_t)0x7fd486c7, (q31_t)0xfb574039,
+    (q31_t)0x7fd39b5a, (q31_t)0xfb4ab7db, (q31_t)0x7fd2ad77, (q31_t)0xfb3e2fac,
+    (q31_t)0x7fd1bd1e, (q31_t)0xfb31a7ac, (q31_t)0x7fd0ca4f, (q31_t)0xfb251fdc,
+    (q31_t)0x7fcfd50b, (q31_t)0xfb18983b, (q31_t)0x7fcedd50, (q31_t)0xfb0c10cb,
+    (q31_t)0x7fcde320, (q31_t)0xfaff898c, (q31_t)0x7fcce67a, (q31_t)0xfaf3027e,
+    (q31_t)0x7fcbe75e, (q31_t)0xfae67ba2, (q31_t)0x7fcae5cd, (q31_t)0xfad9f4f8,
+    (q31_t)0x7fc9e1c6, (q31_t)0xfacd6e81, (q31_t)0x7fc8db4a, (q31_t)0xfac0e83d,
+    (q31_t)0x7fc7d258, (q31_t)0xfab4622d, (q31_t)0x7fc6c6f0, (q31_t)0xfaa7dc52,
+    (q31_t)0x7fc5b913, (q31_t)0xfa9b56ab, (q31_t)0x7fc4a8c1, (q31_t)0xfa8ed139,
+    (q31_t)0x7fc395f9, (q31_t)0xfa824bfd, (q31_t)0x7fc280bc, (q31_t)0xfa75c6f8,
+    (q31_t)0x7fc1690a, (q31_t)0xfa694229, (q31_t)0x7fc04ee3, (q31_t)0xfa5cbd91,
+    (q31_t)0x7fbf3246, (q31_t)0xfa503930, (q31_t)0x7fbe1334, (q31_t)0xfa43b508,
+    (q31_t)0x7fbcf1ad, (q31_t)0xfa373119, (q31_t)0x7fbbcdb1, (q31_t)0xfa2aad62,
+    (q31_t)0x7fbaa740, (q31_t)0xfa1e29e5, (q31_t)0x7fb97e5a, (q31_t)0xfa11a6a3,
+    (q31_t)0x7fb852ff, (q31_t)0xfa05239a, (q31_t)0x7fb7252f, (q31_t)0xf9f8a0cd,
+    (q31_t)0x7fb5f4ea, (q31_t)0xf9ec1e3b, (q31_t)0x7fb4c231, (q31_t)0xf9df9be6,
+    (q31_t)0x7fb38d02, (q31_t)0xf9d319cc, (q31_t)0x7fb2555f, (q31_t)0xf9c697f0,
+    (q31_t)0x7fb11b48, (q31_t)0xf9ba1651, (q31_t)0x7fafdebb, (q31_t)0xf9ad94f0,
+    (q31_t)0x7fae9fbb, (q31_t)0xf9a113cd, (q31_t)0x7fad5e45, (q31_t)0xf99492ea,
+    (q31_t)0x7fac1a5b, (q31_t)0xf9881245, (q31_t)0x7faad3fd, (q31_t)0xf97b91e1,
+    (q31_t)0x7fa98b2a, (q31_t)0xf96f11bc, (q31_t)0x7fa83fe3, (q31_t)0xf96291d9,
+    (q31_t)0x7fa6f228, (q31_t)0xf9561237, (q31_t)0x7fa5a1f9, (q31_t)0xf94992d7,
+    (q31_t)0x7fa44f55, (q31_t)0xf93d13b8, (q31_t)0x7fa2fa3d, (q31_t)0xf93094dd,
+    (q31_t)0x7fa1a2b2, (q31_t)0xf9241645, (q31_t)0x7fa048b2, (q31_t)0xf91797f0,
+    (q31_t)0x7f9eec3e, (q31_t)0xf90b19e0, (q31_t)0x7f9d8d56, (q31_t)0xf8fe9c15,
+    (q31_t)0x7f9c2bfb, (q31_t)0xf8f21e8e, (q31_t)0x7f9ac82c, (q31_t)0xf8e5a14d,
+    (q31_t)0x7f9961e8, (q31_t)0xf8d92452, (q31_t)0x7f97f932, (q31_t)0xf8cca79e,
+    (q31_t)0x7f968e07, (q31_t)0xf8c02b31, (q31_t)0x7f952069, (q31_t)0xf8b3af0c,
+    (q31_t)0x7f93b058, (q31_t)0xf8a7332e, (q31_t)0x7f923dd2, (q31_t)0xf89ab799,
+    (q31_t)0x7f90c8da, (q31_t)0xf88e3c4d, (q31_t)0x7f8f516e, (q31_t)0xf881c14b,
+    (q31_t)0x7f8dd78f, (q31_t)0xf8754692, (q31_t)0x7f8c5b3d, (q31_t)0xf868cc24,
+    (q31_t)0x7f8adc77, (q31_t)0xf85c5201, (q31_t)0x7f895b3e, (q31_t)0xf84fd829,
+    (q31_t)0x7f87d792, (q31_t)0xf8435e9d, (q31_t)0x7f865174, (q31_t)0xf836e55d,
+    (q31_t)0x7f84c8e2, (q31_t)0xf82a6c6a, (q31_t)0x7f833ddd, (q31_t)0xf81df3c5,
+    (q31_t)0x7f81b065, (q31_t)0xf8117b6d, (q31_t)0x7f80207b, (q31_t)0xf8050364,
+    (q31_t)0x7f7e8e1e, (q31_t)0xf7f88ba9, (q31_t)0x7f7cf94e, (q31_t)0xf7ec143e,
+    (q31_t)0x7f7b620c, (q31_t)0xf7df9d22, (q31_t)0x7f79c857, (q31_t)0xf7d32657,
+    (q31_t)0x7f782c30, (q31_t)0xf7c6afdc, (q31_t)0x7f768d96, (q31_t)0xf7ba39b3,
+    (q31_t)0x7f74ec8a, (q31_t)0xf7adc3db, (q31_t)0x7f73490b, (q31_t)0xf7a14e55,
+    (q31_t)0x7f71a31b, (q31_t)0xf794d922, (q31_t)0x7f6ffab8, (q31_t)0xf7886442,
+    (q31_t)0x7f6e4fe3, (q31_t)0xf77befb5, (q31_t)0x7f6ca29c, (q31_t)0xf76f7b7d,
+    (q31_t)0x7f6af2e3, (q31_t)0xf7630799, (q31_t)0x7f6940b8, (q31_t)0xf756940a,
+    (q31_t)0x7f678c1c, (q31_t)0xf74a20d0, (q31_t)0x7f65d50d, (q31_t)0xf73daded,
+    (q31_t)0x7f641b8d, (q31_t)0xf7313b60, (q31_t)0x7f625f9b, (q31_t)0xf724c92a,
+    (q31_t)0x7f60a138, (q31_t)0xf718574b, (q31_t)0x7f5ee063, (q31_t)0xf70be5c4,
+    (q31_t)0x7f5d1d1d, (q31_t)0xf6ff7496, (q31_t)0x7f5b5765, (q31_t)0xf6f303c0,
+    (q31_t)0x7f598f3c, (q31_t)0xf6e69344, (q31_t)0x7f57c4a2, (q31_t)0xf6da2321,
+    (q31_t)0x7f55f796, (q31_t)0xf6cdb359, (q31_t)0x7f54281a, (q31_t)0xf6c143ec,
+    (q31_t)0x7f52562c, (q31_t)0xf6b4d4d9, (q31_t)0x7f5081cd, (q31_t)0xf6a86623,
+    (q31_t)0x7f4eaafe, (q31_t)0xf69bf7c9, (q31_t)0x7f4cd1be, (q31_t)0xf68f89cb,
+    (q31_t)0x7f4af60d, (q31_t)0xf6831c2b, (q31_t)0x7f4917eb, (q31_t)0xf676aee8,
+    (q31_t)0x7f473759, (q31_t)0xf66a4203, (q31_t)0x7f455456, (q31_t)0xf65dd57d,
+    (q31_t)0x7f436ee3, (q31_t)0xf6516956, (q31_t)0x7f4186ff, (q31_t)0xf644fd8f,
+    (q31_t)0x7f3f9cab, (q31_t)0xf6389228, (q31_t)0x7f3dafe7, (q31_t)0xf62c2721,
+    (q31_t)0x7f3bc0b3, (q31_t)0xf61fbc7b, (q31_t)0x7f39cf0e, (q31_t)0xf6135237,
+    (q31_t)0x7f37dafa, (q31_t)0xf606e854, (q31_t)0x7f35e476, (q31_t)0xf5fa7ed4,
+    (q31_t)0x7f33eb81, (q31_t)0xf5ee15b7, (q31_t)0x7f31f01d, (q31_t)0xf5e1acfd,
+    (q31_t)0x7f2ff24a, (q31_t)0xf5d544a7, (q31_t)0x7f2df206, (q31_t)0xf5c8dcb6,
+    (q31_t)0x7f2bef53, (q31_t)0xf5bc7529, (q31_t)0x7f29ea31, (q31_t)0xf5b00e02,
+    (q31_t)0x7f27e29f, (q31_t)0xf5a3a740, (q31_t)0x7f25d89e, (q31_t)0xf59740e5,
+    (q31_t)0x7f23cc2e, (q31_t)0xf58adaf0, (q31_t)0x7f21bd4e, (q31_t)0xf57e7563,
+    (q31_t)0x7f1fabff, (q31_t)0xf572103d, (q31_t)0x7f1d9842, (q31_t)0xf565ab80,
+    (q31_t)0x7f1b8215, (q31_t)0xf559472b, (q31_t)0x7f19697a, (q31_t)0xf54ce33f,
+    (q31_t)0x7f174e70, (q31_t)0xf5407fbd, (q31_t)0x7f1530f7, (q31_t)0xf5341ca5,
+    (q31_t)0x7f13110f, (q31_t)0xf527b9f7, (q31_t)0x7f10eeb9, (q31_t)0xf51b57b5,
+    (q31_t)0x7f0ec9f5, (q31_t)0xf50ef5de, (q31_t)0x7f0ca2c2, (q31_t)0xf5029473,
+    (q31_t)0x7f0a7921, (q31_t)0xf4f63374, (q31_t)0x7f084d12, (q31_t)0xf4e9d2e3,
+    (q31_t)0x7f061e95, (q31_t)0xf4dd72be, (q31_t)0x7f03eda9, (q31_t)0xf4d11308,
+    (q31_t)0x7f01ba50, (q31_t)0xf4c4b3c0, (q31_t)0x7eff8489, (q31_t)0xf4b854e7,
+    (q31_t)0x7efd4c54, (q31_t)0xf4abf67e, (q31_t)0x7efb11b1, (q31_t)0xf49f9884,
+    (q31_t)0x7ef8d4a1, (q31_t)0xf4933afa, (q31_t)0x7ef69523, (q31_t)0xf486dde1,
+    (q31_t)0x7ef45338, (q31_t)0xf47a8139, (q31_t)0x7ef20ee0, (q31_t)0xf46e2504,
+    (q31_t)0x7eefc81a, (q31_t)0xf461c940, (q31_t)0x7eed7ee7, (q31_t)0xf4556def,
+    (q31_t)0x7eeb3347, (q31_t)0xf4491311, (q31_t)0x7ee8e53a, (q31_t)0xf43cb8a7,
+    (q31_t)0x7ee694c1, (q31_t)0xf4305eb0, (q31_t)0x7ee441da, (q31_t)0xf424052f,
+    (q31_t)0x7ee1ec87, (q31_t)0xf417ac22, (q31_t)0x7edf94c7, (q31_t)0xf40b538b,
+    (q31_t)0x7edd3a9a, (q31_t)0xf3fefb6a, (q31_t)0x7edade01, (q31_t)0xf3f2a3bf,
+    (q31_t)0x7ed87efc, (q31_t)0xf3e64c8c, (q31_t)0x7ed61d8a, (q31_t)0xf3d9f5cf,
+    (q31_t)0x7ed3b9ad, (q31_t)0xf3cd9f8b, (q31_t)0x7ed15363, (q31_t)0xf3c149bf,
+    (q31_t)0x7eceeaad, (q31_t)0xf3b4f46c, (q31_t)0x7ecc7f8b, (q31_t)0xf3a89f92,
+    (q31_t)0x7eca11fe, (q31_t)0xf39c4b32, (q31_t)0x7ec7a205, (q31_t)0xf38ff74d,
+    (q31_t)0x7ec52fa0, (q31_t)0xf383a3e2, (q31_t)0x7ec2bad0, (q31_t)0xf37750f2,
+    (q31_t)0x7ec04394, (q31_t)0xf36afe7e, (q31_t)0x7ebdc9ed, (q31_t)0xf35eac86,
+    (q31_t)0x7ebb4ddb, (q31_t)0xf3525b0b, (q31_t)0x7eb8cf5d, (q31_t)0xf3460a0d,
+    (q31_t)0x7eb64e75, (q31_t)0xf339b98d, (q31_t)0x7eb3cb21, (q31_t)0xf32d698a,
+    (q31_t)0x7eb14563, (q31_t)0xf3211a07, (q31_t)0x7eaebd3a, (q31_t)0xf314cb02,
+    (q31_t)0x7eac32a6, (q31_t)0xf3087c7d, (q31_t)0x7ea9a5a8, (q31_t)0xf2fc2e77,
+    (q31_t)0x7ea7163f, (q31_t)0xf2efe0f2, (q31_t)0x7ea4846c, (q31_t)0xf2e393ef,
+    (q31_t)0x7ea1f02f, (q31_t)0xf2d7476c, (q31_t)0x7e9f5988, (q31_t)0xf2cafb6b,
+    (q31_t)0x7e9cc076, (q31_t)0xf2beafed, (q31_t)0x7e9a24fb, (q31_t)0xf2b264f2,
+    (q31_t)0x7e978715, (q31_t)0xf2a61a7a, (q31_t)0x7e94e6c6, (q31_t)0xf299d085,
+    (q31_t)0x7e92440d, (q31_t)0xf28d8715, (q31_t)0x7e8f9eeb, (q31_t)0xf2813e2a,
+    (q31_t)0x7e8cf75f, (q31_t)0xf274f5c3, (q31_t)0x7e8a4d6a, (q31_t)0xf268ade3,
+    (q31_t)0x7e87a10c, (q31_t)0xf25c6688, (q31_t)0x7e84f245, (q31_t)0xf2501fb5,
+    (q31_t)0x7e824114, (q31_t)0xf243d968, (q31_t)0x7e7f8d7b, (q31_t)0xf23793a3,
+    (q31_t)0x7e7cd778, (q31_t)0xf22b4e66, (q31_t)0x7e7a1f0d, (q31_t)0xf21f09b1,
+    (q31_t)0x7e77643a, (q31_t)0xf212c585, (q31_t)0x7e74a6fd, (q31_t)0xf20681e3,
+    (q31_t)0x7e71e759, (q31_t)0xf1fa3ecb, (q31_t)0x7e6f254c, (q31_t)0xf1edfc3d,
+    (q31_t)0x7e6c60d7, (q31_t)0xf1e1ba3a, (q31_t)0x7e6999fa, (q31_t)0xf1d578c2,
+    (q31_t)0x7e66d0b4, (q31_t)0xf1c937d6, (q31_t)0x7e640507, (q31_t)0xf1bcf777,
+    (q31_t)0x7e6136f3, (q31_t)0xf1b0b7a4, (q31_t)0x7e5e6676, (q31_t)0xf1a4785e,
+    (q31_t)0x7e5b9392, (q31_t)0xf19839a6, (q31_t)0x7e58be47, (q31_t)0xf18bfb7d,
+    (q31_t)0x7e55e694, (q31_t)0xf17fbde2, (q31_t)0x7e530c7a, (q31_t)0xf17380d6,
+    (q31_t)0x7e502ff9, (q31_t)0xf1674459, (q31_t)0x7e4d5110, (q31_t)0xf15b086d,
+    (q31_t)0x7e4a6fc1, (q31_t)0xf14ecd11, (q31_t)0x7e478c0b, (q31_t)0xf1429247,
+    (q31_t)0x7e44a5ef, (q31_t)0xf136580d, (q31_t)0x7e41bd6c, (q31_t)0xf12a1e66,
+    (q31_t)0x7e3ed282, (q31_t)0xf11de551, (q31_t)0x7e3be532, (q31_t)0xf111accf,
+    (q31_t)0x7e38f57c, (q31_t)0xf10574e0, (q31_t)0x7e360360, (q31_t)0xf0f93d86,
+    (q31_t)0x7e330ede, (q31_t)0xf0ed06bf, (q31_t)0x7e3017f6, (q31_t)0xf0e0d08d,
+    (q31_t)0x7e2d1ea8, (q31_t)0xf0d49af1, (q31_t)0x7e2a22f4, (q31_t)0xf0c865ea,
+    (q31_t)0x7e2724db, (q31_t)0xf0bc317a, (q31_t)0x7e24245d, (q31_t)0xf0affda0,
+    (q31_t)0x7e212179, (q31_t)0xf0a3ca5d, (q31_t)0x7e1e1c30, (q31_t)0xf09797b2,
+    (q31_t)0x7e1b1482, (q31_t)0xf08b659f, (q31_t)0x7e180a6f, (q31_t)0xf07f3424,
+    (q31_t)0x7e14fdf7, (q31_t)0xf0730342, (q31_t)0x7e11ef1b, (q31_t)0xf066d2fa,
+    (q31_t)0x7e0eddd9, (q31_t)0xf05aa34c, (q31_t)0x7e0bca34, (q31_t)0xf04e7438,
+    (q31_t)0x7e08b42a, (q31_t)0xf04245c0, (q31_t)0x7e059bbb, (q31_t)0xf03617e2,
+    (q31_t)0x7e0280e9, (q31_t)0xf029eaa1, (q31_t)0x7dff63b2, (q31_t)0xf01dbdfb,
+    (q31_t)0x7dfc4418, (q31_t)0xf01191f3, (q31_t)0x7df9221a, (q31_t)0xf0056687,
+    (q31_t)0x7df5fdb8, (q31_t)0xeff93bba, (q31_t)0x7df2d6f3, (q31_t)0xefed118a,
+    (q31_t)0x7defadca, (q31_t)0xefe0e7f9, (q31_t)0x7dec823e, (q31_t)0xefd4bf08,
+    (q31_t)0x7de9544f, (q31_t)0xefc896b5, (q31_t)0x7de623fd, (q31_t)0xefbc6f03,
+    (q31_t)0x7de2f148, (q31_t)0xefb047f2, (q31_t)0x7ddfbc30, (q31_t)0xefa42181,
+    (q31_t)0x7ddc84b5, (q31_t)0xef97fbb2, (q31_t)0x7dd94ad8, (q31_t)0xef8bd685,
+    (q31_t)0x7dd60e99, (q31_t)0xef7fb1fa, (q31_t)0x7dd2cff7, (q31_t)0xef738e12,
+    (q31_t)0x7dcf8ef3, (q31_t)0xef676ace, (q31_t)0x7dcc4b8d, (q31_t)0xef5b482d,
+    (q31_t)0x7dc905c5, (q31_t)0xef4f2630, (q31_t)0x7dc5bd9b, (q31_t)0xef4304d8,
+    (q31_t)0x7dc2730f, (q31_t)0xef36e426, (q31_t)0x7dbf2622, (q31_t)0xef2ac419,
+    (q31_t)0x7dbbd6d4, (q31_t)0xef1ea4b2, (q31_t)0x7db88524, (q31_t)0xef1285f2,
+    (q31_t)0x7db53113, (q31_t)0xef0667d9, (q31_t)0x7db1daa2, (q31_t)0xeefa4a67,
+    (q31_t)0x7dae81cf, (q31_t)0xeeee2d9d, (q31_t)0x7dab269b, (q31_t)0xeee2117c,
+    (q31_t)0x7da7c907, (q31_t)0xeed5f604, (q31_t)0x7da46912, (q31_t)0xeec9db35,
+    (q31_t)0x7da106bd, (q31_t)0xeebdc110, (q31_t)0x7d9da208, (q31_t)0xeeb1a796,
+    (q31_t)0x7d9a3af2, (q31_t)0xeea58ec6, (q31_t)0x7d96d17d, (q31_t)0xee9976a1,
+    (q31_t)0x7d9365a8, (q31_t)0xee8d5f29, (q31_t)0x7d8ff772, (q31_t)0xee81485c,
+    (q31_t)0x7d8c86de, (q31_t)0xee75323c, (q31_t)0x7d8913ea, (q31_t)0xee691cc9,
+    (q31_t)0x7d859e96, (q31_t)0xee5d0804, (q31_t)0x7d8226e4, (q31_t)0xee50f3ed,
+    (q31_t)0x7d7eacd2, (q31_t)0xee44e084, (q31_t)0x7d7b3061, (q31_t)0xee38cdcb,
+    (q31_t)0x7d77b192, (q31_t)0xee2cbbc1, (q31_t)0x7d743064, (q31_t)0xee20aa67,
+    (q31_t)0x7d70acd7, (q31_t)0xee1499bd, (q31_t)0x7d6d26ec, (q31_t)0xee0889c4,
+    (q31_t)0x7d699ea3, (q31_t)0xedfc7a7c, (q31_t)0x7d6613fb, (q31_t)0xedf06be6,
+    (q31_t)0x7d6286f6, (q31_t)0xede45e03, (q31_t)0x7d5ef793, (q31_t)0xedd850d2,
+    (q31_t)0x7d5b65d2, (q31_t)0xedcc4454, (q31_t)0x7d57d1b3, (q31_t)0xedc0388a,
+    (q31_t)0x7d543b37, (q31_t)0xedb42d74, (q31_t)0x7d50a25e, (q31_t)0xeda82313,
+    (q31_t)0x7d4d0728, (q31_t)0xed9c1967, (q31_t)0x7d496994, (q31_t)0xed901070,
+    (q31_t)0x7d45c9a4, (q31_t)0xed84082f, (q31_t)0x7d422757, (q31_t)0xed7800a5,
+    (q31_t)0x7d3e82ae, (q31_t)0xed6bf9d1, (q31_t)0x7d3adba7, (q31_t)0xed5ff3b5,
+    (q31_t)0x7d373245, (q31_t)0xed53ee51, (q31_t)0x7d338687, (q31_t)0xed47e9a5,
+    (q31_t)0x7d2fd86c, (q31_t)0xed3be5b1, (q31_t)0x7d2c27f6, (q31_t)0xed2fe277,
+    (q31_t)0x7d287523, (q31_t)0xed23dff7, (q31_t)0x7d24bff6, (q31_t)0xed17de31,
+    (q31_t)0x7d21086c, (q31_t)0xed0bdd25, (q31_t)0x7d1d4e88, (q31_t)0xecffdcd4,
+    (q31_t)0x7d199248, (q31_t)0xecf3dd3f, (q31_t)0x7d15d3ad, (q31_t)0xece7de66,
+    (q31_t)0x7d1212b7, (q31_t)0xecdbe04a, (q31_t)0x7d0e4f67, (q31_t)0xeccfe2ea,
+    (q31_t)0x7d0a89bc, (q31_t)0xecc3e648, (q31_t)0x7d06c1b6, (q31_t)0xecb7ea63,
+    (q31_t)0x7d02f757, (q31_t)0xecabef3d, (q31_t)0x7cff2a9d, (q31_t)0xec9ff4d6,
+    (q31_t)0x7cfb5b89, (q31_t)0xec93fb2e, (q31_t)0x7cf78a1b, (q31_t)0xec880245,
+    (q31_t)0x7cf3b653, (q31_t)0xec7c0a1d, (q31_t)0x7cefe032, (q31_t)0xec7012b5,
+    (q31_t)0x7cec07b8, (q31_t)0xec641c0e, (q31_t)0x7ce82ce4, (q31_t)0xec582629,
+    (q31_t)0x7ce44fb7, (q31_t)0xec4c3106, (q31_t)0x7ce07031, (q31_t)0xec403ca5,
+    (q31_t)0x7cdc8e52, (q31_t)0xec344908, (q31_t)0x7cd8aa1b, (q31_t)0xec28562d,
+    (q31_t)0x7cd4c38b, (q31_t)0xec1c6417, (q31_t)0x7cd0daa2, (q31_t)0xec1072c4,
+    (q31_t)0x7cccef62, (q31_t)0xec048237, (q31_t)0x7cc901c9, (q31_t)0xebf8926f,
+    (q31_t)0x7cc511d9, (q31_t)0xebeca36c, (q31_t)0x7cc11f90, (q31_t)0xebe0b52f,
+    (q31_t)0x7cbd2af0, (q31_t)0xebd4c7ba, (q31_t)0x7cb933f9, (q31_t)0xebc8db0b,
+    (q31_t)0x7cb53aaa, (q31_t)0xebbcef23, (q31_t)0x7cb13f04, (q31_t)0xebb10404,
+    (q31_t)0x7cad4107, (q31_t)0xeba519ad, (q31_t)0x7ca940b3, (q31_t)0xeb99301f,
+    (q31_t)0x7ca53e09, (q31_t)0xeb8d475b, (q31_t)0x7ca13908, (q31_t)0xeb815f60,
+    (q31_t)0x7c9d31b0, (q31_t)0xeb75782f, (q31_t)0x7c992803, (q31_t)0xeb6991ca,
+    (q31_t)0x7c951bff, (q31_t)0xeb5dac2f, (q31_t)0x7c910da5, (q31_t)0xeb51c760,
+    (q31_t)0x7c8cfcf6, (q31_t)0xeb45e35d, (q31_t)0x7c88e9f1, (q31_t)0xeb3a0027,
+    (q31_t)0x7c84d496, (q31_t)0xeb2e1dbe, (q31_t)0x7c80bce7, (q31_t)0xeb223c22,
+    (q31_t)0x7c7ca2e2, (q31_t)0xeb165b54, (q31_t)0x7c788688, (q31_t)0xeb0a7b54,
+    (q31_t)0x7c7467d9, (q31_t)0xeafe9c24, (q31_t)0x7c7046d6, (q31_t)0xeaf2bdc3,
+    (q31_t)0x7c6c237e, (q31_t)0xeae6e031, (q31_t)0x7c67fdd1, (q31_t)0xeadb0370,
+    (q31_t)0x7c63d5d1, (q31_t)0xeacf277f, (q31_t)0x7c5fab7c, (q31_t)0xeac34c60,
+    (q31_t)0x7c5b7ed4, (q31_t)0xeab77212, (q31_t)0x7c574fd8, (q31_t)0xeaab9896,
+    (q31_t)0x7c531e88, (q31_t)0xea9fbfed, (q31_t)0x7c4eeae5, (q31_t)0xea93e817,
+    (q31_t)0x7c4ab4ef, (q31_t)0xea881114, (q31_t)0x7c467ca6, (q31_t)0xea7c3ae5,
+    (q31_t)0x7c42420a, (q31_t)0xea70658a, (q31_t)0x7c3e051b, (q31_t)0xea649105,
+    (q31_t)0x7c39c5da, (q31_t)0xea58bd54, (q31_t)0x7c358446, (q31_t)0xea4cea79,
+    (q31_t)0x7c314060, (q31_t)0xea411874, (q31_t)0x7c2cfa28, (q31_t)0xea354746,
+    (q31_t)0x7c28b19e, (q31_t)0xea2976ef, (q31_t)0x7c2466c2, (q31_t)0xea1da770,
+    (q31_t)0x7c201994, (q31_t)0xea11d8c8, (q31_t)0x7c1bca16, (q31_t)0xea060af9,
+    (q31_t)0x7c177845, (q31_t)0xe9fa3e03, (q31_t)0x7c132424, (q31_t)0xe9ee71e6,
+    (q31_t)0x7c0ecdb2, (q31_t)0xe9e2a6a3, (q31_t)0x7c0a74f0, (q31_t)0xe9d6dc3b,
+    (q31_t)0x7c0619dc, (q31_t)0xe9cb12ad, (q31_t)0x7c01bc78, (q31_t)0xe9bf49fa,
+    (q31_t)0x7bfd5cc4, (q31_t)0xe9b38223, (q31_t)0x7bf8fac0, (q31_t)0xe9a7bb28,
+    (q31_t)0x7bf4966c, (q31_t)0xe99bf509, (q31_t)0x7bf02fc9, (q31_t)0xe9902fc7,
+    (q31_t)0x7bebc6d5, (q31_t)0xe9846b63, (q31_t)0x7be75b93, (q31_t)0xe978a7dd,
+    (q31_t)0x7be2ee01, (q31_t)0xe96ce535, (q31_t)0x7bde7e20, (q31_t)0xe961236c,
+    (q31_t)0x7bda0bf0, (q31_t)0xe9556282, (q31_t)0x7bd59771, (q31_t)0xe949a278,
+    (q31_t)0x7bd120a4, (q31_t)0xe93de34e, (q31_t)0x7bcca789, (q31_t)0xe9322505,
+    (q31_t)0x7bc82c1f, (q31_t)0xe926679c, (q31_t)0x7bc3ae67, (q31_t)0xe91aab16,
+    (q31_t)0x7bbf2e62, (q31_t)0xe90eef71, (q31_t)0x7bbaac0e, (q31_t)0xe90334af,
+    (q31_t)0x7bb6276e, (q31_t)0xe8f77acf, (q31_t)0x7bb1a080, (q31_t)0xe8ebc1d3,
+    (q31_t)0x7bad1744, (q31_t)0xe8e009ba, (q31_t)0x7ba88bbc, (q31_t)0xe8d45286,
+    (q31_t)0x7ba3fde7, (q31_t)0xe8c89c37, (q31_t)0x7b9f6dc5, (q31_t)0xe8bce6cd,
+    (q31_t)0x7b9adb57, (q31_t)0xe8b13248, (q31_t)0x7b96469d, (q31_t)0xe8a57ea9,
+    (q31_t)0x7b91af97, (q31_t)0xe899cbf1, (q31_t)0x7b8d1644, (q31_t)0xe88e1a20,
+    (q31_t)0x7b887aa6, (q31_t)0xe8826936, (q31_t)0x7b83dcbc, (q31_t)0xe876b934,
+    (q31_t)0x7b7f3c87, (q31_t)0xe86b0a1a, (q31_t)0x7b7a9a07, (q31_t)0xe85f5be9,
+    (q31_t)0x7b75f53c, (q31_t)0xe853aea1, (q31_t)0x7b714e25, (q31_t)0xe8480243,
+    (q31_t)0x7b6ca4c4, (q31_t)0xe83c56cf, (q31_t)0x7b67f919, (q31_t)0xe830ac45,
+    (q31_t)0x7b634b23, (q31_t)0xe82502a7, (q31_t)0x7b5e9ae4, (q31_t)0xe81959f4,
+    (q31_t)0x7b59e85a, (q31_t)0xe80db22d, (q31_t)0x7b553386, (q31_t)0xe8020b52,
+    (q31_t)0x7b507c69, (q31_t)0xe7f66564, (q31_t)0x7b4bc303, (q31_t)0xe7eac063,
+    (q31_t)0x7b470753, (q31_t)0xe7df1c50, (q31_t)0x7b42495a, (q31_t)0xe7d3792b,
+    (q31_t)0x7b3d8918, (q31_t)0xe7c7d6f4, (q31_t)0x7b38c68e, (q31_t)0xe7bc35ad,
+    (q31_t)0x7b3401bb, (q31_t)0xe7b09555, (q31_t)0x7b2f3aa0, (q31_t)0xe7a4f5ed,
+    (q31_t)0x7b2a713d, (q31_t)0xe7995776, (q31_t)0x7b25a591, (q31_t)0xe78db9ef,
+    (q31_t)0x7b20d79e, (q31_t)0xe7821d59, (q31_t)0x7b1c0764, (q31_t)0xe77681b6,
+    (q31_t)0x7b1734e2, (q31_t)0xe76ae704, (q31_t)0x7b126019, (q31_t)0xe75f4d45,
+    (q31_t)0x7b0d8909, (q31_t)0xe753b479, (q31_t)0x7b08afb2, (q31_t)0xe7481ca1,
+    (q31_t)0x7b03d414, (q31_t)0xe73c85bc, (q31_t)0x7afef630, (q31_t)0xe730efcc,
+    (q31_t)0x7afa1605, (q31_t)0xe7255ad1, (q31_t)0x7af53395, (q31_t)0xe719c6cb,
+    (q31_t)0x7af04edf, (q31_t)0xe70e33bb, (q31_t)0x7aeb67e3, (q31_t)0xe702a1a1,
+    (q31_t)0x7ae67ea1, (q31_t)0xe6f7107e, (q31_t)0x7ae1931a, (q31_t)0xe6eb8052,
+    (q31_t)0x7adca54e, (q31_t)0xe6dff11d, (q31_t)0x7ad7b53d, (q31_t)0xe6d462e1,
+    (q31_t)0x7ad2c2e8, (q31_t)0xe6c8d59c, (q31_t)0x7acdce4d, (q31_t)0xe6bd4951,
+    (q31_t)0x7ac8d76f, (q31_t)0xe6b1bdff, (q31_t)0x7ac3de4c, (q31_t)0xe6a633a6,
+    (q31_t)0x7abee2e5, (q31_t)0xe69aaa48, (q31_t)0x7ab9e53a, (q31_t)0xe68f21e5,
+    (q31_t)0x7ab4e54c, (q31_t)0xe6839a7c, (q31_t)0x7aafe31b, (q31_t)0xe6781410,
+    (q31_t)0x7aaadea6, (q31_t)0xe66c8e9f, (q31_t)0x7aa5d7ee, (q31_t)0xe6610a2a,
+    (q31_t)0x7aa0cef3, (q31_t)0xe65586b3, (q31_t)0x7a9bc3b6, (q31_t)0xe64a0438,
+    (q31_t)0x7a96b636, (q31_t)0xe63e82bc, (q31_t)0x7a91a674, (q31_t)0xe633023e,
+    (q31_t)0x7a8c9470, (q31_t)0xe62782be, (q31_t)0x7a87802a, (q31_t)0xe61c043d,
+    (q31_t)0x7a8269a3, (q31_t)0xe61086bc, (q31_t)0x7a7d50da, (q31_t)0xe6050a3b,
+    (q31_t)0x7a7835cf, (q31_t)0xe5f98ebb, (q31_t)0x7a731884, (q31_t)0xe5ee143b,
+    (q31_t)0x7a6df8f8, (q31_t)0xe5e29abc, (q31_t)0x7a68d72b, (q31_t)0xe5d72240,
+    (q31_t)0x7a63b31d, (q31_t)0xe5cbaac5, (q31_t)0x7a5e8cd0, (q31_t)0xe5c0344d,
+    (q31_t)0x7a596442, (q31_t)0xe5b4bed8, (q31_t)0x7a543974, (q31_t)0xe5a94a67,
+    (q31_t)0x7a4f0c67, (q31_t)0xe59dd6f9, (q31_t)0x7a49dd1a, (q31_t)0xe5926490,
+    (q31_t)0x7a44ab8e, (q31_t)0xe586f32c, (q31_t)0x7a3f77c3, (q31_t)0xe57b82cd,
+    (q31_t)0x7a3a41b9, (q31_t)0xe5701374, (q31_t)0x7a350970, (q31_t)0xe564a521,
+    (q31_t)0x7a2fcee8, (q31_t)0xe55937d5, (q31_t)0x7a2a9223, (q31_t)0xe54dcb8f,
+    (q31_t)0x7a25531f, (q31_t)0xe5426051, (q31_t)0x7a2011de, (q31_t)0xe536f61b,
+    (q31_t)0x7a1ace5f, (q31_t)0xe52b8cee, (q31_t)0x7a1588a2, (q31_t)0xe52024c9,
+    (q31_t)0x7a1040a8, (q31_t)0xe514bdad, (q31_t)0x7a0af671, (q31_t)0xe509579b,
+    (q31_t)0x7a05a9fd, (q31_t)0xe4fdf294, (q31_t)0x7a005b4d, (q31_t)0xe4f28e96,
+    (q31_t)0x79fb0a60, (q31_t)0xe4e72ba4, (q31_t)0x79f5b737, (q31_t)0xe4dbc9bd,
+    (q31_t)0x79f061d2, (q31_t)0xe4d068e2, (q31_t)0x79eb0a31, (q31_t)0xe4c50914,
+    (q31_t)0x79e5b054, (q31_t)0xe4b9aa52, (q31_t)0x79e0543c, (q31_t)0xe4ae4c9d,
+    (q31_t)0x79daf5e8, (q31_t)0xe4a2eff6, (q31_t)0x79d5955a, (q31_t)0xe497945d,
+    (q31_t)0x79d03291, (q31_t)0xe48c39d3, (q31_t)0x79cacd8d, (q31_t)0xe480e057,
+    (q31_t)0x79c5664f, (q31_t)0xe47587eb, (q31_t)0x79bffcd7, (q31_t)0xe46a308f,
+    (q31_t)0x79ba9125, (q31_t)0xe45eda43, (q31_t)0x79b52339, (q31_t)0xe4538507,
+    (q31_t)0x79afb313, (q31_t)0xe44830dd, (q31_t)0x79aa40b4, (q31_t)0xe43cddc4,
+    (q31_t)0x79a4cc1c, (q31_t)0xe4318bbe, (q31_t)0x799f554b, (q31_t)0xe4263ac9,
+    (q31_t)0x7999dc42, (q31_t)0xe41aeae8, (q31_t)0x799460ff, (q31_t)0xe40f9c1a,
+    (q31_t)0x798ee385, (q31_t)0xe4044e60, (q31_t)0x798963d2, (q31_t)0xe3f901ba,
+    (q31_t)0x7983e1e8, (q31_t)0xe3edb628, (q31_t)0x797e5dc6, (q31_t)0xe3e26bac,
+    (q31_t)0x7978d76c, (q31_t)0xe3d72245, (q31_t)0x79734edc, (q31_t)0xe3cbd9f4,
+    (q31_t)0x796dc414, (q31_t)0xe3c092b9, (q31_t)0x79683715, (q31_t)0xe3b54c95,
+    (q31_t)0x7962a7e0, (q31_t)0xe3aa0788, (q31_t)0x795d1675, (q31_t)0xe39ec393,
+    (q31_t)0x795782d3, (q31_t)0xe39380b6, (q31_t)0x7951ecfc, (q31_t)0xe3883ef2,
+    (q31_t)0x794c54ee, (q31_t)0xe37cfe47, (q31_t)0x7946baac, (q31_t)0xe371beb5,
+    (q31_t)0x79411e33, (q31_t)0xe366803c, (q31_t)0x793b7f86, (q31_t)0xe35b42df,
+    (q31_t)0x7935dea4, (q31_t)0xe350069b, (q31_t)0x79303b8e, (q31_t)0xe344cb73,
+    (q31_t)0x792a9642, (q31_t)0xe3399167, (q31_t)0x7924eec3, (q31_t)0xe32e5876,
+    (q31_t)0x791f4510, (q31_t)0xe32320a2, (q31_t)0x79199929, (q31_t)0xe317e9eb,
+    (q31_t)0x7913eb0e, (q31_t)0xe30cb451, (q31_t)0x790e3ac0, (q31_t)0xe3017fd5,
+    (q31_t)0x7908883f, (q31_t)0xe2f64c77, (q31_t)0x7902d38b, (q31_t)0xe2eb1a37,
+    (q31_t)0x78fd1ca4, (q31_t)0xe2dfe917, (q31_t)0x78f7638b, (q31_t)0xe2d4b916,
+    (q31_t)0x78f1a840, (q31_t)0xe2c98a35, (q31_t)0x78ebeac2, (q31_t)0xe2be5c74,
+    (q31_t)0x78e62b13, (q31_t)0xe2b32fd4, (q31_t)0x78e06932, (q31_t)0xe2a80456,
+    (q31_t)0x78daa520, (q31_t)0xe29cd9f8, (q31_t)0x78d4dedd, (q31_t)0xe291b0bd,
+    (q31_t)0x78cf1669, (q31_t)0xe28688a4, (q31_t)0x78c94bc4, (q31_t)0xe27b61af,
+    (q31_t)0x78c37eef, (q31_t)0xe2703bdc, (q31_t)0x78bdafea, (q31_t)0xe265172e,
+    (q31_t)0x78b7deb4, (q31_t)0xe259f3a3, (q31_t)0x78b20b4f, (q31_t)0xe24ed13d,
+    (q31_t)0x78ac35ba, (q31_t)0xe243affc, (q31_t)0x78a65df6, (q31_t)0xe2388fe1,
+    (q31_t)0x78a08402, (q31_t)0xe22d70eb, (q31_t)0x789aa7e0, (q31_t)0xe222531c,
+    (q31_t)0x7894c98f, (q31_t)0xe2173674, (q31_t)0x788ee910, (q31_t)0xe20c1af3,
+    (q31_t)0x78890663, (q31_t)0xe2010099, (q31_t)0x78832187, (q31_t)0xe1f5e768,
+    (q31_t)0x787d3a7e, (q31_t)0xe1eacf5f, (q31_t)0x78775147, (q31_t)0xe1dfb87f,
+    (q31_t)0x787165e3, (q31_t)0xe1d4a2c8, (q31_t)0x786b7852, (q31_t)0xe1c98e3b,
+    (q31_t)0x78658894, (q31_t)0xe1be7ad8, (q31_t)0x785f96a9, (q31_t)0xe1b368a0,
+    (q31_t)0x7859a292, (q31_t)0xe1a85793, (q31_t)0x7853ac4f, (q31_t)0xe19d47b1,
+    (q31_t)0x784db3e0, (q31_t)0xe19238fb, (q31_t)0x7847b946, (q31_t)0xe1872b72,
+    (q31_t)0x7841bc7f, (q31_t)0xe17c1f15, (q31_t)0x783bbd8e, (q31_t)0xe17113e5,
+    (q31_t)0x7835bc71, (q31_t)0xe16609e3, (q31_t)0x782fb92a, (q31_t)0xe15b0110,
+    (q31_t)0x7829b3b9, (q31_t)0xe14ff96a, (q31_t)0x7823ac1d, (q31_t)0xe144f2f3,
+    (q31_t)0x781da256, (q31_t)0xe139edac, (q31_t)0x78179666, (q31_t)0xe12ee995,
+    (q31_t)0x7811884d, (q31_t)0xe123e6ad, (q31_t)0x780b780a, (q31_t)0xe118e4f6,
+    (q31_t)0x7805659e, (q31_t)0xe10de470, (q31_t)0x77ff5109, (q31_t)0xe102e51c,
+    (q31_t)0x77f93a4b, (q31_t)0xe0f7e6f9, (q31_t)0x77f32165, (q31_t)0xe0ecea09,
+    (q31_t)0x77ed0657, (q31_t)0xe0e1ee4b, (q31_t)0x77e6e921, (q31_t)0xe0d6f3c1,
+    (q31_t)0x77e0c9c3, (q31_t)0xe0cbfa6a, (q31_t)0x77daa83d, (q31_t)0xe0c10247,
+    (q31_t)0x77d48490, (q31_t)0xe0b60b58, (q31_t)0x77ce5ebd, (q31_t)0xe0ab159e,
+    (q31_t)0x77c836c2, (q31_t)0xe0a0211a, (q31_t)0x77c20ca1, (q31_t)0xe0952dcb,
+    (q31_t)0x77bbe05a, (q31_t)0xe08a3bb2, (q31_t)0x77b5b1ec, (q31_t)0xe07f4acf,
+    (q31_t)0x77af8159, (q31_t)0xe0745b24, (q31_t)0x77a94ea0, (q31_t)0xe0696cb0,
+    (q31_t)0x77a319c2, (q31_t)0xe05e7f74, (q31_t)0x779ce2be, (q31_t)0xe053936f,
+    (q31_t)0x7796a996, (q31_t)0xe048a8a4, (q31_t)0x77906e49, (q31_t)0xe03dbf11,
+    (q31_t)0x778a30d8, (q31_t)0xe032d6b8, (q31_t)0x7783f143, (q31_t)0xe027ef99,
+    (q31_t)0x777daf89, (q31_t)0xe01d09b4, (q31_t)0x77776bac, (q31_t)0xe012250a,
+    (q31_t)0x777125ac, (q31_t)0xe007419b, (q31_t)0x776add88, (q31_t)0xdffc5f67,
+    (q31_t)0x77649341, (q31_t)0xdff17e70, (q31_t)0x775e46d8, (q31_t)0xdfe69eb4,
+    (q31_t)0x7757f84c, (q31_t)0xdfdbc036, (q31_t)0x7751a79e, (q31_t)0xdfd0e2f5,
+    (q31_t)0x774b54ce, (q31_t)0xdfc606f1, (q31_t)0x7744ffdd, (q31_t)0xdfbb2c2c,
+    (q31_t)0x773ea8ca, (q31_t)0xdfb052a5, (q31_t)0x77384f95, (q31_t)0xdfa57a5d,
+    (q31_t)0x7731f440, (q31_t)0xdf9aa354, (q31_t)0x772b96ca, (q31_t)0xdf8fcd8b,
+    (q31_t)0x77253733, (q31_t)0xdf84f902, (q31_t)0x771ed57c, (q31_t)0xdf7a25ba,
+    (q31_t)0x771871a5, (q31_t)0xdf6f53b3, (q31_t)0x77120bae, (q31_t)0xdf6482ed,
+    (q31_t)0x770ba398, (q31_t)0xdf59b369, (q31_t)0x77053962, (q31_t)0xdf4ee527,
+    (q31_t)0x76fecd0e, (q31_t)0xdf441828, (q31_t)0x76f85e9a, (q31_t)0xdf394c6b,
+    (q31_t)0x76f1ee09, (q31_t)0xdf2e81f3, (q31_t)0x76eb7b58, (q31_t)0xdf23b8be,
+    (q31_t)0x76e5068a, (q31_t)0xdf18f0ce, (q31_t)0x76de8f9e, (q31_t)0xdf0e2a22,
+    (q31_t)0x76d81695, (q31_t)0xdf0364bc, (q31_t)0x76d19b6e, (q31_t)0xdef8a09b,
+    (q31_t)0x76cb1e2a, (q31_t)0xdeedddc0, (q31_t)0x76c49ec9, (q31_t)0xdee31c2b,
+    (q31_t)0x76be1d4c, (q31_t)0xded85bdd, (q31_t)0x76b799b3, (q31_t)0xdecd9cd7,
+    (q31_t)0x76b113fd, (q31_t)0xdec2df18, (q31_t)0x76aa8c2c, (q31_t)0xdeb822a1,
+    (q31_t)0x76a4023f, (q31_t)0xdead6773, (q31_t)0x769d7637, (q31_t)0xdea2ad8d,
+    (q31_t)0x7696e814, (q31_t)0xde97f4f1, (q31_t)0x769057d6, (q31_t)0xde8d3d9e,
+    (q31_t)0x7689c57d, (q31_t)0xde828796, (q31_t)0x7683310b, (q31_t)0xde77d2d8,
+    (q31_t)0x767c9a7e, (q31_t)0xde6d1f65, (q31_t)0x767601d7, (q31_t)0xde626d3e,
+    (q31_t)0x766f6717, (q31_t)0xde57bc62, (q31_t)0x7668ca3e, (q31_t)0xde4d0cd2,
+    (q31_t)0x76622b4c, (q31_t)0xde425e8f, (q31_t)0x765b8a41, (q31_t)0xde37b199,
+    (q31_t)0x7654e71d, (q31_t)0xde2d05f1, (q31_t)0x764e41e2, (q31_t)0xde225b96,
+    (q31_t)0x76479a8e, (q31_t)0xde17b28a, (q31_t)0x7640f123, (q31_t)0xde0d0acc,
+    (q31_t)0x763a45a0, (q31_t)0xde02645d, (q31_t)0x76339806, (q31_t)0xddf7bf3e,
+    (q31_t)0x762ce855, (q31_t)0xdded1b6e, (q31_t)0x7626368d, (q31_t)0xdde278ef,
+    (q31_t)0x761f82af, (q31_t)0xddd7d7c1, (q31_t)0x7618ccba, (q31_t)0xddcd37e4,
+    (q31_t)0x761214b0, (q31_t)0xddc29958, (q31_t)0x760b5a90, (q31_t)0xddb7fc1e,
+    (q31_t)0x76049e5b, (q31_t)0xddad6036, (q31_t)0x75fde011, (q31_t)0xdda2c5a2,
+    (q31_t)0x75f71fb1, (q31_t)0xdd982c60, (q31_t)0x75f05d3d, (q31_t)0xdd8d9472,
+    (q31_t)0x75e998b5, (q31_t)0xdd82fdd8, (q31_t)0x75e2d219, (q31_t)0xdd786892,
+    (q31_t)0x75dc0968, (q31_t)0xdd6dd4a2, (q31_t)0x75d53ea5, (q31_t)0xdd634206,
+    (q31_t)0x75ce71ce, (q31_t)0xdd58b0c0, (q31_t)0x75c7a2e3, (q31_t)0xdd4e20d0,
+    (q31_t)0x75c0d1e7, (q31_t)0xdd439236, (q31_t)0x75b9fed7, (q31_t)0xdd3904f4,
+    (q31_t)0x75b329b5, (q31_t)0xdd2e7908, (q31_t)0x75ac5282, (q31_t)0xdd23ee74,
+    (q31_t)0x75a5793c, (q31_t)0xdd196538, (q31_t)0x759e9de5, (q31_t)0xdd0edd55,
+    (q31_t)0x7597c07d, (q31_t)0xdd0456ca, (q31_t)0x7590e104, (q31_t)0xdcf9d199,
+    (q31_t)0x7589ff7a, (q31_t)0xdcef4dc2, (q31_t)0x75831be0, (q31_t)0xdce4cb44,
+    (q31_t)0x757c3636, (q31_t)0xdcda4a21, (q31_t)0x75754e7c, (q31_t)0xdccfca59,
+    (q31_t)0x756e64b2, (q31_t)0xdcc54bec, (q31_t)0x756778d9, (q31_t)0xdcbacedb,
+    (q31_t)0x75608af1, (q31_t)0xdcb05326, (q31_t)0x75599afa, (q31_t)0xdca5d8cd,
+    (q31_t)0x7552a8f4, (q31_t)0xdc9b5fd2, (q31_t)0x754bb4e1, (q31_t)0xdc90e834,
+    (q31_t)0x7544bebf, (q31_t)0xdc8671f3, (q31_t)0x753dc68f, (q31_t)0xdc7bfd11,
+    (q31_t)0x7536cc52, (q31_t)0xdc71898d, (q31_t)0x752fd008, (q31_t)0xdc671768,
+    (q31_t)0x7528d1b1, (q31_t)0xdc5ca6a2, (q31_t)0x7521d14d, (q31_t)0xdc52373c,
+    (q31_t)0x751acedd, (q31_t)0xdc47c936, (q31_t)0x7513ca60, (q31_t)0xdc3d5c91,
+    (q31_t)0x750cc3d8, (q31_t)0xdc32f14d, (q31_t)0x7505bb44, (q31_t)0xdc28876a,
+    (q31_t)0x74feb0a5, (q31_t)0xdc1e1ee9, (q31_t)0x74f7a3fb, (q31_t)0xdc13b7c9,
+    (q31_t)0x74f09546, (q31_t)0xdc09520d, (q31_t)0x74e98487, (q31_t)0xdbfeedb3,
+    (q31_t)0x74e271bd, (q31_t)0xdbf48abd, (q31_t)0x74db5cea, (q31_t)0xdbea292b,
+    (q31_t)0x74d4460c, (q31_t)0xdbdfc8fc, (q31_t)0x74cd2d26, (q31_t)0xdbd56a32,
+    (q31_t)0x74c61236, (q31_t)0xdbcb0cce, (q31_t)0x74bef53d, (q31_t)0xdbc0b0ce,
+    (q31_t)0x74b7d63c, (q31_t)0xdbb65634, (q31_t)0x74b0b533, (q31_t)0xdbabfd01,
+    (q31_t)0x74a99221, (q31_t)0xdba1a534, (q31_t)0x74a26d08, (q31_t)0xdb974ece,
+    (q31_t)0x749b45e7, (q31_t)0xdb8cf9cf, (q31_t)0x74941cbf, (q31_t)0xdb82a638,
+    (q31_t)0x748cf190, (q31_t)0xdb785409, (q31_t)0x7485c45b, (q31_t)0xdb6e0342,
+    (q31_t)0x747e951f, (q31_t)0xdb63b3e5, (q31_t)0x747763dd, (q31_t)0xdb5965f1,
+    (q31_t)0x74703095, (q31_t)0xdb4f1967, (q31_t)0x7468fb47, (q31_t)0xdb44ce46,
+    (q31_t)0x7461c3f5, (q31_t)0xdb3a8491, (q31_t)0x745a8a9d, (q31_t)0xdb303c46,
+    (q31_t)0x74534f41, (q31_t)0xdb25f566, (q31_t)0x744c11e0, (q31_t)0xdb1baff2,
+    (q31_t)0x7444d27b, (q31_t)0xdb116beb, (q31_t)0x743d9112, (q31_t)0xdb072950,
+    (q31_t)0x74364da6, (q31_t)0xdafce821, (q31_t)0x742f0836, (q31_t)0xdaf2a860,
+    (q31_t)0x7427c0c3, (q31_t)0xdae86a0d, (q31_t)0x7420774d, (q31_t)0xdade2d28,
+    (q31_t)0x74192bd5, (q31_t)0xdad3f1b1, (q31_t)0x7411de5b, (q31_t)0xdac9b7a9,
+    (q31_t)0x740a8edf, (q31_t)0xdabf7f11, (q31_t)0x74033d61, (q31_t)0xdab547e8,
+    (q31_t)0x73fbe9e2, (q31_t)0xdaab122f, (q31_t)0x73f49462, (q31_t)0xdaa0dde7,
+    (q31_t)0x73ed3ce1, (q31_t)0xda96ab0f, (q31_t)0x73e5e360, (q31_t)0xda8c79a9,
+    (q31_t)0x73de87de, (q31_t)0xda8249b4, (q31_t)0x73d72a5d, (q31_t)0xda781b31,
+    (q31_t)0x73cfcadc, (q31_t)0xda6dee21, (q31_t)0x73c8695b, (q31_t)0xda63c284,
+    (q31_t)0x73c105db, (q31_t)0xda599859, (q31_t)0x73b9a05d, (q31_t)0xda4f6fa3,
+    (q31_t)0x73b238e0, (q31_t)0xda454860, (q31_t)0x73aacf65, (q31_t)0xda3b2292,
+    (q31_t)0x73a363ec, (q31_t)0xda30fe38, (q31_t)0x739bf675, (q31_t)0xda26db54,
+    (q31_t)0x73948701, (q31_t)0xda1cb9e5, (q31_t)0x738d1590, (q31_t)0xda1299ec,
+    (q31_t)0x7385a222, (q31_t)0xda087b69, (q31_t)0x737e2cb7, (q31_t)0xd9fe5e5e,
+    (q31_t)0x7376b551, (q31_t)0xd9f442c9, (q31_t)0x736f3bee, (q31_t)0xd9ea28ac,
+    (q31_t)0x7367c090, (q31_t)0xd9e01006, (q31_t)0x73604336, (q31_t)0xd9d5f8d9,
+    (q31_t)0x7358c3e2, (q31_t)0xd9cbe325, (q31_t)0x73514292, (q31_t)0xd9c1cee9,
+    (q31_t)0x7349bf48, (q31_t)0xd9b7bc27, (q31_t)0x73423a04, (q31_t)0xd9adaadf,
+    (q31_t)0x733ab2c6, (q31_t)0xd9a39b11, (q31_t)0x7333298f, (q31_t)0xd9998cbe,
+    (q31_t)0x732b9e5e, (q31_t)0xd98f7fe6, (q31_t)0x73241134, (q31_t)0xd9857489,
+    (q31_t)0x731c8211, (q31_t)0xd97b6aa8, (q31_t)0x7314f0f6, (q31_t)0xd9716243,
+    (q31_t)0x730d5de3, (q31_t)0xd9675b5a, (q31_t)0x7305c8d7, (q31_t)0xd95d55ef,
+    (q31_t)0x72fe31d5, (q31_t)0xd9535201, (q31_t)0x72f698db, (q31_t)0xd9494f90,
+    (q31_t)0x72eefdea, (q31_t)0xd93f4e9e, (q31_t)0x72e76102, (q31_t)0xd9354f2a,
+    (q31_t)0x72dfc224, (q31_t)0xd92b5135, (q31_t)0x72d82150, (q31_t)0xd92154bf,
+    (q31_t)0x72d07e85, (q31_t)0xd91759c9, (q31_t)0x72c8d9c6, (q31_t)0xd90d6053,
+    (q31_t)0x72c13311, (q31_t)0xd903685d, (q31_t)0x72b98a67, (q31_t)0xd8f971e8,
+    (q31_t)0x72b1dfc9, (q31_t)0xd8ef7cf4, (q31_t)0x72aa3336, (q31_t)0xd8e58982,
+    (q31_t)0x72a284b0, (q31_t)0xd8db9792, (q31_t)0x729ad435, (q31_t)0xd8d1a724,
+    (q31_t)0x729321c7, (q31_t)0xd8c7b838, (q31_t)0x728b6d66, (q31_t)0xd8bdcad0,
+    (q31_t)0x7283b712, (q31_t)0xd8b3deeb, (q31_t)0x727bfecc, (q31_t)0xd8a9f48a,
+    (q31_t)0x72744493, (q31_t)0xd8a00bae, (q31_t)0x726c8868, (q31_t)0xd8962456,
+    (q31_t)0x7264ca4c, (q31_t)0xd88c3e83, (q31_t)0x725d0a3e, (q31_t)0xd8825a35,
+    (q31_t)0x72554840, (q31_t)0xd878776d, (q31_t)0x724d8450, (q31_t)0xd86e962b,
+    (q31_t)0x7245be70, (q31_t)0xd864b670, (q31_t)0x723df6a0, (q31_t)0xd85ad83c,
+    (q31_t)0x72362ce0, (q31_t)0xd850fb8e, (q31_t)0x722e6130, (q31_t)0xd8472069,
+    (q31_t)0x72269391, (q31_t)0xd83d46cc, (q31_t)0x721ec403, (q31_t)0xd8336eb7,
+    (q31_t)0x7216f287, (q31_t)0xd829982b, (q31_t)0x720f1f1c, (q31_t)0xd81fc328,
+    (q31_t)0x720749c3, (q31_t)0xd815efae, (q31_t)0x71ff727c, (q31_t)0xd80c1dbf,
+    (q31_t)0x71f79948, (q31_t)0xd8024d59, (q31_t)0x71efbe27, (q31_t)0xd7f87e7f,
+    (q31_t)0x71e7e118, (q31_t)0xd7eeb130, (q31_t)0x71e0021e, (q31_t)0xd7e4e56c,
+    (q31_t)0x71d82137, (q31_t)0xd7db1b34, (q31_t)0x71d03e64, (q31_t)0xd7d15288,
+    (q31_t)0x71c859a5, (q31_t)0xd7c78b68, (q31_t)0x71c072fb, (q31_t)0xd7bdc5d6,
+    (q31_t)0x71b88a66, (q31_t)0xd7b401d1, (q31_t)0x71b09fe7, (q31_t)0xd7aa3f5a,
+    (q31_t)0x71a8b37c, (q31_t)0xd7a07e70, (q31_t)0x71a0c528, (q31_t)0xd796bf16,
+    (q31_t)0x7198d4ea, (q31_t)0xd78d014a, (q31_t)0x7190e2c3, (q31_t)0xd783450d,
+    (q31_t)0x7188eeb2, (q31_t)0xd7798a60, (q31_t)0x7180f8b8, (q31_t)0xd76fd143,
+    (q31_t)0x717900d6, (q31_t)0xd76619b6, (q31_t)0x7171070c, (q31_t)0xd75c63ba,
+    (q31_t)0x71690b59, (q31_t)0xd752af4f, (q31_t)0x71610dbf, (q31_t)0xd748fc75,
+    (q31_t)0x71590e3e, (q31_t)0xd73f4b2e, (q31_t)0x71510cd5, (q31_t)0xd7359b78,
+    (q31_t)0x71490986, (q31_t)0xd72bed55, (q31_t)0x71410450, (q31_t)0xd72240c5,
+    (q31_t)0x7138fd35, (q31_t)0xd71895c9, (q31_t)0x7130f433, (q31_t)0xd70eec60,
+    (q31_t)0x7128e94c, (q31_t)0xd705448b, (q31_t)0x7120dc80, (q31_t)0xd6fb9e4b,
+    (q31_t)0x7118cdcf, (q31_t)0xd6f1f99f, (q31_t)0x7110bd39, (q31_t)0xd6e85689,
+    (q31_t)0x7108aabf, (q31_t)0xd6deb508, (q31_t)0x71009661, (q31_t)0xd6d5151d,
+    (q31_t)0x70f8801f, (q31_t)0xd6cb76c9, (q31_t)0x70f067fb, (q31_t)0xd6c1da0b,
+    (q31_t)0x70e84df3, (q31_t)0xd6b83ee4, (q31_t)0x70e03208, (q31_t)0xd6aea555,
+    (q31_t)0x70d8143b, (q31_t)0xd6a50d5d, (q31_t)0x70cff48c, (q31_t)0xd69b76fe,
+    (q31_t)0x70c7d2fb, (q31_t)0xd691e237, (q31_t)0x70bfaf89, (q31_t)0xd6884f09,
+    (q31_t)0x70b78a36, (q31_t)0xd67ebd74, (q31_t)0x70af6302, (q31_t)0xd6752d79,
+    (q31_t)0x70a739ed, (q31_t)0xd66b9f18, (q31_t)0x709f0ef8, (q31_t)0xd6621251,
+    (q31_t)0x7096e223, (q31_t)0xd6588725, (q31_t)0x708eb36f, (q31_t)0xd64efd94,
+    (q31_t)0x708682dc, (q31_t)0xd645759f, (q31_t)0x707e5069, (q31_t)0xd63bef46,
+    (q31_t)0x70761c18, (q31_t)0xd6326a88, (q31_t)0x706de5e9, (q31_t)0xd628e767,
+    (q31_t)0x7065addb, (q31_t)0xd61f65e4, (q31_t)0x705d73f0, (q31_t)0xd615e5fd,
+    (q31_t)0x70553828, (q31_t)0xd60c67b4, (q31_t)0x704cfa83, (q31_t)0xd602eb0a,
+    (q31_t)0x7044bb00, (q31_t)0xd5f96ffd, (q31_t)0x703c79a2, (q31_t)0xd5eff690,
+    (q31_t)0x70343667, (q31_t)0xd5e67ec1, (q31_t)0x702bf151, (q31_t)0xd5dd0892,
+    (q31_t)0x7023aa5f, (q31_t)0xd5d39403, (q31_t)0x701b6193, (q31_t)0xd5ca2115,
+    (q31_t)0x701316eb, (q31_t)0xd5c0afc6, (q31_t)0x700aca69, (q31_t)0xd5b74019,
+    (q31_t)0x70027c0c, (q31_t)0xd5add20d, (q31_t)0x6ffa2bd6, (q31_t)0xd5a465a3,
+    (q31_t)0x6ff1d9c7, (q31_t)0xd59afadb, (q31_t)0x6fe985de, (q31_t)0xd59191b5,
+    (q31_t)0x6fe1301c, (q31_t)0xd5882a32, (q31_t)0x6fd8d882, (q31_t)0xd57ec452,
+    (q31_t)0x6fd07f0f, (q31_t)0xd5756016, (q31_t)0x6fc823c5, (q31_t)0xd56bfd7d,
+    (q31_t)0x6fbfc6a3, (q31_t)0xd5629c89, (q31_t)0x6fb767aa, (q31_t)0xd5593d3a,
+    (q31_t)0x6faf06da, (q31_t)0xd54fdf8f, (q31_t)0x6fa6a433, (q31_t)0xd5468389,
+    (q31_t)0x6f9e3fb6, (q31_t)0xd53d292a, (q31_t)0x6f95d963, (q31_t)0xd533d070,
+    (q31_t)0x6f8d713a, (q31_t)0xd52a795d, (q31_t)0x6f85073c, (q31_t)0xd52123f0,
+    (q31_t)0x6f7c9b69, (q31_t)0xd517d02b, (q31_t)0x6f742dc1, (q31_t)0xd50e7e0d,
+    (q31_t)0x6f6bbe45, (q31_t)0xd5052d97, (q31_t)0x6f634cf5, (q31_t)0xd4fbdec9,
+    (q31_t)0x6f5ad9d1, (q31_t)0xd4f291a4, (q31_t)0x6f5264da, (q31_t)0xd4e94627,
+    (q31_t)0x6f49ee0f, (q31_t)0xd4dffc54, (q31_t)0x6f417573, (q31_t)0xd4d6b42b,
+    (q31_t)0x6f38fb03, (q31_t)0xd4cd6dab, (q31_t)0x6f307ec2, (q31_t)0xd4c428d6,
+    (q31_t)0x6f2800af, (q31_t)0xd4bae5ab, (q31_t)0x6f1f80ca, (q31_t)0xd4b1a42c,
+    (q31_t)0x6f16ff14, (q31_t)0xd4a86458, (q31_t)0x6f0e7b8e, (q31_t)0xd49f2630,
+    (q31_t)0x6f05f637, (q31_t)0xd495e9b3, (q31_t)0x6efd6f10, (q31_t)0xd48caee4,
+    (q31_t)0x6ef4e619, (q31_t)0xd48375c1, (q31_t)0x6eec5b53, (q31_t)0xd47a3e4b,
+    (q31_t)0x6ee3cebe, (q31_t)0xd4710883, (q31_t)0x6edb405a, (q31_t)0xd467d469,
+    (q31_t)0x6ed2b027, (q31_t)0xd45ea1fd, (q31_t)0x6eca1e27, (q31_t)0xd4557140,
+    (q31_t)0x6ec18a58, (q31_t)0xd44c4232, (q31_t)0x6eb8f4bc, (q31_t)0xd44314d3,
+    (q31_t)0x6eb05d53, (q31_t)0xd439e923, (q31_t)0x6ea7c41e, (q31_t)0xd430bf24,
+    (q31_t)0x6e9f291b, (q31_t)0xd42796d5, (q31_t)0x6e968c4d, (q31_t)0xd41e7037,
+    (q31_t)0x6e8dedb3, (q31_t)0xd4154b4a, (q31_t)0x6e854d4d, (q31_t)0xd40c280e,
+    (q31_t)0x6e7cab1c, (q31_t)0xd4030684, (q31_t)0x6e740720, (q31_t)0xd3f9e6ad,
+    (q31_t)0x6e6b615a, (q31_t)0xd3f0c887, (q31_t)0x6e62b9ca, (q31_t)0xd3e7ac15,
+    (q31_t)0x6e5a1070, (q31_t)0xd3de9156, (q31_t)0x6e51654c, (q31_t)0xd3d5784a,
+    (q31_t)0x6e48b860, (q31_t)0xd3cc60f2, (q31_t)0x6e4009aa, (q31_t)0xd3c34b4f,
+    (q31_t)0x6e37592c, (q31_t)0xd3ba3760, (q31_t)0x6e2ea6e6, (q31_t)0xd3b12526,
+    (q31_t)0x6e25f2d8, (q31_t)0xd3a814a2, (q31_t)0x6e1d3d03, (q31_t)0xd39f05d3,
+    (q31_t)0x6e148566, (q31_t)0xd395f8ba, (q31_t)0x6e0bcc03, (q31_t)0xd38ced57,
+    (q31_t)0x6e0310d9, (q31_t)0xd383e3ab, (q31_t)0x6dfa53e9, (q31_t)0xd37adbb6,
+    (q31_t)0x6df19534, (q31_t)0xd371d579, (q31_t)0x6de8d4b8, (q31_t)0xd368d0f3,
+    (q31_t)0x6de01278, (q31_t)0xd35fce26, (q31_t)0x6dd74e73, (q31_t)0xd356cd11,
+    (q31_t)0x6dce88aa, (q31_t)0xd34dcdb4, (q31_t)0x6dc5c11c, (q31_t)0xd344d011,
+    (q31_t)0x6dbcf7cb, (q31_t)0xd33bd427, (q31_t)0x6db42cb6, (q31_t)0xd332d9f7,
+    (q31_t)0x6dab5fdf, (q31_t)0xd329e181, (q31_t)0x6da29144, (q31_t)0xd320eac6,
+    (q31_t)0x6d99c0e7, (q31_t)0xd317f5c6, (q31_t)0x6d90eec8, (q31_t)0xd30f0280,
+    (q31_t)0x6d881ae8, (q31_t)0xd30610f7, (q31_t)0x6d7f4545, (q31_t)0xd2fd2129,
+    (q31_t)0x6d766de2, (q31_t)0xd2f43318, (q31_t)0x6d6d94bf, (q31_t)0xd2eb46c3,
+    (q31_t)0x6d64b9da, (q31_t)0xd2e25c2b, (q31_t)0x6d5bdd36, (q31_t)0xd2d97350,
+    (q31_t)0x6d52fed2, (q31_t)0xd2d08c33, (q31_t)0x6d4a1eaf, (q31_t)0xd2c7a6d4,
+    (q31_t)0x6d413ccd, (q31_t)0xd2bec333, (q31_t)0x6d38592c, (q31_t)0xd2b5e151,
+    (q31_t)0x6d2f73cd, (q31_t)0xd2ad012e, (q31_t)0x6d268cb0, (q31_t)0xd2a422ca,
+    (q31_t)0x6d1da3d5, (q31_t)0xd29b4626, (q31_t)0x6d14b93d, (q31_t)0xd2926b41,
+    (q31_t)0x6d0bcce8, (q31_t)0xd289921e, (q31_t)0x6d02ded7, (q31_t)0xd280babb,
+    (q31_t)0x6cf9ef09, (q31_t)0xd277e518, (q31_t)0x6cf0fd80, (q31_t)0xd26f1138,
+    (q31_t)0x6ce80a3a, (q31_t)0xd2663f19, (q31_t)0x6cdf153a, (q31_t)0xd25d6ebc,
+    (q31_t)0x6cd61e7f, (q31_t)0xd254a021, (q31_t)0x6ccd2609, (q31_t)0xd24bd34a,
+    (q31_t)0x6cc42bd9, (q31_t)0xd2430835, (q31_t)0x6cbb2fef, (q31_t)0xd23a3ee4,
+    (q31_t)0x6cb2324c, (q31_t)0xd2317756, (q31_t)0x6ca932ef, (q31_t)0xd228b18d,
+    (q31_t)0x6ca031da, (q31_t)0xd21fed88, (q31_t)0x6c972f0d, (q31_t)0xd2172b48,
+    (q31_t)0x6c8e2a87, (q31_t)0xd20e6acc, (q31_t)0x6c85244a, (q31_t)0xd205ac17,
+    (q31_t)0x6c7c1c55, (q31_t)0xd1fcef27, (q31_t)0x6c7312a9, (q31_t)0xd1f433fd,
+    (q31_t)0x6c6a0746, (q31_t)0xd1eb7a9a, (q31_t)0x6c60fa2d, (q31_t)0xd1e2c2fd,
+    (q31_t)0x6c57eb5e, (q31_t)0xd1da0d28, (q31_t)0x6c4edada, (q31_t)0xd1d1591a,
+    (q31_t)0x6c45c8a0, (q31_t)0xd1c8a6d4, (q31_t)0x6c3cb4b1, (q31_t)0xd1bff656,
+    (q31_t)0x6c339f0e, (q31_t)0xd1b747a0, (q31_t)0x6c2a87b6, (q31_t)0xd1ae9ab4,
+    (q31_t)0x6c216eaa, (q31_t)0xd1a5ef90, (q31_t)0x6c1853eb, (q31_t)0xd19d4636,
+    (q31_t)0x6c0f3779, (q31_t)0xd1949ea6, (q31_t)0x6c061953, (q31_t)0xd18bf8e0,
+    (q31_t)0x6bfcf97c, (q31_t)0xd18354e4, (q31_t)0x6bf3d7f2, (q31_t)0xd17ab2b3,
+    (q31_t)0x6beab4b6, (q31_t)0xd172124d, (q31_t)0x6be18fc9, (q31_t)0xd16973b3,
+    (q31_t)0x6bd8692b, (q31_t)0xd160d6e5, (q31_t)0x6bcf40dc, (q31_t)0xd1583be2,
+    (q31_t)0x6bc616dd, (q31_t)0xd14fa2ad, (q31_t)0x6bbceb2d, (q31_t)0xd1470b44,
+    (q31_t)0x6bb3bdce, (q31_t)0xd13e75a8, (q31_t)0x6baa8ec0, (q31_t)0xd135e1d9,
+    (q31_t)0x6ba15e03, (q31_t)0xd12d4fd9, (q31_t)0x6b982b97, (q31_t)0xd124bfa6,
+    (q31_t)0x6b8ef77d, (q31_t)0xd11c3142, (q31_t)0x6b85c1b5, (q31_t)0xd113a4ad,
+    (q31_t)0x6b7c8a3f, (q31_t)0xd10b19e7, (q31_t)0x6b73511c, (q31_t)0xd10290f0,
+    (q31_t)0x6b6a164d, (q31_t)0xd0fa09c9, (q31_t)0x6b60d9d0, (q31_t)0xd0f18472,
+    (q31_t)0x6b579ba8, (q31_t)0xd0e900ec, (q31_t)0x6b4e5bd4, (q31_t)0xd0e07f36,
+    (q31_t)0x6b451a55, (q31_t)0xd0d7ff51, (q31_t)0x6b3bd72a, (q31_t)0xd0cf813e,
+    (q31_t)0x6b329255, (q31_t)0xd0c704fd, (q31_t)0x6b294bd5, (q31_t)0xd0be8a8d,
+    (q31_t)0x6b2003ac, (q31_t)0xd0b611f1, (q31_t)0x6b16b9d9, (q31_t)0xd0ad9b26,
+    (q31_t)0x6b0d6e5c, (q31_t)0xd0a5262f, (q31_t)0x6b042137, (q31_t)0xd09cb30b,
+    (q31_t)0x6afad269, (q31_t)0xd09441bb, (q31_t)0x6af181f3, (q31_t)0xd08bd23f,
+    (q31_t)0x6ae82fd5, (q31_t)0xd0836497, (q31_t)0x6adedc10, (q31_t)0xd07af8c4,
+    (q31_t)0x6ad586a3, (q31_t)0xd0728ec6, (q31_t)0x6acc2f90, (q31_t)0xd06a269d,
+    (q31_t)0x6ac2d6d6, (q31_t)0xd061c04a, (q31_t)0x6ab97c77, (q31_t)0xd0595bcd,
+    (q31_t)0x6ab02071, (q31_t)0xd050f926, (q31_t)0x6aa6c2c6, (q31_t)0xd0489856,
+    (q31_t)0x6a9d6377, (q31_t)0xd040395d, (q31_t)0x6a940283, (q31_t)0xd037dc3b,
+    (q31_t)0x6a8a9fea, (q31_t)0xd02f80f1, (q31_t)0x6a813bae, (q31_t)0xd027277e,
+    (q31_t)0x6a77d5ce, (q31_t)0xd01ecfe4, (q31_t)0x6a6e6e4b, (q31_t)0xd0167a22,
+    (q31_t)0x6a650525, (q31_t)0xd00e2639, (q31_t)0x6a5b9a5d, (q31_t)0xd005d42a,
+    (q31_t)0x6a522df3, (q31_t)0xcffd83f4, (q31_t)0x6a48bfe7, (q31_t)0xcff53597,
+    (q31_t)0x6a3f503a, (q31_t)0xcfece915, (q31_t)0x6a35deeb, (q31_t)0xcfe49e6d,
+    (q31_t)0x6a2c6bfd, (q31_t)0xcfdc55a1, (q31_t)0x6a22f76e, (q31_t)0xcfd40eaf,
+    (q31_t)0x6a19813f, (q31_t)0xcfcbc999, (q31_t)0x6a100970, (q31_t)0xcfc3865e,
+    (q31_t)0x6a069003, (q31_t)0xcfbb4500, (q31_t)0x69fd14f6, (q31_t)0xcfb3057d,
+    (q31_t)0x69f3984c, (q31_t)0xcfaac7d8, (q31_t)0x69ea1a03, (q31_t)0xcfa28c10,
+    (q31_t)0x69e09a1c, (q31_t)0xcf9a5225, (q31_t)0x69d71899, (q31_t)0xcf921a17,
+    (q31_t)0x69cd9578, (q31_t)0xcf89e3e8, (q31_t)0x69c410ba, (q31_t)0xcf81af97,
+    (q31_t)0x69ba8a61, (q31_t)0xcf797d24, (q31_t)0x69b1026c, (q31_t)0xcf714c91,
+    (q31_t)0x69a778db, (q31_t)0xcf691ddd, (q31_t)0x699dedaf, (q31_t)0xcf60f108,
+    (q31_t)0x699460e8, (q31_t)0xcf58c613, (q31_t)0x698ad287, (q31_t)0xcf509cfe,
+    (q31_t)0x6981428c, (q31_t)0xcf4875ca, (q31_t)0x6977b0f7, (q31_t)0xcf405077,
+    (q31_t)0x696e1dc9, (q31_t)0xcf382d05, (q31_t)0x69648902, (q31_t)0xcf300b74,
+    (q31_t)0x695af2a3, (q31_t)0xcf27ebc5, (q31_t)0x69515aab, (q31_t)0xcf1fcdf8,
+    (q31_t)0x6947c11c, (q31_t)0xcf17b20d, (q31_t)0x693e25f5, (q31_t)0xcf0f9805,
+    (q31_t)0x69348937, (q31_t)0xcf077fe1, (q31_t)0x692aeae3, (q31_t)0xceff699f,
+    (q31_t)0x69214af8, (q31_t)0xcef75541, (q31_t)0x6917a977, (q31_t)0xceef42c7,
+    (q31_t)0x690e0661, (q31_t)0xcee73231, (q31_t)0x690461b5, (q31_t)0xcedf2380,
+    (q31_t)0x68fabb75, (q31_t)0xced716b4, (q31_t)0x68f113a0, (q31_t)0xcecf0bcd,
+    (q31_t)0x68e76a37, (q31_t)0xcec702cb, (q31_t)0x68ddbf3b, (q31_t)0xcebefbb0,
+    (q31_t)0x68d412ab, (q31_t)0xceb6f67a, (q31_t)0x68ca6488, (q31_t)0xceaef32b,
+    (q31_t)0x68c0b4d2, (q31_t)0xcea6f1c2, (q31_t)0x68b7038b, (q31_t)0xce9ef241,
+    (q31_t)0x68ad50b1, (q31_t)0xce96f4a7, (q31_t)0x68a39c46, (q31_t)0xce8ef8f4,
+    (q31_t)0x6899e64a, (q31_t)0xce86ff2a, (q31_t)0x68902ebd, (q31_t)0xce7f0748,
+    (q31_t)0x688675a0, (q31_t)0xce77114e, (q31_t)0x687cbaf3, (q31_t)0xce6f1d3d,
+    (q31_t)0x6872feb6, (q31_t)0xce672b16, (q31_t)0x686940ea, (q31_t)0xce5f3ad8,
+    (q31_t)0x685f8190, (q31_t)0xce574c84, (q31_t)0x6855c0a6, (q31_t)0xce4f6019,
+    (q31_t)0x684bfe2f, (q31_t)0xce47759a, (q31_t)0x68423a2a, (q31_t)0xce3f8d05,
+    (q31_t)0x68387498, (q31_t)0xce37a65b, (q31_t)0x682ead78, (q31_t)0xce2fc19c,
+    (q31_t)0x6824e4cc, (q31_t)0xce27dec9, (q31_t)0x681b1a94, (q31_t)0xce1ffde2,
+    (q31_t)0x68114ed0, (q31_t)0xce181ee8, (q31_t)0x68078181, (q31_t)0xce1041d9,
+    (q31_t)0x67fdb2a7, (q31_t)0xce0866b8, (q31_t)0x67f3e241, (q31_t)0xce008d84,
+    (q31_t)0x67ea1052, (q31_t)0xcdf8b63d, (q31_t)0x67e03cd8, (q31_t)0xcdf0e0e4,
+    (q31_t)0x67d667d5, (q31_t)0xcde90d79, (q31_t)0x67cc9149, (q31_t)0xcde13bfd,
+    (q31_t)0x67c2b934, (q31_t)0xcdd96c6f, (q31_t)0x67b8df97, (q31_t)0xcdd19ed0,
+    (q31_t)0x67af0472, (q31_t)0xcdc9d320, (q31_t)0x67a527c4, (q31_t)0xcdc20960,
+    (q31_t)0x679b4990, (q31_t)0xcdba4190, (q31_t)0x679169d5, (q31_t)0xcdb27bb0,
+    (q31_t)0x67878893, (q31_t)0xcdaab7c0, (q31_t)0x677da5cb, (q31_t)0xcda2f5c2,
+    (q31_t)0x6773c17d, (q31_t)0xcd9b35b4, (q31_t)0x6769dbaa, (q31_t)0xcd937798,
+    (q31_t)0x675ff452, (q31_t)0xcd8bbb6d, (q31_t)0x67560b76, (q31_t)0xcd840134,
+    (q31_t)0x674c2115, (q31_t)0xcd7c48ee, (q31_t)0x67423530, (q31_t)0xcd74929a,
+    (q31_t)0x673847c8, (q31_t)0xcd6cde39, (q31_t)0x672e58dc, (q31_t)0xcd652bcb,
+    (q31_t)0x6724686e, (q31_t)0xcd5d7b50, (q31_t)0x671a767e, (q31_t)0xcd55ccca,
+    (q31_t)0x6710830c, (q31_t)0xcd4e2037, (q31_t)0x67068e18, (q31_t)0xcd467599,
+    (q31_t)0x66fc97a3, (q31_t)0xcd3eccef, (q31_t)0x66f29fad, (q31_t)0xcd37263a,
+    (q31_t)0x66e8a637, (q31_t)0xcd2f817b, (q31_t)0x66deab41, (q31_t)0xcd27deb0,
+    (q31_t)0x66d4aecb, (q31_t)0xcd203ddc, (q31_t)0x66cab0d6, (q31_t)0xcd189efe,
+    (q31_t)0x66c0b162, (q31_t)0xcd110216, (q31_t)0x66b6b070, (q31_t)0xcd096725,
+    (q31_t)0x66acadff, (q31_t)0xcd01ce2b, (q31_t)0x66a2aa11, (q31_t)0xccfa3729,
+    (q31_t)0x6698a4a6, (q31_t)0xccf2a21d, (q31_t)0x668e9dbd, (q31_t)0xcceb0f0a,
+    (q31_t)0x66849558, (q31_t)0xcce37def, (q31_t)0x667a8b77, (q31_t)0xccdbeecc,
+    (q31_t)0x6670801a, (q31_t)0xccd461a2, (q31_t)0x66667342, (q31_t)0xccccd671,
+    (q31_t)0x665c64ef, (q31_t)0xccc54d3a, (q31_t)0x66525521, (q31_t)0xccbdc5fc,
+    (q31_t)0x664843d9, (q31_t)0xccb640b8, (q31_t)0x663e3117, (q31_t)0xccaebd6e,
+    (q31_t)0x66341cdb, (q31_t)0xcca73c1e, (q31_t)0x662a0727, (q31_t)0xcc9fbcca,
+    (q31_t)0x661feffa, (q31_t)0xcc983f70, (q31_t)0x6615d754, (q31_t)0xcc90c412,
+    (q31_t)0x660bbd37, (q31_t)0xcc894aaf, (q31_t)0x6601a1a2, (q31_t)0xcc81d349,
+    (q31_t)0x65f78497, (q31_t)0xcc7a5dde, (q31_t)0x65ed6614, (q31_t)0xcc72ea70,
+    (q31_t)0x65e3461b, (q31_t)0xcc6b78ff, (q31_t)0x65d924ac, (q31_t)0xcc64098b,
+    (q31_t)0x65cf01c8, (q31_t)0xcc5c9c14, (q31_t)0x65c4dd6e, (q31_t)0xcc55309b,
+    (q31_t)0x65bab7a0, (q31_t)0xcc4dc720, (q31_t)0x65b0905d, (q31_t)0xcc465fa3,
+    (q31_t)0x65a667a7, (q31_t)0xcc3efa25, (q31_t)0x659c3d7c, (q31_t)0xcc3796a5,
+    (q31_t)0x659211df, (q31_t)0xcc303524, (q31_t)0x6587e4cf, (q31_t)0xcc28d5a3,
+    (q31_t)0x657db64c, (q31_t)0xcc217822, (q31_t)0x65738657, (q31_t)0xcc1a1ca0,
+    (q31_t)0x656954f1, (q31_t)0xcc12c31f, (q31_t)0x655f2219, (q31_t)0xcc0b6b9e,
+    (q31_t)0x6554edd1, (q31_t)0xcc04161e, (q31_t)0x654ab818, (q31_t)0xcbfcc29f,
+    (q31_t)0x654080ef, (q31_t)0xcbf57121, (q31_t)0x65364857, (q31_t)0xcbee21a5,
+    (q31_t)0x652c0e4f, (q31_t)0xcbe6d42b, (q31_t)0x6521d2d8, (q31_t)0xcbdf88b3,
+    (q31_t)0x651795f3, (q31_t)0xcbd83f3d, (q31_t)0x650d57a0, (q31_t)0xcbd0f7ca,
+    (q31_t)0x650317df, (q31_t)0xcbc9b25a, (q31_t)0x64f8d6b0, (q31_t)0xcbc26eee,
+    (q31_t)0x64ee9415, (q31_t)0xcbbb2d85, (q31_t)0x64e4500e, (q31_t)0xcbb3ee20,
+    (q31_t)0x64da0a9a, (q31_t)0xcbacb0bf, (q31_t)0x64cfc3ba, (q31_t)0xcba57563,
+    (q31_t)0x64c57b6f, (q31_t)0xcb9e3c0b, (q31_t)0x64bb31ba, (q31_t)0xcb9704b9,
+    (q31_t)0x64b0e699, (q31_t)0xcb8fcf6b, (q31_t)0x64a69a0f, (q31_t)0xcb889c23,
+    (q31_t)0x649c4c1b, (q31_t)0xcb816ae1, (q31_t)0x6491fcbe, (q31_t)0xcb7a3ba5,
+    (q31_t)0x6487abf7, (q31_t)0xcb730e70, (q31_t)0x647d59c8, (q31_t)0xcb6be341,
+    (q31_t)0x64730631, (q31_t)0xcb64ba19, (q31_t)0x6468b132, (q31_t)0xcb5d92f8,
+    (q31_t)0x645e5acc, (q31_t)0xcb566ddf, (q31_t)0x645402ff, (q31_t)0xcb4f4acd,
+    (q31_t)0x6449a9cc, (q31_t)0xcb4829c4, (q31_t)0x643f4f32, (q31_t)0xcb410ac3,
+    (q31_t)0x6434f332, (q31_t)0xcb39edca, (q31_t)0x642a95ce, (q31_t)0xcb32d2da,
+    (q31_t)0x64203704, (q31_t)0xcb2bb9f4, (q31_t)0x6415d6d5, (q31_t)0xcb24a316,
+    (q31_t)0x640b7543, (q31_t)0xcb1d8e43, (q31_t)0x6401124d, (q31_t)0xcb167b79,
+    (q31_t)0x63f6adf3, (q31_t)0xcb0f6aba, (q31_t)0x63ec4837, (q31_t)0xcb085c05,
+    (q31_t)0x63e1e117, (q31_t)0xcb014f5b, (q31_t)0x63d77896, (q31_t)0xcafa44bc,
+    (q31_t)0x63cd0eb3, (q31_t)0xcaf33c28, (q31_t)0x63c2a36f, (q31_t)0xcaec35a0,
+    (q31_t)0x63b836ca, (q31_t)0xcae53123, (q31_t)0x63adc8c4, (q31_t)0xcade2eb3,
+    (q31_t)0x63a3595e, (q31_t)0xcad72e4f, (q31_t)0x6398e898, (q31_t)0xcad02ff8,
+    (q31_t)0x638e7673, (q31_t)0xcac933ae, (q31_t)0x638402ef, (q31_t)0xcac23971,
+    (q31_t)0x63798e0d, (q31_t)0xcabb4141, (q31_t)0x636f17cc, (q31_t)0xcab44b1f,
+    (q31_t)0x6364a02e, (q31_t)0xcaad570c, (q31_t)0x635a2733, (q31_t)0xcaa66506,
+    (q31_t)0x634facda, (q31_t)0xca9f750f, (q31_t)0x63453125, (q31_t)0xca988727,
+    (q31_t)0x633ab414, (q31_t)0xca919b4e, (q31_t)0x633035a7, (q31_t)0xca8ab184,
+    (q31_t)0x6325b5df, (q31_t)0xca83c9ca, (q31_t)0x631b34bc, (q31_t)0xca7ce420,
+    (q31_t)0x6310b23e, (q31_t)0xca760086, (q31_t)0x63062e67, (q31_t)0xca6f1efc,
+    (q31_t)0x62fba936, (q31_t)0xca683f83, (q31_t)0x62f122ab, (q31_t)0xca61621b,
+    (q31_t)0x62e69ac8, (q31_t)0xca5a86c4, (q31_t)0x62dc118c, (q31_t)0xca53ad7e,
+    (q31_t)0x62d186f8, (q31_t)0xca4cd64b, (q31_t)0x62c6fb0c, (q31_t)0xca460129,
+    (q31_t)0x62bc6dca, (q31_t)0xca3f2e19, (q31_t)0x62b1df30, (q31_t)0xca385d1d,
+    (q31_t)0x62a74f40, (q31_t)0xca318e32, (q31_t)0x629cbdfa, (q31_t)0xca2ac15b,
+    (q31_t)0x62922b5e, (q31_t)0xca23f698, (q31_t)0x6287976e, (q31_t)0xca1d2de7,
+    (q31_t)0x627d0228, (q31_t)0xca16674b, (q31_t)0x62726b8e, (q31_t)0xca0fa2c3,
+    (q31_t)0x6267d3a0, (q31_t)0xca08e04f, (q31_t)0x625d3a5e, (q31_t)0xca021fef,
+    (q31_t)0x62529fca, (q31_t)0xc9fb61a5, (q31_t)0x624803e2, (q31_t)0xc9f4a570,
+    (q31_t)0x623d66a8, (q31_t)0xc9edeb50, (q31_t)0x6232c81c, (q31_t)0xc9e73346,
+    (q31_t)0x6228283f, (q31_t)0xc9e07d51, (q31_t)0x621d8711, (q31_t)0xc9d9c973,
+    (q31_t)0x6212e492, (q31_t)0xc9d317ab, (q31_t)0x620840c2, (q31_t)0xc9cc67fa,
+    (q31_t)0x61fd9ba3, (q31_t)0xc9c5ba60, (q31_t)0x61f2f534, (q31_t)0xc9bf0edd,
+    (q31_t)0x61e84d76, (q31_t)0xc9b86572, (q31_t)0x61dda46a, (q31_t)0xc9b1be1e,
+    (q31_t)0x61d2fa0f, (q31_t)0xc9ab18e3, (q31_t)0x61c84e67, (q31_t)0xc9a475bf,
+    (q31_t)0x61bda171, (q31_t)0xc99dd4b4, (q31_t)0x61b2f32e, (q31_t)0xc99735c2,
+    (q31_t)0x61a8439e, (q31_t)0xc99098e9, (q31_t)0x619d92c2, (q31_t)0xc989fe29,
+    (q31_t)0x6192e09b, (q31_t)0xc9836582, (q31_t)0x61882d28, (q31_t)0xc97ccef5,
+    (q31_t)0x617d786a, (q31_t)0xc9763a83, (q31_t)0x6172c262, (q31_t)0xc96fa82a,
+    (q31_t)0x61680b0f, (q31_t)0xc96917ec, (q31_t)0x615d5273, (q31_t)0xc96289c9,
+    (q31_t)0x6152988d, (q31_t)0xc95bfdc1, (q31_t)0x6147dd5f, (q31_t)0xc95573d4,
+    (q31_t)0x613d20e8, (q31_t)0xc94eec03, (q31_t)0x61326329, (q31_t)0xc948664d,
+    (q31_t)0x6127a423, (q31_t)0xc941e2b4, (q31_t)0x611ce3d5, (q31_t)0xc93b6137,
+    (q31_t)0x61122240, (q31_t)0xc934e1d6, (q31_t)0x61075f65, (q31_t)0xc92e6492,
+    (q31_t)0x60fc9b44, (q31_t)0xc927e96b, (q31_t)0x60f1d5de, (q31_t)0xc9217062,
+    (q31_t)0x60e70f32, (q31_t)0xc91af976, (q31_t)0x60dc4742, (q31_t)0xc91484a8,
+    (q31_t)0x60d17e0d, (q31_t)0xc90e11f7, (q31_t)0x60c6b395, (q31_t)0xc907a166,
+    (q31_t)0x60bbe7d8, (q31_t)0xc90132f2, (q31_t)0x60b11ad9, (q31_t)0xc8fac69e,
+    (q31_t)0x60a64c97, (q31_t)0xc8f45c68, (q31_t)0x609b7d13, (q31_t)0xc8edf452,
+    (q31_t)0x6090ac4d, (q31_t)0xc8e78e5b, (q31_t)0x6085da46, (q31_t)0xc8e12a84,
+    (q31_t)0x607b06fe, (q31_t)0xc8dac8cd, (q31_t)0x60703275, (q31_t)0xc8d46936,
+    (q31_t)0x60655cac, (q31_t)0xc8ce0bc0, (q31_t)0x605a85a3, (q31_t)0xc8c7b06b,
+    (q31_t)0x604fad5b, (q31_t)0xc8c15736, (q31_t)0x6044d3d4, (q31_t)0xc8bb0023,
+    (q31_t)0x6039f90f, (q31_t)0xc8b4ab32, (q31_t)0x602f1d0b, (q31_t)0xc8ae5862,
+    (q31_t)0x60243fca, (q31_t)0xc8a807b4, (q31_t)0x6019614c, (q31_t)0xc8a1b928,
+    (q31_t)0x600e8190, (q31_t)0xc89b6cbf, (q31_t)0x6003a099, (q31_t)0xc8952278,
+    (q31_t)0x5ff8be65, (q31_t)0xc88eda54, (q31_t)0x5feddaf6, (q31_t)0xc8889454,
+    (q31_t)0x5fe2f64c, (q31_t)0xc8825077, (q31_t)0x5fd81067, (q31_t)0xc87c0ebd,
+    (q31_t)0x5fcd2948, (q31_t)0xc875cf28, (q31_t)0x5fc240ef, (q31_t)0xc86f91b7,
+    (q31_t)0x5fb7575c, (q31_t)0xc869566a, (q31_t)0x5fac6c91, (q31_t)0xc8631d42,
+    (q31_t)0x5fa1808c, (q31_t)0xc85ce63e, (q31_t)0x5f969350, (q31_t)0xc856b160,
+    (q31_t)0x5f8ba4dc, (q31_t)0xc8507ea7, (q31_t)0x5f80b531, (q31_t)0xc84a4e14,
+    (q31_t)0x5f75c44e, (q31_t)0xc8441fa6, (q31_t)0x5f6ad235, (q31_t)0xc83df35f,
+    (q31_t)0x5f5fdee6, (q31_t)0xc837c93e, (q31_t)0x5f54ea62, (q31_t)0xc831a143,
+    (q31_t)0x5f49f4a8, (q31_t)0xc82b7b70, (q31_t)0x5f3efdb9, (q31_t)0xc82557c3,
+    (q31_t)0x5f340596, (q31_t)0xc81f363d, (q31_t)0x5f290c3f, (q31_t)0xc81916df,
+    (q31_t)0x5f1e11b5, (q31_t)0xc812f9a9, (q31_t)0x5f1315f7, (q31_t)0xc80cde9b,
+    (q31_t)0x5f081907, (q31_t)0xc806c5b5, (q31_t)0x5efd1ae4, (q31_t)0xc800aef7,
+    (q31_t)0x5ef21b90, (q31_t)0xc7fa9a62, (q31_t)0x5ee71b0a, (q31_t)0xc7f487f6,
+    (q31_t)0x5edc1953, (q31_t)0xc7ee77b3, (q31_t)0x5ed1166b, (q31_t)0xc7e8699a,
+    (q31_t)0x5ec61254, (q31_t)0xc7e25daa, (q31_t)0x5ebb0d0d, (q31_t)0xc7dc53e3,
+    (q31_t)0x5eb00696, (q31_t)0xc7d64c47, (q31_t)0x5ea4fef0, (q31_t)0xc7d046d6,
+    (q31_t)0x5e99f61d, (q31_t)0xc7ca438f, (q31_t)0x5e8eec1b, (q31_t)0xc7c44272,
+    (q31_t)0x5e83e0eb, (q31_t)0xc7be4381, (q31_t)0x5e78d48e, (q31_t)0xc7b846ba,
+    (q31_t)0x5e6dc705, (q31_t)0xc7b24c20, (q31_t)0x5e62b84f, (q31_t)0xc7ac53b1,
+    (q31_t)0x5e57a86d, (q31_t)0xc7a65d6e, (q31_t)0x5e4c9760, (q31_t)0xc7a06957,
+    (q31_t)0x5e418528, (q31_t)0xc79a776c, (q31_t)0x5e3671c5, (q31_t)0xc79487ae,
+    (q31_t)0x5e2b5d38, (q31_t)0xc78e9a1d, (q31_t)0x5e204781, (q31_t)0xc788aeb9,
+    (q31_t)0x5e1530a1, (q31_t)0xc782c582, (q31_t)0x5e0a1898, (q31_t)0xc77cde79,
+    (q31_t)0x5dfeff67, (q31_t)0xc776f99d, (q31_t)0x5df3e50d, (q31_t)0xc77116f0,
+    (q31_t)0x5de8c98c, (q31_t)0xc76b3671, (q31_t)0x5dddace4, (q31_t)0xc7655820,
+    (q31_t)0x5dd28f15, (q31_t)0xc75f7bfe, (q31_t)0x5dc7701f, (q31_t)0xc759a20a,
+    (q31_t)0x5dbc5004, (q31_t)0xc753ca46, (q31_t)0x5db12ec3, (q31_t)0xc74df4b1,
+    (q31_t)0x5da60c5d, (q31_t)0xc748214c, (q31_t)0x5d9ae8d2, (q31_t)0xc7425016,
+    (q31_t)0x5d8fc424, (q31_t)0xc73c8111, (q31_t)0x5d849e51, (q31_t)0xc736b43c,
+    (q31_t)0x5d79775c, (q31_t)0xc730e997, (q31_t)0x5d6e4f43, (q31_t)0xc72b2123,
+    (q31_t)0x5d632608, (q31_t)0xc7255ae0, (q31_t)0x5d57fbaa, (q31_t)0xc71f96ce,
+    (q31_t)0x5d4cd02c, (q31_t)0xc719d4ed, (q31_t)0x5d41a38c, (q31_t)0xc714153e,
+    (q31_t)0x5d3675cb, (q31_t)0xc70e57c0, (q31_t)0x5d2b46ea, (q31_t)0xc7089c75,
+    (q31_t)0x5d2016e9, (q31_t)0xc702e35c, (q31_t)0x5d14e5c9, (q31_t)0xc6fd2c75,
+    (q31_t)0x5d09b389, (q31_t)0xc6f777c1, (q31_t)0x5cfe802b, (q31_t)0xc6f1c540,
+    (q31_t)0x5cf34baf, (q31_t)0xc6ec14f2, (q31_t)0x5ce81615, (q31_t)0xc6e666d7,
+    (q31_t)0x5cdcdf5e, (q31_t)0xc6e0baf0, (q31_t)0x5cd1a78a, (q31_t)0xc6db113d,
+    (q31_t)0x5cc66e99, (q31_t)0xc6d569be, (q31_t)0x5cbb348d, (q31_t)0xc6cfc472,
+    (q31_t)0x5caff965, (q31_t)0xc6ca215c, (q31_t)0x5ca4bd21, (q31_t)0xc6c4807a,
+    (q31_t)0x5c997fc4, (q31_t)0xc6bee1cd, (q31_t)0x5c8e414b, (q31_t)0xc6b94554,
+    (q31_t)0x5c8301b9, (q31_t)0xc6b3ab12, (q31_t)0x5c77c10e, (q31_t)0xc6ae1304,
+    (q31_t)0x5c6c7f4a, (q31_t)0xc6a87d2d, (q31_t)0x5c613c6d, (q31_t)0xc6a2e98b,
+    (q31_t)0x5c55f878, (q31_t)0xc69d5820, (q31_t)0x5c4ab36b, (q31_t)0xc697c8eb,
+    (q31_t)0x5c3f6d47, (q31_t)0xc6923bec, (q31_t)0x5c34260c, (q31_t)0xc68cb124,
+    (q31_t)0x5c28ddbb, (q31_t)0xc6872894, (q31_t)0x5c1d9454, (q31_t)0xc681a23a,
+    (q31_t)0x5c1249d8, (q31_t)0xc67c1e18, (q31_t)0x5c06fe46, (q31_t)0xc6769c2e,
+    (q31_t)0x5bfbb1a0, (q31_t)0xc6711c7b, (q31_t)0x5bf063e6, (q31_t)0xc66b9f01,
+    (q31_t)0x5be51518, (q31_t)0xc66623be, (q31_t)0x5bd9c537, (q31_t)0xc660aab5,
+    (q31_t)0x5bce7442, (q31_t)0xc65b33e4, (q31_t)0x5bc3223c, (q31_t)0xc655bf4c,
+    (q31_t)0x5bb7cf23, (q31_t)0xc6504ced, (q31_t)0x5bac7af9, (q31_t)0xc64adcc7,
+    (q31_t)0x5ba125bd, (q31_t)0xc6456edb, (q31_t)0x5b95cf71, (q31_t)0xc6400329,
+    (q31_t)0x5b8a7815, (q31_t)0xc63a99b1, (q31_t)0x5b7f1fa9, (q31_t)0xc6353273,
+    (q31_t)0x5b73c62d, (q31_t)0xc62fcd6f, (q31_t)0x5b686ba3, (q31_t)0xc62a6aa6,
+    (q31_t)0x5b5d100a, (q31_t)0xc6250a18, (q31_t)0x5b51b363, (q31_t)0xc61fabc4,
+    (q31_t)0x5b4655ae, (q31_t)0xc61a4fac, (q31_t)0x5b3af6ec, (q31_t)0xc614f5cf,
+    (q31_t)0x5b2f971e, (q31_t)0xc60f9e2e, (q31_t)0x5b243643, (q31_t)0xc60a48c9,
+    (q31_t)0x5b18d45c, (q31_t)0xc604f5a0, (q31_t)0x5b0d716a, (q31_t)0xc5ffa4b3,
+    (q31_t)0x5b020d6c, (q31_t)0xc5fa5603, (q31_t)0x5af6a865, (q31_t)0xc5f5098f,
+    (q31_t)0x5aeb4253, (q31_t)0xc5efbf58, (q31_t)0x5adfdb37, (q31_t)0xc5ea775e,
+    (q31_t)0x5ad47312, (q31_t)0xc5e531a1, (q31_t)0x5ac909e5, (q31_t)0xc5dfee22,
+    (q31_t)0x5abd9faf, (q31_t)0xc5daace1, (q31_t)0x5ab23471, (q31_t)0xc5d56ddd,
+    (q31_t)0x5aa6c82b, (q31_t)0xc5d03118, (q31_t)0x5a9b5adf, (q31_t)0xc5caf690,
+    (q31_t)0x5a8fec8c, (q31_t)0xc5c5be47, (q31_t)0x5a847d33, (q31_t)0xc5c0883d,
+    (q31_t)0x5a790cd4, (q31_t)0xc5bb5472, (q31_t)0x5a6d9b70, (q31_t)0xc5b622e6,
+    (q31_t)0x5a622907, (q31_t)0xc5b0f399, (q31_t)0x5a56b599, (q31_t)0xc5abc68c,
+    (q31_t)0x5a4b4128, (q31_t)0xc5a69bbe, (q31_t)0x5a3fcbb3, (q31_t)0xc5a17330,
+    (q31_t)0x5a34553b, (q31_t)0xc59c4ce3, (q31_t)0x5a28ddc0, (q31_t)0xc59728d5,
+    (q31_t)0x5a1d6544, (q31_t)0xc5920708, (q31_t)0x5a11ebc5, (q31_t)0xc58ce77c,
+    (q31_t)0x5a067145, (q31_t)0xc587ca31, (q31_t)0x59faf5c5, (q31_t)0xc582af26,
+    (q31_t)0x59ef7944, (q31_t)0xc57d965d, (q31_t)0x59e3fbc3, (q31_t)0xc5787fd6,
+    (q31_t)0x59d87d42, (q31_t)0xc5736b90, (q31_t)0x59ccfdc2, (q31_t)0xc56e598c,
+    (q31_t)0x59c17d44, (q31_t)0xc56949ca, (q31_t)0x59b5fbc8, (q31_t)0xc5643c4a,
+    (q31_t)0x59aa794d, (q31_t)0xc55f310d, (q31_t)0x599ef5d6, (q31_t)0xc55a2812,
+    (q31_t)0x59937161, (q31_t)0xc555215a, (q31_t)0x5987ebf0, (q31_t)0xc5501ce5,
+    (q31_t)0x597c6584, (q31_t)0xc54b1ab4, (q31_t)0x5970de1b, (q31_t)0xc5461ac6,
+    (q31_t)0x596555b8, (q31_t)0xc5411d1b, (q31_t)0x5959cc5a, (q31_t)0xc53c21b4,
+    (q31_t)0x594e4201, (q31_t)0xc5372891, (q31_t)0x5942b6af, (q31_t)0xc53231b3,
+    (q31_t)0x59372a64, (q31_t)0xc52d3d18, (q31_t)0x592b9d1f, (q31_t)0xc5284ac3,
+    (q31_t)0x59200ee3, (q31_t)0xc5235ab2, (q31_t)0x59147fae, (q31_t)0xc51e6ce6,
+    (q31_t)0x5908ef82, (q31_t)0xc519815f, (q31_t)0x58fd5e5f, (q31_t)0xc514981d,
+    (q31_t)0x58f1cc45, (q31_t)0xc50fb121, (q31_t)0x58e63935, (q31_t)0xc50acc6b,
+    (q31_t)0x58daa52f, (q31_t)0xc505e9fb, (q31_t)0x58cf1034, (q31_t)0xc50109d0,
+    (q31_t)0x58c37a44, (q31_t)0xc4fc2bec, (q31_t)0x58b7e35f, (q31_t)0xc4f7504e,
+    (q31_t)0x58ac4b87, (q31_t)0xc4f276f7, (q31_t)0x58a0b2bb, (q31_t)0xc4ed9fe7,
+    (q31_t)0x589518fc, (q31_t)0xc4e8cb1e, (q31_t)0x58897e4a, (q31_t)0xc4e3f89c,
+    (q31_t)0x587de2a7, (q31_t)0xc4df2862, (q31_t)0x58724611, (q31_t)0xc4da5a6f,
+    (q31_t)0x5866a88a, (q31_t)0xc4d58ec3, (q31_t)0x585b0a13, (q31_t)0xc4d0c560,
+    (q31_t)0x584f6aab, (q31_t)0xc4cbfe45, (q31_t)0x5843ca53, (q31_t)0xc4c73972,
+    (q31_t)0x5838290c, (q31_t)0xc4c276e8, (q31_t)0x582c86d5, (q31_t)0xc4bdb6a6,
+    (q31_t)0x5820e3b0, (q31_t)0xc4b8f8ad, (q31_t)0x58153f9d, (q31_t)0xc4b43cfd,
+    (q31_t)0x58099a9c, (q31_t)0xc4af8397, (q31_t)0x57fdf4ae, (q31_t)0xc4aacc7a,
+    (q31_t)0x57f24dd3, (q31_t)0xc4a617a6, (q31_t)0x57e6a60c, (q31_t)0xc4a1651c,
+    (q31_t)0x57dafd59, (q31_t)0xc49cb4dd, (q31_t)0x57cf53bb, (q31_t)0xc49806e7,
+    (q31_t)0x57c3a931, (q31_t)0xc4935b3c, (q31_t)0x57b7fdbd, (q31_t)0xc48eb1db,
+    (q31_t)0x57ac515f, (q31_t)0xc48a0ac4, (q31_t)0x57a0a417, (q31_t)0xc48565f9,
+    (q31_t)0x5794f5e6, (q31_t)0xc480c379, (q31_t)0x578946cc, (q31_t)0xc47c2344,
+    (q31_t)0x577d96ca, (q31_t)0xc477855a, (q31_t)0x5771e5e0, (q31_t)0xc472e9bc,
+    (q31_t)0x5766340f, (q31_t)0xc46e5069, (q31_t)0x575a8157, (q31_t)0xc469b963,
+    (q31_t)0x574ecdb8, (q31_t)0xc46524a9, (q31_t)0x57431933, (q31_t)0xc460923b,
+    (q31_t)0x573763c9, (q31_t)0xc45c0219, (q31_t)0x572bad7a, (q31_t)0xc4577444,
+    (q31_t)0x571ff646, (q31_t)0xc452e8bc, (q31_t)0x57143e2d, (q31_t)0xc44e5f80,
+    (q31_t)0x57088531, (q31_t)0xc449d892, (q31_t)0x56fccb51, (q31_t)0xc44553f2,
+    (q31_t)0x56f1108f, (q31_t)0xc440d19e, (q31_t)0x56e554ea, (q31_t)0xc43c5199,
+    (q31_t)0x56d99864, (q31_t)0xc437d3e1, (q31_t)0x56cddafb, (q31_t)0xc4335877,
+    (q31_t)0x56c21cb2, (q31_t)0xc42edf5c, (q31_t)0x56b65d88, (q31_t)0xc42a688f,
+    (q31_t)0x56aa9d7e, (q31_t)0xc425f410, (q31_t)0x569edc94, (q31_t)0xc42181e0,
+    (q31_t)0x56931acb, (q31_t)0xc41d11ff, (q31_t)0x56875823, (q31_t)0xc418a46d,
+    (q31_t)0x567b949d, (q31_t)0xc414392b, (q31_t)0x566fd039, (q31_t)0xc40fd037,
+    (q31_t)0x56640af7, (q31_t)0xc40b6994, (q31_t)0x565844d8, (q31_t)0xc4070540,
+    (q31_t)0x564c7ddd, (q31_t)0xc402a33c, (q31_t)0x5640b606, (q31_t)0xc3fe4388,
+    (q31_t)0x5634ed53, (q31_t)0xc3f9e624, (q31_t)0x562923c5, (q31_t)0xc3f58b10,
+    (q31_t)0x561d595d, (q31_t)0xc3f1324e, (q31_t)0x56118e1a, (q31_t)0xc3ecdbdc,
+    (q31_t)0x5605c1fd, (q31_t)0xc3e887bb, (q31_t)0x55f9f507, (q31_t)0xc3e435ea,
+    (q31_t)0x55ee2738, (q31_t)0xc3dfe66c, (q31_t)0x55e25890, (q31_t)0xc3db993e,
+    (q31_t)0x55d68911, (q31_t)0xc3d74e62, (q31_t)0x55cab8ba, (q31_t)0xc3d305d8,
+    (q31_t)0x55bee78c, (q31_t)0xc3cebfa0, (q31_t)0x55b31587, (q31_t)0xc3ca7bba,
+    (q31_t)0x55a742ac, (q31_t)0xc3c63a26, (q31_t)0x559b6efb, (q31_t)0xc3c1fae5,
+    (q31_t)0x558f9a76, (q31_t)0xc3bdbdf6, (q31_t)0x5583c51b, (q31_t)0xc3b9835a,
+    (q31_t)0x5577eeec, (q31_t)0xc3b54b11, (q31_t)0x556c17e9, (q31_t)0xc3b1151b,
+    (q31_t)0x55604013, (q31_t)0xc3ace178, (q31_t)0x5554676a, (q31_t)0xc3a8b028,
+    (q31_t)0x55488dee, (q31_t)0xc3a4812c, (q31_t)0x553cb3a0, (q31_t)0xc3a05484,
+    (q31_t)0x5530d881, (q31_t)0xc39c2a2f, (q31_t)0x5524fc90, (q31_t)0xc398022f,
+    (q31_t)0x55191fcf, (q31_t)0xc393dc82, (q31_t)0x550d423d, (q31_t)0xc38fb92a,
+    (q31_t)0x550163dc, (q31_t)0xc38b9827, (q31_t)0x54f584ac, (q31_t)0xc3877978,
+    (q31_t)0x54e9a4ac, (q31_t)0xc3835d1e, (q31_t)0x54ddc3de, (q31_t)0xc37f4319,
+    (q31_t)0x54d1e242, (q31_t)0xc37b2b6a, (q31_t)0x54c5ffd9, (q31_t)0xc377160f,
+    (q31_t)0x54ba1ca3, (q31_t)0xc373030a, (q31_t)0x54ae38a0, (q31_t)0xc36ef25b,
+    (q31_t)0x54a253d1, (q31_t)0xc36ae401, (q31_t)0x54966e36, (q31_t)0xc366d7fd,
+    (q31_t)0x548a87d1, (q31_t)0xc362ce50, (q31_t)0x547ea0a0, (q31_t)0xc35ec6f8,
+    (q31_t)0x5472b8a5, (q31_t)0xc35ac1f7, (q31_t)0x5466cfe1, (q31_t)0xc356bf4d,
+    (q31_t)0x545ae653, (q31_t)0xc352bef9, (q31_t)0x544efbfc, (q31_t)0xc34ec0fc,
+    (q31_t)0x544310dd, (q31_t)0xc34ac556, (q31_t)0x543724f5, (q31_t)0xc346cc07,
+    (q31_t)0x542b3846, (q31_t)0xc342d510, (q31_t)0x541f4ad1, (q31_t)0xc33ee070,
+    (q31_t)0x54135c94, (q31_t)0xc33aee27, (q31_t)0x54076d91, (q31_t)0xc336fe37,
+    (q31_t)0x53fb7dc9, (q31_t)0xc333109e, (q31_t)0x53ef8d3c, (q31_t)0xc32f255e,
+    (q31_t)0x53e39be9, (q31_t)0xc32b3c75, (q31_t)0x53d7a9d3, (q31_t)0xc32755e5,
+    (q31_t)0x53cbb6f8, (q31_t)0xc32371ae, (q31_t)0x53bfc35b, (q31_t)0xc31f8fcf,
+    (q31_t)0x53b3cefa, (q31_t)0xc31bb049, (q31_t)0x53a7d9d7, (q31_t)0xc317d31c,
+    (q31_t)0x539be3f2, (q31_t)0xc313f848, (q31_t)0x538fed4b, (q31_t)0xc3101fce,
+    (q31_t)0x5383f5e3, (q31_t)0xc30c49ad, (q31_t)0x5377fdbb, (q31_t)0xc30875e5,
+    (q31_t)0x536c04d2, (q31_t)0xc304a477, (q31_t)0x53600b2a, (q31_t)0xc300d563,
+    (q31_t)0x535410c3, (q31_t)0xc2fd08a9, (q31_t)0x5348159d, (q31_t)0xc2f93e4a,
+    (q31_t)0x533c19b8, (q31_t)0xc2f57644, (q31_t)0x53301d16, (q31_t)0xc2f1b099,
+    (q31_t)0x53241fb6, (q31_t)0xc2eded49, (q31_t)0x5318219a, (q31_t)0xc2ea2c53,
+    (q31_t)0x530c22c1, (q31_t)0xc2e66db8, (q31_t)0x5300232c, (q31_t)0xc2e2b178,
+    (q31_t)0x52f422db, (q31_t)0xc2def794, (q31_t)0x52e821cf, (q31_t)0xc2db400a,
+    (q31_t)0x52dc2009, (q31_t)0xc2d78add, (q31_t)0x52d01d89, (q31_t)0xc2d3d80a,
+    (q31_t)0x52c41a4f, (q31_t)0xc2d02794, (q31_t)0x52b8165b, (q31_t)0xc2cc7979,
+    (q31_t)0x52ac11af, (q31_t)0xc2c8cdbb, (q31_t)0x52a00c4b, (q31_t)0xc2c52459,
+    (q31_t)0x5294062f, (q31_t)0xc2c17d52, (q31_t)0x5287ff5b, (q31_t)0xc2bdd8a9,
+    (q31_t)0x527bf7d1, (q31_t)0xc2ba365c, (q31_t)0x526fef90, (q31_t)0xc2b6966c,
+    (q31_t)0x5263e699, (q31_t)0xc2b2f8d8, (q31_t)0x5257dced, (q31_t)0xc2af5da2,
+    (q31_t)0x524bd28c, (q31_t)0xc2abc4c9, (q31_t)0x523fc776, (q31_t)0xc2a82e4d,
+    (q31_t)0x5233bbac, (q31_t)0xc2a49a2e, (q31_t)0x5227af2e, (q31_t)0xc2a1086d,
+    (q31_t)0x521ba1fd, (q31_t)0xc29d790a, (q31_t)0x520f941a, (q31_t)0xc299ec05,
+    (q31_t)0x52038584, (q31_t)0xc296615d, (q31_t)0x51f7763c, (q31_t)0xc292d914,
+    (q31_t)0x51eb6643, (q31_t)0xc28f5329, (q31_t)0x51df5599, (q31_t)0xc28bcf9c,
+    (q31_t)0x51d3443f, (q31_t)0xc2884e6e, (q31_t)0x51c73235, (q31_t)0xc284cf9f,
+    (q31_t)0x51bb1f7c, (q31_t)0xc281532e, (q31_t)0x51af0c13, (q31_t)0xc27dd91c,
+    (q31_t)0x51a2f7fc, (q31_t)0xc27a616a, (q31_t)0x5196e337, (q31_t)0xc276ec16,
+    (q31_t)0x518acdc4, (q31_t)0xc2737922, (q31_t)0x517eb7a4, (q31_t)0xc270088e,
+    (q31_t)0x5172a0d7, (q31_t)0xc26c9a58, (q31_t)0x5166895f, (q31_t)0xc2692e83,
+    (q31_t)0x515a713a, (q31_t)0xc265c50e, (q31_t)0x514e586a, (q31_t)0xc2625df8,
+    (q31_t)0x51423ef0, (q31_t)0xc25ef943, (q31_t)0x513624cb, (q31_t)0xc25b96ee,
+    (q31_t)0x512a09fc, (q31_t)0xc25836f9, (q31_t)0x511dee84, (q31_t)0xc254d965,
+    (q31_t)0x5111d263, (q31_t)0xc2517e31, (q31_t)0x5105b599, (q31_t)0xc24e255e,
+    (q31_t)0x50f99827, (q31_t)0xc24aceed, (q31_t)0x50ed7a0e, (q31_t)0xc2477adc,
+    (q31_t)0x50e15b4e, (q31_t)0xc244292c, (q31_t)0x50d53be7, (q31_t)0xc240d9de,
+    (q31_t)0x50c91bda, (q31_t)0xc23d8cf1, (q31_t)0x50bcfb28, (q31_t)0xc23a4265,
+    (q31_t)0x50b0d9d0, (q31_t)0xc236fa3b, (q31_t)0x50a4b7d3, (q31_t)0xc233b473,
+    (q31_t)0x50989532, (q31_t)0xc230710d, (q31_t)0x508c71ee, (q31_t)0xc22d3009,
+    (q31_t)0x50804e06, (q31_t)0xc229f167, (q31_t)0x5074297b, (q31_t)0xc226b528,
+    (q31_t)0x5068044e, (q31_t)0xc2237b4b, (q31_t)0x505bde7f, (q31_t)0xc22043d0,
+    (q31_t)0x504fb80e, (q31_t)0xc21d0eb8, (q31_t)0x504390fd, (q31_t)0xc219dc03,
+    (q31_t)0x5037694b, (q31_t)0xc216abb1, (q31_t)0x502b40f8, (q31_t)0xc2137dc2,
+    (q31_t)0x501f1807, (q31_t)0xc2105236, (q31_t)0x5012ee76, (q31_t)0xc20d290d,
+    (q31_t)0x5006c446, (q31_t)0xc20a0248, (q31_t)0x4ffa9979, (q31_t)0xc206dde6,
+    (q31_t)0x4fee6e0d, (q31_t)0xc203bbe8, (q31_t)0x4fe24205, (q31_t)0xc2009c4e,
+    (q31_t)0x4fd6155f, (q31_t)0xc1fd7f17, (q31_t)0x4fc9e81e, (q31_t)0xc1fa6445,
+    (q31_t)0x4fbdba40, (q31_t)0xc1f74bd6, (q31_t)0x4fb18bc8, (q31_t)0xc1f435cc,
+    (q31_t)0x4fa55cb4, (q31_t)0xc1f12227, (q31_t)0x4f992d06, (q31_t)0xc1ee10e5,
+    (q31_t)0x4f8cfcbe, (q31_t)0xc1eb0209, (q31_t)0x4f80cbdc, (q31_t)0xc1e7f591,
+    (q31_t)0x4f749a61, (q31_t)0xc1e4eb7e, (q31_t)0x4f68684e, (q31_t)0xc1e1e3d0,
+    (q31_t)0x4f5c35a3, (q31_t)0xc1dede87, (q31_t)0x4f500260, (q31_t)0xc1dbdba3,
+    (q31_t)0x4f43ce86, (q31_t)0xc1d8db25, (q31_t)0x4f379a16, (q31_t)0xc1d5dd0c,
+    (q31_t)0x4f2b650f, (q31_t)0xc1d2e158, (q31_t)0x4f1f2f73, (q31_t)0xc1cfe80a,
+    (q31_t)0x4f12f941, (q31_t)0xc1ccf122, (q31_t)0x4f06c27a, (q31_t)0xc1c9fca0,
+    (q31_t)0x4efa8b20, (q31_t)0xc1c70a84, (q31_t)0x4eee5331, (q31_t)0xc1c41ace,
+    (q31_t)0x4ee21aaf, (q31_t)0xc1c12d7e, (q31_t)0x4ed5e19a, (q31_t)0xc1be4294,
+    (q31_t)0x4ec9a7f3, (q31_t)0xc1bb5a11, (q31_t)0x4ebd6db9, (q31_t)0xc1b873f5,
+    (q31_t)0x4eb132ef, (q31_t)0xc1b5903f, (q31_t)0x4ea4f793, (q31_t)0xc1b2aef0,
+    (q31_t)0x4e98bba7, (q31_t)0xc1afd007, (q31_t)0x4e8c7f2a, (q31_t)0xc1acf386,
+    (q31_t)0x4e80421e, (q31_t)0xc1aa196c, (q31_t)0x4e740483, (q31_t)0xc1a741b9,
+    (q31_t)0x4e67c65a, (q31_t)0xc1a46c6e, (q31_t)0x4e5b87a2, (q31_t)0xc1a1998a,
+    (q31_t)0x4e4f485c, (q31_t)0xc19ec90d, (q31_t)0x4e430889, (q31_t)0xc19bfaf9,
+    (q31_t)0x4e36c82a, (q31_t)0xc1992f4c, (q31_t)0x4e2a873e, (q31_t)0xc1966606,
+    (q31_t)0x4e1e45c6, (q31_t)0xc1939f29, (q31_t)0x4e1203c3, (q31_t)0xc190dab4,
+    (q31_t)0x4e05c135, (q31_t)0xc18e18a7, (q31_t)0x4df97e1d, (q31_t)0xc18b5903,
+    (q31_t)0x4ded3a7b, (q31_t)0xc1889bc6, (q31_t)0x4de0f64f, (q31_t)0xc185e0f3,
+    (q31_t)0x4dd4b19a, (q31_t)0xc1832888, (q31_t)0x4dc86c5d, (q31_t)0xc1807285,
+    (q31_t)0x4dbc2698, (q31_t)0xc17dbeec, (q31_t)0x4dafe04b, (q31_t)0xc17b0dbb,
+    (q31_t)0x4da39978, (q31_t)0xc1785ef4, (q31_t)0x4d97521d, (q31_t)0xc175b296,
+    (q31_t)0x4d8b0a3d, (q31_t)0xc17308a1, (q31_t)0x4d7ec1d6, (q31_t)0xc1706115,
+    (q31_t)0x4d7278eb, (q31_t)0xc16dbbf3, (q31_t)0x4d662f7b, (q31_t)0xc16b193a,
+    (q31_t)0x4d59e586, (q31_t)0xc16878eb, (q31_t)0x4d4d9b0e, (q31_t)0xc165db05,
+    (q31_t)0x4d415013, (q31_t)0xc1633f8a, (q31_t)0x4d350495, (q31_t)0xc160a678,
+    (q31_t)0x4d28b894, (q31_t)0xc15e0fd1, (q31_t)0x4d1c6c11, (q31_t)0xc15b7b94,
+    (q31_t)0x4d101f0e, (q31_t)0xc158e9c1, (q31_t)0x4d03d189, (q31_t)0xc1565a58,
+    (q31_t)0x4cf78383, (q31_t)0xc153cd5a, (q31_t)0x4ceb34fe, (q31_t)0xc15142c6,
+    (q31_t)0x4cdee5f9, (q31_t)0xc14eba9d, (q31_t)0x4cd29676, (q31_t)0xc14c34df,
+    (q31_t)0x4cc64673, (q31_t)0xc149b18b, (q31_t)0x4cb9f5f3, (q31_t)0xc14730a3,
+    (q31_t)0x4cada4f5, (q31_t)0xc144b225, (q31_t)0x4ca1537a, (q31_t)0xc1423613,
+    (q31_t)0x4c950182, (q31_t)0xc13fbc6c, (q31_t)0x4c88af0e, (q31_t)0xc13d4530,
+    (q31_t)0x4c7c5c1e, (q31_t)0xc13ad060, (q31_t)0x4c7008b3, (q31_t)0xc1385dfb,
+    (q31_t)0x4c63b4ce, (q31_t)0xc135ee02, (q31_t)0x4c57606e, (q31_t)0xc1338075,
+    (q31_t)0x4c4b0b94, (q31_t)0xc1311553, (q31_t)0x4c3eb641, (q31_t)0xc12eac9d,
+    (q31_t)0x4c326075, (q31_t)0xc12c4653, (q31_t)0x4c260a31, (q31_t)0xc129e276,
+    (q31_t)0x4c19b374, (q31_t)0xc1278104, (q31_t)0x4c0d5c41, (q31_t)0xc12521ff,
+    (q31_t)0x4c010496, (q31_t)0xc122c566, (q31_t)0x4bf4ac75, (q31_t)0xc1206b39,
+    (q31_t)0x4be853de, (q31_t)0xc11e1379, (q31_t)0x4bdbfad1, (q31_t)0xc11bbe26,
+    (q31_t)0x4bcfa150, (q31_t)0xc1196b3f, (q31_t)0x4bc34759, (q31_t)0xc1171ac6,
+    (q31_t)0x4bb6ecef, (q31_t)0xc114ccb9, (q31_t)0x4baa9211, (q31_t)0xc1128119,
+    (q31_t)0x4b9e36c0, (q31_t)0xc11037e6, (q31_t)0x4b91dafc, (q31_t)0xc10df120,
+    (q31_t)0x4b857ec7, (q31_t)0xc10bacc8, (q31_t)0x4b79221f, (q31_t)0xc1096add,
+    (q31_t)0x4b6cc506, (q31_t)0xc1072b5f, (q31_t)0x4b60677c, (q31_t)0xc104ee4f,
+    (q31_t)0x4b540982, (q31_t)0xc102b3ac, (q31_t)0x4b47ab19, (q31_t)0xc1007b77,
+    (q31_t)0x4b3b4c40, (q31_t)0xc0fe45b0, (q31_t)0x4b2eecf8, (q31_t)0xc0fc1257,
+    (q31_t)0x4b228d42, (q31_t)0xc0f9e16b, (q31_t)0x4b162d1d, (q31_t)0xc0f7b2ee,
+    (q31_t)0x4b09cc8c, (q31_t)0xc0f586df, (q31_t)0x4afd6b8d, (q31_t)0xc0f35d3e,
+    (q31_t)0x4af10a22, (q31_t)0xc0f1360b, (q31_t)0x4ae4a84b, (q31_t)0xc0ef1147,
+    (q31_t)0x4ad84609, (q31_t)0xc0eceef1, (q31_t)0x4acbe35b, (q31_t)0xc0eacf09,
+    (q31_t)0x4abf8043, (q31_t)0xc0e8b190, (q31_t)0x4ab31cc1, (q31_t)0xc0e69686,
+    (q31_t)0x4aa6b8d5, (q31_t)0xc0e47deb, (q31_t)0x4a9a5480, (q31_t)0xc0e267be,
+    (q31_t)0x4a8defc3, (q31_t)0xc0e05401, (q31_t)0x4a818a9d, (q31_t)0xc0de42b2,
+    (q31_t)0x4a752510, (q31_t)0xc0dc33d2, (q31_t)0x4a68bf1b, (q31_t)0xc0da2762,
+    (q31_t)0x4a5c58c0, (q31_t)0xc0d81d61, (q31_t)0x4a4ff1fe, (q31_t)0xc0d615cf,
+    (q31_t)0x4a438ad7, (q31_t)0xc0d410ad, (q31_t)0x4a37234a, (q31_t)0xc0d20dfa,
+    (q31_t)0x4a2abb59, (q31_t)0xc0d00db6, (q31_t)0x4a1e5303, (q31_t)0xc0ce0fe3,
+    (q31_t)0x4a11ea49, (q31_t)0xc0cc147f, (q31_t)0x4a05812c, (q31_t)0xc0ca1b8a,
+    (q31_t)0x49f917ac, (q31_t)0xc0c82506, (q31_t)0x49ecadc9, (q31_t)0xc0c630f2,
+    (q31_t)0x49e04385, (q31_t)0xc0c43f4d, (q31_t)0x49d3d8df, (q31_t)0xc0c25019,
+    (q31_t)0x49c76dd8, (q31_t)0xc0c06355, (q31_t)0x49bb0271, (q31_t)0xc0be7901,
+    (q31_t)0x49ae96aa, (q31_t)0xc0bc911d, (q31_t)0x49a22a83, (q31_t)0xc0baabaa,
+    (q31_t)0x4995bdfd, (q31_t)0xc0b8c8a7, (q31_t)0x49895118, (q31_t)0xc0b6e815,
+    (q31_t)0x497ce3d5, (q31_t)0xc0b509f3, (q31_t)0x49707635, (q31_t)0xc0b32e42,
+    (q31_t)0x49640837, (q31_t)0xc0b15502, (q31_t)0x495799dd, (q31_t)0xc0af7e33,
+    (q31_t)0x494b2b27, (q31_t)0xc0ada9d4, (q31_t)0x493ebc14, (q31_t)0xc0abd7e6,
+    (q31_t)0x49324ca7, (q31_t)0xc0aa086a, (q31_t)0x4925dcdf, (q31_t)0xc0a83b5e,
+    (q31_t)0x49196cbc, (q31_t)0xc0a670c4, (q31_t)0x490cfc40, (q31_t)0xc0a4a89b,
+    (q31_t)0x49008b6a, (q31_t)0xc0a2e2e3, (q31_t)0x48f41a3c, (q31_t)0xc0a11f9d,
+    (q31_t)0x48e7a8b5, (q31_t)0xc09f5ec8, (q31_t)0x48db36d6, (q31_t)0xc09da065,
+    (q31_t)0x48cec4a0, (q31_t)0xc09be473, (q31_t)0x48c25213, (q31_t)0xc09a2af3,
+    (q31_t)0x48b5df30, (q31_t)0xc09873e4, (q31_t)0x48a96bf6, (q31_t)0xc096bf48,
+    (q31_t)0x489cf867, (q31_t)0xc0950d1d, (q31_t)0x48908483, (q31_t)0xc0935d64,
+    (q31_t)0x4884104b, (q31_t)0xc091b01d, (q31_t)0x48779bbe, (q31_t)0xc0900548,
+    (q31_t)0x486b26de, (q31_t)0xc08e5ce5, (q31_t)0x485eb1ab, (q31_t)0xc08cb6f5,
+    (q31_t)0x48523c25, (q31_t)0xc08b1376, (q31_t)0x4845c64d, (q31_t)0xc089726a,
+    (q31_t)0x48395024, (q31_t)0xc087d3d0, (q31_t)0x482cd9a9, (q31_t)0xc08637a9,
+    (q31_t)0x482062de, (q31_t)0xc0849df4, (q31_t)0x4813ebc2, (q31_t)0xc08306b2,
+    (q31_t)0x48077457, (q31_t)0xc08171e2, (q31_t)0x47fafc9c, (q31_t)0xc07fdf85,
+    (q31_t)0x47ee8493, (q31_t)0xc07e4f9b, (q31_t)0x47e20c3b, (q31_t)0xc07cc223,
+    (q31_t)0x47d59396, (q31_t)0xc07b371e, (q31_t)0x47c91aa3, (q31_t)0xc079ae8c,
+    (q31_t)0x47bca163, (q31_t)0xc078286e, (q31_t)0x47b027d7, (q31_t)0xc076a4c2,
+    (q31_t)0x47a3adff, (q31_t)0xc0752389, (q31_t)0x479733dc, (q31_t)0xc073a4c3,
+    (q31_t)0x478ab96e, (q31_t)0xc0722871, (q31_t)0x477e3eb5, (q31_t)0xc070ae92,
+    (q31_t)0x4771c3b3, (q31_t)0xc06f3726, (q31_t)0x47654867, (q31_t)0xc06dc22e,
+    (q31_t)0x4758ccd2, (q31_t)0xc06c4fa8, (q31_t)0x474c50f4, (q31_t)0xc06adf97,
+    (q31_t)0x473fd4cf, (q31_t)0xc06971f9, (q31_t)0x47335862, (q31_t)0xc06806ce,
+    (q31_t)0x4726dbae, (q31_t)0xc0669e18, (q31_t)0x471a5eb3, (q31_t)0xc06537d4,
+    (q31_t)0x470de172, (q31_t)0xc063d405, (q31_t)0x470163eb, (q31_t)0xc06272aa,
+    (q31_t)0x46f4e620, (q31_t)0xc06113c2, (q31_t)0x46e86810, (q31_t)0xc05fb74e,
+    (q31_t)0x46dbe9bb, (q31_t)0xc05e5d4e, (q31_t)0x46cf6b23, (q31_t)0xc05d05c3,
+    (q31_t)0x46c2ec48, (q31_t)0xc05bb0ab, (q31_t)0x46b66d29, (q31_t)0xc05a5e07,
+    (q31_t)0x46a9edc9, (q31_t)0xc0590dd8, (q31_t)0x469d6e27, (q31_t)0xc057c01d,
+    (q31_t)0x4690ee44, (q31_t)0xc05674d6, (q31_t)0x46846e1f, (q31_t)0xc0552c03,
+    (q31_t)0x4677edbb, (q31_t)0xc053e5a5, (q31_t)0x466b6d16, (q31_t)0xc052a1bb,
+    (q31_t)0x465eec33, (q31_t)0xc0516045, (q31_t)0x46526b10, (q31_t)0xc0502145,
+    (q31_t)0x4645e9af, (q31_t)0xc04ee4b8, (q31_t)0x46396810, (q31_t)0xc04daaa1,
+    (q31_t)0x462ce634, (q31_t)0xc04c72fe, (q31_t)0x4620641a, (q31_t)0xc04b3dcf,
+    (q31_t)0x4613e1c5, (q31_t)0xc04a0b16, (q31_t)0x46075f33, (q31_t)0xc048dad1,
+    (q31_t)0x45fadc66, (q31_t)0xc047ad01, (q31_t)0x45ee595d, (q31_t)0xc04681a6,
+    (q31_t)0x45e1d61b, (q31_t)0xc04558c0, (q31_t)0x45d5529e, (q31_t)0xc044324f,
+    (q31_t)0x45c8cee7, (q31_t)0xc0430e53, (q31_t)0x45bc4af8, (q31_t)0xc041eccc,
+    (q31_t)0x45afc6d0, (q31_t)0xc040cdba, (q31_t)0x45a3426f, (q31_t)0xc03fb11d,
+    (q31_t)0x4596bdd7, (q31_t)0xc03e96f6, (q31_t)0x458a3908, (q31_t)0xc03d7f44,
+    (q31_t)0x457db403, (q31_t)0xc03c6a07, (q31_t)0x45712ec7, (q31_t)0xc03b573f,
+    (q31_t)0x4564a955, (q31_t)0xc03a46ed, (q31_t)0x455823ae, (q31_t)0xc0393910,
+    (q31_t)0x454b9dd3, (q31_t)0xc0382da8, (q31_t)0x453f17c3, (q31_t)0xc03724b6,
+    (q31_t)0x4532917f, (q31_t)0xc0361e3a, (q31_t)0x45260b08, (q31_t)0xc0351a33,
+    (q31_t)0x4519845e, (q31_t)0xc03418a2, (q31_t)0x450cfd82, (q31_t)0xc0331986,
+    (q31_t)0x45007674, (q31_t)0xc0321ce0, (q31_t)0x44f3ef35, (q31_t)0xc03122b0,
+    (q31_t)0x44e767c5, (q31_t)0xc0302af5, (q31_t)0x44dae024, (q31_t)0xc02f35b1,
+    (q31_t)0x44ce5854, (q31_t)0xc02e42e2, (q31_t)0x44c1d054, (q31_t)0xc02d5289,
+    (q31_t)0x44b54825, (q31_t)0xc02c64a6, (q31_t)0x44a8bfc7, (q31_t)0xc02b7939,
+    (q31_t)0x449c373c, (q31_t)0xc02a9042, (q31_t)0x448fae83, (q31_t)0xc029a9c1,
+    (q31_t)0x4483259d, (q31_t)0xc028c5b6, (q31_t)0x44769c8b, (q31_t)0xc027e421,
+    (q31_t)0x446a134c, (q31_t)0xc0270502, (q31_t)0x445d89e2, (q31_t)0xc0262859,
+    (q31_t)0x4451004d, (q31_t)0xc0254e27, (q31_t)0x4444768d, (q31_t)0xc024766a,
+    (q31_t)0x4437eca4, (q31_t)0xc023a124, (q31_t)0x442b6290, (q31_t)0xc022ce54,
+    (q31_t)0x441ed854, (q31_t)0xc021fdfb, (q31_t)0x44124dee, (q31_t)0xc0213018,
+    (q31_t)0x4405c361, (q31_t)0xc02064ab, (q31_t)0x43f938ac, (q31_t)0xc01f9bb5,
+    (q31_t)0x43ecadcf, (q31_t)0xc01ed535, (q31_t)0x43e022cc, (q31_t)0xc01e112b,
+    (q31_t)0x43d397a3, (q31_t)0xc01d4f99, (q31_t)0x43c70c54, (q31_t)0xc01c907c,
+    (q31_t)0x43ba80df, (q31_t)0xc01bd3d6, (q31_t)0x43adf546, (q31_t)0xc01b19a7,
+    (q31_t)0x43a16988, (q31_t)0xc01a61ee, (q31_t)0x4394dda7, (q31_t)0xc019acac,
+    (q31_t)0x438851a2, (q31_t)0xc018f9e1, (q31_t)0x437bc57b, (q31_t)0xc018498c,
+    (q31_t)0x436f3931, (q31_t)0xc0179bae, (q31_t)0x4362acc5, (q31_t)0xc016f047,
+    (q31_t)0x43562038, (q31_t)0xc0164757, (q31_t)0x43499389, (q31_t)0xc015a0dd,
+    (q31_t)0x433d06bb, (q31_t)0xc014fcda, (q31_t)0x433079cc, (q31_t)0xc0145b4e,
+    (q31_t)0x4323ecbe, (q31_t)0xc013bc39, (q31_t)0x43175f91, (q31_t)0xc0131f9b,
+    (q31_t)0x430ad245, (q31_t)0xc0128574, (q31_t)0x42fe44dc, (q31_t)0xc011edc3,
+    (q31_t)0x42f1b755, (q31_t)0xc011588a, (q31_t)0x42e529b0, (q31_t)0xc010c5c7,
+    (q31_t)0x42d89bf0, (q31_t)0xc010357c, (q31_t)0x42cc0e13, (q31_t)0xc00fa7a8,
+    (q31_t)0x42bf801a, (q31_t)0xc00f1c4a, (q31_t)0x42b2f207, (q31_t)0xc00e9364,
+    (q31_t)0x42a663d8, (q31_t)0xc00e0cf5, (q31_t)0x4299d590, (q31_t)0xc00d88fd,
+    (q31_t)0x428d472e, (q31_t)0xc00d077c, (q31_t)0x4280b8b3, (q31_t)0xc00c8872,
+    (q31_t)0x42742a1f, (q31_t)0xc00c0be0, (q31_t)0x42679b73, (q31_t)0xc00b91c4,
+    (q31_t)0x425b0caf, (q31_t)0xc00b1a20, (q31_t)0x424e7dd4, (q31_t)0xc00aa4f3,
+    (q31_t)0x4241eee2, (q31_t)0xc00a323d, (q31_t)0x42355fd9, (q31_t)0xc009c1ff,
+    (q31_t)0x4228d0bb, (q31_t)0xc0095438, (q31_t)0x421c4188, (q31_t)0xc008e8e8,
+    (q31_t)0x420fb240, (q31_t)0xc008800f, (q31_t)0x420322e3, (q31_t)0xc00819ae,
+    (q31_t)0x41f69373, (q31_t)0xc007b5c4, (q31_t)0x41ea03ef, (q31_t)0xc0075452,
+    (q31_t)0x41dd7459, (q31_t)0xc006f556, (q31_t)0x41d0e4b0, (q31_t)0xc00698d3,
+    (q31_t)0x41c454f5, (q31_t)0xc0063ec6, (q31_t)0x41b7c528, (q31_t)0xc005e731,
+    (q31_t)0x41ab354b, (q31_t)0xc0059214, (q31_t)0x419ea55d, (q31_t)0xc0053f6e,
+    (q31_t)0x4192155f, (q31_t)0xc004ef3f, (q31_t)0x41858552, (q31_t)0xc004a188,
+    (q31_t)0x4178f536, (q31_t)0xc0045648, (q31_t)0x416c650b, (q31_t)0xc0040d80,
+    (q31_t)0x415fd4d2, (q31_t)0xc003c72f, (q31_t)0x4153448c, (q31_t)0xc0038356,
+    (q31_t)0x4146b438, (q31_t)0xc00341f4, (q31_t)0x413a23d8, (q31_t)0xc003030a,
+    (q31_t)0x412d936c, (q31_t)0xc002c697, (q31_t)0x412102f4, (q31_t)0xc0028c9c,
+    (q31_t)0x41147271, (q31_t)0xc0025519, (q31_t)0x4107e1e3, (q31_t)0xc002200d,
+    (q31_t)0x40fb514b, (q31_t)0xc001ed78, (q31_t)0x40eec0aa, (q31_t)0xc001bd5c,
+    (q31_t)0x40e22fff, (q31_t)0xc0018fb6, (q31_t)0x40d59f4c, (q31_t)0xc0016489,
+    (q31_t)0x40c90e90, (q31_t)0xc0013bd3, (q31_t)0x40bc7dcc, (q31_t)0xc0011594,
+    (q31_t)0x40afed02, (q31_t)0xc000f1ce, (q31_t)0x40a35c30, (q31_t)0xc000d07e,
+    (q31_t)0x4096cb58, (q31_t)0xc000b1a7, (q31_t)0x408a3a7b, (q31_t)0xc0009547,
+    (q31_t)0x407da998, (q31_t)0xc0007b5f, (q31_t)0x407118b0, (q31_t)0xc00063ee,
+    (q31_t)0x406487c4, (q31_t)0xc0004ef5, (q31_t)0x4057f6d4, (q31_t)0xc0003c74,
+    (q31_t)0x404b65e1, (q31_t)0xc0002c6a, (q31_t)0x403ed4ea, (q31_t)0xc0001ed8,
+    (q31_t)0x403243f1, (q31_t)0xc00013bd, (q31_t)0x4025b2f7, (q31_t)0xc0000b1a,
+    (q31_t)0x401921fb, (q31_t)0xc00004ef, (q31_t)0x400c90fe, (q31_t)0xc000013c,
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q15)
+/**
+  @par
+  Generation fixed-point realCoefAQ15 array in Q15 format:
+  @par
+  n = 4096
+  <pre>for (i = 0; i < n; i++)
+  {
+     pATable[2 * i]     = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
+     pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+  }</pre>
+  @par
+  Convert to fixed point Q15 format
+        round(pATable[i] * pow(2, 15))
+ */
+const q15_t __ALIGNED(4) realCoefAQ15[8192] = {
+    (q15_t)0x4000, (q15_t)0xc000, (q15_t)0x3ff3, (q15_t)0xc000, (q15_t)0x3fe7, (q15_t)0xc000, (q15_t)0x3fda, (q15_t)0xc000,
+    (q15_t)0x3fce, (q15_t)0xc000, (q15_t)0x3fc1, (q15_t)0xc000, (q15_t)0x3fb5, (q15_t)0xc000, (q15_t)0x3fa8, (q15_t)0xc000,
+    (q15_t)0x3f9b, (q15_t)0xc000, (q15_t)0x3f8f, (q15_t)0xc000, (q15_t)0x3f82, (q15_t)0xc000, (q15_t)0x3f76, (q15_t)0xc001,
+    (q15_t)0x3f69, (q15_t)0xc001, (q15_t)0x3f5d, (q15_t)0xc001, (q15_t)0x3f50, (q15_t)0xc001, (q15_t)0x3f44, (q15_t)0xc001,
+    (q15_t)0x3f37, (q15_t)0xc001, (q15_t)0x3f2a, (q15_t)0xc001, (q15_t)0x3f1e, (q15_t)0xc002, (q15_t)0x3f11, (q15_t)0xc002,
+    (q15_t)0x3f05, (q15_t)0xc002, (q15_t)0x3ef8, (q15_t)0xc002, (q15_t)0x3eec, (q15_t)0xc002, (q15_t)0x3edf, (q15_t)0xc003,
+    (q15_t)0x3ed2, (q15_t)0xc003, (q15_t)0x3ec6, (q15_t)0xc003, (q15_t)0x3eb9, (q15_t)0xc003, (q15_t)0x3ead, (q15_t)0xc004,
+    (q15_t)0x3ea0, (q15_t)0xc004, (q15_t)0x3e94, (q15_t)0xc004, (q15_t)0x3e87, (q15_t)0xc004, (q15_t)0x3e7a, (q15_t)0xc005,
+    (q15_t)0x3e6e, (q15_t)0xc005, (q15_t)0x3e61, (q15_t)0xc005, (q15_t)0x3e55, (q15_t)0xc006, (q15_t)0x3e48, (q15_t)0xc006,
+    (q15_t)0x3e3c, (q15_t)0xc006, (q15_t)0x3e2f, (q15_t)0xc007, (q15_t)0x3e23, (q15_t)0xc007, (q15_t)0x3e16, (q15_t)0xc007,
+    (q15_t)0x3e09, (q15_t)0xc008, (q15_t)0x3dfd, (q15_t)0xc008, (q15_t)0x3df0, (q15_t)0xc009, (q15_t)0x3de4, (q15_t)0xc009,
+    (q15_t)0x3dd7, (q15_t)0xc009, (q15_t)0x3dcb, (q15_t)0xc00a, (q15_t)0x3dbe, (q15_t)0xc00a, (q15_t)0x3db2, (q15_t)0xc00b,
+    (q15_t)0x3da5, (q15_t)0xc00b, (q15_t)0x3d98, (q15_t)0xc00c, (q15_t)0x3d8c, (q15_t)0xc00c, (q15_t)0x3d7f, (q15_t)0xc00d,
+    (q15_t)0x3d73, (q15_t)0xc00d, (q15_t)0x3d66, (q15_t)0xc00e, (q15_t)0x3d5a, (q15_t)0xc00e, (q15_t)0x3d4d, (q15_t)0xc00f,
+    (q15_t)0x3d40, (q15_t)0xc00f, (q15_t)0x3d34, (q15_t)0xc010, (q15_t)0x3d27, (q15_t)0xc010, (q15_t)0x3d1b, (q15_t)0xc011,
+    (q15_t)0x3d0e, (q15_t)0xc011, (q15_t)0x3d02, (q15_t)0xc012, (q15_t)0x3cf5, (q15_t)0xc013, (q15_t)0x3ce9, (q15_t)0xc013,
+    (q15_t)0x3cdc, (q15_t)0xc014, (q15_t)0x3cd0, (q15_t)0xc014, (q15_t)0x3cc3, (q15_t)0xc015, (q15_t)0x3cb6, (q15_t)0xc016,
+    (q15_t)0x3caa, (q15_t)0xc016, (q15_t)0x3c9d, (q15_t)0xc017, (q15_t)0x3c91, (q15_t)0xc018, (q15_t)0x3c84, (q15_t)0xc018,
+    (q15_t)0x3c78, (q15_t)0xc019, (q15_t)0x3c6b, (q15_t)0xc01a, (q15_t)0x3c5f, (q15_t)0xc01a, (q15_t)0x3c52, (q15_t)0xc01b,
+    (q15_t)0x3c45, (q15_t)0xc01c, (q15_t)0x3c39, (q15_t)0xc01d, (q15_t)0x3c2c, (q15_t)0xc01d, (q15_t)0x3c20, (q15_t)0xc01e,
+    (q15_t)0x3c13, (q15_t)0xc01f, (q15_t)0x3c07, (q15_t)0xc020, (q15_t)0x3bfa, (q15_t)0xc020, (q15_t)0x3bee, (q15_t)0xc021,
+    (q15_t)0x3be1, (q15_t)0xc022, (q15_t)0x3bd5, (q15_t)0xc023, (q15_t)0x3bc8, (q15_t)0xc024, (q15_t)0x3bbc, (q15_t)0xc024,
+    (q15_t)0x3baf, (q15_t)0xc025, (q15_t)0x3ba2, (q15_t)0xc026, (q15_t)0x3b96, (q15_t)0xc027, (q15_t)0x3b89, (q15_t)0xc028,
+    (q15_t)0x3b7d, (q15_t)0xc029, (q15_t)0x3b70, (q15_t)0xc02a, (q15_t)0x3b64, (q15_t)0xc02b, (q15_t)0x3b57, (q15_t)0xc02b,
+    (q15_t)0x3b4b, (q15_t)0xc02c, (q15_t)0x3b3e, (q15_t)0xc02d, (q15_t)0x3b32, (q15_t)0xc02e, (q15_t)0x3b25, (q15_t)0xc02f,
+    (q15_t)0x3b19, (q15_t)0xc030, (q15_t)0x3b0c, (q15_t)0xc031, (q15_t)0x3b00, (q15_t)0xc032, (q15_t)0x3af3, (q15_t)0xc033,
+    (q15_t)0x3ae6, (q15_t)0xc034, (q15_t)0x3ada, (q15_t)0xc035, (q15_t)0x3acd, (q15_t)0xc036, (q15_t)0x3ac1, (q15_t)0xc037,
+    (q15_t)0x3ab4, (q15_t)0xc038, (q15_t)0x3aa8, (q15_t)0xc039, (q15_t)0x3a9b, (q15_t)0xc03a, (q15_t)0x3a8f, (q15_t)0xc03b,
+    (q15_t)0x3a82, (q15_t)0xc03c, (q15_t)0x3a76, (q15_t)0xc03d, (q15_t)0x3a69, (q15_t)0xc03f, (q15_t)0x3a5d, (q15_t)0xc040,
+    (q15_t)0x3a50, (q15_t)0xc041, (q15_t)0x3a44, (q15_t)0xc042, (q15_t)0x3a37, (q15_t)0xc043, (q15_t)0x3a2b, (q15_t)0xc044,
+    (q15_t)0x3a1e, (q15_t)0xc045, (q15_t)0x3a12, (q15_t)0xc047, (q15_t)0x3a05, (q15_t)0xc048, (q15_t)0x39f9, (q15_t)0xc049,
+    (q15_t)0x39ec, (q15_t)0xc04a, (q15_t)0x39e0, (q15_t)0xc04b, (q15_t)0x39d3, (q15_t)0xc04c, (q15_t)0x39c7, (q15_t)0xc04e,
+    (q15_t)0x39ba, (q15_t)0xc04f, (q15_t)0x39ae, (q15_t)0xc050, (q15_t)0x39a1, (q15_t)0xc051, (q15_t)0x3995, (q15_t)0xc053,
+    (q15_t)0x3988, (q15_t)0xc054, (q15_t)0x397c, (q15_t)0xc055, (q15_t)0x396f, (q15_t)0xc056, (q15_t)0x3963, (q15_t)0xc058,
+    (q15_t)0x3956, (q15_t)0xc059, (q15_t)0x394a, (q15_t)0xc05a, (q15_t)0x393d, (q15_t)0xc05c, (q15_t)0x3931, (q15_t)0xc05d,
+    (q15_t)0x3924, (q15_t)0xc05e, (q15_t)0x3918, (q15_t)0xc060, (q15_t)0x390b, (q15_t)0xc061, (q15_t)0x38ff, (q15_t)0xc062,
+    (q15_t)0x38f2, (q15_t)0xc064, (q15_t)0x38e6, (q15_t)0xc065, (q15_t)0x38d9, (q15_t)0xc067, (q15_t)0x38cd, (q15_t)0xc068,
+    (q15_t)0x38c0, (q15_t)0xc069, (q15_t)0x38b4, (q15_t)0xc06b, (q15_t)0x38a7, (q15_t)0xc06c, (q15_t)0x389b, (q15_t)0xc06e,
+    (q15_t)0x388e, (q15_t)0xc06f, (q15_t)0x3882, (q15_t)0xc071, (q15_t)0x3875, (q15_t)0xc072, (q15_t)0x3869, (q15_t)0xc074,
+    (q15_t)0x385c, (q15_t)0xc075, (q15_t)0x3850, (q15_t)0xc077, (q15_t)0x3843, (q15_t)0xc078, (q15_t)0x3837, (q15_t)0xc07a,
+    (q15_t)0x382a, (q15_t)0xc07b, (q15_t)0x381e, (q15_t)0xc07d, (q15_t)0x3811, (q15_t)0xc07e, (q15_t)0x3805, (q15_t)0xc080,
+    (q15_t)0x37f9, (q15_t)0xc081, (q15_t)0x37ec, (q15_t)0xc083, (q15_t)0x37e0, (q15_t)0xc085, (q15_t)0x37d3, (q15_t)0xc086,
+    (q15_t)0x37c7, (q15_t)0xc088, (q15_t)0x37ba, (q15_t)0xc089, (q15_t)0x37ae, (q15_t)0xc08b, (q15_t)0x37a1, (q15_t)0xc08d,
+    (q15_t)0x3795, (q15_t)0xc08e, (q15_t)0x3788, (q15_t)0xc090, (q15_t)0x377c, (q15_t)0xc092, (q15_t)0x376f, (q15_t)0xc093,
+    (q15_t)0x3763, (q15_t)0xc095, (q15_t)0x3757, (q15_t)0xc097, (q15_t)0x374a, (q15_t)0xc098, (q15_t)0x373e, (q15_t)0xc09a,
+    (q15_t)0x3731, (q15_t)0xc09c, (q15_t)0x3725, (q15_t)0xc09e, (q15_t)0x3718, (q15_t)0xc09f, (q15_t)0x370c, (q15_t)0xc0a1,
+    (q15_t)0x36ff, (q15_t)0xc0a3, (q15_t)0x36f3, (q15_t)0xc0a5, (q15_t)0x36e7, (q15_t)0xc0a6, (q15_t)0x36da, (q15_t)0xc0a8,
+    (q15_t)0x36ce, (q15_t)0xc0aa, (q15_t)0x36c1, (q15_t)0xc0ac, (q15_t)0x36b5, (q15_t)0xc0ae, (q15_t)0x36a8, (q15_t)0xc0af,
+    (q15_t)0x369c, (q15_t)0xc0b1, (q15_t)0x3690, (q15_t)0xc0b3, (q15_t)0x3683, (q15_t)0xc0b5, (q15_t)0x3677, (q15_t)0xc0b7,
+    (q15_t)0x366a, (q15_t)0xc0b9, (q15_t)0x365e, (q15_t)0xc0bb, (q15_t)0x3651, (q15_t)0xc0bd, (q15_t)0x3645, (q15_t)0xc0be,
+    (q15_t)0x3639, (q15_t)0xc0c0, (q15_t)0x362c, (q15_t)0xc0c2, (q15_t)0x3620, (q15_t)0xc0c4, (q15_t)0x3613, (q15_t)0xc0c6,
+    (q15_t)0x3607, (q15_t)0xc0c8, (q15_t)0x35fa, (q15_t)0xc0ca, (q15_t)0x35ee, (q15_t)0xc0cc, (q15_t)0x35e2, (q15_t)0xc0ce,
+    (q15_t)0x35d5, (q15_t)0xc0d0, (q15_t)0x35c9, (q15_t)0xc0d2, (q15_t)0x35bc, (q15_t)0xc0d4, (q15_t)0x35b0, (q15_t)0xc0d6,
+    (q15_t)0x35a4, (q15_t)0xc0d8, (q15_t)0x3597, (q15_t)0xc0da, (q15_t)0x358b, (q15_t)0xc0dc, (q15_t)0x357e, (q15_t)0xc0de,
+    (q15_t)0x3572, (q15_t)0xc0e0, (q15_t)0x3566, (q15_t)0xc0e2, (q15_t)0x3559, (q15_t)0xc0e4, (q15_t)0x354d, (q15_t)0xc0e7,
+    (q15_t)0x3540, (q15_t)0xc0e9, (q15_t)0x3534, (q15_t)0xc0eb, (q15_t)0x3528, (q15_t)0xc0ed, (q15_t)0x351b, (q15_t)0xc0ef,
+    (q15_t)0x350f, (q15_t)0xc0f1, (q15_t)0x3503, (q15_t)0xc0f3, (q15_t)0x34f6, (q15_t)0xc0f6, (q15_t)0x34ea, (q15_t)0xc0f8,
+    (q15_t)0x34dd, (q15_t)0xc0fa, (q15_t)0x34d1, (q15_t)0xc0fc, (q15_t)0x34c5, (q15_t)0xc0fe, (q15_t)0x34b8, (q15_t)0xc100,
+    (q15_t)0x34ac, (q15_t)0xc103, (q15_t)0x34a0, (q15_t)0xc105, (q15_t)0x3493, (q15_t)0xc107, (q15_t)0x3487, (q15_t)0xc109,
+    (q15_t)0x347b, (q15_t)0xc10c, (q15_t)0x346e, (q15_t)0xc10e, (q15_t)0x3462, (q15_t)0xc110, (q15_t)0x3455, (q15_t)0xc113,
+    (q15_t)0x3449, (q15_t)0xc115, (q15_t)0x343d, (q15_t)0xc117, (q15_t)0x3430, (q15_t)0xc119, (q15_t)0x3424, (q15_t)0xc11c,
+    (q15_t)0x3418, (q15_t)0xc11e, (q15_t)0x340b, (q15_t)0xc120, (q15_t)0x33ff, (q15_t)0xc123, (q15_t)0x33f3, (q15_t)0xc125,
+    (q15_t)0x33e6, (q15_t)0xc128, (q15_t)0x33da, (q15_t)0xc12a, (q15_t)0x33ce, (q15_t)0xc12c, (q15_t)0x33c1, (q15_t)0xc12f,
+    (q15_t)0x33b5, (q15_t)0xc131, (q15_t)0x33a9, (q15_t)0xc134, (q15_t)0x339c, (q15_t)0xc136, (q15_t)0x3390, (q15_t)0xc138,
+    (q15_t)0x3384, (q15_t)0xc13b, (q15_t)0x3377, (q15_t)0xc13d, (q15_t)0x336b, (q15_t)0xc140, (q15_t)0x335f, (q15_t)0xc142,
+    (q15_t)0x3352, (q15_t)0xc145, (q15_t)0x3346, (q15_t)0xc147, (q15_t)0x333a, (q15_t)0xc14a, (q15_t)0x332d, (q15_t)0xc14c,
+    (q15_t)0x3321, (q15_t)0xc14f, (q15_t)0x3315, (q15_t)0xc151, (q15_t)0x3308, (q15_t)0xc154, (q15_t)0x32fc, (q15_t)0xc156,
+    (q15_t)0x32f0, (q15_t)0xc159, (q15_t)0x32e4, (q15_t)0xc15b, (q15_t)0x32d7, (q15_t)0xc15e, (q15_t)0x32cb, (q15_t)0xc161,
+    (q15_t)0x32bf, (q15_t)0xc163, (q15_t)0x32b2, (q15_t)0xc166, (q15_t)0x32a6, (q15_t)0xc168, (q15_t)0x329a, (q15_t)0xc16b,
+    (q15_t)0x328e, (q15_t)0xc16e, (q15_t)0x3281, (q15_t)0xc170, (q15_t)0x3275, (q15_t)0xc173, (q15_t)0x3269, (q15_t)0xc176,
+    (q15_t)0x325c, (q15_t)0xc178, (q15_t)0x3250, (q15_t)0xc17b, (q15_t)0x3244, (q15_t)0xc17e, (q15_t)0x3238, (q15_t)0xc180,
+    (q15_t)0x322b, (q15_t)0xc183, (q15_t)0x321f, (q15_t)0xc186, (q15_t)0x3213, (q15_t)0xc189, (q15_t)0x3207, (q15_t)0xc18b,
+    (q15_t)0x31fa, (q15_t)0xc18e, (q15_t)0x31ee, (q15_t)0xc191, (q15_t)0x31e2, (q15_t)0xc194, (q15_t)0x31d5, (q15_t)0xc196,
+    (q15_t)0x31c9, (q15_t)0xc199, (q15_t)0x31bd, (q15_t)0xc19c, (q15_t)0x31b1, (q15_t)0xc19f, (q15_t)0x31a4, (q15_t)0xc1a2,
+    (q15_t)0x3198, (q15_t)0xc1a4, (q15_t)0x318c, (q15_t)0xc1a7, (q15_t)0x3180, (q15_t)0xc1aa, (q15_t)0x3174, (q15_t)0xc1ad,
+    (q15_t)0x3167, (q15_t)0xc1b0, (q15_t)0x315b, (q15_t)0xc1b3, (q15_t)0x314f, (q15_t)0xc1b6, (q15_t)0x3143, (q15_t)0xc1b8,
+    (q15_t)0x3136, (q15_t)0xc1bb, (q15_t)0x312a, (q15_t)0xc1be, (q15_t)0x311e, (q15_t)0xc1c1, (q15_t)0x3112, (q15_t)0xc1c4,
+    (q15_t)0x3105, (q15_t)0xc1c7, (q15_t)0x30f9, (q15_t)0xc1ca, (q15_t)0x30ed, (q15_t)0xc1cd, (q15_t)0x30e1, (q15_t)0xc1d0,
+    (q15_t)0x30d5, (q15_t)0xc1d3, (q15_t)0x30c8, (q15_t)0xc1d6, (q15_t)0x30bc, (q15_t)0xc1d9, (q15_t)0x30b0, (q15_t)0xc1dc,
+    (q15_t)0x30a4, (q15_t)0xc1df, (q15_t)0x3098, (q15_t)0xc1e2, (q15_t)0x308b, (q15_t)0xc1e5, (q15_t)0x307f, (q15_t)0xc1e8,
+    (q15_t)0x3073, (q15_t)0xc1eb, (q15_t)0x3067, (q15_t)0xc1ee, (q15_t)0x305b, (q15_t)0xc1f1, (q15_t)0x304e, (q15_t)0xc1f4,
+    (q15_t)0x3042, (q15_t)0xc1f7, (q15_t)0x3036, (q15_t)0xc1fa, (q15_t)0x302a, (q15_t)0xc1fd, (q15_t)0x301e, (q15_t)0xc201,
+    (q15_t)0x3012, (q15_t)0xc204, (q15_t)0x3005, (q15_t)0xc207, (q15_t)0x2ff9, (q15_t)0xc20a, (q15_t)0x2fed, (q15_t)0xc20d,
+    (q15_t)0x2fe1, (q15_t)0xc210, (q15_t)0x2fd5, (q15_t)0xc213, (q15_t)0x2fc9, (q15_t)0xc217, (q15_t)0x2fbc, (q15_t)0xc21a,
+    (q15_t)0x2fb0, (q15_t)0xc21d, (q15_t)0x2fa4, (q15_t)0xc220, (q15_t)0x2f98, (q15_t)0xc223, (q15_t)0x2f8c, (q15_t)0xc227,
+    (q15_t)0x2f80, (q15_t)0xc22a, (q15_t)0x2f74, (q15_t)0xc22d, (q15_t)0x2f67, (q15_t)0xc230, (q15_t)0x2f5b, (q15_t)0xc234,
+    (q15_t)0x2f4f, (q15_t)0xc237, (q15_t)0x2f43, (q15_t)0xc23a, (q15_t)0x2f37, (q15_t)0xc23e, (q15_t)0x2f2b, (q15_t)0xc241,
+    (q15_t)0x2f1f, (q15_t)0xc244, (q15_t)0x2f13, (q15_t)0xc247, (q15_t)0x2f06, (q15_t)0xc24b, (q15_t)0x2efa, (q15_t)0xc24e,
+    (q15_t)0x2eee, (q15_t)0xc251, (q15_t)0x2ee2, (q15_t)0xc255, (q15_t)0x2ed6, (q15_t)0xc258, (q15_t)0x2eca, (q15_t)0xc25c,
+    (q15_t)0x2ebe, (q15_t)0xc25f, (q15_t)0x2eb2, (q15_t)0xc262, (q15_t)0x2ea6, (q15_t)0xc266, (q15_t)0x2e99, (q15_t)0xc269,
+    (q15_t)0x2e8d, (q15_t)0xc26d, (q15_t)0x2e81, (q15_t)0xc270, (q15_t)0x2e75, (q15_t)0xc273, (q15_t)0x2e69, (q15_t)0xc277,
+    (q15_t)0x2e5d, (q15_t)0xc27a, (q15_t)0x2e51, (q15_t)0xc27e, (q15_t)0x2e45, (q15_t)0xc281, (q15_t)0x2e39, (q15_t)0xc285,
+    (q15_t)0x2e2d, (q15_t)0xc288, (q15_t)0x2e21, (q15_t)0xc28c, (q15_t)0x2e15, (q15_t)0xc28f, (q15_t)0x2e09, (q15_t)0xc293,
+    (q15_t)0x2dfc, (q15_t)0xc296, (q15_t)0x2df0, (q15_t)0xc29a, (q15_t)0x2de4, (q15_t)0xc29d, (q15_t)0x2dd8, (q15_t)0xc2a1,
+    (q15_t)0x2dcc, (q15_t)0xc2a5, (q15_t)0x2dc0, (q15_t)0xc2a8, (q15_t)0x2db4, (q15_t)0xc2ac, (q15_t)0x2da8, (q15_t)0xc2af,
+    (q15_t)0x2d9c, (q15_t)0xc2b3, (q15_t)0x2d90, (q15_t)0xc2b7, (q15_t)0x2d84, (q15_t)0xc2ba, (q15_t)0x2d78, (q15_t)0xc2be,
+    (q15_t)0x2d6c, (q15_t)0xc2c1, (q15_t)0x2d60, (q15_t)0xc2c5, (q15_t)0x2d54, (q15_t)0xc2c9, (q15_t)0x2d48, (q15_t)0xc2cc,
+    (q15_t)0x2d3c, (q15_t)0xc2d0, (q15_t)0x2d30, (q15_t)0xc2d4, (q15_t)0x2d24, (q15_t)0xc2d8, (q15_t)0x2d18, (q15_t)0xc2db,
+    (q15_t)0x2d0c, (q15_t)0xc2df, (q15_t)0x2d00, (q15_t)0xc2e3, (q15_t)0x2cf4, (q15_t)0xc2e6, (q15_t)0x2ce8, (q15_t)0xc2ea,
+    (q15_t)0x2cdc, (q15_t)0xc2ee, (q15_t)0x2cd0, (q15_t)0xc2f2, (q15_t)0x2cc4, (q15_t)0xc2f5, (q15_t)0x2cb8, (q15_t)0xc2f9,
+    (q15_t)0x2cac, (q15_t)0xc2fd, (q15_t)0x2ca0, (q15_t)0xc301, (q15_t)0x2c94, (q15_t)0xc305, (q15_t)0x2c88, (q15_t)0xc308,
+    (q15_t)0x2c7c, (q15_t)0xc30c, (q15_t)0x2c70, (q15_t)0xc310, (q15_t)0x2c64, (q15_t)0xc314, (q15_t)0x2c58, (q15_t)0xc318,
+    (q15_t)0x2c4c, (q15_t)0xc31c, (q15_t)0x2c40, (q15_t)0xc320, (q15_t)0x2c34, (q15_t)0xc323, (q15_t)0x2c28, (q15_t)0xc327,
+    (q15_t)0x2c1c, (q15_t)0xc32b, (q15_t)0x2c10, (q15_t)0xc32f, (q15_t)0x2c05, (q15_t)0xc333, (q15_t)0x2bf9, (q15_t)0xc337,
+    (q15_t)0x2bed, (q15_t)0xc33b, (q15_t)0x2be1, (q15_t)0xc33f, (q15_t)0x2bd5, (q15_t)0xc343, (q15_t)0x2bc9, (q15_t)0xc347,
+    (q15_t)0x2bbd, (q15_t)0xc34b, (q15_t)0x2bb1, (q15_t)0xc34f, (q15_t)0x2ba5, (q15_t)0xc353, (q15_t)0x2b99, (q15_t)0xc357,
+    (q15_t)0x2b8d, (q15_t)0xc35b, (q15_t)0x2b81, (q15_t)0xc35f, (q15_t)0x2b75, (q15_t)0xc363, (q15_t)0x2b6a, (q15_t)0xc367,
+    (q15_t)0x2b5e, (q15_t)0xc36b, (q15_t)0x2b52, (q15_t)0xc36f, (q15_t)0x2b46, (q15_t)0xc373, (q15_t)0x2b3a, (q15_t)0xc377,
+    (q15_t)0x2b2e, (q15_t)0xc37b, (q15_t)0x2b22, (q15_t)0xc37f, (q15_t)0x2b16, (q15_t)0xc383, (q15_t)0x2b0a, (q15_t)0xc387,
+    (q15_t)0x2aff, (q15_t)0xc38c, (q15_t)0x2af3, (q15_t)0xc390, (q15_t)0x2ae7, (q15_t)0xc394, (q15_t)0x2adb, (q15_t)0xc398,
+    (q15_t)0x2acf, (q15_t)0xc39c, (q15_t)0x2ac3, (q15_t)0xc3a0, (q15_t)0x2ab7, (q15_t)0xc3a5, (q15_t)0x2aac, (q15_t)0xc3a9,
+    (q15_t)0x2aa0, (q15_t)0xc3ad, (q15_t)0x2a94, (q15_t)0xc3b1, (q15_t)0x2a88, (q15_t)0xc3b5, (q15_t)0x2a7c, (q15_t)0xc3ba,
+    (q15_t)0x2a70, (q15_t)0xc3be, (q15_t)0x2a65, (q15_t)0xc3c2, (q15_t)0x2a59, (q15_t)0xc3c6, (q15_t)0x2a4d, (q15_t)0xc3ca,
+    (q15_t)0x2a41, (q15_t)0xc3cf, (q15_t)0x2a35, (q15_t)0xc3d3, (q15_t)0x2a29, (q15_t)0xc3d7, (q15_t)0x2a1e, (q15_t)0xc3dc,
+    (q15_t)0x2a12, (q15_t)0xc3e0, (q15_t)0x2a06, (q15_t)0xc3e4, (q15_t)0x29fa, (q15_t)0xc3e9, (q15_t)0x29ee, (q15_t)0xc3ed,
+    (q15_t)0x29e3, (q15_t)0xc3f1, (q15_t)0x29d7, (q15_t)0xc3f6, (q15_t)0x29cb, (q15_t)0xc3fa, (q15_t)0x29bf, (q15_t)0xc3fe,
+    (q15_t)0x29b4, (q15_t)0xc403, (q15_t)0x29a8, (q15_t)0xc407, (q15_t)0x299c, (q15_t)0xc40b, (q15_t)0x2990, (q15_t)0xc410,
+    (q15_t)0x2984, (q15_t)0xc414, (q15_t)0x2979, (q15_t)0xc419, (q15_t)0x296d, (q15_t)0xc41d, (q15_t)0x2961, (q15_t)0xc422,
+    (q15_t)0x2955, (q15_t)0xc426, (q15_t)0x294a, (q15_t)0xc42a, (q15_t)0x293e, (q15_t)0xc42f, (q15_t)0x2932, (q15_t)0xc433,
+    (q15_t)0x2926, (q15_t)0xc438, (q15_t)0x291b, (q15_t)0xc43c, (q15_t)0x290f, (q15_t)0xc441, (q15_t)0x2903, (q15_t)0xc445,
+    (q15_t)0x28f7, (q15_t)0xc44a, (q15_t)0x28ec, (q15_t)0xc44e, (q15_t)0x28e0, (q15_t)0xc453, (q15_t)0x28d4, (q15_t)0xc457,
+    (q15_t)0x28c9, (q15_t)0xc45c, (q15_t)0x28bd, (q15_t)0xc461, (q15_t)0x28b1, (q15_t)0xc465, (q15_t)0x28a5, (q15_t)0xc46a,
+    (q15_t)0x289a, (q15_t)0xc46e, (q15_t)0x288e, (q15_t)0xc473, (q15_t)0x2882, (q15_t)0xc478, (q15_t)0x2877, (q15_t)0xc47c,
+    (q15_t)0x286b, (q15_t)0xc481, (q15_t)0x285f, (q15_t)0xc485, (q15_t)0x2854, (q15_t)0xc48a, (q15_t)0x2848, (q15_t)0xc48f,
+    (q15_t)0x283c, (q15_t)0xc493, (q15_t)0x2831, (q15_t)0xc498, (q15_t)0x2825, (q15_t)0xc49d, (q15_t)0x2819, (q15_t)0xc4a1,
+    (q15_t)0x280e, (q15_t)0xc4a6, (q15_t)0x2802, (q15_t)0xc4ab, (q15_t)0x27f6, (q15_t)0xc4b0, (q15_t)0x27eb, (q15_t)0xc4b4,
+    (q15_t)0x27df, (q15_t)0xc4b9, (q15_t)0x27d3, (q15_t)0xc4be, (q15_t)0x27c8, (q15_t)0xc4c2, (q15_t)0x27bc, (q15_t)0xc4c7,
+    (q15_t)0x27b1, (q15_t)0xc4cc, (q15_t)0x27a5, (q15_t)0xc4d1, (q15_t)0x2799, (q15_t)0xc4d6, (q15_t)0x278e, (q15_t)0xc4da,
+    (q15_t)0x2782, (q15_t)0xc4df, (q15_t)0x2777, (q15_t)0xc4e4, (q15_t)0x276b, (q15_t)0xc4e9, (q15_t)0x275f, (q15_t)0xc4ee,
+    (q15_t)0x2754, (q15_t)0xc4f2, (q15_t)0x2748, (q15_t)0xc4f7, (q15_t)0x273d, (q15_t)0xc4fc, (q15_t)0x2731, (q15_t)0xc501,
+    (q15_t)0x2725, (q15_t)0xc506, (q15_t)0x271a, (q15_t)0xc50b, (q15_t)0x270e, (q15_t)0xc510, (q15_t)0x2703, (q15_t)0xc515,
+    (q15_t)0x26f7, (q15_t)0xc51a, (q15_t)0x26ec, (q15_t)0xc51e, (q15_t)0x26e0, (q15_t)0xc523, (q15_t)0x26d4, (q15_t)0xc528,
+    (q15_t)0x26c9, (q15_t)0xc52d, (q15_t)0x26bd, (q15_t)0xc532, (q15_t)0x26b2, (q15_t)0xc537, (q15_t)0x26a6, (q15_t)0xc53c,
+    (q15_t)0x269b, (q15_t)0xc541, (q15_t)0x268f, (q15_t)0xc546, (q15_t)0x2684, (q15_t)0xc54b, (q15_t)0x2678, (q15_t)0xc550,
+    (q15_t)0x266d, (q15_t)0xc555, (q15_t)0x2661, (q15_t)0xc55a, (q15_t)0x2656, (q15_t)0xc55f, (q15_t)0x264a, (q15_t)0xc564,
+    (q15_t)0x263f, (q15_t)0xc569, (q15_t)0x2633, (q15_t)0xc56e, (q15_t)0x2628, (q15_t)0xc573, (q15_t)0x261c, (q15_t)0xc578,
+    (q15_t)0x2611, (q15_t)0xc57e, (q15_t)0x2605, (q15_t)0xc583, (q15_t)0x25fa, (q15_t)0xc588, (q15_t)0x25ee, (q15_t)0xc58d,
+    (q15_t)0x25e3, (q15_t)0xc592, (q15_t)0x25d7, (q15_t)0xc597, (q15_t)0x25cc, (q15_t)0xc59c, (q15_t)0x25c0, (q15_t)0xc5a1,
+    (q15_t)0x25b5, (q15_t)0xc5a7, (q15_t)0x25a9, (q15_t)0xc5ac, (q15_t)0x259e, (q15_t)0xc5b1, (q15_t)0x2592, (q15_t)0xc5b6,
+    (q15_t)0x2587, (q15_t)0xc5bb, (q15_t)0x257c, (q15_t)0xc5c1, (q15_t)0x2570, (q15_t)0xc5c6, (q15_t)0x2565, (q15_t)0xc5cb,
+    (q15_t)0x2559, (q15_t)0xc5d0, (q15_t)0x254e, (q15_t)0xc5d5, (q15_t)0x2542, (q15_t)0xc5db, (q15_t)0x2537, (q15_t)0xc5e0,
+    (q15_t)0x252c, (q15_t)0xc5e5, (q15_t)0x2520, (q15_t)0xc5ea, (q15_t)0x2515, (q15_t)0xc5f0, (q15_t)0x2509, (q15_t)0xc5f5,
+    (q15_t)0x24fe, (q15_t)0xc5fa, (q15_t)0x24f3, (q15_t)0xc600, (q15_t)0x24e7, (q15_t)0xc605, (q15_t)0x24dc, (q15_t)0xc60a,
+    (q15_t)0x24d0, (q15_t)0xc610, (q15_t)0x24c5, (q15_t)0xc615, (q15_t)0x24ba, (q15_t)0xc61a, (q15_t)0x24ae, (q15_t)0xc620,
+    (q15_t)0x24a3, (q15_t)0xc625, (q15_t)0x2498, (q15_t)0xc62a, (q15_t)0x248c, (q15_t)0xc630, (q15_t)0x2481, (q15_t)0xc635,
+    (q15_t)0x2476, (q15_t)0xc63b, (q15_t)0x246a, (q15_t)0xc640, (q15_t)0x245f, (q15_t)0xc645, (q15_t)0x2454, (q15_t)0xc64b,
+    (q15_t)0x2448, (q15_t)0xc650, (q15_t)0x243d, (q15_t)0xc656, (q15_t)0x2432, (q15_t)0xc65b, (q15_t)0x2426, (q15_t)0xc661,
+    (q15_t)0x241b, (q15_t)0xc666, (q15_t)0x2410, (q15_t)0xc66c, (q15_t)0x2404, (q15_t)0xc671, (q15_t)0x23f9, (q15_t)0xc677,
+    (q15_t)0x23ee, (q15_t)0xc67c, (q15_t)0x23e2, (q15_t)0xc682, (q15_t)0x23d7, (q15_t)0xc687, (q15_t)0x23cc, (q15_t)0xc68d,
+    (q15_t)0x23c1, (q15_t)0xc692, (q15_t)0x23b5, (q15_t)0xc698, (q15_t)0x23aa, (q15_t)0xc69d, (q15_t)0x239f, (q15_t)0xc6a3,
+    (q15_t)0x2394, (q15_t)0xc6a8, (q15_t)0x2388, (q15_t)0xc6ae, (q15_t)0x237d, (q15_t)0xc6b4, (q15_t)0x2372, (q15_t)0xc6b9,
+    (q15_t)0x2367, (q15_t)0xc6bf, (q15_t)0x235b, (q15_t)0xc6c5, (q15_t)0x2350, (q15_t)0xc6ca, (q15_t)0x2345, (q15_t)0xc6d0,
+    (q15_t)0x233a, (q15_t)0xc6d5, (q15_t)0x232e, (q15_t)0xc6db, (q15_t)0x2323, (q15_t)0xc6e1, (q15_t)0x2318, (q15_t)0xc6e6,
+    (q15_t)0x230d, (q15_t)0xc6ec, (q15_t)0x2301, (q15_t)0xc6f2, (q15_t)0x22f6, (q15_t)0xc6f7, (q15_t)0x22eb, (q15_t)0xc6fd,
+    (q15_t)0x22e0, (q15_t)0xc703, (q15_t)0x22d5, (q15_t)0xc709, (q15_t)0x22ca, (q15_t)0xc70e, (q15_t)0x22be, (q15_t)0xc714,
+    (q15_t)0x22b3, (q15_t)0xc71a, (q15_t)0x22a8, (q15_t)0xc720, (q15_t)0x229d, (q15_t)0xc725, (q15_t)0x2292, (q15_t)0xc72b,
+    (q15_t)0x2287, (q15_t)0xc731, (q15_t)0x227b, (q15_t)0xc737, (q15_t)0x2270, (q15_t)0xc73d, (q15_t)0x2265, (q15_t)0xc742,
+    (q15_t)0x225a, (q15_t)0xc748, (q15_t)0x224f, (q15_t)0xc74e, (q15_t)0x2244, (q15_t)0xc754, (q15_t)0x2239, (q15_t)0xc75a,
+    (q15_t)0x222d, (q15_t)0xc75f, (q15_t)0x2222, (q15_t)0xc765, (q15_t)0x2217, (q15_t)0xc76b, (q15_t)0x220c, (q15_t)0xc771,
+    (q15_t)0x2201, (q15_t)0xc777, (q15_t)0x21f6, (q15_t)0xc77d, (q15_t)0x21eb, (q15_t)0xc783, (q15_t)0x21e0, (q15_t)0xc789,
+    (q15_t)0x21d5, (q15_t)0xc78f, (q15_t)0x21ca, (q15_t)0xc795, (q15_t)0x21be, (q15_t)0xc79a, (q15_t)0x21b3, (q15_t)0xc7a0,
+    (q15_t)0x21a8, (q15_t)0xc7a6, (q15_t)0x219d, (q15_t)0xc7ac, (q15_t)0x2192, (q15_t)0xc7b2, (q15_t)0x2187, (q15_t)0xc7b8,
+    (q15_t)0x217c, (q15_t)0xc7be, (q15_t)0x2171, (q15_t)0xc7c4, (q15_t)0x2166, (q15_t)0xc7ca, (q15_t)0x215b, (q15_t)0xc7d0,
+    (q15_t)0x2150, (q15_t)0xc7d6, (q15_t)0x2145, (q15_t)0xc7dc, (q15_t)0x213a, (q15_t)0xc7e2, (q15_t)0x212f, (q15_t)0xc7e8,
+    (q15_t)0x2124, (q15_t)0xc7ee, (q15_t)0x2119, (q15_t)0xc7f5, (q15_t)0x210e, (q15_t)0xc7fb, (q15_t)0x2103, (q15_t)0xc801,
+    (q15_t)0x20f8, (q15_t)0xc807, (q15_t)0x20ed, (q15_t)0xc80d, (q15_t)0x20e2, (q15_t)0xc813, (q15_t)0x20d7, (q15_t)0xc819,
+    (q15_t)0x20cc, (q15_t)0xc81f, (q15_t)0x20c1, (q15_t)0xc825, (q15_t)0x20b6, (q15_t)0xc82b, (q15_t)0x20ab, (q15_t)0xc832,
+    (q15_t)0x20a0, (q15_t)0xc838, (q15_t)0x2095, (q15_t)0xc83e, (q15_t)0x208a, (q15_t)0xc844, (q15_t)0x207f, (q15_t)0xc84a,
+    (q15_t)0x2074, (q15_t)0xc850, (q15_t)0x2069, (q15_t)0xc857, (q15_t)0x205e, (q15_t)0xc85d, (q15_t)0x2054, (q15_t)0xc863,
+    (q15_t)0x2049, (q15_t)0xc869, (q15_t)0x203e, (q15_t)0xc870, (q15_t)0x2033, (q15_t)0xc876, (q15_t)0x2028, (q15_t)0xc87c,
+    (q15_t)0x201d, (q15_t)0xc882, (q15_t)0x2012, (q15_t)0xc889, (q15_t)0x2007, (q15_t)0xc88f, (q15_t)0x1ffc, (q15_t)0xc895,
+    (q15_t)0x1ff1, (q15_t)0xc89b, (q15_t)0x1fe7, (q15_t)0xc8a2, (q15_t)0x1fdc, (q15_t)0xc8a8, (q15_t)0x1fd1, (q15_t)0xc8ae,
+    (q15_t)0x1fc6, (q15_t)0xc8b5, (q15_t)0x1fbb, (q15_t)0xc8bb, (q15_t)0x1fb0, (q15_t)0xc8c1, (q15_t)0x1fa5, (q15_t)0xc8c8,
+    (q15_t)0x1f9b, (q15_t)0xc8ce, (q15_t)0x1f90, (q15_t)0xc8d4, (q15_t)0x1f85, (q15_t)0xc8db, (q15_t)0x1f7a, (q15_t)0xc8e1,
+    (q15_t)0x1f6f, (q15_t)0xc8e8, (q15_t)0x1f65, (q15_t)0xc8ee, (q15_t)0x1f5a, (q15_t)0xc8f4, (q15_t)0x1f4f, (q15_t)0xc8fb,
+    (q15_t)0x1f44, (q15_t)0xc901, (q15_t)0x1f39, (q15_t)0xc908, (q15_t)0x1f2f, (q15_t)0xc90e, (q15_t)0x1f24, (q15_t)0xc915,
+    (q15_t)0x1f19, (q15_t)0xc91b, (q15_t)0x1f0e, (q15_t)0xc921, (q15_t)0x1f03, (q15_t)0xc928, (q15_t)0x1ef9, (q15_t)0xc92e,
+    (q15_t)0x1eee, (q15_t)0xc935, (q15_t)0x1ee3, (q15_t)0xc93b, (q15_t)0x1ed8, (q15_t)0xc942, (q15_t)0x1ece, (q15_t)0xc948,
+    (q15_t)0x1ec3, (q15_t)0xc94f, (q15_t)0x1eb8, (q15_t)0xc955, (q15_t)0x1ead, (q15_t)0xc95c, (q15_t)0x1ea3, (q15_t)0xc963,
+    (q15_t)0x1e98, (q15_t)0xc969, (q15_t)0x1e8d, (q15_t)0xc970, (q15_t)0x1e83, (q15_t)0xc976, (q15_t)0x1e78, (q15_t)0xc97d,
+    (q15_t)0x1e6d, (q15_t)0xc983, (q15_t)0x1e62, (q15_t)0xc98a, (q15_t)0x1e58, (q15_t)0xc991, (q15_t)0x1e4d, (q15_t)0xc997,
+    (q15_t)0x1e42, (q15_t)0xc99e, (q15_t)0x1e38, (q15_t)0xc9a4, (q15_t)0x1e2d, (q15_t)0xc9ab, (q15_t)0x1e22, (q15_t)0xc9b2,
+    (q15_t)0x1e18, (q15_t)0xc9b8, (q15_t)0x1e0d, (q15_t)0xc9bf, (q15_t)0x1e02, (q15_t)0xc9c6, (q15_t)0x1df8, (q15_t)0xc9cc,
+    (q15_t)0x1ded, (q15_t)0xc9d3, (q15_t)0x1de2, (q15_t)0xc9da, (q15_t)0x1dd8, (q15_t)0xc9e0, (q15_t)0x1dcd, (q15_t)0xc9e7,
+    (q15_t)0x1dc3, (q15_t)0xc9ee, (q15_t)0x1db8, (q15_t)0xc9f5, (q15_t)0x1dad, (q15_t)0xc9fb, (q15_t)0x1da3, (q15_t)0xca02,
+    (q15_t)0x1d98, (q15_t)0xca09, (q15_t)0x1d8e, (q15_t)0xca10, (q15_t)0x1d83, (q15_t)0xca16, (q15_t)0x1d78, (q15_t)0xca1d,
+    (q15_t)0x1d6e, (q15_t)0xca24, (q15_t)0x1d63, (q15_t)0xca2b, (q15_t)0x1d59, (q15_t)0xca32, (q15_t)0x1d4e, (q15_t)0xca38,
+    (q15_t)0x1d44, (q15_t)0xca3f, (q15_t)0x1d39, (q15_t)0xca46, (q15_t)0x1d2e, (q15_t)0xca4d, (q15_t)0x1d24, (q15_t)0xca54,
+    (q15_t)0x1d19, (q15_t)0xca5b, (q15_t)0x1d0f, (q15_t)0xca61, (q15_t)0x1d04, (q15_t)0xca68, (q15_t)0x1cfa, (q15_t)0xca6f,
+    (q15_t)0x1cef, (q15_t)0xca76, (q15_t)0x1ce5, (q15_t)0xca7d, (q15_t)0x1cda, (q15_t)0xca84, (q15_t)0x1cd0, (q15_t)0xca8b,
+    (q15_t)0x1cc5, (q15_t)0xca92, (q15_t)0x1cbb, (q15_t)0xca99, (q15_t)0x1cb0, (q15_t)0xca9f, (q15_t)0x1ca6, (q15_t)0xcaa6,
+    (q15_t)0x1c9b, (q15_t)0xcaad, (q15_t)0x1c91, (q15_t)0xcab4, (q15_t)0x1c86, (q15_t)0xcabb, (q15_t)0x1c7c, (q15_t)0xcac2,
+    (q15_t)0x1c72, (q15_t)0xcac9, (q15_t)0x1c67, (q15_t)0xcad0, (q15_t)0x1c5d, (q15_t)0xcad7, (q15_t)0x1c52, (q15_t)0xcade,
+    (q15_t)0x1c48, (q15_t)0xcae5, (q15_t)0x1c3d, (q15_t)0xcaec, (q15_t)0x1c33, (q15_t)0xcaf3, (q15_t)0x1c29, (q15_t)0xcafa,
+    (q15_t)0x1c1e, (q15_t)0xcb01, (q15_t)0x1c14, (q15_t)0xcb08, (q15_t)0x1c09, (q15_t)0xcb0f, (q15_t)0x1bff, (q15_t)0xcb16,
+    (q15_t)0x1bf5, (q15_t)0xcb1e, (q15_t)0x1bea, (q15_t)0xcb25, (q15_t)0x1be0, (q15_t)0xcb2c, (q15_t)0x1bd5, (q15_t)0xcb33,
+    (q15_t)0x1bcb, (q15_t)0xcb3a, (q15_t)0x1bc1, (q15_t)0xcb41, (q15_t)0x1bb6, (q15_t)0xcb48, (q15_t)0x1bac, (q15_t)0xcb4f,
+    (q15_t)0x1ba2, (q15_t)0xcb56, (q15_t)0x1b97, (q15_t)0xcb5e, (q15_t)0x1b8d, (q15_t)0xcb65, (q15_t)0x1b83, (q15_t)0xcb6c,
+    (q15_t)0x1b78, (q15_t)0xcb73, (q15_t)0x1b6e, (q15_t)0xcb7a, (q15_t)0x1b64, (q15_t)0xcb81, (q15_t)0x1b59, (q15_t)0xcb89,
+    (q15_t)0x1b4f, (q15_t)0xcb90, (q15_t)0x1b45, (q15_t)0xcb97, (q15_t)0x1b3b, (q15_t)0xcb9e, (q15_t)0x1b30, (q15_t)0xcba5,
+    (q15_t)0x1b26, (q15_t)0xcbad, (q15_t)0x1b1c, (q15_t)0xcbb4, (q15_t)0x1b11, (q15_t)0xcbbb, (q15_t)0x1b07, (q15_t)0xcbc2,
+    (q15_t)0x1afd, (q15_t)0xcbca, (q15_t)0x1af3, (q15_t)0xcbd1, (q15_t)0x1ae8, (q15_t)0xcbd8, (q15_t)0x1ade, (q15_t)0xcbe0,
+    (q15_t)0x1ad4, (q15_t)0xcbe7, (q15_t)0x1aca, (q15_t)0xcbee, (q15_t)0x1abf, (q15_t)0xcbf5, (q15_t)0x1ab5, (q15_t)0xcbfd,
+    (q15_t)0x1aab, (q15_t)0xcc04, (q15_t)0x1aa1, (q15_t)0xcc0b, (q15_t)0x1a97, (q15_t)0xcc13, (q15_t)0x1a8c, (q15_t)0xcc1a,
+    (q15_t)0x1a82, (q15_t)0xcc21, (q15_t)0x1a78, (q15_t)0xcc29, (q15_t)0x1a6e, (q15_t)0xcc30, (q15_t)0x1a64, (q15_t)0xcc38,
+    (q15_t)0x1a5a, (q15_t)0xcc3f, (q15_t)0x1a4f, (q15_t)0xcc46, (q15_t)0x1a45, (q15_t)0xcc4e, (q15_t)0x1a3b, (q15_t)0xcc55,
+    (q15_t)0x1a31, (q15_t)0xcc5d, (q15_t)0x1a27, (q15_t)0xcc64, (q15_t)0x1a1d, (q15_t)0xcc6b, (q15_t)0x1a13, (q15_t)0xcc73,
+    (q15_t)0x1a08, (q15_t)0xcc7a, (q15_t)0x19fe, (q15_t)0xcc82, (q15_t)0x19f4, (q15_t)0xcc89, (q15_t)0x19ea, (q15_t)0xcc91,
+    (q15_t)0x19e0, (q15_t)0xcc98, (q15_t)0x19d6, (q15_t)0xcca0, (q15_t)0x19cc, (q15_t)0xcca7, (q15_t)0x19c2, (q15_t)0xccaf,
+    (q15_t)0x19b8, (q15_t)0xccb6, (q15_t)0x19ae, (q15_t)0xccbe, (q15_t)0x19a4, (q15_t)0xccc5, (q15_t)0x199a, (q15_t)0xcccd,
+    (q15_t)0x198f, (q15_t)0xccd4, (q15_t)0x1985, (q15_t)0xccdc, (q15_t)0x197b, (q15_t)0xcce3, (q15_t)0x1971, (q15_t)0xcceb,
+    (q15_t)0x1967, (q15_t)0xccf3, (q15_t)0x195d, (q15_t)0xccfa, (q15_t)0x1953, (q15_t)0xcd02, (q15_t)0x1949, (q15_t)0xcd09,
+    (q15_t)0x193f, (q15_t)0xcd11, (q15_t)0x1935, (q15_t)0xcd19, (q15_t)0x192b, (q15_t)0xcd20, (q15_t)0x1921, (q15_t)0xcd28,
+    (q15_t)0x1917, (q15_t)0xcd30, (q15_t)0x190d, (q15_t)0xcd37, (q15_t)0x1903, (q15_t)0xcd3f, (q15_t)0x18f9, (q15_t)0xcd46,
+    (q15_t)0x18ef, (q15_t)0xcd4e, (q15_t)0x18e6, (q15_t)0xcd56, (q15_t)0x18dc, (q15_t)0xcd5d, (q15_t)0x18d2, (q15_t)0xcd65,
+    (q15_t)0x18c8, (q15_t)0xcd6d, (q15_t)0x18be, (q15_t)0xcd75, (q15_t)0x18b4, (q15_t)0xcd7c, (q15_t)0x18aa, (q15_t)0xcd84,
+    (q15_t)0x18a0, (q15_t)0xcd8c, (q15_t)0x1896, (q15_t)0xcd93, (q15_t)0x188c, (q15_t)0xcd9b, (q15_t)0x1882, (q15_t)0xcda3,
+    (q15_t)0x1878, (q15_t)0xcdab, (q15_t)0x186f, (q15_t)0xcdb2, (q15_t)0x1865, (q15_t)0xcdba, (q15_t)0x185b, (q15_t)0xcdc2,
+    (q15_t)0x1851, (q15_t)0xcdca, (q15_t)0x1847, (q15_t)0xcdd2, (q15_t)0x183d, (q15_t)0xcdd9, (q15_t)0x1833, (q15_t)0xcde1,
+    (q15_t)0x182a, (q15_t)0xcde9, (q15_t)0x1820, (q15_t)0xcdf1, (q15_t)0x1816, (q15_t)0xcdf9, (q15_t)0x180c, (q15_t)0xce01,
+    (q15_t)0x1802, (q15_t)0xce08, (q15_t)0x17f8, (q15_t)0xce10, (q15_t)0x17ef, (q15_t)0xce18, (q15_t)0x17e5, (q15_t)0xce20,
+    (q15_t)0x17db, (q15_t)0xce28, (q15_t)0x17d1, (q15_t)0xce30, (q15_t)0x17c8, (q15_t)0xce38, (q15_t)0x17be, (q15_t)0xce40,
+    (q15_t)0x17b4, (q15_t)0xce47, (q15_t)0x17aa, (q15_t)0xce4f, (q15_t)0x17a0, (q15_t)0xce57, (q15_t)0x1797, (q15_t)0xce5f,
+    (q15_t)0x178d, (q15_t)0xce67, (q15_t)0x1783, (q15_t)0xce6f, (q15_t)0x177a, (q15_t)0xce77, (q15_t)0x1770, (q15_t)0xce7f,
+    (q15_t)0x1766, (q15_t)0xce87, (q15_t)0x175c, (q15_t)0xce8f, (q15_t)0x1753, (q15_t)0xce97, (q15_t)0x1749, (q15_t)0xce9f,
+    (q15_t)0x173f, (q15_t)0xcea7, (q15_t)0x1736, (q15_t)0xceaf, (q15_t)0x172c, (q15_t)0xceb7, (q15_t)0x1722, (q15_t)0xcebf,
+    (q15_t)0x1719, (q15_t)0xcec7, (q15_t)0x170f, (q15_t)0xcecf, (q15_t)0x1705, (q15_t)0xced7, (q15_t)0x16fc, (q15_t)0xcedf,
+    (q15_t)0x16f2, (q15_t)0xcee7, (q15_t)0x16e8, (q15_t)0xceef, (q15_t)0x16df, (q15_t)0xcef7, (q15_t)0x16d5, (q15_t)0xceff,
+    (q15_t)0x16cb, (q15_t)0xcf07, (q15_t)0x16c2, (q15_t)0xcf10, (q15_t)0x16b8, (q15_t)0xcf18, (q15_t)0x16af, (q15_t)0xcf20,
+    (q15_t)0x16a5, (q15_t)0xcf28, (q15_t)0x169b, (q15_t)0xcf30, (q15_t)0x1692, (q15_t)0xcf38, (q15_t)0x1688, (q15_t)0xcf40,
+    (q15_t)0x167f, (q15_t)0xcf48, (q15_t)0x1675, (q15_t)0xcf51, (q15_t)0x166c, (q15_t)0xcf59, (q15_t)0x1662, (q15_t)0xcf61,
+    (q15_t)0x1659, (q15_t)0xcf69, (q15_t)0x164f, (q15_t)0xcf71, (q15_t)0x1645, (q15_t)0xcf79, (q15_t)0x163c, (q15_t)0xcf82,
+    (q15_t)0x1632, (q15_t)0xcf8a, (q15_t)0x1629, (q15_t)0xcf92, (q15_t)0x161f, (q15_t)0xcf9a, (q15_t)0x1616, (q15_t)0xcfa3,
+    (q15_t)0x160c, (q15_t)0xcfab, (q15_t)0x1603, (q15_t)0xcfb3, (q15_t)0x15f9, (q15_t)0xcfbb, (q15_t)0x15f0, (q15_t)0xcfc4,
+    (q15_t)0x15e6, (q15_t)0xcfcc, (q15_t)0x15dd, (q15_t)0xcfd4, (q15_t)0x15d4, (q15_t)0xcfdc, (q15_t)0x15ca, (q15_t)0xcfe5,
+    (q15_t)0x15c1, (q15_t)0xcfed, (q15_t)0x15b7, (q15_t)0xcff5, (q15_t)0x15ae, (q15_t)0xcffe, (q15_t)0x15a4, (q15_t)0xd006,
+    (q15_t)0x159b, (q15_t)0xd00e, (q15_t)0x1592, (q15_t)0xd016, (q15_t)0x1588, (q15_t)0xd01f, (q15_t)0x157f, (q15_t)0xd027,
+    (q15_t)0x1575, (q15_t)0xd030, (q15_t)0x156c, (q15_t)0xd038, (q15_t)0x1563, (q15_t)0xd040, (q15_t)0x1559, (q15_t)0xd049,
+    (q15_t)0x1550, (q15_t)0xd051, (q15_t)0x1547, (q15_t)0xd059, (q15_t)0x153d, (q15_t)0xd062, (q15_t)0x1534, (q15_t)0xd06a,
+    (q15_t)0x152a, (q15_t)0xd073, (q15_t)0x1521, (q15_t)0xd07b, (q15_t)0x1518, (q15_t)0xd083, (q15_t)0x150e, (q15_t)0xd08c,
+    (q15_t)0x1505, (q15_t)0xd094, (q15_t)0x14fc, (q15_t)0xd09d, (q15_t)0x14f3, (q15_t)0xd0a5, (q15_t)0x14e9, (q15_t)0xd0ae,
+    (q15_t)0x14e0, (q15_t)0xd0b6, (q15_t)0x14d7, (q15_t)0xd0bf, (q15_t)0x14cd, (q15_t)0xd0c7, (q15_t)0x14c4, (q15_t)0xd0d0,
+    (q15_t)0x14bb, (q15_t)0xd0d8, (q15_t)0x14b2, (q15_t)0xd0e0, (q15_t)0x14a8, (q15_t)0xd0e9, (q15_t)0x149f, (q15_t)0xd0f2,
+    (q15_t)0x1496, (q15_t)0xd0fa, (q15_t)0x148d, (q15_t)0xd103, (q15_t)0x1483, (q15_t)0xd10b, (q15_t)0x147a, (q15_t)0xd114,
+    (q15_t)0x1471, (q15_t)0xd11c, (q15_t)0x1468, (q15_t)0xd125, (q15_t)0x145f, (q15_t)0xd12d, (q15_t)0x1455, (q15_t)0xd136,
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+    (q15_t)0x1428, (q15_t)0xd161, (q15_t)0x141e, (q15_t)0xd169, (q15_t)0x1415, (q15_t)0xd172, (q15_t)0x140c, (q15_t)0xd17b,
+    (q15_t)0x1403, (q15_t)0xd183, (q15_t)0x13fa, (q15_t)0xd18c, (q15_t)0x13f1, (q15_t)0xd195, (q15_t)0x13e8, (q15_t)0xd19d,
+    (q15_t)0x13df, (q15_t)0xd1a6, (q15_t)0x13d5, (q15_t)0xd1af, (q15_t)0x13cc, (q15_t)0xd1b7, (q15_t)0x13c3, (q15_t)0xd1c0,
+    (q15_t)0x13ba, (q15_t)0xd1c9, (q15_t)0x13b1, (q15_t)0xd1d1, (q15_t)0x13a8, (q15_t)0xd1da, (q15_t)0x139f, (q15_t)0xd1e3,
+    (q15_t)0x1396, (q15_t)0xd1eb, (q15_t)0x138d, (q15_t)0xd1f4, (q15_t)0x1384, (q15_t)0xd1fd, (q15_t)0x137b, (q15_t)0xd206,
+    (q15_t)0x1372, (q15_t)0xd20e, (q15_t)0x1369, (q15_t)0xd217, (q15_t)0x1360, (q15_t)0xd220, (q15_t)0x1357, (q15_t)0xd229,
+    (q15_t)0x134e, (q15_t)0xd231, (q15_t)0x1345, (q15_t)0xd23a, (q15_t)0x133c, (q15_t)0xd243, (q15_t)0x1333, (q15_t)0xd24c,
+    (q15_t)0x132a, (q15_t)0xd255, (q15_t)0x1321, (q15_t)0xd25d, (q15_t)0x1318, (q15_t)0xd266, (q15_t)0x130f, (q15_t)0xd26f,
+    (q15_t)0x1306, (q15_t)0xd278, (q15_t)0x12fd, (q15_t)0xd281, (q15_t)0x12f4, (q15_t)0xd28a, (q15_t)0x12eb, (q15_t)0xd292,
+    (q15_t)0x12e2, (q15_t)0xd29b, (q15_t)0x12d9, (q15_t)0xd2a4, (q15_t)0x12d1, (q15_t)0xd2ad, (q15_t)0x12c8, (q15_t)0xd2b6,
+    (q15_t)0x12bf, (q15_t)0xd2bf, (q15_t)0x12b6, (q15_t)0xd2c8, (q15_t)0x12ad, (q15_t)0xd2d1, (q15_t)0x12a4, (q15_t)0xd2d9,
+    (q15_t)0x129b, (q15_t)0xd2e2, (q15_t)0x1292, (q15_t)0xd2eb, (q15_t)0x128a, (q15_t)0xd2f4, (q15_t)0x1281, (q15_t)0xd2fd,
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+    (q15_t)0x120e, (q15_t)0xd372, (q15_t)0x1206, (q15_t)0xd37b, (q15_t)0x11fd, (q15_t)0xd384, (q15_t)0x11f4, (q15_t)0xd38d,
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+    (q15_t)0xd11, (q15_t)0xd93f, (q15_t)0xd09, (q15_t)0xd949, (q15_t)0xd02, (q15_t)0xd953, (q15_t)0xcfa, (q15_t)0xd95d,
+    (q15_t)0xcf3, (q15_t)0xd967, (q15_t)0xceb, (q15_t)0xd971, (q15_t)0xce3, (q15_t)0xd97b, (q15_t)0xcdc, (q15_t)0xd985,
+    (q15_t)0xcd4, (q15_t)0xd98f, (q15_t)0xccd, (q15_t)0xd99a, (q15_t)0xcc5, (q15_t)0xd9a4, (q15_t)0xcbe, (q15_t)0xd9ae,
+    (q15_t)0xcb6, (q15_t)0xd9b8, (q15_t)0xcaf, (q15_t)0xd9c2, (q15_t)0xca7, (q15_t)0xd9cc, (q15_t)0xca0, (q15_t)0xd9d6,
+    (q15_t)0xc98, (q15_t)0xd9e0, (q15_t)0xc91, (q15_t)0xd9ea, (q15_t)0xc89, (q15_t)0xd9f4, (q15_t)0xc82, (q15_t)0xd9fe,
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+    (q15_t)0xc04, (q15_t)0xdaab, (q15_t)0xbfd, (q15_t)0xdab5, (q15_t)0xbf5, (q15_t)0xdabf, (q15_t)0xbee, (q15_t)0xdaca,
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+    (q15_t)0xbca, (q15_t)0xdafd, (q15_t)0xbc2, (q15_t)0xdb07, (q15_t)0xbbb, (q15_t)0xdb11, (q15_t)0xbb4, (q15_t)0xdb1c,
+    (q15_t)0xbad, (q15_t)0xdb26, (q15_t)0xba5, (q15_t)0xdb30, (q15_t)0xb9e, (q15_t)0xdb3b, (q15_t)0xb97, (q15_t)0xdb45,
+    (q15_t)0xb90, (q15_t)0xdb4f, (q15_t)0xb89, (q15_t)0xdb59, (q15_t)0xb81, (q15_t)0xdb64, (q15_t)0xb7a, (q15_t)0xdb6e,
+    (q15_t)0xb73, (q15_t)0xdb78, (q15_t)0xb6c, (q15_t)0xdb83, (q15_t)0xb65, (q15_t)0xdb8d, (q15_t)0xb5e, (q15_t)0xdb97,
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+    (q15_t)0xb3a, (q15_t)0xdbcb, (q15_t)0xb33, (q15_t)0xdbd5, (q15_t)0xb2c, (q15_t)0xdbe0, (q15_t)0xb25, (q15_t)0xdbea,
+    (q15_t)0xb1e, (q15_t)0xdbf5, (q15_t)0xb16, (q15_t)0xdbff, (q15_t)0xb0f, (q15_t)0xdc09, (q15_t)0xb08, (q15_t)0xdc14,
+    (q15_t)0xb01, (q15_t)0xdc1e, (q15_t)0xafa, (q15_t)0xdc29, (q15_t)0xaf3, (q15_t)0xdc33, (q15_t)0xaec, (q15_t)0xdc3d,
+    (q15_t)0xae5, (q15_t)0xdc48, (q15_t)0xade, (q15_t)0xdc52, (q15_t)0xad7, (q15_t)0xdc5d, (q15_t)0xad0, (q15_t)0xdc67,
+    (q15_t)0xac9, (q15_t)0xdc72, (q15_t)0xac2, (q15_t)0xdc7c, (q15_t)0xabb, (q15_t)0xdc86, (q15_t)0xab4, (q15_t)0xdc91,
+    (q15_t)0xaad, (q15_t)0xdc9b, (q15_t)0xaa6, (q15_t)0xdca6, (q15_t)0xa9f, (q15_t)0xdcb0, (q15_t)0xa99, (q15_t)0xdcbb,
+    (q15_t)0xa92, (q15_t)0xdcc5, (q15_t)0xa8b, (q15_t)0xdcd0, (q15_t)0xa84, (q15_t)0xdcda, (q15_t)0xa7d, (q15_t)0xdce5,
+    (q15_t)0xa76, (q15_t)0xdcef, (q15_t)0xa6f, (q15_t)0xdcfa, (q15_t)0xa68, (q15_t)0xdd04, (q15_t)0xa61, (q15_t)0xdd0f,
+    (q15_t)0xa5b, (q15_t)0xdd19, (q15_t)0xa54, (q15_t)0xdd24, (q15_t)0xa4d, (q15_t)0xdd2e, (q15_t)0xa46, (q15_t)0xdd39,
+    (q15_t)0xa3f, (q15_t)0xdd44, (q15_t)0xa38, (q15_t)0xdd4e, (q15_t)0xa32, (q15_t)0xdd59, (q15_t)0xa2b, (q15_t)0xdd63,
+    (q15_t)0xa24, (q15_t)0xdd6e, (q15_t)0xa1d, (q15_t)0xdd78, (q15_t)0xa16, (q15_t)0xdd83, (q15_t)0xa10, (q15_t)0xdd8e,
+    (q15_t)0xa09, (q15_t)0xdd98, (q15_t)0xa02, (q15_t)0xdda3, (q15_t)0x9fb, (q15_t)0xddad, (q15_t)0x9f5, (q15_t)0xddb8,
+    (q15_t)0x9ee, (q15_t)0xddc3, (q15_t)0x9e7, (q15_t)0xddcd, (q15_t)0x9e0, (q15_t)0xddd8, (q15_t)0x9da, (q15_t)0xdde2,
+    (q15_t)0x9d3, (q15_t)0xdded, (q15_t)0x9cc, (q15_t)0xddf8, (q15_t)0x9c6, (q15_t)0xde02, (q15_t)0x9bf, (q15_t)0xde0d,
+    (q15_t)0x9b8, (q15_t)0xde18, (q15_t)0x9b2, (q15_t)0xde22, (q15_t)0x9ab, (q15_t)0xde2d, (q15_t)0x9a4, (q15_t)0xde38,
+    (q15_t)0x99e, (q15_t)0xde42, (q15_t)0x997, (q15_t)0xde4d, (q15_t)0x991, (q15_t)0xde58, (q15_t)0x98a, (q15_t)0xde62,
+    (q15_t)0x983, (q15_t)0xde6d, (q15_t)0x97d, (q15_t)0xde78, (q15_t)0x976, (q15_t)0xde83, (q15_t)0x970, (q15_t)0xde8d,
+    (q15_t)0x969, (q15_t)0xde98, (q15_t)0x963, (q15_t)0xdea3, (q15_t)0x95c, (q15_t)0xdead, (q15_t)0x955, (q15_t)0xdeb8,
+    (q15_t)0x94f, (q15_t)0xdec3, (q15_t)0x948, (q15_t)0xdece, (q15_t)0x942, (q15_t)0xded8, (q15_t)0x93b, (q15_t)0xdee3,
+    (q15_t)0x935, (q15_t)0xdeee, (q15_t)0x92e, (q15_t)0xdef9, (q15_t)0x928, (q15_t)0xdf03, (q15_t)0x921, (q15_t)0xdf0e,
+    (q15_t)0x91b, (q15_t)0xdf19, (q15_t)0x915, (q15_t)0xdf24, (q15_t)0x90e, (q15_t)0xdf2f, (q15_t)0x908, (q15_t)0xdf39,
+    (q15_t)0x901, (q15_t)0xdf44, (q15_t)0x8fb, (q15_t)0xdf4f, (q15_t)0x8f4, (q15_t)0xdf5a, (q15_t)0x8ee, (q15_t)0xdf65,
+    (q15_t)0x8e8, (q15_t)0xdf6f, (q15_t)0x8e1, (q15_t)0xdf7a, (q15_t)0x8db, (q15_t)0xdf85, (q15_t)0x8d4, (q15_t)0xdf90,
+    (q15_t)0x8ce, (q15_t)0xdf9b, (q15_t)0x8c8, (q15_t)0xdfa5, (q15_t)0x8c1, (q15_t)0xdfb0, (q15_t)0x8bb, (q15_t)0xdfbb,
+    (q15_t)0x8b5, (q15_t)0xdfc6, (q15_t)0x8ae, (q15_t)0xdfd1, (q15_t)0x8a8, (q15_t)0xdfdc, (q15_t)0x8a2, (q15_t)0xdfe7,
+    (q15_t)0x89b, (q15_t)0xdff1, (q15_t)0x895, (q15_t)0xdffc, (q15_t)0x88f, (q15_t)0xe007, (q15_t)0x889, (q15_t)0xe012,
+    (q15_t)0x882, (q15_t)0xe01d, (q15_t)0x87c, (q15_t)0xe028, (q15_t)0x876, (q15_t)0xe033, (q15_t)0x870, (q15_t)0xe03e,
+    (q15_t)0x869, (q15_t)0xe049, (q15_t)0x863, (q15_t)0xe054, (q15_t)0x85d, (q15_t)0xe05e, (q15_t)0x857, (q15_t)0xe069,
+    (q15_t)0x850, (q15_t)0xe074, (q15_t)0x84a, (q15_t)0xe07f, (q15_t)0x844, (q15_t)0xe08a, (q15_t)0x83e, (q15_t)0xe095,
+    (q15_t)0x838, (q15_t)0xe0a0, (q15_t)0x832, (q15_t)0xe0ab, (q15_t)0x82b, (q15_t)0xe0b6, (q15_t)0x825, (q15_t)0xe0c1,
+    (q15_t)0x81f, (q15_t)0xe0cc, (q15_t)0x819, (q15_t)0xe0d7, (q15_t)0x813, (q15_t)0xe0e2, (q15_t)0x80d, (q15_t)0xe0ed,
+    (q15_t)0x807, (q15_t)0xe0f8, (q15_t)0x801, (q15_t)0xe103, (q15_t)0x7fb, (q15_t)0xe10e, (q15_t)0x7f5, (q15_t)0xe119,
+    (q15_t)0x7ee, (q15_t)0xe124, (q15_t)0x7e8, (q15_t)0xe12f, (q15_t)0x7e2, (q15_t)0xe13a, (q15_t)0x7dc, (q15_t)0xe145,
+    (q15_t)0x7d6, (q15_t)0xe150, (q15_t)0x7d0, (q15_t)0xe15b, (q15_t)0x7ca, (q15_t)0xe166, (q15_t)0x7c4, (q15_t)0xe171,
+    (q15_t)0x7be, (q15_t)0xe17c, (q15_t)0x7b8, (q15_t)0xe187, (q15_t)0x7b2, (q15_t)0xe192, (q15_t)0x7ac, (q15_t)0xe19d,
+    (q15_t)0x7a6, (q15_t)0xe1a8, (q15_t)0x7a0, (q15_t)0xe1b3, (q15_t)0x79a, (q15_t)0xe1be, (q15_t)0x795, (q15_t)0xe1ca,
+    (q15_t)0x78f, (q15_t)0xe1d5, (q15_t)0x789, (q15_t)0xe1e0, (q15_t)0x783, (q15_t)0xe1eb, (q15_t)0x77d, (q15_t)0xe1f6,
+    (q15_t)0x777, (q15_t)0xe201, (q15_t)0x771, (q15_t)0xe20c, (q15_t)0x76b, (q15_t)0xe217, (q15_t)0x765, (q15_t)0xe222,
+    (q15_t)0x75f, (q15_t)0xe22d, (q15_t)0x75a, (q15_t)0xe239, (q15_t)0x754, (q15_t)0xe244, (q15_t)0x74e, (q15_t)0xe24f,
+    (q15_t)0x748, (q15_t)0xe25a, (q15_t)0x742, (q15_t)0xe265, (q15_t)0x73d, (q15_t)0xe270, (q15_t)0x737, (q15_t)0xe27b,
+    (q15_t)0x731, (q15_t)0xe287, (q15_t)0x72b, (q15_t)0xe292, (q15_t)0x725, (q15_t)0xe29d, (q15_t)0x720, (q15_t)0xe2a8,
+    (q15_t)0x71a, (q15_t)0xe2b3, (q15_t)0x714, (q15_t)0xe2be, (q15_t)0x70e, (q15_t)0xe2ca, (q15_t)0x709, (q15_t)0xe2d5,
+    (q15_t)0x703, (q15_t)0xe2e0, (q15_t)0x6fd, (q15_t)0xe2eb, (q15_t)0x6f7, (q15_t)0xe2f6, (q15_t)0x6f2, (q15_t)0xe301,
+    (q15_t)0x6ec, (q15_t)0xe30d, (q15_t)0x6e6, (q15_t)0xe318, (q15_t)0x6e1, (q15_t)0xe323, (q15_t)0x6db, (q15_t)0xe32e,
+    (q15_t)0x6d5, (q15_t)0xe33a, (q15_t)0x6d0, (q15_t)0xe345, (q15_t)0x6ca, (q15_t)0xe350, (q15_t)0x6c5, (q15_t)0xe35b,
+    (q15_t)0x6bf, (q15_t)0xe367, (q15_t)0x6b9, (q15_t)0xe372, (q15_t)0x6b4, (q15_t)0xe37d, (q15_t)0x6ae, (q15_t)0xe388,
+    (q15_t)0x6a8, (q15_t)0xe394, (q15_t)0x6a3, (q15_t)0xe39f, (q15_t)0x69d, (q15_t)0xe3aa, (q15_t)0x698, (q15_t)0xe3b5,
+    (q15_t)0x692, (q15_t)0xe3c1, (q15_t)0x68d, (q15_t)0xe3cc, (q15_t)0x687, (q15_t)0xe3d7, (q15_t)0x682, (q15_t)0xe3e2,
+    (q15_t)0x67c, (q15_t)0xe3ee, (q15_t)0x677, (q15_t)0xe3f9, (q15_t)0x671, (q15_t)0xe404, (q15_t)0x66c, (q15_t)0xe410,
+    (q15_t)0x666, (q15_t)0xe41b, (q15_t)0x661, (q15_t)0xe426, (q15_t)0x65b, (q15_t)0xe432, (q15_t)0x656, (q15_t)0xe43d,
+    (q15_t)0x650, (q15_t)0xe448, (q15_t)0x64b, (q15_t)0xe454, (q15_t)0x645, (q15_t)0xe45f, (q15_t)0x640, (q15_t)0xe46a,
+    (q15_t)0x63b, (q15_t)0xe476, (q15_t)0x635, (q15_t)0xe481, (q15_t)0x630, (q15_t)0xe48c, (q15_t)0x62a, (q15_t)0xe498,
+    (q15_t)0x625, (q15_t)0xe4a3, (q15_t)0x620, (q15_t)0xe4ae, (q15_t)0x61a, (q15_t)0xe4ba, (q15_t)0x615, (q15_t)0xe4c5,
+    (q15_t)0x610, (q15_t)0xe4d0, (q15_t)0x60a, (q15_t)0xe4dc, (q15_t)0x605, (q15_t)0xe4e7, (q15_t)0x600, (q15_t)0xe4f3,
+    (q15_t)0x5fa, (q15_t)0xe4fe, (q15_t)0x5f5, (q15_t)0xe509, (q15_t)0x5f0, (q15_t)0xe515, (q15_t)0x5ea, (q15_t)0xe520,
+    (q15_t)0x5e5, (q15_t)0xe52c, (q15_t)0x5e0, (q15_t)0xe537, (q15_t)0x5db, (q15_t)0xe542, (q15_t)0x5d5, (q15_t)0xe54e,
+    (q15_t)0x5d0, (q15_t)0xe559, (q15_t)0x5cb, (q15_t)0xe565, (q15_t)0x5c6, (q15_t)0xe570, (q15_t)0x5c1, (q15_t)0xe57c,
+    (q15_t)0x5bb, (q15_t)0xe587, (q15_t)0x5b6, (q15_t)0xe592, (q15_t)0x5b1, (q15_t)0xe59e, (q15_t)0x5ac, (q15_t)0xe5a9,
+    (q15_t)0x5a7, (q15_t)0xe5b5, (q15_t)0x5a1, (q15_t)0xe5c0, (q15_t)0x59c, (q15_t)0xe5cc, (q15_t)0x597, (q15_t)0xe5d7,
+    (q15_t)0x592, (q15_t)0xe5e3, (q15_t)0x58d, (q15_t)0xe5ee, (q15_t)0x588, (q15_t)0xe5fa, (q15_t)0x583, (q15_t)0xe605,
+    (q15_t)0x57e, (q15_t)0xe611, (q15_t)0x578, (q15_t)0xe61c, (q15_t)0x573, (q15_t)0xe628, (q15_t)0x56e, (q15_t)0xe633,
+    (q15_t)0x569, (q15_t)0xe63f, (q15_t)0x564, (q15_t)0xe64a, (q15_t)0x55f, (q15_t)0xe656, (q15_t)0x55a, (q15_t)0xe661,
+    (q15_t)0x555, (q15_t)0xe66d, (q15_t)0x550, (q15_t)0xe678, (q15_t)0x54b, (q15_t)0xe684, (q15_t)0x546, (q15_t)0xe68f,
+    (q15_t)0x541, (q15_t)0xe69b, (q15_t)0x53c, (q15_t)0xe6a6, (q15_t)0x537, (q15_t)0xe6b2, (q15_t)0x532, (q15_t)0xe6bd,
+    (q15_t)0x52d, (q15_t)0xe6c9, (q15_t)0x528, (q15_t)0xe6d4, (q15_t)0x523, (q15_t)0xe6e0, (q15_t)0x51e, (q15_t)0xe6ec,
+    (q15_t)0x51a, (q15_t)0xe6f7, (q15_t)0x515, (q15_t)0xe703, (q15_t)0x510, (q15_t)0xe70e, (q15_t)0x50b, (q15_t)0xe71a,
+    (q15_t)0x506, (q15_t)0xe725, (q15_t)0x501, (q15_t)0xe731, (q15_t)0x4fc, (q15_t)0xe73d, (q15_t)0x4f7, (q15_t)0xe748,
+    (q15_t)0x4f2, (q15_t)0xe754, (q15_t)0x4ee, (q15_t)0xe75f, (q15_t)0x4e9, (q15_t)0xe76b, (q15_t)0x4e4, (q15_t)0xe777,
+    (q15_t)0x4df, (q15_t)0xe782, (q15_t)0x4da, (q15_t)0xe78e, (q15_t)0x4d6, (q15_t)0xe799, (q15_t)0x4d1, (q15_t)0xe7a5,
+    (q15_t)0x4cc, (q15_t)0xe7b1, (q15_t)0x4c7, (q15_t)0xe7bc, (q15_t)0x4c2, (q15_t)0xe7c8, (q15_t)0x4be, (q15_t)0xe7d3,
+    (q15_t)0x4b9, (q15_t)0xe7df, (q15_t)0x4b4, (q15_t)0xe7eb, (q15_t)0x4b0, (q15_t)0xe7f6, (q15_t)0x4ab, (q15_t)0xe802,
+    (q15_t)0x4a6, (q15_t)0xe80e, (q15_t)0x4a1, (q15_t)0xe819, (q15_t)0x49d, (q15_t)0xe825, (q15_t)0x498, (q15_t)0xe831,
+    (q15_t)0x493, (q15_t)0xe83c, (q15_t)0x48f, (q15_t)0xe848, (q15_t)0x48a, (q15_t)0xe854, (q15_t)0x485, (q15_t)0xe85f,
+    (q15_t)0x481, (q15_t)0xe86b, (q15_t)0x47c, (q15_t)0xe877, (q15_t)0x478, (q15_t)0xe882, (q15_t)0x473, (q15_t)0xe88e,
+    (q15_t)0x46e, (q15_t)0xe89a, (q15_t)0x46a, (q15_t)0xe8a5, (q15_t)0x465, (q15_t)0xe8b1, (q15_t)0x461, (q15_t)0xe8bd,
+    (q15_t)0x45c, (q15_t)0xe8c9, (q15_t)0x457, (q15_t)0xe8d4, (q15_t)0x453, (q15_t)0xe8e0, (q15_t)0x44e, (q15_t)0xe8ec,
+    (q15_t)0x44a, (q15_t)0xe8f7, (q15_t)0x445, (q15_t)0xe903, (q15_t)0x441, (q15_t)0xe90f, (q15_t)0x43c, (q15_t)0xe91b,
+    (q15_t)0x438, (q15_t)0xe926, (q15_t)0x433, (q15_t)0xe932, (q15_t)0x42f, (q15_t)0xe93e, (q15_t)0x42a, (q15_t)0xe94a,
+    (q15_t)0x426, (q15_t)0xe955, (q15_t)0x422, (q15_t)0xe961, (q15_t)0x41d, (q15_t)0xe96d, (q15_t)0x419, (q15_t)0xe979,
+    (q15_t)0x414, (q15_t)0xe984, (q15_t)0x410, (q15_t)0xe990, (q15_t)0x40b, (q15_t)0xe99c, (q15_t)0x407, (q15_t)0xe9a8,
+    (q15_t)0x403, (q15_t)0xe9b4, (q15_t)0x3fe, (q15_t)0xe9bf, (q15_t)0x3fa, (q15_t)0xe9cb, (q15_t)0x3f6, (q15_t)0xe9d7,
+    (q15_t)0x3f1, (q15_t)0xe9e3, (q15_t)0x3ed, (q15_t)0xe9ee, (q15_t)0x3e9, (q15_t)0xe9fa, (q15_t)0x3e4, (q15_t)0xea06,
+    (q15_t)0x3e0, (q15_t)0xea12, (q15_t)0x3dc, (q15_t)0xea1e, (q15_t)0x3d7, (q15_t)0xea29, (q15_t)0x3d3, (q15_t)0xea35,
+    (q15_t)0x3cf, (q15_t)0xea41, (q15_t)0x3ca, (q15_t)0xea4d, (q15_t)0x3c6, (q15_t)0xea59, (q15_t)0x3c2, (q15_t)0xea65,
+    (q15_t)0x3be, (q15_t)0xea70, (q15_t)0x3ba, (q15_t)0xea7c, (q15_t)0x3b5, (q15_t)0xea88, (q15_t)0x3b1, (q15_t)0xea94,
+    (q15_t)0x3ad, (q15_t)0xeaa0, (q15_t)0x3a9, (q15_t)0xeaac, (q15_t)0x3a5, (q15_t)0xeab7, (q15_t)0x3a0, (q15_t)0xeac3,
+    (q15_t)0x39c, (q15_t)0xeacf, (q15_t)0x398, (q15_t)0xeadb, (q15_t)0x394, (q15_t)0xeae7, (q15_t)0x390, (q15_t)0xeaf3,
+    (q15_t)0x38c, (q15_t)0xeaff, (q15_t)0x387, (q15_t)0xeb0a, (q15_t)0x383, (q15_t)0xeb16, (q15_t)0x37f, (q15_t)0xeb22,
+    (q15_t)0x37b, (q15_t)0xeb2e, (q15_t)0x377, (q15_t)0xeb3a, (q15_t)0x373, (q15_t)0xeb46, (q15_t)0x36f, (q15_t)0xeb52,
+    (q15_t)0x36b, (q15_t)0xeb5e, (q15_t)0x367, (q15_t)0xeb6a, (q15_t)0x363, (q15_t)0xeb75, (q15_t)0x35f, (q15_t)0xeb81,
+    (q15_t)0x35b, (q15_t)0xeb8d, (q15_t)0x357, (q15_t)0xeb99, (q15_t)0x353, (q15_t)0xeba5, (q15_t)0x34f, (q15_t)0xebb1,
+    (q15_t)0x34b, (q15_t)0xebbd, (q15_t)0x347, (q15_t)0xebc9, (q15_t)0x343, (q15_t)0xebd5, (q15_t)0x33f, (q15_t)0xebe1,
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+    (q15_t)0x19, (q15_t)0xfc78, (q15_t)0x18, (q15_t)0xfc84, (q15_t)0x18, (q15_t)0xfc91, (q15_t)0x17, (q15_t)0xfc9d,
+    (q15_t)0x16, (q15_t)0xfcaa, (q15_t)0x16, (q15_t)0xfcb6, (q15_t)0x15, (q15_t)0xfcc3, (q15_t)0x14, (q15_t)0xfcd0,
+    (q15_t)0x14, (q15_t)0xfcdc, (q15_t)0x13, (q15_t)0xfce9, (q15_t)0x13, (q15_t)0xfcf5, (q15_t)0x12, (q15_t)0xfd02,
+    (q15_t)0x11, (q15_t)0xfd0e, (q15_t)0x11, (q15_t)0xfd1b, (q15_t)0x10, (q15_t)0xfd27, (q15_t)0x10, (q15_t)0xfd34,
+    (q15_t)0xf, (q15_t)0xfd40, (q15_t)0xf, (q15_t)0xfd4d, (q15_t)0xe, (q15_t)0xfd5a, (q15_t)0xe, (q15_t)0xfd66,
+    (q15_t)0xd, (q15_t)0xfd73, (q15_t)0xd, (q15_t)0xfd7f, (q15_t)0xc, (q15_t)0xfd8c, (q15_t)0xc, (q15_t)0xfd98,
+    (q15_t)0xb, (q15_t)0xfda5, (q15_t)0xb, (q15_t)0xfdb2, (q15_t)0xa, (q15_t)0xfdbe, (q15_t)0xa, (q15_t)0xfdcb,
+    (q15_t)0x9, (q15_t)0xfdd7, (q15_t)0x9, (q15_t)0xfde4, (q15_t)0x9, (q15_t)0xfdf0, (q15_t)0x8, (q15_t)0xfdfd,
+    (q15_t)0x8, (q15_t)0xfe09, (q15_t)0x7, (q15_t)0xfe16, (q15_t)0x7, (q15_t)0xfe23, (q15_t)0x7, (q15_t)0xfe2f,
+    (q15_t)0x6, (q15_t)0xfe3c, (q15_t)0x6, (q15_t)0xfe48, (q15_t)0x6, (q15_t)0xfe55, (q15_t)0x5, (q15_t)0xfe61,
+    (q15_t)0x5, (q15_t)0xfe6e, (q15_t)0x5, (q15_t)0xfe7a, (q15_t)0x4, (q15_t)0xfe87, (q15_t)0x4, (q15_t)0xfe94,
+    (q15_t)0x4, (q15_t)0xfea0, (q15_t)0x4, (q15_t)0xfead, (q15_t)0x3, (q15_t)0xfeb9, (q15_t)0x3, (q15_t)0xfec6,
+    (q15_t)0x3, (q15_t)0xfed2, (q15_t)0x3, (q15_t)0xfedf, (q15_t)0x2, (q15_t)0xfeec, (q15_t)0x2, (q15_t)0xfef8,
+    (q15_t)0x2, (q15_t)0xff05, (q15_t)0x2, (q15_t)0xff11, (q15_t)0x2, (q15_t)0xff1e, (q15_t)0x1, (q15_t)0xff2a,
+    (q15_t)0x1, (q15_t)0xff37, (q15_t)0x1, (q15_t)0xff44, (q15_t)0x1, (q15_t)0xff50, (q15_t)0x1, (q15_t)0xff5d,
+    (q15_t)0x1, (q15_t)0xff69, (q15_t)0x1, (q15_t)0xff76, (q15_t)0x0, (q15_t)0xff82, (q15_t)0x0, (q15_t)0xff8f,
+    (q15_t)0x0, (q15_t)0xff9b, (q15_t)0x0, (q15_t)0xffa8, (q15_t)0x0, (q15_t)0xffb5, (q15_t)0x0, (q15_t)0xffc1,
+    (q15_t)0x0, (q15_t)0xffce, (q15_t)0x0, (q15_t)0xffda, (q15_t)0x0, (q15_t)0xffe7, (q15_t)0x0, (q15_t)0xfff3,
+    (q15_t)0x0, (q15_t)0x0, (q15_t)0x0, (q15_t)0xd, (q15_t)0x0, (q15_t)0x19, (q15_t)0x0, (q15_t)0x26,
+    (q15_t)0x0, (q15_t)0x32, (q15_t)0x0, (q15_t)0x3f, (q15_t)0x0, (q15_t)0x4b, (q15_t)0x0, (q15_t)0x58,
+    (q15_t)0x0, (q15_t)0x65, (q15_t)0x0, (q15_t)0x71, (q15_t)0x0, (q15_t)0x7e, (q15_t)0x1, (q15_t)0x8a,
+    (q15_t)0x1, (q15_t)0x97, (q15_t)0x1, (q15_t)0xa3, (q15_t)0x1, (q15_t)0xb0, (q15_t)0x1, (q15_t)0xbc,
+    (q15_t)0x1, (q15_t)0xc9, (q15_t)0x1, (q15_t)0xd6, (q15_t)0x2, (q15_t)0xe2, (q15_t)0x2, (q15_t)0xef,
+    (q15_t)0x2, (q15_t)0xfb, (q15_t)0x2, (q15_t)0x108, (q15_t)0x2, (q15_t)0x114, (q15_t)0x3, (q15_t)0x121,
+    (q15_t)0x3, (q15_t)0x12e, (q15_t)0x3, (q15_t)0x13a, (q15_t)0x3, (q15_t)0x147, (q15_t)0x4, (q15_t)0x153,
+    (q15_t)0x4, (q15_t)0x160, (q15_t)0x4, (q15_t)0x16c, (q15_t)0x4, (q15_t)0x179, (q15_t)0x5, (q15_t)0x186,
+    (q15_t)0x5, (q15_t)0x192, (q15_t)0x5, (q15_t)0x19f, (q15_t)0x6, (q15_t)0x1ab, (q15_t)0x6, (q15_t)0x1b8,
+    (q15_t)0x6, (q15_t)0x1c4, (q15_t)0x7, (q15_t)0x1d1, (q15_t)0x7, (q15_t)0x1dd, (q15_t)0x7, (q15_t)0x1ea,
+    (q15_t)0x8, (q15_t)0x1f7, (q15_t)0x8, (q15_t)0x203, (q15_t)0x9, (q15_t)0x210, (q15_t)0x9, (q15_t)0x21c,
+    (q15_t)0x9, (q15_t)0x229, (q15_t)0xa, (q15_t)0x235, (q15_t)0xa, (q15_t)0x242, (q15_t)0xb, (q15_t)0x24e,
+    (q15_t)0xb, (q15_t)0x25b, (q15_t)0xc, (q15_t)0x268, (q15_t)0xc, (q15_t)0x274, (q15_t)0xd, (q15_t)0x281,
+    (q15_t)0xd, (q15_t)0x28d, (q15_t)0xe, (q15_t)0x29a, (q15_t)0xe, (q15_t)0x2a6, (q15_t)0xf, (q15_t)0x2b3,
+    (q15_t)0xf, (q15_t)0x2c0, (q15_t)0x10, (q15_t)0x2cc, (q15_t)0x10, (q15_t)0x2d9, (q15_t)0x11, (q15_t)0x2e5,
+    (q15_t)0x11, (q15_t)0x2f2, (q15_t)0x12, (q15_t)0x2fe, (q15_t)0x13, (q15_t)0x30b, (q15_t)0x13, (q15_t)0x317,
+    (q15_t)0x14, (q15_t)0x324, (q15_t)0x14, (q15_t)0x330, (q15_t)0x15, (q15_t)0x33d, (q15_t)0x16, (q15_t)0x34a,
+    (q15_t)0x16, (q15_t)0x356, (q15_t)0x17, (q15_t)0x363, (q15_t)0x18, (q15_t)0x36f, (q15_t)0x18, (q15_t)0x37c,
+    (q15_t)0x19, (q15_t)0x388, (q15_t)0x1a, (q15_t)0x395, (q15_t)0x1a, (q15_t)0x3a1, (q15_t)0x1b, (q15_t)0x3ae,
+    (q15_t)0x1c, (q15_t)0x3bb, (q15_t)0x1d, (q15_t)0x3c7, (q15_t)0x1d, (q15_t)0x3d4, (q15_t)0x1e, (q15_t)0x3e0,
+    (q15_t)0x1f, (q15_t)0x3ed, (q15_t)0x20, (q15_t)0x3f9, (q15_t)0x20, (q15_t)0x406, (q15_t)0x21, (q15_t)0x412,
+    (q15_t)0x22, (q15_t)0x41f, (q15_t)0x23, (q15_t)0x42b, (q15_t)0x24, (q15_t)0x438, (q15_t)0x24, (q15_t)0x444,
+    (q15_t)0x25, (q15_t)0x451, (q15_t)0x26, (q15_t)0x45e, (q15_t)0x27, (q15_t)0x46a, (q15_t)0x28, (q15_t)0x477,
+    (q15_t)0x29, (q15_t)0x483, (q15_t)0x2a, (q15_t)0x490, (q15_t)0x2b, (q15_t)0x49c, (q15_t)0x2b, (q15_t)0x4a9,
+    (q15_t)0x2c, (q15_t)0x4b5, (q15_t)0x2d, (q15_t)0x4c2, (q15_t)0x2e, (q15_t)0x4ce, (q15_t)0x2f, (q15_t)0x4db,
+    (q15_t)0x30, (q15_t)0x4e7, (q15_t)0x31, (q15_t)0x4f4, (q15_t)0x32, (q15_t)0x500, (q15_t)0x33, (q15_t)0x50d,
+    (q15_t)0x34, (q15_t)0x51a, (q15_t)0x35, (q15_t)0x526, (q15_t)0x36, (q15_t)0x533, (q15_t)0x37, (q15_t)0x53f,
+    (q15_t)0x38, (q15_t)0x54c, (q15_t)0x39, (q15_t)0x558, (q15_t)0x3a, (q15_t)0x565, (q15_t)0x3b, (q15_t)0x571,
+    (q15_t)0x3c, (q15_t)0x57e, (q15_t)0x3d, (q15_t)0x58a, (q15_t)0x3f, (q15_t)0x597, (q15_t)0x40, (q15_t)0x5a3,
+    (q15_t)0x41, (q15_t)0x5b0, (q15_t)0x42, (q15_t)0x5bc, (q15_t)0x43, (q15_t)0x5c9, (q15_t)0x44, (q15_t)0x5d5,
+    (q15_t)0x45, (q15_t)0x5e2, (q15_t)0x47, (q15_t)0x5ee, (q15_t)0x48, (q15_t)0x5fb, (q15_t)0x49, (q15_t)0x607,
+    (q15_t)0x4a, (q15_t)0x614, (q15_t)0x4b, (q15_t)0x620, (q15_t)0x4c, (q15_t)0x62d, (q15_t)0x4e, (q15_t)0x639,
+    (q15_t)0x4f, (q15_t)0x646, (q15_t)0x50, (q15_t)0x652, (q15_t)0x51, (q15_t)0x65f, (q15_t)0x53, (q15_t)0x66b,
+    (q15_t)0x54, (q15_t)0x678, (q15_t)0x55, (q15_t)0x684, (q15_t)0x56, (q15_t)0x691, (q15_t)0x58, (q15_t)0x69d,
+    (q15_t)0x59, (q15_t)0x6aa, (q15_t)0x5a, (q15_t)0x6b6, (q15_t)0x5c, (q15_t)0x6c3, (q15_t)0x5d, (q15_t)0x6cf,
+    (q15_t)0x5e, (q15_t)0x6dc, (q15_t)0x60, (q15_t)0x6e8, (q15_t)0x61, (q15_t)0x6f5, (q15_t)0x62, (q15_t)0x701,
+    (q15_t)0x64, (q15_t)0x70e, (q15_t)0x65, (q15_t)0x71a, (q15_t)0x67, (q15_t)0x727, (q15_t)0x68, (q15_t)0x733,
+    (q15_t)0x69, (q15_t)0x740, (q15_t)0x6b, (q15_t)0x74c, (q15_t)0x6c, (q15_t)0x759, (q15_t)0x6e, (q15_t)0x765,
+    (q15_t)0x6f, (q15_t)0x772, (q15_t)0x71, (q15_t)0x77e, (q15_t)0x72, (q15_t)0x78b, (q15_t)0x74, (q15_t)0x797,
+    (q15_t)0x75, (q15_t)0x7a4, (q15_t)0x77, (q15_t)0x7b0, (q15_t)0x78, (q15_t)0x7bd, (q15_t)0x7a, (q15_t)0x7c9,
+    (q15_t)0x7b, (q15_t)0x7d6, (q15_t)0x7d, (q15_t)0x7e2, (q15_t)0x7e, (q15_t)0x7ef, (q15_t)0x80, (q15_t)0x7fb,
+    (q15_t)0x81, (q15_t)0x807, (q15_t)0x83, (q15_t)0x814, (q15_t)0x85, (q15_t)0x820, (q15_t)0x86, (q15_t)0x82d,
+    (q15_t)0x88, (q15_t)0x839, (q15_t)0x89, (q15_t)0x846, (q15_t)0x8b, (q15_t)0x852, (q15_t)0x8d, (q15_t)0x85f,
+    (q15_t)0x8e, (q15_t)0x86b, (q15_t)0x90, (q15_t)0x878, (q15_t)0x92, (q15_t)0x884, (q15_t)0x93, (q15_t)0x891,
+    (q15_t)0x95, (q15_t)0x89d, (q15_t)0x97, (q15_t)0x8a9, (q15_t)0x98, (q15_t)0x8b6, (q15_t)0x9a, (q15_t)0x8c2,
+    (q15_t)0x9c, (q15_t)0x8cf, (q15_t)0x9e, (q15_t)0x8db, (q15_t)0x9f, (q15_t)0x8e8, (q15_t)0xa1, (q15_t)0x8f4,
+    (q15_t)0xa3, (q15_t)0x901, (q15_t)0xa5, (q15_t)0x90d, (q15_t)0xa6, (q15_t)0x919, (q15_t)0xa8, (q15_t)0x926,
+    (q15_t)0xaa, (q15_t)0x932, (q15_t)0xac, (q15_t)0x93f, (q15_t)0xae, (q15_t)0x94b, (q15_t)0xaf, (q15_t)0x958,
+    (q15_t)0xb1, (q15_t)0x964, (q15_t)0xb3, (q15_t)0x970, (q15_t)0xb5, (q15_t)0x97d, (q15_t)0xb7, (q15_t)0x989,
+    (q15_t)0xb9, (q15_t)0x996, (q15_t)0xbb, (q15_t)0x9a2, (q15_t)0xbd, (q15_t)0x9af, (q15_t)0xbe, (q15_t)0x9bb,
+    (q15_t)0xc0, (q15_t)0x9c7, (q15_t)0xc2, (q15_t)0x9d4, (q15_t)0xc4, (q15_t)0x9e0, (q15_t)0xc6, (q15_t)0x9ed,
+    (q15_t)0xc8, (q15_t)0x9f9, (q15_t)0xca, (q15_t)0xa06, (q15_t)0xcc, (q15_t)0xa12, (q15_t)0xce, (q15_t)0xa1e,
+    (q15_t)0xd0, (q15_t)0xa2b, (q15_t)0xd2, (q15_t)0xa37, (q15_t)0xd4, (q15_t)0xa44, (q15_t)0xd6, (q15_t)0xa50,
+    (q15_t)0xd8, (q15_t)0xa5c, (q15_t)0xda, (q15_t)0xa69, (q15_t)0xdc, (q15_t)0xa75, (q15_t)0xde, (q15_t)0xa82,
+    (q15_t)0xe0, (q15_t)0xa8e, (q15_t)0xe2, (q15_t)0xa9a, (q15_t)0xe4, (q15_t)0xaa7, (q15_t)0xe7, (q15_t)0xab3,
+    (q15_t)0xe9, (q15_t)0xac0, (q15_t)0xeb, (q15_t)0xacc, (q15_t)0xed, (q15_t)0xad8, (q15_t)0xef, (q15_t)0xae5,
+    (q15_t)0xf1, (q15_t)0xaf1, (q15_t)0xf3, (q15_t)0xafd, (q15_t)0xf6, (q15_t)0xb0a, (q15_t)0xf8, (q15_t)0xb16,
+    (q15_t)0xfa, (q15_t)0xb23, (q15_t)0xfc, (q15_t)0xb2f, (q15_t)0xfe, (q15_t)0xb3b, (q15_t)0x100, (q15_t)0xb48,
+    (q15_t)0x103, (q15_t)0xb54, (q15_t)0x105, (q15_t)0xb60, (q15_t)0x107, (q15_t)0xb6d, (q15_t)0x109, (q15_t)0xb79,
+    (q15_t)0x10c, (q15_t)0xb85, (q15_t)0x10e, (q15_t)0xb92, (q15_t)0x110, (q15_t)0xb9e, (q15_t)0x113, (q15_t)0xbab,
+    (q15_t)0x115, (q15_t)0xbb7, (q15_t)0x117, (q15_t)0xbc3, (q15_t)0x119, (q15_t)0xbd0, (q15_t)0x11c, (q15_t)0xbdc,
+    (q15_t)0x11e, (q15_t)0xbe8, (q15_t)0x120, (q15_t)0xbf5, (q15_t)0x123, (q15_t)0xc01, (q15_t)0x125, (q15_t)0xc0d,
+    (q15_t)0x128, (q15_t)0xc1a, (q15_t)0x12a, (q15_t)0xc26, (q15_t)0x12c, (q15_t)0xc32, (q15_t)0x12f, (q15_t)0xc3f,
+    (q15_t)0x131, (q15_t)0xc4b, (q15_t)0x134, (q15_t)0xc57, (q15_t)0x136, (q15_t)0xc64, (q15_t)0x138, (q15_t)0xc70,
+    (q15_t)0x13b, (q15_t)0xc7c, (q15_t)0x13d, (q15_t)0xc89, (q15_t)0x140, (q15_t)0xc95, (q15_t)0x142, (q15_t)0xca1,
+    (q15_t)0x145, (q15_t)0xcae, (q15_t)0x147, (q15_t)0xcba, (q15_t)0x14a, (q15_t)0xcc6, (q15_t)0x14c, (q15_t)0xcd3,
+    (q15_t)0x14f, (q15_t)0xcdf, (q15_t)0x151, (q15_t)0xceb, (q15_t)0x154, (q15_t)0xcf8, (q15_t)0x156, (q15_t)0xd04,
+    (q15_t)0x159, (q15_t)0xd10, (q15_t)0x15b, (q15_t)0xd1c, (q15_t)0x15e, (q15_t)0xd29, (q15_t)0x161, (q15_t)0xd35,
+    (q15_t)0x163, (q15_t)0xd41, (q15_t)0x166, (q15_t)0xd4e, (q15_t)0x168, (q15_t)0xd5a, (q15_t)0x16b, (q15_t)0xd66,
+    (q15_t)0x16e, (q15_t)0xd72, (q15_t)0x170, (q15_t)0xd7f, (q15_t)0x173, (q15_t)0xd8b, (q15_t)0x176, (q15_t)0xd97,
+    (q15_t)0x178, (q15_t)0xda4, (q15_t)0x17b, (q15_t)0xdb0, (q15_t)0x17e, (q15_t)0xdbc, (q15_t)0x180, (q15_t)0xdc8,
+    (q15_t)0x183, (q15_t)0xdd5, (q15_t)0x186, (q15_t)0xde1, (q15_t)0x189, (q15_t)0xded, (q15_t)0x18b, (q15_t)0xdf9,
+    (q15_t)0x18e, (q15_t)0xe06, (q15_t)0x191, (q15_t)0xe12, (q15_t)0x194, (q15_t)0xe1e, (q15_t)0x196, (q15_t)0xe2b,
+    (q15_t)0x199, (q15_t)0xe37, (q15_t)0x19c, (q15_t)0xe43, (q15_t)0x19f, (q15_t)0xe4f, (q15_t)0x1a2, (q15_t)0xe5c,
+    (q15_t)0x1a4, (q15_t)0xe68, (q15_t)0x1a7, (q15_t)0xe74, (q15_t)0x1aa, (q15_t)0xe80, (q15_t)0x1ad, (q15_t)0xe8c,
+    (q15_t)0x1b0, (q15_t)0xe99, (q15_t)0x1b3, (q15_t)0xea5, (q15_t)0x1b6, (q15_t)0xeb1, (q15_t)0x1b8, (q15_t)0xebd,
+    (q15_t)0x1bb, (q15_t)0xeca, (q15_t)0x1be, (q15_t)0xed6, (q15_t)0x1c1, (q15_t)0xee2, (q15_t)0x1c4, (q15_t)0xeee,
+    (q15_t)0x1c7, (q15_t)0xefb, (q15_t)0x1ca, (q15_t)0xf07, (q15_t)0x1cd, (q15_t)0xf13, (q15_t)0x1d0, (q15_t)0xf1f,
+    (q15_t)0x1d3, (q15_t)0xf2b, (q15_t)0x1d6, (q15_t)0xf38, (q15_t)0x1d9, (q15_t)0xf44, (q15_t)0x1dc, (q15_t)0xf50,
+    (q15_t)0x1df, (q15_t)0xf5c, (q15_t)0x1e2, (q15_t)0xf68, (q15_t)0x1e5, (q15_t)0xf75, (q15_t)0x1e8, (q15_t)0xf81,
+    (q15_t)0x1eb, (q15_t)0xf8d, (q15_t)0x1ee, (q15_t)0xf99, (q15_t)0x1f1, (q15_t)0xfa5, (q15_t)0x1f4, (q15_t)0xfb2,
+    (q15_t)0x1f7, (q15_t)0xfbe, (q15_t)0x1fa, (q15_t)0xfca, (q15_t)0x1fd, (q15_t)0xfd6, (q15_t)0x201, (q15_t)0xfe2,
+    (q15_t)0x204, (q15_t)0xfee, (q15_t)0x207, (q15_t)0xffb, (q15_t)0x20a, (q15_t)0x1007, (q15_t)0x20d, (q15_t)0x1013,
+    (q15_t)0x210, (q15_t)0x101f, (q15_t)0x213, (q15_t)0x102b, (q15_t)0x217, (q15_t)0x1037, (q15_t)0x21a, (q15_t)0x1044,
+    (q15_t)0x21d, (q15_t)0x1050, (q15_t)0x220, (q15_t)0x105c, (q15_t)0x223, (q15_t)0x1068, (q15_t)0x227, (q15_t)0x1074,
+    (q15_t)0x22a, (q15_t)0x1080, (q15_t)0x22d, (q15_t)0x108c, (q15_t)0x230, (q15_t)0x1099, (q15_t)0x234, (q15_t)0x10a5,
+    (q15_t)0x237, (q15_t)0x10b1, (q15_t)0x23a, (q15_t)0x10bd, (q15_t)0x23e, (q15_t)0x10c9, (q15_t)0x241, (q15_t)0x10d5,
+    (q15_t)0x244, (q15_t)0x10e1, (q15_t)0x247, (q15_t)0x10ed, (q15_t)0x24b, (q15_t)0x10fa, (q15_t)0x24e, (q15_t)0x1106,
+    (q15_t)0x251, (q15_t)0x1112, (q15_t)0x255, (q15_t)0x111e, (q15_t)0x258, (q15_t)0x112a, (q15_t)0x25c, (q15_t)0x1136,
+    (q15_t)0x25f, (q15_t)0x1142, (q15_t)0x262, (q15_t)0x114e, (q15_t)0x266, (q15_t)0x115a, (q15_t)0x269, (q15_t)0x1167,
+    (q15_t)0x26d, (q15_t)0x1173, (q15_t)0x270, (q15_t)0x117f, (q15_t)0x273, (q15_t)0x118b, (q15_t)0x277, (q15_t)0x1197,
+    (q15_t)0x27a, (q15_t)0x11a3, (q15_t)0x27e, (q15_t)0x11af, (q15_t)0x281, (q15_t)0x11bb, (q15_t)0x285, (q15_t)0x11c7,
+    (q15_t)0x288, (q15_t)0x11d3, (q15_t)0x28c, (q15_t)0x11df, (q15_t)0x28f, (q15_t)0x11eb, (q15_t)0x293, (q15_t)0x11f7,
+    (q15_t)0x296, (q15_t)0x1204, (q15_t)0x29a, (q15_t)0x1210, (q15_t)0x29d, (q15_t)0x121c, (q15_t)0x2a1, (q15_t)0x1228,
+    (q15_t)0x2a5, (q15_t)0x1234, (q15_t)0x2a8, (q15_t)0x1240, (q15_t)0x2ac, (q15_t)0x124c, (q15_t)0x2af, (q15_t)0x1258,
+    (q15_t)0x2b3, (q15_t)0x1264, (q15_t)0x2b7, (q15_t)0x1270, (q15_t)0x2ba, (q15_t)0x127c, (q15_t)0x2be, (q15_t)0x1288,
+    (q15_t)0x2c1, (q15_t)0x1294, (q15_t)0x2c5, (q15_t)0x12a0, (q15_t)0x2c9, (q15_t)0x12ac, (q15_t)0x2cc, (q15_t)0x12b8,
+    (q15_t)0x2d0, (q15_t)0x12c4, (q15_t)0x2d4, (q15_t)0x12d0, (q15_t)0x2d8, (q15_t)0x12dc, (q15_t)0x2db, (q15_t)0x12e8,
+    (q15_t)0x2df, (q15_t)0x12f4, (q15_t)0x2e3, (q15_t)0x1300, (q15_t)0x2e6, (q15_t)0x130c, (q15_t)0x2ea, (q15_t)0x1318,
+    (q15_t)0x2ee, (q15_t)0x1324, (q15_t)0x2f2, (q15_t)0x1330, (q15_t)0x2f5, (q15_t)0x133c, (q15_t)0x2f9, (q15_t)0x1348,
+    (q15_t)0x2fd, (q15_t)0x1354, (q15_t)0x301, (q15_t)0x1360, (q15_t)0x305, (q15_t)0x136c, (q15_t)0x308, (q15_t)0x1378,
+    (q15_t)0x30c, (q15_t)0x1384, (q15_t)0x310, (q15_t)0x1390, (q15_t)0x314, (q15_t)0x139c, (q15_t)0x318, (q15_t)0x13a8,
+    (q15_t)0x31c, (q15_t)0x13b4, (q15_t)0x320, (q15_t)0x13c0, (q15_t)0x323, (q15_t)0x13cc, (q15_t)0x327, (q15_t)0x13d8,
+    (q15_t)0x32b, (q15_t)0x13e4, (q15_t)0x32f, (q15_t)0x13f0, (q15_t)0x333, (q15_t)0x13fb, (q15_t)0x337, (q15_t)0x1407,
+    (q15_t)0x33b, (q15_t)0x1413, (q15_t)0x33f, (q15_t)0x141f, (q15_t)0x343, (q15_t)0x142b, (q15_t)0x347, (q15_t)0x1437,
+    (q15_t)0x34b, (q15_t)0x1443, (q15_t)0x34f, (q15_t)0x144f, (q15_t)0x353, (q15_t)0x145b, (q15_t)0x357, (q15_t)0x1467,
+    (q15_t)0x35b, (q15_t)0x1473, (q15_t)0x35f, (q15_t)0x147f, (q15_t)0x363, (q15_t)0x148b, (q15_t)0x367, (q15_t)0x1496,
+    (q15_t)0x36b, (q15_t)0x14a2, (q15_t)0x36f, (q15_t)0x14ae, (q15_t)0x373, (q15_t)0x14ba, (q15_t)0x377, (q15_t)0x14c6,
+    (q15_t)0x37b, (q15_t)0x14d2, (q15_t)0x37f, (q15_t)0x14de, (q15_t)0x383, (q15_t)0x14ea, (q15_t)0x387, (q15_t)0x14f6,
+    (q15_t)0x38c, (q15_t)0x1501, (q15_t)0x390, (q15_t)0x150d, (q15_t)0x394, (q15_t)0x1519, (q15_t)0x398, (q15_t)0x1525,
+    (q15_t)0x39c, (q15_t)0x1531, (q15_t)0x3a0, (q15_t)0x153d, (q15_t)0x3a5, (q15_t)0x1549, (q15_t)0x3a9, (q15_t)0x1554,
+    (q15_t)0x3ad, (q15_t)0x1560, (q15_t)0x3b1, (q15_t)0x156c, (q15_t)0x3b5, (q15_t)0x1578, (q15_t)0x3ba, (q15_t)0x1584,
+    (q15_t)0x3be, (q15_t)0x1590, (q15_t)0x3c2, (q15_t)0x159b, (q15_t)0x3c6, (q15_t)0x15a7, (q15_t)0x3ca, (q15_t)0x15b3,
+    (q15_t)0x3cf, (q15_t)0x15bf, (q15_t)0x3d3, (q15_t)0x15cb, (q15_t)0x3d7, (q15_t)0x15d7, (q15_t)0x3dc, (q15_t)0x15e2,
+    (q15_t)0x3e0, (q15_t)0x15ee, (q15_t)0x3e4, (q15_t)0x15fa, (q15_t)0x3e9, (q15_t)0x1606, (q15_t)0x3ed, (q15_t)0x1612,
+    (q15_t)0x3f1, (q15_t)0x161d, (q15_t)0x3f6, (q15_t)0x1629, (q15_t)0x3fa, (q15_t)0x1635, (q15_t)0x3fe, (q15_t)0x1641,
+    (q15_t)0x403, (q15_t)0x164c, (q15_t)0x407, (q15_t)0x1658, (q15_t)0x40b, (q15_t)0x1664, (q15_t)0x410, (q15_t)0x1670,
+    (q15_t)0x414, (q15_t)0x167c, (q15_t)0x419, (q15_t)0x1687, (q15_t)0x41d, (q15_t)0x1693, (q15_t)0x422, (q15_t)0x169f,
+    (q15_t)0x426, (q15_t)0x16ab, (q15_t)0x42a, (q15_t)0x16b6, (q15_t)0x42f, (q15_t)0x16c2, (q15_t)0x433, (q15_t)0x16ce,
+    (q15_t)0x438, (q15_t)0x16da, (q15_t)0x43c, (q15_t)0x16e5, (q15_t)0x441, (q15_t)0x16f1, (q15_t)0x445, (q15_t)0x16fd,
+    (q15_t)0x44a, (q15_t)0x1709, (q15_t)0x44e, (q15_t)0x1714, (q15_t)0x453, (q15_t)0x1720, (q15_t)0x457, (q15_t)0x172c,
+    (q15_t)0x45c, (q15_t)0x1737, (q15_t)0x461, (q15_t)0x1743, (q15_t)0x465, (q15_t)0x174f, (q15_t)0x46a, (q15_t)0x175b,
+    (q15_t)0x46e, (q15_t)0x1766, (q15_t)0x473, (q15_t)0x1772, (q15_t)0x478, (q15_t)0x177e, (q15_t)0x47c, (q15_t)0x1789,
+    (q15_t)0x481, (q15_t)0x1795, (q15_t)0x485, (q15_t)0x17a1, (q15_t)0x48a, (q15_t)0x17ac, (q15_t)0x48f, (q15_t)0x17b8,
+    (q15_t)0x493, (q15_t)0x17c4, (q15_t)0x498, (q15_t)0x17cf, (q15_t)0x49d, (q15_t)0x17db, (q15_t)0x4a1, (q15_t)0x17e7,
+    (q15_t)0x4a6, (q15_t)0x17f2, (q15_t)0x4ab, (q15_t)0x17fe, (q15_t)0x4b0, (q15_t)0x180a, (q15_t)0x4b4, (q15_t)0x1815,
+    (q15_t)0x4b9, (q15_t)0x1821, (q15_t)0x4be, (q15_t)0x182d, (q15_t)0x4c2, (q15_t)0x1838, (q15_t)0x4c7, (q15_t)0x1844,
+    (q15_t)0x4cc, (q15_t)0x184f, (q15_t)0x4d1, (q15_t)0x185b, (q15_t)0x4d6, (q15_t)0x1867, (q15_t)0x4da, (q15_t)0x1872,
+    (q15_t)0x4df, (q15_t)0x187e, (q15_t)0x4e4, (q15_t)0x1889, (q15_t)0x4e9, (q15_t)0x1895, (q15_t)0x4ee, (q15_t)0x18a1,
+    (q15_t)0x4f2, (q15_t)0x18ac, (q15_t)0x4f7, (q15_t)0x18b8, (q15_t)0x4fc, (q15_t)0x18c3, (q15_t)0x501, (q15_t)0x18cf,
+    (q15_t)0x506, (q15_t)0x18db, (q15_t)0x50b, (q15_t)0x18e6, (q15_t)0x510, (q15_t)0x18f2, (q15_t)0x515, (q15_t)0x18fd,
+    (q15_t)0x51a, (q15_t)0x1909, (q15_t)0x51e, (q15_t)0x1914, (q15_t)0x523, (q15_t)0x1920, (q15_t)0x528, (q15_t)0x192c,
+    (q15_t)0x52d, (q15_t)0x1937, (q15_t)0x532, (q15_t)0x1943, (q15_t)0x537, (q15_t)0x194e, (q15_t)0x53c, (q15_t)0x195a,
+    (q15_t)0x541, (q15_t)0x1965, (q15_t)0x546, (q15_t)0x1971, (q15_t)0x54b, (q15_t)0x197c, (q15_t)0x550, (q15_t)0x1988,
+    (q15_t)0x555, (q15_t)0x1993, (q15_t)0x55a, (q15_t)0x199f, (q15_t)0x55f, (q15_t)0x19aa, (q15_t)0x564, (q15_t)0x19b6,
+    (q15_t)0x569, (q15_t)0x19c1, (q15_t)0x56e, (q15_t)0x19cd, (q15_t)0x573, (q15_t)0x19d8, (q15_t)0x578, (q15_t)0x19e4,
+    (q15_t)0x57e, (q15_t)0x19ef, (q15_t)0x583, (q15_t)0x19fb, (q15_t)0x588, (q15_t)0x1a06, (q15_t)0x58d, (q15_t)0x1a12,
+    (q15_t)0x592, (q15_t)0x1a1d, (q15_t)0x597, (q15_t)0x1a29, (q15_t)0x59c, (q15_t)0x1a34, (q15_t)0x5a1, (q15_t)0x1a40,
+    (q15_t)0x5a7, (q15_t)0x1a4b, (q15_t)0x5ac, (q15_t)0x1a57, (q15_t)0x5b1, (q15_t)0x1a62, (q15_t)0x5b6, (q15_t)0x1a6e,
+    (q15_t)0x5bb, (q15_t)0x1a79, (q15_t)0x5c1, (q15_t)0x1a84, (q15_t)0x5c6, (q15_t)0x1a90, (q15_t)0x5cb, (q15_t)0x1a9b,
+    (q15_t)0x5d0, (q15_t)0x1aa7, (q15_t)0x5d5, (q15_t)0x1ab2, (q15_t)0x5db, (q15_t)0x1abe, (q15_t)0x5e0, (q15_t)0x1ac9,
+    (q15_t)0x5e5, (q15_t)0x1ad4, (q15_t)0x5ea, (q15_t)0x1ae0, (q15_t)0x5f0, (q15_t)0x1aeb, (q15_t)0x5f5, (q15_t)0x1af7,
+    (q15_t)0x5fa, (q15_t)0x1b02, (q15_t)0x600, (q15_t)0x1b0d, (q15_t)0x605, (q15_t)0x1b19, (q15_t)0x60a, (q15_t)0x1b24,
+    (q15_t)0x610, (q15_t)0x1b30, (q15_t)0x615, (q15_t)0x1b3b, (q15_t)0x61a, (q15_t)0x1b46, (q15_t)0x620, (q15_t)0x1b52,
+    (q15_t)0x625, (q15_t)0x1b5d, (q15_t)0x62a, (q15_t)0x1b68, (q15_t)0x630, (q15_t)0x1b74, (q15_t)0x635, (q15_t)0x1b7f,
+    (q15_t)0x63b, (q15_t)0x1b8a, (q15_t)0x640, (q15_t)0x1b96, (q15_t)0x645, (q15_t)0x1ba1, (q15_t)0x64b, (q15_t)0x1bac,
+    (q15_t)0x650, (q15_t)0x1bb8, (q15_t)0x656, (q15_t)0x1bc3, (q15_t)0x65b, (q15_t)0x1bce, (q15_t)0x661, (q15_t)0x1bda,
+    (q15_t)0x666, (q15_t)0x1be5, (q15_t)0x66c, (q15_t)0x1bf0, (q15_t)0x671, (q15_t)0x1bfc, (q15_t)0x677, (q15_t)0x1c07,
+    (q15_t)0x67c, (q15_t)0x1c12, (q15_t)0x682, (q15_t)0x1c1e, (q15_t)0x687, (q15_t)0x1c29, (q15_t)0x68d, (q15_t)0x1c34,
+    (q15_t)0x692, (q15_t)0x1c3f, (q15_t)0x698, (q15_t)0x1c4b, (q15_t)0x69d, (q15_t)0x1c56, (q15_t)0x6a3, (q15_t)0x1c61,
+    (q15_t)0x6a8, (q15_t)0x1c6c, (q15_t)0x6ae, (q15_t)0x1c78, (q15_t)0x6b4, (q15_t)0x1c83, (q15_t)0x6b9, (q15_t)0x1c8e,
+    (q15_t)0x6bf, (q15_t)0x1c99, (q15_t)0x6c5, (q15_t)0x1ca5, (q15_t)0x6ca, (q15_t)0x1cb0, (q15_t)0x6d0, (q15_t)0x1cbb,
+    (q15_t)0x6d5, (q15_t)0x1cc6, (q15_t)0x6db, (q15_t)0x1cd2, (q15_t)0x6e1, (q15_t)0x1cdd, (q15_t)0x6e6, (q15_t)0x1ce8,
+    (q15_t)0x6ec, (q15_t)0x1cf3, (q15_t)0x6f2, (q15_t)0x1cff, (q15_t)0x6f7, (q15_t)0x1d0a, (q15_t)0x6fd, (q15_t)0x1d15,
+    (q15_t)0x703, (q15_t)0x1d20, (q15_t)0x709, (q15_t)0x1d2b, (q15_t)0x70e, (q15_t)0x1d36, (q15_t)0x714, (q15_t)0x1d42,
+    (q15_t)0x71a, (q15_t)0x1d4d, (q15_t)0x720, (q15_t)0x1d58, (q15_t)0x725, (q15_t)0x1d63, (q15_t)0x72b, (q15_t)0x1d6e,
+    (q15_t)0x731, (q15_t)0x1d79, (q15_t)0x737, (q15_t)0x1d85, (q15_t)0x73d, (q15_t)0x1d90, (q15_t)0x742, (q15_t)0x1d9b,
+    (q15_t)0x748, (q15_t)0x1da6, (q15_t)0x74e, (q15_t)0x1db1, (q15_t)0x754, (q15_t)0x1dbc, (q15_t)0x75a, (q15_t)0x1dc7,
+    (q15_t)0x75f, (q15_t)0x1dd3, (q15_t)0x765, (q15_t)0x1dde, (q15_t)0x76b, (q15_t)0x1de9, (q15_t)0x771, (q15_t)0x1df4,
+    (q15_t)0x777, (q15_t)0x1dff, (q15_t)0x77d, (q15_t)0x1e0a, (q15_t)0x783, (q15_t)0x1e15, (q15_t)0x789, (q15_t)0x1e20,
+    (q15_t)0x78f, (q15_t)0x1e2b, (q15_t)0x795, (q15_t)0x1e36, (q15_t)0x79a, (q15_t)0x1e42, (q15_t)0x7a0, (q15_t)0x1e4d,
+    (q15_t)0x7a6, (q15_t)0x1e58, (q15_t)0x7ac, (q15_t)0x1e63, (q15_t)0x7b2, (q15_t)0x1e6e, (q15_t)0x7b8, (q15_t)0x1e79,
+    (q15_t)0x7be, (q15_t)0x1e84, (q15_t)0x7c4, (q15_t)0x1e8f, (q15_t)0x7ca, (q15_t)0x1e9a, (q15_t)0x7d0, (q15_t)0x1ea5,
+    (q15_t)0x7d6, (q15_t)0x1eb0, (q15_t)0x7dc, (q15_t)0x1ebb, (q15_t)0x7e2, (q15_t)0x1ec6, (q15_t)0x7e8, (q15_t)0x1ed1,
+    (q15_t)0x7ee, (q15_t)0x1edc, (q15_t)0x7f5, (q15_t)0x1ee7, (q15_t)0x7fb, (q15_t)0x1ef2, (q15_t)0x801, (q15_t)0x1efd,
+    (q15_t)0x807, (q15_t)0x1f08, (q15_t)0x80d, (q15_t)0x1f13, (q15_t)0x813, (q15_t)0x1f1e, (q15_t)0x819, (q15_t)0x1f29,
+    (q15_t)0x81f, (q15_t)0x1f34, (q15_t)0x825, (q15_t)0x1f3f, (q15_t)0x82b, (q15_t)0x1f4a, (q15_t)0x832, (q15_t)0x1f55,
+    (q15_t)0x838, (q15_t)0x1f60, (q15_t)0x83e, (q15_t)0x1f6b, (q15_t)0x844, (q15_t)0x1f76, (q15_t)0x84a, (q15_t)0x1f81,
+    (q15_t)0x850, (q15_t)0x1f8c, (q15_t)0x857, (q15_t)0x1f97, (q15_t)0x85d, (q15_t)0x1fa2, (q15_t)0x863, (q15_t)0x1fac,
+    (q15_t)0x869, (q15_t)0x1fb7, (q15_t)0x870, (q15_t)0x1fc2, (q15_t)0x876, (q15_t)0x1fcd, (q15_t)0x87c, (q15_t)0x1fd8,
+    (q15_t)0x882, (q15_t)0x1fe3, (q15_t)0x889, (q15_t)0x1fee, (q15_t)0x88f, (q15_t)0x1ff9, (q15_t)0x895, (q15_t)0x2004,
+    (q15_t)0x89b, (q15_t)0x200f, (q15_t)0x8a2, (q15_t)0x2019, (q15_t)0x8a8, (q15_t)0x2024, (q15_t)0x8ae, (q15_t)0x202f,
+    (q15_t)0x8b5, (q15_t)0x203a, (q15_t)0x8bb, (q15_t)0x2045, (q15_t)0x8c1, (q15_t)0x2050, (q15_t)0x8c8, (q15_t)0x205b,
+    (q15_t)0x8ce, (q15_t)0x2065, (q15_t)0x8d4, (q15_t)0x2070, (q15_t)0x8db, (q15_t)0x207b, (q15_t)0x8e1, (q15_t)0x2086,
+    (q15_t)0x8e8, (q15_t)0x2091, (q15_t)0x8ee, (q15_t)0x209b, (q15_t)0x8f4, (q15_t)0x20a6, (q15_t)0x8fb, (q15_t)0x20b1,
+    (q15_t)0x901, (q15_t)0x20bc, (q15_t)0x908, (q15_t)0x20c7, (q15_t)0x90e, (q15_t)0x20d1, (q15_t)0x915, (q15_t)0x20dc,
+    (q15_t)0x91b, (q15_t)0x20e7, (q15_t)0x921, (q15_t)0x20f2, (q15_t)0x928, (q15_t)0x20fd, (q15_t)0x92e, (q15_t)0x2107,
+    (q15_t)0x935, (q15_t)0x2112, (q15_t)0x93b, (q15_t)0x211d, (q15_t)0x942, (q15_t)0x2128, (q15_t)0x948, (q15_t)0x2132,
+    (q15_t)0x94f, (q15_t)0x213d, (q15_t)0x955, (q15_t)0x2148, (q15_t)0x95c, (q15_t)0x2153, (q15_t)0x963, (q15_t)0x215d,
+    (q15_t)0x969, (q15_t)0x2168, (q15_t)0x970, (q15_t)0x2173, (q15_t)0x976, (q15_t)0x217d, (q15_t)0x97d, (q15_t)0x2188,
+    (q15_t)0x983, (q15_t)0x2193, (q15_t)0x98a, (q15_t)0x219e, (q15_t)0x991, (q15_t)0x21a8, (q15_t)0x997, (q15_t)0x21b3,
+    (q15_t)0x99e, (q15_t)0x21be, (q15_t)0x9a4, (q15_t)0x21c8, (q15_t)0x9ab, (q15_t)0x21d3, (q15_t)0x9b2, (q15_t)0x21de,
+    (q15_t)0x9b8, (q15_t)0x21e8, (q15_t)0x9bf, (q15_t)0x21f3, (q15_t)0x9c6, (q15_t)0x21fe, (q15_t)0x9cc, (q15_t)0x2208,
+    (q15_t)0x9d3, (q15_t)0x2213, (q15_t)0x9da, (q15_t)0x221e, (q15_t)0x9e0, (q15_t)0x2228, (q15_t)0x9e7, (q15_t)0x2233,
+    (q15_t)0x9ee, (q15_t)0x223d, (q15_t)0x9f5, (q15_t)0x2248, (q15_t)0x9fb, (q15_t)0x2253, (q15_t)0xa02, (q15_t)0x225d,
+    (q15_t)0xa09, (q15_t)0x2268, (q15_t)0xa10, (q15_t)0x2272, (q15_t)0xa16, (q15_t)0x227d, (q15_t)0xa1d, (q15_t)0x2288,
+    (q15_t)0xa24, (q15_t)0x2292, (q15_t)0xa2b, (q15_t)0x229d, (q15_t)0xa32, (q15_t)0x22a7, (q15_t)0xa38, (q15_t)0x22b2,
+    (q15_t)0xa3f, (q15_t)0x22bc, (q15_t)0xa46, (q15_t)0x22c7, (q15_t)0xa4d, (q15_t)0x22d2, (q15_t)0xa54, (q15_t)0x22dc,
+    (q15_t)0xa5b, (q15_t)0x22e7, (q15_t)0xa61, (q15_t)0x22f1, (q15_t)0xa68, (q15_t)0x22fc, (q15_t)0xa6f, (q15_t)0x2306,
+    (q15_t)0xa76, (q15_t)0x2311, (q15_t)0xa7d, (q15_t)0x231b, (q15_t)0xa84, (q15_t)0x2326, (q15_t)0xa8b, (q15_t)0x2330,
+    (q15_t)0xa92, (q15_t)0x233b, (q15_t)0xa99, (q15_t)0x2345, (q15_t)0xa9f, (q15_t)0x2350, (q15_t)0xaa6, (q15_t)0x235a,
+    (q15_t)0xaad, (q15_t)0x2365, (q15_t)0xab4, (q15_t)0x236f, (q15_t)0xabb, (q15_t)0x237a, (q15_t)0xac2, (q15_t)0x2384,
+    (q15_t)0xac9, (q15_t)0x238e, (q15_t)0xad0, (q15_t)0x2399, (q15_t)0xad7, (q15_t)0x23a3, (q15_t)0xade, (q15_t)0x23ae,
+    (q15_t)0xae5, (q15_t)0x23b8, (q15_t)0xaec, (q15_t)0x23c3, (q15_t)0xaf3, (q15_t)0x23cd, (q15_t)0xafa, (q15_t)0x23d7,
+    (q15_t)0xb01, (q15_t)0x23e2, (q15_t)0xb08, (q15_t)0x23ec, (q15_t)0xb0f, (q15_t)0x23f7, (q15_t)0xb16, (q15_t)0x2401,
+    (q15_t)0xb1e, (q15_t)0x240b, (q15_t)0xb25, (q15_t)0x2416, (q15_t)0xb2c, (q15_t)0x2420, (q15_t)0xb33, (q15_t)0x242b,
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+    (q15_t)0xb56, (q15_t)0x245e, (q15_t)0xb5e, (q15_t)0x2469, (q15_t)0xb65, (q15_t)0x2473, (q15_t)0xb6c, (q15_t)0x247d,
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+    (q15_t)0xb90, (q15_t)0x24b1, (q15_t)0xb97, (q15_t)0x24bb, (q15_t)0xb9e, (q15_t)0x24c5, (q15_t)0xba5, (q15_t)0x24d0,
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+    (q15_t)0xbca, (q15_t)0x2503, (q15_t)0xbd1, (q15_t)0x250d, (q15_t)0xbd8, (q15_t)0x2518, (q15_t)0xbe0, (q15_t)0x2522,
+    (q15_t)0xbe7, (q15_t)0x252c, (q15_t)0xbee, (q15_t)0x2536, (q15_t)0xbf5, (q15_t)0x2541, (q15_t)0xbfd, (q15_t)0x254b,
+    (q15_t)0xc04, (q15_t)0x2555, (q15_t)0xc0b, (q15_t)0x255f, (q15_t)0xc13, (q15_t)0x2569, (q15_t)0xc1a, (q15_t)0x2574,
+    (q15_t)0xc21, (q15_t)0x257e, (q15_t)0xc29, (q15_t)0x2588, (q15_t)0xc30, (q15_t)0x2592, (q15_t)0xc38, (q15_t)0x259c,
+    (q15_t)0xc3f, (q15_t)0x25a6, (q15_t)0xc46, (q15_t)0x25b1, (q15_t)0xc4e, (q15_t)0x25bb, (q15_t)0xc55, (q15_t)0x25c5,
+    (q15_t)0xc5d, (q15_t)0x25cf, (q15_t)0xc64, (q15_t)0x25d9, (q15_t)0xc6b, (q15_t)0x25e3, (q15_t)0xc73, (q15_t)0x25ed,
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+    (q15_t)0xcb6, (q15_t)0x2648, (q15_t)0xcbe, (q15_t)0x2652, (q15_t)0xcc5, (q15_t)0x265c, (q15_t)0xccd, (q15_t)0x2666,
+    (q15_t)0xcd4, (q15_t)0x2671, (q15_t)0xcdc, (q15_t)0x267b, (q15_t)0xce3, (q15_t)0x2685, (q15_t)0xceb, (q15_t)0x268f,
+    (q15_t)0xcf3, (q15_t)0x2699, (q15_t)0xcfa, (q15_t)0x26a3, (q15_t)0xd02, (q15_t)0x26ad, (q15_t)0xd09, (q15_t)0x26b7,
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+    (q15_t)0xd30, (q15_t)0x26e9, (q15_t)0xd37, (q15_t)0x26f3, (q15_t)0xd3f, (q15_t)0x26fd, (q15_t)0xd46, (q15_t)0x2707,
+    (q15_t)0xd4e, (q15_t)0x2711, (q15_t)0xd56, (q15_t)0x271a, (q15_t)0xd5d, (q15_t)0x2724, (q15_t)0xd65, (q15_t)0x272e,
+    (q15_t)0xd6d, (q15_t)0x2738, (q15_t)0xd75, (q15_t)0x2742, (q15_t)0xd7c, (q15_t)0x274c, (q15_t)0xd84, (q15_t)0x2756,
+    (q15_t)0xd8c, (q15_t)0x2760, (q15_t)0xd93, (q15_t)0x276a, (q15_t)0xd9b, (q15_t)0x2774, (q15_t)0xda3, (q15_t)0x277e,
+    (q15_t)0xdab, (q15_t)0x2788, (q15_t)0xdb2, (q15_t)0x2791, (q15_t)0xdba, (q15_t)0x279b, (q15_t)0xdc2, (q15_t)0x27a5,
+    (q15_t)0xdca, (q15_t)0x27af, (q15_t)0xdd2, (q15_t)0x27b9, (q15_t)0xdd9, (q15_t)0x27c3, (q15_t)0xde1, (q15_t)0x27cd,
+    (q15_t)0xde9, (q15_t)0x27d6, (q15_t)0xdf1, (q15_t)0x27e0, (q15_t)0xdf9, (q15_t)0x27ea, (q15_t)0xe01, (q15_t)0x27f4,
+    (q15_t)0xe08, (q15_t)0x27fe, (q15_t)0xe10, (q15_t)0x2808, (q15_t)0xe18, (q15_t)0x2811, (q15_t)0xe20, (q15_t)0x281b,
+    (q15_t)0xe28, (q15_t)0x2825, (q15_t)0xe30, (q15_t)0x282f, (q15_t)0xe38, (q15_t)0x2838, (q15_t)0xe40, (q15_t)0x2842,
+    (q15_t)0xe47, (q15_t)0x284c, (q15_t)0xe4f, (q15_t)0x2856, (q15_t)0xe57, (q15_t)0x2860, (q15_t)0xe5f, (q15_t)0x2869,
+    (q15_t)0xe67, (q15_t)0x2873, (q15_t)0xe6f, (q15_t)0x287d, (q15_t)0xe77, (q15_t)0x2886, (q15_t)0xe7f, (q15_t)0x2890,
+    (q15_t)0xe87, (q15_t)0x289a, (q15_t)0xe8f, (q15_t)0x28a4, (q15_t)0xe97, (q15_t)0x28ad, (q15_t)0xe9f, (q15_t)0x28b7,
+    (q15_t)0xea7, (q15_t)0x28c1, (q15_t)0xeaf, (q15_t)0x28ca, (q15_t)0xeb7, (q15_t)0x28d4, (q15_t)0xebf, (q15_t)0x28de,
+    (q15_t)0xec7, (q15_t)0x28e7, (q15_t)0xecf, (q15_t)0x28f1, (q15_t)0xed7, (q15_t)0x28fb, (q15_t)0xedf, (q15_t)0x2904,
+    (q15_t)0xee7, (q15_t)0x290e, (q15_t)0xeef, (q15_t)0x2918, (q15_t)0xef7, (q15_t)0x2921, (q15_t)0xeff, (q15_t)0x292b,
+    (q15_t)0xf07, (q15_t)0x2935, (q15_t)0xf10, (q15_t)0x293e, (q15_t)0xf18, (q15_t)0x2948, (q15_t)0xf20, (q15_t)0x2951,
+    (q15_t)0xf28, (q15_t)0x295b, (q15_t)0xf30, (q15_t)0x2965, (q15_t)0xf38, (q15_t)0x296e, (q15_t)0xf40, (q15_t)0x2978,
+    (q15_t)0xf48, (q15_t)0x2981, (q15_t)0xf51, (q15_t)0x298b, (q15_t)0xf59, (q15_t)0x2994, (q15_t)0xf61, (q15_t)0x299e,
+    (q15_t)0xf69, (q15_t)0x29a7, (q15_t)0xf71, (q15_t)0x29b1, (q15_t)0xf79, (q15_t)0x29bb, (q15_t)0xf82, (q15_t)0x29c4,
+    (q15_t)0xf8a, (q15_t)0x29ce, (q15_t)0xf92, (q15_t)0x29d7, (q15_t)0xf9a, (q15_t)0x29e1, (q15_t)0xfa3, (q15_t)0x29ea,
+    (q15_t)0xfab, (q15_t)0x29f4, (q15_t)0xfb3, (q15_t)0x29fd, (q15_t)0xfbb, (q15_t)0x2a07, (q15_t)0xfc4, (q15_t)0x2a10,
+    (q15_t)0xfcc, (q15_t)0x2a1a, (q15_t)0xfd4, (q15_t)0x2a23, (q15_t)0xfdc, (q15_t)0x2a2c, (q15_t)0xfe5, (q15_t)0x2a36,
+    (q15_t)0xfed, (q15_t)0x2a3f, (q15_t)0xff5, (q15_t)0x2a49, (q15_t)0xffe, (q15_t)0x2a52, (q15_t)0x1006, (q15_t)0x2a5c,
+    (q15_t)0x100e, (q15_t)0x2a65, (q15_t)0x1016, (q15_t)0x2a6e, (q15_t)0x101f, (q15_t)0x2a78, (q15_t)0x1027, (q15_t)0x2a81,
+    (q15_t)0x1030, (q15_t)0x2a8b, (q15_t)0x1038, (q15_t)0x2a94, (q15_t)0x1040, (q15_t)0x2a9d, (q15_t)0x1049, (q15_t)0x2aa7,
+    (q15_t)0x1051, (q15_t)0x2ab0, (q15_t)0x1059, (q15_t)0x2ab9, (q15_t)0x1062, (q15_t)0x2ac3, (q15_t)0x106a, (q15_t)0x2acc,
+    (q15_t)0x1073, (q15_t)0x2ad6, (q15_t)0x107b, (q15_t)0x2adf, (q15_t)0x1083, (q15_t)0x2ae8, (q15_t)0x108c, (q15_t)0x2af2,
+    (q15_t)0x1094, (q15_t)0x2afb, (q15_t)0x109d, (q15_t)0x2b04, (q15_t)0x10a5, (q15_t)0x2b0d, (q15_t)0x10ae, (q15_t)0x2b17,
+    (q15_t)0x10b6, (q15_t)0x2b20, (q15_t)0x10bf, (q15_t)0x2b29, (q15_t)0x10c7, (q15_t)0x2b33, (q15_t)0x10d0, (q15_t)0x2b3c,
+    (q15_t)0x10d8, (q15_t)0x2b45, (q15_t)0x10e0, (q15_t)0x2b4e, (q15_t)0x10e9, (q15_t)0x2b58, (q15_t)0x10f2, (q15_t)0x2b61,
+    (q15_t)0x10fa, (q15_t)0x2b6a, (q15_t)0x1103, (q15_t)0x2b73, (q15_t)0x110b, (q15_t)0x2b7d, (q15_t)0x1114, (q15_t)0x2b86,
+    (q15_t)0x111c, (q15_t)0x2b8f, (q15_t)0x1125, (q15_t)0x2b98, (q15_t)0x112d, (q15_t)0x2ba1, (q15_t)0x1136, (q15_t)0x2bab,
+    (q15_t)0x113e, (q15_t)0x2bb4, (q15_t)0x1147, (q15_t)0x2bbd, (q15_t)0x1150, (q15_t)0x2bc6, (q15_t)0x1158, (q15_t)0x2bcf,
+    (q15_t)0x1161, (q15_t)0x2bd8, (q15_t)0x1169, (q15_t)0x2be2, (q15_t)0x1172, (q15_t)0x2beb, (q15_t)0x117b, (q15_t)0x2bf4,
+    (q15_t)0x1183, (q15_t)0x2bfd, (q15_t)0x118c, (q15_t)0x2c06, (q15_t)0x1195, (q15_t)0x2c0f, (q15_t)0x119d, (q15_t)0x2c18,
+    (q15_t)0x11a6, (q15_t)0x2c21, (q15_t)0x11af, (q15_t)0x2c2b, (q15_t)0x11b7, (q15_t)0x2c34, (q15_t)0x11c0, (q15_t)0x2c3d,
+    (q15_t)0x11c9, (q15_t)0x2c46, (q15_t)0x11d1, (q15_t)0x2c4f, (q15_t)0x11da, (q15_t)0x2c58, (q15_t)0x11e3, (q15_t)0x2c61,
+    (q15_t)0x11eb, (q15_t)0x2c6a, (q15_t)0x11f4, (q15_t)0x2c73, (q15_t)0x11fd, (q15_t)0x2c7c, (q15_t)0x1206, (q15_t)0x2c85,
+    (q15_t)0x120e, (q15_t)0x2c8e, (q15_t)0x1217, (q15_t)0x2c97, (q15_t)0x1220, (q15_t)0x2ca0, (q15_t)0x1229, (q15_t)0x2ca9,
+    (q15_t)0x1231, (q15_t)0x2cb2, (q15_t)0x123a, (q15_t)0x2cbb, (q15_t)0x1243, (q15_t)0x2cc4, (q15_t)0x124c, (q15_t)0x2ccd,
+    (q15_t)0x1255, (q15_t)0x2cd6, (q15_t)0x125d, (q15_t)0x2cdf, (q15_t)0x1266, (q15_t)0x2ce8, (q15_t)0x126f, (q15_t)0x2cf1,
+    (q15_t)0x1278, (q15_t)0x2cfa, (q15_t)0x1281, (q15_t)0x2d03, (q15_t)0x128a, (q15_t)0x2d0c, (q15_t)0x1292, (q15_t)0x2d15,
+    (q15_t)0x129b, (q15_t)0x2d1e, (q15_t)0x12a4, (q15_t)0x2d27, (q15_t)0x12ad, (q15_t)0x2d2f, (q15_t)0x12b6, (q15_t)0x2d38,
+    (q15_t)0x12bf, (q15_t)0x2d41, (q15_t)0x12c8, (q15_t)0x2d4a, (q15_t)0x12d1, (q15_t)0x2d53, (q15_t)0x12d9, (q15_t)0x2d5c,
+    (q15_t)0x12e2, (q15_t)0x2d65, (q15_t)0x12eb, (q15_t)0x2d6e, (q15_t)0x12f4, (q15_t)0x2d76, (q15_t)0x12fd, (q15_t)0x2d7f,
+    (q15_t)0x1306, (q15_t)0x2d88, (q15_t)0x130f, (q15_t)0x2d91, (q15_t)0x1318, (q15_t)0x2d9a, (q15_t)0x1321, (q15_t)0x2da3,
+    (q15_t)0x132a, (q15_t)0x2dab, (q15_t)0x1333, (q15_t)0x2db4, (q15_t)0x133c, (q15_t)0x2dbd, (q15_t)0x1345, (q15_t)0x2dc6,
+    (q15_t)0x134e, (q15_t)0x2dcf, (q15_t)0x1357, (q15_t)0x2dd7, (q15_t)0x1360, (q15_t)0x2de0, (q15_t)0x1369, (q15_t)0x2de9,
+    (q15_t)0x1372, (q15_t)0x2df2, (q15_t)0x137b, (q15_t)0x2dfa, (q15_t)0x1384, (q15_t)0x2e03, (q15_t)0x138d, (q15_t)0x2e0c,
+    (q15_t)0x1396, (q15_t)0x2e15, (q15_t)0x139f, (q15_t)0x2e1d, (q15_t)0x13a8, (q15_t)0x2e26, (q15_t)0x13b1, (q15_t)0x2e2f,
+    (q15_t)0x13ba, (q15_t)0x2e37, (q15_t)0x13c3, (q15_t)0x2e40, (q15_t)0x13cc, (q15_t)0x2e49, (q15_t)0x13d5, (q15_t)0x2e51,
+    (q15_t)0x13df, (q15_t)0x2e5a, (q15_t)0x13e8, (q15_t)0x2e63, (q15_t)0x13f1, (q15_t)0x2e6b, (q15_t)0x13fa, (q15_t)0x2e74,
+    (q15_t)0x1403, (q15_t)0x2e7d, (q15_t)0x140c, (q15_t)0x2e85, (q15_t)0x1415, (q15_t)0x2e8e, (q15_t)0x141e, (q15_t)0x2e97,
+    (q15_t)0x1428, (q15_t)0x2e9f, (q15_t)0x1431, (q15_t)0x2ea8, (q15_t)0x143a, (q15_t)0x2eb0, (q15_t)0x1443, (q15_t)0x2eb9,
+    (q15_t)0x144c, (q15_t)0x2ec2, (q15_t)0x1455, (q15_t)0x2eca, (q15_t)0x145f, (q15_t)0x2ed3, (q15_t)0x1468, (q15_t)0x2edb,
+    (q15_t)0x1471, (q15_t)0x2ee4, (q15_t)0x147a, (q15_t)0x2eec, (q15_t)0x1483, (q15_t)0x2ef5, (q15_t)0x148d, (q15_t)0x2efd,
+    (q15_t)0x1496, (q15_t)0x2f06, (q15_t)0x149f, (q15_t)0x2f0e, (q15_t)0x14a8, (q15_t)0x2f17, (q15_t)0x14b2, (q15_t)0x2f20,
+    (q15_t)0x14bb, (q15_t)0x2f28, (q15_t)0x14c4, (q15_t)0x2f30, (q15_t)0x14cd, (q15_t)0x2f39, (q15_t)0x14d7, (q15_t)0x2f41,
+    (q15_t)0x14e0, (q15_t)0x2f4a, (q15_t)0x14e9, (q15_t)0x2f52, (q15_t)0x14f3, (q15_t)0x2f5b, (q15_t)0x14fc, (q15_t)0x2f63,
+    (q15_t)0x1505, (q15_t)0x2f6c, (q15_t)0x150e, (q15_t)0x2f74, (q15_t)0x1518, (q15_t)0x2f7d, (q15_t)0x1521, (q15_t)0x2f85,
+    (q15_t)0x152a, (q15_t)0x2f8d, (q15_t)0x1534, (q15_t)0x2f96, (q15_t)0x153d, (q15_t)0x2f9e, (q15_t)0x1547, (q15_t)0x2fa7,
+    (q15_t)0x1550, (q15_t)0x2faf, (q15_t)0x1559, (q15_t)0x2fb7, (q15_t)0x1563, (q15_t)0x2fc0, (q15_t)0x156c, (q15_t)0x2fc8,
+    (q15_t)0x1575, (q15_t)0x2fd0, (q15_t)0x157f, (q15_t)0x2fd9, (q15_t)0x1588, (q15_t)0x2fe1, (q15_t)0x1592, (q15_t)0x2fea,
+    (q15_t)0x159b, (q15_t)0x2ff2, (q15_t)0x15a4, (q15_t)0x2ffa, (q15_t)0x15ae, (q15_t)0x3002, (q15_t)0x15b7, (q15_t)0x300b,
+    (q15_t)0x15c1, (q15_t)0x3013, (q15_t)0x15ca, (q15_t)0x301b, (q15_t)0x15d4, (q15_t)0x3024, (q15_t)0x15dd, (q15_t)0x302c,
+    (q15_t)0x15e6, (q15_t)0x3034, (q15_t)0x15f0, (q15_t)0x303c, (q15_t)0x15f9, (q15_t)0x3045, (q15_t)0x1603, (q15_t)0x304d,
+    (q15_t)0x160c, (q15_t)0x3055, (q15_t)0x1616, (q15_t)0x305d, (q15_t)0x161f, (q15_t)0x3066, (q15_t)0x1629, (q15_t)0x306e,
+    (q15_t)0x1632, (q15_t)0x3076, (q15_t)0x163c, (q15_t)0x307e, (q15_t)0x1645, (q15_t)0x3087, (q15_t)0x164f, (q15_t)0x308f,
+    (q15_t)0x1659, (q15_t)0x3097, (q15_t)0x1662, (q15_t)0x309f, (q15_t)0x166c, (q15_t)0x30a7, (q15_t)0x1675, (q15_t)0x30af,
+    (q15_t)0x167f, (q15_t)0x30b8, (q15_t)0x1688, (q15_t)0x30c0, (q15_t)0x1692, (q15_t)0x30c8, (q15_t)0x169b, (q15_t)0x30d0,
+    (q15_t)0x16a5, (q15_t)0x30d8, (q15_t)0x16af, (q15_t)0x30e0, (q15_t)0x16b8, (q15_t)0x30e8, (q15_t)0x16c2, (q15_t)0x30f0,
+    (q15_t)0x16cb, (q15_t)0x30f9, (q15_t)0x16d5, (q15_t)0x3101, (q15_t)0x16df, (q15_t)0x3109, (q15_t)0x16e8, (q15_t)0x3111,
+    (q15_t)0x16f2, (q15_t)0x3119, (q15_t)0x16fc, (q15_t)0x3121, (q15_t)0x1705, (q15_t)0x3129, (q15_t)0x170f, (q15_t)0x3131,
+    (q15_t)0x1719, (q15_t)0x3139, (q15_t)0x1722, (q15_t)0x3141, (q15_t)0x172c, (q15_t)0x3149, (q15_t)0x1736, (q15_t)0x3151,
+    (q15_t)0x173f, (q15_t)0x3159, (q15_t)0x1749, (q15_t)0x3161, (q15_t)0x1753, (q15_t)0x3169, (q15_t)0x175c, (q15_t)0x3171,
+    (q15_t)0x1766, (q15_t)0x3179, (q15_t)0x1770, (q15_t)0x3181, (q15_t)0x177a, (q15_t)0x3189, (q15_t)0x1783, (q15_t)0x3191,
+    (q15_t)0x178d, (q15_t)0x3199, (q15_t)0x1797, (q15_t)0x31a1, (q15_t)0x17a0, (q15_t)0x31a9, (q15_t)0x17aa, (q15_t)0x31b1,
+    (q15_t)0x17b4, (q15_t)0x31b9, (q15_t)0x17be, (q15_t)0x31c0, (q15_t)0x17c8, (q15_t)0x31c8, (q15_t)0x17d1, (q15_t)0x31d0,
+    (q15_t)0x17db, (q15_t)0x31d8, (q15_t)0x17e5, (q15_t)0x31e0, (q15_t)0x17ef, (q15_t)0x31e8, (q15_t)0x17f8, (q15_t)0x31f0,
+    (q15_t)0x1802, (q15_t)0x31f8, (q15_t)0x180c, (q15_t)0x31ff, (q15_t)0x1816, (q15_t)0x3207, (q15_t)0x1820, (q15_t)0x320f,
+    (q15_t)0x182a, (q15_t)0x3217, (q15_t)0x1833, (q15_t)0x321f, (q15_t)0x183d, (q15_t)0x3227, (q15_t)0x1847, (q15_t)0x322e,
+    (q15_t)0x1851, (q15_t)0x3236, (q15_t)0x185b, (q15_t)0x323e, (q15_t)0x1865, (q15_t)0x3246, (q15_t)0x186f, (q15_t)0x324e,
+    (q15_t)0x1878, (q15_t)0x3255, (q15_t)0x1882, (q15_t)0x325d, (q15_t)0x188c, (q15_t)0x3265, (q15_t)0x1896, (q15_t)0x326d,
+    (q15_t)0x18a0, (q15_t)0x3274, (q15_t)0x18aa, (q15_t)0x327c, (q15_t)0x18b4, (q15_t)0x3284, (q15_t)0x18be, (q15_t)0x328b,
+    (q15_t)0x18c8, (q15_t)0x3293, (q15_t)0x18d2, (q15_t)0x329b, (q15_t)0x18dc, (q15_t)0x32a3, (q15_t)0x18e6, (q15_t)0x32aa,
+    (q15_t)0x18ef, (q15_t)0x32b2, (q15_t)0x18f9, (q15_t)0x32ba, (q15_t)0x1903, (q15_t)0x32c1, (q15_t)0x190d, (q15_t)0x32c9,
+    (q15_t)0x1917, (q15_t)0x32d0, (q15_t)0x1921, (q15_t)0x32d8, (q15_t)0x192b, (q15_t)0x32e0, (q15_t)0x1935, (q15_t)0x32e7,
+    (q15_t)0x193f, (q15_t)0x32ef, (q15_t)0x1949, (q15_t)0x32f7, (q15_t)0x1953, (q15_t)0x32fe, (q15_t)0x195d, (q15_t)0x3306,
+    (q15_t)0x1967, (q15_t)0x330d, (q15_t)0x1971, (q15_t)0x3315, (q15_t)0x197b, (q15_t)0x331d, (q15_t)0x1985, (q15_t)0x3324,
+    (q15_t)0x198f, (q15_t)0x332c, (q15_t)0x199a, (q15_t)0x3333, (q15_t)0x19a4, (q15_t)0x333b, (q15_t)0x19ae, (q15_t)0x3342,
+    (q15_t)0x19b8, (q15_t)0x334a, (q15_t)0x19c2, (q15_t)0x3351, (q15_t)0x19cc, (q15_t)0x3359, (q15_t)0x19d6, (q15_t)0x3360,
+    (q15_t)0x19e0, (q15_t)0x3368, (q15_t)0x19ea, (q15_t)0x336f, (q15_t)0x19f4, (q15_t)0x3377, (q15_t)0x19fe, (q15_t)0x337e,
+    (q15_t)0x1a08, (q15_t)0x3386, (q15_t)0x1a13, (q15_t)0x338d, (q15_t)0x1a1d, (q15_t)0x3395, (q15_t)0x1a27, (q15_t)0x339c,
+    (q15_t)0x1a31, (q15_t)0x33a3, (q15_t)0x1a3b, (q15_t)0x33ab, (q15_t)0x1a45, (q15_t)0x33b2, (q15_t)0x1a4f, (q15_t)0x33ba,
+    (q15_t)0x1a5a, (q15_t)0x33c1, (q15_t)0x1a64, (q15_t)0x33c8, (q15_t)0x1a6e, (q15_t)0x33d0, (q15_t)0x1a78, (q15_t)0x33d7,
+    (q15_t)0x1a82, (q15_t)0x33df, (q15_t)0x1a8c, (q15_t)0x33e6, (q15_t)0x1a97, (q15_t)0x33ed, (q15_t)0x1aa1, (q15_t)0x33f5,
+    (q15_t)0x1aab, (q15_t)0x33fc, (q15_t)0x1ab5, (q15_t)0x3403, (q15_t)0x1abf, (q15_t)0x340b, (q15_t)0x1aca, (q15_t)0x3412,
+    (q15_t)0x1ad4, (q15_t)0x3419, (q15_t)0x1ade, (q15_t)0x3420, (q15_t)0x1ae8, (q15_t)0x3428, (q15_t)0x1af3, (q15_t)0x342f,
+    (q15_t)0x1afd, (q15_t)0x3436, (q15_t)0x1b07, (q15_t)0x343e, (q15_t)0x1b11, (q15_t)0x3445, (q15_t)0x1b1c, (q15_t)0x344c,
+    (q15_t)0x1b26, (q15_t)0x3453, (q15_t)0x1b30, (q15_t)0x345b, (q15_t)0x1b3b, (q15_t)0x3462, (q15_t)0x1b45, (q15_t)0x3469,
+    (q15_t)0x1b4f, (q15_t)0x3470, (q15_t)0x1b59, (q15_t)0x3477, (q15_t)0x1b64, (q15_t)0x347f, (q15_t)0x1b6e, (q15_t)0x3486,
+    (q15_t)0x1b78, (q15_t)0x348d, (q15_t)0x1b83, (q15_t)0x3494, (q15_t)0x1b8d, (q15_t)0x349b, (q15_t)0x1b97, (q15_t)0x34a2,
+    (q15_t)0x1ba2, (q15_t)0x34aa, (q15_t)0x1bac, (q15_t)0x34b1, (q15_t)0x1bb6, (q15_t)0x34b8, (q15_t)0x1bc1, (q15_t)0x34bf,
+    (q15_t)0x1bcb, (q15_t)0x34c6, (q15_t)0x1bd5, (q15_t)0x34cd, (q15_t)0x1be0, (q15_t)0x34d4, (q15_t)0x1bea, (q15_t)0x34db,
+    (q15_t)0x1bf5, (q15_t)0x34e2, (q15_t)0x1bff, (q15_t)0x34ea, (q15_t)0x1c09, (q15_t)0x34f1, (q15_t)0x1c14, (q15_t)0x34f8,
+    (q15_t)0x1c1e, (q15_t)0x34ff, (q15_t)0x1c29, (q15_t)0x3506, (q15_t)0x1c33, (q15_t)0x350d, (q15_t)0x1c3d, (q15_t)0x3514,
+    (q15_t)0x1c48, (q15_t)0x351b, (q15_t)0x1c52, (q15_t)0x3522, (q15_t)0x1c5d, (q15_t)0x3529, (q15_t)0x1c67, (q15_t)0x3530,
+    (q15_t)0x1c72, (q15_t)0x3537, (q15_t)0x1c7c, (q15_t)0x353e, (q15_t)0x1c86, (q15_t)0x3545, (q15_t)0x1c91, (q15_t)0x354c,
+    (q15_t)0x1c9b, (q15_t)0x3553, (q15_t)0x1ca6, (q15_t)0x355a, (q15_t)0x1cb0, (q15_t)0x3561, (q15_t)0x1cbb, (q15_t)0x3567,
+    (q15_t)0x1cc5, (q15_t)0x356e, (q15_t)0x1cd0, (q15_t)0x3575, (q15_t)0x1cda, (q15_t)0x357c, (q15_t)0x1ce5, (q15_t)0x3583,
+    (q15_t)0x1cef, (q15_t)0x358a, (q15_t)0x1cfa, (q15_t)0x3591, (q15_t)0x1d04, (q15_t)0x3598, (q15_t)0x1d0f, (q15_t)0x359f,
+    (q15_t)0x1d19, (q15_t)0x35a5, (q15_t)0x1d24, (q15_t)0x35ac, (q15_t)0x1d2e, (q15_t)0x35b3, (q15_t)0x1d39, (q15_t)0x35ba,
+    (q15_t)0x1d44, (q15_t)0x35c1, (q15_t)0x1d4e, (q15_t)0x35c8, (q15_t)0x1d59, (q15_t)0x35ce, (q15_t)0x1d63, (q15_t)0x35d5,
+    (q15_t)0x1d6e, (q15_t)0x35dc, (q15_t)0x1d78, (q15_t)0x35e3, (q15_t)0x1d83, (q15_t)0x35ea, (q15_t)0x1d8e, (q15_t)0x35f0,
+    (q15_t)0x1d98, (q15_t)0x35f7, (q15_t)0x1da3, (q15_t)0x35fe, (q15_t)0x1dad, (q15_t)0x3605, (q15_t)0x1db8, (q15_t)0x360b,
+    (q15_t)0x1dc3, (q15_t)0x3612, (q15_t)0x1dcd, (q15_t)0x3619, (q15_t)0x1dd8, (q15_t)0x3620, (q15_t)0x1de2, (q15_t)0x3626,
+    (q15_t)0x1ded, (q15_t)0x362d, (q15_t)0x1df8, (q15_t)0x3634, (q15_t)0x1e02, (q15_t)0x363a, (q15_t)0x1e0d, (q15_t)0x3641,
+    (q15_t)0x1e18, (q15_t)0x3648, (q15_t)0x1e22, (q15_t)0x364e, (q15_t)0x1e2d, (q15_t)0x3655, (q15_t)0x1e38, (q15_t)0x365c,
+    (q15_t)0x1e42, (q15_t)0x3662, (q15_t)0x1e4d, (q15_t)0x3669, (q15_t)0x1e58, (q15_t)0x366f, (q15_t)0x1e62, (q15_t)0x3676,
+    (q15_t)0x1e6d, (q15_t)0x367d, (q15_t)0x1e78, (q15_t)0x3683, (q15_t)0x1e83, (q15_t)0x368a, (q15_t)0x1e8d, (q15_t)0x3690,
+    (q15_t)0x1e98, (q15_t)0x3697, (q15_t)0x1ea3, (q15_t)0x369d, (q15_t)0x1ead, (q15_t)0x36a4, (q15_t)0x1eb8, (q15_t)0x36ab,
+    (q15_t)0x1ec3, (q15_t)0x36b1, (q15_t)0x1ece, (q15_t)0x36b8, (q15_t)0x1ed8, (q15_t)0x36be, (q15_t)0x1ee3, (q15_t)0x36c5,
+    (q15_t)0x1eee, (q15_t)0x36cb, (q15_t)0x1ef9, (q15_t)0x36d2, (q15_t)0x1f03, (q15_t)0x36d8, (q15_t)0x1f0e, (q15_t)0x36df,
+    (q15_t)0x1f19, (q15_t)0x36e5, (q15_t)0x1f24, (q15_t)0x36eb, (q15_t)0x1f2f, (q15_t)0x36f2, (q15_t)0x1f39, (q15_t)0x36f8,
+    (q15_t)0x1f44, (q15_t)0x36ff, (q15_t)0x1f4f, (q15_t)0x3705, (q15_t)0x1f5a, (q15_t)0x370c, (q15_t)0x1f65, (q15_t)0x3712,
+    (q15_t)0x1f6f, (q15_t)0x3718, (q15_t)0x1f7a, (q15_t)0x371f, (q15_t)0x1f85, (q15_t)0x3725, (q15_t)0x1f90, (q15_t)0x372c,
+    (q15_t)0x1f9b, (q15_t)0x3732, (q15_t)0x1fa5, (q15_t)0x3738, (q15_t)0x1fb0, (q15_t)0x373f, (q15_t)0x1fbb, (q15_t)0x3745,
+    (q15_t)0x1fc6, (q15_t)0x374b, (q15_t)0x1fd1, (q15_t)0x3752, (q15_t)0x1fdc, (q15_t)0x3758, (q15_t)0x1fe7, (q15_t)0x375e,
+    (q15_t)0x1ff1, (q15_t)0x3765, (q15_t)0x1ffc, (q15_t)0x376b, (q15_t)0x2007, (q15_t)0x3771, (q15_t)0x2012, (q15_t)0x3777,
+    (q15_t)0x201d, (q15_t)0x377e, (q15_t)0x2028, (q15_t)0x3784, (q15_t)0x2033, (q15_t)0x378a, (q15_t)0x203e, (q15_t)0x3790,
+    (q15_t)0x2049, (q15_t)0x3797, (q15_t)0x2054, (q15_t)0x379d, (q15_t)0x205e, (q15_t)0x37a3, (q15_t)0x2069, (q15_t)0x37a9,
+    (q15_t)0x2074, (q15_t)0x37b0, (q15_t)0x207f, (q15_t)0x37b6, (q15_t)0x208a, (q15_t)0x37bc, (q15_t)0x2095, (q15_t)0x37c2,
+    (q15_t)0x20a0, (q15_t)0x37c8, (q15_t)0x20ab, (q15_t)0x37ce, (q15_t)0x20b6, (q15_t)0x37d5, (q15_t)0x20c1, (q15_t)0x37db,
+    (q15_t)0x20cc, (q15_t)0x37e1, (q15_t)0x20d7, (q15_t)0x37e7, (q15_t)0x20e2, (q15_t)0x37ed, (q15_t)0x20ed, (q15_t)0x37f3,
+    (q15_t)0x20f8, (q15_t)0x37f9, (q15_t)0x2103, (q15_t)0x37ff, (q15_t)0x210e, (q15_t)0x3805, (q15_t)0x2119, (q15_t)0x380b,
+    (q15_t)0x2124, (q15_t)0x3812, (q15_t)0x212f, (q15_t)0x3818, (q15_t)0x213a, (q15_t)0x381e, (q15_t)0x2145, (q15_t)0x3824,
+    (q15_t)0x2150, (q15_t)0x382a, (q15_t)0x215b, (q15_t)0x3830, (q15_t)0x2166, (q15_t)0x3836, (q15_t)0x2171, (q15_t)0x383c,
+    (q15_t)0x217c, (q15_t)0x3842, (q15_t)0x2187, (q15_t)0x3848, (q15_t)0x2192, (q15_t)0x384e, (q15_t)0x219d, (q15_t)0x3854,
+    (q15_t)0x21a8, (q15_t)0x385a, (q15_t)0x21b3, (q15_t)0x3860, (q15_t)0x21be, (q15_t)0x3866, (q15_t)0x21ca, (q15_t)0x386b,
+    (q15_t)0x21d5, (q15_t)0x3871, (q15_t)0x21e0, (q15_t)0x3877, (q15_t)0x21eb, (q15_t)0x387d, (q15_t)0x21f6, (q15_t)0x3883,
+    (q15_t)0x2201, (q15_t)0x3889, (q15_t)0x220c, (q15_t)0x388f, (q15_t)0x2217, (q15_t)0x3895, (q15_t)0x2222, (q15_t)0x389b,
+    (q15_t)0x222d, (q15_t)0x38a1, (q15_t)0x2239, (q15_t)0x38a6, (q15_t)0x2244, (q15_t)0x38ac, (q15_t)0x224f, (q15_t)0x38b2,
+    (q15_t)0x225a, (q15_t)0x38b8, (q15_t)0x2265, (q15_t)0x38be, (q15_t)0x2270, (q15_t)0x38c3, (q15_t)0x227b, (q15_t)0x38c9,
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+    (q15_t)0x22b3, (q15_t)0x38e6, (q15_t)0x22be, (q15_t)0x38ec, (q15_t)0x22ca, (q15_t)0x38f2, (q15_t)0x22d5, (q15_t)0x38f7,
+    (q15_t)0x22e0, (q15_t)0x38fd, (q15_t)0x22eb, (q15_t)0x3903, (q15_t)0x22f6, (q15_t)0x3909, (q15_t)0x2301, (q15_t)0x390e,
+    (q15_t)0x230d, (q15_t)0x3914, (q15_t)0x2318, (q15_t)0x391a, (q15_t)0x2323, (q15_t)0x391f, (q15_t)0x232e, (q15_t)0x3925,
+    (q15_t)0x233a, (q15_t)0x392b, (q15_t)0x2345, (q15_t)0x3930, (q15_t)0x2350, (q15_t)0x3936, (q15_t)0x235b, (q15_t)0x393b,
+    (q15_t)0x2367, (q15_t)0x3941, (q15_t)0x2372, (q15_t)0x3947, (q15_t)0x237d, (q15_t)0x394c, (q15_t)0x2388, (q15_t)0x3952,
+    (q15_t)0x2394, (q15_t)0x3958, (q15_t)0x239f, (q15_t)0x395d, (q15_t)0x23aa, (q15_t)0x3963, (q15_t)0x23b5, (q15_t)0x3968,
+    (q15_t)0x23c1, (q15_t)0x396e, (q15_t)0x23cc, (q15_t)0x3973, (q15_t)0x23d7, (q15_t)0x3979, (q15_t)0x23e2, (q15_t)0x397e,
+    (q15_t)0x23ee, (q15_t)0x3984, (q15_t)0x23f9, (q15_t)0x3989, (q15_t)0x2404, (q15_t)0x398f, (q15_t)0x2410, (q15_t)0x3994,
+    (q15_t)0x241b, (q15_t)0x399a, (q15_t)0x2426, (q15_t)0x399f, (q15_t)0x2432, (q15_t)0x39a5, (q15_t)0x243d, (q15_t)0x39aa,
+    (q15_t)0x2448, (q15_t)0x39b0, (q15_t)0x2454, (q15_t)0x39b5, (q15_t)0x245f, (q15_t)0x39bb, (q15_t)0x246a, (q15_t)0x39c0,
+    (q15_t)0x2476, (q15_t)0x39c5, (q15_t)0x2481, (q15_t)0x39cb, (q15_t)0x248c, (q15_t)0x39d0, (q15_t)0x2498, (q15_t)0x39d6,
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+    (q15_t)0x24fe, (q15_t)0x3a06, (q15_t)0x2509, (q15_t)0x3a0b, (q15_t)0x2515, (q15_t)0x3a10, (q15_t)0x2520, (q15_t)0x3a16,
+    (q15_t)0x252c, (q15_t)0x3a1b, (q15_t)0x2537, (q15_t)0x3a20, (q15_t)0x2542, (q15_t)0x3a25, (q15_t)0x254e, (q15_t)0x3a2b,
+    (q15_t)0x2559, (q15_t)0x3a30, (q15_t)0x2565, (q15_t)0x3a35, (q15_t)0x2570, (q15_t)0x3a3a, (q15_t)0x257c, (q15_t)0x3a3f,
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+    (q15_t)0x25b5, (q15_t)0x3a59, (q15_t)0x25c0, (q15_t)0x3a5f, (q15_t)0x25cc, (q15_t)0x3a64, (q15_t)0x25d7, (q15_t)0x3a69,
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+    (q15_t)0x266d, (q15_t)0x3aab, (q15_t)0x2678, (q15_t)0x3ab0, (q15_t)0x2684, (q15_t)0x3ab5, (q15_t)0x268f, (q15_t)0x3aba,
+    (q15_t)0x269b, (q15_t)0x3abf, (q15_t)0x26a6, (q15_t)0x3ac4, (q15_t)0x26b2, (q15_t)0x3ac9, (q15_t)0x26bd, (q15_t)0x3ace,
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+    (q15_t)0x26f7, (q15_t)0x3ae6, (q15_t)0x2703, (q15_t)0x3aeb, (q15_t)0x270e, (q15_t)0x3af0, (q15_t)0x271a, (q15_t)0x3af5,
+    (q15_t)0x2725, (q15_t)0x3afa, (q15_t)0x2731, (q15_t)0x3aff, (q15_t)0x273d, (q15_t)0x3b04, (q15_t)0x2748, (q15_t)0x3b09,
+    (q15_t)0x2754, (q15_t)0x3b0e, (q15_t)0x275f, (q15_t)0x3b12, (q15_t)0x276b, (q15_t)0x3b17, (q15_t)0x2777, (q15_t)0x3b1c,
+    (q15_t)0x2782, (q15_t)0x3b21, (q15_t)0x278e, (q15_t)0x3b26, (q15_t)0x2799, (q15_t)0x3b2a, (q15_t)0x27a5, (q15_t)0x3b2f,
+    (q15_t)0x27b1, (q15_t)0x3b34, (q15_t)0x27bc, (q15_t)0x3b39, (q15_t)0x27c8, (q15_t)0x3b3e, (q15_t)0x27d3, (q15_t)0x3b42,
+    (q15_t)0x27df, (q15_t)0x3b47, (q15_t)0x27eb, (q15_t)0x3b4c, (q15_t)0x27f6, (q15_t)0x3b50, (q15_t)0x2802, (q15_t)0x3b55,
+    (q15_t)0x280e, (q15_t)0x3b5a, (q15_t)0x2819, (q15_t)0x3b5f, (q15_t)0x2825, (q15_t)0x3b63, (q15_t)0x2831, (q15_t)0x3b68,
+    (q15_t)0x283c, (q15_t)0x3b6d, (q15_t)0x2848, (q15_t)0x3b71, (q15_t)0x2854, (q15_t)0x3b76, (q15_t)0x285f, (q15_t)0x3b7b,
+    (q15_t)0x286b, (q15_t)0x3b7f, (q15_t)0x2877, (q15_t)0x3b84, (q15_t)0x2882, (q15_t)0x3b88, (q15_t)0x288e, (q15_t)0x3b8d,
+    (q15_t)0x289a, (q15_t)0x3b92, (q15_t)0x28a5, (q15_t)0x3b96, (q15_t)0x28b1, (q15_t)0x3b9b, (q15_t)0x28bd, (q15_t)0x3b9f,
+    (q15_t)0x28c9, (q15_t)0x3ba4, (q15_t)0x28d4, (q15_t)0x3ba9, (q15_t)0x28e0, (q15_t)0x3bad, (q15_t)0x28ec, (q15_t)0x3bb2,
+    (q15_t)0x28f7, (q15_t)0x3bb6, (q15_t)0x2903, (q15_t)0x3bbb, (q15_t)0x290f, (q15_t)0x3bbf, (q15_t)0x291b, (q15_t)0x3bc4,
+    (q15_t)0x2926, (q15_t)0x3bc8, (q15_t)0x2932, (q15_t)0x3bcd, (q15_t)0x293e, (q15_t)0x3bd1, (q15_t)0x294a, (q15_t)0x3bd6,
+    (q15_t)0x2955, (q15_t)0x3bda, (q15_t)0x2961, (q15_t)0x3bde, (q15_t)0x296d, (q15_t)0x3be3, (q15_t)0x2979, (q15_t)0x3be7,
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+    (q15_t)0x2acf, (q15_t)0x3c64, (q15_t)0x2adb, (q15_t)0x3c68, (q15_t)0x2ae7, (q15_t)0x3c6c, (q15_t)0x2af3, (q15_t)0x3c70,
+    (q15_t)0x2aff, (q15_t)0x3c74, (q15_t)0x2b0a, (q15_t)0x3c79, (q15_t)0x2b16, (q15_t)0x3c7d, (q15_t)0x2b22, (q15_t)0x3c81,
+    (q15_t)0x2b2e, (q15_t)0x3c85, (q15_t)0x2b3a, (q15_t)0x3c89, (q15_t)0x2b46, (q15_t)0x3c8d, (q15_t)0x2b52, (q15_t)0x3c91,
+    (q15_t)0x2b5e, (q15_t)0x3c95, (q15_t)0x2b6a, (q15_t)0x3c99, (q15_t)0x2b75, (q15_t)0x3c9d, (q15_t)0x2b81, (q15_t)0x3ca1,
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+    (q15_t)0x2bbd, (q15_t)0x3cb5, (q15_t)0x2bc9, (q15_t)0x3cb9, (q15_t)0x2bd5, (q15_t)0x3cbd, (q15_t)0x2be1, (q15_t)0x3cc1,
+    (q15_t)0x2bed, (q15_t)0x3cc5, (q15_t)0x2bf9, (q15_t)0x3cc9, (q15_t)0x2c05, (q15_t)0x3ccd, (q15_t)0x2c10, (q15_t)0x3cd1,
+    (q15_t)0x2c1c, (q15_t)0x3cd5, (q15_t)0x2c28, (q15_t)0x3cd9, (q15_t)0x2c34, (q15_t)0x3cdd, (q15_t)0x2c40, (q15_t)0x3ce0,
+    (q15_t)0x2c4c, (q15_t)0x3ce4, (q15_t)0x2c58, (q15_t)0x3ce8, (q15_t)0x2c64, (q15_t)0x3cec, (q15_t)0x2c70, (q15_t)0x3cf0,
+    (q15_t)0x2c7c, (q15_t)0x3cf4, (q15_t)0x2c88, (q15_t)0x3cf8, (q15_t)0x2c94, (q15_t)0x3cfb, (q15_t)0x2ca0, (q15_t)0x3cff,
+    (q15_t)0x2cac, (q15_t)0x3d03, (q15_t)0x2cb8, (q15_t)0x3d07, (q15_t)0x2cc4, (q15_t)0x3d0b, (q15_t)0x2cd0, (q15_t)0x3d0e,
+    (q15_t)0x2cdc, (q15_t)0x3d12, (q15_t)0x2ce8, (q15_t)0x3d16, (q15_t)0x2cf4, (q15_t)0x3d1a, (q15_t)0x2d00, (q15_t)0x3d1d,
+    (q15_t)0x2d0c, (q15_t)0x3d21, (q15_t)0x2d18, (q15_t)0x3d25, (q15_t)0x2d24, (q15_t)0x3d28, (q15_t)0x2d30, (q15_t)0x3d2c,
+    (q15_t)0x2d3c, (q15_t)0x3d30, (q15_t)0x2d48, (q15_t)0x3d34, (q15_t)0x2d54, (q15_t)0x3d37, (q15_t)0x2d60, (q15_t)0x3d3b,
+    (q15_t)0x2d6c, (q15_t)0x3d3f, (q15_t)0x2d78, (q15_t)0x3d42, (q15_t)0x2d84, (q15_t)0x3d46, (q15_t)0x2d90, (q15_t)0x3d49,
+    (q15_t)0x2d9c, (q15_t)0x3d4d, (q15_t)0x2da8, (q15_t)0x3d51, (q15_t)0x2db4, (q15_t)0x3d54, (q15_t)0x2dc0, (q15_t)0x3d58,
+    (q15_t)0x2dcc, (q15_t)0x3d5b, (q15_t)0x2dd8, (q15_t)0x3d5f, (q15_t)0x2de4, (q15_t)0x3d63, (q15_t)0x2df0, (q15_t)0x3d66,
+    (q15_t)0x2dfc, (q15_t)0x3d6a, (q15_t)0x2e09, (q15_t)0x3d6d, (q15_t)0x2e15, (q15_t)0x3d71, (q15_t)0x2e21, (q15_t)0x3d74,
+    (q15_t)0x2e2d, (q15_t)0x3d78, (q15_t)0x2e39, (q15_t)0x3d7b, (q15_t)0x2e45, (q15_t)0x3d7f, (q15_t)0x2e51, (q15_t)0x3d82,
+    (q15_t)0x2e5d, (q15_t)0x3d86, (q15_t)0x2e69, (q15_t)0x3d89, (q15_t)0x2e75, (q15_t)0x3d8d, (q15_t)0x2e81, (q15_t)0x3d90,
+    (q15_t)0x2e8d, (q15_t)0x3d93, (q15_t)0x2e99, (q15_t)0x3d97, (q15_t)0x2ea6, (q15_t)0x3d9a, (q15_t)0x2eb2, (q15_t)0x3d9e,
+    (q15_t)0x2ebe, (q15_t)0x3da1, (q15_t)0x2eca, (q15_t)0x3da4, (q15_t)0x2ed6, (q15_t)0x3da8, (q15_t)0x2ee2, (q15_t)0x3dab,
+    (q15_t)0x2eee, (q15_t)0x3daf, (q15_t)0x2efa, (q15_t)0x3db2, (q15_t)0x2f06, (q15_t)0x3db5, (q15_t)0x2f13, (q15_t)0x3db9,
+    (q15_t)0x2f1f, (q15_t)0x3dbc, (q15_t)0x2f2b, (q15_t)0x3dbf, (q15_t)0x2f37, (q15_t)0x3dc2, (q15_t)0x2f43, (q15_t)0x3dc6,
+    (q15_t)0x2f4f, (q15_t)0x3dc9, (q15_t)0x2f5b, (q15_t)0x3dcc, (q15_t)0x2f67, (q15_t)0x3dd0, (q15_t)0x2f74, (q15_t)0x3dd3,
+    (q15_t)0x2f80, (q15_t)0x3dd6, (q15_t)0x2f8c, (q15_t)0x3dd9, (q15_t)0x2f98, (q15_t)0x3ddd, (q15_t)0x2fa4, (q15_t)0x3de0,
+    (q15_t)0x2fb0, (q15_t)0x3de3, (q15_t)0x2fbc, (q15_t)0x3de6, (q15_t)0x2fc9, (q15_t)0x3de9, (q15_t)0x2fd5, (q15_t)0x3ded,
+    (q15_t)0x2fe1, (q15_t)0x3df0, (q15_t)0x2fed, (q15_t)0x3df3, (q15_t)0x2ff9, (q15_t)0x3df6, (q15_t)0x3005, (q15_t)0x3df9,
+    (q15_t)0x3012, (q15_t)0x3dfc, (q15_t)0x301e, (q15_t)0x3dff, (q15_t)0x302a, (q15_t)0x3e03, (q15_t)0x3036, (q15_t)0x3e06,
+    (q15_t)0x3042, (q15_t)0x3e09, (q15_t)0x304e, (q15_t)0x3e0c, (q15_t)0x305b, (q15_t)0x3e0f, (q15_t)0x3067, (q15_t)0x3e12,
+    (q15_t)0x3073, (q15_t)0x3e15, (q15_t)0x307f, (q15_t)0x3e18, (q15_t)0x308b, (q15_t)0x3e1b, (q15_t)0x3098, (q15_t)0x3e1e,
+    (q15_t)0x30a4, (q15_t)0x3e21, (q15_t)0x30b0, (q15_t)0x3e24, (q15_t)0x30bc, (q15_t)0x3e27, (q15_t)0x30c8, (q15_t)0x3e2a,
+    (q15_t)0x30d5, (q15_t)0x3e2d, (q15_t)0x30e1, (q15_t)0x3e30, (q15_t)0x30ed, (q15_t)0x3e33, (q15_t)0x30f9, (q15_t)0x3e36,
+    (q15_t)0x3105, (q15_t)0x3e39, (q15_t)0x3112, (q15_t)0x3e3c, (q15_t)0x311e, (q15_t)0x3e3f, (q15_t)0x312a, (q15_t)0x3e42,
+    (q15_t)0x3136, (q15_t)0x3e45, (q15_t)0x3143, (q15_t)0x3e48, (q15_t)0x314f, (q15_t)0x3e4a, (q15_t)0x315b, (q15_t)0x3e4d,
+    (q15_t)0x3167, (q15_t)0x3e50, (q15_t)0x3174, (q15_t)0x3e53, (q15_t)0x3180, (q15_t)0x3e56, (q15_t)0x318c, (q15_t)0x3e59,
+    (q15_t)0x3198, (q15_t)0x3e5c, (q15_t)0x31a4, (q15_t)0x3e5e, (q15_t)0x31b1, (q15_t)0x3e61, (q15_t)0x31bd, (q15_t)0x3e64,
+    (q15_t)0x31c9, (q15_t)0x3e67, (q15_t)0x31d5, (q15_t)0x3e6a, (q15_t)0x31e2, (q15_t)0x3e6c, (q15_t)0x31ee, (q15_t)0x3e6f,
+    (q15_t)0x31fa, (q15_t)0x3e72, (q15_t)0x3207, (q15_t)0x3e75, (q15_t)0x3213, (q15_t)0x3e77, (q15_t)0x321f, (q15_t)0x3e7a,
+    (q15_t)0x322b, (q15_t)0x3e7d, (q15_t)0x3238, (q15_t)0x3e80, (q15_t)0x3244, (q15_t)0x3e82, (q15_t)0x3250, (q15_t)0x3e85,
+    (q15_t)0x325c, (q15_t)0x3e88, (q15_t)0x3269, (q15_t)0x3e8a, (q15_t)0x3275, (q15_t)0x3e8d, (q15_t)0x3281, (q15_t)0x3e90,
+    (q15_t)0x328e, (q15_t)0x3e92, (q15_t)0x329a, (q15_t)0x3e95, (q15_t)0x32a6, (q15_t)0x3e98, (q15_t)0x32b2, (q15_t)0x3e9a,
+    (q15_t)0x32bf, (q15_t)0x3e9d, (q15_t)0x32cb, (q15_t)0x3e9f, (q15_t)0x32d7, (q15_t)0x3ea2, (q15_t)0x32e4, (q15_t)0x3ea5,
+    (q15_t)0x32f0, (q15_t)0x3ea7, (q15_t)0x32fc, (q15_t)0x3eaa, (q15_t)0x3308, (q15_t)0x3eac, (q15_t)0x3315, (q15_t)0x3eaf,
+    (q15_t)0x3321, (q15_t)0x3eb1, (q15_t)0x332d, (q15_t)0x3eb4, (q15_t)0x333a, (q15_t)0x3eb6, (q15_t)0x3346, (q15_t)0x3eb9,
+    (q15_t)0x3352, (q15_t)0x3ebb, (q15_t)0x335f, (q15_t)0x3ebe, (q15_t)0x336b, (q15_t)0x3ec0, (q15_t)0x3377, (q15_t)0x3ec3,
+    (q15_t)0x3384, (q15_t)0x3ec5, (q15_t)0x3390, (q15_t)0x3ec8, (q15_t)0x339c, (q15_t)0x3eca, (q15_t)0x33a9, (q15_t)0x3ecc,
+    (q15_t)0x33b5, (q15_t)0x3ecf, (q15_t)0x33c1, (q15_t)0x3ed1, (q15_t)0x33ce, (q15_t)0x3ed4, (q15_t)0x33da, (q15_t)0x3ed6,
+    (q15_t)0x33e6, (q15_t)0x3ed8, (q15_t)0x33f3, (q15_t)0x3edb, (q15_t)0x33ff, (q15_t)0x3edd, (q15_t)0x340b, (q15_t)0x3ee0,
+    (q15_t)0x3418, (q15_t)0x3ee2, (q15_t)0x3424, (q15_t)0x3ee4, (q15_t)0x3430, (q15_t)0x3ee7, (q15_t)0x343d, (q15_t)0x3ee9,
+    (q15_t)0x3449, (q15_t)0x3eeb, (q15_t)0x3455, (q15_t)0x3eed, (q15_t)0x3462, (q15_t)0x3ef0, (q15_t)0x346e, (q15_t)0x3ef2,
+    (q15_t)0x347b, (q15_t)0x3ef4, (q15_t)0x3487, (q15_t)0x3ef7, (q15_t)0x3493, (q15_t)0x3ef9, (q15_t)0x34a0, (q15_t)0x3efb,
+    (q15_t)0x34ac, (q15_t)0x3efd, (q15_t)0x34b8, (q15_t)0x3f00, (q15_t)0x34c5, (q15_t)0x3f02, (q15_t)0x34d1, (q15_t)0x3f04,
+    (q15_t)0x34dd, (q15_t)0x3f06, (q15_t)0x34ea, (q15_t)0x3f08, (q15_t)0x34f6, (q15_t)0x3f0a, (q15_t)0x3503, (q15_t)0x3f0d,
+    (q15_t)0x350f, (q15_t)0x3f0f, (q15_t)0x351b, (q15_t)0x3f11, (q15_t)0x3528, (q15_t)0x3f13, (q15_t)0x3534, (q15_t)0x3f15,
+    (q15_t)0x3540, (q15_t)0x3f17, (q15_t)0x354d, (q15_t)0x3f19, (q15_t)0x3559, (q15_t)0x3f1c, (q15_t)0x3566, (q15_t)0x3f1e,
+    (q15_t)0x3572, (q15_t)0x3f20, (q15_t)0x357e, (q15_t)0x3f22, (q15_t)0x358b, (q15_t)0x3f24, (q15_t)0x3597, (q15_t)0x3f26,
+    (q15_t)0x35a4, (q15_t)0x3f28, (q15_t)0x35b0, (q15_t)0x3f2a, (q15_t)0x35bc, (q15_t)0x3f2c, (q15_t)0x35c9, (q15_t)0x3f2e,
+    (q15_t)0x35d5, (q15_t)0x3f30, (q15_t)0x35e2, (q15_t)0x3f32, (q15_t)0x35ee, (q15_t)0x3f34, (q15_t)0x35fa, (q15_t)0x3f36,
+    (q15_t)0x3607, (q15_t)0x3f38, (q15_t)0x3613, (q15_t)0x3f3a, (q15_t)0x3620, (q15_t)0x3f3c, (q15_t)0x362c, (q15_t)0x3f3e,
+    (q15_t)0x3639, (q15_t)0x3f40, (q15_t)0x3645, (q15_t)0x3f42, (q15_t)0x3651, (q15_t)0x3f43, (q15_t)0x365e, (q15_t)0x3f45,
+    (q15_t)0x366a, (q15_t)0x3f47, (q15_t)0x3677, (q15_t)0x3f49, (q15_t)0x3683, (q15_t)0x3f4b, (q15_t)0x3690, (q15_t)0x3f4d,
+    (q15_t)0x369c, (q15_t)0x3f4f, (q15_t)0x36a8, (q15_t)0x3f51, (q15_t)0x36b5, (q15_t)0x3f52, (q15_t)0x36c1, (q15_t)0x3f54,
+    (q15_t)0x36ce, (q15_t)0x3f56, (q15_t)0x36da, (q15_t)0x3f58, (q15_t)0x36e7, (q15_t)0x3f5a, (q15_t)0x36f3, (q15_t)0x3f5b,
+    (q15_t)0x36ff, (q15_t)0x3f5d, (q15_t)0x370c, (q15_t)0x3f5f, (q15_t)0x3718, (q15_t)0x3f61, (q15_t)0x3725, (q15_t)0x3f62,
+    (q15_t)0x3731, (q15_t)0x3f64, (q15_t)0x373e, (q15_t)0x3f66, (q15_t)0x374a, (q15_t)0x3f68, (q15_t)0x3757, (q15_t)0x3f69,
+    (q15_t)0x3763, (q15_t)0x3f6b, (q15_t)0x376f, (q15_t)0x3f6d, (q15_t)0x377c, (q15_t)0x3f6e, (q15_t)0x3788, (q15_t)0x3f70,
+    (q15_t)0x3795, (q15_t)0x3f72, (q15_t)0x37a1, (q15_t)0x3f73, (q15_t)0x37ae, (q15_t)0x3f75, (q15_t)0x37ba, (q15_t)0x3f77,
+    (q15_t)0x37c7, (q15_t)0x3f78, (q15_t)0x37d3, (q15_t)0x3f7a, (q15_t)0x37e0, (q15_t)0x3f7b, (q15_t)0x37ec, (q15_t)0x3f7d,
+    (q15_t)0x37f9, (q15_t)0x3f7f, (q15_t)0x3805, (q15_t)0x3f80, (q15_t)0x3811, (q15_t)0x3f82, (q15_t)0x381e, (q15_t)0x3f83,
+    (q15_t)0x382a, (q15_t)0x3f85, (q15_t)0x3837, (q15_t)0x3f86, (q15_t)0x3843, (q15_t)0x3f88, (q15_t)0x3850, (q15_t)0x3f89,
+    (q15_t)0x385c, (q15_t)0x3f8b, (q15_t)0x3869, (q15_t)0x3f8c, (q15_t)0x3875, (q15_t)0x3f8e, (q15_t)0x3882, (q15_t)0x3f8f,
+    (q15_t)0x388e, (q15_t)0x3f91, (q15_t)0x389b, (q15_t)0x3f92, (q15_t)0x38a7, (q15_t)0x3f94, (q15_t)0x38b4, (q15_t)0x3f95,
+    (q15_t)0x38c0, (q15_t)0x3f97, (q15_t)0x38cd, (q15_t)0x3f98, (q15_t)0x38d9, (q15_t)0x3f99, (q15_t)0x38e6, (q15_t)0x3f9b,
+    (q15_t)0x38f2, (q15_t)0x3f9c, (q15_t)0x38ff, (q15_t)0x3f9e, (q15_t)0x390b, (q15_t)0x3f9f, (q15_t)0x3918, (q15_t)0x3fa0,
+    (q15_t)0x3924, (q15_t)0x3fa2, (q15_t)0x3931, (q15_t)0x3fa3, (q15_t)0x393d, (q15_t)0x3fa4, (q15_t)0x394a, (q15_t)0x3fa6,
+    (q15_t)0x3956, (q15_t)0x3fa7, (q15_t)0x3963, (q15_t)0x3fa8, (q15_t)0x396f, (q15_t)0x3faa, (q15_t)0x397c, (q15_t)0x3fab,
+    (q15_t)0x3988, (q15_t)0x3fac, (q15_t)0x3995, (q15_t)0x3fad, (q15_t)0x39a1, (q15_t)0x3faf, (q15_t)0x39ae, (q15_t)0x3fb0,
+    (q15_t)0x39ba, (q15_t)0x3fb1, (q15_t)0x39c7, (q15_t)0x3fb2, (q15_t)0x39d3, (q15_t)0x3fb4, (q15_t)0x39e0, (q15_t)0x3fb5,
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+    (q15_t)0x3a1e, (q15_t)0x3fbb, (q15_t)0x3a2b, (q15_t)0x3fbc, (q15_t)0x3a37, (q15_t)0x3fbd, (q15_t)0x3a44, (q15_t)0x3fbe,
+    (q15_t)0x3a50, (q15_t)0x3fbf, (q15_t)0x3a5d, (q15_t)0x3fc0, (q15_t)0x3a69, (q15_t)0x3fc1, (q15_t)0x3a76, (q15_t)0x3fc3,
+    (q15_t)0x3a82, (q15_t)0x3fc4, (q15_t)0x3a8f, (q15_t)0x3fc5, (q15_t)0x3a9b, (q15_t)0x3fc6, (q15_t)0x3aa8, (q15_t)0x3fc7,
+    (q15_t)0x3ab4, (q15_t)0x3fc8, (q15_t)0x3ac1, (q15_t)0x3fc9, (q15_t)0x3acd, (q15_t)0x3fca, (q15_t)0x3ada, (q15_t)0x3fcb,
+    (q15_t)0x3ae6, (q15_t)0x3fcc, (q15_t)0x3af3, (q15_t)0x3fcd, (q15_t)0x3b00, (q15_t)0x3fce, (q15_t)0x3b0c, (q15_t)0x3fcf,
+    (q15_t)0x3b19, (q15_t)0x3fd0, (q15_t)0x3b25, (q15_t)0x3fd1, (q15_t)0x3b32, (q15_t)0x3fd2, (q15_t)0x3b3e, (q15_t)0x3fd3,
+    (q15_t)0x3b4b, (q15_t)0x3fd4, (q15_t)0x3b57, (q15_t)0x3fd5, (q15_t)0x3b64, (q15_t)0x3fd5, (q15_t)0x3b70, (q15_t)0x3fd6,
+    (q15_t)0x3b7d, (q15_t)0x3fd7, (q15_t)0x3b89, (q15_t)0x3fd8, (q15_t)0x3b96, (q15_t)0x3fd9, (q15_t)0x3ba2, (q15_t)0x3fda,
+    (q15_t)0x3baf, (q15_t)0x3fdb, (q15_t)0x3bbc, (q15_t)0x3fdc, (q15_t)0x3bc8, (q15_t)0x3fdc, (q15_t)0x3bd5, (q15_t)0x3fdd,
+    (q15_t)0x3be1, (q15_t)0x3fde, (q15_t)0x3bee, (q15_t)0x3fdf, (q15_t)0x3bfa, (q15_t)0x3fe0, (q15_t)0x3c07, (q15_t)0x3fe0,
+    (q15_t)0x3c13, (q15_t)0x3fe1, (q15_t)0x3c20, (q15_t)0x3fe2, (q15_t)0x3c2c, (q15_t)0x3fe3, (q15_t)0x3c39, (q15_t)0x3fe3,
+    (q15_t)0x3c45, (q15_t)0x3fe4, (q15_t)0x3c52, (q15_t)0x3fe5, (q15_t)0x3c5f, (q15_t)0x3fe6, (q15_t)0x3c6b, (q15_t)0x3fe6,
+    (q15_t)0x3c78, (q15_t)0x3fe7, (q15_t)0x3c84, (q15_t)0x3fe8, (q15_t)0x3c91, (q15_t)0x3fe8, (q15_t)0x3c9d, (q15_t)0x3fe9,
+    (q15_t)0x3caa, (q15_t)0x3fea, (q15_t)0x3cb6, (q15_t)0x3fea, (q15_t)0x3cc3, (q15_t)0x3feb, (q15_t)0x3cd0, (q15_t)0x3fec,
+    (q15_t)0x3cdc, (q15_t)0x3fec, (q15_t)0x3ce9, (q15_t)0x3fed, (q15_t)0x3cf5, (q15_t)0x3fed, (q15_t)0x3d02, (q15_t)0x3fee,
+    (q15_t)0x3d0e, (q15_t)0x3fef, (q15_t)0x3d1b, (q15_t)0x3fef, (q15_t)0x3d27, (q15_t)0x3ff0, (q15_t)0x3d34, (q15_t)0x3ff0,
+    (q15_t)0x3d40, (q15_t)0x3ff1, (q15_t)0x3d4d, (q15_t)0x3ff1, (q15_t)0x3d5a, (q15_t)0x3ff2, (q15_t)0x3d66, (q15_t)0x3ff2,
+    (q15_t)0x3d73, (q15_t)0x3ff3, (q15_t)0x3d7f, (q15_t)0x3ff3, (q15_t)0x3d8c, (q15_t)0x3ff4, (q15_t)0x3d98, (q15_t)0x3ff4,
+    (q15_t)0x3da5, (q15_t)0x3ff5, (q15_t)0x3db2, (q15_t)0x3ff5, (q15_t)0x3dbe, (q15_t)0x3ff6, (q15_t)0x3dcb, (q15_t)0x3ff6,
+    (q15_t)0x3dd7, (q15_t)0x3ff7, (q15_t)0x3de4, (q15_t)0x3ff7, (q15_t)0x3df0, (q15_t)0x3ff7, (q15_t)0x3dfd, (q15_t)0x3ff8,
+    (q15_t)0x3e09, (q15_t)0x3ff8, (q15_t)0x3e16, (q15_t)0x3ff9, (q15_t)0x3e23, (q15_t)0x3ff9, (q15_t)0x3e2f, (q15_t)0x3ff9,
+    (q15_t)0x3e3c, (q15_t)0x3ffa, (q15_t)0x3e48, (q15_t)0x3ffa, (q15_t)0x3e55, (q15_t)0x3ffa, (q15_t)0x3e61, (q15_t)0x3ffb,
+    (q15_t)0x3e6e, (q15_t)0x3ffb, (q15_t)0x3e7a, (q15_t)0x3ffb, (q15_t)0x3e87, (q15_t)0x3ffc, (q15_t)0x3e94, (q15_t)0x3ffc,
+    (q15_t)0x3ea0, (q15_t)0x3ffc, (q15_t)0x3ead, (q15_t)0x3ffc, (q15_t)0x3eb9, (q15_t)0x3ffd, (q15_t)0x3ec6, (q15_t)0x3ffd,
+    (q15_t)0x3ed2, (q15_t)0x3ffd, (q15_t)0x3edf, (q15_t)0x3ffd, (q15_t)0x3eec, (q15_t)0x3ffe, (q15_t)0x3ef8, (q15_t)0x3ffe,
+    (q15_t)0x3f05, (q15_t)0x3ffe, (q15_t)0x3f11, (q15_t)0x3ffe, (q15_t)0x3f1e, (q15_t)0x3ffe, (q15_t)0x3f2a, (q15_t)0x3fff,
+    (q15_t)0x3f37, (q15_t)0x3fff, (q15_t)0x3f44, (q15_t)0x3fff, (q15_t)0x3f50, (q15_t)0x3fff, (q15_t)0x3f5d, (q15_t)0x3fff,
+    (q15_t)0x3f69, (q15_t)0x3fff, (q15_t)0x3f76, (q15_t)0x3fff, (q15_t)0x3f82, (q15_t)0x4000, (q15_t)0x3f8f, (q15_t)0x4000,
+    (q15_t)0x3f9b, (q15_t)0x4000, (q15_t)0x3fa8, (q15_t)0x4000, (q15_t)0x3fb5, (q15_t)0x4000, (q15_t)0x3fc1, (q15_t)0x4000,
+    (q15_t)0x3fce, (q15_t)0x4000, (q15_t)0x3fda, (q15_t)0x4000, (q15_t)0x3fe7, (q15_t)0x4000, (q15_t)0x3ff3, (q15_t)0x4000,
+};
+
+/**
+  @par
+  Generation of real_CoefB array:
+  @par
+  n = 4096
+  <pre>for (i = 0; i < n; i++)
+  {
+     pBTable[2 * i]     = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
+     pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+  }</pre>
+  @par
+  Convert to fixed point Q15 format
+        round(pBTable[i] * pow(2, 15))
+*/
+const q15_t __ALIGNED(4) realCoefBQ15[8192] = {
+    (q15_t)0x4000, (q15_t)0x4000, (q15_t)0x400d, (q15_t)0x4000, (q15_t)0x4019, (q15_t)0x4000, (q15_t)0x4026, (q15_t)0x4000,
+    (q15_t)0x4032, (q15_t)0x4000, (q15_t)0x403f, (q15_t)0x4000, (q15_t)0x404b, (q15_t)0x4000, (q15_t)0x4058, (q15_t)0x4000,
+    (q15_t)0x4065, (q15_t)0x4000, (q15_t)0x4071, (q15_t)0x4000, (q15_t)0x407e, (q15_t)0x4000, (q15_t)0x408a, (q15_t)0x3fff,
+    (q15_t)0x4097, (q15_t)0x3fff, (q15_t)0x40a3, (q15_t)0x3fff, (q15_t)0x40b0, (q15_t)0x3fff, (q15_t)0x40bc, (q15_t)0x3fff,
+    (q15_t)0x40c9, (q15_t)0x3fff, (q15_t)0x40d6, (q15_t)0x3fff, (q15_t)0x40e2, (q15_t)0x3ffe, (q15_t)0x40ef, (q15_t)0x3ffe,
+    (q15_t)0x40fb, (q15_t)0x3ffe, (q15_t)0x4108, (q15_t)0x3ffe, (q15_t)0x4114, (q15_t)0x3ffe, (q15_t)0x4121, (q15_t)0x3ffd,
+    (q15_t)0x412e, (q15_t)0x3ffd, (q15_t)0x413a, (q15_t)0x3ffd, (q15_t)0x4147, (q15_t)0x3ffd, (q15_t)0x4153, (q15_t)0x3ffc,
+    (q15_t)0x4160, (q15_t)0x3ffc, (q15_t)0x416c, (q15_t)0x3ffc, (q15_t)0x4179, (q15_t)0x3ffc, (q15_t)0x4186, (q15_t)0x3ffb,
+    (q15_t)0x4192, (q15_t)0x3ffb, (q15_t)0x419f, (q15_t)0x3ffb, (q15_t)0x41ab, (q15_t)0x3ffa, (q15_t)0x41b8, (q15_t)0x3ffa,
+    (q15_t)0x41c4, (q15_t)0x3ffa, (q15_t)0x41d1, (q15_t)0x3ff9, (q15_t)0x41dd, (q15_t)0x3ff9, (q15_t)0x41ea, (q15_t)0x3ff9,
+    (q15_t)0x41f7, (q15_t)0x3ff8, (q15_t)0x4203, (q15_t)0x3ff8, (q15_t)0x4210, (q15_t)0x3ff7, (q15_t)0x421c, (q15_t)0x3ff7,
+    (q15_t)0x4229, (q15_t)0x3ff7, (q15_t)0x4235, (q15_t)0x3ff6, (q15_t)0x4242, (q15_t)0x3ff6, (q15_t)0x424e, (q15_t)0x3ff5,
+    (q15_t)0x425b, (q15_t)0x3ff5, (q15_t)0x4268, (q15_t)0x3ff4, (q15_t)0x4274, (q15_t)0x3ff4, (q15_t)0x4281, (q15_t)0x3ff3,
+    (q15_t)0x428d, (q15_t)0x3ff3, (q15_t)0x429a, (q15_t)0x3ff2, (q15_t)0x42a6, (q15_t)0x3ff2, (q15_t)0x42b3, (q15_t)0x3ff1,
+    (q15_t)0x42c0, (q15_t)0x3ff1, (q15_t)0x42cc, (q15_t)0x3ff0, (q15_t)0x42d9, (q15_t)0x3ff0, (q15_t)0x42e5, (q15_t)0x3fef,
+    (q15_t)0x42f2, (q15_t)0x3fef, (q15_t)0x42fe, (q15_t)0x3fee, (q15_t)0x430b, (q15_t)0x3fed, (q15_t)0x4317, (q15_t)0x3fed,
+    (q15_t)0x4324, (q15_t)0x3fec, (q15_t)0x4330, (q15_t)0x3fec, (q15_t)0x433d, (q15_t)0x3feb, (q15_t)0x434a, (q15_t)0x3fea,
+    (q15_t)0x4356, (q15_t)0x3fea, (q15_t)0x4363, (q15_t)0x3fe9, (q15_t)0x436f, (q15_t)0x3fe8, (q15_t)0x437c, (q15_t)0x3fe8,
+    (q15_t)0x4388, (q15_t)0x3fe7, (q15_t)0x4395, (q15_t)0x3fe6, (q15_t)0x43a1, (q15_t)0x3fe6, (q15_t)0x43ae, (q15_t)0x3fe5,
+    (q15_t)0x43bb, (q15_t)0x3fe4, (q15_t)0x43c7, (q15_t)0x3fe3, (q15_t)0x43d4, (q15_t)0x3fe3, (q15_t)0x43e0, (q15_t)0x3fe2,
+    (q15_t)0x43ed, (q15_t)0x3fe1, (q15_t)0x43f9, (q15_t)0x3fe0, (q15_t)0x4406, (q15_t)0x3fe0, (q15_t)0x4412, (q15_t)0x3fdf,
+    (q15_t)0x441f, (q15_t)0x3fde, (q15_t)0x442b, (q15_t)0x3fdd, (q15_t)0x4438, (q15_t)0x3fdc, (q15_t)0x4444, (q15_t)0x3fdc,
+    (q15_t)0x4451, (q15_t)0x3fdb, (q15_t)0x445e, (q15_t)0x3fda, (q15_t)0x446a, (q15_t)0x3fd9, (q15_t)0x4477, (q15_t)0x3fd8,
+    (q15_t)0x4483, (q15_t)0x3fd7, (q15_t)0x4490, (q15_t)0x3fd6, (q15_t)0x449c, (q15_t)0x3fd5, (q15_t)0x44a9, (q15_t)0x3fd5,
+    (q15_t)0x44b5, (q15_t)0x3fd4, (q15_t)0x44c2, (q15_t)0x3fd3, (q15_t)0x44ce, (q15_t)0x3fd2, (q15_t)0x44db, (q15_t)0x3fd1,
+    (q15_t)0x44e7, (q15_t)0x3fd0, (q15_t)0x44f4, (q15_t)0x3fcf, (q15_t)0x4500, (q15_t)0x3fce, (q15_t)0x450d, (q15_t)0x3fcd,
+    (q15_t)0x451a, (q15_t)0x3fcc, (q15_t)0x4526, (q15_t)0x3fcb, (q15_t)0x4533, (q15_t)0x3fca, (q15_t)0x453f, (q15_t)0x3fc9,
+    (q15_t)0x454c, (q15_t)0x3fc8, (q15_t)0x4558, (q15_t)0x3fc7, (q15_t)0x4565, (q15_t)0x3fc6, (q15_t)0x4571, (q15_t)0x3fc5,
+    (q15_t)0x457e, (q15_t)0x3fc4, (q15_t)0x458a, (q15_t)0x3fc3, (q15_t)0x4597, (q15_t)0x3fc1, (q15_t)0x45a3, (q15_t)0x3fc0,
+    (q15_t)0x45b0, (q15_t)0x3fbf, (q15_t)0x45bc, (q15_t)0x3fbe, (q15_t)0x45c9, (q15_t)0x3fbd, (q15_t)0x45d5, (q15_t)0x3fbc,
+    (q15_t)0x45e2, (q15_t)0x3fbb, (q15_t)0x45ee, (q15_t)0x3fb9, (q15_t)0x45fb, (q15_t)0x3fb8, (q15_t)0x4607, (q15_t)0x3fb7,
+    (q15_t)0x4614, (q15_t)0x3fb6, (q15_t)0x4620, (q15_t)0x3fb5, (q15_t)0x462d, (q15_t)0x3fb4, (q15_t)0x4639, (q15_t)0x3fb2,
+    (q15_t)0x4646, (q15_t)0x3fb1, (q15_t)0x4652, (q15_t)0x3fb0, (q15_t)0x465f, (q15_t)0x3faf, (q15_t)0x466b, (q15_t)0x3fad,
+    (q15_t)0x4678, (q15_t)0x3fac, (q15_t)0x4684, (q15_t)0x3fab, (q15_t)0x4691, (q15_t)0x3faa, (q15_t)0x469d, (q15_t)0x3fa8,
+    (q15_t)0x46aa, (q15_t)0x3fa7, (q15_t)0x46b6, (q15_t)0x3fa6, (q15_t)0x46c3, (q15_t)0x3fa4, (q15_t)0x46cf, (q15_t)0x3fa3,
+    (q15_t)0x46dc, (q15_t)0x3fa2, (q15_t)0x46e8, (q15_t)0x3fa0, (q15_t)0x46f5, (q15_t)0x3f9f, (q15_t)0x4701, (q15_t)0x3f9e,
+    (q15_t)0x470e, (q15_t)0x3f9c, (q15_t)0x471a, (q15_t)0x3f9b, (q15_t)0x4727, (q15_t)0x3f99, (q15_t)0x4733, (q15_t)0x3f98,
+    (q15_t)0x4740, (q15_t)0x3f97, (q15_t)0x474c, (q15_t)0x3f95, (q15_t)0x4759, (q15_t)0x3f94, (q15_t)0x4765, (q15_t)0x3f92,
+    (q15_t)0x4772, (q15_t)0x3f91, (q15_t)0x477e, (q15_t)0x3f8f, (q15_t)0x478b, (q15_t)0x3f8e, (q15_t)0x4797, (q15_t)0x3f8c,
+    (q15_t)0x47a4, (q15_t)0x3f8b, (q15_t)0x47b0, (q15_t)0x3f89, (q15_t)0x47bd, (q15_t)0x3f88, (q15_t)0x47c9, (q15_t)0x3f86,
+    (q15_t)0x47d6, (q15_t)0x3f85, (q15_t)0x47e2, (q15_t)0x3f83, (q15_t)0x47ef, (q15_t)0x3f82, (q15_t)0x47fb, (q15_t)0x3f80,
+    (q15_t)0x4807, (q15_t)0x3f7f, (q15_t)0x4814, (q15_t)0x3f7d, (q15_t)0x4820, (q15_t)0x3f7b, (q15_t)0x482d, (q15_t)0x3f7a,
+    (q15_t)0x4839, (q15_t)0x3f78, (q15_t)0x4846, (q15_t)0x3f77, (q15_t)0x4852, (q15_t)0x3f75, (q15_t)0x485f, (q15_t)0x3f73,
+    (q15_t)0x486b, (q15_t)0x3f72, (q15_t)0x4878, (q15_t)0x3f70, (q15_t)0x4884, (q15_t)0x3f6e, (q15_t)0x4891, (q15_t)0x3f6d,
+    (q15_t)0x489d, (q15_t)0x3f6b, (q15_t)0x48a9, (q15_t)0x3f69, (q15_t)0x48b6, (q15_t)0x3f68, (q15_t)0x48c2, (q15_t)0x3f66,
+    (q15_t)0x48cf, (q15_t)0x3f64, (q15_t)0x48db, (q15_t)0x3f62, (q15_t)0x48e8, (q15_t)0x3f61, (q15_t)0x48f4, (q15_t)0x3f5f,
+    (q15_t)0x4901, (q15_t)0x3f5d, (q15_t)0x490d, (q15_t)0x3f5b, (q15_t)0x4919, (q15_t)0x3f5a, (q15_t)0x4926, (q15_t)0x3f58,
+    (q15_t)0x4932, (q15_t)0x3f56, (q15_t)0x493f, (q15_t)0x3f54, (q15_t)0x494b, (q15_t)0x3f52, (q15_t)0x4958, (q15_t)0x3f51,
+    (q15_t)0x4964, (q15_t)0x3f4f, (q15_t)0x4970, (q15_t)0x3f4d, (q15_t)0x497d, (q15_t)0x3f4b, (q15_t)0x4989, (q15_t)0x3f49,
+    (q15_t)0x4996, (q15_t)0x3f47, (q15_t)0x49a2, (q15_t)0x3f45, (q15_t)0x49af, (q15_t)0x3f43, (q15_t)0x49bb, (q15_t)0x3f42,
+    (q15_t)0x49c7, (q15_t)0x3f40, (q15_t)0x49d4, (q15_t)0x3f3e, (q15_t)0x49e0, (q15_t)0x3f3c, (q15_t)0x49ed, (q15_t)0x3f3a,
+    (q15_t)0x49f9, (q15_t)0x3f38, (q15_t)0x4a06, (q15_t)0x3f36, (q15_t)0x4a12, (q15_t)0x3f34, (q15_t)0x4a1e, (q15_t)0x3f32,
+    (q15_t)0x4a2b, (q15_t)0x3f30, (q15_t)0x4a37, (q15_t)0x3f2e, (q15_t)0x4a44, (q15_t)0x3f2c, (q15_t)0x4a50, (q15_t)0x3f2a,
+    (q15_t)0x4a5c, (q15_t)0x3f28, (q15_t)0x4a69, (q15_t)0x3f26, (q15_t)0x4a75, (q15_t)0x3f24, (q15_t)0x4a82, (q15_t)0x3f22,
+    (q15_t)0x4a8e, (q15_t)0x3f20, (q15_t)0x4a9a, (q15_t)0x3f1e, (q15_t)0x4aa7, (q15_t)0x3f1c, (q15_t)0x4ab3, (q15_t)0x3f19,
+    (q15_t)0x4ac0, (q15_t)0x3f17, (q15_t)0x4acc, (q15_t)0x3f15, (q15_t)0x4ad8, (q15_t)0x3f13, (q15_t)0x4ae5, (q15_t)0x3f11,
+    (q15_t)0x4af1, (q15_t)0x3f0f, (q15_t)0x4afd, (q15_t)0x3f0d, (q15_t)0x4b0a, (q15_t)0x3f0a, (q15_t)0x4b16, (q15_t)0x3f08,
+    (q15_t)0x4b23, (q15_t)0x3f06, (q15_t)0x4b2f, (q15_t)0x3f04, (q15_t)0x4b3b, (q15_t)0x3f02, (q15_t)0x4b48, (q15_t)0x3f00,
+    (q15_t)0x4b54, (q15_t)0x3efd, (q15_t)0x4b60, (q15_t)0x3efb, (q15_t)0x4b6d, (q15_t)0x3ef9, (q15_t)0x4b79, (q15_t)0x3ef7,
+    (q15_t)0x4b85, (q15_t)0x3ef4, (q15_t)0x4b92, (q15_t)0x3ef2, (q15_t)0x4b9e, (q15_t)0x3ef0, (q15_t)0x4bab, (q15_t)0x3eed,
+    (q15_t)0x4bb7, (q15_t)0x3eeb, (q15_t)0x4bc3, (q15_t)0x3ee9, (q15_t)0x4bd0, (q15_t)0x3ee7, (q15_t)0x4bdc, (q15_t)0x3ee4,
+    (q15_t)0x4be8, (q15_t)0x3ee2, (q15_t)0x4bf5, (q15_t)0x3ee0, (q15_t)0x4c01, (q15_t)0x3edd, (q15_t)0x4c0d, (q15_t)0x3edb,
+    (q15_t)0x4c1a, (q15_t)0x3ed8, (q15_t)0x4c26, (q15_t)0x3ed6, (q15_t)0x4c32, (q15_t)0x3ed4, (q15_t)0x4c3f, (q15_t)0x3ed1,
+    (q15_t)0x4c4b, (q15_t)0x3ecf, (q15_t)0x4c57, (q15_t)0x3ecc, (q15_t)0x4c64, (q15_t)0x3eca, (q15_t)0x4c70, (q15_t)0x3ec8,
+    (q15_t)0x4c7c, (q15_t)0x3ec5, (q15_t)0x4c89, (q15_t)0x3ec3, (q15_t)0x4c95, (q15_t)0x3ec0, (q15_t)0x4ca1, (q15_t)0x3ebe,
+    (q15_t)0x4cae, (q15_t)0x3ebb, (q15_t)0x4cba, (q15_t)0x3eb9, (q15_t)0x4cc6, (q15_t)0x3eb6, (q15_t)0x4cd3, (q15_t)0x3eb4,
+    (q15_t)0x4cdf, (q15_t)0x3eb1, (q15_t)0x4ceb, (q15_t)0x3eaf, (q15_t)0x4cf8, (q15_t)0x3eac, (q15_t)0x4d04, (q15_t)0x3eaa,
+    (q15_t)0x4d10, (q15_t)0x3ea7, (q15_t)0x4d1c, (q15_t)0x3ea5, (q15_t)0x4d29, (q15_t)0x3ea2, (q15_t)0x4d35, (q15_t)0x3e9f,
+    (q15_t)0x4d41, (q15_t)0x3e9d, (q15_t)0x4d4e, (q15_t)0x3e9a, (q15_t)0x4d5a, (q15_t)0x3e98, (q15_t)0x4d66, (q15_t)0x3e95,
+    (q15_t)0x4d72, (q15_t)0x3e92, (q15_t)0x4d7f, (q15_t)0x3e90, (q15_t)0x4d8b, (q15_t)0x3e8d, (q15_t)0x4d97, (q15_t)0x3e8a,
+    (q15_t)0x4da4, (q15_t)0x3e88, (q15_t)0x4db0, (q15_t)0x3e85, (q15_t)0x4dbc, (q15_t)0x3e82, (q15_t)0x4dc8, (q15_t)0x3e80,
+    (q15_t)0x4dd5, (q15_t)0x3e7d, (q15_t)0x4de1, (q15_t)0x3e7a, (q15_t)0x4ded, (q15_t)0x3e77, (q15_t)0x4df9, (q15_t)0x3e75,
+    (q15_t)0x4e06, (q15_t)0x3e72, (q15_t)0x4e12, (q15_t)0x3e6f, (q15_t)0x4e1e, (q15_t)0x3e6c, (q15_t)0x4e2b, (q15_t)0x3e6a,
+    (q15_t)0x4e37, (q15_t)0x3e67, (q15_t)0x4e43, (q15_t)0x3e64, (q15_t)0x4e4f, (q15_t)0x3e61, (q15_t)0x4e5c, (q15_t)0x3e5e,
+    (q15_t)0x4e68, (q15_t)0x3e5c, (q15_t)0x4e74, (q15_t)0x3e59, (q15_t)0x4e80, (q15_t)0x3e56, (q15_t)0x4e8c, (q15_t)0x3e53,
+    (q15_t)0x4e99, (q15_t)0x3e50, (q15_t)0x4ea5, (q15_t)0x3e4d, (q15_t)0x4eb1, (q15_t)0x3e4a, (q15_t)0x4ebd, (q15_t)0x3e48,
+    (q15_t)0x4eca, (q15_t)0x3e45, (q15_t)0x4ed6, (q15_t)0x3e42, (q15_t)0x4ee2, (q15_t)0x3e3f, (q15_t)0x4eee, (q15_t)0x3e3c,
+    (q15_t)0x4efb, (q15_t)0x3e39, (q15_t)0x4f07, (q15_t)0x3e36, (q15_t)0x4f13, (q15_t)0x3e33, (q15_t)0x4f1f, (q15_t)0x3e30,
+    (q15_t)0x4f2b, (q15_t)0x3e2d, (q15_t)0x4f38, (q15_t)0x3e2a, (q15_t)0x4f44, (q15_t)0x3e27, (q15_t)0x4f50, (q15_t)0x3e24,
+    (q15_t)0x4f5c, (q15_t)0x3e21, (q15_t)0x4f68, (q15_t)0x3e1e, (q15_t)0x4f75, (q15_t)0x3e1b, (q15_t)0x4f81, (q15_t)0x3e18,
+    (q15_t)0x4f8d, (q15_t)0x3e15, (q15_t)0x4f99, (q15_t)0x3e12, (q15_t)0x4fa5, (q15_t)0x3e0f, (q15_t)0x4fb2, (q15_t)0x3e0c,
+    (q15_t)0x4fbe, (q15_t)0x3e09, (q15_t)0x4fca, (q15_t)0x3e06, (q15_t)0x4fd6, (q15_t)0x3e03, (q15_t)0x4fe2, (q15_t)0x3dff,
+    (q15_t)0x4fee, (q15_t)0x3dfc, (q15_t)0x4ffb, (q15_t)0x3df9, (q15_t)0x5007, (q15_t)0x3df6, (q15_t)0x5013, (q15_t)0x3df3,
+    (q15_t)0x501f, (q15_t)0x3df0, (q15_t)0x502b, (q15_t)0x3ded, (q15_t)0x5037, (q15_t)0x3de9, (q15_t)0x5044, (q15_t)0x3de6,
+    (q15_t)0x5050, (q15_t)0x3de3, (q15_t)0x505c, (q15_t)0x3de0, (q15_t)0x5068, (q15_t)0x3ddd, (q15_t)0x5074, (q15_t)0x3dd9,
+    (q15_t)0x5080, (q15_t)0x3dd6, (q15_t)0x508c, (q15_t)0x3dd3, (q15_t)0x5099, (q15_t)0x3dd0, (q15_t)0x50a5, (q15_t)0x3dcc,
+    (q15_t)0x50b1, (q15_t)0x3dc9, (q15_t)0x50bd, (q15_t)0x3dc6, (q15_t)0x50c9, (q15_t)0x3dc2, (q15_t)0x50d5, (q15_t)0x3dbf,
+    (q15_t)0x50e1, (q15_t)0x3dbc, (q15_t)0x50ed, (q15_t)0x3db9, (q15_t)0x50fa, (q15_t)0x3db5, (q15_t)0x5106, (q15_t)0x3db2,
+    (q15_t)0x5112, (q15_t)0x3daf, (q15_t)0x511e, (q15_t)0x3dab, (q15_t)0x512a, (q15_t)0x3da8, (q15_t)0x5136, (q15_t)0x3da4,
+    (q15_t)0x5142, (q15_t)0x3da1, (q15_t)0x514e, (q15_t)0x3d9e, (q15_t)0x515a, (q15_t)0x3d9a, (q15_t)0x5167, (q15_t)0x3d97,
+    (q15_t)0x5173, (q15_t)0x3d93, (q15_t)0x517f, (q15_t)0x3d90, (q15_t)0x518b, (q15_t)0x3d8d, (q15_t)0x5197, (q15_t)0x3d89,
+    (q15_t)0x51a3, (q15_t)0x3d86, (q15_t)0x51af, (q15_t)0x3d82, (q15_t)0x51bb, (q15_t)0x3d7f, (q15_t)0x51c7, (q15_t)0x3d7b,
+    (q15_t)0x51d3, (q15_t)0x3d78, (q15_t)0x51df, (q15_t)0x3d74, (q15_t)0x51eb, (q15_t)0x3d71, (q15_t)0x51f7, (q15_t)0x3d6d,
+    (q15_t)0x5204, (q15_t)0x3d6a, (q15_t)0x5210, (q15_t)0x3d66, (q15_t)0x521c, (q15_t)0x3d63, (q15_t)0x5228, (q15_t)0x3d5f,
+    (q15_t)0x5234, (q15_t)0x3d5b, (q15_t)0x5240, (q15_t)0x3d58, (q15_t)0x524c, (q15_t)0x3d54, (q15_t)0x5258, (q15_t)0x3d51,
+    (q15_t)0x5264, (q15_t)0x3d4d, (q15_t)0x5270, (q15_t)0x3d49, (q15_t)0x527c, (q15_t)0x3d46, (q15_t)0x5288, (q15_t)0x3d42,
+    (q15_t)0x5294, (q15_t)0x3d3f, (q15_t)0x52a0, (q15_t)0x3d3b, (q15_t)0x52ac, (q15_t)0x3d37, (q15_t)0x52b8, (q15_t)0x3d34,
+    (q15_t)0x52c4, (q15_t)0x3d30, (q15_t)0x52d0, (q15_t)0x3d2c, (q15_t)0x52dc, (q15_t)0x3d28, (q15_t)0x52e8, (q15_t)0x3d25,
+    (q15_t)0x52f4, (q15_t)0x3d21, (q15_t)0x5300, (q15_t)0x3d1d, (q15_t)0x530c, (q15_t)0x3d1a, (q15_t)0x5318, (q15_t)0x3d16,
+    (q15_t)0x5324, (q15_t)0x3d12, (q15_t)0x5330, (q15_t)0x3d0e, (q15_t)0x533c, (q15_t)0x3d0b, (q15_t)0x5348, (q15_t)0x3d07,
+    (q15_t)0x5354, (q15_t)0x3d03, (q15_t)0x5360, (q15_t)0x3cff, (q15_t)0x536c, (q15_t)0x3cfb, (q15_t)0x5378, (q15_t)0x3cf8,
+    (q15_t)0x5384, (q15_t)0x3cf4, (q15_t)0x5390, (q15_t)0x3cf0, (q15_t)0x539c, (q15_t)0x3cec, (q15_t)0x53a8, (q15_t)0x3ce8,
+    (q15_t)0x53b4, (q15_t)0x3ce4, (q15_t)0x53c0, (q15_t)0x3ce0, (q15_t)0x53cc, (q15_t)0x3cdd, (q15_t)0x53d8, (q15_t)0x3cd9,
+    (q15_t)0x53e4, (q15_t)0x3cd5, (q15_t)0x53f0, (q15_t)0x3cd1, (q15_t)0x53fb, (q15_t)0x3ccd, (q15_t)0x5407, (q15_t)0x3cc9,
+    (q15_t)0x5413, (q15_t)0x3cc5, (q15_t)0x541f, (q15_t)0x3cc1, (q15_t)0x542b, (q15_t)0x3cbd, (q15_t)0x5437, (q15_t)0x3cb9,
+    (q15_t)0x5443, (q15_t)0x3cb5, (q15_t)0x544f, (q15_t)0x3cb1, (q15_t)0x545b, (q15_t)0x3cad, (q15_t)0x5467, (q15_t)0x3ca9,
+    (q15_t)0x5473, (q15_t)0x3ca5, (q15_t)0x547f, (q15_t)0x3ca1, (q15_t)0x548b, (q15_t)0x3c9d, (q15_t)0x5496, (q15_t)0x3c99,
+    (q15_t)0x54a2, (q15_t)0x3c95, (q15_t)0x54ae, (q15_t)0x3c91, (q15_t)0x54ba, (q15_t)0x3c8d, (q15_t)0x54c6, (q15_t)0x3c89,
+    (q15_t)0x54d2, (q15_t)0x3c85, (q15_t)0x54de, (q15_t)0x3c81, (q15_t)0x54ea, (q15_t)0x3c7d, (q15_t)0x54f6, (q15_t)0x3c79,
+    (q15_t)0x5501, (q15_t)0x3c74, (q15_t)0x550d, (q15_t)0x3c70, (q15_t)0x5519, (q15_t)0x3c6c, (q15_t)0x5525, (q15_t)0x3c68,
+    (q15_t)0x5531, (q15_t)0x3c64, (q15_t)0x553d, (q15_t)0x3c60, (q15_t)0x5549, (q15_t)0x3c5b, (q15_t)0x5554, (q15_t)0x3c57,
+    (q15_t)0x5560, (q15_t)0x3c53, (q15_t)0x556c, (q15_t)0x3c4f, (q15_t)0x5578, (q15_t)0x3c4b, (q15_t)0x5584, (q15_t)0x3c46,
+    (q15_t)0x5590, (q15_t)0x3c42, (q15_t)0x559b, (q15_t)0x3c3e, (q15_t)0x55a7, (q15_t)0x3c3a, (q15_t)0x55b3, (q15_t)0x3c36,
+    (q15_t)0x55bf, (q15_t)0x3c31, (q15_t)0x55cb, (q15_t)0x3c2d, (q15_t)0x55d7, (q15_t)0x3c29, (q15_t)0x55e2, (q15_t)0x3c24,
+    (q15_t)0x55ee, (q15_t)0x3c20, (q15_t)0x55fa, (q15_t)0x3c1c, (q15_t)0x5606, (q15_t)0x3c17, (q15_t)0x5612, (q15_t)0x3c13,
+    (q15_t)0x561d, (q15_t)0x3c0f, (q15_t)0x5629, (q15_t)0x3c0a, (q15_t)0x5635, (q15_t)0x3c06, (q15_t)0x5641, (q15_t)0x3c02,
+    (q15_t)0x564c, (q15_t)0x3bfd, (q15_t)0x5658, (q15_t)0x3bf9, (q15_t)0x5664, (q15_t)0x3bf5, (q15_t)0x5670, (q15_t)0x3bf0,
+    (q15_t)0x567c, (q15_t)0x3bec, (q15_t)0x5687, (q15_t)0x3be7, (q15_t)0x5693, (q15_t)0x3be3, (q15_t)0x569f, (q15_t)0x3bde,
+    (q15_t)0x56ab, (q15_t)0x3bda, (q15_t)0x56b6, (q15_t)0x3bd6, (q15_t)0x56c2, (q15_t)0x3bd1, (q15_t)0x56ce, (q15_t)0x3bcd,
+    (q15_t)0x56da, (q15_t)0x3bc8, (q15_t)0x56e5, (q15_t)0x3bc4, (q15_t)0x56f1, (q15_t)0x3bbf, (q15_t)0x56fd, (q15_t)0x3bbb,
+    (q15_t)0x5709, (q15_t)0x3bb6, (q15_t)0x5714, (q15_t)0x3bb2, (q15_t)0x5720, (q15_t)0x3bad, (q15_t)0x572c, (q15_t)0x3ba9,
+    (q15_t)0x5737, (q15_t)0x3ba4, (q15_t)0x5743, (q15_t)0x3b9f, (q15_t)0x574f, (q15_t)0x3b9b, (q15_t)0x575b, (q15_t)0x3b96,
+    (q15_t)0x5766, (q15_t)0x3b92, (q15_t)0x5772, (q15_t)0x3b8d, (q15_t)0x577e, (q15_t)0x3b88, (q15_t)0x5789, (q15_t)0x3b84,
+    (q15_t)0x5795, (q15_t)0x3b7f, (q15_t)0x57a1, (q15_t)0x3b7b, (q15_t)0x57ac, (q15_t)0x3b76, (q15_t)0x57b8, (q15_t)0x3b71,
+    (q15_t)0x57c4, (q15_t)0x3b6d, (q15_t)0x57cf, (q15_t)0x3b68, (q15_t)0x57db, (q15_t)0x3b63, (q15_t)0x57e7, (q15_t)0x3b5f,
+    (q15_t)0x57f2, (q15_t)0x3b5a, (q15_t)0x57fe, (q15_t)0x3b55, (q15_t)0x580a, (q15_t)0x3b50, (q15_t)0x5815, (q15_t)0x3b4c,
+    (q15_t)0x5821, (q15_t)0x3b47, (q15_t)0x582d, (q15_t)0x3b42, (q15_t)0x5838, (q15_t)0x3b3e, (q15_t)0x5844, (q15_t)0x3b39,
+    (q15_t)0x584f, (q15_t)0x3b34, (q15_t)0x585b, (q15_t)0x3b2f, (q15_t)0x5867, (q15_t)0x3b2a, (q15_t)0x5872, (q15_t)0x3b26,
+    (q15_t)0x587e, (q15_t)0x3b21, (q15_t)0x5889, (q15_t)0x3b1c, (q15_t)0x5895, (q15_t)0x3b17, (q15_t)0x58a1, (q15_t)0x3b12,
+    (q15_t)0x58ac, (q15_t)0x3b0e, (q15_t)0x58b8, (q15_t)0x3b09, (q15_t)0x58c3, (q15_t)0x3b04, (q15_t)0x58cf, (q15_t)0x3aff,
+    (q15_t)0x58db, (q15_t)0x3afa, (q15_t)0x58e6, (q15_t)0x3af5, (q15_t)0x58f2, (q15_t)0x3af0, (q15_t)0x58fd, (q15_t)0x3aeb,
+    (q15_t)0x5909, (q15_t)0x3ae6, (q15_t)0x5914, (q15_t)0x3ae2, (q15_t)0x5920, (q15_t)0x3add, (q15_t)0x592c, (q15_t)0x3ad8,
+    (q15_t)0x5937, (q15_t)0x3ad3, (q15_t)0x5943, (q15_t)0x3ace, (q15_t)0x594e, (q15_t)0x3ac9, (q15_t)0x595a, (q15_t)0x3ac4,
+    (q15_t)0x5965, (q15_t)0x3abf, (q15_t)0x5971, (q15_t)0x3aba, (q15_t)0x597c, (q15_t)0x3ab5, (q15_t)0x5988, (q15_t)0x3ab0,
+    (q15_t)0x5993, (q15_t)0x3aab, (q15_t)0x599f, (q15_t)0x3aa6, (q15_t)0x59aa, (q15_t)0x3aa1, (q15_t)0x59b6, (q15_t)0x3a9c,
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+    (q15_t)0x67af, (q15_t)0x3236, (q15_t)0x67b9, (q15_t)0x322e, (q15_t)0x67c3, (q15_t)0x3227, (q15_t)0x67cd, (q15_t)0x321f,
+    (q15_t)0x67d6, (q15_t)0x3217, (q15_t)0x67e0, (q15_t)0x320f, (q15_t)0x67ea, (q15_t)0x3207, (q15_t)0x67f4, (q15_t)0x31ff,
+    (q15_t)0x67fe, (q15_t)0x31f8, (q15_t)0x6808, (q15_t)0x31f0, (q15_t)0x6811, (q15_t)0x31e8, (q15_t)0x681b, (q15_t)0x31e0,
+    (q15_t)0x6825, (q15_t)0x31d8, (q15_t)0x682f, (q15_t)0x31d0, (q15_t)0x6838, (q15_t)0x31c8, (q15_t)0x6842, (q15_t)0x31c0,
+    (q15_t)0x684c, (q15_t)0x31b9, (q15_t)0x6856, (q15_t)0x31b1, (q15_t)0x6860, (q15_t)0x31a9, (q15_t)0x6869, (q15_t)0x31a1,
+    (q15_t)0x6873, (q15_t)0x3199, (q15_t)0x687d, (q15_t)0x3191, (q15_t)0x6886, (q15_t)0x3189, (q15_t)0x6890, (q15_t)0x3181,
+    (q15_t)0x689a, (q15_t)0x3179, (q15_t)0x68a4, (q15_t)0x3171, (q15_t)0x68ad, (q15_t)0x3169, (q15_t)0x68b7, (q15_t)0x3161,
+    (q15_t)0x68c1, (q15_t)0x3159, (q15_t)0x68ca, (q15_t)0x3151, (q15_t)0x68d4, (q15_t)0x3149, (q15_t)0x68de, (q15_t)0x3141,
+    (q15_t)0x68e7, (q15_t)0x3139, (q15_t)0x68f1, (q15_t)0x3131, (q15_t)0x68fb, (q15_t)0x3129, (q15_t)0x6904, (q15_t)0x3121,
+    (q15_t)0x690e, (q15_t)0x3119, (q15_t)0x6918, (q15_t)0x3111, (q15_t)0x6921, (q15_t)0x3109, (q15_t)0x692b, (q15_t)0x3101,
+    (q15_t)0x6935, (q15_t)0x30f9, (q15_t)0x693e, (q15_t)0x30f0, (q15_t)0x6948, (q15_t)0x30e8, (q15_t)0x6951, (q15_t)0x30e0,
+    (q15_t)0x695b, (q15_t)0x30d8, (q15_t)0x6965, (q15_t)0x30d0, (q15_t)0x696e, (q15_t)0x30c8, (q15_t)0x6978, (q15_t)0x30c0,
+    (q15_t)0x6981, (q15_t)0x30b8, (q15_t)0x698b, (q15_t)0x30af, (q15_t)0x6994, (q15_t)0x30a7, (q15_t)0x699e, (q15_t)0x309f,
+    (q15_t)0x69a7, (q15_t)0x3097, (q15_t)0x69b1, (q15_t)0x308f, (q15_t)0x69bb, (q15_t)0x3087, (q15_t)0x69c4, (q15_t)0x307e,
+    (q15_t)0x69ce, (q15_t)0x3076, (q15_t)0x69d7, (q15_t)0x306e, (q15_t)0x69e1, (q15_t)0x3066, (q15_t)0x69ea, (q15_t)0x305d,
+    (q15_t)0x69f4, (q15_t)0x3055, (q15_t)0x69fd, (q15_t)0x304d, (q15_t)0x6a07, (q15_t)0x3045, (q15_t)0x6a10, (q15_t)0x303c,
+    (q15_t)0x6a1a, (q15_t)0x3034, (q15_t)0x6a23, (q15_t)0x302c, (q15_t)0x6a2c, (q15_t)0x3024, (q15_t)0x6a36, (q15_t)0x301b,
+    (q15_t)0x6a3f, (q15_t)0x3013, (q15_t)0x6a49, (q15_t)0x300b, (q15_t)0x6a52, (q15_t)0x3002, (q15_t)0x6a5c, (q15_t)0x2ffa,
+    (q15_t)0x6a65, (q15_t)0x2ff2, (q15_t)0x6a6e, (q15_t)0x2fea, (q15_t)0x6a78, (q15_t)0x2fe1, (q15_t)0x6a81, (q15_t)0x2fd9,
+    (q15_t)0x6a8b, (q15_t)0x2fd0, (q15_t)0x6a94, (q15_t)0x2fc8, (q15_t)0x6a9d, (q15_t)0x2fc0, (q15_t)0x6aa7, (q15_t)0x2fb7,
+    (q15_t)0x6ab0, (q15_t)0x2faf, (q15_t)0x6ab9, (q15_t)0x2fa7, (q15_t)0x6ac3, (q15_t)0x2f9e, (q15_t)0x6acc, (q15_t)0x2f96,
+    (q15_t)0x6ad6, (q15_t)0x2f8d, (q15_t)0x6adf, (q15_t)0x2f85, (q15_t)0x6ae8, (q15_t)0x2f7d, (q15_t)0x6af2, (q15_t)0x2f74,
+    (q15_t)0x6afb, (q15_t)0x2f6c, (q15_t)0x6b04, (q15_t)0x2f63, (q15_t)0x6b0d, (q15_t)0x2f5b, (q15_t)0x6b17, (q15_t)0x2f52,
+    (q15_t)0x6b20, (q15_t)0x2f4a, (q15_t)0x6b29, (q15_t)0x2f41, (q15_t)0x6b33, (q15_t)0x2f39, (q15_t)0x6b3c, (q15_t)0x2f30,
+    (q15_t)0x6b45, (q15_t)0x2f28, (q15_t)0x6b4e, (q15_t)0x2f20, (q15_t)0x6b58, (q15_t)0x2f17, (q15_t)0x6b61, (q15_t)0x2f0e,
+    (q15_t)0x6b6a, (q15_t)0x2f06, (q15_t)0x6b73, (q15_t)0x2efd, (q15_t)0x6b7d, (q15_t)0x2ef5, (q15_t)0x6b86, (q15_t)0x2eec,
+    (q15_t)0x6b8f, (q15_t)0x2ee4, (q15_t)0x6b98, (q15_t)0x2edb, (q15_t)0x6ba1, (q15_t)0x2ed3, (q15_t)0x6bab, (q15_t)0x2eca,
+    (q15_t)0x6bb4, (q15_t)0x2ec2, (q15_t)0x6bbd, (q15_t)0x2eb9, (q15_t)0x6bc6, (q15_t)0x2eb0, (q15_t)0x6bcf, (q15_t)0x2ea8,
+    (q15_t)0x6bd8, (q15_t)0x2e9f, (q15_t)0x6be2, (q15_t)0x2e97, (q15_t)0x6beb, (q15_t)0x2e8e, (q15_t)0x6bf4, (q15_t)0x2e85,
+    (q15_t)0x6bfd, (q15_t)0x2e7d, (q15_t)0x6c06, (q15_t)0x2e74, (q15_t)0x6c0f, (q15_t)0x2e6b, (q15_t)0x6c18, (q15_t)0x2e63,
+    (q15_t)0x6c21, (q15_t)0x2e5a, (q15_t)0x6c2b, (q15_t)0x2e51, (q15_t)0x6c34, (q15_t)0x2e49, (q15_t)0x6c3d, (q15_t)0x2e40,
+    (q15_t)0x6c46, (q15_t)0x2e37, (q15_t)0x6c4f, (q15_t)0x2e2f, (q15_t)0x6c58, (q15_t)0x2e26, (q15_t)0x6c61, (q15_t)0x2e1d,
+    (q15_t)0x6c6a, (q15_t)0x2e15, (q15_t)0x6c73, (q15_t)0x2e0c, (q15_t)0x6c7c, (q15_t)0x2e03, (q15_t)0x6c85, (q15_t)0x2dfa,
+    (q15_t)0x6c8e, (q15_t)0x2df2, (q15_t)0x6c97, (q15_t)0x2de9, (q15_t)0x6ca0, (q15_t)0x2de0, (q15_t)0x6ca9, (q15_t)0x2dd7,
+    (q15_t)0x6cb2, (q15_t)0x2dcf, (q15_t)0x6cbb, (q15_t)0x2dc6, (q15_t)0x6cc4, (q15_t)0x2dbd, (q15_t)0x6ccd, (q15_t)0x2db4,
+    (q15_t)0x6cd6, (q15_t)0x2dab, (q15_t)0x6cdf, (q15_t)0x2da3, (q15_t)0x6ce8, (q15_t)0x2d9a, (q15_t)0x6cf1, (q15_t)0x2d91,
+    (q15_t)0x6cfa, (q15_t)0x2d88, (q15_t)0x6d03, (q15_t)0x2d7f, (q15_t)0x6d0c, (q15_t)0x2d76, (q15_t)0x6d15, (q15_t)0x2d6e,
+    (q15_t)0x6d1e, (q15_t)0x2d65, (q15_t)0x6d27, (q15_t)0x2d5c, (q15_t)0x6d2f, (q15_t)0x2d53, (q15_t)0x6d38, (q15_t)0x2d4a,
+    (q15_t)0x6d41, (q15_t)0x2d41, (q15_t)0x6d4a, (q15_t)0x2d38, (q15_t)0x6d53, (q15_t)0x2d2f, (q15_t)0x6d5c, (q15_t)0x2d27,
+    (q15_t)0x6d65, (q15_t)0x2d1e, (q15_t)0x6d6e, (q15_t)0x2d15, (q15_t)0x6d76, (q15_t)0x2d0c, (q15_t)0x6d7f, (q15_t)0x2d03,
+    (q15_t)0x6d88, (q15_t)0x2cfa, (q15_t)0x6d91, (q15_t)0x2cf1, (q15_t)0x6d9a, (q15_t)0x2ce8, (q15_t)0x6da3, (q15_t)0x2cdf,
+    (q15_t)0x6dab, (q15_t)0x2cd6, (q15_t)0x6db4, (q15_t)0x2ccd, (q15_t)0x6dbd, (q15_t)0x2cc4, (q15_t)0x6dc6, (q15_t)0x2cbb,
+    (q15_t)0x6dcf, (q15_t)0x2cb2, (q15_t)0x6dd7, (q15_t)0x2ca9, (q15_t)0x6de0, (q15_t)0x2ca0, (q15_t)0x6de9, (q15_t)0x2c97,
+    (q15_t)0x6df2, (q15_t)0x2c8e, (q15_t)0x6dfa, (q15_t)0x2c85, (q15_t)0x6e03, (q15_t)0x2c7c, (q15_t)0x6e0c, (q15_t)0x2c73,
+    (q15_t)0x6e15, (q15_t)0x2c6a, (q15_t)0x6e1d, (q15_t)0x2c61, (q15_t)0x6e26, (q15_t)0x2c58, (q15_t)0x6e2f, (q15_t)0x2c4f,
+    (q15_t)0x6e37, (q15_t)0x2c46, (q15_t)0x6e40, (q15_t)0x2c3d, (q15_t)0x6e49, (q15_t)0x2c34, (q15_t)0x6e51, (q15_t)0x2c2b,
+    (q15_t)0x6e5a, (q15_t)0x2c21, (q15_t)0x6e63, (q15_t)0x2c18, (q15_t)0x6e6b, (q15_t)0x2c0f, (q15_t)0x6e74, (q15_t)0x2c06,
+    (q15_t)0x6e7d, (q15_t)0x2bfd, (q15_t)0x6e85, (q15_t)0x2bf4, (q15_t)0x6e8e, (q15_t)0x2beb, (q15_t)0x6e97, (q15_t)0x2be2,
+    (q15_t)0x6e9f, (q15_t)0x2bd8, (q15_t)0x6ea8, (q15_t)0x2bcf, (q15_t)0x6eb0, (q15_t)0x2bc6, (q15_t)0x6eb9, (q15_t)0x2bbd,
+    (q15_t)0x6ec2, (q15_t)0x2bb4, (q15_t)0x6eca, (q15_t)0x2bab, (q15_t)0x6ed3, (q15_t)0x2ba1, (q15_t)0x6edb, (q15_t)0x2b98,
+    (q15_t)0x6ee4, (q15_t)0x2b8f, (q15_t)0x6eec, (q15_t)0x2b86, (q15_t)0x6ef5, (q15_t)0x2b7d, (q15_t)0x6efd, (q15_t)0x2b73,
+    (q15_t)0x6f06, (q15_t)0x2b6a, (q15_t)0x6f0e, (q15_t)0x2b61, (q15_t)0x6f17, (q15_t)0x2b58, (q15_t)0x6f20, (q15_t)0x2b4e,
+    (q15_t)0x6f28, (q15_t)0x2b45, (q15_t)0x6f30, (q15_t)0x2b3c, (q15_t)0x6f39, (q15_t)0x2b33, (q15_t)0x6f41, (q15_t)0x2b29,
+    (q15_t)0x6f4a, (q15_t)0x2b20, (q15_t)0x6f52, (q15_t)0x2b17, (q15_t)0x6f5b, (q15_t)0x2b0d, (q15_t)0x6f63, (q15_t)0x2b04,
+    (q15_t)0x6f6c, (q15_t)0x2afb, (q15_t)0x6f74, (q15_t)0x2af2, (q15_t)0x6f7d, (q15_t)0x2ae8, (q15_t)0x6f85, (q15_t)0x2adf,
+    (q15_t)0x6f8d, (q15_t)0x2ad6, (q15_t)0x6f96, (q15_t)0x2acc, (q15_t)0x6f9e, (q15_t)0x2ac3, (q15_t)0x6fa7, (q15_t)0x2ab9,
+    (q15_t)0x6faf, (q15_t)0x2ab0, (q15_t)0x6fb7, (q15_t)0x2aa7, (q15_t)0x6fc0, (q15_t)0x2a9d, (q15_t)0x6fc8, (q15_t)0x2a94,
+    (q15_t)0x6fd0, (q15_t)0x2a8b, (q15_t)0x6fd9, (q15_t)0x2a81, (q15_t)0x6fe1, (q15_t)0x2a78, (q15_t)0x6fea, (q15_t)0x2a6e,
+    (q15_t)0x6ff2, (q15_t)0x2a65, (q15_t)0x6ffa, (q15_t)0x2a5c, (q15_t)0x7002, (q15_t)0x2a52, (q15_t)0x700b, (q15_t)0x2a49,
+    (q15_t)0x7013, (q15_t)0x2a3f, (q15_t)0x701b, (q15_t)0x2a36, (q15_t)0x7024, (q15_t)0x2a2c, (q15_t)0x702c, (q15_t)0x2a23,
+    (q15_t)0x7034, (q15_t)0x2a1a, (q15_t)0x703c, (q15_t)0x2a10, (q15_t)0x7045, (q15_t)0x2a07, (q15_t)0x704d, (q15_t)0x29fd,
+    (q15_t)0x7055, (q15_t)0x29f4, (q15_t)0x705d, (q15_t)0x29ea, (q15_t)0x7066, (q15_t)0x29e1, (q15_t)0x706e, (q15_t)0x29d7,
+    (q15_t)0x7076, (q15_t)0x29ce, (q15_t)0x707e, (q15_t)0x29c4, (q15_t)0x7087, (q15_t)0x29bb, (q15_t)0x708f, (q15_t)0x29b1,
+    (q15_t)0x7097, (q15_t)0x29a7, (q15_t)0x709f, (q15_t)0x299e, (q15_t)0x70a7, (q15_t)0x2994, (q15_t)0x70af, (q15_t)0x298b,
+    (q15_t)0x70b8, (q15_t)0x2981, (q15_t)0x70c0, (q15_t)0x2978, (q15_t)0x70c8, (q15_t)0x296e, (q15_t)0x70d0, (q15_t)0x2965,
+    (q15_t)0x70d8, (q15_t)0x295b, (q15_t)0x70e0, (q15_t)0x2951, (q15_t)0x70e8, (q15_t)0x2948, (q15_t)0x70f0, (q15_t)0x293e,
+    (q15_t)0x70f9, (q15_t)0x2935, (q15_t)0x7101, (q15_t)0x292b, (q15_t)0x7109, (q15_t)0x2921, (q15_t)0x7111, (q15_t)0x2918,
+    (q15_t)0x7119, (q15_t)0x290e, (q15_t)0x7121, (q15_t)0x2904, (q15_t)0x7129, (q15_t)0x28fb, (q15_t)0x7131, (q15_t)0x28f1,
+    (q15_t)0x7139, (q15_t)0x28e7, (q15_t)0x7141, (q15_t)0x28de, (q15_t)0x7149, (q15_t)0x28d4, (q15_t)0x7151, (q15_t)0x28ca,
+    (q15_t)0x7159, (q15_t)0x28c1, (q15_t)0x7161, (q15_t)0x28b7, (q15_t)0x7169, (q15_t)0x28ad, (q15_t)0x7171, (q15_t)0x28a4,
+    (q15_t)0x7179, (q15_t)0x289a, (q15_t)0x7181, (q15_t)0x2890, (q15_t)0x7189, (q15_t)0x2886, (q15_t)0x7191, (q15_t)0x287d,
+    (q15_t)0x7199, (q15_t)0x2873, (q15_t)0x71a1, (q15_t)0x2869, (q15_t)0x71a9, (q15_t)0x2860, (q15_t)0x71b1, (q15_t)0x2856,
+    (q15_t)0x71b9, (q15_t)0x284c, (q15_t)0x71c0, (q15_t)0x2842, (q15_t)0x71c8, (q15_t)0x2838, (q15_t)0x71d0, (q15_t)0x282f,
+    (q15_t)0x71d8, (q15_t)0x2825, (q15_t)0x71e0, (q15_t)0x281b, (q15_t)0x71e8, (q15_t)0x2811, (q15_t)0x71f0, (q15_t)0x2808,
+    (q15_t)0x71f8, (q15_t)0x27fe, (q15_t)0x71ff, (q15_t)0x27f4, (q15_t)0x7207, (q15_t)0x27ea, (q15_t)0x720f, (q15_t)0x27e0,
+    (q15_t)0x7217, (q15_t)0x27d6, (q15_t)0x721f, (q15_t)0x27cd, (q15_t)0x7227, (q15_t)0x27c3, (q15_t)0x722e, (q15_t)0x27b9,
+    (q15_t)0x7236, (q15_t)0x27af, (q15_t)0x723e, (q15_t)0x27a5, (q15_t)0x7246, (q15_t)0x279b, (q15_t)0x724e, (q15_t)0x2791,
+    (q15_t)0x7255, (q15_t)0x2788, (q15_t)0x725d, (q15_t)0x277e, (q15_t)0x7265, (q15_t)0x2774, (q15_t)0x726d, (q15_t)0x276a,
+    (q15_t)0x7274, (q15_t)0x2760, (q15_t)0x727c, (q15_t)0x2756, (q15_t)0x7284, (q15_t)0x274c, (q15_t)0x728b, (q15_t)0x2742,
+    (q15_t)0x7293, (q15_t)0x2738, (q15_t)0x729b, (q15_t)0x272e, (q15_t)0x72a3, (q15_t)0x2724, (q15_t)0x72aa, (q15_t)0x271a,
+    (q15_t)0x72b2, (q15_t)0x2711, (q15_t)0x72ba, (q15_t)0x2707, (q15_t)0x72c1, (q15_t)0x26fd, (q15_t)0x72c9, (q15_t)0x26f3,
+    (q15_t)0x72d0, (q15_t)0x26e9, (q15_t)0x72d8, (q15_t)0x26df, (q15_t)0x72e0, (q15_t)0x26d5, (q15_t)0x72e7, (q15_t)0x26cb,
+    (q15_t)0x72ef, (q15_t)0x26c1, (q15_t)0x72f7, (q15_t)0x26b7, (q15_t)0x72fe, (q15_t)0x26ad, (q15_t)0x7306, (q15_t)0x26a3,
+    (q15_t)0x730d, (q15_t)0x2699, (q15_t)0x7315, (q15_t)0x268f, (q15_t)0x731d, (q15_t)0x2685, (q15_t)0x7324, (q15_t)0x267b,
+    (q15_t)0x732c, (q15_t)0x2671, (q15_t)0x7333, (q15_t)0x2666, (q15_t)0x733b, (q15_t)0x265c, (q15_t)0x7342, (q15_t)0x2652,
+    (q15_t)0x734a, (q15_t)0x2648, (q15_t)0x7351, (q15_t)0x263e, (q15_t)0x7359, (q15_t)0x2634, (q15_t)0x7360, (q15_t)0x262a,
+    (q15_t)0x7368, (q15_t)0x2620, (q15_t)0x736f, (q15_t)0x2616, (q15_t)0x7377, (q15_t)0x260c, (q15_t)0x737e, (q15_t)0x2602,
+    (q15_t)0x7386, (q15_t)0x25f8, (q15_t)0x738d, (q15_t)0x25ed, (q15_t)0x7395, (q15_t)0x25e3, (q15_t)0x739c, (q15_t)0x25d9,
+    (q15_t)0x73a3, (q15_t)0x25cf, (q15_t)0x73ab, (q15_t)0x25c5, (q15_t)0x73b2, (q15_t)0x25bb, (q15_t)0x73ba, (q15_t)0x25b1,
+    (q15_t)0x73c1, (q15_t)0x25a6, (q15_t)0x73c8, (q15_t)0x259c, (q15_t)0x73d0, (q15_t)0x2592, (q15_t)0x73d7, (q15_t)0x2588,
+    (q15_t)0x73df, (q15_t)0x257e, (q15_t)0x73e6, (q15_t)0x2574, (q15_t)0x73ed, (q15_t)0x2569, (q15_t)0x73f5, (q15_t)0x255f,
+    (q15_t)0x73fc, (q15_t)0x2555, (q15_t)0x7403, (q15_t)0x254b, (q15_t)0x740b, (q15_t)0x2541, (q15_t)0x7412, (q15_t)0x2536,
+    (q15_t)0x7419, (q15_t)0x252c, (q15_t)0x7420, (q15_t)0x2522, (q15_t)0x7428, (q15_t)0x2518, (q15_t)0x742f, (q15_t)0x250d,
+    (q15_t)0x7436, (q15_t)0x2503, (q15_t)0x743e, (q15_t)0x24f9, (q15_t)0x7445, (q15_t)0x24ef, (q15_t)0x744c, (q15_t)0x24e4,
+    (q15_t)0x7453, (q15_t)0x24da, (q15_t)0x745b, (q15_t)0x24d0, (q15_t)0x7462, (q15_t)0x24c5, (q15_t)0x7469, (q15_t)0x24bb,
+    (q15_t)0x7470, (q15_t)0x24b1, (q15_t)0x7477, (q15_t)0x24a7, (q15_t)0x747f, (q15_t)0x249c, (q15_t)0x7486, (q15_t)0x2492,
+    (q15_t)0x748d, (q15_t)0x2488, (q15_t)0x7494, (q15_t)0x247d, (q15_t)0x749b, (q15_t)0x2473, (q15_t)0x74a2, (q15_t)0x2469,
+    (q15_t)0x74aa, (q15_t)0x245e, (q15_t)0x74b1, (q15_t)0x2454, (q15_t)0x74b8, (q15_t)0x244a, (q15_t)0x74bf, (q15_t)0x243f,
+    (q15_t)0x74c6, (q15_t)0x2435, (q15_t)0x74cd, (q15_t)0x242b, (q15_t)0x74d4, (q15_t)0x2420, (q15_t)0x74db, (q15_t)0x2416,
+    (q15_t)0x74e2, (q15_t)0x240b, (q15_t)0x74ea, (q15_t)0x2401, (q15_t)0x74f1, (q15_t)0x23f7, (q15_t)0x74f8, (q15_t)0x23ec,
+    (q15_t)0x74ff, (q15_t)0x23e2, (q15_t)0x7506, (q15_t)0x23d7, (q15_t)0x750d, (q15_t)0x23cd, (q15_t)0x7514, (q15_t)0x23c3,
+    (q15_t)0x751b, (q15_t)0x23b8, (q15_t)0x7522, (q15_t)0x23ae, (q15_t)0x7529, (q15_t)0x23a3, (q15_t)0x7530, (q15_t)0x2399,
+    (q15_t)0x7537, (q15_t)0x238e, (q15_t)0x753e, (q15_t)0x2384, (q15_t)0x7545, (q15_t)0x237a, (q15_t)0x754c, (q15_t)0x236f,
+    (q15_t)0x7553, (q15_t)0x2365, (q15_t)0x755a, (q15_t)0x235a, (q15_t)0x7561, (q15_t)0x2350, (q15_t)0x7567, (q15_t)0x2345,
+    (q15_t)0x756e, (q15_t)0x233b, (q15_t)0x7575, (q15_t)0x2330, (q15_t)0x757c, (q15_t)0x2326, (q15_t)0x7583, (q15_t)0x231b,
+    (q15_t)0x758a, (q15_t)0x2311, (q15_t)0x7591, (q15_t)0x2306, (q15_t)0x7598, (q15_t)0x22fc, (q15_t)0x759f, (q15_t)0x22f1,
+    (q15_t)0x75a5, (q15_t)0x22e7, (q15_t)0x75ac, (q15_t)0x22dc, (q15_t)0x75b3, (q15_t)0x22d2, (q15_t)0x75ba, (q15_t)0x22c7,
+    (q15_t)0x75c1, (q15_t)0x22bc, (q15_t)0x75c8, (q15_t)0x22b2, (q15_t)0x75ce, (q15_t)0x22a7, (q15_t)0x75d5, (q15_t)0x229d,
+    (q15_t)0x75dc, (q15_t)0x2292, (q15_t)0x75e3, (q15_t)0x2288, (q15_t)0x75ea, (q15_t)0x227d, (q15_t)0x75f0, (q15_t)0x2272,
+    (q15_t)0x75f7, (q15_t)0x2268, (q15_t)0x75fe, (q15_t)0x225d, (q15_t)0x7605, (q15_t)0x2253, (q15_t)0x760b, (q15_t)0x2248,
+    (q15_t)0x7612, (q15_t)0x223d, (q15_t)0x7619, (q15_t)0x2233, (q15_t)0x7620, (q15_t)0x2228, (q15_t)0x7626, (q15_t)0x221e,
+    (q15_t)0x762d, (q15_t)0x2213, (q15_t)0x7634, (q15_t)0x2208, (q15_t)0x763a, (q15_t)0x21fe, (q15_t)0x7641, (q15_t)0x21f3,
+    (q15_t)0x7648, (q15_t)0x21e8, (q15_t)0x764e, (q15_t)0x21de, (q15_t)0x7655, (q15_t)0x21d3, (q15_t)0x765c, (q15_t)0x21c8,
+    (q15_t)0x7662, (q15_t)0x21be, (q15_t)0x7669, (q15_t)0x21b3, (q15_t)0x766f, (q15_t)0x21a8, (q15_t)0x7676, (q15_t)0x219e,
+    (q15_t)0x767d, (q15_t)0x2193, (q15_t)0x7683, (q15_t)0x2188, (q15_t)0x768a, (q15_t)0x217d, (q15_t)0x7690, (q15_t)0x2173,
+    (q15_t)0x7697, (q15_t)0x2168, (q15_t)0x769d, (q15_t)0x215d, (q15_t)0x76a4, (q15_t)0x2153, (q15_t)0x76ab, (q15_t)0x2148,
+    (q15_t)0x76b1, (q15_t)0x213d, (q15_t)0x76b8, (q15_t)0x2132, (q15_t)0x76be, (q15_t)0x2128, (q15_t)0x76c5, (q15_t)0x211d,
+    (q15_t)0x76cb, (q15_t)0x2112, (q15_t)0x76d2, (q15_t)0x2107, (q15_t)0x76d8, (q15_t)0x20fd, (q15_t)0x76df, (q15_t)0x20f2,
+    (q15_t)0x76e5, (q15_t)0x20e7, (q15_t)0x76eb, (q15_t)0x20dc, (q15_t)0x76f2, (q15_t)0x20d1, (q15_t)0x76f8, (q15_t)0x20c7,
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+    (q15_t)0x7718, (q15_t)0x2091, (q15_t)0x771f, (q15_t)0x2086, (q15_t)0x7725, (q15_t)0x207b, (q15_t)0x772c, (q15_t)0x2070,
+    (q15_t)0x7732, (q15_t)0x2065, (q15_t)0x7738, (q15_t)0x205b, (q15_t)0x773f, (q15_t)0x2050, (q15_t)0x7745, (q15_t)0x2045,
+    (q15_t)0x774b, (q15_t)0x203a, (q15_t)0x7752, (q15_t)0x202f, (q15_t)0x7758, (q15_t)0x2024, (q15_t)0x775e, (q15_t)0x2019,
+    (q15_t)0x7765, (q15_t)0x200f, (q15_t)0x776b, (q15_t)0x2004, (q15_t)0x7771, (q15_t)0x1ff9, (q15_t)0x7777, (q15_t)0x1fee,
+    (q15_t)0x777e, (q15_t)0x1fe3, (q15_t)0x7784, (q15_t)0x1fd8, (q15_t)0x778a, (q15_t)0x1fcd, (q15_t)0x7790, (q15_t)0x1fc2,
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+    (q15_t)0x77b0, (q15_t)0x1f8c, (q15_t)0x77b6, (q15_t)0x1f81, (q15_t)0x77bc, (q15_t)0x1f76, (q15_t)0x77c2, (q15_t)0x1f6b,
+    (q15_t)0x77c8, (q15_t)0x1f60, (q15_t)0x77ce, (q15_t)0x1f55, (q15_t)0x77d5, (q15_t)0x1f4a, (q15_t)0x77db, (q15_t)0x1f3f,
+    (q15_t)0x77e1, (q15_t)0x1f34, (q15_t)0x77e7, (q15_t)0x1f29, (q15_t)0x77ed, (q15_t)0x1f1e, (q15_t)0x77f3, (q15_t)0x1f13,
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+    (q15_t)0x7812, (q15_t)0x1edc, (q15_t)0x7818, (q15_t)0x1ed1, (q15_t)0x781e, (q15_t)0x1ec6, (q15_t)0x7824, (q15_t)0x1ebb,
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+    (q15_t)0x7842, (q15_t)0x1e84, (q15_t)0x7848, (q15_t)0x1e79, (q15_t)0x784e, (q15_t)0x1e6e, (q15_t)0x7854, (q15_t)0x1e63,
+    (q15_t)0x785a, (q15_t)0x1e58, (q15_t)0x7860, (q15_t)0x1e4d, (q15_t)0x7866, (q15_t)0x1e42, (q15_t)0x786b, (q15_t)0x1e36,
+    (q15_t)0x7871, (q15_t)0x1e2b, (q15_t)0x7877, (q15_t)0x1e20, (q15_t)0x787d, (q15_t)0x1e15, (q15_t)0x7883, (q15_t)0x1e0a,
+    (q15_t)0x7889, (q15_t)0x1dff, (q15_t)0x788f, (q15_t)0x1df4, (q15_t)0x7895, (q15_t)0x1de9, (q15_t)0x789b, (q15_t)0x1dde,
+    (q15_t)0x78a1, (q15_t)0x1dd3, (q15_t)0x78a6, (q15_t)0x1dc7, (q15_t)0x78ac, (q15_t)0x1dbc, (q15_t)0x78b2, (q15_t)0x1db1,
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+    (q15_t)0x78cf, (q15_t)0x1d79, (q15_t)0x78d5, (q15_t)0x1d6e, (q15_t)0x78db, (q15_t)0x1d63, (q15_t)0x78e0, (q15_t)0x1d58,
+    (q15_t)0x78e6, (q15_t)0x1d4d, (q15_t)0x78ec, (q15_t)0x1d42, (q15_t)0x78f2, (q15_t)0x1d36, (q15_t)0x78f7, (q15_t)0x1d2b,
+    (q15_t)0x78fd, (q15_t)0x1d20, (q15_t)0x7903, (q15_t)0x1d15, (q15_t)0x7909, (q15_t)0x1d0a, (q15_t)0x790e, (q15_t)0x1cff,
+    (q15_t)0x7914, (q15_t)0x1cf3, (q15_t)0x791a, (q15_t)0x1ce8, (q15_t)0x791f, (q15_t)0x1cdd, (q15_t)0x7925, (q15_t)0x1cd2,
+    (q15_t)0x792b, (q15_t)0x1cc6, (q15_t)0x7930, (q15_t)0x1cbb, (q15_t)0x7936, (q15_t)0x1cb0, (q15_t)0x793b, (q15_t)0x1ca5,
+    (q15_t)0x7941, (q15_t)0x1c99, (q15_t)0x7947, (q15_t)0x1c8e, (q15_t)0x794c, (q15_t)0x1c83, (q15_t)0x7952, (q15_t)0x1c78,
+    (q15_t)0x7958, (q15_t)0x1c6c, (q15_t)0x795d, (q15_t)0x1c61, (q15_t)0x7963, (q15_t)0x1c56, (q15_t)0x7968, (q15_t)0x1c4b,
+    (q15_t)0x796e, (q15_t)0x1c3f, (q15_t)0x7973, (q15_t)0x1c34, (q15_t)0x7979, (q15_t)0x1c29, (q15_t)0x797e, (q15_t)0x1c1e,
+    (q15_t)0x7984, (q15_t)0x1c12, (q15_t)0x7989, (q15_t)0x1c07, (q15_t)0x798f, (q15_t)0x1bfc, (q15_t)0x7994, (q15_t)0x1bf0,
+    (q15_t)0x799a, (q15_t)0x1be5, (q15_t)0x799f, (q15_t)0x1bda, (q15_t)0x79a5, (q15_t)0x1bce, (q15_t)0x79aa, (q15_t)0x1bc3,
+    (q15_t)0x79b0, (q15_t)0x1bb8, (q15_t)0x79b5, (q15_t)0x1bac, (q15_t)0x79bb, (q15_t)0x1ba1, (q15_t)0x79c0, (q15_t)0x1b96,
+    (q15_t)0x79c5, (q15_t)0x1b8a, (q15_t)0x79cb, (q15_t)0x1b7f, (q15_t)0x79d0, (q15_t)0x1b74, (q15_t)0x79d6, (q15_t)0x1b68,
+    (q15_t)0x79db, (q15_t)0x1b5d, (q15_t)0x79e0, (q15_t)0x1b52, (q15_t)0x79e6, (q15_t)0x1b46, (q15_t)0x79eb, (q15_t)0x1b3b,
+    (q15_t)0x79f0, (q15_t)0x1b30, (q15_t)0x79f6, (q15_t)0x1b24, (q15_t)0x79fb, (q15_t)0x1b19, (q15_t)0x7a00, (q15_t)0x1b0d,
+    (q15_t)0x7a06, (q15_t)0x1b02, (q15_t)0x7a0b, (q15_t)0x1af7, (q15_t)0x7a10, (q15_t)0x1aeb, (q15_t)0x7a16, (q15_t)0x1ae0,
+    (q15_t)0x7a1b, (q15_t)0x1ad4, (q15_t)0x7a20, (q15_t)0x1ac9, (q15_t)0x7a25, (q15_t)0x1abe, (q15_t)0x7a2b, (q15_t)0x1ab2,
+    (q15_t)0x7a30, (q15_t)0x1aa7, (q15_t)0x7a35, (q15_t)0x1a9b, (q15_t)0x7a3a, (q15_t)0x1a90, (q15_t)0x7a3f, (q15_t)0x1a84,
+    (q15_t)0x7a45, (q15_t)0x1a79, (q15_t)0x7a4a, (q15_t)0x1a6e, (q15_t)0x7a4f, (q15_t)0x1a62, (q15_t)0x7a54, (q15_t)0x1a57,
+    (q15_t)0x7a59, (q15_t)0x1a4b, (q15_t)0x7a5f, (q15_t)0x1a40, (q15_t)0x7a64, (q15_t)0x1a34, (q15_t)0x7a69, (q15_t)0x1a29,
+    (q15_t)0x7a6e, (q15_t)0x1a1d, (q15_t)0x7a73, (q15_t)0x1a12, (q15_t)0x7a78, (q15_t)0x1a06, (q15_t)0x7a7d, (q15_t)0x19fb,
+    (q15_t)0x7a82, (q15_t)0x19ef, (q15_t)0x7a88, (q15_t)0x19e4, (q15_t)0x7a8d, (q15_t)0x19d8, (q15_t)0x7a92, (q15_t)0x19cd,
+    (q15_t)0x7a97, (q15_t)0x19c1, (q15_t)0x7a9c, (q15_t)0x19b6, (q15_t)0x7aa1, (q15_t)0x19aa, (q15_t)0x7aa6, (q15_t)0x199f,
+    (q15_t)0x7aab, (q15_t)0x1993, (q15_t)0x7ab0, (q15_t)0x1988, (q15_t)0x7ab5, (q15_t)0x197c, (q15_t)0x7aba, (q15_t)0x1971,
+    (q15_t)0x7abf, (q15_t)0x1965, (q15_t)0x7ac4, (q15_t)0x195a, (q15_t)0x7ac9, (q15_t)0x194e, (q15_t)0x7ace, (q15_t)0x1943,
+    (q15_t)0x7ad3, (q15_t)0x1937, (q15_t)0x7ad8, (q15_t)0x192c, (q15_t)0x7add, (q15_t)0x1920, (q15_t)0x7ae2, (q15_t)0x1914,
+    (q15_t)0x7ae6, (q15_t)0x1909, (q15_t)0x7aeb, (q15_t)0x18fd, (q15_t)0x7af0, (q15_t)0x18f2, (q15_t)0x7af5, (q15_t)0x18e6,
+    (q15_t)0x7afa, (q15_t)0x18db, (q15_t)0x7aff, (q15_t)0x18cf, (q15_t)0x7b04, (q15_t)0x18c3, (q15_t)0x7b09, (q15_t)0x18b8,
+    (q15_t)0x7b0e, (q15_t)0x18ac, (q15_t)0x7b12, (q15_t)0x18a1, (q15_t)0x7b17, (q15_t)0x1895, (q15_t)0x7b1c, (q15_t)0x1889,
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+    (q15_t)0x7b6d, (q15_t)0x17c4, (q15_t)0x7b71, (q15_t)0x17b8, (q15_t)0x7b76, (q15_t)0x17ac, (q15_t)0x7b7b, (q15_t)0x17a1,
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+    (q15_t)0x7f4f, (q15_t)0x964, (q15_t)0x7f51, (q15_t)0x958, (q15_t)0x7f52, (q15_t)0x94b, (q15_t)0x7f54, (q15_t)0x93f,
+    (q15_t)0x7f56, (q15_t)0x932, (q15_t)0x7f58, (q15_t)0x926, (q15_t)0x7f5a, (q15_t)0x919, (q15_t)0x7f5b, (q15_t)0x90d,
+    (q15_t)0x7f5d, (q15_t)0x901, (q15_t)0x7f5f, (q15_t)0x8f4, (q15_t)0x7f61, (q15_t)0x8e8, (q15_t)0x7f62, (q15_t)0x8db,
+    (q15_t)0x7f64, (q15_t)0x8cf, (q15_t)0x7f66, (q15_t)0x8c2, (q15_t)0x7f68, (q15_t)0x8b6, (q15_t)0x7f69, (q15_t)0x8a9,
+    (q15_t)0x7f6b, (q15_t)0x89d, (q15_t)0x7f6d, (q15_t)0x891, (q15_t)0x7f6e, (q15_t)0x884, (q15_t)0x7f70, (q15_t)0x878,
+    (q15_t)0x7f72, (q15_t)0x86b, (q15_t)0x7f73, (q15_t)0x85f, (q15_t)0x7f75, (q15_t)0x852, (q15_t)0x7f77, (q15_t)0x846,
+    (q15_t)0x7f78, (q15_t)0x839, (q15_t)0x7f7a, (q15_t)0x82d, (q15_t)0x7f7b, (q15_t)0x820, (q15_t)0x7f7d, (q15_t)0x814,
+    (q15_t)0x7f7f, (q15_t)0x807, (q15_t)0x7f80, (q15_t)0x7fb, (q15_t)0x7f82, (q15_t)0x7ef, (q15_t)0x7f83, (q15_t)0x7e2,
+    (q15_t)0x7f85, (q15_t)0x7d6, (q15_t)0x7f86, (q15_t)0x7c9, (q15_t)0x7f88, (q15_t)0x7bd, (q15_t)0x7f89, (q15_t)0x7b0,
+    (q15_t)0x7f8b, (q15_t)0x7a4, (q15_t)0x7f8c, (q15_t)0x797, (q15_t)0x7f8e, (q15_t)0x78b, (q15_t)0x7f8f, (q15_t)0x77e,
+    (q15_t)0x7f91, (q15_t)0x772, (q15_t)0x7f92, (q15_t)0x765, (q15_t)0x7f94, (q15_t)0x759, (q15_t)0x7f95, (q15_t)0x74c,
+    (q15_t)0x7f97, (q15_t)0x740, (q15_t)0x7f98, (q15_t)0x733, (q15_t)0x7f99, (q15_t)0x727, (q15_t)0x7f9b, (q15_t)0x71a,
+    (q15_t)0x7f9c, (q15_t)0x70e, (q15_t)0x7f9e, (q15_t)0x701, (q15_t)0x7f9f, (q15_t)0x6f5, (q15_t)0x7fa0, (q15_t)0x6e8,
+    (q15_t)0x7fa2, (q15_t)0x6dc, (q15_t)0x7fa3, (q15_t)0x6cf, (q15_t)0x7fa4, (q15_t)0x6c3, (q15_t)0x7fa6, (q15_t)0x6b6,
+    (q15_t)0x7fa7, (q15_t)0x6aa, (q15_t)0x7fa8, (q15_t)0x69d, (q15_t)0x7faa, (q15_t)0x691, (q15_t)0x7fab, (q15_t)0x684,
+    (q15_t)0x7fac, (q15_t)0x678, (q15_t)0x7fad, (q15_t)0x66b, (q15_t)0x7faf, (q15_t)0x65f, (q15_t)0x7fb0, (q15_t)0x652,
+    (q15_t)0x7fb1, (q15_t)0x646, (q15_t)0x7fb2, (q15_t)0x639, (q15_t)0x7fb4, (q15_t)0x62d, (q15_t)0x7fb5, (q15_t)0x620,
+    (q15_t)0x7fb6, (q15_t)0x614, (q15_t)0x7fb7, (q15_t)0x607, (q15_t)0x7fb8, (q15_t)0x5fb, (q15_t)0x7fb9, (q15_t)0x5ee,
+    (q15_t)0x7fbb, (q15_t)0x5e2, (q15_t)0x7fbc, (q15_t)0x5d5, (q15_t)0x7fbd, (q15_t)0x5c9, (q15_t)0x7fbe, (q15_t)0x5bc,
+    (q15_t)0x7fbf, (q15_t)0x5b0, (q15_t)0x7fc0, (q15_t)0x5a3, (q15_t)0x7fc1, (q15_t)0x597, (q15_t)0x7fc3, (q15_t)0x58a,
+    (q15_t)0x7fc4, (q15_t)0x57e, (q15_t)0x7fc5, (q15_t)0x571, (q15_t)0x7fc6, (q15_t)0x565, (q15_t)0x7fc7, (q15_t)0x558,
+    (q15_t)0x7fc8, (q15_t)0x54c, (q15_t)0x7fc9, (q15_t)0x53f, (q15_t)0x7fca, (q15_t)0x533, (q15_t)0x7fcb, (q15_t)0x526,
+    (q15_t)0x7fcc, (q15_t)0x51a, (q15_t)0x7fcd, (q15_t)0x50d, (q15_t)0x7fce, (q15_t)0x500, (q15_t)0x7fcf, (q15_t)0x4f4,
+    (q15_t)0x7fd0, (q15_t)0x4e7, (q15_t)0x7fd1, (q15_t)0x4db, (q15_t)0x7fd2, (q15_t)0x4ce, (q15_t)0x7fd3, (q15_t)0x4c2,
+    (q15_t)0x7fd4, (q15_t)0x4b5, (q15_t)0x7fd5, (q15_t)0x4a9, (q15_t)0x7fd5, (q15_t)0x49c, (q15_t)0x7fd6, (q15_t)0x490,
+    (q15_t)0x7fd7, (q15_t)0x483, (q15_t)0x7fd8, (q15_t)0x477, (q15_t)0x7fd9, (q15_t)0x46a, (q15_t)0x7fda, (q15_t)0x45e,
+    (q15_t)0x7fdb, (q15_t)0x451, (q15_t)0x7fdc, (q15_t)0x444, (q15_t)0x7fdc, (q15_t)0x438, (q15_t)0x7fdd, (q15_t)0x42b,
+    (q15_t)0x7fde, (q15_t)0x41f, (q15_t)0x7fdf, (q15_t)0x412, (q15_t)0x7fe0, (q15_t)0x406, (q15_t)0x7fe0, (q15_t)0x3f9,
+    (q15_t)0x7fe1, (q15_t)0x3ed, (q15_t)0x7fe2, (q15_t)0x3e0, (q15_t)0x7fe3, (q15_t)0x3d4, (q15_t)0x7fe3, (q15_t)0x3c7,
+    (q15_t)0x7fe4, (q15_t)0x3bb, (q15_t)0x7fe5, (q15_t)0x3ae, (q15_t)0x7fe6, (q15_t)0x3a1, (q15_t)0x7fe6, (q15_t)0x395,
+    (q15_t)0x7fe7, (q15_t)0x388, (q15_t)0x7fe8, (q15_t)0x37c, (q15_t)0x7fe8, (q15_t)0x36f, (q15_t)0x7fe9, (q15_t)0x363,
+    (q15_t)0x7fea, (q15_t)0x356, (q15_t)0x7fea, (q15_t)0x34a, (q15_t)0x7feb, (q15_t)0x33d, (q15_t)0x7fec, (q15_t)0x330,
+    (q15_t)0x7fec, (q15_t)0x324, (q15_t)0x7fed, (q15_t)0x317, (q15_t)0x7fed, (q15_t)0x30b, (q15_t)0x7fee, (q15_t)0x2fe,
+    (q15_t)0x7fef, (q15_t)0x2f2, (q15_t)0x7fef, (q15_t)0x2e5, (q15_t)0x7ff0, (q15_t)0x2d9, (q15_t)0x7ff0, (q15_t)0x2cc,
+    (q15_t)0x7ff1, (q15_t)0x2c0, (q15_t)0x7ff1, (q15_t)0x2b3, (q15_t)0x7ff2, (q15_t)0x2a6, (q15_t)0x7ff2, (q15_t)0x29a,
+    (q15_t)0x7ff3, (q15_t)0x28d, (q15_t)0x7ff3, (q15_t)0x281, (q15_t)0x7ff4, (q15_t)0x274, (q15_t)0x7ff4, (q15_t)0x268,
+    (q15_t)0x7ff5, (q15_t)0x25b, (q15_t)0x7ff5, (q15_t)0x24e, (q15_t)0x7ff6, (q15_t)0x242, (q15_t)0x7ff6, (q15_t)0x235,
+    (q15_t)0x7ff7, (q15_t)0x229, (q15_t)0x7ff7, (q15_t)0x21c, (q15_t)0x7ff7, (q15_t)0x210, (q15_t)0x7ff8, (q15_t)0x203,
+    (q15_t)0x7ff8, (q15_t)0x1f7, (q15_t)0x7ff9, (q15_t)0x1ea, (q15_t)0x7ff9, (q15_t)0x1dd, (q15_t)0x7ff9, (q15_t)0x1d1,
+    (q15_t)0x7ffa, (q15_t)0x1c4, (q15_t)0x7ffa, (q15_t)0x1b8, (q15_t)0x7ffa, (q15_t)0x1ab, (q15_t)0x7ffb, (q15_t)0x19f,
+    (q15_t)0x7ffb, (q15_t)0x192, (q15_t)0x7ffb, (q15_t)0x186, (q15_t)0x7ffc, (q15_t)0x179, (q15_t)0x7ffc, (q15_t)0x16c,
+    (q15_t)0x7ffc, (q15_t)0x160, (q15_t)0x7ffc, (q15_t)0x153, (q15_t)0x7ffd, (q15_t)0x147, (q15_t)0x7ffd, (q15_t)0x13a,
+    (q15_t)0x7ffd, (q15_t)0x12e, (q15_t)0x7ffd, (q15_t)0x121, (q15_t)0x7ffe, (q15_t)0x114, (q15_t)0x7ffe, (q15_t)0x108,
+    (q15_t)0x7ffe, (q15_t)0xfb, (q15_t)0x7ffe, (q15_t)0xef, (q15_t)0x7ffe, (q15_t)0xe2, (q15_t)0x7fff, (q15_t)0xd6,
+    (q15_t)0x7fff, (q15_t)0xc9, (q15_t)0x7fff, (q15_t)0xbc, (q15_t)0x7fff, (q15_t)0xb0, (q15_t)0x7fff, (q15_t)0xa3,
+    (q15_t)0x7fff, (q15_t)0x97, (q15_t)0x7fff, (q15_t)0x8a, (q15_t)0x7fff, (q15_t)0x7e, (q15_t)0x7fff, (q15_t)0x71,
+    (q15_t)0x7fff, (q15_t)0x65, (q15_t)0x7fff, (q15_t)0x58, (q15_t)0x7fff, (q15_t)0x4b, (q15_t)0x7fff, (q15_t)0x3f,
+    (q15_t)0x7fff, (q15_t)0x32, (q15_t)0x7fff, (q15_t)0x26, (q15_t)0x7fff, (q15_t)0x19, (q15_t)0x7fff, (q15_t)0xd,
+    (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xfff3, (q15_t)0x7fff, (q15_t)0xffe7, (q15_t)0x7fff, (q15_t)0xffda,
+    (q15_t)0x7fff, (q15_t)0xffce, (q15_t)0x7fff, (q15_t)0xffc1, (q15_t)0x7fff, (q15_t)0xffb5, (q15_t)0x7fff, (q15_t)0xffa8,
+    (q15_t)0x7fff, (q15_t)0xff9b, (q15_t)0x7fff, (q15_t)0xff8f, (q15_t)0x7fff, (q15_t)0xff82, (q15_t)0x7fff, (q15_t)0xff76,
+    (q15_t)0x7fff, (q15_t)0xff69, (q15_t)0x7fff, (q15_t)0xff5d, (q15_t)0x7fff, (q15_t)0xff50, (q15_t)0x7fff, (q15_t)0xff44,
+    (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7fff, (q15_t)0xff2a, (q15_t)0x7ffe, (q15_t)0xff1e, (q15_t)0x7ffe, (q15_t)0xff11,
+    (q15_t)0x7ffe, (q15_t)0xff05, (q15_t)0x7ffe, (q15_t)0xfef8, (q15_t)0x7ffe, (q15_t)0xfeec, (q15_t)0x7ffd, (q15_t)0xfedf,
+    (q15_t)0x7ffd, (q15_t)0xfed2, (q15_t)0x7ffd, (q15_t)0xfec6, (q15_t)0x7ffd, (q15_t)0xfeb9, (q15_t)0x7ffc, (q15_t)0xfead,
+    (q15_t)0x7ffc, (q15_t)0xfea0, (q15_t)0x7ffc, (q15_t)0xfe94, (q15_t)0x7ffc, (q15_t)0xfe87, (q15_t)0x7ffb, (q15_t)0xfe7a,
+    (q15_t)0x7ffb, (q15_t)0xfe6e, (q15_t)0x7ffb, (q15_t)0xfe61, (q15_t)0x7ffa, (q15_t)0xfe55, (q15_t)0x7ffa, (q15_t)0xfe48,
+    (q15_t)0x7ffa, (q15_t)0xfe3c, (q15_t)0x7ff9, (q15_t)0xfe2f, (q15_t)0x7ff9, (q15_t)0xfe23, (q15_t)0x7ff9, (q15_t)0xfe16,
+    (q15_t)0x7ff8, (q15_t)0xfe09, (q15_t)0x7ff8, (q15_t)0xfdfd, (q15_t)0x7ff7, (q15_t)0xfdf0, (q15_t)0x7ff7, (q15_t)0xfde4,
+    (q15_t)0x7ff7, (q15_t)0xfdd7, (q15_t)0x7ff6, (q15_t)0xfdcb, (q15_t)0x7ff6, (q15_t)0xfdbe, (q15_t)0x7ff5, (q15_t)0xfdb2,
+    (q15_t)0x7ff5, (q15_t)0xfda5, (q15_t)0x7ff4, (q15_t)0xfd98, (q15_t)0x7ff4, (q15_t)0xfd8c, (q15_t)0x7ff3, (q15_t)0xfd7f,
+    (q15_t)0x7ff3, (q15_t)0xfd73, (q15_t)0x7ff2, (q15_t)0xfd66, (q15_t)0x7ff2, (q15_t)0xfd5a, (q15_t)0x7ff1, (q15_t)0xfd4d,
+    (q15_t)0x7ff1, (q15_t)0xfd40, (q15_t)0x7ff0, (q15_t)0xfd34, (q15_t)0x7ff0, (q15_t)0xfd27, (q15_t)0x7fef, (q15_t)0xfd1b,
+    (q15_t)0x7fef, (q15_t)0xfd0e, (q15_t)0x7fee, (q15_t)0xfd02, (q15_t)0x7fed, (q15_t)0xfcf5, (q15_t)0x7fed, (q15_t)0xfce9,
+    (q15_t)0x7fec, (q15_t)0xfcdc, (q15_t)0x7fec, (q15_t)0xfcd0, (q15_t)0x7feb, (q15_t)0xfcc3, (q15_t)0x7fea, (q15_t)0xfcb6,
+    (q15_t)0x7fea, (q15_t)0xfcaa, (q15_t)0x7fe9, (q15_t)0xfc9d, (q15_t)0x7fe8, (q15_t)0xfc91, (q15_t)0x7fe8, (q15_t)0xfc84,
+    (q15_t)0x7fe7, (q15_t)0xfc78, (q15_t)0x7fe6, (q15_t)0xfc6b, (q15_t)0x7fe6, (q15_t)0xfc5f, (q15_t)0x7fe5, (q15_t)0xfc52,
+    (q15_t)0x7fe4, (q15_t)0xfc45, (q15_t)0x7fe3, (q15_t)0xfc39, (q15_t)0x7fe3, (q15_t)0xfc2c, (q15_t)0x7fe2, (q15_t)0xfc20,
+    (q15_t)0x7fe1, (q15_t)0xfc13, (q15_t)0x7fe0, (q15_t)0xfc07, (q15_t)0x7fe0, (q15_t)0xfbfa, (q15_t)0x7fdf, (q15_t)0xfbee,
+    (q15_t)0x7fde, (q15_t)0xfbe1, (q15_t)0x7fdd, (q15_t)0xfbd5, (q15_t)0x7fdc, (q15_t)0xfbc8, (q15_t)0x7fdc, (q15_t)0xfbbc,
+    (q15_t)0x7fdb, (q15_t)0xfbaf, (q15_t)0x7fda, (q15_t)0xfba2, (q15_t)0x7fd9, (q15_t)0xfb96, (q15_t)0x7fd8, (q15_t)0xfb89,
+    (q15_t)0x7fd7, (q15_t)0xfb7d, (q15_t)0x7fd6, (q15_t)0xfb70, (q15_t)0x7fd5, (q15_t)0xfb64, (q15_t)0x7fd5, (q15_t)0xfb57,
+    (q15_t)0x7fd4, (q15_t)0xfb4b, (q15_t)0x7fd3, (q15_t)0xfb3e, (q15_t)0x7fd2, (q15_t)0xfb32, (q15_t)0x7fd1, (q15_t)0xfb25,
+    (q15_t)0x7fd0, (q15_t)0xfb19, (q15_t)0x7fcf, (q15_t)0xfb0c, (q15_t)0x7fce, (q15_t)0xfb00, (q15_t)0x7fcd, (q15_t)0xfaf3,
+    (q15_t)0x7fcc, (q15_t)0xfae6, (q15_t)0x7fcb, (q15_t)0xfada, (q15_t)0x7fca, (q15_t)0xfacd, (q15_t)0x7fc9, (q15_t)0xfac1,
+    (q15_t)0x7fc8, (q15_t)0xfab4, (q15_t)0x7fc7, (q15_t)0xfaa8, (q15_t)0x7fc6, (q15_t)0xfa9b, (q15_t)0x7fc5, (q15_t)0xfa8f,
+    (q15_t)0x7fc4, (q15_t)0xfa82, (q15_t)0x7fc3, (q15_t)0xfa76, (q15_t)0x7fc1, (q15_t)0xfa69, (q15_t)0x7fc0, (q15_t)0xfa5d,
+    (q15_t)0x7fbf, (q15_t)0xfa50, (q15_t)0x7fbe, (q15_t)0xfa44, (q15_t)0x7fbd, (q15_t)0xfa37, (q15_t)0x7fbc, (q15_t)0xfa2b,
+    (q15_t)0x7fbb, (q15_t)0xfa1e, (q15_t)0x7fb9, (q15_t)0xfa12, (q15_t)0x7fb8, (q15_t)0xfa05, (q15_t)0x7fb7, (q15_t)0xf9f9,
+    (q15_t)0x7fb6, (q15_t)0xf9ec, (q15_t)0x7fb5, (q15_t)0xf9e0, (q15_t)0x7fb4, (q15_t)0xf9d3, (q15_t)0x7fb2, (q15_t)0xf9c7,
+    (q15_t)0x7fb1, (q15_t)0xf9ba, (q15_t)0x7fb0, (q15_t)0xf9ae, (q15_t)0x7faf, (q15_t)0xf9a1, (q15_t)0x7fad, (q15_t)0xf995,
+    (q15_t)0x7fac, (q15_t)0xf988, (q15_t)0x7fab, (q15_t)0xf97c, (q15_t)0x7faa, (q15_t)0xf96f, (q15_t)0x7fa8, (q15_t)0xf963,
+    (q15_t)0x7fa7, (q15_t)0xf956, (q15_t)0x7fa6, (q15_t)0xf94a, (q15_t)0x7fa4, (q15_t)0xf93d, (q15_t)0x7fa3, (q15_t)0xf931,
+    (q15_t)0x7fa2, (q15_t)0xf924, (q15_t)0x7fa0, (q15_t)0xf918, (q15_t)0x7f9f, (q15_t)0xf90b, (q15_t)0x7f9e, (q15_t)0xf8ff,
+    (q15_t)0x7f9c, (q15_t)0xf8f2, (q15_t)0x7f9b, (q15_t)0xf8e6, (q15_t)0x7f99, (q15_t)0xf8d9, (q15_t)0x7f98, (q15_t)0xf8cd,
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+    (q15_t)0x73c1, (q15_t)0xda5a, (q15_t)0x73ba, (q15_t)0xda4f, (q15_t)0x73b2, (q15_t)0xda45, (q15_t)0x73ab, (q15_t)0xda3b,
+    (q15_t)0x73a3, (q15_t)0xda31, (q15_t)0x739c, (q15_t)0xda27, (q15_t)0x7395, (q15_t)0xda1d, (q15_t)0x738d, (q15_t)0xda13,
+    (q15_t)0x7386, (q15_t)0xda08, (q15_t)0x737e, (q15_t)0xd9fe, (q15_t)0x7377, (q15_t)0xd9f4, (q15_t)0x736f, (q15_t)0xd9ea,
+    (q15_t)0x7368, (q15_t)0xd9e0, (q15_t)0x7360, (q15_t)0xd9d6, (q15_t)0x7359, (q15_t)0xd9cc, (q15_t)0x7351, (q15_t)0xd9c2,
+    (q15_t)0x734a, (q15_t)0xd9b8, (q15_t)0x7342, (q15_t)0xd9ae, (q15_t)0x733b, (q15_t)0xd9a4, (q15_t)0x7333, (q15_t)0xd99a,
+    (q15_t)0x732c, (q15_t)0xd98f, (q15_t)0x7324, (q15_t)0xd985, (q15_t)0x731d, (q15_t)0xd97b, (q15_t)0x7315, (q15_t)0xd971,
+    (q15_t)0x730d, (q15_t)0xd967, (q15_t)0x7306, (q15_t)0xd95d, (q15_t)0x72fe, (q15_t)0xd953, (q15_t)0x72f7, (q15_t)0xd949,
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+    (q15_t)0x72d0, (q15_t)0xd917, (q15_t)0x72c9, (q15_t)0xd90d, (q15_t)0x72c1, (q15_t)0xd903, (q15_t)0x72ba, (q15_t)0xd8f9,
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+    (q15_t)0x7293, (q15_t)0xd8c8, (q15_t)0x728b, (q15_t)0xd8be, (q15_t)0x7284, (q15_t)0xd8b4, (q15_t)0x727c, (q15_t)0xd8aa,
+    (q15_t)0x7274, (q15_t)0xd8a0, (q15_t)0x726d, (q15_t)0xd896, (q15_t)0x7265, (q15_t)0xd88c, (q15_t)0x725d, (q15_t)0xd882,
+    (q15_t)0x7255, (q15_t)0xd878, (q15_t)0x724e, (q15_t)0xd86f, (q15_t)0x7246, (q15_t)0xd865, (q15_t)0x723e, (q15_t)0xd85b,
+    (q15_t)0x7236, (q15_t)0xd851, (q15_t)0x722e, (q15_t)0xd847, (q15_t)0x7227, (q15_t)0xd83d, (q15_t)0x721f, (q15_t)0xd833,
+    (q15_t)0x7217, (q15_t)0xd82a, (q15_t)0x720f, (q15_t)0xd820, (q15_t)0x7207, (q15_t)0xd816, (q15_t)0x71ff, (q15_t)0xd80c,
+    (q15_t)0x71f8, (q15_t)0xd802, (q15_t)0x71f0, (q15_t)0xd7f8, (q15_t)0x71e8, (q15_t)0xd7ef, (q15_t)0x71e0, (q15_t)0xd7e5,
+    (q15_t)0x71d8, (q15_t)0xd7db, (q15_t)0x71d0, (q15_t)0xd7d1, (q15_t)0x71c8, (q15_t)0xd7c8, (q15_t)0x71c0, (q15_t)0xd7be,
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+    (q15_t)0x68c1, (q15_t)0xcea7, (q15_t)0x68b7, (q15_t)0xce9f, (q15_t)0x68ad, (q15_t)0xce97, (q15_t)0x68a4, (q15_t)0xce8f,
+    (q15_t)0x689a, (q15_t)0xce87, (q15_t)0x6890, (q15_t)0xce7f, (q15_t)0x6886, (q15_t)0xce77, (q15_t)0x687d, (q15_t)0xce6f,
+    (q15_t)0x6873, (q15_t)0xce67, (q15_t)0x6869, (q15_t)0xce5f, (q15_t)0x6860, (q15_t)0xce57, (q15_t)0x6856, (q15_t)0xce4f,
+    (q15_t)0x684c, (q15_t)0xce47, (q15_t)0x6842, (q15_t)0xce40, (q15_t)0x6838, (q15_t)0xce38, (q15_t)0x682f, (q15_t)0xce30,
+    (q15_t)0x6825, (q15_t)0xce28, (q15_t)0x681b, (q15_t)0xce20, (q15_t)0x6811, (q15_t)0xce18, (q15_t)0x6808, (q15_t)0xce10,
+    (q15_t)0x67fe, (q15_t)0xce08, (q15_t)0x67f4, (q15_t)0xce01, (q15_t)0x67ea, (q15_t)0xcdf9, (q15_t)0x67e0, (q15_t)0xcdf1,
+    (q15_t)0x67d6, (q15_t)0xcde9, (q15_t)0x67cd, (q15_t)0xcde1, (q15_t)0x67c3, (q15_t)0xcdd9, (q15_t)0x67b9, (q15_t)0xcdd2,
+    (q15_t)0x67af, (q15_t)0xcdca, (q15_t)0x67a5, (q15_t)0xcdc2, (q15_t)0x679b, (q15_t)0xcdba, (q15_t)0x6791, (q15_t)0xcdb2,
+    (q15_t)0x6788, (q15_t)0xcdab, (q15_t)0x677e, (q15_t)0xcda3, (q15_t)0x6774, (q15_t)0xcd9b, (q15_t)0x676a, (q15_t)0xcd93,
+    (q15_t)0x6760, (q15_t)0xcd8c, (q15_t)0x6756, (q15_t)0xcd84, (q15_t)0x674c, (q15_t)0xcd7c, (q15_t)0x6742, (q15_t)0xcd75,
+    (q15_t)0x6738, (q15_t)0xcd6d, (q15_t)0x672e, (q15_t)0xcd65, (q15_t)0x6724, (q15_t)0xcd5d, (q15_t)0x671a, (q15_t)0xcd56,
+    (q15_t)0x6711, (q15_t)0xcd4e, (q15_t)0x6707, (q15_t)0xcd46, (q15_t)0x66fd, (q15_t)0xcd3f, (q15_t)0x66f3, (q15_t)0xcd37,
+    (q15_t)0x66e9, (q15_t)0xcd30, (q15_t)0x66df, (q15_t)0xcd28, (q15_t)0x66d5, (q15_t)0xcd20, (q15_t)0x66cb, (q15_t)0xcd19,
+    (q15_t)0x66c1, (q15_t)0xcd11, (q15_t)0x66b7, (q15_t)0xcd09, (q15_t)0x66ad, (q15_t)0xcd02, (q15_t)0x66a3, (q15_t)0xccfa,
+    (q15_t)0x6699, (q15_t)0xccf3, (q15_t)0x668f, (q15_t)0xcceb, (q15_t)0x6685, (q15_t)0xcce3, (q15_t)0x667b, (q15_t)0xccdc,
+    (q15_t)0x6671, (q15_t)0xccd4, (q15_t)0x6666, (q15_t)0xcccd, (q15_t)0x665c, (q15_t)0xccc5, (q15_t)0x6652, (q15_t)0xccbe,
+    (q15_t)0x6648, (q15_t)0xccb6, (q15_t)0x663e, (q15_t)0xccaf, (q15_t)0x6634, (q15_t)0xcca7, (q15_t)0x662a, (q15_t)0xcca0,
+    (q15_t)0x6620, (q15_t)0xcc98, (q15_t)0x6616, (q15_t)0xcc91, (q15_t)0x660c, (q15_t)0xcc89, (q15_t)0x6602, (q15_t)0xcc82,
+    (q15_t)0x65f8, (q15_t)0xcc7a, (q15_t)0x65ed, (q15_t)0xcc73, (q15_t)0x65e3, (q15_t)0xcc6b, (q15_t)0x65d9, (q15_t)0xcc64,
+    (q15_t)0x65cf, (q15_t)0xcc5d, (q15_t)0x65c5, (q15_t)0xcc55, (q15_t)0x65bb, (q15_t)0xcc4e, (q15_t)0x65b1, (q15_t)0xcc46,
+    (q15_t)0x65a6, (q15_t)0xcc3f, (q15_t)0x659c, (q15_t)0xcc38, (q15_t)0x6592, (q15_t)0xcc30, (q15_t)0x6588, (q15_t)0xcc29,
+    (q15_t)0x657e, (q15_t)0xcc21, (q15_t)0x6574, (q15_t)0xcc1a, (q15_t)0x6569, (q15_t)0xcc13, (q15_t)0x655f, (q15_t)0xcc0b,
+    (q15_t)0x6555, (q15_t)0xcc04, (q15_t)0x654b, (q15_t)0xcbfd, (q15_t)0x6541, (q15_t)0xcbf5, (q15_t)0x6536, (q15_t)0xcbee,
+    (q15_t)0x652c, (q15_t)0xcbe7, (q15_t)0x6522, (q15_t)0xcbe0, (q15_t)0x6518, (q15_t)0xcbd8, (q15_t)0x650d, (q15_t)0xcbd1,
+    (q15_t)0x6503, (q15_t)0xcbca, (q15_t)0x64f9, (q15_t)0xcbc2, (q15_t)0x64ef, (q15_t)0xcbbb, (q15_t)0x64e4, (q15_t)0xcbb4,
+    (q15_t)0x64da, (q15_t)0xcbad, (q15_t)0x64d0, (q15_t)0xcba5, (q15_t)0x64c5, (q15_t)0xcb9e, (q15_t)0x64bb, (q15_t)0xcb97,
+    (q15_t)0x64b1, (q15_t)0xcb90, (q15_t)0x64a7, (q15_t)0xcb89, (q15_t)0x649c, (q15_t)0xcb81, (q15_t)0x6492, (q15_t)0xcb7a,
+    (q15_t)0x6488, (q15_t)0xcb73, (q15_t)0x647d, (q15_t)0xcb6c, (q15_t)0x6473, (q15_t)0xcb65, (q15_t)0x6469, (q15_t)0xcb5e,
+    (q15_t)0x645e, (q15_t)0xcb56, (q15_t)0x6454, (q15_t)0xcb4f, (q15_t)0x644a, (q15_t)0xcb48, (q15_t)0x643f, (q15_t)0xcb41,
+    (q15_t)0x6435, (q15_t)0xcb3a, (q15_t)0x642b, (q15_t)0xcb33, (q15_t)0x6420, (q15_t)0xcb2c, (q15_t)0x6416, (q15_t)0xcb25,
+    (q15_t)0x640b, (q15_t)0xcb1e, (q15_t)0x6401, (q15_t)0xcb16, (q15_t)0x63f7, (q15_t)0xcb0f, (q15_t)0x63ec, (q15_t)0xcb08,
+    (q15_t)0x63e2, (q15_t)0xcb01, (q15_t)0x63d7, (q15_t)0xcafa, (q15_t)0x63cd, (q15_t)0xcaf3, (q15_t)0x63c3, (q15_t)0xcaec,
+    (q15_t)0x63b8, (q15_t)0xcae5, (q15_t)0x63ae, (q15_t)0xcade, (q15_t)0x63a3, (q15_t)0xcad7, (q15_t)0x6399, (q15_t)0xcad0,
+    (q15_t)0x638e, (q15_t)0xcac9, (q15_t)0x6384, (q15_t)0xcac2, (q15_t)0x637a, (q15_t)0xcabb, (q15_t)0x636f, (q15_t)0xcab4,
+    (q15_t)0x6365, (q15_t)0xcaad, (q15_t)0x635a, (q15_t)0xcaa6, (q15_t)0x6350, (q15_t)0xca9f, (q15_t)0x6345, (q15_t)0xca99,
+    (q15_t)0x633b, (q15_t)0xca92, (q15_t)0x6330, (q15_t)0xca8b, (q15_t)0x6326, (q15_t)0xca84, (q15_t)0x631b, (q15_t)0xca7d,
+    (q15_t)0x6311, (q15_t)0xca76, (q15_t)0x6306, (q15_t)0xca6f, (q15_t)0x62fc, (q15_t)0xca68, (q15_t)0x62f1, (q15_t)0xca61,
+    (q15_t)0x62e7, (q15_t)0xca5b, (q15_t)0x62dc, (q15_t)0xca54, (q15_t)0x62d2, (q15_t)0xca4d, (q15_t)0x62c7, (q15_t)0xca46,
+    (q15_t)0x62bc, (q15_t)0xca3f, (q15_t)0x62b2, (q15_t)0xca38, (q15_t)0x62a7, (q15_t)0xca32, (q15_t)0x629d, (q15_t)0xca2b,
+    (q15_t)0x6292, (q15_t)0xca24, (q15_t)0x6288, (q15_t)0xca1d, (q15_t)0x627d, (q15_t)0xca16, (q15_t)0x6272, (q15_t)0xca10,
+    (q15_t)0x6268, (q15_t)0xca09, (q15_t)0x625d, (q15_t)0xca02, (q15_t)0x6253, (q15_t)0xc9fb, (q15_t)0x6248, (q15_t)0xc9f5,
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+    (q15_t)0x6193, (q15_t)0xc983, (q15_t)0x6188, (q15_t)0xc97d, (q15_t)0x617d, (q15_t)0xc976, (q15_t)0x6173, (q15_t)0xc970,
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+    (q15_t)0x60e7, (q15_t)0xc91b, (q15_t)0x60dc, (q15_t)0xc915, (q15_t)0x60d1, (q15_t)0xc90e, (q15_t)0x60c7, (q15_t)0xc908,
+    (q15_t)0x60bc, (q15_t)0xc901, (q15_t)0x60b1, (q15_t)0xc8fb, (q15_t)0x60a6, (q15_t)0xc8f4, (q15_t)0x609b, (q15_t)0xc8ee,
+    (q15_t)0x6091, (q15_t)0xc8e8, (q15_t)0x6086, (q15_t)0xc8e1, (q15_t)0x607b, (q15_t)0xc8db, (q15_t)0x6070, (q15_t)0xc8d4,
+    (q15_t)0x6065, (q15_t)0xc8ce, (q15_t)0x605b, (q15_t)0xc8c8, (q15_t)0x6050, (q15_t)0xc8c1, (q15_t)0x6045, (q15_t)0xc8bb,
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+    (q15_t)0x600f, (q15_t)0xc89b, (q15_t)0x6004, (q15_t)0xc895, (q15_t)0x5ff9, (q15_t)0xc88f, (q15_t)0x5fee, (q15_t)0xc889,
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+    (q15_t)0x5f8c, (q15_t)0xc850, (q15_t)0x5f81, (q15_t)0xc84a, (q15_t)0x5f76, (q15_t)0xc844, (q15_t)0x5f6b, (q15_t)0xc83e,
+    (q15_t)0x5f60, (q15_t)0xc838, (q15_t)0x5f55, (q15_t)0xc832, (q15_t)0x5f4a, (q15_t)0xc82b, (q15_t)0x5f3f, (q15_t)0xc825,
+    (q15_t)0x5f34, (q15_t)0xc81f, (q15_t)0x5f29, (q15_t)0xc819, (q15_t)0x5f1e, (q15_t)0xc813, (q15_t)0x5f13, (q15_t)0xc80d,
+    (q15_t)0x5f08, (q15_t)0xc807, (q15_t)0x5efd, (q15_t)0xc801, (q15_t)0x5ef2, (q15_t)0xc7fb, (q15_t)0x5ee7, (q15_t)0xc7f5,
+    (q15_t)0x5edc, (q15_t)0xc7ee, (q15_t)0x5ed1, (q15_t)0xc7e8, (q15_t)0x5ec6, (q15_t)0xc7e2, (q15_t)0x5ebb, (q15_t)0xc7dc,
+    (q15_t)0x5eb0, (q15_t)0xc7d6, (q15_t)0x5ea5, (q15_t)0xc7d0, (q15_t)0x5e9a, (q15_t)0xc7ca, (q15_t)0x5e8f, (q15_t)0xc7c4,
+    (q15_t)0x5e84, (q15_t)0xc7be, (q15_t)0x5e79, (q15_t)0xc7b8, (q15_t)0x5e6e, (q15_t)0xc7b2, (q15_t)0x5e63, (q15_t)0xc7ac,
+    (q15_t)0x5e58, (q15_t)0xc7a6, (q15_t)0x5e4d, (q15_t)0xc7a0, (q15_t)0x5e42, (q15_t)0xc79a, (q15_t)0x5e36, (q15_t)0xc795,
+    (q15_t)0x5e2b, (q15_t)0xc78f, (q15_t)0x5e20, (q15_t)0xc789, (q15_t)0x5e15, (q15_t)0xc783, (q15_t)0x5e0a, (q15_t)0xc77d,
+    (q15_t)0x5dff, (q15_t)0xc777, (q15_t)0x5df4, (q15_t)0xc771, (q15_t)0x5de9, (q15_t)0xc76b, (q15_t)0x5dde, (q15_t)0xc765,
+    (q15_t)0x5dd3, (q15_t)0xc75f, (q15_t)0x5dc7, (q15_t)0xc75a, (q15_t)0x5dbc, (q15_t)0xc754, (q15_t)0x5db1, (q15_t)0xc74e,
+    (q15_t)0x5da6, (q15_t)0xc748, (q15_t)0x5d9b, (q15_t)0xc742, (q15_t)0x5d90, (q15_t)0xc73d, (q15_t)0x5d85, (q15_t)0xc737,
+    (q15_t)0x5d79, (q15_t)0xc731, (q15_t)0x5d6e, (q15_t)0xc72b, (q15_t)0x5d63, (q15_t)0xc725, (q15_t)0x5d58, (q15_t)0xc720,
+    (q15_t)0x5d4d, (q15_t)0xc71a, (q15_t)0x5d42, (q15_t)0xc714, (q15_t)0x5d36, (q15_t)0xc70e, (q15_t)0x5d2b, (q15_t)0xc709,
+    (q15_t)0x5d20, (q15_t)0xc703, (q15_t)0x5d15, (q15_t)0xc6fd, (q15_t)0x5d0a, (q15_t)0xc6f7, (q15_t)0x5cff, (q15_t)0xc6f2,
+    (q15_t)0x5cf3, (q15_t)0xc6ec, (q15_t)0x5ce8, (q15_t)0xc6e6, (q15_t)0x5cdd, (q15_t)0xc6e1, (q15_t)0x5cd2, (q15_t)0xc6db,
+    (q15_t)0x5cc6, (q15_t)0xc6d5, (q15_t)0x5cbb, (q15_t)0xc6d0, (q15_t)0x5cb0, (q15_t)0xc6ca, (q15_t)0x5ca5, (q15_t)0xc6c5,
+    (q15_t)0x5c99, (q15_t)0xc6bf, (q15_t)0x5c8e, (q15_t)0xc6b9, (q15_t)0x5c83, (q15_t)0xc6b4, (q15_t)0x5c78, (q15_t)0xc6ae,
+    (q15_t)0x5c6c, (q15_t)0xc6a8, (q15_t)0x5c61, (q15_t)0xc6a3, (q15_t)0x5c56, (q15_t)0xc69d, (q15_t)0x5c4b, (q15_t)0xc698,
+    (q15_t)0x5c3f, (q15_t)0xc692, (q15_t)0x5c34, (q15_t)0xc68d, (q15_t)0x5c29, (q15_t)0xc687, (q15_t)0x5c1e, (q15_t)0xc682,
+    (q15_t)0x5c12, (q15_t)0xc67c, (q15_t)0x5c07, (q15_t)0xc677, (q15_t)0x5bfc, (q15_t)0xc671, (q15_t)0x5bf0, (q15_t)0xc66c,
+    (q15_t)0x5be5, (q15_t)0xc666, (q15_t)0x5bda, (q15_t)0xc661, (q15_t)0x5bce, (q15_t)0xc65b, (q15_t)0x5bc3, (q15_t)0xc656,
+    (q15_t)0x5bb8, (q15_t)0xc650, (q15_t)0x5bac, (q15_t)0xc64b, (q15_t)0x5ba1, (q15_t)0xc645, (q15_t)0x5b96, (q15_t)0xc640,
+    (q15_t)0x5b8a, (q15_t)0xc63b, (q15_t)0x5b7f, (q15_t)0xc635, (q15_t)0x5b74, (q15_t)0xc630, (q15_t)0x5b68, (q15_t)0xc62a,
+    (q15_t)0x5b5d, (q15_t)0xc625, (q15_t)0x5b52, (q15_t)0xc620, (q15_t)0x5b46, (q15_t)0xc61a, (q15_t)0x5b3b, (q15_t)0xc615,
+    (q15_t)0x5b30, (q15_t)0xc610, (q15_t)0x5b24, (q15_t)0xc60a, (q15_t)0x5b19, (q15_t)0xc605, (q15_t)0x5b0d, (q15_t)0xc600,
+    (q15_t)0x5b02, (q15_t)0xc5fa, (q15_t)0x5af7, (q15_t)0xc5f5, (q15_t)0x5aeb, (q15_t)0xc5f0, (q15_t)0x5ae0, (q15_t)0xc5ea,
+    (q15_t)0x5ad4, (q15_t)0xc5e5, (q15_t)0x5ac9, (q15_t)0xc5e0, (q15_t)0x5abe, (q15_t)0xc5db, (q15_t)0x5ab2, (q15_t)0xc5d5,
+    (q15_t)0x5aa7, (q15_t)0xc5d0, (q15_t)0x5a9b, (q15_t)0xc5cb, (q15_t)0x5a90, (q15_t)0xc5c6, (q15_t)0x5a84, (q15_t)0xc5c1,
+    (q15_t)0x5a79, (q15_t)0xc5bb, (q15_t)0x5a6e, (q15_t)0xc5b6, (q15_t)0x5a62, (q15_t)0xc5b1, (q15_t)0x5a57, (q15_t)0xc5ac,
+    (q15_t)0x5a4b, (q15_t)0xc5a7, (q15_t)0x5a40, (q15_t)0xc5a1, (q15_t)0x5a34, (q15_t)0xc59c, (q15_t)0x5a29, (q15_t)0xc597,
+    (q15_t)0x5a1d, (q15_t)0xc592, (q15_t)0x5a12, (q15_t)0xc58d, (q15_t)0x5a06, (q15_t)0xc588, (q15_t)0x59fb, (q15_t)0xc583,
+    (q15_t)0x59ef, (q15_t)0xc57e, (q15_t)0x59e4, (q15_t)0xc578, (q15_t)0x59d8, (q15_t)0xc573, (q15_t)0x59cd, (q15_t)0xc56e,
+    (q15_t)0x59c1, (q15_t)0xc569, (q15_t)0x59b6, (q15_t)0xc564, (q15_t)0x59aa, (q15_t)0xc55f, (q15_t)0x599f, (q15_t)0xc55a,
+    (q15_t)0x5993, (q15_t)0xc555, (q15_t)0x5988, (q15_t)0xc550, (q15_t)0x597c, (q15_t)0xc54b, (q15_t)0x5971, (q15_t)0xc546,
+    (q15_t)0x5965, (q15_t)0xc541, (q15_t)0x595a, (q15_t)0xc53c, (q15_t)0x594e, (q15_t)0xc537, (q15_t)0x5943, (q15_t)0xc532,
+    (q15_t)0x5937, (q15_t)0xc52d, (q15_t)0x592c, (q15_t)0xc528, (q15_t)0x5920, (q15_t)0xc523, (q15_t)0x5914, (q15_t)0xc51e,
+    (q15_t)0x5909, (q15_t)0xc51a, (q15_t)0x58fd, (q15_t)0xc515, (q15_t)0x58f2, (q15_t)0xc510, (q15_t)0x58e6, (q15_t)0xc50b,
+    (q15_t)0x58db, (q15_t)0xc506, (q15_t)0x58cf, (q15_t)0xc501, (q15_t)0x58c3, (q15_t)0xc4fc, (q15_t)0x58b8, (q15_t)0xc4f7,
+    (q15_t)0x58ac, (q15_t)0xc4f2, (q15_t)0x58a1, (q15_t)0xc4ee, (q15_t)0x5895, (q15_t)0xc4e9, (q15_t)0x5889, (q15_t)0xc4e4,
+    (q15_t)0x587e, (q15_t)0xc4df, (q15_t)0x5872, (q15_t)0xc4da, (q15_t)0x5867, (q15_t)0xc4d6, (q15_t)0x585b, (q15_t)0xc4d1,
+    (q15_t)0x584f, (q15_t)0xc4cc, (q15_t)0x5844, (q15_t)0xc4c7, (q15_t)0x5838, (q15_t)0xc4c2, (q15_t)0x582d, (q15_t)0xc4be,
+    (q15_t)0x5821, (q15_t)0xc4b9, (q15_t)0x5815, (q15_t)0xc4b4, (q15_t)0x580a, (q15_t)0xc4b0, (q15_t)0x57fe, (q15_t)0xc4ab,
+    (q15_t)0x57f2, (q15_t)0xc4a6, (q15_t)0x57e7, (q15_t)0xc4a1, (q15_t)0x57db, (q15_t)0xc49d, (q15_t)0x57cf, (q15_t)0xc498,
+    (q15_t)0x57c4, (q15_t)0xc493, (q15_t)0x57b8, (q15_t)0xc48f, (q15_t)0x57ac, (q15_t)0xc48a, (q15_t)0x57a1, (q15_t)0xc485,
+    (q15_t)0x5795, (q15_t)0xc481, (q15_t)0x5789, (q15_t)0xc47c, (q15_t)0x577e, (q15_t)0xc478, (q15_t)0x5772, (q15_t)0xc473,
+    (q15_t)0x5766, (q15_t)0xc46e, (q15_t)0x575b, (q15_t)0xc46a, (q15_t)0x574f, (q15_t)0xc465, (q15_t)0x5743, (q15_t)0xc461,
+    (q15_t)0x5737, (q15_t)0xc45c, (q15_t)0x572c, (q15_t)0xc457, (q15_t)0x5720, (q15_t)0xc453, (q15_t)0x5714, (q15_t)0xc44e,
+    (q15_t)0x5709, (q15_t)0xc44a, (q15_t)0x56fd, (q15_t)0xc445, (q15_t)0x56f1, (q15_t)0xc441, (q15_t)0x56e5, (q15_t)0xc43c,
+    (q15_t)0x56da, (q15_t)0xc438, (q15_t)0x56ce, (q15_t)0xc433, (q15_t)0x56c2, (q15_t)0xc42f, (q15_t)0x56b6, (q15_t)0xc42a,
+    (q15_t)0x56ab, (q15_t)0xc426, (q15_t)0x569f, (q15_t)0xc422, (q15_t)0x5693, (q15_t)0xc41d, (q15_t)0x5687, (q15_t)0xc419,
+    (q15_t)0x567c, (q15_t)0xc414, (q15_t)0x5670, (q15_t)0xc410, (q15_t)0x5664, (q15_t)0xc40b, (q15_t)0x5658, (q15_t)0xc407,
+    (q15_t)0x564c, (q15_t)0xc403, (q15_t)0x5641, (q15_t)0xc3fe, (q15_t)0x5635, (q15_t)0xc3fa, (q15_t)0x5629, (q15_t)0xc3f6,
+    (q15_t)0x561d, (q15_t)0xc3f1, (q15_t)0x5612, (q15_t)0xc3ed, (q15_t)0x5606, (q15_t)0xc3e9, (q15_t)0x55fa, (q15_t)0xc3e4,
+    (q15_t)0x55ee, (q15_t)0xc3e0, (q15_t)0x55e2, (q15_t)0xc3dc, (q15_t)0x55d7, (q15_t)0xc3d7, (q15_t)0x55cb, (q15_t)0xc3d3,
+    (q15_t)0x55bf, (q15_t)0xc3cf, (q15_t)0x55b3, (q15_t)0xc3ca, (q15_t)0x55a7, (q15_t)0xc3c6, (q15_t)0x559b, (q15_t)0xc3c2,
+    (q15_t)0x5590, (q15_t)0xc3be, (q15_t)0x5584, (q15_t)0xc3ba, (q15_t)0x5578, (q15_t)0xc3b5, (q15_t)0x556c, (q15_t)0xc3b1,
+    (q15_t)0x5560, (q15_t)0xc3ad, (q15_t)0x5554, (q15_t)0xc3a9, (q15_t)0x5549, (q15_t)0xc3a5, (q15_t)0x553d, (q15_t)0xc3a0,
+    (q15_t)0x5531, (q15_t)0xc39c, (q15_t)0x5525, (q15_t)0xc398, (q15_t)0x5519, (q15_t)0xc394, (q15_t)0x550d, (q15_t)0xc390,
+    (q15_t)0x5501, (q15_t)0xc38c, (q15_t)0x54f6, (q15_t)0xc387, (q15_t)0x54ea, (q15_t)0xc383, (q15_t)0x54de, (q15_t)0xc37f,
+    (q15_t)0x54d2, (q15_t)0xc37b, (q15_t)0x54c6, (q15_t)0xc377, (q15_t)0x54ba, (q15_t)0xc373, (q15_t)0x54ae, (q15_t)0xc36f,
+    (q15_t)0x54a2, (q15_t)0xc36b, (q15_t)0x5496, (q15_t)0xc367, (q15_t)0x548b, (q15_t)0xc363, (q15_t)0x547f, (q15_t)0xc35f,
+    (q15_t)0x5473, (q15_t)0xc35b, (q15_t)0x5467, (q15_t)0xc357, (q15_t)0x545b, (q15_t)0xc353, (q15_t)0x544f, (q15_t)0xc34f,
+    (q15_t)0x5443, (q15_t)0xc34b, (q15_t)0x5437, (q15_t)0xc347, (q15_t)0x542b, (q15_t)0xc343, (q15_t)0x541f, (q15_t)0xc33f,
+    (q15_t)0x5413, (q15_t)0xc33b, (q15_t)0x5407, (q15_t)0xc337, (q15_t)0x53fb, (q15_t)0xc333, (q15_t)0x53f0, (q15_t)0xc32f,
+    (q15_t)0x53e4, (q15_t)0xc32b, (q15_t)0x53d8, (q15_t)0xc327, (q15_t)0x53cc, (q15_t)0xc323, (q15_t)0x53c0, (q15_t)0xc320,
+    (q15_t)0x53b4, (q15_t)0xc31c, (q15_t)0x53a8, (q15_t)0xc318, (q15_t)0x539c, (q15_t)0xc314, (q15_t)0x5390, (q15_t)0xc310,
+    (q15_t)0x5384, (q15_t)0xc30c, (q15_t)0x5378, (q15_t)0xc308, (q15_t)0x536c, (q15_t)0xc305, (q15_t)0x5360, (q15_t)0xc301,
+    (q15_t)0x5354, (q15_t)0xc2fd, (q15_t)0x5348, (q15_t)0xc2f9, (q15_t)0x533c, (q15_t)0xc2f5, (q15_t)0x5330, (q15_t)0xc2f2,
+    (q15_t)0x5324, (q15_t)0xc2ee, (q15_t)0x5318, (q15_t)0xc2ea, (q15_t)0x530c, (q15_t)0xc2e6, (q15_t)0x5300, (q15_t)0xc2e3,
+    (q15_t)0x52f4, (q15_t)0xc2df, (q15_t)0x52e8, (q15_t)0xc2db, (q15_t)0x52dc, (q15_t)0xc2d8, (q15_t)0x52d0, (q15_t)0xc2d4,
+    (q15_t)0x52c4, (q15_t)0xc2d0, (q15_t)0x52b8, (q15_t)0xc2cc, (q15_t)0x52ac, (q15_t)0xc2c9, (q15_t)0x52a0, (q15_t)0xc2c5,
+    (q15_t)0x5294, (q15_t)0xc2c1, (q15_t)0x5288, (q15_t)0xc2be, (q15_t)0x527c, (q15_t)0xc2ba, (q15_t)0x5270, (q15_t)0xc2b7,
+    (q15_t)0x5264, (q15_t)0xc2b3, (q15_t)0x5258, (q15_t)0xc2af, (q15_t)0x524c, (q15_t)0xc2ac, (q15_t)0x5240, (q15_t)0xc2a8,
+    (q15_t)0x5234, (q15_t)0xc2a5, (q15_t)0x5228, (q15_t)0xc2a1, (q15_t)0x521c, (q15_t)0xc29d, (q15_t)0x5210, (q15_t)0xc29a,
+    (q15_t)0x5204, (q15_t)0xc296, (q15_t)0x51f7, (q15_t)0xc293, (q15_t)0x51eb, (q15_t)0xc28f, (q15_t)0x51df, (q15_t)0xc28c,
+    (q15_t)0x51d3, (q15_t)0xc288, (q15_t)0x51c7, (q15_t)0xc285, (q15_t)0x51bb, (q15_t)0xc281, (q15_t)0x51af, (q15_t)0xc27e,
+    (q15_t)0x51a3, (q15_t)0xc27a, (q15_t)0x5197, (q15_t)0xc277, (q15_t)0x518b, (q15_t)0xc273, (q15_t)0x517f, (q15_t)0xc270,
+    (q15_t)0x5173, (q15_t)0xc26d, (q15_t)0x5167, (q15_t)0xc269, (q15_t)0x515a, (q15_t)0xc266, (q15_t)0x514e, (q15_t)0xc262,
+    (q15_t)0x5142, (q15_t)0xc25f, (q15_t)0x5136, (q15_t)0xc25c, (q15_t)0x512a, (q15_t)0xc258, (q15_t)0x511e, (q15_t)0xc255,
+    (q15_t)0x5112, (q15_t)0xc251, (q15_t)0x5106, (q15_t)0xc24e, (q15_t)0x50fa, (q15_t)0xc24b, (q15_t)0x50ed, (q15_t)0xc247,
+    (q15_t)0x50e1, (q15_t)0xc244, (q15_t)0x50d5, (q15_t)0xc241, (q15_t)0x50c9, (q15_t)0xc23e, (q15_t)0x50bd, (q15_t)0xc23a,
+    (q15_t)0x50b1, (q15_t)0xc237, (q15_t)0x50a5, (q15_t)0xc234, (q15_t)0x5099, (q15_t)0xc230, (q15_t)0x508c, (q15_t)0xc22d,
+    (q15_t)0x5080, (q15_t)0xc22a, (q15_t)0x5074, (q15_t)0xc227, (q15_t)0x5068, (q15_t)0xc223, (q15_t)0x505c, (q15_t)0xc220,
+    (q15_t)0x5050, (q15_t)0xc21d, (q15_t)0x5044, (q15_t)0xc21a, (q15_t)0x5037, (q15_t)0xc217, (q15_t)0x502b, (q15_t)0xc213,
+    (q15_t)0x501f, (q15_t)0xc210, (q15_t)0x5013, (q15_t)0xc20d, (q15_t)0x5007, (q15_t)0xc20a, (q15_t)0x4ffb, (q15_t)0xc207,
+    (q15_t)0x4fee, (q15_t)0xc204, (q15_t)0x4fe2, (q15_t)0xc201, (q15_t)0x4fd6, (q15_t)0xc1fd, (q15_t)0x4fca, (q15_t)0xc1fa,
+    (q15_t)0x4fbe, (q15_t)0xc1f7, (q15_t)0x4fb2, (q15_t)0xc1f4, (q15_t)0x4fa5, (q15_t)0xc1f1, (q15_t)0x4f99, (q15_t)0xc1ee,
+    (q15_t)0x4f8d, (q15_t)0xc1eb, (q15_t)0x4f81, (q15_t)0xc1e8, (q15_t)0x4f75, (q15_t)0xc1e5, (q15_t)0x4f68, (q15_t)0xc1e2,
+    (q15_t)0x4f5c, (q15_t)0xc1df, (q15_t)0x4f50, (q15_t)0xc1dc, (q15_t)0x4f44, (q15_t)0xc1d9, (q15_t)0x4f38, (q15_t)0xc1d6,
+    (q15_t)0x4f2b, (q15_t)0xc1d3, (q15_t)0x4f1f, (q15_t)0xc1d0, (q15_t)0x4f13, (q15_t)0xc1cd, (q15_t)0x4f07, (q15_t)0xc1ca,
+    (q15_t)0x4efb, (q15_t)0xc1c7, (q15_t)0x4eee, (q15_t)0xc1c4, (q15_t)0x4ee2, (q15_t)0xc1c1, (q15_t)0x4ed6, (q15_t)0xc1be,
+    (q15_t)0x4eca, (q15_t)0xc1bb, (q15_t)0x4ebd, (q15_t)0xc1b8, (q15_t)0x4eb1, (q15_t)0xc1b6, (q15_t)0x4ea5, (q15_t)0xc1b3,
+    (q15_t)0x4e99, (q15_t)0xc1b0, (q15_t)0x4e8c, (q15_t)0xc1ad, (q15_t)0x4e80, (q15_t)0xc1aa, (q15_t)0x4e74, (q15_t)0xc1a7,
+    (q15_t)0x4e68, (q15_t)0xc1a4, (q15_t)0x4e5c, (q15_t)0xc1a2, (q15_t)0x4e4f, (q15_t)0xc19f, (q15_t)0x4e43, (q15_t)0xc19c,
+    (q15_t)0x4e37, (q15_t)0xc199, (q15_t)0x4e2b, (q15_t)0xc196, (q15_t)0x4e1e, (q15_t)0xc194, (q15_t)0x4e12, (q15_t)0xc191,
+    (q15_t)0x4e06, (q15_t)0xc18e, (q15_t)0x4df9, (q15_t)0xc18b, (q15_t)0x4ded, (q15_t)0xc189, (q15_t)0x4de1, (q15_t)0xc186,
+    (q15_t)0x4dd5, (q15_t)0xc183, (q15_t)0x4dc8, (q15_t)0xc180, (q15_t)0x4dbc, (q15_t)0xc17e, (q15_t)0x4db0, (q15_t)0xc17b,
+    (q15_t)0x4da4, (q15_t)0xc178, (q15_t)0x4d97, (q15_t)0xc176, (q15_t)0x4d8b, (q15_t)0xc173, (q15_t)0x4d7f, (q15_t)0xc170,
+    (q15_t)0x4d72, (q15_t)0xc16e, (q15_t)0x4d66, (q15_t)0xc16b, (q15_t)0x4d5a, (q15_t)0xc168, (q15_t)0x4d4e, (q15_t)0xc166,
+    (q15_t)0x4d41, (q15_t)0xc163, (q15_t)0x4d35, (q15_t)0xc161, (q15_t)0x4d29, (q15_t)0xc15e, (q15_t)0x4d1c, (q15_t)0xc15b,
+    (q15_t)0x4d10, (q15_t)0xc159, (q15_t)0x4d04, (q15_t)0xc156, (q15_t)0x4cf8, (q15_t)0xc154, (q15_t)0x4ceb, (q15_t)0xc151,
+    (q15_t)0x4cdf, (q15_t)0xc14f, (q15_t)0x4cd3, (q15_t)0xc14c, (q15_t)0x4cc6, (q15_t)0xc14a, (q15_t)0x4cba, (q15_t)0xc147,
+    (q15_t)0x4cae, (q15_t)0xc145, (q15_t)0x4ca1, (q15_t)0xc142, (q15_t)0x4c95, (q15_t)0xc140, (q15_t)0x4c89, (q15_t)0xc13d,
+    (q15_t)0x4c7c, (q15_t)0xc13b, (q15_t)0x4c70, (q15_t)0xc138, (q15_t)0x4c64, (q15_t)0xc136, (q15_t)0x4c57, (q15_t)0xc134,
+    (q15_t)0x4c4b, (q15_t)0xc131, (q15_t)0x4c3f, (q15_t)0xc12f, (q15_t)0x4c32, (q15_t)0xc12c, (q15_t)0x4c26, (q15_t)0xc12a,
+    (q15_t)0x4c1a, (q15_t)0xc128, (q15_t)0x4c0d, (q15_t)0xc125, (q15_t)0x4c01, (q15_t)0xc123, (q15_t)0x4bf5, (q15_t)0xc120,
+    (q15_t)0x4be8, (q15_t)0xc11e, (q15_t)0x4bdc, (q15_t)0xc11c, (q15_t)0x4bd0, (q15_t)0xc119, (q15_t)0x4bc3, (q15_t)0xc117,
+    (q15_t)0x4bb7, (q15_t)0xc115, (q15_t)0x4bab, (q15_t)0xc113, (q15_t)0x4b9e, (q15_t)0xc110, (q15_t)0x4b92, (q15_t)0xc10e,
+    (q15_t)0x4b85, (q15_t)0xc10c, (q15_t)0x4b79, (q15_t)0xc109, (q15_t)0x4b6d, (q15_t)0xc107, (q15_t)0x4b60, (q15_t)0xc105,
+    (q15_t)0x4b54, (q15_t)0xc103, (q15_t)0x4b48, (q15_t)0xc100, (q15_t)0x4b3b, (q15_t)0xc0fe, (q15_t)0x4b2f, (q15_t)0xc0fc,
+    (q15_t)0x4b23, (q15_t)0xc0fa, (q15_t)0x4b16, (q15_t)0xc0f8, (q15_t)0x4b0a, (q15_t)0xc0f6, (q15_t)0x4afd, (q15_t)0xc0f3,
+    (q15_t)0x4af1, (q15_t)0xc0f1, (q15_t)0x4ae5, (q15_t)0xc0ef, (q15_t)0x4ad8, (q15_t)0xc0ed, (q15_t)0x4acc, (q15_t)0xc0eb,
+    (q15_t)0x4ac0, (q15_t)0xc0e9, (q15_t)0x4ab3, (q15_t)0xc0e7, (q15_t)0x4aa7, (q15_t)0xc0e4, (q15_t)0x4a9a, (q15_t)0xc0e2,
+    (q15_t)0x4a8e, (q15_t)0xc0e0, (q15_t)0x4a82, (q15_t)0xc0de, (q15_t)0x4a75, (q15_t)0xc0dc, (q15_t)0x4a69, (q15_t)0xc0da,
+    (q15_t)0x4a5c, (q15_t)0xc0d8, (q15_t)0x4a50, (q15_t)0xc0d6, (q15_t)0x4a44, (q15_t)0xc0d4, (q15_t)0x4a37, (q15_t)0xc0d2,
+    (q15_t)0x4a2b, (q15_t)0xc0d0, (q15_t)0x4a1e, (q15_t)0xc0ce, (q15_t)0x4a12, (q15_t)0xc0cc, (q15_t)0x4a06, (q15_t)0xc0ca,
+    (q15_t)0x49f9, (q15_t)0xc0c8, (q15_t)0x49ed, (q15_t)0xc0c6, (q15_t)0x49e0, (q15_t)0xc0c4, (q15_t)0x49d4, (q15_t)0xc0c2,
+    (q15_t)0x49c7, (q15_t)0xc0c0, (q15_t)0x49bb, (q15_t)0xc0be, (q15_t)0x49af, (q15_t)0xc0bd, (q15_t)0x49a2, (q15_t)0xc0bb,
+    (q15_t)0x4996, (q15_t)0xc0b9, (q15_t)0x4989, (q15_t)0xc0b7, (q15_t)0x497d, (q15_t)0xc0b5, (q15_t)0x4970, (q15_t)0xc0b3,
+    (q15_t)0x4964, (q15_t)0xc0b1, (q15_t)0x4958, (q15_t)0xc0af, (q15_t)0x494b, (q15_t)0xc0ae, (q15_t)0x493f, (q15_t)0xc0ac,
+    (q15_t)0x4932, (q15_t)0xc0aa, (q15_t)0x4926, (q15_t)0xc0a8, (q15_t)0x4919, (q15_t)0xc0a6, (q15_t)0x490d, (q15_t)0xc0a5,
+    (q15_t)0x4901, (q15_t)0xc0a3, (q15_t)0x48f4, (q15_t)0xc0a1, (q15_t)0x48e8, (q15_t)0xc09f, (q15_t)0x48db, (q15_t)0xc09e,
+    (q15_t)0x48cf, (q15_t)0xc09c, (q15_t)0x48c2, (q15_t)0xc09a, (q15_t)0x48b6, (q15_t)0xc098, (q15_t)0x48a9, (q15_t)0xc097,
+    (q15_t)0x489d, (q15_t)0xc095, (q15_t)0x4891, (q15_t)0xc093, (q15_t)0x4884, (q15_t)0xc092, (q15_t)0x4878, (q15_t)0xc090,
+    (q15_t)0x486b, (q15_t)0xc08e, (q15_t)0x485f, (q15_t)0xc08d, (q15_t)0x4852, (q15_t)0xc08b, (q15_t)0x4846, (q15_t)0xc089,
+    (q15_t)0x4839, (q15_t)0xc088, (q15_t)0x482d, (q15_t)0xc086, (q15_t)0x4820, (q15_t)0xc085, (q15_t)0x4814, (q15_t)0xc083,
+    (q15_t)0x4807, (q15_t)0xc081, (q15_t)0x47fb, (q15_t)0xc080, (q15_t)0x47ef, (q15_t)0xc07e, (q15_t)0x47e2, (q15_t)0xc07d,
+    (q15_t)0x47d6, (q15_t)0xc07b, (q15_t)0x47c9, (q15_t)0xc07a, (q15_t)0x47bd, (q15_t)0xc078, (q15_t)0x47b0, (q15_t)0xc077,
+    (q15_t)0x47a4, (q15_t)0xc075, (q15_t)0x4797, (q15_t)0xc074, (q15_t)0x478b, (q15_t)0xc072, (q15_t)0x477e, (q15_t)0xc071,
+    (q15_t)0x4772, (q15_t)0xc06f, (q15_t)0x4765, (q15_t)0xc06e, (q15_t)0x4759, (q15_t)0xc06c, (q15_t)0x474c, (q15_t)0xc06b,
+    (q15_t)0x4740, (q15_t)0xc069, (q15_t)0x4733, (q15_t)0xc068, (q15_t)0x4727, (q15_t)0xc067, (q15_t)0x471a, (q15_t)0xc065,
+    (q15_t)0x470e, (q15_t)0xc064, (q15_t)0x4701, (q15_t)0xc062, (q15_t)0x46f5, (q15_t)0xc061, (q15_t)0x46e8, (q15_t)0xc060,
+    (q15_t)0x46dc, (q15_t)0xc05e, (q15_t)0x46cf, (q15_t)0xc05d, (q15_t)0x46c3, (q15_t)0xc05c, (q15_t)0x46b6, (q15_t)0xc05a,
+    (q15_t)0x46aa, (q15_t)0xc059, (q15_t)0x469d, (q15_t)0xc058, (q15_t)0x4691, (q15_t)0xc056, (q15_t)0x4684, (q15_t)0xc055,
+    (q15_t)0x4678, (q15_t)0xc054, (q15_t)0x466b, (q15_t)0xc053, (q15_t)0x465f, (q15_t)0xc051, (q15_t)0x4652, (q15_t)0xc050,
+    (q15_t)0x4646, (q15_t)0xc04f, (q15_t)0x4639, (q15_t)0xc04e, (q15_t)0x462d, (q15_t)0xc04c, (q15_t)0x4620, (q15_t)0xc04b,
+    (q15_t)0x4614, (q15_t)0xc04a, (q15_t)0x4607, (q15_t)0xc049, (q15_t)0x45fb, (q15_t)0xc048, (q15_t)0x45ee, (q15_t)0xc047,
+    (q15_t)0x45e2, (q15_t)0xc045, (q15_t)0x45d5, (q15_t)0xc044, (q15_t)0x45c9, (q15_t)0xc043, (q15_t)0x45bc, (q15_t)0xc042,
+    (q15_t)0x45b0, (q15_t)0xc041, (q15_t)0x45a3, (q15_t)0xc040, (q15_t)0x4597, (q15_t)0xc03f, (q15_t)0x458a, (q15_t)0xc03d,
+    (q15_t)0x457e, (q15_t)0xc03c, (q15_t)0x4571, (q15_t)0xc03b, (q15_t)0x4565, (q15_t)0xc03a, (q15_t)0x4558, (q15_t)0xc039,
+    (q15_t)0x454c, (q15_t)0xc038, (q15_t)0x453f, (q15_t)0xc037, (q15_t)0x4533, (q15_t)0xc036, (q15_t)0x4526, (q15_t)0xc035,
+    (q15_t)0x451a, (q15_t)0xc034, (q15_t)0x450d, (q15_t)0xc033, (q15_t)0x4500, (q15_t)0xc032, (q15_t)0x44f4, (q15_t)0xc031,
+    (q15_t)0x44e7, (q15_t)0xc030, (q15_t)0x44db, (q15_t)0xc02f, (q15_t)0x44ce, (q15_t)0xc02e, (q15_t)0x44c2, (q15_t)0xc02d,
+    (q15_t)0x44b5, (q15_t)0xc02c, (q15_t)0x44a9, (q15_t)0xc02b, (q15_t)0x449c, (q15_t)0xc02b, (q15_t)0x4490, (q15_t)0xc02a,
+    (q15_t)0x4483, (q15_t)0xc029, (q15_t)0x4477, (q15_t)0xc028, (q15_t)0x446a, (q15_t)0xc027, (q15_t)0x445e, (q15_t)0xc026,
+    (q15_t)0x4451, (q15_t)0xc025, (q15_t)0x4444, (q15_t)0xc024, (q15_t)0x4438, (q15_t)0xc024, (q15_t)0x442b, (q15_t)0xc023,
+    (q15_t)0x441f, (q15_t)0xc022, (q15_t)0x4412, (q15_t)0xc021, (q15_t)0x4406, (q15_t)0xc020, (q15_t)0x43f9, (q15_t)0xc020,
+    (q15_t)0x43ed, (q15_t)0xc01f, (q15_t)0x43e0, (q15_t)0xc01e, (q15_t)0x43d4, (q15_t)0xc01d, (q15_t)0x43c7, (q15_t)0xc01d,
+    (q15_t)0x43bb, (q15_t)0xc01c, (q15_t)0x43ae, (q15_t)0xc01b, (q15_t)0x43a1, (q15_t)0xc01a, (q15_t)0x4395, (q15_t)0xc01a,
+    (q15_t)0x4388, (q15_t)0xc019, (q15_t)0x437c, (q15_t)0xc018, (q15_t)0x436f, (q15_t)0xc018, (q15_t)0x4363, (q15_t)0xc017,
+    (q15_t)0x4356, (q15_t)0xc016, (q15_t)0x434a, (q15_t)0xc016, (q15_t)0x433d, (q15_t)0xc015, (q15_t)0x4330, (q15_t)0xc014,
+    (q15_t)0x4324, (q15_t)0xc014, (q15_t)0x4317, (q15_t)0xc013, (q15_t)0x430b, (q15_t)0xc013, (q15_t)0x42fe, (q15_t)0xc012,
+    (q15_t)0x42f2, (q15_t)0xc011, (q15_t)0x42e5, (q15_t)0xc011, (q15_t)0x42d9, (q15_t)0xc010, (q15_t)0x42cc, (q15_t)0xc010,
+    (q15_t)0x42c0, (q15_t)0xc00f, (q15_t)0x42b3, (q15_t)0xc00f, (q15_t)0x42a6, (q15_t)0xc00e, (q15_t)0x429a, (q15_t)0xc00e,
+    (q15_t)0x428d, (q15_t)0xc00d, (q15_t)0x4281, (q15_t)0xc00d, (q15_t)0x4274, (q15_t)0xc00c, (q15_t)0x4268, (q15_t)0xc00c,
+    (q15_t)0x425b, (q15_t)0xc00b, (q15_t)0x424e, (q15_t)0xc00b, (q15_t)0x4242, (q15_t)0xc00a, (q15_t)0x4235, (q15_t)0xc00a,
+    (q15_t)0x4229, (q15_t)0xc009, (q15_t)0x421c, (q15_t)0xc009, (q15_t)0x4210, (q15_t)0xc009, (q15_t)0x4203, (q15_t)0xc008,
+    (q15_t)0x41f7, (q15_t)0xc008, (q15_t)0x41ea, (q15_t)0xc007, (q15_t)0x41dd, (q15_t)0xc007, (q15_t)0x41d1, (q15_t)0xc007,
+    (q15_t)0x41c4, (q15_t)0xc006, (q15_t)0x41b8, (q15_t)0xc006, (q15_t)0x41ab, (q15_t)0xc006, (q15_t)0x419f, (q15_t)0xc005,
+    (q15_t)0x4192, (q15_t)0xc005, (q15_t)0x4186, (q15_t)0xc005, (q15_t)0x4179, (q15_t)0xc004, (q15_t)0x416c, (q15_t)0xc004,
+    (q15_t)0x4160, (q15_t)0xc004, (q15_t)0x4153, (q15_t)0xc004, (q15_t)0x4147, (q15_t)0xc003, (q15_t)0x413a, (q15_t)0xc003,
+    (q15_t)0x412e, (q15_t)0xc003, (q15_t)0x4121, (q15_t)0xc003, (q15_t)0x4114, (q15_t)0xc002, (q15_t)0x4108, (q15_t)0xc002,
+    (q15_t)0x40fb, (q15_t)0xc002, (q15_t)0x40ef, (q15_t)0xc002, (q15_t)0x40e2, (q15_t)0xc002, (q15_t)0x40d6, (q15_t)0xc001,
+    (q15_t)0x40c9, (q15_t)0xc001, (q15_t)0x40bc, (q15_t)0xc001, (q15_t)0x40b0, (q15_t)0xc001, (q15_t)0x40a3, (q15_t)0xc001,
+    (q15_t)0x4097, (q15_t)0xc001, (q15_t)0x408a, (q15_t)0xc001, (q15_t)0x407e, (q15_t)0xc000, (q15_t)0x4071, (q15_t)0xc000,
+    (q15_t)0x4065, (q15_t)0xc000, (q15_t)0x4058, (q15_t)0xc000, (q15_t)0x404b, (q15_t)0xc000, (q15_t)0x403f, (q15_t)0xc000,
+    (q15_t)0x4032, (q15_t)0xc000, (q15_t)0x4026, (q15_t)0xc000, (q15_t)0x4019, (q15_t)0xc000, (q15_t)0x400d, (q15_t)0xc000,
+};
+
+#endif
+/**
+  @} end of RealFFT_Table group
+ */
+
+/**
+  @ingroup DCT4_IDCT4
+ */
+
+/**
+  @addtogroup DCT4_IDCT4_Table DCT Type IV Tables
+  @{
+ */
+
+/**
+  @brief  Weights Table
+ */
+
+/**
+  @par
+  Weights tables are generated using the formula : <pre>weights[n] = e^(-j*n*pi/(2*N))</pre>
+  @par
+  C command to generate the table
+  <pre>
+  for(i = 0; i< N; i++)
+  {
+    weights[(2*i)]   =  cos (i*c);
+    weights[(2*i)+1] = -sin (i*c);
+  } </pre>
+  @par
+  where <code>N</code> is the Number of weights to be calculated and <code>c</code> is <code>pi/(2*N)</code>
+  @par
+  In the tables below the real and imaginary values are placed alternatively, hence the
+  array length is <code>2*N</code>.
+ */
+
+
+/**
+  @par
+  cosFactor tables are generated using the formula : <pre>cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))</pre>
+  @par
+  C command to generate the table
+  @par
+  <pre> for(i = 0; i< N; i++)
+  {
+     cos_factors[i]= 2 * cos((2*i+1)*c/2);
+  } </pre>
+  @par
+  where <code>N</code> is the number of factors to generate and <code>c</code> is <code>pi/(2*N)</code>
+*/
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_128)
+    const float32_t Weights_128[256] = {
+  1.000000000000000000f, 0.000000000000000000f, 0.999924701839144500f,  -0.012271538285719925f,
+  0.999698818696204250f, -0.024541228522912288f, 0.999322384588349540f, -0.036807222941358832f,
+  0.998795456205172410f, -0.049067674327418015f, 0.998118112900149180f, -0.061320736302208578f,
+  0.997290456678690210f, -0.073564563599667426f, 0.996312612182778000f, -0.085797312344439894f,
+  0.995184726672196930f, -0.098017140329560604f, 0.993906970002356060f, -0.110222207293883060f,
+  0.992479534598709970f, -0.122410675199216200f, 0.990902635427780010f, -0.134580708507126170f,
+  0.989176509964781010f, -0.146730474455361750f, 0.987301418157858430f, -0.158858143333861450f,
+  0.985277642388941220f, -0.170961888760301220f, 0.983105487431216290f, -0.183039887955140950f,
+  0.980785280403230430f, -0.195090322016128250f, 0.978317370719627650f, -0.207111376192218560f,
+  0.975702130038528570f, -0.219101240156869800f, 0.972939952205560180f, -0.231058108280671110f,
+  0.970031253194543970f, -0.242980179903263870f, 0.966976471044852070f, -0.254865659604514570f,
+  0.963776065795439840f, -0.266712757474898370f, 0.960430519415565790f, -0.278519689385053060f,
+  0.956940335732208820f, -0.290284677254462330f, 0.953306040354193860f, -0.302005949319228080f,
+  0.949528180593036670f, -0.313681740398891520f, 0.945607325380521280f, -0.325310292162262930f,
+  0.941544065183020810f, -0.336889853392220050f, 0.937339011912574960f, -0.348418680249434560f,
+  0.932992798834738960f, -0.359895036534988110f, 0.928506080473215590f, -0.371317193951837540f,
+  0.923879532511286740f, -0.382683432365089780f, 0.919113851690057770f, -0.393992040061048100f,
+  0.914209755703530690f, -0.405241314004989860f, 0.909167983090522380f, -0.416429560097637150f,
+  0.903989293123443340f, -0.427555093430282080f, 0.898674465693953820f, -0.438616238538527660f,
+  0.893224301195515320f, -0.449611329654606540f, 0.887639620402853930f, -0.460538710958240010f,
+  0.881921264348355050f, -0.471396736825997640f, 0.876070094195406600f, -0.482183772079122720f,
+  0.870086991108711460f, -0.492898192229784040f, 0.863972856121586810f, -0.503538383725717580f,
+  0.857728610000272120f, -0.514102744193221660f, 0.851355193105265200f, -0.524589682678468950f,
+  0.844853565249707120f, -0.534997619887097150f, 0.838224705554838080f, -0.545324988422046460f,
+  0.831469612302545240f, -0.555570233019602180f, 0.824589302785025290f, -0.565731810783613120f,
+  0.817584813151583710f, -0.575808191417845340f, 0.810457198252594770f, -0.585797857456438860f,
+  0.803207531480644940f, -0.595699304492433360f, 0.795836904608883570f, -0.605511041404325550f,
+  0.788346427626606340f, -0.615231590580626820f, 0.780737228572094490f, -0.624859488142386340f,
+  0.773010453362736990f, -0.634393284163645490f, 0.765167265622458960f, -0.643831542889791390f,
+  0.757208846506484570f, -0.653172842953776760f, 0.749136394523459370f, -0.662415777590171780f,
+  0.740951125354959110f, -0.671558954847018330f, 0.732654271672412820f, -0.680600997795453020f,
+  0.724247082951467000f, -0.689540544737066830f, 0.715730825283818590f, -0.698376249408972920f,
+  0.707106781186547570f, -0.707106781186547460f, 0.698376249408972920f, -0.715730825283818590f,
+  0.689540544737066940f, -0.724247082951466890f, 0.680600997795453130f, -0.732654271672412820f,
+  0.671558954847018330f, -0.740951125354959110f, 0.662415777590171780f, -0.749136394523459260f,
+  0.653172842953776760f, -0.757208846506484460f, 0.643831542889791500f, -0.765167265622458960f,
+  0.634393284163645490f, -0.773010453362736990f, 0.624859488142386450f, -0.780737228572094380f,
+  0.615231590580626820f, -0.788346427626606230f, 0.605511041404325550f, -0.795836904608883460f,
+  0.595699304492433470f, -0.803207531480644830f, 0.585797857456438860f, -0.810457198252594770f,
+  0.575808191417845340f, -0.817584813151583710f, 0.565731810783613230f, -0.824589302785025290f,
+  0.555570233019602290f, -0.831469612302545240f, 0.545324988422046460f, -0.838224705554837970f,
+  0.534997619887097260f, -0.844853565249707010f, 0.524589682678468840f, -0.851355193105265200f,
+  0.514102744193221660f, -0.857728610000272120f, 0.503538383725717580f, -0.863972856121586700f,
+  0.492898192229784090f, -0.870086991108711350f, 0.482183772079122830f, -0.876070094195406600f,
+  0.471396736825997810f, -0.881921264348354940f, 0.460538710958240010f, -0.887639620402853930f,
+  0.449611329654606600f, -0.893224301195515320f, 0.438616238538527710f, -0.898674465693953820f,
+  0.427555093430282200f, -0.903989293123443340f, 0.416429560097637320f, -0.909167983090522270f,
+  0.405241314004989860f, -0.914209755703530690f, 0.393992040061048100f, -0.919113851690057770f,
+  0.382683432365089840f, -0.923879532511286740f, 0.371317193951837600f, -0.928506080473215480f,
+  0.359895036534988280f, -0.932992798834738850f, 0.348418680249434510f, -0.937339011912574960f,
+  0.336889853392220050f, -0.941544065183020810f, 0.325310292162262980f, -0.945607325380521280f,
+  0.313681740398891570f, -0.949528180593036670f, 0.302005949319228200f, -0.953306040354193750f,
+  0.290284677254462330f, -0.956940335732208940f, 0.278519689385053060f, -0.960430519415565790f,
+  0.266712757474898420f, -0.963776065795439840f, 0.254865659604514630f, -0.966976471044852070f,
+  0.242980179903263980f, -0.970031253194543970f, 0.231058108280671280f, -0.972939952205560070f,
+  0.219101240156869770f, -0.975702130038528570f, 0.207111376192218560f, -0.978317370719627650f,
+  0.195090322016128330f, -0.980785280403230430f, 0.183039887955141060f, -0.983105487431216290f,
+  0.170961888760301360f, -0.985277642388941220f, 0.158858143333861390f, -0.987301418157858430f,
+  0.146730474455361750f, -0.989176509964781010f, 0.134580708507126220f, -0.990902635427780010f,
+  0.122410675199216280f, -0.992479534598709970f, 0.110222207293883180f, -0.993906970002356060f,
+  0.098017140329560770f, -0.995184726672196820f, 0.085797312344439880f, -0.996312612182778000f,
+  0.073564563599667454f, -0.997290456678690210f, 0.061320736302208648f, -0.998118112900149180f,
+  0.049067674327418126f, -0.998795456205172410f, 0.036807222941358991f, -0.999322384588349540f,
+  0.024541228522912264f, -0.999698818696204250f, 0.012271538285719944f, -0.999924701839144500f
+};
+
+    const float32_t cos_factors_128[128] = {
+  0.999981175282601110f, 0.999830581795823400f, 0.999529417501093140f,
+  0.999077727752645360f,
+  0.998475580573294770f, 0.997723066644191640f, 0.996820299291165670f,
+  0.995767414467659820f,
+  0.994564570734255420f, 0.993211949234794500f, 0.991709753669099530f,
+  0.990058210262297120f,
+  0.988257567730749460f, 0.986308097244598670f, 0.984210092386929030f,
+  0.981963869109555240f,
+  0.979569765685440520f, 0.977028142657754390f, 0.974339382785575860f,
+  0.971503890986251780f,
+  0.968522094274417380f, 0.965394441697689400f, 0.962121404269041580f,
+  0.958703474895871600f,
+  0.955141168305770780f, 0.951435020969008340f, 0.947585591017741090f,
+  0.943593458161960390f,
+  0.939459223602189920f, 0.935183509938947610f, 0.930766961078983710f,
+  0.926210242138311380f,
+  0.921514039342042010f, 0.916679059921042700f, 0.911706032005429880f,
+  0.906595704514915330f,
+  0.901348847046022030f, 0.895966249756185220f, 0.890448723244757880f,
+  0.884797098430937790f,
+  0.879012226428633530f, 0.873094978418290090f, 0.867046245515692650f,
+  0.860866938637767310f,
+  0.854557988365400530f, 0.848120344803297230f, 0.841554977436898440f,
+  0.834862874986380010f,
+  0.828045045257755800f, 0.821102514991104650f, 0.814036329705948410f,
+  0.806847553543799330f,
+  0.799537269107905010f, 0.792106577300212390f, 0.784556597155575240f,
+  0.776888465673232440f,
+  0.769103337645579700f, 0.761202385484261780f, 0.753186799043612520f,
+  0.745057785441466060f,
+  0.736816568877369900f, 0.728464390448225200f, 0.720002507961381650f,
+  0.711432195745216430f,
+  0.702754744457225300f, 0.693971460889654000f, 0.685083667772700360f,
+  0.676092703575316030f,
+  0.666999922303637470f, 0.657806693297078640f, 0.648514401022112550f,
+  0.639124444863775730f,
+  0.629638238914927100f, 0.620057211763289210f, 0.610382806276309480f,
+  0.600616479383868970f,
+  0.590759701858874280f, 0.580813958095764530f, 0.570780745886967370f,
+  0.560661576197336030f,
+  0.550457972936604810f, 0.540171472729892970f, 0.529803624686294830f,
+  0.519355990165589530f,
+  0.508830142543106990f, 0.498227666972781870f, 0.487550160148436050f,
+  0.476799230063322250f,
+  0.465976495767966130f, 0.455083587126343840f, 0.444122144570429260f,
+  0.433093818853152010f,
+  0.422000270799799790f, 0.410843171057903910f, 0.399624199845646790f,
+  0.388345046698826300f,
+  0.377007410216418310f, 0.365612997804773960f, 0.354163525420490510f,
+  0.342660717311994380f,
+  0.331106305759876430f, 0.319502030816015750f, 0.307849640041534980f,
+  0.296150888243623960f,
+  0.284407537211271820f, 0.272621355449948980f, 0.260794117915275570f,
+  0.248927605745720260f,
+  0.237023605994367340f, 0.225083911359792780f, 0.213110319916091360f,
+  0.201104634842091960f,
+  0.189068664149806280f, 0.177004220412148860f, 0.164913120489970090f,
+  0.152797185258443410f,
+  0.140658239332849240f, 0.128498110793793220f, 0.116318630911904880f,
+  0.104121633872054730f,
+  0.091908956497132696f, 0.079682437971430126f, 0.067443919563664106f,
+  0.055195244349690031f,
+  0.042938256934940959f, 0.030674803176636581f, 0.018406729905804820f,
+  0.006135884649154515f
+};
+
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_512)
+    const float32_t Weights_512[1024] = {
+  1.000000000000000000f,  0.000000000000000000f, 0.999995293809576190f, -0.003067956762965976f,
+  0.999981175282601110f, -0.006135884649154475f, 0.999957644551963900f, -0.009203754782059819f,
+  0.999924701839144500f, -0.012271538285719925f, 0.999882347454212560f, -0.015339206284988100f,
+  0.999830581795823400f, -0.018406729905804820f, 0.999769405351215280f, -0.021474080275469508f,
+  0.999698818696204250f, -0.024541228522912288f, 0.999618822495178640f, -0.027608145778965740f,
+  0.999529417501093140f, -0.030674803176636626f, 0.999430604555461730f, -0.033741171851377580f,
+  0.999322384588349540f, -0.036807222941358832f, 0.999204758618363890f, -0.039872927587739811f,
+  0.999077727752645360f, -0.042938256934940820f, 0.998941293186856870f, -0.046003182130914623f,
+  0.998795456205172410f, -0.049067674327418015f, 0.998640218180265270f, -0.052131704680283324f,
+  0.998475580573294770f, -0.055195244349689934f, 0.998301544933892890f, -0.058258264500435752f,
+  0.998118112900149180f, -0.061320736302208578f, 0.997925286198596000f, -0.064382630929857465f,
+  0.997723066644191640f, -0.067443919563664051f, 0.997511456140303450f, -0.070504573389613856f,
+  0.997290456678690210f, -0.073564563599667426f, 0.997060070339482960f, -0.076623861392031492f,
+  0.996820299291165670f, -0.079682437971430126f, 0.996571145790554840f, -0.082740264549375692f,
+  0.996312612182778000f, -0.085797312344439894f, 0.996044700901251970f, -0.088853552582524600f,
+  0.995767414467659820f, -0.091908956497132724f, 0.995480755491926940f, -0.094963495329638992f,
+  0.995184726672196930f, -0.098017140329560604f, 0.994879330794805620f, -0.101069862754827820f,
+  0.994564570734255420f, -0.104121633872054590f, 0.994240449453187900f, -0.107172424956808840f,
+  0.993906970002356060f, -0.110222207293883060f, 0.993564135520595300f, -0.113270952177564350f,
+  0.993211949234794500f, -0.116318630911904750f, 0.992850414459865100f, -0.119365214810991350f,
+  0.992479534598709970f, -0.122410675199216200f, 0.992099313142191800f, -0.125454983411546230f,
+  0.991709753669099530f, -0.128498110793793170f, 0.991310859846115440f, -0.131540028702883120f,
+  0.990902635427780010f, -0.134580708507126170f, 0.990485084256457090f, -0.137620121586486040f,
+  0.990058210262297120f, -0.140658239332849210f, 0.989622017463200890f, -0.143695033150294470f,
+  0.989176509964781010f, -0.146730474455361750f, 0.988721691960323780f, -0.149764534677321510f,
+  0.988257567730749460f, -0.152797185258443440f, 0.987784141644572180f, -0.155828397654265230f,
+  0.987301418157858430f, -0.158858143333861450f, 0.986809401814185530f, -0.161886393780111830f,
+  0.986308097244598670f, -0.164913120489969890f, 0.985797509167567480f, -0.167938294974731170f,
+  0.985277642388941220f, -0.170961888760301220f, 0.984748501801904210f, -0.173983873387463820f,
+  0.984210092386929030f, -0.177004220412148750f, 0.983662419211730250f, -0.180022901405699510f,
+  0.983105487431216290f, -0.183039887955140950f, 0.982539302287441240f, -0.186055151663446630f,
+  0.981963869109555240f, -0.189068664149806190f, 0.981379193313754560f, -0.192080397049892440f,
+  0.980785280403230430f, -0.195090322016128250f, 0.980182135968117430f, -0.198098410717953560f,
+  0.979569765685440520f, -0.201104634842091900f, 0.978948175319062200f, -0.204108966092816870f,
+  0.978317370719627650f, -0.207111376192218560f, 0.977677357824509930f, -0.210111836880469610f,
+  0.977028142657754390f, -0.213110319916091360f, 0.976369731330021140f, -0.216106797076219520f,
+  0.975702130038528570f, -0.219101240156869800f, 0.975025345066994120f, -0.222093620973203510f,
+  0.974339382785575860f, -0.225083911359792830f, 0.973644249650811980f, -0.228072083170885730f,
+  0.972939952205560180f, -0.231058108280671110f, 0.972226497078936270f, -0.234041958583543430f,
+  0.971503890986251780f, -0.237023605994367200f, 0.970772140728950350f, -0.240003022448741500f,
+  0.970031253194543970f, -0.242980179903263870f, 0.969281235356548530f, -0.245955050335794590f,
+  0.968522094274417380f, -0.248927605745720150f, 0.967753837093475510f, -0.251897818154216970f,
+  0.966976471044852070f, -0.254865659604514570f, 0.966190003445412500f, -0.257831102162158990f,
+  0.965394441697689400f, -0.260794117915275510f, 0.964589793289812760f, -0.263754678974831350f,
+  0.963776065795439840f, -0.266712757474898370f, 0.962953266873683880f, -0.269668325572915090f,
+  0.962121404269041580f, -0.272621355449948980f, 0.961280485811320640f, -0.275571819310958140f,
+  0.960430519415565790f, -0.278519689385053060f, 0.959571513081984520f, -0.281464937925757940f,
+  0.958703474895871600f, -0.284407537211271880f, 0.957826413027532910f, -0.287347459544729510f,
+  0.956940335732208820f, -0.290284677254462330f, 0.956045251349996410f, -0.293219162694258630f,
+  0.955141168305770780f, -0.296150888243623790f, 0.954228095109105670f, -0.299079826308040480f,
+  0.953306040354193860f, -0.302005949319228080f, 0.952375012719765880f, -0.304929229735402370f,
+  0.951435020969008340f, -0.307849640041534870f, 0.950486073949481700f, -0.310767152749611470f,
+  0.949528180593036670f, -0.313681740398891520f, 0.948561349915730270f, -0.316593375556165850f,
+  0.947585591017741090f, -0.319502030816015690f, 0.946600913083283530f, -0.322407678801069850f,
+  0.945607325380521280f, -0.325310292162262930f, 0.944604837261480260f, -0.328209843579092500f,
+  0.943593458161960390f, -0.331106305759876430f, 0.942573197601446870f, -0.333999651442009380f,
+  0.941544065183020810f, -0.336889853392220050f, 0.940506070593268300f, -0.339776884406826850f,
+  0.939459223602189920f, -0.342660717311994380f, 0.938403534063108060f, -0.345541324963989090f,
+  0.937339011912574960f, -0.348418680249434560f, 0.936265667170278260f, -0.351292756085567090f,
+  0.935183509938947610f, -0.354163525420490340f, 0.934092550404258980f, -0.357030961233429980f,
+  0.932992798834738960f, -0.359895036534988110f, 0.931884265581668150f, -0.362755724367397230f,
+  0.930766961078983710f, -0.365612997804773850f, 0.929640895843181330f, -0.368466829953372320f,
+  0.928506080473215590f, -0.371317193951837540f, 0.927362525650401110f, -0.374164062971457930f,
+  0.926210242138311380f, -0.377007410216418260f, 0.925049240782677580f, -0.379847208924051160f,
+  0.923879532511286740f, -0.382683432365089780f, 0.922701128333878630f, -0.385516053843918850f,
+  0.921514039342042010f, -0.388345046698826250f, 0.920318276709110590f, -0.391170384302253870f,
+  0.919113851690057770f, -0.393992040061048100f, 0.917900775621390500f, -0.396809987416710310f,
+  0.916679059921042700f, -0.399624199845646790f, 0.915448716088267830f, -0.402434650859418430f,
+  0.914209755703530690f, -0.405241314004989860f, 0.912962190428398210f, -0.408044162864978690f,
+  0.911706032005429880f, -0.410843171057903910f, 0.910441292258067250f, -0.413638312238434500f,
+  0.909167983090522380f, -0.416429560097637150f, 0.907886116487666260f, -0.419216888363223910f,
+  0.906595704514915330f, -0.422000270799799680f, 0.905296759318118820f, -0.424779681209108810f,
+  0.903989293123443340f, -0.427555093430282080f, 0.902673318237258830f, -0.430326481340082610f,
+  0.901348847046022030f, -0.433093818853151960f, 0.900015892016160280f, -0.435857079922255470f,
+  0.898674465693953820f, -0.438616238538527660f, 0.897324580705418320f, -0.441371268731716670f,
+  0.895966249756185220f, -0.444122144570429200f, 0.894599485631382700f, -0.446868840162374160f,
+  0.893224301195515320f, -0.449611329654606540f, 0.891840709392342720f, -0.452349587233770890f,
+  0.890448723244757880f, -0.455083587126343840f, 0.889048355854664570f, -0.457813303598877170f,
+  0.887639620402853930f, -0.460538710958240010f, 0.886222530148880640f, -0.463259783551860150f,
+  0.884797098430937790f, -0.465976495767966180f, 0.883363338665731580f, -0.468688822035827900f,
+  0.881921264348355050f, -0.471396736825997640f, 0.880470889052160750f, -0.474100214650549970f,
+  0.879012226428633530f, -0.476799230063322090f, 0.877545290207261350f, -0.479493757660153010f,
+  0.876070094195406600f, -0.482183772079122720f, 0.874586652278176110f, -0.484869248000791060f,
+  0.873094978418290090f, -0.487550160148436000f, 0.871595086655950980f, -0.490226483288291160f,
+  0.870086991108711460f, -0.492898192229784040f, 0.868570705971340900f, -0.495565261825772540f,
+  0.867046245515692650f, -0.498227666972781870f, 0.865513624090569090f, -0.500885382611240710f,
+  0.863972856121586810f, -0.503538383725717580f, 0.862423956111040610f, -0.506186645345155230f,
+  0.860866938637767310f, -0.508830142543106990f, 0.859301818357008470f, -0.511468850437970300f,
+  0.857728610000272120f, -0.514102744193221660f, 0.856147328375194470f, -0.516731799017649870f,
+  0.854557988365400530f, -0.519355990165589640f, 0.852960604930363630f, -0.521975292937154390f,
+  0.851355193105265200f, -0.524589682678468950f, 0.849741768000852550f, -0.527199134781901280f,
+  0.848120344803297230f, -0.529803624686294610f, 0.846490938774052130f, -0.532403127877197900f,
+  0.844853565249707120f, -0.534997619887097150f, 0.843208239641845440f, -0.537587076295645390f,
+  0.841554977436898440f, -0.540171472729892850f, 0.839893794195999520f, -0.542750784864515890f,
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+  0.049067674327418126f, -0.998795456205172410f, 0.046003182130914644f, -0.998941293186856870f,
+  0.042938256934940959f, -0.999077727752645360f, 0.039872927587739845f, -0.999204758618363890f,
+  0.036807222941358991f, -0.999322384588349540f, 0.033741171851377642f, -0.999430604555461730f,
+  0.030674803176636581f, -0.999529417501093140f, 0.027608145778965820f, -0.999618822495178640f,
+  0.024541228522912264f, -0.999698818696204250f, 0.021474080275469605f, -0.999769405351215280f,
+  0.018406729905804820f, -0.999830581795823400f, 0.015339206284988220f, -0.999882347454212560f,
+  0.012271538285719944f, -0.999924701839144500f, 0.009203754782059960f, -0.999957644551963900f,
+  0.006135884649154515f, -0.999981175282601110f, 0.003067956762966138f, -0.999995293809576190f
+};
+
+    const float32_t cos_factors_512[512] = {
+  0.999998823451701880f, 0.999989411081928400f, 0.999970586430974140f,
+  0.999942349676023910f,
+  0.999904701082852900f, 0.999857641005823860f, 0.999801169887884260f,
+  0.999735288260561680f,
+  0.999659996743959220f, 0.999575296046749220f, 0.999481186966166950f,
+  0.999377670388002850f,
+  0.999264747286594420f, 0.999142418724816910f, 0.999010685854073380f,
+  0.998869549914283560f,
+  0.998719012233872940f, 0.998559074229759310f, 0.998389737407340160f,
+  0.998211003360478190f,
+  0.998022873771486240f, 0.997825350411111640f, 0.997618435138519550f,
+  0.997402129901275300f,
+  0.997176436735326190f, 0.996941357764982160f, 0.996696895202896060f,
+  0.996443051350042630f,
+  0.996179828595696980f, 0.995907229417411720f, 0.995625256380994310f,
+  0.995333912140482280f,
+  0.995033199438118630f, 0.994723121104325700f, 0.994403680057679100f,
+  0.994074879304879370f,
+  0.993736721940724600f, 0.993389211148080650f, 0.993032350197851410f,
+  0.992666142448948020f,
+  0.992290591348257370f, 0.991905700430609330f, 0.991511473318743900f,
+  0.991107913723276890f,
+  0.990695025442664630f, 0.990272812363169110f, 0.989841278458820530f,
+  0.989400427791380380f,
+  0.988950264510302990f, 0.988490792852696590f, 0.988022017143283530f,
+  0.987543941794359230f,
+  0.987056571305750970f, 0.986559910264775410f, 0.986053963346195440f,
+  0.985538735312176060f,
+  0.985014231012239840f, 0.984480455383220930f, 0.983937413449218920f,
+  0.983385110321551180f,
+  0.982823551198705240f, 0.982252741366289370f, 0.981672686196983110f,
+  0.981083391150486710f,
+  0.980484861773469380f, 0.979877103699517640f, 0.979260122649082020f,
+  0.978633924429423210f,
+  0.977998514934557140f, 0.977353900145199960f, 0.976700086128711840f,
+  0.976037079039039020f,
+  0.975364885116656980f, 0.974683510688510670f, 0.973992962167955830f,
+  0.973293246054698250f,
+  0.972584368934732210f, 0.971866337480279400f, 0.971139158449725090f,
+  0.970402838687555500f,
+  0.969657385124292450f, 0.968902804776428870f, 0.968139104746362440f,
+  0.967366292222328510f,
+  0.966584374478333120f, 0.965793358874083680f, 0.964993252854920320f,
+  0.964184063951745830f,
+  0.963365799780954050f, 0.962538468044359160f, 0.961702076529122540f,
+  0.960856633107679660f,
+  0.960002145737665960f, 0.959138622461841890f, 0.958266071408017670f,
+  0.957384500788975860f,
+  0.956493918902395100f, 0.955594334130771110f, 0.954685754941338340f,
+  0.953768189885990330f,
+  0.952841647601198720f, 0.951906136807932350f, 0.950961666311575080f,
+  0.950008245001843000f,
+  0.949045881852700560f, 0.948074585922276230f, 0.947094366352777220f,
+  0.946105232370403450f,
+  0.945107193285260610f, 0.944100258491272660f, 0.943084437466093490f,
+  0.942059739771017310f,
+  0.941026175050889260f, 0.939983753034014050f, 0.938932483532064600f,
+  0.937872376439989890f,
+  0.936803441735921560f, 0.935725689481080370f, 0.934639129819680780f,
+  0.933543772978836170f,
+  0.932439629268462360f, 0.931326709081180430f, 0.930205022892219070f,
+  0.929074581259315860f,
+  0.927935394822617890f, 0.926787474304581750f, 0.925630830509872720f,
+  0.924465474325262600f,
+  0.923291416719527640f, 0.922108668743345180f, 0.920917241529189520f,
+  0.919717146291227360f,
+  0.918508394325212250f, 0.917290997008377910f, 0.916064965799331720f,
+  0.914830312237946200f,
+  0.913587047945250810f, 0.912335184623322750f, 0.911074734055176360f,
+  0.909805708104652220f,
+  0.908528118716306120f, 0.907241977915295820f, 0.905947297807268460f,
+  0.904644090578246240f,
+  0.903332368494511820f, 0.902012143902493180f, 0.900683429228646970f,
+  0.899346236979341570f,
+  0.898000579740739880f, 0.896646470178680150f, 0.895283921038557580f,
+  0.893912945145203250f,
+  0.892533555402764580f, 0.891145764794583180f, 0.889749586383072780f,
+  0.888345033309596350f,
+  0.886932118794342190f, 0.885510856136199950f, 0.884081258712634990f,
+  0.882643339979562790f,
+  0.881197113471222090f, 0.879742592800047410f, 0.878279791656541580f,
+  0.876808723809145650f,
+  0.875329403104110890f, 0.873841843465366860f, 0.872346058894391540f,
+  0.870842063470078980f,
+  0.869329871348606840f, 0.867809496763303320f, 0.866280954024512990f,
+  0.864744257519462380f,
+  0.863199421712124160f, 0.861646461143081300f, 0.860085390429390140f,
+  0.858516224264442740f,
+  0.856938977417828760f, 0.855353664735196030f, 0.853760301138111410f,
+  0.852158901623919830f,
+  0.850549481265603480f, 0.848932055211639610f, 0.847306638685858320f,
+  0.845673246987299070f,
+  0.844031895490066410f, 0.842382599643185850f, 0.840725374970458070f,
+  0.839060237070312740f,
+  0.837387201615661940f, 0.835706284353752600f, 0.834017501106018130f,
+  0.832320867767929680f,
+  0.830616400308846310f, 0.828904114771864870f, 0.827184027273669130f,
+  0.825456154004377550f,
+  0.823720511227391430f, 0.821977115279241550f, 0.820225982569434690f,
+  0.818467129580298660f,
+  0.816700572866827850f, 0.814926329056526620f, 0.813144414849253590f,
+  0.811354847017063730f,
+  0.809557642404051260f, 0.807752817926190360f, 0.805940390571176280f,
+  0.804120377398265810f,
+  0.802292795538115720f, 0.800457662192622820f, 0.798614994634760820f,
+  0.796764810208418830f,
+  0.794907126328237010f, 0.793041960479443640f, 0.791169330217690200f,
+  0.789289253168885650f,
+  0.787401747029031430f, 0.785506829564053930f, 0.783604518609638200f,
+  0.781694832071059390f,
+  0.779777787923014550f, 0.777853404209453150f, 0.775921699043407690f,
+  0.773982690606822900f,
+  0.772036397150384520f, 0.770082836993347900f, 0.768122028523365420f,
+  0.766153990196312920f,
+  0.764178740536116670f, 0.762196298134578900f, 0.760206681651202420f,
+  0.758209909813015280f,
+  0.756206001414394540f, 0.754194975316889170f, 0.752176850449042810f,
+  0.750151645806215070f,
+  0.748119380450403600f, 0.746080073510063780f, 0.744033744179929290f,
+  0.741980411720831070f,
+  0.739920095459516200f, 0.737852814788465980f, 0.735778589165713590f,
+  0.733697438114660370f,
+  0.731609381223892630f, 0.729514438146997010f, 0.727412628602375770f,
+  0.725303972373060770f,
+  0.723188489306527460f, 0.721066199314508110f, 0.718937122372804490f,
+  0.716801278521099540f,
+  0.714658687862769090f, 0.712509370564692320f, 0.710353346857062420f,
+  0.708190637033195400f,
+  0.706021261449339740f, 0.703845240524484940f, 0.701662594740168570f,
+  0.699473344640283770f,
+  0.697277510830886630f, 0.695075113980000880f, 0.692866174817424740f,
+  0.690650714134534720f,
+  0.688428752784090550f, 0.686200311680038700f, 0.683965411797315510f,
+  0.681724074171649820f,
+  0.679476319899365080f, 0.677222170137180450f, 0.674961646102012040f,
+  0.672694769070772970f,
+  0.670421560380173090f, 0.668142041426518560f, 0.665856233665509720f,
+  0.663564158612039880f,
+  0.661265837839992270f, 0.658961292982037320f, 0.656650545729429050f,
+  0.654333617831800550f,
+  0.652010531096959500f, 0.649681307390683190f, 0.647345968636512060f,
+  0.645004536815544040f,
+  0.642657033966226860f, 0.640303482184151670f, 0.637943903621844170f,
+  0.635578320488556230f,
+  0.633206755050057190f, 0.630829229628424470f, 0.628445766601832710f,
+  0.626056388404343520f,
+  0.623661117525694640f, 0.621259976511087660f, 0.618852987960976320f,
+  0.616440174530853650f,
+  0.614021558931038490f, 0.611597163926462020f, 0.609167012336453210f,
+  0.606731127034524480f,
+  0.604289530948156070f, 0.601842247058580030f, 0.599389298400564540f,
+  0.596930708062196500f,
+  0.594466499184664540f, 0.591996694962040990f, 0.589521318641063940f,
+  0.587040393520918080f,
+  0.584553942953015330f, 0.582061990340775550f, 0.579564559139405740f,
+  0.577061672855679550f,
+  0.574553355047715760f, 0.572039629324757050f, 0.569520519346947250f,
+  0.566996048825108680f,
+  0.564466241520519500f, 0.561931121244689470f, 0.559390711859136140f,
+  0.556845037275160100f,
+  0.554294121453620110f, 0.551737988404707450f, 0.549176662187719770f,
+  0.546610166910834860f,
+  0.544038526730883930f, 0.541461765853123560f, 0.538879908531008420f,
+  0.536292979065963180f,
+  0.533701001807152960f, 0.531104001151255000f, 0.528502001542228480f,
+  0.525895027471084740f,
+  0.523283103475656430f, 0.520666254140367270f, 0.518044504095999340f,
+  0.515417878019463150f,
+  0.512786400633563070f, 0.510150096706766700f, 0.507508991052970870f,
+  0.504863108531267480f,
+  0.502212474045710900f, 0.499557112545081890f, 0.496897049022654640f,
+  0.494232308515959730f,
+  0.491562916106550060f, 0.488888896919763230f, 0.486210276124486530f,
+  0.483527078932918740f,
+  0.480839330600333900f, 0.478147056424843120f, 0.475450281747155870f,
+  0.472749031950342900f,
+  0.470043332459595620f, 0.467333208741988530f, 0.464618686306237820f,
+  0.461899790702462840f,
+  0.459176547521944150f, 0.456448982396883860f, 0.453717121000163930f,
+  0.450980989045103810f,
+  0.448240612285220000f, 0.445496016513981740f, 0.442747227564570130f,
+  0.439994271309633260f,
+  0.437237173661044200f, 0.434475960569655710f, 0.431710658025057370f,
+  0.428941292055329550f,
+  0.426167888726799620f, 0.423390474143796100f, 0.420609074448402510f,
+  0.417823715820212380f,
+  0.415034424476081630f, 0.412241226669883000f, 0.409444148692257590f,
+  0.406643216870369140f,
+  0.403838457567654130f, 0.401029897183575790f, 0.398217562153373620f,
+  0.395401478947816300f,
+  0.392581674072951530f, 0.389758174069856410f, 0.386931005514388690f,
+  0.384100195016935040f,
+  0.381265769222162490f, 0.378427754808765620f, 0.375586178489217330f,
+  0.372741067009515810f,
+  0.369892447148934270f, 0.367040345719767240f, 0.364184789567079840f,
+  0.361325805568454340f,
+  0.358463420633736540f, 0.355597661704783960f, 0.352728555755210730f,
+  0.349856129790135030f,
+  0.346980410845923680f, 0.344101425989938980f, 0.341219202320282410f,
+  0.338333766965541290f,
+  0.335445147084531660f, 0.332553369866044220f, 0.329658462528587550f,
+  0.326760452320131790f,
+  0.323859366517852960f, 0.320955232427875210f, 0.318048077385015060f,
+  0.315137928752522440f,
+  0.312224813921825050f, 0.309308760312268780f, 0.306389795370861080f,
+  0.303467946572011370f,
+  0.300543241417273400f, 0.297615707435086310f, 0.294685372180514330f,
+  0.291752263234989370f,
+  0.288816408206049480f, 0.285877834727080730f, 0.282936570457055390f,
+  0.279992643080273380f,
+  0.277046080306099950f, 0.274096909868706330f, 0.271145159526808070f,
+  0.268190857063403180f,
+  0.265234030285511900f, 0.262274707023913590f, 0.259312915132886350f,
+  0.256348682489942910f,
+  0.253382036995570270f, 0.250413006572965280f, 0.247441619167773440f,
+  0.244467902747824210f,
+  0.241491885302869300f, 0.238513594844318500f, 0.235533059404975460f,
+  0.232550307038775330f,
+  0.229565365820518870f, 0.226578263845610110f, 0.223589029229790020f,
+  0.220597690108873650f,
+  0.217604274638483670f, 0.214608810993786920f, 0.211611327369227610f,
+  0.208611851978263460f,
+  0.205610413053099320f, 0.202607038844421110f, 0.199601757621131050f,
+  0.196594597670080220f,
+  0.193585587295803750f, 0.190574754820252800f, 0.187562128582529740f,
+  0.184547736938619640f,
+  0.181531608261125130f, 0.178513770938997590f, 0.175494253377271400f,
+  0.172473083996796030f,
+  0.169450291233967930f, 0.166425903540464220f, 0.163399949382973230f,
+  0.160372457242928400f,
+  0.157343455616238280f, 0.154312973013020240f, 0.151281037957330250f,
+  0.148247678986896200f,
+  0.145212924652847520f, 0.142176803519448000f, 0.139139344163826280f,
+  0.136100575175706200f,
+  0.133060525157139180f, 0.130019222722233350f, 0.126976696496885980f,
+  0.123932975118512200f,
+  0.120888087235777220f, 0.117842061508325020f, 0.114794926606510250f,
+  0.111746711211126660f,
+  0.108697444013138670f, 0.105647153713410700f, 0.102595869022436280f,
+  0.099543618660069444f,
+  0.096490431355252607f, 0.093436335845747912f, 0.090381360877865011f,
+  0.087325535206192226f,
+  0.084268887593324127f, 0.081211446809592386f, 0.078153241632794315f,
+  0.075094300847921291f,
+  0.072034653246889416f, 0.068974327628266732f, 0.065913352797003930f,
+  0.062851757564161420f,
+  0.059789570746640007f, 0.056726821166907783f, 0.053663537652730679f,
+  0.050599749036899337f,
+  0.047535484156959261f, 0.044470771854938744f, 0.041405640977076712f,
+  0.038340120373552791f,
+  0.035274238898213947f, 0.032208025408304704f, 0.029141508764193740f,
+  0.026074717829104040f,
+  0.023007681468839410f, 0.019940428551514598f, 0.016872987947281773f,
+  0.013805388528060349f,
+  0.010737659167264572f, 0.007669828739531077f, 0.004601926120448672f,
+  0.001533980186284766f
+};
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_2048)
+    const float32_t Weights_2048[4096] = {
+  1.000000000000000000f, 0.000000000000000000f, 0.999999705862882230f,  -0.000766990318742704f,
+  0.999998823451701880f, -0.001533980186284766f, 0.999997352766978210f,  -0.002300969151425805f,
+  0.999995293809576190f, -0.003067956762965976f, 0.999992646580707190f,  -0.003834942569706228f,
+  0.999989411081928400f, -0.004601926120448571f, 0.999985587315143200f,  -0.005368906963996343f,
+  0.999981175282601110f, -0.006135884649154475f, 0.999976174986897610f,  -0.006902858724729756f,
+  0.999970586430974140f, -0.007669828739531097f, 0.999964409618118280f,  -0.008436794242369799f,
+  0.999957644551963900f, -0.009203754782059819f, 0.999950291236490480f,  -0.009970709907418031f,
+  0.999942349676023910f, -0.010737659167264491f, 0.999933819875236000f,  -0.011504602110422714f,
+  0.999924701839144500f, -0.012271538285719925f, 0.999914995573113470f,  -0.013038467241987334f,
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+  0.021474080275469605f, -0.999769405351215280f, 0.020707260504265912f,
+  -0.999785581693599210f,
+  0.019940428551514598f, -0.999801169887884260f, 0.019173584868322699f,
+  -0.999816169924900410f,
+  0.018406729905804820f, -0.999830581795823400f, 0.017639864115082195f,
+  -0.999844405492175240f,
+  0.016872987947281773f, -0.999857641005823860f, 0.016106101853537263f,
+  -0.999870288328982950f,
+  0.015339206284988220f, -0.999882347454212560f, 0.014572301692779104f,
+  -0.999893818374418490f,
+  0.013805388528060349f, -0.999904701082852900f, 0.013038467241987433f,
+  -0.999914995573113470f,
+  0.012271538285719944f, -0.999924701839144500f, 0.011504602110422875f,
+  -0.999933819875236000f,
+  0.010737659167264572f, -0.999942349676023910f, 0.009970709907418029f,
+  -0.999950291236490480f,
+  0.009203754782059960f, -0.999957644551963900f, 0.008436794242369860f,
+  -0.999964409618118280f,
+  0.007669828739531077f, -0.999970586430974140f, 0.006902858724729877f,
+  -0.999976174986897610f,
+  0.006135884649154515f, -0.999981175282601110f, 0.005368906963996303f,
+  -0.999985587315143200f,
+  0.004601926120448672f, -0.999989411081928400f, 0.003834942569706248f,
+  -0.999992646580707190f,
+  0.003067956762966138f, -0.999995293809576190f, 0.002300969151425887f,
+  -0.999997352766978210f,
+  0.001533980186284766f, -0.999998823451701880f, 0.000766990318742846f,
+  -0.999999705862882230f
+};
+    const float32_t cos_factors_2048[2048] = {
+  0.999999926465717890f, 0.999999338191525530f, 0.999998161643486980f,
+  0.999996396822294350f,
+  0.999994043728985820f, 0.999991102364945590f, 0.999987572731904080f,
+  0.999983454831937730f,
+  0.999978748667468830f, 0.999973454241265940f, 0.999967571556443780f,
+  0.999961100616462820f,
+  0.999954041425129780f, 0.999946393986597460f, 0.999938158305364590f,
+  0.999929334386276070f,
+  0.999919922234522750f, 0.999909921855641540f, 0.999899333255515390f,
+  0.999888156440373320f,
+  0.999876391416790410f, 0.999864038191687680f, 0.999851096772332190f,
+  0.999837567166337090f,
+  0.999823449381661570f, 0.999808743426610520f, 0.999793449309835270f,
+  0.999777567040332940f,
+  0.999761096627446610f, 0.999744038080865430f, 0.999726391410624470f,
+  0.999708156627104880f,
+  0.999689333741033640f, 0.999669922763483760f, 0.999649923705874240f,
+  0.999629336579970110f,
+  0.999608161397882110f, 0.999586398172067070f, 0.999564046915327740f,
+  0.999541107640812940f,
+  0.999517580362016990f, 0.999493465092780590f, 0.999468761847290050f,
+  0.999443470640077770f,
+  0.999417591486021720f, 0.999391124400346050f, 0.999364069398620550f,
+  0.999336426496761240f,
+  0.999308195711029470f, 0.999279377058032710f, 0.999249970554724420f,
+  0.999219976218403530f,
+  0.999189394066714920f, 0.999158224117649430f, 0.999126466389543390f,
+  0.999094120901079070f,
+  0.999061187671284600f, 0.999027666719533690f, 0.998993558065545680f,
+  0.998958861729386080f,
+  0.998923577731465780f, 0.998887706092541290f, 0.998851246833715180f,
+  0.998814199976435390f,
+  0.998776565542495610f, 0.998738343554035230f, 0.998699534033539280f,
+  0.998660137003838490f,
+  0.998620152488108870f, 0.998579580509872500f, 0.998538421092996730f,
+  0.998496674261694640f,
+  0.998454340040524800f, 0.998411418454391300f, 0.998367909528543820f,
+  0.998323813288577560f,
+  0.998279129760433200f, 0.998233858970396850f, 0.998188000945100300f,
+  0.998141555711520520f,
+  0.998094523296980010f, 0.998046903729146840f, 0.997998697036034390f,
+  0.997949903246001190f,
+  0.997900522387751620f, 0.997850554490335110f, 0.997799999583146470f,
+  0.997748857695925690f,
+  0.997697128858758500f, 0.997644813102075420f, 0.997591910456652630f,
+  0.997538420953611340f,
+  0.997484344624417930f, 0.997429681500884180f, 0.997374431615167150f,
+  0.997318594999768600f,
+  0.997262171687536170f, 0.997205161711661850f, 0.997147565105683480f,
+  0.997089381903483400f,
+  0.997030612139289450f, 0.996971255847674320f, 0.996911313063555740f,
+  0.996850783822196610f,
+  0.996789668159204560f, 0.996727966110532490f, 0.996665677712478160f,
+  0.996602803001684130f,
+  0.996539342015137940f, 0.996475294790172160f, 0.996410661364464100f,
+  0.996345441776035900f,
+  0.996279636063254650f, 0.996213244264832040f, 0.996146266419824620f,
+  0.996078702567633980f,
+  0.996010552748005870f, 0.995941817001031350f, 0.995872495367145730f,
+  0.995802587887129160f,
+  0.995732094602106430f, 0.995661015553546910f, 0.995589350783264600f,
+  0.995517100333418110f,
+  0.995444264246510340f, 0.995370842565388990f, 0.995296835333246090f,
+  0.995222242593618360f,
+  0.995147064390386470f, 0.995071300767776170f, 0.994994951770357020f,
+  0.994918017443043200f,
+  0.994840497831093180f, 0.994762392980109930f, 0.994683702936040250f,
+  0.994604427745175660f,
+  0.994524567454151740f, 0.994444122109948040f, 0.994363091759888570f,
+  0.994281476451641550f,
+  0.994199276233218910f, 0.994116491152977070f, 0.994033121259616400f,
+  0.993949166602181130f,
+  0.993864627230059750f, 0.993779503192984580f, 0.993693794541031790f,
+  0.993607501324621610f,
+  0.993520623594518090f, 0.993433161401829360f, 0.993345114798006910f,
+  0.993256483834846440f,
+  0.993167268564487230f, 0.993077469039412300f, 0.992987085312448390f,
+  0.992896117436765980f,
+  0.992804565465879140f, 0.992712429453645460f, 0.992619709454266140f,
+  0.992526405522286100f,
+  0.992432517712593660f, 0.992338046080420420f, 0.992242990681341700f,
+  0.992147351571276090f,
+  0.992051128806485720f, 0.991954322443575950f, 0.991856932539495470f,
+  0.991758959151536110f,
+  0.991660402337333210f, 0.991561262154865290f, 0.991461538662453790f,
+  0.991361231918763460f,
+  0.991260341982802440f, 0.991158868913921350f, 0.991056812771814340f,
+  0.990954173616518500f,
+  0.990850951508413620f, 0.990747146508222710f, 0.990642758677011570f,
+  0.990537788076188750f,
+  0.990432234767505970f, 0.990326098813057330f, 0.990219380275280000f,
+  0.990112079216953770f,
+  0.990004195701200910f, 0.989895729791486660f, 0.989786681551618640f,
+  0.989677051045747210f,
+  0.989566838338365120f, 0.989456043494307710f, 0.989344666578752640f,
+  0.989232707657220050f,
+  0.989120166795572690f, 0.989007044060015270f, 0.988893339517095130f,
+  0.988779053233701520f,
+  0.988664185277066230f, 0.988548735714763200f, 0.988432704614708340f,
+  0.988316092045159690f,
+  0.988198898074717610f, 0.988081122772324070f, 0.987962766207263420f,
+  0.987843828449161740f,
+  0.987724309567986960f, 0.987604209634049160f, 0.987483528717999710f,
+  0.987362266890832400f,
+  0.987240424223882250f, 0.987118000788826280f, 0.986994996657682980f,
+  0.986871411902812470f,
+  0.986747246596916590f, 0.986622500813038480f, 0.986497174624562880f,
+  0.986371268105216030f,
+  0.986244781329065460f, 0.986117714370520090f, 0.985990067304330140f,
+  0.985861840205586980f,
+  0.985733033149723490f, 0.985603646212513400f, 0.985473679470071810f,
+  0.985343132998854790f,
+  0.985212006875659350f, 0.985080301177623800f, 0.984948015982227030f,
+  0.984815151367289140f,
+  0.984681707410970940f, 0.984547684191773960f, 0.984413081788540700f,
+  0.984277900280454370f,
+  0.984142139747038570f, 0.984005800268157870f, 0.983868881924017220f,
+  0.983731384795162090f,
+  0.983593308962478650f, 0.983454654507193270f, 0.983315421510872810f,
+  0.983175610055424420f,
+  0.983035220223095640f, 0.982894252096474070f, 0.982752705758487830f,
+  0.982610581292404750f,
+  0.982467878781833170f, 0.982324598310721280f, 0.982180739963357090f,
+  0.982036303824369020f,
+  0.981891289978725100f, 0.981745698511732990f, 0.981599529509040720f,
+  0.981452783056635520f,
+  0.981305459240844670f, 0.981157558148334830f, 0.981009079866112630f,
+  0.980860024481523870f,
+  0.980710392082253970f, 0.980560182756327840f, 0.980409396592109910f,
+  0.980258033678303550f,
+  0.980106094103951770f, 0.979953577958436740f, 0.979800485331479790f,
+  0.979646816313141210f,
+  0.979492570993820810f, 0.979337749464256780f, 0.979182351815526930f,
+  0.979026378139047580f,
+  0.978869828526574120f, 0.978712703070200420f, 0.978555001862359550f,
+  0.978396724995823090f,
+  0.978237872563701090f, 0.978078444659442380f, 0.977918441376834370f,
+  0.977757862810002760f,
+  0.977596709053411890f, 0.977434980201864260f, 0.977272676350500860f,
+  0.977109797594800880f,
+  0.976946344030581670f, 0.976782315753998650f, 0.976617712861545640f,
+  0.976452535450054060f,
+  0.976286783616693630f, 0.976120457458971910f, 0.975953557074734300f,
+  0.975786082562163930f,
+  0.975618034019781750f, 0.975449411546446380f, 0.975280215241354220f,
+  0.975110445204038890f,
+  0.974940101534371830f, 0.974769184332561770f, 0.974597693699155050f,
+  0.974425629735034990f,
+  0.974252992541422500f, 0.974079782219875680f, 0.973905998872289570f,
+  0.973731642600896400f,
+  0.973556713508265560f, 0.973381211697303290f, 0.973205137271252800f,
+  0.973028490333694210f,
+  0.972851270988544180f, 0.972673479340056430f, 0.972495115492821190f,
+  0.972316179551765300f,
+  0.972136671622152230f, 0.971956591809581720f, 0.971775940219990140f,
+  0.971594716959650160f,
+  0.971412922135170940f, 0.971230555853497380f, 0.971047618221911100f,
+  0.970864109348029470f,
+  0.970680029339806130f, 0.970495378305530560f, 0.970310156353828110f,
+  0.970124363593660280f,
+  0.969938000134323960f, 0.969751066085452140f, 0.969563561557013180f,
+  0.969375486659311280f,
+  0.969186841502985950f, 0.968997626199012420f, 0.968807840858700970f,
+  0.968617485593697540f,
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+  0.967850367531413620f,
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+  0.967074139692867040f,
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+  0.966288809384209690f,
+  0.966091055410438830f, 0.965892733110190860f, 0.965693842600133690f,
+  0.965494383997269500f,
+  0.965294357418934660f, 0.965093762982799590f, 0.964892600806868890f,
+  0.964690871009481030f,
+  0.964488573709308410f, 0.964285709025357480f, 0.964082277076968140f,
+  0.963878277983814200f,
+  0.963673711865903230f, 0.963468578843575950f, 0.963262879037507070f,
+  0.963056612568704340f,
+  0.962849779558509030f, 0.962642380128595710f, 0.962434414400972100f,
+  0.962225882497979020f,
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+  0.961386095590786250f,
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+  0.960537259751520050f,
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+  0.959679382969746750f,
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+  0.958812473320129310f,
+  0.958594335476470220f, 0.958375633716461170f, 0.958156368168758820f,
+  0.957936538962351420f,
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+  0.957051588141040970f,
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+  0.956157629185692140f,
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+  0.955254670510586990f,
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+  0.954342720614716480f,
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+  0.953421788081700310f,
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+  0.946724485268921170f,
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+  0.945732010777477150f,
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+  0.944730634696167800f,
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+  0.924026221829143850f,
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+  0.257460553986133210f, 0.256719344095520720f, 0.255977983183532380f,
+  0.255236471686291820f,
+  0.254494810040010790f, 0.253752998680989940f, 0.253011038045617980f,
+  0.252268928570370810f,
+  0.251526670691812780f, 0.250784264846594550f, 0.250041711471454650f,
+  0.249299011003218300f,
+  0.248556163878796620f, 0.247813170535187620f, 0.247070031409475370f,
+  0.246326746938829060f,
+  0.245583317560504000f, 0.244839743711840750f, 0.244096025830264210f,
+  0.243352164353284880f,
+  0.242608159718496890f, 0.241864012363579210f, 0.241119722726294730f,
+  0.240375291244489500f,
+  0.239630718356093560f, 0.238886004499120170f, 0.238141150111664870f,
+  0.237396155631906550f,
+  0.236651021498106460f, 0.235905748148607370f, 0.235160336021834860f,
+  0.234414785556295250f,
+  0.233669097190576820f, 0.232923271363349120f, 0.232177308513361770f,
+  0.231431209079445730f,
+  0.230684973500512310f, 0.229938602215552260f, 0.229192095663636740f,
+  0.228445454283916550f,
+  0.227698678515621170f, 0.226951768798059980f, 0.226204725570620270f,
+  0.225457549272768540f,
+  0.224710240344049570f, 0.223962799224085520f, 0.223215226352576960f,
+  0.222467522169301990f,
+  0.221719687114115240f, 0.220971721626949060f, 0.220223626147812460f,
+  0.219475401116790340f,
+  0.218727046974044600f, 0.217978564159812290f, 0.217229953114406790f,
+  0.216481214278216900f,
+  0.215732348091705940f, 0.214983354995412820f, 0.214234235429951100f,
+  0.213484989836008080f,
+  0.212735618654345870f, 0.211986122325800410f, 0.211236501291280710f,
+  0.210486755991769890f,
+  0.209736886868323370f, 0.208986894362070070f, 0.208236778914211470f,
+  0.207486540966020700f,
+  0.206736180958843660f, 0.205985699334098050f, 0.205235096533272380f,
+  0.204484372997927180f,
+  0.203733529169694010f, 0.202982565490274460f, 0.202231482401441620f,
+  0.201480280345037820f,
+  0.200728959762976140f, 0.199977521097239290f, 0.199225964789878890f,
+  0.198474291283016360f,
+  0.197722501018842030f, 0.196970594439614370f, 0.196218571987660850f,
+  0.195466434105377090f,
+  0.194714181235225990f, 0.193961813819739010f, 0.193209332301514080f,
+  0.192456737123216840f,
+  0.191704028727579940f, 0.190951207557401860f, 0.190198274055548120f,
+  0.189445228664950340f,
+  0.188692071828605260f, 0.187938803989575850f, 0.187185425590990440f,
+  0.186431937076041640f,
+  0.185678338887987790f, 0.184924631470150870f, 0.184170815265917720f,
+  0.183416890718739230f,
+  0.182662858272129360f, 0.181908718369666160f, 0.181154471454990920f,
+  0.180400117971807270f,
+  0.179645658363882100f, 0.178891093075044830f, 0.178136422549186320f,
+  0.177381647230260200f,
+  0.176626767562280960f, 0.175871783989325040f, 0.175116696955530060f,
+  0.174361506905093830f,
+  0.173606214282275410f, 0.172850819531394200f, 0.172095323096829040f,
+  0.171339725423019260f,
+  0.170584026954463700f, 0.169828228135719880f, 0.169072329411405180f,
+  0.168316331226194910f,
+  0.167560234024823590f, 0.166804038252083870f, 0.166047744352825850f,
+  0.165291352771957970f,
+  0.164534863954446110f, 0.163778278345312690f, 0.163021596389637810f,
+  0.162264818532558110f,
+  0.161507945219266150f, 0.160750976895011390f, 0.159993914005098350f,
+  0.159236756994887850f,
+  0.158479506309796100f, 0.157722162395293690f, 0.156964725696906750f,
+  0.156207196660216040f,
+  0.155449575730855880f, 0.154691863354515400f, 0.153934059976937460f,
+  0.153176166043917870f,
+  0.152418182001306500f, 0.151660108295005400f, 0.150901945370970040f,
+  0.150143693675208330f,
+  0.149385353653779810f, 0.148626925752796540f, 0.147868410418422360f,
+  0.147109808096871850f,
+  0.146351119234411440f, 0.145592344277358450f, 0.144833483672080240f,
+  0.144074537864995330f,
+  0.143315507302571590f, 0.142556392431327340f, 0.141797193697830530f,
+  0.141037911548697770f,
+  0.140278546430595420f, 0.139519098790238600f, 0.138759569074390380f,
+  0.137999957729862760f,
+  0.137240265203515700f, 0.136480491942256310f, 0.135720638393040080f,
+  0.134960705002868830f,
+  0.134200692218792020f, 0.133440600487905820f, 0.132680430257352130f,
+  0.131920181974319760f,
+  0.131159856086043410f, 0.130399453039802740f, 0.129638973282923540f,
+  0.128878417262776660f,
+  0.128117785426777150f, 0.127357078222385570f, 0.126596296097105960f,
+  0.125835439498487020f,
+  0.125074508874121300f, 0.124313504671644300f, 0.123552427338735370f,
+  0.122791277323116900f,
+  0.122030055072553410f, 0.121268761034852550f, 0.120507395657864240f,
+  0.119745959389479630f,
+  0.118984452677632520f, 0.118222875970297250f, 0.117461229715489990f,
+  0.116699514361267840f,
+  0.115937730355727850f, 0.115175878147008180f, 0.114413958183287050f,
+  0.113651970912781920f,
+  0.112889916783750470f, 0.112127796244489750f, 0.111365609743335190f,
+  0.110603357728661910f,
+  0.109841040648882680f, 0.109078658952449240f, 0.108316213087851300f,
+  0.107553703503615710f,
+  0.106791130648307380f, 0.106028494970528530f, 0.105265796918917650f,
+  0.104503036942150550f,
+  0.103740215488939480f, 0.102977333008032250f, 0.102214389948213370f,
+  0.101451386758302160f,
+  0.100688323887153970f, 0.099925201783659226f, 0.099162020896742573f,
+  0.098398781675363881f,
+  0.097635484568517339f, 0.096872130025230527f, 0.096108718494565468f,
+  0.095345250425617742f,
+  0.094581726267515473f, 0.093818146469420494f, 0.093054511480527333f,
+  0.092290821750062355f,
+  0.091527077727284981f, 0.090763279861485704f, 0.089999428601987341f,
+  0.089235524398144139f,
+  0.088471567699340822f, 0.087707558954993645f, 0.086943498614549489f,
+  0.086179387127484922f,
+  0.085415224943307277f, 0.084651012511553700f, 0.083886750281790226f,
+  0.083122438703613077f,
+  0.082358078226646619f, 0.081593669300544638f, 0.080829212374989468f,
+  0.080064707899690932f,
+  0.079300156324387569f, 0.078535558098845590f, 0.077770913672857989f,
+  0.077006223496245585f,
+  0.076241488018856149f, 0.075476707690563416f, 0.074711882961268378f,
+  0.073947014280897269f,
+  0.073182102099402888f, 0.072417146866763538f, 0.071652149032982254f,
+  0.070887109048087787f,
+  0.070122027362133646f, 0.069356904425197236f, 0.068591740687380900f,
+  0.067826536598810966f,
+  0.067061292609636836f, 0.066296009170032283f, 0.065530686730193397f,
+  0.064765325740339871f,
+  0.063999926650714078f, 0.063234489911580136f, 0.062469015973224969f,
+  0.061703505285957416f,
+  0.060937958300107238f, 0.060172375466026218f, 0.059406757234087247f,
+  0.058641104054683348f,
+  0.057875416378229017f, 0.057109694655158132f, 0.056343939335925283f,
+  0.055578150871004817f,
+  0.054812329710889909f, 0.054046476306093640f, 0.053280591107148056f,
+  0.052514674564603257f,
+  0.051748727129028414f, 0.050982749251010900f, 0.050216741381155325f,
+  0.049450703970084824f,
+  0.048684637468439020f, 0.047918542326875327f, 0.047152418996068000f,
+  0.046386267926707213f,
+  0.045620089569500123f, 0.044853884375169933f, 0.044087652794454979f,
+  0.043321395278109784f,
+  0.042555112276904117f, 0.041788804241622082f, 0.041022471623063397f,
+  0.040256114872041358f,
+  0.039489734439384118f, 0.038723330775933762f, 0.037956904332545366f,
+  0.037190455560088091f,
+  0.036423984909444228f, 0.035657492831508264f, 0.034890979777187955f,
+  0.034124446197403423f,
+  0.033357892543086159f, 0.032591319265180385f, 0.031824726814640963f,
+  0.031058115642434700f,
+  0.030291486199539423f, 0.029524838936943035f, 0.028758174305644590f,
+  0.027991492756653365f,
+  0.027224794740987910f, 0.026458080709677145f, 0.025691351113759395f,
+  0.024924606404281485f,
+  0.024157847032300020f, 0.023391073448879338f, 0.022624286105092803f,
+  0.021857485452021874f,
+  0.021090671940755180f, 0.020323846022389572f, 0.019557008148029204f,
+  0.018790158768784596f,
+  0.018023298335773701f, 0.017256427300120978f, 0.016489546112956454f,
+  0.015722655225417017f,
+  0.014955755088644378f, 0.014188846153786343f, 0.013421928871995907f,
+  0.012655003694430301f,
+  0.011888071072252072f, 0.011121131456628141f, 0.010354185298728884f,
+  0.009587233049729183f,
+  0.008820275160807512f, 0.008053312083144991f, 0.007286344267926684f,
+  0.006519372166339549f,
+  0.005752396229573737f, 0.004985416908821652f, 0.004218434655277024f,
+  0.003451449920135975f,
+  0.002684463154596083f, 0.001917474809855460f, 0.001150485337113809f,
+  0.000383495187571497f
+};
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_8192)
+    const float32_t Weights_8192[16384] = {
+  1.000000000000000000f, -0.000000000000000000f, 0.999999981616429330f,
+    -0.000191747597310703f,
+  0.999999926465717890f, -0.000383495187571396f, 0.999999834547867670f,
+    -0.000575242763732066f,
+  0.999999705862882230f, -0.000766990318742704f, 0.999999540410766110f,
+    -0.000958737845553301f,
+  0.999999338191525530f, -0.001150485337113849f, 0.999999099205167830f,
+    -0.001342232786374338f,
+  0.999998823451701880f, -0.001533980186284766f, 0.999998510931137790f,
+    -0.001725727529795126f,
+  0.999998161643486980f, -0.001917474809855419f, 0.999997775588762350f,
+    -0.002109222019415644f,
+  0.999997352766978210f, -0.002300969151425805f, 0.999996893178149880f,
+    -0.002492716198835908f,
+  0.999996396822294350f, -0.002684463154595962f, 0.999995863699429940f,
+    -0.002876210011655979f,
+  0.999995293809576190f, -0.003067956762965976f, 0.999994687152754080f,
+    -0.003259703401475973f,
+  0.999994043728985820f, -0.003451449920135994f, 0.999993363538295150f,
+    -0.003643196311896068f,
+  0.999992646580707190f, -0.003834942569706228f, 0.999991892856248010f,
+    -0.004026688686516512f,
+  0.999991102364945590f, -0.004218434655276963f, 0.999990275106828920f,
+    -0.004410180468937631f,
+  0.999989411081928400f, -0.004601926120448571f, 0.999988510290275690f,
+    -0.004793671602759841f,
+  0.999987572731904080f, -0.004985416908821511f, 0.999986598406848000f,
+    -0.005177162031583651f,
+  0.999985587315143200f, -0.005368906963996343f, 0.999984539456826970f,
+    -0.005560651699009674f,
+  0.999983454831937730f, -0.005752396229573736f, 0.999982333440515350f,
+    -0.005944140548638633f,
+  0.999981175282601110f, -0.006135884649154475f, 0.999979980358237650f,
+    -0.006327628524071378f,
+  0.999978748667468830f, -0.006519372166339468f, 0.999977480210339940f,
+    -0.006711115568908879f,
+  0.999976174986897610f, -0.006902858724729756f, 0.999974832997189810f,
+    -0.007094601626752250f,
+  0.999973454241265940f, -0.007286344267926521f, 0.999972038719176730f,
+    -0.007478086641202744f,
+  0.999970586430974140f, -0.007669828739531097f, 0.999969097376711580f,
+    -0.007861570555861772f,
+  0.999967571556443780f, -0.008053312083144972f, 0.999966008970226920f,
+    -0.008245053314330906f,
+  0.999964409618118280f, -0.008436794242369799f, 0.999962773500176930f,
+    -0.008628534860211886f,
+  0.999961100616462820f, -0.008820275160807412f, 0.999959390967037450f,
+    -0.009012015137106633f,
+  0.999957644551963900f, -0.009203754782059819f, 0.999955861371306100f,
+    -0.009395494088617252f,
+  0.999954041425129780f, -0.009587233049729225f, 0.999952184713501780f,
+    -0.009778971658346044f,
+  0.999950291236490480f, -0.009970709907418031f, 0.999948360994165400f,
+    -0.010162447789895513f,
+  0.999946393986597460f, -0.010354185298728842f, 0.999944390213859060f,
+    -0.010545922426868378f,
+  0.999942349676023910f, -0.010737659167264491f, 0.999940272373166960f,
+    -0.010929395512867571f,
+  0.999938158305364590f, -0.011121131456628021f, 0.999936007472694620f,
+    -0.011312866991496258f,
+  0.999933819875236000f, -0.011504602110422714f, 0.999931595513069200f,
+    -0.011696336806357838f,
+  0.999929334386276070f, -0.011888071072252092f, 0.999927036494939640f,
+    -0.012079804901055957f,
+  0.999924701839144500f, -0.012271538285719925f, 0.999922330418976490f,
+    -0.012463271219194511f,
+  0.999919922234522750f, -0.012655003694430242f, 0.999917477285871770f,
+    -0.012846735704377662f,
+  0.999914995573113470f, -0.013038467241987334f, 0.999912477096339240f,
+    -0.013230198300209835f,
+  0.999909921855641540f, -0.013421928871995765f, 0.999907329851114300f,
+    -0.013613658950295740f,
+  0.999904701082852900f, -0.013805388528060391f, 0.999902035550953920f,
+    -0.013997117598240367f,
+  0.999899333255515390f, -0.014188846153786345f, 0.999896594196636680f,
+    -0.014380574187649006f,
+  0.999893818374418490f, -0.014572301692779064f, 0.999891005788962950f,
+    -0.014764028662127246f,
+  0.999888156440373320f, -0.014955755088644296f, 0.999885270328754520f,
+    -0.015147480965280987f,
+  0.999882347454212560f, -0.015339206284988100f, 0.999879387816854930f,
+    -0.015530931040716447f,
+  0.999876391416790410f, -0.015722655225416857f, 0.999873358254129260f,
+    -0.015914378832040183f,
+  0.999870288328982950f, -0.016106101853537287f, 0.999867181641464380f,
+    -0.016297824282859065f,
+  0.999864038191687680f, -0.016489546112956437f, 0.999860857979768540f,
+    -0.016681267336780332f,
+  0.999857641005823860f, -0.016872987947281710f, 0.999854387269971890f,
+    -0.017064707937411563f,
+  0.999851096772332190f, -0.017256427300120877f, 0.999847769513025900f,
+    -0.017448146028360693f,
+  0.999844405492175240f, -0.017639864115082053f, 0.999841004709904000f,
+    -0.017831581553236039f,
+  0.999837567166337090f, -0.018023298335773746f, 0.999834092861600960f,
+    -0.018215014455646290f,
+  0.999830581795823400f, -0.018406729905804820f, 0.999827033969133420f,
+    -0.018598444679200511f,
+  0.999823449381661570f, -0.018790158768784555f, 0.999819828033539420f,
+    -0.018981872167508178f,
+  0.999816169924900410f, -0.019173584868322623f, 0.999812475055878780f,
+    -0.019365296864179156f,
+  0.999808743426610520f, -0.019557008148029083f, 0.999804975037232870f,
+    -0.019748718712823729f,
+  0.999801169887884260f, -0.019940428551514441f, 0.999797327978704690f,
+    -0.020132137657052594f,
+  0.999793449309835270f, -0.020323846022389593f, 0.999789533881418780f,
+    -0.020515553640476875f,
+  0.999785581693599210f, -0.020707260504265895f, 0.999781592746521670f,
+    -0.020898966606708137f,
+  0.999777567040332940f, -0.021090671940755121f, 0.999773504575180990f,
+    -0.021282376499358387f,
+  0.999769405351215280f, -0.021474080275469508f, 0.999765269368586450f,
+    -0.021665783262040078f,
+  0.999761096627446610f, -0.021857485452021735f, 0.999756887127949080f,
+    -0.022049186838366135f,
+  0.999752640870248840f, -0.022240887414024961f, 0.999748357854501780f,
+    -0.022432587171949934f,
+  0.999744038080865430f, -0.022624286105092803f, 0.999739681549498660f,
+    -0.022815984206405345f,
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+  0.023391073448879338f, -0.999726391410624470f, 0.023199377885346890f,
+    -0.999730858214216030f,
+  0.023007681468839410f, -0.999735288260561680f, 0.022815984206405477f,
+    -0.999739681549498660f,
+  0.022624286105092803f, -0.999744038080865430f, 0.022432587171950024f,
+    -0.999748357854501780f,
+  0.022240887414024919f, -0.999752640870248840f, 0.022049186838366180f,
+    -0.999756887127949080f,
+  0.021857485452021874f, -0.999761096627446610f, 0.021665783262040089f,
+    -0.999765269368586450f,
+  0.021474080275469605f, -0.999769405351215280f, 0.021282376499358355f,
+    -0.999773504575180990f,
+  0.021090671940755180f, -0.999777567040332940f, 0.020898966606708289f,
+    -0.999781592746521670f,
+  0.020707260504265912f, -0.999785581693599210f, 0.020515553640476986f,
+    -0.999789533881418780f,
+  0.020323846022389572f, -0.999793449309835270f, 0.020132137657052664f,
+    -0.999797327978704690f,
+  0.019940428551514598f, -0.999801169887884260f, 0.019748718712823757f,
+    -0.999804975037232870f,
+  0.019557008148029204f, -0.999808743426610520f, 0.019365296864179146f,
+    -0.999812475055878780f,
+  0.019173584868322699f, -0.999816169924900410f, 0.018981872167508348f,
+    -0.999819828033539420f,
+  0.018790158768784596f, -0.999823449381661570f, 0.018598444679200642f,
+    -0.999827033969133420f,
+  0.018406729905804820f, -0.999830581795823400f, 0.018215014455646376f,
+    -0.999834092861600960f,
+  0.018023298335773701f, -0.999837567166337090f, 0.017831581553236088f,
+    -0.999841004709904000f,
+  0.017639864115082195f, -0.999844405492175240f, 0.017448146028360704f,
+    -0.999847769513025900f,
+  0.017256427300120978f, -0.999851096772332190f, 0.017064707937411529f,
+    -0.999854387269971890f,
+  0.016872987947281773f, -0.999857641005823860f, 0.016681267336780482f,
+    -0.999860857979768540f,
+  0.016489546112956454f, -0.999864038191687680f, 0.016297824282859176f,
+    -0.999867181641464380f,
+  0.016106101853537263f, -0.999870288328982950f, 0.015914378832040249f,
+    -0.999873358254129260f,
+  0.015722655225417017f, -0.999876391416790410f, 0.015530931040716478f,
+    -0.999879387816854930f,
+  0.015339206284988220f, -0.999882347454212560f, 0.015147480965280975f,
+    -0.999885270328754520f,
+  0.014955755088644378f, -0.999888156440373320f, 0.014764028662127416f,
+    -0.999891005788962950f,
+  0.014572301692779104f, -0.999893818374418490f, 0.014380574187649138f,
+    -0.999896594196636680f,
+  0.014188846153786343f, -0.999899333255515390f, 0.013997117598240459f,
+    -0.999902035550953920f,
+  0.013805388528060349f, -0.999904701082852900f, 0.013613658950295789f,
+    -0.999907329851114300f,
+  0.013421928871995907f, -0.999909921855641540f, 0.013230198300209845f,
+    -0.999912477096339240f,
+  0.013038467241987433f, -0.999914995573113470f, 0.012846735704377631f,
+    -0.999917477285871770f,
+  0.012655003694430301f, -0.999919922234522750f, 0.012463271219194662f,
+    -0.999922330418976490f,
+  0.012271538285719944f, -0.999924701839144500f, 0.012079804901056066f,
+    -0.999927036494939640f,
+  0.011888071072252072f, -0.999929334386276070f, 0.011696336806357907f,
+    -0.999931595513069200f,
+  0.011504602110422875f, -0.999933819875236000f, 0.011312866991496287f,
+    -0.999936007472694620f,
+  0.011121131456628141f, -0.999938158305364590f, 0.010929395512867561f,
+    -0.999940272373166960f,
+  0.010737659167264572f, -0.999942349676023910f, 0.010545922426868548f,
+    -0.999944390213859060f,
+  0.010354185298728884f, -0.999946393986597460f, 0.010162447789895645f,
+    -0.999948360994165400f,
+  0.009970709907418029f, -0.999950291236490480f, 0.009778971658346134f,
+    -0.999952184713501780f,
+  0.009587233049729183f, -0.999954041425129780f, 0.009395494088617302f,
+    -0.999955861371306100f,
+  0.009203754782059960f, -0.999957644551963900f, 0.009012015137106642f,
+    -0.999959390967037450f,
+  0.008820275160807512f, -0.999961100616462820f, 0.008628534860211857f,
+    -0.999962773500176930f,
+  0.008436794242369860f, -0.999964409618118280f, 0.008245053314331058f,
+    -0.999966008970226920f,
+  0.008053312083144991f, -0.999967571556443780f, 0.007861570555861883f,
+    -0.999969097376711580f,
+  0.007669828739531077f, -0.999970586430974140f, 0.007478086641202815f,
+    -0.999972038719176730f,
+  0.007286344267926684f, -0.999973454241265940f, 0.007094601626752279f,
+    -0.999974832997189810f,
+  0.006902858724729877f, -0.999976174986897610f, 0.006711115568908869f,
+    -0.999977480210339940f,
+  0.006519372166339549f, -0.999978748667468830f, 0.006327628524071549f,
+    -0.999979980358237650f,
+  0.006135884649154515f, -0.999981175282601110f, 0.005944140548638765f,
+    -0.999982333440515350f,
+  0.005752396229573737f, -0.999983454831937730f, 0.005560651699009764f,
+    -0.999984539456826970f,
+  0.005368906963996303f, -0.999985587315143200f, 0.005177162031583702f,
+    -0.999986598406848000f,
+  0.004985416908821652f, -0.999987572731904080f, 0.004793671602759852f,
+    -0.999988510290275690f,
+  0.004601926120448672f, -0.999989411081928400f, 0.004410180468937601f,
+    -0.999990275106828920f,
+  0.004218434655277024f, -0.999991102364945590f, 0.004026688686516664f,
+    -0.999991892856248010f,
+  0.003834942569706248f, -0.999992646580707190f, 0.003643196311896179f,
+    -0.999993363538295150f,
+  0.003451449920135975f, -0.999994043728985820f, 0.003259703401476044f,
+    -0.999994687152754080f,
+  0.003067956762966138f, -0.999995293809576190f, 0.002876210011656010f,
+    -0.999995863699429940f,
+  0.002684463154596083f, -0.999996396822294350f, 0.002492716198835898f,
+    -0.999996893178149880f,
+  0.002300969151425887f, -0.999997352766978210f, 0.002109222019415816f,
+    -0.999997775588762350f,
+  0.001917474809855460f, -0.999998161643486980f, 0.001725727529795258f,
+    -0.999998510931137790f,
+  0.001533980186284766f, -0.999998823451701880f, 0.001342232786374430f,
+    -0.999999099205167830f,
+  0.001150485337113809f, -0.999999338191525530f, 0.000958737845553352f,
+    -0.999999540410766110f,
+  0.000766990318742846f, -0.999999705862882230f, 0.000575242763732077f,
+    -0.999999834547867670f,
+  0.000383495187571497f, -0.999999926465717890f, 0.000191747597310674f,
+    -0.999999981616429330f
+};
+
+    const float32_t cos_factors_8192[8192] = {
+  1.999999990808214700f, 1.999999917273932200f, 1.999999770205369800f,
+    1.999999549602533100f,
+  1.999999255465430200f, 1.999998887794072000f, 1.999998446588471700f,
+    1.999997931848645600f,
+  1.999997343574612800f, 1.999996681766395000f, 1.999995946424016200f,
+    1.999995137547503600f,
+  1.999994255136887000f, 1.999993299192198700f, 1.999992269713474200f,
+    1.999991166700750800f,
+  1.999989990154069600f, 1.999988740073473500f, 1.999987416459008600f,
+    1.999986019310723500f,
+  1.999984548628669600f, 1.999983004412901000f, 1.999981386663474400f,
+    1.999979695380449400f,
+  1.999977930563888100f, 1.999976092213855400f, 1.999974180330418700f,
+    1.999972194913648900f,
+  1.999970135963618400f, 1.999968003480403000f, 1.999965797464081200f,
+    1.999963517914734100f,
+  1.999961164832445800f, 1.999958738217302300f, 1.999956238069392900f,
+    1.999953664388809800f,
+  1.999951017175647600f, 1.999948296430003500f, 1.999945502151977600f,
+    1.999942634341672600f,
+  1.999939692999193900f, 1.999936678124649700f, 1.999933589718150700f,
+    1.999930427779810900f,
+  1.999927192309745900f, 1.999923883308075200f, 1.999920500774920300f,
+    1.999917044710405500f,
+  1.999913515114657900f, 1.999909911987807200f, 1.999906235329986100f,
+    1.999902485141329400f,
+  1.999898661421975400f, 1.999894764172064600f, 1.999890793391740000f,
+    1.999886749081147800f,
+  1.999882631240436700f, 1.999878439869758200f, 1.999874174969266300f,
+    1.999869836539117700f,
+  1.999865424579472000f, 1.999860939090491600f, 1.999856380072341000f,
+    1.999851747525188200f,
+  1.999847041449203300f, 1.999842261844559700f, 1.999837408711432600f,
+    1.999832482050000900f,
+  1.999827481860445300f, 1.999822408142949900f, 1.999817260897701400f,
+    1.999812040124888700f,
+  1.999806745824704000f, 1.999801377997341800f, 1.999795936642999600f,
+    1.999790421761877400f,
+  1.999784833354177900f, 1.999779171420106700f, 1.999773435959872000f,
+    1.999767626973684400f,
+  1.999761744461757700f, 1.999755788424308200f, 1.999749758861554900f,
+    1.999743655773719400f,
+  1.999737479161026100f, 1.999731229023702200f, 1.999724905361977200f,
+    1.999718508176084000f,
+  1.999712037466257600f, 1.999705493232735800f, 1.999698875475759600f,
+    1.999692184195571900f,
+  1.999685419392419000f, 1.999678581066549400f, 1.999671669218214600f,
+    1.999664683847668800f,
+  1.999657624955168700f, 1.999650492540973900f, 1.999643286605346800f,
+    1.999636007148552400f,
+  1.999628654170857900f, 1.999621227672533800f, 1.999613727653853500f,
+    1.999606154115092500f,
+  1.999598507056529000f, 1.999590786478444600f, 1.999582992381123000f,
+    1.999575124764850800f,
+  1.999567183629917100f, 1.999559168976613900f, 1.999551080805236100f,
+    1.999542919116081000f,
+  1.999534683909448600f, 1.999526375185641800f, 1.999517992944965800f,
+    1.999509537187729200f,
+  1.999501007914242600f, 1.999492405124819700f, 1.999483728819776900f,
+    1.999474978999432800f,
+  1.999466155664109600f, 1.999457258814131500f, 1.999448288449825500f,
+    1.999439244571521700f,
+  1.999430127179552500f, 1.999420936274252800f, 1.999411671855960900f,
+    1.999402333925017300f,
+  1.999392922481765500f, 1.999383437526551300f, 1.999373879059723500f,
+    1.999364247081633500f,
+  1.999354541592635500f, 1.999344762593086500f, 1.999334910083345700f,
+    1.999324984063775700f,
+  1.999314984534741100f, 1.999304911496609700f, 1.999294764949752100f,
+    1.999284544894541100f,
+  1.999274251331352400f, 1.999263884260564600f, 1.999253443682558900f,
+    1.999242929597719200f,
+  1.999232342006432000f, 1.999221680909086400f, 1.999210946306074500f,
+    1.999200138197791100f,
+  1.999189256584633600f, 1.999178301467001900f, 1.999167272845298900f,
+    1.999156170719930100f,
+  1.999144995091303600f, 1.999133745959830600f, 1.999122423325924200f,
+    1.999111027190001000f,
+  1.999099557552479900f, 1.999088014413782800f, 1.999076397774334000f,
+    1.999064707634560700f,
+  1.999052943994892300f, 1.999041106855761900f, 1.999029196217604100f,
+    1.999017212080857400f,
+  1.999005154445962200f, 1.998993023313361700f, 1.998980818683502100f,
+    1.998968540556831800f,
+  1.998956188933802800f, 1.998943763814868800f, 1.998931265200486900f,
+    1.998918693091116200f,
+  1.998906047487219600f, 1.998893328389261400f, 1.998880535797709700f,
+    1.998867669713034500f,
+  1.998854730135709400f, 1.998841717066209400f, 1.998828630505013400f,
+    1.998815470452602400f,
+  1.998802236909460500f, 1.998788929876074100f, 1.998775549352932400f,
+    1.998762095340527400f,
+  1.998748567839354000f, 1.998734966849909000f, 1.998721292372693100f,
+    1.998707544408208700f,
+  1.998693722956961500f, 1.998679828019459300f, 1.998665859596213500f,
+    1.998651817687737300f,
+  1.998637702294547000f, 1.998623513417161700f, 1.998609251056103100f,
+    1.998594915211895600f,
+  1.998580505885066100f, 1.998566023076144600f, 1.998551466785663400f,
+    1.998536837014157900f,
+  1.998522133762165900f, 1.998507357030227900f, 1.998492506818887200f,
+    1.998477583128690100f,
+  1.998462585960185000f, 1.998447515313923400f, 1.998432371190459500f,
+    1.998417153590349900f,
+  1.998401862514154200f, 1.998386497962434800f, 1.998371059935756300f,
+    1.998355548434686400f,
+  1.998339963459795400f, 1.998324305011656600f, 1.998308573090845200f,
+    1.998292767697940100f,
+  1.998276888833522300f, 1.998260936498175400f, 1.998244910692486000f,
+    1.998228811417043700f,
+  1.998212638672439900f, 1.998196392459269400f, 1.998180072778129600f,
+    1.998163679629620500f,
+  1.998147213014344900f, 1.998130672932908000f, 1.998114059385918400f,
+    1.998097372373986300f,
+  1.998080611897725700f, 1.998063777957752600f, 1.998046870554686100f,
+    1.998029889689147700f,
+  1.998012835361761900f, 1.997995707573155600f, 1.997978506323958600f,
+    1.997961231614803200f,
+  1.997943883446324800f, 1.997926461819161000f, 1.997908966733952500f,
+    1.997891398191342400f,
+  1.997873756191977000f, 1.997856040736504500f, 1.997838251825576400f,
+    1.997820389459846700f,
+  1.997802453639972300f, 1.997784444366612600f, 1.997766361640429800f,
+    1.997748205462088500f,
+  1.997729975832256600f, 1.997711672751604200f, 1.997693296220804000f,
+    1.997674846240532000f,
+  1.997656322811466500f, 1.997637725934288300f, 1.997619055609681600f,
+    1.997600311838332500f,
+  1.997581494620930300f, 1.997562603958166600f, 1.997543639850736200f,
+    1.997524602299336500f,
+  1.997505491304667000f, 1.997486306867430900f, 1.997467048988333000f,
+    1.997447717668082000f,
+  1.997428312907388200f, 1.997408834706965000f, 1.997389283067528800f,
+    1.997369657989798400f,
+  1.997349959474495200f, 1.997330187522343700f, 1.997310342134070800f,
+    1.997290423310406100f,
+  1.997270431052081900f, 1.997250365359833200f, 1.997230226234397900f,
+    1.997210013676516700f,
+  1.997189727686932400f, 1.997169368266390900f, 1.997148935415640600f,
+    1.997128429135433400f,
+  1.997107849426522600f, 1.997087196289665000f, 1.997066469725620200f,
+    1.997045669735150000f,
+  1.997024796319019300f, 1.997003849477995600f, 1.996982829212848900f,
+    1.996961735524351900f,
+  1.996940568413280600f, 1.996919327880412900f, 1.996898013926530000f,
+    1.996876626552415400f,
+  1.996855165758855600f, 1.996833631546639300f, 1.996812023916558800f,
+    1.996790342869408000f,
+  1.996768588405984300f, 1.996746760527087700f, 1.996724859233520500f,
+    1.996702884526087900f,
+  1.996680836405598100f, 1.996658714872861800f, 1.996636519928692000f,
+    1.996614251573904900f,
+  1.996591909809319400f, 1.996569494635756600f, 1.996547006054041100f,
+    1.996524444064999400f,
+  1.996501808669461000f, 1.996479099868258400f, 1.996456317662226300f,
+    1.996433462052202600f,
+  1.996410533039027400f, 1.996387530623543900f, 1.996364454806597500f,
+    1.996341305589037100f,
+  1.996318082971713500f, 1.996294786955480800f, 1.996271417541195300f,
+    1.996247974729716200f,
+  1.996224458521905600f, 1.996200868918628100f, 1.996177205920750800f,
+    1.996153469529144100f,
+  1.996129659744680300f, 1.996105776568235100f, 1.996081820000686500f,
+    1.996057790042915500f,
+  1.996033686695805300f, 1.996009509960242400f, 1.995985259837115500f,
+    1.995960936327316300f,
+  1.995936539431739000f, 1.995912069151280800f, 1.995887525486841300f,
+    1.995862908439323100f,
+  1.995838218009630800f, 1.995813454198672700f, 1.995788617007359100f,
+    1.995763706436603200f,
+  1.995738722487320600f, 1.995713665160430600f, 1.995688534456853800f,
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+  0.061157948706189229f, 0.060774631727329942f, 0.060391312513961619f,
+    0.060007991080177375f,
+  0.059624667440070382f, 0.059241341607735261f, 0.058858013597264912f,
+    0.058474683422754095f,
+  0.058091351098295878f, 0.057708016637985186f, 0.057324680055915692f,
+    0.056941341366181127f,
+  0.056558000582876661f, 0.056174657720095743f, 0.055791312791933681f,
+    0.055407965812484541f,
+  0.055024616795842439f, 0.054641265756102911f, 0.054257912707359794f,
+    0.053874557663708772f,
+  0.053491200639244271f, 0.053107841648060788f, 0.052724480704254229f,
+    0.052341117821918783f,
+  0.051957753015150501f, 0.051574386298044173f, 0.051191017684694640f,
+    0.050807647189198162f,
+  0.050424274825649297f, 0.050040900608144430f, 0.049657524550778251f,
+    0.049274146667647289f,
+  0.048890766972846805f, 0.048507385480472134f, 0.048124002204620014f,
+    0.047740617159385448f,
+  0.047357230358865306f, 0.046973841817155179f, 0.046590451548350717f,
+    0.046207059566548990f,
+  0.045823665885845313f, 0.045440270520336883f, 0.045056873484119603f,
+    0.044673474791289434f,
+  0.044290074455943754f, 0.043906672492178188f, 0.043523268914090238f,
+    0.043139863735776100f,
+  0.042756456971332048f, 0.042373048634855741f, 0.041989638740443119f,
+    0.041606227302191955f,
+  0.041222814334198304f, 0.040839399850560058f, 0.040455983865373815f,
+    0.040072566392736257f,
+  0.039689147446745419f, 0.039305727041497644f, 0.038922305191091085f,
+    0.038538881909622631f,
+  0.038155457211189216f, 0.037772031109889144f, 0.037388603619819022f,
+    0.037005174755077273f,
+  0.036621744529761024f, 0.036238312957967478f, 0.035854880053795196f,
+    0.035471445831341021f,
+  0.035088010304703626f, 0.034704573487980395f, 0.034321135395268765f,
+    0.033937696040667535f,
+  0.033554255438273790f, 0.033170813602186440f, 0.032787370546502645f,
+    0.032403926285321405f,
+  0.032020480832740429f, 0.031637034202857461f, 0.031253586409771626f,
+    0.030870137467580314f,
+  0.030486687390382738f, 0.030103236192276818f, 0.029719783887360508f,
+    0.029336330489733147f,
+  0.028952876013492331f, 0.028569420472737472f, 0.028185963881566689f,
+    0.027802506254078142f,
+  0.027419047604371360f, 0.027035587946544135f, 0.026652127294696067f,
+    0.026268665662925468f,
+  0.025885203065330677f, 0.025501739516011413f, 0.025118275029065638f,
+    0.024734809618593138f,
+  0.024351343298691951f, 0.023967876083461924f, 0.023584407987001611f,
+    0.023200939023409587f,
+  0.022817469206785804f, 0.022433998551228459f, 0.022050527070837558f,
+    0.021667054779711814f,
+  0.021283581691949955f, 0.020900107821652084f, 0.020516633182916549f,
+    0.020133157789843505f,
+  0.019749681656531803f, 0.019366204797080316f, 0.018982727225589285f,
+    0.018599248956157190f,
+  0.018215770002884327f, 0.017832290379869671f, 0.017448810101212228f,
+    0.017065329181012358f,
+  0.016681847633368677f, 0.016298365472381587f, 0.015914882712149747f,
+    0.015531399366773606f,
+  0.015147915450352307f, 0.014764430976985016f, 0.014380945960772247f,
+    0.013997460415812761f,
+  0.013613974356207112f, 0.013230487796054543f, 0.012847000749454314f,
+    0.012463513230507034f,
+  0.012080025253311559f, 0.011696536831968529f, 0.011313047980577277f,
+    0.010929558713237145f,
+  0.010546069044048827f, 0.010162578987111254f, 0.009779088556525145f,
+    0.009395597766389905f,
+  0.009012106630804949f, 0.008628615163871038f, 0.008245123379687167f,
+    0.007861631292354124f,
+  0.007478138915970929f, 0.007094646264638386f, 0.006711153352455981f,
+    0.006327660193523208f,
+  0.005944166801940901f, 0.005560673191808128f, 0.005177179377225743f,
+    0.004793685372293270f,
+  0.004410191191110246f, 0.004026696847777542f, 0.003643202356394263f,
+    0.003259707731061291f,
+  0.002876212985878184f, 0.002492718134944503f, 0.002109223192361147f,
+    0.001725728172227238f,
+  0.001342233088643682f, 0.000958737955710053f, 0.000575242787525925f,
+    0.000191747598192208f
+};
+  #endif
+
+/**
+  @brief  Weights Table
+ */
+
+/**
+  @par
+  Weights tables are generated using the formula : <pre>weights[n] = e^(-j*n*pi/(2*N))</pre>
+  @par
+  C command to generate the table
+  <pre>
+  for(i = 0; i< N; i++)
+  { 
+    weights[(2*i)]   =  cos(i*c);
+    weights[(2*i)+1] = -sin(i*c);
+  } </pre>
+  @par
+  where <code>N</code> is the Number of weights to be calculated and <code>c</code> is <code>pi/(2*N)</code>
+  @par
+  Converted the output to q15 format by multiplying with 2^31 and saturated if required.
+  @par
+  In the tables below the real and imaginary values are placed alternatively, hence the
+  array length is <code>2*N</code>.
+ */
+
+/**
+  @par
+  cosFactor tables are generated using the formula : <pre> cos_factors[n] = 2 * cos((2n+1)*pi/(4*N)) </pre>
+  @par
+  C command to generate the table
+  <pre>
+  for (i = 0; i< N; i++)
+  {
+    cos_factors[i] = 2 * cos((2*i+1)*c/2);
+  } </pre>
+  @par
+  where <code>N</code> is the number of factors to generate and <code>c</code> is <code>pi/(2*N)</code>
+  @par
+  Then converted to q15 format by multiplying with 2^31 and saturated if required.
+*/
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_128)
+    const q15_t __ALIGNED(4) WeightsQ15_128[256] = {
+  (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7fe9, (q15_t)0xfb4a,
+  (q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7f87, (q15_t)0xf505,
+  (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7ed5, (q15_t)0xeec7,
+  (q15_t)0x7e9d, (q15_t)0xed38, (q15_t)0x7e5f, (q15_t)0xebab, (q15_t)0x7e1d, (q15_t)0xea1e, (q15_t)0x7dd6, (q15_t)0xe893,
+  (q15_t)0x7d8a, (q15_t)0xe708, (q15_t)0x7d39, (q15_t)0xe57e, (q15_t)0x7ce3, (q15_t)0xe3f5, (q15_t)0x7c89, (q15_t)0xe26d,
+  (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7bc5, (q15_t)0xdf61, (q15_t)0x7b5d, (q15_t)0xdddd, (q15_t)0x7aef, (q15_t)0xdc5a,
+  (q15_t)0x7a7d, (q15_t)0xdad8, (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x798a, (q15_t)0xd7da, (q15_t)0x7909, (q15_t)0xd65d,
+  (q15_t)0x7884, (q15_t)0xd4e1, (q15_t)0x77fa, (q15_t)0xd368, (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x76d9, (q15_t)0xd079,
+  (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x745f, (q15_t)0xcab3,
+  (q15_t)0x73b5, (q15_t)0xc946, (q15_t)0x7307, (q15_t)0xc7dc, (q15_t)0x7255, (q15_t)0xc674, (q15_t)0x719e, (q15_t)0xc50e,
+  (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x7023, (q15_t)0xc248, (q15_t)0x6f5f, (q15_t)0xc0e9, (q15_t)0x6e96, (q15_t)0xbf8d,
+  (q15_t)0x6dca, (q15_t)0xbe32, (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6c24, (q15_t)0xbb86, (q15_t)0x6b4a, (q15_t)0xba33,
+  (q15_t)0x6a6d, (q15_t)0xb8e4, (q15_t)0x698c, (q15_t)0xb797, (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x67bd, (q15_t)0xb505,
+  (q15_t)0x66cf, (q15_t)0xb3c1, (q15_t)0x65dd, (q15_t)0xb27f, (q15_t)0x64e8, (q15_t)0xb141, (q15_t)0x63ef, (q15_t)0xb005,
+  (q15_t)0x62f2, (q15_t)0xaecd, (q15_t)0x61f1, (q15_t)0xad97, (q15_t)0x60ec, (q15_t)0xac65, (q15_t)0x5fe3, (q15_t)0xab36,
+  (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5dc7, (q15_t)0xa8e3, (q15_t)0x5cb4, (q15_t)0xa7be, (q15_t)0x5b9d, (q15_t)0xa69c,
+  (q15_t)0x5a82, (q15_t)0xa57e, (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x5842, (q15_t)0xa34c, (q15_t)0x571d, (q15_t)0xa239,
+  (q15_t)0x55f5, (q15_t)0xa129, (q15_t)0x54ca, (q15_t)0xa01d, (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x5269, (q15_t)0x9e0f,
+  (q15_t)0x5133, (q15_t)0x9d0e, (q15_t)0x4ffb, (q15_t)0x9c11, (q15_t)0x4ebf, (q15_t)0x9b18, (q15_t)0x4d81, (q15_t)0x9a23,
+  (q15_t)0x4c3f, (q15_t)0x9931, (q15_t)0x4afb, (q15_t)0x9843, (q15_t)0x49b4, (q15_t)0x975a, (q15_t)0x4869, (q15_t)0x9674,
+  (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x45cd, (q15_t)0x94b6, (q15_t)0x447a, (q15_t)0x93dc, (q15_t)0x4325, (q15_t)0x9307,
+  (q15_t)0x41ce, (q15_t)0x9236, (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x3f17, (q15_t)0x90a1, (q15_t)0x3db8, (q15_t)0x8fdd,
+  (q15_t)0x3c56, (q15_t)0x8f1e, (q15_t)0x3af2, (q15_t)0x8e62, (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3824, (q15_t)0x8cf9,
+  (q15_t)0x36ba, (q15_t)0x8c4b, (q15_t)0x354d, (q15_t)0x8ba1, (q15_t)0x33de, (q15_t)0x8afc, (q15_t)0x326e, (q15_t)0x8a5b,
+  (q15_t)0x30fb, (q15_t)0x89bf, (q15_t)0x2f87, (q15_t)0x8927, (q15_t)0x2e11, (q15_t)0x8894, (q15_t)0x2c98, (q15_t)0x8806,
+  (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x26a8, (q15_t)0x85fb,
+  (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x209f, (q15_t)0x843b,
+  (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1a82, (q15_t)0x82c7,
+  (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x1455, (q15_t)0x81a1,
+  (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x1139, (q15_t)0x812b, (q15_t)0xfab, (q15_t)0x80f7, (q15_t)0xe1b, (q15_t)0x80c8,
+  (q15_t)0xc8b, (q15_t)0x809e, (q15_t)0xafb, (q15_t)0x8079, (q15_t)0x96a, (q15_t)0x8059, (q15_t)0x7d9, (q15_t)0x803e,
+  (q15_t)0x647, (q15_t)0x8028, (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x324, (q15_t)0x800a, (q15_t)0x192, (q15_t)0x8003
+};
+    const q15_t __ALIGNED(4) cos_factorsQ15_128[128] = {
+  (q15_t)0x7fff, (q15_t)0x7ffa, (q15_t)0x7ff0, (q15_t)0x7fe1, (q15_t)0x7fce, (q15_t)0x7fb5, (q15_t)0x7f97, (q15_t)0x7f75,
+  (q15_t)0x7f4d, (q15_t)0x7f21, (q15_t)0x7ef0, (q15_t)0x7eba, (q15_t)0x7e7f, (q15_t)0x7e3f, (q15_t)0x7dfa, (q15_t)0x7db0,
+  (q15_t)0x7d62, (q15_t)0x7d0f, (q15_t)0x7cb7, (q15_t)0x7c5a, (q15_t)0x7bf8, (q15_t)0x7b92, (q15_t)0x7b26, (q15_t)0x7ab6,
+  (q15_t)0x7a42, (q15_t)0x79c8, (q15_t)0x794a, (q15_t)0x78c7, (q15_t)0x7840, (q15_t)0x77b4, (q15_t)0x7723, (q15_t)0x768e,
+  (q15_t)0x75f4, (q15_t)0x7555, (q15_t)0x74b2, (q15_t)0x740b, (q15_t)0x735f, (q15_t)0x72af, (q15_t)0x71fa, (q15_t)0x7141,
+  (q15_t)0x7083, (q15_t)0x6fc1, (q15_t)0x6efb, (q15_t)0x6e30, (q15_t)0x6d62, (q15_t)0x6c8f, (q15_t)0x6bb8, (q15_t)0x6adc,
+  (q15_t)0x69fd, (q15_t)0x6919, (q15_t)0x6832, (q15_t)0x6746, (q15_t)0x6657, (q15_t)0x6563, (q15_t)0x646c, (q15_t)0x6371,
+  (q15_t)0x6271, (q15_t)0x616f, (q15_t)0x6068, (q15_t)0x5f5e, (q15_t)0x5e50, (q15_t)0x5d3e, (q15_t)0x5c29, (q15_t)0x5b10,
+  (q15_t)0x59f3, (q15_t)0x58d4, (q15_t)0x57b0, (q15_t)0x568a, (q15_t)0x5560, (q15_t)0x5433, (q15_t)0x5302, (q15_t)0x51ce,
+  (q15_t)0x5097, (q15_t)0x4f5e, (q15_t)0x4e21, (q15_t)0x4ce1, (q15_t)0x4b9e, (q15_t)0x4a58, (q15_t)0x490f, (q15_t)0x47c3,
+  (q15_t)0x4675, (q15_t)0x4524, (q15_t)0x43d0, (q15_t)0x427a, (q15_t)0x4121, (q15_t)0x3fc5, (q15_t)0x3e68, (q15_t)0x3d07,
+  (q15_t)0x3ba5, (q15_t)0x3a40, (q15_t)0x38d8, (q15_t)0x376f, (q15_t)0x3604, (q15_t)0x3496, (q15_t)0x3326, (q15_t)0x31b5,
+  (q15_t)0x3041, (q15_t)0x2ecc, (q15_t)0x2d55, (q15_t)0x2bdc, (q15_t)0x2a61, (q15_t)0x28e5, (q15_t)0x2767, (q15_t)0x25e8,
+  (q15_t)0x2467, (q15_t)0x22e5, (q15_t)0x2161, (q15_t)0x1fdc, (q15_t)0x1e56, (q15_t)0x1ccf, (q15_t)0x1b47, (q15_t)0x19bd,
+  (q15_t)0x1833, (q15_t)0x16a8, (q15_t)0x151b, (q15_t)0x138e, (q15_t)0x1201, (q15_t)0x1072, (q15_t)0xee3, (q15_t)0xd53,
+  (q15_t)0xbc3, (q15_t)0xa33, (q15_t)0x8a2, (q15_t)0x710, (q15_t)0x57f, (q15_t)0x3ed, (q15_t)0x25b, (q15_t)0xc9
+};
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_512)
+    const q15_t __ALIGNED(4) WeightsQ15_512[1024] = {
+  (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xff9c, (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7ffe, (q15_t)0xfed3,
+  (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ffc, (q15_t)0xfe0a, (q15_t)0x7ffa, (q15_t)0xfda5, (q15_t)0x7ff8, (q15_t)0xfd41,
+  (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7ff3, (q15_t)0xfc78, (q15_t)0x7ff0, (q15_t)0xfc13, (q15_t)0x7fed, (q15_t)0xfbaf,
+  (q15_t)0x7fe9, (q15_t)0xfb4a, (q15_t)0x7fe5, (q15_t)0xfae6, (q15_t)0x7fe1, (q15_t)0xfa81, (q15_t)0x7fdd, (q15_t)0xfa1d,
+  (q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fd3, (q15_t)0xf954, (q15_t)0x7fce, (q15_t)0xf8f0, (q15_t)0x7fc8, (q15_t)0xf88b,
+  (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fbc, (q15_t)0xf7c3, (q15_t)0x7fb5, (q15_t)0xf75e, (q15_t)0x7fae, (q15_t)0xf6fa,
+  (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7f9f, (q15_t)0xf632, (q15_t)0x7f97, (q15_t)0xf5cd, (q15_t)0x7f8f, (q15_t)0xf569,
+  (q15_t)0x7f87, (q15_t)0xf505, (q15_t)0x7f7e, (q15_t)0xf4a1, (q15_t)0x7f75, (q15_t)0xf43d, (q15_t)0x7f6b, (q15_t)0xf3d9,
+  (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f58, (q15_t)0xf311, (q15_t)0x7f4d, (q15_t)0xf2ad, (q15_t)0x7f43, (q15_t)0xf249,
+  (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f2d, (q15_t)0xf181, (q15_t)0x7f21, (q15_t)0xf11d, (q15_t)0x7f15, (q15_t)0xf0b9,
+  (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7efd, (q15_t)0xeff2, (q15_t)0x7ef0, (q15_t)0xef8e, (q15_t)0x7ee3, (q15_t)0xef2a,
+  (q15_t)0x7ed5, (q15_t)0xeec7, (q15_t)0x7ec8, (q15_t)0xee63, (q15_t)0x7eba, (q15_t)0xedff, (q15_t)0x7eab, (q15_t)0xed9c,
+  (q15_t)0x7e9d, (q15_t)0xed38, (q15_t)0x7e8e, (q15_t)0xecd5, (q15_t)0x7e7f, (q15_t)0xec72, (q15_t)0x7e6f, (q15_t)0xec0e,
+  (q15_t)0x7e5f, (q15_t)0xebab, (q15_t)0x7e4f, (q15_t)0xeb48, (q15_t)0x7e3f, (q15_t)0xeae5, (q15_t)0x7e2e, (q15_t)0xea81,
+  (q15_t)0x7e1d, (q15_t)0xea1e, (q15_t)0x7e0c, (q15_t)0xe9bb, (q15_t)0x7dfa, (q15_t)0xe958, (q15_t)0x7de8, (q15_t)0xe8f6,
+  (q15_t)0x7dd6, (q15_t)0xe893, (q15_t)0x7dc3, (q15_t)0xe830, (q15_t)0x7db0, (q15_t)0xe7cd, (q15_t)0x7d9d, (q15_t)0xe76a,
+  (q15_t)0x7d8a, (q15_t)0xe708, (q15_t)0x7d76, (q15_t)0xe6a5, (q15_t)0x7d62, (q15_t)0xe643, (q15_t)0x7d4e, (q15_t)0xe5e0,
+  (q15_t)0x7d39, (q15_t)0xe57e, (q15_t)0x7d24, (q15_t)0xe51c, (q15_t)0x7d0f, (q15_t)0xe4b9, (q15_t)0x7cf9, (q15_t)0xe457,
+  (q15_t)0x7ce3, (q15_t)0xe3f5, (q15_t)0x7ccd, (q15_t)0xe393, (q15_t)0x7cb7, (q15_t)0xe331, (q15_t)0x7ca0, (q15_t)0xe2cf,
+  (q15_t)0x7c89, (q15_t)0xe26d, (q15_t)0x7c71, (q15_t)0xe20b, (q15_t)0x7c5a, (q15_t)0xe1aa, (q15_t)0x7c42, (q15_t)0xe148,
+  (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7c11, (q15_t)0xe085, (q15_t)0x7bf8, (q15_t)0xe024, (q15_t)0x7bdf, (q15_t)0xdfc2,
+  (q15_t)0x7bc5, (q15_t)0xdf61, (q15_t)0x7bac, (q15_t)0xdf00, (q15_t)0x7b92, (q15_t)0xde9f, (q15_t)0x7b77, (q15_t)0xde3e,
+  (q15_t)0x7b5d, (q15_t)0xdddd, (q15_t)0x7b42, (q15_t)0xdd7c, (q15_t)0x7b26, (q15_t)0xdd1b, (q15_t)0x7b0b, (q15_t)0xdcbb,
+  (q15_t)0x7aef, (q15_t)0xdc5a, (q15_t)0x7ad3, (q15_t)0xdbf9, (q15_t)0x7ab6, (q15_t)0xdb99, (q15_t)0x7a9a, (q15_t)0xdb39,
+  (q15_t)0x7a7d, (q15_t)0xdad8, (q15_t)0x7a5f, (q15_t)0xda78, (q15_t)0x7a42, (q15_t)0xda18, (q15_t)0x7a24, (q15_t)0xd9b8,
+  (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x79e7, (q15_t)0xd8f9, (q15_t)0x79c8, (q15_t)0xd899, (q15_t)0x79a9, (q15_t)0xd839,
+  (q15_t)0x798a, (q15_t)0xd7da, (q15_t)0x796a, (q15_t)0xd77a, (q15_t)0x794a, (q15_t)0xd71b, (q15_t)0x792a, (q15_t)0xd6bc,
+  (q15_t)0x7909, (q15_t)0xd65d, (q15_t)0x78e8, (q15_t)0xd5fe, (q15_t)0x78c7, (q15_t)0xd59f, (q15_t)0x78a6, (q15_t)0xd540,
+  (q15_t)0x7884, (q15_t)0xd4e1, (q15_t)0x7862, (q15_t)0xd483, (q15_t)0x7840, (q15_t)0xd424, (q15_t)0x781d, (q15_t)0xd3c6,
+  (q15_t)0x77fa, (q15_t)0xd368, (q15_t)0x77d7, (q15_t)0xd309, (q15_t)0x77b4, (q15_t)0xd2ab, (q15_t)0x7790, (q15_t)0xd24d,
+  (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x7747, (q15_t)0xd192, (q15_t)0x7723, (q15_t)0xd134, (q15_t)0x76fe, (q15_t)0xd0d7,
+  (q15_t)0x76d9, (q15_t)0xd079, (q15_t)0x76b3, (q15_t)0xd01c, (q15_t)0x768e, (q15_t)0xcfbf, (q15_t)0x7668, (q15_t)0xcf62,
+  (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x761b, (q15_t)0xcea8, (q15_t)0x75f4, (q15_t)0xce4b, (q15_t)0x75cc, (q15_t)0xcdef,
+  (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x757d, (q15_t)0xcd36, (q15_t)0x7555, (q15_t)0xccda, (q15_t)0x752d, (q15_t)0xcc7e,
+  (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x74db, (q15_t)0xcbc6, (q15_t)0x74b2, (q15_t)0xcb6a, (q15_t)0x7489, (q15_t)0xcb0e,
+  (q15_t)0x745f, (q15_t)0xcab3, (q15_t)0x7435, (q15_t)0xca58, (q15_t)0x740b, (q15_t)0xc9fc, (q15_t)0x73e0, (q15_t)0xc9a1,
+  (q15_t)0x73b5, (q15_t)0xc946, (q15_t)0x738a, (q15_t)0xc8ec, (q15_t)0x735f, (q15_t)0xc891, (q15_t)0x7333, (q15_t)0xc836,
+  (q15_t)0x7307, (q15_t)0xc7dc, (q15_t)0x72db, (q15_t)0xc782, (q15_t)0x72af, (q15_t)0xc728, (q15_t)0x7282, (q15_t)0xc6ce,
+  (q15_t)0x7255, (q15_t)0xc674, (q15_t)0x7227, (q15_t)0xc61a, (q15_t)0x71fa, (q15_t)0xc5c0, (q15_t)0x71cc, (q15_t)0xc567,
+  (q15_t)0x719e, (q15_t)0xc50e, (q15_t)0x716f, (q15_t)0xc4b4, (q15_t)0x7141, (q15_t)0xc45b, (q15_t)0x7112, (q15_t)0xc403,
+  (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x70b3, (q15_t)0xc351, (q15_t)0x7083, (q15_t)0xc2f9, (q15_t)0x7053, (q15_t)0xc2a0,
+  (q15_t)0x7023, (q15_t)0xc248, (q15_t)0x6ff2, (q15_t)0xc1f0, (q15_t)0x6fc1, (q15_t)0xc198, (q15_t)0x6f90, (q15_t)0xc141,
+  (q15_t)0x6f5f, (q15_t)0xc0e9, (q15_t)0x6f2d, (q15_t)0xc092, (q15_t)0x6efb, (q15_t)0xc03b, (q15_t)0x6ec9, (q15_t)0xbfe3,
+  (q15_t)0x6e96, (q15_t)0xbf8d, (q15_t)0x6e63, (q15_t)0xbf36, (q15_t)0x6e30, (q15_t)0xbedf, (q15_t)0x6dfd, (q15_t)0xbe89,
+  (q15_t)0x6dca, (q15_t)0xbe32, (q15_t)0x6d96, (q15_t)0xbddc, (q15_t)0x6d62, (q15_t)0xbd86, (q15_t)0x6d2d, (q15_t)0xbd30,
+  (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6cc4, (q15_t)0xbc85, (q15_t)0x6c8f, (q15_t)0xbc30, (q15_t)0x6c59, (q15_t)0xbbdb,
+  (q15_t)0x6c24, (q15_t)0xbb86, (q15_t)0x6bee, (q15_t)0xbb31, (q15_t)0x6bb8, (q15_t)0xbadc, (q15_t)0x6b81, (q15_t)0xba88,
+  (q15_t)0x6b4a, (q15_t)0xba33, (q15_t)0x6b13, (q15_t)0xb9df, (q15_t)0x6adc, (q15_t)0xb98b, (q15_t)0x6aa5, (q15_t)0xb937,
+  (q15_t)0x6a6d, (q15_t)0xb8e4, (q15_t)0x6a35, (q15_t)0xb890, (q15_t)0x69fd, (q15_t)0xb83d, (q15_t)0x69c4, (q15_t)0xb7ea,
+  (q15_t)0x698c, (q15_t)0xb797, (q15_t)0x6953, (q15_t)0xb744, (q15_t)0x6919, (q15_t)0xb6f1, (q15_t)0x68e0, (q15_t)0xb69f,
+  (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x686c, (q15_t)0xb5fa, (q15_t)0x6832, (q15_t)0xb5a8, (q15_t)0x67f7, (q15_t)0xb557,
+  (q15_t)0x67bd, (q15_t)0xb505, (q15_t)0x6782, (q15_t)0xb4b4, (q15_t)0x6746, (q15_t)0xb462, (q15_t)0x670b, (q15_t)0xb411,
+  (q15_t)0x66cf, (q15_t)0xb3c1, (q15_t)0x6693, (q15_t)0xb370, (q15_t)0x6657, (q15_t)0xb31f, (q15_t)0x661a, (q15_t)0xb2cf,
+  (q15_t)0x65dd, (q15_t)0xb27f, (q15_t)0x65a0, (q15_t)0xb22f, (q15_t)0x6563, (q15_t)0xb1df, (q15_t)0x6526, (q15_t)0xb190,
+  (q15_t)0x64e8, (q15_t)0xb141, (q15_t)0x64aa, (q15_t)0xb0f1, (q15_t)0x646c, (q15_t)0xb0a2, (q15_t)0x642d, (q15_t)0xb054,
+  (q15_t)0x63ef, (q15_t)0xb005, (q15_t)0x63b0, (q15_t)0xafb7, (q15_t)0x6371, (q15_t)0xaf69, (q15_t)0x6331, (q15_t)0xaf1b,
+  (q15_t)0x62f2, (q15_t)0xaecd, (q15_t)0x62b2, (q15_t)0xae7f, (q15_t)0x6271, (q15_t)0xae32, (q15_t)0x6231, (q15_t)0xade4,
+  (q15_t)0x61f1, (q15_t)0xad97, (q15_t)0x61b0, (q15_t)0xad4b, (q15_t)0x616f, (q15_t)0xacfe, (q15_t)0x612d, (q15_t)0xacb2,
+  (q15_t)0x60ec, (q15_t)0xac65, (q15_t)0x60aa, (q15_t)0xac19, (q15_t)0x6068, (q15_t)0xabcd, (q15_t)0x6026, (q15_t)0xab82,
+  (q15_t)0x5fe3, (q15_t)0xab36, (q15_t)0x5fa0, (q15_t)0xaaeb, (q15_t)0x5f5e, (q15_t)0xaaa0, (q15_t)0x5f1a, (q15_t)0xaa55,
+  (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5e93, (q15_t)0xa9c0, (q15_t)0x5e50, (q15_t)0xa976, (q15_t)0x5e0b, (q15_t)0xa92c,
+  (q15_t)0x5dc7, (q15_t)0xa8e3, (q15_t)0x5d83, (q15_t)0xa899, (q15_t)0x5d3e, (q15_t)0xa850, (q15_t)0x5cf9, (q15_t)0xa807,
+  (q15_t)0x5cb4, (q15_t)0xa7be, (q15_t)0x5c6e, (q15_t)0xa775, (q15_t)0x5c29, (q15_t)0xa72c, (q15_t)0x5be3, (q15_t)0xa6e4,
+  (q15_t)0x5b9d, (q15_t)0xa69c, (q15_t)0x5b56, (q15_t)0xa654, (q15_t)0x5b10, (q15_t)0xa60d, (q15_t)0x5ac9, (q15_t)0xa5c5,
+  (q15_t)0x5a82, (q15_t)0xa57e, (q15_t)0x5a3b, (q15_t)0xa537, (q15_t)0x59f3, (q15_t)0xa4f0, (q15_t)0x59ac, (q15_t)0xa4aa,
+  (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x591c, (q15_t)0xa41d, (q15_t)0x58d4, (q15_t)0xa3d7, (q15_t)0x588b, (q15_t)0xa392,
+  (q15_t)0x5842, (q15_t)0xa34c, (q15_t)0x57f9, (q15_t)0xa307, (q15_t)0x57b0, (q15_t)0xa2c2, (q15_t)0x5767, (q15_t)0xa27d,
+  (q15_t)0x571d, (q15_t)0xa239, (q15_t)0x56d4, (q15_t)0xa1f5, (q15_t)0x568a, (q15_t)0xa1b0, (q15_t)0x5640, (q15_t)0xa16d,
+  (q15_t)0x55f5, (q15_t)0xa129, (q15_t)0x55ab, (q15_t)0xa0e6, (q15_t)0x5560, (q15_t)0xa0a2, (q15_t)0x5515, (q15_t)0xa060,
+  (q15_t)0x54ca, (q15_t)0xa01d, (q15_t)0x547e, (q15_t)0x9fda, (q15_t)0x5433, (q15_t)0x9f98, (q15_t)0x53e7, (q15_t)0x9f56,
+  (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x534e, (q15_t)0x9ed3, (q15_t)0x5302, (q15_t)0x9e91, (q15_t)0x52b5, (q15_t)0x9e50,
+  (q15_t)0x5269, (q15_t)0x9e0f, (q15_t)0x521c, (q15_t)0x9dcf, (q15_t)0x51ce, (q15_t)0x9d8f, (q15_t)0x5181, (q15_t)0x9d4e,
+  (q15_t)0x5133, (q15_t)0x9d0e, (q15_t)0x50e5, (q15_t)0x9ccf, (q15_t)0x5097, (q15_t)0x9c8f, (q15_t)0x5049, (q15_t)0x9c50,
+  (q15_t)0x4ffb, (q15_t)0x9c11, (q15_t)0x4fac, (q15_t)0x9bd3, (q15_t)0x4f5e, (q15_t)0x9b94, (q15_t)0x4f0f, (q15_t)0x9b56,
+  (q15_t)0x4ebf, (q15_t)0x9b18, (q15_t)0x4e70, (q15_t)0x9ada, (q15_t)0x4e21, (q15_t)0x9a9d, (q15_t)0x4dd1, (q15_t)0x9a60,
+  (q15_t)0x4d81, (q15_t)0x9a23, (q15_t)0x4d31, (q15_t)0x99e6, (q15_t)0x4ce1, (q15_t)0x99a9, (q15_t)0x4c90, (q15_t)0x996d,
+  (q15_t)0x4c3f, (q15_t)0x9931, (q15_t)0x4bef, (q15_t)0x98f5, (q15_t)0x4b9e, (q15_t)0x98ba, (q15_t)0x4b4c, (q15_t)0x987e,
+  (q15_t)0x4afb, (q15_t)0x9843, (q15_t)0x4aa9, (q15_t)0x9809, (q15_t)0x4a58, (q15_t)0x97ce, (q15_t)0x4a06, (q15_t)0x9794,
+  (q15_t)0x49b4, (q15_t)0x975a, (q15_t)0x4961, (q15_t)0x9720, (q15_t)0x490f, (q15_t)0x96e7, (q15_t)0x48bc, (q15_t)0x96ad,
+  (q15_t)0x4869, (q15_t)0x9674, (q15_t)0x4816, (q15_t)0x963c, (q15_t)0x47c3, (q15_t)0x9603, (q15_t)0x4770, (q15_t)0x95cb,
+  (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x46c9, (q15_t)0x955b, (q15_t)0x4675, (q15_t)0x9524, (q15_t)0x4621, (q15_t)0x94ed,
+  (q15_t)0x45cd, (q15_t)0x94b6, (q15_t)0x4578, (q15_t)0x947f, (q15_t)0x4524, (q15_t)0x9448, (q15_t)0x44cf, (q15_t)0x9412,
+  (q15_t)0x447a, (q15_t)0x93dc, (q15_t)0x4425, (q15_t)0x93a7, (q15_t)0x43d0, (q15_t)0x9371, (q15_t)0x437b, (q15_t)0x933c,
+  (q15_t)0x4325, (q15_t)0x9307, (q15_t)0x42d0, (q15_t)0x92d3, (q15_t)0x427a, (q15_t)0x929e, (q15_t)0x4224, (q15_t)0x926a,
+  (q15_t)0x41ce, (q15_t)0x9236, (q15_t)0x4177, (q15_t)0x9203, (q15_t)0x4121, (q15_t)0x91d0, (q15_t)0x40ca, (q15_t)0x919d,
+  (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x401d, (q15_t)0x9137, (q15_t)0x3fc5, (q15_t)0x9105, (q15_t)0x3f6e, (q15_t)0x90d3,
+  (q15_t)0x3f17, (q15_t)0x90a1, (q15_t)0x3ebf, (q15_t)0x9070, (q15_t)0x3e68, (q15_t)0x903f, (q15_t)0x3e10, (q15_t)0x900e,
+  (q15_t)0x3db8, (q15_t)0x8fdd, (q15_t)0x3d60, (q15_t)0x8fad, (q15_t)0x3d07, (q15_t)0x8f7d, (q15_t)0x3caf, (q15_t)0x8f4d,
+  (q15_t)0x3c56, (q15_t)0x8f1e, (q15_t)0x3bfd, (q15_t)0x8eee, (q15_t)0x3ba5, (q15_t)0x8ebf, (q15_t)0x3b4c, (q15_t)0x8e91,
+  (q15_t)0x3af2, (q15_t)0x8e62, (q15_t)0x3a99, (q15_t)0x8e34, (q15_t)0x3a40, (q15_t)0x8e06, (q15_t)0x39e6, (q15_t)0x8dd9,
+  (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3932, (q15_t)0x8d7e, (q15_t)0x38d8, (q15_t)0x8d51, (q15_t)0x387e, (q15_t)0x8d25,
+  (q15_t)0x3824, (q15_t)0x8cf9, (q15_t)0x37ca, (q15_t)0x8ccd, (q15_t)0x376f, (q15_t)0x8ca1, (q15_t)0x3714, (q15_t)0x8c76,
+  (q15_t)0x36ba, (q15_t)0x8c4b, (q15_t)0x365f, (q15_t)0x8c20, (q15_t)0x3604, (q15_t)0x8bf5, (q15_t)0x35a8, (q15_t)0x8bcb,
+  (q15_t)0x354d, (q15_t)0x8ba1, (q15_t)0x34f2, (q15_t)0x8b77, (q15_t)0x3496, (q15_t)0x8b4e, (q15_t)0x343a, (q15_t)0x8b25,
+  (q15_t)0x33de, (q15_t)0x8afc, (q15_t)0x3382, (q15_t)0x8ad3, (q15_t)0x3326, (q15_t)0x8aab, (q15_t)0x32ca, (q15_t)0x8a83,
+  (q15_t)0x326e, (q15_t)0x8a5b, (q15_t)0x3211, (q15_t)0x8a34, (q15_t)0x31b5, (q15_t)0x8a0c, (q15_t)0x3158, (q15_t)0x89e5,
+  (q15_t)0x30fb, (q15_t)0x89bf, (q15_t)0x309e, (q15_t)0x8998, (q15_t)0x3041, (q15_t)0x8972, (q15_t)0x2fe4, (q15_t)0x894d,
+  (q15_t)0x2f87, (q15_t)0x8927, (q15_t)0x2f29, (q15_t)0x8902, (q15_t)0x2ecc, (q15_t)0x88dd, (q15_t)0x2e6e, (q15_t)0x88b9,
+  (q15_t)0x2e11, (q15_t)0x8894, (q15_t)0x2db3, (q15_t)0x8870, (q15_t)0x2d55, (q15_t)0x884c, (q15_t)0x2cf7, (q15_t)0x8829,
+  (q15_t)0x2c98, (q15_t)0x8806, (q15_t)0x2c3a, (q15_t)0x87e3, (q15_t)0x2bdc, (q15_t)0x87c0, (q15_t)0x2b7d, (q15_t)0x879e,
+  (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x2ac0, (q15_t)0x875a, (q15_t)0x2a61, (q15_t)0x8739, (q15_t)0x2a02, (q15_t)0x8718,
+  (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x2944, (q15_t)0x86d6, (q15_t)0x28e5, (q15_t)0x86b6, (q15_t)0x2886, (q15_t)0x8696,
+  (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x27c7, (q15_t)0x8657, (q15_t)0x2767, (q15_t)0x8638, (q15_t)0x2707, (q15_t)0x8619,
+  (q15_t)0x26a8, (q15_t)0x85fb, (q15_t)0x2648, (q15_t)0x85dc, (q15_t)0x25e8, (q15_t)0x85be, (q15_t)0x2588, (q15_t)0x85a1,
+  (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x24c7, (q15_t)0x8566, (q15_t)0x2467, (q15_t)0x854a, (q15_t)0x2407, (q15_t)0x852d,
+  (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x2345, (q15_t)0x84f5, (q15_t)0x22e5, (q15_t)0x84da, (q15_t)0x2284, (q15_t)0x84be,
+  (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x21c2, (q15_t)0x8489, (q15_t)0x2161, (q15_t)0x846e, (q15_t)0x2100, (q15_t)0x8454,
+  (q15_t)0x209f, (q15_t)0x843b, (q15_t)0x203e, (q15_t)0x8421, (q15_t)0x1fdc, (q15_t)0x8408, (q15_t)0x1f7b, (q15_t)0x83ef,
+  (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1eb8, (q15_t)0x83be, (q15_t)0x1e56, (q15_t)0x83a6, (q15_t)0x1df5, (q15_t)0x838f,
+  (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1d31, (q15_t)0x8360, (q15_t)0x1ccf, (q15_t)0x8349, (q15_t)0x1c6d, (q15_t)0x8333,
+  (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1ba9, (q15_t)0x8307, (q15_t)0x1b47, (q15_t)0x82f1, (q15_t)0x1ae4, (q15_t)0x82dc,
+  (q15_t)0x1a82, (q15_t)0x82c7, (q15_t)0x1a20, (q15_t)0x82b2, (q15_t)0x19bd, (q15_t)0x829e, (q15_t)0x195b, (q15_t)0x828a,
+  (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x1896, (q15_t)0x8263, (q15_t)0x1833, (q15_t)0x8250, (q15_t)0x17d0, (q15_t)0x823d,
+  (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x170a, (q15_t)0x8218, (q15_t)0x16a8, (q15_t)0x8206, (q15_t)0x1645, (q15_t)0x81f4,
+  (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x157f, (q15_t)0x81d2, (q15_t)0x151b, (q15_t)0x81c1, (q15_t)0x14b8, (q15_t)0x81b1,
+  (q15_t)0x1455, (q15_t)0x81a1, (q15_t)0x13f2, (q15_t)0x8191, (q15_t)0x138e, (q15_t)0x8181, (q15_t)0x132b, (q15_t)0x8172,
+  (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x1264, (q15_t)0x8155, (q15_t)0x1201, (q15_t)0x8146, (q15_t)0x119d, (q15_t)0x8138,
+  (q15_t)0x1139, (q15_t)0x812b, (q15_t)0x10d6, (q15_t)0x811d, (q15_t)0x1072, (q15_t)0x8110, (q15_t)0x100e, (q15_t)0x8103,
+  (q15_t)0xfab, (q15_t)0x80f7, (q15_t)0xf47, (q15_t)0x80eb, (q15_t)0xee3, (q15_t)0x80df, (q15_t)0xe7f, (q15_t)0x80d3,
+  (q15_t)0xe1b, (q15_t)0x80c8, (q15_t)0xdb7, (q15_t)0x80bd, (q15_t)0xd53, (q15_t)0x80b3, (q15_t)0xcef, (q15_t)0x80a8,
+  (q15_t)0xc8b, (q15_t)0x809e, (q15_t)0xc27, (q15_t)0x8095, (q15_t)0xbc3, (q15_t)0x808b, (q15_t)0xb5f, (q15_t)0x8082,
+  (q15_t)0xafb, (q15_t)0x8079, (q15_t)0xa97, (q15_t)0x8071, (q15_t)0xa33, (q15_t)0x8069, (q15_t)0x9ce, (q15_t)0x8061,
+  (q15_t)0x96a, (q15_t)0x8059, (q15_t)0x906, (q15_t)0x8052, (q15_t)0x8a2, (q15_t)0x804b, (q15_t)0x83d, (q15_t)0x8044,
+  (q15_t)0x7d9, (q15_t)0x803e, (q15_t)0x775, (q15_t)0x8038, (q15_t)0x710, (q15_t)0x8032, (q15_t)0x6ac, (q15_t)0x802d,
+  (q15_t)0x647, (q15_t)0x8028, (q15_t)0x5e3, (q15_t)0x8023, (q15_t)0x57f, (q15_t)0x801f, (q15_t)0x51a, (q15_t)0x801b,
+  (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x451, (q15_t)0x8013, (q15_t)0x3ed, (q15_t)0x8010, (q15_t)0x388, (q15_t)0x800d,
+  (q15_t)0x324, (q15_t)0x800a, (q15_t)0x2bf, (q15_t)0x8008, (q15_t)0x25b, (q15_t)0x8006, (q15_t)0x1f6, (q15_t)0x8004,
+  (q15_t)0x192, (q15_t)0x8003, (q15_t)0x12d, (q15_t)0x8002, (q15_t)0xc9, (q15_t)0x8001, (q15_t)0x64, (q15_t)0x8001
+};
+
+    const q15_t __ALIGNED(4) cos_factorsQ15_512[512] = {
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7ffe, (q15_t)0x7ffc, (q15_t)0x7ffb, (q15_t)0x7ff9, (q15_t)0x7ff7,
+  (q15_t)0x7ff4, (q15_t)0x7ff2, (q15_t)0x7fee, (q15_t)0x7feb, (q15_t)0x7fe7, (q15_t)0x7fe3, (q15_t)0x7fdf, (q15_t)0x7fda,
+  (q15_t)0x7fd6, (q15_t)0x7fd0, (q15_t)0x7fcb, (q15_t)0x7fc5, (q15_t)0x7fbf, (q15_t)0x7fb8, (q15_t)0x7fb1, (q15_t)0x7faa,
+  (q15_t)0x7fa3, (q15_t)0x7f9b, (q15_t)0x7f93, (q15_t)0x7f8b, (q15_t)0x7f82, (q15_t)0x7f79, (q15_t)0x7f70, (q15_t)0x7f67,
+  (q15_t)0x7f5d, (q15_t)0x7f53, (q15_t)0x7f48, (q15_t)0x7f3d, (q15_t)0x7f32, (q15_t)0x7f27, (q15_t)0x7f1b, (q15_t)0x7f0f,
+  (q15_t)0x7f03, (q15_t)0x7ef6, (q15_t)0x7ee9, (q15_t)0x7edc, (q15_t)0x7ecf, (q15_t)0x7ec1, (q15_t)0x7eb3, (q15_t)0x7ea4,
+  (q15_t)0x7e95, (q15_t)0x7e86, (q15_t)0x7e77, (q15_t)0x7e67, (q15_t)0x7e57, (q15_t)0x7e47, (q15_t)0x7e37, (q15_t)0x7e26,
+  (q15_t)0x7e14, (q15_t)0x7e03, (q15_t)0x7df1, (q15_t)0x7ddf, (q15_t)0x7dcd, (q15_t)0x7dba, (q15_t)0x7da7, (q15_t)0x7d94,
+  (q15_t)0x7d80, (q15_t)0x7d6c, (q15_t)0x7d58, (q15_t)0x7d43, (q15_t)0x7d2f, (q15_t)0x7d19, (q15_t)0x7d04, (q15_t)0x7cee,
+  (q15_t)0x7cd8, (q15_t)0x7cc2, (q15_t)0x7cab, (q15_t)0x7c94, (q15_t)0x7c7d, (q15_t)0x7c66, (q15_t)0x7c4e, (q15_t)0x7c36,
+  (q15_t)0x7c1d, (q15_t)0x7c05, (q15_t)0x7beb, (q15_t)0x7bd2, (q15_t)0x7bb9, (q15_t)0x7b9f, (q15_t)0x7b84, (q15_t)0x7b6a,
+  (q15_t)0x7b4f, (q15_t)0x7b34, (q15_t)0x7b19, (q15_t)0x7afd, (q15_t)0x7ae1, (q15_t)0x7ac5, (q15_t)0x7aa8, (q15_t)0x7a8b,
+  (q15_t)0x7a6e, (q15_t)0x7a50, (q15_t)0x7a33, (q15_t)0x7a15, (q15_t)0x79f6, (q15_t)0x79d8, (q15_t)0x79b9, (q15_t)0x7999,
+  (q15_t)0x797a, (q15_t)0x795a, (q15_t)0x793a, (q15_t)0x7919, (q15_t)0x78f9, (q15_t)0x78d8, (q15_t)0x78b6, (q15_t)0x7895,
+  (q15_t)0x7873, (q15_t)0x7851, (q15_t)0x782e, (q15_t)0x780c, (q15_t)0x77e9, (q15_t)0x77c5, (q15_t)0x77a2, (q15_t)0x777e,
+  (q15_t)0x775a, (q15_t)0x7735, (q15_t)0x7710, (q15_t)0x76eb, (q15_t)0x76c6, (q15_t)0x76a0, (q15_t)0x767b, (q15_t)0x7654,
+  (q15_t)0x762e, (q15_t)0x7607, (q15_t)0x75e0, (q15_t)0x75b9, (q15_t)0x7591, (q15_t)0x7569, (q15_t)0x7541, (q15_t)0x7519,
+  (q15_t)0x74f0, (q15_t)0x74c7, (q15_t)0x749e, (q15_t)0x7474, (q15_t)0x744a, (q15_t)0x7420, (q15_t)0x73f6, (q15_t)0x73cb,
+  (q15_t)0x73a0, (q15_t)0x7375, (q15_t)0x7349, (q15_t)0x731d, (q15_t)0x72f1, (q15_t)0x72c5, (q15_t)0x7298, (q15_t)0x726b,
+  (q15_t)0x723e, (q15_t)0x7211, (q15_t)0x71e3, (q15_t)0x71b5, (q15_t)0x7186, (q15_t)0x7158, (q15_t)0x7129, (q15_t)0x70fa,
+  (q15_t)0x70cb, (q15_t)0x709b, (q15_t)0x706b, (q15_t)0x703b, (q15_t)0x700a, (q15_t)0x6fda, (q15_t)0x6fa9, (q15_t)0x6f77,
+  (q15_t)0x6f46, (q15_t)0x6f14, (q15_t)0x6ee2, (q15_t)0x6eaf, (q15_t)0x6e7d, (q15_t)0x6e4a, (q15_t)0x6e17, (q15_t)0x6de3,
+  (q15_t)0x6db0, (q15_t)0x6d7c, (q15_t)0x6d48, (q15_t)0x6d13, (q15_t)0x6cde, (q15_t)0x6ca9, (q15_t)0x6c74, (q15_t)0x6c3f,
+  (q15_t)0x6c09, (q15_t)0x6bd3, (q15_t)0x6b9c, (q15_t)0x6b66, (q15_t)0x6b2f, (q15_t)0x6af8, (q15_t)0x6ac1, (q15_t)0x6a89,
+  (q15_t)0x6a51, (q15_t)0x6a19, (q15_t)0x69e1, (q15_t)0x69a8, (q15_t)0x696f, (q15_t)0x6936, (q15_t)0x68fd, (q15_t)0x68c3,
+  (q15_t)0x6889, (q15_t)0x684f, (q15_t)0x6815, (q15_t)0x67da, (q15_t)0x679f, (q15_t)0x6764, (q15_t)0x6729, (q15_t)0x66ed,
+  (q15_t)0x66b1, (q15_t)0x6675, (q15_t)0x6639, (q15_t)0x65fc, (q15_t)0x65bf, (q15_t)0x6582, (q15_t)0x6545, (q15_t)0x6507,
+  (q15_t)0x64c9, (q15_t)0x648b, (q15_t)0x644d, (q15_t)0x640e, (q15_t)0x63cf, (q15_t)0x6390, (q15_t)0x6351, (q15_t)0x6311,
+  (q15_t)0x62d2, (q15_t)0x6292, (q15_t)0x6251, (q15_t)0x6211, (q15_t)0x61d0, (q15_t)0x618f, (q15_t)0x614e, (q15_t)0x610d,
+  (q15_t)0x60cb, (q15_t)0x6089, (q15_t)0x6047, (q15_t)0x6004, (q15_t)0x5fc2, (q15_t)0x5f7f, (q15_t)0x5f3c, (q15_t)0x5ef9,
+  (q15_t)0x5eb5, (q15_t)0x5e71, (q15_t)0x5e2d, (q15_t)0x5de9, (q15_t)0x5da5, (q15_t)0x5d60, (q15_t)0x5d1b, (q15_t)0x5cd6,
+  (q15_t)0x5c91, (q15_t)0x5c4b, (q15_t)0x5c06, (q15_t)0x5bc0, (q15_t)0x5b79, (q15_t)0x5b33, (q15_t)0x5aec, (q15_t)0x5aa5,
+  (q15_t)0x5a5e, (q15_t)0x5a17, (q15_t)0x59d0, (q15_t)0x5988, (q15_t)0x5940, (q15_t)0x58f8, (q15_t)0x58af, (q15_t)0x5867,
+  (q15_t)0x581e, (q15_t)0x57d5, (q15_t)0x578c, (q15_t)0x5742, (q15_t)0x56f9, (q15_t)0x56af, (q15_t)0x5665, (q15_t)0x561a,
+  (q15_t)0x55d0, (q15_t)0x5585, (q15_t)0x553a, (q15_t)0x54ef, (q15_t)0x54a4, (q15_t)0x5458, (q15_t)0x540d, (q15_t)0x53c1,
+  (q15_t)0x5375, (q15_t)0x5328, (q15_t)0x52dc, (q15_t)0x528f, (q15_t)0x5242, (q15_t)0x51f5, (q15_t)0x51a8, (q15_t)0x515a,
+  (q15_t)0x510c, (q15_t)0x50bf, (q15_t)0x5070, (q15_t)0x5022, (q15_t)0x4fd4, (q15_t)0x4f85, (q15_t)0x4f36, (q15_t)0x4ee7,
+  (q15_t)0x4e98, (q15_t)0x4e48, (q15_t)0x4df9, (q15_t)0x4da9, (q15_t)0x4d59, (q15_t)0x4d09, (q15_t)0x4cb8, (q15_t)0x4c68,
+  (q15_t)0x4c17, (q15_t)0x4bc6, (q15_t)0x4b75, (q15_t)0x4b24, (q15_t)0x4ad2, (q15_t)0x4a81, (q15_t)0x4a2f, (q15_t)0x49dd,
+  (q15_t)0x498a, (q15_t)0x4938, (q15_t)0x48e6, (q15_t)0x4893, (q15_t)0x4840, (q15_t)0x47ed, (q15_t)0x479a, (q15_t)0x4746,
+  (q15_t)0x46f3, (q15_t)0x469f, (q15_t)0x464b, (q15_t)0x45f7, (q15_t)0x45a3, (q15_t)0x454e, (q15_t)0x44fa, (q15_t)0x44a5,
+  (q15_t)0x4450, (q15_t)0x43fb, (q15_t)0x43a5, (q15_t)0x4350, (q15_t)0x42fa, (q15_t)0x42a5, (q15_t)0x424f, (q15_t)0x41f9,
+  (q15_t)0x41a2, (q15_t)0x414c, (q15_t)0x40f6, (q15_t)0x409f, (q15_t)0x4048, (q15_t)0x3ff1, (q15_t)0x3f9a, (q15_t)0x3f43,
+  (q15_t)0x3eeb, (q15_t)0x3e93, (q15_t)0x3e3c, (q15_t)0x3de4, (q15_t)0x3d8c, (q15_t)0x3d33, (q15_t)0x3cdb, (q15_t)0x3c83,
+  (q15_t)0x3c2a, (q15_t)0x3bd1, (q15_t)0x3b78, (q15_t)0x3b1f, (q15_t)0x3ac6, (q15_t)0x3a6c, (q15_t)0x3a13, (q15_t)0x39b9,
+  (q15_t)0x395f, (q15_t)0x3906, (q15_t)0x38ab, (q15_t)0x3851, (q15_t)0x37f7, (q15_t)0x379c, (q15_t)0x3742, (q15_t)0x36e7,
+  (q15_t)0x368c, (q15_t)0x3631, (q15_t)0x35d6, (q15_t)0x357b, (q15_t)0x351f, (q15_t)0x34c4, (q15_t)0x3468, (q15_t)0x340c,
+  (q15_t)0x33b0, (q15_t)0x3354, (q15_t)0x32f8, (q15_t)0x329c, (q15_t)0x3240, (q15_t)0x31e3, (q15_t)0x3186, (q15_t)0x312a,
+  (q15_t)0x30cd, (q15_t)0x3070, (q15_t)0x3013, (q15_t)0x2fb5, (q15_t)0x2f58, (q15_t)0x2efb, (q15_t)0x2e9d, (q15_t)0x2e3f,
+  (q15_t)0x2de2, (q15_t)0x2d84, (q15_t)0x2d26, (q15_t)0x2cc8, (q15_t)0x2c69, (q15_t)0x2c0b, (q15_t)0x2bad, (q15_t)0x2b4e,
+  (q15_t)0x2aef, (q15_t)0x2a91, (q15_t)0x2a32, (q15_t)0x29d3, (q15_t)0x2974, (q15_t)0x2915, (q15_t)0x28b5, (q15_t)0x2856,
+  (q15_t)0x27f6, (q15_t)0x2797, (q15_t)0x2737, (q15_t)0x26d8, (q15_t)0x2678, (q15_t)0x2618, (q15_t)0x25b8, (q15_t)0x2558,
+  (q15_t)0x24f7, (q15_t)0x2497, (q15_t)0x2437, (q15_t)0x23d6, (q15_t)0x2376, (q15_t)0x2315, (q15_t)0x22b4, (q15_t)0x2254,
+  (q15_t)0x21f3, (q15_t)0x2192, (q15_t)0x2131, (q15_t)0x20d0, (q15_t)0x206e, (q15_t)0x200d, (q15_t)0x1fac, (q15_t)0x1f4a,
+  (q15_t)0x1ee9, (q15_t)0x1e87, (q15_t)0x1e25, (q15_t)0x1dc4, (q15_t)0x1d62, (q15_t)0x1d00, (q15_t)0x1c9e, (q15_t)0x1c3c,
+  (q15_t)0x1bda, (q15_t)0x1b78, (q15_t)0x1b16, (q15_t)0x1ab3, (q15_t)0x1a51, (q15_t)0x19ef, (q15_t)0x198c, (q15_t)0x192a,
+  (q15_t)0x18c7, (q15_t)0x1864, (q15_t)0x1802, (q15_t)0x179f, (q15_t)0x173c, (q15_t)0x16d9, (q15_t)0x1676, (q15_t)0x1613,
+  (q15_t)0x15b0, (q15_t)0x154d, (q15_t)0x14ea, (q15_t)0x1487, (q15_t)0x1423, (q15_t)0x13c0, (q15_t)0x135d, (q15_t)0x12f9,
+  (q15_t)0x1296, (q15_t)0x1232, (q15_t)0x11cf, (q15_t)0x116b, (q15_t)0x1108, (q15_t)0x10a4, (q15_t)0x1040, (q15_t)0xfdd,
+  (q15_t)0xf79, (q15_t)0xf15, (q15_t)0xeb1, (q15_t)0xe4d, (q15_t)0xde9, (q15_t)0xd85, (q15_t)0xd21, (q15_t)0xcbd,
+  (q15_t)0xc59, (q15_t)0xbf5, (q15_t)0xb91, (q15_t)0xb2d, (q15_t)0xac9, (q15_t)0xa65, (q15_t)0xa00, (q15_t)0x99c,
+  (q15_t)0x938, (q15_t)0x8d4, (q15_t)0x86f, (q15_t)0x80b, (q15_t)0x7a7, (q15_t)0x742, (q15_t)0x6de, (q15_t)0x67a,
+  (q15_t)0x615, (q15_t)0x5b1, (q15_t)0x54c, (q15_t)0x4e8, (q15_t)0x483, (q15_t)0x41f, (q15_t)0x3ba, (q15_t)0x356,
+  (q15_t)0x2f1, (q15_t)0x28d, (q15_t)0x228, (q15_t)0x1c4, (q15_t)0x15f, (q15_t)0xfb, (q15_t)0x96, (q15_t)0x32
+};
+
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_2048)
+    const q15_t __ALIGNED(4) WeightsQ15_2048[4096] = {
+  (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xffe7, (q15_t)0x7fff, (q15_t)0xffce, (q15_t)0x7fff, (q15_t)0xffb5,
+  (q15_t)0x7fff, (q15_t)0xff9c, (q15_t)0x7fff, (q15_t)0xff83, (q15_t)0x7fff, (q15_t)0xff6a, (q15_t)0x7fff, (q15_t)0xff51,
+  (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7fff, (q15_t)0xff1e, (q15_t)0x7fff, (q15_t)0xff05, (q15_t)0x7ffe, (q15_t)0xfeec,
+  (q15_t)0x7ffe, (q15_t)0xfed3, (q15_t)0x7ffe, (q15_t)0xfeba, (q15_t)0x7ffe, (q15_t)0xfea1, (q15_t)0x7ffd, (q15_t)0xfe88,
+  (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ffd, (q15_t)0xfe55, (q15_t)0x7ffc, (q15_t)0xfe3c, (q15_t)0x7ffc, (q15_t)0xfe23,
+  (q15_t)0x7ffc, (q15_t)0xfe0a, (q15_t)0x7ffb, (q15_t)0xfdf1, (q15_t)0x7ffb, (q15_t)0xfdd8, (q15_t)0x7ffa, (q15_t)0xfdbe,
+  (q15_t)0x7ffa, (q15_t)0xfda5, (q15_t)0x7ff9, (q15_t)0xfd8c, (q15_t)0x7ff9, (q15_t)0xfd73, (q15_t)0x7ff8, (q15_t)0xfd5a,
+  (q15_t)0x7ff8, (q15_t)0xfd41, (q15_t)0x7ff7, (q15_t)0xfd28, (q15_t)0x7ff7, (q15_t)0xfd0f, (q15_t)0x7ff6, (q15_t)0xfcf5,
+  (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7ff5, (q15_t)0xfcc3, (q15_t)0x7ff4, (q15_t)0xfcaa, (q15_t)0x7ff4, (q15_t)0xfc91,
+  (q15_t)0x7ff3, (q15_t)0xfc78, (q15_t)0x7ff2, (q15_t)0xfc5f, (q15_t)0x7ff2, (q15_t)0xfc46, (q15_t)0x7ff1, (q15_t)0xfc2c,
+  (q15_t)0x7ff0, (q15_t)0xfc13, (q15_t)0x7fef, (q15_t)0xfbfa, (q15_t)0x7fee, (q15_t)0xfbe1, (q15_t)0x7fee, (q15_t)0xfbc8,
+  (q15_t)0x7fed, (q15_t)0xfbaf, (q15_t)0x7fec, (q15_t)0xfb96, (q15_t)0x7feb, (q15_t)0xfb7d, (q15_t)0x7fea, (q15_t)0xfb64,
+  (q15_t)0x7fe9, (q15_t)0xfb4a, (q15_t)0x7fe8, (q15_t)0xfb31, (q15_t)0x7fe7, (q15_t)0xfb18, (q15_t)0x7fe6, (q15_t)0xfaff,
+  (q15_t)0x7fe5, (q15_t)0xfae6, (q15_t)0x7fe4, (q15_t)0xfacd, (q15_t)0x7fe3, (q15_t)0xfab4, (q15_t)0x7fe2, (q15_t)0xfa9b,
+  (q15_t)0x7fe1, (q15_t)0xfa81, (q15_t)0x7fe0, (q15_t)0xfa68, (q15_t)0x7fdf, (q15_t)0xfa4f, (q15_t)0x7fde, (q15_t)0xfa36,
+  (q15_t)0x7fdd, (q15_t)0xfa1d, (q15_t)0x7fdc, (q15_t)0xfa04, (q15_t)0x7fda, (q15_t)0xf9eb, (q15_t)0x7fd9, (q15_t)0xf9d2,
+  (q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fd7, (q15_t)0xf9a0, (q15_t)0x7fd6, (q15_t)0xf986, (q15_t)0x7fd4, (q15_t)0xf96d,
+  (q15_t)0x7fd3, (q15_t)0xf954, (q15_t)0x7fd2, (q15_t)0xf93b, (q15_t)0x7fd0, (q15_t)0xf922, (q15_t)0x7fcf, (q15_t)0xf909,
+  (q15_t)0x7fce, (q15_t)0xf8f0, (q15_t)0x7fcc, (q15_t)0xf8d7, (q15_t)0x7fcb, (q15_t)0xf8be, (q15_t)0x7fc9, (q15_t)0xf8a5,
+  (q15_t)0x7fc8, (q15_t)0xf88b, (q15_t)0x7fc6, (q15_t)0xf872, (q15_t)0x7fc5, (q15_t)0xf859, (q15_t)0x7fc3, (q15_t)0xf840,
+  (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fc0, (q15_t)0xf80e, (q15_t)0x7fbf, (q15_t)0xf7f5, (q15_t)0x7fbd, (q15_t)0xf7dc,
+  (q15_t)0x7fbc, (q15_t)0xf7c3, (q15_t)0x7fba, (q15_t)0xf7aa, (q15_t)0x7fb8, (q15_t)0xf791, (q15_t)0x7fb7, (q15_t)0xf778,
+  (q15_t)0x7fb5, (q15_t)0xf75e, (q15_t)0x7fb3, (q15_t)0xf745, (q15_t)0x7fb1, (q15_t)0xf72c, (q15_t)0x7fb0, (q15_t)0xf713,
+  (q15_t)0x7fae, (q15_t)0xf6fa, (q15_t)0x7fac, (q15_t)0xf6e1, (q15_t)0x7faa, (q15_t)0xf6c8, (q15_t)0x7fa9, (q15_t)0xf6af,
+  (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7fa5, (q15_t)0xf67d, (q15_t)0x7fa3, (q15_t)0xf664, (q15_t)0x7fa1, (q15_t)0xf64b,
+  (q15_t)0x7f9f, (q15_t)0xf632, (q15_t)0x7f9d, (q15_t)0xf619, (q15_t)0x7f9b, (q15_t)0xf600, (q15_t)0x7f99, (q15_t)0xf5e7,
+  (q15_t)0x7f97, (q15_t)0xf5cd, (q15_t)0x7f95, (q15_t)0xf5b4, (q15_t)0x7f93, (q15_t)0xf59b, (q15_t)0x7f91, (q15_t)0xf582,
+  (q15_t)0x7f8f, (q15_t)0xf569, (q15_t)0x7f8d, (q15_t)0xf550, (q15_t)0x7f8b, (q15_t)0xf537, (q15_t)0x7f89, (q15_t)0xf51e,
+  (q15_t)0x7f87, (q15_t)0xf505, (q15_t)0x7f85, (q15_t)0xf4ec, (q15_t)0x7f82, (q15_t)0xf4d3, (q15_t)0x7f80, (q15_t)0xf4ba,
+  (q15_t)0x7f7e, (q15_t)0xf4a1, (q15_t)0x7f7c, (q15_t)0xf488, (q15_t)0x7f79, (q15_t)0xf46f, (q15_t)0x7f77, (q15_t)0xf456,
+  (q15_t)0x7f75, (q15_t)0xf43d, (q15_t)0x7f72, (q15_t)0xf424, (q15_t)0x7f70, (q15_t)0xf40b, (q15_t)0x7f6e, (q15_t)0xf3f2,
+  (q15_t)0x7f6b, (q15_t)0xf3d9, (q15_t)0x7f69, (q15_t)0xf3c0, (q15_t)0x7f67, (q15_t)0xf3a7, (q15_t)0x7f64, (q15_t)0xf38e,
+  (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f5f, (q15_t)0xf35c, (q15_t)0x7f5d, (q15_t)0xf343, (q15_t)0x7f5a, (q15_t)0xf32a,
+  (q15_t)0x7f58, (q15_t)0xf311, (q15_t)0x7f55, (q15_t)0xf2f8, (q15_t)0x7f53, (q15_t)0xf2df, (q15_t)0x7f50, (q15_t)0xf2c6,
+  (q15_t)0x7f4d, (q15_t)0xf2ad, (q15_t)0x7f4b, (q15_t)0xf294, (q15_t)0x7f48, (q15_t)0xf27b, (q15_t)0x7f45, (q15_t)0xf262,
+  (q15_t)0x7f43, (q15_t)0xf249, (q15_t)0x7f40, (q15_t)0xf230, (q15_t)0x7f3d, (q15_t)0xf217, (q15_t)0x7f3b, (q15_t)0xf1fe,
+  (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f35, (q15_t)0xf1cc, (q15_t)0x7f32, (q15_t)0xf1b3, (q15_t)0x7f2f, (q15_t)0xf19a,
+  (q15_t)0x7f2d, (q15_t)0xf181, (q15_t)0x7f2a, (q15_t)0xf168, (q15_t)0x7f27, (q15_t)0xf14f, (q15_t)0x7f24, (q15_t)0xf136,
+  (q15_t)0x7f21, (q15_t)0xf11d, (q15_t)0x7f1e, (q15_t)0xf104, (q15_t)0x7f1b, (q15_t)0xf0eb, (q15_t)0x7f18, (q15_t)0xf0d2,
+  (q15_t)0x7f15, (q15_t)0xf0b9, (q15_t)0x7f12, (q15_t)0xf0a0, (q15_t)0x7f0f, (q15_t)0xf087, (q15_t)0x7f0c, (q15_t)0xf06e,
+  (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7f06, (q15_t)0xf03c, (q15_t)0x7f03, (q15_t)0xf023, (q15_t)0x7f00, (q15_t)0xf00b,
+  (q15_t)0x7efd, (q15_t)0xeff2, (q15_t)0x7ef9, (q15_t)0xefd9, (q15_t)0x7ef6, (q15_t)0xefc0, (q15_t)0x7ef3, (q15_t)0xefa7,
+  (q15_t)0x7ef0, (q15_t)0xef8e, (q15_t)0x7eed, (q15_t)0xef75, (q15_t)0x7ee9, (q15_t)0xef5c, (q15_t)0x7ee6, (q15_t)0xef43,
+  (q15_t)0x7ee3, (q15_t)0xef2a, (q15_t)0x7edf, (q15_t)0xef11, (q15_t)0x7edc, (q15_t)0xeef8, (q15_t)0x7ed9, (q15_t)0xeedf,
+  (q15_t)0x7ed5, (q15_t)0xeec7, (q15_t)0x7ed2, (q15_t)0xeeae, (q15_t)0x7ecf, (q15_t)0xee95, (q15_t)0x7ecb, (q15_t)0xee7c,
+  (q15_t)0x7ec8, (q15_t)0xee63, (q15_t)0x7ec4, (q15_t)0xee4a, (q15_t)0x7ec1, (q15_t)0xee31, (q15_t)0x7ebd, (q15_t)0xee18,
+  (q15_t)0x7eba, (q15_t)0xedff, (q15_t)0x7eb6, (q15_t)0xede7, (q15_t)0x7eb3, (q15_t)0xedce, (q15_t)0x7eaf, (q15_t)0xedb5,
+  (q15_t)0x7eab, (q15_t)0xed9c, (q15_t)0x7ea8, (q15_t)0xed83, (q15_t)0x7ea4, (q15_t)0xed6a, (q15_t)0x7ea1, (q15_t)0xed51,
+  (q15_t)0x7e9d, (q15_t)0xed38, (q15_t)0x7e99, (q15_t)0xed20, (q15_t)0x7e95, (q15_t)0xed07, (q15_t)0x7e92, (q15_t)0xecee,
+  (q15_t)0x7e8e, (q15_t)0xecd5, (q15_t)0x7e8a, (q15_t)0xecbc, (q15_t)0x7e86, (q15_t)0xeca3, (q15_t)0x7e83, (q15_t)0xec8a,
+  (q15_t)0x7e7f, (q15_t)0xec72, (q15_t)0x7e7b, (q15_t)0xec59, (q15_t)0x7e77, (q15_t)0xec40, (q15_t)0x7e73, (q15_t)0xec27,
+  (q15_t)0x7e6f, (q15_t)0xec0e, (q15_t)0x7e6b, (q15_t)0xebf5, (q15_t)0x7e67, (q15_t)0xebdd, (q15_t)0x7e63, (q15_t)0xebc4,
+  (q15_t)0x7e5f, (q15_t)0xebab, (q15_t)0x7e5b, (q15_t)0xeb92, (q15_t)0x7e57, (q15_t)0xeb79, (q15_t)0x7e53, (q15_t)0xeb61,
+  (q15_t)0x7e4f, (q15_t)0xeb48, (q15_t)0x7e4b, (q15_t)0xeb2f, (q15_t)0x7e47, (q15_t)0xeb16, (q15_t)0x7e43, (q15_t)0xeafd,
+  (q15_t)0x7e3f, (q15_t)0xeae5, (q15_t)0x7e3b, (q15_t)0xeacc, (q15_t)0x7e37, (q15_t)0xeab3, (q15_t)0x7e32, (q15_t)0xea9a,
+  (q15_t)0x7e2e, (q15_t)0xea81, (q15_t)0x7e2a, (q15_t)0xea69, (q15_t)0x7e26, (q15_t)0xea50, (q15_t)0x7e21, (q15_t)0xea37,
+  (q15_t)0x7e1d, (q15_t)0xea1e, (q15_t)0x7e19, (q15_t)0xea06, (q15_t)0x7e14, (q15_t)0xe9ed, (q15_t)0x7e10, (q15_t)0xe9d4,
+  (q15_t)0x7e0c, (q15_t)0xe9bb, (q15_t)0x7e07, (q15_t)0xe9a3, (q15_t)0x7e03, (q15_t)0xe98a, (q15_t)0x7dff, (q15_t)0xe971,
+  (q15_t)0x7dfa, (q15_t)0xe958, (q15_t)0x7df6, (q15_t)0xe940, (q15_t)0x7df1, (q15_t)0xe927, (q15_t)0x7ded, (q15_t)0xe90e,
+  (q15_t)0x7de8, (q15_t)0xe8f6, (q15_t)0x7de4, (q15_t)0xe8dd, (q15_t)0x7ddf, (q15_t)0xe8c4, (q15_t)0x7dda, (q15_t)0xe8ab,
+  (q15_t)0x7dd6, (q15_t)0xe893, (q15_t)0x7dd1, (q15_t)0xe87a, (q15_t)0x7dcd, (q15_t)0xe861, (q15_t)0x7dc8, (q15_t)0xe849,
+  (q15_t)0x7dc3, (q15_t)0xe830, (q15_t)0x7dbf, (q15_t)0xe817, (q15_t)0x7dba, (q15_t)0xe7fe, (q15_t)0x7db5, (q15_t)0xe7e6,
+  (q15_t)0x7db0, (q15_t)0xe7cd, (q15_t)0x7dac, (q15_t)0xe7b4, (q15_t)0x7da7, (q15_t)0xe79c, (q15_t)0x7da2, (q15_t)0xe783,
+  (q15_t)0x7d9d, (q15_t)0xe76a, (q15_t)0x7d98, (q15_t)0xe752, (q15_t)0x7d94, (q15_t)0xe739, (q15_t)0x7d8f, (q15_t)0xe720,
+  (q15_t)0x7d8a, (q15_t)0xe708, (q15_t)0x7d85, (q15_t)0xe6ef, (q15_t)0x7d80, (q15_t)0xe6d6, (q15_t)0x7d7b, (q15_t)0xe6be,
+  (q15_t)0x7d76, (q15_t)0xe6a5, (q15_t)0x7d71, (q15_t)0xe68d, (q15_t)0x7d6c, (q15_t)0xe674, (q15_t)0x7d67, (q15_t)0xe65b,
+  (q15_t)0x7d62, (q15_t)0xe643, (q15_t)0x7d5d, (q15_t)0xe62a, (q15_t)0x7d58, (q15_t)0xe611, (q15_t)0x7d53, (q15_t)0xe5f9,
+  (q15_t)0x7d4e, (q15_t)0xe5e0, (q15_t)0x7d49, (q15_t)0xe5c8, (q15_t)0x7d43, (q15_t)0xe5af, (q15_t)0x7d3e, (q15_t)0xe596,
+  (q15_t)0x7d39, (q15_t)0xe57e, (q15_t)0x7d34, (q15_t)0xe565, (q15_t)0x7d2f, (q15_t)0xe54d, (q15_t)0x7d29, (q15_t)0xe534,
+  (q15_t)0x7d24, (q15_t)0xe51c, (q15_t)0x7d1f, (q15_t)0xe503, (q15_t)0x7d19, (q15_t)0xe4ea, (q15_t)0x7d14, (q15_t)0xe4d2,
+  (q15_t)0x7d0f, (q15_t)0xe4b9, (q15_t)0x7d09, (q15_t)0xe4a1, (q15_t)0x7d04, (q15_t)0xe488, (q15_t)0x7cff, (q15_t)0xe470,
+  (q15_t)0x7cf9, (q15_t)0xe457, (q15_t)0x7cf4, (q15_t)0xe43f, (q15_t)0x7cee, (q15_t)0xe426, (q15_t)0x7ce9, (q15_t)0xe40e,
+  (q15_t)0x7ce3, (q15_t)0xe3f5, (q15_t)0x7cde, (q15_t)0xe3dc, (q15_t)0x7cd8, (q15_t)0xe3c4, (q15_t)0x7cd3, (q15_t)0xe3ab,
+  (q15_t)0x7ccd, (q15_t)0xe393, (q15_t)0x7cc8, (q15_t)0xe37a, (q15_t)0x7cc2, (q15_t)0xe362, (q15_t)0x7cbc, (q15_t)0xe349,
+  (q15_t)0x7cb7, (q15_t)0xe331, (q15_t)0x7cb1, (q15_t)0xe318, (q15_t)0x7cab, (q15_t)0xe300, (q15_t)0x7ca6, (q15_t)0xe2e8,
+  (q15_t)0x7ca0, (q15_t)0xe2cf, (q15_t)0x7c9a, (q15_t)0xe2b7, (q15_t)0x7c94, (q15_t)0xe29e, (q15_t)0x7c8f, (q15_t)0xe286,
+  (q15_t)0x7c89, (q15_t)0xe26d, (q15_t)0x7c83, (q15_t)0xe255, (q15_t)0x7c7d, (q15_t)0xe23c, (q15_t)0x7c77, (q15_t)0xe224,
+  (q15_t)0x7c71, (q15_t)0xe20b, (q15_t)0x7c6c, (q15_t)0xe1f3, (q15_t)0x7c66, (q15_t)0xe1db, (q15_t)0x7c60, (q15_t)0xe1c2,
+  (q15_t)0x7c5a, (q15_t)0xe1aa, (q15_t)0x7c54, (q15_t)0xe191, (q15_t)0x7c4e, (q15_t)0xe179, (q15_t)0x7c48, (q15_t)0xe160,
+  (q15_t)0x7c42, (q15_t)0xe148, (q15_t)0x7c3c, (q15_t)0xe130, (q15_t)0x7c36, (q15_t)0xe117, (q15_t)0x7c30, (q15_t)0xe0ff,
+  (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7c23, (q15_t)0xe0ce, (q15_t)0x7c1d, (q15_t)0xe0b6, (q15_t)0x7c17, (q15_t)0xe09d,
+  (q15_t)0x7c11, (q15_t)0xe085, (q15_t)0x7c0b, (q15_t)0xe06d, (q15_t)0x7c05, (q15_t)0xe054, (q15_t)0x7bfe, (q15_t)0xe03c,
+  (q15_t)0x7bf8, (q15_t)0xe024, (q15_t)0x7bf2, (q15_t)0xe00b, (q15_t)0x7beb, (q15_t)0xdff3, (q15_t)0x7be5, (q15_t)0xdfdb,
+  (q15_t)0x7bdf, (q15_t)0xdfc2, (q15_t)0x7bd9, (q15_t)0xdfaa, (q15_t)0x7bd2, (q15_t)0xdf92, (q15_t)0x7bcc, (q15_t)0xdf79,
+  (q15_t)0x7bc5, (q15_t)0xdf61, (q15_t)0x7bbf, (q15_t)0xdf49, (q15_t)0x7bb9, (q15_t)0xdf30, (q15_t)0x7bb2, (q15_t)0xdf18,
+  (q15_t)0x7bac, (q15_t)0xdf00, (q15_t)0x7ba5, (q15_t)0xdee8, (q15_t)0x7b9f, (q15_t)0xdecf, (q15_t)0x7b98, (q15_t)0xdeb7,
+  (q15_t)0x7b92, (q15_t)0xde9f, (q15_t)0x7b8b, (q15_t)0xde87, (q15_t)0x7b84, (q15_t)0xde6e, (q15_t)0x7b7e, (q15_t)0xde56,
+  (q15_t)0x7b77, (q15_t)0xde3e, (q15_t)0x7b71, (q15_t)0xde26, (q15_t)0x7b6a, (q15_t)0xde0d, (q15_t)0x7b63, (q15_t)0xddf5,
+  (q15_t)0x7b5d, (q15_t)0xdddd, (q15_t)0x7b56, (q15_t)0xddc5, (q15_t)0x7b4f, (q15_t)0xddac, (q15_t)0x7b48, (q15_t)0xdd94,
+  (q15_t)0x7b42, (q15_t)0xdd7c, (q15_t)0x7b3b, (q15_t)0xdd64, (q15_t)0x7b34, (q15_t)0xdd4c, (q15_t)0x7b2d, (q15_t)0xdd33,
+  (q15_t)0x7b26, (q15_t)0xdd1b, (q15_t)0x7b1f, (q15_t)0xdd03, (q15_t)0x7b19, (q15_t)0xdceb, (q15_t)0x7b12, (q15_t)0xdcd3,
+  (q15_t)0x7b0b, (q15_t)0xdcbb, (q15_t)0x7b04, (q15_t)0xdca2, (q15_t)0x7afd, (q15_t)0xdc8a, (q15_t)0x7af6, (q15_t)0xdc72,
+  (q15_t)0x7aef, (q15_t)0xdc5a, (q15_t)0x7ae8, (q15_t)0xdc42, (q15_t)0x7ae1, (q15_t)0xdc2a, (q15_t)0x7ada, (q15_t)0xdc12,
+  (q15_t)0x7ad3, (q15_t)0xdbf9, (q15_t)0x7acc, (q15_t)0xdbe1, (q15_t)0x7ac5, (q15_t)0xdbc9, (q15_t)0x7abd, (q15_t)0xdbb1,
+  (q15_t)0x7ab6, (q15_t)0xdb99, (q15_t)0x7aaf, (q15_t)0xdb81, (q15_t)0x7aa8, (q15_t)0xdb69, (q15_t)0x7aa1, (q15_t)0xdb51,
+  (q15_t)0x7a9a, (q15_t)0xdb39, (q15_t)0x7a92, (q15_t)0xdb21, (q15_t)0x7a8b, (q15_t)0xdb09, (q15_t)0x7a84, (q15_t)0xdaf1,
+  (q15_t)0x7a7d, (q15_t)0xdad8, (q15_t)0x7a75, (q15_t)0xdac0, (q15_t)0x7a6e, (q15_t)0xdaa8, (q15_t)0x7a67, (q15_t)0xda90,
+  (q15_t)0x7a5f, (q15_t)0xda78, (q15_t)0x7a58, (q15_t)0xda60, (q15_t)0x7a50, (q15_t)0xda48, (q15_t)0x7a49, (q15_t)0xda30,
+  (q15_t)0x7a42, (q15_t)0xda18, (q15_t)0x7a3a, (q15_t)0xda00, (q15_t)0x7a33, (q15_t)0xd9e8, (q15_t)0x7a2b, (q15_t)0xd9d0,
+  (q15_t)0x7a24, (q15_t)0xd9b8, (q15_t)0x7a1c, (q15_t)0xd9a0, (q15_t)0x7a15, (q15_t)0xd988, (q15_t)0x7a0d, (q15_t)0xd970,
+  (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x79fe, (q15_t)0xd940, (q15_t)0x79f6, (q15_t)0xd928, (q15_t)0x79ef, (q15_t)0xd911,
+  (q15_t)0x79e7, (q15_t)0xd8f9, (q15_t)0x79df, (q15_t)0xd8e1, (q15_t)0x79d8, (q15_t)0xd8c9, (q15_t)0x79d0, (q15_t)0xd8b1,
+  (q15_t)0x79c8, (q15_t)0xd899, (q15_t)0x79c0, (q15_t)0xd881, (q15_t)0x79b9, (q15_t)0xd869, (q15_t)0x79b1, (q15_t)0xd851,
+  (q15_t)0x79a9, (q15_t)0xd839, (q15_t)0x79a1, (q15_t)0xd821, (q15_t)0x7999, (q15_t)0xd80a, (q15_t)0x7992, (q15_t)0xd7f2,
+  (q15_t)0x798a, (q15_t)0xd7da, (q15_t)0x7982, (q15_t)0xd7c2, (q15_t)0x797a, (q15_t)0xd7aa, (q15_t)0x7972, (q15_t)0xd792,
+  (q15_t)0x796a, (q15_t)0xd77a, (q15_t)0x7962, (q15_t)0xd763, (q15_t)0x795a, (q15_t)0xd74b, (q15_t)0x7952, (q15_t)0xd733,
+  (q15_t)0x794a, (q15_t)0xd71b, (q15_t)0x7942, (q15_t)0xd703, (q15_t)0x793a, (q15_t)0xd6eb, (q15_t)0x7932, (q15_t)0xd6d4,
+  (q15_t)0x792a, (q15_t)0xd6bc, (q15_t)0x7922, (q15_t)0xd6a4, (q15_t)0x7919, (q15_t)0xd68c, (q15_t)0x7911, (q15_t)0xd675,
+  (q15_t)0x7909, (q15_t)0xd65d, (q15_t)0x7901, (q15_t)0xd645, (q15_t)0x78f9, (q15_t)0xd62d, (q15_t)0x78f1, (q15_t)0xd615,
+  (q15_t)0x78e8, (q15_t)0xd5fe, (q15_t)0x78e0, (q15_t)0xd5e6, (q15_t)0x78d8, (q15_t)0xd5ce, (q15_t)0x78cf, (q15_t)0xd5b7,
+  (q15_t)0x78c7, (q15_t)0xd59f, (q15_t)0x78bf, (q15_t)0xd587, (q15_t)0x78b6, (q15_t)0xd56f, (q15_t)0x78ae, (q15_t)0xd558,
+  (q15_t)0x78a6, (q15_t)0xd540, (q15_t)0x789d, (q15_t)0xd528, (q15_t)0x7895, (q15_t)0xd511, (q15_t)0x788c, (q15_t)0xd4f9,
+  (q15_t)0x7884, (q15_t)0xd4e1, (q15_t)0x787c, (q15_t)0xd4ca, (q15_t)0x7873, (q15_t)0xd4b2, (q15_t)0x786b, (q15_t)0xd49a,
+  (q15_t)0x7862, (q15_t)0xd483, (q15_t)0x7859, (q15_t)0xd46b, (q15_t)0x7851, (q15_t)0xd453, (q15_t)0x7848, (q15_t)0xd43c,
+  (q15_t)0x7840, (q15_t)0xd424, (q15_t)0x7837, (q15_t)0xd40d, (q15_t)0x782e, (q15_t)0xd3f5, (q15_t)0x7826, (q15_t)0xd3dd,
+  (q15_t)0x781d, (q15_t)0xd3c6, (q15_t)0x7814, (q15_t)0xd3ae, (q15_t)0x780c, (q15_t)0xd397, (q15_t)0x7803, (q15_t)0xd37f,
+  (q15_t)0x77fa, (q15_t)0xd368, (q15_t)0x77f1, (q15_t)0xd350, (q15_t)0x77e9, (q15_t)0xd338, (q15_t)0x77e0, (q15_t)0xd321,
+  (q15_t)0x77d7, (q15_t)0xd309, (q15_t)0x77ce, (q15_t)0xd2f2, (q15_t)0x77c5, (q15_t)0xd2da, (q15_t)0x77bc, (q15_t)0xd2c3,
+  (q15_t)0x77b4, (q15_t)0xd2ab, (q15_t)0x77ab, (q15_t)0xd294, (q15_t)0x77a2, (q15_t)0xd27c, (q15_t)0x7799, (q15_t)0xd265,
+  (q15_t)0x7790, (q15_t)0xd24d, (q15_t)0x7787, (q15_t)0xd236, (q15_t)0x777e, (q15_t)0xd21e, (q15_t)0x7775, (q15_t)0xd207,
+  (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x7763, (q15_t)0xd1d8, (q15_t)0x775a, (q15_t)0xd1c1, (q15_t)0x7751, (q15_t)0xd1a9,
+  (q15_t)0x7747, (q15_t)0xd192, (q15_t)0x773e, (q15_t)0xd17a, (q15_t)0x7735, (q15_t)0xd163, (q15_t)0x772c, (q15_t)0xd14b,
+  (q15_t)0x7723, (q15_t)0xd134, (q15_t)0x771a, (q15_t)0xd11d, (q15_t)0x7710, (q15_t)0xd105, (q15_t)0x7707, (q15_t)0xd0ee,
+  (q15_t)0x76fe, (q15_t)0xd0d7, (q15_t)0x76f5, (q15_t)0xd0bf, (q15_t)0x76eb, (q15_t)0xd0a8, (q15_t)0x76e2, (q15_t)0xd091,
+  (q15_t)0x76d9, (q15_t)0xd079, (q15_t)0x76cf, (q15_t)0xd062, (q15_t)0x76c6, (q15_t)0xd04b, (q15_t)0x76bd, (q15_t)0xd033,
+  (q15_t)0x76b3, (q15_t)0xd01c, (q15_t)0x76aa, (q15_t)0xd005, (q15_t)0x76a0, (q15_t)0xcfed, (q15_t)0x7697, (q15_t)0xcfd6,
+  (q15_t)0x768e, (q15_t)0xcfbf, (q15_t)0x7684, (q15_t)0xcfa7, (q15_t)0x767b, (q15_t)0xcf90, (q15_t)0x7671, (q15_t)0xcf79,
+  (q15_t)0x7668, (q15_t)0xcf62, (q15_t)0x765e, (q15_t)0xcf4a, (q15_t)0x7654, (q15_t)0xcf33, (q15_t)0x764b, (q15_t)0xcf1c,
+  (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x7638, (q15_t)0xceee, (q15_t)0x762e, (q15_t)0xced6, (q15_t)0x7624, (q15_t)0xcebf,
+  (q15_t)0x761b, (q15_t)0xcea8, (q15_t)0x7611, (q15_t)0xce91, (q15_t)0x7607, (q15_t)0xce7a, (q15_t)0x75fd, (q15_t)0xce62,
+  (q15_t)0x75f4, (q15_t)0xce4b, (q15_t)0x75ea, (q15_t)0xce34, (q15_t)0x75e0, (q15_t)0xce1d, (q15_t)0x75d6, (q15_t)0xce06,
+  (q15_t)0x75cc, (q15_t)0xcdef, (q15_t)0x75c3, (q15_t)0xcdd8, (q15_t)0x75b9, (q15_t)0xcdc0, (q15_t)0x75af, (q15_t)0xcda9,
+  (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x759b, (q15_t)0xcd7b, (q15_t)0x7591, (q15_t)0xcd64, (q15_t)0x7587, (q15_t)0xcd4d,
+  (q15_t)0x757d, (q15_t)0xcd36, (q15_t)0x7573, (q15_t)0xcd1f, (q15_t)0x7569, (q15_t)0xcd08, (q15_t)0x755f, (q15_t)0xccf1,
+  (q15_t)0x7555, (q15_t)0xccda, (q15_t)0x754b, (q15_t)0xccc3, (q15_t)0x7541, (q15_t)0xccac, (q15_t)0x7537, (q15_t)0xcc95,
+  (q15_t)0x752d, (q15_t)0xcc7e, (q15_t)0x7523, (q15_t)0xcc67, (q15_t)0x7519, (q15_t)0xcc50, (q15_t)0x750f, (q15_t)0xcc39,
+  (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x74fa, (q15_t)0xcc0b, (q15_t)0x74f0, (q15_t)0xcbf4, (q15_t)0x74e6, (q15_t)0xcbdd,
+  (q15_t)0x74db, (q15_t)0xcbc6, (q15_t)0x74d1, (q15_t)0xcbaf, (q15_t)0x74c7, (q15_t)0xcb98, (q15_t)0x74bd, (q15_t)0xcb81,
+  (q15_t)0x74b2, (q15_t)0xcb6a, (q15_t)0x74a8, (q15_t)0xcb53, (q15_t)0x749e, (q15_t)0xcb3c, (q15_t)0x7493, (q15_t)0xcb25,
+  (q15_t)0x7489, (q15_t)0xcb0e, (q15_t)0x747e, (q15_t)0xcaf8, (q15_t)0x7474, (q15_t)0xcae1, (q15_t)0x746a, (q15_t)0xcaca,
+  (q15_t)0x745f, (q15_t)0xcab3, (q15_t)0x7455, (q15_t)0xca9c, (q15_t)0x744a, (q15_t)0xca85, (q15_t)0x7440, (q15_t)0xca6e,
+  (q15_t)0x7435, (q15_t)0xca58, (q15_t)0x742b, (q15_t)0xca41, (q15_t)0x7420, (q15_t)0xca2a, (q15_t)0x7415, (q15_t)0xca13,
+  (q15_t)0x740b, (q15_t)0xc9fc, (q15_t)0x7400, (q15_t)0xc9e6, (q15_t)0x73f6, (q15_t)0xc9cf, (q15_t)0x73eb, (q15_t)0xc9b8,
+  (q15_t)0x73e0, (q15_t)0xc9a1, (q15_t)0x73d6, (q15_t)0xc98b, (q15_t)0x73cb, (q15_t)0xc974, (q15_t)0x73c0, (q15_t)0xc95d,
+  (q15_t)0x73b5, (q15_t)0xc946, (q15_t)0x73ab, (q15_t)0xc930, (q15_t)0x73a0, (q15_t)0xc919, (q15_t)0x7395, (q15_t)0xc902,
+  (q15_t)0x738a, (q15_t)0xc8ec, (q15_t)0x737f, (q15_t)0xc8d5, (q15_t)0x7375, (q15_t)0xc8be, (q15_t)0x736a, (q15_t)0xc8a8,
+  (q15_t)0x735f, (q15_t)0xc891, (q15_t)0x7354, (q15_t)0xc87a, (q15_t)0x7349, (q15_t)0xc864, (q15_t)0x733e, (q15_t)0xc84d,
+  (q15_t)0x7333, (q15_t)0xc836, (q15_t)0x7328, (q15_t)0xc820, (q15_t)0x731d, (q15_t)0xc809, (q15_t)0x7312, (q15_t)0xc7f3,
+  (q15_t)0x7307, (q15_t)0xc7dc, (q15_t)0x72fc, (q15_t)0xc7c5, (q15_t)0x72f1, (q15_t)0xc7af, (q15_t)0x72e6, (q15_t)0xc798,
+  (q15_t)0x72db, (q15_t)0xc782, (q15_t)0x72d0, (q15_t)0xc76b, (q15_t)0x72c5, (q15_t)0xc755, (q15_t)0x72ba, (q15_t)0xc73e,
+  (q15_t)0x72af, (q15_t)0xc728, (q15_t)0x72a3, (q15_t)0xc711, (q15_t)0x7298, (q15_t)0xc6fa, (q15_t)0x728d, (q15_t)0xc6e4,
+  (q15_t)0x7282, (q15_t)0xc6ce, (q15_t)0x7276, (q15_t)0xc6b7, (q15_t)0x726b, (q15_t)0xc6a1, (q15_t)0x7260, (q15_t)0xc68a,
+  (q15_t)0x7255, (q15_t)0xc674, (q15_t)0x7249, (q15_t)0xc65d, (q15_t)0x723e, (q15_t)0xc647, (q15_t)0x7233, (q15_t)0xc630,
+  (q15_t)0x7227, (q15_t)0xc61a, (q15_t)0x721c, (q15_t)0xc603, (q15_t)0x7211, (q15_t)0xc5ed, (q15_t)0x7205, (q15_t)0xc5d7,
+  (q15_t)0x71fa, (q15_t)0xc5c0, (q15_t)0x71ee, (q15_t)0xc5aa, (q15_t)0x71e3, (q15_t)0xc594, (q15_t)0x71d7, (q15_t)0xc57d,
+  (q15_t)0x71cc, (q15_t)0xc567, (q15_t)0x71c0, (q15_t)0xc551, (q15_t)0x71b5, (q15_t)0xc53a, (q15_t)0x71a9, (q15_t)0xc524,
+  (q15_t)0x719e, (q15_t)0xc50e, (q15_t)0x7192, (q15_t)0xc4f7, (q15_t)0x7186, (q15_t)0xc4e1, (q15_t)0x717b, (q15_t)0xc4cb,
+  (q15_t)0x716f, (q15_t)0xc4b4, (q15_t)0x7164, (q15_t)0xc49e, (q15_t)0x7158, (q15_t)0xc488, (q15_t)0x714c, (q15_t)0xc472,
+  (q15_t)0x7141, (q15_t)0xc45b, (q15_t)0x7135, (q15_t)0xc445, (q15_t)0x7129, (q15_t)0xc42f, (q15_t)0x711d, (q15_t)0xc419,
+  (q15_t)0x7112, (q15_t)0xc403, (q15_t)0x7106, (q15_t)0xc3ec, (q15_t)0x70fa, (q15_t)0xc3d6, (q15_t)0x70ee, (q15_t)0xc3c0,
+  (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x70d6, (q15_t)0xc394, (q15_t)0x70cb, (q15_t)0xc37d, (q15_t)0x70bf, (q15_t)0xc367,
+  (q15_t)0x70b3, (q15_t)0xc351, (q15_t)0x70a7, (q15_t)0xc33b, (q15_t)0x709b, (q15_t)0xc325, (q15_t)0x708f, (q15_t)0xc30f,
+  (q15_t)0x7083, (q15_t)0xc2f9, (q15_t)0x7077, (q15_t)0xc2e3, (q15_t)0x706b, (q15_t)0xc2cd, (q15_t)0x705f, (q15_t)0xc2b7,
+  (q15_t)0x7053, (q15_t)0xc2a0, (q15_t)0x7047, (q15_t)0xc28a, (q15_t)0x703b, (q15_t)0xc274, (q15_t)0x702f, (q15_t)0xc25e,
+  (q15_t)0x7023, (q15_t)0xc248, (q15_t)0x7016, (q15_t)0xc232, (q15_t)0x700a, (q15_t)0xc21c, (q15_t)0x6ffe, (q15_t)0xc206,
+  (q15_t)0x6ff2, (q15_t)0xc1f0, (q15_t)0x6fe6, (q15_t)0xc1da, (q15_t)0x6fda, (q15_t)0xc1c4, (q15_t)0x6fcd, (q15_t)0xc1ae,
+  (q15_t)0x6fc1, (q15_t)0xc198, (q15_t)0x6fb5, (q15_t)0xc183, (q15_t)0x6fa9, (q15_t)0xc16d, (q15_t)0x6f9c, (q15_t)0xc157,
+  (q15_t)0x6f90, (q15_t)0xc141, (q15_t)0x6f84, (q15_t)0xc12b, (q15_t)0x6f77, (q15_t)0xc115, (q15_t)0x6f6b, (q15_t)0xc0ff,
+  (q15_t)0x6f5f, (q15_t)0xc0e9, (q15_t)0x6f52, (q15_t)0xc0d3, (q15_t)0x6f46, (q15_t)0xc0bd, (q15_t)0x6f39, (q15_t)0xc0a8,
+  (q15_t)0x6f2d, (q15_t)0xc092, (q15_t)0x6f20, (q15_t)0xc07c, (q15_t)0x6f14, (q15_t)0xc066, (q15_t)0x6f07, (q15_t)0xc050,
+  (q15_t)0x6efb, (q15_t)0xc03b, (q15_t)0x6eee, (q15_t)0xc025, (q15_t)0x6ee2, (q15_t)0xc00f, (q15_t)0x6ed5, (q15_t)0xbff9,
+  (q15_t)0x6ec9, (q15_t)0xbfe3, (q15_t)0x6ebc, (q15_t)0xbfce, (q15_t)0x6eaf, (q15_t)0xbfb8, (q15_t)0x6ea3, (q15_t)0xbfa2,
+  (q15_t)0x6e96, (q15_t)0xbf8d, (q15_t)0x6e89, (q15_t)0xbf77, (q15_t)0x6e7d, (q15_t)0xbf61, (q15_t)0x6e70, (q15_t)0xbf4b,
+  (q15_t)0x6e63, (q15_t)0xbf36, (q15_t)0x6e57, (q15_t)0xbf20, (q15_t)0x6e4a, (q15_t)0xbf0a, (q15_t)0x6e3d, (q15_t)0xbef5,
+  (q15_t)0x6e30, (q15_t)0xbedf, (q15_t)0x6e24, (q15_t)0xbeca, (q15_t)0x6e17, (q15_t)0xbeb4, (q15_t)0x6e0a, (q15_t)0xbe9e,
+  (q15_t)0x6dfd, (q15_t)0xbe89, (q15_t)0x6df0, (q15_t)0xbe73, (q15_t)0x6de3, (q15_t)0xbe5e, (q15_t)0x6dd6, (q15_t)0xbe48,
+  (q15_t)0x6dca, (q15_t)0xbe32, (q15_t)0x6dbd, (q15_t)0xbe1d, (q15_t)0x6db0, (q15_t)0xbe07, (q15_t)0x6da3, (q15_t)0xbdf2,
+  (q15_t)0x6d96, (q15_t)0xbddc, (q15_t)0x6d89, (q15_t)0xbdc7, (q15_t)0x6d7c, (q15_t)0xbdb1, (q15_t)0x6d6f, (q15_t)0xbd9c,
+  (q15_t)0x6d62, (q15_t)0xbd86, (q15_t)0x6d55, (q15_t)0xbd71, (q15_t)0x6d48, (q15_t)0xbd5b, (q15_t)0x6d3a, (q15_t)0xbd46,
+  (q15_t)0x6d2d, (q15_t)0xbd30, (q15_t)0x6d20, (q15_t)0xbd1b, (q15_t)0x6d13, (q15_t)0xbd06, (q15_t)0x6d06, (q15_t)0xbcf0,
+  (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6cec, (q15_t)0xbcc5, (q15_t)0x6cde, (q15_t)0xbcb0, (q15_t)0x6cd1, (q15_t)0xbc9b,
+  (q15_t)0x6cc4, (q15_t)0xbc85, (q15_t)0x6cb7, (q15_t)0xbc70, (q15_t)0x6ca9, (q15_t)0xbc5b, (q15_t)0x6c9c, (q15_t)0xbc45,
+  (q15_t)0x6c8f, (q15_t)0xbc30, (q15_t)0x6c81, (q15_t)0xbc1b, (q15_t)0x6c74, (q15_t)0xbc05, (q15_t)0x6c67, (q15_t)0xbbf0,
+  (q15_t)0x6c59, (q15_t)0xbbdb, (q15_t)0x6c4c, (q15_t)0xbbc5, (q15_t)0x6c3f, (q15_t)0xbbb0, (q15_t)0x6c31, (q15_t)0xbb9b,
+  (q15_t)0x6c24, (q15_t)0xbb86, (q15_t)0x6c16, (q15_t)0xbb70, (q15_t)0x6c09, (q15_t)0xbb5b, (q15_t)0x6bfb, (q15_t)0xbb46,
+  (q15_t)0x6bee, (q15_t)0xbb31, (q15_t)0x6be0, (q15_t)0xbb1c, (q15_t)0x6bd3, (q15_t)0xbb06, (q15_t)0x6bc5, (q15_t)0xbaf1,
+  (q15_t)0x6bb8, (q15_t)0xbadc, (q15_t)0x6baa, (q15_t)0xbac7, (q15_t)0x6b9c, (q15_t)0xbab2, (q15_t)0x6b8f, (q15_t)0xba9d,
+  (q15_t)0x6b81, (q15_t)0xba88, (q15_t)0x6b73, (q15_t)0xba73, (q15_t)0x6b66, (q15_t)0xba5d, (q15_t)0x6b58, (q15_t)0xba48,
+  (q15_t)0x6b4a, (q15_t)0xba33, (q15_t)0x6b3d, (q15_t)0xba1e, (q15_t)0x6b2f, (q15_t)0xba09, (q15_t)0x6b21, (q15_t)0xb9f4,
+  (q15_t)0x6b13, (q15_t)0xb9df, (q15_t)0x6b06, (q15_t)0xb9ca, (q15_t)0x6af8, (q15_t)0xb9b5, (q15_t)0x6aea, (q15_t)0xb9a0,
+  (q15_t)0x6adc, (q15_t)0xb98b, (q15_t)0x6ace, (q15_t)0xb976, (q15_t)0x6ac1, (q15_t)0xb961, (q15_t)0x6ab3, (q15_t)0xb94c,
+  (q15_t)0x6aa5, (q15_t)0xb937, (q15_t)0x6a97, (q15_t)0xb922, (q15_t)0x6a89, (q15_t)0xb90d, (q15_t)0x6a7b, (q15_t)0xb8f8,
+  (q15_t)0x6a6d, (q15_t)0xb8e4, (q15_t)0x6a5f, (q15_t)0xb8cf, (q15_t)0x6a51, (q15_t)0xb8ba, (q15_t)0x6a43, (q15_t)0xb8a5,
+  (q15_t)0x6a35, (q15_t)0xb890, (q15_t)0x6a27, (q15_t)0xb87b, (q15_t)0x6a19, (q15_t)0xb866, (q15_t)0x6a0b, (q15_t)0xb852,
+  (q15_t)0x69fd, (q15_t)0xb83d, (q15_t)0x69ef, (q15_t)0xb828, (q15_t)0x69e1, (q15_t)0xb813, (q15_t)0x69d3, (q15_t)0xb7fe,
+  (q15_t)0x69c4, (q15_t)0xb7ea, (q15_t)0x69b6, (q15_t)0xb7d5, (q15_t)0x69a8, (q15_t)0xb7c0, (q15_t)0x699a, (q15_t)0xb7ab,
+  (q15_t)0x698c, (q15_t)0xb797, (q15_t)0x697d, (q15_t)0xb782, (q15_t)0x696f, (q15_t)0xb76d, (q15_t)0x6961, (q15_t)0xb758,
+  (q15_t)0x6953, (q15_t)0xb744, (q15_t)0x6944, (q15_t)0xb72f, (q15_t)0x6936, (q15_t)0xb71a, (q15_t)0x6928, (q15_t)0xb706,
+  (q15_t)0x6919, (q15_t)0xb6f1, (q15_t)0x690b, (q15_t)0xb6dd, (q15_t)0x68fd, (q15_t)0xb6c8, (q15_t)0x68ee, (q15_t)0xb6b3,
+  (q15_t)0x68e0, (q15_t)0xb69f, (q15_t)0x68d1, (q15_t)0xb68a, (q15_t)0x68c3, (q15_t)0xb676, (q15_t)0x68b5, (q15_t)0xb661,
+  (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x6898, (q15_t)0xb638, (q15_t)0x6889, (q15_t)0xb623, (q15_t)0x687b, (q15_t)0xb60f,
+  (q15_t)0x686c, (q15_t)0xb5fa, (q15_t)0x685e, (q15_t)0xb5e6, (q15_t)0x684f, (q15_t)0xb5d1, (q15_t)0x6840, (q15_t)0xb5bd,
+  (q15_t)0x6832, (q15_t)0xb5a8, (q15_t)0x6823, (q15_t)0xb594, (q15_t)0x6815, (q15_t)0xb57f, (q15_t)0x6806, (q15_t)0xb56b,
+  (q15_t)0x67f7, (q15_t)0xb557, (q15_t)0x67e9, (q15_t)0xb542, (q15_t)0x67da, (q15_t)0xb52e, (q15_t)0x67cb, (q15_t)0xb519,
+  (q15_t)0x67bd, (q15_t)0xb505, (q15_t)0x67ae, (q15_t)0xb4f1, (q15_t)0x679f, (q15_t)0xb4dc, (q15_t)0x6790, (q15_t)0xb4c8,
+  (q15_t)0x6782, (q15_t)0xb4b4, (q15_t)0x6773, (q15_t)0xb49f, (q15_t)0x6764, (q15_t)0xb48b, (q15_t)0x6755, (q15_t)0xb477,
+  (q15_t)0x6746, (q15_t)0xb462, (q15_t)0x6737, (q15_t)0xb44e, (q15_t)0x6729, (q15_t)0xb43a, (q15_t)0x671a, (q15_t)0xb426,
+  (q15_t)0x670b, (q15_t)0xb411, (q15_t)0x66fc, (q15_t)0xb3fd, (q15_t)0x66ed, (q15_t)0xb3e9, (q15_t)0x66de, (q15_t)0xb3d5,
+  (q15_t)0x66cf, (q15_t)0xb3c1, (q15_t)0x66c0, (q15_t)0xb3ac, (q15_t)0x66b1, (q15_t)0xb398, (q15_t)0x66a2, (q15_t)0xb384,
+  (q15_t)0x6693, (q15_t)0xb370, (q15_t)0x6684, (q15_t)0xb35c, (q15_t)0x6675, (q15_t)0xb348, (q15_t)0x6666, (q15_t)0xb334,
+  (q15_t)0x6657, (q15_t)0xb31f, (q15_t)0x6648, (q15_t)0xb30b, (q15_t)0x6639, (q15_t)0xb2f7, (q15_t)0x6629, (q15_t)0xb2e3,
+  (q15_t)0x661a, (q15_t)0xb2cf, (q15_t)0x660b, (q15_t)0xb2bb, (q15_t)0x65fc, (q15_t)0xb2a7, (q15_t)0x65ed, (q15_t)0xb293,
+  (q15_t)0x65dd, (q15_t)0xb27f, (q15_t)0x65ce, (q15_t)0xb26b, (q15_t)0x65bf, (q15_t)0xb257, (q15_t)0x65b0, (q15_t)0xb243,
+  (q15_t)0x65a0, (q15_t)0xb22f, (q15_t)0x6591, (q15_t)0xb21b, (q15_t)0x6582, (q15_t)0xb207, (q15_t)0x6573, (q15_t)0xb1f3,
+  (q15_t)0x6563, (q15_t)0xb1df, (q15_t)0x6554, (q15_t)0xb1cc, (q15_t)0x6545, (q15_t)0xb1b8, (q15_t)0x6535, (q15_t)0xb1a4,
+  (q15_t)0x6526, (q15_t)0xb190, (q15_t)0x6516, (q15_t)0xb17c, (q15_t)0x6507, (q15_t)0xb168, (q15_t)0x64f7, (q15_t)0xb154,
+  (q15_t)0x64e8, (q15_t)0xb141, (q15_t)0x64d9, (q15_t)0xb12d, (q15_t)0x64c9, (q15_t)0xb119, (q15_t)0x64ba, (q15_t)0xb105,
+  (q15_t)0x64aa, (q15_t)0xb0f1, (q15_t)0x649b, (q15_t)0xb0de, (q15_t)0x648b, (q15_t)0xb0ca, (q15_t)0x647b, (q15_t)0xb0b6,
+  (q15_t)0x646c, (q15_t)0xb0a2, (q15_t)0x645c, (q15_t)0xb08f, (q15_t)0x644d, (q15_t)0xb07b, (q15_t)0x643d, (q15_t)0xb067,
+  (q15_t)0x642d, (q15_t)0xb054, (q15_t)0x641e, (q15_t)0xb040, (q15_t)0x640e, (q15_t)0xb02c, (q15_t)0x63fe, (q15_t)0xb019,
+  (q15_t)0x63ef, (q15_t)0xb005, (q15_t)0x63df, (q15_t)0xaff1, (q15_t)0x63cf, (q15_t)0xafde, (q15_t)0x63c0, (q15_t)0xafca,
+  (q15_t)0x63b0, (q15_t)0xafb7, (q15_t)0x63a0, (q15_t)0xafa3, (q15_t)0x6390, (q15_t)0xaf90, (q15_t)0x6380, (q15_t)0xaf7c,
+  (q15_t)0x6371, (q15_t)0xaf69, (q15_t)0x6361, (q15_t)0xaf55, (q15_t)0x6351, (q15_t)0xaf41, (q15_t)0x6341, (q15_t)0xaf2e,
+  (q15_t)0x6331, (q15_t)0xaf1b, (q15_t)0x6321, (q15_t)0xaf07, (q15_t)0x6311, (q15_t)0xaef4, (q15_t)0x6301, (q15_t)0xaee0,
+  (q15_t)0x62f2, (q15_t)0xaecd, (q15_t)0x62e2, (q15_t)0xaeb9, (q15_t)0x62d2, (q15_t)0xaea6, (q15_t)0x62c2, (q15_t)0xae92,
+  (q15_t)0x62b2, (q15_t)0xae7f, (q15_t)0x62a2, (q15_t)0xae6c, (q15_t)0x6292, (q15_t)0xae58, (q15_t)0x6282, (q15_t)0xae45,
+  (q15_t)0x6271, (q15_t)0xae32, (q15_t)0x6261, (q15_t)0xae1e, (q15_t)0x6251, (q15_t)0xae0b, (q15_t)0x6241, (q15_t)0xadf8,
+  (q15_t)0x6231, (q15_t)0xade4, (q15_t)0x6221, (q15_t)0xadd1, (q15_t)0x6211, (q15_t)0xadbe, (q15_t)0x6201, (q15_t)0xadab,
+  (q15_t)0x61f1, (q15_t)0xad97, (q15_t)0x61e0, (q15_t)0xad84, (q15_t)0x61d0, (q15_t)0xad71, (q15_t)0x61c0, (q15_t)0xad5e,
+  (q15_t)0x61b0, (q15_t)0xad4b, (q15_t)0x619f, (q15_t)0xad37, (q15_t)0x618f, (q15_t)0xad24, (q15_t)0x617f, (q15_t)0xad11,
+  (q15_t)0x616f, (q15_t)0xacfe, (q15_t)0x615e, (q15_t)0xaceb, (q15_t)0x614e, (q15_t)0xacd8, (q15_t)0x613e, (q15_t)0xacc5,
+  (q15_t)0x612d, (q15_t)0xacb2, (q15_t)0x611d, (q15_t)0xac9e, (q15_t)0x610d, (q15_t)0xac8b, (q15_t)0x60fc, (q15_t)0xac78,
+  (q15_t)0x60ec, (q15_t)0xac65, (q15_t)0x60db, (q15_t)0xac52, (q15_t)0x60cb, (q15_t)0xac3f, (q15_t)0x60ba, (q15_t)0xac2c,
+  (q15_t)0x60aa, (q15_t)0xac19, (q15_t)0x6099, (q15_t)0xac06, (q15_t)0x6089, (q15_t)0xabf3, (q15_t)0x6078, (q15_t)0xabe0,
+  (q15_t)0x6068, (q15_t)0xabcd, (q15_t)0x6057, (q15_t)0xabbb, (q15_t)0x6047, (q15_t)0xaba8, (q15_t)0x6036, (q15_t)0xab95,
+  (q15_t)0x6026, (q15_t)0xab82, (q15_t)0x6015, (q15_t)0xab6f, (q15_t)0x6004, (q15_t)0xab5c, (q15_t)0x5ff4, (q15_t)0xab49,
+  (q15_t)0x5fe3, (q15_t)0xab36, (q15_t)0x5fd3, (q15_t)0xab24, (q15_t)0x5fc2, (q15_t)0xab11, (q15_t)0x5fb1, (q15_t)0xaafe,
+  (q15_t)0x5fa0, (q15_t)0xaaeb, (q15_t)0x5f90, (q15_t)0xaad8, (q15_t)0x5f7f, (q15_t)0xaac6, (q15_t)0x5f6e, (q15_t)0xaab3,
+  (q15_t)0x5f5e, (q15_t)0xaaa0, (q15_t)0x5f4d, (q15_t)0xaa8e, (q15_t)0x5f3c, (q15_t)0xaa7b, (q15_t)0x5f2b, (q15_t)0xaa68,
+  (q15_t)0x5f1a, (q15_t)0xaa55, (q15_t)0x5f0a, (q15_t)0xaa43, (q15_t)0x5ef9, (q15_t)0xaa30, (q15_t)0x5ee8, (q15_t)0xaa1d,
+  (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5ec6, (q15_t)0xa9f8, (q15_t)0x5eb5, (q15_t)0xa9e6, (q15_t)0x5ea4, (q15_t)0xa9d3,
+  (q15_t)0x5e93, (q15_t)0xa9c0, (q15_t)0x5e82, (q15_t)0xa9ae, (q15_t)0x5e71, (q15_t)0xa99b, (q15_t)0x5e60, (q15_t)0xa989,
+  (q15_t)0x5e50, (q15_t)0xa976, (q15_t)0x5e3f, (q15_t)0xa964, (q15_t)0x5e2d, (q15_t)0xa951, (q15_t)0x5e1c, (q15_t)0xa93f,
+  (q15_t)0x5e0b, (q15_t)0xa92c, (q15_t)0x5dfa, (q15_t)0xa91a, (q15_t)0x5de9, (q15_t)0xa907, (q15_t)0x5dd8, (q15_t)0xa8f5,
+  (q15_t)0x5dc7, (q15_t)0xa8e3, (q15_t)0x5db6, (q15_t)0xa8d0, (q15_t)0x5da5, (q15_t)0xa8be, (q15_t)0x5d94, (q15_t)0xa8ab,
+  (q15_t)0x5d83, (q15_t)0xa899, (q15_t)0x5d71, (q15_t)0xa887, (q15_t)0x5d60, (q15_t)0xa874, (q15_t)0x5d4f, (q15_t)0xa862,
+  (q15_t)0x5d3e, (q15_t)0xa850, (q15_t)0x5d2d, (q15_t)0xa83d, (q15_t)0x5d1b, (q15_t)0xa82b, (q15_t)0x5d0a, (q15_t)0xa819,
+  (q15_t)0x5cf9, (q15_t)0xa807, (q15_t)0x5ce8, (q15_t)0xa7f4, (q15_t)0x5cd6, (q15_t)0xa7e2, (q15_t)0x5cc5, (q15_t)0xa7d0,
+  (q15_t)0x5cb4, (q15_t)0xa7be, (q15_t)0x5ca2, (q15_t)0xa7ab, (q15_t)0x5c91, (q15_t)0xa799, (q15_t)0x5c80, (q15_t)0xa787,
+  (q15_t)0x5c6e, (q15_t)0xa775, (q15_t)0x5c5d, (q15_t)0xa763, (q15_t)0x5c4b, (q15_t)0xa751, (q15_t)0x5c3a, (q15_t)0xa73f,
+  (q15_t)0x5c29, (q15_t)0xa72c, (q15_t)0x5c17, (q15_t)0xa71a, (q15_t)0x5c06, (q15_t)0xa708, (q15_t)0x5bf4, (q15_t)0xa6f6,
+  (q15_t)0x5be3, (q15_t)0xa6e4, (q15_t)0x5bd1, (q15_t)0xa6d2, (q15_t)0x5bc0, (q15_t)0xa6c0, (q15_t)0x5bae, (q15_t)0xa6ae,
+  (q15_t)0x5b9d, (q15_t)0xa69c, (q15_t)0x5b8b, (q15_t)0xa68a, (q15_t)0x5b79, (q15_t)0xa678, (q15_t)0x5b68, (q15_t)0xa666,
+  (q15_t)0x5b56, (q15_t)0xa654, (q15_t)0x5b45, (q15_t)0xa642, (q15_t)0x5b33, (q15_t)0xa630, (q15_t)0x5b21, (q15_t)0xa61f,
+  (q15_t)0x5b10, (q15_t)0xa60d, (q15_t)0x5afe, (q15_t)0xa5fb, (q15_t)0x5aec, (q15_t)0xa5e9, (q15_t)0x5adb, (q15_t)0xa5d7,
+  (q15_t)0x5ac9, (q15_t)0xa5c5, (q15_t)0x5ab7, (q15_t)0xa5b3, (q15_t)0x5aa5, (q15_t)0xa5a2, (q15_t)0x5a94, (q15_t)0xa590,
+  (q15_t)0x5a82, (q15_t)0xa57e, (q15_t)0x5a70, (q15_t)0xa56c, (q15_t)0x5a5e, (q15_t)0xa55b, (q15_t)0x5a4d, (q15_t)0xa549,
+  (q15_t)0x5a3b, (q15_t)0xa537, (q15_t)0x5a29, (q15_t)0xa525, (q15_t)0x5a17, (q15_t)0xa514, (q15_t)0x5a05, (q15_t)0xa502,
+  (q15_t)0x59f3, (q15_t)0xa4f0, (q15_t)0x59e1, (q15_t)0xa4df, (q15_t)0x59d0, (q15_t)0xa4cd, (q15_t)0x59be, (q15_t)0xa4bb,
+  (q15_t)0x59ac, (q15_t)0xa4aa, (q15_t)0x599a, (q15_t)0xa498, (q15_t)0x5988, (q15_t)0xa487, (q15_t)0x5976, (q15_t)0xa475,
+  (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x5952, (q15_t)0xa452, (q15_t)0x5940, (q15_t)0xa440, (q15_t)0x592e, (q15_t)0xa42f,
+  (q15_t)0x591c, (q15_t)0xa41d, (q15_t)0x590a, (q15_t)0xa40c, (q15_t)0x58f8, (q15_t)0xa3fa, (q15_t)0x58e6, (q15_t)0xa3e9,
+  (q15_t)0x58d4, (q15_t)0xa3d7, (q15_t)0x58c1, (q15_t)0xa3c6, (q15_t)0x58af, (q15_t)0xa3b5, (q15_t)0x589d, (q15_t)0xa3a3,
+  (q15_t)0x588b, (q15_t)0xa392, (q15_t)0x5879, (q15_t)0xa380, (q15_t)0x5867, (q15_t)0xa36f, (q15_t)0x5855, (q15_t)0xa35e,
+  (q15_t)0x5842, (q15_t)0xa34c, (q15_t)0x5830, (q15_t)0xa33b, (q15_t)0x581e, (q15_t)0xa32a, (q15_t)0x580c, (q15_t)0xa318,
+  (q15_t)0x57f9, (q15_t)0xa307, (q15_t)0x57e7, (q15_t)0xa2f6, (q15_t)0x57d5, (q15_t)0xa2e5, (q15_t)0x57c3, (q15_t)0xa2d3,
+  (q15_t)0x57b0, (q15_t)0xa2c2, (q15_t)0x579e, (q15_t)0xa2b1, (q15_t)0x578c, (q15_t)0xa2a0, (q15_t)0x5779, (q15_t)0xa28f,
+  (q15_t)0x5767, (q15_t)0xa27d, (q15_t)0x5755, (q15_t)0xa26c, (q15_t)0x5742, (q15_t)0xa25b, (q15_t)0x5730, (q15_t)0xa24a,
+  (q15_t)0x571d, (q15_t)0xa239, (q15_t)0x570b, (q15_t)0xa228, (q15_t)0x56f9, (q15_t)0xa217, (q15_t)0x56e6, (q15_t)0xa206,
+  (q15_t)0x56d4, (q15_t)0xa1f5, (q15_t)0x56c1, (q15_t)0xa1e4, (q15_t)0x56af, (q15_t)0xa1d3, (q15_t)0x569c, (q15_t)0xa1c1,
+  (q15_t)0x568a, (q15_t)0xa1b0, (q15_t)0x5677, (q15_t)0xa1a0, (q15_t)0x5665, (q15_t)0xa18f, (q15_t)0x5652, (q15_t)0xa17e,
+  (q15_t)0x5640, (q15_t)0xa16d, (q15_t)0x562d, (q15_t)0xa15c, (q15_t)0x561a, (q15_t)0xa14b, (q15_t)0x5608, (q15_t)0xa13a,
+  (q15_t)0x55f5, (q15_t)0xa129, (q15_t)0x55e3, (q15_t)0xa118, (q15_t)0x55d0, (q15_t)0xa107, (q15_t)0x55bd, (q15_t)0xa0f6,
+  (q15_t)0x55ab, (q15_t)0xa0e6, (q15_t)0x5598, (q15_t)0xa0d5, (q15_t)0x5585, (q15_t)0xa0c4, (q15_t)0x5572, (q15_t)0xa0b3,
+  (q15_t)0x5560, (q15_t)0xa0a2, (q15_t)0x554d, (q15_t)0xa092, (q15_t)0x553a, (q15_t)0xa081, (q15_t)0x5528, (q15_t)0xa070,
+  (q15_t)0x5515, (q15_t)0xa060, (q15_t)0x5502, (q15_t)0xa04f, (q15_t)0x54ef, (q15_t)0xa03e, (q15_t)0x54dc, (q15_t)0xa02d,
+  (q15_t)0x54ca, (q15_t)0xa01d, (q15_t)0x54b7, (q15_t)0xa00c, (q15_t)0x54a4, (q15_t)0x9ffc, (q15_t)0x5491, (q15_t)0x9feb,
+  (q15_t)0x547e, (q15_t)0x9fda, (q15_t)0x546b, (q15_t)0x9fca, (q15_t)0x5458, (q15_t)0x9fb9, (q15_t)0x5445, (q15_t)0x9fa9,
+  (q15_t)0x5433, (q15_t)0x9f98, (q15_t)0x5420, (q15_t)0x9f88, (q15_t)0x540d, (q15_t)0x9f77, (q15_t)0x53fa, (q15_t)0x9f67,
+  (q15_t)0x53e7, (q15_t)0x9f56, (q15_t)0x53d4, (q15_t)0x9f46, (q15_t)0x53c1, (q15_t)0x9f35, (q15_t)0x53ae, (q15_t)0x9f25,
+  (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x5388, (q15_t)0x9f04, (q15_t)0x5375, (q15_t)0x9ef3, (q15_t)0x5362, (q15_t)0x9ee3,
+  (q15_t)0x534e, (q15_t)0x9ed3, (q15_t)0x533b, (q15_t)0x9ec2, (q15_t)0x5328, (q15_t)0x9eb2, (q15_t)0x5315, (q15_t)0x9ea2,
+  (q15_t)0x5302, (q15_t)0x9e91, (q15_t)0x52ef, (q15_t)0x9e81, (q15_t)0x52dc, (q15_t)0x9e71, (q15_t)0x52c9, (q15_t)0x9e61,
+  (q15_t)0x52b5, (q15_t)0x9e50, (q15_t)0x52a2, (q15_t)0x9e40, (q15_t)0x528f, (q15_t)0x9e30, (q15_t)0x527c, (q15_t)0x9e20,
+  (q15_t)0x5269, (q15_t)0x9e0f, (q15_t)0x5255, (q15_t)0x9dff, (q15_t)0x5242, (q15_t)0x9def, (q15_t)0x522f, (q15_t)0x9ddf,
+  (q15_t)0x521c, (q15_t)0x9dcf, (q15_t)0x5208, (q15_t)0x9dbf, (q15_t)0x51f5, (q15_t)0x9daf, (q15_t)0x51e2, (q15_t)0x9d9f,
+  (q15_t)0x51ce, (q15_t)0x9d8f, (q15_t)0x51bb, (q15_t)0x9d7e, (q15_t)0x51a8, (q15_t)0x9d6e, (q15_t)0x5194, (q15_t)0x9d5e,
+  (q15_t)0x5181, (q15_t)0x9d4e, (q15_t)0x516e, (q15_t)0x9d3e, (q15_t)0x515a, (q15_t)0x9d2e, (q15_t)0x5147, (q15_t)0x9d1e,
+  (q15_t)0x5133, (q15_t)0x9d0e, (q15_t)0x5120, (q15_t)0x9cff, (q15_t)0x510c, (q15_t)0x9cef, (q15_t)0x50f9, (q15_t)0x9cdf,
+  (q15_t)0x50e5, (q15_t)0x9ccf, (q15_t)0x50d2, (q15_t)0x9cbf, (q15_t)0x50bf, (q15_t)0x9caf, (q15_t)0x50ab, (q15_t)0x9c9f,
+  (q15_t)0x5097, (q15_t)0x9c8f, (q15_t)0x5084, (q15_t)0x9c80, (q15_t)0x5070, (q15_t)0x9c70, (q15_t)0x505d, (q15_t)0x9c60,
+  (q15_t)0x5049, (q15_t)0x9c50, (q15_t)0x5036, (q15_t)0x9c40, (q15_t)0x5022, (q15_t)0x9c31, (q15_t)0x500f, (q15_t)0x9c21,
+  (q15_t)0x4ffb, (q15_t)0x9c11, (q15_t)0x4fe7, (q15_t)0x9c02, (q15_t)0x4fd4, (q15_t)0x9bf2, (q15_t)0x4fc0, (q15_t)0x9be2,
+  (q15_t)0x4fac, (q15_t)0x9bd3, (q15_t)0x4f99, (q15_t)0x9bc3, (q15_t)0x4f85, (q15_t)0x9bb3, (q15_t)0x4f71, (q15_t)0x9ba4,
+  (q15_t)0x4f5e, (q15_t)0x9b94, (q15_t)0x4f4a, (q15_t)0x9b85, (q15_t)0x4f36, (q15_t)0x9b75, (q15_t)0x4f22, (q15_t)0x9b65,
+  (q15_t)0x4f0f, (q15_t)0x9b56, (q15_t)0x4efb, (q15_t)0x9b46, (q15_t)0x4ee7, (q15_t)0x9b37, (q15_t)0x4ed3, (q15_t)0x9b27,
+  (q15_t)0x4ebf, (q15_t)0x9b18, (q15_t)0x4eac, (q15_t)0x9b09, (q15_t)0x4e98, (q15_t)0x9af9, (q15_t)0x4e84, (q15_t)0x9aea,
+  (q15_t)0x4e70, (q15_t)0x9ada, (q15_t)0x4e5c, (q15_t)0x9acb, (q15_t)0x4e48, (q15_t)0x9abb, (q15_t)0x4e34, (q15_t)0x9aac,
+  (q15_t)0x4e21, (q15_t)0x9a9d, (q15_t)0x4e0d, (q15_t)0x9a8d, (q15_t)0x4df9, (q15_t)0x9a7e, (q15_t)0x4de5, (q15_t)0x9a6f,
+  (q15_t)0x4dd1, (q15_t)0x9a60, (q15_t)0x4dbd, (q15_t)0x9a50, (q15_t)0x4da9, (q15_t)0x9a41, (q15_t)0x4d95, (q15_t)0x9a32,
+  (q15_t)0x4d81, (q15_t)0x9a23, (q15_t)0x4d6d, (q15_t)0x9a13, (q15_t)0x4d59, (q15_t)0x9a04, (q15_t)0x4d45, (q15_t)0x99f5,
+  (q15_t)0x4d31, (q15_t)0x99e6, (q15_t)0x4d1d, (q15_t)0x99d7, (q15_t)0x4d09, (q15_t)0x99c7, (q15_t)0x4cf5, (q15_t)0x99b8,
+  (q15_t)0x4ce1, (q15_t)0x99a9, (q15_t)0x4ccc, (q15_t)0x999a, (q15_t)0x4cb8, (q15_t)0x998b, (q15_t)0x4ca4, (q15_t)0x997c,
+  (q15_t)0x4c90, (q15_t)0x996d, (q15_t)0x4c7c, (q15_t)0x995e, (q15_t)0x4c68, (q15_t)0x994f, (q15_t)0x4c54, (q15_t)0x9940,
+  (q15_t)0x4c3f, (q15_t)0x9931, (q15_t)0x4c2b, (q15_t)0x9922, (q15_t)0x4c17, (q15_t)0x9913, (q15_t)0x4c03, (q15_t)0x9904,
+  (q15_t)0x4bef, (q15_t)0x98f5, (q15_t)0x4bda, (q15_t)0x98e6, (q15_t)0x4bc6, (q15_t)0x98d7, (q15_t)0x4bb2, (q15_t)0x98c9,
+  (q15_t)0x4b9e, (q15_t)0x98ba, (q15_t)0x4b89, (q15_t)0x98ab, (q15_t)0x4b75, (q15_t)0x989c, (q15_t)0x4b61, (q15_t)0x988d,
+  (q15_t)0x4b4c, (q15_t)0x987e, (q15_t)0x4b38, (q15_t)0x9870, (q15_t)0x4b24, (q15_t)0x9861, (q15_t)0x4b0f, (q15_t)0x9852,
+  (q15_t)0x4afb, (q15_t)0x9843, (q15_t)0x4ae7, (q15_t)0x9835, (q15_t)0x4ad2, (q15_t)0x9826, (q15_t)0x4abe, (q15_t)0x9817,
+  (q15_t)0x4aa9, (q15_t)0x9809, (q15_t)0x4a95, (q15_t)0x97fa, (q15_t)0x4a81, (q15_t)0x97eb, (q15_t)0x4a6c, (q15_t)0x97dd,
+  (q15_t)0x4a58, (q15_t)0x97ce, (q15_t)0x4a43, (q15_t)0x97c0, (q15_t)0x4a2f, (q15_t)0x97b1, (q15_t)0x4a1a, (q15_t)0x97a2,
+  (q15_t)0x4a06, (q15_t)0x9794, (q15_t)0x49f1, (q15_t)0x9785, (q15_t)0x49dd, (q15_t)0x9777, (q15_t)0x49c8, (q15_t)0x9768,
+  (q15_t)0x49b4, (q15_t)0x975a, (q15_t)0x499f, (q15_t)0x974b, (q15_t)0x498a, (q15_t)0x973d, (q15_t)0x4976, (q15_t)0x972f,
+  (q15_t)0x4961, (q15_t)0x9720, (q15_t)0x494d, (q15_t)0x9712, (q15_t)0x4938, (q15_t)0x9703, (q15_t)0x4923, (q15_t)0x96f5,
+  (q15_t)0x490f, (q15_t)0x96e7, (q15_t)0x48fa, (q15_t)0x96d8, (q15_t)0x48e6, (q15_t)0x96ca, (q15_t)0x48d1, (q15_t)0x96bc,
+  (q15_t)0x48bc, (q15_t)0x96ad, (q15_t)0x48a8, (q15_t)0x969f, (q15_t)0x4893, (q15_t)0x9691, (q15_t)0x487e, (q15_t)0x9683,
+  (q15_t)0x4869, (q15_t)0x9674, (q15_t)0x4855, (q15_t)0x9666, (q15_t)0x4840, (q15_t)0x9658, (q15_t)0x482b, (q15_t)0x964a,
+  (q15_t)0x4816, (q15_t)0x963c, (q15_t)0x4802, (q15_t)0x962d, (q15_t)0x47ed, (q15_t)0x961f, (q15_t)0x47d8, (q15_t)0x9611,
+  (q15_t)0x47c3, (q15_t)0x9603, (q15_t)0x47ae, (q15_t)0x95f5, (q15_t)0x479a, (q15_t)0x95e7, (q15_t)0x4785, (q15_t)0x95d9,
+  (q15_t)0x4770, (q15_t)0x95cb, (q15_t)0x475b, (q15_t)0x95bd, (q15_t)0x4746, (q15_t)0x95af, (q15_t)0x4731, (q15_t)0x95a1,
+  (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x4708, (q15_t)0x9585, (q15_t)0x46f3, (q15_t)0x9577, (q15_t)0x46de, (q15_t)0x9569,
+  (q15_t)0x46c9, (q15_t)0x955b, (q15_t)0x46b4, (q15_t)0x954d, (q15_t)0x469f, (q15_t)0x953f, (q15_t)0x468a, (q15_t)0x9532,
+  (q15_t)0x4675, (q15_t)0x9524, (q15_t)0x4660, (q15_t)0x9516, (q15_t)0x464b, (q15_t)0x9508, (q15_t)0x4636, (q15_t)0x94fa,
+  (q15_t)0x4621, (q15_t)0x94ed, (q15_t)0x460c, (q15_t)0x94df, (q15_t)0x45f7, (q15_t)0x94d1, (q15_t)0x45e2, (q15_t)0x94c3,
+  (q15_t)0x45cd, (q15_t)0x94b6, (q15_t)0x45b8, (q15_t)0x94a8, (q15_t)0x45a3, (q15_t)0x949a, (q15_t)0x458d, (q15_t)0x948d,
+  (q15_t)0x4578, (q15_t)0x947f, (q15_t)0x4563, (q15_t)0x9471, (q15_t)0x454e, (q15_t)0x9464, (q15_t)0x4539, (q15_t)0x9456,
+  (q15_t)0x4524, (q15_t)0x9448, (q15_t)0x450f, (q15_t)0x943b, (q15_t)0x44fa, (q15_t)0x942d, (q15_t)0x44e4, (q15_t)0x9420,
+  (q15_t)0x44cf, (q15_t)0x9412, (q15_t)0x44ba, (q15_t)0x9405, (q15_t)0x44a5, (q15_t)0x93f7, (q15_t)0x4490, (q15_t)0x93ea,
+  (q15_t)0x447a, (q15_t)0x93dc, (q15_t)0x4465, (q15_t)0x93cf, (q15_t)0x4450, (q15_t)0x93c1, (q15_t)0x443b, (q15_t)0x93b4,
+  (q15_t)0x4425, (q15_t)0x93a7, (q15_t)0x4410, (q15_t)0x9399, (q15_t)0x43fb, (q15_t)0x938c, (q15_t)0x43e5, (q15_t)0x937f,
+  (q15_t)0x43d0, (q15_t)0x9371, (q15_t)0x43bb, (q15_t)0x9364, (q15_t)0x43a5, (q15_t)0x9357, (q15_t)0x4390, (q15_t)0x9349,
+  (q15_t)0x437b, (q15_t)0x933c, (q15_t)0x4365, (q15_t)0x932f, (q15_t)0x4350, (q15_t)0x9322, (q15_t)0x433b, (q15_t)0x9314,
+  (q15_t)0x4325, (q15_t)0x9307, (q15_t)0x4310, (q15_t)0x92fa, (q15_t)0x42fa, (q15_t)0x92ed, (q15_t)0x42e5, (q15_t)0x92e0,
+  (q15_t)0x42d0, (q15_t)0x92d3, (q15_t)0x42ba, (q15_t)0x92c6, (q15_t)0x42a5, (q15_t)0x92b8, (q15_t)0x428f, (q15_t)0x92ab,
+  (q15_t)0x427a, (q15_t)0x929e, (q15_t)0x4264, (q15_t)0x9291, (q15_t)0x424f, (q15_t)0x9284, (q15_t)0x4239, (q15_t)0x9277,
+  (q15_t)0x4224, (q15_t)0x926a, (q15_t)0x420e, (q15_t)0x925d, (q15_t)0x41f9, (q15_t)0x9250, (q15_t)0x41e3, (q15_t)0x9243,
+  (q15_t)0x41ce, (q15_t)0x9236, (q15_t)0x41b8, (q15_t)0x922a, (q15_t)0x41a2, (q15_t)0x921d, (q15_t)0x418d, (q15_t)0x9210,
+  (q15_t)0x4177, (q15_t)0x9203, (q15_t)0x4162, (q15_t)0x91f6, (q15_t)0x414c, (q15_t)0x91e9, (q15_t)0x4136, (q15_t)0x91dc,
+  (q15_t)0x4121, (q15_t)0x91d0, (q15_t)0x410b, (q15_t)0x91c3, (q15_t)0x40f6, (q15_t)0x91b6, (q15_t)0x40e0, (q15_t)0x91a9,
+  (q15_t)0x40ca, (q15_t)0x919d, (q15_t)0x40b5, (q15_t)0x9190, (q15_t)0x409f, (q15_t)0x9183, (q15_t)0x4089, (q15_t)0x9177,
+  (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x405e, (q15_t)0x915d, (q15_t)0x4048, (q15_t)0x9151, (q15_t)0x4032, (q15_t)0x9144,
+  (q15_t)0x401d, (q15_t)0x9137, (q15_t)0x4007, (q15_t)0x912b, (q15_t)0x3ff1, (q15_t)0x911e, (q15_t)0x3fdb, (q15_t)0x9112,
+  (q15_t)0x3fc5, (q15_t)0x9105, (q15_t)0x3fb0, (q15_t)0x90f9, (q15_t)0x3f9a, (q15_t)0x90ec, (q15_t)0x3f84, (q15_t)0x90e0,
+  (q15_t)0x3f6e, (q15_t)0x90d3, (q15_t)0x3f58, (q15_t)0x90c7, (q15_t)0x3f43, (q15_t)0x90ba, (q15_t)0x3f2d, (q15_t)0x90ae,
+  (q15_t)0x3f17, (q15_t)0x90a1, (q15_t)0x3f01, (q15_t)0x9095, (q15_t)0x3eeb, (q15_t)0x9089, (q15_t)0x3ed5, (q15_t)0x907c,
+  (q15_t)0x3ebf, (q15_t)0x9070, (q15_t)0x3ea9, (q15_t)0x9064, (q15_t)0x3e93, (q15_t)0x9057, (q15_t)0x3e7d, (q15_t)0x904b,
+  (q15_t)0x3e68, (q15_t)0x903f, (q15_t)0x3e52, (q15_t)0x9033, (q15_t)0x3e3c, (q15_t)0x9026, (q15_t)0x3e26, (q15_t)0x901a,
+  (q15_t)0x3e10, (q15_t)0x900e, (q15_t)0x3dfa, (q15_t)0x9002, (q15_t)0x3de4, (q15_t)0x8ff6, (q15_t)0x3dce, (q15_t)0x8fea,
+  (q15_t)0x3db8, (q15_t)0x8fdd, (q15_t)0x3da2, (q15_t)0x8fd1, (q15_t)0x3d8c, (q15_t)0x8fc5, (q15_t)0x3d76, (q15_t)0x8fb9,
+  (q15_t)0x3d60, (q15_t)0x8fad, (q15_t)0x3d49, (q15_t)0x8fa1, (q15_t)0x3d33, (q15_t)0x8f95, (q15_t)0x3d1d, (q15_t)0x8f89,
+  (q15_t)0x3d07, (q15_t)0x8f7d, (q15_t)0x3cf1, (q15_t)0x8f71, (q15_t)0x3cdb, (q15_t)0x8f65, (q15_t)0x3cc5, (q15_t)0x8f59,
+  (q15_t)0x3caf, (q15_t)0x8f4d, (q15_t)0x3c99, (q15_t)0x8f41, (q15_t)0x3c83, (q15_t)0x8f35, (q15_t)0x3c6c, (q15_t)0x8f2a,
+  (q15_t)0x3c56, (q15_t)0x8f1e, (q15_t)0x3c40, (q15_t)0x8f12, (q15_t)0x3c2a, (q15_t)0x8f06, (q15_t)0x3c14, (q15_t)0x8efa,
+  (q15_t)0x3bfd, (q15_t)0x8eee, (q15_t)0x3be7, (q15_t)0x8ee3, (q15_t)0x3bd1, (q15_t)0x8ed7, (q15_t)0x3bbb, (q15_t)0x8ecb,
+  (q15_t)0x3ba5, (q15_t)0x8ebf, (q15_t)0x3b8e, (q15_t)0x8eb4, (q15_t)0x3b78, (q15_t)0x8ea8, (q15_t)0x3b62, (q15_t)0x8e9c,
+  (q15_t)0x3b4c, (q15_t)0x8e91, (q15_t)0x3b35, (q15_t)0x8e85, (q15_t)0x3b1f, (q15_t)0x8e7a, (q15_t)0x3b09, (q15_t)0x8e6e,
+  (q15_t)0x3af2, (q15_t)0x8e62, (q15_t)0x3adc, (q15_t)0x8e57, (q15_t)0x3ac6, (q15_t)0x8e4b, (q15_t)0x3aaf, (q15_t)0x8e40,
+  (q15_t)0x3a99, (q15_t)0x8e34, (q15_t)0x3a83, (q15_t)0x8e29, (q15_t)0x3a6c, (q15_t)0x8e1d, (q15_t)0x3a56, (q15_t)0x8e12,
+  (q15_t)0x3a40, (q15_t)0x8e06, (q15_t)0x3a29, (q15_t)0x8dfb, (q15_t)0x3a13, (q15_t)0x8def, (q15_t)0x39fd, (q15_t)0x8de4,
+  (q15_t)0x39e6, (q15_t)0x8dd9, (q15_t)0x39d0, (q15_t)0x8dcd, (q15_t)0x39b9, (q15_t)0x8dc2, (q15_t)0x39a3, (q15_t)0x8db7,
+  (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3976, (q15_t)0x8da0, (q15_t)0x395f, (q15_t)0x8d95, (q15_t)0x3949, (q15_t)0x8d8a,
+  (q15_t)0x3932, (q15_t)0x8d7e, (q15_t)0x391c, (q15_t)0x8d73, (q15_t)0x3906, (q15_t)0x8d68, (q15_t)0x38ef, (q15_t)0x8d5d,
+  (q15_t)0x38d8, (q15_t)0x8d51, (q15_t)0x38c2, (q15_t)0x8d46, (q15_t)0x38ab, (q15_t)0x8d3b, (q15_t)0x3895, (q15_t)0x8d30,
+  (q15_t)0x387e, (q15_t)0x8d25, (q15_t)0x3868, (q15_t)0x8d1a, (q15_t)0x3851, (q15_t)0x8d0f, (q15_t)0x383b, (q15_t)0x8d04,
+  (q15_t)0x3824, (q15_t)0x8cf9, (q15_t)0x380d, (q15_t)0x8cee, (q15_t)0x37f7, (q15_t)0x8ce3, (q15_t)0x37e0, (q15_t)0x8cd8,
+  (q15_t)0x37ca, (q15_t)0x8ccd, (q15_t)0x37b3, (q15_t)0x8cc2, (q15_t)0x379c, (q15_t)0x8cb7, (q15_t)0x3786, (q15_t)0x8cac,
+  (q15_t)0x376f, (q15_t)0x8ca1, (q15_t)0x3758, (q15_t)0x8c96, (q15_t)0x3742, (q15_t)0x8c8b, (q15_t)0x372b, (q15_t)0x8c81,
+  (q15_t)0x3714, (q15_t)0x8c76, (q15_t)0x36fe, (q15_t)0x8c6b, (q15_t)0x36e7, (q15_t)0x8c60, (q15_t)0x36d0, (q15_t)0x8c55,
+  (q15_t)0x36ba, (q15_t)0x8c4b, (q15_t)0x36a3, (q15_t)0x8c40, (q15_t)0x368c, (q15_t)0x8c35, (q15_t)0x3675, (q15_t)0x8c2a,
+  (q15_t)0x365f, (q15_t)0x8c20, (q15_t)0x3648, (q15_t)0x8c15, (q15_t)0x3631, (q15_t)0x8c0a, (q15_t)0x361a, (q15_t)0x8c00,
+  (q15_t)0x3604, (q15_t)0x8bf5, (q15_t)0x35ed, (q15_t)0x8beb, (q15_t)0x35d6, (q15_t)0x8be0, (q15_t)0x35bf, (q15_t)0x8bd5,
+  (q15_t)0x35a8, (q15_t)0x8bcb, (q15_t)0x3592, (q15_t)0x8bc0, (q15_t)0x357b, (q15_t)0x8bb6, (q15_t)0x3564, (q15_t)0x8bab,
+  (q15_t)0x354d, (q15_t)0x8ba1, (q15_t)0x3536, (q15_t)0x8b96, (q15_t)0x351f, (q15_t)0x8b8c, (q15_t)0x3508, (q15_t)0x8b82,
+  (q15_t)0x34f2, (q15_t)0x8b77, (q15_t)0x34db, (q15_t)0x8b6d, (q15_t)0x34c4, (q15_t)0x8b62, (q15_t)0x34ad, (q15_t)0x8b58,
+  (q15_t)0x3496, (q15_t)0x8b4e, (q15_t)0x347f, (q15_t)0x8b43, (q15_t)0x3468, (q15_t)0x8b39, (q15_t)0x3451, (q15_t)0x8b2f,
+  (q15_t)0x343a, (q15_t)0x8b25, (q15_t)0x3423, (q15_t)0x8b1a, (q15_t)0x340c, (q15_t)0x8b10, (q15_t)0x33f5, (q15_t)0x8b06,
+  (q15_t)0x33de, (q15_t)0x8afc, (q15_t)0x33c7, (q15_t)0x8af1, (q15_t)0x33b0, (q15_t)0x8ae7, (q15_t)0x3399, (q15_t)0x8add,
+  (q15_t)0x3382, (q15_t)0x8ad3, (q15_t)0x336b, (q15_t)0x8ac9, (q15_t)0x3354, (q15_t)0x8abf, (q15_t)0x333d, (q15_t)0x8ab5,
+  (q15_t)0x3326, (q15_t)0x8aab, (q15_t)0x330f, (q15_t)0x8aa1, (q15_t)0x32f8, (q15_t)0x8a97, (q15_t)0x32e1, (q15_t)0x8a8d,
+  (q15_t)0x32ca, (q15_t)0x8a83, (q15_t)0x32b3, (q15_t)0x8a79, (q15_t)0x329c, (q15_t)0x8a6f, (q15_t)0x3285, (q15_t)0x8a65,
+  (q15_t)0x326e, (q15_t)0x8a5b, (q15_t)0x3257, (q15_t)0x8a51, (q15_t)0x3240, (q15_t)0x8a47, (q15_t)0x3228, (q15_t)0x8a3d,
+  (q15_t)0x3211, (q15_t)0x8a34, (q15_t)0x31fa, (q15_t)0x8a2a, (q15_t)0x31e3, (q15_t)0x8a20, (q15_t)0x31cc, (q15_t)0x8a16,
+  (q15_t)0x31b5, (q15_t)0x8a0c, (q15_t)0x319e, (q15_t)0x8a03, (q15_t)0x3186, (q15_t)0x89f9, (q15_t)0x316f, (q15_t)0x89ef,
+  (q15_t)0x3158, (q15_t)0x89e5, (q15_t)0x3141, (q15_t)0x89dc, (q15_t)0x312a, (q15_t)0x89d2, (q15_t)0x3112, (q15_t)0x89c8,
+  (q15_t)0x30fb, (q15_t)0x89bf, (q15_t)0x30e4, (q15_t)0x89b5, (q15_t)0x30cd, (q15_t)0x89ac, (q15_t)0x30b6, (q15_t)0x89a2,
+  (q15_t)0x309e, (q15_t)0x8998, (q15_t)0x3087, (q15_t)0x898f, (q15_t)0x3070, (q15_t)0x8985, (q15_t)0x3059, (q15_t)0x897c,
+  (q15_t)0x3041, (q15_t)0x8972, (q15_t)0x302a, (q15_t)0x8969, (q15_t)0x3013, (q15_t)0x8960, (q15_t)0x2ffb, (q15_t)0x8956,
+  (q15_t)0x2fe4, (q15_t)0x894d, (q15_t)0x2fcd, (q15_t)0x8943, (q15_t)0x2fb5, (q15_t)0x893a, (q15_t)0x2f9e, (q15_t)0x8931,
+  (q15_t)0x2f87, (q15_t)0x8927, (q15_t)0x2f6f, (q15_t)0x891e, (q15_t)0x2f58, (q15_t)0x8915, (q15_t)0x2f41, (q15_t)0x890b,
+  (q15_t)0x2f29, (q15_t)0x8902, (q15_t)0x2f12, (q15_t)0x88f9, (q15_t)0x2efb, (q15_t)0x88f0, (q15_t)0x2ee3, (q15_t)0x88e6,
+  (q15_t)0x2ecc, (q15_t)0x88dd, (q15_t)0x2eb5, (q15_t)0x88d4, (q15_t)0x2e9d, (q15_t)0x88cb, (q15_t)0x2e86, (q15_t)0x88c2,
+  (q15_t)0x2e6e, (q15_t)0x88b9, (q15_t)0x2e57, (q15_t)0x88af, (q15_t)0x2e3f, (q15_t)0x88a6, (q15_t)0x2e28, (q15_t)0x889d,
+  (q15_t)0x2e11, (q15_t)0x8894, (q15_t)0x2df9, (q15_t)0x888b, (q15_t)0x2de2, (q15_t)0x8882, (q15_t)0x2dca, (q15_t)0x8879,
+  (q15_t)0x2db3, (q15_t)0x8870, (q15_t)0x2d9b, (q15_t)0x8867, (q15_t)0x2d84, (q15_t)0x885e, (q15_t)0x2d6c, (q15_t)0x8855,
+  (q15_t)0x2d55, (q15_t)0x884c, (q15_t)0x2d3d, (q15_t)0x8844, (q15_t)0x2d26, (q15_t)0x883b, (q15_t)0x2d0e, (q15_t)0x8832,
+  (q15_t)0x2cf7, (q15_t)0x8829, (q15_t)0x2cdf, (q15_t)0x8820, (q15_t)0x2cc8, (q15_t)0x8817, (q15_t)0x2cb0, (q15_t)0x880f,
+  (q15_t)0x2c98, (q15_t)0x8806, (q15_t)0x2c81, (q15_t)0x87fd, (q15_t)0x2c69, (q15_t)0x87f4, (q15_t)0x2c52, (q15_t)0x87ec,
+  (q15_t)0x2c3a, (q15_t)0x87e3, (q15_t)0x2c23, (q15_t)0x87da, (q15_t)0x2c0b, (q15_t)0x87d2, (q15_t)0x2bf3, (q15_t)0x87c9,
+  (q15_t)0x2bdc, (q15_t)0x87c0, (q15_t)0x2bc4, (q15_t)0x87b8, (q15_t)0x2bad, (q15_t)0x87af, (q15_t)0x2b95, (q15_t)0x87a7,
+  (q15_t)0x2b7d, (q15_t)0x879e, (q15_t)0x2b66, (q15_t)0x8795, (q15_t)0x2b4e, (q15_t)0x878d, (q15_t)0x2b36, (q15_t)0x8784,
+  (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x2b07, (q15_t)0x8774, (q15_t)0x2aef, (q15_t)0x876b, (q15_t)0x2ad8, (q15_t)0x8763,
+  (q15_t)0x2ac0, (q15_t)0x875a, (q15_t)0x2aa8, (q15_t)0x8752, (q15_t)0x2a91, (q15_t)0x874a, (q15_t)0x2a79, (q15_t)0x8741,
+  (q15_t)0x2a61, (q15_t)0x8739, (q15_t)0x2a49, (q15_t)0x8731, (q15_t)0x2a32, (q15_t)0x8728, (q15_t)0x2a1a, (q15_t)0x8720,
+  (q15_t)0x2a02, (q15_t)0x8718, (q15_t)0x29eb, (q15_t)0x870f, (q15_t)0x29d3, (q15_t)0x8707, (q15_t)0x29bb, (q15_t)0x86ff,
+  (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x298b, (q15_t)0x86ef, (q15_t)0x2974, (q15_t)0x86e7, (q15_t)0x295c, (q15_t)0x86de,
+  (q15_t)0x2944, (q15_t)0x86d6, (q15_t)0x292c, (q15_t)0x86ce, (q15_t)0x2915, (q15_t)0x86c6, (q15_t)0x28fd, (q15_t)0x86be,
+  (q15_t)0x28e5, (q15_t)0x86b6, (q15_t)0x28cd, (q15_t)0x86ae, (q15_t)0x28b5, (q15_t)0x86a6, (q15_t)0x289d, (q15_t)0x869e,
+  (q15_t)0x2886, (q15_t)0x8696, (q15_t)0x286e, (q15_t)0x868e, (q15_t)0x2856, (q15_t)0x8686, (q15_t)0x283e, (q15_t)0x867e,
+  (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x280e, (q15_t)0x866e, (q15_t)0x27f6, (q15_t)0x8667, (q15_t)0x27df, (q15_t)0x865f,
+  (q15_t)0x27c7, (q15_t)0x8657, (q15_t)0x27af, (q15_t)0x864f, (q15_t)0x2797, (q15_t)0x8647, (q15_t)0x277f, (q15_t)0x8640,
+  (q15_t)0x2767, (q15_t)0x8638, (q15_t)0x274f, (q15_t)0x8630, (q15_t)0x2737, (q15_t)0x8628, (q15_t)0x271f, (q15_t)0x8621,
+  (q15_t)0x2707, (q15_t)0x8619, (q15_t)0x26ef, (q15_t)0x8611, (q15_t)0x26d8, (q15_t)0x860a, (q15_t)0x26c0, (q15_t)0x8602,
+  (q15_t)0x26a8, (q15_t)0x85fb, (q15_t)0x2690, (q15_t)0x85f3, (q15_t)0x2678, (q15_t)0x85eb, (q15_t)0x2660, (q15_t)0x85e4,
+  (q15_t)0x2648, (q15_t)0x85dc, (q15_t)0x2630, (q15_t)0x85d5, (q15_t)0x2618, (q15_t)0x85cd, (q15_t)0x2600, (q15_t)0x85c6,
+  (q15_t)0x25e8, (q15_t)0x85be, (q15_t)0x25d0, (q15_t)0x85b7, (q15_t)0x25b8, (q15_t)0x85b0, (q15_t)0x25a0, (q15_t)0x85a8,
+  (q15_t)0x2588, (q15_t)0x85a1, (q15_t)0x2570, (q15_t)0x8599, (q15_t)0x2558, (q15_t)0x8592, (q15_t)0x2540, (q15_t)0x858b,
+  (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x250f, (q15_t)0x857c, (q15_t)0x24f7, (q15_t)0x8575, (q15_t)0x24df, (q15_t)0x856e,
+  (q15_t)0x24c7, (q15_t)0x8566, (q15_t)0x24af, (q15_t)0x855f, (q15_t)0x2497, (q15_t)0x8558, (q15_t)0x247f, (q15_t)0x8551,
+  (q15_t)0x2467, (q15_t)0x854a, (q15_t)0x244f, (q15_t)0x8543, (q15_t)0x2437, (q15_t)0x853b, (q15_t)0x241f, (q15_t)0x8534,
+  (q15_t)0x2407, (q15_t)0x852d, (q15_t)0x23ee, (q15_t)0x8526, (q15_t)0x23d6, (q15_t)0x851f, (q15_t)0x23be, (q15_t)0x8518,
+  (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x238e, (q15_t)0x850a, (q15_t)0x2376, (q15_t)0x8503, (q15_t)0x235e, (q15_t)0x84fc,
+  (q15_t)0x2345, (q15_t)0x84f5, (q15_t)0x232d, (q15_t)0x84ee, (q15_t)0x2315, (q15_t)0x84e7, (q15_t)0x22fd, (q15_t)0x84e1,
+  (q15_t)0x22e5, (q15_t)0x84da, (q15_t)0x22cd, (q15_t)0x84d3, (q15_t)0x22b4, (q15_t)0x84cc, (q15_t)0x229c, (q15_t)0x84c5,
+  (q15_t)0x2284, (q15_t)0x84be, (q15_t)0x226c, (q15_t)0x84b8, (q15_t)0x2254, (q15_t)0x84b1, (q15_t)0x223b, (q15_t)0x84aa,
+  (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x220b, (q15_t)0x849d, (q15_t)0x21f3, (q15_t)0x8496, (q15_t)0x21da, (q15_t)0x848f,
+  (q15_t)0x21c2, (q15_t)0x8489, (q15_t)0x21aa, (q15_t)0x8482, (q15_t)0x2192, (q15_t)0x847c, (q15_t)0x2179, (q15_t)0x8475,
+  (q15_t)0x2161, (q15_t)0x846e, (q15_t)0x2149, (q15_t)0x8468, (q15_t)0x2131, (q15_t)0x8461, (q15_t)0x2118, (q15_t)0x845b,
+  (q15_t)0x2100, (q15_t)0x8454, (q15_t)0x20e8, (q15_t)0x844e, (q15_t)0x20d0, (q15_t)0x8447, (q15_t)0x20b7, (q15_t)0x8441,
+  (q15_t)0x209f, (q15_t)0x843b, (q15_t)0x2087, (q15_t)0x8434, (q15_t)0x206e, (q15_t)0x842e, (q15_t)0x2056, (q15_t)0x8427,
+  (q15_t)0x203e, (q15_t)0x8421, (q15_t)0x2025, (q15_t)0x841b, (q15_t)0x200d, (q15_t)0x8415, (q15_t)0x1ff5, (q15_t)0x840e,
+  (q15_t)0x1fdc, (q15_t)0x8408, (q15_t)0x1fc4, (q15_t)0x8402, (q15_t)0x1fac, (q15_t)0x83fb, (q15_t)0x1f93, (q15_t)0x83f5,
+  (q15_t)0x1f7b, (q15_t)0x83ef, (q15_t)0x1f63, (q15_t)0x83e9, (q15_t)0x1f4a, (q15_t)0x83e3, (q15_t)0x1f32, (q15_t)0x83dd,
+  (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1f01, (q15_t)0x83d0, (q15_t)0x1ee9, (q15_t)0x83ca, (q15_t)0x1ed0, (q15_t)0x83c4,
+  (q15_t)0x1eb8, (q15_t)0x83be, (q15_t)0x1ea0, (q15_t)0x83b8, (q15_t)0x1e87, (q15_t)0x83b2, (q15_t)0x1e6f, (q15_t)0x83ac,
+  (q15_t)0x1e56, (q15_t)0x83a6, (q15_t)0x1e3e, (q15_t)0x83a0, (q15_t)0x1e25, (q15_t)0x839a, (q15_t)0x1e0d, (q15_t)0x8394,
+  (q15_t)0x1df5, (q15_t)0x838f, (q15_t)0x1ddc, (q15_t)0x8389, (q15_t)0x1dc4, (q15_t)0x8383, (q15_t)0x1dab, (q15_t)0x837d,
+  (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1d7a, (q15_t)0x8371, (q15_t)0x1d62, (q15_t)0x836c, (q15_t)0x1d49, (q15_t)0x8366,
+  (q15_t)0x1d31, (q15_t)0x8360, (q15_t)0x1d18, (q15_t)0x835a, (q15_t)0x1d00, (q15_t)0x8355, (q15_t)0x1ce8, (q15_t)0x834f,
+  (q15_t)0x1ccf, (q15_t)0x8349, (q15_t)0x1cb7, (q15_t)0x8344, (q15_t)0x1c9e, (q15_t)0x833e, (q15_t)0x1c86, (q15_t)0x8338,
+  (q15_t)0x1c6d, (q15_t)0x8333, (q15_t)0x1c55, (q15_t)0x832d, (q15_t)0x1c3c, (q15_t)0x8328, (q15_t)0x1c24, (q15_t)0x8322,
+  (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1bf2, (q15_t)0x8317, (q15_t)0x1bda, (q15_t)0x8312, (q15_t)0x1bc1, (q15_t)0x830c,
+  (q15_t)0x1ba9, (q15_t)0x8307, (q15_t)0x1b90, (q15_t)0x8301, (q15_t)0x1b78, (q15_t)0x82fc, (q15_t)0x1b5f, (q15_t)0x82f7,
+  (q15_t)0x1b47, (q15_t)0x82f1, (q15_t)0x1b2e, (q15_t)0x82ec, (q15_t)0x1b16, (q15_t)0x82e7, (q15_t)0x1afd, (q15_t)0x82e1,
+  (q15_t)0x1ae4, (q15_t)0x82dc, (q15_t)0x1acc, (q15_t)0x82d7, (q15_t)0x1ab3, (q15_t)0x82d1, (q15_t)0x1a9b, (q15_t)0x82cc,
+  (q15_t)0x1a82, (q15_t)0x82c7, (q15_t)0x1a6a, (q15_t)0x82c2, (q15_t)0x1a51, (q15_t)0x82bd, (q15_t)0x1a38, (q15_t)0x82b7,
+  (q15_t)0x1a20, (q15_t)0x82b2, (q15_t)0x1a07, (q15_t)0x82ad, (q15_t)0x19ef, (q15_t)0x82a8, (q15_t)0x19d6, (q15_t)0x82a3,
+  (q15_t)0x19bd, (q15_t)0x829e, (q15_t)0x19a5, (q15_t)0x8299, (q15_t)0x198c, (q15_t)0x8294, (q15_t)0x1973, (q15_t)0x828f,
+  (q15_t)0x195b, (q15_t)0x828a, (q15_t)0x1942, (q15_t)0x8285, (q15_t)0x192a, (q15_t)0x8280, (q15_t)0x1911, (q15_t)0x827b,
+  (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x18e0, (q15_t)0x8271, (q15_t)0x18c7, (q15_t)0x826c, (q15_t)0x18ae, (q15_t)0x8268,
+  (q15_t)0x1896, (q15_t)0x8263, (q15_t)0x187d, (q15_t)0x825e, (q15_t)0x1864, (q15_t)0x8259, (q15_t)0x184c, (q15_t)0x8254,
+  (q15_t)0x1833, (q15_t)0x8250, (q15_t)0x181a, (q15_t)0x824b, (q15_t)0x1802, (q15_t)0x8246, (q15_t)0x17e9, (q15_t)0x8241,
+  (q15_t)0x17d0, (q15_t)0x823d, (q15_t)0x17b7, (q15_t)0x8238, (q15_t)0x179f, (q15_t)0x8233, (q15_t)0x1786, (q15_t)0x822f,
+  (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x1755, (q15_t)0x8226, (q15_t)0x173c, (q15_t)0x8221, (q15_t)0x1723, (q15_t)0x821c,
+  (q15_t)0x170a, (q15_t)0x8218, (q15_t)0x16f2, (q15_t)0x8213, (q15_t)0x16d9, (q15_t)0x820f, (q15_t)0x16c0, (q15_t)0x820a,
+  (q15_t)0x16a8, (q15_t)0x8206, (q15_t)0x168f, (q15_t)0x8201, (q15_t)0x1676, (q15_t)0x81fd, (q15_t)0x165d, (q15_t)0x81f9,
+  (q15_t)0x1645, (q15_t)0x81f4, (q15_t)0x162c, (q15_t)0x81f0, (q15_t)0x1613, (q15_t)0x81ec, (q15_t)0x15fa, (q15_t)0x81e7,
+  (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x15c9, (q15_t)0x81df, (q15_t)0x15b0, (q15_t)0x81da, (q15_t)0x1597, (q15_t)0x81d6,
+  (q15_t)0x157f, (q15_t)0x81d2, (q15_t)0x1566, (q15_t)0x81ce, (q15_t)0x154d, (q15_t)0x81c9, (q15_t)0x1534, (q15_t)0x81c5,
+  (q15_t)0x151b, (q15_t)0x81c1, (q15_t)0x1503, (q15_t)0x81bd, (q15_t)0x14ea, (q15_t)0x81b9, (q15_t)0x14d1, (q15_t)0x81b5,
+  (q15_t)0x14b8, (q15_t)0x81b1, (q15_t)0x149f, (q15_t)0x81ad, (q15_t)0x1487, (q15_t)0x81a9, (q15_t)0x146e, (q15_t)0x81a5,
+  (q15_t)0x1455, (q15_t)0x81a1, (q15_t)0x143c, (q15_t)0x819d, (q15_t)0x1423, (q15_t)0x8199, (q15_t)0x140b, (q15_t)0x8195,
+  (q15_t)0x13f2, (q15_t)0x8191, (q15_t)0x13d9, (q15_t)0x818d, (q15_t)0x13c0, (q15_t)0x8189, (q15_t)0x13a7, (q15_t)0x8185,
+  (q15_t)0x138e, (q15_t)0x8181, (q15_t)0x1376, (q15_t)0x817d, (q15_t)0x135d, (q15_t)0x817a, (q15_t)0x1344, (q15_t)0x8176,
+  (q15_t)0x132b, (q15_t)0x8172, (q15_t)0x1312, (q15_t)0x816e, (q15_t)0x12f9, (q15_t)0x816b, (q15_t)0x12e0, (q15_t)0x8167,
+  (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x12af, (q15_t)0x815f, (q15_t)0x1296, (q15_t)0x815c, (q15_t)0x127d, (q15_t)0x8158,
+  (q15_t)0x1264, (q15_t)0x8155, (q15_t)0x124b, (q15_t)0x8151, (q15_t)0x1232, (q15_t)0x814d, (q15_t)0x1219, (q15_t)0x814a,
+  (q15_t)0x1201, (q15_t)0x8146, (q15_t)0x11e8, (q15_t)0x8143, (q15_t)0x11cf, (q15_t)0x813f, (q15_t)0x11b6, (q15_t)0x813c,
+  (q15_t)0x119d, (q15_t)0x8138, (q15_t)0x1184, (q15_t)0x8135, (q15_t)0x116b, (q15_t)0x8131, (q15_t)0x1152, (q15_t)0x812e,
+  (q15_t)0x1139, (q15_t)0x812b, (q15_t)0x1121, (q15_t)0x8127, (q15_t)0x1108, (q15_t)0x8124, (q15_t)0x10ef, (q15_t)0x8121,
+  (q15_t)0x10d6, (q15_t)0x811d, (q15_t)0x10bd, (q15_t)0x811a, (q15_t)0x10a4, (q15_t)0x8117, (q15_t)0x108b, (q15_t)0x8113,
+  (q15_t)0x1072, (q15_t)0x8110, (q15_t)0x1059, (q15_t)0x810d, (q15_t)0x1040, (q15_t)0x810a, (q15_t)0x1027, (q15_t)0x8107,
+  (q15_t)0x100e, (q15_t)0x8103, (q15_t)0xff5, (q15_t)0x8100, (q15_t)0xfdd, (q15_t)0x80fd, (q15_t)0xfc4, (q15_t)0x80fa,
+  (q15_t)0xfab, (q15_t)0x80f7, (q15_t)0xf92, (q15_t)0x80f4, (q15_t)0xf79, (q15_t)0x80f1, (q15_t)0xf60, (q15_t)0x80ee,
+  (q15_t)0xf47, (q15_t)0x80eb, (q15_t)0xf2e, (q15_t)0x80e8, (q15_t)0xf15, (q15_t)0x80e5, (q15_t)0xefc, (q15_t)0x80e2,
+  (q15_t)0xee3, (q15_t)0x80df, (q15_t)0xeca, (q15_t)0x80dc, (q15_t)0xeb1, (q15_t)0x80d9, (q15_t)0xe98, (q15_t)0x80d6,
+  (q15_t)0xe7f, (q15_t)0x80d3, (q15_t)0xe66, (q15_t)0x80d1, (q15_t)0xe4d, (q15_t)0x80ce, (q15_t)0xe34, (q15_t)0x80cb,
+  (q15_t)0xe1b, (q15_t)0x80c8, (q15_t)0xe02, (q15_t)0x80c5, (q15_t)0xde9, (q15_t)0x80c3, (q15_t)0xdd0, (q15_t)0x80c0,
+  (q15_t)0xdb7, (q15_t)0x80bd, (q15_t)0xd9e, (q15_t)0x80bb, (q15_t)0xd85, (q15_t)0x80b8, (q15_t)0xd6c, (q15_t)0x80b5,
+  (q15_t)0xd53, (q15_t)0x80b3, (q15_t)0xd3a, (q15_t)0x80b0, (q15_t)0xd21, (q15_t)0x80ad, (q15_t)0xd08, (q15_t)0x80ab,
+  (q15_t)0xcef, (q15_t)0x80a8, (q15_t)0xcd6, (q15_t)0x80a6, (q15_t)0xcbd, (q15_t)0x80a3, (q15_t)0xca4, (q15_t)0x80a1,
+  (q15_t)0xc8b, (q15_t)0x809e, (q15_t)0xc72, (q15_t)0x809c, (q15_t)0xc59, (q15_t)0x8099, (q15_t)0xc40, (q15_t)0x8097,
+  (q15_t)0xc27, (q15_t)0x8095, (q15_t)0xc0e, (q15_t)0x8092, (q15_t)0xbf5, (q15_t)0x8090, (q15_t)0xbdc, (q15_t)0x808e,
+  (q15_t)0xbc3, (q15_t)0x808b, (q15_t)0xbaa, (q15_t)0x8089, (q15_t)0xb91, (q15_t)0x8087, (q15_t)0xb78, (q15_t)0x8084,
+  (q15_t)0xb5f, (q15_t)0x8082, (q15_t)0xb46, (q15_t)0x8080, (q15_t)0xb2d, (q15_t)0x807e, (q15_t)0xb14, (q15_t)0x807b,
+  (q15_t)0xafb, (q15_t)0x8079, (q15_t)0xae2, (q15_t)0x8077, (q15_t)0xac9, (q15_t)0x8075, (q15_t)0xab0, (q15_t)0x8073,
+  (q15_t)0xa97, (q15_t)0x8071, (q15_t)0xa7e, (q15_t)0x806f, (q15_t)0xa65, (q15_t)0x806d, (q15_t)0xa4c, (q15_t)0x806b,
+  (q15_t)0xa33, (q15_t)0x8069, (q15_t)0xa19, (q15_t)0x8067, (q15_t)0xa00, (q15_t)0x8065, (q15_t)0x9e7, (q15_t)0x8063,
+  (q15_t)0x9ce, (q15_t)0x8061, (q15_t)0x9b5, (q15_t)0x805f, (q15_t)0x99c, (q15_t)0x805d, (q15_t)0x983, (q15_t)0x805b,
+  (q15_t)0x96a, (q15_t)0x8059, (q15_t)0x951, (q15_t)0x8057, (q15_t)0x938, (q15_t)0x8056, (q15_t)0x91f, (q15_t)0x8054,
+  (q15_t)0x906, (q15_t)0x8052, (q15_t)0x8ed, (q15_t)0x8050, (q15_t)0x8d4, (q15_t)0x804f, (q15_t)0x8bb, (q15_t)0x804d,
+  (q15_t)0x8a2, (q15_t)0x804b, (q15_t)0x888, (q15_t)0x8049, (q15_t)0x86f, (q15_t)0x8048, (q15_t)0x856, (q15_t)0x8046,
+  (q15_t)0x83d, (q15_t)0x8044, (q15_t)0x824, (q15_t)0x8043, (q15_t)0x80b, (q15_t)0x8041, (q15_t)0x7f2, (q15_t)0x8040,
+  (q15_t)0x7d9, (q15_t)0x803e, (q15_t)0x7c0, (q15_t)0x803d, (q15_t)0x7a7, (q15_t)0x803b, (q15_t)0x78e, (q15_t)0x803a,
+  (q15_t)0x775, (q15_t)0x8038, (q15_t)0x75b, (q15_t)0x8037, (q15_t)0x742, (q15_t)0x8035, (q15_t)0x729, (q15_t)0x8034,
+  (q15_t)0x710, (q15_t)0x8032, (q15_t)0x6f7, (q15_t)0x8031, (q15_t)0x6de, (q15_t)0x8030, (q15_t)0x6c5, (q15_t)0x802e,
+  (q15_t)0x6ac, (q15_t)0x802d, (q15_t)0x693, (q15_t)0x802c, (q15_t)0x67a, (q15_t)0x802a, (q15_t)0x660, (q15_t)0x8029,
+  (q15_t)0x647, (q15_t)0x8028, (q15_t)0x62e, (q15_t)0x8027, (q15_t)0x615, (q15_t)0x8026, (q15_t)0x5fc, (q15_t)0x8024,
+  (q15_t)0x5e3, (q15_t)0x8023, (q15_t)0x5ca, (q15_t)0x8022, (q15_t)0x5b1, (q15_t)0x8021, (q15_t)0x598, (q15_t)0x8020,
+  (q15_t)0x57f, (q15_t)0x801f, (q15_t)0x565, (q15_t)0x801e, (q15_t)0x54c, (q15_t)0x801d, (q15_t)0x533, (q15_t)0x801c,
+  (q15_t)0x51a, (q15_t)0x801b, (q15_t)0x501, (q15_t)0x801a, (q15_t)0x4e8, (q15_t)0x8019, (q15_t)0x4cf, (q15_t)0x8018,
+  (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x49c, (q15_t)0x8016, (q15_t)0x483, (q15_t)0x8015, (q15_t)0x46a, (q15_t)0x8014,
+  (q15_t)0x451, (q15_t)0x8013, (q15_t)0x438, (q15_t)0x8012, (q15_t)0x41f, (q15_t)0x8012, (q15_t)0x406, (q15_t)0x8011,
+  (q15_t)0x3ed, (q15_t)0x8010, (q15_t)0x3d4, (q15_t)0x800f, (q15_t)0x3ba, (q15_t)0x800e, (q15_t)0x3a1, (q15_t)0x800e,
+  (q15_t)0x388, (q15_t)0x800d, (q15_t)0x36f, (q15_t)0x800c, (q15_t)0x356, (q15_t)0x800c, (q15_t)0x33d, (q15_t)0x800b,
+  (q15_t)0x324, (q15_t)0x800a, (q15_t)0x30b, (q15_t)0x800a, (q15_t)0x2f1, (q15_t)0x8009, (q15_t)0x2d8, (q15_t)0x8009,
+  (q15_t)0x2bf, (q15_t)0x8008, (q15_t)0x2a6, (q15_t)0x8008, (q15_t)0x28d, (q15_t)0x8007, (q15_t)0x274, (q15_t)0x8007,
+  (q15_t)0x25b, (q15_t)0x8006, (q15_t)0x242, (q15_t)0x8006, (q15_t)0x228, (q15_t)0x8005, (q15_t)0x20f, (q15_t)0x8005,
+  (q15_t)0x1f6, (q15_t)0x8004, (q15_t)0x1dd, (q15_t)0x8004, (q15_t)0x1c4, (q15_t)0x8004, (q15_t)0x1ab, (q15_t)0x8003,
+  (q15_t)0x192, (q15_t)0x8003, (q15_t)0x178, (q15_t)0x8003, (q15_t)0x15f, (q15_t)0x8002, (q15_t)0x146, (q15_t)0x8002,
+  (q15_t)0x12d, (q15_t)0x8002, (q15_t)0x114, (q15_t)0x8002, (q15_t)0xfb, (q15_t)0x8001, (q15_t)0xe2, (q15_t)0x8001,
+  (q15_t)0xc9, (q15_t)0x8001, (q15_t)0xaf, (q15_t)0x8001, (q15_t)0x96, (q15_t)0x8001, (q15_t)0x7d, (q15_t)0x8001,
+  (q15_t)0x64, (q15_t)0x8001, (q15_t)0x4b, (q15_t)0x8001, (q15_t)0x32, (q15_t)0x8001, (q15_t)0x19, (q15_t)0x8001
+};
+    const q15_t __ALIGNED(4) cos_factorsQ15_2048[2048] = {
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffd, (q15_t)0x7ffd,
+  (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffa,
+  (q15_t)0x7ffa, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff6,
+  (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff4, (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff2, (q15_t)0x7ff1, (q15_t)0x7ff0,
+  (q15_t)0x7ff0, (q15_t)0x7fef, (q15_t)0x7fee, (q15_t)0x7fed, (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7feb, (q15_t)0x7fea,
+  (q15_t)0x7fe9, (q15_t)0x7fe8, (q15_t)0x7fe7, (q15_t)0x7fe6, (q15_t)0x7fe5, (q15_t)0x7fe4, (q15_t)0x7fe3, (q15_t)0x7fe2,
+  (q15_t)0x7fe1, (q15_t)0x7fe0, (q15_t)0x7fdf, (q15_t)0x7fdd, (q15_t)0x7fdc, (q15_t)0x7fdb, (q15_t)0x7fda, (q15_t)0x7fd9,
+  (q15_t)0x7fd7, (q15_t)0x7fd6, (q15_t)0x7fd5, (q15_t)0x7fd4, (q15_t)0x7fd2, (q15_t)0x7fd1, (q15_t)0x7fd0, (q15_t)0x7fce,
+  (q15_t)0x7fcd, (q15_t)0x7fcb, (q15_t)0x7fca, (q15_t)0x7fc9, (q15_t)0x7fc7, (q15_t)0x7fc6, (q15_t)0x7fc4, (q15_t)0x7fc3,
+  (q15_t)0x7fc1, (q15_t)0x7fc0, (q15_t)0x7fbe, (q15_t)0x7fbc, (q15_t)0x7fbb, (q15_t)0x7fb9, (q15_t)0x7fb7, (q15_t)0x7fb6,
+  (q15_t)0x7fb4, (q15_t)0x7fb2, (q15_t)0x7fb1, (q15_t)0x7faf, (q15_t)0x7fad, (q15_t)0x7fab, (q15_t)0x7fa9, (q15_t)0x7fa8,
+  (q15_t)0x7fa6, (q15_t)0x7fa4, (q15_t)0x7fa2, (q15_t)0x7fa0, (q15_t)0x7f9e, (q15_t)0x7f9c, (q15_t)0x7f9a, (q15_t)0x7f98,
+  (q15_t)0x7f96, (q15_t)0x7f94, (q15_t)0x7f92, (q15_t)0x7f90, (q15_t)0x7f8e, (q15_t)0x7f8c, (q15_t)0x7f8a, (q15_t)0x7f88,
+  (q15_t)0x7f86, (q15_t)0x7f83, (q15_t)0x7f81, (q15_t)0x7f7f, (q15_t)0x7f7d, (q15_t)0x7f7b, (q15_t)0x7f78, (q15_t)0x7f76,
+  (q15_t)0x7f74, (q15_t)0x7f71, (q15_t)0x7f6f, (q15_t)0x7f6d, (q15_t)0x7f6a, (q15_t)0x7f68, (q15_t)0x7f65, (q15_t)0x7f63,
+  (q15_t)0x7f60, (q15_t)0x7f5e, (q15_t)0x7f5b, (q15_t)0x7f59, (q15_t)0x7f56, (q15_t)0x7f54, (q15_t)0x7f51, (q15_t)0x7f4f,
+  (q15_t)0x7f4c, (q15_t)0x7f49, (q15_t)0x7f47, (q15_t)0x7f44, (q15_t)0x7f41, (q15_t)0x7f3f, (q15_t)0x7f3c, (q15_t)0x7f39,
+  (q15_t)0x7f36, (q15_t)0x7f34, (q15_t)0x7f31, (q15_t)0x7f2e, (q15_t)0x7f2b, (q15_t)0x7f28, (q15_t)0x7f25, (q15_t)0x7f23,
+  (q15_t)0x7f20, (q15_t)0x7f1d, (q15_t)0x7f1a, (q15_t)0x7f17, (q15_t)0x7f14, (q15_t)0x7f11, (q15_t)0x7f0e, (q15_t)0x7f0b,
+  (q15_t)0x7f08, (q15_t)0x7f04, (q15_t)0x7f01, (q15_t)0x7efe, (q15_t)0x7efb, (q15_t)0x7ef8, (q15_t)0x7ef5, (q15_t)0x7ef1,
+  (q15_t)0x7eee, (q15_t)0x7eeb, (q15_t)0x7ee8, (q15_t)0x7ee4, (q15_t)0x7ee1, (q15_t)0x7ede, (q15_t)0x7eda, (q15_t)0x7ed7,
+  (q15_t)0x7ed4, (q15_t)0x7ed0, (q15_t)0x7ecd, (q15_t)0x7ec9, (q15_t)0x7ec6, (q15_t)0x7ec3, (q15_t)0x7ebf, (q15_t)0x7ebb,
+  (q15_t)0x7eb8, (q15_t)0x7eb4, (q15_t)0x7eb1, (q15_t)0x7ead, (q15_t)0x7eaa, (q15_t)0x7ea6, (q15_t)0x7ea2, (q15_t)0x7e9f,
+  (q15_t)0x7e9b, (q15_t)0x7e97, (q15_t)0x7e94, (q15_t)0x7e90, (q15_t)0x7e8c, (q15_t)0x7e88, (q15_t)0x7e84, (q15_t)0x7e81,
+  (q15_t)0x7e7d, (q15_t)0x7e79, (q15_t)0x7e75, (q15_t)0x7e71, (q15_t)0x7e6d, (q15_t)0x7e69, (q15_t)0x7e65, (q15_t)0x7e61,
+  (q15_t)0x7e5d, (q15_t)0x7e59, (q15_t)0x7e55, (q15_t)0x7e51, (q15_t)0x7e4d, (q15_t)0x7e49, (q15_t)0x7e45, (q15_t)0x7e41,
+  (q15_t)0x7e3d, (q15_t)0x7e39, (q15_t)0x7e34, (q15_t)0x7e30, (q15_t)0x7e2c, (q15_t)0x7e28, (q15_t)0x7e24, (q15_t)0x7e1f,
+  (q15_t)0x7e1b, (q15_t)0x7e17, (q15_t)0x7e12, (q15_t)0x7e0e, (q15_t)0x7e0a, (q15_t)0x7e05, (q15_t)0x7e01, (q15_t)0x7dfc,
+  (q15_t)0x7df8, (q15_t)0x7df3, (q15_t)0x7def, (q15_t)0x7dea, (q15_t)0x7de6, (q15_t)0x7de1, (q15_t)0x7ddd, (q15_t)0x7dd8,
+  (q15_t)0x7dd4, (q15_t)0x7dcf, (q15_t)0x7dca, (q15_t)0x7dc6, (q15_t)0x7dc1, (q15_t)0x7dbc, (q15_t)0x7db8, (q15_t)0x7db3,
+  (q15_t)0x7dae, (q15_t)0x7da9, (q15_t)0x7da5, (q15_t)0x7da0, (q15_t)0x7d9b, (q15_t)0x7d96, (q15_t)0x7d91, (q15_t)0x7d8c,
+  (q15_t)0x7d87, (q15_t)0x7d82, (q15_t)0x7d7e, (q15_t)0x7d79, (q15_t)0x7d74, (q15_t)0x7d6f, (q15_t)0x7d6a, (q15_t)0x7d65,
+  (q15_t)0x7d60, (q15_t)0x7d5a, (q15_t)0x7d55, (q15_t)0x7d50, (q15_t)0x7d4b, (q15_t)0x7d46, (q15_t)0x7d41, (q15_t)0x7d3c,
+  (q15_t)0x7d36, (q15_t)0x7d31, (q15_t)0x7d2c, (q15_t)0x7d27, (q15_t)0x7d21, (q15_t)0x7d1c, (q15_t)0x7d17, (q15_t)0x7d11,
+  (q15_t)0x7d0c, (q15_t)0x7d07, (q15_t)0x7d01, (q15_t)0x7cfc, (q15_t)0x7cf6, (q15_t)0x7cf1, (q15_t)0x7cec, (q15_t)0x7ce6,
+  (q15_t)0x7ce1, (q15_t)0x7cdb, (q15_t)0x7cd5, (q15_t)0x7cd0, (q15_t)0x7cca, (q15_t)0x7cc5, (q15_t)0x7cbf, (q15_t)0x7cb9,
+  (q15_t)0x7cb4, (q15_t)0x7cae, (q15_t)0x7ca8, (q15_t)0x7ca3, (q15_t)0x7c9d, (q15_t)0x7c97, (q15_t)0x7c91, (q15_t)0x7c8c,
+  (q15_t)0x7c86, (q15_t)0x7c80, (q15_t)0x7c7a, (q15_t)0x7c74, (q15_t)0x7c6e, (q15_t)0x7c69, (q15_t)0x7c63, (q15_t)0x7c5d,
+  (q15_t)0x7c57, (q15_t)0x7c51, (q15_t)0x7c4b, (q15_t)0x7c45, (q15_t)0x7c3f, (q15_t)0x7c39, (q15_t)0x7c33, (q15_t)0x7c2d,
+  (q15_t)0x7c26, (q15_t)0x7c20, (q15_t)0x7c1a, (q15_t)0x7c14, (q15_t)0x7c0e, (q15_t)0x7c08, (q15_t)0x7c01, (q15_t)0x7bfb,
+  (q15_t)0x7bf5, (q15_t)0x7bef, (q15_t)0x7be8, (q15_t)0x7be2, (q15_t)0x7bdc, (q15_t)0x7bd5, (q15_t)0x7bcf, (q15_t)0x7bc9,
+  (q15_t)0x7bc2, (q15_t)0x7bbc, (q15_t)0x7bb5, (q15_t)0x7baf, (q15_t)0x7ba8, (q15_t)0x7ba2, (q15_t)0x7b9b, (q15_t)0x7b95,
+  (q15_t)0x7b8e, (q15_t)0x7b88, (q15_t)0x7b81, (q15_t)0x7b7a, (q15_t)0x7b74, (q15_t)0x7b6d, (q15_t)0x7b67, (q15_t)0x7b60,
+  (q15_t)0x7b59, (q15_t)0x7b52, (q15_t)0x7b4c, (q15_t)0x7b45, (q15_t)0x7b3e, (q15_t)0x7b37, (q15_t)0x7b31, (q15_t)0x7b2a,
+  (q15_t)0x7b23, (q15_t)0x7b1c, (q15_t)0x7b15, (q15_t)0x7b0e, (q15_t)0x7b07, (q15_t)0x7b00, (q15_t)0x7af9, (q15_t)0x7af2,
+  (q15_t)0x7aeb, (q15_t)0x7ae4, (q15_t)0x7add, (q15_t)0x7ad6, (q15_t)0x7acf, (q15_t)0x7ac8, (q15_t)0x7ac1, (q15_t)0x7aba,
+  (q15_t)0x7ab3, (q15_t)0x7aac, (q15_t)0x7aa4, (q15_t)0x7a9d, (q15_t)0x7a96, (q15_t)0x7a8f, (q15_t)0x7a87, (q15_t)0x7a80,
+  (q15_t)0x7a79, (q15_t)0x7a72, (q15_t)0x7a6a, (q15_t)0x7a63, (q15_t)0x7a5c, (q15_t)0x7a54, (q15_t)0x7a4d, (q15_t)0x7a45,
+  (q15_t)0x7a3e, (q15_t)0x7a36, (q15_t)0x7a2f, (q15_t)0x7a27, (q15_t)0x7a20, (q15_t)0x7a18, (q15_t)0x7a11, (q15_t)0x7a09,
+  (q15_t)0x7a02, (q15_t)0x79fa, (q15_t)0x79f2, (q15_t)0x79eb, (q15_t)0x79e3, (q15_t)0x79db, (q15_t)0x79d4, (q15_t)0x79cc,
+  (q15_t)0x79c4, (q15_t)0x79bc, (q15_t)0x79b5, (q15_t)0x79ad, (q15_t)0x79a5, (q15_t)0x799d, (q15_t)0x7995, (q15_t)0x798e,
+  (q15_t)0x7986, (q15_t)0x797e, (q15_t)0x7976, (q15_t)0x796e, (q15_t)0x7966, (q15_t)0x795e, (q15_t)0x7956, (q15_t)0x794e,
+  (q15_t)0x7946, (q15_t)0x793e, (q15_t)0x7936, (q15_t)0x792e, (q15_t)0x7926, (q15_t)0x791e, (q15_t)0x7915, (q15_t)0x790d,
+  (q15_t)0x7905, (q15_t)0x78fd, (q15_t)0x78f5, (q15_t)0x78ec, (q15_t)0x78e4, (q15_t)0x78dc, (q15_t)0x78d4, (q15_t)0x78cb,
+  (q15_t)0x78c3, (q15_t)0x78bb, (q15_t)0x78b2, (q15_t)0x78aa, (q15_t)0x78a2, (q15_t)0x7899, (q15_t)0x7891, (q15_t)0x7888,
+  (q15_t)0x7880, (q15_t)0x7877, (q15_t)0x786f, (q15_t)0x7866, (q15_t)0x785e, (q15_t)0x7855, (q15_t)0x784d, (q15_t)0x7844,
+  (q15_t)0x783b, (q15_t)0x7833, (q15_t)0x782a, (q15_t)0x7821, (q15_t)0x7819, (q15_t)0x7810, (q15_t)0x7807, (q15_t)0x77ff,
+  (q15_t)0x77f6, (q15_t)0x77ed, (q15_t)0x77e4, (q15_t)0x77db, (q15_t)0x77d3, (q15_t)0x77ca, (q15_t)0x77c1, (q15_t)0x77b8,
+  (q15_t)0x77af, (q15_t)0x77a6, (q15_t)0x779d, (q15_t)0x7794, (q15_t)0x778b, (q15_t)0x7782, (q15_t)0x7779, (q15_t)0x7770,
+  (q15_t)0x7767, (q15_t)0x775e, (q15_t)0x7755, (q15_t)0x774c, (q15_t)0x7743, (q15_t)0x773a, (q15_t)0x7731, (q15_t)0x7727,
+  (q15_t)0x771e, (q15_t)0x7715, (q15_t)0x770c, (q15_t)0x7703, (q15_t)0x76f9, (q15_t)0x76f0, (q15_t)0x76e7, (q15_t)0x76dd,
+  (q15_t)0x76d4, (q15_t)0x76cb, (q15_t)0x76c1, (q15_t)0x76b8, (q15_t)0x76af, (q15_t)0x76a5, (q15_t)0x769c, (q15_t)0x7692,
+  (q15_t)0x7689, (q15_t)0x767f, (q15_t)0x7676, (q15_t)0x766c, (q15_t)0x7663, (q15_t)0x7659, (q15_t)0x7650, (q15_t)0x7646,
+  (q15_t)0x763c, (q15_t)0x7633, (q15_t)0x7629, (q15_t)0x761f, (q15_t)0x7616, (q15_t)0x760c, (q15_t)0x7602, (q15_t)0x75f9,
+  (q15_t)0x75ef, (q15_t)0x75e5, (q15_t)0x75db, (q15_t)0x75d1, (q15_t)0x75c8, (q15_t)0x75be, (q15_t)0x75b4, (q15_t)0x75aa,
+  (q15_t)0x75a0, (q15_t)0x7596, (q15_t)0x758c, (q15_t)0x7582, (q15_t)0x7578, (q15_t)0x756e, (q15_t)0x7564, (q15_t)0x755a,
+  (q15_t)0x7550, (q15_t)0x7546, (q15_t)0x753c, (q15_t)0x7532, (q15_t)0x7528, (q15_t)0x751e, (q15_t)0x7514, (q15_t)0x7509,
+  (q15_t)0x74ff, (q15_t)0x74f5, (q15_t)0x74eb, (q15_t)0x74e1, (q15_t)0x74d6, (q15_t)0x74cc, (q15_t)0x74c2, (q15_t)0x74b7,
+  (q15_t)0x74ad, (q15_t)0x74a3, (q15_t)0x7498, (q15_t)0x748e, (q15_t)0x7484, (q15_t)0x7479, (q15_t)0x746f, (q15_t)0x7464,
+  (q15_t)0x745a, (q15_t)0x744f, (q15_t)0x7445, (q15_t)0x743a, (q15_t)0x7430, (q15_t)0x7425, (q15_t)0x741b, (q15_t)0x7410,
+  (q15_t)0x7406, (q15_t)0x73fb, (q15_t)0x73f0, (q15_t)0x73e6, (q15_t)0x73db, (q15_t)0x73d0, (q15_t)0x73c6, (q15_t)0x73bb,
+  (q15_t)0x73b0, (q15_t)0x73a5, (q15_t)0x739b, (q15_t)0x7390, (q15_t)0x7385, (q15_t)0x737a, (q15_t)0x736f, (q15_t)0x7364,
+  (q15_t)0x7359, (q15_t)0x734f, (q15_t)0x7344, (q15_t)0x7339, (q15_t)0x732e, (q15_t)0x7323, (q15_t)0x7318, (q15_t)0x730d,
+  (q15_t)0x7302, (q15_t)0x72f7, (q15_t)0x72ec, (q15_t)0x72e1, (q15_t)0x72d5, (q15_t)0x72ca, (q15_t)0x72bf, (q15_t)0x72b4,
+  (q15_t)0x72a9, (q15_t)0x729e, (q15_t)0x7293, (q15_t)0x7287, (q15_t)0x727c, (q15_t)0x7271, (q15_t)0x7266, (q15_t)0x725a,
+  (q15_t)0x724f, (q15_t)0x7244, (q15_t)0x7238, (q15_t)0x722d, (q15_t)0x7222, (q15_t)0x7216, (q15_t)0x720b, (q15_t)0x71ff,
+  (q15_t)0x71f4, (q15_t)0x71e9, (q15_t)0x71dd, (q15_t)0x71d2, (q15_t)0x71c6, (q15_t)0x71bb, (q15_t)0x71af, (q15_t)0x71a3,
+  (q15_t)0x7198, (q15_t)0x718c, (q15_t)0x7181, (q15_t)0x7175, (q15_t)0x7169, (q15_t)0x715e, (q15_t)0x7152, (q15_t)0x7146,
+  (q15_t)0x713b, (q15_t)0x712f, (q15_t)0x7123, (q15_t)0x7117, (q15_t)0x710c, (q15_t)0x7100, (q15_t)0x70f4, (q15_t)0x70e8,
+  (q15_t)0x70dc, (q15_t)0x70d1, (q15_t)0x70c5, (q15_t)0x70b9, (q15_t)0x70ad, (q15_t)0x70a1, (q15_t)0x7095, (q15_t)0x7089,
+  (q15_t)0x707d, (q15_t)0x7071, (q15_t)0x7065, (q15_t)0x7059, (q15_t)0x704d, (q15_t)0x7041, (q15_t)0x7035, (q15_t)0x7029,
+  (q15_t)0x701d, (q15_t)0x7010, (q15_t)0x7004, (q15_t)0x6ff8, (q15_t)0x6fec, (q15_t)0x6fe0, (q15_t)0x6fd3, (q15_t)0x6fc7,
+  (q15_t)0x6fbb, (q15_t)0x6faf, (q15_t)0x6fa2, (q15_t)0x6f96, (q15_t)0x6f8a, (q15_t)0x6f7d, (q15_t)0x6f71, (q15_t)0x6f65,
+  (q15_t)0x6f58, (q15_t)0x6f4c, (q15_t)0x6f3f, (q15_t)0x6f33, (q15_t)0x6f27, (q15_t)0x6f1a, (q15_t)0x6f0e, (q15_t)0x6f01,
+  (q15_t)0x6ef5, (q15_t)0x6ee8, (q15_t)0x6edc, (q15_t)0x6ecf, (q15_t)0x6ec2, (q15_t)0x6eb6, (q15_t)0x6ea9, (q15_t)0x6e9c,
+  (q15_t)0x6e90, (q15_t)0x6e83, (q15_t)0x6e76, (q15_t)0x6e6a, (q15_t)0x6e5d, (q15_t)0x6e50, (q15_t)0x6e44, (q15_t)0x6e37,
+  (q15_t)0x6e2a, (q15_t)0x6e1d, (q15_t)0x6e10, (q15_t)0x6e04, (q15_t)0x6df7, (q15_t)0x6dea, (q15_t)0x6ddd, (q15_t)0x6dd0,
+  (q15_t)0x6dc3, (q15_t)0x6db6, (q15_t)0x6da9, (q15_t)0x6d9c, (q15_t)0x6d8f, (q15_t)0x6d82, (q15_t)0x6d75, (q15_t)0x6d68,
+  (q15_t)0x6d5b, (q15_t)0x6d4e, (q15_t)0x6d41, (q15_t)0x6d34, (q15_t)0x6d27, (q15_t)0x6d1a, (q15_t)0x6d0c, (q15_t)0x6cff,
+  (q15_t)0x6cf2, (q15_t)0x6ce5, (q15_t)0x6cd8, (q15_t)0x6cca, (q15_t)0x6cbd, (q15_t)0x6cb0, (q15_t)0x6ca3, (q15_t)0x6c95,
+  (q15_t)0x6c88, (q15_t)0x6c7b, (q15_t)0x6c6d, (q15_t)0x6c60, (q15_t)0x6c53, (q15_t)0x6c45, (q15_t)0x6c38, (q15_t)0x6c2a,
+  (q15_t)0x6c1d, (q15_t)0x6c0f, (q15_t)0x6c02, (q15_t)0x6bf5, (q15_t)0x6be7, (q15_t)0x6bd9, (q15_t)0x6bcc, (q15_t)0x6bbe,
+  (q15_t)0x6bb1, (q15_t)0x6ba3, (q15_t)0x6b96, (q15_t)0x6b88, (q15_t)0x6b7a, (q15_t)0x6b6d, (q15_t)0x6b5f, (q15_t)0x6b51,
+  (q15_t)0x6b44, (q15_t)0x6b36, (q15_t)0x6b28, (q15_t)0x6b1a, (q15_t)0x6b0d, (q15_t)0x6aff, (q15_t)0x6af1, (q15_t)0x6ae3,
+  (q15_t)0x6ad5, (q15_t)0x6ac8, (q15_t)0x6aba, (q15_t)0x6aac, (q15_t)0x6a9e, (q15_t)0x6a90, (q15_t)0x6a82, (q15_t)0x6a74,
+  (q15_t)0x6a66, (q15_t)0x6a58, (q15_t)0x6a4a, (q15_t)0x6a3c, (q15_t)0x6a2e, (q15_t)0x6a20, (q15_t)0x6a12, (q15_t)0x6a04,
+  (q15_t)0x69f6, (q15_t)0x69e8, (q15_t)0x69da, (q15_t)0x69cb, (q15_t)0x69bd, (q15_t)0x69af, (q15_t)0x69a1, (q15_t)0x6993,
+  (q15_t)0x6985, (q15_t)0x6976, (q15_t)0x6968, (q15_t)0x695a, (q15_t)0x694b, (q15_t)0x693d, (q15_t)0x692f, (q15_t)0x6921,
+  (q15_t)0x6912, (q15_t)0x6904, (q15_t)0x68f5, (q15_t)0x68e7, (q15_t)0x68d9, (q15_t)0x68ca, (q15_t)0x68bc, (q15_t)0x68ad,
+  (q15_t)0x689f, (q15_t)0x6890, (q15_t)0x6882, (q15_t)0x6873, (q15_t)0x6865, (q15_t)0x6856, (q15_t)0x6848, (q15_t)0x6839,
+  (q15_t)0x682b, (q15_t)0x681c, (q15_t)0x680d, (q15_t)0x67ff, (q15_t)0x67f0, (q15_t)0x67e1, (q15_t)0x67d3, (q15_t)0x67c4,
+  (q15_t)0x67b5, (q15_t)0x67a6, (q15_t)0x6798, (q15_t)0x6789, (q15_t)0x677a, (q15_t)0x676b, (q15_t)0x675d, (q15_t)0x674e,
+  (q15_t)0x673f, (q15_t)0x6730, (q15_t)0x6721, (q15_t)0x6712, (q15_t)0x6703, (q15_t)0x66f4, (q15_t)0x66e5, (q15_t)0x66d6,
+  (q15_t)0x66c8, (q15_t)0x66b9, (q15_t)0x66aa, (q15_t)0x669b, (q15_t)0x668b, (q15_t)0x667c, (q15_t)0x666d, (q15_t)0x665e,
+  (q15_t)0x664f, (q15_t)0x6640, (q15_t)0x6631, (q15_t)0x6622, (q15_t)0x6613, (q15_t)0x6603, (q15_t)0x65f4, (q15_t)0x65e5,
+  (q15_t)0x65d6, (q15_t)0x65c7, (q15_t)0x65b7, (q15_t)0x65a8, (q15_t)0x6599, (q15_t)0x658a, (q15_t)0x657a, (q15_t)0x656b,
+  (q15_t)0x655c, (q15_t)0x654c, (q15_t)0x653d, (q15_t)0x652d, (q15_t)0x651e, (q15_t)0x650f, (q15_t)0x64ff, (q15_t)0x64f0,
+  (q15_t)0x64e0, (q15_t)0x64d1, (q15_t)0x64c1, (q15_t)0x64b2, (q15_t)0x64a2, (q15_t)0x6493, (q15_t)0x6483, (q15_t)0x6474,
+  (q15_t)0x6464, (q15_t)0x6454, (q15_t)0x6445, (q15_t)0x6435, (q15_t)0x6426, (q15_t)0x6416, (q15_t)0x6406, (q15_t)0x63f7,
+  (q15_t)0x63e7, (q15_t)0x63d7, (q15_t)0x63c7, (q15_t)0x63b8, (q15_t)0x63a8, (q15_t)0x6398, (q15_t)0x6388, (q15_t)0x6378,
+  (q15_t)0x6369, (q15_t)0x6359, (q15_t)0x6349, (q15_t)0x6339, (q15_t)0x6329, (q15_t)0x6319, (q15_t)0x6309, (q15_t)0x62f9,
+  (q15_t)0x62ea, (q15_t)0x62da, (q15_t)0x62ca, (q15_t)0x62ba, (q15_t)0x62aa, (q15_t)0x629a, (q15_t)0x628a, (q15_t)0x627a,
+  (q15_t)0x6269, (q15_t)0x6259, (q15_t)0x6249, (q15_t)0x6239, (q15_t)0x6229, (q15_t)0x6219, (q15_t)0x6209, (q15_t)0x61f9,
+  (q15_t)0x61e8, (q15_t)0x61d8, (q15_t)0x61c8, (q15_t)0x61b8, (q15_t)0x61a8, (q15_t)0x6197, (q15_t)0x6187, (q15_t)0x6177,
+  (q15_t)0x6166, (q15_t)0x6156, (q15_t)0x6146, (q15_t)0x6135, (q15_t)0x6125, (q15_t)0x6115, (q15_t)0x6104, (q15_t)0x60f4,
+  (q15_t)0x60e4, (q15_t)0x60d3, (q15_t)0x60c3, (q15_t)0x60b2, (q15_t)0x60a2, (q15_t)0x6091, (q15_t)0x6081, (q15_t)0x6070,
+  (q15_t)0x6060, (q15_t)0x604f, (q15_t)0x603f, (q15_t)0x602e, (q15_t)0x601d, (q15_t)0x600d, (q15_t)0x5ffc, (q15_t)0x5fec,
+  (q15_t)0x5fdb, (q15_t)0x5fca, (q15_t)0x5fba, (q15_t)0x5fa9, (q15_t)0x5f98, (q15_t)0x5f87, (q15_t)0x5f77, (q15_t)0x5f66,
+  (q15_t)0x5f55, (q15_t)0x5f44, (q15_t)0x5f34, (q15_t)0x5f23, (q15_t)0x5f12, (q15_t)0x5f01, (q15_t)0x5ef0, (q15_t)0x5edf,
+  (q15_t)0x5ecf, (q15_t)0x5ebe, (q15_t)0x5ead, (q15_t)0x5e9c, (q15_t)0x5e8b, (q15_t)0x5e7a, (q15_t)0x5e69, (q15_t)0x5e58,
+  (q15_t)0x5e47, (q15_t)0x5e36, (q15_t)0x5e25, (q15_t)0x5e14, (q15_t)0x5e03, (q15_t)0x5df2, (q15_t)0x5de1, (q15_t)0x5dd0,
+  (q15_t)0x5dbf, (q15_t)0x5dad, (q15_t)0x5d9c, (q15_t)0x5d8b, (q15_t)0x5d7a, (q15_t)0x5d69, (q15_t)0x5d58, (q15_t)0x5d46,
+  (q15_t)0x5d35, (q15_t)0x5d24, (q15_t)0x5d13, (q15_t)0x5d01, (q15_t)0x5cf0, (q15_t)0x5cdf, (q15_t)0x5cce, (q15_t)0x5cbc,
+  (q15_t)0x5cab, (q15_t)0x5c9a, (q15_t)0x5c88, (q15_t)0x5c77, (q15_t)0x5c66, (q15_t)0x5c54, (q15_t)0x5c43, (q15_t)0x5c31,
+  (q15_t)0x5c20, (q15_t)0x5c0e, (q15_t)0x5bfd, (q15_t)0x5beb, (q15_t)0x5bda, (q15_t)0x5bc8, (q15_t)0x5bb7, (q15_t)0x5ba5,
+  (q15_t)0x5b94, (q15_t)0x5b82, (q15_t)0x5b71, (q15_t)0x5b5f, (q15_t)0x5b4d, (q15_t)0x5b3c, (q15_t)0x5b2a, (q15_t)0x5b19,
+  (q15_t)0x5b07, (q15_t)0x5af5, (q15_t)0x5ae4, (q15_t)0x5ad2, (q15_t)0x5ac0, (q15_t)0x5aae, (q15_t)0x5a9d, (q15_t)0x5a8b,
+  (q15_t)0x5a79, (q15_t)0x5a67, (q15_t)0x5a56, (q15_t)0x5a44, (q15_t)0x5a32, (q15_t)0x5a20, (q15_t)0x5a0e, (q15_t)0x59fc,
+  (q15_t)0x59ea, (q15_t)0x59d9, (q15_t)0x59c7, (q15_t)0x59b5, (q15_t)0x59a3, (q15_t)0x5991, (q15_t)0x597f, (q15_t)0x596d,
+  (q15_t)0x595b, (q15_t)0x5949, (q15_t)0x5937, (q15_t)0x5925, (q15_t)0x5913, (q15_t)0x5901, (q15_t)0x58ef, (q15_t)0x58dd,
+  (q15_t)0x58cb, (q15_t)0x58b8, (q15_t)0x58a6, (q15_t)0x5894, (q15_t)0x5882, (q15_t)0x5870, (q15_t)0x585e, (q15_t)0x584b,
+  (q15_t)0x5839, (q15_t)0x5827, (q15_t)0x5815, (q15_t)0x5803, (q15_t)0x57f0, (q15_t)0x57de, (q15_t)0x57cc, (q15_t)0x57b9,
+  (q15_t)0x57a7, (q15_t)0x5795, (q15_t)0x5783, (q15_t)0x5770, (q15_t)0x575e, (q15_t)0x574b, (q15_t)0x5739, (q15_t)0x5727,
+  (q15_t)0x5714, (q15_t)0x5702, (q15_t)0x56ef, (q15_t)0x56dd, (q15_t)0x56ca, (q15_t)0x56b8, (q15_t)0x56a5, (q15_t)0x5693,
+  (q15_t)0x5680, (q15_t)0x566e, (q15_t)0x565b, (q15_t)0x5649, (q15_t)0x5636, (q15_t)0x5624, (q15_t)0x5611, (q15_t)0x55fe,
+  (q15_t)0x55ec, (q15_t)0x55d9, (q15_t)0x55c7, (q15_t)0x55b4, (q15_t)0x55a1, (q15_t)0x558f, (q15_t)0x557c, (q15_t)0x5569,
+  (q15_t)0x5556, (q15_t)0x5544, (q15_t)0x5531, (q15_t)0x551e, (q15_t)0x550b, (q15_t)0x54f9, (q15_t)0x54e6, (q15_t)0x54d3,
+  (q15_t)0x54c0, (q15_t)0x54ad, (q15_t)0x549a, (q15_t)0x5488, (q15_t)0x5475, (q15_t)0x5462, (q15_t)0x544f, (q15_t)0x543c,
+  (q15_t)0x5429, (q15_t)0x5416, (q15_t)0x5403, (q15_t)0x53f0, (q15_t)0x53dd, (q15_t)0x53ca, (q15_t)0x53b7, (q15_t)0x53a4,
+  (q15_t)0x5391, (q15_t)0x537e, (q15_t)0x536b, (q15_t)0x5358, (q15_t)0x5345, (q15_t)0x5332, (q15_t)0x531f, (q15_t)0x530c,
+  (q15_t)0x52f8, (q15_t)0x52e5, (q15_t)0x52d2, (q15_t)0x52bf, (q15_t)0x52ac, (q15_t)0x5299, (q15_t)0x5285, (q15_t)0x5272,
+  (q15_t)0x525f, (q15_t)0x524c, (q15_t)0x5238, (q15_t)0x5225, (q15_t)0x5212, (q15_t)0x51ff, (q15_t)0x51eb, (q15_t)0x51d8,
+  (q15_t)0x51c5, (q15_t)0x51b1, (q15_t)0x519e, (q15_t)0x518b, (q15_t)0x5177, (q15_t)0x5164, (q15_t)0x5150, (q15_t)0x513d,
+  (q15_t)0x512a, (q15_t)0x5116, (q15_t)0x5103, (q15_t)0x50ef, (q15_t)0x50dc, (q15_t)0x50c8, (q15_t)0x50b5, (q15_t)0x50a1,
+  (q15_t)0x508e, (q15_t)0x507a, (q15_t)0x5067, (q15_t)0x5053, (q15_t)0x503f, (q15_t)0x502c, (q15_t)0x5018, (q15_t)0x5005,
+  (q15_t)0x4ff1, (q15_t)0x4fdd, (q15_t)0x4fca, (q15_t)0x4fb6, (q15_t)0x4fa2, (q15_t)0x4f8f, (q15_t)0x4f7b, (q15_t)0x4f67,
+  (q15_t)0x4f54, (q15_t)0x4f40, (q15_t)0x4f2c, (q15_t)0x4f18, (q15_t)0x4f05, (q15_t)0x4ef1, (q15_t)0x4edd, (q15_t)0x4ec9,
+  (q15_t)0x4eb6, (q15_t)0x4ea2, (q15_t)0x4e8e, (q15_t)0x4e7a, (q15_t)0x4e66, (q15_t)0x4e52, (q15_t)0x4e3e, (q15_t)0x4e2a,
+  (q15_t)0x4e17, (q15_t)0x4e03, (q15_t)0x4def, (q15_t)0x4ddb, (q15_t)0x4dc7, (q15_t)0x4db3, (q15_t)0x4d9f, (q15_t)0x4d8b,
+  (q15_t)0x4d77, (q15_t)0x4d63, (q15_t)0x4d4f, (q15_t)0x4d3b, (q15_t)0x4d27, (q15_t)0x4d13, (q15_t)0x4cff, (q15_t)0x4ceb,
+  (q15_t)0x4cd6, (q15_t)0x4cc2, (q15_t)0x4cae, (q15_t)0x4c9a, (q15_t)0x4c86, (q15_t)0x4c72, (q15_t)0x4c5e, (q15_t)0x4c49,
+  (q15_t)0x4c35, (q15_t)0x4c21, (q15_t)0x4c0d, (q15_t)0x4bf9, (q15_t)0x4be4, (q15_t)0x4bd0, (q15_t)0x4bbc, (q15_t)0x4ba8,
+  (q15_t)0x4b93, (q15_t)0x4b7f, (q15_t)0x4b6b, (q15_t)0x4b56, (q15_t)0x4b42, (q15_t)0x4b2e, (q15_t)0x4b19, (q15_t)0x4b05,
+  (q15_t)0x4af1, (q15_t)0x4adc, (q15_t)0x4ac8, (q15_t)0x4ab4, (q15_t)0x4a9f, (q15_t)0x4a8b, (q15_t)0x4a76, (q15_t)0x4a62,
+  (q15_t)0x4a4d, (q15_t)0x4a39, (q15_t)0x4a24, (q15_t)0x4a10, (q15_t)0x49fb, (q15_t)0x49e7, (q15_t)0x49d2, (q15_t)0x49be,
+  (q15_t)0x49a9, (q15_t)0x4995, (q15_t)0x4980, (q15_t)0x496c, (q15_t)0x4957, (q15_t)0x4942, (q15_t)0x492e, (q15_t)0x4919,
+  (q15_t)0x4905, (q15_t)0x48f0, (q15_t)0x48db, (q15_t)0x48c7, (q15_t)0x48b2, (q15_t)0x489d, (q15_t)0x4888, (q15_t)0x4874,
+  (q15_t)0x485f, (q15_t)0x484a, (q15_t)0x4836, (q15_t)0x4821, (q15_t)0x480c, (q15_t)0x47f7, (q15_t)0x47e2, (q15_t)0x47ce,
+  (q15_t)0x47b9, (q15_t)0x47a4, (q15_t)0x478f, (q15_t)0x477a, (q15_t)0x4765, (q15_t)0x4751, (q15_t)0x473c, (q15_t)0x4727,
+  (q15_t)0x4712, (q15_t)0x46fd, (q15_t)0x46e8, (q15_t)0x46d3, (q15_t)0x46be, (q15_t)0x46a9, (q15_t)0x4694, (q15_t)0x467f,
+  (q15_t)0x466a, (q15_t)0x4655, (q15_t)0x4640, (q15_t)0x462b, (q15_t)0x4616, (q15_t)0x4601, (q15_t)0x45ec, (q15_t)0x45d7,
+  (q15_t)0x45c2, (q15_t)0x45ad, (q15_t)0x4598, (q15_t)0x4583, (q15_t)0x456e, (q15_t)0x4559, (q15_t)0x4544, (q15_t)0x452e,
+  (q15_t)0x4519, (q15_t)0x4504, (q15_t)0x44ef, (q15_t)0x44da, (q15_t)0x44c5, (q15_t)0x44af, (q15_t)0x449a, (q15_t)0x4485,
+  (q15_t)0x4470, (q15_t)0x445a, (q15_t)0x4445, (q15_t)0x4430, (q15_t)0x441b, (q15_t)0x4405, (q15_t)0x43f0, (q15_t)0x43db,
+  (q15_t)0x43c5, (q15_t)0x43b0, (q15_t)0x439b, (q15_t)0x4385, (q15_t)0x4370, (q15_t)0x435b, (q15_t)0x4345, (q15_t)0x4330,
+  (q15_t)0x431b, (q15_t)0x4305, (q15_t)0x42f0, (q15_t)0x42da, (q15_t)0x42c5, (q15_t)0x42af, (q15_t)0x429a, (q15_t)0x4284,
+  (q15_t)0x426f, (q15_t)0x425a, (q15_t)0x4244, (q15_t)0x422f, (q15_t)0x4219, (q15_t)0x4203, (q15_t)0x41ee, (q15_t)0x41d8,
+  (q15_t)0x41c3, (q15_t)0x41ad, (q15_t)0x4198, (q15_t)0x4182, (q15_t)0x416d, (q15_t)0x4157, (q15_t)0x4141, (q15_t)0x412c,
+  (q15_t)0x4116, (q15_t)0x4100, (q15_t)0x40eb, (q15_t)0x40d5, (q15_t)0x40bf, (q15_t)0x40aa, (q15_t)0x4094, (q15_t)0x407e,
+  (q15_t)0x4069, (q15_t)0x4053, (q15_t)0x403d, (q15_t)0x4027, (q15_t)0x4012, (q15_t)0x3ffc, (q15_t)0x3fe6, (q15_t)0x3fd0,
+  (q15_t)0x3fbb, (q15_t)0x3fa5, (q15_t)0x3f8f, (q15_t)0x3f79, (q15_t)0x3f63, (q15_t)0x3f4d, (q15_t)0x3f38, (q15_t)0x3f22,
+  (q15_t)0x3f0c, (q15_t)0x3ef6, (q15_t)0x3ee0, (q15_t)0x3eca, (q15_t)0x3eb4, (q15_t)0x3e9e, (q15_t)0x3e88, (q15_t)0x3e73,
+  (q15_t)0x3e5d, (q15_t)0x3e47, (q15_t)0x3e31, (q15_t)0x3e1b, (q15_t)0x3e05, (q15_t)0x3def, (q15_t)0x3dd9, (q15_t)0x3dc3,
+  (q15_t)0x3dad, (q15_t)0x3d97, (q15_t)0x3d81, (q15_t)0x3d6b, (q15_t)0x3d55, (q15_t)0x3d3e, (q15_t)0x3d28, (q15_t)0x3d12,
+  (q15_t)0x3cfc, (q15_t)0x3ce6, (q15_t)0x3cd0, (q15_t)0x3cba, (q15_t)0x3ca4, (q15_t)0x3c8e, (q15_t)0x3c77, (q15_t)0x3c61,
+  (q15_t)0x3c4b, (q15_t)0x3c35, (q15_t)0x3c1f, (q15_t)0x3c09, (q15_t)0x3bf2, (q15_t)0x3bdc, (q15_t)0x3bc6, (q15_t)0x3bb0,
+  (q15_t)0x3b99, (q15_t)0x3b83, (q15_t)0x3b6d, (q15_t)0x3b57, (q15_t)0x3b40, (q15_t)0x3b2a, (q15_t)0x3b14, (q15_t)0x3afe,
+  (q15_t)0x3ae7, (q15_t)0x3ad1, (q15_t)0x3abb, (q15_t)0x3aa4, (q15_t)0x3a8e, (q15_t)0x3a78, (q15_t)0x3a61, (q15_t)0x3a4b,
+  (q15_t)0x3a34, (q15_t)0x3a1e, (q15_t)0x3a08, (q15_t)0x39f1, (q15_t)0x39db, (q15_t)0x39c4, (q15_t)0x39ae, (q15_t)0x3998,
+  (q15_t)0x3981, (q15_t)0x396b, (q15_t)0x3954, (q15_t)0x393e, (q15_t)0x3927, (q15_t)0x3911, (q15_t)0x38fa, (q15_t)0x38e4,
+  (q15_t)0x38cd, (q15_t)0x38b7, (q15_t)0x38a0, (q15_t)0x388a, (q15_t)0x3873, (q15_t)0x385d, (q15_t)0x3846, (q15_t)0x382f,
+  (q15_t)0x3819, (q15_t)0x3802, (q15_t)0x37ec, (q15_t)0x37d5, (q15_t)0x37be, (q15_t)0x37a8, (q15_t)0x3791, (q15_t)0x377a,
+  (q15_t)0x3764, (q15_t)0x374d, (q15_t)0x3736, (q15_t)0x3720, (q15_t)0x3709, (q15_t)0x36f2, (q15_t)0x36dc, (q15_t)0x36c5,
+  (q15_t)0x36ae, (q15_t)0x3698, (q15_t)0x3681, (q15_t)0x366a, (q15_t)0x3653, (q15_t)0x363d, (q15_t)0x3626, (q15_t)0x360f,
+  (q15_t)0x35f8, (q15_t)0x35e1, (q15_t)0x35cb, (q15_t)0x35b4, (q15_t)0x359d, (q15_t)0x3586, (q15_t)0x356f, (q15_t)0x3558,
+  (q15_t)0x3542, (q15_t)0x352b, (q15_t)0x3514, (q15_t)0x34fd, (q15_t)0x34e6, (q15_t)0x34cf, (q15_t)0x34b8, (q15_t)0x34a1,
+  (q15_t)0x348b, (q15_t)0x3474, (q15_t)0x345d, (q15_t)0x3446, (q15_t)0x342f, (q15_t)0x3418, (q15_t)0x3401, (q15_t)0x33ea,
+  (q15_t)0x33d3, (q15_t)0x33bc, (q15_t)0x33a5, (q15_t)0x338e, (q15_t)0x3377, (q15_t)0x3360, (q15_t)0x3349, (q15_t)0x3332,
+  (q15_t)0x331b, (q15_t)0x3304, (q15_t)0x32ed, (q15_t)0x32d6, (q15_t)0x32bf, (q15_t)0x32a8, (q15_t)0x3290, (q15_t)0x3279,
+  (q15_t)0x3262, (q15_t)0x324b, (q15_t)0x3234, (q15_t)0x321d, (q15_t)0x3206, (q15_t)0x31ef, (q15_t)0x31d8, (q15_t)0x31c0,
+  (q15_t)0x31a9, (q15_t)0x3192, (q15_t)0x317b, (q15_t)0x3164, (q15_t)0x314c, (q15_t)0x3135, (q15_t)0x311e, (q15_t)0x3107,
+  (q15_t)0x30f0, (q15_t)0x30d8, (q15_t)0x30c1, (q15_t)0x30aa, (q15_t)0x3093, (q15_t)0x307b, (q15_t)0x3064, (q15_t)0x304d,
+  (q15_t)0x3036, (q15_t)0x301e, (q15_t)0x3007, (q15_t)0x2ff0, (q15_t)0x2fd8, (q15_t)0x2fc1, (q15_t)0x2faa, (q15_t)0x2f92,
+  (q15_t)0x2f7b, (q15_t)0x2f64, (q15_t)0x2f4c, (q15_t)0x2f35, (q15_t)0x2f1e, (q15_t)0x2f06, (q15_t)0x2eef, (q15_t)0x2ed8,
+  (q15_t)0x2ec0, (q15_t)0x2ea9, (q15_t)0x2e91, (q15_t)0x2e7a, (q15_t)0x2e63, (q15_t)0x2e4b, (q15_t)0x2e34, (q15_t)0x2e1c,
+  (q15_t)0x2e05, (q15_t)0x2ded, (q15_t)0x2dd6, (q15_t)0x2dbe, (q15_t)0x2da7, (q15_t)0x2d8f, (q15_t)0x2d78, (q15_t)0x2d60,
+  (q15_t)0x2d49, (q15_t)0x2d31, (q15_t)0x2d1a, (q15_t)0x2d02, (q15_t)0x2ceb, (q15_t)0x2cd3, (q15_t)0x2cbc, (q15_t)0x2ca4,
+  (q15_t)0x2c8d, (q15_t)0x2c75, (q15_t)0x2c5e, (q15_t)0x2c46, (q15_t)0x2c2e, (q15_t)0x2c17, (q15_t)0x2bff, (q15_t)0x2be8,
+  (q15_t)0x2bd0, (q15_t)0x2bb8, (q15_t)0x2ba1, (q15_t)0x2b89, (q15_t)0x2b71, (q15_t)0x2b5a, (q15_t)0x2b42, (q15_t)0x2b2b,
+  (q15_t)0x2b13, (q15_t)0x2afb, (q15_t)0x2ae4, (q15_t)0x2acc, (q15_t)0x2ab4, (q15_t)0x2a9c, (q15_t)0x2a85, (q15_t)0x2a6d,
+  (q15_t)0x2a55, (q15_t)0x2a3e, (q15_t)0x2a26, (q15_t)0x2a0e, (q15_t)0x29f6, (q15_t)0x29df, (q15_t)0x29c7, (q15_t)0x29af,
+  (q15_t)0x2997, (q15_t)0x2980, (q15_t)0x2968, (q15_t)0x2950, (q15_t)0x2938, (q15_t)0x2920, (q15_t)0x2909, (q15_t)0x28f1,
+  (q15_t)0x28d9, (q15_t)0x28c1, (q15_t)0x28a9, (q15_t)0x2892, (q15_t)0x287a, (q15_t)0x2862, (q15_t)0x284a, (q15_t)0x2832,
+  (q15_t)0x281a, (q15_t)0x2802, (q15_t)0x27eb, (q15_t)0x27d3, (q15_t)0x27bb, (q15_t)0x27a3, (q15_t)0x278b, (q15_t)0x2773,
+  (q15_t)0x275b, (q15_t)0x2743, (q15_t)0x272b, (q15_t)0x2713, (q15_t)0x26fb, (q15_t)0x26e4, (q15_t)0x26cc, (q15_t)0x26b4,
+  (q15_t)0x269c, (q15_t)0x2684, (q15_t)0x266c, (q15_t)0x2654, (q15_t)0x263c, (q15_t)0x2624, (q15_t)0x260c, (q15_t)0x25f4,
+  (q15_t)0x25dc, (q15_t)0x25c4, (q15_t)0x25ac, (q15_t)0x2594, (q15_t)0x257c, (q15_t)0x2564, (q15_t)0x254c, (q15_t)0x2534,
+  (q15_t)0x251c, (q15_t)0x2503, (q15_t)0x24eb, (q15_t)0x24d3, (q15_t)0x24bb, (q15_t)0x24a3, (q15_t)0x248b, (q15_t)0x2473,
+  (q15_t)0x245b, (q15_t)0x2443, (q15_t)0x242b, (q15_t)0x2413, (q15_t)0x23fa, (q15_t)0x23e2, (q15_t)0x23ca, (q15_t)0x23b2,
+  (q15_t)0x239a, (q15_t)0x2382, (q15_t)0x236a, (q15_t)0x2352, (q15_t)0x2339, (q15_t)0x2321, (q15_t)0x2309, (q15_t)0x22f1,
+  (q15_t)0x22d9, (q15_t)0x22c0, (q15_t)0x22a8, (q15_t)0x2290, (q15_t)0x2278, (q15_t)0x2260, (q15_t)0x2247, (q15_t)0x222f,
+  (q15_t)0x2217, (q15_t)0x21ff, (q15_t)0x21e7, (q15_t)0x21ce, (q15_t)0x21b6, (q15_t)0x219e, (q15_t)0x2186, (q15_t)0x216d,
+  (q15_t)0x2155, (q15_t)0x213d, (q15_t)0x2125, (q15_t)0x210c, (q15_t)0x20f4, (q15_t)0x20dc, (q15_t)0x20c3, (q15_t)0x20ab,
+  (q15_t)0x2093, (q15_t)0x207a, (q15_t)0x2062, (q15_t)0x204a, (q15_t)0x2032, (q15_t)0x2019, (q15_t)0x2001, (q15_t)0x1fe9,
+  (q15_t)0x1fd0, (q15_t)0x1fb8, (q15_t)0x1f9f, (q15_t)0x1f87, (q15_t)0x1f6f, (q15_t)0x1f56, (q15_t)0x1f3e, (q15_t)0x1f26,
+  (q15_t)0x1f0d, (q15_t)0x1ef5, (q15_t)0x1edd, (q15_t)0x1ec4, (q15_t)0x1eac, (q15_t)0x1e93, (q15_t)0x1e7b, (q15_t)0x1e62,
+  (q15_t)0x1e4a, (q15_t)0x1e32, (q15_t)0x1e19, (q15_t)0x1e01, (q15_t)0x1de8, (q15_t)0x1dd0, (q15_t)0x1db7, (q15_t)0x1d9f,
+  (q15_t)0x1d87, (q15_t)0x1d6e, (q15_t)0x1d56, (q15_t)0x1d3d, (q15_t)0x1d25, (q15_t)0x1d0c, (q15_t)0x1cf4, (q15_t)0x1cdb,
+  (q15_t)0x1cc3, (q15_t)0x1caa, (q15_t)0x1c92, (q15_t)0x1c79, (q15_t)0x1c61, (q15_t)0x1c48, (q15_t)0x1c30, (q15_t)0x1c17,
+  (q15_t)0x1bff, (q15_t)0x1be6, (q15_t)0x1bce, (q15_t)0x1bb5, (q15_t)0x1b9d, (q15_t)0x1b84, (q15_t)0x1b6c, (q15_t)0x1b53,
+  (q15_t)0x1b3a, (q15_t)0x1b22, (q15_t)0x1b09, (q15_t)0x1af1, (q15_t)0x1ad8, (q15_t)0x1ac0, (q15_t)0x1aa7, (q15_t)0x1a8e,
+  (q15_t)0x1a76, (q15_t)0x1a5d, (q15_t)0x1a45, (q15_t)0x1a2c, (q15_t)0x1a13, (q15_t)0x19fb, (q15_t)0x19e2, (q15_t)0x19ca,
+  (q15_t)0x19b1, (q15_t)0x1998, (q15_t)0x1980, (q15_t)0x1967, (q15_t)0x194e, (q15_t)0x1936, (q15_t)0x191d, (q15_t)0x1905,
+  (q15_t)0x18ec, (q15_t)0x18d3, (q15_t)0x18bb, (q15_t)0x18a2, (q15_t)0x1889, (q15_t)0x1871, (q15_t)0x1858, (q15_t)0x183f,
+  (q15_t)0x1827, (q15_t)0x180e, (q15_t)0x17f5, (q15_t)0x17dd, (q15_t)0x17c4, (q15_t)0x17ab, (q15_t)0x1792, (q15_t)0x177a,
+  (q15_t)0x1761, (q15_t)0x1748, (q15_t)0x1730, (q15_t)0x1717, (q15_t)0x16fe, (q15_t)0x16e5, (q15_t)0x16cd, (q15_t)0x16b4,
+  (q15_t)0x169b, (q15_t)0x1682, (q15_t)0x166a, (q15_t)0x1651, (q15_t)0x1638, (q15_t)0x161f, (q15_t)0x1607, (q15_t)0x15ee,
+  (q15_t)0x15d5, (q15_t)0x15bc, (q15_t)0x15a4, (q15_t)0x158b, (q15_t)0x1572, (q15_t)0x1559, (q15_t)0x1541, (q15_t)0x1528,
+  (q15_t)0x150f, (q15_t)0x14f6, (q15_t)0x14dd, (q15_t)0x14c5, (q15_t)0x14ac, (q15_t)0x1493, (q15_t)0x147a, (q15_t)0x1461,
+  (q15_t)0x1449, (q15_t)0x1430, (q15_t)0x1417, (q15_t)0x13fe, (q15_t)0x13e5, (q15_t)0x13cc, (q15_t)0x13b4, (q15_t)0x139b,
+  (q15_t)0x1382, (q15_t)0x1369, (q15_t)0x1350, (q15_t)0x1337, (q15_t)0x131f, (q15_t)0x1306, (q15_t)0x12ed, (q15_t)0x12d4,
+  (q15_t)0x12bb, (q15_t)0x12a2, (q15_t)0x1289, (q15_t)0x1271, (q15_t)0x1258, (q15_t)0x123f, (q15_t)0x1226, (q15_t)0x120d,
+  (q15_t)0x11f4, (q15_t)0x11db, (q15_t)0x11c2, (q15_t)0x11a9, (q15_t)0x1191, (q15_t)0x1178, (q15_t)0x115f, (q15_t)0x1146,
+  (q15_t)0x112d, (q15_t)0x1114, (q15_t)0x10fb, (q15_t)0x10e2, (q15_t)0x10c9, (q15_t)0x10b0, (q15_t)0x1098, (q15_t)0x107f,
+  (q15_t)0x1066, (q15_t)0x104d, (q15_t)0x1034, (q15_t)0x101b, (q15_t)0x1002, (q15_t)0xfe9, (q15_t)0xfd0, (q15_t)0xfb7,
+  (q15_t)0xf9e, (q15_t)0xf85, (q15_t)0xf6c, (q15_t)0xf53, (q15_t)0xf3a, (q15_t)0xf21, (q15_t)0xf08, (q15_t)0xef0,
+  (q15_t)0xed7, (q15_t)0xebe, (q15_t)0xea5, (q15_t)0xe8c, (q15_t)0xe73, (q15_t)0xe5a, (q15_t)0xe41, (q15_t)0xe28,
+  (q15_t)0xe0f, (q15_t)0xdf6, (q15_t)0xddd, (q15_t)0xdc4, (q15_t)0xdab, (q15_t)0xd92, (q15_t)0xd79, (q15_t)0xd60,
+  (q15_t)0xd47, (q15_t)0xd2e, (q15_t)0xd15, (q15_t)0xcfc, (q15_t)0xce3, (q15_t)0xcca, (q15_t)0xcb1, (q15_t)0xc98,
+  (q15_t)0xc7f, (q15_t)0xc66, (q15_t)0xc4d, (q15_t)0xc34, (q15_t)0xc1b, (q15_t)0xc02, (q15_t)0xbe9, (q15_t)0xbd0,
+  (q15_t)0xbb7, (q15_t)0xb9e, (q15_t)0xb85, (q15_t)0xb6c, (q15_t)0xb53, (q15_t)0xb3a, (q15_t)0xb20, (q15_t)0xb07,
+  (q15_t)0xaee, (q15_t)0xad5, (q15_t)0xabc, (q15_t)0xaa3, (q15_t)0xa8a, (q15_t)0xa71, (q15_t)0xa58, (q15_t)0xa3f,
+  (q15_t)0xa26, (q15_t)0xa0d, (q15_t)0x9f4, (q15_t)0x9db, (q15_t)0x9c2, (q15_t)0x9a9, (q15_t)0x990, (q15_t)0x977,
+  (q15_t)0x95e, (q15_t)0x944, (q15_t)0x92b, (q15_t)0x912, (q15_t)0x8f9, (q15_t)0x8e0, (q15_t)0x8c7, (q15_t)0x8ae,
+  (q15_t)0x895, (q15_t)0x87c, (q15_t)0x863, (q15_t)0x84a, (q15_t)0x831, (q15_t)0x818, (q15_t)0x7fe, (q15_t)0x7e5,
+  (q15_t)0x7cc, (q15_t)0x7b3, (q15_t)0x79a, (q15_t)0x781, (q15_t)0x768, (q15_t)0x74f, (q15_t)0x736, (q15_t)0x71d,
+  (q15_t)0x704, (q15_t)0x6ea, (q15_t)0x6d1, (q15_t)0x6b8, (q15_t)0x69f, (q15_t)0x686, (q15_t)0x66d, (q15_t)0x654,
+  (q15_t)0x63b, (q15_t)0x622, (q15_t)0x609, (q15_t)0x5ef, (q15_t)0x5d6, (q15_t)0x5bd, (q15_t)0x5a4, (q15_t)0x58b,
+  (q15_t)0x572, (q15_t)0x559, (q15_t)0x540, (q15_t)0x527, (q15_t)0x50d, (q15_t)0x4f4, (q15_t)0x4db, (q15_t)0x4c2,
+  (q15_t)0x4a9, (q15_t)0x490, (q15_t)0x477, (q15_t)0x45e, (q15_t)0x445, (q15_t)0x42b, (q15_t)0x412, (q15_t)0x3f9,
+  (q15_t)0x3e0, (q15_t)0x3c7, (q15_t)0x3ae, (q15_t)0x395, (q15_t)0x37c, (q15_t)0x362, (q15_t)0x349, (q15_t)0x330,
+  (q15_t)0x317, (q15_t)0x2fe, (q15_t)0x2e5, (q15_t)0x2cc, (q15_t)0x2b3, (q15_t)0x299, (q15_t)0x280, (q15_t)0x267,
+  (q15_t)0x24e, (q15_t)0x235, (q15_t)0x21c, (q15_t)0x203, (q15_t)0x1ea, (q15_t)0x1d0, (q15_t)0x1b7, (q15_t)0x19e,
+  (q15_t)0x185, (q15_t)0x16c, (q15_t)0x153, (q15_t)0x13a, (q15_t)0x121, (q15_t)0x107, (q15_t)0xee, (q15_t)0xd5,
+  (q15_t)0xbc, (q15_t)0xa3, (q15_t)0x8a, (q15_t)0x71, (q15_t)0x57, (q15_t)0x3e, (q15_t)0x25, (q15_t)0xc
+
+};
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_8192)
+    const q15_t __ALIGNED(4) WeightsQ15_8192[16384] = {
+  (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xfffa, (q15_t)0x7fff, (q15_t)0xfff4, (q15_t)0x7fff, (q15_t)0xffee,
+  (q15_t)0x7fff, (q15_t)0xffe7, (q15_t)0x7fff, (q15_t)0xffe1, (q15_t)0x7fff, (q15_t)0xffdb, (q15_t)0x7fff, (q15_t)0xffd5,
+  (q15_t)0x7fff, (q15_t)0xffce, (q15_t)0x7fff, (q15_t)0xffc8, (q15_t)0x7fff, (q15_t)0xffc2, (q15_t)0x7fff, (q15_t)0xffbb,
+  (q15_t)0x7fff, (q15_t)0xffb5, (q15_t)0x7fff, (q15_t)0xffaf, (q15_t)0x7fff, (q15_t)0xffa9, (q15_t)0x7fff, (q15_t)0xffa2,
+  (q15_t)0x7fff, (q15_t)0xff9c, (q15_t)0x7fff, (q15_t)0xff96, (q15_t)0x7fff, (q15_t)0xff8f, (q15_t)0x7fff, (q15_t)0xff89,
+  (q15_t)0x7fff, (q15_t)0xff83, (q15_t)0x7fff, (q15_t)0xff7d, (q15_t)0x7fff, (q15_t)0xff76, (q15_t)0x7fff, (q15_t)0xff70,
+  (q15_t)0x7fff, (q15_t)0xff6a, (q15_t)0x7fff, (q15_t)0xff63, (q15_t)0x7fff, (q15_t)0xff5d, (q15_t)0x7fff, (q15_t)0xff57,
+  (q15_t)0x7fff, (q15_t)0xff51, (q15_t)0x7fff, (q15_t)0xff4a, (q15_t)0x7fff, (q15_t)0xff44, (q15_t)0x7fff, (q15_t)0xff3e,
+  (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7fff, (q15_t)0xff31, (q15_t)0x7fff, (q15_t)0xff2b, (q15_t)0x7fff, (q15_t)0xff25,
+  (q15_t)0x7fff, (q15_t)0xff1e, (q15_t)0x7fff, (q15_t)0xff18, (q15_t)0x7fff, (q15_t)0xff12, (q15_t)0x7fff, (q15_t)0xff0b,
+  (q15_t)0x7fff, (q15_t)0xff05, (q15_t)0x7ffe, (q15_t)0xfeff, (q15_t)0x7ffe, (q15_t)0xfef9, (q15_t)0x7ffe, (q15_t)0xfef2,
+  (q15_t)0x7ffe, (q15_t)0xfeec, (q15_t)0x7ffe, (q15_t)0xfee6, (q15_t)0x7ffe, (q15_t)0xfedf, (q15_t)0x7ffe, (q15_t)0xfed9,
+  (q15_t)0x7ffe, (q15_t)0xfed3, (q15_t)0x7ffe, (q15_t)0xfecd, (q15_t)0x7ffe, (q15_t)0xfec6, (q15_t)0x7ffe, (q15_t)0xfec0,
+  (q15_t)0x7ffe, (q15_t)0xfeba, (q15_t)0x7ffe, (q15_t)0xfeb3, (q15_t)0x7ffe, (q15_t)0xfead, (q15_t)0x7ffe, (q15_t)0xfea7,
+  (q15_t)0x7ffe, (q15_t)0xfea1, (q15_t)0x7ffe, (q15_t)0xfe9a, (q15_t)0x7ffd, (q15_t)0xfe94, (q15_t)0x7ffd, (q15_t)0xfe8e,
+  (q15_t)0x7ffd, (q15_t)0xfe88, (q15_t)0x7ffd, (q15_t)0xfe81, (q15_t)0x7ffd, (q15_t)0xfe7b, (q15_t)0x7ffd, (q15_t)0xfe75,
+  (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ffd, (q15_t)0xfe68, (q15_t)0x7ffd, (q15_t)0xfe62, (q15_t)0x7ffd, (q15_t)0xfe5c,
+  (q15_t)0x7ffd, (q15_t)0xfe55, (q15_t)0x7ffd, (q15_t)0xfe4f, (q15_t)0x7ffd, (q15_t)0xfe49, (q15_t)0x7ffc, (q15_t)0xfe42,
+  (q15_t)0x7ffc, (q15_t)0xfe3c, (q15_t)0x7ffc, (q15_t)0xfe36, (q15_t)0x7ffc, (q15_t)0xfe30, (q15_t)0x7ffc, (q15_t)0xfe29,
+  (q15_t)0x7ffc, (q15_t)0xfe23, (q15_t)0x7ffc, (q15_t)0xfe1d, (q15_t)0x7ffc, (q15_t)0xfe16, (q15_t)0x7ffc, (q15_t)0xfe10,
+  (q15_t)0x7ffc, (q15_t)0xfe0a, (q15_t)0x7ffc, (q15_t)0xfe04, (q15_t)0x7ffb, (q15_t)0xfdfd, (q15_t)0x7ffb, (q15_t)0xfdf7,
+  (q15_t)0x7ffb, (q15_t)0xfdf1, (q15_t)0x7ffb, (q15_t)0xfdea, (q15_t)0x7ffb, (q15_t)0xfde4, (q15_t)0x7ffb, (q15_t)0xfdde,
+  (q15_t)0x7ffb, (q15_t)0xfdd8, (q15_t)0x7ffb, (q15_t)0xfdd1, (q15_t)0x7ffb, (q15_t)0xfdcb, (q15_t)0x7ffb, (q15_t)0xfdc5,
+  (q15_t)0x7ffa, (q15_t)0xfdbe, (q15_t)0x7ffa, (q15_t)0xfdb8, (q15_t)0x7ffa, (q15_t)0xfdb2, (q15_t)0x7ffa, (q15_t)0xfdac,
+  (q15_t)0x7ffa, (q15_t)0xfda5, (q15_t)0x7ffa, (q15_t)0xfd9f, (q15_t)0x7ffa, (q15_t)0xfd99, (q15_t)0x7ffa, (q15_t)0xfd93,
+  (q15_t)0x7ff9, (q15_t)0xfd8c, (q15_t)0x7ff9, (q15_t)0xfd86, (q15_t)0x7ff9, (q15_t)0xfd80, (q15_t)0x7ff9, (q15_t)0xfd79,
+  (q15_t)0x7ff9, (q15_t)0xfd73, (q15_t)0x7ff9, (q15_t)0xfd6d, (q15_t)0x7ff9, (q15_t)0xfd67, (q15_t)0x7ff9, (q15_t)0xfd60,
+  (q15_t)0x7ff8, (q15_t)0xfd5a, (q15_t)0x7ff8, (q15_t)0xfd54, (q15_t)0x7ff8, (q15_t)0xfd4d, (q15_t)0x7ff8, (q15_t)0xfd47,
+  (q15_t)0x7ff8, (q15_t)0xfd41, (q15_t)0x7ff8, (q15_t)0xfd3b, (q15_t)0x7ff8, (q15_t)0xfd34, (q15_t)0x7ff8, (q15_t)0xfd2e,
+  (q15_t)0x7ff7, (q15_t)0xfd28, (q15_t)0x7ff7, (q15_t)0xfd21, (q15_t)0x7ff7, (q15_t)0xfd1b, (q15_t)0x7ff7, (q15_t)0xfd15,
+  (q15_t)0x7ff7, (q15_t)0xfd0f, (q15_t)0x7ff7, (q15_t)0xfd08, (q15_t)0x7ff7, (q15_t)0xfd02, (q15_t)0x7ff6, (q15_t)0xfcfc,
+  (q15_t)0x7ff6, (q15_t)0xfcf5, (q15_t)0x7ff6, (q15_t)0xfcef, (q15_t)0x7ff6, (q15_t)0xfce9, (q15_t)0x7ff6, (q15_t)0xfce3,
+  (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7ff5, (q15_t)0xfcd6, (q15_t)0x7ff5, (q15_t)0xfcd0, (q15_t)0x7ff5, (q15_t)0xfcc9,
+  (q15_t)0x7ff5, (q15_t)0xfcc3, (q15_t)0x7ff5, (q15_t)0xfcbd, (q15_t)0x7ff5, (q15_t)0xfcb7, (q15_t)0x7ff5, (q15_t)0xfcb0,
+  (q15_t)0x7ff4, (q15_t)0xfcaa, (q15_t)0x7ff4, (q15_t)0xfca4, (q15_t)0x7ff4, (q15_t)0xfc9e, (q15_t)0x7ff4, (q15_t)0xfc97,
+  (q15_t)0x7ff4, (q15_t)0xfc91, (q15_t)0x7ff4, (q15_t)0xfc8b, (q15_t)0x7ff3, (q15_t)0xfc84, (q15_t)0x7ff3, (q15_t)0xfc7e,
+  (q15_t)0x7ff3, (q15_t)0xfc78, (q15_t)0x7ff3, (q15_t)0xfc72, (q15_t)0x7ff3, (q15_t)0xfc6b, (q15_t)0x7ff2, (q15_t)0xfc65,
+  (q15_t)0x7ff2, (q15_t)0xfc5f, (q15_t)0x7ff2, (q15_t)0xfc58, (q15_t)0x7ff2, (q15_t)0xfc52, (q15_t)0x7ff2, (q15_t)0xfc4c,
+  (q15_t)0x7ff2, (q15_t)0xfc46, (q15_t)0x7ff1, (q15_t)0xfc3f, (q15_t)0x7ff1, (q15_t)0xfc39, (q15_t)0x7ff1, (q15_t)0xfc33,
+  (q15_t)0x7ff1, (q15_t)0xfc2c, (q15_t)0x7ff1, (q15_t)0xfc26, (q15_t)0x7ff0, (q15_t)0xfc20, (q15_t)0x7ff0, (q15_t)0xfc1a,
+  (q15_t)0x7ff0, (q15_t)0xfc13, (q15_t)0x7ff0, (q15_t)0xfc0d, (q15_t)0x7ff0, (q15_t)0xfc07, (q15_t)0x7fef, (q15_t)0xfc01,
+  (q15_t)0x7fef, (q15_t)0xfbfa, (q15_t)0x7fef, (q15_t)0xfbf4, (q15_t)0x7fef, (q15_t)0xfbee, (q15_t)0x7fef, (q15_t)0xfbe7,
+  (q15_t)0x7fee, (q15_t)0xfbe1, (q15_t)0x7fee, (q15_t)0xfbdb, (q15_t)0x7fee, (q15_t)0xfbd5, (q15_t)0x7fee, (q15_t)0xfbce,
+  (q15_t)0x7fee, (q15_t)0xfbc8, (q15_t)0x7fed, (q15_t)0xfbc2, (q15_t)0x7fed, (q15_t)0xfbbb, (q15_t)0x7fed, (q15_t)0xfbb5,
+  (q15_t)0x7fed, (q15_t)0xfbaf, (q15_t)0x7fed, (q15_t)0xfba9, (q15_t)0x7fec, (q15_t)0xfba2, (q15_t)0x7fec, (q15_t)0xfb9c,
+  (q15_t)0x7fec, (q15_t)0xfb96, (q15_t)0x7fec, (q15_t)0xfb8f, (q15_t)0x7fec, (q15_t)0xfb89, (q15_t)0x7feb, (q15_t)0xfb83,
+  (q15_t)0x7feb, (q15_t)0xfb7d, (q15_t)0x7feb, (q15_t)0xfb76, (q15_t)0x7feb, (q15_t)0xfb70, (q15_t)0x7fea, (q15_t)0xfb6a,
+  (q15_t)0x7fea, (q15_t)0xfb64, (q15_t)0x7fea, (q15_t)0xfb5d, (q15_t)0x7fea, (q15_t)0xfb57, (q15_t)0x7fea, (q15_t)0xfb51,
+  (q15_t)0x7fe9, (q15_t)0xfb4a, (q15_t)0x7fe9, (q15_t)0xfb44, (q15_t)0x7fe9, (q15_t)0xfb3e, (q15_t)0x7fe9, (q15_t)0xfb38,
+  (q15_t)0x7fe8, (q15_t)0xfb31, (q15_t)0x7fe8, (q15_t)0xfb2b, (q15_t)0x7fe8, (q15_t)0xfb25, (q15_t)0x7fe8, (q15_t)0xfb1e,
+  (q15_t)0x7fe7, (q15_t)0xfb18, (q15_t)0x7fe7, (q15_t)0xfb12, (q15_t)0x7fe7, (q15_t)0xfb0c, (q15_t)0x7fe7, (q15_t)0xfb05,
+  (q15_t)0x7fe6, (q15_t)0xfaff, (q15_t)0x7fe6, (q15_t)0xfaf9, (q15_t)0x7fe6, (q15_t)0xfaf3, (q15_t)0x7fe6, (q15_t)0xfaec,
+  (q15_t)0x7fe5, (q15_t)0xfae6, (q15_t)0x7fe5, (q15_t)0xfae0, (q15_t)0x7fe5, (q15_t)0xfad9, (q15_t)0x7fe5, (q15_t)0xfad3,
+  (q15_t)0x7fe4, (q15_t)0xfacd, (q15_t)0x7fe4, (q15_t)0xfac7, (q15_t)0x7fe4, (q15_t)0xfac0, (q15_t)0x7fe4, (q15_t)0xfaba,
+  (q15_t)0x7fe3, (q15_t)0xfab4, (q15_t)0x7fe3, (q15_t)0xfaad, (q15_t)0x7fe3, (q15_t)0xfaa7, (q15_t)0x7fe3, (q15_t)0xfaa1,
+  (q15_t)0x7fe2, (q15_t)0xfa9b, (q15_t)0x7fe2, (q15_t)0xfa94, (q15_t)0x7fe2, (q15_t)0xfa8e, (q15_t)0x7fe2, (q15_t)0xfa88,
+  (q15_t)0x7fe1, (q15_t)0xfa81, (q15_t)0x7fe1, (q15_t)0xfa7b, (q15_t)0x7fe1, (q15_t)0xfa75, (q15_t)0x7fe0, (q15_t)0xfa6f,
+  (q15_t)0x7fe0, (q15_t)0xfa68, (q15_t)0x7fe0, (q15_t)0xfa62, (q15_t)0x7fe0, (q15_t)0xfa5c, (q15_t)0x7fdf, (q15_t)0xfa56,
+  (q15_t)0x7fdf, (q15_t)0xfa4f, (q15_t)0x7fdf, (q15_t)0xfa49, (q15_t)0x7fdf, (q15_t)0xfa43, (q15_t)0x7fde, (q15_t)0xfa3c,
+  (q15_t)0x7fde, (q15_t)0xfa36, (q15_t)0x7fde, (q15_t)0xfa30, (q15_t)0x7fdd, (q15_t)0xfa2a, (q15_t)0x7fdd, (q15_t)0xfa23,
+  (q15_t)0x7fdd, (q15_t)0xfa1d, (q15_t)0x7fdd, (q15_t)0xfa17, (q15_t)0x7fdc, (q15_t)0xfa11, (q15_t)0x7fdc, (q15_t)0xfa0a,
+  (q15_t)0x7fdc, (q15_t)0xfa04, (q15_t)0x7fdb, (q15_t)0xf9fe, (q15_t)0x7fdb, (q15_t)0xf9f7, (q15_t)0x7fdb, (q15_t)0xf9f1,
+  (q15_t)0x7fda, (q15_t)0xf9eb, (q15_t)0x7fda, (q15_t)0xf9e5, (q15_t)0x7fda, (q15_t)0xf9de, (q15_t)0x7fda, (q15_t)0xf9d8,
+  (q15_t)0x7fd9, (q15_t)0xf9d2, (q15_t)0x7fd9, (q15_t)0xf9cb, (q15_t)0x7fd9, (q15_t)0xf9c5, (q15_t)0x7fd8, (q15_t)0xf9bf,
+  (q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fd8, (q15_t)0xf9b2, (q15_t)0x7fd7, (q15_t)0xf9ac, (q15_t)0x7fd7, (q15_t)0xf9a6,
+  (q15_t)0x7fd7, (q15_t)0xf9a0, (q15_t)0x7fd6, (q15_t)0xf999, (q15_t)0x7fd6, (q15_t)0xf993, (q15_t)0x7fd6, (q15_t)0xf98d,
+  (q15_t)0x7fd6, (q15_t)0xf986, (q15_t)0x7fd5, (q15_t)0xf980, (q15_t)0x7fd5, (q15_t)0xf97a, (q15_t)0x7fd5, (q15_t)0xf974,
+  (q15_t)0x7fd4, (q15_t)0xf96d, (q15_t)0x7fd4, (q15_t)0xf967, (q15_t)0x7fd4, (q15_t)0xf961, (q15_t)0x7fd3, (q15_t)0xf95b,
+  (q15_t)0x7fd3, (q15_t)0xf954, (q15_t)0x7fd3, (q15_t)0xf94e, (q15_t)0x7fd2, (q15_t)0xf948, (q15_t)0x7fd2, (q15_t)0xf941,
+  (q15_t)0x7fd2, (q15_t)0xf93b, (q15_t)0x7fd1, (q15_t)0xf935, (q15_t)0x7fd1, (q15_t)0xf92f, (q15_t)0x7fd1, (q15_t)0xf928,
+  (q15_t)0x7fd0, (q15_t)0xf922, (q15_t)0x7fd0, (q15_t)0xf91c, (q15_t)0x7fd0, (q15_t)0xf916, (q15_t)0x7fcf, (q15_t)0xf90f,
+  (q15_t)0x7fcf, (q15_t)0xf909, (q15_t)0x7fcf, (q15_t)0xf903, (q15_t)0x7fce, (q15_t)0xf8fc, (q15_t)0x7fce, (q15_t)0xf8f6,
+  (q15_t)0x7fce, (q15_t)0xf8f0, (q15_t)0x7fcd, (q15_t)0xf8ea, (q15_t)0x7fcd, (q15_t)0xf8e3, (q15_t)0x7fcd, (q15_t)0xf8dd,
+  (q15_t)0x7fcc, (q15_t)0xf8d7, (q15_t)0x7fcc, (q15_t)0xf8d0, (q15_t)0x7fcb, (q15_t)0xf8ca, (q15_t)0x7fcb, (q15_t)0xf8c4,
+  (q15_t)0x7fcb, (q15_t)0xf8be, (q15_t)0x7fca, (q15_t)0xf8b7, (q15_t)0x7fca, (q15_t)0xf8b1, (q15_t)0x7fca, (q15_t)0xf8ab,
+  (q15_t)0x7fc9, (q15_t)0xf8a5, (q15_t)0x7fc9, (q15_t)0xf89e, (q15_t)0x7fc9, (q15_t)0xf898, (q15_t)0x7fc8, (q15_t)0xf892,
+  (q15_t)0x7fc8, (q15_t)0xf88b, (q15_t)0x7fc7, (q15_t)0xf885, (q15_t)0x7fc7, (q15_t)0xf87f, (q15_t)0x7fc7, (q15_t)0xf879,
+  (q15_t)0x7fc6, (q15_t)0xf872, (q15_t)0x7fc6, (q15_t)0xf86c, (q15_t)0x7fc6, (q15_t)0xf866, (q15_t)0x7fc5, (q15_t)0xf860,
+  (q15_t)0x7fc5, (q15_t)0xf859, (q15_t)0x7fc5, (q15_t)0xf853, (q15_t)0x7fc4, (q15_t)0xf84d, (q15_t)0x7fc4, (q15_t)0xf846,
+  (q15_t)0x7fc3, (q15_t)0xf840, (q15_t)0x7fc3, (q15_t)0xf83a, (q15_t)0x7fc3, (q15_t)0xf834, (q15_t)0x7fc2, (q15_t)0xf82d,
+  (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fc1, (q15_t)0xf821, (q15_t)0x7fc1, (q15_t)0xf81b, (q15_t)0x7fc1, (q15_t)0xf814,
+  (q15_t)0x7fc0, (q15_t)0xf80e, (q15_t)0x7fc0, (q15_t)0xf808, (q15_t)0x7fc0, (q15_t)0xf802, (q15_t)0x7fbf, (q15_t)0xf7fb,
+  (q15_t)0x7fbf, (q15_t)0xf7f5, (q15_t)0x7fbe, (q15_t)0xf7ef, (q15_t)0x7fbe, (q15_t)0xf7e8, (q15_t)0x7fbe, (q15_t)0xf7e2,
+  (q15_t)0x7fbd, (q15_t)0xf7dc, (q15_t)0x7fbd, (q15_t)0xf7d6, (q15_t)0x7fbc, (q15_t)0xf7cf, (q15_t)0x7fbc, (q15_t)0xf7c9,
+  (q15_t)0x7fbc, (q15_t)0xf7c3, (q15_t)0x7fbb, (q15_t)0xf7bd, (q15_t)0x7fbb, (q15_t)0xf7b6, (q15_t)0x7fba, (q15_t)0xf7b0,
+  (q15_t)0x7fba, (q15_t)0xf7aa, (q15_t)0x7fb9, (q15_t)0xf7a3, (q15_t)0x7fb9, (q15_t)0xf79d, (q15_t)0x7fb9, (q15_t)0xf797,
+  (q15_t)0x7fb8, (q15_t)0xf791, (q15_t)0x7fb8, (q15_t)0xf78a, (q15_t)0x7fb7, (q15_t)0xf784, (q15_t)0x7fb7, (q15_t)0xf77e,
+  (q15_t)0x7fb7, (q15_t)0xf778, (q15_t)0x7fb6, (q15_t)0xf771, (q15_t)0x7fb6, (q15_t)0xf76b, (q15_t)0x7fb5, (q15_t)0xf765,
+  (q15_t)0x7fb5, (q15_t)0xf75e, (q15_t)0x7fb4, (q15_t)0xf758, (q15_t)0x7fb4, (q15_t)0xf752, (q15_t)0x7fb4, (q15_t)0xf74c,
+  (q15_t)0x7fb3, (q15_t)0xf745, (q15_t)0x7fb3, (q15_t)0xf73f, (q15_t)0x7fb2, (q15_t)0xf739, (q15_t)0x7fb2, (q15_t)0xf733,
+  (q15_t)0x7fb1, (q15_t)0xf72c, (q15_t)0x7fb1, (q15_t)0xf726, (q15_t)0x7fb1, (q15_t)0xf720, (q15_t)0x7fb0, (q15_t)0xf71a,
+  (q15_t)0x7fb0, (q15_t)0xf713, (q15_t)0x7faf, (q15_t)0xf70d, (q15_t)0x7faf, (q15_t)0xf707, (q15_t)0x7fae, (q15_t)0xf700,
+  (q15_t)0x7fae, (q15_t)0xf6fa, (q15_t)0x7fae, (q15_t)0xf6f4, (q15_t)0x7fad, (q15_t)0xf6ee, (q15_t)0x7fad, (q15_t)0xf6e7,
+  (q15_t)0x7fac, (q15_t)0xf6e1, (q15_t)0x7fac, (q15_t)0xf6db, (q15_t)0x7fab, (q15_t)0xf6d5, (q15_t)0x7fab, (q15_t)0xf6ce,
+  (q15_t)0x7faa, (q15_t)0xf6c8, (q15_t)0x7faa, (q15_t)0xf6c2, (q15_t)0x7fa9, (q15_t)0xf6bc, (q15_t)0x7fa9, (q15_t)0xf6b5,
+  (q15_t)0x7fa9, (q15_t)0xf6af, (q15_t)0x7fa8, (q15_t)0xf6a9, (q15_t)0x7fa8, (q15_t)0xf6a2, (q15_t)0x7fa7, (q15_t)0xf69c,
+  (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7fa6, (q15_t)0xf690, (q15_t)0x7fa6, (q15_t)0xf689, (q15_t)0x7fa5, (q15_t)0xf683,
+  (q15_t)0x7fa5, (q15_t)0xf67d, (q15_t)0x7fa4, (q15_t)0xf677, (q15_t)0x7fa4, (q15_t)0xf670, (q15_t)0x7fa3, (q15_t)0xf66a,
+  (q15_t)0x7fa3, (q15_t)0xf664, (q15_t)0x7fa3, (q15_t)0xf65e, (q15_t)0x7fa2, (q15_t)0xf657, (q15_t)0x7fa2, (q15_t)0xf651,
+  (q15_t)0x7fa1, (q15_t)0xf64b, (q15_t)0x7fa1, (q15_t)0xf644, (q15_t)0x7fa0, (q15_t)0xf63e, (q15_t)0x7fa0, (q15_t)0xf638,
+  (q15_t)0x7f9f, (q15_t)0xf632, (q15_t)0x7f9f, (q15_t)0xf62b, (q15_t)0x7f9e, (q15_t)0xf625, (q15_t)0x7f9e, (q15_t)0xf61f,
+  (q15_t)0x7f9d, (q15_t)0xf619, (q15_t)0x7f9d, (q15_t)0xf612, (q15_t)0x7f9c, (q15_t)0xf60c, (q15_t)0x7f9c, (q15_t)0xf606,
+  (q15_t)0x7f9b, (q15_t)0xf600, (q15_t)0x7f9b, (q15_t)0xf5f9, (q15_t)0x7f9a, (q15_t)0xf5f3, (q15_t)0x7f9a, (q15_t)0xf5ed,
+  (q15_t)0x7f99, (q15_t)0xf5e7, (q15_t)0x7f99, (q15_t)0xf5e0, (q15_t)0x7f98, (q15_t)0xf5da, (q15_t)0x7f98, (q15_t)0xf5d4,
+  (q15_t)0x7f97, (q15_t)0xf5cd, (q15_t)0x7f97, (q15_t)0xf5c7, (q15_t)0x7f96, (q15_t)0xf5c1, (q15_t)0x7f96, (q15_t)0xf5bb,
+  (q15_t)0x7f95, (q15_t)0xf5b4, (q15_t)0x7f95, (q15_t)0xf5ae, (q15_t)0x7f94, (q15_t)0xf5a8, (q15_t)0x7f94, (q15_t)0xf5a2,
+  (q15_t)0x7f93, (q15_t)0xf59b, (q15_t)0x7f93, (q15_t)0xf595, (q15_t)0x7f92, (q15_t)0xf58f, (q15_t)0x7f92, (q15_t)0xf589,
+  (q15_t)0x7f91, (q15_t)0xf582, (q15_t)0x7f91, (q15_t)0xf57c, (q15_t)0x7f90, (q15_t)0xf576, (q15_t)0x7f90, (q15_t)0xf570,
+  (q15_t)0x7f8f, (q15_t)0xf569, (q15_t)0x7f8f, (q15_t)0xf563, (q15_t)0x7f8e, (q15_t)0xf55d, (q15_t)0x7f8e, (q15_t)0xf556,
+  (q15_t)0x7f8d, (q15_t)0xf550, (q15_t)0x7f8d, (q15_t)0xf54a, (q15_t)0x7f8c, (q15_t)0xf544, (q15_t)0x7f8b, (q15_t)0xf53d,
+  (q15_t)0x7f8b, (q15_t)0xf537, (q15_t)0x7f8a, (q15_t)0xf531, (q15_t)0x7f8a, (q15_t)0xf52b, (q15_t)0x7f89, (q15_t)0xf524,
+  (q15_t)0x7f89, (q15_t)0xf51e, (q15_t)0x7f88, (q15_t)0xf518, (q15_t)0x7f88, (q15_t)0xf512, (q15_t)0x7f87, (q15_t)0xf50b,
+  (q15_t)0x7f87, (q15_t)0xf505, (q15_t)0x7f86, (q15_t)0xf4ff, (q15_t)0x7f86, (q15_t)0xf4f9, (q15_t)0x7f85, (q15_t)0xf4f2,
+  (q15_t)0x7f85, (q15_t)0xf4ec, (q15_t)0x7f84, (q15_t)0xf4e6, (q15_t)0x7f83, (q15_t)0xf4e0, (q15_t)0x7f83, (q15_t)0xf4d9,
+  (q15_t)0x7f82, (q15_t)0xf4d3, (q15_t)0x7f82, (q15_t)0xf4cd, (q15_t)0x7f81, (q15_t)0xf4c6, (q15_t)0x7f81, (q15_t)0xf4c0,
+  (q15_t)0x7f80, (q15_t)0xf4ba, (q15_t)0x7f80, (q15_t)0xf4b4, (q15_t)0x7f7f, (q15_t)0xf4ad, (q15_t)0x7f7e, (q15_t)0xf4a7,
+  (q15_t)0x7f7e, (q15_t)0xf4a1, (q15_t)0x7f7d, (q15_t)0xf49b, (q15_t)0x7f7d, (q15_t)0xf494, (q15_t)0x7f7c, (q15_t)0xf48e,
+  (q15_t)0x7f7c, (q15_t)0xf488, (q15_t)0x7f7b, (q15_t)0xf482, (q15_t)0x7f7b, (q15_t)0xf47b, (q15_t)0x7f7a, (q15_t)0xf475,
+  (q15_t)0x7f79, (q15_t)0xf46f, (q15_t)0x7f79, (q15_t)0xf469, (q15_t)0x7f78, (q15_t)0xf462, (q15_t)0x7f78, (q15_t)0xf45c,
+  (q15_t)0x7f77, (q15_t)0xf456, (q15_t)0x7f77, (q15_t)0xf450, (q15_t)0x7f76, (q15_t)0xf449, (q15_t)0x7f75, (q15_t)0xf443,
+  (q15_t)0x7f75, (q15_t)0xf43d, (q15_t)0x7f74, (q15_t)0xf437, (q15_t)0x7f74, (q15_t)0xf430, (q15_t)0x7f73, (q15_t)0xf42a,
+  (q15_t)0x7f72, (q15_t)0xf424, (q15_t)0x7f72, (q15_t)0xf41e, (q15_t)0x7f71, (q15_t)0xf417, (q15_t)0x7f71, (q15_t)0xf411,
+  (q15_t)0x7f70, (q15_t)0xf40b, (q15_t)0x7f70, (q15_t)0xf405, (q15_t)0x7f6f, (q15_t)0xf3fe, (q15_t)0x7f6e, (q15_t)0xf3f8,
+  (q15_t)0x7f6e, (q15_t)0xf3f2, (q15_t)0x7f6d, (q15_t)0xf3ec, (q15_t)0x7f6d, (q15_t)0xf3e5, (q15_t)0x7f6c, (q15_t)0xf3df,
+  (q15_t)0x7f6b, (q15_t)0xf3d9, (q15_t)0x7f6b, (q15_t)0xf3d2, (q15_t)0x7f6a, (q15_t)0xf3cc, (q15_t)0x7f6a, (q15_t)0xf3c6,
+  (q15_t)0x7f69, (q15_t)0xf3c0, (q15_t)0x7f68, (q15_t)0xf3b9, (q15_t)0x7f68, (q15_t)0xf3b3, (q15_t)0x7f67, (q15_t)0xf3ad,
+  (q15_t)0x7f67, (q15_t)0xf3a7, (q15_t)0x7f66, (q15_t)0xf3a0, (q15_t)0x7f65, (q15_t)0xf39a, (q15_t)0x7f65, (q15_t)0xf394,
+  (q15_t)0x7f64, (q15_t)0xf38e, (q15_t)0x7f64, (q15_t)0xf387, (q15_t)0x7f63, (q15_t)0xf381, (q15_t)0x7f62, (q15_t)0xf37b,
+  (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f61, (q15_t)0xf36e, (q15_t)0x7f60, (q15_t)0xf368, (q15_t)0x7f60, (q15_t)0xf362,
+  (q15_t)0x7f5f, (q15_t)0xf35c, (q15_t)0x7f5f, (q15_t)0xf355, (q15_t)0x7f5e, (q15_t)0xf34f, (q15_t)0x7f5d, (q15_t)0xf349,
+  (q15_t)0x7f5d, (q15_t)0xf343, (q15_t)0x7f5c, (q15_t)0xf33c, (q15_t)0x7f5b, (q15_t)0xf336, (q15_t)0x7f5b, (q15_t)0xf330,
+  (q15_t)0x7f5a, (q15_t)0xf32a, (q15_t)0x7f5a, (q15_t)0xf323, (q15_t)0x7f59, (q15_t)0xf31d, (q15_t)0x7f58, (q15_t)0xf317,
+  (q15_t)0x7f58, (q15_t)0xf311, (q15_t)0x7f57, (q15_t)0xf30a, (q15_t)0x7f56, (q15_t)0xf304, (q15_t)0x7f56, (q15_t)0xf2fe,
+  (q15_t)0x7f55, (q15_t)0xf2f8, (q15_t)0x7f55, (q15_t)0xf2f1, (q15_t)0x7f54, (q15_t)0xf2eb, (q15_t)0x7f53, (q15_t)0xf2e5,
+  (q15_t)0x7f53, (q15_t)0xf2df, (q15_t)0x7f52, (q15_t)0xf2d8, (q15_t)0x7f51, (q15_t)0xf2d2, (q15_t)0x7f51, (q15_t)0xf2cc,
+  (q15_t)0x7f50, (q15_t)0xf2c6, (q15_t)0x7f4f, (q15_t)0xf2bf, (q15_t)0x7f4f, (q15_t)0xf2b9, (q15_t)0x7f4e, (q15_t)0xf2b3,
+  (q15_t)0x7f4d, (q15_t)0xf2ad, (q15_t)0x7f4d, (q15_t)0xf2a6, (q15_t)0x7f4c, (q15_t)0xf2a0, (q15_t)0x7f4b, (q15_t)0xf29a,
+  (q15_t)0x7f4b, (q15_t)0xf294, (q15_t)0x7f4a, (q15_t)0xf28d, (q15_t)0x7f49, (q15_t)0xf287, (q15_t)0x7f49, (q15_t)0xf281,
+  (q15_t)0x7f48, (q15_t)0xf27b, (q15_t)0x7f47, (q15_t)0xf274, (q15_t)0x7f47, (q15_t)0xf26e, (q15_t)0x7f46, (q15_t)0xf268,
+  (q15_t)0x7f45, (q15_t)0xf262, (q15_t)0x7f45, (q15_t)0xf25b, (q15_t)0x7f44, (q15_t)0xf255, (q15_t)0x7f43, (q15_t)0xf24f,
+  (q15_t)0x7f43, (q15_t)0xf249, (q15_t)0x7f42, (q15_t)0xf242, (q15_t)0x7f41, (q15_t)0xf23c, (q15_t)0x7f41, (q15_t)0xf236,
+  (q15_t)0x7f40, (q15_t)0xf230, (q15_t)0x7f3f, (q15_t)0xf229, (q15_t)0x7f3f, (q15_t)0xf223, (q15_t)0x7f3e, (q15_t)0xf21d,
+  (q15_t)0x7f3d, (q15_t)0xf217, (q15_t)0x7f3d, (q15_t)0xf210, (q15_t)0x7f3c, (q15_t)0xf20a, (q15_t)0x7f3b, (q15_t)0xf204,
+  (q15_t)0x7f3b, (q15_t)0xf1fe, (q15_t)0x7f3a, (q15_t)0xf1f7, (q15_t)0x7f39, (q15_t)0xf1f1, (q15_t)0x7f39, (q15_t)0xf1eb,
+  (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f37, (q15_t)0xf1de, (q15_t)0x7f36, (q15_t)0xf1d8, (q15_t)0x7f36, (q15_t)0xf1d2,
+  (q15_t)0x7f35, (q15_t)0xf1cc, (q15_t)0x7f34, (q15_t)0xf1c6, (q15_t)0x7f34, (q15_t)0xf1bf, (q15_t)0x7f33, (q15_t)0xf1b9,
+  (q15_t)0x7f32, (q15_t)0xf1b3, (q15_t)0x7f32, (q15_t)0xf1ad, (q15_t)0x7f31, (q15_t)0xf1a6, (q15_t)0x7f30, (q15_t)0xf1a0,
+  (q15_t)0x7f2f, (q15_t)0xf19a, (q15_t)0x7f2f, (q15_t)0xf194, (q15_t)0x7f2e, (q15_t)0xf18d, (q15_t)0x7f2d, (q15_t)0xf187,
+  (q15_t)0x7f2d, (q15_t)0xf181, (q15_t)0x7f2c, (q15_t)0xf17b, (q15_t)0x7f2b, (q15_t)0xf174, (q15_t)0x7f2a, (q15_t)0xf16e,
+  (q15_t)0x7f2a, (q15_t)0xf168, (q15_t)0x7f29, (q15_t)0xf162, (q15_t)0x7f28, (q15_t)0xf15b, (q15_t)0x7f28, (q15_t)0xf155,
+  (q15_t)0x7f27, (q15_t)0xf14f, (q15_t)0x7f26, (q15_t)0xf149, (q15_t)0x7f25, (q15_t)0xf142, (q15_t)0x7f25, (q15_t)0xf13c,
+  (q15_t)0x7f24, (q15_t)0xf136, (q15_t)0x7f23, (q15_t)0xf130, (q15_t)0x7f23, (q15_t)0xf129, (q15_t)0x7f22, (q15_t)0xf123,
+  (q15_t)0x7f21, (q15_t)0xf11d, (q15_t)0x7f20, (q15_t)0xf117, (q15_t)0x7f20, (q15_t)0xf110, (q15_t)0x7f1f, (q15_t)0xf10a,
+  (q15_t)0x7f1e, (q15_t)0xf104, (q15_t)0x7f1d, (q15_t)0xf0fe, (q15_t)0x7f1d, (q15_t)0xf0f8, (q15_t)0x7f1c, (q15_t)0xf0f1,
+  (q15_t)0x7f1b, (q15_t)0xf0eb, (q15_t)0x7f1a, (q15_t)0xf0e5, (q15_t)0x7f1a, (q15_t)0xf0df, (q15_t)0x7f19, (q15_t)0xf0d8,
+  (q15_t)0x7f18, (q15_t)0xf0d2, (q15_t)0x7f17, (q15_t)0xf0cc, (q15_t)0x7f17, (q15_t)0xf0c6, (q15_t)0x7f16, (q15_t)0xf0bf,
+  (q15_t)0x7f15, (q15_t)0xf0b9, (q15_t)0x7f14, (q15_t)0xf0b3, (q15_t)0x7f14, (q15_t)0xf0ad, (q15_t)0x7f13, (q15_t)0xf0a6,
+  (q15_t)0x7f12, (q15_t)0xf0a0, (q15_t)0x7f11, (q15_t)0xf09a, (q15_t)0x7f11, (q15_t)0xf094, (q15_t)0x7f10, (q15_t)0xf08d,
+  (q15_t)0x7f0f, (q15_t)0xf087, (q15_t)0x7f0e, (q15_t)0xf081, (q15_t)0x7f0e, (q15_t)0xf07b, (q15_t)0x7f0d, (q15_t)0xf075,
+  (q15_t)0x7f0c, (q15_t)0xf06e, (q15_t)0x7f0b, (q15_t)0xf068, (q15_t)0x7f0b, (q15_t)0xf062, (q15_t)0x7f0a, (q15_t)0xf05c,
+  (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7f08, (q15_t)0xf04f, (q15_t)0x7f08, (q15_t)0xf049, (q15_t)0x7f07, (q15_t)0xf043,
+  (q15_t)0x7f06, (q15_t)0xf03c, (q15_t)0x7f05, (q15_t)0xf036, (q15_t)0x7f04, (q15_t)0xf030, (q15_t)0x7f04, (q15_t)0xf02a,
+  (q15_t)0x7f03, (q15_t)0xf023, (q15_t)0x7f02, (q15_t)0xf01d, (q15_t)0x7f01, (q15_t)0xf017, (q15_t)0x7f01, (q15_t)0xf011,
+  (q15_t)0x7f00, (q15_t)0xf00b, (q15_t)0x7eff, (q15_t)0xf004, (q15_t)0x7efe, (q15_t)0xeffe, (q15_t)0x7efd, (q15_t)0xeff8,
+  (q15_t)0x7efd, (q15_t)0xeff2, (q15_t)0x7efc, (q15_t)0xefeb, (q15_t)0x7efb, (q15_t)0xefe5, (q15_t)0x7efa, (q15_t)0xefdf,
+  (q15_t)0x7ef9, (q15_t)0xefd9, (q15_t)0x7ef9, (q15_t)0xefd2, (q15_t)0x7ef8, (q15_t)0xefcc, (q15_t)0x7ef7, (q15_t)0xefc6,
+  (q15_t)0x7ef6, (q15_t)0xefc0, (q15_t)0x7ef5, (q15_t)0xefb9, (q15_t)0x7ef5, (q15_t)0xefb3, (q15_t)0x7ef4, (q15_t)0xefad,
+  (q15_t)0x7ef3, (q15_t)0xefa7, (q15_t)0x7ef2, (q15_t)0xefa1, (q15_t)0x7ef1, (q15_t)0xef9a, (q15_t)0x7ef1, (q15_t)0xef94,
+  (q15_t)0x7ef0, (q15_t)0xef8e, (q15_t)0x7eef, (q15_t)0xef88, (q15_t)0x7eee, (q15_t)0xef81, (q15_t)0x7eed, (q15_t)0xef7b,
+  (q15_t)0x7eed, (q15_t)0xef75, (q15_t)0x7eec, (q15_t)0xef6f, (q15_t)0x7eeb, (q15_t)0xef68, (q15_t)0x7eea, (q15_t)0xef62,
+  (q15_t)0x7ee9, (q15_t)0xef5c, (q15_t)0x7ee9, (q15_t)0xef56, (q15_t)0x7ee8, (q15_t)0xef50, (q15_t)0x7ee7, (q15_t)0xef49,
+  (q15_t)0x7ee6, (q15_t)0xef43, (q15_t)0x7ee5, (q15_t)0xef3d, (q15_t)0x7ee4, (q15_t)0xef37, (q15_t)0x7ee4, (q15_t)0xef30,
+  (q15_t)0x7ee3, (q15_t)0xef2a, (q15_t)0x7ee2, (q15_t)0xef24, (q15_t)0x7ee1, (q15_t)0xef1e, (q15_t)0x7ee0, (q15_t)0xef18,
+  (q15_t)0x7edf, (q15_t)0xef11, (q15_t)0x7edf, (q15_t)0xef0b, (q15_t)0x7ede, (q15_t)0xef05, (q15_t)0x7edd, (q15_t)0xeeff,
+  (q15_t)0x7edc, (q15_t)0xeef8, (q15_t)0x7edb, (q15_t)0xeef2, (q15_t)0x7eda, (q15_t)0xeeec, (q15_t)0x7eda, (q15_t)0xeee6,
+  (q15_t)0x7ed9, (q15_t)0xeedf, (q15_t)0x7ed8, (q15_t)0xeed9, (q15_t)0x7ed7, (q15_t)0xeed3, (q15_t)0x7ed6, (q15_t)0xeecd,
+  (q15_t)0x7ed5, (q15_t)0xeec7, (q15_t)0x7ed5, (q15_t)0xeec0, (q15_t)0x7ed4, (q15_t)0xeeba, (q15_t)0x7ed3, (q15_t)0xeeb4,
+  (q15_t)0x7ed2, (q15_t)0xeeae, (q15_t)0x7ed1, (q15_t)0xeea7, (q15_t)0x7ed0, (q15_t)0xeea1, (q15_t)0x7ecf, (q15_t)0xee9b,
+  (q15_t)0x7ecf, (q15_t)0xee95, (q15_t)0x7ece, (q15_t)0xee8f, (q15_t)0x7ecd, (q15_t)0xee88, (q15_t)0x7ecc, (q15_t)0xee82,
+  (q15_t)0x7ecb, (q15_t)0xee7c, (q15_t)0x7eca, (q15_t)0xee76, (q15_t)0x7ec9, (q15_t)0xee6f, (q15_t)0x7ec9, (q15_t)0xee69,
+  (q15_t)0x7ec8, (q15_t)0xee63, (q15_t)0x7ec7, (q15_t)0xee5d, (q15_t)0x7ec6, (q15_t)0xee57, (q15_t)0x7ec5, (q15_t)0xee50,
+  (q15_t)0x7ec4, (q15_t)0xee4a, (q15_t)0x7ec3, (q15_t)0xee44, (q15_t)0x7ec3, (q15_t)0xee3e, (q15_t)0x7ec2, (q15_t)0xee37,
+  (q15_t)0x7ec1, (q15_t)0xee31, (q15_t)0x7ec0, (q15_t)0xee2b, (q15_t)0x7ebf, (q15_t)0xee25, (q15_t)0x7ebe, (q15_t)0xee1f,
+  (q15_t)0x7ebd, (q15_t)0xee18, (q15_t)0x7ebc, (q15_t)0xee12, (q15_t)0x7ebb, (q15_t)0xee0c, (q15_t)0x7ebb, (q15_t)0xee06,
+  (q15_t)0x7eba, (q15_t)0xedff, (q15_t)0x7eb9, (q15_t)0xedf9, (q15_t)0x7eb8, (q15_t)0xedf3, (q15_t)0x7eb7, (q15_t)0xeded,
+  (q15_t)0x7eb6, (q15_t)0xede7, (q15_t)0x7eb5, (q15_t)0xede0, (q15_t)0x7eb4, (q15_t)0xedda, (q15_t)0x7eb4, (q15_t)0xedd4,
+  (q15_t)0x7eb3, (q15_t)0xedce, (q15_t)0x7eb2, (q15_t)0xedc7, (q15_t)0x7eb1, (q15_t)0xedc1, (q15_t)0x7eb0, (q15_t)0xedbb,
+  (q15_t)0x7eaf, (q15_t)0xedb5, (q15_t)0x7eae, (q15_t)0xedaf, (q15_t)0x7ead, (q15_t)0xeda8, (q15_t)0x7eac, (q15_t)0xeda2,
+  (q15_t)0x7eab, (q15_t)0xed9c, (q15_t)0x7eab, (q15_t)0xed96, (q15_t)0x7eaa, (q15_t)0xed8f, (q15_t)0x7ea9, (q15_t)0xed89,
+  (q15_t)0x7ea8, (q15_t)0xed83, (q15_t)0x7ea7, (q15_t)0xed7d, (q15_t)0x7ea6, (q15_t)0xed77, (q15_t)0x7ea5, (q15_t)0xed70,
+  (q15_t)0x7ea4, (q15_t)0xed6a, (q15_t)0x7ea3, (q15_t)0xed64, (q15_t)0x7ea2, (q15_t)0xed5e, (q15_t)0x7ea1, (q15_t)0xed58,
+  (q15_t)0x7ea1, (q15_t)0xed51, (q15_t)0x7ea0, (q15_t)0xed4b, (q15_t)0x7e9f, (q15_t)0xed45, (q15_t)0x7e9e, (q15_t)0xed3f,
+  (q15_t)0x7e9d, (q15_t)0xed38, (q15_t)0x7e9c, (q15_t)0xed32, (q15_t)0x7e9b, (q15_t)0xed2c, (q15_t)0x7e9a, (q15_t)0xed26,
+  (q15_t)0x7e99, (q15_t)0xed20, (q15_t)0x7e98, (q15_t)0xed19, (q15_t)0x7e97, (q15_t)0xed13, (q15_t)0x7e96, (q15_t)0xed0d,
+  (q15_t)0x7e95, (q15_t)0xed07, (q15_t)0x7e94, (q15_t)0xed01, (q15_t)0x7e94, (q15_t)0xecfa, (q15_t)0x7e93, (q15_t)0xecf4,
+  (q15_t)0x7e92, (q15_t)0xecee, (q15_t)0x7e91, (q15_t)0xece8, (q15_t)0x7e90, (q15_t)0xece1, (q15_t)0x7e8f, (q15_t)0xecdb,
+  (q15_t)0x7e8e, (q15_t)0xecd5, (q15_t)0x7e8d, (q15_t)0xeccf, (q15_t)0x7e8c, (q15_t)0xecc9, (q15_t)0x7e8b, (q15_t)0xecc2,
+  (q15_t)0x7e8a, (q15_t)0xecbc, (q15_t)0x7e89, (q15_t)0xecb6, (q15_t)0x7e88, (q15_t)0xecb0, (q15_t)0x7e87, (q15_t)0xecaa,
+  (q15_t)0x7e86, (q15_t)0xeca3, (q15_t)0x7e85, (q15_t)0xec9d, (q15_t)0x7e84, (q15_t)0xec97, (q15_t)0x7e84, (q15_t)0xec91,
+  (q15_t)0x7e83, (q15_t)0xec8a, (q15_t)0x7e82, (q15_t)0xec84, (q15_t)0x7e81, (q15_t)0xec7e, (q15_t)0x7e80, (q15_t)0xec78,
+  (q15_t)0x7e7f, (q15_t)0xec72, (q15_t)0x7e7e, (q15_t)0xec6b, (q15_t)0x7e7d, (q15_t)0xec65, (q15_t)0x7e7c, (q15_t)0xec5f,
+  (q15_t)0x7e7b, (q15_t)0xec59, (q15_t)0x7e7a, (q15_t)0xec53, (q15_t)0x7e79, (q15_t)0xec4c, (q15_t)0x7e78, (q15_t)0xec46,
+  (q15_t)0x7e77, (q15_t)0xec40, (q15_t)0x7e76, (q15_t)0xec3a, (q15_t)0x7e75, (q15_t)0xec34, (q15_t)0x7e74, (q15_t)0xec2d,
+  (q15_t)0x7e73, (q15_t)0xec27, (q15_t)0x7e72, (q15_t)0xec21, (q15_t)0x7e71, (q15_t)0xec1b, (q15_t)0x7e70, (q15_t)0xec15,
+  (q15_t)0x7e6f, (q15_t)0xec0e, (q15_t)0x7e6e, (q15_t)0xec08, (q15_t)0x7e6d, (q15_t)0xec02, (q15_t)0x7e6c, (q15_t)0xebfc,
+  (q15_t)0x7e6b, (q15_t)0xebf5, (q15_t)0x7e6a, (q15_t)0xebef, (q15_t)0x7e69, (q15_t)0xebe9, (q15_t)0x7e68, (q15_t)0xebe3,
+  (q15_t)0x7e67, (q15_t)0xebdd, (q15_t)0x7e66, (q15_t)0xebd6, (q15_t)0x7e65, (q15_t)0xebd0, (q15_t)0x7e64, (q15_t)0xebca,
+  (q15_t)0x7e63, (q15_t)0xebc4, (q15_t)0x7e62, (q15_t)0xebbe, (q15_t)0x7e61, (q15_t)0xebb7, (q15_t)0x7e60, (q15_t)0xebb1,
+  (q15_t)0x7e5f, (q15_t)0xebab, (q15_t)0x7e5e, (q15_t)0xeba5, (q15_t)0x7e5d, (q15_t)0xeb9f, (q15_t)0x7e5c, (q15_t)0xeb98,
+  (q15_t)0x7e5b, (q15_t)0xeb92, (q15_t)0x7e5a, (q15_t)0xeb8c, (q15_t)0x7e59, (q15_t)0xeb86, (q15_t)0x7e58, (q15_t)0xeb80,
+  (q15_t)0x7e57, (q15_t)0xeb79, (q15_t)0x7e56, (q15_t)0xeb73, (q15_t)0x7e55, (q15_t)0xeb6d, (q15_t)0x7e54, (q15_t)0xeb67,
+  (q15_t)0x7e53, (q15_t)0xeb61, (q15_t)0x7e52, (q15_t)0xeb5a, (q15_t)0x7e51, (q15_t)0xeb54, (q15_t)0x7e50, (q15_t)0xeb4e,
+  (q15_t)0x7e4f, (q15_t)0xeb48, (q15_t)0x7e4e, (q15_t)0xeb42, (q15_t)0x7e4d, (q15_t)0xeb3b, (q15_t)0x7e4c, (q15_t)0xeb35,
+  (q15_t)0x7e4b, (q15_t)0xeb2f, (q15_t)0x7e4a, (q15_t)0xeb29, (q15_t)0x7e49, (q15_t)0xeb23, (q15_t)0x7e48, (q15_t)0xeb1c,
+  (q15_t)0x7e47, (q15_t)0xeb16, (q15_t)0x7e46, (q15_t)0xeb10, (q15_t)0x7e45, (q15_t)0xeb0a, (q15_t)0x7e44, (q15_t)0xeb04,
+  (q15_t)0x7e43, (q15_t)0xeafd, (q15_t)0x7e42, (q15_t)0xeaf7, (q15_t)0x7e41, (q15_t)0xeaf1, (q15_t)0x7e40, (q15_t)0xeaeb,
+  (q15_t)0x7e3f, (q15_t)0xeae5, (q15_t)0x7e3e, (q15_t)0xeade, (q15_t)0x7e3d, (q15_t)0xead8, (q15_t)0x7e3c, (q15_t)0xead2,
+  (q15_t)0x7e3b, (q15_t)0xeacc, (q15_t)0x7e3a, (q15_t)0xeac6, (q15_t)0x7e39, (q15_t)0xeabf, (q15_t)0x7e38, (q15_t)0xeab9,
+  (q15_t)0x7e37, (q15_t)0xeab3, (q15_t)0x7e35, (q15_t)0xeaad, (q15_t)0x7e34, (q15_t)0xeaa7, (q15_t)0x7e33, (q15_t)0xeaa0,
+  (q15_t)0x7e32, (q15_t)0xea9a, (q15_t)0x7e31, (q15_t)0xea94, (q15_t)0x7e30, (q15_t)0xea8e, (q15_t)0x7e2f, (q15_t)0xea88,
+  (q15_t)0x7e2e, (q15_t)0xea81, (q15_t)0x7e2d, (q15_t)0xea7b, (q15_t)0x7e2c, (q15_t)0xea75, (q15_t)0x7e2b, (q15_t)0xea6f,
+  (q15_t)0x7e2a, (q15_t)0xea69, (q15_t)0x7e29, (q15_t)0xea63, (q15_t)0x7e28, (q15_t)0xea5c, (q15_t)0x7e27, (q15_t)0xea56,
+  (q15_t)0x7e26, (q15_t)0xea50, (q15_t)0x7e25, (q15_t)0xea4a, (q15_t)0x7e24, (q15_t)0xea44, (q15_t)0x7e22, (q15_t)0xea3d,
+  (q15_t)0x7e21, (q15_t)0xea37, (q15_t)0x7e20, (q15_t)0xea31, (q15_t)0x7e1f, (q15_t)0xea2b, (q15_t)0x7e1e, (q15_t)0xea25,
+  (q15_t)0x7e1d, (q15_t)0xea1e, (q15_t)0x7e1c, (q15_t)0xea18, (q15_t)0x7e1b, (q15_t)0xea12, (q15_t)0x7e1a, (q15_t)0xea0c,
+  (q15_t)0x7e19, (q15_t)0xea06, (q15_t)0x7e18, (q15_t)0xe9ff, (q15_t)0x7e17, (q15_t)0xe9f9, (q15_t)0x7e16, (q15_t)0xe9f3,
+  (q15_t)0x7e14, (q15_t)0xe9ed, (q15_t)0x7e13, (q15_t)0xe9e7, (q15_t)0x7e12, (q15_t)0xe9e1, (q15_t)0x7e11, (q15_t)0xe9da,
+  (q15_t)0x7e10, (q15_t)0xe9d4, (q15_t)0x7e0f, (q15_t)0xe9ce, (q15_t)0x7e0e, (q15_t)0xe9c8, (q15_t)0x7e0d, (q15_t)0xe9c2,
+  (q15_t)0x7e0c, (q15_t)0xe9bb, (q15_t)0x7e0b, (q15_t)0xe9b5, (q15_t)0x7e0a, (q15_t)0xe9af, (q15_t)0x7e08, (q15_t)0xe9a9,
+  (q15_t)0x7e07, (q15_t)0xe9a3, (q15_t)0x7e06, (q15_t)0xe99c, (q15_t)0x7e05, (q15_t)0xe996, (q15_t)0x7e04, (q15_t)0xe990,
+  (q15_t)0x7e03, (q15_t)0xe98a, (q15_t)0x7e02, (q15_t)0xe984, (q15_t)0x7e01, (q15_t)0xe97e, (q15_t)0x7e00, (q15_t)0xe977,
+  (q15_t)0x7dff, (q15_t)0xe971, (q15_t)0x7dfd, (q15_t)0xe96b, (q15_t)0x7dfc, (q15_t)0xe965, (q15_t)0x7dfb, (q15_t)0xe95f,
+  (q15_t)0x7dfa, (q15_t)0xe958, (q15_t)0x7df9, (q15_t)0xe952, (q15_t)0x7df8, (q15_t)0xe94c, (q15_t)0x7df7, (q15_t)0xe946,
+  (q15_t)0x7df6, (q15_t)0xe940, (q15_t)0x7df5, (q15_t)0xe93a, (q15_t)0x7df3, (q15_t)0xe933, (q15_t)0x7df2, (q15_t)0xe92d,
+  (q15_t)0x7df1, (q15_t)0xe927, (q15_t)0x7df0, (q15_t)0xe921, (q15_t)0x7def, (q15_t)0xe91b, (q15_t)0x7dee, (q15_t)0xe914,
+  (q15_t)0x7ded, (q15_t)0xe90e, (q15_t)0x7dec, (q15_t)0xe908, (q15_t)0x7dea, (q15_t)0xe902, (q15_t)0x7de9, (q15_t)0xe8fc,
+  (q15_t)0x7de8, (q15_t)0xe8f6, (q15_t)0x7de7, (q15_t)0xe8ef, (q15_t)0x7de6, (q15_t)0xe8e9, (q15_t)0x7de5, (q15_t)0xe8e3,
+  (q15_t)0x7de4, (q15_t)0xe8dd, (q15_t)0x7de2, (q15_t)0xe8d7, (q15_t)0x7de1, (q15_t)0xe8d0, (q15_t)0x7de0, (q15_t)0xe8ca,
+  (q15_t)0x7ddf, (q15_t)0xe8c4, (q15_t)0x7dde, (q15_t)0xe8be, (q15_t)0x7ddd, (q15_t)0xe8b8, (q15_t)0x7ddc, (q15_t)0xe8b2,
+  (q15_t)0x7dda, (q15_t)0xe8ab, (q15_t)0x7dd9, (q15_t)0xe8a5, (q15_t)0x7dd8, (q15_t)0xe89f, (q15_t)0x7dd7, (q15_t)0xe899,
+  (q15_t)0x7dd6, (q15_t)0xe893, (q15_t)0x7dd5, (q15_t)0xe88c, (q15_t)0x7dd4, (q15_t)0xe886, (q15_t)0x7dd2, (q15_t)0xe880,
+  (q15_t)0x7dd1, (q15_t)0xe87a, (q15_t)0x7dd0, (q15_t)0xe874, (q15_t)0x7dcf, (q15_t)0xe86e, (q15_t)0x7dce, (q15_t)0xe867,
+  (q15_t)0x7dcd, (q15_t)0xe861, (q15_t)0x7dcc, (q15_t)0xe85b, (q15_t)0x7dca, (q15_t)0xe855, (q15_t)0x7dc9, (q15_t)0xe84f,
+  (q15_t)0x7dc8, (q15_t)0xe849, (q15_t)0x7dc7, (q15_t)0xe842, (q15_t)0x7dc6, (q15_t)0xe83c, (q15_t)0x7dc5, (q15_t)0xe836,
+  (q15_t)0x7dc3, (q15_t)0xe830, (q15_t)0x7dc2, (q15_t)0xe82a, (q15_t)0x7dc1, (q15_t)0xe823, (q15_t)0x7dc0, (q15_t)0xe81d,
+  (q15_t)0x7dbf, (q15_t)0xe817, (q15_t)0x7dbd, (q15_t)0xe811, (q15_t)0x7dbc, (q15_t)0xe80b, (q15_t)0x7dbb, (q15_t)0xe805,
+  (q15_t)0x7dba, (q15_t)0xe7fe, (q15_t)0x7db9, (q15_t)0xe7f8, (q15_t)0x7db8, (q15_t)0xe7f2, (q15_t)0x7db6, (q15_t)0xe7ec,
+  (q15_t)0x7db5, (q15_t)0xe7e6, (q15_t)0x7db4, (q15_t)0xe7e0, (q15_t)0x7db3, (q15_t)0xe7d9, (q15_t)0x7db2, (q15_t)0xe7d3,
+  (q15_t)0x7db0, (q15_t)0xe7cd, (q15_t)0x7daf, (q15_t)0xe7c7, (q15_t)0x7dae, (q15_t)0xe7c1, (q15_t)0x7dad, (q15_t)0xe7bb,
+  (q15_t)0x7dac, (q15_t)0xe7b4, (q15_t)0x7dab, (q15_t)0xe7ae, (q15_t)0x7da9, (q15_t)0xe7a8, (q15_t)0x7da8, (q15_t)0xe7a2,
+  (q15_t)0x7da7, (q15_t)0xe79c, (q15_t)0x7da6, (q15_t)0xe796, (q15_t)0x7da5, (q15_t)0xe78f, (q15_t)0x7da3, (q15_t)0xe789,
+  (q15_t)0x7da2, (q15_t)0xe783, (q15_t)0x7da1, (q15_t)0xe77d, (q15_t)0x7da0, (q15_t)0xe777, (q15_t)0x7d9f, (q15_t)0xe771,
+  (q15_t)0x7d9d, (q15_t)0xe76a, (q15_t)0x7d9c, (q15_t)0xe764, (q15_t)0x7d9b, (q15_t)0xe75e, (q15_t)0x7d9a, (q15_t)0xe758,
+  (q15_t)0x7d98, (q15_t)0xe752, (q15_t)0x7d97, (q15_t)0xe74c, (q15_t)0x7d96, (q15_t)0xe745, (q15_t)0x7d95, (q15_t)0xe73f,
+  (q15_t)0x7d94, (q15_t)0xe739, (q15_t)0x7d92, (q15_t)0xe733, (q15_t)0x7d91, (q15_t)0xe72d, (q15_t)0x7d90, (q15_t)0xe727,
+  (q15_t)0x7d8f, (q15_t)0xe720, (q15_t)0x7d8e, (q15_t)0xe71a, (q15_t)0x7d8c, (q15_t)0xe714, (q15_t)0x7d8b, (q15_t)0xe70e,
+  (q15_t)0x7d8a, (q15_t)0xe708, (q15_t)0x7d89, (q15_t)0xe702, (q15_t)0x7d87, (q15_t)0xe6fb, (q15_t)0x7d86, (q15_t)0xe6f5,
+  (q15_t)0x7d85, (q15_t)0xe6ef, (q15_t)0x7d84, (q15_t)0xe6e9, (q15_t)0x7d82, (q15_t)0xe6e3, (q15_t)0x7d81, (q15_t)0xe6dd,
+  (q15_t)0x7d80, (q15_t)0xe6d6, (q15_t)0x7d7f, (q15_t)0xe6d0, (q15_t)0x7d7e, (q15_t)0xe6ca, (q15_t)0x7d7c, (q15_t)0xe6c4,
+  (q15_t)0x7d7b, (q15_t)0xe6be, (q15_t)0x7d7a, (q15_t)0xe6b8, (q15_t)0x7d79, (q15_t)0xe6b2, (q15_t)0x7d77, (q15_t)0xe6ab,
+  (q15_t)0x7d76, (q15_t)0xe6a5, (q15_t)0x7d75, (q15_t)0xe69f, (q15_t)0x7d74, (q15_t)0xe699, (q15_t)0x7d72, (q15_t)0xe693,
+  (q15_t)0x7d71, (q15_t)0xe68d, (q15_t)0x7d70, (q15_t)0xe686, (q15_t)0x7d6f, (q15_t)0xe680, (q15_t)0x7d6d, (q15_t)0xe67a,
+  (q15_t)0x7d6c, (q15_t)0xe674, (q15_t)0x7d6b, (q15_t)0xe66e, (q15_t)0x7d6a, (q15_t)0xe668, (q15_t)0x7d68, (q15_t)0xe661,
+  (q15_t)0x7d67, (q15_t)0xe65b, (q15_t)0x7d66, (q15_t)0xe655, (q15_t)0x7d65, (q15_t)0xe64f, (q15_t)0x7d63, (q15_t)0xe649,
+  (q15_t)0x7d62, (q15_t)0xe643, (q15_t)0x7d61, (q15_t)0xe63d, (q15_t)0x7d60, (q15_t)0xe636, (q15_t)0x7d5e, (q15_t)0xe630,
+  (q15_t)0x7d5d, (q15_t)0xe62a, (q15_t)0x7d5c, (q15_t)0xe624, (q15_t)0x7d5a, (q15_t)0xe61e, (q15_t)0x7d59, (q15_t)0xe618,
+  (q15_t)0x7d58, (q15_t)0xe611, (q15_t)0x7d57, (q15_t)0xe60b, (q15_t)0x7d55, (q15_t)0xe605, (q15_t)0x7d54, (q15_t)0xe5ff,
+  (q15_t)0x7d53, (q15_t)0xe5f9, (q15_t)0x7d52, (q15_t)0xe5f3, (q15_t)0x7d50, (q15_t)0xe5ed, (q15_t)0x7d4f, (q15_t)0xe5e6,
+  (q15_t)0x7d4e, (q15_t)0xe5e0, (q15_t)0x7d4c, (q15_t)0xe5da, (q15_t)0x7d4b, (q15_t)0xe5d4, (q15_t)0x7d4a, (q15_t)0xe5ce,
+  (q15_t)0x7d49, (q15_t)0xe5c8, (q15_t)0x7d47, (q15_t)0xe5c2, (q15_t)0x7d46, (q15_t)0xe5bb, (q15_t)0x7d45, (q15_t)0xe5b5,
+  (q15_t)0x7d43, (q15_t)0xe5af, (q15_t)0x7d42, (q15_t)0xe5a9, (q15_t)0x7d41, (q15_t)0xe5a3, (q15_t)0x7d3f, (q15_t)0xe59d,
+  (q15_t)0x7d3e, (q15_t)0xe596, (q15_t)0x7d3d, (q15_t)0xe590, (q15_t)0x7d3c, (q15_t)0xe58a, (q15_t)0x7d3a, (q15_t)0xe584,
+  (q15_t)0x7d39, (q15_t)0xe57e, (q15_t)0x7d38, (q15_t)0xe578, (q15_t)0x7d36, (q15_t)0xe572, (q15_t)0x7d35, (q15_t)0xe56b,
+  (q15_t)0x7d34, (q15_t)0xe565, (q15_t)0x7d32, (q15_t)0xe55f, (q15_t)0x7d31, (q15_t)0xe559, (q15_t)0x7d30, (q15_t)0xe553,
+  (q15_t)0x7d2f, (q15_t)0xe54d, (q15_t)0x7d2d, (q15_t)0xe547, (q15_t)0x7d2c, (q15_t)0xe540, (q15_t)0x7d2b, (q15_t)0xe53a,
+  (q15_t)0x7d29, (q15_t)0xe534, (q15_t)0x7d28, (q15_t)0xe52e, (q15_t)0x7d27, (q15_t)0xe528, (q15_t)0x7d25, (q15_t)0xe522,
+  (q15_t)0x7d24, (q15_t)0xe51c, (q15_t)0x7d23, (q15_t)0xe515, (q15_t)0x7d21, (q15_t)0xe50f, (q15_t)0x7d20, (q15_t)0xe509,
+  (q15_t)0x7d1f, (q15_t)0xe503, (q15_t)0x7d1d, (q15_t)0xe4fd, (q15_t)0x7d1c, (q15_t)0xe4f7, (q15_t)0x7d1b, (q15_t)0xe4f1,
+  (q15_t)0x7d19, (q15_t)0xe4ea, (q15_t)0x7d18, (q15_t)0xe4e4, (q15_t)0x7d17, (q15_t)0xe4de, (q15_t)0x7d15, (q15_t)0xe4d8,
+  (q15_t)0x7d14, (q15_t)0xe4d2, (q15_t)0x7d13, (q15_t)0xe4cc, (q15_t)0x7d11, (q15_t)0xe4c6, (q15_t)0x7d10, (q15_t)0xe4bf,
+  (q15_t)0x7d0f, (q15_t)0xe4b9, (q15_t)0x7d0d, (q15_t)0xe4b3, (q15_t)0x7d0c, (q15_t)0xe4ad, (q15_t)0x7d0b, (q15_t)0xe4a7,
+  (q15_t)0x7d09, (q15_t)0xe4a1, (q15_t)0x7d08, (q15_t)0xe49b, (q15_t)0x7d07, (q15_t)0xe494, (q15_t)0x7d05, (q15_t)0xe48e,
+  (q15_t)0x7d04, (q15_t)0xe488, (q15_t)0x7d03, (q15_t)0xe482, (q15_t)0x7d01, (q15_t)0xe47c, (q15_t)0x7d00, (q15_t)0xe476,
+  (q15_t)0x7cff, (q15_t)0xe470, (q15_t)0x7cfd, (q15_t)0xe46a, (q15_t)0x7cfc, (q15_t)0xe463, (q15_t)0x7cfb, (q15_t)0xe45d,
+  (q15_t)0x7cf9, (q15_t)0xe457, (q15_t)0x7cf8, (q15_t)0xe451, (q15_t)0x7cf6, (q15_t)0xe44b, (q15_t)0x7cf5, (q15_t)0xe445,
+  (q15_t)0x7cf4, (q15_t)0xe43f, (q15_t)0x7cf2, (q15_t)0xe438, (q15_t)0x7cf1, (q15_t)0xe432, (q15_t)0x7cf0, (q15_t)0xe42c,
+  (q15_t)0x7cee, (q15_t)0xe426, (q15_t)0x7ced, (q15_t)0xe420, (q15_t)0x7cec, (q15_t)0xe41a, (q15_t)0x7cea, (q15_t)0xe414,
+  (q15_t)0x7ce9, (q15_t)0xe40e, (q15_t)0x7ce7, (q15_t)0xe407, (q15_t)0x7ce6, (q15_t)0xe401, (q15_t)0x7ce5, (q15_t)0xe3fb,
+  (q15_t)0x7ce3, (q15_t)0xe3f5, (q15_t)0x7ce2, (q15_t)0xe3ef, (q15_t)0x7ce1, (q15_t)0xe3e9, (q15_t)0x7cdf, (q15_t)0xe3e3,
+  (q15_t)0x7cde, (q15_t)0xe3dc, (q15_t)0x7cdc, (q15_t)0xe3d6, (q15_t)0x7cdb, (q15_t)0xe3d0, (q15_t)0x7cda, (q15_t)0xe3ca,
+  (q15_t)0x7cd8, (q15_t)0xe3c4, (q15_t)0x7cd7, (q15_t)0xe3be, (q15_t)0x7cd5, (q15_t)0xe3b8, (q15_t)0x7cd4, (q15_t)0xe3b2,
+  (q15_t)0x7cd3, (q15_t)0xe3ab, (q15_t)0x7cd1, (q15_t)0xe3a5, (q15_t)0x7cd0, (q15_t)0xe39f, (q15_t)0x7ccf, (q15_t)0xe399,
+  (q15_t)0x7ccd, (q15_t)0xe393, (q15_t)0x7ccc, (q15_t)0xe38d, (q15_t)0x7cca, (q15_t)0xe387, (q15_t)0x7cc9, (q15_t)0xe381,
+  (q15_t)0x7cc8, (q15_t)0xe37a, (q15_t)0x7cc6, (q15_t)0xe374, (q15_t)0x7cc5, (q15_t)0xe36e, (q15_t)0x7cc3, (q15_t)0xe368,
+  (q15_t)0x7cc2, (q15_t)0xe362, (q15_t)0x7cc1, (q15_t)0xe35c, (q15_t)0x7cbf, (q15_t)0xe356, (q15_t)0x7cbe, (q15_t)0xe350,
+  (q15_t)0x7cbc, (q15_t)0xe349, (q15_t)0x7cbb, (q15_t)0xe343, (q15_t)0x7cb9, (q15_t)0xe33d, (q15_t)0x7cb8, (q15_t)0xe337,
+  (q15_t)0x7cb7, (q15_t)0xe331, (q15_t)0x7cb5, (q15_t)0xe32b, (q15_t)0x7cb4, (q15_t)0xe325, (q15_t)0x7cb2, (q15_t)0xe31f,
+  (q15_t)0x7cb1, (q15_t)0xe318, (q15_t)0x7cb0, (q15_t)0xe312, (q15_t)0x7cae, (q15_t)0xe30c, (q15_t)0x7cad, (q15_t)0xe306,
+  (q15_t)0x7cab, (q15_t)0xe300, (q15_t)0x7caa, (q15_t)0xe2fa, (q15_t)0x7ca8, (q15_t)0xe2f4, (q15_t)0x7ca7, (q15_t)0xe2ee,
+  (q15_t)0x7ca6, (q15_t)0xe2e8, (q15_t)0x7ca4, (q15_t)0xe2e1, (q15_t)0x7ca3, (q15_t)0xe2db, (q15_t)0x7ca1, (q15_t)0xe2d5,
+  (q15_t)0x7ca0, (q15_t)0xe2cf, (q15_t)0x7c9e, (q15_t)0xe2c9, (q15_t)0x7c9d, (q15_t)0xe2c3, (q15_t)0x7c9c, (q15_t)0xe2bd,
+  (q15_t)0x7c9a, (q15_t)0xe2b7, (q15_t)0x7c99, (q15_t)0xe2b0, (q15_t)0x7c97, (q15_t)0xe2aa, (q15_t)0x7c96, (q15_t)0xe2a4,
+  (q15_t)0x7c94, (q15_t)0xe29e, (q15_t)0x7c93, (q15_t)0xe298, (q15_t)0x7c91, (q15_t)0xe292, (q15_t)0x7c90, (q15_t)0xe28c,
+  (q15_t)0x7c8f, (q15_t)0xe286, (q15_t)0x7c8d, (q15_t)0xe280, (q15_t)0x7c8c, (q15_t)0xe279, (q15_t)0x7c8a, (q15_t)0xe273,
+  (q15_t)0x7c89, (q15_t)0xe26d, (q15_t)0x7c87, (q15_t)0xe267, (q15_t)0x7c86, (q15_t)0xe261, (q15_t)0x7c84, (q15_t)0xe25b,
+  (q15_t)0x7c83, (q15_t)0xe255, (q15_t)0x7c82, (q15_t)0xe24f, (q15_t)0x7c80, (q15_t)0xe249, (q15_t)0x7c7f, (q15_t)0xe242,
+  (q15_t)0x7c7d, (q15_t)0xe23c, (q15_t)0x7c7c, (q15_t)0xe236, (q15_t)0x7c7a, (q15_t)0xe230, (q15_t)0x7c79, (q15_t)0xe22a,
+  (q15_t)0x7c77, (q15_t)0xe224, (q15_t)0x7c76, (q15_t)0xe21e, (q15_t)0x7c74, (q15_t)0xe218, (q15_t)0x7c73, (q15_t)0xe212,
+  (q15_t)0x7c71, (q15_t)0xe20b, (q15_t)0x7c70, (q15_t)0xe205, (q15_t)0x7c6e, (q15_t)0xe1ff, (q15_t)0x7c6d, (q15_t)0xe1f9,
+  (q15_t)0x7c6c, (q15_t)0xe1f3, (q15_t)0x7c6a, (q15_t)0xe1ed, (q15_t)0x7c69, (q15_t)0xe1e7, (q15_t)0x7c67, (q15_t)0xe1e1,
+  (q15_t)0x7c66, (q15_t)0xe1db, (q15_t)0x7c64, (q15_t)0xe1d4, (q15_t)0x7c63, (q15_t)0xe1ce, (q15_t)0x7c61, (q15_t)0xe1c8,
+  (q15_t)0x7c60, (q15_t)0xe1c2, (q15_t)0x7c5e, (q15_t)0xe1bc, (q15_t)0x7c5d, (q15_t)0xe1b6, (q15_t)0x7c5b, (q15_t)0xe1b0,
+  (q15_t)0x7c5a, (q15_t)0xe1aa, (q15_t)0x7c58, (q15_t)0xe1a4, (q15_t)0x7c57, (q15_t)0xe19e, (q15_t)0x7c55, (q15_t)0xe197,
+  (q15_t)0x7c54, (q15_t)0xe191, (q15_t)0x7c52, (q15_t)0xe18b, (q15_t)0x7c51, (q15_t)0xe185, (q15_t)0x7c4f, (q15_t)0xe17f,
+  (q15_t)0x7c4e, (q15_t)0xe179, (q15_t)0x7c4c, (q15_t)0xe173, (q15_t)0x7c4b, (q15_t)0xe16d, (q15_t)0x7c49, (q15_t)0xe167,
+  (q15_t)0x7c48, (q15_t)0xe160, (q15_t)0x7c46, (q15_t)0xe15a, (q15_t)0x7c45, (q15_t)0xe154, (q15_t)0x7c43, (q15_t)0xe14e,
+  (q15_t)0x7c42, (q15_t)0xe148, (q15_t)0x7c40, (q15_t)0xe142, (q15_t)0x7c3f, (q15_t)0xe13c, (q15_t)0x7c3d, (q15_t)0xe136,
+  (q15_t)0x7c3c, (q15_t)0xe130, (q15_t)0x7c3a, (q15_t)0xe12a, (q15_t)0x7c39, (q15_t)0xe123, (q15_t)0x7c37, (q15_t)0xe11d,
+  (q15_t)0x7c36, (q15_t)0xe117, (q15_t)0x7c34, (q15_t)0xe111, (q15_t)0x7c33, (q15_t)0xe10b, (q15_t)0x7c31, (q15_t)0xe105,
+  (q15_t)0x7c30, (q15_t)0xe0ff, (q15_t)0x7c2e, (q15_t)0xe0f9, (q15_t)0x7c2d, (q15_t)0xe0f3, (q15_t)0x7c2b, (q15_t)0xe0ed,
+  (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7c28, (q15_t)0xe0e0, (q15_t)0x7c26, (q15_t)0xe0da, (q15_t)0x7c25, (q15_t)0xe0d4,
+  (q15_t)0x7c23, (q15_t)0xe0ce, (q15_t)0x7c22, (q15_t)0xe0c8, (q15_t)0x7c20, (q15_t)0xe0c2, (q15_t)0x7c1f, (q15_t)0xe0bc,
+  (q15_t)0x7c1d, (q15_t)0xe0b6, (q15_t)0x7c1c, (q15_t)0xe0b0, (q15_t)0x7c1a, (q15_t)0xe0aa, (q15_t)0x7c19, (q15_t)0xe0a3,
+  (q15_t)0x7c17, (q15_t)0xe09d, (q15_t)0x7c16, (q15_t)0xe097, (q15_t)0x7c14, (q15_t)0xe091, (q15_t)0x7c12, (q15_t)0xe08b,
+  (q15_t)0x7c11, (q15_t)0xe085, (q15_t)0x7c0f, (q15_t)0xe07f, (q15_t)0x7c0e, (q15_t)0xe079, (q15_t)0x7c0c, (q15_t)0xe073,
+  (q15_t)0x7c0b, (q15_t)0xe06d, (q15_t)0x7c09, (q15_t)0xe067, (q15_t)0x7c08, (q15_t)0xe061, (q15_t)0x7c06, (q15_t)0xe05a,
+  (q15_t)0x7c05, (q15_t)0xe054, (q15_t)0x7c03, (q15_t)0xe04e, (q15_t)0x7c01, (q15_t)0xe048, (q15_t)0x7c00, (q15_t)0xe042,
+  (q15_t)0x7bfe, (q15_t)0xe03c, (q15_t)0x7bfd, (q15_t)0xe036, (q15_t)0x7bfb, (q15_t)0xe030, (q15_t)0x7bfa, (q15_t)0xe02a,
+  (q15_t)0x7bf8, (q15_t)0xe024, (q15_t)0x7bf6, (q15_t)0xe01e, (q15_t)0x7bf5, (q15_t)0xe017, (q15_t)0x7bf3, (q15_t)0xe011,
+  (q15_t)0x7bf2, (q15_t)0xe00b, (q15_t)0x7bf0, (q15_t)0xe005, (q15_t)0x7bef, (q15_t)0xdfff, (q15_t)0x7bed, (q15_t)0xdff9,
+  (q15_t)0x7beb, (q15_t)0xdff3, (q15_t)0x7bea, (q15_t)0xdfed, (q15_t)0x7be8, (q15_t)0xdfe7, (q15_t)0x7be7, (q15_t)0xdfe1,
+  (q15_t)0x7be5, (q15_t)0xdfdb, (q15_t)0x7be4, (q15_t)0xdfd5, (q15_t)0x7be2, (q15_t)0xdfce, (q15_t)0x7be0, (q15_t)0xdfc8,
+  (q15_t)0x7bdf, (q15_t)0xdfc2, (q15_t)0x7bdd, (q15_t)0xdfbc, (q15_t)0x7bdc, (q15_t)0xdfb6, (q15_t)0x7bda, (q15_t)0xdfb0,
+  (q15_t)0x7bd9, (q15_t)0xdfaa, (q15_t)0x7bd7, (q15_t)0xdfa4, (q15_t)0x7bd5, (q15_t)0xdf9e, (q15_t)0x7bd4, (q15_t)0xdf98,
+  (q15_t)0x7bd2, (q15_t)0xdf92, (q15_t)0x7bd1, (q15_t)0xdf8c, (q15_t)0x7bcf, (q15_t)0xdf86, (q15_t)0x7bcd, (q15_t)0xdf7f,
+  (q15_t)0x7bcc, (q15_t)0xdf79, (q15_t)0x7bca, (q15_t)0xdf73, (q15_t)0x7bc9, (q15_t)0xdf6d, (q15_t)0x7bc7, (q15_t)0xdf67,
+  (q15_t)0x7bc5, (q15_t)0xdf61, (q15_t)0x7bc4, (q15_t)0xdf5b, (q15_t)0x7bc2, (q15_t)0xdf55, (q15_t)0x7bc1, (q15_t)0xdf4f,
+  (q15_t)0x7bbf, (q15_t)0xdf49, (q15_t)0x7bbd, (q15_t)0xdf43, (q15_t)0x7bbc, (q15_t)0xdf3d, (q15_t)0x7bba, (q15_t)0xdf37,
+  (q15_t)0x7bb9, (q15_t)0xdf30, (q15_t)0x7bb7, (q15_t)0xdf2a, (q15_t)0x7bb5, (q15_t)0xdf24, (q15_t)0x7bb4, (q15_t)0xdf1e,
+  (q15_t)0x7bb2, (q15_t)0xdf18, (q15_t)0x7bb0, (q15_t)0xdf12, (q15_t)0x7baf, (q15_t)0xdf0c, (q15_t)0x7bad, (q15_t)0xdf06,
+  (q15_t)0x7bac, (q15_t)0xdf00, (q15_t)0x7baa, (q15_t)0xdefa, (q15_t)0x7ba8, (q15_t)0xdef4, (q15_t)0x7ba7, (q15_t)0xdeee,
+  (q15_t)0x7ba5, (q15_t)0xdee8, (q15_t)0x7ba3, (q15_t)0xdee2, (q15_t)0x7ba2, (q15_t)0xdedb, (q15_t)0x7ba0, (q15_t)0xded5,
+  (q15_t)0x7b9f, (q15_t)0xdecf, (q15_t)0x7b9d, (q15_t)0xdec9, (q15_t)0x7b9b, (q15_t)0xdec3, (q15_t)0x7b9a, (q15_t)0xdebd,
+  (q15_t)0x7b98, (q15_t)0xdeb7, (q15_t)0x7b96, (q15_t)0xdeb1, (q15_t)0x7b95, (q15_t)0xdeab, (q15_t)0x7b93, (q15_t)0xdea5,
+  (q15_t)0x7b92, (q15_t)0xde9f, (q15_t)0x7b90, (q15_t)0xde99, (q15_t)0x7b8e, (q15_t)0xde93, (q15_t)0x7b8d, (q15_t)0xde8d,
+  (q15_t)0x7b8b, (q15_t)0xde87, (q15_t)0x7b89, (q15_t)0xde80, (q15_t)0x7b88, (q15_t)0xde7a, (q15_t)0x7b86, (q15_t)0xde74,
+  (q15_t)0x7b84, (q15_t)0xde6e, (q15_t)0x7b83, (q15_t)0xde68, (q15_t)0x7b81, (q15_t)0xde62, (q15_t)0x7b7f, (q15_t)0xde5c,
+  (q15_t)0x7b7e, (q15_t)0xde56, (q15_t)0x7b7c, (q15_t)0xde50, (q15_t)0x7b7a, (q15_t)0xde4a, (q15_t)0x7b79, (q15_t)0xde44,
+  (q15_t)0x7b77, (q15_t)0xde3e, (q15_t)0x7b76, (q15_t)0xde38, (q15_t)0x7b74, (q15_t)0xde32, (q15_t)0x7b72, (q15_t)0xde2c,
+  (q15_t)0x7b71, (q15_t)0xde26, (q15_t)0x7b6f, (q15_t)0xde1f, (q15_t)0x7b6d, (q15_t)0xde19, (q15_t)0x7b6c, (q15_t)0xde13,
+  (q15_t)0x7b6a, (q15_t)0xde0d, (q15_t)0x7b68, (q15_t)0xde07, (q15_t)0x7b67, (q15_t)0xde01, (q15_t)0x7b65, (q15_t)0xddfb,
+  (q15_t)0x7b63, (q15_t)0xddf5, (q15_t)0x7b62, (q15_t)0xddef, (q15_t)0x7b60, (q15_t)0xdde9, (q15_t)0x7b5e, (q15_t)0xdde3,
+  (q15_t)0x7b5d, (q15_t)0xdddd, (q15_t)0x7b5b, (q15_t)0xddd7, (q15_t)0x7b59, (q15_t)0xddd1, (q15_t)0x7b57, (q15_t)0xddcb,
+  (q15_t)0x7b56, (q15_t)0xddc5, (q15_t)0x7b54, (q15_t)0xddbf, (q15_t)0x7b52, (q15_t)0xddb9, (q15_t)0x7b51, (q15_t)0xddb2,
+  (q15_t)0x7b4f, (q15_t)0xddac, (q15_t)0x7b4d, (q15_t)0xdda6, (q15_t)0x7b4c, (q15_t)0xdda0, (q15_t)0x7b4a, (q15_t)0xdd9a,
+  (q15_t)0x7b48, (q15_t)0xdd94, (q15_t)0x7b47, (q15_t)0xdd8e, (q15_t)0x7b45, (q15_t)0xdd88, (q15_t)0x7b43, (q15_t)0xdd82,
+  (q15_t)0x7b42, (q15_t)0xdd7c, (q15_t)0x7b40, (q15_t)0xdd76, (q15_t)0x7b3e, (q15_t)0xdd70, (q15_t)0x7b3c, (q15_t)0xdd6a,
+  (q15_t)0x7b3b, (q15_t)0xdd64, (q15_t)0x7b39, (q15_t)0xdd5e, (q15_t)0x7b37, (q15_t)0xdd58, (q15_t)0x7b36, (q15_t)0xdd52,
+  (q15_t)0x7b34, (q15_t)0xdd4c, (q15_t)0x7b32, (q15_t)0xdd46, (q15_t)0x7b31, (q15_t)0xdd40, (q15_t)0x7b2f, (q15_t)0xdd39,
+  (q15_t)0x7b2d, (q15_t)0xdd33, (q15_t)0x7b2b, (q15_t)0xdd2d, (q15_t)0x7b2a, (q15_t)0xdd27, (q15_t)0x7b28, (q15_t)0xdd21,
+  (q15_t)0x7b26, (q15_t)0xdd1b, (q15_t)0x7b25, (q15_t)0xdd15, (q15_t)0x7b23, (q15_t)0xdd0f, (q15_t)0x7b21, (q15_t)0xdd09,
+  (q15_t)0x7b1f, (q15_t)0xdd03, (q15_t)0x7b1e, (q15_t)0xdcfd, (q15_t)0x7b1c, (q15_t)0xdcf7, (q15_t)0x7b1a, (q15_t)0xdcf1,
+  (q15_t)0x7b19, (q15_t)0xdceb, (q15_t)0x7b17, (q15_t)0xdce5, (q15_t)0x7b15, (q15_t)0xdcdf, (q15_t)0x7b13, (q15_t)0xdcd9,
+  (q15_t)0x7b12, (q15_t)0xdcd3, (q15_t)0x7b10, (q15_t)0xdccd, (q15_t)0x7b0e, (q15_t)0xdcc7, (q15_t)0x7b0c, (q15_t)0xdcc1,
+  (q15_t)0x7b0b, (q15_t)0xdcbb, (q15_t)0x7b09, (q15_t)0xdcb5, (q15_t)0x7b07, (q15_t)0xdcae, (q15_t)0x7b06, (q15_t)0xdca8,
+  (q15_t)0x7b04, (q15_t)0xdca2, (q15_t)0x7b02, (q15_t)0xdc9c, (q15_t)0x7b00, (q15_t)0xdc96, (q15_t)0x7aff, (q15_t)0xdc90,
+  (q15_t)0x7afd, (q15_t)0xdc8a, (q15_t)0x7afb, (q15_t)0xdc84, (q15_t)0x7af9, (q15_t)0xdc7e, (q15_t)0x7af8, (q15_t)0xdc78,
+  (q15_t)0x7af6, (q15_t)0xdc72, (q15_t)0x7af4, (q15_t)0xdc6c, (q15_t)0x7af2, (q15_t)0xdc66, (q15_t)0x7af1, (q15_t)0xdc60,
+  (q15_t)0x7aef, (q15_t)0xdc5a, (q15_t)0x7aed, (q15_t)0xdc54, (q15_t)0x7aeb, (q15_t)0xdc4e, (q15_t)0x7aea, (q15_t)0xdc48,
+  (q15_t)0x7ae8, (q15_t)0xdc42, (q15_t)0x7ae6, (q15_t)0xdc3c, (q15_t)0x7ae4, (q15_t)0xdc36, (q15_t)0x7ae3, (q15_t)0xdc30,
+  (q15_t)0x7ae1, (q15_t)0xdc2a, (q15_t)0x7adf, (q15_t)0xdc24, (q15_t)0x7add, (q15_t)0xdc1e, (q15_t)0x7adc, (q15_t)0xdc18,
+  (q15_t)0x7ada, (q15_t)0xdc12, (q15_t)0x7ad8, (q15_t)0xdc0c, (q15_t)0x7ad6, (q15_t)0xdc06, (q15_t)0x7ad5, (q15_t)0xdbff,
+  (q15_t)0x7ad3, (q15_t)0xdbf9, (q15_t)0x7ad1, (q15_t)0xdbf3, (q15_t)0x7acf, (q15_t)0xdbed, (q15_t)0x7acd, (q15_t)0xdbe7,
+  (q15_t)0x7acc, (q15_t)0xdbe1, (q15_t)0x7aca, (q15_t)0xdbdb, (q15_t)0x7ac8, (q15_t)0xdbd5, (q15_t)0x7ac6, (q15_t)0xdbcf,
+  (q15_t)0x7ac5, (q15_t)0xdbc9, (q15_t)0x7ac3, (q15_t)0xdbc3, (q15_t)0x7ac1, (q15_t)0xdbbd, (q15_t)0x7abf, (q15_t)0xdbb7,
+  (q15_t)0x7abd, (q15_t)0xdbb1, (q15_t)0x7abc, (q15_t)0xdbab, (q15_t)0x7aba, (q15_t)0xdba5, (q15_t)0x7ab8, (q15_t)0xdb9f,
+  (q15_t)0x7ab6, (q15_t)0xdb99, (q15_t)0x7ab5, (q15_t)0xdb93, (q15_t)0x7ab3, (q15_t)0xdb8d, (q15_t)0x7ab1, (q15_t)0xdb87,
+  (q15_t)0x7aaf, (q15_t)0xdb81, (q15_t)0x7aad, (q15_t)0xdb7b, (q15_t)0x7aac, (q15_t)0xdb75, (q15_t)0x7aaa, (q15_t)0xdb6f,
+  (q15_t)0x7aa8, (q15_t)0xdb69, (q15_t)0x7aa6, (q15_t)0xdb63, (q15_t)0x7aa4, (q15_t)0xdb5d, (q15_t)0x7aa3, (q15_t)0xdb57,
+  (q15_t)0x7aa1, (q15_t)0xdb51, (q15_t)0x7a9f, (q15_t)0xdb4b, (q15_t)0x7a9d, (q15_t)0xdb45, (q15_t)0x7a9b, (q15_t)0xdb3f,
+  (q15_t)0x7a9a, (q15_t)0xdb39, (q15_t)0x7a98, (q15_t)0xdb33, (q15_t)0x7a96, (q15_t)0xdb2d, (q15_t)0x7a94, (q15_t)0xdb27,
+  (q15_t)0x7a92, (q15_t)0xdb21, (q15_t)0x7a91, (q15_t)0xdb1b, (q15_t)0x7a8f, (q15_t)0xdb15, (q15_t)0x7a8d, (q15_t)0xdb0f,
+  (q15_t)0x7a8b, (q15_t)0xdb09, (q15_t)0x7a89, (q15_t)0xdb03, (q15_t)0x7a87, (q15_t)0xdafd, (q15_t)0x7a86, (q15_t)0xdaf7,
+  (q15_t)0x7a84, (q15_t)0xdaf1, (q15_t)0x7a82, (q15_t)0xdaea, (q15_t)0x7a80, (q15_t)0xdae4, (q15_t)0x7a7e, (q15_t)0xdade,
+  (q15_t)0x7a7d, (q15_t)0xdad8, (q15_t)0x7a7b, (q15_t)0xdad2, (q15_t)0x7a79, (q15_t)0xdacc, (q15_t)0x7a77, (q15_t)0xdac6,
+  (q15_t)0x7a75, (q15_t)0xdac0, (q15_t)0x7a73, (q15_t)0xdaba, (q15_t)0x7a72, (q15_t)0xdab4, (q15_t)0x7a70, (q15_t)0xdaae,
+  (q15_t)0x7a6e, (q15_t)0xdaa8, (q15_t)0x7a6c, (q15_t)0xdaa2, (q15_t)0x7a6a, (q15_t)0xda9c, (q15_t)0x7a68, (q15_t)0xda96,
+  (q15_t)0x7a67, (q15_t)0xda90, (q15_t)0x7a65, (q15_t)0xda8a, (q15_t)0x7a63, (q15_t)0xda84, (q15_t)0x7a61, (q15_t)0xda7e,
+  (q15_t)0x7a5f, (q15_t)0xda78, (q15_t)0x7a5d, (q15_t)0xda72, (q15_t)0x7a5c, (q15_t)0xda6c, (q15_t)0x7a5a, (q15_t)0xda66,
+  (q15_t)0x7a58, (q15_t)0xda60, (q15_t)0x7a56, (q15_t)0xda5a, (q15_t)0x7a54, (q15_t)0xda54, (q15_t)0x7a52, (q15_t)0xda4e,
+  (q15_t)0x7a50, (q15_t)0xda48, (q15_t)0x7a4f, (q15_t)0xda42, (q15_t)0x7a4d, (q15_t)0xda3c, (q15_t)0x7a4b, (q15_t)0xda36,
+  (q15_t)0x7a49, (q15_t)0xda30, (q15_t)0x7a47, (q15_t)0xda2a, (q15_t)0x7a45, (q15_t)0xda24, (q15_t)0x7a43, (q15_t)0xda1e,
+  (q15_t)0x7a42, (q15_t)0xda18, (q15_t)0x7a40, (q15_t)0xda12, (q15_t)0x7a3e, (q15_t)0xda0c, (q15_t)0x7a3c, (q15_t)0xda06,
+  (q15_t)0x7a3a, (q15_t)0xda00, (q15_t)0x7a38, (q15_t)0xd9fa, (q15_t)0x7a36, (q15_t)0xd9f4, (q15_t)0x7a35, (q15_t)0xd9ee,
+  (q15_t)0x7a33, (q15_t)0xd9e8, (q15_t)0x7a31, (q15_t)0xd9e2, (q15_t)0x7a2f, (q15_t)0xd9dc, (q15_t)0x7a2d, (q15_t)0xd9d6,
+  (q15_t)0x7a2b, (q15_t)0xd9d0, (q15_t)0x7a29, (q15_t)0xd9ca, (q15_t)0x7a27, (q15_t)0xd9c4, (q15_t)0x7a26, (q15_t)0xd9be,
+  (q15_t)0x7a24, (q15_t)0xd9b8, (q15_t)0x7a22, (q15_t)0xd9b2, (q15_t)0x7a20, (q15_t)0xd9ac, (q15_t)0x7a1e, (q15_t)0xd9a6,
+  (q15_t)0x7a1c, (q15_t)0xd9a0, (q15_t)0x7a1a, (q15_t)0xd99a, (q15_t)0x7a18, (q15_t)0xd994, (q15_t)0x7a16, (q15_t)0xd98e,
+  (q15_t)0x7a15, (q15_t)0xd988, (q15_t)0x7a13, (q15_t)0xd982, (q15_t)0x7a11, (q15_t)0xd97c, (q15_t)0x7a0f, (q15_t)0xd976,
+  (q15_t)0x7a0d, (q15_t)0xd970, (q15_t)0x7a0b, (q15_t)0xd96a, (q15_t)0x7a09, (q15_t)0xd964, (q15_t)0x7a07, (q15_t)0xd95e,
+  (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x7a04, (q15_t)0xd952, (q15_t)0x7a02, (q15_t)0xd94c, (q15_t)0x7a00, (q15_t)0xd946,
+  (q15_t)0x79fe, (q15_t)0xd940, (q15_t)0x79fc, (q15_t)0xd93a, (q15_t)0x79fa, (q15_t)0xd934, (q15_t)0x79f8, (q15_t)0xd92e,
+  (q15_t)0x79f6, (q15_t)0xd928, (q15_t)0x79f4, (q15_t)0xd922, (q15_t)0x79f2, (q15_t)0xd91c, (q15_t)0x79f0, (q15_t)0xd917,
+  (q15_t)0x79ef, (q15_t)0xd911, (q15_t)0x79ed, (q15_t)0xd90b, (q15_t)0x79eb, (q15_t)0xd905, (q15_t)0x79e9, (q15_t)0xd8ff,
+  (q15_t)0x79e7, (q15_t)0xd8f9, (q15_t)0x79e5, (q15_t)0xd8f3, (q15_t)0x79e3, (q15_t)0xd8ed, (q15_t)0x79e1, (q15_t)0xd8e7,
+  (q15_t)0x79df, (q15_t)0xd8e1, (q15_t)0x79dd, (q15_t)0xd8db, (q15_t)0x79db, (q15_t)0xd8d5, (q15_t)0x79d9, (q15_t)0xd8cf,
+  (q15_t)0x79d8, (q15_t)0xd8c9, (q15_t)0x79d6, (q15_t)0xd8c3, (q15_t)0x79d4, (q15_t)0xd8bd, (q15_t)0x79d2, (q15_t)0xd8b7,
+  (q15_t)0x79d0, (q15_t)0xd8b1, (q15_t)0x79ce, (q15_t)0xd8ab, (q15_t)0x79cc, (q15_t)0xd8a5, (q15_t)0x79ca, (q15_t)0xd89f,
+  (q15_t)0x79c8, (q15_t)0xd899, (q15_t)0x79c6, (q15_t)0xd893, (q15_t)0x79c4, (q15_t)0xd88d, (q15_t)0x79c2, (q15_t)0xd887,
+  (q15_t)0x79c0, (q15_t)0xd881, (q15_t)0x79be, (q15_t)0xd87b, (q15_t)0x79bc, (q15_t)0xd875, (q15_t)0x79bb, (q15_t)0xd86f,
+  (q15_t)0x79b9, (q15_t)0xd869, (q15_t)0x79b7, (q15_t)0xd863, (q15_t)0x79b5, (q15_t)0xd85d, (q15_t)0x79b3, (q15_t)0xd857,
+  (q15_t)0x79b1, (q15_t)0xd851, (q15_t)0x79af, (q15_t)0xd84b, (q15_t)0x79ad, (q15_t)0xd845, (q15_t)0x79ab, (q15_t)0xd83f,
+  (q15_t)0x79a9, (q15_t)0xd839, (q15_t)0x79a7, (q15_t)0xd833, (q15_t)0x79a5, (q15_t)0xd82d, (q15_t)0x79a3, (q15_t)0xd827,
+  (q15_t)0x79a1, (q15_t)0xd821, (q15_t)0x799f, (q15_t)0xd81b, (q15_t)0x799d, (q15_t)0xd815, (q15_t)0x799b, (q15_t)0xd80f,
+  (q15_t)0x7999, (q15_t)0xd80a, (q15_t)0x7997, (q15_t)0xd804, (q15_t)0x7995, (q15_t)0xd7fe, (q15_t)0x7993, (q15_t)0xd7f8,
+  (q15_t)0x7992, (q15_t)0xd7f2, (q15_t)0x7990, (q15_t)0xd7ec, (q15_t)0x798e, (q15_t)0xd7e6, (q15_t)0x798c, (q15_t)0xd7e0,
+  (q15_t)0x798a, (q15_t)0xd7da, (q15_t)0x7988, (q15_t)0xd7d4, (q15_t)0x7986, (q15_t)0xd7ce, (q15_t)0x7984, (q15_t)0xd7c8,
+  (q15_t)0x7982, (q15_t)0xd7c2, (q15_t)0x7980, (q15_t)0xd7bc, (q15_t)0x797e, (q15_t)0xd7b6, (q15_t)0x797c, (q15_t)0xd7b0,
+  (q15_t)0x797a, (q15_t)0xd7aa, (q15_t)0x7978, (q15_t)0xd7a4, (q15_t)0x7976, (q15_t)0xd79e, (q15_t)0x7974, (q15_t)0xd798,
+  (q15_t)0x7972, (q15_t)0xd792, (q15_t)0x7970, (q15_t)0xd78c, (q15_t)0x796e, (q15_t)0xd786, (q15_t)0x796c, (q15_t)0xd780,
+  (q15_t)0x796a, (q15_t)0xd77a, (q15_t)0x7968, (q15_t)0xd774, (q15_t)0x7966, (q15_t)0xd76e, (q15_t)0x7964, (q15_t)0xd768,
+  (q15_t)0x7962, (q15_t)0xd763, (q15_t)0x7960, (q15_t)0xd75d, (q15_t)0x795e, (q15_t)0xd757, (q15_t)0x795c, (q15_t)0xd751,
+  (q15_t)0x795a, (q15_t)0xd74b, (q15_t)0x7958, (q15_t)0xd745, (q15_t)0x7956, (q15_t)0xd73f, (q15_t)0x7954, (q15_t)0xd739,
+  (q15_t)0x7952, (q15_t)0xd733, (q15_t)0x7950, (q15_t)0xd72d, (q15_t)0x794e, (q15_t)0xd727, (q15_t)0x794c, (q15_t)0xd721,
+  (q15_t)0x794a, (q15_t)0xd71b, (q15_t)0x7948, (q15_t)0xd715, (q15_t)0x7946, (q15_t)0xd70f, (q15_t)0x7944, (q15_t)0xd709,
+  (q15_t)0x7942, (q15_t)0xd703, (q15_t)0x7940, (q15_t)0xd6fd, (q15_t)0x793e, (q15_t)0xd6f7, (q15_t)0x793c, (q15_t)0xd6f1,
+  (q15_t)0x793a, (q15_t)0xd6eb, (q15_t)0x7938, (q15_t)0xd6e5, (q15_t)0x7936, (q15_t)0xd6e0, (q15_t)0x7934, (q15_t)0xd6da,
+  (q15_t)0x7932, (q15_t)0xd6d4, (q15_t)0x7930, (q15_t)0xd6ce, (q15_t)0x792e, (q15_t)0xd6c8, (q15_t)0x792c, (q15_t)0xd6c2,
+  (q15_t)0x792a, (q15_t)0xd6bc, (q15_t)0x7928, (q15_t)0xd6b6, (q15_t)0x7926, (q15_t)0xd6b0, (q15_t)0x7924, (q15_t)0xd6aa,
+  (q15_t)0x7922, (q15_t)0xd6a4, (q15_t)0x7920, (q15_t)0xd69e, (q15_t)0x791e, (q15_t)0xd698, (q15_t)0x791c, (q15_t)0xd692,
+  (q15_t)0x7919, (q15_t)0xd68c, (q15_t)0x7917, (q15_t)0xd686, (q15_t)0x7915, (q15_t)0xd680, (q15_t)0x7913, (q15_t)0xd67a,
+  (q15_t)0x7911, (q15_t)0xd675, (q15_t)0x790f, (q15_t)0xd66f, (q15_t)0x790d, (q15_t)0xd669, (q15_t)0x790b, (q15_t)0xd663,
+  (q15_t)0x7909, (q15_t)0xd65d, (q15_t)0x7907, (q15_t)0xd657, (q15_t)0x7905, (q15_t)0xd651, (q15_t)0x7903, (q15_t)0xd64b,
+  (q15_t)0x7901, (q15_t)0xd645, (q15_t)0x78ff, (q15_t)0xd63f, (q15_t)0x78fd, (q15_t)0xd639, (q15_t)0x78fb, (q15_t)0xd633,
+  (q15_t)0x78f9, (q15_t)0xd62d, (q15_t)0x78f7, (q15_t)0xd627, (q15_t)0x78f5, (q15_t)0xd621, (q15_t)0x78f3, (q15_t)0xd61b,
+  (q15_t)0x78f1, (q15_t)0xd615, (q15_t)0x78ee, (q15_t)0xd610, (q15_t)0x78ec, (q15_t)0xd60a, (q15_t)0x78ea, (q15_t)0xd604,
+  (q15_t)0x78e8, (q15_t)0xd5fe, (q15_t)0x78e6, (q15_t)0xd5f8, (q15_t)0x78e4, (q15_t)0xd5f2, (q15_t)0x78e2, (q15_t)0xd5ec,
+  (q15_t)0x78e0, (q15_t)0xd5e6, (q15_t)0x78de, (q15_t)0xd5e0, (q15_t)0x78dc, (q15_t)0xd5da, (q15_t)0x78da, (q15_t)0xd5d4,
+  (q15_t)0x78d8, (q15_t)0xd5ce, (q15_t)0x78d6, (q15_t)0xd5c8, (q15_t)0x78d4, (q15_t)0xd5c2, (q15_t)0x78d2, (q15_t)0xd5bc,
+  (q15_t)0x78cf, (q15_t)0xd5b7, (q15_t)0x78cd, (q15_t)0xd5b1, (q15_t)0x78cb, (q15_t)0xd5ab, (q15_t)0x78c9, (q15_t)0xd5a5,
+  (q15_t)0x78c7, (q15_t)0xd59f, (q15_t)0x78c5, (q15_t)0xd599, (q15_t)0x78c3, (q15_t)0xd593, (q15_t)0x78c1, (q15_t)0xd58d,
+  (q15_t)0x78bf, (q15_t)0xd587, (q15_t)0x78bd, (q15_t)0xd581, (q15_t)0x78bb, (q15_t)0xd57b, (q15_t)0x78b9, (q15_t)0xd575,
+  (q15_t)0x78b6, (q15_t)0xd56f, (q15_t)0x78b4, (q15_t)0xd569, (q15_t)0x78b2, (q15_t)0xd564, (q15_t)0x78b0, (q15_t)0xd55e,
+  (q15_t)0x78ae, (q15_t)0xd558, (q15_t)0x78ac, (q15_t)0xd552, (q15_t)0x78aa, (q15_t)0xd54c, (q15_t)0x78a8, (q15_t)0xd546,
+  (q15_t)0x78a6, (q15_t)0xd540, (q15_t)0x78a4, (q15_t)0xd53a, (q15_t)0x78a2, (q15_t)0xd534, (q15_t)0x789f, (q15_t)0xd52e,
+  (q15_t)0x789d, (q15_t)0xd528, (q15_t)0x789b, (q15_t)0xd522, (q15_t)0x7899, (q15_t)0xd51c, (q15_t)0x7897, (q15_t)0xd517,
+  (q15_t)0x7895, (q15_t)0xd511, (q15_t)0x7893, (q15_t)0xd50b, (q15_t)0x7891, (q15_t)0xd505, (q15_t)0x788f, (q15_t)0xd4ff,
+  (q15_t)0x788c, (q15_t)0xd4f9, (q15_t)0x788a, (q15_t)0xd4f3, (q15_t)0x7888, (q15_t)0xd4ed, (q15_t)0x7886, (q15_t)0xd4e7,
+  (q15_t)0x7884, (q15_t)0xd4e1, (q15_t)0x7882, (q15_t)0xd4db, (q15_t)0x7880, (q15_t)0xd4d5, (q15_t)0x787e, (q15_t)0xd4d0,
+  (q15_t)0x787c, (q15_t)0xd4ca, (q15_t)0x7879, (q15_t)0xd4c4, (q15_t)0x7877, (q15_t)0xd4be, (q15_t)0x7875, (q15_t)0xd4b8,
+  (q15_t)0x7873, (q15_t)0xd4b2, (q15_t)0x7871, (q15_t)0xd4ac, (q15_t)0x786f, (q15_t)0xd4a6, (q15_t)0x786d, (q15_t)0xd4a0,
+  (q15_t)0x786b, (q15_t)0xd49a, (q15_t)0x7868, (q15_t)0xd494, (q15_t)0x7866, (q15_t)0xd48f, (q15_t)0x7864, (q15_t)0xd489,
+  (q15_t)0x7862, (q15_t)0xd483, (q15_t)0x7860, (q15_t)0xd47d, (q15_t)0x785e, (q15_t)0xd477, (q15_t)0x785c, (q15_t)0xd471,
+  (q15_t)0x7859, (q15_t)0xd46b, (q15_t)0x7857, (q15_t)0xd465, (q15_t)0x7855, (q15_t)0xd45f, (q15_t)0x7853, (q15_t)0xd459,
+  (q15_t)0x7851, (q15_t)0xd453, (q15_t)0x784f, (q15_t)0xd44e, (q15_t)0x784d, (q15_t)0xd448, (q15_t)0x784a, (q15_t)0xd442,
+  (q15_t)0x7848, (q15_t)0xd43c, (q15_t)0x7846, (q15_t)0xd436, (q15_t)0x7844, (q15_t)0xd430, (q15_t)0x7842, (q15_t)0xd42a,
+  (q15_t)0x7840, (q15_t)0xd424, (q15_t)0x783e, (q15_t)0xd41e, (q15_t)0x783b, (q15_t)0xd418, (q15_t)0x7839, (q15_t)0xd412,
+  (q15_t)0x7837, (q15_t)0xd40d, (q15_t)0x7835, (q15_t)0xd407, (q15_t)0x7833, (q15_t)0xd401, (q15_t)0x7831, (q15_t)0xd3fb,
+  (q15_t)0x782e, (q15_t)0xd3f5, (q15_t)0x782c, (q15_t)0xd3ef, (q15_t)0x782a, (q15_t)0xd3e9, (q15_t)0x7828, (q15_t)0xd3e3,
+  (q15_t)0x7826, (q15_t)0xd3dd, (q15_t)0x7824, (q15_t)0xd3d7, (q15_t)0x7821, (q15_t)0xd3d2, (q15_t)0x781f, (q15_t)0xd3cc,
+  (q15_t)0x781d, (q15_t)0xd3c6, (q15_t)0x781b, (q15_t)0xd3c0, (q15_t)0x7819, (q15_t)0xd3ba, (q15_t)0x7817, (q15_t)0xd3b4,
+  (q15_t)0x7814, (q15_t)0xd3ae, (q15_t)0x7812, (q15_t)0xd3a8, (q15_t)0x7810, (q15_t)0xd3a2, (q15_t)0x780e, (q15_t)0xd39d,
+  (q15_t)0x780c, (q15_t)0xd397, (q15_t)0x780a, (q15_t)0xd391, (q15_t)0x7807, (q15_t)0xd38b, (q15_t)0x7805, (q15_t)0xd385,
+  (q15_t)0x7803, (q15_t)0xd37f, (q15_t)0x7801, (q15_t)0xd379, (q15_t)0x77ff, (q15_t)0xd373, (q15_t)0x77fc, (q15_t)0xd36d,
+  (q15_t)0x77fa, (q15_t)0xd368, (q15_t)0x77f8, (q15_t)0xd362, (q15_t)0x77f6, (q15_t)0xd35c, (q15_t)0x77f4, (q15_t)0xd356,
+  (q15_t)0x77f1, (q15_t)0xd350, (q15_t)0x77ef, (q15_t)0xd34a, (q15_t)0x77ed, (q15_t)0xd344, (q15_t)0x77eb, (q15_t)0xd33e,
+  (q15_t)0x77e9, (q15_t)0xd338, (q15_t)0x77e6, (q15_t)0xd333, (q15_t)0x77e4, (q15_t)0xd32d, (q15_t)0x77e2, (q15_t)0xd327,
+  (q15_t)0x77e0, (q15_t)0xd321, (q15_t)0x77de, (q15_t)0xd31b, (q15_t)0x77db, (q15_t)0xd315, (q15_t)0x77d9, (q15_t)0xd30f,
+  (q15_t)0x77d7, (q15_t)0xd309, (q15_t)0x77d5, (q15_t)0xd303, (q15_t)0x77d3, (q15_t)0xd2fe, (q15_t)0x77d0, (q15_t)0xd2f8,
+  (q15_t)0x77ce, (q15_t)0xd2f2, (q15_t)0x77cc, (q15_t)0xd2ec, (q15_t)0x77ca, (q15_t)0xd2e6, (q15_t)0x77c8, (q15_t)0xd2e0,
+  (q15_t)0x77c5, (q15_t)0xd2da, (q15_t)0x77c3, (q15_t)0xd2d4, (q15_t)0x77c1, (q15_t)0xd2cf, (q15_t)0x77bf, (q15_t)0xd2c9,
+  (q15_t)0x77bc, (q15_t)0xd2c3, (q15_t)0x77ba, (q15_t)0xd2bd, (q15_t)0x77b8, (q15_t)0xd2b7, (q15_t)0x77b6, (q15_t)0xd2b1,
+  (q15_t)0x77b4, (q15_t)0xd2ab, (q15_t)0x77b1, (q15_t)0xd2a5, (q15_t)0x77af, (q15_t)0xd2a0, (q15_t)0x77ad, (q15_t)0xd29a,
+  (q15_t)0x77ab, (q15_t)0xd294, (q15_t)0x77a8, (q15_t)0xd28e, (q15_t)0x77a6, (q15_t)0xd288, (q15_t)0x77a4, (q15_t)0xd282,
+  (q15_t)0x77a2, (q15_t)0xd27c, (q15_t)0x77a0, (q15_t)0xd276, (q15_t)0x779d, (q15_t)0xd271, (q15_t)0x779b, (q15_t)0xd26b,
+  (q15_t)0x7799, (q15_t)0xd265, (q15_t)0x7797, (q15_t)0xd25f, (q15_t)0x7794, (q15_t)0xd259, (q15_t)0x7792, (q15_t)0xd253,
+  (q15_t)0x7790, (q15_t)0xd24d, (q15_t)0x778e, (q15_t)0xd247, (q15_t)0x778b, (q15_t)0xd242, (q15_t)0x7789, (q15_t)0xd23c,
+  (q15_t)0x7787, (q15_t)0xd236, (q15_t)0x7785, (q15_t)0xd230, (q15_t)0x7782, (q15_t)0xd22a, (q15_t)0x7780, (q15_t)0xd224,
+  (q15_t)0x777e, (q15_t)0xd21e, (q15_t)0x777c, (q15_t)0xd219, (q15_t)0x7779, (q15_t)0xd213, (q15_t)0x7777, (q15_t)0xd20d,
+  (q15_t)0x7775, (q15_t)0xd207, (q15_t)0x7773, (q15_t)0xd201, (q15_t)0x7770, (q15_t)0xd1fb, (q15_t)0x776e, (q15_t)0xd1f5,
+  (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x776a, (q15_t)0xd1ea, (q15_t)0x7767, (q15_t)0xd1e4, (q15_t)0x7765, (q15_t)0xd1de,
+  (q15_t)0x7763, (q15_t)0xd1d8, (q15_t)0x7760, (q15_t)0xd1d2, (q15_t)0x775e, (q15_t)0xd1cc, (q15_t)0x775c, (q15_t)0xd1c6,
+  (q15_t)0x775a, (q15_t)0xd1c1, (q15_t)0x7757, (q15_t)0xd1bb, (q15_t)0x7755, (q15_t)0xd1b5, (q15_t)0x7753, (q15_t)0xd1af,
+  (q15_t)0x7751, (q15_t)0xd1a9, (q15_t)0x774e, (q15_t)0xd1a3, (q15_t)0x774c, (q15_t)0xd19d, (q15_t)0x774a, (q15_t)0xd198,
+  (q15_t)0x7747, (q15_t)0xd192, (q15_t)0x7745, (q15_t)0xd18c, (q15_t)0x7743, (q15_t)0xd186, (q15_t)0x7741, (q15_t)0xd180,
+  (q15_t)0x773e, (q15_t)0xd17a, (q15_t)0x773c, (q15_t)0xd174, (q15_t)0x773a, (q15_t)0xd16f, (q15_t)0x7738, (q15_t)0xd169,
+  (q15_t)0x7735, (q15_t)0xd163, (q15_t)0x7733, (q15_t)0xd15d, (q15_t)0x7731, (q15_t)0xd157, (q15_t)0x772e, (q15_t)0xd151,
+  (q15_t)0x772c, (q15_t)0xd14b, (q15_t)0x772a, (q15_t)0xd146, (q15_t)0x7727, (q15_t)0xd140, (q15_t)0x7725, (q15_t)0xd13a,
+  (q15_t)0x7723, (q15_t)0xd134, (q15_t)0x7721, (q15_t)0xd12e, (q15_t)0x771e, (q15_t)0xd128, (q15_t)0x771c, (q15_t)0xd123,
+  (q15_t)0x771a, (q15_t)0xd11d, (q15_t)0x7717, (q15_t)0xd117, (q15_t)0x7715, (q15_t)0xd111, (q15_t)0x7713, (q15_t)0xd10b,
+  (q15_t)0x7710, (q15_t)0xd105, (q15_t)0x770e, (q15_t)0xd0ff, (q15_t)0x770c, (q15_t)0xd0fa, (q15_t)0x770a, (q15_t)0xd0f4,
+  (q15_t)0x7707, (q15_t)0xd0ee, (q15_t)0x7705, (q15_t)0xd0e8, (q15_t)0x7703, (q15_t)0xd0e2, (q15_t)0x7700, (q15_t)0xd0dc,
+  (q15_t)0x76fe, (q15_t)0xd0d7, (q15_t)0x76fc, (q15_t)0xd0d1, (q15_t)0x76f9, (q15_t)0xd0cb, (q15_t)0x76f7, (q15_t)0xd0c5,
+  (q15_t)0x76f5, (q15_t)0xd0bf, (q15_t)0x76f2, (q15_t)0xd0b9, (q15_t)0x76f0, (q15_t)0xd0b4, (q15_t)0x76ee, (q15_t)0xd0ae,
+  (q15_t)0x76eb, (q15_t)0xd0a8, (q15_t)0x76e9, (q15_t)0xd0a2, (q15_t)0x76e7, (q15_t)0xd09c, (q15_t)0x76e4, (q15_t)0xd096,
+  (q15_t)0x76e2, (q15_t)0xd091, (q15_t)0x76e0, (q15_t)0xd08b, (q15_t)0x76dd, (q15_t)0xd085, (q15_t)0x76db, (q15_t)0xd07f,
+  (q15_t)0x76d9, (q15_t)0xd079, (q15_t)0x76d6, (q15_t)0xd073, (q15_t)0x76d4, (q15_t)0xd06e, (q15_t)0x76d2, (q15_t)0xd068,
+  (q15_t)0x76cf, (q15_t)0xd062, (q15_t)0x76cd, (q15_t)0xd05c, (q15_t)0x76cb, (q15_t)0xd056, (q15_t)0x76c8, (q15_t)0xd050,
+  (q15_t)0x76c6, (q15_t)0xd04b, (q15_t)0x76c4, (q15_t)0xd045, (q15_t)0x76c1, (q15_t)0xd03f, (q15_t)0x76bf, (q15_t)0xd039,
+  (q15_t)0x76bd, (q15_t)0xd033, (q15_t)0x76ba, (q15_t)0xd02d, (q15_t)0x76b8, (q15_t)0xd028, (q15_t)0x76b6, (q15_t)0xd022,
+  (q15_t)0x76b3, (q15_t)0xd01c, (q15_t)0x76b1, (q15_t)0xd016, (q15_t)0x76af, (q15_t)0xd010, (q15_t)0x76ac, (q15_t)0xd00a,
+  (q15_t)0x76aa, (q15_t)0xd005, (q15_t)0x76a8, (q15_t)0xcfff, (q15_t)0x76a5, (q15_t)0xcff9, (q15_t)0x76a3, (q15_t)0xcff3,
+  (q15_t)0x76a0, (q15_t)0xcfed, (q15_t)0x769e, (q15_t)0xcfe7, (q15_t)0x769c, (q15_t)0xcfe2, (q15_t)0x7699, (q15_t)0xcfdc,
+  (q15_t)0x7697, (q15_t)0xcfd6, (q15_t)0x7695, (q15_t)0xcfd0, (q15_t)0x7692, (q15_t)0xcfca, (q15_t)0x7690, (q15_t)0xcfc5,
+  (q15_t)0x768e, (q15_t)0xcfbf, (q15_t)0x768b, (q15_t)0xcfb9, (q15_t)0x7689, (q15_t)0xcfb3, (q15_t)0x7686, (q15_t)0xcfad,
+  (q15_t)0x7684, (q15_t)0xcfa7, (q15_t)0x7682, (q15_t)0xcfa2, (q15_t)0x767f, (q15_t)0xcf9c, (q15_t)0x767d, (q15_t)0xcf96,
+  (q15_t)0x767b, (q15_t)0xcf90, (q15_t)0x7678, (q15_t)0xcf8a, (q15_t)0x7676, (q15_t)0xcf85, (q15_t)0x7673, (q15_t)0xcf7f,
+  (q15_t)0x7671, (q15_t)0xcf79, (q15_t)0x766f, (q15_t)0xcf73, (q15_t)0x766c, (q15_t)0xcf6d, (q15_t)0x766a, (q15_t)0xcf67,
+  (q15_t)0x7668, (q15_t)0xcf62, (q15_t)0x7665, (q15_t)0xcf5c, (q15_t)0x7663, (q15_t)0xcf56, (q15_t)0x7660, (q15_t)0xcf50,
+  (q15_t)0x765e, (q15_t)0xcf4a, (q15_t)0x765c, (q15_t)0xcf45, (q15_t)0x7659, (q15_t)0xcf3f, (q15_t)0x7657, (q15_t)0xcf39,
+  (q15_t)0x7654, (q15_t)0xcf33, (q15_t)0x7652, (q15_t)0xcf2d, (q15_t)0x7650, (q15_t)0xcf28, (q15_t)0x764d, (q15_t)0xcf22,
+  (q15_t)0x764b, (q15_t)0xcf1c, (q15_t)0x7648, (q15_t)0xcf16, (q15_t)0x7646, (q15_t)0xcf10, (q15_t)0x7644, (q15_t)0xcf0b,
+  (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x763f, (q15_t)0xceff, (q15_t)0x763c, (q15_t)0xcef9, (q15_t)0x763a, (q15_t)0xcef3,
+  (q15_t)0x7638, (q15_t)0xceee, (q15_t)0x7635, (q15_t)0xcee8, (q15_t)0x7633, (q15_t)0xcee2, (q15_t)0x7630, (q15_t)0xcedc,
+  (q15_t)0x762e, (q15_t)0xced6, (q15_t)0x762b, (q15_t)0xced1, (q15_t)0x7629, (q15_t)0xcecb, (q15_t)0x7627, (q15_t)0xcec5,
+  (q15_t)0x7624, (q15_t)0xcebf, (q15_t)0x7622, (q15_t)0xceb9, (q15_t)0x761f, (q15_t)0xceb4, (q15_t)0x761d, (q15_t)0xceae,
+  (q15_t)0x761b, (q15_t)0xcea8, (q15_t)0x7618, (q15_t)0xcea2, (q15_t)0x7616, (q15_t)0xce9c, (q15_t)0x7613, (q15_t)0xce97,
+  (q15_t)0x7611, (q15_t)0xce91, (q15_t)0x760e, (q15_t)0xce8b, (q15_t)0x760c, (q15_t)0xce85, (q15_t)0x760a, (q15_t)0xce7f,
+  (q15_t)0x7607, (q15_t)0xce7a, (q15_t)0x7605, (q15_t)0xce74, (q15_t)0x7602, (q15_t)0xce6e, (q15_t)0x7600, (q15_t)0xce68,
+  (q15_t)0x75fd, (q15_t)0xce62, (q15_t)0x75fb, (q15_t)0xce5d, (q15_t)0x75f9, (q15_t)0xce57, (q15_t)0x75f6, (q15_t)0xce51,
+  (q15_t)0x75f4, (q15_t)0xce4b, (q15_t)0x75f1, (q15_t)0xce45, (q15_t)0x75ef, (q15_t)0xce40, (q15_t)0x75ec, (q15_t)0xce3a,
+  (q15_t)0x75ea, (q15_t)0xce34, (q15_t)0x75e7, (q15_t)0xce2e, (q15_t)0x75e5, (q15_t)0xce28, (q15_t)0x75e3, (q15_t)0xce23,
+  (q15_t)0x75e0, (q15_t)0xce1d, (q15_t)0x75de, (q15_t)0xce17, (q15_t)0x75db, (q15_t)0xce11, (q15_t)0x75d9, (q15_t)0xce0c,
+  (q15_t)0x75d6, (q15_t)0xce06, (q15_t)0x75d4, (q15_t)0xce00, (q15_t)0x75d1, (q15_t)0xcdfa, (q15_t)0x75cf, (q15_t)0xcdf4,
+  (q15_t)0x75cc, (q15_t)0xcdef, (q15_t)0x75ca, (q15_t)0xcde9, (q15_t)0x75c8, (q15_t)0xcde3, (q15_t)0x75c5, (q15_t)0xcddd,
+  (q15_t)0x75c3, (q15_t)0xcdd8, (q15_t)0x75c0, (q15_t)0xcdd2, (q15_t)0x75be, (q15_t)0xcdcc, (q15_t)0x75bb, (q15_t)0xcdc6,
+  (q15_t)0x75b9, (q15_t)0xcdc0, (q15_t)0x75b6, (q15_t)0xcdbb, (q15_t)0x75b4, (q15_t)0xcdb5, (q15_t)0x75b1, (q15_t)0xcdaf,
+  (q15_t)0x75af, (q15_t)0xcda9, (q15_t)0x75ac, (q15_t)0xcda3, (q15_t)0x75aa, (q15_t)0xcd9e, (q15_t)0x75a7, (q15_t)0xcd98,
+  (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x75a3, (q15_t)0xcd8c, (q15_t)0x75a0, (q15_t)0xcd87, (q15_t)0x759e, (q15_t)0xcd81,
+  (q15_t)0x759b, (q15_t)0xcd7b, (q15_t)0x7599, (q15_t)0xcd75, (q15_t)0x7596, (q15_t)0xcd70, (q15_t)0x7594, (q15_t)0xcd6a,
+  (q15_t)0x7591, (q15_t)0xcd64, (q15_t)0x758f, (q15_t)0xcd5e, (q15_t)0x758c, (q15_t)0xcd58, (q15_t)0x758a, (q15_t)0xcd53,
+  (q15_t)0x7587, (q15_t)0xcd4d, (q15_t)0x7585, (q15_t)0xcd47, (q15_t)0x7582, (q15_t)0xcd41, (q15_t)0x7580, (q15_t)0xcd3c,
+  (q15_t)0x757d, (q15_t)0xcd36, (q15_t)0x757b, (q15_t)0xcd30, (q15_t)0x7578, (q15_t)0xcd2a, (q15_t)0x7576, (q15_t)0xcd25,
+  (q15_t)0x7573, (q15_t)0xcd1f, (q15_t)0x7571, (q15_t)0xcd19, (q15_t)0x756e, (q15_t)0xcd13, (q15_t)0x756c, (q15_t)0xcd0d,
+  (q15_t)0x7569, (q15_t)0xcd08, (q15_t)0x7567, (q15_t)0xcd02, (q15_t)0x7564, (q15_t)0xccfc, (q15_t)0x7562, (q15_t)0xccf6,
+  (q15_t)0x755f, (q15_t)0xccf1, (q15_t)0x755d, (q15_t)0xcceb, (q15_t)0x755a, (q15_t)0xcce5, (q15_t)0x7558, (q15_t)0xccdf,
+  (q15_t)0x7555, (q15_t)0xccda, (q15_t)0x7553, (q15_t)0xccd4, (q15_t)0x7550, (q15_t)0xccce, (q15_t)0x754e, (q15_t)0xccc8,
+  (q15_t)0x754b, (q15_t)0xccc3, (q15_t)0x7549, (q15_t)0xccbd, (q15_t)0x7546, (q15_t)0xccb7, (q15_t)0x7544, (q15_t)0xccb1,
+  (q15_t)0x7541, (q15_t)0xccac, (q15_t)0x753f, (q15_t)0xcca6, (q15_t)0x753c, (q15_t)0xcca0, (q15_t)0x753a, (q15_t)0xcc9a,
+  (q15_t)0x7537, (q15_t)0xcc95, (q15_t)0x7535, (q15_t)0xcc8f, (q15_t)0x7532, (q15_t)0xcc89, (q15_t)0x752f, (q15_t)0xcc83,
+  (q15_t)0x752d, (q15_t)0xcc7e, (q15_t)0x752a, (q15_t)0xcc78, (q15_t)0x7528, (q15_t)0xcc72, (q15_t)0x7525, (q15_t)0xcc6c,
+  (q15_t)0x7523, (q15_t)0xcc67, (q15_t)0x7520, (q15_t)0xcc61, (q15_t)0x751e, (q15_t)0xcc5b, (q15_t)0x751b, (q15_t)0xcc55,
+  (q15_t)0x7519, (q15_t)0xcc50, (q15_t)0x7516, (q15_t)0xcc4a, (q15_t)0x7514, (q15_t)0xcc44, (q15_t)0x7511, (q15_t)0xcc3e,
+  (q15_t)0x750f, (q15_t)0xcc39, (q15_t)0x750c, (q15_t)0xcc33, (q15_t)0x7509, (q15_t)0xcc2d, (q15_t)0x7507, (q15_t)0xcc27,
+  (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x7502, (q15_t)0xcc1c, (q15_t)0x74ff, (q15_t)0xcc16, (q15_t)0x74fd, (q15_t)0xcc10,
+  (q15_t)0x74fa, (q15_t)0xcc0b, (q15_t)0x74f8, (q15_t)0xcc05, (q15_t)0x74f5, (q15_t)0xcbff, (q15_t)0x74f2, (q15_t)0xcbf9,
+  (q15_t)0x74f0, (q15_t)0xcbf4, (q15_t)0x74ed, (q15_t)0xcbee, (q15_t)0x74eb, (q15_t)0xcbe8, (q15_t)0x74e8, (q15_t)0xcbe2,
+  (q15_t)0x74e6, (q15_t)0xcbdd, (q15_t)0x74e3, (q15_t)0xcbd7, (q15_t)0x74e1, (q15_t)0xcbd1, (q15_t)0x74de, (q15_t)0xcbcb,
+  (q15_t)0x74db, (q15_t)0xcbc6, (q15_t)0x74d9, (q15_t)0xcbc0, (q15_t)0x74d6, (q15_t)0xcbba, (q15_t)0x74d4, (q15_t)0xcbb5,
+  (q15_t)0x74d1, (q15_t)0xcbaf, (q15_t)0x74cf, (q15_t)0xcba9, (q15_t)0x74cc, (q15_t)0xcba3, (q15_t)0x74c9, (q15_t)0xcb9e,
+  (q15_t)0x74c7, (q15_t)0xcb98, (q15_t)0x74c4, (q15_t)0xcb92, (q15_t)0x74c2, (q15_t)0xcb8c, (q15_t)0x74bf, (q15_t)0xcb87,
+  (q15_t)0x74bd, (q15_t)0xcb81, (q15_t)0x74ba, (q15_t)0xcb7b, (q15_t)0x74b7, (q15_t)0xcb75, (q15_t)0x74b5, (q15_t)0xcb70,
+  (q15_t)0x74b2, (q15_t)0xcb6a, (q15_t)0x74b0, (q15_t)0xcb64, (q15_t)0x74ad, (q15_t)0xcb5f, (q15_t)0x74ab, (q15_t)0xcb59,
+  (q15_t)0x74a8, (q15_t)0xcb53, (q15_t)0x74a5, (q15_t)0xcb4d, (q15_t)0x74a3, (q15_t)0xcb48, (q15_t)0x74a0, (q15_t)0xcb42,
+  (q15_t)0x749e, (q15_t)0xcb3c, (q15_t)0x749b, (q15_t)0xcb36, (q15_t)0x7498, (q15_t)0xcb31, (q15_t)0x7496, (q15_t)0xcb2b,
+  (q15_t)0x7493, (q15_t)0xcb25, (q15_t)0x7491, (q15_t)0xcb20, (q15_t)0x748e, (q15_t)0xcb1a, (q15_t)0x748b, (q15_t)0xcb14,
+  (q15_t)0x7489, (q15_t)0xcb0e, (q15_t)0x7486, (q15_t)0xcb09, (q15_t)0x7484, (q15_t)0xcb03, (q15_t)0x7481, (q15_t)0xcafd,
+  (q15_t)0x747e, (q15_t)0xcaf8, (q15_t)0x747c, (q15_t)0xcaf2, (q15_t)0x7479, (q15_t)0xcaec, (q15_t)0x7477, (q15_t)0xcae6,
+  (q15_t)0x7474, (q15_t)0xcae1, (q15_t)0x7471, (q15_t)0xcadb, (q15_t)0x746f, (q15_t)0xcad5, (q15_t)0x746c, (q15_t)0xcad0,
+  (q15_t)0x746a, (q15_t)0xcaca, (q15_t)0x7467, (q15_t)0xcac4, (q15_t)0x7464, (q15_t)0xcabe, (q15_t)0x7462, (q15_t)0xcab9,
+  (q15_t)0x745f, (q15_t)0xcab3, (q15_t)0x745c, (q15_t)0xcaad, (q15_t)0x745a, (q15_t)0xcaa8, (q15_t)0x7457, (q15_t)0xcaa2,
+  (q15_t)0x7455, (q15_t)0xca9c, (q15_t)0x7452, (q15_t)0xca96, (q15_t)0x744f, (q15_t)0xca91, (q15_t)0x744d, (q15_t)0xca8b,
+  (q15_t)0x744a, (q15_t)0xca85, (q15_t)0x7448, (q15_t)0xca80, (q15_t)0x7445, (q15_t)0xca7a, (q15_t)0x7442, (q15_t)0xca74,
+  (q15_t)0x7440, (q15_t)0xca6e, (q15_t)0x743d, (q15_t)0xca69, (q15_t)0x743a, (q15_t)0xca63, (q15_t)0x7438, (q15_t)0xca5d,
+  (q15_t)0x7435, (q15_t)0xca58, (q15_t)0x7432, (q15_t)0xca52, (q15_t)0x7430, (q15_t)0xca4c, (q15_t)0x742d, (q15_t)0xca46,
+  (q15_t)0x742b, (q15_t)0xca41, (q15_t)0x7428, (q15_t)0xca3b, (q15_t)0x7425, (q15_t)0xca35, (q15_t)0x7423, (q15_t)0xca30,
+  (q15_t)0x7420, (q15_t)0xca2a, (q15_t)0x741d, (q15_t)0xca24, (q15_t)0x741b, (q15_t)0xca1f, (q15_t)0x7418, (q15_t)0xca19,
+  (q15_t)0x7415, (q15_t)0xca13, (q15_t)0x7413, (q15_t)0xca0d, (q15_t)0x7410, (q15_t)0xca08, (q15_t)0x740d, (q15_t)0xca02,
+  (q15_t)0x740b, (q15_t)0xc9fc, (q15_t)0x7408, (q15_t)0xc9f7, (q15_t)0x7406, (q15_t)0xc9f1, (q15_t)0x7403, (q15_t)0xc9eb,
+  (q15_t)0x7400, (q15_t)0xc9e6, (q15_t)0x73fe, (q15_t)0xc9e0, (q15_t)0x73fb, (q15_t)0xc9da, (q15_t)0x73f8, (q15_t)0xc9d5,
+  (q15_t)0x73f6, (q15_t)0xc9cf, (q15_t)0x73f3, (q15_t)0xc9c9, (q15_t)0x73f0, (q15_t)0xc9c3, (q15_t)0x73ee, (q15_t)0xc9be,
+  (q15_t)0x73eb, (q15_t)0xc9b8, (q15_t)0x73e8, (q15_t)0xc9b2, (q15_t)0x73e6, (q15_t)0xc9ad, (q15_t)0x73e3, (q15_t)0xc9a7,
+  (q15_t)0x73e0, (q15_t)0xc9a1, (q15_t)0x73de, (q15_t)0xc99c, (q15_t)0x73db, (q15_t)0xc996, (q15_t)0x73d8, (q15_t)0xc990,
+  (q15_t)0x73d6, (q15_t)0xc98b, (q15_t)0x73d3, (q15_t)0xc985, (q15_t)0x73d0, (q15_t)0xc97f, (q15_t)0x73ce, (q15_t)0xc97a,
+  (q15_t)0x73cb, (q15_t)0xc974, (q15_t)0x73c8, (q15_t)0xc96e, (q15_t)0x73c6, (q15_t)0xc968, (q15_t)0x73c3, (q15_t)0xc963,
+  (q15_t)0x73c0, (q15_t)0xc95d, (q15_t)0x73bd, (q15_t)0xc957, (q15_t)0x73bb, (q15_t)0xc952, (q15_t)0x73b8, (q15_t)0xc94c,
+  (q15_t)0x73b5, (q15_t)0xc946, (q15_t)0x73b3, (q15_t)0xc941, (q15_t)0x73b0, (q15_t)0xc93b, (q15_t)0x73ad, (q15_t)0xc935,
+  (q15_t)0x73ab, (q15_t)0xc930, (q15_t)0x73a8, (q15_t)0xc92a, (q15_t)0x73a5, (q15_t)0xc924, (q15_t)0x73a3, (q15_t)0xc91f,
+  (q15_t)0x73a0, (q15_t)0xc919, (q15_t)0x739d, (q15_t)0xc913, (q15_t)0x739b, (q15_t)0xc90e, (q15_t)0x7398, (q15_t)0xc908,
+  (q15_t)0x7395, (q15_t)0xc902, (q15_t)0x7392, (q15_t)0xc8fd, (q15_t)0x7390, (q15_t)0xc8f7, (q15_t)0x738d, (q15_t)0xc8f1,
+  (q15_t)0x738a, (q15_t)0xc8ec, (q15_t)0x7388, (q15_t)0xc8e6, (q15_t)0x7385, (q15_t)0xc8e0, (q15_t)0x7382, (q15_t)0xc8db,
+  (q15_t)0x737f, (q15_t)0xc8d5, (q15_t)0x737d, (q15_t)0xc8cf, (q15_t)0x737a, (q15_t)0xc8ca, (q15_t)0x7377, (q15_t)0xc8c4,
+  (q15_t)0x7375, (q15_t)0xc8be, (q15_t)0x7372, (q15_t)0xc8b9, (q15_t)0x736f, (q15_t)0xc8b3, (q15_t)0x736c, (q15_t)0xc8ad,
+  (q15_t)0x736a, (q15_t)0xc8a8, (q15_t)0x7367, (q15_t)0xc8a2, (q15_t)0x7364, (q15_t)0xc89c, (q15_t)0x7362, (q15_t)0xc897,
+  (q15_t)0x735f, (q15_t)0xc891, (q15_t)0x735c, (q15_t)0xc88b, (q15_t)0x7359, (q15_t)0xc886, (q15_t)0x7357, (q15_t)0xc880,
+  (q15_t)0x7354, (q15_t)0xc87a, (q15_t)0x7351, (q15_t)0xc875, (q15_t)0x734f, (q15_t)0xc86f, (q15_t)0x734c, (q15_t)0xc869,
+  (q15_t)0x7349, (q15_t)0xc864, (q15_t)0x7346, (q15_t)0xc85e, (q15_t)0x7344, (q15_t)0xc858, (q15_t)0x7341, (q15_t)0xc853,
+  (q15_t)0x733e, (q15_t)0xc84d, (q15_t)0x733b, (q15_t)0xc847, (q15_t)0x7339, (q15_t)0xc842, (q15_t)0x7336, (q15_t)0xc83c,
+  (q15_t)0x7333, (q15_t)0xc836, (q15_t)0x7330, (q15_t)0xc831, (q15_t)0x732e, (q15_t)0xc82b, (q15_t)0x732b, (q15_t)0xc825,
+  (q15_t)0x7328, (q15_t)0xc820, (q15_t)0x7326, (q15_t)0xc81a, (q15_t)0x7323, (q15_t)0xc814, (q15_t)0x7320, (q15_t)0xc80f,
+  (q15_t)0x731d, (q15_t)0xc809, (q15_t)0x731b, (q15_t)0xc803, (q15_t)0x7318, (q15_t)0xc7fe, (q15_t)0x7315, (q15_t)0xc7f8,
+  (q15_t)0x7312, (q15_t)0xc7f3, (q15_t)0x7310, (q15_t)0xc7ed, (q15_t)0x730d, (q15_t)0xc7e7, (q15_t)0x730a, (q15_t)0xc7e2,
+  (q15_t)0x7307, (q15_t)0xc7dc, (q15_t)0x7305, (q15_t)0xc7d6, (q15_t)0x7302, (q15_t)0xc7d1, (q15_t)0x72ff, (q15_t)0xc7cb,
+  (q15_t)0x72fc, (q15_t)0xc7c5, (q15_t)0x72f9, (q15_t)0xc7c0, (q15_t)0x72f7, (q15_t)0xc7ba, (q15_t)0x72f4, (q15_t)0xc7b4,
+  (q15_t)0x72f1, (q15_t)0xc7af, (q15_t)0x72ee, (q15_t)0xc7a9, (q15_t)0x72ec, (q15_t)0xc7a3, (q15_t)0x72e9, (q15_t)0xc79e,
+  (q15_t)0x72e6, (q15_t)0xc798, (q15_t)0x72e3, (q15_t)0xc793, (q15_t)0x72e1, (q15_t)0xc78d, (q15_t)0x72de, (q15_t)0xc787,
+  (q15_t)0x72db, (q15_t)0xc782, (q15_t)0x72d8, (q15_t)0xc77c, (q15_t)0x72d5, (q15_t)0xc776, (q15_t)0x72d3, (q15_t)0xc771,
+  (q15_t)0x72d0, (q15_t)0xc76b, (q15_t)0x72cd, (q15_t)0xc765, (q15_t)0x72ca, (q15_t)0xc760, (q15_t)0x72c8, (q15_t)0xc75a,
+  (q15_t)0x72c5, (q15_t)0xc755, (q15_t)0x72c2, (q15_t)0xc74f, (q15_t)0x72bf, (q15_t)0xc749, (q15_t)0x72bc, (q15_t)0xc744,
+  (q15_t)0x72ba, (q15_t)0xc73e, (q15_t)0x72b7, (q15_t)0xc738, (q15_t)0x72b4, (q15_t)0xc733, (q15_t)0x72b1, (q15_t)0xc72d,
+  (q15_t)0x72af, (q15_t)0xc728, (q15_t)0x72ac, (q15_t)0xc722, (q15_t)0x72a9, (q15_t)0xc71c, (q15_t)0x72a6, (q15_t)0xc717,
+  (q15_t)0x72a3, (q15_t)0xc711, (q15_t)0x72a1, (q15_t)0xc70b, (q15_t)0x729e, (q15_t)0xc706, (q15_t)0x729b, (q15_t)0xc700,
+  (q15_t)0x7298, (q15_t)0xc6fa, (q15_t)0x7295, (q15_t)0xc6f5, (q15_t)0x7293, (q15_t)0xc6ef, (q15_t)0x7290, (q15_t)0xc6ea,
+  (q15_t)0x728d, (q15_t)0xc6e4, (q15_t)0x728a, (q15_t)0xc6de, (q15_t)0x7287, (q15_t)0xc6d9, (q15_t)0x7285, (q15_t)0xc6d3,
+  (q15_t)0x7282, (q15_t)0xc6ce, (q15_t)0x727f, (q15_t)0xc6c8, (q15_t)0x727c, (q15_t)0xc6c2, (q15_t)0x7279, (q15_t)0xc6bd,
+  (q15_t)0x7276, (q15_t)0xc6b7, (q15_t)0x7274, (q15_t)0xc6b1, (q15_t)0x7271, (q15_t)0xc6ac, (q15_t)0x726e, (q15_t)0xc6a6,
+  (q15_t)0x726b, (q15_t)0xc6a1, (q15_t)0x7268, (q15_t)0xc69b, (q15_t)0x7266, (q15_t)0xc695, (q15_t)0x7263, (q15_t)0xc690,
+  (q15_t)0x7260, (q15_t)0xc68a, (q15_t)0x725d, (q15_t)0xc684, (q15_t)0x725a, (q15_t)0xc67f, (q15_t)0x7257, (q15_t)0xc679,
+  (q15_t)0x7255, (q15_t)0xc674, (q15_t)0x7252, (q15_t)0xc66e, (q15_t)0x724f, (q15_t)0xc668, (q15_t)0x724c, (q15_t)0xc663,
+  (q15_t)0x7249, (q15_t)0xc65d, (q15_t)0x7247, (q15_t)0xc658, (q15_t)0x7244, (q15_t)0xc652, (q15_t)0x7241, (q15_t)0xc64c,
+  (q15_t)0x723e, (q15_t)0xc647, (q15_t)0x723b, (q15_t)0xc641, (q15_t)0x7238, (q15_t)0xc63c, (q15_t)0x7236, (q15_t)0xc636,
+  (q15_t)0x7233, (q15_t)0xc630, (q15_t)0x7230, (q15_t)0xc62b, (q15_t)0x722d, (q15_t)0xc625, (q15_t)0x722a, (q15_t)0xc620,
+  (q15_t)0x7227, (q15_t)0xc61a, (q15_t)0x7224, (q15_t)0xc614, (q15_t)0x7222, (q15_t)0xc60f, (q15_t)0x721f, (q15_t)0xc609,
+  (q15_t)0x721c, (q15_t)0xc603, (q15_t)0x7219, (q15_t)0xc5fe, (q15_t)0x7216, (q15_t)0xc5f8, (q15_t)0x7213, (q15_t)0xc5f3,
+  (q15_t)0x7211, (q15_t)0xc5ed, (q15_t)0x720e, (q15_t)0xc5e7, (q15_t)0x720b, (q15_t)0xc5e2, (q15_t)0x7208, (q15_t)0xc5dc,
+  (q15_t)0x7205, (q15_t)0xc5d7, (q15_t)0x7202, (q15_t)0xc5d1, (q15_t)0x71ff, (q15_t)0xc5cc, (q15_t)0x71fd, (q15_t)0xc5c6,
+  (q15_t)0x71fa, (q15_t)0xc5c0, (q15_t)0x71f7, (q15_t)0xc5bb, (q15_t)0x71f4, (q15_t)0xc5b5, (q15_t)0x71f1, (q15_t)0xc5b0,
+  (q15_t)0x71ee, (q15_t)0xc5aa, (q15_t)0x71eb, (q15_t)0xc5a4, (q15_t)0x71e9, (q15_t)0xc59f, (q15_t)0x71e6, (q15_t)0xc599,
+  (q15_t)0x71e3, (q15_t)0xc594, (q15_t)0x71e0, (q15_t)0xc58e, (q15_t)0x71dd, (q15_t)0xc588, (q15_t)0x71da, (q15_t)0xc583,
+  (q15_t)0x71d7, (q15_t)0xc57d, (q15_t)0x71d4, (q15_t)0xc578, (q15_t)0x71d2, (q15_t)0xc572, (q15_t)0x71cf, (q15_t)0xc56c,
+  (q15_t)0x71cc, (q15_t)0xc567, (q15_t)0x71c9, (q15_t)0xc561, (q15_t)0x71c6, (q15_t)0xc55c, (q15_t)0x71c3, (q15_t)0xc556,
+  (q15_t)0x71c0, (q15_t)0xc551, (q15_t)0x71bd, (q15_t)0xc54b, (q15_t)0x71bb, (q15_t)0xc545, (q15_t)0x71b8, (q15_t)0xc540,
+  (q15_t)0x71b5, (q15_t)0xc53a, (q15_t)0x71b2, (q15_t)0xc535, (q15_t)0x71af, (q15_t)0xc52f, (q15_t)0x71ac, (q15_t)0xc529,
+  (q15_t)0x71a9, (q15_t)0xc524, (q15_t)0x71a6, (q15_t)0xc51e, (q15_t)0x71a3, (q15_t)0xc519, (q15_t)0x71a1, (q15_t)0xc513,
+  (q15_t)0x719e, (q15_t)0xc50e, (q15_t)0x719b, (q15_t)0xc508, (q15_t)0x7198, (q15_t)0xc502, (q15_t)0x7195, (q15_t)0xc4fd,
+  (q15_t)0x7192, (q15_t)0xc4f7, (q15_t)0x718f, (q15_t)0xc4f2, (q15_t)0x718c, (q15_t)0xc4ec, (q15_t)0x7189, (q15_t)0xc4e7,
+  (q15_t)0x7186, (q15_t)0xc4e1, (q15_t)0x7184, (q15_t)0xc4db, (q15_t)0x7181, (q15_t)0xc4d6, (q15_t)0x717e, (q15_t)0xc4d0,
+  (q15_t)0x717b, (q15_t)0xc4cb, (q15_t)0x7178, (q15_t)0xc4c5, (q15_t)0x7175, (q15_t)0xc4c0, (q15_t)0x7172, (q15_t)0xc4ba,
+  (q15_t)0x716f, (q15_t)0xc4b4, (q15_t)0x716c, (q15_t)0xc4af, (q15_t)0x7169, (q15_t)0xc4a9, (q15_t)0x7167, (q15_t)0xc4a4,
+  (q15_t)0x7164, (q15_t)0xc49e, (q15_t)0x7161, (q15_t)0xc499, (q15_t)0x715e, (q15_t)0xc493, (q15_t)0x715b, (q15_t)0xc48d,
+  (q15_t)0x7158, (q15_t)0xc488, (q15_t)0x7155, (q15_t)0xc482, (q15_t)0x7152, (q15_t)0xc47d, (q15_t)0x714f, (q15_t)0xc477,
+  (q15_t)0x714c, (q15_t)0xc472, (q15_t)0x7149, (q15_t)0xc46c, (q15_t)0x7146, (q15_t)0xc467, (q15_t)0x7143, (q15_t)0xc461,
+  (q15_t)0x7141, (q15_t)0xc45b, (q15_t)0x713e, (q15_t)0xc456, (q15_t)0x713b, (q15_t)0xc450, (q15_t)0x7138, (q15_t)0xc44b,
+  (q15_t)0x7135, (q15_t)0xc445, (q15_t)0x7132, (q15_t)0xc440, (q15_t)0x712f, (q15_t)0xc43a, (q15_t)0x712c, (q15_t)0xc434,
+  (q15_t)0x7129, (q15_t)0xc42f, (q15_t)0x7126, (q15_t)0xc429, (q15_t)0x7123, (q15_t)0xc424, (q15_t)0x7120, (q15_t)0xc41e,
+  (q15_t)0x711d, (q15_t)0xc419, (q15_t)0x711a, (q15_t)0xc413, (q15_t)0x7117, (q15_t)0xc40e, (q15_t)0x7114, (q15_t)0xc408,
+  (q15_t)0x7112, (q15_t)0xc403, (q15_t)0x710f, (q15_t)0xc3fd, (q15_t)0x710c, (q15_t)0xc3f7, (q15_t)0x7109, (q15_t)0xc3f2,
+  (q15_t)0x7106, (q15_t)0xc3ec, (q15_t)0x7103, (q15_t)0xc3e7, (q15_t)0x7100, (q15_t)0xc3e1, (q15_t)0x70fd, (q15_t)0xc3dc,
+  (q15_t)0x70fa, (q15_t)0xc3d6, (q15_t)0x70f7, (q15_t)0xc3d1, (q15_t)0x70f4, (q15_t)0xc3cb, (q15_t)0x70f1, (q15_t)0xc3c5,
+  (q15_t)0x70ee, (q15_t)0xc3c0, (q15_t)0x70eb, (q15_t)0xc3ba, (q15_t)0x70e8, (q15_t)0xc3b5, (q15_t)0x70e5, (q15_t)0xc3af,
+  (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x70df, (q15_t)0xc3a4, (q15_t)0x70dc, (q15_t)0xc39f, (q15_t)0x70d9, (q15_t)0xc399,
+  (q15_t)0x70d6, (q15_t)0xc394, (q15_t)0x70d3, (q15_t)0xc38e, (q15_t)0x70d1, (q15_t)0xc389, (q15_t)0x70ce, (q15_t)0xc383,
+  (q15_t)0x70cb, (q15_t)0xc37d, (q15_t)0x70c8, (q15_t)0xc378, (q15_t)0x70c5, (q15_t)0xc372, (q15_t)0x70c2, (q15_t)0xc36d,
+  (q15_t)0x70bf, (q15_t)0xc367, (q15_t)0x70bc, (q15_t)0xc362, (q15_t)0x70b9, (q15_t)0xc35c, (q15_t)0x70b6, (q15_t)0xc357,
+  (q15_t)0x70b3, (q15_t)0xc351, (q15_t)0x70b0, (q15_t)0xc34c, (q15_t)0x70ad, (q15_t)0xc346, (q15_t)0x70aa, (q15_t)0xc341,
+  (q15_t)0x70a7, (q15_t)0xc33b, (q15_t)0x70a4, (q15_t)0xc336, (q15_t)0x70a1, (q15_t)0xc330, (q15_t)0x709e, (q15_t)0xc32a,
+  (q15_t)0x709b, (q15_t)0xc325, (q15_t)0x7098, (q15_t)0xc31f, (q15_t)0x7095, (q15_t)0xc31a, (q15_t)0x7092, (q15_t)0xc314,
+  (q15_t)0x708f, (q15_t)0xc30f, (q15_t)0x708c, (q15_t)0xc309, (q15_t)0x7089, (q15_t)0xc304, (q15_t)0x7086, (q15_t)0xc2fe,
+  (q15_t)0x7083, (q15_t)0xc2f9, (q15_t)0x7080, (q15_t)0xc2f3, (q15_t)0x707d, (q15_t)0xc2ee, (q15_t)0x707a, (q15_t)0xc2e8,
+  (q15_t)0x7077, (q15_t)0xc2e3, (q15_t)0x7074, (q15_t)0xc2dd, (q15_t)0x7071, (q15_t)0xc2d8, (q15_t)0x706e, (q15_t)0xc2d2,
+  (q15_t)0x706b, (q15_t)0xc2cd, (q15_t)0x7068, (q15_t)0xc2c7, (q15_t)0x7065, (q15_t)0xc2c2, (q15_t)0x7062, (q15_t)0xc2bc,
+  (q15_t)0x705f, (q15_t)0xc2b7, (q15_t)0x705c, (q15_t)0xc2b1, (q15_t)0x7059, (q15_t)0xc2ab, (q15_t)0x7056, (q15_t)0xc2a6,
+  (q15_t)0x7053, (q15_t)0xc2a0, (q15_t)0x7050, (q15_t)0xc29b, (q15_t)0x704d, (q15_t)0xc295, (q15_t)0x704a, (q15_t)0xc290,
+  (q15_t)0x7047, (q15_t)0xc28a, (q15_t)0x7044, (q15_t)0xc285, (q15_t)0x7041, (q15_t)0xc27f, (q15_t)0x703e, (q15_t)0xc27a,
+  (q15_t)0x703b, (q15_t)0xc274, (q15_t)0x7038, (q15_t)0xc26f, (q15_t)0x7035, (q15_t)0xc269, (q15_t)0x7032, (q15_t)0xc264,
+  (q15_t)0x702f, (q15_t)0xc25e, (q15_t)0x702c, (q15_t)0xc259, (q15_t)0x7029, (q15_t)0xc253, (q15_t)0x7026, (q15_t)0xc24e,
+  (q15_t)0x7023, (q15_t)0xc248, (q15_t)0x7020, (q15_t)0xc243, (q15_t)0x701d, (q15_t)0xc23d, (q15_t)0x7019, (q15_t)0xc238,
+  (q15_t)0x7016, (q15_t)0xc232, (q15_t)0x7013, (q15_t)0xc22d, (q15_t)0x7010, (q15_t)0xc227, (q15_t)0x700d, (q15_t)0xc222,
+  (q15_t)0x700a, (q15_t)0xc21c, (q15_t)0x7007, (q15_t)0xc217, (q15_t)0x7004, (q15_t)0xc211, (q15_t)0x7001, (q15_t)0xc20c,
+  (q15_t)0x6ffe, (q15_t)0xc206, (q15_t)0x6ffb, (q15_t)0xc201, (q15_t)0x6ff8, (q15_t)0xc1fb, (q15_t)0x6ff5, (q15_t)0xc1f6,
+  (q15_t)0x6ff2, (q15_t)0xc1f0, (q15_t)0x6fef, (q15_t)0xc1eb, (q15_t)0x6fec, (q15_t)0xc1e5, (q15_t)0x6fe9, (q15_t)0xc1e0,
+  (q15_t)0x6fe6, (q15_t)0xc1da, (q15_t)0x6fe3, (q15_t)0xc1d5, (q15_t)0x6fe0, (q15_t)0xc1cf, (q15_t)0x6fdd, (q15_t)0xc1ca,
+  (q15_t)0x6fda, (q15_t)0xc1c4, (q15_t)0x6fd6, (q15_t)0xc1bf, (q15_t)0x6fd3, (q15_t)0xc1b9, (q15_t)0x6fd0, (q15_t)0xc1b4,
+  (q15_t)0x6fcd, (q15_t)0xc1ae, (q15_t)0x6fca, (q15_t)0xc1a9, (q15_t)0x6fc7, (q15_t)0xc1a3, (q15_t)0x6fc4, (q15_t)0xc19e,
+  (q15_t)0x6fc1, (q15_t)0xc198, (q15_t)0x6fbe, (q15_t)0xc193, (q15_t)0x6fbb, (q15_t)0xc18d, (q15_t)0x6fb8, (q15_t)0xc188,
+  (q15_t)0x6fb5, (q15_t)0xc183, (q15_t)0x6fb2, (q15_t)0xc17d, (q15_t)0x6faf, (q15_t)0xc178, (q15_t)0x6fac, (q15_t)0xc172,
+  (q15_t)0x6fa9, (q15_t)0xc16d, (q15_t)0x6fa5, (q15_t)0xc167, (q15_t)0x6fa2, (q15_t)0xc162, (q15_t)0x6f9f, (q15_t)0xc15c,
+  (q15_t)0x6f9c, (q15_t)0xc157, (q15_t)0x6f99, (q15_t)0xc151, (q15_t)0x6f96, (q15_t)0xc14c, (q15_t)0x6f93, (q15_t)0xc146,
+  (q15_t)0x6f90, (q15_t)0xc141, (q15_t)0x6f8d, (q15_t)0xc13b, (q15_t)0x6f8a, (q15_t)0xc136, (q15_t)0x6f87, (q15_t)0xc130,
+  (q15_t)0x6f84, (q15_t)0xc12b, (q15_t)0x6f81, (q15_t)0xc125, (q15_t)0x6f7d, (q15_t)0xc120, (q15_t)0x6f7a, (q15_t)0xc11a,
+  (q15_t)0x6f77, (q15_t)0xc115, (q15_t)0x6f74, (q15_t)0xc10f, (q15_t)0x6f71, (q15_t)0xc10a, (q15_t)0x6f6e, (q15_t)0xc105,
+  (q15_t)0x6f6b, (q15_t)0xc0ff, (q15_t)0x6f68, (q15_t)0xc0fa, (q15_t)0x6f65, (q15_t)0xc0f4, (q15_t)0x6f62, (q15_t)0xc0ef,
+  (q15_t)0x6f5f, (q15_t)0xc0e9, (q15_t)0x6f5b, (q15_t)0xc0e4, (q15_t)0x6f58, (q15_t)0xc0de, (q15_t)0x6f55, (q15_t)0xc0d9,
+  (q15_t)0x6f52, (q15_t)0xc0d3, (q15_t)0x6f4f, (q15_t)0xc0ce, (q15_t)0x6f4c, (q15_t)0xc0c8, (q15_t)0x6f49, (q15_t)0xc0c3,
+  (q15_t)0x6f46, (q15_t)0xc0bd, (q15_t)0x6f43, (q15_t)0xc0b8, (q15_t)0x6f3f, (q15_t)0xc0b3, (q15_t)0x6f3c, (q15_t)0xc0ad,
+  (q15_t)0x6f39, (q15_t)0xc0a8, (q15_t)0x6f36, (q15_t)0xc0a2, (q15_t)0x6f33, (q15_t)0xc09d, (q15_t)0x6f30, (q15_t)0xc097,
+  (q15_t)0x6f2d, (q15_t)0xc092, (q15_t)0x6f2a, (q15_t)0xc08c, (q15_t)0x6f27, (q15_t)0xc087, (q15_t)0x6f23, (q15_t)0xc081,
+  (q15_t)0x6f20, (q15_t)0xc07c, (q15_t)0x6f1d, (q15_t)0xc077, (q15_t)0x6f1a, (q15_t)0xc071, (q15_t)0x6f17, (q15_t)0xc06c,
+  (q15_t)0x6f14, (q15_t)0xc066, (q15_t)0x6f11, (q15_t)0xc061, (q15_t)0x6f0e, (q15_t)0xc05b, (q15_t)0x6f0b, (q15_t)0xc056,
+  (q15_t)0x6f07, (q15_t)0xc050, (q15_t)0x6f04, (q15_t)0xc04b, (q15_t)0x6f01, (q15_t)0xc045, (q15_t)0x6efe, (q15_t)0xc040,
+  (q15_t)0x6efb, (q15_t)0xc03b, (q15_t)0x6ef8, (q15_t)0xc035, (q15_t)0x6ef5, (q15_t)0xc030, (q15_t)0x6ef1, (q15_t)0xc02a,
+  (q15_t)0x6eee, (q15_t)0xc025, (q15_t)0x6eeb, (q15_t)0xc01f, (q15_t)0x6ee8, (q15_t)0xc01a, (q15_t)0x6ee5, (q15_t)0xc014,
+  (q15_t)0x6ee2, (q15_t)0xc00f, (q15_t)0x6edf, (q15_t)0xc00a, (q15_t)0x6edc, (q15_t)0xc004, (q15_t)0x6ed8, (q15_t)0xbfff,
+  (q15_t)0x6ed5, (q15_t)0xbff9, (q15_t)0x6ed2, (q15_t)0xbff4, (q15_t)0x6ecf, (q15_t)0xbfee, (q15_t)0x6ecc, (q15_t)0xbfe9,
+  (q15_t)0x6ec9, (q15_t)0xbfe3, (q15_t)0x6ec6, (q15_t)0xbfde, (q15_t)0x6ec2, (q15_t)0xbfd9, (q15_t)0x6ebf, (q15_t)0xbfd3,
+  (q15_t)0x6ebc, (q15_t)0xbfce, (q15_t)0x6eb9, (q15_t)0xbfc8, (q15_t)0x6eb6, (q15_t)0xbfc3, (q15_t)0x6eb3, (q15_t)0xbfbd,
+  (q15_t)0x6eaf, (q15_t)0xbfb8, (q15_t)0x6eac, (q15_t)0xbfb3, (q15_t)0x6ea9, (q15_t)0xbfad, (q15_t)0x6ea6, (q15_t)0xbfa8,
+  (q15_t)0x6ea3, (q15_t)0xbfa2, (q15_t)0x6ea0, (q15_t)0xbf9d, (q15_t)0x6e9c, (q15_t)0xbf97, (q15_t)0x6e99, (q15_t)0xbf92,
+  (q15_t)0x6e96, (q15_t)0xbf8d, (q15_t)0x6e93, (q15_t)0xbf87, (q15_t)0x6e90, (q15_t)0xbf82, (q15_t)0x6e8d, (q15_t)0xbf7c,
+  (q15_t)0x6e89, (q15_t)0xbf77, (q15_t)0x6e86, (q15_t)0xbf71, (q15_t)0x6e83, (q15_t)0xbf6c, (q15_t)0x6e80, (q15_t)0xbf67,
+  (q15_t)0x6e7d, (q15_t)0xbf61, (q15_t)0x6e7a, (q15_t)0xbf5c, (q15_t)0x6e76, (q15_t)0xbf56, (q15_t)0x6e73, (q15_t)0xbf51,
+  (q15_t)0x6e70, (q15_t)0xbf4b, (q15_t)0x6e6d, (q15_t)0xbf46, (q15_t)0x6e6a, (q15_t)0xbf41, (q15_t)0x6e67, (q15_t)0xbf3b,
+  (q15_t)0x6e63, (q15_t)0xbf36, (q15_t)0x6e60, (q15_t)0xbf30, (q15_t)0x6e5d, (q15_t)0xbf2b, (q15_t)0x6e5a, (q15_t)0xbf26,
+  (q15_t)0x6e57, (q15_t)0xbf20, (q15_t)0x6e53, (q15_t)0xbf1b, (q15_t)0x6e50, (q15_t)0xbf15, (q15_t)0x6e4d, (q15_t)0xbf10,
+  (q15_t)0x6e4a, (q15_t)0xbf0a, (q15_t)0x6e47, (q15_t)0xbf05, (q15_t)0x6e44, (q15_t)0xbf00, (q15_t)0x6e40, (q15_t)0xbefa,
+  (q15_t)0x6e3d, (q15_t)0xbef5, (q15_t)0x6e3a, (q15_t)0xbeef, (q15_t)0x6e37, (q15_t)0xbeea, (q15_t)0x6e34, (q15_t)0xbee5,
+  (q15_t)0x6e30, (q15_t)0xbedf, (q15_t)0x6e2d, (q15_t)0xbeda, (q15_t)0x6e2a, (q15_t)0xbed4, (q15_t)0x6e27, (q15_t)0xbecf,
+  (q15_t)0x6e24, (q15_t)0xbeca, (q15_t)0x6e20, (q15_t)0xbec4, (q15_t)0x6e1d, (q15_t)0xbebf, (q15_t)0x6e1a, (q15_t)0xbeb9,
+  (q15_t)0x6e17, (q15_t)0xbeb4, (q15_t)0x6e14, (q15_t)0xbeae, (q15_t)0x6e10, (q15_t)0xbea9, (q15_t)0x6e0d, (q15_t)0xbea4,
+  (q15_t)0x6e0a, (q15_t)0xbe9e, (q15_t)0x6e07, (q15_t)0xbe99, (q15_t)0x6e04, (q15_t)0xbe93, (q15_t)0x6e00, (q15_t)0xbe8e,
+  (q15_t)0x6dfd, (q15_t)0xbe89, (q15_t)0x6dfa, (q15_t)0xbe83, (q15_t)0x6df7, (q15_t)0xbe7e, (q15_t)0x6df3, (q15_t)0xbe78,
+  (q15_t)0x6df0, (q15_t)0xbe73, (q15_t)0x6ded, (q15_t)0xbe6e, (q15_t)0x6dea, (q15_t)0xbe68, (q15_t)0x6de7, (q15_t)0xbe63,
+  (q15_t)0x6de3, (q15_t)0xbe5e, (q15_t)0x6de0, (q15_t)0xbe58, (q15_t)0x6ddd, (q15_t)0xbe53, (q15_t)0x6dda, (q15_t)0xbe4d,
+  (q15_t)0x6dd6, (q15_t)0xbe48, (q15_t)0x6dd3, (q15_t)0xbe43, (q15_t)0x6dd0, (q15_t)0xbe3d, (q15_t)0x6dcd, (q15_t)0xbe38,
+  (q15_t)0x6dca, (q15_t)0xbe32, (q15_t)0x6dc6, (q15_t)0xbe2d, (q15_t)0x6dc3, (q15_t)0xbe28, (q15_t)0x6dc0, (q15_t)0xbe22,
+  (q15_t)0x6dbd, (q15_t)0xbe1d, (q15_t)0x6db9, (q15_t)0xbe17, (q15_t)0x6db6, (q15_t)0xbe12, (q15_t)0x6db3, (q15_t)0xbe0d,
+  (q15_t)0x6db0, (q15_t)0xbe07, (q15_t)0x6dac, (q15_t)0xbe02, (q15_t)0x6da9, (q15_t)0xbdfd, (q15_t)0x6da6, (q15_t)0xbdf7,
+  (q15_t)0x6da3, (q15_t)0xbdf2, (q15_t)0x6d9f, (q15_t)0xbdec, (q15_t)0x6d9c, (q15_t)0xbde7, (q15_t)0x6d99, (q15_t)0xbde2,
+  (q15_t)0x6d96, (q15_t)0xbddc, (q15_t)0x6d92, (q15_t)0xbdd7, (q15_t)0x6d8f, (q15_t)0xbdd1, (q15_t)0x6d8c, (q15_t)0xbdcc,
+  (q15_t)0x6d89, (q15_t)0xbdc7, (q15_t)0x6d85, (q15_t)0xbdc1, (q15_t)0x6d82, (q15_t)0xbdbc, (q15_t)0x6d7f, (q15_t)0xbdb7,
+  (q15_t)0x6d7c, (q15_t)0xbdb1, (q15_t)0x6d78, (q15_t)0xbdac, (q15_t)0x6d75, (q15_t)0xbda6, (q15_t)0x6d72, (q15_t)0xbda1,
+  (q15_t)0x6d6f, (q15_t)0xbd9c, (q15_t)0x6d6b, (q15_t)0xbd96, (q15_t)0x6d68, (q15_t)0xbd91, (q15_t)0x6d65, (q15_t)0xbd8c,
+  (q15_t)0x6d62, (q15_t)0xbd86, (q15_t)0x6d5e, (q15_t)0xbd81, (q15_t)0x6d5b, (q15_t)0xbd7c, (q15_t)0x6d58, (q15_t)0xbd76,
+  (q15_t)0x6d55, (q15_t)0xbd71, (q15_t)0x6d51, (q15_t)0xbd6b, (q15_t)0x6d4e, (q15_t)0xbd66, (q15_t)0x6d4b, (q15_t)0xbd61,
+  (q15_t)0x6d48, (q15_t)0xbd5b, (q15_t)0x6d44, (q15_t)0xbd56, (q15_t)0x6d41, (q15_t)0xbd51, (q15_t)0x6d3e, (q15_t)0xbd4b,
+  (q15_t)0x6d3a, (q15_t)0xbd46, (q15_t)0x6d37, (q15_t)0xbd40, (q15_t)0x6d34, (q15_t)0xbd3b, (q15_t)0x6d31, (q15_t)0xbd36,
+  (q15_t)0x6d2d, (q15_t)0xbd30, (q15_t)0x6d2a, (q15_t)0xbd2b, (q15_t)0x6d27, (q15_t)0xbd26, (q15_t)0x6d23, (q15_t)0xbd20,
+  (q15_t)0x6d20, (q15_t)0xbd1b, (q15_t)0x6d1d, (q15_t)0xbd16, (q15_t)0x6d1a, (q15_t)0xbd10, (q15_t)0x6d16, (q15_t)0xbd0b,
+  (q15_t)0x6d13, (q15_t)0xbd06, (q15_t)0x6d10, (q15_t)0xbd00, (q15_t)0x6d0c, (q15_t)0xbcfb, (q15_t)0x6d09, (q15_t)0xbcf5,
+  (q15_t)0x6d06, (q15_t)0xbcf0, (q15_t)0x6d03, (q15_t)0xbceb, (q15_t)0x6cff, (q15_t)0xbce5, (q15_t)0x6cfc, (q15_t)0xbce0,
+  (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6cf5, (q15_t)0xbcd5, (q15_t)0x6cf2, (q15_t)0xbcd0, (q15_t)0x6cef, (q15_t)0xbccb,
+  (q15_t)0x6cec, (q15_t)0xbcc5, (q15_t)0x6ce8, (q15_t)0xbcc0, (q15_t)0x6ce5, (q15_t)0xbcbb, (q15_t)0x6ce2, (q15_t)0xbcb5,
+  (q15_t)0x6cde, (q15_t)0xbcb0, (q15_t)0x6cdb, (q15_t)0xbcab, (q15_t)0x6cd8, (q15_t)0xbca5, (q15_t)0x6cd4, (q15_t)0xbca0,
+  (q15_t)0x6cd1, (q15_t)0xbc9b, (q15_t)0x6cce, (q15_t)0xbc95, (q15_t)0x6cca, (q15_t)0xbc90, (q15_t)0x6cc7, (q15_t)0xbc8b,
+  (q15_t)0x6cc4, (q15_t)0xbc85, (q15_t)0x6cc1, (q15_t)0xbc80, (q15_t)0x6cbd, (q15_t)0xbc7b, (q15_t)0x6cba, (q15_t)0xbc75,
+  (q15_t)0x6cb7, (q15_t)0xbc70, (q15_t)0x6cb3, (q15_t)0xbc6b, (q15_t)0x6cb0, (q15_t)0xbc65, (q15_t)0x6cad, (q15_t)0xbc60,
+  (q15_t)0x6ca9, (q15_t)0xbc5b, (q15_t)0x6ca6, (q15_t)0xbc55, (q15_t)0x6ca3, (q15_t)0xbc50, (q15_t)0x6c9f, (q15_t)0xbc4b,
+  (q15_t)0x6c9c, (q15_t)0xbc45, (q15_t)0x6c99, (q15_t)0xbc40, (q15_t)0x6c95, (q15_t)0xbc3b, (q15_t)0x6c92, (q15_t)0xbc35,
+  (q15_t)0x6c8f, (q15_t)0xbc30, (q15_t)0x6c8b, (q15_t)0xbc2b, (q15_t)0x6c88, (q15_t)0xbc25, (q15_t)0x6c85, (q15_t)0xbc20,
+  (q15_t)0x6c81, (q15_t)0xbc1b, (q15_t)0x6c7e, (q15_t)0xbc15, (q15_t)0x6c7b, (q15_t)0xbc10, (q15_t)0x6c77, (q15_t)0xbc0b,
+  (q15_t)0x6c74, (q15_t)0xbc05, (q15_t)0x6c71, (q15_t)0xbc00, (q15_t)0x6c6d, (q15_t)0xbbfb, (q15_t)0x6c6a, (q15_t)0xbbf5,
+  (q15_t)0x6c67, (q15_t)0xbbf0, (q15_t)0x6c63, (q15_t)0xbbeb, (q15_t)0x6c60, (q15_t)0xbbe5, (q15_t)0x6c5d, (q15_t)0xbbe0,
+  (q15_t)0x6c59, (q15_t)0xbbdb, (q15_t)0x6c56, (q15_t)0xbbd5, (q15_t)0x6c53, (q15_t)0xbbd0, (q15_t)0x6c4f, (q15_t)0xbbcb,
+  (q15_t)0x6c4c, (q15_t)0xbbc5, (q15_t)0x6c49, (q15_t)0xbbc0, (q15_t)0x6c45, (q15_t)0xbbbb, (q15_t)0x6c42, (q15_t)0xbbb5,
+  (q15_t)0x6c3f, (q15_t)0xbbb0, (q15_t)0x6c3b, (q15_t)0xbbab, (q15_t)0x6c38, (q15_t)0xbba6, (q15_t)0x6c34, (q15_t)0xbba0,
+  (q15_t)0x6c31, (q15_t)0xbb9b, (q15_t)0x6c2e, (q15_t)0xbb96, (q15_t)0x6c2a, (q15_t)0xbb90, (q15_t)0x6c27, (q15_t)0xbb8b,
+  (q15_t)0x6c24, (q15_t)0xbb86, (q15_t)0x6c20, (q15_t)0xbb80, (q15_t)0x6c1d, (q15_t)0xbb7b, (q15_t)0x6c1a, (q15_t)0xbb76,
+  (q15_t)0x6c16, (q15_t)0xbb70, (q15_t)0x6c13, (q15_t)0xbb6b, (q15_t)0x6c0f, (q15_t)0xbb66, (q15_t)0x6c0c, (q15_t)0xbb61,
+  (q15_t)0x6c09, (q15_t)0xbb5b, (q15_t)0x6c05, (q15_t)0xbb56, (q15_t)0x6c02, (q15_t)0xbb51, (q15_t)0x6bff, (q15_t)0xbb4b,
+  (q15_t)0x6bfb, (q15_t)0xbb46, (q15_t)0x6bf8, (q15_t)0xbb41, (q15_t)0x6bf5, (q15_t)0xbb3b, (q15_t)0x6bf1, (q15_t)0xbb36,
+  (q15_t)0x6bee, (q15_t)0xbb31, (q15_t)0x6bea, (q15_t)0xbb2c, (q15_t)0x6be7, (q15_t)0xbb26, (q15_t)0x6be4, (q15_t)0xbb21,
+  (q15_t)0x6be0, (q15_t)0xbb1c, (q15_t)0x6bdd, (q15_t)0xbb16, (q15_t)0x6bd9, (q15_t)0xbb11, (q15_t)0x6bd6, (q15_t)0xbb0c,
+  (q15_t)0x6bd3, (q15_t)0xbb06, (q15_t)0x6bcf, (q15_t)0xbb01, (q15_t)0x6bcc, (q15_t)0xbafc, (q15_t)0x6bc9, (q15_t)0xbaf7,
+  (q15_t)0x6bc5, (q15_t)0xbaf1, (q15_t)0x6bc2, (q15_t)0xbaec, (q15_t)0x6bbe, (q15_t)0xbae7, (q15_t)0x6bbb, (q15_t)0xbae1,
+  (q15_t)0x6bb8, (q15_t)0xbadc, (q15_t)0x6bb4, (q15_t)0xbad7, (q15_t)0x6bb1, (q15_t)0xbad2, (q15_t)0x6bad, (q15_t)0xbacc,
+  (q15_t)0x6baa, (q15_t)0xbac7, (q15_t)0x6ba7, (q15_t)0xbac2, (q15_t)0x6ba3, (q15_t)0xbabc, (q15_t)0x6ba0, (q15_t)0xbab7,
+  (q15_t)0x6b9c, (q15_t)0xbab2, (q15_t)0x6b99, (q15_t)0xbaad, (q15_t)0x6b96, (q15_t)0xbaa7, (q15_t)0x6b92, (q15_t)0xbaa2,
+  (q15_t)0x6b8f, (q15_t)0xba9d, (q15_t)0x6b8b, (q15_t)0xba97, (q15_t)0x6b88, (q15_t)0xba92, (q15_t)0x6b85, (q15_t)0xba8d,
+  (q15_t)0x6b81, (q15_t)0xba88, (q15_t)0x6b7e, (q15_t)0xba82, (q15_t)0x6b7a, (q15_t)0xba7d, (q15_t)0x6b77, (q15_t)0xba78,
+  (q15_t)0x6b73, (q15_t)0xba73, (q15_t)0x6b70, (q15_t)0xba6d, (q15_t)0x6b6d, (q15_t)0xba68, (q15_t)0x6b69, (q15_t)0xba63,
+  (q15_t)0x6b66, (q15_t)0xba5d, (q15_t)0x6b62, (q15_t)0xba58, (q15_t)0x6b5f, (q15_t)0xba53, (q15_t)0x6b5c, (q15_t)0xba4e,
+  (q15_t)0x6b58, (q15_t)0xba48, (q15_t)0x6b55, (q15_t)0xba43, (q15_t)0x6b51, (q15_t)0xba3e, (q15_t)0x6b4e, (q15_t)0xba39,
+  (q15_t)0x6b4a, (q15_t)0xba33, (q15_t)0x6b47, (q15_t)0xba2e, (q15_t)0x6b44, (q15_t)0xba29, (q15_t)0x6b40, (q15_t)0xba23,
+  (q15_t)0x6b3d, (q15_t)0xba1e, (q15_t)0x6b39, (q15_t)0xba19, (q15_t)0x6b36, (q15_t)0xba14, (q15_t)0x6b32, (q15_t)0xba0e,
+  (q15_t)0x6b2f, (q15_t)0xba09, (q15_t)0x6b2c, (q15_t)0xba04, (q15_t)0x6b28, (q15_t)0xb9ff, (q15_t)0x6b25, (q15_t)0xb9f9,
+  (q15_t)0x6b21, (q15_t)0xb9f4, (q15_t)0x6b1e, (q15_t)0xb9ef, (q15_t)0x6b1a, (q15_t)0xb9ea, (q15_t)0x6b17, (q15_t)0xb9e4,
+  (q15_t)0x6b13, (q15_t)0xb9df, (q15_t)0x6b10, (q15_t)0xb9da, (q15_t)0x6b0d, (q15_t)0xb9d5, (q15_t)0x6b09, (q15_t)0xb9cf,
+  (q15_t)0x6b06, (q15_t)0xb9ca, (q15_t)0x6b02, (q15_t)0xb9c5, (q15_t)0x6aff, (q15_t)0xb9c0, (q15_t)0x6afb, (q15_t)0xb9ba,
+  (q15_t)0x6af8, (q15_t)0xb9b5, (q15_t)0x6af4, (q15_t)0xb9b0, (q15_t)0x6af1, (q15_t)0xb9ab, (q15_t)0x6aee, (q15_t)0xb9a5,
+  (q15_t)0x6aea, (q15_t)0xb9a0, (q15_t)0x6ae7, (q15_t)0xb99b, (q15_t)0x6ae3, (q15_t)0xb996, (q15_t)0x6ae0, (q15_t)0xb990,
+  (q15_t)0x6adc, (q15_t)0xb98b, (q15_t)0x6ad9, (q15_t)0xb986, (q15_t)0x6ad5, (q15_t)0xb981, (q15_t)0x6ad2, (q15_t)0xb97b,
+  (q15_t)0x6ace, (q15_t)0xb976, (q15_t)0x6acb, (q15_t)0xb971, (q15_t)0x6ac8, (q15_t)0xb96c, (q15_t)0x6ac4, (q15_t)0xb966,
+  (q15_t)0x6ac1, (q15_t)0xb961, (q15_t)0x6abd, (q15_t)0xb95c, (q15_t)0x6aba, (q15_t)0xb957, (q15_t)0x6ab6, (q15_t)0xb951,
+  (q15_t)0x6ab3, (q15_t)0xb94c, (q15_t)0x6aaf, (q15_t)0xb947, (q15_t)0x6aac, (q15_t)0xb942, (q15_t)0x6aa8, (q15_t)0xb93c,
+  (q15_t)0x6aa5, (q15_t)0xb937, (q15_t)0x6aa1, (q15_t)0xb932, (q15_t)0x6a9e, (q15_t)0xb92d, (q15_t)0x6a9a, (q15_t)0xb928,
+  (q15_t)0x6a97, (q15_t)0xb922, (q15_t)0x6a93, (q15_t)0xb91d, (q15_t)0x6a90, (q15_t)0xb918, (q15_t)0x6a8c, (q15_t)0xb913,
+  (q15_t)0x6a89, (q15_t)0xb90d, (q15_t)0x6a86, (q15_t)0xb908, (q15_t)0x6a82, (q15_t)0xb903, (q15_t)0x6a7f, (q15_t)0xb8fe,
+  (q15_t)0x6a7b, (q15_t)0xb8f8, (q15_t)0x6a78, (q15_t)0xb8f3, (q15_t)0x6a74, (q15_t)0xb8ee, (q15_t)0x6a71, (q15_t)0xb8e9,
+  (q15_t)0x6a6d, (q15_t)0xb8e4, (q15_t)0x6a6a, (q15_t)0xb8de, (q15_t)0x6a66, (q15_t)0xb8d9, (q15_t)0x6a63, (q15_t)0xb8d4,
+  (q15_t)0x6a5f, (q15_t)0xb8cf, (q15_t)0x6a5c, (q15_t)0xb8c9, (q15_t)0x6a58, (q15_t)0xb8c4, (q15_t)0x6a55, (q15_t)0xb8bf,
+  (q15_t)0x6a51, (q15_t)0xb8ba, (q15_t)0x6a4e, (q15_t)0xb8b5, (q15_t)0x6a4a, (q15_t)0xb8af, (q15_t)0x6a47, (q15_t)0xb8aa,
+  (q15_t)0x6a43, (q15_t)0xb8a5, (q15_t)0x6a40, (q15_t)0xb8a0, (q15_t)0x6a3c, (q15_t)0xb89b, (q15_t)0x6a39, (q15_t)0xb895,
+  (q15_t)0x6a35, (q15_t)0xb890, (q15_t)0x6a32, (q15_t)0xb88b, (q15_t)0x6a2e, (q15_t)0xb886, (q15_t)0x6a2b, (q15_t)0xb880,
+  (q15_t)0x6a27, (q15_t)0xb87b, (q15_t)0x6a24, (q15_t)0xb876, (q15_t)0x6a20, (q15_t)0xb871, (q15_t)0x6a1d, (q15_t)0xb86c,
+  (q15_t)0x6a19, (q15_t)0xb866, (q15_t)0x6a16, (q15_t)0xb861, (q15_t)0x6a12, (q15_t)0xb85c, (q15_t)0x6a0e, (q15_t)0xb857,
+  (q15_t)0x6a0b, (q15_t)0xb852, (q15_t)0x6a07, (q15_t)0xb84c, (q15_t)0x6a04, (q15_t)0xb847, (q15_t)0x6a00, (q15_t)0xb842,
+  (q15_t)0x69fd, (q15_t)0xb83d, (q15_t)0x69f9, (q15_t)0xb838, (q15_t)0x69f6, (q15_t)0xb832, (q15_t)0x69f2, (q15_t)0xb82d,
+  (q15_t)0x69ef, (q15_t)0xb828, (q15_t)0x69eb, (q15_t)0xb823, (q15_t)0x69e8, (q15_t)0xb81e, (q15_t)0x69e4, (q15_t)0xb818,
+  (q15_t)0x69e1, (q15_t)0xb813, (q15_t)0x69dd, (q15_t)0xb80e, (q15_t)0x69da, (q15_t)0xb809, (q15_t)0x69d6, (q15_t)0xb804,
+  (q15_t)0x69d3, (q15_t)0xb7fe, (q15_t)0x69cf, (q15_t)0xb7f9, (q15_t)0x69cb, (q15_t)0xb7f4, (q15_t)0x69c8, (q15_t)0xb7ef,
+  (q15_t)0x69c4, (q15_t)0xb7ea, (q15_t)0x69c1, (q15_t)0xb7e4, (q15_t)0x69bd, (q15_t)0xb7df, (q15_t)0x69ba, (q15_t)0xb7da,
+  (q15_t)0x69b6, (q15_t)0xb7d5, (q15_t)0x69b3, (q15_t)0xb7d0, (q15_t)0x69af, (q15_t)0xb7ca, (q15_t)0x69ac, (q15_t)0xb7c5,
+  (q15_t)0x69a8, (q15_t)0xb7c0, (q15_t)0x69a5, (q15_t)0xb7bb, (q15_t)0x69a1, (q15_t)0xb7b6, (q15_t)0x699d, (q15_t)0xb7b1,
+  (q15_t)0x699a, (q15_t)0xb7ab, (q15_t)0x6996, (q15_t)0xb7a6, (q15_t)0x6993, (q15_t)0xb7a1, (q15_t)0x698f, (q15_t)0xb79c,
+  (q15_t)0x698c, (q15_t)0xb797, (q15_t)0x6988, (q15_t)0xb791, (q15_t)0x6985, (q15_t)0xb78c, (q15_t)0x6981, (q15_t)0xb787,
+  (q15_t)0x697d, (q15_t)0xb782, (q15_t)0x697a, (q15_t)0xb77d, (q15_t)0x6976, (q15_t)0xb778, (q15_t)0x6973, (q15_t)0xb772,
+  (q15_t)0x696f, (q15_t)0xb76d, (q15_t)0x696c, (q15_t)0xb768, (q15_t)0x6968, (q15_t)0xb763, (q15_t)0x6964, (q15_t)0xb75e,
+  (q15_t)0x6961, (q15_t)0xb758, (q15_t)0x695d, (q15_t)0xb753, (q15_t)0x695a, (q15_t)0xb74e, (q15_t)0x6956, (q15_t)0xb749,
+  (q15_t)0x6953, (q15_t)0xb744, (q15_t)0x694f, (q15_t)0xb73f, (q15_t)0x694b, (q15_t)0xb739, (q15_t)0x6948, (q15_t)0xb734,
+  (q15_t)0x6944, (q15_t)0xb72f, (q15_t)0x6941, (q15_t)0xb72a, (q15_t)0x693d, (q15_t)0xb725, (q15_t)0x693a, (q15_t)0xb720,
+  (q15_t)0x6936, (q15_t)0xb71a, (q15_t)0x6932, (q15_t)0xb715, (q15_t)0x692f, (q15_t)0xb710, (q15_t)0x692b, (q15_t)0xb70b,
+  (q15_t)0x6928, (q15_t)0xb706, (q15_t)0x6924, (q15_t)0xb701, (q15_t)0x6921, (q15_t)0xb6fb, (q15_t)0x691d, (q15_t)0xb6f6,
+  (q15_t)0x6919, (q15_t)0xb6f1, (q15_t)0x6916, (q15_t)0xb6ec, (q15_t)0x6912, (q15_t)0xb6e7, (q15_t)0x690f, (q15_t)0xb6e2,
+  (q15_t)0x690b, (q15_t)0xb6dd, (q15_t)0x6907, (q15_t)0xb6d7, (q15_t)0x6904, (q15_t)0xb6d2, (q15_t)0x6900, (q15_t)0xb6cd,
+  (q15_t)0x68fd, (q15_t)0xb6c8, (q15_t)0x68f9, (q15_t)0xb6c3, (q15_t)0x68f5, (q15_t)0xb6be, (q15_t)0x68f2, (q15_t)0xb6b8,
+  (q15_t)0x68ee, (q15_t)0xb6b3, (q15_t)0x68eb, (q15_t)0xb6ae, (q15_t)0x68e7, (q15_t)0xb6a9, (q15_t)0x68e3, (q15_t)0xb6a4,
+  (q15_t)0x68e0, (q15_t)0xb69f, (q15_t)0x68dc, (q15_t)0xb69a, (q15_t)0x68d9, (q15_t)0xb694, (q15_t)0x68d5, (q15_t)0xb68f,
+  (q15_t)0x68d1, (q15_t)0xb68a, (q15_t)0x68ce, (q15_t)0xb685, (q15_t)0x68ca, (q15_t)0xb680, (q15_t)0x68c7, (q15_t)0xb67b,
+  (q15_t)0x68c3, (q15_t)0xb676, (q15_t)0x68bf, (q15_t)0xb670, (q15_t)0x68bc, (q15_t)0xb66b, (q15_t)0x68b8, (q15_t)0xb666,
+  (q15_t)0x68b5, (q15_t)0xb661, (q15_t)0x68b1, (q15_t)0xb65c, (q15_t)0x68ad, (q15_t)0xb657, (q15_t)0x68aa, (q15_t)0xb652,
+  (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x68a3, (q15_t)0xb647, (q15_t)0x689f, (q15_t)0xb642, (q15_t)0x689b, (q15_t)0xb63d,
+  (q15_t)0x6898, (q15_t)0xb638, (q15_t)0x6894, (q15_t)0xb633, (q15_t)0x6890, (q15_t)0xb62e, (q15_t)0x688d, (q15_t)0xb628,
+  (q15_t)0x6889, (q15_t)0xb623, (q15_t)0x6886, (q15_t)0xb61e, (q15_t)0x6882, (q15_t)0xb619, (q15_t)0x687e, (q15_t)0xb614,
+  (q15_t)0x687b, (q15_t)0xb60f, (q15_t)0x6877, (q15_t)0xb60a, (q15_t)0x6873, (q15_t)0xb605, (q15_t)0x6870, (q15_t)0xb5ff,
+  (q15_t)0x686c, (q15_t)0xb5fa, (q15_t)0x6868, (q15_t)0xb5f5, (q15_t)0x6865, (q15_t)0xb5f0, (q15_t)0x6861, (q15_t)0xb5eb,
+  (q15_t)0x685e, (q15_t)0xb5e6, (q15_t)0x685a, (q15_t)0xb5e1, (q15_t)0x6856, (q15_t)0xb5dc, (q15_t)0x6853, (q15_t)0xb5d6,
+  (q15_t)0x684f, (q15_t)0xb5d1, (q15_t)0x684b, (q15_t)0xb5cc, (q15_t)0x6848, (q15_t)0xb5c7, (q15_t)0x6844, (q15_t)0xb5c2,
+  (q15_t)0x6840, (q15_t)0xb5bd, (q15_t)0x683d, (q15_t)0xb5b8, (q15_t)0x6839, (q15_t)0xb5b3, (q15_t)0x6835, (q15_t)0xb5ae,
+  (q15_t)0x6832, (q15_t)0xb5a8, (q15_t)0x682e, (q15_t)0xb5a3, (q15_t)0x682b, (q15_t)0xb59e, (q15_t)0x6827, (q15_t)0xb599,
+  (q15_t)0x6823, (q15_t)0xb594, (q15_t)0x6820, (q15_t)0xb58f, (q15_t)0x681c, (q15_t)0xb58a, (q15_t)0x6818, (q15_t)0xb585,
+  (q15_t)0x6815, (q15_t)0xb57f, (q15_t)0x6811, (q15_t)0xb57a, (q15_t)0x680d, (q15_t)0xb575, (q15_t)0x680a, (q15_t)0xb570,
+  (q15_t)0x6806, (q15_t)0xb56b, (q15_t)0x6802, (q15_t)0xb566, (q15_t)0x67ff, (q15_t)0xb561, (q15_t)0x67fb, (q15_t)0xb55c,
+  (q15_t)0x67f7, (q15_t)0xb557, (q15_t)0x67f4, (q15_t)0xb552, (q15_t)0x67f0, (q15_t)0xb54c, (q15_t)0x67ec, (q15_t)0xb547,
+  (q15_t)0x67e9, (q15_t)0xb542, (q15_t)0x67e5, (q15_t)0xb53d, (q15_t)0x67e1, (q15_t)0xb538, (q15_t)0x67de, (q15_t)0xb533,
+  (q15_t)0x67da, (q15_t)0xb52e, (q15_t)0x67d6, (q15_t)0xb529, (q15_t)0x67d3, (q15_t)0xb524, (q15_t)0x67cf, (q15_t)0xb51f,
+  (q15_t)0x67cb, (q15_t)0xb519, (q15_t)0x67c8, (q15_t)0xb514, (q15_t)0x67c4, (q15_t)0xb50f, (q15_t)0x67c0, (q15_t)0xb50a,
+  (q15_t)0x67bd, (q15_t)0xb505, (q15_t)0x67b9, (q15_t)0xb500, (q15_t)0x67b5, (q15_t)0xb4fb, (q15_t)0x67b2, (q15_t)0xb4f6,
+  (q15_t)0x67ae, (q15_t)0xb4f1, (q15_t)0x67aa, (q15_t)0xb4ec, (q15_t)0x67a6, (q15_t)0xb4e7, (q15_t)0x67a3, (q15_t)0xb4e1,
+  (q15_t)0x679f, (q15_t)0xb4dc, (q15_t)0x679b, (q15_t)0xb4d7, (q15_t)0x6798, (q15_t)0xb4d2, (q15_t)0x6794, (q15_t)0xb4cd,
+  (q15_t)0x6790, (q15_t)0xb4c8, (q15_t)0x678d, (q15_t)0xb4c3, (q15_t)0x6789, (q15_t)0xb4be, (q15_t)0x6785, (q15_t)0xb4b9,
+  (q15_t)0x6782, (q15_t)0xb4b4, (q15_t)0x677e, (q15_t)0xb4af, (q15_t)0x677a, (q15_t)0xb4aa, (q15_t)0x6776, (q15_t)0xb4a4,
+  (q15_t)0x6773, (q15_t)0xb49f, (q15_t)0x676f, (q15_t)0xb49a, (q15_t)0x676b, (q15_t)0xb495, (q15_t)0x6768, (q15_t)0xb490,
+  (q15_t)0x6764, (q15_t)0xb48b, (q15_t)0x6760, (q15_t)0xb486, (q15_t)0x675d, (q15_t)0xb481, (q15_t)0x6759, (q15_t)0xb47c,
+  (q15_t)0x6755, (q15_t)0xb477, (q15_t)0x6751, (q15_t)0xb472, (q15_t)0x674e, (q15_t)0xb46d, (q15_t)0x674a, (q15_t)0xb468,
+  (q15_t)0x6746, (q15_t)0xb462, (q15_t)0x6743, (q15_t)0xb45d, (q15_t)0x673f, (q15_t)0xb458, (q15_t)0x673b, (q15_t)0xb453,
+  (q15_t)0x6737, (q15_t)0xb44e, (q15_t)0x6734, (q15_t)0xb449, (q15_t)0x6730, (q15_t)0xb444, (q15_t)0x672c, (q15_t)0xb43f,
+  (q15_t)0x6729, (q15_t)0xb43a, (q15_t)0x6725, (q15_t)0xb435, (q15_t)0x6721, (q15_t)0xb430, (q15_t)0x671d, (q15_t)0xb42b,
+  (q15_t)0x671a, (q15_t)0xb426, (q15_t)0x6716, (q15_t)0xb421, (q15_t)0x6712, (q15_t)0xb41c, (q15_t)0x670e, (q15_t)0xb417,
+  (q15_t)0x670b, (q15_t)0xb411, (q15_t)0x6707, (q15_t)0xb40c, (q15_t)0x6703, (q15_t)0xb407, (q15_t)0x6700, (q15_t)0xb402,
+  (q15_t)0x66fc, (q15_t)0xb3fd, (q15_t)0x66f8, (q15_t)0xb3f8, (q15_t)0x66f4, (q15_t)0xb3f3, (q15_t)0x66f1, (q15_t)0xb3ee,
+  (q15_t)0x66ed, (q15_t)0xb3e9, (q15_t)0x66e9, (q15_t)0xb3e4, (q15_t)0x66e5, (q15_t)0xb3df, (q15_t)0x66e2, (q15_t)0xb3da,
+  (q15_t)0x66de, (q15_t)0xb3d5, (q15_t)0x66da, (q15_t)0xb3d0, (q15_t)0x66d6, (q15_t)0xb3cb, (q15_t)0x66d3, (q15_t)0xb3c6,
+  (q15_t)0x66cf, (q15_t)0xb3c1, (q15_t)0x66cb, (q15_t)0xb3bc, (q15_t)0x66c8, (q15_t)0xb3b7, (q15_t)0x66c4, (q15_t)0xb3b1,
+  (q15_t)0x66c0, (q15_t)0xb3ac, (q15_t)0x66bc, (q15_t)0xb3a7, (q15_t)0x66b9, (q15_t)0xb3a2, (q15_t)0x66b5, (q15_t)0xb39d,
+  (q15_t)0x66b1, (q15_t)0xb398, (q15_t)0x66ad, (q15_t)0xb393, (q15_t)0x66aa, (q15_t)0xb38e, (q15_t)0x66a6, (q15_t)0xb389,
+  (q15_t)0x66a2, (q15_t)0xb384, (q15_t)0x669e, (q15_t)0xb37f, (q15_t)0x669b, (q15_t)0xb37a, (q15_t)0x6697, (q15_t)0xb375,
+  (q15_t)0x6693, (q15_t)0xb370, (q15_t)0x668f, (q15_t)0xb36b, (q15_t)0x668b, (q15_t)0xb366, (q15_t)0x6688, (q15_t)0xb361,
+  (q15_t)0x6684, (q15_t)0xb35c, (q15_t)0x6680, (q15_t)0xb357, (q15_t)0x667c, (q15_t)0xb352, (q15_t)0x6679, (q15_t)0xb34d,
+  (q15_t)0x6675, (q15_t)0xb348, (q15_t)0x6671, (q15_t)0xb343, (q15_t)0x666d, (q15_t)0xb33e, (q15_t)0x666a, (q15_t)0xb339,
+  (q15_t)0x6666, (q15_t)0xb334, (q15_t)0x6662, (q15_t)0xb32f, (q15_t)0x665e, (q15_t)0xb32a, (q15_t)0x665b, (q15_t)0xb325,
+  (q15_t)0x6657, (q15_t)0xb31f, (q15_t)0x6653, (q15_t)0xb31a, (q15_t)0x664f, (q15_t)0xb315, (q15_t)0x664b, (q15_t)0xb310,
+  (q15_t)0x6648, (q15_t)0xb30b, (q15_t)0x6644, (q15_t)0xb306, (q15_t)0x6640, (q15_t)0xb301, (q15_t)0x663c, (q15_t)0xb2fc,
+  (q15_t)0x6639, (q15_t)0xb2f7, (q15_t)0x6635, (q15_t)0xb2f2, (q15_t)0x6631, (q15_t)0xb2ed, (q15_t)0x662d, (q15_t)0xb2e8,
+  (q15_t)0x6629, (q15_t)0xb2e3, (q15_t)0x6626, (q15_t)0xb2de, (q15_t)0x6622, (q15_t)0xb2d9, (q15_t)0x661e, (q15_t)0xb2d4,
+  (q15_t)0x661a, (q15_t)0xb2cf, (q15_t)0x6616, (q15_t)0xb2ca, (q15_t)0x6613, (q15_t)0xb2c5, (q15_t)0x660f, (q15_t)0xb2c0,
+  (q15_t)0x660b, (q15_t)0xb2bb, (q15_t)0x6607, (q15_t)0xb2b6, (q15_t)0x6603, (q15_t)0xb2b1, (q15_t)0x6600, (q15_t)0xb2ac,
+  (q15_t)0x65fc, (q15_t)0xb2a7, (q15_t)0x65f8, (q15_t)0xb2a2, (q15_t)0x65f4, (q15_t)0xb29d, (q15_t)0x65f0, (q15_t)0xb298,
+  (q15_t)0x65ed, (q15_t)0xb293, (q15_t)0x65e9, (q15_t)0xb28e, (q15_t)0x65e5, (q15_t)0xb289, (q15_t)0x65e1, (q15_t)0xb284,
+  (q15_t)0x65dd, (q15_t)0xb27f, (q15_t)0x65da, (q15_t)0xb27a, (q15_t)0x65d6, (q15_t)0xb275, (q15_t)0x65d2, (q15_t)0xb270,
+  (q15_t)0x65ce, (q15_t)0xb26b, (q15_t)0x65ca, (q15_t)0xb266, (q15_t)0x65c7, (q15_t)0xb261, (q15_t)0x65c3, (q15_t)0xb25c,
+  (q15_t)0x65bf, (q15_t)0xb257, (q15_t)0x65bb, (q15_t)0xb252, (q15_t)0x65b7, (q15_t)0xb24d, (q15_t)0x65b4, (q15_t)0xb248,
+  (q15_t)0x65b0, (q15_t)0xb243, (q15_t)0x65ac, (q15_t)0xb23e, (q15_t)0x65a8, (q15_t)0xb239, (q15_t)0x65a4, (q15_t)0xb234,
+  (q15_t)0x65a0, (q15_t)0xb22f, (q15_t)0x659d, (q15_t)0xb22a, (q15_t)0x6599, (q15_t)0xb225, (q15_t)0x6595, (q15_t)0xb220,
+  (q15_t)0x6591, (q15_t)0xb21b, (q15_t)0x658d, (q15_t)0xb216, (q15_t)0x658a, (q15_t)0xb211, (q15_t)0x6586, (q15_t)0xb20c,
+  (q15_t)0x6582, (q15_t)0xb207, (q15_t)0x657e, (q15_t)0xb202, (q15_t)0x657a, (q15_t)0xb1fd, (q15_t)0x6576, (q15_t)0xb1f8,
+  (q15_t)0x6573, (q15_t)0xb1f3, (q15_t)0x656f, (q15_t)0xb1ee, (q15_t)0x656b, (q15_t)0xb1e9, (q15_t)0x6567, (q15_t)0xb1e4,
+  (q15_t)0x6563, (q15_t)0xb1df, (q15_t)0x655f, (q15_t)0xb1da, (q15_t)0x655c, (q15_t)0xb1d6, (q15_t)0x6558, (q15_t)0xb1d1,
+  (q15_t)0x6554, (q15_t)0xb1cc, (q15_t)0x6550, (q15_t)0xb1c7, (q15_t)0x654c, (q15_t)0xb1c2, (q15_t)0x6548, (q15_t)0xb1bd,
+  (q15_t)0x6545, (q15_t)0xb1b8, (q15_t)0x6541, (q15_t)0xb1b3, (q15_t)0x653d, (q15_t)0xb1ae, (q15_t)0x6539, (q15_t)0xb1a9,
+  (q15_t)0x6535, (q15_t)0xb1a4, (q15_t)0x6531, (q15_t)0xb19f, (q15_t)0x652d, (q15_t)0xb19a, (q15_t)0x652a, (q15_t)0xb195,
+  (q15_t)0x6526, (q15_t)0xb190, (q15_t)0x6522, (q15_t)0xb18b, (q15_t)0x651e, (q15_t)0xb186, (q15_t)0x651a, (q15_t)0xb181,
+  (q15_t)0x6516, (q15_t)0xb17c, (q15_t)0x6513, (q15_t)0xb177, (q15_t)0x650f, (q15_t)0xb172, (q15_t)0x650b, (q15_t)0xb16d,
+  (q15_t)0x6507, (q15_t)0xb168, (q15_t)0x6503, (q15_t)0xb163, (q15_t)0x64ff, (q15_t)0xb15e, (q15_t)0x64fb, (q15_t)0xb159,
+  (q15_t)0x64f7, (q15_t)0xb154, (q15_t)0x64f4, (q15_t)0xb14f, (q15_t)0x64f0, (q15_t)0xb14a, (q15_t)0x64ec, (q15_t)0xb146,
+  (q15_t)0x64e8, (q15_t)0xb141, (q15_t)0x64e4, (q15_t)0xb13c, (q15_t)0x64e0, (q15_t)0xb137, (q15_t)0x64dc, (q15_t)0xb132,
+  (q15_t)0x64d9, (q15_t)0xb12d, (q15_t)0x64d5, (q15_t)0xb128, (q15_t)0x64d1, (q15_t)0xb123, (q15_t)0x64cd, (q15_t)0xb11e,
+  (q15_t)0x64c9, (q15_t)0xb119, (q15_t)0x64c5, (q15_t)0xb114, (q15_t)0x64c1, (q15_t)0xb10f, (q15_t)0x64bd, (q15_t)0xb10a,
+  (q15_t)0x64ba, (q15_t)0xb105, (q15_t)0x64b6, (q15_t)0xb100, (q15_t)0x64b2, (q15_t)0xb0fb, (q15_t)0x64ae, (q15_t)0xb0f6,
+  (q15_t)0x64aa, (q15_t)0xb0f1, (q15_t)0x64a6, (q15_t)0xb0ec, (q15_t)0x64a2, (q15_t)0xb0e8, (q15_t)0x649e, (q15_t)0xb0e3,
+  (q15_t)0x649b, (q15_t)0xb0de, (q15_t)0x6497, (q15_t)0xb0d9, (q15_t)0x6493, (q15_t)0xb0d4, (q15_t)0x648f, (q15_t)0xb0cf,
+  (q15_t)0x648b, (q15_t)0xb0ca, (q15_t)0x6487, (q15_t)0xb0c5, (q15_t)0x6483, (q15_t)0xb0c0, (q15_t)0x647f, (q15_t)0xb0bb,
+  (q15_t)0x647b, (q15_t)0xb0b6, (q15_t)0x6478, (q15_t)0xb0b1, (q15_t)0x6474, (q15_t)0xb0ac, (q15_t)0x6470, (q15_t)0xb0a7,
+  (q15_t)0x646c, (q15_t)0xb0a2, (q15_t)0x6468, (q15_t)0xb09e, (q15_t)0x6464, (q15_t)0xb099, (q15_t)0x6460, (q15_t)0xb094,
+  (q15_t)0x645c, (q15_t)0xb08f, (q15_t)0x6458, (q15_t)0xb08a, (q15_t)0x6454, (q15_t)0xb085, (q15_t)0x6451, (q15_t)0xb080,
+  (q15_t)0x644d, (q15_t)0xb07b, (q15_t)0x6449, (q15_t)0xb076, (q15_t)0x6445, (q15_t)0xb071, (q15_t)0x6441, (q15_t)0xb06c,
+  (q15_t)0x643d, (q15_t)0xb067, (q15_t)0x6439, (q15_t)0xb062, (q15_t)0x6435, (q15_t)0xb05e, (q15_t)0x6431, (q15_t)0xb059,
+  (q15_t)0x642d, (q15_t)0xb054, (q15_t)0x6429, (q15_t)0xb04f, (q15_t)0x6426, (q15_t)0xb04a, (q15_t)0x6422, (q15_t)0xb045,
+  (q15_t)0x641e, (q15_t)0xb040, (q15_t)0x641a, (q15_t)0xb03b, (q15_t)0x6416, (q15_t)0xb036, (q15_t)0x6412, (q15_t)0xb031,
+  (q15_t)0x640e, (q15_t)0xb02c, (q15_t)0x640a, (q15_t)0xb027, (q15_t)0x6406, (q15_t)0xb023, (q15_t)0x6402, (q15_t)0xb01e,
+  (q15_t)0x63fe, (q15_t)0xb019, (q15_t)0x63fa, (q15_t)0xb014, (q15_t)0x63f7, (q15_t)0xb00f, (q15_t)0x63f3, (q15_t)0xb00a,
+  (q15_t)0x63ef, (q15_t)0xb005, (q15_t)0x63eb, (q15_t)0xb000, (q15_t)0x63e7, (q15_t)0xaffb, (q15_t)0x63e3, (q15_t)0xaff6,
+  (q15_t)0x63df, (q15_t)0xaff1, (q15_t)0x63db, (q15_t)0xafed, (q15_t)0x63d7, (q15_t)0xafe8, (q15_t)0x63d3, (q15_t)0xafe3,
+  (q15_t)0x63cf, (q15_t)0xafde, (q15_t)0x63cb, (q15_t)0xafd9, (q15_t)0x63c7, (q15_t)0xafd4, (q15_t)0x63c3, (q15_t)0xafcf,
+  (q15_t)0x63c0, (q15_t)0xafca, (q15_t)0x63bc, (q15_t)0xafc5, (q15_t)0x63b8, (q15_t)0xafc1, (q15_t)0x63b4, (q15_t)0xafbc,
+  (q15_t)0x63b0, (q15_t)0xafb7, (q15_t)0x63ac, (q15_t)0xafb2, (q15_t)0x63a8, (q15_t)0xafad, (q15_t)0x63a4, (q15_t)0xafa8,
+  (q15_t)0x63a0, (q15_t)0xafa3, (q15_t)0x639c, (q15_t)0xaf9e, (q15_t)0x6398, (q15_t)0xaf99, (q15_t)0x6394, (q15_t)0xaf94,
+  (q15_t)0x6390, (q15_t)0xaf90, (q15_t)0x638c, (q15_t)0xaf8b, (q15_t)0x6388, (q15_t)0xaf86, (q15_t)0x6384, (q15_t)0xaf81,
+  (q15_t)0x6380, (q15_t)0xaf7c, (q15_t)0x637c, (q15_t)0xaf77, (q15_t)0x6378, (q15_t)0xaf72, (q15_t)0x6375, (q15_t)0xaf6d,
+  (q15_t)0x6371, (q15_t)0xaf69, (q15_t)0x636d, (q15_t)0xaf64, (q15_t)0x6369, (q15_t)0xaf5f, (q15_t)0x6365, (q15_t)0xaf5a,
+  (q15_t)0x6361, (q15_t)0xaf55, (q15_t)0x635d, (q15_t)0xaf50, (q15_t)0x6359, (q15_t)0xaf4b, (q15_t)0x6355, (q15_t)0xaf46,
+  (q15_t)0x6351, (q15_t)0xaf41, (q15_t)0x634d, (q15_t)0xaf3d, (q15_t)0x6349, (q15_t)0xaf38, (q15_t)0x6345, (q15_t)0xaf33,
+  (q15_t)0x6341, (q15_t)0xaf2e, (q15_t)0x633d, (q15_t)0xaf29, (q15_t)0x6339, (q15_t)0xaf24, (q15_t)0x6335, (q15_t)0xaf1f,
+  (q15_t)0x6331, (q15_t)0xaf1b, (q15_t)0x632d, (q15_t)0xaf16, (q15_t)0x6329, (q15_t)0xaf11, (q15_t)0x6325, (q15_t)0xaf0c,
+  (q15_t)0x6321, (q15_t)0xaf07, (q15_t)0x631d, (q15_t)0xaf02, (q15_t)0x6319, (q15_t)0xaefd, (q15_t)0x6315, (q15_t)0xaef8,
+  (q15_t)0x6311, (q15_t)0xaef4, (q15_t)0x630d, (q15_t)0xaeef, (q15_t)0x6309, (q15_t)0xaeea, (q15_t)0x6305, (q15_t)0xaee5,
+  (q15_t)0x6301, (q15_t)0xaee0, (q15_t)0x62fd, (q15_t)0xaedb, (q15_t)0x62f9, (q15_t)0xaed6, (q15_t)0x62f5, (q15_t)0xaed2,
+  (q15_t)0x62f2, (q15_t)0xaecd, (q15_t)0x62ee, (q15_t)0xaec8, (q15_t)0x62ea, (q15_t)0xaec3, (q15_t)0x62e6, (q15_t)0xaebe,
+  (q15_t)0x62e2, (q15_t)0xaeb9, (q15_t)0x62de, (q15_t)0xaeb4, (q15_t)0x62da, (q15_t)0xaeb0, (q15_t)0x62d6, (q15_t)0xaeab,
+  (q15_t)0x62d2, (q15_t)0xaea6, (q15_t)0x62ce, (q15_t)0xaea1, (q15_t)0x62ca, (q15_t)0xae9c, (q15_t)0x62c6, (q15_t)0xae97,
+  (q15_t)0x62c2, (q15_t)0xae92, (q15_t)0x62be, (q15_t)0xae8e, (q15_t)0x62ba, (q15_t)0xae89, (q15_t)0x62b6, (q15_t)0xae84,
+  (q15_t)0x62b2, (q15_t)0xae7f, (q15_t)0x62ae, (q15_t)0xae7a, (q15_t)0x62aa, (q15_t)0xae75, (q15_t)0x62a6, (q15_t)0xae71,
+  (q15_t)0x62a2, (q15_t)0xae6c, (q15_t)0x629e, (q15_t)0xae67, (q15_t)0x629a, (q15_t)0xae62, (q15_t)0x6296, (q15_t)0xae5d,
+  (q15_t)0x6292, (q15_t)0xae58, (q15_t)0x628e, (q15_t)0xae54, (q15_t)0x628a, (q15_t)0xae4f, (q15_t)0x6286, (q15_t)0xae4a,
+  (q15_t)0x6282, (q15_t)0xae45, (q15_t)0x627e, (q15_t)0xae40, (q15_t)0x627a, (q15_t)0xae3b, (q15_t)0x6275, (q15_t)0xae37,
+  (q15_t)0x6271, (q15_t)0xae32, (q15_t)0x626d, (q15_t)0xae2d, (q15_t)0x6269, (q15_t)0xae28, (q15_t)0x6265, (q15_t)0xae23,
+  (q15_t)0x6261, (q15_t)0xae1e, (q15_t)0x625d, (q15_t)0xae1a, (q15_t)0x6259, (q15_t)0xae15, (q15_t)0x6255, (q15_t)0xae10,
+  (q15_t)0x6251, (q15_t)0xae0b, (q15_t)0x624d, (q15_t)0xae06, (q15_t)0x6249, (q15_t)0xae01, (q15_t)0x6245, (q15_t)0xadfd,
+  (q15_t)0x6241, (q15_t)0xadf8, (q15_t)0x623d, (q15_t)0xadf3, (q15_t)0x6239, (q15_t)0xadee, (q15_t)0x6235, (q15_t)0xade9,
+  (q15_t)0x6231, (q15_t)0xade4, (q15_t)0x622d, (q15_t)0xade0, (q15_t)0x6229, (q15_t)0xaddb, (q15_t)0x6225, (q15_t)0xadd6,
+  (q15_t)0x6221, (q15_t)0xadd1, (q15_t)0x621d, (q15_t)0xadcc, (q15_t)0x6219, (q15_t)0xadc8, (q15_t)0x6215, (q15_t)0xadc3,
+  (q15_t)0x6211, (q15_t)0xadbe, (q15_t)0x620d, (q15_t)0xadb9, (q15_t)0x6209, (q15_t)0xadb4, (q15_t)0x6205, (q15_t)0xadaf,
+  (q15_t)0x6201, (q15_t)0xadab, (q15_t)0x61fd, (q15_t)0xada6, (q15_t)0x61f9, (q15_t)0xada1, (q15_t)0x61f5, (q15_t)0xad9c,
+  (q15_t)0x61f1, (q15_t)0xad97, (q15_t)0x61ec, (q15_t)0xad93, (q15_t)0x61e8, (q15_t)0xad8e, (q15_t)0x61e4, (q15_t)0xad89,
+  (q15_t)0x61e0, (q15_t)0xad84, (q15_t)0x61dc, (q15_t)0xad7f, (q15_t)0x61d8, (q15_t)0xad7b, (q15_t)0x61d4, (q15_t)0xad76,
+  (q15_t)0x61d0, (q15_t)0xad71, (q15_t)0x61cc, (q15_t)0xad6c, (q15_t)0x61c8, (q15_t)0xad67, (q15_t)0x61c4, (q15_t)0xad63,
+  (q15_t)0x61c0, (q15_t)0xad5e, (q15_t)0x61bc, (q15_t)0xad59, (q15_t)0x61b8, (q15_t)0xad54, (q15_t)0x61b4, (q15_t)0xad4f,
+  (q15_t)0x61b0, (q15_t)0xad4b, (q15_t)0x61ac, (q15_t)0xad46, (q15_t)0x61a8, (q15_t)0xad41, (q15_t)0x61a3, (q15_t)0xad3c,
+  (q15_t)0x619f, (q15_t)0xad37, (q15_t)0x619b, (q15_t)0xad33, (q15_t)0x6197, (q15_t)0xad2e, (q15_t)0x6193, (q15_t)0xad29,
+  (q15_t)0x618f, (q15_t)0xad24, (q15_t)0x618b, (q15_t)0xad1f, (q15_t)0x6187, (q15_t)0xad1b, (q15_t)0x6183, (q15_t)0xad16,
+  (q15_t)0x617f, (q15_t)0xad11, (q15_t)0x617b, (q15_t)0xad0c, (q15_t)0x6177, (q15_t)0xad08, (q15_t)0x6173, (q15_t)0xad03,
+  (q15_t)0x616f, (q15_t)0xacfe, (q15_t)0x616b, (q15_t)0xacf9, (q15_t)0x6166, (q15_t)0xacf4, (q15_t)0x6162, (q15_t)0xacf0,
+  (q15_t)0x615e, (q15_t)0xaceb, (q15_t)0x615a, (q15_t)0xace6, (q15_t)0x6156, (q15_t)0xace1, (q15_t)0x6152, (q15_t)0xacdd,
+  (q15_t)0x614e, (q15_t)0xacd8, (q15_t)0x614a, (q15_t)0xacd3, (q15_t)0x6146, (q15_t)0xacce, (q15_t)0x6142, (q15_t)0xacc9,
+  (q15_t)0x613e, (q15_t)0xacc5, (q15_t)0x613a, (q15_t)0xacc0, (q15_t)0x6135, (q15_t)0xacbb, (q15_t)0x6131, (q15_t)0xacb6,
+  (q15_t)0x612d, (q15_t)0xacb2, (q15_t)0x6129, (q15_t)0xacad, (q15_t)0x6125, (q15_t)0xaca8, (q15_t)0x6121, (q15_t)0xaca3,
+  (q15_t)0x611d, (q15_t)0xac9e, (q15_t)0x6119, (q15_t)0xac9a, (q15_t)0x6115, (q15_t)0xac95, (q15_t)0x6111, (q15_t)0xac90,
+  (q15_t)0x610d, (q15_t)0xac8b, (q15_t)0x6108, (q15_t)0xac87, (q15_t)0x6104, (q15_t)0xac82, (q15_t)0x6100, (q15_t)0xac7d,
+  (q15_t)0x60fc, (q15_t)0xac78, (q15_t)0x60f8, (q15_t)0xac74, (q15_t)0x60f4, (q15_t)0xac6f, (q15_t)0x60f0, (q15_t)0xac6a,
+  (q15_t)0x60ec, (q15_t)0xac65, (q15_t)0x60e8, (q15_t)0xac61, (q15_t)0x60e4, (q15_t)0xac5c, (q15_t)0x60df, (q15_t)0xac57,
+  (q15_t)0x60db, (q15_t)0xac52, (q15_t)0x60d7, (q15_t)0xac4e, (q15_t)0x60d3, (q15_t)0xac49, (q15_t)0x60cf, (q15_t)0xac44,
+  (q15_t)0x60cb, (q15_t)0xac3f, (q15_t)0x60c7, (q15_t)0xac3b, (q15_t)0x60c3, (q15_t)0xac36, (q15_t)0x60bf, (q15_t)0xac31,
+  (q15_t)0x60ba, (q15_t)0xac2c, (q15_t)0x60b6, (q15_t)0xac28, (q15_t)0x60b2, (q15_t)0xac23, (q15_t)0x60ae, (q15_t)0xac1e,
+  (q15_t)0x60aa, (q15_t)0xac19, (q15_t)0x60a6, (q15_t)0xac15, (q15_t)0x60a2, (q15_t)0xac10, (q15_t)0x609e, (q15_t)0xac0b,
+  (q15_t)0x6099, (q15_t)0xac06, (q15_t)0x6095, (q15_t)0xac02, (q15_t)0x6091, (q15_t)0xabfd, (q15_t)0x608d, (q15_t)0xabf8,
+  (q15_t)0x6089, (q15_t)0xabf3, (q15_t)0x6085, (q15_t)0xabef, (q15_t)0x6081, (q15_t)0xabea, (q15_t)0x607d, (q15_t)0xabe5,
+  (q15_t)0x6078, (q15_t)0xabe0, (q15_t)0x6074, (q15_t)0xabdc, (q15_t)0x6070, (q15_t)0xabd7, (q15_t)0x606c, (q15_t)0xabd2,
+  (q15_t)0x6068, (q15_t)0xabcd, (q15_t)0x6064, (q15_t)0xabc9, (q15_t)0x6060, (q15_t)0xabc4, (q15_t)0x605c, (q15_t)0xabbf,
+  (q15_t)0x6057, (q15_t)0xabbb, (q15_t)0x6053, (q15_t)0xabb6, (q15_t)0x604f, (q15_t)0xabb1, (q15_t)0x604b, (q15_t)0xabac,
+  (q15_t)0x6047, (q15_t)0xaba8, (q15_t)0x6043, (q15_t)0xaba3, (q15_t)0x603f, (q15_t)0xab9e, (q15_t)0x603a, (q15_t)0xab99,
+  (q15_t)0x6036, (q15_t)0xab95, (q15_t)0x6032, (q15_t)0xab90, (q15_t)0x602e, (q15_t)0xab8b, (q15_t)0x602a, (q15_t)0xab87,
+  (q15_t)0x6026, (q15_t)0xab82, (q15_t)0x6022, (q15_t)0xab7d, (q15_t)0x601d, (q15_t)0xab78, (q15_t)0x6019, (q15_t)0xab74,
+  (q15_t)0x6015, (q15_t)0xab6f, (q15_t)0x6011, (q15_t)0xab6a, (q15_t)0x600d, (q15_t)0xab66, (q15_t)0x6009, (q15_t)0xab61,
+  (q15_t)0x6004, (q15_t)0xab5c, (q15_t)0x6000, (q15_t)0xab57, (q15_t)0x5ffc, (q15_t)0xab53, (q15_t)0x5ff8, (q15_t)0xab4e,
+  (q15_t)0x5ff4, (q15_t)0xab49, (q15_t)0x5ff0, (q15_t)0xab45, (q15_t)0x5fec, (q15_t)0xab40, (q15_t)0x5fe7, (q15_t)0xab3b,
+  (q15_t)0x5fe3, (q15_t)0xab36, (q15_t)0x5fdf, (q15_t)0xab32, (q15_t)0x5fdb, (q15_t)0xab2d, (q15_t)0x5fd7, (q15_t)0xab28,
+  (q15_t)0x5fd3, (q15_t)0xab24, (q15_t)0x5fce, (q15_t)0xab1f, (q15_t)0x5fca, (q15_t)0xab1a, (q15_t)0x5fc6, (q15_t)0xab16,
+  (q15_t)0x5fc2, (q15_t)0xab11, (q15_t)0x5fbe, (q15_t)0xab0c, (q15_t)0x5fba, (q15_t)0xab07, (q15_t)0x5fb5, (q15_t)0xab03,
+  (q15_t)0x5fb1, (q15_t)0xaafe, (q15_t)0x5fad, (q15_t)0xaaf9, (q15_t)0x5fa9, (q15_t)0xaaf5, (q15_t)0x5fa5, (q15_t)0xaaf0,
+  (q15_t)0x5fa0, (q15_t)0xaaeb, (q15_t)0x5f9c, (q15_t)0xaae7, (q15_t)0x5f98, (q15_t)0xaae2, (q15_t)0x5f94, (q15_t)0xaadd,
+  (q15_t)0x5f90, (q15_t)0xaad8, (q15_t)0x5f8c, (q15_t)0xaad4, (q15_t)0x5f87, (q15_t)0xaacf, (q15_t)0x5f83, (q15_t)0xaaca,
+  (q15_t)0x5f7f, (q15_t)0xaac6, (q15_t)0x5f7b, (q15_t)0xaac1, (q15_t)0x5f77, (q15_t)0xaabc, (q15_t)0x5f72, (q15_t)0xaab8,
+  (q15_t)0x5f6e, (q15_t)0xaab3, (q15_t)0x5f6a, (q15_t)0xaaae, (q15_t)0x5f66, (q15_t)0xaaaa, (q15_t)0x5f62, (q15_t)0xaaa5,
+  (q15_t)0x5f5e, (q15_t)0xaaa0, (q15_t)0x5f59, (q15_t)0xaa9c, (q15_t)0x5f55, (q15_t)0xaa97, (q15_t)0x5f51, (q15_t)0xaa92,
+  (q15_t)0x5f4d, (q15_t)0xaa8e, (q15_t)0x5f49, (q15_t)0xaa89, (q15_t)0x5f44, (q15_t)0xaa84, (q15_t)0x5f40, (q15_t)0xaa7f,
+  (q15_t)0x5f3c, (q15_t)0xaa7b, (q15_t)0x5f38, (q15_t)0xaa76, (q15_t)0x5f34, (q15_t)0xaa71, (q15_t)0x5f2f, (q15_t)0xaa6d,
+  (q15_t)0x5f2b, (q15_t)0xaa68, (q15_t)0x5f27, (q15_t)0xaa63, (q15_t)0x5f23, (q15_t)0xaa5f, (q15_t)0x5f1f, (q15_t)0xaa5a,
+  (q15_t)0x5f1a, (q15_t)0xaa55, (q15_t)0x5f16, (q15_t)0xaa51, (q15_t)0x5f12, (q15_t)0xaa4c, (q15_t)0x5f0e, (q15_t)0xaa47,
+  (q15_t)0x5f0a, (q15_t)0xaa43, (q15_t)0x5f05, (q15_t)0xaa3e, (q15_t)0x5f01, (q15_t)0xaa39, (q15_t)0x5efd, (q15_t)0xaa35,
+  (q15_t)0x5ef9, (q15_t)0xaa30, (q15_t)0x5ef5, (q15_t)0xaa2b, (q15_t)0x5ef0, (q15_t)0xaa27, (q15_t)0x5eec, (q15_t)0xaa22,
+  (q15_t)0x5ee8, (q15_t)0xaa1d, (q15_t)0x5ee4, (q15_t)0xaa19, (q15_t)0x5edf, (q15_t)0xaa14, (q15_t)0x5edb, (q15_t)0xaa10,
+  (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5ed3, (q15_t)0xaa06, (q15_t)0x5ecf, (q15_t)0xaa02, (q15_t)0x5eca, (q15_t)0xa9fd,
+  (q15_t)0x5ec6, (q15_t)0xa9f8, (q15_t)0x5ec2, (q15_t)0xa9f4, (q15_t)0x5ebe, (q15_t)0xa9ef, (q15_t)0x5eb9, (q15_t)0xa9ea,
+  (q15_t)0x5eb5, (q15_t)0xa9e6, (q15_t)0x5eb1, (q15_t)0xa9e1, (q15_t)0x5ead, (q15_t)0xa9dc, (q15_t)0x5ea9, (q15_t)0xa9d8,
+  (q15_t)0x5ea4, (q15_t)0xa9d3, (q15_t)0x5ea0, (q15_t)0xa9ce, (q15_t)0x5e9c, (q15_t)0xa9ca, (q15_t)0x5e98, (q15_t)0xa9c5,
+  (q15_t)0x5e93, (q15_t)0xa9c0, (q15_t)0x5e8f, (q15_t)0xa9bc, (q15_t)0x5e8b, (q15_t)0xa9b7, (q15_t)0x5e87, (q15_t)0xa9b3,
+  (q15_t)0x5e82, (q15_t)0xa9ae, (q15_t)0x5e7e, (q15_t)0xa9a9, (q15_t)0x5e7a, (q15_t)0xa9a5, (q15_t)0x5e76, (q15_t)0xa9a0,
+  (q15_t)0x5e71, (q15_t)0xa99b, (q15_t)0x5e6d, (q15_t)0xa997, (q15_t)0x5e69, (q15_t)0xa992, (q15_t)0x5e65, (q15_t)0xa98d,
+  (q15_t)0x5e60, (q15_t)0xa989, (q15_t)0x5e5c, (q15_t)0xa984, (q15_t)0x5e58, (q15_t)0xa980, (q15_t)0x5e54, (q15_t)0xa97b,
+  (q15_t)0x5e50, (q15_t)0xa976, (q15_t)0x5e4b, (q15_t)0xa972, (q15_t)0x5e47, (q15_t)0xa96d, (q15_t)0x5e43, (q15_t)0xa968,
+  (q15_t)0x5e3f, (q15_t)0xa964, (q15_t)0x5e3a, (q15_t)0xa95f, (q15_t)0x5e36, (q15_t)0xa95b, (q15_t)0x5e32, (q15_t)0xa956,
+  (q15_t)0x5e2d, (q15_t)0xa951, (q15_t)0x5e29, (q15_t)0xa94d, (q15_t)0x5e25, (q15_t)0xa948, (q15_t)0x5e21, (q15_t)0xa943,
+  (q15_t)0x5e1c, (q15_t)0xa93f, (q15_t)0x5e18, (q15_t)0xa93a, (q15_t)0x5e14, (q15_t)0xa936, (q15_t)0x5e10, (q15_t)0xa931,
+  (q15_t)0x5e0b, (q15_t)0xa92c, (q15_t)0x5e07, (q15_t)0xa928, (q15_t)0x5e03, (q15_t)0xa923, (q15_t)0x5dff, (q15_t)0xa91e,
+  (q15_t)0x5dfa, (q15_t)0xa91a, (q15_t)0x5df6, (q15_t)0xa915, (q15_t)0x5df2, (q15_t)0xa911, (q15_t)0x5dee, (q15_t)0xa90c,
+  (q15_t)0x5de9, (q15_t)0xa907, (q15_t)0x5de5, (q15_t)0xa903, (q15_t)0x5de1, (q15_t)0xa8fe, (q15_t)0x5ddc, (q15_t)0xa8fa,
+  (q15_t)0x5dd8, (q15_t)0xa8f5, (q15_t)0x5dd4, (q15_t)0xa8f0, (q15_t)0x5dd0, (q15_t)0xa8ec, (q15_t)0x5dcb, (q15_t)0xa8e7,
+  (q15_t)0x5dc7, (q15_t)0xa8e3, (q15_t)0x5dc3, (q15_t)0xa8de, (q15_t)0x5dbf, (q15_t)0xa8d9, (q15_t)0x5dba, (q15_t)0xa8d5,
+  (q15_t)0x5db6, (q15_t)0xa8d0, (q15_t)0x5db2, (q15_t)0xa8cc, (q15_t)0x5dad, (q15_t)0xa8c7, (q15_t)0x5da9, (q15_t)0xa8c2,
+  (q15_t)0x5da5, (q15_t)0xa8be, (q15_t)0x5da1, (q15_t)0xa8b9, (q15_t)0x5d9c, (q15_t)0xa8b5, (q15_t)0x5d98, (q15_t)0xa8b0,
+  (q15_t)0x5d94, (q15_t)0xa8ab, (q15_t)0x5d8f, (q15_t)0xa8a7, (q15_t)0x5d8b, (q15_t)0xa8a2, (q15_t)0x5d87, (q15_t)0xa89e,
+  (q15_t)0x5d83, (q15_t)0xa899, (q15_t)0x5d7e, (q15_t)0xa894, (q15_t)0x5d7a, (q15_t)0xa890, (q15_t)0x5d76, (q15_t)0xa88b,
+  (q15_t)0x5d71, (q15_t)0xa887, (q15_t)0x5d6d, (q15_t)0xa882, (q15_t)0x5d69, (q15_t)0xa87d, (q15_t)0x5d65, (q15_t)0xa879,
+  (q15_t)0x5d60, (q15_t)0xa874, (q15_t)0x5d5c, (q15_t)0xa870, (q15_t)0x5d58, (q15_t)0xa86b, (q15_t)0x5d53, (q15_t)0xa867,
+  (q15_t)0x5d4f, (q15_t)0xa862, (q15_t)0x5d4b, (q15_t)0xa85d, (q15_t)0x5d46, (q15_t)0xa859, (q15_t)0x5d42, (q15_t)0xa854,
+  (q15_t)0x5d3e, (q15_t)0xa850, (q15_t)0x5d3a, (q15_t)0xa84b, (q15_t)0x5d35, (q15_t)0xa847, (q15_t)0x5d31, (q15_t)0xa842,
+  (q15_t)0x5d2d, (q15_t)0xa83d, (q15_t)0x5d28, (q15_t)0xa839, (q15_t)0x5d24, (q15_t)0xa834, (q15_t)0x5d20, (q15_t)0xa830,
+  (q15_t)0x5d1b, (q15_t)0xa82b, (q15_t)0x5d17, (q15_t)0xa827, (q15_t)0x5d13, (q15_t)0xa822, (q15_t)0x5d0e, (q15_t)0xa81d,
+  (q15_t)0x5d0a, (q15_t)0xa819, (q15_t)0x5d06, (q15_t)0xa814, (q15_t)0x5d01, (q15_t)0xa810, (q15_t)0x5cfd, (q15_t)0xa80b,
+  (q15_t)0x5cf9, (q15_t)0xa807, (q15_t)0x5cf5, (q15_t)0xa802, (q15_t)0x5cf0, (q15_t)0xa7fd, (q15_t)0x5cec, (q15_t)0xa7f9,
+  (q15_t)0x5ce8, (q15_t)0xa7f4, (q15_t)0x5ce3, (q15_t)0xa7f0, (q15_t)0x5cdf, (q15_t)0xa7eb, (q15_t)0x5cdb, (q15_t)0xa7e7,
+  (q15_t)0x5cd6, (q15_t)0xa7e2, (q15_t)0x5cd2, (q15_t)0xa7de, (q15_t)0x5cce, (q15_t)0xa7d9, (q15_t)0x5cc9, (q15_t)0xa7d4,
+  (q15_t)0x5cc5, (q15_t)0xa7d0, (q15_t)0x5cc1, (q15_t)0xa7cb, (q15_t)0x5cbc, (q15_t)0xa7c7, (q15_t)0x5cb8, (q15_t)0xa7c2,
+  (q15_t)0x5cb4, (q15_t)0xa7be, (q15_t)0x5caf, (q15_t)0xa7b9, (q15_t)0x5cab, (q15_t)0xa7b5, (q15_t)0x5ca7, (q15_t)0xa7b0,
+  (q15_t)0x5ca2, (q15_t)0xa7ab, (q15_t)0x5c9e, (q15_t)0xa7a7, (q15_t)0x5c9a, (q15_t)0xa7a2, (q15_t)0x5c95, (q15_t)0xa79e,
+  (q15_t)0x5c91, (q15_t)0xa799, (q15_t)0x5c8d, (q15_t)0xa795, (q15_t)0x5c88, (q15_t)0xa790, (q15_t)0x5c84, (q15_t)0xa78c,
+  (q15_t)0x5c80, (q15_t)0xa787, (q15_t)0x5c7b, (q15_t)0xa783, (q15_t)0x5c77, (q15_t)0xa77e, (q15_t)0x5c73, (q15_t)0xa779,
+  (q15_t)0x5c6e, (q15_t)0xa775, (q15_t)0x5c6a, (q15_t)0xa770, (q15_t)0x5c66, (q15_t)0xa76c, (q15_t)0x5c61, (q15_t)0xa767,
+  (q15_t)0x5c5d, (q15_t)0xa763, (q15_t)0x5c58, (q15_t)0xa75e, (q15_t)0x5c54, (q15_t)0xa75a, (q15_t)0x5c50, (q15_t)0xa755,
+  (q15_t)0x5c4b, (q15_t)0xa751, (q15_t)0x5c47, (q15_t)0xa74c, (q15_t)0x5c43, (q15_t)0xa748, (q15_t)0x5c3e, (q15_t)0xa743,
+  (q15_t)0x5c3a, (q15_t)0xa73f, (q15_t)0x5c36, (q15_t)0xa73a, (q15_t)0x5c31, (q15_t)0xa735, (q15_t)0x5c2d, (q15_t)0xa731,
+  (q15_t)0x5c29, (q15_t)0xa72c, (q15_t)0x5c24, (q15_t)0xa728, (q15_t)0x5c20, (q15_t)0xa723, (q15_t)0x5c1b, (q15_t)0xa71f,
+  (q15_t)0x5c17, (q15_t)0xa71a, (q15_t)0x5c13, (q15_t)0xa716, (q15_t)0x5c0e, (q15_t)0xa711, (q15_t)0x5c0a, (q15_t)0xa70d,
+  (q15_t)0x5c06, (q15_t)0xa708, (q15_t)0x5c01, (q15_t)0xa704, (q15_t)0x5bfd, (q15_t)0xa6ff, (q15_t)0x5bf9, (q15_t)0xa6fb,
+  (q15_t)0x5bf4, (q15_t)0xa6f6, (q15_t)0x5bf0, (q15_t)0xa6f2, (q15_t)0x5beb, (q15_t)0xa6ed, (q15_t)0x5be7, (q15_t)0xa6e9,
+  (q15_t)0x5be3, (q15_t)0xa6e4, (q15_t)0x5bde, (q15_t)0xa6e0, (q15_t)0x5bda, (q15_t)0xa6db, (q15_t)0x5bd6, (q15_t)0xa6d7,
+  (q15_t)0x5bd1, (q15_t)0xa6d2, (q15_t)0x5bcd, (q15_t)0xa6ce, (q15_t)0x5bc8, (q15_t)0xa6c9, (q15_t)0x5bc4, (q15_t)0xa6c5,
+  (q15_t)0x5bc0, (q15_t)0xa6c0, (q15_t)0x5bbb, (q15_t)0xa6bc, (q15_t)0x5bb7, (q15_t)0xa6b7, (q15_t)0x5bb2, (q15_t)0xa6b3,
+  (q15_t)0x5bae, (q15_t)0xa6ae, (q15_t)0x5baa, (q15_t)0xa6aa, (q15_t)0x5ba5, (q15_t)0xa6a5, (q15_t)0x5ba1, (q15_t)0xa6a1,
+  (q15_t)0x5b9d, (q15_t)0xa69c, (q15_t)0x5b98, (q15_t)0xa698, (q15_t)0x5b94, (q15_t)0xa693, (q15_t)0x5b8f, (q15_t)0xa68f,
+  (q15_t)0x5b8b, (q15_t)0xa68a, (q15_t)0x5b87, (q15_t)0xa686, (q15_t)0x5b82, (q15_t)0xa681, (q15_t)0x5b7e, (q15_t)0xa67d,
+  (q15_t)0x5b79, (q15_t)0xa678, (q15_t)0x5b75, (q15_t)0xa674, (q15_t)0x5b71, (q15_t)0xa66f, (q15_t)0x5b6c, (q15_t)0xa66b,
+  (q15_t)0x5b68, (q15_t)0xa666, (q15_t)0x5b63, (q15_t)0xa662, (q15_t)0x5b5f, (q15_t)0xa65d, (q15_t)0x5b5b, (q15_t)0xa659,
+  (q15_t)0x5b56, (q15_t)0xa654, (q15_t)0x5b52, (q15_t)0xa650, (q15_t)0x5b4d, (q15_t)0xa64b, (q15_t)0x5b49, (q15_t)0xa647,
+  (q15_t)0x5b45, (q15_t)0xa642, (q15_t)0x5b40, (q15_t)0xa63e, (q15_t)0x5b3c, (q15_t)0xa639, (q15_t)0x5b37, (q15_t)0xa635,
+  (q15_t)0x5b33, (q15_t)0xa630, (q15_t)0x5b2f, (q15_t)0xa62c, (q15_t)0x5b2a, (q15_t)0xa627, (q15_t)0x5b26, (q15_t)0xa623,
+  (q15_t)0x5b21, (q15_t)0xa61f, (q15_t)0x5b1d, (q15_t)0xa61a, (q15_t)0x5b19, (q15_t)0xa616, (q15_t)0x5b14, (q15_t)0xa611,
+  (q15_t)0x5b10, (q15_t)0xa60d, (q15_t)0x5b0b, (q15_t)0xa608, (q15_t)0x5b07, (q15_t)0xa604, (q15_t)0x5b02, (q15_t)0xa5ff,
+  (q15_t)0x5afe, (q15_t)0xa5fb, (q15_t)0x5afa, (q15_t)0xa5f6, (q15_t)0x5af5, (q15_t)0xa5f2, (q15_t)0x5af1, (q15_t)0xa5ed,
+  (q15_t)0x5aec, (q15_t)0xa5e9, (q15_t)0x5ae8, (q15_t)0xa5e4, (q15_t)0x5ae4, (q15_t)0xa5e0, (q15_t)0x5adf, (q15_t)0xa5dc,
+  (q15_t)0x5adb, (q15_t)0xa5d7, (q15_t)0x5ad6, (q15_t)0xa5d3, (q15_t)0x5ad2, (q15_t)0xa5ce, (q15_t)0x5acd, (q15_t)0xa5ca,
+  (q15_t)0x5ac9, (q15_t)0xa5c5, (q15_t)0x5ac5, (q15_t)0xa5c1, (q15_t)0x5ac0, (q15_t)0xa5bc, (q15_t)0x5abc, (q15_t)0xa5b8,
+  (q15_t)0x5ab7, (q15_t)0xa5b3, (q15_t)0x5ab3, (q15_t)0xa5af, (q15_t)0x5aae, (q15_t)0xa5aa, (q15_t)0x5aaa, (q15_t)0xa5a6,
+  (q15_t)0x5aa5, (q15_t)0xa5a2, (q15_t)0x5aa1, (q15_t)0xa59d, (q15_t)0x5a9d, (q15_t)0xa599, (q15_t)0x5a98, (q15_t)0xa594,
+  (q15_t)0x5a94, (q15_t)0xa590, (q15_t)0x5a8f, (q15_t)0xa58b, (q15_t)0x5a8b, (q15_t)0xa587, (q15_t)0x5a86, (q15_t)0xa582,
+  (q15_t)0x5a82, (q15_t)0xa57e, (q15_t)0x5a7e, (q15_t)0xa57a, (q15_t)0x5a79, (q15_t)0xa575, (q15_t)0x5a75, (q15_t)0xa571,
+  (q15_t)0x5a70, (q15_t)0xa56c, (q15_t)0x5a6c, (q15_t)0xa568, (q15_t)0x5a67, (q15_t)0xa563, (q15_t)0x5a63, (q15_t)0xa55f,
+  (q15_t)0x5a5e, (q15_t)0xa55b, (q15_t)0x5a5a, (q15_t)0xa556, (q15_t)0x5a56, (q15_t)0xa552, (q15_t)0x5a51, (q15_t)0xa54d,
+  (q15_t)0x5a4d, (q15_t)0xa549, (q15_t)0x5a48, (q15_t)0xa544, (q15_t)0x5a44, (q15_t)0xa540, (q15_t)0x5a3f, (q15_t)0xa53b,
+  (q15_t)0x5a3b, (q15_t)0xa537, (q15_t)0x5a36, (q15_t)0xa533, (q15_t)0x5a32, (q15_t)0xa52e, (q15_t)0x5a2d, (q15_t)0xa52a,
+  (q15_t)0x5a29, (q15_t)0xa525, (q15_t)0x5a24, (q15_t)0xa521, (q15_t)0x5a20, (q15_t)0xa51c, (q15_t)0x5a1c, (q15_t)0xa518,
+  (q15_t)0x5a17, (q15_t)0xa514, (q15_t)0x5a13, (q15_t)0xa50f, (q15_t)0x5a0e, (q15_t)0xa50b, (q15_t)0x5a0a, (q15_t)0xa506,
+  (q15_t)0x5a05, (q15_t)0xa502, (q15_t)0x5a01, (q15_t)0xa4fe, (q15_t)0x59fc, (q15_t)0xa4f9, (q15_t)0x59f8, (q15_t)0xa4f5,
+  (q15_t)0x59f3, (q15_t)0xa4f0, (q15_t)0x59ef, (q15_t)0xa4ec, (q15_t)0x59ea, (q15_t)0xa4e7, (q15_t)0x59e6, (q15_t)0xa4e3,
+  (q15_t)0x59e1, (q15_t)0xa4df, (q15_t)0x59dd, (q15_t)0xa4da, (q15_t)0x59d9, (q15_t)0xa4d6, (q15_t)0x59d4, (q15_t)0xa4d1,
+  (q15_t)0x59d0, (q15_t)0xa4cd, (q15_t)0x59cb, (q15_t)0xa4c9, (q15_t)0x59c7, (q15_t)0xa4c4, (q15_t)0x59c2, (q15_t)0xa4c0,
+  (q15_t)0x59be, (q15_t)0xa4bb, (q15_t)0x59b9, (q15_t)0xa4b7, (q15_t)0x59b5, (q15_t)0xa4b3, (q15_t)0x59b0, (q15_t)0xa4ae,
+  (q15_t)0x59ac, (q15_t)0xa4aa, (q15_t)0x59a7, (q15_t)0xa4a5, (q15_t)0x59a3, (q15_t)0xa4a1, (q15_t)0x599e, (q15_t)0xa49d,
+  (q15_t)0x599a, (q15_t)0xa498, (q15_t)0x5995, (q15_t)0xa494, (q15_t)0x5991, (q15_t)0xa48f, (q15_t)0x598c, (q15_t)0xa48b,
+  (q15_t)0x5988, (q15_t)0xa487, (q15_t)0x5983, (q15_t)0xa482, (q15_t)0x597f, (q15_t)0xa47e, (q15_t)0x597a, (q15_t)0xa479,
+  (q15_t)0x5976, (q15_t)0xa475, (q15_t)0x5971, (q15_t)0xa471, (q15_t)0x596d, (q15_t)0xa46c, (q15_t)0x5968, (q15_t)0xa468,
+  (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x595f, (q15_t)0xa45f, (q15_t)0x595b, (q15_t)0xa45b, (q15_t)0x5956, (q15_t)0xa456,
+  (q15_t)0x5952, (q15_t)0xa452, (q15_t)0x594d, (q15_t)0xa44e, (q15_t)0x5949, (q15_t)0xa449, (q15_t)0x5944, (q15_t)0xa445,
+  (q15_t)0x5940, (q15_t)0xa440, (q15_t)0x593b, (q15_t)0xa43c, (q15_t)0x5937, (q15_t)0xa438, (q15_t)0x5932, (q15_t)0xa433,
+  (q15_t)0x592e, (q15_t)0xa42f, (q15_t)0x5929, (q15_t)0xa42a, (q15_t)0x5925, (q15_t)0xa426, (q15_t)0x5920, (q15_t)0xa422,
+  (q15_t)0x591c, (q15_t)0xa41d, (q15_t)0x5917, (q15_t)0xa419, (q15_t)0x5913, (q15_t)0xa415, (q15_t)0x590e, (q15_t)0xa410,
+  (q15_t)0x590a, (q15_t)0xa40c, (q15_t)0x5905, (q15_t)0xa407, (q15_t)0x5901, (q15_t)0xa403, (q15_t)0x58fc, (q15_t)0xa3ff,
+  (q15_t)0x58f8, (q15_t)0xa3fa, (q15_t)0x58f3, (q15_t)0xa3f6, (q15_t)0x58ef, (q15_t)0xa3f2, (q15_t)0x58ea, (q15_t)0xa3ed,
+  (q15_t)0x58e6, (q15_t)0xa3e9, (q15_t)0x58e1, (q15_t)0xa3e5, (q15_t)0x58dd, (q15_t)0xa3e0, (q15_t)0x58d8, (q15_t)0xa3dc,
+  (q15_t)0x58d4, (q15_t)0xa3d7, (q15_t)0x58cf, (q15_t)0xa3d3, (q15_t)0x58cb, (q15_t)0xa3cf, (q15_t)0x58c6, (q15_t)0xa3ca,
+  (q15_t)0x58c1, (q15_t)0xa3c6, (q15_t)0x58bd, (q15_t)0xa3c2, (q15_t)0x58b8, (q15_t)0xa3bd, (q15_t)0x58b4, (q15_t)0xa3b9,
+  (q15_t)0x58af, (q15_t)0xa3b5, (q15_t)0x58ab, (q15_t)0xa3b0, (q15_t)0x58a6, (q15_t)0xa3ac, (q15_t)0x58a2, (q15_t)0xa3a8,
+  (q15_t)0x589d, (q15_t)0xa3a3, (q15_t)0x5899, (q15_t)0xa39f, (q15_t)0x5894, (q15_t)0xa39a, (q15_t)0x5890, (q15_t)0xa396,
+  (q15_t)0x588b, (q15_t)0xa392, (q15_t)0x5887, (q15_t)0xa38d, (q15_t)0x5882, (q15_t)0xa389, (q15_t)0x587d, (q15_t)0xa385,
+  (q15_t)0x5879, (q15_t)0xa380, (q15_t)0x5874, (q15_t)0xa37c, (q15_t)0x5870, (q15_t)0xa378, (q15_t)0x586b, (q15_t)0xa373,
+  (q15_t)0x5867, (q15_t)0xa36f, (q15_t)0x5862, (q15_t)0xa36b, (q15_t)0x585e, (q15_t)0xa366, (q15_t)0x5859, (q15_t)0xa362,
+  (q15_t)0x5855, (q15_t)0xa35e, (q15_t)0x5850, (q15_t)0xa359, (q15_t)0x584b, (q15_t)0xa355, (q15_t)0x5847, (q15_t)0xa351,
+  (q15_t)0x5842, (q15_t)0xa34c, (q15_t)0x583e, (q15_t)0xa348, (q15_t)0x5839, (q15_t)0xa344, (q15_t)0x5835, (q15_t)0xa33f,
+  (q15_t)0x5830, (q15_t)0xa33b, (q15_t)0x582c, (q15_t)0xa337, (q15_t)0x5827, (q15_t)0xa332, (q15_t)0x5822, (q15_t)0xa32e,
+  (q15_t)0x581e, (q15_t)0xa32a, (q15_t)0x5819, (q15_t)0xa325, (q15_t)0x5815, (q15_t)0xa321, (q15_t)0x5810, (q15_t)0xa31d,
+  (q15_t)0x580c, (q15_t)0xa318, (q15_t)0x5807, (q15_t)0xa314, (q15_t)0x5803, (q15_t)0xa310, (q15_t)0x57fe, (q15_t)0xa30b,
+  (q15_t)0x57f9, (q15_t)0xa307, (q15_t)0x57f5, (q15_t)0xa303, (q15_t)0x57f0, (q15_t)0xa2ff, (q15_t)0x57ec, (q15_t)0xa2fa,
+  (q15_t)0x57e7, (q15_t)0xa2f6, (q15_t)0x57e3, (q15_t)0xa2f2, (q15_t)0x57de, (q15_t)0xa2ed, (q15_t)0x57d9, (q15_t)0xa2e9,
+  (q15_t)0x57d5, (q15_t)0xa2e5, (q15_t)0x57d0, (q15_t)0xa2e0, (q15_t)0x57cc, (q15_t)0xa2dc, (q15_t)0x57c7, (q15_t)0xa2d8,
+  (q15_t)0x57c3, (q15_t)0xa2d3, (q15_t)0x57be, (q15_t)0xa2cf, (q15_t)0x57b9, (q15_t)0xa2cb, (q15_t)0x57b5, (q15_t)0xa2c6,
+  (q15_t)0x57b0, (q15_t)0xa2c2, (q15_t)0x57ac, (q15_t)0xa2be, (q15_t)0x57a7, (q15_t)0xa2ba, (q15_t)0x57a3, (q15_t)0xa2b5,
+  (q15_t)0x579e, (q15_t)0xa2b1, (q15_t)0x5799, (q15_t)0xa2ad, (q15_t)0x5795, (q15_t)0xa2a8, (q15_t)0x5790, (q15_t)0xa2a4,
+  (q15_t)0x578c, (q15_t)0xa2a0, (q15_t)0x5787, (q15_t)0xa29b, (q15_t)0x5783, (q15_t)0xa297, (q15_t)0x577e, (q15_t)0xa293,
+  (q15_t)0x5779, (q15_t)0xa28f, (q15_t)0x5775, (q15_t)0xa28a, (q15_t)0x5770, (q15_t)0xa286, (q15_t)0x576c, (q15_t)0xa282,
+  (q15_t)0x5767, (q15_t)0xa27d, (q15_t)0x5762, (q15_t)0xa279, (q15_t)0x575e, (q15_t)0xa275, (q15_t)0x5759, (q15_t)0xa271,
+  (q15_t)0x5755, (q15_t)0xa26c, (q15_t)0x5750, (q15_t)0xa268, (q15_t)0x574b, (q15_t)0xa264, (q15_t)0x5747, (q15_t)0xa25f,
+  (q15_t)0x5742, (q15_t)0xa25b, (q15_t)0x573e, (q15_t)0xa257, (q15_t)0x5739, (q15_t)0xa253, (q15_t)0x5734, (q15_t)0xa24e,
+  (q15_t)0x5730, (q15_t)0xa24a, (q15_t)0x572b, (q15_t)0xa246, (q15_t)0x5727, (q15_t)0xa241, (q15_t)0x5722, (q15_t)0xa23d,
+  (q15_t)0x571d, (q15_t)0xa239, (q15_t)0x5719, (q15_t)0xa235, (q15_t)0x5714, (q15_t)0xa230, (q15_t)0x5710, (q15_t)0xa22c,
+  (q15_t)0x570b, (q15_t)0xa228, (q15_t)0x5706, (q15_t)0xa224, (q15_t)0x5702, (q15_t)0xa21f, (q15_t)0x56fd, (q15_t)0xa21b,
+  (q15_t)0x56f9, (q15_t)0xa217, (q15_t)0x56f4, (q15_t)0xa212, (q15_t)0x56ef, (q15_t)0xa20e, (q15_t)0x56eb, (q15_t)0xa20a,
+  (q15_t)0x56e6, (q15_t)0xa206, (q15_t)0x56e2, (q15_t)0xa201, (q15_t)0x56dd, (q15_t)0xa1fd, (q15_t)0x56d8, (q15_t)0xa1f9,
+  (q15_t)0x56d4, (q15_t)0xa1f5, (q15_t)0x56cf, (q15_t)0xa1f0, (q15_t)0x56ca, (q15_t)0xa1ec, (q15_t)0x56c6, (q15_t)0xa1e8,
+  (q15_t)0x56c1, (q15_t)0xa1e4, (q15_t)0x56bd, (q15_t)0xa1df, (q15_t)0x56b8, (q15_t)0xa1db, (q15_t)0x56b3, (q15_t)0xa1d7,
+  (q15_t)0x56af, (q15_t)0xa1d3, (q15_t)0x56aa, (q15_t)0xa1ce, (q15_t)0x56a5, (q15_t)0xa1ca, (q15_t)0x56a1, (q15_t)0xa1c6,
+  (q15_t)0x569c, (q15_t)0xa1c1, (q15_t)0x5698, (q15_t)0xa1bd, (q15_t)0x5693, (q15_t)0xa1b9, (q15_t)0x568e, (q15_t)0xa1b5,
+  (q15_t)0x568a, (q15_t)0xa1b0, (q15_t)0x5685, (q15_t)0xa1ac, (q15_t)0x5680, (q15_t)0xa1a8, (q15_t)0x567c, (q15_t)0xa1a4,
+  (q15_t)0x5677, (q15_t)0xa1a0, (q15_t)0x5673, (q15_t)0xa19b, (q15_t)0x566e, (q15_t)0xa197, (q15_t)0x5669, (q15_t)0xa193,
+  (q15_t)0x5665, (q15_t)0xa18f, (q15_t)0x5660, (q15_t)0xa18a, (q15_t)0x565b, (q15_t)0xa186, (q15_t)0x5657, (q15_t)0xa182,
+  (q15_t)0x5652, (q15_t)0xa17e, (q15_t)0x564d, (q15_t)0xa179, (q15_t)0x5649, (q15_t)0xa175, (q15_t)0x5644, (q15_t)0xa171,
+  (q15_t)0x5640, (q15_t)0xa16d, (q15_t)0x563b, (q15_t)0xa168, (q15_t)0x5636, (q15_t)0xa164, (q15_t)0x5632, (q15_t)0xa160,
+  (q15_t)0x562d, (q15_t)0xa15c, (q15_t)0x5628, (q15_t)0xa157, (q15_t)0x5624, (q15_t)0xa153, (q15_t)0x561f, (q15_t)0xa14f,
+  (q15_t)0x561a, (q15_t)0xa14b, (q15_t)0x5616, (q15_t)0xa147, (q15_t)0x5611, (q15_t)0xa142, (q15_t)0x560c, (q15_t)0xa13e,
+  (q15_t)0x5608, (q15_t)0xa13a, (q15_t)0x5603, (q15_t)0xa136, (q15_t)0x55fe, (q15_t)0xa131, (q15_t)0x55fa, (q15_t)0xa12d,
+  (q15_t)0x55f5, (q15_t)0xa129, (q15_t)0x55f0, (q15_t)0xa125, (q15_t)0x55ec, (q15_t)0xa121, (q15_t)0x55e7, (q15_t)0xa11c,
+  (q15_t)0x55e3, (q15_t)0xa118, (q15_t)0x55de, (q15_t)0xa114, (q15_t)0x55d9, (q15_t)0xa110, (q15_t)0x55d5, (q15_t)0xa10b,
+  (q15_t)0x55d0, (q15_t)0xa107, (q15_t)0x55cb, (q15_t)0xa103, (q15_t)0x55c7, (q15_t)0xa0ff, (q15_t)0x55c2, (q15_t)0xa0fb,
+  (q15_t)0x55bd, (q15_t)0xa0f6, (q15_t)0x55b9, (q15_t)0xa0f2, (q15_t)0x55b4, (q15_t)0xa0ee, (q15_t)0x55af, (q15_t)0xa0ea,
+  (q15_t)0x55ab, (q15_t)0xa0e6, (q15_t)0x55a6, (q15_t)0xa0e1, (q15_t)0x55a1, (q15_t)0xa0dd, (q15_t)0x559d, (q15_t)0xa0d9,
+  (q15_t)0x5598, (q15_t)0xa0d5, (q15_t)0x5593, (q15_t)0xa0d1, (q15_t)0x558f, (q15_t)0xa0cc, (q15_t)0x558a, (q15_t)0xa0c8,
+  (q15_t)0x5585, (q15_t)0xa0c4, (q15_t)0x5581, (q15_t)0xa0c0, (q15_t)0x557c, (q15_t)0xa0bc, (q15_t)0x5577, (q15_t)0xa0b7,
+  (q15_t)0x5572, (q15_t)0xa0b3, (q15_t)0x556e, (q15_t)0xa0af, (q15_t)0x5569, (q15_t)0xa0ab, (q15_t)0x5564, (q15_t)0xa0a7,
+  (q15_t)0x5560, (q15_t)0xa0a2, (q15_t)0x555b, (q15_t)0xa09e, (q15_t)0x5556, (q15_t)0xa09a, (q15_t)0x5552, (q15_t)0xa096,
+  (q15_t)0x554d, (q15_t)0xa092, (q15_t)0x5548, (q15_t)0xa08e, (q15_t)0x5544, (q15_t)0xa089, (q15_t)0x553f, (q15_t)0xa085,
+  (q15_t)0x553a, (q15_t)0xa081, (q15_t)0x5536, (q15_t)0xa07d, (q15_t)0x5531, (q15_t)0xa079, (q15_t)0x552c, (q15_t)0xa074,
+  (q15_t)0x5528, (q15_t)0xa070, (q15_t)0x5523, (q15_t)0xa06c, (q15_t)0x551e, (q15_t)0xa068, (q15_t)0x5519, (q15_t)0xa064,
+  (q15_t)0x5515, (q15_t)0xa060, (q15_t)0x5510, (q15_t)0xa05b, (q15_t)0x550b, (q15_t)0xa057, (q15_t)0x5507, (q15_t)0xa053,
+  (q15_t)0x5502, (q15_t)0xa04f, (q15_t)0x54fd, (q15_t)0xa04b, (q15_t)0x54f9, (q15_t)0xa046, (q15_t)0x54f4, (q15_t)0xa042,
+  (q15_t)0x54ef, (q15_t)0xa03e, (q15_t)0x54ea, (q15_t)0xa03a, (q15_t)0x54e6, (q15_t)0xa036, (q15_t)0x54e1, (q15_t)0xa032,
+  (q15_t)0x54dc, (q15_t)0xa02d, (q15_t)0x54d8, (q15_t)0xa029, (q15_t)0x54d3, (q15_t)0xa025, (q15_t)0x54ce, (q15_t)0xa021,
+  (q15_t)0x54ca, (q15_t)0xa01d, (q15_t)0x54c5, (q15_t)0xa019, (q15_t)0x54c0, (q15_t)0xa014, (q15_t)0x54bb, (q15_t)0xa010,
+  (q15_t)0x54b7, (q15_t)0xa00c, (q15_t)0x54b2, (q15_t)0xa008, (q15_t)0x54ad, (q15_t)0xa004, (q15_t)0x54a9, (q15_t)0xa000,
+  (q15_t)0x54a4, (q15_t)0x9ffc, (q15_t)0x549f, (q15_t)0x9ff7, (q15_t)0x549a, (q15_t)0x9ff3, (q15_t)0x5496, (q15_t)0x9fef,
+  (q15_t)0x5491, (q15_t)0x9feb, (q15_t)0x548c, (q15_t)0x9fe7, (q15_t)0x5488, (q15_t)0x9fe3, (q15_t)0x5483, (q15_t)0x9fde,
+  (q15_t)0x547e, (q15_t)0x9fda, (q15_t)0x5479, (q15_t)0x9fd6, (q15_t)0x5475, (q15_t)0x9fd2, (q15_t)0x5470, (q15_t)0x9fce,
+  (q15_t)0x546b, (q15_t)0x9fca, (q15_t)0x5467, (q15_t)0x9fc6, (q15_t)0x5462, (q15_t)0x9fc1, (q15_t)0x545d, (q15_t)0x9fbd,
+  (q15_t)0x5458, (q15_t)0x9fb9, (q15_t)0x5454, (q15_t)0x9fb5, (q15_t)0x544f, (q15_t)0x9fb1, (q15_t)0x544a, (q15_t)0x9fad,
+  (q15_t)0x5445, (q15_t)0x9fa9, (q15_t)0x5441, (q15_t)0x9fa4, (q15_t)0x543c, (q15_t)0x9fa0, (q15_t)0x5437, (q15_t)0x9f9c,
+  (q15_t)0x5433, (q15_t)0x9f98, (q15_t)0x542e, (q15_t)0x9f94, (q15_t)0x5429, (q15_t)0x9f90, (q15_t)0x5424, (q15_t)0x9f8c,
+  (q15_t)0x5420, (q15_t)0x9f88, (q15_t)0x541b, (q15_t)0x9f83, (q15_t)0x5416, (q15_t)0x9f7f, (q15_t)0x5411, (q15_t)0x9f7b,
+  (q15_t)0x540d, (q15_t)0x9f77, (q15_t)0x5408, (q15_t)0x9f73, (q15_t)0x5403, (q15_t)0x9f6f, (q15_t)0x53fe, (q15_t)0x9f6b,
+  (q15_t)0x53fa, (q15_t)0x9f67, (q15_t)0x53f5, (q15_t)0x9f62, (q15_t)0x53f0, (q15_t)0x9f5e, (q15_t)0x53eb, (q15_t)0x9f5a,
+  (q15_t)0x53e7, (q15_t)0x9f56, (q15_t)0x53e2, (q15_t)0x9f52, (q15_t)0x53dd, (q15_t)0x9f4e, (q15_t)0x53d8, (q15_t)0x9f4a,
+  (q15_t)0x53d4, (q15_t)0x9f46, (q15_t)0x53cf, (q15_t)0x9f41, (q15_t)0x53ca, (q15_t)0x9f3d, (q15_t)0x53c5, (q15_t)0x9f39,
+  (q15_t)0x53c1, (q15_t)0x9f35, (q15_t)0x53bc, (q15_t)0x9f31, (q15_t)0x53b7, (q15_t)0x9f2d, (q15_t)0x53b2, (q15_t)0x9f29,
+  (q15_t)0x53ae, (q15_t)0x9f25, (q15_t)0x53a9, (q15_t)0x9f21, (q15_t)0x53a4, (q15_t)0x9f1c, (q15_t)0x539f, (q15_t)0x9f18,
+  (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x5396, (q15_t)0x9f10, (q15_t)0x5391, (q15_t)0x9f0c, (q15_t)0x538c, (q15_t)0x9f08,
+  (q15_t)0x5388, (q15_t)0x9f04, (q15_t)0x5383, (q15_t)0x9f00, (q15_t)0x537e, (q15_t)0x9efc, (q15_t)0x5379, (q15_t)0x9ef8,
+  (q15_t)0x5375, (q15_t)0x9ef3, (q15_t)0x5370, (q15_t)0x9eef, (q15_t)0x536b, (q15_t)0x9eeb, (q15_t)0x5366, (q15_t)0x9ee7,
+  (q15_t)0x5362, (q15_t)0x9ee3, (q15_t)0x535d, (q15_t)0x9edf, (q15_t)0x5358, (q15_t)0x9edb, (q15_t)0x5353, (q15_t)0x9ed7,
+  (q15_t)0x534e, (q15_t)0x9ed3, (q15_t)0x534a, (q15_t)0x9ecf, (q15_t)0x5345, (q15_t)0x9ecb, (q15_t)0x5340, (q15_t)0x9ec6,
+  (q15_t)0x533b, (q15_t)0x9ec2, (q15_t)0x5337, (q15_t)0x9ebe, (q15_t)0x5332, (q15_t)0x9eba, (q15_t)0x532d, (q15_t)0x9eb6,
+  (q15_t)0x5328, (q15_t)0x9eb2, (q15_t)0x5323, (q15_t)0x9eae, (q15_t)0x531f, (q15_t)0x9eaa, (q15_t)0x531a, (q15_t)0x9ea6,
+  (q15_t)0x5315, (q15_t)0x9ea2, (q15_t)0x5310, (q15_t)0x9e9e, (q15_t)0x530c, (q15_t)0x9e9a, (q15_t)0x5307, (q15_t)0x9e95,
+  (q15_t)0x5302, (q15_t)0x9e91, (q15_t)0x52fd, (q15_t)0x9e8d, (q15_t)0x52f8, (q15_t)0x9e89, (q15_t)0x52f4, (q15_t)0x9e85,
+  (q15_t)0x52ef, (q15_t)0x9e81, (q15_t)0x52ea, (q15_t)0x9e7d, (q15_t)0x52e5, (q15_t)0x9e79, (q15_t)0x52e1, (q15_t)0x9e75,
+  (q15_t)0x52dc, (q15_t)0x9e71, (q15_t)0x52d7, (q15_t)0x9e6d, (q15_t)0x52d2, (q15_t)0x9e69, (q15_t)0x52cd, (q15_t)0x9e65,
+  (q15_t)0x52c9, (q15_t)0x9e61, (q15_t)0x52c4, (q15_t)0x9e5d, (q15_t)0x52bf, (q15_t)0x9e58, (q15_t)0x52ba, (q15_t)0x9e54,
+  (q15_t)0x52b5, (q15_t)0x9e50, (q15_t)0x52b1, (q15_t)0x9e4c, (q15_t)0x52ac, (q15_t)0x9e48, (q15_t)0x52a7, (q15_t)0x9e44,
+  (q15_t)0x52a2, (q15_t)0x9e40, (q15_t)0x529d, (q15_t)0x9e3c, (q15_t)0x5299, (q15_t)0x9e38, (q15_t)0x5294, (q15_t)0x9e34,
+  (q15_t)0x528f, (q15_t)0x9e30, (q15_t)0x528a, (q15_t)0x9e2c, (q15_t)0x5285, (q15_t)0x9e28, (q15_t)0x5281, (q15_t)0x9e24,
+  (q15_t)0x527c, (q15_t)0x9e20, (q15_t)0x5277, (q15_t)0x9e1c, (q15_t)0x5272, (q15_t)0x9e18, (q15_t)0x526d, (q15_t)0x9e14,
+  (q15_t)0x5269, (q15_t)0x9e0f, (q15_t)0x5264, (q15_t)0x9e0b, (q15_t)0x525f, (q15_t)0x9e07, (q15_t)0x525a, (q15_t)0x9e03,
+  (q15_t)0x5255, (q15_t)0x9dff, (q15_t)0x5251, (q15_t)0x9dfb, (q15_t)0x524c, (q15_t)0x9df7, (q15_t)0x5247, (q15_t)0x9df3,
+  (q15_t)0x5242, (q15_t)0x9def, (q15_t)0x523d, (q15_t)0x9deb, (q15_t)0x5238, (q15_t)0x9de7, (q15_t)0x5234, (q15_t)0x9de3,
+  (q15_t)0x522f, (q15_t)0x9ddf, (q15_t)0x522a, (q15_t)0x9ddb, (q15_t)0x5225, (q15_t)0x9dd7, (q15_t)0x5220, (q15_t)0x9dd3,
+  (q15_t)0x521c, (q15_t)0x9dcf, (q15_t)0x5217, (q15_t)0x9dcb, (q15_t)0x5212, (q15_t)0x9dc7, (q15_t)0x520d, (q15_t)0x9dc3,
+  (q15_t)0x5208, (q15_t)0x9dbf, (q15_t)0x5203, (q15_t)0x9dbb, (q15_t)0x51ff, (q15_t)0x9db7, (q15_t)0x51fa, (q15_t)0x9db3,
+  (q15_t)0x51f5, (q15_t)0x9daf, (q15_t)0x51f0, (q15_t)0x9dab, (q15_t)0x51eb, (q15_t)0x9da7, (q15_t)0x51e6, (q15_t)0x9da3,
+  (q15_t)0x51e2, (q15_t)0x9d9f, (q15_t)0x51dd, (q15_t)0x9d9b, (q15_t)0x51d8, (q15_t)0x9d97, (q15_t)0x51d3, (q15_t)0x9d93,
+  (q15_t)0x51ce, (q15_t)0x9d8f, (q15_t)0x51c9, (q15_t)0x9d8b, (q15_t)0x51c5, (q15_t)0x9d86, (q15_t)0x51c0, (q15_t)0x9d82,
+  (q15_t)0x51bb, (q15_t)0x9d7e, (q15_t)0x51b6, (q15_t)0x9d7a, (q15_t)0x51b1, (q15_t)0x9d76, (q15_t)0x51ac, (q15_t)0x9d72,
+  (q15_t)0x51a8, (q15_t)0x9d6e, (q15_t)0x51a3, (q15_t)0x9d6a, (q15_t)0x519e, (q15_t)0x9d66, (q15_t)0x5199, (q15_t)0x9d62,
+  (q15_t)0x5194, (q15_t)0x9d5e, (q15_t)0x518f, (q15_t)0x9d5a, (q15_t)0x518b, (q15_t)0x9d56, (q15_t)0x5186, (q15_t)0x9d52,
+  (q15_t)0x5181, (q15_t)0x9d4e, (q15_t)0x517c, (q15_t)0x9d4a, (q15_t)0x5177, (q15_t)0x9d46, (q15_t)0x5172, (q15_t)0x9d42,
+  (q15_t)0x516e, (q15_t)0x9d3e, (q15_t)0x5169, (q15_t)0x9d3a, (q15_t)0x5164, (q15_t)0x9d36, (q15_t)0x515f, (q15_t)0x9d32,
+  (q15_t)0x515a, (q15_t)0x9d2e, (q15_t)0x5155, (q15_t)0x9d2a, (q15_t)0x5150, (q15_t)0x9d26, (q15_t)0x514c, (q15_t)0x9d22,
+  (q15_t)0x5147, (q15_t)0x9d1e, (q15_t)0x5142, (q15_t)0x9d1a, (q15_t)0x513d, (q15_t)0x9d16, (q15_t)0x5138, (q15_t)0x9d12,
+  (q15_t)0x5133, (q15_t)0x9d0e, (q15_t)0x512e, (q15_t)0x9d0b, (q15_t)0x512a, (q15_t)0x9d07, (q15_t)0x5125, (q15_t)0x9d03,
+  (q15_t)0x5120, (q15_t)0x9cff, (q15_t)0x511b, (q15_t)0x9cfb, (q15_t)0x5116, (q15_t)0x9cf7, (q15_t)0x5111, (q15_t)0x9cf3,
+  (q15_t)0x510c, (q15_t)0x9cef, (q15_t)0x5108, (q15_t)0x9ceb, (q15_t)0x5103, (q15_t)0x9ce7, (q15_t)0x50fe, (q15_t)0x9ce3,
+  (q15_t)0x50f9, (q15_t)0x9cdf, (q15_t)0x50f4, (q15_t)0x9cdb, (q15_t)0x50ef, (q15_t)0x9cd7, (q15_t)0x50ea, (q15_t)0x9cd3,
+  (q15_t)0x50e5, (q15_t)0x9ccf, (q15_t)0x50e1, (q15_t)0x9ccb, (q15_t)0x50dc, (q15_t)0x9cc7, (q15_t)0x50d7, (q15_t)0x9cc3,
+  (q15_t)0x50d2, (q15_t)0x9cbf, (q15_t)0x50cd, (q15_t)0x9cbb, (q15_t)0x50c8, (q15_t)0x9cb7, (q15_t)0x50c3, (q15_t)0x9cb3,
+  (q15_t)0x50bf, (q15_t)0x9caf, (q15_t)0x50ba, (q15_t)0x9cab, (q15_t)0x50b5, (q15_t)0x9ca7, (q15_t)0x50b0, (q15_t)0x9ca3,
+  (q15_t)0x50ab, (q15_t)0x9c9f, (q15_t)0x50a6, (q15_t)0x9c9b, (q15_t)0x50a1, (q15_t)0x9c97, (q15_t)0x509c, (q15_t)0x9c93,
+  (q15_t)0x5097, (q15_t)0x9c8f, (q15_t)0x5093, (q15_t)0x9c8b, (q15_t)0x508e, (q15_t)0x9c88, (q15_t)0x5089, (q15_t)0x9c84,
+  (q15_t)0x5084, (q15_t)0x9c80, (q15_t)0x507f, (q15_t)0x9c7c, (q15_t)0x507a, (q15_t)0x9c78, (q15_t)0x5075, (q15_t)0x9c74,
+  (q15_t)0x5070, (q15_t)0x9c70, (q15_t)0x506c, (q15_t)0x9c6c, (q15_t)0x5067, (q15_t)0x9c68, (q15_t)0x5062, (q15_t)0x9c64,
+  (q15_t)0x505d, (q15_t)0x9c60, (q15_t)0x5058, (q15_t)0x9c5c, (q15_t)0x5053, (q15_t)0x9c58, (q15_t)0x504e, (q15_t)0x9c54,
+  (q15_t)0x5049, (q15_t)0x9c50, (q15_t)0x5044, (q15_t)0x9c4c, (q15_t)0x503f, (q15_t)0x9c48, (q15_t)0x503b, (q15_t)0x9c44,
+  (q15_t)0x5036, (q15_t)0x9c40, (q15_t)0x5031, (q15_t)0x9c3d, (q15_t)0x502c, (q15_t)0x9c39, (q15_t)0x5027, (q15_t)0x9c35,
+  (q15_t)0x5022, (q15_t)0x9c31, (q15_t)0x501d, (q15_t)0x9c2d, (q15_t)0x5018, (q15_t)0x9c29, (q15_t)0x5013, (q15_t)0x9c25,
+  (q15_t)0x500f, (q15_t)0x9c21, (q15_t)0x500a, (q15_t)0x9c1d, (q15_t)0x5005, (q15_t)0x9c19, (q15_t)0x5000, (q15_t)0x9c15,
+  (q15_t)0x4ffb, (q15_t)0x9c11, (q15_t)0x4ff6, (q15_t)0x9c0d, (q15_t)0x4ff1, (q15_t)0x9c09, (q15_t)0x4fec, (q15_t)0x9c06,
+  (q15_t)0x4fe7, (q15_t)0x9c02, (q15_t)0x4fe2, (q15_t)0x9bfe, (q15_t)0x4fdd, (q15_t)0x9bfa, (q15_t)0x4fd9, (q15_t)0x9bf6,
+  (q15_t)0x4fd4, (q15_t)0x9bf2, (q15_t)0x4fcf, (q15_t)0x9bee, (q15_t)0x4fca, (q15_t)0x9bea, (q15_t)0x4fc5, (q15_t)0x9be6,
+  (q15_t)0x4fc0, (q15_t)0x9be2, (q15_t)0x4fbb, (q15_t)0x9bde, (q15_t)0x4fb6, (q15_t)0x9bda, (q15_t)0x4fb1, (q15_t)0x9bd7,
+  (q15_t)0x4fac, (q15_t)0x9bd3, (q15_t)0x4fa7, (q15_t)0x9bcf, (q15_t)0x4fa2, (q15_t)0x9bcb, (q15_t)0x4f9e, (q15_t)0x9bc7,
+  (q15_t)0x4f99, (q15_t)0x9bc3, (q15_t)0x4f94, (q15_t)0x9bbf, (q15_t)0x4f8f, (q15_t)0x9bbb, (q15_t)0x4f8a, (q15_t)0x9bb7,
+  (q15_t)0x4f85, (q15_t)0x9bb3, (q15_t)0x4f80, (q15_t)0x9baf, (q15_t)0x4f7b, (q15_t)0x9bac, (q15_t)0x4f76, (q15_t)0x9ba8,
+  (q15_t)0x4f71, (q15_t)0x9ba4, (q15_t)0x4f6c, (q15_t)0x9ba0, (q15_t)0x4f67, (q15_t)0x9b9c, (q15_t)0x4f62, (q15_t)0x9b98,
+  (q15_t)0x4f5e, (q15_t)0x9b94, (q15_t)0x4f59, (q15_t)0x9b90, (q15_t)0x4f54, (q15_t)0x9b8c, (q15_t)0x4f4f, (q15_t)0x9b88,
+  (q15_t)0x4f4a, (q15_t)0x9b85, (q15_t)0x4f45, (q15_t)0x9b81, (q15_t)0x4f40, (q15_t)0x9b7d, (q15_t)0x4f3b, (q15_t)0x9b79,
+  (q15_t)0x4f36, (q15_t)0x9b75, (q15_t)0x4f31, (q15_t)0x9b71, (q15_t)0x4f2c, (q15_t)0x9b6d, (q15_t)0x4f27, (q15_t)0x9b69,
+  (q15_t)0x4f22, (q15_t)0x9b65, (q15_t)0x4f1d, (q15_t)0x9b62, (q15_t)0x4f18, (q15_t)0x9b5e, (q15_t)0x4f14, (q15_t)0x9b5a,
+  (q15_t)0x4f0f, (q15_t)0x9b56, (q15_t)0x4f0a, (q15_t)0x9b52, (q15_t)0x4f05, (q15_t)0x9b4e, (q15_t)0x4f00, (q15_t)0x9b4a,
+  (q15_t)0x4efb, (q15_t)0x9b46, (q15_t)0x4ef6, (q15_t)0x9b43, (q15_t)0x4ef1, (q15_t)0x9b3f, (q15_t)0x4eec, (q15_t)0x9b3b,
+  (q15_t)0x4ee7, (q15_t)0x9b37, (q15_t)0x4ee2, (q15_t)0x9b33, (q15_t)0x4edd, (q15_t)0x9b2f, (q15_t)0x4ed8, (q15_t)0x9b2b,
+  (q15_t)0x4ed3, (q15_t)0x9b27, (q15_t)0x4ece, (q15_t)0x9b24, (q15_t)0x4ec9, (q15_t)0x9b20, (q15_t)0x4ec4, (q15_t)0x9b1c,
+  (q15_t)0x4ebf, (q15_t)0x9b18, (q15_t)0x4eba, (q15_t)0x9b14, (q15_t)0x4eb6, (q15_t)0x9b10, (q15_t)0x4eb1, (q15_t)0x9b0c,
+  (q15_t)0x4eac, (q15_t)0x9b09, (q15_t)0x4ea7, (q15_t)0x9b05, (q15_t)0x4ea2, (q15_t)0x9b01, (q15_t)0x4e9d, (q15_t)0x9afd,
+  (q15_t)0x4e98, (q15_t)0x9af9, (q15_t)0x4e93, (q15_t)0x9af5, (q15_t)0x4e8e, (q15_t)0x9af1, (q15_t)0x4e89, (q15_t)0x9aed,
+  (q15_t)0x4e84, (q15_t)0x9aea, (q15_t)0x4e7f, (q15_t)0x9ae6, (q15_t)0x4e7a, (q15_t)0x9ae2, (q15_t)0x4e75, (q15_t)0x9ade,
+  (q15_t)0x4e70, (q15_t)0x9ada, (q15_t)0x4e6b, (q15_t)0x9ad6, (q15_t)0x4e66, (q15_t)0x9ad3, (q15_t)0x4e61, (q15_t)0x9acf,
+  (q15_t)0x4e5c, (q15_t)0x9acb, (q15_t)0x4e57, (q15_t)0x9ac7, (q15_t)0x4e52, (q15_t)0x9ac3, (q15_t)0x4e4d, (q15_t)0x9abf,
+  (q15_t)0x4e48, (q15_t)0x9abb, (q15_t)0x4e43, (q15_t)0x9ab8, (q15_t)0x4e3e, (q15_t)0x9ab4, (q15_t)0x4e39, (q15_t)0x9ab0,
+  (q15_t)0x4e34, (q15_t)0x9aac, (q15_t)0x4e2f, (q15_t)0x9aa8, (q15_t)0x4e2a, (q15_t)0x9aa4, (q15_t)0x4e26, (q15_t)0x9aa1,
+  (q15_t)0x4e21, (q15_t)0x9a9d, (q15_t)0x4e1c, (q15_t)0x9a99, (q15_t)0x4e17, (q15_t)0x9a95, (q15_t)0x4e12, (q15_t)0x9a91,
+  (q15_t)0x4e0d, (q15_t)0x9a8d, (q15_t)0x4e08, (q15_t)0x9a8a, (q15_t)0x4e03, (q15_t)0x9a86, (q15_t)0x4dfe, (q15_t)0x9a82,
+  (q15_t)0x4df9, (q15_t)0x9a7e, (q15_t)0x4df4, (q15_t)0x9a7a, (q15_t)0x4def, (q15_t)0x9a76, (q15_t)0x4dea, (q15_t)0x9a73,
+  (q15_t)0x4de5, (q15_t)0x9a6f, (q15_t)0x4de0, (q15_t)0x9a6b, (q15_t)0x4ddb, (q15_t)0x9a67, (q15_t)0x4dd6, (q15_t)0x9a63,
+  (q15_t)0x4dd1, (q15_t)0x9a60, (q15_t)0x4dcc, (q15_t)0x9a5c, (q15_t)0x4dc7, (q15_t)0x9a58, (q15_t)0x4dc2, (q15_t)0x9a54,
+  (q15_t)0x4dbd, (q15_t)0x9a50, (q15_t)0x4db8, (q15_t)0x9a4c, (q15_t)0x4db3, (q15_t)0x9a49, (q15_t)0x4dae, (q15_t)0x9a45,
+  (q15_t)0x4da9, (q15_t)0x9a41, (q15_t)0x4da4, (q15_t)0x9a3d, (q15_t)0x4d9f, (q15_t)0x9a39, (q15_t)0x4d9a, (q15_t)0x9a36,
+  (q15_t)0x4d95, (q15_t)0x9a32, (q15_t)0x4d90, (q15_t)0x9a2e, (q15_t)0x4d8b, (q15_t)0x9a2a, (q15_t)0x4d86, (q15_t)0x9a26,
+  (q15_t)0x4d81, (q15_t)0x9a23, (q15_t)0x4d7c, (q15_t)0x9a1f, (q15_t)0x4d77, (q15_t)0x9a1b, (q15_t)0x4d72, (q15_t)0x9a17,
+  (q15_t)0x4d6d, (q15_t)0x9a13, (q15_t)0x4d68, (q15_t)0x9a10, (q15_t)0x4d63, (q15_t)0x9a0c, (q15_t)0x4d5e, (q15_t)0x9a08,
+  (q15_t)0x4d59, (q15_t)0x9a04, (q15_t)0x4d54, (q15_t)0x9a00, (q15_t)0x4d4f, (q15_t)0x99fd, (q15_t)0x4d4a, (q15_t)0x99f9,
+  (q15_t)0x4d45, (q15_t)0x99f5, (q15_t)0x4d40, (q15_t)0x99f1, (q15_t)0x4d3b, (q15_t)0x99ed, (q15_t)0x4d36, (q15_t)0x99ea,
+  (q15_t)0x4d31, (q15_t)0x99e6, (q15_t)0x4d2c, (q15_t)0x99e2, (q15_t)0x4d27, (q15_t)0x99de, (q15_t)0x4d22, (q15_t)0x99da,
+  (q15_t)0x4d1d, (q15_t)0x99d7, (q15_t)0x4d18, (q15_t)0x99d3, (q15_t)0x4d13, (q15_t)0x99cf, (q15_t)0x4d0e, (q15_t)0x99cb,
+  (q15_t)0x4d09, (q15_t)0x99c7, (q15_t)0x4d04, (q15_t)0x99c4, (q15_t)0x4cff, (q15_t)0x99c0, (q15_t)0x4cfa, (q15_t)0x99bc,
+  (q15_t)0x4cf5, (q15_t)0x99b8, (q15_t)0x4cf0, (q15_t)0x99b5, (q15_t)0x4ceb, (q15_t)0x99b1, (q15_t)0x4ce6, (q15_t)0x99ad,
+  (q15_t)0x4ce1, (q15_t)0x99a9, (q15_t)0x4cdb, (q15_t)0x99a5, (q15_t)0x4cd6, (q15_t)0x99a2, (q15_t)0x4cd1, (q15_t)0x999e,
+  (q15_t)0x4ccc, (q15_t)0x999a, (q15_t)0x4cc7, (q15_t)0x9996, (q15_t)0x4cc2, (q15_t)0x9993, (q15_t)0x4cbd, (q15_t)0x998f,
+  (q15_t)0x4cb8, (q15_t)0x998b, (q15_t)0x4cb3, (q15_t)0x9987, (q15_t)0x4cae, (q15_t)0x9984, (q15_t)0x4ca9, (q15_t)0x9980,
+  (q15_t)0x4ca4, (q15_t)0x997c, (q15_t)0x4c9f, (q15_t)0x9978, (q15_t)0x4c9a, (q15_t)0x9975, (q15_t)0x4c95, (q15_t)0x9971,
+  (q15_t)0x4c90, (q15_t)0x996d, (q15_t)0x4c8b, (q15_t)0x9969, (q15_t)0x4c86, (q15_t)0x9965, (q15_t)0x4c81, (q15_t)0x9962,
+  (q15_t)0x4c7c, (q15_t)0x995e, (q15_t)0x4c77, (q15_t)0x995a, (q15_t)0x4c72, (q15_t)0x9956, (q15_t)0x4c6d, (q15_t)0x9953,
+  (q15_t)0x4c68, (q15_t)0x994f, (q15_t)0x4c63, (q15_t)0x994b, (q15_t)0x4c5e, (q15_t)0x9947, (q15_t)0x4c59, (q15_t)0x9944,
+  (q15_t)0x4c54, (q15_t)0x9940, (q15_t)0x4c4f, (q15_t)0x993c, (q15_t)0x4c49, (q15_t)0x9938, (q15_t)0x4c44, (q15_t)0x9935,
+  (q15_t)0x4c3f, (q15_t)0x9931, (q15_t)0x4c3a, (q15_t)0x992d, (q15_t)0x4c35, (q15_t)0x992a, (q15_t)0x4c30, (q15_t)0x9926,
+  (q15_t)0x4c2b, (q15_t)0x9922, (q15_t)0x4c26, (q15_t)0x991e, (q15_t)0x4c21, (q15_t)0x991b, (q15_t)0x4c1c, (q15_t)0x9917,
+  (q15_t)0x4c17, (q15_t)0x9913, (q15_t)0x4c12, (q15_t)0x990f, (q15_t)0x4c0d, (q15_t)0x990c, (q15_t)0x4c08, (q15_t)0x9908,
+  (q15_t)0x4c03, (q15_t)0x9904, (q15_t)0x4bfe, (q15_t)0x9900, (q15_t)0x4bf9, (q15_t)0x98fd, (q15_t)0x4bf4, (q15_t)0x98f9,
+  (q15_t)0x4bef, (q15_t)0x98f5, (q15_t)0x4be9, (q15_t)0x98f2, (q15_t)0x4be4, (q15_t)0x98ee, (q15_t)0x4bdf, (q15_t)0x98ea,
+  (q15_t)0x4bda, (q15_t)0x98e6, (q15_t)0x4bd5, (q15_t)0x98e3, (q15_t)0x4bd0, (q15_t)0x98df, (q15_t)0x4bcb, (q15_t)0x98db,
+  (q15_t)0x4bc6, (q15_t)0x98d7, (q15_t)0x4bc1, (q15_t)0x98d4, (q15_t)0x4bbc, (q15_t)0x98d0, (q15_t)0x4bb7, (q15_t)0x98cc,
+  (q15_t)0x4bb2, (q15_t)0x98c9, (q15_t)0x4bad, (q15_t)0x98c5, (q15_t)0x4ba8, (q15_t)0x98c1, (q15_t)0x4ba3, (q15_t)0x98bd,
+  (q15_t)0x4b9e, (q15_t)0x98ba, (q15_t)0x4b98, (q15_t)0x98b6, (q15_t)0x4b93, (q15_t)0x98b2, (q15_t)0x4b8e, (q15_t)0x98af,
+  (q15_t)0x4b89, (q15_t)0x98ab, (q15_t)0x4b84, (q15_t)0x98a7, (q15_t)0x4b7f, (q15_t)0x98a3, (q15_t)0x4b7a, (q15_t)0x98a0,
+  (q15_t)0x4b75, (q15_t)0x989c, (q15_t)0x4b70, (q15_t)0x9898, (q15_t)0x4b6b, (q15_t)0x9895, (q15_t)0x4b66, (q15_t)0x9891,
+  (q15_t)0x4b61, (q15_t)0x988d, (q15_t)0x4b5c, (q15_t)0x988a, (q15_t)0x4b56, (q15_t)0x9886, (q15_t)0x4b51, (q15_t)0x9882,
+  (q15_t)0x4b4c, (q15_t)0x987e, (q15_t)0x4b47, (q15_t)0x987b, (q15_t)0x4b42, (q15_t)0x9877, (q15_t)0x4b3d, (q15_t)0x9873,
+  (q15_t)0x4b38, (q15_t)0x9870, (q15_t)0x4b33, (q15_t)0x986c, (q15_t)0x4b2e, (q15_t)0x9868, (q15_t)0x4b29, (q15_t)0x9865,
+  (q15_t)0x4b24, (q15_t)0x9861, (q15_t)0x4b1f, (q15_t)0x985d, (q15_t)0x4b19, (q15_t)0x985a, (q15_t)0x4b14, (q15_t)0x9856,
+  (q15_t)0x4b0f, (q15_t)0x9852, (q15_t)0x4b0a, (q15_t)0x984e, (q15_t)0x4b05, (q15_t)0x984b, (q15_t)0x4b00, (q15_t)0x9847,
+  (q15_t)0x4afb, (q15_t)0x9843, (q15_t)0x4af6, (q15_t)0x9840, (q15_t)0x4af1, (q15_t)0x983c, (q15_t)0x4aec, (q15_t)0x9838,
+  (q15_t)0x4ae7, (q15_t)0x9835, (q15_t)0x4ae1, (q15_t)0x9831, (q15_t)0x4adc, (q15_t)0x982d, (q15_t)0x4ad7, (q15_t)0x982a,
+  (q15_t)0x4ad2, (q15_t)0x9826, (q15_t)0x4acd, (q15_t)0x9822, (q15_t)0x4ac8, (q15_t)0x981f, (q15_t)0x4ac3, (q15_t)0x981b,
+  (q15_t)0x4abe, (q15_t)0x9817, (q15_t)0x4ab9, (q15_t)0x9814, (q15_t)0x4ab4, (q15_t)0x9810, (q15_t)0x4aae, (q15_t)0x980c,
+  (q15_t)0x4aa9, (q15_t)0x9809, (q15_t)0x4aa4, (q15_t)0x9805, (q15_t)0x4a9f, (q15_t)0x9801, (q15_t)0x4a9a, (q15_t)0x97fe,
+  (q15_t)0x4a95, (q15_t)0x97fa, (q15_t)0x4a90, (q15_t)0x97f6, (q15_t)0x4a8b, (q15_t)0x97f3, (q15_t)0x4a86, (q15_t)0x97ef,
+  (q15_t)0x4a81, (q15_t)0x97eb, (q15_t)0x4a7b, (q15_t)0x97e8, (q15_t)0x4a76, (q15_t)0x97e4, (q15_t)0x4a71, (q15_t)0x97e0,
+  (q15_t)0x4a6c, (q15_t)0x97dd, (q15_t)0x4a67, (q15_t)0x97d9, (q15_t)0x4a62, (q15_t)0x97d5, (q15_t)0x4a5d, (q15_t)0x97d2,
+  (q15_t)0x4a58, (q15_t)0x97ce, (q15_t)0x4a52, (q15_t)0x97cb, (q15_t)0x4a4d, (q15_t)0x97c7, (q15_t)0x4a48, (q15_t)0x97c3,
+  (q15_t)0x4a43, (q15_t)0x97c0, (q15_t)0x4a3e, (q15_t)0x97bc, (q15_t)0x4a39, (q15_t)0x97b8, (q15_t)0x4a34, (q15_t)0x97b5,
+  (q15_t)0x4a2f, (q15_t)0x97b1, (q15_t)0x4a2a, (q15_t)0x97ad, (q15_t)0x4a24, (q15_t)0x97aa, (q15_t)0x4a1f, (q15_t)0x97a6,
+  (q15_t)0x4a1a, (q15_t)0x97a2, (q15_t)0x4a15, (q15_t)0x979f, (q15_t)0x4a10, (q15_t)0x979b, (q15_t)0x4a0b, (q15_t)0x9798,
+  (q15_t)0x4a06, (q15_t)0x9794, (q15_t)0x4a01, (q15_t)0x9790, (q15_t)0x49fb, (q15_t)0x978d, (q15_t)0x49f6, (q15_t)0x9789,
+  (q15_t)0x49f1, (q15_t)0x9785, (q15_t)0x49ec, (q15_t)0x9782, (q15_t)0x49e7, (q15_t)0x977e, (q15_t)0x49e2, (q15_t)0x977a,
+  (q15_t)0x49dd, (q15_t)0x9777, (q15_t)0x49d8, (q15_t)0x9773, (q15_t)0x49d2, (q15_t)0x9770, (q15_t)0x49cd, (q15_t)0x976c,
+  (q15_t)0x49c8, (q15_t)0x9768, (q15_t)0x49c3, (q15_t)0x9765, (q15_t)0x49be, (q15_t)0x9761, (q15_t)0x49b9, (q15_t)0x975d,
+  (q15_t)0x49b4, (q15_t)0x975a, (q15_t)0x49ae, (q15_t)0x9756, (q15_t)0x49a9, (q15_t)0x9753, (q15_t)0x49a4, (q15_t)0x974f,
+  (q15_t)0x499f, (q15_t)0x974b, (q15_t)0x499a, (q15_t)0x9748, (q15_t)0x4995, (q15_t)0x9744, (q15_t)0x4990, (q15_t)0x9741,
+  (q15_t)0x498a, (q15_t)0x973d, (q15_t)0x4985, (q15_t)0x9739, (q15_t)0x4980, (q15_t)0x9736, (q15_t)0x497b, (q15_t)0x9732,
+  (q15_t)0x4976, (q15_t)0x972f, (q15_t)0x4971, (q15_t)0x972b, (q15_t)0x496c, (q15_t)0x9727, (q15_t)0x4966, (q15_t)0x9724,
+  (q15_t)0x4961, (q15_t)0x9720, (q15_t)0x495c, (q15_t)0x971d, (q15_t)0x4957, (q15_t)0x9719, (q15_t)0x4952, (q15_t)0x9715,
+  (q15_t)0x494d, (q15_t)0x9712, (q15_t)0x4948, (q15_t)0x970e, (q15_t)0x4942, (q15_t)0x970b, (q15_t)0x493d, (q15_t)0x9707,
+  (q15_t)0x4938, (q15_t)0x9703, (q15_t)0x4933, (q15_t)0x9700, (q15_t)0x492e, (q15_t)0x96fc, (q15_t)0x4929, (q15_t)0x96f9,
+  (q15_t)0x4923, (q15_t)0x96f5, (q15_t)0x491e, (q15_t)0x96f1, (q15_t)0x4919, (q15_t)0x96ee, (q15_t)0x4914, (q15_t)0x96ea,
+  (q15_t)0x490f, (q15_t)0x96e7, (q15_t)0x490a, (q15_t)0x96e3, (q15_t)0x4905, (q15_t)0x96df, (q15_t)0x48ff, (q15_t)0x96dc,
+  (q15_t)0x48fa, (q15_t)0x96d8, (q15_t)0x48f5, (q15_t)0x96d5, (q15_t)0x48f0, (q15_t)0x96d1, (q15_t)0x48eb, (q15_t)0x96ce,
+  (q15_t)0x48e6, (q15_t)0x96ca, (q15_t)0x48e0, (q15_t)0x96c6, (q15_t)0x48db, (q15_t)0x96c3, (q15_t)0x48d6, (q15_t)0x96bf,
+  (q15_t)0x48d1, (q15_t)0x96bc, (q15_t)0x48cc, (q15_t)0x96b8, (q15_t)0x48c7, (q15_t)0x96b5, (q15_t)0x48c1, (q15_t)0x96b1,
+  (q15_t)0x48bc, (q15_t)0x96ad, (q15_t)0x48b7, (q15_t)0x96aa, (q15_t)0x48b2, (q15_t)0x96a6, (q15_t)0x48ad, (q15_t)0x96a3,
+  (q15_t)0x48a8, (q15_t)0x969f, (q15_t)0x48a2, (q15_t)0x969c, (q15_t)0x489d, (q15_t)0x9698, (q15_t)0x4898, (q15_t)0x9694,
+  (q15_t)0x4893, (q15_t)0x9691, (q15_t)0x488e, (q15_t)0x968d, (q15_t)0x4888, (q15_t)0x968a, (q15_t)0x4883, (q15_t)0x9686,
+  (q15_t)0x487e, (q15_t)0x9683, (q15_t)0x4879, (q15_t)0x967f, (q15_t)0x4874, (q15_t)0x967b, (q15_t)0x486f, (q15_t)0x9678,
+  (q15_t)0x4869, (q15_t)0x9674, (q15_t)0x4864, (q15_t)0x9671, (q15_t)0x485f, (q15_t)0x966d, (q15_t)0x485a, (q15_t)0x966a,
+  (q15_t)0x4855, (q15_t)0x9666, (q15_t)0x484f, (q15_t)0x9663, (q15_t)0x484a, (q15_t)0x965f, (q15_t)0x4845, (q15_t)0x965b,
+  (q15_t)0x4840, (q15_t)0x9658, (q15_t)0x483b, (q15_t)0x9654, (q15_t)0x4836, (q15_t)0x9651, (q15_t)0x4830, (q15_t)0x964d,
+  (q15_t)0x482b, (q15_t)0x964a, (q15_t)0x4826, (q15_t)0x9646, (q15_t)0x4821, (q15_t)0x9643, (q15_t)0x481c, (q15_t)0x963f,
+  (q15_t)0x4816, (q15_t)0x963c, (q15_t)0x4811, (q15_t)0x9638, (q15_t)0x480c, (q15_t)0x9635, (q15_t)0x4807, (q15_t)0x9631,
+  (q15_t)0x4802, (q15_t)0x962d, (q15_t)0x47fc, (q15_t)0x962a, (q15_t)0x47f7, (q15_t)0x9626, (q15_t)0x47f2, (q15_t)0x9623,
+  (q15_t)0x47ed, (q15_t)0x961f, (q15_t)0x47e8, (q15_t)0x961c, (q15_t)0x47e2, (q15_t)0x9618, (q15_t)0x47dd, (q15_t)0x9615,
+  (q15_t)0x47d8, (q15_t)0x9611, (q15_t)0x47d3, (q15_t)0x960e, (q15_t)0x47ce, (q15_t)0x960a, (q15_t)0x47c8, (q15_t)0x9607,
+  (q15_t)0x47c3, (q15_t)0x9603, (q15_t)0x47be, (q15_t)0x9600, (q15_t)0x47b9, (q15_t)0x95fc, (q15_t)0x47b4, (q15_t)0x95f9,
+  (q15_t)0x47ae, (q15_t)0x95f5, (q15_t)0x47a9, (q15_t)0x95f2, (q15_t)0x47a4, (q15_t)0x95ee, (q15_t)0x479f, (q15_t)0x95ea,
+  (q15_t)0x479a, (q15_t)0x95e7, (q15_t)0x4794, (q15_t)0x95e3, (q15_t)0x478f, (q15_t)0x95e0, (q15_t)0x478a, (q15_t)0x95dc,
+  (q15_t)0x4785, (q15_t)0x95d9, (q15_t)0x4780, (q15_t)0x95d5, (q15_t)0x477a, (q15_t)0x95d2, (q15_t)0x4775, (q15_t)0x95ce,
+  (q15_t)0x4770, (q15_t)0x95cb, (q15_t)0x476b, (q15_t)0x95c7, (q15_t)0x4765, (q15_t)0x95c4, (q15_t)0x4760, (q15_t)0x95c0,
+  (q15_t)0x475b, (q15_t)0x95bd, (q15_t)0x4756, (q15_t)0x95b9, (q15_t)0x4751, (q15_t)0x95b6, (q15_t)0x474b, (q15_t)0x95b2,
+  (q15_t)0x4746, (q15_t)0x95af, (q15_t)0x4741, (q15_t)0x95ab, (q15_t)0x473c, (q15_t)0x95a8, (q15_t)0x4737, (q15_t)0x95a4,
+  (q15_t)0x4731, (q15_t)0x95a1, (q15_t)0x472c, (q15_t)0x959d, (q15_t)0x4727, (q15_t)0x959a, (q15_t)0x4722, (q15_t)0x9596,
+  (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x4717, (q15_t)0x958f, (q15_t)0x4712, (q15_t)0x958c, (q15_t)0x470d, (q15_t)0x9588,
+  (q15_t)0x4708, (q15_t)0x9585, (q15_t)0x4702, (q15_t)0x9581, (q15_t)0x46fd, (q15_t)0x957e, (q15_t)0x46f8, (q15_t)0x957a,
+  (q15_t)0x46f3, (q15_t)0x9577, (q15_t)0x46ed, (q15_t)0x9574, (q15_t)0x46e8, (q15_t)0x9570, (q15_t)0x46e3, (q15_t)0x956d,
+  (q15_t)0x46de, (q15_t)0x9569, (q15_t)0x46d8, (q15_t)0x9566, (q15_t)0x46d3, (q15_t)0x9562, (q15_t)0x46ce, (q15_t)0x955f,
+  (q15_t)0x46c9, (q15_t)0x955b, (q15_t)0x46c4, (q15_t)0x9558, (q15_t)0x46be, (q15_t)0x9554, (q15_t)0x46b9, (q15_t)0x9551,
+  (q15_t)0x46b4, (q15_t)0x954d, (q15_t)0x46af, (q15_t)0x954a, (q15_t)0x46a9, (q15_t)0x9546, (q15_t)0x46a4, (q15_t)0x9543,
+  (q15_t)0x469f, (q15_t)0x953f, (q15_t)0x469a, (q15_t)0x953c, (q15_t)0x4694, (q15_t)0x9538, (q15_t)0x468f, (q15_t)0x9535,
+  (q15_t)0x468a, (q15_t)0x9532, (q15_t)0x4685, (q15_t)0x952e, (q15_t)0x467f, (q15_t)0x952b, (q15_t)0x467a, (q15_t)0x9527,
+  (q15_t)0x4675, (q15_t)0x9524, (q15_t)0x4670, (q15_t)0x9520, (q15_t)0x466a, (q15_t)0x951d, (q15_t)0x4665, (q15_t)0x9519,
+  (q15_t)0x4660, (q15_t)0x9516, (q15_t)0x465b, (q15_t)0x9512, (q15_t)0x4655, (q15_t)0x950f, (q15_t)0x4650, (q15_t)0x950c,
+  (q15_t)0x464b, (q15_t)0x9508, (q15_t)0x4646, (q15_t)0x9505, (q15_t)0x4640, (q15_t)0x9501, (q15_t)0x463b, (q15_t)0x94fe,
+  (q15_t)0x4636, (q15_t)0x94fa, (q15_t)0x4631, (q15_t)0x94f7, (q15_t)0x462b, (q15_t)0x94f3, (q15_t)0x4626, (q15_t)0x94f0,
+  (q15_t)0x4621, (q15_t)0x94ed, (q15_t)0x461c, (q15_t)0x94e9, (q15_t)0x4616, (q15_t)0x94e6, (q15_t)0x4611, (q15_t)0x94e2,
+  (q15_t)0x460c, (q15_t)0x94df, (q15_t)0x4607, (q15_t)0x94db, (q15_t)0x4601, (q15_t)0x94d8, (q15_t)0x45fc, (q15_t)0x94d4,
+  (q15_t)0x45f7, (q15_t)0x94d1, (q15_t)0x45f2, (q15_t)0x94ce, (q15_t)0x45ec, (q15_t)0x94ca, (q15_t)0x45e7, (q15_t)0x94c7,
+  (q15_t)0x45e2, (q15_t)0x94c3, (q15_t)0x45dd, (q15_t)0x94c0, (q15_t)0x45d7, (q15_t)0x94bc, (q15_t)0x45d2, (q15_t)0x94b9,
+  (q15_t)0x45cd, (q15_t)0x94b6, (q15_t)0x45c7, (q15_t)0x94b2, (q15_t)0x45c2, (q15_t)0x94af, (q15_t)0x45bd, (q15_t)0x94ab,
+  (q15_t)0x45b8, (q15_t)0x94a8, (q15_t)0x45b2, (q15_t)0x94a4, (q15_t)0x45ad, (q15_t)0x94a1, (q15_t)0x45a8, (q15_t)0x949e,
+  (q15_t)0x45a3, (q15_t)0x949a, (q15_t)0x459d, (q15_t)0x9497, (q15_t)0x4598, (q15_t)0x9493, (q15_t)0x4593, (q15_t)0x9490,
+  (q15_t)0x458d, (q15_t)0x948d, (q15_t)0x4588, (q15_t)0x9489, (q15_t)0x4583, (q15_t)0x9486, (q15_t)0x457e, (q15_t)0x9482,
+  (q15_t)0x4578, (q15_t)0x947f, (q15_t)0x4573, (q15_t)0x947b, (q15_t)0x456e, (q15_t)0x9478, (q15_t)0x4569, (q15_t)0x9475,
+  (q15_t)0x4563, (q15_t)0x9471, (q15_t)0x455e, (q15_t)0x946e, (q15_t)0x4559, (q15_t)0x946a, (q15_t)0x4553, (q15_t)0x9467,
+  (q15_t)0x454e, (q15_t)0x9464, (q15_t)0x4549, (q15_t)0x9460, (q15_t)0x4544, (q15_t)0x945d, (q15_t)0x453e, (q15_t)0x9459,
+  (q15_t)0x4539, (q15_t)0x9456, (q15_t)0x4534, (q15_t)0x9453, (q15_t)0x452e, (q15_t)0x944f, (q15_t)0x4529, (q15_t)0x944c,
+  (q15_t)0x4524, (q15_t)0x9448, (q15_t)0x451f, (q15_t)0x9445, (q15_t)0x4519, (q15_t)0x9442, (q15_t)0x4514, (q15_t)0x943e,
+  (q15_t)0x450f, (q15_t)0x943b, (q15_t)0x4509, (q15_t)0x9437, (q15_t)0x4504, (q15_t)0x9434, (q15_t)0x44ff, (q15_t)0x9431,
+  (q15_t)0x44fa, (q15_t)0x942d, (q15_t)0x44f4, (q15_t)0x942a, (q15_t)0x44ef, (q15_t)0x9427, (q15_t)0x44ea, (q15_t)0x9423,
+  (q15_t)0x44e4, (q15_t)0x9420, (q15_t)0x44df, (q15_t)0x941c, (q15_t)0x44da, (q15_t)0x9419, (q15_t)0x44d4, (q15_t)0x9416,
+  (q15_t)0x44cf, (q15_t)0x9412, (q15_t)0x44ca, (q15_t)0x940f, (q15_t)0x44c5, (q15_t)0x940b, (q15_t)0x44bf, (q15_t)0x9408,
+  (q15_t)0x44ba, (q15_t)0x9405, (q15_t)0x44b5, (q15_t)0x9401, (q15_t)0x44af, (q15_t)0x93fe, (q15_t)0x44aa, (q15_t)0x93fb,
+  (q15_t)0x44a5, (q15_t)0x93f7, (q15_t)0x449f, (q15_t)0x93f4, (q15_t)0x449a, (q15_t)0x93f1, (q15_t)0x4495, (q15_t)0x93ed,
+  (q15_t)0x4490, (q15_t)0x93ea, (q15_t)0x448a, (q15_t)0x93e6, (q15_t)0x4485, (q15_t)0x93e3, (q15_t)0x4480, (q15_t)0x93e0,
+  (q15_t)0x447a, (q15_t)0x93dc, (q15_t)0x4475, (q15_t)0x93d9, (q15_t)0x4470, (q15_t)0x93d6, (q15_t)0x446a, (q15_t)0x93d2,
+  (q15_t)0x4465, (q15_t)0x93cf, (q15_t)0x4460, (q15_t)0x93cc, (q15_t)0x445a, (q15_t)0x93c8, (q15_t)0x4455, (q15_t)0x93c5,
+  (q15_t)0x4450, (q15_t)0x93c1, (q15_t)0x444b, (q15_t)0x93be, (q15_t)0x4445, (q15_t)0x93bb, (q15_t)0x4440, (q15_t)0x93b7,
+  (q15_t)0x443b, (q15_t)0x93b4, (q15_t)0x4435, (q15_t)0x93b1, (q15_t)0x4430, (q15_t)0x93ad, (q15_t)0x442b, (q15_t)0x93aa,
+  (q15_t)0x4425, (q15_t)0x93a7, (q15_t)0x4420, (q15_t)0x93a3, (q15_t)0x441b, (q15_t)0x93a0, (q15_t)0x4415, (q15_t)0x939d,
+  (q15_t)0x4410, (q15_t)0x9399, (q15_t)0x440b, (q15_t)0x9396, (q15_t)0x4405, (q15_t)0x9393, (q15_t)0x4400, (q15_t)0x938f,
+  (q15_t)0x43fb, (q15_t)0x938c, (q15_t)0x43f5, (q15_t)0x9389, (q15_t)0x43f0, (q15_t)0x9385, (q15_t)0x43eb, (q15_t)0x9382,
+  (q15_t)0x43e5, (q15_t)0x937f, (q15_t)0x43e0, (q15_t)0x937b, (q15_t)0x43db, (q15_t)0x9378, (q15_t)0x43d5, (q15_t)0x9375,
+  (q15_t)0x43d0, (q15_t)0x9371, (q15_t)0x43cb, (q15_t)0x936e, (q15_t)0x43c5, (q15_t)0x936b, (q15_t)0x43c0, (q15_t)0x9367,
+  (q15_t)0x43bb, (q15_t)0x9364, (q15_t)0x43b5, (q15_t)0x9361, (q15_t)0x43b0, (q15_t)0x935d, (q15_t)0x43ab, (q15_t)0x935a,
+  (q15_t)0x43a5, (q15_t)0x9357, (q15_t)0x43a0, (q15_t)0x9353, (q15_t)0x439b, (q15_t)0x9350, (q15_t)0x4395, (q15_t)0x934d,
+  (q15_t)0x4390, (q15_t)0x9349, (q15_t)0x438b, (q15_t)0x9346, (q15_t)0x4385, (q15_t)0x9343, (q15_t)0x4380, (q15_t)0x933f,
+  (q15_t)0x437b, (q15_t)0x933c, (q15_t)0x4375, (q15_t)0x9339, (q15_t)0x4370, (q15_t)0x9336, (q15_t)0x436b, (q15_t)0x9332,
+  (q15_t)0x4365, (q15_t)0x932f, (q15_t)0x4360, (q15_t)0x932c, (q15_t)0x435b, (q15_t)0x9328, (q15_t)0x4355, (q15_t)0x9325,
+  (q15_t)0x4350, (q15_t)0x9322, (q15_t)0x434b, (q15_t)0x931e, (q15_t)0x4345, (q15_t)0x931b, (q15_t)0x4340, (q15_t)0x9318,
+  (q15_t)0x433b, (q15_t)0x9314, (q15_t)0x4335, (q15_t)0x9311, (q15_t)0x4330, (q15_t)0x930e, (q15_t)0x432b, (q15_t)0x930b,
+  (q15_t)0x4325, (q15_t)0x9307, (q15_t)0x4320, (q15_t)0x9304, (q15_t)0x431b, (q15_t)0x9301, (q15_t)0x4315, (q15_t)0x92fd,
+  (q15_t)0x4310, (q15_t)0x92fa, (q15_t)0x430b, (q15_t)0x92f7, (q15_t)0x4305, (q15_t)0x92f4, (q15_t)0x4300, (q15_t)0x92f0,
+  (q15_t)0x42fa, (q15_t)0x92ed, (q15_t)0x42f5, (q15_t)0x92ea, (q15_t)0x42f0, (q15_t)0x92e6, (q15_t)0x42ea, (q15_t)0x92e3,
+  (q15_t)0x42e5, (q15_t)0x92e0, (q15_t)0x42e0, (q15_t)0x92dd, (q15_t)0x42da, (q15_t)0x92d9, (q15_t)0x42d5, (q15_t)0x92d6,
+  (q15_t)0x42d0, (q15_t)0x92d3, (q15_t)0x42ca, (q15_t)0x92cf, (q15_t)0x42c5, (q15_t)0x92cc, (q15_t)0x42c0, (q15_t)0x92c9,
+  (q15_t)0x42ba, (q15_t)0x92c6, (q15_t)0x42b5, (q15_t)0x92c2, (q15_t)0x42af, (q15_t)0x92bf, (q15_t)0x42aa, (q15_t)0x92bc,
+  (q15_t)0x42a5, (q15_t)0x92b8, (q15_t)0x429f, (q15_t)0x92b5, (q15_t)0x429a, (q15_t)0x92b2, (q15_t)0x4295, (q15_t)0x92af,
+  (q15_t)0x428f, (q15_t)0x92ab, (q15_t)0x428a, (q15_t)0x92a8, (q15_t)0x4284, (q15_t)0x92a5, (q15_t)0x427f, (q15_t)0x92a2,
+  (q15_t)0x427a, (q15_t)0x929e, (q15_t)0x4274, (q15_t)0x929b, (q15_t)0x426f, (q15_t)0x9298, (q15_t)0x426a, (q15_t)0x9295,
+  (q15_t)0x4264, (q15_t)0x9291, (q15_t)0x425f, (q15_t)0x928e, (q15_t)0x425a, (q15_t)0x928b, (q15_t)0x4254, (q15_t)0x9288,
+  (q15_t)0x424f, (q15_t)0x9284, (q15_t)0x4249, (q15_t)0x9281, (q15_t)0x4244, (q15_t)0x927e, (q15_t)0x423f, (q15_t)0x927b,
+  (q15_t)0x4239, (q15_t)0x9277, (q15_t)0x4234, (q15_t)0x9274, (q15_t)0x422f, (q15_t)0x9271, (q15_t)0x4229, (q15_t)0x926e,
+  (q15_t)0x4224, (q15_t)0x926a, (q15_t)0x421e, (q15_t)0x9267, (q15_t)0x4219, (q15_t)0x9264, (q15_t)0x4214, (q15_t)0x9261,
+  (q15_t)0x420e, (q15_t)0x925d, (q15_t)0x4209, (q15_t)0x925a, (q15_t)0x4203, (q15_t)0x9257, (q15_t)0x41fe, (q15_t)0x9254,
+  (q15_t)0x41f9, (q15_t)0x9250, (q15_t)0x41f3, (q15_t)0x924d, (q15_t)0x41ee, (q15_t)0x924a, (q15_t)0x41e9, (q15_t)0x9247,
+  (q15_t)0x41e3, (q15_t)0x9243, (q15_t)0x41de, (q15_t)0x9240, (q15_t)0x41d8, (q15_t)0x923d, (q15_t)0x41d3, (q15_t)0x923a,
+  (q15_t)0x41ce, (q15_t)0x9236, (q15_t)0x41c8, (q15_t)0x9233, (q15_t)0x41c3, (q15_t)0x9230, (q15_t)0x41bd, (q15_t)0x922d,
+  (q15_t)0x41b8, (q15_t)0x922a, (q15_t)0x41b3, (q15_t)0x9226, (q15_t)0x41ad, (q15_t)0x9223, (q15_t)0x41a8, (q15_t)0x9220,
+  (q15_t)0x41a2, (q15_t)0x921d, (q15_t)0x419d, (q15_t)0x9219, (q15_t)0x4198, (q15_t)0x9216, (q15_t)0x4192, (q15_t)0x9213,
+  (q15_t)0x418d, (q15_t)0x9210, (q15_t)0x4188, (q15_t)0x920d, (q15_t)0x4182, (q15_t)0x9209, (q15_t)0x417d, (q15_t)0x9206,
+  (q15_t)0x4177, (q15_t)0x9203, (q15_t)0x4172, (q15_t)0x9200, (q15_t)0x416d, (q15_t)0x91fc, (q15_t)0x4167, (q15_t)0x91f9,
+  (q15_t)0x4162, (q15_t)0x91f6, (q15_t)0x415c, (q15_t)0x91f3, (q15_t)0x4157, (q15_t)0x91f0, (q15_t)0x4152, (q15_t)0x91ec,
+  (q15_t)0x414c, (q15_t)0x91e9, (q15_t)0x4147, (q15_t)0x91e6, (q15_t)0x4141, (q15_t)0x91e3, (q15_t)0x413c, (q15_t)0x91e0,
+  (q15_t)0x4136, (q15_t)0x91dc, (q15_t)0x4131, (q15_t)0x91d9, (q15_t)0x412c, (q15_t)0x91d6, (q15_t)0x4126, (q15_t)0x91d3,
+  (q15_t)0x4121, (q15_t)0x91d0, (q15_t)0x411b, (q15_t)0x91cc, (q15_t)0x4116, (q15_t)0x91c9, (q15_t)0x4111, (q15_t)0x91c6,
+  (q15_t)0x410b, (q15_t)0x91c3, (q15_t)0x4106, (q15_t)0x91c0, (q15_t)0x4100, (q15_t)0x91bc, (q15_t)0x40fb, (q15_t)0x91b9,
+  (q15_t)0x40f6, (q15_t)0x91b6, (q15_t)0x40f0, (q15_t)0x91b3, (q15_t)0x40eb, (q15_t)0x91b0, (q15_t)0x40e5, (q15_t)0x91ad,
+  (q15_t)0x40e0, (q15_t)0x91a9, (q15_t)0x40da, (q15_t)0x91a6, (q15_t)0x40d5, (q15_t)0x91a3, (q15_t)0x40d0, (q15_t)0x91a0,
+  (q15_t)0x40ca, (q15_t)0x919d, (q15_t)0x40c5, (q15_t)0x9199, (q15_t)0x40bf, (q15_t)0x9196, (q15_t)0x40ba, (q15_t)0x9193,
+  (q15_t)0x40b5, (q15_t)0x9190, (q15_t)0x40af, (q15_t)0x918d, (q15_t)0x40aa, (q15_t)0x918a, (q15_t)0x40a4, (q15_t)0x9186,
+  (q15_t)0x409f, (q15_t)0x9183, (q15_t)0x4099, (q15_t)0x9180, (q15_t)0x4094, (q15_t)0x917d, (q15_t)0x408f, (q15_t)0x917a,
+  (q15_t)0x4089, (q15_t)0x9177, (q15_t)0x4084, (q15_t)0x9173, (q15_t)0x407e, (q15_t)0x9170, (q15_t)0x4079, (q15_t)0x916d,
+  (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x406e, (q15_t)0x9167, (q15_t)0x4069, (q15_t)0x9164, (q15_t)0x4063, (q15_t)0x9160,
+  (q15_t)0x405e, (q15_t)0x915d, (q15_t)0x4058, (q15_t)0x915a, (q15_t)0x4053, (q15_t)0x9157, (q15_t)0x404d, (q15_t)0x9154,
+  (q15_t)0x4048, (q15_t)0x9151, (q15_t)0x4043, (q15_t)0x914d, (q15_t)0x403d, (q15_t)0x914a, (q15_t)0x4038, (q15_t)0x9147,
+  (q15_t)0x4032, (q15_t)0x9144, (q15_t)0x402d, (q15_t)0x9141, (q15_t)0x4027, (q15_t)0x913e, (q15_t)0x4022, (q15_t)0x913a,
+  (q15_t)0x401d, (q15_t)0x9137, (q15_t)0x4017, (q15_t)0x9134, (q15_t)0x4012, (q15_t)0x9131, (q15_t)0x400c, (q15_t)0x912e,
+  (q15_t)0x4007, (q15_t)0x912b, (q15_t)0x4001, (q15_t)0x9128, (q15_t)0x3ffc, (q15_t)0x9124, (q15_t)0x3ff6, (q15_t)0x9121,
+  (q15_t)0x3ff1, (q15_t)0x911e, (q15_t)0x3fec, (q15_t)0x911b, (q15_t)0x3fe6, (q15_t)0x9118, (q15_t)0x3fe1, (q15_t)0x9115,
+  (q15_t)0x3fdb, (q15_t)0x9112, (q15_t)0x3fd6, (q15_t)0x910f, (q15_t)0x3fd0, (q15_t)0x910b, (q15_t)0x3fcb, (q15_t)0x9108,
+  (q15_t)0x3fc5, (q15_t)0x9105, (q15_t)0x3fc0, (q15_t)0x9102, (q15_t)0x3fbb, (q15_t)0x90ff, (q15_t)0x3fb5, (q15_t)0x90fc,
+  (q15_t)0x3fb0, (q15_t)0x90f9, (q15_t)0x3faa, (q15_t)0x90f5, (q15_t)0x3fa5, (q15_t)0x90f2, (q15_t)0x3f9f, (q15_t)0x90ef,
+  (q15_t)0x3f9a, (q15_t)0x90ec, (q15_t)0x3f94, (q15_t)0x90e9, (q15_t)0x3f8f, (q15_t)0x90e6, (q15_t)0x3f89, (q15_t)0x90e3,
+  (q15_t)0x3f84, (q15_t)0x90e0, (q15_t)0x3f7f, (q15_t)0x90dd, (q15_t)0x3f79, (q15_t)0x90d9, (q15_t)0x3f74, (q15_t)0x90d6,
+  (q15_t)0x3f6e, (q15_t)0x90d3, (q15_t)0x3f69, (q15_t)0x90d0, (q15_t)0x3f63, (q15_t)0x90cd, (q15_t)0x3f5e, (q15_t)0x90ca,
+  (q15_t)0x3f58, (q15_t)0x90c7, (q15_t)0x3f53, (q15_t)0x90c4, (q15_t)0x3f4d, (q15_t)0x90c1, (q15_t)0x3f48, (q15_t)0x90bd,
+  (q15_t)0x3f43, (q15_t)0x90ba, (q15_t)0x3f3d, (q15_t)0x90b7, (q15_t)0x3f38, (q15_t)0x90b4, (q15_t)0x3f32, (q15_t)0x90b1,
+  (q15_t)0x3f2d, (q15_t)0x90ae, (q15_t)0x3f27, (q15_t)0x90ab, (q15_t)0x3f22, (q15_t)0x90a8, (q15_t)0x3f1c, (q15_t)0x90a5,
+  (q15_t)0x3f17, (q15_t)0x90a1, (q15_t)0x3f11, (q15_t)0x909e, (q15_t)0x3f0c, (q15_t)0x909b, (q15_t)0x3f06, (q15_t)0x9098,
+  (q15_t)0x3f01, (q15_t)0x9095, (q15_t)0x3efb, (q15_t)0x9092, (q15_t)0x3ef6, (q15_t)0x908f, (q15_t)0x3ef1, (q15_t)0x908c,
+  (q15_t)0x3eeb, (q15_t)0x9089, (q15_t)0x3ee6, (q15_t)0x9086, (q15_t)0x3ee0, (q15_t)0x9083, (q15_t)0x3edb, (q15_t)0x907f,
+  (q15_t)0x3ed5, (q15_t)0x907c, (q15_t)0x3ed0, (q15_t)0x9079, (q15_t)0x3eca, (q15_t)0x9076, (q15_t)0x3ec5, (q15_t)0x9073,
+  (q15_t)0x3ebf, (q15_t)0x9070, (q15_t)0x3eba, (q15_t)0x906d, (q15_t)0x3eb4, (q15_t)0x906a, (q15_t)0x3eaf, (q15_t)0x9067,
+  (q15_t)0x3ea9, (q15_t)0x9064, (q15_t)0x3ea4, (q15_t)0x9061, (q15_t)0x3e9e, (q15_t)0x905e, (q15_t)0x3e99, (q15_t)0x905b,
+  (q15_t)0x3e93, (q15_t)0x9057, (q15_t)0x3e8e, (q15_t)0x9054, (q15_t)0x3e88, (q15_t)0x9051, (q15_t)0x3e83, (q15_t)0x904e,
+  (q15_t)0x3e7d, (q15_t)0x904b, (q15_t)0x3e78, (q15_t)0x9048, (q15_t)0x3e73, (q15_t)0x9045, (q15_t)0x3e6d, (q15_t)0x9042,
+  (q15_t)0x3e68, (q15_t)0x903f, (q15_t)0x3e62, (q15_t)0x903c, (q15_t)0x3e5d, (q15_t)0x9039, (q15_t)0x3e57, (q15_t)0x9036,
+  (q15_t)0x3e52, (q15_t)0x9033, (q15_t)0x3e4c, (q15_t)0x9030, (q15_t)0x3e47, (q15_t)0x902d, (q15_t)0x3e41, (q15_t)0x902a,
+  (q15_t)0x3e3c, (q15_t)0x9026, (q15_t)0x3e36, (q15_t)0x9023, (q15_t)0x3e31, (q15_t)0x9020, (q15_t)0x3e2b, (q15_t)0x901d,
+  (q15_t)0x3e26, (q15_t)0x901a, (q15_t)0x3e20, (q15_t)0x9017, (q15_t)0x3e1b, (q15_t)0x9014, (q15_t)0x3e15, (q15_t)0x9011,
+  (q15_t)0x3e10, (q15_t)0x900e, (q15_t)0x3e0a, (q15_t)0x900b, (q15_t)0x3e05, (q15_t)0x9008, (q15_t)0x3dff, (q15_t)0x9005,
+  (q15_t)0x3dfa, (q15_t)0x9002, (q15_t)0x3df4, (q15_t)0x8fff, (q15_t)0x3def, (q15_t)0x8ffc, (q15_t)0x3de9, (q15_t)0x8ff9,
+  (q15_t)0x3de4, (q15_t)0x8ff6, (q15_t)0x3dde, (q15_t)0x8ff3, (q15_t)0x3dd9, (q15_t)0x8ff0, (q15_t)0x3dd3, (q15_t)0x8fed,
+  (q15_t)0x3dce, (q15_t)0x8fea, (q15_t)0x3dc8, (q15_t)0x8fe7, (q15_t)0x3dc3, (q15_t)0x8fe3, (q15_t)0x3dbd, (q15_t)0x8fe0,
+  (q15_t)0x3db8, (q15_t)0x8fdd, (q15_t)0x3db2, (q15_t)0x8fda, (q15_t)0x3dad, (q15_t)0x8fd7, (q15_t)0x3da7, (q15_t)0x8fd4,
+  (q15_t)0x3da2, (q15_t)0x8fd1, (q15_t)0x3d9c, (q15_t)0x8fce, (q15_t)0x3d97, (q15_t)0x8fcb, (q15_t)0x3d91, (q15_t)0x8fc8,
+  (q15_t)0x3d8c, (q15_t)0x8fc5, (q15_t)0x3d86, (q15_t)0x8fc2, (q15_t)0x3d81, (q15_t)0x8fbf, (q15_t)0x3d7b, (q15_t)0x8fbc,
+  (q15_t)0x3d76, (q15_t)0x8fb9, (q15_t)0x3d70, (q15_t)0x8fb6, (q15_t)0x3d6b, (q15_t)0x8fb3, (q15_t)0x3d65, (q15_t)0x8fb0,
+  (q15_t)0x3d60, (q15_t)0x8fad, (q15_t)0x3d5a, (q15_t)0x8faa, (q15_t)0x3d55, (q15_t)0x8fa7, (q15_t)0x3d4f, (q15_t)0x8fa4,
+  (q15_t)0x3d49, (q15_t)0x8fa1, (q15_t)0x3d44, (q15_t)0x8f9e, (q15_t)0x3d3e, (q15_t)0x8f9b, (q15_t)0x3d39, (q15_t)0x8f98,
+  (q15_t)0x3d33, (q15_t)0x8f95, (q15_t)0x3d2e, (q15_t)0x8f92, (q15_t)0x3d28, (q15_t)0x8f8f, (q15_t)0x3d23, (q15_t)0x8f8c,
+  (q15_t)0x3d1d, (q15_t)0x8f89, (q15_t)0x3d18, (q15_t)0x8f86, (q15_t)0x3d12, (q15_t)0x8f83, (q15_t)0x3d0d, (q15_t)0x8f80,
+  (q15_t)0x3d07, (q15_t)0x8f7d, (q15_t)0x3d02, (q15_t)0x8f7a, (q15_t)0x3cfc, (q15_t)0x8f77, (q15_t)0x3cf7, (q15_t)0x8f74,
+  (q15_t)0x3cf1, (q15_t)0x8f71, (q15_t)0x3cec, (q15_t)0x8f6e, (q15_t)0x3ce6, (q15_t)0x8f6b, (q15_t)0x3ce1, (q15_t)0x8f68,
+  (q15_t)0x3cdb, (q15_t)0x8f65, (q15_t)0x3cd6, (q15_t)0x8f62, (q15_t)0x3cd0, (q15_t)0x8f5f, (q15_t)0x3cca, (q15_t)0x8f5c,
+  (q15_t)0x3cc5, (q15_t)0x8f59, (q15_t)0x3cbf, (q15_t)0x8f56, (q15_t)0x3cba, (q15_t)0x8f53, (q15_t)0x3cb4, (q15_t)0x8f50,
+  (q15_t)0x3caf, (q15_t)0x8f4d, (q15_t)0x3ca9, (q15_t)0x8f4a, (q15_t)0x3ca4, (q15_t)0x8f47, (q15_t)0x3c9e, (q15_t)0x8f44,
+  (q15_t)0x3c99, (q15_t)0x8f41, (q15_t)0x3c93, (q15_t)0x8f3e, (q15_t)0x3c8e, (q15_t)0x8f3b, (q15_t)0x3c88, (q15_t)0x8f38,
+  (q15_t)0x3c83, (q15_t)0x8f35, (q15_t)0x3c7d, (q15_t)0x8f32, (q15_t)0x3c77, (q15_t)0x8f2f, (q15_t)0x3c72, (q15_t)0x8f2d,
+  (q15_t)0x3c6c, (q15_t)0x8f2a, (q15_t)0x3c67, (q15_t)0x8f27, (q15_t)0x3c61, (q15_t)0x8f24, (q15_t)0x3c5c, (q15_t)0x8f21,
+  (q15_t)0x3c56, (q15_t)0x8f1e, (q15_t)0x3c51, (q15_t)0x8f1b, (q15_t)0x3c4b, (q15_t)0x8f18, (q15_t)0x3c46, (q15_t)0x8f15,
+  (q15_t)0x3c40, (q15_t)0x8f12, (q15_t)0x3c3b, (q15_t)0x8f0f, (q15_t)0x3c35, (q15_t)0x8f0c, (q15_t)0x3c2f, (q15_t)0x8f09,
+  (q15_t)0x3c2a, (q15_t)0x8f06, (q15_t)0x3c24, (q15_t)0x8f03, (q15_t)0x3c1f, (q15_t)0x8f00, (q15_t)0x3c19, (q15_t)0x8efd,
+  (q15_t)0x3c14, (q15_t)0x8efa, (q15_t)0x3c0e, (q15_t)0x8ef7, (q15_t)0x3c09, (q15_t)0x8ef4, (q15_t)0x3c03, (q15_t)0x8ef1,
+  (q15_t)0x3bfd, (q15_t)0x8eee, (q15_t)0x3bf8, (q15_t)0x8eec, (q15_t)0x3bf2, (q15_t)0x8ee9, (q15_t)0x3bed, (q15_t)0x8ee6,
+  (q15_t)0x3be7, (q15_t)0x8ee3, (q15_t)0x3be2, (q15_t)0x8ee0, (q15_t)0x3bdc, (q15_t)0x8edd, (q15_t)0x3bd7, (q15_t)0x8eda,
+  (q15_t)0x3bd1, (q15_t)0x8ed7, (q15_t)0x3bcc, (q15_t)0x8ed4, (q15_t)0x3bc6, (q15_t)0x8ed1, (q15_t)0x3bc0, (q15_t)0x8ece,
+  (q15_t)0x3bbb, (q15_t)0x8ecb, (q15_t)0x3bb5, (q15_t)0x8ec8, (q15_t)0x3bb0, (q15_t)0x8ec5, (q15_t)0x3baa, (q15_t)0x8ec2,
+  (q15_t)0x3ba5, (q15_t)0x8ebf, (q15_t)0x3b9f, (q15_t)0x8ebd, (q15_t)0x3b99, (q15_t)0x8eba, (q15_t)0x3b94, (q15_t)0x8eb7,
+  (q15_t)0x3b8e, (q15_t)0x8eb4, (q15_t)0x3b89, (q15_t)0x8eb1, (q15_t)0x3b83, (q15_t)0x8eae, (q15_t)0x3b7e, (q15_t)0x8eab,
+  (q15_t)0x3b78, (q15_t)0x8ea8, (q15_t)0x3b73, (q15_t)0x8ea5, (q15_t)0x3b6d, (q15_t)0x8ea2, (q15_t)0x3b67, (q15_t)0x8e9f,
+  (q15_t)0x3b62, (q15_t)0x8e9c, (q15_t)0x3b5c, (q15_t)0x8e99, (q15_t)0x3b57, (q15_t)0x8e97, (q15_t)0x3b51, (q15_t)0x8e94,
+  (q15_t)0x3b4c, (q15_t)0x8e91, (q15_t)0x3b46, (q15_t)0x8e8e, (q15_t)0x3b40, (q15_t)0x8e8b, (q15_t)0x3b3b, (q15_t)0x8e88,
+  (q15_t)0x3b35, (q15_t)0x8e85, (q15_t)0x3b30, (q15_t)0x8e82, (q15_t)0x3b2a, (q15_t)0x8e7f, (q15_t)0x3b25, (q15_t)0x8e7c,
+  (q15_t)0x3b1f, (q15_t)0x8e7a, (q15_t)0x3b19, (q15_t)0x8e77, (q15_t)0x3b14, (q15_t)0x8e74, (q15_t)0x3b0e, (q15_t)0x8e71,
+  (q15_t)0x3b09, (q15_t)0x8e6e, (q15_t)0x3b03, (q15_t)0x8e6b, (q15_t)0x3afe, (q15_t)0x8e68, (q15_t)0x3af8, (q15_t)0x8e65,
+  (q15_t)0x3af2, (q15_t)0x8e62, (q15_t)0x3aed, (q15_t)0x8e5f, (q15_t)0x3ae7, (q15_t)0x8e5d, (q15_t)0x3ae2, (q15_t)0x8e5a,
+  (q15_t)0x3adc, (q15_t)0x8e57, (q15_t)0x3ad7, (q15_t)0x8e54, (q15_t)0x3ad1, (q15_t)0x8e51, (q15_t)0x3acb, (q15_t)0x8e4e,
+  (q15_t)0x3ac6, (q15_t)0x8e4b, (q15_t)0x3ac0, (q15_t)0x8e48, (q15_t)0x3abb, (q15_t)0x8e45, (q15_t)0x3ab5, (q15_t)0x8e43,
+  (q15_t)0x3aaf, (q15_t)0x8e40, (q15_t)0x3aaa, (q15_t)0x8e3d, (q15_t)0x3aa4, (q15_t)0x8e3a, (q15_t)0x3a9f, (q15_t)0x8e37,
+  (q15_t)0x3a99, (q15_t)0x8e34, (q15_t)0x3a94, (q15_t)0x8e31, (q15_t)0x3a8e, (q15_t)0x8e2e, (q15_t)0x3a88, (q15_t)0x8e2c,
+  (q15_t)0x3a83, (q15_t)0x8e29, (q15_t)0x3a7d, (q15_t)0x8e26, (q15_t)0x3a78, (q15_t)0x8e23, (q15_t)0x3a72, (q15_t)0x8e20,
+  (q15_t)0x3a6c, (q15_t)0x8e1d, (q15_t)0x3a67, (q15_t)0x8e1a, (q15_t)0x3a61, (q15_t)0x8e17, (q15_t)0x3a5c, (q15_t)0x8e15,
+  (q15_t)0x3a56, (q15_t)0x8e12, (q15_t)0x3a50, (q15_t)0x8e0f, (q15_t)0x3a4b, (q15_t)0x8e0c, (q15_t)0x3a45, (q15_t)0x8e09,
+  (q15_t)0x3a40, (q15_t)0x8e06, (q15_t)0x3a3a, (q15_t)0x8e03, (q15_t)0x3a34, (q15_t)0x8e01, (q15_t)0x3a2f, (q15_t)0x8dfe,
+  (q15_t)0x3a29, (q15_t)0x8dfb, (q15_t)0x3a24, (q15_t)0x8df8, (q15_t)0x3a1e, (q15_t)0x8df5, (q15_t)0x3a19, (q15_t)0x8df2,
+  (q15_t)0x3a13, (q15_t)0x8def, (q15_t)0x3a0d, (q15_t)0x8ded, (q15_t)0x3a08, (q15_t)0x8dea, (q15_t)0x3a02, (q15_t)0x8de7,
+  (q15_t)0x39fd, (q15_t)0x8de4, (q15_t)0x39f7, (q15_t)0x8de1, (q15_t)0x39f1, (q15_t)0x8dde, (q15_t)0x39ec, (q15_t)0x8ddc,
+  (q15_t)0x39e6, (q15_t)0x8dd9, (q15_t)0x39e0, (q15_t)0x8dd6, (q15_t)0x39db, (q15_t)0x8dd3, (q15_t)0x39d5, (q15_t)0x8dd0,
+  (q15_t)0x39d0, (q15_t)0x8dcd, (q15_t)0x39ca, (q15_t)0x8dca, (q15_t)0x39c4, (q15_t)0x8dc8, (q15_t)0x39bf, (q15_t)0x8dc5,
+  (q15_t)0x39b9, (q15_t)0x8dc2, (q15_t)0x39b4, (q15_t)0x8dbf, (q15_t)0x39ae, (q15_t)0x8dbc, (q15_t)0x39a8, (q15_t)0x8db9,
+  (q15_t)0x39a3, (q15_t)0x8db7, (q15_t)0x399d, (q15_t)0x8db4, (q15_t)0x3998, (q15_t)0x8db1, (q15_t)0x3992, (q15_t)0x8dae,
+  (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3987, (q15_t)0x8da9, (q15_t)0x3981, (q15_t)0x8da6, (q15_t)0x397c, (q15_t)0x8da3,
+  (q15_t)0x3976, (q15_t)0x8da0, (q15_t)0x3970, (q15_t)0x8d9d, (q15_t)0x396b, (q15_t)0x8d9a, (q15_t)0x3965, (q15_t)0x8d98,
+  (q15_t)0x395f, (q15_t)0x8d95, (q15_t)0x395a, (q15_t)0x8d92, (q15_t)0x3954, (q15_t)0x8d8f, (q15_t)0x394f, (q15_t)0x8d8c,
+  (q15_t)0x3949, (q15_t)0x8d8a, (q15_t)0x3943, (q15_t)0x8d87, (q15_t)0x393e, (q15_t)0x8d84, (q15_t)0x3938, (q15_t)0x8d81,
+  (q15_t)0x3932, (q15_t)0x8d7e, (q15_t)0x392d, (q15_t)0x8d7b, (q15_t)0x3927, (q15_t)0x8d79, (q15_t)0x3922, (q15_t)0x8d76,
+  (q15_t)0x391c, (q15_t)0x8d73, (q15_t)0x3916, (q15_t)0x8d70, (q15_t)0x3911, (q15_t)0x8d6d, (q15_t)0x390b, (q15_t)0x8d6b,
+  (q15_t)0x3906, (q15_t)0x8d68, (q15_t)0x3900, (q15_t)0x8d65, (q15_t)0x38fa, (q15_t)0x8d62, (q15_t)0x38f5, (q15_t)0x8d5f,
+  (q15_t)0x38ef, (q15_t)0x8d5d, (q15_t)0x38e9, (q15_t)0x8d5a, (q15_t)0x38e4, (q15_t)0x8d57, (q15_t)0x38de, (q15_t)0x8d54,
+  (q15_t)0x38d8, (q15_t)0x8d51, (q15_t)0x38d3, (q15_t)0x8d4f, (q15_t)0x38cd, (q15_t)0x8d4c, (q15_t)0x38c8, (q15_t)0x8d49,
+  (q15_t)0x38c2, (q15_t)0x8d46, (q15_t)0x38bc, (q15_t)0x8d44, (q15_t)0x38b7, (q15_t)0x8d41, (q15_t)0x38b1, (q15_t)0x8d3e,
+  (q15_t)0x38ab, (q15_t)0x8d3b, (q15_t)0x38a6, (q15_t)0x8d38, (q15_t)0x38a0, (q15_t)0x8d36, (q15_t)0x389b, (q15_t)0x8d33,
+  (q15_t)0x3895, (q15_t)0x8d30, (q15_t)0x388f, (q15_t)0x8d2d, (q15_t)0x388a, (q15_t)0x8d2b, (q15_t)0x3884, (q15_t)0x8d28,
+  (q15_t)0x387e, (q15_t)0x8d25, (q15_t)0x3879, (q15_t)0x8d22, (q15_t)0x3873, (q15_t)0x8d1f, (q15_t)0x386d, (q15_t)0x8d1d,
+  (q15_t)0x3868, (q15_t)0x8d1a, (q15_t)0x3862, (q15_t)0x8d17, (q15_t)0x385d, (q15_t)0x8d14, (q15_t)0x3857, (q15_t)0x8d12,
+  (q15_t)0x3851, (q15_t)0x8d0f, (q15_t)0x384c, (q15_t)0x8d0c, (q15_t)0x3846, (q15_t)0x8d09, (q15_t)0x3840, (q15_t)0x8d07,
+  (q15_t)0x383b, (q15_t)0x8d04, (q15_t)0x3835, (q15_t)0x8d01, (q15_t)0x382f, (q15_t)0x8cfe, (q15_t)0x382a, (q15_t)0x8cfb,
+  (q15_t)0x3824, (q15_t)0x8cf9, (q15_t)0x381e, (q15_t)0x8cf6, (q15_t)0x3819, (q15_t)0x8cf3, (q15_t)0x3813, (q15_t)0x8cf0,
+  (q15_t)0x380d, (q15_t)0x8cee, (q15_t)0x3808, (q15_t)0x8ceb, (q15_t)0x3802, (q15_t)0x8ce8, (q15_t)0x37fd, (q15_t)0x8ce5,
+  (q15_t)0x37f7, (q15_t)0x8ce3, (q15_t)0x37f1, (q15_t)0x8ce0, (q15_t)0x37ec, (q15_t)0x8cdd, (q15_t)0x37e6, (q15_t)0x8cda,
+  (q15_t)0x37e0, (q15_t)0x8cd8, (q15_t)0x37db, (q15_t)0x8cd5, (q15_t)0x37d5, (q15_t)0x8cd2, (q15_t)0x37cf, (q15_t)0x8cd0,
+  (q15_t)0x37ca, (q15_t)0x8ccd, (q15_t)0x37c4, (q15_t)0x8cca, (q15_t)0x37be, (q15_t)0x8cc7, (q15_t)0x37b9, (q15_t)0x8cc5,
+  (q15_t)0x37b3, (q15_t)0x8cc2, (q15_t)0x37ad, (q15_t)0x8cbf, (q15_t)0x37a8, (q15_t)0x8cbc, (q15_t)0x37a2, (q15_t)0x8cba,
+  (q15_t)0x379c, (q15_t)0x8cb7, (q15_t)0x3797, (q15_t)0x8cb4, (q15_t)0x3791, (q15_t)0x8cb1, (q15_t)0x378b, (q15_t)0x8caf,
+  (q15_t)0x3786, (q15_t)0x8cac, (q15_t)0x3780, (q15_t)0x8ca9, (q15_t)0x377a, (q15_t)0x8ca7, (q15_t)0x3775, (q15_t)0x8ca4,
+  (q15_t)0x376f, (q15_t)0x8ca1, (q15_t)0x3769, (q15_t)0x8c9e, (q15_t)0x3764, (q15_t)0x8c9c, (q15_t)0x375e, (q15_t)0x8c99,
+  (q15_t)0x3758, (q15_t)0x8c96, (q15_t)0x3753, (q15_t)0x8c94, (q15_t)0x374d, (q15_t)0x8c91, (q15_t)0x3747, (q15_t)0x8c8e,
+  (q15_t)0x3742, (q15_t)0x8c8b, (q15_t)0x373c, (q15_t)0x8c89, (q15_t)0x3736, (q15_t)0x8c86, (q15_t)0x3731, (q15_t)0x8c83,
+  (q15_t)0x372b, (q15_t)0x8c81, (q15_t)0x3725, (q15_t)0x8c7e, (q15_t)0x3720, (q15_t)0x8c7b, (q15_t)0x371a, (q15_t)0x8c78,
+  (q15_t)0x3714, (q15_t)0x8c76, (q15_t)0x370f, (q15_t)0x8c73, (q15_t)0x3709, (q15_t)0x8c70, (q15_t)0x3703, (q15_t)0x8c6e,
+  (q15_t)0x36fe, (q15_t)0x8c6b, (q15_t)0x36f8, (q15_t)0x8c68, (q15_t)0x36f2, (q15_t)0x8c65, (q15_t)0x36ed, (q15_t)0x8c63,
+  (q15_t)0x36e7, (q15_t)0x8c60, (q15_t)0x36e1, (q15_t)0x8c5d, (q15_t)0x36dc, (q15_t)0x8c5b, (q15_t)0x36d6, (q15_t)0x8c58,
+  (q15_t)0x36d0, (q15_t)0x8c55, (q15_t)0x36cb, (q15_t)0x8c53, (q15_t)0x36c5, (q15_t)0x8c50, (q15_t)0x36bf, (q15_t)0x8c4d,
+  (q15_t)0x36ba, (q15_t)0x8c4b, (q15_t)0x36b4, (q15_t)0x8c48, (q15_t)0x36ae, (q15_t)0x8c45, (q15_t)0x36a9, (q15_t)0x8c43,
+  (q15_t)0x36a3, (q15_t)0x8c40, (q15_t)0x369d, (q15_t)0x8c3d, (q15_t)0x3698, (q15_t)0x8c3a, (q15_t)0x3692, (q15_t)0x8c38,
+  (q15_t)0x368c, (q15_t)0x8c35, (q15_t)0x3686, (q15_t)0x8c32, (q15_t)0x3681, (q15_t)0x8c30, (q15_t)0x367b, (q15_t)0x8c2d,
+  (q15_t)0x3675, (q15_t)0x8c2a, (q15_t)0x3670, (q15_t)0x8c28, (q15_t)0x366a, (q15_t)0x8c25, (q15_t)0x3664, (q15_t)0x8c22,
+  (q15_t)0x365f, (q15_t)0x8c20, (q15_t)0x3659, (q15_t)0x8c1d, (q15_t)0x3653, (q15_t)0x8c1a, (q15_t)0x364e, (q15_t)0x8c18,
+  (q15_t)0x3648, (q15_t)0x8c15, (q15_t)0x3642, (q15_t)0x8c12, (q15_t)0x363d, (q15_t)0x8c10, (q15_t)0x3637, (q15_t)0x8c0d,
+  (q15_t)0x3631, (q15_t)0x8c0a, (q15_t)0x362b, (q15_t)0x8c08, (q15_t)0x3626, (q15_t)0x8c05, (q15_t)0x3620, (q15_t)0x8c02,
+  (q15_t)0x361a, (q15_t)0x8c00, (q15_t)0x3615, (q15_t)0x8bfd, (q15_t)0x360f, (q15_t)0x8bfa, (q15_t)0x3609, (q15_t)0x8bf8,
+  (q15_t)0x3604, (q15_t)0x8bf5, (q15_t)0x35fe, (q15_t)0x8bf3, (q15_t)0x35f8, (q15_t)0x8bf0, (q15_t)0x35f3, (q15_t)0x8bed,
+  (q15_t)0x35ed, (q15_t)0x8beb, (q15_t)0x35e7, (q15_t)0x8be8, (q15_t)0x35e1, (q15_t)0x8be5, (q15_t)0x35dc, (q15_t)0x8be3,
+  (q15_t)0x35d6, (q15_t)0x8be0, (q15_t)0x35d0, (q15_t)0x8bdd, (q15_t)0x35cb, (q15_t)0x8bdb, (q15_t)0x35c5, (q15_t)0x8bd8,
+  (q15_t)0x35bf, (q15_t)0x8bd5, (q15_t)0x35ba, (q15_t)0x8bd3, (q15_t)0x35b4, (q15_t)0x8bd0, (q15_t)0x35ae, (q15_t)0x8bce,
+  (q15_t)0x35a8, (q15_t)0x8bcb, (q15_t)0x35a3, (q15_t)0x8bc8, (q15_t)0x359d, (q15_t)0x8bc6, (q15_t)0x3597, (q15_t)0x8bc3,
+  (q15_t)0x3592, (q15_t)0x8bc0, (q15_t)0x358c, (q15_t)0x8bbe, (q15_t)0x3586, (q15_t)0x8bbb, (q15_t)0x3580, (q15_t)0x8bb8,
+  (q15_t)0x357b, (q15_t)0x8bb6, (q15_t)0x3575, (q15_t)0x8bb3, (q15_t)0x356f, (q15_t)0x8bb1, (q15_t)0x356a, (q15_t)0x8bae,
+  (q15_t)0x3564, (q15_t)0x8bab, (q15_t)0x355e, (q15_t)0x8ba9, (q15_t)0x3558, (q15_t)0x8ba6, (q15_t)0x3553, (q15_t)0x8ba4,
+  (q15_t)0x354d, (q15_t)0x8ba1, (q15_t)0x3547, (q15_t)0x8b9e, (q15_t)0x3542, (q15_t)0x8b9c, (q15_t)0x353c, (q15_t)0x8b99,
+  (q15_t)0x3536, (q15_t)0x8b96, (q15_t)0x3530, (q15_t)0x8b94, (q15_t)0x352b, (q15_t)0x8b91, (q15_t)0x3525, (q15_t)0x8b8f,
+  (q15_t)0x351f, (q15_t)0x8b8c, (q15_t)0x351a, (q15_t)0x8b89, (q15_t)0x3514, (q15_t)0x8b87, (q15_t)0x350e, (q15_t)0x8b84,
+  (q15_t)0x3508, (q15_t)0x8b82, (q15_t)0x3503, (q15_t)0x8b7f, (q15_t)0x34fd, (q15_t)0x8b7c, (q15_t)0x34f7, (q15_t)0x8b7a,
+  (q15_t)0x34f2, (q15_t)0x8b77, (q15_t)0x34ec, (q15_t)0x8b75, (q15_t)0x34e6, (q15_t)0x8b72, (q15_t)0x34e0, (q15_t)0x8b6f,
+  (q15_t)0x34db, (q15_t)0x8b6d, (q15_t)0x34d5, (q15_t)0x8b6a, (q15_t)0x34cf, (q15_t)0x8b68, (q15_t)0x34ca, (q15_t)0x8b65,
+  (q15_t)0x34c4, (q15_t)0x8b62, (q15_t)0x34be, (q15_t)0x8b60, (q15_t)0x34b8, (q15_t)0x8b5d, (q15_t)0x34b3, (q15_t)0x8b5b,
+  (q15_t)0x34ad, (q15_t)0x8b58, (q15_t)0x34a7, (q15_t)0x8b55, (q15_t)0x34a1, (q15_t)0x8b53, (q15_t)0x349c, (q15_t)0x8b50,
+  (q15_t)0x3496, (q15_t)0x8b4e, (q15_t)0x3490, (q15_t)0x8b4b, (q15_t)0x348b, (q15_t)0x8b49, (q15_t)0x3485, (q15_t)0x8b46,
+  (q15_t)0x347f, (q15_t)0x8b43, (q15_t)0x3479, (q15_t)0x8b41, (q15_t)0x3474, (q15_t)0x8b3e, (q15_t)0x346e, (q15_t)0x8b3c,
+  (q15_t)0x3468, (q15_t)0x8b39, (q15_t)0x3462, (q15_t)0x8b37, (q15_t)0x345d, (q15_t)0x8b34, (q15_t)0x3457, (q15_t)0x8b31,
+  (q15_t)0x3451, (q15_t)0x8b2f, (q15_t)0x344b, (q15_t)0x8b2c, (q15_t)0x3446, (q15_t)0x8b2a, (q15_t)0x3440, (q15_t)0x8b27,
+  (q15_t)0x343a, (q15_t)0x8b25, (q15_t)0x3435, (q15_t)0x8b22, (q15_t)0x342f, (q15_t)0x8b1f, (q15_t)0x3429, (q15_t)0x8b1d,
+  (q15_t)0x3423, (q15_t)0x8b1a, (q15_t)0x341e, (q15_t)0x8b18, (q15_t)0x3418, (q15_t)0x8b15, (q15_t)0x3412, (q15_t)0x8b13,
+  (q15_t)0x340c, (q15_t)0x8b10, (q15_t)0x3407, (q15_t)0x8b0e, (q15_t)0x3401, (q15_t)0x8b0b, (q15_t)0x33fb, (q15_t)0x8b08,
+  (q15_t)0x33f5, (q15_t)0x8b06, (q15_t)0x33f0, (q15_t)0x8b03, (q15_t)0x33ea, (q15_t)0x8b01, (q15_t)0x33e4, (q15_t)0x8afe,
+  (q15_t)0x33de, (q15_t)0x8afc, (q15_t)0x33d9, (q15_t)0x8af9, (q15_t)0x33d3, (q15_t)0x8af7, (q15_t)0x33cd, (q15_t)0x8af4,
+  (q15_t)0x33c7, (q15_t)0x8af1, (q15_t)0x33c2, (q15_t)0x8aef, (q15_t)0x33bc, (q15_t)0x8aec, (q15_t)0x33b6, (q15_t)0x8aea,
+  (q15_t)0x33b0, (q15_t)0x8ae7, (q15_t)0x33ab, (q15_t)0x8ae5, (q15_t)0x33a5, (q15_t)0x8ae2, (q15_t)0x339f, (q15_t)0x8ae0,
+  (q15_t)0x3399, (q15_t)0x8add, (q15_t)0x3394, (q15_t)0x8adb, (q15_t)0x338e, (q15_t)0x8ad8, (q15_t)0x3388, (q15_t)0x8ad6,
+  (q15_t)0x3382, (q15_t)0x8ad3, (q15_t)0x337d, (q15_t)0x8ad1, (q15_t)0x3377, (q15_t)0x8ace, (q15_t)0x3371, (q15_t)0x8acb,
+  (q15_t)0x336b, (q15_t)0x8ac9, (q15_t)0x3366, (q15_t)0x8ac6, (q15_t)0x3360, (q15_t)0x8ac4, (q15_t)0x335a, (q15_t)0x8ac1,
+  (q15_t)0x3354, (q15_t)0x8abf, (q15_t)0x334f, (q15_t)0x8abc, (q15_t)0x3349, (q15_t)0x8aba, (q15_t)0x3343, (q15_t)0x8ab7,
+  (q15_t)0x333d, (q15_t)0x8ab5, (q15_t)0x3338, (q15_t)0x8ab2, (q15_t)0x3332, (q15_t)0x8ab0, (q15_t)0x332c, (q15_t)0x8aad,
+  (q15_t)0x3326, (q15_t)0x8aab, (q15_t)0x3321, (q15_t)0x8aa8, (q15_t)0x331b, (q15_t)0x8aa6, (q15_t)0x3315, (q15_t)0x8aa3,
+  (q15_t)0x330f, (q15_t)0x8aa1, (q15_t)0x330a, (q15_t)0x8a9e, (q15_t)0x3304, (q15_t)0x8a9c, (q15_t)0x32fe, (q15_t)0x8a99,
+  (q15_t)0x32f8, (q15_t)0x8a97, (q15_t)0x32f3, (q15_t)0x8a94, (q15_t)0x32ed, (q15_t)0x8a92, (q15_t)0x32e7, (q15_t)0x8a8f,
+  (q15_t)0x32e1, (q15_t)0x8a8d, (q15_t)0x32db, (q15_t)0x8a8a, (q15_t)0x32d6, (q15_t)0x8a88, (q15_t)0x32d0, (q15_t)0x8a85,
+  (q15_t)0x32ca, (q15_t)0x8a83, (q15_t)0x32c4, (q15_t)0x8a80, (q15_t)0x32bf, (q15_t)0x8a7e, (q15_t)0x32b9, (q15_t)0x8a7b,
+  (q15_t)0x32b3, (q15_t)0x8a79, (q15_t)0x32ad, (q15_t)0x8a76, (q15_t)0x32a8, (q15_t)0x8a74, (q15_t)0x32a2, (q15_t)0x8a71,
+  (q15_t)0x329c, (q15_t)0x8a6f, (q15_t)0x3296, (q15_t)0x8a6c, (q15_t)0x3290, (q15_t)0x8a6a, (q15_t)0x328b, (q15_t)0x8a67,
+  (q15_t)0x3285, (q15_t)0x8a65, (q15_t)0x327f, (q15_t)0x8a62, (q15_t)0x3279, (q15_t)0x8a60, (q15_t)0x3274, (q15_t)0x8a5d,
+  (q15_t)0x326e, (q15_t)0x8a5b, (q15_t)0x3268, (q15_t)0x8a59, (q15_t)0x3262, (q15_t)0x8a56, (q15_t)0x325d, (q15_t)0x8a54,
+  (q15_t)0x3257, (q15_t)0x8a51, (q15_t)0x3251, (q15_t)0x8a4f, (q15_t)0x324b, (q15_t)0x8a4c, (q15_t)0x3245, (q15_t)0x8a4a,
+  (q15_t)0x3240, (q15_t)0x8a47, (q15_t)0x323a, (q15_t)0x8a45, (q15_t)0x3234, (q15_t)0x8a42, (q15_t)0x322e, (q15_t)0x8a40,
+  (q15_t)0x3228, (q15_t)0x8a3d, (q15_t)0x3223, (q15_t)0x8a3b, (q15_t)0x321d, (q15_t)0x8a38, (q15_t)0x3217, (q15_t)0x8a36,
+  (q15_t)0x3211, (q15_t)0x8a34, (q15_t)0x320c, (q15_t)0x8a31, (q15_t)0x3206, (q15_t)0x8a2f, (q15_t)0x3200, (q15_t)0x8a2c,
+  (q15_t)0x31fa, (q15_t)0x8a2a, (q15_t)0x31f4, (q15_t)0x8a27, (q15_t)0x31ef, (q15_t)0x8a25, (q15_t)0x31e9, (q15_t)0x8a22,
+  (q15_t)0x31e3, (q15_t)0x8a20, (q15_t)0x31dd, (q15_t)0x8a1d, (q15_t)0x31d8, (q15_t)0x8a1b, (q15_t)0x31d2, (q15_t)0x8a19,
+  (q15_t)0x31cc, (q15_t)0x8a16, (q15_t)0x31c6, (q15_t)0x8a14, (q15_t)0x31c0, (q15_t)0x8a11, (q15_t)0x31bb, (q15_t)0x8a0f,
+  (q15_t)0x31b5, (q15_t)0x8a0c, (q15_t)0x31af, (q15_t)0x8a0a, (q15_t)0x31a9, (q15_t)0x8a07, (q15_t)0x31a3, (q15_t)0x8a05,
+  (q15_t)0x319e, (q15_t)0x8a03, (q15_t)0x3198, (q15_t)0x8a00, (q15_t)0x3192, (q15_t)0x89fe, (q15_t)0x318c, (q15_t)0x89fb,
+  (q15_t)0x3186, (q15_t)0x89f9, (q15_t)0x3181, (q15_t)0x89f6, (q15_t)0x317b, (q15_t)0x89f4, (q15_t)0x3175, (q15_t)0x89f2,
+  (q15_t)0x316f, (q15_t)0x89ef, (q15_t)0x3169, (q15_t)0x89ed, (q15_t)0x3164, (q15_t)0x89ea, (q15_t)0x315e, (q15_t)0x89e8,
+  (q15_t)0x3158, (q15_t)0x89e5, (q15_t)0x3152, (q15_t)0x89e3, (q15_t)0x314c, (q15_t)0x89e1, (q15_t)0x3147, (q15_t)0x89de,
+  (q15_t)0x3141, (q15_t)0x89dc, (q15_t)0x313b, (q15_t)0x89d9, (q15_t)0x3135, (q15_t)0x89d7, (q15_t)0x312f, (q15_t)0x89d5,
+  (q15_t)0x312a, (q15_t)0x89d2, (q15_t)0x3124, (q15_t)0x89d0, (q15_t)0x311e, (q15_t)0x89cd, (q15_t)0x3118, (q15_t)0x89cb,
+  (q15_t)0x3112, (q15_t)0x89c8, (q15_t)0x310d, (q15_t)0x89c6, (q15_t)0x3107, (q15_t)0x89c4, (q15_t)0x3101, (q15_t)0x89c1,
+  (q15_t)0x30fb, (q15_t)0x89bf, (q15_t)0x30f5, (q15_t)0x89bc, (q15_t)0x30f0, (q15_t)0x89ba, (q15_t)0x30ea, (q15_t)0x89b8,
+  (q15_t)0x30e4, (q15_t)0x89b5, (q15_t)0x30de, (q15_t)0x89b3, (q15_t)0x30d8, (q15_t)0x89b0, (q15_t)0x30d3, (q15_t)0x89ae,
+  (q15_t)0x30cd, (q15_t)0x89ac, (q15_t)0x30c7, (q15_t)0x89a9, (q15_t)0x30c1, (q15_t)0x89a7, (q15_t)0x30bb, (q15_t)0x89a4,
+  (q15_t)0x30b6, (q15_t)0x89a2, (q15_t)0x30b0, (q15_t)0x89a0, (q15_t)0x30aa, (q15_t)0x899d, (q15_t)0x30a4, (q15_t)0x899b,
+  (q15_t)0x309e, (q15_t)0x8998, (q15_t)0x3099, (q15_t)0x8996, (q15_t)0x3093, (q15_t)0x8994, (q15_t)0x308d, (q15_t)0x8991,
+  (q15_t)0x3087, (q15_t)0x898f, (q15_t)0x3081, (q15_t)0x898d, (q15_t)0x307b, (q15_t)0x898a, (q15_t)0x3076, (q15_t)0x8988,
+  (q15_t)0x3070, (q15_t)0x8985, (q15_t)0x306a, (q15_t)0x8983, (q15_t)0x3064, (q15_t)0x8981, (q15_t)0x305e, (q15_t)0x897e,
+  (q15_t)0x3059, (q15_t)0x897c, (q15_t)0x3053, (q15_t)0x897a, (q15_t)0x304d, (q15_t)0x8977, (q15_t)0x3047, (q15_t)0x8975,
+  (q15_t)0x3041, (q15_t)0x8972, (q15_t)0x303b, (q15_t)0x8970, (q15_t)0x3036, (q15_t)0x896e, (q15_t)0x3030, (q15_t)0x896b,
+  (q15_t)0x302a, (q15_t)0x8969, (q15_t)0x3024, (q15_t)0x8967, (q15_t)0x301e, (q15_t)0x8964, (q15_t)0x3019, (q15_t)0x8962,
+  (q15_t)0x3013, (q15_t)0x8960, (q15_t)0x300d, (q15_t)0x895d, (q15_t)0x3007, (q15_t)0x895b, (q15_t)0x3001, (q15_t)0x8958,
+  (q15_t)0x2ffb, (q15_t)0x8956, (q15_t)0x2ff6, (q15_t)0x8954, (q15_t)0x2ff0, (q15_t)0x8951, (q15_t)0x2fea, (q15_t)0x894f,
+  (q15_t)0x2fe4, (q15_t)0x894d, (q15_t)0x2fde, (q15_t)0x894a, (q15_t)0x2fd8, (q15_t)0x8948, (q15_t)0x2fd3, (q15_t)0x8946,
+  (q15_t)0x2fcd, (q15_t)0x8943, (q15_t)0x2fc7, (q15_t)0x8941, (q15_t)0x2fc1, (q15_t)0x893f, (q15_t)0x2fbb, (q15_t)0x893c,
+  (q15_t)0x2fb5, (q15_t)0x893a, (q15_t)0x2fb0, (q15_t)0x8938, (q15_t)0x2faa, (q15_t)0x8935, (q15_t)0x2fa4, (q15_t)0x8933,
+  (q15_t)0x2f9e, (q15_t)0x8931, (q15_t)0x2f98, (q15_t)0x892e, (q15_t)0x2f92, (q15_t)0x892c, (q15_t)0x2f8d, (q15_t)0x892a,
+  (q15_t)0x2f87, (q15_t)0x8927, (q15_t)0x2f81, (q15_t)0x8925, (q15_t)0x2f7b, (q15_t)0x8923, (q15_t)0x2f75, (q15_t)0x8920,
+  (q15_t)0x2f6f, (q15_t)0x891e, (q15_t)0x2f6a, (q15_t)0x891c, (q15_t)0x2f64, (q15_t)0x8919, (q15_t)0x2f5e, (q15_t)0x8917,
+  (q15_t)0x2f58, (q15_t)0x8915, (q15_t)0x2f52, (q15_t)0x8912, (q15_t)0x2f4c, (q15_t)0x8910, (q15_t)0x2f47, (q15_t)0x890e,
+  (q15_t)0x2f41, (q15_t)0x890b, (q15_t)0x2f3b, (q15_t)0x8909, (q15_t)0x2f35, (q15_t)0x8907, (q15_t)0x2f2f, (q15_t)0x8904,
+  (q15_t)0x2f29, (q15_t)0x8902, (q15_t)0x2f24, (q15_t)0x8900, (q15_t)0x2f1e, (q15_t)0x88fd, (q15_t)0x2f18, (q15_t)0x88fb,
+  (q15_t)0x2f12, (q15_t)0x88f9, (q15_t)0x2f0c, (q15_t)0x88f6, (q15_t)0x2f06, (q15_t)0x88f4, (q15_t)0x2f01, (q15_t)0x88f2,
+  (q15_t)0x2efb, (q15_t)0x88f0, (q15_t)0x2ef5, (q15_t)0x88ed, (q15_t)0x2eef, (q15_t)0x88eb, (q15_t)0x2ee9, (q15_t)0x88e9,
+  (q15_t)0x2ee3, (q15_t)0x88e6, (q15_t)0x2edd, (q15_t)0x88e4, (q15_t)0x2ed8, (q15_t)0x88e2, (q15_t)0x2ed2, (q15_t)0x88df,
+  (q15_t)0x2ecc, (q15_t)0x88dd, (q15_t)0x2ec6, (q15_t)0x88db, (q15_t)0x2ec0, (q15_t)0x88d9, (q15_t)0x2eba, (q15_t)0x88d6,
+  (q15_t)0x2eb5, (q15_t)0x88d4, (q15_t)0x2eaf, (q15_t)0x88d2, (q15_t)0x2ea9, (q15_t)0x88cf, (q15_t)0x2ea3, (q15_t)0x88cd,
+  (q15_t)0x2e9d, (q15_t)0x88cb, (q15_t)0x2e97, (q15_t)0x88c8, (q15_t)0x2e91, (q15_t)0x88c6, (q15_t)0x2e8c, (q15_t)0x88c4,
+  (q15_t)0x2e86, (q15_t)0x88c2, (q15_t)0x2e80, (q15_t)0x88bf, (q15_t)0x2e7a, (q15_t)0x88bd, (q15_t)0x2e74, (q15_t)0x88bb,
+  (q15_t)0x2e6e, (q15_t)0x88b9, (q15_t)0x2e68, (q15_t)0x88b6, (q15_t)0x2e63, (q15_t)0x88b4, (q15_t)0x2e5d, (q15_t)0x88b2,
+  (q15_t)0x2e57, (q15_t)0x88af, (q15_t)0x2e51, (q15_t)0x88ad, (q15_t)0x2e4b, (q15_t)0x88ab, (q15_t)0x2e45, (q15_t)0x88a9,
+  (q15_t)0x2e3f, (q15_t)0x88a6, (q15_t)0x2e3a, (q15_t)0x88a4, (q15_t)0x2e34, (q15_t)0x88a2, (q15_t)0x2e2e, (q15_t)0x88a0,
+  (q15_t)0x2e28, (q15_t)0x889d, (q15_t)0x2e22, (q15_t)0x889b, (q15_t)0x2e1c, (q15_t)0x8899, (q15_t)0x2e16, (q15_t)0x8896,
+  (q15_t)0x2e11, (q15_t)0x8894, (q15_t)0x2e0b, (q15_t)0x8892, (q15_t)0x2e05, (q15_t)0x8890, (q15_t)0x2dff, (q15_t)0x888d,
+  (q15_t)0x2df9, (q15_t)0x888b, (q15_t)0x2df3, (q15_t)0x8889, (q15_t)0x2ded, (q15_t)0x8887, (q15_t)0x2de7, (q15_t)0x8884,
+  (q15_t)0x2de2, (q15_t)0x8882, (q15_t)0x2ddc, (q15_t)0x8880, (q15_t)0x2dd6, (q15_t)0x887e, (q15_t)0x2dd0, (q15_t)0x887b,
+  (q15_t)0x2dca, (q15_t)0x8879, (q15_t)0x2dc4, (q15_t)0x8877, (q15_t)0x2dbe, (q15_t)0x8875, (q15_t)0x2db9, (q15_t)0x8872,
+  (q15_t)0x2db3, (q15_t)0x8870, (q15_t)0x2dad, (q15_t)0x886e, (q15_t)0x2da7, (q15_t)0x886c, (q15_t)0x2da1, (q15_t)0x8869,
+  (q15_t)0x2d9b, (q15_t)0x8867, (q15_t)0x2d95, (q15_t)0x8865, (q15_t)0x2d8f, (q15_t)0x8863, (q15_t)0x2d8a, (q15_t)0x8860,
+  (q15_t)0x2d84, (q15_t)0x885e, (q15_t)0x2d7e, (q15_t)0x885c, (q15_t)0x2d78, (q15_t)0x885a, (q15_t)0x2d72, (q15_t)0x8858,
+  (q15_t)0x2d6c, (q15_t)0x8855, (q15_t)0x2d66, (q15_t)0x8853, (q15_t)0x2d60, (q15_t)0x8851, (q15_t)0x2d5b, (q15_t)0x884f,
+  (q15_t)0x2d55, (q15_t)0x884c, (q15_t)0x2d4f, (q15_t)0x884a, (q15_t)0x2d49, (q15_t)0x8848, (q15_t)0x2d43, (q15_t)0x8846,
+  (q15_t)0x2d3d, (q15_t)0x8844, (q15_t)0x2d37, (q15_t)0x8841, (q15_t)0x2d31, (q15_t)0x883f, (q15_t)0x2d2c, (q15_t)0x883d,
+  (q15_t)0x2d26, (q15_t)0x883b, (q15_t)0x2d20, (q15_t)0x8838, (q15_t)0x2d1a, (q15_t)0x8836, (q15_t)0x2d14, (q15_t)0x8834,
+  (q15_t)0x2d0e, (q15_t)0x8832, (q15_t)0x2d08, (q15_t)0x8830, (q15_t)0x2d02, (q15_t)0x882d, (q15_t)0x2cfd, (q15_t)0x882b,
+  (q15_t)0x2cf7, (q15_t)0x8829, (q15_t)0x2cf1, (q15_t)0x8827, (q15_t)0x2ceb, (q15_t)0x8825, (q15_t)0x2ce5, (q15_t)0x8822,
+  (q15_t)0x2cdf, (q15_t)0x8820, (q15_t)0x2cd9, (q15_t)0x881e, (q15_t)0x2cd3, (q15_t)0x881c, (q15_t)0x2ccd, (q15_t)0x881a,
+  (q15_t)0x2cc8, (q15_t)0x8817, (q15_t)0x2cc2, (q15_t)0x8815, (q15_t)0x2cbc, (q15_t)0x8813, (q15_t)0x2cb6, (q15_t)0x8811,
+  (q15_t)0x2cb0, (q15_t)0x880f, (q15_t)0x2caa, (q15_t)0x880c, (q15_t)0x2ca4, (q15_t)0x880a, (q15_t)0x2c9e, (q15_t)0x8808,
+  (q15_t)0x2c98, (q15_t)0x8806, (q15_t)0x2c93, (q15_t)0x8804, (q15_t)0x2c8d, (q15_t)0x8801, (q15_t)0x2c87, (q15_t)0x87ff,
+  (q15_t)0x2c81, (q15_t)0x87fd, (q15_t)0x2c7b, (q15_t)0x87fb, (q15_t)0x2c75, (q15_t)0x87f9, (q15_t)0x2c6f, (q15_t)0x87f6,
+  (q15_t)0x2c69, (q15_t)0x87f4, (q15_t)0x2c63, (q15_t)0x87f2, (q15_t)0x2c5e, (q15_t)0x87f0, (q15_t)0x2c58, (q15_t)0x87ee,
+  (q15_t)0x2c52, (q15_t)0x87ec, (q15_t)0x2c4c, (q15_t)0x87e9, (q15_t)0x2c46, (q15_t)0x87e7, (q15_t)0x2c40, (q15_t)0x87e5,
+  (q15_t)0x2c3a, (q15_t)0x87e3, (q15_t)0x2c34, (q15_t)0x87e1, (q15_t)0x2c2e, (q15_t)0x87df, (q15_t)0x2c29, (q15_t)0x87dc,
+  (q15_t)0x2c23, (q15_t)0x87da, (q15_t)0x2c1d, (q15_t)0x87d8, (q15_t)0x2c17, (q15_t)0x87d6, (q15_t)0x2c11, (q15_t)0x87d4,
+  (q15_t)0x2c0b, (q15_t)0x87d2, (q15_t)0x2c05, (q15_t)0x87cf, (q15_t)0x2bff, (q15_t)0x87cd, (q15_t)0x2bf9, (q15_t)0x87cb,
+  (q15_t)0x2bf3, (q15_t)0x87c9, (q15_t)0x2bee, (q15_t)0x87c7, (q15_t)0x2be8, (q15_t)0x87c5, (q15_t)0x2be2, (q15_t)0x87c2,
+  (q15_t)0x2bdc, (q15_t)0x87c0, (q15_t)0x2bd6, (q15_t)0x87be, (q15_t)0x2bd0, (q15_t)0x87bc, (q15_t)0x2bca, (q15_t)0x87ba,
+  (q15_t)0x2bc4, (q15_t)0x87b8, (q15_t)0x2bbe, (q15_t)0x87b6, (q15_t)0x2bb8, (q15_t)0x87b3, (q15_t)0x2bb2, (q15_t)0x87b1,
+  (q15_t)0x2bad, (q15_t)0x87af, (q15_t)0x2ba7, (q15_t)0x87ad, (q15_t)0x2ba1, (q15_t)0x87ab, (q15_t)0x2b9b, (q15_t)0x87a9,
+  (q15_t)0x2b95, (q15_t)0x87a7, (q15_t)0x2b8f, (q15_t)0x87a4, (q15_t)0x2b89, (q15_t)0x87a2, (q15_t)0x2b83, (q15_t)0x87a0,
+  (q15_t)0x2b7d, (q15_t)0x879e, (q15_t)0x2b77, (q15_t)0x879c, (q15_t)0x2b71, (q15_t)0x879a, (q15_t)0x2b6c, (q15_t)0x8798,
+  (q15_t)0x2b66, (q15_t)0x8795, (q15_t)0x2b60, (q15_t)0x8793, (q15_t)0x2b5a, (q15_t)0x8791, (q15_t)0x2b54, (q15_t)0x878f,
+  (q15_t)0x2b4e, (q15_t)0x878d, (q15_t)0x2b48, (q15_t)0x878b, (q15_t)0x2b42, (q15_t)0x8789, (q15_t)0x2b3c, (q15_t)0x8787,
+  (q15_t)0x2b36, (q15_t)0x8784, (q15_t)0x2b30, (q15_t)0x8782, (q15_t)0x2b2b, (q15_t)0x8780, (q15_t)0x2b25, (q15_t)0x877e,
+  (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x2b19, (q15_t)0x877a, (q15_t)0x2b13, (q15_t)0x8778, (q15_t)0x2b0d, (q15_t)0x8776,
+  (q15_t)0x2b07, (q15_t)0x8774, (q15_t)0x2b01, (q15_t)0x8771, (q15_t)0x2afb, (q15_t)0x876f, (q15_t)0x2af5, (q15_t)0x876d,
+  (q15_t)0x2aef, (q15_t)0x876b, (q15_t)0x2ae9, (q15_t)0x8769, (q15_t)0x2ae4, (q15_t)0x8767, (q15_t)0x2ade, (q15_t)0x8765,
+  (q15_t)0x2ad8, (q15_t)0x8763, (q15_t)0x2ad2, (q15_t)0x8761, (q15_t)0x2acc, (q15_t)0x875e, (q15_t)0x2ac6, (q15_t)0x875c,
+  (q15_t)0x2ac0, (q15_t)0x875a, (q15_t)0x2aba, (q15_t)0x8758, (q15_t)0x2ab4, (q15_t)0x8756, (q15_t)0x2aae, (q15_t)0x8754,
+  (q15_t)0x2aa8, (q15_t)0x8752, (q15_t)0x2aa2, (q15_t)0x8750, (q15_t)0x2a9c, (q15_t)0x874e, (q15_t)0x2a97, (q15_t)0x874c,
+  (q15_t)0x2a91, (q15_t)0x874a, (q15_t)0x2a8b, (q15_t)0x8747, (q15_t)0x2a85, (q15_t)0x8745, (q15_t)0x2a7f, (q15_t)0x8743,
+  (q15_t)0x2a79, (q15_t)0x8741, (q15_t)0x2a73, (q15_t)0x873f, (q15_t)0x2a6d, (q15_t)0x873d, (q15_t)0x2a67, (q15_t)0x873b,
+  (q15_t)0x2a61, (q15_t)0x8739, (q15_t)0x2a5b, (q15_t)0x8737, (q15_t)0x2a55, (q15_t)0x8735, (q15_t)0x2a4f, (q15_t)0x8733,
+  (q15_t)0x2a49, (q15_t)0x8731, (q15_t)0x2a44, (q15_t)0x872e, (q15_t)0x2a3e, (q15_t)0x872c, (q15_t)0x2a38, (q15_t)0x872a,
+  (q15_t)0x2a32, (q15_t)0x8728, (q15_t)0x2a2c, (q15_t)0x8726, (q15_t)0x2a26, (q15_t)0x8724, (q15_t)0x2a20, (q15_t)0x8722,
+  (q15_t)0x2a1a, (q15_t)0x8720, (q15_t)0x2a14, (q15_t)0x871e, (q15_t)0x2a0e, (q15_t)0x871c, (q15_t)0x2a08, (q15_t)0x871a,
+  (q15_t)0x2a02, (q15_t)0x8718, (q15_t)0x29fc, (q15_t)0x8716, (q15_t)0x29f6, (q15_t)0x8714, (q15_t)0x29f0, (q15_t)0x8712,
+  (q15_t)0x29eb, (q15_t)0x870f, (q15_t)0x29e5, (q15_t)0x870d, (q15_t)0x29df, (q15_t)0x870b, (q15_t)0x29d9, (q15_t)0x8709,
+  (q15_t)0x29d3, (q15_t)0x8707, (q15_t)0x29cd, (q15_t)0x8705, (q15_t)0x29c7, (q15_t)0x8703, (q15_t)0x29c1, (q15_t)0x8701,
+  (q15_t)0x29bb, (q15_t)0x86ff, (q15_t)0x29b5, (q15_t)0x86fd, (q15_t)0x29af, (q15_t)0x86fb, (q15_t)0x29a9, (q15_t)0x86f9,
+  (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x299d, (q15_t)0x86f5, (q15_t)0x2997, (q15_t)0x86f3, (q15_t)0x2991, (q15_t)0x86f1,
+  (q15_t)0x298b, (q15_t)0x86ef, (q15_t)0x2986, (q15_t)0x86ed, (q15_t)0x2980, (q15_t)0x86eb, (q15_t)0x297a, (q15_t)0x86e9,
+  (q15_t)0x2974, (q15_t)0x86e7, (q15_t)0x296e, (q15_t)0x86e4, (q15_t)0x2968, (q15_t)0x86e2, (q15_t)0x2962, (q15_t)0x86e0,
+  (q15_t)0x295c, (q15_t)0x86de, (q15_t)0x2956, (q15_t)0x86dc, (q15_t)0x2950, (q15_t)0x86da, (q15_t)0x294a, (q15_t)0x86d8,
+  (q15_t)0x2944, (q15_t)0x86d6, (q15_t)0x293e, (q15_t)0x86d4, (q15_t)0x2938, (q15_t)0x86d2, (q15_t)0x2932, (q15_t)0x86d0,
+  (q15_t)0x292c, (q15_t)0x86ce, (q15_t)0x2926, (q15_t)0x86cc, (q15_t)0x2920, (q15_t)0x86ca, (q15_t)0x291b, (q15_t)0x86c8,
+  (q15_t)0x2915, (q15_t)0x86c6, (q15_t)0x290f, (q15_t)0x86c4, (q15_t)0x2909, (q15_t)0x86c2, (q15_t)0x2903, (q15_t)0x86c0,
+  (q15_t)0x28fd, (q15_t)0x86be, (q15_t)0x28f7, (q15_t)0x86bc, (q15_t)0x28f1, (q15_t)0x86ba, (q15_t)0x28eb, (q15_t)0x86b8,
+  (q15_t)0x28e5, (q15_t)0x86b6, (q15_t)0x28df, (q15_t)0x86b4, (q15_t)0x28d9, (q15_t)0x86b2, (q15_t)0x28d3, (q15_t)0x86b0,
+  (q15_t)0x28cd, (q15_t)0x86ae, (q15_t)0x28c7, (q15_t)0x86ac, (q15_t)0x28c1, (q15_t)0x86aa, (q15_t)0x28bb, (q15_t)0x86a8,
+  (q15_t)0x28b5, (q15_t)0x86a6, (q15_t)0x28af, (q15_t)0x86a4, (q15_t)0x28a9, (q15_t)0x86a2, (q15_t)0x28a3, (q15_t)0x86a0,
+  (q15_t)0x289d, (q15_t)0x869e, (q15_t)0x2898, (q15_t)0x869c, (q15_t)0x2892, (q15_t)0x869a, (q15_t)0x288c, (q15_t)0x8698,
+  (q15_t)0x2886, (q15_t)0x8696, (q15_t)0x2880, (q15_t)0x8694, (q15_t)0x287a, (q15_t)0x8692, (q15_t)0x2874, (q15_t)0x8690,
+  (q15_t)0x286e, (q15_t)0x868e, (q15_t)0x2868, (q15_t)0x868c, (q15_t)0x2862, (q15_t)0x868a, (q15_t)0x285c, (q15_t)0x8688,
+  (q15_t)0x2856, (q15_t)0x8686, (q15_t)0x2850, (q15_t)0x8684, (q15_t)0x284a, (q15_t)0x8682, (q15_t)0x2844, (q15_t)0x8680,
+  (q15_t)0x283e, (q15_t)0x867e, (q15_t)0x2838, (q15_t)0x867c, (q15_t)0x2832, (q15_t)0x867a, (q15_t)0x282c, (q15_t)0x8678,
+  (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x2820, (q15_t)0x8674, (q15_t)0x281a, (q15_t)0x8672, (q15_t)0x2814, (q15_t)0x8670,
+  (q15_t)0x280e, (q15_t)0x866e, (q15_t)0x2808, (q15_t)0x866d, (q15_t)0x2802, (q15_t)0x866b, (q15_t)0x27fc, (q15_t)0x8669,
+  (q15_t)0x27f6, (q15_t)0x8667, (q15_t)0x27f1, (q15_t)0x8665, (q15_t)0x27eb, (q15_t)0x8663, (q15_t)0x27e5, (q15_t)0x8661,
+  (q15_t)0x27df, (q15_t)0x865f, (q15_t)0x27d9, (q15_t)0x865d, (q15_t)0x27d3, (q15_t)0x865b, (q15_t)0x27cd, (q15_t)0x8659,
+  (q15_t)0x27c7, (q15_t)0x8657, (q15_t)0x27c1, (q15_t)0x8655, (q15_t)0x27bb, (q15_t)0x8653, (q15_t)0x27b5, (q15_t)0x8651,
+  (q15_t)0x27af, (q15_t)0x864f, (q15_t)0x27a9, (q15_t)0x864d, (q15_t)0x27a3, (q15_t)0x864b, (q15_t)0x279d, (q15_t)0x8649,
+  (q15_t)0x2797, (q15_t)0x8647, (q15_t)0x2791, (q15_t)0x8645, (q15_t)0x278b, (q15_t)0x8644, (q15_t)0x2785, (q15_t)0x8642,
+  (q15_t)0x277f, (q15_t)0x8640, (q15_t)0x2779, (q15_t)0x863e, (q15_t)0x2773, (q15_t)0x863c, (q15_t)0x276d, (q15_t)0x863a,
+  (q15_t)0x2767, (q15_t)0x8638, (q15_t)0x2761, (q15_t)0x8636, (q15_t)0x275b, (q15_t)0x8634, (q15_t)0x2755, (q15_t)0x8632,
+  (q15_t)0x274f, (q15_t)0x8630, (q15_t)0x2749, (q15_t)0x862e, (q15_t)0x2743, (q15_t)0x862c, (q15_t)0x273d, (q15_t)0x862a,
+  (q15_t)0x2737, (q15_t)0x8628, (q15_t)0x2731, (q15_t)0x8627, (q15_t)0x272b, (q15_t)0x8625, (q15_t)0x2725, (q15_t)0x8623,
+  (q15_t)0x271f, (q15_t)0x8621, (q15_t)0x2719, (q15_t)0x861f, (q15_t)0x2713, (q15_t)0x861d, (q15_t)0x270d, (q15_t)0x861b,
+  (q15_t)0x2707, (q15_t)0x8619, (q15_t)0x2701, (q15_t)0x8617, (q15_t)0x26fb, (q15_t)0x8615, (q15_t)0x26f5, (q15_t)0x8613,
+  (q15_t)0x26ef, (q15_t)0x8611, (q15_t)0x26e9, (q15_t)0x8610, (q15_t)0x26e4, (q15_t)0x860e, (q15_t)0x26de, (q15_t)0x860c,
+  (q15_t)0x26d8, (q15_t)0x860a, (q15_t)0x26d2, (q15_t)0x8608, (q15_t)0x26cc, (q15_t)0x8606, (q15_t)0x26c6, (q15_t)0x8604,
+  (q15_t)0x26c0, (q15_t)0x8602, (q15_t)0x26ba, (q15_t)0x8600, (q15_t)0x26b4, (q15_t)0x85fe, (q15_t)0x26ae, (q15_t)0x85fc,
+  (q15_t)0x26a8, (q15_t)0x85fb, (q15_t)0x26a2, (q15_t)0x85f9, (q15_t)0x269c, (q15_t)0x85f7, (q15_t)0x2696, (q15_t)0x85f5,
+  (q15_t)0x2690, (q15_t)0x85f3, (q15_t)0x268a, (q15_t)0x85f1, (q15_t)0x2684, (q15_t)0x85ef, (q15_t)0x267e, (q15_t)0x85ed,
+  (q15_t)0x2678, (q15_t)0x85eb, (q15_t)0x2672, (q15_t)0x85ea, (q15_t)0x266c, (q15_t)0x85e8, (q15_t)0x2666, (q15_t)0x85e6,
+  (q15_t)0x2660, (q15_t)0x85e4, (q15_t)0x265a, (q15_t)0x85e2, (q15_t)0x2654, (q15_t)0x85e0, (q15_t)0x264e, (q15_t)0x85de,
+  (q15_t)0x2648, (q15_t)0x85dc, (q15_t)0x2642, (q15_t)0x85da, (q15_t)0x263c, (q15_t)0x85d9, (q15_t)0x2636, (q15_t)0x85d7,
+  (q15_t)0x2630, (q15_t)0x85d5, (q15_t)0x262a, (q15_t)0x85d3, (q15_t)0x2624, (q15_t)0x85d1, (q15_t)0x261e, (q15_t)0x85cf,
+  (q15_t)0x2618, (q15_t)0x85cd, (q15_t)0x2612, (q15_t)0x85cb, (q15_t)0x260c, (q15_t)0x85ca, (q15_t)0x2606, (q15_t)0x85c8,
+  (q15_t)0x2600, (q15_t)0x85c6, (q15_t)0x25fa, (q15_t)0x85c4, (q15_t)0x25f4, (q15_t)0x85c2, (q15_t)0x25ee, (q15_t)0x85c0,
+  (q15_t)0x25e8, (q15_t)0x85be, (q15_t)0x25e2, (q15_t)0x85bd, (q15_t)0x25dc, (q15_t)0x85bb, (q15_t)0x25d6, (q15_t)0x85b9,
+  (q15_t)0x25d0, (q15_t)0x85b7, (q15_t)0x25ca, (q15_t)0x85b5, (q15_t)0x25c4, (q15_t)0x85b3, (q15_t)0x25be, (q15_t)0x85b1,
+  (q15_t)0x25b8, (q15_t)0x85b0, (q15_t)0x25b2, (q15_t)0x85ae, (q15_t)0x25ac, (q15_t)0x85ac, (q15_t)0x25a6, (q15_t)0x85aa,
+  (q15_t)0x25a0, (q15_t)0x85a8, (q15_t)0x259a, (q15_t)0x85a6, (q15_t)0x2594, (q15_t)0x85a4, (q15_t)0x258e, (q15_t)0x85a3,
+  (q15_t)0x2588, (q15_t)0x85a1, (q15_t)0x2582, (q15_t)0x859f, (q15_t)0x257c, (q15_t)0x859d, (q15_t)0x2576, (q15_t)0x859b,
+  (q15_t)0x2570, (q15_t)0x8599, (q15_t)0x256a, (q15_t)0x8598, (q15_t)0x2564, (q15_t)0x8596, (q15_t)0x255e, (q15_t)0x8594,
+  (q15_t)0x2558, (q15_t)0x8592, (q15_t)0x2552, (q15_t)0x8590, (q15_t)0x254c, (q15_t)0x858e, (q15_t)0x2546, (q15_t)0x858d,
+  (q15_t)0x2540, (q15_t)0x858b, (q15_t)0x253a, (q15_t)0x8589, (q15_t)0x2534, (q15_t)0x8587, (q15_t)0x252e, (q15_t)0x8585,
+  (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x2522, (q15_t)0x8582, (q15_t)0x251c, (q15_t)0x8580, (q15_t)0x2516, (q15_t)0x857e,
+  (q15_t)0x250f, (q15_t)0x857c, (q15_t)0x2509, (q15_t)0x857a, (q15_t)0x2503, (q15_t)0x8579, (q15_t)0x24fd, (q15_t)0x8577,
+  (q15_t)0x24f7, (q15_t)0x8575, (q15_t)0x24f1, (q15_t)0x8573, (q15_t)0x24eb, (q15_t)0x8571, (q15_t)0x24e5, (q15_t)0x856f,
+  (q15_t)0x24df, (q15_t)0x856e, (q15_t)0x24d9, (q15_t)0x856c, (q15_t)0x24d3, (q15_t)0x856a, (q15_t)0x24cd, (q15_t)0x8568,
+  (q15_t)0x24c7, (q15_t)0x8566, (q15_t)0x24c1, (q15_t)0x8565, (q15_t)0x24bb, (q15_t)0x8563, (q15_t)0x24b5, (q15_t)0x8561,
+  (q15_t)0x24af, (q15_t)0x855f, (q15_t)0x24a9, (q15_t)0x855d, (q15_t)0x24a3, (q15_t)0x855c, (q15_t)0x249d, (q15_t)0x855a,
+  (q15_t)0x2497, (q15_t)0x8558, (q15_t)0x2491, (q15_t)0x8556, (q15_t)0x248b, (q15_t)0x8554, (q15_t)0x2485, (q15_t)0x8553,
+  (q15_t)0x247f, (q15_t)0x8551, (q15_t)0x2479, (q15_t)0x854f, (q15_t)0x2473, (q15_t)0x854d, (q15_t)0x246d, (q15_t)0x854b,
+  (q15_t)0x2467, (q15_t)0x854a, (q15_t)0x2461, (q15_t)0x8548, (q15_t)0x245b, (q15_t)0x8546, (q15_t)0x2455, (q15_t)0x8544,
+  (q15_t)0x244f, (q15_t)0x8543, (q15_t)0x2449, (q15_t)0x8541, (q15_t)0x2443, (q15_t)0x853f, (q15_t)0x243d, (q15_t)0x853d,
+  (q15_t)0x2437, (q15_t)0x853b, (q15_t)0x2431, (q15_t)0x853a, (q15_t)0x242b, (q15_t)0x8538, (q15_t)0x2425, (q15_t)0x8536,
+  (q15_t)0x241f, (q15_t)0x8534, (q15_t)0x2419, (q15_t)0x8533, (q15_t)0x2413, (q15_t)0x8531, (q15_t)0x240d, (q15_t)0x852f,
+  (q15_t)0x2407, (q15_t)0x852d, (q15_t)0x2401, (q15_t)0x852b, (q15_t)0x23fa, (q15_t)0x852a, (q15_t)0x23f4, (q15_t)0x8528,
+  (q15_t)0x23ee, (q15_t)0x8526, (q15_t)0x23e8, (q15_t)0x8524, (q15_t)0x23e2, (q15_t)0x8523, (q15_t)0x23dc, (q15_t)0x8521,
+  (q15_t)0x23d6, (q15_t)0x851f, (q15_t)0x23d0, (q15_t)0x851d, (q15_t)0x23ca, (q15_t)0x851c, (q15_t)0x23c4, (q15_t)0x851a,
+  (q15_t)0x23be, (q15_t)0x8518, (q15_t)0x23b8, (q15_t)0x8516, (q15_t)0x23b2, (q15_t)0x8515, (q15_t)0x23ac, (q15_t)0x8513,
+  (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x23a0, (q15_t)0x850f, (q15_t)0x239a, (q15_t)0x850e, (q15_t)0x2394, (q15_t)0x850c,
+  (q15_t)0x238e, (q15_t)0x850a, (q15_t)0x2388, (q15_t)0x8508, (q15_t)0x2382, (q15_t)0x8507, (q15_t)0x237c, (q15_t)0x8505,
+  (q15_t)0x2376, (q15_t)0x8503, (q15_t)0x2370, (q15_t)0x8501, (q15_t)0x236a, (q15_t)0x8500, (q15_t)0x2364, (q15_t)0x84fe,
+  (q15_t)0x235e, (q15_t)0x84fc, (q15_t)0x2358, (q15_t)0x84fa, (q15_t)0x2352, (q15_t)0x84f9, (q15_t)0x234b, (q15_t)0x84f7,
+  (q15_t)0x2345, (q15_t)0x84f5, (q15_t)0x233f, (q15_t)0x84f4, (q15_t)0x2339, (q15_t)0x84f2, (q15_t)0x2333, (q15_t)0x84f0,
+  (q15_t)0x232d, (q15_t)0x84ee, (q15_t)0x2327, (q15_t)0x84ed, (q15_t)0x2321, (q15_t)0x84eb, (q15_t)0x231b, (q15_t)0x84e9,
+  (q15_t)0x2315, (q15_t)0x84e7, (q15_t)0x230f, (q15_t)0x84e6, (q15_t)0x2309, (q15_t)0x84e4, (q15_t)0x2303, (q15_t)0x84e2,
+  (q15_t)0x22fd, (q15_t)0x84e1, (q15_t)0x22f7, (q15_t)0x84df, (q15_t)0x22f1, (q15_t)0x84dd, (q15_t)0x22eb, (q15_t)0x84db,
+  (q15_t)0x22e5, (q15_t)0x84da, (q15_t)0x22df, (q15_t)0x84d8, (q15_t)0x22d9, (q15_t)0x84d6, (q15_t)0x22d3, (q15_t)0x84d5,
+  (q15_t)0x22cd, (q15_t)0x84d3, (q15_t)0x22c7, (q15_t)0x84d1, (q15_t)0x22c0, (q15_t)0x84cf, (q15_t)0x22ba, (q15_t)0x84ce,
+  (q15_t)0x22b4, (q15_t)0x84cc, (q15_t)0x22ae, (q15_t)0x84ca, (q15_t)0x22a8, (q15_t)0x84c9, (q15_t)0x22a2, (q15_t)0x84c7,
+  (q15_t)0x229c, (q15_t)0x84c5, (q15_t)0x2296, (q15_t)0x84c4, (q15_t)0x2290, (q15_t)0x84c2, (q15_t)0x228a, (q15_t)0x84c0,
+  (q15_t)0x2284, (q15_t)0x84be, (q15_t)0x227e, (q15_t)0x84bd, (q15_t)0x2278, (q15_t)0x84bb, (q15_t)0x2272, (q15_t)0x84b9,
+  (q15_t)0x226c, (q15_t)0x84b8, (q15_t)0x2266, (q15_t)0x84b6, (q15_t)0x2260, (q15_t)0x84b4, (q15_t)0x225a, (q15_t)0x84b3,
+  (q15_t)0x2254, (q15_t)0x84b1, (q15_t)0x224e, (q15_t)0x84af, (q15_t)0x2247, (q15_t)0x84ae, (q15_t)0x2241, (q15_t)0x84ac,
+  (q15_t)0x223b, (q15_t)0x84aa, (q15_t)0x2235, (q15_t)0x84a9, (q15_t)0x222f, (q15_t)0x84a7, (q15_t)0x2229, (q15_t)0x84a5,
+  (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x221d, (q15_t)0x84a2, (q15_t)0x2217, (q15_t)0x84a0, (q15_t)0x2211, (q15_t)0x849e,
+  (q15_t)0x220b, (q15_t)0x849d, (q15_t)0x2205, (q15_t)0x849b, (q15_t)0x21ff, (q15_t)0x8499, (q15_t)0x21f9, (q15_t)0x8498,
+  (q15_t)0x21f3, (q15_t)0x8496, (q15_t)0x21ed, (q15_t)0x8494, (q15_t)0x21e7, (q15_t)0x8493, (q15_t)0x21e1, (q15_t)0x8491,
+  (q15_t)0x21da, (q15_t)0x848f, (q15_t)0x21d4, (q15_t)0x848e, (q15_t)0x21ce, (q15_t)0x848c, (q15_t)0x21c8, (q15_t)0x848a,
+  (q15_t)0x21c2, (q15_t)0x8489, (q15_t)0x21bc, (q15_t)0x8487, (q15_t)0x21b6, (q15_t)0x8486, (q15_t)0x21b0, (q15_t)0x8484,
+  (q15_t)0x21aa, (q15_t)0x8482, (q15_t)0x21a4, (q15_t)0x8481, (q15_t)0x219e, (q15_t)0x847f, (q15_t)0x2198, (q15_t)0x847d,
+  (q15_t)0x2192, (q15_t)0x847c, (q15_t)0x218c, (q15_t)0x847a, (q15_t)0x2186, (q15_t)0x8478, (q15_t)0x2180, (q15_t)0x8477,
+  (q15_t)0x2179, (q15_t)0x8475, (q15_t)0x2173, (q15_t)0x8473, (q15_t)0x216d, (q15_t)0x8472, (q15_t)0x2167, (q15_t)0x8470,
+  (q15_t)0x2161, (q15_t)0x846e, (q15_t)0x215b, (q15_t)0x846d, (q15_t)0x2155, (q15_t)0x846b, (q15_t)0x214f, (q15_t)0x846a,
+  (q15_t)0x2149, (q15_t)0x8468, (q15_t)0x2143, (q15_t)0x8466, (q15_t)0x213d, (q15_t)0x8465, (q15_t)0x2137, (q15_t)0x8463,
+  (q15_t)0x2131, (q15_t)0x8461, (q15_t)0x212b, (q15_t)0x8460, (q15_t)0x2125, (q15_t)0x845e, (q15_t)0x211e, (q15_t)0x845d,
+  (q15_t)0x2118, (q15_t)0x845b, (q15_t)0x2112, (q15_t)0x8459, (q15_t)0x210c, (q15_t)0x8458, (q15_t)0x2106, (q15_t)0x8456,
+  (q15_t)0x2100, (q15_t)0x8454, (q15_t)0x20fa, (q15_t)0x8453, (q15_t)0x20f4, (q15_t)0x8451, (q15_t)0x20ee, (q15_t)0x8450,
+  (q15_t)0x20e8, (q15_t)0x844e, (q15_t)0x20e2, (q15_t)0x844c, (q15_t)0x20dc, (q15_t)0x844b, (q15_t)0x20d6, (q15_t)0x8449,
+  (q15_t)0x20d0, (q15_t)0x8447, (q15_t)0x20c9, (q15_t)0x8446, (q15_t)0x20c3, (q15_t)0x8444, (q15_t)0x20bd, (q15_t)0x8443,
+  (q15_t)0x20b7, (q15_t)0x8441, (q15_t)0x20b1, (q15_t)0x843f, (q15_t)0x20ab, (q15_t)0x843e, (q15_t)0x20a5, (q15_t)0x843c,
+  (q15_t)0x209f, (q15_t)0x843b, (q15_t)0x2099, (q15_t)0x8439, (q15_t)0x2093, (q15_t)0x8437, (q15_t)0x208d, (q15_t)0x8436,
+  (q15_t)0x2087, (q15_t)0x8434, (q15_t)0x2081, (q15_t)0x8433, (q15_t)0x207a, (q15_t)0x8431, (q15_t)0x2074, (q15_t)0x842f,
+  (q15_t)0x206e, (q15_t)0x842e, (q15_t)0x2068, (q15_t)0x842c, (q15_t)0x2062, (q15_t)0x842b, (q15_t)0x205c, (q15_t)0x8429,
+  (q15_t)0x2056, (q15_t)0x8427, (q15_t)0x2050, (q15_t)0x8426, (q15_t)0x204a, (q15_t)0x8424, (q15_t)0x2044, (q15_t)0x8423,
+  (q15_t)0x203e, (q15_t)0x8421, (q15_t)0x2038, (q15_t)0x8420, (q15_t)0x2032, (q15_t)0x841e, (q15_t)0x202b, (q15_t)0x841c,
+  (q15_t)0x2025, (q15_t)0x841b, (q15_t)0x201f, (q15_t)0x8419, (q15_t)0x2019, (q15_t)0x8418, (q15_t)0x2013, (q15_t)0x8416,
+  (q15_t)0x200d, (q15_t)0x8415, (q15_t)0x2007, (q15_t)0x8413, (q15_t)0x2001, (q15_t)0x8411, (q15_t)0x1ffb, (q15_t)0x8410,
+  (q15_t)0x1ff5, (q15_t)0x840e, (q15_t)0x1fef, (q15_t)0x840d, (q15_t)0x1fe9, (q15_t)0x840b, (q15_t)0x1fe2, (q15_t)0x840a,
+  (q15_t)0x1fdc, (q15_t)0x8408, (q15_t)0x1fd6, (q15_t)0x8406, (q15_t)0x1fd0, (q15_t)0x8405, (q15_t)0x1fca, (q15_t)0x8403,
+  (q15_t)0x1fc4, (q15_t)0x8402, (q15_t)0x1fbe, (q15_t)0x8400, (q15_t)0x1fb8, (q15_t)0x83ff, (q15_t)0x1fb2, (q15_t)0x83fd,
+  (q15_t)0x1fac, (q15_t)0x83fb, (q15_t)0x1fa6, (q15_t)0x83fa, (q15_t)0x1f9f, (q15_t)0x83f8, (q15_t)0x1f99, (q15_t)0x83f7,
+  (q15_t)0x1f93, (q15_t)0x83f5, (q15_t)0x1f8d, (q15_t)0x83f4, (q15_t)0x1f87, (q15_t)0x83f2, (q15_t)0x1f81, (q15_t)0x83f1,
+  (q15_t)0x1f7b, (q15_t)0x83ef, (q15_t)0x1f75, (q15_t)0x83ee, (q15_t)0x1f6f, (q15_t)0x83ec, (q15_t)0x1f69, (q15_t)0x83ea,
+  (q15_t)0x1f63, (q15_t)0x83e9, (q15_t)0x1f5d, (q15_t)0x83e7, (q15_t)0x1f56, (q15_t)0x83e6, (q15_t)0x1f50, (q15_t)0x83e4,
+  (q15_t)0x1f4a, (q15_t)0x83e3, (q15_t)0x1f44, (q15_t)0x83e1, (q15_t)0x1f3e, (q15_t)0x83e0, (q15_t)0x1f38, (q15_t)0x83de,
+  (q15_t)0x1f32, (q15_t)0x83dd, (q15_t)0x1f2c, (q15_t)0x83db, (q15_t)0x1f26, (q15_t)0x83da, (q15_t)0x1f20, (q15_t)0x83d8,
+  (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1f13, (q15_t)0x83d5, (q15_t)0x1f0d, (q15_t)0x83d3, (q15_t)0x1f07, (q15_t)0x83d2,
+  (q15_t)0x1f01, (q15_t)0x83d0, (q15_t)0x1efb, (q15_t)0x83cf, (q15_t)0x1ef5, (q15_t)0x83cd, (q15_t)0x1eef, (q15_t)0x83cc,
+  (q15_t)0x1ee9, (q15_t)0x83ca, (q15_t)0x1ee3, (q15_t)0x83c9, (q15_t)0x1edd, (q15_t)0x83c7, (q15_t)0x1ed6, (q15_t)0x83c6,
+  (q15_t)0x1ed0, (q15_t)0x83c4, (q15_t)0x1eca, (q15_t)0x83c3, (q15_t)0x1ec4, (q15_t)0x83c1, (q15_t)0x1ebe, (q15_t)0x83c0,
+  (q15_t)0x1eb8, (q15_t)0x83be, (q15_t)0x1eb2, (q15_t)0x83bd, (q15_t)0x1eac, (q15_t)0x83bb, (q15_t)0x1ea6, (q15_t)0x83ba,
+  (q15_t)0x1ea0, (q15_t)0x83b8, (q15_t)0x1e99, (q15_t)0x83b7, (q15_t)0x1e93, (q15_t)0x83b5, (q15_t)0x1e8d, (q15_t)0x83b4,
+  (q15_t)0x1e87, (q15_t)0x83b2, (q15_t)0x1e81, (q15_t)0x83b1, (q15_t)0x1e7b, (q15_t)0x83af, (q15_t)0x1e75, (q15_t)0x83ae,
+  (q15_t)0x1e6f, (q15_t)0x83ac, (q15_t)0x1e69, (q15_t)0x83ab, (q15_t)0x1e62, (q15_t)0x83a9, (q15_t)0x1e5c, (q15_t)0x83a8,
+  (q15_t)0x1e56, (q15_t)0x83a6, (q15_t)0x1e50, (q15_t)0x83a5, (q15_t)0x1e4a, (q15_t)0x83a3, (q15_t)0x1e44, (q15_t)0x83a2,
+  (q15_t)0x1e3e, (q15_t)0x83a0, (q15_t)0x1e38, (q15_t)0x839f, (q15_t)0x1e32, (q15_t)0x839d, (q15_t)0x1e2c, (q15_t)0x839c,
+  (q15_t)0x1e25, (q15_t)0x839a, (q15_t)0x1e1f, (q15_t)0x8399, (q15_t)0x1e19, (q15_t)0x8397, (q15_t)0x1e13, (q15_t)0x8396,
+  (q15_t)0x1e0d, (q15_t)0x8394, (q15_t)0x1e07, (q15_t)0x8393, (q15_t)0x1e01, (q15_t)0x8392, (q15_t)0x1dfb, (q15_t)0x8390,
+  (q15_t)0x1df5, (q15_t)0x838f, (q15_t)0x1dee, (q15_t)0x838d, (q15_t)0x1de8, (q15_t)0x838c, (q15_t)0x1de2, (q15_t)0x838a,
+  (q15_t)0x1ddc, (q15_t)0x8389, (q15_t)0x1dd6, (q15_t)0x8387, (q15_t)0x1dd0, (q15_t)0x8386, (q15_t)0x1dca, (q15_t)0x8384,
+  (q15_t)0x1dc4, (q15_t)0x8383, (q15_t)0x1dbe, (q15_t)0x8381, (q15_t)0x1db7, (q15_t)0x8380, (q15_t)0x1db1, (q15_t)0x837e,
+  (q15_t)0x1dab, (q15_t)0x837d, (q15_t)0x1da5, (q15_t)0x837c, (q15_t)0x1d9f, (q15_t)0x837a, (q15_t)0x1d99, (q15_t)0x8379,
+  (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1d8d, (q15_t)0x8376, (q15_t)0x1d87, (q15_t)0x8374, (q15_t)0x1d80, (q15_t)0x8373,
+  (q15_t)0x1d7a, (q15_t)0x8371, (q15_t)0x1d74, (q15_t)0x8370, (q15_t)0x1d6e, (q15_t)0x836f, (q15_t)0x1d68, (q15_t)0x836d,
+  (q15_t)0x1d62, (q15_t)0x836c, (q15_t)0x1d5c, (q15_t)0x836a, (q15_t)0x1d56, (q15_t)0x8369, (q15_t)0x1d50, (q15_t)0x8367,
+  (q15_t)0x1d49, (q15_t)0x8366, (q15_t)0x1d43, (q15_t)0x8364, (q15_t)0x1d3d, (q15_t)0x8363, (q15_t)0x1d37, (q15_t)0x8362,
+  (q15_t)0x1d31, (q15_t)0x8360, (q15_t)0x1d2b, (q15_t)0x835f, (q15_t)0x1d25, (q15_t)0x835d, (q15_t)0x1d1f, (q15_t)0x835c,
+  (q15_t)0x1d18, (q15_t)0x835a, (q15_t)0x1d12, (q15_t)0x8359, (q15_t)0x1d0c, (q15_t)0x8358, (q15_t)0x1d06, (q15_t)0x8356,
+  (q15_t)0x1d00, (q15_t)0x8355, (q15_t)0x1cfa, (q15_t)0x8353, (q15_t)0x1cf4, (q15_t)0x8352, (q15_t)0x1cee, (q15_t)0x8350,
+  (q15_t)0x1ce8, (q15_t)0x834f, (q15_t)0x1ce1, (q15_t)0x834e, (q15_t)0x1cdb, (q15_t)0x834c, (q15_t)0x1cd5, (q15_t)0x834b,
+  (q15_t)0x1ccf, (q15_t)0x8349, (q15_t)0x1cc9, (q15_t)0x8348, (q15_t)0x1cc3, (q15_t)0x8347, (q15_t)0x1cbd, (q15_t)0x8345,
+  (q15_t)0x1cb7, (q15_t)0x8344, (q15_t)0x1cb0, (q15_t)0x8342, (q15_t)0x1caa, (q15_t)0x8341, (q15_t)0x1ca4, (q15_t)0x833f,
+  (q15_t)0x1c9e, (q15_t)0x833e, (q15_t)0x1c98, (q15_t)0x833d, (q15_t)0x1c92, (q15_t)0x833b, (q15_t)0x1c8c, (q15_t)0x833a,
+  (q15_t)0x1c86, (q15_t)0x8338, (q15_t)0x1c7f, (q15_t)0x8337, (q15_t)0x1c79, (q15_t)0x8336, (q15_t)0x1c73, (q15_t)0x8334,
+  (q15_t)0x1c6d, (q15_t)0x8333, (q15_t)0x1c67, (q15_t)0x8331, (q15_t)0x1c61, (q15_t)0x8330, (q15_t)0x1c5b, (q15_t)0x832f,
+  (q15_t)0x1c55, (q15_t)0x832d, (q15_t)0x1c4e, (q15_t)0x832c, (q15_t)0x1c48, (q15_t)0x832b, (q15_t)0x1c42, (q15_t)0x8329,
+  (q15_t)0x1c3c, (q15_t)0x8328, (q15_t)0x1c36, (q15_t)0x8326, (q15_t)0x1c30, (q15_t)0x8325, (q15_t)0x1c2a, (q15_t)0x8324,
+  (q15_t)0x1c24, (q15_t)0x8322, (q15_t)0x1c1d, (q15_t)0x8321, (q15_t)0x1c17, (q15_t)0x831f, (q15_t)0x1c11, (q15_t)0x831e,
+  (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1c05, (q15_t)0x831b, (q15_t)0x1bff, (q15_t)0x831a, (q15_t)0x1bf9, (q15_t)0x8319,
+  (q15_t)0x1bf2, (q15_t)0x8317, (q15_t)0x1bec, (q15_t)0x8316, (q15_t)0x1be6, (q15_t)0x8314, (q15_t)0x1be0, (q15_t)0x8313,
+  (q15_t)0x1bda, (q15_t)0x8312, (q15_t)0x1bd4, (q15_t)0x8310, (q15_t)0x1bce, (q15_t)0x830f, (q15_t)0x1bc8, (q15_t)0x830e,
+  (q15_t)0x1bc1, (q15_t)0x830c, (q15_t)0x1bbb, (q15_t)0x830b, (q15_t)0x1bb5, (q15_t)0x830a, (q15_t)0x1baf, (q15_t)0x8308,
+  (q15_t)0x1ba9, (q15_t)0x8307, (q15_t)0x1ba3, (q15_t)0x8305, (q15_t)0x1b9d, (q15_t)0x8304, (q15_t)0x1b96, (q15_t)0x8303,
+  (q15_t)0x1b90, (q15_t)0x8301, (q15_t)0x1b8a, (q15_t)0x8300, (q15_t)0x1b84, (q15_t)0x82ff, (q15_t)0x1b7e, (q15_t)0x82fd,
+  (q15_t)0x1b78, (q15_t)0x82fc, (q15_t)0x1b72, (q15_t)0x82fb, (q15_t)0x1b6c, (q15_t)0x82f9, (q15_t)0x1b65, (q15_t)0x82f8,
+  (q15_t)0x1b5f, (q15_t)0x82f7, (q15_t)0x1b59, (q15_t)0x82f5, (q15_t)0x1b53, (q15_t)0x82f4, (q15_t)0x1b4d, (q15_t)0x82f3,
+  (q15_t)0x1b47, (q15_t)0x82f1, (q15_t)0x1b41, (q15_t)0x82f0, (q15_t)0x1b3a, (q15_t)0x82ef, (q15_t)0x1b34, (q15_t)0x82ed,
+  (q15_t)0x1b2e, (q15_t)0x82ec, (q15_t)0x1b28, (q15_t)0x82eb, (q15_t)0x1b22, (q15_t)0x82e9, (q15_t)0x1b1c, (q15_t)0x82e8,
+  (q15_t)0x1b16, (q15_t)0x82e7, (q15_t)0x1b0f, (q15_t)0x82e5, (q15_t)0x1b09, (q15_t)0x82e4, (q15_t)0x1b03, (q15_t)0x82e3,
+  (q15_t)0x1afd, (q15_t)0x82e1, (q15_t)0x1af7, (q15_t)0x82e0, (q15_t)0x1af1, (q15_t)0x82df, (q15_t)0x1aeb, (q15_t)0x82dd,
+  (q15_t)0x1ae4, (q15_t)0x82dc, (q15_t)0x1ade, (q15_t)0x82db, (q15_t)0x1ad8, (q15_t)0x82d9, (q15_t)0x1ad2, (q15_t)0x82d8,
+  (q15_t)0x1acc, (q15_t)0x82d7, (q15_t)0x1ac6, (q15_t)0x82d5, (q15_t)0x1ac0, (q15_t)0x82d4, (q15_t)0x1ab9, (q15_t)0x82d3,
+  (q15_t)0x1ab3, (q15_t)0x82d1, (q15_t)0x1aad, (q15_t)0x82d0, (q15_t)0x1aa7, (q15_t)0x82cf, (q15_t)0x1aa1, (q15_t)0x82ce,
+  (q15_t)0x1a9b, (q15_t)0x82cc, (q15_t)0x1a95, (q15_t)0x82cb, (q15_t)0x1a8e, (q15_t)0x82ca, (q15_t)0x1a88, (q15_t)0x82c8,
+  (q15_t)0x1a82, (q15_t)0x82c7, (q15_t)0x1a7c, (q15_t)0x82c6, (q15_t)0x1a76, (q15_t)0x82c4, (q15_t)0x1a70, (q15_t)0x82c3,
+  (q15_t)0x1a6a, (q15_t)0x82c2, (q15_t)0x1a63, (q15_t)0x82c1, (q15_t)0x1a5d, (q15_t)0x82bf, (q15_t)0x1a57, (q15_t)0x82be,
+  (q15_t)0x1a51, (q15_t)0x82bd, (q15_t)0x1a4b, (q15_t)0x82bb, (q15_t)0x1a45, (q15_t)0x82ba, (q15_t)0x1a3e, (q15_t)0x82b9,
+  (q15_t)0x1a38, (q15_t)0x82b7, (q15_t)0x1a32, (q15_t)0x82b6, (q15_t)0x1a2c, (q15_t)0x82b5, (q15_t)0x1a26, (q15_t)0x82b4,
+  (q15_t)0x1a20, (q15_t)0x82b2, (q15_t)0x1a1a, (q15_t)0x82b1, (q15_t)0x1a13, (q15_t)0x82b0, (q15_t)0x1a0d, (q15_t)0x82ae,
+  (q15_t)0x1a07, (q15_t)0x82ad, (q15_t)0x1a01, (q15_t)0x82ac, (q15_t)0x19fb, (q15_t)0x82ab, (q15_t)0x19f5, (q15_t)0x82a9,
+  (q15_t)0x19ef, (q15_t)0x82a8, (q15_t)0x19e8, (q15_t)0x82a7, (q15_t)0x19e2, (q15_t)0x82a6, (q15_t)0x19dc, (q15_t)0x82a4,
+  (q15_t)0x19d6, (q15_t)0x82a3, (q15_t)0x19d0, (q15_t)0x82a2, (q15_t)0x19ca, (q15_t)0x82a0, (q15_t)0x19c3, (q15_t)0x829f,
+  (q15_t)0x19bd, (q15_t)0x829e, (q15_t)0x19b7, (q15_t)0x829d, (q15_t)0x19b1, (q15_t)0x829b, (q15_t)0x19ab, (q15_t)0x829a,
+  (q15_t)0x19a5, (q15_t)0x8299, (q15_t)0x199f, (q15_t)0x8298, (q15_t)0x1998, (q15_t)0x8296, (q15_t)0x1992, (q15_t)0x8295,
+  (q15_t)0x198c, (q15_t)0x8294, (q15_t)0x1986, (q15_t)0x8293, (q15_t)0x1980, (q15_t)0x8291, (q15_t)0x197a, (q15_t)0x8290,
+  (q15_t)0x1973, (q15_t)0x828f, (q15_t)0x196d, (q15_t)0x828e, (q15_t)0x1967, (q15_t)0x828c, (q15_t)0x1961, (q15_t)0x828b,
+  (q15_t)0x195b, (q15_t)0x828a, (q15_t)0x1955, (q15_t)0x8289, (q15_t)0x194e, (q15_t)0x8287, (q15_t)0x1948, (q15_t)0x8286,
+  (q15_t)0x1942, (q15_t)0x8285, (q15_t)0x193c, (q15_t)0x8284, (q15_t)0x1936, (q15_t)0x8282, (q15_t)0x1930, (q15_t)0x8281,
+  (q15_t)0x192a, (q15_t)0x8280, (q15_t)0x1923, (q15_t)0x827f, (q15_t)0x191d, (q15_t)0x827e, (q15_t)0x1917, (q15_t)0x827c,
+  (q15_t)0x1911, (q15_t)0x827b, (q15_t)0x190b, (q15_t)0x827a, (q15_t)0x1905, (q15_t)0x8279, (q15_t)0x18fe, (q15_t)0x8277,
+  (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x18f2, (q15_t)0x8275, (q15_t)0x18ec, (q15_t)0x8274, (q15_t)0x18e6, (q15_t)0x8272,
+  (q15_t)0x18e0, (q15_t)0x8271, (q15_t)0x18d9, (q15_t)0x8270, (q15_t)0x18d3, (q15_t)0x826f, (q15_t)0x18cd, (q15_t)0x826e,
+  (q15_t)0x18c7, (q15_t)0x826c, (q15_t)0x18c1, (q15_t)0x826b, (q15_t)0x18bb, (q15_t)0x826a, (q15_t)0x18b4, (q15_t)0x8269,
+  (q15_t)0x18ae, (q15_t)0x8268, (q15_t)0x18a8, (q15_t)0x8266, (q15_t)0x18a2, (q15_t)0x8265, (q15_t)0x189c, (q15_t)0x8264,
+  (q15_t)0x1896, (q15_t)0x8263, (q15_t)0x188f, (q15_t)0x8261, (q15_t)0x1889, (q15_t)0x8260, (q15_t)0x1883, (q15_t)0x825f,
+  (q15_t)0x187d, (q15_t)0x825e, (q15_t)0x1877, (q15_t)0x825d, (q15_t)0x1871, (q15_t)0x825b, (q15_t)0x186a, (q15_t)0x825a,
+  (q15_t)0x1864, (q15_t)0x8259, (q15_t)0x185e, (q15_t)0x8258, (q15_t)0x1858, (q15_t)0x8257, (q15_t)0x1852, (q15_t)0x8255,
+  (q15_t)0x184c, (q15_t)0x8254, (q15_t)0x1845, (q15_t)0x8253, (q15_t)0x183f, (q15_t)0x8252, (q15_t)0x1839, (q15_t)0x8251,
+  (q15_t)0x1833, (q15_t)0x8250, (q15_t)0x182d, (q15_t)0x824e, (q15_t)0x1827, (q15_t)0x824d, (q15_t)0x1820, (q15_t)0x824c,
+  (q15_t)0x181a, (q15_t)0x824b, (q15_t)0x1814, (q15_t)0x824a, (q15_t)0x180e, (q15_t)0x8248, (q15_t)0x1808, (q15_t)0x8247,
+  (q15_t)0x1802, (q15_t)0x8246, (q15_t)0x17fb, (q15_t)0x8245, (q15_t)0x17f5, (q15_t)0x8244, (q15_t)0x17ef, (q15_t)0x8243,
+  (q15_t)0x17e9, (q15_t)0x8241, (q15_t)0x17e3, (q15_t)0x8240, (q15_t)0x17dd, (q15_t)0x823f, (q15_t)0x17d6, (q15_t)0x823e,
+  (q15_t)0x17d0, (q15_t)0x823d, (q15_t)0x17ca, (q15_t)0x823b, (q15_t)0x17c4, (q15_t)0x823a, (q15_t)0x17be, (q15_t)0x8239,
+  (q15_t)0x17b7, (q15_t)0x8238, (q15_t)0x17b1, (q15_t)0x8237, (q15_t)0x17ab, (q15_t)0x8236, (q15_t)0x17a5, (q15_t)0x8234,
+  (q15_t)0x179f, (q15_t)0x8233, (q15_t)0x1799, (q15_t)0x8232, (q15_t)0x1792, (q15_t)0x8231, (q15_t)0x178c, (q15_t)0x8230,
+  (q15_t)0x1786, (q15_t)0x822f, (q15_t)0x1780, (q15_t)0x822e, (q15_t)0x177a, (q15_t)0x822c, (q15_t)0x1774, (q15_t)0x822b,
+  (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x1767, (q15_t)0x8229, (q15_t)0x1761, (q15_t)0x8228, (q15_t)0x175b, (q15_t)0x8227,
+  (q15_t)0x1755, (q15_t)0x8226, (q15_t)0x174e, (q15_t)0x8224, (q15_t)0x1748, (q15_t)0x8223, (q15_t)0x1742, (q15_t)0x8222,
+  (q15_t)0x173c, (q15_t)0x8221, (q15_t)0x1736, (q15_t)0x8220, (q15_t)0x1730, (q15_t)0x821f, (q15_t)0x1729, (q15_t)0x821e,
+  (q15_t)0x1723, (q15_t)0x821c, (q15_t)0x171d, (q15_t)0x821b, (q15_t)0x1717, (q15_t)0x821a, (q15_t)0x1711, (q15_t)0x8219,
+  (q15_t)0x170a, (q15_t)0x8218, (q15_t)0x1704, (q15_t)0x8217, (q15_t)0x16fe, (q15_t)0x8216, (q15_t)0x16f8, (q15_t)0x8214,
+  (q15_t)0x16f2, (q15_t)0x8213, (q15_t)0x16ec, (q15_t)0x8212, (q15_t)0x16e5, (q15_t)0x8211, (q15_t)0x16df, (q15_t)0x8210,
+  (q15_t)0x16d9, (q15_t)0x820f, (q15_t)0x16d3, (q15_t)0x820e, (q15_t)0x16cd, (q15_t)0x820d, (q15_t)0x16c6, (q15_t)0x820b,
+  (q15_t)0x16c0, (q15_t)0x820a, (q15_t)0x16ba, (q15_t)0x8209, (q15_t)0x16b4, (q15_t)0x8208, (q15_t)0x16ae, (q15_t)0x8207,
+  (q15_t)0x16a8, (q15_t)0x8206, (q15_t)0x16a1, (q15_t)0x8205, (q15_t)0x169b, (q15_t)0x8204, (q15_t)0x1695, (q15_t)0x8203,
+  (q15_t)0x168f, (q15_t)0x8201, (q15_t)0x1689, (q15_t)0x8200, (q15_t)0x1682, (q15_t)0x81ff, (q15_t)0x167c, (q15_t)0x81fe,
+  (q15_t)0x1676, (q15_t)0x81fd, (q15_t)0x1670, (q15_t)0x81fc, (q15_t)0x166a, (q15_t)0x81fb, (q15_t)0x1664, (q15_t)0x81fa,
+  (q15_t)0x165d, (q15_t)0x81f9, (q15_t)0x1657, (q15_t)0x81f8, (q15_t)0x1651, (q15_t)0x81f6, (q15_t)0x164b, (q15_t)0x81f5,
+  (q15_t)0x1645, (q15_t)0x81f4, (q15_t)0x163e, (q15_t)0x81f3, (q15_t)0x1638, (q15_t)0x81f2, (q15_t)0x1632, (q15_t)0x81f1,
+  (q15_t)0x162c, (q15_t)0x81f0, (q15_t)0x1626, (q15_t)0x81ef, (q15_t)0x161f, (q15_t)0x81ee, (q15_t)0x1619, (q15_t)0x81ed,
+  (q15_t)0x1613, (q15_t)0x81ec, (q15_t)0x160d, (q15_t)0x81ea, (q15_t)0x1607, (q15_t)0x81e9, (q15_t)0x1601, (q15_t)0x81e8,
+  (q15_t)0x15fa, (q15_t)0x81e7, (q15_t)0x15f4, (q15_t)0x81e6, (q15_t)0x15ee, (q15_t)0x81e5, (q15_t)0x15e8, (q15_t)0x81e4,
+  (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x15db, (q15_t)0x81e2, (q15_t)0x15d5, (q15_t)0x81e1, (q15_t)0x15cf, (q15_t)0x81e0,
+  (q15_t)0x15c9, (q15_t)0x81df, (q15_t)0x15c3, (q15_t)0x81de, (q15_t)0x15bc, (q15_t)0x81dc, (q15_t)0x15b6, (q15_t)0x81db,
+  (q15_t)0x15b0, (q15_t)0x81da, (q15_t)0x15aa, (q15_t)0x81d9, (q15_t)0x15a4, (q15_t)0x81d8, (q15_t)0x159d, (q15_t)0x81d7,
+  (q15_t)0x1597, (q15_t)0x81d6, (q15_t)0x1591, (q15_t)0x81d5, (q15_t)0x158b, (q15_t)0x81d4, (q15_t)0x1585, (q15_t)0x81d3,
+  (q15_t)0x157f, (q15_t)0x81d2, (q15_t)0x1578, (q15_t)0x81d1, (q15_t)0x1572, (q15_t)0x81d0, (q15_t)0x156c, (q15_t)0x81cf,
+  (q15_t)0x1566, (q15_t)0x81ce, (q15_t)0x1560, (q15_t)0x81cd, (q15_t)0x1559, (q15_t)0x81cc, (q15_t)0x1553, (q15_t)0x81cb,
+  (q15_t)0x154d, (q15_t)0x81c9, (q15_t)0x1547, (q15_t)0x81c8, (q15_t)0x1541, (q15_t)0x81c7, (q15_t)0x153a, (q15_t)0x81c6,
+  (q15_t)0x1534, (q15_t)0x81c5, (q15_t)0x152e, (q15_t)0x81c4, (q15_t)0x1528, (q15_t)0x81c3, (q15_t)0x1522, (q15_t)0x81c2,
+  (q15_t)0x151b, (q15_t)0x81c1, (q15_t)0x1515, (q15_t)0x81c0, (q15_t)0x150f, (q15_t)0x81bf, (q15_t)0x1509, (q15_t)0x81be,
+  (q15_t)0x1503, (q15_t)0x81bd, (q15_t)0x14fc, (q15_t)0x81bc, (q15_t)0x14f6, (q15_t)0x81bb, (q15_t)0x14f0, (q15_t)0x81ba,
+  (q15_t)0x14ea, (q15_t)0x81b9, (q15_t)0x14e4, (q15_t)0x81b8, (q15_t)0x14dd, (q15_t)0x81b7, (q15_t)0x14d7, (q15_t)0x81b6,
+  (q15_t)0x14d1, (q15_t)0x81b5, (q15_t)0x14cb, (q15_t)0x81b4, (q15_t)0x14c5, (q15_t)0x81b3, (q15_t)0x14be, (q15_t)0x81b2,
+  (q15_t)0x14b8, (q15_t)0x81b1, (q15_t)0x14b2, (q15_t)0x81b0, (q15_t)0x14ac, (q15_t)0x81af, (q15_t)0x14a6, (q15_t)0x81ae,
+  (q15_t)0x149f, (q15_t)0x81ad, (q15_t)0x1499, (q15_t)0x81ac, (q15_t)0x1493, (q15_t)0x81ab, (q15_t)0x148d, (q15_t)0x81aa,
+  (q15_t)0x1487, (q15_t)0x81a9, (q15_t)0x1480, (q15_t)0x81a8, (q15_t)0x147a, (q15_t)0x81a7, (q15_t)0x1474, (q15_t)0x81a6,
+  (q15_t)0x146e, (q15_t)0x81a5, (q15_t)0x1468, (q15_t)0x81a4, (q15_t)0x1461, (q15_t)0x81a3, (q15_t)0x145b, (q15_t)0x81a2,
+  (q15_t)0x1455, (q15_t)0x81a1, (q15_t)0x144f, (q15_t)0x81a0, (q15_t)0x1449, (q15_t)0x819f, (q15_t)0x1442, (q15_t)0x819e,
+  (q15_t)0x143c, (q15_t)0x819d, (q15_t)0x1436, (q15_t)0x819c, (q15_t)0x1430, (q15_t)0x819b, (q15_t)0x142a, (q15_t)0x819a,
+  (q15_t)0x1423, (q15_t)0x8199, (q15_t)0x141d, (q15_t)0x8198, (q15_t)0x1417, (q15_t)0x8197, (q15_t)0x1411, (q15_t)0x8196,
+  (q15_t)0x140b, (q15_t)0x8195, (q15_t)0x1404, (q15_t)0x8194, (q15_t)0x13fe, (q15_t)0x8193, (q15_t)0x13f8, (q15_t)0x8192,
+  (q15_t)0x13f2, (q15_t)0x8191, (q15_t)0x13eb, (q15_t)0x8190, (q15_t)0x13e5, (q15_t)0x818f, (q15_t)0x13df, (q15_t)0x818e,
+  (q15_t)0x13d9, (q15_t)0x818d, (q15_t)0x13d3, (q15_t)0x818c, (q15_t)0x13cc, (q15_t)0x818b, (q15_t)0x13c6, (q15_t)0x818a,
+  (q15_t)0x13c0, (q15_t)0x8189, (q15_t)0x13ba, (q15_t)0x8188, (q15_t)0x13b4, (q15_t)0x8187, (q15_t)0x13ad, (q15_t)0x8186,
+  (q15_t)0x13a7, (q15_t)0x8185, (q15_t)0x13a1, (q15_t)0x8184, (q15_t)0x139b, (q15_t)0x8183, (q15_t)0x1395, (q15_t)0x8182,
+  (q15_t)0x138e, (q15_t)0x8181, (q15_t)0x1388, (q15_t)0x8180, (q15_t)0x1382, (q15_t)0x817f, (q15_t)0x137c, (q15_t)0x817e,
+  (q15_t)0x1376, (q15_t)0x817d, (q15_t)0x136f, (q15_t)0x817c, (q15_t)0x1369, (q15_t)0x817c, (q15_t)0x1363, (q15_t)0x817b,
+  (q15_t)0x135d, (q15_t)0x817a, (q15_t)0x1356, (q15_t)0x8179, (q15_t)0x1350, (q15_t)0x8178, (q15_t)0x134a, (q15_t)0x8177,
+  (q15_t)0x1344, (q15_t)0x8176, (q15_t)0x133e, (q15_t)0x8175, (q15_t)0x1337, (q15_t)0x8174, (q15_t)0x1331, (q15_t)0x8173,
+  (q15_t)0x132b, (q15_t)0x8172, (q15_t)0x1325, (q15_t)0x8171, (q15_t)0x131f, (q15_t)0x8170, (q15_t)0x1318, (q15_t)0x816f,
+  (q15_t)0x1312, (q15_t)0x816e, (q15_t)0x130c, (q15_t)0x816d, (q15_t)0x1306, (q15_t)0x816c, (q15_t)0x12ff, (q15_t)0x816c,
+  (q15_t)0x12f9, (q15_t)0x816b, (q15_t)0x12f3, (q15_t)0x816a, (q15_t)0x12ed, (q15_t)0x8169, (q15_t)0x12e7, (q15_t)0x8168,
+  (q15_t)0x12e0, (q15_t)0x8167, (q15_t)0x12da, (q15_t)0x8166, (q15_t)0x12d4, (q15_t)0x8165, (q15_t)0x12ce, (q15_t)0x8164,
+  (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x12c1, (q15_t)0x8162, (q15_t)0x12bb, (q15_t)0x8161, (q15_t)0x12b5, (q15_t)0x8160,
+  (q15_t)0x12af, (q15_t)0x815f, (q15_t)0x12a8, (q15_t)0x815f, (q15_t)0x12a2, (q15_t)0x815e, (q15_t)0x129c, (q15_t)0x815d,
+  (q15_t)0x1296, (q15_t)0x815c, (q15_t)0x1290, (q15_t)0x815b, (q15_t)0x1289, (q15_t)0x815a, (q15_t)0x1283, (q15_t)0x8159,
+  (q15_t)0x127d, (q15_t)0x8158, (q15_t)0x1277, (q15_t)0x8157, (q15_t)0x1271, (q15_t)0x8156, (q15_t)0x126a, (q15_t)0x8155,
+  (q15_t)0x1264, (q15_t)0x8155, (q15_t)0x125e, (q15_t)0x8154, (q15_t)0x1258, (q15_t)0x8153, (q15_t)0x1251, (q15_t)0x8152,
+  (q15_t)0x124b, (q15_t)0x8151, (q15_t)0x1245, (q15_t)0x8150, (q15_t)0x123f, (q15_t)0x814f, (q15_t)0x1239, (q15_t)0x814e,
+  (q15_t)0x1232, (q15_t)0x814d, (q15_t)0x122c, (q15_t)0x814c, (q15_t)0x1226, (q15_t)0x814c, (q15_t)0x1220, (q15_t)0x814b,
+  (q15_t)0x1219, (q15_t)0x814a, (q15_t)0x1213, (q15_t)0x8149, (q15_t)0x120d, (q15_t)0x8148, (q15_t)0x1207, (q15_t)0x8147,
+  (q15_t)0x1201, (q15_t)0x8146, (q15_t)0x11fa, (q15_t)0x8145, (q15_t)0x11f4, (q15_t)0x8145, (q15_t)0x11ee, (q15_t)0x8144,
+  (q15_t)0x11e8, (q15_t)0x8143, (q15_t)0x11e1, (q15_t)0x8142, (q15_t)0x11db, (q15_t)0x8141, (q15_t)0x11d5, (q15_t)0x8140,
+  (q15_t)0x11cf, (q15_t)0x813f, (q15_t)0x11c9, (q15_t)0x813e, (q15_t)0x11c2, (q15_t)0x813d, (q15_t)0x11bc, (q15_t)0x813d,
+  (q15_t)0x11b6, (q15_t)0x813c, (q15_t)0x11b0, (q15_t)0x813b, (q15_t)0x11a9, (q15_t)0x813a, (q15_t)0x11a3, (q15_t)0x8139,
+  (q15_t)0x119d, (q15_t)0x8138, (q15_t)0x1197, (q15_t)0x8137, (q15_t)0x1191, (q15_t)0x8137, (q15_t)0x118a, (q15_t)0x8136,
+  (q15_t)0x1184, (q15_t)0x8135, (q15_t)0x117e, (q15_t)0x8134, (q15_t)0x1178, (q15_t)0x8133, (q15_t)0x1171, (q15_t)0x8132,
+  (q15_t)0x116b, (q15_t)0x8131, (q15_t)0x1165, (q15_t)0x8131, (q15_t)0x115f, (q15_t)0x8130, (q15_t)0x1159, (q15_t)0x812f,
+  (q15_t)0x1152, (q15_t)0x812e, (q15_t)0x114c, (q15_t)0x812d, (q15_t)0x1146, (q15_t)0x812c, (q15_t)0x1140, (q15_t)0x812b,
+  (q15_t)0x1139, (q15_t)0x812b, (q15_t)0x1133, (q15_t)0x812a, (q15_t)0x112d, (q15_t)0x8129, (q15_t)0x1127, (q15_t)0x8128,
+  (q15_t)0x1121, (q15_t)0x8127, (q15_t)0x111a, (q15_t)0x8126, (q15_t)0x1114, (q15_t)0x8126, (q15_t)0x110e, (q15_t)0x8125,
+  (q15_t)0x1108, (q15_t)0x8124, (q15_t)0x1101, (q15_t)0x8123, (q15_t)0x10fb, (q15_t)0x8122, (q15_t)0x10f5, (q15_t)0x8121,
+  (q15_t)0x10ef, (q15_t)0x8121, (q15_t)0x10e8, (q15_t)0x8120, (q15_t)0x10e2, (q15_t)0x811f, (q15_t)0x10dc, (q15_t)0x811e,
+  (q15_t)0x10d6, (q15_t)0x811d, (q15_t)0x10d0, (q15_t)0x811c, (q15_t)0x10c9, (q15_t)0x811c, (q15_t)0x10c3, (q15_t)0x811b,
+  (q15_t)0x10bd, (q15_t)0x811a, (q15_t)0x10b7, (q15_t)0x8119, (q15_t)0x10b0, (q15_t)0x8118, (q15_t)0x10aa, (q15_t)0x8117,
+  (q15_t)0x10a4, (q15_t)0x8117, (q15_t)0x109e, (q15_t)0x8116, (q15_t)0x1098, (q15_t)0x8115, (q15_t)0x1091, (q15_t)0x8114,
+  (q15_t)0x108b, (q15_t)0x8113, (q15_t)0x1085, (q15_t)0x8113, (q15_t)0x107f, (q15_t)0x8112, (q15_t)0x1078, (q15_t)0x8111,
+  (q15_t)0x1072, (q15_t)0x8110, (q15_t)0x106c, (q15_t)0x810f, (q15_t)0x1066, (q15_t)0x810f, (q15_t)0x105f, (q15_t)0x810e,
+  (q15_t)0x1059, (q15_t)0x810d, (q15_t)0x1053, (q15_t)0x810c, (q15_t)0x104d, (q15_t)0x810b, (q15_t)0x1047, (q15_t)0x810b,
+  (q15_t)0x1040, (q15_t)0x810a, (q15_t)0x103a, (q15_t)0x8109, (q15_t)0x1034, (q15_t)0x8108, (q15_t)0x102e, (q15_t)0x8107,
+  (q15_t)0x1027, (q15_t)0x8107, (q15_t)0x1021, (q15_t)0x8106, (q15_t)0x101b, (q15_t)0x8105, (q15_t)0x1015, (q15_t)0x8104,
+  (q15_t)0x100e, (q15_t)0x8103, (q15_t)0x1008, (q15_t)0x8103, (q15_t)0x1002, (q15_t)0x8102, (q15_t)0xffc, (q15_t)0x8101,
+  (q15_t)0xff5, (q15_t)0x8100, (q15_t)0xfef, (q15_t)0x80ff, (q15_t)0xfe9, (q15_t)0x80ff, (q15_t)0xfe3, (q15_t)0x80fe,
+  (q15_t)0xfdd, (q15_t)0x80fd, (q15_t)0xfd6, (q15_t)0x80fc, (q15_t)0xfd0, (q15_t)0x80fc, (q15_t)0xfca, (q15_t)0x80fb,
+  (q15_t)0xfc4, (q15_t)0x80fa, (q15_t)0xfbd, (q15_t)0x80f9, (q15_t)0xfb7, (q15_t)0x80f8, (q15_t)0xfb1, (q15_t)0x80f8,
+  (q15_t)0xfab, (q15_t)0x80f7, (q15_t)0xfa4, (q15_t)0x80f6, (q15_t)0xf9e, (q15_t)0x80f5, (q15_t)0xf98, (q15_t)0x80f5,
+  (q15_t)0xf92, (q15_t)0x80f4, (q15_t)0xf8b, (q15_t)0x80f3, (q15_t)0xf85, (q15_t)0x80f2, (q15_t)0xf7f, (q15_t)0x80f2,
+  (q15_t)0xf79, (q15_t)0x80f1, (q15_t)0xf73, (q15_t)0x80f0, (q15_t)0xf6c, (q15_t)0x80ef, (q15_t)0xf66, (q15_t)0x80ef,
+  (q15_t)0xf60, (q15_t)0x80ee, (q15_t)0xf5a, (q15_t)0x80ed, (q15_t)0xf53, (q15_t)0x80ec, (q15_t)0xf4d, (q15_t)0x80ec,
+  (q15_t)0xf47, (q15_t)0x80eb, (q15_t)0xf41, (q15_t)0x80ea, (q15_t)0xf3a, (q15_t)0x80e9, (q15_t)0xf34, (q15_t)0x80e9,
+  (q15_t)0xf2e, (q15_t)0x80e8, (q15_t)0xf28, (q15_t)0x80e7, (q15_t)0xf21, (q15_t)0x80e6, (q15_t)0xf1b, (q15_t)0x80e6,
+  (q15_t)0xf15, (q15_t)0x80e5, (q15_t)0xf0f, (q15_t)0x80e4, (q15_t)0xf08, (q15_t)0x80e3, (q15_t)0xf02, (q15_t)0x80e3,
+  (q15_t)0xefc, (q15_t)0x80e2, (q15_t)0xef6, (q15_t)0x80e1, (q15_t)0xef0, (q15_t)0x80e0, (q15_t)0xee9, (q15_t)0x80e0,
+  (q15_t)0xee3, (q15_t)0x80df, (q15_t)0xedd, (q15_t)0x80de, (q15_t)0xed7, (q15_t)0x80dd, (q15_t)0xed0, (q15_t)0x80dd,
+  (q15_t)0xeca, (q15_t)0x80dc, (q15_t)0xec4, (q15_t)0x80db, (q15_t)0xebe, (q15_t)0x80db, (q15_t)0xeb7, (q15_t)0x80da,
+  (q15_t)0xeb1, (q15_t)0x80d9, (q15_t)0xeab, (q15_t)0x80d8, (q15_t)0xea5, (q15_t)0x80d8, (q15_t)0xe9e, (q15_t)0x80d7,
+  (q15_t)0xe98, (q15_t)0x80d6, (q15_t)0xe92, (q15_t)0x80d6, (q15_t)0xe8c, (q15_t)0x80d5, (q15_t)0xe85, (q15_t)0x80d4,
+  (q15_t)0xe7f, (q15_t)0x80d3, (q15_t)0xe79, (q15_t)0x80d3, (q15_t)0xe73, (q15_t)0x80d2, (q15_t)0xe6c, (q15_t)0x80d1,
+  (q15_t)0xe66, (q15_t)0x80d1, (q15_t)0xe60, (q15_t)0x80d0, (q15_t)0xe5a, (q15_t)0x80cf, (q15_t)0xe53, (q15_t)0x80ce,
+  (q15_t)0xe4d, (q15_t)0x80ce, (q15_t)0xe47, (q15_t)0x80cd, (q15_t)0xe41, (q15_t)0x80cc, (q15_t)0xe3a, (q15_t)0x80cc,
+  (q15_t)0xe34, (q15_t)0x80cb, (q15_t)0xe2e, (q15_t)0x80ca, (q15_t)0xe28, (q15_t)0x80ca, (q15_t)0xe22, (q15_t)0x80c9,
+  (q15_t)0xe1b, (q15_t)0x80c8, (q15_t)0xe15, (q15_t)0x80c7, (q15_t)0xe0f, (q15_t)0x80c7, (q15_t)0xe09, (q15_t)0x80c6,
+  (q15_t)0xe02, (q15_t)0x80c5, (q15_t)0xdfc, (q15_t)0x80c5, (q15_t)0xdf6, (q15_t)0x80c4, (q15_t)0xdf0, (q15_t)0x80c3,
+  (q15_t)0xde9, (q15_t)0x80c3, (q15_t)0xde3, (q15_t)0x80c2, (q15_t)0xddd, (q15_t)0x80c1, (q15_t)0xdd7, (q15_t)0x80c1,
+  (q15_t)0xdd0, (q15_t)0x80c0, (q15_t)0xdca, (q15_t)0x80bf, (q15_t)0xdc4, (q15_t)0x80bf, (q15_t)0xdbe, (q15_t)0x80be,
+  (q15_t)0xdb7, (q15_t)0x80bd, (q15_t)0xdb1, (q15_t)0x80bd, (q15_t)0xdab, (q15_t)0x80bc, (q15_t)0xda5, (q15_t)0x80bb,
+  (q15_t)0xd9e, (q15_t)0x80bb, (q15_t)0xd98, (q15_t)0x80ba, (q15_t)0xd92, (q15_t)0x80b9, (q15_t)0xd8c, (q15_t)0x80b9,
+  (q15_t)0xd85, (q15_t)0x80b8, (q15_t)0xd7f, (q15_t)0x80b7, (q15_t)0xd79, (q15_t)0x80b7, (q15_t)0xd73, (q15_t)0x80b6,
+  (q15_t)0xd6c, (q15_t)0x80b5, (q15_t)0xd66, (q15_t)0x80b5, (q15_t)0xd60, (q15_t)0x80b4, (q15_t)0xd5a, (q15_t)0x80b3,
+  (q15_t)0xd53, (q15_t)0x80b3, (q15_t)0xd4d, (q15_t)0x80b2, (q15_t)0xd47, (q15_t)0x80b1, (q15_t)0xd41, (q15_t)0x80b1,
+  (q15_t)0xd3a, (q15_t)0x80b0, (q15_t)0xd34, (q15_t)0x80af, (q15_t)0xd2e, (q15_t)0x80af, (q15_t)0xd28, (q15_t)0x80ae,
+  (q15_t)0xd21, (q15_t)0x80ad, (q15_t)0xd1b, (q15_t)0x80ad, (q15_t)0xd15, (q15_t)0x80ac, (q15_t)0xd0f, (q15_t)0x80ab,
+  (q15_t)0xd08, (q15_t)0x80ab, (q15_t)0xd02, (q15_t)0x80aa, (q15_t)0xcfc, (q15_t)0x80aa, (q15_t)0xcf6, (q15_t)0x80a9,
+  (q15_t)0xcef, (q15_t)0x80a8, (q15_t)0xce9, (q15_t)0x80a8, (q15_t)0xce3, (q15_t)0x80a7, (q15_t)0xcdd, (q15_t)0x80a6,
+  (q15_t)0xcd6, (q15_t)0x80a6, (q15_t)0xcd0, (q15_t)0x80a5, (q15_t)0xcca, (q15_t)0x80a5, (q15_t)0xcc4, (q15_t)0x80a4,
+  (q15_t)0xcbd, (q15_t)0x80a3, (q15_t)0xcb7, (q15_t)0x80a3, (q15_t)0xcb1, (q15_t)0x80a2, (q15_t)0xcab, (q15_t)0x80a1,
+  (q15_t)0xca4, (q15_t)0x80a1, (q15_t)0xc9e, (q15_t)0x80a0, (q15_t)0xc98, (q15_t)0x80a0, (q15_t)0xc92, (q15_t)0x809f,
+  (q15_t)0xc8b, (q15_t)0x809e, (q15_t)0xc85, (q15_t)0x809e, (q15_t)0xc7f, (q15_t)0x809d, (q15_t)0xc79, (q15_t)0x809c,
+  (q15_t)0xc72, (q15_t)0x809c, (q15_t)0xc6c, (q15_t)0x809b, (q15_t)0xc66, (q15_t)0x809b, (q15_t)0xc60, (q15_t)0x809a,
+  (q15_t)0xc59, (q15_t)0x8099, (q15_t)0xc53, (q15_t)0x8099, (q15_t)0xc4d, (q15_t)0x8098, (q15_t)0xc47, (q15_t)0x8098,
+  (q15_t)0xc40, (q15_t)0x8097, (q15_t)0xc3a, (q15_t)0x8096, (q15_t)0xc34, (q15_t)0x8096, (q15_t)0xc2e, (q15_t)0x8095,
+  (q15_t)0xc27, (q15_t)0x8095, (q15_t)0xc21, (q15_t)0x8094, (q15_t)0xc1b, (q15_t)0x8093, (q15_t)0xc14, (q15_t)0x8093,
+  (q15_t)0xc0e, (q15_t)0x8092, (q15_t)0xc08, (q15_t)0x8092, (q15_t)0xc02, (q15_t)0x8091, (q15_t)0xbfb, (q15_t)0x8090,
+  (q15_t)0xbf5, (q15_t)0x8090, (q15_t)0xbef, (q15_t)0x808f, (q15_t)0xbe9, (q15_t)0x808f, (q15_t)0xbe2, (q15_t)0x808e,
+  (q15_t)0xbdc, (q15_t)0x808e, (q15_t)0xbd6, (q15_t)0x808d, (q15_t)0xbd0, (q15_t)0x808c, (q15_t)0xbc9, (q15_t)0x808c,
+  (q15_t)0xbc3, (q15_t)0x808b, (q15_t)0xbbd, (q15_t)0x808b, (q15_t)0xbb7, (q15_t)0x808a, (q15_t)0xbb0, (q15_t)0x8089,
+  (q15_t)0xbaa, (q15_t)0x8089, (q15_t)0xba4, (q15_t)0x8088, (q15_t)0xb9e, (q15_t)0x8088, (q15_t)0xb97, (q15_t)0x8087,
+  (q15_t)0xb91, (q15_t)0x8087, (q15_t)0xb8b, (q15_t)0x8086, (q15_t)0xb85, (q15_t)0x8085, (q15_t)0xb7e, (q15_t)0x8085,
+  (q15_t)0xb78, (q15_t)0x8084, (q15_t)0xb72, (q15_t)0x8084, (q15_t)0xb6c, (q15_t)0x8083, (q15_t)0xb65, (q15_t)0x8083,
+  (q15_t)0xb5f, (q15_t)0x8082, (q15_t)0xb59, (q15_t)0x8082, (q15_t)0xb53, (q15_t)0x8081, (q15_t)0xb4c, (q15_t)0x8080,
+  (q15_t)0xb46, (q15_t)0x8080, (q15_t)0xb40, (q15_t)0x807f, (q15_t)0xb3a, (q15_t)0x807f, (q15_t)0xb33, (q15_t)0x807e,
+  (q15_t)0xb2d, (q15_t)0x807e, (q15_t)0xb27, (q15_t)0x807d, (q15_t)0xb20, (q15_t)0x807d, (q15_t)0xb1a, (q15_t)0x807c,
+  (q15_t)0xb14, (q15_t)0x807b, (q15_t)0xb0e, (q15_t)0x807b, (q15_t)0xb07, (q15_t)0x807a, (q15_t)0xb01, (q15_t)0x807a,
+  (q15_t)0xafb, (q15_t)0x8079, (q15_t)0xaf5, (q15_t)0x8079, (q15_t)0xaee, (q15_t)0x8078, (q15_t)0xae8, (q15_t)0x8078,
+  (q15_t)0xae2, (q15_t)0x8077, (q15_t)0xadc, (q15_t)0x8077, (q15_t)0xad5, (q15_t)0x8076, (q15_t)0xacf, (q15_t)0x8076,
+  (q15_t)0xac9, (q15_t)0x8075, (q15_t)0xac3, (q15_t)0x8075, (q15_t)0xabc, (q15_t)0x8074, (q15_t)0xab6, (q15_t)0x8073,
+  (q15_t)0xab0, (q15_t)0x8073, (q15_t)0xaaa, (q15_t)0x8072, (q15_t)0xaa3, (q15_t)0x8072, (q15_t)0xa9d, (q15_t)0x8071,
+  (q15_t)0xa97, (q15_t)0x8071, (q15_t)0xa90, (q15_t)0x8070, (q15_t)0xa8a, (q15_t)0x8070, (q15_t)0xa84, (q15_t)0x806f,
+  (q15_t)0xa7e, (q15_t)0x806f, (q15_t)0xa77, (q15_t)0x806e, (q15_t)0xa71, (q15_t)0x806e, (q15_t)0xa6b, (q15_t)0x806d,
+  (q15_t)0xa65, (q15_t)0x806d, (q15_t)0xa5e, (q15_t)0x806c, (q15_t)0xa58, (q15_t)0x806c, (q15_t)0xa52, (q15_t)0x806b,
+  (q15_t)0xa4c, (q15_t)0x806b, (q15_t)0xa45, (q15_t)0x806a, (q15_t)0xa3f, (q15_t)0x806a, (q15_t)0xa39, (q15_t)0x8069,
+  (q15_t)0xa33, (q15_t)0x8069, (q15_t)0xa2c, (q15_t)0x8068, (q15_t)0xa26, (q15_t)0x8068, (q15_t)0xa20, (q15_t)0x8067,
+  (q15_t)0xa19, (q15_t)0x8067, (q15_t)0xa13, (q15_t)0x8066, (q15_t)0xa0d, (q15_t)0x8066, (q15_t)0xa07, (q15_t)0x8065,
+  (q15_t)0xa00, (q15_t)0x8065, (q15_t)0x9fa, (q15_t)0x8064, (q15_t)0x9f4, (q15_t)0x8064, (q15_t)0x9ee, (q15_t)0x8063,
+  (q15_t)0x9e7, (q15_t)0x8063, (q15_t)0x9e1, (q15_t)0x8062, (q15_t)0x9db, (q15_t)0x8062, (q15_t)0x9d5, (q15_t)0x8061,
+  (q15_t)0x9ce, (q15_t)0x8061, (q15_t)0x9c8, (q15_t)0x8060, (q15_t)0x9c2, (q15_t)0x8060, (q15_t)0x9bc, (q15_t)0x805f,
+  (q15_t)0x9b5, (q15_t)0x805f, (q15_t)0x9af, (q15_t)0x805e, (q15_t)0x9a9, (q15_t)0x805e, (q15_t)0x9a2, (q15_t)0x805d,
+  (q15_t)0x99c, (q15_t)0x805d, (q15_t)0x996, (q15_t)0x805d, (q15_t)0x990, (q15_t)0x805c, (q15_t)0x989, (q15_t)0x805c,
+  (q15_t)0x983, (q15_t)0x805b, (q15_t)0x97d, (q15_t)0x805b, (q15_t)0x977, (q15_t)0x805a, (q15_t)0x970, (q15_t)0x805a,
+  (q15_t)0x96a, (q15_t)0x8059, (q15_t)0x964, (q15_t)0x8059, (q15_t)0x95e, (q15_t)0x8058, (q15_t)0x957, (q15_t)0x8058,
+  (q15_t)0x951, (q15_t)0x8057, (q15_t)0x94b, (q15_t)0x8057, (q15_t)0x944, (q15_t)0x8057, (q15_t)0x93e, (q15_t)0x8056,
+  (q15_t)0x938, (q15_t)0x8056, (q15_t)0x932, (q15_t)0x8055, (q15_t)0x92b, (q15_t)0x8055, (q15_t)0x925, (q15_t)0x8054,
+  (q15_t)0x91f, (q15_t)0x8054, (q15_t)0x919, (q15_t)0x8053, (q15_t)0x912, (q15_t)0x8053, (q15_t)0x90c, (q15_t)0x8052,
+  (q15_t)0x906, (q15_t)0x8052, (q15_t)0x900, (q15_t)0x8052, (q15_t)0x8f9, (q15_t)0x8051, (q15_t)0x8f3, (q15_t)0x8051,
+  (q15_t)0x8ed, (q15_t)0x8050, (q15_t)0x8e6, (q15_t)0x8050, (q15_t)0x8e0, (q15_t)0x804f, (q15_t)0x8da, (q15_t)0x804f,
+  (q15_t)0x8d4, (q15_t)0x804f, (q15_t)0x8cd, (q15_t)0x804e, (q15_t)0x8c7, (q15_t)0x804e, (q15_t)0x8c1, (q15_t)0x804d,
+  (q15_t)0x8bb, (q15_t)0x804d, (q15_t)0x8b4, (q15_t)0x804c, (q15_t)0x8ae, (q15_t)0x804c, (q15_t)0x8a8, (q15_t)0x804c,
+  (q15_t)0x8a2, (q15_t)0x804b, (q15_t)0x89b, (q15_t)0x804b, (q15_t)0x895, (q15_t)0x804a, (q15_t)0x88f, (q15_t)0x804a,
+  (q15_t)0x888, (q15_t)0x8049, (q15_t)0x882, (q15_t)0x8049, (q15_t)0x87c, (q15_t)0x8049, (q15_t)0x876, (q15_t)0x8048,
+  (q15_t)0x86f, (q15_t)0x8048, (q15_t)0x869, (q15_t)0x8047, (q15_t)0x863, (q15_t)0x8047, (q15_t)0x85d, (q15_t)0x8047,
+  (q15_t)0x856, (q15_t)0x8046, (q15_t)0x850, (q15_t)0x8046, (q15_t)0x84a, (q15_t)0x8045, (q15_t)0x843, (q15_t)0x8045,
+  (q15_t)0x83d, (q15_t)0x8044, (q15_t)0x837, (q15_t)0x8044, (q15_t)0x831, (q15_t)0x8044, (q15_t)0x82a, (q15_t)0x8043,
+  (q15_t)0x824, (q15_t)0x8043, (q15_t)0x81e, (q15_t)0x8042, (q15_t)0x818, (q15_t)0x8042, (q15_t)0x811, (q15_t)0x8042,
+  (q15_t)0x80b, (q15_t)0x8041, (q15_t)0x805, (q15_t)0x8041, (q15_t)0x7fe, (q15_t)0x8040, (q15_t)0x7f8, (q15_t)0x8040,
+  (q15_t)0x7f2, (q15_t)0x8040, (q15_t)0x7ec, (q15_t)0x803f, (q15_t)0x7e5, (q15_t)0x803f, (q15_t)0x7df, (q15_t)0x803f,
+  (q15_t)0x7d9, (q15_t)0x803e, (q15_t)0x7d3, (q15_t)0x803e, (q15_t)0x7cc, (q15_t)0x803d, (q15_t)0x7c6, (q15_t)0x803d,
+  (q15_t)0x7c0, (q15_t)0x803d, (q15_t)0x7ba, (q15_t)0x803c, (q15_t)0x7b3, (q15_t)0x803c, (q15_t)0x7ad, (q15_t)0x803b,
+  (q15_t)0x7a7, (q15_t)0x803b, (q15_t)0x7a0, (q15_t)0x803b, (q15_t)0x79a, (q15_t)0x803a, (q15_t)0x794, (q15_t)0x803a,
+  (q15_t)0x78e, (q15_t)0x803a, (q15_t)0x787, (q15_t)0x8039, (q15_t)0x781, (q15_t)0x8039, (q15_t)0x77b, (q15_t)0x8039,
+  (q15_t)0x775, (q15_t)0x8038, (q15_t)0x76e, (q15_t)0x8038, (q15_t)0x768, (q15_t)0x8037, (q15_t)0x762, (q15_t)0x8037,
+  (q15_t)0x75b, (q15_t)0x8037, (q15_t)0x755, (q15_t)0x8036, (q15_t)0x74f, (q15_t)0x8036, (q15_t)0x749, (q15_t)0x8036,
+  (q15_t)0x742, (q15_t)0x8035, (q15_t)0x73c, (q15_t)0x8035, (q15_t)0x736, (q15_t)0x8035, (q15_t)0x730, (q15_t)0x8034,
+  (q15_t)0x729, (q15_t)0x8034, (q15_t)0x723, (q15_t)0x8033, (q15_t)0x71d, (q15_t)0x8033, (q15_t)0x716, (q15_t)0x8033,
+  (q15_t)0x710, (q15_t)0x8032, (q15_t)0x70a, (q15_t)0x8032, (q15_t)0x704, (q15_t)0x8032, (q15_t)0x6fd, (q15_t)0x8031,
+  (q15_t)0x6f7, (q15_t)0x8031, (q15_t)0x6f1, (q15_t)0x8031, (q15_t)0x6ea, (q15_t)0x8030, (q15_t)0x6e4, (q15_t)0x8030,
+  (q15_t)0x6de, (q15_t)0x8030, (q15_t)0x6d8, (q15_t)0x802f, (q15_t)0x6d1, (q15_t)0x802f, (q15_t)0x6cb, (q15_t)0x802f,
+  (q15_t)0x6c5, (q15_t)0x802e, (q15_t)0x6bf, (q15_t)0x802e, (q15_t)0x6b8, (q15_t)0x802e, (q15_t)0x6b2, (q15_t)0x802d,
+  (q15_t)0x6ac, (q15_t)0x802d, (q15_t)0x6a5, (q15_t)0x802d, (q15_t)0x69f, (q15_t)0x802c, (q15_t)0x699, (q15_t)0x802c,
+  (q15_t)0x693, (q15_t)0x802c, (q15_t)0x68c, (q15_t)0x802b, (q15_t)0x686, (q15_t)0x802b, (q15_t)0x680, (q15_t)0x802b,
+  (q15_t)0x67a, (q15_t)0x802a, (q15_t)0x673, (q15_t)0x802a, (q15_t)0x66d, (q15_t)0x802a, (q15_t)0x667, (q15_t)0x802a,
+  (q15_t)0x660, (q15_t)0x8029, (q15_t)0x65a, (q15_t)0x8029, (q15_t)0x654, (q15_t)0x8029, (q15_t)0x64e, (q15_t)0x8028,
+  (q15_t)0x647, (q15_t)0x8028, (q15_t)0x641, (q15_t)0x8028, (q15_t)0x63b, (q15_t)0x8027, (q15_t)0x635, (q15_t)0x8027,
+  (q15_t)0x62e, (q15_t)0x8027, (q15_t)0x628, (q15_t)0x8026, (q15_t)0x622, (q15_t)0x8026, (q15_t)0x61b, (q15_t)0x8026,
+  (q15_t)0x615, (q15_t)0x8026, (q15_t)0x60f, (q15_t)0x8025, (q15_t)0x609, (q15_t)0x8025, (q15_t)0x602, (q15_t)0x8025,
+  (q15_t)0x5fc, (q15_t)0x8024, (q15_t)0x5f6, (q15_t)0x8024, (q15_t)0x5ef, (q15_t)0x8024, (q15_t)0x5e9, (q15_t)0x8023,
+  (q15_t)0x5e3, (q15_t)0x8023, (q15_t)0x5dd, (q15_t)0x8023, (q15_t)0x5d6, (q15_t)0x8023, (q15_t)0x5d0, (q15_t)0x8022,
+  (q15_t)0x5ca, (q15_t)0x8022, (q15_t)0x5c4, (q15_t)0x8022, (q15_t)0x5bd, (q15_t)0x8021, (q15_t)0x5b7, (q15_t)0x8021,
+  (q15_t)0x5b1, (q15_t)0x8021, (q15_t)0x5aa, (q15_t)0x8021, (q15_t)0x5a4, (q15_t)0x8020, (q15_t)0x59e, (q15_t)0x8020,
+  (q15_t)0x598, (q15_t)0x8020, (q15_t)0x591, (q15_t)0x8020, (q15_t)0x58b, (q15_t)0x801f, (q15_t)0x585, (q15_t)0x801f,
+  (q15_t)0x57f, (q15_t)0x801f, (q15_t)0x578, (q15_t)0x801e, (q15_t)0x572, (q15_t)0x801e, (q15_t)0x56c, (q15_t)0x801e,
+  (q15_t)0x565, (q15_t)0x801e, (q15_t)0x55f, (q15_t)0x801d, (q15_t)0x559, (q15_t)0x801d, (q15_t)0x553, (q15_t)0x801d,
+  (q15_t)0x54c, (q15_t)0x801d, (q15_t)0x546, (q15_t)0x801c, (q15_t)0x540, (q15_t)0x801c, (q15_t)0x539, (q15_t)0x801c,
+  (q15_t)0x533, (q15_t)0x801c, (q15_t)0x52d, (q15_t)0x801b, (q15_t)0x527, (q15_t)0x801b, (q15_t)0x520, (q15_t)0x801b,
+  (q15_t)0x51a, (q15_t)0x801b, (q15_t)0x514, (q15_t)0x801a, (q15_t)0x50d, (q15_t)0x801a, (q15_t)0x507, (q15_t)0x801a,
+  (q15_t)0x501, (q15_t)0x801a, (q15_t)0x4fb, (q15_t)0x8019, (q15_t)0x4f4, (q15_t)0x8019, (q15_t)0x4ee, (q15_t)0x8019,
+  (q15_t)0x4e8, (q15_t)0x8019, (q15_t)0x4e2, (q15_t)0x8018, (q15_t)0x4db, (q15_t)0x8018, (q15_t)0x4d5, (q15_t)0x8018,
+  (q15_t)0x4cf, (q15_t)0x8018, (q15_t)0x4c8, (q15_t)0x8017, (q15_t)0x4c2, (q15_t)0x8017, (q15_t)0x4bc, (q15_t)0x8017,
+  (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x4af, (q15_t)0x8016, (q15_t)0x4a9, (q15_t)0x8016, (q15_t)0x4a3, (q15_t)0x8016,
+  (q15_t)0x49c, (q15_t)0x8016, (q15_t)0x496, (q15_t)0x8016, (q15_t)0x490, (q15_t)0x8015, (q15_t)0x48a, (q15_t)0x8015,
+  (q15_t)0x483, (q15_t)0x8015, (q15_t)0x47d, (q15_t)0x8015, (q15_t)0x477, (q15_t)0x8014, (q15_t)0x471, (q15_t)0x8014,
+  (q15_t)0x46a, (q15_t)0x8014, (q15_t)0x464, (q15_t)0x8014, (q15_t)0x45e, (q15_t)0x8014, (q15_t)0x457, (q15_t)0x8013,
+  (q15_t)0x451, (q15_t)0x8013, (q15_t)0x44b, (q15_t)0x8013, (q15_t)0x445, (q15_t)0x8013, (q15_t)0x43e, (q15_t)0x8013,
+  (q15_t)0x438, (q15_t)0x8012, (q15_t)0x432, (q15_t)0x8012, (q15_t)0x42b, (q15_t)0x8012, (q15_t)0x425, (q15_t)0x8012,
+  (q15_t)0x41f, (q15_t)0x8012, (q15_t)0x419, (q15_t)0x8011, (q15_t)0x412, (q15_t)0x8011, (q15_t)0x40c, (q15_t)0x8011,
+  (q15_t)0x406, (q15_t)0x8011, (q15_t)0x3ff, (q15_t)0x8011, (q15_t)0x3f9, (q15_t)0x8010, (q15_t)0x3f3, (q15_t)0x8010,
+  (q15_t)0x3ed, (q15_t)0x8010, (q15_t)0x3e6, (q15_t)0x8010, (q15_t)0x3e0, (q15_t)0x8010, (q15_t)0x3da, (q15_t)0x800f,
+  (q15_t)0x3d4, (q15_t)0x800f, (q15_t)0x3cd, (q15_t)0x800f, (q15_t)0x3c7, (q15_t)0x800f, (q15_t)0x3c1, (q15_t)0x800f,
+  (q15_t)0x3ba, (q15_t)0x800e, (q15_t)0x3b4, (q15_t)0x800e, (q15_t)0x3ae, (q15_t)0x800e, (q15_t)0x3a8, (q15_t)0x800e,
+  (q15_t)0x3a1, (q15_t)0x800e, (q15_t)0x39b, (q15_t)0x800e, (q15_t)0x395, (q15_t)0x800d, (q15_t)0x38e, (q15_t)0x800d,
+  (q15_t)0x388, (q15_t)0x800d, (q15_t)0x382, (q15_t)0x800d, (q15_t)0x37c, (q15_t)0x800d, (q15_t)0x375, (q15_t)0x800c,
+  (q15_t)0x36f, (q15_t)0x800c, (q15_t)0x369, (q15_t)0x800c, (q15_t)0x362, (q15_t)0x800c, (q15_t)0x35c, (q15_t)0x800c,
+  (q15_t)0x356, (q15_t)0x800c, (q15_t)0x350, (q15_t)0x800b, (q15_t)0x349, (q15_t)0x800b, (q15_t)0x343, (q15_t)0x800b,
+  (q15_t)0x33d, (q15_t)0x800b, (q15_t)0x337, (q15_t)0x800b, (q15_t)0x330, (q15_t)0x800b, (q15_t)0x32a, (q15_t)0x800b,
+  (q15_t)0x324, (q15_t)0x800a, (q15_t)0x31d, (q15_t)0x800a, (q15_t)0x317, (q15_t)0x800a, (q15_t)0x311, (q15_t)0x800a,
+  (q15_t)0x30b, (q15_t)0x800a, (q15_t)0x304, (q15_t)0x800a, (q15_t)0x2fe, (q15_t)0x8009, (q15_t)0x2f8, (q15_t)0x8009,
+  (q15_t)0x2f1, (q15_t)0x8009, (q15_t)0x2eb, (q15_t)0x8009, (q15_t)0x2e5, (q15_t)0x8009, (q15_t)0x2df, (q15_t)0x8009,
+  (q15_t)0x2d8, (q15_t)0x8009, (q15_t)0x2d2, (q15_t)0x8008, (q15_t)0x2cc, (q15_t)0x8008, (q15_t)0x2c5, (q15_t)0x8008,
+  (q15_t)0x2bf, (q15_t)0x8008, (q15_t)0x2b9, (q15_t)0x8008, (q15_t)0x2b3, (q15_t)0x8008, (q15_t)0x2ac, (q15_t)0x8008,
+  (q15_t)0x2a6, (q15_t)0x8008, (q15_t)0x2a0, (q15_t)0x8007, (q15_t)0x299, (q15_t)0x8007, (q15_t)0x293, (q15_t)0x8007,
+  (q15_t)0x28d, (q15_t)0x8007, (q15_t)0x287, (q15_t)0x8007, (q15_t)0x280, (q15_t)0x8007, (q15_t)0x27a, (q15_t)0x8007,
+  (q15_t)0x274, (q15_t)0x8007, (q15_t)0x26d, (q15_t)0x8006, (q15_t)0x267, (q15_t)0x8006, (q15_t)0x261, (q15_t)0x8006,
+  (q15_t)0x25b, (q15_t)0x8006, (q15_t)0x254, (q15_t)0x8006, (q15_t)0x24e, (q15_t)0x8006, (q15_t)0x248, (q15_t)0x8006,
+  (q15_t)0x242, (q15_t)0x8006, (q15_t)0x23b, (q15_t)0x8005, (q15_t)0x235, (q15_t)0x8005, (q15_t)0x22f, (q15_t)0x8005,
+  (q15_t)0x228, (q15_t)0x8005, (q15_t)0x222, (q15_t)0x8005, (q15_t)0x21c, (q15_t)0x8005, (q15_t)0x216, (q15_t)0x8005,
+  (q15_t)0x20f, (q15_t)0x8005, (q15_t)0x209, (q15_t)0x8005, (q15_t)0x203, (q15_t)0x8005, (q15_t)0x1fc, (q15_t)0x8004,
+  (q15_t)0x1f6, (q15_t)0x8004, (q15_t)0x1f0, (q15_t)0x8004, (q15_t)0x1ea, (q15_t)0x8004, (q15_t)0x1e3, (q15_t)0x8004,
+  (q15_t)0x1dd, (q15_t)0x8004, (q15_t)0x1d7, (q15_t)0x8004, (q15_t)0x1d0, (q15_t)0x8004, (q15_t)0x1ca, (q15_t)0x8004,
+  (q15_t)0x1c4, (q15_t)0x8004, (q15_t)0x1be, (q15_t)0x8004, (q15_t)0x1b7, (q15_t)0x8003, (q15_t)0x1b1, (q15_t)0x8003,
+  (q15_t)0x1ab, (q15_t)0x8003, (q15_t)0x1a4, (q15_t)0x8003, (q15_t)0x19e, (q15_t)0x8003, (q15_t)0x198, (q15_t)0x8003,
+  (q15_t)0x192, (q15_t)0x8003, (q15_t)0x18b, (q15_t)0x8003, (q15_t)0x185, (q15_t)0x8003, (q15_t)0x17f, (q15_t)0x8003,
+  (q15_t)0x178, (q15_t)0x8003, (q15_t)0x172, (q15_t)0x8003, (q15_t)0x16c, (q15_t)0x8003, (q15_t)0x166, (q15_t)0x8002,
+  (q15_t)0x15f, (q15_t)0x8002, (q15_t)0x159, (q15_t)0x8002, (q15_t)0x153, (q15_t)0x8002, (q15_t)0x14d, (q15_t)0x8002,
+  (q15_t)0x146, (q15_t)0x8002, (q15_t)0x140, (q15_t)0x8002, (q15_t)0x13a, (q15_t)0x8002, (q15_t)0x133, (q15_t)0x8002,
+  (q15_t)0x12d, (q15_t)0x8002, (q15_t)0x127, (q15_t)0x8002, (q15_t)0x121, (q15_t)0x8002, (q15_t)0x11a, (q15_t)0x8002,
+  (q15_t)0x114, (q15_t)0x8002, (q15_t)0x10e, (q15_t)0x8002, (q15_t)0x107, (q15_t)0x8002, (q15_t)0x101, (q15_t)0x8002,
+  (q15_t)0xfb, (q15_t)0x8001, (q15_t)0xf5, (q15_t)0x8001, (q15_t)0xee, (q15_t)0x8001, (q15_t)0xe8, (q15_t)0x8001,
+  (q15_t)0xe2, (q15_t)0x8001, (q15_t)0xdb, (q15_t)0x8001, (q15_t)0xd5, (q15_t)0x8001, (q15_t)0xcf, (q15_t)0x8001,
+  (q15_t)0xc9, (q15_t)0x8001, (q15_t)0xc2, (q15_t)0x8001, (q15_t)0xbc, (q15_t)0x8001, (q15_t)0xb6, (q15_t)0x8001,
+  (q15_t)0xaf, (q15_t)0x8001, (q15_t)0xa9, (q15_t)0x8001, (q15_t)0xa3, (q15_t)0x8001, (q15_t)0x9d, (q15_t)0x8001,
+  (q15_t)0x96, (q15_t)0x8001, (q15_t)0x90, (q15_t)0x8001, (q15_t)0x8a, (q15_t)0x8001, (q15_t)0x83, (q15_t)0x8001,
+  (q15_t)0x7d, (q15_t)0x8001, (q15_t)0x77, (q15_t)0x8001, (q15_t)0x71, (q15_t)0x8001, (q15_t)0x6a, (q15_t)0x8001,
+  (q15_t)0x64, (q15_t)0x8001, (q15_t)0x5e, (q15_t)0x8001, (q15_t)0x57, (q15_t)0x8001, (q15_t)0x51, (q15_t)0x8001,
+  (q15_t)0x4b, (q15_t)0x8001, (q15_t)0x45, (q15_t)0x8001, (q15_t)0x3e, (q15_t)0x8001, (q15_t)0x38, (q15_t)0x8001,
+  (q15_t)0x32, (q15_t)0x8001, (q15_t)0x2b, (q15_t)0x8001, (q15_t)0x25, (q15_t)0x8001, (q15_t)0x1f, (q15_t)0x8001,
+  (q15_t)0x19, (q15_t)0x8001, (q15_t)0x12, (q15_t)0x8001, (q15_t)0xc, (q15_t)0x8001, (q15_t)0x6, (q15_t)0x8001
+};
+
+    const q15_t __ALIGNED(4) cos_factorsQ15_8192[8192] = {
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
+  (q15_t)0x7fff, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe,
+  (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe,
+  (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd,
+  (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffc,
+  (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc,
+  (q15_t)0x7ffc, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb,
+  (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa,
+  (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9,
+  (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff8,
+  (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff7,
+  (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6,
+  (q15_t)0x7ff6, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff4,
+  (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff3,
+  (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff2, (q15_t)0x7ff2, (q15_t)0x7ff2, (q15_t)0x7ff2, (q15_t)0x7ff2,
+  (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff0, (q15_t)0x7ff0,
+  (q15_t)0x7ff0, (q15_t)0x7ff0, (q15_t)0x7ff0, (q15_t)0x7fef, (q15_t)0x7fef, (q15_t)0x7fef, (q15_t)0x7fef, (q15_t)0x7fef,
+  (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fed, (q15_t)0x7fed, (q15_t)0x7fed,
+  (q15_t)0x7fed, (q15_t)0x7fed, (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7feb, (q15_t)0x7feb,
+  (q15_t)0x7feb, (q15_t)0x7feb, (q15_t)0x7feb, (q15_t)0x7fea, (q15_t)0x7fea, (q15_t)0x7fea, (q15_t)0x7fea, (q15_t)0x7fe9,
+  (q15_t)0x7fe9, (q15_t)0x7fe9, (q15_t)0x7fe9, (q15_t)0x7fe8, (q15_t)0x7fe8, (q15_t)0x7fe8, (q15_t)0x7fe8, (q15_t)0x7fe8,
+  (q15_t)0x7fe7, (q15_t)0x7fe7, (q15_t)0x7fe7, (q15_t)0x7fe7, (q15_t)0x7fe6, (q15_t)0x7fe6, (q15_t)0x7fe6, (q15_t)0x7fe6,
+  (q15_t)0x7fe5, (q15_t)0x7fe5, (q15_t)0x7fe5, (q15_t)0x7fe5, (q15_t)0x7fe4, (q15_t)0x7fe4, (q15_t)0x7fe4, (q15_t)0x7fe4,
+  (q15_t)0x7fe3, (q15_t)0x7fe3, (q15_t)0x7fe3, (q15_t)0x7fe2, (q15_t)0x7fe2, (q15_t)0x7fe2, (q15_t)0x7fe2, (q15_t)0x7fe1,
+  (q15_t)0x7fe1, (q15_t)0x7fe1, (q15_t)0x7fe1, (q15_t)0x7fe0, (q15_t)0x7fe0, (q15_t)0x7fe0, (q15_t)0x7fdf, (q15_t)0x7fdf,
+  (q15_t)0x7fdf, (q15_t)0x7fdf, (q15_t)0x7fde, (q15_t)0x7fde, (q15_t)0x7fde, (q15_t)0x7fde, (q15_t)0x7fdd, (q15_t)0x7fdd,
+  (q15_t)0x7fdd, (q15_t)0x7fdc, (q15_t)0x7fdc, (q15_t)0x7fdc, (q15_t)0x7fdb, (q15_t)0x7fdb, (q15_t)0x7fdb, (q15_t)0x7fdb,
+  (q15_t)0x7fda, (q15_t)0x7fda, (q15_t)0x7fda, (q15_t)0x7fd9, (q15_t)0x7fd9, (q15_t)0x7fd9, (q15_t)0x7fd8, (q15_t)0x7fd8,
+  (q15_t)0x7fd8, (q15_t)0x7fd8, (q15_t)0x7fd7, (q15_t)0x7fd7, (q15_t)0x7fd7, (q15_t)0x7fd6, (q15_t)0x7fd6, (q15_t)0x7fd6,
+  (q15_t)0x7fd5, (q15_t)0x7fd5, (q15_t)0x7fd5, (q15_t)0x7fd4, (q15_t)0x7fd4, (q15_t)0x7fd4, (q15_t)0x7fd3, (q15_t)0x7fd3,
+  (q15_t)0x7fd3, (q15_t)0x7fd2, (q15_t)0x7fd2, (q15_t)0x7fd2, (q15_t)0x7fd1, (q15_t)0x7fd1, (q15_t)0x7fd1, (q15_t)0x7fd0,
+  (q15_t)0x7fd0, (q15_t)0x7fd0, (q15_t)0x7fcf, (q15_t)0x7fcf, (q15_t)0x7fcf, (q15_t)0x7fce, (q15_t)0x7fce, (q15_t)0x7fce,
+  (q15_t)0x7fcd, (q15_t)0x7fcd, (q15_t)0x7fcd, (q15_t)0x7fcc, (q15_t)0x7fcc, (q15_t)0x7fcc, (q15_t)0x7fcb, (q15_t)0x7fcb,
+  (q15_t)0x7fcb, (q15_t)0x7fca, (q15_t)0x7fca, (q15_t)0x7fc9, (q15_t)0x7fc9, (q15_t)0x7fc9, (q15_t)0x7fc8, (q15_t)0x7fc8,
+  (q15_t)0x7fc8, (q15_t)0x7fc7, (q15_t)0x7fc7, (q15_t)0x7fc7, (q15_t)0x7fc6, (q15_t)0x7fc6, (q15_t)0x7fc5, (q15_t)0x7fc5,
+  (q15_t)0x7fc5, (q15_t)0x7fc4, (q15_t)0x7fc4, (q15_t)0x7fc4, (q15_t)0x7fc3, (q15_t)0x7fc3, (q15_t)0x7fc2, (q15_t)0x7fc2,
+  (q15_t)0x7fc2, (q15_t)0x7fc1, (q15_t)0x7fc1, (q15_t)0x7fc0, (q15_t)0x7fc0, (q15_t)0x7fc0, (q15_t)0x7fbf, (q15_t)0x7fbf,
+  (q15_t)0x7fbf, (q15_t)0x7fbe, (q15_t)0x7fbe, (q15_t)0x7fbd, (q15_t)0x7fbd, (q15_t)0x7fbd, (q15_t)0x7fbc, (q15_t)0x7fbc,
+  (q15_t)0x7fbb, (q15_t)0x7fbb, (q15_t)0x7fbb, (q15_t)0x7fba, (q15_t)0x7fba, (q15_t)0x7fb9, (q15_t)0x7fb9, (q15_t)0x7fb8,
+  (q15_t)0x7fb8, (q15_t)0x7fb8, (q15_t)0x7fb7, (q15_t)0x7fb7, (q15_t)0x7fb6, (q15_t)0x7fb6, (q15_t)0x7fb6, (q15_t)0x7fb5,
+  (q15_t)0x7fb5, (q15_t)0x7fb4, (q15_t)0x7fb4, (q15_t)0x7fb3, (q15_t)0x7fb3, (q15_t)0x7fb3, (q15_t)0x7fb2, (q15_t)0x7fb2,
+  (q15_t)0x7fb1, (q15_t)0x7fb1, (q15_t)0x7fb0, (q15_t)0x7fb0, (q15_t)0x7faf, (q15_t)0x7faf, (q15_t)0x7faf, (q15_t)0x7fae,
+  (q15_t)0x7fae, (q15_t)0x7fad, (q15_t)0x7fad, (q15_t)0x7fac, (q15_t)0x7fac, (q15_t)0x7fac, (q15_t)0x7fab, (q15_t)0x7fab,
+  (q15_t)0x7faa, (q15_t)0x7faa, (q15_t)0x7fa9, (q15_t)0x7fa9, (q15_t)0x7fa8, (q15_t)0x7fa8, (q15_t)0x7fa7, (q15_t)0x7fa7,
+  (q15_t)0x7fa6, (q15_t)0x7fa6, (q15_t)0x7fa6, (q15_t)0x7fa5, (q15_t)0x7fa5, (q15_t)0x7fa4, (q15_t)0x7fa4, (q15_t)0x7fa3,
+  (q15_t)0x7fa3, (q15_t)0x7fa2, (q15_t)0x7fa2, (q15_t)0x7fa1, (q15_t)0x7fa1, (q15_t)0x7fa0, (q15_t)0x7fa0, (q15_t)0x7f9f,
+  (q15_t)0x7f9f, (q15_t)0x7f9e, (q15_t)0x7f9e, (q15_t)0x7f9d, (q15_t)0x7f9d, (q15_t)0x7f9c, (q15_t)0x7f9c, (q15_t)0x7f9c,
+  (q15_t)0x7f9b, (q15_t)0x7f9b, (q15_t)0x7f9a, (q15_t)0x7f9a, (q15_t)0x7f99, (q15_t)0x7f99, (q15_t)0x7f98, (q15_t)0x7f98,
+  (q15_t)0x7f97, (q15_t)0x7f97, (q15_t)0x7f96, (q15_t)0x7f96, (q15_t)0x7f95, (q15_t)0x7f95, (q15_t)0x7f94, (q15_t)0x7f94,
+  (q15_t)0x7f93, (q15_t)0x7f92, (q15_t)0x7f92, (q15_t)0x7f91, (q15_t)0x7f91, (q15_t)0x7f90, (q15_t)0x7f90, (q15_t)0x7f8f,
+  (q15_t)0x7f8f, (q15_t)0x7f8e, (q15_t)0x7f8e, (q15_t)0x7f8d, (q15_t)0x7f8d, (q15_t)0x7f8c, (q15_t)0x7f8c, (q15_t)0x7f8b,
+  (q15_t)0x7f8b, (q15_t)0x7f8a, (q15_t)0x7f8a, (q15_t)0x7f89, (q15_t)0x7f89, (q15_t)0x7f88, (q15_t)0x7f87, (q15_t)0x7f87,
+  (q15_t)0x7f86, (q15_t)0x7f86, (q15_t)0x7f85, (q15_t)0x7f85, (q15_t)0x7f84, (q15_t)0x7f84, (q15_t)0x7f83, (q15_t)0x7f83,
+  (q15_t)0x7f82, (q15_t)0x7f81, (q15_t)0x7f81, (q15_t)0x7f80, (q15_t)0x7f80, (q15_t)0x7f7f, (q15_t)0x7f7f, (q15_t)0x7f7e,
+  (q15_t)0x7f7e, (q15_t)0x7f7d, (q15_t)0x7f7c, (q15_t)0x7f7c, (q15_t)0x7f7b, (q15_t)0x7f7b, (q15_t)0x7f7a, (q15_t)0x7f7a,
+  (q15_t)0x7f79, (q15_t)0x7f79, (q15_t)0x7f78, (q15_t)0x7f77, (q15_t)0x7f77, (q15_t)0x7f76, (q15_t)0x7f76, (q15_t)0x7f75,
+  (q15_t)0x7f75, (q15_t)0x7f74, (q15_t)0x7f73, (q15_t)0x7f73, (q15_t)0x7f72, (q15_t)0x7f72, (q15_t)0x7f71, (q15_t)0x7f70,
+  (q15_t)0x7f70, (q15_t)0x7f6f, (q15_t)0x7f6f, (q15_t)0x7f6e, (q15_t)0x7f6d, (q15_t)0x7f6d, (q15_t)0x7f6c, (q15_t)0x7f6c,
+  (q15_t)0x7f6b, (q15_t)0x7f6b, (q15_t)0x7f6a, (q15_t)0x7f69, (q15_t)0x7f69, (q15_t)0x7f68, (q15_t)0x7f68, (q15_t)0x7f67,
+  (q15_t)0x7f66, (q15_t)0x7f66, (q15_t)0x7f65, (q15_t)0x7f64, (q15_t)0x7f64, (q15_t)0x7f63, (q15_t)0x7f63, (q15_t)0x7f62,
+  (q15_t)0x7f61, (q15_t)0x7f61, (q15_t)0x7f60, (q15_t)0x7f60, (q15_t)0x7f5f, (q15_t)0x7f5e, (q15_t)0x7f5e, (q15_t)0x7f5d,
+  (q15_t)0x7f5c, (q15_t)0x7f5c, (q15_t)0x7f5b, (q15_t)0x7f5b, (q15_t)0x7f5a, (q15_t)0x7f59, (q15_t)0x7f59, (q15_t)0x7f58,
+  (q15_t)0x7f57, (q15_t)0x7f57, (q15_t)0x7f56, (q15_t)0x7f55, (q15_t)0x7f55, (q15_t)0x7f54, (q15_t)0x7f54, (q15_t)0x7f53,
+  (q15_t)0x7f52, (q15_t)0x7f52, (q15_t)0x7f51, (q15_t)0x7f50, (q15_t)0x7f50, (q15_t)0x7f4f, (q15_t)0x7f4e, (q15_t)0x7f4e,
+  (q15_t)0x7f4d, (q15_t)0x7f4c, (q15_t)0x7f4c, (q15_t)0x7f4b, (q15_t)0x7f4a, (q15_t)0x7f4a, (q15_t)0x7f49, (q15_t)0x7f48,
+  (q15_t)0x7f48, (q15_t)0x7f47, (q15_t)0x7f46, (q15_t)0x7f46, (q15_t)0x7f45, (q15_t)0x7f44, (q15_t)0x7f44, (q15_t)0x7f43,
+  (q15_t)0x7f42, (q15_t)0x7f42, (q15_t)0x7f41, (q15_t)0x7f40, (q15_t)0x7f40, (q15_t)0x7f3f, (q15_t)0x7f3e, (q15_t)0x7f3e,
+  (q15_t)0x7f3d, (q15_t)0x7f3c, (q15_t)0x7f3c, (q15_t)0x7f3b, (q15_t)0x7f3a, (q15_t)0x7f3a, (q15_t)0x7f39, (q15_t)0x7f38,
+  (q15_t)0x7f37, (q15_t)0x7f37, (q15_t)0x7f36, (q15_t)0x7f35, (q15_t)0x7f35, (q15_t)0x7f34, (q15_t)0x7f33, (q15_t)0x7f33,
+  (q15_t)0x7f32, (q15_t)0x7f31, (q15_t)0x7f31, (q15_t)0x7f30, (q15_t)0x7f2f, (q15_t)0x7f2e, (q15_t)0x7f2e, (q15_t)0x7f2d,
+  (q15_t)0x7f2c, (q15_t)0x7f2c, (q15_t)0x7f2b, (q15_t)0x7f2a, (q15_t)0x7f29, (q15_t)0x7f29, (q15_t)0x7f28, (q15_t)0x7f27,
+  (q15_t)0x7f27, (q15_t)0x7f26, (q15_t)0x7f25, (q15_t)0x7f24, (q15_t)0x7f24, (q15_t)0x7f23, (q15_t)0x7f22, (q15_t)0x7f21,
+  (q15_t)0x7f21, (q15_t)0x7f20, (q15_t)0x7f1f, (q15_t)0x7f1f, (q15_t)0x7f1e, (q15_t)0x7f1d, (q15_t)0x7f1c, (q15_t)0x7f1c,
+  (q15_t)0x7f1b, (q15_t)0x7f1a, (q15_t)0x7f19, (q15_t)0x7f19, (q15_t)0x7f18, (q15_t)0x7f17, (q15_t)0x7f16, (q15_t)0x7f16,
+  (q15_t)0x7f15, (q15_t)0x7f14, (q15_t)0x7f13, (q15_t)0x7f13, (q15_t)0x7f12, (q15_t)0x7f11, (q15_t)0x7f10, (q15_t)0x7f10,
+  (q15_t)0x7f0f, (q15_t)0x7f0e, (q15_t)0x7f0d, (q15_t)0x7f0d, (q15_t)0x7f0c, (q15_t)0x7f0b, (q15_t)0x7f0a, (q15_t)0x7f09,
+  (q15_t)0x7f09, (q15_t)0x7f08, (q15_t)0x7f07, (q15_t)0x7f06, (q15_t)0x7f06, (q15_t)0x7f05, (q15_t)0x7f04, (q15_t)0x7f03,
+  (q15_t)0x7f02, (q15_t)0x7f02, (q15_t)0x7f01, (q15_t)0x7f00, (q15_t)0x7eff, (q15_t)0x7eff, (q15_t)0x7efe, (q15_t)0x7efd,
+  (q15_t)0x7efc, (q15_t)0x7efb, (q15_t)0x7efb, (q15_t)0x7efa, (q15_t)0x7ef9, (q15_t)0x7ef8, (q15_t)0x7ef7, (q15_t)0x7ef7,
+  (q15_t)0x7ef6, (q15_t)0x7ef5, (q15_t)0x7ef4, (q15_t)0x7ef3, (q15_t)0x7ef3, (q15_t)0x7ef2, (q15_t)0x7ef1, (q15_t)0x7ef0,
+  (q15_t)0x7eef, (q15_t)0x7eef, (q15_t)0x7eee, (q15_t)0x7eed, (q15_t)0x7eec, (q15_t)0x7eeb, (q15_t)0x7eeb, (q15_t)0x7eea,
+  (q15_t)0x7ee9, (q15_t)0x7ee8, (q15_t)0x7ee7, (q15_t)0x7ee6, (q15_t)0x7ee6, (q15_t)0x7ee5, (q15_t)0x7ee4, (q15_t)0x7ee3,
+  (q15_t)0x7ee2, (q15_t)0x7ee2, (q15_t)0x7ee1, (q15_t)0x7ee0, (q15_t)0x7edf, (q15_t)0x7ede, (q15_t)0x7edd, (q15_t)0x7edd,
+  (q15_t)0x7edc, (q15_t)0x7edb, (q15_t)0x7eda, (q15_t)0x7ed9, (q15_t)0x7ed8, (q15_t)0x7ed8, (q15_t)0x7ed7, (q15_t)0x7ed6,
+  (q15_t)0x7ed5, (q15_t)0x7ed4, (q15_t)0x7ed3, (q15_t)0x7ed2, (q15_t)0x7ed2, (q15_t)0x7ed1, (q15_t)0x7ed0, (q15_t)0x7ecf,
+  (q15_t)0x7ece, (q15_t)0x7ecd, (q15_t)0x7ecc, (q15_t)0x7ecc, (q15_t)0x7ecb, (q15_t)0x7eca, (q15_t)0x7ec9, (q15_t)0x7ec8,
+  (q15_t)0x7ec7, (q15_t)0x7ec6, (q15_t)0x7ec6, (q15_t)0x7ec5, (q15_t)0x7ec4, (q15_t)0x7ec3, (q15_t)0x7ec2, (q15_t)0x7ec1,
+  (q15_t)0x7ec0, (q15_t)0x7ebf, (q15_t)0x7ebf, (q15_t)0x7ebe, (q15_t)0x7ebd, (q15_t)0x7ebc, (q15_t)0x7ebb, (q15_t)0x7eba,
+  (q15_t)0x7eb9, (q15_t)0x7eb8, (q15_t)0x7eb8, (q15_t)0x7eb7, (q15_t)0x7eb6, (q15_t)0x7eb5, (q15_t)0x7eb4, (q15_t)0x7eb3,
+  (q15_t)0x7eb2, (q15_t)0x7eb1, (q15_t)0x7eb0, (q15_t)0x7eaf, (q15_t)0x7eaf, (q15_t)0x7eae, (q15_t)0x7ead, (q15_t)0x7eac,
+  (q15_t)0x7eab, (q15_t)0x7eaa, (q15_t)0x7ea9, (q15_t)0x7ea8, (q15_t)0x7ea7, (q15_t)0x7ea6, (q15_t)0x7ea6, (q15_t)0x7ea5,
+  (q15_t)0x7ea4, (q15_t)0x7ea3, (q15_t)0x7ea2, (q15_t)0x7ea1, (q15_t)0x7ea0, (q15_t)0x7e9f, (q15_t)0x7e9e, (q15_t)0x7e9d,
+  (q15_t)0x7e9c, (q15_t)0x7e9b, (q15_t)0x7e9b, (q15_t)0x7e9a, (q15_t)0x7e99, (q15_t)0x7e98, (q15_t)0x7e97, (q15_t)0x7e96,
+  (q15_t)0x7e95, (q15_t)0x7e94, (q15_t)0x7e93, (q15_t)0x7e92, (q15_t)0x7e91, (q15_t)0x7e90, (q15_t)0x7e8f, (q15_t)0x7e8e,
+  (q15_t)0x7e8d, (q15_t)0x7e8d, (q15_t)0x7e8c, (q15_t)0x7e8b, (q15_t)0x7e8a, (q15_t)0x7e89, (q15_t)0x7e88, (q15_t)0x7e87,
+  (q15_t)0x7e86, (q15_t)0x7e85, (q15_t)0x7e84, (q15_t)0x7e83, (q15_t)0x7e82, (q15_t)0x7e81, (q15_t)0x7e80, (q15_t)0x7e7f,
+  (q15_t)0x7e7e, (q15_t)0x7e7d, (q15_t)0x7e7c, (q15_t)0x7e7b, (q15_t)0x7e7a, (q15_t)0x7e79, (q15_t)0x7e78, (q15_t)0x7e77,
+  (q15_t)0x7e77, (q15_t)0x7e76, (q15_t)0x7e75, (q15_t)0x7e74, (q15_t)0x7e73, (q15_t)0x7e72, (q15_t)0x7e71, (q15_t)0x7e70,
+  (q15_t)0x7e6f, (q15_t)0x7e6e, (q15_t)0x7e6d, (q15_t)0x7e6c, (q15_t)0x7e6b, (q15_t)0x7e6a, (q15_t)0x7e69, (q15_t)0x7e68,
+  (q15_t)0x7e67, (q15_t)0x7e66, (q15_t)0x7e65, (q15_t)0x7e64, (q15_t)0x7e63, (q15_t)0x7e62, (q15_t)0x7e61, (q15_t)0x7e60,
+  (q15_t)0x7e5f, (q15_t)0x7e5e, (q15_t)0x7e5d, (q15_t)0x7e5c, (q15_t)0x7e5b, (q15_t)0x7e5a, (q15_t)0x7e59, (q15_t)0x7e58,
+  (q15_t)0x7e57, (q15_t)0x7e56, (q15_t)0x7e55, (q15_t)0x7e54, (q15_t)0x7e53, (q15_t)0x7e52, (q15_t)0x7e51, (q15_t)0x7e50,
+  (q15_t)0x7e4f, (q15_t)0x7e4e, (q15_t)0x7e4d, (q15_t)0x7e4c, (q15_t)0x7e4b, (q15_t)0x7e4a, (q15_t)0x7e49, (q15_t)0x7e48,
+  (q15_t)0x7e47, (q15_t)0x7e46, (q15_t)0x7e45, (q15_t)0x7e43, (q15_t)0x7e42, (q15_t)0x7e41, (q15_t)0x7e40, (q15_t)0x7e3f,
+  (q15_t)0x7e3e, (q15_t)0x7e3d, (q15_t)0x7e3c, (q15_t)0x7e3b, (q15_t)0x7e3a, (q15_t)0x7e39, (q15_t)0x7e38, (q15_t)0x7e37,
+  (q15_t)0x7e36, (q15_t)0x7e35, (q15_t)0x7e34, (q15_t)0x7e33, (q15_t)0x7e32, (q15_t)0x7e31, (q15_t)0x7e30, (q15_t)0x7e2f,
+  (q15_t)0x7e2e, (q15_t)0x7e2d, (q15_t)0x7e2b, (q15_t)0x7e2a, (q15_t)0x7e29, (q15_t)0x7e28, (q15_t)0x7e27, (q15_t)0x7e26,
+  (q15_t)0x7e25, (q15_t)0x7e24, (q15_t)0x7e23, (q15_t)0x7e22, (q15_t)0x7e21, (q15_t)0x7e20, (q15_t)0x7e1f, (q15_t)0x7e1e,
+  (q15_t)0x7e1d, (q15_t)0x7e1b, (q15_t)0x7e1a, (q15_t)0x7e19, (q15_t)0x7e18, (q15_t)0x7e17, (q15_t)0x7e16, (q15_t)0x7e15,
+  (q15_t)0x7e14, (q15_t)0x7e13, (q15_t)0x7e12, (q15_t)0x7e11, (q15_t)0x7e10, (q15_t)0x7e0e, (q15_t)0x7e0d, (q15_t)0x7e0c,
+  (q15_t)0x7e0b, (q15_t)0x7e0a, (q15_t)0x7e09, (q15_t)0x7e08, (q15_t)0x7e07, (q15_t)0x7e06, (q15_t)0x7e05, (q15_t)0x7e04,
+  (q15_t)0x7e02, (q15_t)0x7e01, (q15_t)0x7e00, (q15_t)0x7dff, (q15_t)0x7dfe, (q15_t)0x7dfd, (q15_t)0x7dfc, (q15_t)0x7dfb,
+  (q15_t)0x7dfa, (q15_t)0x7df8, (q15_t)0x7df7, (q15_t)0x7df6, (q15_t)0x7df5, (q15_t)0x7df4, (q15_t)0x7df3, (q15_t)0x7df2,
+  (q15_t)0x7df1, (q15_t)0x7def, (q15_t)0x7dee, (q15_t)0x7ded, (q15_t)0x7dec, (q15_t)0x7deb, (q15_t)0x7dea, (q15_t)0x7de9,
+  (q15_t)0x7de8, (q15_t)0x7de6, (q15_t)0x7de5, (q15_t)0x7de4, (q15_t)0x7de3, (q15_t)0x7de2, (q15_t)0x7de1, (q15_t)0x7de0,
+  (q15_t)0x7dde, (q15_t)0x7ddd, (q15_t)0x7ddc, (q15_t)0x7ddb, (q15_t)0x7dda, (q15_t)0x7dd9, (q15_t)0x7dd8, (q15_t)0x7dd6,
+  (q15_t)0x7dd5, (q15_t)0x7dd4, (q15_t)0x7dd3, (q15_t)0x7dd2, (q15_t)0x7dd1, (q15_t)0x7dd0, (q15_t)0x7dce, (q15_t)0x7dcd,
+  (q15_t)0x7dcc, (q15_t)0x7dcb, (q15_t)0x7dca, (q15_t)0x7dc9, (q15_t)0x7dc7, (q15_t)0x7dc6, (q15_t)0x7dc5, (q15_t)0x7dc4,
+  (q15_t)0x7dc3, (q15_t)0x7dc2, (q15_t)0x7dc0, (q15_t)0x7dbf, (q15_t)0x7dbe, (q15_t)0x7dbd, (q15_t)0x7dbc, (q15_t)0x7dbb,
+  (q15_t)0x7db9, (q15_t)0x7db8, (q15_t)0x7db7, (q15_t)0x7db6, (q15_t)0x7db5, (q15_t)0x7db3, (q15_t)0x7db2, (q15_t)0x7db1,
+  (q15_t)0x7db0, (q15_t)0x7daf, (q15_t)0x7dae, (q15_t)0x7dac, (q15_t)0x7dab, (q15_t)0x7daa, (q15_t)0x7da9, (q15_t)0x7da8,
+  (q15_t)0x7da6, (q15_t)0x7da5, (q15_t)0x7da4, (q15_t)0x7da3, (q15_t)0x7da2, (q15_t)0x7da0, (q15_t)0x7d9f, (q15_t)0x7d9e,
+  (q15_t)0x7d9d, (q15_t)0x7d9c, (q15_t)0x7d9a, (q15_t)0x7d99, (q15_t)0x7d98, (q15_t)0x7d97, (q15_t)0x7d95, (q15_t)0x7d94,
+  (q15_t)0x7d93, (q15_t)0x7d92, (q15_t)0x7d91, (q15_t)0x7d8f, (q15_t)0x7d8e, (q15_t)0x7d8d, (q15_t)0x7d8c, (q15_t)0x7d8a,
+  (q15_t)0x7d89, (q15_t)0x7d88, (q15_t)0x7d87, (q15_t)0x7d86, (q15_t)0x7d84, (q15_t)0x7d83, (q15_t)0x7d82, (q15_t)0x7d81,
+  (q15_t)0x7d7f, (q15_t)0x7d7e, (q15_t)0x7d7d, (q15_t)0x7d7c, (q15_t)0x7d7a, (q15_t)0x7d79, (q15_t)0x7d78, (q15_t)0x7d77,
+  (q15_t)0x7d75, (q15_t)0x7d74, (q15_t)0x7d73, (q15_t)0x7d72, (q15_t)0x7d70, (q15_t)0x7d6f, (q15_t)0x7d6e, (q15_t)0x7d6d,
+  (q15_t)0x7d6b, (q15_t)0x7d6a, (q15_t)0x7d69, (q15_t)0x7d68, (q15_t)0x7d66, (q15_t)0x7d65, (q15_t)0x7d64, (q15_t)0x7d63,
+  (q15_t)0x7d61, (q15_t)0x7d60, (q15_t)0x7d5f, (q15_t)0x7d5e, (q15_t)0x7d5c, (q15_t)0x7d5b, (q15_t)0x7d5a, (q15_t)0x7d59,
+  (q15_t)0x7d57, (q15_t)0x7d56, (q15_t)0x7d55, (q15_t)0x7d53, (q15_t)0x7d52, (q15_t)0x7d51, (q15_t)0x7d50, (q15_t)0x7d4e,
+  (q15_t)0x7d4d, (q15_t)0x7d4c, (q15_t)0x7d4a, (q15_t)0x7d49, (q15_t)0x7d48, (q15_t)0x7d47, (q15_t)0x7d45, (q15_t)0x7d44,
+  (q15_t)0x7d43, (q15_t)0x7d41, (q15_t)0x7d40, (q15_t)0x7d3f, (q15_t)0x7d3e, (q15_t)0x7d3c, (q15_t)0x7d3b, (q15_t)0x7d3a,
+  (q15_t)0x7d38, (q15_t)0x7d37, (q15_t)0x7d36, (q15_t)0x7d34, (q15_t)0x7d33, (q15_t)0x7d32, (q15_t)0x7d31, (q15_t)0x7d2f,
+  (q15_t)0x7d2e, (q15_t)0x7d2d, (q15_t)0x7d2b, (q15_t)0x7d2a, (q15_t)0x7d29, (q15_t)0x7d27, (q15_t)0x7d26, (q15_t)0x7d25,
+  (q15_t)0x7d23, (q15_t)0x7d22, (q15_t)0x7d21, (q15_t)0x7d1f, (q15_t)0x7d1e, (q15_t)0x7d1d, (q15_t)0x7d1b, (q15_t)0x7d1a,
+  (q15_t)0x7d19, (q15_t)0x7d17, (q15_t)0x7d16, (q15_t)0x7d15, (q15_t)0x7d13, (q15_t)0x7d12, (q15_t)0x7d11, (q15_t)0x7d0f,
+  (q15_t)0x7d0e, (q15_t)0x7d0d, (q15_t)0x7d0b, (q15_t)0x7d0a, (q15_t)0x7d09, (q15_t)0x7d07, (q15_t)0x7d06, (q15_t)0x7d05,
+  (q15_t)0x7d03, (q15_t)0x7d02, (q15_t)0x7d01, (q15_t)0x7cff, (q15_t)0x7cfe, (q15_t)0x7cfd, (q15_t)0x7cfb, (q15_t)0x7cfa,
+  (q15_t)0x7cf9, (q15_t)0x7cf7, (q15_t)0x7cf6, (q15_t)0x7cf4, (q15_t)0x7cf3, (q15_t)0x7cf2, (q15_t)0x7cf0, (q15_t)0x7cef,
+  (q15_t)0x7cee, (q15_t)0x7cec, (q15_t)0x7ceb, (q15_t)0x7ce9, (q15_t)0x7ce8, (q15_t)0x7ce7, (q15_t)0x7ce5, (q15_t)0x7ce4,
+  (q15_t)0x7ce3, (q15_t)0x7ce1, (q15_t)0x7ce0, (q15_t)0x7cde, (q15_t)0x7cdd, (q15_t)0x7cdc, (q15_t)0x7cda, (q15_t)0x7cd9,
+  (q15_t)0x7cd8, (q15_t)0x7cd6, (q15_t)0x7cd5, (q15_t)0x7cd3, (q15_t)0x7cd2, (q15_t)0x7cd1, (q15_t)0x7ccf, (q15_t)0x7cce,
+  (q15_t)0x7ccc, (q15_t)0x7ccb, (q15_t)0x7cca, (q15_t)0x7cc8, (q15_t)0x7cc7, (q15_t)0x7cc5, (q15_t)0x7cc4, (q15_t)0x7cc3,
+  (q15_t)0x7cc1, (q15_t)0x7cc0, (q15_t)0x7cbe, (q15_t)0x7cbd, (q15_t)0x7cbc, (q15_t)0x7cba, (q15_t)0x7cb9, (q15_t)0x7cb7,
+  (q15_t)0x7cb6, (q15_t)0x7cb5, (q15_t)0x7cb3, (q15_t)0x7cb2, (q15_t)0x7cb0, (q15_t)0x7caf, (q15_t)0x7cad, (q15_t)0x7cac,
+  (q15_t)0x7cab, (q15_t)0x7ca9, (q15_t)0x7ca8, (q15_t)0x7ca6, (q15_t)0x7ca5, (q15_t)0x7ca3, (q15_t)0x7ca2, (q15_t)0x7ca1,
+  (q15_t)0x7c9f, (q15_t)0x7c9e, (q15_t)0x7c9c, (q15_t)0x7c9b, (q15_t)0x7c99, (q15_t)0x7c98, (q15_t)0x7c97, (q15_t)0x7c95,
+  (q15_t)0x7c94, (q15_t)0x7c92, (q15_t)0x7c91, (q15_t)0x7c8f, (q15_t)0x7c8e, (q15_t)0x7c8c, (q15_t)0x7c8b, (q15_t)0x7c8a,
+  (q15_t)0x7c88, (q15_t)0x7c87, (q15_t)0x7c85, (q15_t)0x7c84, (q15_t)0x7c82, (q15_t)0x7c81, (q15_t)0x7c7f, (q15_t)0x7c7e,
+  (q15_t)0x7c7c, (q15_t)0x7c7b, (q15_t)0x7c79, (q15_t)0x7c78, (q15_t)0x7c77, (q15_t)0x7c75, (q15_t)0x7c74, (q15_t)0x7c72,
+  (q15_t)0x7c71, (q15_t)0x7c6f, (q15_t)0x7c6e, (q15_t)0x7c6c, (q15_t)0x7c6b, (q15_t)0x7c69, (q15_t)0x7c68, (q15_t)0x7c66,
+  (q15_t)0x7c65, (q15_t)0x7c63, (q15_t)0x7c62, (q15_t)0x7c60, (q15_t)0x7c5f, (q15_t)0x7c5d, (q15_t)0x7c5c, (q15_t)0x7c5a,
+  (q15_t)0x7c59, (q15_t)0x7c58, (q15_t)0x7c56, (q15_t)0x7c55, (q15_t)0x7c53, (q15_t)0x7c52, (q15_t)0x7c50, (q15_t)0x7c4f,
+  (q15_t)0x7c4d, (q15_t)0x7c4c, (q15_t)0x7c4a, (q15_t)0x7c49, (q15_t)0x7c47, (q15_t)0x7c46, (q15_t)0x7c44, (q15_t)0x7c43,
+  (q15_t)0x7c41, (q15_t)0x7c3f, (q15_t)0x7c3e, (q15_t)0x7c3c, (q15_t)0x7c3b, (q15_t)0x7c39, (q15_t)0x7c38, (q15_t)0x7c36,
+  (q15_t)0x7c35, (q15_t)0x7c33, (q15_t)0x7c32, (q15_t)0x7c30, (q15_t)0x7c2f, (q15_t)0x7c2d, (q15_t)0x7c2c, (q15_t)0x7c2a,
+  (q15_t)0x7c29, (q15_t)0x7c27, (q15_t)0x7c26, (q15_t)0x7c24, (q15_t)0x7c23, (q15_t)0x7c21, (q15_t)0x7c20, (q15_t)0x7c1e,
+  (q15_t)0x7c1c, (q15_t)0x7c1b, (q15_t)0x7c19, (q15_t)0x7c18, (q15_t)0x7c16, (q15_t)0x7c15, (q15_t)0x7c13, (q15_t)0x7c12,
+  (q15_t)0x7c10, (q15_t)0x7c0f, (q15_t)0x7c0d, (q15_t)0x7c0b, (q15_t)0x7c0a, (q15_t)0x7c08, (q15_t)0x7c07, (q15_t)0x7c05,
+  (q15_t)0x7c04, (q15_t)0x7c02, (q15_t)0x7c01, (q15_t)0x7bff, (q15_t)0x7bfd, (q15_t)0x7bfc, (q15_t)0x7bfa, (q15_t)0x7bf9,
+  (q15_t)0x7bf7, (q15_t)0x7bf6, (q15_t)0x7bf4, (q15_t)0x7bf3, (q15_t)0x7bf1, (q15_t)0x7bef, (q15_t)0x7bee, (q15_t)0x7bec,
+  (q15_t)0x7beb, (q15_t)0x7be9, (q15_t)0x7be8, (q15_t)0x7be6, (q15_t)0x7be4, (q15_t)0x7be3, (q15_t)0x7be1, (q15_t)0x7be0,
+  (q15_t)0x7bde, (q15_t)0x7bdc, (q15_t)0x7bdb, (q15_t)0x7bd9, (q15_t)0x7bd8, (q15_t)0x7bd6, (q15_t)0x7bd5, (q15_t)0x7bd3,
+  (q15_t)0x7bd1, (q15_t)0x7bd0, (q15_t)0x7bce, (q15_t)0x7bcd, (q15_t)0x7bcb, (q15_t)0x7bc9, (q15_t)0x7bc8, (q15_t)0x7bc6,
+  (q15_t)0x7bc5, (q15_t)0x7bc3, (q15_t)0x7bc1, (q15_t)0x7bc0, (q15_t)0x7bbe, (q15_t)0x7bbd, (q15_t)0x7bbb, (q15_t)0x7bb9,
+  (q15_t)0x7bb8, (q15_t)0x7bb6, (q15_t)0x7bb5, (q15_t)0x7bb3, (q15_t)0x7bb1, (q15_t)0x7bb0, (q15_t)0x7bae, (q15_t)0x7bac,
+  (q15_t)0x7bab, (q15_t)0x7ba9, (q15_t)0x7ba8, (q15_t)0x7ba6, (q15_t)0x7ba4, (q15_t)0x7ba3, (q15_t)0x7ba1, (q15_t)0x7b9f,
+  (q15_t)0x7b9e, (q15_t)0x7b9c, (q15_t)0x7b9b, (q15_t)0x7b99, (q15_t)0x7b97, (q15_t)0x7b96, (q15_t)0x7b94, (q15_t)0x7b92,
+  (q15_t)0x7b91, (q15_t)0x7b8f, (q15_t)0x7b8d, (q15_t)0x7b8c, (q15_t)0x7b8a, (q15_t)0x7b89, (q15_t)0x7b87, (q15_t)0x7b85,
+  (q15_t)0x7b84, (q15_t)0x7b82, (q15_t)0x7b80, (q15_t)0x7b7f, (q15_t)0x7b7d, (q15_t)0x7b7b, (q15_t)0x7b7a, (q15_t)0x7b78,
+  (q15_t)0x7b76, (q15_t)0x7b75, (q15_t)0x7b73, (q15_t)0x7b71, (q15_t)0x7b70, (q15_t)0x7b6e, (q15_t)0x7b6c, (q15_t)0x7b6b,
+  (q15_t)0x7b69, (q15_t)0x7b67, (q15_t)0x7b66, (q15_t)0x7b64, (q15_t)0x7b62, (q15_t)0x7b61, (q15_t)0x7b5f, (q15_t)0x7b5d,
+  (q15_t)0x7b5c, (q15_t)0x7b5a, (q15_t)0x7b58, (q15_t)0x7b57, (q15_t)0x7b55, (q15_t)0x7b53, (q15_t)0x7b52, (q15_t)0x7b50,
+  (q15_t)0x7b4e, (q15_t)0x7b4d, (q15_t)0x7b4b, (q15_t)0x7b49, (q15_t)0x7b47, (q15_t)0x7b46, (q15_t)0x7b44, (q15_t)0x7b42,
+  (q15_t)0x7b41, (q15_t)0x7b3f, (q15_t)0x7b3d, (q15_t)0x7b3c, (q15_t)0x7b3a, (q15_t)0x7b38, (q15_t)0x7b37, (q15_t)0x7b35,
+  (q15_t)0x7b33, (q15_t)0x7b31, (q15_t)0x7b30, (q15_t)0x7b2e, (q15_t)0x7b2c, (q15_t)0x7b2b, (q15_t)0x7b29, (q15_t)0x7b27,
+  (q15_t)0x7b25, (q15_t)0x7b24, (q15_t)0x7b22, (q15_t)0x7b20, (q15_t)0x7b1f, (q15_t)0x7b1d, (q15_t)0x7b1b, (q15_t)0x7b19,
+  (q15_t)0x7b18, (q15_t)0x7b16, (q15_t)0x7b14, (q15_t)0x7b13, (q15_t)0x7b11, (q15_t)0x7b0f, (q15_t)0x7b0d, (q15_t)0x7b0c,
+  (q15_t)0x7b0a, (q15_t)0x7b08, (q15_t)0x7b06, (q15_t)0x7b05, (q15_t)0x7b03, (q15_t)0x7b01, (q15_t)0x7aff, (q15_t)0x7afe,
+  (q15_t)0x7afc, (q15_t)0x7afa, (q15_t)0x7af8, (q15_t)0x7af7, (q15_t)0x7af5, (q15_t)0x7af3, (q15_t)0x7af2, (q15_t)0x7af0,
+  (q15_t)0x7aee, (q15_t)0x7aec, (q15_t)0x7aeb, (q15_t)0x7ae9, (q15_t)0x7ae7, (q15_t)0x7ae5, (q15_t)0x7ae3, (q15_t)0x7ae2,
+  (q15_t)0x7ae0, (q15_t)0x7ade, (q15_t)0x7adc, (q15_t)0x7adb, (q15_t)0x7ad9, (q15_t)0x7ad7, (q15_t)0x7ad5, (q15_t)0x7ad4,
+  (q15_t)0x7ad2, (q15_t)0x7ad0, (q15_t)0x7ace, (q15_t)0x7acd, (q15_t)0x7acb, (q15_t)0x7ac9, (q15_t)0x7ac7, (q15_t)0x7ac5,
+  (q15_t)0x7ac4, (q15_t)0x7ac2, (q15_t)0x7ac0, (q15_t)0x7abe, (q15_t)0x7abd, (q15_t)0x7abb, (q15_t)0x7ab9, (q15_t)0x7ab7,
+  (q15_t)0x7ab5, (q15_t)0x7ab4, (q15_t)0x7ab2, (q15_t)0x7ab0, (q15_t)0x7aae, (q15_t)0x7aac, (q15_t)0x7aab, (q15_t)0x7aa9,
+  (q15_t)0x7aa7, (q15_t)0x7aa5, (q15_t)0x7aa3, (q15_t)0x7aa2, (q15_t)0x7aa0, (q15_t)0x7a9e, (q15_t)0x7a9c, (q15_t)0x7a9a,
+  (q15_t)0x7a99, (q15_t)0x7a97, (q15_t)0x7a95, (q15_t)0x7a93, (q15_t)0x7a91, (q15_t)0x7a90, (q15_t)0x7a8e, (q15_t)0x7a8c,
+  (q15_t)0x7a8a, (q15_t)0x7a88, (q15_t)0x7a87, (q15_t)0x7a85, (q15_t)0x7a83, (q15_t)0x7a81, (q15_t)0x7a7f, (q15_t)0x7a7d,
+  (q15_t)0x7a7c, (q15_t)0x7a7a, (q15_t)0x7a78, (q15_t)0x7a76, (q15_t)0x7a74, (q15_t)0x7a72, (q15_t)0x7a71, (q15_t)0x7a6f,
+  (q15_t)0x7a6d, (q15_t)0x7a6b, (q15_t)0x7a69, (q15_t)0x7a67, (q15_t)0x7a66, (q15_t)0x7a64, (q15_t)0x7a62, (q15_t)0x7a60,
+  (q15_t)0x7a5e, (q15_t)0x7a5c, (q15_t)0x7a5b, (q15_t)0x7a59, (q15_t)0x7a57, (q15_t)0x7a55, (q15_t)0x7a53, (q15_t)0x7a51,
+  (q15_t)0x7a4f, (q15_t)0x7a4e, (q15_t)0x7a4c, (q15_t)0x7a4a, (q15_t)0x7a48, (q15_t)0x7a46, (q15_t)0x7a44, (q15_t)0x7a42,
+  (q15_t)0x7a41, (q15_t)0x7a3f, (q15_t)0x7a3d, (q15_t)0x7a3b, (q15_t)0x7a39, (q15_t)0x7a37, (q15_t)0x7a35, (q15_t)0x7a34,
+  (q15_t)0x7a32, (q15_t)0x7a30, (q15_t)0x7a2e, (q15_t)0x7a2c, (q15_t)0x7a2a, (q15_t)0x7a28, (q15_t)0x7a26, (q15_t)0x7a25,
+  (q15_t)0x7a23, (q15_t)0x7a21, (q15_t)0x7a1f, (q15_t)0x7a1d, (q15_t)0x7a1b, (q15_t)0x7a19, (q15_t)0x7a17, (q15_t)0x7a16,
+  (q15_t)0x7a14, (q15_t)0x7a12, (q15_t)0x7a10, (q15_t)0x7a0e, (q15_t)0x7a0c, (q15_t)0x7a0a, (q15_t)0x7a08, (q15_t)0x7a06,
+  (q15_t)0x7a04, (q15_t)0x7a03, (q15_t)0x7a01, (q15_t)0x79ff, (q15_t)0x79fd, (q15_t)0x79fb, (q15_t)0x79f9, (q15_t)0x79f7,
+  (q15_t)0x79f5, (q15_t)0x79f3, (q15_t)0x79f1, (q15_t)0x79f0, (q15_t)0x79ee, (q15_t)0x79ec, (q15_t)0x79ea, (q15_t)0x79e8,
+  (q15_t)0x79e6, (q15_t)0x79e4, (q15_t)0x79e2, (q15_t)0x79e0, (q15_t)0x79de, (q15_t)0x79dc, (q15_t)0x79da, (q15_t)0x79d9,
+  (q15_t)0x79d7, (q15_t)0x79d5, (q15_t)0x79d3, (q15_t)0x79d1, (q15_t)0x79cf, (q15_t)0x79cd, (q15_t)0x79cb, (q15_t)0x79c9,
+  (q15_t)0x79c7, (q15_t)0x79c5, (q15_t)0x79c3, (q15_t)0x79c1, (q15_t)0x79bf, (q15_t)0x79bd, (q15_t)0x79bc, (q15_t)0x79ba,
+  (q15_t)0x79b8, (q15_t)0x79b6, (q15_t)0x79b4, (q15_t)0x79b2, (q15_t)0x79b0, (q15_t)0x79ae, (q15_t)0x79ac, (q15_t)0x79aa,
+  (q15_t)0x79a8, (q15_t)0x79a6, (q15_t)0x79a4, (q15_t)0x79a2, (q15_t)0x79a0, (q15_t)0x799e, (q15_t)0x799c, (q15_t)0x799a,
+  (q15_t)0x7998, (q15_t)0x7996, (q15_t)0x7994, (q15_t)0x7992, (q15_t)0x7991, (q15_t)0x798f, (q15_t)0x798d, (q15_t)0x798b,
+  (q15_t)0x7989, (q15_t)0x7987, (q15_t)0x7985, (q15_t)0x7983, (q15_t)0x7981, (q15_t)0x797f, (q15_t)0x797d, (q15_t)0x797b,
+  (q15_t)0x7979, (q15_t)0x7977, (q15_t)0x7975, (q15_t)0x7973, (q15_t)0x7971, (q15_t)0x796f, (q15_t)0x796d, (q15_t)0x796b,
+  (q15_t)0x7969, (q15_t)0x7967, (q15_t)0x7965, (q15_t)0x7963, (q15_t)0x7961, (q15_t)0x795f, (q15_t)0x795d, (q15_t)0x795b,
+  (q15_t)0x7959, (q15_t)0x7957, (q15_t)0x7955, (q15_t)0x7953, (q15_t)0x7951, (q15_t)0x794f, (q15_t)0x794d, (q15_t)0x794b,
+  (q15_t)0x7949, (q15_t)0x7947, (q15_t)0x7945, (q15_t)0x7943, (q15_t)0x7941, (q15_t)0x793f, (q15_t)0x793d, (q15_t)0x793b,
+  (q15_t)0x7939, (q15_t)0x7937, (q15_t)0x7935, (q15_t)0x7933, (q15_t)0x7931, (q15_t)0x792f, (q15_t)0x792d, (q15_t)0x792b,
+  (q15_t)0x7929, (q15_t)0x7927, (q15_t)0x7925, (q15_t)0x7923, (q15_t)0x7921, (q15_t)0x791f, (q15_t)0x791d, (q15_t)0x791a,
+  (q15_t)0x7918, (q15_t)0x7916, (q15_t)0x7914, (q15_t)0x7912, (q15_t)0x7910, (q15_t)0x790e, (q15_t)0x790c, (q15_t)0x790a,
+  (q15_t)0x7908, (q15_t)0x7906, (q15_t)0x7904, (q15_t)0x7902, (q15_t)0x7900, (q15_t)0x78fe, (q15_t)0x78fc, (q15_t)0x78fa,
+  (q15_t)0x78f8, (q15_t)0x78f6, (q15_t)0x78f4, (q15_t)0x78f2, (q15_t)0x78f0, (q15_t)0x78ed, (q15_t)0x78eb, (q15_t)0x78e9,
+  (q15_t)0x78e7, (q15_t)0x78e5, (q15_t)0x78e3, (q15_t)0x78e1, (q15_t)0x78df, (q15_t)0x78dd, (q15_t)0x78db, (q15_t)0x78d9,
+  (q15_t)0x78d7, (q15_t)0x78d5, (q15_t)0x78d3, (q15_t)0x78d1, (q15_t)0x78ce, (q15_t)0x78cc, (q15_t)0x78ca, (q15_t)0x78c8,
+  (q15_t)0x78c6, (q15_t)0x78c4, (q15_t)0x78c2, (q15_t)0x78c0, (q15_t)0x78be, (q15_t)0x78bc, (q15_t)0x78ba, (q15_t)0x78b8,
+  (q15_t)0x78b5, (q15_t)0x78b3, (q15_t)0x78b1, (q15_t)0x78af, (q15_t)0x78ad, (q15_t)0x78ab, (q15_t)0x78a9, (q15_t)0x78a7,
+  (q15_t)0x78a5, (q15_t)0x78a3, (q15_t)0x78a0, (q15_t)0x789e, (q15_t)0x789c, (q15_t)0x789a, (q15_t)0x7898, (q15_t)0x7896,
+  (q15_t)0x7894, (q15_t)0x7892, (q15_t)0x7890, (q15_t)0x788e, (q15_t)0x788b, (q15_t)0x7889, (q15_t)0x7887, (q15_t)0x7885,
+  (q15_t)0x7883, (q15_t)0x7881, (q15_t)0x787f, (q15_t)0x787d, (q15_t)0x787a, (q15_t)0x7878, (q15_t)0x7876, (q15_t)0x7874,
+  (q15_t)0x7872, (q15_t)0x7870, (q15_t)0x786e, (q15_t)0x786c, (q15_t)0x7869, (q15_t)0x7867, (q15_t)0x7865, (q15_t)0x7863,
+  (q15_t)0x7861, (q15_t)0x785f, (q15_t)0x785d, (q15_t)0x785b, (q15_t)0x7858, (q15_t)0x7856, (q15_t)0x7854, (q15_t)0x7852,
+  (q15_t)0x7850, (q15_t)0x784e, (q15_t)0x784c, (q15_t)0x7849, (q15_t)0x7847, (q15_t)0x7845, (q15_t)0x7843, (q15_t)0x7841,
+  (q15_t)0x783f, (q15_t)0x783c, (q15_t)0x783a, (q15_t)0x7838, (q15_t)0x7836, (q15_t)0x7834, (q15_t)0x7832, (q15_t)0x7830,
+  (q15_t)0x782d, (q15_t)0x782b, (q15_t)0x7829, (q15_t)0x7827, (q15_t)0x7825, (q15_t)0x7823, (q15_t)0x7820, (q15_t)0x781e,
+  (q15_t)0x781c, (q15_t)0x781a, (q15_t)0x7818, (q15_t)0x7816, (q15_t)0x7813, (q15_t)0x7811, (q15_t)0x780f, (q15_t)0x780d,
+  (q15_t)0x780b, (q15_t)0x7808, (q15_t)0x7806, (q15_t)0x7804, (q15_t)0x7802, (q15_t)0x7800, (q15_t)0x77fe, (q15_t)0x77fb,
+  (q15_t)0x77f9, (q15_t)0x77f7, (q15_t)0x77f5, (q15_t)0x77f3, (q15_t)0x77f0, (q15_t)0x77ee, (q15_t)0x77ec, (q15_t)0x77ea,
+  (q15_t)0x77e8, (q15_t)0x77e5, (q15_t)0x77e3, (q15_t)0x77e1, (q15_t)0x77df, (q15_t)0x77dd, (q15_t)0x77da, (q15_t)0x77d8,
+  (q15_t)0x77d6, (q15_t)0x77d4, (q15_t)0x77d2, (q15_t)0x77cf, (q15_t)0x77cd, (q15_t)0x77cb, (q15_t)0x77c9, (q15_t)0x77c6,
+  (q15_t)0x77c4, (q15_t)0x77c2, (q15_t)0x77c0, (q15_t)0x77be, (q15_t)0x77bb, (q15_t)0x77b9, (q15_t)0x77b7, (q15_t)0x77b5,
+  (q15_t)0x77b2, (q15_t)0x77b0, (q15_t)0x77ae, (q15_t)0x77ac, (q15_t)0x77aa, (q15_t)0x77a7, (q15_t)0x77a5, (q15_t)0x77a3,
+  (q15_t)0x77a1, (q15_t)0x779e, (q15_t)0x779c, (q15_t)0x779a, (q15_t)0x7798, (q15_t)0x7795, (q15_t)0x7793, (q15_t)0x7791,
+  (q15_t)0x778f, (q15_t)0x778c, (q15_t)0x778a, (q15_t)0x7788, (q15_t)0x7786, (q15_t)0x7783, (q15_t)0x7781, (q15_t)0x777f,
+  (q15_t)0x777d, (q15_t)0x777a, (q15_t)0x7778, (q15_t)0x7776, (q15_t)0x7774, (q15_t)0x7771, (q15_t)0x776f, (q15_t)0x776d,
+  (q15_t)0x776b, (q15_t)0x7768, (q15_t)0x7766, (q15_t)0x7764, (q15_t)0x7762, (q15_t)0x775f, (q15_t)0x775d, (q15_t)0x775b,
+  (q15_t)0x7759, (q15_t)0x7756, (q15_t)0x7754, (q15_t)0x7752, (q15_t)0x774f, (q15_t)0x774d, (q15_t)0x774b, (q15_t)0x7749,
+  (q15_t)0x7746, (q15_t)0x7744, (q15_t)0x7742, (q15_t)0x773f, (q15_t)0x773d, (q15_t)0x773b, (q15_t)0x7739, (q15_t)0x7736,
+  (q15_t)0x7734, (q15_t)0x7732, (q15_t)0x772f, (q15_t)0x772d, (q15_t)0x772b, (q15_t)0x7729, (q15_t)0x7726, (q15_t)0x7724,
+  (q15_t)0x7722, (q15_t)0x771f, (q15_t)0x771d, (q15_t)0x771b, (q15_t)0x7719, (q15_t)0x7716, (q15_t)0x7714, (q15_t)0x7712,
+  (q15_t)0x770f, (q15_t)0x770d, (q15_t)0x770b, (q15_t)0x7708, (q15_t)0x7706, (q15_t)0x7704, (q15_t)0x7701, (q15_t)0x76ff,
+  (q15_t)0x76fd, (q15_t)0x76fa, (q15_t)0x76f8, (q15_t)0x76f6, (q15_t)0x76f4, (q15_t)0x76f1, (q15_t)0x76ef, (q15_t)0x76ed,
+  (q15_t)0x76ea, (q15_t)0x76e8, (q15_t)0x76e6, (q15_t)0x76e3, (q15_t)0x76e1, (q15_t)0x76df, (q15_t)0x76dc, (q15_t)0x76da,
+  (q15_t)0x76d8, (q15_t)0x76d5, (q15_t)0x76d3, (q15_t)0x76d1, (q15_t)0x76ce, (q15_t)0x76cc, (q15_t)0x76ca, (q15_t)0x76c7,
+  (q15_t)0x76c5, (q15_t)0x76c3, (q15_t)0x76c0, (q15_t)0x76be, (q15_t)0x76bc, (q15_t)0x76b9, (q15_t)0x76b7, (q15_t)0x76b4,
+  (q15_t)0x76b2, (q15_t)0x76b0, (q15_t)0x76ad, (q15_t)0x76ab, (q15_t)0x76a9, (q15_t)0x76a6, (q15_t)0x76a4, (q15_t)0x76a2,
+  (q15_t)0x769f, (q15_t)0x769d, (q15_t)0x769b, (q15_t)0x7698, (q15_t)0x7696, (q15_t)0x7693, (q15_t)0x7691, (q15_t)0x768f,
+  (q15_t)0x768c, (q15_t)0x768a, (q15_t)0x7688, (q15_t)0x7685, (q15_t)0x7683, (q15_t)0x7681, (q15_t)0x767e, (q15_t)0x767c,
+  (q15_t)0x7679, (q15_t)0x7677, (q15_t)0x7675, (q15_t)0x7672, (q15_t)0x7670, (q15_t)0x766d, (q15_t)0x766b, (q15_t)0x7669,
+  (q15_t)0x7666, (q15_t)0x7664, (q15_t)0x7662, (q15_t)0x765f, (q15_t)0x765d, (q15_t)0x765a, (q15_t)0x7658, (q15_t)0x7656,
+  (q15_t)0x7653, (q15_t)0x7651, (q15_t)0x764e, (q15_t)0x764c, (q15_t)0x764a, (q15_t)0x7647, (q15_t)0x7645, (q15_t)0x7642,
+  (q15_t)0x7640, (q15_t)0x763e, (q15_t)0x763b, (q15_t)0x7639, (q15_t)0x7636, (q15_t)0x7634, (q15_t)0x7632, (q15_t)0x762f,
+  (q15_t)0x762d, (q15_t)0x762a, (q15_t)0x7628, (q15_t)0x7625, (q15_t)0x7623, (q15_t)0x7621, (q15_t)0x761e, (q15_t)0x761c,
+  (q15_t)0x7619, (q15_t)0x7617, (q15_t)0x7615, (q15_t)0x7612, (q15_t)0x7610, (q15_t)0x760d, (q15_t)0x760b, (q15_t)0x7608,
+  (q15_t)0x7606, (q15_t)0x7604, (q15_t)0x7601, (q15_t)0x75ff, (q15_t)0x75fc, (q15_t)0x75fa, (q15_t)0x75f7, (q15_t)0x75f5,
+  (q15_t)0x75f2, (q15_t)0x75f0, (q15_t)0x75ee, (q15_t)0x75eb, (q15_t)0x75e9, (q15_t)0x75e6, (q15_t)0x75e4, (q15_t)0x75e1,
+  (q15_t)0x75df, (q15_t)0x75dc, (q15_t)0x75da, (q15_t)0x75d8, (q15_t)0x75d5, (q15_t)0x75d3, (q15_t)0x75d0, (q15_t)0x75ce,
+  (q15_t)0x75cb, (q15_t)0x75c9, (q15_t)0x75c6, (q15_t)0x75c4, (q15_t)0x75c1, (q15_t)0x75bf, (q15_t)0x75bc, (q15_t)0x75ba,
+  (q15_t)0x75b8, (q15_t)0x75b5, (q15_t)0x75b3, (q15_t)0x75b0, (q15_t)0x75ae, (q15_t)0x75ab, (q15_t)0x75a9, (q15_t)0x75a6,
+  (q15_t)0x75a4, (q15_t)0x75a1, (q15_t)0x759f, (q15_t)0x759c, (q15_t)0x759a, (q15_t)0x7597, (q15_t)0x7595, (q15_t)0x7592,
+  (q15_t)0x7590, (q15_t)0x758d, (q15_t)0x758b, (q15_t)0x7588, (q15_t)0x7586, (q15_t)0x7584, (q15_t)0x7581, (q15_t)0x757f,
+  (q15_t)0x757c, (q15_t)0x757a, (q15_t)0x7577, (q15_t)0x7575, (q15_t)0x7572, (q15_t)0x7570, (q15_t)0x756d, (q15_t)0x756b,
+  (q15_t)0x7568, (q15_t)0x7566, (q15_t)0x7563, (q15_t)0x7561, (q15_t)0x755e, (q15_t)0x755c, (q15_t)0x7559, (q15_t)0x7556,
+  (q15_t)0x7554, (q15_t)0x7551, (q15_t)0x754f, (q15_t)0x754c, (q15_t)0x754a, (q15_t)0x7547, (q15_t)0x7545, (q15_t)0x7542,
+  (q15_t)0x7540, (q15_t)0x753d, (q15_t)0x753b, (q15_t)0x7538, (q15_t)0x7536, (q15_t)0x7533, (q15_t)0x7531, (q15_t)0x752e,
+  (q15_t)0x752c, (q15_t)0x7529, (q15_t)0x7527, (q15_t)0x7524, (q15_t)0x7522, (q15_t)0x751f, (q15_t)0x751c, (q15_t)0x751a,
+  (q15_t)0x7517, (q15_t)0x7515, (q15_t)0x7512, (q15_t)0x7510, (q15_t)0x750d, (q15_t)0x750b, (q15_t)0x7508, (q15_t)0x7506,
+  (q15_t)0x7503, (q15_t)0x7501, (q15_t)0x74fe, (q15_t)0x74fb, (q15_t)0x74f9, (q15_t)0x74f6, (q15_t)0x74f4, (q15_t)0x74f1,
+  (q15_t)0x74ef, (q15_t)0x74ec, (q15_t)0x74ea, (q15_t)0x74e7, (q15_t)0x74e4, (q15_t)0x74e2, (q15_t)0x74df, (q15_t)0x74dd,
+  (q15_t)0x74da, (q15_t)0x74d8, (q15_t)0x74d5, (q15_t)0x74d2, (q15_t)0x74d0, (q15_t)0x74cd, (q15_t)0x74cb, (q15_t)0x74c8,
+  (q15_t)0x74c6, (q15_t)0x74c3, (q15_t)0x74c0, (q15_t)0x74be, (q15_t)0x74bb, (q15_t)0x74b9, (q15_t)0x74b6, (q15_t)0x74b4,
+  (q15_t)0x74b1, (q15_t)0x74ae, (q15_t)0x74ac, (q15_t)0x74a9, (q15_t)0x74a7, (q15_t)0x74a4, (q15_t)0x74a1, (q15_t)0x749f,
+  (q15_t)0x749c, (q15_t)0x749a, (q15_t)0x7497, (q15_t)0x7495, (q15_t)0x7492, (q15_t)0x748f, (q15_t)0x748d, (q15_t)0x748a,
+  (q15_t)0x7488, (q15_t)0x7485, (q15_t)0x7482, (q15_t)0x7480, (q15_t)0x747d, (q15_t)0x747b, (q15_t)0x7478, (q15_t)0x7475,
+  (q15_t)0x7473, (q15_t)0x7470, (q15_t)0x746d, (q15_t)0x746b, (q15_t)0x7468, (q15_t)0x7466, (q15_t)0x7463, (q15_t)0x7460,
+  (q15_t)0x745e, (q15_t)0x745b, (q15_t)0x7459, (q15_t)0x7456, (q15_t)0x7453, (q15_t)0x7451, (q15_t)0x744e, (q15_t)0x744b,
+  (q15_t)0x7449, (q15_t)0x7446, (q15_t)0x7444, (q15_t)0x7441, (q15_t)0x743e, (q15_t)0x743c, (q15_t)0x7439, (q15_t)0x7436,
+  (q15_t)0x7434, (q15_t)0x7431, (q15_t)0x742f, (q15_t)0x742c, (q15_t)0x7429, (q15_t)0x7427, (q15_t)0x7424, (q15_t)0x7421,
+  (q15_t)0x741f, (q15_t)0x741c, (q15_t)0x7419, (q15_t)0x7417, (q15_t)0x7414, (q15_t)0x7411, (q15_t)0x740f, (q15_t)0x740c,
+  (q15_t)0x740a, (q15_t)0x7407, (q15_t)0x7404, (q15_t)0x7402, (q15_t)0x73ff, (q15_t)0x73fc, (q15_t)0x73fa, (q15_t)0x73f7,
+  (q15_t)0x73f4, (q15_t)0x73f2, (q15_t)0x73ef, (q15_t)0x73ec, (q15_t)0x73ea, (q15_t)0x73e7, (q15_t)0x73e4, (q15_t)0x73e2,
+  (q15_t)0x73df, (q15_t)0x73dc, (q15_t)0x73da, (q15_t)0x73d7, (q15_t)0x73d4, (q15_t)0x73d2, (q15_t)0x73cf, (q15_t)0x73cc,
+  (q15_t)0x73ca, (q15_t)0x73c7, (q15_t)0x73c4, (q15_t)0x73c1, (q15_t)0x73bf, (q15_t)0x73bc, (q15_t)0x73b9, (q15_t)0x73b7,
+  (q15_t)0x73b4, (q15_t)0x73b1, (q15_t)0x73af, (q15_t)0x73ac, (q15_t)0x73a9, (q15_t)0x73a7, (q15_t)0x73a4, (q15_t)0x73a1,
+  (q15_t)0x739f, (q15_t)0x739c, (q15_t)0x7399, (q15_t)0x7396, (q15_t)0x7394, (q15_t)0x7391, (q15_t)0x738e, (q15_t)0x738c,
+  (q15_t)0x7389, (q15_t)0x7386, (q15_t)0x7384, (q15_t)0x7381, (q15_t)0x737e, (q15_t)0x737b, (q15_t)0x7379, (q15_t)0x7376,
+  (q15_t)0x7373, (q15_t)0x7371, (q15_t)0x736e, (q15_t)0x736b, (q15_t)0x7368, (q15_t)0x7366, (q15_t)0x7363, (q15_t)0x7360,
+  (q15_t)0x735e, (q15_t)0x735b, (q15_t)0x7358, (q15_t)0x7355, (q15_t)0x7353, (q15_t)0x7350, (q15_t)0x734d, (q15_t)0x734a,
+  (q15_t)0x7348, (q15_t)0x7345, (q15_t)0x7342, (q15_t)0x7340, (q15_t)0x733d, (q15_t)0x733a, (q15_t)0x7337, (q15_t)0x7335,
+  (q15_t)0x7332, (q15_t)0x732f, (q15_t)0x732c, (q15_t)0x732a, (q15_t)0x7327, (q15_t)0x7324, (q15_t)0x7321, (q15_t)0x731f,
+  (q15_t)0x731c, (q15_t)0x7319, (q15_t)0x7316, (q15_t)0x7314, (q15_t)0x7311, (q15_t)0x730e, (q15_t)0x730b, (q15_t)0x7309,
+  (q15_t)0x7306, (q15_t)0x7303, (q15_t)0x7300, (q15_t)0x72fe, (q15_t)0x72fb, (q15_t)0x72f8, (q15_t)0x72f5, (q15_t)0x72f3,
+  (q15_t)0x72f0, (q15_t)0x72ed, (q15_t)0x72ea, (q15_t)0x72e8, (q15_t)0x72e5, (q15_t)0x72e2, (q15_t)0x72df, (q15_t)0x72dc,
+  (q15_t)0x72da, (q15_t)0x72d7, (q15_t)0x72d4, (q15_t)0x72d1, (q15_t)0x72cf, (q15_t)0x72cc, (q15_t)0x72c9, (q15_t)0x72c6,
+  (q15_t)0x72c3, (q15_t)0x72c1, (q15_t)0x72be, (q15_t)0x72bb, (q15_t)0x72b8, (q15_t)0x72b5, (q15_t)0x72b3, (q15_t)0x72b0,
+  (q15_t)0x72ad, (q15_t)0x72aa, (q15_t)0x72a8, (q15_t)0x72a5, (q15_t)0x72a2, (q15_t)0x729f, (q15_t)0x729c, (q15_t)0x729a,
+  (q15_t)0x7297, (q15_t)0x7294, (q15_t)0x7291, (q15_t)0x728e, (q15_t)0x728c, (q15_t)0x7289, (q15_t)0x7286, (q15_t)0x7283,
+  (q15_t)0x7280, (q15_t)0x727e, (q15_t)0x727b, (q15_t)0x7278, (q15_t)0x7275, (q15_t)0x7272, (q15_t)0x726f, (q15_t)0x726d,
+  (q15_t)0x726a, (q15_t)0x7267, (q15_t)0x7264, (q15_t)0x7261, (q15_t)0x725f, (q15_t)0x725c, (q15_t)0x7259, (q15_t)0x7256,
+  (q15_t)0x7253, (q15_t)0x7250, (q15_t)0x724e, (q15_t)0x724b, (q15_t)0x7248, (q15_t)0x7245, (q15_t)0x7242, (q15_t)0x723f,
+  (q15_t)0x723d, (q15_t)0x723a, (q15_t)0x7237, (q15_t)0x7234, (q15_t)0x7231, (q15_t)0x722e, (q15_t)0x722c, (q15_t)0x7229,
+  (q15_t)0x7226, (q15_t)0x7223, (q15_t)0x7220, (q15_t)0x721d, (q15_t)0x721b, (q15_t)0x7218, (q15_t)0x7215, (q15_t)0x7212,
+  (q15_t)0x720f, (q15_t)0x720c, (q15_t)0x7209, (q15_t)0x7207, (q15_t)0x7204, (q15_t)0x7201, (q15_t)0x71fe, (q15_t)0x71fb,
+  (q15_t)0x71f8, (q15_t)0x71f5, (q15_t)0x71f3, (q15_t)0x71f0, (q15_t)0x71ed, (q15_t)0x71ea, (q15_t)0x71e7, (q15_t)0x71e4,
+  (q15_t)0x71e1, (q15_t)0x71df, (q15_t)0x71dc, (q15_t)0x71d9, (q15_t)0x71d6, (q15_t)0x71d3, (q15_t)0x71d0, (q15_t)0x71cd,
+  (q15_t)0x71ca, (q15_t)0x71c8, (q15_t)0x71c5, (q15_t)0x71c2, (q15_t)0x71bf, (q15_t)0x71bc, (q15_t)0x71b9, (q15_t)0x71b6,
+  (q15_t)0x71b3, (q15_t)0x71b0, (q15_t)0x71ae, (q15_t)0x71ab, (q15_t)0x71a8, (q15_t)0x71a5, (q15_t)0x71a2, (q15_t)0x719f,
+  (q15_t)0x719c, (q15_t)0x7199, (q15_t)0x7196, (q15_t)0x7194, (q15_t)0x7191, (q15_t)0x718e, (q15_t)0x718b, (q15_t)0x7188,
+  (q15_t)0x7185, (q15_t)0x7182, (q15_t)0x717f, (q15_t)0x717c, (q15_t)0x7179, (q15_t)0x7177, (q15_t)0x7174, (q15_t)0x7171,
+  (q15_t)0x716e, (q15_t)0x716b, (q15_t)0x7168, (q15_t)0x7165, (q15_t)0x7162, (q15_t)0x715f, (q15_t)0x715c, (q15_t)0x7159,
+  (q15_t)0x7156, (q15_t)0x7154, (q15_t)0x7151, (q15_t)0x714e, (q15_t)0x714b, (q15_t)0x7148, (q15_t)0x7145, (q15_t)0x7142,
+  (q15_t)0x713f, (q15_t)0x713c, (q15_t)0x7139, (q15_t)0x7136, (q15_t)0x7133, (q15_t)0x7130, (q15_t)0x712d, (q15_t)0x712b,
+  (q15_t)0x7128, (q15_t)0x7125, (q15_t)0x7122, (q15_t)0x711f, (q15_t)0x711c, (q15_t)0x7119, (q15_t)0x7116, (q15_t)0x7113,
+  (q15_t)0x7110, (q15_t)0x710d, (q15_t)0x710a, (q15_t)0x7107, (q15_t)0x7104, (q15_t)0x7101, (q15_t)0x70fe, (q15_t)0x70fb,
+  (q15_t)0x70f8, (q15_t)0x70f6, (q15_t)0x70f3, (q15_t)0x70f0, (q15_t)0x70ed, (q15_t)0x70ea, (q15_t)0x70e7, (q15_t)0x70e4,
+  (q15_t)0x70e1, (q15_t)0x70de, (q15_t)0x70db, (q15_t)0x70d8, (q15_t)0x70d5, (q15_t)0x70d2, (q15_t)0x70cf, (q15_t)0x70cc,
+  (q15_t)0x70c9, (q15_t)0x70c6, (q15_t)0x70c3, (q15_t)0x70c0, (q15_t)0x70bd, (q15_t)0x70ba, (q15_t)0x70b7, (q15_t)0x70b4,
+  (q15_t)0x70b1, (q15_t)0x70ae, (q15_t)0x70ab, (q15_t)0x70a8, (q15_t)0x70a5, (q15_t)0x70a2, (q15_t)0x709f, (q15_t)0x709c,
+  (q15_t)0x7099, (q15_t)0x7096, (q15_t)0x7093, (q15_t)0x7090, (q15_t)0x708d, (q15_t)0x708a, (q15_t)0x7087, (q15_t)0x7084,
+  (q15_t)0x7081, (q15_t)0x707e, (q15_t)0x707b, (q15_t)0x7078, (q15_t)0x7075, (q15_t)0x7072, (q15_t)0x706f, (q15_t)0x706c,
+  (q15_t)0x7069, (q15_t)0x7066, (q15_t)0x7063, (q15_t)0x7060, (q15_t)0x705d, (q15_t)0x705a, (q15_t)0x7057, (q15_t)0x7054,
+  (q15_t)0x7051, (q15_t)0x704e, (q15_t)0x704b, (q15_t)0x7048, (q15_t)0x7045, (q15_t)0x7042, (q15_t)0x703f, (q15_t)0x703c,
+  (q15_t)0x7039, (q15_t)0x7036, (q15_t)0x7033, (q15_t)0x7030, (q15_t)0x702d, (q15_t)0x702a, (q15_t)0x7027, (q15_t)0x7024,
+  (q15_t)0x7021, (q15_t)0x701e, (q15_t)0x701b, (q15_t)0x7018, (q15_t)0x7015, (q15_t)0x7012, (q15_t)0x700f, (q15_t)0x700c,
+  (q15_t)0x7009, (q15_t)0x7006, (q15_t)0x7003, (q15_t)0x7000, (q15_t)0x6ffd, (q15_t)0x6ffa, (q15_t)0x6ff7, (q15_t)0x6ff3,
+  (q15_t)0x6ff0, (q15_t)0x6fed, (q15_t)0x6fea, (q15_t)0x6fe7, (q15_t)0x6fe4, (q15_t)0x6fe1, (q15_t)0x6fde, (q15_t)0x6fdb,
+  (q15_t)0x6fd8, (q15_t)0x6fd5, (q15_t)0x6fd2, (q15_t)0x6fcf, (q15_t)0x6fcc, (q15_t)0x6fc9, (q15_t)0x6fc6, (q15_t)0x6fc3,
+  (q15_t)0x6fc0, (q15_t)0x6fbc, (q15_t)0x6fb9, (q15_t)0x6fb6, (q15_t)0x6fb3, (q15_t)0x6fb0, (q15_t)0x6fad, (q15_t)0x6faa,
+  (q15_t)0x6fa7, (q15_t)0x6fa4, (q15_t)0x6fa1, (q15_t)0x6f9e, (q15_t)0x6f9b, (q15_t)0x6f98, (q15_t)0x6f95, (q15_t)0x6f91,
+  (q15_t)0x6f8e, (q15_t)0x6f8b, (q15_t)0x6f88, (q15_t)0x6f85, (q15_t)0x6f82, (q15_t)0x6f7f, (q15_t)0x6f7c, (q15_t)0x6f79,
+  (q15_t)0x6f76, (q15_t)0x6f73, (q15_t)0x6f70, (q15_t)0x6f6c, (q15_t)0x6f69, (q15_t)0x6f66, (q15_t)0x6f63, (q15_t)0x6f60,
+  (q15_t)0x6f5d, (q15_t)0x6f5a, (q15_t)0x6f57, (q15_t)0x6f54, (q15_t)0x6f51, (q15_t)0x6f4d, (q15_t)0x6f4a, (q15_t)0x6f47,
+  (q15_t)0x6f44, (q15_t)0x6f41, (q15_t)0x6f3e, (q15_t)0x6f3b, (q15_t)0x6f38, (q15_t)0x6f35, (q15_t)0x6f31, (q15_t)0x6f2e,
+  (q15_t)0x6f2b, (q15_t)0x6f28, (q15_t)0x6f25, (q15_t)0x6f22, (q15_t)0x6f1f, (q15_t)0x6f1c, (q15_t)0x6f19, (q15_t)0x6f15,
+  (q15_t)0x6f12, (q15_t)0x6f0f, (q15_t)0x6f0c, (q15_t)0x6f09, (q15_t)0x6f06, (q15_t)0x6f03, (q15_t)0x6f00, (q15_t)0x6efc,
+  (q15_t)0x6ef9, (q15_t)0x6ef6, (q15_t)0x6ef3, (q15_t)0x6ef0, (q15_t)0x6eed, (q15_t)0x6eea, (q15_t)0x6ee7, (q15_t)0x6ee3,
+  (q15_t)0x6ee0, (q15_t)0x6edd, (q15_t)0x6eda, (q15_t)0x6ed7, (q15_t)0x6ed4, (q15_t)0x6ed1, (q15_t)0x6ecd, (q15_t)0x6eca,
+  (q15_t)0x6ec7, (q15_t)0x6ec4, (q15_t)0x6ec1, (q15_t)0x6ebe, (q15_t)0x6eba, (q15_t)0x6eb7, (q15_t)0x6eb4, (q15_t)0x6eb1,
+  (q15_t)0x6eae, (q15_t)0x6eab, (q15_t)0x6ea8, (q15_t)0x6ea4, (q15_t)0x6ea1, (q15_t)0x6e9e, (q15_t)0x6e9b, (q15_t)0x6e98,
+  (q15_t)0x6e95, (q15_t)0x6e91, (q15_t)0x6e8e, (q15_t)0x6e8b, (q15_t)0x6e88, (q15_t)0x6e85, (q15_t)0x6e82, (q15_t)0x6e7e,
+  (q15_t)0x6e7b, (q15_t)0x6e78, (q15_t)0x6e75, (q15_t)0x6e72, (q15_t)0x6e6f, (q15_t)0x6e6b, (q15_t)0x6e68, (q15_t)0x6e65,
+  (q15_t)0x6e62, (q15_t)0x6e5f, (q15_t)0x6e5b, (q15_t)0x6e58, (q15_t)0x6e55, (q15_t)0x6e52, (q15_t)0x6e4f, (q15_t)0x6e4c,
+  (q15_t)0x6e48, (q15_t)0x6e45, (q15_t)0x6e42, (q15_t)0x6e3f, (q15_t)0x6e3c, (q15_t)0x6e38, (q15_t)0x6e35, (q15_t)0x6e32,
+  (q15_t)0x6e2f, (q15_t)0x6e2c, (q15_t)0x6e28, (q15_t)0x6e25, (q15_t)0x6e22, (q15_t)0x6e1f, (q15_t)0x6e1c, (q15_t)0x6e18,
+  (q15_t)0x6e15, (q15_t)0x6e12, (q15_t)0x6e0f, (q15_t)0x6e0c, (q15_t)0x6e08, (q15_t)0x6e05, (q15_t)0x6e02, (q15_t)0x6dff,
+  (q15_t)0x6dfb, (q15_t)0x6df8, (q15_t)0x6df5, (q15_t)0x6df2, (q15_t)0x6def, (q15_t)0x6deb, (q15_t)0x6de8, (q15_t)0x6de5,
+  (q15_t)0x6de2, (q15_t)0x6ddf, (q15_t)0x6ddb, (q15_t)0x6dd8, (q15_t)0x6dd5, (q15_t)0x6dd2, (q15_t)0x6dce, (q15_t)0x6dcb,
+  (q15_t)0x6dc8, (q15_t)0x6dc5, (q15_t)0x6dc1, (q15_t)0x6dbe, (q15_t)0x6dbb, (q15_t)0x6db8, (q15_t)0x6db5, (q15_t)0x6db1,
+  (q15_t)0x6dae, (q15_t)0x6dab, (q15_t)0x6da8, (q15_t)0x6da4, (q15_t)0x6da1, (q15_t)0x6d9e, (q15_t)0x6d9b, (q15_t)0x6d97,
+  (q15_t)0x6d94, (q15_t)0x6d91, (q15_t)0x6d8e, (q15_t)0x6d8a, (q15_t)0x6d87, (q15_t)0x6d84, (q15_t)0x6d81, (q15_t)0x6d7d,
+  (q15_t)0x6d7a, (q15_t)0x6d77, (q15_t)0x6d74, (q15_t)0x6d70, (q15_t)0x6d6d, (q15_t)0x6d6a, (q15_t)0x6d67, (q15_t)0x6d63,
+  (q15_t)0x6d60, (q15_t)0x6d5d, (q15_t)0x6d59, (q15_t)0x6d56, (q15_t)0x6d53, (q15_t)0x6d50, (q15_t)0x6d4c, (q15_t)0x6d49,
+  (q15_t)0x6d46, (q15_t)0x6d43, (q15_t)0x6d3f, (q15_t)0x6d3c, (q15_t)0x6d39, (q15_t)0x6d36, (q15_t)0x6d32, (q15_t)0x6d2f,
+  (q15_t)0x6d2c, (q15_t)0x6d28, (q15_t)0x6d25, (q15_t)0x6d22, (q15_t)0x6d1f, (q15_t)0x6d1b, (q15_t)0x6d18, (q15_t)0x6d15,
+  (q15_t)0x6d11, (q15_t)0x6d0e, (q15_t)0x6d0b, (q15_t)0x6d08, (q15_t)0x6d04, (q15_t)0x6d01, (q15_t)0x6cfe, (q15_t)0x6cfa,
+  (q15_t)0x6cf7, (q15_t)0x6cf4, (q15_t)0x6cf0, (q15_t)0x6ced, (q15_t)0x6cea, (q15_t)0x6ce7, (q15_t)0x6ce3, (q15_t)0x6ce0,
+  (q15_t)0x6cdd, (q15_t)0x6cd9, (q15_t)0x6cd6, (q15_t)0x6cd3, (q15_t)0x6ccf, (q15_t)0x6ccc, (q15_t)0x6cc9, (q15_t)0x6cc5,
+  (q15_t)0x6cc2, (q15_t)0x6cbf, (q15_t)0x6cbc, (q15_t)0x6cb8, (q15_t)0x6cb5, (q15_t)0x6cb2, (q15_t)0x6cae, (q15_t)0x6cab,
+  (q15_t)0x6ca8, (q15_t)0x6ca4, (q15_t)0x6ca1, (q15_t)0x6c9e, (q15_t)0x6c9a, (q15_t)0x6c97, (q15_t)0x6c94, (q15_t)0x6c90,
+  (q15_t)0x6c8d, (q15_t)0x6c8a, (q15_t)0x6c86, (q15_t)0x6c83, (q15_t)0x6c80, (q15_t)0x6c7c, (q15_t)0x6c79, (q15_t)0x6c76,
+  (q15_t)0x6c72, (q15_t)0x6c6f, (q15_t)0x6c6c, (q15_t)0x6c68, (q15_t)0x6c65, (q15_t)0x6c62, (q15_t)0x6c5e, (q15_t)0x6c5b,
+  (q15_t)0x6c58, (q15_t)0x6c54, (q15_t)0x6c51, (q15_t)0x6c4e, (q15_t)0x6c4a, (q15_t)0x6c47, (q15_t)0x6c44, (q15_t)0x6c40,
+  (q15_t)0x6c3d, (q15_t)0x6c39, (q15_t)0x6c36, (q15_t)0x6c33, (q15_t)0x6c2f, (q15_t)0x6c2c, (q15_t)0x6c29, (q15_t)0x6c25,
+  (q15_t)0x6c22, (q15_t)0x6c1f, (q15_t)0x6c1b, (q15_t)0x6c18, (q15_t)0x6c15, (q15_t)0x6c11, (q15_t)0x6c0e, (q15_t)0x6c0a,
+  (q15_t)0x6c07, (q15_t)0x6c04, (q15_t)0x6c00, (q15_t)0x6bfd, (q15_t)0x6bfa, (q15_t)0x6bf6, (q15_t)0x6bf3, (q15_t)0x6bef,
+  (q15_t)0x6bec, (q15_t)0x6be9, (q15_t)0x6be5, (q15_t)0x6be2, (q15_t)0x6bdf, (q15_t)0x6bdb, (q15_t)0x6bd8, (q15_t)0x6bd4,
+  (q15_t)0x6bd1, (q15_t)0x6bce, (q15_t)0x6bca, (q15_t)0x6bc7, (q15_t)0x6bc3, (q15_t)0x6bc0, (q15_t)0x6bbd, (q15_t)0x6bb9,
+  (q15_t)0x6bb6, (q15_t)0x6bb2, (q15_t)0x6baf, (q15_t)0x6bac, (q15_t)0x6ba8, (q15_t)0x6ba5, (q15_t)0x6ba1, (q15_t)0x6b9e,
+  (q15_t)0x6b9b, (q15_t)0x6b97, (q15_t)0x6b94, (q15_t)0x6b90, (q15_t)0x6b8d, (q15_t)0x6b8a, (q15_t)0x6b86, (q15_t)0x6b83,
+  (q15_t)0x6b7f, (q15_t)0x6b7c, (q15_t)0x6b79, (q15_t)0x6b75, (q15_t)0x6b72, (q15_t)0x6b6e, (q15_t)0x6b6b, (q15_t)0x6b68,
+  (q15_t)0x6b64, (q15_t)0x6b61, (q15_t)0x6b5d, (q15_t)0x6b5a, (q15_t)0x6b56, (q15_t)0x6b53, (q15_t)0x6b50, (q15_t)0x6b4c,
+  (q15_t)0x6b49, (q15_t)0x6b45, (q15_t)0x6b42, (q15_t)0x6b3e, (q15_t)0x6b3b, (q15_t)0x6b38, (q15_t)0x6b34, (q15_t)0x6b31,
+  (q15_t)0x6b2d, (q15_t)0x6b2a, (q15_t)0x6b26, (q15_t)0x6b23, (q15_t)0x6b20, (q15_t)0x6b1c, (q15_t)0x6b19, (q15_t)0x6b15,
+  (q15_t)0x6b12, (q15_t)0x6b0e, (q15_t)0x6b0b, (q15_t)0x6b07, (q15_t)0x6b04, (q15_t)0x6b01, (q15_t)0x6afd, (q15_t)0x6afa,
+  (q15_t)0x6af6, (q15_t)0x6af3, (q15_t)0x6aef, (q15_t)0x6aec, (q15_t)0x6ae8, (q15_t)0x6ae5, (q15_t)0x6ae1, (q15_t)0x6ade,
+  (q15_t)0x6adb, (q15_t)0x6ad7, (q15_t)0x6ad4, (q15_t)0x6ad0, (q15_t)0x6acd, (q15_t)0x6ac9, (q15_t)0x6ac6, (q15_t)0x6ac2,
+  (q15_t)0x6abf, (q15_t)0x6abb, (q15_t)0x6ab8, (q15_t)0x6ab4, (q15_t)0x6ab1, (q15_t)0x6aae, (q15_t)0x6aaa, (q15_t)0x6aa7,
+  (q15_t)0x6aa3, (q15_t)0x6aa0, (q15_t)0x6a9c, (q15_t)0x6a99, (q15_t)0x6a95, (q15_t)0x6a92, (q15_t)0x6a8e, (q15_t)0x6a8b,
+  (q15_t)0x6a87, (q15_t)0x6a84, (q15_t)0x6a80, (q15_t)0x6a7d, (q15_t)0x6a79, (q15_t)0x6a76, (q15_t)0x6a72, (q15_t)0x6a6f,
+  (q15_t)0x6a6b, (q15_t)0x6a68, (q15_t)0x6a64, (q15_t)0x6a61, (q15_t)0x6a5d, (q15_t)0x6a5a, (q15_t)0x6a56, (q15_t)0x6a53,
+  (q15_t)0x6a4f, (q15_t)0x6a4c, (q15_t)0x6a48, (q15_t)0x6a45, (q15_t)0x6a41, (q15_t)0x6a3e, (q15_t)0x6a3a, (q15_t)0x6a37,
+  (q15_t)0x6a33, (q15_t)0x6a30, (q15_t)0x6a2c, (q15_t)0x6a29, (q15_t)0x6a25, (q15_t)0x6a22, (q15_t)0x6a1e, (q15_t)0x6a1b,
+  (q15_t)0x6a17, (q15_t)0x6a14, (q15_t)0x6a10, (q15_t)0x6a0d, (q15_t)0x6a09, (q15_t)0x6a06, (q15_t)0x6a02, (q15_t)0x69ff,
+  (q15_t)0x69fb, (q15_t)0x69f8, (q15_t)0x69f4, (q15_t)0x69f1, (q15_t)0x69ed, (q15_t)0x69e9, (q15_t)0x69e6, (q15_t)0x69e2,
+  (q15_t)0x69df, (q15_t)0x69db, (q15_t)0x69d8, (q15_t)0x69d4, (q15_t)0x69d1, (q15_t)0x69cd, (q15_t)0x69ca, (q15_t)0x69c6,
+  (q15_t)0x69c3, (q15_t)0x69bf, (q15_t)0x69bc, (q15_t)0x69b8, (q15_t)0x69b4, (q15_t)0x69b1, (q15_t)0x69ad, (q15_t)0x69aa,
+  (q15_t)0x69a6, (q15_t)0x69a3, (q15_t)0x699f, (q15_t)0x699c, (q15_t)0x6998, (q15_t)0x6995, (q15_t)0x6991, (q15_t)0x698d,
+  (q15_t)0x698a, (q15_t)0x6986, (q15_t)0x6983, (q15_t)0x697f, (q15_t)0x697c, (q15_t)0x6978, (q15_t)0x6975, (q15_t)0x6971,
+  (q15_t)0x696d, (q15_t)0x696a, (q15_t)0x6966, (q15_t)0x6963, (q15_t)0x695f, (q15_t)0x695c, (q15_t)0x6958, (q15_t)0x6954,
+  (q15_t)0x6951, (q15_t)0x694d, (q15_t)0x694a, (q15_t)0x6946, (q15_t)0x6943, (q15_t)0x693f, (q15_t)0x693b, (q15_t)0x6938,
+  (q15_t)0x6934, (q15_t)0x6931, (q15_t)0x692d, (q15_t)0x692a, (q15_t)0x6926, (q15_t)0x6922, (q15_t)0x691f, (q15_t)0x691b,
+  (q15_t)0x6918, (q15_t)0x6914, (q15_t)0x6910, (q15_t)0x690d, (q15_t)0x6909, (q15_t)0x6906, (q15_t)0x6902, (q15_t)0x68fe,
+  (q15_t)0x68fb, (q15_t)0x68f7, (q15_t)0x68f4, (q15_t)0x68f0, (q15_t)0x68ec, (q15_t)0x68e9, (q15_t)0x68e5, (q15_t)0x68e2,
+  (q15_t)0x68de, (q15_t)0x68da, (q15_t)0x68d7, (q15_t)0x68d3, (q15_t)0x68d0, (q15_t)0x68cc, (q15_t)0x68c8, (q15_t)0x68c5,
+  (q15_t)0x68c1, (q15_t)0x68be, (q15_t)0x68ba, (q15_t)0x68b6, (q15_t)0x68b3, (q15_t)0x68af, (q15_t)0x68ac, (q15_t)0x68a8,
+  (q15_t)0x68a4, (q15_t)0x68a1, (q15_t)0x689d, (q15_t)0x6899, (q15_t)0x6896, (q15_t)0x6892, (q15_t)0x688f, (q15_t)0x688b,
+  (q15_t)0x6887, (q15_t)0x6884, (q15_t)0x6880, (q15_t)0x687c, (q15_t)0x6879, (q15_t)0x6875, (q15_t)0x6872, (q15_t)0x686e,
+  (q15_t)0x686a, (q15_t)0x6867, (q15_t)0x6863, (q15_t)0x685f, (q15_t)0x685c, (q15_t)0x6858, (q15_t)0x6854, (q15_t)0x6851,
+  (q15_t)0x684d, (q15_t)0x684a, (q15_t)0x6846, (q15_t)0x6842, (q15_t)0x683f, (q15_t)0x683b, (q15_t)0x6837, (q15_t)0x6834,
+  (q15_t)0x6830, (q15_t)0x682c, (q15_t)0x6829, (q15_t)0x6825, (q15_t)0x6821, (q15_t)0x681e, (q15_t)0x681a, (q15_t)0x6816,
+  (q15_t)0x6813, (q15_t)0x680f, (q15_t)0x680b, (q15_t)0x6808, (q15_t)0x6804, (q15_t)0x6800, (q15_t)0x67fd, (q15_t)0x67f9,
+  (q15_t)0x67f5, (q15_t)0x67f2, (q15_t)0x67ee, (q15_t)0x67ea, (q15_t)0x67e7, (q15_t)0x67e3, (q15_t)0x67df, (q15_t)0x67dc,
+  (q15_t)0x67d8, (q15_t)0x67d4, (q15_t)0x67d1, (q15_t)0x67cd, (q15_t)0x67c9, (q15_t)0x67c6, (q15_t)0x67c2, (q15_t)0x67be,
+  (q15_t)0x67bb, (q15_t)0x67b7, (q15_t)0x67b3, (q15_t)0x67b0, (q15_t)0x67ac, (q15_t)0x67a8, (q15_t)0x67a5, (q15_t)0x67a1,
+  (q15_t)0x679d, (q15_t)0x679a, (q15_t)0x6796, (q15_t)0x6792, (q15_t)0x678e, (q15_t)0x678b, (q15_t)0x6787, (q15_t)0x6783,
+  (q15_t)0x6780, (q15_t)0x677c, (q15_t)0x6778, (q15_t)0x6775, (q15_t)0x6771, (q15_t)0x676d, (q15_t)0x6769, (q15_t)0x6766,
+  (q15_t)0x6762, (q15_t)0x675e, (q15_t)0x675b, (q15_t)0x6757, (q15_t)0x6753, (q15_t)0x6750, (q15_t)0x674c, (q15_t)0x6748,
+  (q15_t)0x6744, (q15_t)0x6741, (q15_t)0x673d, (q15_t)0x6739, (q15_t)0x6736, (q15_t)0x6732, (q15_t)0x672e, (q15_t)0x672a,
+  (q15_t)0x6727, (q15_t)0x6723, (q15_t)0x671f, (q15_t)0x671c, (q15_t)0x6718, (q15_t)0x6714, (q15_t)0x6710, (q15_t)0x670d,
+  (q15_t)0x6709, (q15_t)0x6705, (q15_t)0x6701, (q15_t)0x66fe, (q15_t)0x66fa, (q15_t)0x66f6, (q15_t)0x66f3, (q15_t)0x66ef,
+  (q15_t)0x66eb, (q15_t)0x66e7, (q15_t)0x66e4, (q15_t)0x66e0, (q15_t)0x66dc, (q15_t)0x66d8, (q15_t)0x66d5, (q15_t)0x66d1,
+  (q15_t)0x66cd, (q15_t)0x66c9, (q15_t)0x66c6, (q15_t)0x66c2, (q15_t)0x66be, (q15_t)0x66ba, (q15_t)0x66b7, (q15_t)0x66b3,
+  (q15_t)0x66af, (q15_t)0x66ab, (q15_t)0x66a8, (q15_t)0x66a4, (q15_t)0x66a0, (q15_t)0x669c, (q15_t)0x6699, (q15_t)0x6695,
+  (q15_t)0x6691, (q15_t)0x668d, (q15_t)0x668a, (q15_t)0x6686, (q15_t)0x6682, (q15_t)0x667e, (q15_t)0x667b, (q15_t)0x6677,
+  (q15_t)0x6673, (q15_t)0x666f, (q15_t)0x666b, (q15_t)0x6668, (q15_t)0x6664, (q15_t)0x6660, (q15_t)0x665c, (q15_t)0x6659,
+  (q15_t)0x6655, (q15_t)0x6651, (q15_t)0x664d, (q15_t)0x664a, (q15_t)0x6646, (q15_t)0x6642, (q15_t)0x663e, (q15_t)0x663a,
+  (q15_t)0x6637, (q15_t)0x6633, (q15_t)0x662f, (q15_t)0x662b, (q15_t)0x6627, (q15_t)0x6624, (q15_t)0x6620, (q15_t)0x661c,
+  (q15_t)0x6618, (q15_t)0x6615, (q15_t)0x6611, (q15_t)0x660d, (q15_t)0x6609, (q15_t)0x6605, (q15_t)0x6602, (q15_t)0x65fe,
+  (q15_t)0x65fa, (q15_t)0x65f6, (q15_t)0x65f2, (q15_t)0x65ef, (q15_t)0x65eb, (q15_t)0x65e7, (q15_t)0x65e3, (q15_t)0x65df,
+  (q15_t)0x65dc, (q15_t)0x65d8, (q15_t)0x65d4, (q15_t)0x65d0, (q15_t)0x65cc, (q15_t)0x65c9, (q15_t)0x65c5, (q15_t)0x65c1,
+  (q15_t)0x65bd, (q15_t)0x65b9, (q15_t)0x65b5, (q15_t)0x65b2, (q15_t)0x65ae, (q15_t)0x65aa, (q15_t)0x65a6, (q15_t)0x65a2,
+  (q15_t)0x659f, (q15_t)0x659b, (q15_t)0x6597, (q15_t)0x6593, (q15_t)0x658f, (q15_t)0x658b, (q15_t)0x6588, (q15_t)0x6584,
+  (q15_t)0x6580, (q15_t)0x657c, (q15_t)0x6578, (q15_t)0x6574, (q15_t)0x6571, (q15_t)0x656d, (q15_t)0x6569, (q15_t)0x6565,
+  (q15_t)0x6561, (q15_t)0x655d, (q15_t)0x655a, (q15_t)0x6556, (q15_t)0x6552, (q15_t)0x654e, (q15_t)0x654a, (q15_t)0x6546,
+  (q15_t)0x6543, (q15_t)0x653f, (q15_t)0x653b, (q15_t)0x6537, (q15_t)0x6533, (q15_t)0x652f, (q15_t)0x652c, (q15_t)0x6528,
+  (q15_t)0x6524, (q15_t)0x6520, (q15_t)0x651c, (q15_t)0x6518, (q15_t)0x6514, (q15_t)0x6511, (q15_t)0x650d, (q15_t)0x6509,
+  (q15_t)0x6505, (q15_t)0x6501, (q15_t)0x64fd, (q15_t)0x64f9, (q15_t)0x64f6, (q15_t)0x64f2, (q15_t)0x64ee, (q15_t)0x64ea,
+  (q15_t)0x64e6, (q15_t)0x64e2, (q15_t)0x64de, (q15_t)0x64db, (q15_t)0x64d7, (q15_t)0x64d3, (q15_t)0x64cf, (q15_t)0x64cb,
+  (q15_t)0x64c7, (q15_t)0x64c3, (q15_t)0x64bf, (q15_t)0x64bc, (q15_t)0x64b8, (q15_t)0x64b4, (q15_t)0x64b0, (q15_t)0x64ac,
+  (q15_t)0x64a8, (q15_t)0x64a4, (q15_t)0x64a0, (q15_t)0x649c, (q15_t)0x6499, (q15_t)0x6495, (q15_t)0x6491, (q15_t)0x648d,
+  (q15_t)0x6489, (q15_t)0x6485, (q15_t)0x6481, (q15_t)0x647d, (q15_t)0x6479, (q15_t)0x6476, (q15_t)0x6472, (q15_t)0x646e,
+  (q15_t)0x646a, (q15_t)0x6466, (q15_t)0x6462, (q15_t)0x645e, (q15_t)0x645a, (q15_t)0x6456, (q15_t)0x6453, (q15_t)0x644f,
+  (q15_t)0x644b, (q15_t)0x6447, (q15_t)0x6443, (q15_t)0x643f, (q15_t)0x643b, (q15_t)0x6437, (q15_t)0x6433, (q15_t)0x642f,
+  (q15_t)0x642b, (q15_t)0x6428, (q15_t)0x6424, (q15_t)0x6420, (q15_t)0x641c, (q15_t)0x6418, (q15_t)0x6414, (q15_t)0x6410,
+  (q15_t)0x640c, (q15_t)0x6408, (q15_t)0x6404, (q15_t)0x6400, (q15_t)0x63fc, (q15_t)0x63f9, (q15_t)0x63f5, (q15_t)0x63f1,
+  (q15_t)0x63ed, (q15_t)0x63e9, (q15_t)0x63e5, (q15_t)0x63e1, (q15_t)0x63dd, (q15_t)0x63d9, (q15_t)0x63d5, (q15_t)0x63d1,
+  (q15_t)0x63cd, (q15_t)0x63c9, (q15_t)0x63c5, (q15_t)0x63c1, (q15_t)0x63be, (q15_t)0x63ba, (q15_t)0x63b6, (q15_t)0x63b2,
+  (q15_t)0x63ae, (q15_t)0x63aa, (q15_t)0x63a6, (q15_t)0x63a2, (q15_t)0x639e, (q15_t)0x639a, (q15_t)0x6396, (q15_t)0x6392,
+  (q15_t)0x638e, (q15_t)0x638a, (q15_t)0x6386, (q15_t)0x6382, (q15_t)0x637e, (q15_t)0x637a, (q15_t)0x6377, (q15_t)0x6373,
+  (q15_t)0x636f, (q15_t)0x636b, (q15_t)0x6367, (q15_t)0x6363, (q15_t)0x635f, (q15_t)0x635b, (q15_t)0x6357, (q15_t)0x6353,
+  (q15_t)0x634f, (q15_t)0x634b, (q15_t)0x6347, (q15_t)0x6343, (q15_t)0x633f, (q15_t)0x633b, (q15_t)0x6337, (q15_t)0x6333,
+  (q15_t)0x632f, (q15_t)0x632b, (q15_t)0x6327, (q15_t)0x6323, (q15_t)0x631f, (q15_t)0x631b, (q15_t)0x6317, (q15_t)0x6313,
+  (q15_t)0x630f, (q15_t)0x630b, (q15_t)0x6307, (q15_t)0x6303, (q15_t)0x62ff, (q15_t)0x62fb, (q15_t)0x62f7, (q15_t)0x62f3,
+  (q15_t)0x62f0, (q15_t)0x62ec, (q15_t)0x62e8, (q15_t)0x62e4, (q15_t)0x62e0, (q15_t)0x62dc, (q15_t)0x62d8, (q15_t)0x62d4,
+  (q15_t)0x62d0, (q15_t)0x62cc, (q15_t)0x62c8, (q15_t)0x62c4, (q15_t)0x62c0, (q15_t)0x62bc, (q15_t)0x62b8, (q15_t)0x62b4,
+  (q15_t)0x62b0, (q15_t)0x62ac, (q15_t)0x62a8, (q15_t)0x62a4, (q15_t)0x62a0, (q15_t)0x629c, (q15_t)0x6298, (q15_t)0x6294,
+  (q15_t)0x6290, (q15_t)0x628c, (q15_t)0x6288, (q15_t)0x6284, (q15_t)0x6280, (q15_t)0x627c, (q15_t)0x6278, (q15_t)0x6273,
+  (q15_t)0x626f, (q15_t)0x626b, (q15_t)0x6267, (q15_t)0x6263, (q15_t)0x625f, (q15_t)0x625b, (q15_t)0x6257, (q15_t)0x6253,
+  (q15_t)0x624f, (q15_t)0x624b, (q15_t)0x6247, (q15_t)0x6243, (q15_t)0x623f, (q15_t)0x623b, (q15_t)0x6237, (q15_t)0x6233,
+  (q15_t)0x622f, (q15_t)0x622b, (q15_t)0x6227, (q15_t)0x6223, (q15_t)0x621f, (q15_t)0x621b, (q15_t)0x6217, (q15_t)0x6213,
+  (q15_t)0x620f, (q15_t)0x620b, (q15_t)0x6207, (q15_t)0x6203, (q15_t)0x61ff, (q15_t)0x61fb, (q15_t)0x61f7, (q15_t)0x61f3,
+  (q15_t)0x61ee, (q15_t)0x61ea, (q15_t)0x61e6, (q15_t)0x61e2, (q15_t)0x61de, (q15_t)0x61da, (q15_t)0x61d6, (q15_t)0x61d2,
+  (q15_t)0x61ce, (q15_t)0x61ca, (q15_t)0x61c6, (q15_t)0x61c2, (q15_t)0x61be, (q15_t)0x61ba, (q15_t)0x61b6, (q15_t)0x61b2,
+  (q15_t)0x61ae, (q15_t)0x61aa, (q15_t)0x61a6, (q15_t)0x61a1, (q15_t)0x619d, (q15_t)0x6199, (q15_t)0x6195, (q15_t)0x6191,
+  (q15_t)0x618d, (q15_t)0x6189, (q15_t)0x6185, (q15_t)0x6181, (q15_t)0x617d, (q15_t)0x6179, (q15_t)0x6175, (q15_t)0x6171,
+  (q15_t)0x616d, (q15_t)0x6168, (q15_t)0x6164, (q15_t)0x6160, (q15_t)0x615c, (q15_t)0x6158, (q15_t)0x6154, (q15_t)0x6150,
+  (q15_t)0x614c, (q15_t)0x6148, (q15_t)0x6144, (q15_t)0x6140, (q15_t)0x613c, (q15_t)0x6137, (q15_t)0x6133, (q15_t)0x612f,
+  (q15_t)0x612b, (q15_t)0x6127, (q15_t)0x6123, (q15_t)0x611f, (q15_t)0x611b, (q15_t)0x6117, (q15_t)0x6113, (q15_t)0x610f,
+  (q15_t)0x610a, (q15_t)0x6106, (q15_t)0x6102, (q15_t)0x60fe, (q15_t)0x60fa, (q15_t)0x60f6, (q15_t)0x60f2, (q15_t)0x60ee,
+  (q15_t)0x60ea, (q15_t)0x60e6, (q15_t)0x60e1, (q15_t)0x60dd, (q15_t)0x60d9, (q15_t)0x60d5, (q15_t)0x60d1, (q15_t)0x60cd,
+  (q15_t)0x60c9, (q15_t)0x60c5, (q15_t)0x60c1, (q15_t)0x60bc, (q15_t)0x60b8, (q15_t)0x60b4, (q15_t)0x60b0, (q15_t)0x60ac,
+  (q15_t)0x60a8, (q15_t)0x60a4, (q15_t)0x60a0, (q15_t)0x609c, (q15_t)0x6097, (q15_t)0x6093, (q15_t)0x608f, (q15_t)0x608b,
+  (q15_t)0x6087, (q15_t)0x6083, (q15_t)0x607f, (q15_t)0x607b, (q15_t)0x6076, (q15_t)0x6072, (q15_t)0x606e, (q15_t)0x606a,
+  (q15_t)0x6066, (q15_t)0x6062, (q15_t)0x605e, (q15_t)0x6059, (q15_t)0x6055, (q15_t)0x6051, (q15_t)0x604d, (q15_t)0x6049,
+  (q15_t)0x6045, (q15_t)0x6041, (q15_t)0x603c, (q15_t)0x6038, (q15_t)0x6034, (q15_t)0x6030, (q15_t)0x602c, (q15_t)0x6028,
+  (q15_t)0x6024, (q15_t)0x601f, (q15_t)0x601b, (q15_t)0x6017, (q15_t)0x6013, (q15_t)0x600f, (q15_t)0x600b, (q15_t)0x6007,
+  (q15_t)0x6002, (q15_t)0x5ffe, (q15_t)0x5ffa, (q15_t)0x5ff6, (q15_t)0x5ff2, (q15_t)0x5fee, (q15_t)0x5fe9, (q15_t)0x5fe5,
+  (q15_t)0x5fe1, (q15_t)0x5fdd, (q15_t)0x5fd9, (q15_t)0x5fd5, (q15_t)0x5fd0, (q15_t)0x5fcc, (q15_t)0x5fc8, (q15_t)0x5fc4,
+  (q15_t)0x5fc0, (q15_t)0x5fbc, (q15_t)0x5fb7, (q15_t)0x5fb3, (q15_t)0x5faf, (q15_t)0x5fab, (q15_t)0x5fa7, (q15_t)0x5fa3,
+  (q15_t)0x5f9e, (q15_t)0x5f9a, (q15_t)0x5f96, (q15_t)0x5f92, (q15_t)0x5f8e, (q15_t)0x5f8a, (q15_t)0x5f85, (q15_t)0x5f81,
+  (q15_t)0x5f7d, (q15_t)0x5f79, (q15_t)0x5f75, (q15_t)0x5f70, (q15_t)0x5f6c, (q15_t)0x5f68, (q15_t)0x5f64, (q15_t)0x5f60,
+  (q15_t)0x5f5b, (q15_t)0x5f57, (q15_t)0x5f53, (q15_t)0x5f4f, (q15_t)0x5f4b, (q15_t)0x5f46, (q15_t)0x5f42, (q15_t)0x5f3e,
+  (q15_t)0x5f3a, (q15_t)0x5f36, (q15_t)0x5f31, (q15_t)0x5f2d, (q15_t)0x5f29, (q15_t)0x5f25, (q15_t)0x5f21, (q15_t)0x5f1c,
+  (q15_t)0x5f18, (q15_t)0x5f14, (q15_t)0x5f10, (q15_t)0x5f0c, (q15_t)0x5f07, (q15_t)0x5f03, (q15_t)0x5eff, (q15_t)0x5efb,
+  (q15_t)0x5ef7, (q15_t)0x5ef2, (q15_t)0x5eee, (q15_t)0x5eea, (q15_t)0x5ee6, (q15_t)0x5ee2, (q15_t)0x5edd, (q15_t)0x5ed9,
+  (q15_t)0x5ed5, (q15_t)0x5ed1, (q15_t)0x5ecc, (q15_t)0x5ec8, (q15_t)0x5ec4, (q15_t)0x5ec0, (q15_t)0x5ebc, (q15_t)0x5eb7,
+  (q15_t)0x5eb3, (q15_t)0x5eaf, (q15_t)0x5eab, (q15_t)0x5ea6, (q15_t)0x5ea2, (q15_t)0x5e9e, (q15_t)0x5e9a, (q15_t)0x5e95,
+  (q15_t)0x5e91, (q15_t)0x5e8d, (q15_t)0x5e89, (q15_t)0x5e85, (q15_t)0x5e80, (q15_t)0x5e7c, (q15_t)0x5e78, (q15_t)0x5e74,
+  (q15_t)0x5e6f, (q15_t)0x5e6b, (q15_t)0x5e67, (q15_t)0x5e63, (q15_t)0x5e5e, (q15_t)0x5e5a, (q15_t)0x5e56, (q15_t)0x5e52,
+  (q15_t)0x5e4d, (q15_t)0x5e49, (q15_t)0x5e45, (q15_t)0x5e41, (q15_t)0x5e3c, (q15_t)0x5e38, (q15_t)0x5e34, (q15_t)0x5e30,
+  (q15_t)0x5e2b, (q15_t)0x5e27, (q15_t)0x5e23, (q15_t)0x5e1f, (q15_t)0x5e1a, (q15_t)0x5e16, (q15_t)0x5e12, (q15_t)0x5e0e,
+  (q15_t)0x5e09, (q15_t)0x5e05, (q15_t)0x5e01, (q15_t)0x5dfd, (q15_t)0x5df8, (q15_t)0x5df4, (q15_t)0x5df0, (q15_t)0x5deb,
+  (q15_t)0x5de7, (q15_t)0x5de3, (q15_t)0x5ddf, (q15_t)0x5dda, (q15_t)0x5dd6, (q15_t)0x5dd2, (q15_t)0x5dce, (q15_t)0x5dc9,
+  (q15_t)0x5dc5, (q15_t)0x5dc1, (q15_t)0x5dbc, (q15_t)0x5db8, (q15_t)0x5db4, (q15_t)0x5db0, (q15_t)0x5dab, (q15_t)0x5da7,
+  (q15_t)0x5da3, (q15_t)0x5d9e, (q15_t)0x5d9a, (q15_t)0x5d96, (q15_t)0x5d92, (q15_t)0x5d8d, (q15_t)0x5d89, (q15_t)0x5d85,
+  (q15_t)0x5d80, (q15_t)0x5d7c, (q15_t)0x5d78, (q15_t)0x5d74, (q15_t)0x5d6f, (q15_t)0x5d6b, (q15_t)0x5d67, (q15_t)0x5d62,
+  (q15_t)0x5d5e, (q15_t)0x5d5a, (q15_t)0x5d55, (q15_t)0x5d51, (q15_t)0x5d4d, (q15_t)0x5d49, (q15_t)0x5d44, (q15_t)0x5d40,
+  (q15_t)0x5d3c, (q15_t)0x5d37, (q15_t)0x5d33, (q15_t)0x5d2f, (q15_t)0x5d2a, (q15_t)0x5d26, (q15_t)0x5d22, (q15_t)0x5d1e,
+  (q15_t)0x5d19, (q15_t)0x5d15, (q15_t)0x5d11, (q15_t)0x5d0c, (q15_t)0x5d08, (q15_t)0x5d04, (q15_t)0x5cff, (q15_t)0x5cfb,
+  (q15_t)0x5cf7, (q15_t)0x5cf2, (q15_t)0x5cee, (q15_t)0x5cea, (q15_t)0x5ce5, (q15_t)0x5ce1, (q15_t)0x5cdd, (q15_t)0x5cd8,
+  (q15_t)0x5cd4, (q15_t)0x5cd0, (q15_t)0x5ccb, (q15_t)0x5cc7, (q15_t)0x5cc3, (q15_t)0x5cbe, (q15_t)0x5cba, (q15_t)0x5cb6,
+  (q15_t)0x5cb1, (q15_t)0x5cad, (q15_t)0x5ca9, (q15_t)0x5ca4, (q15_t)0x5ca0, (q15_t)0x5c9c, (q15_t)0x5c97, (q15_t)0x5c93,
+  (q15_t)0x5c8f, (q15_t)0x5c8a, (q15_t)0x5c86, (q15_t)0x5c82, (q15_t)0x5c7d, (q15_t)0x5c79, (q15_t)0x5c75, (q15_t)0x5c70,
+  (q15_t)0x5c6c, (q15_t)0x5c68, (q15_t)0x5c63, (q15_t)0x5c5f, (q15_t)0x5c5b, (q15_t)0x5c56, (q15_t)0x5c52, (q15_t)0x5c4e,
+  (q15_t)0x5c49, (q15_t)0x5c45, (q15_t)0x5c41, (q15_t)0x5c3c, (q15_t)0x5c38, (q15_t)0x5c33, (q15_t)0x5c2f, (q15_t)0x5c2b,
+  (q15_t)0x5c26, (q15_t)0x5c22, (q15_t)0x5c1e, (q15_t)0x5c19, (q15_t)0x5c15, (q15_t)0x5c11, (q15_t)0x5c0c, (q15_t)0x5c08,
+  (q15_t)0x5c03, (q15_t)0x5bff, (q15_t)0x5bfb, (q15_t)0x5bf6, (q15_t)0x5bf2, (q15_t)0x5bee, (q15_t)0x5be9, (q15_t)0x5be5,
+  (q15_t)0x5be0, (q15_t)0x5bdc, (q15_t)0x5bd8, (q15_t)0x5bd3, (q15_t)0x5bcf, (q15_t)0x5bcb, (q15_t)0x5bc6, (q15_t)0x5bc2,
+  (q15_t)0x5bbd, (q15_t)0x5bb9, (q15_t)0x5bb5, (q15_t)0x5bb0, (q15_t)0x5bac, (q15_t)0x5ba8, (q15_t)0x5ba3, (q15_t)0x5b9f,
+  (q15_t)0x5b9a, (q15_t)0x5b96, (q15_t)0x5b92, (q15_t)0x5b8d, (q15_t)0x5b89, (q15_t)0x5b84, (q15_t)0x5b80, (q15_t)0x5b7c,
+  (q15_t)0x5b77, (q15_t)0x5b73, (q15_t)0x5b6e, (q15_t)0x5b6a, (q15_t)0x5b66, (q15_t)0x5b61, (q15_t)0x5b5d, (q15_t)0x5b58,
+  (q15_t)0x5b54, (q15_t)0x5b50, (q15_t)0x5b4b, (q15_t)0x5b47, (q15_t)0x5b42, (q15_t)0x5b3e, (q15_t)0x5b3a, (q15_t)0x5b35,
+  (q15_t)0x5b31, (q15_t)0x5b2c, (q15_t)0x5b28, (q15_t)0x5b24, (q15_t)0x5b1f, (q15_t)0x5b1b, (q15_t)0x5b16, (q15_t)0x5b12,
+  (q15_t)0x5b0e, (q15_t)0x5b09, (q15_t)0x5b05, (q15_t)0x5b00, (q15_t)0x5afc, (q15_t)0x5af7, (q15_t)0x5af3, (q15_t)0x5aef,
+  (q15_t)0x5aea, (q15_t)0x5ae6, (q15_t)0x5ae1, (q15_t)0x5add, (q15_t)0x5ad8, (q15_t)0x5ad4, (q15_t)0x5ad0, (q15_t)0x5acb,
+  (q15_t)0x5ac7, (q15_t)0x5ac2, (q15_t)0x5abe, (q15_t)0x5ab9, (q15_t)0x5ab5, (q15_t)0x5ab1, (q15_t)0x5aac, (q15_t)0x5aa8,
+  (q15_t)0x5aa3, (q15_t)0x5a9f, (q15_t)0x5a9a, (q15_t)0x5a96, (q15_t)0x5a92, (q15_t)0x5a8d, (q15_t)0x5a89, (q15_t)0x5a84,
+  (q15_t)0x5a80, (q15_t)0x5a7b, (q15_t)0x5a77, (q15_t)0x5a72, (q15_t)0x5a6e, (q15_t)0x5a6a, (q15_t)0x5a65, (q15_t)0x5a61,
+  (q15_t)0x5a5c, (q15_t)0x5a58, (q15_t)0x5a53, (q15_t)0x5a4f, (q15_t)0x5a4a, (q15_t)0x5a46, (q15_t)0x5a41, (q15_t)0x5a3d,
+  (q15_t)0x5a39, (q15_t)0x5a34, (q15_t)0x5a30, (q15_t)0x5a2b, (q15_t)0x5a27, (q15_t)0x5a22, (q15_t)0x5a1e, (q15_t)0x5a19,
+  (q15_t)0x5a15, (q15_t)0x5a10, (q15_t)0x5a0c, (q15_t)0x5a07, (q15_t)0x5a03, (q15_t)0x59ff, (q15_t)0x59fa, (q15_t)0x59f6,
+  (q15_t)0x59f1, (q15_t)0x59ed, (q15_t)0x59e8, (q15_t)0x59e4, (q15_t)0x59df, (q15_t)0x59db, (q15_t)0x59d6, (q15_t)0x59d2,
+  (q15_t)0x59cd, (q15_t)0x59c9, (q15_t)0x59c4, (q15_t)0x59c0, (q15_t)0x59bb, (q15_t)0x59b7, (q15_t)0x59b2, (q15_t)0x59ae,
+  (q15_t)0x59a9, (q15_t)0x59a5, (q15_t)0x59a1, (q15_t)0x599c, (q15_t)0x5998, (q15_t)0x5993, (q15_t)0x598f, (q15_t)0x598a,
+  (q15_t)0x5986, (q15_t)0x5981, (q15_t)0x597d, (q15_t)0x5978, (q15_t)0x5974, (q15_t)0x596f, (q15_t)0x596b, (q15_t)0x5966,
+  (q15_t)0x5962, (q15_t)0x595d, (q15_t)0x5959, (q15_t)0x5954, (q15_t)0x5950, (q15_t)0x594b, (q15_t)0x5947, (q15_t)0x5942,
+  (q15_t)0x593e, (q15_t)0x5939, (q15_t)0x5935, (q15_t)0x5930, (q15_t)0x592c, (q15_t)0x5927, (q15_t)0x5923, (q15_t)0x591e,
+  (q15_t)0x591a, (q15_t)0x5915, (q15_t)0x5911, (q15_t)0x590c, (q15_t)0x5908, (q15_t)0x5903, (q15_t)0x58fe, (q15_t)0x58fa,
+  (q15_t)0x58f5, (q15_t)0x58f1, (q15_t)0x58ec, (q15_t)0x58e8, (q15_t)0x58e3, (q15_t)0x58df, (q15_t)0x58da, (q15_t)0x58d6,
+  (q15_t)0x58d1, (q15_t)0x58cd, (q15_t)0x58c8, (q15_t)0x58c4, (q15_t)0x58bf, (q15_t)0x58bb, (q15_t)0x58b6, (q15_t)0x58b2,
+  (q15_t)0x58ad, (q15_t)0x58a9, (q15_t)0x58a4, (q15_t)0x589f, (q15_t)0x589b, (q15_t)0x5896, (q15_t)0x5892, (q15_t)0x588d,
+  (q15_t)0x5889, (q15_t)0x5884, (q15_t)0x5880, (q15_t)0x587b, (q15_t)0x5877, (q15_t)0x5872, (q15_t)0x586e, (q15_t)0x5869,
+  (q15_t)0x5864, (q15_t)0x5860, (q15_t)0x585b, (q15_t)0x5857, (q15_t)0x5852, (q15_t)0x584e, (q15_t)0x5849, (q15_t)0x5845,
+  (q15_t)0x5840, (q15_t)0x583c, (q15_t)0x5837, (q15_t)0x5832, (q15_t)0x582e, (q15_t)0x5829, (q15_t)0x5825, (q15_t)0x5820,
+  (q15_t)0x581c, (q15_t)0x5817, (q15_t)0x5813, (q15_t)0x580e, (q15_t)0x5809, (q15_t)0x5805, (q15_t)0x5800, (q15_t)0x57fc,
+  (q15_t)0x57f7, (q15_t)0x57f3, (q15_t)0x57ee, (q15_t)0x57e9, (q15_t)0x57e5, (q15_t)0x57e0, (q15_t)0x57dc, (q15_t)0x57d7,
+  (q15_t)0x57d3, (q15_t)0x57ce, (q15_t)0x57c9, (q15_t)0x57c5, (q15_t)0x57c0, (q15_t)0x57bc, (q15_t)0x57b7, (q15_t)0x57b3,
+  (q15_t)0x57ae, (q15_t)0x57a9, (q15_t)0x57a5, (q15_t)0x57a0, (q15_t)0x579c, (q15_t)0x5797, (q15_t)0x5793, (q15_t)0x578e,
+  (q15_t)0x5789, (q15_t)0x5785, (q15_t)0x5780, (q15_t)0x577c, (q15_t)0x5777, (q15_t)0x5772, (q15_t)0x576e, (q15_t)0x5769,
+  (q15_t)0x5765, (q15_t)0x5760, (q15_t)0x575c, (q15_t)0x5757, (q15_t)0x5752, (q15_t)0x574e, (q15_t)0x5749, (q15_t)0x5745,
+  (q15_t)0x5740, (q15_t)0x573b, (q15_t)0x5737, (q15_t)0x5732, (q15_t)0x572e, (q15_t)0x5729, (q15_t)0x5724, (q15_t)0x5720,
+  (q15_t)0x571b, (q15_t)0x5717, (q15_t)0x5712, (q15_t)0x570d, (q15_t)0x5709, (q15_t)0x5704, (q15_t)0x56ff, (q15_t)0x56fb,
+  (q15_t)0x56f6, (q15_t)0x56f2, (q15_t)0x56ed, (q15_t)0x56e8, (q15_t)0x56e4, (q15_t)0x56df, (q15_t)0x56db, (q15_t)0x56d6,
+  (q15_t)0x56d1, (q15_t)0x56cd, (q15_t)0x56c8, (q15_t)0x56c4, (q15_t)0x56bf, (q15_t)0x56ba, (q15_t)0x56b6, (q15_t)0x56b1,
+  (q15_t)0x56ac, (q15_t)0x56a8, (q15_t)0x56a3, (q15_t)0x569f, (q15_t)0x569a, (q15_t)0x5695, (q15_t)0x5691, (q15_t)0x568c,
+  (q15_t)0x5687, (q15_t)0x5683, (q15_t)0x567e, (q15_t)0x5679, (q15_t)0x5675, (q15_t)0x5670, (q15_t)0x566c, (q15_t)0x5667,
+  (q15_t)0x5662, (q15_t)0x565e, (q15_t)0x5659, (q15_t)0x5654, (q15_t)0x5650, (q15_t)0x564b, (q15_t)0x5646, (q15_t)0x5642,
+  (q15_t)0x563d, (q15_t)0x5639, (q15_t)0x5634, (q15_t)0x562f, (q15_t)0x562b, (q15_t)0x5626, (q15_t)0x5621, (q15_t)0x561d,
+  (q15_t)0x5618, (q15_t)0x5613, (q15_t)0x560f, (q15_t)0x560a, (q15_t)0x5605, (q15_t)0x5601, (q15_t)0x55fc, (q15_t)0x55f7,
+  (q15_t)0x55f3, (q15_t)0x55ee, (q15_t)0x55ea, (q15_t)0x55e5, (q15_t)0x55e0, (q15_t)0x55dc, (q15_t)0x55d7, (q15_t)0x55d2,
+  (q15_t)0x55ce, (q15_t)0x55c9, (q15_t)0x55c4, (q15_t)0x55c0, (q15_t)0x55bb, (q15_t)0x55b6, (q15_t)0x55b2, (q15_t)0x55ad,
+  (q15_t)0x55a8, (q15_t)0x55a4, (q15_t)0x559f, (q15_t)0x559a, (q15_t)0x5596, (q15_t)0x5591, (q15_t)0x558c, (q15_t)0x5588,
+  (q15_t)0x5583, (q15_t)0x557e, (q15_t)0x5579, (q15_t)0x5575, (q15_t)0x5570, (q15_t)0x556b, (q15_t)0x5567, (q15_t)0x5562,
+  (q15_t)0x555d, (q15_t)0x5559, (q15_t)0x5554, (q15_t)0x554f, (q15_t)0x554b, (q15_t)0x5546, (q15_t)0x5541, (q15_t)0x553d,
+  (q15_t)0x5538, (q15_t)0x5533, (q15_t)0x552f, (q15_t)0x552a, (q15_t)0x5525, (q15_t)0x5520, (q15_t)0x551c, (q15_t)0x5517,
+  (q15_t)0x5512, (q15_t)0x550e, (q15_t)0x5509, (q15_t)0x5504, (q15_t)0x5500, (q15_t)0x54fb, (q15_t)0x54f6, (q15_t)0x54f2,
+  (q15_t)0x54ed, (q15_t)0x54e8, (q15_t)0x54e3, (q15_t)0x54df, (q15_t)0x54da, (q15_t)0x54d5, (q15_t)0x54d1, (q15_t)0x54cc,
+  (q15_t)0x54c7, (q15_t)0x54c2, (q15_t)0x54be, (q15_t)0x54b9, (q15_t)0x54b4, (q15_t)0x54b0, (q15_t)0x54ab, (q15_t)0x54a6,
+  (q15_t)0x54a2, (q15_t)0x549d, (q15_t)0x5498, (q15_t)0x5493, (q15_t)0x548f, (q15_t)0x548a, (q15_t)0x5485, (q15_t)0x5480,
+  (q15_t)0x547c, (q15_t)0x5477, (q15_t)0x5472, (q15_t)0x546e, (q15_t)0x5469, (q15_t)0x5464, (q15_t)0x545f, (q15_t)0x545b,
+  (q15_t)0x5456, (q15_t)0x5451, (q15_t)0x544d, (q15_t)0x5448, (q15_t)0x5443, (q15_t)0x543e, (q15_t)0x543a, (q15_t)0x5435,
+  (q15_t)0x5430, (q15_t)0x542b, (q15_t)0x5427, (q15_t)0x5422, (q15_t)0x541d, (q15_t)0x5418, (q15_t)0x5414, (q15_t)0x540f,
+  (q15_t)0x540a, (q15_t)0x5406, (q15_t)0x5401, (q15_t)0x53fc, (q15_t)0x53f7, (q15_t)0x53f3, (q15_t)0x53ee, (q15_t)0x53e9,
+  (q15_t)0x53e4, (q15_t)0x53e0, (q15_t)0x53db, (q15_t)0x53d6, (q15_t)0x53d1, (q15_t)0x53cd, (q15_t)0x53c8, (q15_t)0x53c3,
+  (q15_t)0x53be, (q15_t)0x53ba, (q15_t)0x53b5, (q15_t)0x53b0, (q15_t)0x53ab, (q15_t)0x53a7, (q15_t)0x53a2, (q15_t)0x539d,
+  (q15_t)0x5398, (q15_t)0x5394, (q15_t)0x538f, (q15_t)0x538a, (q15_t)0x5385, (q15_t)0x5380, (q15_t)0x537c, (q15_t)0x5377,
+  (q15_t)0x5372, (q15_t)0x536d, (q15_t)0x5369, (q15_t)0x5364, (q15_t)0x535f, (q15_t)0x535a, (q15_t)0x5356, (q15_t)0x5351,
+  (q15_t)0x534c, (q15_t)0x5347, (q15_t)0x5343, (q15_t)0x533e, (q15_t)0x5339, (q15_t)0x5334, (q15_t)0x532f, (q15_t)0x532b,
+  (q15_t)0x5326, (q15_t)0x5321, (q15_t)0x531c, (q15_t)0x5318, (q15_t)0x5313, (q15_t)0x530e, (q15_t)0x5309, (q15_t)0x5304,
+  (q15_t)0x5300, (q15_t)0x52fb, (q15_t)0x52f6, (q15_t)0x52f1, (q15_t)0x52ec, (q15_t)0x52e8, (q15_t)0x52e3, (q15_t)0x52de,
+  (q15_t)0x52d9, (q15_t)0x52d5, (q15_t)0x52d0, (q15_t)0x52cb, (q15_t)0x52c6, (q15_t)0x52c1, (q15_t)0x52bd, (q15_t)0x52b8,
+  (q15_t)0x52b3, (q15_t)0x52ae, (q15_t)0x52a9, (q15_t)0x52a5, (q15_t)0x52a0, (q15_t)0x529b, (q15_t)0x5296, (q15_t)0x5291,
+  (q15_t)0x528d, (q15_t)0x5288, (q15_t)0x5283, (q15_t)0x527e, (q15_t)0x5279, (q15_t)0x5275, (q15_t)0x5270, (q15_t)0x526b,
+  (q15_t)0x5266, (q15_t)0x5261, (q15_t)0x525d, (q15_t)0x5258, (q15_t)0x5253, (q15_t)0x524e, (q15_t)0x5249, (q15_t)0x5244,
+  (q15_t)0x5240, (q15_t)0x523b, (q15_t)0x5236, (q15_t)0x5231, (q15_t)0x522c, (q15_t)0x5228, (q15_t)0x5223, (q15_t)0x521e,
+  (q15_t)0x5219, (q15_t)0x5214, (q15_t)0x520f, (q15_t)0x520b, (q15_t)0x5206, (q15_t)0x5201, (q15_t)0x51fc, (q15_t)0x51f7,
+  (q15_t)0x51f3, (q15_t)0x51ee, (q15_t)0x51e9, (q15_t)0x51e4, (q15_t)0x51df, (q15_t)0x51da, (q15_t)0x51d6, (q15_t)0x51d1,
+  (q15_t)0x51cc, (q15_t)0x51c7, (q15_t)0x51c2, (q15_t)0x51bd, (q15_t)0x51b9, (q15_t)0x51b4, (q15_t)0x51af, (q15_t)0x51aa,
+  (q15_t)0x51a5, (q15_t)0x51a0, (q15_t)0x519c, (q15_t)0x5197, (q15_t)0x5192, (q15_t)0x518d, (q15_t)0x5188, (q15_t)0x5183,
+  (q15_t)0x517e, (q15_t)0x517a, (q15_t)0x5175, (q15_t)0x5170, (q15_t)0x516b, (q15_t)0x5166, (q15_t)0x5161, (q15_t)0x515d,
+  (q15_t)0x5158, (q15_t)0x5153, (q15_t)0x514e, (q15_t)0x5149, (q15_t)0x5144, (q15_t)0x513f, (q15_t)0x513b, (q15_t)0x5136,
+  (q15_t)0x5131, (q15_t)0x512c, (q15_t)0x5127, (q15_t)0x5122, (q15_t)0x511d, (q15_t)0x5119, (q15_t)0x5114, (q15_t)0x510f,
+  (q15_t)0x510a, (q15_t)0x5105, (q15_t)0x5100, (q15_t)0x50fb, (q15_t)0x50f7, (q15_t)0x50f2, (q15_t)0x50ed, (q15_t)0x50e8,
+  (q15_t)0x50e3, (q15_t)0x50de, (q15_t)0x50d9, (q15_t)0x50d4, (q15_t)0x50d0, (q15_t)0x50cb, (q15_t)0x50c6, (q15_t)0x50c1,
+  (q15_t)0x50bc, (q15_t)0x50b7, (q15_t)0x50b2, (q15_t)0x50ad, (q15_t)0x50a9, (q15_t)0x50a4, (q15_t)0x509f, (q15_t)0x509a,
+  (q15_t)0x5095, (q15_t)0x5090, (q15_t)0x508b, (q15_t)0x5086, (q15_t)0x5082, (q15_t)0x507d, (q15_t)0x5078, (q15_t)0x5073,
+  (q15_t)0x506e, (q15_t)0x5069, (q15_t)0x5064, (q15_t)0x505f, (q15_t)0x505a, (q15_t)0x5056, (q15_t)0x5051, (q15_t)0x504c,
+  (q15_t)0x5047, (q15_t)0x5042, (q15_t)0x503d, (q15_t)0x5038, (q15_t)0x5033, (q15_t)0x502e, (q15_t)0x5029, (q15_t)0x5025,
+  (q15_t)0x5020, (q15_t)0x501b, (q15_t)0x5016, (q15_t)0x5011, (q15_t)0x500c, (q15_t)0x5007, (q15_t)0x5002, (q15_t)0x4ffd,
+  (q15_t)0x4ff8, (q15_t)0x4ff4, (q15_t)0x4fef, (q15_t)0x4fea, (q15_t)0x4fe5, (q15_t)0x4fe0, (q15_t)0x4fdb, (q15_t)0x4fd6,
+  (q15_t)0x4fd1, (q15_t)0x4fcc, (q15_t)0x4fc7, (q15_t)0x4fc2, (q15_t)0x4fbe, (q15_t)0x4fb9, (q15_t)0x4fb4, (q15_t)0x4faf,
+  (q15_t)0x4faa, (q15_t)0x4fa5, (q15_t)0x4fa0, (q15_t)0x4f9b, (q15_t)0x4f96, (q15_t)0x4f91, (q15_t)0x4f8c, (q15_t)0x4f87,
+  (q15_t)0x4f82, (q15_t)0x4f7e, (q15_t)0x4f79, (q15_t)0x4f74, (q15_t)0x4f6f, (q15_t)0x4f6a, (q15_t)0x4f65, (q15_t)0x4f60,
+  (q15_t)0x4f5b, (q15_t)0x4f56, (q15_t)0x4f51, (q15_t)0x4f4c, (q15_t)0x4f47, (q15_t)0x4f42, (q15_t)0x4f3d, (q15_t)0x4f39,
+  (q15_t)0x4f34, (q15_t)0x4f2f, (q15_t)0x4f2a, (q15_t)0x4f25, (q15_t)0x4f20, (q15_t)0x4f1b, (q15_t)0x4f16, (q15_t)0x4f11,
+  (q15_t)0x4f0c, (q15_t)0x4f07, (q15_t)0x4f02, (q15_t)0x4efd, (q15_t)0x4ef8, (q15_t)0x4ef3, (q15_t)0x4eee, (q15_t)0x4ee9,
+  (q15_t)0x4ee5, (q15_t)0x4ee0, (q15_t)0x4edb, (q15_t)0x4ed6, (q15_t)0x4ed1, (q15_t)0x4ecc, (q15_t)0x4ec7, (q15_t)0x4ec2,
+  (q15_t)0x4ebd, (q15_t)0x4eb8, (q15_t)0x4eb3, (q15_t)0x4eae, (q15_t)0x4ea9, (q15_t)0x4ea4, (q15_t)0x4e9f, (q15_t)0x4e9a,
+  (q15_t)0x4e95, (q15_t)0x4e90, (q15_t)0x4e8b, (q15_t)0x4e86, (q15_t)0x4e81, (q15_t)0x4e7c, (q15_t)0x4e78, (q15_t)0x4e73,
+  (q15_t)0x4e6e, (q15_t)0x4e69, (q15_t)0x4e64, (q15_t)0x4e5f, (q15_t)0x4e5a, (q15_t)0x4e55, (q15_t)0x4e50, (q15_t)0x4e4b,
+  (q15_t)0x4e46, (q15_t)0x4e41, (q15_t)0x4e3c, (q15_t)0x4e37, (q15_t)0x4e32, (q15_t)0x4e2d, (q15_t)0x4e28, (q15_t)0x4e23,
+  (q15_t)0x4e1e, (q15_t)0x4e19, (q15_t)0x4e14, (q15_t)0x4e0f, (q15_t)0x4e0a, (q15_t)0x4e05, (q15_t)0x4e00, (q15_t)0x4dfb,
+  (q15_t)0x4df6, (q15_t)0x4df1, (q15_t)0x4dec, (q15_t)0x4de7, (q15_t)0x4de2, (q15_t)0x4ddd, (q15_t)0x4dd8, (q15_t)0x4dd3,
+  (q15_t)0x4dce, (q15_t)0x4dc9, (q15_t)0x4dc4, (q15_t)0x4dbf, (q15_t)0x4dba, (q15_t)0x4db5, (q15_t)0x4db0, (q15_t)0x4dab,
+  (q15_t)0x4da6, (q15_t)0x4da1, (q15_t)0x4d9c, (q15_t)0x4d97, (q15_t)0x4d92, (q15_t)0x4d8d, (q15_t)0x4d88, (q15_t)0x4d83,
+  (q15_t)0x4d7e, (q15_t)0x4d79, (q15_t)0x4d74, (q15_t)0x4d6f, (q15_t)0x4d6a, (q15_t)0x4d65, (q15_t)0x4d60, (q15_t)0x4d5b,
+  (q15_t)0x4d56, (q15_t)0x4d51, (q15_t)0x4d4c, (q15_t)0x4d47, (q15_t)0x4d42, (q15_t)0x4d3d, (q15_t)0x4d38, (q15_t)0x4d33,
+  (q15_t)0x4d2e, (q15_t)0x4d29, (q15_t)0x4d24, (q15_t)0x4d1f, (q15_t)0x4d1a, (q15_t)0x4d15, (q15_t)0x4d10, (q15_t)0x4d0b,
+  (q15_t)0x4d06, (q15_t)0x4d01, (q15_t)0x4cfc, (q15_t)0x4cf7, (q15_t)0x4cf2, (q15_t)0x4ced, (q15_t)0x4ce8, (q15_t)0x4ce3,
+  (q15_t)0x4cde, (q15_t)0x4cd9, (q15_t)0x4cd4, (q15_t)0x4ccf, (q15_t)0x4cca, (q15_t)0x4cc5, (q15_t)0x4cc0, (q15_t)0x4cbb,
+  (q15_t)0x4cb6, (q15_t)0x4cb1, (q15_t)0x4cac, (q15_t)0x4ca7, (q15_t)0x4ca2, (q15_t)0x4c9d, (q15_t)0x4c98, (q15_t)0x4c93,
+  (q15_t)0x4c8e, (q15_t)0x4c88, (q15_t)0x4c83, (q15_t)0x4c7e, (q15_t)0x4c79, (q15_t)0x4c74, (q15_t)0x4c6f, (q15_t)0x4c6a,
+  (q15_t)0x4c65, (q15_t)0x4c60, (q15_t)0x4c5b, (q15_t)0x4c56, (q15_t)0x4c51, (q15_t)0x4c4c, (q15_t)0x4c47, (q15_t)0x4c42,
+  (q15_t)0x4c3d, (q15_t)0x4c38, (q15_t)0x4c33, (q15_t)0x4c2e, (q15_t)0x4c29, (q15_t)0x4c24, (q15_t)0x4c1f, (q15_t)0x4c1a,
+  (q15_t)0x4c14, (q15_t)0x4c0f, (q15_t)0x4c0a, (q15_t)0x4c05, (q15_t)0x4c00, (q15_t)0x4bfb, (q15_t)0x4bf6, (q15_t)0x4bf1,
+  (q15_t)0x4bec, (q15_t)0x4be7, (q15_t)0x4be2, (q15_t)0x4bdd, (q15_t)0x4bd8, (q15_t)0x4bd3, (q15_t)0x4bce, (q15_t)0x4bc9,
+  (q15_t)0x4bc4, (q15_t)0x4bbe, (q15_t)0x4bb9, (q15_t)0x4bb4, (q15_t)0x4baf, (q15_t)0x4baa, (q15_t)0x4ba5, (q15_t)0x4ba0,
+  (q15_t)0x4b9b, (q15_t)0x4b96, (q15_t)0x4b91, (q15_t)0x4b8c, (q15_t)0x4b87, (q15_t)0x4b82, (q15_t)0x4b7d, (q15_t)0x4b77,
+  (q15_t)0x4b72, (q15_t)0x4b6d, (q15_t)0x4b68, (q15_t)0x4b63, (q15_t)0x4b5e, (q15_t)0x4b59, (q15_t)0x4b54, (q15_t)0x4b4f,
+  (q15_t)0x4b4a, (q15_t)0x4b45, (q15_t)0x4b40, (q15_t)0x4b3b, (q15_t)0x4b35, (q15_t)0x4b30, (q15_t)0x4b2b, (q15_t)0x4b26,
+  (q15_t)0x4b21, (q15_t)0x4b1c, (q15_t)0x4b17, (q15_t)0x4b12, (q15_t)0x4b0d, (q15_t)0x4b08, (q15_t)0x4b03, (q15_t)0x4afd,
+  (q15_t)0x4af8, (q15_t)0x4af3, (q15_t)0x4aee, (q15_t)0x4ae9, (q15_t)0x4ae4, (q15_t)0x4adf, (q15_t)0x4ada, (q15_t)0x4ad5,
+  (q15_t)0x4ad0, (q15_t)0x4acb, (q15_t)0x4ac5, (q15_t)0x4ac0, (q15_t)0x4abb, (q15_t)0x4ab6, (q15_t)0x4ab1, (q15_t)0x4aac,
+  (q15_t)0x4aa7, (q15_t)0x4aa2, (q15_t)0x4a9d, (q15_t)0x4a97, (q15_t)0x4a92, (q15_t)0x4a8d, (q15_t)0x4a88, (q15_t)0x4a83,
+  (q15_t)0x4a7e, (q15_t)0x4a79, (q15_t)0x4a74, (q15_t)0x4a6f, (q15_t)0x4a6a, (q15_t)0x4a64, (q15_t)0x4a5f, (q15_t)0x4a5a,
+  (q15_t)0x4a55, (q15_t)0x4a50, (q15_t)0x4a4b, (q15_t)0x4a46, (q15_t)0x4a41, (q15_t)0x4a3b, (q15_t)0x4a36, (q15_t)0x4a31,
+  (q15_t)0x4a2c, (q15_t)0x4a27, (q15_t)0x4a22, (q15_t)0x4a1d, (q15_t)0x4a18, (q15_t)0x4a12, (q15_t)0x4a0d, (q15_t)0x4a08,
+  (q15_t)0x4a03, (q15_t)0x49fe, (q15_t)0x49f9, (q15_t)0x49f4, (q15_t)0x49ef, (q15_t)0x49e9, (q15_t)0x49e4, (q15_t)0x49df,
+  (q15_t)0x49da, (q15_t)0x49d5, (q15_t)0x49d0, (q15_t)0x49cb, (q15_t)0x49c6, (q15_t)0x49c0, (q15_t)0x49bb, (q15_t)0x49b6,
+  (q15_t)0x49b1, (q15_t)0x49ac, (q15_t)0x49a7, (q15_t)0x49a2, (q15_t)0x499c, (q15_t)0x4997, (q15_t)0x4992, (q15_t)0x498d,
+  (q15_t)0x4988, (q15_t)0x4983, (q15_t)0x497e, (q15_t)0x4978, (q15_t)0x4973, (q15_t)0x496e, (q15_t)0x4969, (q15_t)0x4964,
+  (q15_t)0x495f, (q15_t)0x495a, (q15_t)0x4954, (q15_t)0x494f, (q15_t)0x494a, (q15_t)0x4945, (q15_t)0x4940, (q15_t)0x493b,
+  (q15_t)0x4936, (q15_t)0x4930, (q15_t)0x492b, (q15_t)0x4926, (q15_t)0x4921, (q15_t)0x491c, (q15_t)0x4917, (q15_t)0x4911,
+  (q15_t)0x490c, (q15_t)0x4907, (q15_t)0x4902, (q15_t)0x48fd, (q15_t)0x48f8, (q15_t)0x48f2, (q15_t)0x48ed, (q15_t)0x48e8,
+  (q15_t)0x48e3, (q15_t)0x48de, (q15_t)0x48d9, (q15_t)0x48d3, (q15_t)0x48ce, (q15_t)0x48c9, (q15_t)0x48c4, (q15_t)0x48bf,
+  (q15_t)0x48ba, (q15_t)0x48b4, (q15_t)0x48af, (q15_t)0x48aa, (q15_t)0x48a5, (q15_t)0x48a0, (q15_t)0x489b, (q15_t)0x4895,
+  (q15_t)0x4890, (q15_t)0x488b, (q15_t)0x4886, (q15_t)0x4881, (q15_t)0x487c, (q15_t)0x4876, (q15_t)0x4871, (q15_t)0x486c,
+  (q15_t)0x4867, (q15_t)0x4862, (q15_t)0x485c, (q15_t)0x4857, (q15_t)0x4852, (q15_t)0x484d, (q15_t)0x4848, (q15_t)0x4843,
+  (q15_t)0x483d, (q15_t)0x4838, (q15_t)0x4833, (q15_t)0x482e, (q15_t)0x4829, (q15_t)0x4823, (q15_t)0x481e, (q15_t)0x4819,
+  (q15_t)0x4814, (q15_t)0x480f, (q15_t)0x4809, (q15_t)0x4804, (q15_t)0x47ff, (q15_t)0x47fa, (q15_t)0x47f5, (q15_t)0x47ef,
+  (q15_t)0x47ea, (q15_t)0x47e5, (q15_t)0x47e0, (q15_t)0x47db, (q15_t)0x47d5, (q15_t)0x47d0, (q15_t)0x47cb, (q15_t)0x47c6,
+  (q15_t)0x47c1, (q15_t)0x47bb, (q15_t)0x47b6, (q15_t)0x47b1, (q15_t)0x47ac, (q15_t)0x47a7, (q15_t)0x47a1, (q15_t)0x479c,
+  (q15_t)0x4797, (q15_t)0x4792, (q15_t)0x478d, (q15_t)0x4787, (q15_t)0x4782, (q15_t)0x477d, (q15_t)0x4778, (q15_t)0x4773,
+  (q15_t)0x476d, (q15_t)0x4768, (q15_t)0x4763, (q15_t)0x475e, (q15_t)0x4758, (q15_t)0x4753, (q15_t)0x474e, (q15_t)0x4749,
+  (q15_t)0x4744, (q15_t)0x473e, (q15_t)0x4739, (q15_t)0x4734, (q15_t)0x472f, (q15_t)0x4729, (q15_t)0x4724, (q15_t)0x471f,
+  (q15_t)0x471a, (q15_t)0x4715, (q15_t)0x470f, (q15_t)0x470a, (q15_t)0x4705, (q15_t)0x4700, (q15_t)0x46fa, (q15_t)0x46f5,
+  (q15_t)0x46f0, (q15_t)0x46eb, (q15_t)0x46e6, (q15_t)0x46e0, (q15_t)0x46db, (q15_t)0x46d6, (q15_t)0x46d1, (q15_t)0x46cb,
+  (q15_t)0x46c6, (q15_t)0x46c1, (q15_t)0x46bc, (q15_t)0x46b6, (q15_t)0x46b1, (q15_t)0x46ac, (q15_t)0x46a7, (q15_t)0x46a1,
+  (q15_t)0x469c, (q15_t)0x4697, (q15_t)0x4692, (q15_t)0x468d, (q15_t)0x4687, (q15_t)0x4682, (q15_t)0x467d, (q15_t)0x4678,
+  (q15_t)0x4672, (q15_t)0x466d, (q15_t)0x4668, (q15_t)0x4663, (q15_t)0x465d, (q15_t)0x4658, (q15_t)0x4653, (q15_t)0x464e,
+  (q15_t)0x4648, (q15_t)0x4643, (q15_t)0x463e, (q15_t)0x4639, (q15_t)0x4633, (q15_t)0x462e, (q15_t)0x4629, (q15_t)0x4624,
+  (q15_t)0x461e, (q15_t)0x4619, (q15_t)0x4614, (q15_t)0x460e, (q15_t)0x4609, (q15_t)0x4604, (q15_t)0x45ff, (q15_t)0x45f9,
+  (q15_t)0x45f4, (q15_t)0x45ef, (q15_t)0x45ea, (q15_t)0x45e4, (q15_t)0x45df, (q15_t)0x45da, (q15_t)0x45d5, (q15_t)0x45cf,
+  (q15_t)0x45ca, (q15_t)0x45c5, (q15_t)0x45c0, (q15_t)0x45ba, (q15_t)0x45b5, (q15_t)0x45b0, (q15_t)0x45aa, (q15_t)0x45a5,
+  (q15_t)0x45a0, (q15_t)0x459b, (q15_t)0x4595, (q15_t)0x4590, (q15_t)0x458b, (q15_t)0x4586, (q15_t)0x4580, (q15_t)0x457b,
+  (q15_t)0x4576, (q15_t)0x4570, (q15_t)0x456b, (q15_t)0x4566, (q15_t)0x4561, (q15_t)0x455b, (q15_t)0x4556, (q15_t)0x4551,
+  (q15_t)0x454b, (q15_t)0x4546, (q15_t)0x4541, (q15_t)0x453c, (q15_t)0x4536, (q15_t)0x4531, (q15_t)0x452c, (q15_t)0x4526,
+  (q15_t)0x4521, (q15_t)0x451c, (q15_t)0x4517, (q15_t)0x4511, (q15_t)0x450c, (q15_t)0x4507, (q15_t)0x4501, (q15_t)0x44fc,
+  (q15_t)0x44f7, (q15_t)0x44f2, (q15_t)0x44ec, (q15_t)0x44e7, (q15_t)0x44e2, (q15_t)0x44dc, (q15_t)0x44d7, (q15_t)0x44d2,
+  (q15_t)0x44cd, (q15_t)0x44c7, (q15_t)0x44c2, (q15_t)0x44bd, (q15_t)0x44b7, (q15_t)0x44b2, (q15_t)0x44ad, (q15_t)0x44a7,
+  (q15_t)0x44a2, (q15_t)0x449d, (q15_t)0x4497, (q15_t)0x4492, (q15_t)0x448d, (q15_t)0x4488, (q15_t)0x4482, (q15_t)0x447d,
+  (q15_t)0x4478, (q15_t)0x4472, (q15_t)0x446d, (q15_t)0x4468, (q15_t)0x4462, (q15_t)0x445d, (q15_t)0x4458, (q15_t)0x4452,
+  (q15_t)0x444d, (q15_t)0x4448, (q15_t)0x4443, (q15_t)0x443d, (q15_t)0x4438, (q15_t)0x4433, (q15_t)0x442d, (q15_t)0x4428,
+  (q15_t)0x4423, (q15_t)0x441d, (q15_t)0x4418, (q15_t)0x4413, (q15_t)0x440d, (q15_t)0x4408, (q15_t)0x4403, (q15_t)0x43fd,
+  (q15_t)0x43f8, (q15_t)0x43f3, (q15_t)0x43ed, (q15_t)0x43e8, (q15_t)0x43e3, (q15_t)0x43dd, (q15_t)0x43d8, (q15_t)0x43d3,
+  (q15_t)0x43cd, (q15_t)0x43c8, (q15_t)0x43c3, (q15_t)0x43bd, (q15_t)0x43b8, (q15_t)0x43b3, (q15_t)0x43ad, (q15_t)0x43a8,
+  (q15_t)0x43a3, (q15_t)0x439d, (q15_t)0x4398, (q15_t)0x4393, (q15_t)0x438d, (q15_t)0x4388, (q15_t)0x4383, (q15_t)0x437d,
+  (q15_t)0x4378, (q15_t)0x4373, (q15_t)0x436d, (q15_t)0x4368, (q15_t)0x4363, (q15_t)0x435d, (q15_t)0x4358, (q15_t)0x4353,
+  (q15_t)0x434d, (q15_t)0x4348, (q15_t)0x4343, (q15_t)0x433d, (q15_t)0x4338, (q15_t)0x4333, (q15_t)0x432d, (q15_t)0x4328,
+  (q15_t)0x4323, (q15_t)0x431d, (q15_t)0x4318, (q15_t)0x4313, (q15_t)0x430d, (q15_t)0x4308, (q15_t)0x4302, (q15_t)0x42fd,
+  (q15_t)0x42f8, (q15_t)0x42f2, (q15_t)0x42ed, (q15_t)0x42e8, (q15_t)0x42e2, (q15_t)0x42dd, (q15_t)0x42d8, (q15_t)0x42d2,
+  (q15_t)0x42cd, (q15_t)0x42c8, (q15_t)0x42c2, (q15_t)0x42bd, (q15_t)0x42b7, (q15_t)0x42b2, (q15_t)0x42ad, (q15_t)0x42a7,
+  (q15_t)0x42a2, (q15_t)0x429d, (q15_t)0x4297, (q15_t)0x4292, (q15_t)0x428d, (q15_t)0x4287, (q15_t)0x4282, (q15_t)0x427c,
+  (q15_t)0x4277, (q15_t)0x4272, (q15_t)0x426c, (q15_t)0x4267, (q15_t)0x4262, (q15_t)0x425c, (q15_t)0x4257, (q15_t)0x4251,
+  (q15_t)0x424c, (q15_t)0x4247, (q15_t)0x4241, (q15_t)0x423c, (q15_t)0x4237, (q15_t)0x4231, (q15_t)0x422c, (q15_t)0x4226,
+  (q15_t)0x4221, (q15_t)0x421c, (q15_t)0x4216, (q15_t)0x4211, (q15_t)0x420c, (q15_t)0x4206, (q15_t)0x4201, (q15_t)0x41fb,
+  (q15_t)0x41f6, (q15_t)0x41f1, (q15_t)0x41eb, (q15_t)0x41e6, (q15_t)0x41e0, (q15_t)0x41db, (q15_t)0x41d6, (q15_t)0x41d0,
+  (q15_t)0x41cb, (q15_t)0x41c6, (q15_t)0x41c0, (q15_t)0x41bb, (q15_t)0x41b5, (q15_t)0x41b0, (q15_t)0x41ab, (q15_t)0x41a5,
+  (q15_t)0x41a0, (q15_t)0x419a, (q15_t)0x4195, (q15_t)0x4190, (q15_t)0x418a, (q15_t)0x4185, (q15_t)0x417f, (q15_t)0x417a,
+  (q15_t)0x4175, (q15_t)0x416f, (q15_t)0x416a, (q15_t)0x4164, (q15_t)0x415f, (q15_t)0x415a, (q15_t)0x4154, (q15_t)0x414f,
+  (q15_t)0x4149, (q15_t)0x4144, (q15_t)0x413f, (q15_t)0x4139, (q15_t)0x4134, (q15_t)0x412e, (q15_t)0x4129, (q15_t)0x4124,
+  (q15_t)0x411e, (q15_t)0x4119, (q15_t)0x4113, (q15_t)0x410e, (q15_t)0x4108, (q15_t)0x4103, (q15_t)0x40fe, (q15_t)0x40f8,
+  (q15_t)0x40f3, (q15_t)0x40ed, (q15_t)0x40e8, (q15_t)0x40e3, (q15_t)0x40dd, (q15_t)0x40d8, (q15_t)0x40d2, (q15_t)0x40cd,
+  (q15_t)0x40c8, (q15_t)0x40c2, (q15_t)0x40bd, (q15_t)0x40b7, (q15_t)0x40b2, (q15_t)0x40ac, (q15_t)0x40a7, (q15_t)0x40a2,
+  (q15_t)0x409c, (q15_t)0x4097, (q15_t)0x4091, (q15_t)0x408c, (q15_t)0x4086, (q15_t)0x4081, (q15_t)0x407c, (q15_t)0x4076,
+  (q15_t)0x4071, (q15_t)0x406b, (q15_t)0x4066, (q15_t)0x4060, (q15_t)0x405b, (q15_t)0x4056, (q15_t)0x4050, (q15_t)0x404b,
+  (q15_t)0x4045, (q15_t)0x4040, (q15_t)0x403a, (q15_t)0x4035, (q15_t)0x4030, (q15_t)0x402a, (q15_t)0x4025, (q15_t)0x401f,
+  (q15_t)0x401a, (q15_t)0x4014, (q15_t)0x400f, (q15_t)0x4009, (q15_t)0x4004, (q15_t)0x3fff, (q15_t)0x3ff9, (q15_t)0x3ff4,
+  (q15_t)0x3fee, (q15_t)0x3fe9, (q15_t)0x3fe3, (q15_t)0x3fde, (q15_t)0x3fd8, (q15_t)0x3fd3, (q15_t)0x3fce, (q15_t)0x3fc8,
+  (q15_t)0x3fc3, (q15_t)0x3fbd, (q15_t)0x3fb8, (q15_t)0x3fb2, (q15_t)0x3fad, (q15_t)0x3fa7, (q15_t)0x3fa2, (q15_t)0x3f9d,
+  (q15_t)0x3f97, (q15_t)0x3f92, (q15_t)0x3f8c, (q15_t)0x3f87, (q15_t)0x3f81, (q15_t)0x3f7c, (q15_t)0x3f76, (q15_t)0x3f71,
+  (q15_t)0x3f6b, (q15_t)0x3f66, (q15_t)0x3f61, (q15_t)0x3f5b, (q15_t)0x3f56, (q15_t)0x3f50, (q15_t)0x3f4b, (q15_t)0x3f45,
+  (q15_t)0x3f40, (q15_t)0x3f3a, (q15_t)0x3f35, (q15_t)0x3f2f, (q15_t)0x3f2a, (q15_t)0x3f24, (q15_t)0x3f1f, (q15_t)0x3f1a,
+  (q15_t)0x3f14, (q15_t)0x3f0f, (q15_t)0x3f09, (q15_t)0x3f04, (q15_t)0x3efe, (q15_t)0x3ef9, (q15_t)0x3ef3, (q15_t)0x3eee,
+  (q15_t)0x3ee8, (q15_t)0x3ee3, (q15_t)0x3edd, (q15_t)0x3ed8, (q15_t)0x3ed2, (q15_t)0x3ecd, (q15_t)0x3ec7, (q15_t)0x3ec2,
+  (q15_t)0x3ebd, (q15_t)0x3eb7, (q15_t)0x3eb2, (q15_t)0x3eac, (q15_t)0x3ea7, (q15_t)0x3ea1, (q15_t)0x3e9c, (q15_t)0x3e96,
+  (q15_t)0x3e91, (q15_t)0x3e8b, (q15_t)0x3e86, (q15_t)0x3e80, (q15_t)0x3e7b, (q15_t)0x3e75, (q15_t)0x3e70, (q15_t)0x3e6a,
+  (q15_t)0x3e65, (q15_t)0x3e5f, (q15_t)0x3e5a, (q15_t)0x3e54, (q15_t)0x3e4f, (q15_t)0x3e49, (q15_t)0x3e44, (q15_t)0x3e3e,
+  (q15_t)0x3e39, (q15_t)0x3e33, (q15_t)0x3e2e, (q15_t)0x3e28, (q15_t)0x3e23, (q15_t)0x3e1d, (q15_t)0x3e18, (q15_t)0x3e12,
+  (q15_t)0x3e0d, (q15_t)0x3e07, (q15_t)0x3e02, (q15_t)0x3dfc, (q15_t)0x3df7, (q15_t)0x3df1, (q15_t)0x3dec, (q15_t)0x3de6,
+  (q15_t)0x3de1, (q15_t)0x3ddb, (q15_t)0x3dd6, (q15_t)0x3dd0, (q15_t)0x3dcb, (q15_t)0x3dc5, (q15_t)0x3dc0, (q15_t)0x3dba,
+  (q15_t)0x3db5, (q15_t)0x3daf, (q15_t)0x3daa, (q15_t)0x3da4, (q15_t)0x3d9f, (q15_t)0x3d99, (q15_t)0x3d94, (q15_t)0x3d8e,
+  (q15_t)0x3d89, (q15_t)0x3d83, (q15_t)0x3d7e, (q15_t)0x3d78, (q15_t)0x3d73, (q15_t)0x3d6d, (q15_t)0x3d68, (q15_t)0x3d62,
+  (q15_t)0x3d5d, (q15_t)0x3d57, (q15_t)0x3d52, (q15_t)0x3d4c, (q15_t)0x3d47, (q15_t)0x3d41, (q15_t)0x3d3c, (q15_t)0x3d36,
+  (q15_t)0x3d31, (q15_t)0x3d2b, (q15_t)0x3d26, (q15_t)0x3d20, (q15_t)0x3d1b, (q15_t)0x3d15, (q15_t)0x3d10, (q15_t)0x3d0a,
+  (q15_t)0x3d04, (q15_t)0x3cff, (q15_t)0x3cf9, (q15_t)0x3cf4, (q15_t)0x3cee, (q15_t)0x3ce9, (q15_t)0x3ce3, (q15_t)0x3cde,
+  (q15_t)0x3cd8, (q15_t)0x3cd3, (q15_t)0x3ccd, (q15_t)0x3cc8, (q15_t)0x3cc2, (q15_t)0x3cbd, (q15_t)0x3cb7, (q15_t)0x3cb2,
+  (q15_t)0x3cac, (q15_t)0x3ca7, (q15_t)0x3ca1, (q15_t)0x3c9b, (q15_t)0x3c96, (q15_t)0x3c90, (q15_t)0x3c8b, (q15_t)0x3c85,
+  (q15_t)0x3c80, (q15_t)0x3c7a, (q15_t)0x3c75, (q15_t)0x3c6f, (q15_t)0x3c6a, (q15_t)0x3c64, (q15_t)0x3c5f, (q15_t)0x3c59,
+  (q15_t)0x3c53, (q15_t)0x3c4e, (q15_t)0x3c48, (q15_t)0x3c43, (q15_t)0x3c3d, (q15_t)0x3c38, (q15_t)0x3c32, (q15_t)0x3c2d,
+  (q15_t)0x3c27, (q15_t)0x3c22, (q15_t)0x3c1c, (q15_t)0x3c16, (q15_t)0x3c11, (q15_t)0x3c0b, (q15_t)0x3c06, (q15_t)0x3c00,
+  (q15_t)0x3bfb, (q15_t)0x3bf5, (q15_t)0x3bf0, (q15_t)0x3bea, (q15_t)0x3be5, (q15_t)0x3bdf, (q15_t)0x3bd9, (q15_t)0x3bd4,
+  (q15_t)0x3bce, (q15_t)0x3bc9, (q15_t)0x3bc3, (q15_t)0x3bbe, (q15_t)0x3bb8, (q15_t)0x3bb3, (q15_t)0x3bad, (q15_t)0x3ba7,
+  (q15_t)0x3ba2, (q15_t)0x3b9c, (q15_t)0x3b97, (q15_t)0x3b91, (q15_t)0x3b8c, (q15_t)0x3b86, (q15_t)0x3b80, (q15_t)0x3b7b,
+  (q15_t)0x3b75, (q15_t)0x3b70, (q15_t)0x3b6a, (q15_t)0x3b65, (q15_t)0x3b5f, (q15_t)0x3b5a, (q15_t)0x3b54, (q15_t)0x3b4e,
+  (q15_t)0x3b49, (q15_t)0x3b43, (q15_t)0x3b3e, (q15_t)0x3b38, (q15_t)0x3b33, (q15_t)0x3b2d, (q15_t)0x3b27, (q15_t)0x3b22,
+  (q15_t)0x3b1c, (q15_t)0x3b17, (q15_t)0x3b11, (q15_t)0x3b0c, (q15_t)0x3b06, (q15_t)0x3b00, (q15_t)0x3afb, (q15_t)0x3af5,
+  (q15_t)0x3af0, (q15_t)0x3aea, (q15_t)0x3ae4, (q15_t)0x3adf, (q15_t)0x3ad9, (q15_t)0x3ad4, (q15_t)0x3ace, (q15_t)0x3ac9,
+  (q15_t)0x3ac3, (q15_t)0x3abd, (q15_t)0x3ab8, (q15_t)0x3ab2, (q15_t)0x3aad, (q15_t)0x3aa7, (q15_t)0x3aa2, (q15_t)0x3a9c,
+  (q15_t)0x3a96, (q15_t)0x3a91, (q15_t)0x3a8b, (q15_t)0x3a86, (q15_t)0x3a80, (q15_t)0x3a7a, (q15_t)0x3a75, (q15_t)0x3a6f,
+  (q15_t)0x3a6a, (q15_t)0x3a64, (q15_t)0x3a5e, (q15_t)0x3a59, (q15_t)0x3a53, (q15_t)0x3a4e, (q15_t)0x3a48, (q15_t)0x3a42,
+  (q15_t)0x3a3d, (q15_t)0x3a37, (q15_t)0x3a32, (q15_t)0x3a2c, (q15_t)0x3a26, (q15_t)0x3a21, (q15_t)0x3a1b, (q15_t)0x3a16,
+  (q15_t)0x3a10, (q15_t)0x3a0b, (q15_t)0x3a05, (q15_t)0x39ff, (q15_t)0x39fa, (q15_t)0x39f4, (q15_t)0x39ee, (q15_t)0x39e9,
+  (q15_t)0x39e3, (q15_t)0x39de, (q15_t)0x39d8, (q15_t)0x39d2, (q15_t)0x39cd, (q15_t)0x39c7, (q15_t)0x39c2, (q15_t)0x39bc,
+  (q15_t)0x39b6, (q15_t)0x39b1, (q15_t)0x39ab, (q15_t)0x39a6, (q15_t)0x39a0, (q15_t)0x399a, (q15_t)0x3995, (q15_t)0x398f,
+  (q15_t)0x398a, (q15_t)0x3984, (q15_t)0x397e, (q15_t)0x3979, (q15_t)0x3973, (q15_t)0x396d, (q15_t)0x3968, (q15_t)0x3962,
+  (q15_t)0x395d, (q15_t)0x3957, (q15_t)0x3951, (q15_t)0x394c, (q15_t)0x3946, (q15_t)0x3941, (q15_t)0x393b, (q15_t)0x3935,
+  (q15_t)0x3930, (q15_t)0x392a, (q15_t)0x3924, (q15_t)0x391f, (q15_t)0x3919, (q15_t)0x3914, (q15_t)0x390e, (q15_t)0x3908,
+  (q15_t)0x3903, (q15_t)0x38fd, (q15_t)0x38f7, (q15_t)0x38f2, (q15_t)0x38ec, (q15_t)0x38e7, (q15_t)0x38e1, (q15_t)0x38db,
+  (q15_t)0x38d6, (q15_t)0x38d0, (q15_t)0x38ca, (q15_t)0x38c5, (q15_t)0x38bf, (q15_t)0x38ba, (q15_t)0x38b4, (q15_t)0x38ae,
+  (q15_t)0x38a9, (q15_t)0x38a3, (q15_t)0x389d, (q15_t)0x3898, (q15_t)0x3892, (q15_t)0x388c, (q15_t)0x3887, (q15_t)0x3881,
+  (q15_t)0x387c, (q15_t)0x3876, (q15_t)0x3870, (q15_t)0x386b, (q15_t)0x3865, (q15_t)0x385f, (q15_t)0x385a, (q15_t)0x3854,
+  (q15_t)0x384e, (q15_t)0x3849, (q15_t)0x3843, (q15_t)0x383d, (q15_t)0x3838, (q15_t)0x3832, (q15_t)0x382d, (q15_t)0x3827,
+  (q15_t)0x3821, (q15_t)0x381c, (q15_t)0x3816, (q15_t)0x3810, (q15_t)0x380b, (q15_t)0x3805, (q15_t)0x37ff, (q15_t)0x37fa,
+  (q15_t)0x37f4, (q15_t)0x37ee, (q15_t)0x37e9, (q15_t)0x37e3, (q15_t)0x37dd, (q15_t)0x37d8, (q15_t)0x37d2, (q15_t)0x37cc,
+  (q15_t)0x37c7, (q15_t)0x37c1, (q15_t)0x37bc, (q15_t)0x37b6, (q15_t)0x37b0, (q15_t)0x37ab, (q15_t)0x37a5, (q15_t)0x379f,
+  (q15_t)0x379a, (q15_t)0x3794, (q15_t)0x378e, (q15_t)0x3789, (q15_t)0x3783, (q15_t)0x377d, (q15_t)0x3778, (q15_t)0x3772,
+  (q15_t)0x376c, (q15_t)0x3767, (q15_t)0x3761, (q15_t)0x375b, (q15_t)0x3756, (q15_t)0x3750, (q15_t)0x374a, (q15_t)0x3745,
+  (q15_t)0x373f, (q15_t)0x3739, (q15_t)0x3734, (q15_t)0x372e, (q15_t)0x3728, (q15_t)0x3723, (q15_t)0x371d, (q15_t)0x3717,
+  (q15_t)0x3712, (q15_t)0x370c, (q15_t)0x3706, (q15_t)0x3701, (q15_t)0x36fb, (q15_t)0x36f5, (q15_t)0x36f0, (q15_t)0x36ea,
+  (q15_t)0x36e4, (q15_t)0x36df, (q15_t)0x36d9, (q15_t)0x36d3, (q15_t)0x36ce, (q15_t)0x36c8, (q15_t)0x36c2, (q15_t)0x36bc,
+  (q15_t)0x36b7, (q15_t)0x36b1, (q15_t)0x36ab, (q15_t)0x36a6, (q15_t)0x36a0, (q15_t)0x369a, (q15_t)0x3695, (q15_t)0x368f,
+  (q15_t)0x3689, (q15_t)0x3684, (q15_t)0x367e, (q15_t)0x3678, (q15_t)0x3673, (q15_t)0x366d, (q15_t)0x3667, (q15_t)0x3662,
+  (q15_t)0x365c, (q15_t)0x3656, (q15_t)0x3650, (q15_t)0x364b, (q15_t)0x3645, (q15_t)0x363f, (q15_t)0x363a, (q15_t)0x3634,
+  (q15_t)0x362e, (q15_t)0x3629, (q15_t)0x3623, (q15_t)0x361d, (q15_t)0x3618, (q15_t)0x3612, (q15_t)0x360c, (q15_t)0x3606,
+  (q15_t)0x3601, (q15_t)0x35fb, (q15_t)0x35f5, (q15_t)0x35f0, (q15_t)0x35ea, (q15_t)0x35e4, (q15_t)0x35df, (q15_t)0x35d9,
+  (q15_t)0x35d3, (q15_t)0x35cd, (q15_t)0x35c8, (q15_t)0x35c2, (q15_t)0x35bc, (q15_t)0x35b7, (q15_t)0x35b1, (q15_t)0x35ab,
+  (q15_t)0x35a6, (q15_t)0x35a0, (q15_t)0x359a, (q15_t)0x3594, (q15_t)0x358f, (q15_t)0x3589, (q15_t)0x3583, (q15_t)0x357e,
+  (q15_t)0x3578, (q15_t)0x3572, (q15_t)0x356c, (q15_t)0x3567, (q15_t)0x3561, (q15_t)0x355b, (q15_t)0x3556, (q15_t)0x3550,
+  (q15_t)0x354a, (q15_t)0x3544, (q15_t)0x353f, (q15_t)0x3539, (q15_t)0x3533, (q15_t)0x352e, (q15_t)0x3528, (q15_t)0x3522,
+  (q15_t)0x351c, (q15_t)0x3517, (q15_t)0x3511, (q15_t)0x350b, (q15_t)0x3506, (q15_t)0x3500, (q15_t)0x34fa, (q15_t)0x34f4,
+  (q15_t)0x34ef, (q15_t)0x34e9, (q15_t)0x34e3, (q15_t)0x34de, (q15_t)0x34d8, (q15_t)0x34d2, (q15_t)0x34cc, (q15_t)0x34c7,
+  (q15_t)0x34c1, (q15_t)0x34bb, (q15_t)0x34b6, (q15_t)0x34b0, (q15_t)0x34aa, (q15_t)0x34a4, (q15_t)0x349f, (q15_t)0x3499,
+  (q15_t)0x3493, (q15_t)0x348d, (q15_t)0x3488, (q15_t)0x3482, (q15_t)0x347c, (q15_t)0x3476, (q15_t)0x3471, (q15_t)0x346b,
+  (q15_t)0x3465, (q15_t)0x3460, (q15_t)0x345a, (q15_t)0x3454, (q15_t)0x344e, (q15_t)0x3449, (q15_t)0x3443, (q15_t)0x343d,
+  (q15_t)0x3437, (q15_t)0x3432, (q15_t)0x342c, (q15_t)0x3426, (q15_t)0x3420, (q15_t)0x341b, (q15_t)0x3415, (q15_t)0x340f,
+  (q15_t)0x340a, (q15_t)0x3404, (q15_t)0x33fe, (q15_t)0x33f8, (q15_t)0x33f3, (q15_t)0x33ed, (q15_t)0x33e7, (q15_t)0x33e1,
+  (q15_t)0x33dc, (q15_t)0x33d6, (q15_t)0x33d0, (q15_t)0x33ca, (q15_t)0x33c5, (q15_t)0x33bf, (q15_t)0x33b9, (q15_t)0x33b3,
+  (q15_t)0x33ae, (q15_t)0x33a8, (q15_t)0x33a2, (q15_t)0x339c, (q15_t)0x3397, (q15_t)0x3391, (q15_t)0x338b, (q15_t)0x3385,
+  (q15_t)0x3380, (q15_t)0x337a, (q15_t)0x3374, (q15_t)0x336e, (q15_t)0x3369, (q15_t)0x3363, (q15_t)0x335d, (q15_t)0x3357,
+  (q15_t)0x3352, (q15_t)0x334c, (q15_t)0x3346, (q15_t)0x3340, (q15_t)0x333b, (q15_t)0x3335, (q15_t)0x332f, (q15_t)0x3329,
+  (q15_t)0x3324, (q15_t)0x331e, (q15_t)0x3318, (q15_t)0x3312, (q15_t)0x330c, (q15_t)0x3307, (q15_t)0x3301, (q15_t)0x32fb,
+  (q15_t)0x32f5, (q15_t)0x32f0, (q15_t)0x32ea, (q15_t)0x32e4, (q15_t)0x32de, (q15_t)0x32d9, (q15_t)0x32d3, (q15_t)0x32cd,
+  (q15_t)0x32c7, (q15_t)0x32c2, (q15_t)0x32bc, (q15_t)0x32b6, (q15_t)0x32b0, (q15_t)0x32aa, (q15_t)0x32a5, (q15_t)0x329f,
+  (q15_t)0x3299, (q15_t)0x3293, (q15_t)0x328e, (q15_t)0x3288, (q15_t)0x3282, (q15_t)0x327c, (q15_t)0x3276, (q15_t)0x3271,
+  (q15_t)0x326b, (q15_t)0x3265, (q15_t)0x325f, (q15_t)0x325a, (q15_t)0x3254, (q15_t)0x324e, (q15_t)0x3248, (q15_t)0x3243,
+  (q15_t)0x323d, (q15_t)0x3237, (q15_t)0x3231, (q15_t)0x322b, (q15_t)0x3226, (q15_t)0x3220, (q15_t)0x321a, (q15_t)0x3214,
+  (q15_t)0x320e, (q15_t)0x3209, (q15_t)0x3203, (q15_t)0x31fd, (q15_t)0x31f7, (q15_t)0x31f2, (q15_t)0x31ec, (q15_t)0x31e6,
+  (q15_t)0x31e0, (q15_t)0x31da, (q15_t)0x31d5, (q15_t)0x31cf, (q15_t)0x31c9, (q15_t)0x31c3, (q15_t)0x31bd, (q15_t)0x31b8,
+  (q15_t)0x31b2, (q15_t)0x31ac, (q15_t)0x31a6, (q15_t)0x31a1, (q15_t)0x319b, (q15_t)0x3195, (q15_t)0x318f, (q15_t)0x3189,
+  (q15_t)0x3184, (q15_t)0x317e, (q15_t)0x3178, (q15_t)0x3172, (q15_t)0x316c, (q15_t)0x3167, (q15_t)0x3161, (q15_t)0x315b,
+  (q15_t)0x3155, (q15_t)0x314f, (q15_t)0x314a, (q15_t)0x3144, (q15_t)0x313e, (q15_t)0x3138, (q15_t)0x3132, (q15_t)0x312d,
+  (q15_t)0x3127, (q15_t)0x3121, (q15_t)0x311b, (q15_t)0x3115, (q15_t)0x3110, (q15_t)0x310a, (q15_t)0x3104, (q15_t)0x30fe,
+  (q15_t)0x30f8, (q15_t)0x30f3, (q15_t)0x30ed, (q15_t)0x30e7, (q15_t)0x30e1, (q15_t)0x30db, (q15_t)0x30d6, (q15_t)0x30d0,
+  (q15_t)0x30ca, (q15_t)0x30c4, (q15_t)0x30be, (q15_t)0x30b8, (q15_t)0x30b3, (q15_t)0x30ad, (q15_t)0x30a7, (q15_t)0x30a1,
+  (q15_t)0x309b, (q15_t)0x3096, (q15_t)0x3090, (q15_t)0x308a, (q15_t)0x3084, (q15_t)0x307e, (q15_t)0x3079, (q15_t)0x3073,
+  (q15_t)0x306d, (q15_t)0x3067, (q15_t)0x3061, (q15_t)0x305b, (q15_t)0x3056, (q15_t)0x3050, (q15_t)0x304a, (q15_t)0x3044,
+  (q15_t)0x303e, (q15_t)0x3039, (q15_t)0x3033, (q15_t)0x302d, (q15_t)0x3027, (q15_t)0x3021, (q15_t)0x301b, (q15_t)0x3016,
+  (q15_t)0x3010, (q15_t)0x300a, (q15_t)0x3004, (q15_t)0x2ffe, (q15_t)0x2ff8, (q15_t)0x2ff3, (q15_t)0x2fed, (q15_t)0x2fe7,
+  (q15_t)0x2fe1, (q15_t)0x2fdb, (q15_t)0x2fd6, (q15_t)0x2fd0, (q15_t)0x2fca, (q15_t)0x2fc4, (q15_t)0x2fbe, (q15_t)0x2fb8,
+  (q15_t)0x2fb3, (q15_t)0x2fad, (q15_t)0x2fa7, (q15_t)0x2fa1, (q15_t)0x2f9b, (q15_t)0x2f95, (q15_t)0x2f90, (q15_t)0x2f8a,
+  (q15_t)0x2f84, (q15_t)0x2f7e, (q15_t)0x2f78, (q15_t)0x2f72, (q15_t)0x2f6d, (q15_t)0x2f67, (q15_t)0x2f61, (q15_t)0x2f5b,
+  (q15_t)0x2f55, (q15_t)0x2f4f, (q15_t)0x2f4a, (q15_t)0x2f44, (q15_t)0x2f3e, (q15_t)0x2f38, (q15_t)0x2f32, (q15_t)0x2f2c,
+  (q15_t)0x2f27, (q15_t)0x2f21, (q15_t)0x2f1b, (q15_t)0x2f15, (q15_t)0x2f0f, (q15_t)0x2f09, (q15_t)0x2f03, (q15_t)0x2efe,
+  (q15_t)0x2ef8, (q15_t)0x2ef2, (q15_t)0x2eec, (q15_t)0x2ee6, (q15_t)0x2ee0, (q15_t)0x2edb, (q15_t)0x2ed5, (q15_t)0x2ecf,
+  (q15_t)0x2ec9, (q15_t)0x2ec3, (q15_t)0x2ebd, (q15_t)0x2eb7, (q15_t)0x2eb2, (q15_t)0x2eac, (q15_t)0x2ea6, (q15_t)0x2ea0,
+  (q15_t)0x2e9a, (q15_t)0x2e94, (q15_t)0x2e8e, (q15_t)0x2e89, (q15_t)0x2e83, (q15_t)0x2e7d, (q15_t)0x2e77, (q15_t)0x2e71,
+  (q15_t)0x2e6b, (q15_t)0x2e65, (q15_t)0x2e60, (q15_t)0x2e5a, (q15_t)0x2e54, (q15_t)0x2e4e, (q15_t)0x2e48, (q15_t)0x2e42,
+  (q15_t)0x2e3c, (q15_t)0x2e37, (q15_t)0x2e31, (q15_t)0x2e2b, (q15_t)0x2e25, (q15_t)0x2e1f, (q15_t)0x2e19, (q15_t)0x2e13,
+  (q15_t)0x2e0e, (q15_t)0x2e08, (q15_t)0x2e02, (q15_t)0x2dfc, (q15_t)0x2df6, (q15_t)0x2df0, (q15_t)0x2dea, (q15_t)0x2de5,
+  (q15_t)0x2ddf, (q15_t)0x2dd9, (q15_t)0x2dd3, (q15_t)0x2dcd, (q15_t)0x2dc7, (q15_t)0x2dc1, (q15_t)0x2dbb, (q15_t)0x2db6,
+  (q15_t)0x2db0, (q15_t)0x2daa, (q15_t)0x2da4, (q15_t)0x2d9e, (q15_t)0x2d98, (q15_t)0x2d92, (q15_t)0x2d8d, (q15_t)0x2d87,
+  (q15_t)0x2d81, (q15_t)0x2d7b, (q15_t)0x2d75, (q15_t)0x2d6f, (q15_t)0x2d69, (q15_t)0x2d63, (q15_t)0x2d5e, (q15_t)0x2d58,
+  (q15_t)0x2d52, (q15_t)0x2d4c, (q15_t)0x2d46, (q15_t)0x2d40, (q15_t)0x2d3a, (q15_t)0x2d34, (q15_t)0x2d2f, (q15_t)0x2d29,
+  (q15_t)0x2d23, (q15_t)0x2d1d, (q15_t)0x2d17, (q15_t)0x2d11, (q15_t)0x2d0b, (q15_t)0x2d05, (q15_t)0x2cff, (q15_t)0x2cfa,
+  (q15_t)0x2cf4, (q15_t)0x2cee, (q15_t)0x2ce8, (q15_t)0x2ce2, (q15_t)0x2cdc, (q15_t)0x2cd6, (q15_t)0x2cd0, (q15_t)0x2ccb,
+  (q15_t)0x2cc5, (q15_t)0x2cbf, (q15_t)0x2cb9, (q15_t)0x2cb3, (q15_t)0x2cad, (q15_t)0x2ca7, (q15_t)0x2ca1, (q15_t)0x2c9b,
+  (q15_t)0x2c96, (q15_t)0x2c90, (q15_t)0x2c8a, (q15_t)0x2c84, (q15_t)0x2c7e, (q15_t)0x2c78, (q15_t)0x2c72, (q15_t)0x2c6c,
+  (q15_t)0x2c66, (q15_t)0x2c61, (q15_t)0x2c5b, (q15_t)0x2c55, (q15_t)0x2c4f, (q15_t)0x2c49, (q15_t)0x2c43, (q15_t)0x2c3d,
+  (q15_t)0x2c37, (q15_t)0x2c31, (q15_t)0x2c2b, (q15_t)0x2c26, (q15_t)0x2c20, (q15_t)0x2c1a, (q15_t)0x2c14, (q15_t)0x2c0e,
+  (q15_t)0x2c08, (q15_t)0x2c02, (q15_t)0x2bfc, (q15_t)0x2bf6, (q15_t)0x2bf0, (q15_t)0x2beb, (q15_t)0x2be5, (q15_t)0x2bdf,
+  (q15_t)0x2bd9, (q15_t)0x2bd3, (q15_t)0x2bcd, (q15_t)0x2bc7, (q15_t)0x2bc1, (q15_t)0x2bbb, (q15_t)0x2bb5, (q15_t)0x2bb0,
+  (q15_t)0x2baa, (q15_t)0x2ba4, (q15_t)0x2b9e, (q15_t)0x2b98, (q15_t)0x2b92, (q15_t)0x2b8c, (q15_t)0x2b86, (q15_t)0x2b80,
+  (q15_t)0x2b7a, (q15_t)0x2b74, (q15_t)0x2b6f, (q15_t)0x2b69, (q15_t)0x2b63, (q15_t)0x2b5d, (q15_t)0x2b57, (q15_t)0x2b51,
+  (q15_t)0x2b4b, (q15_t)0x2b45, (q15_t)0x2b3f, (q15_t)0x2b39, (q15_t)0x2b33, (q15_t)0x2b2d, (q15_t)0x2b28, (q15_t)0x2b22,
+  (q15_t)0x2b1c, (q15_t)0x2b16, (q15_t)0x2b10, (q15_t)0x2b0a, (q15_t)0x2b04, (q15_t)0x2afe, (q15_t)0x2af8, (q15_t)0x2af2,
+  (q15_t)0x2aec, (q15_t)0x2ae6, (q15_t)0x2ae1, (q15_t)0x2adb, (q15_t)0x2ad5, (q15_t)0x2acf, (q15_t)0x2ac9, (q15_t)0x2ac3,
+  (q15_t)0x2abd, (q15_t)0x2ab7, (q15_t)0x2ab1, (q15_t)0x2aab, (q15_t)0x2aa5, (q15_t)0x2a9f, (q15_t)0x2a99, (q15_t)0x2a94,
+  (q15_t)0x2a8e, (q15_t)0x2a88, (q15_t)0x2a82, (q15_t)0x2a7c, (q15_t)0x2a76, (q15_t)0x2a70, (q15_t)0x2a6a, (q15_t)0x2a64,
+  (q15_t)0x2a5e, (q15_t)0x2a58, (q15_t)0x2a52, (q15_t)0x2a4c, (q15_t)0x2a47, (q15_t)0x2a41, (q15_t)0x2a3b, (q15_t)0x2a35,
+  (q15_t)0x2a2f, (q15_t)0x2a29, (q15_t)0x2a23, (q15_t)0x2a1d, (q15_t)0x2a17, (q15_t)0x2a11, (q15_t)0x2a0b, (q15_t)0x2a05,
+  (q15_t)0x29ff, (q15_t)0x29f9, (q15_t)0x29f3, (q15_t)0x29ee, (q15_t)0x29e8, (q15_t)0x29e2, (q15_t)0x29dc, (q15_t)0x29d6,
+  (q15_t)0x29d0, (q15_t)0x29ca, (q15_t)0x29c4, (q15_t)0x29be, (q15_t)0x29b8, (q15_t)0x29b2, (q15_t)0x29ac, (q15_t)0x29a6,
+  (q15_t)0x29a0, (q15_t)0x299a, (q15_t)0x2994, (q15_t)0x298e, (q15_t)0x2989, (q15_t)0x2983, (q15_t)0x297d, (q15_t)0x2977,
+  (q15_t)0x2971, (q15_t)0x296b, (q15_t)0x2965, (q15_t)0x295f, (q15_t)0x2959, (q15_t)0x2953, (q15_t)0x294d, (q15_t)0x2947,
+  (q15_t)0x2941, (q15_t)0x293b, (q15_t)0x2935, (q15_t)0x292f, (q15_t)0x2929, (q15_t)0x2923, (q15_t)0x291d, (q15_t)0x2918,
+  (q15_t)0x2912, (q15_t)0x290c, (q15_t)0x2906, (q15_t)0x2900, (q15_t)0x28fa, (q15_t)0x28f4, (q15_t)0x28ee, (q15_t)0x28e8,
+  (q15_t)0x28e2, (q15_t)0x28dc, (q15_t)0x28d6, (q15_t)0x28d0, (q15_t)0x28ca, (q15_t)0x28c4, (q15_t)0x28be, (q15_t)0x28b8,
+  (q15_t)0x28b2, (q15_t)0x28ac, (q15_t)0x28a6, (q15_t)0x28a0, (q15_t)0x289a, (q15_t)0x2895, (q15_t)0x288f, (q15_t)0x2889,
+  (q15_t)0x2883, (q15_t)0x287d, (q15_t)0x2877, (q15_t)0x2871, (q15_t)0x286b, (q15_t)0x2865, (q15_t)0x285f, (q15_t)0x2859,
+  (q15_t)0x2853, (q15_t)0x284d, (q15_t)0x2847, (q15_t)0x2841, (q15_t)0x283b, (q15_t)0x2835, (q15_t)0x282f, (q15_t)0x2829,
+  (q15_t)0x2823, (q15_t)0x281d, (q15_t)0x2817, (q15_t)0x2811, (q15_t)0x280b, (q15_t)0x2805, (q15_t)0x27ff, (q15_t)0x27f9,
+  (q15_t)0x27f3, (q15_t)0x27ee, (q15_t)0x27e8, (q15_t)0x27e2, (q15_t)0x27dc, (q15_t)0x27d6, (q15_t)0x27d0, (q15_t)0x27ca,
+  (q15_t)0x27c4, (q15_t)0x27be, (q15_t)0x27b8, (q15_t)0x27b2, (q15_t)0x27ac, (q15_t)0x27a6, (q15_t)0x27a0, (q15_t)0x279a,
+  (q15_t)0x2794, (q15_t)0x278e, (q15_t)0x2788, (q15_t)0x2782, (q15_t)0x277c, (q15_t)0x2776, (q15_t)0x2770, (q15_t)0x276a,
+  (q15_t)0x2764, (q15_t)0x275e, (q15_t)0x2758, (q15_t)0x2752, (q15_t)0x274c, (q15_t)0x2746, (q15_t)0x2740, (q15_t)0x273a,
+  (q15_t)0x2734, (q15_t)0x272e, (q15_t)0x2728, (q15_t)0x2722, (q15_t)0x271c, (q15_t)0x2716, (q15_t)0x2710, (q15_t)0x270a,
+  (q15_t)0x2704, (q15_t)0x26fe, (q15_t)0x26f8, (q15_t)0x26f2, (q15_t)0x26ec, (q15_t)0x26e7, (q15_t)0x26e1, (q15_t)0x26db,
+  (q15_t)0x26d5, (q15_t)0x26cf, (q15_t)0x26c9, (q15_t)0x26c3, (q15_t)0x26bd, (q15_t)0x26b7, (q15_t)0x26b1, (q15_t)0x26ab,
+  (q15_t)0x26a5, (q15_t)0x269f, (q15_t)0x2699, (q15_t)0x2693, (q15_t)0x268d, (q15_t)0x2687, (q15_t)0x2681, (q15_t)0x267b,
+  (q15_t)0x2675, (q15_t)0x266f, (q15_t)0x2669, (q15_t)0x2663, (q15_t)0x265d, (q15_t)0x2657, (q15_t)0x2651, (q15_t)0x264b,
+  (q15_t)0x2645, (q15_t)0x263f, (q15_t)0x2639, (q15_t)0x2633, (q15_t)0x262d, (q15_t)0x2627, (q15_t)0x2621, (q15_t)0x261b,
+  (q15_t)0x2615, (q15_t)0x260f, (q15_t)0x2609, (q15_t)0x2603, (q15_t)0x25fd, (q15_t)0x25f7, (q15_t)0x25f1, (q15_t)0x25eb,
+  (q15_t)0x25e5, (q15_t)0x25df, (q15_t)0x25d9, (q15_t)0x25d3, (q15_t)0x25cd, (q15_t)0x25c7, (q15_t)0x25c1, (q15_t)0x25bb,
+  (q15_t)0x25b5, (q15_t)0x25af, (q15_t)0x25a9, (q15_t)0x25a3, (q15_t)0x259d, (q15_t)0x2597, (q15_t)0x2591, (q15_t)0x258b,
+  (q15_t)0x2585, (q15_t)0x257f, (q15_t)0x2579, (q15_t)0x2573, (q15_t)0x256d, (q15_t)0x2567, (q15_t)0x2561, (q15_t)0x255b,
+  (q15_t)0x2555, (q15_t)0x254f, (q15_t)0x2549, (q15_t)0x2543, (q15_t)0x253d, (q15_t)0x2537, (q15_t)0x2531, (q15_t)0x252b,
+  (q15_t)0x2525, (q15_t)0x251f, (q15_t)0x2519, (q15_t)0x2513, (q15_t)0x250c, (q15_t)0x2506, (q15_t)0x2500, (q15_t)0x24fa,
+  (q15_t)0x24f4, (q15_t)0x24ee, (q15_t)0x24e8, (q15_t)0x24e2, (q15_t)0x24dc, (q15_t)0x24d6, (q15_t)0x24d0, (q15_t)0x24ca,
+  (q15_t)0x24c4, (q15_t)0x24be, (q15_t)0x24b8, (q15_t)0x24b2, (q15_t)0x24ac, (q15_t)0x24a6, (q15_t)0x24a0, (q15_t)0x249a,
+  (q15_t)0x2494, (q15_t)0x248e, (q15_t)0x2488, (q15_t)0x2482, (q15_t)0x247c, (q15_t)0x2476, (q15_t)0x2470, (q15_t)0x246a,
+  (q15_t)0x2464, (q15_t)0x245e, (q15_t)0x2458, (q15_t)0x2452, (q15_t)0x244c, (q15_t)0x2446, (q15_t)0x2440, (q15_t)0x243a,
+  (q15_t)0x2434, (q15_t)0x242e, (q15_t)0x2428, (q15_t)0x2422, (q15_t)0x241c, (q15_t)0x2416, (q15_t)0x2410, (q15_t)0x240a,
+  (q15_t)0x2404, (q15_t)0x23fd, (q15_t)0x23f7, (q15_t)0x23f1, (q15_t)0x23eb, (q15_t)0x23e5, (q15_t)0x23df, (q15_t)0x23d9,
+  (q15_t)0x23d3, (q15_t)0x23cd, (q15_t)0x23c7, (q15_t)0x23c1, (q15_t)0x23bb, (q15_t)0x23b5, (q15_t)0x23af, (q15_t)0x23a9,
+  (q15_t)0x23a3, (q15_t)0x239d, (q15_t)0x2397, (q15_t)0x2391, (q15_t)0x238b, (q15_t)0x2385, (q15_t)0x237f, (q15_t)0x2379,
+  (q15_t)0x2373, (q15_t)0x236d, (q15_t)0x2367, (q15_t)0x2361, (q15_t)0x235b, (q15_t)0x2355, (q15_t)0x234e, (q15_t)0x2348,
+  (q15_t)0x2342, (q15_t)0x233c, (q15_t)0x2336, (q15_t)0x2330, (q15_t)0x232a, (q15_t)0x2324, (q15_t)0x231e, (q15_t)0x2318,
+  (q15_t)0x2312, (q15_t)0x230c, (q15_t)0x2306, (q15_t)0x2300, (q15_t)0x22fa, (q15_t)0x22f4, (q15_t)0x22ee, (q15_t)0x22e8,
+  (q15_t)0x22e2, (q15_t)0x22dc, (q15_t)0x22d6, (q15_t)0x22d0, (q15_t)0x22ca, (q15_t)0x22c4, (q15_t)0x22bd, (q15_t)0x22b7,
+  (q15_t)0x22b1, (q15_t)0x22ab, (q15_t)0x22a5, (q15_t)0x229f, (q15_t)0x2299, (q15_t)0x2293, (q15_t)0x228d, (q15_t)0x2287,
+  (q15_t)0x2281, (q15_t)0x227b, (q15_t)0x2275, (q15_t)0x226f, (q15_t)0x2269, (q15_t)0x2263, (q15_t)0x225d, (q15_t)0x2257,
+  (q15_t)0x2251, (q15_t)0x224a, (q15_t)0x2244, (q15_t)0x223e, (q15_t)0x2238, (q15_t)0x2232, (q15_t)0x222c, (q15_t)0x2226,
+  (q15_t)0x2220, (q15_t)0x221a, (q15_t)0x2214, (q15_t)0x220e, (q15_t)0x2208, (q15_t)0x2202, (q15_t)0x21fc, (q15_t)0x21f6,
+  (q15_t)0x21f0, (q15_t)0x21ea, (q15_t)0x21e4, (q15_t)0x21dd, (q15_t)0x21d7, (q15_t)0x21d1, (q15_t)0x21cb, (q15_t)0x21c5,
+  (q15_t)0x21bf, (q15_t)0x21b9, (q15_t)0x21b3, (q15_t)0x21ad, (q15_t)0x21a7, (q15_t)0x21a1, (q15_t)0x219b, (q15_t)0x2195,
+  (q15_t)0x218f, (q15_t)0x2189, (q15_t)0x2183, (q15_t)0x217c, (q15_t)0x2176, (q15_t)0x2170, (q15_t)0x216a, (q15_t)0x2164,
+  (q15_t)0x215e, (q15_t)0x2158, (q15_t)0x2152, (q15_t)0x214c, (q15_t)0x2146, (q15_t)0x2140, (q15_t)0x213a, (q15_t)0x2134,
+  (q15_t)0x212e, (q15_t)0x2128, (q15_t)0x2121, (q15_t)0x211b, (q15_t)0x2115, (q15_t)0x210f, (q15_t)0x2109, (q15_t)0x2103,
+  (q15_t)0x20fd, (q15_t)0x20f7, (q15_t)0x20f1, (q15_t)0x20eb, (q15_t)0x20e5, (q15_t)0x20df, (q15_t)0x20d9, (q15_t)0x20d3,
+  (q15_t)0x20cc, (q15_t)0x20c6, (q15_t)0x20c0, (q15_t)0x20ba, (q15_t)0x20b4, (q15_t)0x20ae, (q15_t)0x20a8, (q15_t)0x20a2,
+  (q15_t)0x209c, (q15_t)0x2096, (q15_t)0x2090, (q15_t)0x208a, (q15_t)0x2084, (q15_t)0x207e, (q15_t)0x2077, (q15_t)0x2071,
+  (q15_t)0x206b, (q15_t)0x2065, (q15_t)0x205f, (q15_t)0x2059, (q15_t)0x2053, (q15_t)0x204d, (q15_t)0x2047, (q15_t)0x2041,
+  (q15_t)0x203b, (q15_t)0x2035, (q15_t)0x202e, (q15_t)0x2028, (q15_t)0x2022, (q15_t)0x201c, (q15_t)0x2016, (q15_t)0x2010,
+  (q15_t)0x200a, (q15_t)0x2004, (q15_t)0x1ffe, (q15_t)0x1ff8, (q15_t)0x1ff2, (q15_t)0x1fec, (q15_t)0x1fe5, (q15_t)0x1fdf,
+  (q15_t)0x1fd9, (q15_t)0x1fd3, (q15_t)0x1fcd, (q15_t)0x1fc7, (q15_t)0x1fc1, (q15_t)0x1fbb, (q15_t)0x1fb5, (q15_t)0x1faf,
+  (q15_t)0x1fa9, (q15_t)0x1fa3, (q15_t)0x1f9c, (q15_t)0x1f96, (q15_t)0x1f90, (q15_t)0x1f8a, (q15_t)0x1f84, (q15_t)0x1f7e,
+  (q15_t)0x1f78, (q15_t)0x1f72, (q15_t)0x1f6c, (q15_t)0x1f66, (q15_t)0x1f60, (q15_t)0x1f59, (q15_t)0x1f53, (q15_t)0x1f4d,
+  (q15_t)0x1f47, (q15_t)0x1f41, (q15_t)0x1f3b, (q15_t)0x1f35, (q15_t)0x1f2f, (q15_t)0x1f29, (q15_t)0x1f23, (q15_t)0x1f1d,
+  (q15_t)0x1f16, (q15_t)0x1f10, (q15_t)0x1f0a, (q15_t)0x1f04, (q15_t)0x1efe, (q15_t)0x1ef8, (q15_t)0x1ef2, (q15_t)0x1eec,
+  (q15_t)0x1ee6, (q15_t)0x1ee0, (q15_t)0x1ed9, (q15_t)0x1ed3, (q15_t)0x1ecd, (q15_t)0x1ec7, (q15_t)0x1ec1, (q15_t)0x1ebb,
+  (q15_t)0x1eb5, (q15_t)0x1eaf, (q15_t)0x1ea9, (q15_t)0x1ea3, (q15_t)0x1e9c, (q15_t)0x1e96, (q15_t)0x1e90, (q15_t)0x1e8a,
+  (q15_t)0x1e84, (q15_t)0x1e7e, (q15_t)0x1e78, (q15_t)0x1e72, (q15_t)0x1e6c, (q15_t)0x1e66, (q15_t)0x1e5f, (q15_t)0x1e59,
+  (q15_t)0x1e53, (q15_t)0x1e4d, (q15_t)0x1e47, (q15_t)0x1e41, (q15_t)0x1e3b, (q15_t)0x1e35, (q15_t)0x1e2f, (q15_t)0x1e29,
+  (q15_t)0x1e22, (q15_t)0x1e1c, (q15_t)0x1e16, (q15_t)0x1e10, (q15_t)0x1e0a, (q15_t)0x1e04, (q15_t)0x1dfe, (q15_t)0x1df8,
+  (q15_t)0x1df2, (q15_t)0x1deb, (q15_t)0x1de5, (q15_t)0x1ddf, (q15_t)0x1dd9, (q15_t)0x1dd3, (q15_t)0x1dcd, (q15_t)0x1dc7,
+  (q15_t)0x1dc1, (q15_t)0x1dbb, (q15_t)0x1db4, (q15_t)0x1dae, (q15_t)0x1da8, (q15_t)0x1da2, (q15_t)0x1d9c, (q15_t)0x1d96,
+  (q15_t)0x1d90, (q15_t)0x1d8a, (q15_t)0x1d84, (q15_t)0x1d7d, (q15_t)0x1d77, (q15_t)0x1d71, (q15_t)0x1d6b, (q15_t)0x1d65,
+  (q15_t)0x1d5f, (q15_t)0x1d59, (q15_t)0x1d53, (q15_t)0x1d4c, (q15_t)0x1d46, (q15_t)0x1d40, (q15_t)0x1d3a, (q15_t)0x1d34,
+  (q15_t)0x1d2e, (q15_t)0x1d28, (q15_t)0x1d22, (q15_t)0x1d1c, (q15_t)0x1d15, (q15_t)0x1d0f, (q15_t)0x1d09, (q15_t)0x1d03,
+  (q15_t)0x1cfd, (q15_t)0x1cf7, (q15_t)0x1cf1, (q15_t)0x1ceb, (q15_t)0x1ce4, (q15_t)0x1cde, (q15_t)0x1cd8, (q15_t)0x1cd2,
+  (q15_t)0x1ccc, (q15_t)0x1cc6, (q15_t)0x1cc0, (q15_t)0x1cba, (q15_t)0x1cb3, (q15_t)0x1cad, (q15_t)0x1ca7, (q15_t)0x1ca1,
+  (q15_t)0x1c9b, (q15_t)0x1c95, (q15_t)0x1c8f, (q15_t)0x1c89, (q15_t)0x1c83, (q15_t)0x1c7c, (q15_t)0x1c76, (q15_t)0x1c70,
+  (q15_t)0x1c6a, (q15_t)0x1c64, (q15_t)0x1c5e, (q15_t)0x1c58, (q15_t)0x1c51, (q15_t)0x1c4b, (q15_t)0x1c45, (q15_t)0x1c3f,
+  (q15_t)0x1c39, (q15_t)0x1c33, (q15_t)0x1c2d, (q15_t)0x1c27, (q15_t)0x1c20, (q15_t)0x1c1a, (q15_t)0x1c14, (q15_t)0x1c0e,
+  (q15_t)0x1c08, (q15_t)0x1c02, (q15_t)0x1bfc, (q15_t)0x1bf6, (q15_t)0x1bef, (q15_t)0x1be9, (q15_t)0x1be3, (q15_t)0x1bdd,
+  (q15_t)0x1bd7, (q15_t)0x1bd1, (q15_t)0x1bcb, (q15_t)0x1bc4, (q15_t)0x1bbe, (q15_t)0x1bb8, (q15_t)0x1bb2, (q15_t)0x1bac,
+  (q15_t)0x1ba6, (q15_t)0x1ba0, (q15_t)0x1b9a, (q15_t)0x1b93, (q15_t)0x1b8d, (q15_t)0x1b87, (q15_t)0x1b81, (q15_t)0x1b7b,
+  (q15_t)0x1b75, (q15_t)0x1b6f, (q15_t)0x1b68, (q15_t)0x1b62, (q15_t)0x1b5c, (q15_t)0x1b56, (q15_t)0x1b50, (q15_t)0x1b4a,
+  (q15_t)0x1b44, (q15_t)0x1b3d, (q15_t)0x1b37, (q15_t)0x1b31, (q15_t)0x1b2b, (q15_t)0x1b25, (q15_t)0x1b1f, (q15_t)0x1b19,
+  (q15_t)0x1b13, (q15_t)0x1b0c, (q15_t)0x1b06, (q15_t)0x1b00, (q15_t)0x1afa, (q15_t)0x1af4, (q15_t)0x1aee, (q15_t)0x1ae8,
+  (q15_t)0x1ae1, (q15_t)0x1adb, (q15_t)0x1ad5, (q15_t)0x1acf, (q15_t)0x1ac9, (q15_t)0x1ac3, (q15_t)0x1abd, (q15_t)0x1ab6,
+  (q15_t)0x1ab0, (q15_t)0x1aaa, (q15_t)0x1aa4, (q15_t)0x1a9e, (q15_t)0x1a98, (q15_t)0x1a91, (q15_t)0x1a8b, (q15_t)0x1a85,
+  (q15_t)0x1a7f, (q15_t)0x1a79, (q15_t)0x1a73, (q15_t)0x1a6d, (q15_t)0x1a66, (q15_t)0x1a60, (q15_t)0x1a5a, (q15_t)0x1a54,
+  (q15_t)0x1a4e, (q15_t)0x1a48, (q15_t)0x1a42, (q15_t)0x1a3b, (q15_t)0x1a35, (q15_t)0x1a2f, (q15_t)0x1a29, (q15_t)0x1a23,
+  (q15_t)0x1a1d, (q15_t)0x1a17, (q15_t)0x1a10, (q15_t)0x1a0a, (q15_t)0x1a04, (q15_t)0x19fe, (q15_t)0x19f8, (q15_t)0x19f2,
+  (q15_t)0x19eb, (q15_t)0x19e5, (q15_t)0x19df, (q15_t)0x19d9, (q15_t)0x19d3, (q15_t)0x19cd, (q15_t)0x19c7, (q15_t)0x19c0,
+  (q15_t)0x19ba, (q15_t)0x19b4, (q15_t)0x19ae, (q15_t)0x19a8, (q15_t)0x19a2, (q15_t)0x199b, (q15_t)0x1995, (q15_t)0x198f,
+  (q15_t)0x1989, (q15_t)0x1983, (q15_t)0x197d, (q15_t)0x1977, (q15_t)0x1970, (q15_t)0x196a, (q15_t)0x1964, (q15_t)0x195e,
+  (q15_t)0x1958, (q15_t)0x1952, (q15_t)0x194b, (q15_t)0x1945, (q15_t)0x193f, (q15_t)0x1939, (q15_t)0x1933, (q15_t)0x192d,
+  (q15_t)0x1926, (q15_t)0x1920, (q15_t)0x191a, (q15_t)0x1914, (q15_t)0x190e, (q15_t)0x1908, (q15_t)0x1901, (q15_t)0x18fb,
+  (q15_t)0x18f5, (q15_t)0x18ef, (q15_t)0x18e9, (q15_t)0x18e3, (q15_t)0x18dc, (q15_t)0x18d6, (q15_t)0x18d0, (q15_t)0x18ca,
+  (q15_t)0x18c4, (q15_t)0x18be, (q15_t)0x18b8, (q15_t)0x18b1, (q15_t)0x18ab, (q15_t)0x18a5, (q15_t)0x189f, (q15_t)0x1899,
+  (q15_t)0x1893, (q15_t)0x188c, (q15_t)0x1886, (q15_t)0x1880, (q15_t)0x187a, (q15_t)0x1874, (q15_t)0x186e, (q15_t)0x1867,
+  (q15_t)0x1861, (q15_t)0x185b, (q15_t)0x1855, (q15_t)0x184f, (q15_t)0x1848, (q15_t)0x1842, (q15_t)0x183c, (q15_t)0x1836,
+  (q15_t)0x1830, (q15_t)0x182a, (q15_t)0x1823, (q15_t)0x181d, (q15_t)0x1817, (q15_t)0x1811, (q15_t)0x180b, (q15_t)0x1805,
+  (q15_t)0x17fe, (q15_t)0x17f8, (q15_t)0x17f2, (q15_t)0x17ec, (q15_t)0x17e6, (q15_t)0x17e0, (q15_t)0x17d9, (q15_t)0x17d3,
+  (q15_t)0x17cd, (q15_t)0x17c7, (q15_t)0x17c1, (q15_t)0x17bb, (q15_t)0x17b4, (q15_t)0x17ae, (q15_t)0x17a8, (q15_t)0x17a2,
+  (q15_t)0x179c, (q15_t)0x1795, (q15_t)0x178f, (q15_t)0x1789, (q15_t)0x1783, (q15_t)0x177d, (q15_t)0x1777, (q15_t)0x1770,
+  (q15_t)0x176a, (q15_t)0x1764, (q15_t)0x175e, (q15_t)0x1758, (q15_t)0x1752, (q15_t)0x174b, (q15_t)0x1745, (q15_t)0x173f,
+  (q15_t)0x1739, (q15_t)0x1733, (q15_t)0x172c, (q15_t)0x1726, (q15_t)0x1720, (q15_t)0x171a, (q15_t)0x1714, (q15_t)0x170e,
+  (q15_t)0x1707, (q15_t)0x1701, (q15_t)0x16fb, (q15_t)0x16f5, (q15_t)0x16ef, (q15_t)0x16e8, (q15_t)0x16e2, (q15_t)0x16dc,
+  (q15_t)0x16d6, (q15_t)0x16d0, (q15_t)0x16ca, (q15_t)0x16c3, (q15_t)0x16bd, (q15_t)0x16b7, (q15_t)0x16b1, (q15_t)0x16ab,
+  (q15_t)0x16a4, (q15_t)0x169e, (q15_t)0x1698, (q15_t)0x1692, (q15_t)0x168c, (q15_t)0x1686, (q15_t)0x167f, (q15_t)0x1679,
+  (q15_t)0x1673, (q15_t)0x166d, (q15_t)0x1667, (q15_t)0x1660, (q15_t)0x165a, (q15_t)0x1654, (q15_t)0x164e, (q15_t)0x1648,
+  (q15_t)0x1642, (q15_t)0x163b, (q15_t)0x1635, (q15_t)0x162f, (q15_t)0x1629, (q15_t)0x1623, (q15_t)0x161c, (q15_t)0x1616,
+  (q15_t)0x1610, (q15_t)0x160a, (q15_t)0x1604, (q15_t)0x15fd, (q15_t)0x15f7, (q15_t)0x15f1, (q15_t)0x15eb, (q15_t)0x15e5,
+  (q15_t)0x15de, (q15_t)0x15d8, (q15_t)0x15d2, (q15_t)0x15cc, (q15_t)0x15c6, (q15_t)0x15c0, (q15_t)0x15b9, (q15_t)0x15b3,
+  (q15_t)0x15ad, (q15_t)0x15a7, (q15_t)0x15a1, (q15_t)0x159a, (q15_t)0x1594, (q15_t)0x158e, (q15_t)0x1588, (q15_t)0x1582,
+  (q15_t)0x157b, (q15_t)0x1575, (q15_t)0x156f, (q15_t)0x1569, (q15_t)0x1563, (q15_t)0x155c, (q15_t)0x1556, (q15_t)0x1550,
+  (q15_t)0x154a, (q15_t)0x1544, (q15_t)0x153d, (q15_t)0x1537, (q15_t)0x1531, (q15_t)0x152b, (q15_t)0x1525, (q15_t)0x151e,
+  (q15_t)0x1518, (q15_t)0x1512, (q15_t)0x150c, (q15_t)0x1506, (q15_t)0x14ff, (q15_t)0x14f9, (q15_t)0x14f3, (q15_t)0x14ed,
+  (q15_t)0x14e7, (q15_t)0x14e0, (q15_t)0x14da, (q15_t)0x14d4, (q15_t)0x14ce, (q15_t)0x14c8, (q15_t)0x14c1, (q15_t)0x14bb,
+  (q15_t)0x14b5, (q15_t)0x14af, (q15_t)0x14a9, (q15_t)0x14a2, (q15_t)0x149c, (q15_t)0x1496, (q15_t)0x1490, (q15_t)0x148a,
+  (q15_t)0x1483, (q15_t)0x147d, (q15_t)0x1477, (q15_t)0x1471, (q15_t)0x146b, (q15_t)0x1464, (q15_t)0x145e, (q15_t)0x1458,
+  (q15_t)0x1452, (q15_t)0x144c, (q15_t)0x1445, (q15_t)0x143f, (q15_t)0x1439, (q15_t)0x1433, (q15_t)0x142d, (q15_t)0x1426,
+  (q15_t)0x1420, (q15_t)0x141a, (q15_t)0x1414, (q15_t)0x140e, (q15_t)0x1407, (q15_t)0x1401, (q15_t)0x13fb, (q15_t)0x13f5,
+  (q15_t)0x13ef, (q15_t)0x13e8, (q15_t)0x13e2, (q15_t)0x13dc, (q15_t)0x13d6, (q15_t)0x13d0, (q15_t)0x13c9, (q15_t)0x13c3,
+  (q15_t)0x13bd, (q15_t)0x13b7, (q15_t)0x13b1, (q15_t)0x13aa, (q15_t)0x13a4, (q15_t)0x139e, (q15_t)0x1398, (q15_t)0x1391,
+  (q15_t)0x138b, (q15_t)0x1385, (q15_t)0x137f, (q15_t)0x1379, (q15_t)0x1372, (q15_t)0x136c, (q15_t)0x1366, (q15_t)0x1360,
+  (q15_t)0x135a, (q15_t)0x1353, (q15_t)0x134d, (q15_t)0x1347, (q15_t)0x1341, (q15_t)0x133b, (q15_t)0x1334, (q15_t)0x132e,
+  (q15_t)0x1328, (q15_t)0x1322, (q15_t)0x131b, (q15_t)0x1315, (q15_t)0x130f, (q15_t)0x1309, (q15_t)0x1303, (q15_t)0x12fc,
+  (q15_t)0x12f6, (q15_t)0x12f0, (q15_t)0x12ea, (q15_t)0x12e4, (q15_t)0x12dd, (q15_t)0x12d7, (q15_t)0x12d1, (q15_t)0x12cb,
+  (q15_t)0x12c4, (q15_t)0x12be, (q15_t)0x12b8, (q15_t)0x12b2, (q15_t)0x12ac, (q15_t)0x12a5, (q15_t)0x129f, (q15_t)0x1299,
+  (q15_t)0x1293, (q15_t)0x128d, (q15_t)0x1286, (q15_t)0x1280, (q15_t)0x127a, (q15_t)0x1274, (q15_t)0x126d, (q15_t)0x1267,
+  (q15_t)0x1261, (q15_t)0x125b, (q15_t)0x1255, (q15_t)0x124e, (q15_t)0x1248, (q15_t)0x1242, (q15_t)0x123c, (q15_t)0x1235,
+  (q15_t)0x122f, (q15_t)0x1229, (q15_t)0x1223, (q15_t)0x121d, (q15_t)0x1216, (q15_t)0x1210, (q15_t)0x120a, (q15_t)0x1204,
+  (q15_t)0x11fd, (q15_t)0x11f7, (q15_t)0x11f1, (q15_t)0x11eb, (q15_t)0x11e5, (q15_t)0x11de, (q15_t)0x11d8, (q15_t)0x11d2,
+  (q15_t)0x11cc, (q15_t)0x11c5, (q15_t)0x11bf, (q15_t)0x11b9, (q15_t)0x11b3, (q15_t)0x11ad, (q15_t)0x11a6, (q15_t)0x11a0,
+  (q15_t)0x119a, (q15_t)0x1194, (q15_t)0x118d, (q15_t)0x1187, (q15_t)0x1181, (q15_t)0x117b, (q15_t)0x1175, (q15_t)0x116e,
+  (q15_t)0x1168, (q15_t)0x1162, (q15_t)0x115c, (q15_t)0x1155, (q15_t)0x114f, (q15_t)0x1149, (q15_t)0x1143, (q15_t)0x113d,
+  (q15_t)0x1136, (q15_t)0x1130, (q15_t)0x112a, (q15_t)0x1124, (q15_t)0x111d, (q15_t)0x1117, (q15_t)0x1111, (q15_t)0x110b,
+  (q15_t)0x1105, (q15_t)0x10fe, (q15_t)0x10f8, (q15_t)0x10f2, (q15_t)0x10ec, (q15_t)0x10e5, (q15_t)0x10df, (q15_t)0x10d9,
+  (q15_t)0x10d3, (q15_t)0x10cc, (q15_t)0x10c6, (q15_t)0x10c0, (q15_t)0x10ba, (q15_t)0x10b4, (q15_t)0x10ad, (q15_t)0x10a7,
+  (q15_t)0x10a1, (q15_t)0x109b, (q15_t)0x1094, (q15_t)0x108e, (q15_t)0x1088, (q15_t)0x1082, (q15_t)0x107b, (q15_t)0x1075,
+  (q15_t)0x106f, (q15_t)0x1069, (q15_t)0x1063, (q15_t)0x105c, (q15_t)0x1056, (q15_t)0x1050, (q15_t)0x104a, (q15_t)0x1043,
+  (q15_t)0x103d, (q15_t)0x1037, (q15_t)0x1031, (q15_t)0x102a, (q15_t)0x1024, (q15_t)0x101e, (q15_t)0x1018, (q15_t)0x1012,
+  (q15_t)0x100b, (q15_t)0x1005, (q15_t)0xfff, (q15_t)0xff9, (q15_t)0xff2, (q15_t)0xfec, (q15_t)0xfe6, (q15_t)0xfe0,
+  (q15_t)0xfd9, (q15_t)0xfd3, (q15_t)0xfcd, (q15_t)0xfc7, (q15_t)0xfc0, (q15_t)0xfba, (q15_t)0xfb4, (q15_t)0xfae,
+  (q15_t)0xfa8, (q15_t)0xfa1, (q15_t)0xf9b, (q15_t)0xf95, (q15_t)0xf8f, (q15_t)0xf88, (q15_t)0xf82, (q15_t)0xf7c,
+  (q15_t)0xf76, (q15_t)0xf6f, (q15_t)0xf69, (q15_t)0xf63, (q15_t)0xf5d, (q15_t)0xf56, (q15_t)0xf50, (q15_t)0xf4a,
+  (q15_t)0xf44, (q15_t)0xf3e, (q15_t)0xf37, (q15_t)0xf31, (q15_t)0xf2b, (q15_t)0xf25, (q15_t)0xf1e, (q15_t)0xf18,
+  (q15_t)0xf12, (q15_t)0xf0c, (q15_t)0xf05, (q15_t)0xeff, (q15_t)0xef9, (q15_t)0xef3, (q15_t)0xeec, (q15_t)0xee6,
+  (q15_t)0xee0, (q15_t)0xeda, (q15_t)0xed3, (q15_t)0xecd, (q15_t)0xec7, (q15_t)0xec1, (q15_t)0xeba, (q15_t)0xeb4,
+  (q15_t)0xeae, (q15_t)0xea8, (q15_t)0xea1, (q15_t)0xe9b, (q15_t)0xe95, (q15_t)0xe8f, (q15_t)0xe89, (q15_t)0xe82,
+  (q15_t)0xe7c, (q15_t)0xe76, (q15_t)0xe70, (q15_t)0xe69, (q15_t)0xe63, (q15_t)0xe5d, (q15_t)0xe57, (q15_t)0xe50,
+  (q15_t)0xe4a, (q15_t)0xe44, (q15_t)0xe3e, (q15_t)0xe37, (q15_t)0xe31, (q15_t)0xe2b, (q15_t)0xe25, (q15_t)0xe1e,
+  (q15_t)0xe18, (q15_t)0xe12, (q15_t)0xe0c, (q15_t)0xe05, (q15_t)0xdff, (q15_t)0xdf9, (q15_t)0xdf3, (q15_t)0xdec,
+  (q15_t)0xde6, (q15_t)0xde0, (q15_t)0xdda, (q15_t)0xdd3, (q15_t)0xdcd, (q15_t)0xdc7, (q15_t)0xdc1, (q15_t)0xdba,
+  (q15_t)0xdb4, (q15_t)0xdae, (q15_t)0xda8, (q15_t)0xda1, (q15_t)0xd9b, (q15_t)0xd95, (q15_t)0xd8f, (q15_t)0xd88,
+  (q15_t)0xd82, (q15_t)0xd7c, (q15_t)0xd76, (q15_t)0xd6f, (q15_t)0xd69, (q15_t)0xd63, (q15_t)0xd5d, (q15_t)0xd56,
+  (q15_t)0xd50, (q15_t)0xd4a, (q15_t)0xd44, (q15_t)0xd3d, (q15_t)0xd37, (q15_t)0xd31, (q15_t)0xd2b, (q15_t)0xd24,
+  (q15_t)0xd1e, (q15_t)0xd18, (q15_t)0xd12, (q15_t)0xd0b, (q15_t)0xd05, (q15_t)0xcff, (q15_t)0xcf9, (q15_t)0xcf2,
+  (q15_t)0xcec, (q15_t)0xce6, (q15_t)0xce0, (q15_t)0xcd9, (q15_t)0xcd3, (q15_t)0xccd, (q15_t)0xcc7, (q15_t)0xcc0,
+  (q15_t)0xcba, (q15_t)0xcb4, (q15_t)0xcae, (q15_t)0xca7, (q15_t)0xca1, (q15_t)0xc9b, (q15_t)0xc95, (q15_t)0xc8e,
+  (q15_t)0xc88, (q15_t)0xc82, (q15_t)0xc7c, (q15_t)0xc75, (q15_t)0xc6f, (q15_t)0xc69, (q15_t)0xc63, (q15_t)0xc5c,
+  (q15_t)0xc56, (q15_t)0xc50, (q15_t)0xc4a, (q15_t)0xc43, (q15_t)0xc3d, (q15_t)0xc37, (q15_t)0xc31, (q15_t)0xc2a,
+  (q15_t)0xc24, (q15_t)0xc1e, (q15_t)0xc18, (q15_t)0xc11, (q15_t)0xc0b, (q15_t)0xc05, (q15_t)0xbff, (q15_t)0xbf8,
+  (q15_t)0xbf2, (q15_t)0xbec, (q15_t)0xbe6, (q15_t)0xbdf, (q15_t)0xbd9, (q15_t)0xbd3, (q15_t)0xbcd, (q15_t)0xbc6,
+  (q15_t)0xbc0, (q15_t)0xbba, (q15_t)0xbb4, (q15_t)0xbad, (q15_t)0xba7, (q15_t)0xba1, (q15_t)0xb9b, (q15_t)0xb94,
+  (q15_t)0xb8e, (q15_t)0xb88, (q15_t)0xb81, (q15_t)0xb7b, (q15_t)0xb75, (q15_t)0xb6f, (q15_t)0xb68, (q15_t)0xb62,
+  (q15_t)0xb5c, (q15_t)0xb56, (q15_t)0xb4f, (q15_t)0xb49, (q15_t)0xb43, (q15_t)0xb3d, (q15_t)0xb36, (q15_t)0xb30,
+  (q15_t)0xb2a, (q15_t)0xb24, (q15_t)0xb1d, (q15_t)0xb17, (q15_t)0xb11, (q15_t)0xb0b, (q15_t)0xb04, (q15_t)0xafe,
+  (q15_t)0xaf8, (q15_t)0xaf2, (q15_t)0xaeb, (q15_t)0xae5, (q15_t)0xadf, (q15_t)0xad8, (q15_t)0xad2, (q15_t)0xacc,
+  (q15_t)0xac6, (q15_t)0xabf, (q15_t)0xab9, (q15_t)0xab3, (q15_t)0xaad, (q15_t)0xaa6, (q15_t)0xaa0, (q15_t)0xa9a,
+  (q15_t)0xa94, (q15_t)0xa8d, (q15_t)0xa87, (q15_t)0xa81, (q15_t)0xa7b, (q15_t)0xa74, (q15_t)0xa6e, (q15_t)0xa68,
+  (q15_t)0xa62, (q15_t)0xa5b, (q15_t)0xa55, (q15_t)0xa4f, (q15_t)0xa48, (q15_t)0xa42, (q15_t)0xa3c, (q15_t)0xa36,
+  (q15_t)0xa2f, (q15_t)0xa29, (q15_t)0xa23, (q15_t)0xa1d, (q15_t)0xa16, (q15_t)0xa10, (q15_t)0xa0a, (q15_t)0xa04,
+  (q15_t)0x9fd, (q15_t)0x9f7, (q15_t)0x9f1, (q15_t)0x9eb, (q15_t)0x9e4, (q15_t)0x9de, (q15_t)0x9d8, (q15_t)0x9d1,
+  (q15_t)0x9cb, (q15_t)0x9c5, (q15_t)0x9bf, (q15_t)0x9b8, (q15_t)0x9b2, (q15_t)0x9ac, (q15_t)0x9a6, (q15_t)0x99f,
+  (q15_t)0x999, (q15_t)0x993, (q15_t)0x98d, (q15_t)0x986, (q15_t)0x980, (q15_t)0x97a, (q15_t)0x973, (q15_t)0x96d,
+  (q15_t)0x967, (q15_t)0x961, (q15_t)0x95a, (q15_t)0x954, (q15_t)0x94e, (q15_t)0x948, (q15_t)0x941, (q15_t)0x93b,
+  (q15_t)0x935, (q15_t)0x92f, (q15_t)0x928, (q15_t)0x922, (q15_t)0x91c, (q15_t)0x915, (q15_t)0x90f, (q15_t)0x909,
+  (q15_t)0x903, (q15_t)0x8fc, (q15_t)0x8f6, (q15_t)0x8f0, (q15_t)0x8ea, (q15_t)0x8e3, (q15_t)0x8dd, (q15_t)0x8d7,
+  (q15_t)0x8d1, (q15_t)0x8ca, (q15_t)0x8c4, (q15_t)0x8be, (q15_t)0x8b7, (q15_t)0x8b1, (q15_t)0x8ab, (q15_t)0x8a5,
+  (q15_t)0x89e, (q15_t)0x898, (q15_t)0x892, (q15_t)0x88c, (q15_t)0x885, (q15_t)0x87f, (q15_t)0x879, (q15_t)0x872,
+  (q15_t)0x86c, (q15_t)0x866, (q15_t)0x860, (q15_t)0x859, (q15_t)0x853, (q15_t)0x84d, (q15_t)0x847, (q15_t)0x840,
+  (q15_t)0x83a, (q15_t)0x834, (q15_t)0x82e, (q15_t)0x827, (q15_t)0x821, (q15_t)0x81b, (q15_t)0x814, (q15_t)0x80e,
+  (q15_t)0x808, (q15_t)0x802, (q15_t)0x7fb, (q15_t)0x7f5, (q15_t)0x7ef, (q15_t)0x7e9, (q15_t)0x7e2, (q15_t)0x7dc,
+  (q15_t)0x7d6, (q15_t)0x7cf, (q15_t)0x7c9, (q15_t)0x7c3, (q15_t)0x7bd, (q15_t)0x7b6, (q15_t)0x7b0, (q15_t)0x7aa,
+  (q15_t)0x7a4, (q15_t)0x79d, (q15_t)0x797, (q15_t)0x791, (q15_t)0x78a, (q15_t)0x784, (q15_t)0x77e, (q15_t)0x778,
+  (q15_t)0x771, (q15_t)0x76b, (q15_t)0x765, (q15_t)0x75f, (q15_t)0x758, (q15_t)0x752, (q15_t)0x74c, (q15_t)0x745,
+  (q15_t)0x73f, (q15_t)0x739, (q15_t)0x733, (q15_t)0x72c, (q15_t)0x726, (q15_t)0x720, (q15_t)0x71a, (q15_t)0x713,
+  (q15_t)0x70d, (q15_t)0x707, (q15_t)0x700, (q15_t)0x6fa, (q15_t)0x6f4, (q15_t)0x6ee, (q15_t)0x6e7, (q15_t)0x6e1,
+  (q15_t)0x6db, (q15_t)0x6d5, (q15_t)0x6ce, (q15_t)0x6c8, (q15_t)0x6c2, (q15_t)0x6bb, (q15_t)0x6b5, (q15_t)0x6af,
+  (q15_t)0x6a9, (q15_t)0x6a2, (q15_t)0x69c, (q15_t)0x696, (q15_t)0x690, (q15_t)0x689, (q15_t)0x683, (q15_t)0x67d,
+  (q15_t)0x676, (q15_t)0x670, (q15_t)0x66a, (q15_t)0x664, (q15_t)0x65d, (q15_t)0x657, (q15_t)0x651, (q15_t)0x64a,
+  (q15_t)0x644, (q15_t)0x63e, (q15_t)0x638, (q15_t)0x631, (q15_t)0x62b, (q15_t)0x625, (q15_t)0x61f, (q15_t)0x618,
+  (q15_t)0x612, (q15_t)0x60c, (q15_t)0x605, (q15_t)0x5ff, (q15_t)0x5f9, (q15_t)0x5f3, (q15_t)0x5ec, (q15_t)0x5e6,
+  (q15_t)0x5e0, (q15_t)0x5da, (q15_t)0x5d3, (q15_t)0x5cd, (q15_t)0x5c7, (q15_t)0x5c0, (q15_t)0x5ba, (q15_t)0x5b4,
+  (q15_t)0x5ae, (q15_t)0x5a7, (q15_t)0x5a1, (q15_t)0x59b, (q15_t)0x594, (q15_t)0x58e, (q15_t)0x588, (q15_t)0x582,
+  (q15_t)0x57b, (q15_t)0x575, (q15_t)0x56f, (q15_t)0x569, (q15_t)0x562, (q15_t)0x55c, (q15_t)0x556, (q15_t)0x54f,
+  (q15_t)0x549, (q15_t)0x543, (q15_t)0x53d, (q15_t)0x536, (q15_t)0x530, (q15_t)0x52a, (q15_t)0x523, (q15_t)0x51d,
+  (q15_t)0x517, (q15_t)0x511, (q15_t)0x50a, (q15_t)0x504, (q15_t)0x4fe, (q15_t)0x4f8, (q15_t)0x4f1, (q15_t)0x4eb,
+  (q15_t)0x4e5, (q15_t)0x4de, (q15_t)0x4d8, (q15_t)0x4d2, (q15_t)0x4cc, (q15_t)0x4c5, (q15_t)0x4bf, (q15_t)0x4b9,
+  (q15_t)0x4b2, (q15_t)0x4ac, (q15_t)0x4a6, (q15_t)0x4a0, (q15_t)0x499, (q15_t)0x493, (q15_t)0x48d, (q15_t)0x487,
+  (q15_t)0x480, (q15_t)0x47a, (q15_t)0x474, (q15_t)0x46d, (q15_t)0x467, (q15_t)0x461, (q15_t)0x45b, (q15_t)0x454,
+  (q15_t)0x44e, (q15_t)0x448, (q15_t)0x441, (q15_t)0x43b, (q15_t)0x435, (q15_t)0x42f, (q15_t)0x428, (q15_t)0x422,
+  (q15_t)0x41c, (q15_t)0x415, (q15_t)0x40f, (q15_t)0x409, (q15_t)0x403, (q15_t)0x3fc, (q15_t)0x3f6, (q15_t)0x3f0,
+  (q15_t)0x3ea, (q15_t)0x3e3, (q15_t)0x3dd, (q15_t)0x3d7, (q15_t)0x3d0, (q15_t)0x3ca, (q15_t)0x3c4, (q15_t)0x3be,
+  (q15_t)0x3b7, (q15_t)0x3b1, (q15_t)0x3ab, (q15_t)0x3a4, (q15_t)0x39e, (q15_t)0x398, (q15_t)0x392, (q15_t)0x38b,
+  (q15_t)0x385, (q15_t)0x37f, (q15_t)0x378, (q15_t)0x372, (q15_t)0x36c, (q15_t)0x366, (q15_t)0x35f, (q15_t)0x359,
+  (q15_t)0x353, (q15_t)0x34c, (q15_t)0x346, (q15_t)0x340, (q15_t)0x33a, (q15_t)0x333, (q15_t)0x32d, (q15_t)0x327,
+  (q15_t)0x321, (q15_t)0x31a, (q15_t)0x314, (q15_t)0x30e, (q15_t)0x307, (q15_t)0x301, (q15_t)0x2fb, (q15_t)0x2f5,
+  (q15_t)0x2ee, (q15_t)0x2e8, (q15_t)0x2e2, (q15_t)0x2db, (q15_t)0x2d5, (q15_t)0x2cf, (q15_t)0x2c9, (q15_t)0x2c2,
+  (q15_t)0x2bc, (q15_t)0x2b6, (q15_t)0x2af, (q15_t)0x2a9, (q15_t)0x2a3, (q15_t)0x29d, (q15_t)0x296, (q15_t)0x290,
+  (q15_t)0x28a, (q15_t)0x283, (q15_t)0x27d, (q15_t)0x277, (q15_t)0x271, (q15_t)0x26a, (q15_t)0x264, (q15_t)0x25e,
+  (q15_t)0x258, (q15_t)0x251, (q15_t)0x24b, (q15_t)0x245, (q15_t)0x23e, (q15_t)0x238, (q15_t)0x232, (q15_t)0x22c,
+  (q15_t)0x225, (q15_t)0x21f, (q15_t)0x219, (q15_t)0x212, (q15_t)0x20c, (q15_t)0x206, (q15_t)0x200, (q15_t)0x1f9,
+  (q15_t)0x1f3, (q15_t)0x1ed, (q15_t)0x1e6, (q15_t)0x1e0, (q15_t)0x1da, (q15_t)0x1d4, (q15_t)0x1cd, (q15_t)0x1c7,
+  (q15_t)0x1c1, (q15_t)0x1ba, (q15_t)0x1b4, (q15_t)0x1ae, (q15_t)0x1a8, (q15_t)0x1a1, (q15_t)0x19b, (q15_t)0x195,
+  (q15_t)0x18e, (q15_t)0x188, (q15_t)0x182, (q15_t)0x17c, (q15_t)0x175, (q15_t)0x16f, (q15_t)0x169, (q15_t)0x162,
+  (q15_t)0x15c, (q15_t)0x156, (q15_t)0x150, (q15_t)0x149, (q15_t)0x143, (q15_t)0x13d, (q15_t)0x137, (q15_t)0x130,
+  (q15_t)0x12a, (q15_t)0x124, (q15_t)0x11d, (q15_t)0x117, (q15_t)0x111, (q15_t)0x10b, (q15_t)0x104, (q15_t)0xfe,
+  (q15_t)0xf8, (q15_t)0xf1, (q15_t)0xeb, (q15_t)0xe5, (q15_t)0xdf, (q15_t)0xd8, (q15_t)0xd2, (q15_t)0xcc,
+  (q15_t)0xc5, (q15_t)0xbf, (q15_t)0xb9, (q15_t)0xb3, (q15_t)0xac, (q15_t)0xa6, (q15_t)0xa0, (q15_t)0x99,
+  (q15_t)0x93, (q15_t)0x8d, (q15_t)0x87, (q15_t)0x80, (q15_t)0x7a, (q15_t)0x74, (q15_t)0x6d, (q15_t)0x67,
+  (q15_t)0x61, (q15_t)0x5b, (q15_t)0x54, (q15_t)0x4e, (q15_t)0x48, (q15_t)0x41, (q15_t)0x3b, (q15_t)0x35,
+  (q15_t)0x2f, (q15_t)0x28, (q15_t)0x22, (q15_t)0x1c, (q15_t)0x15, (q15_t)0xf, (q15_t)0x9, (q15_t)0x3
+};
+  #endif
+
+/**
+  @par
+  Weights tables are generated using the formula : <pre>weights[n] = e^(-j*n*pi/(2*N))</pre>
+  @par
+  C command to generate the table
+  <pre>
+  for (i = 0; i< N; i++)
+  {
+    weights[(2*i)]   =  cos(i*c);
+    weights[(2*i)+1] = -sin(i*c);
+  } </pre>
+  @par
+  where <code>N</code> is the Number of weights to be calculated and <code>c</code> is <code>pi/(2*N)</code>
+  @par
+  Convert the output to q31 format by multiplying with 2^31 and saturated if required.
+  @par
+  In the tables below the real and imaginary values are placed alternatively, hence the
+  array length is <code>2*N</code>.
+ */
+
+/**
+  @par
+  cosFactor tables are generated using the formula : <pre>cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))</pre>
+  @par
+  C command to generate the table
+  <pre>
+  for (i = 0; i< N; i++)
+  {
+    cos_factors[i] = 2 * cos((2*i+1)*c/2);
+  } </pre>
+  @par
+  where <code>N</code> is the number of factors to generate and <code>c</code> is <code>pi/(2*N)</code>
+  @par
+  Then converted to q31 format by multiplying with 2^31 and saturated if required.
+*/
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_128)  
+    const q31_t WeightsQ31_128[256] = {
+  (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3,
+  (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7f872bf3, (q31_t)0xf50497fb,
+  (q31_t)0x7f62368f, (q31_t)0xf3742ca2, (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c, (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31,
+  (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e5fe493, (q31_t)0xebaa894f, (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7dd6668f, (q31_t)0xe8922622,
+  (q31_t)0x7d8a5f40, (q31_t)0xe70747c4, (q31_t)0x7d3980ec, (q31_t)0xe57d5fda, (q31_t)0x7ce3ceb2, (q31_t)0xe3f47d96, (q31_t)0x7c894bde, (q31_t)0xe26cb01b,
+  (q31_t)0x7c29fbee, (q31_t)0xe0e60685, (q31_t)0x7bc5e290, (q31_t)0xdf608fe4, (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7aef6323, (q31_t)0xdc597781,
+  (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a05eead, (q31_t)0xd957de7a, (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x7909a92d, (q31_t)0xd65c3b7b,
+  (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x77fab989, (q31_t)0xd3670446, (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x76d94989, (q31_t)0xd078ad9e,
+  (q31_t)0x7641af3d, (q31_t)0xcf043ab3, (q31_t)0x75a585cf, (q31_t)0xcd91ab39, (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x745f9dd1, (q31_t)0xcab26fa9,
+  (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x7307c3d0, (q31_t)0xc7db6c50, (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x719e2cd2, (q31_t)0xc50d1149,
+  (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3,
+  (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6cf934fc, (q31_t)0xbcda3ecb, (q31_t)0x6c242960, (q31_t)0xbb8532b0, (q31_t)0x6b4af279, (q31_t)0xba32ca71,
+  (q31_t)0x6a6d98a4, (q31_t)0xb8e31319, (q31_t)0x698c246c, (q31_t)0xb796199b, (q31_t)0x68a69e81, (q31_t)0xb64beacd, (q31_t)0x67bd0fbd, (q31_t)0xb5049368,
+  (q31_t)0x66cf8120, (q31_t)0xb3c0200c, (q31_t)0x65ddfbd3, (q31_t)0xb27e9d3c, (q31_t)0x64e88926, (q31_t)0xb140175b, (q31_t)0x63ef3290, (q31_t)0xb0049ab3,
+  (q31_t)0x62f201ac, (q31_t)0xaecc336c, (q31_t)0x61f1003f, (q31_t)0xad96ed92, (q31_t)0x60ec3830, (q31_t)0xac64d510, (q31_t)0x5fe3b38d, (q31_t)0xab35f5b5,
+  (q31_t)0x5ed77c8a, (q31_t)0xaa0a5b2e, (q31_t)0x5dc79d7c, (q31_t)0xa8e21106, (q31_t)0x5cb420e0, (q31_t)0xa7bd22ac, (q31_t)0x5b9d1154, (q31_t)0xa69b9b68,
+  (q31_t)0x5a82799a, (q31_t)0xa57d8666, (q31_t)0x59646498, (q31_t)0xa462eeac, (q31_t)0x5842dd54, (q31_t)0xa34bdf20, (q31_t)0x571deefa, (q31_t)0xa2386284,
+  (q31_t)0x55f5a4d2, (q31_t)0xa1288376, (q31_t)0x54ca0a4b, (q31_t)0xa01c4c73, (q31_t)0x539b2af0, (q31_t)0x9f13c7d0, (q31_t)0x5269126e, (q31_t)0x9e0effc1,
+  (q31_t)0x5133cc94, (q31_t)0x9d0dfe54, (q31_t)0x4ffb654d, (q31_t)0x9c10cd70, (q31_t)0x4ebfe8a5, (q31_t)0x9b1776da, (q31_t)0x4d8162c4, (q31_t)0x9a22042d,
+  (q31_t)0x4c3fdff4, (q31_t)0x99307ee0, (q31_t)0x4afb6c98, (q31_t)0x9842f043, (q31_t)0x49b41533, (q31_t)0x9759617f, (q31_t)0x4869e665, (q31_t)0x9673db94,
+  (q31_t)0x471cece7, (q31_t)0x9592675c, (q31_t)0x45cd358f, (q31_t)0x94b50d87, (q31_t)0x447acd50, (q31_t)0x93dbd6a0, (q31_t)0x4325c135, (q31_t)0x9306cb04,
+  (q31_t)0x41ce1e65, (q31_t)0x9235f2ec, (q31_t)0x4073f21d, (q31_t)0x91695663, (q31_t)0x3f1749b8, (q31_t)0x90a0fd4e, (q31_t)0x3db832a6, (q31_t)0x8fdcef66,
+  (q31_t)0x3c56ba70, (q31_t)0x8f1d343a, (q31_t)0x3af2eeb7, (q31_t)0x8e61d32e, (q31_t)0x398cdd32, (q31_t)0x8daad37b, (q31_t)0x382493b0, (q31_t)0x8cf83c30,
+  (q31_t)0x36ba2014, (q31_t)0x8c4a142f, (q31_t)0x354d9057, (q31_t)0x8ba0622f, (q31_t)0x33def287, (q31_t)0x8afb2cbb, (q31_t)0x326e54c7, (q31_t)0x8a5a7a31,
+  (q31_t)0x30fbc54d, (q31_t)0x89be50c3, (q31_t)0x2f875262, (q31_t)0x8926b677, (q31_t)0x2e110a62, (q31_t)0x8893b125, (q31_t)0x2c98fbba, (q31_t)0x88054677,
+  (q31_t)0x2b1f34eb, (q31_t)0x877b7bec, (q31_t)0x29a3c485, (q31_t)0x86f656d3, (q31_t)0x2826b928, (q31_t)0x8675dc4f, (q31_t)0x26a82186, (q31_t)0x85fa1153,
+  (q31_t)0x25280c5e, (q31_t)0x8582faa5, (q31_t)0x23a6887f, (q31_t)0x85109cdd, (q31_t)0x2223a4c5, (q31_t)0x84a2fc62, (q31_t)0x209f701c, (q31_t)0x843a1d70,
+  (q31_t)0x1f19f97b, (q31_t)0x83d60412, (q31_t)0x1d934fe5, (q31_t)0x8376b422, (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1a82a026, (q31_t)0x82c67f14,
+  (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x145576b1, (q31_t)0x81a01b6d,
+  (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x0fab272b, (q31_t)0x80f66e3c, (q31_t)0x0e1bc2e4, (q31_t)0x80c7a80a,
+  (q31_t)0x0c8bd35e, (q31_t)0x809dc971, (q31_t)0x0afb6805, (q31_t)0x8078d40d, (q31_t)0x096a9049, (q31_t)0x8058c94c, (q31_t)0x07d95b9e, (q31_t)0x803daa6a,
+  (q31_t)0x0647d97c, (q31_t)0x80277872, (q31_t)0x04b6195d, (q31_t)0x80163440, (q31_t)0x03242abf, (q31_t)0x8009de7e, (q31_t)0x01921d20, (q31_t)0x800277a6
+};
+    const q31_t cos_factorsQ31_128[128] = {
+  (q31_t)0x7fff6216, (q31_t)0x7ffa72d1, (q31_t)0x7ff09478, (q31_t)0x7fe1c76b, (q31_t)0x7fce0c3e, (q31_t)0x7fb563b3,
+  (q31_t)0x7f97cebd, (q31_t)0x7f754e80,
+  (q31_t)0x7f4de451, (q31_t)0x7f2191b4, (q31_t)0x7ef05860, (q31_t)0x7eba3a39, (q31_t)0x7e7f3957, (q31_t)0x7e3f57ff,
+  (q31_t)0x7dfa98a8, (q31_t)0x7db0fdf8,
+  (q31_t)0x7d628ac6, (q31_t)0x7d0f4218, (q31_t)0x7cb72724, (q31_t)0x7c5a3d50, (q31_t)0x7bf88830, (q31_t)0x7b920b89,
+  (q31_t)0x7b26cb4f, (q31_t)0x7ab6cba4,
+  (q31_t)0x7a4210d8, (q31_t)0x79c89f6e, (q31_t)0x794a7c12, (q31_t)0x78c7aba2, (q31_t)0x78403329, (q31_t)0x77b417df,
+  (q31_t)0x77235f2d, (q31_t)0x768e0ea6,
+  (q31_t)0x75f42c0b, (q31_t)0x7555bd4c, (q31_t)0x74b2c884, (q31_t)0x740b53fb, (q31_t)0x735f6626, (q31_t)0x72af05a7,
+  (q31_t)0x71fa3949, (q31_t)0x71410805,
+  (q31_t)0x708378ff, (q31_t)0x6fc19385, (q31_t)0x6efb5f12, (q31_t)0x6e30e34a, (q31_t)0x6d6227fa, (q31_t)0x6c8f351c,
+  (q31_t)0x6bb812d1, (q31_t)0x6adcc964,
+  (q31_t)0x69fd614a, (q31_t)0x6919e320, (q31_t)0x683257ab, (q31_t)0x6746c7d8, (q31_t)0x66573cbb, (q31_t)0x6563bf92,
+  (q31_t)0x646c59bf, (q31_t)0x637114cc,
+  (q31_t)0x6271fa69, (q31_t)0x616f146c, (q31_t)0x60686ccf, (q31_t)0x5f5e0db3, (q31_t)0x5e50015d, (q31_t)0x5d3e5237,
+  (q31_t)0x5c290acc, (q31_t)0x5b1035cf,
+  (q31_t)0x59f3de12, (q31_t)0x58d40e8c, (q31_t)0x57b0d256, (q31_t)0x568a34a9, (q31_t)0x556040e2, (q31_t)0x5433027d,
+  (q31_t)0x53028518, (q31_t)0x51ced46e,
+  (q31_t)0x5097fc5e, (q31_t)0x4f5e08e3, (q31_t)0x4e210617, (q31_t)0x4ce10034, (q31_t)0x4b9e0390, (q31_t)0x4a581c9e,
+  (q31_t)0x490f57ee, (q31_t)0x47c3c22f,
+  (q31_t)0x46756828, (q31_t)0x452456bd, (q31_t)0x43d09aed, (q31_t)0x427a41d0, (q31_t)0x4121589b, (q31_t)0x3fc5ec98,
+  (q31_t)0x3e680b2c, (q31_t)0x3d07c1d6,
+  (q31_t)0x3ba51e29, (q31_t)0x3a402dd2, (q31_t)0x38d8fe93, (q31_t)0x376f9e46, (q31_t)0x36041ad9, (q31_t)0x34968250,
+  (q31_t)0x3326e2c3, (q31_t)0x31b54a5e,
+  (q31_t)0x3041c761, (q31_t)0x2ecc681e, (q31_t)0x2d553afc, (q31_t)0x2bdc4e6f, (q31_t)0x2a61b101, (q31_t)0x28e5714b,
+  (q31_t)0x27679df4, (q31_t)0x25e845b6,
+  (q31_t)0x24677758, (q31_t)0x22e541af, (q31_t)0x2161b3a0, (q31_t)0x1fdcdc1b, (q31_t)0x1e56ca1e, (q31_t)0x1ccf8cb3,
+  (q31_t)0x1b4732ef, (q31_t)0x19bdcbf3,
+  (q31_t)0x183366e9, (q31_t)0x16a81305, (q31_t)0x151bdf86, (q31_t)0x138edbb1, (q31_t)0x120116d5, (q31_t)0x1072a048,
+  (q31_t)0xee38766, (q31_t)0xd53db92,
+  (q31_t)0xbc3ac35, (q31_t)0xa3308bd, (q31_t)0x8a2009a, (q31_t)0x710a345, (q31_t)0x57f0035, (q31_t)0x3ed26e6, (q31_t)0x25b26d7,
+  (q31_t)0xc90f88
+};
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_512) 
+    const q31_t WeightsQ31_512[1024] = {
+  (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7fffd886, (q31_t)0xff9b781d, (q31_t)0x7fff6216, (q31_t)0xff36f078, (q31_t)0x7ffe9cb2, (q31_t)0xfed2694f,
+  (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ffc250f, (q31_t)0xfe095d69, (q31_t)0x7ffa72d1, (q31_t)0xfda4d929, (q31_t)0x7ff871a2, (q31_t)0xfd40565c,
+  (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7ff38274, (q31_t)0xfc775616, (q31_t)0x7ff09478, (q31_t)0xfc12d91a, (q31_t)0x7fed5791, (q31_t)0xfbae5e89,
+  (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3, (q31_t)0x7fe5f108, (q31_t)0xfae571a4, (q31_t)0x7fe1c76b, (q31_t)0xfa80ffcb, (q31_t)0x7fdd4eec, (q31_t)0xfa1c9157,
+  (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fd37153, (q31_t)0xf953bf91, (q31_t)0x7fce0c3e, (q31_t)0xf8ef5cbb, (q31_t)0x7fc85854, (q31_t)0xf88afe42,
+  (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fbc040a, (q31_t)0xf7c24f59, (q31_t)0x7fb563b3, (q31_t)0xf75dff66, (q31_t)0x7fae7495, (q31_t)0xf6f9b4c6,
+  (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7f9faa15, (q31_t)0xf6313077, (q31_t)0x7f97cebd, (q31_t)0xf5ccf743, (q31_t)0x7f8fa4b0, (q31_t)0xf568c45b,
+  (q31_t)0x7f872bf3, (q31_t)0xf50497fb, (q31_t)0x7f7e648c, (q31_t)0xf4a07261, (q31_t)0x7f754e80, (q31_t)0xf43c53cb, (q31_t)0x7f6be9d4, (q31_t)0xf3d83c77,
+  (q31_t)0x7f62368f, (q31_t)0xf3742ca2, (q31_t)0x7f5834b7, (q31_t)0xf310248a, (q31_t)0x7f4de451, (q31_t)0xf2ac246e, (q31_t)0x7f434563, (q31_t)0xf2482c8a,
+  (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c, (q31_t)0x7f2d1c0e, (q31_t)0xf1805662, (q31_t)0x7f2191b4, (q31_t)0xf11c789a, (q31_t)0x7f15b8ee, (q31_t)0xf0b8a401,
+  (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7efd1c3c, (q31_t)0xeff11753, (q31_t)0x7ef05860, (q31_t)0xef8d5fb8, (q31_t)0x7ee34636, (q31_t)0xef29b243,
+  (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31, (q31_t)0x7ec8371a, (q31_t)0xee6276bf, (q31_t)0x7eba3a39, (q31_t)0xedfee92b, (q31_t)0x7eabef2c, (q31_t)0xed9b66b2,
+  (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e8e6eb2, (q31_t)0xecd48407, (q31_t)0x7e7f3957, (q31_t)0xec71244f, (q31_t)0x7e6fb5f4, (q31_t)0xec0dd0a8,
+  (q31_t)0x7e5fe493, (q31_t)0xebaa894f, (q31_t)0x7e4fc53e, (q31_t)0xeb474e81, (q31_t)0x7e3f57ff, (q31_t)0xeae4207a, (q31_t)0x7e2e9cdf, (q31_t)0xea80ff7a,
+  (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7e0c3d29, (q31_t)0xe9bae57d, (q31_t)0x7dfa98a8, (q31_t)0xe957ecfb, (q31_t)0x7de8a670, (q31_t)0xe8f50273,
+  (q31_t)0x7dd6668f, (q31_t)0xe8922622, (q31_t)0x7dc3d90d, (q31_t)0xe82f5844, (q31_t)0x7db0fdf8, (q31_t)0xe7cc9917, (q31_t)0x7d9dd55a, (q31_t)0xe769e8d8,
+  (q31_t)0x7d8a5f40, (q31_t)0xe70747c4, (q31_t)0x7d769bb5, (q31_t)0xe6a4b616, (q31_t)0x7d628ac6, (q31_t)0xe642340d, (q31_t)0x7d4e2c7f, (q31_t)0xe5dfc1e5,
+  (q31_t)0x7d3980ec, (q31_t)0xe57d5fda, (q31_t)0x7d24881b, (q31_t)0xe51b0e2a, (q31_t)0x7d0f4218, (q31_t)0xe4b8cd11, (q31_t)0x7cf9aef0, (q31_t)0xe4569ccb,
+  (q31_t)0x7ce3ceb2, (q31_t)0xe3f47d96, (q31_t)0x7ccda169, (q31_t)0xe3926fad, (q31_t)0x7cb72724, (q31_t)0xe330734d, (q31_t)0x7ca05ff1, (q31_t)0xe2ce88b3,
+  (q31_t)0x7c894bde, (q31_t)0xe26cb01b, (q31_t)0x7c71eaf9, (q31_t)0xe20ae9c1, (q31_t)0x7c5a3d50, (q31_t)0xe1a935e2, (q31_t)0x7c4242f2, (q31_t)0xe14794ba,
+  (q31_t)0x7c29fbee, (q31_t)0xe0e60685, (q31_t)0x7c116853, (q31_t)0xe0848b7f, (q31_t)0x7bf88830, (q31_t)0xe02323e5, (q31_t)0x7bdf5b94, (q31_t)0xdfc1cff3,
+  (q31_t)0x7bc5e290, (q31_t)0xdf608fe4, (q31_t)0x7bac1d31, (q31_t)0xdeff63f4, (q31_t)0x7b920b89, (q31_t)0xde9e4c60, (q31_t)0x7b77ada8, (q31_t)0xde3d4964,
+  (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7b420d7a, (q31_t)0xdd7b8220, (q31_t)0x7b26cb4f, (q31_t)0xdd1abe51, (q31_t)0x7b0b3d2c, (q31_t)0xdcba1008,
+  (q31_t)0x7aef6323, (q31_t)0xdc597781, (q31_t)0x7ad33d45, (q31_t)0xdbf8f4f8, (q31_t)0x7ab6cba4, (q31_t)0xdb9888a8, (q31_t)0x7a9a0e50, (q31_t)0xdb3832cd,
+  (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a5fb0d8, (q31_t)0xda77cb63, (q31_t)0x7a4210d8, (q31_t)0xda17ba4a, (q31_t)0x7a24256f, (q31_t)0xd9b7c094,
+  (q31_t)0x7a05eead, (q31_t)0xd957de7a, (q31_t)0x79e76ca7, (q31_t)0xd8f81439, (q31_t)0x79c89f6e, (q31_t)0xd898620c, (q31_t)0x79a98715, (q31_t)0xd838c82d,
+  (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x796a7554, (q31_t)0xd779de47, (q31_t)0x794a7c12, (q31_t)0xd71a8eb5, (q31_t)0x792a37fe, (q31_t)0xd6bb585e,
+  (q31_t)0x7909a92d, (q31_t)0xd65c3b7b, (q31_t)0x78e8cfb2, (q31_t)0xd5fd3848, (q31_t)0x78c7aba2, (q31_t)0xd59e4eff, (q31_t)0x78a63d11, (q31_t)0xd53f7fda,
+  (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x786280bf, (q31_t)0xd48230e9, (q31_t)0x78403329, (q31_t)0xd423b191, (q31_t)0x781d9b65, (q31_t)0xd3c54d47,
+  (q31_t)0x77fab989, (q31_t)0xd3670446, (q31_t)0x77d78daa, (q31_t)0xd308d6c7, (q31_t)0x77b417df, (q31_t)0xd2aac504, (q31_t)0x7790583e, (q31_t)0xd24ccf39,
+  (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x7747fbce, (q31_t)0xd191386e, (q31_t)0x77235f2d, (q31_t)0xd13397e2, (q31_t)0x76fe790e, (q31_t)0xd0d61434,
+  (q31_t)0x76d94989, (q31_t)0xd078ad9e, (q31_t)0x76b3d0b4, (q31_t)0xd01b6459, (q31_t)0x768e0ea6, (q31_t)0xcfbe389f, (q31_t)0x76680376, (q31_t)0xcf612aaa,
+  (q31_t)0x7641af3d, (q31_t)0xcf043ab3, (q31_t)0x761b1211, (q31_t)0xcea768f2, (q31_t)0x75f42c0b, (q31_t)0xce4ab5a2, (q31_t)0x75ccfd42, (q31_t)0xcdee20fc,
+  (q31_t)0x75a585cf, (q31_t)0xcd91ab39, (q31_t)0x757dc5ca, (q31_t)0xcd355491, (q31_t)0x7555bd4c, (q31_t)0xccd91d3d, (q31_t)0x752d6c6c, (q31_t)0xcc7d0578,
+  (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x74dbf1ef, (q31_t)0xcbc53579, (q31_t)0x74b2c884, (q31_t)0xcb697db0, (q31_t)0x7489571c, (q31_t)0xcb0de658,
+  (q31_t)0x745f9dd1, (q31_t)0xcab26fa9, (q31_t)0x74359cbd, (q31_t)0xca5719db, (q31_t)0x740b53fb, (q31_t)0xc9fbe527, (q31_t)0x73e0c3a3, (q31_t)0xc9a0d1c5,
+  (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x738acc9e, (q31_t)0xc8eb0fd6, (q31_t)0x735f6626, (q31_t)0xc89061ba, (q31_t)0x7333b883, (q31_t)0xc835d5d0,
+  (q31_t)0x7307c3d0, (q31_t)0xc7db6c50, (q31_t)0x72db8828, (q31_t)0xc7812572, (q31_t)0x72af05a7, (q31_t)0xc727016d, (q31_t)0x72823c67, (q31_t)0xc6cd0079,
+  (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x7227d61c, (q31_t)0xc61968a2, (q31_t)0x71fa3949, (q31_t)0xc5bfd22e, (q31_t)0x71cc5626, (q31_t)0xc5665fa9,
+  (q31_t)0x719e2cd2, (q31_t)0xc50d1149, (q31_t)0x716fbd68, (q31_t)0xc4b3e746, (q31_t)0x71410805, (q31_t)0xc45ae1d7, (q31_t)0x71120cc5, (q31_t)0xc4020133,
+  (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x70b34525, (q31_t)0xc350af26, (q31_t)0x708378ff, (q31_t)0xc2f83e2a, (q31_t)0x70536771, (q31_t)0xc29ff2d4,
+  (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x6ff27497, (q31_t)0xc1efcdf3, (q31_t)0x6fc19385, (q31_t)0xc197f4d4, (q31_t)0x6f906d84, (q31_t)0xc1404233,
+  (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6f2d532c, (q31_t)0xc0915148, (q31_t)0x6efb5f12, (q31_t)0xc03a1368, (q31_t)0x6ec92683, (q31_t)0xbfe2fcdf,
+  (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3, (q31_t)0x6e63e87f, (q31_t)0xbf3546a8, (q31_t)0x6e30e34a, (q31_t)0xbedea765, (q31_t)0x6dfd9a1c, (q31_t)0xbe88304f,
+  (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6d963c54, (q31_t)0xbddbbb7f, (q31_t)0x6d6227fa, (q31_t)0xbd85be30, (q31_t)0x6d2dd027, (q31_t)0xbd2fe9e2,
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+  (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x18961728, (q31_t)0x82622aa6, (q31_t)0x183366e9, (q31_t)0x824f0208, (q31_t)0x17d0a7bc, (q31_t)0x823c26f3,
+  (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x170afd8d, (q31_t)0x82175990, (q31_t)0x16a81305, (q31_t)0x82056758, (q31_t)0x16451a83, (q31_t)0x81f3c2d7,
+  (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x157f0086, (q31_t)0x81d16321, (q31_t)0x151bdf86, (q31_t)0x81c0a801, (q31_t)0x14b8b17f, (q31_t)0x81b03ac2,
+  (q31_t)0x145576b1, (q31_t)0x81a01b6d, (q31_t)0x13f22f58, (q31_t)0x81904a0c, (q31_t)0x138edbb1, (q31_t)0x8180c6a9, (q31_t)0x132b7bf9, (q31_t)0x8171914e,
+  (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x1264994e, (q31_t)0x815410d4, (q31_t)0x120116d5, (q31_t)0x8145c5c7, (q31_t)0x119d8941, (q31_t)0x8137c8e6,
+  (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x10d64dbd, (q31_t)0x811cb9ca, (q31_t)0x1072a048, (q31_t)0x810fa7a0, (q31_t)0x100ee8ad, (q31_t)0x8102e3c4,
+  (q31_t)0x0fab272b, (q31_t)0x80f66e3c, (q31_t)0x0f475bff, (q31_t)0x80ea4712, (q31_t)0x0ee38766, (q31_t)0x80de6e4c, (q31_t)0x0e7fa99e, (q31_t)0x80d2e3f2,
+  (q31_t)0x0e1bc2e4, (q31_t)0x80c7a80a, (q31_t)0x0db7d376, (q31_t)0x80bcba9d, (q31_t)0x0d53db92, (q31_t)0x80b21baf, (q31_t)0x0cefdb76, (q31_t)0x80a7cb49,
+  (q31_t)0x0c8bd35e, (q31_t)0x809dc971, (q31_t)0x0c27c389, (q31_t)0x8094162c, (q31_t)0x0bc3ac35, (q31_t)0x808ab180, (q31_t)0x0b5f8d9f, (q31_t)0x80819b74,
+  (q31_t)0x0afb6805, (q31_t)0x8078d40d, (q31_t)0x0a973ba5, (q31_t)0x80705b50, (q31_t)0x0a3308bd, (q31_t)0x80683143, (q31_t)0x09cecf89, (q31_t)0x806055eb,
+  (q31_t)0x096a9049, (q31_t)0x8058c94c, (q31_t)0x09064b3a, (q31_t)0x80518b6b, (q31_t)0x08a2009a, (q31_t)0x804a9c4d, (q31_t)0x083db0a7, (q31_t)0x8043fbf6,
+  (q31_t)0x07d95b9e, (q31_t)0x803daa6a, (q31_t)0x077501be, (q31_t)0x8037a7ac, (q31_t)0x0710a345, (q31_t)0x8031f3c2, (q31_t)0x06ac406f, (q31_t)0x802c8ead,
+  (q31_t)0x0647d97c, (q31_t)0x80277872, (q31_t)0x05e36ea9, (q31_t)0x8022b114, (q31_t)0x057f0035, (q31_t)0x801e3895, (q31_t)0x051a8e5c, (q31_t)0x801a0ef8,
+  (q31_t)0x04b6195d, (q31_t)0x80163440, (q31_t)0x0451a177, (q31_t)0x8012a86f, (q31_t)0x03ed26e6, (q31_t)0x800f6b88, (q31_t)0x0388a9ea, (q31_t)0x800c7d8c,
+  (q31_t)0x03242abf, (q31_t)0x8009de7e, (q31_t)0x02bfa9a4, (q31_t)0x80078e5e, (q31_t)0x025b26d7, (q31_t)0x80058d2f, (q31_t)0x01f6a297, (q31_t)0x8003daf1,
+  (q31_t)0x01921d20, (q31_t)0x800277a6, (q31_t)0x012d96b1, (q31_t)0x8001634e, (q31_t)0x00c90f88, (q31_t)0x80009dea, (q31_t)0x006487e3, (q31_t)0x8000277a
+};
+    const q31_t cos_factorsQ31_512[512] = {
+  (q31_t)0x7ffff621, (q31_t)0x7fffa72c, (q31_t)0x7fff0943, (q31_t)0x7ffe1c65, (q31_t)0x7ffce093, (q31_t)0x7ffb55ce,
+  (q31_t)0x7ff97c18, (q31_t)0x7ff75370,
+  (q31_t)0x7ff4dbd9, (q31_t)0x7ff21553, (q31_t)0x7feeffe1, (q31_t)0x7feb9b85, (q31_t)0x7fe7e841, (q31_t)0x7fe3e616,
+  (q31_t)0x7fdf9508, (q31_t)0x7fdaf519,
+  (q31_t)0x7fd6064c, (q31_t)0x7fd0c8a3, (q31_t)0x7fcb3c23, (q31_t)0x7fc560cf, (q31_t)0x7fbf36aa, (q31_t)0x7fb8bdb8,
+  (q31_t)0x7fb1f5fc, (q31_t)0x7faadf7c,
+  (q31_t)0x7fa37a3c, (q31_t)0x7f9bc640, (q31_t)0x7f93c38c, (q31_t)0x7f8b7227, (q31_t)0x7f82d214, (q31_t)0x7f79e35a,
+  (q31_t)0x7f70a5fe, (q31_t)0x7f671a05,
+  (q31_t)0x7f5d3f75, (q31_t)0x7f531655, (q31_t)0x7f489eaa, (q31_t)0x7f3dd87c, (q31_t)0x7f32c3d1, (q31_t)0x7f2760af,
+  (q31_t)0x7f1baf1e, (q31_t)0x7f0faf25,
+  (q31_t)0x7f0360cb, (q31_t)0x7ef6c418, (q31_t)0x7ee9d914, (q31_t)0x7edc9fc6, (q31_t)0x7ecf1837, (q31_t)0x7ec14270,
+  (q31_t)0x7eb31e78, (q31_t)0x7ea4ac58,
+  (q31_t)0x7e95ec1a, (q31_t)0x7e86ddc6, (q31_t)0x7e778166, (q31_t)0x7e67d703, (q31_t)0x7e57dea7, (q31_t)0x7e47985b,
+  (q31_t)0x7e37042a, (q31_t)0x7e26221f,
+  (q31_t)0x7e14f242, (q31_t)0x7e0374a0, (q31_t)0x7df1a942, (q31_t)0x7ddf9034, (q31_t)0x7dcd2981, (q31_t)0x7dba7534,
+  (q31_t)0x7da77359, (q31_t)0x7d9423fc,
+  (q31_t)0x7d808728, (q31_t)0x7d6c9ce9, (q31_t)0x7d58654d, (q31_t)0x7d43e05e, (q31_t)0x7d2f0e2b, (q31_t)0x7d19eebf,
+  (q31_t)0x7d048228, (q31_t)0x7ceec873,
+  (q31_t)0x7cd8c1ae, (q31_t)0x7cc26de5, (q31_t)0x7cabcd28, (q31_t)0x7c94df83, (q31_t)0x7c7da505, (q31_t)0x7c661dbc,
+  (q31_t)0x7c4e49b7, (q31_t)0x7c362904,
+  (q31_t)0x7c1dbbb3, (q31_t)0x7c0501d2, (q31_t)0x7bebfb70, (q31_t)0x7bd2a89e, (q31_t)0x7bb9096b, (q31_t)0x7b9f1de6,
+  (q31_t)0x7b84e61f, (q31_t)0x7b6a6227,
+  (q31_t)0x7b4f920e, (q31_t)0x7b3475e5, (q31_t)0x7b190dbc, (q31_t)0x7afd59a4, (q31_t)0x7ae159ae, (q31_t)0x7ac50dec,
+  (q31_t)0x7aa8766f, (q31_t)0x7a8b9348,
+  (q31_t)0x7a6e648a, (q31_t)0x7a50ea47, (q31_t)0x7a332490, (q31_t)0x7a151378, (q31_t)0x79f6b711, (q31_t)0x79d80f6f,
+  (q31_t)0x79b91ca4, (q31_t)0x7999dec4,
+  (q31_t)0x797a55e0, (q31_t)0x795a820e, (q31_t)0x793a6361, (q31_t)0x7919f9ec, (q31_t)0x78f945c3, (q31_t)0x78d846fb,
+  (q31_t)0x78b6fda8, (q31_t)0x789569df,
+  (q31_t)0x78738bb3, (q31_t)0x7851633b, (q31_t)0x782ef08b, (q31_t)0x780c33b8, (q31_t)0x77e92cd9, (q31_t)0x77c5dc01,
+  (q31_t)0x77a24148, (q31_t)0x777e5cc3,
+  (q31_t)0x775a2e89, (q31_t)0x7735b6af, (q31_t)0x7710f54c, (q31_t)0x76ebea77, (q31_t)0x76c69647, (q31_t)0x76a0f8d2,
+  (q31_t)0x767b1231, (q31_t)0x7654e279,
+  (q31_t)0x762e69c4, (q31_t)0x7607a828, (q31_t)0x75e09dbd, (q31_t)0x75b94a9c, (q31_t)0x7591aedd, (q31_t)0x7569ca99,
+  (q31_t)0x75419de7, (q31_t)0x751928e0,
+  (q31_t)0x74f06b9e, (q31_t)0x74c7663a, (q31_t)0x749e18cd, (q31_t)0x74748371, (q31_t)0x744aa63f, (q31_t)0x74208150,
+  (q31_t)0x73f614c0, (q31_t)0x73cb60a8,
+  (q31_t)0x73a06522, (q31_t)0x73752249, (q31_t)0x73499838, (q31_t)0x731dc70a, (q31_t)0x72f1aed9, (q31_t)0x72c54fc1,
+  (q31_t)0x7298a9dd, (q31_t)0x726bbd48,
+  (q31_t)0x723e8a20, (q31_t)0x7211107e, (q31_t)0x71e35080, (q31_t)0x71b54a41, (q31_t)0x7186fdde, (q31_t)0x71586b74,
+  (q31_t)0x7129931f, (q31_t)0x70fa74fc,
+  (q31_t)0x70cb1128, (q31_t)0x709b67c0, (q31_t)0x706b78e3, (q31_t)0x703b44ad, (q31_t)0x700acb3c, (q31_t)0x6fda0cae,
+  (q31_t)0x6fa90921, (q31_t)0x6f77c0b3,
+  (q31_t)0x6f463383, (q31_t)0x6f1461b0, (q31_t)0x6ee24b57, (q31_t)0x6eaff099, (q31_t)0x6e7d5193, (q31_t)0x6e4a6e66,
+  (q31_t)0x6e174730, (q31_t)0x6de3dc11,
+  (q31_t)0x6db02d29, (q31_t)0x6d7c3a98, (q31_t)0x6d48047e, (q31_t)0x6d138afb, (q31_t)0x6cdece2f, (q31_t)0x6ca9ce3b,
+  (q31_t)0x6c748b3f, (q31_t)0x6c3f055d,
+  (q31_t)0x6c093cb6, (q31_t)0x6bd3316a, (q31_t)0x6b9ce39b, (q31_t)0x6b66536b, (q31_t)0x6b2f80fb, (q31_t)0x6af86c6c,
+  (q31_t)0x6ac115e2, (q31_t)0x6a897d7d,
+  (q31_t)0x6a51a361, (q31_t)0x6a1987b0, (q31_t)0x69e12a8c, (q31_t)0x69a88c19, (q31_t)0x696fac78, (q31_t)0x69368bce,
+  (q31_t)0x68fd2a3d, (q31_t)0x68c387e9,
+  (q31_t)0x6889a4f6, (q31_t)0x684f8186, (q31_t)0x68151dbe, (q31_t)0x67da79c3, (q31_t)0x679f95b7, (q31_t)0x676471c0,
+  (q31_t)0x67290e02, (q31_t)0x66ed6aa1,
+  (q31_t)0x66b187c3, (q31_t)0x6675658c, (q31_t)0x66390422, (q31_t)0x65fc63a9, (q31_t)0x65bf8447, (q31_t)0x65826622,
+  (q31_t)0x6545095f, (q31_t)0x65076e25,
+  (q31_t)0x64c99498, (q31_t)0x648b7ce0, (q31_t)0x644d2722, (q31_t)0x640e9386, (q31_t)0x63cfc231, (q31_t)0x6390b34a,
+  (q31_t)0x635166f9, (q31_t)0x6311dd64,
+  (q31_t)0x62d216b3, (q31_t)0x6292130c, (q31_t)0x6251d298, (q31_t)0x6211557e, (q31_t)0x61d09be5, (q31_t)0x618fa5f7,
+  (q31_t)0x614e73da, (q31_t)0x610d05b7,
+  (q31_t)0x60cb5bb7, (q31_t)0x60897601, (q31_t)0x604754bf, (q31_t)0x6004f819, (q31_t)0x5fc26038, (q31_t)0x5f7f8d46,
+  (q31_t)0x5f3c7f6b, (q31_t)0x5ef936d1,
+  (q31_t)0x5eb5b3a2, (q31_t)0x5e71f606, (q31_t)0x5e2dfe29, (q31_t)0x5de9cc33, (q31_t)0x5da5604f, (q31_t)0x5d60baa7,
+  (q31_t)0x5d1bdb65, (q31_t)0x5cd6c2b5,
+  (q31_t)0x5c9170bf, (q31_t)0x5c4be5b0, (q31_t)0x5c0621b2, (q31_t)0x5bc024f0, (q31_t)0x5b79ef96, (q31_t)0x5b3381ce,
+  (q31_t)0x5aecdbc5, (q31_t)0x5aa5fda5,
+  (q31_t)0x5a5ee79a, (q31_t)0x5a1799d1, (q31_t)0x59d01475, (q31_t)0x598857b2, (q31_t)0x594063b5, (q31_t)0x58f838a9,
+  (q31_t)0x58afd6bd, (q31_t)0x58673e1b,
+  (q31_t)0x581e6ef1, (q31_t)0x57d5696d, (q31_t)0x578c2dba, (q31_t)0x5742bc06, (q31_t)0x56f9147e, (q31_t)0x56af3750,
+  (q31_t)0x566524aa, (q31_t)0x561adcb9,
+  (q31_t)0x55d05faa, (q31_t)0x5585adad, (q31_t)0x553ac6ee, (q31_t)0x54efab9c, (q31_t)0x54a45be6, (q31_t)0x5458d7f9,
+  (q31_t)0x540d2005, (q31_t)0x53c13439,
+  (q31_t)0x537514c2, (q31_t)0x5328c1d0, (q31_t)0x52dc3b92, (q31_t)0x528f8238, (q31_t)0x524295f0, (q31_t)0x51f576ea,
+  (q31_t)0x51a82555, (q31_t)0x515aa162,
+  (q31_t)0x510ceb40, (q31_t)0x50bf031f, (q31_t)0x5070e92f, (q31_t)0x50229da1, (q31_t)0x4fd420a4, (q31_t)0x4f857269,
+  (q31_t)0x4f369320, (q31_t)0x4ee782fb,
+  (q31_t)0x4e984229, (q31_t)0x4e48d0dd, (q31_t)0x4df92f46, (q31_t)0x4da95d96, (q31_t)0x4d595bfe, (q31_t)0x4d092ab0,
+  (q31_t)0x4cb8c9dd, (q31_t)0x4c6839b7,
+  (q31_t)0x4c177a6e, (q31_t)0x4bc68c36, (q31_t)0x4b756f40, (q31_t)0x4b2423be, (q31_t)0x4ad2a9e2, (q31_t)0x4a8101de,
+  (q31_t)0x4a2f2be6, (q31_t)0x49dd282a,
+  (q31_t)0x498af6df, (q31_t)0x49389836, (q31_t)0x48e60c62, (q31_t)0x48935397, (q31_t)0x48406e08, (q31_t)0x47ed5be6,
+  (q31_t)0x479a1d67, (q31_t)0x4746b2bc,
+  (q31_t)0x46f31c1a, (q31_t)0x469f59b4, (q31_t)0x464b6bbe, (q31_t)0x45f7526b, (q31_t)0x45a30df0, (q31_t)0x454e9e80,
+  (q31_t)0x44fa0450, (q31_t)0x44a53f93,
+  (q31_t)0x4450507e, (q31_t)0x43fb3746, (q31_t)0x43a5f41e, (q31_t)0x4350873c, (q31_t)0x42faf0d4, (q31_t)0x42a5311b,
+  (q31_t)0x424f4845, (q31_t)0x41f93689,
+  (q31_t)0x41a2fc1a, (q31_t)0x414c992f, (q31_t)0x40f60dfb, (q31_t)0x409f5ab6, (q31_t)0x40487f94, (q31_t)0x3ff17cca,
+  (q31_t)0x3f9a5290, (q31_t)0x3f430119,
+  (q31_t)0x3eeb889c, (q31_t)0x3e93e950, (q31_t)0x3e3c2369, (q31_t)0x3de4371f, (q31_t)0x3d8c24a8, (q31_t)0x3d33ec39,
+  (q31_t)0x3cdb8e09, (q31_t)0x3c830a50,
+  (q31_t)0x3c2a6142, (q31_t)0x3bd19318, (q31_t)0x3b78a007, (q31_t)0x3b1f8848, (q31_t)0x3ac64c0f, (q31_t)0x3a6ceb96,
+  (q31_t)0x3a136712, (q31_t)0x39b9bebc,
+  (q31_t)0x395ff2c9, (q31_t)0x39060373, (q31_t)0x38abf0ef, (q31_t)0x3851bb77, (q31_t)0x37f76341, (q31_t)0x379ce885,
+  (q31_t)0x37424b7b, (q31_t)0x36e78c5b,
+  (q31_t)0x368cab5c, (q31_t)0x3631a8b8, (q31_t)0x35d684a6, (q31_t)0x357b3f5d, (q31_t)0x351fd918, (q31_t)0x34c4520d,
+  (q31_t)0x3468aa76, (q31_t)0x340ce28b,
+  (q31_t)0x33b0fa84, (q31_t)0x3354f29b, (q31_t)0x32f8cb07, (q31_t)0x329c8402, (q31_t)0x32401dc6, (q31_t)0x31e39889,
+  (q31_t)0x3186f487, (q31_t)0x312a31f8,
+  (q31_t)0x30cd5115, (q31_t)0x30705217, (q31_t)0x30133539, (q31_t)0x2fb5fab2, (q31_t)0x2f58a2be, (q31_t)0x2efb2d95,
+  (q31_t)0x2e9d9b70, (q31_t)0x2e3fec8b,
+  (q31_t)0x2de2211e, (q31_t)0x2d843964, (q31_t)0x2d263596, (q31_t)0x2cc815ee, (q31_t)0x2c69daa6, (q31_t)0x2c0b83fa,
+  (q31_t)0x2bad1221, (q31_t)0x2b4e8558,
+  (q31_t)0x2aefddd8, (q31_t)0x2a911bdc, (q31_t)0x2a323f9e, (q31_t)0x29d34958, (q31_t)0x29743946, (q31_t)0x29150fa1,
+  (q31_t)0x28b5cca5, (q31_t)0x2856708d,
+  (q31_t)0x27f6fb92, (q31_t)0x27976df1, (q31_t)0x2737c7e3, (q31_t)0x26d809a5, (q31_t)0x26783370, (q31_t)0x26184581,
+  (q31_t)0x25b84012, (q31_t)0x2558235f,
+  (q31_t)0x24f7efa2, (q31_t)0x2497a517, (q31_t)0x243743fa, (q31_t)0x23d6cc87, (q31_t)0x23763ef7, (q31_t)0x23159b88,
+  (q31_t)0x22b4e274, (q31_t)0x225413f8,
+  (q31_t)0x21f3304f, (q31_t)0x219237b5, (q31_t)0x21312a65, (q31_t)0x20d0089c, (q31_t)0x206ed295, (q31_t)0x200d888d,
+  (q31_t)0x1fac2abf, (q31_t)0x1f4ab968,
+  (q31_t)0x1ee934c3, (q31_t)0x1e879d0d, (q31_t)0x1e25f282, (q31_t)0x1dc4355e, (q31_t)0x1d6265dd, (q31_t)0x1d00843d,
+  (q31_t)0x1c9e90b8, (q31_t)0x1c3c8b8c,
+  (q31_t)0x1bda74f6, (q31_t)0x1b784d30, (q31_t)0x1b161479, (q31_t)0x1ab3cb0d, (q31_t)0x1a517128, (q31_t)0x19ef0707,
+  (q31_t)0x198c8ce7, (q31_t)0x192a0304,
+  (q31_t)0x18c7699b, (q31_t)0x1864c0ea, (q31_t)0x1802092c, (q31_t)0x179f429f, (q31_t)0x173c6d80, (q31_t)0x16d98a0c,
+  (q31_t)0x1676987f, (q31_t)0x16139918,
+  (q31_t)0x15b08c12, (q31_t)0x154d71aa, (q31_t)0x14ea4a1f, (q31_t)0x148715ae, (q31_t)0x1423d492, (q31_t)0x13c0870a,
+  (q31_t)0x135d2d53, (q31_t)0x12f9c7aa,
+  (q31_t)0x1296564d, (q31_t)0x1232d979, (q31_t)0x11cf516a, (q31_t)0x116bbe60, (q31_t)0x11082096, (q31_t)0x10a4784b,
+  (q31_t)0x1040c5bb, (q31_t)0xfdd0926,
+  (q31_t)0xf7942c7, (q31_t)0xf1572dc, (q31_t)0xeb199a4, (q31_t)0xe4db75b, (q31_t)0xde9cc40, (q31_t)0xd85d88f, (q31_t)0xd21dc87,
+  (q31_t)0xcbdd865,
+  (q31_t)0xc59cc68, (q31_t)0xbf5b8cb, (q31_t)0xb919dcf, (q31_t)0xb2d7baf, (q31_t)0xac952aa, (q31_t)0xa6522fe, (q31_t)0xa00ece8,
+  (q31_t)0x99cb0a7,
+  (q31_t)0x9386e78, (q31_t)0x8d42699, (q31_t)0x86fd947, (q31_t)0x80b86c2, (q31_t)0x7a72f45, (q31_t)0x742d311, (q31_t)0x6de7262,
+  (q31_t)0x67a0d76,
+  (q31_t)0x615a48b, (q31_t)0x5b137df, (q31_t)0x54cc7b1, (q31_t)0x4e8543e, (q31_t)0x483ddc3, (q31_t)0x41f6480, (q31_t)0x3bae8b2,
+  (q31_t)0x3566a96,
+  (q31_t)0x2f1ea6c, (q31_t)0x28d6870, (q31_t)0x228e4e2, (q31_t)0x1c45ffe, (q31_t)0x15fda03, (q31_t)0xfb5330, (q31_t)0x96cbc1,
+  (q31_t)0x3243f5
+};
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_2048) 
+    const q31_t WeightsQ31_2048[4096] = {
+  (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7ffffd88, (q31_t)0xffe6de05, (q31_t)0x7ffff621, (q31_t)0xffcdbc0b, (q31_t)0x7fffe9cb, (q31_t)0xffb49a12,
+  (q31_t)0x7fffd886, (q31_t)0xff9b781d, (q31_t)0x7fffc251, (q31_t)0xff82562c, (q31_t)0x7fffa72c, (q31_t)0xff69343f, (q31_t)0x7fff8719, (q31_t)0xff501258,
+  (q31_t)0x7fff6216, (q31_t)0xff36f078, (q31_t)0x7fff3824, (q31_t)0xff1dcea0, (q31_t)0x7fff0943, (q31_t)0xff04acd0, (q31_t)0x7ffed572, (q31_t)0xfeeb8b0a,
+  (q31_t)0x7ffe9cb2, (q31_t)0xfed2694f, (q31_t)0x7ffe5f03, (q31_t)0xfeb947a0, (q31_t)0x7ffe1c65, (q31_t)0xfea025fd, (q31_t)0x7ffdd4d7, (q31_t)0xfe870467,
+  (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ffd36ee, (q31_t)0xfe54c169, (q31_t)0x7ffce093, (q31_t)0xfe3ba002, (q31_t)0x7ffc8549, (q31_t)0xfe227eac,
+  (q31_t)0x7ffc250f, (q31_t)0xfe095d69, (q31_t)0x7ffbbfe6, (q31_t)0xfdf03c3a, (q31_t)0x7ffb55ce, (q31_t)0xfdd71b1e, (q31_t)0x7ffae6c7, (q31_t)0xfdbdfa18,
+  (q31_t)0x7ffa72d1, (q31_t)0xfda4d929, (q31_t)0x7ff9f9ec, (q31_t)0xfd8bb850, (q31_t)0x7ff97c18, (q31_t)0xfd729790, (q31_t)0x7ff8f954, (q31_t)0xfd5976e9,
+  (q31_t)0x7ff871a2, (q31_t)0xfd40565c, (q31_t)0x7ff7e500, (q31_t)0xfd2735ea, (q31_t)0x7ff75370, (q31_t)0xfd0e1594, (q31_t)0x7ff6bcf0, (q31_t)0xfcf4f55c,
+  (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7ff58125, (q31_t)0xfcc2b545, (q31_t)0x7ff4dbd9, (q31_t)0xfca9956a, (q31_t)0x7ff4319d, (q31_t)0xfc9075af,
+  (q31_t)0x7ff38274, (q31_t)0xfc775616, (q31_t)0x7ff2ce5b, (q31_t)0xfc5e36a0, (q31_t)0x7ff21553, (q31_t)0xfc45174e, (q31_t)0x7ff1575d, (q31_t)0xfc2bf821,
+  (q31_t)0x7ff09478, (q31_t)0xfc12d91a, (q31_t)0x7fefcca4, (q31_t)0xfbf9ba39, (q31_t)0x7feeffe1, (q31_t)0xfbe09b80, (q31_t)0x7fee2e30, (q31_t)0xfbc77cf0,
+  (q31_t)0x7fed5791, (q31_t)0xfbae5e89, (q31_t)0x7fec7c02, (q31_t)0xfb95404d, (q31_t)0x7feb9b85, (q31_t)0xfb7c223d, (q31_t)0x7feab61a, (q31_t)0xfb630459,
+  (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3, (q31_t)0x7fe8dc78, (q31_t)0xfb30c91b, (q31_t)0x7fe7e841, (q31_t)0xfb17abc2, (q31_t)0x7fe6ef1c, (q31_t)0xfafe8e9b,
+  (q31_t)0x7fe5f108, (q31_t)0xfae571a4, (q31_t)0x7fe4ee06, (q31_t)0xfacc54e0, (q31_t)0x7fe3e616, (q31_t)0xfab3384f, (q31_t)0x7fe2d938, (q31_t)0xfa9a1bf3,
+  (q31_t)0x7fe1c76b, (q31_t)0xfa80ffcb, (q31_t)0x7fe0b0b1, (q31_t)0xfa67e3da, (q31_t)0x7fdf9508, (q31_t)0xfa4ec821, (q31_t)0x7fde7471, (q31_t)0xfa35ac9f,
+  (q31_t)0x7fdd4eec, (q31_t)0xfa1c9157, (q31_t)0x7fdc247a, (q31_t)0xfa037648, (q31_t)0x7fdaf519, (q31_t)0xf9ea5b75, (q31_t)0x7fd9c0ca, (q31_t)0xf9d140de,
+  (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fd74964, (q31_t)0xf99f0c68, (q31_t)0x7fd6064c, (q31_t)0xf985f28a, (q31_t)0x7fd4be46, (q31_t)0xf96cd8ed,
+  (q31_t)0x7fd37153, (q31_t)0xf953bf91, (q31_t)0x7fd21f72, (q31_t)0xf93aa676, (q31_t)0x7fd0c8a3, (q31_t)0xf9218d9e, (q31_t)0x7fcf6ce8, (q31_t)0xf908750a,
+  (q31_t)0x7fce0c3e, (q31_t)0xf8ef5cbb, (q31_t)0x7fcca6a7, (q31_t)0xf8d644b2, (q31_t)0x7fcb3c23, (q31_t)0xf8bd2cef, (q31_t)0x7fc9ccb2, (q31_t)0xf8a41574,
+  (q31_t)0x7fc85854, (q31_t)0xf88afe42, (q31_t)0x7fc6df08, (q31_t)0xf871e759, (q31_t)0x7fc560cf, (q31_t)0xf858d0bb, (q31_t)0x7fc3dda9, (q31_t)0xf83fba68,
+  (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fc0c896, (q31_t)0xf80d8ea9, (q31_t)0x7fbf36aa, (q31_t)0xf7f4793e, (q31_t)0x7fbd9fd0, (q31_t)0xf7db6423,
+  (q31_t)0x7fbc040a, (q31_t)0xf7c24f59, (q31_t)0x7fba6357, (q31_t)0xf7a93ae0, (q31_t)0x7fb8bdb8, (q31_t)0xf79026b9, (q31_t)0x7fb7132b, (q31_t)0xf77712e5,
+  (q31_t)0x7fb563b3, (q31_t)0xf75dff66, (q31_t)0x7fb3af4e, (q31_t)0xf744ec3b, (q31_t)0x7fb1f5fc, (q31_t)0xf72bd967, (q31_t)0x7fb037bf, (q31_t)0xf712c6ea,
+  (q31_t)0x7fae7495, (q31_t)0xf6f9b4c6, (q31_t)0x7facac7f, (q31_t)0xf6e0a2fa, (q31_t)0x7faadf7c, (q31_t)0xf6c79188, (q31_t)0x7fa90d8e, (q31_t)0xf6ae8071,
+  (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7fa55aee, (q31_t)0xf67c5f59, (q31_t)0x7fa37a3c, (q31_t)0xf6634f59, (q31_t)0x7fa1949e, (q31_t)0xf64a3fb8,
+  (q31_t)0x7f9faa15, (q31_t)0xf6313077, (q31_t)0x7f9dbaa0, (q31_t)0xf6182196, (q31_t)0x7f9bc640, (q31_t)0xf5ff1318, (q31_t)0x7f99ccf4, (q31_t)0xf5e604fc,
+  (q31_t)0x7f97cebd, (q31_t)0xf5ccf743, (q31_t)0x7f95cb9a, (q31_t)0xf5b3e9f0, (q31_t)0x7f93c38c, (q31_t)0xf59add02, (q31_t)0x7f91b694, (q31_t)0xf581d07b,
+  (q31_t)0x7f8fa4b0, (q31_t)0xf568c45b, (q31_t)0x7f8d8de1, (q31_t)0xf54fb8a4, (q31_t)0x7f8b7227, (q31_t)0xf536ad56, (q31_t)0x7f895182, (q31_t)0xf51da273,
+  (q31_t)0x7f872bf3, (q31_t)0xf50497fb, (q31_t)0x7f850179, (q31_t)0xf4eb8def, (q31_t)0x7f82d214, (q31_t)0xf4d28451, (q31_t)0x7f809dc5, (q31_t)0xf4b97b21,
+  (q31_t)0x7f7e648c, (q31_t)0xf4a07261, (q31_t)0x7f7c2668, (q31_t)0xf4876a10, (q31_t)0x7f79e35a, (q31_t)0xf46e6231, (q31_t)0x7f779b62, (q31_t)0xf4555ac5,
+  (q31_t)0x7f754e80, (q31_t)0xf43c53cb, (q31_t)0x7f72fcb4, (q31_t)0xf4234d45, (q31_t)0x7f70a5fe, (q31_t)0xf40a4735, (q31_t)0x7f6e4a5e, (q31_t)0xf3f1419a,
+  (q31_t)0x7f6be9d4, (q31_t)0xf3d83c77, (q31_t)0x7f698461, (q31_t)0xf3bf37cb, (q31_t)0x7f671a05, (q31_t)0xf3a63398, (q31_t)0x7f64aabf, (q31_t)0xf38d2fe0,
+  (q31_t)0x7f62368f, (q31_t)0xf3742ca2, (q31_t)0x7f5fbd77, (q31_t)0xf35b29e0, (q31_t)0x7f5d3f75, (q31_t)0xf342279b, (q31_t)0x7f5abc8a, (q31_t)0xf32925d3,
+  (q31_t)0x7f5834b7, (q31_t)0xf310248a, (q31_t)0x7f55a7fa, (q31_t)0xf2f723c1, (q31_t)0x7f531655, (q31_t)0xf2de2379, (q31_t)0x7f507fc7, (q31_t)0xf2c523b2,
+  (q31_t)0x7f4de451, (q31_t)0xf2ac246e, (q31_t)0x7f4b43f2, (q31_t)0xf29325ad, (q31_t)0x7f489eaa, (q31_t)0xf27a2771, (q31_t)0x7f45f47b, (q31_t)0xf26129ba,
+  (q31_t)0x7f434563, (q31_t)0xf2482c8a, (q31_t)0x7f409164, (q31_t)0xf22f2fe1, (q31_t)0x7f3dd87c, (q31_t)0xf21633c0, (q31_t)0x7f3b1aad, (q31_t)0xf1fd3829,
+  (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c, (q31_t)0x7f359057, (q31_t)0xf1cb429a, (q31_t)0x7f32c3d1, (q31_t)0xf1b248a5, (q31_t)0x7f2ff263, (q31_t)0xf1994f3d,
+  (q31_t)0x7f2d1c0e, (q31_t)0xf1805662, (q31_t)0x7f2a40d2, (q31_t)0xf1675e17, (q31_t)0x7f2760af, (q31_t)0xf14e665c, (q31_t)0x7f247ba5, (q31_t)0xf1356f32,
+  (q31_t)0x7f2191b4, (q31_t)0xf11c789a, (q31_t)0x7f1ea2dc, (q31_t)0xf1038295, (q31_t)0x7f1baf1e, (q31_t)0xf0ea8d24, (q31_t)0x7f18b679, (q31_t)0xf0d19848,
+  (q31_t)0x7f15b8ee, (q31_t)0xf0b8a401, (q31_t)0x7f12b67c, (q31_t)0xf09fb051, (q31_t)0x7f0faf25, (q31_t)0xf086bd39, (q31_t)0x7f0ca2e7, (q31_t)0xf06dcaba,
+  (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7f067bba, (q31_t)0xf03be78a, (q31_t)0x7f0360cb, (q31_t)0xf022f6da, (q31_t)0x7f0040f6, (q31_t)0xf00a06c8,
+  (q31_t)0x7efd1c3c, (q31_t)0xeff11753, (q31_t)0x7ef9f29d, (q31_t)0xefd8287c, (q31_t)0x7ef6c418, (q31_t)0xefbf3a45, (q31_t)0x7ef390ae, (q31_t)0xefa64cae,
+  (q31_t)0x7ef05860, (q31_t)0xef8d5fb8, (q31_t)0x7eed1b2c, (q31_t)0xef747365, (q31_t)0x7ee9d914, (q31_t)0xef5b87b5, (q31_t)0x7ee69217, (q31_t)0xef429caa,
+  (q31_t)0x7ee34636, (q31_t)0xef29b243, (q31_t)0x7edff570, (q31_t)0xef10c883, (q31_t)0x7edc9fc6, (q31_t)0xeef7df6a, (q31_t)0x7ed94538, (q31_t)0xeedef6f9,
+  (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31, (q31_t)0x7ed28171, (q31_t)0xeead2813, (q31_t)0x7ecf1837, (q31_t)0xee9441a0, (q31_t)0x7ecbaa1a, (q31_t)0xee7b5bd9,
+  (q31_t)0x7ec8371a, (q31_t)0xee6276bf, (q31_t)0x7ec4bf36, (q31_t)0xee499253, (q31_t)0x7ec14270, (q31_t)0xee30ae96, (q31_t)0x7ebdc0c6, (q31_t)0xee17cb88,
+  (q31_t)0x7eba3a39, (q31_t)0xedfee92b, (q31_t)0x7eb6aeca, (q31_t)0xede60780, (q31_t)0x7eb31e78, (q31_t)0xedcd2687, (q31_t)0x7eaf8943, (q31_t)0xedb44642,
+  (q31_t)0x7eabef2c, (q31_t)0xed9b66b2, (q31_t)0x7ea85033, (q31_t)0xed8287d7, (q31_t)0x7ea4ac58, (q31_t)0xed69a9b3, (q31_t)0x7ea1039b, (q31_t)0xed50cc46,
+  (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e99a37c, (q31_t)0xed1f1396, (q31_t)0x7e95ec1a, (q31_t)0xed063856, (q31_t)0x7e922fd6, (q31_t)0xeced5dd0,
+  (q31_t)0x7e8e6eb2, (q31_t)0xecd48407, (q31_t)0x7e8aa8ac, (q31_t)0xecbbaafb, (q31_t)0x7e86ddc6, (q31_t)0xeca2d2ad, (q31_t)0x7e830dff, (q31_t)0xec89fb1e,
+  (q31_t)0x7e7f3957, (q31_t)0xec71244f, (q31_t)0x7e7b5fce, (q31_t)0xec584e41, (q31_t)0x7e778166, (q31_t)0xec3f78f6, (q31_t)0x7e739e1d, (q31_t)0xec26a46d,
+  (q31_t)0x7e6fb5f4, (q31_t)0xec0dd0a8, (q31_t)0x7e6bc8eb, (q31_t)0xebf4fda8, (q31_t)0x7e67d703, (q31_t)0xebdc2b6e, (q31_t)0x7e63e03b, (q31_t)0xebc359fb,
+  (q31_t)0x7e5fe493, (q31_t)0xebaa894f, (q31_t)0x7e5be40c, (q31_t)0xeb91b96c, (q31_t)0x7e57dea7, (q31_t)0xeb78ea52, (q31_t)0x7e53d462, (q31_t)0xeb601c04,
+  (q31_t)0x7e4fc53e, (q31_t)0xeb474e81, (q31_t)0x7e4bb13c, (q31_t)0xeb2e81ca, (q31_t)0x7e47985b, (q31_t)0xeb15b5e1, (q31_t)0x7e437a9c, (q31_t)0xeafceac6,
+  (q31_t)0x7e3f57ff, (q31_t)0xeae4207a, (q31_t)0x7e3b3083, (q31_t)0xeacb56ff, (q31_t)0x7e37042a, (q31_t)0xeab28e56, (q31_t)0x7e32d2f4, (q31_t)0xea99c67e,
+  (q31_t)0x7e2e9cdf, (q31_t)0xea80ff7a, (q31_t)0x7e2a61ed, (q31_t)0xea683949, (q31_t)0x7e26221f, (q31_t)0xea4f73ee, (q31_t)0x7e21dd73, (q31_t)0xea36af69,
+  (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7e194584, (q31_t)0xea0528e5, (q31_t)0x7e14f242, (q31_t)0xe9ec66e8, (q31_t)0x7e109a24, (q31_t)0xe9d3a5c5,
+  (q31_t)0x7e0c3d29, (q31_t)0xe9bae57d, (q31_t)0x7e07db52, (q31_t)0xe9a22610, (q31_t)0x7e0374a0, (q31_t)0xe9896781, (q31_t)0x7dff0911, (q31_t)0xe970a9ce,
+  (q31_t)0x7dfa98a8, (q31_t)0xe957ecfb, (q31_t)0x7df62362, (q31_t)0xe93f3107, (q31_t)0x7df1a942, (q31_t)0xe92675f4, (q31_t)0x7ded2a47, (q31_t)0xe90dbbc2,
+  (q31_t)0x7de8a670, (q31_t)0xe8f50273, (q31_t)0x7de41dc0, (q31_t)0xe8dc4a07, (q31_t)0x7ddf9034, (q31_t)0xe8c39280, (q31_t)0x7ddafdce, (q31_t)0xe8aadbde,
+  (q31_t)0x7dd6668f, (q31_t)0xe8922622, (q31_t)0x7dd1ca75, (q31_t)0xe879714d, (q31_t)0x7dcd2981, (q31_t)0xe860bd61, (q31_t)0x7dc883b4, (q31_t)0xe8480a5d,
+  (q31_t)0x7dc3d90d, (q31_t)0xe82f5844, (q31_t)0x7dbf298d, (q31_t)0xe816a716, (q31_t)0x7dba7534, (q31_t)0xe7fdf6d4, (q31_t)0x7db5bc02, (q31_t)0xe7e5477f,
+  (q31_t)0x7db0fdf8, (q31_t)0xe7cc9917, (q31_t)0x7dac3b15, (q31_t)0xe7b3eb9f, (q31_t)0x7da77359, (q31_t)0xe79b3f16, (q31_t)0x7da2a6c6, (q31_t)0xe782937e,
+  (q31_t)0x7d9dd55a, (q31_t)0xe769e8d8, (q31_t)0x7d98ff17, (q31_t)0xe7513f25, (q31_t)0x7d9423fc, (q31_t)0xe7389665, (q31_t)0x7d8f4409, (q31_t)0xe71fee99,
+  (q31_t)0x7d8a5f40, (q31_t)0xe70747c4, (q31_t)0x7d85759f, (q31_t)0xe6eea1e4, (q31_t)0x7d808728, (q31_t)0xe6d5fcfc, (q31_t)0x7d7b93da, (q31_t)0xe6bd590d,
+  (q31_t)0x7d769bb5, (q31_t)0xe6a4b616, (q31_t)0x7d719eba, (q31_t)0xe68c141a, (q31_t)0x7d6c9ce9, (q31_t)0xe6737319, (q31_t)0x7d679642, (q31_t)0xe65ad315,
+  (q31_t)0x7d628ac6, (q31_t)0xe642340d, (q31_t)0x7d5d7a74, (q31_t)0xe6299604, (q31_t)0x7d58654d, (q31_t)0xe610f8f9, (q31_t)0x7d534b50, (q31_t)0xe5f85cef,
+  (q31_t)0x7d4e2c7f, (q31_t)0xe5dfc1e5, (q31_t)0x7d4908d9, (q31_t)0xe5c727dd, (q31_t)0x7d43e05e, (q31_t)0xe5ae8ed8, (q31_t)0x7d3eb30f, (q31_t)0xe595f6d7,
+  (q31_t)0x7d3980ec, (q31_t)0xe57d5fda, (q31_t)0x7d3449f5, (q31_t)0xe564c9e3, (q31_t)0x7d2f0e2b, (q31_t)0xe54c34f3, (q31_t)0x7d29cd8c, (q31_t)0xe533a10a,
+  (q31_t)0x7d24881b, (q31_t)0xe51b0e2a, (q31_t)0x7d1f3dd6, (q31_t)0xe5027c53, (q31_t)0x7d19eebf, (q31_t)0xe4e9eb87, (q31_t)0x7d149ad5, (q31_t)0xe4d15bc6,
+  (q31_t)0x7d0f4218, (q31_t)0xe4b8cd11, (q31_t)0x7d09e489, (q31_t)0xe4a03f69, (q31_t)0x7d048228, (q31_t)0xe487b2d0, (q31_t)0x7cff1af5, (q31_t)0xe46f2745,
+  (q31_t)0x7cf9aef0, (q31_t)0xe4569ccb, (q31_t)0x7cf43e1a, (q31_t)0xe43e1362, (q31_t)0x7ceec873, (q31_t)0xe4258b0a, (q31_t)0x7ce94dfb, (q31_t)0xe40d03c6,
+  (q31_t)0x7ce3ceb2, (q31_t)0xe3f47d96, (q31_t)0x7cde4a98, (q31_t)0xe3dbf87a, (q31_t)0x7cd8c1ae, (q31_t)0xe3c37474, (q31_t)0x7cd333f3, (q31_t)0xe3aaf184,
+  (q31_t)0x7ccda169, (q31_t)0xe3926fad, (q31_t)0x7cc80a0f, (q31_t)0xe379eeed, (q31_t)0x7cc26de5, (q31_t)0xe3616f48, (q31_t)0x7cbcccec, (q31_t)0xe348f0bd,
+  (q31_t)0x7cb72724, (q31_t)0xe330734d, (q31_t)0x7cb17c8d, (q31_t)0xe317f6fa, (q31_t)0x7cabcd28, (q31_t)0xe2ff7bc3, (q31_t)0x7ca618f3, (q31_t)0xe2e701ac,
+  (q31_t)0x7ca05ff1, (q31_t)0xe2ce88b3, (q31_t)0x7c9aa221, (q31_t)0xe2b610da, (q31_t)0x7c94df83, (q31_t)0xe29d9a23, (q31_t)0x7c8f1817, (q31_t)0xe285248d,
+  (q31_t)0x7c894bde, (q31_t)0xe26cb01b, (q31_t)0x7c837ad8, (q31_t)0xe2543ccc, (q31_t)0x7c7da505, (q31_t)0xe23bcaa2, (q31_t)0x7c77ca65, (q31_t)0xe223599e,
+  (q31_t)0x7c71eaf9, (q31_t)0xe20ae9c1, (q31_t)0x7c6c06c0, (q31_t)0xe1f27b0b, (q31_t)0x7c661dbc, (q31_t)0xe1da0d7e, (q31_t)0x7c602fec, (q31_t)0xe1c1a11b,
+  (q31_t)0x7c5a3d50, (q31_t)0xe1a935e2, (q31_t)0x7c5445e9, (q31_t)0xe190cbd4, (q31_t)0x7c4e49b7, (q31_t)0xe17862f3, (q31_t)0x7c4848ba, (q31_t)0xe15ffb3f,
+  (q31_t)0x7c4242f2, (q31_t)0xe14794ba, (q31_t)0x7c3c3860, (q31_t)0xe12f2f63, (q31_t)0x7c362904, (q31_t)0xe116cb3d, (q31_t)0x7c3014de, (q31_t)0xe0fe6848,
+  (q31_t)0x7c29fbee, (q31_t)0xe0e60685, (q31_t)0x7c23de35, (q31_t)0xe0cda5f5, (q31_t)0x7c1dbbb3, (q31_t)0xe0b54698, (q31_t)0x7c179467, (q31_t)0xe09ce871,
+  (q31_t)0x7c116853, (q31_t)0xe0848b7f, (q31_t)0x7c0b3777, (q31_t)0xe06c2fc4, (q31_t)0x7c0501d2, (q31_t)0xe053d541, (q31_t)0x7bfec765, (q31_t)0xe03b7bf6,
+  (q31_t)0x7bf88830, (q31_t)0xe02323e5, (q31_t)0x7bf24434, (q31_t)0xe00acd0e, (q31_t)0x7bebfb70, (q31_t)0xdff27773, (q31_t)0x7be5ade6, (q31_t)0xdfda2314,
+  (q31_t)0x7bdf5b94, (q31_t)0xdfc1cff3, (q31_t)0x7bd9047c, (q31_t)0xdfa97e0f, (q31_t)0x7bd2a89e, (q31_t)0xdf912d6b, (q31_t)0x7bcc47fa, (q31_t)0xdf78de07,
+  (q31_t)0x7bc5e290, (q31_t)0xdf608fe4, (q31_t)0x7bbf7860, (q31_t)0xdf484302, (q31_t)0x7bb9096b, (q31_t)0xdf2ff764, (q31_t)0x7bb295b0, (q31_t)0xdf17ad0a,
+  (q31_t)0x7bac1d31, (q31_t)0xdeff63f4, (q31_t)0x7ba59fee, (q31_t)0xdee71c24, (q31_t)0x7b9f1de6, (q31_t)0xdeced59b, (q31_t)0x7b989719, (q31_t)0xdeb69059,
+  (q31_t)0x7b920b89, (q31_t)0xde9e4c60, (q31_t)0x7b8b7b36, (q31_t)0xde8609b1, (q31_t)0x7b84e61f, (q31_t)0xde6dc84b, (q31_t)0x7b7e4c45, (q31_t)0xde558831,
+  (q31_t)0x7b77ada8, (q31_t)0xde3d4964, (q31_t)0x7b710a49, (q31_t)0xde250be3, (q31_t)0x7b6a6227, (q31_t)0xde0ccfb1, (q31_t)0x7b63b543, (q31_t)0xddf494ce,
+  (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7b564d36, (q31_t)0xddc422f8, (q31_t)0x7b4f920e, (q31_t)0xddabec08, (q31_t)0x7b48d225, (q31_t)0xdd93b66a,
+  (q31_t)0x7b420d7a, (q31_t)0xdd7b8220, (q31_t)0x7b3b4410, (q31_t)0xdd634f2b, (q31_t)0x7b3475e5, (q31_t)0xdd4b1d8c, (q31_t)0x7b2da2fa, (q31_t)0xdd32ed43,
+  (q31_t)0x7b26cb4f, (q31_t)0xdd1abe51, (q31_t)0x7b1feee5, (q31_t)0xdd0290b8, (q31_t)0x7b190dbc, (q31_t)0xdcea6478, (q31_t)0x7b1227d3, (q31_t)0xdcd23993,
+  (q31_t)0x7b0b3d2c, (q31_t)0xdcba1008, (q31_t)0x7b044dc7, (q31_t)0xdca1e7da, (q31_t)0x7afd59a4, (q31_t)0xdc89c109, (q31_t)0x7af660c2, (q31_t)0xdc719b96,
+  (q31_t)0x7aef6323, (q31_t)0xdc597781, (q31_t)0x7ae860c7, (q31_t)0xdc4154cd, (q31_t)0x7ae159ae, (q31_t)0xdc293379, (q31_t)0x7ada4dd8, (q31_t)0xdc111388,
+  (q31_t)0x7ad33d45, (q31_t)0xdbf8f4f8, (q31_t)0x7acc27f7, (q31_t)0xdbe0d7cd, (q31_t)0x7ac50dec, (q31_t)0xdbc8bc06, (q31_t)0x7abdef25, (q31_t)0xdbb0a1a4,
+  (q31_t)0x7ab6cba4, (q31_t)0xdb9888a8, (q31_t)0x7aafa367, (q31_t)0xdb807114, (q31_t)0x7aa8766f, (q31_t)0xdb685ae9, (q31_t)0x7aa144bc, (q31_t)0xdb504626,
+  (q31_t)0x7a9a0e50, (q31_t)0xdb3832cd, (q31_t)0x7a92d329, (q31_t)0xdb2020e0, (q31_t)0x7a8b9348, (q31_t)0xdb08105e, (q31_t)0x7a844eae, (q31_t)0xdaf00149,
+  (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a75b74f, (q31_t)0xdabfe76a, (q31_t)0x7a6e648a, (q31_t)0xdaa7dca1, (q31_t)0x7a670d0d, (q31_t)0xda8fd349,
+  (q31_t)0x7a5fb0d8, (q31_t)0xda77cb63, (q31_t)0x7a584feb, (q31_t)0xda5fc4ef, (q31_t)0x7a50ea47, (q31_t)0xda47bfee, (q31_t)0x7a497feb, (q31_t)0xda2fbc61,
+  (q31_t)0x7a4210d8, (q31_t)0xda17ba4a, (q31_t)0x7a3a9d0f, (q31_t)0xd9ffb9a9, (q31_t)0x7a332490, (q31_t)0xd9e7ba7f, (q31_t)0x7a2ba75a, (q31_t)0xd9cfbccd,
+  (q31_t)0x7a24256f, (q31_t)0xd9b7c094, (q31_t)0x7a1c9ece, (q31_t)0xd99fc5d4, (q31_t)0x7a151378, (q31_t)0xd987cc90, (q31_t)0x7a0d836d, (q31_t)0xd96fd4c7,
+  (q31_t)0x7a05eead, (q31_t)0xd957de7a, (q31_t)0x79fe5539, (q31_t)0xd93fe9ab, (q31_t)0x79f6b711, (q31_t)0xd927f65b, (q31_t)0x79ef1436, (q31_t)0xd910048a,
+  (q31_t)0x79e76ca7, (q31_t)0xd8f81439, (q31_t)0x79dfc064, (q31_t)0xd8e0256a, (q31_t)0x79d80f6f, (q31_t)0xd8c8381d, (q31_t)0x79d059c8, (q31_t)0xd8b04c52,
+  (q31_t)0x79c89f6e, (q31_t)0xd898620c, (q31_t)0x79c0e062, (q31_t)0xd880794b, (q31_t)0x79b91ca4, (q31_t)0xd868920f, (q31_t)0x79b15435, (q31_t)0xd850ac5a,
+  (q31_t)0x79a98715, (q31_t)0xd838c82d, (q31_t)0x79a1b545, (q31_t)0xd820e589, (q31_t)0x7999dec4, (q31_t)0xd809046e, (q31_t)0x79920392, (q31_t)0xd7f124dd,
+  (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x79823f20, (q31_t)0xd7c16a5f, (q31_t)0x797a55e0, (q31_t)0xd7a98f73, (q31_t)0x797267f2, (q31_t)0xd791b616,
+  (q31_t)0x796a7554, (q31_t)0xd779de47, (q31_t)0x79627e08, (q31_t)0xd7620808, (q31_t)0x795a820e, (q31_t)0xd74a335b, (q31_t)0x79528167, (q31_t)0xd732603f,
+  (q31_t)0x794a7c12, (q31_t)0xd71a8eb5, (q31_t)0x79427210, (q31_t)0xd702bec0, (q31_t)0x793a6361, (q31_t)0xd6eaf05f, (q31_t)0x79325006, (q31_t)0xd6d32393,
+  (q31_t)0x792a37fe, (q31_t)0xd6bb585e, (q31_t)0x79221b4b, (q31_t)0xd6a38ec0, (q31_t)0x7919f9ec, (q31_t)0xd68bc6ba, (q31_t)0x7911d3e2, (q31_t)0xd674004e,
+  (q31_t)0x7909a92d, (q31_t)0xd65c3b7b, (q31_t)0x790179cd, (q31_t)0xd6447844, (q31_t)0x78f945c3, (q31_t)0xd62cb6a8, (q31_t)0x78f10d0f, (q31_t)0xd614f6a9,
+  (q31_t)0x78e8cfb2, (q31_t)0xd5fd3848, (q31_t)0x78e08dab, (q31_t)0xd5e57b85, (q31_t)0x78d846fb, (q31_t)0xd5cdc062, (q31_t)0x78cffba3, (q31_t)0xd5b606e0,
+  (q31_t)0x78c7aba2, (q31_t)0xd59e4eff, (q31_t)0x78bf56f9, (q31_t)0xd58698c0, (q31_t)0x78b6fda8, (q31_t)0xd56ee424, (q31_t)0x78ae9fb0, (q31_t)0xd557312d,
+  (q31_t)0x78a63d11, (q31_t)0xd53f7fda, (q31_t)0x789dd5cb, (q31_t)0xd527d02e, (q31_t)0x789569df, (q31_t)0xd5102228, (q31_t)0x788cf94c, (q31_t)0xd4f875ca,
+  (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x787c0a36, (q31_t)0xd4c92209, (q31_t)0x78738bb3, (q31_t)0xd4b17aa8, (q31_t)0x786b088c, (q31_t)0xd499d4f2,
+  (q31_t)0x786280bf, (q31_t)0xd48230e9, (q31_t)0x7859f44f, (q31_t)0xd46a8e8d, (q31_t)0x7851633b, (q31_t)0xd452eddf, (q31_t)0x7848cd83, (q31_t)0xd43b4ee0,
+  (q31_t)0x78403329, (q31_t)0xd423b191, (q31_t)0x7837942b, (q31_t)0xd40c15f3, (q31_t)0x782ef08b, (q31_t)0xd3f47c06, (q31_t)0x78264849, (q31_t)0xd3dce3cd,
+  (q31_t)0x781d9b65, (q31_t)0xd3c54d47, (q31_t)0x7814e9df, (q31_t)0xd3adb876, (q31_t)0x780c33b8, (q31_t)0xd396255a, (q31_t)0x780378f1, (q31_t)0xd37e93f4,
+  (q31_t)0x77fab989, (q31_t)0xd3670446, (q31_t)0x77f1f581, (q31_t)0xd34f764f, (q31_t)0x77e92cd9, (q31_t)0xd337ea12, (q31_t)0x77e05f91, (q31_t)0xd3205f8f,
+  (q31_t)0x77d78daa, (q31_t)0xd308d6c7, (q31_t)0x77ceb725, (q31_t)0xd2f14fba, (q31_t)0x77c5dc01, (q31_t)0xd2d9ca6a, (q31_t)0x77bcfc3f, (q31_t)0xd2c246d8,
+  (q31_t)0x77b417df, (q31_t)0xd2aac504, (q31_t)0x77ab2ee2, (q31_t)0xd29344f0, (q31_t)0x77a24148, (q31_t)0xd27bc69c, (q31_t)0x77994f11, (q31_t)0xd2644a0a,
+  (q31_t)0x7790583e, (q31_t)0xd24ccf39, (q31_t)0x77875cce, (q31_t)0xd235562b, (q31_t)0x777e5cc3, (q31_t)0xd21ddee2, (q31_t)0x7775581d, (q31_t)0xd206695d,
+  (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x776340ff, (q31_t)0xd1d783a6, (q31_t)0x775a2e89, (q31_t)0xd1c01375, (q31_t)0x77511778, (q31_t)0xd1a8a50d,
+  (q31_t)0x7747fbce, (q31_t)0xd191386e, (q31_t)0x773edb8b, (q31_t)0xd179cd99, (q31_t)0x7735b6af, (q31_t)0xd1626490, (q31_t)0x772c8d3a, (q31_t)0xd14afd52,
+  (q31_t)0x77235f2d, (q31_t)0xd13397e2, (q31_t)0x771a2c88, (q31_t)0xd11c343f, (q31_t)0x7710f54c, (q31_t)0xd104d26b, (q31_t)0x7707b979, (q31_t)0xd0ed7267,
+  (q31_t)0x76fe790e, (q31_t)0xd0d61434, (q31_t)0x76f5340e, (q31_t)0xd0beb7d2, (q31_t)0x76ebea77, (q31_t)0xd0a75d42, (q31_t)0x76e29c4b, (q31_t)0xd0900486,
+  (q31_t)0x76d94989, (q31_t)0xd078ad9e, (q31_t)0x76cff232, (q31_t)0xd061588b, (q31_t)0x76c69647, (q31_t)0xd04a054e, (q31_t)0x76bd35c7, (q31_t)0xd032b3e7,
+  (q31_t)0x76b3d0b4, (q31_t)0xd01b6459, (q31_t)0x76aa670d, (q31_t)0xd00416a3, (q31_t)0x76a0f8d2, (q31_t)0xcfeccac7, (q31_t)0x76978605, (q31_t)0xcfd580c6,
+  (q31_t)0x768e0ea6, (q31_t)0xcfbe389f, (q31_t)0x768492b4, (q31_t)0xcfa6f255, (q31_t)0x767b1231, (q31_t)0xcf8fade9, (q31_t)0x76718d1c, (q31_t)0xcf786b5a,
+  (q31_t)0x76680376, (q31_t)0xcf612aaa, (q31_t)0x765e7540, (q31_t)0xcf49ebda, (q31_t)0x7654e279, (q31_t)0xcf32aeeb, (q31_t)0x764b4b23, (q31_t)0xcf1b73de,
+  (q31_t)0x7641af3d, (q31_t)0xcf043ab3, (q31_t)0x76380ec8, (q31_t)0xceed036b, (q31_t)0x762e69c4, (q31_t)0xced5ce08, (q31_t)0x7624c031, (q31_t)0xcebe9a8a,
+  (q31_t)0x761b1211, (q31_t)0xcea768f2, (q31_t)0x76115f63, (q31_t)0xce903942, (q31_t)0x7607a828, (q31_t)0xce790b79, (q31_t)0x75fdec60, (q31_t)0xce61df99,
+  (q31_t)0x75f42c0b, (q31_t)0xce4ab5a2, (q31_t)0x75ea672a, (q31_t)0xce338d97, (q31_t)0x75e09dbd, (q31_t)0xce1c6777, (q31_t)0x75d6cfc5, (q31_t)0xce054343,
+  (q31_t)0x75ccfd42, (q31_t)0xcdee20fc, (q31_t)0x75c32634, (q31_t)0xcdd700a4, (q31_t)0x75b94a9c, (q31_t)0xcdbfe23a, (q31_t)0x75af6a7b, (q31_t)0xcda8c5c1,
+  (q31_t)0x75a585cf, (q31_t)0xcd91ab39, (q31_t)0x759b9c9b, (q31_t)0xcd7a92a2, (q31_t)0x7591aedd, (q31_t)0xcd637bfe, (q31_t)0x7587bc98, (q31_t)0xcd4c674d,
+  (q31_t)0x757dc5ca, (q31_t)0xcd355491, (q31_t)0x7573ca75, (q31_t)0xcd1e43ca, (q31_t)0x7569ca99, (q31_t)0xcd0734f9, (q31_t)0x755fc635, (q31_t)0xccf0281f,
+  (q31_t)0x7555bd4c, (q31_t)0xccd91d3d, (q31_t)0x754bafdc, (q31_t)0xccc21455, (q31_t)0x75419de7, (q31_t)0xccab0d65, (q31_t)0x7537876c, (q31_t)0xcc940871,
+  (q31_t)0x752d6c6c, (q31_t)0xcc7d0578, (q31_t)0x75234ce8, (q31_t)0xcc66047b, (q31_t)0x751928e0, (q31_t)0xcc4f057c, (q31_t)0x750f0054, (q31_t)0xcc38087b,
+  (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x74faa1b3, (q31_t)0xcc0a1477, (q31_t)0x74f06b9e, (q31_t)0xcbf31d75, (q31_t)0x74e63108, (q31_t)0xcbdc2876,
+  (q31_t)0x74dbf1ef, (q31_t)0xcbc53579, (q31_t)0x74d1ae55, (q31_t)0xcbae447f, (q31_t)0x74c7663a, (q31_t)0xcb97558a, (q31_t)0x74bd199f, (q31_t)0xcb80689a,
+  (q31_t)0x74b2c884, (q31_t)0xcb697db0, (q31_t)0x74a872e8, (q31_t)0xcb5294ce, (q31_t)0x749e18cd, (q31_t)0xcb3badf3, (q31_t)0x7493ba34, (q31_t)0xcb24c921,
+  (q31_t)0x7489571c, (q31_t)0xcb0de658, (q31_t)0x747eef85, (q31_t)0xcaf7059a, (q31_t)0x74748371, (q31_t)0xcae026e8, (q31_t)0x746a12df, (q31_t)0xcac94a42,
+  (q31_t)0x745f9dd1, (q31_t)0xcab26fa9, (q31_t)0x74552446, (q31_t)0xca9b971e, (q31_t)0x744aa63f, (q31_t)0xca84c0a3, (q31_t)0x744023bc, (q31_t)0xca6dec37,
+  (q31_t)0x74359cbd, (q31_t)0xca5719db, (q31_t)0x742b1144, (q31_t)0xca404992, (q31_t)0x74208150, (q31_t)0xca297b5a, (q31_t)0x7415ece2, (q31_t)0xca12af37,
+  (q31_t)0x740b53fb, (q31_t)0xc9fbe527, (q31_t)0x7400b69a, (q31_t)0xc9e51d2d, (q31_t)0x73f614c0, (q31_t)0xc9ce5748, (q31_t)0x73eb6e6e, (q31_t)0xc9b7937a,
+  (q31_t)0x73e0c3a3, (q31_t)0xc9a0d1c5, (q31_t)0x73d61461, (q31_t)0xc98a1227, (q31_t)0x73cb60a8, (q31_t)0xc97354a4, (q31_t)0x73c0a878, (q31_t)0xc95c993a,
+  (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x73ab2ab4, (q31_t)0xc92f28ba, (q31_t)0x73a06522, (q31_t)0xc91873a5, (q31_t)0x73959b1b, (q31_t)0xc901c0ae,
+  (q31_t)0x738acc9e, (q31_t)0xc8eb0fd6, (q31_t)0x737ff9ae, (q31_t)0xc8d4611d, (q31_t)0x73752249, (q31_t)0xc8bdb485, (q31_t)0x736a4671, (q31_t)0xc8a70a0e,
+  (q31_t)0x735f6626, (q31_t)0xc89061ba, (q31_t)0x73548168, (q31_t)0xc879bb89, (q31_t)0x73499838, (q31_t)0xc863177b, (q31_t)0x733eaa96, (q31_t)0xc84c7593,
+  (q31_t)0x7333b883, (q31_t)0xc835d5d0, (q31_t)0x7328c1ff, (q31_t)0xc81f3834, (q31_t)0x731dc70a, (q31_t)0xc8089cbf, (q31_t)0x7312c7a5, (q31_t)0xc7f20373,
+  (q31_t)0x7307c3d0, (q31_t)0xc7db6c50, (q31_t)0x72fcbb8c, (q31_t)0xc7c4d757, (q31_t)0x72f1aed9, (q31_t)0xc7ae4489, (q31_t)0x72e69db7, (q31_t)0xc797b3e7,
+  (q31_t)0x72db8828, (q31_t)0xc7812572, (q31_t)0x72d06e2b, (q31_t)0xc76a992a, (q31_t)0x72c54fc1, (q31_t)0xc7540f11, (q31_t)0x72ba2cea, (q31_t)0xc73d8727,
+  (q31_t)0x72af05a7, (q31_t)0xc727016d, (q31_t)0x72a3d9f7, (q31_t)0xc7107de4, (q31_t)0x7298a9dd, (q31_t)0xc6f9fc8d, (q31_t)0x728d7557, (q31_t)0xc6e37d69,
+  (q31_t)0x72823c67, (q31_t)0xc6cd0079, (q31_t)0x7276ff0d, (q31_t)0xc6b685bd, (q31_t)0x726bbd48, (q31_t)0xc6a00d37, (q31_t)0x7260771b, (q31_t)0xc68996e7,
+  (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x7249dd86, (q31_t)0xc65cb0ed, (q31_t)0x723e8a20, (q31_t)0xc6464144, (q31_t)0x72333251, (q31_t)0xc62fd3d6,
+  (q31_t)0x7227d61c, (q31_t)0xc61968a2, (q31_t)0x721c7580, (q31_t)0xc602ffaa, (q31_t)0x7211107e, (q31_t)0xc5ec98ee, (q31_t)0x7205a716, (q31_t)0xc5d6346f,
+  (q31_t)0x71fa3949, (q31_t)0xc5bfd22e, (q31_t)0x71eec716, (q31_t)0xc5a9722c, (q31_t)0x71e35080, (q31_t)0xc593146a, (q31_t)0x71d7d585, (q31_t)0xc57cb8e9,
+  (q31_t)0x71cc5626, (q31_t)0xc5665fa9, (q31_t)0x71c0d265, (q31_t)0xc55008ab, (q31_t)0x71b54a41, (q31_t)0xc539b3f1, (q31_t)0x71a9bdba, (q31_t)0xc523617a,
+  (q31_t)0x719e2cd2, (q31_t)0xc50d1149, (q31_t)0x71929789, (q31_t)0xc4f6c35d, (q31_t)0x7186fdde, (q31_t)0xc4e077b8, (q31_t)0x717b5fd3, (q31_t)0xc4ca2e5b,
+  (q31_t)0x716fbd68, (q31_t)0xc4b3e746, (q31_t)0x7164169d, (q31_t)0xc49da27a, (q31_t)0x71586b74, (q31_t)0xc4875ff9, (q31_t)0x714cbbeb, (q31_t)0xc4711fc2,
+  (q31_t)0x71410805, (q31_t)0xc45ae1d7, (q31_t)0x71354fc0, (q31_t)0xc444a639, (q31_t)0x7129931f, (q31_t)0xc42e6ce8, (q31_t)0x711dd220, (q31_t)0xc41835e6,
+  (q31_t)0x71120cc5, (q31_t)0xc4020133, (q31_t)0x7106430e, (q31_t)0xc3ebced0, (q31_t)0x70fa74fc, (q31_t)0xc3d59ebe, (q31_t)0x70eea28e, (q31_t)0xc3bf70fd,
+  (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x70d6f0a4, (q31_t)0xc3931c76, (q31_t)0x70cb1128, (q31_t)0xc37cf5b0, (q31_t)0x70bf2d53, (q31_t)0xc366d140,
+  (q31_t)0x70b34525, (q31_t)0xc350af26, (q31_t)0x70a7589f, (q31_t)0xc33a8f62, (q31_t)0x709b67c0, (q31_t)0xc32471f7, (q31_t)0x708f728b, (q31_t)0xc30e56e4,
+  (q31_t)0x708378ff, (q31_t)0xc2f83e2a, (q31_t)0x70777b1c, (q31_t)0xc2e227cb, (q31_t)0x706b78e3, (q31_t)0xc2cc13c7, (q31_t)0x705f7255, (q31_t)0xc2b6021f,
+  (q31_t)0x70536771, (q31_t)0xc29ff2d4, (q31_t)0x70475839, (q31_t)0xc289e5e7, (q31_t)0x703b44ad, (q31_t)0xc273db58, (q31_t)0x702f2ccd, (q31_t)0xc25dd329,
+  (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x7016f014, (q31_t)0xc231c9ec, (q31_t)0x700acb3c, (q31_t)0xc21bc8e1, (q31_t)0x6ffea212, (q31_t)0xc205ca38,
+  (q31_t)0x6ff27497, (q31_t)0xc1efcdf3, (q31_t)0x6fe642ca, (q31_t)0xc1d9d412, (q31_t)0x6fda0cae, (q31_t)0xc1c3dc97, (q31_t)0x6fcdd241, (q31_t)0xc1ade781,
+  (q31_t)0x6fc19385, (q31_t)0xc197f4d4, (q31_t)0x6fb5507a, (q31_t)0xc182048d, (q31_t)0x6fa90921, (q31_t)0xc16c16b0, (q31_t)0x6f9cbd79, (q31_t)0xc1562b3d,
+  (q31_t)0x6f906d84, (q31_t)0xc1404233, (q31_t)0x6f841942, (q31_t)0xc12a5b95, (q31_t)0x6f77c0b3, (q31_t)0xc1147764, (q31_t)0x6f6b63d8, (q31_t)0xc0fe959f,
+  (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6f529d40, (q31_t)0xc0d2d960, (q31_t)0x6f463383, (q31_t)0xc0bcfee7, (q31_t)0x6f39c57d, (q31_t)0xc0a726df,
+  (q31_t)0x6f2d532c, (q31_t)0xc0915148, (q31_t)0x6f20dc92, (q31_t)0xc07b7e23, (q31_t)0x6f1461b0, (q31_t)0xc065ad70, (q31_t)0x6f07e285, (q31_t)0xc04fdf32,
+  (q31_t)0x6efb5f12, (q31_t)0xc03a1368, (q31_t)0x6eeed758, (q31_t)0xc0244a14, (q31_t)0x6ee24b57, (q31_t)0xc00e8336, (q31_t)0x6ed5bb10, (q31_t)0xbff8bece,
+  (q31_t)0x6ec92683, (q31_t)0xbfe2fcdf, (q31_t)0x6ebc8db0, (q31_t)0xbfcd3d69, (q31_t)0x6eaff099, (q31_t)0xbfb7806c, (q31_t)0x6ea34f3d, (q31_t)0xbfa1c5ea,
+  (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3, (q31_t)0x6e89ffb9, (q31_t)0xbf765858, (q31_t)0x6e7d5193, (q31_t)0xbf60a54a, (q31_t)0x6e709f2a, (q31_t)0xbf4af4ba,
+  (q31_t)0x6e63e87f, (q31_t)0xbf3546a8, (q31_t)0x6e572d93, (q31_t)0xbf1f9b16, (q31_t)0x6e4a6e66, (q31_t)0xbf09f205, (q31_t)0x6e3daaf8, (q31_t)0xbef44b74,
+  (q31_t)0x6e30e34a, (q31_t)0xbedea765, (q31_t)0x6e24175c, (q31_t)0xbec905d9, (q31_t)0x6e174730, (q31_t)0xbeb366d1, (q31_t)0x6e0a72c5, (q31_t)0xbe9dca4e,
+  (q31_t)0x6dfd9a1c, (q31_t)0xbe88304f, (q31_t)0x6df0bd35, (q31_t)0xbe7298d7, (q31_t)0x6de3dc11, (q31_t)0xbe5d03e6, (q31_t)0x6dd6f6b1, (q31_t)0xbe47717c,
+  (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6dbd1f3c, (q31_t)0xbe1c5444, (q31_t)0x6db02d29, (q31_t)0xbe06c977, (q31_t)0x6da336dc, (q31_t)0xbdf14135,
+  (q31_t)0x6d963c54, (q31_t)0xbddbbb7f, (q31_t)0x6d893d93, (q31_t)0xbdc63856, (q31_t)0x6d7c3a98, (q31_t)0xbdb0b7bb, (q31_t)0x6d6f3365, (q31_t)0xbd9b39ad,
+  (q31_t)0x6d6227fa, (q31_t)0xbd85be30, (q31_t)0x6d551858, (q31_t)0xbd704542, (q31_t)0x6d48047e, (q31_t)0xbd5acee5, (q31_t)0x6d3aec6e, (q31_t)0xbd455b1a,
+  (q31_t)0x6d2dd027, (q31_t)0xbd2fe9e2, (q31_t)0x6d20afac, (q31_t)0xbd1a7b3d, (q31_t)0x6d138afb, (q31_t)0xbd050f2c, (q31_t)0x6d066215, (q31_t)0xbcefa5b0,
+  (q31_t)0x6cf934fc, (q31_t)0xbcda3ecb, (q31_t)0x6cec03af, (q31_t)0xbcc4da7b, (q31_t)0x6cdece2f, (q31_t)0xbcaf78c4, (q31_t)0x6cd1947c, (q31_t)0xbc9a19a5,
+  (q31_t)0x6cc45698, (q31_t)0xbc84bd1f, (q31_t)0x6cb71482, (q31_t)0xbc6f6333, (q31_t)0x6ca9ce3b, (q31_t)0xbc5a0be2, (q31_t)0x6c9c83c3, (q31_t)0xbc44b72c,
+  (q31_t)0x6c8f351c, (q31_t)0xbc2f6513, (q31_t)0x6c81e245, (q31_t)0xbc1a1598, (q31_t)0x6c748b3f, (q31_t)0xbc04c8ba, (q31_t)0x6c67300b, (q31_t)0xbbef7e7c,
+  (q31_t)0x6c59d0a9, (q31_t)0xbbda36dd, (q31_t)0x6c4c6d1a, (q31_t)0xbbc4f1df, (q31_t)0x6c3f055d, (q31_t)0xbbafaf82, (q31_t)0x6c319975, (q31_t)0xbb9a6fc7,
+  (q31_t)0x6c242960, (q31_t)0xbb8532b0, (q31_t)0x6c16b521, (q31_t)0xbb6ff83c, (q31_t)0x6c093cb6, (q31_t)0xbb5ac06d, (q31_t)0x6bfbc021, (q31_t)0xbb458b43,
+  (q31_t)0x6bee3f62, (q31_t)0xbb3058c0, (q31_t)0x6be0ba7b, (q31_t)0xbb1b28e4, (q31_t)0x6bd3316a, (q31_t)0xbb05fbb0, (q31_t)0x6bc5a431, (q31_t)0xbaf0d125,
+  (q31_t)0x6bb812d1, (q31_t)0xbadba943, (q31_t)0x6baa7d49, (q31_t)0xbac6840c, (q31_t)0x6b9ce39b, (q31_t)0xbab16180, (q31_t)0x6b8f45c7, (q31_t)0xba9c41a0,
+  (q31_t)0x6b81a3cd, (q31_t)0xba87246d, (q31_t)0x6b73fdae, (q31_t)0xba7209e7, (q31_t)0x6b66536b, (q31_t)0xba5cf210, (q31_t)0x6b58a503, (q31_t)0xba47dce8,
+  (q31_t)0x6b4af279, (q31_t)0xba32ca71, (q31_t)0x6b3d3bcb, (q31_t)0xba1dbaaa, (q31_t)0x6b2f80fb, (q31_t)0xba08ad95, (q31_t)0x6b21c208, (q31_t)0xb9f3a332,
+  (q31_t)0x6b13fef5, (q31_t)0xb9de9b83, (q31_t)0x6b0637c1, (q31_t)0xb9c99688, (q31_t)0x6af86c6c, (q31_t)0xb9b49442, (q31_t)0x6aea9cf8, (q31_t)0xb99f94b2,
+  (q31_t)0x6adcc964, (q31_t)0xb98a97d8, (q31_t)0x6acef1b2, (q31_t)0xb9759db6, (q31_t)0x6ac115e2, (q31_t)0xb960a64c, (q31_t)0x6ab335f4, (q31_t)0xb94bb19b,
+  (q31_t)0x6aa551e9, (q31_t)0xb936bfa4, (q31_t)0x6a9769c1, (q31_t)0xb921d067, (q31_t)0x6a897d7d, (q31_t)0xb90ce3e6, (q31_t)0x6a7b8d1e, (q31_t)0xb8f7fa21,
+  (q31_t)0x6a6d98a4, (q31_t)0xb8e31319, (q31_t)0x6a5fa010, (q31_t)0xb8ce2ecf, (q31_t)0x6a51a361, (q31_t)0xb8b94d44, (q31_t)0x6a43a29a, (q31_t)0xb8a46e78,
+  (q31_t)0x6a359db9, (q31_t)0xb88f926d, (q31_t)0x6a2794c1, (q31_t)0xb87ab922, (q31_t)0x6a1987b0, (q31_t)0xb865e299, (q31_t)0x6a0b7689, (q31_t)0xb8510ed4,
+  (q31_t)0x69fd614a, (q31_t)0xb83c3dd1, (q31_t)0x69ef47f6, (q31_t)0xb8276f93, (q31_t)0x69e12a8c, (q31_t)0xb812a41a, (q31_t)0x69d3090e, (q31_t)0xb7fddb67,
+  (q31_t)0x69c4e37a, (q31_t)0xb7e9157a, (q31_t)0x69b6b9d3, (q31_t)0xb7d45255, (q31_t)0x69a88c19, (q31_t)0xb7bf91f8, (q31_t)0x699a5a4c, (q31_t)0xb7aad465,
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+  (q31_t)0x42244481, (q31_t)0x9269c3ac, (q31_t)0x420ebecb, (q31_t)0x925cc924, (q31_t)0x41f93689, (q31_t)0x924fd2d7, (q31_t)0x41e3abbc, (q31_t)0x9242e0c4,
+  (q31_t)0x41ce1e65, (q31_t)0x9235f2ec, (q31_t)0x41b88e84, (q31_t)0x9229094f, (q31_t)0x41a2fc1a, (q31_t)0x921c23ef, (q31_t)0x418d6729, (q31_t)0x920f42cb,
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+  (q31_t)0x40cab958, (q31_t)0x919c1781, (q31_t)0x40b50b46, (q31_t)0x918f60d6, (q31_t)0x409f5ab6, (q31_t)0x9182ae6d, (q31_t)0x4089a7a8, (q31_t)0x91760047,
+  (q31_t)0x4073f21d, (q31_t)0x91695663, (q31_t)0x405e3a16, (q31_t)0x915cb0c3, (q31_t)0x40487f94, (q31_t)0x91500f67, (q31_t)0x4032c297, (q31_t)0x91437250,
+  (q31_t)0x401d0321, (q31_t)0x9136d97d, (q31_t)0x40074132, (q31_t)0x912a44f0, (q31_t)0x3ff17cca, (q31_t)0x911db4a9, (q31_t)0x3fdbb5ec, (q31_t)0x911128a8,
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+  (q31_t)0x3f1749b8, (q31_t)0x90a0fd4e, (q31_t)0x3f016a61, (q31_t)0x90949c28, (q31_t)0x3eeb889c, (q31_t)0x90883f4d, (q31_t)0x3ed5a46b, (q31_t)0x907be6be,
+  (q31_t)0x3ebfbdcd, (q31_t)0x906f927c, (q31_t)0x3ea9d4c3, (q31_t)0x90634287, (q31_t)0x3e93e950, (q31_t)0x9056f6df, (q31_t)0x3e7dfb73, (q31_t)0x904aaf86,
+  (q31_t)0x3e680b2c, (q31_t)0x903e6c7b, (q31_t)0x3e52187f, (q31_t)0x90322dbf, (q31_t)0x3e3c2369, (q31_t)0x9025f352, (q31_t)0x3e262bee, (q31_t)0x9019bd36,
+  (q31_t)0x3e10320d, (q31_t)0x900d8b69, (q31_t)0x3dfa35c8, (q31_t)0x90015dee, (q31_t)0x3de4371f, (q31_t)0x8ff534c4, (q31_t)0x3dce3614, (q31_t)0x8fe90fec,
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+  (q31_t)0x3d600d2c, (q31_t)0x8fac988f, (q31_t)0x3d49fde1, (q31_t)0x8fa08dab, (q31_t)0x3d33ec39, (q31_t)0x8f94871d, (q31_t)0x3d1dd835, (q31_t)0x8f8884e4,
+  (q31_t)0x3d07c1d6, (q31_t)0x8f7c8701, (q31_t)0x3cf1a91c, (q31_t)0x8f708d75, (q31_t)0x3cdb8e09, (q31_t)0x8f649840, (q31_t)0x3cc5709e, (q31_t)0x8f58a761,
+  (q31_t)0x3caf50da, (q31_t)0x8f4cbadb, (q31_t)0x3c992ec0, (q31_t)0x8f40d2ad, (q31_t)0x3c830a50, (q31_t)0x8f34eed8, (q31_t)0x3c6ce38a, (q31_t)0x8f290f5c,
+  (q31_t)0x3c56ba70, (q31_t)0x8f1d343a, (q31_t)0x3c408f03, (q31_t)0x8f115d72, (q31_t)0x3c2a6142, (q31_t)0x8f058b04, (q31_t)0x3c143130, (q31_t)0x8ef9bcf2,
+  (q31_t)0x3bfdfecd, (q31_t)0x8eedf33b, (q31_t)0x3be7ca1a, (q31_t)0x8ee22de0, (q31_t)0x3bd19318, (q31_t)0x8ed66ce1, (q31_t)0x3bbb59c7, (q31_t)0x8ecab040,
+  (q31_t)0x3ba51e29, (q31_t)0x8ebef7fb, (q31_t)0x3b8ee03e, (q31_t)0x8eb34415, (q31_t)0x3b78a007, (q31_t)0x8ea7948c, (q31_t)0x3b625d86, (q31_t)0x8e9be963,
+  (q31_t)0x3b4c18ba, (q31_t)0x8e904298, (q31_t)0x3b35d1a5, (q31_t)0x8e84a02d, (q31_t)0x3b1f8848, (q31_t)0x8e790222, (q31_t)0x3b093ca3, (q31_t)0x8e6d6877,
+  (q31_t)0x3af2eeb7, (q31_t)0x8e61d32e, (q31_t)0x3adc9e86, (q31_t)0x8e564246, (q31_t)0x3ac64c0f, (q31_t)0x8e4ab5bf, (q31_t)0x3aaff755, (q31_t)0x8e3f2d9b,
+  (q31_t)0x3a99a057, (q31_t)0x8e33a9da, (q31_t)0x3a834717, (q31_t)0x8e282a7b, (q31_t)0x3a6ceb96, (q31_t)0x8e1caf80, (q31_t)0x3a568dd4, (q31_t)0x8e1138ea,
+  (q31_t)0x3a402dd2, (q31_t)0x8e05c6b7, (q31_t)0x3a29cb91, (q31_t)0x8dfa58ea, (q31_t)0x3a136712, (q31_t)0x8deeef82, (q31_t)0x39fd0056, (q31_t)0x8de38a80,
+  (q31_t)0x39e6975e, (q31_t)0x8dd829e4, (q31_t)0x39d02c2a, (q31_t)0x8dcccdaf, (q31_t)0x39b9bebc, (q31_t)0x8dc175e0, (q31_t)0x39a34f13, (q31_t)0x8db6227a,
+  (q31_t)0x398cdd32, (q31_t)0x8daad37b, (q31_t)0x39766919, (q31_t)0x8d9f88e5, (q31_t)0x395ff2c9, (q31_t)0x8d9442b8, (q31_t)0x39497a43, (q31_t)0x8d8900f3,
+  (q31_t)0x3932ff87, (q31_t)0x8d7dc399, (q31_t)0x391c8297, (q31_t)0x8d728aa9, (q31_t)0x39060373, (q31_t)0x8d675623, (q31_t)0x38ef821c, (q31_t)0x8d5c2609,
+  (q31_t)0x38d8fe93, (q31_t)0x8d50fa59, (q31_t)0x38c278d9, (q31_t)0x8d45d316, (q31_t)0x38abf0ef, (q31_t)0x8d3ab03f, (q31_t)0x389566d6, (q31_t)0x8d2f91d5,
+  (q31_t)0x387eda8e, (q31_t)0x8d2477d8, (q31_t)0x38684c19, (q31_t)0x8d196249, (q31_t)0x3851bb77, (q31_t)0x8d0e5127, (q31_t)0x383b28a9, (q31_t)0x8d034474,
+  (q31_t)0x382493b0, (q31_t)0x8cf83c30, (q31_t)0x380dfc8d, (q31_t)0x8ced385b, (q31_t)0x37f76341, (q31_t)0x8ce238f6, (q31_t)0x37e0c7cc, (q31_t)0x8cd73e01,
+  (q31_t)0x37ca2a30, (q31_t)0x8ccc477d, (q31_t)0x37b38a6d, (q31_t)0x8cc1556a, (q31_t)0x379ce885, (q31_t)0x8cb667c8, (q31_t)0x37864477, (q31_t)0x8cab7e98,
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+  (q31_t)0x36ba2014, (q31_t)0x8c4a142f, (q31_t)0x36a366c6, (q31_t)0x8c3f5788, (q31_t)0x368cab5c, (q31_t)0x8c349f58, (q31_t)0x3675edd9, (q31_t)0x8c29eb9f,
+  (q31_t)0x365f2e3b, (q31_t)0x8c1f3c5d, (q31_t)0x36486c86, (q31_t)0x8c149192, (q31_t)0x3631a8b8, (q31_t)0x8c09eb40, (q31_t)0x361ae2d3, (q31_t)0x8bff4966,
+  (q31_t)0x36041ad9, (q31_t)0x8bf4ac05, (q31_t)0x35ed50c9, (q31_t)0x8bea131e, (q31_t)0x35d684a6, (q31_t)0x8bdf7eb0, (q31_t)0x35bfb66e, (q31_t)0x8bd4eebc,
+  (q31_t)0x35a8e625, (q31_t)0x8bca6343, (q31_t)0x359213c9, (q31_t)0x8bbfdc44, (q31_t)0x357b3f5d, (q31_t)0x8bb559c1, (q31_t)0x356468e2, (q31_t)0x8baadbba,
+  (q31_t)0x354d9057, (q31_t)0x8ba0622f, (q31_t)0x3536b5be, (q31_t)0x8b95ed21, (q31_t)0x351fd918, (q31_t)0x8b8b7c8f, (q31_t)0x3508fa66, (q31_t)0x8b81107b,
+  (q31_t)0x34f219a8, (q31_t)0x8b76a8e4, (q31_t)0x34db36df, (q31_t)0x8b6c45cc, (q31_t)0x34c4520d, (q31_t)0x8b61e733, (q31_t)0x34ad6b32, (q31_t)0x8b578d18,
+  (q31_t)0x34968250, (q31_t)0x8b4d377c, (q31_t)0x347f9766, (q31_t)0x8b42e661, (q31_t)0x3468aa76, (q31_t)0x8b3899c6, (q31_t)0x3451bb81, (q31_t)0x8b2e51ab,
+  (q31_t)0x343aca87, (q31_t)0x8b240e11, (q31_t)0x3423d78a, (q31_t)0x8b19cef8, (q31_t)0x340ce28b, (q31_t)0x8b0f9462, (q31_t)0x33f5eb89, (q31_t)0x8b055e4d,
+  (q31_t)0x33def287, (q31_t)0x8afb2cbb, (q31_t)0x33c7f785, (q31_t)0x8af0ffac, (q31_t)0x33b0fa84, (q31_t)0x8ae6d720, (q31_t)0x3399fb85, (q31_t)0x8adcb318,
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+  (q31_t)0x3326e2c3, (q31_t)0x8aaa42b4, (q31_t)0x330fd7e1, (q31_t)0x8aa039cb, (q31_t)0x32f8cb07, (q31_t)0x8a963567, (q31_t)0x32e1bc36, (q31_t)0x8a8c358b,
+  (q31_t)0x32caab6f, (q31_t)0x8a823a36, (q31_t)0x32b398b3, (q31_t)0x8a784368, (q31_t)0x329c8402, (q31_t)0x8a6e5123, (q31_t)0x32856d5e, (q31_t)0x8a646365,
+  (q31_t)0x326e54c7, (q31_t)0x8a5a7a31, (q31_t)0x32573a3f, (q31_t)0x8a509585, (q31_t)0x32401dc6, (q31_t)0x8a46b564, (q31_t)0x3228ff5c, (q31_t)0x8a3cd9cc,
+  (q31_t)0x3211df04, (q31_t)0x8a3302be, (q31_t)0x31fabcbd, (q31_t)0x8a29303b, (q31_t)0x31e39889, (q31_t)0x8a1f6243, (q31_t)0x31cc7269, (q31_t)0x8a1598d6,
+  (q31_t)0x31b54a5e, (q31_t)0x8a0bd3f5, (q31_t)0x319e2067, (q31_t)0x8a0213a0, (q31_t)0x3186f487, (q31_t)0x89f857d8, (q31_t)0x316fc6be, (q31_t)0x89eea09d,
+  (q31_t)0x3158970e, (q31_t)0x89e4edef, (q31_t)0x31416576, (q31_t)0x89db3fcf, (q31_t)0x312a31f8, (q31_t)0x89d1963c, (q31_t)0x3112fc95, (q31_t)0x89c7f138,
+  (q31_t)0x30fbc54d, (q31_t)0x89be50c3, (q31_t)0x30e48c22, (q31_t)0x89b4b4dd, (q31_t)0x30cd5115, (q31_t)0x89ab1d87, (q31_t)0x30b61426, (q31_t)0x89a18ac0,
+  (q31_t)0x309ed556, (q31_t)0x8997fc8a, (q31_t)0x308794a6, (q31_t)0x898e72e4, (q31_t)0x30705217, (q31_t)0x8984edcf, (q31_t)0x30590dab, (q31_t)0x897b6d4c,
+  (q31_t)0x3041c761, (q31_t)0x8971f15a, (q31_t)0x302a7f3a, (q31_t)0x896879fb, (q31_t)0x30133539, (q31_t)0x895f072e, (q31_t)0x2ffbe95d, (q31_t)0x895598f3,
+  (q31_t)0x2fe49ba7, (q31_t)0x894c2f4c, (q31_t)0x2fcd4c19, (q31_t)0x8942ca39, (q31_t)0x2fb5fab2, (q31_t)0x893969b9, (q31_t)0x2f9ea775, (q31_t)0x89300dce,
+  (q31_t)0x2f875262, (q31_t)0x8926b677, (q31_t)0x2f6ffb7a, (q31_t)0x891d63b5, (q31_t)0x2f58a2be, (q31_t)0x89141589, (q31_t)0x2f41482e, (q31_t)0x890acbf2,
+  (q31_t)0x2f29ebcc, (q31_t)0x890186f2, (q31_t)0x2f128d99, (q31_t)0x88f84687, (q31_t)0x2efb2d95, (q31_t)0x88ef0ab4, (q31_t)0x2ee3cbc1, (q31_t)0x88e5d378,
+  (q31_t)0x2ecc681e, (q31_t)0x88dca0d3, (q31_t)0x2eb502ae, (q31_t)0x88d372c6, (q31_t)0x2e9d9b70, (q31_t)0x88ca4951, (q31_t)0x2e863267, (q31_t)0x88c12475,
+  (q31_t)0x2e6ec792, (q31_t)0x88b80432, (q31_t)0x2e575af3, (q31_t)0x88aee888, (q31_t)0x2e3fec8b, (q31_t)0x88a5d177, (q31_t)0x2e287c5a, (q31_t)0x889cbf01,
+  (q31_t)0x2e110a62, (q31_t)0x8893b125, (q31_t)0x2df996a3, (q31_t)0x888aa7e3, (q31_t)0x2de2211e, (q31_t)0x8881a33d, (q31_t)0x2dcaa9d5, (q31_t)0x8878a332,
+  (q31_t)0x2db330c7, (q31_t)0x886fa7c2, (q31_t)0x2d9bb5f6, (q31_t)0x8866b0ef, (q31_t)0x2d843964, (q31_t)0x885dbeb8, (q31_t)0x2d6cbb10, (q31_t)0x8854d11e,
+  (q31_t)0x2d553afc, (q31_t)0x884be821, (q31_t)0x2d3db928, (q31_t)0x884303c1, (q31_t)0x2d263596, (q31_t)0x883a23ff, (q31_t)0x2d0eb046, (q31_t)0x883148db,
+  (q31_t)0x2cf72939, (q31_t)0x88287256, (q31_t)0x2cdfa071, (q31_t)0x881fa06f, (q31_t)0x2cc815ee, (q31_t)0x8816d327, (q31_t)0x2cb089b1, (q31_t)0x880e0a7f,
+  (q31_t)0x2c98fbba, (q31_t)0x88054677, (q31_t)0x2c816c0c, (q31_t)0x87fc870f, (q31_t)0x2c69daa6, (q31_t)0x87f3cc48, (q31_t)0x2c52478a, (q31_t)0x87eb1621,
+  (q31_t)0x2c3ab2b9, (q31_t)0x87e2649b, (q31_t)0x2c231c33, (q31_t)0x87d9b7b7, (q31_t)0x2c0b83fa, (q31_t)0x87d10f75, (q31_t)0x2bf3ea0d, (q31_t)0x87c86bd5,
+  (q31_t)0x2bdc4e6f, (q31_t)0x87bfccd7, (q31_t)0x2bc4b120, (q31_t)0x87b7327d, (q31_t)0x2bad1221, (q31_t)0x87ae9cc5, (q31_t)0x2b957173, (q31_t)0x87a60bb1,
+  (q31_t)0x2b7dcf17, (q31_t)0x879d7f41, (q31_t)0x2b662b0e, (q31_t)0x8794f774, (q31_t)0x2b4e8558, (q31_t)0x878c744d, (q31_t)0x2b36ddf7, (q31_t)0x8783f5ca,
+  (q31_t)0x2b1f34eb, (q31_t)0x877b7bec, (q31_t)0x2b078a36, (q31_t)0x877306b4, (q31_t)0x2aefddd8, (q31_t)0x876a9621, (q31_t)0x2ad82fd2, (q31_t)0x87622a35,
+  (q31_t)0x2ac08026, (q31_t)0x8759c2ef, (q31_t)0x2aa8ced3, (q31_t)0x87516050, (q31_t)0x2a911bdc, (q31_t)0x87490258, (q31_t)0x2a796740, (q31_t)0x8740a907,
+  (q31_t)0x2a61b101, (q31_t)0x8738545e, (q31_t)0x2a49f920, (q31_t)0x8730045d, (q31_t)0x2a323f9e, (q31_t)0x8727b905, (q31_t)0x2a1a847b, (q31_t)0x871f7255,
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+  (q31_t)0x24c7cd33, (q31_t)0x8565f1b0, (q31_t)0x24afb9da, (q31_t)0x855ebb44, (q31_t)0x2497a517, (q31_t)0x85578991, (q31_t)0x247f8eec, (q31_t)0x85505c99,
+  (q31_t)0x24677758, (q31_t)0x8549345c, (q31_t)0x244f5e5c, (q31_t)0x854210db, (q31_t)0x243743fa, (q31_t)0x853af214, (q31_t)0x241f2833, (q31_t)0x8533d809,
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+  (q31_t)0x209f701c, (q31_t)0x843a1d70, (q31_t)0x208721f9, (q31_t)0x8433b806, (q31_t)0x206ed295, (q31_t)0x842d5762, (q31_t)0x205681f1, (q31_t)0x8426fb84,
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+  (q31_t)0x1ba96335, (q31_t)0x83065110, (q31_t)0x1b90d8bb, (q31_t)0x8300e50b, (q31_t)0x1b784d30, (q31_t)0x82fb7dd8, (q31_t)0x1b5fc097, (q31_t)0x82f61b77,
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+  (q31_t)0x1ae4f1d6, (q31_t)0x82db77e5, (q31_t)0x1acc5ef6, (q31_t)0x82d63274, (q31_t)0x1ab3cb0d, (q31_t)0x82d0f1d5, (q31_t)0x1a9b361d, (q31_t)0x82cbb60b,
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+  (q31_t)0x17d0a7bc, (q31_t)0x823c26f3, (q31_t)0x17b7f5a3, (q31_t)0x82377c4c, (q31_t)0x179f429f, (q31_t)0x8232d67f, (q31_t)0x17868eb3, (q31_t)0x822e358b,
+  (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x17552422, (q31_t)0x82250232, (q31_t)0x173c6d80, (q31_t)0x82206fcc, (q31_t)0x1723b5f9, (q31_t)0x821be240,
+  (q31_t)0x170afd8d, (q31_t)0x82175990, (q31_t)0x16f2443e, (q31_t)0x8212d5b9, (q31_t)0x16d98a0c, (q31_t)0x820e56be, (q31_t)0x16c0cef9, (q31_t)0x8209dc9e,
+  (q31_t)0x16a81305, (q31_t)0x82056758, (q31_t)0x168f5632, (q31_t)0x8200f6ef, (q31_t)0x1676987f, (q31_t)0x81fc8b60, (q31_t)0x165dd9f0, (q31_t)0x81f824ae,
+  (q31_t)0x16451a83, (q31_t)0x81f3c2d7, (q31_t)0x162c5a3b, (q31_t)0x81ef65dc, (q31_t)0x16139918, (q31_t)0x81eb0dbe, (q31_t)0x15fad71b, (q31_t)0x81e6ba7c,
+  (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x15c95097, (q31_t)0x81de228d, (q31_t)0x15b08c12, (q31_t)0x81d9dde1, (q31_t)0x1597c6b7, (q31_t)0x81d59e13,
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+  (q31_t)0x151bdf86, (q31_t)0x81c0a801, (q31_t)0x1503153a, (q31_t)0x81bc8564, (q31_t)0x14ea4a1f, (q31_t)0x81b867a5, (q31_t)0x14d17e36, (q31_t)0x81b44ec4,
+  (q31_t)0x14b8b17f, (q31_t)0x81b03ac2, (q31_t)0x149fe3fc, (q31_t)0x81ac2b9e, (q31_t)0x148715ae, (q31_t)0x81a82159, (q31_t)0x146e4694, (q31_t)0x81a41bf4,
+  (q31_t)0x145576b1, (q31_t)0x81a01b6d, (q31_t)0x143ca605, (q31_t)0x819c1fc5, (q31_t)0x1423d492, (q31_t)0x819828fd, (q31_t)0x140b0258, (q31_t)0x81943715,
+  (q31_t)0x13f22f58, (q31_t)0x81904a0c, (q31_t)0x13d95b93, (q31_t)0x818c61e3, (q31_t)0x13c0870a, (q31_t)0x81887e9a, (q31_t)0x13a7b1bf, (q31_t)0x8184a032,
+  (q31_t)0x138edbb1, (q31_t)0x8180c6a9, (q31_t)0x137604e2, (q31_t)0x817cf201, (q31_t)0x135d2d53, (q31_t)0x8179223a, (q31_t)0x13445505, (q31_t)0x81755754,
+  (q31_t)0x132b7bf9, (q31_t)0x8171914e, (q31_t)0x1312a230, (q31_t)0x816dd02a, (q31_t)0x12f9c7aa, (q31_t)0x816a13e6, (q31_t)0x12e0ec6a, (q31_t)0x81665c84,
+  (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x12af33ba, (q31_t)0x815efc65, (q31_t)0x1296564d, (q31_t)0x815b53a8, (q31_t)0x127d7829, (q31_t)0x8157afcd,
+  (q31_t)0x1264994e, (q31_t)0x815410d4, (q31_t)0x124bb9be, (q31_t)0x815076bd, (q31_t)0x1232d979, (q31_t)0x814ce188, (q31_t)0x1219f880, (q31_t)0x81495136,
+  (q31_t)0x120116d5, (q31_t)0x8145c5c7, (q31_t)0x11e83478, (q31_t)0x81423f3a, (q31_t)0x11cf516a, (q31_t)0x813ebd90, (q31_t)0x11b66dad, (q31_t)0x813b40ca,
+  (q31_t)0x119d8941, (q31_t)0x8137c8e6, (q31_t)0x1184a427, (q31_t)0x813455e6, (q31_t)0x116bbe60, (q31_t)0x8130e7c9, (q31_t)0x1152d7ed, (q31_t)0x812d7e8f,
+  (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x11210907, (q31_t)0x8126bac8, (q31_t)0x11082096, (q31_t)0x8123603a, (q31_t)0x10ef377d, (q31_t)0x81200a90,
+  (q31_t)0x10d64dbd, (q31_t)0x811cb9ca, (q31_t)0x10bd6356, (q31_t)0x81196de9, (q31_t)0x10a4784b, (q31_t)0x811626ec, (q31_t)0x108b8c9b, (q31_t)0x8112e4d4,
+  (q31_t)0x1072a048, (q31_t)0x810fa7a0, (q31_t)0x1059b352, (q31_t)0x810c6f52, (q31_t)0x1040c5bb, (q31_t)0x81093be8, (q31_t)0x1027d784, (q31_t)0x81060d63,
+  (q31_t)0x100ee8ad, (q31_t)0x8102e3c4, (q31_t)0xff5f938, (q31_t)0x80ffbf0a, (q31_t)0xfdd0926, (q31_t)0x80fc9f35, (q31_t)0xfc41876, (q31_t)0x80f98446,
+  (q31_t)0xfab272b, (q31_t)0x80f66e3c, (q31_t)0xf923546, (q31_t)0x80f35d19, (q31_t)0xf7942c7, (q31_t)0x80f050db, (q31_t)0xf604faf, (q31_t)0x80ed4984,
+  (q31_t)0xf475bff, (q31_t)0x80ea4712, (q31_t)0xf2e67b8, (q31_t)0x80e74987, (q31_t)0xf1572dc, (q31_t)0x80e450e2, (q31_t)0xefc7d6b, (q31_t)0x80e15d24,
+  (q31_t)0xee38766, (q31_t)0x80de6e4c, (q31_t)0xeca90ce, (q31_t)0x80db845b, (q31_t)0xeb199a4, (q31_t)0x80d89f51, (q31_t)0xe98a1e9, (q31_t)0x80d5bf2e,
+  (q31_t)0xe7fa99e, (q31_t)0x80d2e3f2, (q31_t)0xe66b0c3, (q31_t)0x80d00d9d, (q31_t)0xe4db75b, (q31_t)0x80cd3c2f, (q31_t)0xe34bd66, (q31_t)0x80ca6fa9,
+  (q31_t)0xe1bc2e4, (q31_t)0x80c7a80a, (q31_t)0xe02c7d7, (q31_t)0x80c4e553, (q31_t)0xde9cc40, (q31_t)0x80c22784, (q31_t)0xdd0d01f, (q31_t)0x80bf6e9c,
+  (q31_t)0xdb7d376, (q31_t)0x80bcba9d, (q31_t)0xd9ed646, (q31_t)0x80ba0b85, (q31_t)0xd85d88f, (q31_t)0x80b76156, (q31_t)0xd6cda53, (q31_t)0x80b4bc0e,
+  (q31_t)0xd53db92, (q31_t)0x80b21baf, (q31_t)0xd3adc4e, (q31_t)0x80af8039, (q31_t)0xd21dc87, (q31_t)0x80ace9ab, (q31_t)0xd08dc3f, (q31_t)0x80aa5806,
+  (q31_t)0xcefdb76, (q31_t)0x80a7cb49, (q31_t)0xcd6da2d, (q31_t)0x80a54376, (q31_t)0xcbdd865, (q31_t)0x80a2c08b, (q31_t)0xca4d620, (q31_t)0x80a04289,
+  (q31_t)0xc8bd35e, (q31_t)0x809dc971, (q31_t)0xc72d020, (q31_t)0x809b5541, (q31_t)0xc59cc68, (q31_t)0x8098e5fb, (q31_t)0xc40c835, (q31_t)0x80967b9f,
+  (q31_t)0xc27c389, (q31_t)0x8094162c, (q31_t)0xc0ebe66, (q31_t)0x8091b5a2, (q31_t)0xbf5b8cb, (q31_t)0x808f5a02, (q31_t)0xbdcb2bb, (q31_t)0x808d034c,
+  (q31_t)0xbc3ac35, (q31_t)0x808ab180, (q31_t)0xbaaa53b, (q31_t)0x8088649e, (q31_t)0xb919dcf, (q31_t)0x80861ca6, (q31_t)0xb7895f0, (q31_t)0x8083d998,
+  (q31_t)0xb5f8d9f, (q31_t)0x80819b74, (q31_t)0xb4684df, (q31_t)0x807f623b, (q31_t)0xb2d7baf, (q31_t)0x807d2dec, (q31_t)0xb147211, (q31_t)0x807afe87,
+  (q31_t)0xafb6805, (q31_t)0x8078d40d, (q31_t)0xae25d8d, (q31_t)0x8076ae7e, (q31_t)0xac952aa, (q31_t)0x80748dd9, (q31_t)0xab0475c, (q31_t)0x8072721f,
+  (q31_t)0xa973ba5, (q31_t)0x80705b50, (q31_t)0xa7e2f85, (q31_t)0x806e496c, (q31_t)0xa6522fe, (q31_t)0x806c3c74, (q31_t)0xa4c1610, (q31_t)0x806a3466,
+  (q31_t)0xa3308bd, (q31_t)0x80683143, (q31_t)0xa19fb04, (q31_t)0x8066330c, (q31_t)0xa00ece8, (q31_t)0x806439c0, (q31_t)0x9e7de6a, (q31_t)0x80624560,
+  (q31_t)0x9cecf89, (q31_t)0x806055eb, (q31_t)0x9b5c048, (q31_t)0x805e6b62, (q31_t)0x99cb0a7, (q31_t)0x805c85c4, (q31_t)0x983a0a7, (q31_t)0x805aa512,
+  (q31_t)0x96a9049, (q31_t)0x8058c94c, (q31_t)0x9517f8f, (q31_t)0x8056f272, (q31_t)0x9386e78, (q31_t)0x80552084, (q31_t)0x91f5d06, (q31_t)0x80535381,
+  (q31_t)0x9064b3a, (q31_t)0x80518b6b, (q31_t)0x8ed3916, (q31_t)0x804fc841, (q31_t)0x8d42699, (q31_t)0x804e0a04, (q31_t)0x8bb13c5, (q31_t)0x804c50b2,
+  (q31_t)0x8a2009a, (q31_t)0x804a9c4d, (q31_t)0x888ed1b, (q31_t)0x8048ecd5, (q31_t)0x86fd947, (q31_t)0x80474248, (q31_t)0x856c520, (q31_t)0x80459ca9,
+  (q31_t)0x83db0a7, (q31_t)0x8043fbf6, (q31_t)0x8249bdd, (q31_t)0x80426030, (q31_t)0x80b86c2, (q31_t)0x8040c956, (q31_t)0x7f27157, (q31_t)0x803f376a,
+  (q31_t)0x7d95b9e, (q31_t)0x803daa6a, (q31_t)0x7c04598, (q31_t)0x803c2257, (q31_t)0x7a72f45, (q31_t)0x803a9f31, (q31_t)0x78e18a7, (q31_t)0x803920f8,
+  (q31_t)0x77501be, (q31_t)0x8037a7ac, (q31_t)0x75bea8c, (q31_t)0x8036334e, (q31_t)0x742d311, (q31_t)0x8034c3dd, (q31_t)0x729bb4e, (q31_t)0x80335959,
+  (q31_t)0x710a345, (q31_t)0x8031f3c2, (q31_t)0x6f78af6, (q31_t)0x80309318, (q31_t)0x6de7262, (q31_t)0x802f375d, (q31_t)0x6c5598a, (q31_t)0x802de08e,
+  (q31_t)0x6ac406f, (q31_t)0x802c8ead, (q31_t)0x6932713, (q31_t)0x802b41ba, (q31_t)0x67a0d76, (q31_t)0x8029f9b4, (q31_t)0x660f398, (q31_t)0x8028b69c,
+  (q31_t)0x647d97c, (q31_t)0x80277872, (q31_t)0x62ebf22, (q31_t)0x80263f36, (q31_t)0x615a48b, (q31_t)0x80250ae7, (q31_t)0x5fc89b8, (q31_t)0x8023db86,
+  (q31_t)0x5e36ea9, (q31_t)0x8022b114, (q31_t)0x5ca5361, (q31_t)0x80218b8f, (q31_t)0x5b137df, (q31_t)0x80206af8, (q31_t)0x5981c26, (q31_t)0x801f4f4f,
+  (q31_t)0x57f0035, (q31_t)0x801e3895, (q31_t)0x565e40d, (q31_t)0x801d26c8, (q31_t)0x54cc7b1, (q31_t)0x801c19ea, (q31_t)0x533ab20, (q31_t)0x801b11fa,
+  (q31_t)0x51a8e5c, (q31_t)0x801a0ef8, (q31_t)0x5017165, (q31_t)0x801910e4, (q31_t)0x4e8543e, (q31_t)0x801817bf, (q31_t)0x4cf36e5, (q31_t)0x80172388,
+  (q31_t)0x4b6195d, (q31_t)0x80163440, (q31_t)0x49cfba7, (q31_t)0x801549e6, (q31_t)0x483ddc3, (q31_t)0x8014647b, (q31_t)0x46abfb3, (q31_t)0x801383fe,
+  (q31_t)0x451a177, (q31_t)0x8012a86f, (q31_t)0x4388310, (q31_t)0x8011d1d0, (q31_t)0x41f6480, (q31_t)0x8011001f, (q31_t)0x40645c7, (q31_t)0x8010335c,
+  (q31_t)0x3ed26e6, (q31_t)0x800f6b88, (q31_t)0x3d407df, (q31_t)0x800ea8a3, (q31_t)0x3bae8b2, (q31_t)0x800deaad, (q31_t)0x3a1c960, (q31_t)0x800d31a5,
+  (q31_t)0x388a9ea, (q31_t)0x800c7d8c, (q31_t)0x36f8a51, (q31_t)0x800bce63, (q31_t)0x3566a96, (q31_t)0x800b2427, (q31_t)0x33d4abb, (q31_t)0x800a7edb,
+  (q31_t)0x3242abf, (q31_t)0x8009de7e, (q31_t)0x30b0aa4, (q31_t)0x80094310, (q31_t)0x2f1ea6c, (q31_t)0x8008ac90, (q31_t)0x2d8ca16, (q31_t)0x80081b00,
+  (q31_t)0x2bfa9a4, (q31_t)0x80078e5e, (q31_t)0x2a68917, (q31_t)0x800706ac, (q31_t)0x28d6870, (q31_t)0x800683e8, (q31_t)0x27447b0, (q31_t)0x80060614,
+  (q31_t)0x25b26d7, (q31_t)0x80058d2f, (q31_t)0x24205e8, (q31_t)0x80051939, (q31_t)0x228e4e2, (q31_t)0x8004aa32, (q31_t)0x20fc3c6, (q31_t)0x8004401a,
+  (q31_t)0x1f6a297, (q31_t)0x8003daf1, (q31_t)0x1dd8154, (q31_t)0x80037ab7, (q31_t)0x1c45ffe, (q31_t)0x80031f6d, (q31_t)0x1ab3e97, (q31_t)0x8002c912,
+  (q31_t)0x1921d20, (q31_t)0x800277a6, (q31_t)0x178fb99, (q31_t)0x80022b29, (q31_t)0x15fda03, (q31_t)0x8001e39b, (q31_t)0x146b860, (q31_t)0x8001a0fd,
+  (q31_t)0x12d96b1, (q31_t)0x8001634e, (q31_t)0x11474f6, (q31_t)0x80012a8e, (q31_t)0x0fb5330, (q31_t)0x8000f6bd, (q31_t)0xe23160, (q31_t)0x8000c7dc,
+  (q31_t)0x0c90f88, (q31_t)0x80009dea, (q31_t)0x0afeda8, (q31_t)0x800078e7, (q31_t)0x096cbc1, (q31_t)0x800058d4, (q31_t)0x7da9d4, (q31_t)0x80003daf,
+  (q31_t)0x06487e3, (q31_t)0x8000277a, (q31_t)0x04b65ee, (q31_t)0x80001635, (q31_t)0x03243f5, (q31_t)0x800009df, (q31_t)0x1921fb, (q31_t)0x80000278
+};
+     const q31_t cos_factorsQ31_2048[2048] = {
+  (q31_t)0x7fffff62, (q31_t)0x7ffffa73, (q31_t)0x7ffff094, (q31_t)0x7fffe1c6, (q31_t)0x7fffce09, (q31_t)0x7fffb55c,
+  (q31_t)0x7fff97c1, (q31_t)0x7fff7536,
+  (q31_t)0x7fff4dbb, (q31_t)0x7fff2151, (q31_t)0x7ffeeff8, (q31_t)0x7ffeb9b0, (q31_t)0x7ffe7e79, (q31_t)0x7ffe3e52,
+  (q31_t)0x7ffdf93c, (q31_t)0x7ffdaf37,
+  (q31_t)0x7ffd6042, (q31_t)0x7ffd0c5f, (q31_t)0x7ffcb38c, (q31_t)0x7ffc55ca, (q31_t)0x7ffbf319, (q31_t)0x7ffb8b78,
+  (q31_t)0x7ffb1ee9, (q31_t)0x7ffaad6a,
+  (q31_t)0x7ffa36fc, (q31_t)0x7ff9bba0, (q31_t)0x7ff93b54, (q31_t)0x7ff8b619, (q31_t)0x7ff82bef, (q31_t)0x7ff79cd6,
+  (q31_t)0x7ff708ce, (q31_t)0x7ff66fd7,
+  (q31_t)0x7ff5d1f1, (q31_t)0x7ff52f1d, (q31_t)0x7ff48759, (q31_t)0x7ff3daa6, (q31_t)0x7ff32905, (q31_t)0x7ff27275,
+  (q31_t)0x7ff1b6f6, (q31_t)0x7ff0f688,
+  (q31_t)0x7ff0312c, (q31_t)0x7fef66e1, (q31_t)0x7fee97a7, (q31_t)0x7fedc37e, (q31_t)0x7fecea67, (q31_t)0x7fec0c62,
+  (q31_t)0x7feb296d, (q31_t)0x7fea418b,
+  (q31_t)0x7fe954ba, (q31_t)0x7fe862fa, (q31_t)0x7fe76c4c, (q31_t)0x7fe670b0, (q31_t)0x7fe57025, (q31_t)0x7fe46aac,
+  (q31_t)0x7fe36045, (q31_t)0x7fe250ef,
+  (q31_t)0x7fe13cac, (q31_t)0x7fe0237a, (q31_t)0x7fdf055a, (q31_t)0x7fdde24d, (q31_t)0x7fdcba51, (q31_t)0x7fdb8d67,
+  (q31_t)0x7fda5b8f, (q31_t)0x7fd924ca,
+  (q31_t)0x7fd7e917, (q31_t)0x7fd6a875, (q31_t)0x7fd562e7, (q31_t)0x7fd4186a, (q31_t)0x7fd2c900, (q31_t)0x7fd174a8,
+  (q31_t)0x7fd01b63, (q31_t)0x7fcebd31,
+  (q31_t)0x7fcd5a11, (q31_t)0x7fcbf203, (q31_t)0x7fca8508, (q31_t)0x7fc91320, (q31_t)0x7fc79c4b, (q31_t)0x7fc62089,
+  (q31_t)0x7fc49fda, (q31_t)0x7fc31a3d,
+  (q31_t)0x7fc18fb4, (q31_t)0x7fc0003e, (q31_t)0x7fbe6bdb, (q31_t)0x7fbcd28b, (q31_t)0x7fbb344e, (q31_t)0x7fb99125,
+  (q31_t)0x7fb7e90f, (q31_t)0x7fb63c0d,
+  (q31_t)0x7fb48a1e, (q31_t)0x7fb2d343, (q31_t)0x7fb1177b, (q31_t)0x7faf56c7, (q31_t)0x7fad9127, (q31_t)0x7fabc69b,
+  (q31_t)0x7fa9f723, (q31_t)0x7fa822bf,
+  (q31_t)0x7fa6496e, (q31_t)0x7fa46b32, (q31_t)0x7fa2880b, (q31_t)0x7fa09ff7, (q31_t)0x7f9eb2f8, (q31_t)0x7f9cc10d,
+  (q31_t)0x7f9aca37, (q31_t)0x7f98ce76,
+  (q31_t)0x7f96cdc9, (q31_t)0x7f94c831, (q31_t)0x7f92bdad, (q31_t)0x7f90ae3f, (q31_t)0x7f8e99e6, (q31_t)0x7f8c80a1,
+  (q31_t)0x7f8a6272, (q31_t)0x7f883f58,
+  (q31_t)0x7f861753, (q31_t)0x7f83ea64, (q31_t)0x7f81b88a, (q31_t)0x7f7f81c6, (q31_t)0x7f7d4617, (q31_t)0x7f7b057e,
+  (q31_t)0x7f78bffb, (q31_t)0x7f76758e,
+  (q31_t)0x7f742637, (q31_t)0x7f71d1f6, (q31_t)0x7f6f78cb, (q31_t)0x7f6d1ab6, (q31_t)0x7f6ab7b8, (q31_t)0x7f684fd0,
+  (q31_t)0x7f65e2ff, (q31_t)0x7f637144,
+  (q31_t)0x7f60faa0, (q31_t)0x7f5e7f13, (q31_t)0x7f5bfe9d, (q31_t)0x7f59793e, (q31_t)0x7f56eef5, (q31_t)0x7f545fc5,
+  (q31_t)0x7f51cbab, (q31_t)0x7f4f32a9,
+  (q31_t)0x7f4c94be, (q31_t)0x7f49f1eb, (q31_t)0x7f474a30, (q31_t)0x7f449d8c, (q31_t)0x7f41ec01, (q31_t)0x7f3f358d,
+  (q31_t)0x7f3c7a31, (q31_t)0x7f39b9ee,
+  (q31_t)0x7f36f4c3, (q31_t)0x7f342ab1, (q31_t)0x7f315bb7, (q31_t)0x7f2e87d6, (q31_t)0x7f2baf0d, (q31_t)0x7f28d15d,
+  (q31_t)0x7f25eec7, (q31_t)0x7f230749,
+  (q31_t)0x7f201ae5, (q31_t)0x7f1d299a, (q31_t)0x7f1a3368, (q31_t)0x7f173850, (q31_t)0x7f143852, (q31_t)0x7f11336d,
+  (q31_t)0x7f0e29a3, (q31_t)0x7f0b1af2,
+  (q31_t)0x7f08075c, (q31_t)0x7f04eedf, (q31_t)0x7f01d17d, (q31_t)0x7efeaf36, (q31_t)0x7efb8809, (q31_t)0x7ef85bf7,
+  (q31_t)0x7ef52b00, (q31_t)0x7ef1f524,
+  (q31_t)0x7eeeba62, (q31_t)0x7eeb7abc, (q31_t)0x7ee83632, (q31_t)0x7ee4ecc3, (q31_t)0x7ee19e6f, (q31_t)0x7ede4b38,
+  (q31_t)0x7edaf31c, (q31_t)0x7ed7961c,
+  (q31_t)0x7ed43438, (q31_t)0x7ed0cd70, (q31_t)0x7ecd61c5, (q31_t)0x7ec9f137, (q31_t)0x7ec67bc5, (q31_t)0x7ec3016f,
+  (q31_t)0x7ebf8237, (q31_t)0x7ebbfe1c,
+  (q31_t)0x7eb8751e, (q31_t)0x7eb4e73d, (q31_t)0x7eb1547a, (q31_t)0x7eadbcd4, (q31_t)0x7eaa204c, (q31_t)0x7ea67ee2,
+  (q31_t)0x7ea2d896, (q31_t)0x7e9f2d68,
+  (q31_t)0x7e9b7d58, (q31_t)0x7e97c867, (q31_t)0x7e940e94, (q31_t)0x7e904fe0, (q31_t)0x7e8c8c4b, (q31_t)0x7e88c3d5,
+  (q31_t)0x7e84f67e, (q31_t)0x7e812447,
+  (q31_t)0x7e7d4d2f, (q31_t)0x7e797136, (q31_t)0x7e75905d, (q31_t)0x7e71aaa4, (q31_t)0x7e6dc00c, (q31_t)0x7e69d093,
+  (q31_t)0x7e65dc3b, (q31_t)0x7e61e303,
+  (q31_t)0x7e5de4ec, (q31_t)0x7e59e1f5, (q31_t)0x7e55da20, (q31_t)0x7e51cd6c, (q31_t)0x7e4dbbd9, (q31_t)0x7e49a567,
+  (q31_t)0x7e458a17, (q31_t)0x7e4169e9,
+  (q31_t)0x7e3d44dd, (q31_t)0x7e391af3, (q31_t)0x7e34ec2b, (q31_t)0x7e30b885, (q31_t)0x7e2c8002, (q31_t)0x7e2842a2,
+  (q31_t)0x7e240064, (q31_t)0x7e1fb94a,
+  (q31_t)0x7e1b6d53, (q31_t)0x7e171c7f, (q31_t)0x7e12c6ce, (q31_t)0x7e0e6c42, (q31_t)0x7e0a0cd9, (q31_t)0x7e05a894,
+  (q31_t)0x7e013f74, (q31_t)0x7dfcd178,
+  (q31_t)0x7df85ea0, (q31_t)0x7df3e6ee, (q31_t)0x7def6a60, (q31_t)0x7deae8f7, (q31_t)0x7de662b3, (q31_t)0x7de1d795,
+  (q31_t)0x7ddd479d, (q31_t)0x7dd8b2ca,
+  (q31_t)0x7dd4191d, (q31_t)0x7dcf7a96, (q31_t)0x7dcad736, (q31_t)0x7dc62efc, (q31_t)0x7dc181e8, (q31_t)0x7dbccffc,
+  (q31_t)0x7db81936, (q31_t)0x7db35d98,
+  (q31_t)0x7dae9d21, (q31_t)0x7da9d7d2, (q31_t)0x7da50dab, (q31_t)0x7da03eab, (q31_t)0x7d9b6ad3, (q31_t)0x7d969224,
+  (q31_t)0x7d91b49e, (q31_t)0x7d8cd240,
+  (q31_t)0x7d87eb0a, (q31_t)0x7d82fefe, (q31_t)0x7d7e0e1c, (q31_t)0x7d791862, (q31_t)0x7d741dd2, (q31_t)0x7d6f1e6c,
+  (q31_t)0x7d6a1a31, (q31_t)0x7d65111f,
+  (q31_t)0x7d600338, (q31_t)0x7d5af07b, (q31_t)0x7d55d8e9, (q31_t)0x7d50bc82, (q31_t)0x7d4b9b46, (q31_t)0x7d467536,
+  (q31_t)0x7d414a51, (q31_t)0x7d3c1a98,
+  (q31_t)0x7d36e60b, (q31_t)0x7d31acaa, (q31_t)0x7d2c6e76, (q31_t)0x7d272b6e, (q31_t)0x7d21e393, (q31_t)0x7d1c96e5,
+  (q31_t)0x7d174564, (q31_t)0x7d11ef11,
+  (q31_t)0x7d0c93eb, (q31_t)0x7d0733f3, (q31_t)0x7d01cf29, (q31_t)0x7cfc658d, (q31_t)0x7cf6f720, (q31_t)0x7cf183e1,
+  (q31_t)0x7cec0bd1, (q31_t)0x7ce68ef0,
+  (q31_t)0x7ce10d3f, (q31_t)0x7cdb86bd, (q31_t)0x7cd5fb6a, (q31_t)0x7cd06b48, (q31_t)0x7ccad656, (q31_t)0x7cc53c94,
+  (q31_t)0x7cbf9e03, (q31_t)0x7cb9faa2,
+  (q31_t)0x7cb45272, (q31_t)0x7caea574, (q31_t)0x7ca8f3a7, (q31_t)0x7ca33d0c, (q31_t)0x7c9d81a3, (q31_t)0x7c97c16b,
+  (q31_t)0x7c91fc66, (q31_t)0x7c8c3294,
+  (q31_t)0x7c8663f4, (q31_t)0x7c809088, (q31_t)0x7c7ab84e, (q31_t)0x7c74db48, (q31_t)0x7c6ef976, (q31_t)0x7c6912d7,
+  (q31_t)0x7c63276d, (q31_t)0x7c5d3737,
+  (q31_t)0x7c574236, (q31_t)0x7c514869, (q31_t)0x7c4b49d2, (q31_t)0x7c45466f, (q31_t)0x7c3f3e42, (q31_t)0x7c39314b,
+  (q31_t)0x7c331f8a, (q31_t)0x7c2d08ff,
+  (q31_t)0x7c26edab, (q31_t)0x7c20cd8d, (q31_t)0x7c1aa8a6, (q31_t)0x7c147ef6, (q31_t)0x7c0e507e, (q31_t)0x7c081d3d,
+  (q31_t)0x7c01e534, (q31_t)0x7bfba863,
+  (q31_t)0x7bf566cb, (q31_t)0x7bef206b, (q31_t)0x7be8d544, (q31_t)0x7be28556, (q31_t)0x7bdc30a1, (q31_t)0x7bd5d726,
+  (q31_t)0x7bcf78e5, (q31_t)0x7bc915dd,
+  (q31_t)0x7bc2ae10, (q31_t)0x7bbc417e, (q31_t)0x7bb5d026, (q31_t)0x7baf5a09, (q31_t)0x7ba8df28, (q31_t)0x7ba25f82,
+  (q31_t)0x7b9bdb18, (q31_t)0x7b9551ea,
+  (q31_t)0x7b8ec3f8, (q31_t)0x7b883143, (q31_t)0x7b8199ca, (q31_t)0x7b7afd8f, (q31_t)0x7b745c91, (q31_t)0x7b6db6d0,
+  (q31_t)0x7b670c4d, (q31_t)0x7b605d09,
+  (q31_t)0x7b59a902, (q31_t)0x7b52f03a, (q31_t)0x7b4c32b1, (q31_t)0x7b457068, (q31_t)0x7b3ea95d, (q31_t)0x7b37dd92,
+  (q31_t)0x7b310d07, (q31_t)0x7b2a37bc,
+  (q31_t)0x7b235db2, (q31_t)0x7b1c7ee8, (q31_t)0x7b159b5f, (q31_t)0x7b0eb318, (q31_t)0x7b07c612, (q31_t)0x7b00d44d,
+  (q31_t)0x7af9ddcb, (q31_t)0x7af2e28b,
+  (q31_t)0x7aebe28d, (q31_t)0x7ae4ddd2, (q31_t)0x7addd45b, (q31_t)0x7ad6c626, (q31_t)0x7acfb336, (q31_t)0x7ac89b89,
+  (q31_t)0x7ac17f20, (q31_t)0x7aba5dfc,
+  (q31_t)0x7ab3381d, (q31_t)0x7aac0d82, (q31_t)0x7aa4de2d, (q31_t)0x7a9daa1d, (q31_t)0x7a967153, (q31_t)0x7a8f33d0,
+  (q31_t)0x7a87f192, (q31_t)0x7a80aa9c,
+  (q31_t)0x7a795eec, (q31_t)0x7a720e84, (q31_t)0x7a6ab963, (q31_t)0x7a635f8a, (q31_t)0x7a5c00f9, (q31_t)0x7a549db0,
+  (q31_t)0x7a4d35b0, (q31_t)0x7a45c8f9,
+  (q31_t)0x7a3e578b, (q31_t)0x7a36e166, (q31_t)0x7a2f668c, (q31_t)0x7a27e6fb, (q31_t)0x7a2062b5, (q31_t)0x7a18d9b9,
+  (q31_t)0x7a114c09, (q31_t)0x7a09b9a4,
+  (q31_t)0x7a02228a, (q31_t)0x79fa86bc, (q31_t)0x79f2e63a, (q31_t)0x79eb4105, (q31_t)0x79e3971c, (q31_t)0x79dbe880,
+  (q31_t)0x79d43532, (q31_t)0x79cc7d31,
+  (q31_t)0x79c4c07e, (q31_t)0x79bcff19, (q31_t)0x79b53903, (q31_t)0x79ad6e3c, (q31_t)0x79a59ec3, (q31_t)0x799dca9a,
+  (q31_t)0x7995f1c1, (q31_t)0x798e1438,
+  (q31_t)0x798631ff, (q31_t)0x797e4b16, (q31_t)0x79765f7f, (q31_t)0x796e6f39, (q31_t)0x79667a44, (q31_t)0x795e80a1,
+  (q31_t)0x79568250, (q31_t)0x794e7f52,
+  (q31_t)0x794677a6, (q31_t)0x793e6b4e, (q31_t)0x79365a49, (q31_t)0x792e4497, (q31_t)0x79262a3a, (q31_t)0x791e0b31,
+  (q31_t)0x7915e77c, (q31_t)0x790dbf1d,
+  (q31_t)0x79059212, (q31_t)0x78fd605d, (q31_t)0x78f529fe, (q31_t)0x78eceef6, (q31_t)0x78e4af44, (q31_t)0x78dc6ae8,
+  (q31_t)0x78d421e4, (q31_t)0x78cbd437,
+  (q31_t)0x78c381e2, (q31_t)0x78bb2ae5, (q31_t)0x78b2cf41, (q31_t)0x78aa6ef5, (q31_t)0x78a20a03, (q31_t)0x7899a06a,
+  (q31_t)0x7891322a, (q31_t)0x7888bf45,
+  (q31_t)0x788047ba, (q31_t)0x7877cb89, (q31_t)0x786f4ab4, (q31_t)0x7866c53a, (q31_t)0x785e3b1c, (q31_t)0x7855ac5a,
+  (q31_t)0x784d18f4, (q31_t)0x784480ea,
+  (q31_t)0x783be43e, (q31_t)0x783342ef, (q31_t)0x782a9cfe, (q31_t)0x7821f26b, (q31_t)0x78194336, (q31_t)0x78108f60,
+  (q31_t)0x7807d6e9, (q31_t)0x77ff19d1,
+  (q31_t)0x77f65819, (q31_t)0x77ed91c0, (q31_t)0x77e4c6c9, (q31_t)0x77dbf732, (q31_t)0x77d322fc, (q31_t)0x77ca4a27,
+  (q31_t)0x77c16cb4, (q31_t)0x77b88aa3,
+  (q31_t)0x77afa3f5, (q31_t)0x77a6b8a9, (q31_t)0x779dc8c0, (q31_t)0x7794d43b, (q31_t)0x778bdb19, (q31_t)0x7782dd5c,
+  (q31_t)0x7779db03, (q31_t)0x7770d40f,
+  (q31_t)0x7767c880, (q31_t)0x775eb857, (q31_t)0x7755a394, (q31_t)0x774c8a36, (q31_t)0x77436c40, (q31_t)0x773a49b0,
+  (q31_t)0x77312287, (q31_t)0x7727f6c6,
+  (q31_t)0x771ec66e, (q31_t)0x7715917d, (q31_t)0x770c57f5, (q31_t)0x770319d6, (q31_t)0x76f9d721, (q31_t)0x76f08fd5,
+  (q31_t)0x76e743f4, (q31_t)0x76ddf37c,
+  (q31_t)0x76d49e70, (q31_t)0x76cb44cf, (q31_t)0x76c1e699, (q31_t)0x76b883d0, (q31_t)0x76af1c72, (q31_t)0x76a5b082,
+  (q31_t)0x769c3ffe, (q31_t)0x7692cae8,
+  (q31_t)0x7689513f, (q31_t)0x767fd304, (q31_t)0x76765038, (q31_t)0x766cc8db, (q31_t)0x76633ced, (q31_t)0x7659ac6f,
+  (q31_t)0x76501760, (q31_t)0x76467dc2,
+  (q31_t)0x763cdf94, (q31_t)0x76333cd8, (q31_t)0x7629958c, (q31_t)0x761fe9b3, (q31_t)0x7616394c, (q31_t)0x760c8457,
+  (q31_t)0x7602cad5, (q31_t)0x75f90cc7,
+  (q31_t)0x75ef4a2c, (q31_t)0x75e58305, (q31_t)0x75dbb753, (q31_t)0x75d1e715, (q31_t)0x75c8124d, (q31_t)0x75be38fa,
+  (q31_t)0x75b45b1d, (q31_t)0x75aa78b6,
+  (q31_t)0x75a091c6, (q31_t)0x7596a64d, (q31_t)0x758cb64c, (q31_t)0x7582c1c2, (q31_t)0x7578c8b0, (q31_t)0x756ecb18,
+  (q31_t)0x7564c8f8, (q31_t)0x755ac251,
+  (q31_t)0x7550b725, (q31_t)0x7546a772, (q31_t)0x753c933a, (q31_t)0x75327a7d, (q31_t)0x75285d3b, (q31_t)0x751e3b75,
+  (q31_t)0x7514152b, (q31_t)0x7509ea5d,
+  (q31_t)0x74ffbb0d, (q31_t)0x74f58739, (q31_t)0x74eb4ee3, (q31_t)0x74e1120c, (q31_t)0x74d6d0b2, (q31_t)0x74cc8ad8,
+  (q31_t)0x74c2407d, (q31_t)0x74b7f1a1,
+  (q31_t)0x74ad9e46, (q31_t)0x74a3466b, (q31_t)0x7498ea11, (q31_t)0x748e8938, (q31_t)0x748423e0, (q31_t)0x7479ba0b,
+  (q31_t)0x746f4bb8, (q31_t)0x7464d8e8,
+  (q31_t)0x745a619b, (q31_t)0x744fe5d2, (q31_t)0x7445658d, (q31_t)0x743ae0cc, (q31_t)0x74305790, (q31_t)0x7425c9da,
+  (q31_t)0x741b37a9, (q31_t)0x7410a0fe,
+  (q31_t)0x740605d9, (q31_t)0x73fb663c, (q31_t)0x73f0c226, (q31_t)0x73e61997, (q31_t)0x73db6c91, (q31_t)0x73d0bb13,
+  (q31_t)0x73c6051f, (q31_t)0x73bb4ab3,
+  (q31_t)0x73b08bd1, (q31_t)0x73a5c87a, (q31_t)0x739b00ad, (q31_t)0x7390346b, (q31_t)0x738563b5, (q31_t)0x737a8e8a,
+  (q31_t)0x736fb4ec, (q31_t)0x7364d6da,
+  (q31_t)0x7359f456, (q31_t)0x734f0d5f, (q31_t)0x734421f6, (q31_t)0x7339321b, (q31_t)0x732e3dcf, (q31_t)0x73234512,
+  (q31_t)0x731847e5, (q31_t)0x730d4648,
+  (q31_t)0x7302403c, (q31_t)0x72f735c0, (q31_t)0x72ec26d6, (q31_t)0x72e1137d, (q31_t)0x72d5fbb7, (q31_t)0x72cadf83,
+  (q31_t)0x72bfbee3, (q31_t)0x72b499d6,
+  (q31_t)0x72a9705c, (q31_t)0x729e4277, (q31_t)0x72931027, (q31_t)0x7287d96c, (q31_t)0x727c9e47, (q31_t)0x72715eb8,
+  (q31_t)0x72661abf, (q31_t)0x725ad25d,
+  (q31_t)0x724f8593, (q31_t)0x72443460, (q31_t)0x7238dec5, (q31_t)0x722d84c4, (q31_t)0x7222265b, (q31_t)0x7216c38c,
+  (q31_t)0x720b5c57, (q31_t)0x71fff0bc,
+  (q31_t)0x71f480bc, (q31_t)0x71e90c57, (q31_t)0x71dd938f, (q31_t)0x71d21662, (q31_t)0x71c694d2, (q31_t)0x71bb0edf,
+  (q31_t)0x71af848a, (q31_t)0x71a3f5d2,
+  (q31_t)0x719862b9, (q31_t)0x718ccb3f, (q31_t)0x71812f65, (q31_t)0x71758f29, (q31_t)0x7169ea8f, (q31_t)0x715e4194,
+  (q31_t)0x7152943b, (q31_t)0x7146e284,
+  (q31_t)0x713b2c6e, (q31_t)0x712f71fb, (q31_t)0x7123b32b, (q31_t)0x7117effe, (q31_t)0x710c2875, (q31_t)0x71005c90,
+  (q31_t)0x70f48c50, (q31_t)0x70e8b7b5,
+  (q31_t)0x70dcdec0, (q31_t)0x70d10171, (q31_t)0x70c51fc8, (q31_t)0x70b939c7, (q31_t)0x70ad4f6d, (q31_t)0x70a160ba,
+  (q31_t)0x70956db1, (q31_t)0x70897650,
+  (q31_t)0x707d7a98, (q31_t)0x70717a8a, (q31_t)0x70657626, (q31_t)0x70596d6d, (q31_t)0x704d6060, (q31_t)0x70414efd,
+  (q31_t)0x70353947, (q31_t)0x70291f3e,
+  (q31_t)0x701d00e1, (q31_t)0x7010de32, (q31_t)0x7004b731, (q31_t)0x6ff88bde, (q31_t)0x6fec5c3b, (q31_t)0x6fe02846,
+  (q31_t)0x6fd3f001, (q31_t)0x6fc7b36d,
+  (q31_t)0x6fbb728a, (q31_t)0x6faf2d57, (q31_t)0x6fa2e3d7, (q31_t)0x6f969608, (q31_t)0x6f8a43ed, (q31_t)0x6f7ded84,
+  (q31_t)0x6f7192cf, (q31_t)0x6f6533ce,
+  (q31_t)0x6f58d082, (q31_t)0x6f4c68eb, (q31_t)0x6f3ffd09, (q31_t)0x6f338cde, (q31_t)0x6f271868, (q31_t)0x6f1a9faa,
+  (q31_t)0x6f0e22a3, (q31_t)0x6f01a155,
+  (q31_t)0x6ef51bbe, (q31_t)0x6ee891e1, (q31_t)0x6edc03bc, (q31_t)0x6ecf7152, (q31_t)0x6ec2daa2, (q31_t)0x6eb63fad,
+  (q31_t)0x6ea9a073, (q31_t)0x6e9cfcf5,
+  (q31_t)0x6e905534, (q31_t)0x6e83a92f, (q31_t)0x6e76f8e7, (q31_t)0x6e6a445d, (q31_t)0x6e5d8b91, (q31_t)0x6e50ce84,
+  (q31_t)0x6e440d37, (q31_t)0x6e3747a9,
+  (q31_t)0x6e2a7ddb, (q31_t)0x6e1dafce, (q31_t)0x6e10dd82, (q31_t)0x6e0406f8, (q31_t)0x6df72c30, (q31_t)0x6dea4d2b,
+  (q31_t)0x6ddd69e9, (q31_t)0x6dd0826a,
+  (q31_t)0x6dc396b0, (q31_t)0x6db6a6ba, (q31_t)0x6da9b28a, (q31_t)0x6d9cba1f, (q31_t)0x6d8fbd7a, (q31_t)0x6d82bc9d,
+  (q31_t)0x6d75b786, (q31_t)0x6d68ae37,
+  (q31_t)0x6d5ba0b0, (q31_t)0x6d4e8ef2, (q31_t)0x6d4178fd, (q31_t)0x6d345ed1, (q31_t)0x6d274070, (q31_t)0x6d1a1dda,
+  (q31_t)0x6d0cf70f, (q31_t)0x6cffcc0f,
+  (q31_t)0x6cf29cdc, (q31_t)0x6ce56975, (q31_t)0x6cd831dc, (q31_t)0x6ccaf610, (q31_t)0x6cbdb613, (q31_t)0x6cb071e4,
+  (q31_t)0x6ca32985, (q31_t)0x6c95dcf6,
+  (q31_t)0x6c888c36, (q31_t)0x6c7b3748, (q31_t)0x6c6dde2b, (q31_t)0x6c6080e0, (q31_t)0x6c531f67, (q31_t)0x6c45b9c1,
+  (q31_t)0x6c384fef, (q31_t)0x6c2ae1f0,
+  (q31_t)0x6c1d6fc6, (q31_t)0x6c0ff971, (q31_t)0x6c027ef1, (q31_t)0x6bf50047, (q31_t)0x6be77d74, (q31_t)0x6bd9f677,
+  (q31_t)0x6bcc6b53, (q31_t)0x6bbedc06,
+  (q31_t)0x6bb14892, (q31_t)0x6ba3b0f7, (q31_t)0x6b961536, (q31_t)0x6b88754f, (q31_t)0x6b7ad142, (q31_t)0x6b6d2911,
+  (q31_t)0x6b5f7cbc, (q31_t)0x6b51cc42,
+  (q31_t)0x6b4417a6, (q31_t)0x6b365ee7, (q31_t)0x6b28a206, (q31_t)0x6b1ae103, (q31_t)0x6b0d1bdf, (q31_t)0x6aff529a,
+  (q31_t)0x6af18536, (q31_t)0x6ae3b3b2,
+  (q31_t)0x6ad5de0f, (q31_t)0x6ac8044e, (q31_t)0x6aba266e, (q31_t)0x6aac4472, (q31_t)0x6a9e5e58, (q31_t)0x6a907423,
+  (q31_t)0x6a8285d1, (q31_t)0x6a749365,
+  (q31_t)0x6a669cdd, (q31_t)0x6a58a23c, (q31_t)0x6a4aa381, (q31_t)0x6a3ca0ad, (q31_t)0x6a2e99c0, (q31_t)0x6a208ebb,
+  (q31_t)0x6a127f9f, (q31_t)0x6a046c6c,
+  (q31_t)0x69f65523, (q31_t)0x69e839c4, (q31_t)0x69da1a50, (q31_t)0x69cbf6c7, (q31_t)0x69bdcf29, (q31_t)0x69afa378,
+  (q31_t)0x69a173b5, (q31_t)0x69933fde,
+  (q31_t)0x698507f6, (q31_t)0x6976cbfc, (q31_t)0x69688bf1, (q31_t)0x695a47d6, (q31_t)0x694bffab, (q31_t)0x693db371,
+  (q31_t)0x692f6328, (q31_t)0x69210ed1,
+  (q31_t)0x6912b66c, (q31_t)0x690459fb, (q31_t)0x68f5f97d, (q31_t)0x68e794f3, (q31_t)0x68d92c5d, (q31_t)0x68cabfbd,
+  (q31_t)0x68bc4f13, (q31_t)0x68adda5f,
+  (q31_t)0x689f61a1, (q31_t)0x6890e4dc, (q31_t)0x6882640e, (q31_t)0x6873df38, (q31_t)0x6865565c, (q31_t)0x6856c979,
+  (q31_t)0x68483891, (q31_t)0x6839a3a4,
+  (q31_t)0x682b0ab1, (q31_t)0x681c6dbb, (q31_t)0x680dccc1, (q31_t)0x67ff27c4, (q31_t)0x67f07ec5, (q31_t)0x67e1d1c4,
+  (q31_t)0x67d320c1, (q31_t)0x67c46bbe,
+  (q31_t)0x67b5b2bb, (q31_t)0x67a6f5b8, (q31_t)0x679834b6, (q31_t)0x67896fb6, (q31_t)0x677aa6b8, (q31_t)0x676bd9bd,
+  (q31_t)0x675d08c4, (q31_t)0x674e33d0,
+  (q31_t)0x673f5ae0, (q31_t)0x67307df5, (q31_t)0x67219d10, (q31_t)0x6712b831, (q31_t)0x6703cf58, (q31_t)0x66f4e287,
+  (q31_t)0x66e5f1be, (q31_t)0x66d6fcfd,
+  (q31_t)0x66c80445, (q31_t)0x66b90797, (q31_t)0x66aa06f3, (q31_t)0x669b0259, (q31_t)0x668bf9cb, (q31_t)0x667ced49,
+  (q31_t)0x666ddcd3, (q31_t)0x665ec86b,
+  (q31_t)0x664fb010, (q31_t)0x664093c3, (q31_t)0x66317385, (q31_t)0x66224f56, (q31_t)0x66132738, (q31_t)0x6603fb2a,
+  (q31_t)0x65f4cb2d, (q31_t)0x65e59742,
+  (q31_t)0x65d65f69, (q31_t)0x65c723a3, (q31_t)0x65b7e3f1, (q31_t)0x65a8a052, (q31_t)0x659958c9, (q31_t)0x658a0d54,
+  (q31_t)0x657abdf6, (q31_t)0x656b6aae,
+  (q31_t)0x655c137d, (q31_t)0x654cb863, (q31_t)0x653d5962, (q31_t)0x652df679, (q31_t)0x651e8faa, (q31_t)0x650f24f5,
+  (q31_t)0x64ffb65b, (q31_t)0x64f043dc,
+  (q31_t)0x64e0cd78, (q31_t)0x64d15331, (q31_t)0x64c1d507, (q31_t)0x64b252fa, (q31_t)0x64a2cd0c, (q31_t)0x6493433c,
+  (q31_t)0x6483b58c, (q31_t)0x647423fb,
+  (q31_t)0x64648e8c, (q31_t)0x6454f53d, (q31_t)0x64455810, (q31_t)0x6435b706, (q31_t)0x6426121e, (q31_t)0x6416695a,
+  (q31_t)0x6406bcba, (q31_t)0x63f70c3f,
+  (q31_t)0x63e757ea, (q31_t)0x63d79fba, (q31_t)0x63c7e3b1, (q31_t)0x63b823cf, (q31_t)0x63a86015, (q31_t)0x63989884,
+  (q31_t)0x6388cd1b, (q31_t)0x6378fddc,
+  (q31_t)0x63692ac7, (q31_t)0x635953dd, (q31_t)0x6349791f, (q31_t)0x63399a8d, (q31_t)0x6329b827, (q31_t)0x6319d1ef,
+  (q31_t)0x6309e7e4, (q31_t)0x62f9fa09,
+  (q31_t)0x62ea085c, (q31_t)0x62da12df, (q31_t)0x62ca1992, (q31_t)0x62ba1c77, (q31_t)0x62aa1b8d, (q31_t)0x629a16d5,
+  (q31_t)0x628a0e50, (q31_t)0x627a01fe,
+  (q31_t)0x6269f1e1, (q31_t)0x6259ddf8, (q31_t)0x6249c645, (q31_t)0x6239aac7, (q31_t)0x62298b81, (q31_t)0x62196871,
+  (q31_t)0x62094199, (q31_t)0x61f916f9,
+  (q31_t)0x61e8e893, (q31_t)0x61d8b666, (q31_t)0x61c88074, (q31_t)0x61b846bc, (q31_t)0x61a80940, (q31_t)0x6197c800,
+  (q31_t)0x618782fd, (q31_t)0x61773a37,
+  (q31_t)0x6166edb0, (q31_t)0x61569d67, (q31_t)0x6146495d, (q31_t)0x6135f193, (q31_t)0x6125960a, (q31_t)0x611536c2,
+  (q31_t)0x6104d3bc, (q31_t)0x60f46cf9,
+  (q31_t)0x60e40278, (q31_t)0x60d3943b, (q31_t)0x60c32243, (q31_t)0x60b2ac8f, (q31_t)0x60a23322, (q31_t)0x6091b5fa,
+  (q31_t)0x60813519, (q31_t)0x6070b080,
+  (q31_t)0x6060282f, (q31_t)0x604f9c27, (q31_t)0x603f0c69, (q31_t)0x602e78f4, (q31_t)0x601de1ca, (q31_t)0x600d46ec,
+  (q31_t)0x5ffca859, (q31_t)0x5fec0613,
+  (q31_t)0x5fdb601b, (q31_t)0x5fcab670, (q31_t)0x5fba0914, (q31_t)0x5fa95807, (q31_t)0x5f98a34a, (q31_t)0x5f87eade,
+  (q31_t)0x5f772ec2, (q31_t)0x5f666ef9,
+  (q31_t)0x5f55ab82, (q31_t)0x5f44e45e, (q31_t)0x5f34198e, (q31_t)0x5f234b12, (q31_t)0x5f1278eb, (q31_t)0x5f01a31a,
+  (q31_t)0x5ef0c99f, (q31_t)0x5edfec7b,
+  (q31_t)0x5ecf0baf, (q31_t)0x5ebe273b, (q31_t)0x5ead3f1f, (q31_t)0x5e9c535e, (q31_t)0x5e8b63f7, (q31_t)0x5e7a70ea,
+  (q31_t)0x5e697a39, (q31_t)0x5e587fe5,
+  (q31_t)0x5e4781ed, (q31_t)0x5e368053, (q31_t)0x5e257b17, (q31_t)0x5e147239, (q31_t)0x5e0365bb, (q31_t)0x5df2559e,
+  (q31_t)0x5de141e1, (q31_t)0x5dd02a85,
+  (q31_t)0x5dbf0f8c, (q31_t)0x5dadf0f5, (q31_t)0x5d9ccec2, (q31_t)0x5d8ba8f3, (q31_t)0x5d7a7f88, (q31_t)0x5d695283,
+  (q31_t)0x5d5821e4, (q31_t)0x5d46edac,
+  (q31_t)0x5d35b5db, (q31_t)0x5d247a72, (q31_t)0x5d133b72, (q31_t)0x5d01f8dc, (q31_t)0x5cf0b2af, (q31_t)0x5cdf68ed,
+  (q31_t)0x5cce1b97, (q31_t)0x5cbccaac,
+  (q31_t)0x5cab762f, (q31_t)0x5c9a1e1e, (q31_t)0x5c88c27c, (q31_t)0x5c776348, (q31_t)0x5c660084, (q31_t)0x5c549a30,
+  (q31_t)0x5c43304d, (q31_t)0x5c31c2db,
+  (q31_t)0x5c2051db, (q31_t)0x5c0edd4e, (q31_t)0x5bfd6534, (q31_t)0x5bebe98e, (q31_t)0x5bda6a5d, (q31_t)0x5bc8e7a2,
+  (q31_t)0x5bb7615d, (q31_t)0x5ba5d78e,
+  (q31_t)0x5b944a37, (q31_t)0x5b82b958, (q31_t)0x5b7124f2, (q31_t)0x5b5f8d06, (q31_t)0x5b4df193, (q31_t)0x5b3c529c,
+  (q31_t)0x5b2ab020, (q31_t)0x5b190a20,
+  (q31_t)0x5b07609d, (q31_t)0x5af5b398, (q31_t)0x5ae40311, (q31_t)0x5ad24f09, (q31_t)0x5ac09781, (q31_t)0x5aaedc78,
+  (q31_t)0x5a9d1df1, (q31_t)0x5a8b5bec,
+  (q31_t)0x5a799669, (q31_t)0x5a67cd69, (q31_t)0x5a5600ec, (q31_t)0x5a4430f5, (q31_t)0x5a325d82, (q31_t)0x5a208695,
+  (q31_t)0x5a0eac2e, (q31_t)0x59fcce4f,
+  (q31_t)0x59eaecf8, (q31_t)0x59d90829, (q31_t)0x59c71fe3, (q31_t)0x59b53427, (q31_t)0x59a344f6, (q31_t)0x59915250,
+  (q31_t)0x597f5c36, (q31_t)0x596d62a9,
+  (q31_t)0x595b65aa, (q31_t)0x59496538, (q31_t)0x59376155, (q31_t)0x59255a02, (q31_t)0x59134f3e, (q31_t)0x5901410c,
+  (q31_t)0x58ef2f6b, (q31_t)0x58dd1a5d,
+  (q31_t)0x58cb01e1, (q31_t)0x58b8e5f9, (q31_t)0x58a6c6a5, (q31_t)0x5894a3e7, (q31_t)0x58827dbe, (q31_t)0x5870542c,
+  (q31_t)0x585e2730, (q31_t)0x584bf6cd,
+  (q31_t)0x5839c302, (q31_t)0x58278bd1, (q31_t)0x58155139, (q31_t)0x5803133c, (q31_t)0x57f0d1da, (q31_t)0x57de8d15,
+  (q31_t)0x57cc44ec, (q31_t)0x57b9f960,
+  (q31_t)0x57a7aa73, (q31_t)0x57955825, (q31_t)0x57830276, (q31_t)0x5770a968, (q31_t)0x575e4cfa, (q31_t)0x574bed2f,
+  (q31_t)0x57398a05, (q31_t)0x5727237f,
+  (q31_t)0x5714b99d, (q31_t)0x57024c5f, (q31_t)0x56efdbc7, (q31_t)0x56dd67d4, (q31_t)0x56caf088, (q31_t)0x56b875e4,
+  (q31_t)0x56a5f7e7, (q31_t)0x56937694,
+  (q31_t)0x5680f1ea, (q31_t)0x566e69ea, (q31_t)0x565bde95, (q31_t)0x56494fec, (q31_t)0x5636bdef, (q31_t)0x5624289f,
+  (q31_t)0x56118ffe, (q31_t)0x55fef40a,
+  (q31_t)0x55ec54c6, (q31_t)0x55d9b232, (q31_t)0x55c70c4f, (q31_t)0x55b4631d, (q31_t)0x55a1b69d, (q31_t)0x558f06d0,
+  (q31_t)0x557c53b6, (q31_t)0x55699d51,
+  (q31_t)0x5556e3a1, (q31_t)0x554426a7, (q31_t)0x55316663, (q31_t)0x551ea2d6, (q31_t)0x550bdc01, (q31_t)0x54f911e5,
+  (q31_t)0x54e64482, (q31_t)0x54d373d9,
+  (q31_t)0x54c09feb, (q31_t)0x54adc8b8, (q31_t)0x549aee42, (q31_t)0x54881089, (q31_t)0x54752f8d, (q31_t)0x54624b50,
+  (q31_t)0x544f63d2, (q31_t)0x543c7914,
+  (q31_t)0x54298b17, (q31_t)0x541699db, (q31_t)0x5403a561, (q31_t)0x53f0adaa, (q31_t)0x53ddb2b6, (q31_t)0x53cab486,
+  (q31_t)0x53b7b31c, (q31_t)0x53a4ae77,
+  (q31_t)0x5391a699, (q31_t)0x537e9b82, (q31_t)0x536b8d33, (q31_t)0x53587bad, (q31_t)0x534566f0, (q31_t)0x53324efd,
+  (q31_t)0x531f33d5, (q31_t)0x530c1579,
+  (q31_t)0x52f8f3e9, (q31_t)0x52e5cf27, (q31_t)0x52d2a732, (q31_t)0x52bf7c0b, (q31_t)0x52ac4db4, (q31_t)0x52991c2d,
+  (q31_t)0x5285e777, (q31_t)0x5272af92,
+  (q31_t)0x525f7480, (q31_t)0x524c3640, (q31_t)0x5238f4d4, (q31_t)0x5225b03d, (q31_t)0x5212687b, (q31_t)0x51ff1d8f,
+  (q31_t)0x51ebcf7a, (q31_t)0x51d87e3c,
+  (q31_t)0x51c529d7, (q31_t)0x51b1d24a, (q31_t)0x519e7797, (q31_t)0x518b19bf, (q31_t)0x5177b8c2, (q31_t)0x516454a0,
+  (q31_t)0x5150ed5c, (q31_t)0x513d82f4,
+  (q31_t)0x512a156b, (q31_t)0x5116a4c1, (q31_t)0x510330f7, (q31_t)0x50efba0d, (q31_t)0x50dc4005, (q31_t)0x50c8c2de,
+  (q31_t)0x50b5429a, (q31_t)0x50a1bf39,
+  (q31_t)0x508e38bd, (q31_t)0x507aaf25, (q31_t)0x50672273, (q31_t)0x505392a8, (q31_t)0x503fffc4, (q31_t)0x502c69c8,
+  (q31_t)0x5018d0b4, (q31_t)0x5005348a,
+  (q31_t)0x4ff1954b, (q31_t)0x4fddf2f6, (q31_t)0x4fca4d8d, (q31_t)0x4fb6a510, (q31_t)0x4fa2f981, (q31_t)0x4f8f4ae0,
+  (q31_t)0x4f7b992d, (q31_t)0x4f67e46a,
+  (q31_t)0x4f542c98, (q31_t)0x4f4071b6, (q31_t)0x4f2cb3c7, (q31_t)0x4f18f2c9, (q31_t)0x4f052ec0, (q31_t)0x4ef167aa,
+  (q31_t)0x4edd9d89, (q31_t)0x4ec9d05e,
+  (q31_t)0x4eb60029, (q31_t)0x4ea22ceb, (q31_t)0x4e8e56a5, (q31_t)0x4e7a7d58, (q31_t)0x4e66a105, (q31_t)0x4e52c1ab,
+  (q31_t)0x4e3edf4d, (q31_t)0x4e2af9ea,
+  (q31_t)0x4e171184, (q31_t)0x4e03261b, (q31_t)0x4def37b0, (q31_t)0x4ddb4644, (q31_t)0x4dc751d8, (q31_t)0x4db35a6c,
+  (q31_t)0x4d9f6001, (q31_t)0x4d8b6298,
+  (q31_t)0x4d776231, (q31_t)0x4d635ece, (q31_t)0x4d4f5870, (q31_t)0x4d3b4f16, (q31_t)0x4d2742c2, (q31_t)0x4d133374,
+  (q31_t)0x4cff212e, (q31_t)0x4ceb0bf0,
+  (q31_t)0x4cd6f3bb, (q31_t)0x4cc2d88f, (q31_t)0x4caeba6e, (q31_t)0x4c9a9958, (q31_t)0x4c86754e, (q31_t)0x4c724e50,
+  (q31_t)0x4c5e2460, (q31_t)0x4c49f77f,
+  (q31_t)0x4c35c7ac, (q31_t)0x4c2194e9, (q31_t)0x4c0d5f37, (q31_t)0x4bf92697, (q31_t)0x4be4eb08, (q31_t)0x4bd0ac8d,
+  (q31_t)0x4bbc6b25, (q31_t)0x4ba826d1,
+  (q31_t)0x4b93df93, (q31_t)0x4b7f956b, (q31_t)0x4b6b485a, (q31_t)0x4b56f861, (q31_t)0x4b42a580, (q31_t)0x4b2e4fb8,
+  (q31_t)0x4b19f70a, (q31_t)0x4b059b77,
+  (q31_t)0x4af13d00, (q31_t)0x4adcdba5, (q31_t)0x4ac87767, (q31_t)0x4ab41046, (q31_t)0x4a9fa645, (q31_t)0x4a8b3963,
+  (q31_t)0x4a76c9a2, (q31_t)0x4a625701,
+  (q31_t)0x4a4de182, (q31_t)0x4a396926, (q31_t)0x4a24edee, (q31_t)0x4a106fda, (q31_t)0x49fbeeea, (q31_t)0x49e76b21,
+  (q31_t)0x49d2e47e, (q31_t)0x49be5b02,
+  (q31_t)0x49a9ceaf, (q31_t)0x49953f84, (q31_t)0x4980ad84, (q31_t)0x496c18ae, (q31_t)0x49578103, (q31_t)0x4942e684,
+  (q31_t)0x492e4933, (q31_t)0x4919a90f,
+  (q31_t)0x4905061a, (q31_t)0x48f06054, (q31_t)0x48dbb7be, (q31_t)0x48c70c59, (q31_t)0x48b25e25, (q31_t)0x489dad25,
+  (q31_t)0x4888f957, (q31_t)0x487442be,
+  (q31_t)0x485f8959, (q31_t)0x484acd2a, (q31_t)0x48360e32, (q31_t)0x48214c71, (q31_t)0x480c87e8, (q31_t)0x47f7c099,
+  (q31_t)0x47e2f682, (q31_t)0x47ce29a7,
+  (q31_t)0x47b95a06, (q31_t)0x47a487a2, (q31_t)0x478fb27b, (q31_t)0x477ada91, (q31_t)0x4765ffe6, (q31_t)0x4751227a,
+  (q31_t)0x473c424e, (q31_t)0x47275f63,
+  (q31_t)0x471279ba, (q31_t)0x46fd9154, (q31_t)0x46e8a631, (q31_t)0x46d3b852, (q31_t)0x46bec7b8, (q31_t)0x46a9d464,
+  (q31_t)0x4694de56, (q31_t)0x467fe590,
+  (q31_t)0x466aea12, (q31_t)0x4655ebdd, (q31_t)0x4640eaf2, (q31_t)0x462be751, (q31_t)0x4616e0fc, (q31_t)0x4601d7f3,
+  (q31_t)0x45eccc37, (q31_t)0x45d7bdc9,
+  (q31_t)0x45c2acaa, (q31_t)0x45ad98da, (q31_t)0x4598825a, (q31_t)0x4583692c, (q31_t)0x456e4d4f, (q31_t)0x45592ec6,
+  (q31_t)0x45440d90, (q31_t)0x452ee9ae,
+  (q31_t)0x4519c321, (q31_t)0x450499eb, (q31_t)0x44ef6e0b, (q31_t)0x44da3f83, (q31_t)0x44c50e53, (q31_t)0x44afda7d,
+  (q31_t)0x449aa400, (q31_t)0x44856adf,
+  (q31_t)0x44702f19, (q31_t)0x445af0b0, (q31_t)0x4445afa4, (q31_t)0x44306bf6, (q31_t)0x441b25a8, (q31_t)0x4405dcb9,
+  (q31_t)0x43f0912b, (q31_t)0x43db42fe,
+  (q31_t)0x43c5f234, (q31_t)0x43b09ecc, (q31_t)0x439b48c9, (q31_t)0x4385f02a, (q31_t)0x437094f1, (q31_t)0x435b371f,
+  (q31_t)0x4345d6b3, (q31_t)0x433073b0,
+  (q31_t)0x431b0e15, (q31_t)0x4305a5e5, (q31_t)0x42f03b1e, (q31_t)0x42dacdc3, (q31_t)0x42c55dd4, (q31_t)0x42afeb53,
+  (q31_t)0x429a763f, (q31_t)0x4284fe99,
+  (q31_t)0x426f8463, (q31_t)0x425a079e, (q31_t)0x42448849, (q31_t)0x422f0667, (q31_t)0x421981f7, (q31_t)0x4203fafb,
+  (q31_t)0x41ee7174, (q31_t)0x41d8e561,
+  (q31_t)0x41c356c5, (q31_t)0x41adc5a0, (q31_t)0x419831f3, (q31_t)0x41829bbe, (q31_t)0x416d0302, (q31_t)0x415767c1,
+  (q31_t)0x4141c9fb, (q31_t)0x412c29b1,
+  (q31_t)0x411686e4, (q31_t)0x4100e194, (q31_t)0x40eb39c3, (q31_t)0x40d58f71, (q31_t)0x40bfe29f, (q31_t)0x40aa334e,
+  (q31_t)0x4094817f, (q31_t)0x407ecd32,
+  (q31_t)0x40691669, (q31_t)0x40535d24, (q31_t)0x403da165, (q31_t)0x4027e32b, (q31_t)0x40122278, (q31_t)0x3ffc5f4d,
+  (q31_t)0x3fe699aa, (q31_t)0x3fd0d191,
+  (q31_t)0x3fbb0702, (q31_t)0x3fa539fd, (q31_t)0x3f8f6a85, (q31_t)0x3f799899, (q31_t)0x3f63c43b, (q31_t)0x3f4ded6b,
+  (q31_t)0x3f38142a, (q31_t)0x3f22387a,
+  (q31_t)0x3f0c5a5a, (q31_t)0x3ef679cc, (q31_t)0x3ee096d1, (q31_t)0x3ecab169, (q31_t)0x3eb4c995, (q31_t)0x3e9edf57,
+  (q31_t)0x3e88f2ae, (q31_t)0x3e73039d,
+  (q31_t)0x3e5d1222, (q31_t)0x3e471e41, (q31_t)0x3e3127f9, (q31_t)0x3e1b2f4a, (q31_t)0x3e053437, (q31_t)0x3def36c0,
+  (q31_t)0x3dd936e6, (q31_t)0x3dc334a9,
+  (q31_t)0x3dad300b, (q31_t)0x3d97290b, (q31_t)0x3d811fac, (q31_t)0x3d6b13ee, (q31_t)0x3d5505d2, (q31_t)0x3d3ef559,
+  (q31_t)0x3d28e282, (q31_t)0x3d12cd51,
+  (q31_t)0x3cfcb5c4, (q31_t)0x3ce69bde, (q31_t)0x3cd07f9f, (q31_t)0x3cba6107, (q31_t)0x3ca44018, (q31_t)0x3c8e1cd3,
+  (q31_t)0x3c77f737, (q31_t)0x3c61cf48,
+  (q31_t)0x3c4ba504, (q31_t)0x3c35786d, (q31_t)0x3c1f4983, (q31_t)0x3c091849, (q31_t)0x3bf2e4be, (q31_t)0x3bdcaee3,
+  (q31_t)0x3bc676b9, (q31_t)0x3bb03c42,
+  (q31_t)0x3b99ff7d, (q31_t)0x3b83c06c, (q31_t)0x3b6d7f10, (q31_t)0x3b573b69, (q31_t)0x3b40f579, (q31_t)0x3b2aad3f,
+  (q31_t)0x3b1462be, (q31_t)0x3afe15f6,
+  (q31_t)0x3ae7c6e7, (q31_t)0x3ad17593, (q31_t)0x3abb21fb, (q31_t)0x3aa4cc1e, (q31_t)0x3a8e7400, (q31_t)0x3a78199f,
+  (q31_t)0x3a61bcfd, (q31_t)0x3a4b5e1b,
+  (q31_t)0x3a34fcf9, (q31_t)0x3a1e9999, (q31_t)0x3a0833fc, (q31_t)0x39f1cc21, (q31_t)0x39db620b, (q31_t)0x39c4f5ba,
+  (q31_t)0x39ae872f, (q31_t)0x3998166a,
+  (q31_t)0x3981a36d, (q31_t)0x396b2e38, (q31_t)0x3954b6cd, (q31_t)0x393e3d2c, (q31_t)0x3927c155, (q31_t)0x3911434b,
+  (q31_t)0x38fac30e, (q31_t)0x38e4409e,
+  (q31_t)0x38cdbbfc, (q31_t)0x38b7352a, (q31_t)0x38a0ac29, (q31_t)0x388a20f8, (q31_t)0x38739399, (q31_t)0x385d040d,
+  (q31_t)0x38467255, (q31_t)0x382fde72,
+  (q31_t)0x38194864, (q31_t)0x3802b02c, (q31_t)0x37ec15cb, (q31_t)0x37d57943, (q31_t)0x37beda93, (q31_t)0x37a839be,
+  (q31_t)0x379196c3, (q31_t)0x377af1a3,
+  (q31_t)0x37644a60, (q31_t)0x374da0fa, (q31_t)0x3736f573, (q31_t)0x372047ca, (q31_t)0x37099802, (q31_t)0x36f2e61a,
+  (q31_t)0x36dc3214, (q31_t)0x36c57bf0,
+  (q31_t)0x36aec3b0, (q31_t)0x36980954, (q31_t)0x36814cde, (q31_t)0x366a8e4d, (q31_t)0x3653cda3, (q31_t)0x363d0ae2,
+  (q31_t)0x36264609, (q31_t)0x360f7f19,
+  (q31_t)0x35f8b614, (q31_t)0x35e1eafa, (q31_t)0x35cb1dcc, (q31_t)0x35b44e8c, (q31_t)0x359d7d39, (q31_t)0x3586a9d5,
+  (q31_t)0x356fd461, (q31_t)0x3558fcde,
+  (q31_t)0x3542234c, (q31_t)0x352b47ad, (q31_t)0x35146a00, (q31_t)0x34fd8a48, (q31_t)0x34e6a885, (q31_t)0x34cfc4b7,
+  (q31_t)0x34b8dee1, (q31_t)0x34a1f702,
+  (q31_t)0x348b0d1c, (q31_t)0x3474212f, (q31_t)0x345d333c, (q31_t)0x34464345, (q31_t)0x342f5149, (q31_t)0x34185d4b,
+  (q31_t)0x3401674a, (q31_t)0x33ea6f48,
+  (q31_t)0x33d37546, (q31_t)0x33bc7944, (q31_t)0x33a57b44, (q31_t)0x338e7b46, (q31_t)0x3377794b, (q31_t)0x33607554,
+  (q31_t)0x33496f62, (q31_t)0x33326776,
+  (q31_t)0x331b5d91, (q31_t)0x330451b3, (q31_t)0x32ed43de, (q31_t)0x32d63412, (q31_t)0x32bf2250, (q31_t)0x32a80e99,
+  (q31_t)0x3290f8ef, (q31_t)0x3279e151,
+  (q31_t)0x3262c7c1, (q31_t)0x324bac40, (q31_t)0x32348ecf, (q31_t)0x321d6f6e, (q31_t)0x32064e1e, (q31_t)0x31ef2ae1,
+  (q31_t)0x31d805b7, (q31_t)0x31c0dea1,
+  (q31_t)0x31a9b5a0, (q31_t)0x31928ab4, (q31_t)0x317b5de0, (q31_t)0x31642f23, (q31_t)0x314cfe7f, (q31_t)0x3135cbf4,
+  (q31_t)0x311e9783, (q31_t)0x3107612e,
+  (q31_t)0x30f028f4, (q31_t)0x30d8eed8, (q31_t)0x30c1b2da, (q31_t)0x30aa74fa, (q31_t)0x3093353a, (q31_t)0x307bf39b,
+  (q31_t)0x3064b01d, (q31_t)0x304d6ac1,
+  (q31_t)0x30362389, (q31_t)0x301eda75, (q31_t)0x30078f86, (q31_t)0x2ff042bd, (q31_t)0x2fd8f41b, (q31_t)0x2fc1a3a0,
+  (q31_t)0x2faa514f, (q31_t)0x2f92fd26,
+  (q31_t)0x2f7ba729, (q31_t)0x2f644f56, (q31_t)0x2f4cf5b0, (q31_t)0x2f359a37, (q31_t)0x2f1e3ced, (q31_t)0x2f06ddd1,
+  (q31_t)0x2eef7ce5, (q31_t)0x2ed81a29,
+  (q31_t)0x2ec0b5a0, (q31_t)0x2ea94f49, (q31_t)0x2e91e725, (q31_t)0x2e7a7d36, (q31_t)0x2e63117c, (q31_t)0x2e4ba3f8,
+  (q31_t)0x2e3434ac, (q31_t)0x2e1cc397,
+  (q31_t)0x2e0550bb, (q31_t)0x2deddc19, (q31_t)0x2dd665b2, (q31_t)0x2dbeed86, (q31_t)0x2da77397, (q31_t)0x2d8ff7e5,
+  (q31_t)0x2d787a72, (q31_t)0x2d60fb3e,
+  (q31_t)0x2d497a4a, (q31_t)0x2d31f797, (q31_t)0x2d1a7325, (q31_t)0x2d02ecf7, (q31_t)0x2ceb650d, (q31_t)0x2cd3db67,
+  (q31_t)0x2cbc5006, (q31_t)0x2ca4c2ed,
+  (q31_t)0x2c8d341a, (q31_t)0x2c75a390, (q31_t)0x2c5e114f, (q31_t)0x2c467d58, (q31_t)0x2c2ee7ad, (q31_t)0x2c17504d,
+  (q31_t)0x2bffb73a, (q31_t)0x2be81c74,
+  (q31_t)0x2bd07ffe, (q31_t)0x2bb8e1d7, (q31_t)0x2ba14200, (q31_t)0x2b89a07b, (q31_t)0x2b71fd48, (q31_t)0x2b5a5868,
+  (q31_t)0x2b42b1dd, (q31_t)0x2b2b09a6,
+  (q31_t)0x2b135fc6, (q31_t)0x2afbb43c, (q31_t)0x2ae4070a, (q31_t)0x2acc5831, (q31_t)0x2ab4a7b1, (q31_t)0x2a9cf58c,
+  (q31_t)0x2a8541c3, (q31_t)0x2a6d8c55,
+  (q31_t)0x2a55d545, (q31_t)0x2a3e1c93, (q31_t)0x2a266240, (q31_t)0x2a0ea64d, (q31_t)0x29f6e8bb, (q31_t)0x29df298b,
+  (q31_t)0x29c768be, (q31_t)0x29afa654,
+  (q31_t)0x2997e24f, (q31_t)0x29801caf, (q31_t)0x29685576, (q31_t)0x29508ca4, (q31_t)0x2938c23a, (q31_t)0x2920f63a,
+  (q31_t)0x290928a3, (q31_t)0x28f15978,
+  (q31_t)0x28d988b8, (q31_t)0x28c1b666, (q31_t)0x28a9e281, (q31_t)0x28920d0a, (q31_t)0x287a3604, (q31_t)0x28625d6d,
+  (q31_t)0x284a8349, (q31_t)0x2832a796,
+  (q31_t)0x281aca57, (q31_t)0x2802eb8c, (q31_t)0x27eb0b36, (q31_t)0x27d32956, (q31_t)0x27bb45ed, (q31_t)0x27a360fc,
+  (q31_t)0x278b7a84, (q31_t)0x27739285,
+  (q31_t)0x275ba901, (q31_t)0x2743bdf9, (q31_t)0x272bd16d, (q31_t)0x2713e35f, (q31_t)0x26fbf3ce, (q31_t)0x26e402bd,
+  (q31_t)0x26cc102d, (q31_t)0x26b41c1d,
+  (q31_t)0x269c268f, (q31_t)0x26842f84, (q31_t)0x266c36fe, (q31_t)0x26543cfb, (q31_t)0x263c417f, (q31_t)0x26244489,
+  (q31_t)0x260c461b, (q31_t)0x25f44635,
+  (q31_t)0x25dc44d9, (q31_t)0x25c44207, (q31_t)0x25ac3dc0, (q31_t)0x25943806, (q31_t)0x257c30d8, (q31_t)0x25642839,
+  (q31_t)0x254c1e28, (q31_t)0x253412a8,
+  (q31_t)0x251c05b8, (q31_t)0x2503f75a, (q31_t)0x24ebe78f, (q31_t)0x24d3d657, (q31_t)0x24bbc3b4, (q31_t)0x24a3afa6,
+  (q31_t)0x248b9a2f, (q31_t)0x2473834f,
+  (q31_t)0x245b6b07, (q31_t)0x24435158, (q31_t)0x242b3644, (q31_t)0x241319ca, (q31_t)0x23fafbec, (q31_t)0x23e2dcac,
+  (q31_t)0x23cabc09, (q31_t)0x23b29a05,
+  (q31_t)0x239a76a0, (q31_t)0x238251dd, (q31_t)0x236a2bba, (q31_t)0x2352043b, (q31_t)0x2339db5e, (q31_t)0x2321b126,
+  (q31_t)0x23098593, (q31_t)0x22f158a7,
+  (q31_t)0x22d92a61, (q31_t)0x22c0fac4, (q31_t)0x22a8c9cf, (q31_t)0x22909785, (q31_t)0x227863e5, (q31_t)0x22602ef1,
+  (q31_t)0x2247f8aa, (q31_t)0x222fc111,
+  (q31_t)0x22178826, (q31_t)0x21ff4dea, (q31_t)0x21e71260, (q31_t)0x21ced586, (q31_t)0x21b6975f, (q31_t)0x219e57eb,
+  (q31_t)0x2186172b, (q31_t)0x216dd521,
+  (q31_t)0x215591cc, (q31_t)0x213d4d2f, (q31_t)0x21250749, (q31_t)0x210cc01d, (q31_t)0x20f477aa, (q31_t)0x20dc2df2,
+  (q31_t)0x20c3e2f5, (q31_t)0x20ab96b5,
+  (q31_t)0x20934933, (q31_t)0x207afa6f, (q31_t)0x2062aa6b, (q31_t)0x204a5927, (q31_t)0x203206a4, (q31_t)0x2019b2e4,
+  (q31_t)0x20015de7, (q31_t)0x1fe907ae,
+  (q31_t)0x1fd0b03a, (q31_t)0x1fb8578b, (q31_t)0x1f9ffda4, (q31_t)0x1f87a285, (q31_t)0x1f6f462f, (q31_t)0x1f56e8a2,
+  (q31_t)0x1f3e89e0, (q31_t)0x1f2629ea,
+  (q31_t)0x1f0dc8c0, (q31_t)0x1ef56664, (q31_t)0x1edd02d6, (q31_t)0x1ec49e17, (q31_t)0x1eac3829, (q31_t)0x1e93d10c,
+  (q31_t)0x1e7b68c2, (q31_t)0x1e62ff4a,
+  (q31_t)0x1e4a94a7, (q31_t)0x1e3228d9, (q31_t)0x1e19bbe0, (q31_t)0x1e014dbf, (q31_t)0x1de8de75, (q31_t)0x1dd06e04,
+  (q31_t)0x1db7fc6d, (q31_t)0x1d9f89b1,
+  (q31_t)0x1d8715d0, (q31_t)0x1d6ea0cc, (q31_t)0x1d562aa6, (q31_t)0x1d3db35e, (q31_t)0x1d253af5, (q31_t)0x1d0cc16c,
+  (q31_t)0x1cf446c5, (q31_t)0x1cdbcb00,
+  (q31_t)0x1cc34e1f, (q31_t)0x1caad021, (q31_t)0x1c925109, (q31_t)0x1c79d0d6, (q31_t)0x1c614f8b, (q31_t)0x1c48cd27,
+  (q31_t)0x1c3049ac, (q31_t)0x1c17c51b,
+  (q31_t)0x1bff3f75, (q31_t)0x1be6b8ba, (q31_t)0x1bce30ec, (q31_t)0x1bb5a80c, (q31_t)0x1b9d1e1a, (q31_t)0x1b849317,
+  (q31_t)0x1b6c0705, (q31_t)0x1b5379e5,
+  (q31_t)0x1b3aebb6, (q31_t)0x1b225c7b, (q31_t)0x1b09cc34, (q31_t)0x1af13ae3, (q31_t)0x1ad8a887, (q31_t)0x1ac01522,
+  (q31_t)0x1aa780b6, (q31_t)0x1a8eeb42,
+  (q31_t)0x1a7654c8, (q31_t)0x1a5dbd49, (q31_t)0x1a4524c6, (q31_t)0x1a2c8b3f, (q31_t)0x1a13f0b6, (q31_t)0x19fb552c,
+  (q31_t)0x19e2b8a2, (q31_t)0x19ca1b17,
+  (q31_t)0x19b17c8f, (q31_t)0x1998dd09, (q31_t)0x19803c86, (q31_t)0x19679b07, (q31_t)0x194ef88e, (q31_t)0x1936551b,
+  (q31_t)0x191db0af, (q31_t)0x19050b4b,
+  (q31_t)0x18ec64f0, (q31_t)0x18d3bda0, (q31_t)0x18bb155a, (q31_t)0x18a26c20, (q31_t)0x1889c1f3, (q31_t)0x187116d4,
+  (q31_t)0x18586ac3, (q31_t)0x183fbdc3,
+  (q31_t)0x18270fd3, (q31_t)0x180e60f4, (q31_t)0x17f5b129, (q31_t)0x17dd0070, (q31_t)0x17c44ecd, (q31_t)0x17ab9c3e,
+  (q31_t)0x1792e8c6, (q31_t)0x177a3466,
+  (q31_t)0x17617f1d, (q31_t)0x1748c8ee, (q31_t)0x173011d9, (q31_t)0x171759df, (q31_t)0x16fea102, (q31_t)0x16e5e741,
+  (q31_t)0x16cd2c9f, (q31_t)0x16b4711b,
+  (q31_t)0x169bb4b7, (q31_t)0x1682f774, (q31_t)0x166a3953, (q31_t)0x16517a55, (q31_t)0x1638ba7a, (q31_t)0x161ff9c4,
+  (q31_t)0x16073834, (q31_t)0x15ee75cb,
+  (q31_t)0x15d5b288, (q31_t)0x15bcee6f, (q31_t)0x15a4297f, (q31_t)0x158b63b9, (q31_t)0x15729d1f, (q31_t)0x1559d5b1,
+  (q31_t)0x15410d70, (q31_t)0x1528445d,
+  (q31_t)0x150f7a7a, (q31_t)0x14f6afc7, (q31_t)0x14dde445, (q31_t)0x14c517f4, (q31_t)0x14ac4ad7, (q31_t)0x14937cee,
+  (q31_t)0x147aae3a, (q31_t)0x1461debc,
+  (q31_t)0x14490e74, (q31_t)0x14303d65, (q31_t)0x14176b8e, (q31_t)0x13fe98f1, (q31_t)0x13e5c58e, (q31_t)0x13ccf167,
+  (q31_t)0x13b41c7d, (q31_t)0x139b46d0,
+  (q31_t)0x13827062, (q31_t)0x13699933, (q31_t)0x1350c144, (q31_t)0x1337e897, (q31_t)0x131f0f2c, (q31_t)0x13063505,
+  (q31_t)0x12ed5a21, (q31_t)0x12d47e83,
+  (q31_t)0x12bba22b, (q31_t)0x12a2c51b, (q31_t)0x1289e752, (q31_t)0x127108d2, (q31_t)0x1258299c, (q31_t)0x123f49b2,
+  (q31_t)0x12266913, (q31_t)0x120d87c1,
+  (q31_t)0x11f4a5bd, (q31_t)0x11dbc307, (q31_t)0x11c2dfa2, (q31_t)0x11a9fb8d, (q31_t)0x119116c9, (q31_t)0x11783159,
+  (q31_t)0x115f4b3c, (q31_t)0x11466473,
+  (q31_t)0x112d7d00, (q31_t)0x111494e4, (q31_t)0x10fbac1e, (q31_t)0x10e2c2b2, (q31_t)0x10c9d89e, (q31_t)0x10b0ede5,
+  (q31_t)0x10980287, (q31_t)0x107f1686,
+  (q31_t)0x106629e1, (q31_t)0x104d3c9b, (q31_t)0x10344eb4, (q31_t)0x101b602d, (q31_t)0x10027107, (q31_t)0xfe98143,
+  (q31_t)0xfd090e1, (q31_t)0xfb79fe4,
+  (q31_t)0xf9eae4c, (q31_t)0xf85bc19, (q31_t)0xf6cc94e, (q31_t)0xf53d5ea, (q31_t)0xf3ae1ee, (q31_t)0xf21ed5d, (q31_t)0xf08f836,
+  (q31_t)0xef0027b,
+  (q31_t)0xed70c2c, (q31_t)0xebe154b, (q31_t)0xea51dd8, (q31_t)0xe8c25d5, (q31_t)0xe732d42, (q31_t)0xe5a3421, (q31_t)0xe413a72,
+  (q31_t)0xe284036,
+  (q31_t)0xe0f456f, (q31_t)0xdf64a1c, (q31_t)0xddd4e40, (q31_t)0xdc451dc, (q31_t)0xdab54ef, (q31_t)0xd92577b, (q31_t)0xd795982,
+  (q31_t)0xd605b03,
+  (q31_t)0xd475c00, (q31_t)0xd2e5c7b, (q31_t)0xd155c73, (q31_t)0xcfc5bea, (q31_t)0xce35ae1, (q31_t)0xcca5959, (q31_t)0xcb15752,
+  (q31_t)0xc9854cf,
+  (q31_t)0xc7f51cf, (q31_t)0xc664e53, (q31_t)0xc4d4a5d, (q31_t)0xc3445ee, (q31_t)0xc1b4107, (q31_t)0xc023ba7, (q31_t)0xbe935d2,
+  (q31_t)0xbd02f87,
+  (q31_t)0xbb728c7, (q31_t)0xb9e2193, (q31_t)0xb8519ed, (q31_t)0xb6c11d5, (q31_t)0xb53094d, (q31_t)0xb3a0055, (q31_t)0xb20f6ee,
+  (q31_t)0xb07ed19,
+  (q31_t)0xaeee2d7, (q31_t)0xad5d829, (q31_t)0xabccd11, (q31_t)0xaa3c18e, (q31_t)0xa8ab5a2, (q31_t)0xa71a94f, (q31_t)0xa589c94,
+  (q31_t)0xa3f8f73,
+  (q31_t)0xa2681ed, (q31_t)0xa0d7403, (q31_t)0x9f465b5, (q31_t)0x9db5706, (q31_t)0x9c247f5, (q31_t)0x9a93884, (q31_t)0x99028b3,
+  (q31_t)0x9771884,
+  (q31_t)0x95e07f8, (q31_t)0x944f70f, (q31_t)0x92be5ca, (q31_t)0x912d42c, (q31_t)0x8f9c233, (q31_t)0x8e0afe2, (q31_t)0x8c79d3a,
+  (q31_t)0x8ae8a3a,
+  (q31_t)0x89576e5, (q31_t)0x87c633c, (q31_t)0x8634f3e, (q31_t)0x84a3aee, (q31_t)0x831264c, (q31_t)0x8181159, (q31_t)0x7fefc16,
+  (q31_t)0x7e5e685,
+  (q31_t)0x7ccd0a5, (q31_t)0x7b3ba78, (q31_t)0x79aa400, (q31_t)0x7818d3c, (q31_t)0x768762e, (q31_t)0x74f5ed7, (q31_t)0x7364738,
+  (q31_t)0x71d2f52,
+  (q31_t)0x7041726, (q31_t)0x6eafeb4, (q31_t)0x6d1e5fe, (q31_t)0x6b8cd05, (q31_t)0x69fb3c9, (q31_t)0x6869a4c, (q31_t)0x66d808f,
+  (q31_t)0x6546692,
+  (q31_t)0x63b4c57, (q31_t)0x62231de, (q31_t)0x6091729, (q31_t)0x5effc38, (q31_t)0x5d6e10c, (q31_t)0x5bdc5a7, (q31_t)0x5a4aa09,
+  (q31_t)0x58b8e34,
+  (q31_t)0x5727228, (q31_t)0x55955e6, (q31_t)0x540396f, (q31_t)0x5271cc4, (q31_t)0x50dffe7, (q31_t)0x4f4e2d8, (q31_t)0x4dbc597,
+  (q31_t)0x4c2a827,
+  (q31_t)0x4a98a88, (q31_t)0x4906cbb, (q31_t)0x4774ec1, (q31_t)0x45e309a, (q31_t)0x4451249, (q31_t)0x42bf3cd, (q31_t)0x412d528,
+  (q31_t)0x3f9b65b,
+  (q31_t)0x3e09767, (q31_t)0x3c7784d, (q31_t)0x3ae590d, (q31_t)0x39539a9, (q31_t)0x37c1a22, (q31_t)0x362fa78, (q31_t)0x349daac,
+  (q31_t)0x330bac1,
+  (q31_t)0x3179ab5, (q31_t)0x2fe7a8c, (q31_t)0x2e55a44, (q31_t)0x2cc39e1, (q31_t)0x2b31961, (q31_t)0x299f8c7, (q31_t)0x280d813,
+  (q31_t)0x267b747,
+  (q31_t)0x24e9662, (q31_t)0x2357567, (q31_t)0x21c5457, (q31_t)0x2033331, (q31_t)0x1ea11f7, (q31_t)0x1d0f0ab, (q31_t)0x1b7cf4d,
+  (q31_t)0x19eaddd,
+  (q31_t)0x1858c5e, (q31_t)0x16c6ad0, (q31_t)0x1534934, (q31_t)0x13a278a, (q31_t)0x12105d5, (q31_t)0x107e414, (q31_t)0xeec249,
+  (q31_t)0xd5a075,
+  (q31_t)0xbc7e99, (q31_t)0xa35cb5, (q31_t)0x8a3acb, (q31_t)0x7118dc, (q31_t)0x57f6e9, (q31_t)0x3ed4f2, (q31_t)0x25b2f8,
+  (q31_t)0xc90fe
+};
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_8192) 
+    const q31_t WeightsQ31_8192[16384] = {
+  (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7fffffd9, (q31_t)0xfff9b781, (q31_t)0x7fffff62, (q31_t)0xfff36f02, (q31_t)0x7ffffe9d, (q31_t)0xffed2684,
+  (q31_t)0x7ffffd88, (q31_t)0xffe6de05, (q31_t)0x7ffffc25, (q31_t)0xffe09586, (q31_t)0x7ffffa73, (q31_t)0xffda4d08, (q31_t)0x7ffff872, (q31_t)0xffd40489,
+  (q31_t)0x7ffff621, (q31_t)0xffcdbc0b, (q31_t)0x7ffff382, (q31_t)0xffc7738c, (q31_t)0x7ffff094, (q31_t)0xffc12b0e, (q31_t)0x7fffed57, (q31_t)0xffbae290,
+  (q31_t)0x7fffe9cb, (q31_t)0xffb49a12, (q31_t)0x7fffe5f0, (q31_t)0xffae5195, (q31_t)0x7fffe1c6, (q31_t)0xffa80917, (q31_t)0x7fffdd4d, (q31_t)0xffa1c09a,
+  (q31_t)0x7fffd886, (q31_t)0xff9b781d, (q31_t)0x7fffd36f, (q31_t)0xff952fa0, (q31_t)0x7fffce09, (q31_t)0xff8ee724, (q31_t)0x7fffc854, (q31_t)0xff889ea7,
+  (q31_t)0x7fffc251, (q31_t)0xff82562c, (q31_t)0x7fffbbfe, (q31_t)0xff7c0db0, (q31_t)0x7fffb55c, (q31_t)0xff75c535, (q31_t)0x7fffae6c, (q31_t)0xff6f7cba,
+  (q31_t)0x7fffa72c, (q31_t)0xff69343f, (q31_t)0x7fff9f9e, (q31_t)0xff62ebc5, (q31_t)0x7fff97c1, (q31_t)0xff5ca34b, (q31_t)0x7fff8f94, (q31_t)0xff565ad1,
+  (q31_t)0x7fff8719, (q31_t)0xff501258, (q31_t)0x7fff7e4f, (q31_t)0xff49c9df, (q31_t)0x7fff7536, (q31_t)0xff438167, (q31_t)0x7fff6bcd, (q31_t)0xff3d38ef,
+  (q31_t)0x7fff6216, (q31_t)0xff36f078, (q31_t)0x7fff5810, (q31_t)0xff30a801, (q31_t)0x7fff4dbb, (q31_t)0xff2a5f8b, (q31_t)0x7fff4317, (q31_t)0xff241715,
+  (q31_t)0x7fff3824, (q31_t)0xff1dcea0, (q31_t)0x7fff2ce2, (q31_t)0xff17862b, (q31_t)0x7fff2151, (q31_t)0xff113db7, (q31_t)0x7fff1572, (q31_t)0xff0af543,
+  (q31_t)0x7fff0943, (q31_t)0xff04acd0, (q31_t)0x7ffefcc5, (q31_t)0xfefe645e, (q31_t)0x7ffeeff8, (q31_t)0xfef81bec, (q31_t)0x7ffee2dd, (q31_t)0xfef1d37b,
+  (q31_t)0x7ffed572, (q31_t)0xfeeb8b0a, (q31_t)0x7ffec7b9, (q31_t)0xfee5429a, (q31_t)0x7ffeb9b0, (q31_t)0xfedefa2b, (q31_t)0x7ffeab59, (q31_t)0xfed8b1bd,
+  (q31_t)0x7ffe9cb2, (q31_t)0xfed2694f, (q31_t)0x7ffe8dbd, (q31_t)0xfecc20e2, (q31_t)0x7ffe7e79, (q31_t)0xfec5d876, (q31_t)0x7ffe6ee5, (q31_t)0xfebf900a,
+  (q31_t)0x7ffe5f03, (q31_t)0xfeb947a0, (q31_t)0x7ffe4ed2, (q31_t)0xfeb2ff36, (q31_t)0x7ffe3e52, (q31_t)0xfeacb6cc, (q31_t)0x7ffe2d83, (q31_t)0xfea66e64,
+  (q31_t)0x7ffe1c65, (q31_t)0xfea025fd, (q31_t)0x7ffe0af8, (q31_t)0xfe99dd96, (q31_t)0x7ffdf93c, (q31_t)0xfe939530, (q31_t)0x7ffde731, (q31_t)0xfe8d4ccb,
+  (q31_t)0x7ffdd4d7, (q31_t)0xfe870467, (q31_t)0x7ffdc22e, (q31_t)0xfe80bc04, (q31_t)0x7ffdaf37, (q31_t)0xfe7a73a2, (q31_t)0x7ffd9bf0, (q31_t)0xfe742b41,
+  (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ffd7476, (q31_t)0xfe679a81, (q31_t)0x7ffd6042, (q31_t)0xfe615223, (q31_t)0x7ffd4bc0, (q31_t)0xfe5b09c5,
+  (q31_t)0x7ffd36ee, (q31_t)0xfe54c169, (q31_t)0x7ffd21ce, (q31_t)0xfe4e790d, (q31_t)0x7ffd0c5f, (q31_t)0xfe4830b3, (q31_t)0x7ffcf6a0, (q31_t)0xfe41e85a,
+  (q31_t)0x7ffce093, (q31_t)0xfe3ba002, (q31_t)0x7ffcca37, (q31_t)0xfe3557ab, (q31_t)0x7ffcb38c, (q31_t)0xfe2f0f55, (q31_t)0x7ffc9c92, (q31_t)0xfe28c700,
+  (q31_t)0x7ffc8549, (q31_t)0xfe227eac, (q31_t)0x7ffc6db1, (q31_t)0xfe1c365a, (q31_t)0x7ffc55ca, (q31_t)0xfe15ee09, (q31_t)0x7ffc3d94, (q31_t)0xfe0fa5b8,
+  (q31_t)0x7ffc250f, (q31_t)0xfe095d69, (q31_t)0x7ffc0c3b, (q31_t)0xfe03151c, (q31_t)0x7ffbf319, (q31_t)0xfdfccccf, (q31_t)0x7ffbd9a7, (q31_t)0xfdf68484,
+  (q31_t)0x7ffbbfe6, (q31_t)0xfdf03c3a, (q31_t)0x7ffba5d7, (q31_t)0xfde9f3f1, (q31_t)0x7ffb8b78, (q31_t)0xfde3aba9, (q31_t)0x7ffb70cb, (q31_t)0xfddd6363,
+  (q31_t)0x7ffb55ce, (q31_t)0xfdd71b1e, (q31_t)0x7ffb3a83, (q31_t)0xfdd0d2db, (q31_t)0x7ffb1ee9, (q31_t)0xfdca8a99, (q31_t)0x7ffb0300, (q31_t)0xfdc44258,
+  (q31_t)0x7ffae6c7, (q31_t)0xfdbdfa18, (q31_t)0x7ffaca40, (q31_t)0xfdb7b1da, (q31_t)0x7ffaad6a, (q31_t)0xfdb1699e, (q31_t)0x7ffa9045, (q31_t)0xfdab2162,
+  (q31_t)0x7ffa72d1, (q31_t)0xfda4d929, (q31_t)0x7ffa550e, (q31_t)0xfd9e90f0, (q31_t)0x7ffa36fc, (q31_t)0xfd9848b9, (q31_t)0x7ffa189c, (q31_t)0xfd920084,
+  (q31_t)0x7ff9f9ec, (q31_t)0xfd8bb850, (q31_t)0x7ff9daed, (q31_t)0xfd85701e, (q31_t)0x7ff9bba0, (q31_t)0xfd7f27ed, (q31_t)0x7ff99c03, (q31_t)0xfd78dfbd,
+  (q31_t)0x7ff97c18, (q31_t)0xfd729790, (q31_t)0x7ff95bdd, (q31_t)0xfd6c4f64, (q31_t)0x7ff93b54, (q31_t)0xfd660739, (q31_t)0x7ff91a7b, (q31_t)0xfd5fbf10,
+  (q31_t)0x7ff8f954, (q31_t)0xfd5976e9, (q31_t)0x7ff8d7de, (q31_t)0xfd532ec3, (q31_t)0x7ff8b619, (q31_t)0xfd4ce69f, (q31_t)0x7ff89405, (q31_t)0xfd469e7c,
+  (q31_t)0x7ff871a2, (q31_t)0xfd40565c, (q31_t)0x7ff84ef0, (q31_t)0xfd3a0e3d, (q31_t)0x7ff82bef, (q31_t)0xfd33c61f, (q31_t)0x7ff8089f, (q31_t)0xfd2d7e04,
+  (q31_t)0x7ff7e500, (q31_t)0xfd2735ea, (q31_t)0x7ff7c113, (q31_t)0xfd20edd2, (q31_t)0x7ff79cd6, (q31_t)0xfd1aa5bc, (q31_t)0x7ff7784a, (q31_t)0xfd145da7,
+  (q31_t)0x7ff75370, (q31_t)0xfd0e1594, (q31_t)0x7ff72e46, (q31_t)0xfd07cd83, (q31_t)0x7ff708ce, (q31_t)0xfd018574, (q31_t)0x7ff6e307, (q31_t)0xfcfb3d67,
+  (q31_t)0x7ff6bcf0, (q31_t)0xfcf4f55c, (q31_t)0x7ff6968b, (q31_t)0xfceead52, (q31_t)0x7ff66fd7, (q31_t)0xfce8654b, (q31_t)0x7ff648d4, (q31_t)0xfce21d45,
+  (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7ff5f9e1, (q31_t)0xfcd58d3f, (q31_t)0x7ff5d1f1, (q31_t)0xfccf453f, (q31_t)0x7ff5a9b2, (q31_t)0xfcc8fd41,
+  (q31_t)0x7ff58125, (q31_t)0xfcc2b545, (q31_t)0x7ff55848, (q31_t)0xfcbc6d4c, (q31_t)0x7ff52f1d, (q31_t)0xfcb62554, (q31_t)0x7ff505a2, (q31_t)0xfcafdd5e,
+  (q31_t)0x7ff4dbd9, (q31_t)0xfca9956a, (q31_t)0x7ff4b1c0, (q31_t)0xfca34d78, (q31_t)0x7ff48759, (q31_t)0xfc9d0588, (q31_t)0x7ff45ca3, (q31_t)0xfc96bd9b,
+  (q31_t)0x7ff4319d, (q31_t)0xfc9075af, (q31_t)0x7ff40649, (q31_t)0xfc8a2dc6, (q31_t)0x7ff3daa6, (q31_t)0xfc83e5de, (q31_t)0x7ff3aeb4, (q31_t)0xfc7d9df9,
+  (q31_t)0x7ff38274, (q31_t)0xfc775616, (q31_t)0x7ff355e4, (q31_t)0xfc710e36, (q31_t)0x7ff32905, (q31_t)0xfc6ac657, (q31_t)0x7ff2fbd7, (q31_t)0xfc647e7b,
+  (q31_t)0x7ff2ce5b, (q31_t)0xfc5e36a0, (q31_t)0x7ff2a08f, (q31_t)0xfc57eec9, (q31_t)0x7ff27275, (q31_t)0xfc51a6f3, (q31_t)0x7ff2440b, (q31_t)0xfc4b5f20,
+  (q31_t)0x7ff21553, (q31_t)0xfc45174e, (q31_t)0x7ff1e64c, (q31_t)0xfc3ecf80, (q31_t)0x7ff1b6f6, (q31_t)0xfc3887b3, (q31_t)0x7ff18751, (q31_t)0xfc323fe9,
+  (q31_t)0x7ff1575d, (q31_t)0xfc2bf821, (q31_t)0x7ff1271a, (q31_t)0xfc25b05c, (q31_t)0x7ff0f688, (q31_t)0xfc1f6899, (q31_t)0x7ff0c5a7, (q31_t)0xfc1920d8,
+  (q31_t)0x7ff09478, (q31_t)0xfc12d91a, (q31_t)0x7ff062f9, (q31_t)0xfc0c915e, (q31_t)0x7ff0312c, (q31_t)0xfc0649a5, (q31_t)0x7fefff0f, (q31_t)0xfc0001ee,
+  (q31_t)0x7fefcca4, (q31_t)0xfbf9ba39, (q31_t)0x7fef99ea, (q31_t)0xfbf37287, (q31_t)0x7fef66e1, (q31_t)0xfbed2ad8, (q31_t)0x7fef3388, (q31_t)0xfbe6e32b,
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+  (q31_t)0x7feb9b85, (q31_t)0xfb7c223d, (q31_t)0x7feb62a1, (q31_t)0xfb75dac0, (q31_t)0x7feb296d, (q31_t)0xfb6f9345, (q31_t)0x7feaefeb, (q31_t)0xfb694bce,
+  (q31_t)0x7feab61a, (q31_t)0xfb630459, (q31_t)0x7fea7bfa, (q31_t)0xfb5cbce7, (q31_t)0x7fea418b, (q31_t)0xfb567578, (q31_t)0x7fea06cd, (q31_t)0xfb502e0c,
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+  (q31_t)0x7fe7e841, (q31_t)0xfb17abc2, (q31_t)0x7fe7aa6e, (q31_t)0xfb116474, (q31_t)0x7fe76c4c, (q31_t)0xfb0b1d28, (q31_t)0x7fe72ddb, (q31_t)0xfb04d5e0,
+  (q31_t)0x7fe6ef1c, (q31_t)0xfafe8e9b, (q31_t)0x7fe6b00d, (q31_t)0xfaf84758, (q31_t)0x7fe670b0, (q31_t)0xfaf20019, (q31_t)0x7fe63103, (q31_t)0xfaebb8dd,
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+  (q31_t)0x7fe4ee06, (q31_t)0xfacc54e0, (q31_t)0x7fe4ac81, (q31_t)0xfac60db7, (q31_t)0x7fe46aac, (q31_t)0xfabfc691, (q31_t)0x7fe42889, (q31_t)0xfab97f6e,
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+  (q31_t)0x7fe2d938, (q31_t)0xfa9a1bf3, (q31_t)0x7fe2953b, (q31_t)0xfa93d4e4, (q31_t)0x7fe250ef, (q31_t)0xfa8d8dd8, (q31_t)0x7fe20c55, (q31_t)0xfa8746d0,
+  (q31_t)0x7fe1c76b, (q31_t)0xfa80ffcb, (q31_t)0x7fe18233, (q31_t)0xfa7ab8ca, (q31_t)0x7fe13cac, (q31_t)0xfa7471cc, (q31_t)0x7fe0f6d6, (q31_t)0xfa6e2ad1,
+  (q31_t)0x7fe0b0b1, (q31_t)0xfa67e3da, (q31_t)0x7fe06a3d, (q31_t)0xfa619ce7, (q31_t)0x7fe0237a, (q31_t)0xfa5b55f7, (q31_t)0x7fdfdc69, (q31_t)0xfa550f0a,
+  (q31_t)0x7fdf9508, (q31_t)0xfa4ec821, (q31_t)0x7fdf4d59, (q31_t)0xfa48813b, (q31_t)0x7fdf055a, (q31_t)0xfa423a59, (q31_t)0x7fdebd0d, (q31_t)0xfa3bf37a,
+  (q31_t)0x7fde7471, (q31_t)0xfa35ac9f, (q31_t)0x7fde2b86, (q31_t)0xfa2f65c8, (q31_t)0x7fdde24d, (q31_t)0xfa291ef4, (q31_t)0x7fdd98c4, (q31_t)0xfa22d823,
+  (q31_t)0x7fdd4eec, (q31_t)0xfa1c9157, (q31_t)0x7fdd04c6, (q31_t)0xfa164a8e, (q31_t)0x7fdcba51, (q31_t)0xfa1003c8, (q31_t)0x7fdc6f8d, (q31_t)0xfa09bd06,
+  (q31_t)0x7fdc247a, (q31_t)0xfa037648, (q31_t)0x7fdbd918, (q31_t)0xf9fd2f8e, (q31_t)0x7fdb8d67, (q31_t)0xf9f6e8d7, (q31_t)0x7fdb4167, (q31_t)0xf9f0a224,
+  (q31_t)0x7fdaf519, (q31_t)0xf9ea5b75, (q31_t)0x7fdaa87c, (q31_t)0xf9e414ca, (q31_t)0x7fda5b8f, (q31_t)0xf9ddce22, (q31_t)0x7fda0e54, (q31_t)0xf9d7877e,
+  (q31_t)0x7fd9c0ca, (q31_t)0xf9d140de, (q31_t)0x7fd972f2, (q31_t)0xf9cafa42, (q31_t)0x7fd924ca, (q31_t)0xf9c4b3a9, (q31_t)0x7fd8d653, (q31_t)0xf9be6d15,
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+  (q31_t)0x7fce0c3e, (q31_t)0xf8ef5cbb, (q31_t)0x7fcdb34f, (q31_t)0xf8e916b2, (q31_t)0x7fcd5a11, (q31_t)0xf8e2d0ae, (q31_t)0x7fcd0083, (q31_t)0xf8dc8aae,
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+  (q31_t)0x7fc85854, (q31_t)0xf88afe42, (q31_t)0x7fc7fa77, (q31_t)0xf884b880, (q31_t)0x7fc79c4b, (q31_t)0xf87e72c4, (q31_t)0x7fc73dd1, (q31_t)0xf8782d0c,
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+  (q31_t)0x7fc560cf, (q31_t)0xf858d0bb, (q31_t)0x7fc5007c, (q31_t)0xf8528b1f, (q31_t)0x7fc49fda, (q31_t)0xf84c4588, (q31_t)0x7fc43ee9, (q31_t)0xf845fff5,
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+  (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fc1f2cc, (q31_t)0xf8205eec, (q31_t)0x7fc18fb4, (q31_t)0xf81a197b, (q31_t)0x7fc12c4d, (q31_t)0xf813d410,
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+  (q31_t)0x7fbd9fd0, (q31_t)0xf7db6423, (q31_t)0x7fbd3955, (q31_t)0xf7d51ee9, (q31_t)0x7fbcd28b, (q31_t)0xf7ced9b4, (q31_t)0x7fbc6b72, (q31_t)0xf7c89484,
+  (q31_t)0x7fbc040a, (q31_t)0xf7c24f59, (q31_t)0x7fbb9c53, (q31_t)0xf7bc0a33, (q31_t)0x7fbb344e, (q31_t)0xf7b5c512, (q31_t)0x7fbacbfa, (q31_t)0xf7af7ff6,
+  (q31_t)0x7fba6357, (q31_t)0xf7a93ae0, (q31_t)0x7fb9fa65, (q31_t)0xf7a2f5ce, (q31_t)0x7fb99125, (q31_t)0xf79cb0c2, (q31_t)0x7fb92796, (q31_t)0xf7966bbb,
+  (q31_t)0x7fb8bdb8, (q31_t)0xf79026b9, (q31_t)0x7fb8538b, (q31_t)0xf789e1bc, (q31_t)0x7fb7e90f, (q31_t)0xf7839cc4, (q31_t)0x7fb77e45, (q31_t)0xf77d57d2,
+  (q31_t)0x7fb7132b, (q31_t)0xf77712e5, (q31_t)0x7fb6a7c3, (q31_t)0xf770cdfd, (q31_t)0x7fb63c0d, (q31_t)0xf76a891b, (q31_t)0x7fb5d007, (q31_t)0xf764443d,
+  (q31_t)0x7fb563b3, (q31_t)0xf75dff66, (q31_t)0x7fb4f710, (q31_t)0xf757ba93, (q31_t)0x7fb48a1e, (q31_t)0xf75175c6, (q31_t)0x7fb41cdd, (q31_t)0xf74b30fe,
+  (q31_t)0x7fb3af4e, (q31_t)0xf744ec3b, (q31_t)0x7fb34170, (q31_t)0xf73ea77e, (q31_t)0x7fb2d343, (q31_t)0xf73862c6, (q31_t)0x7fb264c7, (q31_t)0xf7321e14,
+  (q31_t)0x7fb1f5fc, (q31_t)0xf72bd967, (q31_t)0x7fb186e3, (q31_t)0xf72594c0, (q31_t)0x7fb1177b, (q31_t)0xf71f501e, (q31_t)0x7fb0a7c4, (q31_t)0xf7190b81,
+  (q31_t)0x7fb037bf, (q31_t)0xf712c6ea, (q31_t)0x7fafc76a, (q31_t)0xf70c8259, (q31_t)0x7faf56c7, (q31_t)0xf7063dcd, (q31_t)0x7faee5d5, (q31_t)0xf6fff946,
+  (q31_t)0x7fae7495, (q31_t)0xf6f9b4c6, (q31_t)0x7fae0305, (q31_t)0xf6f3704a, (q31_t)0x7fad9127, (q31_t)0xf6ed2bd4, (q31_t)0x7fad1efa, (q31_t)0xf6e6e764,
+  (q31_t)0x7facac7f, (q31_t)0xf6e0a2fa, (q31_t)0x7fac39b4, (q31_t)0xf6da5e95, (q31_t)0x7fabc69b, (q31_t)0xf6d41a36, (q31_t)0x7fab5333, (q31_t)0xf6cdd5dc,
+  (q31_t)0x7faadf7c, (q31_t)0xf6c79188, (q31_t)0x7faa6b77, (q31_t)0xf6c14d3a, (q31_t)0x7fa9f723, (q31_t)0xf6bb08f1, (q31_t)0x7fa98280, (q31_t)0xf6b4c4ae,
+  (q31_t)0x7fa90d8e, (q31_t)0xf6ae8071, (q31_t)0x7fa8984e, (q31_t)0xf6a83c3a, (q31_t)0x7fa822bf, (q31_t)0xf6a1f808, (q31_t)0x7fa7ace1, (q31_t)0xf69bb3dd,
+  (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7fa6c039, (q31_t)0xf68f2b96, (q31_t)0x7fa6496e, (q31_t)0xf688e77c, (q31_t)0x7fa5d256, (q31_t)0xf682a367,
+  (q31_t)0x7fa55aee, (q31_t)0xf67c5f59, (q31_t)0x7fa4e338, (q31_t)0xf6761b50, (q31_t)0x7fa46b32, (q31_t)0xf66fd74d, (q31_t)0x7fa3f2df, (q31_t)0xf6699350,
+  (q31_t)0x7fa37a3c, (q31_t)0xf6634f59, (q31_t)0x7fa3014b, (q31_t)0xf65d0b68, (q31_t)0x7fa2880b, (q31_t)0xf656c77c, (q31_t)0x7fa20e7c, (q31_t)0xf6508397,
+  (q31_t)0x7fa1949e, (q31_t)0xf64a3fb8, (q31_t)0x7fa11a72, (q31_t)0xf643fbdf, (q31_t)0x7fa09ff7, (q31_t)0xf63db80b, (q31_t)0x7fa0252e, (q31_t)0xf637743e,
+  (q31_t)0x7f9faa15, (q31_t)0xf6313077, (q31_t)0x7f9f2eae, (q31_t)0xf62aecb5, (q31_t)0x7f9eb2f8, (q31_t)0xf624a8fa, (q31_t)0x7f9e36f4, (q31_t)0xf61e6545,
+  (q31_t)0x7f9dbaa0, (q31_t)0xf6182196, (q31_t)0x7f9d3dfe, (q31_t)0xf611dded, (q31_t)0x7f9cc10d, (q31_t)0xf60b9a4b, (q31_t)0x7f9c43ce, (q31_t)0xf60556ae,
+  (q31_t)0x7f9bc640, (q31_t)0xf5ff1318, (q31_t)0x7f9b4863, (q31_t)0xf5f8cf87, (q31_t)0x7f9aca37, (q31_t)0xf5f28bfd, (q31_t)0x7f9a4bbd, (q31_t)0xf5ec4879,
+  (q31_t)0x7f99ccf4, (q31_t)0xf5e604fc, (q31_t)0x7f994ddc, (q31_t)0xf5dfc184, (q31_t)0x7f98ce76, (q31_t)0xf5d97e13, (q31_t)0x7f984ec1, (q31_t)0xf5d33aa8,
+  (q31_t)0x7f97cebd, (q31_t)0xf5ccf743, (q31_t)0x7f974e6a, (q31_t)0xf5c6b3e5, (q31_t)0x7f96cdc9, (q31_t)0xf5c0708d, (q31_t)0x7f964cd9, (q31_t)0xf5ba2d3b,
+  (q31_t)0x7f95cb9a, (q31_t)0xf5b3e9f0, (q31_t)0x7f954a0d, (q31_t)0xf5ada6ab, (q31_t)0x7f94c831, (q31_t)0xf5a7636c, (q31_t)0x7f944606, (q31_t)0xf5a12034,
+  (q31_t)0x7f93c38c, (q31_t)0xf59add02, (q31_t)0x7f9340c4, (q31_t)0xf59499d6, (q31_t)0x7f92bdad, (q31_t)0xf58e56b1, (q31_t)0x7f923a48, (q31_t)0xf5881393,
+  (q31_t)0x7f91b694, (q31_t)0xf581d07b, (q31_t)0x7f913291, (q31_t)0xf57b8d69, (q31_t)0x7f90ae3f, (q31_t)0xf5754a5e, (q31_t)0x7f90299f, (q31_t)0xf56f0759,
+  (q31_t)0x7f8fa4b0, (q31_t)0xf568c45b, (q31_t)0x7f8f1f72, (q31_t)0xf5628163, (q31_t)0x7f8e99e6, (q31_t)0xf55c3e72, (q31_t)0x7f8e140a, (q31_t)0xf555fb88,
+  (q31_t)0x7f8d8de1, (q31_t)0xf54fb8a4, (q31_t)0x7f8d0768, (q31_t)0xf54975c6, (q31_t)0x7f8c80a1, (q31_t)0xf54332ef, (q31_t)0x7f8bf98b, (q31_t)0xf53cf01f,
+  (q31_t)0x7f8b7227, (q31_t)0xf536ad56, (q31_t)0x7f8aea74, (q31_t)0xf5306a93, (q31_t)0x7f8a6272, (q31_t)0xf52a27d7, (q31_t)0x7f89da21, (q31_t)0xf523e521,
+  (q31_t)0x7f895182, (q31_t)0xf51da273, (q31_t)0x7f88c894, (q31_t)0xf5175fca, (q31_t)0x7f883f58, (q31_t)0xf5111d29, (q31_t)0x7f87b5cd, (q31_t)0xf50ada8f,
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+  (q31_t)0x7f850179, (q31_t)0xf4eb8def, (q31_t)0x7f847616, (q31_t)0xf4e54b7d, (q31_t)0x7f83ea64, (q31_t)0xf4df0912, (q31_t)0x7f835e64, (q31_t)0xf4d8c6ae,
+  (q31_t)0x7f82d214, (q31_t)0xf4d28451, (q31_t)0x7f824577, (q31_t)0xf4cc41fb, (q31_t)0x7f81b88a, (q31_t)0xf4c5ffab, (q31_t)0x7f812b4f, (q31_t)0xf4bfbd63,
+  (q31_t)0x7f809dc5, (q31_t)0xf4b97b21, (q31_t)0x7f800fed, (q31_t)0xf4b338e7, (q31_t)0x7f7f81c6, (q31_t)0xf4acf6b3, (q31_t)0x7f7ef350, (q31_t)0xf4a6b486,
+  (q31_t)0x7f7e648c, (q31_t)0xf4a07261, (q31_t)0x7f7dd579, (q31_t)0xf49a3042, (q31_t)0x7f7d4617, (q31_t)0xf493ee2b, (q31_t)0x7f7cb667, (q31_t)0xf48dac1a,
+  (q31_t)0x7f7c2668, (q31_t)0xf4876a10, (q31_t)0x7f7b961b, (q31_t)0xf481280e, (q31_t)0x7f7b057e, (q31_t)0xf47ae613, (q31_t)0x7f7a7494, (q31_t)0xf474a41f,
+  (q31_t)0x7f79e35a, (q31_t)0xf46e6231, (q31_t)0x7f7951d2, (q31_t)0xf468204b, (q31_t)0x7f78bffb, (q31_t)0xf461de6d, (q31_t)0x7f782dd6, (q31_t)0xf45b9c95,
+  (q31_t)0x7f779b62, (q31_t)0xf4555ac5, (q31_t)0x7f77089f, (q31_t)0xf44f18fb, (q31_t)0x7f76758e, (q31_t)0xf448d739, (q31_t)0x7f75e22e, (q31_t)0xf442957e,
+  (q31_t)0x7f754e80, (q31_t)0xf43c53cb, (q31_t)0x7f74ba83, (q31_t)0xf436121e, (q31_t)0x7f742637, (q31_t)0xf42fd079, (q31_t)0x7f73919d, (q31_t)0xf4298edc,
+  (q31_t)0x7f72fcb4, (q31_t)0xf4234d45, (q31_t)0x7f72677c, (q31_t)0xf41d0bb6, (q31_t)0x7f71d1f6, (q31_t)0xf416ca2e, (q31_t)0x7f713c21, (q31_t)0xf41088ae,
+  (q31_t)0x7f70a5fe, (q31_t)0xf40a4735, (q31_t)0x7f700f8c, (q31_t)0xf40405c3, (q31_t)0x7f6f78cb, (q31_t)0xf3fdc459, (q31_t)0x7f6ee1bc, (q31_t)0xf3f782f6,
+  (q31_t)0x7f6e4a5e, (q31_t)0xf3f1419a, (q31_t)0x7f6db2b1, (q31_t)0xf3eb0046, (q31_t)0x7f6d1ab6, (q31_t)0xf3e4bef9, (q31_t)0x7f6c826d, (q31_t)0xf3de7db4,
+  (q31_t)0x7f6be9d4, (q31_t)0xf3d83c77, (q31_t)0x7f6b50ed, (q31_t)0xf3d1fb40, (q31_t)0x7f6ab7b8, (q31_t)0xf3cbba12, (q31_t)0x7f6a1e34, (q31_t)0xf3c578eb,
+  (q31_t)0x7f698461, (q31_t)0xf3bf37cb, (q31_t)0x7f68ea40, (q31_t)0xf3b8f6b3, (q31_t)0x7f684fd0, (q31_t)0xf3b2b5a3, (q31_t)0x7f67b512, (q31_t)0xf3ac749a,
+  (q31_t)0x7f671a05, (q31_t)0xf3a63398, (q31_t)0x7f667ea9, (q31_t)0xf39ff29f, (q31_t)0x7f65e2ff, (q31_t)0xf399b1ad, (q31_t)0x7f654706, (q31_t)0xf39370c2,
+  (q31_t)0x7f64aabf, (q31_t)0xf38d2fe0, (q31_t)0x7f640e29, (q31_t)0xf386ef05, (q31_t)0x7f637144, (q31_t)0xf380ae31, (q31_t)0x7f62d411, (q31_t)0xf37a6d66,
+  (q31_t)0x7f62368f, (q31_t)0xf3742ca2, (q31_t)0x7f6198bf, (q31_t)0xf36debe6, (q31_t)0x7f60faa0, (q31_t)0xf367ab31, (q31_t)0x7f605c33, (q31_t)0xf3616a85,
+  (q31_t)0x7f5fbd77, (q31_t)0xf35b29e0, (q31_t)0x7f5f1e6c, (q31_t)0xf354e943, (q31_t)0x7f5e7f13, (q31_t)0xf34ea8ae, (q31_t)0x7f5ddf6b, (q31_t)0xf3486820,
+  (q31_t)0x7f5d3f75, (q31_t)0xf342279b, (q31_t)0x7f5c9f30, (q31_t)0xf33be71d, (q31_t)0x7f5bfe9d, (q31_t)0xf335a6a7, (q31_t)0x7f5b5dbb, (q31_t)0xf32f6639,
+  (q31_t)0x7f5abc8a, (q31_t)0xf32925d3, (q31_t)0x7f5a1b0b, (q31_t)0xf322e575, (q31_t)0x7f59793e, (q31_t)0xf31ca51f, (q31_t)0x7f58d721, (q31_t)0xf31664d1,
+  (q31_t)0x7f5834b7, (q31_t)0xf310248a, (q31_t)0x7f5791fd, (q31_t)0xf309e44c, (q31_t)0x7f56eef5, (q31_t)0xf303a416, (q31_t)0x7f564b9f, (q31_t)0xf2fd63e8,
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+  (q31_t)0x7f531655, (q31_t)0xf2de2379, (q31_t)0x7f527127, (q31_t)0xf2d7e37b, (q31_t)0x7f51cbab, (q31_t)0xf2d1a385, (q31_t)0x7f5125e0, (q31_t)0xf2cb6398,
+  (q31_t)0x7f507fc7, (q31_t)0xf2c523b2, (q31_t)0x7f4fd95f, (q31_t)0xf2bee3d5, (q31_t)0x7f4f32a9, (q31_t)0xf2b8a400, (q31_t)0x7f4e8ba4, (q31_t)0xf2b26433,
+  (q31_t)0x7f4de451, (q31_t)0xf2ac246e, (q31_t)0x7f4d3caf, (q31_t)0xf2a5e4b1, (q31_t)0x7f4c94be, (q31_t)0xf29fa4fd, (q31_t)0x7f4bec7f, (q31_t)0xf2996551,
+  (q31_t)0x7f4b43f2, (q31_t)0xf29325ad, (q31_t)0x7f4a9b16, (q31_t)0xf28ce612, (q31_t)0x7f49f1eb, (q31_t)0xf286a67e, (q31_t)0x7f494872, (q31_t)0xf28066f4,
+  (q31_t)0x7f489eaa, (q31_t)0xf27a2771, (q31_t)0x7f47f494, (q31_t)0xf273e7f7, (q31_t)0x7f474a30, (q31_t)0xf26da885, (q31_t)0x7f469f7d, (q31_t)0xf267691b,
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+  (q31_t)0x7f3dd87c, (q31_t)0xf21633c0, (q31_t)0x7f3d297e, (q31_t)0xf20ff4ce, (q31_t)0x7f3c7a31, (q31_t)0xf209b5e4, (q31_t)0x7f3bca96, (q31_t)0xf2037702,
+  (q31_t)0x7f3b1aad, (q31_t)0xf1fd3829, (q31_t)0x7f3a6a75, (q31_t)0xf1f6f959, (q31_t)0x7f39b9ee, (q31_t)0xf1f0ba91, (q31_t)0x7f390919, (q31_t)0xf1ea7bd2,
+  (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c, (q31_t)0x7f37a684, (q31_t)0xf1ddfe6f, (q31_t)0x7f36f4c3, (q31_t)0xf1d7bfca, (q31_t)0x7f3642b4, (q31_t)0xf1d1812e,
+  (q31_t)0x7f359057, (q31_t)0xf1cb429a, (q31_t)0x7f34ddab, (q31_t)0xf1c50410, (q31_t)0x7f342ab1, (q31_t)0xf1bec58e, (q31_t)0x7f337768, (q31_t)0xf1b88715,
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+  (q31_t)0x7f2ff263, (q31_t)0xf1994f3d, (q31_t)0x7f2f3d44, (q31_t)0xf19310f9, (q31_t)0x7f2e87d6, (q31_t)0xf18cd2be, (q31_t)0x7f2dd219, (q31_t)0xf186948c,
+  (q31_t)0x7f2d1c0e, (q31_t)0xf1805662, (q31_t)0x7f2c65b5, (q31_t)0xf17a1842, (q31_t)0x7f2baf0d, (q31_t)0xf173da2b, (q31_t)0x7f2af817, (q31_t)0xf16d9c1d,
+  (q31_t)0x7f2a40d2, (q31_t)0xf1675e17, (q31_t)0x7f29893f, (q31_t)0xf161201b, (q31_t)0x7f28d15d, (q31_t)0xf15ae228, (q31_t)0x7f28192d, (q31_t)0xf154a43d,
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+  (q31_t)0x7f247ba5, (q31_t)0xf1356f32, (q31_t)0x7f23c19e, (q31_t)0xf12f317e, (q31_t)0x7f230749, (q31_t)0xf128f3d4, (q31_t)0x7f224ca6, (q31_t)0xf122b632,
+  (q31_t)0x7f2191b4, (q31_t)0xf11c789a, (q31_t)0x7f20d674, (q31_t)0xf1163b0b, (q31_t)0x7f201ae5, (q31_t)0xf10ffd85, (q31_t)0x7f1f5f08, (q31_t)0xf109c009,
+  (q31_t)0x7f1ea2dc, (q31_t)0xf1038295, (q31_t)0x7f1de662, (q31_t)0xf0fd452b, (q31_t)0x7f1d299a, (q31_t)0xf0f707ca, (q31_t)0x7f1c6c83, (q31_t)0xf0f0ca72,
+  (q31_t)0x7f1baf1e, (q31_t)0xf0ea8d24, (q31_t)0x7f1af16a, (q31_t)0xf0e44fdf, (q31_t)0x7f1a3368, (q31_t)0xf0de12a3, (q31_t)0x7f197518, (q31_t)0xf0d7d571,
+  (q31_t)0x7f18b679, (q31_t)0xf0d19848, (q31_t)0x7f17f78c, (q31_t)0xf0cb5b28, (q31_t)0x7f173850, (q31_t)0xf0c51e12, (q31_t)0x7f1678c6, (q31_t)0xf0bee105,
+  (q31_t)0x7f15b8ee, (q31_t)0xf0b8a401, (q31_t)0x7f14f8c7, (q31_t)0xf0b26707, (q31_t)0x7f143852, (q31_t)0xf0ac2a16, (q31_t)0x7f13778e, (q31_t)0xf0a5ed2f,
+  (q31_t)0x7f12b67c, (q31_t)0xf09fb051, (q31_t)0x7f11f51c, (q31_t)0xf099737d, (q31_t)0x7f11336d, (q31_t)0xf09336b2, (q31_t)0x7f107170, (q31_t)0xf08cf9f1,
+  (q31_t)0x7f0faf25, (q31_t)0xf086bd39, (q31_t)0x7f0eec8b, (q31_t)0xf080808b, (q31_t)0x7f0e29a3, (q31_t)0xf07a43e7, (q31_t)0x7f0d666c, (q31_t)0xf074074c,
+  (q31_t)0x7f0ca2e7, (q31_t)0xf06dcaba, (q31_t)0x7f0bdf14, (q31_t)0xf0678e32, (q31_t)0x7f0b1af2, (q31_t)0xf06151b4, (q31_t)0x7f0a5682, (q31_t)0xf05b1540,
+  (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7f08ccb7, (q31_t)0xf04e9c73, (q31_t)0x7f08075c, (q31_t)0xf048601c, (q31_t)0x7f0741b2, (q31_t)0xf04223ce,
+  (q31_t)0x7f067bba, (q31_t)0xf03be78a, (q31_t)0x7f05b574, (q31_t)0xf035ab4f, (q31_t)0x7f04eedf, (q31_t)0xf02f6f1f, (q31_t)0x7f0427fc, (q31_t)0xf02932f8,
+  (q31_t)0x7f0360cb, (q31_t)0xf022f6da, (q31_t)0x7f02994b, (q31_t)0xf01cbac7, (q31_t)0x7f01d17d, (q31_t)0xf0167ebd, (q31_t)0x7f010961, (q31_t)0xf01042be,
+  (q31_t)0x7f0040f6, (q31_t)0xf00a06c8, (q31_t)0x7eff783d, (q31_t)0xf003cadc, (q31_t)0x7efeaf36, (q31_t)0xeffd8ef9, (q31_t)0x7efde5e0, (q31_t)0xeff75321,
+  (q31_t)0x7efd1c3c, (q31_t)0xeff11753, (q31_t)0x7efc524a, (q31_t)0xefeadb8e, (q31_t)0x7efb8809, (q31_t)0xefe49fd3, (q31_t)0x7efabd7a, (q31_t)0xefde6423,
+  (q31_t)0x7ef9f29d, (q31_t)0xefd8287c, (q31_t)0x7ef92771, (q31_t)0xefd1ecdf, (q31_t)0x7ef85bf7, (q31_t)0xefcbb14c, (q31_t)0x7ef7902f, (q31_t)0xefc575c3,
+  (q31_t)0x7ef6c418, (q31_t)0xefbf3a45, (q31_t)0x7ef5f7b3, (q31_t)0xefb8fed0, (q31_t)0x7ef52b00, (q31_t)0xefb2c365, (q31_t)0x7ef45dfe, (q31_t)0xefac8804,
+  (q31_t)0x7ef390ae, (q31_t)0xefa64cae, (q31_t)0x7ef2c310, (q31_t)0xefa01161, (q31_t)0x7ef1f524, (q31_t)0xef99d61f, (q31_t)0x7ef126e9, (q31_t)0xef939ae6,
+  (q31_t)0x7ef05860, (q31_t)0xef8d5fb8, (q31_t)0x7eef8988, (q31_t)0xef872494, (q31_t)0x7eeeba62, (q31_t)0xef80e97a, (q31_t)0x7eedeaee, (q31_t)0xef7aae6b,
+  (q31_t)0x7eed1b2c, (q31_t)0xef747365, (q31_t)0x7eec4b1b, (q31_t)0xef6e386a, (q31_t)0x7eeb7abc, (q31_t)0xef67fd79, (q31_t)0x7eeaaa0f, (q31_t)0xef61c292,
+  (q31_t)0x7ee9d914, (q31_t)0xef5b87b5, (q31_t)0x7ee907ca, (q31_t)0xef554ce3, (q31_t)0x7ee83632, (q31_t)0xef4f121b, (q31_t)0x7ee7644c, (q31_t)0xef48d75d,
+  (q31_t)0x7ee69217, (q31_t)0xef429caa, (q31_t)0x7ee5bf94, (q31_t)0xef3c6201, (q31_t)0x7ee4ecc3, (q31_t)0xef362762, (q31_t)0x7ee419a3, (q31_t)0xef2feccd,
+  (q31_t)0x7ee34636, (q31_t)0xef29b243, (q31_t)0x7ee2727a, (q31_t)0xef2377c4, (q31_t)0x7ee19e6f, (q31_t)0xef1d3d4e, (q31_t)0x7ee0ca17, (q31_t)0xef1702e4,
+  (q31_t)0x7edff570, (q31_t)0xef10c883, (q31_t)0x7edf207b, (q31_t)0xef0a8e2d, (q31_t)0x7ede4b38, (q31_t)0xef0453e2, (q31_t)0x7edd75a6, (q31_t)0xeefe19a1,
+  (q31_t)0x7edc9fc6, (q31_t)0xeef7df6a, (q31_t)0x7edbc998, (q31_t)0xeef1a53e, (q31_t)0x7edaf31c, (q31_t)0xeeeb6b1c, (q31_t)0x7eda1c51, (q31_t)0xeee53105,
+  (q31_t)0x7ed94538, (q31_t)0xeedef6f9, (q31_t)0x7ed86dd1, (q31_t)0xeed8bcf7, (q31_t)0x7ed7961c, (q31_t)0xeed28300, (q31_t)0x7ed6be18, (q31_t)0xeecc4913,
+  (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31, (q31_t)0x7ed50d26, (q31_t)0xeebfd55a, (q31_t)0x7ed43438, (q31_t)0xeeb99b8d, (q31_t)0x7ed35afb, (q31_t)0xeeb361cb,
+  (q31_t)0x7ed28171, (q31_t)0xeead2813, (q31_t)0x7ed1a798, (q31_t)0xeea6ee66, (q31_t)0x7ed0cd70, (q31_t)0xeea0b4c4, (q31_t)0x7ecff2fb, (q31_t)0xee9a7b2d,
+  (q31_t)0x7ecf1837, (q31_t)0xee9441a0, (q31_t)0x7ece3d25, (q31_t)0xee8e081e, (q31_t)0x7ecd61c5, (q31_t)0xee87cea7, (q31_t)0x7ecc8617, (q31_t)0xee81953b,
+  (q31_t)0x7ecbaa1a, (q31_t)0xee7b5bd9, (q31_t)0x7ecacdd0, (q31_t)0xee752283, (q31_t)0x7ec9f137, (q31_t)0xee6ee937, (q31_t)0x7ec9144f, (q31_t)0xee68aff6,
+  (q31_t)0x7ec8371a, (q31_t)0xee6276bf, (q31_t)0x7ec75996, (q31_t)0xee5c3d94, (q31_t)0x7ec67bc5, (q31_t)0xee560473, (q31_t)0x7ec59da5, (q31_t)0xee4fcb5e,
+  (q31_t)0x7ec4bf36, (q31_t)0xee499253, (q31_t)0x7ec3e07a, (q31_t)0xee435953, (q31_t)0x7ec3016f, (q31_t)0xee3d205e, (q31_t)0x7ec22217, (q31_t)0xee36e775,
+  (q31_t)0x7ec14270, (q31_t)0xee30ae96, (q31_t)0x7ec0627a, (q31_t)0xee2a75c2, (q31_t)0x7ebf8237, (q31_t)0xee243cf9, (q31_t)0x7ebea1a6, (q31_t)0xee1e043b,
+  (q31_t)0x7ebdc0c6, (q31_t)0xee17cb88, (q31_t)0x7ebcdf98, (q31_t)0xee1192e0, (q31_t)0x7ebbfe1c, (q31_t)0xee0b5a43, (q31_t)0x7ebb1c52, (q31_t)0xee0521b2,
+  (q31_t)0x7eba3a39, (q31_t)0xedfee92b, (q31_t)0x7eb957d2, (q31_t)0xedf8b0b0, (q31_t)0x7eb8751e, (q31_t)0xedf2783f, (q31_t)0x7eb7921b, (q31_t)0xedec3fda,
+  (q31_t)0x7eb6aeca, (q31_t)0xede60780, (q31_t)0x7eb5cb2a, (q31_t)0xeddfcf31, (q31_t)0x7eb4e73d, (q31_t)0xedd996ed, (q31_t)0x7eb40301, (q31_t)0xedd35eb5,
+  (q31_t)0x7eb31e78, (q31_t)0xedcd2687, (q31_t)0x7eb239a0, (q31_t)0xedc6ee65, (q31_t)0x7eb1547a, (q31_t)0xedc0b64e, (q31_t)0x7eb06f05, (q31_t)0xedba7e43,
+  (q31_t)0x7eaf8943, (q31_t)0xedb44642, (q31_t)0x7eaea333, (q31_t)0xedae0e4d, (q31_t)0x7eadbcd4, (q31_t)0xeda7d664, (q31_t)0x7eacd627, (q31_t)0xeda19e85,
+  (q31_t)0x7eabef2c, (q31_t)0xed9b66b2, (q31_t)0x7eab07e3, (q31_t)0xed952eea, (q31_t)0x7eaa204c, (q31_t)0xed8ef72e, (q31_t)0x7ea93867, (q31_t)0xed88bf7d,
+  (q31_t)0x7ea85033, (q31_t)0xed8287d7, (q31_t)0x7ea767b2, (q31_t)0xed7c503d, (q31_t)0x7ea67ee2, (q31_t)0xed7618ae, (q31_t)0x7ea595c4, (q31_t)0xed6fe12b,
+  (q31_t)0x7ea4ac58, (q31_t)0xed69a9b3, (q31_t)0x7ea3c29e, (q31_t)0xed637246, (q31_t)0x7ea2d896, (q31_t)0xed5d3ae5, (q31_t)0x7ea1ee3f, (q31_t)0xed570390,
+  (q31_t)0x7ea1039b, (q31_t)0xed50cc46, (q31_t)0x7ea018a8, (q31_t)0xed4a9507, (q31_t)0x7e9f2d68, (q31_t)0xed445dd5, (q31_t)0x7e9e41d9, (q31_t)0xed3e26ad,
+  (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e9c69d1, (q31_t)0xed31b881, (q31_t)0x7e9b7d58, (q31_t)0xed2b817d, (q31_t)0x7e9a9091, (q31_t)0xed254a84,
+  (q31_t)0x7e99a37c, (q31_t)0xed1f1396, (q31_t)0x7e98b618, (q31_t)0xed18dcb5, (q31_t)0x7e97c867, (q31_t)0xed12a5df, (q31_t)0x7e96da67, (q31_t)0xed0c6f14,
+  (q31_t)0x7e95ec1a, (q31_t)0xed063856, (q31_t)0x7e94fd7e, (q31_t)0xed0001a3, (q31_t)0x7e940e94, (q31_t)0xecf9cafb, (q31_t)0x7e931f5c, (q31_t)0xecf39460,
+  (q31_t)0x7e922fd6, (q31_t)0xeced5dd0, (q31_t)0x7e914002, (q31_t)0xece7274c, (q31_t)0x7e904fe0, (q31_t)0xece0f0d4, (q31_t)0x7e8f5f70, (q31_t)0xecdaba67,
+  (q31_t)0x7e8e6eb2, (q31_t)0xecd48407, (q31_t)0x7e8d7da6, (q31_t)0xecce4db2, (q31_t)0x7e8c8c4b, (q31_t)0xecc81769, (q31_t)0x7e8b9aa3, (q31_t)0xecc1e12c,
+  (q31_t)0x7e8aa8ac, (q31_t)0xecbbaafb, (q31_t)0x7e89b668, (q31_t)0xecb574d5, (q31_t)0x7e88c3d5, (q31_t)0xecaf3ebc, (q31_t)0x7e87d0f5, (q31_t)0xeca908ae,
+  (q31_t)0x7e86ddc6, (q31_t)0xeca2d2ad, (q31_t)0x7e85ea49, (q31_t)0xec9c9cb7, (q31_t)0x7e84f67e, (q31_t)0xec9666cd, (q31_t)0x7e840265, (q31_t)0xec9030f0,
+  (q31_t)0x7e830dff, (q31_t)0xec89fb1e, (q31_t)0x7e82194a, (q31_t)0xec83c558, (q31_t)0x7e812447, (q31_t)0xec7d8f9e, (q31_t)0x7e802ef6, (q31_t)0xec7759f1,
+  (q31_t)0x7e7f3957, (q31_t)0xec71244f, (q31_t)0x7e7e436a, (q31_t)0xec6aeeba, (q31_t)0x7e7d4d2f, (q31_t)0xec64b930, (q31_t)0x7e7c56a5, (q31_t)0xec5e83b3,
+  (q31_t)0x7e7b5fce, (q31_t)0xec584e41, (q31_t)0x7e7a68a9, (q31_t)0xec5218dc, (q31_t)0x7e797136, (q31_t)0xec4be383, (q31_t)0x7e787975, (q31_t)0xec45ae36,
+  (q31_t)0x7e778166, (q31_t)0xec3f78f6, (q31_t)0x7e768908, (q31_t)0xec3943c1, (q31_t)0x7e75905d, (q31_t)0xec330e99, (q31_t)0x7e749764, (q31_t)0xec2cd97d,
+  (q31_t)0x7e739e1d, (q31_t)0xec26a46d, (q31_t)0x7e72a488, (q31_t)0xec206f69, (q31_t)0x7e71aaa4, (q31_t)0xec1a3a72, (q31_t)0x7e70b073, (q31_t)0xec140587,
+  (q31_t)0x7e6fb5f4, (q31_t)0xec0dd0a8, (q31_t)0x7e6ebb27, (q31_t)0xec079bd6, (q31_t)0x7e6dc00c, (q31_t)0xec01670f, (q31_t)0x7e6cc4a2, (q31_t)0xebfb3256,
+  (q31_t)0x7e6bc8eb, (q31_t)0xebf4fda8, (q31_t)0x7e6acce6, (q31_t)0xebeec907, (q31_t)0x7e69d093, (q31_t)0xebe89472, (q31_t)0x7e68d3f2, (q31_t)0xebe25fea,
+  (q31_t)0x7e67d703, (q31_t)0xebdc2b6e, (q31_t)0x7e66d9c6, (q31_t)0xebd5f6fe, (q31_t)0x7e65dc3b, (q31_t)0xebcfc29b, (q31_t)0x7e64de62, (q31_t)0xebc98e45,
+  (q31_t)0x7e63e03b, (q31_t)0xebc359fb, (q31_t)0x7e62e1c6, (q31_t)0xebbd25bd, (q31_t)0x7e61e303, (q31_t)0xebb6f18c, (q31_t)0x7e60e3f2, (q31_t)0xebb0bd67,
+  (q31_t)0x7e5fe493, (q31_t)0xebaa894f, (q31_t)0x7e5ee4e6, (q31_t)0xeba45543, (q31_t)0x7e5de4ec, (q31_t)0xeb9e2144, (q31_t)0x7e5ce4a3, (q31_t)0xeb97ed52,
+  (q31_t)0x7e5be40c, (q31_t)0xeb91b96c, (q31_t)0x7e5ae328, (q31_t)0xeb8b8593, (q31_t)0x7e59e1f5, (q31_t)0xeb8551c6, (q31_t)0x7e58e075, (q31_t)0xeb7f1e06,
+  (q31_t)0x7e57dea7, (q31_t)0xeb78ea52, (q31_t)0x7e56dc8a, (q31_t)0xeb72b6ac, (q31_t)0x7e55da20, (q31_t)0xeb6c8312, (q31_t)0x7e54d768, (q31_t)0xeb664f84,
+  (q31_t)0x7e53d462, (q31_t)0xeb601c04, (q31_t)0x7e52d10e, (q31_t)0xeb59e890, (q31_t)0x7e51cd6c, (q31_t)0xeb53b529, (q31_t)0x7e50c97c, (q31_t)0xeb4d81ce,
+  (q31_t)0x7e4fc53e, (q31_t)0xeb474e81, (q31_t)0x7e4ec0b2, (q31_t)0xeb411b40, (q31_t)0x7e4dbbd9, (q31_t)0xeb3ae80c, (q31_t)0x7e4cb6b1, (q31_t)0xeb34b4e4,
+  (q31_t)0x7e4bb13c, (q31_t)0xeb2e81ca, (q31_t)0x7e4aab78, (q31_t)0xeb284ebc, (q31_t)0x7e49a567, (q31_t)0xeb221bbb, (q31_t)0x7e489f08, (q31_t)0xeb1be8c8,
+  (q31_t)0x7e47985b, (q31_t)0xeb15b5e1, (q31_t)0x7e469160, (q31_t)0xeb0f8307, (q31_t)0x7e458a17, (q31_t)0xeb095039, (q31_t)0x7e448281, (q31_t)0xeb031d79,
+  (q31_t)0x7e437a9c, (q31_t)0xeafceac6, (q31_t)0x7e427269, (q31_t)0xeaf6b81f, (q31_t)0x7e4169e9, (q31_t)0xeaf08586, (q31_t)0x7e40611b, (q31_t)0xeaea52fa,
+  (q31_t)0x7e3f57ff, (q31_t)0xeae4207a, (q31_t)0x7e3e4e95, (q31_t)0xeaddee08, (q31_t)0x7e3d44dd, (q31_t)0xead7bba3, (q31_t)0x7e3c3ad7, (q31_t)0xead1894b,
+  (q31_t)0x7e3b3083, (q31_t)0xeacb56ff, (q31_t)0x7e3a25e2, (q31_t)0xeac524c1, (q31_t)0x7e391af3, (q31_t)0xeabef290, (q31_t)0x7e380fb5, (q31_t)0xeab8c06c,
+  (q31_t)0x7e37042a, (q31_t)0xeab28e56, (q31_t)0x7e35f851, (q31_t)0xeaac5c4c, (q31_t)0x7e34ec2b, (q31_t)0xeaa62a4f, (q31_t)0x7e33dfb6, (q31_t)0xea9ff860,
+  (q31_t)0x7e32d2f4, (q31_t)0xea99c67e, (q31_t)0x7e31c5e3, (q31_t)0xea9394a9, (q31_t)0x7e30b885, (q31_t)0xea8d62e1, (q31_t)0x7e2faad9, (q31_t)0xea873127,
+  (q31_t)0x7e2e9cdf, (q31_t)0xea80ff7a, (q31_t)0x7e2d8e97, (q31_t)0xea7acdda, (q31_t)0x7e2c8002, (q31_t)0xea749c47, (q31_t)0x7e2b711f, (q31_t)0xea6e6ac2,
+  (q31_t)0x7e2a61ed, (q31_t)0xea683949, (q31_t)0x7e29526e, (q31_t)0xea6207df, (q31_t)0x7e2842a2, (q31_t)0xea5bd681, (q31_t)0x7e273287, (q31_t)0xea55a531,
+  (q31_t)0x7e26221f, (q31_t)0xea4f73ee, (q31_t)0x7e251168, (q31_t)0xea4942b9, (q31_t)0x7e240064, (q31_t)0xea431191, (q31_t)0x7e22ef12, (q31_t)0xea3ce077,
+  (q31_t)0x7e21dd73, (q31_t)0xea36af69, (q31_t)0x7e20cb85, (q31_t)0xea307e6a, (q31_t)0x7e1fb94a, (q31_t)0xea2a4d78, (q31_t)0x7e1ea6c1, (q31_t)0xea241c93,
+  (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7e1c80c5, (q31_t)0xea17baf2, (q31_t)0x7e1b6d53, (q31_t)0xea118a35, (q31_t)0x7e1a5992, (q31_t)0xea0b5987,
+  (q31_t)0x7e194584, (q31_t)0xea0528e5, (q31_t)0x7e183128, (q31_t)0xe9fef852, (q31_t)0x7e171c7f, (q31_t)0xe9f8c7cc, (q31_t)0x7e160787, (q31_t)0xe9f29753,
+  (q31_t)0x7e14f242, (q31_t)0xe9ec66e8, (q31_t)0x7e13dcaf, (q31_t)0xe9e6368b, (q31_t)0x7e12c6ce, (q31_t)0xe9e0063c, (q31_t)0x7e11b0a0, (q31_t)0xe9d9d5fa,
+  (q31_t)0x7e109a24, (q31_t)0xe9d3a5c5, (q31_t)0x7e0f835a, (q31_t)0xe9cd759f, (q31_t)0x7e0e6c42, (q31_t)0xe9c74586, (q31_t)0x7e0d54dc, (q31_t)0xe9c1157a,
+  (q31_t)0x7e0c3d29, (q31_t)0xe9bae57d, (q31_t)0x7e0b2528, (q31_t)0xe9b4b58d, (q31_t)0x7e0a0cd9, (q31_t)0xe9ae85ab, (q31_t)0x7e08f43d, (q31_t)0xe9a855d7,
+  (q31_t)0x7e07db52, (q31_t)0xe9a22610, (q31_t)0x7e06c21a, (q31_t)0xe99bf658, (q31_t)0x7e05a894, (q31_t)0xe995c6ad, (q31_t)0x7e048ec1, (q31_t)0xe98f9710,
+  (q31_t)0x7e0374a0, (q31_t)0xe9896781, (q31_t)0x7e025a31, (q31_t)0xe98337ff, (q31_t)0x7e013f74, (q31_t)0xe97d088c, (q31_t)0x7e00246a, (q31_t)0xe976d926,
+  (q31_t)0x7dff0911, (q31_t)0xe970a9ce, (q31_t)0x7dfded6c, (q31_t)0xe96a7a85, (q31_t)0x7dfcd178, (q31_t)0xe9644b49, (q31_t)0x7dfbb537, (q31_t)0xe95e1c1b,
+  (q31_t)0x7dfa98a8, (q31_t)0xe957ecfb, (q31_t)0x7df97bcb, (q31_t)0xe951bde9, (q31_t)0x7df85ea0, (q31_t)0xe94b8ee5, (q31_t)0x7df74128, (q31_t)0xe9455fef,
+  (q31_t)0x7df62362, (q31_t)0xe93f3107, (q31_t)0x7df5054f, (q31_t)0xe939022d, (q31_t)0x7df3e6ee, (q31_t)0xe932d361, (q31_t)0x7df2c83f, (q31_t)0xe92ca4a4,
+  (q31_t)0x7df1a942, (q31_t)0xe92675f4, (q31_t)0x7df089f8, (q31_t)0xe9204752, (q31_t)0x7def6a60, (q31_t)0xe91a18bf, (q31_t)0x7dee4a7a, (q31_t)0xe913ea39,
+  (q31_t)0x7ded2a47, (q31_t)0xe90dbbc2, (q31_t)0x7dec09c6, (q31_t)0xe9078d59, (q31_t)0x7deae8f7, (q31_t)0xe9015efe, (q31_t)0x7de9c7da, (q31_t)0xe8fb30b1,
+  (q31_t)0x7de8a670, (q31_t)0xe8f50273, (q31_t)0x7de784b9, (q31_t)0xe8eed443, (q31_t)0x7de662b3, (q31_t)0xe8e8a621, (q31_t)0x7de54060, (q31_t)0xe8e2780d,
+  (q31_t)0x7de41dc0, (q31_t)0xe8dc4a07, (q31_t)0x7de2fad1, (q31_t)0xe8d61c10, (q31_t)0x7de1d795, (q31_t)0xe8cfee27, (q31_t)0x7de0b40b, (q31_t)0xe8c9c04c,
+  (q31_t)0x7ddf9034, (q31_t)0xe8c39280, (q31_t)0x7dde6c0f, (q31_t)0xe8bd64c2, (q31_t)0x7ddd479d, (q31_t)0xe8b73712, (q31_t)0x7ddc22dc, (q31_t)0xe8b10971,
+  (q31_t)0x7ddafdce, (q31_t)0xe8aadbde, (q31_t)0x7dd9d873, (q31_t)0xe8a4ae59, (q31_t)0x7dd8b2ca, (q31_t)0xe89e80e3, (q31_t)0x7dd78cd3, (q31_t)0xe898537b,
+  (q31_t)0x7dd6668f, (q31_t)0xe8922622, (q31_t)0x7dd53ffc, (q31_t)0xe88bf8d7, (q31_t)0x7dd4191d, (q31_t)0xe885cb9a, (q31_t)0x7dd2f1f0, (q31_t)0xe87f9e6c,
+  (q31_t)0x7dd1ca75, (q31_t)0xe879714d, (q31_t)0x7dd0a2ac, (q31_t)0xe873443c, (q31_t)0x7dcf7a96, (q31_t)0xe86d173a, (q31_t)0x7dce5232, (q31_t)0xe866ea46,
+  (q31_t)0x7dcd2981, (q31_t)0xe860bd61, (q31_t)0x7dcc0082, (q31_t)0xe85a908a, (q31_t)0x7dcad736, (q31_t)0xe85463c2, (q31_t)0x7dc9ad9c, (q31_t)0xe84e3708,
+  (q31_t)0x7dc883b4, (q31_t)0xe8480a5d, (q31_t)0x7dc7597f, (q31_t)0xe841ddc1, (q31_t)0x7dc62efc, (q31_t)0xe83bb133, (q31_t)0x7dc5042b, (q31_t)0xe83584b4,
+  (q31_t)0x7dc3d90d, (q31_t)0xe82f5844, (q31_t)0x7dc2ada2, (q31_t)0xe8292be3, (q31_t)0x7dc181e8, (q31_t)0xe822ff90, (q31_t)0x7dc055e2, (q31_t)0xe81cd34b,
+  (q31_t)0x7dbf298d, (q31_t)0xe816a716, (q31_t)0x7dbdfceb, (q31_t)0xe8107aef, (q31_t)0x7dbccffc, (q31_t)0xe80a4ed7, (q31_t)0x7dbba2bf, (q31_t)0xe80422ce,
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+  (q31_t)0x7da77359, (q31_t)0xe79b3f16, (q31_t)0x7da640a9, (q31_t)0xe795141a, (q31_t)0x7da50dab, (q31_t)0xe78ee92c, (q31_t)0x7da3da5f, (q31_t)0xe788be4e,
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+  (q31_t)0x7d6c9ce9, (q31_t)0xe6737319, (q31_t)0x7d6b5bb4, (q31_t)0xe66d4b01, (q31_t)0x7d6a1a31, (q31_t)0xe66722f7, (q31_t)0x7d68d860, (q31_t)0xe660fafe,
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+  (q31_t)0x7d3eb30f, (q31_t)0xe595f6d7, (q31_t)0x7d3d66fa, (q31_t)0xe58fd0ff, (q31_t)0x7d3c1a98, (q31_t)0xe589ab38, (q31_t)0x7d3acde9, (q31_t)0xe5838581,
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+  (q31_t)0x7ccda169, (q31_t)0xe3926fad, (q31_t)0x7ccc3c06, (q31_t)0xe38c4f63, (q31_t)0x7ccad656, (q31_t)0xe3862f2a, (q31_t)0x7cc97059, (q31_t)0xe3800f03,
+  (q31_t)0x7cc80a0f, (q31_t)0xe379eeed, (q31_t)0x7cc6a378, (q31_t)0xe373ceea, (q31_t)0x7cc53c94, (q31_t)0xe36daef7, (q31_t)0x7cc3d563, (q31_t)0xe3678f17,
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+  (q31_t)0x7cbcccec, (q31_t)0xe348f0bd, (q31_t)0x7cbb63ee, (q31_t)0xe342d146, (q31_t)0x7cb9faa2, (q31_t)0xe33cb1e1, (q31_t)0x7cb8910a, (q31_t)0xe336928e,
+  (q31_t)0x7cb72724, (q31_t)0xe330734d, (q31_t)0x7cb5bcf2, (q31_t)0xe32a541d, (q31_t)0x7cb45272, (q31_t)0xe3243500, (q31_t)0x7cb2e7a6, (q31_t)0xe31e15f4,
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+  (q31_t)0x7ca618f3, (q31_t)0xe2e701ac, (q31_t)0x7ca4ab26, (q31_t)0xe2e0e352, (q31_t)0x7ca33d0c, (q31_t)0xe2dac50b, (q31_t)0x7ca1cea5, (q31_t)0xe2d4a6d6,
+  (q31_t)0x7ca05ff1, (q31_t)0xe2ce88b3, (q31_t)0x7c9ef0f0, (q31_t)0xe2c86aa2, (q31_t)0x7c9d81a3, (q31_t)0xe2c24ca2, (q31_t)0x7c9c1208, (q31_t)0xe2bc2eb5,
+  (q31_t)0x7c9aa221, (q31_t)0xe2b610da, (q31_t)0x7c9931ec, (q31_t)0xe2aff311, (q31_t)0x7c97c16b, (q31_t)0xe2a9d55a, (q31_t)0x7c96509d, (q31_t)0xe2a3b7b5,
+  (q31_t)0x7c94df83, (q31_t)0xe29d9a23, (q31_t)0x7c936e1b, (q31_t)0xe2977ca2, (q31_t)0x7c91fc66, (q31_t)0xe2915f34, (q31_t)0x7c908a65, (q31_t)0xe28b41d7,
+  (q31_t)0x7c8f1817, (q31_t)0xe285248d, (q31_t)0x7c8da57c, (q31_t)0xe27f0755, (q31_t)0x7c8c3294, (q31_t)0xe278ea30, (q31_t)0x7c8abf5f, (q31_t)0xe272cd1c,
+  (q31_t)0x7c894bde, (q31_t)0xe26cb01b, (q31_t)0x7c87d810, (q31_t)0xe266932c, (q31_t)0x7c8663f4, (q31_t)0xe260764f, (q31_t)0x7c84ef8c, (q31_t)0xe25a5984,
+  (q31_t)0x7c837ad8, (q31_t)0xe2543ccc, (q31_t)0x7c8205d6, (q31_t)0xe24e2026, (q31_t)0x7c809088, (q31_t)0xe2480393, (q31_t)0x7c7f1aed, (q31_t)0xe241e711,
+  (q31_t)0x7c7da505, (q31_t)0xe23bcaa2, (q31_t)0x7c7c2ed0, (q31_t)0xe235ae46, (q31_t)0x7c7ab84e, (q31_t)0xe22f91fc, (q31_t)0x7c794180, (q31_t)0xe22975c4,
+  (q31_t)0x7c77ca65, (q31_t)0xe223599e, (q31_t)0x7c7652fd, (q31_t)0xe21d3d8b, (q31_t)0x7c74db48, (q31_t)0xe217218b, (q31_t)0x7c736347, (q31_t)0xe211059d,
+  (q31_t)0x7c71eaf9, (q31_t)0xe20ae9c1, (q31_t)0x7c70725e, (q31_t)0xe204cdf8, (q31_t)0x7c6ef976, (q31_t)0xe1feb241, (q31_t)0x7c6d8041, (q31_t)0xe1f8969d,
+  (q31_t)0x7c6c06c0, (q31_t)0xe1f27b0b, (q31_t)0x7c6a8cf2, (q31_t)0xe1ec5f8c, (q31_t)0x7c6912d7, (q31_t)0xe1e64420, (q31_t)0x7c679870, (q31_t)0xe1e028c6,
+  (q31_t)0x7c661dbc, (q31_t)0xe1da0d7e, (q31_t)0x7c64a2bb, (q31_t)0xe1d3f24a, (q31_t)0x7c63276d, (q31_t)0xe1cdd727, (q31_t)0x7c61abd3, (q31_t)0xe1c7bc18,
+  (q31_t)0x7c602fec, (q31_t)0xe1c1a11b, (q31_t)0x7c5eb3b8, (q31_t)0xe1bb8631, (q31_t)0x7c5d3737, (q31_t)0xe1b56b59, (q31_t)0x7c5bba6a, (q31_t)0xe1af5094,
+  (q31_t)0x7c5a3d50, (q31_t)0xe1a935e2, (q31_t)0x7c58bfe9, (q31_t)0xe1a31b42, (q31_t)0x7c574236, (q31_t)0xe19d00b6, (q31_t)0x7c55c436, (q31_t)0xe196e63c,
+  (q31_t)0x7c5445e9, (q31_t)0xe190cbd4, (q31_t)0x7c52c74f, (q31_t)0xe18ab180, (q31_t)0x7c514869, (q31_t)0xe184973e, (q31_t)0x7c4fc936, (q31_t)0xe17e7d0f,
+  (q31_t)0x7c4e49b7, (q31_t)0xe17862f3, (q31_t)0x7c4cc9ea, (q31_t)0xe17248ea, (q31_t)0x7c4b49d2, (q31_t)0xe16c2ef4, (q31_t)0x7c49c96c, (q31_t)0xe1661510,
+  (q31_t)0x7c4848ba, (q31_t)0xe15ffb3f, (q31_t)0x7c46c7bb, (q31_t)0xe159e182, (q31_t)0x7c45466f, (q31_t)0xe153c7d7, (q31_t)0x7c43c4d7, (q31_t)0xe14dae3f,
+  (q31_t)0x7c4242f2, (q31_t)0xe14794ba, (q31_t)0x7c40c0c1, (q31_t)0xe1417b48, (q31_t)0x7c3f3e42, (q31_t)0xe13b61e9, (q31_t)0x7c3dbb78, (q31_t)0xe135489d,
+  (q31_t)0x7c3c3860, (q31_t)0xe12f2f63, (q31_t)0x7c3ab4fc, (q31_t)0xe129163d, (q31_t)0x7c39314b, (q31_t)0xe122fd2a, (q31_t)0x7c37ad4e, (q31_t)0xe11ce42a,
+  (q31_t)0x7c362904, (q31_t)0xe116cb3d, (q31_t)0x7c34a46d, (q31_t)0xe110b263, (q31_t)0x7c331f8a, (q31_t)0xe10a999c, (q31_t)0x7c319a5a, (q31_t)0xe10480e9,
+  (q31_t)0x7c3014de, (q31_t)0xe0fe6848, (q31_t)0x7c2e8f15, (q31_t)0xe0f84fbb, (q31_t)0x7c2d08ff, (q31_t)0xe0f23740, (q31_t)0x7c2b829d, (q31_t)0xe0ec1ed9,
+  (q31_t)0x7c29fbee, (q31_t)0xe0e60685, (q31_t)0x7c2874f3, (q31_t)0xe0dfee44, (q31_t)0x7c26edab, (q31_t)0xe0d9d616, (q31_t)0x7c256616, (q31_t)0xe0d3bdfc,
+  (q31_t)0x7c23de35, (q31_t)0xe0cda5f5, (q31_t)0x7c225607, (q31_t)0xe0c78e01, (q31_t)0x7c20cd8d, (q31_t)0xe0c17620, (q31_t)0x7c1f44c6, (q31_t)0xe0bb5e53,
+  (q31_t)0x7c1dbbb3, (q31_t)0xe0b54698, (q31_t)0x7c1c3253, (q31_t)0xe0af2ef2, (q31_t)0x7c1aa8a6, (q31_t)0xe0a9175e, (q31_t)0x7c191ead, (q31_t)0xe0a2ffde,
+  (q31_t)0x7c179467, (q31_t)0xe09ce871, (q31_t)0x7c1609d5, (q31_t)0xe096d117, (q31_t)0x7c147ef6, (q31_t)0xe090b9d1, (q31_t)0x7c12f3cb, (q31_t)0xe08aa29f,
+  (q31_t)0x7c116853, (q31_t)0xe0848b7f, (q31_t)0x7c0fdc8f, (q31_t)0xe07e7473, (q31_t)0x7c0e507e, (q31_t)0xe0785d7b, (q31_t)0x7c0cc421, (q31_t)0xe0724696,
+  (q31_t)0x7c0b3777, (q31_t)0xe06c2fc4, (q31_t)0x7c09aa80, (q31_t)0xe0661906, (q31_t)0x7c081d3d, (q31_t)0xe060025c, (q31_t)0x7c068fae, (q31_t)0xe059ebc5,
+  (q31_t)0x7c0501d2, (q31_t)0xe053d541, (q31_t)0x7c0373a9, (q31_t)0xe04dbed1, (q31_t)0x7c01e534, (q31_t)0xe047a875, (q31_t)0x7c005673, (q31_t)0xe041922c,
+  (q31_t)0x7bfec765, (q31_t)0xe03b7bf6, (q31_t)0x7bfd380a, (q31_t)0xe03565d5, (q31_t)0x7bfba863, (q31_t)0xe02f4fc6, (q31_t)0x7bfa1870, (q31_t)0xe02939cc,
+  (q31_t)0x7bf88830, (q31_t)0xe02323e5, (q31_t)0x7bf6f7a4, (q31_t)0xe01d0e12, (q31_t)0x7bf566cb, (q31_t)0xe016f852, (q31_t)0x7bf3d5a6, (q31_t)0xe010e2a7,
+  (q31_t)0x7bf24434, (q31_t)0xe00acd0e, (q31_t)0x7bf0b276, (q31_t)0xe004b78a, (q31_t)0x7bef206b, (q31_t)0xdffea219, (q31_t)0x7bed8e14, (q31_t)0xdff88cbc,
+  (q31_t)0x7bebfb70, (q31_t)0xdff27773, (q31_t)0x7bea6880, (q31_t)0xdfec623e, (q31_t)0x7be8d544, (q31_t)0xdfe64d1c, (q31_t)0x7be741bb, (q31_t)0xdfe0380e,
+  (q31_t)0x7be5ade6, (q31_t)0xdfda2314, (q31_t)0x7be419c4, (q31_t)0xdfd40e2e, (q31_t)0x7be28556, (q31_t)0xdfcdf95c, (q31_t)0x7be0f09b, (q31_t)0xdfc7e49d,
+  (q31_t)0x7bdf5b94, (q31_t)0xdfc1cff3, (q31_t)0x7bddc641, (q31_t)0xdfbbbb5c, (q31_t)0x7bdc30a1, (q31_t)0xdfb5a6d9, (q31_t)0x7bda9ab5, (q31_t)0xdfaf926a,
+  (q31_t)0x7bd9047c, (q31_t)0xdfa97e0f, (q31_t)0x7bd76df7, (q31_t)0xdfa369c8, (q31_t)0x7bd5d726, (q31_t)0xdf9d5595, (q31_t)0x7bd44008, (q31_t)0xdf974176,
+  (q31_t)0x7bd2a89e, (q31_t)0xdf912d6b, (q31_t)0x7bd110e8, (q31_t)0xdf8b1974, (q31_t)0x7bcf78e5, (q31_t)0xdf850591, (q31_t)0x7bcde095, (q31_t)0xdf7ef1c2,
+  (q31_t)0x7bcc47fa, (q31_t)0xdf78de07, (q31_t)0x7bcaaf12, (q31_t)0xdf72ca60, (q31_t)0x7bc915dd, (q31_t)0xdf6cb6cd, (q31_t)0x7bc77c5d, (q31_t)0xdf66a34e,
+  (q31_t)0x7bc5e290, (q31_t)0xdf608fe4, (q31_t)0x7bc44876, (q31_t)0xdf5a7c8d, (q31_t)0x7bc2ae10, (q31_t)0xdf54694b, (q31_t)0x7bc1135e, (q31_t)0xdf4e561c,
+  (q31_t)0x7bbf7860, (q31_t)0xdf484302, (q31_t)0x7bbddd15, (q31_t)0xdf422ffd, (q31_t)0x7bbc417e, (q31_t)0xdf3c1d0b, (q31_t)0x7bbaa59a, (q31_t)0xdf360a2d,
+  (q31_t)0x7bb9096b, (q31_t)0xdf2ff764, (q31_t)0x7bb76cef, (q31_t)0xdf29e4af, (q31_t)0x7bb5d026, (q31_t)0xdf23d20e, (q31_t)0x7bb43311, (q31_t)0xdf1dbf82,
+  (q31_t)0x7bb295b0, (q31_t)0xdf17ad0a, (q31_t)0x7bb0f803, (q31_t)0xdf119aa6, (q31_t)0x7baf5a09, (q31_t)0xdf0b8856, (q31_t)0x7badbbc3, (q31_t)0xdf05761b,
+  (q31_t)0x7bac1d31, (q31_t)0xdeff63f4, (q31_t)0x7baa7e53, (q31_t)0xdef951e2, (q31_t)0x7ba8df28, (q31_t)0xdef33fe3, (q31_t)0x7ba73fb1, (q31_t)0xdeed2dfa,
+  (q31_t)0x7ba59fee, (q31_t)0xdee71c24, (q31_t)0x7ba3ffde, (q31_t)0xdee10a63, (q31_t)0x7ba25f82, (q31_t)0xdedaf8b7, (q31_t)0x7ba0beda, (q31_t)0xded4e71f,
+  (q31_t)0x7b9f1de6, (q31_t)0xdeced59b, (q31_t)0x7b9d7ca5, (q31_t)0xdec8c42c, (q31_t)0x7b9bdb18, (q31_t)0xdec2b2d1, (q31_t)0x7b9a393f, (q31_t)0xdebca18b,
+  (q31_t)0x7b989719, (q31_t)0xdeb69059, (q31_t)0x7b96f4a8, (q31_t)0xdeb07f3c, (q31_t)0x7b9551ea, (q31_t)0xdeaa6e34, (q31_t)0x7b93aee0, (q31_t)0xdea45d40,
+  (q31_t)0x7b920b89, (q31_t)0xde9e4c60, (q31_t)0x7b9067e7, (q31_t)0xde983b95, (q31_t)0x7b8ec3f8, (q31_t)0xde922adf, (q31_t)0x7b8d1fbd, (q31_t)0xde8c1a3e,
+  (q31_t)0x7b8b7b36, (q31_t)0xde8609b1, (q31_t)0x7b89d662, (q31_t)0xde7ff938, (q31_t)0x7b883143, (q31_t)0xde79e8d5, (q31_t)0x7b868bd7, (q31_t)0xde73d886,
+  (q31_t)0x7b84e61f, (q31_t)0xde6dc84b, (q31_t)0x7b83401b, (q31_t)0xde67b826, (q31_t)0x7b8199ca, (q31_t)0xde61a815, (q31_t)0x7b7ff32e, (q31_t)0xde5b9819,
+  (q31_t)0x7b7e4c45, (q31_t)0xde558831, (q31_t)0x7b7ca510, (q31_t)0xde4f785f, (q31_t)0x7b7afd8f, (q31_t)0xde4968a1, (q31_t)0x7b7955c2, (q31_t)0xde4358f8,
+  (q31_t)0x7b77ada8, (q31_t)0xde3d4964, (q31_t)0x7b760542, (q31_t)0xde3739e4, (q31_t)0x7b745c91, (q31_t)0xde312a7a, (q31_t)0x7b72b393, (q31_t)0xde2b1b24,
+  (q31_t)0x7b710a49, (q31_t)0xde250be3, (q31_t)0x7b6f60b2, (q31_t)0xde1efcb7, (q31_t)0x7b6db6d0, (q31_t)0xde18eda0, (q31_t)0x7b6c0ca2, (q31_t)0xde12de9e,
+  (q31_t)0x7b6a6227, (q31_t)0xde0ccfb1, (q31_t)0x7b68b760, (q31_t)0xde06c0d9, (q31_t)0x7b670c4d, (q31_t)0xde00b216, (q31_t)0x7b6560ee, (q31_t)0xddfaa367,
+  (q31_t)0x7b63b543, (q31_t)0xddf494ce, (q31_t)0x7b62094c, (q31_t)0xddee8649, (q31_t)0x7b605d09, (q31_t)0xdde877da, (q31_t)0x7b5eb079, (q31_t)0xdde26980,
+  (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7b5b5676, (q31_t)0xddd64d0a, (q31_t)0x7b59a902, (q31_t)0xddd03eef, (q31_t)0x7b57fb42, (q31_t)0xddca30e9,
+  (q31_t)0x7b564d36, (q31_t)0xddc422f8, (q31_t)0x7b549ede, (q31_t)0xddbe151d, (q31_t)0x7b52f03a, (q31_t)0xddb80756, (q31_t)0x7b51414a, (q31_t)0xddb1f9a4,
+  (q31_t)0x7b4f920e, (q31_t)0xddabec08, (q31_t)0x7b4de286, (q31_t)0xdda5de81, (q31_t)0x7b4c32b1, (q31_t)0xdd9fd10f, (q31_t)0x7b4a8291, (q31_t)0xdd99c3b2,
+  (q31_t)0x7b48d225, (q31_t)0xdd93b66a, (q31_t)0x7b47216c, (q31_t)0xdd8da938, (q31_t)0x7b457068, (q31_t)0xdd879c1b, (q31_t)0x7b43bf17, (q31_t)0xdd818f13,
+  (q31_t)0x7b420d7a, (q31_t)0xdd7b8220, (q31_t)0x7b405b92, (q31_t)0xdd757543, (q31_t)0x7b3ea95d, (q31_t)0xdd6f687b, (q31_t)0x7b3cf6dc, (q31_t)0xdd695bc9,
+  (q31_t)0x7b3b4410, (q31_t)0xdd634f2b, (q31_t)0x7b3990f7, (q31_t)0xdd5d42a3, (q31_t)0x7b37dd92, (q31_t)0xdd573631, (q31_t)0x7b3629e1, (q31_t)0xdd5129d4,
+  (q31_t)0x7b3475e5, (q31_t)0xdd4b1d8c, (q31_t)0x7b32c19c, (q31_t)0xdd451159, (q31_t)0x7b310d07, (q31_t)0xdd3f053c, (q31_t)0x7b2f5826, (q31_t)0xdd38f935,
+  (q31_t)0x7b2da2fa, (q31_t)0xdd32ed43, (q31_t)0x7b2bed81, (q31_t)0xdd2ce166, (q31_t)0x7b2a37bc, (q31_t)0xdd26d59f, (q31_t)0x7b2881ac, (q31_t)0xdd20c9ed,
+  (q31_t)0x7b26cb4f, (q31_t)0xdd1abe51, (q31_t)0x7b2514a6, (q31_t)0xdd14b2ca, (q31_t)0x7b235db2, (q31_t)0xdd0ea759, (q31_t)0x7b21a671, (q31_t)0xdd089bfe,
+  (q31_t)0x7b1feee5, (q31_t)0xdd0290b8, (q31_t)0x7b1e370d, (q31_t)0xdcfc8588, (q31_t)0x7b1c7ee8, (q31_t)0xdcf67a6d, (q31_t)0x7b1ac678, (q31_t)0xdcf06f68,
+  (q31_t)0x7b190dbc, (q31_t)0xdcea6478, (q31_t)0x7b1754b3, (q31_t)0xdce4599e, (q31_t)0x7b159b5f, (q31_t)0xdcde4eda, (q31_t)0x7b13e1bf, (q31_t)0xdcd8442b,
+  (q31_t)0x7b1227d3, (q31_t)0xdcd23993, (q31_t)0x7b106d9b, (q31_t)0xdccc2f0f, (q31_t)0x7b0eb318, (q31_t)0xdcc624a2, (q31_t)0x7b0cf848, (q31_t)0xdcc01a4a,
+  (q31_t)0x7b0b3d2c, (q31_t)0xdcba1008, (q31_t)0x7b0981c5, (q31_t)0xdcb405dc, (q31_t)0x7b07c612, (q31_t)0xdcadfbc5, (q31_t)0x7b060a12, (q31_t)0xdca7f1c5,
+  (q31_t)0x7b044dc7, (q31_t)0xdca1e7da, (q31_t)0x7b029130, (q31_t)0xdc9bde05, (q31_t)0x7b00d44d, (q31_t)0xdc95d446, (q31_t)0x7aff171e, (q31_t)0xdc8fca9c,
+  (q31_t)0x7afd59a4, (q31_t)0xdc89c109, (q31_t)0x7afb9bdd, (q31_t)0xdc83b78b, (q31_t)0x7af9ddcb, (q31_t)0xdc7dae23, (q31_t)0x7af81f6c, (q31_t)0xdc77a4d2,
+  (q31_t)0x7af660c2, (q31_t)0xdc719b96, (q31_t)0x7af4a1cc, (q31_t)0xdc6b9270, (q31_t)0x7af2e28b, (q31_t)0xdc658960, (q31_t)0x7af122fd, (q31_t)0xdc5f8066,
+  (q31_t)0x7aef6323, (q31_t)0xdc597781, (q31_t)0x7aeda2fe, (q31_t)0xdc536eb3, (q31_t)0x7aebe28d, (q31_t)0xdc4d65fb, (q31_t)0x7aea21d0, (q31_t)0xdc475d59,
+  (q31_t)0x7ae860c7, (q31_t)0xdc4154cd, (q31_t)0x7ae69f73, (q31_t)0xdc3b4c57, (q31_t)0x7ae4ddd2, (q31_t)0xdc3543f7, (q31_t)0x7ae31be6, (q31_t)0xdc2f3bad,
+  (q31_t)0x7ae159ae, (q31_t)0xdc293379, (q31_t)0x7adf972a, (q31_t)0xdc232b5c, (q31_t)0x7addd45b, (q31_t)0xdc1d2354, (q31_t)0x7adc113f, (q31_t)0xdc171b63,
+  (q31_t)0x7ada4dd8, (q31_t)0xdc111388, (q31_t)0x7ad88a25, (q31_t)0xdc0b0bc2, (q31_t)0x7ad6c626, (q31_t)0xdc050414, (q31_t)0x7ad501dc, (q31_t)0xdbfefc7b,
+  (q31_t)0x7ad33d45, (q31_t)0xdbf8f4f8, (q31_t)0x7ad17863, (q31_t)0xdbf2ed8c, (q31_t)0x7acfb336, (q31_t)0xdbece636, (q31_t)0x7acdedbc, (q31_t)0xdbe6def6,
+  (q31_t)0x7acc27f7, (q31_t)0xdbe0d7cd, (q31_t)0x7aca61e6, (q31_t)0xdbdad0b9, (q31_t)0x7ac89b89, (q31_t)0xdbd4c9bc, (q31_t)0x7ac6d4e0, (q31_t)0xdbcec2d6,
+  (q31_t)0x7ac50dec, (q31_t)0xdbc8bc06, (q31_t)0x7ac346ac, (q31_t)0xdbc2b54c, (q31_t)0x7ac17f20, (q31_t)0xdbbcaea8, (q31_t)0x7abfb749, (q31_t)0xdbb6a81b,
+  (q31_t)0x7abdef25, (q31_t)0xdbb0a1a4, (q31_t)0x7abc26b7, (q31_t)0xdbaa9b43, (q31_t)0x7aba5dfc, (q31_t)0xdba494f9, (q31_t)0x7ab894f6, (q31_t)0xdb9e8ec6,
+  (q31_t)0x7ab6cba4, (q31_t)0xdb9888a8, (q31_t)0x7ab50206, (q31_t)0xdb9282a2, (q31_t)0x7ab3381d, (q31_t)0xdb8c7cb1, (q31_t)0x7ab16de7, (q31_t)0xdb8676d8,
+  (q31_t)0x7aafa367, (q31_t)0xdb807114, (q31_t)0x7aadd89a, (q31_t)0xdb7a6b68, (q31_t)0x7aac0d82, (q31_t)0xdb7465d1, (q31_t)0x7aaa421e, (q31_t)0xdb6e6052,
+  (q31_t)0x7aa8766f, (q31_t)0xdb685ae9, (q31_t)0x7aa6aa74, (q31_t)0xdb625596, (q31_t)0x7aa4de2d, (q31_t)0xdb5c505a, (q31_t)0x7aa3119a, (q31_t)0xdb564b35,
+  (q31_t)0x7aa144bc, (q31_t)0xdb504626, (q31_t)0x7a9f7793, (q31_t)0xdb4a412e, (q31_t)0x7a9daa1d, (q31_t)0xdb443c4c, (q31_t)0x7a9bdc5c, (q31_t)0xdb3e3781,
+  (q31_t)0x7a9a0e50, (q31_t)0xdb3832cd, (q31_t)0x7a983ff7, (q31_t)0xdb322e30, (q31_t)0x7a967153, (q31_t)0xdb2c29a9, (q31_t)0x7a94a264, (q31_t)0xdb262539,
+  (q31_t)0x7a92d329, (q31_t)0xdb2020e0, (q31_t)0x7a9103a2, (q31_t)0xdb1a1c9d, (q31_t)0x7a8f33d0, (q31_t)0xdb141871, (q31_t)0x7a8d63b2, (q31_t)0xdb0e145c,
+  (q31_t)0x7a8b9348, (q31_t)0xdb08105e, (q31_t)0x7a89c293, (q31_t)0xdb020c77, (q31_t)0x7a87f192, (q31_t)0xdafc08a6, (q31_t)0x7a862046, (q31_t)0xdaf604ec,
+  (q31_t)0x7a844eae, (q31_t)0xdaf00149, (q31_t)0x7a827ccb, (q31_t)0xdae9fdbd, (q31_t)0x7a80aa9c, (q31_t)0xdae3fa48, (q31_t)0x7a7ed821, (q31_t)0xdaddf6ea,
+  (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a7b3249, (q31_t)0xdad1f072, (q31_t)0x7a795eec, (q31_t)0xdacbed58, (q31_t)0x7a778b43, (q31_t)0xdac5ea56,
+  (q31_t)0x7a75b74f, (q31_t)0xdabfe76a, (q31_t)0x7a73e30f, (q31_t)0xdab9e495, (q31_t)0x7a720e84, (q31_t)0xdab3e1d8, (q31_t)0x7a7039ad, (q31_t)0xdaaddf31,
+  (q31_t)0x7a6e648a, (q31_t)0xdaa7dca1, (q31_t)0x7a6c8f1c, (q31_t)0xdaa1da29, (q31_t)0x7a6ab963, (q31_t)0xda9bd7c7, (q31_t)0x7a68e35e, (q31_t)0xda95d57d,
+  (q31_t)0x7a670d0d, (q31_t)0xda8fd349, (q31_t)0x7a653671, (q31_t)0xda89d12d, (q31_t)0x7a635f8a, (q31_t)0xda83cf28, (q31_t)0x7a618857, (q31_t)0xda7dcd3a,
+  (q31_t)0x7a5fb0d8, (q31_t)0xda77cb63, (q31_t)0x7a5dd90e, (q31_t)0xda71c9a3, (q31_t)0x7a5c00f9, (q31_t)0xda6bc7fa, (q31_t)0x7a5a2898, (q31_t)0xda65c669,
+  (q31_t)0x7a584feb, (q31_t)0xda5fc4ef, (q31_t)0x7a5676f3, (q31_t)0xda59c38c, (q31_t)0x7a549db0, (q31_t)0xda53c240, (q31_t)0x7a52c421, (q31_t)0xda4dc10b,
+  (q31_t)0x7a50ea47, (q31_t)0xda47bfee, (q31_t)0x7a4f1021, (q31_t)0xda41bee8, (q31_t)0x7a4d35b0, (q31_t)0xda3bbdf9, (q31_t)0x7a4b5af3, (q31_t)0xda35bd22,
+  (q31_t)0x7a497feb, (q31_t)0xda2fbc61, (q31_t)0x7a47a498, (q31_t)0xda29bbb9, (q31_t)0x7a45c8f9, (q31_t)0xda23bb27, (q31_t)0x7a43ed0e, (q31_t)0xda1dbaad,
+  (q31_t)0x7a4210d8, (q31_t)0xda17ba4a, (q31_t)0x7a403457, (q31_t)0xda11b9ff, (q31_t)0x7a3e578b, (q31_t)0xda0bb9cb, (q31_t)0x7a3c7a73, (q31_t)0xda05b9ae,
+  (q31_t)0x7a3a9d0f, (q31_t)0xd9ffb9a9, (q31_t)0x7a38bf60, (q31_t)0xd9f9b9bb, (q31_t)0x7a36e166, (q31_t)0xd9f3b9e5, (q31_t)0x7a350321, (q31_t)0xd9edba26,
+  (q31_t)0x7a332490, (q31_t)0xd9e7ba7f, (q31_t)0x7a3145b3, (q31_t)0xd9e1baef, (q31_t)0x7a2f668c, (q31_t)0xd9dbbb77, (q31_t)0x7a2d8719, (q31_t)0xd9d5bc16,
+  (q31_t)0x7a2ba75a, (q31_t)0xd9cfbccd, (q31_t)0x7a29c750, (q31_t)0xd9c9bd9b, (q31_t)0x7a27e6fb, (q31_t)0xd9c3be81, (q31_t)0x7a26065b, (q31_t)0xd9bdbf7e,
+  (q31_t)0x7a24256f, (q31_t)0xd9b7c094, (q31_t)0x7a224437, (q31_t)0xd9b1c1c0, (q31_t)0x7a2062b5, (q31_t)0xd9abc305, (q31_t)0x7a1e80e7, (q31_t)0xd9a5c461,
+  (q31_t)0x7a1c9ece, (q31_t)0xd99fc5d4, (q31_t)0x7a1abc69, (q31_t)0xd999c75f, (q31_t)0x7a18d9b9, (q31_t)0xd993c902, (q31_t)0x7a16f6be, (q31_t)0xd98dcabd,
+  (q31_t)0x7a151378, (q31_t)0xd987cc90, (q31_t)0x7a132fe6, (q31_t)0xd981ce7a, (q31_t)0x7a114c09, (q31_t)0xd97bd07c, (q31_t)0x7a0f67e0, (q31_t)0xd975d295,
+  (q31_t)0x7a0d836d, (q31_t)0xd96fd4c7, (q31_t)0x7a0b9eae, (q31_t)0xd969d710, (q31_t)0x7a09b9a4, (q31_t)0xd963d971, (q31_t)0x7a07d44e, (q31_t)0xd95ddbea,
+  (q31_t)0x7a05eead, (q31_t)0xd957de7a, (q31_t)0x7a0408c1, (q31_t)0xd951e123, (q31_t)0x7a02228a, (q31_t)0xd94be3e3, (q31_t)0x7a003c07, (q31_t)0xd945e6bb,
+  (q31_t)0x79fe5539, (q31_t)0xd93fe9ab, (q31_t)0x79fc6e20, (q31_t)0xd939ecb3, (q31_t)0x79fa86bc, (q31_t)0xd933efd3, (q31_t)0x79f89f0c, (q31_t)0xd92df30b,
+  (q31_t)0x79f6b711, (q31_t)0xd927f65b, (q31_t)0x79f4cecb, (q31_t)0xd921f9c3, (q31_t)0x79f2e63a, (q31_t)0xd91bfd43, (q31_t)0x79f0fd5d, (q31_t)0xd91600da,
+  (q31_t)0x79ef1436, (q31_t)0xd910048a, (q31_t)0x79ed2ac3, (q31_t)0xd90a0852, (q31_t)0x79eb4105, (q31_t)0xd9040c32, (q31_t)0x79e956fb, (q31_t)0xd8fe1029,
+  (q31_t)0x79e76ca7, (q31_t)0xd8f81439, (q31_t)0x79e58207, (q31_t)0xd8f21861, (q31_t)0x79e3971c, (q31_t)0xd8ec1ca1, (q31_t)0x79e1abe6, (q31_t)0xd8e620fa,
+  (q31_t)0x79dfc064, (q31_t)0xd8e0256a, (q31_t)0x79ddd498, (q31_t)0xd8da29f2, (q31_t)0x79dbe880, (q31_t)0xd8d42e93, (q31_t)0x79d9fc1d, (q31_t)0xd8ce334c,
+  (q31_t)0x79d80f6f, (q31_t)0xd8c8381d, (q31_t)0x79d62276, (q31_t)0xd8c23d06, (q31_t)0x79d43532, (q31_t)0xd8bc4207, (q31_t)0x79d247a2, (q31_t)0xd8b64720,
+  (q31_t)0x79d059c8, (q31_t)0xd8b04c52, (q31_t)0x79ce6ba2, (q31_t)0xd8aa519c, (q31_t)0x79cc7d31, (q31_t)0xd8a456ff, (q31_t)0x79ca8e75, (q31_t)0xd89e5c79,
+  (q31_t)0x79c89f6e, (q31_t)0xd898620c, (q31_t)0x79c6b01b, (q31_t)0xd89267b7, (q31_t)0x79c4c07e, (q31_t)0xd88c6d7b, (q31_t)0x79c2d095, (q31_t)0xd8867356,
+  (q31_t)0x79c0e062, (q31_t)0xd880794b, (q31_t)0x79beefe3, (q31_t)0xd87a7f57, (q31_t)0x79bcff19, (q31_t)0xd874857c, (q31_t)0x79bb0e04, (q31_t)0xd86e8bb9,
+  (q31_t)0x79b91ca4, (q31_t)0xd868920f, (q31_t)0x79b72af9, (q31_t)0xd862987d, (q31_t)0x79b53903, (q31_t)0xd85c9f04, (q31_t)0x79b346c2, (q31_t)0xd856a5a3,
+  (q31_t)0x79b15435, (q31_t)0xd850ac5a, (q31_t)0x79af615e, (q31_t)0xd84ab32a, (q31_t)0x79ad6e3c, (q31_t)0xd844ba13, (q31_t)0x79ab7ace, (q31_t)0xd83ec114,
+  (q31_t)0x79a98715, (q31_t)0xd838c82d, (q31_t)0x79a79312, (q31_t)0xd832cf5f, (q31_t)0x79a59ec3, (q31_t)0xd82cd6aa, (q31_t)0x79a3aa29, (q31_t)0xd826de0d,
+  (q31_t)0x79a1b545, (q31_t)0xd820e589, (q31_t)0x799fc015, (q31_t)0xd81aed1d, (q31_t)0x799dca9a, (q31_t)0xd814f4ca, (q31_t)0x799bd4d4, (q31_t)0xd80efc8f,
+  (q31_t)0x7999dec4, (q31_t)0xd809046e, (q31_t)0x7997e868, (q31_t)0xd8030c64, (q31_t)0x7995f1c1, (q31_t)0xd7fd1474, (q31_t)0x7993facf, (q31_t)0xd7f71c9c,
+  (q31_t)0x79920392, (q31_t)0xd7f124dd, (q31_t)0x79900c0a, (q31_t)0xd7eb2d37, (q31_t)0x798e1438, (q31_t)0xd7e535a9, (q31_t)0x798c1c1a, (q31_t)0xd7df3e34,
+  (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x79882afd, (q31_t)0xd7d34f94, (q31_t)0x798631ff, (q31_t)0xd7cd586a, (q31_t)0x798438b5, (q31_t)0xd7c76158,
+  (q31_t)0x79823f20, (q31_t)0xd7c16a5f, (q31_t)0x79804541, (q31_t)0xd7bb737f, (q31_t)0x797e4b16, (q31_t)0xd7b57cb7, (q31_t)0x797c50a1, (q31_t)0xd7af8609,
+  (q31_t)0x797a55e0, (q31_t)0xd7a98f73, (q31_t)0x79785ad5, (q31_t)0xd7a398f6, (q31_t)0x79765f7f, (q31_t)0xd79da293, (q31_t)0x797463de, (q31_t)0xd797ac48,
+  (q31_t)0x797267f2, (q31_t)0xd791b616, (q31_t)0x79706bbb, (q31_t)0xd78bbffc, (q31_t)0x796e6f39, (q31_t)0xd785c9fc, (q31_t)0x796c726c, (q31_t)0xd77fd415,
+  (q31_t)0x796a7554, (q31_t)0xd779de47, (q31_t)0x796877f1, (q31_t)0xd773e892, (q31_t)0x79667a44, (q31_t)0xd76df2f6, (q31_t)0x79647c4c, (q31_t)0xd767fd72,
+  (q31_t)0x79627e08, (q31_t)0xd7620808, (q31_t)0x79607f7a, (q31_t)0xd75c12b7, (q31_t)0x795e80a1, (q31_t)0xd7561d7f, (q31_t)0x795c817d, (q31_t)0xd7502860,
+  (q31_t)0x795a820e, (q31_t)0xd74a335b, (q31_t)0x79588255, (q31_t)0xd7443e6e, (q31_t)0x79568250, (q31_t)0xd73e499a, (q31_t)0x79548201, (q31_t)0xd73854e0,
+  (q31_t)0x79528167, (q31_t)0xd732603f, (q31_t)0x79508082, (q31_t)0xd72c6bb6, (q31_t)0x794e7f52, (q31_t)0xd7267748, (q31_t)0x794c7dd7, (q31_t)0xd72082f2,
+  (q31_t)0x794a7c12, (q31_t)0xd71a8eb5, (q31_t)0x79487a01, (q31_t)0xd7149a92, (q31_t)0x794677a6, (q31_t)0xd70ea688, (q31_t)0x79447500, (q31_t)0xd708b297,
+  (q31_t)0x79427210, (q31_t)0xd702bec0, (q31_t)0x79406ed4, (q31_t)0xd6fccb01, (q31_t)0x793e6b4e, (q31_t)0xd6f6d75d, (q31_t)0x793c677d, (q31_t)0xd6f0e3d1,
+  (q31_t)0x793a6361, (q31_t)0xd6eaf05f, (q31_t)0x79385efa, (q31_t)0xd6e4fd06, (q31_t)0x79365a49, (q31_t)0xd6df09c6, (q31_t)0x7934554d, (q31_t)0xd6d916a0,
+  (q31_t)0x79325006, (q31_t)0xd6d32393, (q31_t)0x79304a74, (q31_t)0xd6cd30a0, (q31_t)0x792e4497, (q31_t)0xd6c73dc6, (q31_t)0x792c3e70, (q31_t)0xd6c14b05,
+  (q31_t)0x792a37fe, (q31_t)0xd6bb585e, (q31_t)0x79283141, (q31_t)0xd6b565d0, (q31_t)0x79262a3a, (q31_t)0xd6af735c, (q31_t)0x792422e8, (q31_t)0xd6a98101,
+  (q31_t)0x79221b4b, (q31_t)0xd6a38ec0, (q31_t)0x79201363, (q31_t)0xd69d9c98, (q31_t)0x791e0b31, (q31_t)0xd697aa8a, (q31_t)0x791c02b4, (q31_t)0xd691b895,
+  (q31_t)0x7919f9ec, (q31_t)0xd68bc6ba, (q31_t)0x7917f0d9, (q31_t)0xd685d4f9, (q31_t)0x7915e77c, (q31_t)0xd67fe351, (q31_t)0x7913ddd4, (q31_t)0xd679f1c2,
+  (q31_t)0x7911d3e2, (q31_t)0xd674004e, (q31_t)0x790fc9a4, (q31_t)0xd66e0ef2, (q31_t)0x790dbf1d, (q31_t)0xd6681db1, (q31_t)0x790bb44a, (q31_t)0xd6622c89,
+  (q31_t)0x7909a92d, (q31_t)0xd65c3b7b, (q31_t)0x79079dc5, (q31_t)0xd6564a87, (q31_t)0x79059212, (q31_t)0xd65059ac, (q31_t)0x79038615, (q31_t)0xd64a68eb,
+  (q31_t)0x790179cd, (q31_t)0xd6447844, (q31_t)0x78ff6d3b, (q31_t)0xd63e87b6, (q31_t)0x78fd605d, (q31_t)0xd6389742, (q31_t)0x78fb5336, (q31_t)0xd632a6e8,
+  (q31_t)0x78f945c3, (q31_t)0xd62cb6a8, (q31_t)0x78f73806, (q31_t)0xd626c681, (q31_t)0x78f529fe, (q31_t)0xd620d675, (q31_t)0x78f31bac, (q31_t)0xd61ae682,
+  (q31_t)0x78f10d0f, (q31_t)0xd614f6a9, (q31_t)0x78eefe28, (q31_t)0xd60f06ea, (q31_t)0x78eceef6, (q31_t)0xd6091745, (q31_t)0x78eadf79, (q31_t)0xd60327b9,
+  (q31_t)0x78e8cfb2, (q31_t)0xd5fd3848, (q31_t)0x78e6bfa0, (q31_t)0xd5f748f0, (q31_t)0x78e4af44, (q31_t)0xd5f159b3, (q31_t)0x78e29e9d, (q31_t)0xd5eb6a8f,
+  (q31_t)0x78e08dab, (q31_t)0xd5e57b85, (q31_t)0x78de7c6f, (q31_t)0xd5df8c96, (q31_t)0x78dc6ae8, (q31_t)0xd5d99dc0, (q31_t)0x78da5917, (q31_t)0xd5d3af04,
+  (q31_t)0x78d846fb, (q31_t)0xd5cdc062, (q31_t)0x78d63495, (q31_t)0xd5c7d1db, (q31_t)0x78d421e4, (q31_t)0xd5c1e36d, (q31_t)0x78d20ee9, (q31_t)0xd5bbf519,
+  (q31_t)0x78cffba3, (q31_t)0xd5b606e0, (q31_t)0x78cde812, (q31_t)0xd5b018c0, (q31_t)0x78cbd437, (q31_t)0xd5aa2abb, (q31_t)0x78c9c012, (q31_t)0xd5a43cd0,
+  (q31_t)0x78c7aba2, (q31_t)0xd59e4eff, (q31_t)0x78c596e7, (q31_t)0xd5986148, (q31_t)0x78c381e2, (q31_t)0xd59273ab, (q31_t)0x78c16c93, (q31_t)0xd58c8628,
+  (q31_t)0x78bf56f9, (q31_t)0xd58698c0, (q31_t)0x78bd4114, (q31_t)0xd580ab72, (q31_t)0x78bb2ae5, (q31_t)0xd57abe3d, (q31_t)0x78b9146c, (q31_t)0xd574d124,
+  (q31_t)0x78b6fda8, (q31_t)0xd56ee424, (q31_t)0x78b4e69a, (q31_t)0xd568f73f, (q31_t)0x78b2cf41, (q31_t)0xd5630a74, (q31_t)0x78b0b79e, (q31_t)0xd55d1dc3,
+  (q31_t)0x78ae9fb0, (q31_t)0xd557312d, (q31_t)0x78ac8778, (q31_t)0xd55144b0, (q31_t)0x78aa6ef5, (q31_t)0xd54b584f, (q31_t)0x78a85628, (q31_t)0xd5456c07,
+  (q31_t)0x78a63d11, (q31_t)0xd53f7fda, (q31_t)0x78a423af, (q31_t)0xd53993c7, (q31_t)0x78a20a03, (q31_t)0xd533a7cf, (q31_t)0x789ff00c, (q31_t)0xd52dbbf1,
+  (q31_t)0x789dd5cb, (q31_t)0xd527d02e, (q31_t)0x789bbb3f, (q31_t)0xd521e484, (q31_t)0x7899a06a, (q31_t)0xd51bf8f6, (q31_t)0x78978549, (q31_t)0xd5160d82,
+  (q31_t)0x789569df, (q31_t)0xd5102228, (q31_t)0x78934e2a, (q31_t)0xd50a36e9, (q31_t)0x7891322a, (q31_t)0xd5044bc4, (q31_t)0x788f15e0, (q31_t)0xd4fe60ba,
+  (q31_t)0x788cf94c, (q31_t)0xd4f875ca, (q31_t)0x788adc6e, (q31_t)0xd4f28af5, (q31_t)0x7888bf45, (q31_t)0xd4eca03a, (q31_t)0x7886a1d1, (q31_t)0xd4e6b59a,
+  (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x7882660c, (q31_t)0xd4dae0aa, (q31_t)0x788047ba, (q31_t)0xd4d4f65a, (q31_t)0x787e291d, (q31_t)0xd4cf0c24,
+  (q31_t)0x787c0a36, (q31_t)0xd4c92209, (q31_t)0x7879eb05, (q31_t)0xd4c33809, (q31_t)0x7877cb89, (q31_t)0xd4bd4e23, (q31_t)0x7875abc3, (q31_t)0xd4b76458,
+  (q31_t)0x78738bb3, (q31_t)0xd4b17aa8, (q31_t)0x78716b59, (q31_t)0xd4ab9112, (q31_t)0x786f4ab4, (q31_t)0xd4a5a798, (q31_t)0x786d29c5, (q31_t)0xd49fbe37,
+  (q31_t)0x786b088c, (q31_t)0xd499d4f2, (q31_t)0x7868e708, (q31_t)0xd493ebc8, (q31_t)0x7866c53a, (q31_t)0xd48e02b8, (q31_t)0x7864a322, (q31_t)0xd48819c3,
+  (q31_t)0x786280bf, (q31_t)0xd48230e9, (q31_t)0x78605e13, (q31_t)0xd47c4829, (q31_t)0x785e3b1c, (q31_t)0xd4765f85, (q31_t)0x785c17db, (q31_t)0xd47076fb,
+  (q31_t)0x7859f44f, (q31_t)0xd46a8e8d, (q31_t)0x7857d079, (q31_t)0xd464a639, (q31_t)0x7855ac5a, (q31_t)0xd45ebe00, (q31_t)0x785387ef, (q31_t)0xd458d5e2,
+  (q31_t)0x7851633b, (q31_t)0xd452eddf, (q31_t)0x784f3e3c, (q31_t)0xd44d05f6, (q31_t)0x784d18f4, (q31_t)0xd4471e29, (q31_t)0x784af361, (q31_t)0xd4413677,
+  (q31_t)0x7848cd83, (q31_t)0xd43b4ee0, (q31_t)0x7846a75c, (q31_t)0xd4356763, (q31_t)0x784480ea, (q31_t)0xd42f8002, (q31_t)0x78425a2f, (q31_t)0xd42998bc,
+  (q31_t)0x78403329, (q31_t)0xd423b191, (q31_t)0x783e0bd9, (q31_t)0xd41dca81, (q31_t)0x783be43e, (q31_t)0xd417e38c, (q31_t)0x7839bc5a, (q31_t)0xd411fcb2,
+  (q31_t)0x7837942b, (q31_t)0xd40c15f3, (q31_t)0x78356bb2, (q31_t)0xd4062f4f, (q31_t)0x783342ef, (q31_t)0xd40048c6, (q31_t)0x783119e2, (q31_t)0xd3fa6259,
+  (q31_t)0x782ef08b, (q31_t)0xd3f47c06, (q31_t)0x782cc6ea, (q31_t)0xd3ee95cf, (q31_t)0x782a9cfe, (q31_t)0xd3e8afb3, (q31_t)0x782872c8, (q31_t)0xd3e2c9b2,
+  (q31_t)0x78264849, (q31_t)0xd3dce3cd, (q31_t)0x78241d7f, (q31_t)0xd3d6fe03, (q31_t)0x7821f26b, (q31_t)0xd3d11853, (q31_t)0x781fc70d, (q31_t)0xd3cb32c0,
+  (q31_t)0x781d9b65, (q31_t)0xd3c54d47, (q31_t)0x781b6f72, (q31_t)0xd3bf67ea, (q31_t)0x78194336, (q31_t)0xd3b982a8, (q31_t)0x781716b0, (q31_t)0xd3b39d81,
+  (q31_t)0x7814e9df, (q31_t)0xd3adb876, (q31_t)0x7812bcc4, (q31_t)0xd3a7d385, (q31_t)0x78108f60, (q31_t)0xd3a1eeb1, (q31_t)0x780e61b1, (q31_t)0xd39c09f7,
+  (q31_t)0x780c33b8, (q31_t)0xd396255a, (q31_t)0x780a0575, (q31_t)0xd39040d7, (q31_t)0x7807d6e9, (q31_t)0xd38a5c70, (q31_t)0x7805a812, (q31_t)0xd3847824,
+  (q31_t)0x780378f1, (q31_t)0xd37e93f4, (q31_t)0x78014986, (q31_t)0xd378afdf, (q31_t)0x77ff19d1, (q31_t)0xd372cbe6, (q31_t)0x77fce9d2, (q31_t)0xd36ce808,
+  (q31_t)0x77fab989, (q31_t)0xd3670446, (q31_t)0x77f888f6, (q31_t)0xd361209f, (q31_t)0x77f65819, (q31_t)0xd35b3d13, (q31_t)0x77f426f2, (q31_t)0xd35559a4,
+  (q31_t)0x77f1f581, (q31_t)0xd34f764f, (q31_t)0x77efc3c5, (q31_t)0xd3499317, (q31_t)0x77ed91c0, (q31_t)0xd343affa, (q31_t)0x77eb5f71, (q31_t)0xd33dccf8,
+  (q31_t)0x77e92cd9, (q31_t)0xd337ea12, (q31_t)0x77e6f9f6, (q31_t)0xd3320748, (q31_t)0x77e4c6c9, (q31_t)0xd32c2499, (q31_t)0x77e29352, (q31_t)0xd3264206,
+  (q31_t)0x77e05f91, (q31_t)0xd3205f8f, (q31_t)0x77de2b86, (q31_t)0xd31a7d33, (q31_t)0x77dbf732, (q31_t)0xd3149af3, (q31_t)0x77d9c293, (q31_t)0xd30eb8cf,
+  (q31_t)0x77d78daa, (q31_t)0xd308d6c7, (q31_t)0x77d55878, (q31_t)0xd302f4da, (q31_t)0x77d322fc, (q31_t)0xd2fd1309, (q31_t)0x77d0ed35, (q31_t)0xd2f73154,
+  (q31_t)0x77ceb725, (q31_t)0xd2f14fba, (q31_t)0x77cc80cb, (q31_t)0xd2eb6e3c, (q31_t)0x77ca4a27, (q31_t)0xd2e58cdb, (q31_t)0x77c81339, (q31_t)0xd2dfab95,
+  (q31_t)0x77c5dc01, (q31_t)0xd2d9ca6a, (q31_t)0x77c3a47f, (q31_t)0xd2d3e95c, (q31_t)0x77c16cb4, (q31_t)0xd2ce0869, (q31_t)0x77bf349f, (q31_t)0xd2c82793,
+  (q31_t)0x77bcfc3f, (q31_t)0xd2c246d8, (q31_t)0x77bac396, (q31_t)0xd2bc6639, (q31_t)0x77b88aa3, (q31_t)0xd2b685b6, (q31_t)0x77b65166, (q31_t)0xd2b0a54f,
+  (q31_t)0x77b417df, (q31_t)0xd2aac504, (q31_t)0x77b1de0f, (q31_t)0xd2a4e4d5, (q31_t)0x77afa3f5, (q31_t)0xd29f04c2, (q31_t)0x77ad6990, (q31_t)0xd29924cb,
+  (q31_t)0x77ab2ee2, (q31_t)0xd29344f0, (q31_t)0x77a8f3ea, (q31_t)0xd28d6531, (q31_t)0x77a6b8a9, (q31_t)0xd287858e, (q31_t)0x77a47d1d, (q31_t)0xd281a607,
+  (q31_t)0x77a24148, (q31_t)0xd27bc69c, (q31_t)0x77a00529, (q31_t)0xd275e74d, (q31_t)0x779dc8c0, (q31_t)0xd270081b, (q31_t)0x779b8c0e, (q31_t)0xd26a2904,
+  (q31_t)0x77994f11, (q31_t)0xd2644a0a, (q31_t)0x779711cb, (q31_t)0xd25e6b2b, (q31_t)0x7794d43b, (q31_t)0xd2588c69, (q31_t)0x77929661, (q31_t)0xd252adc3,
+  (q31_t)0x7790583e, (q31_t)0xd24ccf39, (q31_t)0x778e19d0, (q31_t)0xd246f0cb, (q31_t)0x778bdb19, (q31_t)0xd241127a, (q31_t)0x77899c19, (q31_t)0xd23b3444,
+  (q31_t)0x77875cce, (q31_t)0xd235562b, (q31_t)0x77851d3a, (q31_t)0xd22f782f, (q31_t)0x7782dd5c, (q31_t)0xd2299a4e, (q31_t)0x77809d35, (q31_t)0xd223bc8a,
+  (q31_t)0x777e5cc3, (q31_t)0xd21ddee2, (q31_t)0x777c1c08, (q31_t)0xd2180156, (q31_t)0x7779db03, (q31_t)0xd21223e7, (q31_t)0x777799b5, (q31_t)0xd20c4694,
+  (q31_t)0x7775581d, (q31_t)0xd206695d, (q31_t)0x7773163b, (q31_t)0xd2008c43, (q31_t)0x7770d40f, (q31_t)0xd1faaf45, (q31_t)0x776e919a, (q31_t)0xd1f4d263,
+  (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x776a0bd3, (q31_t)0xd1e918f5, (q31_t)0x7767c880, (q31_t)0xd1e33c69, (q31_t)0x776584e5, (q31_t)0xd1dd5ff9,
+  (q31_t)0x776340ff, (q31_t)0xd1d783a6, (q31_t)0x7760fcd0, (q31_t)0xd1d1a76f, (q31_t)0x775eb857, (q31_t)0xd1cbcb54, (q31_t)0x775c7395, (q31_t)0xd1c5ef56,
+  (q31_t)0x775a2e89, (q31_t)0xd1c01375, (q31_t)0x7757e933, (q31_t)0xd1ba37b0, (q31_t)0x7755a394, (q31_t)0xd1b45c08, (q31_t)0x77535dab, (q31_t)0xd1ae807c,
+  (q31_t)0x77511778, (q31_t)0xd1a8a50d, (q31_t)0x774ed0fc, (q31_t)0xd1a2c9ba, (q31_t)0x774c8a36, (q31_t)0xd19cee84, (q31_t)0x774a4327, (q31_t)0xd197136b,
+  (q31_t)0x7747fbce, (q31_t)0xd191386e, (q31_t)0x7745b42c, (q31_t)0xd18b5d8e, (q31_t)0x77436c40, (q31_t)0xd18582ca, (q31_t)0x7741240a, (q31_t)0xd17fa823,
+  (q31_t)0x773edb8b, (q31_t)0xd179cd99, (q31_t)0x773c92c2, (q31_t)0xd173f32c, (q31_t)0x773a49b0, (q31_t)0xd16e18db, (q31_t)0x77380054, (q31_t)0xd1683ea7,
+  (q31_t)0x7735b6af, (q31_t)0xd1626490, (q31_t)0x77336cc0, (q31_t)0xd15c8a95, (q31_t)0x77312287, (q31_t)0xd156b0b7, (q31_t)0x772ed805, (q31_t)0xd150d6f6,
+  (q31_t)0x772c8d3a, (q31_t)0xd14afd52, (q31_t)0x772a4225, (q31_t)0xd14523cb, (q31_t)0x7727f6c6, (q31_t)0xd13f4a60, (q31_t)0x7725ab1f, (q31_t)0xd1397113,
+  (q31_t)0x77235f2d, (q31_t)0xd13397e2, (q31_t)0x772112f2, (q31_t)0xd12dbece, (q31_t)0x771ec66e, (q31_t)0xd127e5d7, (q31_t)0x771c79a0, (q31_t)0xd1220cfc,
+  (q31_t)0x771a2c88, (q31_t)0xd11c343f, (q31_t)0x7717df27, (q31_t)0xd1165b9f, (q31_t)0x7715917d, (q31_t)0xd110831b, (q31_t)0x77134389, (q31_t)0xd10aaab5,
+  (q31_t)0x7710f54c, (q31_t)0xd104d26b, (q31_t)0x770ea6c5, (q31_t)0xd0fefa3f, (q31_t)0x770c57f5, (q31_t)0xd0f9222f, (q31_t)0x770a08dc, (q31_t)0xd0f34a3d,
+  (q31_t)0x7707b979, (q31_t)0xd0ed7267, (q31_t)0x770569cc, (q31_t)0xd0e79aaf, (q31_t)0x770319d6, (q31_t)0xd0e1c313, (q31_t)0x7700c997, (q31_t)0xd0dbeb95,
+  (q31_t)0x76fe790e, (q31_t)0xd0d61434, (q31_t)0x76fc283c, (q31_t)0xd0d03cf0, (q31_t)0x76f9d721, (q31_t)0xd0ca65c9, (q31_t)0x76f785bc, (q31_t)0xd0c48ebf,
+  (q31_t)0x76f5340e, (q31_t)0xd0beb7d2, (q31_t)0x76f2e216, (q31_t)0xd0b8e102, (q31_t)0x76f08fd5, (q31_t)0xd0b30a50, (q31_t)0x76ee3d4b, (q31_t)0xd0ad33ba,
+  (q31_t)0x76ebea77, (q31_t)0xd0a75d42, (q31_t)0x76e9975a, (q31_t)0xd0a186e7, (q31_t)0x76e743f4, (q31_t)0xd09bb0aa, (q31_t)0x76e4f044, (q31_t)0xd095da89,
+  (q31_t)0x76e29c4b, (q31_t)0xd0900486, (q31_t)0x76e04808, (q31_t)0xd08a2ea0, (q31_t)0x76ddf37c, (q31_t)0xd08458d7, (q31_t)0x76db9ea7, (q31_t)0xd07e832c,
+  (q31_t)0x76d94989, (q31_t)0xd078ad9e, (q31_t)0x76d6f421, (q31_t)0xd072d82d, (q31_t)0x76d49e70, (q31_t)0xd06d02da, (q31_t)0x76d24876, (q31_t)0xd0672da3,
+  (q31_t)0x76cff232, (q31_t)0xd061588b, (q31_t)0x76cd9ba5, (q31_t)0xd05b838f, (q31_t)0x76cb44cf, (q31_t)0xd055aeb1, (q31_t)0x76c8edb0, (q31_t)0xd04fd9f1,
+  (q31_t)0x76c69647, (q31_t)0xd04a054e, (q31_t)0x76c43e95, (q31_t)0xd04430c8, (q31_t)0x76c1e699, (q31_t)0xd03e5c60, (q31_t)0x76bf8e55, (q31_t)0xd0388815,
+  (q31_t)0x76bd35c7, (q31_t)0xd032b3e7, (q31_t)0x76badcf0, (q31_t)0xd02cdfd8, (q31_t)0x76b883d0, (q31_t)0xd0270be5, (q31_t)0x76b62a66, (q31_t)0xd0213810,
+  (q31_t)0x76b3d0b4, (q31_t)0xd01b6459, (q31_t)0x76b176b8, (q31_t)0xd01590bf, (q31_t)0x76af1c72, (q31_t)0xd00fbd43, (q31_t)0x76acc1e4, (q31_t)0xd009e9e4,
+  (q31_t)0x76aa670d, (q31_t)0xd00416a3, (q31_t)0x76a80bec, (q31_t)0xcffe4380, (q31_t)0x76a5b082, (q31_t)0xcff8707a, (q31_t)0x76a354cf, (q31_t)0xcff29d92,
+  (q31_t)0x76a0f8d2, (q31_t)0xcfeccac7, (q31_t)0x769e9c8d, (q31_t)0xcfe6f81a, (q31_t)0x769c3ffe, (q31_t)0xcfe1258b, (q31_t)0x7699e326, (q31_t)0xcfdb531a,
+  (q31_t)0x76978605, (q31_t)0xcfd580c6, (q31_t)0x7695289b, (q31_t)0xcfcfae8f, (q31_t)0x7692cae8, (q31_t)0xcfc9dc77, (q31_t)0x76906ceb, (q31_t)0xcfc40a7c,
+  (q31_t)0x768e0ea6, (q31_t)0xcfbe389f, (q31_t)0x768bb017, (q31_t)0xcfb866e0, (q31_t)0x7689513f, (q31_t)0xcfb2953f, (q31_t)0x7686f21e, (q31_t)0xcfacc3bb,
+  (q31_t)0x768492b4, (q31_t)0xcfa6f255, (q31_t)0x76823301, (q31_t)0xcfa1210d, (q31_t)0x767fd304, (q31_t)0xcf9b4fe3, (q31_t)0x767d72bf, (q31_t)0xcf957ed7,
+  (q31_t)0x767b1231, (q31_t)0xcf8fade9, (q31_t)0x7678b159, (q31_t)0xcf89dd18, (q31_t)0x76765038, (q31_t)0xcf840c65, (q31_t)0x7673eecf, (q31_t)0xcf7e3bd1,
+  (q31_t)0x76718d1c, (q31_t)0xcf786b5a, (q31_t)0x766f2b20, (q31_t)0xcf729b01, (q31_t)0x766cc8db, (q31_t)0xcf6ccac6, (q31_t)0x766a664d, (q31_t)0xcf66faa9,
+  (q31_t)0x76680376, (q31_t)0xcf612aaa, (q31_t)0x7665a056, (q31_t)0xcf5b5ac9, (q31_t)0x76633ced, (q31_t)0xcf558b06, (q31_t)0x7660d93b, (q31_t)0xcf4fbb61,
+  (q31_t)0x765e7540, (q31_t)0xcf49ebda, (q31_t)0x765c10fc, (q31_t)0xcf441c71, (q31_t)0x7659ac6f, (q31_t)0xcf3e4d26, (q31_t)0x76574798, (q31_t)0xcf387dfa,
+  (q31_t)0x7654e279, (q31_t)0xcf32aeeb, (q31_t)0x76527d11, (q31_t)0xcf2cdffa, (q31_t)0x76501760, (q31_t)0xcf271128, (q31_t)0x764db166, (q31_t)0xcf214274,
+  (q31_t)0x764b4b23, (q31_t)0xcf1b73de, (q31_t)0x7648e497, (q31_t)0xcf15a566, (q31_t)0x76467dc2, (q31_t)0xcf0fd70c, (q31_t)0x764416a4, (q31_t)0xcf0a08d0,
+  (q31_t)0x7641af3d, (q31_t)0xcf043ab3, (q31_t)0x763f478d, (q31_t)0xcefe6cb3, (q31_t)0x763cdf94, (q31_t)0xcef89ed2, (q31_t)0x763a7752, (q31_t)0xcef2d110,
+  (q31_t)0x76380ec8, (q31_t)0xceed036b, (q31_t)0x7635a5f4, (q31_t)0xcee735e5, (q31_t)0x76333cd8, (q31_t)0xcee1687d, (q31_t)0x7630d372, (q31_t)0xcedb9b33,
+  (q31_t)0x762e69c4, (q31_t)0xced5ce08, (q31_t)0x762bffcd, (q31_t)0xced000fb, (q31_t)0x7629958c, (q31_t)0xceca340c, (q31_t)0x76272b03, (q31_t)0xcec4673c,
+  (q31_t)0x7624c031, (q31_t)0xcebe9a8a, (q31_t)0x76225517, (q31_t)0xceb8cdf7, (q31_t)0x761fe9b3, (q31_t)0xceb30181, (q31_t)0x761d7e06, (q31_t)0xcead352b,
+  (q31_t)0x761b1211, (q31_t)0xcea768f2, (q31_t)0x7618a5d3, (q31_t)0xcea19cd8, (q31_t)0x7616394c, (q31_t)0xce9bd0dd, (q31_t)0x7613cc7c, (q31_t)0xce960500,
+  (q31_t)0x76115f63, (q31_t)0xce903942, (q31_t)0x760ef201, (q31_t)0xce8a6da2, (q31_t)0x760c8457, (q31_t)0xce84a220, (q31_t)0x760a1664, (q31_t)0xce7ed6bd,
+  (q31_t)0x7607a828, (q31_t)0xce790b79, (q31_t)0x760539a3, (q31_t)0xce734053, (q31_t)0x7602cad5, (q31_t)0xce6d754c, (q31_t)0x76005bbf, (q31_t)0xce67aa63,
+  (q31_t)0x75fdec60, (q31_t)0xce61df99, (q31_t)0x75fb7cb8, (q31_t)0xce5c14ed, (q31_t)0x75f90cc7, (q31_t)0xce564a60, (q31_t)0x75f69c8d, (q31_t)0xce507ff2,
+  (q31_t)0x75f42c0b, (q31_t)0xce4ab5a2, (q31_t)0x75f1bb40, (q31_t)0xce44eb71, (q31_t)0x75ef4a2c, (q31_t)0xce3f215f, (q31_t)0x75ecd8cf, (q31_t)0xce39576c,
+  (q31_t)0x75ea672a, (q31_t)0xce338d97, (q31_t)0x75e7f53c, (q31_t)0xce2dc3e1, (q31_t)0x75e58305, (q31_t)0xce27fa49, (q31_t)0x75e31086, (q31_t)0xce2230d0,
+  (q31_t)0x75e09dbd, (q31_t)0xce1c6777, (q31_t)0x75de2aac, (q31_t)0xce169e3b, (q31_t)0x75dbb753, (q31_t)0xce10d51f, (q31_t)0x75d943b0, (q31_t)0xce0b0c21,
+  (q31_t)0x75d6cfc5, (q31_t)0xce054343, (q31_t)0x75d45b92, (q31_t)0xcdff7a83, (q31_t)0x75d1e715, (q31_t)0xcdf9b1e2, (q31_t)0x75cf7250, (q31_t)0xcdf3e95f,
+  (q31_t)0x75ccfd42, (q31_t)0xcdee20fc, (q31_t)0x75ca87ec, (q31_t)0xcde858b8, (q31_t)0x75c8124d, (q31_t)0xcde29092, (q31_t)0x75c59c65, (q31_t)0xcddcc88b,
+  (q31_t)0x75c32634, (q31_t)0xcdd700a4, (q31_t)0x75c0afbb, (q31_t)0xcdd138db, (q31_t)0x75be38fa, (q31_t)0xcdcb7131, (q31_t)0x75bbc1ef, (q31_t)0xcdc5a9a6,
+  (q31_t)0x75b94a9c, (q31_t)0xcdbfe23a, (q31_t)0x75b6d301, (q31_t)0xcdba1aee, (q31_t)0x75b45b1d, (q31_t)0xcdb453c0, (q31_t)0x75b1e2f0, (q31_t)0xcdae8cb1,
+  (q31_t)0x75af6a7b, (q31_t)0xcda8c5c1, (q31_t)0x75acf1bd, (q31_t)0xcda2fef0, (q31_t)0x75aa78b6, (q31_t)0xcd9d383f, (q31_t)0x75a7ff67, (q31_t)0xcd9771ac,
+  (q31_t)0x75a585cf, (q31_t)0xcd91ab39, (q31_t)0x75a30bef, (q31_t)0xcd8be4e4, (q31_t)0x75a091c6, (q31_t)0xcd861eaf, (q31_t)0x759e1755, (q31_t)0xcd805899,
+  (q31_t)0x759b9c9b, (q31_t)0xcd7a92a2, (q31_t)0x75992198, (q31_t)0xcd74ccca, (q31_t)0x7596a64d, (q31_t)0xcd6f0711, (q31_t)0x75942ab9, (q31_t)0xcd694178,
+  (q31_t)0x7591aedd, (q31_t)0xcd637bfe, (q31_t)0x758f32b9, (q31_t)0xcd5db6a3, (q31_t)0x758cb64c, (q31_t)0xcd57f167, (q31_t)0x758a3996, (q31_t)0xcd522c4a,
+  (q31_t)0x7587bc98, (q31_t)0xcd4c674d, (q31_t)0x75853f51, (q31_t)0xcd46a26f, (q31_t)0x7582c1c2, (q31_t)0xcd40ddb0, (q31_t)0x758043ea, (q31_t)0xcd3b1911,
+  (q31_t)0x757dc5ca, (q31_t)0xcd355491, (q31_t)0x757b4762, (q31_t)0xcd2f9030, (q31_t)0x7578c8b0, (q31_t)0xcd29cbee, (q31_t)0x757649b7, (q31_t)0xcd2407cc,
+  (q31_t)0x7573ca75, (q31_t)0xcd1e43ca, (q31_t)0x75714aea, (q31_t)0xcd187fe6, (q31_t)0x756ecb18, (q31_t)0xcd12bc22, (q31_t)0x756c4afc, (q31_t)0xcd0cf87e,
+  (q31_t)0x7569ca99, (q31_t)0xcd0734f9, (q31_t)0x756749ec, (q31_t)0xcd017193, (q31_t)0x7564c8f8, (q31_t)0xccfbae4d, (q31_t)0x756247bb, (q31_t)0xccf5eb26,
+  (q31_t)0x755fc635, (q31_t)0xccf0281f, (q31_t)0x755d4467, (q31_t)0xccea6538, (q31_t)0x755ac251, (q31_t)0xcce4a26f, (q31_t)0x75583ff3, (q31_t)0xccdedfc7,
+  (q31_t)0x7555bd4c, (q31_t)0xccd91d3d, (q31_t)0x75533a5c, (q31_t)0xccd35ad4, (q31_t)0x7550b725, (q31_t)0xcccd988a, (q31_t)0x754e33a4, (q31_t)0xccc7d65f,
+  (q31_t)0x754bafdc, (q31_t)0xccc21455, (q31_t)0x75492bcb, (q31_t)0xccbc5269, (q31_t)0x7546a772, (q31_t)0xccb6909e, (q31_t)0x754422d0, (q31_t)0xccb0cef2,
+  (q31_t)0x75419de7, (q31_t)0xccab0d65, (q31_t)0x753f18b4, (q31_t)0xcca54bf9, (q31_t)0x753c933a, (q31_t)0xcc9f8aac, (q31_t)0x753a0d77, (q31_t)0xcc99c97e,
+  (q31_t)0x7537876c, (q31_t)0xcc940871, (q31_t)0x75350118, (q31_t)0xcc8e4783, (q31_t)0x75327a7d, (q31_t)0xcc8886b5, (q31_t)0x752ff399, (q31_t)0xcc82c607,
+  (q31_t)0x752d6c6c, (q31_t)0xcc7d0578, (q31_t)0x752ae4f8, (q31_t)0xcc774509, (q31_t)0x75285d3b, (q31_t)0xcc7184ba, (q31_t)0x7525d536, (q31_t)0xcc6bc48b,
+  (q31_t)0x75234ce8, (q31_t)0xcc66047b, (q31_t)0x7520c453, (q31_t)0xcc60448c, (q31_t)0x751e3b75, (q31_t)0xcc5a84bc, (q31_t)0x751bb24f, (q31_t)0xcc54c50c,
+  (q31_t)0x751928e0, (q31_t)0xcc4f057c, (q31_t)0x75169f2a, (q31_t)0xcc49460c, (q31_t)0x7514152b, (q31_t)0xcc4386bc, (q31_t)0x75118ae4, (q31_t)0xcc3dc78b,
+  (q31_t)0x750f0054, (q31_t)0xcc38087b, (q31_t)0x750c757d, (q31_t)0xcc32498a, (q31_t)0x7509ea5d, (q31_t)0xcc2c8aba, (q31_t)0x75075ef5, (q31_t)0xcc26cc09,
+  (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x7502474d, (q31_t)0xcc1b4f08, (q31_t)0x74ffbb0d, (q31_t)0xcc1590b8, (q31_t)0x74fd2e84, (q31_t)0xcc0fd287,
+  (q31_t)0x74faa1b3, (q31_t)0xcc0a1477, (q31_t)0x74f8149a, (q31_t)0xcc045686, (q31_t)0x74f58739, (q31_t)0xcbfe98b6, (q31_t)0x74f2f990, (q31_t)0xcbf8db05,
+  (q31_t)0x74f06b9e, (q31_t)0xcbf31d75, (q31_t)0x74eddd65, (q31_t)0xcbed6005, (q31_t)0x74eb4ee3, (q31_t)0xcbe7a2b5, (q31_t)0x74e8c01a, (q31_t)0xcbe1e585,
+  (q31_t)0x74e63108, (q31_t)0xcbdc2876, (q31_t)0x74e3a1ae, (q31_t)0xcbd66b86, (q31_t)0x74e1120c, (q31_t)0xcbd0aeb7, (q31_t)0x74de8221, (q31_t)0xcbcaf208,
+  (q31_t)0x74dbf1ef, (q31_t)0xcbc53579, (q31_t)0x74d96175, (q31_t)0xcbbf790a, (q31_t)0x74d6d0b2, (q31_t)0xcbb9bcbb, (q31_t)0x74d43fa8, (q31_t)0xcbb4008d,
+  (q31_t)0x74d1ae55, (q31_t)0xcbae447f, (q31_t)0x74cf1cbb, (q31_t)0xcba88891, (q31_t)0x74cc8ad8, (q31_t)0xcba2ccc4, (q31_t)0x74c9f8ad, (q31_t)0xcb9d1117,
+  (q31_t)0x74c7663a, (q31_t)0xcb97558a, (q31_t)0x74c4d380, (q31_t)0xcb919a1d, (q31_t)0x74c2407d, (q31_t)0xcb8bded1, (q31_t)0x74bfad32, (q31_t)0xcb8623a5,
+  (q31_t)0x74bd199f, (q31_t)0xcb80689a, (q31_t)0x74ba85c4, (q31_t)0xcb7aadaf, (q31_t)0x74b7f1a1, (q31_t)0xcb74f2e4, (q31_t)0x74b55d36, (q31_t)0xcb6f383a,
+  (q31_t)0x74b2c884, (q31_t)0xcb697db0, (q31_t)0x74b03389, (q31_t)0xcb63c347, (q31_t)0x74ad9e46, (q31_t)0xcb5e08fe, (q31_t)0x74ab08bb, (q31_t)0xcb584ed6,
+  (q31_t)0x74a872e8, (q31_t)0xcb5294ce, (q31_t)0x74a5dccd, (q31_t)0xcb4cdae6, (q31_t)0x74a3466b, (q31_t)0xcb47211f, (q31_t)0x74a0afc0, (q31_t)0xcb416779,
+  (q31_t)0x749e18cd, (q31_t)0xcb3badf3, (q31_t)0x749b8193, (q31_t)0xcb35f48d, (q31_t)0x7498ea11, (q31_t)0xcb303b49, (q31_t)0x74965246, (q31_t)0xcb2a8224,
+  (q31_t)0x7493ba34, (q31_t)0xcb24c921, (q31_t)0x749121da, (q31_t)0xcb1f103e, (q31_t)0x748e8938, (q31_t)0xcb19577b, (q31_t)0x748bf04d, (q31_t)0xcb139ed9,
+  (q31_t)0x7489571c, (q31_t)0xcb0de658, (q31_t)0x7486bda2, (q31_t)0xcb082df8, (q31_t)0x748423e0, (q31_t)0xcb0275b8, (q31_t)0x748189d7, (q31_t)0xcafcbd99,
+  (q31_t)0x747eef85, (q31_t)0xcaf7059a, (q31_t)0x747c54ec, (q31_t)0xcaf14dbd, (q31_t)0x7479ba0b, (q31_t)0xcaeb9600, (q31_t)0x74771ee2, (q31_t)0xcae5de64,
+  (q31_t)0x74748371, (q31_t)0xcae026e8, (q31_t)0x7471e7b8, (q31_t)0xcada6f8d, (q31_t)0x746f4bb8, (q31_t)0xcad4b853, (q31_t)0x746caf70, (q31_t)0xcacf013a,
+  (q31_t)0x746a12df, (q31_t)0xcac94a42, (q31_t)0x74677608, (q31_t)0xcac3936b, (q31_t)0x7464d8e8, (q31_t)0xcabddcb4, (q31_t)0x74623b80, (q31_t)0xcab8261e,
+  (q31_t)0x745f9dd1, (q31_t)0xcab26fa9, (q31_t)0x745cffda, (q31_t)0xcaacb955, (q31_t)0x745a619b, (q31_t)0xcaa70322, (q31_t)0x7457c314, (q31_t)0xcaa14d10,
+  (q31_t)0x74552446, (q31_t)0xca9b971e, (q31_t)0x74528530, (q31_t)0xca95e14e, (q31_t)0x744fe5d2, (q31_t)0xca902b9f, (q31_t)0x744d462c, (q31_t)0xca8a7610,
+  (q31_t)0x744aa63f, (q31_t)0xca84c0a3, (q31_t)0x7448060a, (q31_t)0xca7f0b56, (q31_t)0x7445658d, (q31_t)0xca79562b, (q31_t)0x7442c4c8, (q31_t)0xca73a120,
+  (q31_t)0x744023bc, (q31_t)0xca6dec37, (q31_t)0x743d8268, (q31_t)0xca68376e, (q31_t)0x743ae0cc, (q31_t)0xca6282c7, (q31_t)0x74383ee9, (q31_t)0xca5cce40,
+  (q31_t)0x74359cbd, (q31_t)0xca5719db, (q31_t)0x7432fa4b, (q31_t)0xca516597, (q31_t)0x74305790, (q31_t)0xca4bb174, (q31_t)0x742db48e, (q31_t)0xca45fd72,
+  (q31_t)0x742b1144, (q31_t)0xca404992, (q31_t)0x74286db3, (q31_t)0xca3a95d2, (q31_t)0x7425c9da, (q31_t)0xca34e234, (q31_t)0x742325b9, (q31_t)0xca2f2eb6,
+  (q31_t)0x74208150, (q31_t)0xca297b5a, (q31_t)0x741ddca0, (q31_t)0xca23c820, (q31_t)0x741b37a9, (q31_t)0xca1e1506, (q31_t)0x74189269, (q31_t)0xca18620e,
+  (q31_t)0x7415ece2, (q31_t)0xca12af37, (q31_t)0x74134714, (q31_t)0xca0cfc81, (q31_t)0x7410a0fe, (q31_t)0xca0749ec, (q31_t)0x740dfaa0, (q31_t)0xca019779,
+  (q31_t)0x740b53fb, (q31_t)0xc9fbe527, (q31_t)0x7408ad0e, (q31_t)0xc9f632f6, (q31_t)0x740605d9, (q31_t)0xc9f080e7, (q31_t)0x74035e5d, (q31_t)0xc9eacef9,
+  (q31_t)0x7400b69a, (q31_t)0xc9e51d2d, (q31_t)0x73fe0e8f, (q31_t)0xc9df6b81, (q31_t)0x73fb663c, (q31_t)0xc9d9b9f7, (q31_t)0x73f8bda2, (q31_t)0xc9d4088f,
+  (q31_t)0x73f614c0, (q31_t)0xc9ce5748, (q31_t)0x73f36b97, (q31_t)0xc9c8a622, (q31_t)0x73f0c226, (q31_t)0xc9c2f51e, (q31_t)0x73ee186e, (q31_t)0xc9bd443c,
+  (q31_t)0x73eb6e6e, (q31_t)0xc9b7937a, (q31_t)0x73e8c426, (q31_t)0xc9b1e2db, (q31_t)0x73e61997, (q31_t)0xc9ac325d, (q31_t)0x73e36ec1, (q31_t)0xc9a68200,
+  (q31_t)0x73e0c3a3, (q31_t)0xc9a0d1c5, (q31_t)0x73de183e, (q31_t)0xc99b21ab, (q31_t)0x73db6c91, (q31_t)0xc99571b3, (q31_t)0x73d8c09d, (q31_t)0xc98fc1dc,
+  (q31_t)0x73d61461, (q31_t)0xc98a1227, (q31_t)0x73d367de, (q31_t)0xc9846294, (q31_t)0x73d0bb13, (q31_t)0xc97eb322, (q31_t)0x73ce0e01, (q31_t)0xc97903d2,
+  (q31_t)0x73cb60a8, (q31_t)0xc97354a4, (q31_t)0x73c8b307, (q31_t)0xc96da597, (q31_t)0x73c6051f, (q31_t)0xc967f6ac, (q31_t)0x73c356ef, (q31_t)0xc96247e2,
+  (q31_t)0x73c0a878, (q31_t)0xc95c993a, (q31_t)0x73bdf9b9, (q31_t)0xc956eab4, (q31_t)0x73bb4ab3, (q31_t)0xc9513c50, (q31_t)0x73b89b66, (q31_t)0xc94b8e0d,
+  (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x73b33bf5, (q31_t)0xc94031ed, (q31_t)0x73b08bd1, (q31_t)0xc93a8410, (q31_t)0x73addb67, (q31_t)0xc934d654,
+  (q31_t)0x73ab2ab4, (q31_t)0xc92f28ba, (q31_t)0x73a879bb, (q31_t)0xc9297b42, (q31_t)0x73a5c87a, (q31_t)0xc923cdec, (q31_t)0x73a316f2, (q31_t)0xc91e20b8,
+  (q31_t)0x73a06522, (q31_t)0xc91873a5, (q31_t)0x739db30b, (q31_t)0xc912c6b5, (q31_t)0x739b00ad, (q31_t)0xc90d19e6, (q31_t)0x73984e07, (q31_t)0xc9076d39,
+  (q31_t)0x73959b1b, (q31_t)0xc901c0ae, (q31_t)0x7392e7e6, (q31_t)0xc8fc1445, (q31_t)0x7390346b, (q31_t)0xc8f667fe, (q31_t)0x738d80a8, (q31_t)0xc8f0bbd9,
+  (q31_t)0x738acc9e, (q31_t)0xc8eb0fd6, (q31_t)0x7388184d, (q31_t)0xc8e563f5, (q31_t)0x738563b5, (q31_t)0xc8dfb836, (q31_t)0x7382aed5, (q31_t)0xc8da0c99,
+  (q31_t)0x737ff9ae, (q31_t)0xc8d4611d, (q31_t)0x737d4440, (q31_t)0xc8ceb5c4, (q31_t)0x737a8e8a, (q31_t)0xc8c90a8d, (q31_t)0x7377d88d, (q31_t)0xc8c35f78,
+  (q31_t)0x73752249, (q31_t)0xc8bdb485, (q31_t)0x73726bbe, (q31_t)0xc8b809b4, (q31_t)0x736fb4ec, (q31_t)0xc8b25f06, (q31_t)0x736cfdd2, (q31_t)0xc8acb479,
+  (q31_t)0x736a4671, (q31_t)0xc8a70a0e, (q31_t)0x73678ec9, (q31_t)0xc8a15fc6, (q31_t)0x7364d6da, (q31_t)0xc89bb5a0, (q31_t)0x73621ea4, (q31_t)0xc8960b9c,
+  (q31_t)0x735f6626, (q31_t)0xc89061ba, (q31_t)0x735cad61, (q31_t)0xc88ab7fa, (q31_t)0x7359f456, (q31_t)0xc8850e5d, (q31_t)0x73573b03, (q31_t)0xc87f64e2,
+  (q31_t)0x73548168, (q31_t)0xc879bb89, (q31_t)0x7351c787, (q31_t)0xc8741252, (q31_t)0x734f0d5f, (q31_t)0xc86e693d, (q31_t)0x734c52ef, (q31_t)0xc868c04b,
+  (q31_t)0x73499838, (q31_t)0xc863177b, (q31_t)0x7346dd3a, (q31_t)0xc85d6ece, (q31_t)0x734421f6, (q31_t)0xc857c642, (q31_t)0x7341666a, (q31_t)0xc8521dd9,
+  (q31_t)0x733eaa96, (q31_t)0xc84c7593, (q31_t)0x733bee7c, (q31_t)0xc846cd6e, (q31_t)0x7339321b, (q31_t)0xc841256d, (q31_t)0x73367572, (q31_t)0xc83b7d8d,
+  (q31_t)0x7333b883, (q31_t)0xc835d5d0, (q31_t)0x7330fb4d, (q31_t)0xc8302e35, (q31_t)0x732e3dcf, (q31_t)0xc82a86bd, (q31_t)0x732b800a, (q31_t)0xc824df67,
+  (q31_t)0x7328c1ff, (q31_t)0xc81f3834, (q31_t)0x732603ac, (q31_t)0xc8199123, (q31_t)0x73234512, (q31_t)0xc813ea35, (q31_t)0x73208632, (q31_t)0xc80e4369,
+  (q31_t)0x731dc70a, (q31_t)0xc8089cbf, (q31_t)0x731b079b, (q31_t)0xc802f638, (q31_t)0x731847e5, (q31_t)0xc7fd4fd4, (q31_t)0x731587e8, (q31_t)0xc7f7a992,
+  (q31_t)0x7312c7a5, (q31_t)0xc7f20373, (q31_t)0x7310071a, (q31_t)0xc7ec5d76, (q31_t)0x730d4648, (q31_t)0xc7e6b79c, (q31_t)0x730a8530, (q31_t)0xc7e111e5,
+  (q31_t)0x7307c3d0, (q31_t)0xc7db6c50, (q31_t)0x73050229, (q31_t)0xc7d5c6de, (q31_t)0x7302403c, (q31_t)0xc7d0218e, (q31_t)0x72ff7e07, (q31_t)0xc7ca7c61,
+  (q31_t)0x72fcbb8c, (q31_t)0xc7c4d757, (q31_t)0x72f9f8c9, (q31_t)0xc7bf3270, (q31_t)0x72f735c0, (q31_t)0xc7b98dab, (q31_t)0x72f47270, (q31_t)0xc7b3e909,
+  (q31_t)0x72f1aed9, (q31_t)0xc7ae4489, (q31_t)0x72eeeafb, (q31_t)0xc7a8a02c, (q31_t)0x72ec26d6, (q31_t)0xc7a2fbf3, (q31_t)0x72e9626a, (q31_t)0xc79d57db,
+  (q31_t)0x72e69db7, (q31_t)0xc797b3e7, (q31_t)0x72e3d8be, (q31_t)0xc7921015, (q31_t)0x72e1137d, (q31_t)0xc78c6c67, (q31_t)0x72de4df6, (q31_t)0xc786c8db,
+  (q31_t)0x72db8828, (q31_t)0xc7812572, (q31_t)0x72d8c213, (q31_t)0xc77b822b, (q31_t)0x72d5fbb7, (q31_t)0xc775df08, (q31_t)0x72d33514, (q31_t)0xc7703c08,
+  (q31_t)0x72d06e2b, (q31_t)0xc76a992a, (q31_t)0x72cda6fb, (q31_t)0xc764f66f, (q31_t)0x72cadf83, (q31_t)0xc75f53d7, (q31_t)0x72c817c6, (q31_t)0xc759b163,
+  (q31_t)0x72c54fc1, (q31_t)0xc7540f11, (q31_t)0x72c28775, (q31_t)0xc74e6ce2, (q31_t)0x72bfbee3, (q31_t)0xc748cad6, (q31_t)0x72bcf60a, (q31_t)0xc74328ed,
+  (q31_t)0x72ba2cea, (q31_t)0xc73d8727, (q31_t)0x72b76383, (q31_t)0xc737e584, (q31_t)0x72b499d6, (q31_t)0xc7324404, (q31_t)0x72b1cfe1, (q31_t)0xc72ca2a7,
+  (q31_t)0x72af05a7, (q31_t)0xc727016d, (q31_t)0x72ac3b25, (q31_t)0xc7216056, (q31_t)0x72a9705c, (q31_t)0xc71bbf62, (q31_t)0x72a6a54d, (q31_t)0xc7161e92,
+  (q31_t)0x72a3d9f7, (q31_t)0xc7107de4, (q31_t)0x72a10e5b, (q31_t)0xc70add5a, (q31_t)0x729e4277, (q31_t)0xc7053cf2, (q31_t)0x729b764d, (q31_t)0xc6ff9cae,
+  (q31_t)0x7298a9dd, (q31_t)0xc6f9fc8d, (q31_t)0x7295dd25, (q31_t)0xc6f45c8f, (q31_t)0x72931027, (q31_t)0xc6eebcb5, (q31_t)0x729042e3, (q31_t)0xc6e91cfd,
+  (q31_t)0x728d7557, (q31_t)0xc6e37d69, (q31_t)0x728aa785, (q31_t)0xc6ddddf8, (q31_t)0x7287d96c, (q31_t)0xc6d83eab, (q31_t)0x72850b0d, (q31_t)0xc6d29f80,
+  (q31_t)0x72823c67, (q31_t)0xc6cd0079, (q31_t)0x727f6d7a, (q31_t)0xc6c76195, (q31_t)0x727c9e47, (q31_t)0xc6c1c2d4, (q31_t)0x7279cecd, (q31_t)0xc6bc2437,
+  (q31_t)0x7276ff0d, (q31_t)0xc6b685bd, (q31_t)0x72742f05, (q31_t)0xc6b0e767, (q31_t)0x72715eb8, (q31_t)0xc6ab4933, (q31_t)0x726e8e23, (q31_t)0xc6a5ab23,
+  (q31_t)0x726bbd48, (q31_t)0xc6a00d37, (q31_t)0x7268ec27, (q31_t)0xc69a6f6e, (q31_t)0x72661abf, (q31_t)0xc694d1c8, (q31_t)0x72634910, (q31_t)0xc68f3446,
+  (q31_t)0x7260771b, (q31_t)0xc68996e7, (q31_t)0x725da4df, (q31_t)0xc683f9ab, (q31_t)0x725ad25d, (q31_t)0xc67e5c93, (q31_t)0x7257ff94, (q31_t)0xc678bf9f,
+  (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x7252592f, (q31_t)0xc66d8620, (q31_t)0x724f8593, (q31_t)0xc667e996, (q31_t)0x724cb1b0, (q31_t)0xc6624d30,
+  (q31_t)0x7249dd86, (q31_t)0xc65cb0ed, (q31_t)0x72470916, (q31_t)0xc65714cd, (q31_t)0x72443460, (q31_t)0xc65178d1, (q31_t)0x72415f63, (q31_t)0xc64bdcf9,
+  (q31_t)0x723e8a20, (q31_t)0xc6464144, (q31_t)0x723bb496, (q31_t)0xc640a5b3, (q31_t)0x7238dec5, (q31_t)0xc63b0a46, (q31_t)0x723608af, (q31_t)0xc6356efc,
+  (q31_t)0x72333251, (q31_t)0xc62fd3d6, (q31_t)0x72305bae, (q31_t)0xc62a38d4, (q31_t)0x722d84c4, (q31_t)0xc6249df5, (q31_t)0x722aad93, (q31_t)0xc61f033a,
+  (q31_t)0x7227d61c, (q31_t)0xc61968a2, (q31_t)0x7224fe5f, (q31_t)0xc613ce2f, (q31_t)0x7222265b, (q31_t)0xc60e33df, (q31_t)0x721f4e11, (q31_t)0xc60899b2,
+  (q31_t)0x721c7580, (q31_t)0xc602ffaa, (q31_t)0x72199ca9, (q31_t)0xc5fd65c5, (q31_t)0x7216c38c, (q31_t)0xc5f7cc04, (q31_t)0x7213ea28, (q31_t)0xc5f23267,
+  (q31_t)0x7211107e, (q31_t)0xc5ec98ee, (q31_t)0x720e368d, (q31_t)0xc5e6ff98, (q31_t)0x720b5c57, (q31_t)0xc5e16667, (q31_t)0x720881d9, (q31_t)0xc5dbcd59,
+  (q31_t)0x7205a716, (q31_t)0xc5d6346f, (q31_t)0x7202cc0c, (q31_t)0xc5d09ba9, (q31_t)0x71fff0bc, (q31_t)0xc5cb0307, (q31_t)0x71fd1525, (q31_t)0xc5c56a89,
+  (q31_t)0x71fa3949, (q31_t)0xc5bfd22e, (q31_t)0x71f75d25, (q31_t)0xc5ba39f8, (q31_t)0x71f480bc, (q31_t)0xc5b4a1e5, (q31_t)0x71f1a40c, (q31_t)0xc5af09f7,
+  (q31_t)0x71eec716, (q31_t)0xc5a9722c, (q31_t)0x71ebe9da, (q31_t)0xc5a3da86, (q31_t)0x71e90c57, (q31_t)0xc59e4303, (q31_t)0x71e62e8f, (q31_t)0xc598aba5,
+  (q31_t)0x71e35080, (q31_t)0xc593146a, (q31_t)0x71e0722a, (q31_t)0xc58d7d54, (q31_t)0x71dd938f, (q31_t)0xc587e661, (q31_t)0x71dab4ad, (q31_t)0xc5824f93,
+  (q31_t)0x71d7d585, (q31_t)0xc57cb8e9, (q31_t)0x71d4f617, (q31_t)0xc5772263, (q31_t)0x71d21662, (q31_t)0xc5718c00, (q31_t)0x71cf3667, (q31_t)0xc56bf5c2,
+  (q31_t)0x71cc5626, (q31_t)0xc5665fa9, (q31_t)0x71c9759f, (q31_t)0xc560c9b3, (q31_t)0x71c694d2, (q31_t)0xc55b33e2, (q31_t)0x71c3b3bf, (q31_t)0xc5559e34,
+  (q31_t)0x71c0d265, (q31_t)0xc55008ab, (q31_t)0x71bdf0c5, (q31_t)0xc54a7346, (q31_t)0x71bb0edf, (q31_t)0xc544de05, (q31_t)0x71b82cb3, (q31_t)0xc53f48e9,
+  (q31_t)0x71b54a41, (q31_t)0xc539b3f1, (q31_t)0x71b26788, (q31_t)0xc5341f1d, (q31_t)0x71af848a, (q31_t)0xc52e8a6d, (q31_t)0x71aca145, (q31_t)0xc528f5e1,
+  (q31_t)0x71a9bdba, (q31_t)0xc523617a, (q31_t)0x71a6d9e9, (q31_t)0xc51dcd37, (q31_t)0x71a3f5d2, (q31_t)0xc5183919, (q31_t)0x71a11175, (q31_t)0xc512a51f,
+  (q31_t)0x719e2cd2, (q31_t)0xc50d1149, (q31_t)0x719b47e9, (q31_t)0xc5077d97, (q31_t)0x719862b9, (q31_t)0xc501ea0a, (q31_t)0x71957d44, (q31_t)0xc4fc56a2,
+  (q31_t)0x71929789, (q31_t)0xc4f6c35d, (q31_t)0x718fb187, (q31_t)0xc4f1303d, (q31_t)0x718ccb3f, (q31_t)0xc4eb9d42, (q31_t)0x7189e4b2, (q31_t)0xc4e60a6b,
+  (q31_t)0x7186fdde, (q31_t)0xc4e077b8, (q31_t)0x718416c4, (q31_t)0xc4dae52a, (q31_t)0x71812f65, (q31_t)0xc4d552c1, (q31_t)0x717e47bf, (q31_t)0xc4cfc07c,
+  (q31_t)0x717b5fd3, (q31_t)0xc4ca2e5b, (q31_t)0x717877a1, (q31_t)0xc4c49c5f, (q31_t)0x71758f29, (q31_t)0xc4bf0a87, (q31_t)0x7172a66c, (q31_t)0xc4b978d4,
+  (q31_t)0x716fbd68, (q31_t)0xc4b3e746, (q31_t)0x716cd41e, (q31_t)0xc4ae55dc, (q31_t)0x7169ea8f, (q31_t)0xc4a8c497, (q31_t)0x716700b9, (q31_t)0xc4a33376,
+  (q31_t)0x7164169d, (q31_t)0xc49da27a, (q31_t)0x71612c3c, (q31_t)0xc49811a3, (q31_t)0x715e4194, (q31_t)0xc49280f0, (q31_t)0x715b56a7, (q31_t)0xc48cf062,
+  (q31_t)0x71586b74, (q31_t)0xc4875ff9, (q31_t)0x71557ffa, (q31_t)0xc481cfb4, (q31_t)0x7152943b, (q31_t)0xc47c3f94, (q31_t)0x714fa836, (q31_t)0xc476af98,
+  (q31_t)0x714cbbeb, (q31_t)0xc4711fc2, (q31_t)0x7149cf5a, (q31_t)0xc46b9010, (q31_t)0x7146e284, (q31_t)0xc4660083, (q31_t)0x7143f567, (q31_t)0xc460711b,
+  (q31_t)0x71410805, (q31_t)0xc45ae1d7, (q31_t)0x713e1a5c, (q31_t)0xc45552b8, (q31_t)0x713b2c6e, (q31_t)0xc44fc3be, (q31_t)0x71383e3a, (q31_t)0xc44a34e9,
+  (q31_t)0x71354fc0, (q31_t)0xc444a639, (q31_t)0x71326101, (q31_t)0xc43f17ad, (q31_t)0x712f71fb, (q31_t)0xc4398947, (q31_t)0x712c82b0, (q31_t)0xc433fb05,
+  (q31_t)0x7129931f, (q31_t)0xc42e6ce8, (q31_t)0x7126a348, (q31_t)0xc428def0, (q31_t)0x7123b32b, (q31_t)0xc423511d, (q31_t)0x7120c2c8, (q31_t)0xc41dc36f,
+  (q31_t)0x711dd220, (q31_t)0xc41835e6, (q31_t)0x711ae132, (q31_t)0xc412a882, (q31_t)0x7117effe, (q31_t)0xc40d1b42, (q31_t)0x7114fe84, (q31_t)0xc4078e28,
+  (q31_t)0x71120cc5, (q31_t)0xc4020133, (q31_t)0x710f1ac0, (q31_t)0xc3fc7462, (q31_t)0x710c2875, (q31_t)0xc3f6e7b7, (q31_t)0x710935e4, (q31_t)0xc3f15b31,
+  (q31_t)0x7106430e, (q31_t)0xc3ebced0, (q31_t)0x71034ff2, (q31_t)0xc3e64294, (q31_t)0x71005c90, (q31_t)0xc3e0b67d, (q31_t)0x70fd68e9, (q31_t)0xc3db2a8b,
+  (q31_t)0x70fa74fc, (q31_t)0xc3d59ebe, (q31_t)0x70f780c9, (q31_t)0xc3d01316, (q31_t)0x70f48c50, (q31_t)0xc3ca8793, (q31_t)0x70f19792, (q31_t)0xc3c4fc36,
+  (q31_t)0x70eea28e, (q31_t)0xc3bf70fd, (q31_t)0x70ebad45, (q31_t)0xc3b9e5ea, (q31_t)0x70e8b7b5, (q31_t)0xc3b45afc, (q31_t)0x70e5c1e1, (q31_t)0xc3aed034,
+  (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x70dfd566, (q31_t)0xc3a3bb12, (q31_t)0x70dcdec0, (q31_t)0xc39e30b8, (q31_t)0x70d9e7d5, (q31_t)0xc398a685,
+  (q31_t)0x70d6f0a4, (q31_t)0xc3931c76, (q31_t)0x70d3f92d, (q31_t)0xc38d928d, (q31_t)0x70d10171, (q31_t)0xc38808c9, (q31_t)0x70ce096f, (q31_t)0xc3827f2a,
+  (q31_t)0x70cb1128, (q31_t)0xc37cf5b0, (q31_t)0x70c8189b, (q31_t)0xc3776c5c, (q31_t)0x70c51fc8, (q31_t)0xc371e32d, (q31_t)0x70c226b0, (q31_t)0xc36c5a24,
+  (q31_t)0x70bf2d53, (q31_t)0xc366d140, (q31_t)0x70bc33b0, (q31_t)0xc3614881, (q31_t)0x70b939c7, (q31_t)0xc35bbfe8, (q31_t)0x70b63f99, (q31_t)0xc3563774,
+  (q31_t)0x70b34525, (q31_t)0xc350af26, (q31_t)0x70b04a6b, (q31_t)0xc34b26fc, (q31_t)0x70ad4f6d, (q31_t)0xc3459ef9, (q31_t)0x70aa5428, (q31_t)0xc340171b,
+  (q31_t)0x70a7589f, (q31_t)0xc33a8f62, (q31_t)0x70a45ccf, (q31_t)0xc33507cf, (q31_t)0x70a160ba, (q31_t)0xc32f8061, (q31_t)0x709e6460, (q31_t)0xc329f919,
+  (q31_t)0x709b67c0, (q31_t)0xc32471f7, (q31_t)0x70986adb, (q31_t)0xc31eeaf9, (q31_t)0x70956db1, (q31_t)0xc3196422, (q31_t)0x70927041, (q31_t)0xc313dd70,
+  (q31_t)0x708f728b, (q31_t)0xc30e56e4, (q31_t)0x708c7490, (q31_t)0xc308d07d, (q31_t)0x70897650, (q31_t)0xc3034a3c, (q31_t)0x708677ca, (q31_t)0xc2fdc420,
+  (q31_t)0x708378ff, (q31_t)0xc2f83e2a, (q31_t)0x708079ee, (q31_t)0xc2f2b85a, (q31_t)0x707d7a98, (q31_t)0xc2ed32af, (q31_t)0x707a7afd, (q31_t)0xc2e7ad2a,
+  (q31_t)0x70777b1c, (q31_t)0xc2e227cb, (q31_t)0x70747af6, (q31_t)0xc2dca291, (q31_t)0x70717a8a, (q31_t)0xc2d71d7e, (q31_t)0x706e79d9, (q31_t)0xc2d1988f,
+  (q31_t)0x706b78e3, (q31_t)0xc2cc13c7, (q31_t)0x706877a7, (q31_t)0xc2c68f24, (q31_t)0x70657626, (q31_t)0xc2c10aa7, (q31_t)0x70627460, (q31_t)0xc2bb8650,
+  (q31_t)0x705f7255, (q31_t)0xc2b6021f, (q31_t)0x705c7004, (q31_t)0xc2b07e14, (q31_t)0x70596d6d, (q31_t)0xc2aafa2e, (q31_t)0x70566a92, (q31_t)0xc2a5766e,
+  (q31_t)0x70536771, (q31_t)0xc29ff2d4, (q31_t)0x7050640b, (q31_t)0xc29a6f60, (q31_t)0x704d6060, (q31_t)0xc294ec12, (q31_t)0x704a5c6f, (q31_t)0xc28f68e9,
+  (q31_t)0x70475839, (q31_t)0xc289e5e7, (q31_t)0x704453be, (q31_t)0xc284630a, (q31_t)0x70414efd, (q31_t)0xc27ee054, (q31_t)0x703e49f8, (q31_t)0xc2795dc3,
+  (q31_t)0x703b44ad, (q31_t)0xc273db58, (q31_t)0x70383f1d, (q31_t)0xc26e5913, (q31_t)0x70353947, (q31_t)0xc268d6f5, (q31_t)0x7032332d, (q31_t)0xc26354fc,
+  (q31_t)0x702f2ccd, (q31_t)0xc25dd329, (q31_t)0x702c2628, (q31_t)0xc258517c, (q31_t)0x70291f3e, (q31_t)0xc252cff5, (q31_t)0x7026180e, (q31_t)0xc24d4e95,
+  (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x702008e0, (q31_t)0xc2424c46, (q31_t)0x701d00e1, (q31_t)0xc23ccb57, (q31_t)0x7019f89d, (q31_t)0xc2374a8f,
+  (q31_t)0x7016f014, (q31_t)0xc231c9ec, (q31_t)0x7013e746, (q31_t)0xc22c4970, (q31_t)0x7010de32, (q31_t)0xc226c91a, (q31_t)0x700dd4da, (q31_t)0xc22148ea,
+  (q31_t)0x700acb3c, (q31_t)0xc21bc8e1, (q31_t)0x7007c159, (q31_t)0xc21648fd, (q31_t)0x7004b731, (q31_t)0xc210c940, (q31_t)0x7001acc4, (q31_t)0xc20b49a9,
+  (q31_t)0x6ffea212, (q31_t)0xc205ca38, (q31_t)0x6ffb971b, (q31_t)0xc2004aed, (q31_t)0x6ff88bde, (q31_t)0xc1facbc9, (q31_t)0x6ff5805d, (q31_t)0xc1f54cca,
+  (q31_t)0x6ff27497, (q31_t)0xc1efcdf3, (q31_t)0x6fef688b, (q31_t)0xc1ea4f41, (q31_t)0x6fec5c3b, (q31_t)0xc1e4d0b6, (q31_t)0x6fe94fa5, (q31_t)0xc1df5251,
+  (q31_t)0x6fe642ca, (q31_t)0xc1d9d412, (q31_t)0x6fe335ab, (q31_t)0xc1d455f9, (q31_t)0x6fe02846, (q31_t)0xc1ced807, (q31_t)0x6fdd1a9c, (q31_t)0xc1c95a3c,
+  (q31_t)0x6fda0cae, (q31_t)0xc1c3dc97, (q31_t)0x6fd6fe7a, (q31_t)0xc1be5f18, (q31_t)0x6fd3f001, (q31_t)0xc1b8e1bf, (q31_t)0x6fd0e144, (q31_t)0xc1b3648d,
+  (q31_t)0x6fcdd241, (q31_t)0xc1ade781, (q31_t)0x6fcac2fa, (q31_t)0xc1a86a9c, (q31_t)0x6fc7b36d, (q31_t)0xc1a2edde, (q31_t)0x6fc4a39c, (q31_t)0xc19d7145,
+  (q31_t)0x6fc19385, (q31_t)0xc197f4d4, (q31_t)0x6fbe832a, (q31_t)0xc1927888, (q31_t)0x6fbb728a, (q31_t)0xc18cfc63, (q31_t)0x6fb861a4, (q31_t)0xc1878065,
+  (q31_t)0x6fb5507a, (q31_t)0xc182048d, (q31_t)0x6fb23f0b, (q31_t)0xc17c88dc, (q31_t)0x6faf2d57, (q31_t)0xc1770d52, (q31_t)0x6fac1b5f, (q31_t)0xc17191ee,
+  (q31_t)0x6fa90921, (q31_t)0xc16c16b0, (q31_t)0x6fa5f69e, (q31_t)0xc1669b99, (q31_t)0x6fa2e3d7, (q31_t)0xc16120a9, (q31_t)0x6f9fd0cb, (q31_t)0xc15ba5df,
+  (q31_t)0x6f9cbd79, (q31_t)0xc1562b3d, (q31_t)0x6f99a9e3, (q31_t)0xc150b0c0, (q31_t)0x6f969608, (q31_t)0xc14b366b, (q31_t)0x6f9381e9, (q31_t)0xc145bc3c,
+  (q31_t)0x6f906d84, (q31_t)0xc1404233, (q31_t)0x6f8d58db, (q31_t)0xc13ac852, (q31_t)0x6f8a43ed, (q31_t)0xc1354e97, (q31_t)0x6f872eba, (q31_t)0xc12fd503,
+  (q31_t)0x6f841942, (q31_t)0xc12a5b95, (q31_t)0x6f810386, (q31_t)0xc124e24f, (q31_t)0x6f7ded84, (q31_t)0xc11f692f, (q31_t)0x6f7ad73e, (q31_t)0xc119f036,
+  (q31_t)0x6f77c0b3, (q31_t)0xc1147764, (q31_t)0x6f74a9e4, (q31_t)0xc10efeb8, (q31_t)0x6f7192cf, (q31_t)0xc1098634, (q31_t)0x6f6e7b76, (q31_t)0xc1040dd6,
+  (q31_t)0x6f6b63d8, (q31_t)0xc0fe959f, (q31_t)0x6f684bf6, (q31_t)0xc0f91d8f, (q31_t)0x6f6533ce, (q31_t)0xc0f3a5a6, (q31_t)0x6f621b62, (q31_t)0xc0ee2de3,
+  (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6f5be9bc, (q31_t)0xc0e33ed4, (q31_t)0x6f58d082, (q31_t)0xc0ddc786, (q31_t)0x6f55b703, (q31_t)0xc0d8505f,
+  (q31_t)0x6f529d40, (q31_t)0xc0d2d960, (q31_t)0x6f4f8338, (q31_t)0xc0cd6287, (q31_t)0x6f4c68eb, (q31_t)0xc0c7ebd6, (q31_t)0x6f494e5a, (q31_t)0xc0c2754b,
+  (q31_t)0x6f463383, (q31_t)0xc0bcfee7, (q31_t)0x6f431869, (q31_t)0xc0b788ab, (q31_t)0x6f3ffd09, (q31_t)0xc0b21295, (q31_t)0x6f3ce165, (q31_t)0xc0ac9ca6,
+  (q31_t)0x6f39c57d, (q31_t)0xc0a726df, (q31_t)0x6f36a94f, (q31_t)0xc0a1b13e, (q31_t)0x6f338cde, (q31_t)0xc09c3bc5, (q31_t)0x6f307027, (q31_t)0xc096c673,
+  (q31_t)0x6f2d532c, (q31_t)0xc0915148, (q31_t)0x6f2a35ed, (q31_t)0xc08bdc44, (q31_t)0x6f271868, (q31_t)0xc0866767, (q31_t)0x6f23faa0, (q31_t)0xc080f2b1,
+  (q31_t)0x6f20dc92, (q31_t)0xc07b7e23, (q31_t)0x6f1dbe41, (q31_t)0xc07609bb, (q31_t)0x6f1a9faa, (q31_t)0xc070957b, (q31_t)0x6f1780cf, (q31_t)0xc06b2162,
+  (q31_t)0x6f1461b0, (q31_t)0xc065ad70, (q31_t)0x6f11424c, (q31_t)0xc06039a6, (q31_t)0x6f0e22a3, (q31_t)0xc05ac603, (q31_t)0x6f0b02b6, (q31_t)0xc0555287,
+  (q31_t)0x6f07e285, (q31_t)0xc04fdf32, (q31_t)0x6f04c20f, (q31_t)0xc04a6c05, (q31_t)0x6f01a155, (q31_t)0xc044f8fe, (q31_t)0x6efe8056, (q31_t)0xc03f8620,
+  (q31_t)0x6efb5f12, (q31_t)0xc03a1368, (q31_t)0x6ef83d8a, (q31_t)0xc034a0d8, (q31_t)0x6ef51bbe, (q31_t)0xc02f2e6f, (q31_t)0x6ef1f9ad, (q31_t)0xc029bc2e,
+  (q31_t)0x6eeed758, (q31_t)0xc0244a14, (q31_t)0x6eebb4bf, (q31_t)0xc01ed821, (q31_t)0x6ee891e1, (q31_t)0xc0196656, (q31_t)0x6ee56ebe, (q31_t)0xc013f4b2,
+  (q31_t)0x6ee24b57, (q31_t)0xc00e8336, (q31_t)0x6edf27ac, (q31_t)0xc00911e1, (q31_t)0x6edc03bc, (q31_t)0xc003a0b3, (q31_t)0x6ed8df88, (q31_t)0xbffe2fad,
+  (q31_t)0x6ed5bb10, (q31_t)0xbff8bece, (q31_t)0x6ed29653, (q31_t)0xbff34e17, (q31_t)0x6ecf7152, (q31_t)0xbfeddd88, (q31_t)0x6ecc4c0d, (q31_t)0xbfe86d20,
+  (q31_t)0x6ec92683, (q31_t)0xbfe2fcdf, (q31_t)0x6ec600b5, (q31_t)0xbfdd8cc6, (q31_t)0x6ec2daa2, (q31_t)0xbfd81cd5, (q31_t)0x6ebfb44b, (q31_t)0xbfd2ad0b,
+  (q31_t)0x6ebc8db0, (q31_t)0xbfcd3d69, (q31_t)0x6eb966d1, (q31_t)0xbfc7cdee, (q31_t)0x6eb63fad, (q31_t)0xbfc25e9b, (q31_t)0x6eb31845, (q31_t)0xbfbcef70,
+  (q31_t)0x6eaff099, (q31_t)0xbfb7806c, (q31_t)0x6eacc8a8, (q31_t)0xbfb21190, (q31_t)0x6ea9a073, (q31_t)0xbfaca2dc, (q31_t)0x6ea677fa, (q31_t)0xbfa7344f,
+  (q31_t)0x6ea34f3d, (q31_t)0xbfa1c5ea, (q31_t)0x6ea0263b, (q31_t)0xbf9c57ac, (q31_t)0x6e9cfcf5, (q31_t)0xbf96e997, (q31_t)0x6e99d36b, (q31_t)0xbf917ba9,
+  (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3, (q31_t)0x6e937f8a, (q31_t)0xbf86a044, (q31_t)0x6e905534, (q31_t)0xbf8132ce, (q31_t)0x6e8d2a99, (q31_t)0xbf7bc57f,
+  (q31_t)0x6e89ffb9, (q31_t)0xbf765858, (q31_t)0x6e86d496, (q31_t)0xbf70eb59, (q31_t)0x6e83a92f, (q31_t)0xbf6b7e81, (q31_t)0x6e807d83, (q31_t)0xbf6611d2,
+  (q31_t)0x6e7d5193, (q31_t)0xbf60a54a, (q31_t)0x6e7a255f, (q31_t)0xbf5b38ea, (q31_t)0x6e76f8e7, (q31_t)0xbf55ccb2, (q31_t)0x6e73cc2b, (q31_t)0xbf5060a2,
+  (q31_t)0x6e709f2a, (q31_t)0xbf4af4ba, (q31_t)0x6e6d71e6, (q31_t)0xbf4588fa, (q31_t)0x6e6a445d, (q31_t)0xbf401d61, (q31_t)0x6e671690, (q31_t)0xbf3ab1f1,
+  (q31_t)0x6e63e87f, (q31_t)0xbf3546a8, (q31_t)0x6e60ba2a, (q31_t)0xbf2fdb88, (q31_t)0x6e5d8b91, (q31_t)0xbf2a708f, (q31_t)0x6e5a5cb4, (q31_t)0xbf2505bf,
+  (q31_t)0x6e572d93, (q31_t)0xbf1f9b16, (q31_t)0x6e53fe2e, (q31_t)0xbf1a3096, (q31_t)0x6e50ce84, (q31_t)0xbf14c63d, (q31_t)0x6e4d9e97, (q31_t)0xbf0f5c0d,
+  (q31_t)0x6e4a6e66, (q31_t)0xbf09f205, (q31_t)0x6e473df0, (q31_t)0xbf048824, (q31_t)0x6e440d37, (q31_t)0xbeff1e6c, (q31_t)0x6e40dc39, (q31_t)0xbef9b4dc,
+  (q31_t)0x6e3daaf8, (q31_t)0xbef44b74, (q31_t)0x6e3a7972, (q31_t)0xbeeee234, (q31_t)0x6e3747a9, (q31_t)0xbee9791c, (q31_t)0x6e34159b, (q31_t)0xbee4102d,
+  (q31_t)0x6e30e34a, (q31_t)0xbedea765, (q31_t)0x6e2db0b4, (q31_t)0xbed93ec6, (q31_t)0x6e2a7ddb, (q31_t)0xbed3d64f, (q31_t)0x6e274abe, (q31_t)0xbece6e00,
+  (q31_t)0x6e24175c, (q31_t)0xbec905d9, (q31_t)0x6e20e3b7, (q31_t)0xbec39ddb, (q31_t)0x6e1dafce, (q31_t)0xbebe3605, (q31_t)0x6e1a7ba1, (q31_t)0xbeb8ce57,
+  (q31_t)0x6e174730, (q31_t)0xbeb366d1, (q31_t)0x6e14127b, (q31_t)0xbeadff74, (q31_t)0x6e10dd82, (q31_t)0xbea8983f, (q31_t)0x6e0da845, (q31_t)0xbea33132,
+  (q31_t)0x6e0a72c5, (q31_t)0xbe9dca4e, (q31_t)0x6e073d00, (q31_t)0xbe986391, (q31_t)0x6e0406f8, (q31_t)0xbe92fcfe, (q31_t)0x6e00d0ac, (q31_t)0xbe8d9692,
+  (q31_t)0x6dfd9a1c, (q31_t)0xbe88304f, (q31_t)0x6dfa6348, (q31_t)0xbe82ca35, (q31_t)0x6df72c30, (q31_t)0xbe7d6442, (q31_t)0x6df3f4d4, (q31_t)0xbe77fe78,
+  (q31_t)0x6df0bd35, (q31_t)0xbe7298d7, (q31_t)0x6ded8552, (q31_t)0xbe6d335e, (q31_t)0x6dea4d2b, (q31_t)0xbe67ce0d, (q31_t)0x6de714c0, (q31_t)0xbe6268e5,
+  (q31_t)0x6de3dc11, (q31_t)0xbe5d03e6, (q31_t)0x6de0a31f, (q31_t)0xbe579f0f, (q31_t)0x6ddd69e9, (q31_t)0xbe523a60, (q31_t)0x6dda306f, (q31_t)0xbe4cd5da,
+  (q31_t)0x6dd6f6b1, (q31_t)0xbe47717c, (q31_t)0x6dd3bcaf, (q31_t)0xbe420d47, (q31_t)0x6dd0826a, (q31_t)0xbe3ca93b, (q31_t)0x6dcd47e1, (q31_t)0xbe374557,
+  (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6dc6d204, (q31_t)0xbe2c7e09, (q31_t)0x6dc396b0, (q31_t)0xbe271a9f, (q31_t)0x6dc05b18, (q31_t)0xbe21b75d,
+  (q31_t)0x6dbd1f3c, (q31_t)0xbe1c5444, (q31_t)0x6db9e31d, (q31_t)0xbe16f154, (q31_t)0x6db6a6ba, (q31_t)0xbe118e8c, (q31_t)0x6db36a14, (q31_t)0xbe0c2bed,
+  (q31_t)0x6db02d29, (q31_t)0xbe06c977, (q31_t)0x6daceffb, (q31_t)0xbe01672a, (q31_t)0x6da9b28a, (q31_t)0xbdfc0505, (q31_t)0x6da674d5, (q31_t)0xbdf6a309,
+  (q31_t)0x6da336dc, (q31_t)0xbdf14135, (q31_t)0x6d9ff89f, (q31_t)0xbdebdf8b, (q31_t)0x6d9cba1f, (q31_t)0xbde67e09, (q31_t)0x6d997b5b, (q31_t)0xbde11cb0,
+  (q31_t)0x6d963c54, (q31_t)0xbddbbb7f, (q31_t)0x6d92fd09, (q31_t)0xbdd65a78, (q31_t)0x6d8fbd7a, (q31_t)0xbdd0f999, (q31_t)0x6d8c7da8, (q31_t)0xbdcb98e3,
+  (q31_t)0x6d893d93, (q31_t)0xbdc63856, (q31_t)0x6d85fd39, (q31_t)0xbdc0d7f2, (q31_t)0x6d82bc9d, (q31_t)0xbdbb77b7, (q31_t)0x6d7f7bbc, (q31_t)0xbdb617a4,
+  (q31_t)0x6d7c3a98, (q31_t)0xbdb0b7bb, (q31_t)0x6d78f931, (q31_t)0xbdab57fa, (q31_t)0x6d75b786, (q31_t)0xbda5f862, (q31_t)0x6d727597, (q31_t)0xbda098f3,
+  (q31_t)0x6d6f3365, (q31_t)0xbd9b39ad, (q31_t)0x6d6bf0f0, (q31_t)0xbd95da91, (q31_t)0x6d68ae37, (q31_t)0xbd907b9d, (q31_t)0x6d656b3a, (q31_t)0xbd8b1cd2,
+  (q31_t)0x6d6227fa, (q31_t)0xbd85be30, (q31_t)0x6d5ee477, (q31_t)0xbd805fb7, (q31_t)0x6d5ba0b0, (q31_t)0xbd7b0167, (q31_t)0x6d585ca6, (q31_t)0xbd75a340,
+  (q31_t)0x6d551858, (q31_t)0xbd704542, (q31_t)0x6d51d3c6, (q31_t)0xbd6ae76d, (q31_t)0x6d4e8ef2, (q31_t)0xbd6589c1, (q31_t)0x6d4b49da, (q31_t)0xbd602c3f,
+  (q31_t)0x6d48047e, (q31_t)0xbd5acee5, (q31_t)0x6d44bedf, (q31_t)0xbd5571b5, (q31_t)0x6d4178fd, (q31_t)0xbd5014ad, (q31_t)0x6d3e32d7, (q31_t)0xbd4ab7cf,
+  (q31_t)0x6d3aec6e, (q31_t)0xbd455b1a, (q31_t)0x6d37a5c1, (q31_t)0xbd3ffe8e, (q31_t)0x6d345ed1, (q31_t)0xbd3aa22c, (q31_t)0x6d31179e, (q31_t)0xbd3545f2,
+  (q31_t)0x6d2dd027, (q31_t)0xbd2fe9e2, (q31_t)0x6d2a886e, (q31_t)0xbd2a8dfb, (q31_t)0x6d274070, (q31_t)0xbd25323d, (q31_t)0x6d23f830, (q31_t)0xbd1fd6a8,
+  (q31_t)0x6d20afac, (q31_t)0xbd1a7b3d, (q31_t)0x6d1d66e4, (q31_t)0xbd151ffb, (q31_t)0x6d1a1dda, (q31_t)0xbd0fc4e2, (q31_t)0x6d16d48c, (q31_t)0xbd0a69f2,
+  (q31_t)0x6d138afb, (q31_t)0xbd050f2c, (q31_t)0x6d104126, (q31_t)0xbcffb48f, (q31_t)0x6d0cf70f, (q31_t)0xbcfa5a1b, (q31_t)0x6d09acb4, (q31_t)0xbcf4ffd1,
+  (q31_t)0x6d066215, (q31_t)0xbcefa5b0, (q31_t)0x6d031734, (q31_t)0xbcea4bb9, (q31_t)0x6cffcc0f, (q31_t)0xbce4f1eb, (q31_t)0x6cfc80a7, (q31_t)0xbcdf9846,
+  (q31_t)0x6cf934fc, (q31_t)0xbcda3ecb, (q31_t)0x6cf5e90d, (q31_t)0xbcd4e579, (q31_t)0x6cf29cdc, (q31_t)0xbccf8c50, (q31_t)0x6cef5067, (q31_t)0xbcca3351,
+  (q31_t)0x6cec03af, (q31_t)0xbcc4da7b, (q31_t)0x6ce8b6b4, (q31_t)0xbcbf81cf, (q31_t)0x6ce56975, (q31_t)0xbcba294d, (q31_t)0x6ce21bf4, (q31_t)0xbcb4d0f4,
+  (q31_t)0x6cdece2f, (q31_t)0xbcaf78c4, (q31_t)0x6cdb8027, (q31_t)0xbcaa20be, (q31_t)0x6cd831dc, (q31_t)0xbca4c8e1, (q31_t)0x6cd4e34e, (q31_t)0xbc9f712e,
+  (q31_t)0x6cd1947c, (q31_t)0xbc9a19a5, (q31_t)0x6cce4568, (q31_t)0xbc94c245, (q31_t)0x6ccaf610, (q31_t)0xbc8f6b0f, (q31_t)0x6cc7a676, (q31_t)0xbc8a1402,
+  (q31_t)0x6cc45698, (q31_t)0xbc84bd1f, (q31_t)0x6cc10677, (q31_t)0xbc7f6665, (q31_t)0x6cbdb613, (q31_t)0xbc7a0fd6, (q31_t)0x6cba656c, (q31_t)0xbc74b96f,
+  (q31_t)0x6cb71482, (q31_t)0xbc6f6333, (q31_t)0x6cb3c355, (q31_t)0xbc6a0d20, (q31_t)0x6cb071e4, (q31_t)0xbc64b737, (q31_t)0x6cad2031, (q31_t)0xbc5f6177,
+  (q31_t)0x6ca9ce3b, (q31_t)0xbc5a0be2, (q31_t)0x6ca67c01, (q31_t)0xbc54b676, (q31_t)0x6ca32985, (q31_t)0xbc4f6134, (q31_t)0x6c9fd6c6, (q31_t)0xbc4a0c1b,
+  (q31_t)0x6c9c83c3, (q31_t)0xbc44b72c, (q31_t)0x6c99307e, (q31_t)0xbc3f6267, (q31_t)0x6c95dcf6, (q31_t)0xbc3a0dcc, (q31_t)0x6c92892a, (q31_t)0xbc34b95b,
+  (q31_t)0x6c8f351c, (q31_t)0xbc2f6513, (q31_t)0x6c8be0cb, (q31_t)0xbc2a10f6, (q31_t)0x6c888c36, (q31_t)0xbc24bd02, (q31_t)0x6c85375f, (q31_t)0xbc1f6938,
+  (q31_t)0x6c81e245, (q31_t)0xbc1a1598, (q31_t)0x6c7e8ce8, (q31_t)0xbc14c221, (q31_t)0x6c7b3748, (q31_t)0xbc0f6ed5, (q31_t)0x6c77e165, (q31_t)0xbc0a1bb3,
+  (q31_t)0x6c748b3f, (q31_t)0xbc04c8ba, (q31_t)0x6c7134d7, (q31_t)0xbbff75ec, (q31_t)0x6c6dde2b, (q31_t)0xbbfa2347, (q31_t)0x6c6a873d, (q31_t)0xbbf4d0cc,
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+  (q31_t)0x68a69e81, (q31_t)0xb64beacd, (q31_t)0x68a30031, (q31_t)0xb646c7ce, (q31_t)0x689f61a1, (q31_t)0xb641a4fe, (q31_t)0x689bc2d1, (q31_t)0xb63c825b,
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+  (q31_t)0x687b2224, (q31_t)0xb60e529f, (q31_t)0x687780ce, (q31_t)0xb60931c4, (q31_t)0x6873df38, (q31_t)0xb6041116, (q31_t)0x68703d62, (q31_t)0xb5fef095,
+  (q31_t)0x686c9b4b, (q31_t)0xb5f9d043, (q31_t)0x6868f8f4, (q31_t)0xb5f4b01e, (q31_t)0x6865565c, (q31_t)0xb5ef9026, (q31_t)0x6861b384, (q31_t)0xb5ea705d,
+  (q31_t)0x685e106c, (q31_t)0xb5e550c1, (q31_t)0x685a6d13, (q31_t)0xb5e03153, (q31_t)0x6856c979, (q31_t)0xb5db1212, (q31_t)0x685325a0, (q31_t)0xb5d5f2ff,
+  (q31_t)0x684f8186, (q31_t)0xb5d0d41a, (q31_t)0x684bdd2c, (q31_t)0xb5cbb563, (q31_t)0x68483891, (q31_t)0xb5c696da, (q31_t)0x684493b6, (q31_t)0xb5c1787e,
+  (q31_t)0x6840ee9b, (q31_t)0xb5bc5a50, (q31_t)0x683d493f, (q31_t)0xb5b73c50, (q31_t)0x6839a3a4, (q31_t)0xb5b21e7e, (q31_t)0x6835fdc7, (q31_t)0xb5ad00d9,
+  (q31_t)0x683257ab, (q31_t)0xb5a7e362, (q31_t)0x682eb14e, (q31_t)0xb5a2c61a, (q31_t)0x682b0ab1, (q31_t)0xb59da8ff, (q31_t)0x682763d4, (q31_t)0xb5988c12,
+  (q31_t)0x6823bcb7, (q31_t)0xb5936f53, (q31_t)0x68201559, (q31_t)0xb58e52c2, (q31_t)0x681c6dbb, (q31_t)0xb589365e, (q31_t)0x6818c5dd, (q31_t)0xb5841a29,
+  (q31_t)0x68151dbe, (q31_t)0xb57efe22, (q31_t)0x68117560, (q31_t)0xb579e248, (q31_t)0x680dccc1, (q31_t)0xb574c69d, (q31_t)0x680a23e2, (q31_t)0xb56fab1f,
+  (q31_t)0x68067ac3, (q31_t)0xb56a8fd0, (q31_t)0x6802d164, (q31_t)0xb56574ae, (q31_t)0x67ff27c4, (q31_t)0xb56059bb, (q31_t)0x67fb7de5, (q31_t)0xb55b3ef5,
+  (q31_t)0x67f7d3c5, (q31_t)0xb556245e, (q31_t)0x67f42965, (q31_t)0xb55109f5, (q31_t)0x67f07ec5, (q31_t)0xb54befba, (q31_t)0x67ecd3e5, (q31_t)0xb546d5ac,
+  (q31_t)0x67e928c5, (q31_t)0xb541bbcd, (q31_t)0x67e57d64, (q31_t)0xb53ca21c, (q31_t)0x67e1d1c4, (q31_t)0xb5378899, (q31_t)0x67de25e3, (q31_t)0xb5326f45,
+  (q31_t)0x67da79c3, (q31_t)0xb52d561e, (q31_t)0x67d6cd62, (q31_t)0xb5283d26, (q31_t)0x67d320c1, (q31_t)0xb523245b, (q31_t)0x67cf73e1, (q31_t)0xb51e0bbf,
+  (q31_t)0x67cbc6c0, (q31_t)0xb518f351, (q31_t)0x67c8195f, (q31_t)0xb513db12, (q31_t)0x67c46bbe, (q31_t)0xb50ec300, (q31_t)0x67c0bddd, (q31_t)0xb509ab1d,
+  (q31_t)0x67bd0fbd, (q31_t)0xb5049368, (q31_t)0x67b9615c, (q31_t)0xb4ff7be1, (q31_t)0x67b5b2bb, (q31_t)0xb4fa6489, (q31_t)0x67b203da, (q31_t)0xb4f54d5f,
+  (q31_t)0x67ae54ba, (q31_t)0xb4f03663, (q31_t)0x67aaa559, (q31_t)0xb4eb1f95, (q31_t)0x67a6f5b8, (q31_t)0xb4e608f6, (q31_t)0x67a345d8, (q31_t)0xb4e0f285,
+  (q31_t)0x679f95b7, (q31_t)0xb4dbdc42, (q31_t)0x679be557, (q31_t)0xb4d6c62e, (q31_t)0x679834b6, (q31_t)0xb4d1b048, (q31_t)0x679483d6, (q31_t)0xb4cc9a90,
+  (q31_t)0x6790d2b6, (q31_t)0xb4c78507, (q31_t)0x678d2156, (q31_t)0xb4c26fad, (q31_t)0x67896fb6, (q31_t)0xb4bd5a80, (q31_t)0x6785bdd6, (q31_t)0xb4b84582,
+  (q31_t)0x67820bb7, (q31_t)0xb4b330b3, (q31_t)0x677e5957, (q31_t)0xb4ae1c12, (q31_t)0x677aa6b8, (q31_t)0xb4a9079f, (q31_t)0x6776f3d9, (q31_t)0xb4a3f35b,
+  (q31_t)0x677340ba, (q31_t)0xb49edf45, (q31_t)0x676f8d5b, (q31_t)0xb499cb5e, (q31_t)0x676bd9bd, (q31_t)0xb494b7a6, (q31_t)0x676825de, (q31_t)0xb48fa41c,
+  (q31_t)0x676471c0, (q31_t)0xb48a90c0, (q31_t)0x6760bd62, (q31_t)0xb4857d93, (q31_t)0x675d08c4, (q31_t)0xb4806a95, (q31_t)0x675953e7, (q31_t)0xb47b57c5,
+  (q31_t)0x67559eca, (q31_t)0xb4764523, (q31_t)0x6751e96d, (q31_t)0xb47132b1, (q31_t)0x674e33d0, (q31_t)0xb46c206d, (q31_t)0x674a7df4, (q31_t)0xb4670e57,
+  (q31_t)0x6746c7d8, (q31_t)0xb461fc70, (q31_t)0x6743117c, (q31_t)0xb45ceab8, (q31_t)0x673f5ae0, (q31_t)0xb457d92f, (q31_t)0x673ba405, (q31_t)0xb452c7d4,
+  (q31_t)0x6737ecea, (q31_t)0xb44db6a8, (q31_t)0x67343590, (q31_t)0xb448a5aa, (q31_t)0x67307df5, (q31_t)0xb44394db, (q31_t)0x672cc61c, (q31_t)0xb43e843b,
+  (q31_t)0x67290e02, (q31_t)0xb43973ca, (q31_t)0x672555a9, (q31_t)0xb4346387, (q31_t)0x67219d10, (q31_t)0xb42f5373, (q31_t)0x671de438, (q31_t)0xb42a438e,
+  (q31_t)0x671a2b20, (q31_t)0xb42533d8, (q31_t)0x671671c8, (q31_t)0xb4202451, (q31_t)0x6712b831, (q31_t)0xb41b14f8, (q31_t)0x670efe5a, (q31_t)0xb41605ce,
+  (q31_t)0x670b4444, (q31_t)0xb410f6d3, (q31_t)0x670789ee, (q31_t)0xb40be807, (q31_t)0x6703cf58, (q31_t)0xb406d969, (q31_t)0x67001483, (q31_t)0xb401cafb,
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+  (q31_t)0x66de77dc, (q31_t)0xb3d45157, (q31_t)0x66daba8c, (q31_t)0xb3cf44be, (q31_t)0x66d6fcfd, (q31_t)0xb3ca3854, (q31_t)0x66d33f2e, (q31_t)0xb3c52c19,
+  (q31_t)0x66cf8120, (q31_t)0xb3c0200c, (q31_t)0x66cbc2d2, (q31_t)0xb3bb142f, (q31_t)0x66c80445, (q31_t)0xb3b60881, (q31_t)0x66c44579, (q31_t)0xb3b0fd02,
+  (q31_t)0x66c0866d, (q31_t)0xb3abf1b2, (q31_t)0x66bcc721, (q31_t)0xb3a6e691, (q31_t)0x66b90797, (q31_t)0xb3a1dba0, (q31_t)0x66b547cd, (q31_t)0xb39cd0dd,
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+  (q31_t)0x66937e91, (q31_t)0xb36f784f, (q31_t)0x668fbc4e, (q31_t)0xb36a6f64, (q31_t)0x668bf9cb, (q31_t)0xb36566a8, (q31_t)0x66883709, (q31_t)0xb3605e1c,
+  (q31_t)0x66847408, (q31_t)0xb35b55bf, (q31_t)0x6680b0c8, (q31_t)0xb3564d91, (q31_t)0x667ced49, (q31_t)0xb3514592, (q31_t)0x6679298a, (q31_t)0xb34c3dc3,
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+  (q31_t)0x660b91af, (q31_t)0xb2baabde, (q31_t)0x6607c68c, (q31_t)0xb2b5a99f, (q31_t)0x6603fb2a, (q31_t)0xb2b0a790, (q31_t)0x66002f89, (q31_t)0xb2aba5b1,
+  (q31_t)0x65fc63a9, (q31_t)0xb2a6a402, (q31_t)0x65f8978b, (q31_t)0xb2a1a282, (q31_t)0x65f4cb2d, (q31_t)0xb29ca132, (q31_t)0x65f0fe91, (q31_t)0xb297a011,
+  (q31_t)0x65ed31b5, (q31_t)0xb2929f21, (q31_t)0x65e9649b, (q31_t)0xb28d9e60, (q31_t)0x65e59742, (q31_t)0xb2889dcf, (q31_t)0x65e1c9aa, (q31_t)0xb2839d6d,
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+  (q31_t)0x65cec204, (q31_t)0xb26a9e54, (q31_t)0x65caf2f3, (q31_t)0xb2659f12, (q31_t)0x65c723a3, (q31_t)0xb2609fff, (q31_t)0x65c35415, (q31_t)0xb25ba11d,
+  (q31_t)0x65bf8447, (q31_t)0xb256a26a, (q31_t)0x65bbb43b, (q31_t)0xb251a3e7, (q31_t)0x65b7e3f1, (q31_t)0xb24ca594, (q31_t)0x65b41367, (q31_t)0xb247a771,
+  (q31_t)0x65b0429f, (q31_t)0xb242a97e, (q31_t)0x65ac7198, (q31_t)0xb23dabbb, (q31_t)0x65a8a052, (q31_t)0xb238ae28, (q31_t)0x65a4cece, (q31_t)0xb233b0c5,
+  (q31_t)0x65a0fd0b, (q31_t)0xb22eb392, (q31_t)0x659d2b09, (q31_t)0xb229b68f, (q31_t)0x659958c9, (q31_t)0xb224b9bc, (q31_t)0x6595864a, (q31_t)0xb21fbd19,
+  (q31_t)0x6591b38c, (q31_t)0xb21ac0a6, (q31_t)0x658de08f, (q31_t)0xb215c463, (q31_t)0x658a0d54, (q31_t)0xb210c850, (q31_t)0x658639db, (q31_t)0xb20bcc6d,
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+  (q31_t)0x657314cf, (q31_t)0xb1f2e3d0, (q31_t)0x656f3fde, (q31_t)0xb1ede90e, (q31_t)0x656b6aae, (q31_t)0xb1e8ee7c, (q31_t)0x6567953f, (q31_t)0xb1e3f41a,
+  (q31_t)0x6563bf92, (q31_t)0xb1def9e9, (q31_t)0x655fe9a7, (q31_t)0xb1d9ffe7, (q31_t)0x655c137d, (q31_t)0xb1d50616, (q31_t)0x65583d14, (q31_t)0xb1d00c75,
+  (q31_t)0x6554666d, (q31_t)0xb1cb1304, (q31_t)0x65508f87, (q31_t)0xb1c619c3, (q31_t)0x654cb863, (q31_t)0xb1c120b3, (q31_t)0x6548e101, (q31_t)0xb1bc27d3,
+  (q31_t)0x6545095f, (q31_t)0xb1b72f23, (q31_t)0x65413180, (q31_t)0xb1b236a4, (q31_t)0x653d5962, (q31_t)0xb1ad3e55, (q31_t)0x65398105, (q31_t)0xb1a84636,
+  (q31_t)0x6535a86b, (q31_t)0xb1a34e47, (q31_t)0x6531cf91, (q31_t)0xb19e5689, (q31_t)0x652df679, (q31_t)0xb1995efb, (q31_t)0x652a1d23, (q31_t)0xb194679e,
+  (q31_t)0x6526438f, (q31_t)0xb18f7071, (q31_t)0x652269bc, (q31_t)0xb18a7974, (q31_t)0x651e8faa, (q31_t)0xb18582a8, (q31_t)0x651ab55b, (q31_t)0xb1808c0c,
+  (q31_t)0x6516dacd, (q31_t)0xb17b95a0, (q31_t)0x65130000, (q31_t)0xb1769f65, (q31_t)0x650f24f5, (q31_t)0xb171a95b, (q31_t)0x650b49ac, (q31_t)0xb16cb380,
+  (q31_t)0x65076e25, (q31_t)0xb167bdd7, (q31_t)0x6503925f, (q31_t)0xb162c85d, (q31_t)0x64ffb65b, (q31_t)0xb15dd315, (q31_t)0x64fbda18, (q31_t)0xb158ddfd,
+  (q31_t)0x64f7fd98, (q31_t)0xb153e915, (q31_t)0x64f420d9, (q31_t)0xb14ef45e, (q31_t)0x64f043dc, (q31_t)0xb149ffd7, (q31_t)0x64ec66a0, (q31_t)0xb1450b81,
+  (q31_t)0x64e88926, (q31_t)0xb140175b, (q31_t)0x64e4ab6e, (q31_t)0xb13b2367, (q31_t)0x64e0cd78, (q31_t)0xb1362fa2, (q31_t)0x64dcef44, (q31_t)0xb1313c0e,
+  (q31_t)0x64d910d1, (q31_t)0xb12c48ab, (q31_t)0x64d53220, (q31_t)0xb1275579, (q31_t)0x64d15331, (q31_t)0xb1226277, (q31_t)0x64cd7404, (q31_t)0xb11d6fa6,
+  (q31_t)0x64c99498, (q31_t)0xb1187d05, (q31_t)0x64c5b4ef, (q31_t)0xb1138a95, (q31_t)0x64c1d507, (q31_t)0xb10e9856, (q31_t)0x64bdf4e1, (q31_t)0xb109a648,
+  (q31_t)0x64ba147d, (q31_t)0xb104b46a, (q31_t)0x64b633da, (q31_t)0xb0ffc2bd, (q31_t)0x64b252fa, (q31_t)0xb0fad140, (q31_t)0x64ae71dc, (q31_t)0xb0f5dff5,
+  (q31_t)0x64aa907f, (q31_t)0xb0f0eeda, (q31_t)0x64a6aee4, (q31_t)0xb0ebfdf0, (q31_t)0x64a2cd0c, (q31_t)0xb0e70d37, (q31_t)0x649eeaf5, (q31_t)0xb0e21cae,
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+  (q31_t)0x5ff457ad, (q31_t)0xab48cb46, (q31_t)0x5ff02efe, (q31_t)0xab441593, (q31_t)0x5fec0613, (q31_t)0xab3f6015, (q31_t)0x5fe7dcee, (q31_t)0xab3aaacb,
+  (q31_t)0x5fe3b38d, (q31_t)0xab35f5b5, (q31_t)0x5fdf89f2, (q31_t)0xab3140d4, (q31_t)0x5fdb601b, (q31_t)0xab2c8c27, (q31_t)0x5fd73609, (q31_t)0xab27d7ae,
+  (q31_t)0x5fd30bbc, (q31_t)0xab23236a, (q31_t)0x5fcee133, (q31_t)0xab1e6f5a, (q31_t)0x5fcab670, (q31_t)0xab19bb7e, (q31_t)0x5fc68b72, (q31_t)0xab1507d7,
+  (q31_t)0x5fc26038, (q31_t)0xab105464, (q31_t)0x5fbe34c4, (q31_t)0xab0ba125, (q31_t)0x5fba0914, (q31_t)0xab06ee1b, (q31_t)0x5fb5dd29, (q31_t)0xab023b46,
+  (q31_t)0x5fb1b104, (q31_t)0xaafd88a4, (q31_t)0x5fad84a3, (q31_t)0xaaf8d637, (q31_t)0x5fa95807, (q31_t)0xaaf423ff, (q31_t)0x5fa52b31, (q31_t)0xaaef71fb,
+  (q31_t)0x5fa0fe1f, (q31_t)0xaaeac02c, (q31_t)0x5f9cd0d2, (q31_t)0xaae60e91, (q31_t)0x5f98a34a, (q31_t)0xaae15d2a, (q31_t)0x5f947588, (q31_t)0xaadcabf8,
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+  (q31_t)0x5f7f8d46, (q31_t)0xaac53912, (q31_t)0x5f7b5e22, (q31_t)0xaac0891c, (q31_t)0x5f772ec2, (q31_t)0xaabbd959, (q31_t)0x5f72ff28, (q31_t)0xaab729cc,
+  (q31_t)0x5f6ecf53, (q31_t)0xaab27a73, (q31_t)0x5f6a9f44, (q31_t)0xaaadcb4f, (q31_t)0x5f666ef9, (q31_t)0xaaa91c5f, (q31_t)0x5f623e73, (q31_t)0xaaa46da4,
+  (q31_t)0x5f5e0db3, (q31_t)0xaa9fbf1e, (q31_t)0x5f59dcb8, (q31_t)0xaa9b10cc, (q31_t)0x5f55ab82, (q31_t)0xaa9662af, (q31_t)0x5f517a11, (q31_t)0xaa91b4c7,
+  (q31_t)0x5f4d4865, (q31_t)0xaa8d0713, (q31_t)0x5f49167f, (q31_t)0xaa885994, (q31_t)0x5f44e45e, (q31_t)0xaa83ac4a, (q31_t)0x5f40b202, (q31_t)0xaa7eff34,
+  (q31_t)0x5f3c7f6b, (q31_t)0xaa7a5253, (q31_t)0x5f384c9a, (q31_t)0xaa75a5a8, (q31_t)0x5f34198e, (q31_t)0xaa70f930, (q31_t)0x5f2fe647, (q31_t)0xaa6c4cee,
+  (q31_t)0x5f2bb2c5, (q31_t)0xaa67a0e0, (q31_t)0x5f277f09, (q31_t)0xaa62f507, (q31_t)0x5f234b12, (q31_t)0xaa5e4963, (q31_t)0x5f1f16e0, (q31_t)0xaa599df4,
+  (q31_t)0x5f1ae274, (q31_t)0xaa54f2ba, (q31_t)0x5f16adcc, (q31_t)0xaa5047b4, (q31_t)0x5f1278eb, (q31_t)0xaa4b9ce3, (q31_t)0x5f0e43ce, (q31_t)0xaa46f248,
+  (q31_t)0x5f0a0e77, (q31_t)0xaa4247e1, (q31_t)0x5f05d8e6, (q31_t)0xaa3d9daf, (q31_t)0x5f01a31a, (q31_t)0xaa38f3b1, (q31_t)0x5efd6d13, (q31_t)0xaa3449e9,
+  (q31_t)0x5ef936d1, (q31_t)0xaa2fa056, (q31_t)0x5ef50055, (q31_t)0xaa2af6f7, (q31_t)0x5ef0c99f, (q31_t)0xaa264dce, (q31_t)0x5eec92ae, (q31_t)0xaa21a4d9,
+  (q31_t)0x5ee85b82, (q31_t)0xaa1cfc1a, (q31_t)0x5ee4241c, (q31_t)0xaa18538f, (q31_t)0x5edfec7b, (q31_t)0xaa13ab3a, (q31_t)0x5edbb49f, (q31_t)0xaa0f0319,
+  (q31_t)0x5ed77c8a, (q31_t)0xaa0a5b2e, (q31_t)0x5ed34439, (q31_t)0xaa05b377, (q31_t)0x5ecf0baf, (q31_t)0xaa010bf6, (q31_t)0x5ecad2e9, (q31_t)0xa9fc64a9,
+  (q31_t)0x5ec699e9, (q31_t)0xa9f7bd92, (q31_t)0x5ec260af, (q31_t)0xa9f316b0, (q31_t)0x5ebe273b, (q31_t)0xa9ee7002, (q31_t)0x5eb9ed8b, (q31_t)0xa9e9c98a,
+  (q31_t)0x5eb5b3a2, (q31_t)0xa9e52347, (q31_t)0x5eb1797e, (q31_t)0xa9e07d39, (q31_t)0x5ead3f1f, (q31_t)0xa9dbd761, (q31_t)0x5ea90487, (q31_t)0xa9d731bd,
+  (q31_t)0x5ea4c9b3, (q31_t)0xa9d28c4e, (q31_t)0x5ea08ea6, (q31_t)0xa9cde715, (q31_t)0x5e9c535e, (q31_t)0xa9c94211, (q31_t)0x5e9817dc, (q31_t)0xa9c49d42,
+  (q31_t)0x5e93dc1f, (q31_t)0xa9bff8a8, (q31_t)0x5e8fa028, (q31_t)0xa9bb5444, (q31_t)0x5e8b63f7, (q31_t)0xa9b6b014, (q31_t)0x5e87278b, (q31_t)0xa9b20c1a,
+  (q31_t)0x5e82eae5, (q31_t)0xa9ad6855, (q31_t)0x5e7eae05, (q31_t)0xa9a8c4c5, (q31_t)0x5e7a70ea, (q31_t)0xa9a4216b, (q31_t)0x5e763395, (q31_t)0xa99f7e46,
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+  (q31_t)0x5e60fd84, (q31_t)0xa98851ac, (q31_t)0x5e5cbed1, (q31_t)0xa983afc6, (q31_t)0x5e587fe5, (q31_t)0xa97f0e16, (q31_t)0x5e5440be, (q31_t)0xa97a6c9c,
+  (q31_t)0x5e50015d, (q31_t)0xa975cb57, (q31_t)0x5e4bc1c2, (q31_t)0xa9712a47, (q31_t)0x5e4781ed, (q31_t)0xa96c896c, (q31_t)0x5e4341de, (q31_t)0xa967e8c7,
+  (q31_t)0x5e3f0194, (q31_t)0xa9634858, (q31_t)0x5e3ac110, (q31_t)0xa95ea81d, (q31_t)0x5e368053, (q31_t)0xa95a0819, (q31_t)0x5e323f5b, (q31_t)0xa9556849,
+  (q31_t)0x5e2dfe29, (q31_t)0xa950c8b0, (q31_t)0x5e29bcbd, (q31_t)0xa94c294b, (q31_t)0x5e257b17, (q31_t)0xa9478a1c, (q31_t)0x5e213936, (q31_t)0xa942eb23,
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+  (q31_t)0x5de9cc33, (q31_t)0xa906eb82, (q31_t)0x5de58727, (q31_t)0xa9024f76, (q31_t)0x5de141e1, (q31_t)0xa8fdb3a1, (q31_t)0x5ddcfc61, (q31_t)0xa8f91801,
+  (q31_t)0x5dd8b6a7, (q31_t)0xa8f47c97, (q31_t)0x5dd470b3, (q31_t)0xa8efe162, (q31_t)0x5dd02a85, (q31_t)0xa8eb4663, (q31_t)0x5dcbe41d, (q31_t)0xa8e6ab9a,
+  (q31_t)0x5dc79d7c, (q31_t)0xa8e21106, (q31_t)0x5dc356a1, (q31_t)0xa8dd76a9, (q31_t)0x5dbf0f8c, (q31_t)0xa8d8dc81, (q31_t)0x5dbac83d, (q31_t)0xa8d4428f,
+  (q31_t)0x5db680b4, (q31_t)0xa8cfa8d2, (q31_t)0x5db238f1, (q31_t)0xa8cb0f4b, (q31_t)0x5dadf0f5, (q31_t)0xa8c675fb, (q31_t)0x5da9a8bf, (q31_t)0xa8c1dce0,
+  (q31_t)0x5da5604f, (q31_t)0xa8bd43fa, (q31_t)0x5da117a5, (q31_t)0xa8b8ab4b, (q31_t)0x5d9ccec2, (q31_t)0xa8b412d1, (q31_t)0x5d9885a5, (q31_t)0xa8af7a8e,
+  (q31_t)0x5d943c4e, (q31_t)0xa8aae280, (q31_t)0x5d8ff2bd, (q31_t)0xa8a64aa8, (q31_t)0x5d8ba8f3, (q31_t)0xa8a1b306, (q31_t)0x5d875eef, (q31_t)0xa89d1b99,
+  (q31_t)0x5d8314b1, (q31_t)0xa8988463, (q31_t)0x5d7eca39, (q31_t)0xa893ed63, (q31_t)0x5d7a7f88, (q31_t)0xa88f5698, (q31_t)0x5d76349d, (q31_t)0xa88ac004,
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+  (q31_t)0x5d60baa7, (q31_t)0xa873d246, (q31_t)0x5d5c6e62, (q31_t)0xa86f3cf6, (q31_t)0x5d5821e4, (q31_t)0xa86aa7db, (q31_t)0x5d53d52d, (q31_t)0xa86612f6,
+  (q31_t)0x5d4f883b, (q31_t)0xa8617e48, (q31_t)0x5d4b3b10, (q31_t)0xa85ce9cf, (q31_t)0x5d46edac, (q31_t)0xa858558d, (q31_t)0x5d42a00e, (q31_t)0xa853c180,
+  (q31_t)0x5d3e5237, (q31_t)0xa84f2daa, (q31_t)0x5d3a0426, (q31_t)0xa84a9a0a, (q31_t)0x5d35b5db, (q31_t)0xa84606a0, (q31_t)0x5d316757, (q31_t)0xa841736c,
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+  (q31_t)0x5d1bdb65, (q31_t)0xa82a9693, (q31_t)0x5d178b89, (q31_t)0xa82604a4, (q31_t)0x5d133b72, (q31_t)0xa82172eb, (q31_t)0x5d0eeb23, (q31_t)0xa81ce169,
+  (q31_t)0x5d0a9a9a, (q31_t)0xa818501c, (q31_t)0x5d0649d7, (q31_t)0xa813bf06, (q31_t)0x5d01f8dc, (q31_t)0xa80f2e26, (q31_t)0x5cfda7a7, (q31_t)0xa80a9d7c,
+  (q31_t)0x5cf95638, (q31_t)0xa8060d08, (q31_t)0x5cf50490, (q31_t)0xa8017ccb, (q31_t)0x5cf0b2af, (q31_t)0xa7fcecc4, (q31_t)0x5cec6095, (q31_t)0xa7f85cf3,
+  (q31_t)0x5ce80e41, (q31_t)0xa7f3cd59, (q31_t)0x5ce3bbb4, (q31_t)0xa7ef3df5, (q31_t)0x5cdf68ed, (q31_t)0xa7eaaec7, (q31_t)0x5cdb15ed, (q31_t)0xa7e61fd0,
+  (q31_t)0x5cd6c2b5, (q31_t)0xa7e1910f, (q31_t)0x5cd26f42, (q31_t)0xa7dd0284, (q31_t)0x5cce1b97, (q31_t)0xa7d8742f, (q31_t)0x5cc9c7b2, (q31_t)0xa7d3e611,
+  (q31_t)0x5cc57394, (q31_t)0xa7cf582a, (q31_t)0x5cc11f3d, (q31_t)0xa7caca79, (q31_t)0x5cbccaac, (q31_t)0xa7c63cfe, (q31_t)0x5cb875e3, (q31_t)0xa7c1afb9,
+  (q31_t)0x5cb420e0, (q31_t)0xa7bd22ac, (q31_t)0x5cafcba4, (q31_t)0xa7b895d4, (q31_t)0x5cab762f, (q31_t)0xa7b40933, (q31_t)0x5ca72080, (q31_t)0xa7af7cc8,
+  (q31_t)0x5ca2ca99, (q31_t)0xa7aaf094, (q31_t)0x5c9e7478, (q31_t)0xa7a66497, (q31_t)0x5c9a1e1e, (q31_t)0xa7a1d8d0, (q31_t)0x5c95c78b, (q31_t)0xa79d4d3f,
+  (q31_t)0x5c9170bf, (q31_t)0xa798c1e5, (q31_t)0x5c8d19ba, (q31_t)0xa79436c1, (q31_t)0x5c88c27c, (q31_t)0xa78fabd4, (q31_t)0x5c846b05, (q31_t)0xa78b211e,
+  (q31_t)0x5c801354, (q31_t)0xa786969e, (q31_t)0x5c7bbb6b, (q31_t)0xa7820c55, (q31_t)0x5c776348, (q31_t)0xa77d8242, (q31_t)0x5c730aed, (q31_t)0xa778f866,
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+  (q31_t)0x5c5d4dcc, (q31_t)0xa7624a4d, (q31_t)0x5c58f41a, (q31_t)0xa75dc1b8, (q31_t)0x5c549a30, (q31_t)0xa759395b, (q31_t)0x5c50400d, (q31_t)0xa754b134,
+  (q31_t)0x5c4be5b0, (q31_t)0xa7502943, (q31_t)0x5c478b1b, (q31_t)0xa74ba18a, (q31_t)0x5c43304d, (q31_t)0xa7471a07, (q31_t)0x5c3ed545, (q31_t)0xa74292bb,
+  (q31_t)0x5c3a7a05, (q31_t)0xa73e0ba5, (q31_t)0x5c361e8c, (q31_t)0xa73984c7, (q31_t)0x5c31c2db, (q31_t)0xa734fe1f, (q31_t)0x5c2d66f0, (q31_t)0xa73077ae,
+  (q31_t)0x5c290acc, (q31_t)0xa72bf174, (q31_t)0x5c24ae70, (q31_t)0xa7276b70, (q31_t)0x5c2051db, (q31_t)0xa722e5a3, (q31_t)0x5c1bf50d, (q31_t)0xa71e600d,
+  (q31_t)0x5c179806, (q31_t)0xa719daae, (q31_t)0x5c133ac6, (q31_t)0xa7155586, (q31_t)0x5c0edd4e, (q31_t)0xa710d095, (q31_t)0x5c0a7f9c, (q31_t)0xa70c4bda,
+  (q31_t)0x5c0621b2, (q31_t)0xa707c757, (q31_t)0x5c01c38f, (q31_t)0xa703430a, (q31_t)0x5bfd6534, (q31_t)0xa6febef4, (q31_t)0x5bf906a0, (q31_t)0xa6fa3b15,
+  (q31_t)0x5bf4a7d2, (q31_t)0xa6f5b76d, (q31_t)0x5bf048cd, (q31_t)0xa6f133fc, (q31_t)0x5bebe98e, (q31_t)0xa6ecb0c2, (q31_t)0x5be78a17, (q31_t)0xa6e82dbe,
+  (q31_t)0x5be32a67, (q31_t)0xa6e3aaf2, (q31_t)0x5bdeca7f, (q31_t)0xa6df285d, (q31_t)0x5bda6a5d, (q31_t)0xa6daa5fe, (q31_t)0x5bd60a03, (q31_t)0xa6d623d7,
+  (q31_t)0x5bd1a971, (q31_t)0xa6d1a1e7, (q31_t)0x5bcd48a6, (q31_t)0xa6cd202d, (q31_t)0x5bc8e7a2, (q31_t)0xa6c89eab, (q31_t)0x5bc48666, (q31_t)0xa6c41d60,
+  (q31_t)0x5bc024f0, (q31_t)0xa6bf9c4b, (q31_t)0x5bbbc343, (q31_t)0xa6bb1b6e, (q31_t)0x5bb7615d, (q31_t)0xa6b69ac8, (q31_t)0x5bb2ff3e, (q31_t)0xa6b21a59,
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+  (q31_t)0x5194c910, (q31_t)0x9d5de656, (q31_t)0x518ff180, (q31_t)0x9d59e546, (q31_t)0x518b19bf, (q31_t)0x9d55e473, (q31_t)0x518641cb, (q31_t)0x9d51e3dd,
+  (q31_t)0x518169a5, (q31_t)0x9d4de385, (q31_t)0x517c914c, (q31_t)0x9d49e368, (q31_t)0x5177b8c2, (q31_t)0x9d45e389, (q31_t)0x5172e005, (q31_t)0x9d41e3e7,
+  (q31_t)0x516e0715, (q31_t)0x9d3de482, (q31_t)0x51692df4, (q31_t)0x9d39e559, (q31_t)0x516454a0, (q31_t)0x9d35e66e, (q31_t)0x515f7b1a, (q31_t)0x9d31e7bf,
+  (q31_t)0x515aa162, (q31_t)0x9d2de94d, (q31_t)0x5155c778, (q31_t)0x9d29eb19, (q31_t)0x5150ed5c, (q31_t)0x9d25ed21, (q31_t)0x514c130d, (q31_t)0x9d21ef66,
+  (q31_t)0x5147388c, (q31_t)0x9d1df1e9, (q31_t)0x51425dd9, (q31_t)0x9d19f4a8, (q31_t)0x513d82f4, (q31_t)0x9d15f7a4, (q31_t)0x5138a7dd, (q31_t)0x9d11fadd,
+  (q31_t)0x5133cc94, (q31_t)0x9d0dfe54, (q31_t)0x512ef119, (q31_t)0x9d0a0207, (q31_t)0x512a156b, (q31_t)0x9d0605f7, (q31_t)0x5125398c, (q31_t)0x9d020a25,
+  (q31_t)0x51205d7b, (q31_t)0x9cfe0e8f, (q31_t)0x511b8137, (q31_t)0x9cfa1337, (q31_t)0x5116a4c1, (q31_t)0x9cf6181c, (q31_t)0x5111c81a, (q31_t)0x9cf21d3d,
+  (q31_t)0x510ceb40, (q31_t)0x9cee229c, (q31_t)0x51080e35, (q31_t)0x9cea2838, (q31_t)0x510330f7, (q31_t)0x9ce62e11, (q31_t)0x50fe5388, (q31_t)0x9ce23427,
+  (q31_t)0x50f975e6, (q31_t)0x9cde3a7b, (q31_t)0x50f49813, (q31_t)0x9cda410b, (q31_t)0x50efba0d, (q31_t)0x9cd647d9, (q31_t)0x50eadbd6, (q31_t)0x9cd24ee4,
+  (q31_t)0x50e5fd6d, (q31_t)0x9cce562c, (q31_t)0x50e11ed2, (q31_t)0x9cca5db1, (q31_t)0x50dc4005, (q31_t)0x9cc66573, (q31_t)0x50d76106, (q31_t)0x9cc26d73,
+  (q31_t)0x50d281d5, (q31_t)0x9cbe75b0, (q31_t)0x50cda272, (q31_t)0x9cba7e2a, (q31_t)0x50c8c2de, (q31_t)0x9cb686e1, (q31_t)0x50c3e317, (q31_t)0x9cb28fd5,
+  (q31_t)0x50bf031f, (q31_t)0x9cae9907, (q31_t)0x50ba22f5, (q31_t)0x9caaa276, (q31_t)0x50b5429a, (q31_t)0x9ca6ac23, (q31_t)0x50b0620c, (q31_t)0x9ca2b60c,
+  (q31_t)0x50ab814d, (q31_t)0x9c9ec033, (q31_t)0x50a6a05c, (q31_t)0x9c9aca97, (q31_t)0x50a1bf39, (q31_t)0x9c96d539, (q31_t)0x509cdde4, (q31_t)0x9c92e017,
+  (q31_t)0x5097fc5e, (q31_t)0x9c8eeb34, (q31_t)0x50931aa6, (q31_t)0x9c8af68d, (q31_t)0x508e38bd, (q31_t)0x9c870224, (q31_t)0x508956a1, (q31_t)0x9c830df8,
+  (q31_t)0x50847454, (q31_t)0x9c7f1a0a, (q31_t)0x507f91d5, (q31_t)0x9c7b2659, (q31_t)0x507aaf25, (q31_t)0x9c7732e5, (q31_t)0x5075cc43, (q31_t)0x9c733faf,
+  (q31_t)0x5070e92f, (q31_t)0x9c6f4cb6, (q31_t)0x506c05ea, (q31_t)0x9c6b59fa, (q31_t)0x50672273, (q31_t)0x9c67677c, (q31_t)0x50623ecb, (q31_t)0x9c63753c,
+  (q31_t)0x505d5af1, (q31_t)0x9c5f8339, (q31_t)0x505876e5, (q31_t)0x9c5b9173, (q31_t)0x505392a8, (q31_t)0x9c579feb, (q31_t)0x504eae39, (q31_t)0x9c53aea0,
+  (q31_t)0x5049c999, (q31_t)0x9c4fbd93, (q31_t)0x5044e4c7, (q31_t)0x9c4bccc3, (q31_t)0x503fffc4, (q31_t)0x9c47dc31, (q31_t)0x503b1a8f, (q31_t)0x9c43ebdc,
+  (q31_t)0x50363529, (q31_t)0x9c3ffbc5, (q31_t)0x50314f91, (q31_t)0x9c3c0beb, (q31_t)0x502c69c8, (q31_t)0x9c381c4f, (q31_t)0x502783cd, (q31_t)0x9c342cf0,
+  (q31_t)0x50229da1, (q31_t)0x9c303dcf, (q31_t)0x501db743, (q31_t)0x9c2c4eec, (q31_t)0x5018d0b4, (q31_t)0x9c286046, (q31_t)0x5013e9f4, (q31_t)0x9c2471de,
+  (q31_t)0x500f0302, (q31_t)0x9c2083b3, (q31_t)0x500a1bdf, (q31_t)0x9c1c95c6, (q31_t)0x5005348a, (q31_t)0x9c18a816, (q31_t)0x50004d04, (q31_t)0x9c14baa4,
+  (q31_t)0x4ffb654d, (q31_t)0x9c10cd70, (q31_t)0x4ff67d64, (q31_t)0x9c0ce07a, (q31_t)0x4ff1954b, (q31_t)0x9c08f3c1, (q31_t)0x4fecacff, (q31_t)0x9c050745,
+  (q31_t)0x4fe7c483, (q31_t)0x9c011b08, (q31_t)0x4fe2dbd5, (q31_t)0x9bfd2f08, (q31_t)0x4fddf2f6, (q31_t)0x9bf94346, (q31_t)0x4fd909e5, (q31_t)0x9bf557c1,
+  (q31_t)0x4fd420a4, (q31_t)0x9bf16c7a, (q31_t)0x4fcf3731, (q31_t)0x9bed8171, (q31_t)0x4fca4d8d, (q31_t)0x9be996a6, (q31_t)0x4fc563b7, (q31_t)0x9be5ac18,
+  (q31_t)0x4fc079b1, (q31_t)0x9be1c1c8, (q31_t)0x4fbb8f79, (q31_t)0x9bddd7b6, (q31_t)0x4fb6a510, (q31_t)0x9bd9ede2, (q31_t)0x4fb1ba76, (q31_t)0x9bd6044b,
+  (q31_t)0x4faccfab, (q31_t)0x9bd21af3, (q31_t)0x4fa7e4af, (q31_t)0x9bce31d8, (q31_t)0x4fa2f981, (q31_t)0x9bca48fa, (q31_t)0x4f9e0e22, (q31_t)0x9bc6605b,
+  (q31_t)0x4f992293, (q31_t)0x9bc277fa, (q31_t)0x4f9436d2, (q31_t)0x9bbe8fd6, (q31_t)0x4f8f4ae0, (q31_t)0x9bbaa7f0, (q31_t)0x4f8a5ebd, (q31_t)0x9bb6c048,
+  (q31_t)0x4f857269, (q31_t)0x9bb2d8de, (q31_t)0x4f8085e4, (q31_t)0x9baef1b2, (q31_t)0x4f7b992d, (q31_t)0x9bab0ac3, (q31_t)0x4f76ac46, (q31_t)0x9ba72413,
+  (q31_t)0x4f71bf2e, (q31_t)0x9ba33da0, (q31_t)0x4f6cd1e5, (q31_t)0x9b9f576b, (q31_t)0x4f67e46a, (q31_t)0x9b9b7174, (q31_t)0x4f62f6bf, (q31_t)0x9b978bbc,
+  (q31_t)0x4f5e08e3, (q31_t)0x9b93a641, (q31_t)0x4f591ad6, (q31_t)0x9b8fc104, (q31_t)0x4f542c98, (q31_t)0x9b8bdc05, (q31_t)0x4f4f3e29, (q31_t)0x9b87f744,
+  (q31_t)0x4f4a4f89, (q31_t)0x9b8412c1, (q31_t)0x4f4560b8, (q31_t)0x9b802e7b, (q31_t)0x4f4071b6, (q31_t)0x9b7c4a74, (q31_t)0x4f3b8284, (q31_t)0x9b7866ab,
+  (q31_t)0x4f369320, (q31_t)0x9b748320, (q31_t)0x4f31a38c, (q31_t)0x9b709fd3, (q31_t)0x4f2cb3c7, (q31_t)0x9b6cbcc4, (q31_t)0x4f27c3d1, (q31_t)0x9b68d9f3,
+  (q31_t)0x4f22d3aa, (q31_t)0x9b64f760, (q31_t)0x4f1de352, (q31_t)0x9b61150b, (q31_t)0x4f18f2c9, (q31_t)0x9b5d32f4, (q31_t)0x4f140210, (q31_t)0x9b59511c,
+  (q31_t)0x4f0f1126, (q31_t)0x9b556f81, (q31_t)0x4f0a200b, (q31_t)0x9b518e24, (q31_t)0x4f052ec0, (q31_t)0x9b4dad06, (q31_t)0x4f003d43, (q31_t)0x9b49cc26,
+  (q31_t)0x4efb4b96, (q31_t)0x9b45eb83, (q31_t)0x4ef659b8, (q31_t)0x9b420b1f, (q31_t)0x4ef167aa, (q31_t)0x9b3e2af9, (q31_t)0x4eec756b, (q31_t)0x9b3a4b11,
+  (q31_t)0x4ee782fb, (q31_t)0x9b366b68, (q31_t)0x4ee2905a, (q31_t)0x9b328bfc, (q31_t)0x4edd9d89, (q31_t)0x9b2eaccf, (q31_t)0x4ed8aa87, (q31_t)0x9b2acde0,
+  (q31_t)0x4ed3b755, (q31_t)0x9b26ef2f, (q31_t)0x4ecec3f2, (q31_t)0x9b2310bc, (q31_t)0x4ec9d05e, (q31_t)0x9b1f3288, (q31_t)0x4ec4dc99, (q31_t)0x9b1b5492,
+  (q31_t)0x4ebfe8a5, (q31_t)0x9b1776da, (q31_t)0x4ebaf47f, (q31_t)0x9b139960, (q31_t)0x4eb60029, (q31_t)0x9b0fbc24, (q31_t)0x4eb10ba2, (q31_t)0x9b0bdf27,
+  (q31_t)0x4eac16eb, (q31_t)0x9b080268, (q31_t)0x4ea72203, (q31_t)0x9b0425e8, (q31_t)0x4ea22ceb, (q31_t)0x9b0049a5, (q31_t)0x4e9d37a3, (q31_t)0x9afc6da1,
+  (q31_t)0x4e984229, (q31_t)0x9af891db, (q31_t)0x4e934c80, (q31_t)0x9af4b654, (q31_t)0x4e8e56a5, (q31_t)0x9af0db0b, (q31_t)0x4e89609b, (q31_t)0x9aed0000,
+  (q31_t)0x4e846a60, (q31_t)0x9ae92533, (q31_t)0x4e7f73f4, (q31_t)0x9ae54aa5, (q31_t)0x4e7a7d58, (q31_t)0x9ae17056, (q31_t)0x4e75868c, (q31_t)0x9add9644,
+  (q31_t)0x4e708f8f, (q31_t)0x9ad9bc71, (q31_t)0x4e6b9862, (q31_t)0x9ad5e2dd, (q31_t)0x4e66a105, (q31_t)0x9ad20987, (q31_t)0x4e61a977, (q31_t)0x9ace306f,
+  (q31_t)0x4e5cb1b9, (q31_t)0x9aca5795, (q31_t)0x4e57b9ca, (q31_t)0x9ac67efb, (q31_t)0x4e52c1ab, (q31_t)0x9ac2a69e, (q31_t)0x4e4dc95c, (q31_t)0x9abece80,
+  (q31_t)0x4e48d0dd, (q31_t)0x9abaf6a1, (q31_t)0x4e43d82d, (q31_t)0x9ab71eff, (q31_t)0x4e3edf4d, (q31_t)0x9ab3479d, (q31_t)0x4e39e63d, (q31_t)0x9aaf7079,
+  (q31_t)0x4e34ecfc, (q31_t)0x9aab9993, (q31_t)0x4e2ff38b, (q31_t)0x9aa7c2ec, (q31_t)0x4e2af9ea, (q31_t)0x9aa3ec83, (q31_t)0x4e260019, (q31_t)0x9aa01659,
+  (q31_t)0x4e210617, (q31_t)0x9a9c406e, (q31_t)0x4e1c0be6, (q31_t)0x9a986ac1, (q31_t)0x4e171184, (q31_t)0x9a949552, (q31_t)0x4e1216f2, (q31_t)0x9a90c022,
+  (q31_t)0x4e0d1c30, (q31_t)0x9a8ceb31, (q31_t)0x4e08213e, (q31_t)0x9a89167e, (q31_t)0x4e03261b, (q31_t)0x9a85420a, (q31_t)0x4dfe2ac9, (q31_t)0x9a816dd5,
+  (q31_t)0x4df92f46, (q31_t)0x9a7d99de, (q31_t)0x4df43393, (q31_t)0x9a79c625, (q31_t)0x4def37b0, (q31_t)0x9a75f2ac, (q31_t)0x4dea3b9d, (q31_t)0x9a721f71,
+  (q31_t)0x4de53f5a, (q31_t)0x9a6e4c74, (q31_t)0x4de042e7, (q31_t)0x9a6a79b6, (q31_t)0x4ddb4644, (q31_t)0x9a66a737, (q31_t)0x4dd64971, (q31_t)0x9a62d4f7,
+  (q31_t)0x4dd14c6e, (q31_t)0x9a5f02f5, (q31_t)0x4dcc4f3b, (q31_t)0x9a5b3132, (q31_t)0x4dc751d8, (q31_t)0x9a575fae, (q31_t)0x4dc25445, (q31_t)0x9a538e68,
+  (q31_t)0x4dbd5682, (q31_t)0x9a4fbd61, (q31_t)0x4db8588f, (q31_t)0x9a4bec99, (q31_t)0x4db35a6c, (q31_t)0x9a481c0f, (q31_t)0x4dae5c19, (q31_t)0x9a444bc5,
+  (q31_t)0x4da95d96, (q31_t)0x9a407bb9, (q31_t)0x4da45ee3, (q31_t)0x9a3cabeb, (q31_t)0x4d9f6001, (q31_t)0x9a38dc5d, (q31_t)0x4d9a60ee, (q31_t)0x9a350d0d,
+  (q31_t)0x4d9561ac, (q31_t)0x9a313dfc, (q31_t)0x4d90623a, (q31_t)0x9a2d6f2a, (q31_t)0x4d8b6298, (q31_t)0x9a29a097, (q31_t)0x4d8662c6, (q31_t)0x9a25d243,
+  (q31_t)0x4d8162c4, (q31_t)0x9a22042d, (q31_t)0x4d7c6293, (q31_t)0x9a1e3656, (q31_t)0x4d776231, (q31_t)0x9a1a68be, (q31_t)0x4d7261a0, (q31_t)0x9a169b65,
+  (q31_t)0x4d6d60df, (q31_t)0x9a12ce4b, (q31_t)0x4d685fef, (q31_t)0x9a0f016f, (q31_t)0x4d635ece, (q31_t)0x9a0b34d3, (q31_t)0x4d5e5d7e, (q31_t)0x9a076875,
+  (q31_t)0x4d595bfe, (q31_t)0x9a039c57, (q31_t)0x4d545a4f, (q31_t)0x99ffd077, (q31_t)0x4d4f5870, (q31_t)0x99fc04d6, (q31_t)0x4d4a5661, (q31_t)0x99f83974,
+  (q31_t)0x4d455422, (q31_t)0x99f46e51, (q31_t)0x4d4051b4, (q31_t)0x99f0a36d, (q31_t)0x4d3b4f16, (q31_t)0x99ecd8c8, (q31_t)0x4d364c48, (q31_t)0x99e90e62,
+  (q31_t)0x4d31494b, (q31_t)0x99e5443b, (q31_t)0x4d2c461e, (q31_t)0x99e17a53, (q31_t)0x4d2742c2, (q31_t)0x99ddb0aa, (q31_t)0x4d223f36, (q31_t)0x99d9e73f,
+  (q31_t)0x4d1d3b7a, (q31_t)0x99d61e14, (q31_t)0x4d18378f, (q31_t)0x99d25528, (q31_t)0x4d133374, (q31_t)0x99ce8c7b, (q31_t)0x4d0e2f2a, (q31_t)0x99cac40d,
+  (q31_t)0x4d092ab0, (q31_t)0x99c6fbde, (q31_t)0x4d042607, (q31_t)0x99c333ee, (q31_t)0x4cff212e, (q31_t)0x99bf6c3d, (q31_t)0x4cfa1c26, (q31_t)0x99bba4cb,
+  (q31_t)0x4cf516ee, (q31_t)0x99b7dd99, (q31_t)0x4cf01187, (q31_t)0x99b416a5, (q31_t)0x4ceb0bf0, (q31_t)0x99b04ff0, (q31_t)0x4ce6062a, (q31_t)0x99ac897b,
+  (q31_t)0x4ce10034, (q31_t)0x99a8c345, (q31_t)0x4cdbfa0f, (q31_t)0x99a4fd4d, (q31_t)0x4cd6f3bb, (q31_t)0x99a13795, (q31_t)0x4cd1ed37, (q31_t)0x999d721c,
+  (q31_t)0x4ccce684, (q31_t)0x9999ace3, (q31_t)0x4cc7dfa1, (q31_t)0x9995e7e8, (q31_t)0x4cc2d88f, (q31_t)0x9992232d, (q31_t)0x4cbdd14e, (q31_t)0x998e5eb1,
+  (q31_t)0x4cb8c9dd, (q31_t)0x998a9a74, (q31_t)0x4cb3c23d, (q31_t)0x9986d676, (q31_t)0x4caeba6e, (q31_t)0x998312b7, (q31_t)0x4ca9b26f, (q31_t)0x997f4f38,
+  (q31_t)0x4ca4aa41, (q31_t)0x997b8bf8, (q31_t)0x4c9fa1e4, (q31_t)0x9977c8f7, (q31_t)0x4c9a9958, (q31_t)0x99740635, (q31_t)0x4c95909c, (q31_t)0x997043b2,
+  (q31_t)0x4c9087b1, (q31_t)0x996c816f, (q31_t)0x4c8b7e97, (q31_t)0x9968bf6b, (q31_t)0x4c86754e, (q31_t)0x9964fda7, (q31_t)0x4c816bd5, (q31_t)0x99613c22,
+  (q31_t)0x4c7c622d, (q31_t)0x995d7adc, (q31_t)0x4c775856, (q31_t)0x9959b9d5, (q31_t)0x4c724e50, (q31_t)0x9955f90d, (q31_t)0x4c6d441b, (q31_t)0x99523885,
+  (q31_t)0x4c6839b7, (q31_t)0x994e783d, (q31_t)0x4c632f23, (q31_t)0x994ab833, (q31_t)0x4c5e2460, (q31_t)0x9946f869, (q31_t)0x4c59196f, (q31_t)0x994338df,
+  (q31_t)0x4c540e4e, (q31_t)0x993f7993, (q31_t)0x4c4f02fe, (q31_t)0x993bba87, (q31_t)0x4c49f77f, (q31_t)0x9937fbbb, (q31_t)0x4c44ebd1, (q31_t)0x99343d2e,
+  (q31_t)0x4c3fdff4, (q31_t)0x99307ee0, (q31_t)0x4c3ad3e7, (q31_t)0x992cc0d2, (q31_t)0x4c35c7ac, (q31_t)0x99290303, (q31_t)0x4c30bb42, (q31_t)0x99254574,
+  (q31_t)0x4c2baea9, (q31_t)0x99218824, (q31_t)0x4c26a1e1, (q31_t)0x991dcb13, (q31_t)0x4c2194e9, (q31_t)0x991a0e42, (q31_t)0x4c1c87c3, (q31_t)0x991651b1,
+  (q31_t)0x4c177a6e, (q31_t)0x9912955f, (q31_t)0x4c126cea, (q31_t)0x990ed94c, (q31_t)0x4c0d5f37, (q31_t)0x990b1d79, (q31_t)0x4c085156, (q31_t)0x990761e5,
+  (q31_t)0x4c034345, (q31_t)0x9903a691, (q31_t)0x4bfe3505, (q31_t)0x98ffeb7d, (q31_t)0x4bf92697, (q31_t)0x98fc30a8, (q31_t)0x4bf417f9, (q31_t)0x98f87612,
+  (q31_t)0x4bef092d, (q31_t)0x98f4bbbc, (q31_t)0x4be9fa32, (q31_t)0x98f101a6, (q31_t)0x4be4eb08, (q31_t)0x98ed47cf, (q31_t)0x4bdfdbaf, (q31_t)0x98e98e38,
+  (q31_t)0x4bdacc28, (q31_t)0x98e5d4e0, (q31_t)0x4bd5bc72, (q31_t)0x98e21bc8, (q31_t)0x4bd0ac8d, (q31_t)0x98de62f0, (q31_t)0x4bcb9c79, (q31_t)0x98daaa57,
+  (q31_t)0x4bc68c36, (q31_t)0x98d6f1fe, (q31_t)0x4bc17bc5, (q31_t)0x98d339e4, (q31_t)0x4bbc6b25, (q31_t)0x98cf820b, (q31_t)0x4bb75a56, (q31_t)0x98cbca70,
+  (q31_t)0x4bb24958, (q31_t)0x98c81316, (q31_t)0x4bad382c, (q31_t)0x98c45bfb, (q31_t)0x4ba826d1, (q31_t)0x98c0a520, (q31_t)0x4ba31548, (q31_t)0x98bcee84,
+  (q31_t)0x4b9e0390, (q31_t)0x98b93828, (q31_t)0x4b98f1a9, (q31_t)0x98b5820c, (q31_t)0x4b93df93, (q31_t)0x98b1cc30, (q31_t)0x4b8ecd4f, (q31_t)0x98ae1693,
+  (q31_t)0x4b89badd, (q31_t)0x98aa6136, (q31_t)0x4b84a83b, (q31_t)0x98a6ac19, (q31_t)0x4b7f956b, (q31_t)0x98a2f73c, (q31_t)0x4b7a826d, (q31_t)0x989f429e,
+  (q31_t)0x4b756f40, (q31_t)0x989b8e40, (q31_t)0x4b705be4, (q31_t)0x9897da22, (q31_t)0x4b6b485a, (q31_t)0x98942643, (q31_t)0x4b6634a2, (q31_t)0x989072a5,
+  (q31_t)0x4b6120bb, (q31_t)0x988cbf46, (q31_t)0x4b5c0ca5, (q31_t)0x98890c27, (q31_t)0x4b56f861, (q31_t)0x98855948, (q31_t)0x4b51e3ee, (q31_t)0x9881a6a9,
+  (q31_t)0x4b4ccf4d, (q31_t)0x987df449, (q31_t)0x4b47ba7e, (q31_t)0x987a422a, (q31_t)0x4b42a580, (q31_t)0x9876904a, (q31_t)0x4b3d9053, (q31_t)0x9872deaa,
+  (q31_t)0x4b387af9, (q31_t)0x986f2d4a, (q31_t)0x4b336570, (q31_t)0x986b7c2a, (q31_t)0x4b2e4fb8, (q31_t)0x9867cb4a, (q31_t)0x4b2939d2, (q31_t)0x98641aa9,
+  (q31_t)0x4b2423be, (q31_t)0x98606a49, (q31_t)0x4b1f0d7b, (q31_t)0x985cba28, (q31_t)0x4b19f70a, (q31_t)0x98590a48, (q31_t)0x4b14e06b, (q31_t)0x98555aa7,
+  (q31_t)0x4b0fc99d, (q31_t)0x9851ab46, (q31_t)0x4b0ab2a1, (q31_t)0x984dfc26, (q31_t)0x4b059b77, (q31_t)0x984a4d45, (q31_t)0x4b00841f, (q31_t)0x98469ea4,
+  (q31_t)0x4afb6c98, (q31_t)0x9842f043, (q31_t)0x4af654e3, (q31_t)0x983f4223, (q31_t)0x4af13d00, (q31_t)0x983b9442, (q31_t)0x4aec24ee, (q31_t)0x9837e6a1,
+  (q31_t)0x4ae70caf, (q31_t)0x98343940, (q31_t)0x4ae1f441, (q31_t)0x98308c1f, (q31_t)0x4adcdba5, (q31_t)0x982cdf3f, (q31_t)0x4ad7c2da, (q31_t)0x9829329e,
+  (q31_t)0x4ad2a9e2, (q31_t)0x9825863d, (q31_t)0x4acd90bb, (q31_t)0x9821da1d, (q31_t)0x4ac87767, (q31_t)0x981e2e3c, (q31_t)0x4ac35de4, (q31_t)0x981a829c,
+  (q31_t)0x4abe4433, (q31_t)0x9816d73b, (q31_t)0x4ab92a54, (q31_t)0x98132c1b, (q31_t)0x4ab41046, (q31_t)0x980f813b, (q31_t)0x4aaef60b, (q31_t)0x980bd69b,
+  (q31_t)0x4aa9dba2, (q31_t)0x98082c3b, (q31_t)0x4aa4c10b, (q31_t)0x9804821b, (q31_t)0x4a9fa645, (q31_t)0x9800d83c, (q31_t)0x4a9a8b52, (q31_t)0x97fd2e9c,
+  (q31_t)0x4a957030, (q31_t)0x97f9853d, (q31_t)0x4a9054e1, (q31_t)0x97f5dc1e, (q31_t)0x4a8b3963, (q31_t)0x97f2333f, (q31_t)0x4a861db8, (q31_t)0x97ee8aa0,
+  (q31_t)0x4a8101de, (q31_t)0x97eae242, (q31_t)0x4a7be5d7, (q31_t)0x97e73a23, (q31_t)0x4a76c9a2, (q31_t)0x97e39245, (q31_t)0x4a71ad3e, (q31_t)0x97dfeaa7,
+  (q31_t)0x4a6c90ad, (q31_t)0x97dc4349, (q31_t)0x4a6773ee, (q31_t)0x97d89c2c, (q31_t)0x4a625701, (q31_t)0x97d4f54f, (q31_t)0x4a5d39e6, (q31_t)0x97d14eb2,
+  (q31_t)0x4a581c9e, (q31_t)0x97cda855, (q31_t)0x4a52ff27, (q31_t)0x97ca0239, (q31_t)0x4a4de182, (q31_t)0x97c65c5c, (q31_t)0x4a48c3b0, (q31_t)0x97c2b6c1,
+  (q31_t)0x4a43a5b0, (q31_t)0x97bf1165, (q31_t)0x4a3e8782, (q31_t)0x97bb6c4a, (q31_t)0x4a396926, (q31_t)0x97b7c76f, (q31_t)0x4a344a9d, (q31_t)0x97b422d4,
+  (q31_t)0x4a2f2be6, (q31_t)0x97b07e7a, (q31_t)0x4a2a0d01, (q31_t)0x97acda60, (q31_t)0x4a24edee, (q31_t)0x97a93687, (q31_t)0x4a1fcead, (q31_t)0x97a592ed,
+  (q31_t)0x4a1aaf3f, (q31_t)0x97a1ef94, (q31_t)0x4a158fa3, (q31_t)0x979e4c7c, (q31_t)0x4a106fda, (q31_t)0x979aa9a4, (q31_t)0x4a0b4fe2, (q31_t)0x9797070c,
+  (q31_t)0x4a062fbd, (q31_t)0x979364b5, (q31_t)0x4a010f6b, (q31_t)0x978fc29e, (q31_t)0x49fbeeea, (q31_t)0x978c20c8, (q31_t)0x49f6ce3c, (q31_t)0x97887f32,
+  (q31_t)0x49f1ad61, (q31_t)0x9784dddc, (q31_t)0x49ec8c57, (q31_t)0x97813cc7, (q31_t)0x49e76b21, (q31_t)0x977d9bf2, (q31_t)0x49e249bc, (q31_t)0x9779fb5e,
+  (q31_t)0x49dd282a, (q31_t)0x97765b0a, (q31_t)0x49d8066b, (q31_t)0x9772baf7, (q31_t)0x49d2e47e, (q31_t)0x976f1b24, (q31_t)0x49cdc263, (q31_t)0x976b7b92,
+  (q31_t)0x49c8a01b, (q31_t)0x9767dc41, (q31_t)0x49c37da5, (q31_t)0x97643d2f, (q31_t)0x49be5b02, (q31_t)0x97609e5f, (q31_t)0x49b93832, (q31_t)0x975cffcf,
+  (q31_t)0x49b41533, (q31_t)0x9759617f, (q31_t)0x49aef208, (q31_t)0x9755c370, (q31_t)0x49a9ceaf, (q31_t)0x975225a1, (q31_t)0x49a4ab28, (q31_t)0x974e8813,
+  (q31_t)0x499f8774, (q31_t)0x974aeac6, (q31_t)0x499a6393, (q31_t)0x97474db9, (q31_t)0x49953f84, (q31_t)0x9743b0ed, (q31_t)0x49901b48, (q31_t)0x97401462,
+  (q31_t)0x498af6df, (q31_t)0x973c7817, (q31_t)0x4985d248, (q31_t)0x9738dc0d, (q31_t)0x4980ad84, (q31_t)0x97354043, (q31_t)0x497b8892, (q31_t)0x9731a4ba,
+  (q31_t)0x49766373, (q31_t)0x972e0971, (q31_t)0x49713e27, (q31_t)0x972a6e6a, (q31_t)0x496c18ae, (q31_t)0x9726d3a3, (q31_t)0x4966f307, (q31_t)0x9723391c,
+  (q31_t)0x4961cd33, (q31_t)0x971f9ed7, (q31_t)0x495ca732, (q31_t)0x971c04d2, (q31_t)0x49578103, (q31_t)0x97186b0d, (q31_t)0x49525aa7, (q31_t)0x9714d18a,
+  (q31_t)0x494d341e, (q31_t)0x97113847, (q31_t)0x49480d68, (q31_t)0x970d9f45, (q31_t)0x4942e684, (q31_t)0x970a0683, (q31_t)0x493dbf74, (q31_t)0x97066e03,
+  (q31_t)0x49389836, (q31_t)0x9702d5c3, (q31_t)0x493370cb, (q31_t)0x96ff3dc4, (q31_t)0x492e4933, (q31_t)0x96fba605, (q31_t)0x4929216e, (q31_t)0x96f80e88,
+  (q31_t)0x4923f97b, (q31_t)0x96f4774b, (q31_t)0x491ed15c, (q31_t)0x96f0e04f, (q31_t)0x4919a90f, (q31_t)0x96ed4994, (q31_t)0x49148095, (q31_t)0x96e9b319,
+  (q31_t)0x490f57ee, (q31_t)0x96e61ce0, (q31_t)0x490a2f1b, (q31_t)0x96e286e7, (q31_t)0x4905061a, (q31_t)0x96def12f, (q31_t)0x48ffdcec, (q31_t)0x96db5bb8,
+  (q31_t)0x48fab391, (q31_t)0x96d7c682, (q31_t)0x48f58a09, (q31_t)0x96d4318d, (q31_t)0x48f06054, (q31_t)0x96d09cd8, (q31_t)0x48eb3672, (q31_t)0x96cd0865,
+  (q31_t)0x48e60c62, (q31_t)0x96c97432, (q31_t)0x48e0e227, (q31_t)0x96c5e040, (q31_t)0x48dbb7be, (q31_t)0x96c24c8f, (q31_t)0x48d68d28, (q31_t)0x96beb91f,
+  (q31_t)0x48d16265, (q31_t)0x96bb25f0, (q31_t)0x48cc3775, (q31_t)0x96b79302, (q31_t)0x48c70c59, (q31_t)0x96b40055, (q31_t)0x48c1e10f, (q31_t)0x96b06de9,
+  (q31_t)0x48bcb599, (q31_t)0x96acdbbe, (q31_t)0x48b789f5, (q31_t)0x96a949d3, (q31_t)0x48b25e25, (q31_t)0x96a5b82a, (q31_t)0x48ad3228, (q31_t)0x96a226c2,
+  (q31_t)0x48a805ff, (q31_t)0x969e959b, (q31_t)0x48a2d9a8, (q31_t)0x969b04b4, (q31_t)0x489dad25, (q31_t)0x9697740f, (q31_t)0x48988074, (q31_t)0x9693e3ab,
+  (q31_t)0x48935397, (q31_t)0x96905388, (q31_t)0x488e268e, (q31_t)0x968cc3a5, (q31_t)0x4888f957, (q31_t)0x96893404, (q31_t)0x4883cbf4, (q31_t)0x9685a4a4,
+  (q31_t)0x487e9e64, (q31_t)0x96821585, (q31_t)0x487970a7, (q31_t)0x967e86a7, (q31_t)0x487442be, (q31_t)0x967af80a, (q31_t)0x486f14a8, (q31_t)0x967769af,
+  (q31_t)0x4869e665, (q31_t)0x9673db94, (q31_t)0x4864b7f5, (q31_t)0x96704dba, (q31_t)0x485f8959, (q31_t)0x966cc022, (q31_t)0x485a5a90, (q31_t)0x966932cb,
+  (q31_t)0x48552b9b, (q31_t)0x9665a5b4, (q31_t)0x484ffc79, (q31_t)0x966218df, (q31_t)0x484acd2a, (q31_t)0x965e8c4b, (q31_t)0x48459daf, (q31_t)0x965afff9,
+  (q31_t)0x48406e08, (q31_t)0x965773e7, (q31_t)0x483b3e33, (q31_t)0x9653e817, (q31_t)0x48360e32, (q31_t)0x96505c88, (q31_t)0x4830de05, (q31_t)0x964cd139,
+  (q31_t)0x482badab, (q31_t)0x9649462d, (q31_t)0x48267d24, (q31_t)0x9645bb61, (q31_t)0x48214c71, (q31_t)0x964230d7, (q31_t)0x481c1b92, (q31_t)0x963ea68d,
+  (q31_t)0x4816ea86, (q31_t)0x963b1c86, (q31_t)0x4811b94d, (q31_t)0x963792bf, (q31_t)0x480c87e8, (q31_t)0x96340939, (q31_t)0x48075657, (q31_t)0x96307ff5,
+  (q31_t)0x48022499, (q31_t)0x962cf6f2, (q31_t)0x47fcf2af, (q31_t)0x96296e31, (q31_t)0x47f7c099, (q31_t)0x9625e5b0, (q31_t)0x47f28e56, (q31_t)0x96225d71,
+  (q31_t)0x47ed5be6, (q31_t)0x961ed574, (q31_t)0x47e8294a, (q31_t)0x961b4db7, (q31_t)0x47e2f682, (q31_t)0x9617c63c, (q31_t)0x47ddc38e, (q31_t)0x96143f02,
+  (q31_t)0x47d8906d, (q31_t)0x9610b80a, (q31_t)0x47d35d20, (q31_t)0x960d3153, (q31_t)0x47ce29a7, (q31_t)0x9609aadd, (q31_t)0x47c8f601, (q31_t)0x960624a9,
+  (q31_t)0x47c3c22f, (q31_t)0x96029eb6, (q31_t)0x47be8e31, (q31_t)0x95ff1904, (q31_t)0x47b95a06, (q31_t)0x95fb9394, (q31_t)0x47b425af, (q31_t)0x95f80e65,
+  (q31_t)0x47aef12c, (q31_t)0x95f48977, (q31_t)0x47a9bc7d, (q31_t)0x95f104cb, (q31_t)0x47a487a2, (q31_t)0x95ed8061, (q31_t)0x479f529a, (q31_t)0x95e9fc38,
+  (q31_t)0x479a1d67, (q31_t)0x95e67850, (q31_t)0x4794e807, (q31_t)0x95e2f4a9, (q31_t)0x478fb27b, (q31_t)0x95df7145, (q31_t)0x478a7cc2, (q31_t)0x95dbee21,
+  (q31_t)0x478546de, (q31_t)0x95d86b3f, (q31_t)0x478010cd, (q31_t)0x95d4e89f, (q31_t)0x477ada91, (q31_t)0x95d16640, (q31_t)0x4775a428, (q31_t)0x95cde423,
+  (q31_t)0x47706d93, (q31_t)0x95ca6247, (q31_t)0x476b36d3, (q31_t)0x95c6e0ac, (q31_t)0x4765ffe6, (q31_t)0x95c35f53, (q31_t)0x4760c8cd, (q31_t)0x95bfde3c,
+  (q31_t)0x475b9188, (q31_t)0x95bc5d66, (q31_t)0x47565a17, (q31_t)0x95b8dcd2, (q31_t)0x4751227a, (q31_t)0x95b55c7f, (q31_t)0x474beab1, (q31_t)0x95b1dc6e,
+  (q31_t)0x4746b2bc, (q31_t)0x95ae5c9f, (q31_t)0x47417a9b, (q31_t)0x95aadd11, (q31_t)0x473c424e, (q31_t)0x95a75dc4, (q31_t)0x473709d5, (q31_t)0x95a3deb9,
+  (q31_t)0x4731d131, (q31_t)0x95a05ff0, (q31_t)0x472c9860, (q31_t)0x959ce169, (q31_t)0x47275f63, (q31_t)0x95996323, (q31_t)0x4722263b, (q31_t)0x9595e51e,
+  (q31_t)0x471cece7, (q31_t)0x9592675c, (q31_t)0x4717b367, (q31_t)0x958ee9db, (q31_t)0x471279ba, (q31_t)0x958b6c9b, (q31_t)0x470d3fe3, (q31_t)0x9587ef9e,
+  (q31_t)0x470805df, (q31_t)0x958472e2, (q31_t)0x4702cbaf, (q31_t)0x9580f667, (q31_t)0x46fd9154, (q31_t)0x957d7a2f, (q31_t)0x46f856cd, (q31_t)0x9579fe38,
+  (q31_t)0x46f31c1a, (q31_t)0x95768283, (q31_t)0x46ede13b, (q31_t)0x9573070f, (q31_t)0x46e8a631, (q31_t)0x956f8bdd, (q31_t)0x46e36afb, (q31_t)0x956c10ed,
+  (q31_t)0x46de2f99, (q31_t)0x9568963f, (q31_t)0x46d8f40b, (q31_t)0x95651bd2, (q31_t)0x46d3b852, (q31_t)0x9561a1a8, (q31_t)0x46ce7c6d, (q31_t)0x955e27bf,
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+  (q31_t)0x414c992f, (q31_t)0x91e8b8d0, (q31_t)0x414731a9, (q31_t)0x91e5845f, (q31_t)0x4141c9fb, (q31_t)0x91e25032, (q31_t)0x413c6225, (q31_t)0x91df1c49,
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+  (q31_t)0x40e064ea, (q31_t)0x91a8d26d, (q31_t)0x40dafa41, (q31_t)0x91a5a34c, (q31_t)0x40d58f71, (q31_t)0x91a2746f, (q31_t)0x40d02478, (q31_t)0x919f45d6,
+  (q31_t)0x40cab958, (q31_t)0x919c1781, (q31_t)0x40c54e0f, (q31_t)0x9198e970, (q31_t)0x40bfe29f, (q31_t)0x9195bba3, (q31_t)0x40ba7706, (q31_t)0x91928e1a,
+  (q31_t)0x40b50b46, (q31_t)0x918f60d6, (q31_t)0x40af9f5e, (q31_t)0x918c33d5, (q31_t)0x40aa334e, (q31_t)0x91890719, (q31_t)0x40a4c716, (q31_t)0x9185daa1,
+  (q31_t)0x409f5ab6, (q31_t)0x9182ae6d, (q31_t)0x4099ee2e, (q31_t)0x917f827d, (q31_t)0x4094817f, (q31_t)0x917c56d1, (q31_t)0x408f14a7, (q31_t)0x91792b6a,
+  (q31_t)0x4089a7a8, (q31_t)0x91760047, (q31_t)0x40843a81, (q31_t)0x9172d567, (q31_t)0x407ecd32, (q31_t)0x916faacc, (q31_t)0x40795fbc, (q31_t)0x916c8076,
+  (q31_t)0x4073f21d, (q31_t)0x91695663, (q31_t)0x406e8457, (q31_t)0x91662c95, (q31_t)0x40691669, (q31_t)0x9163030b, (q31_t)0x4063a854, (q31_t)0x915fd9c5,
+  (q31_t)0x405e3a16, (q31_t)0x915cb0c3, (q31_t)0x4058cbb1, (q31_t)0x91598806, (q31_t)0x40535d24, (q31_t)0x91565f8d, (q31_t)0x404dee70, (q31_t)0x91533758,
+  (q31_t)0x40487f94, (q31_t)0x91500f67, (q31_t)0x40431090, (q31_t)0x914ce7bb, (q31_t)0x403da165, (q31_t)0x9149c053, (q31_t)0x40383212, (q31_t)0x9146992f,
+  (q31_t)0x4032c297, (q31_t)0x91437250, (q31_t)0x402d52f5, (q31_t)0x91404bb5, (q31_t)0x4027e32b, (q31_t)0x913d255e, (q31_t)0x4022733a, (q31_t)0x9139ff4b,
+  (q31_t)0x401d0321, (q31_t)0x9136d97d, (q31_t)0x401792e0, (q31_t)0x9133b3f3, (q31_t)0x40122278, (q31_t)0x91308eae, (q31_t)0x400cb1e9, (q31_t)0x912d69ad,
+  (q31_t)0x40074132, (q31_t)0x912a44f0, (q31_t)0x4001d053, (q31_t)0x91272078, (q31_t)0x3ffc5f4d, (q31_t)0x9123fc44, (q31_t)0x3ff6ee1f, (q31_t)0x9120d854,
+  (q31_t)0x3ff17cca, (q31_t)0x911db4a9, (q31_t)0x3fec0b4e, (q31_t)0x911a9142, (q31_t)0x3fe699aa, (q31_t)0x91176e1f, (q31_t)0x3fe127df, (q31_t)0x91144b41,
+  (q31_t)0x3fdbb5ec, (q31_t)0x911128a8, (q31_t)0x3fd643d2, (q31_t)0x910e0653, (q31_t)0x3fd0d191, (q31_t)0x910ae442, (q31_t)0x3fcb5f28, (q31_t)0x9107c276,
+  (q31_t)0x3fc5ec98, (q31_t)0x9104a0ee, (q31_t)0x3fc079e0, (q31_t)0x91017faa, (q31_t)0x3fbb0702, (q31_t)0x90fe5eab, (q31_t)0x3fb593fb, (q31_t)0x90fb3df1,
+  (q31_t)0x3fb020ce, (q31_t)0x90f81d7b, (q31_t)0x3faaad79, (q31_t)0x90f4fd4a, (q31_t)0x3fa539fd, (q31_t)0x90f1dd5d, (q31_t)0x3f9fc65a, (q31_t)0x90eebdb4,
+  (q31_t)0x3f9a5290, (q31_t)0x90eb9e50, (q31_t)0x3f94de9e, (q31_t)0x90e87f31, (q31_t)0x3f8f6a85, (q31_t)0x90e56056, (q31_t)0x3f89f645, (q31_t)0x90e241bf,
+  (q31_t)0x3f8481dd, (q31_t)0x90df236e, (q31_t)0x3f7f0d4f, (q31_t)0x90dc0560, (q31_t)0x3f799899, (q31_t)0x90d8e798, (q31_t)0x3f7423bc, (q31_t)0x90d5ca13,
+  (q31_t)0x3f6eaeb8, (q31_t)0x90d2acd4, (q31_t)0x3f69398d, (q31_t)0x90cf8fd9, (q31_t)0x3f63c43b, (q31_t)0x90cc7322, (q31_t)0x3f5e4ec2, (q31_t)0x90c956b1,
+  (q31_t)0x3f58d921, (q31_t)0x90c63a83, (q31_t)0x3f53635a, (q31_t)0x90c31e9b, (q31_t)0x3f4ded6b, (q31_t)0x90c002f7, (q31_t)0x3f487755, (q31_t)0x90bce797,
+  (q31_t)0x3f430119, (q31_t)0x90b9cc7d, (q31_t)0x3f3d8ab5, (q31_t)0x90b6b1a6, (q31_t)0x3f38142a, (q31_t)0x90b39715, (q31_t)0x3f329d79, (q31_t)0x90b07cc8,
+  (q31_t)0x3f2d26a0, (q31_t)0x90ad62c0, (q31_t)0x3f27afa1, (q31_t)0x90aa48fd, (q31_t)0x3f22387a, (q31_t)0x90a72f7e, (q31_t)0x3f1cc12c, (q31_t)0x90a41644,
+  (q31_t)0x3f1749b8, (q31_t)0x90a0fd4e, (q31_t)0x3f11d21d, (q31_t)0x909de49e, (q31_t)0x3f0c5a5a, (q31_t)0x909acc32, (q31_t)0x3f06e271, (q31_t)0x9097b40a,
+  (q31_t)0x3f016a61, (q31_t)0x90949c28, (q31_t)0x3efbf22a, (q31_t)0x9091848a, (q31_t)0x3ef679cc, (q31_t)0x908e6d31, (q31_t)0x3ef10148, (q31_t)0x908b561c,
+  (q31_t)0x3eeb889c, (q31_t)0x90883f4d, (q31_t)0x3ee60fca, (q31_t)0x908528c2, (q31_t)0x3ee096d1, (q31_t)0x9082127c, (q31_t)0x3edb1db1, (q31_t)0x907efc7a,
+  (q31_t)0x3ed5a46b, (q31_t)0x907be6be, (q31_t)0x3ed02afd, (q31_t)0x9078d146, (q31_t)0x3ecab169, (q31_t)0x9075bc13, (q31_t)0x3ec537ae, (q31_t)0x9072a725,
+  (q31_t)0x3ebfbdcd, (q31_t)0x906f927c, (q31_t)0x3eba43c4, (q31_t)0x906c7e17, (q31_t)0x3eb4c995, (q31_t)0x906969f8, (q31_t)0x3eaf4f40, (q31_t)0x9066561d,
+  (q31_t)0x3ea9d4c3, (q31_t)0x90634287, (q31_t)0x3ea45a21, (q31_t)0x90602f35, (q31_t)0x3e9edf57, (q31_t)0x905d1c29, (q31_t)0x3e996467, (q31_t)0x905a0962,
+  (q31_t)0x3e93e950, (q31_t)0x9056f6df, (q31_t)0x3e8e6e12, (q31_t)0x9053e4a1, (q31_t)0x3e88f2ae, (q31_t)0x9050d2a9, (q31_t)0x3e837724, (q31_t)0x904dc0f5,
+  (q31_t)0x3e7dfb73, (q31_t)0x904aaf86, (q31_t)0x3e787f9b, (q31_t)0x90479e5c, (q31_t)0x3e73039d, (q31_t)0x90448d76, (q31_t)0x3e6d8778, (q31_t)0x90417cd6,
+  (q31_t)0x3e680b2c, (q31_t)0x903e6c7b, (q31_t)0x3e628ebb, (q31_t)0x903b5c64, (q31_t)0x3e5d1222, (q31_t)0x90384c93, (q31_t)0x3e579564, (q31_t)0x90353d06,
+  (q31_t)0x3e52187f, (q31_t)0x90322dbf, (q31_t)0x3e4c9b73, (q31_t)0x902f1ebc, (q31_t)0x3e471e41, (q31_t)0x902c0fff, (q31_t)0x3e41a0e8, (q31_t)0x90290186,
+  (q31_t)0x3e3c2369, (q31_t)0x9025f352, (q31_t)0x3e36a5c4, (q31_t)0x9022e564, (q31_t)0x3e3127f9, (q31_t)0x901fd7ba, (q31_t)0x3e2baa07, (q31_t)0x901cca55,
+  (q31_t)0x3e262bee, (q31_t)0x9019bd36, (q31_t)0x3e20adaf, (q31_t)0x9016b05b, (q31_t)0x3e1b2f4a, (q31_t)0x9013a3c5, (q31_t)0x3e15b0bf, (q31_t)0x90109775,
+  (q31_t)0x3e10320d, (q31_t)0x900d8b69, (q31_t)0x3e0ab336, (q31_t)0x900a7fa3, (q31_t)0x3e053437, (q31_t)0x90077422, (q31_t)0x3dffb513, (q31_t)0x900468e5,
+  (q31_t)0x3dfa35c8, (q31_t)0x90015dee, (q31_t)0x3df4b657, (q31_t)0x8ffe533c, (q31_t)0x3def36c0, (q31_t)0x8ffb48cf, (q31_t)0x3de9b703, (q31_t)0x8ff83ea7,
+  (q31_t)0x3de4371f, (q31_t)0x8ff534c4, (q31_t)0x3ddeb716, (q31_t)0x8ff22b26, (q31_t)0x3dd936e6, (q31_t)0x8fef21ce, (q31_t)0x3dd3b690, (q31_t)0x8fec18ba,
+  (q31_t)0x3dce3614, (q31_t)0x8fe90fec, (q31_t)0x3dc8b571, (q31_t)0x8fe60763, (q31_t)0x3dc334a9, (q31_t)0x8fe2ff1f, (q31_t)0x3dbdb3ba, (q31_t)0x8fdff720,
+  (q31_t)0x3db832a6, (q31_t)0x8fdcef66, (q31_t)0x3db2b16b, (q31_t)0x8fd9e7f2, (q31_t)0x3dad300b, (q31_t)0x8fd6e0c2, (q31_t)0x3da7ae84, (q31_t)0x8fd3d9d8,
+  (q31_t)0x3da22cd7, (q31_t)0x8fd0d333, (q31_t)0x3d9cab04, (q31_t)0x8fcdccd3, (q31_t)0x3d97290b, (q31_t)0x8fcac6b9, (q31_t)0x3d91a6ed, (q31_t)0x8fc7c0e3,
+  (q31_t)0x3d8c24a8, (q31_t)0x8fc4bb53, (q31_t)0x3d86a23d, (q31_t)0x8fc1b608, (q31_t)0x3d811fac, (q31_t)0x8fbeb103, (q31_t)0x3d7b9cf6, (q31_t)0x8fbbac42,
+  (q31_t)0x3d761a19, (q31_t)0x8fb8a7c7, (q31_t)0x3d709717, (q31_t)0x8fb5a391, (q31_t)0x3d6b13ee, (q31_t)0x8fb29fa0, (q31_t)0x3d6590a0, (q31_t)0x8faf9bf5,
+  (q31_t)0x3d600d2c, (q31_t)0x8fac988f, (q31_t)0x3d5a8992, (q31_t)0x8fa9956e, (q31_t)0x3d5505d2, (q31_t)0x8fa69293, (q31_t)0x3d4f81ec, (q31_t)0x8fa38ffc,
+  (q31_t)0x3d49fde1, (q31_t)0x8fa08dab, (q31_t)0x3d4479b0, (q31_t)0x8f9d8ba0, (q31_t)0x3d3ef559, (q31_t)0x8f9a89da, (q31_t)0x3d3970dc, (q31_t)0x8f978859,
+  (q31_t)0x3d33ec39, (q31_t)0x8f94871d, (q31_t)0x3d2e6771, (q31_t)0x8f918627, (q31_t)0x3d28e282, (q31_t)0x8f8e8576, (q31_t)0x3d235d6f, (q31_t)0x8f8b850a,
+  (q31_t)0x3d1dd835, (q31_t)0x8f8884e4, (q31_t)0x3d1852d6, (q31_t)0x8f858503, (q31_t)0x3d12cd51, (q31_t)0x8f828568, (q31_t)0x3d0d47a6, (q31_t)0x8f7f8612,
+  (q31_t)0x3d07c1d6, (q31_t)0x8f7c8701, (q31_t)0x3d023be0, (q31_t)0x8f798836, (q31_t)0x3cfcb5c4, (q31_t)0x8f7689b0, (q31_t)0x3cf72f83, (q31_t)0x8f738b70,
+  (q31_t)0x3cf1a91c, (q31_t)0x8f708d75, (q31_t)0x3cec2290, (q31_t)0x8f6d8fbf, (q31_t)0x3ce69bde, (q31_t)0x8f6a924f, (q31_t)0x3ce11507, (q31_t)0x8f679525,
+  (q31_t)0x3cdb8e09, (q31_t)0x8f649840, (q31_t)0x3cd606e7, (q31_t)0x8f619ba0, (q31_t)0x3cd07f9f, (q31_t)0x8f5e9f46, (q31_t)0x3ccaf831, (q31_t)0x8f5ba331,
+  (q31_t)0x3cc5709e, (q31_t)0x8f58a761, (q31_t)0x3cbfe8e5, (q31_t)0x8f55abd8, (q31_t)0x3cba6107, (q31_t)0x8f52b093, (q31_t)0x3cb4d904, (q31_t)0x8f4fb595,
+  (q31_t)0x3caf50da, (q31_t)0x8f4cbadb, (q31_t)0x3ca9c88c, (q31_t)0x8f49c067, (q31_t)0x3ca44018, (q31_t)0x8f46c639, (q31_t)0x3c9eb77f, (q31_t)0x8f43cc50,
+  (q31_t)0x3c992ec0, (q31_t)0x8f40d2ad, (q31_t)0x3c93a5dc, (q31_t)0x8f3dd950, (q31_t)0x3c8e1cd3, (q31_t)0x8f3ae038, (q31_t)0x3c8893a4, (q31_t)0x8f37e765,
+  (q31_t)0x3c830a50, (q31_t)0x8f34eed8, (q31_t)0x3c7d80d6, (q31_t)0x8f31f691, (q31_t)0x3c77f737, (q31_t)0x8f2efe8f, (q31_t)0x3c726d73, (q31_t)0x8f2c06d3,
+  (q31_t)0x3c6ce38a, (q31_t)0x8f290f5c, (q31_t)0x3c67597b, (q31_t)0x8f26182b, (q31_t)0x3c61cf48, (q31_t)0x8f232140, (q31_t)0x3c5c44ee, (q31_t)0x8f202a9a,
+  (q31_t)0x3c56ba70, (q31_t)0x8f1d343a, (q31_t)0x3c512fcc, (q31_t)0x8f1a3e1f, (q31_t)0x3c4ba504, (q31_t)0x8f17484b, (q31_t)0x3c461a16, (q31_t)0x8f1452bb,
+  (q31_t)0x3c408f03, (q31_t)0x8f115d72, (q31_t)0x3c3b03ca, (q31_t)0x8f0e686e, (q31_t)0x3c35786d, (q31_t)0x8f0b73b0, (q31_t)0x3c2fecea, (q31_t)0x8f087f37,
+  (q31_t)0x3c2a6142, (q31_t)0x8f058b04, (q31_t)0x3c24d575, (q31_t)0x8f029717, (q31_t)0x3c1f4983, (q31_t)0x8effa370, (q31_t)0x3c19bd6c, (q31_t)0x8efcb00e,
+  (q31_t)0x3c143130, (q31_t)0x8ef9bcf2, (q31_t)0x3c0ea4cf, (q31_t)0x8ef6ca1c, (q31_t)0x3c091849, (q31_t)0x8ef3d78b, (q31_t)0x3c038b9e, (q31_t)0x8ef0e540,
+  (q31_t)0x3bfdfecd, (q31_t)0x8eedf33b, (q31_t)0x3bf871d8, (q31_t)0x8eeb017c, (q31_t)0x3bf2e4be, (q31_t)0x8ee81002, (q31_t)0x3bed577e, (q31_t)0x8ee51ece,
+  (q31_t)0x3be7ca1a, (q31_t)0x8ee22de0, (q31_t)0x3be23c91, (q31_t)0x8edf3d38, (q31_t)0x3bdcaee3, (q31_t)0x8edc4cd5, (q31_t)0x3bd72110, (q31_t)0x8ed95cb8,
+  (q31_t)0x3bd19318, (q31_t)0x8ed66ce1, (q31_t)0x3bcc04fb, (q31_t)0x8ed37d50, (q31_t)0x3bc676b9, (q31_t)0x8ed08e05, (q31_t)0x3bc0e853, (q31_t)0x8ecd9eff,
+  (q31_t)0x3bbb59c7, (q31_t)0x8ecab040, (q31_t)0x3bb5cb17, (q31_t)0x8ec7c1c6, (q31_t)0x3bb03c42, (q31_t)0x8ec4d392, (q31_t)0x3baaad48, (q31_t)0x8ec1e5a4,
+  (q31_t)0x3ba51e29, (q31_t)0x8ebef7fb, (q31_t)0x3b9f8ee5, (q31_t)0x8ebc0a99, (q31_t)0x3b99ff7d, (q31_t)0x8eb91d7c, (q31_t)0x3b946ff0, (q31_t)0x8eb630a6,
+  (q31_t)0x3b8ee03e, (q31_t)0x8eb34415, (q31_t)0x3b895068, (q31_t)0x8eb057ca, (q31_t)0x3b83c06c, (q31_t)0x8ead6bc5, (q31_t)0x3b7e304c, (q31_t)0x8eaa8006,
+  (q31_t)0x3b78a007, (q31_t)0x8ea7948c, (q31_t)0x3b730f9e, (q31_t)0x8ea4a959, (q31_t)0x3b6d7f10, (q31_t)0x8ea1be6c, (q31_t)0x3b67ee5d, (q31_t)0x8e9ed3c4,
+  (q31_t)0x3b625d86, (q31_t)0x8e9be963, (q31_t)0x3b5ccc8a, (q31_t)0x8e98ff47, (q31_t)0x3b573b69, (q31_t)0x8e961571, (q31_t)0x3b51aa24, (q31_t)0x8e932be2,
+  (q31_t)0x3b4c18ba, (q31_t)0x8e904298, (q31_t)0x3b46872c, (q31_t)0x8e8d5994, (q31_t)0x3b40f579, (q31_t)0x8e8a70d7, (q31_t)0x3b3b63a1, (q31_t)0x8e87885f,
+  (q31_t)0x3b35d1a5, (q31_t)0x8e84a02d, (q31_t)0x3b303f84, (q31_t)0x8e81b841, (q31_t)0x3b2aad3f, (q31_t)0x8e7ed09b, (q31_t)0x3b251ad6, (q31_t)0x8e7be93c,
+  (q31_t)0x3b1f8848, (q31_t)0x8e790222, (q31_t)0x3b19f595, (q31_t)0x8e761b4e, (q31_t)0x3b1462be, (q31_t)0x8e7334c1, (q31_t)0x3b0ecfc3, (q31_t)0x8e704e79,
+  (q31_t)0x3b093ca3, (q31_t)0x8e6d6877, (q31_t)0x3b03a95e, (q31_t)0x8e6a82bc, (q31_t)0x3afe15f6, (q31_t)0x8e679d47, (q31_t)0x3af88269, (q31_t)0x8e64b817,
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+  (q31_t)0x3adc9e86, (q31_t)0x8e564246, (q31_t)0x3ad70a1f, (q31_t)0x8e535ebb, (q31_t)0x3ad17593, (q31_t)0x8e507b76, (q31_t)0x3acbe0e3, (q31_t)0x8e4d9878,
+  (q31_t)0x3ac64c0f, (q31_t)0x8e4ab5bf, (q31_t)0x3ac0b717, (q31_t)0x8e47d34d, (q31_t)0x3abb21fb, (q31_t)0x8e44f121, (q31_t)0x3ab58cba, (q31_t)0x8e420f3b,
+  (q31_t)0x3aaff755, (q31_t)0x8e3f2d9b, (q31_t)0x3aaa61cc, (q31_t)0x8e3c4c41, (q31_t)0x3aa4cc1e, (q31_t)0x8e396b2e, (q31_t)0x3a9f364d, (q31_t)0x8e368a61,
+  (q31_t)0x3a99a057, (q31_t)0x8e33a9da, (q31_t)0x3a940a3e, (q31_t)0x8e30c999, (q31_t)0x3a8e7400, (q31_t)0x8e2de99e, (q31_t)0x3a88dd9d, (q31_t)0x8e2b09e9,
+  (q31_t)0x3a834717, (q31_t)0x8e282a7b, (q31_t)0x3a7db06d, (q31_t)0x8e254b53, (q31_t)0x3a78199f, (q31_t)0x8e226c71, (q31_t)0x3a7282ac, (q31_t)0x8e1f8dd6,
+  (q31_t)0x3a6ceb96, (q31_t)0x8e1caf80, (q31_t)0x3a67545b, (q31_t)0x8e19d171, (q31_t)0x3a61bcfd, (q31_t)0x8e16f3a9, (q31_t)0x3a5c257a, (q31_t)0x8e141626,
+  (q31_t)0x3a568dd4, (q31_t)0x8e1138ea, (q31_t)0x3a50f609, (q31_t)0x8e0e5bf4, (q31_t)0x3a4b5e1b, (q31_t)0x8e0b7f44, (q31_t)0x3a45c608, (q31_t)0x8e08a2db,
+  (q31_t)0x3a402dd2, (q31_t)0x8e05c6b7, (q31_t)0x3a3a9577, (q31_t)0x8e02eadb, (q31_t)0x3a34fcf9, (q31_t)0x8e000f44, (q31_t)0x3a2f6457, (q31_t)0x8dfd33f4,
+  (q31_t)0x3a29cb91, (q31_t)0x8dfa58ea, (q31_t)0x3a2432a7, (q31_t)0x8df77e27, (q31_t)0x3a1e9999, (q31_t)0x8df4a3a9, (q31_t)0x3a190068, (q31_t)0x8df1c973,
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+  (q31_t)0x39fd0056, (q31_t)0x8de38a80, (q31_t)0x39f7664e, (q31_t)0x8de0b1ef, (q31_t)0x39f1cc21, (q31_t)0x8dddd9a5, (q31_t)0x39ec31d1, (q31_t)0x8ddb01a1,
+  (q31_t)0x39e6975e, (q31_t)0x8dd829e4, (q31_t)0x39e0fcc6, (q31_t)0x8dd5526d, (q31_t)0x39db620b, (q31_t)0x8dd27b3c, (q31_t)0x39d5c72c, (q31_t)0x8dcfa452,
+  (q31_t)0x39d02c2a, (q31_t)0x8dcccdaf, (q31_t)0x39ca9104, (q31_t)0x8dc9f751, (q31_t)0x39c4f5ba, (q31_t)0x8dc7213b, (q31_t)0x39bf5a4d, (q31_t)0x8dc44b6a,
+  (q31_t)0x39b9bebc, (q31_t)0x8dc175e0, (q31_t)0x39b42307, (q31_t)0x8dbea09d, (q31_t)0x39ae872f, (q31_t)0x8dbbcba0, (q31_t)0x39a8eb33, (q31_t)0x8db8f6ea,
+  (q31_t)0x39a34f13, (q31_t)0x8db6227a, (q31_t)0x399db2d0, (q31_t)0x8db34e50, (q31_t)0x3998166a, (q31_t)0x8db07a6d, (q31_t)0x399279e0, (q31_t)0x8dada6d1,
+  (q31_t)0x398cdd32, (q31_t)0x8daad37b, (q31_t)0x39874061, (q31_t)0x8da8006c, (q31_t)0x3981a36d, (q31_t)0x8da52da3, (q31_t)0x397c0655, (q31_t)0x8da25b21,
+  (q31_t)0x39766919, (q31_t)0x8d9f88e5, (q31_t)0x3970cbba, (q31_t)0x8d9cb6f0, (q31_t)0x396b2e38, (q31_t)0x8d99e541, (q31_t)0x39659092, (q31_t)0x8d9713d9,
+  (q31_t)0x395ff2c9, (q31_t)0x8d9442b8, (q31_t)0x395a54dd, (q31_t)0x8d9171dd, (q31_t)0x3954b6cd, (q31_t)0x8d8ea148, (q31_t)0x394f1899, (q31_t)0x8d8bd0fb,
+  (q31_t)0x39497a43, (q31_t)0x8d8900f3, (q31_t)0x3943dbc9, (q31_t)0x8d863133, (q31_t)0x393e3d2c, (q31_t)0x8d8361b9, (q31_t)0x39389e6b, (q31_t)0x8d809286,
+  (q31_t)0x3932ff87, (q31_t)0x8d7dc399, (q31_t)0x392d6080, (q31_t)0x8d7af4f3, (q31_t)0x3927c155, (q31_t)0x8d782694, (q31_t)0x39222208, (q31_t)0x8d75587b,
+  (q31_t)0x391c8297, (q31_t)0x8d728aa9, (q31_t)0x3916e303, (q31_t)0x8d6fbd1d, (q31_t)0x3911434b, (q31_t)0x8d6cefd9, (q31_t)0x390ba371, (q31_t)0x8d6a22db,
+  (q31_t)0x39060373, (q31_t)0x8d675623, (q31_t)0x39006352, (q31_t)0x8d6489b3, (q31_t)0x38fac30e, (q31_t)0x8d61bd89, (q31_t)0x38f522a6, (q31_t)0x8d5ef1a5,
+  (q31_t)0x38ef821c, (q31_t)0x8d5c2609, (q31_t)0x38e9e16e, (q31_t)0x8d595ab3, (q31_t)0x38e4409e, (q31_t)0x8d568fa4, (q31_t)0x38de9faa, (q31_t)0x8d53c4db,
+  (q31_t)0x38d8fe93, (q31_t)0x8d50fa59, (q31_t)0x38d35d59, (q31_t)0x8d4e301f, (q31_t)0x38cdbbfc, (q31_t)0x8d4b662a, (q31_t)0x38c81a7c, (q31_t)0x8d489c7d,
+  (q31_t)0x38c278d9, (q31_t)0x8d45d316, (q31_t)0x38bcd713, (q31_t)0x8d4309f6, (q31_t)0x38b7352a, (q31_t)0x8d40411d, (q31_t)0x38b1931e, (q31_t)0x8d3d788b,
+  (q31_t)0x38abf0ef, (q31_t)0x8d3ab03f, (q31_t)0x38a64e9d, (q31_t)0x8d37e83a, (q31_t)0x38a0ac29, (q31_t)0x8d35207d, (q31_t)0x389b0991, (q31_t)0x8d325905,
+  (q31_t)0x389566d6, (q31_t)0x8d2f91d5, (q31_t)0x388fc3f8, (q31_t)0x8d2ccaec, (q31_t)0x388a20f8, (q31_t)0x8d2a0449, (q31_t)0x38847dd5, (q31_t)0x8d273ded,
+  (q31_t)0x387eda8e, (q31_t)0x8d2477d8, (q31_t)0x38793725, (q31_t)0x8d21b20a, (q31_t)0x38739399, (q31_t)0x8d1eec83, (q31_t)0x386defeb, (q31_t)0x8d1c2742,
+  (q31_t)0x38684c19, (q31_t)0x8d196249, (q31_t)0x3862a825, (q31_t)0x8d169d96, (q31_t)0x385d040d, (q31_t)0x8d13d92a, (q31_t)0x38575fd4, (q31_t)0x8d111505,
+  (q31_t)0x3851bb77, (q31_t)0x8d0e5127, (q31_t)0x384c16f7, (q31_t)0x8d0b8d90, (q31_t)0x38467255, (q31_t)0x8d08ca40, (q31_t)0x3840cd90, (q31_t)0x8d060737,
+  (q31_t)0x383b28a9, (q31_t)0x8d034474, (q31_t)0x3835839f, (q31_t)0x8d0081f9, (q31_t)0x382fde72, (q31_t)0x8cfdbfc4, (q31_t)0x382a3922, (q31_t)0x8cfafdd7,
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+  (q31_t)0x380dfc8d, (q31_t)0x8ced385b, (q31_t)0x3808566e, (q31_t)0x8cea7818, (q31_t)0x3802b02c, (q31_t)0x8ce7b81b, (q31_t)0x37fd09c8, (q31_t)0x8ce4f865,
+  (q31_t)0x37f76341, (q31_t)0x8ce238f6, (q31_t)0x37f1bc97, (q31_t)0x8cdf79ce, (q31_t)0x37ec15cb, (q31_t)0x8cdcbaee, (q31_t)0x37e66edd, (q31_t)0x8cd9fc54,
+  (q31_t)0x37e0c7cc, (q31_t)0x8cd73e01, (q31_t)0x37db2099, (q31_t)0x8cd47ff6, (q31_t)0x37d57943, (q31_t)0x8cd1c231, (q31_t)0x37cfd1cb, (q31_t)0x8ccf04b3,
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+  (q31_t)0x37b38a6d, (q31_t)0x8cc1556a, (q31_t)0x37ade227, (q31_t)0x8cbe9996, (q31_t)0x37a839be, (q31_t)0x8cbbde0a, (q31_t)0x37a29132, (q31_t)0x8cb922c6,
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+  (q31_t)0x37864477, (q31_t)0x8cab7e98, (q31_t)0x37809b1e, (q31_t)0x8ca8c4fd, (q31_t)0x377af1a3, (q31_t)0x8ca60baa, (q31_t)0x37754806, (q31_t)0x8ca3529f,
+  (q31_t)0x376f9e46, (q31_t)0x8ca099da, (q31_t)0x3769f464, (q31_t)0x8c9de15c, (q31_t)0x37644a60, (q31_t)0x8c9b2926, (q31_t)0x375ea03a, (q31_t)0x8c987137,
+  (q31_t)0x3758f5f2, (q31_t)0x8c95b98f, (q31_t)0x37534b87, (q31_t)0x8c93022e, (q31_t)0x374da0fa, (q31_t)0x8c904b14, (q31_t)0x3747f64c, (q31_t)0x8c8d9442,
+  (q31_t)0x37424b7b, (q31_t)0x8c8addb7, (q31_t)0x373ca088, (q31_t)0x8c882773, (q31_t)0x3736f573, (q31_t)0x8c857176, (q31_t)0x37314a3c, (q31_t)0x8c82bbc0,
+  (q31_t)0x372b9ee3, (q31_t)0x8c800652, (q31_t)0x3725f367, (q31_t)0x8c7d512b, (q31_t)0x372047ca, (q31_t)0x8c7a9c4b, (q31_t)0x371a9c0b, (q31_t)0x8c77e7b3,
+  (q31_t)0x3714f02a, (q31_t)0x8c753362, (q31_t)0x370f4427, (q31_t)0x8c727f58, (q31_t)0x37099802, (q31_t)0x8c6fcb95, (q31_t)0x3703ebbb, (q31_t)0x8c6d181a,
+  (q31_t)0x36fe3f52, (q31_t)0x8c6a64e5, (q31_t)0x36f892c7, (q31_t)0x8c67b1f9, (q31_t)0x36f2e61a, (q31_t)0x8c64ff53, (q31_t)0x36ed394b, (q31_t)0x8c624cf5,
+  (q31_t)0x36e78c5b, (q31_t)0x8c5f9ade, (q31_t)0x36e1df48, (q31_t)0x8c5ce90e, (q31_t)0x36dc3214, (q31_t)0x8c5a3786, (q31_t)0x36d684be, (q31_t)0x8c578645,
+  (q31_t)0x36d0d746, (q31_t)0x8c54d54c, (q31_t)0x36cb29ac, (q31_t)0x8c522499, (q31_t)0x36c57bf0, (q31_t)0x8c4f742f, (q31_t)0x36bfce13, (q31_t)0x8c4cc40b,
+  (q31_t)0x36ba2014, (q31_t)0x8c4a142f, (q31_t)0x36b471f3, (q31_t)0x8c47649a, (q31_t)0x36aec3b0, (q31_t)0x8c44b54d, (q31_t)0x36a9154c, (q31_t)0x8c420647,
+  (q31_t)0x36a366c6, (q31_t)0x8c3f5788, (q31_t)0x369db81e, (q31_t)0x8c3ca911, (q31_t)0x36980954, (q31_t)0x8c39fae1, (q31_t)0x36925a69, (q31_t)0x8c374cf9,
+  (q31_t)0x368cab5c, (q31_t)0x8c349f58, (q31_t)0x3686fc2e, (q31_t)0x8c31f1ff, (q31_t)0x36814cde, (q31_t)0x8c2f44ed, (q31_t)0x367b9d6c, (q31_t)0x8c2c9822,
+  (q31_t)0x3675edd9, (q31_t)0x8c29eb9f, (q31_t)0x36703e24, (q31_t)0x8c273f63, (q31_t)0x366a8e4d, (q31_t)0x8c24936f, (q31_t)0x3664de55, (q31_t)0x8c21e7c2,
+  (q31_t)0x365f2e3b, (q31_t)0x8c1f3c5d, (q31_t)0x36597e00, (q31_t)0x8c1c913f, (q31_t)0x3653cda3, (q31_t)0x8c19e669, (q31_t)0x364e1d25, (q31_t)0x8c173bda,
+  (q31_t)0x36486c86, (q31_t)0x8c149192, (q31_t)0x3642bbc4, (q31_t)0x8c11e792, (q31_t)0x363d0ae2, (q31_t)0x8c0f3dda, (q31_t)0x363759de, (q31_t)0x8c0c9469,
+  (q31_t)0x3631a8b8, (q31_t)0x8c09eb40, (q31_t)0x362bf771, (q31_t)0x8c07425e, (q31_t)0x36264609, (q31_t)0x8c0499c4, (q31_t)0x3620947f, (q31_t)0x8c01f171,
+  (q31_t)0x361ae2d3, (q31_t)0x8bff4966, (q31_t)0x36153107, (q31_t)0x8bfca1a3, (q31_t)0x360f7f19, (q31_t)0x8bf9fa27, (q31_t)0x3609cd0a, (q31_t)0x8bf752f2,
+  (q31_t)0x36041ad9, (q31_t)0x8bf4ac05, (q31_t)0x35fe6887, (q31_t)0x8bf20560, (q31_t)0x35f8b614, (q31_t)0x8bef5f02, (q31_t)0x35f3037f, (q31_t)0x8becb8ec,
+  (q31_t)0x35ed50c9, (q31_t)0x8bea131e, (q31_t)0x35e79df2, (q31_t)0x8be76d97, (q31_t)0x35e1eafa, (q31_t)0x8be4c857, (q31_t)0x35dc37e0, (q31_t)0x8be22360,
+  (q31_t)0x35d684a6, (q31_t)0x8bdf7eb0, (q31_t)0x35d0d14a, (q31_t)0x8bdcda47, (q31_t)0x35cb1dcc, (q31_t)0x8bda3626, (q31_t)0x35c56a2e, (q31_t)0x8bd7924d,
+  (q31_t)0x35bfb66e, (q31_t)0x8bd4eebc, (q31_t)0x35ba028e, (q31_t)0x8bd24b72, (q31_t)0x35b44e8c, (q31_t)0x8bcfa870, (q31_t)0x35ae9a69, (q31_t)0x8bcd05b5,
+  (q31_t)0x35a8e625, (q31_t)0x8bca6343, (q31_t)0x35a331c0, (q31_t)0x8bc7c117, (q31_t)0x359d7d39, (q31_t)0x8bc51f34, (q31_t)0x3597c892, (q31_t)0x8bc27d98,
+  (q31_t)0x359213c9, (q31_t)0x8bbfdc44, (q31_t)0x358c5ee0, (q31_t)0x8bbd3b38, (q31_t)0x3586a9d5, (q31_t)0x8bba9a73, (q31_t)0x3580f4aa, (q31_t)0x8bb7f9f6,
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+  (q31_t)0x2f41482e, (q31_t)0x890acbf2, (q31_t)0x2f3b7141, (q31_t)0x89087a44, (q31_t)0x2f359a37, (q31_t)0x890628df, (q31_t)0x2f2fc310, (q31_t)0x8903d7c4,
+  (q31_t)0x2f29ebcc, (q31_t)0x890186f2, (q31_t)0x2f24146b, (q31_t)0x88ff3669, (q31_t)0x2f1e3ced, (q31_t)0x88fce62a, (q31_t)0x2f186551, (q31_t)0x88fa9634,
+  (q31_t)0x2f128d99, (q31_t)0x88f84687, (q31_t)0x2f0cb5c3, (q31_t)0x88f5f724, (q31_t)0x2f06ddd1, (q31_t)0x88f3a80b, (q31_t)0x2f0105c1, (q31_t)0x88f1593b,
+  (q31_t)0x2efb2d95, (q31_t)0x88ef0ab4, (q31_t)0x2ef5554b, (q31_t)0x88ecbc77, (q31_t)0x2eef7ce5, (q31_t)0x88ea6e83, (q31_t)0x2ee9a461, (q31_t)0x88e820d9,
+  (q31_t)0x2ee3cbc1, (q31_t)0x88e5d378, (q31_t)0x2eddf304, (q31_t)0x88e38660, (q31_t)0x2ed81a29, (q31_t)0x88e13992, (q31_t)0x2ed24132, (q31_t)0x88deed0e,
+  (q31_t)0x2ecc681e, (q31_t)0x88dca0d3, (q31_t)0x2ec68eed, (q31_t)0x88da54e1, (q31_t)0x2ec0b5a0, (q31_t)0x88d8093a, (q31_t)0x2ebadc35, (q31_t)0x88d5bddb,
+  (q31_t)0x2eb502ae, (q31_t)0x88d372c6, (q31_t)0x2eaf290a, (q31_t)0x88d127fb, (q31_t)0x2ea94f49, (q31_t)0x88cedd79, (q31_t)0x2ea3756b, (q31_t)0x88cc9340,
+  (q31_t)0x2e9d9b70, (q31_t)0x88ca4951, (q31_t)0x2e97c159, (q31_t)0x88c7ffac, (q31_t)0x2e91e725, (q31_t)0x88c5b650, (q31_t)0x2e8c0cd4, (q31_t)0x88c36d3e,
+  (q31_t)0x2e863267, (q31_t)0x88c12475, (q31_t)0x2e8057dd, (q31_t)0x88bedbf6, (q31_t)0x2e7a7d36, (q31_t)0x88bc93c0, (q31_t)0x2e74a272, (q31_t)0x88ba4bd4,
+  (q31_t)0x2e6ec792, (q31_t)0x88b80432, (q31_t)0x2e68ec95, (q31_t)0x88b5bcd9, (q31_t)0x2e63117c, (q31_t)0x88b375ca, (q31_t)0x2e5d3646, (q31_t)0x88b12f04,
+  (q31_t)0x2e575af3, (q31_t)0x88aee888, (q31_t)0x2e517f84, (q31_t)0x88aca255, (q31_t)0x2e4ba3f8, (q31_t)0x88aa5c6c, (q31_t)0x2e45c850, (q31_t)0x88a816cd,
+  (q31_t)0x2e3fec8b, (q31_t)0x88a5d177, (q31_t)0x2e3a10aa, (q31_t)0x88a38c6b, (q31_t)0x2e3434ac, (q31_t)0x88a147a9, (q31_t)0x2e2e5891, (q31_t)0x889f0330,
+  (q31_t)0x2e287c5a, (q31_t)0x889cbf01, (q31_t)0x2e22a007, (q31_t)0x889a7b1b, (q31_t)0x2e1cc397, (q31_t)0x88983780, (q31_t)0x2e16e70b, (q31_t)0x8895f42d,
+  (q31_t)0x2e110a62, (q31_t)0x8893b125, (q31_t)0x2e0b2d9d, (q31_t)0x88916e66, (q31_t)0x2e0550bb, (q31_t)0x888f2bf1, (q31_t)0x2dff73bd, (q31_t)0x888ce9c5,
+  (q31_t)0x2df996a3, (q31_t)0x888aa7e3, (q31_t)0x2df3b96c, (q31_t)0x8888664b, (q31_t)0x2deddc19, (q31_t)0x888624fd, (q31_t)0x2de7feaa, (q31_t)0x8883e3f8,
+  (q31_t)0x2de2211e, (q31_t)0x8881a33d, (q31_t)0x2ddc4376, (q31_t)0x887f62cb, (q31_t)0x2dd665b2, (q31_t)0x887d22a4, (q31_t)0x2dd087d1, (q31_t)0x887ae2c6,
+  (q31_t)0x2dcaa9d5, (q31_t)0x8878a332, (q31_t)0x2dc4cbbc, (q31_t)0x887663e7, (q31_t)0x2dbeed86, (q31_t)0x887424e7, (q31_t)0x2db90f35, (q31_t)0x8871e630,
+  (q31_t)0x2db330c7, (q31_t)0x886fa7c2, (q31_t)0x2dad523d, (q31_t)0x886d699f, (q31_t)0x2da77397, (q31_t)0x886b2bc5, (q31_t)0x2da194d5, (q31_t)0x8868ee35,
+  (q31_t)0x2d9bb5f6, (q31_t)0x8866b0ef, (q31_t)0x2d95d6fc, (q31_t)0x886473f2, (q31_t)0x2d8ff7e5, (q31_t)0x88623740, (q31_t)0x2d8a18b3, (q31_t)0x885ffad7,
+  (q31_t)0x2d843964, (q31_t)0x885dbeb8, (q31_t)0x2d7e59f9, (q31_t)0x885b82e3, (q31_t)0x2d787a72, (q31_t)0x88594757, (q31_t)0x2d729acf, (q31_t)0x88570c16,
+  (q31_t)0x2d6cbb10, (q31_t)0x8854d11e, (q31_t)0x2d66db35, (q31_t)0x88529670, (q31_t)0x2d60fb3e, (q31_t)0x88505c0b, (q31_t)0x2d5b1b2b, (q31_t)0x884e21f1,
+  (q31_t)0x2d553afc, (q31_t)0x884be821, (q31_t)0x2d4f5ab1, (q31_t)0x8849ae9a, (q31_t)0x2d497a4a, (q31_t)0x8847755d, (q31_t)0x2d4399c7, (q31_t)0x88453c6a,
+  (q31_t)0x2d3db928, (q31_t)0x884303c1, (q31_t)0x2d37d86d, (q31_t)0x8840cb61, (q31_t)0x2d31f797, (q31_t)0x883e934c, (q31_t)0x2d2c16a4, (q31_t)0x883c5b81,
+  (q31_t)0x2d263596, (q31_t)0x883a23ff, (q31_t)0x2d20546b, (q31_t)0x8837ecc7, (q31_t)0x2d1a7325, (q31_t)0x8835b5d9, (q31_t)0x2d1491c4, (q31_t)0x88337f35,
+  (q31_t)0x2d0eb046, (q31_t)0x883148db, (q31_t)0x2d08ceac, (q31_t)0x882f12cb, (q31_t)0x2d02ecf7, (q31_t)0x882cdd04, (q31_t)0x2cfd0b26, (q31_t)0x882aa788,
+  (q31_t)0x2cf72939, (q31_t)0x88287256, (q31_t)0x2cf14731, (q31_t)0x88263d6d, (q31_t)0x2ceb650d, (q31_t)0x882408ce, (q31_t)0x2ce582cd, (q31_t)0x8821d47a,
+  (q31_t)0x2cdfa071, (q31_t)0x881fa06f, (q31_t)0x2cd9bdfa, (q31_t)0x881d6cae, (q31_t)0x2cd3db67, (q31_t)0x881b3937, (q31_t)0x2ccdf8b8, (q31_t)0x8819060a,
+  (q31_t)0x2cc815ee, (q31_t)0x8816d327, (q31_t)0x2cc23308, (q31_t)0x8814a08f, (q31_t)0x2cbc5006, (q31_t)0x88126e40, (q31_t)0x2cb66ce9, (q31_t)0x88103c3b,
+  (q31_t)0x2cb089b1, (q31_t)0x880e0a7f, (q31_t)0x2caaa65c, (q31_t)0x880bd90e, (q31_t)0x2ca4c2ed, (q31_t)0x8809a7e7, (q31_t)0x2c9edf61, (q31_t)0x8807770a,
+  (q31_t)0x2c98fbba, (q31_t)0x88054677, (q31_t)0x2c9317f8, (q31_t)0x8803162e, (q31_t)0x2c8d341a, (q31_t)0x8800e62f, (q31_t)0x2c875021, (q31_t)0x87feb67a,
+  (q31_t)0x2c816c0c, (q31_t)0x87fc870f, (q31_t)0x2c7b87dc, (q31_t)0x87fa57ee, (q31_t)0x2c75a390, (q31_t)0x87f82917, (q31_t)0x2c6fbf29, (q31_t)0x87f5fa8b,
+  (q31_t)0x2c69daa6, (q31_t)0x87f3cc48, (q31_t)0x2c63f609, (q31_t)0x87f19e4f, (q31_t)0x2c5e114f, (q31_t)0x87ef70a0, (q31_t)0x2c582c7b, (q31_t)0x87ed433c,
+  (q31_t)0x2c52478a, (q31_t)0x87eb1621, (q31_t)0x2c4c627f, (q31_t)0x87e8e950, (q31_t)0x2c467d58, (q31_t)0x87e6bcca, (q31_t)0x2c409816, (q31_t)0x87e4908e,
+  (q31_t)0x2c3ab2b9, (q31_t)0x87e2649b, (q31_t)0x2c34cd40, (q31_t)0x87e038f3, (q31_t)0x2c2ee7ad, (q31_t)0x87de0d95, (q31_t)0x2c2901fd, (q31_t)0x87dbe281,
+  (q31_t)0x2c231c33, (q31_t)0x87d9b7b7, (q31_t)0x2c1d364e, (q31_t)0x87d78d38, (q31_t)0x2c17504d, (q31_t)0x87d56302, (q31_t)0x2c116a31, (q31_t)0x87d33916,
+  (q31_t)0x2c0b83fa, (q31_t)0x87d10f75, (q31_t)0x2c059da7, (q31_t)0x87cee61e, (q31_t)0x2bffb73a, (q31_t)0x87ccbd11, (q31_t)0x2bf9d0b1, (q31_t)0x87ca944e,
+  (q31_t)0x2bf3ea0d, (q31_t)0x87c86bd5, (q31_t)0x2bee034e, (q31_t)0x87c643a6, (q31_t)0x2be81c74, (q31_t)0x87c41bc2, (q31_t)0x2be2357f, (q31_t)0x87c1f427,
+  (q31_t)0x2bdc4e6f, (q31_t)0x87bfccd7, (q31_t)0x2bd66744, (q31_t)0x87bda5d1, (q31_t)0x2bd07ffe, (q31_t)0x87bb7f16, (q31_t)0x2bca989d, (q31_t)0x87b958a4,
+  (q31_t)0x2bc4b120, (q31_t)0x87b7327d, (q31_t)0x2bbec989, (q31_t)0x87b50c9f, (q31_t)0x2bb8e1d7, (q31_t)0x87b2e70c, (q31_t)0x2bb2fa0a, (q31_t)0x87b0c1c4,
+  (q31_t)0x2bad1221, (q31_t)0x87ae9cc5, (q31_t)0x2ba72a1e, (q31_t)0x87ac7811, (q31_t)0x2ba14200, (q31_t)0x87aa53a6, (q31_t)0x2b9b59c7, (q31_t)0x87a82f87,
+  (q31_t)0x2b957173, (q31_t)0x87a60bb1, (q31_t)0x2b8f8905, (q31_t)0x87a3e825, (q31_t)0x2b89a07b, (q31_t)0x87a1c4e4, (q31_t)0x2b83b7d7, (q31_t)0x879fa1ed,
+  (q31_t)0x2b7dcf17, (q31_t)0x879d7f41, (q31_t)0x2b77e63d, (q31_t)0x879b5cde, (q31_t)0x2b71fd48, (q31_t)0x87993ac6, (q31_t)0x2b6c1438, (q31_t)0x879718f8,
+  (q31_t)0x2b662b0e, (q31_t)0x8794f774, (q31_t)0x2b6041c9, (q31_t)0x8792d63b, (q31_t)0x2b5a5868, (q31_t)0x8790b54c, (q31_t)0x2b546eee, (q31_t)0x878e94a7,
+  (q31_t)0x2b4e8558, (q31_t)0x878c744d, (q31_t)0x2b489ba8, (q31_t)0x878a543d, (q31_t)0x2b42b1dd, (q31_t)0x87883477, (q31_t)0x2b3cc7f7, (q31_t)0x878614fb,
+  (q31_t)0x2b36ddf7, (q31_t)0x8783f5ca, (q31_t)0x2b30f3dc, (q31_t)0x8781d6e3, (q31_t)0x2b2b09a6, (q31_t)0x877fb846, (q31_t)0x2b251f56, (q31_t)0x877d99f4,
+  (q31_t)0x2b1f34eb, (q31_t)0x877b7bec, (q31_t)0x2b194a66, (q31_t)0x87795e2f, (q31_t)0x2b135fc6, (q31_t)0x877740bb, (q31_t)0x2b0d750b, (q31_t)0x87752392,
+  (q31_t)0x2b078a36, (q31_t)0x877306b4, (q31_t)0x2b019f46, (q31_t)0x8770ea20, (q31_t)0x2afbb43c, (q31_t)0x876ecdd6, (q31_t)0x2af5c917, (q31_t)0x876cb1d6,
+  (q31_t)0x2aefddd8, (q31_t)0x876a9621, (q31_t)0x2ae9f27e, (q31_t)0x87687ab7, (q31_t)0x2ae4070a, (q31_t)0x87665f96, (q31_t)0x2ade1b7c, (q31_t)0x876444c1,
+  (q31_t)0x2ad82fd2, (q31_t)0x87622a35, (q31_t)0x2ad2440f, (q31_t)0x87600ff4, (q31_t)0x2acc5831, (q31_t)0x875df5fd, (q31_t)0x2ac66c39, (q31_t)0x875bdc51,
+  (q31_t)0x2ac08026, (q31_t)0x8759c2ef, (q31_t)0x2aba93f9, (q31_t)0x8757a9d8, (q31_t)0x2ab4a7b1, (q31_t)0x8755910b, (q31_t)0x2aaebb50, (q31_t)0x87537888,
+  (q31_t)0x2aa8ced3, (q31_t)0x87516050, (q31_t)0x2aa2e23d, (q31_t)0x874f4862, (q31_t)0x2a9cf58c, (q31_t)0x874d30bf, (q31_t)0x2a9708c1, (q31_t)0x874b1966,
+  (q31_t)0x2a911bdc, (q31_t)0x87490258, (q31_t)0x2a8b2edc, (q31_t)0x8746eb94, (q31_t)0x2a8541c3, (q31_t)0x8744d51b, (q31_t)0x2a7f548e, (q31_t)0x8742beec,
+  (q31_t)0x2a796740, (q31_t)0x8740a907, (q31_t)0x2a7379d8, (q31_t)0x873e936d, (q31_t)0x2a6d8c55, (q31_t)0x873c7e1e, (q31_t)0x2a679eb8, (q31_t)0x873a6919,
+  (q31_t)0x2a61b101, (q31_t)0x8738545e, (q31_t)0x2a5bc330, (q31_t)0x87363fee, (q31_t)0x2a55d545, (q31_t)0x87342bc9, (q31_t)0x2a4fe740, (q31_t)0x873217ee,
+  (q31_t)0x2a49f920, (q31_t)0x8730045d, (q31_t)0x2a440ae7, (q31_t)0x872df117, (q31_t)0x2a3e1c93, (q31_t)0x872bde1c, (q31_t)0x2a382e25, (q31_t)0x8729cb6b,
+  (q31_t)0x2a323f9e, (q31_t)0x8727b905, (q31_t)0x2a2c50fc, (q31_t)0x8725a6e9, (q31_t)0x2a266240, (q31_t)0x87239518, (q31_t)0x2a20736a, (q31_t)0x87218391,
+  (q31_t)0x2a1a847b, (q31_t)0x871f7255, (q31_t)0x2a149571, (q31_t)0x871d6163, (q31_t)0x2a0ea64d, (q31_t)0x871b50bc, (q31_t)0x2a08b710, (q31_t)0x87194060,
+  (q31_t)0x2a02c7b8, (q31_t)0x8717304e, (q31_t)0x29fcd847, (q31_t)0x87152087, (q31_t)0x29f6e8bb, (q31_t)0x8713110a, (q31_t)0x29f0f916, (q31_t)0x871101d8,
+  (q31_t)0x29eb0957, (q31_t)0x870ef2f1, (q31_t)0x29e5197e, (q31_t)0x870ce454, (q31_t)0x29df298b, (q31_t)0x870ad602, (q31_t)0x29d9397f, (q31_t)0x8708c7fa,
+  (q31_t)0x29d34958, (q31_t)0x8706ba3d, (q31_t)0x29cd5918, (q31_t)0x8704acca, (q31_t)0x29c768be, (q31_t)0x87029fa3, (q31_t)0x29c1784a, (q31_t)0x870092c5,
+  (q31_t)0x29bb87bc, (q31_t)0x86fe8633, (q31_t)0x29b59715, (q31_t)0x86fc79eb, (q31_t)0x29afa654, (q31_t)0x86fa6dee, (q31_t)0x29a9b579, (q31_t)0x86f8623b,
+  (q31_t)0x29a3c485, (q31_t)0x86f656d3, (q31_t)0x299dd377, (q31_t)0x86f44bb6, (q31_t)0x2997e24f, (q31_t)0x86f240e3, (q31_t)0x2991f10e, (q31_t)0x86f0365c,
+  (q31_t)0x298bffb2, (q31_t)0x86ee2c1e, (q31_t)0x29860e3e, (q31_t)0x86ec222c, (q31_t)0x29801caf, (q31_t)0x86ea1884, (q31_t)0x297a2b07, (q31_t)0x86e80f27,
+  (q31_t)0x29743946, (q31_t)0x86e60614, (q31_t)0x296e476b, (q31_t)0x86e3fd4c, (q31_t)0x29685576, (q31_t)0x86e1f4cf, (q31_t)0x29626368, (q31_t)0x86dfec9d,
+  (q31_t)0x295c7140, (q31_t)0x86dde4b5, (q31_t)0x29567eff, (q31_t)0x86dbdd18, (q31_t)0x29508ca4, (q31_t)0x86d9d5c6, (q31_t)0x294a9a30, (q31_t)0x86d7cebf,
+  (q31_t)0x2944a7a2, (q31_t)0x86d5c802, (q31_t)0x293eb4fb, (q31_t)0x86d3c190, (q31_t)0x2938c23a, (q31_t)0x86d1bb69, (q31_t)0x2932cf60, (q31_t)0x86cfb58c,
+  (q31_t)0x292cdc6d, (q31_t)0x86cdaffa, (q31_t)0x2926e960, (q31_t)0x86cbaab3, (q31_t)0x2920f63a, (q31_t)0x86c9a5b7, (q31_t)0x291b02fa, (q31_t)0x86c7a106,
+  (q31_t)0x29150fa1, (q31_t)0x86c59c9f, (q31_t)0x290f1c2f, (q31_t)0x86c39883, (q31_t)0x290928a3, (q31_t)0x86c194b2, (q31_t)0x290334ff, (q31_t)0x86bf912c,
+  (q31_t)0x28fd4140, (q31_t)0x86bd8df0, (q31_t)0x28f74d69, (q31_t)0x86bb8b00, (q31_t)0x28f15978, (q31_t)0x86b9885a, (q31_t)0x28eb656e, (q31_t)0x86b785ff,
+  (q31_t)0x28e5714b, (q31_t)0x86b583ee, (q31_t)0x28df7d0e, (q31_t)0x86b38229, (q31_t)0x28d988b8, (q31_t)0x86b180ae, (q31_t)0x28d3944a, (q31_t)0x86af7f7e,
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+  (q31_t)0x23d6cc87, (q31_t)0x851ea652, (q31_t)0x23d0c453, (q31_t)0x851ce41a, (q31_t)0x23cabc09, (q31_t)0x851b222e, (q31_t)0x23c4b3a9, (q31_t)0x8519608d,
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+  (q31_t)0x235e1826, (q31_t)0x84fbb239, (q31_t)0x23580e3b, (q31_t)0x84f9f5ee, (q31_t)0x2352043b, (q31_t)0x84f839ee, (q31_t)0x234bfa24, (q31_t)0x84f67e3b,
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+  (q31_t)0x22e541af, (q31_t)0x84d934b1, (q31_t)0x22df3613, (q31_t)0x84d77e54, (q31_t)0x22d92a61, (q31_t)0x84d5c844, (q31_t)0x22d31e9a, (q31_t)0x84d4127f,
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+  (q31_t)0x229cb0d5, (q31_t)0x84c4bbf0, (q31_t)0x2296a437, (q31_t)0x84c30924, (q31_t)0x22909785, (q31_t)0x84c156a3, (q31_t)0x228a8abd, (q31_t)0x84bfa46e,
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+  (q31_t)0x225413f8, (q31_t)0x84b06df2, (q31_t)0x224e065c, (q31_t)0x84aebeb6, (q31_t)0x2247f8aa, (q31_t)0x84ad0fc6, (q31_t)0x2241eae3, (q31_t)0x84ab6122,
+  (q31_t)0x223bdd08, (q31_t)0x84a9b2ca, (q31_t)0x2235cf17, (q31_t)0x84a804be, (q31_t)0x222fc111, (q31_t)0x84a656fe, (q31_t)0x2229b2f6, (q31_t)0x84a4a98a,
+  (q31_t)0x2223a4c5, (q31_t)0x84a2fc62, (q31_t)0x221d9680, (q31_t)0x84a14f87, (q31_t)0x22178826, (q31_t)0x849fa2f7, (q31_t)0x221179b7, (q31_t)0x849df6b4,
+  (q31_t)0x220b6b32, (q31_t)0x849c4abd, (q31_t)0x22055c99, (q31_t)0x849a9f12, (q31_t)0x21ff4dea, (q31_t)0x8498f3b3, (q31_t)0x21f93f27, (q31_t)0x849748a0,
+  (q31_t)0x21f3304f, (q31_t)0x84959dd9, (q31_t)0x21ed2162, (q31_t)0x8493f35e, (q31_t)0x21e71260, (q31_t)0x84924930, (q31_t)0x21e10349, (q31_t)0x84909f4e,
+  (q31_t)0x21daf41d, (q31_t)0x848ef5b7, (q31_t)0x21d4e4dc, (q31_t)0x848d4c6d, (q31_t)0x21ced586, (q31_t)0x848ba36f, (q31_t)0x21c8c61c, (q31_t)0x8489fabe,
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+  (q31_t)0x21aa77cf, (q31_t)0x8481b3bb, (q31_t)0x21a467e7, (q31_t)0x84800cd2, (q31_t)0x219e57eb, (q31_t)0x847e6636, (q31_t)0x219847da, (q31_t)0x847cbfe5,
+  (q31_t)0x219237b5, (q31_t)0x847b19e1, (q31_t)0x218c277a, (q31_t)0x84797429, (q31_t)0x2186172b, (q31_t)0x8477cebd, (q31_t)0x218006c8, (q31_t)0x8476299e,
+  (q31_t)0x2179f64f, (q31_t)0x847484ca, (q31_t)0x2173e5c2, (q31_t)0x8472e043, (q31_t)0x216dd521, (q31_t)0x84713c08, (q31_t)0x2167c46b, (q31_t)0x846f9819,
+  (q31_t)0x2161b3a0, (q31_t)0x846df477, (q31_t)0x215ba2c0, (q31_t)0x846c5120, (q31_t)0x215591cc, (q31_t)0x846aae16, (q31_t)0x214f80c4, (q31_t)0x84690b58,
+  (q31_t)0x21496fa7, (q31_t)0x846768e7, (q31_t)0x21435e75, (q31_t)0x8465c6c1, (q31_t)0x213d4d2f, (q31_t)0x846424e8, (q31_t)0x21373bd4, (q31_t)0x8462835b,
+  (q31_t)0x21312a65, (q31_t)0x8460e21a, (q31_t)0x212b18e1, (q31_t)0x845f4126, (q31_t)0x21250749, (q31_t)0x845da07e, (q31_t)0x211ef59d, (q31_t)0x845c0022,
+  (q31_t)0x2118e3dc, (q31_t)0x845a6012, (q31_t)0x2112d206, (q31_t)0x8458c04f, (q31_t)0x210cc01d, (q31_t)0x845720d8, (q31_t)0x2106ae1e, (q31_t)0x845581ad,
+  (q31_t)0x21009c0c, (q31_t)0x8453e2cf, (q31_t)0x20fa89e5, (q31_t)0x8452443d, (q31_t)0x20f477aa, (q31_t)0x8450a5f7, (q31_t)0x20ee655a, (q31_t)0x844f07fd,
+  (q31_t)0x20e852f6, (q31_t)0x844d6a50, (q31_t)0x20e2407e, (q31_t)0x844bccef, (q31_t)0x20dc2df2, (q31_t)0x844a2fda, (q31_t)0x20d61b51, (q31_t)0x84489311,
+  (q31_t)0x20d0089c, (q31_t)0x8446f695, (q31_t)0x20c9f5d3, (q31_t)0x84455a66, (q31_t)0x20c3e2f5, (q31_t)0x8443be82, (q31_t)0x20bdd003, (q31_t)0x844222eb,
+  (q31_t)0x20b7bcfe, (q31_t)0x844087a0, (q31_t)0x20b1a9e4, (q31_t)0x843eeca2, (q31_t)0x20ab96b5, (q31_t)0x843d51f0, (q31_t)0x20a58373, (q31_t)0x843bb78a,
+  (q31_t)0x209f701c, (q31_t)0x843a1d70, (q31_t)0x20995cb2, (q31_t)0x843883a3, (q31_t)0x20934933, (q31_t)0x8436ea23, (q31_t)0x208d35a0, (q31_t)0x843550ee,
+  (q31_t)0x208721f9, (q31_t)0x8433b806, (q31_t)0x20810e3e, (q31_t)0x84321f6b, (q31_t)0x207afa6f, (q31_t)0x8430871b, (q31_t)0x2074e68c, (q31_t)0x842eef18,
+  (q31_t)0x206ed295, (q31_t)0x842d5762, (q31_t)0x2068be8a, (q31_t)0x842bbff8, (q31_t)0x2062aa6b, (q31_t)0x842a28da, (q31_t)0x205c9638, (q31_t)0x84289209,
+  (q31_t)0x205681f1, (q31_t)0x8426fb84, (q31_t)0x20506d96, (q31_t)0x8425654b, (q31_t)0x204a5927, (q31_t)0x8423cf5f, (q31_t)0x204444a4, (q31_t)0x842239bf,
+  (q31_t)0x203e300d, (q31_t)0x8420a46c, (q31_t)0x20381b63, (q31_t)0x841f0f65, (q31_t)0x203206a4, (q31_t)0x841d7aaa, (q31_t)0x202bf1d2, (q31_t)0x841be63c,
+  (q31_t)0x2025dcec, (q31_t)0x841a521a, (q31_t)0x201fc7f2, (q31_t)0x8418be45, (q31_t)0x2019b2e4, (q31_t)0x84172abc, (q31_t)0x20139dc2, (q31_t)0x84159780,
+  (q31_t)0x200d888d, (q31_t)0x84140490, (q31_t)0x20077344, (q31_t)0x841271ec, (q31_t)0x20015de7, (q31_t)0x8410df95, (q31_t)0x1ffb4876, (q31_t)0x840f4d8a,
+  (q31_t)0x1ff532f2, (q31_t)0x840dbbcc, (q31_t)0x1fef1d59, (q31_t)0x840c2a5a, (q31_t)0x1fe907ae, (q31_t)0x840a9935, (q31_t)0x1fe2f1ee, (q31_t)0x8409085c,
+  (q31_t)0x1fdcdc1b, (q31_t)0x840777d0, (q31_t)0x1fd6c634, (q31_t)0x8405e790, (q31_t)0x1fd0b03a, (q31_t)0x8404579d, (q31_t)0x1fca9a2b, (q31_t)0x8402c7f6,
+  (q31_t)0x1fc4840a, (q31_t)0x8401389b, (q31_t)0x1fbe6dd4, (q31_t)0x83ffa98d, (q31_t)0x1fb8578b, (q31_t)0x83fe1acc, (q31_t)0x1fb2412f, (q31_t)0x83fc8c57,
+  (q31_t)0x1fac2abf, (q31_t)0x83fafe2e, (q31_t)0x1fa6143b, (q31_t)0x83f97052, (q31_t)0x1f9ffda4, (q31_t)0x83f7e2c3, (q31_t)0x1f99e6fa, (q31_t)0x83f65580,
+  (q31_t)0x1f93d03c, (q31_t)0x83f4c889, (q31_t)0x1f8db96a, (q31_t)0x83f33bdf, (q31_t)0x1f87a285, (q31_t)0x83f1af82, (q31_t)0x1f818b8d, (q31_t)0x83f02371,
+  (q31_t)0x1f7b7481, (q31_t)0x83ee97ad, (q31_t)0x1f755d61, (q31_t)0x83ed0c35, (q31_t)0x1f6f462f, (q31_t)0x83eb810a, (q31_t)0x1f692ee9, (q31_t)0x83e9f62b,
+  (q31_t)0x1f63178f, (q31_t)0x83e86b99, (q31_t)0x1f5d0022, (q31_t)0x83e6e153, (q31_t)0x1f56e8a2, (q31_t)0x83e5575a, (q31_t)0x1f50d10e, (q31_t)0x83e3cdad,
+  (q31_t)0x1f4ab968, (q31_t)0x83e2444d, (q31_t)0x1f44a1ad, (q31_t)0x83e0bb3a, (q31_t)0x1f3e89e0, (q31_t)0x83df3273, (q31_t)0x1f3871ff, (q31_t)0x83dda9f9,
+  (q31_t)0x1f325a0b, (q31_t)0x83dc21cb, (q31_t)0x1f2c4204, (q31_t)0x83da99ea, (q31_t)0x1f2629ea, (q31_t)0x83d91255, (q31_t)0x1f2011bc, (q31_t)0x83d78b0d,
+  (q31_t)0x1f19f97b, (q31_t)0x83d60412, (q31_t)0x1f13e127, (q31_t)0x83d47d63, (q31_t)0x1f0dc8c0, (q31_t)0x83d2f701, (q31_t)0x1f07b045, (q31_t)0x83d170eb,
+  (q31_t)0x1f0197b8, (q31_t)0x83cfeb22, (q31_t)0x1efb7f17, (q31_t)0x83ce65a6, (q31_t)0x1ef56664, (q31_t)0x83cce076, (q31_t)0x1eef4d9d, (q31_t)0x83cb5b93,
+  (q31_t)0x1ee934c3, (q31_t)0x83c9d6fc, (q31_t)0x1ee31bd6, (q31_t)0x83c852b2, (q31_t)0x1edd02d6, (q31_t)0x83c6ceb5, (q31_t)0x1ed6e9c3, (q31_t)0x83c54b04,
+  (q31_t)0x1ed0d09d, (q31_t)0x83c3c7a0, (q31_t)0x1ecab763, (q31_t)0x83c24488, (q31_t)0x1ec49e17, (q31_t)0x83c0c1be, (q31_t)0x1ebe84b8, (q31_t)0x83bf3f3f,
+  (q31_t)0x1eb86b46, (q31_t)0x83bdbd0e, (q31_t)0x1eb251c1, (q31_t)0x83bc3b29, (q31_t)0x1eac3829, (q31_t)0x83bab991, (q31_t)0x1ea61e7e, (q31_t)0x83b93845,
+  (q31_t)0x1ea004c1, (q31_t)0x83b7b746, (q31_t)0x1e99eaf0, (q31_t)0x83b63694, (q31_t)0x1e93d10c, (q31_t)0x83b4b62e, (q31_t)0x1e8db716, (q31_t)0x83b33616,
+  (q31_t)0x1e879d0d, (q31_t)0x83b1b649, (q31_t)0x1e8182f1, (q31_t)0x83b036ca, (q31_t)0x1e7b68c2, (q31_t)0x83aeb797, (q31_t)0x1e754e80, (q31_t)0x83ad38b1,
+  (q31_t)0x1e6f342c, (q31_t)0x83abba17, (q31_t)0x1e6919c4, (q31_t)0x83aa3bca, (q31_t)0x1e62ff4a, (q31_t)0x83a8bdca, (q31_t)0x1e5ce4be, (q31_t)0x83a74017,
+  (q31_t)0x1e56ca1e, (q31_t)0x83a5c2b0, (q31_t)0x1e50af6c, (q31_t)0x83a44596, (q31_t)0x1e4a94a7, (q31_t)0x83a2c8c9, (q31_t)0x1e4479cf, (q31_t)0x83a14c48,
+  (q31_t)0x1e3e5ee5, (q31_t)0x839fd014, (q31_t)0x1e3843e8, (q31_t)0x839e542d, (q31_t)0x1e3228d9, (q31_t)0x839cd893, (q31_t)0x1e2c0db6, (q31_t)0x839b5d45,
+  (q31_t)0x1e25f282, (q31_t)0x8399e244, (q31_t)0x1e1fd73a, (q31_t)0x83986790, (q31_t)0x1e19bbe0, (q31_t)0x8396ed29, (q31_t)0x1e13a074, (q31_t)0x8395730e,
+  (q31_t)0x1e0d84f5, (q31_t)0x8393f940, (q31_t)0x1e076963, (q31_t)0x83927fbf, (q31_t)0x1e014dbf, (q31_t)0x8391068a, (q31_t)0x1dfb3208, (q31_t)0x838f8da2,
+  (q31_t)0x1df5163f, (q31_t)0x838e1507, (q31_t)0x1deefa63, (q31_t)0x838c9cb9, (q31_t)0x1de8de75, (q31_t)0x838b24b8, (q31_t)0x1de2c275, (q31_t)0x8389ad03,
+  (q31_t)0x1ddca662, (q31_t)0x8388359b, (q31_t)0x1dd68a3c, (q31_t)0x8386be80, (q31_t)0x1dd06e04, (q31_t)0x838547b2, (q31_t)0x1dca51ba, (q31_t)0x8383d130,
+  (q31_t)0x1dc4355e, (q31_t)0x83825afb, (q31_t)0x1dbe18ef, (q31_t)0x8380e513, (q31_t)0x1db7fc6d, (q31_t)0x837f6f78, (q31_t)0x1db1dfda, (q31_t)0x837dfa2a,
+  (q31_t)0x1dabc334, (q31_t)0x837c8528, (q31_t)0x1da5a67c, (q31_t)0x837b1074, (q31_t)0x1d9f89b1, (q31_t)0x83799c0c, (q31_t)0x1d996cd4, (q31_t)0x837827f0,
+  (q31_t)0x1d934fe5, (q31_t)0x8376b422, (q31_t)0x1d8d32e4, (q31_t)0x837540a1, (q31_t)0x1d8715d0, (q31_t)0x8373cd6c, (q31_t)0x1d80f8ab, (q31_t)0x83725a84,
+  (q31_t)0x1d7adb73, (q31_t)0x8370e7e9, (q31_t)0x1d74be29, (q31_t)0x836f759b, (q31_t)0x1d6ea0cc, (q31_t)0x836e039a, (q31_t)0x1d68835e, (q31_t)0x836c91e5,
+  (q31_t)0x1d6265dd, (q31_t)0x836b207d, (q31_t)0x1d5c484b, (q31_t)0x8369af63, (q31_t)0x1d562aa6, (q31_t)0x83683e95, (q31_t)0x1d500cef, (q31_t)0x8366ce14,
+  (q31_t)0x1d49ef26, (q31_t)0x83655ddf, (q31_t)0x1d43d14b, (q31_t)0x8363edf8, (q31_t)0x1d3db35e, (q31_t)0x83627e5d, (q31_t)0x1d37955e, (q31_t)0x83610f10,
+  (q31_t)0x1d31774d, (q31_t)0x835fa00f, (q31_t)0x1d2b592a, (q31_t)0x835e315b, (q31_t)0x1d253af5, (q31_t)0x835cc2f4, (q31_t)0x1d1f1cae, (q31_t)0x835b54da,
+  (q31_t)0x1d18fe54, (q31_t)0x8359e70d, (q31_t)0x1d12dfe9, (q31_t)0x8358798c, (q31_t)0x1d0cc16c, (q31_t)0x83570c59, (q31_t)0x1d06a2dd, (q31_t)0x83559f72,
+  (q31_t)0x1d00843d, (q31_t)0x835432d8, (q31_t)0x1cfa658a, (q31_t)0x8352c68c, (q31_t)0x1cf446c5, (q31_t)0x83515a8c, (q31_t)0x1cee27ef, (q31_t)0x834feed9,
+  (q31_t)0x1ce80906, (q31_t)0x834e8373, (q31_t)0x1ce1ea0c, (q31_t)0x834d185a, (q31_t)0x1cdbcb00, (q31_t)0x834bad8e, (q31_t)0x1cd5abe3, (q31_t)0x834a430e,
+  (q31_t)0x1ccf8cb3, (q31_t)0x8348d8dc, (q31_t)0x1cc96d72, (q31_t)0x83476ef6, (q31_t)0x1cc34e1f, (q31_t)0x8346055e, (q31_t)0x1cbd2eba, (q31_t)0x83449c12,
+  (q31_t)0x1cb70f43, (q31_t)0x83433314, (q31_t)0x1cb0efbb, (q31_t)0x8341ca62, (q31_t)0x1caad021, (q31_t)0x834061fd, (q31_t)0x1ca4b075, (q31_t)0x833ef9e6,
+  (q31_t)0x1c9e90b8, (q31_t)0x833d921b, (q31_t)0x1c9870e9, (q31_t)0x833c2a9d, (q31_t)0x1c925109, (q31_t)0x833ac36c, (q31_t)0x1c8c3116, (q31_t)0x83395c88,
+  (q31_t)0x1c861113, (q31_t)0x8337f5f1, (q31_t)0x1c7ff0fd, (q31_t)0x83368fa7, (q31_t)0x1c79d0d6, (q31_t)0x833529aa, (q31_t)0x1c73b09d, (q31_t)0x8333c3fa,
+  (q31_t)0x1c6d9053, (q31_t)0x83325e97, (q31_t)0x1c676ff8, (q31_t)0x8330f981, (q31_t)0x1c614f8b, (q31_t)0x832f94b8, (q31_t)0x1c5b2f0c, (q31_t)0x832e303c,
+  (q31_t)0x1c550e7c, (q31_t)0x832ccc0d, (q31_t)0x1c4eedda, (q31_t)0x832b682b, (q31_t)0x1c48cd27, (q31_t)0x832a0496, (q31_t)0x1c42ac62, (q31_t)0x8328a14d,
+  (q31_t)0x1c3c8b8c, (q31_t)0x83273e52, (q31_t)0x1c366aa5, (q31_t)0x8325dba4, (q31_t)0x1c3049ac, (q31_t)0x83247943, (q31_t)0x1c2a28a2, (q31_t)0x8323172f,
+  (q31_t)0x1c240786, (q31_t)0x8321b568, (q31_t)0x1c1de659, (q31_t)0x832053ee, (q31_t)0x1c17c51b, (q31_t)0x831ef2c1, (q31_t)0x1c11a3cb, (q31_t)0x831d91e1,
+  (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1c0560f8, (q31_t)0x831ad109, (q31_t)0x1bff3f75, (q31_t)0x83197110, (q31_t)0x1bf91de0, (q31_t)0x83181164,
+  (q31_t)0x1bf2fc3a, (q31_t)0x8316b205, (q31_t)0x1becda83, (q31_t)0x831552f4, (q31_t)0x1be6b8ba, (q31_t)0x8313f42f, (q31_t)0x1be096e0, (q31_t)0x831295b7,
+  (q31_t)0x1bda74f6, (q31_t)0x8311378d, (q31_t)0x1bd452f9, (q31_t)0x830fd9af, (q31_t)0x1bce30ec, (q31_t)0x830e7c1f, (q31_t)0x1bc80ece, (q31_t)0x830d1edc,
+  (q31_t)0x1bc1ec9e, (q31_t)0x830bc1e6, (q31_t)0x1bbbca5e, (q31_t)0x830a653c, (q31_t)0x1bb5a80c, (q31_t)0x830908e0, (q31_t)0x1baf85a9, (q31_t)0x8307acd1,
+  (q31_t)0x1ba96335, (q31_t)0x83065110, (q31_t)0x1ba340b0, (q31_t)0x8304f59b, (q31_t)0x1b9d1e1a, (q31_t)0x83039a73, (q31_t)0x1b96fb73, (q31_t)0x83023f98,
+  (q31_t)0x1b90d8bb, (q31_t)0x8300e50b, (q31_t)0x1b8ab5f2, (q31_t)0x82ff8acb, (q31_t)0x1b849317, (q31_t)0x82fe30d7, (q31_t)0x1b7e702c, (q31_t)0x82fcd731,
+  (q31_t)0x1b784d30, (q31_t)0x82fb7dd8, (q31_t)0x1b722a23, (q31_t)0x82fa24cc, (q31_t)0x1b6c0705, (q31_t)0x82f8cc0d, (q31_t)0x1b65e3d7, (q31_t)0x82f7739c,
+  (q31_t)0x1b5fc097, (q31_t)0x82f61b77, (q31_t)0x1b599d46, (q31_t)0x82f4c3a0, (q31_t)0x1b5379e5, (q31_t)0x82f36c15, (q31_t)0x1b4d5672, (q31_t)0x82f214d8,
+  (q31_t)0x1b4732ef, (q31_t)0x82f0bde8, (q31_t)0x1b410f5b, (q31_t)0x82ef6745, (q31_t)0x1b3aebb6, (q31_t)0x82ee10ef, (q31_t)0x1b34c801, (q31_t)0x82ecbae7,
+  (q31_t)0x1b2ea43a, (q31_t)0x82eb652b, (q31_t)0x1b288063, (q31_t)0x82ea0fbd, (q31_t)0x1b225c7b, (q31_t)0x82e8ba9c, (q31_t)0x1b1c3883, (q31_t)0x82e765c8,
+  (q31_t)0x1b161479, (q31_t)0x82e61141, (q31_t)0x1b0ff05f, (q31_t)0x82e4bd07, (q31_t)0x1b09cc34, (q31_t)0x82e3691b, (q31_t)0x1b03a7f9, (q31_t)0x82e2157c,
+  (q31_t)0x1afd83ad, (q31_t)0x82e0c22a, (q31_t)0x1af75f50, (q31_t)0x82df6f25, (q31_t)0x1af13ae3, (q31_t)0x82de1c6d, (q31_t)0x1aeb1665, (q31_t)0x82dcca02,
+  (q31_t)0x1ae4f1d6, (q31_t)0x82db77e5, (q31_t)0x1adecd37, (q31_t)0x82da2615, (q31_t)0x1ad8a887, (q31_t)0x82d8d492, (q31_t)0x1ad283c7, (q31_t)0x82d7835c,
+  (q31_t)0x1acc5ef6, (q31_t)0x82d63274, (q31_t)0x1ac63a14, (q31_t)0x82d4e1d8, (q31_t)0x1ac01522, (q31_t)0x82d3918a, (q31_t)0x1ab9f020, (q31_t)0x82d24189,
+  (q31_t)0x1ab3cb0d, (q31_t)0x82d0f1d5, (q31_t)0x1aada5e9, (q31_t)0x82cfa26f, (q31_t)0x1aa780b6, (q31_t)0x82ce5356, (q31_t)0x1aa15b71, (q31_t)0x82cd048a,
+  (q31_t)0x1a9b361d, (q31_t)0x82cbb60b, (q31_t)0x1a9510b7, (q31_t)0x82ca67d9, (q31_t)0x1a8eeb42, (q31_t)0x82c919f5, (q31_t)0x1a88c5bc, (q31_t)0x82c7cc5e,
+  (q31_t)0x1a82a026, (q31_t)0x82c67f14, (q31_t)0x1a7c7a7f, (q31_t)0x82c53217, (q31_t)0x1a7654c8, (q31_t)0x82c3e568, (q31_t)0x1a702f01, (q31_t)0x82c29906,
+  (q31_t)0x1a6a0929, (q31_t)0x82c14cf1, (q31_t)0x1a63e341, (q31_t)0x82c00129, (q31_t)0x1a5dbd49, (q31_t)0x82beb5af, (q31_t)0x1a579741, (q31_t)0x82bd6a82,
+  (q31_t)0x1a517128, (q31_t)0x82bc1fa2, (q31_t)0x1a4b4aff, (q31_t)0x82bad50f, (q31_t)0x1a4524c6, (q31_t)0x82b98aca, (q31_t)0x1a3efe7c, (q31_t)0x82b840d2,
+  (q31_t)0x1a38d823, (q31_t)0x82b6f727, (q31_t)0x1a32b1b9, (q31_t)0x82b5adca, (q31_t)0x1a2c8b3f, (q31_t)0x82b464ba, (q31_t)0x1a2664b5, (q31_t)0x82b31bf7,
+  (q31_t)0x1a203e1b, (q31_t)0x82b1d381, (q31_t)0x1a1a1771, (q31_t)0x82b08b59, (q31_t)0x1a13f0b6, (q31_t)0x82af437e, (q31_t)0x1a0dc9ec, (q31_t)0x82adfbf0,
+  (q31_t)0x1a07a311, (q31_t)0x82acb4b0, (q31_t)0x1a017c27, (q31_t)0x82ab6dbd, (q31_t)0x19fb552c, (q31_t)0x82aa2717, (q31_t)0x19f52e22, (q31_t)0x82a8e0bf,
+  (q31_t)0x19ef0707, (q31_t)0x82a79ab3, (q31_t)0x19e8dfdc, (q31_t)0x82a654f6, (q31_t)0x19e2b8a2, (q31_t)0x82a50f85, (q31_t)0x19dc9157, (q31_t)0x82a3ca62,
+  (q31_t)0x19d669fc, (q31_t)0x82a2858c, (q31_t)0x19d04292, (q31_t)0x82a14104, (q31_t)0x19ca1b17, (q31_t)0x829ffcc8, (q31_t)0x19c3f38d, (q31_t)0x829eb8db,
+  (q31_t)0x19bdcbf3, (q31_t)0x829d753a, (q31_t)0x19b7a449, (q31_t)0x829c31e7, (q31_t)0x19b17c8f, (q31_t)0x829aeee1, (q31_t)0x19ab54c5, (q31_t)0x8299ac29,
+  (q31_t)0x19a52ceb, (q31_t)0x829869be, (q31_t)0x199f0502, (q31_t)0x829727a0, (q31_t)0x1998dd09, (q31_t)0x8295e5cf, (q31_t)0x1992b4ff, (q31_t)0x8294a44c,
+  (q31_t)0x198c8ce7, (q31_t)0x82936317, (q31_t)0x198664be, (q31_t)0x8292222e, (q31_t)0x19803c86, (q31_t)0x8290e194, (q31_t)0x197a143e, (q31_t)0x828fa146,
+  (q31_t)0x1973ebe6, (q31_t)0x828e6146, (q31_t)0x196dc37e, (q31_t)0x828d2193, (q31_t)0x19679b07, (q31_t)0x828be22e, (q31_t)0x19617280, (q31_t)0x828aa316,
+  (q31_t)0x195b49ea, (q31_t)0x8289644b, (q31_t)0x19552144, (q31_t)0x828825ce, (q31_t)0x194ef88e, (q31_t)0x8286e79e, (q31_t)0x1948cfc8, (q31_t)0x8285a9bb,
+  (q31_t)0x1942a6f3, (q31_t)0x82846c26, (q31_t)0x193c7e0f, (q31_t)0x82832edf, (q31_t)0x1936551b, (q31_t)0x8281f1e4, (q31_t)0x19302c17, (q31_t)0x8280b538,
+  (q31_t)0x192a0304, (q31_t)0x827f78d8, (q31_t)0x1923d9e1, (q31_t)0x827e3cc6, (q31_t)0x191db0af, (q31_t)0x827d0102, (q31_t)0x1917876d, (q31_t)0x827bc58a,
+  (q31_t)0x19115e1c, (q31_t)0x827a8a61, (q31_t)0x190b34bb, (q31_t)0x82794f84, (q31_t)0x19050b4b, (q31_t)0x827814f6, (q31_t)0x18fee1cb, (q31_t)0x8276dab4,
+  (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x18f28e9e, (q31_t)0x8274671a, (q31_t)0x18ec64f0, (q31_t)0x82732dc0, (q31_t)0x18e63b33, (q31_t)0x8271f4b5,
+  (q31_t)0x18e01167, (q31_t)0x8270bbf7, (q31_t)0x18d9e78b, (q31_t)0x826f8386, (q31_t)0x18d3bda0, (q31_t)0x826e4b62, (q31_t)0x18cd93a5, (q31_t)0x826d138d,
+  (q31_t)0x18c7699b, (q31_t)0x826bdc04, (q31_t)0x18c13f82, (q31_t)0x826aa4c9, (q31_t)0x18bb155a, (q31_t)0x82696ddc, (q31_t)0x18b4eb22, (q31_t)0x8268373c,
+  (q31_t)0x18aec0db, (q31_t)0x826700e9, (q31_t)0x18a89685, (q31_t)0x8265cae4, (q31_t)0x18a26c20, (q31_t)0x8264952d, (q31_t)0x189c41ab, (q31_t)0x82635fc2,
+  (q31_t)0x18961728, (q31_t)0x82622aa6, (q31_t)0x188fec95, (q31_t)0x8260f5d7, (q31_t)0x1889c1f3, (q31_t)0x825fc155, (q31_t)0x18839742, (q31_t)0x825e8d21,
+  (q31_t)0x187d6c82, (q31_t)0x825d593a, (q31_t)0x187741b2, (q31_t)0x825c25a1, (q31_t)0x187116d4, (q31_t)0x825af255, (q31_t)0x186aebe6, (q31_t)0x8259bf57,
+  (q31_t)0x1864c0ea, (q31_t)0x82588ca7, (q31_t)0x185e95de, (q31_t)0x82575a44, (q31_t)0x18586ac3, (q31_t)0x8256282e, (q31_t)0x18523f9a, (q31_t)0x8254f666,
+  (q31_t)0x184c1461, (q31_t)0x8253c4eb, (q31_t)0x1845e919, (q31_t)0x825293be, (q31_t)0x183fbdc3, (q31_t)0x825162df, (q31_t)0x1839925d, (q31_t)0x8250324d,
+  (q31_t)0x183366e9, (q31_t)0x824f0208, (q31_t)0x182d3b65, (q31_t)0x824dd211, (q31_t)0x18270fd3, (q31_t)0x824ca268, (q31_t)0x1820e431, (q31_t)0x824b730c,
+  (q31_t)0x181ab881, (q31_t)0x824a43fe, (q31_t)0x18148cc2, (q31_t)0x8249153d, (q31_t)0x180e60f4, (q31_t)0x8247e6ca, (q31_t)0x18083518, (q31_t)0x8246b8a4,
+  (q31_t)0x1802092c, (q31_t)0x82458acc, (q31_t)0x17fbdd32, (q31_t)0x82445d41, (q31_t)0x17f5b129, (q31_t)0x82433004, (q31_t)0x17ef8511, (q31_t)0x82420315,
+  (q31_t)0x17e958ea, (q31_t)0x8240d673, (q31_t)0x17e32cb5, (q31_t)0x823faa1e, (q31_t)0x17dd0070, (q31_t)0x823e7e18, (q31_t)0x17d6d41d, (q31_t)0x823d525e,
+  (q31_t)0x17d0a7bc, (q31_t)0x823c26f3, (q31_t)0x17ca7b4c, (q31_t)0x823afbd5, (q31_t)0x17c44ecd, (q31_t)0x8239d104, (q31_t)0x17be223f, (q31_t)0x8238a681,
+  (q31_t)0x17b7f5a3, (q31_t)0x82377c4c, (q31_t)0x17b1c8f8, (q31_t)0x82365264, (q31_t)0x17ab9c3e, (q31_t)0x823528ca, (q31_t)0x17a56f76, (q31_t)0x8233ff7e,
+  (q31_t)0x179f429f, (q31_t)0x8232d67f, (q31_t)0x179915ba, (q31_t)0x8231adce, (q31_t)0x1792e8c6, (q31_t)0x8230856a, (q31_t)0x178cbbc4, (q31_t)0x822f5d54,
+  (q31_t)0x17868eb3, (q31_t)0x822e358b, (q31_t)0x17806194, (q31_t)0x822d0e10, (q31_t)0x177a3466, (q31_t)0x822be6e3, (q31_t)0x17740729, (q31_t)0x822ac004,
+  (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x1767ac85, (q31_t)0x8228732d, (q31_t)0x17617f1d, (q31_t)0x82274d36, (q31_t)0x175b51a7, (q31_t)0x8226278d,
+  (q31_t)0x17552422, (q31_t)0x82250232, (q31_t)0x174ef68f, (q31_t)0x8223dd24, (q31_t)0x1748c8ee, (q31_t)0x8222b863, (q31_t)0x17429b3e, (q31_t)0x822193f1,
+  (q31_t)0x173c6d80, (q31_t)0x82206fcc, (q31_t)0x17363fb4, (q31_t)0x821f4bf5, (q31_t)0x173011d9, (q31_t)0x821e286b, (q31_t)0x1729e3f0, (q31_t)0x821d052f,
+  (q31_t)0x1723b5f9, (q31_t)0x821be240, (q31_t)0x171d87f3, (q31_t)0x821abfa0, (q31_t)0x171759df, (q31_t)0x82199d4d, (q31_t)0x17112bbd, (q31_t)0x82187b47,
+  (q31_t)0x170afd8d, (q31_t)0x82175990, (q31_t)0x1704cf4f, (q31_t)0x82163826, (q31_t)0x16fea102, (q31_t)0x82151709, (q31_t)0x16f872a7, (q31_t)0x8213f63a,
+  (q31_t)0x16f2443e, (q31_t)0x8212d5b9, (q31_t)0x16ec15c7, (q31_t)0x8211b586, (q31_t)0x16e5e741, (q31_t)0x821095a0, (q31_t)0x16dfb8ae, (q31_t)0x820f7608,
+  (q31_t)0x16d98a0c, (q31_t)0x820e56be, (q31_t)0x16d35b5c, (q31_t)0x820d37c1, (q31_t)0x16cd2c9f, (q31_t)0x820c1912, (q31_t)0x16c6fdd3, (q31_t)0x820afab1,
+  (q31_t)0x16c0cef9, (q31_t)0x8209dc9e, (q31_t)0x16baa011, (q31_t)0x8208bed8, (q31_t)0x16b4711b, (q31_t)0x8207a160, (q31_t)0x16ae4217, (q31_t)0x82068435,
+  (q31_t)0x16a81305, (q31_t)0x82056758, (q31_t)0x16a1e3e5, (q31_t)0x82044ac9, (q31_t)0x169bb4b7, (q31_t)0x82032e88, (q31_t)0x1695857b, (q31_t)0x82021294,
+  (q31_t)0x168f5632, (q31_t)0x8200f6ef, (q31_t)0x168926da, (q31_t)0x81ffdb96, (q31_t)0x1682f774, (q31_t)0x81fec08c, (q31_t)0x167cc801, (q31_t)0x81fda5cf,
+  (q31_t)0x1676987f, (q31_t)0x81fc8b60, (q31_t)0x167068f0, (q31_t)0x81fb713f, (q31_t)0x166a3953, (q31_t)0x81fa576c, (q31_t)0x166409a8, (q31_t)0x81f93de6,
+  (q31_t)0x165dd9f0, (q31_t)0x81f824ae, (q31_t)0x1657aa29, (q31_t)0x81f70bc3, (q31_t)0x16517a55, (q31_t)0x81f5f327, (q31_t)0x164b4a73, (q31_t)0x81f4dad8,
+  (q31_t)0x16451a83, (q31_t)0x81f3c2d7, (q31_t)0x163eea86, (q31_t)0x81f2ab24, (q31_t)0x1638ba7a, (q31_t)0x81f193be, (q31_t)0x16328a61, (q31_t)0x81f07ca6,
+  (q31_t)0x162c5a3b, (q31_t)0x81ef65dc, (q31_t)0x16262a06, (q31_t)0x81ee4f60, (q31_t)0x161ff9c4, (q31_t)0x81ed3932, (q31_t)0x1619c975, (q31_t)0x81ec2351,
+  (q31_t)0x16139918, (q31_t)0x81eb0dbe, (q31_t)0x160d68ad, (q31_t)0x81e9f879, (q31_t)0x16073834, (q31_t)0x81e8e381, (q31_t)0x160107ae, (q31_t)0x81e7ced8,
+  (q31_t)0x15fad71b, (q31_t)0x81e6ba7c, (q31_t)0x15f4a679, (q31_t)0x81e5a66e, (q31_t)0x15ee75cb, (q31_t)0x81e492ad, (q31_t)0x15e8450e, (q31_t)0x81e37f3b,
+  (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x15dbe36d, (q31_t)0x81e1593f, (q31_t)0x15d5b288, (q31_t)0x81e046b6, (q31_t)0x15cf8196, (q31_t)0x81df347b,
+  (q31_t)0x15c95097, (q31_t)0x81de228d, (q31_t)0x15c31f89, (q31_t)0x81dd10ee, (q31_t)0x15bcee6f, (q31_t)0x81dbff9c, (q31_t)0x15b6bd47, (q31_t)0x81daee98,
+  (q31_t)0x15b08c12, (q31_t)0x81d9dde1, (q31_t)0x15aa5acf, (q31_t)0x81d8cd79, (q31_t)0x15a4297f, (q31_t)0x81d7bd5e, (q31_t)0x159df821, (q31_t)0x81d6ad92,
+  (q31_t)0x1597c6b7, (q31_t)0x81d59e13, (q31_t)0x1591953e, (q31_t)0x81d48ee1, (q31_t)0x158b63b9, (q31_t)0x81d37ffe, (q31_t)0x15853226, (q31_t)0x81d27169,
+  (q31_t)0x157f0086, (q31_t)0x81d16321, (q31_t)0x1578ced9, (q31_t)0x81d05527, (q31_t)0x15729d1f, (q31_t)0x81cf477b, (q31_t)0x156c6b57, (q31_t)0x81ce3a1d,
+  (q31_t)0x15663982, (q31_t)0x81cd2d0c, (q31_t)0x156007a0, (q31_t)0x81cc204a, (q31_t)0x1559d5b1, (q31_t)0x81cb13d5, (q31_t)0x1553a3b4, (q31_t)0x81ca07af,
+  (q31_t)0x154d71aa, (q31_t)0x81c8fbd6, (q31_t)0x15473f94, (q31_t)0x81c7f04b, (q31_t)0x15410d70, (q31_t)0x81c6e50d, (q31_t)0x153adb3f, (q31_t)0x81c5da1e,
+  (q31_t)0x1534a901, (q31_t)0x81c4cf7d, (q31_t)0x152e76b5, (q31_t)0x81c3c529, (q31_t)0x1528445d, (q31_t)0x81c2bb23, (q31_t)0x152211f8, (q31_t)0x81c1b16b,
+  (q31_t)0x151bdf86, (q31_t)0x81c0a801, (q31_t)0x1515ad06, (q31_t)0x81bf9ee5, (q31_t)0x150f7a7a, (q31_t)0x81be9617, (q31_t)0x150947e1, (q31_t)0x81bd8d97,
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+  (q31_t)0x14ea4a1f, (q31_t)0x81b867a5, (q31_t)0x14e41738, (q31_t)0x81b760f8, (q31_t)0x14dde445, (q31_t)0x81b65a99, (q31_t)0x14d7b144, (q31_t)0x81b55488,
+  (q31_t)0x14d17e36, (q31_t)0x81b44ec4, (q31_t)0x14cb4b1c, (q31_t)0x81b3494f, (q31_t)0x14c517f4, (q31_t)0x81b24427, (q31_t)0x14bee4c0, (q31_t)0x81b13f4e,
+  (q31_t)0x14b8b17f, (q31_t)0x81b03ac2, (q31_t)0x14b27e32, (q31_t)0x81af3684, (q31_t)0x14ac4ad7, (q31_t)0x81ae3294, (q31_t)0x14a61770, (q31_t)0x81ad2ef2,
+  (q31_t)0x149fe3fc, (q31_t)0x81ac2b9e, (q31_t)0x1499b07c, (q31_t)0x81ab2898, (q31_t)0x14937cee, (q31_t)0x81aa25e0, (q31_t)0x148d4954, (q31_t)0x81a92376,
+  (q31_t)0x148715ae, (q31_t)0x81a82159, (q31_t)0x1480e1fa, (q31_t)0x81a71f8b, (q31_t)0x147aae3a, (q31_t)0x81a61e0b, (q31_t)0x14747a6d, (q31_t)0x81a51cd8,
+  (q31_t)0x146e4694, (q31_t)0x81a41bf4, (q31_t)0x146812ae, (q31_t)0x81a31b5d, (q31_t)0x1461debc, (q31_t)0x81a21b14, (q31_t)0x145baabd, (q31_t)0x81a11b1a,
+  (q31_t)0x145576b1, (q31_t)0x81a01b6d, (q31_t)0x144f4299, (q31_t)0x819f1c0e, (q31_t)0x14490e74, (q31_t)0x819e1cfd, (q31_t)0x1442da43, (q31_t)0x819d1e3a,
+  (q31_t)0x143ca605, (q31_t)0x819c1fc5, (q31_t)0x143671bb, (q31_t)0x819b219e, (q31_t)0x14303d65, (q31_t)0x819a23c5, (q31_t)0x142a0902, (q31_t)0x8199263a,
+  (q31_t)0x1423d492, (q31_t)0x819828fd, (q31_t)0x141da016, (q31_t)0x81972c0e, (q31_t)0x14176b8e, (q31_t)0x81962f6d, (q31_t)0x141136f9, (q31_t)0x8195331a,
+  (q31_t)0x140b0258, (q31_t)0x81943715, (q31_t)0x1404cdaa, (q31_t)0x81933b5e, (q31_t)0x13fe98f1, (q31_t)0x81923ff4, (q31_t)0x13f8642a, (q31_t)0x819144d9,
+  (q31_t)0x13f22f58, (q31_t)0x81904a0c, (q31_t)0x13ebfa79, (q31_t)0x818f4f8d, (q31_t)0x13e5c58e, (q31_t)0x818e555c, (q31_t)0x13df9097, (q31_t)0x818d5b78,
+  (q31_t)0x13d95b93, (q31_t)0x818c61e3, (q31_t)0x13d32683, (q31_t)0x818b689c, (q31_t)0x13ccf167, (q31_t)0x818a6fa3, (q31_t)0x13c6bc3f, (q31_t)0x818976f8,
+  (q31_t)0x13c0870a, (q31_t)0x81887e9a, (q31_t)0x13ba51ca, (q31_t)0x8187868b, (q31_t)0x13b41c7d, (q31_t)0x81868eca, (q31_t)0x13ade724, (q31_t)0x81859757,
+  (q31_t)0x13a7b1bf, (q31_t)0x8184a032, (q31_t)0x13a17c4d, (q31_t)0x8183a95b, (q31_t)0x139b46d0, (q31_t)0x8182b2d1, (q31_t)0x13951146, (q31_t)0x8181bc96,
+  (q31_t)0x138edbb1, (q31_t)0x8180c6a9, (q31_t)0x1388a60f, (q31_t)0x817fd10a, (q31_t)0x13827062, (q31_t)0x817edbb9, (q31_t)0x137c3aa8, (q31_t)0x817de6b6,
+  (q31_t)0x137604e2, (q31_t)0x817cf201, (q31_t)0x136fcf10, (q31_t)0x817bfd9b, (q31_t)0x13699933, (q31_t)0x817b0982, (q31_t)0x13636349, (q31_t)0x817a15b7,
+  (q31_t)0x135d2d53, (q31_t)0x8179223a, (q31_t)0x1356f752, (q31_t)0x81782f0b, (q31_t)0x1350c144, (q31_t)0x81773c2b, (q31_t)0x134a8b2b, (q31_t)0x81764998,
+  (q31_t)0x13445505, (q31_t)0x81755754, (q31_t)0x133e1ed4, (q31_t)0x8174655d, (q31_t)0x1337e897, (q31_t)0x817373b5, (q31_t)0x1331b24e, (q31_t)0x8172825a,
+  (q31_t)0x132b7bf9, (q31_t)0x8171914e, (q31_t)0x13254599, (q31_t)0x8170a090, (q31_t)0x131f0f2c, (q31_t)0x816fb020, (q31_t)0x1318d8b4, (q31_t)0x816ebffe,
+  (q31_t)0x1312a230, (q31_t)0x816dd02a, (q31_t)0x130c6ba0, (q31_t)0x816ce0a4, (q31_t)0x13063505, (q31_t)0x816bf16c, (q31_t)0x12fffe5d, (q31_t)0x816b0282,
+  (q31_t)0x12f9c7aa, (q31_t)0x816a13e6, (q31_t)0x12f390ec, (q31_t)0x81692599, (q31_t)0x12ed5a21, (q31_t)0x81683799, (q31_t)0x12e7234b, (q31_t)0x816749e8,
+  (q31_t)0x12e0ec6a, (q31_t)0x81665c84, (q31_t)0x12dab57c, (q31_t)0x81656f6f, (q31_t)0x12d47e83, (q31_t)0x816482a8, (q31_t)0x12ce477f, (q31_t)0x8163962f,
+  (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x12c1d953, (q31_t)0x8161be27, (q31_t)0x12bba22b, (q31_t)0x8160d298, (q31_t)0x12b56af9, (q31_t)0x815fe758,
+  (q31_t)0x12af33ba, (q31_t)0x815efc65, (q31_t)0x12a8fc70, (q31_t)0x815e11c1, (q31_t)0x12a2c51b, (q31_t)0x815d276a, (q31_t)0x129c8dba, (q31_t)0x815c3d62,
+  (q31_t)0x1296564d, (q31_t)0x815b53a8, (q31_t)0x12901ed5, (q31_t)0x815a6a3c, (q31_t)0x1289e752, (q31_t)0x8159811e, (q31_t)0x1283afc3, (q31_t)0x8158984e,
+  (q31_t)0x127d7829, (q31_t)0x8157afcd, (q31_t)0x12774083, (q31_t)0x8156c799, (q31_t)0x127108d2, (q31_t)0x8155dfb4, (q31_t)0x126ad116, (q31_t)0x8154f81d,
+  (q31_t)0x1264994e, (q31_t)0x815410d4, (q31_t)0x125e617b, (q31_t)0x815329d9, (q31_t)0x1258299c, (q31_t)0x8152432c, (q31_t)0x1251f1b3, (q31_t)0x81515ccd,
+  (q31_t)0x124bb9be, (q31_t)0x815076bd, (q31_t)0x124581bd, (q31_t)0x814f90fb, (q31_t)0x123f49b2, (q31_t)0x814eab86, (q31_t)0x1239119b, (q31_t)0x814dc660,
+  (q31_t)0x1232d979, (q31_t)0x814ce188, (q31_t)0x122ca14b, (q31_t)0x814bfcff, (q31_t)0x12266913, (q31_t)0x814b18c3, (q31_t)0x122030cf, (q31_t)0x814a34d6,
+  (q31_t)0x1219f880, (q31_t)0x81495136, (q31_t)0x1213c026, (q31_t)0x81486de5, (q31_t)0x120d87c1, (q31_t)0x81478ae2, (q31_t)0x12074f50, (q31_t)0x8146a82e,
+  (q31_t)0x120116d5, (q31_t)0x8145c5c7, (q31_t)0x11fade4e, (q31_t)0x8144e3ae, (q31_t)0x11f4a5bd, (q31_t)0x814401e4, (q31_t)0x11ee6d20, (q31_t)0x81432068,
+  (q31_t)0x11e83478, (q31_t)0x81423f3a, (q31_t)0x11e1fbc5, (q31_t)0x81415e5a, (q31_t)0x11dbc307, (q31_t)0x81407dc9, (q31_t)0x11d58a3e, (q31_t)0x813f9d86,
+  (q31_t)0x11cf516a, (q31_t)0x813ebd90, (q31_t)0x11c9188b, (q31_t)0x813ddde9, (q31_t)0x11c2dfa2, (q31_t)0x813cfe91, (q31_t)0x11bca6ad, (q31_t)0x813c1f86,
+  (q31_t)0x11b66dad, (q31_t)0x813b40ca, (q31_t)0x11b034a2, (q31_t)0x813a625b, (q31_t)0x11a9fb8d, (q31_t)0x8139843b, (q31_t)0x11a3c26c, (q31_t)0x8138a66a,
+  (q31_t)0x119d8941, (q31_t)0x8137c8e6, (q31_t)0x1197500a, (q31_t)0x8136ebb1, (q31_t)0x119116c9, (q31_t)0x81360ec9, (q31_t)0x118add7d, (q31_t)0x81353230,
+  (q31_t)0x1184a427, (q31_t)0x813455e6, (q31_t)0x117e6ac5, (q31_t)0x813379e9, (q31_t)0x11783159, (q31_t)0x81329e3b, (q31_t)0x1171f7e2, (q31_t)0x8131c2db,
+  (q31_t)0x116bbe60, (q31_t)0x8130e7c9, (q31_t)0x116584d3, (q31_t)0x81300d05, (q31_t)0x115f4b3c, (q31_t)0x812f3290, (q31_t)0x1159119a, (q31_t)0x812e5868,
+  (q31_t)0x1152d7ed, (q31_t)0x812d7e8f, (q31_t)0x114c9e35, (q31_t)0x812ca505, (q31_t)0x11466473, (q31_t)0x812bcbc8, (q31_t)0x11402aa6, (q31_t)0x812af2da,
+  (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x1133b6ed, (q31_t)0x812941e8, (q31_t)0x112d7d00, (q31_t)0x812869e4, (q31_t)0x11274309, (q31_t)0x8127922f,
+  (q31_t)0x11210907, (q31_t)0x8126bac8, (q31_t)0x111acefb, (q31_t)0x8125e3af, (q31_t)0x111494e4, (q31_t)0x81250ce4, (q31_t)0x110e5ac2, (q31_t)0x81243668,
+  (q31_t)0x11082096, (q31_t)0x8123603a, (q31_t)0x1101e65f, (q31_t)0x81228a5a, (q31_t)0x10fbac1e, (q31_t)0x8121b4c8, (q31_t)0x10f571d3, (q31_t)0x8120df85,
+  (q31_t)0x10ef377d, (q31_t)0x81200a90, (q31_t)0x10e8fd1c, (q31_t)0x811f35e9, (q31_t)0x10e2c2b2, (q31_t)0x811e6191, (q31_t)0x10dc883c, (q31_t)0x811d8d86,
+  (q31_t)0x10d64dbd, (q31_t)0x811cb9ca, (q31_t)0x10d01333, (q31_t)0x811be65d, (q31_t)0x10c9d89e, (q31_t)0x811b133d, (q31_t)0x10c39dff, (q31_t)0x811a406c,
+  (q31_t)0x10bd6356, (q31_t)0x81196de9, (q31_t)0x10b728a3, (q31_t)0x81189bb4, (q31_t)0x10b0ede5, (q31_t)0x8117c9ce, (q31_t)0x10aab31d, (q31_t)0x8116f836,
+  (q31_t)0x10a4784b, (q31_t)0x811626ec, (q31_t)0x109e3d6e, (q31_t)0x811555f1, (q31_t)0x10980287, (q31_t)0x81148544, (q31_t)0x1091c796, (q31_t)0x8113b4e5,
+  (q31_t)0x108b8c9b, (q31_t)0x8112e4d4, (q31_t)0x10855195, (q31_t)0x81121512, (q31_t)0x107f1686, (q31_t)0x8111459e, (q31_t)0x1078db6c, (q31_t)0x81107678,
+  (q31_t)0x1072a048, (q31_t)0x810fa7a0, (q31_t)0x106c651a, (q31_t)0x810ed917, (q31_t)0x106629e1, (q31_t)0x810e0adc, (q31_t)0x105fee9f, (q31_t)0x810d3cf0,
+  (q31_t)0x1059b352, (q31_t)0x810c6f52, (q31_t)0x105377fc, (q31_t)0x810ba202, (q31_t)0x104d3c9b, (q31_t)0x810ad500, (q31_t)0x10470130, (q31_t)0x810a084d,
+  (q31_t)0x1040c5bb, (q31_t)0x81093be8, (q31_t)0x103a8a3d, (q31_t)0x81086fd1, (q31_t)0x10344eb4, (q31_t)0x8107a409, (q31_t)0x102e1321, (q31_t)0x8106d88f,
+  (q31_t)0x1027d784, (q31_t)0x81060d63, (q31_t)0x10219bdd, (q31_t)0x81054286, (q31_t)0x101b602d, (q31_t)0x810477f7, (q31_t)0x10152472, (q31_t)0x8103adb6,
+  (q31_t)0x100ee8ad, (q31_t)0x8102e3c4, (q31_t)0x1008acdf, (q31_t)0x81021a20, (q31_t)0x10027107, (q31_t)0x810150ca, (q31_t)0xffc3524, (q31_t)0x810087c3,
+  (q31_t)0xff5f938, (q31_t)0x80ffbf0a, (q31_t)0xfefbd42, (q31_t)0x80fef69f, (q31_t)0xfe98143, (q31_t)0x80fe2e83, (q31_t)0xfe34539, (q31_t)0x80fd66b5,
+  (q31_t)0xfdd0926, (q31_t)0x80fc9f35, (q31_t)0xfd6cd08, (q31_t)0x80fbd804, (q31_t)0xfd090e1, (q31_t)0x80fb1121, (q31_t)0xfca54b1, (q31_t)0x80fa4a8c,
+  (q31_t)0xfc41876, (q31_t)0x80f98446, (q31_t)0xfbddc32, (q31_t)0x80f8be4e, (q31_t)0xfb79fe4, (q31_t)0x80f7f8a4, (q31_t)0xfb1638d, (q31_t)0x80f73349,
+  (q31_t)0xfab272b, (q31_t)0x80f66e3c, (q31_t)0xfa4eac0, (q31_t)0x80f5a97e, (q31_t)0xf9eae4c, (q31_t)0x80f4e50e, (q31_t)0xf9871ce, (q31_t)0x80f420ec,
+  (q31_t)0xf923546, (q31_t)0x80f35d19, (q31_t)0xf8bf8b4, (q31_t)0x80f29994, (q31_t)0xf85bc19, (q31_t)0x80f1d65d, (q31_t)0xf7f7f75, (q31_t)0x80f11375,
+  (q31_t)0xf7942c7, (q31_t)0x80f050db, (q31_t)0xf73060f, (q31_t)0x80ef8e90, (q31_t)0xf6cc94e, (q31_t)0x80eecc93, (q31_t)0xf668c83, (q31_t)0x80ee0ae4,
+  (q31_t)0xf604faf, (q31_t)0x80ed4984, (q31_t)0xf5a12d1, (q31_t)0x80ec8872, (q31_t)0xf53d5ea, (q31_t)0x80ebc7ae, (q31_t)0xf4d98f9, (q31_t)0x80eb0739,
+  (q31_t)0xf475bff, (q31_t)0x80ea4712, (q31_t)0xf411efb, (q31_t)0x80e9873a, (q31_t)0xf3ae1ee, (q31_t)0x80e8c7b0, (q31_t)0xf34a4d8, (q31_t)0x80e80874,
+  (q31_t)0xf2e67b8, (q31_t)0x80e74987, (q31_t)0xf282a8f, (q31_t)0x80e68ae8, (q31_t)0xf21ed5d, (q31_t)0x80e5cc98, (q31_t)0xf1bb021, (q31_t)0x80e50e96,
+  (q31_t)0xf1572dc, (q31_t)0x80e450e2, (q31_t)0xf0f358e, (q31_t)0x80e3937d, (q31_t)0xf08f836, (q31_t)0x80e2d666, (q31_t)0xf02bad5, (q31_t)0x80e2199e,
+  (q31_t)0xefc7d6b, (q31_t)0x80e15d24, (q31_t)0xef63ff7, (q31_t)0x80e0a0f8, (q31_t)0xef0027b, (q31_t)0x80dfe51b, (q31_t)0xee9c4f5, (q31_t)0x80df298c,
+  (q31_t)0xee38766, (q31_t)0x80de6e4c, (q31_t)0xedd49ce, (q31_t)0x80ddb35a, (q31_t)0xed70c2c, (q31_t)0x80dcf8b7, (q31_t)0xed0ce82, (q31_t)0x80dc3e62,
+  (q31_t)0xeca90ce, (q31_t)0x80db845b, (q31_t)0xec45311, (q31_t)0x80dacaa3, (q31_t)0xebe154b, (q31_t)0x80da1139, (q31_t)0xeb7d77c, (q31_t)0x80d9581e,
+  (q31_t)0xeb199a4, (q31_t)0x80d89f51, (q31_t)0xeab5bc3, (q31_t)0x80d7e6d3, (q31_t)0xea51dd8, (q31_t)0x80d72ea3, (q31_t)0xe9edfe5, (q31_t)0x80d676c1,
+  (q31_t)0xe98a1e9, (q31_t)0x80d5bf2e, (q31_t)0xe9263e3, (q31_t)0x80d507e9, (q31_t)0xe8c25d5, (q31_t)0x80d450f3, (q31_t)0xe85e7be, (q31_t)0x80d39a4b,
+  (q31_t)0xe7fa99e, (q31_t)0x80d2e3f2, (q31_t)0xe796b74, (q31_t)0x80d22de7, (q31_t)0xe732d42, (q31_t)0x80d1782a, (q31_t)0xe6cef07, (q31_t)0x80d0c2bc,
+  (q31_t)0xe66b0c3, (q31_t)0x80d00d9d, (q31_t)0xe607277, (q31_t)0x80cf58cc, (q31_t)0xe5a3421, (q31_t)0x80cea449, (q31_t)0xe53f5c2, (q31_t)0x80cdf015,
+  (q31_t)0xe4db75b, (q31_t)0x80cd3c2f, (q31_t)0xe4778eb, (q31_t)0x80cc8898, (q31_t)0xe413a72, (q31_t)0x80cbd54f, (q31_t)0xe3afbf0, (q31_t)0x80cb2255,
+  (q31_t)0xe34bd66, (q31_t)0x80ca6fa9, (q31_t)0xe2e7ed2, (q31_t)0x80c9bd4c, (q31_t)0xe284036, (q31_t)0x80c90b3d, (q31_t)0xe220191, (q31_t)0x80c8597c,
+  (q31_t)0xe1bc2e4, (q31_t)0x80c7a80a, (q31_t)0xe15842e, (q31_t)0x80c6f6e7, (q31_t)0xe0f456f, (q31_t)0x80c64612, (q31_t)0xe0906a7, (q31_t)0x80c5958b,
+  (q31_t)0xe02c7d7, (q31_t)0x80c4e553, (q31_t)0xdfc88fe, (q31_t)0x80c4356a, (q31_t)0xdf64a1c, (q31_t)0x80c385cf, (q31_t)0xdf00b32, (q31_t)0x80c2d682,
+  (q31_t)0xde9cc40, (q31_t)0x80c22784, (q31_t)0xde38d44, (q31_t)0x80c178d4, (q31_t)0xddd4e40, (q31_t)0x80c0ca73, (q31_t)0xdd70f34, (q31_t)0x80c01c60,
+  (q31_t)0xdd0d01f, (q31_t)0x80bf6e9c, (q31_t)0xdca9102, (q31_t)0x80bec127, (q31_t)0xdc451dc, (q31_t)0x80be13ff, (q31_t)0xdbe12ad, (q31_t)0x80bd6727,
+  (q31_t)0xdb7d376, (q31_t)0x80bcba9d, (q31_t)0xdb19437, (q31_t)0x80bc0e61, (q31_t)0xdab54ef, (q31_t)0x80bb6274, (q31_t)0xda5159f, (q31_t)0x80bab6d5,
+  (q31_t)0xd9ed646, (q31_t)0x80ba0b85, (q31_t)0xd9896e5, (q31_t)0x80b96083, (q31_t)0xd92577b, (q31_t)0x80b8b5d0, (q31_t)0xd8c1809, (q31_t)0x80b80b6c,
+  (q31_t)0xd85d88f, (q31_t)0x80b76156, (q31_t)0xd7f990c, (q31_t)0x80b6b78e, (q31_t)0xd795982, (q31_t)0x80b60e15, (q31_t)0xd7319ee, (q31_t)0x80b564ea,
+  (q31_t)0xd6cda53, (q31_t)0x80b4bc0e, (q31_t)0xd669aaf, (q31_t)0x80b41381, (q31_t)0xd605b03, (q31_t)0x80b36b42, (q31_t)0xd5a1b4f, (q31_t)0x80b2c351,
+  (q31_t)0xd53db92, (q31_t)0x80b21baf, (q31_t)0xd4d9bcd, (q31_t)0x80b1745c, (q31_t)0xd475c00, (q31_t)0x80b0cd57, (q31_t)0xd411c2b, (q31_t)0x80b026a1,
+  (q31_t)0xd3adc4e, (q31_t)0x80af8039, (q31_t)0xd349c68, (q31_t)0x80aeda20, (q31_t)0xd2e5c7b, (q31_t)0x80ae3455, (q31_t)0xd281c85, (q31_t)0x80ad8ed9,
+  (q31_t)0xd21dc87, (q31_t)0x80ace9ab, (q31_t)0xd1b9c81, (q31_t)0x80ac44cc, (q31_t)0xd155c73, (q31_t)0x80aba03b, (q31_t)0xd0f1c5d, (q31_t)0x80aafbf9,
+  (q31_t)0xd08dc3f, (q31_t)0x80aa5806, (q31_t)0xd029c18, (q31_t)0x80a9b461, (q31_t)0xcfc5bea, (q31_t)0x80a9110b, (q31_t)0xcf61bb4, (q31_t)0x80a86e03,
+  (q31_t)0xcefdb76, (q31_t)0x80a7cb49, (q31_t)0xce99b2f, (q31_t)0x80a728df, (q31_t)0xce35ae1, (q31_t)0x80a686c2, (q31_t)0xcdd1a8b, (q31_t)0x80a5e4f5,
+  (q31_t)0xcd6da2d, (q31_t)0x80a54376, (q31_t)0xcd099c7, (q31_t)0x80a4a245, (q31_t)0xcca5959, (q31_t)0x80a40163, (q31_t)0xcc418e3, (q31_t)0x80a360d0,
+  (q31_t)0xcbdd865, (q31_t)0x80a2c08b, (q31_t)0xcb797e0, (q31_t)0x80a22095, (q31_t)0xcb15752, (q31_t)0x80a180ed, (q31_t)0xcab16bd, (q31_t)0x80a0e194,
+  (q31_t)0xca4d620, (q31_t)0x80a04289, (q31_t)0xc9e957b, (q31_t)0x809fa3cd, (q31_t)0xc9854cf, (q31_t)0x809f0560, (q31_t)0xc92141a, (q31_t)0x809e6741,
+  (q31_t)0xc8bd35e, (q31_t)0x809dc971, (q31_t)0xc85929a, (q31_t)0x809d2bef, (q31_t)0xc7f51cf, (q31_t)0x809c8ebc, (q31_t)0xc7910fb, (q31_t)0x809bf1d7,
+  (q31_t)0xc72d020, (q31_t)0x809b5541, (q31_t)0xc6c8f3e, (q31_t)0x809ab8fa, (q31_t)0xc664e53, (q31_t)0x809a1d01, (q31_t)0xc600d61, (q31_t)0x80998157,
+  (q31_t)0xc59cc68, (q31_t)0x8098e5fb, (q31_t)0xc538b66, (q31_t)0x80984aee, (q31_t)0xc4d4a5d, (q31_t)0x8097b030, (q31_t)0xc47094d, (q31_t)0x809715c0,
+  (q31_t)0xc40c835, (q31_t)0x80967b9f, (q31_t)0xc3a8715, (q31_t)0x8095e1cc, (q31_t)0xc3445ee, (q31_t)0x80954848, (q31_t)0xc2e04c0, (q31_t)0x8094af13,
+  (q31_t)0xc27c389, (q31_t)0x8094162c, (q31_t)0xc21824c, (q31_t)0x80937d93, (q31_t)0xc1b4107, (q31_t)0x8092e54a, (q31_t)0xc14ffba, (q31_t)0x80924d4f,
+  (q31_t)0xc0ebe66, (q31_t)0x8091b5a2, (q31_t)0xc087d0a, (q31_t)0x80911e44, (q31_t)0xc023ba7, (q31_t)0x80908735, (q31_t)0xbfbfa3d, (q31_t)0x808ff074,
+  (q31_t)0xbf5b8cb, (q31_t)0x808f5a02, (q31_t)0xbef7752, (q31_t)0x808ec3df, (q31_t)0xbe935d2, (q31_t)0x808e2e0a, (q31_t)0xbe2f44a, (q31_t)0x808d9884,
+  (q31_t)0xbdcb2bb, (q31_t)0x808d034c, (q31_t)0xbd67124, (q31_t)0x808c6e63, (q31_t)0xbd02f87, (q31_t)0x808bd9c9, (q31_t)0xbc9ede2, (q31_t)0x808b457d,
+  (q31_t)0xbc3ac35, (q31_t)0x808ab180, (q31_t)0xbbd6a82, (q31_t)0x808a1dd2, (q31_t)0xbb728c7, (q31_t)0x80898a72, (q31_t)0xbb0e705, (q31_t)0x8088f761,
+  (q31_t)0xbaaa53b, (q31_t)0x8088649e, (q31_t)0xba4636b, (q31_t)0x8087d22a, (q31_t)0xb9e2193, (q31_t)0x80874005, (q31_t)0xb97dfb5, (q31_t)0x8086ae2e,
+  (q31_t)0xb919dcf, (q31_t)0x80861ca6, (q31_t)0xb8b5be1, (q31_t)0x80858b6c, (q31_t)0xb8519ed, (q31_t)0x8084fa82, (q31_t)0xb7ed7f2, (q31_t)0x808469e5,
+  (q31_t)0xb7895f0, (q31_t)0x8083d998, (q31_t)0xb7253e6, (q31_t)0x80834999, (q31_t)0xb6c11d5, (q31_t)0x8082b9e9, (q31_t)0xb65cfbe, (q31_t)0x80822a87,
+  (q31_t)0xb5f8d9f, (q31_t)0x80819b74, (q31_t)0xb594b7a, (q31_t)0x80810cb0, (q31_t)0xb53094d, (q31_t)0x80807e3a, (q31_t)0xb4cc719, (q31_t)0x807ff013,
+  (q31_t)0xb4684df, (q31_t)0x807f623b, (q31_t)0xb40429d, (q31_t)0x807ed4b1, (q31_t)0xb3a0055, (q31_t)0x807e4776, (q31_t)0xb33be05, (q31_t)0x807dba89,
+  (q31_t)0xb2d7baf, (q31_t)0x807d2dec, (q31_t)0xb273952, (q31_t)0x807ca19c, (q31_t)0xb20f6ee, (q31_t)0x807c159c, (q31_t)0xb1ab483, (q31_t)0x807b89ea,
+  (q31_t)0xb147211, (q31_t)0x807afe87, (q31_t)0xb0e2f98, (q31_t)0x807a7373, (q31_t)0xb07ed19, (q31_t)0x8079e8ad, (q31_t)0xb01aa92, (q31_t)0x80795e36,
+  (q31_t)0xafb6805, (q31_t)0x8078d40d, (q31_t)0xaf52571, (q31_t)0x80784a33, (q31_t)0xaeee2d7, (q31_t)0x8077c0a8, (q31_t)0xae8a036, (q31_t)0x8077376c,
+  (q31_t)0xae25d8d, (q31_t)0x8076ae7e, (q31_t)0xadc1adf, (q31_t)0x807625df, (q31_t)0xad5d829, (q31_t)0x80759d8e, (q31_t)0xacf956d, (q31_t)0x8075158c,
+  (q31_t)0xac952aa, (q31_t)0x80748dd9, (q31_t)0xac30fe1, (q31_t)0x80740675, (q31_t)0xabccd11, (q31_t)0x80737f5f, (q31_t)0xab68a3a, (q31_t)0x8072f898,
+  (q31_t)0xab0475c, (q31_t)0x8072721f, (q31_t)0xaaa0478, (q31_t)0x8071ebf6, (q31_t)0xaa3c18e, (q31_t)0x8071661a, (q31_t)0xa9d7e9d, (q31_t)0x8070e08e,
+  (q31_t)0xa973ba5, (q31_t)0x80705b50, (q31_t)0xa90f8a7, (q31_t)0x806fd661, (q31_t)0xa8ab5a2, (q31_t)0x806f51c1, (q31_t)0xa847297, (q31_t)0x806ecd6f,
+  (q31_t)0xa7e2f85, (q31_t)0x806e496c, (q31_t)0xa77ec6d, (q31_t)0x806dc5b8, (q31_t)0xa71a94f, (q31_t)0x806d4253, (q31_t)0xa6b662a, (q31_t)0x806cbf3c,
+  (q31_t)0xa6522fe, (q31_t)0x806c3c74, (q31_t)0xa5edfcc, (q31_t)0x806bb9fa, (q31_t)0xa589c94, (q31_t)0x806b37cf, (q31_t)0xa525955, (q31_t)0x806ab5f3,
+  (q31_t)0xa4c1610, (q31_t)0x806a3466, (q31_t)0xa45d2c5, (q31_t)0x8069b327, (q31_t)0xa3f8f73, (q31_t)0x80693237, (q31_t)0xa394c1b, (q31_t)0x8068b196,
+  (q31_t)0xa3308bd, (q31_t)0x80683143, (q31_t)0xa2cc558, (q31_t)0x8067b13f, (q31_t)0xa2681ed, (q31_t)0x8067318a, (q31_t)0xa203e7c, (q31_t)0x8066b224,
+  (q31_t)0xa19fb04, (q31_t)0x8066330c, (q31_t)0xa13b787, (q31_t)0x8065b443, (q31_t)0xa0d7403, (q31_t)0x806535c9, (q31_t)0xa073079, (q31_t)0x8064b79d,
+  (q31_t)0xa00ece8, (q31_t)0x806439c0, (q31_t)0x9faa952, (q31_t)0x8063bc32, (q31_t)0x9f465b5, (q31_t)0x80633ef3, (q31_t)0x9ee2213, (q31_t)0x8062c202,
+  (q31_t)0x9e7de6a, (q31_t)0x80624560, (q31_t)0x9e19abb, (q31_t)0x8061c90c, (q31_t)0x9db5706, (q31_t)0x80614d08, (q31_t)0x9d5134b, (q31_t)0x8060d152,
+  (q31_t)0x9cecf89, (q31_t)0x806055eb, (q31_t)0x9c88bc2, (q31_t)0x805fdad2, (q31_t)0x9c247f5, (q31_t)0x805f6009, (q31_t)0x9bc0421, (q31_t)0x805ee58e,
+  (q31_t)0x9b5c048, (q31_t)0x805e6b62, (q31_t)0x9af7c69, (q31_t)0x805df184, (q31_t)0x9a93884, (q31_t)0x805d77f5, (q31_t)0x9a2f498, (q31_t)0x805cfeb5,
+  (q31_t)0x99cb0a7, (q31_t)0x805c85c4, (q31_t)0x9966cb0, (q31_t)0x805c0d21, (q31_t)0x99028b3, (q31_t)0x805b94ce, (q31_t)0x989e4b0, (q31_t)0x805b1cc8,
+  (q31_t)0x983a0a7, (q31_t)0x805aa512, (q31_t)0x97d5c99, (q31_t)0x805a2daa, (q31_t)0x9771884, (q31_t)0x8059b692, (q31_t)0x970d46a, (q31_t)0x80593fc7,
+  (q31_t)0x96a9049, (q31_t)0x8058c94c, (q31_t)0x9644c23, (q31_t)0x8058531f, (q31_t)0x95e07f8, (q31_t)0x8057dd41, (q31_t)0x957c3c6, (q31_t)0x805767b2,
+  (q31_t)0x9517f8f, (q31_t)0x8056f272, (q31_t)0x94b3b52, (q31_t)0x80567d80, (q31_t)0x944f70f, (q31_t)0x805608dd, (q31_t)0x93eb2c6, (q31_t)0x80559489,
+  (q31_t)0x9386e78, (q31_t)0x80552084, (q31_t)0x9322a24, (q31_t)0x8054accd, (q31_t)0x92be5ca, (q31_t)0x80543965, (q31_t)0x925a16b, (q31_t)0x8053c64c,
+  (q31_t)0x91f5d06, (q31_t)0x80535381, (q31_t)0x919189c, (q31_t)0x8052e106, (q31_t)0x912d42c, (q31_t)0x80526ed9, (q31_t)0x90c8fb6, (q31_t)0x8051fcfb,
+  (q31_t)0x9064b3a, (q31_t)0x80518b6b, (q31_t)0x90006ba, (q31_t)0x80511a2b, (q31_t)0x8f9c233, (q31_t)0x8050a939, (q31_t)0x8f37da7, (q31_t)0x80503896,
+  (q31_t)0x8ed3916, (q31_t)0x804fc841, (q31_t)0x8e6f47f, (q31_t)0x804f583c, (q31_t)0x8e0afe2, (q31_t)0x804ee885, (q31_t)0x8da6b40, (q31_t)0x804e791d,
+  (q31_t)0x8d42699, (q31_t)0x804e0a04, (q31_t)0x8cde1ec, (q31_t)0x804d9b39, (q31_t)0x8c79d3a, (q31_t)0x804d2cbd, (q31_t)0x8c15882, (q31_t)0x804cbe90,
+  (q31_t)0x8bb13c5, (q31_t)0x804c50b2, (q31_t)0x8b4cf02, (q31_t)0x804be323, (q31_t)0x8ae8a3a, (q31_t)0x804b75e2, (q31_t)0x8a8456d, (q31_t)0x804b08f0,
+  (q31_t)0x8a2009a, (q31_t)0x804a9c4d, (q31_t)0x89bbbc3, (q31_t)0x804a2ff9, (q31_t)0x89576e5, (q31_t)0x8049c3f3, (q31_t)0x88f3203, (q31_t)0x8049583d,
+  (q31_t)0x888ed1b, (q31_t)0x8048ecd5, (q31_t)0x882a82e, (q31_t)0x804881bb, (q31_t)0x87c633c, (q31_t)0x804816f1, (q31_t)0x8761e44, (q31_t)0x8047ac75,
+  (q31_t)0x86fd947, (q31_t)0x80474248, (q31_t)0x8699445, (q31_t)0x8046d86a, (q31_t)0x8634f3e, (q31_t)0x80466edb, (q31_t)0x85d0a32, (q31_t)0x8046059b,
+  (q31_t)0x856c520, (q31_t)0x80459ca9, (q31_t)0x850800a, (q31_t)0x80453406, (q31_t)0x84a3aee, (q31_t)0x8044cbb2, (q31_t)0x843f5cd, (q31_t)0x804463ad,
+  (q31_t)0x83db0a7, (q31_t)0x8043fbf6, (q31_t)0x8376b7c, (q31_t)0x8043948e, (q31_t)0x831264c, (q31_t)0x80432d75, (q31_t)0x82ae117, (q31_t)0x8042c6ab,
+  (q31_t)0x8249bdd, (q31_t)0x80426030, (q31_t)0x81e569d, (q31_t)0x8041fa03, (q31_t)0x8181159, (q31_t)0x80419425, (q31_t)0x811cc10, (q31_t)0x80412e96,
+  (q31_t)0x80b86c2, (q31_t)0x8040c956, (q31_t)0x805416e, (q31_t)0x80406465, (q31_t)0x7fefc16, (q31_t)0x803fffc2, (q31_t)0x7f8b6b9, (q31_t)0x803f9b6f,
+  (q31_t)0x7f27157, (q31_t)0x803f376a, (q31_t)0x7ec2bf0, (q31_t)0x803ed3b3, (q31_t)0x7e5e685, (q31_t)0x803e704c, (q31_t)0x7dfa114, (q31_t)0x803e0d34,
+  (q31_t)0x7d95b9e, (q31_t)0x803daa6a, (q31_t)0x7d31624, (q31_t)0x803d47ef, (q31_t)0x7ccd0a5, (q31_t)0x803ce5c3, (q31_t)0x7c68b21, (q31_t)0x803c83e5,
+  (q31_t)0x7c04598, (q31_t)0x803c2257, (q31_t)0x7ba000b, (q31_t)0x803bc117, (q31_t)0x7b3ba78, (q31_t)0x803b6026, (q31_t)0x7ad74e1, (q31_t)0x803aff84,
+  (q31_t)0x7a72f45, (q31_t)0x803a9f31, (q31_t)0x7a0e9a5, (q31_t)0x803a3f2d, (q31_t)0x79aa400, (q31_t)0x8039df77, (q31_t)0x7945e56, (q31_t)0x80398010,
+  (q31_t)0x78e18a7, (q31_t)0x803920f8, (q31_t)0x787d2f4, (q31_t)0x8038c22f, (q31_t)0x7818d3c, (q31_t)0x803863b5, (q31_t)0x77b4780, (q31_t)0x80380589,
+  (q31_t)0x77501be, (q31_t)0x8037a7ac, (q31_t)0x76ebbf9, (q31_t)0x80374a1f, (q31_t)0x768762e, (q31_t)0x8036ece0, (q31_t)0x762305f, (q31_t)0x80368fef,
+  (q31_t)0x75bea8c, (q31_t)0x8036334e, (q31_t)0x755a4b4, (q31_t)0x8035d6fb, (q31_t)0x74f5ed7, (q31_t)0x80357af8, (q31_t)0x74918f6, (q31_t)0x80351f43,
+  (q31_t)0x742d311, (q31_t)0x8034c3dd, (q31_t)0x73c8d27, (q31_t)0x803468c5, (q31_t)0x7364738, (q31_t)0x80340dfd, (q31_t)0x7300145, (q31_t)0x8033b383,
+  (q31_t)0x729bb4e, (q31_t)0x80335959, (q31_t)0x7237552, (q31_t)0x8032ff7d, (q31_t)0x71d2f52, (q31_t)0x8032a5ef, (q31_t)0x716e94e, (q31_t)0x80324cb1,
+  (q31_t)0x710a345, (q31_t)0x8031f3c2, (q31_t)0x70a5d37, (q31_t)0x80319b21, (q31_t)0x7041726, (q31_t)0x803142cf, (q31_t)0x6fdd110, (q31_t)0x8030eacd,
+  (q31_t)0x6f78af6, (q31_t)0x80309318, (q31_t)0x6f144d7, (q31_t)0x80303bb3, (q31_t)0x6eafeb4, (q31_t)0x802fe49d, (q31_t)0x6e4b88d, (q31_t)0x802f8dd5,
+  (q31_t)0x6de7262, (q31_t)0x802f375d, (q31_t)0x6d82c32, (q31_t)0x802ee133, (q31_t)0x6d1e5fe, (q31_t)0x802e8b58, (q31_t)0x6cb9fc6, (q31_t)0x802e35cb,
+  (q31_t)0x6c5598a, (q31_t)0x802de08e, (q31_t)0x6bf1349, (q31_t)0x802d8ba0, (q31_t)0x6b8cd05, (q31_t)0x802d3700, (q31_t)0x6b286bc, (q31_t)0x802ce2af,
+  (q31_t)0x6ac406f, (q31_t)0x802c8ead, (q31_t)0x6a5fa1e, (q31_t)0x802c3afa, (q31_t)0x69fb3c9, (q31_t)0x802be796, (q31_t)0x6996d70, (q31_t)0x802b9480,
+  (q31_t)0x6932713, (q31_t)0x802b41ba, (q31_t)0x68ce0b2, (q31_t)0x802aef42, (q31_t)0x6869a4c, (q31_t)0x802a9d19, (q31_t)0x68053e3, (q31_t)0x802a4b3f,
+  (q31_t)0x67a0d76, (q31_t)0x8029f9b4, (q31_t)0x673c704, (q31_t)0x8029a878, (q31_t)0x66d808f, (q31_t)0x8029578b, (q31_t)0x6673a16, (q31_t)0x802906ec,
+  (q31_t)0x660f398, (q31_t)0x8028b69c, (q31_t)0x65aad17, (q31_t)0x8028669b, (q31_t)0x6546692, (q31_t)0x802816e9, (q31_t)0x64e2009, (q31_t)0x8027c786,
+  (q31_t)0x647d97c, (q31_t)0x80277872, (q31_t)0x64192eb, (q31_t)0x802729ad, (q31_t)0x63b4c57, (q31_t)0x8026db36, (q31_t)0x63505be, (q31_t)0x80268d0e,
+  (q31_t)0x62ebf22, (q31_t)0x80263f36, (q31_t)0x6287882, (q31_t)0x8025f1ac, (q31_t)0x62231de, (q31_t)0x8025a471, (q31_t)0x61beb36, (q31_t)0x80255784,
+  (q31_t)0x615a48b, (q31_t)0x80250ae7, (q31_t)0x60f5ddc, (q31_t)0x8024be99, (q31_t)0x6091729, (q31_t)0x80247299, (q31_t)0x602d072, (q31_t)0x802426e8,
+  (q31_t)0x5fc89b8, (q31_t)0x8023db86, (q31_t)0x5f642fa, (q31_t)0x80239073, (q31_t)0x5effc38, (q31_t)0x802345af, (q31_t)0x5e9b572, (q31_t)0x8022fb3a,
+  (q31_t)0x5e36ea9, (q31_t)0x8022b114, (q31_t)0x5dd27dd, (q31_t)0x8022673c, (q31_t)0x5d6e10c, (q31_t)0x80221db3, (q31_t)0x5d09a38, (q31_t)0x8021d47a,
+  (q31_t)0x5ca5361, (q31_t)0x80218b8f, (q31_t)0x5c40c86, (q31_t)0x802142f3, (q31_t)0x5bdc5a7, (q31_t)0x8020faa6, (q31_t)0x5b77ec5, (q31_t)0x8020b2a7,
+  (q31_t)0x5b137df, (q31_t)0x80206af8, (q31_t)0x5aaf0f6, (q31_t)0x80202397, (q31_t)0x5a4aa09, (q31_t)0x801fdc86, (q31_t)0x59e6319, (q31_t)0x801f95c3,
+  (q31_t)0x5981c26, (q31_t)0x801f4f4f, (q31_t)0x591d52f, (q31_t)0x801f092a, (q31_t)0x58b8e34, (q31_t)0x801ec354, (q31_t)0x5854736, (q31_t)0x801e7dcd,
+  (q31_t)0x57f0035, (q31_t)0x801e3895, (q31_t)0x578b930, (q31_t)0x801df3ab, (q31_t)0x5727228, (q31_t)0x801daf11, (q31_t)0x56c2b1c, (q31_t)0x801d6ac5,
+  (q31_t)0x565e40d, (q31_t)0x801d26c8, (q31_t)0x55f9cfb, (q31_t)0x801ce31a, (q31_t)0x55955e6, (q31_t)0x801c9fbb, (q31_t)0x5530ecd, (q31_t)0x801c5cab,
+  (q31_t)0x54cc7b1, (q31_t)0x801c19ea, (q31_t)0x5468092, (q31_t)0x801bd777, (q31_t)0x540396f, (q31_t)0x801b9554, (q31_t)0x539f249, (q31_t)0x801b537f,
+  (q31_t)0x533ab20, (q31_t)0x801b11fa, (q31_t)0x52d63f4, (q31_t)0x801ad0c3, (q31_t)0x5271cc4, (q31_t)0x801a8fdb, (q31_t)0x520d592, (q31_t)0x801a4f42,
+  (q31_t)0x51a8e5c, (q31_t)0x801a0ef8, (q31_t)0x5144723, (q31_t)0x8019cefd, (q31_t)0x50dffe7, (q31_t)0x80198f50, (q31_t)0x507b8a8, (q31_t)0x80194ff3,
+  (q31_t)0x5017165, (q31_t)0x801910e4, (q31_t)0x4fb2a20, (q31_t)0x8018d225, (q31_t)0x4f4e2d8, (q31_t)0x801893b4, (q31_t)0x4ee9b8c, (q31_t)0x80185592,
+  (q31_t)0x4e8543e, (q31_t)0x801817bf, (q31_t)0x4e20cec, (q31_t)0x8017da3b, (q31_t)0x4dbc597, (q31_t)0x80179d06, (q31_t)0x4d57e40, (q31_t)0x80176020,
+  (q31_t)0x4cf36e5, (q31_t)0x80172388, (q31_t)0x4c8ef88, (q31_t)0x8016e740, (q31_t)0x4c2a827, (q31_t)0x8016ab46, (q31_t)0x4bc60c4, (q31_t)0x80166f9c,
+  (q31_t)0x4b6195d, (q31_t)0x80163440, (q31_t)0x4afd1f4, (q31_t)0x8015f933, (q31_t)0x4a98a88, (q31_t)0x8015be75, (q31_t)0x4a34319, (q31_t)0x80158406,
+  (q31_t)0x49cfba7, (q31_t)0x801549e6, (q31_t)0x496b432, (q31_t)0x80151015, (q31_t)0x4906cbb, (q31_t)0x8014d693, (q31_t)0x48a2540, (q31_t)0x80149d5f,
+  (q31_t)0x483ddc3, (q31_t)0x8014647b, (q31_t)0x47d9643, (q31_t)0x80142be5, (q31_t)0x4774ec1, (q31_t)0x8013f39e, (q31_t)0x471073b, (q31_t)0x8013bba7,
+  (q31_t)0x46abfb3, (q31_t)0x801383fe, (q31_t)0x4647828, (q31_t)0x80134ca4, (q31_t)0x45e309a, (q31_t)0x80131599, (q31_t)0x457e90a, (q31_t)0x8012dedd,
+  (q31_t)0x451a177, (q31_t)0x8012a86f, (q31_t)0x44b59e1, (q31_t)0x80127251, (q31_t)0x4451249, (q31_t)0x80123c82, (q31_t)0x43ecaae, (q31_t)0x80120701,
+  (q31_t)0x4388310, (q31_t)0x8011d1d0, (q31_t)0x4323b70, (q31_t)0x80119ced, (q31_t)0x42bf3cd, (q31_t)0x80116859, (q31_t)0x425ac28, (q31_t)0x80113414,
+  (q31_t)0x41f6480, (q31_t)0x8011001f, (q31_t)0x4191cd5, (q31_t)0x8010cc78, (q31_t)0x412d528, (q31_t)0x8010991f, (q31_t)0x40c8d79, (q31_t)0x80106616,
+  (q31_t)0x40645c7, (q31_t)0x8010335c, (q31_t)0x3fffe12, (q31_t)0x801000f1, (q31_t)0x3f9b65b, (q31_t)0x800fced4, (q31_t)0x3f36ea2, (q31_t)0x800f9d07,
+  (q31_t)0x3ed26e6, (q31_t)0x800f6b88, (q31_t)0x3e6df28, (q31_t)0x800f3a59, (q31_t)0x3e09767, (q31_t)0x800f0978, (q31_t)0x3da4fa4, (q31_t)0x800ed8e6,
+  (q31_t)0x3d407df, (q31_t)0x800ea8a3, (q31_t)0x3cdc017, (q31_t)0x800e78af, (q31_t)0x3c7784d, (q31_t)0x800e490a, (q31_t)0x3c13080, (q31_t)0x800e19b4,
+  (q31_t)0x3bae8b2, (q31_t)0x800deaad, (q31_t)0x3b4a0e0, (q31_t)0x800dbbf5, (q31_t)0x3ae590d, (q31_t)0x800d8d8b, (q31_t)0x3a81137, (q31_t)0x800d5f71,
+  (q31_t)0x3a1c960, (q31_t)0x800d31a5, (q31_t)0x39b8185, (q31_t)0x800d0429, (q31_t)0x39539a9, (q31_t)0x800cd6fb, (q31_t)0x38ef1ca, (q31_t)0x800caa1c,
+  (q31_t)0x388a9ea, (q31_t)0x800c7d8c, (q31_t)0x3826207, (q31_t)0x800c514c, (q31_t)0x37c1a22, (q31_t)0x800c255a, (q31_t)0x375d23a, (q31_t)0x800bf9b7,
+  (q31_t)0x36f8a51, (q31_t)0x800bce63, (q31_t)0x3694265, (q31_t)0x800ba35d, (q31_t)0x362fa78, (q31_t)0x800b78a7, (q31_t)0x35cb288, (q31_t)0x800b4e40,
+  (q31_t)0x3566a96, (q31_t)0x800b2427, (q31_t)0x35022a2, (q31_t)0x800afa5e, (q31_t)0x349daac, (q31_t)0x800ad0e3, (q31_t)0x34392b4, (q31_t)0x800aa7b8,
+  (q31_t)0x33d4abb, (q31_t)0x800a7edb, (q31_t)0x33702bf, (q31_t)0x800a564e, (q31_t)0x330bac1, (q31_t)0x800a2e0f, (q31_t)0x32a72c1, (q31_t)0x800a061f,
+  (q31_t)0x3242abf, (q31_t)0x8009de7e, (q31_t)0x31de2bb, (q31_t)0x8009b72c, (q31_t)0x3179ab5, (q31_t)0x80099029, (q31_t)0x31152ae, (q31_t)0x80096975,
+  (q31_t)0x30b0aa4, (q31_t)0x80094310, (q31_t)0x304c299, (q31_t)0x80091cf9, (q31_t)0x2fe7a8c, (q31_t)0x8008f732, (q31_t)0x2f8327d, (q31_t)0x8008d1ba,
+  (q31_t)0x2f1ea6c, (q31_t)0x8008ac90, (q31_t)0x2eba259, (q31_t)0x800887b6, (q31_t)0x2e55a44, (q31_t)0x8008632a, (q31_t)0x2df122e, (q31_t)0x80083eed,
+  (q31_t)0x2d8ca16, (q31_t)0x80081b00, (q31_t)0x2d281fc, (q31_t)0x8007f761, (q31_t)0x2cc39e1, (q31_t)0x8007d411, (q31_t)0x2c5f1c3, (q31_t)0x8007b110,
+  (q31_t)0x2bfa9a4, (q31_t)0x80078e5e, (q31_t)0x2b96184, (q31_t)0x80076bfb, (q31_t)0x2b31961, (q31_t)0x800749e7, (q31_t)0x2acd13d, (q31_t)0x80072822,
+  (q31_t)0x2a68917, (q31_t)0x800706ac, (q31_t)0x2a040f0, (q31_t)0x8006e585, (q31_t)0x299f8c7, (q31_t)0x8006c4ac, (q31_t)0x293b09c, (q31_t)0x8006a423,
+  (q31_t)0x28d6870, (q31_t)0x800683e8, (q31_t)0x2872043, (q31_t)0x800663fd, (q31_t)0x280d813, (q31_t)0x80064460, (q31_t)0x27a8fe2, (q31_t)0x80062513,
+  (q31_t)0x27447b0, (q31_t)0x80060614, (q31_t)0x26dff7c, (q31_t)0x8005e764, (q31_t)0x267b747, (q31_t)0x8005c904, (q31_t)0x2616f10, (q31_t)0x8005aaf2,
+  (q31_t)0x25b26d7, (q31_t)0x80058d2f, (q31_t)0x254de9e, (q31_t)0x80056fbb, (q31_t)0x24e9662, (q31_t)0x80055296, (q31_t)0x2484e26, (q31_t)0x800535c0,
+  (q31_t)0x24205e8, (q31_t)0x80051939, (q31_t)0x23bbda8, (q31_t)0x8004fd00, (q31_t)0x2357567, (q31_t)0x8004e117, (q31_t)0x22f2d25, (q31_t)0x8004c57d,
+  (q31_t)0x228e4e2, (q31_t)0x8004aa32, (q31_t)0x2229c9d, (q31_t)0x80048f35, (q31_t)0x21c5457, (q31_t)0x80047488, (q31_t)0x2160c0f, (q31_t)0x80045a29,
+  (q31_t)0x20fc3c6, (q31_t)0x8004401a, (q31_t)0x2097b7c, (q31_t)0x80042659, (q31_t)0x2033331, (q31_t)0x80040ce7, (q31_t)0x1fceae4, (q31_t)0x8003f3c5,
+  (q31_t)0x1f6a297, (q31_t)0x8003daf1, (q31_t)0x1f05a48, (q31_t)0x8003c26c, (q31_t)0x1ea11f7, (q31_t)0x8003aa36, (q31_t)0x1e3c9a6, (q31_t)0x8003924f,
+  (q31_t)0x1dd8154, (q31_t)0x80037ab7, (q31_t)0x1d73900, (q31_t)0x8003636e, (q31_t)0x1d0f0ab, (q31_t)0x80034c74, (q31_t)0x1caa855, (q31_t)0x800335c9,
+  (q31_t)0x1c45ffe, (q31_t)0x80031f6d, (q31_t)0x1be17a6, (q31_t)0x80030960, (q31_t)0x1b7cf4d, (q31_t)0x8002f3a1, (q31_t)0x1b186f3, (q31_t)0x8002de32,
+  (q31_t)0x1ab3e97, (q31_t)0x8002c912, (q31_t)0x1a4f63b, (q31_t)0x8002b440, (q31_t)0x19eaddd, (q31_t)0x80029fbe, (q31_t)0x198657f, (q31_t)0x80028b8a,
+  (q31_t)0x1921d20, (q31_t)0x800277a6, (q31_t)0x18bd4bf, (q31_t)0x80026410, (q31_t)0x1858c5e, (q31_t)0x800250c9, (q31_t)0x17f43fc, (q31_t)0x80023dd2,
+  (q31_t)0x178fb99, (q31_t)0x80022b29, (q31_t)0x172b335, (q31_t)0x800218cf, (q31_t)0x16c6ad0, (q31_t)0x800206c4, (q31_t)0x166226a, (q31_t)0x8001f508,
+  (q31_t)0x15fda03, (q31_t)0x8001e39b, (q31_t)0x159919c, (q31_t)0x8001d27d, (q31_t)0x1534934, (q31_t)0x8001c1ae, (q31_t)0x14d00ca, (q31_t)0x8001b12e,
+  (q31_t)0x146b860, (q31_t)0x8001a0fd, (q31_t)0x1406ff6, (q31_t)0x8001911b, (q31_t)0x13a278a, (q31_t)0x80018187, (q31_t)0x133df1e, (q31_t)0x80017243,
+  (q31_t)0x12d96b1, (q31_t)0x8001634e, (q31_t)0x1274e43, (q31_t)0x800154a7, (q31_t)0x12105d5, (q31_t)0x80014650, (q31_t)0x11abd66, (q31_t)0x80013847,
+  (q31_t)0x11474f6, (q31_t)0x80012a8e, (q31_t)0x10e2c85, (q31_t)0x80011d23, (q31_t)0x107e414, (q31_t)0x80011008, (q31_t)0x1019ba2, (q31_t)0x8001033b,
+  (q31_t)0x0fb5330, (q31_t)0x8000f6bd, (q31_t)0x0f50abd, (q31_t)0x8000ea8e, (q31_t)0x0eec249, (q31_t)0x8000deaf, (q31_t)0x0e879d5, (q31_t)0x8000d31e,
+  (q31_t)0x0e23160, (q31_t)0x8000c7dc, (q31_t)0x0dbe8eb, (q31_t)0x8000bce9, (q31_t)0x0d5a075, (q31_t)0x8000b245, (q31_t)0x0cf57ff, (q31_t)0x8000a7f0,
+  (q31_t)0x0c90f88, (q31_t)0x80009dea, (q31_t)0x0c2c711, (q31_t)0x80009433, (q31_t)0x0bc7e99, (q31_t)0x80008aca, (q31_t)0x0b63621, (q31_t)0x800081b1,
+  (q31_t)0x0afeda8, (q31_t)0x800078e7, (q31_t)0x0a9a52f, (q31_t)0x8000706c, (q31_t)0x0a35cb5, (q31_t)0x8000683f, (q31_t)0x09d143b, (q31_t)0x80006062,
+  (q31_t)0x096cbc1, (q31_t)0x800058d4, (q31_t)0x0908346, (q31_t)0x80005194, (q31_t)0x08a3acb, (q31_t)0x80004aa4, (q31_t)0x083f250, (q31_t)0x80004402,
+  (q31_t)0x07da9d4, (q31_t)0x80003daf, (q31_t)0x0776159, (q31_t)0x800037ac, (q31_t)0x07118dc, (q31_t)0x800031f7, (q31_t)0x06ad060, (q31_t)0x80002c91,
+  (q31_t)0x06487e3, (q31_t)0x8000277a, (q31_t)0x05e3f66, (q31_t)0x800022b3, (q31_t)0x057f6e9, (q31_t)0x80001e3a, (q31_t)0x051ae6b, (q31_t)0x80001a10,
+  (q31_t)0x04b65ee, (q31_t)0x80001635, (q31_t)0x0451d70, (q31_t)0x800012a9, (q31_t)0x03ed4f2, (q31_t)0x80000f6c, (q31_t)0x0388c74, (q31_t)0x80000c7e,
+  (q31_t)0x03243f5, (q31_t)0x800009df, (q31_t)0x02bfb77, (q31_t)0x8000078e, (q31_t)0x025b2f8, (q31_t)0x8000058d, (q31_t)0x01f6a7a, (q31_t)0x800003db,
+  (q31_t)0x01921fb, (q31_t)0x80000278, (q31_t)0x012d97c, (q31_t)0x80000163, (q31_t)0x00c90fe, (q31_t)0x8000009e, (q31_t)0x006487f, (q31_t)0x80000027
+};
+    const q31_t cos_factorsQ31_8192[8192] = {
+  (q31_t)0x7ffffff6, (q31_t)0x7fffffa7, (q31_t)0x7fffff09, (q31_t)0x7ffffe1c, (q31_t)0x7ffffce1, (q31_t)0x7ffffb56, (q31_t)0x7ffff97c, (q31_t)0x7ffff753,
+  (q31_t)0x7ffff4dc, (q31_t)0x7ffff215, (q31_t)0x7fffef00, (q31_t)0x7fffeb9b, (q31_t)0x7fffe7e8, (q31_t)0x7fffe3e5, (q31_t)0x7fffdf94, (q31_t)0x7fffdaf3,
+  (q31_t)0x7fffd604, (q31_t)0x7fffd0c6, (q31_t)0x7fffcb39, (q31_t)0x7fffc55c, (q31_t)0x7fffbf31, (q31_t)0x7fffb8b7, (q31_t)0x7fffb1ee, (q31_t)0x7fffaad6,
+  (q31_t)0x7fffa36f, (q31_t)0x7fff9bb9, (q31_t)0x7fff93b4, (q31_t)0x7fff8b61, (q31_t)0x7fff82be, (q31_t)0x7fff79cc, (q31_t)0x7fff708b, (q31_t)0x7fff66fc,
+  (q31_t)0x7fff5d1d, (q31_t)0x7fff52ef, (q31_t)0x7fff4873, (q31_t)0x7fff3da8, (q31_t)0x7fff328d, (q31_t)0x7fff2724, (q31_t)0x7fff1b6b, (q31_t)0x7fff0f64,
+  (q31_t)0x7fff030e, (q31_t)0x7ffef669, (q31_t)0x7ffee975, (q31_t)0x7ffedc31, (q31_t)0x7ffece9f, (q31_t)0x7ffec0be, (q31_t)0x7ffeb28e, (q31_t)0x7ffea40f,
+  (q31_t)0x7ffe9542, (q31_t)0x7ffe8625, (q31_t)0x7ffe76b9, (q31_t)0x7ffe66fe, (q31_t)0x7ffe56f5, (q31_t)0x7ffe469c, (q31_t)0x7ffe35f4, (q31_t)0x7ffe24fe,
+  (q31_t)0x7ffe13b8, (q31_t)0x7ffe0224, (q31_t)0x7ffdf040, (q31_t)0x7ffdde0e, (q31_t)0x7ffdcb8d, (q31_t)0x7ffdb8bc, (q31_t)0x7ffda59d, (q31_t)0x7ffd922f,
+  (q31_t)0x7ffd7e72, (q31_t)0x7ffd6a66, (q31_t)0x7ffd560b, (q31_t)0x7ffd4161, (q31_t)0x7ffd2c68, (q31_t)0x7ffd1720, (q31_t)0x7ffd0189, (q31_t)0x7ffceba4,
+  (q31_t)0x7ffcd56f, (q31_t)0x7ffcbeeb, (q31_t)0x7ffca819, (q31_t)0x7ffc90f7, (q31_t)0x7ffc7987, (q31_t)0x7ffc61c7, (q31_t)0x7ffc49b9, (q31_t)0x7ffc315b,
+  (q31_t)0x7ffc18af, (q31_t)0x7ffbffb4, (q31_t)0x7ffbe66a, (q31_t)0x7ffbccd0, (q31_t)0x7ffbb2e8, (q31_t)0x7ffb98b1, (q31_t)0x7ffb7e2b, (q31_t)0x7ffb6356,
+  (q31_t)0x7ffb4833, (q31_t)0x7ffb2cc0, (q31_t)0x7ffb10fe, (q31_t)0x7ffaf4ed, (q31_t)0x7ffad88e, (q31_t)0x7ffabbdf, (q31_t)0x7ffa9ee2, (q31_t)0x7ffa8195,
+  (q31_t)0x7ffa63fa, (q31_t)0x7ffa460f, (q31_t)0x7ffa27d6, (q31_t)0x7ffa094e, (q31_t)0x7ff9ea76, (q31_t)0x7ff9cb50, (q31_t)0x7ff9abdb, (q31_t)0x7ff98c17,
+  (q31_t)0x7ff96c04, (q31_t)0x7ff94ba2, (q31_t)0x7ff92af1, (q31_t)0x7ff909f2, (q31_t)0x7ff8e8a3, (q31_t)0x7ff8c705, (q31_t)0x7ff8a519, (q31_t)0x7ff882dd,
+  (q31_t)0x7ff86053, (q31_t)0x7ff83d79, (q31_t)0x7ff81a51, (q31_t)0x7ff7f6da, (q31_t)0x7ff7d313, (q31_t)0x7ff7aefe, (q31_t)0x7ff78a9a, (q31_t)0x7ff765e7,
+  (q31_t)0x7ff740e5, (q31_t)0x7ff71b94, (q31_t)0x7ff6f5f4, (q31_t)0x7ff6d005, (q31_t)0x7ff6a9c8, (q31_t)0x7ff6833b, (q31_t)0x7ff65c5f, (q31_t)0x7ff63535,
+  (q31_t)0x7ff60dbb, (q31_t)0x7ff5e5f3, (q31_t)0x7ff5bddc, (q31_t)0x7ff59576, (q31_t)0x7ff56cc0, (q31_t)0x7ff543bc, (q31_t)0x7ff51a69, (q31_t)0x7ff4f0c7,
+  (q31_t)0x7ff4c6d6, (q31_t)0x7ff49c96, (q31_t)0x7ff47208, (q31_t)0x7ff4472a, (q31_t)0x7ff41bfd, (q31_t)0x7ff3f082, (q31_t)0x7ff3c4b7, (q31_t)0x7ff3989e,
+  (q31_t)0x7ff36c36, (q31_t)0x7ff33f7e, (q31_t)0x7ff31278, (q31_t)0x7ff2e523, (q31_t)0x7ff2b77f, (q31_t)0x7ff2898c, (q31_t)0x7ff25b4a, (q31_t)0x7ff22cb9,
+  (q31_t)0x7ff1fdd9, (q31_t)0x7ff1ceab, (q31_t)0x7ff19f2d, (q31_t)0x7ff16f61, (q31_t)0x7ff13f45, (q31_t)0x7ff10edb, (q31_t)0x7ff0de22, (q31_t)0x7ff0ad19,
+  (q31_t)0x7ff07bc2, (q31_t)0x7ff04a1c, (q31_t)0x7ff01827, (q31_t)0x7fefe5e4, (q31_t)0x7fefb351, (q31_t)0x7fef806f, (q31_t)0x7fef4d3e, (q31_t)0x7fef19bf,
+  (q31_t)0x7feee5f0, (q31_t)0x7feeb1d3, (q31_t)0x7fee7d67, (q31_t)0x7fee48ac, (q31_t)0x7fee13a1, (q31_t)0x7fedde48, (q31_t)0x7feda8a0, (q31_t)0x7fed72aa,
+  (q31_t)0x7fed3c64, (q31_t)0x7fed05cf, (q31_t)0x7fecceec, (q31_t)0x7fec97b9, (q31_t)0x7fec6038, (q31_t)0x7fec2867, (q31_t)0x7febf048, (q31_t)0x7febb7da,
+  (q31_t)0x7feb7f1d, (q31_t)0x7feb4611, (q31_t)0x7feb0cb6, (q31_t)0x7fead30c, (q31_t)0x7fea9914, (q31_t)0x7fea5ecc, (q31_t)0x7fea2436, (q31_t)0x7fe9e950,
+  (q31_t)0x7fe9ae1c, (q31_t)0x7fe97299, (q31_t)0x7fe936c7, (q31_t)0x7fe8faa6, (q31_t)0x7fe8be36, (q31_t)0x7fe88177, (q31_t)0x7fe84469, (q31_t)0x7fe8070d,
+  (q31_t)0x7fe7c961, (q31_t)0x7fe78b67, (q31_t)0x7fe74d1e, (q31_t)0x7fe70e85, (q31_t)0x7fe6cf9e, (q31_t)0x7fe69068, (q31_t)0x7fe650e3, (q31_t)0x7fe61110,
+  (q31_t)0x7fe5d0ed, (q31_t)0x7fe5907b, (q31_t)0x7fe54fbb, (q31_t)0x7fe50eac, (q31_t)0x7fe4cd4d, (q31_t)0x7fe48ba0, (q31_t)0x7fe449a4, (q31_t)0x7fe40759,
+  (q31_t)0x7fe3c4bf, (q31_t)0x7fe381d7, (q31_t)0x7fe33e9f, (q31_t)0x7fe2fb19, (q31_t)0x7fe2b743, (q31_t)0x7fe2731f, (q31_t)0x7fe22eac, (q31_t)0x7fe1e9ea,
+  (q31_t)0x7fe1a4d9, (q31_t)0x7fe15f79, (q31_t)0x7fe119cb, (q31_t)0x7fe0d3cd, (q31_t)0x7fe08d81, (q31_t)0x7fe046e5, (q31_t)0x7fdffffb, (q31_t)0x7fdfb8c2,
+  (q31_t)0x7fdf713a, (q31_t)0x7fdf2963, (q31_t)0x7fdee13e, (q31_t)0x7fde98c9, (q31_t)0x7fde5006, (q31_t)0x7fde06f3, (q31_t)0x7fddbd92, (q31_t)0x7fdd73e2,
+  (q31_t)0x7fdd29e3, (q31_t)0x7fdcdf95, (q31_t)0x7fdc94f9, (q31_t)0x7fdc4a0d, (q31_t)0x7fdbfed3, (q31_t)0x7fdbb349, (q31_t)0x7fdb6771, (q31_t)0x7fdb1b4a,
+  (q31_t)0x7fdaced4, (q31_t)0x7fda820f, (q31_t)0x7fda34fc, (q31_t)0x7fd9e799, (q31_t)0x7fd999e8, (q31_t)0x7fd94be8, (q31_t)0x7fd8fd98, (q31_t)0x7fd8aefa,
+  (q31_t)0x7fd8600e, (q31_t)0x7fd810d2, (q31_t)0x7fd7c147, (q31_t)0x7fd7716e, (q31_t)0x7fd72146, (q31_t)0x7fd6d0cf, (q31_t)0x7fd68009, (q31_t)0x7fd62ef4,
+  (q31_t)0x7fd5dd90, (q31_t)0x7fd58bdd, (q31_t)0x7fd539dc, (q31_t)0x7fd4e78c, (q31_t)0x7fd494ed, (q31_t)0x7fd441ff, (q31_t)0x7fd3eec2, (q31_t)0x7fd39b36,
+  (q31_t)0x7fd3475c, (q31_t)0x7fd2f332, (q31_t)0x7fd29eba, (q31_t)0x7fd249f3, (q31_t)0x7fd1f4dd, (q31_t)0x7fd19f78, (q31_t)0x7fd149c5, (q31_t)0x7fd0f3c2,
+  (q31_t)0x7fd09d71, (q31_t)0x7fd046d1, (q31_t)0x7fcfefe2, (q31_t)0x7fcf98a4, (q31_t)0x7fcf4117, (q31_t)0x7fcee93c, (q31_t)0x7fce9112, (q31_t)0x7fce3898,
+  (q31_t)0x7fcddfd0, (q31_t)0x7fcd86b9, (q31_t)0x7fcd2d54, (q31_t)0x7fccd39f, (q31_t)0x7fcc799c, (q31_t)0x7fcc1f4a, (q31_t)0x7fcbc4a9, (q31_t)0x7fcb69b9,
+  (q31_t)0x7fcb0e7a, (q31_t)0x7fcab2ed, (q31_t)0x7fca5710, (q31_t)0x7fc9fae5, (q31_t)0x7fc99e6b, (q31_t)0x7fc941a2, (q31_t)0x7fc8e48b, (q31_t)0x7fc88724,
+  (q31_t)0x7fc8296f, (q31_t)0x7fc7cb6b, (q31_t)0x7fc76d18, (q31_t)0x7fc70e76, (q31_t)0x7fc6af86, (q31_t)0x7fc65046, (q31_t)0x7fc5f0b8, (q31_t)0x7fc590db,
+  (q31_t)0x7fc530af, (q31_t)0x7fc4d035, (q31_t)0x7fc46f6b, (q31_t)0x7fc40e53, (q31_t)0x7fc3acec, (q31_t)0x7fc34b36, (q31_t)0x7fc2e931, (q31_t)0x7fc286de,
+  (q31_t)0x7fc2243b, (q31_t)0x7fc1c14a, (q31_t)0x7fc15e0a, (q31_t)0x7fc0fa7b, (q31_t)0x7fc0969e, (q31_t)0x7fc03271, (q31_t)0x7fbfcdf6, (q31_t)0x7fbf692c,
+  (q31_t)0x7fbf0414, (q31_t)0x7fbe9eac, (q31_t)0x7fbe38f6, (q31_t)0x7fbdd2f0, (q31_t)0x7fbd6c9c, (q31_t)0x7fbd05fa, (q31_t)0x7fbc9f08, (q31_t)0x7fbc37c8,
+  (q31_t)0x7fbbd039, (q31_t)0x7fbb685b, (q31_t)0x7fbb002e, (q31_t)0x7fba97b2, (q31_t)0x7fba2ee8, (q31_t)0x7fb9c5cf, (q31_t)0x7fb95c67, (q31_t)0x7fb8f2b0,
+  (q31_t)0x7fb888ab, (q31_t)0x7fb81e57, (q31_t)0x7fb7b3b4, (q31_t)0x7fb748c2, (q31_t)0x7fb6dd81, (q31_t)0x7fb671f2, (q31_t)0x7fb60614, (q31_t)0x7fb599e7,
+  (q31_t)0x7fb52d6b, (q31_t)0x7fb4c0a1, (q31_t)0x7fb45387, (q31_t)0x7fb3e61f, (q31_t)0x7fb37869, (q31_t)0x7fb30a63, (q31_t)0x7fb29c0f, (q31_t)0x7fb22d6c,
+  (q31_t)0x7fb1be7a, (q31_t)0x7fb14f39, (q31_t)0x7fb0dfaa, (q31_t)0x7fb06fcb, (q31_t)0x7fafff9e, (q31_t)0x7faf8f23, (q31_t)0x7faf1e58, (q31_t)0x7faead3f,
+  (q31_t)0x7fae3bd7, (q31_t)0x7fadca20, (q31_t)0x7fad581b, (q31_t)0x7face5c6, (q31_t)0x7fac7323, (q31_t)0x7fac0031, (q31_t)0x7fab8cf1, (q31_t)0x7fab1962,
+  (q31_t)0x7faaa584, (q31_t)0x7faa3157, (q31_t)0x7fa9bcdb, (q31_t)0x7fa94811, (q31_t)0x7fa8d2f8, (q31_t)0x7fa85d90, (q31_t)0x7fa7e7d9, (q31_t)0x7fa771d4,
+  (q31_t)0x7fa6fb80, (q31_t)0x7fa684dd, (q31_t)0x7fa60dec, (q31_t)0x7fa596ac, (q31_t)0x7fa51f1d, (q31_t)0x7fa4a73f, (q31_t)0x7fa42f12, (q31_t)0x7fa3b697,
+  (q31_t)0x7fa33dcd, (q31_t)0x7fa2c4b5, (q31_t)0x7fa24b4d, (q31_t)0x7fa1d197, (q31_t)0x7fa15792, (q31_t)0x7fa0dd3f, (q31_t)0x7fa0629c, (q31_t)0x7f9fe7ab,
+  (q31_t)0x7f9f6c6b, (q31_t)0x7f9ef0dd, (q31_t)0x7f9e7500, (q31_t)0x7f9df8d4, (q31_t)0x7f9d7c59, (q31_t)0x7f9cff90, (q31_t)0x7f9c8278, (q31_t)0x7f9c0511,
+  (q31_t)0x7f9b875b, (q31_t)0x7f9b0957, (q31_t)0x7f9a8b04, (q31_t)0x7f9a0c62, (q31_t)0x7f998d72, (q31_t)0x7f990e33, (q31_t)0x7f988ea5, (q31_t)0x7f980ec8,
+  (q31_t)0x7f978e9d, (q31_t)0x7f970e23, (q31_t)0x7f968d5b, (q31_t)0x7f960c43, (q31_t)0x7f958add, (q31_t)0x7f950929, (q31_t)0x7f948725, (q31_t)0x7f9404d3,
+  (q31_t)0x7f938232, (q31_t)0x7f92ff43, (q31_t)0x7f927c04, (q31_t)0x7f91f878, (q31_t)0x7f91749c, (q31_t)0x7f90f072, (q31_t)0x7f906bf9, (q31_t)0x7f8fe731,
+  (q31_t)0x7f8f621b, (q31_t)0x7f8edcb6, (q31_t)0x7f8e5702, (q31_t)0x7f8dd0ff, (q31_t)0x7f8d4aae, (q31_t)0x7f8cc40f, (q31_t)0x7f8c3d20, (q31_t)0x7f8bb5e3,
+  (q31_t)0x7f8b2e57, (q31_t)0x7f8aa67d, (q31_t)0x7f8a1e54, (q31_t)0x7f8995dc, (q31_t)0x7f890d15, (q31_t)0x7f888400, (q31_t)0x7f87fa9c, (q31_t)0x7f8770ea,
+  (q31_t)0x7f86e6e9, (q31_t)0x7f865c99, (q31_t)0x7f85d1fa, (q31_t)0x7f85470d, (q31_t)0x7f84bbd1, (q31_t)0x7f843047, (q31_t)0x7f83a46e, (q31_t)0x7f831846,
+  (q31_t)0x7f828bcf, (q31_t)0x7f81ff0a, (q31_t)0x7f8171f6, (q31_t)0x7f80e494, (q31_t)0x7f8056e3, (q31_t)0x7f7fc8e3, (q31_t)0x7f7f3a95, (q31_t)0x7f7eabf8,
+  (q31_t)0x7f7e1d0c, (q31_t)0x7f7d8dd2, (q31_t)0x7f7cfe49, (q31_t)0x7f7c6e71, (q31_t)0x7f7bde4b, (q31_t)0x7f7b4dd6, (q31_t)0x7f7abd13, (q31_t)0x7f7a2c01,
+  (q31_t)0x7f799aa0, (q31_t)0x7f7908f0, (q31_t)0x7f7876f2, (q31_t)0x7f77e4a6, (q31_t)0x7f77520a, (q31_t)0x7f76bf21, (q31_t)0x7f762be8, (q31_t)0x7f759861,
+  (q31_t)0x7f75048b, (q31_t)0x7f747067, (q31_t)0x7f73dbf4, (q31_t)0x7f734732, (q31_t)0x7f72b222, (q31_t)0x7f721cc3, (q31_t)0x7f718715, (q31_t)0x7f70f119,
+  (q31_t)0x7f705ace, (q31_t)0x7f6fc435, (q31_t)0x7f6f2d4d, (q31_t)0x7f6e9617, (q31_t)0x7f6dfe91, (q31_t)0x7f6d66be, (q31_t)0x7f6cce9b, (q31_t)0x7f6c362a,
+  (q31_t)0x7f6b9d6b, (q31_t)0x7f6b045d, (q31_t)0x7f6a6b00, (q31_t)0x7f69d154, (q31_t)0x7f69375a, (q31_t)0x7f689d12, (q31_t)0x7f68027b, (q31_t)0x7f676795,
+  (q31_t)0x7f66cc61, (q31_t)0x7f6630de, (q31_t)0x7f65950c, (q31_t)0x7f64f8ec, (q31_t)0x7f645c7d, (q31_t)0x7f63bfc0, (q31_t)0x7f6322b4, (q31_t)0x7f62855a,
+  (q31_t)0x7f61e7b1, (q31_t)0x7f6149b9, (q31_t)0x7f60ab73, (q31_t)0x7f600cdf, (q31_t)0x7f5f6dfb, (q31_t)0x7f5ecec9, (q31_t)0x7f5e2f49, (q31_t)0x7f5d8f7a,
+  (q31_t)0x7f5cef5c, (q31_t)0x7f5c4ef0, (q31_t)0x7f5bae36, (q31_t)0x7f5b0d2c, (q31_t)0x7f5a6bd5, (q31_t)0x7f59ca2e, (q31_t)0x7f592839, (q31_t)0x7f5885f6,
+  (q31_t)0x7f57e364, (q31_t)0x7f574083, (q31_t)0x7f569d54, (q31_t)0x7f55f9d6, (q31_t)0x7f55560a, (q31_t)0x7f54b1ef, (q31_t)0x7f540d86, (q31_t)0x7f5368ce,
+  (q31_t)0x7f52c3c8, (q31_t)0x7f521e73, (q31_t)0x7f5178cf, (q31_t)0x7f50d2dd, (q31_t)0x7f502c9d, (q31_t)0x7f4f860e, (q31_t)0x7f4edf30, (q31_t)0x7f4e3804,
+  (q31_t)0x7f4d9089, (q31_t)0x7f4ce8c0, (q31_t)0x7f4c40a8, (q31_t)0x7f4b9842, (q31_t)0x7f4aef8d, (q31_t)0x7f4a468a, (q31_t)0x7f499d38, (q31_t)0x7f48f398,
+  (q31_t)0x7f4849a9, (q31_t)0x7f479f6c, (q31_t)0x7f46f4e0, (q31_t)0x7f464a06, (q31_t)0x7f459edd, (q31_t)0x7f44f365, (q31_t)0x7f44479f, (q31_t)0x7f439b8b,
+  (q31_t)0x7f42ef28, (q31_t)0x7f424277, (q31_t)0x7f419577, (q31_t)0x7f40e828, (q31_t)0x7f403a8b, (q31_t)0x7f3f8ca0, (q31_t)0x7f3ede66, (q31_t)0x7f3e2fde,
+  (q31_t)0x7f3d8107, (q31_t)0x7f3cd1e2, (q31_t)0x7f3c226e, (q31_t)0x7f3b72ab, (q31_t)0x7f3ac29b, (q31_t)0x7f3a123b, (q31_t)0x7f39618e, (q31_t)0x7f38b091,
+  (q31_t)0x7f37ff47, (q31_t)0x7f374dad, (q31_t)0x7f369bc6, (q31_t)0x7f35e990, (q31_t)0x7f35370b, (q31_t)0x7f348438, (q31_t)0x7f33d116, (q31_t)0x7f331da6,
+  (q31_t)0x7f3269e8, (q31_t)0x7f31b5db, (q31_t)0x7f31017f, (q31_t)0x7f304cd6, (q31_t)0x7f2f97dd, (q31_t)0x7f2ee296, (q31_t)0x7f2e2d01, (q31_t)0x7f2d771e,
+  (q31_t)0x7f2cc0eb, (q31_t)0x7f2c0a6b, (q31_t)0x7f2b539c, (q31_t)0x7f2a9c7e, (q31_t)0x7f29e512, (q31_t)0x7f292d58, (q31_t)0x7f28754f, (q31_t)0x7f27bcf8,
+  (q31_t)0x7f270452, (q31_t)0x7f264b5e, (q31_t)0x7f25921c, (q31_t)0x7f24d88b, (q31_t)0x7f241eab, (q31_t)0x7f23647e, (q31_t)0x7f22aa01, (q31_t)0x7f21ef37,
+  (q31_t)0x7f21341e, (q31_t)0x7f2078b6, (q31_t)0x7f1fbd00, (q31_t)0x7f1f00fc, (q31_t)0x7f1e44a9, (q31_t)0x7f1d8808, (q31_t)0x7f1ccb18, (q31_t)0x7f1c0dda,
+  (q31_t)0x7f1b504e, (q31_t)0x7f1a9273, (q31_t)0x7f19d44a, (q31_t)0x7f1915d2, (q31_t)0x7f18570c, (q31_t)0x7f1797f8, (q31_t)0x7f16d895, (q31_t)0x7f1618e4,
+  (q31_t)0x7f1558e4, (q31_t)0x7f149896, (q31_t)0x7f13d7fa, (q31_t)0x7f13170f, (q31_t)0x7f1255d6, (q31_t)0x7f11944f, (q31_t)0x7f10d279, (q31_t)0x7f101054,
+  (q31_t)0x7f0f4de2, (q31_t)0x7f0e8b21, (q31_t)0x7f0dc811, (q31_t)0x7f0d04b3, (q31_t)0x7f0c4107, (q31_t)0x7f0b7d0d, (q31_t)0x7f0ab8c4, (q31_t)0x7f09f42d,
+  (q31_t)0x7f092f47, (q31_t)0x7f086a13, (q31_t)0x7f07a491, (q31_t)0x7f06dec0, (q31_t)0x7f0618a1, (q31_t)0x7f055233, (q31_t)0x7f048b78, (q31_t)0x7f03c46d,
+  (q31_t)0x7f02fd15, (q31_t)0x7f02356e, (q31_t)0x7f016d79, (q31_t)0x7f00a535, (q31_t)0x7effdca4, (q31_t)0x7eff13c3, (q31_t)0x7efe4a95, (q31_t)0x7efd8118,
+  (q31_t)0x7efcb74d, (q31_t)0x7efbed33, (q31_t)0x7efb22cb, (q31_t)0x7efa5815, (q31_t)0x7ef98d11, (q31_t)0x7ef8c1be, (q31_t)0x7ef7f61d, (q31_t)0x7ef72a2d,
+  (q31_t)0x7ef65def, (q31_t)0x7ef59163, (q31_t)0x7ef4c489, (q31_t)0x7ef3f760, (q31_t)0x7ef329e9, (q31_t)0x7ef25c24, (q31_t)0x7ef18e10, (q31_t)0x7ef0bfae,
+  (q31_t)0x7eeff0fe, (q31_t)0x7eef21ff, (q31_t)0x7eee52b2, (q31_t)0x7eed8317, (q31_t)0x7eecb32d, (q31_t)0x7eebe2f6, (q31_t)0x7eeb1270, (q31_t)0x7eea419b,
+  (q31_t)0x7ee97079, (q31_t)0x7ee89f08, (q31_t)0x7ee7cd49, (q31_t)0x7ee6fb3b, (q31_t)0x7ee628df, (q31_t)0x7ee55635, (q31_t)0x7ee4833d, (q31_t)0x7ee3aff6,
+  (q31_t)0x7ee2dc61, (q31_t)0x7ee2087e, (q31_t)0x7ee1344d, (q31_t)0x7ee05fcd, (q31_t)0x7edf8aff, (q31_t)0x7edeb5e3, (q31_t)0x7edde079, (q31_t)0x7edd0ac0,
+  (q31_t)0x7edc34b9, (q31_t)0x7edb5e64, (q31_t)0x7eda87c0, (q31_t)0x7ed9b0ce, (q31_t)0x7ed8d98e, (q31_t)0x7ed80200, (q31_t)0x7ed72a24, (q31_t)0x7ed651f9,
+  (q31_t)0x7ed57980, (q31_t)0x7ed4a0b9, (q31_t)0x7ed3c7a3, (q31_t)0x7ed2ee40, (q31_t)0x7ed2148e, (q31_t)0x7ed13a8e, (q31_t)0x7ed0603f, (q31_t)0x7ecf85a3,
+  (q31_t)0x7eceaab8, (q31_t)0x7ecdcf7f, (q31_t)0x7eccf3f8, (q31_t)0x7ecc1822, (q31_t)0x7ecb3bff, (q31_t)0x7eca5f8d, (q31_t)0x7ec982cd, (q31_t)0x7ec8a5bf,
+  (q31_t)0x7ec7c862, (q31_t)0x7ec6eab7, (q31_t)0x7ec60cbe, (q31_t)0x7ec52e77, (q31_t)0x7ec44fe2, (q31_t)0x7ec370fe, (q31_t)0x7ec291cd, (q31_t)0x7ec1b24d,
+  (q31_t)0x7ec0d27f, (q31_t)0x7ebff263, (q31_t)0x7ebf11f8, (q31_t)0x7ebe313f, (q31_t)0x7ebd5039, (q31_t)0x7ebc6ee4, (q31_t)0x7ebb8d40, (q31_t)0x7ebaab4f,
+  (q31_t)0x7eb9c910, (q31_t)0x7eb8e682, (q31_t)0x7eb803a6, (q31_t)0x7eb7207c, (q31_t)0x7eb63d04, (q31_t)0x7eb5593d, (q31_t)0x7eb47529, (q31_t)0x7eb390c6,
+  (q31_t)0x7eb2ac15, (q31_t)0x7eb1c716, (q31_t)0x7eb0e1c9, (q31_t)0x7eaffc2e, (q31_t)0x7eaf1645, (q31_t)0x7eae300d, (q31_t)0x7ead4987, (q31_t)0x7eac62b3,
+  (q31_t)0x7eab7b91, (q31_t)0x7eaa9421, (q31_t)0x7ea9ac63, (q31_t)0x7ea8c457, (q31_t)0x7ea7dbfc, (q31_t)0x7ea6f353, (q31_t)0x7ea60a5d, (q31_t)0x7ea52118,
+  (q31_t)0x7ea43785, (q31_t)0x7ea34da4, (q31_t)0x7ea26374, (q31_t)0x7ea178f7, (q31_t)0x7ea08e2b, (q31_t)0x7e9fa312, (q31_t)0x7e9eb7aa, (q31_t)0x7e9dcbf4,
+  (q31_t)0x7e9cdff0, (q31_t)0x7e9bf39e, (q31_t)0x7e9b06fe, (q31_t)0x7e9a1a10, (q31_t)0x7e992cd4, (q31_t)0x7e983f49, (q31_t)0x7e975171, (q31_t)0x7e96634a,
+  (q31_t)0x7e9574d6, (q31_t)0x7e948613, (q31_t)0x7e939702, (q31_t)0x7e92a7a3, (q31_t)0x7e91b7f6, (q31_t)0x7e90c7fb, (q31_t)0x7e8fd7b2, (q31_t)0x7e8ee71b,
+  (q31_t)0x7e8df636, (q31_t)0x7e8d0502, (q31_t)0x7e8c1381, (q31_t)0x7e8b21b1, (q31_t)0x7e8a2f94, (q31_t)0x7e893d28, (q31_t)0x7e884a6f, (q31_t)0x7e875767,
+  (q31_t)0x7e866411, (q31_t)0x7e85706d, (q31_t)0x7e847c7c, (q31_t)0x7e83883c, (q31_t)0x7e8293ae, (q31_t)0x7e819ed2, (q31_t)0x7e80a9a8, (q31_t)0x7e7fb430,
+  (q31_t)0x7e7ebe6a, (q31_t)0x7e7dc856, (q31_t)0x7e7cd1f4, (q31_t)0x7e7bdb44, (q31_t)0x7e7ae446, (q31_t)0x7e79ecf9, (q31_t)0x7e78f55f, (q31_t)0x7e77fd77,
+  (q31_t)0x7e770541, (q31_t)0x7e760cbd, (q31_t)0x7e7513ea, (q31_t)0x7e741aca, (q31_t)0x7e73215c, (q31_t)0x7e7227a0, (q31_t)0x7e712d96, (q31_t)0x7e70333d,
+  (q31_t)0x7e6f3897, (q31_t)0x7e6e3da3, (q31_t)0x7e6d4261, (q31_t)0x7e6c46d1, (q31_t)0x7e6b4af2, (q31_t)0x7e6a4ec6, (q31_t)0x7e69524c, (q31_t)0x7e685584,
+  (q31_t)0x7e67586e, (q31_t)0x7e665b0a, (q31_t)0x7e655d58, (q31_t)0x7e645f58, (q31_t)0x7e63610a, (q31_t)0x7e62626e, (q31_t)0x7e616384, (q31_t)0x7e60644c,
+  (q31_t)0x7e5f64c7, (q31_t)0x7e5e64f3, (q31_t)0x7e5d64d1, (q31_t)0x7e5c6461, (q31_t)0x7e5b63a4, (q31_t)0x7e5a6298, (q31_t)0x7e59613f, (q31_t)0x7e585f97,
+  (q31_t)0x7e575da2, (q31_t)0x7e565b5f, (q31_t)0x7e5558ce, (q31_t)0x7e5455ef, (q31_t)0x7e5352c1, (q31_t)0x7e524f46, (q31_t)0x7e514b7e, (q31_t)0x7e504767,
+  (q31_t)0x7e4f4302, (q31_t)0x7e4e3e4f, (q31_t)0x7e4d394f, (q31_t)0x7e4c3400, (q31_t)0x7e4b2e64, (q31_t)0x7e4a287a, (q31_t)0x7e492241, (q31_t)0x7e481bbb,
+  (q31_t)0x7e4714e7, (q31_t)0x7e460dc5, (q31_t)0x7e450656, (q31_t)0x7e43fe98, (q31_t)0x7e42f68c, (q31_t)0x7e41ee33, (q31_t)0x7e40e58c, (q31_t)0x7e3fdc97,
+  (q31_t)0x7e3ed353, (q31_t)0x7e3dc9c3, (q31_t)0x7e3cbfe4, (q31_t)0x7e3bb5b7, (q31_t)0x7e3aab3c, (q31_t)0x7e39a074, (q31_t)0x7e38955e, (q31_t)0x7e3789fa,
+  (q31_t)0x7e367e48, (q31_t)0x7e357248, (q31_t)0x7e3465fa, (q31_t)0x7e33595e, (q31_t)0x7e324c75, (q31_t)0x7e313f3e, (q31_t)0x7e3031b9, (q31_t)0x7e2f23e6,
+  (q31_t)0x7e2e15c5, (q31_t)0x7e2d0756, (q31_t)0x7e2bf89a, (q31_t)0x7e2ae990, (q31_t)0x7e29da38, (q31_t)0x7e28ca92, (q31_t)0x7e27ba9e, (q31_t)0x7e26aa5d,
+  (q31_t)0x7e2599cd, (q31_t)0x7e2488f0, (q31_t)0x7e2377c5, (q31_t)0x7e22664c, (q31_t)0x7e215486, (q31_t)0x7e204271, (q31_t)0x7e1f300f, (q31_t)0x7e1e1d5f,
+  (q31_t)0x7e1d0a61, (q31_t)0x7e1bf716, (q31_t)0x7e1ae37c, (q31_t)0x7e19cf95, (q31_t)0x7e18bb60, (q31_t)0x7e17a6dd, (q31_t)0x7e16920d, (q31_t)0x7e157cee,
+  (q31_t)0x7e146782, (q31_t)0x7e1351c9, (q31_t)0x7e123bc1, (q31_t)0x7e11256c, (q31_t)0x7e100ec8, (q31_t)0x7e0ef7d7, (q31_t)0x7e0de099, (q31_t)0x7e0cc90c,
+  (q31_t)0x7e0bb132, (q31_t)0x7e0a990a, (q31_t)0x7e098095, (q31_t)0x7e0867d1, (q31_t)0x7e074ec0, (q31_t)0x7e063561, (q31_t)0x7e051bb4, (q31_t)0x7e0401ba,
+  (q31_t)0x7e02e772, (q31_t)0x7e01ccdc, (q31_t)0x7e00b1f9, (q31_t)0x7dff96c7, (q31_t)0x7dfe7b48, (q31_t)0x7dfd5f7b, (q31_t)0x7dfc4361, (q31_t)0x7dfb26f9,
+  (q31_t)0x7dfa0a43, (q31_t)0x7df8ed3f, (q31_t)0x7df7cfee, (q31_t)0x7df6b24f, (q31_t)0x7df59462, (q31_t)0x7df47628, (q31_t)0x7df357a0, (q31_t)0x7df238ca,
+  (q31_t)0x7df119a7, (q31_t)0x7deffa35, (q31_t)0x7deeda77, (q31_t)0x7dedba6a, (q31_t)0x7dec9a10, (q31_t)0x7deb7968, (q31_t)0x7dea5872, (q31_t)0x7de9372f,
+  (q31_t)0x7de8159e, (q31_t)0x7de6f3c0, (q31_t)0x7de5d193, (q31_t)0x7de4af1a, (q31_t)0x7de38c52, (q31_t)0x7de2693d, (q31_t)0x7de145da, (q31_t)0x7de02229,
+  (q31_t)0x7ddefe2b, (q31_t)0x7dddd9e0, (q31_t)0x7ddcb546, (q31_t)0x7ddb905f, (q31_t)0x7dda6b2a, (q31_t)0x7dd945a8, (q31_t)0x7dd81fd8, (q31_t)0x7dd6f9ba,
+  (q31_t)0x7dd5d34f, (q31_t)0x7dd4ac96, (q31_t)0x7dd38590, (q31_t)0x7dd25e3c, (q31_t)0x7dd1369a, (q31_t)0x7dd00eab, (q31_t)0x7dcee66e, (q31_t)0x7dcdbde3,
+  (q31_t)0x7dcc950b, (q31_t)0x7dcb6be6, (q31_t)0x7dca4272, (q31_t)0x7dc918b1, (q31_t)0x7dc7eea3, (q31_t)0x7dc6c447, (q31_t)0x7dc5999d, (q31_t)0x7dc46ea6,
+  (q31_t)0x7dc34361, (q31_t)0x7dc217cf, (q31_t)0x7dc0ebef, (q31_t)0x7dbfbfc1, (q31_t)0x7dbe9346, (q31_t)0x7dbd667d, (q31_t)0x7dbc3967, (q31_t)0x7dbb0c03,
+  (q31_t)0x7db9de52, (q31_t)0x7db8b053, (q31_t)0x7db78207, (q31_t)0x7db6536d, (q31_t)0x7db52485, (q31_t)0x7db3f550, (q31_t)0x7db2c5cd, (q31_t)0x7db195fd,
+  (q31_t)0x7db065df, (q31_t)0x7daf3574, (q31_t)0x7dae04bb, (q31_t)0x7dacd3b5, (q31_t)0x7daba261, (q31_t)0x7daa70c0, (q31_t)0x7da93ed1, (q31_t)0x7da80c95,
+  (q31_t)0x7da6da0b, (q31_t)0x7da5a733, (q31_t)0x7da4740e, (q31_t)0x7da3409c, (q31_t)0x7da20cdc, (q31_t)0x7da0d8cf, (q31_t)0x7d9fa474, (q31_t)0x7d9e6fcb,
+  (q31_t)0x7d9d3ad6, (q31_t)0x7d9c0592, (q31_t)0x7d9ad001, (q31_t)0x7d999a23, (q31_t)0x7d9863f7, (q31_t)0x7d972d7e, (q31_t)0x7d95f6b7, (q31_t)0x7d94bfa3,
+  (q31_t)0x7d938841, (q31_t)0x7d925092, (q31_t)0x7d911896, (q31_t)0x7d8fe04c, (q31_t)0x7d8ea7b4, (q31_t)0x7d8d6ecf, (q31_t)0x7d8c359d, (q31_t)0x7d8afc1d,
+  (q31_t)0x7d89c250, (q31_t)0x7d888835, (q31_t)0x7d874dcd, (q31_t)0x7d861317, (q31_t)0x7d84d814, (q31_t)0x7d839cc4, (q31_t)0x7d826126, (q31_t)0x7d81253a,
+  (q31_t)0x7d7fe902, (q31_t)0x7d7eac7c, (q31_t)0x7d7d6fa8, (q31_t)0x7d7c3287, (q31_t)0x7d7af519, (q31_t)0x7d79b75d, (q31_t)0x7d787954, (q31_t)0x7d773afd,
+  (q31_t)0x7d75fc59, (q31_t)0x7d74bd68, (q31_t)0x7d737e29, (q31_t)0x7d723e9d, (q31_t)0x7d70fec4, (q31_t)0x7d6fbe9d, (q31_t)0x7d6e7e29, (q31_t)0x7d6d3d67,
+  (q31_t)0x7d6bfc58, (q31_t)0x7d6abafc, (q31_t)0x7d697952, (q31_t)0x7d68375b, (q31_t)0x7d66f517, (q31_t)0x7d65b285, (q31_t)0x7d646fa6, (q31_t)0x7d632c79,
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+  (q31_t)0x7d57c251, (q31_t)0x7d567c1f, (q31_t)0x7d5535a0, (q31_t)0x7d53eed3, (q31_t)0x7d52a7ba, (q31_t)0x7d516053, (q31_t)0x7d50189e, (q31_t)0x7d4ed09d,
+  (q31_t)0x7d4d884e, (q31_t)0x7d4c3fb1, (q31_t)0x7d4af6c8, (q31_t)0x7d49ad91, (q31_t)0x7d48640d, (q31_t)0x7d471a3c, (q31_t)0x7d45d01d, (q31_t)0x7d4485b1,
+  (q31_t)0x7d433af8, (q31_t)0x7d41eff1, (q31_t)0x7d40a49e, (q31_t)0x7d3f58fd, (q31_t)0x7d3e0d0e, (q31_t)0x7d3cc0d3, (q31_t)0x7d3b744a, (q31_t)0x7d3a2774,
+  (q31_t)0x7d38da51, (q31_t)0x7d378ce0, (q31_t)0x7d363f23, (q31_t)0x7d34f118, (q31_t)0x7d33a2bf, (q31_t)0x7d32541a, (q31_t)0x7d310527, (q31_t)0x7d2fb5e7,
+  (q31_t)0x7d2e665a, (q31_t)0x7d2d1680, (q31_t)0x7d2bc659, (q31_t)0x7d2a75e4, (q31_t)0x7d292522, (q31_t)0x7d27d413, (q31_t)0x7d2682b6, (q31_t)0x7d25310d,
+  (q31_t)0x7d23df16, (q31_t)0x7d228cd2, (q31_t)0x7d213a41, (q31_t)0x7d1fe762, (q31_t)0x7d1e9437, (q31_t)0x7d1d40be, (q31_t)0x7d1becf8, (q31_t)0x7d1a98e5,
+  (q31_t)0x7d194485, (q31_t)0x7d17efd8, (q31_t)0x7d169add, (q31_t)0x7d154595, (q31_t)0x7d13f001, (q31_t)0x7d129a1f, (q31_t)0x7d1143ef, (q31_t)0x7d0fed73,
+  (q31_t)0x7d0e96aa, (q31_t)0x7d0d3f93, (q31_t)0x7d0be82f, (q31_t)0x7d0a907e, (q31_t)0x7d093880, (q31_t)0x7d07e035, (q31_t)0x7d06879d, (q31_t)0x7d052eb8,
+  (q31_t)0x7d03d585, (q31_t)0x7d027c05, (q31_t)0x7d012239, (q31_t)0x7cffc81f, (q31_t)0x7cfe6db8, (q31_t)0x7cfd1304, (q31_t)0x7cfbb803, (q31_t)0x7cfa5cb4,
+  (q31_t)0x7cf90119, (q31_t)0x7cf7a531, (q31_t)0x7cf648fb, (q31_t)0x7cf4ec79, (q31_t)0x7cf38fa9, (q31_t)0x7cf2328c, (q31_t)0x7cf0d522, (q31_t)0x7cef776b,
+  (q31_t)0x7cee1967, (q31_t)0x7cecbb16, (q31_t)0x7ceb5c78, (q31_t)0x7ce9fd8d, (q31_t)0x7ce89e55, (q31_t)0x7ce73ed0, (q31_t)0x7ce5defd, (q31_t)0x7ce47ede,
+  (q31_t)0x7ce31e72, (q31_t)0x7ce1bdb8, (q31_t)0x7ce05cb2, (q31_t)0x7cdefb5e, (q31_t)0x7cdd99be, (q31_t)0x7cdc37d0, (q31_t)0x7cdad596, (q31_t)0x7cd9730e,
+  (q31_t)0x7cd8103a, (q31_t)0x7cd6ad18, (q31_t)0x7cd549aa, (q31_t)0x7cd3e5ee, (q31_t)0x7cd281e5, (q31_t)0x7cd11d90, (q31_t)0x7ccfb8ed, (q31_t)0x7cce53fe,
+  (q31_t)0x7ccceec1, (q31_t)0x7ccb8937, (q31_t)0x7cca2361, (q31_t)0x7cc8bd3d, (q31_t)0x7cc756cd, (q31_t)0x7cc5f010, (q31_t)0x7cc48905, (q31_t)0x7cc321ae,
+  (q31_t)0x7cc1ba09, (q31_t)0x7cc05218, (q31_t)0x7cbee9da, (q31_t)0x7cbd814f, (q31_t)0x7cbc1877, (q31_t)0x7cbaaf51, (q31_t)0x7cb945df, (q31_t)0x7cb7dc20,
+  (q31_t)0x7cb67215, (q31_t)0x7cb507bc, (q31_t)0x7cb39d16, (q31_t)0x7cb23223, (q31_t)0x7cb0c6e4, (q31_t)0x7caf5b57, (q31_t)0x7cadef7e, (q31_t)0x7cac8358,
+  (q31_t)0x7cab16e4, (q31_t)0x7ca9aa24, (q31_t)0x7ca83d17, (q31_t)0x7ca6cfbd, (q31_t)0x7ca56216, (q31_t)0x7ca3f423, (q31_t)0x7ca285e2, (q31_t)0x7ca11755,
+  (q31_t)0x7c9fa87a, (q31_t)0x7c9e3953, (q31_t)0x7c9cc9df, (q31_t)0x7c9b5a1e, (q31_t)0x7c99ea10, (q31_t)0x7c9879b6, (q31_t)0x7c97090e, (q31_t)0x7c95981a,
+  (q31_t)0x7c9426d8, (q31_t)0x7c92b54a, (q31_t)0x7c91436f, (q31_t)0x7c8fd148, (q31_t)0x7c8e5ed3, (q31_t)0x7c8cec12, (q31_t)0x7c8b7903, (q31_t)0x7c8a05a8,
+  (q31_t)0x7c889200, (q31_t)0x7c871e0c, (q31_t)0x7c85a9ca, (q31_t)0x7c84353c, (q31_t)0x7c82c060, (q31_t)0x7c814b39, (q31_t)0x7c7fd5c4, (q31_t)0x7c7e6002,
+  (q31_t)0x7c7ce9f4, (q31_t)0x7c7b7399, (q31_t)0x7c79fcf1, (q31_t)0x7c7885fc, (q31_t)0x7c770eba, (q31_t)0x7c75972c, (q31_t)0x7c741f51, (q31_t)0x7c72a729,
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+  (q31_t)0x7c656045, (q31_t)0x7c63e51e, (q31_t)0x7c6269aa, (q31_t)0x7c60ede9, (q31_t)0x7c5f71db, (q31_t)0x7c5df581, (q31_t)0x7c5c78da, (q31_t)0x7c5afbe6,
+  (q31_t)0x7c597ea6, (q31_t)0x7c580119, (q31_t)0x7c56833f, (q31_t)0x7c550519, (q31_t)0x7c5386a6, (q31_t)0x7c5207e6, (q31_t)0x7c5088d9, (q31_t)0x7c4f0980,
+  (q31_t)0x7c4d89da, (q31_t)0x7c4c09e8, (q31_t)0x7c4a89a8, (q31_t)0x7c49091c, (q31_t)0x7c478844, (q31_t)0x7c46071f, (q31_t)0x7c4485ad, (q31_t)0x7c4303ee,
+  (q31_t)0x7c4181e3, (q31_t)0x7c3fff8b, (q31_t)0x7c3e7ce7, (q31_t)0x7c3cf9f5, (q31_t)0x7c3b76b8, (q31_t)0x7c39f32d, (q31_t)0x7c386f56, (q31_t)0x7c36eb33,
+  (q31_t)0x7c3566c2, (q31_t)0x7c33e205, (q31_t)0x7c325cfc, (q31_t)0x7c30d7a6, (q31_t)0x7c2f5203, (q31_t)0x7c2dcc14, (q31_t)0x7c2c45d8, (q31_t)0x7c2abf4f,
+  (q31_t)0x7c29387a, (q31_t)0x7c27b158, (q31_t)0x7c2629ea, (q31_t)0x7c24a22f, (q31_t)0x7c231a28, (q31_t)0x7c2191d4, (q31_t)0x7c200933, (q31_t)0x7c1e8046,
+  (q31_t)0x7c1cf70c, (q31_t)0x7c1b6d86, (q31_t)0x7c19e3b3, (q31_t)0x7c185994, (q31_t)0x7c16cf28, (q31_t)0x7c15446f, (q31_t)0x7c13b96a, (q31_t)0x7c122e19,
+  (q31_t)0x7c10a27b, (q31_t)0x7c0f1690, (q31_t)0x7c0d8a59, (q31_t)0x7c0bfdd5, (q31_t)0x7c0a7105, (q31_t)0x7c08e3e8, (q31_t)0x7c07567f, (q31_t)0x7c05c8c9,
+  (q31_t)0x7c043ac7, (q31_t)0x7c02ac78, (q31_t)0x7c011ddd, (q31_t)0x7bff8ef5, (q31_t)0x7bfdffc1, (q31_t)0x7bfc7041, (q31_t)0x7bfae073, (q31_t)0x7bf9505a,
+  (q31_t)0x7bf7bff4, (q31_t)0x7bf62f41, (q31_t)0x7bf49e42, (q31_t)0x7bf30cf6, (q31_t)0x7bf17b5e, (q31_t)0x7befe97a, (q31_t)0x7bee5749, (q31_t)0x7becc4cc,
+  (q31_t)0x7beb3202, (q31_t)0x7be99eec, (q31_t)0x7be80b89, (q31_t)0x7be677da, (q31_t)0x7be4e3df, (q31_t)0x7be34f97, (q31_t)0x7be1bb02, (q31_t)0x7be02621,
+  (q31_t)0x7bde90f4, (q31_t)0x7bdcfb7b, (q31_t)0x7bdb65b5, (q31_t)0x7bd9cfa2, (q31_t)0x7bd83944, (q31_t)0x7bd6a298, (q31_t)0x7bd50ba1, (q31_t)0x7bd3745d,
+  (q31_t)0x7bd1dccc, (q31_t)0x7bd044f0, (q31_t)0x7bceacc7, (q31_t)0x7bcd1451, (q31_t)0x7bcb7b8f, (q31_t)0x7bc9e281, (q31_t)0x7bc84927, (q31_t)0x7bc6af80,
+  (q31_t)0x7bc5158c, (q31_t)0x7bc37b4d, (q31_t)0x7bc1e0c1, (q31_t)0x7bc045e9, (q31_t)0x7bbeaac4, (q31_t)0x7bbd0f53, (q31_t)0x7bbb7396, (q31_t)0x7bb9d78c,
+  (q31_t)0x7bb83b36, (q31_t)0x7bb69e94, (q31_t)0x7bb501a5, (q31_t)0x7bb3646a, (q31_t)0x7bb1c6e3, (q31_t)0x7bb02910, (q31_t)0x7bae8af0, (q31_t)0x7bacec84,
+  (q31_t)0x7bab4dcc, (q31_t)0x7ba9aec7, (q31_t)0x7ba80f76, (q31_t)0x7ba66fd9, (q31_t)0x7ba4cfef, (q31_t)0x7ba32fba, (q31_t)0x7ba18f38, (q31_t)0x7b9fee69,
+  (q31_t)0x7b9e4d4f, (q31_t)0x7b9cabe8, (q31_t)0x7b9b0a35, (q31_t)0x7b996836, (q31_t)0x7b97c5ea, (q31_t)0x7b962352, (q31_t)0x7b94806e, (q31_t)0x7b92dd3e,
+  (q31_t)0x7b9139c2, (q31_t)0x7b8f95f9, (q31_t)0x7b8df1e4, (q31_t)0x7b8c4d83, (q31_t)0x7b8aa8d6, (q31_t)0x7b8903dc, (q31_t)0x7b875e96, (q31_t)0x7b85b904,
+  (q31_t)0x7b841326, (q31_t)0x7b826cfc, (q31_t)0x7b80c686, (q31_t)0x7b7f1fc3, (q31_t)0x7b7d78b4, (q31_t)0x7b7bd159, (q31_t)0x7b7a29b2, (q31_t)0x7b7881be,
+  (q31_t)0x7b76d97f, (q31_t)0x7b7530f3, (q31_t)0x7b73881b, (q31_t)0x7b71def7, (q31_t)0x7b703587, (q31_t)0x7b6e8bcb, (q31_t)0x7b6ce1c2, (q31_t)0x7b6b376e,
+  (q31_t)0x7b698ccd, (q31_t)0x7b67e1e0, (q31_t)0x7b6636a7, (q31_t)0x7b648b22, (q31_t)0x7b62df51, (q31_t)0x7b613334, (q31_t)0x7b5f86ca, (q31_t)0x7b5dda15,
+  (q31_t)0x7b5c2d13, (q31_t)0x7b5a7fc6, (q31_t)0x7b58d22c, (q31_t)0x7b572446, (q31_t)0x7b557614, (q31_t)0x7b53c796, (q31_t)0x7b5218cc, (q31_t)0x7b5069b6,
+  (q31_t)0x7b4eba53, (q31_t)0x7b4d0aa5, (q31_t)0x7b4b5aab, (q31_t)0x7b49aa64, (q31_t)0x7b47f9d2, (q31_t)0x7b4648f3, (q31_t)0x7b4497c9, (q31_t)0x7b42e652,
+  (q31_t)0x7b413490, (q31_t)0x7b3f8281, (q31_t)0x7b3dd026, (q31_t)0x7b3c1d80, (q31_t)0x7b3a6a8d, (q31_t)0x7b38b74e, (q31_t)0x7b3703c3, (q31_t)0x7b354fed,
+  (q31_t)0x7b339bca, (q31_t)0x7b31e75b, (q31_t)0x7b3032a0, (q31_t)0x7b2e7d9a, (q31_t)0x7b2cc847, (q31_t)0x7b2b12a8, (q31_t)0x7b295cbe, (q31_t)0x7b27a687,
+  (q31_t)0x7b25f004, (q31_t)0x7b243936, (q31_t)0x7b22821b, (q31_t)0x7b20cab5, (q31_t)0x7b1f1302, (q31_t)0x7b1d5b04, (q31_t)0x7b1ba2b9, (q31_t)0x7b19ea23,
+  (q31_t)0x7b183141, (q31_t)0x7b167813, (q31_t)0x7b14be99, (q31_t)0x7b1304d3, (q31_t)0x7b114ac1, (q31_t)0x7b0f9063, (q31_t)0x7b0dd5b9, (q31_t)0x7b0c1ac4,
+  (q31_t)0x7b0a5f82, (q31_t)0x7b08a3f5, (q31_t)0x7b06e81b, (q31_t)0x7b052bf6, (q31_t)0x7b036f85, (q31_t)0x7b01b2c8, (q31_t)0x7afff5bf, (q31_t)0x7afe386a,
+  (q31_t)0x7afc7aca, (q31_t)0x7afabcdd, (q31_t)0x7af8fea5, (q31_t)0x7af74021, (q31_t)0x7af58151, (q31_t)0x7af3c235, (q31_t)0x7af202cd, (q31_t)0x7af0431a,
+  (q31_t)0x7aee831a, (q31_t)0x7aecc2cf, (q31_t)0x7aeb0238, (q31_t)0x7ae94155, (q31_t)0x7ae78026, (q31_t)0x7ae5beac, (q31_t)0x7ae3fce6, (q31_t)0x7ae23ad4,
+  (q31_t)0x7ae07876, (q31_t)0x7adeb5cc, (q31_t)0x7adcf2d6, (q31_t)0x7adb2f95, (q31_t)0x7ad96c08, (q31_t)0x7ad7a82f, (q31_t)0x7ad5e40a, (q31_t)0x7ad41f9a,
+  (q31_t)0x7ad25ade, (q31_t)0x7ad095d6, (q31_t)0x7aced082, (q31_t)0x7acd0ae3, (q31_t)0x7acb44f8, (q31_t)0x7ac97ec1, (q31_t)0x7ac7b83e, (q31_t)0x7ac5f170,
+  (q31_t)0x7ac42a55, (q31_t)0x7ac262ef, (q31_t)0x7ac09b3e, (q31_t)0x7abed341, (q31_t)0x7abd0af7, (q31_t)0x7abb4263, (q31_t)0x7ab97982, (q31_t)0x7ab7b056,
+  (q31_t)0x7ab5e6de, (q31_t)0x7ab41d1b, (q31_t)0x7ab2530b, (q31_t)0x7ab088b0, (q31_t)0x7aaebe0a, (q31_t)0x7aacf318, (q31_t)0x7aab27da, (q31_t)0x7aa95c50,
+  (q31_t)0x7aa7907b, (q31_t)0x7aa5c45a, (q31_t)0x7aa3f7ed, (q31_t)0x7aa22b35, (q31_t)0x7aa05e31, (q31_t)0x7a9e90e1, (q31_t)0x7a9cc346, (q31_t)0x7a9af55f,
+  (q31_t)0x7a99272d, (q31_t)0x7a9758af, (q31_t)0x7a9589e5, (q31_t)0x7a93bad0, (q31_t)0x7a91eb6f, (q31_t)0x7a901bc2, (q31_t)0x7a8e4bca, (q31_t)0x7a8c7b87,
+  (q31_t)0x7a8aaaf7, (q31_t)0x7a88da1c, (q31_t)0x7a8708f6, (q31_t)0x7a853784, (q31_t)0x7a8365c6, (q31_t)0x7a8193bd, (q31_t)0x7a7fc168, (q31_t)0x7a7deec8,
+  (q31_t)0x7a7c1bdc, (q31_t)0x7a7a48a4, (q31_t)0x7a787521, (q31_t)0x7a76a153, (q31_t)0x7a74cd38, (q31_t)0x7a72f8d3, (q31_t)0x7a712422, (q31_t)0x7a6f4f25,
+  (q31_t)0x7a6d79dd, (q31_t)0x7a6ba449, (q31_t)0x7a69ce6a, (q31_t)0x7a67f83f, (q31_t)0x7a6621c9, (q31_t)0x7a644b07, (q31_t)0x7a6273fa, (q31_t)0x7a609ca1,
+  (q31_t)0x7a5ec4fc, (q31_t)0x7a5ced0d, (q31_t)0x7a5b14d1, (q31_t)0x7a593c4b, (q31_t)0x7a576379, (q31_t)0x7a558a5b, (q31_t)0x7a53b0f2, (q31_t)0x7a51d73d,
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+  (q31_t)0x7679e1ce, (q31_t)0x767780d2, (q31_t)0x76751f8d, (q31_t)0x7672bdfe, (q31_t)0x76705c27, (q31_t)0x766dfa07, (q31_t)0x766b979d, (q31_t)0x766934eb,
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+  (q31_t)0x6ef9ce57, (q31_t)0x6ef6acad, (q31_t)0x6ef38abe, (q31_t)0x6ef0688b, (q31_t)0x6eed4614, (q31_t)0x6eea2358, (q31_t)0x6ee70058, (q31_t)0x6ee3dd13,
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+  (q31_t)0x6e62515d, (q31_t)0x6e5f22e6, (q31_t)0x6e5bf42b, (q31_t)0x6e58c52c, (q31_t)0x6e5595e9, (q31_t)0x6e526662, (q31_t)0x6e4f3696, (q31_t)0x6e4c0687,
+  (q31_t)0x6e48d633, (q31_t)0x6e45a59c, (q31_t)0x6e4274c1, (q31_t)0x6e3f43a1, (q31_t)0x6e3c123e, (q31_t)0x6e38e096, (q31_t)0x6e35aeab, (q31_t)0x6e327c7b,
+  (q31_t)0x6e2f4a08, (q31_t)0x6e2c1750, (q31_t)0x6e28e455, (q31_t)0x6e25b115, (q31_t)0x6e227d92, (q31_t)0x6e1f49cb, (q31_t)0x6e1c15c0, (q31_t)0x6e18e171,
+  (q31_t)0x6e15acde, (q31_t)0x6e127807, (q31_t)0x6e0f42ec, (q31_t)0x6e0c0d8e, (q31_t)0x6e08d7eb, (q31_t)0x6e05a205, (q31_t)0x6e026bda, (q31_t)0x6dff356c,
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+  (q31_t)0x6dae8e9b, (q31_t)0x6dab514b, (q31_t)0x6da813b8, (q31_t)0x6da4d5e1, (q31_t)0x6da197c6, (q31_t)0x6d9e5968, (q31_t)0x6d9b1ac6, (q31_t)0x6d97dbe0,
+  (q31_t)0x6d949cb7, (q31_t)0x6d915d4a, (q31_t)0x6d8e1d9a, (q31_t)0x6d8adda6, (q31_t)0x6d879d6e, (q31_t)0x6d845cf3, (q31_t)0x6d811c35, (q31_t)0x6d7ddb33,
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+  (q31_t)0x6d4661b7, (q31_t)0x6d431bf6, (q31_t)0x6d3fd5f2, (q31_t)0x6d3c8fab, (q31_t)0x6d394920, (q31_t)0x6d360252, (q31_t)0x6d32bb40, (q31_t)0x6d2f73eb,
+  (q31_t)0x6d2c2c53, (q31_t)0x6d28e477, (q31_t)0x6d259c58, (q31_t)0x6d2253f6, (q31_t)0x6d1f0b50, (q31_t)0x6d1bc267, (q31_t)0x6d18793b, (q31_t)0x6d152fcc,
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+  (q31_t)0x6cc2ae90, (q31_t)0x6cbf5e4d, (q31_t)0x6cbc0dc8, (q31_t)0x6cb8bcff, (q31_t)0x6cb56bf4, (q31_t)0x6cb21aa5, (q31_t)0x6caec913, (q31_t)0x6cab773e,
+  (q31_t)0x6ca82527, (q31_t)0x6ca4d2cc, (q31_t)0x6ca1802e, (q31_t)0x6c9e2d4d, (q31_t)0x6c9ada29, (q31_t)0x6c9786c2, (q31_t)0x6c943318, (q31_t)0x6c90df2c,
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+  (q31_t)0x6c3d581b, (q31_t)0x6c39fd63, (q31_t)0x6c36a269, (q31_t)0x6c33472c, (q31_t)0x6c2febad, (q31_t)0x6c2c8fea, (q31_t)0x6c2933e5, (q31_t)0x6c25d79d,
+  (q31_t)0x6c227b13, (q31_t)0x6c1f1e45, (q31_t)0x6c1bc136, (q31_t)0x6c1863e3, (q31_t)0x6c15064e, (q31_t)0x6c11a876, (q31_t)0x6c0e4a5b, (q31_t)0x6c0aebfe,
+  (q31_t)0x6c078d5e, (q31_t)0x6c042e7b, (q31_t)0x6c00cf56, (q31_t)0x6bfd6fee, (q31_t)0x6bfa1044, (q31_t)0x6bf6b056, (q31_t)0x6bf35027, (q31_t)0x6befefb5,
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+  (q31_t)0x6b9b301b, (q31_t)0x6b97c8e8, (q31_t)0x6b946173, (q31_t)0x6b90f9bc, (q31_t)0x6b8d91c2, (q31_t)0x6b8a2986, (q31_t)0x6b86c107, (q31_t)0x6b835846,
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+  (q31_t)0x6b649dd8, (q31_t)0x6b613280, (q31_t)0x6b5dc6e6, (q31_t)0x6b5a5b0a, (q31_t)0x6b56eeec, (q31_t)0x6b53828b, (q31_t)0x6b5015e9, (q31_t)0x6b4ca904,
+  (q31_t)0x6b493bdd, (q31_t)0x6b45ce73, (q31_t)0x6b4260c8, (q31_t)0x6b3ef2da, (q31_t)0x6b3b84ab, (q31_t)0x6b381639, (q31_t)0x6b34a785, (q31_t)0x6b31388e,
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+  (q31_t)0x6adb0ea8, (q31_t)0x6ad798fd, (q31_t)0x6ad42311, (q31_t)0x6ad0ace2, (q31_t)0x6acd3672, (q31_t)0x6ac9bfc0, (q31_t)0x6ac648cb, (q31_t)0x6ac2d195,
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+  (q31_t)0x6aa3951d, (q31_t)0x6aa01b55, (q31_t)0x6a9ca14b, (q31_t)0x6a992700, (q31_t)0x6a95ac72, (q31_t)0x6a9231a3, (q31_t)0x6a8eb692, (q31_t)0x6a8b3b3f,
+  (q31_t)0x6a87bfab, (q31_t)0x6a8443d5, (q31_t)0x6a80c7bd, (q31_t)0x6a7d4b64, (q31_t)0x6a79cec8, (q31_t)0x6a7651ec, (q31_t)0x6a72d4cd, (q31_t)0x6a6f576d,
+  (q31_t)0x6a6bd9cb, (q31_t)0x6a685be8, (q31_t)0x6a64ddc2, (q31_t)0x6a615f5c, (q31_t)0x6a5de0b3, (q31_t)0x6a5a61c9, (q31_t)0x6a56e29e, (q31_t)0x6a536331,
+  (q31_t)0x6a4fe382, (q31_t)0x6a4c6391, (q31_t)0x6a48e360, (q31_t)0x6a4562ec, (q31_t)0x6a41e237, (q31_t)0x6a3e6140, (q31_t)0x6a3ae008, (q31_t)0x6a375e8f,
+  (q31_t)0x6a33dcd4, (q31_t)0x6a305ad7, (q31_t)0x6a2cd899, (q31_t)0x6a295619, (q31_t)0x6a25d358, (q31_t)0x6a225055, (q31_t)0x6a1ecd11, (q31_t)0x6a1b498c,
+  (q31_t)0x6a17c5c5, (q31_t)0x6a1441bc, (q31_t)0x6a10bd72, (q31_t)0x6a0d38e7, (q31_t)0x6a09b41a, (q31_t)0x6a062f0c, (q31_t)0x6a02a9bc, (q31_t)0x69ff242b,
+  (q31_t)0x69fb9e59, (q31_t)0x69f81845, (q31_t)0x69f491f0, (q31_t)0x69f10b5a, (q31_t)0x69ed8482, (q31_t)0x69e9fd69, (q31_t)0x69e6760f, (q31_t)0x69e2ee73,
+  (q31_t)0x69df6696, (q31_t)0x69dbde77, (q31_t)0x69d85618, (q31_t)0x69d4cd77, (q31_t)0x69d14494, (q31_t)0x69cdbb71, (q31_t)0x69ca320c, (q31_t)0x69c6a866,
+  (q31_t)0x69c31e7f, (q31_t)0x69bf9456, (q31_t)0x69bc09ec, (q31_t)0x69b87f41, (q31_t)0x69b4f455, (q31_t)0x69b16928, (q31_t)0x69adddb9, (q31_t)0x69aa5209,
+  (q31_t)0x69a6c618, (q31_t)0x69a339e6, (q31_t)0x699fad73, (q31_t)0x699c20be, (q31_t)0x699893c9, (q31_t)0x69950692, (q31_t)0x6991791a, (q31_t)0x698deb61,
+  (q31_t)0x698a5d67, (q31_t)0x6986cf2c, (q31_t)0x698340af, (q31_t)0x697fb1f2, (q31_t)0x697c22f3, (q31_t)0x697893b4, (q31_t)0x69750433, (q31_t)0x69717472,
+  (q31_t)0x696de46f, (q31_t)0x696a542b, (q31_t)0x6966c3a6, (q31_t)0x696332e1, (q31_t)0x695fa1da, (q31_t)0x695c1092, (q31_t)0x69587f09, (q31_t)0x6954ed40,
+  (q31_t)0x69515b35, (q31_t)0x694dc8e9, (q31_t)0x694a365c, (q31_t)0x6946a38f, (q31_t)0x69431080, (q31_t)0x693f7d31, (q31_t)0x693be9a0, (q31_t)0x693855cf,
+  (q31_t)0x6934c1bd, (q31_t)0x69312d6a, (q31_t)0x692d98d6, (q31_t)0x692a0401, (q31_t)0x69266eeb, (q31_t)0x6922d995, (q31_t)0x691f43fd, (q31_t)0x691bae25,
+  (q31_t)0x6918180c, (q31_t)0x691481b2, (q31_t)0x6910eb17, (q31_t)0x690d543b, (q31_t)0x6909bd1f, (q31_t)0x690625c2, (q31_t)0x69028e24, (q31_t)0x68fef645,
+  (q31_t)0x68fb5e25, (q31_t)0x68f7c5c5, (q31_t)0x68f42d24, (q31_t)0x68f09442, (q31_t)0x68ecfb20, (q31_t)0x68e961bd, (q31_t)0x68e5c819, (q31_t)0x68e22e34,
+  (q31_t)0x68de940f, (q31_t)0x68daf9a9, (q31_t)0x68d75f02, (q31_t)0x68d3c41b, (q31_t)0x68d028f2, (q31_t)0x68cc8d8a, (q31_t)0x68c8f1e0, (q31_t)0x68c555f6,
+  (q31_t)0x68c1b9cc, (q31_t)0x68be1d61, (q31_t)0x68ba80b5, (q31_t)0x68b6e3c8, (q31_t)0x68b3469b, (q31_t)0x68afa92e, (q31_t)0x68ac0b7f, (q31_t)0x68a86d91,
+  (q31_t)0x68a4cf61, (q31_t)0x68a130f1, (q31_t)0x689d9241, (q31_t)0x6899f350, (q31_t)0x6896541f, (q31_t)0x6892b4ad, (q31_t)0x688f14fa, (q31_t)0x688b7507,
+  (q31_t)0x6887d4d4, (q31_t)0x68843460, (q31_t)0x688093ab, (q31_t)0x687cf2b6, (q31_t)0x68795181, (q31_t)0x6875b00b, (q31_t)0x68720e55, (q31_t)0x686e6c5e,
+  (q31_t)0x686aca27, (q31_t)0x686727b0, (q31_t)0x686384f8, (q31_t)0x685fe200, (q31_t)0x685c3ec7, (q31_t)0x68589b4e, (q31_t)0x6854f795, (q31_t)0x6851539b,
+  (q31_t)0x684daf61, (q31_t)0x684a0ae6, (q31_t)0x6846662c, (q31_t)0x6842c131, (q31_t)0x683f1bf5, (q31_t)0x683b7679, (q31_t)0x6837d0bd, (q31_t)0x68342ac1,
+  (q31_t)0x68308485, (q31_t)0x682cde08, (q31_t)0x6829374b, (q31_t)0x6825904d, (q31_t)0x6821e910, (q31_t)0x681e4192, (q31_t)0x681a99d4, (q31_t)0x6816f1d6,
+  (q31_t)0x68134997, (q31_t)0x680fa118, (q31_t)0x680bf85a, (q31_t)0x68084f5a, (q31_t)0x6804a61b, (q31_t)0x6800fc9c, (q31_t)0x67fd52dc, (q31_t)0x67f9a8dd,
+  (q31_t)0x67f5fe9d, (q31_t)0x67f2541d, (q31_t)0x67eea95d, (q31_t)0x67eafe5d, (q31_t)0x67e7531c, (q31_t)0x67e3a79c, (q31_t)0x67dffbdc, (q31_t)0x67dc4fdb,
+  (q31_t)0x67d8a39a, (q31_t)0x67d4f71a, (q31_t)0x67d14a59, (q31_t)0x67cd9d58, (q31_t)0x67c9f017, (q31_t)0x67c64297, (q31_t)0x67c294d6, (q31_t)0x67bee6d5,
+  (q31_t)0x67bb3894, (q31_t)0x67b78a13, (q31_t)0x67b3db53, (q31_t)0x67b02c52, (q31_t)0x67ac7d11, (q31_t)0x67a8cd91, (q31_t)0x67a51dd0, (q31_t)0x67a16dcf,
+  (q31_t)0x679dbd8f, (q31_t)0x679a0d0f, (q31_t)0x67965c4e, (q31_t)0x6792ab4e, (q31_t)0x678efa0e, (q31_t)0x678b488e, (q31_t)0x678796ce, (q31_t)0x6783e4cf,
+  (q31_t)0x6780328f, (q31_t)0x677c8010, (q31_t)0x6778cd50, (q31_t)0x67751a51, (q31_t)0x67716713, (q31_t)0x676db394, (q31_t)0x6769ffd5, (q31_t)0x67664bd7,
+  (q31_t)0x67629799, (q31_t)0x675ee31b, (q31_t)0x675b2e5e, (q31_t)0x67577960, (q31_t)0x6753c423, (q31_t)0x67500ea7, (q31_t)0x674c58ea, (q31_t)0x6748a2ee,
+  (q31_t)0x6744ecb2, (q31_t)0x67413636, (q31_t)0x673d7f7b, (q31_t)0x6739c880, (q31_t)0x67361145, (q31_t)0x673259ca, (q31_t)0x672ea210, (q31_t)0x672aea17,
+  (q31_t)0x672731dd, (q31_t)0x67237964, (q31_t)0x671fc0ac, (q31_t)0x671c07b4, (q31_t)0x67184e7c, (q31_t)0x67149504, (q31_t)0x6710db4d, (q31_t)0x670d2157,
+  (q31_t)0x67096721, (q31_t)0x6705acab, (q31_t)0x6701f1f6, (q31_t)0x66fe3701, (q31_t)0x66fa7bcd, (q31_t)0x66f6c059, (q31_t)0x66f304a6, (q31_t)0x66ef48b3,
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+  (q31_t)0x66cda201, (q31_t)0x66c9e393, (q31_t)0x66c624e7, (q31_t)0x66c265fa, (q31_t)0x66bea6cf, (q31_t)0x66bae764, (q31_t)0x66b727ba, (q31_t)0x66b367d0,
+  (q31_t)0x66afa7a7, (q31_t)0x66abe73f, (q31_t)0x66a82697, (q31_t)0x66a465b0, (q31_t)0x66a0a489, (q31_t)0x669ce324, (q31_t)0x6699217f, (q31_t)0x66955f9b,
+  (q31_t)0x66919d77, (q31_t)0x668ddb14, (q31_t)0x668a1872, (q31_t)0x66865591, (q31_t)0x66829270, (q31_t)0x667ecf11, (q31_t)0x667b0b72, (q31_t)0x66774793,
+  (q31_t)0x66738376, (q31_t)0x666fbf19, (q31_t)0x666bfa7d, (q31_t)0x666835a2, (q31_t)0x66647088, (q31_t)0x6660ab2f, (q31_t)0x665ce596, (q31_t)0x66591fbf,
+  (q31_t)0x665559a8, (q31_t)0x66519352, (q31_t)0x664dccbd, (q31_t)0x664a05e9, (q31_t)0x66463ed6, (q31_t)0x66427784, (q31_t)0x663eaff2, (q31_t)0x663ae822,
+  (q31_t)0x66372012, (q31_t)0x663357c4, (q31_t)0x662f8f36, (q31_t)0x662bc66a, (q31_t)0x6627fd5e, (q31_t)0x66243413, (q31_t)0x66206a8a, (q31_t)0x661ca0c1,
+  (q31_t)0x6618d6b9, (q31_t)0x66150c73, (q31_t)0x661141ed, (q31_t)0x660d7729, (q31_t)0x6609ac25, (q31_t)0x6605e0e3, (q31_t)0x66021561, (q31_t)0x65fe49a1,
+  (q31_t)0x65fa7da2, (q31_t)0x65f6b164, (q31_t)0x65f2e4e7, (q31_t)0x65ef182b, (q31_t)0x65eb4b30, (q31_t)0x65e77df6, (q31_t)0x65e3b07e, (q31_t)0x65dfe2c6,
+  (q31_t)0x65dc14d0, (q31_t)0x65d8469b, (q31_t)0x65d47827, (q31_t)0x65d0a975, (q31_t)0x65ccda83, (q31_t)0x65c90b53, (q31_t)0x65c53be4, (q31_t)0x65c16c36,
+  (q31_t)0x65bd9c49, (q31_t)0x65b9cc1e, (q31_t)0x65b5fbb4, (q31_t)0x65b22b0b, (q31_t)0x65ae5a23, (q31_t)0x65aa88fd, (q31_t)0x65a6b798, (q31_t)0x65a2e5f4,
+  (q31_t)0x659f1412, (q31_t)0x659b41f1, (q31_t)0x65976f91, (q31_t)0x65939cf3, (q31_t)0x658fca15, (q31_t)0x658bf6fa, (q31_t)0x6588239f, (q31_t)0x65845006,
+  (q31_t)0x65807c2f, (q31_t)0x657ca818, (q31_t)0x6578d3c4, (q31_t)0x6574ff30, (q31_t)0x65712a5e, (q31_t)0x656d554d, (q31_t)0x65697ffe, (q31_t)0x6565aa71,
+  (q31_t)0x6561d4a4, (q31_t)0x655dfe99, (q31_t)0x655a2850, (q31_t)0x655651c8, (q31_t)0x65527b02, (q31_t)0x654ea3fd, (q31_t)0x654accba, (q31_t)0x6546f538,
+  (q31_t)0x65431d77, (q31_t)0x653f4579, (q31_t)0x653b6d3b, (q31_t)0x653794c0, (q31_t)0x6533bc06, (q31_t)0x652fe30d, (q31_t)0x652c09d6, (q31_t)0x65283061,
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+  (q31_t)0x6505804a, (q31_t)0x6501a465, (q31_t)0x64fdc841, (q31_t)0x64f9ebe0, (q31_t)0x64f60f40, (q31_t)0x64f23262, (q31_t)0x64ee5546, (q31_t)0x64ea77eb,
+  (q31_t)0x64e69a52, (q31_t)0x64e2bc7b, (q31_t)0x64dede66, (q31_t)0x64db0012, (q31_t)0x64d72180, (q31_t)0x64d342b0, (q31_t)0x64cf63a2, (q31_t)0x64cb8456,
+  (q31_t)0x64c7a4cb, (q31_t)0x64c3c502, (q31_t)0x64bfe4fc, (q31_t)0x64bc04b6, (q31_t)0x64b82433, (q31_t)0x64b44372, (q31_t)0x64b06273, (q31_t)0x64ac8135,
+  (q31_t)0x64a89fba, (q31_t)0x64a4be00, (q31_t)0x64a0dc08, (q31_t)0x649cf9d2, (q31_t)0x6499175e, (q31_t)0x649534ac, (q31_t)0x649151bc, (q31_t)0x648d6e8e,
+  (q31_t)0x64898b22, (q31_t)0x6485a778, (q31_t)0x6481c390, (q31_t)0x647ddf6a, (q31_t)0x6479fb06, (q31_t)0x64761664, (q31_t)0x64723184, (q31_t)0x646e4c66,
+  (q31_t)0x646a670a, (q31_t)0x64668170, (q31_t)0x64629b98, (q31_t)0x645eb582, (q31_t)0x645acf2e, (q31_t)0x6456e89d, (q31_t)0x645301cd, (q31_t)0x644f1ac0,
+  (q31_t)0x644b3375, (q31_t)0x64474bec, (q31_t)0x64436425, (q31_t)0x643f7c20, (q31_t)0x643b93dd, (q31_t)0x6437ab5d, (q31_t)0x6433c29f, (q31_t)0x642fd9a3,
+  (q31_t)0x642bf069, (q31_t)0x642806f1, (q31_t)0x64241d3c, (q31_t)0x64203348, (q31_t)0x641c4917, (q31_t)0x64185ea9, (q31_t)0x641473fc, (q31_t)0x64108912,
+  (q31_t)0x640c9dea, (q31_t)0x6408b284, (q31_t)0x6404c6e1, (q31_t)0x6400db00, (q31_t)0x63fceee1, (q31_t)0x63f90285, (q31_t)0x63f515eb, (q31_t)0x63f12913,
+  (q31_t)0x63ed3bfd, (q31_t)0x63e94eaa, (q31_t)0x63e5611a, (q31_t)0x63e1734b, (q31_t)0x63dd853f, (q31_t)0x63d996f6, (q31_t)0x63d5a86f, (q31_t)0x63d1b9aa,
+  (q31_t)0x63cdcaa8, (q31_t)0x63c9db68, (q31_t)0x63c5ebeb, (q31_t)0x63c1fc30, (q31_t)0x63be0c37, (q31_t)0x63ba1c01, (q31_t)0x63b62b8e, (q31_t)0x63b23add,
+  (q31_t)0x63ae49ee, (q31_t)0x63aa58c2, (q31_t)0x63a66759, (q31_t)0x63a275b2, (q31_t)0x639e83cd, (q31_t)0x639a91ac, (q31_t)0x63969f4c, (q31_t)0x6392acaf,
+  (q31_t)0x638eb9d5, (q31_t)0x638ac6be, (q31_t)0x6386d369, (q31_t)0x6382dfd6, (q31_t)0x637eec07, (q31_t)0x637af7fa, (q31_t)0x637703af, (q31_t)0x63730f27,
+  (q31_t)0x636f1a62, (q31_t)0x636b2560, (q31_t)0x63673020, (q31_t)0x63633aa3, (q31_t)0x635f44e8, (q31_t)0x635b4ef0, (q31_t)0x635758bb, (q31_t)0x63536249,
+  (q31_t)0x634f6b99, (q31_t)0x634b74ad, (q31_t)0x63477d82, (q31_t)0x6343861b, (q31_t)0x633f8e76, (q31_t)0x633b9695, (q31_t)0x63379e76, (q31_t)0x6333a619,
+  (q31_t)0x632fad80, (q31_t)0x632bb4a9, (q31_t)0x6327bb96, (q31_t)0x6323c245, (q31_t)0x631fc8b7, (q31_t)0x631bceeb, (q31_t)0x6317d4e3, (q31_t)0x6313da9e,
+  (q31_t)0x630fe01b, (q31_t)0x630be55b, (q31_t)0x6307ea5e, (q31_t)0x6303ef25, (q31_t)0x62fff3ae, (q31_t)0x62fbf7fa, (q31_t)0x62f7fc08, (q31_t)0x62f3ffda,
+  (q31_t)0x62f0036f, (q31_t)0x62ec06c7, (q31_t)0x62e809e2, (q31_t)0x62e40cbf, (q31_t)0x62e00f60, (q31_t)0x62dc11c4, (q31_t)0x62d813eb, (q31_t)0x62d415d4,
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+  (q31_t)0x629011f4, (q31_t)0x628c0f96, (q31_t)0x62880cfb, (q31_t)0x62840a23, (q31_t)0x6280070f, (q31_t)0x627c03be, (q31_t)0x62780030, (q31_t)0x6273fc65,
+  (q31_t)0x626ff85e, (q31_t)0x626bf41a, (q31_t)0x6267ef99, (q31_t)0x6263eadc, (q31_t)0x625fe5e1, (q31_t)0x625be0ab, (q31_t)0x6257db37, (q31_t)0x6253d587,
+  (q31_t)0x624fcf9a, (q31_t)0x624bc970, (q31_t)0x6247c30a, (q31_t)0x6243bc68, (q31_t)0x623fb588, (q31_t)0x623bae6c, (q31_t)0x6237a714, (q31_t)0x62339f7e,
+  (q31_t)0x622f97ad, (q31_t)0x622b8f9e, (q31_t)0x62278754, (q31_t)0x62237ecc, (q31_t)0x621f7608, (q31_t)0x621b6d08, (q31_t)0x621763cb, (q31_t)0x62135a51,
+  (q31_t)0x620f509b, (q31_t)0x620b46a9, (q31_t)0x62073c7a, (q31_t)0x6203320e, (q31_t)0x61ff2766, (q31_t)0x61fb1c82, (q31_t)0x61f71161, (q31_t)0x61f30604,
+  (q31_t)0x61eefa6b, (q31_t)0x61eaee95, (q31_t)0x61e6e282, (q31_t)0x61e2d633, (q31_t)0x61dec9a8, (q31_t)0x61dabce0, (q31_t)0x61d6afdd, (q31_t)0x61d2a29c,
+  (q31_t)0x61ce9520, (q31_t)0x61ca8767, (q31_t)0x61c67971, (q31_t)0x61c26b40, (q31_t)0x61be5cd2, (q31_t)0x61ba4e28, (q31_t)0x61b63f41, (q31_t)0x61b2301e,
+  (q31_t)0x61ae20bf, (q31_t)0x61aa1124, (q31_t)0x61a6014d, (q31_t)0x61a1f139, (q31_t)0x619de0e9, (q31_t)0x6199d05d, (q31_t)0x6195bf94, (q31_t)0x6191ae90,
+  (q31_t)0x618d9d4f, (q31_t)0x61898bd2, (q31_t)0x61857a19, (q31_t)0x61816824, (q31_t)0x617d55f2, (q31_t)0x61794385, (q31_t)0x617530db, (q31_t)0x61711df5,
+  (q31_t)0x616d0ad3, (q31_t)0x6168f775, (q31_t)0x6164e3db, (q31_t)0x6160d005, (q31_t)0x615cbbf3, (q31_t)0x6158a7a4, (q31_t)0x6154931a, (q31_t)0x61507e54,
+  (q31_t)0x614c6951, (q31_t)0x61485413, (q31_t)0x61443e98, (q31_t)0x614028e2, (q31_t)0x613c12f0, (q31_t)0x6137fcc1, (q31_t)0x6133e657, (q31_t)0x612fcfb0,
+  (q31_t)0x612bb8ce, (q31_t)0x6127a1b0, (q31_t)0x61238a56, (q31_t)0x611f72c0, (q31_t)0x611b5aee, (q31_t)0x611742e0, (q31_t)0x61132a96, (q31_t)0x610f1210,
+  (q31_t)0x610af94f, (q31_t)0x6106e051, (q31_t)0x6102c718, (q31_t)0x60feada3, (q31_t)0x60fa93f2, (q31_t)0x60f67a05, (q31_t)0x60f25fdd, (q31_t)0x60ee4579,
+  (q31_t)0x60ea2ad8, (q31_t)0x60e60ffd, (q31_t)0x60e1f4e5, (q31_t)0x60ddd991, (q31_t)0x60d9be02, (q31_t)0x60d5a237, (q31_t)0x60d18631, (q31_t)0x60cd69ee,
+  (q31_t)0x60c94d70, (q31_t)0x60c530b6, (q31_t)0x60c113c1, (q31_t)0x60bcf690, (q31_t)0x60b8d923, (q31_t)0x60b4bb7a, (q31_t)0x60b09d96, (q31_t)0x60ac7f76,
+  (q31_t)0x60a8611b, (q31_t)0x60a44284, (q31_t)0x60a023b1, (q31_t)0x609c04a3, (q31_t)0x6097e559, (q31_t)0x6093c5d3, (q31_t)0x608fa612, (q31_t)0x608b8616,
+  (q31_t)0x608765dd, (q31_t)0x6083456a, (q31_t)0x607f24ba, (q31_t)0x607b03d0, (q31_t)0x6076e2a9, (q31_t)0x6072c148, (q31_t)0x606e9faa, (q31_t)0x606a7dd2,
+  (q31_t)0x60665bbd, (q31_t)0x6062396e, (q31_t)0x605e16e2, (q31_t)0x6059f41c, (q31_t)0x6055d11a, (q31_t)0x6051addc, (q31_t)0x604d8a63, (q31_t)0x604966af,
+  (q31_t)0x604542bf, (q31_t)0x60411e94, (q31_t)0x603cfa2e, (q31_t)0x6038d58c, (q31_t)0x6034b0af, (q31_t)0x60308b97, (q31_t)0x602c6643, (q31_t)0x602840b4,
+  (q31_t)0x60241ae9, (q31_t)0x601ff4e3, (q31_t)0x601bcea2, (q31_t)0x6017a826, (q31_t)0x6013816e, (q31_t)0x600f5a7b, (q31_t)0x600b334d, (q31_t)0x60070be4,
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+  (q31_t)0x58894c74, (q31_t)0x5884c2b3, (q31_t)0x588038bb, (q31_t)0x587bae8d, (q31_t)0x58772429, (q31_t)0x5872998e, (q31_t)0x586e0ebc, (q31_t)0x586983b4,
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+  (q31_t)0x571ba1b7, (q31_t)0x57170708, (q31_t)0x57126c24, (q31_t)0x570dd10a, (q31_t)0x570935bb, (q31_t)0x57049a36, (q31_t)0x56fffe7b, (q31_t)0x56fb628b,
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+  (q31_t)0x56d1dda9, (q31_t)0x56cd3fa1, (q31_t)0x56c8a162, (q31_t)0x56c402ef, (q31_t)0x56bf6446, (q31_t)0x56bac567, (q31_t)0x56b62653, (q31_t)0x56b18709,
+  (q31_t)0x56ace78a, (q31_t)0x56a847d6, (q31_t)0x56a3a7ec, (q31_t)0x569f07cc, (q31_t)0x569a6777, (q31_t)0x5695c6ed, (q31_t)0x5691262d, (q31_t)0x568c8538,
+  (q31_t)0x5687e40e, (q31_t)0x568342ae, (q31_t)0x567ea118, (q31_t)0x5679ff4e, (q31_t)0x56755d4e, (q31_t)0x5670bb19, (q31_t)0x566c18ae, (q31_t)0x5667760e,
+  (q31_t)0x5662d339, (q31_t)0x565e302e, (q31_t)0x56598cee, (q31_t)0x5654e979, (q31_t)0x565045cf, (q31_t)0x564ba1f0, (q31_t)0x5646fddb, (q31_t)0x56425991,
+  (q31_t)0x563db512, (q31_t)0x5639105d, (q31_t)0x56346b74, (q31_t)0x562fc655, (q31_t)0x562b2101, (q31_t)0x56267b78, (q31_t)0x5621d5ba, (q31_t)0x561d2fc6,
+  (q31_t)0x5618899e, (q31_t)0x5613e340, (q31_t)0x560f3cae, (q31_t)0x560a95e6, (q31_t)0x5605eee9, (q31_t)0x560147b7, (q31_t)0x55fca050, (q31_t)0x55f7f8b4,
+  (q31_t)0x55f350e3, (q31_t)0x55eea8dd, (q31_t)0x55ea00a2, (q31_t)0x55e55832, (q31_t)0x55e0af8d, (q31_t)0x55dc06b3, (q31_t)0x55d75da4, (q31_t)0x55d2b460,
+  (q31_t)0x55ce0ae7, (q31_t)0x55c96139, (q31_t)0x55c4b757, (q31_t)0x55c00d3f, (q31_t)0x55bb62f3, (q31_t)0x55b6b871, (q31_t)0x55b20dbb, (q31_t)0x55ad62d0,
+  (q31_t)0x55a8b7b0, (q31_t)0x55a40c5b, (q31_t)0x559f60d1, (q31_t)0x559ab513, (q31_t)0x55960920, (q31_t)0x55915cf8, (q31_t)0x558cb09b, (q31_t)0x55880409,
+  (q31_t)0x55835743, (q31_t)0x557eaa48, (q31_t)0x5579fd18, (q31_t)0x55754fb3, (q31_t)0x5570a21a, (q31_t)0x556bf44c, (q31_t)0x55674649, (q31_t)0x55629812,
+  (q31_t)0x555de9a6, (q31_t)0x55593b05, (q31_t)0x55548c30, (q31_t)0x554fdd26, (q31_t)0x554b2de7, (q31_t)0x55467e74, (q31_t)0x5541cecc, (q31_t)0x553d1ef0,
+  (q31_t)0x55386edf, (q31_t)0x5533be99, (q31_t)0x552f0e1f, (q31_t)0x552a5d70, (q31_t)0x5525ac8d, (q31_t)0x5520fb75, (q31_t)0x551c4a29, (q31_t)0x551798a8,
+  (q31_t)0x5512e6f3, (q31_t)0x550e3509, (q31_t)0x550982eb, (q31_t)0x5504d099, (q31_t)0x55001e12, (q31_t)0x54fb6b56, (q31_t)0x54f6b866, (q31_t)0x54f20542,
+  (q31_t)0x54ed51e9, (q31_t)0x54e89e5c, (q31_t)0x54e3ea9a, (q31_t)0x54df36a5, (q31_t)0x54da827a, (q31_t)0x54d5ce1c, (q31_t)0x54d11989, (q31_t)0x54cc64c2,
+  (q31_t)0x54c7afc6, (q31_t)0x54c2fa96, (q31_t)0x54be4532, (q31_t)0x54b98f9a, (q31_t)0x54b4d9cd, (q31_t)0x54b023cc, (q31_t)0x54ab6d97, (q31_t)0x54a6b72e,
+  (q31_t)0x54a20090, (q31_t)0x549d49bf, (q31_t)0x549892b9, (q31_t)0x5493db7f, (q31_t)0x548f2410, (q31_t)0x548a6c6e, (q31_t)0x5485b497, (q31_t)0x5480fc8c,
+  (q31_t)0x547c444d, (q31_t)0x54778bda, (q31_t)0x5472d333, (q31_t)0x546e1a58, (q31_t)0x54696149, (q31_t)0x5464a805, (q31_t)0x545fee8e, (q31_t)0x545b34e3,
+  (q31_t)0x54567b03, (q31_t)0x5451c0f0, (q31_t)0x544d06a8, (q31_t)0x54484c2d, (q31_t)0x5443917d, (q31_t)0x543ed699, (q31_t)0x543a1b82, (q31_t)0x54356037,
+  (q31_t)0x5430a4b7, (q31_t)0x542be904, (q31_t)0x54272d1d, (q31_t)0x54227102, (q31_t)0x541db4b3, (q31_t)0x5418f830, (q31_t)0x54143b79, (q31_t)0x540f7e8e,
+  (q31_t)0x540ac170, (q31_t)0x5406041d, (q31_t)0x54014697, (q31_t)0x53fc88dd, (q31_t)0x53f7caef, (q31_t)0x53f30cce, (q31_t)0x53ee4e78, (q31_t)0x53e98fef,
+  (q31_t)0x53e4d132, (q31_t)0x53e01242, (q31_t)0x53db531d, (q31_t)0x53d693c5, (q31_t)0x53d1d439, (q31_t)0x53cd147a, (q31_t)0x53c85486, (q31_t)0x53c3945f,
+  (q31_t)0x53bed405, (q31_t)0x53ba1377, (q31_t)0x53b552b5, (q31_t)0x53b091bf, (q31_t)0x53abd096, (q31_t)0x53a70f39, (q31_t)0x53a24da9, (q31_t)0x539d8be5,
+  (q31_t)0x5398c9ed, (q31_t)0x539407c2, (q31_t)0x538f4564, (q31_t)0x538a82d1, (q31_t)0x5385c00c, (q31_t)0x5380fd12, (q31_t)0x537c39e6, (q31_t)0x53777685,
+  (q31_t)0x5372b2f2, (q31_t)0x536def2a, (q31_t)0x53692b30, (q31_t)0x53646701, (q31_t)0x535fa2a0, (q31_t)0x535ade0b, (q31_t)0x53561942, (q31_t)0x53515447,
+  (q31_t)0x534c8f17, (q31_t)0x5347c9b5, (q31_t)0x5343041f, (q31_t)0x533e3e55, (q31_t)0x53397859, (q31_t)0x5334b229, (q31_t)0x532febc5, (q31_t)0x532b252f,
+  (q31_t)0x53265e65, (q31_t)0x53219767, (q31_t)0x531cd037, (q31_t)0x531808d3, (q31_t)0x5313413c, (q31_t)0x530e7972, (q31_t)0x5309b174, (q31_t)0x5304e943,
+  (q31_t)0x530020df, (q31_t)0x52fb5848, (q31_t)0x52f68f7e, (q31_t)0x52f1c680, (q31_t)0x52ecfd4f, (q31_t)0x52e833ec, (q31_t)0x52e36a55, (q31_t)0x52dea08a,
+  (q31_t)0x52d9d68d, (q31_t)0x52d50c5d, (q31_t)0x52d041f9, (q31_t)0x52cb7763, (q31_t)0x52c6ac99, (q31_t)0x52c1e19d, (q31_t)0x52bd166d, (q31_t)0x52b84b0a,
+  (q31_t)0x52b37f74, (q31_t)0x52aeb3ac, (q31_t)0x52a9e7b0, (q31_t)0x52a51b81, (q31_t)0x52a04f1f, (q31_t)0x529b828a, (q31_t)0x5296b5c3, (q31_t)0x5291e8c8,
+  (q31_t)0x528d1b9b, (q31_t)0x52884e3a, (q31_t)0x528380a7, (q31_t)0x527eb2e0, (q31_t)0x5279e4e7, (q31_t)0x527516bb, (q31_t)0x5270485c, (q31_t)0x526b79ca,
+  (q31_t)0x5266ab06, (q31_t)0x5261dc0e, (q31_t)0x525d0ce4, (q31_t)0x52583d87, (q31_t)0x52536df7, (q31_t)0x524e9e34, (q31_t)0x5249ce3f, (q31_t)0x5244fe17,
+  (q31_t)0x52402dbc, (q31_t)0x523b5d2e, (q31_t)0x52368c6e, (q31_t)0x5231bb7b, (q31_t)0x522cea55, (q31_t)0x522818fc, (q31_t)0x52234771, (q31_t)0x521e75b3,
+  (q31_t)0x5219a3c3, (q31_t)0x5214d1a0, (q31_t)0x520fff4a, (q31_t)0x520b2cc2, (q31_t)0x52065a07, (q31_t)0x52018719, (q31_t)0x51fcb3f9, (q31_t)0x51f7e0a6,
+  (q31_t)0x51f30d21, (q31_t)0x51ee3969, (q31_t)0x51e9657e, (q31_t)0x51e49162, (q31_t)0x51dfbd12, (q31_t)0x51dae890, (q31_t)0x51d613dc, (q31_t)0x51d13ef5,
+  (q31_t)0x51cc69db, (q31_t)0x51c79490, (q31_t)0x51c2bf11, (q31_t)0x51bde960, (q31_t)0x51b9137d, (q31_t)0x51b43d68, (q31_t)0x51af6720, (q31_t)0x51aa90a5,
+  (q31_t)0x51a5b9f9, (q31_t)0x51a0e31a, (q31_t)0x519c0c08, (q31_t)0x519734c4, (q31_t)0x51925d4e, (q31_t)0x518d85a6, (q31_t)0x5188adcb, (q31_t)0x5183d5be,
+  (q31_t)0x517efd7f, (q31_t)0x517a250d, (q31_t)0x51754c69, (q31_t)0x51707393, (q31_t)0x516b9a8b, (q31_t)0x5166c150, (q31_t)0x5161e7e4, (q31_t)0x515d0e45,
+  (q31_t)0x51583473, (q31_t)0x51535a70, (q31_t)0x514e803b, (q31_t)0x5149a5d3, (q31_t)0x5144cb39, (q31_t)0x513ff06d, (q31_t)0x513b156f, (q31_t)0x51363a3f,
+  (q31_t)0x51315edd, (q31_t)0x512c8348, (q31_t)0x5127a782, (q31_t)0x5122cb8a, (q31_t)0x511def5f, (q31_t)0x51191302, (q31_t)0x51143674, (q31_t)0x510f59b3,
+  (q31_t)0x510a7cc1, (q31_t)0x51059f9c, (q31_t)0x5100c246, (q31_t)0x50fbe4bd, (q31_t)0x50f70703, (q31_t)0x50f22916, (q31_t)0x50ed4af8, (q31_t)0x50e86ca8,
+  (q31_t)0x50e38e25, (q31_t)0x50deaf71, (q31_t)0x50d9d08b, (q31_t)0x50d4f173, (q31_t)0x50d0122a, (q31_t)0x50cb32ae, (q31_t)0x50c65301, (q31_t)0x50c17322,
+  (q31_t)0x50bc9311, (q31_t)0x50b7b2ce, (q31_t)0x50b2d259, (q31_t)0x50adf1b3, (q31_t)0x50a910db, (q31_t)0x50a42fd1, (q31_t)0x509f4e95, (q31_t)0x509a6d28,
+  (q31_t)0x50958b88, (q31_t)0x5090a9b8, (q31_t)0x508bc7b5, (q31_t)0x5086e581, (q31_t)0x5082031b, (q31_t)0x507d2083, (q31_t)0x50783dba, (q31_t)0x50735abf,
+  (q31_t)0x506e7793, (q31_t)0x50699435, (q31_t)0x5064b0a5, (q31_t)0x505fcce4, (q31_t)0x505ae8f1, (q31_t)0x505604cd, (q31_t)0x50512077, (q31_t)0x504c3bef,
+  (q31_t)0x50475736, (q31_t)0x5042724c, (q31_t)0x503d8d30, (q31_t)0x5038a7e2, (q31_t)0x5033c263, (q31_t)0x502edcb2, (q31_t)0x5029f6d1, (q31_t)0x502510bd,
+  (q31_t)0x50202a78, (q31_t)0x501b4402, (q31_t)0x50165d5a, (q31_t)0x50117681, (q31_t)0x500c8f77, (q31_t)0x5007a83b, (q31_t)0x5002c0cd, (q31_t)0x4ffdd92f,
+  (q31_t)0x4ff8f15f, (q31_t)0x4ff4095e, (q31_t)0x4fef212b, (q31_t)0x4fea38c7, (q31_t)0x4fe55032, (q31_t)0x4fe0676c, (q31_t)0x4fdb7e74, (q31_t)0x4fd6954b,
+  (q31_t)0x4fd1abf0, (q31_t)0x4fccc265, (q31_t)0x4fc7d8a8, (q31_t)0x4fc2eeba, (q31_t)0x4fbe049b, (q31_t)0x4fb91a4b, (q31_t)0x4fb42fc9, (q31_t)0x4faf4517,
+  (q31_t)0x4faa5a33, (q31_t)0x4fa56f1e, (q31_t)0x4fa083d8, (q31_t)0x4f9b9861, (q31_t)0x4f96acb8, (q31_t)0x4f91c0df, (q31_t)0x4f8cd4d4, (q31_t)0x4f87e899,
+  (q31_t)0x4f82fc2c, (q31_t)0x4f7e0f8f, (q31_t)0x4f7922c0, (q31_t)0x4f7435c0, (q31_t)0x4f6f488f, (q31_t)0x4f6a5b2e, (q31_t)0x4f656d9b, (q31_t)0x4f607fd7,
+  (q31_t)0x4f5b91e3, (q31_t)0x4f56a3bd, (q31_t)0x4f51b566, (q31_t)0x4f4cc6df, (q31_t)0x4f47d827, (q31_t)0x4f42e93d, (q31_t)0x4f3dfa23, (q31_t)0x4f390ad8,
+  (q31_t)0x4f341b5c, (q31_t)0x4f2f2baf, (q31_t)0x4f2a3bd2, (q31_t)0x4f254bc3, (q31_t)0x4f205b84, (q31_t)0x4f1b6b14, (q31_t)0x4f167a73, (q31_t)0x4f1189a1,
+  (q31_t)0x4f0c989f, (q31_t)0x4f07a76b, (q31_t)0x4f02b608, (q31_t)0x4efdc473, (q31_t)0x4ef8d2ad, (q31_t)0x4ef3e0b7, (q31_t)0x4eeeee90, (q31_t)0x4ee9fc39,
+  (q31_t)0x4ee509b1, (q31_t)0x4ee016f8, (q31_t)0x4edb240e, (q31_t)0x4ed630f4, (q31_t)0x4ed13da9, (q31_t)0x4ecc4a2e, (q31_t)0x4ec75682, (q31_t)0x4ec262a5,
+  (q31_t)0x4ebd6e98, (q31_t)0x4eb87a5a, (q31_t)0x4eb385ec, (q31_t)0x4eae914d, (q31_t)0x4ea99c7d, (q31_t)0x4ea4a77d, (q31_t)0x4e9fb24d, (q31_t)0x4e9abcec,
+  (q31_t)0x4e95c75b, (q31_t)0x4e90d199, (q31_t)0x4e8bdba6, (q31_t)0x4e86e583, (q31_t)0x4e81ef30, (q31_t)0x4e7cf8ac, (q31_t)0x4e7801f8, (q31_t)0x4e730b14,
+  (q31_t)0x4e6e13ff, (q31_t)0x4e691cba, (q31_t)0x4e642544, (q31_t)0x4e5f2d9e, (q31_t)0x4e5a35c7, (q31_t)0x4e553dc1, (q31_t)0x4e50458a, (q31_t)0x4e4b4d22,
+  (q31_t)0x4e46548b, (q31_t)0x4e415bc3, (q31_t)0x4e3c62cb, (q31_t)0x4e3769a2, (q31_t)0x4e32704a, (q31_t)0x4e2d76c1, (q31_t)0x4e287d08, (q31_t)0x4e23831e,
+  (q31_t)0x4e1e8905, (q31_t)0x4e198ebb, (q31_t)0x4e149441, (q31_t)0x4e0f9997, (q31_t)0x4e0a9ebd, (q31_t)0x4e05a3b2, (q31_t)0x4e00a878, (q31_t)0x4dfbad0d,
+  (q31_t)0x4df6b173, (q31_t)0x4df1b5a8, (q31_t)0x4decb9ad, (q31_t)0x4de7bd82, (q31_t)0x4de2c127, (q31_t)0x4dddc49c, (q31_t)0x4dd8c7e1, (q31_t)0x4dd3caf6,
+  (q31_t)0x4dcecdda, (q31_t)0x4dc9d08f, (q31_t)0x4dc4d314, (q31_t)0x4dbfd569, (q31_t)0x4dbad78e, (q31_t)0x4db5d983, (q31_t)0x4db0db48, (q31_t)0x4dabdcdd,
+  (q31_t)0x4da6de43, (q31_t)0x4da1df78, (q31_t)0x4d9ce07d, (q31_t)0x4d97e153, (q31_t)0x4d92e1f9, (q31_t)0x4d8de26f, (q31_t)0x4d88e2b5, (q31_t)0x4d83e2cb,
+  (q31_t)0x4d7ee2b1, (q31_t)0x4d79e268, (q31_t)0x4d74e1ef, (q31_t)0x4d6fe146, (q31_t)0x4d6ae06d, (q31_t)0x4d65df64, (q31_t)0x4d60de2c, (q31_t)0x4d5bdcc4,
+  (q31_t)0x4d56db2d, (q31_t)0x4d51d965, (q31_t)0x4d4cd76e, (q31_t)0x4d47d547, (q31_t)0x4d42d2f1, (q31_t)0x4d3dd06b, (q31_t)0x4d38cdb5, (q31_t)0x4d33cad0,
+  (q31_t)0x4d2ec7bb, (q31_t)0x4d29c476, (q31_t)0x4d24c102, (q31_t)0x4d1fbd5e, (q31_t)0x4d1ab98b, (q31_t)0x4d15b588, (q31_t)0x4d10b155, (q31_t)0x4d0bacf3,
+  (q31_t)0x4d06a862, (q31_t)0x4d01a3a0, (q31_t)0x4cfc9eb0, (q31_t)0x4cf79990, (q31_t)0x4cf29440, (q31_t)0x4ced8ec1, (q31_t)0x4ce88913, (q31_t)0x4ce38335,
+  (q31_t)0x4cde7d28, (q31_t)0x4cd976eb, (q31_t)0x4cd4707f, (q31_t)0x4ccf69e3, (q31_t)0x4cca6318, (q31_t)0x4cc55c1e, (q31_t)0x4cc054f4, (q31_t)0x4cbb4d9b,
+  (q31_t)0x4cb64613, (q31_t)0x4cb13e5b, (q31_t)0x4cac3674, (q31_t)0x4ca72e5e, (q31_t)0x4ca22619, (q31_t)0x4c9d1da4, (q31_t)0x4c981500, (q31_t)0x4c930c2d,
+  (q31_t)0x4c8e032a, (q31_t)0x4c88f9f8, (q31_t)0x4c83f097, (q31_t)0x4c7ee707, (q31_t)0x4c79dd48, (q31_t)0x4c74d359, (q31_t)0x4c6fc93b, (q31_t)0x4c6abeef,
+  (q31_t)0x4c65b473, (q31_t)0x4c60a9c8, (q31_t)0x4c5b9eed, (q31_t)0x4c5693e4, (q31_t)0x4c5188ac, (q31_t)0x4c4c7d44, (q31_t)0x4c4771ae, (q31_t)0x4c4265e8,
+  (q31_t)0x4c3d59f3, (q31_t)0x4c384dd0, (q31_t)0x4c33417d, (q31_t)0x4c2e34fb, (q31_t)0x4c29284b, (q31_t)0x4c241b6b, (q31_t)0x4c1f0e5c, (q31_t)0x4c1a011f,
+  (q31_t)0x4c14f3b2, (q31_t)0x4c0fe617, (q31_t)0x4c0ad84c, (q31_t)0x4c05ca53, (q31_t)0x4c00bc2b, (q31_t)0x4bfbadd4, (q31_t)0x4bf69f4e, (q31_t)0x4bf19099,
+  (q31_t)0x4bec81b5, (q31_t)0x4be772a3, (q31_t)0x4be26362, (q31_t)0x4bdd53f2, (q31_t)0x4bd84453, (q31_t)0x4bd33485, (q31_t)0x4bce2488, (q31_t)0x4bc9145d,
+  (q31_t)0x4bc40403, (q31_t)0x4bbef37b, (q31_t)0x4bb9e2c3, (q31_t)0x4bb4d1dd, (q31_t)0x4bafc0c8, (q31_t)0x4baaaf85, (q31_t)0x4ba59e12, (q31_t)0x4ba08c72,
+  (q31_t)0x4b9b7aa2, (q31_t)0x4b9668a4, (q31_t)0x4b915677, (q31_t)0x4b8c441c, (q31_t)0x4b873192, (q31_t)0x4b821ed9, (q31_t)0x4b7d0bf2, (q31_t)0x4b77f8dc,
+  (q31_t)0x4b72e598, (q31_t)0x4b6dd225, (q31_t)0x4b68be84, (q31_t)0x4b63aab4, (q31_t)0x4b5e96b6, (q31_t)0x4b598289, (q31_t)0x4b546e2d, (q31_t)0x4b4f59a4,
+  (q31_t)0x4b4a44eb, (q31_t)0x4b453005, (q31_t)0x4b401aef, (q31_t)0x4b3b05ac, (q31_t)0x4b35f03a, (q31_t)0x4b30da9a, (q31_t)0x4b2bc4cb, (q31_t)0x4b26aece,
+  (q31_t)0x4b2198a2, (q31_t)0x4b1c8248, (q31_t)0x4b176bc0, (q31_t)0x4b12550a, (q31_t)0x4b0d3e25, (q31_t)0x4b082712, (q31_t)0x4b030fd1, (q31_t)0x4afdf861,
+  (q31_t)0x4af8e0c3, (q31_t)0x4af3c8f7, (q31_t)0x4aeeb0fd, (q31_t)0x4ae998d4, (q31_t)0x4ae4807d, (q31_t)0x4adf67f8, (q31_t)0x4ada4f45, (q31_t)0x4ad53664,
+  (q31_t)0x4ad01d54, (q31_t)0x4acb0417, (q31_t)0x4ac5eaab, (q31_t)0x4ac0d111, (q31_t)0x4abbb749, (q31_t)0x4ab69d53, (q31_t)0x4ab1832f, (q31_t)0x4aac68dc,
+  (q31_t)0x4aa74e5c, (q31_t)0x4aa233ae, (q31_t)0x4a9d18d1, (q31_t)0x4a97fdc7, (q31_t)0x4a92e28e, (q31_t)0x4a8dc728, (q31_t)0x4a88ab93, (q31_t)0x4a838fd1,
+  (q31_t)0x4a7e73e0, (q31_t)0x4a7957c2, (q31_t)0x4a743b76, (q31_t)0x4a6f1efc, (q31_t)0x4a6a0253, (q31_t)0x4a64e57d, (q31_t)0x4a5fc879, (q31_t)0x4a5aab48,
+  (q31_t)0x4a558de8, (q31_t)0x4a50705a, (q31_t)0x4a4b529f, (q31_t)0x4a4634b6, (q31_t)0x4a41169f, (q31_t)0x4a3bf85a, (q31_t)0x4a36d9e7, (q31_t)0x4a31bb47,
+  (q31_t)0x4a2c9c79, (q31_t)0x4a277d7d, (q31_t)0x4a225e53, (q31_t)0x4a1d3efc, (q31_t)0x4a181f77, (q31_t)0x4a12ffc4, (q31_t)0x4a0ddfe4, (q31_t)0x4a08bfd5,
+  (q31_t)0x4a039f9a, (q31_t)0x49fe7f30, (q31_t)0x49f95e99, (q31_t)0x49f43dd4, (q31_t)0x49ef1ce2, (q31_t)0x49e9fbc2, (q31_t)0x49e4da74, (q31_t)0x49dfb8f9,
+  (q31_t)0x49da9750, (q31_t)0x49d5757a, (q31_t)0x49d05376, (q31_t)0x49cb3145, (q31_t)0x49c60ee6, (q31_t)0x49c0ec59, (q31_t)0x49bbc9a0, (q31_t)0x49b6a6b8,
+  (q31_t)0x49b183a3, (q31_t)0x49ac6061, (q31_t)0x49a73cf1, (q31_t)0x49a21954, (q31_t)0x499cf589, (q31_t)0x4997d191, (q31_t)0x4992ad6c, (q31_t)0x498d8919,
+  (q31_t)0x49886499, (q31_t)0x49833fec, (q31_t)0x497e1b11, (q31_t)0x4978f609, (q31_t)0x4973d0d3, (q31_t)0x496eab70, (q31_t)0x496985e0, (q31_t)0x49646023,
+  (q31_t)0x495f3a38, (q31_t)0x495a1420, (q31_t)0x4954eddb, (q31_t)0x494fc768, (q31_t)0x494aa0c9, (q31_t)0x494579fc, (q31_t)0x49405302, (q31_t)0x493b2bdb,
+  (q31_t)0x49360486, (q31_t)0x4930dd05, (q31_t)0x492bb556, (q31_t)0x49268d7a, (q31_t)0x49216571, (q31_t)0x491c3d3b, (q31_t)0x491714d8, (q31_t)0x4911ec47,
+  (q31_t)0x490cc38a, (q31_t)0x49079aa0, (q31_t)0x49027188, (q31_t)0x48fd4844, (q31_t)0x48f81ed2, (q31_t)0x48f2f534, (q31_t)0x48edcb68, (q31_t)0x48e8a170,
+  (q31_t)0x48e3774a, (q31_t)0x48de4cf8, (q31_t)0x48d92278, (q31_t)0x48d3f7cc, (q31_t)0x48ceccf3, (q31_t)0x48c9a1ed, (q31_t)0x48c476b9, (q31_t)0x48bf4b59,
+  (q31_t)0x48ba1fcd, (q31_t)0x48b4f413, (q31_t)0x48afc82c, (q31_t)0x48aa9c19, (q31_t)0x48a56fd9, (q31_t)0x48a0436c, (q31_t)0x489b16d2, (q31_t)0x4895ea0b,
+  (q31_t)0x4890bd18, (q31_t)0x488b8ff8, (q31_t)0x488662ab, (q31_t)0x48813531, (q31_t)0x487c078b, (q31_t)0x4876d9b8, (q31_t)0x4871abb8, (q31_t)0x486c7d8c,
+  (q31_t)0x48674f33, (q31_t)0x486220ad, (q31_t)0x485cf1fa, (q31_t)0x4857c31b, (q31_t)0x48529410, (q31_t)0x484d64d7, (q31_t)0x48483572, (q31_t)0x484305e1,
+  (q31_t)0x483dd623, (q31_t)0x4838a638, (q31_t)0x48337621, (q31_t)0x482e45dd, (q31_t)0x4829156d, (q31_t)0x4823e4d0, (q31_t)0x481eb407, (q31_t)0x48198311,
+  (q31_t)0x481451ef, (q31_t)0x480f20a0, (q31_t)0x4809ef25, (q31_t)0x4804bd7e, (q31_t)0x47ff8baa, (q31_t)0x47fa59a9, (q31_t)0x47f5277d, (q31_t)0x47eff523,
+  (q31_t)0x47eac29e, (q31_t)0x47e58fec, (q31_t)0x47e05d0e, (q31_t)0x47db2a03, (q31_t)0x47d5f6cc, (q31_t)0x47d0c369, (q31_t)0x47cb8fd9, (q31_t)0x47c65c1d,
+  (q31_t)0x47c12835, (q31_t)0x47bbf421, (q31_t)0x47b6bfe0, (q31_t)0x47b18b74, (q31_t)0x47ac56da, (q31_t)0x47a72215, (q31_t)0x47a1ed24, (q31_t)0x479cb806,
+  (q31_t)0x479782bc, (q31_t)0x47924d46, (q31_t)0x478d17a4, (q31_t)0x4787e1d6, (q31_t)0x4782abdb, (q31_t)0x477d75b5, (q31_t)0x47783f62, (q31_t)0x477308e3,
+  (q31_t)0x476dd239, (q31_t)0x47689b62, (q31_t)0x4763645f, (q31_t)0x475e2d30, (q31_t)0x4758f5d5, (q31_t)0x4753be4e, (q31_t)0x474e869b, (q31_t)0x47494ebc,
+  (q31_t)0x474416b1, (q31_t)0x473ede7a, (q31_t)0x4739a617, (q31_t)0x47346d89, (q31_t)0x472f34ce, (q31_t)0x4729fbe7, (q31_t)0x4724c2d5, (q31_t)0x471f8996,
+  (q31_t)0x471a502c, (q31_t)0x47151696, (q31_t)0x470fdcd4, (q31_t)0x470aa2e6, (q31_t)0x470568cd, (q31_t)0x47002e87, (q31_t)0x46faf416, (q31_t)0x46f5b979,
+  (q31_t)0x46f07eb0, (q31_t)0x46eb43bc, (q31_t)0x46e6089b, (q31_t)0x46e0cd4f, (q31_t)0x46db91d8, (q31_t)0x46d65634, (q31_t)0x46d11a65, (q31_t)0x46cbde6a,
+  (q31_t)0x46c6a244, (q31_t)0x46c165f1, (q31_t)0x46bc2974, (q31_t)0x46b6ecca, (q31_t)0x46b1aff5, (q31_t)0x46ac72f4, (q31_t)0x46a735c8, (q31_t)0x46a1f870,
+  (q31_t)0x469cbaed, (q31_t)0x46977d3e, (q31_t)0x46923f63, (q31_t)0x468d015d, (q31_t)0x4687c32c, (q31_t)0x468284cf, (q31_t)0x467d4646, (q31_t)0x46780792,
+  (q31_t)0x4672c8b3, (q31_t)0x466d89a8, (q31_t)0x46684a71, (q31_t)0x46630b0f, (q31_t)0x465dcb82, (q31_t)0x46588bc9, (q31_t)0x46534be5, (q31_t)0x464e0bd6,
+  (q31_t)0x4648cb9b, (q31_t)0x46438b35, (q31_t)0x463e4aa3, (q31_t)0x463909e7, (q31_t)0x4633c8fe, (q31_t)0x462e87eb, (q31_t)0x462946ac, (q31_t)0x46240542,
+  (q31_t)0x461ec3ad, (q31_t)0x461981ec, (q31_t)0x46144001, (q31_t)0x460efde9, (q31_t)0x4609bba7, (q31_t)0x4604793a, (q31_t)0x45ff36a1, (q31_t)0x45f9f3dd,
+  (q31_t)0x45f4b0ee, (q31_t)0x45ef6dd4, (q31_t)0x45ea2a8f, (q31_t)0x45e4e71f, (q31_t)0x45dfa383, (q31_t)0x45da5fbc, (q31_t)0x45d51bcb, (q31_t)0x45cfd7ae,
+  (q31_t)0x45ca9366, (q31_t)0x45c54ef3, (q31_t)0x45c00a55, (q31_t)0x45bac58c, (q31_t)0x45b58098, (q31_t)0x45b03b79, (q31_t)0x45aaf630, (q31_t)0x45a5b0bb,
+  (q31_t)0x45a06b1b, (q31_t)0x459b2550, (q31_t)0x4595df5a, (q31_t)0x45909939, (q31_t)0x458b52ee, (q31_t)0x45860c77, (q31_t)0x4580c5d6, (q31_t)0x457b7f0a,
+  (q31_t)0x45763813, (q31_t)0x4570f0f1, (q31_t)0x456ba9a4, (q31_t)0x4566622c, (q31_t)0x45611a8a, (q31_t)0x455bd2bc, (q31_t)0x45568ac4, (q31_t)0x455142a2,
+  (q31_t)0x454bfa54, (q31_t)0x4546b1dc, (q31_t)0x45416939, (q31_t)0x453c206b, (q31_t)0x4536d773, (q31_t)0x45318e4f, (q31_t)0x452c4502, (q31_t)0x4526fb89,
+  (q31_t)0x4521b1e6, (q31_t)0x451c6818, (q31_t)0x45171e20, (q31_t)0x4511d3fd, (q31_t)0x450c89af, (q31_t)0x45073f37, (q31_t)0x4501f494, (q31_t)0x44fca9c6,
+  (q31_t)0x44f75ecf, (q31_t)0x44f213ac, (q31_t)0x44ecc85f, (q31_t)0x44e77ce7, (q31_t)0x44e23145, (q31_t)0x44dce579, (q31_t)0x44d79982, (q31_t)0x44d24d60,
+  (q31_t)0x44cd0114, (q31_t)0x44c7b49e, (q31_t)0x44c267fd, (q31_t)0x44bd1b32, (q31_t)0x44b7ce3c, (q31_t)0x44b2811c, (q31_t)0x44ad33d2, (q31_t)0x44a7e65d,
+  (q31_t)0x44a298be, (q31_t)0x449d4af5, (q31_t)0x4497fd01, (q31_t)0x4492aee3, (q31_t)0x448d609b, (q31_t)0x44881228, (q31_t)0x4482c38b, (q31_t)0x447d74c4,
+  (q31_t)0x447825d2, (q31_t)0x4472d6b7, (q31_t)0x446d8771, (q31_t)0x44683801, (q31_t)0x4462e866, (q31_t)0x445d98a2, (q31_t)0x445848b3, (q31_t)0x4452f89b,
+  (q31_t)0x444da858, (q31_t)0x444857ea, (q31_t)0x44430753, (q31_t)0x443db692, (q31_t)0x443865a7, (q31_t)0x44331491, (q31_t)0x442dc351, (q31_t)0x442871e8,
+  (q31_t)0x44232054, (q31_t)0x441dce96, (q31_t)0x44187caf, (q31_t)0x44132a9d, (q31_t)0x440dd861, (q31_t)0x440885fc, (q31_t)0x4403336c, (q31_t)0x43fde0b2,
+  (q31_t)0x43f88dcf, (q31_t)0x43f33ac1, (q31_t)0x43ede78a, (q31_t)0x43e89429, (q31_t)0x43e3409d, (q31_t)0x43ddece8, (q31_t)0x43d8990a, (q31_t)0x43d34501,
+  (q31_t)0x43cdf0ce, (q31_t)0x43c89c72, (q31_t)0x43c347eb, (q31_t)0x43bdf33b, (q31_t)0x43b89e62, (q31_t)0x43b3495e, (q31_t)0x43adf431, (q31_t)0x43a89ed9,
+  (q31_t)0x43a34959, (q31_t)0x439df3ae, (q31_t)0x43989dda, (q31_t)0x439347dc, (q31_t)0x438df1b4, (q31_t)0x43889b63, (q31_t)0x438344e8, (q31_t)0x437dee43,
+  (q31_t)0x43789775, (q31_t)0x4373407d, (q31_t)0x436de95b, (q31_t)0x43689210, (q31_t)0x43633a9c, (q31_t)0x435de2fd, (q31_t)0x43588b36, (q31_t)0x43533344,
+  (q31_t)0x434ddb29, (q31_t)0x434882e5, (q31_t)0x43432a77, (q31_t)0x433dd1e0, (q31_t)0x4338791f, (q31_t)0x43332035, (q31_t)0x432dc721, (q31_t)0x43286de4,
+  (q31_t)0x4323147d, (q31_t)0x431dbaed, (q31_t)0x43186133, (q31_t)0x43130751, (q31_t)0x430dad44, (q31_t)0x4308530f, (q31_t)0x4302f8b0, (q31_t)0x42fd9e28,
+  (q31_t)0x42f84376, (q31_t)0x42f2e89b, (q31_t)0x42ed8d97, (q31_t)0x42e83269, (q31_t)0x42e2d713, (q31_t)0x42dd7b93, (q31_t)0x42d81fe9, (q31_t)0x42d2c417,
+  (q31_t)0x42cd681b, (q31_t)0x42c80bf6, (q31_t)0x42c2afa8, (q31_t)0x42bd5331, (q31_t)0x42b7f690, (q31_t)0x42b299c7, (q31_t)0x42ad3cd4, (q31_t)0x42a7dfb8,
+  (q31_t)0x42a28273, (q31_t)0x429d2505, (q31_t)0x4297c76e, (q31_t)0x429269ae, (q31_t)0x428d0bc4, (q31_t)0x4287adb2, (q31_t)0x42824f76, (q31_t)0x427cf112,
+  (q31_t)0x42779285, (q31_t)0x427233ce, (q31_t)0x426cd4ef, (q31_t)0x426775e6, (q31_t)0x426216b5, (q31_t)0x425cb75a, (q31_t)0x425757d7, (q31_t)0x4251f82b,
+  (q31_t)0x424c9856, (q31_t)0x42473858, (q31_t)0x4241d831, (q31_t)0x423c77e1, (q31_t)0x42371769, (q31_t)0x4231b6c7, (q31_t)0x422c55fd, (q31_t)0x4226f50a,
+  (q31_t)0x422193ee, (q31_t)0x421c32a9, (q31_t)0x4216d13c, (q31_t)0x42116fa5, (q31_t)0x420c0de6, (q31_t)0x4206abfe, (q31_t)0x420149ee, (q31_t)0x41fbe7b5,
+  (q31_t)0x41f68553, (q31_t)0x41f122c8, (q31_t)0x41ebc015, (q31_t)0x41e65d39, (q31_t)0x41e0fa35, (q31_t)0x41db9707, (q31_t)0x41d633b1, (q31_t)0x41d0d033,
+  (q31_t)0x41cb6c8c, (q31_t)0x41c608bc, (q31_t)0x41c0a4c4, (q31_t)0x41bb40a3, (q31_t)0x41b5dc5a, (q31_t)0x41b077e8, (q31_t)0x41ab134e, (q31_t)0x41a5ae8b,
+  (q31_t)0x41a049a0, (q31_t)0x419ae48c, (q31_t)0x41957f4f, (q31_t)0x419019eb, (q31_t)0x418ab45d, (q31_t)0x41854ea8, (q31_t)0x417fe8ca, (q31_t)0x417a82c3,
+  (q31_t)0x41751c94, (q31_t)0x416fb63d, (q31_t)0x416a4fbd, (q31_t)0x4164e916, (q31_t)0x415f8245, (q31_t)0x415a1b4d, (q31_t)0x4154b42c, (q31_t)0x414f4ce2,
+  (q31_t)0x4149e571, (q31_t)0x41447dd7, (q31_t)0x413f1615, (q31_t)0x4139ae2b, (q31_t)0x41344618, (q31_t)0x412edddd, (q31_t)0x4129757b, (q31_t)0x41240cef,
+  (q31_t)0x411ea43c, (q31_t)0x41193b61, (q31_t)0x4113d25d, (q31_t)0x410e6931, (q31_t)0x4108ffdd, (q31_t)0x41039661, (q31_t)0x40fe2cbd, (q31_t)0x40f8c2f1,
+  (q31_t)0x40f358fc, (q31_t)0x40edeee0, (q31_t)0x40e8849b, (q31_t)0x40e31a2f, (q31_t)0x40ddaf9b, (q31_t)0x40d844de, (q31_t)0x40d2d9f9, (q31_t)0x40cd6eed,
+  (q31_t)0x40c803b8, (q31_t)0x40c2985c, (q31_t)0x40bd2cd8, (q31_t)0x40b7c12b, (q31_t)0x40b25557, (q31_t)0x40ace95b, (q31_t)0x40a77d37, (q31_t)0x40a210eb,
+  (q31_t)0x409ca477, (q31_t)0x409737dc, (q31_t)0x4091cb18, (q31_t)0x408c5e2d, (q31_t)0x4086f11a, (q31_t)0x408183df, (q31_t)0x407c167c, (q31_t)0x4076a8f1,
+  (q31_t)0x40713b3f, (q31_t)0x406bcd65, (q31_t)0x40665f63, (q31_t)0x4060f13a, (q31_t)0x405b82e9, (q31_t)0x40561470, (q31_t)0x4050a5cf, (q31_t)0x404b3707,
+  (q31_t)0x4045c817, (q31_t)0x404058ff, (q31_t)0x403ae9c0, (q31_t)0x40357a59, (q31_t)0x40300acb, (q31_t)0x402a9b15, (q31_t)0x40252b37, (q31_t)0x401fbb32,
+  (q31_t)0x401a4b05, (q31_t)0x4014dab1, (q31_t)0x400f6a35, (q31_t)0x4009f992, (q31_t)0x400488c7, (q31_t)0x3fff17d5, (q31_t)0x3ff9a6bb, (q31_t)0x3ff4357a,
+  (q31_t)0x3feec411, (q31_t)0x3fe95281, (q31_t)0x3fe3e0c9, (q31_t)0x3fde6eeb, (q31_t)0x3fd8fce4, (q31_t)0x3fd38ab6, (q31_t)0x3fce1861, (q31_t)0x3fc8a5e5,
+  (q31_t)0x3fc33341, (q31_t)0x3fbdc076, (q31_t)0x3fb84d83, (q31_t)0x3fb2da6a, (q31_t)0x3fad6729, (q31_t)0x3fa7f3c0, (q31_t)0x3fa28031, (q31_t)0x3f9d0c7a,
+  (q31_t)0x3f97989c, (q31_t)0x3f922496, (q31_t)0x3f8cb06a, (q31_t)0x3f873c16, (q31_t)0x3f81c79b, (q31_t)0x3f7c52f9, (q31_t)0x3f76de30, (q31_t)0x3f71693f,
+  (q31_t)0x3f6bf428, (q31_t)0x3f667ee9, (q31_t)0x3f610983, (q31_t)0x3f5b93f6, (q31_t)0x3f561e42, (q31_t)0x3f50a867, (q31_t)0x3f4b3265, (q31_t)0x3f45bc3c,
+  (q31_t)0x3f4045ec, (q31_t)0x3f3acf75, (q31_t)0x3f3558d7, (q31_t)0x3f2fe211, (q31_t)0x3f2a6b25, (q31_t)0x3f24f412, (q31_t)0x3f1f7cd8, (q31_t)0x3f1a0577,
+  (q31_t)0x3f148def, (q31_t)0x3f0f1640, (q31_t)0x3f099e6b, (q31_t)0x3f04266e, (q31_t)0x3efeae4a, (q31_t)0x3ef93600, (q31_t)0x3ef3bd8f, (q31_t)0x3eee44f7,
+  (q31_t)0x3ee8cc38, (q31_t)0x3ee35352, (q31_t)0x3eddda46, (q31_t)0x3ed86113, (q31_t)0x3ed2e7b9, (q31_t)0x3ecd6e38, (q31_t)0x3ec7f491, (q31_t)0x3ec27ac2,
+  (q31_t)0x3ebd00cd, (q31_t)0x3eb786b2, (q31_t)0x3eb20c6f, (q31_t)0x3eac9206, (q31_t)0x3ea71777, (q31_t)0x3ea19cc1, (q31_t)0x3e9c21e4, (q31_t)0x3e96a6e0,
+  (q31_t)0x3e912bb6, (q31_t)0x3e8bb065, (q31_t)0x3e8634ee, (q31_t)0x3e80b950, (q31_t)0x3e7b3d8c, (q31_t)0x3e75c1a1, (q31_t)0x3e70458f, (q31_t)0x3e6ac957,
+  (q31_t)0x3e654cf8, (q31_t)0x3e5fd073, (q31_t)0x3e5a53c8, (q31_t)0x3e54d6f6, (q31_t)0x3e4f59fe, (q31_t)0x3e49dcdf, (q31_t)0x3e445f99, (q31_t)0x3e3ee22e,
+  (q31_t)0x3e39649c, (q31_t)0x3e33e6e3, (q31_t)0x3e2e6904, (q31_t)0x3e28eaff, (q31_t)0x3e236cd4, (q31_t)0x3e1dee82, (q31_t)0x3e18700a, (q31_t)0x3e12f16b,
+  (q31_t)0x3e0d72a6, (q31_t)0x3e07f3bb, (q31_t)0x3e0274aa, (q31_t)0x3dfcf572, (q31_t)0x3df77615, (q31_t)0x3df1f691, (q31_t)0x3dec76e6, (q31_t)0x3de6f716,
+  (q31_t)0x3de1771f, (q31_t)0x3ddbf703, (q31_t)0x3dd676c0, (q31_t)0x3dd0f656, (q31_t)0x3dcb75c7, (q31_t)0x3dc5f512, (q31_t)0x3dc07436, (q31_t)0x3dbaf335,
+  (q31_t)0x3db5720d, (q31_t)0x3daff0c0, (q31_t)0x3daa6f4c, (q31_t)0x3da4edb2, (q31_t)0x3d9f6bf2, (q31_t)0x3d99ea0d, (q31_t)0x3d946801, (q31_t)0x3d8ee5cf,
+  (q31_t)0x3d896377, (q31_t)0x3d83e0f9, (q31_t)0x3d7e5e56, (q31_t)0x3d78db8c, (q31_t)0x3d73589d, (q31_t)0x3d6dd587, (q31_t)0x3d68524c, (q31_t)0x3d62ceeb,
+  (q31_t)0x3d5d4b64, (q31_t)0x3d57c7b7, (q31_t)0x3d5243e4, (q31_t)0x3d4cbfeb, (q31_t)0x3d473bcd, (q31_t)0x3d41b789, (q31_t)0x3d3c331f, (q31_t)0x3d36ae8f,
+  (q31_t)0x3d3129da, (q31_t)0x3d2ba4fe, (q31_t)0x3d261ffd, (q31_t)0x3d209ad7, (q31_t)0x3d1b158a, (q31_t)0x3d159018, (q31_t)0x3d100a80, (q31_t)0x3d0a84c3,
+  (q31_t)0x3d04fee0, (q31_t)0x3cff78d7, (q31_t)0x3cf9f2a9, (q31_t)0x3cf46c55, (q31_t)0x3ceee5db, (q31_t)0x3ce95f3c, (q31_t)0x3ce3d877, (q31_t)0x3cde518d,
+  (q31_t)0x3cd8ca7d, (q31_t)0x3cd34347, (q31_t)0x3ccdbbed, (q31_t)0x3cc8346c, (q31_t)0x3cc2acc6, (q31_t)0x3cbd24fb, (q31_t)0x3cb79d0a, (q31_t)0x3cb214f4,
+  (q31_t)0x3cac8cb8, (q31_t)0x3ca70457, (q31_t)0x3ca17bd0, (q31_t)0x3c9bf324, (q31_t)0x3c966a53, (q31_t)0x3c90e15c, (q31_t)0x3c8b5840, (q31_t)0x3c85cefe,
+  (q31_t)0x3c804598, (q31_t)0x3c7abc0c, (q31_t)0x3c75325a, (q31_t)0x3c6fa883, (q31_t)0x3c6a1e87, (q31_t)0x3c649466, (q31_t)0x3c5f0a20, (q31_t)0x3c597fb4,
+  (q31_t)0x3c53f523, (q31_t)0x3c4e6a6d, (q31_t)0x3c48df91, (q31_t)0x3c435491, (q31_t)0x3c3dc96b, (q31_t)0x3c383e20, (q31_t)0x3c32b2b0, (q31_t)0x3c2d271b,
+  (q31_t)0x3c279b61, (q31_t)0x3c220f81, (q31_t)0x3c1c837d, (q31_t)0x3c16f753, (q31_t)0x3c116b04, (q31_t)0x3c0bde91, (q31_t)0x3c0651f8, (q31_t)0x3c00c53a,
+  (q31_t)0x3bfb3857, (q31_t)0x3bf5ab50, (q31_t)0x3bf01e23, (q31_t)0x3bea90d1, (q31_t)0x3be5035a, (q31_t)0x3bdf75bf, (q31_t)0x3bd9e7fe, (q31_t)0x3bd45a19,
+  (q31_t)0x3bcecc0e, (q31_t)0x3bc93ddf, (q31_t)0x3bc3af8b, (q31_t)0x3bbe2112, (q31_t)0x3bb89274, (q31_t)0x3bb303b1, (q31_t)0x3bad74c9, (q31_t)0x3ba7e5bd,
+  (q31_t)0x3ba2568c, (q31_t)0x3b9cc736, (q31_t)0x3b9737bb, (q31_t)0x3b91a81c, (q31_t)0x3b8c1857, (q31_t)0x3b86886e, (q31_t)0x3b80f861, (q31_t)0x3b7b682e,
+  (q31_t)0x3b75d7d7, (q31_t)0x3b70475c, (q31_t)0x3b6ab6bb, (q31_t)0x3b6525f6, (q31_t)0x3b5f950c, (q31_t)0x3b5a03fe, (q31_t)0x3b5472cb, (q31_t)0x3b4ee173,
+  (q31_t)0x3b494ff7, (q31_t)0x3b43be57, (q31_t)0x3b3e2c91, (q31_t)0x3b389aa8, (q31_t)0x3b330899, (q31_t)0x3b2d7666, (q31_t)0x3b27e40f, (q31_t)0x3b225193,
+  (q31_t)0x3b1cbef3, (q31_t)0x3b172c2e, (q31_t)0x3b119945, (q31_t)0x3b0c0637, (q31_t)0x3b067305, (q31_t)0x3b00dfaf, (q31_t)0x3afb4c34, (q31_t)0x3af5b894,
+  (q31_t)0x3af024d1, (q31_t)0x3aea90e9, (q31_t)0x3ae4fcdc, (q31_t)0x3adf68ac, (q31_t)0x3ad9d457, (q31_t)0x3ad43fdd, (q31_t)0x3aceab40, (q31_t)0x3ac9167e,
+  (q31_t)0x3ac38198, (q31_t)0x3abdec8d, (q31_t)0x3ab8575f, (q31_t)0x3ab2c20c, (q31_t)0x3aad2c95, (q31_t)0x3aa796fa, (q31_t)0x3aa2013a, (q31_t)0x3a9c6b57,
+  (q31_t)0x3a96d54f, (q31_t)0x3a913f23, (q31_t)0x3a8ba8d3, (q31_t)0x3a86125f, (q31_t)0x3a807bc7, (q31_t)0x3a7ae50a, (q31_t)0x3a754e2a, (q31_t)0x3a6fb726,
+  (q31_t)0x3a6a1ffd, (q31_t)0x3a6488b1, (q31_t)0x3a5ef140, (q31_t)0x3a5959ab, (q31_t)0x3a53c1f3, (q31_t)0x3a4e2a16, (q31_t)0x3a489216, (q31_t)0x3a42f9f2,
+  (q31_t)0x3a3d61a9, (q31_t)0x3a37c93d, (q31_t)0x3a3230ad, (q31_t)0x3a2c97f9, (q31_t)0x3a26ff21, (q31_t)0x3a216625, (q31_t)0x3a1bcd05, (q31_t)0x3a1633c1,
+  (q31_t)0x3a109a5a, (q31_t)0x3a0b00cf, (q31_t)0x3a056720, (q31_t)0x39ffcd4d, (q31_t)0x39fa3356, (q31_t)0x39f4993c, (q31_t)0x39eefefe, (q31_t)0x39e9649c,
+  (q31_t)0x39e3ca17, (q31_t)0x39de2f6d, (q31_t)0x39d894a0, (q31_t)0x39d2f9b0, (q31_t)0x39cd5e9b, (q31_t)0x39c7c363, (q31_t)0x39c22808, (q31_t)0x39bc8c89,
+  (q31_t)0x39b6f0e6, (q31_t)0x39b1551f, (q31_t)0x39abb935, (q31_t)0x39a61d28, (q31_t)0x39a080f6, (q31_t)0x399ae4a2, (q31_t)0x39954829, (q31_t)0x398fab8e,
+  (q31_t)0x398a0ece, (q31_t)0x398471ec, (q31_t)0x397ed4e5, (q31_t)0x397937bc, (q31_t)0x39739a6e, (q31_t)0x396dfcfe, (q31_t)0x39685f6a, (q31_t)0x3962c1b2,
+  (q31_t)0x395d23d7, (q31_t)0x395785d9, (q31_t)0x3951e7b8, (q31_t)0x394c4973, (q31_t)0x3946ab0a, (q31_t)0x39410c7f, (q31_t)0x393b6dd0, (q31_t)0x3935cefd,
+  (q31_t)0x39303008, (q31_t)0x392a90ef, (q31_t)0x3924f1b3, (q31_t)0x391f5254, (q31_t)0x3919b2d1, (q31_t)0x3914132b, (q31_t)0x390e7362, (q31_t)0x3908d376,
+  (q31_t)0x39033367, (q31_t)0x38fd9334, (q31_t)0x38f7f2de, (q31_t)0x38f25266, (q31_t)0x38ecb1ca, (q31_t)0x38e7110a, (q31_t)0x38e17028, (q31_t)0x38dbcf23,
+  (q31_t)0x38d62dfb, (q31_t)0x38d08caf, (q31_t)0x38caeb41, (q31_t)0x38c549af, (q31_t)0x38bfa7fb, (q31_t)0x38ba0623, (q31_t)0x38b46429, (q31_t)0x38aec20b,
+  (q31_t)0x38a91fcb, (q31_t)0x38a37d67, (q31_t)0x389ddae1, (q31_t)0x38983838, (q31_t)0x3892956c, (q31_t)0x388cf27d, (q31_t)0x38874f6b, (q31_t)0x3881ac36,
+  (q31_t)0x387c08de, (q31_t)0x38766564, (q31_t)0x3870c1c6, (q31_t)0x386b1e06, (q31_t)0x38657a23, (q31_t)0x385fd61d, (q31_t)0x385a31f5, (q31_t)0x38548daa,
+  (q31_t)0x384ee93b, (q31_t)0x384944ab, (q31_t)0x38439ff7, (q31_t)0x383dfb21, (q31_t)0x38385628, (q31_t)0x3832b10d, (q31_t)0x382d0bce, (q31_t)0x3827666d,
+  (q31_t)0x3821c0ea, (q31_t)0x381c1b44, (q31_t)0x3816757b, (q31_t)0x3810cf90, (q31_t)0x380b2982, (q31_t)0x38058351, (q31_t)0x37ffdcfe, (q31_t)0x37fa3688,
+  (q31_t)0x37f48ff0, (q31_t)0x37eee936, (q31_t)0x37e94259, (q31_t)0x37e39b59, (q31_t)0x37ddf437, (q31_t)0x37d84cf2, (q31_t)0x37d2a58b, (q31_t)0x37ccfe02,
+  (q31_t)0x37c75656, (q31_t)0x37c1ae87, (q31_t)0x37bc0697, (q31_t)0x37b65e84, (q31_t)0x37b0b64e, (q31_t)0x37ab0df6, (q31_t)0x37a5657c, (q31_t)0x379fbce0,
+  (q31_t)0x379a1421, (q31_t)0x37946b40, (q31_t)0x378ec23d, (q31_t)0x37891917, (q31_t)0x37836fcf, (q31_t)0x377dc665, (q31_t)0x37781cd9, (q31_t)0x3772732a,
+  (q31_t)0x376cc959, (q31_t)0x37671f66, (q31_t)0x37617551, (q31_t)0x375bcb1a, (q31_t)0x375620c1, (q31_t)0x37507645, (q31_t)0x374acba7, (q31_t)0x374520e7,
+  (q31_t)0x373f7606, (q31_t)0x3739cb02, (q31_t)0x37341fdc, (q31_t)0x372e7493, (q31_t)0x3728c929, (q31_t)0x37231d9d, (q31_t)0x371d71ef, (q31_t)0x3717c61f,
+  (q31_t)0x37121a2d, (q31_t)0x370c6e19, (q31_t)0x3706c1e2, (q31_t)0x3701158a, (q31_t)0x36fb6910, (q31_t)0x36f5bc75, (q31_t)0x36f00fb7, (q31_t)0x36ea62d7,
+  (q31_t)0x36e4b5d6, (q31_t)0x36df08b2, (q31_t)0x36d95b6d, (q31_t)0x36d3ae06, (q31_t)0x36ce007d, (q31_t)0x36c852d2, (q31_t)0x36c2a506, (q31_t)0x36bcf718,
+  (q31_t)0x36b74908, (q31_t)0x36b19ad6, (q31_t)0x36abec82, (q31_t)0x36a63e0d, (q31_t)0x36a08f76, (q31_t)0x369ae0bd, (q31_t)0x369531e3, (q31_t)0x368f82e7,
+  (q31_t)0x3689d3c9, (q31_t)0x3684248a, (q31_t)0x367e7529, (q31_t)0x3678c5a7, (q31_t)0x36731602, (q31_t)0x366d663d, (q31_t)0x3667b655, (q31_t)0x3662064c,
+  (q31_t)0x365c5622, (q31_t)0x3656a5d6, (q31_t)0x3650f569, (q31_t)0x364b44da, (q31_t)0x36459429, (q31_t)0x363fe357, (q31_t)0x363a3264, (q31_t)0x3634814f,
+  (q31_t)0x362ed019, (q31_t)0x36291ec1, (q31_t)0x36236d48, (q31_t)0x361dbbad, (q31_t)0x361809f1, (q31_t)0x36125814, (q31_t)0x360ca615, (q31_t)0x3606f3f5,
+  (q31_t)0x360141b4, (q31_t)0x35fb8f52, (q31_t)0x35f5dcce, (q31_t)0x35f02a28, (q31_t)0x35ea7762, (q31_t)0x35e4c47a, (q31_t)0x35df1171, (q31_t)0x35d95e47,
+  (q31_t)0x35d3aafc, (q31_t)0x35cdf78f, (q31_t)0x35c84401, (q31_t)0x35c29052, (q31_t)0x35bcdc82, (q31_t)0x35b72891, (q31_t)0x35b1747e, (q31_t)0x35abc04b,
+  (q31_t)0x35a60bf6, (q31_t)0x35a05781, (q31_t)0x359aa2ea, (q31_t)0x3594ee32, (q31_t)0x358f3959, (q31_t)0x3589845f, (q31_t)0x3583cf44, (q31_t)0x357e1a08,
+  (q31_t)0x357864ab, (q31_t)0x3572af2d, (q31_t)0x356cf98e, (q31_t)0x356743ce, (q31_t)0x35618ded, (q31_t)0x355bd7eb, (q31_t)0x355621c9, (q31_t)0x35506b85,
+  (q31_t)0x354ab520, (q31_t)0x3544fe9b, (q31_t)0x353f47f5, (q31_t)0x3539912e, (q31_t)0x3533da46, (q31_t)0x352e233d, (q31_t)0x35286c14, (q31_t)0x3522b4c9,
+  (q31_t)0x351cfd5e, (q31_t)0x351745d2, (q31_t)0x35118e26, (q31_t)0x350bd658, (q31_t)0x35061e6a, (q31_t)0x3500665c, (q31_t)0x34faae2c, (q31_t)0x34f4f5dc,
+  (q31_t)0x34ef3d6b, (q31_t)0x34e984da, (q31_t)0x34e3cc28, (q31_t)0x34de1355, (q31_t)0x34d85a62, (q31_t)0x34d2a14e, (q31_t)0x34cce819, (q31_t)0x34c72ec4,
+  (q31_t)0x34c1754e, (q31_t)0x34bbbbb8, (q31_t)0x34b60202, (q31_t)0x34b0482a, (q31_t)0x34aa8e33, (q31_t)0x34a4d41a, (q31_t)0x349f19e2, (q31_t)0x34995f88,
+  (q31_t)0x3493a50f, (q31_t)0x348dea75, (q31_t)0x34882fba, (q31_t)0x348274e0, (q31_t)0x347cb9e4, (q31_t)0x3476fec9, (q31_t)0x3471438d, (q31_t)0x346b8830,
+  (q31_t)0x3465ccb4, (q31_t)0x34601117, (q31_t)0x345a5559, (q31_t)0x3454997c, (q31_t)0x344edd7e, (q31_t)0x34492160, (q31_t)0x34436521, (q31_t)0x343da8c3,
+  (q31_t)0x3437ec44, (q31_t)0x34322fa5, (q31_t)0x342c72e6, (q31_t)0x3426b606, (q31_t)0x3420f907, (q31_t)0x341b3be7, (q31_t)0x34157ea7, (q31_t)0x340fc147,
+  (q31_t)0x340a03c7, (q31_t)0x34044626, (q31_t)0x33fe8866, (q31_t)0x33f8ca86, (q31_t)0x33f30c85, (q31_t)0x33ed4e65, (q31_t)0x33e79024, (q31_t)0x33e1d1c4,
+  (q31_t)0x33dc1343, (q31_t)0x33d654a2, (q31_t)0x33d095e2, (q31_t)0x33cad701, (q31_t)0x33c51801, (q31_t)0x33bf58e1, (q31_t)0x33b999a0, (q31_t)0x33b3da40,
+  (q31_t)0x33ae1ac0, (q31_t)0x33a85b20, (q31_t)0x33a29b60, (q31_t)0x339cdb81, (q31_t)0x33971b81, (q31_t)0x33915b62, (q31_t)0x338b9b22, (q31_t)0x3385dac4,
+  (q31_t)0x33801a45, (q31_t)0x337a59a6, (q31_t)0x337498e8, (q31_t)0x336ed80a, (q31_t)0x3369170c, (q31_t)0x336355ef, (q31_t)0x335d94b2, (q31_t)0x3357d355,
+  (q31_t)0x335211d8, (q31_t)0x334c503c, (q31_t)0x33468e80, (q31_t)0x3340cca5, (q31_t)0x333b0aaa, (q31_t)0x3335488f, (q31_t)0x332f8655, (q31_t)0x3329c3fb,
+  (q31_t)0x33240182, (q31_t)0x331e3ee9, (q31_t)0x33187c31, (q31_t)0x3312b959, (q31_t)0x330cf661, (q31_t)0x3307334a, (q31_t)0x33017014, (q31_t)0x32fbacbe,
+  (q31_t)0x32f5e948, (q31_t)0x32f025b4, (q31_t)0x32ea61ff, (q31_t)0x32e49e2c, (q31_t)0x32deda39, (q31_t)0x32d91626, (q31_t)0x32d351f5, (q31_t)0x32cd8da4,
+  (q31_t)0x32c7c933, (q31_t)0x32c204a3, (q31_t)0x32bc3ff4, (q31_t)0x32b67b26, (q31_t)0x32b0b638, (q31_t)0x32aaf12b, (q31_t)0x32a52bff, (q31_t)0x329f66b4,
+  (q31_t)0x3299a149, (q31_t)0x3293dbbf, (q31_t)0x328e1616, (q31_t)0x3288504e, (q31_t)0x32828a67, (q31_t)0x327cc460, (q31_t)0x3276fe3a, (q31_t)0x327137f6,
+  (q31_t)0x326b7192, (q31_t)0x3265ab0f, (q31_t)0x325fe46c, (q31_t)0x325a1dab, (q31_t)0x325456cb, (q31_t)0x324e8fcc, (q31_t)0x3248c8ad, (q31_t)0x32430170,
+  (q31_t)0x323d3a14, (q31_t)0x32377298, (q31_t)0x3231aafe, (q31_t)0x322be345, (q31_t)0x32261b6c, (q31_t)0x32205375, (q31_t)0x321a8b5f, (q31_t)0x3214c32a,
+  (q31_t)0x320efad6, (q31_t)0x32093263, (q31_t)0x320369d2, (q31_t)0x31fda121, (q31_t)0x31f7d852, (q31_t)0x31f20f64, (q31_t)0x31ec4657, (q31_t)0x31e67d2b,
+  (q31_t)0x31e0b3e0, (q31_t)0x31daea77, (q31_t)0x31d520ef, (q31_t)0x31cf5748, (q31_t)0x31c98d83, (q31_t)0x31c3c39e, (q31_t)0x31bdf99b, (q31_t)0x31b82f7a,
+  (q31_t)0x31b2653a, (q31_t)0x31ac9adb, (q31_t)0x31a6d05d, (q31_t)0x31a105c1, (q31_t)0x319b3b06, (q31_t)0x3195702d, (q31_t)0x318fa535, (q31_t)0x3189da1e,
+  (q31_t)0x31840ee9, (q31_t)0x317e4395, (q31_t)0x31787823, (q31_t)0x3172ac92, (q31_t)0x316ce0e3, (q31_t)0x31671515, (q31_t)0x31614929, (q31_t)0x315b7d1e,
+  (q31_t)0x3155b0f5, (q31_t)0x314fe4ae, (q31_t)0x314a1848, (q31_t)0x31444bc3, (q31_t)0x313e7f21, (q31_t)0x3138b260, (q31_t)0x3132e580, (q31_t)0x312d1882,
+  (q31_t)0x31274b66, (q31_t)0x31217e2c, (q31_t)0x311bb0d3, (q31_t)0x3115e35c, (q31_t)0x311015c6, (q31_t)0x310a4813, (q31_t)0x31047a41, (q31_t)0x30feac51,
+  (q31_t)0x30f8de42, (q31_t)0x30f31016, (q31_t)0x30ed41cb, (q31_t)0x30e77362, (q31_t)0x30e1a4db, (q31_t)0x30dbd636, (q31_t)0x30d60772, (q31_t)0x30d03891,
+  (q31_t)0x30ca6991, (q31_t)0x30c49a74, (q31_t)0x30becb38, (q31_t)0x30b8fbde, (q31_t)0x30b32c66, (q31_t)0x30ad5cd0, (q31_t)0x30a78d1c, (q31_t)0x30a1bd4a,
+  (q31_t)0x309bed5a, (q31_t)0x30961d4c, (q31_t)0x30904d20, (q31_t)0x308a7cd6, (q31_t)0x3084ac6e, (q31_t)0x307edbe9, (q31_t)0x30790b45, (q31_t)0x30733a83,
+  (q31_t)0x306d69a4, (q31_t)0x306798a7, (q31_t)0x3061c78b, (q31_t)0x305bf652, (q31_t)0x305624fb, (q31_t)0x30505387, (q31_t)0x304a81f4, (q31_t)0x3044b044,
+  (q31_t)0x303ede76, (q31_t)0x30390c8a, (q31_t)0x30333a80, (q31_t)0x302d6859, (q31_t)0x30279614, (q31_t)0x3021c3b1, (q31_t)0x301bf131, (q31_t)0x30161e93,
+  (q31_t)0x30104bd7, (q31_t)0x300a78fe, (q31_t)0x3004a607, (q31_t)0x2ffed2f2, (q31_t)0x2ff8ffc0, (q31_t)0x2ff32c70, (q31_t)0x2fed5902, (q31_t)0x2fe78577,
+  (q31_t)0x2fe1b1cf, (q31_t)0x2fdbde09, (q31_t)0x2fd60a25, (q31_t)0x2fd03624, (q31_t)0x2fca6206, (q31_t)0x2fc48dc9, (q31_t)0x2fbeb970, (q31_t)0x2fb8e4f9,
+  (q31_t)0x2fb31064, (q31_t)0x2fad3bb3, (q31_t)0x2fa766e3, (q31_t)0x2fa191f7, (q31_t)0x2f9bbced, (q31_t)0x2f95e7c5, (q31_t)0x2f901280, (q31_t)0x2f8a3d1e,
+  (q31_t)0x2f84679f, (q31_t)0x2f7e9202, (q31_t)0x2f78bc48, (q31_t)0x2f72e671, (q31_t)0x2f6d107c, (q31_t)0x2f673a6a, (q31_t)0x2f61643b, (q31_t)0x2f5b8def,
+  (q31_t)0x2f55b785, (q31_t)0x2f4fe0ff, (q31_t)0x2f4a0a5b, (q31_t)0x2f44339a, (q31_t)0x2f3e5cbb, (q31_t)0x2f3885c0, (q31_t)0x2f32aea8, (q31_t)0x2f2cd772,
+  (q31_t)0x2f27001f, (q31_t)0x2f2128af, (q31_t)0x2f1b5122, (q31_t)0x2f157979, (q31_t)0x2f0fa1b2, (q31_t)0x2f09c9ce, (q31_t)0x2f03f1cd, (q31_t)0x2efe19ae,
+  (q31_t)0x2ef84173, (q31_t)0x2ef2691b, (q31_t)0x2eec90a7, (q31_t)0x2ee6b815, (q31_t)0x2ee0df66, (q31_t)0x2edb069a, (q31_t)0x2ed52db1, (q31_t)0x2ecf54ac,
+  (q31_t)0x2ec97b89, (q31_t)0x2ec3a24a, (q31_t)0x2ebdc8ee, (q31_t)0x2eb7ef75, (q31_t)0x2eb215df, (q31_t)0x2eac3c2d, (q31_t)0x2ea6625d, (q31_t)0x2ea08871,
+  (q31_t)0x2e9aae68, (q31_t)0x2e94d443, (q31_t)0x2e8efa00, (q31_t)0x2e891fa1, (q31_t)0x2e834525, (q31_t)0x2e7d6a8d, (q31_t)0x2e778fd8, (q31_t)0x2e71b506,
+  (q31_t)0x2e6bda17, (q31_t)0x2e65ff0c, (q31_t)0x2e6023e5, (q31_t)0x2e5a48a0, (q31_t)0x2e546d3f, (q31_t)0x2e4e91c2, (q31_t)0x2e48b628, (q31_t)0x2e42da71,
+  (q31_t)0x2e3cfe9e, (q31_t)0x2e3722ae, (q31_t)0x2e3146a2, (q31_t)0x2e2b6a79, (q31_t)0x2e258e34, (q31_t)0x2e1fb1d3, (q31_t)0x2e19d554, (q31_t)0x2e13f8ba,
+  (q31_t)0x2e0e1c03, (q31_t)0x2e083f30, (q31_t)0x2e026240, (q31_t)0x2dfc8534, (q31_t)0x2df6a80b, (q31_t)0x2df0cac6, (q31_t)0x2deaed65, (q31_t)0x2de50fe8,
+  (q31_t)0x2ddf324e, (q31_t)0x2dd95498, (q31_t)0x2dd376c5, (q31_t)0x2dcd98d7, (q31_t)0x2dc7bacc, (q31_t)0x2dc1dca4, (q31_t)0x2dbbfe61, (q31_t)0x2db62001,
+  (q31_t)0x2db04186, (q31_t)0x2daa62ee, (q31_t)0x2da4843a, (q31_t)0x2d9ea569, (q31_t)0x2d98c67d, (q31_t)0x2d92e774, (q31_t)0x2d8d084f, (q31_t)0x2d87290f,
+  (q31_t)0x2d8149b2, (q31_t)0x2d7b6a39, (q31_t)0x2d758aa4, (q31_t)0x2d6faaf3, (q31_t)0x2d69cb26, (q31_t)0x2d63eb3d, (q31_t)0x2d5e0b38, (q31_t)0x2d582b17,
+  (q31_t)0x2d524ada, (q31_t)0x2d4c6a81, (q31_t)0x2d468a0c, (q31_t)0x2d40a97b, (q31_t)0x2d3ac8ce, (q31_t)0x2d34e805, (q31_t)0x2d2f0721, (q31_t)0x2d292620,
+  (q31_t)0x2d234504, (q31_t)0x2d1d63cc, (q31_t)0x2d178278, (q31_t)0x2d11a108, (q31_t)0x2d0bbf7d, (q31_t)0x2d05ddd5, (q31_t)0x2cfffc12, (q31_t)0x2cfa1a33,
+  (q31_t)0x2cf43839, (q31_t)0x2cee5622, (q31_t)0x2ce873f0, (q31_t)0x2ce291a2, (q31_t)0x2cdcaf39, (q31_t)0x2cd6ccb4, (q31_t)0x2cd0ea13, (q31_t)0x2ccb0756,
+  (q31_t)0x2cc5247e, (q31_t)0x2cbf418b, (q31_t)0x2cb95e7b, (q31_t)0x2cb37b51, (q31_t)0x2cad980a, (q31_t)0x2ca7b4a8, (q31_t)0x2ca1d12a, (q31_t)0x2c9bed91,
+  (q31_t)0x2c9609dd, (q31_t)0x2c90260d, (q31_t)0x2c8a4221, (q31_t)0x2c845e1a, (q31_t)0x2c7e79f7, (q31_t)0x2c7895b9, (q31_t)0x2c72b160, (q31_t)0x2c6ccceb,
+  (q31_t)0x2c66e85b, (q31_t)0x2c6103af, (q31_t)0x2c5b1ee8, (q31_t)0x2c553a06, (q31_t)0x2c4f5508, (q31_t)0x2c496fef, (q31_t)0x2c438abb, (q31_t)0x2c3da56b,
+  (q31_t)0x2c37c000, (q31_t)0x2c31da7a, (q31_t)0x2c2bf4d8, (q31_t)0x2c260f1c, (q31_t)0x2c202944, (q31_t)0x2c1a4351, (q31_t)0x2c145d42, (q31_t)0x2c0e7719,
+  (q31_t)0x2c0890d4, (q31_t)0x2c02aa74, (q31_t)0x2bfcc3f9, (q31_t)0x2bf6dd63, (q31_t)0x2bf0f6b1, (q31_t)0x2beb0fe5, (q31_t)0x2be528fd, (q31_t)0x2bdf41fb,
+  (q31_t)0x2bd95add, (q31_t)0x2bd373a4, (q31_t)0x2bcd8c51, (q31_t)0x2bc7a4e2, (q31_t)0x2bc1bd58, (q31_t)0x2bbbd5b3, (q31_t)0x2bb5edf4, (q31_t)0x2bb00619,
+  (q31_t)0x2baa1e23, (q31_t)0x2ba43613, (q31_t)0x2b9e4de7, (q31_t)0x2b9865a1, (q31_t)0x2b927d3f, (q31_t)0x2b8c94c3, (q31_t)0x2b86ac2c, (q31_t)0x2b80c37a,
+  (q31_t)0x2b7adaae, (q31_t)0x2b74f1c6, (q31_t)0x2b6f08c4, (q31_t)0x2b691fa6, (q31_t)0x2b63366f, (q31_t)0x2b5d4d1c, (q31_t)0x2b5763ae, (q31_t)0x2b517a26,
+  (q31_t)0x2b4b9083, (q31_t)0x2b45a6c6, (q31_t)0x2b3fbced, (q31_t)0x2b39d2fa, (q31_t)0x2b33e8ed, (q31_t)0x2b2dfec5, (q31_t)0x2b281482, (q31_t)0x2b222a24,
+  (q31_t)0x2b1c3fac, (q31_t)0x2b165519, (q31_t)0x2b106a6c, (q31_t)0x2b0a7fa4, (q31_t)0x2b0494c2, (q31_t)0x2afea9c5, (q31_t)0x2af8bead, (q31_t)0x2af2d37b,
+  (q31_t)0x2aece82f, (q31_t)0x2ae6fcc8, (q31_t)0x2ae11146, (q31_t)0x2adb25aa, (q31_t)0x2ad539f4, (q31_t)0x2acf4e23, (q31_t)0x2ac96238, (q31_t)0x2ac37633,
+  (q31_t)0x2abd8a13, (q31_t)0x2ab79dd8, (q31_t)0x2ab1b184, (q31_t)0x2aabc515, (q31_t)0x2aa5d88b, (q31_t)0x2a9febe8, (q31_t)0x2a99ff2a, (q31_t)0x2a941252,
+  (q31_t)0x2a8e255f, (q31_t)0x2a883853, (q31_t)0x2a824b2c, (q31_t)0x2a7c5deb, (q31_t)0x2a76708f, (q31_t)0x2a70831a, (q31_t)0x2a6a958a, (q31_t)0x2a64a7e0,
+  (q31_t)0x2a5eba1c, (q31_t)0x2a58cc3e, (q31_t)0x2a52de46, (q31_t)0x2a4cf033, (q31_t)0x2a470207, (q31_t)0x2a4113c0, (q31_t)0x2a3b2560, (q31_t)0x2a3536e5,
+  (q31_t)0x2a2f4850, (q31_t)0x2a2959a1, (q31_t)0x2a236ad9, (q31_t)0x2a1d7bf6, (q31_t)0x2a178cf9, (q31_t)0x2a119de2, (q31_t)0x2a0baeb2, (q31_t)0x2a05bf67,
+  (q31_t)0x29ffd003, (q31_t)0x29f9e084, (q31_t)0x29f3f0ec, (q31_t)0x29ee013a, (q31_t)0x29e8116e, (q31_t)0x29e22188, (q31_t)0x29dc3188, (q31_t)0x29d6416f,
+  (q31_t)0x29d0513b, (q31_t)0x29ca60ee, (q31_t)0x29c47087, (q31_t)0x29be8007, (q31_t)0x29b88f6c, (q31_t)0x29b29eb8, (q31_t)0x29acadea, (q31_t)0x29a6bd02,
+  (q31_t)0x29a0cc01, (q31_t)0x299adae6, (q31_t)0x2994e9b1, (q31_t)0x298ef863, (q31_t)0x298906fb, (q31_t)0x2983157a, (q31_t)0x297d23df, (q31_t)0x2977322a,
+  (q31_t)0x2971405b, (q31_t)0x296b4e74, (q31_t)0x29655c72, (q31_t)0x295f6a57, (q31_t)0x29597823, (q31_t)0x295385d5, (q31_t)0x294d936d, (q31_t)0x2947a0ec,
+  (q31_t)0x2941ae52, (q31_t)0x293bbb9e, (q31_t)0x2935c8d1, (q31_t)0x292fd5ea, (q31_t)0x2929e2ea, (q31_t)0x2923efd0, (q31_t)0x291dfc9d, (q31_t)0x29180951,
+  (q31_t)0x291215eb, (q31_t)0x290c226c, (q31_t)0x29062ed4, (q31_t)0x29003b23, (q31_t)0x28fa4758, (q31_t)0x28f45374, (q31_t)0x28ee5f76, (q31_t)0x28e86b5f,
+  (q31_t)0x28e27730, (q31_t)0x28dc82e6, (q31_t)0x28d68e84, (q31_t)0x28d09a09, (q31_t)0x28caa574, (q31_t)0x28c4b0c6, (q31_t)0x28bebbff, (q31_t)0x28b8c71f,
+  (q31_t)0x28b2d226, (q31_t)0x28acdd13, (q31_t)0x28a6e7e8, (q31_t)0x28a0f2a3, (q31_t)0x289afd46, (q31_t)0x289507cf, (q31_t)0x288f123f, (q31_t)0x28891c97,
+  (q31_t)0x288326d5, (q31_t)0x287d30fa, (q31_t)0x28773b07, (q31_t)0x287144fa, (q31_t)0x286b4ed5, (q31_t)0x28655896, (q31_t)0x285f623f, (q31_t)0x28596bce,
+  (q31_t)0x28537545, (q31_t)0x284d7ea3, (q31_t)0x284787e8, (q31_t)0x28419114, (q31_t)0x283b9a28, (q31_t)0x2835a322, (q31_t)0x282fac04, (q31_t)0x2829b4cd,
+  (q31_t)0x2823bd7d, (q31_t)0x281dc615, (q31_t)0x2817ce93, (q31_t)0x2811d6f9, (q31_t)0x280bdf46, (q31_t)0x2805e77b, (q31_t)0x27ffef97, (q31_t)0x27f9f79a,
+  (q31_t)0x27f3ff85, (q31_t)0x27ee0756, (q31_t)0x27e80f10, (q31_t)0x27e216b0, (q31_t)0x27dc1e38, (q31_t)0x27d625a8, (q31_t)0x27d02cff, (q31_t)0x27ca343d,
+  (q31_t)0x27c43b63, (q31_t)0x27be4270, (q31_t)0x27b84965, (q31_t)0x27b25041, (q31_t)0x27ac5705, (q31_t)0x27a65db0, (q31_t)0x27a06443, (q31_t)0x279a6abd,
+  (q31_t)0x2794711f, (q31_t)0x278e7768, (q31_t)0x27887d99, (q31_t)0x278283b2, (q31_t)0x277c89b3, (q31_t)0x27768f9b, (q31_t)0x2770956a, (q31_t)0x276a9b21,
+  (q31_t)0x2764a0c0, (q31_t)0x275ea647, (q31_t)0x2758abb6, (q31_t)0x2752b10c, (q31_t)0x274cb64a, (q31_t)0x2746bb6f, (q31_t)0x2740c07d, (q31_t)0x273ac572,
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+  (q31_t)0x2704edd2, (q31_t)0x26fef1d5, (q31_t)0x26f8f5c1, (q31_t)0x26f2f995, (q31_t)0x26ecfd51, (q31_t)0x26e700f5, (q31_t)0x26e10480, (q31_t)0x26db07f4,
+  (q31_t)0x26d50b50, (q31_t)0x26cf0e94, (q31_t)0x26c911c0, (q31_t)0x26c314d4, (q31_t)0x26bd17d0, (q31_t)0x26b71ab4, (q31_t)0x26b11d80, (q31_t)0x26ab2034,
+  (q31_t)0x26a522d1, (q31_t)0x269f2556, (q31_t)0x269927c3, (q31_t)0x26932a18, (q31_t)0x268d2c55, (q31_t)0x26872e7b, (q31_t)0x26813088, (q31_t)0x267b327e,
+  (q31_t)0x2675345d, (q31_t)0x266f3623, (q31_t)0x266937d2, (q31_t)0x26633969, (q31_t)0x265d3ae9, (q31_t)0x26573c50, (q31_t)0x26513da1, (q31_t)0x264b3ed9,
+  (q31_t)0x26453ffa, (q31_t)0x263f4103, (q31_t)0x263941f5, (q31_t)0x263342cf, (q31_t)0x262d4392, (q31_t)0x2627443d, (q31_t)0x262144d0, (q31_t)0x261b454c,
+  (q31_t)0x261545b0, (q31_t)0x260f45fd, (q31_t)0x26094633, (q31_t)0x26034651, (q31_t)0x25fd4657, (q31_t)0x25f74646, (q31_t)0x25f1461e, (q31_t)0x25eb45de,
+  (q31_t)0x25e54587, (q31_t)0x25df4519, (q31_t)0x25d94493, (q31_t)0x25d343f6, (q31_t)0x25cd4341, (q31_t)0x25c74276, (q31_t)0x25c14192, (q31_t)0x25bb4098,
+  (q31_t)0x25b53f86, (q31_t)0x25af3e5d, (q31_t)0x25a93d1d, (q31_t)0x25a33bc6, (q31_t)0x259d3a57, (q31_t)0x259738d1, (q31_t)0x25913734, (q31_t)0x258b3580,
+  (q31_t)0x258533b5, (q31_t)0x257f31d2, (q31_t)0x25792fd8, (q31_t)0x25732dc8, (q31_t)0x256d2ba0, (q31_t)0x25672961, (q31_t)0x2561270b, (q31_t)0x255b249e,
+  (q31_t)0x2555221a, (q31_t)0x254f1f7e, (q31_t)0x25491ccc, (q31_t)0x25431a03, (q31_t)0x253d1723, (q31_t)0x2537142c, (q31_t)0x2531111e, (q31_t)0x252b0df9,
+  (q31_t)0x25250abd, (q31_t)0x251f076a, (q31_t)0x25190400, (q31_t)0x25130080, (q31_t)0x250cfce8, (q31_t)0x2506f93a, (q31_t)0x2500f574, (q31_t)0x24faf198,
+  (q31_t)0x24f4eda6, (q31_t)0x24eee99c, (q31_t)0x24e8e57c, (q31_t)0x24e2e144, (q31_t)0x24dcdcf6, (q31_t)0x24d6d892, (q31_t)0x24d0d416, (q31_t)0x24cacf84,
+  (q31_t)0x24c4cadb, (q31_t)0x24bec61c, (q31_t)0x24b8c146, (q31_t)0x24b2bc59, (q31_t)0x24acb756, (q31_t)0x24a6b23b, (q31_t)0x24a0ad0b, (q31_t)0x249aa7c4,
+  (q31_t)0x2494a266, (q31_t)0x248e9cf1, (q31_t)0x24889766, (q31_t)0x248291c5, (q31_t)0x247c8c0d, (q31_t)0x2476863e, (q31_t)0x24708059, (q31_t)0x246a7a5e,
+  (q31_t)0x2464744c, (q31_t)0x245e6e23, (q31_t)0x245867e4, (q31_t)0x2452618f, (q31_t)0x244c5b24, (q31_t)0x244654a1, (q31_t)0x24404e09, (q31_t)0x243a475a,
+  (q31_t)0x24344095, (q31_t)0x242e39ba, (q31_t)0x242832c8, (q31_t)0x24222bc0, (q31_t)0x241c24a1, (q31_t)0x24161d6d, (q31_t)0x24101622, (q31_t)0x240a0ec1,
+  (q31_t)0x24040749, (q31_t)0x23fdffbc, (q31_t)0x23f7f818, (q31_t)0x23f1f05e, (q31_t)0x23ebe88e, (q31_t)0x23e5e0a7, (q31_t)0x23dfd8ab, (q31_t)0x23d9d098,
+  (q31_t)0x23d3c86f, (q31_t)0x23cdc031, (q31_t)0x23c7b7dc, (q31_t)0x23c1af71, (q31_t)0x23bba6f0, (q31_t)0x23b59e59, (q31_t)0x23af95ac, (q31_t)0x23a98ce8,
+  (q31_t)0x23a3840f, (q31_t)0x239d7b20, (q31_t)0x2397721b, (q31_t)0x23916900, (q31_t)0x238b5fcf, (q31_t)0x23855688, (q31_t)0x237f4d2b, (q31_t)0x237943b9,
+  (q31_t)0x23733a30, (q31_t)0x236d3092, (q31_t)0x236726dd, (q31_t)0x23611d13, (q31_t)0x235b1333, (q31_t)0x2355093e, (q31_t)0x234eff32, (q31_t)0x2348f511,
+  (q31_t)0x2342eada, (q31_t)0x233ce08d, (q31_t)0x2336d62a, (q31_t)0x2330cbb2, (q31_t)0x232ac124, (q31_t)0x2324b680, (q31_t)0x231eabc7, (q31_t)0x2318a0f8,
+  (q31_t)0x23129613, (q31_t)0x230c8b19, (q31_t)0x23068009, (q31_t)0x230074e3, (q31_t)0x22fa69a8, (q31_t)0x22f45e57, (q31_t)0x22ee52f1, (q31_t)0x22e84775,
+  (q31_t)0x22e23be4, (q31_t)0x22dc303d, (q31_t)0x22d62480, (q31_t)0x22d018ae, (q31_t)0x22ca0cc7, (q31_t)0x22c400ca, (q31_t)0x22bdf4b8, (q31_t)0x22b7e890,
+  (q31_t)0x22b1dc53, (q31_t)0x22abd001, (q31_t)0x22a5c399, (q31_t)0x229fb71b, (q31_t)0x2299aa89, (q31_t)0x22939de1, (q31_t)0x228d9123, (q31_t)0x22878451,
+  (q31_t)0x22817769, (q31_t)0x227b6a6c, (q31_t)0x22755d59, (q31_t)0x226f5032, (q31_t)0x226942f5, (q31_t)0x226335a2, (q31_t)0x225d283b, (q31_t)0x22571abe,
+  (q31_t)0x22510d2d, (q31_t)0x224aff86, (q31_t)0x2244f1c9, (q31_t)0x223ee3f8, (q31_t)0x2238d612, (q31_t)0x2232c816, (q31_t)0x222cba06, (q31_t)0x2226abe0,
+  (q31_t)0x22209da5, (q31_t)0x221a8f56, (q31_t)0x221480f1, (q31_t)0x220e7277, (q31_t)0x220863e8, (q31_t)0x22025544, (q31_t)0x21fc468b, (q31_t)0x21f637be,
+  (q31_t)0x21f028db, (q31_t)0x21ea19e3, (q31_t)0x21e40ad7, (q31_t)0x21ddfbb5, (q31_t)0x21d7ec7f, (q31_t)0x21d1dd34, (q31_t)0x21cbcdd3, (q31_t)0x21c5be5e,
+  (q31_t)0x21bfaed5, (q31_t)0x21b99f36, (q31_t)0x21b38f83, (q31_t)0x21ad7fba, (q31_t)0x21a76fdd, (q31_t)0x21a15fec, (q31_t)0x219b4fe5, (q31_t)0x21953fca,
+  (q31_t)0x218f2f9a, (q31_t)0x21891f55, (q31_t)0x21830efc, (q31_t)0x217cfe8e, (q31_t)0x2176ee0b, (q31_t)0x2170dd74, (q31_t)0x216accc8, (q31_t)0x2164bc08,
+  (q31_t)0x215eab33, (q31_t)0x21589a49, (q31_t)0x2152894b, (q31_t)0x214c7838, (q31_t)0x21466710, (q31_t)0x214055d4, (q31_t)0x213a4484, (q31_t)0x2134331f,
+  (q31_t)0x212e21a6, (q31_t)0x21281018, (q31_t)0x2121fe76, (q31_t)0x211becbf, (q31_t)0x2115daf4, (q31_t)0x210fc914, (q31_t)0x2109b720, (q31_t)0x2103a518,
+  (q31_t)0x20fd92fb, (q31_t)0x20f780ca, (q31_t)0x20f16e84, (q31_t)0x20eb5c2b, (q31_t)0x20e549bd, (q31_t)0x20df373a, (q31_t)0x20d924a4, (q31_t)0x20d311f9,
+  (q31_t)0x20ccff3a, (q31_t)0x20c6ec66, (q31_t)0x20c0d97f, (q31_t)0x20bac683, (q31_t)0x20b4b373, (q31_t)0x20aea04f, (q31_t)0x20a88d17, (q31_t)0x20a279ca,
+  (q31_t)0x209c666a, (q31_t)0x209652f5, (q31_t)0x20903f6c, (q31_t)0x208a2bcf, (q31_t)0x2084181e, (q31_t)0x207e0459, (q31_t)0x2077f080, (q31_t)0x2071dc93,
+  (q31_t)0x206bc892, (q31_t)0x2065b47d, (q31_t)0x205fa054, (q31_t)0x20598c17, (q31_t)0x205377c6, (q31_t)0x204d6361, (q31_t)0x20474ee8, (q31_t)0x20413a5b,
+  (q31_t)0x203b25bb, (q31_t)0x20351106, (q31_t)0x202efc3e, (q31_t)0x2028e761, (q31_t)0x2022d271, (q31_t)0x201cbd6d, (q31_t)0x2016a856, (q31_t)0x2010932a,
+  (q31_t)0x200a7deb, (q31_t)0x20046898, (q31_t)0x1ffe5331, (q31_t)0x1ff83db6, (q31_t)0x1ff22828, (q31_t)0x1fec1286, (q31_t)0x1fe5fcd0, (q31_t)0x1fdfe707,
+  (q31_t)0x1fd9d12a, (q31_t)0x1fd3bb39, (q31_t)0x1fcda535, (q31_t)0x1fc78f1d, (q31_t)0x1fc178f1, (q31_t)0x1fbb62b2, (q31_t)0x1fb54c60, (q31_t)0x1faf35f9,
+  (q31_t)0x1fa91f80, (q31_t)0x1fa308f2, (q31_t)0x1f9cf252, (q31_t)0x1f96db9d, (q31_t)0x1f90c4d5, (q31_t)0x1f8aadfa, (q31_t)0x1f84970b, (q31_t)0x1f7e8009,
+  (q31_t)0x1f7868f4, (q31_t)0x1f7251ca, (q31_t)0x1f6c3a8e, (q31_t)0x1f66233e, (q31_t)0x1f600bdb, (q31_t)0x1f59f465, (q31_t)0x1f53dcdb, (q31_t)0x1f4dc53d,
+  (q31_t)0x1f47ad8d, (q31_t)0x1f4195c9, (q31_t)0x1f3b7df2, (q31_t)0x1f356608, (q31_t)0x1f2f4e0a, (q31_t)0x1f2935f9, (q31_t)0x1f231dd5, (q31_t)0x1f1d059e,
+  (q31_t)0x1f16ed54, (q31_t)0x1f10d4f6, (q31_t)0x1f0abc85, (q31_t)0x1f04a401, (q31_t)0x1efe8b6a, (q31_t)0x1ef872c0, (q31_t)0x1ef25a03, (q31_t)0x1eec4132,
+  (q31_t)0x1ee6284f, (q31_t)0x1ee00f58, (q31_t)0x1ed9f64f, (q31_t)0x1ed3dd32, (q31_t)0x1ecdc402, (q31_t)0x1ec7aac0, (q31_t)0x1ec1916a, (q31_t)0x1ebb7802,
+  (q31_t)0x1eb55e86, (q31_t)0x1eaf44f8, (q31_t)0x1ea92b56, (q31_t)0x1ea311a2, (q31_t)0x1e9cf7db, (q31_t)0x1e96de01, (q31_t)0x1e90c414, (q31_t)0x1e8aaa14,
+  (q31_t)0x1e849001, (q31_t)0x1e7e75dc, (q31_t)0x1e785ba3, (q31_t)0x1e724158, (q31_t)0x1e6c26fa, (q31_t)0x1e660c8a, (q31_t)0x1e5ff206, (q31_t)0x1e59d770,
+  (q31_t)0x1e53bcc7, (q31_t)0x1e4da20c, (q31_t)0x1e47873d, (q31_t)0x1e416c5d, (q31_t)0x1e3b5169, (q31_t)0x1e353663, (q31_t)0x1e2f1b4a, (q31_t)0x1e29001e,
+  (q31_t)0x1e22e4e0, (q31_t)0x1e1cc990, (q31_t)0x1e16ae2c, (q31_t)0x1e1092b6, (q31_t)0x1e0a772e, (q31_t)0x1e045b93, (q31_t)0x1dfe3fe6, (q31_t)0x1df82426,
+  (q31_t)0x1df20853, (q31_t)0x1debec6f, (q31_t)0x1de5d077, (q31_t)0x1ddfb46e, (q31_t)0x1dd99851, (q31_t)0x1dd37c23, (q31_t)0x1dcd5fe2, (q31_t)0x1dc7438e,
+  (q31_t)0x1dc12729, (q31_t)0x1dbb0ab0, (q31_t)0x1db4ee26, (q31_t)0x1daed189, (q31_t)0x1da8b4da, (q31_t)0x1da29819, (q31_t)0x1d9c7b45, (q31_t)0x1d965e5f,
+  (q31_t)0x1d904167, (q31_t)0x1d8a245c, (q31_t)0x1d840740, (q31_t)0x1d7dea11, (q31_t)0x1d77ccd0, (q31_t)0x1d71af7d, (q31_t)0x1d6b9217, (q31_t)0x1d6574a0,
+  (q31_t)0x1d5f5716, (q31_t)0x1d59397a, (q31_t)0x1d531bcc, (q31_t)0x1d4cfe0d, (q31_t)0x1d46e03a, (q31_t)0x1d40c256, (q31_t)0x1d3aa460, (q31_t)0x1d348658,
+  (q31_t)0x1d2e683e, (q31_t)0x1d284a12, (q31_t)0x1d222bd3, (q31_t)0x1d1c0d83, (q31_t)0x1d15ef21, (q31_t)0x1d0fd0ad, (q31_t)0x1d09b227, (q31_t)0x1d03938f,
+  (q31_t)0x1cfd74e5, (q31_t)0x1cf7562a, (q31_t)0x1cf1375c, (q31_t)0x1ceb187d, (q31_t)0x1ce4f98c, (q31_t)0x1cdeda89, (q31_t)0x1cd8bb74, (q31_t)0x1cd29c4d,
+  (q31_t)0x1ccc7d15, (q31_t)0x1cc65dca, (q31_t)0x1cc03e6e, (q31_t)0x1cba1f01, (q31_t)0x1cb3ff81, (q31_t)0x1caddff0, (q31_t)0x1ca7c04d, (q31_t)0x1ca1a099,
+  (q31_t)0x1c9b80d3, (q31_t)0x1c9560fb, (q31_t)0x1c8f4112, (q31_t)0x1c892117, (q31_t)0x1c83010a, (q31_t)0x1c7ce0ec, (q31_t)0x1c76c0bc, (q31_t)0x1c70a07b,
+  (q31_t)0x1c6a8028, (q31_t)0x1c645fc3, (q31_t)0x1c5e3f4d, (q31_t)0x1c581ec6, (q31_t)0x1c51fe2d, (q31_t)0x1c4bdd83, (q31_t)0x1c45bcc7, (q31_t)0x1c3f9bf9,
+  (q31_t)0x1c397b1b, (q31_t)0x1c335a2b, (q31_t)0x1c2d3929, (q31_t)0x1c271816, (q31_t)0x1c20f6f2, (q31_t)0x1c1ad5bc, (q31_t)0x1c14b475, (q31_t)0x1c0e931d,
+  (q31_t)0x1c0871b4, (q31_t)0x1c025039, (q31_t)0x1bfc2ead, (q31_t)0x1bf60d0f, (q31_t)0x1befeb60, (q31_t)0x1be9c9a1, (q31_t)0x1be3a7cf, (q31_t)0x1bdd85ed,
+  (q31_t)0x1bd763fa, (q31_t)0x1bd141f5, (q31_t)0x1bcb1fdf, (q31_t)0x1bc4fdb8, (q31_t)0x1bbedb80, (q31_t)0x1bb8b937, (q31_t)0x1bb296dc, (q31_t)0x1bac7471,
+  (q31_t)0x1ba651f5, (q31_t)0x1ba02f67, (q31_t)0x1b9a0cc8, (q31_t)0x1b93ea19, (q31_t)0x1b8dc758, (q31_t)0x1b87a487, (q31_t)0x1b8181a4, (q31_t)0x1b7b5eb0,
+  (q31_t)0x1b753bac, (q31_t)0x1b6f1897, (q31_t)0x1b68f570, (q31_t)0x1b62d239, (q31_t)0x1b5caef1, (q31_t)0x1b568b98, (q31_t)0x1b50682e, (q31_t)0x1b4a44b3,
+  (q31_t)0x1b442127, (q31_t)0x1b3dfd8b, (q31_t)0x1b37d9de, (q31_t)0x1b31b620, (q31_t)0x1b2b9251, (q31_t)0x1b256e71, (q31_t)0x1b1f4a81, (q31_t)0x1b192680,
+  (q31_t)0x1b13026e, (q31_t)0x1b0cde4c, (q31_t)0x1b06ba19, (q31_t)0x1b0095d5, (q31_t)0x1afa7180, (q31_t)0x1af44d1b, (q31_t)0x1aee28a6, (q31_t)0x1ae8041f,
+  (q31_t)0x1ae1df88, (q31_t)0x1adbbae1, (q31_t)0x1ad59629, (q31_t)0x1acf7160, (q31_t)0x1ac94c87, (q31_t)0x1ac3279d, (q31_t)0x1abd02a3, (q31_t)0x1ab6dd98,
+  (q31_t)0x1ab0b87d, (q31_t)0x1aaa9352, (q31_t)0x1aa46e16, (q31_t)0x1a9e48c9, (q31_t)0x1a98236c, (q31_t)0x1a91fdff, (q31_t)0x1a8bd881, (q31_t)0x1a85b2f3,
+  (q31_t)0x1a7f8d54, (q31_t)0x1a7967a6, (q31_t)0x1a7341e6, (q31_t)0x1a6d1c17, (q31_t)0x1a66f637, (q31_t)0x1a60d047, (q31_t)0x1a5aaa47, (q31_t)0x1a548436,
+  (q31_t)0x1a4e5e15, (q31_t)0x1a4837e4, (q31_t)0x1a4211a3, (q31_t)0x1a3beb52, (q31_t)0x1a35c4f0, (q31_t)0x1a2f9e7e, (q31_t)0x1a2977fc, (q31_t)0x1a23516a,
+  (q31_t)0x1a1d2ac8, (q31_t)0x1a170416, (q31_t)0x1a10dd53, (q31_t)0x1a0ab681, (q31_t)0x1a048f9e, (q31_t)0x19fe68ac, (q31_t)0x19f841a9, (q31_t)0x19f21a96,
+  (q31_t)0x19ebf374, (q31_t)0x19e5cc41, (q31_t)0x19dfa4fe, (q31_t)0x19d97dac, (q31_t)0x19d35649, (q31_t)0x19cd2ed7, (q31_t)0x19c70754, (q31_t)0x19c0dfc2,
+  (q31_t)0x19bab820, (q31_t)0x19b4906e, (q31_t)0x19ae68ac, (q31_t)0x19a840da, (q31_t)0x19a218f9, (q31_t)0x199bf107, (q31_t)0x1995c906, (q31_t)0x198fa0f5,
+  (q31_t)0x198978d4, (q31_t)0x198350a4, (q31_t)0x197d2864, (q31_t)0x19770014, (q31_t)0x1970d7b4, (q31_t)0x196aaf45, (q31_t)0x196486c6, (q31_t)0x195e5e37,
+  (q31_t)0x19583599, (q31_t)0x19520ceb, (q31_t)0x194be42d, (q31_t)0x1945bb60, (q31_t)0x193f9283, (q31_t)0x19396997, (q31_t)0x1933409b, (q31_t)0x192d178f,
+  (q31_t)0x1926ee74, (q31_t)0x1920c54a, (q31_t)0x191a9c10, (q31_t)0x191472c6, (q31_t)0x190e496d, (q31_t)0x19082005, (q31_t)0x1901f68d, (q31_t)0x18fbcd06,
+  (q31_t)0x18f5a36f, (q31_t)0x18ef79c9, (q31_t)0x18e95014, (q31_t)0x18e3264f, (q31_t)0x18dcfc7b, (q31_t)0x18d6d297, (q31_t)0x18d0a8a4, (q31_t)0x18ca7ea2,
+  (q31_t)0x18c45491, (q31_t)0x18be2a70, (q31_t)0x18b80040, (q31_t)0x18b1d601, (q31_t)0x18ababb2, (q31_t)0x18a58154, (q31_t)0x189f56e8, (q31_t)0x18992c6b,
+  (q31_t)0x189301e0, (q31_t)0x188cd746, (q31_t)0x1886ac9c, (q31_t)0x188081e4, (q31_t)0x187a571c, (q31_t)0x18742c45, (q31_t)0x186e015f, (q31_t)0x1867d66a,
+  (q31_t)0x1861ab66, (q31_t)0x185b8053, (q31_t)0x18555530, (q31_t)0x184f29ff, (q31_t)0x1848febf, (q31_t)0x1842d370, (q31_t)0x183ca812, (q31_t)0x18367ca5,
+  (q31_t)0x18305129, (q31_t)0x182a259e, (q31_t)0x1823fa04, (q31_t)0x181dce5b, (q31_t)0x1817a2a4, (q31_t)0x181176dd, (q31_t)0x180b4b08, (q31_t)0x18051f24,
+  (q31_t)0x17fef331, (q31_t)0x17f8c72f, (q31_t)0x17f29b1e, (q31_t)0x17ec6eff, (q31_t)0x17e642d1, (q31_t)0x17e01694, (q31_t)0x17d9ea49, (q31_t)0x17d3bdee,
+  (q31_t)0x17cd9186, (q31_t)0x17c7650e, (q31_t)0x17c13888, (q31_t)0x17bb0bf3, (q31_t)0x17b4df4f, (q31_t)0x17aeb29d, (q31_t)0x17a885dc, (q31_t)0x17a2590d,
+  (q31_t)0x179c2c2f, (q31_t)0x1795ff42, (q31_t)0x178fd247, (q31_t)0x1789a53d, (q31_t)0x17837825, (q31_t)0x177d4afe, (q31_t)0x17771dc9, (q31_t)0x1770f086,
+  (q31_t)0x176ac333, (q31_t)0x176495d3, (q31_t)0x175e6864, (q31_t)0x17583ae7, (q31_t)0x17520d5b, (q31_t)0x174bdfc1, (q31_t)0x1745b218, (q31_t)0x173f8461,
+  (q31_t)0x1739569c, (q31_t)0x173328c8, (q31_t)0x172cfae6, (q31_t)0x1726ccf6, (q31_t)0x17209ef8, (q31_t)0x171a70eb, (q31_t)0x171442d0, (q31_t)0x170e14a7,
+  (q31_t)0x1707e670, (q31_t)0x1701b82a, (q31_t)0x16fb89d6, (q31_t)0x16f55b74, (q31_t)0x16ef2d04, (q31_t)0x16e8fe86, (q31_t)0x16e2cff9, (q31_t)0x16dca15f,
+  (q31_t)0x16d672b6, (q31_t)0x16d043ff, (q31_t)0x16ca153a, (q31_t)0x16c3e667, (q31_t)0x16bdb787, (q31_t)0x16b78898, (q31_t)0x16b1599b, (q31_t)0x16ab2a90,
+  (q31_t)0x16a4fb77, (q31_t)0x169ecc50, (q31_t)0x16989d1b, (q31_t)0x16926dd8, (q31_t)0x168c3e87, (q31_t)0x16860f29, (q31_t)0x167fdfbc, (q31_t)0x1679b042,
+  (q31_t)0x167380ba, (q31_t)0x166d5123, (q31_t)0x1667217f, (q31_t)0x1660f1ce, (q31_t)0x165ac20e, (q31_t)0x16549241, (q31_t)0x164e6266, (q31_t)0x1648327d,
+  (q31_t)0x16420286, (q31_t)0x163bd282, (q31_t)0x1635a270, (q31_t)0x162f7250, (q31_t)0x16294222, (q31_t)0x162311e7, (q31_t)0x161ce19e, (q31_t)0x1616b148,
+  (q31_t)0x161080e4, (q31_t)0x160a5072, (q31_t)0x16041ff3, (q31_t)0x15fdef66, (q31_t)0x15f7becc, (q31_t)0x15f18e24, (q31_t)0x15eb5d6e, (q31_t)0x15e52cab,
+  (q31_t)0x15defbdb, (q31_t)0x15d8cafd, (q31_t)0x15d29a11, (q31_t)0x15cc6918, (q31_t)0x15c63812, (q31_t)0x15c006fe, (q31_t)0x15b9d5dd, (q31_t)0x15b3a4ae,
+  (q31_t)0x15ad7372, (q31_t)0x15a74228, (q31_t)0x15a110d2, (q31_t)0x159adf6e, (q31_t)0x1594adfc, (q31_t)0x158e7c7d, (q31_t)0x15884af1, (q31_t)0x15821958,
+  (q31_t)0x157be7b1, (q31_t)0x1575b5fe, (q31_t)0x156f843c, (q31_t)0x1569526e, (q31_t)0x15632093, (q31_t)0x155ceeaa, (q31_t)0x1556bcb4, (q31_t)0x15508ab1,
+  (q31_t)0x154a58a1, (q31_t)0x15442683, (q31_t)0x153df459, (q31_t)0x1537c221, (q31_t)0x15318fdd, (q31_t)0x152b5d8b, (q31_t)0x15252b2c, (q31_t)0x151ef8c0,
+  (q31_t)0x1518c648, (q31_t)0x151293c2, (q31_t)0x150c612f, (q31_t)0x15062e8f, (q31_t)0x14fffbe2, (q31_t)0x14f9c928, (q31_t)0x14f39662, (q31_t)0x14ed638e,
+  (q31_t)0x14e730ae, (q31_t)0x14e0fdc0, (q31_t)0x14dacac6, (q31_t)0x14d497bf, (q31_t)0x14ce64ab, (q31_t)0x14c8318a, (q31_t)0x14c1fe5c, (q31_t)0x14bbcb22,
+  (q31_t)0x14b597da, (q31_t)0x14af6486, (q31_t)0x14a93125, (q31_t)0x14a2fdb8, (q31_t)0x149cca3e, (q31_t)0x149696b7, (q31_t)0x14906323, (q31_t)0x148a2f82,
+  (q31_t)0x1483fbd5, (q31_t)0x147dc81c, (q31_t)0x14779455, (q31_t)0x14716082, (q31_t)0x146b2ca3, (q31_t)0x1464f8b7, (q31_t)0x145ec4be, (q31_t)0x145890b9,
+  (q31_t)0x14525ca7, (q31_t)0x144c2888, (q31_t)0x1445f45d, (q31_t)0x143fc026, (q31_t)0x14398be2, (q31_t)0x14335792, (q31_t)0x142d2335, (q31_t)0x1426eecb,
+  (q31_t)0x1420ba56, (q31_t)0x141a85d3, (q31_t)0x14145145, (q31_t)0x140e1caa, (q31_t)0x1407e803, (q31_t)0x1401b34f, (q31_t)0x13fb7e8f, (q31_t)0x13f549c3,
+  (q31_t)0x13ef14ea, (q31_t)0x13e8e005, (q31_t)0x13e2ab14, (q31_t)0x13dc7616, (q31_t)0x13d6410d, (q31_t)0x13d00bf7, (q31_t)0x13c9d6d4, (q31_t)0x13c3a1a6,
+  (q31_t)0x13bd6c6b, (q31_t)0x13b73725, (q31_t)0x13b101d2, (q31_t)0x13aacc73, (q31_t)0x13a49707, (q31_t)0x139e6190, (q31_t)0x13982c0d, (q31_t)0x1391f67d,
+  (q31_t)0x138bc0e1, (q31_t)0x13858b3a, (q31_t)0x137f5586, (q31_t)0x13791fc6, (q31_t)0x1372e9fb, (q31_t)0x136cb423, (q31_t)0x13667e3f, (q31_t)0x13604850,
+  (q31_t)0x135a1254, (q31_t)0x1353dc4c, (q31_t)0x134da639, (q31_t)0x1347701a, (q31_t)0x134139ee, (q31_t)0x133b03b7, (q31_t)0x1334cd74, (q31_t)0x132e9725,
+  (q31_t)0x132860ca, (q31_t)0x13222a64, (q31_t)0x131bf3f2, (q31_t)0x1315bd73, (q31_t)0x130f86ea, (q31_t)0x13095054, (q31_t)0x130319b3, (q31_t)0x12fce305,
+  (q31_t)0x12f6ac4d, (q31_t)0x12f07588, (q31_t)0x12ea3eb8, (q31_t)0x12e407dc, (q31_t)0x12ddd0f4, (q31_t)0x12d79a01, (q31_t)0x12d16303, (q31_t)0x12cb2bf8,
+  (q31_t)0x12c4f4e2, (q31_t)0x12bebdc1, (q31_t)0x12b88693, (q31_t)0x12b24f5b, (q31_t)0x12ac1817, (q31_t)0x12a5e0c7, (q31_t)0x129fa96c, (q31_t)0x12997205,
+  (q31_t)0x12933a93, (q31_t)0x128d0315, (q31_t)0x1286cb8c, (q31_t)0x128093f7, (q31_t)0x127a5c57, (q31_t)0x127424ac, (q31_t)0x126decf5, (q31_t)0x1267b533,
+  (q31_t)0x12617d66, (q31_t)0x125b458d, (q31_t)0x12550da9, (q31_t)0x124ed5ba, (q31_t)0x12489dbf, (q31_t)0x124265b9, (q31_t)0x123c2da8, (q31_t)0x1235f58b,
+  (q31_t)0x122fbd63, (q31_t)0x12298530, (q31_t)0x12234cf2, (q31_t)0x121d14a9, (q31_t)0x1216dc54, (q31_t)0x1210a3f5, (q31_t)0x120a6b8a, (q31_t)0x12043314,
+  (q31_t)0x11fdfa93, (q31_t)0x11f7c207, (q31_t)0x11f18970, (q31_t)0x11eb50cd, (q31_t)0x11e51820, (q31_t)0x11dedf68, (q31_t)0x11d8a6a4, (q31_t)0x11d26dd6,
+  (q31_t)0x11cc34fc, (q31_t)0x11c5fc18, (q31_t)0x11bfc329, (q31_t)0x11b98a2e, (q31_t)0x11b35129, (q31_t)0x11ad1819, (q31_t)0x11a6defe, (q31_t)0x11a0a5d8,
+  (q31_t)0x119a6ca7, (q31_t)0x1194336b, (q31_t)0x118dfa25, (q31_t)0x1187c0d3, (q31_t)0x11818777, (q31_t)0x117b4e10, (q31_t)0x1175149e, (q31_t)0x116edb22,
+  (q31_t)0x1168a19b, (q31_t)0x11626809, (q31_t)0x115c2e6c, (q31_t)0x1155f4c4, (q31_t)0x114fbb12, (q31_t)0x11498156, (q31_t)0x1143478e, (q31_t)0x113d0dbc,
+  (q31_t)0x1136d3df, (q31_t)0x113099f8, (q31_t)0x112a6006, (q31_t)0x11242609, (q31_t)0x111dec02, (q31_t)0x1117b1f0, (q31_t)0x111177d4, (q31_t)0x110b3dad,
+  (q31_t)0x1105037c, (q31_t)0x10fec940, (q31_t)0x10f88efa, (q31_t)0x10f254a9, (q31_t)0x10ec1a4e, (q31_t)0x10e5dfe8, (q31_t)0x10dfa578, (q31_t)0x10d96afe,
+  (q31_t)0x10d33079, (q31_t)0x10ccf5ea, (q31_t)0x10c6bb50, (q31_t)0x10c080ac, (q31_t)0x10ba45fe, (q31_t)0x10b40b45, (q31_t)0x10add082, (q31_t)0x10a795b5,
+  (q31_t)0x10a15ade, (q31_t)0x109b1ffc, (q31_t)0x1094e510, (q31_t)0x108eaa1a, (q31_t)0x10886f19, (q31_t)0x1082340f, (q31_t)0x107bf8fa, (q31_t)0x1075bddb,
+  (q31_t)0x106f82b2, (q31_t)0x1069477f, (q31_t)0x10630c41, (q31_t)0x105cd0fa, (q31_t)0x105695a8, (q31_t)0x10505a4d, (q31_t)0x104a1ee7, (q31_t)0x1043e377,
+  (q31_t)0x103da7fd, (q31_t)0x10376c79, (q31_t)0x103130ec, (q31_t)0x102af554, (q31_t)0x1024b9b2, (q31_t)0x101e7e06, (q31_t)0x10184251, (q31_t)0x10120691,
+  (q31_t)0x100bcac7, (q31_t)0x10058ef4, (q31_t)0xfff5317, (q31_t)0xff91730, (q31_t)0xff2db3e, (q31_t)0xfec9f44, (q31_t)0xfe6633f, (q31_t)0xfe02730,
+  (q31_t)0xfd9eb18, (q31_t)0xfd3aef6, (q31_t)0xfcd72ca, (q31_t)0xfc73695, (q31_t)0xfc0fa55, (q31_t)0xfbabe0c, (q31_t)0xfb481ba, (q31_t)0xfae455d,
+  (q31_t)0xfa808f7, (q31_t)0xfa1cc87, (q31_t)0xf9b900e, (q31_t)0xf95538b, (q31_t)0xf8f16fe, (q31_t)0xf88da68, (q31_t)0xf829dc8, (q31_t)0xf7c611f,
+  (q31_t)0xf76246c, (q31_t)0xf6fe7af, (q31_t)0xf69aae9, (q31_t)0xf636e1a, (q31_t)0xf5d3141, (q31_t)0xf56f45e, (q31_t)0xf50b773, (q31_t)0xf4a7a7d,
+  (q31_t)0xf443d7e, (q31_t)0xf3e0076, (q31_t)0xf37c365, (q31_t)0xf318649, (q31_t)0xf2b4925, (q31_t)0xf250bf7, (q31_t)0xf1ecec0, (q31_t)0xf189180,
+  (q31_t)0xf125436, (q31_t)0xf0c16e3, (q31_t)0xf05d987, (q31_t)0xeff9c21, (q31_t)0xef95eb2, (q31_t)0xef3213a, (q31_t)0xeece3b9, (q31_t)0xee6a62f,
+  (q31_t)0xee0689b, (q31_t)0xeda2afe, (q31_t)0xed3ed58, (q31_t)0xecdafa9, (q31_t)0xec771f1, (q31_t)0xec1342f, (q31_t)0xebaf665, (q31_t)0xeb4b891,
+  (q31_t)0xeae7ab4, (q31_t)0xea83ccf, (q31_t)0xea1fee0, (q31_t)0xe9bc0e8, (q31_t)0xe9582e7, (q31_t)0xe8f44dd, (q31_t)0xe8906cb, (q31_t)0xe82c8af,
+  (q31_t)0xe7c8a8a, (q31_t)0xe764c5c, (q31_t)0xe700e26, (q31_t)0xe69cfe6, (q31_t)0xe63919e, (q31_t)0xe5d534d, (q31_t)0xe5714f3, (q31_t)0xe50d690,
+  (q31_t)0xe4a9824, (q31_t)0xe4459af, (q31_t)0xe3e1b32, (q31_t)0xe37dcac, (q31_t)0xe319e1d, (q31_t)0xe2b5f85, (q31_t)0xe2520e5, (q31_t)0xe1ee23c,
+  (q31_t)0xe18a38a, (q31_t)0xe1264cf, (q31_t)0xe0c260c, (q31_t)0xe05e740, (q31_t)0xdffa86b, (q31_t)0xdf9698e, (q31_t)0xdf32aa8, (q31_t)0xdecebba,
+  (q31_t)0xde6acc3, (q31_t)0xde06dc3, (q31_t)0xdda2ebb, (q31_t)0xdd3efab, (q31_t)0xdcdb091, (q31_t)0xdc77170, (q31_t)0xdc13245, (q31_t)0xdbaf313,
+  (q31_t)0xdb4b3d7, (q31_t)0xdae7494, (q31_t)0xda83548, (q31_t)0xda1f5f3, (q31_t)0xd9bb696, (q31_t)0xd957731, (q31_t)0xd8f37c3, (q31_t)0xd88f84d,
+  (q31_t)0xd82b8cf, (q31_t)0xd7c7948, (q31_t)0xd7639b9, (q31_t)0xd6ffa22, (q31_t)0xd69ba82, (q31_t)0xd637ada, (q31_t)0xd5d3b2a, (q31_t)0xd56fb71,
+  (q31_t)0xd50bbb1, (q31_t)0xd4a7be8, (q31_t)0xd443c17, (q31_t)0xd3dfc3e, (q31_t)0xd37bc5c, (q31_t)0xd317c73, (q31_t)0xd2b3c81, (q31_t)0xd24fc87,
+  (q31_t)0xd1ebc85, (q31_t)0xd187c7b, (q31_t)0xd123c69, (q31_t)0xd0bfc4f, (q31_t)0xd05bc2d, (q31_t)0xcff7c02, (q31_t)0xcf93bd0, (q31_t)0xcf2fb96,
+  (q31_t)0xcecbb53, (q31_t)0xce67b09, (q31_t)0xce03ab7, (q31_t)0xcd9fa5d, (q31_t)0xcd3b9fb, (q31_t)0xccd7991, (q31_t)0xcc7391f, (q31_t)0xcc0f8a5,
+  (q31_t)0xcbab824, (q31_t)0xcb4779a, (q31_t)0xcae3709, (q31_t)0xca7f670, (q31_t)0xca1b5cf, (q31_t)0xc9b7526, (q31_t)0xc953475, (q31_t)0xc8ef3bd,
+  (q31_t)0xc88b2fd, (q31_t)0xc827235, (q31_t)0xc7c3166, (q31_t)0xc75f08f, (q31_t)0xc6fafb0, (q31_t)0xc696ec9, (q31_t)0xc632ddb, (q31_t)0xc5cece5,
+  (q31_t)0xc56abe8, (q31_t)0xc506ae3, (q31_t)0xc4a29d6, (q31_t)0xc43e8c2, (q31_t)0xc3da7a6, (q31_t)0xc376683, (q31_t)0xc312558, (q31_t)0xc2ae425,
+  (q31_t)0xc24a2eb, (q31_t)0xc1e61aa, (q31_t)0xc182061, (q31_t)0xc11df11, (q31_t)0xc0b9db9, (q31_t)0xc055c5a, (q31_t)0xbff1af3, (q31_t)0xbf8d985,
+  (q31_t)0xbf29810, (q31_t)0xbec5693, (q31_t)0xbe6150f, (q31_t)0xbdfd383, (q31_t)0xbd991f0, (q31_t)0xbd35056, (q31_t)0xbcd0eb5, (q31_t)0xbc6cd0c,
+  (q31_t)0xbc08b5c, (q31_t)0xbba49a5, (q31_t)0xbb407e7, (q31_t)0xbadc621, (q31_t)0xba78454, (q31_t)0xba14280, (q31_t)0xb9b00a5, (q31_t)0xb94bec2,
+  (q31_t)0xb8e7cd9, (q31_t)0xb883ae8, (q31_t)0xb81f8f0, (q31_t)0xb7bb6f2, (q31_t)0xb7574ec, (q31_t)0xb6f32df, (q31_t)0xb68f0cb, (q31_t)0xb62aeaf,
+  (q31_t)0xb5c6c8d, (q31_t)0xb562a64, (q31_t)0xb4fe834, (q31_t)0xb49a5fd, (q31_t)0xb4363bf, (q31_t)0xb3d217a, (q31_t)0xb36df2e, (q31_t)0xb309cdb,
+  (q31_t)0xb2a5a81, (q31_t)0xb241820, (q31_t)0xb1dd5b9, (q31_t)0xb17934b, (q31_t)0xb1150d5, (q31_t)0xb0b0e59, (q31_t)0xb04cbd6, (q31_t)0xafe894d,
+  (q31_t)0xaf846bc, (q31_t)0xaf20425, (q31_t)0xaebc187, (q31_t)0xae57ee2, (q31_t)0xadf3c37, (q31_t)0xad8f985, (q31_t)0xad2b6cc, (q31_t)0xacc740c,
+  (q31_t)0xac63146, (q31_t)0xabfee79, (q31_t)0xab9aba6, (q31_t)0xab368cc, (q31_t)0xaad25eb, (q31_t)0xaa6e304, (q31_t)0xaa0a016, (q31_t)0xa9a5d22,
+  (q31_t)0xa941a27, (q31_t)0xa8dd725, (q31_t)0xa87941d, (q31_t)0xa81510f, (q31_t)0xa7b0dfa, (q31_t)0xa74cadf, (q31_t)0xa6e87bd, (q31_t)0xa684495,
+  (q31_t)0xa620166, (q31_t)0xa5bbe31, (q31_t)0xa557af5, (q31_t)0xa4f37b3, (q31_t)0xa48f46b, (q31_t)0xa42b11d, (q31_t)0xa3c6dc8, (q31_t)0xa362a6d,
+  (q31_t)0xa2fe70b, (q31_t)0xa29a3a3, (q31_t)0xa236035, (q31_t)0xa1d1cc1, (q31_t)0xa16d946, (q31_t)0xa1095c6, (q31_t)0xa0a523f, (q31_t)0xa040eb1,
+  (q31_t)0x9fdcb1e, (q31_t)0x9f78784, (q31_t)0x9f143e5, (q31_t)0x9eb003f, (q31_t)0x9e4bc93, (q31_t)0x9de78e1, (q31_t)0x9d83529, (q31_t)0x9d1f16b,
+  (q31_t)0x9cbada7, (q31_t)0x9c569dc, (q31_t)0x9bf260c, (q31_t)0x9b8e236, (q31_t)0x9b29e59, (q31_t)0x9ac5a77, (q31_t)0x9a6168f, (q31_t)0x99fd2a0,
+  (q31_t)0x9998eac, (q31_t)0x9934ab2, (q31_t)0x98d06b2, (q31_t)0x986c2ac, (q31_t)0x9807ea1, (q31_t)0x97a3a8f, (q31_t)0x973f678, (q31_t)0x96db25a,
+  (q31_t)0x9676e37, (q31_t)0x9612a0e, (q31_t)0x95ae5e0, (q31_t)0x954a1ab, (q31_t)0x94e5d71, (q31_t)0x9481931, (q31_t)0x941d4eb, (q31_t)0x93b90a0,
+  (q31_t)0x9354c4f, (q31_t)0x92f07f8, (q31_t)0x928c39b, (q31_t)0x9227f39, (q31_t)0x91c3ad2, (q31_t)0x915f664, (q31_t)0x90fb1f1, (q31_t)0x9096d79,
+  (q31_t)0x90328fb, (q31_t)0x8fce477, (q31_t)0x8f69fee, (q31_t)0x8f05b5f, (q31_t)0x8ea16cb, (q31_t)0x8e3d231, (q31_t)0x8dd8d92, (q31_t)0x8d748ed,
+  (q31_t)0x8d10443, (q31_t)0x8cabf93, (q31_t)0x8c47ade, (q31_t)0x8be3624, (q31_t)0x8b7f164, (q31_t)0x8b1ac9f, (q31_t)0x8ab67d4, (q31_t)0x8a52304,
+  (q31_t)0x89ede2f, (q31_t)0x8989955, (q31_t)0x8925475, (q31_t)0x88c0f90, (q31_t)0x885caa5, (q31_t)0x87f85b5, (q31_t)0x87940c1, (q31_t)0x872fbc6,
+  (q31_t)0x86cb6c7, (q31_t)0x86671c2, (q31_t)0x8602cb9, (q31_t)0x859e7aa, (q31_t)0x853a296, (q31_t)0x84d5d7d, (q31_t)0x847185e, (q31_t)0x840d33b,
+  (q31_t)0x83a8e12, (q31_t)0x83448e5, (q31_t)0x82e03b2, (q31_t)0x827be7a, (q31_t)0x821793e, (q31_t)0x81b33fc, (q31_t)0x814eeb5, (q31_t)0x80ea969,
+  (q31_t)0x8086419, (q31_t)0x8021ec3, (q31_t)0x7fbd968, (q31_t)0x7f59409, (q31_t)0x7ef4ea4, (q31_t)0x7e9093b, (q31_t)0x7e2c3cd, (q31_t)0x7dc7e5a,
+  (q31_t)0x7d638e2, (q31_t)0x7cff365, (q31_t)0x7c9ade4, (q31_t)0x7c3685d, (q31_t)0x7bd22d2, (q31_t)0x7b6dd42, (q31_t)0x7b097ad, (q31_t)0x7aa5214,
+  (q31_t)0x7a40c76, (q31_t)0x79dc6d3, (q31_t)0x797812b, (q31_t)0x7913b7f, (q31_t)0x78af5ce, (q31_t)0x784b019, (q31_t)0x77e6a5e, (q31_t)0x77824a0,
+  (q31_t)0x771dedc, (q31_t)0x76b9914, (q31_t)0x7655347, (q31_t)0x75f0d76, (q31_t)0x758c7a1, (q31_t)0x75281c6, (q31_t)0x74c3be7, (q31_t)0x745f604,
+  (q31_t)0x73fb01c, (q31_t)0x7396a30, (q31_t)0x733243f, (q31_t)0x72cde4a, (q31_t)0x7269851, (q31_t)0x7205253, (q31_t)0x71a0c50, (q31_t)0x713c64a,
+  (q31_t)0x70d803f, (q31_t)0x7073a2f, (q31_t)0x700f41b, (q31_t)0x6faae03, (q31_t)0x6f467e7, (q31_t)0x6ee21c6, (q31_t)0x6e7dba1, (q31_t)0x6e19578,
+  (q31_t)0x6db4f4a, (q31_t)0x6d50919, (q31_t)0x6cec2e3, (q31_t)0x6c87ca9, (q31_t)0x6c2366a, (q31_t)0x6bbf028, (q31_t)0x6b5a9e1, (q31_t)0x6af6396,
+  (q31_t)0x6a91d47, (q31_t)0x6a2d6f4, (q31_t)0x69c909d, (q31_t)0x6964a42, (q31_t)0x69003e3, (q31_t)0x689bd80, (q31_t)0x6837718, (q31_t)0x67d30ad,
+  (q31_t)0x676ea3d, (q31_t)0x670a3ca, (q31_t)0x66a5d53, (q31_t)0x66416d8, (q31_t)0x65dd058, (q31_t)0x65789d5, (q31_t)0x651434e, (q31_t)0x64afcc3,
+  (q31_t)0x644b634, (q31_t)0x63e6fa2, (q31_t)0x638290b, (q31_t)0x631e271, (q31_t)0x62b9bd3, (q31_t)0x6255531, (q31_t)0x61f0e8b, (q31_t)0x618c7e1,
+  (q31_t)0x6128134, (q31_t)0x60c3a83, (q31_t)0x605f3ce, (q31_t)0x5ffad15, (q31_t)0x5f96659, (q31_t)0x5f31f99, (q31_t)0x5ecd8d6, (q31_t)0x5e6920e,
+  (q31_t)0x5e04b43, (q31_t)0x5da0475, (q31_t)0x5d3bda3, (q31_t)0x5cd76cd, (q31_t)0x5c72ff4, (q31_t)0x5c0e917, (q31_t)0x5baa237, (q31_t)0x5b45b53,
+  (q31_t)0x5ae146b, (q31_t)0x5a7cd80, (q31_t)0x5a18692, (q31_t)0x59b3fa0, (q31_t)0x594f8aa, (q31_t)0x58eb1b2, (q31_t)0x5886ab5, (q31_t)0x58223b6,
+  (q31_t)0x57bdcb3, (q31_t)0x57595ac, (q31_t)0x56f4ea2, (q31_t)0x5690795, (q31_t)0x562c085, (q31_t)0x55c7971, (q31_t)0x556325a, (q31_t)0x54feb3f,
+  (q31_t)0x549a422, (q31_t)0x5435d01, (q31_t)0x53d15dd, (q31_t)0x536ceb5, (q31_t)0x530878a, (q31_t)0x52a405d, (q31_t)0x523f92c, (q31_t)0x51db1f7,
+  (q31_t)0x5176ac0, (q31_t)0x5112385, (q31_t)0x50adc48, (q31_t)0x5049507, (q31_t)0x4fe4dc3, (q31_t)0x4f8067c, (q31_t)0x4f1bf32, (q31_t)0x4eb77e5,
+  (q31_t)0x4e53095, (q31_t)0x4dee942, (q31_t)0x4d8a1ec, (q31_t)0x4d25a93, (q31_t)0x4cc1337, (q31_t)0x4c5cbd8, (q31_t)0x4bf8476, (q31_t)0x4b93d11,
+  (q31_t)0x4b2f5a9, (q31_t)0x4acae3e, (q31_t)0x4a666d1, (q31_t)0x4a01f60, (q31_t)0x499d7ed, (q31_t)0x4939077, (q31_t)0x48d48fe, (q31_t)0x4870182,
+  (q31_t)0x480ba04, (q31_t)0x47a7282, (q31_t)0x4742afe, (q31_t)0x46de377, (q31_t)0x4679bee, (q31_t)0x4615461, (q31_t)0x45b0cd2, (q31_t)0x454c541,
+  (q31_t)0x44e7dac, (q31_t)0x4483615, (q31_t)0x441ee7c, (q31_t)0x43ba6df, (q31_t)0x4355f40, (q31_t)0x42f179f, (q31_t)0x428cffb, (q31_t)0x4228854,
+  (q31_t)0x41c40ab, (q31_t)0x415f8ff, (q31_t)0x40fb151, (q31_t)0x40969a0, (q31_t)0x40321ed, (q31_t)0x3fcda37, (q31_t)0x3f6927f, (q31_t)0x3f04ac4,
+  (q31_t)0x3ea0307, (q31_t)0x3e3bb48, (q31_t)0x3dd7386, (q31_t)0x3d72bc2, (q31_t)0x3d0e3fb, (q31_t)0x3ca9c32, (q31_t)0x3c45467, (q31_t)0x3be0c99,
+  (q31_t)0x3b7c4c9, (q31_t)0x3b17cf7, (q31_t)0x3ab3523, (q31_t)0x3a4ed4c, (q31_t)0x39ea573, (q31_t)0x3985d97, (q31_t)0x39215ba, (q31_t)0x38bcdda,
+  (q31_t)0x38585f8, (q31_t)0x37f3e14, (q31_t)0x378f62e, (q31_t)0x372ae46, (q31_t)0x36c665b, (q31_t)0x3661e6f, (q31_t)0x35fd680, (q31_t)0x3598e8f,
+  (q31_t)0x353469c, (q31_t)0x34cfea8, (q31_t)0x346b6b1, (q31_t)0x3406eb8, (q31_t)0x33a26bd, (q31_t)0x333dec0, (q31_t)0x32d96c1, (q31_t)0x3274ec0,
+  (q31_t)0x32106bd, (q31_t)0x31abeb9, (q31_t)0x31476b2, (q31_t)0x30e2ea9, (q31_t)0x307e69f, (q31_t)0x3019e93, (q31_t)0x2fb5684, (q31_t)0x2f50e74,
+  (q31_t)0x2eec663, (q31_t)0x2e87e4f, (q31_t)0x2e2363a, (q31_t)0x2dbee22, (q31_t)0x2d5a609, (q31_t)0x2cf5def, (q31_t)0x2c915d2, (q31_t)0x2c2cdb4,
+  (q31_t)0x2bc8594, (q31_t)0x2b63d73, (q31_t)0x2aff54f, (q31_t)0x2a9ad2a, (q31_t)0x2a36504, (q31_t)0x29d1cdc, (q31_t)0x296d4b2, (q31_t)0x2908c87,
+  (q31_t)0x28a445a, (q31_t)0x283fc2b, (q31_t)0x27db3fb, (q31_t)0x2776bc9, (q31_t)0x2712396, (q31_t)0x26adb62, (q31_t)0x264932b, (q31_t)0x25e4af4,
+  (q31_t)0x25802bb, (q31_t)0x251ba80, (q31_t)0x24b7244, (q31_t)0x2452a07, (q31_t)0x23ee1c8, (q31_t)0x2389988, (q31_t)0x2325147, (q31_t)0x22c0904,
+  (q31_t)0x225c0bf, (q31_t)0x21f787a, (q31_t)0x2193033, (q31_t)0x212e7eb, (q31_t)0x20c9fa1, (q31_t)0x2065757, (q31_t)0x2000f0b, (q31_t)0x1f9c6be,
+  (q31_t)0x1f37e6f, (q31_t)0x1ed3620, (q31_t)0x1e6edcf, (q31_t)0x1e0a57d, (q31_t)0x1da5d2a, (q31_t)0x1d414d6, (q31_t)0x1cdcc80, (q31_t)0x1c7842a,
+  (q31_t)0x1c13bd2, (q31_t)0x1baf37a, (q31_t)0x1b4ab20, (q31_t)0x1ae62c5, (q31_t)0x1a81a69, (q31_t)0x1a1d20c, (q31_t)0x19b89ae, (q31_t)0x1954150,
+  (q31_t)0x18ef8f0, (q31_t)0x188b08f, (q31_t)0x182682d, (q31_t)0x17c1fcb, (q31_t)0x175d767, (q31_t)0x16f8f03, (q31_t)0x169469d, (q31_t)0x162fe37,
+  (q31_t)0x15cb5d0, (q31_t)0x1566d68, (q31_t)0x15024ff, (q31_t)0x149dc96, (q31_t)0x143942b, (q31_t)0x13d4bc0, (q31_t)0x1370354, (q31_t)0x130bae7,
+  (q31_t)0x12a727a, (q31_t)0x1242a0c, (q31_t)0x11de19d, (q31_t)0x117992e, (q31_t)0x11150be, (q31_t)0x10b084d, (q31_t)0x104bfdb, (q31_t)0xfe7769,
+  (q31_t)0xf82ef6, (q31_t)0xf1e683, (q31_t)0xeb9e0f, (q31_t)0xe5559b, (q31_t)0xdf0d26, (q31_t)0xd8c4b0, (q31_t)0xd27c3a, (q31_t)0xcc33c3,
+  (q31_t)0xc5eb4c, (q31_t)0xbfa2d5, (q31_t)0xb95a5d, (q31_t)0xb311e4, (q31_t)0xacc96b, (q31_t)0xa680f2, (q31_t)0xa03878, (q31_t)0x99effe,
+  (q31_t)0x93a784, (q31_t)0x8d5f09, (q31_t)0x87168e, (q31_t)0x80ce12, (q31_t)0x7a8597, (q31_t)0x743d1a, (q31_t)0x6df49e, (q31_t)0x67ac21,
+  (q31_t)0x6163a5, (q31_t)0x5b1b27, (q31_t)0x54d2aa, (q31_t)0x4e8a2c, (q31_t)0x4841af, (q31_t)0x41f931, (q31_t)0x3bb0b3, (q31_t)0x356835,
+  (q31_t)0x2f1fb6, (q31_t)0x28d738, (q31_t)0x228eb9, (q31_t)0x1c463b, (q31_t)0x15fdbc, (q31_t)0xfb53d, (q31_t)0x96cbe, (q31_t)0x3243f
+};
+  #endif
+
+/**
+  @} end of DCT4_IDCT4_Table group
+ */
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q15)
+/**
+  @brief  Q15 table for reciprocal
+*/
+const q15_t __ALIGNED(4) armRecipTableQ15[64] = {
+ 0x7F03, 0x7D13, 0x7B31, 0x795E, 0x7798, 0x75E0,
+ 0x7434, 0x7294, 0x70FF, 0x6F76, 0x6DF6, 0x6C82,
+ 0x6B16, 0x69B5, 0x685C, 0x670C, 0x65C4, 0x6484,
+ 0x634C, 0x621C, 0x60F3, 0x5FD0, 0x5EB5, 0x5DA0,
+ 0x5C91, 0x5B88, 0x5A85, 0x5988, 0x5890, 0x579E,
+ 0x56B0, 0x55C8, 0x54E4, 0x5405, 0x532B, 0x5255,
+ 0x5183, 0x50B6, 0x4FEC, 0x4F26, 0x4E64, 0x4DA6,
+ 0x4CEC, 0x4C34, 0x4B81, 0x4AD0, 0x4A23, 0x4978,
+ 0x48D1, 0x482D, 0x478C, 0x46ED, 0x4651, 0x45B8,
+ 0x4521, 0x448D, 0x43FC, 0x436C, 0x42DF, 0x4255,
+ 0x41CC, 0x4146, 0x40C2, 0x4040
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q31)
+
+/**
+  @brief  Q31 table for reciprocal
+*/
+const q31_t armRecipTableQ31[64] = {
+  0x7F03F03F, 0x7D137420, 0x7B31E739, 0x795E9F94, 0x7798FD29, 0x75E06928,
+  0x7434554D, 0x72943B4B, 0x70FF9C40, 0x6F760031, 0x6DF6F593, 0x6C8210E3,
+  0x6B16EC3A, 0x69B526F6, 0x685C655F, 0x670C505D, 0x65C4952D, 0x6484E519,
+  0x634CF53E, 0x621C7E4F, 0x60F33C61, 0x5FD0EEB3, 0x5EB55785, 0x5DA03BEB,
+  0x5C9163A1, 0x5B8898E6, 0x5A85A85A, 0x598860DF, 0x58909373, 0x579E1318,
+  0x56B0B4B8, 0x55C84F0B, 0x54E4BA80, 0x5405D124, 0x532B6E8F, 0x52556FD0,
+  0x5183B35A, 0x50B618F3, 0x4FEC81A2, 0x4F26CFA2, 0x4E64E64E, 0x4DA6AA1D,
+  0x4CEC008B, 0x4C34D010, 0x4B810016, 0x4AD078EF, 0x4A2323C4, 0x4978EA96,
+  0x48D1B827, 0x482D77FE, 0x478C1657, 0x46ED801D, 0x4651A2E5, 0x45B86CE2,
+  0x4521CCE1, 0x448DB244, 0x43FC0CFA, 0x436CCD78, 0x42DFE4B4, 0x42554426,
+  0x41CCDDB6, 0x4146A3C6, 0x40C28923, 0x40408102
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_F32)
+/**
+  @par
+  Example code for the generation of the floating-point sine table:
+  <pre>
+  tableSize = 512;
+  for (n = 0; n < (tableSize + 1); n++)
+  {
+ 	sinTable[n] = sin(2*PI*n/tableSize);
+  }</pre>
+ @par
+  where PI value is  3.14159265358979
+ */
 const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1] = {
    0.00000000f, 0.01227154f, 0.02454123f, 0.03680722f, 0.04906767f, 0.06132074f,
    0.07356456f, 0.08579731f, 0.09801714f, 0.11022221f, 0.12241068f, 0.13458071f,
@@ -21988,24 +57019,26 @@
    -0.11022221f, -0.09801714f, -0.08579731f, -0.07356456f, -0.06132074f,
    -0.04906767f, -0.03680722f, -0.02454123f, -0.01227154f, -0.00000000f
 };
+#endif /* defined(ARM_ALL_FAST_TABLES) */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q31)
 /**
- * \par
- * Table values are in Q31 (1.31 fixed-point format) and generation is done in
- * three steps.  First,  generate sin values in floating point:
- * <pre>
- * tableSize = 512;
- * for(n = 0; n < (tableSize + 1); n++)
- * {
- *	sinTable[n]= sin(2*pi*n/tableSize);
- * } </pre>
- * where pi value is  3.14159265358979
- * \par
- * Second, convert floating-point to Q31 (Fixed point):
- *	(sinTable[i] * pow(2, 31))
- * \par
- * Finally, round to the nearest integer value:
- * 	sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);
+  @par
+  Table values are in Q31 (1.31 fixed-point format) and generation is done in
+  three steps.  First, generate sin values in floating point:
+  <pre>
+  tableSize = 512;
+  for (n = 0; n < (tableSize + 1); n++)
+  {
+ 	sinTable[n] = sin(2*PI*n/tableSize);
+  } </pre>
+  where PI value is 3.14159265358979
+ @par
+  Second, convert floating-point to Q31 (Fixed point):
+ 	(sinTable[i] * pow(2, 31))
+ @par
+  Finally, round to the nearest integer value:
+  	sinTable[i] += (sinTable[i] > 0 ? 0.5 : -0.5);
  */
 const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1] = {
 	0L, 26352928L, 52701887L, 79042909L, 105372028L, 131685278L, 157978697L,
@@ -22101,23 +57134,26 @@
 	-157978697L, -131685278L, -105372028L, -79042909L, -52701887L, -26352928L, 0
 };
 
+#endif /* defined(ARM_ALL_FAST_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q15)
 /**
- * \par
- * Table values are in Q15 (1.15 fixed-point format) and generation is done in
- * three steps.  First,  generate sin values in floating point:
- * <pre>
- * tableSize = 512;
- * for(n = 0; n < (tableSize + 1); n++)
- * {
- *	sinTable[n]= sin(2*pi*n/tableSize);
- * } </pre>
- * where pi value is  3.14159265358979
- * \par
- * Second, convert floating-point to Q15 (Fixed point):
- *	(sinTable[i] * pow(2, 15))
- * \par
- * Finally, round to the nearest integer value:
- * 	sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);
+  @par
+  Table values are in Q15 (1.15 fixed-point format) and generation is done in
+  three steps.  First,  generate sin values in floating point:
+  <pre>
+  tableSize = 512;
+  for (n = 0; n < (tableSize + 1); n++)
+  {
+ 	sinTable[n] = sin(2*PI*n/tableSize);
+  } </pre>
+  where PI value is  3.14159265358979
+ @par
+  Second, convert floating-point to Q15 (Fixed point):
+ 	(sinTable[i] * pow(2, 15))
+ @par
+  Finally, round to the nearest integer value:
+  	sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);
  */
 const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1] = {
 	0, 402, 804, 1206, 1608, 2009, 2411, 2811, 3212, 3612, 4011, 4410, 4808,
@@ -22174,3 +57210,6 @@
 	-5998, -5602, -5205, -4808, -4410, -4011, -3612, -3212, -2811, -2411,
 	-2009, -1608, -1206, -804, -402, 0
 };
+#endif /* defined(ARM_ALL_FAST_TABLES) */
+
+#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_TABLES) */
diff --git a/DSP/Source/CommonTables/arm_const_structs.c b/DSP/Source/CommonTables/arm_const_structs.c
index 4f41262..6887da4 100644
--- a/DSP/Source/CommonTables/arm_const_structs.c
+++ b/DSP/Source/CommonTables/arm_const_structs.c
@@ -29,351 +29,458 @@
 
 #include "arm_const_structs.h"
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) 
+
 /* Floating-point structs */
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_BITREVIDX_FLT_16))
 const arm_cfft_instance_f32 arm_cfft_sR_f32_len16 = {
-	16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE_16_TABLE_LENGTH
+  16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE_16_TABLE_LENGTH
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32))
 const arm_cfft_instance_f32 arm_cfft_sR_f32_len32 = {
-	32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_32_TABLE_LENGTH
+  32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_32_TABLE_LENGTH
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64))
 const arm_cfft_instance_f32 arm_cfft_sR_f32_len64 = {
-	64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE_64_TABLE_LENGTH
+  64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE_64_TABLE_LENGTH
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128))
 const arm_cfft_instance_f32 arm_cfft_sR_f32_len128 = {
-	128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH
+  128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256))
 const arm_cfft_instance_f32 arm_cfft_sR_f32_len256 = {
-	256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH
+  256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512))
 const arm_cfft_instance_f32 arm_cfft_sR_f32_len512 = {
-	512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH
+  512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024))
 const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024 = {
-	1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE_1024_TABLE_LENGTH
+  1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE_1024_TABLE_LENGTH
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048))
 const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048 = {
-	2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE_2048_TABLE_LENGTH
+  2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE_2048_TABLE_LENGTH
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_4096) && defined(ARM_TABLE_BITREVIDX_FLT_4096))
 const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096 = {
-	4096, twiddleCoef_4096, armBitRevIndexTable4096, ARMBITREVINDEXTABLE_4096_TABLE_LENGTH
+  4096, twiddleCoef_4096, armBitRevIndexTable4096, ARMBITREVINDEXTABLE_4096_TABLE_LENGTH
 };
+#endif
 
 /* Fixed-point structs */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
 const arm_cfft_instance_q31 arm_cfft_sR_q31_len16 = {
-	16, twiddleCoef_16_q31, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH
+  16, twiddleCoef_16_q31, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
 const arm_cfft_instance_q31 arm_cfft_sR_q31_len32 = {
-	32, twiddleCoef_32_q31, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH
+  32, twiddleCoef_32_q31, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
 const arm_cfft_instance_q31 arm_cfft_sR_q31_len64 = {
-	64, twiddleCoef_64_q31, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH
+  64, twiddleCoef_64_q31, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
 const arm_cfft_instance_q31 arm_cfft_sR_q31_len128 = {
-	128, twiddleCoef_128_q31, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH
+  128, twiddleCoef_128_q31, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
 const arm_cfft_instance_q31 arm_cfft_sR_q31_len256 = {
-	256, twiddleCoef_256_q31, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
+  256, twiddleCoef_256_q31, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
 const arm_cfft_instance_q31 arm_cfft_sR_q31_len512 = {
-	512, twiddleCoef_512_q31, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH
+  512, twiddleCoef_512_q31, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
 const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024 = {
-	1024, twiddleCoef_1024_q31, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
+  1024, twiddleCoef_1024_q31, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
 const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048 = {
-	2048, twiddleCoef_2048_q31, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
+  2048, twiddleCoef_2048_q31, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
 const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096 = {
-	4096, twiddleCoef_4096_q31, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
+  4096, twiddleCoef_4096_q31, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
 const arm_cfft_instance_q15 arm_cfft_sR_q15_len16 = {
-	16, twiddleCoef_16_q15, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH
+  16, twiddleCoef_16_q15, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
 const arm_cfft_instance_q15 arm_cfft_sR_q15_len32 = {
-	32, twiddleCoef_32_q15, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH
+  32, twiddleCoef_32_q15, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
 const arm_cfft_instance_q15 arm_cfft_sR_q15_len64 = {
-	64, twiddleCoef_64_q15, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH
+  64, twiddleCoef_64_q15, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
 const arm_cfft_instance_q15 arm_cfft_sR_q15_len128 = {
-	128, twiddleCoef_128_q15, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH
+  128, twiddleCoef_128_q15, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
 const arm_cfft_instance_q15 arm_cfft_sR_q15_len256 = {
-	256, twiddleCoef_256_q15, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
+  256, twiddleCoef_256_q15, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
 const arm_cfft_instance_q15 arm_cfft_sR_q15_len512 = {
-	512, twiddleCoef_512_q15, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH
+  512, twiddleCoef_512_q15, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
 const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024 = {
-	1024, twiddleCoef_1024_q15, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
+  1024, twiddleCoef_1024_q15, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
 const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048 = {
-	2048, twiddleCoef_2048_q15, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
+  2048, twiddleCoef_2048_q15, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
 const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096 = {
-	4096, twiddleCoef_4096_q15, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
+  4096, twiddleCoef_4096_q15, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
 };
+#endif
 
 /* Structure for real-value inputs */
 /* Floating-point structs */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32))
 const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len32 = {
-	{ 16, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_16_TABLE_LENGTH },
-	32U,
-	(float32_t *)twiddleCoef_rfft_32
+  { 16, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_16_TABLE_LENGTH },
+  32U,
+  (float32_t *)twiddleCoef_rfft_32
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64))
 const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len64 = {
-	 { 32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_32_TABLE_LENGTH },
-	64U,
-	(float32_t *)twiddleCoef_rfft_64
+   { 32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_32_TABLE_LENGTH },
+  64U,
+  (float32_t *)twiddleCoef_rfft_64
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128))
 const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len128 = {
-	{ 64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE_64_TABLE_LENGTH },
-	128U,
-	(float32_t *)twiddleCoef_rfft_128
+  { 64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE_64_TABLE_LENGTH },
+  128U,
+  (float32_t *)twiddleCoef_rfft_128
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256))
 const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len256 = {
-	{ 128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH },
-	256U,
-	(float32_t *)twiddleCoef_rfft_256
+  { 128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH },
+  256U,
+  (float32_t *)twiddleCoef_rfft_256
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512))
 const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len512 = {
-	{ 256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH },
-	512U,
-	(float32_t *)twiddleCoef_rfft_512
+  { 256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH },
+  512U,
+  (float32_t *)twiddleCoef_rfft_512
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024))
 const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len1024 = {
-	{ 512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH },
-	1024U,
-	(float32_t *)twiddleCoef_rfft_1024
+  { 512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH },
+  1024U,
+  (float32_t *)twiddleCoef_rfft_1024
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048))
 const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len2048 = {
-	{ 1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE_1024_TABLE_LENGTH },
-	2048U,
-	(float32_t *)twiddleCoef_rfft_2048
+  { 1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE_1024_TABLE_LENGTH },
+  2048U,
+  (float32_t *)twiddleCoef_rfft_2048
 };
+#endif 
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_4096) && defined(ARM_TABLE_BITREVIDX_FLT_4096) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096))
 const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len4096 = {
-	{ 2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE_2048_TABLE_LENGTH },
-	4096U,
-	(float32_t *)twiddleCoef_rfft_4096
+  { 2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE_2048_TABLE_LENGTH },
+  4096U,
+  (float32_t *)twiddleCoef_rfft_4096
 };
+#endif
 
 /* Fixed-point structs */
 /* q31_t */
-extern const q31_t realCoefAQ31[8192];
-extern const q31_t realCoefBQ31[8192];
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
 const arm_rfft_instance_q31 arm_rfft_sR_q31_len32 = {
-	32U,
-	0,
-	1,
-	256U,
-	(q31_t*)realCoefAQ31,
-	(q31_t*)realCoefBQ31,
-	&arm_cfft_sR_q31_len16
+  32U,
+  0,
+  1,
+  256U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len16
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
 const arm_rfft_instance_q31 arm_rfft_sR_q31_len64 = {
-	64U,
-	0,
-	1,
-	128U,
-	(q31_t*)realCoefAQ31,
-	(q31_t*)realCoefBQ31,
-	&arm_cfft_sR_q31_len32
+  64U,
+  0,
+  1,
+  128U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len32
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
 const arm_rfft_instance_q31 arm_rfft_sR_q31_len128 = {
-	128U,
-	0,
-	1,
-	64U,
-	(q31_t*)realCoefAQ31,
-	(q31_t*)realCoefBQ31,
-	&arm_cfft_sR_q31_len64
+  128U,
+  0,
+  1,
+  64U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len64
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
 const arm_rfft_instance_q31 arm_rfft_sR_q31_len256 = {
-	256U,
-	0,
-	1,
-	32U,
-	(q31_t*)realCoefAQ31,
-	(q31_t*)realCoefBQ31,
-	&arm_cfft_sR_q31_len128
+  256U,
+  0,
+  1,
+  32U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len128
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
 const arm_rfft_instance_q31 arm_rfft_sR_q31_len512 = {
-	512U,
-	0,
-	1,
-	16U,
-	(q31_t*)realCoefAQ31,
-	(q31_t*)realCoefBQ31,
-	&arm_cfft_sR_q31_len256
+  512U,
+  0,
+  1,
+  16U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len256
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
 const arm_rfft_instance_q31 arm_rfft_sR_q31_len1024 = {
-	1024U,
-	0,
-	1,
-	8U,
-	(q31_t*)realCoefAQ31,
-	(q31_t*)realCoefBQ31,
-	&arm_cfft_sR_q31_len512
+  1024U,
+  0,
+  1,
+  8U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len512
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
 const arm_rfft_instance_q31 arm_rfft_sR_q31_len2048 = {
-	2048U,
-	0,
-	1,
-	4U,
-	(q31_t*)realCoefAQ31,
-	(q31_t*)realCoefBQ31,
-	&arm_cfft_sR_q31_len1024
+  2048U,
+  0,
+  1,
+  4U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len1024
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
 const arm_rfft_instance_q31 arm_rfft_sR_q31_len4096 = {
-	4096U,
-	0,
-	1,
-	2U,
-	(q31_t*)realCoefAQ31,
-	(q31_t*)realCoefBQ31,
-	&arm_cfft_sR_q31_len2048
+  4096U,
+  0,
+  1,
+  2U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len2048
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
 const arm_rfft_instance_q31 arm_rfft_sR_q31_len8192 = {
-	8192U,
-	0,
-	1,
-	1U,
-	(q31_t*)realCoefAQ31,
-	(q31_t*)realCoefBQ31,
-	&arm_cfft_sR_q31_len4096
+  8192U,
+  0,
+  1,
+  1U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len4096
 };
+#endif
 
 /* q15_t */
-extern const q15_t realCoefAQ15[8192];
-extern const q15_t realCoefBQ15[8192];
-
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
 const arm_rfft_instance_q15 arm_rfft_sR_q15_len32 = {
-	32U,
-	0,
-	1,
-	256U,
-	(q15_t*)realCoefAQ15,
-	(q15_t*)realCoefBQ15,
-	&arm_cfft_sR_q15_len16
+  32U,
+  0,
+  1,
+  256U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len16
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
 const arm_rfft_instance_q15 arm_rfft_sR_q15_len64 = {
-	64U,
-	0,
-	1,
-	128U,
-	(q15_t*)realCoefAQ15,
-	(q15_t*)realCoefBQ15,
-	&arm_cfft_sR_q15_len32
+  64U,
+  0,
+  1,
+  128U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len32
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
 const arm_rfft_instance_q15 arm_rfft_sR_q15_len128 = {
-	128U,
-	0,
-	1,
-	64U,
-	(q15_t*)realCoefAQ15,
-	(q15_t*)realCoefBQ15,
-	&arm_cfft_sR_q15_len64
+  128U,
+  0,
+  1,
+  64U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len64
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
 const arm_rfft_instance_q15 arm_rfft_sR_q15_len256 = {
-	256U,
-	0,
-	1,
-	32U,
-	(q15_t*)realCoefAQ15,
-	(q15_t*)realCoefBQ15,
-	&arm_cfft_sR_q15_len128
+  256U,
+  0,
+  1,
+  32U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len128
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
 const arm_rfft_instance_q15 arm_rfft_sR_q15_len512 = {
-	512U,
-	0,
-	1,
-	16U,
-	(q15_t*)realCoefAQ15,
-	(q15_t*)realCoefBQ15,
-	&arm_cfft_sR_q15_len256
+  512U,
+  0,
+  1,
+  16U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len256
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
 const arm_rfft_instance_q15 arm_rfft_sR_q15_len1024 = {
-	1024U,
-	0,
-	1,
-	8U,
-	(q15_t*)realCoefAQ15,
-	(q15_t*)realCoefBQ15,
-	&arm_cfft_sR_q15_len512
+  1024U,
+  0,
+  1,
+  8U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len512
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
 const arm_rfft_instance_q15 arm_rfft_sR_q15_len2048 = {
-	2048U,
-	0,
-	1,
-	4U,
-	(q15_t*)realCoefAQ15,
-	(q15_t*)realCoefBQ15,
-	&arm_cfft_sR_q15_len1024
+  2048U,
+  0,
+  1,
+  4U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len1024
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
 const arm_rfft_instance_q15 arm_rfft_sR_q15_len4096 = {
-	4096U,
-	0,
-	1,
-	2U,
-	(q15_t*)realCoefAQ15,
-	(q15_t*)realCoefBQ15,
-	&arm_cfft_sR_q15_len2048
+  4096U,
+  0,
+  1,
+  2U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len2048
 };
+#endif
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
 const arm_rfft_instance_q15 arm_rfft_sR_q15_len8192 = {
-	8192U,
-	0,
-	1,
-	1U,
-	(q15_t*)realCoefAQ15,
-	(q15_t*)realCoefBQ15,
-	&arm_cfft_sR_q15_len4096
+  8192U,
+  0,
+  1,
+  1U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len4096
 };
+#endif
+
+#endif
diff --git a/DSP/Source/ComplexMathFunctions/CMakeLists.txt b/DSP/Source/ComplexMathFunctions/CMakeLists.txt
new file mode 100644
index 0000000..16e06c6
--- /dev/null
+++ b/DSP/Source/ComplexMathFunctions/CMakeLists.txt
@@ -0,0 +1,16 @@
+cmake_minimum_required (VERSION 3.6)
+
+project(CMSISDSPComplexMath)
+
+
+file(GLOB SRC "./*_*.c")
+
+add_library(CMSISDSPComplexMath STATIC ${SRC})
+
+configdsp(CMSISDSPComplexMath ..)
+
+### Includes
+target_include_directories(CMSISDSPComplexMath PUBLIC "${DSP}/../../Include")
+
+
+
diff --git a/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c b/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c
new file mode 100644
index 0000000..2210533
--- /dev/null
+++ b/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c
@@ -0,0 +1,46 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        CompexMathFunctions.c
+ * Description:  Combination of all comlex math function source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_cmplx_conj_f32.c"
+#include "arm_cmplx_conj_q15.c"
+#include "arm_cmplx_conj_q31.c"
+#include "arm_cmplx_dot_prod_f32.c"
+#include "arm_cmplx_dot_prod_q15.c"
+#include "arm_cmplx_dot_prod_q31.c"
+#include "arm_cmplx_mag_f32.c"
+#include "arm_cmplx_mag_q15.c"
+#include "arm_cmplx_mag_q31.c"
+#include "arm_cmplx_mag_squared_f32.c"
+#include "arm_cmplx_mag_squared_q15.c"
+#include "arm_cmplx_mag_squared_q31.c"
+#include "arm_cmplx_mult_cmplx_f32.c"
+#include "arm_cmplx_mult_cmplx_q15.c"
+#include "arm_cmplx_mult_cmplx_q31.c"
+#include "arm_cmplx_mult_real_f32.c"
+#include "arm_cmplx_mult_real_q15.c"
+#include "arm_cmplx_mult_real_q31.c"
diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c
index cfb6f1f..df5db00 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_cmplx_conj_f32.c
  * Description:  Floating-point complex conjugate
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,143 +29,133 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupCmplxMath
+  @ingroup groupCmplxMath
  */
 
 /**
- * @defgroup cmplx_conj Complex Conjugate
- *
- * Conjugates the elements of a complex data vector.
- *
- * The <code>pSrc</code> points to the source data and
- * <code>pDst</code> points to the where the result should be written.
- * <code>numSamples</code> specifies the number of complex samples
- * and the data in each array is stored in an interleaved fashion
- * (real, imag, real, imag, ...).
- * Each array has a total of <code>2*numSamples</code> values.
- * The underlying algorithm is used:
- *
- * <pre>
- * for(n=0; n<numSamples; n++) {
- *     pDst[(2*n)+0)] = pSrc[(2*n)+0];     // real part
- *     pDst[(2*n)+1)] = -pSrc[(2*n)+1];    // imag part
- * }
- * </pre>
- *
- * There are separate functions for floating-point, Q15, and Q31 data types.
+  @defgroup cmplx_conj Complex Conjugate
+
+  Conjugates the elements of a complex data vector.
+
+  The <code>pSrc</code> points to the source data and
+  <code>pDst</code> points to the destination data where the result should be written.
+  <code>numSamples</code> specifies the number of complex samples
+  and the data in each array is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  Each array has a total of <code>2*numSamples</code> values.
+
+  The underlying algorithm is used:
+  <pre>
+  for (n = 0; n < numSamples; n++) {
+      pDst[(2*n)  ] =  pSrc[(2*n)  ];    // real part
+      pDst[(2*n)+1] = -pSrc[(2*n)+1];    // imag part
+  }
+  </pre>
+
+  There are separate functions for floating-point, Q15, and Q31 data types.
  */
 
 /**
- * @addtogroup cmplx_conj
- * @{
+  @addtogroup cmplx_conj
+  @{
  */
 
 /**
- * @brief  Floating-point complex conjugate.
- * @param  *pSrc points to the input vector
- * @param  *pDst points to the output vector
- * @param  numSamples number of complex samples in each vector
- * @return none.
+  @brief         Floating-point complex conjugate.
+  @param[in]     pSrc        points to the input vector
+  @param[out]    pDst        points to the output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
  */
 
+
 void arm_cmplx_conj_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples)
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t numSamples)
 {
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
 
-#if defined (ARM_MATH_DSP)
+#if defined(ARM_MATH_NEON)
+   float32x4_t zero;
+   float32x4x2_t vec;
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t inR1, inR2, inR3, inR4;
-  float32_t inI1, inI2, inI3, inI4;
+   zero = vdupq_n_f32(0.0);
 
-  /*loop Unrolling */
+   /* Compute 4 outputs at a time */
+   blkCnt = numSamples >> 2U;
+
+   while (blkCnt > 0U)
+   {
+     /* C[0]+jC[1] = A[0]+(-1)*jA[1] */
+     /* Calculate Complex Conjugate and then store the results in the destination buffer. */
+     vec = vld2q_f32(pSrc);
+     vec.val[1] = vsubq_f32(zero,vec.val[1]);
+     vst2q_f32(pDst,vec);
+
+     /* Increment pointers */
+     pSrc += 8;
+     pDst += 8;
+        
+     /* Decrement the loop counter */
+     blkCnt--;
+   }
+
+   /* Tail */
+   blkCnt = numSamples & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = numSamples >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    /* read real input samples */
-    inR1 = pSrc[0];
-    /* store real samples to destination */
-    pDst[0] = inR1;
-    inR2 = pSrc[2];
-    pDst[2] = inR2;
-    inR3 = pSrc[4];
-    pDst[4] = inR3;
-    inR4 = pSrc[6];
-    pDst[6] = inR4;
+    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
 
-    /* read imaginary input samples */
-    inI1 = pSrc[1];
-    inI2 = pSrc[3];
+    /* Calculate Complex Conjugate and store result in destination buffer. */
+    *pDst++ =  *pSrc++;
+    *pDst++ = -*pSrc++;
 
-    /* conjugate input */
-    inI1 = -inI1;
+    *pDst++ =  *pSrc++;
+    *pDst++ = -*pSrc++;
 
-    /* read imaginary input samples */
-    inI3 = pSrc[5];
+    *pDst++ =  *pSrc++;
+    *pDst++ = -*pSrc++;
 
-    /* conjugate input */
-    inI2 = -inI2;
+    *pDst++ =  *pSrc++;
+    *pDst++ = -*pSrc++;
 
-    /* read imaginary input samples */
-    inI4 = pSrc[7];
-
-    /* conjugate input */
-    inI3 = -inI3;
-
-    /* store imaginary samples to destination */
-    pDst[1] = inI1;
-    pDst[3] = inI2;
-
-    /* conjugate input */
-    inI4 = -inI4;
-
-    /* store imaginary samples to destination */
-    pDst[5] = inI3;
-
-    /* increment source pointer by 8 to process next sampels */
-    pSrc += 8U;
-
-    /* store imaginary sample to destination */
-    pDst[7] = inI4;
-
-    /* increment destination pointer by 8 to store next samples */
-    pDst += 8U;
-
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = numSamples % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
+  /* Initialize blkCnt with number of samples */
   blkCnt = numSamples;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined (ARM_MATH_NEON) */
 
   while (blkCnt > 0U)
   {
-    /* realOut + j (imagOut) = realIn + j (-1) imagIn */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    *pDst++ = *pSrc++;
+    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
+
+    /* Calculate Complex Conjugate and store result in destination buffer. */
+    *pDst++ =  *pSrc++;
     *pDst++ = -*pSrc++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
+
 }
 
 /**
- * @} end of cmplx_conj group
+  @} end of cmplx_conj group
  */
diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
index 7950229..073a337 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_cmplx_conj_q15.c
  * Description:  Q15 complex conjugate
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,68 +29,66 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupCmplxMath
+  @ingroup groupCmplxMath
  */
 
 /**
- * @addtogroup cmplx_conj
- * @{
+  @addtogroup cmplx_conj
+  @{
  */
 
 /**
- * @brief  Q15 complex conjugate.
- * @param  *pSrc points to the input vector
- * @param  *pDst points to the output vector
- * @param  numSamples number of complex samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
+  @brief         Q15 complex conjugate.
+  @param[in]     pSrc        points to the input vector
+  @param[out]    pDst        points to the output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q15 value -1 (0x8000) is saturated to the maximum allowable positive value 0x7FFF.
  */
 
 void arm_cmplx_conj_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples)
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples)
 {
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t in1;                                     /* Temporary input variable */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in2, in3, in4;                           /* Temporary input variables */
+#endif
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in1, in2, in3, in4;
-  q31_t zero = 0;
 
-  /*loop Unrolling */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = numSamples >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    in1 = *__SIMD32(pSrc)++;
-    in2 = *__SIMD32(pSrc)++;
-    in3 = *__SIMD32(pSrc)++;
-    in4 = *__SIMD32(pSrc)++;
+    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
+
+    /* Calculate Complex Conjugate and store result in destination buffer. */
+
+    #if defined (ARM_MATH_DSP)
+    in1 = read_q15x2_ia ((q15_t **) &pSrc);
+    in2 = read_q15x2_ia ((q15_t **) &pSrc);
+    in3 = read_q15x2_ia ((q15_t **) &pSrc);
+    in4 = read_q15x2_ia ((q15_t **) &pSrc);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
-    in1 = __QASX(zero, in1);
-    in2 = __QASX(zero, in2);
-    in3 = __QASX(zero, in3);
-    in4 = __QASX(zero, in4);
-
+    in1 = __QASX(0, in1);
+    in2 = __QASX(0, in2);
+    in3 = __QASX(0, in3);
+    in4 = __QASX(0, in4);
 #else
-
-    in1 = __QSAX(zero, in1);
-    in2 = __QSAX(zero, in2);
-    in3 = __QSAX(zero, in3);
-    in4 = __QSAX(zero, in4);
-
+    in1 = __QSAX(0, in1);
+    in2 = __QSAX(0, in2);
+    in3 = __QSAX(0, in3);
+    in4 = __QSAX(0, in4);
 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     in1 = ((uint32_t) in1 >> 16) | ((uint32_t) in1 << 16);
@@ -98,52 +96,62 @@
     in3 = ((uint32_t) in3 >> 16) | ((uint32_t) in3 << 16);
     in4 = ((uint32_t) in4 >> 16) | ((uint32_t) in4 << 16);
 
-    *__SIMD32(pDst)++ = in1;
-    *__SIMD32(pDst)++ = in2;
-    *__SIMD32(pDst)++ = in3;
-    *__SIMD32(pDst)++ = in4;
+    write_q15x2_ia (&pDst, in1);
+    write_q15x2_ia (&pDst, in2);
+    write_q15x2_ia (&pDst, in3);
+    write_q15x2_ia (&pDst, in4);
+#else
+    *pDst++ =  *pSrc++;
+    in1 = *pSrc++;
+    *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
 
-    /* Decrement the loop counter */
+    *pDst++ =  *pSrc++;
+    in1 = *pSrc++;
+    *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
+
+    *pDst++ =  *pSrc++;
+    in1 = *pSrc++;
+    *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
+
+    *pDst++ =  *pSrc++;
+    in1 = *pSrc++;
+    *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = numSamples % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    *pDst++ = *pSrc++;
-    *pDst++ = __SSAT(-*pSrc++, 16);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
 #else
 
-  q15_t in;
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
 
-  /* Run the below code for Cortex-M0 */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
-  while (numSamples > 0U)
+  while (blkCnt > 0U)
   {
-    /* realOut + j (imagOut) = realIn+ j (-1) imagIn */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    *pDst++ = *pSrc++;
-    in = *pSrc++;
-    *pDst++ = (in == (q15_t) 0x8000) ? 0x7fff : -in;
+    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
 
-    /* Decrement the loop counter */
-    numSamples--;
+    /* Calculate Complex Conjugate and store result in destination buffer. */
+    *pDst++ =  *pSrc++;
+    in1 = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __SSAT(-in1, 16);
+#else
+    *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of cmplx_conj group
+  @} end of cmplx_conj group
  */
diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c
index 709ce0e..6ef1ddb 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_cmplx_conj_q31.c
  * Description:  Q31 complex conjugate
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,141 +29,109 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupCmplxMath
+  @ingroup groupCmplxMath
  */
 
 /**
- * @addtogroup cmplx_conj
- * @{
+  @addtogroup cmplx_conj
+  @{
  */
 
 /**
- * @brief  Q31 complex conjugate.
- * @param  *pSrc points to the input vector
- * @param  *pDst points to the output vector
- * @param  numSamples number of complex samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
+  @brief         Q31 complex conjugate.
+  @param[in]     pSrc        points to the input vector
+  @param[out]    pDst        points to the output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q31 value -1 (0x80000000) is saturated to the maximum allowable positive value 0x7FFFFFFF.
  */
 
 void arm_cmplx_conj_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples)
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t numSamples)
 {
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in;                                      /* Input value */
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t in;                                      /* Temporary input variable */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t inR1, inR2, inR3, inR4;                  /* Temporary real variables */
-  q31_t inI1, inI2, inI3, inI4;                  /* Temporary imaginary variables */
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = numSamples >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    /* Saturated to 0x7fffffff if the input is -1(0x80000000) */
-    /* read real input sample */
-    inR1 = pSrc[0];
-    /* store real input sample */
-    pDst[0] = inR1;
+    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
 
-    /* read imaginary input sample */
-    inI1 = pSrc[1];
+    /* Calculate Complex Conjugate and store result in destination buffer. */
+    *pDst++ =  *pSrc++;
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
 
-    /* read real input sample */
-    inR2 = pSrc[2];
-    /* store real input sample */
-    pDst[2] = inR2;
+    *pDst++ =  *pSrc++;
+    in =  *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
 
-    /* read imaginary input sample */
-    inI2 = pSrc[3];
+    *pDst++ =  *pSrc++;
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
 
-    /* negate imaginary input sample */
-    inI1 = __QSUB(0, inI1);
+    *pDst++ =  *pSrc++;
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
 
-    /* read real input sample */
-    inR3 = pSrc[4];
-    /* store real input sample */
-    pDst[4] = inR3;
-
-    /* read imaginary input sample */
-    inI3 = pSrc[5];
-
-    /* negate imaginary input sample */
-    inI2 = __QSUB(0, inI2);
-
-    /* read real input sample */
-    inR4 = pSrc[6];
-    /* store real input sample */
-    pDst[6] = inR4;
-
-    /* negate imaginary input sample */
-    inI3 = __QSUB(0, inI3);
-
-    /* store imaginary input sample */
-    inI4 = pSrc[7];
-
-    /* store imaginary input samples */
-    pDst[1] = inI1;
-
-    /* negate imaginary input sample */
-    inI4 = __QSUB(0, inI4);
-
-    /* store imaginary input samples */
-    pDst[3] = inI2;
-
-    /* increment source pointer by 8 to proecess next samples */
-    pSrc += 8U;
-
-    /* store imaginary input samples */
-    pDst[5] = inI3;
-    pDst[7] = inI4;
-
-    /* increment destination pointer by 8 to process next samples */
-    pDst += 8U;
-
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = numSamples % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
+  /* Initialize blkCnt with number of samples */
   blkCnt = numSamples;
 
-
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    /* Saturated to 0x7fffffff if the input is -1(0x80000000) */
-    *pDst++ = *pSrc++;
-    in = *pSrc++;
-    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
 
-    /* Decrement the loop counter */
+    /* Calculate Complex Conjugate and store result in destination buffer. */
+    *pDst++ =  *pSrc++;
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    /* Decrement loop counter */
     blkCnt--;
   }
+
 }
 
 /**
- * @} end of cmplx_conj group
+  @} end of cmplx_conj group
  */
diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
index bfc352b..06f1bfa 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_cmplx_dot_prod_f32.c
  * Description:  Floating-point complex dot product
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,163 +29,205 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupCmplxMath
+  @ingroup groupCmplxMath
  */
 
 /**
- * @defgroup cmplx_dot_prod Complex Dot Product
- *
- * Computes the dot product of two complex vectors.
- * The vectors are multiplied element-by-element and then summed.
- *
- * The <code>pSrcA</code> points to the first complex input vector and
- * <code>pSrcB</code> points to the second complex input vector.
- * <code>numSamples</code> specifies the number of complex samples
- * and the data in each array is stored in an interleaved fashion
- * (real, imag, real, imag, ...).
- * Each array has a total of <code>2*numSamples</code> values.
- *
- * The underlying algorithm is used:
- * <pre>
- * realResult=0;
- * imagResult=0;
- * for(n=0; n<numSamples; n++) {
- *     realResult += pSrcA[(2*n)+0]*pSrcB[(2*n)+0] - pSrcA[(2*n)+1]*pSrcB[(2*n)+1];
- *     imagResult += pSrcA[(2*n)+0]*pSrcB[(2*n)+1] + pSrcA[(2*n)+1]*pSrcB[(2*n)+0];
- * }
- * </pre>
- *
- * There are separate functions for floating-point, Q15, and Q31 data types.
+  @defgroup cmplx_dot_prod Complex Dot Product
+
+  Computes the dot product of two complex vectors.
+  The vectors are multiplied element-by-element and then summed.
+
+  The <code>pSrcA</code> points to the first complex input vector and
+  <code>pSrcB</code> points to the second complex input vector.
+  <code>numSamples</code> specifies the number of complex samples
+  and the data in each array is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  Each array has a total of <code>2*numSamples</code> values.
+
+  The underlying algorithm is used:
+
+  <pre>
+  realResult = 0;
+  imagResult = 0;
+  for (n = 0; n < numSamples; n++) {
+      realResult += pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
+      imagResult += pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
+  }
+  </pre>
+
+  There are separate functions for floating-point, Q15, and Q31 data types.
  */
 
 /**
- * @addtogroup cmplx_dot_prod
- * @{
+  @addtogroup cmplx_dot_prod
+  @{
  */
 
 /**
- * @brief  Floating-point complex dot product
- * @param  *pSrcA points to the first input vector
- * @param  *pSrcB points to the second input vector
- * @param  numSamples number of complex samples in each vector
- * @param  *realResult real part of the result returned here
- * @param  *imagResult imaginary part of the result returned here
- * @return none.
+  @brief         Floating-point complex dot product.
+  @param[in]     pSrcA       points to the first input vector
+  @param[in]     pSrcB       points to the second input vector
+  @param[in]     numSamples  number of samples in each vector
+  @param[out]    realResult  real part of the result returned here
+  @param[out]    imagResult  imaginary part of the result returned here
+  @return        none
  */
 
 void arm_cmplx_dot_prod_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  uint32_t numSamples,
-  float32_t * realResult,
-  float32_t * imagResult)
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        uint32_t numSamples,
+        float32_t * realResult,
+        float32_t * imagResult)
 {
-  float32_t real_sum = 0.0f, imag_sum = 0.0f;    /* Temporary result storage */
-  float32_t a0,b0,c0,d0;
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t real_sum = 0.0f, imag_sum = 0.0f;    /* Temporary result variables */
+        float32_t a0,b0,c0,d0;
 
-#if defined (ARM_MATH_DSP)
+#if defined(ARM_MATH_NEON)
+    float32x4x2_t vec1,vec2,vec3,vec4;
+    float32x4_t accR,accI;
+    float32x2_t accum = vdup_n_f32(0);
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
+    accR = vdupq_n_f32(0.0);
+    accI = vdupq_n_f32(0.0);
 
-  /*loop Unrolling */
+    /* Loop unrolling: Compute 8 outputs at a time */
+    blkCnt = numSamples >> 3U;
+
+    while (blkCnt > 0U)
+    {
+	/* C = (A[0]+jA[1])*(B[0]+jB[1]) + ...  */
+        /* Calculate dot product and then store the result in a temporary buffer. */
+
+	vec1 = vld2q_f32(pSrcA);
+        vec2 = vld2q_f32(pSrcB);
+
+	/* Increment pointers */
+        pSrcA += 8;
+        pSrcB += 8;
+
+	/* Re{C} = Re{A}*Re{B} - Im{A}*Im{B} */
+        accR = vmlaq_f32(accR,vec1.val[0],vec2.val[0]);
+        accR = vmlsq_f32(accR,vec1.val[1],vec2.val[1]);
+
+	/* Im{C} = Re{A}*Im{B} + Im{A}*Re{B} */
+        accI = vmlaq_f32(accI,vec1.val[1],vec2.val[0]);
+        accI = vmlaq_f32(accI,vec1.val[0],vec2.val[1]);
+
+        vec3 = vld2q_f32(pSrcA);
+        vec4 = vld2q_f32(pSrcB);
+	
+	/* Increment pointers */
+        pSrcA += 8;
+        pSrcB += 8;
+
+	/* Re{C} = Re{A}*Re{B} - Im{A}*Im{B} */
+        accR = vmlaq_f32(accR,vec3.val[0],vec4.val[0]);
+        accR = vmlsq_f32(accR,vec3.val[1],vec4.val[1]);
+
+	/* Im{C} = Re{A}*Im{B} + Im{A}*Re{B} */
+        accI = vmlaq_f32(accI,vec3.val[1],vec4.val[0]);
+        accI = vmlaq_f32(accI,vec3.val[0],vec4.val[1]);
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    accum = vpadd_f32(vget_low_f32(accR), vget_high_f32(accR));
+    real_sum += accum[0] + accum[1];
+
+    accum = vpadd_f32(vget_low_f32(accI), vget_high_f32(accI));
+    imag_sum += accum[0] + accum[1];
+
+    /* Tail */
+    blkCnt = numSamples & 0x7;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = numSamples >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
 
-      real_sum += a0 * c0;
-      imag_sum += a0 * d0;
-      real_sum -= b0 * d0;
-      imag_sum += b0 * c0;
+    real_sum += a0 * c0;
+    imag_sum += a0 * d0;
+    real_sum -= b0 * d0;
+    imag_sum += b0 * c0;
 
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
 
-      real_sum += a0 * c0;
-      imag_sum += a0 * d0;
-      real_sum -= b0 * d0;
-      imag_sum += b0 * c0;
+    real_sum += a0 * c0;
+    imag_sum += a0 * d0;
+    real_sum -= b0 * d0;
+    imag_sum += b0 * c0;
 
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
 
-      real_sum += a0 * c0;
-      imag_sum += a0 * d0;
-      real_sum -= b0 * d0;
-      imag_sum += b0 * c0;
+    real_sum += a0 * c0;
+    imag_sum += a0 * d0;
+    real_sum -= b0 * d0;
+    imag_sum += b0 * c0;
 
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
 
-      real_sum += a0 * c0;
-      imag_sum += a0 * d0;
-      real_sum -= b0 * d0;
-      imag_sum += b0 * c0;
+    real_sum += a0 * c0;
+    imag_sum += a0 * d0;
+    real_sum -= b0 * d0;
+    imag_sum += b0 * c0;
 
-      /* Decrement the loop counter */
-      blkCnt--;
+    /* Decrement loop counter */
+    blkCnt--;
   }
 
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = numSamples & 0x3U;
-
-  while (blkCnt > 0U)
-  {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;
-
-      real_sum += a0 * c0;
-      imag_sum += a0 * d0;
-      real_sum -= b0 * d0;
-      imag_sum += b0 * c0;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-  }
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
 
-  while (numSamples > 0U)
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
   {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
 
-      real_sum += a0 * c0;
-      imag_sum += a0 * d0;
-      real_sum -= b0 * d0;
-      imag_sum += b0 * c0;
+    real_sum += a0 * c0;
+    imag_sum += a0 * d0;
+    real_sum -= b0 * d0;
+    imag_sum += b0 * c0;
 
-      /* Decrement the loop counter */
-      numSamples--;
+    /* Decrement loop counter */
+    blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
-  /* Store the real and imaginary results in the destination buffers */
+  /* Store real and imaginary result in destination buffer. */
   *realResult = real_sum;
   *imagResult = imag_sum;
 }
 
 /**
- * @} end of cmplx_dot_prod group
+  @} end of cmplx_dot_prod group
  */
diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
index 9e23a01..2ecd801 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_cmplx_dot_prod_q15.c
  * Description:  Processing function for the Q15 Complex Dot product
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,143 +29,120 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupCmplxMath
+  @ingroup groupCmplxMath
  */
 
 /**
- * @addtogroup cmplx_dot_prod
- * @{
+  @addtogroup cmplx_dot_prod
+  @{
  */
 
 /**
- * @brief  Q15 complex dot product
- * @param  *pSrcA points to the first input vector
- * @param  *pSrcB points to the second input vector
- * @param  numSamples number of complex samples in each vector
- * @param  *realResult real part of the result returned here
- * @param  *imagResult imaginary part of the result returned here
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result.
- * These are accumulated in a 64-bit accumulator with 34.30 precision.
- * As a final step, the accumulators are converted to 8.24 format.
- * The return results <code>realResult</code> and <code>imagResult</code> are in 8.24 format.
+  @brief         Q15 complex dot product.
+  @param[in]     pSrcA       points to the first input vector
+  @param[in]     pSrcB       points to the second input vector
+  @param[in]     numSamples  number of samples in each vector
+  @param[out]    realResult  real part of the result returned here
+  @param[out]    imagResult  imaginary part of the result returned her
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result.
+                   These are accumulated in a 64-bit accumulator with 34.30 precision.
+                   As a final step, the accumulators are converted to 8.24 format.
+                   The return results <code>realResult</code> and <code>imagResult</code> are in 8.24 format.
  */
 
 void arm_cmplx_dot_prod_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  uint32_t numSamples,
-  q31_t * realResult,
-  q31_t * imagResult)
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        uint32_t numSamples,
+        q31_t * realResult,
+        q31_t * imagResult)
 {
-  q63_t real_sum = 0, imag_sum = 0;              /* Temporary result storage */
-  q15_t a0,b0,c0,d0;
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t real_sum = 0, imag_sum = 0;              /* Temporary result variables */
+        q15_t a0,b0,c0,d0;
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = numSamples >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
 
-      real_sum += (q31_t)a0 * c0;
-      imag_sum += (q31_t)a0 * d0;
-      real_sum -= (q31_t)b0 * d0;
-      imag_sum += (q31_t)b0 * c0;
+    real_sum += (q31_t)a0 * c0;
+    imag_sum += (q31_t)a0 * d0;
+    real_sum -= (q31_t)b0 * d0;
+    imag_sum += (q31_t)b0 * c0;
 
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
 
-      real_sum += (q31_t)a0 * c0;
-      imag_sum += (q31_t)a0 * d0;
-      real_sum -= (q31_t)b0 * d0;
-      imag_sum += (q31_t)b0 * c0;
+    real_sum += (q31_t)a0 * c0;
+    imag_sum += (q31_t)a0 * d0;
+    real_sum -= (q31_t)b0 * d0;
+    imag_sum += (q31_t)b0 * c0;
 
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
 
-      real_sum += (q31_t)a0 * c0;
-      imag_sum += (q31_t)a0 * d0;
-      real_sum -= (q31_t)b0 * d0;
-      imag_sum += (q31_t)b0 * c0;
+    real_sum += (q31_t)a0 * c0;
+    imag_sum += (q31_t)a0 * d0;
+    real_sum -= (q31_t)b0 * d0;
+    imag_sum += (q31_t)b0 * c0;
 
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
 
-      real_sum += (q31_t)a0 * c0;
-      imag_sum += (q31_t)a0 * d0;
-      real_sum -= (q31_t)b0 * d0;
-      imag_sum += (q31_t)b0 * c0;
+    real_sum += (q31_t)a0 * c0;
+    imag_sum += (q31_t)a0 * d0;
+    real_sum -= (q31_t)b0 * d0;
+    imag_sum += (q31_t)b0 * c0;
 
-      /* Decrement the loop counter */
-      blkCnt--;
+    /* Decrement loop counter */
+    blkCnt--;
   }
 
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = numSamples % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;
-
-      real_sum += (q31_t)a0 * c0;
-      imag_sum += (q31_t)a0 * d0;
-      real_sum -= (q31_t)b0 * d0;
-      imag_sum += (q31_t)b0 * c0;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
 
-  while (numSamples > 0U)
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
   {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
 
-      real_sum += a0 * c0;
-      imag_sum += a0 * d0;
-      real_sum -= b0 * d0;
-      imag_sum += b0 * c0;
+    real_sum += (q31_t)a0 * c0;
+    imag_sum += (q31_t)a0 * d0;
+    real_sum -= (q31_t)b0 * d0;
+    imag_sum += (q31_t)b0 * c0;
 
-
-      /* Decrement the loop counter */
-      numSamples--;
+    /* Decrement loop counter */
+    blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
-  /* Store the real and imaginary results in 8.24 format  */
+  /* Store real and imaginary result in 8.24 format  */
   /* Convert real data in 34.30 to 8.24 by 6 right shifts */
   *realResult = (q31_t) (real_sum >> 6);
   /* Convert imaginary data in 34.30 to 8.24 by 6 right shifts */
@@ -173,5 +150,5 @@
 }
 
 /**
- * @} end of cmplx_dot_prod group
+  @} end of cmplx_dot_prod group
  */
diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
index 6eb5b6e..d715d98 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_cmplx_dot_prod_q31.c
  * Description:  Q31 complex dot product
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,147 +29,125 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupCmplxMath
+  @ingroup groupCmplxMath
  */
 
 /**
- * @addtogroup cmplx_dot_prod
- * @{
+  @addtogroup cmplx_dot_prod
+  @{
  */
 
 /**
- * @brief  Q31 complex dot product
- * @param  *pSrcA points to the first input vector
- * @param  *pSrcB points to the second input vector
- * @param  numSamples number of complex samples in each vector
- * @param  *realResult real part of the result returned here
- * @param  *imagResult imaginary part of the result returned here
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format.
- * The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits.
- * Additions are nonsaturating and no overflow will occur as long as <code>numSamples</code> is less than 32768.
- * The return results <code>realResult</code> and <code>imagResult</code> are in 16.48 format.
- * Input down scaling is not required.
+  @brief         Q31 complex dot product.
+  @param[in]     pSrcA       points to the first input vector
+  @param[in]     pSrcB       points to the second input vector
+  @param[in]     numSamples  number of samples in each vector
+  @param[out]    realResult  real part of the result returned here
+  @param[out]    imagResult  imaginary part of the result returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format.
+                   The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits.
+                   Additions are nonsaturating and no overflow will occur as long as <code>numSamples</code> is less than 32768.
+                   The return results <code>realResult</code> and <code>imagResult</code> are in 16.48 format.
+                   Input down scaling is not required.
  */
 
 void arm_cmplx_dot_prod_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  uint32_t numSamples,
-  q63_t * realResult,
-  q63_t * imagResult)
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        uint32_t numSamples,
+        q63_t * realResult,
+        q63_t * imagResult)
 {
-  q63_t real_sum = 0, imag_sum = 0;              /* Temporary result storage */
-  q31_t a0,b0,c0,d0;
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t real_sum = 0, imag_sum = 0;              /* Temporary result variables */
+        q31_t a0,b0,c0,d0;
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = numSamples >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
 
-      real_sum += ((q63_t)a0 * c0) >> 14;
-      imag_sum += ((q63_t)a0 * d0) >> 14;
-      real_sum -= ((q63_t)b0 * d0) >> 14;
-      imag_sum += ((q63_t)b0 * c0) >> 14;
+    real_sum += ((q63_t)a0 * c0) >> 14;
+    imag_sum += ((q63_t)a0 * d0) >> 14;
+    real_sum -= ((q63_t)b0 * d0) >> 14;
+    imag_sum += ((q63_t)b0 * c0) >> 14;
 
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
 
-      real_sum += ((q63_t)a0 * c0) >> 14;
-      imag_sum += ((q63_t)a0 * d0) >> 14;
-      real_sum -= ((q63_t)b0 * d0) >> 14;
-      imag_sum += ((q63_t)b0 * c0) >> 14;
+    real_sum += ((q63_t)a0 * c0) >> 14;
+    imag_sum += ((q63_t)a0 * d0) >> 14;
+    real_sum -= ((q63_t)b0 * d0) >> 14;
+    imag_sum += ((q63_t)b0 * c0) >> 14;
 
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
 
-      real_sum += ((q63_t)a0 * c0) >> 14;
-      imag_sum += ((q63_t)a0 * d0) >> 14;
-      real_sum -= ((q63_t)b0 * d0) >> 14;
-      imag_sum += ((q63_t)b0 * c0) >> 14;
+    real_sum += ((q63_t)a0 * c0) >> 14;
+    imag_sum += ((q63_t)a0 * d0) >> 14;
+    real_sum -= ((q63_t)b0 * d0) >> 14;
+    imag_sum += ((q63_t)b0 * c0) >> 14;
 
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
 
-      real_sum += ((q63_t)a0 * c0) >> 14;
-      imag_sum += ((q63_t)a0 * d0) >> 14;
-      real_sum -= ((q63_t)b0 * d0) >> 14;
-      imag_sum += ((q63_t)b0 * c0) >> 14;
+    real_sum += ((q63_t)a0 * c0) >> 14;
+    imag_sum += ((q63_t)a0 * d0) >> 14;
+    real_sum -= ((q63_t)b0 * d0) >> 14;
+    imag_sum += ((q63_t)b0 * c0) >> 14;
 
-      /* Decrement the loop counter */
-      blkCnt--;
+    /* Decrement loop counter */
+    blkCnt--;
   }
 
-  /* If the numSamples  is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = numSamples % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;
-
-      real_sum += ((q63_t)a0 * c0) >> 14;
-      imag_sum += ((q63_t)a0 * d0) >> 14;
-      real_sum -= ((q63_t)b0 * d0) >> 14;
-      imag_sum += ((q63_t)b0 * c0) >> 14;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
 
-  while (numSamples > 0U)
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
   {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
 
-      real_sum += ((q63_t)a0 * c0) >> 14;
-      imag_sum += ((q63_t)a0 * d0) >> 14;
-      real_sum -= ((q63_t)b0 * d0) >> 14;
-      imag_sum += ((q63_t)b0 * c0) >> 14;
+    real_sum += ((q63_t)a0 * c0) >> 14;
+    imag_sum += ((q63_t)a0 * d0) >> 14;
+    real_sum -= ((q63_t)b0 * d0) >> 14;
+    imag_sum += ((q63_t)b0 * c0) >> 14;
 
-      /* Decrement the loop counter */
-      numSamples--;
+    /* Decrement loop counter */
+    blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
-  /* Store the real and imaginary results in 16.48 format  */
+  /* Store real and imaginary result in 16.48 format  */
   *realResult = real_sum;
   *imagResult = imag_sum;
 }
 
 /**
- * @} end of cmplx_dot_prod group
+  @} end of cmplx_dot_prod group
  */
diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c
index 95aaf1e..84812dc 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_cmplx_mag_f32.c
  * Description:  Floating-point complex magnitude
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,125 +29,160 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupCmplxMath
+  @ingroup groupCmplxMath
  */
 
 /**
- * @defgroup cmplx_mag Complex Magnitude
- *
- * Computes the magnitude of the elements of a complex data vector.
- *
- * The <code>pSrc</code> points to the source data and
- * <code>pDst</code> points to the where the result should be written.
- * <code>numSamples</code> specifies the number of complex samples
- * in the input array and the data is stored in an interleaved fashion
- * (real, imag, real, imag, ...).
- * The input array has a total of <code>2*numSamples</code> values;
- * the output array has a total of <code>numSamples</code> values.
- * The underlying algorithm is used:
- *
- * <pre>
- * for(n=0; n<numSamples; n++) {
- *     pDst[n] = sqrt(pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2);
- * }
- * </pre>
- *
- * There are separate functions for floating-point, Q15, and Q31 data types.
+  @defgroup cmplx_mag Complex Magnitude
+
+  Computes the magnitude of the elements of a complex data vector.
+
+  The <code>pSrc</code> points to the source data and
+  <code>pDst</code> points to the where the result should be written.
+  <code>numSamples</code> specifies the number of complex samples
+  in the input array and the data is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  The input array has a total of <code>2*numSamples</code> values;
+  the output array has a total of <code>numSamples</code> values.
+
+  The underlying algorithm is used:
+
+  <pre>
+  for (n = 0; n < numSamples; n++) {
+      pDst[n] = sqrt(pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2);
+  }
+  </pre>
+
+  There are separate functions for floating-point, Q15, and Q31 data types.
  */
 
 /**
- * @addtogroup cmplx_mag
- * @{
- */
-/**
- * @brief Floating-point complex magnitude.
- * @param[in]       *pSrc points to complex input buffer
- * @param[out]      *pDst points to real output buffer
- * @param[in]       numSamples number of complex samples in the input vector
- * @return none.
- *
+  @addtogroup cmplx_mag
+  @{
  */
 
+/**
+  @brief         Floating-point complex magnitude.
+  @param[in]     pSrc        points to input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+ */
 
 void arm_cmplx_mag_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples)
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t numSamples)
 {
-  float32_t realIn, imagIn;                      /* Temporary variables to hold input values */
-
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
   uint32_t blkCnt;                               /* loop counter */
+  float32_t real, imag;                      /* Temporary variables to hold input values */
 
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2U;
+#if defined(ARM_MATH_NEON)
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
+  float32x4x2_t vecA;
+  float32x4_t vRealA;
+  float32x4_t vImagA;
+  float32x4_t vMagSqA;
+
+  float32x4x2_t vecB;
+  float32x4_t vRealB;
+  float32x4_t vImagB;
+  float32x4_t vMagSqB;
+
+  /* Loop unrolling: Compute 8 outputs at a time */
+  blkCnt = numSamples >> 3;
+
   while (blkCnt > 0U)
   {
+    /* out = sqrt((real * real) + (imag * imag)) */
 
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    /* store the result in the destination buffer. */
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
+    vecA = vld2q_f32(pSrc);
+    pSrc += 8;
 
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
+    vecB = vld2q_f32(pSrc);
+    pSrc += 8;
 
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
+    vRealA = vmulq_f32(vecA.val[0], vecA.val[0]);
+    vImagA = vmulq_f32(vecA.val[1], vecA.val[1]);
+    vMagSqA = vaddq_f32(vRealA, vImagA);
 
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
+    vRealB = vmulq_f32(vecB.val[0], vecB.val[0]);
+    vImagB = vmulq_f32(vecB.val[1], vecB.val[1]);
+    vMagSqB = vaddq_f32(vRealB, vImagB);
 
+    /* Store the result in the destination buffer. */
+    vst1q_f32(pDst, __arm_vec_sqrt_f32_neon(vMagSqA));
+    pDst += 4;
+
+    vst1q_f32(pDst, __arm_vec_sqrt_f32_neon(vMagSqB));
+    pDst += 4;
 
     /* Decrement the loop counter */
     blkCnt--;
   }
 
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4U;
-
-  while (blkCnt > 0U)
-  {
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    /* store the result in the destination buffer. */
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
+  blkCnt = numSamples & 7;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  while (numSamples > 0U)
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
   {
-    /* out = sqrt((real * real) + (imag * imag)) */
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    /* store the result in the destination buffer. */
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
+    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
 
-    /* Decrement the loop counter */
-    numSamples--;
+    real = *pSrc++;
+    imag = *pSrc++;
+
+    /* store result in destination buffer. */
+    arm_sqrt_f32((real * real) + (imag * imag), pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    arm_sqrt_f32((real * real) + (imag * imag), pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    arm_sqrt_f32((real * real) + (imag * imag), pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    arm_sqrt_f32((real * real) + (imag * imag), pDst++);
+
+    /* Decrement loop counter */
+    blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+
+    /* store result in destination buffer. */
+    arm_sqrt_f32((real * real) + (imag * imag), pDst++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
 
 }
 
 /**
- * @} end of cmplx_mag group
+  @} end of cmplx_mag group
  */
diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
index 03d9b2a..a493274 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_cmplx_mag_q15.c
  * Description:  Q15 complex magnitude
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,113 +29,134 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupCmplxMath
+  @ingroup groupCmplxMath
  */
 
 /**
- * @addtogroup cmplx_mag
- * @{
+  @addtogroup cmplx_mag
+  @{
  */
 
-
 /**
- * @brief  Q15 complex magnitude
- * @param  *pSrc points to the complex input vector
- * @param  *pDst points to the real output vector
- * @param  numSamples number of complex samples in the input vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format.
+  @brief         Q15 complex magnitude.
+  @param[in]     pSrc        points to input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format.
  */
 
 void arm_cmplx_mag_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples)
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples)
 {
-  q31_t acc0, acc1;                              /* Accumulators */
+        uint32_t blkCnt;                               /* Loop counter */
 
 #if defined (ARM_MATH_DSP)
+        q31_t in;
+        q31_t acc0;                                    /* Accumulators */
+#else
+       q15_t real, imag;                              /* Temporary input variables */
+       q31_t acc0, acc1;                              /* Accumulators */
+#endif
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in1, in2, in3, in4;
-  q31_t acc2, acc3;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = numSamples >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while (blkCnt > 0U)
-  {
-
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    in1 = *__SIMD32(pSrc)++;
-    in2 = *__SIMD32(pSrc)++;
-    in3 = *__SIMD32(pSrc)++;
-    in4 = *__SIMD32(pSrc)++;
-
-    acc0 = __SMUAD(in1, in1);
-    acc1 = __SMUAD(in2, in2);
-    acc2 = __SMUAD(in3, in3);
-    acc3 = __SMUAD(in4, in4);
-
-    /* store the result in 2.14 format in the destination buffer. */
-    arm_sqrt_q15((q15_t) ((acc0) >> 17), pDst++);
-    arm_sqrt_q15((q15_t) ((acc1) >> 17), pDst++);
-    arm_sqrt_q15((q15_t) ((acc2) >> 17), pDst++);
-    arm_sqrt_q15((q15_t) ((acc3) >> 17), pDst++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4U;
-
   while (blkCnt > 0U)
   {
     /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    in1 = *__SIMD32(pSrc)++;
-    acc0 = __SMUAD(in1, in1);
 
-    /* store the result in 2.14 format in the destination buffer. */
+#if defined (ARM_MATH_DSP)
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    /* store result in 2.14 format in destination buffer. */
     arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
 
-    /* Decrement the loop counter */
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+#else
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+
+    /* store result in 2.14 format in destination buffer. */
+    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
 #else
 
-  /* Run the below code for Cortex-M0 */
-  q15_t real, imag;                              /* Temporary variables to hold input values */
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
 
-  while (numSamples > 0U)
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
   {
-    /* out = sqrt(real * real + imag * imag) */
+    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
+#if defined (ARM_MATH_DSP)
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+
+    /* store result in 2.14 format in destination buffer. */
+    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+#else
     real = *pSrc++;
     imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
 
-    acc0 = (real * real);
-    acc1 = (imag * imag);
-
-    /* store the result in 2.14 format in the destination buffer. */
+    /* store result in 2.14 format in destination buffer. */
     arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+#endif
 
-    /* Decrement the loop counter */
-    numSamples--;
+    /* Decrement loop counter */
+    blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of cmplx_mag group
+  @} end of cmplx_mag group
  */
diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c
index 830ecb9..873e566 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_cmplx_mag_q31.c
  * Description:  Q31 complex magnitude
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,145 +29,102 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupCmplxMath
+  @ingroup groupCmplxMath
  */
 
 /**
- * @addtogroup cmplx_mag
- * @{
+  @addtogroup cmplx_mag
+  @{
  */
 
 /**
- * @brief  Q31 complex magnitude
- * @param  *pSrc points to the complex input vector
- * @param  *pDst points to the real output vector
- * @param  numSamples number of complex samples in the input vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function implements 1.31 by 1.31 multiplications and finally output is converted into 2.30 format.
- * Input down scaling is not required.
+  @brief         Q31 complex magnitude.
+  @param[in]     pSrc        points to input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function implements 1.31 by 1.31 multiplications and finally output is converted into 2.30 format.
+                   Input down scaling is not required.
  */
 
 void arm_cmplx_mag_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples)
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t numSamples)
 {
-  q31_t real, imag;                              /* Temporary variables to hold input values */
-  q31_t acc0, acc1;                              /* Accumulators */
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t real, imag;                              /* Temporary input variables */
+        q31_t acc0, acc1;                              /* Accumulators */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t real1, real2, imag1, imag2;              /* Temporary variables to hold input values */
-  q31_t out1, out2, out3, out4;                  /* Accumulators */
-  q63_t mul1, mul2, mul3, mul4;                  /* Temporary variables */
-
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = numSamples >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while (blkCnt > 0U)
-  {
-    /* read complex input from source buffer */
-    real1 = pSrc[0];
-    imag1 = pSrc[1];
-    real2 = pSrc[2];
-    imag2 = pSrc[3];
-
-    /* calculate power of input values */
-    mul1 = (q63_t) real1 *real1;
-    mul2 = (q63_t) imag1 *imag1;
-    mul3 = (q63_t) real2 *real2;
-    mul4 = (q63_t) imag2 *imag2;
-
-    /* get the result to 3.29 format */
-    out1 = (q31_t) (mul1 >> 33);
-    out2 = (q31_t) (mul2 >> 33);
-    out3 = (q31_t) (mul3 >> 33);
-    out4 = (q31_t) (mul4 >> 33);
-
-    /* add real and imaginary accumulators */
-    out1 = out1 + out2;
-    out3 = out3 + out4;
-
-    /* read complex input from source buffer */
-    real1 = pSrc[4];
-    imag1 = pSrc[5];
-    real2 = pSrc[6];
-    imag2 = pSrc[7];
-
-    /* calculate square root */
-    arm_sqrt_q31(out1, &pDst[0]);
-
-    /* calculate power of input values */
-    mul1 = (q63_t) real1 *real1;
-
-    /* calculate square root */
-    arm_sqrt_q31(out3, &pDst[1]);
-
-    /* calculate power of input values */
-    mul2 = (q63_t) imag1 *imag1;
-    mul3 = (q63_t) real2 *real2;
-    mul4 = (q63_t) imag2 *imag2;
-
-    /* get the result to 3.29 format */
-    out1 = (q31_t) (mul1 >> 33);
-    out2 = (q31_t) (mul2 >> 33);
-    out3 = (q31_t) (mul3 >> 33);
-    out4 = (q31_t) (mul4 >> 33);
-
-    /* add real and imaginary accumulators */
-    out1 = out1 + out2;
-    out3 = out3 + out4;
-
-    /* calculate square root */
-    arm_sqrt_q31(out1, &pDst[2]);
-
-    /* increment destination by 8 to process next samples */
-    pSrc += 8U;
-
-    /* calculate square root */
-    arm_sqrt_q31(out3, &pDst[3]);
-
-    /* increment destination by 4 to process next samples */
-    pDst += 4U;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4U;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
   while (blkCnt > 0U)
   {
     /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
     real = *pSrc++;
     imag = *pSrc++;
     acc0 = (q31_t) (((q63_t) real * real) >> 33);
     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 2.30 format in the destination buffer. */
+
+    /* store result in 2.30 format in destination buffer. */
     arm_sqrt_q31(acc0 + acc1, pDst++);
 
-    /* Decrement the loop counter */
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+    arm_sqrt_q31(acc0 + acc1, pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+    arm_sqrt_q31(acc0 + acc1, pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+    arm_sqrt_q31(acc0 + acc1, pDst++);
+
+    /* Decrement loop counter */
     blkCnt--;
   }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+
+    /* store result in 2.30 format in destination buffer. */
+    arm_sqrt_q31(acc0 + acc1, pDst++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
 }
 
 /**
- * @} end of cmplx_mag group
+  @} end of cmplx_mag group
  */
diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
index 59127a2..99f051c 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_cmplx_mag_squared_f32.c
  * Description:  Floating-point complex magnitude squared
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,176 +29,156 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupCmplxMath
+  @ingroup groupCmplxMath
  */
 
 /**
- * @defgroup cmplx_mag_squared Complex Magnitude Squared
- *
- * Computes the magnitude squared of the elements of a complex data vector.
- *
- * The <code>pSrc</code> points to the source data and
- * <code>pDst</code> points to the where the result should be written.
- * <code>numSamples</code> specifies the number of complex samples
- * in the input array and the data is stored in an interleaved fashion
- * (real, imag, real, imag, ...).
- * The input array has a total of <code>2*numSamples</code> values;
- * the output array has a total of <code>numSamples</code> values.
- *
- * The underlying algorithm is used:
- *
- * <pre>
- * for(n=0; n<numSamples; n++) {
- *     pDst[n] = pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2;
- * }
- * </pre>
- *
- * There are separate functions for floating-point, Q15, and Q31 data types.
+  @defgroup cmplx_mag_squared Complex Magnitude Squared
+
+  Computes the magnitude squared of the elements of a complex data vector.
+
+  The <code>pSrc</code> points to the source data and
+  <code>pDst</code> points to the where the result should be written.
+  <code>numSamples</code> specifies the number of complex samples
+  in the input array and the data is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  The input array has a total of <code>2*numSamples</code> values;
+  the output array has a total of <code>numSamples</code> values.
+
+  The underlying algorithm is used:
+
+  <pre>
+  for (n = 0; n < numSamples; n++) {
+      pDst[n] = pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2;
+  }
+  </pre>
+
+  There are separate functions for floating-point, Q15, and Q31 data types.
  */
 
 /**
- * @addtogroup cmplx_mag_squared
- * @{
+  @addtogroup cmplx_mag_squared
+  @{
  */
 
-
 /**
- * @brief  Floating-point complex magnitude squared
- * @param[in]  *pSrc points to the complex input vector
- * @param[out]  *pDst points to the real output vector
- * @param[in]  numSamples number of complex samples in the input vector
- * @return none.
+  @brief         Floating-point complex magnitude squared.
+  @param[in]     pSrc        points to input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
  */
 
 void arm_cmplx_mag_squared_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples)
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t numSamples)
 {
-  float32_t real, imag;                          /* Temporary variables to store real and imaginary values */
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t real, imag;                          /* Temporary input variables */
 
-#if defined (ARM_MATH_DSP)
-  float32_t real1, real2, real3, real4;          /* Temporary variables to hold real values */
-  float32_t imag1, imag2, imag3, imag4;          /* Temporary variables to hold imaginary values */
-  float32_t mul1, mul2, mul3, mul4;              /* Temporary variables */
-  float32_t mul5, mul6, mul7, mul8;              /* Temporary variables */
-  float32_t out1, out2, out3, out4;              /* Temporary variables to hold output values */
+#if defined(ARM_MATH_NEON)
+  float32x4x2_t vecA;
+  float32x4_t vRealA;
+  float32x4_t vImagA;
+  float32x4_t vMagSqA;
 
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2U;
+  float32x4x2_t vecB;
+  float32x4_t vRealB;
+  float32x4_t vImagB;
+  float32x4_t vMagSqB;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
+  /* Loop unrolling: Compute 8 outputs at a time */
+  blkCnt = numSamples >> 3;
+
   while (blkCnt > 0U)
   {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    /* read real input sample from source buffer */
-    real1 = pSrc[0];
-    /* read imaginary input sample from source buffer */
-    imag1 = pSrc[1];
+    /* out = sqrt((real * real) + (imag * imag)) */
 
-    /* calculate power of real value */
-    mul1 = real1 * real1;
+    vecA = vld2q_f32(pSrc);
+    pSrc += 8;
 
-    /* read real input sample from source buffer */
-    real2 = pSrc[2];
+    vRealA = vmulq_f32(vecA.val[0], vecA.val[0]);
+    vImagA = vmulq_f32(vecA.val[1], vecA.val[1]);
+    vMagSqA = vaddq_f32(vRealA, vImagA);
 
-    /* calculate power of imaginary value */
-    mul2 = imag1 * imag1;
+    vecB = vld2q_f32(pSrc);
+    pSrc += 8;
 
-    /* read imaginary input sample from source buffer */
-    imag2 = pSrc[3];
+    vRealB = vmulq_f32(vecB.val[0], vecB.val[0]);
+    vImagB = vmulq_f32(vecB.val[1], vecB.val[1]);
+    vMagSqB = vaddq_f32(vRealB, vImagB);
 
-    /* calculate power of real value */
-    mul3 = real2 * real2;
+    /* Store the result in the destination buffer. */
+    vst1q_f32(pDst, vMagSqA);
+    pDst += 4;
 
-    /* read real input sample from source buffer */
-    real3 = pSrc[4];
-
-    /* calculate power of imaginary value */
-    mul4 = imag2 * imag2;
-
-    /* read imaginary input sample from source buffer */
-    imag3 = pSrc[5];
-
-    /* calculate power of real value */
-    mul5 = real3 * real3;
-    /* calculate power of imaginary value */
-    mul6 = imag3 * imag3;
-
-    /* read real input sample from source buffer */
-    real4 = pSrc[6];
-
-    /* accumulate real and imaginary powers */
-    out1 = mul1 + mul2;
-
-    /* read imaginary input sample from source buffer */
-    imag4 = pSrc[7];
-
-    /* accumulate real and imaginary powers */
-    out2 = mul3 + mul4;
-
-    /* calculate power of real value */
-    mul7 = real4 * real4;
-    /* calculate power of imaginary value */
-    mul8 = imag4 * imag4;
-
-    /* store output to destination */
-    pDst[0] = out1;
-
-    /* accumulate real and imaginary powers */
-    out3 = mul5 + mul6;
-
-    /* store output to destination */
-    pDst[1] = out2;
-
-    /* accumulate real and imaginary powers */
-    out4 = mul7 + mul8;
-
-    /* store output to destination */
-    pDst[2] = out3;
-
-    /* increment destination pointer by 8 to process next samples */
-    pSrc += 8U;
-
-    /* store output to destination */
-    pDst[3] = out4;
-
-    /* increment destination pointer by 4 to process next samples */
-    pDst += 4U;
+    vst1q_f32(pDst, vMagSqB);
+    pDst += 4;
 
     /* Decrement the loop counter */
     blkCnt--;
   }
 
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  blkCnt = numSamples & 7;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    *pDst++ = (real * real) + (imag * imag);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    *pDst++ = (real * real) + (imag * imag);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    *pDst++ = (real * real) + (imag * imag);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    *pDst++ = (real * real) + (imag * imag);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = numSamples % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
+  /* Initialize blkCnt with number of samples */
   blkCnt = numSamples;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
 
   while (blkCnt > 0U)
   {
     /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+
     real = *pSrc++;
     imag = *pSrc++;
 
-    /* out = (real * real) + (imag * imag) */
-    /* store the result in the destination buffer. */
+    /* store result in destination buffer. */
     *pDst++ = (real * real) + (imag * imag);
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
+
 }
 
 /**
- * @} end of cmplx_mag_squared group
+  @} end of cmplx_mag_squared group
  */
diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
index 3f740c3..fa5f4e6 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_cmplx_mag_squared_q15.c
  * Description:  Q15 complex magnitude squared
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,108 +29,133 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupCmplxMath
+  @ingroup groupCmplxMath
  */
 
 /**
- * @addtogroup cmplx_mag_squared
- * @{
+  @addtogroup cmplx_mag_squared
+  @{
  */
 
 /**
- * @brief  Q15 complex magnitude squared
- * @param  *pSrc points to the complex input vector
- * @param  *pDst points to the real output vector
- * @param  numSamples number of complex samples in the input vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.
+  @brief         Q15 complex magnitude squared.
+  @param[in]     pSrc        points to input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.
  */
 
 void arm_cmplx_mag_squared_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples)
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples)
 {
-  q31_t acc0, acc1;                              /* Accumulators */
+        uint32_t blkCnt;                               /* Loop counter */
 
 #if defined (ARM_MATH_DSP)
+        q31_t in;
+        q31_t acc0;                                    /* Accumulators */
+#else
+        q15_t real, imag;                              /* Temporary input variables */
+        q31_t acc0, acc1;                              /* Accumulators */
+#endif
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in1, in2, in3, in4;
-  q31_t acc2, acc3;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = numSamples >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    in1 = *__SIMD32(pSrc)++;
-    in2 = *__SIMD32(pSrc)++;
-    in3 = *__SIMD32(pSrc)++;
-    in4 = *__SIMD32(pSrc)++;
 
-    acc0 = __SMUAD(in1, in1);
-    acc1 = __SMUAD(in2, in2);
-    acc2 = __SMUAD(in3, in3);
-    acc3 = __SMUAD(in4, in4);
-
-    /* store the result in 3.13 format in the destination buffer. */
+#if defined (ARM_MATH_DSP)
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    /* store result in 3.13 format in destination buffer. */
     *pDst++ = (q15_t) (acc0 >> 17);
-    *pDst++ = (q15_t) (acc1 >> 17);
-    *pDst++ = (q15_t) (acc2 >> 17);
-    *pDst++ = (q15_t) (acc3 >> 17);
 
-    /* Decrement the loop counter */
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    *pDst++ = (q15_t) (acc0 >> 17);
+
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    *pDst++ = (q15_t) (acc0 >> 17);
+
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    *pDst++ = (q15_t) (acc0 >> 17);
+#else
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    /* store result in 3.13 format in destination buffer. */
+    *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = numSamples % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    in1 = *__SIMD32(pSrc)++;
-    acc0 = __SMUAD(in1, in1);
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ = (q15_t) (acc0 >> 17);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
-  q15_t real, imag;                              /* Temporary variables to store real and imaginary values */
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
 
-  while (numSamples > 0U)
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
   {
-    /* out = ((real * real) + (imag * imag)) */
+    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+
+#if defined (ARM_MATH_DSP)
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+
+    /* store result in 3.13 format in destination buffer. */
+    *pDst++ = (q15_t) (acc0 >> 17);
+#else
     real = *pSrc++;
     imag = *pSrc++;
-    acc0 = (real * real);
-    acc1 = (imag * imag);
-    /* store the result in 3.13 format in the destination buffer. */
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+
+    /* store result in 3.13 format in destination buffer. */
     *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
+#endif
 
-    /* Decrement the loop counter */
-    numSamples--;
+    /* Decrement loop counter */
+    blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of cmplx_mag_squared group
+  @} end of cmplx_mag_squared group
  */
diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
index c2b2c50..54863ef 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_cmplx_mag_squared_q31.c
  * Description:  Q31 complex magnitude squared
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,55 +29,43 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupCmplxMath
+  @ingroup groupCmplxMath
  */
 
 /**
- * @addtogroup cmplx_mag_squared
- * @{
+  @addtogroup cmplx_mag_squared
+  @{
  */
 
-
 /**
- * @brief  Q31 complex magnitude squared
- * @param  *pSrc points to the complex input vector
- * @param  *pDst points to the real output vector
- * @param  numSamples number of complex samples in the input vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.
- * Input down scaling is not required.
+  @brief         Q31 complex magnitude squared.
+  @param[in]     pSrc        points to input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.
+                   Input down scaling is not required.
  */
 
 void arm_cmplx_mag_squared_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples)
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t numSamples)
 {
-  q31_t real, imag;                              /* Temporary variables to store real and imaginary values */
-  q31_t acc0, acc1;                              /* Accumulators */
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t real, imag;                              /* Temporary input variables */
+        q31_t acc0, acc1;                              /* Accumulators */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-
-  /* loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = numSamples >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
 
     real = *pSrc++;
     imag = *pSrc++;
@@ -90,60 +78,52 @@
     imag = *pSrc++;
     acc0 = (q31_t) (((q63_t) real * real) >> 33);
     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
     *pDst++ = acc0 + acc1;
 
     real = *pSrc++;
     imag = *pSrc++;
     acc0 = (q31_t) (((q63_t) real * real) >> 33);
     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
     *pDst++ = acc0 + acc1;
 
-    /* Decrement the loop counter */
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+    *pDst++ = acc0 + acc1;
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = numSamples % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
 
-  while (numSamples > 0U)
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
   {
-    /* out = ((real * real) + (imag * imag)) */
+    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+
     real = *pSrc++;
     imag = *pSrc++;
     acc0 = (q31_t) (((q63_t) real * real) >> 33);
     acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
+
+    /* store result in 3.29 format in destination buffer. */
     *pDst++ = acc0 + acc1;
 
-    /* Decrement the loop counter */
-    numSamples--;
+    /* Decrement loop counter */
+    blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of cmplx_mag_squared group
+  @} end of cmplx_mag_squared group
  */
diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
index 3717591..8d14821 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_cmplx_mult_cmplx_f32.c
  * Description:  Floating-point complex-by-complex multiplication
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,168 +29,166 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupCmplxMath
+  @ingroup groupCmplxMath
  */
 
 /**
- * @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication
- *
- * Multiplies a complex vector by another complex vector and generates a complex result.
- * The data in the complex arrays is stored in an interleaved fashion
- * (real, imag, real, imag, ...).
- * The parameter <code>numSamples</code> represents the number of complex
- * samples processed.  The complex arrays have a total of <code>2*numSamples</code>
- * real values.
- *
- * The underlying algorithm is used:
- *
- * <pre>
- * for(n=0; n<numSamples; n++) {
- *     pDst[(2*n)+0] = pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
- *     pDst[(2*n)+1] = pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
- * }
- * </pre>
- *
- * There are separate functions for floating-point, Q15, and Q31 data types.
+  @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication
+
+  Multiplies a complex vector by another complex vector and generates a complex result.
+  The data in the complex arrays is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  The parameter <code>numSamples</code> represents the number of complex
+  samples processed.  The complex arrays have a total of <code>2*numSamples</code>
+  real values.
+
+  The underlying algorithm is used:
+
+  <pre>
+  for (n = 0; n < numSamples; n++) {
+      pDst[(2*n)+0] = pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
+      pDst[(2*n)+1] = pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
+  }
+  </pre>
+
+  There are separate functions for floating-point, Q15, and Q31 data types.
  */
 
 /**
- * @addtogroup CmplxByCmplxMult
- * @{
+  @addtogroup CmplxByCmplxMult
+  @{
  */
 
-
 /**
- * @brief  Floating-point complex-by-complex multiplication
- * @param[in]  *pSrcA points to the first input vector
- * @param[in]  *pSrcB points to the second input vector
- * @param[out]  *pDst  points to the output vector
- * @param[in]  numSamples number of complex samples in each vector
- * @return none.
+  @brief         Floating-point complex-by-complex multiplication.
+  @param[in]     pSrcA       points to first input vector
+  @param[in]     pSrcB       points to second input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
  */
 
 void arm_cmplx_mult_cmplx_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t numSamples)
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t numSamples)
 {
-  float32_t a1, b1, c1, d1;                      /* Temporary variables to store real and imaginary values */
-  uint32_t blkCnt;                               /* loop counters */
+    uint32_t blkCnt;                               /* Loop counter */
+    float32_t a, b, c, d;  /* Temporary variables to store real and imaginary values */
 
-#if defined (ARM_MATH_DSP)
+#if defined(ARM_MATH_NEON)
+    float32x4x2_t va, vb;
+    float32x4_t real, imag;
+    float32x4x2_t outCplx;
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t a2, b2, c2, d2;                      /* Temporary variables to store real and imaginary values */
-  float32_t acc1, acc2, acc3, acc4;
+    /* Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
 
+    while (blkCnt > 0U)
+    {
+        va = vld2q_f32(pSrcA);  // load & separate real/imag pSrcA (de-interleave 2)
+        vb = vld2q_f32(pSrcB);  // load & separate real/imag pSrcB
 
-  /* loop Unrolling */
+	/* Increment pointers */
+        pSrcA += 8;
+        pSrcB += 8;
+	
+	/* Re{C} = Re{A}*Re{B} - Im{A}*Im{B} */
+        outCplx.val[0] = vmulq_f32(va.val[0], vb.val[0]);
+        outCplx.val[0] = vmlsq_f32(outCplx.val[0], va.val[1], vb.val[1]);
+
+	/* Im{C} = Re{A}*Im{B} + Im{A}*Re{B} */
+        outCplx.val[1] = vmulq_f32(va.val[0], vb.val[1]);
+        outCplx.val[1] = vmlaq_f32(outCplx.val[1], va.val[1], vb.val[0]);
+
+        vst2q_f32(pDst, outCplx);
+
+	/* Increment pointer */
+        pDst += 8;
+
+	/* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = numSamples & 3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = numSamples >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a1 = *pSrcA;                /* A[2 * i] */
-    c1 = *pSrcB;                /* B[2 * i] */
+    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
+    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
 
-    b1 = *(pSrcA + 1);          /* A[2 * i + 1] */
-    acc1 = a1 * c1;             /* acc1 = A[2 * i] * B[2 * i] */
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    /* store result in destination buffer. */
+    *pDst++ = (a * c) - (b * d);
+    *pDst++ = (a * d) + (b * c);
 
-    a2 = *(pSrcA + 2);          /* A[2 * i + 2] */
-    acc2 = (b1 * c1);           /* acc2 = A[2 * i + 1] * B[2 * i] */
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (a * c) - (b * d);
+    *pDst++ = (a * d) + (b * c);
 
-    d1 = *(pSrcB + 1);          /* B[2 * i + 1] */
-    c2 = *(pSrcB + 2);          /* B[2 * i + 2] */
-    acc1 -= b1 * d1;            /* acc1 =      A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1] */
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (a * c) - (b * d);
+    *pDst++ = (a * d) + (b * c);
 
-    d2 = *(pSrcB + 3);          /* B[2 * i + 3] */
-    acc3 = a2 * c2;             /* acc3 =       A[2 * i + 2] * B[2 * i + 2] */
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (a * c) - (b * d);
+    *pDst++ = (a * d) + (b * c);
 
-    b2 = *(pSrcA + 3);          /* A[2 * i + 3] */
-    acc2 += (a1 * d1);          /* acc2 =      A[2 * i + 1] * B[2 * i] + A[2 * i] * B[2 * i + 1] */
-
-    a1 = *(pSrcA + 4);          /* A[2 * i + 4] */
-    acc4 = (a2 * d2);           /* acc4 =   A[2 * i + 2] * B[2 * i + 3] */
-
-    c1 = *(pSrcB + 4);          /* B[2 * i + 4] */
-    acc3 -= (b2 * d2);          /* acc3 =       A[2 * i + 2] * B[2 * i + 2] - A[2 * i + 3] * B[2 * i + 3] */
-    *pDst = acc1;               /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1] */
-
-    b1 = *(pSrcA + 5);          /* A[2 * i + 5] */
-    acc4 += b2 * c2;            /* acc4 =   A[2 * i + 2] * B[2 * i + 3] + A[2 * i + 3] * B[2 * i + 2] */
-
-    *(pDst + 1) = acc2;         /* C[2 * i + 1] = A[2 * i + 1] * B[2 * i] + A[2 * i] * B[2 * i + 1]  */
-    acc1 = (a1 * c1);
-
-    d1 = *(pSrcB + 5);
-    acc2 = (b1 * c1);
-
-    *(pDst + 2) = acc3;
-    *(pDst + 3) = acc4;
-
-    a2 = *(pSrcA + 6);
-    acc1 -= (b1 * d1);
-
-    c2 = *(pSrcB + 6);
-    acc2 += (a1 * d1);
-
-    b2 = *(pSrcA + 7);
-    acc3 = (a2 * c2);
-
-    d2 = *(pSrcB + 7);
-    acc4 = (b2 * c2);
-
-    *(pDst + 4) = acc1;
-    pSrcA += 8U;
-
-    acc3 -= (b2 * d2);
-    acc4 += (a2 * d2);
-
-    *(pDst + 5) = acc2;
-    pSrcB += 8U;
-
-    *(pDst + 6) = acc3;
-    *(pDst + 7) = acc4;
-
-    pDst += 8U;
-
-    /* Decrement the numSamples loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = numSamples % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
+  /* Initialize blkCnt with number of samples */
   blkCnt = numSamples;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
 
   while (blkCnt > 0U)
   {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a1 = *pSrcA++;
-    b1 = *pSrcA++;
-    c1 = *pSrcB++;
-    d1 = *pSrcB++;
+    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
+    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
 
-    /* store the result in the destination buffer. */
-    *pDst++ = (a1 * c1) - (b1 * d1);
-    *pDst++ = (a1 * d1) + (b1 * c1);
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
 
-    /* Decrement the numSamples loop counter */
+    /* store result in destination buffer. */
+    *pDst++ = (a * c) - (b * d);
+    *pDst++ = (a * d) + (b * c);
+
+    /* Decrement loop counter */
     blkCnt--;
   }
+
 }
 
 /**
- * @} end of CmplxByCmplxMult group
+  @} end of CmplxByCmplxMult group
  */
diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
index 2869837..6659427 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_cmplx_mult_cmplx_q15.c
  * Description:  Q15 complex-by-complex multiplication
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,153 +29,108 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupCmplxMath
+  @ingroup groupCmplxMath
  */
 
 /**
- * @addtogroup CmplxByCmplxMult
- * @{
+  @addtogroup CmplxByCmplxMult
+  @{
  */
 
 /**
- * @brief  Q15 complex-by-complex multiplication
- * @param[in]  *pSrcA points to the first input vector
- * @param[in]  *pSrcB points to the second input vector
- * @param[out]  *pDst  points to the output vector
- * @param[in]  numSamples number of complex samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.
+  @brief         Q15 complex-by-complex multiplication.
+  @param[in]     pSrcA       points to first input vector
+  @param[in]     pSrcB       points to second input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.
  */
 
 void arm_cmplx_mult_cmplx_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t numSamples)
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t numSamples)
 {
-  q15_t a, b, c, d;                              /* Temporary variables to store real and imaginary values */
+        uint32_t blkCnt;                               /* Loop counter */
+        q15_t a, b, c, d;                              /* Temporary variables */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counters */
-
-  /* loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = numSamples >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
+    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
+    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
 
     a = *pSrcA++;
     b = *pSrcA++;
     c = *pSrcB++;
     d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
+    /* store result in 3.13 format in destination buffer. */
+    *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
+    *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
 
     a = *pSrcA++;
     b = *pSrcA++;
     c = *pSrcB++;
     d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
+    *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
+    *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
 
     a = *pSrcA++;
     b = *pSrcA++;
     c = *pSrcB++;
     d = *pSrcB++;
+    *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
+    *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
 
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
+    *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
 
-    /* Decrement the blockSize loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = numSamples % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
 
-  while (numSamples > 0U)
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
   {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
+    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
+    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
+
     a = *pSrcA++;
     b = *pSrcA++;
     c = *pSrcB++;
     d = *pSrcB++;
 
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
+    /* store result in 3.13 format in destination buffer. */
+    *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
+    *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
 
-    /* Decrement the blockSize loop counter */
-    numSamples--;
+    /* Decrement loop counter */
+    blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of CmplxByCmplxMult group
+  @} end of CmplxByCmplxMult group
  */
diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
index b01c4f6..f6d6dc6 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_cmplx_mult_cmplx_q31.c
  * Description:  Q31 complex-by-complex multiplication
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,286 +29,109 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupCmplxMath
+  @ingroup groupCmplxMath
  */
 
 /**
- * @addtogroup CmplxByCmplxMult
- * @{
+  @addtogroup CmplxByCmplxMult
+  @{
  */
 
-
 /**
- * @brief  Q31 complex-by-complex multiplication
- * @param[in]  *pSrcA points to the first input vector
- * @param[in]  *pSrcB points to the second input vector
- * @param[out]  *pDst  points to the output vector
- * @param[in]  numSamples number of complex samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.
- * Input down scaling is not required.
+  @brief         Q31 complex-by-complex multiplication.
+  @param[in]     pSrcA       points to first input vector
+  @param[in]     pSrcB       points to second input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.
+                   Input down scaling is not required.
  */
 
 void arm_cmplx_mult_cmplx_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t numSamples)
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t numSamples)
 {
-  q31_t a, b, c, d;                              /* Temporary variables to store real and imaginary values */
-  uint32_t blkCnt;                               /* loop counters */
-  q31_t mul1, mul2, mul3, mul4;
-  q31_t out1, out2;
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t a, b, c, d;                              /* Temporary variables */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = numSamples >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
+    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
+    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
 
     a = *pSrcA++;
     b = *pSrcA++;
     c = *pSrcB++;
     d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
+    /* store result in 3.29 format in destination buffer. */
+    *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
+    *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
 
     a = *pSrcA++;
     b = *pSrcA++;
     c = *pSrcB++;
     d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
+    *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
+    *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
 
     a = *pSrcA++;
     b = *pSrcA++;
     c = *pSrcB++;
     d = *pSrcB++;
+    *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
+    *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
 
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
+    *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
 
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    /* Decrement the blockSize loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = numSamples % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
 
-  /* loop Unrolling */
-  blkCnt = numSamples >> 1U;
-
-  /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.
-   ** a second loop below computes the remaining 1 sample. */
-  while (blkCnt > 0U)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 2, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x2U;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
+    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
+    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
+
     a = *pSrcA++;
     b = *pSrcA++;
     c = *pSrcB++;
     d = *pSrcB++;
 
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
+    /* store result in 3.29 format in destination buffer. */
+    *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
+    *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
 
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    /* Decrement the blockSize loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of CmplxByCmplxMult group
+  @} end of CmplxByCmplxMult group
  */
diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
index 8c7ca31..9651999 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_cmplx_mult_real_f32.c
  * Description:  Floating-point complex by real multiplication
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,185 +29,141 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupCmplxMath
+  @ingroup groupCmplxMath
  */
 
 /**
- * @defgroup CmplxByRealMult Complex-by-Real Multiplication
- *
- * Multiplies a complex vector by a real vector and generates a complex result.
- * The data in the complex arrays is stored in an interleaved fashion
- * (real, imag, real, imag, ...).
- * The parameter <code>numSamples</code> represents the number of complex
- * samples processed.  The complex arrays have a total of <code>2*numSamples</code>
- * real values while the real array has a total of <code>numSamples</code>
- * real values.
- *
- * The underlying algorithm is used:
- *
- * <pre>
- * for(n=0; n<numSamples; n++) {
- *     pCmplxDst[(2*n)+0] = pSrcCmplx[(2*n)+0] * pSrcReal[n];
- *     pCmplxDst[(2*n)+1] = pSrcCmplx[(2*n)+1] * pSrcReal[n];
- * }
- * </pre>
- *
- * There are separate functions for floating-point, Q15, and Q31 data types.
+  @defgroup CmplxByRealMult Complex-by-Real Multiplication
+
+  Multiplies a complex vector by a real vector and generates a complex result.
+  The data in the complex arrays is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  The parameter <code>numSamples</code> represents the number of complex
+  samples processed.  The complex arrays have a total of <code>2*numSamples</code>
+  real values while the real array has a total of <code>numSamples</code>
+  real values.
+
+  The underlying algorithm is used:
+
+  <pre>
+  for (n = 0; n < numSamples; n++) {
+      pCmplxDst[(2*n)+0] = pSrcCmplx[(2*n)+0] * pSrcReal[n];
+      pCmplxDst[(2*n)+1] = pSrcCmplx[(2*n)+1] * pSrcReal[n];
+  }
+  </pre>
+
+  There are separate functions for floating-point, Q15, and Q31 data types.
  */
 
 /**
- * @addtogroup CmplxByRealMult
- * @{
+  @addtogroup CmplxByRealMult
+  @{
  */
 
-
 /**
- * @brief  Floating-point complex-by-real multiplication
- * @param[in]  *pSrcCmplx points to the complex input vector
- * @param[in]  *pSrcReal points to the real input vector
- * @param[out]  *pCmplxDst points to the complex output vector
- * @param[in]  numSamples number of samples in each vector
- * @return none.
+  @brief         Floating-point complex-by-real multiplication.
+  @param[in]     pSrcCmplx   points to complex input vector
+  @param[in]     pSrcReal    points to real input vector
+  @param[out]    pCmplxDst   points to complex output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
  */
 
 void arm_cmplx_mult_real_f32(
-  float32_t * pSrcCmplx,
-  float32_t * pSrcReal,
-  float32_t * pCmplxDst,
-  uint32_t numSamples)
+  const float32_t * pSrcCmplx,
+  const float32_t * pSrcReal,
+        float32_t * pCmplxDst,
+        uint32_t numSamples)
 {
-  float32_t in;                                  /* Temporary variable to store input value */
-  uint32_t blkCnt;                               /* loop counters */
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t in;                                  /* Temporary variable */
 
-#if defined (ARM_MATH_DSP)
+#if defined(ARM_MATH_NEON)
+    float32x4_t r;
+    float32x4x2_t ab,outCplx;
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t inA1, inA2, inA3, inA4;              /* Temporary variables to hold input data */
-  float32_t inA5, inA6, inA7, inA8;              /* Temporary variables to hold input data */
-  float32_t inB1, inB2, inB3, inB4;              /* Temporary variables to hold input data */
-  float32_t out1, out2, out3, out4;              /* Temporary variables to hold output data */
-  float32_t out5, out6, out7, out8;              /* Temporary variables to hold output data */
+    /* Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
 
-  /* loop Unrolling */
+    while (blkCnt > 0U)
+    {
+        ab = vld2q_f32(pSrcCmplx);  // load & separate real/imag pSrcA (de-interleave 2)
+        r = vld1q_f32(pSrcReal);  // load & separate real/imag pSrcB
+
+	/* Increment pointers */
+        pSrcCmplx += 8;
+        pSrcReal += 4;
+
+        outCplx.val[0] = vmulq_f32(ab.val[0], r);
+        outCplx.val[1] = vmulq_f32(ab.val[1], r);
+
+        vst2q_f32(pCmplxDst, outCplx);
+        pCmplxDst += 8;
+
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = numSamples & 3;
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = numSamples >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    /* read input from complex input buffer */
-    inA1 = pSrcCmplx[0];
-    inA2 = pSrcCmplx[1];
-    /* read input from real input buffer */
-    inB1 = pSrcReal[0];
+    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
+    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
 
-    /* read input from complex input buffer */
-    inA3 = pSrcCmplx[2];
+    in = *pSrcReal++;
+    /* store result in destination buffer. */
+    *pCmplxDst++ = *pSrcCmplx++ * in;
+    *pCmplxDst++ = *pSrcCmplx++ * in;
 
-    /* multiply complex buffer real input with real buffer input */
-    out1 = inA1 * inB1;
+    in = *pSrcReal++;
+    *pCmplxDst++ = *pSrcCmplx++ * in;
+    *pCmplxDst++ = *pSrcCmplx++ * in;
 
-    /* read input from complex input buffer */
-    inA4 = pSrcCmplx[3];
+    in = *pSrcReal++;
+    *pCmplxDst++ = *pSrcCmplx++ * in;
+    *pCmplxDst++ = *pSrcCmplx++ * in;
 
-    /* multiply complex buffer imaginary input with real buffer input */
-    out2 = inA2 * inB1;
+    in = *pSrcReal++;
+    *pCmplxDst++ = *pSrcCmplx++* in;
+    *pCmplxDst++ = *pSrcCmplx++ * in;
 
-    /* read input from real input buffer */
-    inB2 = pSrcReal[1];
-    /* read input from complex input buffer */
-    inA5 = pSrcCmplx[4];
-
-    /* multiply complex buffer real input with real buffer input */
-    out3 = inA3 * inB2;
-
-    /* read input from complex input buffer */
-    inA6 = pSrcCmplx[5];
-    /* read input from real input buffer */
-    inB3 = pSrcReal[2];
-
-    /* multiply complex buffer imaginary input with real buffer input */
-    out4 = inA4 * inB2;
-
-    /* read input from complex input buffer */
-    inA7 = pSrcCmplx[6];
-
-    /* multiply complex buffer real input with real buffer input */
-    out5 = inA5 * inB3;
-
-    /* read input from complex input buffer */
-    inA8 = pSrcCmplx[7];
-
-    /* multiply complex buffer imaginary input with real buffer input */
-    out6 = inA6 * inB3;
-
-    /* read input from real input buffer */
-    inB4 = pSrcReal[3];
-
-    /* store result to destination bufer */
-    pCmplxDst[0] = out1;
-
-    /* multiply complex buffer real input with real buffer input */
-    out7 = inA7 * inB4;
-
-    /* store result to destination bufer */
-    pCmplxDst[1] = out2;
-
-    /* multiply complex buffer imaginary input with real buffer input */
-    out8 = inA8 * inB4;
-
-    /* store result to destination bufer */
-    pCmplxDst[2] = out3;
-    pCmplxDst[3] = out4;
-    pCmplxDst[4] = out5;
-
-    /* incremnet complex input buffer by 8 to process next samples */
-    pSrcCmplx += 8U;
-
-    /* store result to destination bufer */
-    pCmplxDst[5] = out6;
-
-    /* increment real input buffer by 4 to process next samples */
-    pSrcReal += 4U;
-
-    /* store result to destination bufer */
-    pCmplxDst[6] = out7;
-    pCmplxDst[7] = out8;
-
-    /* increment destination buffer by 8 to process next sampels */
-    pCmplxDst += 8U;
-
-    /* Decrement the numSamples loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = numSamples % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
+  /* Initialize blkCnt with number of samples */
   blkCnt = numSamples;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
 
   while (blkCnt > 0U)
   {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    in = *pSrcReal++;
-    /* store the result in the destination buffer. */
-    *pCmplxDst++ = (*pSrcCmplx++) * (in);
-    *pCmplxDst++ = (*pSrcCmplx++) * (in);
+    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
+    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
 
-    /* Decrement the numSamples loop counter */
+    in = *pSrcReal++;
+    /* store result in destination buffer. */
+    *pCmplxDst++ = *pSrcCmplx++ * in;
+    *pCmplxDst++ = *pSrcCmplx++ * in;
+
+    /* Decrement loop counter */
     blkCnt--;
   }
+
 }
 
 /**
- * @} end of CmplxByRealMult group
+  @} end of CmplxByRealMult group
  */
diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
index 340d852..4877d20 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_cmplx_mult_real_q15.c
  * Description:  Q15 complex by real multiplication
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,77 +29,71 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupCmplxMath
+  @ingroup groupCmplxMath
  */
 
 /**
- * @addtogroup CmplxByRealMult
- * @{
+  @addtogroup CmplxByRealMult
+  @{
  */
 
-
 /**
- * @brief  Q15 complex-by-real multiplication
- * @param[in]  *pSrcCmplx points to the complex input vector
- * @param[in]  *pSrcReal points to the real input vector
- * @param[out]  *pCmplxDst points to the complex output vector
- * @param[in]  numSamples number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
+  @brief         Q15 complex-by-real multiplication.
+  @param[in]     pSrcCmplx   points to complex input vector
+  @param[in]     pSrcReal    points to real input vector
+  @param[out]    pCmplxDst   points to complex output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
  */
 
 void arm_cmplx_mult_real_q15(
-  q15_t * pSrcCmplx,
-  q15_t * pSrcReal,
-  q15_t * pCmplxDst,
-  uint32_t numSamples)
+  const q15_t * pSrcCmplx,
+  const q15_t * pSrcReal,
+        q15_t * pCmplxDst,
+        uint32_t numSamples)
 {
-  q15_t in;                                      /* Temporary variable to store input value */
+        uint32_t blkCnt;                               /* Loop counter */
+        q15_t in;                                      /* Temporary variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
 
 #if defined (ARM_MATH_DSP)
+        q31_t inA1, inA2;                              /* Temporary variables to hold input data */
+        q31_t inB1;                                    /* Temporary variables to hold input data */
+        q15_t out1, out2, out3, out4;                  /* Temporary variables to hold output data */
+        q31_t mul1, mul2, mul3, mul4;                  /* Temporary variables to hold intermediate data */
+#endif
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counters */
-  q31_t inA1, inA2;                              /* Temporary variables to hold input data */
-  q31_t inB1;                                    /* Temporary variables to hold input data */
-  q15_t out1, out2, out3, out4;                  /* Temporary variables to hold output data */
-  q31_t mul1, mul2, mul3, mul4;                  /* Temporary variables to hold intermediate data */
-
-  /* loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = numSamples >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    /* read complex number both real and imaginary from complex input buffer */
-    inA1 = *__SIMD32(pSrcCmplx)++;
-    /* read two real values at a time from real input buffer */
-    inB1 = *__SIMD32(pSrcReal)++;
-    /* read complex number both real and imaginary from complex input buffer */
-    inA2 = *__SIMD32(pSrcCmplx)++;
+    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
+    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
+
+#if defined (ARM_MATH_DSP)
+    /* read 2 complex numbers both real and imaginary from complex input buffer */
+    inA1 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
+    inA2 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
+    /* read 2 real values at a time from real input buffer */
+    inB1 = read_q15x2_ia ((q15_t **) &pSrcReal);
 
     /* multiply complex number with real numbers */
 #ifndef ARM_MATH_BIG_ENDIAN
-
-    mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1));
+    mul1 = (q31_t) ((q15_t) (inA1)       * (q15_t) (inB1));
     mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1));
-    mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16));
+    mul3 = (q31_t) ((q15_t) (inA2)       * (q15_t) (inB1 >> 16));
     mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16));
-
 #else
-
     mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
-    mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16));
+    mul1 = (q31_t) ((q15_t) inA1         * (q15_t) (inB1 >> 16));
     mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1);
-    mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1);
-
+    mul3 = (q31_t) ((q15_t) inA2         * (q15_t) inB1);
 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     /* saturate the result */
@@ -109,27 +103,23 @@
     out4 = (q15_t) __SSAT(mul4 >> 15U, 16);
 
     /* pack real and imaginary outputs and store them to destination */
-    *__SIMD32(pCmplxDst)++ = __PKHBT(out1, out2, 16);
-    *__SIMD32(pCmplxDst)++ = __PKHBT(out3, out4, 16);
+    write_q15x2_ia (&pCmplxDst, __PKHBT(out1, out2, 16));
+    write_q15x2_ia (&pCmplxDst, __PKHBT(out3, out4, 16));
 
-    inA1 = *__SIMD32(pSrcCmplx)++;
-    inB1 = *__SIMD32(pSrcReal)++;
-    inA2 = *__SIMD32(pSrcCmplx)++;
+    inA1 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
+    inA2 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
+    inB1 = read_q15x2_ia ((q15_t **) &pSrcReal);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
-    mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1));
+    mul1 = (q31_t) ((q15_t) (inA1)       * (q15_t) (inB1));
     mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1));
-    mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16));
+    mul3 = (q31_t) ((q15_t) (inA2)       * (q15_t) (inB1 >> 16));
     mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16));
-
 #else
-
     mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
-    mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16));
+    mul1 = (q31_t) ((q15_t) inA1         * (q15_t) (inB1 >> 16));
     mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1);
     mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1);
-
 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     out1 = (q15_t) __SSAT(mul1 >> 15U, 16);
@@ -137,55 +127,56 @@
     out3 = (q15_t) __SSAT(mul3 >> 15U, 16);
     out4 = (q15_t) __SSAT(mul4 >> 15U, 16);
 
-    *__SIMD32(pCmplxDst)++ = __PKHBT(out1, out2, 16);
-    *__SIMD32(pCmplxDst)++ = __PKHBT(out3, out4, 16);
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4U;
-
-  while (blkCnt > 0U)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
+    write_q15x2_ia (&pCmplxDst, __PKHBT(out1, out2, 16));
+    write_q15x2_ia (&pCmplxDst, __PKHBT(out3, out4, 16));
+#else
     in = *pSrcReal++;
-    /* store the result in the destination buffer. */
-    *pCmplxDst++ =
-      (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
-    *pCmplxDst++ =
-      (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
 
-    /* Decrement the numSamples loop counter */
+    in = *pSrcReal++;
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+
+    in = *pSrcReal++;
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+
+    in = *pSrcReal++;
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+#endif
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
 #else
 
-  /* Run the below code for Cortex-M0 */
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
 
-  while (numSamples > 0U)
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
   {
-    /* realOut = realA * realB.            */
-    /* imagOut = imagA * realB.                */
+    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
+    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
+
     in = *pSrcReal++;
     /* store the result in the destination buffer. */
-    *pCmplxDst++ =
-      (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
-    *pCmplxDst++ =
-      (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
 
-    /* Decrement the numSamples loop counter */
-    numSamples--;
+    /* Decrement loop counter */
+    blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of CmplxByRealMult group
+  @} end of CmplxByRealMult group
  */
diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
index 19fc55b..906410f 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_cmplx_mult_real_q31.c
  * Description:  Q31 complex by real multiplication
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,183 +29,120 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupCmplxMath
+  @ingroup groupCmplxMath
  */
 
 /**
- * @addtogroup CmplxByRealMult
- * @{
+  @addtogroup CmplxByRealMult
+  @{
  */
 
-
 /**
- * @brief  Q31 complex-by-real multiplication
- * @param[in]  *pSrcCmplx points to the complex input vector
- * @param[in]  *pSrcReal points to the real input vector
- * @param[out]  *pCmplxDst points to the complex output vector
- * @param[in]  numSamples number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
+  @brief         Q31 complex-by-real multiplication.
+  @param[in]     pSrcCmplx   points to complex input vector
+  @param[in]     pSrcReal    points to real input vector
+  @param[out]    pCmplxDst   points to complex output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] are saturated.
  */
 
 void arm_cmplx_mult_real_q31(
-  q31_t * pSrcCmplx,
-  q31_t * pSrcReal,
-  q31_t * pCmplxDst,
-  uint32_t numSamples)
+  const q31_t * pSrcCmplx,
+  const q31_t * pSrcReal,
+        q31_t * pCmplxDst,
+        uint32_t numSamples)
 {
-  q31_t inA1;                                    /* Temporary variable to store input value */
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t in;                                      /* Temporary variable */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counters */
-  q31_t inA2, inA3, inA4;                        /* Temporary variables to hold input data */
-  q31_t inB1, inB2;                              /* Temporary variabels to hold input data */
-  q31_t out1, out2, out3, out4;                  /* Temporary variables to hold output data */
-
-  /* loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = numSamples >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    /* read real input from complex input buffer */
-    inA1 = *pSrcCmplx++;
-    inA2 = *pSrcCmplx++;
-    /* read input from real input bufer */
-    inB1 = *pSrcReal++;
-    inB2 = *pSrcReal++;
-    /* read imaginary input from complex input buffer */
-    inA3 = *pSrcCmplx++;
-    inA4 = *pSrcCmplx++;
+    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
+    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
 
-    /* multiply complex input with real input */
-    out1 = ((q63_t) inA1 * inB1) >> 32;
-    out2 = ((q63_t) inA2 * inB1) >> 32;
-    out3 = ((q63_t) inA3 * inB2) >> 32;
-    out4 = ((q63_t) inA4 * inB2) >> 32;
+    in = *pSrcReal++;
+#if defined (ARM_MATH_DSP)
+    /* store saturated result in 1.31 format to destination buffer */
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+#else
+    /* store result in destination buffer. */
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+#endif
 
-    /* sature the result */
-    out1 = __SSAT(out1, 31);
-    out2 = __SSAT(out2, 31);
-    out3 = __SSAT(out3, 31);
-    out4 = __SSAT(out4, 31);
+    in = *pSrcReal++;
+#if defined (ARM_MATH_DSP)
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+#else
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+#endif
 
-    /* get result in 1.31 format */
-    out1 = out1 << 1;
-    out2 = out2 << 1;
-    out3 = out3 << 1;
-    out4 = out4 << 1;
+    in = *pSrcReal++;
+#if defined (ARM_MATH_DSP)
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+#else
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+#endif
 
-    /* store the result to destination buffer */
-    *pCmplxDst++ = out1;
-    *pCmplxDst++ = out2;
-    *pCmplxDst++ = out3;
-    *pCmplxDst++ = out4;
+    in = *pSrcReal++;
+#if defined (ARM_MATH_DSP)
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+#else
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+#endif
 
-    /* read real input from complex input buffer */
-    inA1 = *pSrcCmplx++;
-    inA2 = *pSrcCmplx++;
-    /* read input from real input bufer */
-    inB1 = *pSrcReal++;
-    inB2 = *pSrcReal++;
-    /* read imaginary input from complex input buffer */
-    inA3 = *pSrcCmplx++;
-    inA4 = *pSrcCmplx++;
-
-    /* multiply complex input with real input */
-    out1 = ((q63_t) inA1 * inB1) >> 32;
-    out2 = ((q63_t) inA2 * inB1) >> 32;
-    out3 = ((q63_t) inA3 * inB2) >> 32;
-    out4 = ((q63_t) inA4 * inB2) >> 32;
-
-    /* sature the result */
-    out1 = __SSAT(out1, 31);
-    out2 = __SSAT(out2, 31);
-    out3 = __SSAT(out3, 31);
-    out4 = __SSAT(out4, 31);
-
-    /* get result in 1.31 format */
-    out1 = out1 << 1;
-    out2 = out2 << 1;
-    out3 = out3 << 1;
-    out4 = out4 << 1;
-
-    /* store the result to destination buffer */
-    *pCmplxDst++ = out1;
-    *pCmplxDst++ = out2;
-    *pCmplxDst++ = out3;
-    *pCmplxDst++ = out4;
-
-    /* Decrement the numSamples loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = numSamples % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    /* read real input from complex input buffer */
-    inA1 = *pSrcCmplx++;
-    inA2 = *pSrcCmplx++;
-    /* read input from real input bufer */
-    inB1 = *pSrcReal++;
-
-    /* multiply complex input with real input */
-    out1 = ((q63_t) inA1 * inB1) >> 32;
-    out2 = ((q63_t) inA2 * inB1) >> 32;
-
-    /* sature the result */
-    out1 = __SSAT(out1, 31);
-    out2 = __SSAT(out2, 31);
-
-    /* get result in 1.31 format */
-    out1 = out1 << 1;
-    out2 = out2 << 1;
-
-    /* store the result to destination buffer */
-    *pCmplxDst++ = out1;
-    *pCmplxDst++ = out2;
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
 
-  while (numSamples > 0U)
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
   {
-    /* realOut = realA * realB.            */
-    /* imagReal = imagA * realB.               */
-    inA1 = *pSrcReal++;
-    /* store the result in the destination buffer. */
-    *pCmplxDst++ =
-      (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * inA1) >> 31);
-    *pCmplxDst++ =
-      (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * inA1) >> 31);
+    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
+    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
 
-    /* Decrement the numSamples loop counter */
-    numSamples--;
+    in = *pSrcReal++;
+#if defined (ARM_MATH_DSP)
+    /* store saturated result in 1.31 format to destination buffer */
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+#else
+    /* store result in destination buffer. */
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of CmplxByRealMult group
+  @} end of CmplxByRealMult group
  */
diff --git a/DSP/Source/ControllerFunctions/CMakeLists.txt b/DSP/Source/ControllerFunctions/CMakeLists.txt
new file mode 100644
index 0000000..705f5b8
--- /dev/null
+++ b/DSP/Source/ControllerFunctions/CMakeLists.txt
@@ -0,0 +1,37 @@
+cmake_minimum_required (VERSION 3.6)
+
+project(CMSISDSPController)
+
+add_library(CMSISDSPController STATIC)
+
+configdsp(CMSISDSPController ..)
+
+include(interpol)
+interpol(CMSISDSPController)
+
+if (CONFIGTABLE AND ALLFAST)
+    target_compile_definitions(CMSISDSPController PUBLIC ARM_ALL_FAST_TABLES)  
+endif()
+
+target_sources(CMSISDSPController PRIVATE arm_pid_init_f32.c)
+target_sources(CMSISDSPController PRIVATE arm_pid_init_q15.c)
+target_sources(CMSISDSPController PRIVATE arm_pid_init_q31.c)
+target_sources(CMSISDSPController PRIVATE arm_pid_reset_f32.c)
+target_sources(CMSISDSPController PRIVATE arm_pid_reset_q15.c)
+target_sources(CMSISDSPController PRIVATE arm_pid_reset_q31.c)
+
+if (NOT CONFIGTABLE OR ALLFAST OR ARM_SIN_COS_F32)
+target_sources(CMSISDSPController PRIVATE arm_sin_cos_f32.c)
+endif()
+
+if (NOT CONFIGTABLE OR ALLFAST OR ARM_SIN_COS_Q31)
+target_sources(CMSISDSPController PRIVATE arm_sin_cos_q31.c)
+endif()
+
+
+
+### Includes
+target_include_directories(CMSISDSPController PUBLIC "${DSP}/../../Include")
+
+
+
diff --git a/DSP/Source/ControllerFunctions/ControllerFunctions.c b/DSP/Source/ControllerFunctions/ControllerFunctions.c
new file mode 100644
index 0000000..51720bc
--- /dev/null
+++ b/DSP/Source/ControllerFunctions/ControllerFunctions.c
@@ -0,0 +1,37 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        ControllerFunctions.c
+ * Description:  Combination of all controller function source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_pid_init_f32.c"
+#include "arm_pid_init_q15.c"
+#include "arm_pid_init_q31.c"
+#include "arm_pid_reset_f32.c"
+#include "arm_pid_reset_q15.c"
+#include "arm_pid_reset_q31.c"
+#include "arm_sin_cos_f32.c"
+#include "arm_sin_cos_q31.c"
+
diff --git a/DSP/Source/ControllerFunctions/arm_pid_init_f32.c b/DSP/Source/ControllerFunctions/arm_pid_init_f32.c
index f75d61f..433a65a 100644
--- a/DSP/Source/ControllerFunctions/arm_pid_init_f32.c
+++ b/DSP/Source/ControllerFunctions/arm_pid_init_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_pid_init_f32.c
  * Description:  Floating-point PID Control initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -28,29 +28,30 @@
 
 #include "arm_math.h"
 
- /**
- * @addtogroup PID
- * @{
+/**
+  @addtogroup PID
+  @{
  */
 
 /**
- * @brief  Initialization function for the floating-point PID Control.
- * @param[in,out] *S points to an instance of the PID structure.
- * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state & 1 = reset the state.
- * @return none.
- * \par Description:
- * \par
- * The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
- * The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
- * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
- * also sets the state variables to all zeros.
+  @brief         Initialization function for the floating-point PID Control.
+  @param[in,out] S               points to an instance of the PID structure
+  @param[in]     resetStateFlag
+                   - value = 0: no change in state
+                   - value = 1: reset state
+  @return        none
+
+  @par           Details
+                   The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
+                   The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
+                   using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
+                   also sets the state variables to all zeros.
  */
 
 void arm_pid_init_f32(
   arm_pid_instance_f32 * S,
   int32_t resetStateFlag)
 {
-
   /* Derived coefficient A0 */
   S->A0 = S->Kp + S->Ki + S->Kd;
 
@@ -63,12 +64,12 @@
   /* Check whether state needs reset or not */
   if (resetStateFlag)
   {
-    /* Clear the state buffer.  The size will be always 3 samples */
+    /* Reset state to zero, The size will be always 3 samples */
     memset(S->state, 0, 3U * sizeof(float32_t));
   }
 
 }
 
 /**
- * @} end of PID group
+  @} end of PID group
  */
diff --git a/DSP/Source/ControllerFunctions/arm_pid_init_q15.c b/DSP/Source/ControllerFunctions/arm_pid_init_q15.c
index 61049cf..c88a3d9 100644
--- a/DSP/Source/ControllerFunctions/arm_pid_init_q15.c
+++ b/DSP/Source/ControllerFunctions/arm_pid_init_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_pid_init_q15.c
  * Description:  Q15 PID Control initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -28,22 +28,24 @@
 
 #include "arm_math.h"
 
- /**
- * @addtogroup PID
- * @{
+/**
+  @addtogroup PID
+  @{
  */
 
 /**
- * @details
- * @param[in,out] *S points to an instance of the Q15 PID structure.
- * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
- * @return none.
- * \par Description:
- * \par
- * The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
- * The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
- * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
- * also sets the state variables to all zeros.
+  @brief         Initialization function for the Q15 PID Control.
+  @param[in,out] S               points to an instance of the Q15 PID structure
+  @param[in]     resetStateFlag
+                   - value = 0: no change in state
+                   - value = 1: reset state
+  @return        none
+
+  @par           Details
+                   The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
+                   The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
+                   using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
+                   also sets the state variables to all zeros.
  */
 
 void arm_pid_init_q15(
@@ -53,35 +55,20 @@
 
 #if defined (ARM_MATH_DSP)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
   /* Derived coefficient A0 */
   S->A0 = __QADD16(__QADD16(S->Kp, S->Ki), S->Kd);
 
   /* Derived coefficients and pack into A1 */
 
 #ifndef  ARM_MATH_BIG_ENDIAN
-
   S->A1 = __PKHBT(-__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), S->Kd, 16);
-
 #else
-
   S->A1 = __PKHBT(S->Kd, -__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-  /* Check whether state needs reset or not */
-  if (resetStateFlag)
-  {
-    /* Clear the state buffer.  The size will be always 3 samples */
-    memset(S->state, 0, 3U * sizeof(q15_t));
-  }
+#endif
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  q31_t temp;                                    /*to store the sum */
+  q31_t temp;                                    /* to store the sum */
 
   /* Derived coefficient A0 */
   temp = S->Kp + S->Ki + S->Kd;
@@ -92,19 +79,17 @@
   S->A1 = (q15_t) __SSAT(temp, 16);
   S->A2 = S->Kd;
 
-
+#endif /* #if defined (ARM_MATH_DSP) */
 
   /* Check whether state needs reset or not */
   if (resetStateFlag)
   {
-    /* Clear the state buffer.  The size will be always 3 samples */
+    /* Reset state to zero, The size will be always 3 samples */
     memset(S->state, 0, 3U * sizeof(q15_t));
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of PID group
+  @} end of PID group
  */
diff --git a/DSP/Source/ControllerFunctions/arm_pid_init_q31.c b/DSP/Source/ControllerFunctions/arm_pid_init_q31.c
index 17b3b09..1625a5f 100644
--- a/DSP/Source/ControllerFunctions/arm_pid_init_q31.c
+++ b/DSP/Source/ControllerFunctions/arm_pid_init_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_pid_init_q31.c
  * Description:  Q31 PID Control initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -28,22 +28,24 @@
 
 #include "arm_math.h"
 
- /**
- * @addtogroup PID
- * @{
+/**
+  @addtogroup PID
+  @{
  */
 
 /**
- * @brief  Initialization function for the Q31 PID Control.
- * @param[in,out] *S points to an instance of the Q31 PID structure.
- * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
- * @return none.
- * \par Description:
- * \par
- * The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
- * The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
- * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
- * also sets the state variables to all zeros.
+  @brief         Initialization function for the Q31 PID Control.
+  @param[in,out] S               points to an instance of the Q31 PID structure
+  @param[in]     resetStateFlag
+                   - value = 0: no change in state
+                   - value = 1: reset state
+  @return        none
+
+  @par           Details
+                   The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
+                   The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
+                   using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
+                   also sets the state variables to all zeros.
  */
 
 void arm_pid_init_q31(
@@ -53,20 +55,15 @@
 
 #if defined (ARM_MATH_DSP)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
   /* Derived coefficient A0 */
   S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd);
 
   /* Derived coefficient A1 */
   S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp);
 
-
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  q31_t temp;
+  q31_t temp;                                    /* to store the sum */
 
   /* Derived coefficient A0 */
   temp = clip_q63_to_q31((q63_t) S->Kp + S->Ki);
@@ -84,12 +81,12 @@
   /* Check whether state needs reset or not */
   if (resetStateFlag)
   {
-    /* Clear the state buffer.  The size will be always 3 samples */
+    /* Reset state to zero, The size will be always 3 samples */
     memset(S->state, 0, 3U * sizeof(q31_t));
   }
 
 }
 
 /**
- * @} end of PID group
+  @} end of PID group
  */
diff --git a/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c b/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c
index 318ec89..d839e55 100644
--- a/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c
+++ b/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_pid_reset_f32.c
  * Description:  Floating-point PID Control reset function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -28,26 +28,27 @@
 
 #include "arm_math.h"
 
- /**
- * @addtogroup PID
- * @{
+/**
+  @addtogroup PID
+  @{
  */
 
 /**
-* @brief  Reset function for the floating-point PID Control.
-* @param[in] *S	Instance pointer of PID control data structure.
-* @return none.
-* \par Description:
-* The function resets the state buffer to zeros.
-*/
+  @brief         Reset function for the floating-point PID Control.
+  @param[in,out] S  points to an instance of the floating-point PID structure
+  @return        none
+
+  @par           Details
+                   The function resets the state buffer to zeros.
+ */
+
 void arm_pid_reset_f32(
   arm_pid_instance_f32 * S)
 {
-
-  /* Clear the state buffer.  The size will be always 3 samples */
+  /* Reset state to zero, The size will be always 3 samples */
   memset(S->state, 0, 3U * sizeof(float32_t));
 }
 
 /**
- * @} end of PID group
+  @} end of PID group
  */
diff --git a/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c b/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c
index 93c0e7c..256fd8c 100644
--- a/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c
+++ b/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_pid_reset_q15.c
  * Description:  Q15 PID Control reset function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -28,18 +28,20 @@
 
 #include "arm_math.h"
 
- /**
- * @addtogroup PID
- * @{
+/**
+  @addtogroup PID
+  @{
  */
 
 /**
-* @brief  Reset function for the Q15 PID Control.
-* @param[in] *S		Instance pointer of PID control data structure.
-* @return none.
-* \par Description:
-* The function resets the state buffer to zeros.
-*/
+  @brief         Reset function for the Q15 PID Control.
+  @param[in,out] S  points to an instance of the Q15 PID structure
+  @return        none
+
+  @par           Details
+                   The function resets the state buffer to zeros.
+ */
+
 void arm_pid_reset_q15(
   arm_pid_instance_q15 * S)
 {
@@ -48,5 +50,5 @@
 }
 
 /**
- * @} end of PID group
+  @} end of PID group
  */
diff --git a/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c b/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c
index 4c5b14e..2aa391c 100644
--- a/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c
+++ b/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_pid_reset_q31.c
  * Description:  Q31 PID Control reset function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -28,26 +28,27 @@
 
 #include "arm_math.h"
 
- /**
- * @addtogroup PID
- * @{
+/**
+  @addtogroup PID
+  @{
  */
 
 /**
-* @brief  Reset function for the Q31 PID Control.
-* @param[in] *S	Instance pointer of PID control data structure.
-* @return none.
-* \par Description:
-* The function resets the state buffer to zeros.
-*/
+  @brief         Reset function for the Q31 PID Control.
+  @param[in,out] S  points to an instance of the Q31 PID structure
+  @return        none
+
+  @par           Details
+                   The function resets the state buffer to zeros.
+ */
+
 void arm_pid_reset_q31(
   arm_pid_instance_q31 * S)
 {
-
-  /* Clear the state buffer.  The size will be always 3 samples */
+  /* Reset state to zero, The size will be always 3 samples */
   memset(S->state, 0, 3U * sizeof(q31_t));
 }
 
 /**
- * @} end of PID group
+  @} end of PID group
  */
diff --git a/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c b/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c
index 7ec1b53..12a1c83 100644
--- a/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c
+++ b/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_sin_cos_f32.c
  * Description:  Sine and Cosine calculation for floating-point values
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,115 +30,117 @@
 #include "arm_common_tables.h"
 
 /**
- * @ingroup groupController
+  @ingroup groupController
  */
 
 /**
- * @defgroup SinCos Sine Cosine
- *
- * Computes the trigonometric sine and cosine values using a combination of table lookup
- * and linear interpolation.
- * There are separate functions for Q31 and floating-point data types.
- * The input to the floating-point version is in degrees while the
- * fixed-point Q31 have a scaled input with the range
- * [-1 0.9999] mapping to [-180 +180] degrees.
- *
- * The floating point function also allows values that are out of the usual range. When this happens, the function will
- * take extra time to adjust the input value to the range of [-180 180].
- *
- * The result is accurate to 5 digits after the decimal point.
- *
- * The implementation is based on table lookup using 360 values together with linear interpolation.
- * The steps used are:
- *  -# Calculation of the nearest integer table index.
- *  -# Compute the fractional portion (fract) of the input.
- *  -# Fetch the value corresponding to \c index from sine table to \c y0 and also value from \c index+1 to \c y1.
- *  -# Sine value is computed as <code> *psinVal = y0 + (fract * (y1 - y0))</code>.
- *  -# Fetch the value corresponding to \c index from cosine table to \c y0 and also value from \c index+1 to \c y1.
- *  -# Cosine value is computed as <code> *pcosVal = y0 + (fract * (y1 - y0))</code>.
- */
+  @defgroup SinCos Sine Cosine
 
- /**
- * @addtogroup SinCos
- * @{
+  Computes the trigonometric sine and cosine values using a combination of table lookup
+  and linear interpolation.
+  There are separate functions for Q31 and floating-point data types.
+  The input to the floating-point version is in degrees while the
+  fixed-point Q31 have a scaled input with the range
+  [-1 0.9999] mapping to [-180 +180] degrees.
+
+  The floating point function also allows values that are out of the usual range. When this happens, the function will
+  take extra time to adjust the input value to the range of [-180 180].
+
+  The result is accurate to 5 digits after the decimal point.
+
+  The implementation is based on table lookup using 360 values together with linear interpolation.
+  The steps used are:
+   -# Calculation of the nearest integer table index.
+   -# Compute the fractional portion (fract) of the input.
+   -# Fetch the value corresponding to \c index from sine table to \c y0 and also value from \c index+1 to \c y1.
+   -# Sine value is computed as <code> *psinVal = y0 + (fract * (y1 - y0))</code>.
+   -# Fetch the value corresponding to \c index from cosine table to \c y0 and also value from \c index+1 to \c y1.
+   -# Cosine value is computed as <code> *pcosVal = y0 + (fract * (y1 - y0))</code>.
  */
 
 /**
- * @brief  Floating-point sin_cos function.
- * @param[in]  theta    input value in degrees
- * @param[out] *pSinVal points to the processed sine output.
- * @param[out] *pCosVal points to the processed cos output.
- * @return none.
+  @addtogroup SinCos
+  @{
+ */
+
+/**
+  @brief         Floating-point sin_cos function.
+  @param[in]     theta    input value in degrees
+  @param[out]    pSinVal  points to processed sine output
+  @param[out]    pCosVal  points to processed cosine output
+  @return        none
  */
 
 void arm_sin_cos_f32(
-                      float32_t theta,
-                      float32_t * pSinVal,
-                      float32_t * pCosVal)
+  float32_t theta,
+  float32_t * pSinVal,
+  float32_t * pCosVal)
 {
-    float32_t fract, in;                             /* Temporary variables for input, output */
-    uint16_t indexS, indexC;                         /* Index variable */
-    float32_t f1, f2, d1, d2;                        /* Two nearest output values */
-    float32_t findex, Dn, Df, temp;
+  float32_t fract, in;                             /* Temporary input, output variables */
+  uint16_t indexS, indexC;                         /* Index variable */
+  float32_t f1, f2, d1, d2;                        /* Two nearest output values */
+  float32_t Dn, Df;
+  float32_t temp, findex;
 
-    /* input x is in degrees */
-    /* Scale the input, divide input by 360, for cosine add 0.25 (pi/2) to read sine table */
-    in = theta * 0.00277777777778f;
+  /* input x is in degrees */
+  /* Scale input, divide input by 360, for cosine add 0.25 (pi/2) to read sine table */
+  in = theta * 0.00277777777778f;
 
-    if (in < 0.0f)
-    {
-        in = -in;
-    }
+  if (in < 0.0f)
+  {
+    in = -in;
+  }
 
-    in = in - (int32_t)in;
+  in = in - (int32_t)in;
 
-    /* Calculation of index of the table */
-    findex = (float32_t) FAST_MATH_TABLE_SIZE * in;
-    indexS = ((uint16_t)findex) & 0x1ff;
-    indexC = (indexS + (FAST_MATH_TABLE_SIZE / 4)) & 0x1ff;
+  /* Calculate the nearest index */
+  findex = (float32_t)FAST_MATH_TABLE_SIZE * in;
+  indexS = ((uint16_t)findex) & 0x1ff;
+  indexC = (indexS + (FAST_MATH_TABLE_SIZE / 4)) & 0x1ff;
 
-    /* fractional value calculation */
-    fract = findex - (float32_t) indexS;
+  /* Calculation of fractional value */
+  fract = findex - (float32_t) indexS;
 
-    /* Read two nearest values of input value from the cos & sin tables */
-    f1 = sinTable_f32[indexC+0];
-    f2 = sinTable_f32[indexC+1];
-    d1 = -sinTable_f32[indexS+0];
-    d2 = -sinTable_f32[indexS+1];
+  /* Read two nearest values of input value from the cos & sin tables */
+  f1 =  sinTable_f32[indexC  ];
+  f2 =  sinTable_f32[indexC+1];
+  d1 = -sinTable_f32[indexS  ];
+  d2 = -sinTable_f32[indexS+1];
 
-    temp = (1.0f - fract) * f1 + fract * f2;
+  temp = (1.0f - fract) * f1 + fract * f2;
 
-    Dn = 0.0122718463030f; // delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE_SIZE
-    Df = f2 - f1;          // delta between the values of the functions
+  Dn = 0.0122718463030f; /* delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE_SIZE */
+  Df = f2 - f1;          /* delta between the values of the functions */
 
-    temp = Dn *(d1 + d2) - 2 * Df;
-    temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn);
-    temp = fract * temp + d1 * Dn;
+  temp = Dn * (d1 + d2) - 2 * Df;
+  temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn);
+  temp = fract * temp + d1 * Dn;
 
-    /* Calculation of cosine value */
-    *pCosVal = fract * temp + f1;
+  /* Calculation of cosine value */
+  *pCosVal = fract * temp + f1;
 
-    /* Read two nearest values of input value from the cos & sin tables */
-    f1 = sinTable_f32[indexS+0];
-    f2 = sinTable_f32[indexS+1];
-    d1 = sinTable_f32[indexC+0];
-    d2 = sinTable_f32[indexC+1];
+  /* Read two nearest values of input value from the cos & sin tables */
+  f1 = sinTable_f32[indexS  ];
+  f2 = sinTable_f32[indexS+1];
+  d1 = sinTable_f32[indexC  ];
+  d2 = sinTable_f32[indexC+1];
 
-    temp = (1.0f - fract) * f1 + fract * f2;
+  temp = (1.0f - fract) * f1 + fract * f2;
 
-    Df = f2 - f1; // delta between the values of the functions
-    temp = Dn*(d1 + d2) - 2*Df;
-    temp = fract*temp + (3*Df - (d2 + 2*d1)*Dn);
-    temp = fract*temp + d1*Dn;
+  Df = f2 - f1; // delta between the values of the functions
+  temp = Dn * (d1 + d2) - 2 * Df;
+  temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn);
+  temp = fract * temp + d1 * Dn;
 
-    /* Calculation of sine value */
-    *pSinVal = fract*temp + f1;
+  /* Calculation of sine value */
+  *pSinVal = fract * temp + f1;
 
-    if (theta < 0.0f)
-    {
-        *pSinVal = -*pSinVal;
-    }
+  if (theta < 0.0f)
+  {
+    *pSinVal = -*pSinVal;
+  }
 }
+
 /**
- * @} end of SinCos group
+  @} end of SinCos group
  */
diff --git a/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c b/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c
index d661830..84ee3d2 100644
--- a/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c
+++ b/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_sin_cos_q31.c
  * Description:  Cosine & Sine calculation for Q31 values
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,23 +30,22 @@
 #include "arm_common_tables.h"
 
 /**
- * @ingroup groupController
- */
-
- /**
- * @addtogroup SinCos
- * @{
+  @ingroup groupController
  */
 
 /**
- * @brief  Q31 sin_cos function.
- * @param[in]  theta    scaled input value in degrees
- * @param[out] *pSinVal points to the processed sine output.
- * @param[out] *pCosVal points to the processed cosine output.
- * @return none.
- *
- * The Q31 input value is in the range [-1 0.999999] and is mapped to a degree value in the range [-180 179].
- *
+  @addtogroup SinCos
+  @{
+ */
+
+/**
+  @brief         Q31 sin_cos function.
+  @param[in]     theta    scaled input value in degrees
+  @param[out]    pSinVal  points to processed sine output
+  @param[out]    pCosVal  points to processed cosine output
+  @return        none
+
+  The Q31 input value is in the range [-1 0.999999] and is mapped to a degree value in the range [-180 179].
  */
 
 void arm_sin_cos_q31(
@@ -54,9 +53,9 @@
   q31_t * pSinVal,
   q31_t * pCosVal)
 {
-  q31_t fract;                                 /* Temporary variables for input, output */
-  uint16_t indexS, indexC;                     /* Index variable */
-  q31_t f1, f2, d1, d2;                        /* Two nearest output values */
+  q31_t fract;                                     /* Temporary input, output variables */
+  uint16_t indexS, indexC;                         /* Index variable */
+  q31_t f1, f2, d1, d2;                            /* Two nearest output values */
   q31_t Dn, Df;
   q63_t temp;
 
@@ -68,43 +67,44 @@
   fract = (theta - (indexS << CONTROLLER_Q31_SHIFT)) << 8;
 
   /* Read two nearest values of input value from the cos & sin tables */
-  f1 = sinTable_q31[indexC+0];
-  f2 = sinTable_q31[indexC+1];
-  d1 = -sinTable_q31[indexS+0];
+  f1 =  sinTable_q31[indexC  ];
+  f2 =  sinTable_q31[indexC+1];
+  d1 = -sinTable_q31[indexS  ];
   d2 = -sinTable_q31[indexS+1];
 
-  Dn = 0x1921FB5; // delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE_SIZE
-  Df = f2 - f1; // delta between the values of the functions
-  temp = Dn*((q63_t)d1 + d2);
+  Dn = 0x1921FB5; /* delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE_SIZE */
+  Df = f2 - f1;   /* delta between the values of the functions */
+
+  temp = Dn * ((q63_t)d1 + d2);
   temp = temp - ((q63_t)Df << 32);
-  temp = (q63_t)fract*(temp >> 31);
-  temp = temp + ((3*(q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1))*Dn);
-  temp = (q63_t)fract*(temp >> 31);
-  temp = temp + (q63_t)d1*Dn;
-  temp = (q63_t)fract*(temp >> 31);
+  temp = (q63_t)fract * (temp >> 31);
+  temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
+  temp = (q63_t)fract * (temp >> 31);
+  temp = temp + (q63_t)d1 * Dn;
+  temp = (q63_t)fract * (temp >> 31);
 
   /* Calculation of cosine value */
   *pCosVal = clip_q63_to_q31((temp >> 31) + (q63_t)f1);
 
   /* Read two nearest values of input value from the cos & sin tables */
-  f1 = sinTable_q31[indexS+0];
+  f1 = sinTable_q31[indexS ];
   f2 = sinTable_q31[indexS+1];
-  d1 = sinTable_q31[indexC+0];
+  d1 = sinTable_q31[indexC ];
   d2 = sinTable_q31[indexC+1];
 
   Df = f2 - f1; // delta between the values of the functions
-  temp = Dn*((q63_t)d1 + d2);
+  temp = Dn * ((q63_t)d1 + d2);
   temp = temp - ((q63_t)Df << 32);
-  temp = (q63_t)fract*(temp >> 31);
-  temp = temp + ((3*(q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1))*Dn);
-  temp = (q63_t)fract*(temp >> 31);
-  temp = temp + (q63_t)d1*Dn;
-  temp = (q63_t)fract*(temp >> 31);
+  temp = (q63_t)fract * (temp >> 31);
+  temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
+  temp = (q63_t)fract * (temp >> 31);
+  temp = temp + (q63_t)d1 * Dn;
+  temp = (q63_t)fract * (temp >> 31);
 
   /* Calculation of sine value */
   *pSinVal = clip_q63_to_q31((temp >> 31) + (q63_t)f1);
 }
 
 /**
- * @} end of SinCos group
+  @} end of SinCos group
  */
diff --git a/DSP/Source/FastMathFunctions/CMakeLists.txt b/DSP/Source/FastMathFunctions/CMakeLists.txt
new file mode 100644
index 0000000..6719b41
--- /dev/null
+++ b/DSP/Source/FastMathFunctions/CMakeLists.txt
@@ -0,0 +1,51 @@
+cmake_minimum_required (VERSION 3.6)
+
+project(CMSISDSPFastMath)
+
+
+file(GLOB SRC "./*_*.c")
+
+add_library(CMSISDSPFastMath STATIC)
+
+include(interpol)
+interpol(CMSISDSPFastMath)
+
+if (CONFIGTABLE AND ALLFAST)
+    target_compile_definitions(CMSISDSPFastMath PUBLIC ARM_ALL_FAST_TABLES)  
+endif()
+
+if (NOT CONFIGTABLE OR ALLFAST OR ARM_COS_F32)
+target_sources(CMSISDSPFastMath PRIVATE arm_cos_f32.c)
+endif()
+
+if (NOT CONFIGTABLE OR ALLFAST OR ARM_COS_Q15)
+target_sources(CMSISDSPFastMath PRIVATE arm_cos_q15.c)
+endif()
+
+if (NOT CONFIGTABLE OR ALLFAST OR ARM_COS_Q31)
+target_sources(CMSISDSPFastMath PRIVATE arm_cos_q31.c)
+endif()
+
+if (NOT CONFIGTABLE OR ALLFAST OR ARM_SIN_F32)
+target_sources(CMSISDSPFastMath PRIVATE arm_sin_f32.c)
+endif()
+
+if (NOT CONFIGTABLE OR ALLFAST OR ARM_SIN_Q15)
+target_sources(CMSISDSPFastMath PRIVATE arm_sin_q15.c)
+endif()
+
+if (NOT CONFIGTABLE OR ALLFAST OR ARM_SIN_Q31)
+target_sources(CMSISDSPFastMath PRIVATE arm_sin_q31.c)
+endif()
+
+target_sources(CMSISDSPFastMath PRIVATE arm_sqrt_q15.c)
+target_sources(CMSISDSPFastMath PRIVATE arm_sqrt_q31.c)
+
+
+configdsp(CMSISDSPFastMath ..)
+
+### Includes
+target_include_directories(CMSISDSPFastMath PUBLIC "${DSP}/../../Include")
+
+
+
diff --git a/DSP/Source/FastMathFunctions/FastMathFunctions.c b/DSP/Source/FastMathFunctions/FastMathFunctions.c
new file mode 100644
index 0000000..abd919e
--- /dev/null
+++ b/DSP/Source/FastMathFunctions/FastMathFunctions.c
@@ -0,0 +1,37 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        FastMathFunctions.c
+ * Description:  Combination of all fast math function source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_cos_f32.c"
+#include "arm_cos_q15.c"
+#include "arm_cos_q31.c"
+#include "arm_sin_f32.c"
+#include "arm_sin_q15.c"
+#include "arm_sin_q31.c"
+#include "arm_sqrt_q15.c"
+#include "arm_sqrt_q31.c"
+
diff --git a/DSP/Source/FastMathFunctions/arm_cos_f32.c b/DSP/Source/FastMathFunctions/arm_cos_f32.c
index e604b3c..26bd66e 100644
--- a/DSP/Source/FastMathFunctions/arm_cos_f32.c
+++ b/DSP/Source/FastMathFunctions/arm_cos_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_cos_f32.c
  * Description:  Fast cosine calculation for floating-point values
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -28,56 +28,57 @@
 
 #include "arm_math.h"
 #include "arm_common_tables.h"
+
 /**
- * @ingroup groupFastMath
+  @ingroup groupFastMath
  */
 
 /**
- * @defgroup cos Cosine
- *
- * Computes the trigonometric cosine function using a combination of table lookup
- * and linear interpolation.  There are separate functions for
- * Q15, Q31, and floating-point data types.
- * The input to the floating-point version is in radians and in the range [0 2*pi) while the
- * fixed-point Q15 and Q31 have a scaled input with the range
- * [0 +0.9999] mapping to [0 2*pi).  The fixed-point range is chosen so that a
- * value of 2*pi wraps around to 0.
- *
- * The implementation is based on table lookup using 256 values together with linear interpolation.
- * The steps used are:
- *  -# Calculation of the nearest integer table index
- *  -# Compute the fractional portion (fract) of the table index.
- *  -# The final result equals <code>(1.0f-fract)*a + fract*b;</code>
- *
- * where
- * <pre>
- *    b=Table[index+0];
- *    c=Table[index+1];
- * </pre>
- */
+  @defgroup cos Cosine
 
- /**
- * @addtogroup cos
- * @{
+  Computes the trigonometric cosine function using a combination of table lookup
+  and linear interpolation.  There are separate functions for
+  Q15, Q31, and floating-point data types.
+  The input to the floating-point version is in radians while the
+  fixed-point Q15 and Q31 have a scaled input with the range
+  [0 +0.9999] mapping to [0 2*pi).  The fixed-point range is chosen so that a
+  value of 2*pi wraps around to 0.
+
+  The implementation is based on table lookup using 256 values together with linear interpolation.
+  The steps used are:
+   -# Calculation of the nearest integer table index
+   -# Compute the fractional portion (fract) of the table index.
+   -# The final result equals <code>(1.0f-fract)*a + fract*b;</code>
+
+  where
+  <pre>
+     b = Table[index];
+     c = Table[index+1];
+  </pre>
  */
 
 /**
- * @brief  Fast approximation to the trigonometric cosine function for floating-point data.
- * @param[in] x input value in radians.
- * @return cos(x).
+  @addtogroup cos
+  @{
+ */
+
+/**
+  @brief         Fast approximation to the trigonometric cosine function for floating-point data.
+  @param[in]     x  input value in radians
+  @return        cos(x)
  */
 
 float32_t arm_cos_f32(
   float32_t x)
 {
-  float32_t cosVal, fract, in;                   /* Temporary variables for input, output */
+  float32_t cosVal, fract, in;                   /* Temporary input, output variables */
   uint16_t index;                                /* Index variable */
   float32_t a, b;                                /* Two nearest output values */
   int32_t n;
   float32_t findex;
 
   /* input x is in radians */
-  /* Scale the input to [0 1] range from [0 2*PI] , divide input by 2*pi, add 0.25 (pi/2) to read sine table */
+  /* Scale input to [0 1] range from [0 2*PI] , divide input by 2*pi, add 0.25 (pi/2) to read sine table */
   in = x * 0.159154943092f + 0.25f;
 
   /* Calculation of floor value of input */
@@ -93,8 +94,14 @@
   in = in - (float32_t) n;
 
   /* Calculation of index of the table */
-  findex = (float32_t) FAST_MATH_TABLE_SIZE * in;
-  index = ((uint16_t)findex) & 0x1ff;
+  findex = (float32_t)FAST_MATH_TABLE_SIZE * in;
+  index = (uint16_t)findex;
+
+  /* when "in" is exactly 1, we need to rotate the index down to 0 */
+  if (index >= FAST_MATH_TABLE_SIZE) {
+    index = 0;
+    findex -= (float32_t)FAST_MATH_TABLE_SIZE;
+  }
 
   /* fractional value calculation */
   fract = findex - (float32_t) index;
@@ -104,12 +111,12 @@
   b = sinTable_f32[index+1];
 
   /* Linear interpolation process */
-  cosVal = (1.0f-fract)*a + fract*b;
+  cosVal = (1.0f - fract) * a + fract * b;
 
-  /* Return the output value */
+  /* Return output value */
   return (cosVal);
 }
 
 /**
- * @} end of cos group
+  @} end of cos group
  */
diff --git a/DSP/Source/FastMathFunctions/arm_cos_q15.c b/DSP/Source/FastMathFunctions/arm_cos_q15.c
index 7fa2e18..3bb829c 100644
--- a/DSP/Source/FastMathFunctions/arm_cos_q15.c
+++ b/DSP/Source/FastMathFunctions/arm_cos_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_cos_q15.c
  * Description:  Fast cosine calculation for Q15 values
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,36 +30,35 @@
 #include "arm_common_tables.h"
 
 /**
- * @ingroup groupFastMath
- */
-
- /**
- * @addtogroup cos
- * @{
+  @ingroup groupFastMath
  */
 
 /**
- * @brief Fast approximation to the trigonometric cosine function for Q15 data.
- * @param[in] x Scaled input value in radians.
- * @return  cos(x).
- *
- * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian
- * value in the range [0 2*pi).
+  @addtogroup cos
+  @{
+ */
+
+/**
+  @brief         Fast approximation to the trigonometric cosine function for Q15 data.
+  @param[in]     x  Scaled input value in radians
+  @return        cos(x)
+
+  The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI).
  */
 
 q15_t arm_cos_q15(
   q15_t x)
 {
-  q15_t cosVal;                                  /* Temporary variables for input, output */
-  int32_t index;                                 /* Index variables */
-  q15_t a, b;                                    /* Four nearest output values */
+  q15_t cosVal;                                  /* Temporary input, output variables */
+  int32_t index;                                 /* Index variable */
+  q15_t a, b;                                    /* Two nearest output values */
   q15_t fract;                                   /* Temporary values for fractional values */
 
   /* add 0.25 (pi/2) to read sine table */
   x = (uint16_t)x + 0x2000;
   if (x < 0)
-  {   /* convert negative numbers to corresponding positive ones */
-      x = (uint16_t)x + 0x8000;
+  { /* convert negative numbers to corresponding positive ones */
+    x = (uint16_t)x + 0x8000;
   }
 
   /* Calculate the nearest index */
@@ -73,12 +72,13 @@
   b = sinTable_q15[index+1];
 
   /* Linear interpolation process */
-  cosVal = (q31_t)(0x8000-fract)*a >> 16;
-  cosVal = (q15_t)((((q31_t)cosVal << 16) + ((q31_t)fract*b)) >> 16);
+  cosVal = (q31_t) (0x8000 - fract) * a >> 16;
+  cosVal = (q15_t) ((((q31_t) cosVal << 16) + ((q31_t) fract * b)) >> 16);
 
-  return cosVal << 1;
+  /* Return output value */
+  return (cosVal << 1);
 }
 
 /**
- * @} end of cos group
+  @} end of cos group
  */
diff --git a/DSP/Source/FastMathFunctions/arm_cos_q31.c b/DSP/Source/FastMathFunctions/arm_cos_q31.c
index fde5368..8b7ff78 100644
--- a/DSP/Source/FastMathFunctions/arm_cos_q31.c
+++ b/DSP/Source/FastMathFunctions/arm_cos_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_cos_q31.c
  * Description:  Fast cosine calculation for Q31 values
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,36 +30,35 @@
 #include "arm_common_tables.h"
 
 /**
- * @ingroup groupFastMath
- */
-
- /**
- * @addtogroup cos
- * @{
+  @ingroup groupFastMath
  */
 
 /**
- * @brief Fast approximation to the trigonometric cosine function for Q31 data.
- * @param[in] x Scaled input value in radians.
- * @return  cos(x).
- *
- * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian
- * value in the range [0 2*pi).
+  @addtogroup cos
+  @{
+ */
+
+/**
+  @brief         Fast approximation to the trigonometric cosine function for Q31 data.
+  @param[in]     x  Scaled input value in radians
+  @return        cos(x)
+
+  The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI).
  */
 
 q31_t arm_cos_q31(
   q31_t x)
 {
-  q31_t cosVal;                                  /* Temporary variables for input, output */
-  int32_t index;                                 /* Index variables */
-  q31_t a, b;                                    /* Four nearest output values */
+  q31_t cosVal;                                  /* Temporary input, output variables */
+  int32_t index;                                 /* Index variable */
+  q31_t a, b;                                    /* Two nearest output values */
   q31_t fract;                                   /* Temporary values for fractional values */
 
   /* add 0.25 (pi/2) to read sine table */
   x = (uint32_t)x + 0x20000000;
   if (x < 0)
-  {   /* convert negative numbers to corresponding positive ones */
-      x = (uint32_t)x + 0x80000000;
+  { /* convert negative numbers to corresponding positive ones */
+    x = (uint32_t)x + 0x80000000;
   }
 
   /* Calculate the nearest index */
@@ -73,12 +72,13 @@
   b = sinTable_q31[index+1];
 
   /* Linear interpolation process */
-  cosVal = (q63_t)(0x80000000-fract)*a >> 32;
-  cosVal = (q31_t)((((q63_t)cosVal << 32) + ((q63_t)fract*b)) >> 32);
+  cosVal = (q63_t) (0x80000000 - fract) * a >> 32;
+  cosVal = (q31_t) ((((q63_t) cosVal << 32) + ((q63_t) fract * b)) >> 32);
 
-  return cosVal << 1;
+  /* Return output value */
+  return (cosVal << 1);
 }
 
 /**
- * @} end of cos group
+  @} end of cos group
  */
diff --git a/DSP/Source/FastMathFunctions/arm_sin_f32.c b/DSP/Source/FastMathFunctions/arm_sin_f32.c
index ce8b9b9..97c6902 100644
--- a/DSP/Source/FastMathFunctions/arm_sin_f32.c
+++ b/DSP/Source/FastMathFunctions/arm_sin_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_sin_f32.c
  * Description:  Fast sine calculation for floating-point values
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -28,70 +28,64 @@
 
 #include "arm_math.h"
 #include "arm_common_tables.h"
-#include <math.h>
 
 /**
- * @ingroup groupFastMath
+  @ingroup groupFastMath
  */
 
 /**
- * @defgroup sin Sine
- *
- * Computes the trigonometric sine function using a combination of table lookup
- * and linear interpolation.  There are separate functions for
- * Q15, Q31, and floating-point data types.
- * The input to the floating-point version is in radians and in the range [0 2*pi) while the
- * fixed-point Q15 and Q31 have a scaled input with the range
- * [0 +0.9999] mapping to [0 2*pi).  The fixed-point range is chosen so that a
- * value of 2*pi wraps around to 0.
- *
- * The implementation is based on table lookup using 256 values together with linear interpolation.
- * The steps used are:
- *  -# Calculation of the nearest integer table index
- *  -# Compute the fractional portion (fract) of the table index.
- *  -# The final result equals <code>(1.0f-fract)*a + fract*b;</code>
- *
- * where
- * <pre>
- *    b=Table[index+0];
- *    c=Table[index+1];
- * </pre>
+  @defgroup sin Sine
+
+  Computes the trigonometric sine function using a combination of table lookup
+  and linear interpolation.  There are separate functions for
+  Q15, Q31, and floating-point data types.
+  The input to the floating-point version is in radians while the
+  fixed-point Q15 and Q31 have a scaled input with the range
+  [0 +0.9999] mapping to [0 2*pi).  The fixed-point range is chosen so that a
+  value of 2*pi wraps around to 0.
+
+  The implementation is based on table lookup using 256 values together with linear interpolation.
+  The steps used are:
+   -# Calculation of the nearest integer table index
+   -# Compute the fractional portion (fract) of the table index.
+   -# The final result equals <code>(1.0f-fract)*a + fract*b;</code>
+
+  where
+  <pre>
+     b = Table[index];
+     c = Table[index+1];
+  </pre>
  */
 
 /**
- * @addtogroup sin
- * @{
+  @addtogroup sin
+  @{
  */
 
 /**
- * @brief  Fast approximation to the trigonometric sine function for floating-point data.
- * @param[in] x input value in radians.
- * @return  sin(x).
+  @brief         Fast approximation to the trigonometric sine function for floating-point data.
+  @param[in]     x  input value in radians.
+  @return        sin(x)
  */
 
 float32_t arm_sin_f32(
   float32_t x)
 {
-  float32_t sinVal, fract, in;                           /* Temporary variables for input, output */
-  uint16_t index;                                        /* Index variable */
-  float32_t a, b;                                        /* Two nearest output values */
+  float32_t sinVal, fract, in;                   /* Temporary input, output variables */
+  uint16_t index;                                /* Index variable */
+  float32_t a, b;                                /* Two nearest output values */
   int32_t n;
   float32_t findex;
 
-  /* Special case for small negative inputs */
-  if ((x < 0.0f) && (x >= -1.9e-7f)) {
-     return x;
-  }
-
   /* input x is in radians */
-  /* Scale the input to [0 1] range from [0 2*PI] , divide input by 2*pi */
+  /* Scale input to [0 1] range from [0 2*PI] , divide input by 2*pi */
   in = x * 0.159154943092f;
 
   /* Calculation of floor value of input */
   n = (int32_t) in;
 
   /* Make negative values towards -infinity */
-  if (x < 0.0f)
+  if (in < 0.0f)
   {
     n--;
   }
@@ -100,9 +94,14 @@
   in = in - (float32_t) n;
 
   /* Calculation of index of the table */
-  findex = (float32_t) FAST_MATH_TABLE_SIZE * in;
+  findex = (float32_t)FAST_MATH_TABLE_SIZE * in;
+  index = (uint16_t)findex;
 
-  index = ((uint16_t)findex) & 0x1ff;
+  /* when "in" is exactly 1, we need to rotate the index down to 0 */
+  if (index >= FAST_MATH_TABLE_SIZE) {
+    index = 0;
+    findex -= (float32_t)FAST_MATH_TABLE_SIZE;
+  }
 
   /* fractional value calculation */
   fract = findex - (float32_t) index;
@@ -112,12 +111,12 @@
   b = sinTable_f32[index+1];
 
   /* Linear interpolation process */
-  sinVal = (1.0f-fract)*a + fract*b;
+  sinVal = (1.0f - fract) * a + fract * b;
 
-  /* Return the output value */
+  /* Return output value */
   return (sinVal);
 }
 
 /**
- * @} end of sin group
+  @} end of sin group
  */
diff --git a/DSP/Source/FastMathFunctions/arm_sin_q15.c b/DSP/Source/FastMathFunctions/arm_sin_q15.c
index 7c8f627..1f0c2bf 100644
--- a/DSP/Source/FastMathFunctions/arm_sin_q15.c
+++ b/DSP/Source/FastMathFunctions/arm_sin_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_sin_q15.c
  * Description:  Fast sine calculation for Q15 values
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,28 +30,28 @@
 #include "arm_common_tables.h"
 
 /**
- * @ingroup groupFastMath
- */
-
- /**
- * @addtogroup sin
- * @{
+  @ingroup groupFastMath
  */
 
 /**
- * @brief Fast approximation to the trigonometric sine function for Q15 data.
- * @param[in] x Scaled input value in radians.
- * @return  sin(x).
- *
- * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi).
+  @addtogroup sin
+  @{
+ */
+
+/**
+  @brief         Fast approximation to the trigonometric sine function for Q15 data.
+  @param[in]     x  Scaled input value in radians
+  @return        sin(x)
+
+  The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI).
  */
 
 q15_t arm_sin_q15(
   q15_t x)
 {
-  q15_t sinVal;                                  /* Temporary variables for input, output */
-  int32_t index;                                 /* Index variables */
-  q15_t a, b;                                    /* Four nearest output values */
+  q15_t sinVal;                                  /* Temporary input, output variables */
+  int32_t index;                                 /* Index variable */
+  q15_t a, b;                                    /* Two nearest output values */
   q15_t fract;                                   /* Temporary values for fractional values */
 
   /* Calculate the nearest index */
@@ -65,12 +65,13 @@
   b = sinTable_q15[index+1];
 
   /* Linear interpolation process */
-  sinVal = (q31_t)(0x8000-fract)*a >> 16;
-  sinVal = (q15_t)((((q31_t)sinVal << 16) + ((q31_t)fract*b)) >> 16);
+  sinVal = (q31_t) (0x8000 - fract) * a >> 16;
+  sinVal = (q15_t) ((((q31_t) sinVal << 16) + ((q31_t) fract * b)) >> 16);
 
-  return sinVal << 1;
+  /* Return output value */
+  return (sinVal << 1);
 }
 
 /**
- * @} end of sin group
+  @} end of sin group
  */
diff --git a/DSP/Source/FastMathFunctions/arm_sin_q31.c b/DSP/Source/FastMathFunctions/arm_sin_q31.c
index 8d3c7ac..8cefabb 100644
--- a/DSP/Source/FastMathFunctions/arm_sin_q31.c
+++ b/DSP/Source/FastMathFunctions/arm_sin_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_sin_q31.c
  * Description:  Fast sine calculation for Q31 values
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,27 +30,28 @@
 #include "arm_common_tables.h"
 
 /**
- * @ingroup groupFastMath
- */
-
- /**
- * @addtogroup sin
- * @{
+  @ingroup groupFastMath
  */
 
 /**
- * @brief Fast approximation to the trigonometric sine function for Q31 data.
- * @param[in] x Scaled input value in radians.
- * @return  sin(x).
- *
- * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi). */
+  @addtogroup sin
+  @{
+ */
+
+/**
+  @brief         Fast approximation to the trigonometric sine function for Q31 data.
+  @param[in]     x  Scaled input value in radians
+  @return        sin(x)
+
+  The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI).
+ */
 
 q31_t arm_sin_q31(
   q31_t x)
 {
   q31_t sinVal;                                  /* Temporary variables for input, output */
-  int32_t index;                                 /* Index variables */
-  q31_t a, b;                                    /* Four nearest output values */
+  int32_t index;                                 /* Index variable */
+  q31_t a, b;                                    /* Two nearest output values */
   q31_t fract;                                   /* Temporary values for fractional values */
 
   /* Calculate the nearest index */
@@ -64,12 +65,13 @@
   b = sinTable_q31[index+1];
 
   /* Linear interpolation process */
-  sinVal = (q63_t)(0x80000000-fract)*a >> 32;
-  sinVal = (q31_t)((((q63_t)sinVal << 32) + ((q63_t)fract*b)) >> 32);
+  sinVal = (q63_t) (0x80000000 - fract) * a >> 32;
+  sinVal = (q31_t) ((((q63_t) sinVal << 32) + ((q63_t) fract * b)) >> 32);
 
-  return sinVal << 1;
+  /* Return output value */
+  return (sinVal << 1);
 }
 
 /**
- * @} end of sin group
+  @} end of sin group
  */
diff --git a/DSP/Source/FastMathFunctions/arm_sqrt_q15.c b/DSP/Source/FastMathFunctions/arm_sqrt_q15.c
index 8487ed3..fab0a32 100644
--- a/DSP/Source/FastMathFunctions/arm_sqrt_q15.c
+++ b/DSP/Source/FastMathFunctions/arm_sqrt_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_sqrt_q15.c
  * Description:  Q15 square root function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,31 +29,30 @@
 #include "arm_math.h"
 #include "arm_common_tables.h"
 
-
 /**
- * @ingroup groupFastMath
+  @ingroup groupFastMath
  */
 
 /**
- * @addtogroup SQRT
- * @{
+  @addtogroup SQRT
+  @{
  */
 
-  /**
-   * @brief  Q15 square root function.
-   * @param[in]   in     input value.  The range of the input value is [0 +1) or 0x0000 to 0x7FFF.
-   * @param[out]  *pOut  square root of input value.
-   * @return The function returns ARM_MATH_SUCCESS if the input value is positive
-   * and ARM_MATH_ARGUMENT_ERROR if the input is negative.  For
-   * negative inputs, the function returns *pOut = 0.
-   */
+/**
+  @brief         Q15 square root function.
+  @param[in]     in    input value.  The range of the input value is [0 +1) or 0x0000 to 0x7FFF
+  @param[out]    pOut  points to square root of input value
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : input value is positive
+                   - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
+ */
 
 arm_status arm_sqrt_q15(
   q15_t in,
   q15_t * pOut)
 {
-  q15_t number, temp1, var1, signBits1, half;
   q31_t bits_val1;
+  q15_t number, temp1, var1, signBits1, half;
   float32_t temp_float1;
   union
   {
@@ -85,7 +84,7 @@
 
     /* Convert to float */
     temp_float1 = number * 3.051757812500000e-005f;
-    /*Store as integer */
+    /* Store as integer */
     tempconv.floatval = temp_float1;
     bits_val1 = tempconv.fracval;
     /* Subtract the shifted value from the magic number to give intial guess */
@@ -135,10 +134,11 @@
   else
   {
     *pOut = 0;
+
     return (ARM_MATH_ARGUMENT_ERROR);
   }
 }
 
 /**
- * @} end of SQRT group
+  @} end of SQRT group
  */
diff --git a/DSP/Source/FastMathFunctions/arm_sqrt_q31.c b/DSP/Source/FastMathFunctions/arm_sqrt_q31.c
index 0deea04..9889b13 100644
--- a/DSP/Source/FastMathFunctions/arm_sqrt_q31.c
+++ b/DSP/Source/FastMathFunctions/arm_sqrt_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_sqrt_q31.c
  * Description:  Q31 square root function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,33 +30,34 @@
 #include "arm_common_tables.h"
 
 /**
- * @ingroup groupFastMath
+  @ingroup groupFastMath
  */
 
 /**
- * @addtogroup SQRT
- * @{
+  @addtogroup SQRT
+  @{
  */
 
 /**
- * @brief Q31 square root function.
- * @param[in]   in    input value.  The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF.
- * @param[out]  *pOut square root of input value.
- * @return The function returns ARM_MATH_SUCCESS if the input value is positive
- * and ARM_MATH_ARGUMENT_ERROR if the input is negative.  For
- * negative inputs, the function returns *pOut = 0.
+  @brief         Q31 square root function.
+  @param[in]     in    input value.  The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF
+  @param[out]    pOut  points to square root of input value
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : input value is positive
+                   - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
  */
 
 arm_status arm_sqrt_q31(
   q31_t in,
   q31_t * pOut)
 {
-  q31_t number, temp1, bits_val1, var1, signBits1, half;
+  q31_t bits_val1;
+  q31_t number, temp1, var1, signBits1, half;
   float32_t temp_float1;
   union
   {
-      q31_t fracval;
-      float32_t floatval;
+    q31_t fracval;
+    float32_t floatval;
   } tempconv;
 
   number = in;
@@ -81,9 +82,9 @@
     /* Store the number for later use */
     temp1 = number;
 
-    /*Convert to float */
+    /* Convert to float */
     temp_float1 = number * 4.6566128731e-010f;
-    /*Store as integer */
+    /* Store as integer */
     tempconv.floatval = temp_float1;
     bits_val1 = tempconv.fracval;
     /* Subtract the shifted value from the magic number to give intial guess */
@@ -133,10 +134,11 @@
   else
   {
     *pOut = 0;
+
     return (ARM_MATH_ARGUMENT_ERROR);
   }
 }
 
 /**
- * @} end of SQRT group
+  @} end of SQRT group
  */
diff --git a/DSP/Source/FilteringFunctions/CMakeLists.txt b/DSP/Source/FilteringFunctions/CMakeLists.txt
new file mode 100644
index 0000000..59471ad
--- /dev/null
+++ b/DSP/Source/FilteringFunctions/CMakeLists.txt
@@ -0,0 +1,128 @@
+cmake_minimum_required (VERSION 3.6)
+
+project(CMSISDSPFiltering)
+
+
+add_library(CMSISDSPFiltering STATIC)
+
+include(interpol)
+interpol(CMSISDSPFiltering)
+
+configdsp(CMSISDSPFiltering ..)
+
+if (CONFIGTABLE AND ALLFAST)
+target_compile_definitions(CMSISDSPFiltering PUBLIC ARM_ALL_FAST_TABLES)  
+endif()
+
+if (NOT CONFIGTABLE OR ALLFAST OR ARM_LMS_NORM_Q31)
+target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_init_q31.c)
+endif()
+
+if (NOT CONFIGTABLE OR ALLFAST OR ARM_LMS_NORM_Q15)
+target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_init_q15.c)
+endif()
+
+target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_32x64_init_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_32x64_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_fast_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_fast_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_init_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_init_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_init_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_f64.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_init_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_init_f64.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_stereo_df2T_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_stereo_df2T_init_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_conv_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_conv_fast_opt_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_conv_fast_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_conv_fast_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_conv_opt_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_conv_opt_q7.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_fast_opt_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_fast_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_fast_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_opt_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_opt_q7.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_q7.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_conv_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_conv_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_conv_q7.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_correlate_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_correlate_fast_opt_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_correlate_fast_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_correlate_fast_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_correlate_opt_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_correlate_opt_q7.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_correlate_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_correlate_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_correlate_q7.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_fast_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_fast_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_init_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_init_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_init_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_fast_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_fast_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_init_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_init_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_init_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_init_q7.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_init_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_init_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_init_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_init_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_init_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_init_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_q7.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_init_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_init_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_init_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_init_q7.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_q7.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_init_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_init_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_init_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_lms_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_lms_init_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_lms_init_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_lms_init_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_init_f32.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_q31.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_lms_q15.c)
+target_sources(CMSISDSPFiltering PRIVATE arm_lms_q31.c)
+
+
+### Includes
+target_include_directories(CMSISDSPFiltering PUBLIC "${DSP}/../../Include")
+
+
+
diff --git a/DSP/Source/FilteringFunctions/FilteringFunctions.c b/DSP/Source/FilteringFunctions/FilteringFunctions.c
new file mode 100644
index 0000000..7ce0cdb
--- /dev/null
+++ b/DSP/Source/FilteringFunctions/FilteringFunctions.c
@@ -0,0 +1,127 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        FilteringFunctions.c
+ * Description:  Combination of all filtering function source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_biquad_cascade_df1_32x64_init_q31.c"
+#include "arm_biquad_cascade_df1_32x64_q31.c"
+#include "arm_biquad_cascade_df1_f32.c"
+#include "arm_biquad_cascade_df1_fast_q15.c"
+#include "arm_biquad_cascade_df1_fast_q31.c"
+#include "arm_biquad_cascade_df1_init_f32.c"
+#include "arm_biquad_cascade_df1_init_q15.c"
+#include "arm_biquad_cascade_df1_init_q31.c"
+#include "arm_biquad_cascade_df1_q15.c"
+#include "arm_biquad_cascade_df1_q31.c"
+#include "arm_biquad_cascade_df2T_f32.c"
+#include "arm_biquad_cascade_df2T_f64.c"
+#include "arm_biquad_cascade_df2T_init_f32.c"
+#include "arm_biquad_cascade_df2T_init_f64.c"
+#include "arm_biquad_cascade_stereo_df2T_f32.c"
+#include "arm_biquad_cascade_stereo_df2T_init_f32.c"
+#include "arm_conv_f32.c"
+#include "arm_conv_fast_opt_q15.c"
+#include "arm_conv_fast_q15.c"
+#include "arm_conv_fast_q31.c"
+#include "arm_conv_opt_q15.c"
+#include "arm_conv_opt_q7.c"
+#include "arm_conv_partial_f32.c"
+#include "arm_conv_partial_fast_opt_q15.c"
+#include "arm_conv_partial_fast_q15.c"
+#include "arm_conv_partial_fast_q31.c"
+#include "arm_conv_partial_opt_q15.c"
+#include "arm_conv_partial_opt_q7.c"
+#include "arm_conv_partial_q15.c"
+#include "arm_conv_partial_q31.c"
+#include "arm_conv_partial_q7.c"
+#include "arm_conv_q15.c"
+#include "arm_conv_q31.c"
+#include "arm_conv_q7.c"
+#include "arm_correlate_f32.c"
+#include "arm_correlate_fast_opt_q15.c"
+#include "arm_correlate_fast_q15.c"
+#include "arm_correlate_fast_q31.c"
+#include "arm_correlate_opt_q15.c"
+#include "arm_correlate_opt_q7.c"
+#include "arm_correlate_q15.c"
+#include "arm_correlate_q31.c"
+#include "arm_correlate_q7.c"
+#include "arm_fir_decimate_f32.c"
+#include "arm_fir_decimate_fast_q15.c"
+#include "arm_fir_decimate_fast_q31.c"
+#include "arm_fir_decimate_init_f32.c"
+#include "arm_fir_decimate_init_q15.c"
+#include "arm_fir_decimate_init_q31.c"
+#include "arm_fir_decimate_q15.c"
+#include "arm_fir_decimate_q31.c"
+#include "arm_fir_f32.c"
+#include "arm_fir_fast_q15.c"
+#include "arm_fir_fast_q31.c"
+#include "arm_fir_init_f32.c"
+#include "arm_fir_init_q15.c"
+#include "arm_fir_init_q31.c"
+#include "arm_fir_init_q7.c"
+#include "arm_fir_interpolate_f32.c"
+#include "arm_fir_interpolate_init_f32.c"
+#include "arm_fir_interpolate_init_q15.c"
+#include "arm_fir_interpolate_init_q31.c"
+#include "arm_fir_interpolate_q15.c"
+#include "arm_fir_interpolate_q31.c"
+#include "arm_fir_lattice_f32.c"
+#include "arm_fir_lattice_init_f32.c"
+#include "arm_fir_lattice_init_q15.c"
+#include "arm_fir_lattice_init_q31.c"
+#include "arm_fir_lattice_q15.c"
+#include "arm_fir_lattice_q31.c"
+#include "arm_fir_q15.c"
+#include "arm_fir_q31.c"
+#include "arm_fir_q7.c"
+#include "arm_fir_sparse_f32.c"
+#include "arm_fir_sparse_init_f32.c"
+#include "arm_fir_sparse_init_q15.c"
+#include "arm_fir_sparse_init_q31.c"
+#include "arm_fir_sparse_init_q7.c"
+#include "arm_fir_sparse_q15.c"
+#include "arm_fir_sparse_q31.c"
+#include "arm_fir_sparse_q7.c"
+#include "arm_iir_lattice_f32.c"
+#include "arm_iir_lattice_init_f32.c"
+#include "arm_iir_lattice_init_q15.c"
+#include "arm_iir_lattice_init_q31.c"
+#include "arm_iir_lattice_q15.c"
+#include "arm_iir_lattice_q31.c"
+#include "arm_lms_f32.c"
+#include "arm_lms_init_f32.c"
+#include "arm_lms_init_q15.c"
+#include "arm_lms_init_q31.c"
+#include "arm_lms_norm_f32.c"
+#include "arm_lms_norm_init_f32.c"
+#include "arm_lms_norm_init_q15.c"
+#include "arm_lms_norm_init_q31.c"
+#include "arm_lms_norm_q15.c"
+#include "arm_lms_norm_q31.c"
+#include "arm_lms_q15.c"
+#include "arm_lms_q31.c"
diff --git a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
index 8f92496..ac2313f 100644
--- a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_biquad_cascade_df1_32x64_init_q31.c
  * Description:  High precision Q31 Biquad cascade filter initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,53 +29,49 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup BiquadCascadeDF1_32x64
- * @{
+  @addtogroup BiquadCascadeDF1_32x64
+  @{
  */
 
 /**
- * @details
- *
- * @param[in,out] *S           	points to an instance of the high precision Q31 Biquad cascade filter structure.
- * @param[in]     numStages     number of 2nd order stages in the filter.
- * @param[in]     *pCoeffs      points to the filter coefficients.
- * @param[in]     *pState       points to the state buffer.
- * @param[in]     postShift     Shift to be applied after the accumulator.  Varies according to the coefficients format.
- * @return        none
- *
- * <b>Coefficient and State Ordering:</b>
- *
- * \par
- * The coefficients are stored in the array <code>pCoeffs</code> in the following order:
- * <pre>
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
- * </pre>
- * where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
- * <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
- * and so on.  The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
- *
- * \par
- * The <code>pState</code> points to state variables array and size of each state variable is 1.63 format.
- * Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
- * The state variables are arranged in the state array as:
- * <pre>
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}
- * </pre>
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
- * The state array has a total length of <code>4*numStages</code> values.
- * The state variables are updated after each block of data is processed; the coefficients are untouched.
+  @brief         Initialization function for the Q31 Biquad cascade 32x64 filter.
+  @param[in,out] S           points to an instance of the high precision Q31 Biquad cascade filter structure
+  @param[in]     numStages    number of 2nd order stages in the filter
+  @param[in]     pCoeffs      points to the filter coefficients
+  @param[in]     pState       points to the state buffer
+  @param[in]     postShift    Shift to be applied after the accumulator.  Varies according to the coefficients format
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array <code>pCoeffs</code> in the following order:
+  <pre>
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  </pre>
+                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+                   and so on.  The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
+  @par
+                   The <code>pState</code> points to state variables array and size of each state variable is 1.63 format.
+                   Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
+                   The state variables are arranged in the state array as:
+  <pre>
+      {x[n-1], x[n-2], y[n-1], y[n-2]}
+  </pre>
+                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+                   The state array has a total length of <code>4*numStages</code> values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
  */
 
 void arm_biquad_cas_df1_32x64_init_q31(
-  arm_biquad_cas_df1_32x64_ins_q31 * S,
-  uint8_t numStages,
-  q31_t * pCoeffs,
-  q63_t * pState,
-  uint8_t postShift)
+        arm_biquad_cas_df1_32x64_ins_q31 * S,
+        uint8_t numStages,
+  const q31_t * pCoeffs,
+        q63_t * pState,
+        uint8_t postShift)
 {
   /* Assign filter stages */
   S->numStages = numStages;
@@ -94,5 +90,5 @@
 }
 
 /**
- * @} end of BiquadCascadeDF1_32x64 group
+  @} end of BiquadCascadeDF1_32x64 group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
index c77cc8e..9a284b8 100644
--- a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_biquad_cascade_df1_32x64_q31.c
  * Description:  High precision Q31 Biquad cascade filter processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,174 +29,169 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @defgroup BiquadCascadeDF1_32x64 High Precision Q31 Biquad Cascade Filter
- *
- * This function implements a high precision Biquad cascade filter which operates on
- * Q31 data values.  The filter coefficients are in 1.31 format and the state variables
- * are in 1.63 format.  The double precision state variables reduce quantization noise
- * in the filter and provide a cleaner output.
- * These filters are particularly useful when implementing filters in which the
- * singularities are close to the unit circle.  This is common for low pass or high
- * pass filters with very low cutoff frequencies.
- *
- * The function operates on blocks of input and output data
- * and each call to the function processes <code>blockSize</code> samples through
- * the filter. <code>pSrc</code> and <code>pDst</code> points to input and output arrays
- * containing <code>blockSize</code> Q31 values.
- *
- * \par Algorithm
- * Each Biquad stage implements a second order filter using the difference equation:
- * <pre>
- *     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
- * </pre>
- * A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.
- * \image html Biquad.gif "Single Biquad filter stage"
- * Coefficients <code>b0, b1, and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
- * Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
- * Pay careful attention to the sign of the feedback coefficients.
- * Some design tools use the difference equation
- * <pre>
- *     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
- * </pre>
- * In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.
- *
- * \par
- * Higher order filters are realized as a cascade of second order sections.
- * <code>numStages</code> refers to the number of second order stages used.
- * For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
- * \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages"
- * A 9th order filter would be realized with <code>numStages=5</code> second order stages with the coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).
- *
- * \par
- * The <code>pState</code> points to state variables array .
- * Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code> and each state variable in 1.63 format to improve precision.
- * The state variables are arranged in the array as:
- * <pre>
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}
- * </pre>
- *
- * \par
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
- * The state array has a total length of <code>4*numStages</code> values of data in 1.63 format.
- * The state variables are updated after each block of data is processed; the coefficients are untouched.
- *
- * \par Instance Structure
- * The coefficients and state variables for a filter are stored together in an instance data structure.
- * A separate instance structure must be defined for each filter.
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
- *
- * \par Init Function
- * There is also an associated initialization function which performs the following operations:
- * - Sets the values of the internal structure fields.
- * - Zeros out the values in the state buffer.
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numStages, pCoeffs, postShift, pState. Also set all of the values in pState to zero.
- *
- * \par
- * Use of the initialization function is optional.
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
- * To place an instance structure into a const data section, the instance structure must be manually initialized.
- * Set the values in the state buffer to zeros before static initialization.
- * For example, to statically initialize the filter instance structure use
- * <pre>
- *     arm_biquad_cas_df1_32x64_ins_q31 S1 = {numStages, pState, pCoeffs, postShift};
- * </pre>
- * where <code>numStages</code> is the number of Biquad stages in the filter; <code>pState</code> is the address of the state buffer;
- * <code>pCoeffs</code> is the address of the coefficient buffer; <code>postShift</code> shift to be applied which is described in detail below.
- * \par Fixed-Point Behavior
- * Care must be taken while using Biquad Cascade 32x64 filter function.
- * Following issues must be considered:
- * - Scaling of coefficients
- * - Filter gain
- * - Overflow and saturation
- *
- * \par
- * Filter coefficients are represented as fractional values and
- * restricted to lie in the range <code>[-1 +1)</code>.
- * The processing function has an additional scaling parameter <code>postShift</code>
- * which allows the filter coefficients to exceed the range <code>[+1 -1)</code>.
- * At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
- * \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator"
- * This essentially scales the filter coefficients by <code>2^postShift</code>.
- * For example, to realize the coefficients
- * <pre>
- *    {1.5, -0.8, 1.2, 1.6, -0.9}
- * </pre>
- * set the Coefficient array to:
- * <pre>
- *    {0.75, -0.4, 0.6, 0.8, -0.45}
- * </pre>
- * and set <code>postShift=1</code>
- *
- * \par
- * The second thing to keep in mind is the gain through the filter.
- * The frequency response of a Biquad filter is a function of its coefficients.
- * It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies.
- * This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter.
- * To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.
- *
- * \par
- * The third item to consider is the overflow and saturation behavior of the fixed-point Q31 version.
- * This is described in the function specific documentation below.
+  @defgroup BiquadCascadeDF1_32x64 High Precision Q31 Biquad Cascade Filter
+
+  This function implements a high precision Biquad cascade filter which operates on
+  Q31 data values.  The filter coefficients are in 1.31 format and the state variables
+  are in 1.63 format.  The double precision state variables reduce quantization noise
+  in the filter and provide a cleaner output.
+  These filters are particularly useful when implementing filters in which the
+  singularities are close to the unit circle.  This is common for low pass or high
+  pass filters with very low cutoff frequencies.
+
+  The function operates on blocks of input and output data
+  and each call to the function processes <code>blockSize</code> samples through
+  the filter. <code>pSrc</code> and <code>pDst</code> points to input and output arrays
+  containing <code>blockSize</code> Q31 values.
+
+  @par           Algorithm
+                   Each Biquad stage implements a second order filter using the difference equation:
+  <pre>
+      y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+  </pre>
+                   A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.
+                   \image html Biquad.gif "Single Biquad filter stage"
+                   Coefficients <code>b0, b1 and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
+                   Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
+                   Pay careful attention to the sign of the feedback coefficients.
+                   Some design tools use the difference equation
+  <pre>
+      y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
+  </pre>
+                   In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.
+  @par
+                   Higher order filters are realized as a cascade of second order sections.
+                   <code>numStages</code> refers to the number of second order stages used.
+                   For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
+                   \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages"
+                   A 9th order filter would be realized with <code>numStages=5</code> second order stages
+                   with the coefficients for one of the stages configured as a first order filter
+                   (<code>b2=0</code> and <code>a2=0</code>).
+  @par
+                   The <code>pState</code> points to state variables array.
+                   Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code> and each state variable in 1.63 format to improve precision.
+                   The state variables are arranged in the array as:
+  <pre>
+      {x[n-1], x[n-2], y[n-1], y[n-2]}
+  </pre>
+  @par
+                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+                   The state array has a total length of <code>4*numStages</code> values of data in 1.63 format.
+                   The state variables are updated after each block of data is processed, the coefficients are untouched.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+
+  @par           Init Function
+                   There is also an associated initialization function which performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numStages, pCoeffs, postShift, pState. Also set all of the values in pState to zero.
+
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Set the values in the state buffer to zeros before static initialization.
+                   For example, to statically initialize the filter instance structure use
+  <pre>
+      arm_biquad_cas_df1_32x64_ins_q31 S1 = {numStages, pState, pCoeffs, postShift};
+  </pre>
+                   where <code>numStages</code> is the number of Biquad stages in the filter;
+                   <code>pState</code> is the address of the state buffer;
+                   <code>pCoeffs</code> is the address of the coefficient buffer;
+                   <code>postShift</code> shift to be applied which is described in detail below.
+  @par           Fixed-Point Behavior
+                   Care must be taken while using Biquad Cascade 32x64 filter function.
+                   Following issues must be considered:
+                   - Scaling of coefficients
+                   - Filter gain
+                   - Overflow and saturation
+
+  @par
+                   Filter coefficients are represented as fractional values and
+                   restricted to lie in the range <code>[-1 +1)</code>.
+                   The processing function has an additional scaling parameter <code>postShift</code>
+                   which allows the filter coefficients to exceed the range <code>[+1 -1)</code>.
+                   At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
+                   \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator"
+                   This essentially scales the filter coefficients by <code>2^postShift</code>.
+                   For example, to realize the coefficients
+  <pre>
+     {1.5, -0.8, 1.2, 1.6, -0.9}
+  </pre>
+                   set the Coefficient array to:
+  <pre>
+     {0.75, -0.4, 0.6, 0.8, -0.45}
+  </pre>
+                   and set <code>postShift=1</code>
+  @par
+                   The second thing to keep in mind is the gain through the filter.
+                   The frequency response of a Biquad filter is a function of its coefficients.
+                   It is possible for the gain through the filter to exceed 1.0 meaning that the
+                   filter increases the amplitude of certain frequencies.
+                   This means that an input signal with amplitude < 1.0 may result in an output > 1.0
+                   and these are saturated or overflowed based on the implementation of the filter.
+                   To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0
+                   or the input signal must be scaled down so that the combination of input and filter are never overflowed.
+  @par
+                   The third item to consider is the overflow and saturation behavior of the fixed-point Q31 version.
+                   This is described in the function specific documentation below.
  */
 
 /**
- * @addtogroup BiquadCascadeDF1_32x64
- * @{
+  @addtogroup BiquadCascadeDF1_32x64
+  @{
  */
 
 /**
- * @details
+  @brief         Processing function for the Q31 Biquad cascade 32x64 filter.
+  @param[in]     S         points to an instance of the high precision Q31 Biquad cascade filter
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process
+  @return        none
 
- * @param[in]  *S points to an instance of the high precision Q31 Biquad cascade filter.
- * @param[in]  *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in]  blockSize number of samples to process.
- * @return none.
- *
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * Thus, if the accumulator result overflows it wraps around rather than clip.
- * In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25).
- * After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by <code>postShift</code> bits and the result truncated to
- * 1.31 format by discarding the low 32 bits.
- *
- * \par
- * Two related functions are provided in the CMSIS DSP library.
- * <code>arm_biquad_cascade_df1_q31()</code> implements a Biquad cascade with 32-bit coefficients and state variables with a Q63 accumulator.
- * <code>arm_biquad_cascade_df1_fast_q31()</code> implements a Biquad cascade with 32-bit coefficients and state variables with a Q31 accumulator.
+  @par           Details
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clip.
+                   In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25).
+                   After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by <code>postShift</code> bits and the result truncated to
+                   1.31 format by discarding the low 32 bits.
+  @par
+                   Two related functions are provided in the CMSIS DSP library.
+                   - \ref arm_biquad_cascade_df1_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q63 accumulator.
+                   - \ref arm_biquad_cascade_df1_fast_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q31 accumulator.
  */
 
 void arm_biquad_cas_df1_32x64_q31(
   const arm_biquad_cas_df1_32x64_ins_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
+        q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-  q31_t *pIn = pSrc;                             /*  input pointer initialization  */
-  q31_t *pOut = pDst;                            /*  output pointer initialization */
-  q63_t *pState = S->pState;                     /*  state pointer initialization  */
-  q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  */
-  q63_t acc;                                     /*  accumulator                   */
-  q31_t Xn1, Xn2;                                /*  Input Filter state variables        */
-  q63_t Yn1, Yn2;                                /*  Output Filter state variables        */
-  q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
-  q31_t Xn;                                      /*  temporary input               */
-  int32_t shift = (int32_t) S->postShift + 1;    /*  Shift to be applied to the output */
-  uint32_t sample, stage = S->numStages;         /*  loop counters                     */
-  q31_t acc_l, acc_h;                            /*  temporary output               */
-  uint32_t uShift = ((uint32_t) S->postShift + 1U);
-  uint32_t lShift = 32U - uShift;                /*  Shift to be applied to the output */
-
-
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+        q31_t *pIn = pSrc;                             /* input pointer initialization */
+        q31_t *pOut = pDst;                            /* output pointer initialization */
+        q63_t *pState = S->pState;                     /* state pointer initialization */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* coeff pointer initialization */
+        q63_t acc;                                     /* accumulator */
+        q31_t Xn1, Xn2;                                /* Input Filter state variables */
+        q63_t Yn1, Yn2;                                /* Output Filter state variables */
+        q31_t b0, b1, b2, a1, a2;                      /* Filter coefficients */
+        q31_t Xn;                                      /* temporary input */
+        int32_t shift = (int32_t) S->postShift + 1;    /* Shift to be applied to the output */
+        uint32_t sample, stage = S->numStages;         /* loop counters */
+        q31_t acc_l, acc_h;                            /* temporary output */
+        uint32_t uShift = ((uint32_t) S->postShift + 1U);
+        uint32_t lShift = 32U - uShift;                /* Shift to be applied to the output */
 
   do
   {
@@ -213,16 +208,16 @@
     Yn1 = pState[2];
     Yn2 = pState[3];
 
+#if defined (ARM_MATH_LOOPUNROLL)
+
     /* Apply loop unrolling and compute 4 output values simultaneously. */
-    /* The variable acc hold output value that is being computed and
-     * stored in the destination buffer
+    /* Variable acc hold output value that is being computed and stored in destination buffer
      * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
      */
 
+    /* Loop unrolling: Compute 4 outputs at a time */
     sample = blockSize >> 2U;
 
-    /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
-     ** a second loop below computes the remaining 1 to 3 samples. */
     while (sample > 0U)
     {
       /* Read the input */
@@ -231,13 +226,13 @@
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
 
       /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn *b0;
+      acc = (q63_t) Xn * b0;
 
       /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn1 *b1;
+      acc += (q63_t) Xn1 * b1;
 
       /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn2 *b2;
+      acc += (q63_t) Xn2 * b2;
 
       /* acc +=  a1 * y[n-1] */
       acc += mult32x64(Yn1, a1);
@@ -266,13 +261,13 @@
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
 
       /* acc +=  b1 * x[n-1] */
-      acc = (q63_t) Xn *b1;
+      acc = (q63_t) Xn * b1;
 
       /* acc =  b0 * x[n] */
-      acc += (q63_t) Xn2 *b0;
+      acc += (q63_t) Xn2 * b0;
 
       /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn1 *b2;
+      acc += (q63_t) Xn1 * b2;
 
       /* acc +=  a1 * y[n-1] */
       acc += mult32x64(Yn2, a1);
@@ -302,13 +297,13 @@
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
 
       /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn1 *b0;
+      acc = (q63_t) Xn1 * b0;
 
       /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn2 *b1;
+      acc += (q63_t) Xn2 * b1;
 
       /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn *b2;
+      acc += (q63_t) Xn * b2;
 
       /* acc +=  a1 * y[n-1] */
       acc += mult32x64(Yn1, a1);
@@ -336,13 +331,13 @@
 
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
       /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn *b0;
+      acc = (q63_t) Xn * b0;
 
       /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn1 *b1;
+      acc += (q63_t) Xn1 * b1;
 
       /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn2 *b2;
+      acc += (q63_t) Xn2 * b2;
 
       /* acc +=  a1 * y[n-1] */
       acc += mult32x64(Yn2, a1);
@@ -366,139 +361,55 @@
       *(pOut + 3U) = acc_h;
 
       /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
       Xn2 = Xn1;
       Xn1 = Xn;
 
       /* update output pointer */
       pOut += 4U;
 
-      /* decrement the loop counter */
+      /* decrement loop counter */
       sample--;
     }
 
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
-    sample = (blockSize & 0x3U);
-
-    while (sample > 0U)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn *b0;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn1 *b1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn2 *b2;
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn1, a1);
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn2, a2);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      /* The result is converted to 1.63, Yn1 variable is reused  */
-      Yn1 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer in 1.31 format. */
-      *pOut++ = acc_h;
-      /* Yn1 = acc << shift; */
-
-      /* Store the output in the destination buffer in 1.31 format. */
-/*      *pOut++ = (q31_t) (acc >> (32 - shift));  */
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /*  The first stage output is given as input to the second stage. */
-    pIn = pDst;
-
-    /* Reset to destination buffer working pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the pState array */
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = (q63_t) Xn1;
-    *pState++ = (q63_t) Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-  } while (--stage);
+    /* Loop unrolling: Compute remaining outputs */
+    sample = blockSize & 0x3U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the state values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /* The variable acc hold output value that is being computed and
-     * stored in the destination buffer
-     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
-     */
-
+    /* Initialize blkCnt with number of samples */
     sample = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (sample > 0U)
     {
       /* Read the input */
       Xn = *pIn++;
 
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+
       /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn *b0;
+      acc = (q63_t) Xn * b0;
       /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn1 *b1;
+      acc += (q63_t) Xn1 * b1;
       /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn2 *b2;
+      acc += (q63_t) Xn2 * b2;
       /* acc +=  a1 * y[n-1] */
       acc += mult32x64(Yn1, a1);
       /* acc +=  a2 * y[n-2] */
       acc += mult32x64(Yn2, a2);
 
       /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
       Xn2 = Xn1;
       Xn1 = Xn;
       Yn2 = Yn1;
@@ -517,17 +428,16 @@
 
       /* Store the output in the destination buffer in 1.31 format. */
       *pOut++ = acc_h;
-
       /* Yn1 = acc << shift; */
 
       /* Store the output in the destination buffer in 1.31 format. */
-      /* *pOut++ = (q31_t) (acc >> (32 - shift)); */
+/*    *pOut++ = (q31_t) (acc >> (32 - shift));  */
 
-      /* decrement the loop counter */
+      /* decrement loop counter */
       sample--;
     }
 
-    /*  The first stage output is given as input to the second stage. */
+    /* The first stage output is given as input to the second stage. */
     pIn = pDst;
 
     /* Reset to destination buffer working pointer */
@@ -541,9 +451,8 @@
 
   } while (--stage);
 
-#endif /*    #if defined (ARM_MATH_DSP)     */
 }
 
-  /**
-   * @} end of BiquadCascadeDF1_32x64 group
-   */
+/**
+  @} end of BiquadCascadeDF1_32x64 group
+ */
diff --git a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c
index 0ffb29e..d28509d 100644
--- a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_biquad_cascade_df1_f32.c
  * Description:  Processing function for the floating-point Biquad cascade DirectFormI(DF1) filter
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,159 +29,308 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @defgroup BiquadCascadeDF1 Biquad Cascade IIR Filters Using Direct Form I Structure
- *
- * This set of functions implements arbitrary order recursive (IIR) filters.
- * The filters are implemented as a cascade of second order Biquad sections.
- * The functions support Q15, Q31 and floating-point data types.
- * Fast version of Q15 and Q31 also supported on CortexM4 and Cortex-M3.
- *
- * The functions operate on blocks of input and output data and each call to the function
- * processes <code>blockSize</code> samples through the filter.
- * <code>pSrc</code> points to the array of input data and
- * <code>pDst</code> points to the array of output data.
- * Both arrays contain <code>blockSize</code> values.
- *
- * \par Algorithm
- * Each Biquad stage implements a second order filter using the difference equation:
- * <pre>
- *     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
- * </pre>
- * A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.
- * \image html Biquad.gif "Single Biquad filter stage"
- * Coefficients <code>b0, b1 and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
- * Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
- * Pay careful attention to the sign of the feedback coefficients.
- * Some design tools use the difference equation
- * <pre>
- *     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
- * </pre>
- * In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.
- *
- * \par
- * Higher order filters are realized as a cascade of second order sections.
- * <code>numStages</code> refers to the number of second order stages used.
- * For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
- * \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages"
- * A 9th order filter would be realized with <code>numStages=5</code> second order stages with the coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).
- *
- * \par
- * The <code>pState</code> points to state variables array.
- * Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
- * The state variables are arranged in the <code>pState</code> array as:
- * <pre>
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}
- * </pre>
- *
- * \par
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
- * The state array has a total length of <code>4*numStages</code> values.
- * The state variables are updated after each block of data is processed, the coefficients are untouched.
- *
- * \par Instance Structure
- * The coefficients and state variables for a filter are stored together in an instance data structure.
- * A separate instance structure must be defined for each filter.
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
- * There are separate instance structure declarations for each of the 3 supported data types.
- *
- * \par Init Functions
- * There is also an associated initialization function for each data type.
- * The initialization function performs following operations:
- * - Sets the values of the internal structure fields.
- * - Zeros out the values in the state buffer.
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numStages, pCoeffs, pState. Also set all of the values in pState to zero.
- *
- * \par
- * Use of the initialization function is optional.
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
- * To place an instance structure into a const data section, the instance structure must be manually initialized.
- * Set the values in the state buffer to zeros before static initialization.
- * The code below statically initializes each of the 3 different data type filter instance structures
- * <pre>
- *     arm_biquad_casd_df1_inst_f32 S1 = {numStages, pState, pCoeffs};
- *     arm_biquad_casd_df1_inst_q15 S2 = {numStages, pState, pCoeffs, postShift};
- *     arm_biquad_casd_df1_inst_q31 S3 = {numStages, pState, pCoeffs, postShift};
- * </pre>
- * where <code>numStages</code> is the number of Biquad stages in the filter; <code>pState</code> is the address of the state buffer;
- * <code>pCoeffs</code> is the address of the coefficient buffer; <code>postShift</code> shift to be applied.
- *
- * \par Fixed-Point Behavior
- * Care must be taken when using the Q15 and Q31 versions of the Biquad Cascade filter functions.
- * Following issues must be considered:
- * - Scaling of coefficients
- * - Filter gain
- * - Overflow and saturation
- *
- * \par
- * <b>Scaling of coefficients: </b>
- * Filter coefficients are represented as fractional values and
- * coefficients are restricted to lie in the range <code>[-1 +1)</code>.
- * The fixed-point functions have an additional scaling parameter <code>postShift</code>
- * which allow the filter coefficients to exceed the range <code>[+1 -1)</code>.
- * At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
- * \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator"
- * This essentially scales the filter coefficients by <code>2^postShift</code>.
- * For example, to realize the coefficients
- * <pre>
- *    {1.5, -0.8, 1.2, 1.6, -0.9}
- * </pre>
- * set the pCoeffs array to:
- * <pre>
- *    {0.75, -0.4, 0.6, 0.8, -0.45}
- * </pre>
- * and set <code>postShift=1</code>
- *
- * \par
- * <b>Filter gain: </b>
- * The frequency response of a Biquad filter is a function of its coefficients.
- * It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies.
- * This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter.
- * To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.
- *
- * \par
- * <b>Overflow and saturation: </b>
- * For Q15 and Q31 versions, it is described separately as part of the function specific documentation below.
+  @defgroup BiquadCascadeDF1 Biquad Cascade IIR Filters Using Direct Form I Structure
+
+  This set of functions implements arbitrary order recursive (IIR) filters.
+  The filters are implemented as a cascade of second order Biquad sections.
+  The functions support Q15, Q31 and floating-point data types.
+  Fast version of Q15 and Q31 also available.
+
+  The functions operate on blocks of input and output data and each call to the function
+  processes <code>blockSize</code> samples through the filter.
+  <code>pSrc</code> points to the array of input data and
+  <code>pDst</code> points to the array of output data.
+  Both arrays contain <code>blockSize</code> values.
+
+  @par           Algorithm
+                   Each Biquad stage implements a second order filter using the difference equation:
+  <pre>
+      y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+  </pre>
+                  A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.
+                  \image html Biquad.gif "Single Biquad filter stage"
+                  Coefficients <code>b0, b1 and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
+                  Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
+                  Pay careful attention to the sign of the feedback coefficients.
+                  Some design tools use the difference equation
+  <pre>
+      y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
+  </pre>
+                  In this case the feedback coefficients <code>a1</code> and <code>a2</code>
+                  must be negated when used with the CMSIS DSP Library.
+
+  @par
+                   Higher order filters are realized as a cascade of second order sections.
+                   <code>numStages</code> refers to the number of second order stages used.
+                   For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
+                   \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages"
+                   A 9th order filter would be realized with <code>numStages=5</code> second order stages with the coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).
+
+  @par
+                   The <code>pState</code> points to state variables array.
+                   Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
+                   The state variables are arranged in the <code>pState</code> array as:
+  <pre>
+      {x[n-1], x[n-2], y[n-1], y[n-2]}
+  </pre>
+
+  @par
+                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+                   The state array has a total length of <code>4*numStages</code> values.
+                   The state variables are updated after each block of data is processed, the coefficients are untouched.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+
+  @par           Init Function
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numStages, pCoeffs, pState. Also set all of the values in pState to zero.
+
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Set the values in the state buffer to zeros before static initialization.
+                   The code below statically initializes each of the 3 different data type filter instance structures
+  <pre>
+      arm_biquad_casd_df1_inst_f32 S1 = {numStages, pState, pCoeffs};
+      arm_biquad_casd_df1_inst_q15 S2 = {numStages, pState, pCoeffs, postShift};
+      arm_biquad_casd_df1_inst_q31 S3 = {numStages, pState, pCoeffs, postShift};
+  </pre>
+                   where <code>numStages</code> is the number of Biquad stages in the filter;
+                   <code>pState</code> is the address of the state buffer;
+                   <code>pCoeffs</code> is the address of the coefficient buffer;
+                   <code>postShift</code> shift to be applied.
+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the Q15 and Q31 versions of the Biquad Cascade filter functions.
+                   Following issues must be considered:
+                   - Scaling of coefficients
+                   - Filter gain
+                   - Overflow and saturation
+
+  @par           Scaling of coefficients
+                   Filter coefficients are represented as fractional values and
+                   coefficients are restricted to lie in the range <code>[-1 +1)</code>.
+                   The fixed-point functions have an additional scaling parameter <code>postShift</code>
+                   which allow the filter coefficients to exceed the range <code>[+1 -1)</code>.
+                   At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
+                   \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator"
+                   This essentially scales the filter coefficients by <code>2^postShift</code>.
+                   For example, to realize the coefficients
+  <pre>
+     {1.5, -0.8, 1.2, 1.6, -0.9}
+  </pre>
+                   set the pCoeffs array to:
+  <pre>
+     {0.75, -0.4, 0.6, 0.8, -0.45}
+  </pre>
+                   and set <code>postShift=1</code>
+
+  @par           Filter gain
+                   The frequency response of a Biquad filter is a function of its coefficients.
+                   It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies.
+                   This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter.
+                   To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.
+
+  @par           Overflow and saturation
+                   For Q15 and Q31 versions, it is described separately as part of the function specific documentation below.
  */
 
 /**
- * @addtogroup BiquadCascadeDF1
- * @{
+  @addtogroup BiquadCascadeDF1
+  @{
  */
 
 /**
- * @param[in]  *S         points to an instance of the floating-point Biquad cascade structure.
- * @param[in]  *pSrc      points to the block of input data.
- * @param[out] *pDst      points to the block of output data.
- * @param[in]  blockSize  number of samples to process per call.
- * @return     none.
- *
+  @brief         Processing function for the floating-point Biquad cascade filter.
+  @param[in]     S         points to an instance of the floating-point Biquad cascade structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
  */
 
+#if defined(ARM_MATH_NEON) 
 void arm_biquad_cascade_df1_f32(
   const arm_biquad_casd_df1_inst_f32 * S,
-  float32_t * pSrc,
+  const float32_t * pSrc,
   float32_t * pDst,
   uint32_t blockSize)
 {
-  float32_t *pIn = pSrc;                         /*  source pointer            */
+
+  const float32_t *pIn = pSrc;                         /*  source pointer            */
   float32_t *pOut = pDst;                        /*  destination pointer       */
   float32_t *pState = S->pState;                 /*  pState pointer            */
-  float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
+  const float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
   float32_t acc;                                 /*  Simulates the accumulator */
-  float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
-  float32_t Xn1, Xn2, Yn1, Yn2;                  /*  Filter pState variables   */
-  float32_t Xn;                                  /*  temporary input           */
+  
   uint32_t sample, stage = S->numStages;         /*  loop counters             */
 
+  float32x4_t Xn;
+  float32x2_t Yn;
+  float32x2_t a;
+  float32x4_t b;
+  
+  float32x4_t x,tmp;
+  float32x2_t t;
+  float32x2x2_t y;
 
-#if defined (ARM_MATH_DSP)
+  float32_t Xns;
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+  while (stage > 0U)
+  {
+    /* Reading the coefficients */
+    Xn = vld1q_f32(pState);
+    Yn = vld1_f32(pState + 2);
+
+    b = vld1q_f32(pCoeffs);
+    b = vrev64q_f32(b);  
+    b = vcombine_f32(vget_high_f32(b), vget_low_f32(b));
+
+    a = vld1_f32(pCoeffs + 3);
+    a = vrev64_f32(a);
+    b[0] = 0.0;
+    pCoeffs += 5;
+    
+    /* Reading the pState values */
+   
+    /* Apply loop unrolling and compute 4 output values simultaneously. */
+    /*      The variable acc hold output values that are being computed:
+     *
+     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     */
+
+    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+     ** a second loop below computes the remaining 1 to 3 samples. */
+    sample = blockSize >> 2U;
+
+    while (sample > 0U)
+    {
+      /* Read the first 4 inputs */
+      x = vld1q_f32(pIn);
+
+      pIn += 4;
+
+      tmp = vextq_f32(Xn, x, 1);
+      t = vmul_f32(vget_high_f32(b), vget_high_f32(tmp));
+      t = vmla_f32(t, vget_low_f32(b), vget_low_f32(tmp));
+      t = vmla_f32(t, a, Yn);
+      t = vpadd_f32(t, t);
+      Yn = vext_f32(Yn, t, 1);
+
+      tmp = vextq_f32(Xn, x, 2);
+      t = vmul_f32(vget_high_f32(b), vget_high_f32(tmp));
+      t = vmla_f32(t, vget_low_f32(b), vget_low_f32(tmp));
+      t = vmla_f32(t, a, Yn);
+      t = vpadd_f32(t, t);
+      Yn = vext_f32(Yn, t, 1);
+
+      y.val[0] = Yn;
+
+      tmp = vextq_f32(Xn, x, 3);
+      t = vmul_f32(vget_high_f32(b), vget_high_f32(tmp));
+      t = vmla_f32(t, vget_low_f32(b), vget_low_f32(tmp));
+      t = vmla_f32(t, a, Yn);
+      t = vpadd_f32(t, t);
+      Yn = vext_f32(Yn, t, 1);
+
+      Xn = x;
+      t = vmul_f32(vget_high_f32(b), vget_high_f32(Xn));
+      t = vmla_f32(t, vget_low_f32(b), vget_low_f32(Xn));
+      t = vmla_f32(t, a, Yn);
+      t = vpadd_f32(t, t);
+      Yn = vext_f32(Yn, t, 1);
+      
+      y.val[1] = Yn;
+
+      tmp = vcombine_f32(y.val[0], y.val[1]);
+
+      /* Store the 4 outputs and increment the pointer */
+      vst1q_f32(pOut, tmp);
+      pOut += 4;
+
+      /* Decrement the loop counter */
+      sample--;
+    }
+
+    /* If the block size is not a multiple of 4, compute any remaining output samples here.
+     ** No loop unrolling is used. */
+    sample = blockSize & 0x3U;
+
+    while (sample > 0U)
+    {
+      /* Read the input */
+      Xns = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      acc =  (b[1] * Xn[2]) + (b[2] * Xn[3]) + (b[3] * Xns) + (a[0] * Yn[0]) + (a[1] * Yn[1]);
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = acc;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as:    */
+      /* Xn2 = Xn1   */
+      /* Xn1 = Xn    */
+      /* Yn2 = Yn1   */
+      /* Yn1 = acc   */
+      Xn[2] = Xn[3];
+      Xn[3] = Xns;
+      Yn[0] = Yn[1];
+      Yn[1] = acc;
+
+      /* Decrement the loop counter */
+      sample--;
+
+    }
+
+    vst1q_f32(pState,vcombine_f32(vrev64_f32(vget_high_f32(Xn)),vrev64_f32(Yn)));
+    pState += 4;
+    /*  Store the updated state variables back into the pState array */
+   
+    /*  The first stage goes from the input buffer to the output buffer. */
+    /*  Subsequent numStages  occur in-place in the output buffer */
+    pIn = pDst;
+
+    /* Reset the output pointer */
+    pOut = pDst;
+
+    /* Decrement the loop counter */
+    stage--;
+  }
+}
+
+#else
+void arm_biquad_cascade_df1_f32(
+  const arm_biquad_casd_df1_inst_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+  const float32_t *pIn = pSrc;                         /* Source pointer */
+        float32_t *pOut = pDst;                        /* Destination pointer */
+        float32_t *pState = S->pState;                 /* pState pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t acc;                                 /* Accumulator */
+        float32_t b0, b1, b2, a1, a2;                  /* Filter coefficients */
+        float32_t Xn1, Xn2, Yn1, Yn2;                  /* Filter pState variables */
+        float32_t Xn;                                  /* Temporary input */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
 
   do
   {
@@ -198,19 +347,20 @@
     Yn1 = pState[2];
     Yn2 = pState[3];
 
+#if defined (ARM_MATH_LOOPUNROLL)
+
     /* Apply loop unrolling and compute 4 output values simultaneously. */
-    /*      The variable acc hold output values that are being computed:
+    /* Variable acc hold output values that are being computed:
      *
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
      */
 
+    /* Loop unrolling: Compute 4 outputs at a time */
     sample = blockSize >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-     ** a second loop below computes the remaining 1 to 3 samples. */
     while (sample > 0U)
     {
       /* Read the first input */
@@ -219,15 +369,15 @@
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
       Yn2 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
 
-      /* Store the result in the accumulator in the destination buffer. */
+      /* Store output in destination buffer. */
       *pOut++ = Yn2;
 
       /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
 
       /* Read the second input */
       Xn2 = *pIn++;
@@ -235,15 +385,15 @@
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
       Yn1 = (b0 * Xn2) + (b1 * Xn) + (b2 * Xn1) + (a1 * Yn2) + (a2 * Yn1);
 
-      /* Store the result in the accumulator in the destination buffer. */
+      /* Store output in destination buffer. */
       *pOut++ = Yn1;
 
       /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
 
       /* Read the third input */
       Xn1 = *pIn++;
@@ -251,15 +401,15 @@
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
       Yn2 = (b0 * Xn1) + (b1 * Xn2) + (b2 * Xn) + (a1 * Yn1) + (a2 * Yn2);
 
-      /* Store the result in the accumulator in the destination buffer. */
+      /* Store output in destination buffer. */
       *pOut++ = Yn2;
 
       /* Every time after the output is computed state should be updated. */
       /* The states should be updated as: */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
 
       /* Read the forth input */
       Xn = *pIn++;
@@ -267,97 +417,32 @@
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
       Yn1 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn2) + (a2 * Yn1);
 
-      /* Store the result in the accumulator in the destination buffer. */
+      /* Store output in destination buffer. */
       *pOut++ = Yn1;
 
       /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
       Xn2 = Xn1;
       Xn1 = Xn;
 
-      /* decrement the loop counter */
+      /* decrement loop counter */
       sample--;
-
     }
 
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     sample = blockSize & 0x3U;
 
-    while (sample > 0U)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:    */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = acc;
-
-      /* decrement the loop counter */
-      sample--;
-
-    }
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent numStages  occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset the output pointer */
-    pOut = pDst;
-
-    /* decrement the loop counter */
-    stage--;
-
-  } while (stage > 0U);
-
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the pState values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /*      The variables acc holds the output value that is computed:
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]
-     */
-
+    /* Initialize blkCnt with number of samples */
     sample = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (sample > 0U)
     {
       /* Read the input */
@@ -366,47 +451,45 @@
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
       acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
 
-      /* Store the result in the accumulator in the destination buffer. */
+      /* Store output in destination buffer. */
       *pOut++ = acc;
 
       /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:    */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
       Xn2 = Xn1;
       Xn1 = Xn;
       Yn2 = Yn1;
       Yn1 = acc;
 
-      /* decrement the loop counter */
+      /* decrement loop counter */
       sample--;
     }
 
-    /*  Store the updated state variables back into the pState array */
+    /* Store the updated state variables back into the pState array */
     *pState++ = Xn1;
     *pState++ = Xn2;
     *pState++ = Yn1;
     *pState++ = Yn2;
 
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent numStages  occur in-place in the output buffer */
+    /* The first stage goes from the input buffer to the output buffer. */
+    /* Subsequent numStages occur in-place in the output buffer */
     pIn = pDst;
 
-    /* Reset the output pointer */
+    /* Reset output pointer */
     pOut = pDst;
 
-    /* decrement the loop counter */
+    /* decrement loop counter */
     stage--;
 
   } while (stage > 0U);
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
 }
 
-
-  /**
-   * @} end of BiquadCascadeDF1 group
-   */
+#endif /* #if defined(ARM_MATH_NEON) */
+/**
+  @} end of BiquadCascadeDF1 group
+ */
diff --git a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c
index ab517d8..1a568d7 100644
--- a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_biquad_cascade_df1_fast_q15.c
  * Description:  Fast processing function for the Q15 Biquad cascade filter
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,90 +29,87 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup BiquadCascadeDF1
- * @{
+  @addtogroup BiquadCascadeDF1
+  @{
  */
 
 /**
- * @details
- * @param[in]  *S points to an instance of the Q15 Biquad cascade structure.
- * @param[in]  *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in]  blockSize number of samples to process per call.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * This fast version uses a 32-bit accumulator with 2.30 format.
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * Thus, if the accumulator result overflows it wraps around and distorts the result.
- * In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25).
- * The 2.30 accumulator is then shifted by <code>postShift</code> bits and the result truncated to 1.15 format by discarding the low 16 bits.
- *
- * \par
- * Refer to the function <code>arm_biquad_cascade_df1_q15()</code> for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.  Both the slow and the fast versions use the same instance structure.
- * Use the function <code>arm_biquad_cascade_df1_init_q15()</code> to initialize the filter structure.
- *
+  @brief         Processing function for the Q15 Biquad cascade filter (fast variant).
+  @param[in]     S         points to an instance of the Q15 Biquad cascade structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process per call
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This fast version uses a 32-bit accumulator with 2.30 format.
+                   The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around and distorts the result.
+                   In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25).
+                   The 2.30 accumulator is then shifted by <code>postShift</code> bits and the result truncated to 1.15 format by discarding the low 16 bits.
+ @remark
+                   Refer to \ref arm_biquad_cascade_df1_q15() for a slower implementation of this function
+                   which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure.
+                   Use the function \ref arm_biquad_cascade_df1_init_q15() to initialize the filter structure.
  */
 
 void arm_biquad_cascade_df1_fast_q15(
   const arm_biquad_casd_df1_inst_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
-  q15_t *pIn = pSrc;                             /*  Source pointer                               */
-  q15_t *pOut = pDst;                            /*  Destination pointer                          */
-  q31_t in;                                      /*  Temporary variable to hold input value       */
-  q31_t out;                                     /*  Temporary variable to hold output value      */
-  q31_t b0;                                      /*  Temporary variable to hold bo value          */
-  q31_t b1, a1;                                  /*  Filter coefficients                          */
-  q31_t state_in, state_out;                     /*  Filter state variables                       */
-  q31_t acc;                                     /*  Accumulator                                  */
-  int32_t shift = (int32_t) (15 - S->postShift); /*  Post shift                                   */
-  q15_t *pState = S->pState;                     /*  State pointer                                */
-  q15_t *pCoeffs = S->pCoeffs;                   /*  Coefficient pointer                          */
-  uint32_t sample, stage = S->numStages;         /*  Stage loop counter                           */
-
-
+  const q15_t *pIn = pSrc;                             /* Source pointer */
+        q15_t *pOut = pDst;                            /* Destination pointer */
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t acc;                                     /* Accumulator */
+        q31_t in;                                      /* Temporary variable to hold input value */
+        q31_t out;                                     /* Temporary variable to hold output value */
+        q31_t b0;                                      /* Temporary variable to hold bo value */
+        q31_t b1, a1;                                  /* Filter coefficients */
+        q31_t state_in, state_out;                     /* Filter state variables */
+        int32_t shift = (int32_t) (15 - S->postShift); /* Post shift */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
 
   do
   {
-
     /* Read the b0 and 0 coefficients using SIMD  */
-    b0 = *__SIMD32(pCoeffs)++;
+    b0 = read_q15x2_ia ((q15_t **) &pCoeffs);
 
     /* Read the b1 and b2 coefficients using SIMD */
-    b1 = *__SIMD32(pCoeffs)++;
+    b1 = read_q15x2_ia ((q15_t **) &pCoeffs);
 
     /* Read the a1 and a2 coefficients using SIMD */
-    a1 = *__SIMD32(pCoeffs)++;
+    a1 = read_q15x2_ia ((q15_t **) &pCoeffs);
 
     /* Read the input state values from the state buffer:  x[n-1], x[n-2] */
-    state_in = *__SIMD32(pState)++;
+    state_in = read_q15x2_ia (&pState);
 
     /* Read the output state values from the state buffer:  y[n-1], y[n-2] */
-    state_out = *__SIMD32(pState)--;
+    state_out = read_q15x2_da (&pState);
+
+#if defined (ARM_MATH_LOOPUNROLL)
 
     /* Apply loop unrolling and compute 2 output values simultaneously. */
-    /*      The variable acc hold output values that are being computed:
+    /* Variable acc hold output values that are being computed:
      *
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
      */
+
+    /* Loop unrolling: Compute 2 outputs at a time */
     sample = blockSize >> 1U;
 
-    /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.
-     ** a second loop below computes the remaining 1 sample. */
     while (sample > 0U)
     {
 
       /* Read the input */
-      in = *__SIMD32(pIn)++;
+      in = read_q15x2_ia ((q15_t **) &pIn);
 
       /* out =  b0 * x[n] + 0 * 0 */
       out = __SMUAD(b0, in);
@@ -126,24 +123,20 @@
 
       /* Every time after the output is computed state should be updated. */
       /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
       /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
       /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
 
 #ifndef  ARM_MATH_BIG_ENDIAN
-
-      state_in = __PKHBT(in, state_in, 16);
+      state_in  = __PKHBT(in, state_in, 16);
       state_out = __PKHBT(out, state_out, 16);
-
 #else
-
-      state_in = __PKHBT(state_in >> 16, (in >> 16), 16);
+      state_in  = __PKHBT(state_in >> 16, (in >> 16), 16);
       state_out = __PKHBT(state_out >> 16, (out), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
 
       /* out =  b0 * x[n] + 0 * 0 */
       out = __SMUADX(b0, in);
@@ -155,64 +148,53 @@
       /* The result is converted from 3.29 to 1.31 and then saturation is applied */
       out = __SSAT((acc >> shift), 16);
 
-
       /* Store the output in the destination buffer. */
-
 #ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ = __PKHBT(state_out, out, 16);
-
+      write_q15x2_ia (&pOut, __PKHBT(state_out, out, 16));
 #else
-
-      *__SIMD32(pOut)++ = __PKHBT(out, state_out >> 16, 16);
-
+      write_q15x2_ia (&pOut, __PKHBT(out, state_out >> 16, 16));
 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
 
       /* Every time after the output is computed state should be updated. */
       /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
       /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
       /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-
 #ifndef  ARM_MATH_BIG_ENDIAN
-
-      state_in = __PKHBT(in >> 16, state_in, 16);
+      state_in  = __PKHBT(in >> 16, state_in, 16);
       state_out = __PKHBT(out, state_out, 16);
+#else
+      state_in  = __PKHBT(state_in >> 16, in, 16);
+      state_out = __PKHBT(state_out >> 16, out, 16);
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* Decrement loop counter */
+      sample--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    sample = (blockSize & 0x1U);
 
 #else
 
-      state_in = __PKHBT(state_in >> 16, in, 16);
-      state_out = __PKHBT(state_out >> 16, out, 16);
+    /* Initialize blkCnt with number of samples */
+    sample = blockSize;
 
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
-
-      /* Decrement the loop counter */
-      sample--;
-
-    }
-
-    /* If the blockSize is not a multiple of 2, compute any remaining output samples here.
-     ** No loop unrolling is used. */
-
-    if ((blockSize & 0x1U) != 0U)
+    while (sample > 0U)
     {
       /* Read the input */
       in = *pIn++;
 
       /* out =  b0 * x[n] + 0 * 0 */
-
 #ifndef  ARM_MATH_BIG_ENDIAN
-
       out = __SMUAD(b0, in);
-
 #else
-
       out = __SMUADX(b0, in);
-
 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
 
       /* acc =  b1 * x[n-1], acc +=  b2 * x[n-2] + out */
@@ -228,46 +210,41 @@
 
       /* Every time after the output is computed state should be updated. */
       /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
       /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
       /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-
 #ifndef  ARM_MATH_BIG_ENDIAN
-
       state_in = __PKHBT(in, state_in, 16);
       state_out = __PKHBT(out, state_out, 16);
-
 #else
-
       state_in = __PKHBT(state_in >> 16, in, 16);
       state_out = __PKHBT(state_out >> 16, out, 16);
-
 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
 
+      /* decrement loop counter */
+      sample--;
     }
 
-    /*  The first stage goes from the input buffer to the output buffer.  */
-    /*  Subsequent (numStages - 1) occur in-place in the output buffer  */
+    /* The first stage goes from the input buffer to the output buffer. */
+    /* Subsequent (numStages - 1) occur in-place in the output buffer */
     pIn = pDst;
 
     /* Reset the output pointer */
     pOut = pDst;
 
-    /*  Store the updated state variables back into the state array */
-    *__SIMD32(pState)++ = state_in;
-    *__SIMD32(pState)++ = state_out;
+    /* Store the updated state variables back into the state array */
+    write_q15x2_ia(&pState, state_in);
+    write_q15x2_ia(&pState, state_out);
 
-
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     stage--;
 
   } while (stage > 0U);
 }
 
-
 /**
- * @} end of BiquadCascadeDF1 group
+  @} end of BiquadCascadeDF1 group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c
index 00dbae1..586296b 100644
--- a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_biquad_cascade_df1_fast_q31.c
  * Description:  Processing function for the Q31 Fast Biquad cascade DirectFormI(DF1) filter
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,55 +29,52 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup BiquadCascadeDF1
- * @{
+  @addtogroup BiquadCascadeDF1
+  @{
  */
 
 /**
- * @details
- *
- * @param[in]  *S        points to an instance of the Q31 Biquad cascade structure.
- * @param[in]  *pSrc     points to the block of input data.
- * @param[out] *pDst     points to the block of output data.
- * @param[in]  blockSize number of samples to process per call.
- * @return     none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
- * These intermediate results are added to a 2.30 accumulator.
- * Finally, the accumulator is saturated and converted to a 1.31 result.
- * The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.
- * In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). Use the intialization function
- * arm_biquad_cascade_df1_init_q31() to initialize filter structure.
- *
- * \par
- * Refer to the function <code>arm_biquad_cascade_df1_q31()</code> for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.  Both the slow and the fast versions use the same instance structure.
- * Use the function <code>arm_biquad_cascade_df1_init_q31()</code> to initialize the filter structure.
+  @brief         Processing function for the Q31 Biquad cascade filter (fast variant).
+  @param[in]     S         points to an instance of the Q31 Biquad cascade structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process per call
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This function is optimized for speed at the expense of fixed-point precision and overflow protection.
+                   The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
+                   These intermediate results are added to a 2.30 accumulator.
+                   Finally, the accumulator is saturated and converted to a 1.31 result.
+                   The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.
+                   In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). Use the intialization function
+                   arm_biquad_cascade_df1_init_q31() to initialize filter structure.
+  @remark
+                   Refer to \ref arm_biquad_cascade_df1_q31() for a slower implementation of this function
+                   which uses 64-bit accumulation to provide higher precision. Both the slow and the fast versions use the same instance structure.
+                   Use the function \ref arm_biquad_cascade_df1_init_q31() to initialize the filter structure.
  */
 
 void arm_biquad_cascade_df1_fast_q31(
   const arm_biquad_casd_df1_inst_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-  q31_t acc = 0;                                 /*  accumulator                   */
-  q31_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
-  q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
-  q31_t *pIn = pSrc;                             /*  input pointer initialization  */
-  q31_t *pOut = pDst;                            /*  output pointer initialization */
-  q31_t *pState = S->pState;                     /*  pState pointer initialization */
-  q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  */
-  q31_t Xn;                                      /*  temporary input               */
-  int32_t shift = (int32_t) S->postShift + 1;    /*  Shift to be applied to the output */
-  uint32_t sample, stage = S->numStages;         /*  loop counters                     */
-
+  const q31_t *pIn = pSrc;                             /* Source pointer */
+        q31_t *pOut = pDst;                            /* Destination pointer */
+        q31_t *pState = S->pState;                     /* pState pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t acc = 0;                                 /* Accumulator */
+        q31_t b0, b1, b2, a1, a2;                      /* Filter coefficients */
+        q31_t Xn1, Xn2, Yn1, Yn2;                      /* Filter pState variables */
+        q31_t Xn;                                      /* Temporary input */
+        int32_t shift = (int32_t) S->postShift + 1;    /* Shift to be applied to the output */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
 
   do
   {
@@ -88,22 +85,23 @@
     a1 = *pCoeffs++;
     a2 = *pCoeffs++;
 
-    /* Reading the state values */
+    /* Reading the pState values */
     Xn1 = pState[0];
     Xn2 = pState[1];
     Yn1 = pState[2];
     Yn2 = pState[3];
 
+#if defined (ARM_MATH_LOOPUNROLL)
+
     /* Apply loop unrolling and compute 4 output values simultaneously. */
-    /*      The variables acc ... acc3 hold output values that are being computed:
+    /* Variables acc ... acc3 hold output values that are being computed:
      *
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
      */
 
+    /* Loop unrolling: Compute 4 outputs at a time */
     sample = blockSize >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-     ** a second loop below computes the remaining 1 to 3 samples. */
     while (sample > 0U)
     {
       /* Read the input */
@@ -111,19 +109,19 @@
 
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
       /* acc =  b0 * x[n] */
-      /*acc = (q31_t) (((q63_t) b1 * Xn1) >> 32);*/
+      /* acc = (q31_t) (((q63_t) b1 * Xn1) >> 32);*/
       mult_32x32_keep32_R(acc, b1, Xn1);
       /* acc +=  b1 * x[n-1] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b0 * (Xn))) >> 32);*/
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b0 * (Xn))) >> 32);*/
       multAcc_32x32_keep32_R(acc, b0, Xn);
       /* acc +=  b[2] * x[n-2] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/
       multAcc_32x32_keep32_R(acc, b2, Xn2);
       /* acc +=  a1 * y[n-1] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
       multAcc_32x32_keep32_R(acc, a1, Yn1);
       /* acc +=  a2 * y[n-2] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
       multAcc_32x32_keep32_R(acc, a2, Yn2);
 
       /* The result is converted to 1.31 , Yn2 variable is reused */
@@ -137,19 +135,19 @@
 
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
       /* acc =  b0 * x[n] */
-      /*acc = (q31_t) (((q63_t) b0 * (Xn2)) >> 32);*/
+      /* acc = (q31_t) (((q63_t) b0 * (Xn2)) >> 32);*/
       mult_32x32_keep32_R(acc, b0, Xn2);
       /* acc +=  b1 * x[n-1] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn))) >> 32);*/
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn))) >> 32);*/
       multAcc_32x32_keep32_R(acc, b1, Xn);
       /* acc +=  b[2] * x[n-2] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn1))) >> 32);*/
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn1))) >> 32);*/
       multAcc_32x32_keep32_R(acc, b2, Xn1);
       /* acc +=  a1 * y[n-1] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);*/
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);*/
       multAcc_32x32_keep32_R(acc, a1, Yn2);
       /* acc +=  a2 * y[n-2] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);*/
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);*/
       multAcc_32x32_keep32_R(acc, a2, Yn1);
 
       /* The result is converted to 1.31, Yn1 variable is reused  */
@@ -163,19 +161,19 @@
 
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
       /* acc =  b0 * x[n] */
-      /*acc = (q31_t) (((q63_t) b0 * (Xn1)) >> 32);*/
+      /* acc = (q31_t) (((q63_t) b0 * (Xn1)) >> 32);*/
       mult_32x32_keep32_R(acc, b0, Xn1);
       /* acc +=  b1 * x[n-1] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn2))) >> 32);*/
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn2))) >> 32);*/
       multAcc_32x32_keep32_R(acc, b1, Xn2);
       /* acc +=  b[2] * x[n-2] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn))) >> 32);*/
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn))) >> 32);*/
       multAcc_32x32_keep32_R(acc, b2, Xn);
       /* acc +=  a1 * y[n-1] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
       multAcc_32x32_keep32_R(acc, a1, Yn1);
       /* acc +=  a2 * y[n-2] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
       multAcc_32x32_keep32_R(acc, a2, Yn2);
 
       /* The result is converted to 1.31, Yn2 variable is reused  */
@@ -190,7 +188,7 @@
 
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
       /* acc =  b0 * x[n] */
-      /*acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);*/
+      /* acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);*/
       mult_32x32_keep32_R(acc, b0, Xn);
       /* acc +=  b1 * x[n-1] */
       /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);*/
@@ -207,47 +205,53 @@
 
       /* Every time after the output is computed state should be updated. */
       /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
+      /* Xn2 = Xn1 */
       Xn2 = Xn1;
 
       /* The result is converted to 1.31, Yn1 variable is reused  */
       Yn1 = acc << shift;
 
-      /* Xn1 = Xn     */
+      /* Xn1 = Xn */
       Xn1 = Xn;
 
       /* Store the output in the destination buffer. */
       *(pOut + 3U) = Yn1;
       pOut += 4U;
 
-      /* decrement the loop counter */
+      /* decrement loop counter */
       sample--;
     }
 
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     sample = (blockSize & 0x3U);
 
-   while (sample > 0U)
-   {
+#else
+
+    /* Initialize blkCnt with number of samples */
+    sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (sample > 0U)
+    {
       /* Read the input */
       Xn = *pIn++;
 
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
       /* acc =  b0 * x[n] */
-      /*acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);*/
+      /* acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);*/
       mult_32x32_keep32_R(acc, b0, Xn);
       /* acc +=  b1 * x[n-1] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);*/
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);*/
       multAcc_32x32_keep32_R(acc, b1, Xn1);
       /* acc +=  b[2] * x[n-2] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/
       multAcc_32x32_keep32_R(acc, b2, Xn2);
       /* acc +=  a1 * y[n-1] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
       multAcc_32x32_keep32_R(acc, a1, Yn1);
       /* acc +=  a2 * y[n-2] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
       multAcc_32x32_keep32_R(acc, a2, Yn2);
 
       /* The result is converted to 1.31  */
@@ -255,10 +259,10 @@
 
       /* Every time after the output is computed state should be updated. */
       /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
       Xn2 = Xn1;
       Xn1 = Xn;
       Yn2 = Yn1;
@@ -267,18 +271,18 @@
       /* Store the output in the destination buffer. */
       *pOut++ = acc;
 
-      /* decrement the loop counter */
+      /* decrement loop counter */
       sample--;
-   }
+    }
 
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent stages occur in-place in the output buffer */
+    /* The first stage goes from the input buffer to the output buffer. */
+    /* Subsequent stages occur in-place in the output buffer */
     pIn = pDst;
 
     /* Reset to destination pointer */
     pOut = pDst;
 
-    /*  Store the updated state variables back into the pState array */
+    /* Store the updated state variables back into the pState array */
     *pState++ = Xn1;
     *pState++ = Xn2;
     *pState++ = Yn1;
@@ -288,5 +292,5 @@
 }
 
 /**
-  * @} end of BiquadCascadeDF1 group
-  */
+  @} end of BiquadCascadeDF1 group
+ */
diff --git a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c
index 35ceed4..f51c262 100644
--- a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_biquad_cascade_df1_init_f32.c
  * Description:  Floating-point Biquad cascade DirectFormI(DF1) filter initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,55 +29,49 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup BiquadCascadeDF1
- * @{
+  @addtogroup BiquadCascadeDF1
+  @{
  */
 
 /**
- * @details
- * @brief  Initialization function for the floating-point Biquad cascade filter.
- * @param[in,out] *S           points to an instance of the floating-point Biquad cascade structure.
- * @param[in]     numStages    number of 2nd order stages in the filter.
- * @param[in]     *pCoeffs     points to the filter coefficients array.
- * @param[in]     *pState      points to the state array.
- * @return        none
- *
- *
- * <b>Coefficient and State Ordering:</b>
- *
- * \par
- * The coefficients are stored in the array <code>pCoeffs</code> in the following order:
- * <pre>
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
- * </pre>
- *
- * \par
- * where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
- * <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
- * and so on.  The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
- *
- * \par
- * The <code>pState</code> is a pointer to state array.
- * Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
- * The state variables are arranged in the <code>pState</code> array as:
- * <pre>
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}
- * </pre>
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
- * The state array has a total length of <code>4*numStages</code> values.
- * The state variables are updated after each block of data is processed; the coefficients are untouched.
- *
+  @brief         Initialization function for the floating-point Biquad cascade filter.
+  @param[in,out] S           points to an instance of the floating-point Biquad cascade structure.
+  @param[in]     numStages   number of 2nd order stages in the filter.
+  @param[in]     pCoeffs     points to the filter coefficients.
+  @param[in]     pState      points to the state buffer.
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array <code>pCoeffs</code> in the following order:
+  <pre>
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  </pre>
+
+  @par
+                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+                   and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
+  @par
+                   The <code>pState</code> is a pointer to state array.
+                   Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
+                   The state variables are arranged in the <code>pState</code> array as:
+  <pre>
+      {x[n-1], x[n-2], y[n-1], y[n-2]}
+  </pre>
+                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+                   The state array has a total length of <code>4*numStages</code> values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
  */
 
 void arm_biquad_cascade_df1_init_f32(
-  arm_biquad_casd_df1_inst_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState)
+        arm_biquad_casd_df1_inst_f32 * S,
+        uint8_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState)
 {
   /* Assign filter stages */
   S->numStages = numStages;
@@ -93,5 +87,5 @@
 }
 
 /**
- * @} end of BiquadCascadeDF1 group
+  @} end of BiquadCascadeDF1 group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c
index 2b3243d..c2e542c 100644
--- a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_biquad_cascade_df1_init_q15.c
  * Description:  Q15 Biquad cascade DirectFormI(DF1) filter initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,54 +29,51 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup BiquadCascadeDF1
- * @{
+  @addtogroup BiquadCascadeDF1
+  @{
  */
 
 /**
- * @details
- *
- * @param[in,out] *S           points to an instance of the Q15 Biquad cascade structure.
- * @param[in]     numStages    number of 2nd order stages in the filter.
- * @param[in]     *pCoeffs     points to the filter coefficients.
- * @param[in]     *pState      points to the state buffer.
- * @param[in]     postShift    Shift to be applied to the accumulator result. Varies according to the coefficients format
- * @return        none
- *
- * <b>Coefficient and State Ordering:</b>
- *
- * \par
- * The coefficients are stored in the array <code>pCoeffs</code> in the following order:
- * <pre>
- *     {b10, 0, b11, b12, a11, a12, b20, 0, b21, b22, a21, a22, ...}
- * </pre>
- * where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
- * <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
- * and so on.  The <code>pCoeffs</code> array contains a total of <code>6*numStages</code> values.
- * The zero coefficient between <code>b1</code> and <code>b2</code> facilities  use of 16-bit SIMD instructions on the Cortex-M4.
- *
- * \par
- * The state variables are stored in the array <code>pState</code>.
- * Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
- * The state variables are arranged in the <code>pState</code> array as:
- * <pre>
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}
- * </pre>
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
- * The state array has a total length of <code>4*numStages</code> values.
- * The state variables are updated after each block of data is processed; the coefficients are untouched.
+  @brief         Initialization function for the Q15 Biquad cascade filter.
+  @param[in,out] S           points to an instance of the Q15 Biquad cascade structure.
+  @param[in]     numStages   number of 2nd order stages in the filter.
+  @param[in]     pCoeffs     points to the filter coefficients.
+  @param[in]     pState      points to the state buffer.
+  @param[in]     postShift   Shift to be applied to the accumulator result. Varies according to the coefficients format
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array <code>pCoeffs</code> in the following order:
+  <pre>
+      {b10, 0, b11, b12, a11, a12, b20, 0, b21, b22, a21, a22, ...}
+  </pre>
+  @par
+                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+                   and so on.  The <code>pCoeffs</code> array contains a total of <code>6*numStages</code> values.
+                   The zero coefficient between <code>b1</code> and <code>b2</code> facilities  use of 16-bit SIMD instructions on the Cortex-M4.
+  @par
+                   The state variables are stored in the array <code>pState</code>.
+                   Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
+                   The state variables are arranged in the <code>pState</code> array as:
+  <pre>
+      {x[n-1], x[n-2], y[n-1], y[n-2]}
+  </pre>
+                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+                   The state array has a total length of <code>4*numStages</code> values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
  */
 
 void arm_biquad_cascade_df1_init_q15(
-  arm_biquad_casd_df1_inst_q15 * S,
-  uint8_t numStages,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  int8_t postShift)
+        arm_biquad_casd_df1_inst_q15 * S,
+        uint8_t numStages,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        int8_t postShift)
 {
   /* Assign filter stages */
   S->numStages = numStages;
@@ -95,5 +92,5 @@
 }
 
 /**
- * @} end of BiquadCascadeDF1 group
+  @} end of BiquadCascadeDF1 group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c
index 5c60e4a..8637889 100644
--- a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_biquad_cascade_df1_init_q31.c
  * Description:  Q31 Biquad cascade DirectFormI(DF1) filter initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,53 +29,50 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup BiquadCascadeDF1
- * @{
+  @addtogroup BiquadCascadeDF1
+  @{
  */
 
 /**
- * @details
- *
- * @param[in,out] *S           points to an instance of the Q31 Biquad cascade structure.
- * @param[in]     numStages    number of 2nd order stages in the filter.
- * @param[in]     *pCoeffs     points to the filter coefficients buffer.
- * @param[in]     *pState      points to the state buffer.
- * @param[in]     postShift    Shift to be applied after the accumulator.  Varies according to the coefficients format
- * @return        none
- *
- * <b>Coefficient and State Ordering:</b>
- *
- * \par
- * The coefficients are stored in the array <code>pCoeffs</code> in the following order:
- * <pre>
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
- * </pre>
- * where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
- * <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
- * and so on.  The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
- *
- * \par
- * The <code>pState</code> points to state variables array.
- * Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
- * The state variables are arranged in the <code>pState</code> array as:
- * <pre>
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}
- * </pre>
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
- * The state array has a total length of <code>4*numStages</code> values.
- * The state variables are updated after each block of data is processed; the coefficients are untouched.
+  @brief         Initialization function for the Q31 Biquad cascade filter.
+  @param[in,out] S           points to an instance of the Q31 Biquad cascade structure.
+  @param[in]     numStages   number of 2nd order stages in the filter.
+  @param[in]     pCoeffs     points to the filter coefficients.
+  @param[in]     pState      points to the state buffer.
+  @param[in]     postShift   Shift to be applied after the accumulator.  Varies according to the coefficients format
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array <code>pCoeffs</code> in the following order:
+  <pre>
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  </pre>
+  @par
+                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+                   and so on.  The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
+  @par
+                   The <code>pState</code> points to state variables array.
+                   Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
+                   The state variables are arranged in the <code>pState</code> array as:
+  <pre>
+      {x[n-1], x[n-2], y[n-1], y[n-2]}
+  </pre>
+                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+                   The state array has a total length of <code>4*numStages</code> values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
  */
 
 void arm_biquad_cascade_df1_init_q31(
-  arm_biquad_casd_df1_inst_q31 * S,
-  uint8_t numStages,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  int8_t postShift)
+        arm_biquad_casd_df1_inst_q31 * S,
+        uint8_t numStages,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        int8_t postShift)
 {
   /* Assign filter stages */
   S->numStages = numStages;
@@ -94,5 +91,5 @@
 }
 
 /**
- * @} end of BiquadCascadeDF1 group
+  @} end of BiquadCascadeDF1 group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c
index 382b744..9e23897 100644
--- a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_biquad_cascade_df1_q15.c
  * Description:  Processing function for the Q15 Biquad cascade DirectFormI(DF1) filter
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,79 +29,74 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup BiquadCascadeDF1
- * @{
+  @addtogroup BiquadCascadeDF1
+  @{
  */
 
 /**
- * @brief Processing function for the Q15 Biquad cascade filter.
- * @param[in]  *S points to an instance of the Q15 Biquad cascade structure.
- * @param[in]  *pSrc points to the block of input data.
- * @param[out] *pDst points to the location where the output result is written.
- * @param[in]  blockSize number of samples to process per call.
- * @return none.
- *
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
- * The accumulator is then shifted by <code>postShift</code> bits to truncate the result to 1.15 format by discarding the low 16 bits.
- * Finally, the result is saturated to 1.15 format.
- *
- * \par
- * Refer to the function <code>arm_biquad_cascade_df1_fast_q15()</code> for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.
+  @brief         Processing function for the Q15 Biquad cascade filter.
+  @param[in]     S         points to an instance of the Q15 Biquad cascade structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the location where the output result is written
+  @param[in]     blockSize number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   The accumulator is then shifted by <code>postShift</code> bits to truncate the result to 1.15 format by discarding the low 16 bits.
+                   Finally, the result is saturated to 1.15 format.
+  @remark
+                   Refer to \ref arm_biquad_cascade_df1_fast_q15() for a faster but less precise implementation of this filter.
  */
 
 void arm_biquad_cascade_df1_q15(
   const arm_biquad_casd_df1_inst_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
 
 
 #if defined (ARM_MATH_DSP)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t *pIn = pSrc;                             /*  Source pointer                               */
-  q15_t *pOut = pDst;                            /*  Destination pointer                          */
-  q31_t in;                                      /*  Temporary variable to hold input value       */
-  q31_t out;                                     /*  Temporary variable to hold output value      */
-  q31_t b0;                                      /*  Temporary variable to hold bo value          */
-  q31_t b1, a1;                                  /*  Filter coefficients                          */
-  q31_t state_in, state_out;                     /*  Filter state variables                       */
-  q31_t acc_l, acc_h;
-  q63_t acc;                                     /*  Accumulator                                  */
-  int32_t lShift = (15 - (int32_t) S->postShift);       /*  Post shift                                   */
-  q15_t *pState = S->pState;                     /*  State pointer                                */
-  q15_t *pCoeffs = S->pCoeffs;                   /*  Coefficient pointer                          */
-  uint32_t sample, stage = (uint32_t) S->numStages;     /*  Stage loop counter                           */
-  int32_t uShift = (32 - lShift);
+  const q15_t *pIn = pSrc;                             /* Source pointer */
+        q15_t *pOut = pDst;                            /* Destination pointer */
+        q31_t in;                                      /* Temporary variable to hold input value */
+        q31_t out;                                     /* Temporary variable to hold output value */
+        q31_t b0;                                      /* Temporary variable to hold bo value */
+        q31_t b1, a1;                                  /* Filter coefficients */
+        q31_t state_in, state_out;                     /* Filter state variables */
+        q31_t acc_l, acc_h;
+        q63_t acc;                                     /* Accumulator */
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        int32_t lShift = (15 - (int32_t) S->postShift);       /* Post shift */
+        uint32_t sample, stage = (uint32_t) S->numStages;     /* Stage loop counter */
+        int32_t uShift = (32 - lShift);
 
   do
   {
     /* Read the b0 and 0 coefficients using SIMD  */
-    b0 = *__SIMD32(pCoeffs)++;
+    b0 = read_q15x2_ia ((q15_t **) &pCoeffs);
 
     /* Read the b1 and b2 coefficients using SIMD */
-    b1 = *__SIMD32(pCoeffs)++;
+    b1 = read_q15x2_ia ((q15_t **) &pCoeffs);
 
     /* Read the a1 and a2 coefficients using SIMD */
-    a1 = *__SIMD32(pCoeffs)++;
+    a1 = read_q15x2_ia ((q15_t **) &pCoeffs);
 
     /* Read the input state values from the state buffer:  x[n-1], x[n-2] */
-    state_in = *__SIMD32(pState)++;
+    state_in = read_q15x2_ia (&pState);
 
     /* Read the output state values from the state buffer:  y[n-1], y[n-2] */
-    state_out = *__SIMD32(pState)--;
+    state_out = read_q15x2_da (&pState);
 
     /* Apply loop unrolling and compute 2 output values simultaneously. */
     /*      The variable acc hold output values that are being computed:
@@ -117,7 +112,7 @@
     {
 
       /* Read the input */
-      in = *__SIMD32(pIn)++;
+      in = read_q15x2_ia ((q15_t **) &pIn);
 
       /* out =  b0 * x[n] + 0 * 0 */
       out = __SMUAD(b0, in);
@@ -141,23 +136,19 @@
 
       /* Every time after the output is computed state should be updated. */
       /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
       /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
       /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
 
 #ifndef  ARM_MATH_BIG_ENDIAN
-
-      state_in = __PKHBT(in, state_in, 16);
+      state_in  = __PKHBT(in, state_in, 16);
       state_out = __PKHBT(out, state_out, 16);
-
 #else
-
-      state_in = __PKHBT(state_in >> 16, (in >> 16), 16);
+      state_in  = __PKHBT(state_in >> 16, (in >> 16), 16);
       state_out = __PKHBT(state_out >> 16, (out), 16);
-
 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
 
       /* out =  b0 * x[n] + 0 * 0 */
@@ -180,41 +171,30 @@
       out = __SSAT(out, 16);
 
       /* Store the output in the destination buffer. */
-
 #ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ = __PKHBT(state_out, out, 16);
-
+      write_q15x2_ia (&pOut, __PKHBT(state_out, out, 16));
 #else
-
-      *__SIMD32(pOut)++ = __PKHBT(out, state_out >> 16, 16);
-
+      write_q15x2_ia (&pOut, __PKHBT(out, state_out >> 16, 16));
 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
 
       /* Every time after the output is computed state should be updated. */
       /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
       /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
       /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
 #ifndef  ARM_MATH_BIG_ENDIAN
-
-      state_in = __PKHBT(in >> 16, state_in, 16);
+      state_in  = __PKHBT(in >> 16, state_in, 16);
       state_out = __PKHBT(out, state_out, 16);
-
 #else
-
-      state_in = __PKHBT(state_in >> 16, in, 16);
+      state_in  = __PKHBT(state_in >> 16, in, 16);
       state_out = __PKHBT(state_out >> 16, out, 16);
-
 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
 
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       sample--;
-
     }
 
     /* If the blockSize is not a multiple of 2, compute any remaining output samples here.
@@ -226,15 +206,10 @@
       in = *pIn++;
 
       /* out =  b0 * x[n] + 0 * 0 */
-
 #ifndef  ARM_MATH_BIG_ENDIAN
-
       out = __SMUAD(b0, in);
-
 #else
-
       out = __SMUADX(b0, in);
-
 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
 
       /* acc =  b1 * x[n-1] + b2 * x[n-2] + out */
@@ -259,58 +234,49 @@
 
       /* Every time after the output is computed state should be updated. */
       /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
       /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
       /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-
 #ifndef  ARM_MATH_BIG_ENDIAN
-
       state_in = __PKHBT(in, state_in, 16);
       state_out = __PKHBT(out, state_out, 16);
-
 #else
-
       state_in = __PKHBT(state_in >> 16, in, 16);
       state_out = __PKHBT(state_out >> 16, out, 16);
-
 #endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
-
     }
 
-    /*  The first stage goes from the input wire to the output wire.  */
-    /*  Subsequent numStages occur in-place in the output wire  */
+    /* The first stage goes from the input wire to the output wire.  */
+    /* Subsequent numStages occur in-place in the output wire  */
     pIn = pDst;
 
     /* Reset the output pointer */
     pOut = pDst;
 
-    /*  Store the updated state variables back into the state array */
-    *__SIMD32(pState)++ = state_in;
-    *__SIMD32(pState)++ = state_out;
+    /* Store the updated state variables back into the state array */
+    write_q15x2_ia (&pState, state_in);
+    write_q15x2_ia (&pState, state_out);
 
-
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     stage--;
 
   } while (stage > 0U);
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  q15_t *pIn = pSrc;                             /*  Source pointer                               */
-  q15_t *pOut = pDst;                            /*  Destination pointer                          */
-  q15_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
-  q15_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
-  q15_t Xn;                                      /*  temporary input               */
-  q63_t acc;                                     /*  Accumulator                                  */
-  int32_t shift = (15 - (int32_t) S->postShift); /*  Post shift                                   */
-  q15_t *pState = S->pState;                     /*  State pointer                                */
-  q15_t *pCoeffs = S->pCoeffs;                   /*  Coefficient pointer                          */
-  uint32_t sample, stage = (uint32_t) S->numStages;     /*  Stage loop counter                           */
+  const q15_t *pIn = pSrc;                             /* Source pointer */
+        q15_t *pOut = pDst;                            /* Destination pointer */
+        q15_t b0, b1, b2, a1, a2;                      /* Filter coefficients */
+        q15_t Xn1, Xn2, Yn1, Yn2;                      /* Filter state variables */
+        q15_t Xn;                                      /* temporary input */
+        q63_t acc;                                     /* Accumulator */
+        int32_t shift = (15 - (int32_t) S->postShift); /* Post shift */
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        uint32_t sample, stage = (uint32_t) S->numStages;     /* Stage loop counter */
 
   do
   {
@@ -328,7 +294,7 @@
     Yn1 = pState[2];
     Yn2 = pState[3];
 
-    /*      The variables acc holds the output value that is computed:
+    /* The variables acc holds the output value that is computed:
      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
      */
 
@@ -357,10 +323,10 @@
 
       /* Every time after the output is computed state should be updated. */
       /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
       Xn2 = Xn1;
       Xn1 = Xn;
       Yn2 = Yn1;
@@ -392,7 +358,6 @@
 
 }
 
-
 /**
- * @} end of BiquadCascadeDF1 group
+  @} end of BiquadCascadeDF1 group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c
index 4ca3f85..011e21d 100644
--- a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_biquad_cascade_df1_q31.c
  * Description:  Processing function for the Q31 Biquad cascade filter
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,59 +29,54 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup BiquadCascadeDF1
- * @{
+  @addtogroup BiquadCascadeDF1
+  @{
  */
 
 /**
- * @brief Processing function for the Q31 Biquad cascade filter.
- * @param[in]  *S         points to an instance of the Q31 Biquad cascade structure.
- * @param[in]  *pSrc      points to the block of input data.
- * @param[out] *pDst      points to the block of output data.
- * @param[in]  blockSize  number of samples to process per call.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * Thus, if the accumulator result overflows it wraps around rather than clip.
- * In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25).
- * After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by <code>postShift</code> bits and the result truncated to
- * 1.31 format by discarding the low 32 bits.
- *
- * \par
- * Refer to the function <code>arm_biquad_cascade_df1_fast_q31()</code> for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.
+  @brief         Processing function for the Q31 Biquad cascade filter.
+  @param[in]     S         points to an instance of the Q31 Biquad cascade structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clip.
+                   In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25).
+                   After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by <code>postShift</code> bits and the result truncated to
+                   1.31 format by discarding the low 32 bits.
+  @remark
+                   Refer to \ref arm_biquad_cascade_df1_fast_q31() for a faster but less precise implementation of this filter.
  */
 
 void arm_biquad_cascade_df1_q31(
   const arm_biquad_casd_df1_inst_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-  q63_t acc;                                     /*  accumulator                   */
-  uint32_t uShift = ((uint32_t) S->postShift + 1U);
-  uint32_t lShift = 32U - uShift;                /*  Shift to be applied to the output */
-  q31_t *pIn = pSrc;                             /*  input pointer initialization  */
-  q31_t *pOut = pDst;                            /*  output pointer initialization */
-  q31_t *pState = S->pState;                     /*  pState pointer initialization */
-  q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  */
-  q31_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
-  q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
-  q31_t Xn;                                      /*  temporary input               */
-  uint32_t sample, stage = S->numStages;         /*  loop counters                     */
+  const q31_t *pIn = pSrc;                             /* Source pointer */
+        q31_t *pOut = pDst;                            /* Destination pointer */
+        q31_t *pState = S->pState;                     /* pState pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q63_t acc;                                     /* Accumulator */
+        q31_t b0, b1, b2, a1, a2;                      /* Filter coefficients */
+        q31_t Xn1, Xn2, Yn1, Yn2;                      /* Filter pState variables */
+        q31_t Xn;                                      /* Temporary input */
+        uint32_t uShift = ((uint32_t) S->postShift + 1U);
+        uint32_t lShift = 32U - uShift;                /* Shift to be applied to the output */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
 
-
-#if defined (ARM_MATH_DSP)
-
-  q31_t acc_l, acc_h;                            /*  temporary output variables    */
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc_l, acc_h;                            /* temporary output variables */
+#endif
 
   do
   {
@@ -92,301 +87,161 @@
     a1 = *pCoeffs++;
     a2 = *pCoeffs++;
 
-    /* Reading the state values */
+    /* Reading the pState values */
     Xn1 = pState[0];
     Xn2 = pState[1];
     Yn1 = pState[2];
     Yn2 = pState[3];
 
+#if defined (ARM_MATH_LOOPUNROLL)
+
     /* Apply loop unrolling and compute 4 output values simultaneously. */
-    /*      The variable acc hold output values that are being computed:
+    /* Variable acc hold output values that are being computed:
      *
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
      */
 
+    /* Loop unrolling: Compute 4 outputs at a time */
     sample = blockSize >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-     ** a second loop below computes the remaining 1 to 3 samples. */
     while (sample > 0U)
     {
-      /* Read the input */
+      /* Read the first input */
       Xn = *pIn++;
 
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn2;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn1;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn2;
+      acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2);
 
       /* The result is converted to 1.31 , Yn2 variable is reused */
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
+      acc_l = (acc      ) & 0xffffffff; /* Calc lower part of acc */
+      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
 
       /* Apply shift for lower part of acc and upper part of acc */
       Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift;
 
-      /* Store the output in the destination buffer. */
+      /* Store output in destination buffer. */
       *pOut++ = Yn2;
 
       /* Read the second input */
       Xn2 = *pIn++;
 
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn2;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn1;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn2;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn1;
-
+      acc = ((q63_t) b0 * Xn2) + ((q63_t) b1 * Xn) + ((q63_t) b2 * Xn1) + ((q63_t) a1 * Yn2) + ((q63_t) a2 * Yn1);
 
       /* The result is converted to 1.31, Yn1 variable is reused  */
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
+      acc_l = (acc      ) & 0xffffffff; /* Calc lower part of acc */
+      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
 
       /* Apply shift for lower part of acc and upper part of acc */
       Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift;
 
-      /* Store the output in the destination buffer. */
+      /* Store output in destination buffer. */
       *pOut++ = Yn1;
 
-      /* Read the third input  */
+      /* Read the third input */
       Xn1 = *pIn++;
 
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn1;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn2;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn1;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn2;
+      acc = ((q63_t) b0 * Xn1) + ((q63_t) b1 * Xn2) + ((q63_t) b2 * Xn) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2);
 
       /* The result is converted to 1.31, Yn2 variable is reused  */
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
+      acc_l = (acc      ) & 0xffffffff; /* Calc lower part of acc */
+      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
 
       /* Apply shift for lower part of acc and upper part of acc */
       Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift;
 
-      /* Store the output in the destination buffer. */
+      /* Store output in destination buffer. */
       *pOut++ = Yn2;
 
       /* Read the forth input */
       Xn = *pIn++;
 
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn2;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn2;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn1;
+      acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn2) + ((q63_t) a2 * Yn1);
 
       /* The result is converted to 1.31, Yn1 variable is reused  */
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
+      acc_l = (acc      ) & 0xffffffff; /* Calc lower part of acc */
+      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
 
       /* Apply shift for lower part of acc and upper part of acc */
       Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift;
 
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-
-      /* Store the output in the destination buffer. */
+      /* Store output in destination buffer. */
       *pOut++ = Yn1;
 
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
-    sample = (blockSize & 0x3U);
-
-    while (sample > 0U)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn2;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn1;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn2;
-
-      /* The result is converted to 1.31  */
-      acc = acc >> lShift;
-
       /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
       Xn2 = Xn1;
       Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = (q31_t) acc;
 
-      /* Store the output in the destination buffer. */
-      *pOut++ = (q31_t) acc;
-
-      /* decrement the loop counter */
+      /* decrement loop counter */
       sample--;
     }
 
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent stages occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset to destination pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-  } while (--stage);
+    /* Loop unrolling: Compute remaining outputs */
+    sample = blockSize & 0x3U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the state values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /*      The variables acc holds the output value that is computed:
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
-     */
-
+    /* Initialize blkCnt with number of samples */
     sample = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (sample > 0U)
     {
       /* Read the input */
       Xn = *pIn++;
 
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn;
-
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn2;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn1;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn2;
+      acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2);
 
       /* The result is converted to 1.31  */
       acc = acc >> lShift;
 
+      /* Store output in destination buffer. */
+      *pOut++ = (q31_t) acc;
+
       /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
       Xn2 = Xn1;
       Xn1 = Xn;
       Yn2 = Yn1;
       Yn1 = (q31_t) acc;
 
-      /* Store the output in the destination buffer. */
-      *pOut++ = (q31_t) acc;
-
-      /* decrement the loop counter */
+      /* decrement loop counter */
       sample--;
     }
 
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent stages occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset to destination pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the pState array */
+    /* Store the updated state variables back into the pState array */
     *pState++ = Xn1;
     *pState++ = Xn2;
     *pState++ = Yn1;
     *pState++ = Yn2;
 
-  } while (--stage);
+    /* The first stage goes from the input buffer to the output buffer. */
+    /* Subsequent numStages occur in-place in the output buffer */
+    pIn = pDst;
 
-#endif /*  #if defined (ARM_MATH_DSP) */
+    /* Reset output pointer */
+    pOut = pDst;
+
+    /* decrement loop counter */
+    stage--;
+
+  } while (stage > 0U);
+
 }
 
-
-
-
 /**
-  * @} end of BiquadCascadeDF1 group
-  */
+  @} end of BiquadCascadeDF1 group
+ */
diff --git a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c
index c5a81d4..596b434 100644
--- a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_biquad_cascade_df2T_f32.c
  * Description:  Processing function for floating-point transposed direct form II Biquad cascade filter
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,381 +29,141 @@
 #include "arm_math.h"
 
 /**
-* @ingroup groupFilters
+  @ingroup groupFilters
 */
 
 /**
-* @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure
-*
-* This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure.
-* The filters are implemented as a cascade of second order Biquad sections.
-* These functions provide a slight memory savings as compared to the direct form I Biquad filter functions.
-* Only floating-point data is supported.
-*
-* This function operate on blocks of input and output data and each call to the function
-* processes <code>blockSize</code> samples through the filter.
-* <code>pSrc</code> points to the array of input data and
-* <code>pDst</code> points to the array of output data.
-* Both arrays contain <code>blockSize</code> values.
-*
-* \par Algorithm
-* Each Biquad stage implements a second order filter using the difference equation:
-* <pre>
-*    y[n] = b0 * x[n] + d1
-*    d1 = b1 * x[n] + a1 * y[n] + d2
-*    d2 = b2 * x[n] + a2 * y[n]
-* </pre>
-* where d1 and d2 represent the two state values.
-*
-* \par
-* A Biquad filter using a transposed Direct Form II structure is shown below.
-* \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad"
-* Coefficients <code>b0, b1, and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
-* Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
-* Pay careful attention to the sign of the feedback coefficients.
-* Some design tools flip the sign of the feedback coefficients:
-* <pre>
-*    y[n] = b0 * x[n] + d1;
-*    d1 = b1 * x[n] - a1 * y[n] + d2;
-*    d2 = b2 * x[n] - a2 * y[n];
-* </pre>
-* In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.
-*
-* \par
-* Higher order filters are realized as a cascade of second order sections.
-* <code>numStages</code> refers to the number of second order stages used.
-* For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
-* A 9th order filter would be realized with <code>numStages=5</code> second order stages with the
-* coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).
-*
-* \par
-* <code>pState</code> points to the state variable array.
-* Each Biquad stage has 2 state variables <code>d1</code> and <code>d2</code>.
-* The state variables are arranged in the <code>pState</code> array as:
-* <pre>
-*     {d11, d12, d21, d22, ...}
-* </pre>
-* where <code>d1x</code> refers to the state variables for the first Biquad and
-* <code>d2x</code> refers to the state variables for the second Biquad.
-* The state array has a total length of <code>2*numStages</code> values.
-* The state variables are updated after each block of data is processed; the coefficients are untouched.
-*
-* \par
-* The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II.
-* The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types.
-* That is why the Direct Form I structure supports Q15 and Q31 data types.
-* The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables <code>d1</code> and <code>d2</code>.
-* Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad.
-* The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.
-*
-* \par Instance Structure
-* The coefficients and state variables for a filter are stored together in an instance data structure.
-* A separate instance structure must be defined for each filter.
-* Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
-*
-* \par Init Functions
-* There is also an associated initialization function.
-* The initialization function performs following operations:
-* - Sets the values of the internal structure fields.
-* - Zeros out the values in the state buffer.
-* To do this manually without calling the init function, assign the follow subfields of the instance structure:
-* numStages, pCoeffs, pState. Also set all of the values in pState to zero.
-*
-* \par
-* Use of the initialization function is optional.
-* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
-* To place an instance structure into a const data section, the instance structure must be manually initialized.
-* Set the values in the state buffer to zeros before static initialization.
-* For example, to statically initialize the instance structure use
-* <pre>
-*     arm_biquad_cascade_df2T_instance_f32 S1 = {numStages, pState, pCoeffs};
-* </pre>
-* where <code>numStages</code> is the number of Biquad stages in the filter; <code>pState</code> is the address of the state buffer.
-* <code>pCoeffs</code> is the address of the coefficient buffer;
-*
-*/
+  @addtogroup BiquadCascadeDF2T
+  @{
+ */
 
 /**
-* @addtogroup BiquadCascadeDF2T
-* @{
-*/
+  @brief         Processing function for the floating-point transposed direct form II Biquad cascade filter.
+  @param[in]     S         points to an instance of the filter data structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process
+  @return        none
+ */
 
-/**
-* @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
-* @param[in]  *S        points to an instance of the filter data structure.
-* @param[in]  *pSrc     points to the block of input data.
-* @param[out] *pDst     points to the block of output data
-* @param[in]  blockSize number of samples to process.
-* @return none.
-*/
+#if defined(ARM_MATH_NEON) 
 
-
-LOW_OPTIMIZATION_ENTER
 void arm_biquad_cascade_df2T_f32(
-const arm_biquad_cascade_df2T_instance_f32 * S,
-float32_t * pSrc,
-float32_t * pDst,
-uint32_t blockSize)
+  const arm_biquad_cascade_df2T_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
 {
-
-   float32_t *pIn = pSrc;                         /*  source pointer            */
+   const float32_t *pIn = pSrc;                   /*  source pointer            */
    float32_t *pOut = pDst;                        /*  destination pointer       */
    float32_t *pState = S->pState;                 /*  State pointer             */
-   float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
+   const float32_t *pCoeffs = S->pCoeffs;         /*  coefficient pointer       */
    float32_t acc1;                                /*  accumulator               */
    float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
    float32_t Xn1;                                 /*  temporary input           */
    float32_t d1, d2;                              /*  state variables           */
-   uint32_t sample, stage = S->numStages;         /*  loop counters             */
+   uint32_t sample, stageCnt,stage = S->numStages;         /*   loop counters   */
 
-#if defined(ARM_MATH_CM7)
 
-   float32_t Xn2, Xn3, Xn4, Xn5, Xn6, Xn7, Xn8;   /*  Input State variables     */
-   float32_t Xn9, Xn10, Xn11, Xn12, Xn13, Xn14, Xn15, Xn16;
-   float32_t acc2, acc3, acc4, acc5, acc6, acc7;  /*  Simulates the accumulator */
-   float32_t acc8, acc9, acc10, acc11, acc12, acc13, acc14, acc15, acc16;
+   float32_t Xn2, Xn3, Xn4;                       /*  Input State variables     */
+   float32_t acc2, acc3, acc4;                    /*  accumulator               */
 
-   do
+
+   float32_t p0, p1, p2, p3, p4, A1;
+
+   float32x4_t XnV, YnV;
+   float32x4x2_t dV;
+   float32x4_t zeroV = vdupq_n_f32(0.0);
+   float32x4_t t1,t2,t3,t4,b1V,b2V,a1V,a2V,s;
+
+   /* Loop unrolling. Compute 4 outputs at a time */
+   stageCnt = stage >> 2;
+
+   while (stageCnt > 0U)
    {
       /* Reading the coefficients */
-      b0 = pCoeffs[0];
-      b1 = pCoeffs[1];
-      b2 = pCoeffs[2];
-      a1 = pCoeffs[3];
-      /* Apply loop unrolling and compute 16 output values simultaneously. */
-      sample = blockSize >> 4U;
-      a2 = pCoeffs[4];
+      t1 = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
 
-      /*Reading the state values */
-      d1 = pState[0];
-      d2 = pState[1];
+      t2 = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
 
-      pCoeffs += 5U;
+      t3 = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
 
+      t4 = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
 
-      /* First part of the processing with loop unrolling.  Compute 16 outputs at a time.
-       ** a second loop below computes the remaining 1 to 15 samples. */
+      b1V = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
+
+      b2V = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
+
+      a1V = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
+
+      a2V = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
+
+      /* Reading the state values */
+      dV = vld2q_f32(pState);
+
+      sample = blockSize;
+      
       while (sample > 0U) {
-
          /* y[n] = b0 * x[n] + d1 */
          /* d1 = b1 * x[n] + a1 * y[n] + d2 */
          /* d2 = b2 * x[n] + a2 * y[n] */
 
-         /* Read the first 2 inputs. 2 cycles */
-         Xn1  = pIn[0 ];
-         Xn2  = pIn[1 ];
+         XnV = vdupq_n_f32(*pIn++);
 
-         /* Sample 1. 5 cycles */
-         Xn3  = pIn[2 ];
-         acc1 = b0 * Xn1 + d1;
+         s = dV.val[0];
+         YnV = s;
 
-         Xn4  = pIn[3 ];
-         d1 = b1 * Xn1 + d2;
+         s = vextq_f32(zeroV,dV.val[0],3);
+         YnV = vmlaq_f32(YnV, t1, s);
 
-         Xn5  = pIn[4 ];
-         d2 = b2 * Xn1;
+         s = vextq_f32(zeroV,dV.val[0],2);
+         YnV = vmlaq_f32(YnV, t2, s);
 
-         Xn6  = pIn[5 ];
-         d1 += a1 * acc1;
+         s = vextq_f32(zeroV,dV.val[0],1);
+         YnV = vmlaq_f32(YnV, t3, s);
 
-         Xn7  = pIn[6 ];
-         d2 += a2 * acc1;
+         YnV = vmlaq_f32(YnV, t4, XnV);
 
-         /* Sample 2. 5 cycles */
-         Xn8  = pIn[7 ];
-         acc2 = b0 * Xn2 + d1;
+         s = vextq_f32(XnV,YnV,3);
 
-         Xn9  = pIn[8 ];
-         d1 = b1 * Xn2 + d2;
+         dV.val[0] = vmlaq_f32(dV.val[1], s, b1V);
+         dV.val[0] = vmlaq_f32(dV.val[0], YnV, a1V);
 
-         Xn10 = pIn[9 ];
-         d2 = b2 * Xn2;
+         dV.val[1] = vmulq_f32(s, b2V);
+         dV.val[1] = vmlaq_f32(dV.val[1], YnV, a2V);
 
-         Xn11 = pIn[10];
-         d1 += a1 * acc2;
-
-         Xn12 = pIn[11];
-         d2 += a2 * acc2;
-
-         /* Sample 3. 5 cycles */
-         Xn13 = pIn[12];
-         acc3 = b0 * Xn3 + d1;
-
-         Xn14 = pIn[13];
-         d1 = b1 * Xn3 + d2;
-
-         Xn15 = pIn[14];
-         d2 = b2 * Xn3;
-
-         Xn16 = pIn[15];
-         d1 += a1 * acc3;
-
-         pIn += 16;
-         d2 += a2 * acc3;
-
-         /* Sample 4. 5 cycles */
-         acc4 = b0 * Xn4 + d1;
-         d1 = b1 * Xn4 + d2;
-         d2 = b2 * Xn4;
-         d1 += a1 * acc4;
-         d2 += a2 * acc4;
-
-         /* Sample 5. 5 cycles */
-         acc5 = b0 * Xn5 + d1;
-         d1 = b1 * Xn5 + d2;
-         d2 = b2 * Xn5;
-         d1 += a1 * acc5;
-         d2 += a2 * acc5;
-
-         /* Sample 6. 5 cycles */
-         acc6 = b0 * Xn6 + d1;
-         d1 = b1 * Xn6 + d2;
-         d2 = b2 * Xn6;
-         d1 += a1 * acc6;
-         d2 += a2 * acc6;
-
-         /* Sample 7. 5 cycles */
-         acc7 = b0 * Xn7 + d1;
-         d1 = b1 * Xn7 + d2;
-         d2 = b2 * Xn7;
-         d1 += a1 * acc7;
-         d2 += a2 * acc7;
-
-         /* Sample 8. 5 cycles */
-         acc8 = b0 * Xn8 + d1;
-         d1 = b1 * Xn8 + d2;
-         d2 = b2 * Xn8;
-         d1 += a1 * acc8;
-         d2 += a2 * acc8;
-
-         /* Sample 9. 5 cycles */
-         acc9 = b0 * Xn9 + d1;
-         d1 = b1 * Xn9 + d2;
-         d2 = b2 * Xn9;
-         d1 += a1 * acc9;
-         d2 += a2 * acc9;
-
-         /* Sample 10. 5 cycles */
-         acc10 = b0 * Xn10 + d1;
-         d1 = b1 * Xn10 + d2;
-         d2 = b2 * Xn10;
-         d1 += a1 * acc10;
-         d2 += a2 * acc10;
-
-         /* Sample 11. 5 cycles */
-         acc11 = b0 * Xn11 + d1;
-         d1 = b1 * Xn11 + d2;
-         d2 = b2 * Xn11;
-         d1 += a1 * acc11;
-         d2 += a2 * acc11;
-
-         /* Sample 12. 5 cycles */
-         acc12 = b0 * Xn12 + d1;
-         d1 = b1 * Xn12 + d2;
-         d2 = b2 * Xn12;
-         d1 += a1 * acc12;
-         d2 += a2 * acc12;
-
-         /* Sample 13. 5 cycles */
-         acc13 = b0 * Xn13 + d1;
-         d1 = b1 * Xn13 + d2;
-         d2 = b2 * Xn13;
-
-         pOut[0 ] = acc1 ;
-         d1 += a1 * acc13;
-
-         pOut[1 ] = acc2 ;
-         d2 += a2 * acc13;
-
-         /* Sample 14. 5 cycles */
-         pOut[2 ] = acc3 ;
-         acc14 = b0 * Xn14 + d1;
-
-         pOut[3 ] = acc4 ;
-         d1 = b1 * Xn14 + d2;
-
-         pOut[4 ] = acc5 ;
-         d2 = b2 * Xn14;
-
-         pOut[5 ] = acc6 ;
-         d1 += a1 * acc14;
-
-         pOut[6 ] = acc7 ;
-         d2 += a2 * acc14;
-
-         /* Sample 15. 5 cycles */
-         pOut[7 ] = acc8 ;
-         pOut[8 ] = acc9 ;
-         acc15 = b0 * Xn15 + d1;
-
-         pOut[9 ] = acc10;
-         d1 = b1 * Xn15 + d2;
-
-         pOut[10] = acc11;
-         d2 = b2 * Xn15;
-
-         pOut[11] = acc12;
-         d1 += a1 * acc15;
-
-         pOut[12] = acc13;
-         d2 += a2 * acc15;
-
-         /* Sample 16. 5 cycles */
-         pOut[13] = acc14;
-         acc16 = b0 * Xn16 + d1;
-
-         pOut[14] = acc15;
-         d1 = b1 * Xn16 + d2;
-
-         pOut[15] = acc16;
-         d2 = b2 * Xn16;
+         *pOut++ = YnV[3];
 
          sample--;
-         d1 += a1 * acc16;
-
-         pOut += 16;
-         d2 += a2 * acc16;
       }
-
-      sample = blockSize & 0xFu;
-      while (sample > 0U) {
-         Xn1 = *pIn;
-         acc1 = b0 * Xn1 + d1;
-
-         pIn++;
-         d1 = b1 * Xn1 + d2;
-
-         *pOut = acc1;
-         d2 = b2 * Xn1;
-
-         pOut++;
-         d1 += a1 * acc1;
-
-         sample--;
-         d2 += a2 * acc1;
-      }
-
+     
       /* Store the updated state variables back into the state array */
-      pState[0] = d1;
+      vst2q_f32(pState,dV);
+      pState += 8;
+
       /* The current stage input is given as the output to the next stage */
       pIn = pDst;
 
-      pState[1] = d2;
-      /* decrement the loop counter */
-      stage--;
-
-      pState += 2U;
-
       /*Reset the output working pointer */
       pOut = pDst;
 
-   } while (stage > 0U);
+      /* decrement the loop counter */
+      stageCnt--;
 
-#elif defined(ARM_MATH_CM0_FAMILY)
+   } 
 
-   /* Run the below code for Cortex-M0 */
-
-   do
+   /* Tail */
+   stageCnt = stage & 3;
+   
+   while (stageCnt > 0U)
    {
       /* Reading the coefficients */
       b0 = *pCoeffs++;
@@ -416,7 +176,6 @@
       d1 = pState[0];
       d2 = pState[1];
 
-
       sample = blockSize;
 
       while (sample > 0U)
@@ -452,139 +211,313 @@
       pOut = pDst;
 
       /* decrement the loop counter */
-      stage--;
+      stageCnt--;
+   }
+}
+#else
+LOW_OPTIMIZATION_ENTER
+void arm_biquad_cascade_df2T_f32(
+  const arm_biquad_cascade_df2T_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+  const float32_t *pIn = pSrc;                         /* Source pointer */
+        float32_t *pOut = pDst;                        /* Destination pointer */
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t acc1;                                /* Accumulator */
+        float32_t b0, b1, b2, a1, a2;                  /* Filter coefficients */
+        float32_t Xn1;                                 /* Temporary input */
+        float32_t d1, d2;                              /* State variables */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
 
-   } while (stage > 0U);
+  do
+  {
+     /* Reading the coefficients */
+     b0 = pCoeffs[0];
+     b1 = pCoeffs[1];
+     b2 = pCoeffs[2];
+     a1 = pCoeffs[3];
+     a2 = pCoeffs[4];
+
+     /* Reading the state values */
+     d1 = pState[0];
+     d2 = pState[1];
+
+     pCoeffs += 5U;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+     /* Loop unrolling: Compute 16 outputs at a time */
+     sample = blockSize >> 4U;
+
+     while (sample > 0U) {
+
+       /* y[n] = b0 * x[n] + d1 */
+       /* d1 = b1 * x[n] + a1 * y[n] + d2 */
+       /* d2 = b2 * x[n] + a2 * y[n] */
+
+/*  1 */
+       Xn1 = *pIn++;
+
+       acc1 = b0 * Xn1 + d1;
+
+       d1 = b1 * Xn1 + d2;
+       d1 += a1 * acc1;
+
+       d2 = b2 * Xn1;
+       d2 += a2 * acc1;
+
+       *pOut++ = acc1;
+
+/*  2 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  3 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  4 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  5 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  6 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  7 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  8 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  9 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 10 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 11 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 12 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 13 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 14 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 15 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 16 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+        /* decrement loop counter */
+        sample--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      sample = blockSize & 0xFU;
 
 #else
 
-   float32_t Xn2, Xn3, Xn4;                  	  /*  Input State variables     */
-   float32_t acc2, acc3, acc4;              		  /*  accumulator               */
+      /* Initialize blkCnt with number of samples */
+      sample = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
-   float32_t p0, p1, p2, p3, p4, A1;
-
-   /* Run the below code for Cortex-M4 and Cortex-M3 */
-   do
-   {
-      /* Reading the coefficients */
-      b0 = *pCoeffs++;
-      b1 = *pCoeffs++;
-      b2 = *pCoeffs++;
-      a1 = *pCoeffs++;
-      a2 = *pCoeffs++;
-
-
-      /*Reading the state values */
-      d1 = pState[0];
-      d2 = pState[1];
-
-      /* Apply loop unrolling and compute 4 output values simultaneously. */
-      sample = blockSize >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
       while (sample > 0U) {
+        Xn1 = *pIn++;
 
-         /* y[n] = b0 * x[n] + d1 */
-         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-         /* d2 = b2 * x[n] + a2 * y[n] */
+        acc1 = b0 * Xn1 + d1;
 
-         /* Read the four inputs */
-         Xn1 = pIn[0];
-         Xn2 = pIn[1];
-         Xn3 = pIn[2];
-         Xn4 = pIn[3];
-         pIn += 4;
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
 
-         p0 = b0 * Xn1;
-         p1 = b1 * Xn1;
-         acc1 = p0 + d1;
-         p0 = b0 * Xn2;
-         p3 = a1 * acc1;
-         p2 = b2 * Xn1;
-         A1 = p1 + p3;
-         p4 = a2 * acc1;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
 
-         p1 = b1 * Xn2;
-         acc2 = p0 + d1;
-         p0 = b0 * Xn3;
-         p3 = a1 * acc2;
-         p2 = b2 * Xn2;
-         A1 = p1 + p3;
-         p4 = a2 * acc2;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
+        *pOut++ = acc1;
 
-         p1 = b1 * Xn3;
-         acc3 = p0 + d1;
-         p0 = b0 * Xn4;
-         p3 = a1 * acc3;
-         p2 = b2 * Xn3;
-         A1 = p1 + p3;
-         p4 = a2 * acc3;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         acc4 = p0 + d1;
-         p1 = b1 * Xn4;
-         p3 = a1 * acc4;
-         p2 = b2 * Xn4;
-         A1 = p1 + p3;
-         p4 = a2 * acc4;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         pOut[0] = acc1;
-         pOut[1] = acc2;
-         pOut[2] = acc3;
-         pOut[3] = acc4;
-		 pOut += 4;
-
-         sample--;
-      }
-
-      sample = blockSize & 0x3U;
-      while (sample > 0U) {
-         Xn1 = *pIn++;
-
-         p0 = b0 * Xn1;
-         p1 = b1 * Xn1;
-         acc1 = p0 + d1;
-         p3 = a1 * acc1;
-         p2 = b2 * Xn1;
-         A1 = p1 + p3;
-         p4 = a2 * acc1;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         *pOut++ = acc1;
-
-         sample--;
+        /* decrement loop counter */
+        sample--;
       }
 
       /* Store the updated state variables back into the state array */
-      *pState++ = d1;
-      *pState++ = d2;
+      pState[0] = d1;
+      pState[1] = d2;
+
+      pState += 2U;
 
       /* The current stage input is given as the output to the next stage */
       pIn = pDst;
 
-      /*Reset the output working pointer */
+      /* Reset the output working pointer */
       pOut = pDst;
 
-      /* decrement the loop counter */
+      /* decrement loop counter */
       stage--;
 
    } while (stage > 0U);
 
-#endif
-
 }
 LOW_OPTIMIZATION_EXIT
+#endif /* #if defined(ARM_MATH_NEON) */
 
 /**
-   * @} end of BiquadCascadeDF2T group
-   */
+  @} end of BiquadCascadeDF2T group
+ */
diff --git a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c
index aad9fbb..a8af8ce 100644
--- a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c
+++ b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c
@@ -3,13 +3,13 @@
  * Title:        arm_biquad_cascade_df2T_f64.c
  * Description:  Processing function for floating-point transposed direct form II Biquad cascade filter
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,139 +29,128 @@
 #include "arm_math.h"
 
 /**
-* @ingroup groupFilters
+  @ingroup groupFilters
 */
 
 /**
-* @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure
-*
-* This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure.
-* The filters are implemented as a cascade of second order Biquad sections.
-* These functions provide a slight memory savings as compared to the direct form I Biquad filter functions.
-* Only floating-point data is supported.
-*
-* This function operate on blocks of input and output data and each call to the function
-* processes <code>blockSize</code> samples through the filter.
-* <code>pSrc</code> points to the array of input data and
-* <code>pDst</code> points to the array of output data.
-* Both arrays contain <code>blockSize</code> values.
-*
-* \par Algorithm
-* Each Biquad stage implements a second order filter using the difference equation:
-* <pre>
-*    y[n] = b0 * x[n] + d1
-*    d1 = b1 * x[n] + a1 * y[n] + d2
-*    d2 = b2 * x[n] + a2 * y[n]
-* </pre>
-* where d1 and d2 represent the two state values.
-*
-* \par
-* A Biquad filter using a transposed Direct Form II structure is shown below.
-* \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad"
-* Coefficients <code>b0, b1, and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
-* Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
-* Pay careful attention to the sign of the feedback coefficients.
-* Some design tools flip the sign of the feedback coefficients:
-* <pre>
-*    y[n] = b0 * x[n] + d1;
-*    d1 = b1 * x[n] - a1 * y[n] + d2;
-*    d2 = b2 * x[n] - a2 * y[n];
-* </pre>
-* In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.
-*
-* \par
-* Higher order filters are realized as a cascade of second order sections.
-* <code>numStages</code> refers to the number of second order stages used.
-* For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
-* A 9th order filter would be realized with <code>numStages=5</code> second order stages with the
-* coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).
-*
-* \par
-* <code>pState</code> points to the state variable array.
-* Each Biquad stage has 2 state variables <code>d1</code> and <code>d2</code>.
-* The state variables are arranged in the <code>pState</code> array as:
-* <pre>
-*     {d11, d12, d21, d22, ...}
-* </pre>
-* where <code>d1x</code> refers to the state variables for the first Biquad and
-* <code>d2x</code> refers to the state variables for the second Biquad.
-* The state array has a total length of <code>2*numStages</code> values.
-* The state variables are updated after each block of data is processed; the coefficients are untouched.
-*
-* \par
-* The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II.
-* The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types.
-* That is why the Direct Form I structure supports Q15 and Q31 data types.
-* The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables <code>d1</code> and <code>d2</code>.
-* Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad.
-* The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.
-*
-* \par Instance Structure
-* The coefficients and state variables for a filter are stored together in an instance data structure.
-* A separate instance structure must be defined for each filter.
-* Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
-*
-* \par Init Functions
-* There is also an associated initialization function.
-* The initialization function performs following operations:
-* - Sets the values of the internal structure fields.
-* - Zeros out the values in the state buffer.
-* To do this manually without calling the init function, assign the follow subfields of the instance structure:
-* numStages, pCoeffs, pState. Also set all of the values in pState to zero.
-*
-* \par
-* Use of the initialization function is optional.
-* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
-* To place an instance structure into a const data section, the instance structure must be manually initialized.
-* Set the values in the state buffer to zeros before static initialization.
-* For example, to statically initialize the instance structure use
-* <pre>
-*     arm_biquad_cascade_df2T_instance_f64 S1 = {numStages, pState, pCoeffs};
-* </pre>
-* where <code>numStages</code> is the number of Biquad stages in the filter; <code>pState</code> is the address of the state buffer.
-* <code>pCoeffs</code> is the address of the coefficient buffer;
-*
+  @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure
+
+  This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure.
+  The filters are implemented as a cascade of second order Biquad sections.
+  These functions provide a slight memory savings as compared to the direct form I Biquad filter functions.
+  Only floating-point data is supported.
+
+  This function operate on blocks of input and output data and each call to the function
+  processes <code>blockSize</code> samples through the filter.
+  <code>pSrc</code> points to the array of input data and
+  <code>pDst</code> points to the array of output data.
+  Both arrays contain <code>blockSize</code> values.
+
+  @par           Algorithm
+                   Each Biquad stage implements a second order filter using the difference equation:
+  <pre>
+     y[n] = b0 * x[n] + d1
+     d1 = b1 * x[n] + a1 * y[n] + d2
+     d2 = b2 * x[n] + a2 * y[n]
+  </pre>
+                   where d1 and d2 represent the two state values.
+  @par
+                   A Biquad filter using a transposed Direct Form II structure is shown below.
+                   \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad"
+                   Coefficients <code>b0, b1, and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
+                   Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
+                   Pay careful attention to the sign of the feedback coefficients.
+                   Some design tools flip the sign of the feedback coefficients:
+  <pre>
+     y[n] = b0 * x[n] + d1;
+     d1 = b1 * x[n] - a1 * y[n] + d2;
+     d2 = b2 * x[n] - a2 * y[n];
+  </pre>
+                   In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.
+  @par
+                   Higher order filters are realized as a cascade of second order sections.
+                   <code>numStages</code> refers to the number of second order stages used.
+                   For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
+                   A 9th order filter would be realized with <code>numStages=5</code> second order stages with the
+                   coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).
+  @par
+                   <code>pState</code> points to the state variable array.
+                   Each Biquad stage has 2 state variables <code>d1</code> and <code>d2</code>.
+                   The state variables are arranged in the <code>pState</code> array as:
+  <pre>
+      {d11, d12, d21, d22, ...}
+  </pre>
+                   where <code>d1x</code> refers to the state variables for the first Biquad and
+                   <code>d2x</code> refers to the state variables for the second Biquad.
+                   The state array has a total length of <code>2*numStages</code> values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+  @par
+                   The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II.
+                   The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types.
+                   That is why the Direct Form I structure supports Q15 and Q31 data types.
+                   The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables <code>d1</code> and <code>d2</code>.
+                   Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad.
+                   The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+
+  @par           Init Functions
+                   There is also an associated initialization function.
+                   The initialization function performs following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numStages, pCoeffs, pState. Also set all of the values in pState to zero.
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Set the values in the state buffer to zeros before static initialization.
+                   For example, to statically initialize the instance structure use
+  <pre>
+      arm_biquad_cascade_df2T_instance_f64 S1 = {numStages, pState, pCoeffs};
+      arm_biquad_cascade_df2T_instance_f32 S1 = {numStages, pState, pCoeffs};
+  </pre>
+                   where <code>numStages</code> is the number of Biquad stages in the filter;
+                   <code>pState</code> is the address of the state buffer.
+                   <code>pCoeffs</code> is the address of the coefficient buffer;
 */
 
 /**
-* @addtogroup BiquadCascadeDF2T
-* @{
-*/
+  @addtogroup BiquadCascadeDF2T
+  @{
+ */
 
 /**
-* @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
-* @param[in]  *S        points to an instance of the filter data structure.
-* @param[in]  *pSrc     points to the block of input data.
-* @param[out] *pDst     points to the block of output data
-* @param[in]  blockSize number of samples to process.
-* @return none.
-*/
-
+  @brief         Processing function for the floating-point transposed direct form II Biquad cascade filter.
+  @param[in]     S         points to an instance of the filter data structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process
+  @return        none
+ */
 
 LOW_OPTIMIZATION_ENTER
 void arm_biquad_cascade_df2T_f64(
-const arm_biquad_cascade_df2T_instance_f64 * S,
-float64_t * pSrc,
-float64_t * pDst,
-uint32_t blockSize)
+  const arm_biquad_cascade_df2T_instance_f64 * S,
+        float64_t * pSrc,
+        float64_t * pDst,
+        uint32_t blockSize)
 {
 
-   float64_t *pIn = pSrc;                         /*  source pointer            */
-   float64_t *pOut = pDst;                        /*  destination pointer       */
-   float64_t *pState = S->pState;                 /*  State pointer             */
-   float64_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
-   float64_t acc1;                                /*  accumulator               */
-   float64_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
-   float64_t Xn1;                                 /*  temporary input           */
-   float64_t d1, d2;                              /*  state variables           */
-   uint32_t sample, stage = S->numStages;         /*  loop counters             */
+        float64_t *pIn = pSrc;                         /* Source pointer */
+        float64_t *pOut = pDst;                        /* Destination pointer */
+        float64_t *pState = S->pState;                 /* State pointer */
+        float64_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float64_t acc1;                                /* Accumulator */
+        float64_t b0, b1, b2, a1, a2;                  /* Filter coefficients */
+        float64_t Xn1;                                 /* Temporary input */
+        float64_t d1, d2;                              /* State variables */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
 
-#if defined(ARM_MATH_CM7)
-
-   float64_t Xn2, Xn3, Xn4, Xn5, Xn6, Xn7, Xn8;   /*  Input State variables     */
-   float64_t Xn9, Xn10, Xn11, Xn12, Xn13, Xn14, Xn15, Xn16;
-   float64_t acc2, acc3, acc4, acc5, acc6, acc7;  /*  Simulates the accumulator */
-   float64_t acc8, acc9, acc10, acc11, acc12, acc13, acc14, acc15, acc16;
 
    do
    {
@@ -170,421 +159,285 @@
       b1 = pCoeffs[1];
       b2 = pCoeffs[2];
       a1 = pCoeffs[3];
-      /* Apply loop unrolling and compute 16 output values simultaneously. */
-      sample = blockSize >> 4U;
       a2 = pCoeffs[4];
 
-      /*Reading the state values */
+      /* Reading the state values */
       d1 = pState[0];
       d2 = pState[1];
 
       pCoeffs += 5U;
 
+#if defined (ARM_MATH_LOOPUNROLL)
 
-      /* First part of the processing with loop unrolling.  Compute 16 outputs at a time.
-       ** a second loop below computes the remaining 1 to 15 samples. */
+    /* Loop unrolling: Compute 16 outputs at a time */
+      sample = blockSize >> 4U;
+
       while (sample > 0U) {
 
          /* y[n] = b0 * x[n] + d1 */
          /* d1 = b1 * x[n] + a1 * y[n] + d2 */
          /* d2 = b2 * x[n] + a2 * y[n] */
 
-         /* Read the first 2 inputs. 2 cycles */
-         Xn1  = pIn[0 ];
-         Xn2  = pIn[1 ];
+/*  1 */
+         Xn1 = *pIn++;
 
-         /* Sample 1. 5 cycles */
-         Xn3  = pIn[2 ];
          acc1 = b0 * Xn1 + d1;
 
-         Xn4  = pIn[3 ];
          d1 = b1 * Xn1 + d2;
-
-         Xn5  = pIn[4 ];
-         d2 = b2 * Xn1;
-
-         Xn6  = pIn[5 ];
          d1 += a1 * acc1;
 
-         Xn7  = pIn[6 ];
+         d2 = b2 * Xn1;
          d2 += a2 * acc1;
 
-         /* Sample 2. 5 cycles */
-         Xn8  = pIn[7 ];
-         acc2 = b0 * Xn2 + d1;
+         *pOut++ = acc1;
 
-         Xn9  = pIn[8 ];
-         d1 = b1 * Xn2 + d2;
 
-         Xn10 = pIn[9 ];
-         d2 = b2 * Xn2;
+/*  2 */
+         Xn1 = *pIn++;
 
-         Xn11 = pIn[10];
-         d1 += a1 * acc2;
+         acc1 = b0 * Xn1 + d1;
 
-         Xn12 = pIn[11];
-         d2 += a2 * acc2;
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
 
-         /* Sample 3. 5 cycles */
-         Xn13 = pIn[12];
-         acc3 = b0 * Xn3 + d1;
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
 
-         Xn14 = pIn[13];
-         d1 = b1 * Xn3 + d2;
+         *pOut++ = acc1;
 
-         Xn15 = pIn[14];
-         d2 = b2 * Xn3;
+/*  3 */
+         Xn1 = *pIn++;
 
-         Xn16 = pIn[15];
-         d1 += a1 * acc3;
+         acc1 = b0 * Xn1 + d1;
 
-         pIn += 16;
-         d2 += a2 * acc3;
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
 
-         /* Sample 4. 5 cycles */
-         acc4 = b0 * Xn4 + d1;
-         d1 = b1 * Xn4 + d2;
-         d2 = b2 * Xn4;
-         d1 += a1 * acc4;
-         d2 += a2 * acc4;
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
 
-         /* Sample 5. 5 cycles */
-         acc5 = b0 * Xn5 + d1;
-         d1 = b1 * Xn5 + d2;
-         d2 = b2 * Xn5;
-         d1 += a1 * acc5;
-         d2 += a2 * acc5;
+         *pOut++ = acc1;
 
-         /* Sample 6. 5 cycles */
-         acc6 = b0 * Xn6 + d1;
-         d1 = b1 * Xn6 + d2;
-         d2 = b2 * Xn6;
-         d1 += a1 * acc6;
-         d2 += a2 * acc6;
+/*  4 */
+         Xn1 = *pIn++;
 
-         /* Sample 7. 5 cycles */
-         acc7 = b0 * Xn7 + d1;
-         d1 = b1 * Xn7 + d2;
-         d2 = b2 * Xn7;
-         d1 += a1 * acc7;
-         d2 += a2 * acc7;
+         acc1 = b0 * Xn1 + d1;
 
-         /* Sample 8. 5 cycles */
-         acc8 = b0 * Xn8 + d1;
-         d1 = b1 * Xn8 + d2;
-         d2 = b2 * Xn8;
-         d1 += a1 * acc8;
-         d2 += a2 * acc8;
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
 
-         /* Sample 9. 5 cycles */
-         acc9 = b0 * Xn9 + d1;
-         d1 = b1 * Xn9 + d2;
-         d2 = b2 * Xn9;
-         d1 += a1 * acc9;
-         d2 += a2 * acc9;
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
 
-         /* Sample 10. 5 cycles */
-         acc10 = b0 * Xn10 + d1;
-         d1 = b1 * Xn10 + d2;
-         d2 = b2 * Xn10;
-         d1 += a1 * acc10;
-         d2 += a2 * acc10;
+         *pOut++ = acc1;
 
-         /* Sample 11. 5 cycles */
-         acc11 = b0 * Xn11 + d1;
-         d1 = b1 * Xn11 + d2;
-         d2 = b2 * Xn11;
-         d1 += a1 * acc11;
-         d2 += a2 * acc11;
+/*  5 */
+         Xn1 = *pIn++;
 
-         /* Sample 12. 5 cycles */
-         acc12 = b0 * Xn12 + d1;
-         d1 = b1 * Xn12 + d2;
-         d2 = b2 * Xn12;
-         d1 += a1 * acc12;
-         d2 += a2 * acc12;
+         acc1 = b0 * Xn1 + d1;
 
-         /* Sample 13. 5 cycles */
-         acc13 = b0 * Xn13 + d1;
-         d1 = b1 * Xn13 + d2;
-         d2 = b2 * Xn13;
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
 
-         pOut[0 ] = acc1 ;
-         d1 += a1 * acc13;
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
 
-         pOut[1 ] = acc2 ;
-         d2 += a2 * acc13;
+         *pOut++ = acc1;
 
-         /* Sample 14. 5 cycles */
-         pOut[2 ] = acc3 ;
-         acc14 = b0 * Xn14 + d1;
+/*  6 */
+         Xn1 = *pIn++;
 
-         pOut[3 ] = acc4 ;
-         d1 = b1 * Xn14 + d2;
+         acc1 = b0 * Xn1 + d1;
 
-         pOut[4 ] = acc5 ;
-         d2 = b2 * Xn14;
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
 
-         pOut[5 ] = acc6 ;
-         d1 += a1 * acc14;
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
 
-         pOut[6 ] = acc7 ;
-         d2 += a2 * acc14;
+         *pOut++ = acc1;
 
-         /* Sample 15. 5 cycles */
-         pOut[7 ] = acc8 ;
-         pOut[8 ] = acc9 ;
-         acc15 = b0 * Xn15 + d1;
+/*  7 */
+         Xn1 = *pIn++;
 
-         pOut[9 ] = acc10;
-         d1 = b1 * Xn15 + d2;
+         acc1 = b0 * Xn1 + d1;
 
-         pOut[10] = acc11;
-         d2 = b2 * Xn15;
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
 
-         pOut[11] = acc12;
-         d1 += a1 * acc15;
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
 
-         pOut[12] = acc13;
-         d2 += a2 * acc15;
+         *pOut++ = acc1;
 
-         /* Sample 16. 5 cycles */
-         pOut[13] = acc14;
-         acc16 = b0 * Xn16 + d1;
+/*  8 */
+         Xn1 = *pIn++;
 
-         pOut[14] = acc15;
-         d1 = b1 * Xn16 + d2;
+         acc1 = b0 * Xn1 + d1;
 
-         pOut[15] = acc16;
-         d2 = b2 * Xn16;
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
 
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/*  9 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/* 10 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/* 11 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/* 12 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/* 13 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/* 14 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/* 15 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/* 16 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+         /* decrement loop counter */
          sample--;
-         d1 += a1 * acc16;
-
-         pOut += 16;
-         d2 += a2 * acc16;
       }
 
-      sample = blockSize & 0xFu;
+    /* Loop unrolling: Compute remaining outputs */
+      sample = blockSize & 0xFU;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
       while (sample > 0U) {
-         Xn1 = *pIn;
+         Xn1 = *pIn++;
+
          acc1 = b0 * Xn1 + d1;
 
-         pIn++;
          d1 = b1 * Xn1 + d2;
-
-         *pOut = acc1;
-         d2 = b2 * Xn1;
-
-         pOut++;
          d1 += a1 * acc1;
 
-         sample--;
+         d2 = b2 * Xn1;
          d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+         /* decrement loop counter */
+         sample--;
       }
 
       /* Store the updated state variables back into the state array */
       pState[0] = d1;
-      /* The current stage input is given as the output to the next stage */
-      pIn = pDst;
-
       pState[1] = d2;
-      /* decrement the loop counter */
-      stage--;
 
       pState += 2U;
 
-      /*Reset the output working pointer */
-      pOut = pDst;
-
-   } while (stage > 0U);
-
-#elif defined(ARM_MATH_CM0_FAMILY)
-
-   /* Run the below code for Cortex-M0 */
-
-   do
-   {
-      /* Reading the coefficients */
-      b0 = *pCoeffs++;
-      b1 = *pCoeffs++;
-      b2 = *pCoeffs++;
-      a1 = *pCoeffs++;
-      a2 = *pCoeffs++;
-
-      /*Reading the state values */
-      d1 = pState[0];
-      d2 = pState[1];
-
-
-      sample = blockSize;
-
-      while (sample > 0U)
-      {
-         /* Read the input */
-         Xn1 = *pIn++;
-
-         /* y[n] = b0 * x[n] + d1 */
-         acc1 = (b0 * Xn1) + d1;
-
-         /* Store the result in the accumulator in the destination buffer. */
-         *pOut++ = acc1;
-
-         /* Every time after the output is computed state should be updated. */
-         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-         d1 = ((b1 * Xn1) + (a1 * acc1)) + d2;
-
-         /* d2 = b2 * x[n] + a2 * y[n] */
-         d2 = (b2 * Xn1) + (a2 * acc1);
-
-         /* decrement the loop counter */
-         sample--;
-      }
-
-      /* Store the updated state variables back into the state array */
-      *pState++ = d1;
-      *pState++ = d2;
-
       /* The current stage input is given as the output to the next stage */
       pIn = pDst;
 
-      /*Reset the output working pointer */
+      /* Reset the output working pointer */
       pOut = pDst;
 
-      /* decrement the loop counter */
+      /* decrement loop counter */
       stage--;
 
    } while (stage > 0U);
 
-#else
-
-   float64_t Xn2, Xn3, Xn4;                  	  /*  Input State variables     */
-   float64_t acc2, acc3, acc4;              		  /*  accumulator               */
-
-
-   float64_t p0, p1, p2, p3, p4, A1;
-
-   /* Run the below code for Cortex-M4 and Cortex-M3 */
-   do
-   {
-      /* Reading the coefficients */
-      b0 = *pCoeffs++;
-      b1 = *pCoeffs++;
-      b2 = *pCoeffs++;
-      a1 = *pCoeffs++;
-      a2 = *pCoeffs++;
-
-
-      /*Reading the state values */
-      d1 = pState[0];
-      d2 = pState[1];
-
-      /* Apply loop unrolling and compute 4 output values simultaneously. */
-      sample = blockSize >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
-      while (sample > 0U) {
-
-         /* y[n] = b0 * x[n] + d1 */
-         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-         /* d2 = b2 * x[n] + a2 * y[n] */
-
-         /* Read the four inputs */
-         Xn1 = pIn[0];
-         Xn2 = pIn[1];
-         Xn3 = pIn[2];
-         Xn4 = pIn[3];
-         pIn += 4;
-
-         p0 = b0 * Xn1;
-         p1 = b1 * Xn1;
-         acc1 = p0 + d1;
-         p0 = b0 * Xn2;
-         p3 = a1 * acc1;
-         p2 = b2 * Xn1;
-         A1 = p1 + p3;
-         p4 = a2 * acc1;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         p1 = b1 * Xn2;
-         acc2 = p0 + d1;
-         p0 = b0 * Xn3;
-         p3 = a1 * acc2;
-         p2 = b2 * Xn2;
-         A1 = p1 + p3;
-         p4 = a2 * acc2;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         p1 = b1 * Xn3;
-         acc3 = p0 + d1;
-         p0 = b0 * Xn4;
-         p3 = a1 * acc3;
-         p2 = b2 * Xn3;
-         A1 = p1 + p3;
-         p4 = a2 * acc3;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         acc4 = p0 + d1;
-         p1 = b1 * Xn4;
-         p3 = a1 * acc4;
-         p2 = b2 * Xn4;
-         A1 = p1 + p3;
-         p4 = a2 * acc4;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         pOut[0] = acc1;
-         pOut[1] = acc2;
-         pOut[2] = acc3;
-         pOut[3] = acc4;
-				 pOut += 4;
-
-         sample--;
-      }
-
-      sample = blockSize & 0x3U;
-      while (sample > 0U) {
-         Xn1 = *pIn++;
-
-         p0 = b0 * Xn1;
-         p1 = b1 * Xn1;
-         acc1 = p0 + d1;
-         p3 = a1 * acc1;
-         p2 = b2 * Xn1;
-         A1 = p1 + p3;
-         p4 = a2 * acc1;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         *pOut++ = acc1;
-
-         sample--;
-      }
-
-      /* Store the updated state variables back into the state array */
-      *pState++ = d1;
-      *pState++ = d2;
-
-      /* The current stage input is given as the output to the next stage */
-      pIn = pDst;
-
-      /*Reset the output working pointer */
-      pOut = pDst;
-
-      /* decrement the loop counter */
-      stage--;
-
-   } while (stage > 0U);
-
-#endif
-
 }
 LOW_OPTIMIZATION_EXIT
 
 /**
-   * @} end of BiquadCascadeDF2T group
-   */
+  @} end of BiquadCascadeDF2T group
+ */
diff --git a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c
index 1801799..23cf2d2 100644
--- a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_biquad_cascade_df2T_init_f32.c
  * Description:  Initialization function for floating-point transposed direct form II Biquad cascade filter
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,47 +29,169 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup BiquadCascadeDF2T
- * @{
+  @addtogroup BiquadCascadeDF2T
+  @{
  */
 
 /**
- * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
- * @param[in,out] *S           points to an instance of the filter data structure.
- * @param[in]     numStages    number of 2nd order stages in the filter.
- * @param[in]     *pCoeffs     points to the filter coefficients.
- * @param[in]     *pState      points to the state buffer.
- * @return        none
- *
- * <b>Coefficient and State Ordering:</b>
- * \par
- * The coefficients are stored in the array <code>pCoeffs</code> in the following order:
- * <pre>
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
- * </pre>
- *
- * \par
- * where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
- * <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
- * and so on.  The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
- *
- * \par
- * The <code>pState</code> is a pointer to state array.
- * Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code>.
- * The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
- * The state array has a total length of <code>2*numStages</code> values.
- * The state variables are updated after each block of data is processed; the coefficients are untouched.
+  @brief         Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+  @param[in,out] S           points to an instance of the filter data structure.
+  @param[in]     numStages   number of 2nd order stages in the filter.
+  @param[in]     pCoeffs     points to the filter coefficients.
+  @param[in]     pState      points to the state buffer.
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array <code>pCoeffs</code> in the following order
+                   in the not Neon version.
+  <pre>
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  </pre>
+                   
+  @par
+                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+                   and so on.  The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
+
+                   For Neon version, this array is bigger. If numstages = 4x + y, then the array has size:
+                   32*x + 5*y
+                   and it must be initialized using the function
+                   arm_biquad_cascade_df2T_compute_coefs_f32 which is taking the
+                   standard array coefficient as parameters.
+
+                   But, an array of 8*numstages is a good approximation.
+
+                   Then, the initialization can be done with:
+  <pre>
+                   arm_biquad_cascade_df2T_init_f32(&SNeon, nbCascade, neonCoefs, stateNeon);
+                   arm_biquad_cascade_df2T_compute_coefs_f32(&SNeon,nbCascade,coefs);
+  </pre>
+
+  @par             In this example, neonCoefs is a bigger array of size 8 * numStages.
+                   coefs is the standard array:
+
+  <pre>
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  </pre>
+
+
+  @par
+                   The <code>pState</code> is a pointer to state array.
+                   Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code>.
+                   The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
+                   The state array has a total length of <code>2*numStages</code> values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
  */
 
-void arm_biquad_cascade_df2T_init_f32(
+#if defined(ARM_MATH_NEON) 
+/*
+
+Must be called after initializing the biquad instance.
+pCoeffs has size 5 * nbCascade
+Whereas the pCoeffs for the init has size (4*4 + 4*4)* nbCascade 
+
+So this pCoeffs is the one which would be used for the not Neon version.
+The pCoeffs passed in init is bigger than the one for the not Neon version.
+
+*/
+void arm_biquad_cascade_df2T_compute_coefs_f32(
   arm_biquad_cascade_df2T_instance_f32 * S,
   uint8_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState)
+  float32_t * pCoeffs)
+{
+   uint8_t cnt;
+   float32_t *pDstCoeffs;
+   float32_t b0[4],b1[4],b2[4],a1[4],a2[4];
+
+   pDstCoeffs = S->pCoeffs;
+
+   cnt = numStages >> 2; 
+   while(cnt > 0)
+   {
+      for(int i=0;i<4;i++)
+      {
+        b0[i] = pCoeffs[0];
+        b1[i] = pCoeffs[1];
+        b2[i] = pCoeffs[2];
+        a1[i] = pCoeffs[3];
+        a2[i] = pCoeffs[4];
+        pCoeffs += 5;
+      }
+
+      /* Vec 1 */
+      *pDstCoeffs++ = 0;
+      *pDstCoeffs++ = b0[1];
+      *pDstCoeffs++ = b0[2];
+      *pDstCoeffs++ = b0[3];
+
+      /* Vec 2 */
+      *pDstCoeffs++ = 0;
+      *pDstCoeffs++ = 0;
+      *pDstCoeffs++ = b0[1] * b0[2];
+      *pDstCoeffs++ = b0[2] * b0[3];
+
+      /* Vec 3 */
+      *pDstCoeffs++ = 0;
+      *pDstCoeffs++ = 0;
+      *pDstCoeffs++ = 0;
+      *pDstCoeffs++ = b0[1] * b0[2] * b0[3];
+      
+      /* Vec 4 */
+      *pDstCoeffs++ = b0[0];
+      *pDstCoeffs++ = b0[0] * b0[1];
+      *pDstCoeffs++ = b0[0] * b0[1] * b0[2];
+      *pDstCoeffs++ = b0[0] * b0[1] * b0[2] * b0[3];
+
+      /* Vec 5 */
+      *pDstCoeffs++ = b1[0];
+      *pDstCoeffs++ = b1[1];
+      *pDstCoeffs++ = b1[2];
+      *pDstCoeffs++ = b1[3];
+
+      /* Vec 6 */
+      *pDstCoeffs++ = b2[0];
+      *pDstCoeffs++ = b2[1];
+      *pDstCoeffs++ = b2[2];
+      *pDstCoeffs++ = b2[3];
+
+      /* Vec 7 */
+      *pDstCoeffs++ = a1[0];
+      *pDstCoeffs++ = a1[1];
+      *pDstCoeffs++ = a1[2];
+      *pDstCoeffs++ = a1[3];
+
+      /* Vec 8 */
+      *pDstCoeffs++ = a2[0];
+      *pDstCoeffs++ = a2[1];
+      *pDstCoeffs++ = a2[2];
+      *pDstCoeffs++ = a2[3];
+
+      cnt--;
+   }
+
+   cnt = numStages & 0x3;
+   while(cnt > 0)
+   {
+      *pDstCoeffs++ = *pCoeffs++;
+      *pDstCoeffs++ = *pCoeffs++;
+      *pDstCoeffs++ = *pCoeffs++;
+      *pDstCoeffs++ = *pCoeffs++;
+      *pDstCoeffs++ = *pCoeffs++;
+      cnt--;
+   }
+
+}
+#endif 
+
+void arm_biquad_cascade_df2T_init_f32(
+        arm_biquad_cascade_df2T_instance_f32 * S,
+        uint8_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState)
 {
   /* Assign filter stages */
   S->numStages = numStages;
@@ -85,5 +207,5 @@
 }
 
 /**
- * @} end of BiquadCascadeDF2T group
+  @} end of BiquadCascadeDF2T group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c
index 3d0a508..fe6901e 100644
--- a/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c
+++ b/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c
@@ -3,13 +3,13 @@
  * Title:        arm_biquad_cascade_df2T_init_f64.c
  * Description:  Initialization function for floating-point transposed direct form II Biquad cascade filter
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,47 +29,44 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup BiquadCascadeDF2T
- * @{
+  @addtogroup BiquadCascadeDF2T
+  @{
  */
 
 /**
- * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
- * @param[in,out] *S           points to an instance of the filter data structure.
- * @param[in]     numStages    number of 2nd order stages in the filter.
- * @param[in]     *pCoeffs     points to the filter coefficients.
- * @param[in]     *pState      points to the state buffer.
- * @return        none
- *
- * <b>Coefficient and State Ordering:</b>
- * \par
- * The coefficients are stored in the array <code>pCoeffs</code> in the following order:
- * <pre>
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
- * </pre>
- *
- * \par
- * where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
- * <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
- * and so on.  The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
- *
- * \par
- * The <code>pState</code> is a pointer to state array.
- * Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code>.
- * The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
- * The state array has a total length of <code>2*numStages</code> values.
- * The state variables are updated after each block of data is processed; the coefficients are untouched.
+  @brief         Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+  @param[in,out] S           points to an instance of the filter data structure
+  @param[in]     numStages   number of 2nd order stages in the filter
+  @param[in]     pCoeffs     points to the filter coefficients
+  @param[in]     pState      points to the state buffer
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array <code>pCoeffs</code> in the following order:
+  <pre>
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  </pre>
+  @par
+                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+                   and so on.  The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
+  @par
+                   The <code>pState</code> is a pointer to state array.
+                   Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code>.
+                   The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
+                   The state array has a total length of <code>2*numStages</code> values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
  */
 
 void arm_biquad_cascade_df2T_init_f64(
-  arm_biquad_cascade_df2T_instance_f64 * S,
-  uint8_t numStages,
-  float64_t * pCoeffs,
-  float64_t * pState)
+        arm_biquad_cascade_df2T_instance_f64 * S,
+        uint8_t numStages,
+        float64_t * pCoeffs,
+        float64_t * pState)
 {
   /* Assign filter stages */
   S->numStages = numStages;
@@ -85,5 +82,5 @@
 }
 
 /**
- * @} end of BiquadCascadeDF2T group
+  @} end of BiquadCascadeDF2T group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c b/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c
index b7e9359..14ae008 100644
--- a/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_biquad_cascade_stereo_df2T_f32.c
  * Description:  Processing function for floating-point transposed direct form II Biquad cascade filter. 2 channels
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,139 +29,39 @@
 #include "arm_math.h"
 
 /**
-* @ingroup groupFilters
+  @ingroup groupFilters
 */
 
 /**
-* @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure
-*
-* This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure.
-* The filters are implemented as a cascade of second order Biquad sections.
-* These functions provide a slight memory savings as compared to the direct form I Biquad filter functions.
-* Only floating-point data is supported.
-*
-* This function operate on blocks of input and output data and each call to the function
-* processes <code>blockSize</code> samples through the filter.
-* <code>pSrc</code> points to the array of input data and
-* <code>pDst</code> points to the array of output data.
-* Both arrays contain <code>blockSize</code> values.
-*
-* \par Algorithm
-* Each Biquad stage implements a second order filter using the difference equation:
-* <pre>
-*    y[n] = b0 * x[n] + d1
-*    d1 = b1 * x[n] + a1 * y[n] + d2
-*    d2 = b2 * x[n] + a2 * y[n]
-* </pre>
-* where d1 and d2 represent the two state values.
-*
-* \par
-* A Biquad filter using a transposed Direct Form II structure is shown below.
-* \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad"
-* Coefficients <code>b0, b1, and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
-* Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
-* Pay careful attention to the sign of the feedback coefficients.
-* Some design tools flip the sign of the feedback coefficients:
-* <pre>
-*    y[n] = b0 * x[n] + d1;
-*    d1 = b1 * x[n] - a1 * y[n] + d2;
-*    d2 = b2 * x[n] - a2 * y[n];
-* </pre>
-* In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.
-*
-* \par
-* Higher order filters are realized as a cascade of second order sections.
-* <code>numStages</code> refers to the number of second order stages used.
-* For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
-* A 9th order filter would be realized with <code>numStages=5</code> second order stages with the
-* coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).
-*
-* \par
-* <code>pState</code> points to the state variable array.
-* Each Biquad stage has 2 state variables <code>d1</code> and <code>d2</code>.
-* The state variables are arranged in the <code>pState</code> array as:
-* <pre>
-*     {d11, d12, d21, d22, ...}
-* </pre>
-* where <code>d1x</code> refers to the state variables for the first Biquad and
-* <code>d2x</code> refers to the state variables for the second Biquad.
-* The state array has a total length of <code>2*numStages</code> values.
-* The state variables are updated after each block of data is processed; the coefficients are untouched.
-*
-* \par
-* The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II.
-* The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types.
-* That is why the Direct Form I structure supports Q15 and Q31 data types.
-* The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables <code>d1</code> and <code>d2</code>.
-* Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad.
-* The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.
-*
-* \par Instance Structure
-* The coefficients and state variables for a filter are stored together in an instance data structure.
-* A separate instance structure must be defined for each filter.
-* Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
-*
-* \par Init Functions
-* There is also an associated initialization function.
-* The initialization function performs following operations:
-* - Sets the values of the internal structure fields.
-* - Zeros out the values in the state buffer.
-* To do this manually without calling the init function, assign the follow subfields of the instance structure:
-* numStages, pCoeffs, pState. Also set all of the values in pState to zero.
-*
-* \par
-* Use of the initialization function is optional.
-* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
-* To place an instance structure into a const data section, the instance structure must be manually initialized.
-* Set the values in the state buffer to zeros before static initialization.
-* For example, to statically initialize the instance structure use
-* <pre>
-*     arm_biquad_cascade_df2T_instance_f32 S1 = {numStages, pState, pCoeffs};
-* </pre>
-* where <code>numStages</code> is the number of Biquad stages in the filter; <code>pState</code> is the address of the state buffer.
-* <code>pCoeffs</code> is the address of the coefficient buffer;
-*
-*/
+  @addtogroup BiquadCascadeDF2T
+  @{
+ */
 
 /**
-* @addtogroup BiquadCascadeDF2T
-* @{
-*/
-
-/**
-* @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
-* @param[in]  *S        points to an instance of the filter data structure.
-* @param[in]  *pSrc     points to the block of input data.
-* @param[out] *pDst     points to the block of output data
-* @param[in]  blockSize number of samples to process.
-* @return none.
-*/
-
+  @brief         Processing function for the floating-point transposed direct form II Biquad cascade filter.
+  @param[in]     S         points to an instance of the filter data structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process
+  @return        none
+ */
 
 LOW_OPTIMIZATION_ENTER
 void arm_biquad_cascade_stereo_df2T_f32(
-const arm_biquad_cascade_stereo_df2T_instance_f32 * S,
-float32_t * pSrc,
-float32_t * pDst,
-uint32_t blockSize)
+  const arm_biquad_cascade_stereo_df2T_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
 {
-
-    float32_t *pIn = pSrc;                         /*  source pointer            */
-    float32_t *pOut = pDst;                        /*  destination pointer       */
-    float32_t *pState = S->pState;                 /*  State pointer             */
-    float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
-    float32_t acc1a, acc1b;                        /*  accumulator               */
-    float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
-    float32_t Xn1a, Xn1b;                          /*  temporary input           */
-    float32_t d1a, d2a, d1b, d2b;                  /*  state variables           */
-    uint32_t sample, stage = S->numStages;         /*  loop counters             */
-
-#if defined(ARM_MATH_CM7)
-
-    float32_t Xn2a, Xn3a, Xn4a, Xn5a, Xn6a, Xn7a, Xn8a;         /*  Input State variables     */
-    float32_t Xn2b, Xn3b, Xn4b, Xn5b, Xn6b, Xn7b, Xn8b;         /*  Input State variables     */
-    float32_t acc2a, acc3a, acc4a, acc5a, acc6a, acc7a, acc8a;  /*  Simulates the accumulator */
-    float32_t acc2b, acc3b, acc4b, acc5b, acc6b, acc7b, acc8b;  /*  Simulates the accumulator */
+  const float32_t *pIn = pSrc;                         /* Source pointer */
+        float32_t *pOut = pDst;                        /* Destination pointer */
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t acc1a, acc1b;                        /* Accumulator */
+        float32_t b0, b1, b2, a1, a2;                  /* Filter coefficients */
+        float32_t Xn1a, Xn1b;                          /* Temporary input */
+        float32_t d1a, d2a, d1b, d2b;                  /* State variables */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
 
     do
     {
@@ -170,11 +70,9 @@
         b1 = pCoeffs[1];
         b2 = pCoeffs[2];
         a1 = pCoeffs[3];
-        /* Apply loop unrolling and compute 8 output values simultaneously. */
-        sample = blockSize >> 3U;
         a2 = pCoeffs[4];
 
-        /*Reading the state values */
+        /* Reading the state values */
         d1a = pState[0];
         d2a = pState[1];
         d1b = pState[2];
@@ -182,215 +80,182 @@
 
         pCoeffs += 5U;
 
-        /* First part of the processing with loop unrolling.  Compute 8 outputs at a time.
-        ** a second loop below computes the remaining 1 to 7 samples. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 8 outputs at a time */
+        sample = blockSize >> 3U;
+
         while (sample > 0U) {
+          /* y[n] = b0 * x[n] + d1 */
+          /* d1 = b1 * x[n] + a1 * y[n] + d2 */
+          /* d2 = b2 * x[n] + a2 * y[n] */
 
-            /* y[n] = b0 * x[n] + d1 */
-            /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-            /* d2 = b2 * x[n] + a2 * y[n] */
+/*  1 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
 
-            /* Read the first 2 inputs. 2 cycles */
-            Xn1a  = pIn[0 ];
-            Xn1b  = pIn[1 ];
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
 
-            /* Sample 1. 5 cycles */
-            Xn2a  = pIn[2 ];
-            acc1a = b0 * Xn1a + d1a;
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
 
-            Xn2b  = pIn[3 ];
-            d1a = b1 * Xn1a + d2a;
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
 
-            Xn3a  = pIn[4 ];
-            d2a = b2 * Xn1a;
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
 
-            Xn3b  = pIn[5 ];
-            d1a += a1 * acc1a;
+/*  2 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
 
-            Xn4a  = pIn[6 ];
-            d2a += a2 * acc1a;
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
 
-            /* Sample 2. 5 cycles */
-            Xn4b  = pIn[7 ];
-            acc1b = b0 * Xn1b + d1b;
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
 
-            Xn5a  = pIn[8 ];
-            d1b = b1 * Xn1b + d2b;
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
 
-            Xn5b = pIn[9 ];
-            d2b = b2 * Xn1b;
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
 
-            Xn6a = pIn[10];
-            d1b += a1 * acc1b;
+/*  3 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
 
-            Xn6b = pIn[11];
-            d2b += a2 * acc1b;
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
 
-            /* Sample 3. 5 cycles */
-            Xn7a = pIn[12];
-            acc2a = b0 * Xn2a + d1a;
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
 
-            Xn7b = pIn[13];
-            d1a = b1 * Xn2a + d2a;
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
 
-            Xn8a = pIn[14];
-            d2a = b2 * Xn2a;
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
 
-            Xn8b = pIn[15];
-            d1a += a1 * acc2a;
+/*  4 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
 
-            pIn += 16;
-            d2a += a2 * acc2a;
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
 
-            /* Sample 4. 5 cycles */
-            acc2b = b0 * Xn2b + d1b;
-            d1b = b1 * Xn2b + d2b;
-            d2b = b2 * Xn2b;
-            d1b += a1 * acc2b;
-            d2b += a2 * acc2b;
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
 
-            /* Sample 5. 5 cycles */
-            acc3a = b0 * Xn3a + d1a;
-            d1a = b1 * Xn3a + d2a;
-            d2a = b2 * Xn3a;
-            d1a += a1 * acc3a;
-            d2a += a2 * acc3a;
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
 
-            /* Sample 6. 5 cycles */
-            acc3b = b0 * Xn3b + d1b;
-            d1b = b1 * Xn3b + d2b;
-            d2b = b2 * Xn3b;
-            d1b += a1 * acc3b;
-            d2b += a2 * acc3b;
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
 
-            /* Sample 7. 5 cycles */
-            acc4a = b0 * Xn4a + d1a;
-            d1a = b1 * Xn4a + d2a;
-            d2a = b2 * Xn4a;
-            d1a += a1 * acc4a;
-            d2a += a2 * acc4a;
+/*  5 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
 
-            /* Sample 8. 5 cycles */
-            acc4b = b0 * Xn4b + d1b;
-            d1b = b1 * Xn4b + d2b;
-            d2b = b2 * Xn4b;
-            d1b += a1 * acc4b;
-            d2b += a2 * acc4b;
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
 
-            /* Sample 9. 5 cycles */
-            acc5a = b0 * Xn5a + d1a;
-            d1a = b1 * Xn5a + d2a;
-            d2a = b2 * Xn5a;
-            d1a += a1 * acc5a;
-            d2a += a2 * acc5a;
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
 
-            /* Sample 10. 5 cycles */
-            acc5b = b0 * Xn5b + d1b;
-            d1b = b1 * Xn5b + d2b;
-            d2b = b2 * Xn5b;
-            d1b += a1 * acc5b;
-            d2b += a2 * acc5b;
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
 
-            /* Sample 11. 5 cycles */
-            acc6a = b0 * Xn6a + d1a;
-            d1a = b1 * Xn6a + d2a;
-            d2a = b2 * Xn6a;
-            d1a += a1 * acc6a;
-            d2a += a2 * acc6a;
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
 
-            /* Sample 12. 5 cycles */
-            acc6b = b0 * Xn6b + d1b;
-            d1b = b1 * Xn6b + d2b;
-            d2b = b2 * Xn6b;
-            d1b += a1 * acc6b;
-            d2b += a2 * acc6b;
+/*  6 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
 
-            /* Sample 13. 5 cycles */
-            acc7a = b0 * Xn7a + d1a;
-            d1a = b1 * Xn7a + d2a;
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
 
-            pOut[0 ] = acc1a ;
-            d2a = b2 * Xn7a;
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
 
-            pOut[1 ] = acc1b ;
-            d1a += a1 * acc7a;
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
 
-            pOut[2 ] = acc2a ;
-            d2a += a2 * acc7a;
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
 
-            /* Sample 14. 5 cycles */
-            pOut[3 ] = acc2b ;
-            acc7b = b0 * Xn7b + d1b;
+/*  7 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
 
-            pOut[4 ] = acc3a ;
-            d1b = b1 * Xn7b + d2b;
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
 
-            pOut[5 ] = acc3b ;
-            d2b = b2 * Xn7b;
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
 
-            pOut[6 ] = acc4a ;
-            d1b += a1 * acc7b;
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
 
-            pOut[7 ] = acc4b ;
-            d2b += a2 * acc7b;
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
 
-            /* Sample 15. 5 cycles */
-            pOut[8 ] = acc5a ;
-            acc8a = b0 * Xn8a + d1a;
+/*  8 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
 
-            pOut[9 ] = acc5b;
-            d1a = b1 * Xn8a + d2a;
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
 
-            pOut[10] = acc6a;
-            d2a = b2 * Xn8a;
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
 
-            pOut[11] = acc6b;
-            d1a += a1 * acc8a;
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
 
-            pOut[12] = acc7a;
-            d2a += a2 * acc8a;
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
 
-            /* Sample 16. 5 cycles */
-            pOut[13] = acc7b;
-            acc8b = b0 * Xn8b + d1b;
-
-            pOut[14] = acc8a;
-            d1b = b1 * Xn8b + d2b;
-
-            pOut[15] = acc8b;
-            d2b = b2 * Xn8b;
-
-            sample--;
-            d1b += a1 * acc8b;
-
-            pOut += 16;
-            d2b += a2 * acc8b;
+          /* decrement loop counter */
+          sample--;
         }
 
+        /* Loop unrolling: Compute remaining outputs */
         sample = blockSize & 0x7U;
+
+#else
+
+        /* Initialize blkCnt with number of samples */
+        sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
         while (sample > 0U) {
-            /* Read the input */
-            Xn1a = *pIn++; //Channel a
-            Xn1b = *pIn++; //Channel b
+          /* Read the input */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
 
-            /* y[n] = b0 * x[n] + d1 */
-            acc1a = (b0 * Xn1a) + d1a;
-            acc1b = (b0 * Xn1b) + d1b;
+          /* y[n] = b0 * x[n] + d1 */
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
 
-            /* Store the result in the accumulator in the destination buffer. */
-            *pOut++ = acc1a;
-            *pOut++ = acc1b;
+          /* Store the result in the accumulator in the destination buffer. */
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
 
-            /* Every time after the output is computed state should be updated. */
-            /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-            d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
-            d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+          /* Every time after the output is computed state should be updated. */
+          /* d1 = b1 * x[n] + a1 * y[n] + d2 */
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
 
-            /* d2 = b2 * x[n] + a2 * y[n] */
-            d2a = (b2 * Xn1a) + (a2 * acc1a);
-            d2b = (b2 * Xn1b) + (a2 * acc1b);
+          /* d2 = b2 * x[n] + a2 * y[n] */
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
 
-            sample--;
+          /* decrement loop counter */
+          sample--;
         }
 
         /* Store the updated state variables back into the state array */
@@ -400,271 +265,21 @@
         pState[2] = d1b;
         pState[3] = d2b;
 
-        /* The current stage input is given as the output to the next stage */
-        pIn = pDst;
-        /* decrement the loop counter */
-        stage--;
-
         pState += 4U;
-        /*Reset the output working pointer */
-        pOut = pDst;
-
-    } while (stage > 0U);
-
-#elif defined(ARM_MATH_CM0_FAMILY)
-
-    /* Run the below code for Cortex-M0 */
-
-    do
-    {
-        /* Reading the coefficients */
-        b0 = *pCoeffs++;
-        b1 = *pCoeffs++;
-        b2 = *pCoeffs++;
-        a1 = *pCoeffs++;
-        a2 = *pCoeffs++;
-
-        /*Reading the state values */
-        d1a = pState[0];
-        d2a = pState[1];
-        d1b = pState[2];
-        d2b = pState[3];
-
-
-        sample = blockSize;
-
-        while (sample > 0U)
-        {
-            /* Read the input */
-            Xn1a = *pIn++; //Channel a
-            Xn1b = *pIn++; //Channel b
-
-            /* y[n] = b0 * x[n] + d1 */
-            acc1a = (b0 * Xn1a) + d1a;
-            acc1b = (b0 * Xn1b) + d1b;
-
-            /* Store the result in the accumulator in the destination buffer. */
-            *pOut++ = acc1a;
-            *pOut++ = acc1b;
-
-            /* Every time after the output is computed state should be updated. */
-            /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-            d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
-            d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
-
-            /* d2 = b2 * x[n] + a2 * y[n] */
-            d2a = (b2 * Xn1a) + (a2 * acc1a);
-            d2b = (b2 * Xn1b) + (a2 * acc1b);
-
-            /* decrement the loop counter */
-            sample--;
-        }
-
-        /* Store the updated state variables back into the state array */
-        *pState++ = d1a;
-        *pState++ = d2a;
-        *pState++ = d1b;
-        *pState++ = d2b;
 
         /* The current stage input is given as the output to the next stage */
         pIn = pDst;
 
-        /*Reset the output working pointer */
+        /* Reset the output working pointer */
         pOut = pDst;
 
-        /* decrement the loop counter */
+        /* Decrement the loop counter */
         stage--;
 
     } while (stage > 0U);
 
-#else
-
-    float32_t Xn2a, Xn3a, Xn4a;                          /*  Input State variables     */
-    float32_t Xn2b, Xn3b, Xn4b;                          /*  Input State variables     */
-    float32_t acc2a, acc3a, acc4a;                       /*  accumulator               */
-    float32_t acc2b, acc3b, acc4b;                       /*  accumulator               */
-    float32_t p0a, p1a, p2a, p3a, p4a, A1a;
-    float32_t p0b, p1b, p2b, p3b, p4b, A1b;
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-    do
-    {
-        /* Reading the coefficients */
-        b0 = *pCoeffs++;
-        b1 = *pCoeffs++;
-        b2 = *pCoeffs++;
-        a1 = *pCoeffs++;
-        a2 = *pCoeffs++;
-
-        /*Reading the state values */
-        d1a = pState[0];
-        d2a = pState[1];
-        d1b = pState[2];
-        d2b = pState[3];
-
-        /* Apply loop unrolling and compute 4 output values simultaneously. */
-        sample = blockSize >> 2U;
-
-        /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-        ** a second loop below computes the remaining 1 to 3 samples. */
-        while (sample > 0U) {
-
-            /* y[n] = b0 * x[n] + d1 */
-            /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-            /* d2 = b2 * x[n] + a2 * y[n] */
-
-            /* Read the four inputs */
-            Xn1a = pIn[0];
-            Xn1b = pIn[1];
-            Xn2a = pIn[2];
-            Xn2b = pIn[3];
-            Xn3a = pIn[4];
-            Xn3b = pIn[5];
-            Xn4a = pIn[6];
-            Xn4b = pIn[7];
-            pIn += 8;
-
-            p0a = b0 * Xn1a;
-            p0b = b0 * Xn1b;
-            p1a = b1 * Xn1a;
-            p1b = b1 * Xn1b;
-            acc1a = p0a + d1a;
-            acc1b = p0b + d1b;
-            p0a = b0 * Xn2a;
-            p0b = b0 * Xn2b;
-            p3a = a1 * acc1a;
-            p3b = a1 * acc1b;
-            p2a = b2 * Xn1a;
-            p2b = b2 * Xn1b;
-            A1a = p1a + p3a;
-            A1b = p1b + p3b;
-            p4a = a2 * acc1a;
-            p4b = a2 * acc1b;
-            d1a = A1a + d2a;
-            d1b = A1b + d2b;
-            d2a = p2a + p4a;
-            d2b = p2b + p4b;
-
-            p1a = b1 * Xn2a;
-            p1b = b1 * Xn2b;
-            acc2a = p0a + d1a;
-            acc2b = p0b + d1b;
-            p0a = b0 * Xn3a;
-            p0b = b0 * Xn3b;
-            p3a = a1 * acc2a;
-            p3b = a1 * acc2b;
-            p2a = b2 * Xn2a;
-            p2b = b2 * Xn2b;
-            A1a = p1a + p3a;
-            A1b = p1b + p3b;
-            p4a = a2 * acc2a;
-            p4b = a2 * acc2b;
-            d1a = A1a + d2a;
-            d1b = A1b + d2b;
-            d2a = p2a + p4a;
-            d2b = p2b + p4b;
-
-            p1a = b1 * Xn3a;
-            p1b = b1 * Xn3b;
-            acc3a = p0a + d1a;
-            acc3b = p0b + d1b;
-            p0a = b0 * Xn4a;
-            p0b = b0 * Xn4b;
-            p3a = a1 * acc3a;
-            p3b = a1 * acc3b;
-            p2a = b2 * Xn3a;
-            p2b = b2 * Xn3b;
-            A1a = p1a + p3a;
-            A1b = p1b + p3b;
-            p4a = a2 * acc3a;
-            p4b = a2 * acc3b;
-            d1a = A1a + d2a;
-            d1b = A1b + d2b;
-            d2a = p2a + p4a;
-            d2b = p2b + p4b;
-
-            acc4a = p0a + d1a;
-            acc4b = p0b + d1b;
-            p1a = b1 * Xn4a;
-            p1b = b1 * Xn4b;
-            p3a = a1 * acc4a;
-            p3b = a1 * acc4b;
-            p2a = b2 * Xn4a;
-            p2b = b2 * Xn4b;
-            A1a = p1a + p3a;
-            A1b = p1b + p3b;
-            p4a = a2 * acc4a;
-            p4b = a2 * acc4b;
-            d1a = A1a + d2a;
-            d1b = A1b + d2b;
-            d2a = p2a + p4a;
-            d2b = p2b + p4b;
-
-            pOut[0] = acc1a;
-            pOut[1] = acc1b;
-            pOut[2] = acc2a;
-            pOut[3] = acc2b;
-            pOut[4] = acc3a;
-            pOut[5] = acc3b;
-            pOut[6] = acc4a;
-            pOut[7] = acc4b;
-            pOut += 8;
-
-            sample--;
-        }
-
-        sample = blockSize & 0x3U;
-        while (sample > 0U) {
-            Xn1a = *pIn++;
-            Xn1b = *pIn++;
-
-            p0a = b0 * Xn1a;
-            p0b = b0 * Xn1b;
-            p1a = b1 * Xn1a;
-            p1b = b1 * Xn1b;
-            acc1a = p0a + d1a;
-            acc1b = p0b + d1b;
-            p3a = a1 * acc1a;
-            p3b = a1 * acc1b;
-            p2a = b2 * Xn1a;
-            p2b = b2 * Xn1b;
-            A1a = p1a + p3a;
-            A1b = p1b + p3b;
-            p4a = a2 * acc1a;
-            p4b = a2 * acc1b;
-            d1a = A1a + d2a;
-            d1b = A1b + d2b;
-            d2a = p2a + p4a;
-            d2b = p2b + p4b;
-
-            *pOut++ = acc1a;
-            *pOut++ = acc1b;
-
-            sample--;
-        }
-
-        /* Store the updated state variables back into the state array */
-        *pState++ = d1a;
-        *pState++ = d2a;
-        *pState++ = d1b;
-        *pState++ = d2b;
-
-        /* The current stage input is given as the output to the next stage */
-        pIn = pDst;
-
-        /*Reset the output working pointer */
-        pOut = pDst;
-
-        /* decrement the loop counter */
-        stage--;
-
-    } while (stage > 0U);
-
-#endif
-
 }
 LOW_OPTIMIZATION_EXIT
-
 /**
-   * @} end of BiquadCascadeDF2T group
-   */
+  @} end of BiquadCascadeDF2T group
+ */
diff --git a/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c b/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c
index 4940ec9..d398f18 100644
--- a/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_biquad_cascade_stereo_df2T_init_f32.c
  * Description:  Initialization function for floating-point transposed direct form II Biquad cascade filter
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,47 +29,44 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup BiquadCascadeDF2T
- * @{
+  @addtogroup BiquadCascadeDF2T
+  @{
  */
 
 /**
- * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
- * @param[in,out] *S           points to an instance of the filter data structure.
- * @param[in]     numStages    number of 2nd order stages in the filter.
- * @param[in]     *pCoeffs     points to the filter coefficients.
- * @param[in]     *pState      points to the state buffer.
- * @return        none
- *
- * <b>Coefficient and State Ordering:</b>
- * \par
- * The coefficients are stored in the array <code>pCoeffs</code> in the following order:
- * <pre>
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
- * </pre>
- *
- * \par
- * where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
- * <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
- * and so on.  The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
- *
- * \par
- * The <code>pState</code> is a pointer to state array.
- * Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code> for each channel.
- * The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
- * The state array has a total length of <code>2*numStages</code> values.
- * The state variables are updated after each block of data is processed; the coefficients are untouched.
+  @brief         Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+  @param[in,out] S           points to an instance of the filter data structure.
+  @param[in]     numStages   number of 2nd order stages in the filter.
+  @param[in]     pCoeffs     points to the filter coefficients.
+  @param[in]     pState      points to the state buffer.
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array <code>pCoeffs</code> in the following order:
+  <pre>
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  </pre>
+  @par
+                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+                   and so on.  The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
+  @par
+                   The <code>pState</code> is a pointer to state array.
+                   Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code> for each channel.
+                   The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
+                   The state array has a total length of <code>2*numStages</code> values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
  */
 
 void arm_biquad_cascade_stereo_df2T_init_f32(
-  arm_biquad_cascade_stereo_df2T_instance_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState)
+        arm_biquad_cascade_stereo_df2T_instance_f32 * S,
+        uint8_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState)
 {
   /* Assign filter stages */
   S->numStages = numStages;
@@ -85,5 +82,5 @@
 }
 
 /**
- * @} end of BiquadCascadeDF2T group
+  @} end of BiquadCascadeDF2T group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_conv_f32.c b/DSP/Source/FilteringFunctions/arm_conv_f32.c
index 9ce5bf0..8fa1308 100644
--- a/DSP/Source/FilteringFunctions/arm_conv_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_conv_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_conv_f32.c
  * Description:  Convolution of floating-point sequences
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,108 +29,97 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @defgroup Conv Convolution
- *
- * Convolution is a mathematical operation that operates on two finite length vectors to generate a finite length output vector.
- * Convolution is similar to correlation and is frequently used in filtering and data analysis.
- * The CMSIS DSP library contains functions for convolving Q7, Q15, Q31, and floating-point data types.
- * The library also provides fast versions of the Q15 and Q31 functions on Cortex-M4 and Cortex-M3.
- *
- * \par Algorithm
- * Let <code>a[n]</code> and <code>b[n]</code> be sequences of length <code>srcALen</code> and <code>srcBLen</code> samples respectively.
- * Then the convolution
- *
- * <pre>
- *                   c[n] = a[n] * b[n]
- * </pre>
- *
- * \par
- * is defined as
- * \image html ConvolutionEquation.gif
- * \par
- * Note that <code>c[n]</code> is of length <code>srcALen + srcBLen - 1</code> and is defined over the interval <code>n=0, 1, 2, ..., srcALen + srcBLen - 2</code>.
- * <code>pSrcA</code> points to the first input vector of length <code>srcALen</code> and
- * <code>pSrcB</code> points to the second input vector of length <code>srcBLen</code>.
- * The output result is written to <code>pDst</code> and the calling function must allocate <code>srcALen+srcBLen-1</code> words for the result.
- *
- * \par
- * Conceptually, when two signals <code>a[n]</code> and <code>b[n]</code> are convolved,
- * the signal <code>b[n]</code> slides over <code>a[n]</code>.
- * For each offset \c n, the overlapping portions of a[n] and b[n] are multiplied and summed together.
- *
- * \par
- * Note that convolution is a commutative operation:
- *
- * <pre>
- *                   a[n] * b[n] = b[n] * a[n].
- * </pre>
- *
- * \par
- * This means that switching the A and B arguments to the convolution functions has no effect.
- *
- * <b>Fixed-Point Behavior</b>
- *
- * \par
- * Convolution requires summing up a large number of intermediate products.
- * As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation.
- * Refer to the function specific documentation below for further details of the particular algorithm used.
- *
- *
- * <b>Fast Versions</b>
- *
- * \par
- * Fast versions are supported for Q31 and Q15.  Cycles for Fast versions are less compared to Q31 and Q15 of conv and the design requires
- * the input signals should be scaled down to avoid intermediate overflows.
- *
- *
- * <b>Opt Versions</b>
- *
- * \par
- * Opt versions are supported for Q15 and Q7.  Design uses internal scratch buffer for getting good optimisation.
- * These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions
+  @defgroup Conv Convolution
+
+  Convolution is a mathematical operation that operates on two finite length vectors to generate a finite length output vector.
+  Convolution is similar to correlation and is frequently used in filtering and data analysis.
+  The CMSIS DSP library contains functions for convolving Q7, Q15, Q31, and floating-point data types.
+  The library also provides fast versions of the Q15 and Q31 functions.
+
+ @par            Algorithm
+                   Let <code>a[n]</code> and <code>b[n]</code> be sequences of length <code>srcALen</code> and
+                   <code>srcBLen</code> samples respectively. Then the convolution
+  <pre>
+     c[n] = a[n] * b[n]
+  </pre>
+  @par
+                   is defined as
+                   \image html ConvolutionEquation.gif
+  @par
+                   Note that <code>c[n]</code> is of length <code>srcALen + srcBLen - 1</code> and is defined over the interval <code>n=0, 1, 2, ..., srcALen + srcBLen - 2</code>.
+                   <code>pSrcA</code> points to the first input vector of length <code>srcALen</code> and
+                   <code>pSrcB</code> points to the second input vector of length <code>srcBLen</code>.
+                   The output result is written to <code>pDst</code> and the calling function must allocate <code>srcALen+srcBLen-1</code> words for the result.
+  @par
+                   Conceptually, when two signals <code>a[n]</code> and <code>b[n]</code> are convolved,
+                   the signal <code>b[n]</code> slides over <code>a[n]</code>.
+                   For each offset \c n, the overlapping portions of a[n] and b[n] are multiplied and summed together.
+  @par
+                   Note that convolution is a commutative operation:
+  <pre>
+     a[n] * b[n] = b[n] * a[n].
+  </pre>
+  @par
+                   This means that switching the A and B arguments to the convolution functions has no effect.
+
+  @par           Fixed-Point Behavior
+                   Convolution requires summing up a large number of intermediate products.
+                   As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation.
+                   Refer to the function specific documentation below for further details of the particular algorithm used.
+
+  @par           Fast Versions
+                   Fast versions are supported for Q31 and Q15. Cycles for Fast versions are less compared to Q31 and Q15 of conv and the design requires
+                   the input signals should be scaled down to avoid intermediate overflows.
+
+  @par           Opt Versions
+                   Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation.
+                   These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions
  */
 
 /**
- * @addtogroup Conv
- * @{
+  @addtogroup Conv
+  @{
  */
 
 /**
- * @brief Convolution of floating-point sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.
- * @return none.
+  @brief         Convolution of floating-point sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
+  @return        none
  */
 
 void arm_conv_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst)
+  const float32_t * pSrcA,
+        uint32_t srcALen,
+  const float32_t * pSrcB,
+        uint32_t srcBLen,
+        float32_t * pDst)
 {
 
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
 
-#if defined (ARM_MATH_DSP)
+  const float32_t *pIn1;                               /* InputA pointer */
+  const float32_t *pIn2;                               /* InputB pointer */
+        float32_t *pOut = pDst;                        /* Output pointer */
+  const float32_t *px;                                 /* Intermediate inputA pointer */
+  const float32_t *py;                                 /* Intermediate inputB pointer */
+  const float32_t *pSrc1, *pSrc2;                      /* Intermediate pointers */
+        float32_t sum;                                 /* Accumulators */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t *pIn1;                               /* inputA pointer */
-  float32_t *pIn2;                               /* inputB pointer */
-  float32_t *pOut = pDst;                        /* output pointer */
-  float32_t *px;                                 /* Intermediate inputA pointer */
-  float32_t *py;                                 /* Intermediate inputB pointer */
-  float32_t *pSrc1, *pSrc2;                      /* Intermediate pointers */
-  float32_t sum, acc0, acc1, acc2, acc3;         /* Accumulator */
-  float32_t x0, x1, x2, x3, c0;                  /* Temporary variables to hold state and coefficient values */
-  uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counters */
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+        float32_t acc0, acc1, acc2, acc3;              /* Accumulators */
+        float32_t x0, x1, x2, x3, c0;                  /* Temporary variables to hold state and coefficient values */
+#endif
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -173,7 +162,7 @@
   blockSize3 = blockSize1;
 
   /* --------------------------
-   * initializations of stage1
+   * Initializations of stage1
    * -------------------------*/
 
   /* sum = x[0] * y[0]
@@ -196,6 +185,12 @@
   /* ------------------------
    * Stage1 process
    * ----------------------*/
+#if defined(ARM_MATH_NEON)
+    float32x4_t vec1;
+    float32x4_t vec2;
+    float32x4_t res = vdupq_n_f32(0) ;
+    float32x2_t accum = vdup_n_f32(0);
+#endif /* #if defined(ARM_MATH_NEON) */
 
   /* The first stage starts here */
   while (blockSize1 > 0U)
@@ -203,11 +198,44 @@
     /* Accumulator is made zero for every iteration */
     sum = 0.0f;
 
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+    /* Loop unrolling: Compute 4 outputs at a time */
     k = count >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+#if defined(ARM_MATH_NEON)
+    res = vdupq_n_f32(0) ;
+    accum = vdup_n_f32(0);
+
+    /* Compute 4 MACs simultaneously. */
+    k = count >> 2U;
+
+    /* First part of the processing.  Compute 4 MACs at a time.
      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+
+    while (k > 0U)
+    {
+      vec1 = vld1q_f32(px);
+      vec2 = vld1q_f32(py-3);
+      vec2 = vrev64q_f32(vec2);
+      vec2 = vcombine_f32(vget_high_f32(vec2), vget_low_f32(vec2));
+
+      res = vmlaq_f32(res,vec1, vec2);
+
+      /* Increment pointers */
+      px += 4;
+      py -= 4; 
+
+      /* Decrement the loop counter */
+      k--;
+    }
+
+    accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
+    sum += accum[0] + accum[1];
+
+    /* If the count is not a multiple of 4, compute any remaining MACs here.
+     ** No loop unrolling is used. */
+    k = count & 3;
+#else
     while (k > 0U)
     {
       /* x[0] * y[srcBLen - 1] */
@@ -222,20 +250,27 @@
       /* x[3] * y[srcBLen - 4] */
       sum += *px++ * *py--;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
-    /* If the count is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     k = count % 0x4U;
 
+#endif /* #if defined(ARM_MATH_NEON) */
+
+#else
+    /* Initialize k with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */
+
     while (k > 0U)
     {
       /* Perform the multiply-accumulate */
       sum += *px++ * *py--;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -246,10 +281,10 @@
     py = pIn2 + count;
     px = pIn1;
 
-    /* Increment the MAC count */
+    /* Increment MAC count */
     count++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize1--;
   }
 
@@ -258,7 +293,7 @@
    * ------------------------*/
 
   /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen]   * y[0]
    * ....
    * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
    */
@@ -282,7 +317,21 @@
    * srcBLen should be greater than or equal to 4 */
   if (srcBLen >= 4U)
   {
-    /* Loop unroll over blockSize2, by 4 */
+   
+#if defined(ARM_MATH_NEON)
+      float32x4_t c;
+      float32x4_t x1v;
+      float32x4_t x2v;
+      uint32x4_t x1v_u;
+      uint32x4_t x2v_u;
+      uint32x4_t x_u;
+      float32x4_t x;
+      float32x4_t res = vdupq_n_f32(0) ;
+#endif /* #if defined(ARM_MATH_NEON) */
+   
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
     blkCnt = blockSize2 >> 2U;
 
     while (blkCnt > 0U)
@@ -293,40 +342,100 @@
       acc2 = 0.0f;
       acc3 = 0.0f;
 
-      /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-      x2 = *(px++);
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+       /* Apply loop unrolling and compute 4 MACs simultaneously. */
       k = srcBLen >> 2U;
 
+#if defined(ARM_MATH_NEON)
+      res = vdupq_n_f32(0) ;
+
+      x1v = vld1q_f32(px);
+      x2v = vld1q_f32(px+4);
+
+      do
+      {
+        c = vld1q_f32(py-3);
+
+        px += 4;
+        x = x1v;
+        res = vmlaq_n_f32(res,x,c[3]);
+
+	x = vextq_f32(x1v,x2v,1);
+
+        res = vmlaq_n_f32(res,x,c[2]);
+
+        x = vextq_f32(x1v,x2v,2);
+
+	res = vmlaq_n_f32(res,x,c[1]);
+
+	x = vextq_f32(x1v,x2v,3);
+
+	res = vmlaq_n_f32(res,x,c[0]);
+
+        py -= 4; 
+
+        x1v = x2v ;
+        x2v = vld1q_f32(px+4);
+
+      } while (--k);
+      
+      
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen & 0x3;
+
+      x1v = vld1q_f32(px);
+      px += 4;
+
+      while (k > 0U)
+      {
+        /* Read y[srcBLen - 5] sample */
+        c0 = *(py--);
+
+        res = vmlaq_n_f32(res,x1v,c0);
+
+        /* Reuse the present samples for the next MAC */
+        x1v[0] = x1v[1];
+        x1v[1] = x1v[2];
+        x1v[2] = x1v[3];
+
+        x1v[3] = *(px++);
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      acc0 = res[0];
+      acc1 = res[1];
+      acc2 = res[2];
+      acc3 = res[3];
+
+#else
+      /* read x[0], x[1], x[2] samples */
+      x0 = *px++;
+      x1 = *px++;
+      x2 = *px++;
+
       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
       do
       {
         /* Read y[srcBLen - 1] sample */
-        c0 = *(py--);
-
+        c0 = *py--;
         /* Read x[3] sample */
         x3 = *(px);
 
         /* Perform the multiply-accumulate */
         /* acc0 +=  x[0] * y[srcBLen - 1] */
         acc0 += x0 * c0;
-
         /* acc1 +=  x[1] * y[srcBLen - 1] */
         acc1 += x1 * c0;
-
         /* acc2 +=  x[2] * y[srcBLen - 1] */
         acc2 += x2 * c0;
-
         /* acc3 +=  x[3] * y[srcBLen - 1] */
         acc3 += x3 * c0;
 
         /* Read y[srcBLen - 2] sample */
-        c0 = *(py--);
-
+        c0 = *py--;
         /* Read x[4] sample */
         x0 = *(px + 1U);
 
@@ -341,12 +450,11 @@
         acc3 += x0 * c0;
 
         /* Read y[srcBLen - 3] sample */
-        c0 = *(py--);
-
+        c0 = *py--;
         /* Read x[5] sample */
         x1 = *(px + 2U);
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         /* acc0 +=  x[2] * y[srcBLen - 3] */
         acc0 += x2 * c0;
         /* acc1 +=  x[3] * y[srcBLen - 2] */
@@ -357,13 +465,12 @@
         acc3 += x1 * c0;
 
         /* Read y[srcBLen - 4] sample */
-        c0 = *(py--);
-
+        c0 = *py--;
         /* Read x[6] sample */
         x2 = *(px + 3U);
         px += 4U;
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         /* acc0 +=  x[3] * y[srcBLen - 4] */
         acc0 += x3 * c0;
         /* acc1 +=  x[4] * y[srcBLen - 4] */
@@ -373,7 +480,6 @@
         /* acc3 +=  x[6] * y[srcBLen - 4] */
         acc3 += x2 * c0;
 
-
       } while (--k);
 
       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
@@ -383,12 +489,11 @@
       while (k > 0U)
       {
         /* Read y[srcBLen - 5] sample */
-        c0 = *(py--);
-
+        c0 = *py--;
         /* Read x[7] sample */
-        x3 = *(px++);
+        x3 = *px++;
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         /* acc0 +=  x[4] * y[srcBLen - 5] */
         acc0 += x0 * c0;
         /* acc1 +=  x[5] * y[srcBLen - 5] */
@@ -406,6 +511,7 @@
         /* Decrement the loop counter */
         k--;
       }
+#endif /* #if defined(ARM_MATH_NEON) */
 
       /* Store the result in the accumulator in the destination buffer. */
       *pOut++ = acc0;
@@ -420,42 +526,85 @@
       px = pIn1 + count;
       py = pSrc2;
 
-
       /* Decrement the loop counter */
       blkCnt--;
     }
 
-
     /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
      ** No loop unrolling is used. */
     blkCnt = blockSize2 % 0x4U;
 
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined (ARM_MATH_NEON)*/
+
     while (blkCnt > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0.0f;
 
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined(ARM_MATH_NEON) || defined (ARM_MATH_LOOPUNROLL)
+      /* Loop unrolling: Compute 4 outputs at a time */
       k = srcBLen >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+#if defined (ARM_MATH_NEON)
+      float32x4_t res = vdupq_n_f32(0) ;
+      float32x4_t x = vdupq_n_f32(0) ;
+      float32x4_t y = vdupq_n_f32(0) ;
+      float32x2_t accum = vdup_n_f32(0) ;
+
+      /* First part of the processing.  Compute 4 MACs at a time.
        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
       while (k > 0U)
       {
-        /* Perform the multiply-accumulates */
-        sum += *px++ * *py--;
-        sum += *px++ * *py--;
-        sum += *px++ * *py--;
-        sum += *px++ * *py--;
+        x = vld1q_f32(px);
+        y = vld1q_f32(py-3);
+
+        y = vrev64q_f32(y);
+        y = vcombine_f32(vget_high_f32(y), vget_low_f32(y));
+
+        res = vmlaq_f32(res,x,y);
+
+        px += 4 ;
+        py -= 4 ;
 
         /* Decrement the loop counter */
         k--;
       }
 
+      accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
+      sum += accum[0] + accum[1]; 
+
       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
        ** No loop unrolling is used. */
+      k = srcBLen & 0x3U;
+
+#else
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += *px++ * *py--;
+        sum += *px++ * *py--;
+        sum += *px++ * *py--;
+        sum += *px++ * *py--;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
       k = srcBLen % 0x4U;
 
+#endif /* if defined (ARM_MATH_NEON) */
+#else
+      /* Initialize blkCnt with number of samples */
+      k = srcBLen;
+
+#endif /* #if defined(ARM_MATH_NEON) || defined (ARM_MATH_LOOPUNROLL) */
+
       while (k > 0U)
       {
         /* Perform the multiply-accumulate */
@@ -533,7 +682,7 @@
      The blockSize3 variable holds the number of MAC operations performed */
 
   /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
+  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));
   px = pSrc1;
 
   /* Working pointer of inputB */
@@ -543,19 +692,45 @@
   /* -------------------
    * Stage3 process
    * ------------------*/
-
   while (blockSize3 > 0U)
   {
     /* Accumulator is made zero for every iteration */
     sum = 0.0f;
 
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+    /* Loop unrolling: Compute 4 outputs at a time */
     k = blockSize3 >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+#if defined(ARM_MATH_NEON)
+    float32x4_t res = vdupq_n_f32(0) ;
+    float32x4_t x = vdupq_n_f32(0) ;
+    float32x4_t y = vdupq_n_f32(0) ;
+    float32x2_t accum = vdup_n_f32(0) ;
+
     while (k > 0U)
     {
+      x = vld1q_f32(px);
+      y = vld1q_f32(py-3);
+
+      y = vrev64q_f32(y);
+      y = vcombine_f32(vget_high_f32(y), vget_low_f32(y));
+
+      res = vmlaq_f32(res,x,y);
+
+      px += 4 ;
+      py -= 4 ;
+
+      /* Decrement the loop counter */
+      k--;
+    }
+
+    accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
+    sum += accum[0] + accum[1]; 
+
+#else
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
       /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
       sum += *px++ * *py--;
 
@@ -568,21 +743,27 @@
       /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
       sum += *px++ * *py--;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
+#endif /* #if defined (ARM_MATH_NEON) */
 
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     k = blockSize3 % 0x4U;
+#else
+
+    /* Initialize blkCnt with number of samples */
+    k = blockSize3;
+
+#endif /* #if defined (ARM_MATH_NEON) || defined (ARM_MATH_LOOPUNROLL)*/
 
     while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
+      /* Perform the multiply-accumulate */
       /* sum +=  x[srcALen-1] * y[srcBLen-1] */
       sum += *px++ * *py--;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -598,16 +779,15 @@
   }
 
 #else
+/* alternate version for CM0_FAMILY */
 
-  /* Run the below code for Cortex-M0 */
-
-  float32_t *pIn1 = pSrcA;                       /* inputA pointer */
-  float32_t *pIn2 = pSrcB;                       /* inputB pointer */
-  float32_t sum;                                 /* Accumulator */
-  uint32_t i, j;                                 /* loop counters */
+  const float32_t *pIn1 = pSrcA;                       /* InputA pointer */
+  const float32_t *pIn2 = pSrcB;                       /* InputB pointer */
+        float32_t sum;                                 /* Accumulator */
+        uint32_t i, j;                                 /* Loop counters */
 
   /* Loop to calculate convolution for output length number of times */
-  for (i = 0U; i < ((srcALen + srcBLen) - 1U); i++)
+  for (i = 0U; i < (srcALen + srcBLen - 1U); i++)
   {
     /* Initialize sum with zero to carry out MAC operations */
     sum = 0.0f;
@@ -616,20 +796,21 @@
     for (j = 0U; j <= i; j++)
     {
       /* Check the array limitations */
-      if ((((i - j) < srcBLen) && (j < srcALen)))
+      if (((i - j) < srcBLen) && (j < srcALen))
       {
         /* z[i] += x[i-j] * y[j] */
-        sum += pIn1[j] * pIn2[i - j];
+        sum += ( pIn1[j] * pIn2[i - j]);
       }
     }
+
     /* Store the output in the destination buffer */
     pDst[i] = sum;
   }
 
-#endif /*   #if defined (ARM_MATH_DSP)        */
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
 
 }
 
 /**
- * @} end of Conv group
+  @} end of Conv group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c b/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c
index c6e05b8..ed2aea9 100644
--- a/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_conv_fast_opt_q15.c
  * Description:  Fast Q15 Convolution
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,71 +29,65 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup Conv
- * @{
+  @addtogroup Conv
+  @{
  */
 
 /**
- * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.
- * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
- * @return none.
- *
- * \par Restrictions
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit
- *
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * This fast version uses a 32-bit accumulator with 2.30 format.
- * The accumulator maintains full precision of the intermediate multiplication results
- * but provides only a single guard bit. There is no saturation on intermediate additions.
- * Thus, if the accumulator overflows it wraps around and distorts the result.
- * The input signals should be scaled down to avoid intermediate overflows.
- * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
- * as maximum of min(srcALen, srcBLen) number of additions are carried internally.
- * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
- *
- * \par
- * See <code>arm_conv_q15()</code> for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.
+  @brief         Convolution of Q15 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1
+  @param[in]     pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2
+  @param[in]     pScratch2  points to scratch buffer of size min(srcALen, srcBLen
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This fast version uses a 32-bit accumulator with 2.30 format.
+                   The accumulator maintains full precision of the intermediate multiplication results
+                   but provides only a single guard bit. There is no saturation on intermediate additions.
+                   Thus, if the accumulator overflows it wraps around and distorts the result.
+                   The input signals should be scaled down to avoid intermediate overflows.
+                   Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
+                   as maximum of min(srcALen, srcBLen) number of additions are carried internally.
+                   The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
+
+  @remark
+                   Refer to \ref arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.
  */
 
 void arm_conv_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2)
 {
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
-  q31_t y1, y2;                                  /* State variables */
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  uint32_t tapCnt;                               /* loop count */
-#ifdef UNALIGNED_SUPPORT_DISABLE
+        q31_t acc0;                                    /* Accumulators */
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
+        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+        q15_t *py;                                     /* Intermediate inputB pointer */
+        uint32_t j, k, blkCnt;                         /* Loop counter */
+        uint32_t tapCnt;                               /* Loop count */
 
-  q15_t a, b;
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc1, acc2, acc3;                        /* Accumulators */
+        q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
+        q31_t y1, y2;                                  /* State variables */
+#endif
 
-#endif	/*	#ifdef UNALIGNED_SUPPORT_DISABLE	*/
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -126,11 +120,10 @@
   /* points to smaller length sequence */
   px = pIn2;
 
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcBLen >> 2U;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* First part of the processing with loop unrolling copies 4 data points at a time.
-   ** a second loop below copies for the remaining 1 to 3 samples. */
+  /* Loop unrolling: Compute 4 outputs at a time */
+  k = srcBLen >> 2U;
 
   /* Copy smaller length input sequence in reverse order into second scratch buffer */
   while (k > 0U)
@@ -141,20 +134,26 @@
     *pScr2-- = *px++;
     *pScr2-- = *px++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     k--;
   }
 
-  /* If the count is not a multiple of 4, copy remaining samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   k = srcBLen % 0x4U;
 
+#else
+
+  /* Initialize k with number of samples */
+  k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (k > 0U)
   {
     /* copy second buffer in reversal manner for remaining samples */
     *pScr2-- = *px++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     k--;
   }
 
@@ -170,50 +169,12 @@
 
   /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
 
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
   /* Copy (srcALen) samples in scratch buffer */
   arm_copy_q15(pIn1, pScr1, srcALen);
 
   /* Update pointers */
   pScr1 += srcALen;
 
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcALen >> 2U;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.
-   ** No loop unrolling is used. */
-  k = srcALen % 0x4U;
-
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
 
   /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
   arm_fill_q15(0, pScr1, (srcBLen - 1U));
@@ -221,40 +182,6 @@
   /* Update pointer */
   pScr1 += (srcBLen - 1U);
 
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = (srcBLen - 1U) >> 2U;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.
-   ** No loop unrolling is used. */
-  k = (srcBLen - 1U) % 0x4U;
-
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
   /* Temporary pointer for scratch2 */
   py = pScratch2;
 
@@ -262,10 +189,9 @@
   /* Initialization of pIn2 pointer */
   pIn2 = py;
 
-  /* First part of the processing with loop unrolling process 4 data points at a time.
-   ** a second loop below process for the remaining 1 to 3 samples. */
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* Actual convolution process starts here */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = (srcALen + srcBLen - 1U) >> 2;
 
   while (blkCnt > 0)
@@ -280,21 +206,19 @@
     acc3 = 0;
 
     /* Read two samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr1)++;
+    x1 = read_q15x2_ia (&pScr1);
 
     /* Read next two samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr1)++;
+    x2 = read_q15x2_ia (&pScr1);
 
     tapCnt = (srcBLen) >> 2U;
 
     while (tapCnt > 0U)
     {
 
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
       /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pIn2);
-      y2 = _SIMD32_OFFSET(pIn2 + 2U);
+      y1 = read_q15x2_ia ((q15_t **) &pIn2);
+      y2 = read_q15x2_ia ((q15_t **) &pIn2);
 
       /* multiply and accumlate */
       acc0 = __SMLAD(x1, y1, acc0);
@@ -311,7 +235,7 @@
       acc1 = __SMLADX(x3, y1, acc1);
 
       /* Read next two samples from scratch1 buffer */
-      x1 = _SIMD32_OFFSET(pScr1);
+      x1 = read_q15x2_ia (&pScr1);
 
       /* multiply and accumlate */
       acc0 = __SMLAD(x2, y2, acc0);
@@ -327,7 +251,7 @@
       acc3 = __SMLADX(x3, y1, acc3);
       acc1 = __SMLADX(x3, y2, acc1);
 
-      x2 = _SIMD32_OFFSET(pScr1 + 2U);
+      x2 = read_q15x2_ia (&pScr1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
       x3 = __PKHBT(x2, x1, 0);
@@ -337,86 +261,7 @@
 
       acc3 = __SMLADX(x3, y2, acc3);
 
-#else
-
-      /* Read four samples from smaller buffer */
-	  a = *pIn2;
-	  b = *(pIn2 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      y1 = __PKHBT(a, b, 16);
-#else
-      y1 = __PKHBT(b, a, 16);
-#endif
-
-	  a = *(pIn2 + 2);
-	  b = *(pIn2 + 3);
-#ifndef ARM_MATH_BIG_ENDIAN
-      y2 = __PKHBT(a, b, 16);
-#else
-      y2 = __PKHBT(b, a, 16);
-#endif
-
-      acc0 = __SMLAD(x1, y1, acc0);
-
-      acc2 = __SMLAD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc1 = __SMLADX(x3, y1, acc1);
-
-	  a = *pScr1;
-	  b = *(pScr1 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(a, b, 16);
-#else
-      x1 = __PKHBT(b, a, 16);
-#endif
-
-      acc0 = __SMLAD(x2, y2, acc0);
-
-      acc2 = __SMLAD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      acc1 = __SMLADX(x3, y2, acc1);
-
-	  a = *(pScr1 + 2);
-	  b = *(pScr1 + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x2 = __PKHBT(a, b, 16);
-#else
-      x2 = __PKHBT(b, a, 16);
-#endif
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y2, acc3);
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-      /* update scratch pointers */
-      pIn2 += 4U;
-      pScr1 += 4U;
-
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
@@ -428,7 +273,6 @@
 
     while (tapCnt > 0U)
     {
-
       /* accumlate the results */
       acc0 += (*pScr1++ * *pIn2);
       acc1 += (*pScr1++ * *pIn2);
@@ -437,46 +281,37 @@
 
       pScr1 -= 3U;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
     blkCnt--;
 
-
     /* Store the results in the accumulators in the destination buffer. */
-
 #ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
 #else
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN       */
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     /* Initialization of inputB pointer */
     pIn2 = py;
 
     pScratch1 += 4U;
-
   }
 
-
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = (srcALen + srcBLen - 1U) & 0x3;
 
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (srcALen + srcBLen - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   /* Calculate convolution for remaining samples of Bigger length sequence */
   while (blkCnt > 0)
   {
@@ -491,10 +326,11 @@
     while (tapCnt > 0U)
     {
 
+      /* Read next two samples from scratch1 buffer */
       acc0 += (*pScr1++ * *pIn2++);
       acc0 += (*pScr1++ * *pIn2++);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
@@ -507,25 +343,24 @@
       /* accumlate the results */
       acc0 += (*pScr1++ * *pIn2++);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
     blkCnt--;
 
     /* The result is in 2.30 format.  Convert to 1.15 with saturation.
-     ** Then store the output in the destination buffer. */
+       Then store the output in the destination buffer. */
     *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
 
     /* Initialization of inputB pointer */
     pIn2 = py;
 
     pScratch1 += 1U;
-
   }
 
 }
 
 /**
- * @} end of Conv group
+  @} end of Conv group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c b/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c
index 9625ae5..3102a05 100644
--- a/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_conv_fast_q15.c
  * Description:  Fast Q15 Convolution
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,56 +29,54 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup Conv
- * @{
+  @addtogroup Conv
+  @{
  */
 
 /**
- * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * This fast version uses a 32-bit accumulator with 2.30 format.
- * The accumulator maintains full precision of the intermediate multiplication results
- * but provides only a single guard bit. There is no saturation on intermediate additions.
- * Thus, if the accumulator overflows it wraps around and distorts the result.
- * The input signals should be scaled down to avoid intermediate overflows.
- * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
- * as maximum of min(srcALen, srcBLen) number of additions are carried internally.
- * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
- *
- * \par
- * See <code>arm_conv_q15()</code> for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.
+  @brief         Convolution of Q15 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This fast version uses a 32-bit accumulator with 2.30 format.
+                   The accumulator maintains full precision of the intermediate multiplication results
+                   but provides only a single guard bit. There is no saturation on intermediate additions.
+                   Thus, if the accumulator overflows it wraps around and distorts the result.
+                   The input signals should be scaled down to avoid intermediate overflows.
+                   Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
+                   as maximum of min(srcALen, srcBLen) number of additions are carried internally.
+                   The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
+
+  @remark
+                   Refer to \ref arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.
  */
 
 void arm_conv_fast_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst)
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst)
 {
-#ifndef UNALIGNED_SUPPORT_DISABLE
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *pOut = pDst;                            /* output pointer */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
-  uint32_t blockSize1, blockSize2, blockSize3, j, k, count, blkCnt;     /* loop counter */
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+  const q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -175,10 +173,10 @@
     py = pIn2 + count;
     px = pIn1;
 
-    /* Increment the MAC count */
+    /* Increment MAC count */
     count++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize1--;
   }
 
@@ -202,11 +200,11 @@
     {
       /* Perform the multiply-accumulates */
       /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
-      sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+      sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
       /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
-      sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+      sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -234,10 +232,10 @@
     py = pIn2 + (count - 1U);
     px = pIn1;
 
-    /* Increment the MAC count */
+    /* Increment MAC count */
     count++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize1--;
   }
 
@@ -261,7 +259,6 @@
   /* count is the index by which the pointer pIn1 to be incremented */
   count = 0U;
 
-
   /* --------------------
    * Stage2 process
    * -------------------*/
@@ -284,13 +281,11 @@
       acc2 = 0;
       acc3 = 0;
 
-
       /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
+      x0 = read_q15x2 ((q15_t *) px);
       /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px+1);
-	  px+= 2U;
-
+      x1 = read_q15x2 ((q15_t *) px + 1);
+	  px += 2U;
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
       k = srcBLen >> 2U;
@@ -301,7 +296,7 @@
       {
         /* Read the last two inputB samples using SIMD:
          * y[srcBLen - 1] and y[srcBLen - 2] */
-        c0 = *__SIMD32(py)--;
+        c0 = read_q15x2_da ((q15_t **) &py);
 
         /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
         acc0 = __SMLADX(x0, c0, acc0);
@@ -310,10 +305,10 @@
         acc1 = __SMLADX(x1, c0, acc1);
 
         /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
+        x2 = read_q15x2 ((q15_t *) px);
 
         /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px+1);
+        x3 = read_q15x2 ((q15_t *) px + 1);
 
         /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
         acc2 = __SMLADX(x2, c0, acc2);
@@ -322,7 +317,7 @@
         acc3 = __SMLADX(x3, c0, acc3);
 
         /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-        c0 = *__SIMD32(py)--;
+        c0 = read_q15x2_da ((q15_t **) &py);
 
         /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
         acc0 = __SMLADX(x2, c0, acc0);
@@ -331,10 +326,10 @@
         acc1 = __SMLADX(x3, c0, acc1);
 
         /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px+2);
+        x0 = read_q15x2 ((q15_t *) px + 2);
 
         /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px+3);
+        x1 = read_q15x2 ((q15_t *) px + 3);
 		px += 4U;
 
         /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
@@ -358,17 +353,13 @@
         c0 = *(py+1);
 
 #ifdef  ARM_MATH_BIG_ENDIAN
-
         c0 = c0 << 16U;
-
 #else
-
         c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
 
         /* Read x[7] */
-        x3 = *__SIMD32(px);
+        x3 = read_q15x2 ((q15_t *) px);
 		px++;
 
         /* Perform the multiply-accumulates */
@@ -381,13 +372,13 @@
       if (k == 2U)
       {
         /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
+        c0 = read_q15x2 ((q15_t *) py);
 
         /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
+        x3 = read_q15x2 ((q15_t *) px);
 
         /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
+        x2 = read_q15x2 ((q15_t *) px + 1);
 		px += 2U;
 
         /* Perform the multiply-accumulates */
@@ -400,13 +391,13 @@
       if (k == 3U)
       {
         /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
+        c0 = read_q15x2 ((q15_t *) py);
 
         /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
+        x3 = read_q15x2 ((q15_t *) px);
 
         /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
+        x2 = read_q15x2 ((q15_t *) px + 1);
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLADX(x0, c0, acc0);
@@ -417,15 +408,13 @@
         /* Read y[srcBLen - 7] */
 		c0 = *(py-1);
 #ifdef  ARM_MATH_BIG_ENDIAN
-
         c0 = c0 << 16U;
 #else
-
         c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
 
         /* Read x[10] */
-        x3 =  _SIMD32_OFFSET(px+2);
+        x3 =  read_q15x2 ((q15_t *) px + 2);
 		px += 3U;
 
         /* Perform the multiply-accumulates */
@@ -435,18 +424,14 @@
         acc3 = __SMLADX(x3, c0, acc3);
       }
 
-      /* Store the results in the accumulators in the destination buffer. */
+      /* Store the result in the accumulator in the destination buffer. */
 #ifndef ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ = __PKHBT((acc0 >> 15), (acc1 >> 15), 16);
-      *__SIMD32(pOut)++ = __PKHBT((acc2 >> 15), (acc3 >> 15), 16);
-
+      write_q15x2_ia (&pOut, __PKHBT((acc0 >> 15), (acc1 >> 15), 16));
+      write_q15x2_ia (&pOut, __PKHBT((acc2 >> 15), (acc3 >> 15), 16));
 #else
-
-      *__SIMD32(pOut)++ = __PKHBT((acc1 >> 15), (acc0 >> 15), 16);
-      *__SIMD32(pOut)++ = __PKHBT((acc3 >> 15), (acc2 >> 15), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
+      write_q15x2_ia (&pOut, __PKHBT((acc1 >> 15), (acc0 >> 15), 16));
+      write_q15x2_ia (&pOut, __PKHBT((acc3 >> 15), (acc2 >> 15), 16));
+#endif /*#ifndef  ARM_MATH_BIG_ENDIAN*/
 
       /* Increment the pointer pIn1 index, count by 4 */
       count += 4U;
@@ -455,7 +440,7 @@
       px = pIn1 + count;
       py = pSrc2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
@@ -476,12 +461,12 @@
       while (k > 0U)
       {
         /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
+        sum += ((q31_t) *px++ * *py--);
+        sum += ((q31_t) *px++ * *py--);
+        sum += ((q31_t) *px++ * *py--);
+        sum += ((q31_t) *px++ * *py--);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -492,9 +477,9 @@
       while (k > 0U)
       {
         /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
+        sum += ((q31_t) *px++ * *py--);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -508,7 +493,7 @@
       px = pIn1 + count;
       py = pSrc2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
@@ -529,28 +514,27 @@
       while (k > 0U)
       {
         /* Perform the multiply-accumulate */
-        sum += ((q31_t) * px++ * *py--);
+        sum += ((q31_t) *px++ * *py--);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
       /* Store the result in the accumulator in the destination buffer. */
       *pOut++ = (q15_t) (sum >> 15);
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;
       py = pSrc2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
 
-
   /* --------------------------
    * Initializations of stage3
    * -------------------------*/
@@ -599,12 +583,12 @@
     {
       /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
        * with y[srcBLen - 1], y[srcBLen - 2] respectively */
-      sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+      sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
       /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
        * with y[srcBLen - 3], y[srcBLen - 4] respectively */
-      sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+      sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -621,7 +605,7 @@
       /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
       sum = __SMLAD(*px++, *py--, sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -632,7 +616,7 @@
     px = ++pSrc1;
     py = pIn2;
 
-    /* Decrement the loop counter */
+    /* Decrement  loop counter */
     blockSize3--;
 
     j--;
@@ -657,7 +641,7 @@
       /* sum +=  x[srcALen-1] * y[srcBLen-1] */
       sum = __SMLAD(*px++, *py--, sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -672,727 +656,8 @@
     blockSize3--;
   }
 
-#else
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *pOut = pDst;                            /* output pointer */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
-  uint32_t blockSize1, blockSize2, blockSize3, j, k, count, blkCnt;     /* loop counter */
-  q15_t a, b;
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if (srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally
-   * divided into three stages according to the number of multiplications that has to be
-   * taken place between inputA samples and inputB samples. In the first stage of the
-   * algorithm, the multiplications increase by one for every iteration.
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.
-   * In the third stage of the algorithm, the multiplications decrease by one
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1U;
-  blockSize2 = srcALen - (srcBLen - 1U);
-  blockSize3 = blockSize1;
-
-  /* --------------------------
-   * Initializations of stage1
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]
-   * sum = x[0] * y[1] + x[1] * y[0]
-   * ....
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.
-     The count variable holds the number of MAC operations performed */
-  count = 1U;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------
-   * Stage1 process
-   * ----------------------*/
-
-  /* For loop unrolling by 4, this stage is divided into two. */
-  /* First part of this stage computes the MAC operations less than 4 */
-  /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
-  /* The first part of the stage starts here */
-  while ((count < 4U) && (blockSize1 > 0U))
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Loop over number of MAC operations between
-     * inputA samples and inputB samples */
-    k = count;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulates */
-      sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* The second part of the stage starts here */
-  /* The internal loop, over count, is unrolled by 4 */
-  /* To, read the last two inputB samples using SIMD:
-   * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
-  py = py - 1;
-
-  while (blockSize1 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2U;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-	py++;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
-    k = count % 0x4U;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulates */
-      sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + (count - 1U);
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------
-   * Initializations of stage2
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
-   * ....
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1U);
-  py = pSrc2;
-
-  /* count is the index by which the pointer pIn1 to be incremented */
-  count = 0U;
-
-
-  /* --------------------
-   * Stage2 process
-   * -------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
-   * So, to loop unroll over blockSize2,
-   * srcBLen should be greater than or equal to 4 */
-  if (srcBLen >= 4U)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      py = py - 1U;
-
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1] samples */
-	  a = *px++;
-	  b = *px++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  x0 = __PKHBT(a, b, 16);
-	  a = *px;
-	  x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  x0 = __PKHBT(b, a, 16);
-	  a = *px;
-	  x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the last two inputB samples using SIMD:
-         * y[srcBLen - 1] and y[srcBLen - 2] */
-		a = *py;
-		b = *(py+1);
-		py -= 2;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-        acc0 = __SMLADX(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-        acc1 = __SMLADX(x1, c0, acc1);
-
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  x2 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x3 = __PKHBT(b, a, 16);
-
-#else
-
-	  x2 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x3 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-        acc2 = __SMLADX(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-        acc3 = __SMLADX(x3, c0, acc3);
-
-        /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-		a = *py;
-		b = *(py+1);
-		py -= 2;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-        acc0 = __SMLADX(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-        acc1 = __SMLADX(x3, c0, acc1);
-
-        /* Read x[4], x[5], x[6] */
-	  a = *(px + 2);
-	  b = *(px + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  x0 = __PKHBT(a, b, 16);
-	  a = *(px + 4);
-	  x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  x0 = __PKHBT(b, a, 16);
-	  a = *(px + 4);
-	  x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-		px += 4U;
-
-        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-        acc2 = __SMLADX(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-        acc3 = __SMLADX(x1, c0, acc3);
-
-      } while (--k);
-
-      /* For the next MAC operations, SIMD is not used
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4U;
-
-      if (k == 1U)
-      {
-        /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16U;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[7] */
-		a = *px;
-		b = *(px+1);
-		px++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		x3 = __PKHBT(a, b, 16);
-
-#else
-
- 		x3 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLADX(x1, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      if (k == 2U)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-		a = *py;
-		b = *(py+1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Read x[7], x[8], x[9] */
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  x3 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  x3 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-		px += 2U;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-      }
-
-      if (k == 3U)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-		a = *py;
-		b = *(py+1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Read x[7], x[8], x[9] */
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  x3 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  x3 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-
-        /* Read y[srcBLen - 7] */
-		c0 = *(py-1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16U;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[10] */
-		a = *(px+2);
-		b = *(px+3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		x3 = __PKHBT(a, b, 16);
-
-#else
-
- 		x3 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px += 3U;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x1, c0, acc0);
-        acc1 = __SMLAD(x2, c0, acc1);
-        acc2 = __SMLADX(x2, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      /* Store the results in the accumulators in the destination buffer. */
-	  *pOut++ = (q15_t)(acc0 >> 15);
-	  *pOut++ = (q15_t)(acc1 >> 15);
-	  *pOut++ = (q15_t)(acc2 >> 15);
-	  *pOut++ = (q15_t)(acc3 >> 15);
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4U;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4U;
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4U;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------
-   * Initializations of stage3
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
-   * ....
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
-   * sum +=  x[srcALen-1] * y[srcBLen-1]
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1U);
-  pIn2 = pSrc2 - 1U;
-  py = pIn2;
-
-  /* -------------------
-   * Stage3 process
-   * ------------------*/
-
-  /* For loop unrolling by 4, this stage is divided into two. */
-  /* First part of this stage computes the MAC operations greater than 4 */
-  /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
-  /* The first part of the stage starts here */
-  j = blockSize3 >> 2U;
-
-  while ((j > 0U) && (blockSize3 > 0U))
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2U;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-	py++;
-
-    while (k > 0U)
-    {
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4U;
-
-    while (k > 0U)
-    {
-      /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
-        sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-
-    j--;
-  }
-
-  /* The second part of the stage starts here */
-  /* SIMD is not used for the next MAC operations,
-   * so pointer py is updated to read only one sample at a time */
-  py = py + 1U;
-
-  while (blockSize3 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 }
 
 /**
- * @} end of Conv group
+  @} end of Conv group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c b/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c
index ce3e334..e87eddc 100644
--- a/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_conv_fast_q31.c
  * Description:  Fast Q31 Convolution
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,57 +29,54 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup Conv
- * @{
+  @addtogroup Conv
+  @{
  */
 
 /**
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
- * These intermediate results are accumulated in a 32-bit register in 2.30 format.
- * Finally, the accumulator is saturated and converted to a 1.31 result.
- *
- * \par
- * The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result.
- * In order to avoid overflows completely the input signals must be scaled down.
- * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
- * as maximum of min(srcALen, srcBLen) number of additions are carried internally.
- *
- * \par
- * See <code>arm_conv_q31()</code> for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.
+  @brief         Convolution of Q31 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence.
+  @param[in]     srcALen    length of the first input sequence.
+  @param[in]     pSrcB      points to the second input sequence.
+  @param[in]     srcBLen    length of the second input sequence.
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This function is optimized for speed at the expense of fixed-point precision and overflow protection.
+                   The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
+                   These intermediate results are accumulated in a 32-bit register in 2.30 format.
+                   Finally, the accumulator is saturated and converted to a 1.31 result.
+  @par
+                   The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result.
+                   In order to avoid overflows completely the input signals must be scaled down.
+                   Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
+                   as maximum of min(srcALen, srcBLen) number of additions are carried internally.
+  @remark
+                   Refer to \ref arm_conv_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.
  */
 
 void arm_conv_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst)
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst)
 {
-  q31_t *pIn1;                                   /* inputA pointer */
-  q31_t *pIn2;                                   /* inputB pointer */
-  q31_t *pOut = pDst;                            /* output pointer */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
-  uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counter */
+  const q31_t *pIn1;                                   /* InputA pointer */
+  const q31_t *pIn2;                                   /* InputB pointer */
+        q31_t *pOut = pDst;                            /* Output pointer */
+  const q31_t *px;                                     /* Intermediate inputA pointer */
+  const q31_t *py;                                     /* Intermediate inputB pointer */
+  const q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -161,21 +158,21 @@
     {
       /* x[0] * y[srcBLen - 1] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
+                      ((q63_t) *px++ * (*py--))) >> 32);
 
       /* x[1] * y[srcBLen - 2] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
+                      ((q63_t) *px++ * (*py--))) >> 32);
 
       /* x[2] * y[srcBLen - 3] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
+                      ((q63_t) *px++ * (*py--))) >> 32);
 
       /* x[3] * y[srcBLen - 4] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
+                      ((q63_t) *px++ * (*py--))) >> 32);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -187,9 +184,9 @@
     {
       /* Perform the multiply-accumulate */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
+                      ((q63_t) *px++ * (*py--))) >> 32);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -200,10 +197,10 @@
     py = pIn2 + count;
     px = pIn1;
 
-    /* Increment the MAC count */
+    /* Increment MAC count */
     count++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize1--;
   }
 
@@ -248,9 +245,9 @@
       acc3 = 0;
 
       /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-      x2 = *(px++);
+      x0 = *px++;
+      x1 = *px++;
+      x2 = *px++;
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
       k = srcBLen >> 2U;
@@ -260,29 +257,25 @@
       do
       {
         /* Read y[srcBLen - 1] sample */
-        c0 = *(py--);
-
+        c0 = *py--;
         /* Read x[3] sample */
-        x3 = *(px++);
+        x3 = *px++;
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         /* acc0 +=  x[0] * y[srcBLen - 1] */
         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
         /* acc1 +=  x[1] * y[srcBLen - 1] */
         acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
         /* acc2 +=  x[2] * y[srcBLen - 1] */
         acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-
         /* acc3 +=  x[3] * y[srcBLen - 1] */
         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
 
-        /* Read y[srcBLen - 2] sample */
-        c0 = *(py--);
 
+        /* Read y[srcBLen - 2] sample */
+        c0 = *py--;
         /* Read x[4] sample */
-        x0 = *(px++);
+        x0 = *px++;
 
         /* Perform the multiply-accumulate */
         /* acc0 +=  x[1] * y[srcBLen - 2] */
@@ -294,11 +287,11 @@
         /* acc3 +=  x[4] * y[srcBLen - 2] */
         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
 
-        /* Read y[srcBLen - 3] sample */
-        c0 = *(py--);
 
+        /* Read y[srcBLen - 3] sample */
+        c0 = *py--;
         /* Read x[5] sample */
-        x1 = *(px++);
+        x1 = *px++;
 
         /* Perform the multiply-accumulates */
         /* acc0 +=  x[2] * y[srcBLen - 3] */
@@ -310,11 +303,11 @@
         /* acc3 +=  x[5] * y[srcBLen - 3] */
         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
 
-        /* Read y[srcBLen - 4] sample */
-        c0 = *(py--);
 
+        /* Read y[srcBLen - 4] sample */
+        c0 = *py--;
         /* Read x[6] sample */
-        x2 = *(px++);
+        x2 = *px++;
 
         /* Perform the multiply-accumulates */
         /* acc0 +=  x[3] * y[srcBLen - 4] */
@@ -336,10 +329,9 @@
       while (k > 0U)
       {
         /* Read y[srcBLen - 5] sample */
-        c0 = *(py--);
-
+        c0 = *py--;
         /* Read x[7] sample */
-        x3 = *(px++);
+        x3 = *px++;
 
         /* Perform the multiply-accumulates */
         /* acc0 +=  x[4] * y[srcBLen - 5] */
@@ -356,11 +348,11 @@
         x1 = x2;
         x2 = x3;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
-      /* Store the results in the accumulators in the destination buffer. */
+      /* Store the result in the accumulator in the destination buffer. */
       *pOut++ = (q31_t) (acc0 << 1);
       *pOut++ = (q31_t) (acc1 << 1);
       *pOut++ = (q31_t) (acc2 << 1);
@@ -373,7 +365,7 @@
       px = pIn1 + count;
       py = pSrc2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
@@ -395,15 +387,15 @@
       {
         /* Perform the multiply-accumulates */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -415,23 +407,23 @@
       {
         /* Perform the multiply-accumulate */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
       /* Store the result in the accumulator in the destination buffer. */
       *pOut++ = sum << 1;
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;
       py = pSrc2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
@@ -453,23 +445,23 @@
       {
         /* Perform the multiply-accumulate */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
       /* Store the result in the accumulator in the destination buffer. */
       *pOut++ = sum << 1;
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;
       py = pSrc2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
@@ -513,23 +505,24 @@
      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
     while (k > 0U)
     {
+      /* Perform the multiply-accumulate */
       /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
+                      ((q63_t) *px++ * (*py--))) >> 32);
 
       /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
+                      ((q63_t) *px++ * (*py--))) >> 32);
 
       /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
+                      ((q63_t) *px++ * (*py--))) >> 32);
 
       /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
+                      ((q63_t) *px++ * (*py--))) >> 32);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -541,9 +534,9 @@
     {
       /* Perform the multiply-accumulate */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
+                      ((q63_t) *px++ * (*py--))) >> 32);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -554,12 +547,12 @@
     px = ++pSrc1;
     py = pSrc2;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize3--;
   }
 
 }
 
 /**
- * @} end of Conv group
+  @} end of Conv group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c b/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c
index 1b20399..6ad34cd 100644
--- a/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_conv_opt_q15.c
  * Description:  Convolution of Q15 sequences
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,73 +29,61 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup Conv
- * @{
+  @addtogroup Conv
+  @{
  */
 
 /**
- * @brief Convolution of Q15 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.
- * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
- * @return none.
- *
- * \par Restrictions
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit
- *
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * Both inputs are in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
- * This approach provides 33 guard bits and there is no risk of overflow.
- * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
- *
- *
- * \par
- * Refer to <code>arm_conv_fast_q15()</code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.
- *
- *
+  @brief         Convolution of Q15 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
+  @param[in]     pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+  @param[in]     pScratch2  points to scratch buffer of size min(srcALen, srcBLen).
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both inputs are in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   This approach provides 33 guard bits and there is no risk of overflow.
+                   The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
+  @remark
+                   Refer to \ref arm_conv_fast_q15() for a faster but less precise version of this function.
  */
 
 void arm_conv_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2)
 {
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
-  q31_t y1, y2;                                  /* State variables */
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  uint32_t tapCnt;                               /* loop count */
-#ifdef UNALIGNED_SUPPORT_DISABLE
+        q63_t acc0;                                    /* Accumulators */
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
+        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+        q15_t *py;                                     /* Intermediate inputB pointer */
+        uint32_t j, k, blkCnt;                         /* Loop counter */
+        uint32_t tapCnt;                               /* Loop count */
 
-  q15_t a, b;
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc1, acc2, acc3;                        /* Accumulators */
+        q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
+        q31_t y1, y2;                                  /* State variables */
+#endif
 
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -107,7 +95,6 @@
 
     /* Initialization of inputB pointer */
     pIn2 = pSrcB;
-
   }
   else
   {
@@ -123,17 +110,17 @@
     srcALen = j;
   }
 
-  /* pointer to take end of scratch2 buffer */
+  /* Pointer to take end of scratch2 buffer */
   pScr2 = pScratch2 + srcBLen - 1;
 
   /* points to smaller length sequence */
   px = pIn2;
 
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   k = srcBLen >> 2U;
 
-  /* First part of the processing with loop unrolling copies 4 data points at a time.
-   ** a second loop below copies for the remaining 1 to 3 samples. */
   /* Copy smaller length input sequence in reverse order into second scratch buffer */
   while (k > 0U)
   {
@@ -143,20 +130,26 @@
     *pScr2-- = *px++;
     *pScr2-- = *px++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     k--;
   }
 
-  /* If the count is not a multiple of 4, copy remaining samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   k = srcBLen % 0x4U;
 
+#else
+
+  /* Initialize k with number of samples */
+  k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (k > 0U)
   {
     /* copy second buffer in reversal manner for remaining samples */
     *pScr2-- = *px++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     k--;
   }
 
@@ -164,7 +157,7 @@
   pScr1 = pScratch1;
 
   /* Assuming scratch1 buffer is aligned by 32-bit */
-  /* Fill (srcBLen - 1U) zeros in scratch buffer */
+  /* Fill (srcBLen - 1U) zeros in scratch1 buffer */
   arm_fill_q15(0, pScr1, (srcBLen - 1U));
 
   /* Update temporary scratch pointer */
@@ -172,50 +165,12 @@
 
   /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
 
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
   /* Copy (srcALen) samples in scratch buffer */
   arm_copy_q15(pIn1, pScr1, srcALen);
 
   /* Update pointers */
   pScr1 += srcALen;
 
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcALen >> 2U;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.
-   ** No loop unrolling is used. */
-  k = srcALen % 0x4U;
-
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif
-
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
 
   /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
   arm_fill_q15(0, pScr1, (srcBLen - 1U));
@@ -223,40 +178,6 @@
   /* Update pointer */
   pScr1 += (srcBLen - 1U);
 
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = (srcBLen - 1U) >> 2U;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.
-   ** No loop unrolling is used. */
-  k = (srcBLen - 1U) % 0x4U;
-
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif
-
   /* Temporary pointer for scratch2 */
   py = pScratch2;
 
@@ -264,10 +185,9 @@
   /* Initialization of pIn2 pointer */
   pIn2 = py;
 
-  /* First part of the processing with loop unrolling process 4 data points at a time.
-   ** a second loop below process for the remaining 1 to 3 samples. */
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* Actual convolution process starts here */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = (srcALen + srcBLen - 1U) >> 2;
 
   while (blkCnt > 0)
@@ -282,21 +202,19 @@
     acc3 = 0;
 
     /* Read two samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr1)++;
+    x1 = read_q15x2_ia (&pScr1);
 
     /* Read next two samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr1)++;
+    x2 = read_q15x2_ia (&pScr1);
 
     tapCnt = (srcBLen) >> 2U;
 
     while (tapCnt > 0U)
     {
 
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
       /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pIn2);
-      y2 = _SIMD32_OFFSET(pIn2 + 2U);
+      y1 = read_q15x2_ia ((q15_t **) &pIn2);
+      y2 = read_q15x2_ia ((q15_t **) &pIn2);
 
       /* multiply and accumlate */
       acc0 = __SMLALD(x1, y1, acc0);
@@ -313,7 +231,7 @@
       acc1 = __SMLALDX(x3, y1, acc1);
 
       /* Read next two samples from scratch1 buffer */
-      x1 = _SIMD32_OFFSET(pScr1);
+      x1 = read_q15x2_ia (&pScr1);
 
       /* multiply and accumlate */
       acc0 = __SMLALD(x2, y2, acc0);
@@ -329,7 +247,7 @@
       acc3 = __SMLALDX(x3, y1, acc3);
       acc1 = __SMLALDX(x3, y2, acc1);
 
-      x2 = _SIMD32_OFFSET(pScr1 + 2U);
+      x2 = read_q15x2_ia (&pScr1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
       x3 = __PKHBT(x2, x1, 0);
@@ -339,85 +257,7 @@
 
       acc3 = __SMLALDX(x3, y2, acc3);
 
-#else
-
-      /* Read four samples from smaller buffer */
-	  a = *pIn2;
-	  b = *(pIn2 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      y1 = __PKHBT(a, b, 16);
-#else
-      y1 = __PKHBT(b, a, 16);
-#endif
-
-	  a = *(pIn2 + 2);
-	  b = *(pIn2 + 3);
-#ifndef ARM_MATH_BIG_ENDIAN
-      y2 = __PKHBT(a, b, 16);
-#else
-      y2 = __PKHBT(b, a, 16);
-#endif
-
-      acc0 = __SMLALD(x1, y1, acc0);
-
-      acc2 = __SMLALD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc1 = __SMLALDX(x3, y1, acc1);
-
-	  a = *pScr1;
-	  b = *(pScr1 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(a, b, 16);
-#else
-      x1 = __PKHBT(b, a, 16);
-#endif
-
-      acc0 = __SMLALD(x2, y2, acc0);
-
-      acc2 = __SMLALD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y1, acc3);
-
-      acc1 = __SMLALDX(x3, y2, acc1);
-
-	  a = *(pScr1 + 2);
-	  b = *(pScr1 + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x2 = __PKHBT(a, b, 16);
-#else
-      x2 = __PKHBT(b, a, 16);
-#endif
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y2, acc3);
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-      pIn2 += 4U;
-      pScr1 += 4U;
-
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
@@ -429,7 +269,6 @@
 
     while (tapCnt > 0U)
     {
-
       /* accumlate the results */
       acc0 += (*pScr1++ * *pIn2);
       acc1 += (*pScr1++ * *pIn2);
@@ -438,44 +277,37 @@
 
       pScr1 -= 3U;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
     blkCnt--;
 
-
     /* Store the results in the accumulators in the destination buffer. */
-
 #ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
 #else
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN       */
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     /* Initialization of inputB pointer */
     pIn2 = py;
 
     pScratch1 += 4U;
-
   }
 
-
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = (srcALen + srcBLen - 1U) & 0x3;
 
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (srcALen + srcBLen - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   /* Calculate convolution for remaining samples of Bigger length sequence */
   while (blkCnt > 0)
   {
@@ -494,7 +326,7 @@
       acc0 += (*pScr1++ * *pIn2++);
       acc0 += (*pScr1++ * *pIn2++);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
@@ -507,27 +339,24 @@
       /* accumlate the results */
       acc0 += (*pScr1++ * *pIn2++);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
     blkCnt--;
 
     /* The result is in 2.30 format.  Convert to 1.15 with saturation.
-     ** Then store the output in the destination buffer. */
+       Then store the output in the destination buffer. */
     *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
 
-
     /* Initialization of inputB pointer */
     pIn2 = py;
 
     pScratch1 += 1U;
-
   }
 
 }
 
-
 /**
- * @} end of Conv group
+  @} end of Conv group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c b/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c
index 24d378b..fb9e2ec 100644
--- a/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c
+++ b/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_conv_opt_q7.c
  * Description:  Convolution of Q7 sequences
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,61 +29,53 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup Conv
- * @{
+  @addtogroup Conv
+  @{
  */
 
 /**
- * @brief Convolution of Q7 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.
- * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
- * @return none.
- *
- * \par Restrictions
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 32-bit internal accumulator.
- * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
- * This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
- * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.
- *
+  @brief         Convolution of Q7 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
+  @param[in]     pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+  @param[in]     pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
+                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+                   This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
+                   The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.
  */
 
 void arm_conv_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2)
 {
-
-  q15_t *pScr2, *pScr1;                          /* Intermediate pointers for scratch pointers */
-  q15_t x4;                                      /* Temporary input variable */
-  q7_t *pIn1, *pIn2;                             /* inputA and inputB pointer */
-  uint32_t j, k, blkCnt, tapCnt;                 /* loop counter */
-  q7_t *px;                                      /* Temporary input1 pointer */
-  q15_t *py;                                     /* Temporary input2 pointer */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q31_t x1, x2, x3, y1;                          /* Temporary input variables */
-  q7_t *pOut = pDst;                             /* output pointer */
-  q7_t out0, out1, out2, out3;                   /* temporary variables */
+        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch */
+        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch */
+        q15_t x4;                                      /* Temporary input variable */
+        q15_t *py;                                     /* Temporary input2 pointer */
+        q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
+  const q7_t *pIn1, *pIn2;                             /* InputA and inputB pointer */
+        uint32_t j, k, blkCnt, tapCnt;                 /* Loop counter */
+        q31_t x1, x2, x3, y1;                          /* Temporary input variables */
+  const q7_t *px;                                      /* Temporary input1 pointer */
+        q7_t *pOut = pDst;                             /* Output pointer */
+        q7_t out0, out1, out2, out3;                   /* Temporary variables */
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -110,9 +102,6 @@
     srcALen = j;
   }
 
-  /* pointer to take end of scratch2 buffer */
-  pScr2 = pScratch2;
-
   /* points to smaller length sequence */
   px = pIn2 + srcBLen - 1;
 
@@ -124,16 +113,16 @@
   while (k > 0U)
   {
     /* copy second buffer in reversal manner */
-    x4 = (q15_t) * px--;
+    x4 = (q15_t) *px--;
     *pScr2++ = x4;
-    x4 = (q15_t) * px--;
+    x4 = (q15_t) *px--;
     *pScr2++ = x4;
-    x4 = (q15_t) * px--;
+    x4 = (q15_t) *px--;
     *pScr2++ = x4;
-    x4 = (q15_t) * px--;
+    x4 = (q15_t) *px--;
     *pScr2++ = x4;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     k--;
   }
 
@@ -144,16 +133,13 @@
   while (k > 0U)
   {
     /* copy second buffer in reversal manner for remaining samples */
-    x4 = (q15_t) * px--;
+    x4 = (q15_t) *px--;
     *pScr2++ = x4;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     k--;
   }
 
-  /* Initialze temporary scratch pointer */
-  pScr1 = pScratch1;
-
   /* Fill (srcBLen - 1U) zeros in scratch buffer */
   arm_fill_q15(0, pScr1, (srcBLen - 1U));
 
@@ -169,16 +155,16 @@
   while (k > 0U)
   {
     /* copy second buffer in reversal manner */
-    x4 = (q15_t) * pIn1++;
+    x4 = (q15_t) *pIn1++;
     *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
+    x4 = (q15_t) *pIn1++;
     *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
+    x4 = (q15_t) *pIn1++;
     *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
+    x4 = (q15_t) *pIn1++;
     *pScr1++ = x4;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     k--;
   }
 
@@ -196,48 +182,12 @@
     k--;
   }
 
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
   /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
   arm_fill_q15(0, pScr1, (srcBLen - 1U));
 
   /* Update pointer */
   pScr1 += (srcBLen - 1U);
 
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = (srcBLen - 1U) >> 2U;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.
-   ** No loop unrolling is used. */
-  k = (srcBLen - 1U) % 0x4U;
-
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif
-
   /* Temporary pointer for scratch2 */
   py = pScratch2;
 
@@ -247,7 +197,7 @@
   pScr2 = py;
 
   /* Actual convolution process starts here */
-  blkCnt = (srcALen + srcBLen - 1U) >> 2;
+  blkCnt = (srcALen + srcBLen - 1U) >> 2U;
 
   while (blkCnt > 0)
   {
@@ -261,18 +211,17 @@
     acc3 = 0;
 
     /* Read two samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr1)++;
+    x1 = read_q15x2_ia (&pScr1);
 
     /* Read next two samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr1)++;
+    x2 = read_q15x2_ia (&pScr1);
 
     tapCnt = (srcBLen) >> 2U;
 
     while (tapCnt > 0U)
     {
-
       /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pScr2);
+      y1 = read_q15x2_ia (&pScr2);
 
       /* multiply and accumlate */
       acc0 = __SMLAD(x1, y1, acc0);
@@ -289,7 +238,7 @@
       acc1 = __SMLADX(x3, y1, acc1);
 
       /* Read next two samples from scratch1 buffer */
-      x1 = *__SIMD32(pScr1)++;
+      x1 = read_q15x2_ia (&pScr1);
 
       /* pack input data */
 #ifndef ARM_MATH_BIG_ENDIAN
@@ -301,7 +250,7 @@
       acc3 = __SMLADX(x3, y1, acc3);
 
       /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pScr2 + 2U);
+      y1 = read_q15x2_ia (&pScr2);
 
       acc0 = __SMLAD(x2, y1, acc0);
 
@@ -309,7 +258,7 @@
 
       acc1 = __SMLADX(x3, y1, acc1);
 
-      x2 = *__SIMD32(pScr1)++;
+      x2 = read_q15x2_ia (&pScr1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
       x3 = __PKHBT(x2, x1, 0);
@@ -319,25 +268,18 @@
 
       acc3 = __SMLADX(x3, y1, acc3);
 
-      pScr2 += 4U;
-
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-
-
     /* Update scratch pointer for remaining samples of smaller length sequence */
     pScr1 -= 4U;
 
-
     /* apply same above for remaining samples of smaller length sequence */
     tapCnt = (srcBLen) & 3U;
 
     while (tapCnt > 0U)
     {
-
       /* accumlate the results */
       acc0 += (*pScr1++ * *pScr2);
       acc1 += (*pScr1++ * *pScr2);
@@ -346,7 +288,7 @@
 
       pScr1 -= 3U;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
@@ -358,16 +300,14 @@
     out2 = (q7_t) (__SSAT(acc2 >> 7U, 8));
     out3 = (q7_t) (__SSAT(acc3 >> 7U, 8));
 
-    *__SIMD32(pOut)++ = __PACKq7(out0, out1, out2, out3);
+    write_q7x4_ia (&pOut, __PACKq7(out0, out1, out2, out3));
 
     /* Initialization of inputB pointer */
     pScr2 = py;
 
     pScratch1 += 4U;
-
   }
 
-
   blkCnt = (srcALen + srcBLen - 1U) & 0x3;
 
   /* Calculate convolution for remaining samples of Bigger length sequence */
@@ -386,7 +326,7 @@
       acc0 += (*pScr1++ * *pScr2++);
       acc0 += (*pScr1++ * *pScr2++);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
@@ -395,11 +335,10 @@
     /* apply same above for remaining samples of smaller length sequence */
     while (tapCnt > 0U)
     {
-
       /* accumlate the results */
       acc0 += (*pScr1++ * *pScr2++);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
@@ -412,12 +351,10 @@
     pScr2 = py;
 
     pScratch1 += 1U;
-
   }
 
 }
 
-
 /**
- * @} end of Conv group
+  @} end of Conv group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c b/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c
index f3b15b4..e25f9ab 100644
--- a/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_conv_partial_f32.c
  * Description:  Partial convolution of floating-point sequences
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,84 +29,82 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @defgroup PartialConv Partial Convolution
- *
- * Partial Convolution is equivalent to Convolution except that a subset of the output samples is generated.
- * Each function has two additional arguments.
- * <code>firstIndex</code> specifies the starting index of the subset of output samples.
- * <code>numPoints</code> is the number of output samples to compute.
- * The function computes the output in the range
- * <code>[firstIndex, ..., firstIndex+numPoints-1]</code>.
- * The output array <code>pDst</code> contains <code>numPoints</code> values.
- *
- * The allowable range of output indices is [0 srcALen+srcBLen-2].
- * If the requested subset does not fall in this range then the functions return ARM_MATH_ARGUMENT_ERROR.
- * Otherwise the functions return ARM_MATH_SUCCESS.
- * \note Refer arm_conv_f32() for details on fixed point behavior.
- *
- *
- * <b>Fast Versions</b>
- *
- * \par
- * Fast versions are supported for Q31 and Q15 of partial convolution.  Cycles for Fast versions are less compared to Q31 and Q15 of partial conv and the design requires
- * the input signals should be scaled down to avoid intermediate overflows.
- *
- *
- * <b>Opt Versions</b>
- *
- * \par
- * Opt versions are supported for Q15 and Q7.  Design uses internal scratch buffer for getting good optimisation.
- * These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions of partial convolution
+  @defgroup PartialConv Partial Convolution
+
+  Partial Convolution is equivalent to Convolution except that a subset of the output samples is generated.
+  Each function has two additional arguments.
+  <code>firstIndex</code> specifies the starting index of the subset of output samples.
+  <code>numPoints</code> is the number of output samples to compute.
+  The function computes the output in the range
+  <code>[firstIndex, ..., firstIndex+numPoints-1]</code>.
+  The output array <code>pDst</code> contains <code>numPoints</code> values.
+
+  The allowable range of output indices is [0 srcALen+srcBLen-2].
+  If the requested subset does not fall in this range then the functions return ARM_MATH_ARGUMENT_ERROR.
+  Otherwise the functions return ARM_MATH_SUCCESS.
+  \note Refer to \ref arm_conv_f32() for details on fixed point behavior.
+
+  @par           Fast Versions
+                   Fast versions are supported for Q31 and Q15 of partial convolution.
+                   Cycles for Fast versions are less compared to Q31 and Q15 of partial conv and the design requires
+                   the input signals should be scaled down to avoid intermediate overflows.
+
+  @par           Opt Versions
+                   Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation.
+                   These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions of partial convolution
  */
 
 /**
- * @addtogroup PartialConv
- * @{
+  @addtogroup PartialConv
+  @{
  */
 
 /**
- * @brief Partial convolution of floating-point sequences.
- * @param[in]       *pSrcA points to the first input sequence.
- * @param[in]       srcALen length of the first input sequence.
- * @param[in]       *pSrcB points to the second input sequence.
- * @param[in]       srcBLen length of the second input sequence.
- * @param[out]      *pDst points to the location where the output result is written.
- * @param[in]       firstIndex is the first output sample to start with.
- * @param[in]       numPoints is the number of output points to be computed.
- * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+  @brief         Partial convolution of floating-point sequences.
+  @param[in]     pSrcA       points to the first input sequence
+  @param[in]     srcALen     length of the first input sequence
+  @param[in]     pSrcB       points to the second input sequence
+  @param[in]     srcBLen     length of the second input sequence
+  @param[out]    pDst        points to the location where the output result is written
+  @param[in]     firstIndex  is the first output sample to start with
+  @param[in]     numPoints   is the number of output points to be computed
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
  */
 
 arm_status arm_conv_partial_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
+  const float32_t * pSrcA,
+        uint32_t srcALen,
+  const float32_t * pSrcB,
+        uint32_t srcBLen,
+        float32_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints)
 {
 
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
 
-#if defined (ARM_MATH_DSP)
+  const float32_t *pIn1 = pSrcA;                       /* InputA pointer */
+  const float32_t *pIn2 = pSrcB;                       /* InputB pointer */
+        float32_t *pOut = pDst;                        /* Output pointer */
+  const float32_t *px;                                 /* Intermediate inputA pointer */
+  const float32_t *py;                                 /* Intermediate inputB pointer */
+  const float32_t *pSrc1, *pSrc2;                      /* Intermediate pointers */
+        float32_t sum;                                 /* Accumulator */
+        uint32_t j, k, count, blkCnt, check;
+        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t *pIn1 = pSrcA;                       /* inputA pointer */
-  float32_t *pIn2 = pSrcB;                       /* inputB pointer */
-  float32_t *pOut = pDst;                        /* output pointer */
-  float32_t *px;                                 /* Intermediate inputA pointer */
-  float32_t *py;                                 /* Intermediate inputB pointer */
-  float32_t *pSrc1, *pSrc2;                      /* Intermediate pointers */
-  float32_t sum, acc0, acc1, acc2, acc3;         /* Accumulator */
-  float32_t x0, x1, x2, x3, c0;                  /* Temporary variables to hold state and coefficient values */
-  uint32_t j, k, count = 0U, blkCnt, check;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counters */
-  arm_status status;                             /* status of Partial convolution */
-
+#if defined (ARM_MATH_LOOPUNROLL)
+        float32_t acc0, acc1, acc2, acc3;              /* Accumulator */
+        float32_t x0, x1, x2, x3, c0;                  /* Temporary variables */
+#endif
 
   /* Check for range of output samples to be calculated */
   if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
@@ -116,7 +114,6 @@
   }
   else
   {
-
     /* The algorithm implementation is based on the lengths of the inputs. */
     /* srcB is always made to slide across srcA. */
     /* So srcBLen is always considered as shorter or equal to srcALen */
@@ -148,10 +145,8 @@
     blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
     blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
     blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = ((int32_t) check - blockSize3) -
-      (blockSize1 + (int32_t) firstIndex);
+    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
+    blockSize2 = ((int32_t) check - blockSize3) - (blockSize1 + (int32_t) firstIndex);
     blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
 
     /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
@@ -179,7 +174,7 @@
 
     /* In this stage the MAC operations are increased by 1 for every iteration.
        The count variable holds the number of MAC operations performed.
-       Since the partial convolution starts from from firstIndex
+       Since the partial convolution starts from firstIndex
        Number of Macs to be performed is firstIndex + 1 */
     count = 1U + firstIndex;
 
@@ -195,16 +190,16 @@
      * ----------------------*/
 
     /* The first stage starts here */
-    while (blockSize1 > 0)
+    while (blockSize1 > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0.0f;
 
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
       k = count >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
       while (k > 0U)
       {
         /* x[0] * y[srcBLen - 1] */
@@ -219,20 +214,26 @@
         /* x[3] * y[srcBLen - 4] */
         sum += *px++ * *py--;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
-      /* If the count is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
+      /* Loop unrolling: Compute remaining outputs */
       k = count % 0x4U;
 
+#else
+
+      /* Initialize k with number of samples */
+      k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
       while (k > 0U)
       {
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         sum += *px++ * *py--;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -243,10 +244,10 @@
       py = ++pSrc1;
       px = pIn1;
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blockSize1--;
     }
 
@@ -263,12 +264,13 @@
     /* Working pointer of inputA */
     if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
     {
-      px = pIn1 + firstIndex - srcBLen + 1;
+      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
     }
     else
     {
-      px = pIn1;
+      pSrc1 = pIn1;
     }
+    px = pSrc1;
 
     /* Working pointer of inputB */
     pSrc2 = pIn2 + (srcBLen - 1U);
@@ -286,7 +288,9 @@
      * srcBLen should be greater than or equal to 4 */
     if (srcBLen >= 4U)
     {
-      /* Loop unroll over blockSize2, by 4 */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
       blkCnt = ((uint32_t) blockSize2 >> 2U);
 
       while (blkCnt > 0U)
@@ -298,9 +302,9 @@
         acc3 = 0.0f;
 
         /* read x[0], x[1], x[2] samples */
-        x0 = *(px++);
-        x1 = *(px++);
-        x2 = *(px++);
+        x0 = *px++;
+        x1 = *px++;
+        x2 = *px++;
 
         /* Apply loop unrolling and compute 4 MACs simultaneously. */
         k = srcBLen >> 2U;
@@ -310,29 +314,24 @@
         do
         {
           /* Read y[srcBLen - 1] sample */
-          c0 = *(py--);
-
+          c0 = *py--;
           /* Read x[3] sample */
-          x3 = *(px++);
+          x3 = *px++;
 
           /* Perform the multiply-accumulate */
           /* acc0 +=  x[0] * y[srcBLen - 1] */
           acc0 += x0 * c0;
-
           /* acc1 +=  x[1] * y[srcBLen - 1] */
           acc1 += x1 * c0;
-
           /* acc2 +=  x[2] * y[srcBLen - 1] */
           acc2 += x2 * c0;
-
           /* acc3 +=  x[3] * y[srcBLen - 1] */
           acc3 += x3 * c0;
 
           /* Read y[srcBLen - 2] sample */
-          c0 = *(py--);
-
+          c0 = *py--;
           /* Read x[4] sample */
-          x0 = *(px++);
+          x0 = *px++;
 
           /* Perform the multiply-accumulate */
           /* acc0 +=  x[1] * y[srcBLen - 2] */
@@ -345,12 +344,11 @@
           acc3 += x0 * c0;
 
           /* Read y[srcBLen - 3] sample */
-          c0 = *(py--);
-
+          c0 = *py--;
           /* Read x[5] sample */
-          x1 = *(px++);
+          x1 = *px++;
 
-          /* Perform the multiply-accumulates */
+          /* Perform the multiply-accumulate */
           /* acc0 +=  x[2] * y[srcBLen - 3] */
           acc0 += x2 * c0;
           /* acc1 +=  x[3] * y[srcBLen - 2] */
@@ -361,12 +359,11 @@
           acc3 += x1 * c0;
 
           /* Read y[srcBLen - 4] sample */
-          c0 = *(py--);
-
+          c0 = *py--;
           /* Read x[6] sample */
-          x2 = *(px++);
+          x2 = *px++;
 
-          /* Perform the multiply-accumulates */
+          /* Perform the multiply-accumulate */
           /* acc0 +=  x[3] * y[srcBLen - 4] */
           acc0 += x3 * c0;
           /* acc1 +=  x[4] * y[srcBLen - 4] */
@@ -376,7 +373,6 @@
           /* acc3 +=  x[6] * y[srcBLen - 4] */
           acc3 += x2 * c0;
 
-
         } while (--k);
 
         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
@@ -386,10 +382,9 @@
         while (k > 0U)
         {
           /* Read y[srcBLen - 5] sample */
-          c0 = *(py--);
-
+          c0 = *py--;
           /* Read x[7] sample */
-          x3 = *(px++);
+          x3 = *px++;
 
           /* Perform the multiply-accumulates */
           /* acc0 +=  x[4] * y[srcBLen - 5] */
@@ -416,38 +411,37 @@
         *pOut++ = acc2;
         *pOut++ = acc3;
 
-        /* Increment the pointer pIn1 index, count by 1 */
+        /* Increment the pointer pIn1 index, count by 4 */
         count += 4U;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-        if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-        {
-          px = pIn1 + firstIndex - srcBLen + 1 + count;
-        }
-        else
-        {
-          px = pIn1 + count;
-        }
+        px = pSrc1 + count;
         py = pSrc2;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         blkCnt--;
       }
 
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
-       ** No loop unrolling is used. */
+      /* Loop unrolling: Compute remaining outputs */
       blkCnt = (uint32_t) blockSize2 % 0x4U;
 
+#else
+
+      /* Initialize blkCnt with number of samples */
+      blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
       while (blkCnt > 0U)
       {
         /* Accumulator is made zero for every iteration */
         sum = 0.0f;
 
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Loop unrolling: Compute 4 outputs at a time */
         k = srcBLen >> 2U;
 
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
         while (k > 0U)
         {
           /* Perform the multiply-accumulates */
@@ -456,41 +450,40 @@
           sum += *px++ * *py--;
           sum += *px++ * *py--;
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           k--;
         }
 
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-         ** No loop unrolling is used. */
+        /* Loop unrolling: Compute remaining outputs */
         k = srcBLen % 0x4U;
 
+#else
+
+        /* Initialize blkCnt with number of samples */
+        k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
         while (k > 0U)
         {
           /* Perform the multiply-accumulate */
           sum += *px++ * *py--;
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           k--;
         }
 
         /* Store the result in the accumulator in the destination buffer. */
         *pOut++ = sum;
 
-        /* Increment the MAC count */
+        /* Increment MAC count */
         count++;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-        if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-        {
-          px = pIn1 + firstIndex - srcBLen + 1 + count;
-        }
-        else
-        {
-          px = pIn1 + count;
-        }
+        px = pSrc1 + count;
         py = pSrc2;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         blkCnt--;
       }
     }
@@ -513,7 +506,7 @@
           /* Perform the multiply-accumulate */
           sum += *px++ * *py--;
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           k--;
         }
 
@@ -524,14 +517,7 @@
         count++;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-        if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-        {
-          px = pIn1 + firstIndex - srcBLen + 1 + count;
-        }
-        else
-        {
-          px = pIn1 + count;
-        }
+        px = pSrc1 + count;
         py = pSrc2;
 
         /* Decrement the loop counter */
@@ -552,7 +538,7 @@
      */
 
     /* In this stage the MAC operations are decreased by 1 for every iteration.
-       The count variable holds the number of MAC operations performed */
+       The blockSize3 variable holds the number of MAC operations performed */
     count = srcBLen - 1U;
 
     /* Working pointer of inputA */
@@ -563,16 +549,20 @@
     pSrc2 = pIn2 + (srcBLen - 1U);
     py = pSrc2;
 
-    while (blockSize3 > 0)
+    /* -------------------
+     * Stage3 process
+     * ------------------*/
+
+    while (blockSize3 > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0.0f;
 
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
       k = count >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
       while (k > 0U)
       {
         /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
@@ -587,21 +577,27 @@
         /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
         sum += *px++ * *py--;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
-      /* If the count is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
+      /* Loop unrolling: Compute remaining outputs */
       k = count % 0x4U;
 
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
       while (k > 0U)
       {
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         /* sum +=  x[srcALen-1] * y[srcBLen-1] */
         sum += *px++ * *py--;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -612,15 +608,14 @@
       px = ++pSrc1;
       py = pSrc2;
 
-      /* Decrement the MAC count */
+      /* Decrement MAC count */
       count--;
 
       /* Decrement the loop counter */
       blockSize3--;
-
     }
 
-    /* set status as ARM_MATH_SUCCESS */
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
 
@@ -628,19 +623,18 @@
   return (status);
 
 #else
+/* alternate version for CM0_FAMILY */
 
-  /* Run the below code for Cortex-M0 */
-
-  float32_t *pIn1 = pSrcA;                       /* inputA pointer */
-  float32_t *pIn2 = pSrcB;                       /* inputB pointer */
-  float32_t sum;                                 /* Accumulator */
-  uint32_t i, j;                                 /* loop counters */
-  arm_status status;                             /* status of Partial convolution */
+  const float32_t *pIn1 = pSrcA;                       /* InputA pointer */
+  const float32_t *pIn2 = pSrcB;                       /* InputB pointer */
+        float32_t sum;                                 /* Accumulator */
+        uint32_t i, j;                                 /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
 
   /* Check for range of output samples to be calculated */
   if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
   {
-    /* Set status as ARM_ARGUMENT_ERROR */
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
     status = ARM_MATH_ARGUMENT_ERROR;
   }
   else
@@ -654,25 +648,29 @@
       /* Loop to perform MAC operations according to convolution equation */
       for (j = 0U; j <= i; j++)
       {
-        /* Check the array limitations for inputs */
-        if ((((i - j) < srcBLen) && (j < srcALen)))
+        /* Check the array limitations */
+        if (((i - j) < srcBLen) && (j < srcALen))
         {
           /* z[i] += x[i-j] * y[j] */
-          sum += pIn1[j] * pIn2[i - j];
+          sum += ( pIn1[j] * pIn2[i - j]);
         }
       }
+
       /* Store the output in the destination buffer */
       pDst[i] = sum;
     }
-    /* set status as ARM_SUCCESS as there are no argument errors */
+
+    /* Set status as ARM_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
+
+  /* Return to application */
   return (status);
 
-#endif /*   #if defined (ARM_MATH_DSP) */
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
 
 }
 
 /**
- * @} end of PartialConv group
+  @} end of PartialConv group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c b/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c
index cf2d711..7166b57 100644
--- a/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_conv_partial_fast_opt_q15.c
  * Description:  Fast Q15 Partial convolution
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,63 +29,63 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup PartialConv
- * @{
+  @addtogroup PartialConv
+  @{
  */
 
 /**
- * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
- * @param[in]       *pSrcA points to the first input sequence.
- * @param[in]       srcALen length of the first input sequence.
- * @param[in]       *pSrcB points to the second input sequence.
- * @param[in]       srcBLen length of the second input sequence.
- * @param[out]      *pDst points to the location where the output result is written.
- * @param[in]       firstIndex is the first output sample to start with.
- * @param[in]       numPoints is the number of output points to be computed.
- * @param[in]       *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in]       *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- *
- * See <code>arm_conv_partial_q15()</code> for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
- *
- * \par Restrictions
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit
- *
- */
+  @brief         Partial convolution of Q15 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @param[in]     pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2
+  @param[in]     pScratch2  points to scratch buffer of size min(srcALen, srcBLen)
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
 
-#ifndef UNALIGNED_SUPPORT_DISABLE
+  @remark
+                   Refer to \ref arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
+ */
 
 arm_status arm_conv_partial_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints,
+        q15_t * pScratch1,
+        q15_t * pScratch2)
 {
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
+        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
+        q31_t acc0;                                    /* Accumulator */
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+        q15_t *py;                                     /* Intermediate inputB pointer */
+        uint32_t j, k, blkCnt;                         /* Loop counter */
+        uint32_t tapCnt;                               /* Loop count */
+        arm_status status;                             /* Status variable */
+        q31_t x1;                                      /* Temporary variables to hold state and coefficient values */
+        q31_t y1;                                      /* State variables */
 
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
-  q31_t y1, y2;                                  /* State variables */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  arm_status status;
-
-  uint32_t tapCnt;                               /* loop count */
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc1, acc2, acc3;                        /* Accumulator */
+        q31_t x2, x3;                                  /* Temporary variables to hold state and coefficient values */
+        q31_t y2;                                      /* State variables */
+#endif
 
   /* Check for range of output samples to be calculated */
   if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
@@ -95,7 +95,6 @@
   }
   else
   {
-
     /* The algorithm implementation is based on the lengths of the inputs. */
     /* srcB is always made to slide across srcA. */
     /* So srcBLen is always considered as shorter or equal to srcALen */
@@ -130,11 +129,10 @@
     /* points to smaller length sequence */
     px = pIn2;
 
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcBLen >> 2U;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-    /* First part of the processing with loop unrolling copies 4 data points at a time.
-     ** a second loop below copies for the remaining 1 to 3 samples. */
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = srcBLen >> 2U;
 
     /* Copy smaller length input sequence in reverse order into second scratch buffer */
     while (k > 0U)
@@ -145,20 +143,26 @@
       *pScr2-- = *px++;
       *pScr2-- = *px++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
-    /* If the count is not a multiple of 4, copy remaining samples here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     k = srcBLen % 0x4U;
 
+#else
+
+    /* Initialize k with number of samples */
+    k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (k > 0U)
     {
       /* copy second buffer in reversal manner for remaining samples */
       *pScr2-- = *px++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -193,10 +197,11 @@
 
     pOut = pDst + firstIndex;
 
-    /* First part of the processing with loop unrolling process 4 data points at a time.
-     ** a second loop below process for the remaining 1 to 3 samples. */
-
     /* Actual convolution process starts here */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
     blkCnt = (numPoints) >> 2;
 
     while (blkCnt > 0)
@@ -211,10 +216,10 @@
       acc3 = 0;
 
       /* Read two samples from scratch1 buffer */
-      x1 = *__SIMD32(pScr1)++;
+      x1 = read_q15x2_ia (&pScr1);
 
       /* Read next two samples from scratch1 buffer */
-      x2 = *__SIMD32(pScr1)++;
+      x2 = read_q15x2_ia (&pScr1);
 
       tapCnt = (srcBLen) >> 2U;
 
@@ -222,8 +227,8 @@
       {
 
         /* Read four samples from smaller buffer */
-        y1 = _SIMD32_OFFSET(pIn2);
-        y2 = _SIMD32_OFFSET(pIn2 + 2U);
+        y1 = read_q15x2_ia ((q15_t **) &pIn2);
+        y2 = read_q15x2_ia ((q15_t **) &pIn2);
 
         /* multiply and accumlate */
         acc0 = __SMLAD(x1, y1, acc0);
@@ -240,11 +245,10 @@
         acc1 = __SMLADX(x3, y1, acc1);
 
         /* Read next two samples from scratch1 buffer */
-        x1 = _SIMD32_OFFSET(pScr1);
+        x1 = read_q15x2_ia (&pScr1);
 
         /* multiply and accumlate */
         acc0 = __SMLAD(x2, y2, acc0);
-
         acc2 = __SMLAD(x1, y2, acc2);
 
         /* pack input data */
@@ -257,7 +261,7 @@
         acc3 = __SMLADX(x3, y1, acc3);
         acc1 = __SMLADX(x3, y2, acc1);
 
-        x2 = _SIMD32_OFFSET(pScr1 + 2U);
+        x2 = read_q15x2_ia (&pScr1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
         x3 = __PKHBT(x2, x1, 0);
@@ -265,14 +269,10 @@
         x3 = __PKHBT(x1, x2, 0);
 #endif
 
+        /* multiply and accumlate */
         acc3 = __SMLADX(x3, y2, acc3);
 
-        /* update scratch pointers */
-        pIn2 += 4U;
-        pScr1 += 4U;
-
-
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         tapCnt--;
       }
 
@@ -284,7 +284,6 @@
 
       while (tapCnt > 0U)
       {
-
         /* accumlate the results */
         acc0 += (*pScr1++ * *pIn2);
         acc1 += (*pScr1++ * *pIn2);
@@ -293,41 +292,37 @@
 
         pScr1 -= 3U;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         tapCnt--;
       }
 
       blkCnt--;
 
-
       /* Store the results in the accumulators in the destination buffer. */
-
 #ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
 #else
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
 
       /* Initialization of inputB pointer */
       pIn2 = py;
 
       pScratch1 += 4U;
-
     }
 
-
+    /* Loop unrolling: Compute remaining outputs */
     blkCnt = numPoints & 0x3;
 
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numPoints;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     /* Calculate convolution for remaining samples of Bigger length sequence */
     while (blkCnt > 0)
     {
@@ -341,16 +336,16 @@
 
       while (tapCnt > 0U)
       {
-
         /* Read next two samples from scratch1 buffer */
-        x1 = *__SIMD32(pScr1)++;
+        x1 = read_q15x2_ia (&pScr1);
 
         /* Read two samples from smaller buffer */
-        y1 = *__SIMD32(pIn2)++;
+        y1 = read_q15x2_ia ((q15_t **) &pIn2);
 
+        /* multiply and accumlate */
         acc0 = __SMLAD(x1, y1, acc0);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         tapCnt--;
       }
 
@@ -359,11 +354,10 @@
       /* apply same above for remaining samples of smaller length sequence */
       while (tapCnt > 0U)
       {
-
         /* accumlate the results */
         acc0 += (*pScr1++ * *pIn2++);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         tapCnt--;
       }
 
@@ -379,378 +373,15 @@
       pScratch1 += 1U;
 
     }
-    /* set status as ARM_MATH_SUCCESS */
+
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
-  /* Return to application */
-  return (status);
-}
-
-#else
-
-arm_status arm_conv_partial_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  arm_status status;                             /* Status variable */
-  uint32_t tapCnt;                               /* loop count */
-  q15_t x10, x11, x20, x21;                      /* Temporary variables to hold srcA buffer */
-  q15_t y10, y11;                                /* Temporary variables to hold srcB buffer */
-
-
-  /* Check for range of output samples to be calculated */
-  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if (srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2 + srcBLen - 1;
-
-    /* points to smaller length sequence */
-    px = pIn2;
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcBLen >> 2U;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.
-     ** No loop unrolling is used. */
-    k = srcBLen % 0x4U;
-
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Fill (srcBLen - 1U) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1U);
-
-    /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcALen >> 2U;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.
-     ** No loop unrolling is used. */
-    k = srcALen % 0x4U;
-
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr1++ = *pIn1++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = (srcBLen - 1U) >> 2U;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.
-     ** No loop unrolling is used. */
-    k = (srcBLen - 1U) % 0x4U;
-
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = py;
-
-    pScratch1 += firstIndex;
-
-    pOut = pDst + firstIndex;
-
-    /* Actual convolution process starts here */
-    blkCnt = (numPoints) >> 2;
-
-    while (blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x10 = *pScr1++;
-      x11 = *pScr1++;
-
-      /* Read next two samples from scratch1 buffer */
-      x20 = *pScr1++;
-      x21 = *pScr1++;
-
-      tapCnt = (srcBLen) >> 2U;
-
-      while (tapCnt > 0U)
-      {
-
-        /* Read two samples from smaller buffer */
-        y10 = *pIn2;
-        y11 = *(pIn2 + 1U);
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x10 *y10;
-        acc0 += (q31_t) x11 *y11;
-        acc2 += (q31_t) x20 *y10;
-        acc2 += (q31_t) x21 *y11;
-
-        /* multiply and accumlate */
-        acc1 += (q31_t) x11 *y10;
-        acc1 += (q31_t) x20 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1;
-        x11 = *(pScr1 + 1U);
-
-        /* multiply and accumlate */
-        acc3 += (q31_t) x21 *y10;
-        acc3 += (q31_t) x10 *y11;
-
-        /* Read next two samples from scratch2 buffer */
-        y10 = *(pIn2 + 2U);
-        y11 = *(pIn2 + 3U);
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x20 *y10;
-        acc0 += (q31_t) x21 *y11;
-        acc2 += (q31_t) x10 *y10;
-        acc2 += (q31_t) x11 *y11;
-        acc1 += (q31_t) x21 *y10;
-        acc1 += (q31_t) x10 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x20 = *(pScr1 + 2);
-        x21 = *(pScr1 + 3);
-
-        /* multiply and accumlate */
-        acc3 += (q31_t) x11 *y10;
-        acc3 += (q31_t) x20 *y11;
-
-        /* update scratch pointers */
-        pIn2 += 4U;
-        pScr1 += 4U;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4U;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3U;
-
-      while (tapCnt > 0U)
-      {
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2);
-        acc1 += (*pScr1++ * *pIn2);
-        acc2 += (*pScr1++ * *pIn2);
-        acc3 += (*pScr1++ * *pIn2++);
-
-        pScr1 -= 3U;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-
-      /* Store the results in the accumulators in the destination buffer. */
-      *pOut++ = __SSAT((acc0 >> 15), 16);
-      *pOut++ = __SSAT((acc1 >> 15), 16);
-      *pOut++ = __SSAT((acc2 >> 15), 16);
-      *pOut++ = __SSAT((acc3 >> 15), 16);
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 4U;
-
-    }
-
-
-    blkCnt = numPoints & 0x3;
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while (blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1U;
-
-      while (tapCnt > 0U)
-      {
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1++;
-        x11 = *pScr1++;
-
-        /* Read two samples from smaller buffer */
-        y10 = *pIn2++;
-        y11 = *pIn2++;
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x10 *y10;
-        acc0 += (q31_t) x11 *y11;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1U;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while (tapCnt > 0U)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2++);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 1U;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-  }
 
   /* Return to application */
   return (status);
 }
 
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
 /**
- * @} end of PartialConv group
+  @} end of PartialConv group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c b/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c
index bd43a98..535fbc7 100644
--- a/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_conv_partial_fast_q15.c
  * Description:  Fast Q15 Partial convolution
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,51 +29,50 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup PartialConv
- * @{
+  @addtogroup PartialConv
+  @{
  */
 
 /**
- * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
- * @param[in]       *pSrcA points to the first input sequence.
- * @param[in]       srcALen length of the first input sequence.
- * @param[in]       *pSrcB points to the second input sequence.
- * @param[in]       srcBLen length of the second input sequence.
- * @param[out]      *pDst points to the location where the output result is written.
- * @param[in]       firstIndex is the first output sample to start with.
- * @param[in]       numPoints is the number of output points to be computed.
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- *
- * See <code>arm_conv_partial_q15()</code> for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
+  @brief         Partial convolution of Q15 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+  @remark
+                   Refer to \ref arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
  */
 
-
 arm_status arm_conv_partial_fast_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints)
 {
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counters                 */
-  arm_status status;                             /* status of Partial convolution */
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+  const q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary input variables */
+        uint32_t j, k, count, blkCnt, check;
+        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
 
   /* Check for range of output samples to be calculated */
   if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
@@ -83,11 +82,10 @@
   }
   else
   {
-
     /* The algorithm implementation is based on the lengths of the inputs. */
     /* srcB is always made to slide across srcA. */
     /* So srcBLen is always considered as shorter or equal to srcALen */
-    if (srcALen >=srcBLen)
+    if (srcALen >= srcBLen)
     {
       /* Initialization of inputA pointer */
       pIn1 = pSrcA;
@@ -114,11 +112,9 @@
     check = firstIndex + numPoints;
     blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
     blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
-                                    (int32_t) firstIndex);
+    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
+    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
+    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
     blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
 
     /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
@@ -180,7 +176,7 @@
         /* Perform the multiply-accumulates */
         sum = __SMLAD(*px++, *py--, sum);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -191,10 +187,10 @@
       py = ++pSrc2;
       px = pIn1;
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blockSize1--;
     }
 
@@ -213,25 +209,25 @@
       k = count >> 2U;
 
       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+         a second loop below computes MACs for the remaining 1 to 3 samples. */
       while (k > 0U)
       {
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
-        sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+        sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
         /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
-        sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+        sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
       /* For the next MAC operations, the pointer py is used without SIMD
-       * So, py is incremented by 1 */
+         So, py is incremented by 1 */
       py = py + 1U;
 
       /* If the count is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
+         No loop unrolling is used. */
       k = count % 0x4U;
 
       while (k > 0U)
@@ -239,7 +235,7 @@
         /* Perform the multiply-accumulates */
         sum = __SMLAD(*px++, *py--, sum);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -250,10 +246,10 @@
       py = ++pSrc2 - 1U;
       px = pIn1;
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blockSize1--;
     }
 
@@ -270,12 +266,13 @@
     /* Working pointer of inputA */
     if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
     {
-      px = pIn1 + firstIndex - srcBLen + 1;
+      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
     }
     else
     {
-      px = pIn1;
+      pSrc1 = pIn1;
     }
+    px = pSrc1;
 
     /* Working pointer of inputB */
     pSrc2 = pIn2 + (srcBLen - 1U);
@@ -284,22 +281,21 @@
     /* count is the index by which the pointer pIn1 to be incremented */
     count = 0U;
 
-
-    /* --------------------
+    /* -------------------
      * Stage2 process
-     * -------------------*/
+     * ------------------*/
 
     /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
      * So, to loop unroll over blockSize2,
      * srcBLen should be greater than or equal to 4 */
     if (srcBLen >= 4U)
     {
-      /* Loop unroll over blockSize2, by 4 */
+      /* Loop unrolling: Compute 4 outputs at a time */
       blkCnt = ((uint32_t) blockSize2 >> 2U);
 
       while (blkCnt > 0U)
       {
-      py = py - 1U;
+        py = py - 1U;
 
         /* Set all accumulators to zero */
         acc0 = 0;
@@ -309,10 +305,10 @@
 
 
         /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
+        x0 = read_q15x2 ((q15_t *) px);
         /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px+1);
-	  px+= 2U;
+        x1 = read_q15x2 ((q15_t *) px + 1);
+        px += 2U;
 
 
         /* Apply loop unrolling and compute 4 MACs simultaneously. */
@@ -324,7 +320,7 @@
         {
           /* Read the last two inputB samples using SIMD:
            * y[srcBLen - 1] and y[srcBLen - 2] */
-        c0 = *__SIMD32(py)--;
+          c0 = read_q15x2_da ((q15_t **) &py);
 
           /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
           acc0 = __SMLADX(x0, c0, acc0);
@@ -333,10 +329,10 @@
           acc1 = __SMLADX(x1, c0, acc1);
 
           /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
+          x2 = read_q15x2 ((q15_t *) px);
 
           /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px+1);
+          x3 = read_q15x2 ((q15_t *) px + 1);
 
           /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
           acc2 = __SMLADX(x2, c0, acc2);
@@ -345,7 +341,7 @@
           acc3 = __SMLADX(x3, c0, acc3);
 
           /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-        c0 = *__SIMD32(py)--;
+          c0 = read_q15x2_da ((q15_t **) &py);
 
           /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
           acc0 = __SMLADX(x2, c0, acc0);
@@ -354,11 +350,11 @@
           acc1 = __SMLADX(x3, c0, acc1);
 
           /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px+2);
+          x0 = read_q15x2 ((q15_t *) px + 2);
 
           /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px+3);
-		px += 4U;
+          x1 = read_q15x2 ((q15_t *) px + 3);
+          px += 4U;
 
           /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
           acc2 = __SMLADX(x0, c0, acc2);
@@ -369,33 +365,29 @@
         } while (--k);
 
         /* For the next MAC operations, SIMD is not used
-         * So, the 16 bit pointer if inputB, py is updated */
+           So, the 16 bit pointer if inputB, py is updated */
 
         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-         ** No loop unrolling is used. */
+           No loop unrolling is used. */
         k = srcBLen % 0x4U;
 
         if (k == 1U)
         {
           /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
+          c0 = *(py + 1);
 #ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16U;
-
+          c0 = c0 << 16U;
 #else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
+          c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
 
           /* Read x[7] */
-        x3 = *__SIMD32(px);
-		px++;
+          x3 = read_q15x2 ((q15_t *) px);
+          px++;
 
-          /* Perform the multiply-accumulates */
-          acc0 = __SMLAD(x0, c0, acc0);
-          acc1 = __SMLAD(x1, c0, acc1);
+          /* Perform the multiply-accumulate */
+          acc0 = __SMLAD (x0, c0, acc0);
+          acc1 = __SMLAD (x1, c0, acc1);
           acc2 = __SMLADX(x1, c0, acc2);
           acc3 = __SMLADX(x3, c0, acc3);
         }
@@ -403,16 +395,16 @@
         if (k == 2U)
         {
           /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
+          c0 = read_q15x2 ((q15_t *) py);
 
           /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
+          x3 = read_q15x2 ((q15_t *) px);
 
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-		px += 2U;
+          /* Read x[9] */
+          x2 = read_q15x2 ((q15_t *) px + 1);
+          px += 2U;
 
-          /* Perform the multiply-accumulates */
+          /* Perform the multiply-accumulate */
           acc0 = __SMLADX(x0, c0, acc0);
           acc1 = __SMLADX(x1, c0, acc1);
           acc2 = __SMLADX(x3, c0, acc2);
@@ -422,58 +414,52 @@
         if (k == 3U)
         {
           /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
+          c0 = read_q15x2 ((q15_t *) py);
 
           /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
+          x3 = read_q15x2 ((q15_t *) px);
 
           /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
+          x2 = read_q15x2 ((q15_t *) px + 1);
 
-          /* Perform the multiply-accumulates */
+          /* Perform the multiply-accumulate */
           acc0 = __SMLADX(x0, c0, acc0);
           acc1 = __SMLADX(x1, c0, acc1);
           acc2 = __SMLADX(x3, c0, acc2);
           acc3 = __SMLADX(x2, c0, acc3);
 
-		c0 = *(py-1);
+          c0 = *(py-1);
 #ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16U;
+          c0 = c0 << 16U;
 #else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
+          c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
 
           /* Read x[10] */
-        x3 =  _SIMD32_OFFSET(px+2);
-		px += 3U;
+          x3 =  read_q15x2 ((q15_t *) px + 2);
+          px += 3U;
 
           /* Perform the multiply-accumulates */
           acc0 = __SMLADX(x1, c0, acc0);
-          acc1 = __SMLAD(x2, c0, acc1);
+          acc1 = __SMLAD (x2, c0, acc1);
           acc2 = __SMLADX(x2, c0, acc2);
           acc3 = __SMLADX(x3, c0, acc3);
         }
 
         /* Store the results in the accumulators in the destination buffer. */
 #ifndef ARM_MATH_BIG_ENDIAN
-
-        *__SIMD32(pOut)++ = __PKHBT(acc0 >> 15, acc1 >> 15, 16);
-        *__SIMD32(pOut)++ = __PKHBT(acc2 >> 15, acc3 >> 15, 16);
-
+        write_q15x2_ia (&pOut, __PKHBT(acc0 >> 15, acc1 >> 15, 16));
+        write_q15x2_ia (&pOut, __PKHBT(acc2 >> 15, acc3 >> 15, 16));
 #else
-
-        *__SIMD32(pOut)++ = __PKHBT(acc1 >> 15, acc0 >> 15, 16);
-        *__SIMD32(pOut)++ = __PKHBT(acc3 >> 15, acc2 >> 15, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
+        write_q15x2_ia (&pOut, __PKHBT(acc1 >> 15, acc0 >> 15, 16));
+        write_q15x2_ia (&pOut, __PKHBT(acc3 >> 15, acc2 >> 15, 16));
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
 
         /* Increment the pointer pIn1 index, count by 4 */
         count += 4U;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
+        px = pSrc1 + count;
         py = pSrc2;
 
         /* Decrement the loop counter */
@@ -481,7 +467,7 @@
       }
 
       /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
-       ** No loop unrolling is used. */
+         No loop unrolling is used. */
       blkCnt = (uint32_t) blockSize2 % 0x4U;
 
       while (blkCnt > 0U)
@@ -493,16 +479,16 @@
         k = srcBLen >> 2U;
 
         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+           a second loop below computes MACs for the remaining 1 to 3 samples. */
         while (k > 0U)
         {
           /* Perform the multiply-accumulates */
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
+          sum += ((q31_t) *px++ * *py--);
+          sum += ((q31_t) *px++ * *py--);
+          sum += ((q31_t) *px++ * *py--);
+          sum += ((q31_t) *px++ * *py--);
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           k--;
         }
 
@@ -513,7 +499,7 @@
         while (k > 0U)
         {
           /* Perform the multiply-accumulates */
-          sum += ((q31_t) * px++ * *py--);
+          sum += ((q31_t) *px++ * *py--);
 
           /* Decrement the loop counter */
           k--;
@@ -526,17 +512,10 @@
         count++;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-        if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-        {
-          px = pIn1 + firstIndex - srcBLen + 1 + count;
-        }
-        else
-        {
-          px = pIn1 + count;
-        }
+        px = pSrc1 + count;
         py = pSrc2;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         blkCnt--;
       }
     }
@@ -557,7 +536,7 @@
         while (k > 0U)
         {
           /* Perform the multiply-accumulate */
-          sum += ((q31_t) * px++ * *py--);
+          sum += ((q31_t) *px++ * *py--);
 
           /* Decrement the loop counter */
           k--;
@@ -570,14 +549,7 @@
         count++;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-        if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-        {
-          px = pIn1 + firstIndex - srcBLen + 1 + count;
-        }
-        else
-        {
-          px = pIn1 + count;
-        }
+        px = pSrc1 + count;
         py = pSrc2;
 
         /* Decrement the loop counter */
@@ -635,21 +607,21 @@
       {
         /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
          * with y[srcBLen - 1], y[srcBLen - 2] respectively */
-        sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+        sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
         /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
          * with y[srcBLen - 3], y[srcBLen - 4] respectively */
-        sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+        sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
       /* For the next MAC operations, the pointer py is used without SIMD
-       * So, py is incremented by 1 */
+         So, py is incremented by 1 */
       py = py + 1U;
 
       /* If the count is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
+         No loop unrolling is used. */
       k = count % 0x4U;
 
       while (k > 0U)
@@ -714,781 +686,15 @@
       blockSize3--;
     }
 
-    /* set status as ARM_MATH_SUCCESS */
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
 
   /* Return to application */
   return (status);
 
-#else
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counters                 */
-  arm_status status;                             /* status of Partial convolution */
-  q15_t a, b;
-
-  /* Check for range of output samples to be calculated */
-  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if (srcALen >=srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
-    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = ((int32_t) check - blockSize3) -
-      (blockSize1 + (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally
-     * divided into three stages according to the number of multiplications that has to be
-     * taken place between inputA samples and inputB samples. In the first stage of the
-     * algorithm, the multiplications increase by one for every iteration.
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.
-     * In the third stage of the algorithm, the multiplications decrease by one
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------
-     * Initializations of stage1
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]
-     * sum = x[0] * y[1] + x[1] * y[0]
-     * ....
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.
-       The count variable holds the number of MAC operations performed.
-       Since the partial convolution starts from firstIndex
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1U + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + firstIndex;
-    py = pSrc2;
-
-    /* ------------------------
-     * Stage1 process
-     * ----------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations less than 4 */
-    /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
-    /* The first part of the stage starts here */
-  while ((count < 4U) && (blockSize1 > 0))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over number of MAC operations between
-       * inputA samples and inputB samples */
-      k = count;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-      sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* The second part of the stage starts here */
-    /* The internal loop, over count, is unrolled by 4 */
-    /* To, read the last two inputB samples using SIMD:
-     * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
-    py = py - 1;
-
-  while (blockSize1 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-	py++;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = count % 0x4U;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-      sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2 - 1U;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------
-     * Initializations of stage2
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
-     * ....
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
-     */
-
-    /* Working pointer of inputA */
-    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-    {
-      px = pIn1 + firstIndex - srcBLen + 1;
-    }
-    else
-    {
-      px = pIn1;
-    }
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1U);
-    py = pSrc2;
-
-    /* count is the index by which the pointer pIn1 to be incremented */
-    count = 0U;
-
-
-    /* --------------------
-     * Stage2 process
-     * -------------------*/
-
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
-     * So, to loop unroll over blockSize2,
-     * srcBLen should be greater than or equal to 4 */
-    if (srcBLen >= 4U)
-    {
-      /* Loop unroll over blockSize2, by 4 */
-      blkCnt = ((uint32_t) blockSize2 >> 2U);
-
-      while (blkCnt > 0U)
-      {
-      py = py - 1U;
-
-        /* Set all accumulators to zero */
-        acc0 = 0;
-        acc1 = 0;
-        acc2 = 0;
-        acc3 = 0;
-
-      /* read x[0], x[1] samples */
-	  a = *px++;
-	  b = *px++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  x0 = __PKHBT(a, b, 16);
-	  a = *px;
-	  x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  x0 = __PKHBT(b, a, 16);
-	  a = *px;
-	  x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the last two inputB samples using SIMD:
-         * y[srcBLen - 1] and y[srcBLen - 2] */
-		a = *py;
-		b = *(py+1);
-		py -= 2;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-        acc0 = __SMLADX(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-        acc1 = __SMLADX(x1, c0, acc1);
-
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  x2 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x3 = __PKHBT(b, a, 16);
-
-#else
-
-	  x2 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x3 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-        acc2 = __SMLADX(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-        acc3 = __SMLADX(x3, c0, acc3);
-
-        /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-		a = *py;
-		b = *(py+1);
-		py -= 2;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-        acc0 = __SMLADX(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-        acc1 = __SMLADX(x3, c0, acc1);
-
-        /* Read x[4], x[5], x[6] */
-	  a = *(px + 2);
-	  b = *(px + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  x0 = __PKHBT(a, b, 16);
-	  a = *(px + 4);
-	  x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  x0 = __PKHBT(b, a, 16);
-	  a = *(px + 4);
-	  x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-		px += 4U;
-
-        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-        acc2 = __SMLADX(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-        acc3 = __SMLADX(x1, c0, acc3);
-
-      } while (--k);
-
-      /* For the next MAC operations, SIMD is not used
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4U;
-
-      if (k == 1U)
-      {
-        /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16U;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[7] */
-		a = *px;
-		b = *(px+1);
-		px++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		x3 = __PKHBT(a, b, 16);
-
-#else
-
- 		x3 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLADX(x1, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      if (k == 2U)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-		a = *py;
-		b = *(py+1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Read x[7], x[8], x[9] */
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  x3 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  x3 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-		px += 2U;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-      }
-
-      if (k == 3U)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-		a = *py;
-		b = *(py+1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Read x[7], x[8], x[9] */
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  x3 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  x3 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-
-        /* Read y[srcBLen - 7] */
-		c0 = *(py-1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16U;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[10] */
-		a = *(px+2);
-		b = *(px+3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		x3 = __PKHBT(a, b, 16);
-
-#else
-
- 		x3 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px += 3U;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x1, c0, acc0);
-        acc1 = __SMLAD(x2, c0, acc1);
-        acc2 = __SMLADX(x2, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      /* Store the results in the accumulators in the destination buffer. */
-	  *pOut++ = (q15_t)(acc0 >> 15);
-	  *pOut++ = (q15_t)(acc1 >> 15);
-	  *pOut++ = (q15_t)(acc2 >> 15);
-	  *pOut++ = (q15_t)(acc3 >> 15);
-
-        /* Increment the pointer pIn1 index, count by 4 */
-        count += 4U;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
-       ** No loop unrolling is used. */
-      blkCnt = (uint32_t) blockSize2 % 0x4U;
-
-      while (blkCnt > 0U)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2U;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while (k > 0U)
-        {
-          /* Perform the multiply-accumulates */
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4U;
-
-        while (k > 0U)
-        {
-          /* Perform the multiply-accumulates */
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (sum >> 15);
-
-        /* Increment the pointer pIn1 index, count by 1 */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while (blkCnt > 0U)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while (k > 0U)
-        {
-          /* Perform the multiply-accumulate */
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (sum >> 15);
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------
-     * Initializations of stage3
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
-     * ....
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
-     * sum +=  x[srcALen-1] * y[srcBLen-1]
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.
-       The count variable holds the number of MAC operations performed */
-    count = srcBLen - 1U;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1U);
-    pIn2 = pSrc2 - 1U;
-    py = pIn2;
-
-    /* -------------------
-     * Stage3 process
-     * ------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations greater than 4 */
-    /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
-    /* The first part of the stage starts here */
-    j = count >> 2U;
-
-    while ((j > 0U) && (blockSize3 > 0))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-	py++;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = count % 0x4U;
-
-      while (k > 0U)
-      {
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pIn2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-
-      j--;
-    }
-
-    /* The second part of the stage starts here */
-    /* SIMD is not used for the next MAC operations,
-     * so pointer py is updated to read only one sample at a time */
-    py = py + 1U;
-
-  while (blockSize3 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#endif /*     #ifndef UNALIGNED_SUPPORT_DISABLE      */
 }
 
 /**
- * @} end of PartialConv group
+  @} end of PartialConv group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c b/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c
index af3724d..f232d51 100644
--- a/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_conv_partial_fast_q31.c
  * Description:  Fast Q31 Partial convolution
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,50 +29,55 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup PartialConv
- * @{
+  @addtogroup PartialConv
+  @{
  */
 
 /**
- * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.
- * @param[in]       *pSrcA points to the first input sequence.
- * @param[in]       srcALen length of the first input sequence.
- * @param[in]       *pSrcB points to the second input sequence.
- * @param[in]       srcBLen length of the second input sequence.
- * @param[out]      *pDst points to the location where the output result is written.
- * @param[in]       firstIndex is the first output sample to start with.
- * @param[in]       numPoints is the number of output points to be computed.
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- *
- * \par
- * See <code>arm_conv_partial_q31()</code> for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.
+  @brief         Partial convolution of Q31 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+
+  @remark
+                   Refer to \ref arm_conv_partial_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.
  */
 
 arm_status arm_conv_partial_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints)
 {
-  q31_t *pIn1;                                   /* inputA pointer               */
-  q31_t *pIn2;                                   /* inputB pointer               */
-  q31_t *pOut = pDst;                            /* output pointer               */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q31_t x0, x1, x2, x3, c0;
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counters                 */
-  arm_status status;                             /* status of Partial convolution */
+  const q31_t *pIn1;                                   /* InputA pointer */
+  const q31_t *pIn2;                                   /* InputB pointer */
+        q31_t *pOut = pDst;                            /* Output pointer */
+  const q31_t *px;                                     /* Intermediate inputA pointer */
+  const q31_t *py;                                     /* Intermediate inputB pointer */
+  const q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q31_t sum;                                     /* Accumulators */
+        uint32_t j, k, count, check, blkCnt;
+        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
 
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
+        q31_t x0, x1, x2, x3, c0;
+#endif
 
   /* Check for range of output samples to be calculated */
   if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
@@ -82,7 +87,6 @@
   }
   else
   {
-
     /* The algorithm implementation is based on the lengths of the inputs. */
     /* srcB is always made to slide across srcA. */
     /* So srcBLen is always considered as shorter or equal to srcALen */
@@ -113,11 +117,9 @@
     check = firstIndex + numPoints;
     blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
     blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
-                                    (int32_t) firstIndex);
+    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
+    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
+    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
     blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
 
     /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
@@ -160,50 +162,56 @@
      * Stage1 process
      * ----------------------*/
 
-    /* The first loop starts here */
-    while (blockSize1 > 0)
+    /* The first stage starts here */
+    while (blockSize1 > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
       k = count >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
       while (k > 0U)
       {
         /* x[0] * y[srcBLen - 1] */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
         /* x[1] * y[srcBLen - 2] */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
         /* x[2] * y[srcBLen - 3] */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
         /* x[3] * y[srcBLen - 4] */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
-      /* If the count is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
+      /* Loop unrolling: Compute remaining outputs */
       k = count % 0x4U;
 
+#else
+
+      /* Initialize k with number of samples */
+      k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
       while (k > 0U)
       {
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -214,10 +222,10 @@
       py = ++pSrc2;
       px = pIn1;
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blockSize1--;
     }
 
@@ -234,12 +242,13 @@
     /* Working pointer of inputA */
     if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
     {
-      px = pIn1 + firstIndex - srcBLen + 1;
+      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
     }
     else
     {
-      px = pIn1;
+      pSrc1 = pIn1;
     }
+    px = pSrc1;
 
     /* Working pointer of inputB */
     pSrc2 = pIn2 + (srcBLen - 1U);
@@ -257,7 +266,9 @@
      * srcBLen should be greater than or equal to 4 */
     if (srcBLen >= 4U)
     {
-      /* Loop unroll over blockSize2 */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
       blkCnt = ((uint32_t) blockSize2 >> 2U);
 
       while (blkCnt > 0U)
@@ -269,9 +280,9 @@
         acc3 = 0;
 
         /* read x[0], x[1], x[2] samples */
-        x0 = *(px++);
-        x1 = *(px++);
-        x2 = *(px++);
+        x0 = *px++;
+        x1 = *px++;
+        x2 = *px++;
 
         /* Apply loop unrolling and compute 4 MACs simultaneously. */
         k = srcBLen >> 2U;
@@ -281,29 +292,24 @@
         do
         {
           /* Read y[srcBLen - 1] sample */
-          c0 = *(py--);
-
+          c0 = *py--;
           /* Read x[3] sample */
-          x3 = *(px++);
+          x3 = *px++;
 
           /* Perform the multiply-accumulate */
           /* acc0 +=  x[0] * y[srcBLen - 1] */
           acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
           /* acc1 +=  x[1] * y[srcBLen - 1] */
           acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
           /* acc2 +=  x[2] * y[srcBLen - 1] */
           acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-
           /* acc3 +=  x[3] * y[srcBLen - 1] */
           acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
 
           /* Read y[srcBLen - 2] sample */
-          c0 = *(py--);
-
+          c0 = *py--;
           /* Read x[4] sample */
-          x0 = *(px++);
+          x0 = *px++;
 
           /* Perform the multiply-accumulate */
           /* acc0 +=  x[1] * y[srcBLen - 2] */
@@ -316,10 +322,9 @@
           acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
 
           /* Read y[srcBLen - 3] sample */
-          c0 = *(py--);
-
+          c0 = *py--;
           /* Read x[5] sample */
-          x1 = *(px++);
+          x1 = *px++;
 
           /* Perform the multiply-accumulates */
           /* acc0 +=  x[2] * y[srcBLen - 3] */
@@ -332,10 +337,9 @@
           acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
 
           /* Read y[srcBLen - 4] sample */
-          c0 = *(py--);
-
+          c0 = *py--;
           /* Read x[6] sample */
-          x2 = *(px++);
+          x2 = *px++;
 
           /* Perform the multiply-accumulates */
           /* acc0 +=  x[3] * y[srcBLen - 4] */
@@ -347,7 +351,6 @@
           /* acc3 +=  x[6] * y[srcBLen - 4] */
           acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
 
-
         } while (--k);
 
         /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
@@ -357,10 +360,9 @@
         while (k > 0U)
         {
           /* Read y[srcBLen - 5] sample */
-          c0 = *(py--);
-
+          c0 = *py--;
           /* Read x[7] sample */
-          x3 = *(px++);
+          x3 = *px++;
 
           /* Perform the multiply-accumulates */
           /* acc0 +=  x[4] * y[srcBLen - 5] */
@@ -391,34 +393,33 @@
         count += 4U;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-        if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-        {
-          px = pIn1 + firstIndex - srcBLen + 1 + count;
-        }
-        else
-        {
-          px = pIn1 + count;
-        }
+        px = pSrc1 + count;
         py = pSrc2;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         blkCnt--;
       }
 
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
-       ** No loop unrolling is used. */
+      /* Loop unrolling: Compute remaining outputs */
       blkCnt = (uint32_t) blockSize2 % 0x4U;
 
+#else
+
+      /* Initialize blkCnt with number of samples */
+      blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
       while (blkCnt > 0U)
       {
         /* Accumulator is made zero for every iteration */
         sum = 0;
 
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Loop unrolling: Compute 4 outputs at a time */
         k = srcBLen >> 2U;
 
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
         while (k > 0U)
         {
           /* Perform the multiply-accumulates */
@@ -431,42 +432,41 @@
           sum = (q31_t) ((((q63_t) sum << 32) +
                           ((q63_t) * px++ * (*py--))) >> 32);
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           k--;
         }
 
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-         ** No loop unrolling is used. */
+        /* Loop unrolling: Compute remaining outputs */
         k = srcBLen % 0x4U;
 
+#else
+
+        /* Initialize blkCnt with number of samples */
+        k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
         while (k > 0U)
         {
           /* Perform the multiply-accumulate */
           sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) * px++ * (*py--))) >> 32);
+                          ((q63_t) *px++ * (*py--))) >> 32);
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           k--;
         }
 
         /* Store the result in the accumulator in the destination buffer. */
         *pOut++ = sum << 1;
 
-        /* Increment the MAC count */
+        /* Increment MAC count */
         count++;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-        if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-        {
-          px = pIn1 + firstIndex - srcBLen + 1 + count;
-        }
-        else
-        {
-          px = pIn1 + count;
-        }
+        px = pSrc1 + count;
         py = pSrc2;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         blkCnt--;
       }
     }
@@ -488,9 +488,9 @@
         {
           /* Perform the multiply-accumulate */
           sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) * px++ * (*py--))) >> 32);
+                          ((q63_t) *px++ * (*py--))) >> 32);
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           k--;
         }
 
@@ -501,14 +501,7 @@
         count++;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-        if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-        {
-          px = pIn1 + firstIndex - srcBLen + 1 + count;
-        }
-        else
-        {
-          px = pIn1 + count;
-        }
+        px = pSrc1 + count;
         py = pSrc2;
 
         /* Decrement the loop counter */
@@ -544,50 +537,56 @@
      * Stage3 process
      * ------------------*/
 
-    while (blockSize3 > 0)
+    while (blockSize3 > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
       k = count >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
       while (k > 0U)
       {
         /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
         /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
         /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
         /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
-      /* If the count is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
+      /* Loop unrolling: Compute remaining outputs */
       k = count % 0x4U;
 
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
       while (k > 0U)
       {
         /* Perform the multiply-accumulates */
         /* sum +=  x[srcALen-1] * y[srcBLen-1] */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -598,15 +597,14 @@
       px = ++pSrc1;
       py = pSrc2;
 
-      /* Decrement the MAC count */
+      /* Decrement MAC count */
       count--;
 
       /* Decrement the loop counter */
       blockSize3--;
-
     }
 
-    /* set status as ARM_MATH_SUCCESS */
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
 
@@ -616,5 +614,5 @@
 }
 
 /**
- * @} end of PartialConv group
+  @} end of PartialConv group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c b/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c
index 44e368e..21999d2 100644
--- a/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_conv_partial_opt_q15.c
  * Description:  Partial convolution of Q15 sequences
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,63 +29,64 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup PartialConv
- * @{
+  @addtogroup PartialConv
+  @{
  */
 
 /**
- * @brief Partial convolution of Q15 sequences.
- * @param[in]       *pSrcA points to the first input sequence.
- * @param[in]       srcALen length of the first input sequence.
- * @param[in]       *pSrcB points to the second input sequence.
- * @param[in]       srcBLen length of the second input sequence.
- * @param[out]      *pDst points to the location where the output result is written.
- * @param[in]       firstIndex is the first output sample to start with.
- * @param[in]       numPoints is the number of output points to be computed.
- * @param[in]       *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in]       *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
- * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- *
- * \par Restrictions
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- *	In this case input, output, state buffers should be aligned by 32-bit
- *
- * Refer to <code>arm_conv_partial_fast_q15()</code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.
- *
- *
- */
+  @brief         Partial convolution of Q15 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @param[in]     pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+  @param[in]     pScratch2  points to scratch buffer of size min(srcALen, srcBLen).
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
 
-#ifndef UNALIGNED_SUPPORT_DISABLE
+  @remark
+                   Refer to \ref arm_conv_partial_fast_q15() for a faster but less precise version of this function.
+ */
 
 arm_status arm_conv_partial_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints,
+        q15_t * pScratch1,
+        q15_t * pScratch2)
 {
 
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
-  q31_t y1, y2;                                  /* State variables */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  arm_status status;                             /* Status variable */
-  uint32_t tapCnt;                               /* loop count */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
+        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
+        q63_t acc0;                                    /* Accumulator */
+        q31_t x1;                                      /* Temporary variables to hold state and coefficient values */
+        q31_t y1;                                      /* State variables */
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+        q15_t *py;                                     /* Intermediate inputB pointer */
+        uint32_t j, k, blkCnt;                         /* Loop counter */
+        uint32_t tapCnt;                               /* Loop count */
+        arm_status status;                             /* Status variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc1, acc2, acc3;                        /* Accumulator */
+        q31_t x2, x3;                                  /* Temporary variables to hold state and coefficient values */
+        q31_t y2;                                      /* State variables */
+#endif
 
   /* Check for range of output samples to be calculated */
   if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
@@ -95,7 +96,6 @@
   }
   else
   {
-
     /* The algorithm implementation is based on the lengths of the inputs. */
     /* srcB is always made to slide across srcA. */
     /* So srcBLen is always considered as shorter or equal to srcALen */
@@ -130,11 +130,12 @@
     /* points to smaller length sequence */
     px = pIn2;
 
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
     k = srcBLen >> 2U;
 
-    /* First part of the processing with loop unrolling copies 4 data points at a time.
-     ** a second loop below copies for the remaining 1 to 3 samples. */
+    /* Copy smaller length input sequence in reverse order into second scratch buffer */
     while (k > 0U)
     {
       /* copy second buffer in reversal manner */
@@ -143,26 +144,33 @@
       *pScr2-- = *px++;
       *pScr2-- = *px++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
-    /* If the count is not a multiple of 4, copy remaining samples here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     k = srcBLen % 0x4U;
 
+#else
+
+    /* Initialize k with number of samples */
+    k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (k > 0U)
     {
       /* copy second buffer in reversal manner for remaining samples */
       *pScr2-- = *px++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
     /* Initialze temporary scratch pointer */
     pScr1 = pScratch1;
 
+    /* Assuming scratch1 buffer is aligned by 32-bit */
     /* Fill (srcBLen - 1U) zeros in scratch buffer */
     arm_fill_q15(0, pScr1, (srcBLen - 1U));
 
@@ -191,6 +199,10 @@
     pOut = pDst + firstIndex;
 
     /* Actual convolution process starts here */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
     blkCnt = (numPoints) >> 2;
 
     while (blkCnt > 0)
@@ -205,10 +217,10 @@
       acc3 = 0;
 
       /* Read two samples from scratch1 buffer */
-      x1 = *__SIMD32(pScr1)++;
+      x1 = read_q15x2_ia (&pScr1);
 
       /* Read next two samples from scratch1 buffer */
-      x2 = *__SIMD32(pScr1)++;
+      x2 = read_q15x2_ia (&pScr1);
 
       tapCnt = (srcBLen) >> 2U;
 
@@ -216,8 +228,8 @@
       {
 
         /* Read four samples from smaller buffer */
-        y1 = _SIMD32_OFFSET(pIn2);
-        y2 = _SIMD32_OFFSET(pIn2 + 2U);
+        y1 = read_q15x2_ia ((q15_t **) &pIn2);
+        y2 = read_q15x2_ia ((q15_t **) &pIn2);
 
         /* multiply and accumlate */
         acc0 = __SMLALD(x1, y1, acc0);
@@ -234,7 +246,7 @@
         acc1 = __SMLALDX(x3, y1, acc1);
 
         /* Read next two samples from scratch1 buffer */
-        x1 = _SIMD32_OFFSET(pScr1);
+        x1 = read_q15x2_ia (&pScr1);
 
         /* multiply and accumlate */
         acc0 = __SMLALD(x2, y2, acc0);
@@ -250,7 +262,7 @@
         acc3 = __SMLALDX(x3, y1, acc3);
         acc1 = __SMLALDX(x3, y2, acc1);
 
-        x2 = _SIMD32_OFFSET(pScr1 + 2U);
+        x2 = read_q15x2_ia (&pScr1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
         x3 = __PKHBT(x2, x1, 0);
@@ -260,12 +272,7 @@
 
         acc3 = __SMLALDX(x3, y2, acc3);
 
-        /* update scratch pointers */
-        pIn2 += 4U;
-        pScr1 += 4U;
-
-
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         tapCnt--;
       }
 
@@ -285,41 +292,37 @@
 
         pScr1 -= 3U;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         tapCnt--;
       }
 
       blkCnt--;
 
-
       /* Store the results in the accumulators in the destination buffer. */
-
 #ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
 #else
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
 
       /* Initialization of inputB pointer */
       pIn2 = py;
 
       pScratch1 += 4U;
-
     }
 
-
+    /* Loop unrolling: Compute remaining outputs */
     blkCnt = numPoints & 0x3;
 
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numPoints;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     /* Calculate convolution for remaining samples of Bigger length sequence */
     while (blkCnt > 0)
     {
@@ -333,12 +336,11 @@
 
       while (tapCnt > 0U)
       {
-
         /* Read next two samples from scratch1 buffer */
-        x1 = *__SIMD32(pScr1)++;
+        x1 = read_q15x2_ia (&pScr1);
 
         /* Read two samples from smaller buffer */
-        y1 = *__SIMD32(pIn2)++;
+        y1 = read_q15x2_ia ((q15_t **) &pIn2);
 
         acc0 = __SMLALD(x1, y1, acc0);
 
@@ -351,17 +353,17 @@
       /* apply same above for remaining samples of smaller length sequence */
       while (tapCnt > 0U)
       {
-
         /* accumlate the results */
         acc0 += (*pScr1++ * *pIn2++);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         tapCnt--;
       }
 
       blkCnt--;
 
-      /* Store the result in the accumulator in the destination buffer. */
+      /* The result is in 2.30 format.  Convert to 1.15 with saturation.
+       ** Then store the output in the destination buffer. */
       *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
 
       /* Initialization of inputB pointer */
@@ -371,383 +373,14 @@
 
     }
 
-    /* set status as ARM_MATH_SUCCESS */
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
-
   }
 
   /* Return to application */
   return (status);
 }
 
-#else
-
-arm_status arm_conv_partial_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  arm_status status;                             /* Status variable */
-  uint32_t tapCnt;                               /* loop count */
-  q15_t x10, x11, x20, x21;                      /* Temporary variables to hold srcA buffer */
-  q15_t y10, y11;                                /* Temporary variables to hold srcB buffer */
-
-
-  /* Check for range of output samples to be calculated */
-  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if (srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2 + srcBLen - 1;
-
-    /* points to smaller length sequence */
-    px = pIn2;
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcBLen >> 2U;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.
-     ** No loop unrolling is used. */
-    k = srcBLen % 0x4U;
-
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Fill (srcBLen - 1U) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1U);
-
-    /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcALen >> 2U;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.
-     ** No loop unrolling is used. */
-    k = srcALen % 0x4U;
-
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr1++ = *pIn1++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = (srcBLen - 1U) >> 2U;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.
-     ** No loop unrolling is used. */
-    k = (srcBLen - 1U) % 0x4U;
-
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = py;
-
-    pScratch1 += firstIndex;
-
-    pOut = pDst + firstIndex;
-
-    /* Actual convolution process starts here */
-    blkCnt = (numPoints) >> 2;
-
-    while (blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x10 = *pScr1++;
-      x11 = *pScr1++;
-
-      /* Read next two samples from scratch1 buffer */
-      x20 = *pScr1++;
-      x21 = *pScr1++;
-
-      tapCnt = (srcBLen) >> 2U;
-
-      while (tapCnt > 0U)
-      {
-
-        /* Read two samples from smaller buffer */
-        y10 = *pIn2;
-        y11 = *(pIn2 + 1U);
-
-        /* multiply and accumlate */
-        acc0 += (q63_t) x10 *y10;
-        acc0 += (q63_t) x11 *y11;
-        acc2 += (q63_t) x20 *y10;
-        acc2 += (q63_t) x21 *y11;
-
-        /* multiply and accumlate */
-        acc1 += (q63_t) x11 *y10;
-        acc1 += (q63_t) x20 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1;
-        x11 = *(pScr1 + 1U);
-
-        /* multiply and accumlate */
-        acc3 += (q63_t) x21 *y10;
-        acc3 += (q63_t) x10 *y11;
-
-        /* Read next two samples from scratch2 buffer */
-        y10 = *(pIn2 + 2U);
-        y11 = *(pIn2 + 3U);
-
-        /* multiply and accumlate */
-        acc0 += (q63_t) x20 *y10;
-        acc0 += (q63_t) x21 *y11;
-        acc2 += (q63_t) x10 *y10;
-        acc2 += (q63_t) x11 *y11;
-        acc1 += (q63_t) x21 *y10;
-        acc1 += (q63_t) x10 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x20 = *(pScr1 + 2);
-        x21 = *(pScr1 + 3);
-
-        /* multiply and accumlate */
-        acc3 += (q63_t) x11 *y10;
-        acc3 += (q63_t) x20 *y11;
-
-        /* update scratch pointers */
-        pIn2 += 4U;
-        pScr1 += 4U;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4U;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3U;
-
-      while (tapCnt > 0U)
-      {
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2);
-        acc1 += (*pScr1++ * *pIn2);
-        acc2 += (*pScr1++ * *pIn2);
-        acc3 += (*pScr1++ * *pIn2++);
-
-        pScr1 -= 3U;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-
-      /* Store the results in the accumulators in the destination buffer. */
-      *pOut++ = __SSAT((acc0 >> 15), 16);
-      *pOut++ = __SSAT((acc1 >> 15), 16);
-      *pOut++ = __SSAT((acc2 >> 15), 16);
-      *pOut++ = __SSAT((acc3 >> 15), 16);
-
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 4U;
-
-    }
-
-
-    blkCnt = numPoints & 0x3;
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while (blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1U;
-
-      while (tapCnt > 0U)
-      {
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1++;
-        x11 = *pScr1++;
-
-        /* Read two samples from smaller buffer */
-        y10 = *pIn2++;
-        y11 = *pIn2++;
-
-        /* multiply and accumlate */
-        acc0 += (q63_t) x10 *y10;
-        acc0 += (q63_t) x11 *y11;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1U;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while (tapCnt > 0U)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2++);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 1U;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-
 /**
- * @} end of PartialConv group
+  @} end of PartialConv group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c b/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c
index 00dbef1..811f386 100644
--- a/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c
+++ b/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_conv_partial_opt_q7.c
  * Description:  Partial convolution of Q7 sequences
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,61 +29,52 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup PartialConv
- * @{
+  @addtogroup PartialConv
+  @{
  */
 
 /**
- * @brief Partial convolution of Q7 sequences.
- * @param[in]       *pSrcA points to the first input sequence.
- * @param[in]       srcALen length of the first input sequence.
- * @param[in]       *pSrcB points to the second input sequence.
- * @param[in]       srcBLen length of the second input sequence.
- * @param[out]      *pDst points to the location where the output result is written.
- * @param[in]       firstIndex is the first output sample to start with.
- * @param[in]       numPoints is the number of output points to be computed.
- * @param[in]      *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in]      *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
- * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- *
- * \par Restrictions
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit
- *
- *
- *
+  @brief         Partial convolution of Q7 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @param[in]     pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+  @param[in]     pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
  */
 
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
 arm_status arm_conv_partial_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints,
+        q15_t * pScratch1,
+        q15_t * pScratch2)
 {
-
-  q15_t *pScr2, *pScr1;                          /* Intermediate pointers for scratch pointers */
-  q15_t x4;                                      /* Temporary input variable */
-  q7_t *pIn1, *pIn2;                             /* inputA and inputB pointer */
-  uint32_t j, k, blkCnt, tapCnt;                 /* loop counter */
-  q7_t *px;                                      /* Temporary input1 pointer */
-  q15_t *py;                                     /* Temporary input2 pointer */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q31_t x1, x2, x3, y1;                          /* Temporary input variables */
-  arm_status status;
-  q7_t *pOut = pDst;                             /* output pointer */
-  q7_t out0, out1, out2, out3;                   /* temporary variables */
+        q15_t *pScr2, *pScr1;                          /* Intermediate pointers for scratch pointers */
+        q15_t x4;                                      /* Temporary input variable */
+  const q7_t *pIn1, *pIn2;                             /* InputA and inputB pointer */
+        uint32_t j, k, blkCnt, tapCnt;                 /* Loop counter */
+  const q7_t *px;                                      /* Temporary input1 pointer */
+        q15_t *py;                                     /* Temporary input2 pointer */
+        q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
+        q31_t x1, x2, x3, y1;                          /* Temporary input variables */
+        arm_status status;
+        q7_t *pOut = pDst;                             /* Output pointer */
+        q7_t out0, out1, out2, out3;                   /* Temporary variables */
 
   /* Check for range of output samples to be calculated */
   if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
@@ -93,7 +84,6 @@
   }
   else
   {
-
     /* The algorithm implementation is based on the lengths of the inputs. */
     /* srcB is always made to slide across srcA. */
     /* So srcBLen is always considered as shorter or equal to srcALen */
@@ -133,16 +123,16 @@
     while (k > 0U)
     {
       /* copy second buffer in reversal manner */
-      x4 = (q15_t) * px--;
+      x4 = (q15_t) *px--;
       *pScr2++ = x4;
-      x4 = (q15_t) * px--;
+      x4 = (q15_t) *px--;
       *pScr2++ = x4;
-      x4 = (q15_t) * px--;
+      x4 = (q15_t) *px--;
       *pScr2++ = x4;
-      x4 = (q15_t) * px--;
+      x4 = (q15_t) *px--;
       *pScr2++ = x4;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -153,10 +143,10 @@
     while (k > 0U)
     {
       /* copy second buffer in reversal manner for remaining samples */
-      x4 = (q15_t) * px--;
+      x4 = (q15_t) *px--;
       *pScr2++ = x4;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -178,16 +168,16 @@
     while (k > 0U)
     {
       /* copy second buffer in reversal manner */
-      x4 = (q15_t) * pIn1++;
+      x4 = (q15_t) *pIn1++;
       *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
+      x4 = (q15_t) *pIn1++;
       *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
+      x4 = (q15_t) *pIn1++;
       *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
+      x4 = (q15_t) *pIn1++;
       *pScr1++ = x4;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -198,7 +188,7 @@
     while (k > 0U)
     {
       /* copy second buffer in reversal manner for remaining samples */
-      x4 = (q15_t) * pIn1++;
+      x4 = (q15_t) *pIn1++;
       *pScr1++ = x4;
 
       /* Decrement the loop counter */
@@ -227,31 +217,29 @@
     /* Actual convolution process starts here */
     blkCnt = (numPoints) >> 2;
 
-
     while (blkCnt > 0)
     {
-      /* Initialze temporary scratch pointer as scratch1 */
+      /* Initialize temporary scratch pointer as scratch1 */
       pScr1 = pScratch1;
 
-      /* Clear Accumlators */
+      /* Clear Accumulators */
       acc0 = 0;
       acc1 = 0;
       acc2 = 0;
       acc3 = 0;
 
       /* Read two samples from scratch1 buffer */
-      x1 = *__SIMD32(pScr1)++;
+      x1 = read_q15x2_ia (&pScr1);
 
       /* Read next two samples from scratch1 buffer */
-      x2 = *__SIMD32(pScr1)++;
+      x2 = read_q15x2_ia (&pScr1);
 
       tapCnt = (srcBLen) >> 2U;
 
       while (tapCnt > 0U)
       {
-
         /* Read four samples from smaller buffer */
-        y1 = _SIMD32_OFFSET(pScr2);
+        y1 = read_q15x2_ia (&pScr2);
 
         /* multiply and accumlate */
         acc0 = __SMLAD(x1, y1, acc0);
@@ -268,7 +256,7 @@
         acc1 = __SMLADX(x3, y1, acc1);
 
         /* Read next two samples from scratch1 buffer */
-        x1 = *__SIMD32(pScr1)++;
+        x1 = read_q15x2_ia (&pScr1);
 
         /* pack input data */
 #ifndef ARM_MATH_BIG_ENDIAN
@@ -280,7 +268,7 @@
         acc3 = __SMLADX(x3, y1, acc3);
 
         /* Read four samples from smaller buffer */
-        y1 = _SIMD32_OFFSET(pScr2 + 2U);
+        y1 = read_q15x2_ia (&pScr2);
 
         acc0 = __SMLAD(x2, y1, acc0);
 
@@ -288,7 +276,7 @@
 
         acc1 = __SMLADX(x3, y1, acc1);
 
-        x2 = *__SIMD32(pScr1)++;
+        x2 = read_q15x2_ia (&pScr1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
         x3 = __PKHBT(x2, x1, 0);
@@ -298,25 +286,18 @@
 
         acc3 = __SMLADX(x3, y1, acc3);
 
-        pScr2 += 4U;
-
-
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         tapCnt--;
       }
 
-
-
       /* Update scratch pointer for remaining samples of smaller length sequence */
       pScr1 -= 4U;
 
-
       /* apply same above for remaining samples of smaller length sequence */
       tapCnt = (srcBLen) & 3U;
 
       while (tapCnt > 0U)
       {
-
         /* accumlate the results */
         acc0 += (*pScr1++ * *pScr2);
         acc1 += (*pScr1++ * *pScr2);
@@ -325,7 +306,7 @@
 
         pScr1 -= 3U;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         tapCnt--;
       }
 
@@ -337,13 +318,12 @@
       out2 = (q7_t) (__SSAT(acc2 >> 7U, 8));
       out3 = (q7_t) (__SSAT(acc3 >> 7U, 8));
 
-      *__SIMD32(pOut)++ = __PACKq7(out0, out1, out2, out3);
+      write_q7x4_ia (&pOut, __PACKq7(out0, out1, out2, out3));
 
       /* Initialization of inputB pointer */
       pScr2 = py;
 
       pScratch1 += 4U;
-
     }
 
     blkCnt = (numPoints) & 0x3;
@@ -363,10 +343,10 @@
       {
 
         /* Read next two samples from scratch1 buffer */
-        x1 = *__SIMD32(pScr1)++;
+        x1 = read_q15x2_ia (&pScr1);
 
         /* Read two samples from smaller buffer */
-        y1 = *__SIMD32(pScr2)++;
+        y1 = read_q15x2_ia (&pScr2);
 
         acc0 = __SMLAD(x1, y1, acc0);
 
@@ -383,7 +363,7 @@
         /* accumlate the results */
         acc0 += (*pScr1++ * *pScr2++);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         tapCnt--;
       }
 
@@ -396,396 +376,15 @@
       pScr2 = py;
 
       pScratch1 += 1U;
-
     }
 
-    /* set status as ARM_MATH_SUCCESS */
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
-
-
   }
 
   return (status);
-
 }
 
-#else
-
-arm_status arm_conv_partial_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pScr2, *pScr1;                          /* Intermediate pointers for scratch pointers */
-  q15_t x4;                                      /* Temporary input variable */
-  q7_t *pIn1, *pIn2;                             /* inputA and inputB pointer */
-  uint32_t j, k, blkCnt, tapCnt;                 /* loop counter */
-  q7_t *px;                                      /* Temporary input1 pointer */
-  q15_t *py;                                     /* Temporary input2 pointer */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  arm_status status;
-  q7_t *pOut = pDst;                             /* output pointer */
-  q15_t x10, x11, x20, x21;                      /* Temporary input variables */
-  q15_t y10, y11;                                /* Temporary input variables */
-
-  /* Check for range of output samples to be calculated */
-  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if (srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2;
-
-    /* points to smaller length sequence */
-    px = pIn2 + srcBLen - 1;
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcBLen >> 2U;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner */
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.
-     ** No loop unrolling is used. */
-    k = srcBLen % 0x4U;
-
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Fill (srcBLen - 1U) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1U);
-
-    /* Copy (srcALen) samples in scratch buffer */
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcALen >> 2U;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner */
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.
-     ** No loop unrolling is used. */
-    k = srcALen % 0x4U;
-
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = (srcBLen - 1U) >> 2U;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.
-     ** No loop unrolling is used. */
-    k = (srcBLen - 1U) % 0x4U;
-
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = (q7_t *) py;
-
-    pScr2 = py;
-
-    pOut = pDst + firstIndex;
-
-    pScratch1 += firstIndex;
-
-    /* Actual convolution process starts here */
-    blkCnt = (numPoints) >> 2;
-
-
-    while (blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x10 = *pScr1++;
-      x11 = *pScr1++;
-
-      /* Read next two samples from scratch1 buffer */
-      x20 = *pScr1++;
-      x21 = *pScr1++;
-
-      tapCnt = (srcBLen) >> 2U;
-
-      while (tapCnt > 0U)
-      {
-
-        /* Read four samples from smaller buffer */
-        y10 = *pScr2;
-        y11 = *(pScr2 + 1U);
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x10 *y10;
-        acc0 += (q31_t) x11 *y11;
-        acc2 += (q31_t) x20 *y10;
-        acc2 += (q31_t) x21 *y11;
-
-
-        acc1 += (q31_t) x11 *y10;
-        acc1 += (q31_t) x20 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1;
-        x11 = *(pScr1 + 1U);
-
-        /* multiply and accumlate */
-        acc3 += (q31_t) x21 *y10;
-        acc3 += (q31_t) x10 *y11;
-
-        /* Read next two samples from scratch2 buffer */
-        y10 = *(pScr2 + 2U);
-        y11 = *(pScr2 + 3U);
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x20 *y10;
-        acc0 += (q31_t) x21 *y11;
-        acc2 += (q31_t) x10 *y10;
-        acc2 += (q31_t) x11 *y11;
-        acc1 += (q31_t) x21 *y10;
-        acc1 += (q31_t) x10 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x20 = *(pScr1 + 2);
-        x21 = *(pScr1 + 3);
-
-        /* multiply and accumlate */
-        acc3 += (q31_t) x11 *y10;
-        acc3 += (q31_t) x20 *y11;
-
-        /* update scratch pointers */
-
-        pScr1 += 4U;
-        pScr2 += 4U;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4U;
-
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3U;
-
-      while (tapCnt > 0U)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pScr2);
-        acc1 += (*pScr1++ * *pScr2);
-        acc2 += (*pScr1++ * *pScr2);
-        acc3 += (*pScr1++ * *pScr2++);
-
-        pScr1 -= 3U;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(acc0 >> 7U, 8));
-      *pOut++ = (q7_t) (__SSAT(acc1 >> 7U, 8));
-      *pOut++ = (q7_t) (__SSAT(acc2 >> 7U, 8));
-      *pOut++ = (q7_t) (__SSAT(acc3 >> 7U, 8));
-
-      /* Initialization of inputB pointer */
-      pScr2 = py;
-
-      pScratch1 += 4U;
-
-    }
-
-    blkCnt = (numPoints) & 0x3;
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while (blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1U;
-
-      while (tapCnt > 0U)
-      {
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1++;
-        x11 = *pScr1++;
-
-        /* Read two samples from smaller buffer */
-        y10 = *pScr2++;
-        y11 = *pScr2++;
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x10 *y10;
-        acc0 += (q31_t) x11 *y11;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1U;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while (tapCnt > 0U)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pScr2++);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(acc0 >> 7U, 8));
-
-      /* Initialization of inputB pointer */
-      pScr2 = py;
-
-      pScratch1 += 1U;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-  }
-
-  return (status);
-
-}
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-
-
 /**
- * @} end of PartialConv group
+  @} end of PartialConv group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c b/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c
index 93864b7..55272ea 100644
--- a/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_conv_partial_q15.c
  * Description:  Partial convolution of Q15 sequences
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,58 +29,56 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup PartialConv
- * @{
+  @addtogroup PartialConv
+  @{
  */
 
 /**
- * @brief Partial convolution of Q15 sequences.
- * @param[in]       *pSrcA points to the first input sequence.
- * @param[in]       srcALen length of the first input sequence.
- * @param[in]       *pSrcB points to the second input sequence.
- * @param[in]       srcBLen length of the second input sequence.
- * @param[out]      *pDst points to the location where the output result is written.
- * @param[in]       firstIndex is the first output sample to start with.
- * @param[in]       numPoints is the number of output points to be computed.
- * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- *
- * Refer to <code>arm_conv_partial_fast_q15()</code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.
- *
- * \par
- * Refer the function <code>arm_conv_partial_opt_q15()</code> for a faster implementation of this function using scratch buffers.
- *
+  @brief         Partial convolution of Q15 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+
+  @remark
+                   Refer to \ref arm_conv_partial_fast_q15() for a faster but less precise version of this function.
+  @remark
+                   Refer to \ref arm_conv_partial_opt_q15() for a faster implementation of this function using scratch buffers.
  */
 
 arm_status arm_conv_partial_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints)
 {
 
+#if defined (ARM_MATH_DSP)
 
-#if (defined(ARM_MATH_CM7) || defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulator                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary input variables */
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counter                 */
-  arm_status status;                             /* status of Partial convolution */
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+  const q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary input variables to hold state and coefficient values */
+        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
+        uint32_t j, k, count, blkCnt, check;
+        arm_status status;                             /* Status of Partial convolution */
 
   /* Check for range of output samples to be calculated */
   if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
@@ -90,7 +88,6 @@
   }
   else
   {
-
     /* The algorithm implementation is based on the lengths of the inputs. */
     /* srcB is always made to slide across srcA. */
     /* So srcBLen is always considered as shorter or equal to srcALen */
@@ -121,11 +118,9 @@
     check = firstIndex + numPoints;
     blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
     blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
-                                    (int32_t) firstIndex);
+    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
+    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
+    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
     blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
 
     /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
@@ -173,7 +168,7 @@
     /* Second part of this stage computes the MAC operations greater than or equal to 4 */
 
     /* The first part of the stage starts here */
-    while ((count < 4U) && (blockSize1 > 0))
+    while ((count < 4U) && (blockSize1 > 0U))
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
@@ -187,7 +182,7 @@
         /* Perform the multiply-accumulates */
         sum = __SMLALD(*px++, *py--, sum);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -198,10 +193,10 @@
       py = ++pSrc2;
       px = pIn1;
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blockSize1--;
     }
 
@@ -211,7 +206,7 @@
      * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
     py = py - 1;
 
-    while (blockSize1 > 0)
+    while (blockSize1 > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
@@ -220,16 +215,16 @@
       k = count >> 2U;
 
       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+         a second loop below computes MACs for the remaining 1 to 3 samples. */
       while (k > 0U)
       {
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
-        sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+        sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
         /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
-        sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+        sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -238,7 +233,7 @@
       py = py + 1U;
 
       /* If the count is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
+         No loop unrolling is used. */
       k = count % 0x4U;
 
       while (k > 0U)
@@ -246,7 +241,7 @@
         /* Perform the multiply-accumulates */
         sum = __SMLALD(*px++, *py--, sum);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -257,10 +252,10 @@
       py = ++pSrc2 - 1U;
       px = pIn1;
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blockSize1--;
     }
 
@@ -277,12 +272,13 @@
     /* Working pointer of inputA */
     if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
     {
-      px = pIn1 + firstIndex - srcBLen + 1;
+      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
     }
     else
     {
-      px = pIn1;
+      pSrc1 = pIn1;
     }
+    px = pSrc1;
 
     /* Working pointer of inputB */
     pSrc2 = pIn2 + (srcBLen - 1U);
@@ -291,219 +287,193 @@
     /* count is the index by which the pointer pIn1 to be incremented */
     count = 0U;
 
+    /* -------------------
+     * Stage2 process
+     * ------------------*/
 
-  /* --------------------
-   * Stage2 process
-   * -------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
-   * So, to loop unroll over blockSize2,
-   * srcBLen should be greater than or equal to 4 */
-  if (srcBLen >= 4U)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2U;
-
-    while (blkCnt > 0U)
+    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+     * So, to loop unroll over blockSize2,
+     * srcBLen should be greater than or equal to 4 */
+    if (srcBLen >= 4U)
     {
-      py = py - 1U;
+      /* Loop unrolling: Compute 4 outputs at a time */
+      blkCnt = ((uint32_t) blockSize2 >> 2U);
 
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-
-      /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
-      /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px+1);
-      px+= 2U;
-
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
+      while (blkCnt > 0U)
       {
-        /* Read the last two inputB samples using SIMD:
-         * y[srcBLen - 1] and y[srcBLen - 2] */
-        c0 = *__SIMD32(py)--;
+        py = py - 1U;
 
-        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-        acc0 = __SMLALDX(x0, c0, acc0);
+        /* Set all accumulators to zero */
+        acc0 = 0;
+        acc1 = 0;
+        acc2 = 0;
+        acc3 = 0;
 
-        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-        acc1 = __SMLALDX(x1, c0, acc1);
 
-        /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
-
-        /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px+1);
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-        acc2 = __SMLALDX(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-        acc3 = __SMLALDX(x3, c0, acc3);
-
-        /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-        c0 = *__SIMD32(py)--;
-
-        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-        acc0 = __SMLALDX(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-        acc1 = __SMLALDX(x3, c0, acc1);
-
-        /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px+2);
-
-        /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px+3);
-        px += 4U;
-
-        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-        acc2 = __SMLALDX(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-        acc3 = __SMLALDX(x1, c0, acc3);
-
-      } while (--k);
-
-      /* For the next MAC operations, SIMD is not used
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4U;
-
-      if (k == 1U)
-      {
-        /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16U;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[7] */
-        x3 = *__SIMD32(px);
-        px++;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALD(x0, c0, acc0);
-        acc1 = __SMLALD(x1, c0, acc1);
-        acc2 = __SMLALDX(x1, c0, acc2);
-        acc3 = __SMLALDX(x3, c0, acc3);
-      }
-
-      if (k == 2U)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
+        /* read x[0], x[1] samples */
+        x0 = read_q15x2 ((q15_t *) px);
+        /* read x[1], x[2] samples */
+        x1 = read_q15x2 ((q15_t *) px + 1);
         px += 2U;
 
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALDX(x0, c0, acc0);
-        acc1 = __SMLALDX(x1, c0, acc1);
-        acc2 = __SMLALDX(x3, c0, acc2);
-        acc3 = __SMLALDX(x2, c0, acc3);
-      }
 
-      if (k == 3U)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
+        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+        k = srcBLen >> 2U;
 
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
+        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+        do
+        {
+          /* Read the last two inputB samples using SIMD:
+           * y[srcBLen - 1] and y[srcBLen - 2] */
+          c0 = read_q15x2_da ((q15_t **) &py);
 
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
+          /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
+          acc0 = __SMLALDX(x0, c0, acc0);
 
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALDX(x0, c0, acc0);
-        acc1 = __SMLALDX(x1, c0, acc1);
-        acc2 = __SMLALDX(x3, c0, acc2);
-        acc3 = __SMLALDX(x2, c0, acc3);
+          /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
+          acc1 = __SMLALDX(x1, c0, acc1);
 
-        c0 = *(py-1);
+          /* Read x[2], x[3] */
+          x2 = read_q15x2 ((q15_t *) px);
 
+          /* Read x[3], x[4] */
+          x3 = read_q15x2 ((q15_t *) px + 1);
+
+          /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
+          acc2 = __SMLALDX(x2, c0, acc2);
+
+          /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
+          acc3 = __SMLALDX(x3, c0, acc3);
+
+          /* Read y[srcBLen - 3] and y[srcBLen - 4] */
+          c0 = read_q15x2_da ((q15_t **) &py);
+
+          /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
+          acc0 = __SMLALDX(x2, c0, acc0);
+
+          /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
+          acc1 = __SMLALDX(x3, c0, acc1);
+
+          /* Read x[4], x[5] */
+          x0 = read_q15x2 ((q15_t *) px + 2);
+
+          /* Read x[5], x[6] */
+          x1 = read_q15x2 ((q15_t *) px + 3);
+          px += 4U;
+
+          /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
+          acc2 = __SMLALDX(x0, c0, acc2);
+
+          /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
+          acc3 = __SMLALDX(x1, c0, acc3);
+
+        } while (--k);
+
+        /* For the next MAC operations, SIMD is not used
+         * So, the 16 bit pointer if inputB, py is updated */
+
+        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        k = srcBLen % 0x4U;
+
+        if (k == 1U)
+        {
+          /* Read y[srcBLen - 5] */
+          c0 = *(py+1);
 #ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16U;
+          c0 = c0 << 16U;
 #else
+          c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
 
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
+          /* Read x[7] */
+          x3 = read_q15x2 ((q15_t *) px);
+          px++;
 
-        /* Read x[10] */
-        x3 =  _SIMD32_OFFSET(px+2);
-        px += 3U;
+          /* Perform the multiply-accumulate */
+          acc0 = __SMLALD (x0, c0, acc0);
+          acc1 = __SMLALD (x1, c0, acc1);
+          acc2 = __SMLALDX(x1, c0, acc2);
+          acc3 = __SMLALDX(x3, c0, acc3);
+        }
 
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALDX(x1, c0, acc0);
-        acc1 = __SMLALD(x2, c0, acc1);
-        acc2 = __SMLALDX(x2, c0, acc2);
-        acc3 = __SMLALDX(x3, c0, acc3);
-      }
+        if (k == 2U)
+        {
+          /* Read y[srcBLen - 5], y[srcBLen - 6] */
+          c0 = read_q15x2 ((q15_t *) py);
 
+          /* Read x[7], x[8] */
+          x3 = read_q15x2 ((q15_t *) px);
 
-      /* Store the results in the accumulators in the destination buffer. */
+          /* Read x[9] */
+          x2 = read_q15x2 ((q15_t *) px + 1);
+          px += 2U;
 
-#ifndef  ARM_MATH_BIG_ENDIAN
+          /* Perform the multiply-accumulate */
+          acc0 = __SMLALDX(x0, c0, acc0);
+          acc1 = __SMLALDX(x1, c0, acc1);
+          acc2 = __SMLALDX(x3, c0, acc2);
+          acc3 = __SMLALDX(x2, c0, acc3);
+        }
 
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
+        if (k == 3U)
+        {
+          /* Read y[srcBLen - 5], y[srcBLen - 6] */
+          c0 = read_q15x2 ((q15_t *) py);
 
+          /* Read x[7], x[8] */
+          x3 = read_q15x2 ((q15_t *) px);
+
+          /* Read x[9] */
+          x2 = read_q15x2 ((q15_t *) px + 1);
+
+          /* Perform the multiply-accumulate */
+          acc0 = __SMLALDX(x0, c0, acc0);
+          acc1 = __SMLALDX(x1, c0, acc1);
+          acc2 = __SMLALDX(x3, c0, acc2);
+          acc3 = __SMLALDX(x2, c0, acc3);
+
+          c0 = *(py-1);
+#ifdef  ARM_MATH_BIG_ENDIAN
+          c0 = c0 << 16U;
 #else
+          c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
 
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
+          /* Read x[10] */
+          x3 =  read_q15x2 ((q15_t *) px + 2);
+          px += 3U;
 
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
+          /* Perform the multiply-accumulates */
+          acc0 = __SMLALDX(x1, c0, acc0);
+          acc1 = __SMLALD (x2, c0, acc1);
+          acc2 = __SMLALDX(x2, c0, acc2);
+          acc3 = __SMLALDX(x3, c0, acc3);
+        }
 
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4U;
+        /* Store the results in the accumulators in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+        write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+        write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
+#else
+        write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+        write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
 
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-      {
-        px = pIn1 + firstIndex - srcBLen + 1 + count;
-      }
-      else
-      {
-        px = pIn1 + count;
-      }
-      py = pSrc2;
+        /* Increment the pointer pIn1 index, count by 4 */
+        count += 4U;
 
-        /* Decrement the loop counter */
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement loop counter */
         blkCnt--;
       }
 
       /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
-       ** No loop unrolling is used. */
+         No loop unrolling is used. */
       blkCnt = (uint32_t) blockSize2 % 0x4U;
 
       while (blkCnt > 0U)
@@ -515,16 +485,16 @@
         k = srcBLen >> 2U;
 
         /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+           a second loop below computes MACs for the remaining 1 to 3 samples. */
         while (k > 0U)
         {
           /* Perform the multiply-accumulates */
-          sum += (q63_t) ((q31_t) * px++ * *py--);
-          sum += (q63_t) ((q31_t) * px++ * *py--);
-          sum += (q63_t) ((q31_t) * px++ * *py--);
-          sum += (q63_t) ((q31_t) * px++ * *py--);
+          sum += (q63_t) ((q31_t) *px++ * *py--);
+          sum += (q63_t) ((q31_t) *px++ * *py--);
+          sum += (q63_t) ((q31_t) *px++ * *py--);
+          sum += (q63_t) ((q31_t) *px++ * *py--);
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           k--;
         }
 
@@ -534,10 +504,10 @@
 
         while (k > 0U)
         {
-          /* Perform the multiply-accumulates */
-          sum += (q63_t) ((q31_t) * px++ * *py--);
+          /* Perform the multiply-accumulate */
+          sum += (q63_t) ((q31_t) *px++ * *py--);
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           k--;
         }
 
@@ -548,17 +518,10 @@
         count++;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-        if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-        {
-          px = pIn1 + firstIndex - srcBLen + 1 + count;
-        }
-        else
-        {
-          px = pIn1 + count;
-        }
+        px = pSrc1 + count;
         py = pSrc2;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         blkCnt--;
       }
     }
@@ -579,7 +542,7 @@
         while (k > 0U)
         {
           /* Perform the multiply-accumulate */
-          sum += (q63_t) ((q31_t) * px++ * *py--);
+          sum += (q63_t) ((q31_t) *px++ * *py--);
 
           /* Decrement the loop counter */
           k--;
@@ -592,14 +555,7 @@
         count++;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-        if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-        {
-          px = pIn1 + firstIndex - srcBLen + 1 + count;
-        }
-        else
-        {
-          px = pIn1 + count;
-        }
+        px = pSrc1 + count;
         py = pSrc2;
 
         /* Decrement the loop counter */
@@ -643,7 +599,7 @@
     /* The first part of the stage starts here */
     j = count >> 2U;
 
-    while ((j > 0U) && (blockSize3 > 0))
+    while ((j > 0U) && (blockSize3 > 0U))
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
@@ -657,12 +613,12 @@
       {
         /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
          * with y[srcBLen - 1], y[srcBLen - 2] respectively */
-        sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+        sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
         /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
          * with y[srcBLen - 3], y[srcBLen - 4] respectively */
-        sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+        sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -679,7 +635,7 @@
         /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
         sum = __SMLALD(*px++, *py--, sum);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -690,10 +646,10 @@
       px = ++pSrc1;
       py = pIn2;
 
-      /* Decrement the MAC count */
+      /* Decrement MAC count */
       count--;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blockSize3--;
 
       j--;
@@ -704,7 +660,7 @@
      * so pointer py is updated to read only one sample at a time */
     py = py + 1U;
 
-    while (blockSize3 > 0)
+    while (blockSize3 > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
@@ -718,7 +674,7 @@
         /* sum +=  x[srcALen-1] * y[srcBLen-1] */
         sum = __SMLALD(*px++, *py--, sum);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -729,34 +685,32 @@
       px = ++pSrc1;
       py = pSrc2;
 
-      /* Decrement the MAC count */
+      /* Decrement MAC count */
       count--;
 
       /* Decrement the loop counter */
       blockSize3--;
     }
 
-    /* set status as ARM_MATH_SUCCESS */
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
 
   /* Return to application */
   return (status);
 
-#else
+#else /* #if defined (ARM_MATH_DSP) */
 
-  /* Run the below code for Cortex-M0 */
-
-  q15_t *pIn1 = pSrcA;                           /* inputA pointer */
-  q15_t *pIn2 = pSrcB;                           /* inputB pointer */
-  q63_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counters */
-  arm_status status;                             /* status of Partial convolution */
+  const q15_t *pIn1 = pSrcA;                           /* InputA pointer */
+  const q15_t *pIn2 = pSrcB;                           /* InputB pointer */
+        q63_t sum;                                     /* Accumulator */
+        uint32_t i, j;                                 /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
 
   /* Check for range of output samples to be calculated */
   if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
   {
-    /* Set status as ARM_ARGUMENT_ERROR */
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
     status = ARM_MATH_ARGUMENT_ERROR;
   }
   else
@@ -768,28 +722,31 @@
       sum = 0;
 
       /* Loop to perform MAC operations according to convolution equation */
-      for (j = 0; j <= i; j++)
+      for (j = 0U; j <= i; j++)
       {
         /* Check the array limitations */
         if (((i - j) < srcBLen) && (j < srcALen))
         {
           /* z[i] += x[i-j] * y[j] */
-          sum += ((q31_t) pIn1[j] * (pIn2[i - j]));
+          sum += ((q31_t) pIn1[j] * pIn2[i - j]);
         }
       }
 
       /* Store the output in the destination buffer */
       pDst[i] = (q15_t) __SSAT((sum >> 15U), 16U);
     }
-    /* set status as ARM_SUCCESS as there are no argument errors */
+
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
+
+  /* Return to application */
   return (status);
 
-#endif /* #if (defined(ARM_MATH_CM7) || defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE) */
+#endif /* #if defined (ARM_MATH_DSP) */
 
 }
 
 /**
- * @} end of PartialConv group
+  @} end of PartialConv group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c b/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c
index 94999b9..d0f0122 100644
--- a/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_conv_partial_q31.c
  * Description:  Partial convolution of Q31 sequences
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,55 +29,59 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup PartialConv
- * @{
+  @addtogroup PartialConv
+  @{
  */
 
 /**
- * @brief Partial convolution of Q31 sequences.
- * @param[in]       *pSrcA points to the first input sequence.
- * @param[in]       srcALen length of the first input sequence.
- * @param[in]       *pSrcB points to the second input sequence.
- * @param[in]       srcBLen length of the second input sequence.
- * @param[out]      *pDst points to the location where the output result is written.
- * @param[in]       firstIndex is the first output sample to start with.
- * @param[in]       numPoints is the number of output points to be computed.
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- *
- * See <code>arm_conv_partial_fast_q31()</code> for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.
+  @brief         Partial convolution of Q31 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+
+  @remark
+                   Refer to \ref arm_conv_partial_fast_q31() for a faster but less precise implementation of this function.
  */
 
 arm_status arm_conv_partial_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints)
 {
 
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
 
-#if defined (ARM_MATH_DSP)
+  const q31_t *pIn1;                                   /* InputA pointer */
+  const q31_t *pIn2;                                   /* InputB pointer */
+        q31_t *pOut = pDst;                            /* Output pointer */
+  const q31_t *px;                                     /* Intermediate inputA pointer */
+  const q31_t *py;                                     /* Intermediate inputB pointer */
+  const q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q63_t sum;                                     /* Accumulator */
+        uint32_t j, k, count, blkCnt, check;
+        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t *pIn1;                                   /* inputA pointer               */
-  q31_t *pIn2;                                   /* inputB pointer               */
-  q31_t *pOut = pDst;                            /* output pointer               */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
-  q63_t sum, acc0, acc1, acc2;                   /* Accumulator                  */
-  q31_t x0, x1, x2, c0;
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counter                 */
-  arm_status status;                             /* status of Partial convolution */
-
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc0, acc1, acc2;                        /* Accumulator */
+        q31_t x0, x1, x2, c0;                          /* Temporary variables */
+#endif
 
   /* Check for range of output samples to be calculated */
   if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
@@ -87,7 +91,6 @@
   }
   else
   {
-
     /* The algorithm implementation is based on the lengths of the inputs. */
     /* srcB is always made to slide across srcA. */
     /* So srcBLen is always considered as shorter or equal to srcALen */
@@ -118,11 +121,9 @@
     check = firstIndex + numPoints;
     blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
     blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
-                                    (int32_t) firstIndex);
+    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
+    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
+    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
     blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
 
     /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
@@ -165,42 +166,51 @@
      * Stage1 process
      * ----------------------*/
 
-    /* The first loop starts here */
-    while (blockSize1 > 0)
+    /* The first stage starts here */
+    while (blockSize1 > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
       k = count >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
       while (k > 0U)
       {
         /* x[0] * y[srcBLen - 1] */
-        sum += (q63_t) * px++ * (*py--);
-        /* x[1] * y[srcBLen - 2] */
-        sum += (q63_t) * px++ * (*py--);
-        /* x[2] * y[srcBLen - 3] */
-        sum += (q63_t) * px++ * (*py--);
-        /* x[3] * y[srcBLen - 4] */
-        sum += (q63_t) * px++ * (*py--);
+        sum += (q63_t) *px++ * (*py--);
 
-        /* Decrement the loop counter */
+        /* x[1] * y[srcBLen - 2] */
+        sum += (q63_t) *px++ * (*py--);
+
+        /* x[2] * y[srcBLen - 3] */
+        sum += (q63_t) *px++ * (*py--);
+
+        /* x[3] * y[srcBLen - 4] */
+        sum += (q63_t) *px++ * (*py--);
+
+        /* Decrement loop counter */
         k--;
       }
 
-      /* If the count is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
+      /* Loop unrolling: Compute remaining outputs */
       k = count % 0x4U;
 
+#else
+
+      /* Initialize k with number of samples */
+      k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
       while (k > 0U)
       {
         /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py--);
+        sum += (q63_t) *px++ * (*py--);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -211,10 +221,10 @@
       py = ++pSrc2;
       px = pIn1;
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blockSize1--;
     }
 
@@ -231,12 +241,13 @@
     /* Working pointer of inputA */
     if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
     {
-      px = pIn1 + firstIndex - srcBLen + 1;
+      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
     }
     else
     {
-      px = pIn1;
+      pSrc1 = pIn1;
     }
+    px = pSrc1;
 
     /* Working pointer of inputB */
     pSrc2 = pIn2 + (srcBLen - 1U);
@@ -254,9 +265,11 @@
      * srcBLen should be greater than or equal to 4 */
     if (srcBLen >= 4U)
     {
-      /* Loop unroll over blkCnt */
+#if defined (ARM_MATH_LOOPUNROLL)
 
+      /* Loop unroll over blkCnt */
       blkCnt = blockSize2 / 3;
+
       while (blkCnt > 0U)
       {
         /* Set all accumulators to zero */
@@ -265,8 +278,8 @@
         acc2 = 0;
 
         /* read x[0], x[1] samples */
-        x0 = *(px++);
-        x1 = *(px++);
+        x0 = *px++;
+        x1 = *px++;
 
         /* Apply loop unrolling and compute 3 MACs simultaneously. */
         k = srcBLen / 3;
@@ -281,13 +294,13 @@
           /* Read x[2] sample */
           x2 = *(px);
 
-          /* Perform the multiply-accumulates */
+          /* Perform the multiply-accumulate */
           /* acc0 +=  x[0] * y[srcBLen - 1] */
-          acc0 += (q63_t) x0 *c0;
+          acc0 += (q63_t) x0 * c0;
           /* acc1 +=  x[1] * y[srcBLen - 1] */
-          acc1 += (q63_t) x1 *c0;
+          acc1 += (q63_t) x1 * c0;
           /* acc2 +=  x[2] * y[srcBLen - 1] */
-          acc2 += (q63_t) x2 *c0;
+          acc2 += (q63_t) x2 * c0;
 
           /* Read y[srcBLen - 2] sample */
           c0 = *(py - 1U);
@@ -297,11 +310,11 @@
 
           /* Perform the multiply-accumulate */
           /* acc0 +=  x[1] * y[srcBLen - 2] */
-          acc0 += (q63_t) x1 *c0;
+          acc0 += (q63_t) x1 * c0;
           /* acc1 +=  x[2] * y[srcBLen - 2] */
-          acc1 += (q63_t) x2 *c0;
+          acc1 += (q63_t) x2 * c0;
           /* acc2 +=  x[3] * y[srcBLen - 2] */
-          acc2 += (q63_t) x0 *c0;
+          acc2 += (q63_t) x0 * c0;
 
           /* Read y[srcBLen - 3] sample */
           c0 = *(py - 2U);
@@ -309,13 +322,13 @@
           /* Read x[4] sample */
           x1 = *(px + 2U);
 
-          /* Perform the multiply-accumulates */
+          /* Perform the multiply-accumulate */
           /* acc0 +=  x[2] * y[srcBLen - 3] */
-          acc0 += (q63_t) x2 *c0;
+          acc0 += (q63_t) x2 * c0;
           /* acc1 +=  x[3] * y[srcBLen - 2] */
-          acc1 += (q63_t) x0 *c0;
+          acc1 += (q63_t) x0 * c0;
           /* acc2 +=  x[4] * y[srcBLen - 2] */
-          acc2 += (q63_t) x1 *c0;
+          acc2 += (q63_t) x1 * c0;
 
 
           px += 3U;
@@ -331,18 +344,17 @@
         while (k > 0U)
         {
           /* Read y[srcBLen - 5] sample */
-          c0 = *(py--);
-
+          c0 = *py--;
           /* Read x[7] sample */
-          x2 = *(px++);
+          x2 = *px++;
 
           /* Perform the multiply-accumulates */
           /* acc0 +=  x[4] * y[srcBLen - 5] */
-          acc0 += (q63_t) x0 *c0;
+          acc0 += (q63_t) x0 * c0;
           /* acc1 +=  x[5] * y[srcBLen - 5] */
-          acc1 += (q63_t) x1 *c0;
+          acc1 += (q63_t) x1 * c0;
           /* acc2 +=  x[6] * y[srcBLen - 5] */
-          acc2 += (q63_t) x2 *c0;
+          acc2 += (q63_t) x2 * c0;
 
           /* Reuse the present samples for the next MAC */
           x0 = x1;
@@ -361,77 +373,75 @@
         count += 3U;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-        if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-        {
-          px = pIn1 + firstIndex - srcBLen + 1 + count;
-        }
-        else
-        {
-          px = pIn1 + count;
-        }
+        px = pSrc1 + count;
         py = pSrc2;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         blkCnt--;
       }
 
-      /* If the blockSize2 is not a multiple of 3, compute any remaining output samples here.
-       ** No loop unrolling is used. */
+      /* Loop unrolling: Compute remaining outputs */
       blkCnt = blockSize2 - 3 * (blockSize2 / 3);
 
+#else
+
+      /* Initialize blkCnt with number of samples */
+      blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
       while (blkCnt > 0U)
       {
         /* Accumulator is made zero for every iteration */
         sum = 0;
 
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Loop unrolling: Compute 4 outputs at a time */
         k = srcBLen >> 2U;
 
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
         while (k > 0U)
         {
           /* Perform the multiply-accumulates */
-          sum += (q63_t) * px++ * (*py--);
-          sum += (q63_t) * px++ * (*py--);
-          sum += (q63_t) * px++ * (*py--);
-          sum += (q63_t) * px++ * (*py--);
+          sum += (q63_t) *px++ * (*py--);
+          sum += (q63_t) *px++ * (*py--);
+          sum += (q63_t) *px++ * (*py--);
+          sum += (q63_t) *px++ * (*py--);
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           k--;
         }
 
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-         ** No loop unrolling is used. */
+        /* Loop unrolling: Compute remaining outputs */
         k = srcBLen % 0x4U;
 
+#else
+
+        /* Initialize blkCnt with number of samples */
+        k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
         while (k > 0U)
         {
           /* Perform the multiply-accumulate */
-          sum += (q63_t) * px++ * (*py--);
+          sum += (q63_t) *px++ * *py--;
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           k--;
         }
 
         /* Store the result in the accumulator in the destination buffer. */
         *pOut++ = (q31_t) (sum >> 31);
 
-        /* Increment the MAC count */
+        /* Increment MAC count */
         count++;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-        if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-        {
-          px = pIn1 + firstIndex - srcBLen + 1 + count;
-        }
-        else
-        {
-          px = pIn1 + count;
-        }
+        px = pSrc1 + count;
         py = pSrc2;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         blkCnt--;
       }
     }
@@ -452,9 +462,9 @@
         while (k > 0U)
         {
           /* Perform the multiply-accumulate */
-          sum += (q63_t) * px++ * (*py--);
+          sum += (q63_t) *px++ * *py--;
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           k--;
         }
 
@@ -465,14 +475,7 @@
         count++;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-        if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-        {
-          px = pIn1 + firstIndex - srcBLen + 1 + count;
-        }
-        else
-        {
-          px = pIn1 + count;
-        }
+        px = pSrc1 + count;
         py = pSrc2;
 
         /* Decrement the loop counter */
@@ -508,37 +511,51 @@
      * Stage3 process
      * ------------------*/
 
-    while (blockSize3 > 0)
+    while (blockSize3 > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
       k = count >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
       while (k > 0U)
       {
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
+        /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
+        sum += (q63_t) *px++ * *py--;
 
-        /* Decrement the loop counter */
+        /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
+        sum += (q63_t) *px++ * *py--;
+
+        /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
+        sum += (q63_t) *px++ * *py--;
+
+        /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
+        sum += (q63_t) *px++ * *py--;
+
+        /* Decrement loop counter */
         k--;
       }
 
-      /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
+      /* Loop unrolling: Compute remaining outputs */
       k = count % 0x4U;
 
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
       while (k > 0U)
       {
         /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py--);
+        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
+        sum += (q63_t) *px++ * *py--;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -549,15 +566,14 @@
       px = ++pSrc1;
       py = pSrc2;
 
-      /* Decrement the MAC count */
+      /* Decrement MAC count */
       count--;
 
       /* Decrement the loop counter */
       blockSize3--;
-
     }
 
-    /* set status as ARM_MATH_SUCCESS */
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
 
@@ -565,19 +581,18 @@
   return (status);
 
 #else
+/* alternate version for CM0_FAMILY */
 
-  /* Run the below code for Cortex-M0 */
-
-  q31_t *pIn1 = pSrcA;                           /* inputA pointer */
-  q31_t *pIn2 = pSrcB;                           /* inputB pointer */
-  q63_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counters */
-  arm_status status;                             /* status of Partial convolution */
+  const q31_t *pIn1 = pSrcA;                           /* InputA pointer */
+  const q31_t *pIn2 = pSrcB;                           /* InputB pointer */
+        q63_t sum;                                     /* Accumulator */
+        uint32_t i, j;                                 /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
 
   /* Check for range of output samples to be calculated */
   if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
   {
-    /* Set status as ARM_ARGUMENT_ERROR */
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
     status = ARM_MATH_ARGUMENT_ERROR;
   }
   else
@@ -589,28 +604,31 @@
       sum = 0;
 
       /* Loop to perform MAC operations according to convolution equation */
-      for (j = 0; j <= i; j++)
+      for (j = 0U; j <= i; j++)
       {
         /* Check the array limitations */
         if (((i - j) < srcBLen) && (j < srcALen))
         {
           /* z[i] += x[i-j] * y[j] */
-          sum += ((q63_t) pIn1[j] * (pIn2[i - j]));
+          sum += ((q63_t) pIn1[j] * pIn2[i - j]);
         }
       }
 
       /* Store the output in the destination buffer */
       pDst[i] = (q31_t) (sum >> 31U);
     }
-    /* set status as ARM_SUCCESS as there are no argument errors */
+
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
+
+  /* Return to application */
   return (status);
 
-#endif /*    #if defined (ARM_MATH_DSP)      */
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
 
 }
 
 /**
- * @} end of PartialConv group
+  @} end of PartialConv group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c b/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c
index d4e0679..9b0228c 100644
--- a/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c
+++ b/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_conv_partial_q7.c
  * Description:  Partial convolution of Q7 sequences
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,59 +29,61 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup PartialConv
- * @{
+  @addtogroup PartialConv
+  @{
  */
 
 /**
- * @brief Partial convolution of Q7 sequences.
- * @param[in]       *pSrcA points to the first input sequence.
- * @param[in]       srcALen length of the first input sequence.
- * @param[in]       *pSrcB points to the second input sequence.
- * @param[in]       srcBLen length of the second input sequence.
- * @param[out]      *pDst points to the location where the output result is written.
- * @param[in]       firstIndex is the first output sample to start with.
- * @param[in]       numPoints is the number of output points to be computed.
- * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- *
- * \par
- * Refer the function <code>arm_conv_partial_opt_q7()</code> for a faster implementation of this function.
- *
+  @brief         Partial convolution of Q7 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+
+  @remark
+                   Refer to \ref arm_conv_partial_opt_q7() for a faster implementation of this function.
  */
 
 arm_status arm_conv_partial_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints)
 {
 
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
 
-#if defined (ARM_MATH_DSP)
+  const q7_t *pIn1;                                    /* InputA pointer */
+  const q7_t *pIn2;                                    /* InputB pointer */
+        q7_t *pOut = pDst;                             /* Output pointer */
+  const q7_t *px;                                      /* Intermediate inputA pointer */
+  const q7_t *py;                                      /* Intermediate inputB pointer */
+  const q7_t *pSrc1, *pSrc2;                           /* Intermediate pointers */
+        q31_t sum;                                     /* Accumulator */
+        uint32_t j, k, count, blkCnt, check;           /* Loop counters */
+        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t *pIn1;                                    /* inputA pointer */
-  q7_t *pIn2;                                    /* inputB pointer */
-  q7_t *pOut = pDst;                             /* output pointer */
-  q7_t *px;                                      /* Intermediate inputA pointer */
-  q7_t *py;                                      /* Intermediate inputB pointer */
-  q7_t *pSrc1, *pSrc2;                           /* Intermediate pointers */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q31_t input1, input2;
-  q15_t in1, in2;
-  q7_t x0, x1, x2, x3, c0, c1;
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counter */
-  arm_status status;
-
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
+        q31_t input1, input2;                          /* Temporary input variables */
+        q15_t in1, in2;                                /* Temporary input variables */
+        q7_t x0, x1, x2, x3, c0, c1;                   /* Temporary variables to hold state and coefficient values */
+#endif
 
   /* Check for range of output samples to be calculated */
   if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
@@ -91,7 +93,6 @@
   }
   else
   {
-
     /* The algorithm implementation is based on the lengths of the inputs. */
     /* srcB is always made to slide across srcA. */
     /* So srcBLen is always considered as shorter or equal to srcALen */
@@ -122,11 +123,9 @@
     check = firstIndex + numPoints;
     blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
     blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
-                                    (int32_t) firstIndex);
+    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
+    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
+    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
     blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
 
     /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
@@ -154,7 +153,7 @@
 
     /* In this stage the MAC operations are increased by 1 for every iteration.
        The count variable holds the number of MAC operations performed.
-       Since the partial convolution starts from from firstIndex
+       Since the partial convolution starts from firstIndex
        Number of Macs to be performed is firstIndex + 1 */
     count = 1U + firstIndex;
 
@@ -170,26 +169,26 @@
      * ----------------------*/
 
     /* The first stage starts here */
-    while (blockSize1 > 0)
+    while (blockSize1 > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
       k = count >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
       while (k > 0U)
       {
         /* x[0] , x[1] */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
         /* y[srcBLen - 1] , y[srcBLen - 2] */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
+        in1 = (q15_t) *py--;
+        in2 = (q15_t) *py--;
         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
         /* x[0] * y[srcBLen - 1] */
@@ -197,33 +196,39 @@
         sum = __SMLAD(input1, input2, sum);
 
         /* x[2] , x[3] */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
         /* y[srcBLen - 3] , y[srcBLen - 4] */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
+        in1 = (q15_t) *py--;
+        in2 = (q15_t) *py--;
         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
         /* x[2] * y[srcBLen - 3] */
         /* x[3] * y[srcBLen - 4] */
         sum = __SMLAD(input1, input2, sum);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
-      /* If the count is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
+      /* Loop unrolling: Compute remaining outputs */
       k = count % 0x4U;
 
+#else
+
+      /* Initialize k with number of samples */
+      k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
       while (k > 0U)
       {
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         sum += ((q31_t) * px++ * *py--);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -234,10 +239,10 @@
       py = ++pSrc2;
       px = pIn1;
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blockSize1--;
     }
 
@@ -254,18 +259,19 @@
     /* Working pointer of inputA */
     if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
     {
-      px = pIn1 + firstIndex - srcBLen + 1;
+      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
     }
     else
     {
-      px = pIn1;
+      pSrc1 = pIn1;
     }
+    px = pSrc1;
 
     /* Working pointer of inputB */
     pSrc2 = pIn2 + (srcBLen - 1U);
     py = pSrc2;
 
-    /* count is index by which the pointer pIn1 to be incremented */
+    /* count is the index by which the pointer pIn1 to be incremented */
     count = 0U;
 
     /* -------------------
@@ -277,7 +283,9 @@
      * srcBLen should be greater than or equal to 4 */
     if (srcBLen >= 4U)
     {
-      /* Loop unroll over blockSize2, by 4 */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
       blkCnt = ((uint32_t) blockSize2 >> 2U);
 
       while (blkCnt > 0U)
@@ -289,9 +297,9 @@
         acc3 = 0;
 
         /* read x[0], x[1], x[2] samples */
-        x0 = *(px++);
-        x1 = *(px++);
-        x2 = *(px++);
+        x0 = *px++;
+        x1 = *px++;
+        x2 = *px++;
 
         /* Apply loop unrolling and compute 4 MACs simultaneously. */
         k = srcBLen >> 2U;
@@ -301,12 +309,12 @@
         do
         {
           /* Read y[srcBLen - 1] sample */
-          c0 = *(py--);
+          c0 = *py--;
           /* Read y[srcBLen - 2] sample */
-          c1 = *(py--);
+          c1 = *py--;
 
           /* Read x[3] sample */
-          x3 = *(px++);
+          x3 = *px++;
 
           /* x[0] and x[1] are packed */
           in1 = (q15_t) x0;
@@ -342,7 +350,7 @@
           acc2 = __SMLAD(input1, input2, acc2);
 
           /* Read x[4] sample */
-          x0 = *(px++);
+          x0 = *px++;
 
           /* x[3] and x[4] are packed */
           in1 = (q15_t) x3;
@@ -354,12 +362,12 @@
           acc3 = __SMLAD(input1, input2, acc3);
 
           /* Read y[srcBLen - 3] sample */
-          c0 = *(py--);
+          c0 = *py--;
           /* Read y[srcBLen - 4] sample */
-          c1 = *(py--);
+          c1 = *py--;
 
           /* Read x[5] sample */
-          x1 = *(px++);
+          x1 = *px++;
 
           /* x[2] and x[3] are packed */
           in1 = (q15_t) x2;
@@ -395,7 +403,7 @@
           acc2 = __SMLAD(input1, input2, acc2);
 
           /* Read x[6] sample */
-          x2 = *(px++);
+          x2 = *px++;
 
           /* x[5] and x[6] are packed */
           in1 = (q15_t) x1;
@@ -415,10 +423,9 @@
         while (k > 0U)
         {
           /* Read y[srcBLen - 5] sample */
-          c0 = *(py--);
-
+          c0 = *py--;
           /* Read x[7] sample */
-          x3 = *(px++);
+          x3 = *px++;
 
           /* Perform the multiply-accumulates */
           /* acc0 +=  x[4] * y[srcBLen - 5] */
@@ -449,78 +456,81 @@
         count += 4U;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-        if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-        {
-          px = pIn1 + firstIndex - srcBLen + 1 + count;
-        }
-        else
-        {
-          px = pIn1 + count;
-        }
+        px = pSrc1 + count;
         py = pSrc2;
 
-
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         blkCnt--;
       }
 
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
-       ** No loop unrolling is used. */
+      /* Loop unrolling: Compute remaining outputs */
       blkCnt = (uint32_t) blockSize2 % 0x4U;
 
+#else
+
+      /* Initialize blkCnt with number of samples */
+      blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
       while (blkCnt > 0U)
       {
         /* Accumulator is made zero for every iteration */
         sum = 0;
 
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Loop unrolling: Compute 4 outputs at a time */
         k = srcBLen >> 2U;
 
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
         while (k > 0U)
         {
-
           /* Reading two inputs of SrcA buffer and packing */
-          in1 = (q15_t) * px++;
-          in2 = (q15_t) * px++;
+          in1 = (q15_t) *px++;
+          in2 = (q15_t) *px++;
           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
           /* Reading two inputs of SrcB buffer and packing */
-          in1 = (q15_t) * py--;
-          in2 = (q15_t) * py--;
+          in1 = (q15_t) *py--;
+          in2 = (q15_t) *py--;
           input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
-          /* Perform the multiply-accumulates */
+          /* Perform the multiply-accumulate */
           sum = __SMLAD(input1, input2, sum);
 
           /* Reading two inputs of SrcA buffer and packing */
-          in1 = (q15_t) * px++;
-          in2 = (q15_t) * px++;
+          in1 = (q15_t) *px++;
+          in2 = (q15_t) *px++;
           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
           /* Reading two inputs of SrcB buffer and packing */
-          in1 = (q15_t) * py--;
-          in2 = (q15_t) * py--;
+          in1 = (q15_t) *py--;
+          in2 = (q15_t) *py--;
           input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
-          /* Perform the multiply-accumulates */
+          /* Perform the multiply-accumulate */
           sum = __SMLAD(input1, input2, sum);
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           k--;
         }
 
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-         ** No loop unrolling is used. */
+        /* Loop unrolling: Compute remaining outputs */
         k = srcBLen % 0x4U;
 
+#else
+
+        /* Initialize blkCnt with number of samples */
+        k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
         while (k > 0U)
         {
-          /* Perform the multiply-accumulates */
+          /* Perform the multiply-accumulate */
           sum += ((q31_t) * px++ * *py--);
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           k--;
         }
 
@@ -528,20 +538,13 @@
         *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
 
         /* Increment the pointer pIn1 index, count by 1 */
- 	    count++;
+        count++;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-        if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-        {
-          px = pIn1 + firstIndex - srcBLen + 1 + count;
-        }
-        else
-        {
-          px = pIn1 + count;
-        }
+        px = pSrc1 + count;
         py = pSrc2;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         blkCnt--;
       }
     }
@@ -564,7 +567,7 @@
           /* Perform the multiply-accumulate */
           sum += ((q31_t) * px++ * *py--);
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           k--;
         }
 
@@ -575,14 +578,7 @@
         count++;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-        if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-        {
-          px = pIn1 + firstIndex - srcBLen + 1 + count;
-        }
-        else
-        {
-          px = pIn1 + count;
-        }
+        px = pSrc1 + count;
         py = pSrc2;
 
         /* Decrement the loop counter */
@@ -618,26 +614,26 @@
      * Stage3 process
      * ------------------*/
 
-    while (blockSize3 > 0)
+    while (blockSize3 > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
       k = count >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
       while (k > 0U)
       {
         /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
         /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
+        in1 = (q15_t) *py--;
+        in2 = (q15_t) *py--;
         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
         /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
@@ -645,34 +641,40 @@
         sum = __SMLAD(input1, input2, sum);
 
         /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
         /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
+        in1 = (q15_t) *py--;
+        in2 = (q15_t) *py--;
         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
         /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
         /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
         sum = __SMLAD(input1, input2, sum);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
-      /* If the count is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
+      /* Loop unrolling: Compute remaining outputs */
       k = count % 0x4U;
 
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
       while (k > 0U)
       {
         /* Perform the multiply-accumulates */
         /* sum +=  x[srcALen-1] * y[srcBLen-1] */
         sum += ((q31_t) * px++ * *py--);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -683,15 +685,14 @@
       px = ++pSrc1;
       py = pSrc2;
 
-      /* Decrement the MAC count */
+      /* Decrement MAC count */
       count--;
 
       /* Decrement the loop counter */
       blockSize3--;
-
     }
 
-    /* set status as ARM_MATH_SUCCESS */
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
 
@@ -699,19 +700,18 @@
   return (status);
 
 #else
+/* alternate version for CM0_FAMILY */
 
-  /* Run the below code for Cortex-M0 */
-
-  q7_t *pIn1 = pSrcA;                            /* inputA pointer */
-  q7_t *pIn2 = pSrcB;                            /* inputB pointer */
-  q31_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counters */
-  arm_status status;                             /* status of Partial convolution */
+  const q7_t *pIn1 = pSrcA;                            /* InputA pointer */
+  const q7_t *pIn2 = pSrcB;                            /* InputB pointer */
+        q31_t sum;                                     /* Accumulator */
+        uint32_t i, j;                                 /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
 
   /* Check for range of output samples to be calculated */
   if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
   {
-    /* Set status as ARM_ARGUMENT_ERROR */
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
     status = ARM_MATH_ARGUMENT_ERROR;
   }
   else
@@ -723,7 +723,7 @@
       sum = 0;
 
       /* Loop to perform MAC operations according to convolution equation */
-      for (j = 0; j <= i; j++)
+      for (j = 0U; j <= i; j++)
       {
         /* Check the array limitations */
         if (((i - j) < srcBLen) && (j < srcALen))
@@ -736,15 +736,18 @@
       /* Store the output in the destination buffer */
       pDst[i] = (q7_t) __SSAT((sum >> 7U), 8U);
     }
-    /* set status as ARM_SUCCESS as there are no argument errors */
+
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
+
+  /* Return to application */
   return (status);
 
-#endif /*  #if defined (ARM_MATH_DSP) */
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
 
 }
 
 /**
- * @} end of PartialConv group
+  @} end of PartialConv group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_conv_q15.c b/DSP/Source/FilteringFunctions/arm_conv_q15.c
index 29513fd..ad2b629 100644
--- a/DSP/Source/FilteringFunctions/arm_conv_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_conv_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_conv_q15.c
  * Description:  Convolution of Q15 sequences
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,62 +29,56 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup Conv
- * @{
+  @addtogroup Conv
+  @{
  */
 
 /**
- * @brief Convolution of Q15 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * Both inputs are in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
- * This approach provides 33 guard bits and there is no risk of overflow.
- * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
- *
- * \par
- * Refer to <code>arm_conv_fast_q15()</code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.
- *
- * \par
- * Refer the function <code>arm_conv_opt_q15()</code> for a faster implementation of this function using scratch buffers.
- *
+  @brief         Convolution of Q15 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both inputs are in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   This approach provides 33 guard bits and there is no risk of overflow.
+                   The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
+
+  @remark
+                   Refer to \ref arm_conv_fast_q15() for a faster but less precise version of this function.
+  @remark
+                   Refer to \ref arm_conv_opt_q15() for a faster implementation of this function using scratch buffers.
  */
 
 void arm_conv_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst)
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst)
 {
 
-#if (defined(ARM_MATH_CM7) || defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE)
+#if defined (ARM_MATH_DSP)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *pOut = pDst;                            /* output pointer */
-  q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
-  uint32_t blockSize1, blockSize2, blockSize3, j, k, count, blkCnt;     /* loop counter */
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+  const q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary input variables to hold state and coefficient values */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -145,7 +139,6 @@
   /* Working pointer of inputB */
   py = pIn2;
 
-
   /* ------------------------
    * Stage1 process
    * ----------------------*/
@@ -169,7 +162,7 @@
       /* Perform the multiply-accumulates */
       sum = __SMLALD(*px++, *py--, sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -180,10 +173,10 @@
     py = pIn2 + count;
     px = pIn1;
 
-    /* Increment the MAC count */
+    /* Increment MAC count */
     count++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize1--;
   }
 
@@ -205,13 +198,13 @@
      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
     while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
+      /* Perform the multiply-accumulate */
       /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
-      sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+      sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
       /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
-      sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+      sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -225,10 +218,10 @@
 
     while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
+      /* Perform the multiply-accumulate */
       sum = __SMLALD(*px++, *py--, sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -239,10 +232,10 @@
     py = pIn2 + (count - 1U);
     px = pIn1;
 
-    /* Increment the MAC count */
+    /* Increment MAC count */
     count++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize1--;
   }
 
@@ -266,17 +259,16 @@
   /* count is the index by which the pointer pIn1 to be incremented */
   count = 0U;
 
-
-  /* --------------------
+  /* -------------------
    * Stage2 process
-   * -------------------*/
+   * ------------------*/
 
   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
    * So, to loop unroll over blockSize2,
    * srcBLen should be greater than or equal to 4 */
   if (srcBLen >= 4U)
   {
-    /* Loop unroll over blockSize2, by 4 */
+    /* Loop unrolling: Compute 4 outputs at a time */
     blkCnt = blockSize2 >> 2U;
 
     while (blkCnt > 0U)
@@ -289,13 +281,12 @@
       acc2 = 0;
       acc3 = 0;
 
-
       /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
-      /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px+1);
-      px+= 2U;
+      x0 = read_q15x2 ((q15_t *) px);
 
+      /* read x[1], x[2] samples */
+      x1 = read_q15x2 ((q15_t *) px + 1);
+      px += 2U;
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
       k = srcBLen >> 2U;
@@ -306,7 +297,7 @@
       {
         /* Read the last two inputB samples using SIMD:
          * y[srcBLen - 1] and y[srcBLen - 2] */
-        c0 = *__SIMD32(py)--;
+        c0 = read_q15x2_da ((q15_t **) &py);
 
         /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
         acc0 = __SMLALDX(x0, c0, acc0);
@@ -315,10 +306,10 @@
         acc1 = __SMLALDX(x1, c0, acc1);
 
         /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
+        x2 = read_q15x2 ((q15_t *) px);
 
         /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px+1);
+        x3 = read_q15x2 ((q15_t *) px + 1);
 
         /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
         acc2 = __SMLALDX(x2, c0, acc2);
@@ -327,7 +318,7 @@
         acc3 = __SMLALDX(x3, c0, acc3);
 
         /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-        c0 = *__SIMD32(py)--;
+        c0 = read_q15x2_da ((q15_t **) &py);
 
         /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
         acc0 = __SMLALDX(x2, c0, acc0);
@@ -336,10 +327,11 @@
         acc1 = __SMLALDX(x3, c0, acc1);
 
         /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px+2);
+        x0 = read_q15x2 ((q15_t *) px + 2);
 
         /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px+3);
+        x1 = read_q15x2 ((q15_t *) px + 3);
+
         px += 4U;
 
         /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
@@ -360,22 +352,18 @@
       if (k == 1U)
       {
         /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
-
+        c0 = *(py + 1);
 #ifdef  ARM_MATH_BIG_ENDIAN
-
         c0 = c0 << 16U;
-
 #else
-
         c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
 
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
         /* Read x[7] */
-        x3 = *__SIMD32(px);
+        x3 = read_q15x2 ((q15_t *) px);
         px++;
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         acc0 = __SMLALD(x0, c0, acc0);
         acc1 = __SMLALD(x1, c0, acc1);
         acc2 = __SMLALDX(x1, c0, acc2);
@@ -385,16 +373,16 @@
       if (k == 2U)
       {
         /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
+        c0 = read_q15x2 ((q15_t *) py);
 
         /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
+        x3 = read_q15x2 ((q15_t *) px);
 
         /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
+        x2 = read_q15x2 ((q15_t *) px + 1);
         px += 2U;
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         acc0 = __SMLALDX(x0, c0, acc0);
         acc1 = __SMLALDX(x1, c0, acc1);
         acc2 = __SMLALDX(x3, c0, acc2);
@@ -404,31 +392,29 @@
       if (k == 3U)
       {
         /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
+        c0 = read_q15x2 ((q15_t *) py);
 
         /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
+        x3 = read_q15x2 ((q15_t *) px);
 
         /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
+        x2 = read_q15x2 ((q15_t *) px + 1);
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         acc0 = __SMLALDX(x0, c0, acc0);
         acc1 = __SMLALDX(x1, c0, acc1);
         acc2 = __SMLALDX(x3, c0, acc2);
         acc3 = __SMLALDX(x2, c0, acc3);
 
         c0 = *(py-1);
-
 #ifdef  ARM_MATH_BIG_ENDIAN
-
         c0 = c0 << 16U;
 #else
-
         c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
         /* Read x[10] */
-        x3 =  _SIMD32_OFFSET(px+2);
+        x3 =  read_q15x2 ((q15_t *) px + 2);
         px += 3U;
 
         /* Perform the multiply-accumulates */
@@ -438,23 +424,13 @@
         acc3 = __SMLALDX(x3, c0, acc3);
       }
 
-
-      /* Store the results in the accumulators in the destination buffer. */
-
+      /* Store the result in the accumulator in the destination buffer. */
 #ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
 #else
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
 
       /* Increment the pointer pIn1 index, count by 4 */
@@ -464,7 +440,7 @@
       px = pIn1 + count;
       py = pSrc2;
 
-       /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
@@ -485,12 +461,12 @@
       while (k > 0U)
       {
         /* Perform the multiply-accumulates */
-        sum += (q63_t) ((q31_t) * px++ * *py--);
-        sum += (q63_t) ((q31_t) * px++ * *py--);
-        sum += (q63_t) ((q31_t) * px++ * *py--);
-        sum += (q63_t) ((q31_t) * px++ * *py--);
+        sum += (q63_t) ((q31_t) *px++ * *py--);
+        sum += (q63_t) ((q31_t) *px++ * *py--);
+        sum += (q63_t) ((q31_t) *px++ * *py--);
+        sum += (q63_t) ((q31_t) *px++ * *py--);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -501,7 +477,7 @@
       while (k > 0U)
       {
         /* Perform the multiply-accumulates */
-        sum += (q63_t) ((q31_t) * px++ * *py--);
+        sum += (q63_t) ((q31_t) *px++ * *py--);
 
         /* Decrement the loop counter */
         k--;
@@ -538,7 +514,7 @@
       while (k > 0U)
       {
         /* Perform the multiply-accumulate */
-        sum += (q63_t) ((q31_t) * px++ * *py--);
+        sum += (q63_t) ((q31_t) *px++ * *py--);
 
         /* Decrement the loop counter */
         k--;
@@ -573,7 +549,6 @@
 
   /* In this stage the MAC operations are decreased by 1 for every iteration.
      The blockSize3 variable holds the number of MAC operations performed */
-
   blockSize3 = srcBLen - 1U;
 
   /* Working pointer of inputA */
@@ -608,14 +583,15 @@
      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
     while (k > 0U)
     {
+      /* Perform the multiply-accumulate */
       /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
        * with y[srcBLen - 1], y[srcBLen - 2] respectively */
-      sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+      sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
       /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
        * with y[srcBLen - 3], y[srcBLen - 4] respectively */
-      sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+      sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -632,7 +608,7 @@
       /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
       sum = __SMLALD(*px++, *py--, sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -643,7 +619,7 @@
     px = ++pSrc1;
     py = pIn2;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize3--;
 
     j--;
@@ -668,7 +644,7 @@
       /* sum +=  x[srcALen-1] * y[srcBLen-1] */
       sum = __SMLALD(*px++, *py--, sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -679,33 +655,31 @@
     px = ++pSrc1;
     py = pSrc2;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize3--;
   }
 
-#else
+#else /* #if defined (ARM_MATH_DSP) */
 
-/* Run the below code for Cortex-M0 */
+  const q15_t *pIn1 = pSrcA;                           /* InputA pointer */
+  const q15_t *pIn2 = pSrcB;                           /* InputB pointer */
+        q63_t sum;                                     /* Accumulator */
+        uint32_t i, j;                                 /* Loop counters */
 
-  q15_t *pIn1 = pSrcA;                           /* input pointer */
-  q15_t *pIn2 = pSrcB;                           /* coefficient pointer */
-  q63_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counter */
-
-  /* Loop to calculate output of convolution for output length number of times */
+  /* Loop to calculate convolution for output length number of values */
   for (i = 0; i < (srcALen + srcBLen - 1); i++)
   {
     /* Initialize sum with zero to carry on MAC operations */
     sum = 0;
 
     /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0; j <= i; j++)
+    for (j = 0U; j <= i; j++)
     {
       /* Check the array limitations */
       if (((i - j) < srcBLen) && (j < srcALen))
       {
         /* z[i] += x[i-j] * y[j] */
-        sum += (q31_t) pIn1[j] * (pIn2[i - j]);
+        sum += ((q31_t) pIn1[j] * pIn2[i - j]);
       }
     }
 
@@ -713,10 +687,10 @@
     pDst[i] = (q15_t) __SSAT((sum >> 15U), 16U);
   }
 
-#endif /* #if (defined(ARM_MATH_CM7) || defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE) */
+#endif /* #if defined (ARM_MATH_DSP) */
 
 }
 
 /**
- * @} end of Conv group
+  @} end of Conv group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_conv_q31.c b/DSP/Source/FilteringFunctions/arm_conv_q31.c
index 78e50f0..39550ec 100644
--- a/DSP/Source/FilteringFunctions/arm_conv_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_conv_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_conv_q31.c
  * Description:  Convolution of Q31 sequences
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,63 +29,62 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup Conv
- * @{
+  @addtogroup Conv
+  @{
  */
 
 /**
- * @brief Convolution of Q31 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * There is no saturation on intermediate additions.
- * Thus, if the accumulator overflows it wraps around and distorts the result.
- * The input signals should be scaled down to avoid intermediate overflows.
- * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
- * as maximum of min(srcALen, srcBLen) number of additions are carried internally.
- * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
- *
- * \par
- * See <code>arm_conv_fast_q31()</code> for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.
+  @brief         Convolution of Q31 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   There is no saturation on intermediate additions.
+                   Thus, if the accumulator overflows it wraps around and distorts the result.
+                   The input signals should be scaled down to avoid intermediate overflows.
+                   Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
+                   as maximum of min(srcALen, srcBLen) number of additions are carried internally.
+                   The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
+
+  @remark
+                   Refer to \ref arm_conv_fast_q31() for a faster but less precise implementation of this function.
  */
 
 void arm_conv_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst)
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst)
 {
 
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
 
-#if defined (ARM_MATH_DSP)
+  const q31_t *pIn1;                                   /* InputA pointer */
+  const q31_t *pIn2;                                   /* InputB pointer */
+        q31_t *pOut = pDst;                            /* Output pointer */
+  const q31_t *px;                                     /* Intermediate inputA pointer */
+  const q31_t *py;                                     /* Intermediate inputB pointer */
+  const q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q63_t sum;                                     /* Accumulators */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t *pIn1;                                   /* inputA pointer */
-  q31_t *pIn2;                                   /* inputB pointer */
-  q31_t *pOut = pDst;                            /* output pointer */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-  q63_t sum;                                     /* Accumulator */
-  q63_t acc0, acc1, acc2;                        /* Accumulator */
-  q31_t x0, x1, x2, c0;                          /* Temporary variables to hold state and coefficient values */
-  uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc0, acc1, acc2;                        /* Accumulators */
+        q31_t x0, x1, x2, c0;                          /* Temporary variables to hold state and coefficient values */
+#endif
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -101,10 +100,10 @@
   else
   {
     /* Initialization of inputA pointer */
-    pIn1 = (q31_t *) pSrcB;
+    pIn1 = pSrcB;
 
     /* Initialization of inputB pointer */
-    pIn2 = (q31_t *) pSrcA;
+    pIn2 = pSrcA;
 
     /* srcBLen is always considered as shorter or equal to srcALen */
     j = srcBLen;
@@ -158,36 +157,45 @@
     /* Accumulator is made zero for every iteration */
     sum = 0;
 
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
     k = count >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
     while (k > 0U)
     {
       /* x[0] * y[srcBLen - 1] */
-      sum += (q63_t) * px++ * (*py--);
-      /* x[1] * y[srcBLen - 2] */
-      sum += (q63_t) * px++ * (*py--);
-      /* x[2] * y[srcBLen - 3] */
-      sum += (q63_t) * px++ * (*py--);
-      /* x[3] * y[srcBLen - 4] */
-      sum += (q63_t) * px++ * (*py--);
+      sum += (q63_t) *px++ * (*py--);
 
-      /* Decrement the loop counter */
+      /* x[1] * y[srcBLen - 2] */
+      sum += (q63_t) *px++ * (*py--);
+
+      /* x[2] * y[srcBLen - 3] */
+      sum += (q63_t) *px++ * (*py--);
+
+      /* x[3] * y[srcBLen - 4] */
+      sum += (q63_t) *px++ * (*py--);
+
+      /* Decrement loop counter */
       k--;
     }
 
-    /* If the count is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     k = count % 0x4U;
 
+#else
+
+    /* Initialize k with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (k > 0U)
     {
       /* Perform the multiply-accumulate */
-      sum += (q63_t) * px++ * (*py--);
+      sum += (q63_t) *px++ * *py--;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -198,10 +206,10 @@
     py = pIn2 + count;
     px = pIn1;
 
-    /* Increment the MAC count */
+    /* Increment MAC count */
     count++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize1--;
   }
 
@@ -210,7 +218,7 @@
    * ------------------------*/
 
   /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen]   * y[0]
    * ....
    * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
    */
@@ -234,6 +242,8 @@
    * srcBLen should be greater than or equal to 4 */
   if (srcBLen >= 4U)
   {
+#if defined (ARM_MATH_LOOPUNROLL)
+
     /* Loop unroll by 3 */
     blkCnt = blockSize2 / 3;
 
@@ -245,8 +255,8 @@
       acc2 = 0;
 
       /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
+      x0 = *px++;
+      x1 = *px++;
 
       /* Apply loop unrolling and compute 3 MACs simultaneously. */
       k = srcBLen / 3;
@@ -257,11 +267,10 @@
       {
         /* Read y[srcBLen - 1] sample */
         c0 = *(py);
-
         /* Read x[3] sample */
         x2 = *(px);
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         /* acc0 +=  x[0] * y[srcBLen - 1] */
         acc0 += ((q63_t) x0 * c0);
         /* acc1 +=  x[1] * y[srcBLen - 1] */
@@ -271,7 +280,6 @@
 
         /* Read y[srcBLen - 2] sample */
         c0 = *(py - 1U);
-
         /* Read x[4] sample */
         x0 = *(px + 1U);
 
@@ -285,11 +293,10 @@
 
         /* Read y[srcBLen - 3] sample */
         c0 = *(py - 2U);
-
         /* Read x[5] sample */
         x1 = *(px + 2U);
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         /* acc0 +=  x[2] * y[srcBLen - 3] */
         acc0 += ((q63_t) x2 * c0);
         /* acc1 +=  x[3] * y[srcBLen - 2] */
@@ -310,10 +317,9 @@
       while (k > 0U)
       {
         /* Read y[srcBLen - 5] sample */
-        c0 = *(py--);
-
+        c0 = *py--;
         /* Read x[7] sample */
-        x2 = *(px++);
+        x2 = *px++;
 
         /* Perform the multiply-accumulates */
         /* acc0 +=  x[4] * y[srcBLen - 5] */
@@ -327,11 +333,11 @@
         x0 = x1;
         x1 = x2;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
-      /* Store the results in the accumulators in the destination buffer. */
+      /* Store the result in the accumulator in the destination buffer. */
       *pOut++ = (q31_t) (acc0 >> 31);
       *pOut++ = (q31_t) (acc1 >> 31);
       *pOut++ = (q31_t) (acc2 >> 31);
@@ -343,44 +349,56 @@
       px = pIn1 + count;
       py = pSrc2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
-    /* If the blockSize2 is not a multiple of 3, compute any remaining output samples here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     blkCnt = blockSize2 - 3 * (blockSize2 / 3);
 
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (blkCnt > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
       k = srcBLen >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
       while (k > 0U)
       {
         /* Perform the multiply-accumulates */
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
+        sum += (q63_t) *px++ * *py--;
+        sum += (q63_t) *px++ * *py--;
+        sum += (q63_t) *px++ * *py--;
+        sum += (q63_t) *px++ * *py--;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
+      /* Loop unrolling: Compute remaining outputs */
       k = srcBLen % 0x4U;
 
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
       while (k > 0U)
       {
         /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py--);
+        sum += (q63_t) *px++ * *py--;
 
         /* Decrement the loop counter */
         k--;
@@ -389,14 +407,14 @@
       /* Store the result in the accumulator in the destination buffer. */
       *pOut++ = (q31_t) (sum >> 31);
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;
       py = pSrc2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
@@ -417,7 +435,7 @@
       while (k > 0U)
       {
         /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py--);
+        sum += (q63_t) *px++ * *py--;
 
         /* Decrement the loop counter */
         k--;
@@ -426,14 +444,14 @@
       /* Store the result in the accumulator in the destination buffer. */
       *pOut++ = (q31_t) (sum >> 31);
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;
       py = pSrc2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
@@ -470,36 +488,47 @@
     /* Accumulator is made zero for every iteration */
     sum = 0;
 
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
     k = blockSize3 >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-      sum += (q63_t) * px++ * (*py--);
-      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-      sum += (q63_t) * px++ * (*py--);
-      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-      sum += (q63_t) * px++ * (*py--);
-      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-      sum += (q63_t) * px++ * (*py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4U;
-
     while (k > 0U)
     {
       /* Perform the multiply-accumulate */
-      sum += (q63_t) * px++ * (*py--);
+      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
+      sum += (q63_t) *px++ * *py--;
 
-      /* Decrement the loop counter */
+      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
+      sum += (q63_t) *px++ * *py--;
+
+      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
+      sum += (q63_t) *px++ * *py--;
+
+      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
+      sum += (q63_t) *px++ * *py--;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = blockSize3 % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    k = blockSize3;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
+      sum += (q63_t) *px++ * *py--;
+
+      /* Decrement loop counter */
       k--;
     }
 
@@ -510,33 +539,32 @@
     px = ++pSrc1;
     py = pSrc2;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize3--;
   }
 
 #else
+/* alternate version for CM0_FAMILY */
 
-  /* Run the below code for Cortex-M0 */
+  const q31_t *pIn1 = pSrcA;                           /* InputA pointer */
+  const q31_t *pIn2 = pSrcB;                           /* InputB pointer */
+        q63_t sum;                                     /* Accumulators */
+        uint32_t i, j;                                 /* Loop counters */
 
-  q31_t *pIn1 = pSrcA;                           /* input pointer */
-  q31_t *pIn2 = pSrcB;                           /* coefficient pointer */
-  q63_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counter */
-
-  /* Loop to calculate output of convolution for output length number of times */
-  for (i = 0; i < (srcALen + srcBLen - 1); i++)
+  /* Loop to calculate convolution for output length number of times */
+  for (i = 0U; i < (srcALen + srcBLen - 1U); i++)
   {
-    /* Initialize sum with zero to carry on MAC operations */
+    /* Initialize sum with zero to carry out MAC operations */
     sum = 0;
 
     /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0; j <= i; j++)
+    for (j = 0U; j <= i; j++)
     {
       /* Check the array limitations */
       if (((i - j) < srcBLen) && (j < srcALen))
       {
         /* z[i] += x[i-j] * y[j] */
-        sum += ((q63_t) pIn1[j] * (pIn2[i - j]));
+        sum += ((q63_t) pIn1[j] * pIn2[i - j]);
       }
     }
 
@@ -544,10 +572,10 @@
     pDst[i] = (q31_t) (sum >> 31U);
   }
 
-#endif /*     #if defined (ARM_MATH_DSP) */
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
 
 }
 
 /**
- * @} end of Conv group
+  @} end of Conv group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_conv_q7.c b/DSP/Source/FilteringFunctions/arm_conv_q7.c
index 9e5a79b..bdd1cab 100644
--- a/DSP/Source/FilteringFunctions/arm_conv_q7.c
+++ b/DSP/Source/FilteringFunctions/arm_conv_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_conv_q7.c
  * Description:  Convolution of Q7 sequences
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,62 +29,60 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup Conv
- * @{
+  @addtogroup Conv
+  @{
  */
 
 /**
- * @brief Convolution of Q7 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 32-bit internal accumulator.
- * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
- * This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
- * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.
- *
- * \par
- * Refer the function <code>arm_conv_opt_q7()</code> for a faster implementation of this function.
- *
+  @brief         Convolution of Q7 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
+                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+                   This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
+                   The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.
+  @remark
+                   Refer to \ref arm_conv_opt_q7() for a faster implementation of this function.
  */
 
 void arm_conv_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst)
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst)
 {
 
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
 
-#if defined (ARM_MATH_DSP)
+  const q7_t *pIn1;                                    /* InputA pointer */
+  const q7_t *pIn2;                                    /* InputB pointer */
+        q7_t *pOut = pDst;                             /* Output pointer */
+  const q7_t *px;                                      /* Intermediate inputA pointer */
+  const q7_t *py;                                      /* Intermediate inputB pointer */
+  const q7_t *pSrc1, *pSrc2;                           /* Intermediate pointers */
+        q31_t sum;                                     /* Accumulators */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t *pIn1;                                    /* inputA pointer */
-  q7_t *pIn2;                                    /* inputB pointer */
-  q7_t *pOut = pDst;                             /* output pointer */
-  q7_t *px;                                      /* Intermediate inputA pointer */
-  q7_t *py;                                      /* Intermediate inputB pointer */
-  q7_t *pSrc1, *pSrc2;                           /* Intermediate pointers */
-  q7_t x0, x1, x2, x3, c0, c1;                   /* Temporary variables to hold state and coefficient values */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q31_t input1, input2;                          /* Temporary input variables */
-  q15_t in1, in2;                                /* Temporary input variables */
-  uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
+        q31_t input1, input2;                          /* Temporary input variables */
+        q15_t in1, in2;                                /* Temporary input variables */
+        q7_t x0, x1, x2, x3, c0, c1;                   /* Temporary variables to hold state and coefficient values */
+#endif
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -123,7 +121,7 @@
   /* The algorithm is implemented in three stages.
      The loop counters of each stage is initiated here. */
   blockSize1 = srcBLen - 1U;
-  blockSize2 = (srcALen - srcBLen) + 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
   blockSize3 = blockSize1;
 
   /* --------------------------
@@ -157,21 +155,21 @@
     /* Accumulator is made zero for every iteration */
     sum = 0;
 
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
     k = count >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
     while (k > 0U)
     {
       /* x[0] , x[1] */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
       /* y[srcBLen - 1] , y[srcBLen - 2] */
-      in1 = (q15_t) * py--;
-      in2 = (q15_t) * py--;
+      in1 = (q15_t) *py--;
+      in2 = (q15_t) *py--;
       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
       /* x[0] * y[srcBLen - 1] */
@@ -179,33 +177,39 @@
       sum = __SMLAD(input1, input2, sum);
 
       /* x[2] , x[3] */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
       /* y[srcBLen - 3] , y[srcBLen - 4] */
-      in1 = (q15_t) * py--;
-      in2 = (q15_t) * py--;
+      in1 = (q15_t) *py--;
+      in2 = (q15_t) *py--;
       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
       /* x[2] * y[srcBLen - 3] */
       /* x[3] * y[srcBLen - 4] */
       sum = __SMLAD(input1, input2, sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
-    /* If the count is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     k = count % 0x4U;
 
+#else
+
+    /* Initialize k with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
-      sum += ((q15_t) * px++ * *py--);
+      /* Perform the multiply-accumulate */
+      sum += ((q15_t) *px++ * *py--);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -216,10 +220,10 @@
     py = pIn2 + count;
     px = pIn1;
 
-    /* Increment the MAC count */
+    /* Increment MAC count */
     count++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize1--;
   }
 
@@ -228,7 +232,7 @@
    * ------------------------*/
 
   /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen]   * y[0]
    * ....
    * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
    */
@@ -252,7 +256,9 @@
    * srcBLen should be greater than or equal to 4 */
   if (srcBLen >= 4U)
   {
-    /* Loop unroll over blockSize2, by 4 */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
     blkCnt = blockSize2 >> 2U;
 
     while (blkCnt > 0U)
@@ -264,9 +270,9 @@
       acc3 = 0;
 
       /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-      x2 = *(px++);
+      x0 = *px++;
+      x1 = *px++;
+      x2 = *px++;
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
       k = srcBLen >> 2U;
@@ -276,12 +282,12 @@
       do
       {
         /* Read y[srcBLen - 1] sample */
-        c0 = *(py--);
+        c0 = *py--;
         /* Read y[srcBLen - 2] sample */
-        c1 = *(py--);
+        c1 = *py--;
 
         /* Read x[3] sample */
-        x3 = *(px++);
+        x3 = *px++;
 
         /* x[0] and x[1] are packed */
         in1 = (q15_t) x0;
@@ -317,7 +323,7 @@
         acc2 = __SMLAD(input1, input2, acc2);
 
         /* Read x[4] sample */
-        x0 = *(px++);
+        x0 = *px++;
 
         /* x[3] and x[4] are packed */
         in1 = (q15_t) x3;
@@ -329,12 +335,12 @@
         acc3 = __SMLAD(input1, input2, acc3);
 
         /* Read y[srcBLen - 3] sample */
-        c0 = *(py--);
+        c0 = *py--;
         /* Read y[srcBLen - 4] sample */
-        c1 = *(py--);
+        c1 = *py--;
 
         /* Read x[5] sample */
-        x1 = *(px++);
+        x1 = *px++;
 
         /* x[2] and x[3] are packed */
         in1 = (q15_t) x2;
@@ -370,7 +376,7 @@
         acc2 = __SMLAD(input1, input2, acc2);
 
         /* Read x[6] sample */
-        x2 = *(px++);
+        x2 = *px++;
 
         /* x[5] and x[6] are packed */
         in1 = (q15_t) x1;
@@ -390,10 +396,9 @@
       while (k > 0U)
       {
         /* Read y[srcBLen - 5] sample */
-        c0 = *(py--);
-
+        c0 = *py--;
         /* Read x[7] sample */
-        x3 = *(px++);
+        x3 = *px++;
 
         /* Perform the multiply-accumulates */
         /* acc0 +=  x[4] * y[srcBLen - 5] */
@@ -410,11 +415,10 @@
         x1 = x2;
         x2 = x3;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
-
       /* Store the result in the accumulator in the destination buffer. */
       *pOut++ = (q7_t) (__SSAT(acc0 >> 7U, 8));
       *pOut++ = (q7_t) (__SSAT(acc1 >> 7U, 8));
@@ -428,65 +432,77 @@
       px = pIn1 + count;
       py = pSrc2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     blkCnt = blockSize2 % 0x4U;
 
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (blkCnt > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
       k = srcBLen >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
       while (k > 0U)
       {
 
         /* Reading two inputs of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* Reading two inputs of SrcB buffer and packing */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
+        in1 = (q15_t) *py--;
+        in2 = (q15_t) *py--;
         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         sum = __SMLAD(input1, input2, sum);
 
         /* Reading two inputs of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* Reading two inputs of SrcB buffer and packing */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
+        in1 = (q15_t) *py--;
+        in2 = (q15_t) *py--;
         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         sum = __SMLAD(input1, input2, sum);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
+      /* Loop unrolling: Compute remaining outputs */
       k = srcBLen % 0x4U;
 
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
       while (k > 0U)
       {
-        /* Perform the multiply-accumulates */
-        sum += ((q15_t) * px++ * *py--);
+        /* Perform the multiply-accumulate */
+        sum += ((q15_t) *px++ * *py--);
 
         /* Decrement the loop counter */
         k--;
@@ -523,7 +539,7 @@
       while (k > 0U)
       {
         /* Perform the multiply-accumulate */
-        sum += ((q15_t) * px++ * *py--);
+        sum += ((q15_t) *px++ * *py--);
 
         /* Decrement the loop counter */
         k--;
@@ -539,7 +555,7 @@
       px = pIn1 + count;
       py = pSrc2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
@@ -576,21 +592,21 @@
     /* Accumulator is made zero for every iteration */
     sum = 0;
 
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
     k = blockSize3 >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
     while (k > 0U)
     {
       /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer and packing */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
       /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */
-      in1 = (q15_t) * py--;
-      in2 = (q15_t) * py--;
+      in1 = (q15_t) *py--;
+      in2 = (q15_t) *py--;
       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
       /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
@@ -598,33 +614,40 @@
       sum = __SMLAD(input1, input2, sum);
 
       /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer and packing */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
       /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */
-      in1 = (q15_t) * py--;
-      in2 = (q15_t) * py--;
+      in1 = (q15_t) *py--;
+      in2 = (q15_t) *py--;
       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
       /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
       /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
       sum = __SMLAD(input1, input2, sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     k = blockSize3 % 0x4U;
 
+#else
+
+    /* Initialize blkCnt with number of samples */
+    k = blockSize3;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
-      sum += ((q15_t) * px++ * *py--);
+      /* Perform the multiply-accumulate */
+      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
+      sum += ((q15_t) *px++ * *py--);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -635,33 +658,32 @@
     px = ++pSrc1;
     py = pSrc2;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize3--;
   }
 
 #else
+/* alternate version for CM0_FAMILY */
 
-  /* Run the below code for Cortex-M0 */
+  const q7_t *pIn1 = pSrcA;                            /* InputA pointer */
+  const q7_t *pIn2 = pSrcB;                            /* InputB pointer */
+        q31_t sum;                                     /* Accumulator */
+        uint32_t i, j;                                 /* Loop counters */
 
-  q7_t *pIn1 = pSrcA;                            /* input pointer */
-  q7_t *pIn2 = pSrcB;                            /* coefficient pointer */
-  q31_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counter */
-
-  /* Loop to calculate output of convolution for output length number of times */
-  for (i = 0; i < (srcALen + srcBLen - 1); i++)
+  /* Loop to calculate convolution for output length number of times */
+  for (i = 0U; i < (srcALen + srcBLen - 1U); i++)
   {
-    /* Initialize sum with zero to carry on MAC operations */
+    /* Initialize sum with zero to carry out MAC operations */
     sum = 0;
 
     /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0; j <= i; j++)
+    for (j = 0U; j <= i; j++)
     {
       /* Check the array limitations */
       if (((i - j) < srcBLen) && (j < srcALen))
       {
         /* z[i] += x[i-j] * y[j] */
-        sum += (q15_t) pIn1[j] * (pIn2[i - j]);
+        sum += ((q15_t) pIn1[j] * pIn2[i - j]);
       }
     }
 
@@ -669,10 +691,10 @@
     pDst[i] = (q7_t) __SSAT((sum >> 7U), 8U);
   }
 
-#endif /*   #if defined (ARM_MATH_DSP)        */
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
 
 }
 
 /**
- * @} end of Conv group
+  @} end of Conv group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_correlate_f32.c b/DSP/Source/FilteringFunctions/arm_correlate_f32.c
index 12031f1..1096526 100644
--- a/DSP/Source/FilteringFunctions/arm_correlate_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_correlate_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_correlate_f32.c
  * Description:  Correlation of floating-point sequences
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,102 +29,97 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @defgroup Corr Correlation
- *
- * Correlation is a mathematical operation that is similar to convolution.
- * As with convolution, correlation uses two signals to produce a third signal.
- * The underlying algorithms in correlation and convolution are identical except that one of the inputs is flipped in convolution.
- * Correlation is commonly used to measure the similarity between two signals.
- * It has applications in pattern recognition, cryptanalysis, and searching.
- * The CMSIS library provides correlation functions for Q7, Q15, Q31 and floating-point data types.
- * Fast versions of the Q15 and Q31 functions are also provided.
- *
- * \par Algorithm
- * Let <code>a[n]</code> and <code>b[n]</code> be sequences of length <code>srcALen</code> and <code>srcBLen</code> samples respectively.
- * The convolution of the two signals is denoted by
- * <pre>
- *                   c[n] = a[n] * b[n]
- * </pre>
- * In correlation, one of the signals is flipped in time
- * <pre>
- *                   c[n] = a[n] * b[-n]
- * </pre>
- *
- * \par
- * and this is mathematically defined as
- * \image html CorrelateEquation.gif
- * \par
- * The <code>pSrcA</code> points to the first input vector of length <code>srcALen</code> and <code>pSrcB</code> points to the second input vector of length <code>srcBLen</code>.
- * The result <code>c[n]</code> is of length <code>2 * max(srcALen, srcBLen) - 1</code> and is defined over the interval <code>n=0, 1, 2, ..., (2 * max(srcALen, srcBLen) - 2)</code>.
- * The output result is written to <code>pDst</code> and the calling function must allocate <code>2 * max(srcALen, srcBLen) - 1</code> words for the result.
- *
- * <b>Note</b>
- * \par
- * The <code>pDst</code> should be initialized to all zeros before being used.
- *
- * <b>Fixed-Point Behavior</b>
- * \par
- * Correlation requires summing up a large number of intermediate products.
- * As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation.
- * Refer to the function specific documentation below for further details of the particular algorithm used.
- *
- *
- * <b>Fast Versions</b>
- *
- * \par
- * Fast versions are supported for Q31 and Q15.  Cycles for Fast versions are less compared to Q31 and Q15 of correlate and the design requires
- * the input signals should be scaled down to avoid intermediate overflows.
- *
- *
- * <b>Opt Versions</b>
- *
- * \par
- * Opt versions are supported for Q15 and Q7.  Design uses internal scratch buffer for getting good optimisation.
- * These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions of correlate
+  @defgroup Corr Correlation
+
+  Correlation is a mathematical operation that is similar to convolution.
+  As with convolution, correlation uses two signals to produce a third signal.
+  The underlying algorithms in correlation and convolution are identical except that one of the inputs is flipped in convolution.
+  Correlation is commonly used to measure the similarity between two signals.
+  It has applications in pattern recognition, cryptanalysis, and searching.
+  The CMSIS library provides correlation functions for Q7, Q15, Q31 and floating-point data types.
+  Fast versions of the Q15 and Q31 functions are also provided.
+
+  @par           Algorithm
+                   Let <code>a[n]</code> and <code>b[n]</code> be sequences of length <code>srcALen</code> and <code>srcBLen</code> samples respectively.
+                   The convolution of the two signals is denoted by
+  <pre>
+      c[n] = a[n] * b[n]
+  </pre>
+                   In correlation, one of the signals is flipped in time
+  <pre>
+       c[n] = a[n] * b[-n]
+  </pre>
+  @par
+                   and this is mathematically defined as
+                   \image html CorrelateEquation.gif
+  @par
+                   The <code>pSrcA</code> points to the first input vector of length <code>srcALen</code> and <code>pSrcB</code> points to the second input vector of length <code>srcBLen</code>.
+                   The result <code>c[n]</code> is of length <code>2 * max(srcALen, srcBLen) - 1</code> and is defined over the interval <code>n=0, 1, 2, ..., (2 * max(srcALen, srcBLen) - 2)</code>.
+                   The output result is written to <code>pDst</code> and the calling function must allocate <code>2 * max(srcALen, srcBLen) - 1</code> words for the result.
+
+  @note
+                   The <code>pDst</code> should be initialized to all zeros before being used.
+
+  @par           Fixed-Point Behavior
+                   Correlation requires summing up a large number of intermediate products.
+                   As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation.
+                   Refer to the function specific documentation below for further details of the particular algorithm used.
+
+  @par           Fast Versions
+                   Fast versions are supported for Q31 and Q15.  Cycles for Fast versions are less compared to Q31 and Q15 of correlate and the design requires
+                   the input signals should be scaled down to avoid intermediate overflows.
+
+  @par           Opt Versions
+                   Opt versions are supported for Q15 and Q7.  Design uses internal scratch buffer for getting good optimisation.
+                   These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions of correlate
  */
 
 /**
- * @addtogroup Corr
- * @{
+  @addtogroup Corr
+  @{
  */
+
 /**
- * @brief Correlation of floating-point sequences.
- * @param[in]  *pSrcA points to the first input sequence.
- * @param[in]  srcALen length of the first input sequence.
- * @param[in]  *pSrcB points to the second input sequence.
- * @param[in]  srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
- * @return none.
+  @brief         Correlation of floating-point sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
  */
 
 void arm_correlate_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst)
+  const float32_t * pSrcA,
+        uint32_t srcALen,
+  const float32_t * pSrcB,
+        uint32_t srcBLen,
+        float32_t * pDst)
 {
 
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+  
+  const float32_t *pIn1;                               /* InputA pointer */
+  const float32_t *pIn2;                               /* InputB pointer */
+        float32_t *pOut = pDst;                        /* Output pointer */
+  const float32_t *px;                                 /* Intermediate inputA pointer */
+  const float32_t *py;                                 /* Intermediate inputB pointer */
+  const float32_t *pSrc1;
+        float32_t sum;
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+        uint32_t outBlockSize;                         /* Loop counter */
+        int32_t inc = 1;                               /* Destination address modifier */
 
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t *pIn1;                               /* inputA pointer */
-  float32_t *pIn2;                               /* inputB pointer */
-  float32_t *pOut = pDst;                        /* output pointer */
-  float32_t *px;                                 /* Intermediate inputA pointer */
-  float32_t *py;                                 /* Intermediate inputB pointer */
-  float32_t *pSrc1;                              /* Intermediate pointers */
-  float32_t sum, acc0, acc1, acc2, acc3;         /* Accumulators */
-  float32_t x0, x1, x2, x3, c0;                  /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0U, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counters */
-  int32_t inc = 1;                               /* Destination address modifier */
-
+#if defined (ARM_MATH_LOOPUNROLL) || defined (ARM_MATH_NEON)
+  float32_t acc0, acc1, acc2, acc3;                    /* Accumulators */
+  float32_t x0, x1, x2, x3, c0;                        /* temporary variables for holding input and coefficient values */
+#endif
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -158,16 +153,6 @@
 
     /* Updating the pointer position to non zero value */
     pOut += j;
-
-    //while (j > 0U)
-    //{
-    //  /* Zero is stored in the destination buffer */
-    //  *pOut++ = 0.0f;
-
-    //  /* Decrement the loop counter */
-    //  j--;
-    //}
-
   }
   else
   {
@@ -188,18 +173,18 @@
 
     /* Destination address modifier is set to -1 */
     inc = -1;
-
   }
 
   /* The function is internally
-   * divided into three parts according to the number of multiplications that has to be
-   * taken place between inputA samples and inputB samples. In the first part of the
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
    * algorithm, the multiplications increase by one for every iteration.
-   * In the second part of the algorithm, srcBLen number of multiplications are done.
-   * In the third part of the algorithm, the multiplications decrease by one
-   * for every iteration.*/
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
   /* The algorithm is implemented in three stages.
-   * The loop counters of each stage is initiated here. */
+     The loop counters of each stage is initiated here. */
   blockSize1 = srcBLen - 1U;
   blockSize2 = srcALen - (srcBLen - 1U);
   blockSize3 = blockSize1;
@@ -235,37 +220,73 @@
     /* Accumulator is made zero for every iteration */
     sum = 0.0f;
 
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
     k = count >> 2U;
 
+#if defined(ARM_MATH_NEON)
+    float32x4_t x,y;
+    float32x4_t res = vdupq_n_f32(0) ;
+    float32x2_t accum = vdup_n_f32(0);
+
+    while (k > 0U)
+    {
+      x = vld1q_f32(px);
+      y = vld1q_f32(py);
+
+      res = vmlaq_f32(res,x, y);
+
+      px += 4;
+      py += 4;
+
+      /* Decrement the loop counter */
+      k--;
+    }
+
+    accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
+    sum += accum[0] + accum[1];
+
+    k = count & 0x3;
+#else
     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
     while (k > 0U)
     {
       /* x[0] * y[srcBLen - 4] */
       sum += *px++ * *py++;
+
       /* x[1] * y[srcBLen - 3] */
       sum += *px++ * *py++;
+
       /* x[2] * y[srcBLen - 2] */
       sum += *px++ * *py++;
+
       /* x[3] * y[srcBLen - 1] */
       sum += *px++ * *py++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
-    /* If the count is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     k = count % 0x4U;
 
+#endif /* #if defined(ARM_MATH_NEON) */
+#else
+
+    /* Initialize k with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */
+
     while (k > 0U)
     {
       /* Perform the multiply-accumulate */
       /* x[0] * y[srcBLen - 1] */
       sum += *px++ * *py++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -278,10 +299,10 @@
     py = pSrc1 - count;
     px = pIn1;
 
-    /* Increment the MAC count */
+    /* Increment MAC count */
     count++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize1--;
   }
 
@@ -290,7 +311,7 @@
    * ------------------------*/
 
   /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
+   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen]   * y[srcBLen-1]
    * ....
    * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
    */
@@ -310,12 +331,25 @@
 
   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
    * So, to loop unroll over blockSize2,
-   * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
+   * srcBLen should be greater than or equal to 4 */
   if (srcBLen >= 4U)
   {
-    /* Loop unroll over blockSize2, by 4 */
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
     blkCnt = blockSize2 >> 2U;
 
+#if defined(ARM_MATH_NEON)
+      float32x4_t c;
+      float32x4_t x1v;
+      float32x4_t x2v;
+      uint32x4_t x1v_u;
+      uint32x4_t x2v_u;
+      float32x4_t x;
+      uint32x4_t x_u;
+      float32x4_t res = vdupq_n_f32(0) ;
+#endif /* #if defined(ARM_MATH_NEON) */
+
     while (blkCnt > 0U)
     {
       /* Set all accumulators to zero */
@@ -324,10 +358,75 @@
       acc2 = 0.0f;
       acc3 = 0.0f;
 
+#if defined(ARM_MATH_NEON)
+      /* Compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      res = vdupq_n_f32(0) ;
+
+      x1v = vld1q_f32(px);
+      px += 4;
+      do
+      {
+        x2v = vld1q_f32(px);
+        c = vld1q_f32(py);
+
+        py += 4;
+
+        x = x1v;
+        res = vmlaq_n_f32(res,x,c[0]);
+
+        x = vextq_f32(x1v,x2v,1);
+
+        res = vmlaq_n_f32(res,x,c[1]);
+
+        x = vextq_f32(x1v,x2v,2);
+
+	res = vmlaq_n_f32(res,x,c[2]);
+
+        x = vextq_f32(x1v,x2v,3);
+
+	res = vmlaq_n_f32(res,x,c[3]);
+
+        x1v = x2v;
+        px+=4;
+        x2v = vld1q_f32(px);
+
+      } while (--k);
+      
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen & 0x3;
+
+      while (k > 0U)
+      {
+        /* Read y[srcBLen - 5] sample */
+        c0 = *(py++);
+
+        res = vmlaq_n_f32(res,x1v,c0);
+
+        /* Reuse the present samples for the next MAC */
+        x1v[0] = x1v[1];
+        x1v[1] = x1v[2];
+        x1v[2] = x1v[3];
+
+        x1v[3] = *(px++);
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      px-=1;
+
+      acc0 = res[0];
+      acc1 = res[1];
+      acc2 = res[2];
+      acc3 = res[3];
+#else
       /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-      x2 = *(px++);
+      x0 = *px++;
+      x1 = *px++;
+      x2 = *px++;
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
       k = srcBLen >> 2U;
@@ -338,7 +437,6 @@
       {
         /* Read y[0] sample */
         c0 = *(py++);
-
         /* Read x[3] sample */
         x3 = *(px++);
 
@@ -354,7 +452,6 @@
 
         /* Read y[1] sample */
         c0 = *(py++);
-
         /* Read x[4] sample */
         x0 = *(px++);
 
@@ -370,11 +467,10 @@
 
         /* Read y[2] sample */
         c0 = *(py++);
-
         /* Read x[5] sample */
         x1 = *(px++);
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         /* acc0 +=  x[2] * y[2] */
         acc0 += x2 * c0;
         /* acc1 +=  x[3] * y[2] */
@@ -386,11 +482,10 @@
 
         /* Read y[3] sample */
         c0 = *(py++);
-
         /* Read x[6] sample */
         x2 = *(px++);
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         /* acc0 +=  x[3] * y[3] */
         acc0 += x3 * c0;
         /* acc1 +=  x[4] * y[3] */
@@ -400,7 +495,6 @@
         /* acc3 +=  x[6] * y[3] */
         acc3 += x2 * c0;
 
-
       } while (--k);
 
       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
@@ -411,11 +505,10 @@
       {
         /* Read y[4] sample */
         c0 = *(py++);
-
         /* Read x[7] sample */
         x3 = *(px++);
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         /* acc0 +=  x[4] * y[4] */
         acc0 += x0 * c0;
         /* acc1 +=  x[5] * y[4] */
@@ -434,6 +527,8 @@
         k--;
       }
 
+#endif /* #if defined(ARM_MATH_NEON) */
+
       /* Store the result in the accumulator in the destination buffer. */
       *pOut = acc0;
       /* Destination pointer is updated according to the address modifier, inc */
@@ -455,39 +550,74 @@
       px = pIn1 + count;
       py = pIn2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     blkCnt = blockSize2 % 0x4U;
 
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */
+
     while (blkCnt > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0.0f;
 
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
       k = srcBLen >> 2U;
 
+#if defined(ARM_MATH_NEON)
+    float32x4_t x,y;
+    float32x4_t res = vdupq_n_f32(0) ;
+    float32x2_t accum = vdup_n_f32(0);
+
+    while (k > 0U)
+    {
+      x = vld1q_f32(px);
+      y = vld1q_f32(py);
+
+      res = vmlaq_f32(res,x, y);
+
+      px += 4;
+      py += 4;
+      /* Decrement the loop counter */
+      k--;
+    }
+
+    accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
+    sum += accum[0] + accum[1];
+#else
       /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
       while (k > 0U)
       {
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         sum += *px++ * *py++;
         sum += *px++ * *py++;
         sum += *px++ * *py++;
         sum += *px++ * *py++;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
-
+#endif /* #if defined(ARM_MATH_NEON) */
       /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
        ** No loop unrolling is used. */
       k = srcBLen % 0x4U;
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */
 
       while (k > 0U)
       {
@@ -500,6 +630,7 @@
 
       /* Store the result in the accumulator in the destination buffer. */
       *pOut = sum;
+
       /* Destination pointer is updated according to the address modifier, inc */
       pOut += inc;
 
@@ -554,6 +685,7 @@
     }
   }
 
+
   /* --------------------------
    * Initializations of stage3
    * -------------------------*/
@@ -585,37 +717,71 @@
     /* Accumulator is made zero for every iteration */
     sum = 0.0f;
 
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
     k = count >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+#if defined(ARM_MATH_NEON)
+    float32x4_t x,y;
+    float32x4_t res = vdupq_n_f32(0) ;
+    float32x2_t accum = vdup_n_f32(0);
+
     while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
-      /* sum += x[srcALen - srcBLen + 4] * y[3] */
-      sum += *px++ * *py++;
-      /* sum += x[srcALen - srcBLen + 3] * y[2] */
-      sum += *px++ * *py++;
-      /* sum += x[srcALen - srcBLen + 2] * y[1] */
-      sum += *px++ * *py++;
-      /* sum += x[srcALen - srcBLen + 1] * y[0] */
-      sum += *px++ * *py++;
+      x = vld1q_f32(px);
+      y = vld1q_f32(py);
+
+      res = vmlaq_f32(res,x, y);
+
+      px += 4;
+      py += 4;
 
       /* Decrement the loop counter */
       k--;
     }
 
-    /* If the count is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
+    accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
+    sum += accum[0] + accum[1];
+#else
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* sum += x[srcALen - srcBLen + 4] * y[3] */
+      sum += *px++ * *py++;
+
+      /* sum += x[srcALen - srcBLen + 3] * y[2] */
+      sum += *px++ * *py++;
+
+      /* sum += x[srcALen - srcBLen + 2] * y[1] */
+      sum += *px++ * *py++;
+
+      /* sum += x[srcALen - srcBLen + 1] * y[0] */
+      sum += *px++ * *py++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+#endif /* #if defined (ARM_MATH_NEON) */
+    /* Loop unrolling: Compute remaining outputs */
     k = count % 0x4U;
 
+#else
+
+    /* Initialize blkCnt with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */
+
     while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
+      /* Perform the multiply-accumulate */
       sum += *px++ * *py++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -628,7 +794,7 @@
     px = ++pSrc1;
     py = pIn2;
 
-    /* Decrement the MAC count */
+    /* Decrement MAC count */
     count--;
 
     /* Decrement the loop counter */
@@ -636,15 +802,14 @@
   }
 
 #else
+/* alternate version for CM0_FAMILY */
 
-  /* Run the below code for Cortex-M0 */
-
-  float32_t *pIn1 = pSrcA;                       /* inputA pointer */
-  float32_t *pIn2 = pSrcB + (srcBLen - 1U);      /* inputB pointer */
-  float32_t sum;                                 /* Accumulator */
-  uint32_t i = 0U, j;                            /* loop counters */
-  uint32_t inv = 0U;                             /* Reverse order flag */
-  uint32_t tot = 0U;                             /* Length */
+  const float32_t *pIn1 = pSrcA;                       /* inputA pointer */
+  const float32_t *pIn2 = pSrcB + (srcBLen - 1U);      /* inputB pointer */
+        float32_t sum;                                 /* Accumulator */
+        uint32_t i = 0U, j;                            /* Loop counters */
+        uint32_t inv = 0U;                             /* Reverse order flag */
+        uint32_t tot = 0U;                             /* Length */
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -698,7 +863,7 @@
   /* Loop to calculate convolution for output length number of times */
   for (i = 0U; i <= tot; i++)
   {
-    /* Initialize sum with zero to carry on MAC operations */
+    /* Initialize sum with zero to carry out MAC operations */
     sum = 0.0f;
 
     /* Loop to perform MAC operations according to convolution equation */
@@ -711,6 +876,7 @@
         sum += pIn1[j] * pIn2[-((int32_t) i - j)];
       }
     }
+
     /* Store the output in the destination buffer */
     if (inv == 1)
       *pDst-- = sum;
@@ -718,10 +884,10 @@
       *pDst++ = sum;
   }
 
-#endif /*   #if defined (ARM_MATH_DSP) */
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
 
 }
 
 /**
- * @} end of Corr group
+  @} end of Corr group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c b/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c
index a1b0dbd..13661cb 100644
--- a/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_correlate_fast_opt_q15.c
  * Description:  Fast Q15 Correlation
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,70 +29,61 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup Corr
- * @{
+  @addtogroup Corr
+  @{
  */
 
 /**
- * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
- * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @return none.
- *
- *
- * \par Restrictions
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- *  In this case input, output, scratch buffers should be aligned by 32-bit
- *
- *
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * This fast version uses a 32-bit accumulator with 2.30 format.
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * There is no saturation on intermediate additions.
- * Thus, if the accumulator overflows it wraps around and distorts the result.
- * The input signals should be scaled down to avoid intermediate overflows.
- * Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a
- * maximum of min(srcALen, srcBLen) number of additions is carried internally.
- * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
- *
- * \par
- * See <code>arm_correlate_q15()</code> for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
+  @brief         Correlation of Q15 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence.
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @param[in]     pScratch   points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This fast version uses a 32-bit accumulator with 2.30 format.
+                   The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   There is no saturation on intermediate additions.
+                   Thus, if the accumulator overflows it wraps around and distorts the result.
+                   The input signals should be scaled down to avoid intermediate overflows.
+                   Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a
+                   maximum of min(srcALen, srcBLen) number of additions is carried internally.
+                   The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
+
+  @remark
+                   Refer to \ref arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
  */
 
 void arm_correlate_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch)
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch)
 {
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators                  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t x1, x2, x3;                              /* temporary variables for holding input and coefficient values */
-  uint32_t j, blkCnt, outBlockSize;              /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
-  uint32_t tapCnt;
-  q31_t y1, y2;
-  q15_t *pScr;                                   /* Intermediate pointers        */
-  q15_t *pOut = pDst;                            /* output pointer               */
-#ifdef UNALIGNED_SUPPORT_DISABLE
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q31_t acc0;                                    /* Accumulators */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q15_t *pScr1 = pScratch;                       /* Temporary pointer for scratch */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+        uint32_t j, blkCnt, outBlockSize;              /* Loop counter */
+        int32_t inc = 1;                               /* Destination address modifier */
+        uint32_t tapCnt;                               /* Loop count */
 
-  q15_t a, b;
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc1, acc2, acc3;                        /* Accumulators */
+        q31_t x1, x2, x3;                              /* Temporary variables for holding input and coefficient values */
+        q31_t y1, y2;                                  /* State variables */
+#endif
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -110,10 +101,10 @@
   if (srcALen >= srcBLen)
   {
     /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
+    pIn1 = pSrcA;
 
     /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
+    pIn2 = pSrcB;
 
     /* Number of output samples is calculated */
     outBlockSize = (2U * srcALen) - 1U;
@@ -126,15 +117,14 @@
 
     /* Updating the pointer position to non zero value */
     pOut += j;
-
   }
   else
   {
     /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
+    pIn1 = pSrcB;
 
     /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
+    pIn2 = pSrcA;
 
     /* srcBLen is always considered as shorter or equal to srcALen */
     j = srcBLen;
@@ -147,112 +137,45 @@
 
     /* Destination address modifier is set to -1 */
     inc = -1;
-
   }
 
-  pScr = pScratch;
+  pScr1 = pScratch;
 
   /* Fill (srcBLen - 1U) zeros in scratch buffer */
-  arm_fill_q15(0, pScr, (srcBLen - 1U));
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
 
   /* Update temporary scratch pointer */
-  pScr += (srcBLen - 1U);
+  pScr1 += (srcBLen - 1U);
 
-#ifndef UNALIGNED_SUPPORT_DISABLE
 
   /* Copy (srcALen) samples in scratch buffer */
-  arm_copy_q15(pIn1, pScr, srcALen);
+  arm_copy_q15(pIn1, pScr1, srcALen);
 
   /* Update pointers */
-  pScr += srcALen;
+  pScr1 += srcALen;
 
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  j = srcALen >> 2U;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while (j > 0U)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.
-   ** No loop unrolling is used. */
-  j = srcALen % 0x4U;
-
-  while (j > 0U)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
 
   /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr, (srcBLen - 1U));
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
 
   /* Update pointer */
-  pScr += (srcBLen - 1U);
-
-#else
-
-/* Apply loop unrolling and do 4 Copies simultaneously. */
-  j = (srcBLen - 1U) >> 2U;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while (j > 0U)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr++ = 0;
-    *pScr++ = 0;
-    *pScr++ = 0;
-    *pScr++ = 0;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.
-   ** No loop unrolling is used. */
-  j = (srcBLen - 1U) % 0x4U;
-
-  while (j > 0U)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr++ = 0;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
+  pScr1 += (srcBLen - 1U);
 
   /* Temporary pointer for scratch2 */
   py = pIn2;
 
 
   /* Actual correlation process starts here */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = (srcALen + srcBLen - 1U) >> 2;
 
   while (blkCnt > 0)
   {
     /* Initialze temporary scratch pointer as scratch1 */
-    pScr = pScratch;
+    pScr1 = pScratch;
 
     /* Clear Accumlators */
     acc0 = 0;
@@ -260,41 +183,42 @@
     acc2 = 0;
     acc3 = 0;
 
-    /* Read four samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr)++;
+    /* Read two samples from scratch buffer */
+    x1 = read_q15x2_ia (&pScr1);
 
-    /* Read next four samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr)++;
+    /* Read next two samples from scratch buffer */
+    x2 = read_q15x2_ia (&pScr1);
 
     tapCnt = (srcBLen) >> 2U;
 
     while (tapCnt > 0U)
     {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
       /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pIn2);
-      y2 = _SIMD32_OFFSET(pIn2 + 2U);
+      y1 = read_q15x2_ia ((q15_t **) &pIn2);
+      y2 = read_q15x2_ia ((q15_t **) &pIn2);
 
+      /* multiply and accumlate */
       acc0 = __SMLAD(x1, y1, acc0);
-
       acc2 = __SMLAD(x2, y1, acc2);
 
+      /* pack input data */
 #ifndef ARM_MATH_BIG_ENDIAN
       x3 = __PKHBT(x2, x1, 0);
 #else
       x3 = __PKHBT(x1, x2, 0);
 #endif
 
+      /* multiply and accumlate */
       acc1 = __SMLADX(x3, y1, acc1);
 
-      x1 = _SIMD32_OFFSET(pScr);
+      /* Read next two samples from scratch buffer */
+      x1 = read_q15x2_ia (&pScr1);
 
+      /* multiply and accumlate */
       acc0 = __SMLAD(x2, y2, acc0);
-
       acc2 = __SMLAD(x1, y2, acc2);
 
+      /* pack input data */
 #ifndef ARM_MATH_BIG_ENDIAN
       x3 = __PKHBT(x1, x2, 0);
 #else
@@ -302,81 +226,9 @@
 #endif
 
       acc3 = __SMLADX(x3, y1, acc3);
-
       acc1 = __SMLADX(x3, y2, acc1);
 
-      x2 = _SIMD32_OFFSET(pScr + 2U);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y2, acc3);
-#else
-
-      /* Read four samples from smaller buffer */
-      a = *pIn2;
-      b = *(pIn2 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      y1 = __PKHBT(a, b, 16);
-#else
-      y1 = __PKHBT(b, a, 16);
-#endif
-
-      a = *(pIn2 + 2);
-      b = *(pIn2 + 3);
-#ifndef ARM_MATH_BIG_ENDIAN
-      y2 = __PKHBT(a, b, 16);
-#else
-      y2 = __PKHBT(b, a, 16);
-#endif
-
-      acc0 = __SMLAD(x1, y1, acc0);
-
-      acc2 = __SMLAD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      a = *pScr;
-      b = *(pScr + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(a, b, 16);
-#else
-      x1 = __PKHBT(b, a, 16);
-#endif
-
-      acc0 = __SMLAD(x2, y2, acc0);
-
-      acc2 = __SMLAD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      acc1 = __SMLADX(x3, y2, acc1);
-
-      a = *(pScr + 2);
-      b = *(pScr + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x2 = __PKHBT(a, b, 16);
-#else
-      x2 = __PKHBT(b, a, 16);
-#endif
+      x2 = read_q15x2_ia (&pScr1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
       x3 = __PKHBT(x2, x1, 0);
@@ -386,44 +238,32 @@
 
       acc3 = __SMLADX(x3, y2, acc3);
 
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
-      pIn2 += 4U;
-
-      pScr += 4U;
-
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-
-
     /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr -= 4U;
-
+    pScr1 -= 4U;
 
     /* apply same above for remaining samples of smaller length sequence */
     tapCnt = (srcBLen) & 3U;
 
     while (tapCnt > 0U)
     {
-
       /* accumlate the results */
-      acc0 += (*pScr++ * *pIn2);
-      acc1 += (*pScr++ * *pIn2);
-      acc2 += (*pScr++ * *pIn2);
-      acc3 += (*pScr++ * *pIn2++);
+      acc0 += (*pScr1++ * *pIn2);
+      acc1 += (*pScr1++ * *pIn2);
+      acc2 += (*pScr1++ * *pIn2);
+      acc3 += (*pScr1++ * *pIn2++);
 
-      pScr -= 3U;
+      pScr1 -= 3U;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
     blkCnt--;
 
-
     /* Store the results in the accumulators in the destination buffer. */
     *pOut = (__SSAT(acc0 >> 15U, 16));
     pOut += inc;
@@ -434,22 +274,27 @@
     *pOut = (__SSAT(acc3 >> 15U, 16));
     pOut += inc;
 
-
     /* Initialization of inputB pointer */
     pIn2 = py;
 
     pScratch += 4U;
-
   }
 
-
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = (srcALen + srcBLen - 1U) & 0x3;
 
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (srcALen + srcBLen - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   /* Calculate correlation for remaining samples of Bigger length sequence */
   while (blkCnt > 0)
   {
     /* Initialze temporary scratch pointer as scratch1 */
-    pScr = pScratch;
+    pScr1 = pScratch;
 
     /* Clear Accumlators */
     acc0 = 0;
@@ -459,10 +304,11 @@
     while (tapCnt > 0U)
     {
 
-      acc0 += (*pScr++ * *pIn2++);
-      acc0 += (*pScr++ * *pIn2++);
+      /* Read next two samples from scratch buffer */
+      acc0 += (*pScr1++ * *pIn2++);
+      acc0 += (*pScr1++ * *pIn2++);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
@@ -473,28 +319,27 @@
     {
 
       /* accumlate the results */
-      acc0 += (*pScr++ * *pIn2++);
+      acc0 += (*pScr1++ * *pIn2++);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
     blkCnt--;
 
-    /* Store the result in the accumulator in the destination buffer. */
-
+    /* The result is in 2.30 format.  Convert to 1.15 with saturation.
+     ** Then store the output in the destination buffer. */
     *pOut = (q15_t) (__SSAT((acc0 >> 15), 16));
-
     pOut += inc;
 
     /* Initialization of inputB pointer */
     pIn2 = py;
 
     pScratch += 1U;
-
   }
+
 }
 
 /**
- * @} end of Corr group
+  @} end of Corr group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c b/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c
index 383949d..6898618 100644
--- a/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_correlate_fast_q15.c
  * Description:  Fast Q15 Correlation
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,58 +29,56 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup Corr
- * @{
+  @addtogroup Corr
+  @{
  */
 
 /**
- * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * This fast version uses a 32-bit accumulator with 2.30 format.
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * There is no saturation on intermediate additions.
- * Thus, if the accumulator overflows it wraps around and distorts the result.
- * The input signals should be scaled down to avoid intermediate overflows.
- * Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a
- * maximum of min(srcALen, srcBLen) number of additions is carried internally.
- * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
- *
- * \par
- * See <code>arm_correlate_q15()</code> for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
+  @brief         Correlation of Q15 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This fast version uses a 32-bit accumulator with 2.30 format.
+                   The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   There is no saturation on intermediate additions.
+                   Thus, if the accumulator overflows it wraps around and distorts the result.
+                   The input signals should be scaled down to avoid intermediate overflows.
+                   Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a
+                   maximum of min(srcALen, srcBLen) number of additions is carried internally.
+                   The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
+
+  @remark
+                   Refer to \ref arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
  */
 
 void arm_correlate_fast_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst)
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst)
 {
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1;                                  /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0U, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+  const q15_t *pSrc1;                                  /* Intermediate pointers */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary variables for holding input and coefficient values */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+        uint32_t outBlockSize;
+        int32_t inc = 1;                               /* Destination address modifier */
 
 
   /* The algorithm implementation is based on the lengths of the inputs. */
@@ -99,10 +97,10 @@
   if (srcALen >= srcBLen)
   {
     /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
+    pIn1 = pSrcA;
 
     /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
+    pIn2 = pSrcB;
 
     /* Number of output samples is calculated */
     outBlockSize = (2U * srcALen) - 1U;
@@ -120,10 +118,10 @@
   else
   {
     /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
+    pIn1 = pSrcB;
 
     /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
+    pIn2 = pSrcA;
 
     /* srcBLen is always considered as shorter or equal to srcALen */
     j = srcBLen;
@@ -140,14 +138,15 @@
   }
 
   /* The function is internally
-   * divided into three parts according to the number of multiplications that has to be
-   * taken place between inputA samples and inputB samples. In the first part of the
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
    * algorithm, the multiplications increase by one for every iteration.
-   * In the second part of the algorithm, srcBLen number of multiplications are done.
-   * In the third part of the algorithm, the multiplications decrease by one
-   * for every iteration.*/
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
   /* The algorithm is implemented in three stages.
-   * The loop counters of each stage is initiated here. */
+     The loop counters of each stage is initiated here. */
   blockSize1 = srcBLen - 1U;
   blockSize2 = srcALen - (srcBLen - 1U);
   blockSize3 = blockSize1;
@@ -184,23 +183,23 @@
     sum = 0;
 
     /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
+    k = count >> 2U;
 
     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
     while (k > 0U)
     {
       /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
-      sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
+      sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
       /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */
-      sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
+      sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
     /* If the count is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
+       No loop unrolling is used. */
     k = count % 0x4U;
 
     while (k > 0U)
@@ -222,10 +221,10 @@
     py = pSrc1 - count;
     px = pIn1;
 
-    /* Increment the MAC count */
+    /* Increment MAC count */
     count++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize1--;
   }
 
@@ -245,16 +244,16 @@
   /* Working pointer of inputB */
   py = pIn2;
 
-  /* count is index by which the pointer pIn1 to be incremented */
+  /* count is the index by which the pointer pIn1 to be incremented */
   count = 0U;
 
-  /* -------------------
+  /* --------------------
    * Stage2 process
-   * ------------------*/
+   * -------------------*/
 
   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
    * So, to loop unroll over blockSize2,
-   * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
+   * srcBLen should be greater than or equal to 4 */
   if (srcBLen >= 4U)
   {
     /* Loop unroll over blockSize2, by 4 */
@@ -269,9 +268,9 @@
       acc3 = 0;
 
       /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
+      x0 = read_q15x2 ((q15_t *) px);
       /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px + 1);
+      x1 = read_q15x2 ((q15_t *) px + 1);
 	  px += 2U;
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
@@ -283,7 +282,7 @@
       {
         /* Read the first two inputB samples using SIMD:
          * y[0] and y[1] */
-        c0 = *__SIMD32(py)++;
+        c0 = read_q15x2_ia ((q15_t **) &py);
 
         /* acc0 +=  x[0] * y[0] + x[1] * y[1] */
         acc0 = __SMLAD(x0, c0, acc0);
@@ -292,10 +291,10 @@
         acc1 = __SMLAD(x1, c0, acc1);
 
         /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
+        x2 = read_q15x2 ((q15_t *) px);
 
         /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px + 1);
+        x3 = read_q15x2 ((q15_t *) px + 1);
 
         /* acc2 +=  x[2] * y[0] + x[3] * y[1] */
         acc2 = __SMLAD(x2, c0, acc2);
@@ -304,7 +303,7 @@
         acc3 = __SMLAD(x3, c0, acc3);
 
         /* Read y[2] and y[3] */
-        c0 = *__SIMD32(py)++;
+        c0 = read_q15x2_ia ((q15_t **) &py);
 
         /* acc0 +=  x[2] * y[2] + x[3] * y[3] */
         acc0 = __SMLAD(x2, c0, acc0);
@@ -313,10 +312,10 @@
         acc1 = __SMLAD(x3, c0, acc1);
 
         /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px + 2);
+        x0 = read_q15x2 ((q15_t *) px + 2);
 
         /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px + 3);
+        x1 = read_q15x2 ((q15_t *) px + 3);
 		px += 4U;
 
         /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
@@ -338,23 +337,20 @@
       {
         /* Read y[4] */
         c0 = *py;
+
 #ifdef  ARM_MATH_BIG_ENDIAN
-
         c0 = c0 << 16U;
-
 #else
-
         c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
 
         /* Read x[7] */
-        x3 = *__SIMD32(px);
+        x3 = read_q15x2 ((q15_t *) px);
 		px++;
 
         /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
+        acc0 = __SMLAD (x0, c0, acc0);
+        acc1 = __SMLAD (x1, c0, acc1);
         acc2 = __SMLADX(x1, c0, acc2);
         acc3 = __SMLADX(x3, c0, acc3);
       }
@@ -362,13 +358,13 @@
       if (k == 2U)
       {
         /* Read y[4], y[5] */
-        c0 = *__SIMD32(py);
+        c0 = read_q15x2 ((q15_t *) py);
 
         /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
+        x3 = read_q15x2 ((q15_t *) px);
 
         /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px + 1);
+        x2 = read_q15x2 ((q15_t *) px + 1);
 		px += 2U;
 
         /* Perform the multiply-accumulates */
@@ -381,13 +377,13 @@
       if (k == 3U)
       {
         /* Read y[4], y[5] */
-        c0 = *__SIMD32(py)++;
+        c0 = read_q15x2_ia ((q15_t **) &py);
 
         /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
+        x3 = read_q15x2 ((q15_t *) px);
 
         /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px + 1);
+        x2 = read_q15x2 ((q15_t *) px + 1);
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLAD(x0, c0, acc0);
@@ -398,20 +394,18 @@
         c0 = (*py);
         /* Read y[6] */
 #ifdef  ARM_MATH_BIG_ENDIAN
-
         c0 = c0 << 16U;
 #else
-
         c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
 
         /* Read x[10] */
-        x3 = _SIMD32_OFFSET(px + 2);
+        x3 = read_q15x2 ((q15_t *) px + 2);
 		px += 3U;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLADX(x1, c0, acc0);
-        acc1 = __SMLAD(x2, c0, acc1);
+        acc1 = __SMLAD (x2, c0, acc1);
         acc2 = __SMLADX(x2, c0, acc2);
         acc3 = __SMLADX(x3, c0, acc3);
       }
@@ -430,15 +424,14 @@
       *pOut = (q15_t) (acc3 >> 15);
       pOut += inc;
 
-      /* Increment the pointer pIn1 index, count by 1 */
+      /* Increment the pointer pIn1 index, count by 4 */
       count += 4U;
 
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;
       py = pIn2;
 
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
@@ -459,12 +452,12 @@
       while (k > 0U)
       {
         /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
+        sum += ((q31_t) *px++ * *py++);
+        sum += ((q31_t) *px++ * *py++);
+        sum += ((q31_t) *px++ * *py++);
+        sum += ((q31_t) *px++ * *py++);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -477,7 +470,7 @@
         /* Perform the multiply-accumulates */
         sum += ((q31_t) * px++ * *py++);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -493,7 +486,7 @@
       px = pIn1 + count;
       py = pIn2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
@@ -508,15 +501,15 @@
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
-      /* Loop over srcBLen */
+      /* srcBLen number of MACS should be performed */
       k = srcBLen;
 
       while (k > 0U)
       {
         /* Perform the multiply-accumulate */
-        sum += ((q31_t) * px++ * *py++);
+        sum += ((q31_t) *px++ * *py++);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -525,14 +518,14 @@
       /* Destination pointer is updated according to the address modifier, inc */
       pOut += inc;
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;
       py = pIn2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
@@ -577,11 +570,11 @@
     {
       /* Perform the multiply-accumulates */
       /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */
-      sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
+      sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
       /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */
-      sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
+      sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -594,7 +587,7 @@
       /* Perform the multiply-accumulates */
       sum = __SMLAD(*px++, *py++, sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -614,694 +607,8 @@
     blockSize3--;
   }
 
-#else
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1;                                  /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0U, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
-  q15_t a, b;
-
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if (srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2U * srcALen) - 1U;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB
-     * to make their lengths equal.
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1U));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2U);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  /* The function is internally
-   * divided into three parts according to the number of multiplications that has to be
-   * taken place between inputA samples and inputB samples. In the first part of the
-   * algorithm, the multiplications increase by one for every iteration.
-   * In the second part of the algorithm, srcBLen number of multiplications are done.
-   * In the third part of the algorithm, the multiplications decrease by one
-   * for every iteration.*/
-  /* The algorithm is implemented in three stages.
-   * The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1U;
-  blockSize2 = srcALen - (srcBLen - 1U);
-  blockSize3 = blockSize1;
-
-  /* --------------------------
-   * Initializations of stage1
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
-   * ....
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.
-     The count variable holds the number of MAC operations performed */
-  count = 1U;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1U);
-  py = pSrc1;
-
-  /* ------------------------
-   * Stage1 process
-   * ----------------------*/
-
-  /* The first loop starts here */
-  while (blockSize1 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
-    k = count % 0x4U;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulates */
-      /* x[0] * y[srcBLen - 1] */
-        sum += ((q31_t) * px++ * *py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (sum >> 15);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------
-   * Initializations of stage2
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
-   * ....
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0U;
-
-  /* -------------------
-   * Stage2 process
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
-   * So, to loop unroll over blockSize2,
-   * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
-  if (srcBLen >= 4U)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1], x[2] samples */
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  x0 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  x0 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-	  px += 2U;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the first two inputB samples using SIMD:
-         * y[0] and y[1] */
-		  a = *py;
-		  b = *(py + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		  c0 = __PKHBT(a, b, 16);
-
-#else
-
-		  c0 = __PKHBT(b, a, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[0] * y[0] + x[1] * y[1] */
-        acc0 = __SMLAD(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[0] + x[2] * y[1] */
-        acc1 = __SMLAD(x1, c0, acc1);
-
-        /* Read x[2], x[3], x[4] */
-	  	a = *px;
-	  	b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  	x2 = __PKHBT(a, b, 16);
-	  	a = *(px + 2);
-	  	x3 = __PKHBT(b, a, 16);
-
-#else
-
-	  	x2 = __PKHBT(b, a, 16);
-	  	a = *(px + 2);
-	  	x3 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc2 +=  x[2] * y[0] + x[3] * y[1] */
-        acc2 = __SMLAD(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[0] + x[4] * y[1] */
-        acc3 = __SMLAD(x3, c0, acc3);
-
-        /* Read y[2] and y[3] */
-		  a = *(py + 2);
-		  b = *(py + 3);
-
-		  py += 4U;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		  c0 = __PKHBT(a, b, 16);
-
-#else
-
-		  c0 = __PKHBT(b, a, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[2] * y[2] + x[3] * y[3] */
-        acc0 = __SMLAD(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[2] + x[4] * y[3] */
-        acc1 = __SMLAD(x3, c0, acc1);
-
-        /* Read x[4], x[5], x[6] */
-	  	a = *(px + 2);
-	  	b = *(px + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  	x0 = __PKHBT(a, b, 16);
-	  	a = *(px + 4);
-	  	x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  	x0 = __PKHBT(b, a, 16);
-	  	a = *(px + 4);
-	  	x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px += 4U;
-
-        /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
-        acc2 = __SMLAD(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[2] + x[6] * y[3] */
-        acc3 = __SMLAD(x1, c0, acc3);
-
-      } while (--k);
-
-      /* For the next MAC operations, SIMD is not used
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4U;
-
-      if (k == 1U)
-      {
-        /* Read y[4] */
-        c0 = *py;
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16U;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[7] */
-		a = *px;
-		b = *(px + 1);
-
-		px++;;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		x3 = __PKHBT(a, b, 16);
-
-#else
-
-		x3 = __PKHBT(b, a, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px++;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLADX(x1, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      if (k == 2U)
-      {
-        /* Read y[4], y[5] */
-		  a = *py;
-		  b = *(py + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		  c0 = __PKHBT(a, b, 16);
-
-#else
-
-		  c0 = __PKHBT(b, a, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Read x[7], x[8], x[9] */
-	  	a = *px;
-	  	b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  	x3 = __PKHBT(a, b, 16);
-	  	a = *(px + 2);
-	  	x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  	x3 = __PKHBT(b, a, 16);
-	  	a = *(px + 2);
-	  	x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px += 2U;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLAD(x3, c0, acc2);
-        acc3 = __SMLAD(x2, c0, acc3);
-      }
-
-      if (k == 3U)
-      {
-        /* Read y[4], y[5] */
-		  a = *py;
-		  b = *(py + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		  c0 = __PKHBT(a, b, 16);
-
-#else
-
-		  c0 = __PKHBT(b, a, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		py += 2U;
-
-        /* Read x[7], x[8], x[9] */
-	  	a = *px;
-	  	b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  	x3 = __PKHBT(a, b, 16);
-	  	a = *(px + 2);
-	  	x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  	x3 = __PKHBT(b, a, 16);
-	  	a = *(px + 2);
-	  	x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLAD(x3, c0, acc2);
-        acc3 = __SMLAD(x2, c0, acc3);
-
-        c0 = (*py);
-        /* Read y[6] */
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16U;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[10] */
-		b = *(px + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		x3 = __PKHBT(a, b, 16);
-
-#else
-
-		x3 = __PKHBT(b, a, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px += 3U;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x1, c0, acc0);
-        acc1 = __SMLAD(x2, c0, acc1);
-        acc2 = __SMLADX(x2, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (acc0 >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = (q15_t) (acc1 >> 15);
-      pOut += inc;
-
-      *pOut = (q15_t) (acc2 >> 15);
-      pOut += inc;
-
-      *pOut = (q15_t) (acc3 >> 15);
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count += 4U;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4U;
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4U;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (sum >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over srcBLen */
-      k = srcBLen;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q31_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (sum >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* --------------------------
-   * Initializations of stage3
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
-   * ....
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
-   * sum +=  x[srcALen-1] * y[0]
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1U;
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------
-   * Stage3 process
-   * ------------------*/
-
-  while (blockSize3 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2U;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
-    k = count % 0x4U;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (sum >> 15);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the MAC count */
-    count--;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#endif /*   #ifndef UNALIGNED_SUPPORT_DISABLE */
-
 }
 
 /**
- * @} end of Corr group
+  @} end of Corr group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c b/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c
index 4a006aa..a5840b7 100644
--- a/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_correlate_fast_q31.c
  * Description:  Fast Q31 Correlation
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,61 +29,58 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup Corr
- * @{
+  @addtogroup Corr
+  @{
  */
 
 /**
- * @brief Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
- * These intermediate results are accumulated in a 32-bit register in 2.30 format.
- * Finally, the accumulator is saturated and converted to a 1.31 result.
- *
- * \par
- * The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result.
- * In order to avoid overflows completely the input signals must be scaled down.
- * The input signals should be scaled down to avoid intermediate overflows.
- * Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a
- * maximum of min(srcALen, srcBLen) number of additions is carried internally.
- *
- * \par
- * See <code>arm_correlate_q31()</code> for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.
+  @brief         Correlation of Q31 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This function is optimized for speed at the expense of fixed-point precision and overflow protection.
+                   The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
+                   These intermediate results are accumulated in a 32-bit register in 2.30 format.
+                   Finally, the accumulator is saturated and converted to a 1.31 result.
+  @par
+                   The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result.
+                   In order to avoid overflows completely the input signals must be scaled down.
+                   The input signals should be scaled down to avoid intermediate overflows.
+                   Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a
+                   maximum of min(srcALen, srcBLen) number of additions is carried internally.
+
+ @remark
+                   Refer to \ref arm_correlate_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.
  */
 
 void arm_correlate_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst)
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst)
 {
-  q31_t *pIn1;                                   /* inputA pointer               */
-  q31_t *pIn2;                                   /* inputB pointer               */
-  q31_t *pOut = pDst;                            /* output pointer               */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1;                                  /* Intermediate pointers        */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0U, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
-
+  const q31_t *pIn1;                                   /* InputA pointer */
+  const q31_t *pIn2;                                   /* InputB pointer */
+        q31_t *pOut = pDst;                            /* Output pointer */
+  const q31_t *px;                                     /* Intermediate inputA pointer */
+  const q31_t *py;                                     /* Intermediate inputB pointer */
+  const q31_t *pSrc1;                                  /* Intermediate pointers */
+        q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary variables for holding input and coefficient values */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+        uint32_t outBlockSize;
+        int32_t inc = 1;                               /* Destination address modifier */
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -91,10 +88,10 @@
   if (srcALen >= srcBLen)
   {
     /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
+    pIn1 = pSrcA;
 
     /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
+    pIn2 = pSrcB;
 
     /* Number of output samples is calculated */
     outBlockSize = (2U * srcALen) - 1U;
@@ -112,10 +109,10 @@
   else
   {
     /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
+    pIn1 = pSrcB;
 
     /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
+    pIn2 = pSrcA;
 
     /* srcBLen is always considered as shorter or equal to srcALen */
     j = srcBLen;
@@ -132,14 +129,15 @@
   }
 
   /* The function is internally
-   * divided into three parts according to the number of multiplications that has to be
-   * taken place between inputA samples and inputB samples. In the first part of the
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
    * algorithm, the multiplications increase by one for every iteration.
-   * In the second part of the algorithm, srcBLen number of multiplications are done.
-   * In the third part of the algorithm, the multiplications decrease by one
-   * for every iteration.*/
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
   /* The algorithm is implemented in three stages.
-   * The loop counters of each stage is initiated here. */
+     The loop counters of each stage is initiated here. */
   blockSize1 = srcBLen - 1U;
   blockSize2 = srcALen - (srcBLen - 1U);
   blockSize3 = blockSize1;
@@ -176,7 +174,7 @@
     sum = 0;
 
     /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
+    k = count >> 2U;
 
     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
@@ -184,18 +182,21 @@
     {
       /* x[0] * y[srcBLen - 4] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
+                      ((q63_t) *px++ * (*py++))) >> 32);
+
       /* x[1] * y[srcBLen - 3] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
+                      ((q63_t) *px++ * (*py++))) >> 32);
+
       /* x[2] * y[srcBLen - 2] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
+                      ((q63_t) *px++ * (*py++))) >> 32);
+
       /* x[3] * y[srcBLen - 1] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
+                      ((q63_t) *px++ * (*py++))) >> 32);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -205,12 +206,12 @@
 
     while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
+      /* Perform the multiply-accumulate */
       /* x[0] * y[srcBLen - 1] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
+                      ((q63_t) *px++ * (*py++))) >> 32);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -223,10 +224,10 @@
     py = pSrc1 - count;
     px = pIn1;
 
-    /* Increment the MAC count */
+    /* Increment MAC count */
     count++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize1--;
   }
 
@@ -270,9 +271,9 @@
       acc3 = 0;
 
       /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-      x2 = *(px++);
+      x0 = *px++;
+      x1 = *px++;
+      x2 = *px++;
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
       k = srcBLen >> 2U;
@@ -282,10 +283,9 @@
       do
       {
         /* Read y[0] sample */
-        c0 = *(py++);
-
+        c0 = *py++;
         /* Read x[3] sample */
-        x3 = *(px++);
+        x3 = *px++;
 
         /* Perform the multiply-accumulate */
         /* acc0 +=  x[0] * y[0] */
@@ -297,13 +297,13 @@
         /* acc3 +=  x[3] * y[0] */
         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
 
+
         /* Read y[1] sample */
-        c0 = *(py++);
-
+        c0 = *py++;
         /* Read x[4] sample */
-        x0 = *(px++);
+        x0 = *px++;
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         /* acc0 +=  x[1] * y[1] */
         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32);
         /* acc1 +=  x[2] * y[1] */
@@ -313,11 +313,11 @@
         /* acc3 +=  x[4] * y[1] */
         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
 
-        /* Read y[2] sample */
-        c0 = *(py++);
 
+        /* Read y[2] sample */
+        c0 = *py++;
         /* Read x[5] sample */
-        x1 = *(px++);
+        x1 = *px++;
 
         /* Perform the multiply-accumulates */
         /* acc0 +=  x[2] * y[2] */
@@ -329,11 +329,11 @@
         /* acc3 +=  x[5] * y[2] */
         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
 
-        /* Read y[3] sample */
-        c0 = *(py++);
 
+        /* Read y[3] sample */
+        c0 = *py++;
         /* Read x[6] sample */
-        x2 = *(px++);
+        x2 = *px++;
 
         /* Perform the multiply-accumulates */
         /* acc0 +=  x[3] * y[3] */
@@ -355,10 +355,9 @@
       while (k > 0U)
       {
         /* Read y[4] sample */
-        c0 = *(py++);
-
+        c0 = *py++;
         /* Read x[7] sample */
-        x3 = *(px++);
+        x3 = *px++;
 
         /* Perform the multiply-accumulates */
         /* acc0 +=  x[4] * y[4] */
@@ -375,7 +374,7 @@
         x1 = x2;
         x2 = x3;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -400,8 +399,7 @@
       px = pIn1 + count;
       py = pIn2;
 
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
@@ -423,15 +421,15 @@
       {
         /* Perform the multiply-accumulates */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
+                        ((q63_t) *px++ * (*py++))) >> 32);
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
+                        ((q63_t) *px++ * (*py++))) >> 32);
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
+                        ((q63_t) *px++ * (*py++))) >> 32);
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
+                        ((q63_t) *px++ * (*py++))) >> 32);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -443,9 +441,9 @@
       {
         /* Perform the multiply-accumulate */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
+                        ((q63_t) *px++ * (*py++))) >> 32);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -454,15 +452,14 @@
       /* Destination pointer is updated according to the address modifier, inc */
       pOut += inc;
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;
       py = pIn2;
 
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
@@ -477,16 +474,16 @@
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
-      /* Loop over srcBLen */
+      /* srcBLen number of MACS should be performed */
       k = srcBLen;
 
       while (k > 0U)
       {
         /* Perform the multiply-accumulate */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
+                        ((q63_t) *px++ * (*py++))) >> 32);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -495,18 +492,19 @@
       /* Destination pointer is updated according to the address modifier, inc */
       pOut += inc;
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;
       py = pIn2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
 
+
   /* --------------------------
    * Initializations of stage3
    * -------------------------*/
@@ -545,21 +543,24 @@
      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
     while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
+      /* Perform the multiply-accumulate */
       /* sum += x[srcALen - srcBLen + 4] * y[3] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
+                      ((q63_t) *px++ * (*py++))) >> 32);
+
       /* sum += x[srcALen - srcBLen + 3] * y[2] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
+                      ((q63_t) *px++ * (*py++))) >> 32);
+
       /* sum += x[srcALen - srcBLen + 2] * y[1] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
+                      ((q63_t) *px++ * (*py++))) >> 32);
+
       /* sum += x[srcALen - srcBLen + 1] * y[0] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
+                      ((q63_t) *px++ * (*py++))) >> 32);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -569,11 +570,11 @@
 
     while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
+      /* Perform the multiply-accumulate */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
+                      ((q63_t) *px++ * (*py++))) >> 32);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -586,15 +587,15 @@
     px = ++pSrc1;
     py = pIn2;
 
-    /* Decrement the MAC count */
+    /* Decrement MAC count */
     count--;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize3--;
   }
 
 }
 
 /**
- * @} end of Corr group
+  @} end of Corr group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c b/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c
index 1eda719..d46d9a0 100644
--- a/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_correlate_opt_q15.c
  * Description:  Correlation of Q15 sequences
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,69 +29,58 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup Corr
- * @{
+  @addtogroup Corr
+  @{
  */
 
 /**
- * @brief Correlation of Q15 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
- * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @return none.
- *
- * \par Restrictions
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- *	In this case input, output, scratch buffers should be aligned by 32-bit
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * Both inputs are in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
- * This approach provides 33 guard bits and there is no risk of overflow.
- * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
- *
- * \par
- * Refer to <code>arm_correlate_fast_q15()</code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.
- *
- *
- */
+  @brief         Correlation of Q15 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @param[in]     pScratch   points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+  @return        none
 
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both inputs are in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   This approach provides 33 guard bits and there is no risk of overflow.
+                   The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
+
+ @remark
+                   Refer to \ref arm_correlate_fast_q15() for a faster but less precise version of this function.
+ */
 
 void arm_correlate_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch)
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch)
 {
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulators                  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t x1, x2, x3;                              /* temporary variables for holding input1 and input2 values */
-  uint32_t j, blkCnt, outBlockSize;              /* loop counter                 */
-  int32_t inc = 1;                               /* output pointer increment     */
-  uint32_t tapCnt;
-  q31_t y1, y2;
-  q15_t *pScr;                                   /* Intermediate pointers        */
-  q15_t *pOut = pDst;                            /* output pointer               */
-#ifdef UNALIGNED_SUPPORT_DISABLE
+        q63_t acc0;                                    /* Accumulators */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q15_t *pScr1;                                  /* Temporary pointer for scratch1 */
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+        uint32_t j, blkCnt, outBlockSize;              /* Loop counter */
+        int32_t inc = 1;                               /* Output pointer increment */
+        uint32_t tapCnt;
 
-  q15_t a, b;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc1, acc2, acc3;                        /* Accumulators */
+        q31_t x1, x2, x3;                              /* Temporary variables for holding input1 and input2 values */
+        q31_t y1, y2;                                  /* State variables */
+#endif
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -109,13 +98,13 @@
   if (srcALen >= srcBLen)
   {
     /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
+    pIn1 = pSrcA;
 
     /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
+    pIn2 = pSrcB;
 
     /* Number of output samples is calculated */
-    outBlockSize = (2U * srcALen) - 1U;
+    outBlockSize = (srcALen * 2U) - 1U;
 
     /* When srcALen > srcBLen, zero padding is done to srcB
      * to make their lengths equal.
@@ -125,15 +114,14 @@
 
     /* Updating the pointer position to non zero value */
     pOut += j;
-
   }
   else
   {
     /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
+    pIn1 = pSrcB;
 
     /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
+    pIn2 = pSrcA;
 
     /* srcBLen is always considered as shorter or equal to srcALen */
     j = srcBLen;
@@ -146,113 +134,43 @@
 
     /* Destination address modifier is set to -1 */
     inc = -1;
-
   }
 
-  pScr = pScratch;
+  pScr1 = pScratch;
 
   /* Fill (srcBLen - 1U) zeros in scratch buffer */
-  arm_fill_q15(0, pScr, (srcBLen - 1U));
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
 
   /* Update temporary scratch pointer */
-  pScr += (srcBLen - 1U);
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
+  pScr1 += (srcBLen - 1U);
 
   /* Copy (srcALen) samples in scratch buffer */
-  arm_copy_q15(pIn1, pScr, srcALen);
+  arm_copy_q15(pIn1, pScr1, srcALen);
 
   /* Update pointers */
-  //pIn1 += srcALen;
-  pScr += srcALen;
+  pScr1 += srcALen;
 
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  j = srcALen >> 2U;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while (j > 0U)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.
-   ** No loop unrolling is used. */
-  j = srcALen % 0x4U;
-
-  while (j > 0U)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
 
   /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr, (srcBLen - 1U));
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
 
   /* Update pointer */
-  pScr += (srcBLen - 1U);
-
-#else
-
-/* Apply loop unrolling and do 4 Copies simultaneously. */
-  j = (srcBLen - 1U) >> 2U;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while (j > 0U)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr++ = 0;
-    *pScr++ = 0;
-    *pScr++ = 0;
-    *pScr++ = 0;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.
-   ** No loop unrolling is used. */
-  j = (srcBLen - 1U) % 0x4U;
-
-  while (j > 0U)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr++ = 0;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
+  pScr1 += (srcBLen - 1U);
 
   /* Temporary pointer for scratch2 */
   py = pIn2;
 
 
   /* Actual correlation process starts here */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = (srcALen + srcBLen - 1U) >> 2;
 
   while (blkCnt > 0)
   {
     /* Initialze temporary scratch pointer as scratch1 */
-    pScr = pScratch;
+    pScr1 = pScratch;
 
     /* Clear Accumlators */
     acc0 = 0;
@@ -260,41 +178,42 @@
     acc2 = 0;
     acc3 = 0;
 
-    /* Read four samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr)++;
+    /* Read two samples from scratch1 buffer */
+    x1 = read_q15x2_ia (&pScr1);
 
-    /* Read next four samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr)++;
+    /* Read next two samples from scratch1 buffer */
+    x2 = read_q15x2_ia (&pScr1);
 
     tapCnt = (srcBLen) >> 2U;
 
     while (tapCnt > 0U)
     {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
       /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pIn2);
-      y2 = _SIMD32_OFFSET(pIn2 + 2U);
+      y1 = read_q15x2_ia ((q15_t **) &pIn2);
+      y2 = read_q15x2_ia ((q15_t **) &pIn2);
 
+      /* multiply and accumlate */
       acc0 = __SMLALD(x1, y1, acc0);
-
       acc2 = __SMLALD(x2, y1, acc2);
 
+      /* pack input data */
 #ifndef ARM_MATH_BIG_ENDIAN
       x3 = __PKHBT(x2, x1, 0);
 #else
       x3 = __PKHBT(x1, x2, 0);
 #endif
 
+      /* multiply and accumlate */
       acc1 = __SMLALDX(x3, y1, acc1);
 
-      x1 = _SIMD32_OFFSET(pScr);
+      /* Read next two samples from scratch1 buffer */
+      x1 = read_q15x2_ia (&pScr1);
 
+      /* multiply and accumlate */
       acc0 = __SMLALD(x2, y2, acc0);
-
       acc2 = __SMLALD(x1, y2, acc2);
 
+      /* pack input data */
 #ifndef ARM_MATH_BIG_ENDIAN
       x3 = __PKHBT(x1, x2, 0);
 #else
@@ -302,10 +221,9 @@
 #endif
 
       acc3 = __SMLALDX(x3, y1, acc3);
-
       acc1 = __SMLALDX(x3, y2, acc1);
 
-      x2 = _SIMD32_OFFSET(pScr + 2U);
+      x2 = read_q15x2_ia (&pScr1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
       x3 = __PKHBT(x2, x1, 0);
@@ -315,110 +233,27 @@
 
       acc3 = __SMLALDX(x3, y2, acc3);
 
-#else
-
-      /* Read four samples from smaller buffer */
-	  a = *pIn2;
-	  b = *(pIn2 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      y1 = __PKHBT(a, b, 16);
-#else
-      y1 = __PKHBT(b, a, 16);
-#endif
-
-	  a = *(pIn2 + 2);
-	  b = *(pIn2 + 3);
-#ifndef ARM_MATH_BIG_ENDIAN
-      y2 = __PKHBT(a, b, 16);
-#else
-      y2 = __PKHBT(b, a, 16);
-#endif
-
-      acc0 = __SMLALD(x1, y1, acc0);
-
-      acc2 = __SMLALD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc1 = __SMLALDX(x3, y1, acc1);
-
-	  a = *pScr;
-	  b = *(pScr + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(a, b, 16);
-#else
-      x1 = __PKHBT(b, a, 16);
-#endif
-
-      acc0 = __SMLALD(x2, y2, acc0);
-
-      acc2 = __SMLALD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y1, acc3);
-
-      acc1 = __SMLALDX(x3, y2, acc1);
-
-	  a = *(pScr + 2);
-	  b = *(pScr + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x2 = __PKHBT(a, b, 16);
-#else
-      x2 = __PKHBT(b, a, 16);
-#endif
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y2, acc3);
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-      pIn2 += 4U;
-
-      pScr += 4U;
-
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-
-
     /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr -= 4U;
-
+    pScr1 -= 4U;
 
     /* apply same above for remaining samples of smaller length sequence */
     tapCnt = (srcBLen) & 3U;
 
     while (tapCnt > 0U)
     {
-
       /* accumlate the results */
-      acc0 += (*pScr++ * *pIn2);
-      acc1 += (*pScr++ * *pIn2);
-      acc2 += (*pScr++ * *pIn2);
-      acc3 += (*pScr++ * *pIn2++);
+      acc0 += (*pScr1++ * *pIn2);
+      acc1 += (*pScr1++ * *pIn2);
+      acc2 += (*pScr1++ * *pIn2);
+      acc3 += (*pScr1++ * *pIn2++);
 
-      pScr -= 3U;
+      pScr1 -= 3U;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
@@ -439,17 +274,24 @@
     pIn2 = py;
 
     pScratch += 4U;
-
   }
 
 
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = (srcALen + srcBLen - 1U) & 0x3;
 
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (srcALen + srcBLen - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   /* Calculate correlation for remaining samples of Bigger length sequence */
   while (blkCnt > 0)
   {
     /* Initialze temporary scratch pointer as scratch1 */
-    pScr = pScratch;
+    pScr1 = pScratch;
 
     /* Clear Accumlators */
     acc0 = 0;
@@ -459,10 +301,11 @@
     while (tapCnt > 0U)
     {
 
-      acc0 += (*pScr++ * *pIn2++);
-      acc0 += (*pScr++ * *pIn2++);
+      /* Read next two samples from scratch1 buffer */
+      acc0 += (*pScr1++ * *pIn2++);
+      acc0 += (*pScr1++ * *pIn2++);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
@@ -471,31 +314,28 @@
     /* apply same above for remaining samples of smaller length sequence */
     while (tapCnt > 0U)
     {
-
       /* accumlate the results */
-      acc0 += (*pScr++ * *pIn2++);
+      acc0 += (*pScr1++ * *pIn2++);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
     blkCnt--;
 
-    /* Store the result in the accumulator in the destination buffer. */
+    /* The result is in 2.30 format.  Convert to 1.15 with saturation.
+       Then store the output in the destination buffer. */
     *pOut = (q15_t) (__SSAT((acc0 >> 15), 16));
-
     pOut += inc;
 
     /* Initialization of inputB pointer */
     pIn2 = py;
 
     pScratch += 1U;
-
   }
 
-
 }
 
 /**
- * @} end of Corr group
+  @} end of Corr group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c b/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c
index d4ff45e..035bfba 100644
--- a/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c
+++ b/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_correlate_opt_q7.c
  * Description:  Correlation of Q7 sequences
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,67 +29,53 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup Corr
- * @{
+  @addtogroup Corr
+  @{
  */
 
 /**
- * @brief Correlation of Q7 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
- * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
- * @return none.
- *
- *
- * \par Restrictions
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 32-bit internal accumulator.
- * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
- * This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
- * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format.
- *
- *
+  @brief         Correlation of Q7 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @param[in]     pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+  @param[in]     pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
+                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+                   This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
+                   The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.
  */
 
-
-
 void arm_correlate_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2)
 {
-  q7_t *pOut = pDst;                             /* output pointer                */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch */
-  q7_t *pIn1;                                    /* inputA pointer                */
-  q7_t *pIn2;                                    /* inputB pointer                */
-  q15_t *py;                                     /* Intermediate inputB pointer   */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators                  */
-  uint32_t j, k = 0U, blkCnt;                    /* loop counter                  */
-  int32_t inc = 1;                               /* output pointer increment          */
-  uint32_t outBlockSize;                         /* loop counter                  */
-  q15_t x4;                                      /* Temporary input variable      */
-  uint32_t tapCnt;                               /* loop counter                  */
-  q31_t x1, x2, x3, y1;                          /* Temporary input variables     */
+        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch */
+        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch */
+        q15_t x4;                                      /* Temporary input variable */
+        q15_t *py;                                     /* Temporary input2 pointer */
+        q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
+  const q7_t *pIn1, *pIn2;                             /* InputA and inputB pointer */
+        uint32_t j, k, blkCnt, tapCnt;                 /* Loop counter */
+        int32_t inc = 1;                               /* Output pointer increment */
+        uint32_t outBlockSize;                         /* Loop counter */
+        q31_t x1, x2, x3, y1;                          /* Temporary input variables */
+        q7_t *pOut = pDst;                             /* Output pointer */
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -107,13 +93,13 @@
   if (srcALen >= srcBLen)
   {
     /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
+    pIn1 = pSrcA;
 
     /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
+    pIn2 = pSrcB;
 
     /* Number of output samples is calculated */
-    outBlockSize = (2U * srcALen) - 1U;
+    outBlockSize = (srcALen * 2U) - 1U;
 
     /* When srcALen > srcBLen, zero padding is done to srcB
      * to make their lengths equal.
@@ -123,15 +109,14 @@
 
     /* Updating the pointer position to non zero value */
     pOut += j;
-
   }
   else
   {
     /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
+    pIn1 = pSrcB;
 
     /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
+    pIn2 = pSrcA;
 
     /* srcBLen is always considered as shorter or equal to srcALen */
     j = srcBLen;
@@ -144,7 +129,6 @@
 
     /* Destination address modifier is set to -1 */
     inc = -1;
-
   }
 
 
@@ -152,34 +136,34 @@
   k = srcBLen >> 2U;
 
   /* First part of the processing with loop unrolling copies 4 data points at a time.
-   ** a second loop below copies for the remaining 1 to 3 samples. */
+     a second loop below copies for the remaining 1 to 3 samples. */
   while (k > 0U)
   {
     /* copy second buffer in reversal manner */
-    x4 = (q15_t) * pIn2++;
+    x4 = (q15_t) *pIn2++;
     *pScr2++ = x4;
-    x4 = (q15_t) * pIn2++;
+    x4 = (q15_t) *pIn2++;
     *pScr2++ = x4;
-    x4 = (q15_t) * pIn2++;
+    x4 = (q15_t) *pIn2++;
     *pScr2++ = x4;
-    x4 = (q15_t) * pIn2++;
+    x4 = (q15_t) *pIn2++;
     *pScr2++ = x4;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     k--;
   }
 
   /* If the count is not a multiple of 4, copy remaining samples here.
-   ** No loop unrolling is used. */
+     No loop unrolling is used. */
   k = srcBLen % 0x4U;
 
   while (k > 0U)
   {
     /* copy second buffer in reversal manner for remaining samples */
-    x4 = (q15_t) * pIn2++;
+    x4 = (q15_t) *pIn2++;
     *pScr2++ = x4;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     k--;
   }
 
@@ -190,28 +174,29 @@
   pScr1 += (srcBLen - 1U);
 
   /* Copy (srcALen) samples in scratch buffer */
+  /* Apply loop unrolling and do 4 Copies simultaneously. */
   k = srcALen >> 2U;
 
   /* First part of the processing with loop unrolling copies 4 data points at a time.
-   ** a second loop below copies for the remaining 1 to 3 samples. */
+     a second loop below copies for the remaining 1 to 3 samples. */
   while (k > 0U)
   {
     /* copy second buffer in reversal manner */
-    x4 = (q15_t) * pIn1++;
+    x4 = (q15_t) *pIn1++;
     *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
+    x4 = (q15_t) *pIn1++;
     *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
+    x4 = (q15_t) *pIn1++;
     *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
+    x4 = (q15_t) *pIn1++;
     *pScr1++ = x4;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     k--;
   }
 
   /* If the count is not a multiple of 4, copy remaining samples here.
-   ** No loop unrolling is used. */
+     No loop unrolling is used. */
   k = srcALen % 0x4U;
 
   while (k > 0U)
@@ -224,49 +209,13 @@
     k--;
   }
 
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
   /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
   arm_fill_q15(0, pScr1, (srcBLen - 1U));
 
   /* Update pointer */
   pScr1 += (srcBLen - 1U);
 
-#else
-
-/* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = (srcBLen - 1U) >> 2U;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.
-   ** No loop unrolling is used. */
-  k = (srcBLen - 1U) % 0x4U;
-
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* Temporary pointer for second sequence */
+  /* Temporary pointer for scratch2 */
   py = pScratch2;
 
   /* Initialization of pScr2 pointer */
@@ -287,18 +236,17 @@
     acc3 = 0;
 
     /* Read two samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr1)++;
+    x1 = read_q15x2_ia (&pScr1);
 
     /* Read next two samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr1)++;
+    x2 = read_q15x2_ia (&pScr1);
 
     tapCnt = (srcBLen) >> 2U;
 
     while (tapCnt > 0U)
     {
-
       /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pScr2);
+      y1 = read_q15x2_ia (&pScr2);
 
       /* multiply and accumlate */
       acc0 = __SMLAD(x1, y1, acc0);
@@ -315,7 +263,7 @@
       acc1 = __SMLADX(x3, y1, acc1);
 
       /* Read next two samples from scratch1 buffer */
-      x1 = *__SIMD32(pScr1)++;
+      x1 = read_q15x2_ia (&pScr1);
 
       /* pack input data */
 #ifndef ARM_MATH_BIG_ENDIAN
@@ -327,7 +275,7 @@
       acc3 = __SMLADX(x3, y1, acc3);
 
       /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pScr2 + 2U);
+      y1 = read_q15x2_ia (&pScr2);
 
       acc0 = __SMLAD(x2, y1, acc0);
 
@@ -335,7 +283,7 @@
 
       acc1 = __SMLADX(x3, y1, acc1);
 
-      x2 = *__SIMD32(pScr1)++;
+      x2 = read_q15x2_ia (&pScr1);
 
 #ifndef ARM_MATH_BIG_ENDIAN
       x3 = __PKHBT(x2, x1, 0);
@@ -345,25 +293,18 @@
 
       acc3 = __SMLADX(x3, y1, acc3);
 
-      pScr2 += 4U;
-
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-
-
     /* Update scratch pointer for remaining samples of smaller length sequence */
     pScr1 -= 4U;
 
-
     /* apply same above for remaining samples of smaller length sequence */
     tapCnt = (srcBLen) & 3U;
 
     while (tapCnt > 0U)
     {
-
       /* accumlate the results */
       acc0 += (*pScr1++ * *pScr2);
       acc1 += (*pScr1++ * *pScr2);
@@ -372,7 +313,7 @@
 
       pScr1 -= 3U;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
@@ -392,10 +333,8 @@
     pScr2 = py;
 
     pScratch1 += 4U;
-
   }
 
-
   blkCnt = (srcALen + srcBLen - 1U) & 0x3;
 
   /* Calculate correlation for remaining samples of Bigger length sequence */
@@ -414,7 +353,7 @@
       acc0 += (*pScr1++ * *pScr2++);
       acc0 += (*pScr1++ * *pScr2++);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
@@ -423,11 +362,10 @@
     /* apply same above for remaining samples of smaller length sequence */
     while (tapCnt > 0U)
     {
-
       /* accumlate the results */
       acc0 += (*pScr1++ * *pScr2++);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
@@ -435,18 +373,16 @@
 
     /* Store the result in the accumulator in the destination buffer. */
     *pOut = (q7_t) (__SSAT(acc0 >> 7U, 8));
-
     pOut += inc;
 
     /* Initialization of inputB pointer */
     pScr2 = py;
 
     pScratch1 += 1U;
-
   }
 
 }
 
 /**
- * @} end of Corr group
+  @} end of Corr group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_correlate_q15.c b/DSP/Source/FilteringFunctions/arm_correlate_q15.c
index ce86db4..9837875 100644
--- a/DSP/Source/FilteringFunctions/arm_correlate_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_correlate_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_correlate_q15.c
  * Description:  Correlation of Q15 sequences
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,64 +29,58 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup Corr
- * @{
+  @addtogroup Corr
+  @{
  */
 
 /**
- * @brief Correlation of Q15 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * Both inputs are in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
- * This approach provides 33 guard bits and there is no risk of overflow.
- * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
- *
- * \par
- * Refer to <code>arm_correlate_fast_q15()</code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.
- *
- * \par
- * Refer the function <code>arm_correlate_opt_q15()</code> for a faster implementation of this function using scratch buffers.
- *
+  @brief         Correlation of Q15 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both inputs are in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   This approach provides 33 guard bits and there is no risk of overflow.
+                   The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
+
+  @remark
+                   Refer to \ref arm_correlate_fast_q15() for a faster but less precise version of this function.
+  @remark
+                   Refer to \ref arm_correlate_opt_q15() for a faster implementation of this function using scratch buffers.
  */
 
 void arm_correlate_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst)
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst)
 {
 
-#if (defined(ARM_MATH_CM7) || defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE)
+#if defined (ARM_MATH_DSP)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1;                                  /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0U, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
-
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+  const q15_t *pSrc1;                                  /* Intermediate pointers */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary input variables for holding input and coefficient values */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+        uint32_t outBlockSize;
+        int32_t inc = 1;                               /* Destination address modifier */
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -104,13 +98,13 @@
   if (srcALen >= srcBLen)
   {
     /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
+    pIn1 = pSrcA;
 
     /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
+    pIn2 = pSrcB;
 
     /* Number of output samples is calculated */
-    outBlockSize = (2U * srcALen) - 1U;
+    outBlockSize = (srcALen * 2U) - 1U;
 
     /* When srcALen > srcBLen, zero padding is done to srcB
      * to make their lengths equal.
@@ -120,15 +114,14 @@
 
     /* Updating the pointer position to non zero value */
     pOut += j;
-
   }
   else
   {
     /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
+    pIn1 = pSrcB;
 
     /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
+    pIn2 = pSrcA;
 
     /* srcBLen is always considered as shorter or equal to srcALen */
     j = srcBLen;
@@ -141,18 +134,18 @@
 
     /* Destination address modifier is set to -1 */
     inc = -1;
-
   }
 
   /* The function is internally
-   * divided into three parts according to the number of multiplications that has to be
-   * taken place between inputA samples and inputB samples. In the first part of the
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
    * algorithm, the multiplications increase by one for every iteration.
-   * In the second part of the algorithm, srcBLen number of multiplications are done.
-   * In the third part of the algorithm, the multiplications decrease by one
-   * for every iteration.*/
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
   /* The algorithm is implemented in three stages.
-   * The loop counters of each stage is initiated here. */
+     The loop counters of each stage is initiated here. */
   blockSize1 = srcBLen - 1U;
   blockSize2 = srcALen - (srcBLen - 1U);
   blockSize3 = blockSize1;
@@ -189,18 +182,19 @@
     sum = 0;
 
     /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
+    k = count >> 2U;
 
     /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
     while (k > 0U)
     {
+      /* Perform the multiply-accumulate */
       /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
-      sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
+      sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
       /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */
-      sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
+      sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -210,11 +204,11 @@
 
     while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
+      /* Perform the multiply-accumulate */
       /* x[0] * y[srcBLen - 1] */
       sum = __SMLALD(*px++, *py++, sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -227,10 +221,10 @@
     py = pSrc1 - count;
     px = pIn1;
 
-    /* Increment the MAC count */
+    /* Increment MAC count */
     count++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize1--;
   }
 
@@ -250,7 +244,7 @@
   /* Working pointer of inputB */
   py = pIn2;
 
-  /* count is index by which the pointer pIn1 to be incremented */
+  /* count is the index by which the pointer pIn1 to be incremented */
   count = 0U;
 
   /* -------------------
@@ -259,10 +253,10 @@
 
   /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
    * So, to loop unroll over blockSize2,
-   * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
+   * srcBLen should be greater than or equal to 4 */
   if (srcBLen >= 4U)
   {
-    /* Loop unroll over blockSize2, by 4 */
+    /* Loop unrolling: Compute 4 outputs at a time */
     blkCnt = blockSize2 >> 2U;
 
     while (blkCnt > 0U)
@@ -274,9 +268,10 @@
       acc3 = 0;
 
       /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
+      x0 = read_q15x2 ((q15_t *) px);
+
       /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px + 1);
+      x1 = read_q15x2 ((q15_t *) px + 1);
       px += 2U;
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
@@ -288,7 +283,7 @@
       {
         /* Read the first two inputB samples using SIMD:
          * y[0] and y[1] */
-        c0 = *__SIMD32(py)++;
+        c0 = read_q15x2_ia ((q15_t **) &py);
 
         /* acc0 +=  x[0] * y[0] + x[1] * y[1] */
         acc0 = __SMLALD(x0, c0, acc0);
@@ -297,10 +292,10 @@
         acc1 = __SMLALD(x1, c0, acc1);
 
         /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
+        x2 = read_q15x2 ((q15_t *) px);
 
         /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px + 1);
+        x3 = read_q15x2 ((q15_t *) px + 1);
 
         /* acc2 +=  x[2] * y[0] + x[3] * y[1] */
         acc2 = __SMLALD(x2, c0, acc2);
@@ -309,7 +304,7 @@
         acc3 = __SMLALD(x3, c0, acc3);
 
         /* Read y[2] and y[3] */
-        c0 = *__SIMD32(py)++;
+        c0 = read_q15x2_ia ((q15_t **) &py);
 
         /* acc0 +=  x[2] * y[2] + x[3] * y[3] */
         acc0 = __SMLALD(x2, c0, acc0);
@@ -318,11 +313,10 @@
         acc1 = __SMLALD(x3, c0, acc1);
 
         /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px + 2);
+        x0 = read_q15x2 ((q15_t *) px + 2);
 
         /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px + 3);
-
+        x1 = read_q15x2 ((q15_t *) px + 3);
         px += 4U;
 
         /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
@@ -342,21 +336,18 @@
         /* Read y[4] */
         c0 = *py;
 #ifdef  ARM_MATH_BIG_ENDIAN
-
         c0 = c0 << 16U;
-
 #else
-
         c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
 
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
         /* Read x[7] */
-        x3 = *__SIMD32(px);
+        x3 = read_q15x2 ((q15_t *) px);
         px++;
 
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALD(x0, c0, acc0);
-        acc1 = __SMLALD(x1, c0, acc1);
+        /* Perform the multiply-accumulate */
+        acc0 = __SMLALD (x0, c0, acc0);
+        acc1 = __SMLALD (x1, c0, acc1);
         acc2 = __SMLALDX(x1, c0, acc2);
         acc3 = __SMLALDX(x3, c0, acc3);
       }
@@ -364,16 +355,16 @@
       if (k == 2U)
       {
         /* Read y[4], y[5] */
-        c0 = *__SIMD32(py);
+        c0 = read_q15x2 ((q15_t *) py);
 
         /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
+        x3 = read_q15x2 ((q15_t *) px);
 
         /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px + 1);
+        x2 = read_q15x2 ((q15_t *) px + 1);
         px += 2U;
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         acc0 = __SMLALD(x0, c0, acc0);
         acc1 = __SMLALD(x1, c0, acc1);
         acc2 = __SMLALD(x3, c0, acc2);
@@ -383,15 +374,15 @@
       if (k == 3U)
       {
         /* Read y[4], y[5] */
-        c0 = *__SIMD32(py)++;
+        c0 = read_q15x2_ia ((q15_t **) &py);
 
         /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
+        x3 = read_q15x2 ((q15_t *) px);
 
         /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px + 1);
+        x2 = read_q15x2 ((q15_t *) px + 1);
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         acc0 = __SMLALD(x0, c0, acc0);
         acc1 = __SMLALD(x1, c0, acc1);
         acc2 = __SMLALD(x3, c0, acc2);
@@ -401,19 +392,18 @@
 
         /* Read y[6] */
 #ifdef  ARM_MATH_BIG_ENDIAN
-
         c0 = c0 << 16U;
 #else
-
         c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
         /* Read x[10] */
-        x3 = _SIMD32_OFFSET(px + 2);
+        x3 = read_q15x2 ((q15_t *) px + 2);
         px += 3U;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLALDX(x1, c0, acc0);
-        acc1 = __SMLALD(x2, c0, acc1);
+        acc1 = __SMLALD (x2, c0, acc1);
         acc2 = __SMLALDX(x2, c0, acc2);
         acc3 = __SMLALDX(x3, c0, acc3);
       }
@@ -439,7 +429,7 @@
       px = pIn1 + count;
       py = pIn2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
@@ -460,12 +450,12 @@
       while (k > 0U)
       {
         /* Perform the multiply-accumulates */
-        sum += ((q63_t) * px++ * *py++);
-        sum += ((q63_t) * px++ * *py++);
-        sum += ((q63_t) * px++ * *py++);
-        sum += ((q63_t) * px++ * *py++);
+        sum += ((q63_t) *px++ * *py++);
+        sum += ((q63_t) *px++ * *py++);
+        sum += ((q63_t) *px++ * *py++);
+        sum += ((q63_t) *px++ * *py++);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -476,7 +466,7 @@
       while (k > 0U)
       {
         /* Perform the multiply-accumulates */
-        sum += ((q63_t) * px++ * *py++);
+        sum += ((q63_t) *px++ * *py++);
 
         /* Decrement the loop counter */
         k--;
@@ -509,13 +499,13 @@
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
-      /* Loop over srcBLen */
+      /* srcBLen number of MACS should be performed */
       k = srcBLen;
 
       while (k > 0U)
       {
         /* Perform the multiply-accumulate */
-        sum += ((q63_t) * px++ * *py++);
+        sum += ((q63_t) *px++ * *py++);
 
         /* Decrement the loop counter */
         k--;
@@ -538,6 +528,7 @@
     }
   }
 
+
   /* --------------------------
    * Initializations of stage3
    * -------------------------*/
@@ -576,13 +567,13 @@
      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
     while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
+      /* Perform the multiply-accumulate */
       /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */
-      sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
+      sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
       /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */
-      sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
+      sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -592,10 +583,10 @@
 
     while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
+      /* Perform the multiply-accumulate */
       sum = __SMLALD(*px++, *py++, sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -608,23 +599,21 @@
     px = ++pSrc1;
     py = pIn2;
 
-    /* Decrement the MAC count */
+    /* Decrement MAC count */
     count--;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize3--;
   }
 
-#else
+#else /* #if defined (ARM_MATH_DSP) */
 
-/* Run the below code for Cortex-M0 */
-
-  q15_t *pIn1 = pSrcA;                           /* inputA pointer               */
-  q15_t *pIn2 = pSrcB + (srcBLen - 1U);          /* inputB pointer               */
-  q63_t sum;                                     /* Accumulators                  */
-  uint32_t i = 0U, j;                            /* loop counters */
-  uint32_t inv = 0U;                             /* Reverse order flag */
-  uint32_t tot = 0U;                             /* Length */
+  const q15_t *pIn1 = pSrcA;                           /* InputA pointer */
+  const q15_t *pIn2 = pSrcB + (srcBLen - 1U);          /* InputB pointer */
+        q63_t sum;                                     /* Accumulators */
+        uint32_t i = 0U, j;                            /* Loop counters */
+        uint32_t inv = 0U;                             /* Reverse order flag */
+        uint32_t tot = 0U;                             /* Length */
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -672,10 +661,9 @@
 
     /* Setting the reverse flag */
     inv = 1;
-
   }
 
-  /* Loop to calculate convolution for output length number of times */
+  /* Loop to calculate convolution for output length number of values */
   for (i = 0U; i <= tot; i++)
   {
     /* Initialize sum with zero to carry on MAC operations */
@@ -685,12 +673,13 @@
     for (j = 0U; j <= i; j++)
     {
       /* Check the array limitations */
-      if ((((i - j) < srcBLen) && (j < srcALen)))
+      if (((i - j) < srcBLen) && (j < srcALen))
       {
         /* z[i] += x[i-j] * y[j] */
         sum += ((q31_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
       }
     }
+
     /* Store the output in the destination buffer */
     if (inv == 1)
       *pDst-- = (q15_t) __SSAT((sum >> 15U), 16U);
@@ -698,10 +687,10 @@
       *pDst++ = (q15_t) __SSAT((sum >> 15U), 16U);
   }
 
-#endif /* #if (defined(ARM_MATH_CM7) || defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE) */
+#endif /* #if defined (ARM_MATH_DSP) */
 
 }
 
 /**
- * @} end of Corr group
+  @} end of Corr group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_correlate_q31.c b/DSP/Source/FilteringFunctions/arm_correlate_q31.c
index 3d7d3d0..caa2f51 100644
--- a/DSP/Source/FilteringFunctions/arm_correlate_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_correlate_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_correlate_q31.c
  * Description:  Correlation of Q31 sequences
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,63 +29,64 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup Corr
- * @{
+  @addtogroup Corr
+  @{
  */
 
 /**
- * @brief Correlation of Q31 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * There is no saturation on intermediate additions.
- * Thus, if the accumulator overflows it wraps around and distorts the result.
- * The input signals should be scaled down to avoid intermediate overflows.
- * Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a
- * maximum of min(srcALen, srcBLen) number of additions is carried internally.
- * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
- *
- * \par
- * See <code>arm_correlate_fast_q31()</code> for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.
+  @brief         Correlation of Q31 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   There is no saturation on intermediate additions.
+                   Thus, if the accumulator overflows it wraps around and distorts the result.
+                   The input signals should be scaled down to avoid intermediate overflows.
+                   Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a
+                   maximum of min(srcALen, srcBLen) number of additions is carried internally.
+                   The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
+
+  @remark
+                   Refer to \ref arm_correlate_fast_q31() for a faster but less precise implementation of this function.
  */
 
 void arm_correlate_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst)
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst)
 {
 
-#if defined (ARM_MATH_DSP)
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+  const q31_t *pIn1;                                   /* InputA pointer */
+  const q31_t *pIn2;                                   /* InputB pointer */
+        q31_t *pOut = pDst;                            /* Output pointer */
+  const q31_t *px;                                     /* Intermediate inputA pointer */
+  const q31_t *py;                                     /* Intermediate inputB pointer */
+  const q31_t *pSrc1;                                  /* Intermediate pointers */
+        q63_t sum;                                     /* Accumulators */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+        uint32_t outBlockSize;
+        int32_t inc = 1;                               /* Destination address modifier */
 
-  q31_t *pIn1;                                   /* inputA pointer               */
-  q31_t *pIn2;                                   /* inputB pointer               */
-  q31_t *pOut = pDst;                            /* output pointer               */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1;                                  /* Intermediate pointers        */
-  q63_t sum, acc0, acc1, acc2;                   /* Accumulators                  */
-  q31_t x0, x1, x2, c0;                          /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0U, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
-
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc0, acc1, acc2;                        /* Accumulators */
+        q31_t x0, x1, x2, c0;                          /* Temporary variables for holding input and coefficient values */
+#endif
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -103,10 +104,10 @@
   if (srcALen >= srcBLen)
   {
     /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
+    pIn1 = pSrcA;
 
     /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
+    pIn2 = pSrcB;
 
     /* Number of output samples is calculated */
     outBlockSize = (2U * srcALen) - 1U;
@@ -119,15 +120,14 @@
 
     /* Updating the pointer position to non zero value */
     pOut += j;
-
   }
   else
   {
     /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
+    pIn1 = pSrcB;
 
     /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
+    pIn2 = pSrcA;
 
     /* srcBLen is always considered as shorter or equal to srcALen */
     j = srcBLen;
@@ -140,18 +140,18 @@
 
     /* Destination address modifier is set to -1 */
     inc = -1;
-
   }
 
   /* The function is internally
-   * divided into three parts according to the number of multiplications that has to be
-   * taken place between inputA samples and inputB samples. In the first part of the
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
    * algorithm, the multiplications increase by one for every iteration.
-   * In the second part of the algorithm, srcBLen number of multiplications are done.
-   * In the third part of the algorithm, the multiplications decrease by one
-   * for every iteration.*/
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
   /* The algorithm is implemented in three stages.
-   * The loop counters of each stage is initiated here. */
+     The loop counters of each stage is initiated here. */
   blockSize1 = srcBLen - 1U;
   blockSize2 = srcALen - (srcBLen - 1U);
   blockSize3 = blockSize1;
@@ -177,6 +177,7 @@
   pSrc1 = pIn2 + (srcBLen - 1U);
   py = pSrc1;
 
+
   /* ------------------------
    * Stage1 process
    * ----------------------*/
@@ -187,37 +188,46 @@
     /* Accumulator is made zero for every iteration */
     sum = 0;
 
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
     while (k > 0U)
     {
       /* x[0] * y[srcBLen - 4] */
-      sum += (q63_t) * px++ * (*py++);
-      /* x[1] * y[srcBLen - 3] */
-      sum += (q63_t) * px++ * (*py++);
-      /* x[2] * y[srcBLen - 2] */
-      sum += (q63_t) * px++ * (*py++);
-      /* x[3] * y[srcBLen - 1] */
-      sum += (q63_t) * px++ * (*py++);
+      sum += (q63_t) *px++ * (*py++);
 
-      /* Decrement the loop counter */
+      /* x[1] * y[srcBLen - 3] */
+      sum += (q63_t) *px++ * (*py++);
+
+      /* x[2] * y[srcBLen - 2] */
+      sum += (q63_t) *px++ * (*py++);
+
+      /* x[3] * y[srcBLen - 1] */
+      sum += (q63_t) *px++ * (*py++);
+
+      /* Decrement loop counter */
       k--;
     }
 
-    /* If the count is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     k = count % 0x4U;
 
+#else
+
+    /* Initialize k with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
+      /* Perform the multiply-accumulate */
       /* x[0] * y[srcBLen - 1] */
-      sum += (q63_t) * px++ * (*py++);
+      sum += (q63_t) *px++ * (*py++);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -230,10 +240,10 @@
     py = pSrc1 - count;
     px = pIn1;
 
-    /* Increment the MAC count */
+    /* Increment MAC count */
     count++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize1--;
   }
 
@@ -265,6 +275,8 @@
    * srcBLen should be greater than or equal to 4 */
   if (srcBLen >= 4U)
   {
+#if defined (ARM_MATH_LOOPUNROLL)
+
     /* Loop unroll by 3 */
     blkCnt = blockSize2 / 3;
 
@@ -276,8 +288,8 @@
       acc2 = 0;
 
       /* read x[0], x[1] samples */
-      x0 = *(px++);
-      x1 = *(px++);
+      x0 = *px++;
+      x1 = *px++;
 
       /* Apply loop unrolling and compute 3 MACs simultaneously. */
       k = srcBLen / 3;
@@ -288,7 +300,6 @@
       {
         /* Read y[0] sample */
         c0 = *(py);
-
         /* Read x[2] sample */
         x2 = *(px);
 
@@ -302,11 +313,10 @@
 
         /* Read y[1] sample */
         c0 = *(py + 1U);
-
         /* Read x[3] sample */
         x0 = *(px + 1U);
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         /* acc0 +=  x[1] * y[1] */
         acc0 += ((q63_t) x1 * c0);
         /* acc1 +=  x[2] * y[1] */
@@ -316,11 +326,10 @@
 
         /* Read y[2] sample */
         c0 = *(py + 2U);
-
         /* Read x[4] sample */
         x1 = *(px + 2U);
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         /* acc0 +=  x[2] * y[2] */
         acc0 += ((q63_t) x2 * c0);
         /* acc1 +=  x[3] * y[2] */
@@ -358,7 +367,7 @@
         x0 = x1;
         x1 = x2;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -380,45 +389,56 @@
       px = pIn1 + count;
       py = pIn2;
 
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
-    /* If the blockSize2 is not a multiple of 3, compute any remaining output samples here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     blkCnt = blockSize2 - 3 * (blockSize2 / 3);
 
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (blkCnt > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
       k = srcBLen >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
       while (k > 0U)
       {
         /* Perform the multiply-accumulates */
-        sum += (q63_t) * px++ * (*py++);
-        sum += (q63_t) * px++ * (*py++);
-        sum += (q63_t) * px++ * (*py++);
-        sum += (q63_t) * px++ * (*py++);
+        sum += (q63_t) *px++ * *py++;
+        sum += (q63_t) *px++ * *py++;
+        sum += (q63_t) *px++ * *py++;
+        sum += (q63_t) *px++ * *py++;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
+      /* Loop unrolling: Compute remaining outputs */
       k = srcBLen % 0x4U;
 
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
       while (k > 0U)
       {
         /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py++);
+        sum += (q63_t) *px++ * *py++;
 
         /* Decrement the loop counter */
         k--;
@@ -429,14 +449,14 @@
       /* Destination pointer is updated according to the address modifier, inc */
       pOut += inc;
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;
       py = pIn2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
@@ -451,13 +471,13 @@
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
-      /* Loop over srcBLen */
+      /* srcBLen number of MACS should be performed */
       k = srcBLen;
 
       while (k > 0U)
       {
         /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py++);
+        sum += (q63_t) *px++ * *py++;
 
         /* Decrement the loop counter */
         k--;
@@ -468,18 +488,19 @@
       /* Destination pointer is updated according to the address modifier, inc */
       pOut += inc;
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;
       py = pIn2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
 
+
   /* --------------------------
    * Initializations of stage3
    * -------------------------*/
@@ -511,37 +532,46 @@
     /* Accumulator is made zero for every iteration */
     sum = 0;
 
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
     k = count >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
     while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
+      /* Perform the multiply-accumulate */
       /* sum += x[srcALen - srcBLen + 4] * y[3] */
-      sum += (q63_t) * px++ * (*py++);
-      /* sum += x[srcALen - srcBLen + 3] * y[2] */
-      sum += (q63_t) * px++ * (*py++);
-      /* sum += x[srcALen - srcBLen + 2] * y[1] */
-      sum += (q63_t) * px++ * (*py++);
-      /* sum += x[srcALen - srcBLen + 1] * y[0] */
-      sum += (q63_t) * px++ * (*py++);
+      sum += (q63_t) *px++ * *py++;
 
-      /* Decrement the loop counter */
+      /* sum += x[srcALen - srcBLen + 3] * y[2] */
+      sum += (q63_t) *px++ * *py++;
+
+      /* sum += x[srcALen - srcBLen + 2] * y[1] */
+      sum += (q63_t) *px++ * *py++;
+
+      /* sum += x[srcALen - srcBLen + 1] * y[0] */
+      sum += (q63_t) *px++ * *py++;
+
+      /* Decrement loop counter */
       k--;
     }
 
-    /* If the count is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     k = count % 0x4U;
 
+#else
+
+    /* Initialize blkCnt with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
-      sum += (q63_t) * px++ * (*py++);
+      /* Perform the multiply-accumulate */
+      sum += (q63_t) *px++ * *py++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -554,23 +584,22 @@
     px = ++pSrc1;
     py = pIn2;
 
-    /* Decrement the MAC count */
+    /* Decrement MAC count */
     count--;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize3--;
   }
 
 #else
+/* alternate version for CM0_FAMILY */
 
-  /* Run the below code for Cortex-M0 */
-
-  q31_t *pIn1 = pSrcA;                           /* inputA pointer               */
-  q31_t *pIn2 = pSrcB + (srcBLen - 1U);          /* inputB pointer               */
-  q63_t sum;                                     /* Accumulators                  */
-  uint32_t i = 0U, j;                            /* loop counters */
-  uint32_t inv = 0U;                             /* Reverse order flag */
-  uint32_t tot = 0U;                             /* Length */
+  const q31_t *pIn1 = pSrcA;                           /* InputA pointer */
+  const q31_t *pIn2 = pSrcB + (srcBLen - 1U);          /* InputB pointer */
+        q63_t sum;                                     /* Accumulators */
+        uint32_t i = 0U, j;                            /* Loop counters */
+        uint32_t inv = 0U;                             /* Reverse order flag */
+        uint32_t tot = 0U;                             /* Length */
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -618,25 +647,25 @@
 
     /* Setting the reverse flag */
     inv = 1;
-
   }
 
   /* Loop to calculate correlation for output length number of times */
   for (i = 0U; i <= tot; i++)
   {
-    /* Initialize sum with zero to carry on MAC operations */
+    /* Initialize sum with zero to carry out MAC operations */
     sum = 0;
 
     /* Loop to perform MAC operations according to correlation equation */
     for (j = 0U; j <= i; j++)
     {
       /* Check the array limitations */
-      if ((((i - j) < srcBLen) && (j < srcALen)))
+      if (((i - j) < srcBLen) && (j < srcALen))
       {
         /* z[i] += x[i-j] * y[j] */
         sum += ((q63_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
       }
     }
+
     /* Store the output in the destination buffer */
     if (inv == 1)
       *pDst-- = (q31_t) (sum >> 31U);
@@ -644,10 +673,10 @@
       *pDst++ = (q31_t) (sum >> 31U);
   }
 
-#endif /*   #if defined (ARM_MATH_DSP) */
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
 
 }
 
 /**
- * @} end of Corr group
+  @} end of Corr group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_correlate_q7.c b/DSP/Source/FilteringFunctions/arm_correlate_q7.c
index dc5247f..e5881ac 100644
--- a/DSP/Source/FilteringFunctions/arm_correlate_q7.c
+++ b/DSP/Source/FilteringFunctions/arm_correlate_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_correlate_q7.c
  * Description:  Correlation of Q7 sequences
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,64 +29,63 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup Corr
- * @{
+  @addtogroup Corr
+  @{
  */
 
 /**
- * @brief Correlation of Q7 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 32-bit internal accumulator.
- * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
- * This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
- * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format.
- *
- * \par
- * Refer the function <code>arm_correlate_opt_q7()</code> for a faster implementation of this function.
- *
+  @brief         Correlation of Q7 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
+                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+                   This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
+                   The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format.
+
+ @remark
+                   Refer to \ref arm_correlate_opt_q7() for a faster implementation of this function.
  */
 
 void arm_correlate_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst)
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst)
 {
 
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
 
-#if defined (ARM_MATH_DSP)
+  const q7_t *pIn1;                                    /* InputA pointer */
+  const q7_t *pIn2;                                    /* InputB pointer */
+        q7_t *pOut = pDst;                             /* Output pointer */
+  const q7_t *px;                                      /* Intermediate inputA pointer */
+  const q7_t *py;                                      /* Intermediate inputB pointer */
+  const q7_t *pSrc1;                                   /* Intermediate pointers */
+        q31_t sum;                                     /* Accumulators */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+        uint32_t outBlockSize;
+        int32_t inc = 1;
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t *pIn1;                                    /* inputA pointer               */
-  q7_t *pIn2;                                    /* inputB pointer               */
-  q7_t *pOut = pDst;                             /* output pointer               */
-  q7_t *px;                                      /* Intermediate inputA pointer  */
-  q7_t *py;                                      /* Intermediate inputB pointer  */
-  q7_t *pSrc1;                                   /* Intermediate pointers        */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q31_t input1, input2;                          /* temporary variables */
-  q15_t in1, in2;                                /* temporary variables */
-  q7_t x0, x1, x2, x3, c0, c1;                   /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0U, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;
-
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
+        q31_t input1, input2;                          /* Temporary input variables */
+        q15_t in1, in2;                                /* Temporary input variables */
+        q7_t x0, x1, x2, x3, c0, c1;                   /* Temporary variables for holding input and coefficient values */
+#endif
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -104,10 +103,10 @@
   if (srcALen >= srcBLen)
   {
     /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
+    pIn1 = pSrcA;
 
     /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
+    pIn2 = pSrcB;
 
     /* Number of output samples is calculated */
     outBlockSize = (2U * srcALen) - 1U;
@@ -120,15 +119,14 @@
 
     /* Updating the pointer position to non zero value */
     pOut += j;
-
   }
   else
   {
     /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
+    pIn1 = pSrcB;
 
     /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
+    pIn2 = pSrcA;
 
     /* srcBLen is always considered as shorter or equal to srcALen */
     j = srcBLen;
@@ -141,18 +139,18 @@
 
     /* Destination address modifier is set to -1 */
     inc = -1;
-
   }
 
   /* The function is internally
-   * divided into three parts according to the number of multiplications that has to be
-   * taken place between inputA samples and inputB samples. In the first part of the
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
    * algorithm, the multiplications increase by one for every iteration.
-   * In the second part of the algorithm, srcBLen number of multiplications are done.
-   * In the third part of the algorithm, the multiplications decrease by one
-   * for every iteration.*/
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
   /* The algorithm is implemented in three stages.
-   * The loop counters of each stage is initiated here. */
+     The loop counters of each stage is initiated here. */
   blockSize1 = srcBLen - 1U;
   blockSize2 = srcALen - (srcBLen - 1U);
   blockSize3 = blockSize1;
@@ -188,21 +186,21 @@
     /* Accumulator is made zero for every iteration */
     sum = 0;
 
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
     while (k > 0U)
     {
       /* x[0] , x[1] */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
       /* y[srcBLen - 4] , y[srcBLen - 3] */
-      in1 = (q15_t) * py++;
-      in2 = (q15_t) * py++;
+      in1 = (q15_t) *py++;
+      in2 = (q15_t) *py++;
       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
       /* x[0] * y[srcBLen - 4] */
@@ -210,40 +208,45 @@
       sum = __SMLAD(input1, input2, sum);
 
       /* x[2] , x[3] */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
       /* y[srcBLen - 2] , y[srcBLen - 1] */
-      in1 = (q15_t) * py++;
-      in2 = (q15_t) * py++;
+      in1 = (q15_t) *py++;
+      in2 = (q15_t) *py++;
       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
       /* x[2] * y[srcBLen - 2] */
       /* x[3] * y[srcBLen - 1] */
       sum = __SMLAD(input1, input2, sum);
 
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
-    /* If the count is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     k = count % 0x4U;
 
+#else
+
+    /* Initialize k with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
+      /* Perform the multiply-accumulate */
       /* x[0] * y[srcBLen - 1] */
-      sum += (q31_t) ((q15_t) * px++ * *py++);
+      sum += (q31_t) ((q15_t) *px++ * *py++);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
     /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q7_t) (__SSAT(sum >> 7, 8));
+    *pOut = (q7_t) (__SSAT(sum >> 7U, 8));
     /* Destination pointer is updated according to the address modifier, inc */
     pOut += inc;
 
@@ -251,10 +254,10 @@
     py = pSrc1 - count;
     px = pIn1;
 
-    /* Increment the MAC count */
+    /* Increment MAC count */
     count++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize1--;
   }
 
@@ -286,7 +289,9 @@
    * srcBLen should be greater than or equal to 4 */
   if (srcBLen >= 4U)
   {
-    /* Loop unroll over blockSize2, by 4 */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
     blkCnt = blockSize2 >> 2U;
 
     while (blkCnt > 0U)
@@ -321,13 +326,13 @@
         in1 = (q15_t) x0;
         in2 = (q15_t) x1;
 
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* y[0] and y[1] are packed */
         in1 = (q15_t) c0;
         in2 = (q15_t) c1;
 
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* acc0 += x[0] * y[0] + x[1] * y[1]  */
         acc0 = __SMLAD(input1, input2, acc0);
@@ -336,7 +341,7 @@
         in1 = (q15_t) x1;
         in2 = (q15_t) x2;
 
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* acc1 += x[1] * y[0] + x[2] * y[1] */
         acc1 = __SMLAD(input1, input2, acc1);
@@ -345,19 +350,19 @@
         in1 = (q15_t) x2;
         in2 = (q15_t) x3;
 
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* acc2 += x[2] * y[0] + x[3] * y[1]  */
         acc2 = __SMLAD(input1, input2, acc2);
 
         /* Read x[4] sample */
-        x0 = *(px++);
+        x0 = *px++;
 
         /* x[3] and x[4] are packed */
         in1 = (q15_t) x3;
         in2 = (q15_t) x0;
 
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* acc3 += x[3] * y[0] + x[4] * y[1]  */
         acc3 = __SMLAD(input1, input2, acc3);
@@ -374,13 +379,13 @@
         in1 = (q15_t) x2;
         in2 = (q15_t) x3;
 
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* y[2] and y[3] are packed */
         in1 = (q15_t) c0;
         in2 = (q15_t) c1;
 
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* acc0 += x[2] * y[2] + x[3] * y[3]  */
         acc0 = __SMLAD(input1, input2, acc0);
@@ -389,7 +394,7 @@
         in1 = (q15_t) x3;
         in2 = (q15_t) x0;
 
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* acc1 += x[3] * y[2] + x[4] * y[3]  */
         acc1 = __SMLAD(input1, input2, acc1);
@@ -398,7 +403,7 @@
         in1 = (q15_t) x0;
         in2 = (q15_t) x1;
 
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* acc2 += x[4] * y[2] + x[5] * y[3]  */
         acc2 = __SMLAD(input1, input2, acc2);
@@ -410,7 +415,7 @@
         in1 = (q15_t) x1;
         in2 = (q15_t) x2;
 
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* acc3 += x[5] * y[2] + x[6] * y[3]  */
         acc3 = __SMLAD(input1, input2, acc3);
@@ -425,7 +430,6 @@
       {
         /* Read y[4] sample */
         c0 = *py++;
-
         /* Read x[7] sample */
         x3 = *px++;
 
@@ -444,7 +448,7 @@
         x1 = x2;
         x2 = x3;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -467,76 +471,89 @@
       px = pIn1 + count;
       py = pIn2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     blkCnt = blockSize2 % 0x4U;
 
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (blkCnt > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
       k = srcBLen >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
       while (k > 0U)
       {
+
         /* Reading two inputs of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* Reading two inputs of SrcB buffer and packing */
-        in1 = (q15_t) * py++;
-        in2 = (q15_t) * py++;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        in1 = (q15_t) *py++;
+        in2 = (q15_t) *py++;
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         sum = __SMLAD(input1, input2, sum);
 
         /* Reading two inputs of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* Reading two inputs of SrcB buffer and packing */
-        in1 = (q15_t) * py++;
-        in2 = (q15_t) * py++;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        in1 = (q15_t) *py++;
+        in2 = (q15_t) *py++;
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         sum = __SMLAD(input1, input2, sum);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
+      /* Loop unrolling: Compute remaining outputs */
       k = srcBLen % 0x4U;
 
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
       while (k > 0U)
       {
-        /* Perform the multiply-accumulates */
-        sum += ((q15_t) * px++ * *py++);
+        /* Perform the multiply-accumulate */
+        sum += ((q15_t) *px++ * *py++);
 
         /* Decrement the loop counter */
         k--;
       }
 
       /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q7_t) (__SSAT(sum >> 7, 8));
+      *pOut = (q7_t) (__SSAT(sum >> 7U, 8));
       /* Destination pointer is updated according to the address modifier, inc */
       pOut += inc;
 
       /* Increment the pointer pIn1 index, count by 1 */
-	  count++;
+      count++;
 
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;
@@ -557,20 +574,20 @@
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
-      /* Loop over srcBLen */
+      /* srcBLen number of MACS should be performed */
       k = srcBLen;
 
       while (k > 0U)
       {
         /* Perform the multiply-accumulate */
-        sum += ((q15_t) * px++ * *py++);
+        sum += ((q15_t) *px++ * *py++);
 
         /* Decrement the loop counter */
         k--;
       }
 
       /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q7_t) (__SSAT(sum >> 7, 8));
+      *pOut = (q7_t) (__SSAT(sum >> 7U, 8));
       /* Destination pointer is updated according to the address modifier, inc */
       pOut += inc;
 
@@ -581,12 +598,12 @@
       px = pIn1 + count;
       py = pIn2;
 
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
 
+
   /* --------------------------
    * Initializations of stage3
    * -------------------------*/
@@ -618,60 +635,66 @@
     /* Accumulator is made zero for every iteration */
     sum = 0;
 
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
     k = count >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
     while (k > 0U)
     {
       /* x[srcALen - srcBLen + 1] , x[srcALen - srcBLen + 2]  */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
+      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
       /* y[0] , y[1] */
-      in1 = (q15_t) * py++;
-      in2 = (q15_t) * py++;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+      in1 = (q15_t) *py++;
+      in2 = (q15_t) *py++;
+      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
       /* sum += x[srcALen - srcBLen + 1] * y[0] */
       /* sum += x[srcALen - srcBLen + 2] * y[1] */
       sum = __SMLAD(input1, input2, sum);
 
       /* x[srcALen - srcBLen + 3] , x[srcALen - srcBLen + 4] */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
+      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
       /* y[2] , y[3] */
-      in1 = (q15_t) * py++;
-      in2 = (q15_t) * py++;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+      in1 = (q15_t) *py++;
+      in2 = (q15_t) *py++;
+      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
       /* sum += x[srcALen - srcBLen + 3] * y[2] */
       /* sum += x[srcALen - srcBLen + 4] * y[3] */
       sum = __SMLAD(input1, input2, sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
-    /* If the count is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     k = count % 0x4U;
 
+#else
+
+    /* Initialize blkCnt with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
-      sum += ((q15_t) * px++ * *py++);
+      /* Perform the multiply-accumulate */
+      sum += ((q15_t) *px++ * *py++);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
     /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q7_t) (__SSAT(sum >> 7, 8));
+    *pOut = (q7_t) (__SSAT(sum >> 7U, 8));
     /* Destination pointer is updated according to the address modifier, inc */
     pOut += inc;
 
@@ -679,23 +702,22 @@
     px = ++pSrc1;
     py = pIn2;
 
-    /* Decrement the MAC count */
+    /* Decrement MAC count */
     count--;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize3--;
   }
 
 #else
+/* alternate version for CM0_FAMILY */
 
-/* Run the below code for Cortex-M0 */
-
-  q7_t *pIn1 = pSrcA;                            /* inputA pointer */
-  q7_t *pIn2 = pSrcB + (srcBLen - 1U);           /* inputB pointer */
-  q31_t sum;                                     /* Accumulator */
-  uint32_t i = 0U, j;                            /* loop counters */
-  uint32_t inv = 0U;                             /* Reverse order flag */
-  uint32_t tot = 0U;                             /* Length */
+  const q7_t *pIn1 = pSrcA;                            /* InputA pointer */
+  const q7_t *pIn2 = pSrcB + (srcBLen - 1U);           /* InputB pointer */
+        q31_t sum;                                     /* Accumulator */
+        uint32_t i = 0U, j;                            /* Loop counters */
+        uint32_t inv = 0U;                             /* Reverse order flag */
+        uint32_t tot = 0U;                             /* Length */
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -743,25 +765,25 @@
 
     /* Setting the reverse flag */
     inv = 1;
-
   }
 
   /* Loop to calculate convolution for output length number of times */
   for (i = 0U; i <= tot; i++)
   {
-    /* Initialize sum with zero to carry on MAC operations */
+    /* Initialize sum with zero to carry out MAC operations */
     sum = 0;
 
     /* Loop to perform MAC operations according to convolution equation */
     for (j = 0U; j <= i; j++)
     {
       /* Check the array limitations */
-      if ((((i - j) < srcBLen) && (j < srcALen)))
+      if (((i - j) < srcBLen) && (j < srcALen))
       {
         /* z[i] += x[i-j] * y[j] */
         sum += ((q15_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
       }
     }
+
     /* Store the output in the destination buffer */
     if (inv == 1)
       *pDst-- = (q7_t) __SSAT((sum >> 7U), 8U);
@@ -769,10 +791,10 @@
       *pDst++ = (q7_t) __SSAT((sum >> 7U), 8U);
   }
 
-#endif /*   #if defined (ARM_MATH_DSP) */
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
 
 }
 
 /**
- * @} end of Corr group
+  @} end of Corr group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c b/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c
index 160dc2a..218ca34 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_decimate_f32.c
  * Description:  FIR decimation for floating-point sequences
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,127 +29,130 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @defgroup FIR_decimate Finite Impulse Response (FIR) Decimator
- *
- * These functions combine an FIR filter together with a decimator.
- * They are used in multirate systems for reducing the sample rate of a signal without introducing aliasing distortion.
- * Conceptually, the functions are equivalent to the block diagram below:
- * \image html FIRDecimator.gif "Components included in the FIR Decimator functions"
- * When decimating by a factor of <code>M</code>, the signal should be prefiltered by a lowpass filter with a normalized
- * cutoff frequency of <code>1/M</code> in order to prevent aliasing distortion.
- * The user of the function is responsible for providing the filter coefficients.
- *
- * The FIR decimator functions provided in the CMSIS DSP Library combine the FIR filter and the decimator in an efficient manner.
- * Instead of calculating all of the FIR filter outputs and discarding <code>M-1</code> out of every <code>M</code>, only the
- * samples output by the decimator are computed.
- * The functions operate on blocks of input and output data.
- * <code>pSrc</code> points to an array of <code>blockSize</code> input values and
- * <code>pDst</code> points to an array of <code>blockSize/M</code> output values.
- * In order to have an integer number of output samples <code>blockSize</code>
- * must always be a multiple of the decimation factor <code>M</code>.
- *
- * The library provides separate functions for Q15, Q31 and floating-point data types.
- *
- * \par Algorithm:
- * The FIR portion of the algorithm uses the standard form filter:
- * <pre>
- *    y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
- * </pre>
- * where, <code>b[n]</code> are the filter coefficients.
- * \par
- * The <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
- * Coefficients are stored in time reversed order.
- * \par
- * <pre>
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * \par
- * <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
- * Samples in the state buffer are stored in the order:
- * \par
- * <pre>
- *    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
- * </pre>
- * The state variables are updated after each block of data is processed, the coefficients are untouched.
- *
- * \par Instance Structure
- * The coefficients and state variables for a filter are stored together in an instance data structure.
- * A separate instance structure must be defined for each filter.
- * Coefficient arrays may be shared among several instances while state variable array should be allocated separately.
- * There are separate instance structure declarations for each of the 3 supported data types.
- *
- * \par Initialization Functions
- * There is also an associated initialization function for each data type.
- * The initialization function performs the following operations:
- * - Sets the values of the internal structure fields.
- * - Zeros out the values in the state buffer.
- * - Checks to make sure that the size of the input is a multiple of the decimation factor.
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numTaps, pCoeffs, M (decimation factor), pState. Also set all of the values in pState to zero.
- *
- * \par
- * Use of the initialization function is optional.
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
- * To place an instance structure into a const data section, the instance structure must be manually initialized.
- * The code below statically initializes each of the 3 different data type filter instance structures
- * <pre>
- *arm_fir_decimate_instance_f32 S = {M, numTaps, pCoeffs, pState};
- *arm_fir_decimate_instance_q31 S = {M, numTaps, pCoeffs, pState};
- *arm_fir_decimate_instance_q15 S = {M, numTaps, pCoeffs, pState};
- * </pre>
- * where <code>M</code> is the decimation factor; <code>numTaps</code> is the number of filter coefficients in the filter;
- * <code>pCoeffs</code> is the address of the coefficient buffer;
- * <code>pState</code> is the address of the state buffer.
- * Be sure to set the values in the state buffer to zeros when doing static initialization.
- *
- * \par Fixed-Point Behavior
- * Care must be taken when using the fixed-point versions of the FIR decimate filter functions.
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
- * Refer to the function specific documentation below for usage guidelines.
+  @defgroup FIR_decimate Finite Impulse Response (FIR) Decimator
+
+  These functions combine an FIR filter together with a decimator.
+  They are used in multirate systems for reducing the sample rate of a signal without introducing aliasing distortion.
+  Conceptually, the functions are equivalent to the block diagram below:
+  \image html FIRDecimator.gif "Components included in the FIR Decimator functions"
+  When decimating by a factor of <code>M</code>, the signal should be prefiltered by a lowpass filter with a normalized
+  cutoff frequency of <code>1/M</code> in order to prevent aliasing distortion.
+  The user of the function is responsible for providing the filter coefficients.
+
+  The FIR decimator functions provided in the CMSIS DSP Library combine the FIR filter and the decimator in an efficient manner.
+  Instead of calculating all of the FIR filter outputs and discarding <code>M-1</code> out of every <code>M</code>, only the
+  samples output by the decimator are computed.
+  The functions operate on blocks of input and output data.
+  <code>pSrc</code> points to an array of <code>blockSize</code> input values and
+  <code>pDst</code> points to an array of <code>blockSize/M</code> output values.
+  In order to have an integer number of output samples <code>blockSize</code>
+  must always be a multiple of the decimation factor <code>M</code>.
+
+  The library provides separate functions for Q15, Q31 and floating-point data types.
+
+  @par           Algorithm:
+                   The FIR portion of the algorithm uses the standard form filter:
+  <pre>
+      y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
+  </pre>
+                   where, <code>b[n]</code> are the filter coefficients.
+  @par
+                   The <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
+                   Coefficients are stored in time reversed order.
+  @par
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+  @par
+                   <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
+                   Samples in the state buffer are stored in the order:
+  @par
+  <pre>
+      {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
+  </pre>
+                   The state variables are updated after each block of data is processed, the coefficients are untouched.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable array should be allocated separately.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+
+ @par            Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   - Checks to make sure that the size of the input is a multiple of the decimation factor.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numTaps, pCoeffs, M (decimation factor), pState. Also set all of the values in pState to zero.
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   The code below statically initializes each of the 3 different data type filter instance structures
+  <pre>
+      arm_fir_decimate_instance_f32 S = {M, numTaps, pCoeffs, pState};
+      arm_fir_decimate_instance_q31 S = {M, numTaps, pCoeffs, pState};
+      arm_fir_decimate_instance_q15 S = {M, numTaps, pCoeffs, pState};
+  </pre>
+                   where <code>M</code> is the decimation factor; <code>numTaps</code> is the number of filter coefficients in the filter;
+                   <code>pCoeffs</code> is the address of the coefficient buffer;
+                   <code>pState</code> is the address of the state buffer.
+                   Be sure to set the values in the state buffer to zeros when doing static initialization.
+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the fixed-point versions of the FIR decimate filter functions.
+                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+                   Refer to the function specific documentation below for usage guidelines.
  */
 
 /**
- * @addtogroup FIR_decimate
- * @{
+  @addtogroup FIR_decimate
+  @{
  */
 
-  /**
-   * @brief Processing function for the floating-point FIR decimator.
-   * @param[in] *S        points to an instance of the floating-point FIR decimator structure.
-   * @param[in] *pSrc     points to the block of input data.
-   * @param[out] *pDst    points to the block of output data.
-   * @param[in] blockSize number of input samples to process per call.
-   * @return none.
-   */
+/**
+  @brief         Processing function for floating-point FIR decimator.
+  @param[in]     S         points to an instance of the floating-point FIR decimator structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process
+  @return        none
+ */
 
+#if defined(ARM_MATH_NEON)
 void arm_fir_decimate_f32(
   const arm_fir_decimate_instance_f32 * S,
-  float32_t * pSrc,
+  const float32_t * pSrc,
   float32_t * pDst,
   uint32_t blockSize)
 {
   float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+  const float32_t *pCoeffs = S->pCoeffs;         /* Coefficient pointer */
   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
+  float32_t *px;                                 /* Temporary pointer for state buffer */
+  const float32_t *pb;                           /* Temporary pointer for coefficient buffer */
   float32_t sum0;                                /* Accumulator */
   float32_t x0, c0;                              /* Temporary variables to hold state and coefficient values */
   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
   uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
 
-#if defined (ARM_MATH_DSP)
-
   uint32_t blkCntN4;
   float32_t *px0, *px1, *px2, *px3;
   float32_t acc0, acc1, acc2, acc3;
   float32_t x1, x2, x3;
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
+  float32x4_t accv,acc0v,acc1v,acc2v,acc3v;
+  float32x4_t x0v, x1v, x2v, x3v;
+  float32x4_t c0v;
+  float32x2_t temp;
+  float32x4_t sum0v;
+ 
   /* S->pState buffer contains previous frame (numTaps - 1) samples */
   /* pStateCurnt points to the location where the new input data should be written */
   pStateCurnt = S->pState + (numTaps - 1U);
@@ -170,6 +173,248 @@
     } while (--i);
 
     /* Set accumulators to zero */
+    acc0v = vdupq_n_f32(0.0);
+    acc1v = vdupq_n_f32(0.0);
+    acc2v = vdupq_n_f32(0.0);
+    acc3v = vdupq_n_f32(0.0);
+
+    /* Initialize state pointer for all the samples */
+    px0 = pState;
+    px1 = pState + S->M;
+    px2 = pState + 2 * S->M;
+    px3 = pState + 3 * S->M;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+    /* Process 4 taps at a time. */
+    tapCnt = numTaps >> 2;
+
+    /* Loop over the number of taps. 
+     ** Repeat until we've computed numTaps-4 coefficients. */
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0v = vld1q_f32(pb);
+      pb += 4;
+
+      /* Read x[n-numTaps-1] sample for acc0 */
+      x0v = vld1q_f32(px0);
+      x1v = vld1q_f32(px1);
+      x2v = vld1q_f32(px2);
+      x3v = vld1q_f32(px3);
+
+      px0 += 4;
+      px1 += 4;
+      px2 += 4;
+      px3 += 4;
+     
+      acc0v = vmlaq_f32(acc0v, x0v, c0v);
+      acc1v = vmlaq_f32(acc1v, x1v, c0v);
+      acc2v = vmlaq_f32(acc2v, x2v, c0v);
+      acc3v = vmlaq_f32(acc3v, x3v, c0v);
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    temp = vpadd_f32(vget_low_f32(acc0v),vget_high_f32(acc0v));
+    accv[0] = temp[0] + temp[1];
+
+    temp = vpadd_f32(vget_low_f32(acc1v),vget_high_f32(acc1v));
+    accv[1] = temp[0] + temp[1];
+
+    temp = vpadd_f32(vget_low_f32(acc2v),vget_high_f32(acc2v));
+    accv[2] = temp[0] + temp[1];
+
+    temp = vpadd_f32(vget_low_f32(acc3v),vget_high_f32(acc3v));
+    accv[3] = temp[0] + temp[1];
+
+    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *(pb++);
+
+      /* Fetch  state variables for acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      accv[0] += x0 * c0;
+      accv[1] += x1 * c0;
+      accv[2] += x2 * c0;
+      accv[3] += x3 * c0;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + 4 * S->M;
+
+    /* The result is in the accumulator, store in the destination buffer. */
+    vst1q_f32(pDst,accv);
+    pDst += 4;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  while (blkCntN4 > 0U)
+  {
+    /* Copy decimation factor number of new input samples into the state buffer */
+    i = S->M;
+
+    do
+    {
+      *pStateCurnt++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    sum0v =  vdupq_n_f32(0.0);
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+    /* Process 4 taps at a time. */
+    tapCnt = numTaps >> 2;
+
+    /* Loop over the number of taps.
+     ** Repeat until we've computed numTaps-4 coefficients. */
+    while (tapCnt > 0U)
+    {
+      c0v = vld1q_f32(pb);
+      pb += 4;
+
+      x0v = vld1q_f32(px);
+      px += 4;
+
+      sum0v = vmlaq_f32(sum0v, x0v, c0v);
+      
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    temp = vpadd_f32(vget_low_f32(sum0v),vget_high_f32(sum0v));
+    sum0 = temp[0] + temp[1];
+
+    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *(pb++);
+
+      /* Fetch 1 state variable */
+      x0 = *(px++);
+
+      /* Perform the multiply-accumulate */
+      sum0 += x0 * c0;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M;
+
+    /* The result is in the accumulator, store in the destination buffer. */
+    *pDst++ = sum0;
+
+    /* Decrement the loop counter */
+    blkCntN4--;
+  }
+
+  /* Processing is complete.
+   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+   ** This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCurnt = S->pState;
+
+  i = (numTaps - 1U) >> 2;
+
+  /* Copy data */
+  while (i > 0U)
+  {
+    sum0v = vld1q_f32(pState);
+    vst1q_f32(pStateCurnt,sum0v);
+    pState += 4;
+    pStateCurnt += 4;
+
+    /* Decrement the loop counter */
+    i--;
+  }
+
+  i = (numTaps - 1U) % 0x04U;
+
+  /* Copy data */
+  while (i > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement the loop counter */
+    i--;
+  }
+}
+#else
+void arm_fir_decimate_f32(
+  const arm_fir_decimate_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *pStateCur;                          /* Points to the current sample of the state */
+        float32_t *px0;                                /* Temporary pointer for state buffer */
+  const float32_t *pb;                                 /* Temporary pointer for coefficient buffer */
+        float32_t x0, c0;                              /* Temporary variables to hold state and coefficient values */
+        float32_t acc0;                                /* Accumulator */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        float32_t *px1, *px2, *px3;
+        float32_t x1, x2, x3;
+        float32_t acc1, acc2, acc3;
+#endif
+
+  /* S->pState buffer contains previous frame (numTaps - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (numTaps - 1U);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 samples at a time */
+  blkCnt = outBlockSize >> 2U;
+
+  /* Samples loop unrolled by 4 */
+  while (blkCnt > 0U)
+  {
+    /* Copy 4 * decimation factor number of new input samples into the state buffer */
+    i = S->M * 4;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulators to zero */
     acc0 = 0.0f;
     acc1 = 0.0f;
     acc2 = 0.0f;
@@ -184,11 +429,8 @@
     /* Initialize coeff pointer */
     pb = pCoeffs;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.
-     ** Repeat until we've computed numTaps-4 coefficients. */
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
 
     while (tapCnt > 0U)
     {
@@ -255,11 +497,11 @@
       acc2 += x2 * c0;
       acc3 += x3 * c0;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    /* Loop unrolling: Compute remaining taps */
     tapCnt = numTaps % 0x4U;
 
     while (tapCnt > 0U)
@@ -267,7 +509,7 @@
       /* Read coefficients */
       c0 = *(pb++);
 
-      /* Fetch  state variables for acc0, acc1, acc2, acc3 */
+      /* Fetch state variables for acc0, acc1, acc2, acc3 */
       x0 = *(px0++);
       x1 = *(px1++);
       x2 = *(px2++);
@@ -279,13 +521,13 @@
       acc2 += x2 * c0;
       acc3 += x3 * c0;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
     /* Advance the state pointer by the decimation factor
      * to process the next group of decimation factor number samples */
-    pState = pState + 4 * S->M;
+    pState = pState + S->M * 4;
 
     /* The result is in the accumulator, store in the destination buffer. */
     *pDst++ = acc0;
@@ -293,149 +535,20 @@
     *pDst++ = acc2;
     *pDst++ = acc3;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  while (blkCntN4 > 0U)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while (--i);
-
-    /* Set accumulator to zero */
-    sum0 = 0.0f;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while (tapCnt > 0U)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-1] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-2] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-3] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = sum0;
-
-    /* Decrement the loop counter */
-    blkCntN4--;
-  }
-
-  /* Processing is complete.
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1U) >> 2;
-
-  /* copy data */
-  while (i > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1U) % 0x04U;
-
-  /* copy data */
-  while (i > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
+  /* Loop unrolling: Compute remaining samples */
+  blkCnt = outBlockSize % 0x4U;
 
 #else
 
-/* Run the below code for Cortex-M0 */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1U);
-
-  /* Total number of output samples to be computed */
+  /* Initialize blkCnt with number of samples */
   blkCnt = outBlockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     /* Copy decimation factor number of new input samples into the state buffer */
@@ -443,33 +556,88 @@
 
     do
     {
-      *pStateCurnt++ = *pSrc++;
+      *pStateCur++ = *pSrc++;
 
     } while (--i);
 
     /* Set accumulator to zero */
-    sum0 = 0.0f;
+    acc0 = 0.0f;
 
     /* Initialize state pointer */
-    px = pState;
+    px0 = pState;
 
     /* Initialize coeff pointer */
     pb = pCoeffs;
 
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-1] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-2] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+
+      /* Read the b[numTaps-3] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-3] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-4] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
     tapCnt = numTaps;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (tapCnt > 0U)
     {
       /* Read coefficients */
       c0 = *pb++;
 
       /* Fetch 1 state variable */
-      x0 = *px++;
+      x0 = *px0++;
 
       /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
+      acc0 += x0 * c0;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
@@ -478,35 +646,58 @@
     pState = pState + S->M;
 
     /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = sum0;
+    *pDst++ = acc0;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
   /* Processing is complete.
-   ** Now copy the last numTaps - 1 samples to the start of the state buffer.
-   ** This prepares the state buffer for the next function call. */
+     Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
 
   /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
+  pStateCur = S->pState;
 
-  /* Copy numTaps number of values */
-  i = (numTaps - 1U);
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* copy data */
-  while (i > 0U)
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
   {
-    *pStateCurnt++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
 
-    /* Decrement the loop counter */
-    i--;
+    /* Decrement loop counter */
+    tapCnt--;
   }
 
-#endif /*   #if defined (ARM_MATH_DSP)        */
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x04U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
 
 }
+#endif /* #if defined(ARM_MATH_NEON) */
 
 /**
- * @} end of FIR_decimate group
+  @} end of FIR_decimate group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c b/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c
index 00b2790..948b15c 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_decimate_fast_q15.c
  * Description:  Fast Q15 FIR Decimator
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,80 +29,75 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR_decimate
- * @{
+  @addtogroup FIR_decimate
+  @{
  */
 
 /**
- * @brief Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
- * @param[in] *S points to an instance of the Q15 FIR decimator structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] blockSize number of input samples to process per call.
- * @return none
- *
- * \par Restrictions
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- *	In this case input, output, state buffers should be aligned by 32-bit
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * This fast version uses a 32-bit accumulator with 2.30 format.
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * Thus, if the accumulator result overflows it wraps around and distorts the result.
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (log2 is read as log to the base 2).
- * The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.
- *
- * \par
- * Refer to the function <code>arm_fir_decimate_q15()</code> for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.
- * Both the slow and the fast versions use the same instance structure.
- * Use the function <code>arm_fir_decimate_init_q15()</code> to initialize the filter structure.
+  @brief         Processing function for the Q15 FIR decimator (fast variant).
+  @param[in]     S          points to an instance of the Q15 FIR decimator structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of input samples to process per call
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This fast version uses a 32-bit accumulator with 2.30 format.
+                   The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around and distorts the result.
+                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (log2 is read as log to the base 2).
+                   The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.
+  @remark
+                   Refer to \ref arm_fir_decimate_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.
+                   Both the slow and the fast versions use the same instance structure.
+                   Use function \ref arm_fir_decimate_init_q15() to initialize the filter structure.
  */
 
-#ifndef UNALIGNED_SUPPORT_DISABLE
+#if defined (ARM_MATH_DSP)
 
 void arm_fir_decimate_fast_q15(
   const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer coefficient buffer */
-  q31_t x0, x1, c0, c1;                          /* Temporary variables to hold state and coefficient values */
-  q31_t sum0;                                    /* Accumulators */
-  q31_t acc0, acc1;
-  q15_t *px0, *px1;
-  uint32_t blkCntN3;
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCur;                              /* Points to the current sample of the state */
+        q15_t *px;                                     /* Temporary pointer for state buffer */
+  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q31_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
+        q31_t sum0;                                    /* Accumulators */
+        q31_t acc0, acc1;
+        q15_t *px0, *px1;
+        uint32_t blkCntN3;
+        uint32_t numTaps = S->numTaps;                 /* Number of taps */
+        uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
 
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t c1;                                      /* Temporary variables to hold state and coefficient values */
+#endif
 
   /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1U);
-
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (numTaps - 1U);
 
   /* Total number of output samples to be computed */
   blkCnt = outBlockSize / 2;
   blkCntN3 = outBlockSize - (2 * blkCnt);
 
-
   while (blkCnt > 0U)
   {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = 2 * S->M;
+    /* Copy 2 * decimation factor number of new input samples into the state buffer */
+    i = S->M * 2;
 
     do
     {
-      *pStateCurnt++ = *pSrc++;
+      *pStateCur++ = *pSrc++;
 
     } while (--i);
 
@@ -110,70 +105,70 @@
     acc0 = 0;
     acc1 = 0;
 
-    /* Initialize state pointer */
+    /* Initialize state pointer for all the samples */
     px0 = pState;
-
     px1 = pState + S->M;
 
-
     /* Initialize coeff pointer */
     pb = pCoeffs;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-    /* Loop over the number of taps.  Unroll by a factor of 4.
-     ** Repeat until we've computed numTaps-4 coefficients. */
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
     while (tapCnt > 0U)
     {
-      /* Read the Read b[numTaps-1] and b[numTaps-2]  coefficients */
-      c0 = *__SIMD32(pb)++;
+      /* Read the b[numTaps-1] and b[numTaps-2] coefficients */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
 
       /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
-      x0 = *__SIMD32(px0)++;
-
-      x1 = *__SIMD32(px1)++;
+      x0 = read_q15x2_ia (&px0);
+      x1 = read_q15x2_ia (&px1);
 
       /* Perform the multiply-accumulate */
       acc0 = __SMLAD(x0, c0, acc0);
-
       acc1 = __SMLAD(x1, c0, acc1);
 
       /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
-      c0 = *__SIMD32(pb)++;
+      c0 = read_q15x2_ia ((q15_t **) &pb);
 
       /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
-      x0 = *__SIMD32(px0)++;
-
-      x1 = *__SIMD32(px1)++;
+      x0 = read_q15x2_ia (&px0);
+      x1 = read_q15x2_ia (&px1);
 
       /* Perform the multiply-accumulate */
       acc0 = __SMLAD(x0, c0, acc0);
-
       acc1 = __SMLAD(x1, c0, acc1);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    /* Loop unrolling: Compute remaining taps */
     tapCnt = numTaps % 0x4U;
 
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (tapCnt > 0U)
     {
       /* Read coefficients */
       c0 = *pb++;
 
-      /* Fetch 1 state variable */
+      /* Fetch state variables for acc0, acc1 */
       x0 = *px0++;
-
       x1 = *px1++;
 
       /* Perform the multiply-accumulate */
       acc0 = __SMLAD(x0, c0, acc0);
       acc1 = __SMLAD(x1, c0, acc1);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
@@ -186,12 +181,10 @@
     *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
     *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-
-
   while (blkCntN3 > 0U)
   {
     /* Copy decimation factor number of new input samples into the state buffer */
@@ -199,11 +192,11 @@
 
     do
     {
-      *pStateCurnt++ = *pSrc++;
+      *pStateCur++ = *pSrc++;
 
     } while (--i);
 
-    /*Set sum to zero */
+    /* Set accumulator to zero */
     sum0 = 0;
 
     /* Initialize state pointer */
@@ -212,38 +205,45 @@
     /* Initialize coeff pointer */
     pb = pCoeffs;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-    /* Loop over the number of taps.  Unroll by a factor of 4.
-     ** Repeat until we've computed numTaps-4 coefficients. */
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
     while (tapCnt > 0U)
     {
-      /* Read the Read b[numTaps-1] and b[numTaps-2]  coefficients */
-      c0 = *__SIMD32(pb)++;
+      /* Read the b[numTaps-1] and b[numTaps-2] coefficients */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
 
-      /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
-      x0 = *__SIMD32(px)++;
+      /* Read x[n-numTaps-1] and x[n-numTaps-2] sample */
+      x0 = read_q15x2_ia (&px);
 
-      /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
-      c1 = *__SIMD32(pb)++;
+      /* Read the b[numTaps-3] and b[numTaps-4] coefficients */
+      c1 = read_q15x2_ia ((q15_t **) &pb);
 
       /* Perform the multiply-accumulate */
       sum0 = __SMLAD(x0, c0, sum0);
 
       /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
-      x0 = *__SIMD32(px)++;
+      x0 = read_q15x2_ia (&px);
 
       /* Perform the multiply-accumulate */
       sum0 = __SMLAD(x0, c1, sum0);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    /* Loop unrolling: Compute remaining taps */
     tapCnt = numTaps % 0x4U;
 
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (tapCnt > 0U)
     {
       /* Read coefficients */
@@ -255,7 +255,7 @@
       /* Perform the multiply-accumulate */
       sum0 = __SMLAD(x0, c0, sum0);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
@@ -267,68 +267,67 @@
     /* so downsacle by 15 to get output in 1.15 */
     *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCntN3--;
   }
 
   /* Processing is complete.
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
-   ** This prepares the state buffer for the next function call. */
+     Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
 
   /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
+  pStateCur = S->pState;
 
   i = (numTaps - 1U) >> 2U;
 
   /* copy data */
   while (i > 0U)
   {
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
   }
 
   i = (numTaps - 1U) % 0x04U;
 
-  /* copy data */
+  /* Copy data */
   while (i > 0U)
   {
-    *pStateCurnt++ = *pState++;
+    *pStateCur++ = *pState++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
   }
+
 }
 
-#else
-
+#else /* #if defined (ARM_MATH_DSP) */
 
 void arm_fir_decimate_fast_q15(
   const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer coefficient buffer */
-  q15_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
-  q31_t sum0;                                    /* Accumulators */
-  q31_t acc0, acc1;
-  q15_t *px0, *px1;
-  uint32_t blkCntN3;
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCur;                              /* Points to the current sample of the state */
+        q15_t *px;                                     /* Temporary pointer for state buffer */
+  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q15_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
+        q31_t sum0;                                    /* Accumulators */
+        q31_t acc0, acc1;
+        q15_t *px0, *px1;
+        uint32_t blkCntN3;
+        uint32_t numTaps = S->numTaps;                 /* Number of taps */
+        uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
 
 
   /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1U);
-
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (numTaps - 1U);
 
   /* Total number of output samples to be computed */
   blkCnt = outBlockSize / 2;
@@ -336,12 +335,12 @@
 
   while (blkCnt > 0U)
   {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = 2 * S->M;
+    /* Copy 2 * decimation factor number of new input samples into the state buffer */
+    i = S->M * 2;
 
     do
     {
-      *pStateCurnt++ = *pSrc++;
+      *pStateCur++ = *pSrc++;
 
     } while (--i);
 
@@ -351,18 +350,16 @@
 
     /* Initialize state pointer */
     px0 = pState;
-
     px1 = pState + S->M;
 
-
     /* Initialize coeff pointer */
     pb = pCoeffs;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-    /* Loop over the number of taps.  Unroll by a factor of 4.
-     ** Repeat until we've computed numTaps-4 coefficients. */
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
     while (tapCnt > 0U)
     {
       /* Read the Read b[numTaps-1] coefficients */
@@ -387,7 +384,7 @@
       acc0 += x0 * c0;
       acc1 += x1 * c0;
 
-      /* Read the b[numTaps-3]  coefficients */
+      /* Read the b[numTaps-3] coefficients */
       c0 = *pb++;
 
       /* Read x[n-numTaps-3] for sample 0 and sample 1 */
@@ -413,9 +410,16 @@
       tapCnt--;
     }
 
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    /* Loop unrolling: Compute remaining taps */
     tapCnt = numTaps % 0x4U;
 
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (tapCnt > 0U)
     {
       /* Read coefficients */
@@ -443,8 +447,7 @@
     *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
     *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
 
-
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
@@ -455,11 +458,11 @@
 
     do
     {
-      *pStateCurnt++ = *pSrc++;
+      *pStateCur++ = *pSrc++;
 
     } while (--i);
 
-    /*Set sum to zero */
+    /* Set accumulator to zero */
     sum0 = 0;
 
     /* Initialize state pointer */
@@ -468,17 +471,17 @@
     /* Initialize coeff pointer */
     pb = pCoeffs;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-    /* Loop over the number of taps.  Unroll by a factor of 4.
-     ** Repeat until we've computed numTaps-4 coefficients. */
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
     while (tapCnt > 0U)
     {
-      /* Read the Read b[numTaps-1] coefficients */
+      /* Read the b[numTaps-1] coefficient */
       c0 = *pb++;
 
-      /* Read x[n-numTaps-1] and sample */
+      /* Read x[n-numTaps-1] sample */
       x0 = *px++;
 
       /* Perform the multiply-accumulate */
@@ -487,13 +490,13 @@
       /* Read the b[numTaps-2] coefficient */
       c0 = *pb++;
 
-      /* Read x[n-numTaps-2] and  sample */
+      /* Read x[n-numTaps-2] sample */
       x0 = *px++;
 
       /* Perform the multiply-accumulate */
       sum0 += x0 * c0;
 
-      /* Read the b[numTaps-3]  coefficients */
+      /* Read the b[numTaps-3] coefficient */
       c0 = *pb++;
 
       /* Read x[n-numTaps-3] sample */
@@ -511,13 +514,20 @@
       /* Perform the multiply-accumulate */
       sum0 += x0 * c0;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    /* Loop unrolling: Compute remaining taps */
     tapCnt = numTaps % 0x4U;
 
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (tapCnt > 0U)
     {
       /* Read coefficients */
@@ -541,7 +551,7 @@
     /* so downsacle by 15 to get output in 1.15 */
     *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCntN3--;
   }
 
@@ -550,19 +560,19 @@
    ** This prepares the state buffer for the next function call. */
 
   /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
+  pStateCur = S->pState;
 
   i = (numTaps - 1U) >> 2U;
 
   /* copy data */
   while (i > 0U)
   {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
   }
 
@@ -571,16 +581,15 @@
   /* copy data */
   while (i > 0U)
   {
-    *pStateCurnt++ = *pState++;
+    *pStateCur++ = *pState++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
   }
 }
 
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
+#endif /* #if defined (ARM_MATH_DSP) */
 
 /**
- * @} end of FIR_decimate group
+  @} end of FIR_decimate group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c b/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c
index 3b3d817..2c3a28a 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_decimate_fast_q31.c
  * Description:  Fast Q31 FIR Decimator
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,151 +29,167 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR_decimate
- * @{
+  @addtogroup FIR_decimate
+  @{
  */
 
 /**
- * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
- * @param[in] *S points to an instance of the Q31 FIR decimator structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] blockSize number of input samples to process per call.
- * @return none
- *
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
- * These intermediate results are added to a 2.30 accumulator.
- * Finally, the accumulator is saturated and converted to a 1.31 result.
- * The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).
- *
- * \par
- * Refer to the function <code>arm_fir_decimate_q31()</code> for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.
- * Both the slow and the fast versions use the same instance structure.
- * Use the function <code>arm_fir_decimate_init_q31()</code> to initialize the filter structure.
+  @brief         Processing function for the Q31 FIR decimator (fast variant).
+  @param[in]     S          points to an instance of the Q31 FIR decimator structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This function is optimized for speed at the expense of fixed-point precision and overflow protection.
+                   The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
+                   These intermediate results are added to a 2.30 accumulator.
+                   Finally, the accumulator is saturated and converted to a 1.31 result.
+                   The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.
+                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).
+
+  @remark
+                   Refer to \ref arm_fir_decimate_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.
+                   Both the slow and the fast versions use the same instance structure.
+                   Use function \ref arm_fir_decimate_init_q31() to initialize the filter structure.
  */
 
 void arm_fir_decimate_fast_q31(
-  arm_fir_decimate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
+  const arm_fir_decimate_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  q31_t *px;                                     /* Temporary pointers for state buffer */
-  q31_t *pb;                                     /* Temporary pointers for coefficient buffer */
-  q31_t sum0;                                    /* Accumulator */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-  uint32_t blkCntN2;
-  q31_t x1;
-  q31_t acc0, acc1;
-  q31_t *px0, *px1;
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCur;                              /* Points to the current sample of the state */
+        q31_t *px0;                                    /* Temporary pointer for state buffer */
+  const q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
+        q63_t acc0;                                    /* Accumulator */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t *px1, *px2, *px3;
+        q31_t x1, x2, x3;
+        q63_t acc1, acc2, acc3;
+#endif
 
   /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1U);
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (numTaps - 1U);
 
-  /* Total number of output samples to be computed */
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  blkCnt = outBlockSize / 2;
-  blkCntN2 = outBlockSize - (2 * blkCnt);
+    /* Loop unrolling: Compute 4 samples at a time */
+  blkCnt = outBlockSize >> 2U;
 
+  /* Samples loop unrolled by 4 */
   while (blkCnt > 0U)
   {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = 2 * S->M;
+    /* Copy 4 * decimation factor number of new input samples into the state buffer */
+    i = S->M * 4;
 
     do
     {
-      *pStateCurnt++ = *pSrc++;
+      *pStateCur++ = *pSrc++;
 
     } while (--i);
 
-    /* Set accumulator to zero */
+    /* Set accumulators to zero */
     acc0 = 0;
     acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
 
-    /* Initialize state pointer */
+    /* Initialize state pointer for all the samples */
     px0 = pState;
     px1 = pState + S->M;
+    px2 = pState + 2 * S->M;
+    px3 = pState + 3 * S->M;
 
     /* Initialize coeff pointer */
     pb = pCoeffs;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
 
-    /* Loop over the number of taps.  Unroll by a factor of 4.
-     ** Repeat until we've computed numTaps-4 coefficients. */
     while (tapCnt > 0U)
     {
       /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb);
+      c0 = *(pb++);
 
-      /* Read x[n-numTaps-1] for sample 0 sample 1 */
-      x0 = *(px0);
-      x1 = *(px1);
+      /* Read x[n-numTaps-1] sample for acc0 */
+      x0 = *(px0++);
+      /* Read x[n-numTaps-1] sample for acc1 */
+      x1 = *(px1++);
+      /* Read x[n-numTaps-1] sample for acc2 */
+      x2 = *(px2++);
+      /* Read x[n-numTaps-1] sample for acc3 */
+      x3 = *(px3++);
 
       /* Perform the multiply-accumulate */
       acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
       acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
 
       /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb + 1U);
+      c0 = *(pb++);
 
-      /* Read x[n-numTaps-2]  for sample 0 sample 1  */
-      x0 = *(px0 + 1U);
-      x1 = *(px1 + 1U);
+      /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
 
       /* Perform the multiply-accumulate */
       acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
       acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
 
       /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb + 2U);
+      c0 = *(pb++);
 
-      /* Read x[n-numTaps-3]  for sample 0 sample 1 */
-      x0 = *(px0 + 2U);
-      x1 = *(px1 + 2U);
-      pb += 4U;
+      /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
 
       /* Perform the multiply-accumulate */
       acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
       acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
 
       /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb - 1U);
+      c0 = *(pb++);
 
-      /* Read x[n-numTaps-4] for sample 0 sample 1 */
-      x0 = *(px0 + 3U);
-      x1 = *(px1 + 3U);
-
+      /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
 
       /* Perform the multiply-accumulate */
       acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
       acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
 
-      /* update state pointers */
-      px0 += 4U;
-      px1 += 4U;
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    /* Loop unrolling: Compute remaining taps */
     tapCnt = numTaps % 0x4U;
 
     while (tapCnt > 0U)
@@ -181,112 +197,135 @@
       /* Read coefficients */
       c0 = *(pb++);
 
-      /* Fetch 1 state variable */
+      /* Fetch state variables for acc0, acc1, acc2, acc3 */
       x0 = *(px0++);
       x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
 
       /* Perform the multiply-accumulate */
       acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
       acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
     /* Advance the state pointer by the decimation factor
      * to process the next group of decimation factor number samples */
-    pState = pState + S->M * 2;
+    pState = pState + S->M * 4;
 
     /* The result is in the accumulator, store in the destination buffer. */
     *pDst++ = (q31_t) (acc0 << 1);
     *pDst++ = (q31_t) (acc1 << 1);
+    *pDst++ = (q31_t) (acc2 << 1);
+    *pDst++ = (q31_t) (acc3 << 1);
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  while (blkCntN2 > 0U)
+  /* Loop unrolling: Compute remaining samples */
+  blkCnt = outBlockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = outBlockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
   {
     /* Copy decimation factor number of new input samples into the state buffer */
     i = S->M;
 
     do
     {
-      *pStateCurnt++ = *pSrc++;
+      *pStateCur++ = *pSrc++;
 
     } while (--i);
 
     /* Set accumulator to zero */
-    sum0 = 0;
+    acc0 = 0;
 
     /* Initialize state pointer */
-    px = pState;
+    px0 = pState;
 
     /* Initialize coeff pointer */
     pb = pCoeffs;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-    /* Loop over the number of taps.  Unroll by a factor of 4.
-     ** Repeat until we've computed numTaps-4 coefficients. */
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
     while (tapCnt > 0U)
     {
       /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb++);
+      c0 = *pb++;
 
       /* Read x[n-numTaps-1] sample */
-      x0 = *(px++);
+      x0 = *px0++;
 
       /* Perform the multiply-accumulate */
-      sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
 
       /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb++);
+      c0 = *pb++;
 
       /* Read x[n-numTaps-2] sample */
-      x0 = *(px++);
+      x0 = *px0++;
 
       /* Perform the multiply-accumulate */
-      sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
 
       /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb++);
+      c0 = *pb++;
 
       /* Read x[n-numTaps-3] sample */
-      x0 = *(px++);
+      x0 = *px0++;
 
       /* Perform the multiply-accumulate */
-      sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
 
       /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
+      c0 = *pb++;
 
       /* Read x[n-numTaps-4] sample */
-      x0 = *(px++);
+      x0 = *px0++;
 
       /* Perform the multiply-accumulate */
-      sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    /* Loop unrolling: Compute remaining taps */
     tapCnt = numTaps % 0x4U;
 
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (tapCnt > 0U)
     {
       /* Read coefficients */
-      c0 = *(pb++);
+      c0 = *pb++;
 
       /* Fetch 1 state variable */
-      x0 = *(px++);
+      x0 = *px0++;
 
       /* Perform the multiply-accumulate */
-      sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
@@ -295,45 +334,57 @@
     pState = pState + S->M;
 
     /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = (q31_t) (sum0 << 1);
+    *pDst++ = (q31_t) (acc0 << 1);
 
-    /* Decrement the loop counter */
-    blkCntN2--;
+    /* Decrement loop counter */
+    blkCnt--;
   }
 
   /* Processing is complete.
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
-   ** This prepares the state buffer for the next function call. */
+     Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
 
   /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
+  pStateCur = S->pState;
 
-  i = (numTaps - 1U) >> 2U;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* copy data */
-  while (i > 0U)
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
   {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
 
-    /* Decrement the loop counter */
-    i--;
+    /* Decrement loop counter */
+    tapCnt--;
   }
 
-  i = (numTaps - 1U) % 0x04U;
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x04U;
 
-  /* copy data */
-  while (i > 0U)
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy data */
+  while (tapCnt > 0U)
   {
-    *pStateCurnt++ = *pState++;
+    *pStateCur++ = *pState++;
 
-    /* Decrement the loop counter */
-    i--;
+    /* Decrement loop counter */
+    tapCnt--;
   }
+
 }
 
 /**
- * @} end of FIR_decimate group
+  @} end of FIR_decimate group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c b/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c
index 20eb959..9382f09 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_decimate_init_f32.c
  * Description:  Floating-point FIR Decimator initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,44 +29,44 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR_decimate
- * @{
+  @addtogroup FIR_decimate
+  @{
  */
 
 /**
- * @brief  Initialization function for the floating-point FIR decimator.
- * @param[in,out] *S points to an instance of the floating-point FIR decimator structure.
- * @param[in] numTaps  number of coefficients in the filter.
- * @param[in] M  decimation factor.
- * @param[in] *pCoeffs points to the filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] blockSize number of input samples to process per call.
- * @return    The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if
- * <code>blockSize</code> is not a multiple of <code>M</code>.
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * \par
- * <code>pState</code> points to the array of state variables.
- * <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples passed to <code>arm_fir_decimate_f32()</code>.
- * <code>M</code> is the decimation factor.
+  @brief         Initialization function for the floating-point FIR decimator.
+  @param[in,out] S          points to an instance of the floating-point FIR decimator structure
+  @param[in]     numTaps    number of coefficients in the filter
+  @param[in]     M          decimation factor
+  @param[in]     pCoeffs    points to the filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     blockSize  number of input samples to process per call
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS      : Operation successful
+                   - \ref ARM_MATH_LENGTH_ERROR : <code>blockSize</code> is not a multiple of <code>M</code>
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+  @par
+                   <code>pState</code> points to the array of state variables.
+                   <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples passed to <code>arm_fir_decimate_f32()</code>.
+                   <code>M</code> is the decimation factor.
  */
 
 arm_status arm_fir_decimate_init_f32(
-  arm_fir_decimate_instance_f32 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize)
+        arm_fir_decimate_instance_f32 * S,
+        uint16_t numTaps,
+        uint8_t M,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        uint32_t blockSize)
 {
   arm_status status;
 
@@ -84,7 +84,7 @@
     /* Assign coefficient pointer */
     S->pCoeffs = pCoeffs;
 
-    /* Clear state buffer and size is always (blockSize + numTaps - 1) */
+    /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
     memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float32_t));
 
     /* Assign state pointer */
@@ -101,5 +101,5 @@
 }
 
 /**
- * @} end of FIR_decimate group
+  @} end of FIR_decimate group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c b/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c
index 9094de5..f583a03 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_decimate_init_q15.c
  * Description:  Initialization function for the Q15 FIR Decimator
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,47 +29,46 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR_decimate
- * @{
+  @addtogroup FIR_decimate
+  @{
  */
 
 /**
- * @brief  Initialization function for the Q15 FIR decimator.
- * @param[in,out] *S points to an instance of the Q15 FIR decimator structure.
- * @param[in] numTaps  number of coefficients in the filter.
- * @param[in] M  decimation factor.
- * @param[in] *pCoeffs points to the filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] blockSize number of input samples to process per call.
- * @return    The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if
- * <code>blockSize</code> is not a multiple of <code>M</code>.
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * \par
- * <code>pState</code> points to the array of state variables.
- * <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples
- * to the call <code>arm_fir_decimate_q15()</code>.
- * <code>M</code> is the decimation factor.
+  @brief         Initialization function for the Q15 FIR decimator.
+  @param[in,out] S          points to an instance of the Q15 FIR decimator structure
+  @param[in]     numTaps    number of coefficients in the filter
+  @param[in]     M          decimation factor
+  @param[in]     pCoeffs    points to the filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     blockSize  number of input samples to process
+  @return        execution  status
+                   - \ref ARM_MATH_SUCCESS      : Operation successful
+                   - \ref ARM_MATH_LENGTH_ERROR : <code>blockSize</code> is not a multiple of <code>M</code>
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+  @par
+                   <code>pState</code> points to the array of state variables.
+                   <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples
+                   to the call <code>arm_fir_decimate_q15()</code>.
+                   <code>M</code> is the decimation factor.
  */
 
 arm_status arm_fir_decimate_init_q15(
-  arm_fir_decimate_instance_q15 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize)
+        arm_fir_decimate_instance_q15 * S,
+        uint16_t numTaps,
+        uint8_t M,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        uint32_t blockSize)
 {
-
   arm_status status;
 
   /* The size of the input block must be a multiple of the decimation factor */
@@ -86,13 +85,13 @@
     /* Assign coefficient pointer */
     S->pCoeffs = pCoeffs;
 
-    /* Clear the state buffer.  The size of buffer is always (blockSize + numTaps - 1) */
+    /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
     memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t));
 
     /* Assign state pointer */
     S->pState = pState;
 
-    /* Assign Decimation factor */
+    /* Assign Decimation Factor */
     S->M = M;
 
     status = ARM_MATH_SUCCESS;
@@ -103,5 +102,5 @@
 }
 
 /**
- * @} end of FIR_decimate group
+  @} end of FIR_decimate group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c b/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c
index a223a8e..5ee69c6 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_decimate_init_q31.c
  * Description:  Initialization function for Q31 FIR Decimation filter
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,44 +29,44 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR_decimate
- * @{
+  @addtogroup FIR_decimate
+  @{
  */
 
 /**
- * @brief  Initialization function for the Q31 FIR decimator.
- * @param[in,out] *S points to an instance of the Q31 FIR decimator structure.
- * @param[in] numTaps  number of coefficients in the filter.
- * @param[in] M  decimation factor.
- * @param[in] *pCoeffs points to the filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] blockSize number of input samples to process per call.
- * @return    The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if
- * <code>blockSize</code> is not a multiple of <code>M</code>.
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * \par
- * <code>pState</code> points to the array of state variables.
- * <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples passed to <code>arm_fir_decimate_q31()</code>.
- * <code>M</code> is the decimation factor.
+  @brief         Initialization function for the Q31 FIR decimator.
+  @param[in,out] S          points to an instance of the Q31 FIR decimator structure
+  @param[in]     numTaps    number of coefficients in the filter
+  @param[in]     M          decimation factor
+  @param[in]     pCoeffs    points to the filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     blockSize  number of input samples to process
+  @return        execution  status
+                   - \ref ARM_MATH_SUCCESS      : Operation successful
+                   - \ref ARM_MATH_LENGTH_ERROR : <code>blockSize</code> is not a multiple of <code>M</code>
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+  @par
+                   <code>pState</code> points to the array of state variables.
+                   <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples passed to <code>arm_fir_decimate_q31()</code>.
+                   <code>M</code> is the decimation factor.
  */
 
 arm_status arm_fir_decimate_init_q31(
-  arm_fir_decimate_instance_q31 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize)
+        arm_fir_decimate_instance_q31 * S,
+        uint16_t numTaps,
+        uint8_t M,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        uint32_t blockSize)
 {
   arm_status status;
 
@@ -84,13 +84,13 @@
     /* Assign coefficient pointer */
     S->pCoeffs = pCoeffs;
 
-    /* Clear the state buffer.  The size is always (blockSize + numTaps - 1) */
-    memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(q31_t));
+    /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
+    memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));
 
     /* Assign state pointer */
     S->pState = pState;
 
-    /* Assign Decimation factor */
+    /* Assign Decimation Factor */
     S->M = M;
 
     status = ARM_MATH_SUCCESS;
@@ -101,5 +101,5 @@
 }
 
 /**
- * @} end of FIR_decimate group
+  @} end of FIR_decimate group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c b/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c
index 345aa9c..f9d92c0 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_decimate_q15.c
  * Description:  Q15 FIR Decimator
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,77 +29,75 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR_decimate
- * @{
+  @addtogroup FIR_decimate
+  @{
  */
 
 /**
- * @brief Processing function for the Q15 FIR decimator.
- * @param[in] *S points to an instance of the Q15 FIR decimator structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the location where the output result is written.
- * @param[in] blockSize number of input samples to process per call.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.
- *
- * \par
- * Refer to the function <code>arm_fir_decimate_fast_q15()</code> for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.
+  @brief         Processing function for the Q15 FIR decimator.
+  @param[in]     S          points to an instance of the Q15 FIR decimator structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of input samples to process per call
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+                   Lastly, the accumulator is saturated to yield a result in 1.15 format.
+
+ @remark
+                   Refer to \ref arm_fir_decimate_fast_q15() for a faster but less precise implementation of this function.
  */
 
 #if defined (ARM_MATH_DSP)
 
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
 void arm_fir_decimate_q15(
   const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer coefficient buffer */
-  q31_t x0, x1, c0, c1;                          /* Temporary variables to hold state and coefficient values */
-  q63_t sum0;                                    /* Accumulators */
-  q63_t acc0, acc1;
-  q15_t *px0, *px1;
-  uint32_t blkCntN3;
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCur;                              /* Points to the current sample of the state */
+        q15_t *px;                                     /* Temporary pointer for state buffer */
+  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q31_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
+        q63_t sum0;                                    /* Accumulators */
+        q63_t acc0, acc1;
+        q15_t *px0, *px1;
+        uint32_t blkCntN3;
+        uint32_t numTaps = S->numTaps;                 /* Number of taps */
+        uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
 
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t c1;                                      /* Temporary variables to hold state and coefficient values */
+#endif
 
   /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1U);
-
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (numTaps - 1U);
 
   /* Total number of output samples to be computed */
   blkCnt = outBlockSize / 2;
   blkCntN3 = outBlockSize - (2 * blkCnt);
 
-
   while (blkCnt > 0U)
   {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = 2 * S->M;
+    /* Copy 2 * decimation factor number of new input samples into the state buffer */
+    i = S->M * 2;
 
     do
     {
-      *pStateCurnt++ = *pSrc++;
+      *pStateCur++ = *pSrc++;
 
     } while (--i);
 
@@ -107,70 +105,70 @@
     acc0 = 0;
     acc1 = 0;
 
-    /* Initialize state pointer */
+    /* Initialize state pointer for all the samples */
     px0 = pState;
-
     px1 = pState + S->M;
 
-
     /* Initialize coeff pointer */
     pb = pCoeffs;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-    /* Loop over the number of taps.  Unroll by a factor of 4.
-     ** Repeat until we've computed numTaps-4 coefficients. */
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
     while (tapCnt > 0U)
     {
-      /* Read the Read b[numTaps-1] and b[numTaps-2]  coefficients */
-      c0 = *__SIMD32(pb)++;
+      /* Read the b[numTaps-1] and b[numTaps-2] coefficients */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
 
       /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
-      x0 = *__SIMD32(px0)++;
-
-      x1 = *__SIMD32(px1)++;
+      x0 = read_q15x2_ia (&px0);
+      x1 = read_q15x2_ia (&px1);
 
       /* Perform the multiply-accumulate */
       acc0 = __SMLALD(x0, c0, acc0);
-
       acc1 = __SMLALD(x1, c0, acc1);
 
       /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
-      c0 = *__SIMD32(pb)++;
+      c0 = read_q15x2_ia ((q15_t **) &pb);
 
       /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
-      x0 = *__SIMD32(px0)++;
-
-      x1 = *__SIMD32(px1)++;
+      x0 = read_q15x2_ia (&px0);
+      x1 = read_q15x2_ia (&px1);
 
       /* Perform the multiply-accumulate */
       acc0 = __SMLALD(x0, c0, acc0);
-
       acc1 = __SMLALD(x1, c0, acc1);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    /* Loop unrolling: Compute remaining taps */
     tapCnt = numTaps % 0x4U;
 
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (tapCnt > 0U)
     {
       /* Read coefficients */
       c0 = *pb++;
 
-      /* Fetch 1 state variable */
+      /* Fetch state variables for acc0, acc1 */
       x0 = *px0++;
-
       x1 = *px1++;
 
       /* Perform the multiply-accumulate */
       acc0 = __SMLALD(x0, c0, acc0);
       acc1 = __SMLALD(x1, c0, acc1);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
@@ -183,12 +181,10 @@
     *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
     *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-
-
   while (blkCntN3 > 0U)
   {
     /* Copy decimation factor number of new input samples into the state buffer */
@@ -196,11 +192,11 @@
 
     do
     {
-      *pStateCurnt++ = *pSrc++;
+      *pStateCur++ = *pSrc++;
 
     } while (--i);
 
-    /*Set sum to zero */
+    /* Set accumulator to zero */
     sum0 = 0;
 
     /* Initialize state pointer */
@@ -209,38 +205,45 @@
     /* Initialize coeff pointer */
     pb = pCoeffs;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-    /* Loop over the number of taps.  Unroll by a factor of 4.
-     ** Repeat until we've computed numTaps-4 coefficients. */
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
     while (tapCnt > 0U)
     {
-      /* Read the Read b[numTaps-1] and b[numTaps-2]  coefficients */
-      c0 = *__SIMD32(pb)++;
+      /* Read the b[numTaps-1] and b[numTaps-2] coefficients */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
 
-      /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
-      x0 = *__SIMD32(px)++;
+      /* Read x[n-numTaps-1] and x[n-numTaps-2] sample */
+      x0 = read_q15x2_ia (&px);
 
-      /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
-      c1 = *__SIMD32(pb)++;
+      /* Read the b[numTaps-3] and b[numTaps-4] coefficients */
+      c1 = read_q15x2_ia ((q15_t **) &pb);
 
       /* Perform the multiply-accumulate */
       sum0 = __SMLALD(x0, c0, sum0);
 
       /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
-      x0 = *__SIMD32(px)++;
+      x0 = read_q15x2_ia (&px);
 
       /* Perform the multiply-accumulate */
       sum0 = __SMLALD(x0, c1, sum0);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    /* Loop unrolling: Compute remaining taps */
     tapCnt = numTaps % 0x4U;
 
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (tapCnt > 0U)
     {
       /* Read coefficients */
@@ -252,7 +255,7 @@
       /* Perform the multiply-accumulate */
       sum0 = __SMLALD(x0, c0, sum0);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
@@ -264,68 +267,67 @@
     /* so downsacle by 15 to get output in 1.15 */
     *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCntN3--;
   }
 
   /* Processing is complete.
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
-   ** This prepares the state buffer for the next function call. */
+     Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
 
   /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
+  pStateCur = S->pState;
 
   i = (numTaps - 1U) >> 2U;
 
   /* copy data */
   while (i > 0U)
   {
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
   }
 
   i = (numTaps - 1U) % 0x04U;
 
-  /* copy data */
+  /* Copy data */
   while (i > 0U)
   {
-    *pStateCurnt++ = *pState++;
+    *pStateCur++ = *pState++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
   }
+
 }
 
-#else
-
+#else /* #if defined (ARM_MATH_DSP) */
 
 void arm_fir_decimate_q15(
   const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer coefficient buffer */
-  q15_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
-  q63_t sum0;                                    /* Accumulators */
-  q63_t acc0, acc1;
-  q15_t *px0, *px1;
-  uint32_t blkCntN3;
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCur;                              /* Points to the current sample of the state */
+        q15_t *px;                                     /* Temporary pointer for state buffer */
+  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q15_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
+        q63_t sum0;                                    /* Accumulators */
+        q63_t acc0, acc1;
+        q15_t *px0, *px1;
+        uint32_t blkCntN3;
+        uint32_t numTaps = S->numTaps;                 /* Number of taps */
+        uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
 
 
   /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1U);
-
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (numTaps - 1U);
 
   /* Total number of output samples to be computed */
   blkCnt = outBlockSize / 2;
@@ -333,12 +335,12 @@
 
   while (blkCnt > 0U)
   {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = 2 * S->M;
+    /* Copy 2 * decimation factor number of new input samples into the state buffer */
+    i = S->M * 2;
 
     do
     {
-      *pStateCurnt++ = *pSrc++;
+      *pStateCur++ = *pSrc++;
 
     } while (--i);
 
@@ -348,18 +350,16 @@
 
     /* Initialize state pointer */
     px0 = pState;
-
     px1 = pState + S->M;
 
-
     /* Initialize coeff pointer */
     pb = pCoeffs;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-    /* Loop over the number of taps.  Unroll by a factor of 4.
-     ** Repeat until we've computed numTaps-4 coefficients. */
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
     while (tapCnt > 0U)
     {
       /* Read the Read b[numTaps-1] coefficients */
@@ -410,9 +410,16 @@
       tapCnt--;
     }
 
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    /* Loop unrolling: Compute remaining taps */
     tapCnt = numTaps % 0x4U;
 
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (tapCnt > 0U)
     {
       /* Read coefficients */
@@ -440,7 +447,7 @@
     *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
     *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
@@ -451,11 +458,11 @@
 
     do
     {
-      *pStateCurnt++ = *pSrc++;
+      *pStateCur++ = *pSrc++;
 
     } while (--i);
 
-    /*Set sum to zero */
+    /* Set accumulator to zero */
     sum0 = 0;
 
     /* Initialize state pointer */
@@ -464,17 +471,17 @@
     /* Initialize coeff pointer */
     pb = pCoeffs;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-    /* Loop over the number of taps.  Unroll by a factor of 4.
-     ** Repeat until we've computed numTaps-4 coefficients. */
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
     while (tapCnt > 0U)
     {
-      /* Read the Read b[numTaps-1] coefficients */
+      /* Read the b[numTaps-1] coefficient */
       c0 = *pb++;
 
-      /* Read x[n-numTaps-1] and sample */
+      /* Read x[n-numTaps-1] sample */
       x0 = *px++;
 
       /* Perform the multiply-accumulate */
@@ -483,13 +490,13 @@
       /* Read the b[numTaps-2] coefficient */
       c0 = *pb++;
 
-      /* Read x[n-numTaps-2] and  sample */
+      /* Read x[n-numTaps-2] sample */
       x0 = *px++;
 
       /* Perform the multiply-accumulate */
       sum0 += x0 * c0;
 
-      /* Read the b[numTaps-3]  coefficients */
+      /* Read the b[numTaps-3] coefficient */
       c0 = *pb++;
 
       /* Read x[n-numTaps-3] sample */
@@ -507,13 +514,20 @@
       /* Perform the multiply-accumulate */
       sum0 += x0 * c0;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    /* Loop unrolling: Compute remaining taps */
     tapCnt = numTaps % 0x4U;
 
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (tapCnt > 0U)
     {
       /* Read coefficients */
@@ -537,7 +551,7 @@
     /* so downsacle by 15 to get output in 1.15 */
     *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCntN3--;
   }
 
@@ -546,19 +560,19 @@
    ** This prepares the state buffer for the next function call. */
 
   /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
+  pStateCur = S->pState;
 
   i = (numTaps - 1U) >> 2U;
 
   /* copy data */
   while (i > 0U)
   {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
   }
 
@@ -567,118 +581,15 @@
   /* copy data */
   while (i > 0U)
   {
-    *pStateCurnt++ = *pState++;
+    *pStateCur++ = *pState++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
   }
 }
 
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-#else
-
-
-void arm_fir_decimate_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer coefficient buffer */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  q63_t sum0;                                    /* Accumulators */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-
-
-/* Run the below code for Cortex-M0 */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1U);
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize;
-
-  while (blkCnt > 0U)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while (--i);
-
-    /*Set sum to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    tapCnt = numTaps;
-
-    while (tapCnt > 0U)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += (q31_t) x0 *c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /*Store filter output , smlad will return the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.
-   ** Now copy the last numTaps - 1 samples to the start of the state buffer.
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = numTaps - 1U;
-
-  /* copy data */
-  while (i > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-
-}
-#endif /*   #if defined (ARM_MATH_DSP) */
-
+#endif /* #if defined (ARM_MATH_DSP) */
 
 /**
- * @} end of FIR_decimate group
+  @} end of FIR_decimate group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c b/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c
index ed67442..7af8a44 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_decimate_q31.c
  * Description:  Q31 FIR Decimator
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,130 +29,164 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR_decimate
- * @{
+  @addtogroup FIR_decimate
+  @{
  */
 
 /**
- * @brief Processing function for the Q31 FIR decimator.
- * @param[in] *S points to an instance of the Q31 FIR decimator structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] blockSize number of input samples to process per call.
- * @return none
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * Thus, if the accumulator result overflows it wraps around rather than clip.
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).
- * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
- *
- * \par
- * Refer to the function <code>arm_fir_decimate_fast_q31()</code> for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.
+  @brief         Processing function for the Q31 FIR decimator.
+  @param[in]     S          points to an instance of the Q31 FIR decimator structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clip.
+                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).
+                   After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
+
+ @remark
+                   Refer to \ref arm_fir_decimate_fast_q31() for a faster but less precise implementation of this function.
  */
 
 void arm_fir_decimate_q31(
   const arm_fir_decimate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  q31_t *px;                                     /* Temporary pointers for state buffer */
-  q31_t *pb;                                     /* Temporary pointers for coefficient buffer */
-  q63_t sum0;                                    /* Accumulator */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCur;                              /* Points to the current sample of the state */
+        q31_t *px0;                                    /* Temporary pointer for state buffer */
+  const q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
+        q63_t acc0;                                    /* Accumulator */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
 
-
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t *px1, *px2, *px3;
+        q31_t x1, x2, x3;
+        q63_t acc1, acc2, acc3;
+#endif
 
   /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1U);
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (numTaps - 1U);
 
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize;
+#if defined (ARM_MATH_LOOPUNROLL)
 
+    /* Loop unrolling: Compute 4 samples at a time */
+  blkCnt = outBlockSize >> 2U;
+
+  /* Samples loop unrolled by 4 */
   while (blkCnt > 0U)
   {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
+    /* Copy 4 * decimation factor number of new input samples into the state buffer */
+    i = S->M * 4;
 
     do
     {
-      *pStateCurnt++ = *pSrc++;
+      *pStateCur++ = *pSrc++;
 
     } while (--i);
 
-    /* Set accumulator to zero */
-    sum0 = 0;
+    /* Set accumulators to zero */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
 
-    /* Initialize state pointer */
-    px = pState;
+    /* Initialize state pointer for all the samples */
+    px0 = pState;
+    px1 = pState + S->M;
+    px2 = pState + 2 * S->M;
+    px3 = pState + 3 * S->M;
 
     /* Initialize coeff pointer */
     pb = pCoeffs;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
 
-    /* Loop over the number of taps.  Unroll by a factor of 4.
-     ** Repeat until we've computed numTaps-4 coefficients. */
     while (tapCnt > 0U)
     {
       /* Read the b[numTaps-1] coefficient */
       c0 = *(pb++);
 
-      /* Read x[n-numTaps-1] sample */
-      x0 = *(px++);
+      /* Read x[n-numTaps-1] sample for acc0 */
+      x0 = *(px0++);
+      /* Read x[n-numTaps-1] sample for acc1 */
+      x1 = *(px1++);
+      /* Read x[n-numTaps-1] sample for acc2 */
+      x2 = *(px2++);
+      /* Read x[n-numTaps-1] sample for acc3 */
+      x3 = *(px3++);
 
       /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
+      acc0 += (q63_t) x0 * c0;
+      acc1 += (q63_t) x1 * c0;
+      acc2 += (q63_t) x2 * c0;
+      acc3 += (q63_t) x3 * c0;
 
       /* Read the b[numTaps-2] coefficient */
       c0 = *(pb++);
 
-      /* Read x[n-numTaps-2] sample */
-      x0 = *(px++);
+      /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
 
       /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
+      acc0 += (q63_t) x0 * c0;
+      acc1 += (q63_t) x1 * c0;
+      acc2 += (q63_t) x2 * c0;
+      acc3 += (q63_t) x3 * c0;
 
       /* Read the b[numTaps-3] coefficient */
       c0 = *(pb++);
 
-      /* Read x[n-numTaps-3] sample */
-      x0 = *(px++);
+      /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
 
       /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
+      acc0 += (q63_t) x0 * c0;
+      acc1 += (q63_t) x1 * c0;
+      acc2 += (q63_t) x2 * c0;
+      acc3 += (q63_t) x3 * c0;
 
       /* Read the b[numTaps-4] coefficient */
       c0 = *(pb++);
 
-      /* Read x[n-numTaps-4] sample */
-      x0 = *(px++);
+      /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
 
       /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
+      acc0 += (q63_t) x0 * c0;
+      acc1 += (q63_t) x1 * c0;
+      acc2 += (q63_t) x2 * c0;
+      acc3 += (q63_t) x3 * c0;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    /* Loop unrolling: Compute remaining taps */
     tapCnt = numTaps % 0x4U;
 
     while (tapCnt > 0U)
@@ -160,70 +194,46 @@
       /* Read coefficients */
       c0 = *(pb++);
 
-      /* Fetch 1 state variable */
-      x0 = *(px++);
+      /* Fetch state variables for acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
 
       /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
+      acc0 += (q63_t) x0 * c0;
+      acc1 += (q63_t) x1 * c0;
+      acc2 += (q63_t) x2 * c0;
+      acc3 += (q63_t) x3 * c0;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
     /* Advance the state pointer by the decimation factor
      * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
+    pState = pState + S->M * 4;
 
     /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = (q31_t) (sum0 >> 31);
+    *pDst++ = (q31_t) (acc0 >> 31);
+    *pDst++ = (q31_t) (acc1 >> 31);
+    *pDst++ = (q31_t) (acc2 >> 31);
+    *pDst++ = (q31_t) (acc3 >> 31);
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* Processing is complete.
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1U) >> 2U;
-
-  /* copy data */
-  while (i > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1U) % 0x04U;
-
-  /* copy data */
-  while (i > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
+  /* Loop unrolling: Compute remaining samples */
+  blkCnt = outBlockSize % 0x4U;
 
 #else
 
-/* Run the below code for Cortex-M0 */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1U);
-
-  /* Total number of output samples to be computed */
+  /* Initialize blkCnt with number of samples */
   blkCnt = outBlockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     /* Copy decimation factor number of new input samples into the state buffer */
@@ -231,33 +241,88 @@
 
     do
     {
-      *pStateCurnt++ = *pSrc++;
+      *pStateCur++ = *pSrc++;
 
     } while (--i);
 
     /* Set accumulator to zero */
-    sum0 = 0;
+    acc0 = 0;
 
     /* Initialize state pointer */
-    px = pState;
+    px0 = pState;
 
     /* Initialize coeff pointer */
     pb = pCoeffs;
 
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-1] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-2] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+
+      /* Read the b[numTaps-3] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-3] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-4] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
     tapCnt = numTaps;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (tapCnt > 0U)
     {
       /* Read coefficients */
       c0 = *pb++;
 
       /* Fetch 1 state variable */
-      x0 = *px++;
+      x0 = *px0++;
 
       /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
+      acc0 += (q63_t) x0 * c0;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
@@ -266,34 +331,57 @@
     pState = pState + S->M;
 
     /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = (q31_t) (sum0 >> 31);
+    *pDst++ = (q31_t) (acc0 >> 31);
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
   /* Processing is complete.
-   ** Now copy the last numTaps - 1 samples to the start of the state buffer.
-   ** This prepares the state buffer for the next function call. */
+     Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
 
   /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
+  pStateCur = S->pState;
 
-  i = numTaps - 1U;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* copy data */
-  while (i > 0U)
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
   {
-    *pStateCurnt++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
 
-    /* Decrement the loop counter */
-    i--;
+    /* Decrement loop counter */
+    tapCnt--;
   }
 
-#endif /*   #if defined (ARM_MATH_DSP) */
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x04U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
 
 }
 
 /**
- * @} end of FIR_decimate group
+  @} end of FIR_decimate group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_f32.c b/DSP/Source/FilteringFunctions/arm_fir_f32.c
index 61ec80a..0531cfe 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_f32.c
  * Description:  Floating-point FIR filter processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,467 +29,259 @@
 #include "arm_math.h"
 
 /**
-* @ingroup groupFilters
-*/
+  @ingroup groupFilters
+ */
 
 /**
-* @defgroup FIR Finite Impulse Response (FIR) Filters
-*
-* This set of functions implements Finite Impulse Response (FIR) filters
-* for Q7, Q15, Q31, and floating-point data types.  Fast versions of Q15 and Q31 are also provided.
-* The functions operate on blocks of input and output data and each call to the function processes
-* <code>blockSize</code> samples through the filter.  <code>pSrc</code> and
-* <code>pDst</code> points to input and output arrays containing <code>blockSize</code> values.
-*
-* \par Algorithm:
-* The FIR filter algorithm is based upon a sequence of multiply-accumulate (MAC) operations.
-* Each filter coefficient <code>b[n]</code> is multiplied by a state variable which equals a previous input sample <code>x[n]</code>.
-* <pre>
-*    y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
-* </pre>
-* \par
-* \image html FIR.gif "Finite Impulse Response filter"
-* \par
-* <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
-* Coefficients are stored in time reversed order.
-* \par
-* <pre>
-*    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-* </pre>
-* \par
-* <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
-* Samples in the state buffer are stored in the following order.
-* \par
-* <pre>
-*    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
-* </pre>
-* \par
-* Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code>.
-* The increased state buffer length allows circular addressing, which is traditionally used in the FIR filters,
-* to be avoided and yields a significant speed improvement.
-* The state variables are updated after each block of data is processed; the coefficients are untouched.
-* \par Instance Structure
-* The coefficients and state variables for a filter are stored together in an instance data structure.
-* A separate instance structure must be defined for each filter.
-* Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
-* There are separate instance structure declarations for each of the 4 supported data types.
-*
-* \par Initialization Functions
-* There is also an associated initialization function for each data type.
-* The initialization function performs the following operations:
-* - Sets the values of the internal structure fields.
-* - Zeros out the values in the state buffer.
-* To do this manually without calling the init function, assign the follow subfields of the instance structure:
-* numTaps, pCoeffs, pState. Also set all of the values in pState to zero.
-*
-* \par
-* Use of the initialization function is optional.
-* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
-* To place an instance structure into a const data section, the instance structure must be manually initialized.
-* Set the values in the state buffer to zeros before static initialization.
-* The code below statically initializes each of the 4 different data type filter instance structures
-* <pre>
-*arm_fir_instance_f32 S = {numTaps, pState, pCoeffs};
-*arm_fir_instance_q31 S = {numTaps, pState, pCoeffs};
-*arm_fir_instance_q15 S = {numTaps, pState, pCoeffs};
-*arm_fir_instance_q7 S =  {numTaps, pState, pCoeffs};
-* </pre>
-*
-* where <code>numTaps</code> is the number of filter coefficients in the filter; <code>pState</code> is the address of the state buffer;
-* <code>pCoeffs</code> is the address of the coefficient buffer.
-*
-* \par Fixed-Point Behavior
-* Care must be taken when using the fixed-point versions of the FIR filter functions.
-* In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
-* Refer to the function specific documentation below for usage guidelines.
-*/
+  @defgroup FIR Finite Impulse Response (FIR) Filters
+
+  This set of functions implements Finite Impulse Response (FIR) filters
+  for Q7, Q15, Q31, and floating-point data types.  Fast versions of Q15 and Q31 are also provided.
+  The functions operate on blocks of input and output data and each call to the function processes
+  <code>blockSize</code> samples through the filter.  <code>pSrc</code> and
+  <code>pDst</code> points to input and output arrays containing <code>blockSize</code> values.
+
+  @par           Algorithm
+                   The FIR filter algorithm is based upon a sequence of multiply-accumulate (MAC) operations.
+                   Each filter coefficient <code>b[n]</code> is multiplied by a state variable which equals a previous input sample <code>x[n]</code>.
+  <pre>
+      y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
+  </pre>
+  @par
+                   \image html FIR.GIF "Finite Impulse Response filter"
+  @par
+                   <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
+                   Coefficients are stored in time reversed order.
+  @par
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+  @par
+                   <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
+                   Samples in the state buffer are stored in the following order.
+  @par
+  <pre>
+      {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
+  </pre>
+  @par
+                   Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code>.
+                   The increased state buffer length allows circular addressing, which is traditionally used in the FIR filters,
+                   to be avoided and yields a significant speed improvement.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+                   There are separate instance structure declarations for each of the 4 supported data types.
+
+  @par           Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numTaps, pCoeffs, pState. Also set all of the values in pState to zero.
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Set the values in the state buffer to zeros before static initialization.
+                   The code below statically initializes each of the 4 different data type filter instance structures
+  <pre>
+      arm_fir_instance_f32 S = {numTaps, pState, pCoeffs};
+      arm_fir_instance_q31 S = {numTaps, pState, pCoeffs};
+      arm_fir_instance_q15 S = {numTaps, pState, pCoeffs};
+      arm_fir_instance_q7 S =  {numTaps, pState, pCoeffs};
+  </pre>
+                   where <code>numTaps</code> is the number of filter coefficients in the filter; <code>pState</code> is the address of the state buffer;
+                   <code>pCoeffs</code> is the address of the coefficient buffer.
+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the fixed-point versions of the FIR filter functions.
+                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+                   Refer to the function specific documentation below for usage guidelines.
+ */
 
 /**
-* @addtogroup FIR
-* @{
-*/
+  @addtogroup FIR
+  @{
+ */
 
 /**
-*
-* @param[in]  *S points to an instance of the floating-point FIR filter structure.
-* @param[in]  *pSrc points to the block of input data.
-* @param[out] *pDst points to the block of output data.
-* @param[in]  blockSize number of samples to process per call.
-* @return     none.
-*
-*/
-
-#if defined(ARM_MATH_CM7)
+  @brief         Processing function for floating-point FIR filter.
+  @param[in]     S          points to an instance of the floating-point FIR filter structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
+#if defined(ARM_MATH_NEON)
 
 void arm_fir_f32(
 const arm_fir_instance_f32 * S,
-float32_t * pSrc,
+const float32_t * pSrc,
 float32_t * pDst,
 uint32_t blockSize)
 {
    float32_t *pState = S->pState;                 /* State pointer */
-   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+   const float32_t *pCoeffs = S->pCoeffs;         /* Coefficient pointer */
    float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-   float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-   float32_t acc0, acc1, acc2, acc3, acc4, acc5, acc6, acc7;     /* Accumulators */
-   float32_t x0, x1, x2, x3, x4, x5, x6, x7, c0;  /* Temporary variables to hold state and coefficient values */
+   float32_t *px;                                 /* Temporary pointers for state buffer */
+   const float32_t *pb;                           /* Temporary pointers for coefficient buffer */
    uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
    uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
 
-   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-   /* pStateCurnt points to the location where the new input data should be written */
-   pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
-   /* Apply loop unrolling and compute 8 output values simultaneously.
-    * The variables acc0 ... acc7 hold output values that are being computed:
-    *
-    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
-    *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
-    *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
-    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
-    */
-   blkCnt = blockSize >> 3;
-
-   /* First part of the processing with loop unrolling.  Compute 8 outputs at a time.
-   ** a second loop below computes the remaining 1 to 7 samples. */
-   while (blkCnt > 0U)
-   {
-      /* Copy four new input samples into the state buffer */
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-
-      /* Set all accumulators to zero */
-      acc0 = 0.0f;
-      acc1 = 0.0f;
-      acc2 = 0.0f;
-      acc3 = 0.0f;
-      acc4 = 0.0f;
-      acc5 = 0.0f;
-      acc6 = 0.0f;
-      acc7 = 0.0f;
-
-      /* Initialize state pointer */
-      px = pState;
-
-      /* Initialize coeff pointer */
-      pb = (pCoeffs);
-
-      /* This is separated from the others to avoid
-       * a call to __aeabi_memmove which would be slower
-       */
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-
-      /* Read the first seven samples from the state buffer:  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
-      x0 = *px++;
-      x1 = *px++;
-      x2 = *px++;
-      x3 = *px++;
-      x4 = *px++;
-      x5 = *px++;
-      x6 = *px++;
-
-      /* Loop unrolling.  Process 8 taps at a time. */
-      tapCnt = numTaps >> 3U;
-
-      /* Loop over the number of taps.  Unroll by a factor of 8.
-       ** Repeat until we've computed numTaps-8 coefficients. */
-      while (tapCnt > 0U)
-      {
-         /* Read the b[numTaps-1] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-3] sample */
-         x7 = *(px++);
-
-         /* acc0 +=  b[numTaps-1] * x[n-numTaps] */
-         acc0 += x0 * c0;
-
-         /* acc1 +=  b[numTaps-1] * x[n-numTaps-1] */
-         acc1 += x1 * c0;
-
-         /* acc2 +=  b[numTaps-1] * x[n-numTaps-2] */
-         acc2 += x2 * c0;
-
-         /* acc3 +=  b[numTaps-1] * x[n-numTaps-3] */
-         acc3 += x3 * c0;
-
-         /* acc4 +=  b[numTaps-1] * x[n-numTaps-4] */
-         acc4 += x4 * c0;
-
-         /* acc1 +=  b[numTaps-1] * x[n-numTaps-5] */
-         acc5 += x5 * c0;
-
-         /* acc2 +=  b[numTaps-1] * x[n-numTaps-6] */
-         acc6 += x6 * c0;
-
-         /* acc3 +=  b[numTaps-1] * x[n-numTaps-7] */
-         acc7 += x7 * c0;
-
-         /* Read the b[numTaps-2] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-4] sample */
-         x0 = *(px++);
-
-         /* Perform the multiply-accumulate */
-         acc0 += x1 * c0;
-         acc1 += x2 * c0;
-         acc2 += x3 * c0;
-         acc3 += x4 * c0;
-         acc4 += x5 * c0;
-         acc5 += x6 * c0;
-         acc6 += x7 * c0;
-         acc7 += x0 * c0;
-
-         /* Read the b[numTaps-3] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-5] sample */
-         x1 = *(px++);
-
-         /* Perform the multiply-accumulates */
-         acc0 += x2 * c0;
-         acc1 += x3 * c0;
-         acc2 += x4 * c0;
-         acc3 += x5 * c0;
-         acc4 += x6 * c0;
-         acc5 += x7 * c0;
-         acc6 += x0 * c0;
-         acc7 += x1 * c0;
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x2 = *(px++);
-
-         /* Perform the multiply-accumulates */
-         acc0 += x3 * c0;
-         acc1 += x4 * c0;
-         acc2 += x5 * c0;
-         acc3 += x6 * c0;
-         acc4 += x7 * c0;
-         acc5 += x0 * c0;
-         acc6 += x1 * c0;
-         acc7 += x2 * c0;
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x3 = *(px++);
-         /* Perform the multiply-accumulates */
-         acc0 += x4 * c0;
-         acc1 += x5 * c0;
-         acc2 += x6 * c0;
-         acc3 += x7 * c0;
-         acc4 += x0 * c0;
-         acc5 += x1 * c0;
-         acc6 += x2 * c0;
-         acc7 += x3 * c0;
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x4 = *(px++);
-
-         /* Perform the multiply-accumulates */
-         acc0 += x5 * c0;
-         acc1 += x6 * c0;
-         acc2 += x7 * c0;
-         acc3 += x0 * c0;
-         acc4 += x1 * c0;
-         acc5 += x2 * c0;
-         acc6 += x3 * c0;
-         acc7 += x4 * c0;
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x5 = *(px++);
-
-         /* Perform the multiply-accumulates */
-         acc0 += x6 * c0;
-         acc1 += x7 * c0;
-         acc2 += x0 * c0;
-         acc3 += x1 * c0;
-         acc4 += x2 * c0;
-         acc5 += x3 * c0;
-         acc6 += x4 * c0;
-         acc7 += x5 * c0;
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x6 = *(px++);
-
-         /* Perform the multiply-accumulates */
-         acc0 += x7 * c0;
-         acc1 += x0 * c0;
-         acc2 += x1 * c0;
-         acc3 += x2 * c0;
-         acc4 += x3 * c0;
-         acc5 += x4 * c0;
-         acc6 += x5 * c0;
-         acc7 += x6 * c0;
-
-         tapCnt--;
-      }
-
-      /* If the filter length is not a multiple of 8, compute the remaining filter taps */
-      tapCnt = numTaps % 0x8U;
-
-      while (tapCnt > 0U)
-      {
-         /* Read coefficients */
-         c0 = *(pb++);
-
-         /* Fetch 1 state variable */
-         x7 = *(px++);
-
-         /* Perform the multiply-accumulates */
-         acc0 += x0 * c0;
-         acc1 += x1 * c0;
-         acc2 += x2 * c0;
-         acc3 += x3 * c0;
-         acc4 += x4 * c0;
-         acc5 += x5 * c0;
-         acc6 += x6 * c0;
-         acc7 += x7 * c0;
-
-         /* Reuse the present sample states for next sample */
-         x0 = x1;
-         x1 = x2;
-         x2 = x3;
-         x3 = x4;
-         x4 = x5;
-         x5 = x6;
-         x6 = x7;
-
-         /* Decrement the loop counter */
-         tapCnt--;
-      }
-
-      /* Advance the state pointer by 8 to process the next group of 8 samples */
-      pState = pState + 8;
-
-      /* The results in the 8 accumulators, store in the destination buffer. */
-      *pDst++ = acc0;
-      *pDst++ = acc1;
-      *pDst++ = acc2;
-      *pDst++ = acc3;
-      *pDst++ = acc4;
-      *pDst++ = acc5;
-      *pDst++ = acc6;
-      *pDst++ = acc7;
-
-      blkCnt--;
-   }
-
-   /* If the blockSize is not a multiple of 8, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-   blkCnt = blockSize % 0x8U;
-
-   while (blkCnt > 0U)
-   {
-      /* Copy one sample at a time into state buffer */
-      *pStateCurnt++ = *pSrc++;
-
-      /* Set the accumulator to zero */
-      acc0 = 0.0f;
-
-      /* Initialize state pointer */
-      px = pState;
-
-      /* Initialize Coefficient pointer */
-      pb = (pCoeffs);
-
-      i = numTaps;
-
-      /* Perform the multiply-accumulates */
-      do
-      {
-         acc0 += *px++ * *pb++;
-         i--;
-
-      } while (i > 0U);
-
-      /* The result is store in the destination buffer. */
-      *pDst++ = acc0;
-
-      /* Advance state pointer by 1 for the next sample */
-      pState = pState + 1;
-
-      blkCnt--;
-   }
-
-   /* Processing is complete.
-   ** Now copy the last numTaps - 1 samples to the start of the state buffer.
-   ** This prepares the state buffer for the next function call. */
-
-   /* Points to the start of the state buffer */
-   pStateCurnt = S->pState;
-
-   tapCnt = (numTaps - 1U) >> 2U;
-
-   /* copy data */
-   while (tapCnt > 0U)
-   {
-      *pStateCurnt++ = *pState++;
-      *pStateCurnt++ = *pState++;
-      *pStateCurnt++ = *pState++;
-      *pStateCurnt++ = *pState++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-   }
-
-   /* Calculate remaining number of copies */
-   tapCnt = (numTaps - 1U) % 0x4U;
-
-   /* Copy the remaining q31_t data */
-   while (tapCnt > 0U)
-   {
-      *pStateCurnt++ = *pState++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-   }
-}
-
-#elif defined(ARM_MATH_CM0_FAMILY)
-
-void arm_fir_f32(
-const arm_fir_instance_f32 * S,
-float32_t * pSrc,
-float32_t * pDst,
-uint32_t blockSize)
-{
-   float32_t *pState = S->pState;                 /* State pointer */
-   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-   float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-   uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-
-   /* Run the below code for Cortex-M0 */
-
+   float32x4_t accv0,accv1,samples0,samples1,x0,x1,x2,xa,xb,x,b,accv;
+   uint32x4_t x0_u,x1_u,x2_u,xa_u,xb_u;
    float32_t acc;
 
    /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
    /* pStateCurnt points to the location where the new input data should be written */
    pStateCurnt = &(S->pState[(numTaps - 1U)]);
 
-   /* Initialize blkCnt with blockSize */
-   blkCnt = blockSize;
+   /* Loop unrolling */
+   blkCnt = blockSize >> 3;
+
+   while (blkCnt > 0U)
+   {
+      /* Copy 8 samples at a time into state buffers */
+      samples0 = vld1q_f32(pSrc);
+      vst1q_f32(pStateCurnt,samples0);
+
+      pStateCurnt += 4;
+      pSrc += 4 ;
+
+      samples1 = vld1q_f32(pSrc);
+      vst1q_f32(pStateCurnt,samples1);
+
+      pStateCurnt += 4;
+      pSrc += 4 ;
+
+      /* Set the accumulators to zero */
+      accv0 = vdupq_n_f32(0);
+      accv1 = vdupq_n_f32(0);
+
+      /* Initialize state pointer */
+      px = pState;
+
+      /* Initialize coefficient pointer */
+      pb = pCoeffs;
+
+      /* Loop unroling */
+      i = numTaps >> 2;
+
+      /* Perform the multiply-accumulates */
+      x0 = vld1q_f32(px);
+      x1 = vld1q_f32(px + 4);
+
+      while(i > 0)
+      {
+         /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
+         x2 = vld1q_f32(px + 8);
+         b = vld1q_f32(pb);
+         xa = x0;
+         xb = x1;
+         accv0 = vmlaq_n_f32(accv0,xa,b[0]);
+         accv1 = vmlaq_n_f32(accv1,xb,b[0]);
+
+         xa = vextq_f32(x0,x1,1);
+         xb = vextq_f32(x1,x2,1);
+         
+	 accv0 = vmlaq_n_f32(accv0,xa,b[1]);
+         accv1 = vmlaq_n_f32(accv1,xb,b[1]);
+
+	 xa = vextq_f32(x0,x1,2);
+         xb = vextq_f32(x1,x2,2);
+
+         accv0 = vmlaq_n_f32(accv0,xa,b[2]);
+         accv1 = vmlaq_n_f32(accv1,xb,b[2]);
+
+	 xa = vextq_f32(x0,x1,3);
+	 xb = vextq_f32(x1,x2,3);
+         
+ 	 accv0 = vmlaq_n_f32(accv0,xa,b[3]);
+         accv1 = vmlaq_n_f32(accv1,xb,b[3]);
+
+         pb += 4;
+         x0 = x1;
+         x1 = x2;
+         px += 4;
+         i--;
+
+      }
+
+      /* Tail */
+      i = numTaps & 3;
+      x2 = vld1q_f32(px + 8);
+
+      /* Perform the multiply-accumulates */
+      switch(i)
+      {
+         case 3:
+         {
+           accv0 = vmlaq_n_f32(accv0,x0,*pb);
+           accv1 = vmlaq_n_f32(accv1,x1,*pb);
+
+           pb++;
+
+	   xa = vextq_f32(x0,x1,1);
+	   xb = vextq_f32(x1,x2,1);
+
+           accv0 = vmlaq_n_f32(accv0,xa,*pb);
+           accv1 = vmlaq_n_f32(accv1,xb,*pb);
+
+           pb++;
+
+           xa = vextq_f32(x0,x1,2);
+           xb = vextq_f32(x1,x2,2);
+           
+	   accv0 = vmlaq_n_f32(accv0,xa,*pb);
+           accv1 = vmlaq_n_f32(accv1,xb,*pb);
+
+         }
+         break;
+         case 2:
+         {
+           accv0 = vmlaq_n_f32(accv0,x0,*pb);
+           accv1 = vmlaq_n_f32(accv1,x1,*pb);
+
+           pb++;
+
+           xa = vextq_f32(x0,x1,1);
+           xb = vextq_f32(x1,x2,1);
+           
+	   accv0 = vmlaq_n_f32(accv0,xa,*pb);
+           accv1 = vmlaq_n_f32(accv1,xb,*pb);
+
+         }
+         break;
+         case 1:
+         {
+           
+           accv0 = vmlaq_n_f32(accv0,x0,*pb);
+           accv1 = vmlaq_n_f32(accv1,x1,*pb);
+
+         }
+         break;
+         default:
+         break;
+      }
+
+      /* The result is stored in the destination buffer. */
+      vst1q_f32(pDst,accv0);
+      pDst += 4;
+      vst1q_f32(pDst,accv1);
+      pDst += 4;
+
+      /* Advance state pointer by 8 for the next 8 samples */
+      pState = pState + 8;
+
+      blkCnt--;
+   }
+
+   /* Tail */
+   blkCnt = blockSize & 0x7;
 
    while (blkCnt > 0U)
    {
@@ -516,7 +308,7 @@
 
       } while (i > 0U);
 
-      /* The result is store in the destination buffer. */
+      /* The result is stored in the destination buffer. */
       *pDst++ = acc;
 
       /* Advance state pointer by 1 for the next sample */
@@ -545,441 +337,379 @@
    }
 
 }
+#else
+void arm_fir_f32(
+  const arm_fir_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+        float32_t *px;                                 /* Temporary pointer for state buffer */
+  const float32_t *pb;                                 /* Temporary pointer for coefficient buffer */
+        float32_t acc0;                                /* Accumulator */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        float32_t acc1, acc2, acc3, acc4, acc5, acc6, acc7;     /* Accumulators */
+        float32_t x0, x1, x2, x3, x4, x5, x6, x7;               /* Temporary variables to hold state values */
+        float32_t c0;                                           /* Temporary variable to hold coefficient value */
+#endif
+
+  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 8 output values simultaneously.
+   * The variables acc0 ... acc7 hold output values that are being computed:
+   *
+   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
+   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
+   */
+
+  blkCnt = blockSize >> 3U;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 4 new input samples into the state buffer. */
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set all accumulators to zero */
+    acc0 = 0.0f;
+    acc1 = 0.0f;
+    acc2 = 0.0f;
+    acc3 = 0.0f;
+    acc4 = 0.0f;
+    acc5 = 0.0f;
+    acc6 = 0.0f;
+    acc7 = 0.0f;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+    /* This is separated from the others to avoid
+     * a call to __aeabi_memmove which would be slower
+     */
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+
+    /* Read the first 7 samples from the state buffer:  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
+    x0 = *px++;
+    x1 = *px++;
+    x2 = *px++;
+    x3 = *px++;
+    x4 = *px++;
+    x5 = *px++;
+    x6 = *px++;
+
+    /* Loop unrolling: process 8 taps at a time. */
+    tapCnt = numTaps >> 3U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-3] sample */
+      x7 = *(px++);
+
+      /* acc0 +=  b[numTaps-1] * x[n-numTaps] */
+      acc0 += x0 * c0;
+
+      /* acc1 +=  b[numTaps-1] * x[n-numTaps-1] */
+      acc1 += x1 * c0;
+
+      /* acc2 +=  b[numTaps-1] * x[n-numTaps-2] */
+      acc2 += x2 * c0;
+
+      /* acc3 +=  b[numTaps-1] * x[n-numTaps-3] */
+      acc3 += x3 * c0;
+
+      /* acc4 +=  b[numTaps-1] * x[n-numTaps-4] */
+      acc4 += x4 * c0;
+
+      /* acc1 +=  b[numTaps-1] * x[n-numTaps-5] */
+      acc5 += x5 * c0;
+
+      /* acc2 +=  b[numTaps-1] * x[n-numTaps-6] */
+      acc6 += x6 * c0;
+
+      /* acc3 +=  b[numTaps-1] * x[n-numTaps-7] */
+      acc7 += x7 * c0;
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-4] sample */
+      x0 = *(px++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += x1 * c0;
+      acc1 += x2 * c0;
+      acc2 += x3 * c0;
+      acc3 += x4 * c0;
+      acc4 += x5 * c0;
+      acc5 += x6 * c0;
+      acc6 += x7 * c0;
+      acc7 += x0 * c0;
+
+      /* Read the b[numTaps-3] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-5] sample */
+      x1 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x2 * c0;
+      acc1 += x3 * c0;
+      acc2 += x4 * c0;
+      acc3 += x5 * c0;
+      acc4 += x6 * c0;
+      acc5 += x7 * c0;
+      acc6 += x0 * c0;
+      acc7 += x1 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-6] sample */
+      x2 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x3 * c0;
+      acc1 += x4 * c0;
+      acc2 += x5 * c0;
+      acc3 += x6 * c0;
+      acc4 += x7 * c0;
+      acc5 += x0 * c0;
+      acc6 += x1 * c0;
+      acc7 += x2 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-6] sample */
+      x3 = *(px++);
+      /* Perform the multiply-accumulates */
+      acc0 += x4 * c0;
+      acc1 += x5 * c0;
+      acc2 += x6 * c0;
+      acc3 += x7 * c0;
+      acc4 += x0 * c0;
+      acc5 += x1 * c0;
+      acc6 += x2 * c0;
+      acc7 += x3 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-6] sample */
+      x4 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x5 * c0;
+      acc1 += x6 * c0;
+      acc2 += x7 * c0;
+      acc3 += x0 * c0;
+      acc4 += x1 * c0;
+      acc5 += x2 * c0;
+      acc6 += x3 * c0;
+      acc7 += x4 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-6] sample */
+      x5 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x6 * c0;
+      acc1 += x7 * c0;
+      acc2 += x0 * c0;
+      acc3 += x1 * c0;
+      acc4 += x2 * c0;
+      acc5 += x3 * c0;
+      acc6 += x4 * c0;
+      acc7 += x5 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-6] sample */
+      x6 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x7 * c0;
+      acc1 += x0 * c0;
+      acc2 += x1 * c0;
+      acc3 += x2 * c0;
+      acc4 += x3 * c0;
+      acc5 += x4 * c0;
+      acc6 += x5 * c0;
+      acc7 += x6 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    tapCnt = numTaps % 0x8U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *(pb++);
+
+      /* Fetch 1 state variable */
+      x7 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+      acc2 += x2 * c0;
+      acc3 += x3 * c0;
+      acc4 += x4 * c0;
+      acc5 += x5 * c0;
+      acc6 += x6 * c0;
+      acc7 += x7 * c0;
+
+      /* Reuse the present sample states for next sample */
+      x0 = x1;
+      x1 = x2;
+      x2 = x3;
+      x3 = x4;
+      x4 = x5;
+      x5 = x6;
+      x6 = x7;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by 8 to process the next group of 8 samples */
+    pState = pState + 8;
+
+    /* The results in the 8 accumulators, store in the destination buffer. */
+    *pDst++ = acc0;
+    *pDst++ = acc1;
+    *pDst++ = acc2;
+    *pDst++ = acc3;
+    *pDst++ = acc4;
+    *pDst++ = acc5;
+    *pDst++ = acc6;
+    *pDst++ = acc7;
+
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining output samples */
+  blkCnt = blockSize % 0x8U;
 
 #else
 
-/* Run the below code for Cortex-M4 and Cortex-M3 */
+  /* Initialize blkCnt with number of taps */
+  blkCnt = blockSize;
 
-void arm_fir_f32(
-const arm_fir_instance_f32 * S,
-float32_t * pSrc,
-float32_t * pDst,
-uint32_t blockSize)
-{
-   float32_t *pState = S->pState;                 /* State pointer */
-   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-   float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-   float32_t acc0, acc1, acc2, acc3, acc4, acc5, acc6, acc7;     /* Accumulators */
-   float32_t x0, x1, x2, x3, x4, x5, x6, x7, c0;  /* Temporary variables to hold state and coefficient values */
-   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-   uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-   float32_t p0,p1,p2,p3,p4,p5,p6,p7;             /* Temporary product values */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
-   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-   /* pStateCurnt points to the location where the new input data should be written */
-   pStateCurnt = &(S->pState[(numTaps - 1U)]);
+  while (blkCnt > 0U)
+  {
+    /* Copy one sample at a time into state buffer */
+    *pStateCurnt++ = *pSrc++;
 
-   /* Apply loop unrolling and compute 8 output values simultaneously.
-    * The variables acc0 ... acc7 hold output values that are being computed:
-    *
-    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
-    *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
-    *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
-    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
-    */
-   blkCnt = blockSize >> 3;
+    /* Set the accumulator to zero */
+    acc0 = 0.0f;
 
-   /* First part of the processing with loop unrolling.  Compute 8 outputs at a time.
-   ** a second loop below computes the remaining 1 to 7 samples. */
-   while (blkCnt > 0U)
-   {
-      /* Copy four new input samples into the state buffer */
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
+    /* Initialize state pointer */
+    px = pState;
 
-      /* Set all accumulators to zero */
-      acc0 = 0.0f;
-      acc1 = 0.0f;
-      acc2 = 0.0f;
-      acc3 = 0.0f;
-      acc4 = 0.0f;
-      acc5 = 0.0f;
-      acc6 = 0.0f;
-      acc7 = 0.0f;
+    /* Initialize Coefficient pointer */
+    pb = pCoeffs;
 
-      /* Initialize state pointer */
-      px = pState;
+    i = numTaps;
 
-      /* Initialize coeff pointer */
-      pb = (pCoeffs);
+    /* Perform the multiply-accumulates */
+    do
+    {
+      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
+      acc0 += *px++ * *pb++;
 
-      /* This is separated from the others to avoid
-       * a call to __aeabi_memmove which would be slower
-       */
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
+      i--;
+    } while (i > 0U);
 
-      /* Read the first seven samples from the state buffer:  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
-      x0 = *px++;
-      x1 = *px++;
-      x2 = *px++;
-      x3 = *px++;
-      x4 = *px++;
-      x5 = *px++;
-      x6 = *px++;
+    /* Store result in destination buffer. */
+    *pDst++ = acc0;
 
-      /* Loop unrolling.  Process 8 taps at a time. */
-      tapCnt = numTaps >> 3U;
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1U;
 
-      /* Loop over the number of taps.  Unroll by a factor of 8.
-       ** Repeat until we've computed numTaps-8 coefficients. */
-      while (tapCnt > 0U)
-      {
-         /* Read the b[numTaps-1] coefficient */
-         c0 = *(pb++);
+    /* Decrement loop counter */
+    blkCnt--;
+  }
 
-         /* Read x[n-numTaps-3] sample */
-         x7 = *(px++);
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
 
-         /* acc0 +=  b[numTaps-1] * x[n-numTaps] */
-         p0 = x0 * c0;
+  /* Points to the start of the state buffer */
+  pStateCurnt = S->pState;
 
-         /* acc1 +=  b[numTaps-1] * x[n-numTaps-1] */
-         p1 = x1 * c0;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-         /* acc2 +=  b[numTaps-1] * x[n-numTaps-2] */
-         p2 = x2 * c0;
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
 
-         /* acc3 +=  b[numTaps-1] * x[n-numTaps-3] */
-         p3 = x3 * c0;
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
 
-         /* acc4 +=  b[numTaps-1] * x[n-numTaps-4] */
-         p4 = x4 * c0;
+    /* Decrement loop counter */
+    tapCnt--;
+  }
 
-         /* acc1 +=  b[numTaps-1] * x[n-numTaps-5] */
-         p5 = x5 * c0;
+  /* Calculate remaining number of copies */
+  tapCnt = (numTaps - 1U) % 0x4U;
 
-         /* acc2 +=  b[numTaps-1] * x[n-numTaps-6] */
-         p6 = x6 * c0;
+#else
 
-         /* acc3 +=  b[numTaps-1] * x[n-numTaps-7] */
-         p7 = x7 * c0;
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
 
-         /* Read the b[numTaps-2] coefficient */
-         c0 = *(pb++);
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
-         /* Read x[n-numTaps-4] sample */
-         x0 = *(px++);
+  /* Copy remaining data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
 
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-
-         /* Perform the multiply-accumulate */
-         p0 = x1 * c0;
-         p1 = x2 * c0;
-         p2 = x3 * c0;
-         p3 = x4 * c0;
-         p4 = x5 * c0;
-         p5 = x6 * c0;
-         p6 = x7 * c0;
-         p7 = x0 * c0;
-
-         /* Read the b[numTaps-3] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-5] sample */
-         x1 = *(px++);
-
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-         /* Perform the multiply-accumulates */
-         p0 = x2 * c0;
-         p1 = x3 * c0;
-         p2 = x4 * c0;
-         p3 = x5 * c0;
-         p4 = x6 * c0;
-         p5 = x7 * c0;
-         p6 = x0 * c0;
-         p7 = x1 * c0;
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x2 = *(px++);
-
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-         /* Perform the multiply-accumulates */
-         p0 = x3 * c0;
-         p1 = x4 * c0;
-         p2 = x5 * c0;
-         p3 = x6 * c0;
-         p4 = x7 * c0;
-         p5 = x0 * c0;
-         p6 = x1 * c0;
-         p7 = x2 * c0;
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x3 = *(px++);
-
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-         /* Perform the multiply-accumulates */
-         p0 = x4 * c0;
-         p1 = x5 * c0;
-         p2 = x6 * c0;
-         p3 = x7 * c0;
-         p4 = x0 * c0;
-         p5 = x1 * c0;
-         p6 = x2 * c0;
-         p7 = x3 * c0;
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x4 = *(px++);
-
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-         /* Perform the multiply-accumulates */
-         p0 = x5 * c0;
-         p1 = x6 * c0;
-         p2 = x7 * c0;
-         p3 = x0 * c0;
-         p4 = x1 * c0;
-         p5 = x2 * c0;
-         p6 = x3 * c0;
-         p7 = x4 * c0;
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x5 = *(px++);
-
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-         /* Perform the multiply-accumulates */
-         p0 = x6 * c0;
-         p1 = x7 * c0;
-         p2 = x0 * c0;
-         p3 = x1 * c0;
-         p4 = x2 * c0;
-         p5 = x3 * c0;
-         p6 = x4 * c0;
-         p7 = x5 * c0;
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x6 = *(px++);
-
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-         /* Perform the multiply-accumulates */
-         p0 = x7 * c0;
-         p1 = x0 * c0;
-         p2 = x1 * c0;
-         p3 = x2 * c0;
-         p4 = x3 * c0;
-         p5 = x4 * c0;
-         p6 = x5 * c0;
-         p7 = x6 * c0;
-
-         tapCnt--;
-
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-      }
-
-      /* If the filter length is not a multiple of 8, compute the remaining filter taps */
-      tapCnt = numTaps % 0x8U;
-
-      while (tapCnt > 0U)
-      {
-         /* Read coefficients */
-         c0 = *(pb++);
-
-         /* Fetch 1 state variable */
-         x7 = *(px++);
-
-         /* Perform the multiply-accumulates */
-         p0 = x0 * c0;
-         p1 = x1 * c0;
-         p2 = x2 * c0;
-         p3 = x3 * c0;
-         p4 = x4 * c0;
-         p5 = x5 * c0;
-         p6 = x6 * c0;
-         p7 = x7 * c0;
-
-         /* Reuse the present sample states for next sample */
-         x0 = x1;
-         x1 = x2;
-         x2 = x3;
-         x3 = x4;
-         x4 = x5;
-         x5 = x6;
-         x6 = x7;
-
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-         /* Decrement the loop counter */
-         tapCnt--;
-      }
-
-      /* Advance the state pointer by 8 to process the next group of 8 samples */
-      pState = pState + 8;
-
-      /* The results in the 8 accumulators, store in the destination buffer. */
-      *pDst++ = acc0;
-      *pDst++ = acc1;
-      *pDst++ = acc2;
-      *pDst++ = acc3;
-      *pDst++ = acc4;
-      *pDst++ = acc5;
-      *pDst++ = acc6;
-      *pDst++ = acc7;
-
-      blkCnt--;
-   }
-
-   /* If the blockSize is not a multiple of 8, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-   blkCnt = blockSize % 0x8U;
-
-   while (blkCnt > 0U)
-   {
-      /* Copy one sample at a time into state buffer */
-      *pStateCurnt++ = *pSrc++;
-
-      /* Set the accumulator to zero */
-      acc0 = 0.0f;
-
-      /* Initialize state pointer */
-      px = pState;
-
-      /* Initialize Coefficient pointer */
-      pb = (pCoeffs);
-
-      i = numTaps;
-
-      /* Perform the multiply-accumulates */
-      do
-      {
-         acc0 += *px++ * *pb++;
-         i--;
-
-      } while (i > 0U);
-
-      /* The result is store in the destination buffer. */
-      *pDst++ = acc0;
-
-      /* Advance state pointer by 1 for the next sample */
-      pState = pState + 1;
-
-      blkCnt--;
-   }
-
-   /* Processing is complete.
-   ** Now copy the last numTaps - 1 samples to the start of the state buffer.
-   ** This prepares the state buffer for the next function call. */
-
-   /* Points to the start of the state buffer */
-   pStateCurnt = S->pState;
-
-   tapCnt = (numTaps - 1U) >> 2U;
-
-   /* copy data */
-   while (tapCnt > 0U)
-   {
-      *pStateCurnt++ = *pState++;
-      *pStateCurnt++ = *pState++;
-      *pStateCurnt++ = *pState++;
-      *pStateCurnt++ = *pState++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-   }
-
-   /* Calculate remaining number of copies */
-   tapCnt = (numTaps - 1U) % 0x4U;
-
-   /* Copy the remaining q31_t data */
-   while (tapCnt > 0U)
-   {
-      *pStateCurnt++ = *pState++;
+    /* Decrement loop counter */
+    tapCnt--;
+  }
 
-      /* Decrement the loop counter */
-      tapCnt--;
-   }
 }
 
-#endif
-
+#endif /* #if defined(ARM_MATH_NEON) */
 /**
 * @} end of FIR group
 */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c b/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c
index 212990c..5f8df95 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_fast_q15.c
  * Description:  Q15 Fast FIR filter processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,78 +29,78 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR
- * @{
+  @addtogroup FIR
+  @{
  */
 
 /**
- * @param[in] *S points to an instance of the Q15 FIR filter structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process per call.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * This fast version uses a 32-bit accumulator with 2.30 format.
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * Thus, if the accumulator result overflows it wraps around and distorts the result.
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
- * The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.
- *
- * \par
- * Refer to the function <code>arm_fir_q15()</code> for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.  Both the slow and the fast versions use the same instance structure.
- * Use the function <code>arm_fir_init_q15()</code> to initialize the filter structure.
+  @brief         Processing function for the Q15 FIR filter (fast version).
+  @param[in]     S          points to an instance of the Q15 FIR filter structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This fast version uses a 32-bit accumulator with 2.30 format.
+                   The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around and distorts the result.
+                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
+                   The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.
+
+  @remark
+                   Refer to \ref arm_fir_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.  Both the slow and the fast versions use the same instance structure.
+                   Use function \ref arm_fir_init_q15() to initialize the filter structure.
  */
 
 void arm_fir_fast_q15(
   const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q15_t *px;                                     /* Temporary q31 pointer for SIMD state buffer accesses */
-  q31_t x0, x1, x2, c0;                          /* Temporary variables to hold SIMD state and coefficient values */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q15_t *px;                                     /* Temporary pointer for state buffer */
+  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q31_t acc0;                                    /* Accumulators */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
 
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc1, acc2, acc3;                        /* Accumulators */
+        q31_t x0, x1, x2, c0;                          /* Temporary variables to hold state and coefficient values */
+#endif
 
   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
   /* pStateCurnt points to the location where the new input data should be written */
   pStateCurnt = &(S->pState[(numTaps - 1U)]);
 
-  /* Apply loop unrolling and compute 4 output values simultaneously.
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 output values simultaneously.
    * The variables acc0 ... acc3 hold output values that are being computed:
    *
    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
    */
+  blkCnt = blockSize >> 2U;
 
-  blkCnt = blockSize >> 2;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* Copy four new input samples into the state buffer.
-     ** Use 32-bit SIMD to move the 16-bit data.  Only requires two copies. */
+    /* Copy 4 new input samples into the state buffer. */
     *pStateCurnt++ = *pSrc++;
     *pStateCurnt++ = *pSrc++;
     *pStateCurnt++ = *pSrc++;
     *pStateCurnt++ = *pSrc++;
 
-
     /* Set all accumulators to zero */
     acc0 = 0;
     acc1 = 0;
@@ -114,19 +114,19 @@
     pb = pCoeffs;
 
     /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */
-    x0 = *__SIMD32(px)++;
+    x0 = read_q15x2_ia (&px);
 
     /* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */
-    x2 = *__SIMD32(px)++;
+    x2 = read_q15x2_ia (&px);
 
     /* Loop over the number of taps.  Unroll by a factor of 4.
-     ** Repeat until we've computed numTaps-(numTaps%4) coefficients. */
-    tapCnt = numTaps >> 2;
+       Repeat until we've computed numTaps-(numTaps%4) coefficients. */
+    tapCnt = numTaps >> 2U;
 
-    while (tapCnt > 0)
+    while (tapCnt > 0U)
     {
       /* Read the first two coefficients using SIMD:  b[N] and b[N-1] coefficients */
-      c0 = *__SIMD32(pb)++;
+      c0 = read_q15x2_ia ((q15_t **) &pb);
 
       /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
       acc0 = __SMLAD(x0, c0, acc0);
@@ -142,7 +142,7 @@
 #endif
 
       /* Read state x[n-N-4], x[n-N-5] */
-      x0 = _SIMD32_OFFSET(px);
+      x0 = read_q15x2_ia (&px);
 
       /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
       acc1 = __SMLADX(x1, c0, acc1);
@@ -158,13 +158,13 @@
       acc3 = __SMLADX(x1, c0, acc3);
 
       /* Read coefficients b[N-2], b[N-3] */
-      c0 = *__SIMD32(pb)++;
+      c0 = read_q15x2_ia ((q15_t **) &pb);
 
       /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
       acc0 = __SMLAD(x2, c0, acc0);
 
       /* Read state x[n-N-6], x[n-N-7] with offset */
-      x2 = _SIMD32_OFFSET(px + 2U);
+      x2 = read_q15x2_ia (&px);
 
       /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
       acc2 = __SMLAD(x0, c0, acc2);
@@ -182,21 +182,16 @@
       /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
       acc3 = __SMLADX(x1, c0, acc3);
 
-      /* Update state pointer for next state reading */
-      px += 4U;
-
       /* Decrement tap count */
       tapCnt--;
-
     }
 
     /* If the filter length is not a multiple of 4, compute the remaining filter taps.
-     ** This is always be 2 taps since the filter length is even. */
+       This is always be 2 taps since the filter length is even. */
     if ((numTaps & 0x3U) != 0U)
     {
-
       /* Read last two coefficients */
-      c0 = *__SIMD32(pb)++;
+      c0 = read_q15x2_ia ((q15_t **) &pb);
 
       /* Perform the multiply-accumulates */
       acc0 = __SMLAD(x0, c0, acc0);
@@ -210,7 +205,7 @@
 #endif
 
       /* Read last state variables */
-      x0 = *__SIMD32(px);
+      x0 = read_q15x2 (px);
 
       /* Perform the multiply-accumulates */
       acc1 = __SMLADX(x1, c0, acc1);
@@ -226,38 +221,33 @@
       acc3 = __SMLADX(x1, c0, acc3);
     }
 
-    /* The results in the 4 accumulators are in 2.30 format.  Convert to 1.15 with saturation.
-     ** Then store the 4 outputs in the destination buffer. */
-
+    /* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation.
+       Then store the 4 outputs in the destination buffer. */
 #ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
 #else
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN       */
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     /* Advance the state pointer by 4 to process the next group of 4 samples */
     pState = pState + 4U;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining output samples */
   blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of taps */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     /* Copy two samples into state buffer */
@@ -274,35 +264,37 @@
 
     do
     {
-
-      acc0 += (q31_t) * px++ * *pb++;
-	  acc0 += (q31_t) * px++ * *pb++;
+      acc0 += (q31_t) *px++ * *pb++;
+	  acc0 += (q31_t) *px++ * *pb++;
 
       tapCnt--;
     }
     while (tapCnt > 0U);
 
-    /* The result is in 2.30 format.  Convert to 1.15 with saturation.
-     ** Then store the output in the destination buffer. */
+    /* The result is in 2.30 format. Convert to 1.15 with saturation.
+       Then store the output in the destination buffer. */
     *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
 
     /* Advance state pointer by 1 for the next sample */
     pState = pState + 1U;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
   /* Processing is complete.
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
-   ** This prepares the state buffer for the next function call. */
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
 
   /* Points to the start of the state buffer */
   pStateCurnt = S->pState;
 
-  /* Calculation of count for copying integer writes */
-  tapCnt = (numTaps - 1U) >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
 
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
   while (tapCnt > 0U)
   {
     *pStateCurnt++ = *pState++;
@@ -310,24 +302,31 @@
     *pStateCurnt++ = *pState++;
     *pStateCurnt++ = *pState++;
 
+    /* Decrement loop counter */
     tapCnt--;
-
   }
 
-  /* Calculation of count for remaining q15_t data */
+  /* Calculate remaining number of copies */
   tapCnt = (numTaps - 1U) % 0x4U;
 
-  /* copy remaining data */
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy remaining data */
   while (tapCnt > 0U)
   {
     *pStateCurnt++ = *pState++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     tapCnt--;
   }
 
 }
 
 /**
- * @} end of FIR group
+  @} end of FIR group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c b/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c
index d37e13c..513cb72 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_fast_q31.c
  * Description:  Processing function for the Q31 Fast FIR filter
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,73 +29,75 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR
- * @{
+  @addtogroup FIR
+  @{
  */
 
 /**
- * @param[in] *S points to an instance of the Q31 structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block output data.
- * @param[in] blockSize number of samples to process per call.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
- * These intermediate results are added to a 2.30 accumulator.
- * Finally, the accumulator is saturated and converted to a 1.31 result.
- * The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
- *
- * \par
- * Refer to the function <code>arm_fir_q31()</code> for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.  Both the slow and the fast versions use the same instance structure.
- * Use the function <code>arm_fir_init_q31()</code> to initialize the filter structure.
+  @brief         Processing function for the Q31 FIR filter (fast version).
+  @param[in]     S          points to an instance of the Q31 structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This function is optimized for speed at the expense of fixed-point precision and overflow protection.
+                   The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
+                   These intermediate results are added to a 2.30 accumulator.
+                   Finally, the accumulator is saturated and converted to a 1.31 result.
+                   The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.
+                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
+
+ @remark
+                   Refer to \ref arm_fir_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.  Both the slow and the fast versions use the same instance structure.
+                   Use function \ref arm_fir_init_q31() to initialize the filter structure.
  */
 
 IAR_ONLY_LOW_OPTIMIZATION_ENTER
 void arm_fir_fast_q31(
   const arm_fir_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t x0, x1, x2, x3;                          /* Temporary variables to hold state */
-  q31_t c0;                                      /* Temporary variable to hold coefficient value */
-  q31_t *px;                                     /* Temporary pointer for state */
-  q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q31_t *px;                                     /* Temporary pointer for state buffer */
+  const q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q31_t acc0;                                    /* Accumulators */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
 
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc1, acc2, acc3;                        /* Accumulators */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
+#endif
+
+  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
   /* pStateCurnt points to the location where the new input data should be written */
   pStateCurnt = &(S->pState[(numTaps - 1U)]);
 
-  /* Apply loop unrolling and compute 4 output values simultaneously.
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 output values simultaneously.
    * The variables acc0 ... acc3 hold output values that are being computed:
    *
    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
    */
-  blkCnt = blockSize >> 2;
+  blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* Copy four new input samples into the state buffer */
+    /* Copy 4 new input samples into the state buffer. */
     *pStateCurnt++ = *pSrc++;
     *pStateCurnt++ = *pSrc++;
     *pStateCurnt++ = *pSrc++;
@@ -113,17 +115,18 @@
     /* Initialize coefficient pointer */
     pb = pCoeffs;
 
-    /* Read the first three samples from the state buffer:
+    /* Read the first 3 samples from the state buffer:
      *  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
-    x0 = *(px++);
-    x1 = *(px++);
-    x2 = *(px++);
+    x0 = *px++;
+    x1 = *px++;
+    x2 = *px++;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-    i = tapCnt;
+    /* Loop unrolling. Process 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
 
-    while (i > 0U)
+    /* Loop over the number of taps.  Unroll by a factor of 4.
+       Repeat until we've computed numTaps-4 coefficients. */
+    while (tapCnt > 0U)
     {
       /* Read the b[numTaps] coefficient */
       c0 = *pb;
@@ -183,14 +186,14 @@
       pb += 4U;
       px += 4U;
 
-      /* Decrement the loop counter */
-      i--;
+      /* Decrement loop counter */
+      tapCnt--;
     }
 
     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    tapCnt = numTaps % 0x4U;
 
-    i = numTaps - (tapCnt * 4U);
-    while (i > 0U)
+    while (tapCnt > 0U)
     {
       /* Read coefficients */
       c0 = *(pb++);
@@ -209,28 +212,33 @@
       x1 = x2;
       x2 = x3;
 
-      /* Decrement the loop counter */
-      i--;
+      /* Decrement loop counter */
+      tapCnt--;
     }
 
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 4;
-
-    /* The results in the 4 accumulators are in 2.30 format.  Convert to 1.31
-     ** Then store the 4 outputs in the destination buffer. */
+    /* The results in the 4 accumulators are in 2.30 format. Convert to 1.31
+       Then store the 4 outputs in the destination buffer. */
     *pDst++ = (q31_t) (acc0 << 1);
     *pDst++ = (q31_t) (acc1 << 1);
     *pDst++ = (q31_t) (acc2 << 1);
     *pDst++ = (q31_t) (acc3 << 1);
 
-    /* Decrement the samples loop counter */
+    /* Advance the state pointer by 4 to process the next group of 4 samples */
+    pState = pState + 4U;
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
+  /* Loop unrolling: Compute remaining output samples */
+  blkCnt = blockSize % 0x4U;
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 4U;
+#else
+
+  /* Initialize blkCnt with number of taps */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
@@ -244,39 +252,63 @@
     px = pState;
 
     /* Initialize Coefficient pointer */
-    pb = (pCoeffs);
+    pb = pCoeffs;
 
     i = numTaps;
 
     /* Perform the multiply-accumulates */
     do
     {
-      multAcc_32x32_keep32_R(acc0, (*px++), (*(pb++)));
+      multAcc_32x32_keep32_R(acc0, (*px++), (*pb++));
       i--;
     } while (i > 0U);
 
-    /* The result is in 2.30 format.  Convert to 1.31
-     ** Then store the output in the destination buffer. */
+    /* The result is in 2.30 format. Convert to 1.31
+       Then store the output in the destination buffer. */
     *pDst++ = (q31_t) (acc0 << 1);
 
     /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
+    pState = pState + 1U;
 
-    /* Decrement the samples loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
   /* Processing is complete.
-   ** Now copy the last numTaps - 1 samples to the start of the state buffer.
-   ** This prepares the state buffer for the next function call. */
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
 
   /* Points to the start of the state buffer */
   pStateCurnt = S->pState;
 
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
   /* Calculate remaining number of copies */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
   tapCnt = (numTaps - 1U);
 
-  /* Copy the remaining q31_t data */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy remaining data */
   while (tapCnt > 0U)
   {
     *pStateCurnt++ = *pState++;
@@ -285,9 +317,8 @@
     tapCnt--;
   }
 
-
 }
 IAR_ONLY_LOW_OPTIMIZATION_EXIT
 /**
- * @} end of FIR group
+  @} end of FIR group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_init_f32.c b/DSP/Source/FilteringFunctions/arm_fir_init_f32.c
index 8bcb736..02e82ad 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_init_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_init_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_init_f32.c
  * Description:  Floating-point FIR filter initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,41 +29,39 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR
- * @{
+  @addtogroup FIR
+  @{
  */
 
 /**
- * @details
- *
- * @param[in,out] *S points to an instance of the floating-point FIR filter structure.
- * @param[in] 	  numTaps  Number of filter coefficients in the filter.
- * @param[in]     *pCoeffs points to the filter coefficients buffer.
- * @param[in]     *pState points to the state buffer.
- * @param[in] 	  blockSize number of samples that are processed per call.
- * @return 		  none.
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * \par
- * <code>pState</code> points to the array of state variables.
- * <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_f32()</code>.
+  @brief         Initialization function for the floating-point FIR filter.
+  @param[in,out] S          points to an instance of the floating-point FIR filter structure
+  @param[in] 	 numTaps    number of filter coefficients in the filter
+  @param[in]     pCoeffs    points to the filter coefficients buffer
+  @param[in]     pState     points to the state buffer
+  @param[in]     blockSize  number of samples processed per call
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+  @par
+                   <code>pState</code> points to the array of state variables.
+                   <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_f32()</code>.
  */
 
 void arm_fir_init_f32(
-  arm_fir_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize)
+        arm_fir_instance_f32 * S,
+        uint16_t numTaps,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        uint32_t blockSize)
 {
   /* Assign filter taps */
   S->numTaps = numTaps;
@@ -71,14 +69,13 @@
   /* Assign coefficient pointer */
   S->pCoeffs = pCoeffs;
 
-  /* Clear state buffer and the size of state buffer is (blockSize + numTaps - 1) */
+  /* Clear state buffer. The size is always (blockSize + numTaps - 1) */
   memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float32_t));
 
   /* Assign state pointer */
   S->pState = pState;
-
 }
 
 /**
- * @} end of FIR group
+  @} end of FIR group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_init_q15.c b/DSP/Source/FilteringFunctions/arm_fir_init_q15.c
index e4d6ef8..a5b2d06 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_init_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_init_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_init_q15.c
  * Description:  Q15 FIR filter initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,66 +29,63 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR
- * @{
+  @addtogroup FIR
+  @{
  */
 
 /**
- * @param[in,out]  *S points to an instance of the Q15 FIR filter structure.
- * @param[in] 	   numTaps  Number of filter coefficients in the filter. Must be even and greater than or equal to 4.
- * @param[in]      *pCoeffs points to the filter coefficients buffer.
- * @param[in]      *pState points to the state buffer.
- * @param[in]      blockSize is number of samples processed per call.
- * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if
- * <code>numTaps</code> is not greater than or equal to 4 and even.
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * Note that <code>numTaps</code> must be even and greater than or equal to 4.
- * To implement an odd length filter simply increase <code>numTaps</code> by 1 and set the last coefficient to zero.
- * For example, to implement a filter with <code>numTaps=3</code> and coefficients
- * <pre>
- *     {0.3, -0.8, 0.3}
- * </pre>
- * set <code>numTaps=4</code> and use the coefficients:
- * <pre>
- *     {0.3, -0.8, 0.3, 0}.
- * </pre>
- * Similarly, to implement a two point filter
- * <pre>
- *     {0.3, -0.3}
- * </pre>
- * set <code>numTaps=4</code> and use the coefficients:
- * <pre>
- *     {0.3, -0.3, 0, 0}.
- * </pre>
- * \par
- * <code>pState</code> points to the array of state variables.
- * <code>pState</code> is of length <code>numTaps+blockSize</code>, when running on Cortex-M4 and Cortex-M3  and is of length <code>numTaps+blockSize-1</code>, when running on Cortex-M0 where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q15()</code>.
+  @brief         Initialization function for the Q15 FIR filter.
+  @param[in,out] S          points to an instance of the Q15 FIR filter structure.
+  @param[in] 	 numTaps    number of filter coefficients in the filter. Must be even and greater than or equal to 4.
+  @param[in]     pCoeffs    points to the filter coefficients buffer.
+  @param[in]     pState     points to the state buffer.
+  @param[in]     blockSize  number of samples processed per call.
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>numTaps</code> is not greater than or equal to 4 and even
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+                   Note that <code>numTaps</code> must be even and greater than or equal to 4.
+                   To implement an odd length filter simply increase <code>numTaps</code> by 1 and set the last coefficient to zero.
+                   For example, to implement a filter with <code>numTaps=3</code> and coefficients
+  <pre>
+      {0.3, -0.8, 0.3}
+  </pre>
+                   set <code>numTaps=4</code> and use the coefficients:
+  <pre>
+      {0.3, -0.8, 0.3, 0}.
+  </pre>
+                   Similarly, to implement a two point filter
+  <pre>
+      {0.3, -0.3}
+  </pre>
+                   set <code>numTaps=4</code> and use the coefficients:
+  <pre>
+      {0.3, -0.3, 0, 0}.
+  </pre>
+                   <code>pState</code> points to the array of state variables.
+                   <code>pState</code> is of length <code>numTaps+blockSize</code>, when running on Cortex-M4 and Cortex-M3  and is of length <code>numTaps+blockSize-1</code>, when running on Cortex-M0 where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q15()</code>.
  */
 
 arm_status arm_fir_init_q15(
-  arm_fir_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize)
+        arm_fir_instance_q15 * S,
+        uint16_t numTaps,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        uint32_t blockSize)
 {
   arm_status status;
 
-
 #if defined (ARM_MATH_DSP)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
   /* The Number of filter coefficients in the filter must be even and at least 4 */
   if (numTaps & 0x1U)
   {
@@ -115,15 +112,13 @@
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Assign filter taps */
   S->numTaps = numTaps;
 
   /* Assign coefficient pointer */
   S->pCoeffs = pCoeffs;
 
-  /* Clear the state buffer.  The size is always (blockSize + numTaps - 1) */
+  /* Clear state buffer. The size is always (blockSize + numTaps - 1) */
   memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t));
 
   /* Assign state pointer */
@@ -133,10 +128,10 @@
 
   return (status);
 
-#endif /*  #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_DSP) */
 
 }
 
 /**
- * @} end of FIR group
+  @} end of FIR group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_init_q31.c b/DSP/Source/FilteringFunctions/arm_fir_init_q31.c
index 3308438..7d8376f 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_init_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_init_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_init_q31.c
  * Description:  Q31 FIR filter initialization function.
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,41 +29,38 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR
- * @{
+  @addtogroup FIR
+  @{
  */
 
 /**
- * @details
- *
- * @param[in,out] *S points to an instance of the Q31 FIR filter structure.
- * @param[in] 	  numTaps  Number of filter coefficients in the filter.
- * @param[in] 	  *pCoeffs points to the filter coefficients buffer.
- * @param[in] 	  *pState points to the state buffer.
- * @param[in] 	  blockSize number of samples that are processed per call.
- * @return        none.
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * \par
- * <code>pState</code> points to the array of state variables.
- * <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q31()</code>.
+  @brief         Initialization function for the Q31 FIR filter.
+  @param[in,out] S          points to an instance of the Q31 FIR filter structure
+  @param[in] 	 numTaps    number of filter coefficients in the filter
+  @param[in]     pCoeffs    points to the filter coefficients buffer
+  @param[in]     pState     points to the state buffer
+  @param[in]     blockSize  number of samples processed
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+                   <code>pState</code> points to the array of state variables.
+                   <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q31()</code>.
  */
 
 void arm_fir_init_q31(
-  arm_fir_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize)
+        arm_fir_instance_q31 * S,
+        uint16_t numTaps,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        uint32_t blockSize)
 {
   /* Assign filter taps */
   S->numTaps = numTaps;
@@ -71,14 +68,13 @@
   /* Assign coefficient pointer */
   S->pCoeffs = pCoeffs;
 
-  /* Clear state buffer and state array size is (blockSize + numTaps - 1) */
-  memset(pState, 0, (blockSize + ((uint32_t) numTaps - 1U)) * sizeof(q31_t));
+  /* Clear state buffer. The size is always (blockSize + numTaps - 1) */
+  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));
 
   /* Assign state pointer */
   S->pState = pState;
-
 }
 
 /**
- * @} end of FIR group
+  @} end of FIR group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_init_q7.c b/DSP/Source/FilteringFunctions/arm_fir_init_q7.c
index 38cc7b4..f96d250 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_init_q7.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_init_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_init_q7.c
  * Description:  Q7 FIR filter initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,54 +29,53 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR
- * @{
+  @addtogroup FIR
+  @{
  */
+
 /**
- * @param[in,out] *S points to an instance of the Q7 FIR filter structure.
- * @param[in] 	  numTaps  Number of filter coefficients in the filter.
- * @param[in] 	  *pCoeffs points to the filter coefficients buffer.
- * @param[in]     *pState points to the state buffer.
- * @param[in]     blockSize number of samples that are processed per call.
- * @return     	  none
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * \par
- * <code>pState</code> points to the array of state variables.
- * <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q7()</code>.
+  @brief         Initialization function for the Q7 FIR filter.
+  @param[in,out] S          points to an instance of the Q7 FIR filter structure
+  @param[in] 	 numTaps    number of filter coefficients in the filter
+  @param[in]     pCoeffs    points to the filter coefficients buffer
+  @param[in]     pState     points to the state buffer
+  @param[in]     blockSize  number of samples processed
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+  @par
+                   <code>pState</code> points to the array of state variables.
+                   <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q7()</code>.
  */
 
 void arm_fir_init_q7(
-  arm_fir_instance_q7 * S,
-  uint16_t numTaps,
-  q7_t * pCoeffs,
-  q7_t * pState,
-  uint32_t blockSize)
+        arm_fir_instance_q7 * S,
+        uint16_t numTaps,
+  const q7_t * pCoeffs,
+        q7_t * pState,
+        uint32_t blockSize)
 {
-
   /* Assign filter taps */
   S->numTaps = numTaps;
 
   /* Assign coefficient pointer */
   S->pCoeffs = pCoeffs;
 
-  /* Clear the state buffer.  The size is always (blockSize + numTaps - 1) */
+  /* Clear state buffer. The size is always (blockSize + numTaps - 1) */
   memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q7_t));
 
   /* Assign state pointer */
   S->pState = pState;
-
 }
 
 /**
- * @} end of FIR group
+  @} end of FIR group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c b/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c
index 66cfcf8..ee0ed27 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_interpolate_f32.c
  * Description:  Floating-point FIR interpolation sequences
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,120 +29,117 @@
 #include "arm_math.h"
 
 /**
- * @defgroup FIR_Interpolate Finite Impulse Response (FIR) Interpolator
- *
- * These functions combine an upsampler (zero stuffer) and an FIR filter.
- * They are used in multirate systems for increasing the sample rate of a signal without introducing high frequency images.
- * Conceptually, the functions are equivalent to the block diagram below:
- * \image html FIRInterpolator.gif "Components included in the FIR Interpolator functions"
- * After upsampling by a factor of <code>L</code>, the signal should be filtered by a lowpass filter with a normalized
- * cutoff frequency of <code>1/L</code> in order to eliminate high frequency copies of the spectrum.
- * The user of the function is responsible for providing the filter coefficients.
- *
- * The FIR interpolator functions provided in the CMSIS DSP Library combine the upsampler and FIR filter in an efficient manner.
- * The upsampler inserts <code>L-1</code> zeros between each sample.
- * Instead of multiplying by these zero values, the FIR filter is designed to skip them.
- * This leads to an efficient implementation without any wasted effort.
- * The functions operate on blocks of input and output data.
- * <code>pSrc</code> points to an array of <code>blockSize</code> input values and
- * <code>pDst</code> points to an array of <code>blockSize*L</code> output values.
- *
- * The library provides separate functions for Q15, Q31, and floating-point data types.
- *
- * \par Algorithm:
- * The functions use a polyphase filter structure:
- * <pre>
- *    y[n] = b[0] * x[n] + b[L]   * x[n-1] + ... + b[L*(phaseLength-1)] * x[n-phaseLength+1]
- *    y[n+1] = b[1] * x[n] + b[L+1] * x[n-1] + ... + b[L*(phaseLength-1)+1] * x[n-phaseLength+1]
- *    ...
- *    y[n+(L-1)] = b[L-1] * x[n] + b[2*L-1] * x[n-1] + ....+ b[L*(phaseLength-1)+(L-1)] * x[n-phaseLength+1]
- * </pre>
- * This approach is more efficient than straightforward upsample-then-filter algorithms.
- * With this method the computation is reduced by a factor of <code>1/L</code> when compared to using a standard FIR filter.
- * \par
- * <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
- * <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code> and this is checked by the
- * initialization functions.
- * Internally, the function divides the FIR filter's impulse response into shorter filters of length
- * <code>phaseLength=numTaps/L</code>.
- * Coefficients are stored in time reversed order.
- * \par
- * <pre>
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * \par
- * <code>pState</code> points to a state array of size <code>blockSize + phaseLength - 1</code>.
- * Samples in the state buffer are stored in the order:
- * \par
- * <pre>
- *    {x[n-phaseLength+1], x[n-phaseLength], x[n-phaseLength-1], x[n-phaseLength-2]....x[0], x[1], ..., x[blockSize-1]}
- * </pre>
- * The state variables are updated after each block of data is processed, the coefficients are untouched.
- *
- * \par Instance Structure
- * The coefficients and state variables for a filter are stored together in an instance data structure.
- * A separate instance structure must be defined for each filter.
- * Coefficient arrays may be shared among several instances while state variable array should be allocated separately.
- * There are separate instance structure declarations for each of the 3 supported data types.
- *
- * \par Initialization Functions
- * There is also an associated initialization function for each data type.
- * The initialization function performs the following operations:
- * - Sets the values of the internal structure fields.
- * - Zeros out the values in the state buffer.
- * - Checks to make sure that the length of the filter is a multiple of the interpolation factor.
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * L (interpolation factor), pCoeffs, phaseLength (numTaps / L), pState. Also set all of the values in pState to zero.
- *
- * \par
- * Use of the initialization function is optional.
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
- * To place an instance structure into a const data section, the instance structure must be manually initialized.
- * The code below statically initializes each of the 3 different data type filter instance structures
- * <pre>
- * arm_fir_interpolate_instance_f32 S = {L, phaseLength, pCoeffs, pState};
- * arm_fir_interpolate_instance_q31 S = {L, phaseLength, pCoeffs, pState};
- * arm_fir_interpolate_instance_q15 S = {L, phaseLength, pCoeffs, pState};
- * </pre>
- * where <code>L</code> is the interpolation factor; <code>phaseLength=numTaps/L</code> is the
- * length of each of the shorter FIR filters used internally,
- * <code>pCoeffs</code> is the address of the coefficient buffer;
- * <code>pState</code> is the address of the state buffer.
- * Be sure to set the values in the state buffer to zeros when doing static initialization.
- *
- * \par Fixed-Point Behavior
- * Care must be taken when using the fixed-point versions of the FIR interpolate filter functions.
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
- * Refer to the function specific documentation below for usage guidelines.
+  @defgroup FIR_Interpolate Finite Impulse Response (FIR) Interpolator
+
+  These functions combine an upsampler (zero stuffer) and an FIR filter.
+  They are used in multirate systems for increasing the sample rate of a signal without introducing high frequency images.
+  Conceptually, the functions are equivalent to the block diagram below:
+  \image html FIRInterpolator.gif "Components included in the FIR Interpolator functions"
+  After upsampling by a factor of <code>L</code>, the signal should be filtered by a lowpass filter with a normalized
+  cutoff frequency of <code>1/L</code> in order to eliminate high frequency copies of the spectrum.
+  The user of the function is responsible for providing the filter coefficients.
+
+  The FIR interpolator functions provided in the CMSIS DSP Library combine the upsampler and FIR filter in an efficient manner.
+  The upsampler inserts <code>L-1</code> zeros between each sample.
+  Instead of multiplying by these zero values, the FIR filter is designed to skip them.
+  This leads to an efficient implementation without any wasted effort.
+  The functions operate on blocks of input and output data.
+  <code>pSrc</code> points to an array of <code>blockSize</code> input values and
+  <code>pDst</code> points to an array of <code>blockSize*L</code> output values.
+
+  The library provides separate functions for Q15, Q31, and floating-point data types.
+
+  @par           Algorithm
+                   The functions use a polyphase filter structure:
+  <pre>
+      y[n] = b[0] * x[n] + b[L]   * x[n-1] + ... + b[L*(phaseLength-1)] * x[n-phaseLength+1]
+      y[n+1] = b[1] * x[n] + b[L+1] * x[n-1] + ... + b[L*(phaseLength-1)+1] * x[n-phaseLength+1]
+      ...
+      y[n+(L-1)] = b[L-1] * x[n] + b[2*L-1] * x[n-1] + ....+ b[L*(phaseLength-1)+(L-1)] * x[n-phaseLength+1]
+  </pre>
+                   This approach is more efficient than straightforward upsample-then-filter algorithms.
+                   With this method the computation is reduced by a factor of <code>1/L</code> when compared to using a standard FIR filter.
+  @par
+                   <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
+                   <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code> and this is checked by the
+                   initialization functions.
+                   Internally, the function divides the FIR filter's impulse response into shorter filters of length
+                   <code>phaseLength=numTaps/L</code>.
+                   Coefficients are stored in time reversed order.
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+  @par
+                   <code>pState</code> points to a state array of size <code>blockSize + phaseLength - 1</code>.
+                   Samples in the state buffer are stored in the order:
+  <pre>
+     {x[n-phaseLength+1], x[n-phaseLength], x[n-phaseLength-1], x[n-phaseLength-2]....x[0], x[1], ..., x[blockSize-1]}
+  </pre>
+  @par
+                   The state variables are updated after each block of data is processed, the coefficients are untouched.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable array should be allocated separately.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+
+  @par           Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   - Checks to make sure that the length of the filter is a multiple of the interpolation factor.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   L (interpolation factor), pCoeffs, phaseLength (numTaps / L), pState. Also set all of the values in pState to zero.
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   The code below statically initializes each of the 3 different data type filter instance structures
+  <pre>
+      arm_fir_interpolate_instance_f32 S = {L, phaseLength, pCoeffs, pState};
+      arm_fir_interpolate_instance_q31 S = {L, phaseLength, pCoeffs, pState};
+      arm_fir_interpolate_instance_q15 S = {L, phaseLength, pCoeffs, pState};
+  </pre>
+  @par
+                   where <code>L</code> is the interpolation factor; <code>phaseLength=numTaps/L</code> is the
+                   length of each of the shorter FIR filters used internally,
+                   <code>pCoeffs</code> is the address of the coefficient buffer;
+                   <code>pState</code> is the address of the state buffer.
+                   Be sure to set the values in the state buffer to zeros when doing static initialization.
+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the fixed-point versions of the FIR interpolate filter functions.
+                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+                   Refer to the function specific documentation below for usage guidelines.
  */
 
 /**
- * @addtogroup FIR_Interpolate
- * @{
+  @addtogroup FIR_Interpolate
+  @{
  */
 
 /**
- * @brief Processing function for the floating-point FIR interpolator.
- * @param[in] *S        points to an instance of the floating-point FIR interpolator structure.
- * @param[in] *pSrc     points to the block of input data.
- * @param[out] *pDst    points to the block of output data.
- * @param[in] blockSize number of input samples to process per call.
- * @return none.
+  @brief         Processing function for floating-point FIR interpolator.
+  @param[in]     S          points to an instance of the floating-point FIR interpolator structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
  */
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
+#if defined(ARM_MATH_NEON)
 void arm_fir_interpolate_f32(
   const arm_fir_interpolate_instance_f32 * S,
-  float32_t * pSrc,
+  const float32_t * pSrc,
   float32_t * pDst,
   uint32_t blockSize)
 {
   float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+  const float32_t *pCoeffs = S->pCoeffs;         /* Coefficient pointer */
   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *ptr1, *ptr2;                        /* Temporary pointers for state and coefficient buffers */
+  float32_t *ptr1;                               /* Temporary pointers for state buffer */
+  const float32_t *ptr2;                         /* Temporary pointers for coefficient buffer */
   float32_t sum0;                                /* Accumulators */
   float32_t x0, c0;                              /* Temporary variables to hold state and coefficient values */
   uint32_t i, blkCnt, j;                         /* Loop counters */
@@ -152,22 +149,382 @@
   uint32_t blkCntN4;
   float32_t c1, c2, c3;
 
+  float32x4_t sum0v;
+  float32x4_t accV,accV0,accV1;
+  float32x4_t x0v,x1v,x2v,xa,xb;
+  uint32x4_t x0v_u,x1v_u,x2v_u,xa_u,xb_u;
+  float32x2_t tempV;
+
   /* S->pState buffer contains previous frame (phaseLen - 1) samples */
   /* pStateCurnt points to the location where the new input data should be written */
   pStateCurnt = S->pState + (phaseLen - 1U);
 
   /* Initialise  blkCnt */
-  blkCnt = blockSize / 4;
-  blkCntN4 = blockSize - (4 * blkCnt);
+  blkCnt = blockSize >> 3;
+  blkCntN4 = blockSize & 7;
 
-  /* Samples loop unrolled by 4 */
+  /* Loop unrolling */
   while (blkCnt > 0U)
   {
+    /* Copy new input samples into the state buffer */
+    sum0v = vld1q_f32(pSrc);
+    vst1q_f32(pStateCurnt,sum0v);
+    pSrc += 4;
+    pStateCurnt += 4;
+
+    sum0v = vld1q_f32(pSrc);
+    vst1q_f32(pStateCurnt,sum0v);
+    pSrc += 4;
+    pStateCurnt += 4;
+
+    /* Address modifier index of coefficient buffer */
+    j = 1U;
+
+    /* Loop over the Interpolation factor. */
+    i = (S->L);
+
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      accV0 = vdupq_n_f32(0.0);
+      accV1 = vdupq_n_f32(0.0);
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (S->L - j);
+
+      /* Loop over the polyPhase length. Unroll by a factor of 4.
+       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
+      tapCnt = phaseLen >> 2U;
+     
+      x0v = vld1q_f32(ptr1);
+      x1v = vld1q_f32(ptr1 + 4);
+	
+      while (tapCnt > 0U)
+      {
+        /* Read the input samples */
+        x2v = vld1q_f32(ptr1 + 8);
+
+        /* Read the coefficients */
+        c0 = *(ptr2);
+
+        /* Perform the multiply-accumulate */
+        accV0 = vmlaq_n_f32(accV0,x0v,c0);
+        accV1 = vmlaq_n_f32(accV1,x1v,c0);
+       
+        /* Read the coefficients, inputs and perform multiply-accumulate */
+        c1 = *(ptr2 + S->L);
+	
+        xa = vextq_f32(x0v,x1v,1);
+        xb = vextq_f32(x1v,x2v,1);
+
+        accV0 = vmlaq_n_f32(accV0,xa,c1);
+        accV1 = vmlaq_n_f32(accV1,xb,c1);
+
+        /* Read the coefficients, inputs and perform multiply-accumulate */
+        c2 = *(ptr2 + S->L * 2);
+	
+        xa = vextq_f32(x0v,x1v,2);
+        xb = vextq_f32(x1v,x2v,2);
+        
+	accV0 = vmlaq_n_f32(accV0,xa,c2);
+        accV1 = vmlaq_n_f32(accV1,xb,c2);
+
+        /* Read the coefficients, inputs and perform multiply-accumulate */
+        c3 = *(ptr2 + S->L * 3);
+
+        xa = vextq_f32(x0v,x1v,3);
+        xb = vextq_f32(x1v,x2v,3);
+        
+	accV0 = vmlaq_n_f32(accV0,xa,c3);
+        accV1 = vmlaq_n_f32(accV1,xb,c3);
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += 4 * S->L;
+        ptr1 += 4;
+        x0v = x1v;
+        x1v = x2v;
+
+        /* Decrement the loop counter */
+        tapCnt--;
+      }
+
+      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
+      tapCnt = phaseLen % 0x4U;
+
+      x2v = vld1q_f32(ptr1 + 8);
+
+      switch (tapCnt)
+      {
+        case 3:
+             c0 = *(ptr2);
+             accV0 = vmlaq_n_f32(accV0,x0v,c0);
+             accV1 = vmlaq_n_f32(accV1,x1v,c0);
+             ptr2 += S->L;
+
+             c0 = *(ptr2);
+
+             xa = vextq_f32(x0v,x1v,1);
+             xb = vextq_f32(x1v,x2v,1);
+
+             accV0 = vmlaq_n_f32(accV0,xa,c0);
+             accV1 = vmlaq_n_f32(accV1,xb,c0);
+             ptr2 += S->L;
+
+             c0 = *(ptr2);
+
+             xa = vextq_f32(x0v,x1v,2);
+             xb = vextq_f32(x1v,x2v,2);
+             
+	     accV0 = vmlaq_n_f32(accV0,xa,c0);
+             accV1 = vmlaq_n_f32(accV1,xb,c0);
+             ptr2 += S->L;
+
+        break;
+
+        case 2:
+             c0 = *(ptr2);
+             accV0 = vmlaq_n_f32(accV0,x0v,c0);
+             accV1 = vmlaq_n_f32(accV1,x1v,c0);
+             ptr2 += S->L;
+
+             c0 = *(ptr2);
+
+             xa = vextq_f32(x0v,x1v,1);
+             xb = vextq_f32(x1v,x2v,1);
+             
+	     accV0 = vmlaq_n_f32(accV0,xa,c0);
+             accV1 = vmlaq_n_f32(accV1,xb,c0);
+             ptr2 += S->L;
+
+        break;
+
+        case 1:
+             c0 = *(ptr2);
+             accV0 = vmlaq_n_f32(accV0,x0v,c0);
+             accV1 = vmlaq_n_f32(accV1,x1v,c0);
+             ptr2 += S->L;
+
+        break;
+
+        default:
+        break;
+        
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *pDst = accV0[0];
+      *(pDst + S->L) = accV0[1];
+      *(pDst + 2 * S->L) = accV0[2];
+      *(pDst + 3 * S->L) = accV0[3];
+
+      *(pDst + 4 * S->L) = accV1[0];
+      *(pDst + 5 * S->L) = accV1[1];
+      *(pDst + 6 * S->L) = accV1[2];
+      *(pDst + 7 * S->L) = accV1[3];
+
+      pDst++;
+
+      /* Increment the address modifier index of coefficient buffer */
+      j++;
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 8;
+
+    pDst += S->L * 7;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+
+  while (blkCntN4 > 0U)
+  {
     /* Copy new input sample into the state buffer */
     *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
+
+    /* Address modifier index of coefficient buffer */
+    j = 1U;
+
+    /* Loop over the Interpolation factor. */
+    i = S->L;
+
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      sum0v = vdupq_n_f32(0.0);
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (S->L - j);
+
+      /* Loop over the polyPhase length. Unroll by a factor of 4.
+       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
+      tapCnt = phaseLen >> 2U;
+
+      while (tapCnt > 0U)
+      {
+        /* Read the coefficient */
+        x1v[0] = *(ptr2);
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Read the input sample */
+        x0v = vld1q_f32(ptr1);
+        ptr1 += 4;
+
+        /* Read the coefficient */
+        x1v[1] = *(ptr2);
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Read the coefficient */
+        x1v[2] = *(ptr2);
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Read the coefficient */
+        x1v[3] = *(ptr2);
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        sum0v = vmlaq_f32(sum0v,x0v,x1v);
+       
+        /* Decrement the loop counter */
+        tapCnt--;
+      }
+
+      tempV = vpadd_f32(vget_low_f32(sum0v),vget_high_f32(sum0v));
+      sum0 = tempV[0] + tempV[1];
+
+      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
+      tapCnt = phaseLen % 0x4U;
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += *(ptr1++) * (*ptr2);
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Decrement the loop counter */
+        tapCnt--;
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *pDst++ = sum0;
+
+      /* Increment the address modifier index of coefficient buffer */
+      j++;
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 1;
+
+    /* Decrement the loop counter */
+    blkCntN4--;
+  }
+
+  /* Processing is complete.
+   ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
+   ** This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCurnt = S->pState;
+
+  tapCnt = (phaseLen - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    sum0v = vld1q_f32(pState);
+    vst1q_f32(pStateCurnt,sum0v);
+    pState += 4;
+    pStateCurnt += 4;
+
+    /* Decrement the loop counter */
+    tapCnt--;
+  }
+
+  tapCnt = (phaseLen - 1U) % 0x04U;
+
+  /* copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement the loop counter */
+    tapCnt--;
+  }
+
+}
+#else
+
+void arm_fir_interpolate_f32(
+  const arm_fir_interpolate_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *pStateCur;                          /* Points to the current sample of the state */
+        float32_t *ptr1;                               /* Temporary pointer for state buffer */
+  const float32_t *ptr2;                               /* Temporary pointer for coefficient buffer */
+        float32_t sum0;                                /* Accumulators */
+        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
+        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
+        uint32_t j;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        float32_t acc0, acc1, acc2, acc3;
+        float32_t x0, x1, x2, x3;
+        float32_t c0, c1, c2, c3;
+#endif
+
+  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (phaseLen - 1U);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
 
     /* Address modifier index of coefficient buffer */
     j = 1U;
@@ -190,7 +547,7 @@
       ptr2 = pCoeffs + (S->L - j);
 
       /* Loop over the polyPhase length. Unroll by a factor of 4.
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
+         Repeat until we've computed numTaps-(4*S->L) coefficients. */
       tapCnt = phaseLen >> 2U;
 
       x0 = *(ptr1++);
@@ -199,7 +556,6 @@
 
       while (tapCnt > 0U)
       {
-
         /* Read the input sample */
         x3 = *(ptr1++);
 
@@ -254,7 +610,7 @@
          * Increment the coefficient pointer by interpolation factor times. */
         ptr2 += 4 * S->L;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         tapCnt--;
       }
 
@@ -263,7 +619,6 @@
 
       while (tapCnt > 0U)
       {
-
         /* Read the input sample */
         x3 = *(ptr1++);
 
@@ -284,13 +639,13 @@
         x1 = x2;
         x2 = x3;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         tapCnt--;
       }
 
       /* The result is in the accumulator, store in the destination buffer. */
-      *pDst = acc0;
-      *(pDst + S->L) = acc1;
+      *(pDst           ) = acc0;
+      *(pDst +     S->L) = acc1;
       *(pDst + 2 * S->L) = acc2;
       *(pDst + 3 * S->L) = acc3;
 
@@ -299,7 +654,7 @@
       /* Increment the address modifier index of coefficient buffer */
       j++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       i--;
     }
 
@@ -309,23 +664,31 @@
 
     pDst += S->L * 3;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
 
-  while (blkCntN4 > 0U)
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
   {
     /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
 
     /* Address modifier index of coefficient buffer */
     j = 1U;
 
     /* Loop over the Interpolation factor. */
     i = S->L;
+
     while (i > 0U)
     {
       /* Set accumulator to zero */
@@ -337,78 +700,58 @@
       /* Initialize coefficient pointer */
       ptr2 = pCoeffs + (S->L - j);
 
-      /* Loop over the polyPhase length. Unroll by a factor of 4.
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
+      /* Loop over the polyPhase length.
+         Repeat until we've computed numTaps-(4*S->L) coefficients. */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+     /* Loop unrolling: Compute 4 outputs at a time */
       tapCnt = phaseLen >> 2U;
+
       while (tapCnt > 0U)
       {
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
+        /* Perform the multiply-accumulate */
+        sum0 += *ptr1++ * *ptr2;
 
         /* Upsampling is done by stuffing L-1 zeros between each sample.
          * So instead of multiplying zeros with coefficients,
          * Increment the coefficient pointer by interpolation factor times. */
         ptr2 += S->L;
 
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += x0 * c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
+        sum0 += *ptr1++ * *ptr2;
         ptr2 += S->L;
 
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += x0 * c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
+        sum0 += *ptr1++ * *ptr2;
         ptr2 += S->L;
 
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += x0 * c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
+        sum0 += *ptr1++ * *ptr2;
         ptr2 += S->L;
 
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += x0 * c0;
-
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         tapCnt--;
       }
 
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
+      /* Loop unrolling: Compute remaining outputs */
       tapCnt = phaseLen % 0x4U;
 
+#else
+
+      /* Initialize tapCnt with number of samples */
+      tapCnt = phaseLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
       while (tapCnt > 0U)
       {
         /* Perform the multiply-accumulate */
-        sum0 += *(ptr1++) * (*ptr2);
+        sum0 += *ptr1++ * *ptr2;
 
-        /* Increment the coefficient pointer by interpolation factor times. */
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
         ptr2 += S->L;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         tapCnt--;
       }
 
@@ -427,66 +770,67 @@
     pState = pState + 1;
 
     /* Decrement the loop counter */
-    blkCntN4--;
+    blkCnt--;
   }
 
   /* Processing is complete.
-   ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
-   ** This prepares the state buffer for the next function call. */
+     Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
 
   /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
+  pStateCur = S->pState;
 
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   tapCnt = (phaseLen - 1U) >> 2U;
 
   /* copy data */
   while (tapCnt > 0U)
   {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     tapCnt--;
   }
 
+  /* Loop unrolling: Compute remaining outputs */
   tapCnt = (phaseLen - 1U) % 0x04U;
 
-  /* copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-}
-
 #else
 
-  /* Run the below code for Cortex-M0 */
+    /* Initialize tapCnt with number of samples */
+    tapCnt = (phaseLen - 1U);
 
-void arm_fir_interpolate_f32(
-  const arm_fir_interpolate_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *ptr1, *ptr2;                        /* Temporary pointers for state and coefficient buffers */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
 
-  float32_t sum;                                 /* Accumulator */
-  uint32_t i, blkCnt;                            /* Loop counters */
-  uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
+    /* Decrement loop counter */
+    tapCnt--;
+  }
 
+#else
+/* alternate version for CM0_FAMILY */
+
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *pStateCur;                        /* Points to the current sample of the state */
+        float32_t *ptr1;                               /* Temporary pointer for state buffer */
+  const float32_t *ptr2;                               /* Temporary pointer for coefficient buffer */
+        float32_t sum0;                                /* Accumulators */
+        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
+        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
 
   /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (phaseLen - 1U);
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (phaseLen - 1U);
 
   /* Total number of intput samples */
   blkCnt = blockSize;
@@ -495,7 +839,7 @@
   while (blkCnt > 0U)
   {
     /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
 
     /* Loop over the Interpolation factor. */
     i = S->L;
@@ -503,7 +847,7 @@
     while (i > 0U)
     {
       /* Set accumulator to zero */
-      sum = 0.0f;
+      sum0 = 0.0f;
 
       /* Initialize state pointer */
       ptr1 = pState;
@@ -517,7 +861,7 @@
       while (tapCnt > 0U)
       {
         /* Perform the multiply-accumulate */
-        sum += *ptr1++ * *ptr2;
+        sum0 += *ptr1++ * *ptr2;
 
         /* Increment the coefficient pointer by interpolation factor times. */
         ptr2 += S->L;
@@ -527,9 +871,9 @@
       }
 
       /* The result is in the accumulator, store in the destination buffer. */
-      *pDst++ = sum;
+      *pDst++ = sum0;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       i--;
     }
 
@@ -537,7 +881,7 @@
      * to process the next group of interpolation factor number samples */
     pState = pState + 1;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
@@ -546,24 +890,25 @@
    ** This prepares the state buffer for the next function call. */
 
   /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
+  pStateCur = S->pState;
 
   tapCnt = phaseLen - 1U;
 
+  /* Copy data */
   while (tapCnt > 0U)
   {
-    *pStateCurnt++ = *pState++;
+    *pStateCur++ = *pState++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     tapCnt--;
   }
 
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
 }
 
-#endif /*   #if defined (ARM_MATH_DSP) */
+#endif /* #if defined(ARM_MATH_NEON) */
 
-
-
- /**
-  * @} end of FIR_Interpolate group
-  */
+/**
+  @} end of FIR_Interpolate group
+ */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c b/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c
index 05fc370..287d347 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_interpolate_init_f32.c
  * Description:  Floating-point FIR interpolator initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,45 +29,46 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR_Interpolate
- * @{
+  @addtogroup FIR_Interpolate
+  @{
  */
 
 /**
- * @brief  Initialization function for the floating-point FIR interpolator.
- * @param[in,out] *S        points to an instance of the floating-point FIR interpolator structure.
- * @param[in]     L         upsample factor.
- * @param[in]     numTaps   number of filter coefficients in the filter.
- * @param[in]     *pCoeffs  points to the filter coefficient buffer.
- * @param[in]     *pState   points to the state buffer.
- * @param[in]     blockSize number of input samples to process per call.
- * @return        The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if
- * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- *    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
- * </pre>
- * The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>.
- * \par
- * <code>pState</code> points to the array of state variables.
- * <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words
- * where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_interpolate_f32()</code>.
+  @brief         Initialization function for the floating-point FIR interpolator.
+  @param[in,out] S         points to an instance of the floating-point FIR interpolator structure
+  @param[in]     L         upsample factor
+  @param[in]     numTaps   number of filter coefficients in the filter
+  @param[in]     pCoeffs   points to the filter coefficient buffer
+  @param[in]     pState    points to the state buffer
+  @param[in]     blockSize number of input samples to process per call
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
+  </pre>
+  @par
+                   The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>.
+  @par
+                   <code>pState</code> points to the array of state variables.
+                   <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words
+                   where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_interpolate_f32()</code>.
  */
 
 arm_status arm_fir_interpolate_init_f32(
-  arm_fir_interpolate_instance_f32 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize)
+        arm_fir_interpolate_instance_f32 * S,
+        uint8_t L,
+        uint16_t numTaps,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        uint32_t blockSize)
 {
   arm_status status;
 
@@ -79,7 +80,6 @@
   }
   else
   {
-
     /* Assign coefficient pointer */
     S->pCoeffs = pCoeffs;
 
@@ -89,10 +89,8 @@
     /* Assign polyPhaseLength */
     S->phaseLength = numTaps / L;
 
-    /* Clear state buffer and size of state array is always phaseLength + blockSize - 1 */
-    memset(pState, 0,
-           (blockSize +
-            ((uint32_t) S->phaseLength - 1U)) * sizeof(float32_t));
+    /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
+    memset(pState, 0, (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(float32_t));
 
     /* Assign state pointer */
     S->pState = pState;
@@ -101,9 +99,8 @@
   }
 
   return (status);
-
 }
 
- /**
-  * @} end of FIR_Interpolate group
-  */
+/**
+  @} end of FIR_Interpolate group
+ */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c b/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c
index 3b3fb79..7f43bbf 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_interpolate_init_q15.c
  * Description:  Q15 FIR interpolator initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,45 +29,46 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR_Interpolate
- * @{
+  @addtogroup FIR_Interpolate
+  @{
  */
 
 /**
- * @brief  Initialization function for the Q15 FIR interpolator.
- * @param[in,out] *S        points to an instance of the Q15 FIR interpolator structure.
- * @param[in]     L         upsample factor.
- * @param[in]     numTaps   number of filter coefficients in the filter.
- * @param[in]     *pCoeffs  points to the filter coefficient buffer.
- * @param[in]     *pState   points to the state buffer.
- * @param[in]     blockSize number of input samples to process per call.
- * @return        The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if
- * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- *    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
- * </pre>
- * The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>.
- * \par
- * <code>pState</code> points to the array of state variables.
- * <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words
- * where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_interpolate_q15()</code>.
+  @brief         Initialization function for the Q15 FIR interpolator.
+  @param[in,out] S         points to an instance of the Q15 FIR interpolator structure
+  @param[in]     L         upsample factor
+  @param[in]     numTaps   number of filter coefficients in the filter
+  @param[in]     pCoeffs   points to the filter coefficient buffer
+  @param[in]     pState    points to the state buffer
+  @param[in]     blockSize number of input samples to process per call
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>
+
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
+  </pre>
+                   The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>.
+  @par
+                   <code>pState</code> points to the array of state variables.
+                   <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words
+                   where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_interpolate_q15()</code>.
  */
 
 arm_status arm_fir_interpolate_init_q15(
-  arm_fir_interpolate_instance_q15 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize)
+        arm_fir_interpolate_instance_q15 * S,
+        uint8_t L,
+        uint16_t numTaps,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        uint32_t blockSize)
 {
   arm_status status;
 
@@ -79,7 +80,6 @@
   }
   else
   {
-
     /* Assign coefficient pointer */
     S->pCoeffs = pCoeffs;
 
@@ -90,8 +90,7 @@
     S->phaseLength = numTaps / L;
 
     /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
-    memset(pState, 0,
-           (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(q15_t));
+    memset(pState, 0, (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(q15_t));
 
     /* Assign state pointer */
     S->pState = pState;
@@ -100,9 +99,8 @@
   }
 
   return (status);
-
 }
 
- /**
-  * @} end of FIR_Interpolate group
-  */
+/**
+  @} end of FIR_Interpolate group
+ */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c b/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c
index 03959c0..973e715 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_interpolate_init_q31.c
  * Description:  Q31 FIR interpolator initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,46 +29,45 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR_Interpolate
- * @{
+  @addtogroup FIR_Interpolate
+  @{
  */
 
-
 /**
- * @brief  Initialization function for the Q31 FIR interpolator.
- * @param[in,out] *S        points to an instance of the Q31 FIR interpolator structure.
- * @param[in]     L         upsample factor.
- * @param[in]     numTaps   number of filter coefficients in the filter.
- * @param[in]     *pCoeffs  points to the filter coefficient buffer.
- * @param[in]     *pState   points to the state buffer.
- * @param[in]     blockSize number of input samples to process per call.
- * @return        The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if
- * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- *    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
- * </pre>
- * The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>.
- * \par
- * <code>pState</code> points to the array of state variables.
- * <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words
- * where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_interpolate_q31()</code>.
+  @brief         Initialization function for the Q31 FIR interpolator.
+  @param[in,out] S         points to an instance of the Q31 FIR interpolator structure
+  @param[in]     L         upsample factor
+  @param[in]     numTaps   number of filter coefficients in the filter
+  @param[in]     pCoeffs   points to the filter coefficient buffer
+  @param[in]     pState    points to the state buffer
+  @param[in]     blockSize number of input samples to process per call
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>
+ 
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
+  </pre>
+                   The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>.
+  @par
+                   <code>pState</code> points to the array of state variables.
+                   <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words
+                   where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_interpolate_q31()</code>.
  */
 
 arm_status arm_fir_interpolate_init_q31(
-  arm_fir_interpolate_instance_q31 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize)
+        arm_fir_interpolate_instance_q31 * S,
+        uint8_t L,
+        uint16_t numTaps,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        uint32_t blockSize)
 {
   arm_status status;
 
@@ -80,7 +79,6 @@
   }
   else
   {
-
     /* Assign coefficient pointer */
     S->pCoeffs = pCoeffs;
 
@@ -91,8 +89,7 @@
     S->phaseLength = numTaps / L;
 
     /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
-    memset(pState, 0,
-           (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(q31_t));
+    memset(pState, 0, (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(q31_t));
 
     /* Assign state pointer */
     S->pState = pState;
@@ -101,9 +98,8 @@
   }
 
   return (status);
-
 }
 
- /**
-  * @} end of FIR_Interpolate group
-  */
+/**
+  @} end of FIR_Interpolate group
+ */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c b/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c
index dc0cb4b..7efec94 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_interpolate_q15.c
  * Description:  Q15 FIR interpolation
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,68 +29,72 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR_Interpolate
- * @{
+  @addtogroup FIR_Interpolate
+  @{
  */
 
 /**
- * @brief Processing function for the Q15 FIR interpolator.
- * @param[in] *S        points to an instance of the Q15 FIR interpolator structure.
- * @param[in] *pSrc     points to the block of input data.
- * @param[out] *pDst    points to the block of output data.
- * @param[in] blockSize number of input samples to process per call.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.
+  @brief         Processing function for the Q15 FIR interpolator.
+  @param[in]     S          points to an instance of the Q15 FIR interpolator structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+                   Lastly, the accumulator is saturated to yield a result in 1.15 format.
  */
 
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
 void arm_fir_interpolate_q15(
   const arm_fir_interpolate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
-  q15_t *pState = S->pState;                     /* State pointer                                            */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer                                      */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state                */
-  q15_t *ptr1, *ptr2;                            /* Temporary pointers for state and coefficient buffers     */
-  q63_t sum0;                                    /* Accumulators                                             */
-  q15_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  uint32_t i, blkCnt, j, tapCnt;                 /* Loop counters                                            */
-  uint16_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
-  uint32_t blkCntN2;
-  q63_t acc0, acc1;
-  q15_t x1;
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCur;                              /* Points to the current sample of the state */
+        q15_t *ptr1;                                   /* Temporary pointer for state buffer */
+  const q15_t *ptr2;                                   /* Temporary pointer for coefficient buffer */
+        q63_t sum0;                                    /* Accumulators */
+        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
+        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
+        uint32_t j;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc0, acc1, acc2, acc3;
+        q15_t x0, x1, x2, x3;
+        q15_t c0, c1, c2, c3;
+#endif
 
   /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + ((q31_t) phaseLen - 1);
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (phaseLen - 1U);
 
-  /* Initialise  blkCnt */
-  blkCnt = blockSize / 2;
-  blkCntN2 = blockSize - (2 * blkCnt);
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* Samples loop unrolled by 2 */
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
   while (blkCnt > 0U)
   {
     /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
 
     /* Address modifier index of coefficient buffer */
     j = 1U;
@@ -103,6 +107,8 @@
       /* Set accumulator to zero */
       acc0 = 0;
       acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
 
       /* Initialize state pointer */
       ptr1 = pState;
@@ -111,55 +117,62 @@
       ptr2 = pCoeffs + (S->L - j);
 
       /* Loop over the polyPhase length. Unroll by a factor of 4.
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
+         Repeat until we've computed numTaps-(4*S->L) coefficients. */
       tapCnt = phaseLen >> 2U;
 
       x0 = *(ptr1++);
+      x1 = *(ptr1++);
+      x2 = *(ptr1++);
 
       while (tapCnt > 0U)
       {
-
         /* Read the input sample */
-        x1 = *(ptr1++);
+        x3 = *(ptr1++);
 
         /* Read the coefficient */
         c0 = *(ptr2);
 
         /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
-
+        acc0 += (q63_t) x0 * c0;
+        acc1 += (q63_t) x1 * c0;
+        acc2 += (q63_t) x2 * c0;
+        acc3 += (q63_t) x3 * c0;
 
         /* Read the coefficient */
-        c0 = *(ptr2 + S->L);
+        c1 = *(ptr2 + S->L);
 
         /* Read the input sample */
         x0 = *(ptr1++);
 
         /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x1 *c0;
-        acc1 += (q63_t) x0 *c0;
-
+        acc0 += (q63_t) x1 * c1;
+        acc1 += (q63_t) x2 * c1;
+        acc2 += (q63_t) x3 * c1;
+        acc3 += (q63_t) x0 * c1;
 
         /* Read the coefficient */
-        c0 = *(ptr2 + S->L * 2);
+        c2 = *(ptr2 + S->L * 2);
 
         /* Read the input sample */
         x1 = *(ptr1++);
 
         /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
+        acc0 += (q63_t) x2 * c2;
+        acc1 += (q63_t) x3 * c2;
+        acc2 += (q63_t) x0 * c2;
+        acc3 += (q63_t) x1 * c2;
 
         /* Read the coefficient */
-        c0 = *(ptr2 + S->L * 3);
+        c3 = *(ptr2 + S->L * 3);
 
         /* Read the input sample */
-        x0 = *(ptr1++);
+        x2 = *(ptr1++);
 
         /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x1 *c0;
-        acc1 += (q63_t) x0 *c0;
+        acc0 += (q63_t) x3 * c3;
+        acc1 += (q63_t) x0 * c3;
+        acc2 += (q63_t) x1 * c3;
+        acc3 += (q63_t) x2 * c3;
 
 
         /* Upsampling is done by stuffing L-1 zeros between each sample.
@@ -167,7 +180,7 @@
          * Increment the coefficient pointer by interpolation factor times. */
         ptr2 += 4 * S->L;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         tapCnt--;
       }
 
@@ -176,59 +189,69 @@
 
       while (tapCnt > 0U)
       {
-
         /* Read the input sample */
-        x1 = *(ptr1++);
+        x3 = *(ptr1++);
 
         /* Read the coefficient */
         c0 = *(ptr2);
 
         /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
+        acc0 += (q63_t) x0 * c0;
+        acc1 += (q63_t) x1 * c0;
+        acc2 += (q63_t) x2 * c0;
+        acc3 += (q63_t) x3 * c0;
 
         /* Increment the coefficient pointer by interpolation factor times. */
         ptr2 += S->L;
 
         /* update states for next sample processing */
         x0 = x1;
+        x1 = x2;
+        x2 = x3;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         tapCnt--;
       }
 
       /* The result is in the accumulator, store in the destination buffer. */
-      *pDst = (q15_t) (__SSAT((acc0 >> 15), 16));
-      *(pDst + S->L) = (q15_t) (__SSAT((acc1 >> 15), 16));
+      *(pDst           ) = (q15_t) (__SSAT((acc0 >> 15), 16));
+      *(pDst +     S->L) = (q15_t) (__SSAT((acc1 >> 15), 16));
+      *(pDst + 2 * S->L) = (q15_t) (__SSAT((acc2 >> 15), 16));
+      *(pDst + 3 * S->L) = (q15_t) (__SSAT((acc3 >> 15), 16));
 
       pDst++;
 
       /* Increment the address modifier index of coefficient buffer */
       j++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       i--;
     }
 
     /* Advance the state pointer by 1
      * to process the next group of interpolation factor number samples */
-    pState = pState + 2;
+    pState = pState + 4;
 
-    pDst += S->L;
+    pDst += S->L * 3;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 2, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blkCntN2;
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
 
-  /* Loop over the blockSize. */
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
 
     /* Address modifier index of coefficient buffer */
     j = 1U;
@@ -246,90 +269,65 @@
       /* Initialize coefficient pointer */
       ptr2 = pCoeffs + (S->L - j);
 
-      /* Loop over the polyPhase length. Unroll by a factor of 4.
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2;
+      /* Loop over the polyPhase length.
+         Repeat until we've computed numTaps-(4*S->L) coefficients. */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+     /* Loop unrolling: Compute 4 outputs at a time */
+      tapCnt = phaseLen >> 2U;
+
       while (tapCnt > 0U)
       {
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
+        /* Perform the multiply-accumulate */
+        sum0 += (q63_t) *ptr1++ * *ptr2;
 
         /* Upsampling is done by stuffing L-1 zeros between each sample.
          * So instead of multiplying zeros with coefficients,
          * Increment the coefficient pointer by interpolation factor times. */
         ptr2 += S->L;
 
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
+        sum0 += (q63_t) *ptr1++ * *ptr2;
         ptr2 += S->L;
 
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
+        sum0 += (q63_t) *ptr1++ * *ptr2;
         ptr2 += S->L;
 
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
+        sum0 += (q63_t) *ptr1++ * *ptr2;
         ptr2 += S->L;
 
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         tapCnt--;
       }
 
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen & 0x3U;
+      /* Loop unrolling: Compute remaining outputs */
+      tapCnt = phaseLen % 0x4U;
+
+#else
+
+      /* Initialize tapCnt with number of samples */
+      tapCnt = phaseLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
       while (tapCnt > 0U)
       {
-        /* Read the coefficient */
-        c0 = *(ptr2);
+        /* Perform the multiply-accumulate */
+        sum0 += (q63_t) *ptr1++ * *ptr2;
 
-        /* Increment the coefficient pointer by interpolation factor times. */
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
         ptr2 += S->L;
 
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         tapCnt--;
       }
 
       /* The result is in the accumulator, store in the destination buffer. */
       *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
 
+      /* Increment the address modifier index of coefficient buffer */
       j++;
 
       /* Decrement the loop counter */
@@ -344,71 +342,62 @@
     blkCnt--;
   }
 
-
   /* Processing is complete.
-   ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
-   ** This prepares the state buffer for the next function call. */
+     Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
 
   /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
+  pStateCur = S->pState;
 
-  i = ((uint32_t) phaseLen - 1U) >> 2U;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  tapCnt = (phaseLen - 1U) >> 2U;
 
   /* copy data */
-  while (i > 0U)
+  while (tapCnt > 0U)
   {
-#ifndef UNALIGNED_SUPPORT_DISABLE
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
 
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  tapCnt = (phaseLen - 1U) % 0x04U;
 
 #else
 
-    *pStateCurnt++ = *pState++;
-	*pStateCurnt++ = *pState++;
-	*pStateCurnt++ = *pState++;
-	*pStateCurnt++ = *pState++;
+    /* Initialize tapCnt with number of samples */
+    tapCnt = (phaseLen - 1U);
 
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
-	/* Decrement the loop counter */
-    i--;
-  }
-
-  i = ((uint32_t) phaseLen - 1U) % 0x04U;
-
-  while (i > 0U)
+  /* Copy data */
+  while (tapCnt > 0U)
   {
-    *pStateCurnt++ = *pState++;
+    *pStateCur++ = *pState++;
 
-    /* Decrement the loop counter */
-    i--;
+    /* Decrement loop counter */
+    tapCnt--;
   }
-}
 
 #else
+/* alternate version for CM0_FAMILY */
 
-  /* Run the below code for Cortex-M0 */
-
-void arm_fir_interpolate_q15(
-  const arm_fir_interpolate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer                                            */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer                                      */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state                */
-  q15_t *ptr1, *ptr2;                            /* Temporary pointers for state and coefficient buffers     */
-  q63_t sum;                                     /* Accumulator */
-  q15_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  uint32_t i, blkCnt, tapCnt;                    /* Loop counters                                            */
-  uint16_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
-
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCur;                              /* Points to the current sample of the state */
+        q15_t *ptr1;                                   /* Temporary pointer for state buffer */
+  const q15_t *ptr2;                                   /* Temporary pointer for coefficient buffer */
+        q63_t sum0;                                    /* Accumulators */
+        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
+        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
 
   /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (phaseLen - 1U);
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (phaseLen - 1U);
 
   /* Total number of intput samples */
   blkCnt = blockSize;
@@ -417,7 +406,7 @@
   while (blkCnt > 0U)
   {
     /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
 
     /* Loop over the Interpolation factor. */
     i = S->L;
@@ -425,7 +414,7 @@
     while (i > 0U)
     {
       /* Set accumulator to zero */
-      sum = 0;
+      sum0 = 0;
 
       /* Initialize state pointer */
       ptr1 = pState;
@@ -434,30 +423,24 @@
       ptr2 = pCoeffs + (i - 1U);
 
       /* Loop over the polyPhase length */
-      tapCnt = (uint32_t) phaseLen;
+      tapCnt = phaseLen;
 
       while (tapCnt > 0U)
       {
-        /* Read the coefficient */
-        c0 = *ptr2;
+        /* Perform the multiply-accumulate */
+        sum0 += ((q63_t) *ptr1++ * *ptr2);
 
         /* Increment the coefficient pointer by interpolation factor times. */
         ptr2 += S->L;
 
-        /* Read the input sample */
-        x0 = *ptr1++;
-
-        /* Perform the multiply-accumulate */
-        sum += ((q31_t) x0 * c0);
-
         /* Decrement the loop counter */
         tapCnt--;
       }
 
-      /* Store the result after converting to 1.15 format in the destination buffer */
-      *pDst++ = (q15_t) (__SSAT((sum >> 15), 16));
+      /* Store the result after converting to 1.15 format in the destination buffer. */
+      *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       i--;
     }
 
@@ -465,7 +448,7 @@
      * to process the next group of interpolation factor number samples */
     pState = pState + 1;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
@@ -474,23 +457,23 @@
    ** This prepares the state buffer for the next function call. */
 
   /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
+  pStateCur = S->pState;
 
-  i = (uint32_t) phaseLen - 1U;
+  tapCnt = phaseLen - 1U;
 
-  while (i > 0U)
+  /* Copy data */
+  while (tapCnt > 0U)
   {
-    *pStateCurnt++ = *pState++;
+    *pStateCur++ = *pState++;
 
-    /* Decrement the loop counter */
-    i--;
+    /* Decrement loop counter */
+    tapCnt--;
   }
 
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
 }
 
-#endif /*   #if defined (ARM_MATH_DSP) */
-
-
- /**
-  * @} end of FIR_Interpolate group
-  */
+/**
+  @} end of FIR_Interpolate group
+ */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c b/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c
index 2d23b37..d6a8ca3 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_interpolate_q31.c
  * Description:  Q31 FIR interpolation
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,69 +29,72 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR_Interpolate
- * @{
+  @addtogroup FIR_Interpolate
+  @{
  */
 
 /**
- * @brief Processing function for the Q31 FIR interpolator.
- * @param[in] *S        points to an instance of the Q31 FIR interpolator structure.
- * @param[in] *pSrc     points to the block of input data.
- * @param[out] *pDst    points to the block of output data.
- * @param[in] blockSize number of input samples to process per call.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * Thus, if the accumulator result overflows it wraps around rather than clip.
- * In order to avoid overflows completely the input signal must be scaled down by <code>1/(numTaps/L)</code>.
- * since <code>numTaps/L</code> additions occur per output sample.
- * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
+  @brief         Processing function for the Q31 FIR interpolator.
+  @param[in]     S          points to an instance of the Q31 FIR interpolator structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clip.
+                   In order to avoid overflows completely the input signal must be scaled down by <code>1/(numTaps/L)</code>.
+                   since <code>numTaps/L</code> additions occur per output sample.
+                   After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
  */
 
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
 void arm_fir_interpolate_q31(
   const arm_fir_interpolate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t *ptr1, *ptr2;                            /* Temporary pointers for state and coefficient buffers */
-  q63_t sum0;                                    /* Accumulators */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  uint32_t i, blkCnt, j;                         /* Loop counters */
-  uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
 
-  uint32_t blkCntN2;
-  q63_t acc0, acc1;
-  q31_t x1;
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCur;                              /* Points to the current sample of the state */
+        q31_t *ptr1;                                   /* Temporary pointer for state buffer */
+  const q31_t *ptr2;                                   /* Temporary pointer for coefficient buffer */
+        q63_t sum0;                                    /* Accumulators */
+        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
+        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
+        uint32_t j;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc0, acc1, acc2, acc3;
+        q31_t x0, x1, x2, x3;
+        q31_t c0, c1, c2, c3;
+#endif
 
   /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + ((q31_t) phaseLen - 1);
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (phaseLen - 1U);
 
-  /* Initialise  blkCnt */
-  blkCnt = blockSize / 2;
-  blkCntN2 = blockSize - (2 * blkCnt);
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* Samples loop unrolled by 2 */
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
   while (blkCnt > 0U)
   {
     /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
 
     /* Address modifier index of coefficient buffer */
     j = 1U;
@@ -104,6 +107,8 @@
       /* Set accumulator to zero */
       acc0 = 0;
       acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
 
       /* Initialize state pointer */
       ptr1 = pState;
@@ -112,55 +117,62 @@
       ptr2 = pCoeffs + (S->L - j);
 
       /* Loop over the polyPhase length. Unroll by a factor of 4.
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
+         Repeat until we've computed numTaps-(4*S->L) coefficients. */
       tapCnt = phaseLen >> 2U;
 
       x0 = *(ptr1++);
+      x1 = *(ptr1++);
+      x2 = *(ptr1++);
 
       while (tapCnt > 0U)
       {
-
         /* Read the input sample */
-        x1 = *(ptr1++);
+        x3 = *(ptr1++);
 
         /* Read the coefficient */
         c0 = *(ptr2);
 
         /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
-
+        acc0 += (q63_t) x0 * c0;
+        acc1 += (q63_t) x1 * c0;
+        acc2 += (q63_t) x2 * c0;
+        acc3 += (q63_t) x3 * c0;
 
         /* Read the coefficient */
-        c0 = *(ptr2 + S->L);
+        c1 = *(ptr2 + S->L);
 
         /* Read the input sample */
         x0 = *(ptr1++);
 
         /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x1 *c0;
-        acc1 += (q63_t) x0 *c0;
-
+        acc0 += (q63_t) x1 * c1;
+        acc1 += (q63_t) x2 * c1;
+        acc2 += (q63_t) x3 * c1;
+        acc3 += (q63_t) x0 * c1;
 
         /* Read the coefficient */
-        c0 = *(ptr2 + S->L * 2);
+        c2 = *(ptr2 + S->L * 2);
 
         /* Read the input sample */
         x1 = *(ptr1++);
 
         /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
+        acc0 += (q63_t) x2 * c2;
+        acc1 += (q63_t) x3 * c2;
+        acc2 += (q63_t) x0 * c2;
+        acc3 += (q63_t) x1 * c2;
 
         /* Read the coefficient */
-        c0 = *(ptr2 + S->L * 3);
+        c3 = *(ptr2 + S->L * 3);
 
         /* Read the input sample */
-        x0 = *(ptr1++);
+        x2 = *(ptr1++);
 
         /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x1 *c0;
-        acc1 += (q63_t) x0 *c0;
+        acc0 += (q63_t) x3 * c3;
+        acc1 += (q63_t) x0 * c3;
+        acc2 += (q63_t) x1 * c3;
+        acc3 += (q63_t) x2 * c3;
 
 
         /* Upsampling is done by stuffing L-1 zeros between each sample.
@@ -168,7 +180,7 @@
          * Increment the coefficient pointer by interpolation factor times. */
         ptr2 += 4 * S->L;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         tapCnt--;
       }
 
@@ -177,60 +189,69 @@
 
       while (tapCnt > 0U)
       {
-
         /* Read the input sample */
-        x1 = *(ptr1++);
+        x3 = *(ptr1++);
 
         /* Read the coefficient */
         c0 = *(ptr2);
 
         /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
+        acc0 += (q63_t) x0 * c0;
+        acc1 += (q63_t) x1 * c0;
+        acc2 += (q63_t) x2 * c0;
+        acc3 += (q63_t) x3 * c0;
 
         /* Increment the coefficient pointer by interpolation factor times. */
         ptr2 += S->L;
 
         /* update states for next sample processing */
         x0 = x1;
+        x1 = x2;
+        x2 = x3;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         tapCnt--;
       }
 
       /* The result is in the accumulator, store in the destination buffer. */
-      *pDst = (q31_t) (acc0 >> 31);
-      *(pDst + S->L) = (q31_t) (acc1 >> 31);
-
+      *(pDst           ) = (q31_t) (acc0 >> 31);
+      *(pDst +     S->L) = (q31_t) (acc1 >> 31);
+      *(pDst + 2 * S->L) = (q31_t) (acc2 >> 31);
+      *(pDst + 3 * S->L) = (q31_t) (acc3 >> 31);
 
       pDst++;
 
       /* Increment the address modifier index of coefficient buffer */
       j++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       i--;
     }
 
     /* Advance the state pointer by 1
      * to process the next group of interpolation factor number samples */
-    pState = pState + 2;
+    pState = pState + 4;
 
-    pDst += S->L;
+    pDst += S->L * 3;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 2, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blkCntN2;
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
 
-  /* Loop over the blockSize. */
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
 
     /* Address modifier index of coefficient buffer */
     j = 1U;
@@ -248,84 +269,58 @@
       /* Initialize coefficient pointer */
       ptr2 = pCoeffs + (S->L - j);
 
-      /* Loop over the polyPhase length. Unroll by a factor of 4.
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2;
+      /* Loop over the polyPhase length.
+         Repeat until we've computed numTaps-(4*S->L) coefficients. */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+     /* Loop unrolling: Compute 4 outputs at a time */
+      tapCnt = phaseLen >> 2U;
+
       while (tapCnt > 0U)
       {
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
+        /* Perform the multiply-accumulate */
+        sum0 += (q63_t) *ptr1++ * *ptr2;
 
         /* Upsampling is done by stuffing L-1 zeros between each sample.
          * So instead of multiplying zeros with coefficients,
          * Increment the coefficient pointer by interpolation factor times. */
         ptr2 += S->L;
 
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
+        sum0 += (q63_t) *ptr1++ * *ptr2;
         ptr2 += S->L;
 
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
+        sum0 += (q63_t) *ptr1++ * *ptr2;
         ptr2 += S->L;
 
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
+        sum0 += (q63_t) *ptr1++ * *ptr2;
         ptr2 += S->L;
 
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         tapCnt--;
       }
 
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen & 0x3U;
+      /* Loop unrolling: Compute remaining outputs */
+      tapCnt = phaseLen % 0x4U;
+
+#else
+
+      /* Initialize tapCnt with number of samples */
+      tapCnt = phaseLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
       while (tapCnt > 0U)
       {
-        /* Read the coefficient */
-        c0 = *(ptr2);
+        /* Perform the multiply-accumulate */
+        sum0 += (q63_t) *ptr1++ * *ptr2;
 
-        /* Increment the coefficient pointer by interpolation factor times. */
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
         ptr2 += S->L;
 
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         tapCnt--;
       }
 
@@ -348,64 +343,63 @@
   }
 
   /* Processing is complete.
-   ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
-   ** This prepares the state buffer for the next function call. */
+     Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
 
   /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
+  pStateCur = S->pState;
 
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   tapCnt = (phaseLen - 1U) >> 2U;
 
   /* copy data */
   while (tapCnt > 0U)
   {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     tapCnt--;
   }
 
+  /* Loop unrolling: Compute remaining outputs */
   tapCnt = (phaseLen - 1U) % 0x04U;
 
-  /* copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-
-
 #else
 
-void arm_fir_interpolate_q31(
-  const arm_fir_interpolate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t *ptr1, *ptr2;                            /* Temporary pointers for state and coefficient buffers */
+    /* Initialize tapCnt with number of samples */
+    tapCnt = (phaseLen - 1U);
 
-  /* Run the below code for Cortex-M0 */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
-  q63_t sum;                                     /* Accumulator */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  uint32_t i, blkCnt;                            /* Loop counters */
-  uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
 
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCur;                              /* Points to the current sample of the state */
+        q31_t *ptr1;                                   /* Temporary pointer for state buffer */
+  const q31_t *ptr2;                                   /* Temporary pointer for coefficient buffer */
+        q63_t sum0;                                    /* Accumulators */
+        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
+        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
 
   /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + ((q31_t) phaseLen - 1);
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (phaseLen - 1U);
 
   /* Total number of intput samples */
   blkCnt = blockSize;
@@ -414,7 +408,7 @@
   while (blkCnt > 0U)
   {
     /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
 
     /* Loop over the Interpolation factor. */
     i = S->L;
@@ -422,7 +416,7 @@
     while (i > 0U)
     {
       /* Set accumulator to zero */
-      sum = 0;
+      sum0 = 0;
 
       /* Initialize state pointer */
       ptr1 = pState;
@@ -430,30 +424,25 @@
       /* Initialize coefficient pointer */
       ptr2 = pCoeffs + (i - 1U);
 
+      /* Loop over the polyPhase length */
       tapCnt = phaseLen;
 
       while (tapCnt > 0U)
       {
-        /* Read the coefficient */
-        c0 = *(ptr2);
+        /* Perform the multiply-accumulate */
+        sum0 += ((q63_t) *ptr1++ * *ptr2);
 
         /* Increment the coefficient pointer by interpolation factor times. */
         ptr2 += S->L;
 
-        /* Read the input sample */
-        x0 = *ptr1++;
-
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) x0 *c0;
-
         /* Decrement the loop counter */
         tapCnt--;
       }
 
       /* The result is in the accumulator, store in the destination buffer. */
-      *pDst++ = (q31_t) (sum >> 31);
+      *pDst++ = (q31_t) (sum0 >> 31);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       i--;
     }
 
@@ -461,32 +450,32 @@
      * to process the next group of interpolation factor number samples */
     pState = pState + 1;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
   /* Processing is complete.
-   ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
+   ** Now copy the last phaseLen - 1 samples to the start of the state buffer.
    ** This prepares the state buffer for the next function call. */
 
   /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
+  pStateCur = S->pState;
 
   tapCnt = phaseLen - 1U;
 
-  /* copy data */
+  /* Copy data */
   while (tapCnt > 0U)
   {
-    *pStateCurnt++ = *pState++;
+    *pStateCur++ = *pState++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     tapCnt--;
   }
 
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
 }
 
-#endif /*   #if defined (ARM_MATH_DSP) */
-
- /**
-  * @} end of FIR_Interpolate group
-  */
+/**
+  @} end of FIR_Interpolate group
+ */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c b/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c
index 369c9e4..a3d95c1 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c
@@ -1,15 +1,15 @@
 /* ----------------------------------------------------------------------
  * Project:      CMSIS DSP Library
  * Title:        arm_fir_lattice_f32.c
- * Description:  Processing function for the floating-point FIR Lattice filter
+ * Description:  Processing function for floating-point FIR Lattice filter
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,282 +29,305 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @defgroup FIR_Lattice Finite Impulse Response (FIR) Lattice Filters
- *
- * This set of functions implements Finite Impulse Response (FIR) lattice filters
- * for Q15, Q31 and floating-point data types.  Lattice filters are used in a
- * variety of adaptive filter applications.  The filter structure is feedforward and
- * the net impulse response is finite length.
- * The functions operate on blocks
- * of input and output data and each call to the function processes
- * <code>blockSize</code> samples through the filter.  <code>pSrc</code> and
- * <code>pDst</code> point to input and output arrays containing <code>blockSize</code> values.
- *
- * \par Algorithm:
- * \image html FIRLattice.gif "Finite Impulse Response Lattice filter"
- * The following difference equation is implemented:
- * <pre>
- *    f0[n] = g0[n] = x[n]
- *    fm[n] = fm-1[n] + km * gm-1[n-1] for m = 1, 2, ...M
- *    gm[n] = km * fm-1[n] + gm-1[n-1] for m = 1, 2, ...M
- *    y[n] = fM[n]
- * </pre>
- * \par
- * <code>pCoeffs</code> points to tha array of reflection coefficients of size <code>numStages</code>.
- * Reflection Coefficients are stored in the following order.
- * \par
- * <pre>
- *    {k1, k2, ..., kM}
- * </pre>
- * where M is number of stages
- * \par
- * <code>pState</code> points to a state array of size <code>numStages</code>.
- * The state variables (g values) hold previous inputs and are stored in the following order.
- * <pre>
- *    {g0[n], g1[n], g2[n] ...gM-1[n]}
- * </pre>
- * The state variables are updated after each block of data is processed; the coefficients are untouched.
- * \par Instance Structure
- * The coefficients and state variables for a filter are stored together in an instance data structure.
- * A separate instance structure must be defined for each filter.
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
- * There are separate instance structure declarations for each of the 3 supported data types.
- *
- * \par Initialization Functions
- * There is also an associated initialization function for each data type.
- * The initialization function performs the following operations:
- * - Sets the values of the internal structure fields.
- * - Zeros out the values in the state buffer.
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numStages, pCoeffs, pState. Also set all of the values in pState to zero.
- *
- * \par
- * Use of the initialization function is optional.
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
- * To place an instance structure into a const data section, the instance structure must be manually initialized.
- * Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:
- * <pre>
- *arm_fir_lattice_instance_f32 S = {numStages, pState, pCoeffs};
- *arm_fir_lattice_instance_q31 S = {numStages, pState, pCoeffs};
- *arm_fir_lattice_instance_q15 S = {numStages, pState, pCoeffs};
- * </pre>
- * \par
- * where <code>numStages</code> is the number of stages in the filter; <code>pState</code> is the address of the state buffer;
- * <code>pCoeffs</code> is the address of the coefficient buffer.
- * \par Fixed-Point Behavior
- * Care must be taken when using the fixed-point versions of the FIR Lattice filter functions.
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
- * Refer to the function specific documentation below for usage guidelines.
+  @defgroup FIR_Lattice Finite Impulse Response (FIR) Lattice Filters
+
+  This set of functions implements Finite Impulse Response (FIR) lattice filters
+  for Q15, Q31 and floating-point data types.  Lattice filters are used in a
+  variety of adaptive filter applications. The filter structure is feedforward and
+  the net impulse response is finite length.
+  The functions operate on blocks
+  of input and output data and each call to the function processes
+  <code>blockSize</code> samples through the filter.  <code>pSrc</code> and
+  <code>pDst</code> point to input and output arrays containing <code>blockSize</code> values.
+
+  @par           Algorithm
+                   \image html FIRLattice.gif "Finite Impulse Response Lattice filter"
+                   The following difference equation is implemented:
+  @par
+  <pre>
+      f0[n] = g0[n] = x[n]
+      fm[n] = fm-1[n] + km * gm-1[n-1] for m = 1, 2, ...M
+      gm[n] = km * fm-1[n] + gm-1[n-1] for m = 1, 2, ...M
+      y[n] = fM[n]
+  </pre>
+  @par
+                   <code>pCoeffs</code> points to tha array of reflection coefficients of size <code>numStages</code>.
+                   Reflection Coefficients are stored in the following order.
+  @par
+  <pre>
+      {k1, k2, ..., kM}
+  </pre>
+                   where M is number of stages
+  @par
+                   <code>pState</code> points to a state array of size <code>numStages</code>.
+                   The state variables (g values) hold previous inputs and are stored in the following order.
+  <pre>
+    {g0[n], g1[n], g2[n] ...gM-1[n]}
+  </pre>
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+
+  @par           Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numStages, pCoeffs, pState. Also set all of the values in pState to zero.
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:
+  <pre>
+      arm_fir_lattice_instance_f32 S = {numStages, pState, pCoeffs};
+      arm_fir_lattice_instance_q31 S = {numStages, pState, pCoeffs};
+      arm_fir_lattice_instance_q15 S = {numStages, pState, pCoeffs};
+  </pre>
+  @par
+                   where <code>numStages</code> is the number of stages in the filter;
+                   <code>pState</code> is the address of the state buffer;
+                   <code>pCoeffs</code> is the address of the coefficient buffer.
+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the fixed-point versions of the FIR Lattice filter functions.
+                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+                   Refer to the function specific documentation below for usage guidelines.
  */
 
 /**
- * @addtogroup FIR_Lattice
- * @{
+  @addtogroup FIR_Lattice
+  @{
  */
 
-
-  /**
-   * @brief Processing function for the floating-point FIR lattice filter.
-   * @param[in]  *S        points to an instance of the floating-point FIR lattice structure.
-   * @param[in]  *pSrc     points to the block of input data.
-   * @param[out] *pDst     points to the block of output data
-   * @param[in]  blockSize number of samples to process.
-   * @return none.
-   */
+/**
+  @brief         Processing function for the floating-point FIR lattice filter.
+  @param[in]     S          points to an instance of the floating-point FIR lattice structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
 
 void arm_fir_lattice_f32(
   const arm_fir_lattice_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
 {
-  float32_t *pState;                             /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *px;                                 /* temporary state pointer */
-  float32_t *pk;                                 /* temporary coefficient pointer */
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *px;                                 /* Temporary state pointer */
+  const float32_t *pk;                                 /* Temporary coefficient pointer */
+        uint32_t numStages = S->numStages;             /* Number of stages in the filter */
+        uint32_t blkCnt, stageCnt;                     /* Loop counters */
+        float32_t fcurr0, fnext0, gnext0, gcurr0;      /* Temporary variables */
 
+#if defined (ARM_MATH_LOOPUNROLL)
+        float32_t fcurr1, fnext1, gnext1;              /* Temporary variables for second sample in loop unrolling */
+        float32_t fcurr2, fnext2, gnext2;              /* Temporary variables for third sample in loop unrolling */
+        float32_t fcurr3, fnext3, gnext3;              /* Temporary variables for fourth sample in loop unrolling */
+#endif
 
-#if defined (ARM_MATH_DSP)
+  gcurr0 = 0.0f;
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  float32_t fcurr1, fnext1, gcurr1, gnext1;      /* temporary variables for first sample in loop unrolling */
-  float32_t fcurr2, fnext2, gnext2;              /* temporary variables for second sample in loop unrolling */
-  float32_t fcurr3, fnext3, gnext3;              /* temporary variables for third sample in loop unrolling */
-  float32_t fcurr4, fnext4, gnext4;              /* temporary variables for fourth sample in loop unrolling */
-  uint32_t numStages = S->numStages;             /* Number of stages in the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
 
-  gcurr1 = 0.0f;
-  pState = &S->pState[0];
-
-  blkCnt = blockSize >> 2;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-     a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-
     /* Read two samples from input buffer */
     /* f0(n) = x(n) */
+    fcurr0 = *pSrc++;
     fcurr1 = *pSrc++;
-    fcurr2 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
 
     /* Initialize state pointer */
     px = pState;
 
-    /* Read g0(n-1) from state */
-    gcurr1 = *px;
+    /* Initialize coeff pointer */
+    pk = pCoeffs;
+
+    /* Read g0(n-1) from state buffer */
+    gcurr0 = *px;
 
     /* Process first sample for first tap */
     /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = fcurr1 + ((*pk) * gcurr1);
+    fnext0 = (gcurr0 * (*pk)) + fcurr0;
+
     /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (fcurr1 * (*pk)) + gcurr1;
+    gnext0 = (fcurr0 * (*pk)) + gcurr0;
 
     /* Process second sample for first tap */
-    /* for sample 2 processing */
-    fnext2 = fcurr2 + ((*pk) * fcurr1);
-    gnext2 = (fcurr2 * (*pk)) + fcurr1;
+    fnext1 = (fcurr0 * (*pk)) + fcurr1;
+    gnext1 = (fcurr1 * (*pk)) + fcurr0;
 
     /* Read next two samples from input buffer */
     /* f0(n+2) = x(n+2) */
+    fcurr2 = *pSrc++;
     fcurr3 = *pSrc++;
-    fcurr4 = *pSrc++;
-
-    /* Copy only last input samples into the state buffer
-       which will be used for next four samples processing */
-    *px++ = fcurr4;
 
     /* Process third sample for first tap */
-    fnext3 = fcurr3 + ((*pk) * fcurr2);
-    gnext3 = (fcurr3 * (*pk)) + fcurr2;
+    fnext2 = (fcurr1 * (*pk)) + fcurr2;
+    gnext2 = (fcurr2 * (*pk)) + fcurr1;
 
     /* Process fourth sample for first tap */
-    fnext4 = fcurr4 + ((*pk) * fcurr3);
-    gnext4 = (fcurr4 * (*pk++)) + fcurr3;
+    fnext3 = (fcurr2 * (*pk  )) + fcurr3;
+    gnext3 = (fcurr3 * (*pk++)) + fcurr2;
+
+    /* Copy only last input sample into the state buffer
+       which will be used for next samples processing */
+    *px++ = fcurr3;
 
     /* Update of f values for next coefficient set processing */
+    fcurr0 = fnext0;
     fcurr1 = fnext1;
     fcurr2 = fnext2;
     fcurr3 = fnext3;
-    fcurr4 = fnext4;
 
     /* Loop unrolling.  Process 4 taps at a time . */
     stageCnt = (numStages - 1U) >> 2U;
 
     /* Loop over the number of taps.  Unroll by a factor of 4.
-     ** Repeat until we've computed numStages-3 coefficients. */
+       Repeat until we've computed numStages-3 coefficients. */
 
     /* Process 2nd, 3rd, 4th and 5th taps ... here */
     while (stageCnt > 0U)
     {
       /* Read g1(n-1), g3(n-1) .... from state */
-      gcurr1 = *px;
+      gcurr0 = *px;
 
       /* save g1(n) in state buffer */
-      *px++ = gnext4;
+      *px++ = gnext3;
 
       /* Process first sample for 2nd, 6th .. tap */
       /* Sample processing for K2, K6.... */
       /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext1 = fcurr1 + ((*pk) * gcurr1);
+      fnext0 = (gcurr0 * (*pk)) + fcurr0;
+
       /* Process second sample for 2nd, 6th .. tap */
       /* for sample 2 processing */
-      fnext2 = fcurr2 + ((*pk) * gnext1);
+      fnext1 = (gnext0 * (*pk)) + fcurr1;
+
       /* Process third sample for 2nd, 6th .. tap */
-      fnext3 = fcurr3 + ((*pk) * gnext2);
+      fnext2 = (gnext1 * (*pk)) + fcurr2;
+
       /* Process fourth sample for 2nd, 6th .. tap */
-      fnext4 = fcurr4 + ((*pk) * gnext3);
+      fnext3 = (gnext2 * (*pk)) + fcurr3;
 
       /* g2(n) = f1(n) * K2  +  g1(n-1) */
       /* Calculation of state values for next stage */
-      gnext4 = (fcurr4 * (*pk)) + gnext3;
       gnext3 = (fcurr3 * (*pk)) + gnext2;
+
       gnext2 = (fcurr2 * (*pk)) + gnext1;
-      gnext1 = (fcurr1 * (*pk++)) + gcurr1;
+
+      gnext1 = (fcurr1 * (*pk)) + gnext0;
+
+      gnext0 = (fcurr0 * (*pk++)) + gcurr0;
 
 
       /* Read g2(n-1), g4(n-1) .... from state */
-      gcurr1 = *px;
+      gcurr0 = *px;
 
       /* save g2(n) in state buffer */
-      *px++ = gnext4;
+      *px++ = gnext3;
 
       /* Sample processing for K3, K7.... */
       /* Process first sample for 3rd, 7th .. tap */
       /* f3(n) = f2(n) +  K3 * g2(n-1) */
-      fcurr1 = fnext1 + ((*pk) * gcurr1);
+      fcurr0 = (gcurr0 * (*pk)) + fnext0;
+
       /* Process second sample for 3rd, 7th .. tap */
-      fcurr2 = fnext2 + ((*pk) * gnext1);
+      fcurr1 = (gnext0 * (*pk)) + fnext1;
+
       /* Process third sample for 3rd, 7th .. tap */
-      fcurr3 = fnext3 + ((*pk) * gnext2);
+      fcurr2 = (gnext1 * (*pk)) + fnext2;
+
       /* Process fourth sample for 3rd, 7th .. tap */
-      fcurr4 = fnext4 + ((*pk) * gnext3);
+      fcurr3 = (gnext2 * (*pk)) + fnext3;
 
       /* Calculation of state values for next stage */
       /* g3(n) = f2(n) * K3  +  g2(n-1) */
-      gnext4 = (fnext4 * (*pk)) + gnext3;
       gnext3 = (fnext3 * (*pk)) + gnext2;
+
       gnext2 = (fnext2 * (*pk)) + gnext1;
-      gnext1 = (fnext1 * (*pk++)) + gcurr1;
+
+      gnext1 = (fnext1 * (*pk)) + gnext0;
+
+      gnext0 = (fnext0 * (*pk++)) + gcurr0;
 
 
       /* Read g1(n-1), g3(n-1) .... from state */
-      gcurr1 = *px;
+      gcurr0 = *px;
 
       /* save g3(n) in state buffer */
-      *px++ = gnext4;
+      *px++ = gnext3;
 
       /* Sample processing for K4, K8.... */
       /* Process first sample for 4th, 8th .. tap */
       /* f4(n) = f3(n) +  K4 * g3(n-1) */
-      fnext1 = fcurr1 + ((*pk) * gcurr1);
+      fnext0 = (gcurr0 * (*pk)) + fcurr0;
+
       /* Process second sample for 4th, 8th .. tap */
       /* for sample 2 processing */
-      fnext2 = fcurr2 + ((*pk) * gnext1);
+      fnext1 = (gnext0 * (*pk)) + fcurr1;
+
       /* Process third sample for 4th, 8th .. tap */
-      fnext3 = fcurr3 + ((*pk) * gnext2);
+      fnext2 = (gnext1 * (*pk)) + fcurr2;
+
       /* Process fourth sample for 4th, 8th .. tap */
-      fnext4 = fcurr4 + ((*pk) * gnext3);
+      fnext3 = (gnext2 * (*pk)) + fcurr3;
 
       /* g4(n) = f3(n) * K4  +  g3(n-1) */
       /* Calculation of state values for next stage */
-      gnext4 = (fcurr4 * (*pk)) + gnext3;
       gnext3 = (fcurr3 * (*pk)) + gnext2;
+
       gnext2 = (fcurr2 * (*pk)) + gnext1;
-      gnext1 = (fcurr1 * (*pk++)) + gcurr1;
+
+      gnext1 = (fcurr1 * (*pk)) + gnext0;
+
+      gnext0 = (fcurr0 * (*pk++)) + gcurr0;
+
 
       /* Read g2(n-1), g4(n-1) .... from state */
-      gcurr1 = *px;
+      gcurr0 = *px;
 
       /* save g4(n) in state buffer */
-      *px++ = gnext4;
+      *px++ = gnext3;
 
       /* Sample processing for K5, K9.... */
       /* Process first sample for 5th, 9th .. tap */
       /* f5(n) = f4(n) +  K5 * g4(n-1) */
-      fcurr1 = fnext1 + ((*pk) * gcurr1);
+      fcurr0 = (gcurr0 * (*pk)) + fnext0;
+
       /* Process second sample for 5th, 9th .. tap */
-      fcurr2 = fnext2 + ((*pk) * gnext1);
+      fcurr1 = (gnext0 * (*pk)) + fnext1;
+
       /* Process third sample for 5th, 9th .. tap */
-      fcurr3 = fnext3 + ((*pk) * gnext2);
+      fcurr2 = (gnext1 * (*pk)) + fnext2;
+
       /* Process fourth sample for 5th, 9th .. tap */
-      fcurr4 = fnext4 + ((*pk) * gnext3);
+      fcurr3 = (gnext2 * (*pk)) + fnext3;
 
       /* Calculation of state values for next stage */
       /* g5(n) = f4(n) * K5  +  g4(n-1) */
-      gnext4 = (fnext4 * (*pk)) + gnext3;
       gnext3 = (fnext3 * (*pk)) + gnext2;
+
       gnext2 = (fnext2 * (*pk)) + gnext1;
-      gnext1 = (fnext1 * (*pk++)) + gcurr1;
+
+      gnext1 = (fnext1 * (*pk)) + gnext0;
+
+      gnext0 = (fnext0 * (*pk++)) + gcurr0;
 
       stageCnt--;
     }
@@ -314,144 +337,84 @@
 
     while (stageCnt > 0U)
     {
-      gcurr1 = *px;
+      gcurr0 = *px;
 
       /* save g value in state buffer */
-      *px++ = gnext4;
+      *px++ = gnext3;
 
       /* Process four samples for last three taps here */
-      fnext1 = fcurr1 + ((*pk) * gcurr1);
-      fnext2 = fcurr2 + ((*pk) * gnext1);
-      fnext3 = fcurr3 + ((*pk) * gnext2);
-      fnext4 = fcurr4 + ((*pk) * gnext3);
+      fnext0 = (gcurr0 * (*pk)) + fcurr0;
+
+      fnext1 = (gnext0 * (*pk)) + fcurr1;
+
+      fnext2 = (gnext1 * (*pk)) + fcurr2;
+
+      fnext3 = (gnext2 * (*pk)) + fcurr3;
 
       /* g1(n) = f0(n) * K1  +  g0(n-1) */
-      gnext4 = (fcurr4 * (*pk)) + gnext3;
       gnext3 = (fcurr3 * (*pk)) + gnext2;
+
       gnext2 = (fcurr2 * (*pk)) + gnext1;
-      gnext1 = (fcurr1 * (*pk++)) + gcurr1;
+
+      gnext1 = (fcurr1 * (*pk)) + gnext0;
+
+      gnext0 = (fcurr0 * (*pk++)) + gcurr0;
 
       /* Update of f values for next coefficient set processing */
+      fcurr0 = fnext0;
       fcurr1 = fnext1;
       fcurr2 = fnext2;
       fcurr3 = fnext3;
-      fcurr4 = fnext4;
 
       stageCnt--;
-
     }
 
     /* The results in the 4 accumulators, store in the destination buffer. */
     /* y(n) = fN(n) */
+    *pDst++ = fcurr0;
     *pDst++ = fcurr1;
     *pDst++ = fcurr2;
     *pDst++ = fcurr3;
-    *pDst++ = fcurr4;
 
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    /* f0(n) = x(n) */
-    fcurr1 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g2(n) from state buffer */
-    gcurr1 = *px;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = fcurr1 + ((*pk) * gcurr1);
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (fcurr1 * (*pk++)) + gcurr1;
-
-    /* save g1(n) in state buffer */
-    *px++ = fcurr1;
-
-    /* f1(n) is saved in fcurr1
-       for next stage processing */
-    fcurr1 = fnext1;
-
-    stageCnt = (numStages - 1U);
-
-    /* stage loop */
-    while (stageCnt > 0U)
-    {
-      /* read g2(n) from state buffer */
-      gcurr1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext1;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext1 = fcurr1 + ((*pk) * gcurr1);
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext1 = (fcurr1 * (*pk++)) + gcurr1;
-
-      /* f1(n) is saved in fcurr1
-         for next stage processing */
-      fcurr1 = fnext1;
-
-      stageCnt--;
-
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr1;
-
-    blkCnt--;
-
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  float32_t fcurr, fnext, gcurr, gnext;          /* temporary variables */
-  uint32_t numStages = S->numStages;             /* Length of the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
-
-  pState = &S->pState[0];
-
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     /* f0(n) = x(n) */
-    fcurr = *pSrc++;
+    fcurr0 = *pSrc++;
+
+    /* Initialize state pointer */
+    px = pState;
 
     /* Initialize coeff pointer */
     pk = pCoeffs;
 
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g0(n-1) from state buffer */
-    gcurr = *px;
+    /* read g2(n) from state buffer */
+    gcurr0 = *px;
 
     /* for sample 1 processing */
     /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext = fcurr + ((*pk) * gcurr);
+    fnext0 = (gcurr0 * (*pk)) + fcurr0;
+
     /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext = (fcurr * (*pk++)) + gcurr;
+    gnext0 = (fcurr0 * (*pk++)) + gcurr0;
 
-    /* save f0(n) in state buffer */
-    *px++ = fcurr;
+    /* save g1(n) in state buffer */
+    *px++ = fcurr0;
 
-    /* f1(n) is saved in fcurr
-       for next stage processing */
-    fcurr = fnext;
+    /* f1(n) is saved in fcurr0 for next stage processing */
+    fcurr0 = fnext0;
 
     stageCnt = (numStages - 1U);
 
@@ -459,36 +422,32 @@
     while (stageCnt > 0U)
     {
       /* read g2(n) from state buffer */
-      gcurr = *px;
+      gcurr0 = *px;
 
       /* save g1(n) in state buffer */
-      *px++ = gnext;
+      *px++ = gnext0;
 
       /* Sample processing for K2, K3.... */
       /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext = fcurr + ((*pk) * gcurr);
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext = (fcurr * (*pk++)) + gcurr;
+      fnext0 = (gcurr0 * (*pk)) + fcurr0;
 
-      /* f1(n) is saved in fcurr1
-         for next stage processing */
-      fcurr = fnext;
+      /* g2(n) = f1(n) * K2  +  g1(n-1) */
+      gnext0 = (fcurr0 * (*pk++)) + gcurr0;
+
+      /* f1(n) is saved in fcurr0 for next stage processing */
+      fcurr0 = fnext0;
 
       stageCnt--;
-
     }
 
     /* y(n) = fN(n) */
-    *pDst++ = fcurr;
+    *pDst++ = fcurr0;
 
     blkCnt--;
-
   }
 
-#endif /*   #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of FIR_Lattice group
+  @} end of FIR_Lattice group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c b/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c
index 2e31a15..7929629 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_lattice_init_f32.c
  * Description:  Floating-point FIR Lattice filter initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,28 +29,28 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR_Lattice
- * @{
+  @addtogroup FIR_Lattice
+  @{
  */
 
 /**
- * @brief Initialization function for the floating-point FIR lattice filter.
- * @param[in] *S points to an instance of the floating-point FIR lattice structure.
- * @param[in] numStages  number of filter stages.
- * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages.
- * @param[in] *pState points to the state buffer.  The array is of length numStages.
- * @return none.
+  @brief         Initialization function for the floating-point FIR lattice filter.
+  @param[in]     S          points to an instance of the floating-point FIR lattice structure
+  @param[in]     numStages  number of filter stages
+  @param[in]     pCoeffs    points to the coefficient buffer.  The array is of length numStages
+  @param[in]     pState     points to the state buffer.  The array is of length numStages
+  @return        none
  */
 
 void arm_fir_lattice_init_f32(
-  arm_fir_lattice_instance_f32 * S,
-  uint16_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState)
+        arm_fir_lattice_instance_f32 * S,
+        uint16_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState)
 {
   /* Assign filter taps */
   S->numStages = numStages;
@@ -63,9 +63,8 @@
 
   /* Assign state pointer */
   S->pState = pState;
-
 }
 
 /**
- * @} end of FIR_Lattice group
+  @} end of FIR_Lattice group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c b/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c
index ab5afd6..5c80dff 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_lattice_init_q15.c
  * Description:  Q15 FIR Lattice filter initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,28 +29,28 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR_Lattice
- * @{
+  @addtogroup FIR_Lattice
+  @{
  */
 
-  /**
-   * @brief Initialization function for the Q15 FIR lattice filter.
-   * @param[in] *S points to an instance of the Q15 FIR lattice structure.
-   * @param[in] numStages  number of filter stages.
-   * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages.
-   * @param[in] *pState points to the state buffer.  The array is of length numStages.
-   * @return none.
-   */
+/**
+  @brief         Initialization function for the Q15 FIR lattice filter.
+  @param[in]     S          points to an instance of the Q15 FIR lattice structure
+  @param[in]     numStages  number of filter stages
+  @param[in]     pCoeffs    points to the coefficient buffer.  The array is of length numStages
+  @param[in]     pState     points to the state buffer.  The array is of length numStages
+  @return        none
+ */
 
 void arm_fir_lattice_init_q15(
-  arm_fir_lattice_instance_q15 * S,
-  uint16_t numStages,
-  q15_t * pCoeffs,
-  q15_t * pState)
+        arm_fir_lattice_instance_q15 * S,
+        uint16_t numStages,
+  const q15_t * pCoeffs,
+        q15_t * pState)
 {
   /* Assign filter taps */
   S->numStages = numStages;
@@ -63,9 +63,8 @@
 
   /* Assign state pointer */
   S->pState = pState;
-
 }
 
 /**
- * @} end of FIR_Lattice group
+  @} end of FIR_Lattice group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c b/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c
index 4dc30cc..476296d 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_lattice_init_q31.c
  * Description:  Q31 FIR lattice filter initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,28 +29,28 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR_Lattice
- * @{
+  @addtogroup FIR_Lattice
+  @{
  */
 
-  /**
-   * @brief Initialization function for the Q31 FIR lattice filter.
-   * @param[in] *S points to an instance of the Q31 FIR lattice structure.
-   * @param[in] numStages  number of filter stages.
-   * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages.
-   * @param[in] *pState points to the state buffer.   The array is of length numStages.
-   * @return none.
-   */
+/**
+  @brief         Initialization function for the Q31 FIR lattice filter.
+  @param[in]     S          points to an instance of the Q31 FIR lattice structure
+  @param[in]     numStages  number of filter stages
+  @param[in]     pCoeffs    points to the coefficient buffer.  The array is of length numStages
+  @param[in]     pState     points to the state buffer.  The array is of length numStages
+  @return        none
+ */
 
 void arm_fir_lattice_init_q31(
-  arm_fir_lattice_instance_q31 * S,
-  uint16_t numStages,
-  q31_t * pCoeffs,
-  q31_t * pState)
+        arm_fir_lattice_instance_q31 * S,
+        uint16_t numStages,
+  const q31_t * pCoeffs,
+        q31_t * pState)
 {
   /* Assign filter taps */
   S->numStages = numStages;
@@ -63,9 +63,8 @@
 
   /* Assign state pointer */
   S->pState = pState;
-
 }
 
 /**
- * @} end of FIR_Lattice group
+  @} end of FIR_Lattice group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c b/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c
index 4c4e849..42e7c0d 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_lattice_q15.c
  * Description:  Q15 FIR lattice filter processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,277 +29,275 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR_Lattice
- * @{
+  @addtogroup FIR_Lattice
+  @{
  */
 
-
 /**
- * @brief Processing function for the Q15 FIR lattice filter.
- * @param[in]  *S        points to an instance of the Q15 FIR lattice structure.
- * @param[in]  *pSrc     points to the block of input data.
- * @param[out] *pDst     points to the block of output data
- * @param[in]  blockSize number of samples to process.
- * @return none.
+  @brief         Processing function for Q15 FIR lattice filter.
+  @param[in]     S          points to an instance of the Q15 FIR lattice structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
  */
 
 void arm_fir_lattice_q15(
   const arm_fir_lattice_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
-  q15_t *pState;                                 /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *px;                                     /* temporary state pointer */
-  q15_t *pk;                                     /* temporary coefficient pointer */
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *px;                                     /* Temporary state pointer */
+  const q15_t *pk;                                     /* Temporary coefficient pointer */
+        uint32_t numStages = S->numStages;             /* Number of stages in the filter */
+        uint32_t blkCnt, stageCnt;                     /* Loop counters */
+        q31_t fcurr0, fnext0, gnext0, gcurr0;          /* Temporary variables */
 
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
+  q31_t fcurr1, fnext1, gnext1;                  /* Temporary variables for second sample in loop unrolling */
+  q31_t fcurr2, fnext2, gnext2;                  /* Temporary variables for third sample in loop unrolling */
+  q31_t fcurr3, fnext3, gnext3;                  /* Temporary variables for fourth sample in loop unrolling */
+#endif
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+  gcurr0 = 0;
 
-  q31_t fcurnt1, fnext1, gcurnt1 = 0, gnext1;    /* temporary variables for first sample in loop unrolling */
-  q31_t fcurnt2, fnext2, gnext2;                 /* temporary variables for second sample in loop unrolling */
-  q31_t fcurnt3, fnext3, gnext3;                 /* temporary variables for third sample in loop unrolling */
-  q31_t fcurnt4, fnext4, gnext4;                 /* temporary variables for fourth sample in loop unrolling */
-  uint32_t numStages = S->numStages;             /* Number of stages in the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  pState = &S->pState[0];
-
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-
     /* Read two samples from input buffer */
     /* f0(n) = x(n) */
-    fcurnt1 = *pSrc++;
-    fcurnt2 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
+    fcurr0 = *pSrc++;
+    fcurr1 = *pSrc++;
 
     /* Initialize state pointer */
     px = pState;
 
-    /* Read g0(n-1) from state */
-    gcurnt1 = *px;
+    /* Initialize coeff pointer */
+    pk = pCoeffs;
+
+    /* Read g0(n-1) from state buffer */
+    gcurr0 = *px;
 
     /* Process first sample for first tap */
     /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15U) + fcurnt1;
-    fnext1 = __SSAT(fnext1, 16);
+    fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+    fnext0 = __SSAT(fnext0, 16);
 
     /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (q31_t) ((fcurnt1 * (*pk)) >> 15U) + gcurnt1;
-    gnext1 = __SSAT(gnext1, 16);
+    gnext0 = (q31_t) ((fcurr0 * (*pk)) >> 15U) + gcurr0;
+    gnext0 = __SSAT(gnext0, 16);
 
     /* Process second sample for first tap */
-    /* for sample 2 processing */
-    fnext2 = (q31_t) ((fcurnt1 * (*pk)) >> 15U) + fcurnt2;
-    fnext2 = __SSAT(fnext2, 16);
-
-    gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15U) + fcurnt1;
-    gnext2 = __SSAT(gnext2, 16);
-
+    fnext1 = (q31_t) ((fcurr0 * (*pk)) >> 15U) + fcurr1;
+    fnext1 = __SSAT(fnext1, 16);
+    gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + fcurr0;
+    gnext1 = __SSAT(gnext1, 16);
 
     /* Read next two samples from input buffer */
     /* f0(n+2) = x(n+2) */
-    fcurnt3 = *pSrc++;
-    fcurnt4 = *pSrc++;
-
-    /* Copy only last input samples into the state buffer
-       which is used for next four samples processing */
-    *px++ = (q15_t) fcurnt4;
+    fcurr2 = *pSrc++;
+    fcurr3 = *pSrc++;
 
     /* Process third sample for first tap */
-    fnext3 = (q31_t) ((fcurnt2 * (*pk)) >> 15U) + fcurnt3;
-    fnext3 = __SSAT(fnext3, 16);
-    gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15U) + fcurnt2;
-    gnext3 = __SSAT(gnext3, 16);
+    fnext2 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + fcurr2;
+    fnext2 = __SSAT(fnext2, 16);
+    gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + fcurr1;
+    gnext2 = __SSAT(gnext2, 16);
 
     /* Process fourth sample for first tap */
-    fnext4 = (q31_t) ((fcurnt3 * (*pk)) >> 15U) + fcurnt4;
-    fnext4 = __SSAT(fnext4, 16);
-    gnext4 = (q31_t) ((fcurnt4 * (*pk++)) >> 15U) + fcurnt3;
-    gnext4 = __SSAT(gnext4, 16);
+    fnext3 = (q31_t) ((fcurr2 * (*pk  )) >> 15U) + fcurr3;
+    fnext3 = __SSAT(fnext3, 16);
+    gnext3 = (q31_t) ((fcurr3 * (*pk++)) >> 15U) + fcurr2;
+    gnext3 = __SSAT(gnext3, 16);
+
+    /* Copy only last input sample into the state buffer
+       which will be used for next samples processing */
+    *px++ = (q15_t) fcurr3;
 
     /* Update of f values for next coefficient set processing */
-    fcurnt1 = fnext1;
-    fcurnt2 = fnext2;
-    fcurnt3 = fnext3;
-    fcurnt4 = fnext4;
-
+    fcurr0 = fnext0;
+    fcurr1 = fnext1;
+    fcurr2 = fnext2;
+    fcurr3 = fnext3;
 
     /* Loop unrolling.  Process 4 taps at a time . */
-    stageCnt = (numStages - 1U) >> 2;
-
+    stageCnt = (numStages - 1U) >> 2U;
 
     /* Loop over the number of taps.  Unroll by a factor of 4.
-     ** Repeat until we've computed numStages-3 coefficients. */
+       Repeat until we've computed numStages-3 coefficients. */
 
     /* Process 2nd, 3rd, 4th and 5th taps ... here */
     while (stageCnt > 0U)
     {
       /* Read g1(n-1), g3(n-1) .... from state */
-      gcurnt1 = *px;
+      gcurr0 = *px;
 
       /* save g1(n) in state buffer */
-      *px++ = (q15_t) gnext4;
+      *px++ = (q15_t) gnext3;
 
       /* Process first sample for 2nd, 6th .. tap */
       /* Sample processing for K2, K6.... */
       /* f1(n) = f0(n) +  K1 * g0(n-1) */
-      fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15U) + fcurnt1;
-      fnext1 = __SSAT(fnext1, 16);
-
+      fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+      fnext0 = __SSAT(fnext0, 16);
 
       /* Process second sample for 2nd, 6th .. tap */
       /* for sample 2 processing */
-      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurnt2;
-      fnext2 = __SSAT(fnext2, 16);
+      fnext1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fcurr1;
+      fnext1 = __SSAT(fnext1, 16);
+
       /* Process third sample for 2nd, 6th .. tap */
-      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurnt3;
-      fnext3 = __SSAT(fnext3, 16);
+      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurr2;
+      fnext2 = __SSAT(fnext2, 16);
+
       /* Process fourth sample for 2nd, 6th .. tap */
-      /* fnext4 = fcurnt4 + (*pk) * gnext3; */
-      fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15U) + fcurnt4;
-      fnext4 = __SSAT(fnext4, 16);
+      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurr3;
+      fnext3 = __SSAT(fnext3, 16);
 
       /* g1(n) = f0(n) * K1  +  g0(n-1) */
       /* Calculation of state values for next stage */
-      gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15U) + gnext3;
-      gnext4 = __SSAT(gnext4, 16);
-      gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15U) + gnext2;
+      gnext3 = (q31_t) ((fcurr3 * (*pk)) >> 15U) + gnext2;
       gnext3 = __SSAT(gnext3, 16);
 
-      gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15U) + gnext1;
+      gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + gnext1;
       gnext2 = __SSAT(gnext2, 16);
 
-      gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15U) + gcurnt1;
+      gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + gnext0;
       gnext1 = __SSAT(gnext1, 16);
 
+      gnext0 = (q31_t) ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
+      gnext0 = __SSAT(gnext0, 16);
+
 
       /* Read g2(n-1), g4(n-1) .... from state */
-      gcurnt1 = *px;
+      gcurr0 = *px;
 
       /* save g1(n) in state buffer */
-      *px++ = (q15_t) gnext4;
+      *px++ = (q15_t) gnext3;
 
       /* Sample processing for K3, K7.... */
       /* Process first sample for 3rd, 7th .. tap */
       /* f3(n) = f2(n) +  K3 * g2(n-1) */
-      fcurnt1 = (q31_t) ((gcurnt1 * (*pk)) >> 15U) + fnext1;
-      fcurnt1 = __SSAT(fcurnt1, 16);
+      fcurr0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fnext0;
+      fcurr0 = __SSAT(fcurr0, 16);
 
       /* Process second sample for 3rd, 7th .. tap */
-      fcurnt2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fnext2;
-      fcurnt2 = __SSAT(fcurnt2, 16);
+      fcurr1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fnext1;
+      fcurr1 = __SSAT(fcurr1, 16);
 
       /* Process third sample for 3rd, 7th .. tap */
-      fcurnt3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fnext3;
-      fcurnt3 = __SSAT(fcurnt3, 16);
+      fcurr2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fnext2;
+      fcurr2 = __SSAT(fcurr2, 16);
 
       /* Process fourth sample for 3rd, 7th .. tap */
-      fcurnt4 = (q31_t) ((gnext3 * (*pk)) >> 15U) + fnext4;
-      fcurnt4 = __SSAT(fcurnt4, 16);
+      fcurr3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fnext3;
+      fcurr3 = __SSAT(fcurr3, 16);
 
       /* Calculation of state values for next stage */
       /* g3(n) = f2(n) * K3  +  g2(n-1) */
-      gnext4 = (q31_t) ((fnext4 * (*pk)) >> 15U) + gnext3;
-      gnext4 = __SSAT(gnext4, 16);
-
       gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15U) + gnext2;
       gnext3 = __SSAT(gnext3, 16);
 
       gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15U) + gnext1;
       gnext2 = __SSAT(gnext2, 16);
 
-      gnext1 = (q31_t) ((fnext1 * (*pk++)) >> 15U) + gcurnt1;
+      gnext1 = (q31_t) ((fnext1 * (*pk)) >> 15U) + gnext0;
       gnext1 = __SSAT(gnext1, 16);
 
+      gnext0 = (q31_t) ((fnext0 * (*pk++)) >> 15U) + gcurr0;
+      gnext0 = __SSAT(gnext0, 16);
+
       /* Read g1(n-1), g3(n-1) .... from state */
-      gcurnt1 = *px;
+      gcurr0 = *px;
 
       /* save g1(n) in state buffer */
-      *px++ = (q15_t) gnext4;
+      *px++ = (q15_t) gnext3;
 
       /* Sample processing for K4, K8.... */
       /* Process first sample for 4th, 8th .. tap */
       /* f4(n) = f3(n) +  K4 * g3(n-1) */
-      fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15U) + fcurnt1;
-      fnext1 = __SSAT(fnext1, 16);
+      fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+      fnext0 = __SSAT(fnext0, 16);
 
       /* Process second sample for 4th, 8th .. tap */
       /* for sample 2 processing */
-      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurnt2;
-      fnext2 = __SSAT(fnext2, 16);
+      fnext1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fcurr1;
+      fnext1 = __SSAT(fnext1, 16);
 
       /* Process third sample for 4th, 8th .. tap */
-      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurnt3;
-      fnext3 = __SSAT(fnext3, 16);
+      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurr2;
+      fnext2 = __SSAT(fnext2, 16);
 
       /* Process fourth sample for 4th, 8th .. tap */
-      fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15U) + fcurnt4;
-      fnext4 = __SSAT(fnext4, 16);
+      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurr3;
+      fnext3 = __SSAT(fnext3, 16);
 
       /* g4(n) = f3(n) * K4  +  g3(n-1) */
       /* Calculation of state values for next stage */
-      gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15U) + gnext3;
-      gnext4 = __SSAT(gnext4, 16);
-
-      gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15U) + gnext2;
+      gnext3 = (q31_t) ((fcurr3 * (*pk)) >> 15U) + gnext2;
       gnext3 = __SSAT(gnext3, 16);
 
-      gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15U) + gnext1;
+      gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + gnext1;
       gnext2 = __SSAT(gnext2, 16);
-      gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15U) + gcurnt1;
+
+      gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + gnext0;
       gnext1 = __SSAT(gnext1, 16);
 
+      gnext0 = (q31_t) ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
+      gnext0 = __SSAT(gnext0, 16);
 
       /* Read g2(n-1), g4(n-1) .... from state */
-      gcurnt1 = *px;
+      gcurr0 = *px;
 
       /* save g4(n) in state buffer */
-      *px++ = (q15_t) gnext4;
+      *px++ = (q15_t) gnext3;
 
       /* Sample processing for K5, K9.... */
       /* Process first sample for 5th, 9th .. tap */
       /* f5(n) = f4(n) +  K5 * g4(n-1) */
-      fcurnt1 = (q31_t) ((gcurnt1 * (*pk)) >> 15U) + fnext1;
-      fcurnt1 = __SSAT(fcurnt1, 16);
+      fcurr0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fnext0;
+      fcurr0 = __SSAT(fcurr0, 16);
 
       /* Process second sample for 5th, 9th .. tap */
-      fcurnt2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fnext2;
-      fcurnt2 = __SSAT(fcurnt2, 16);
+      fcurr1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fnext1;
+      fcurr1 = __SSAT(fcurr1, 16);
 
       /* Process third sample for 5th, 9th .. tap */
-      fcurnt3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fnext3;
-      fcurnt3 = __SSAT(fcurnt3, 16);
+      fcurr2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fnext2;
+      fcurr2 = __SSAT(fcurr2, 16);
 
       /* Process fourth sample for 5th, 9th .. tap */
-      fcurnt4 = (q31_t) ((gnext3 * (*pk)) >> 15U) + fnext4;
-      fcurnt4 = __SSAT(fcurnt4, 16);
+      fcurr3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fnext3;
+      fcurr3 = __SSAT(fcurr3, 16);
 
       /* Calculation of state values for next stage */
       /* g5(n) = f4(n) * K5  +  g4(n-1) */
-      gnext4 = (q31_t) ((fnext4 * (*pk)) >> 15U) + gnext3;
-      gnext4 = __SSAT(gnext4, 16);
       gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15U) + gnext2;
       gnext3 = __SSAT(gnext3, 16);
+
       gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15U) + gnext1;
       gnext2 = __SSAT(gnext2, 16);
-      gnext1 = (q31_t) ((fnext1 * (*pk++)) >> 15U) + gcurnt1;
+
+      gnext1 = (q31_t) ((fnext1 * (*pk)) >> 15U) + gnext0;
       gnext1 = __SSAT(gnext1, 16);
 
+      gnext0 = (q31_t) ((fnext0 * (*pk++)) >> 15U) + gcurr0;
+      gnext0 = __SSAT(gnext0, 16);
+
       stageCnt--;
     }
 
@@ -308,95 +306,98 @@
 
     while (stageCnt > 0U)
     {
-      gcurnt1 = *px;
+      gcurr0 = *px;
 
       /* save g value in state buffer */
-      *px++ = (q15_t) gnext4;
+      *px++ = (q15_t) gnext3;
 
       /* Process four samples for last three taps here */
-      fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15U) + fcurnt1;
+      fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+      fnext0 = __SSAT(fnext0, 16);
+
+      fnext1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fcurr1;
       fnext1 = __SSAT(fnext1, 16);
-      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurnt2;
+
+      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurr2;
       fnext2 = __SSAT(fnext2, 16);
 
-      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurnt3;
+      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurr3;
       fnext3 = __SSAT(fnext3, 16);
 
-      fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15U) + fcurnt4;
-      fnext4 = __SSAT(fnext4, 16);
-
       /* g1(n) = f0(n) * K1  +  g0(n-1) */
-      gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15U) + gnext3;
-      gnext4 = __SSAT(gnext4, 16);
-      gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15U) + gnext2;
+      gnext3 = (q31_t) ((fcurr3 * (*pk)) >> 15U) + gnext2;
       gnext3 = __SSAT(gnext3, 16);
-      gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15U) + gnext1;
+
+      gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + gnext1;
       gnext2 = __SSAT(gnext2, 16);
-      gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15U) + gcurnt1;
+
+      gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + gnext0;
       gnext1 = __SSAT(gnext1, 16);
 
+      gnext0 = (q31_t) ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
+      gnext0 = __SSAT(gnext0, 16);
+
       /* Update of f values for next coefficient set processing */
-      fcurnt1 = fnext1;
-      fcurnt2 = fnext2;
-      fcurnt3 = fnext3;
-      fcurnt4 = fnext4;
+      fcurr0 = fnext0;
+      fcurr1 = fnext1;
+      fcurr2 = fnext2;
+      fcurr3 = fnext3;
 
       stageCnt--;
-
     }
 
     /* The results in the 4 accumulators, store in the destination buffer. */
     /* y(n) = fN(n) */
 
 #ifndef  ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ = __PKHBT(fcurnt1, fcurnt2, 16);
-    *__SIMD32(pDst)++ = __PKHBT(fcurnt3, fcurnt4, 16);
-
+    write_q15x2_ia (&pDst, __PKHBT(fcurr0, fcurr1, 16));
+    write_q15x2_ia (&pDst, __PKHBT(fcurr2, fcurr3, 16));
 #else
-
-    *__SIMD32(pDst)++ = __PKHBT(fcurnt2, fcurnt1, 16);
-    *__SIMD32(pDst)++ = __PKHBT(fcurnt4, fcurnt3, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
+    write_q15x2_ia (&pDst, __PKHBT(fcurr1, fcurr0, 16));
+    write_q15x2_ia (&pDst, __PKHBT(fcurr3, fcurr2, 16));
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
 
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     /* f0(n) = x(n) */
-    fcurnt1 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
+    fcurr0 = *pSrc++;
 
     /* Initialize state pointer */
     px = pState;
 
+    /* Initialize coeff pointer */
+    pk = pCoeffs;
+
     /* read g2(n) from state buffer */
-    gcurnt1 = *px;
+    gcurr0 = *px;
 
     /* for sample 1 processing */
     /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = (((q31_t) gcurnt1 * (*pk)) >> 15U) + fcurnt1;
-    fnext1 = __SSAT(fnext1, 16);
-
+    fnext0 = (((q31_t) gcurr0 * (*pk)) >> 15U) + fcurr0;
+    fnext0 = __SSAT(fnext0, 16);
 
     /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (((q31_t) fcurnt1 * (*pk++)) >> 15U) + gcurnt1;
-    gnext1 = __SSAT(gnext1, 16);
+    gnext0 = (((q31_t) fcurr0 * (*pk++)) >> 15U) + gcurr0;
+    gnext0 = __SSAT(gnext0, 16);
 
     /* save g1(n) in state buffer */
-    *px++ = (q15_t) fcurnt1;
+    *px++ = (q15_t) fcurr0;
 
-    /* f1(n) is saved in fcurnt1
-       for next stage processing */
-    fcurnt1 = fnext1;
+    /* f1(n) is saved in fcurr0 for next stage processing */
+    fcurr0 = fnext0;
 
     stageCnt = (numStages - 1U);
 
@@ -404,79 +405,65 @@
     while (stageCnt > 0U)
     {
       /* read g2(n) from state buffer */
-      gcurnt1 = *px;
+      gcurr0 = *px;
 
       /* save g1(n) in state buffer */
-      *px++ = (q15_t) gnext1;
+      *px++ = (q15_t) gnext0;
 
       /* Sample processing for K2, K3.... */
       /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext1 = (((q31_t) gcurnt1 * (*pk)) >> 15U) + fcurnt1;
-      fnext1 = __SSAT(fnext1, 16);
+      fnext0 = (((q31_t) gcurr0 * (*pk)) >> 15U) + fcurr0;
+      fnext0 = __SSAT(fnext0, 16);
 
       /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext1 = (((q31_t) fcurnt1 * (*pk++)) >> 15U) + gcurnt1;
-      gnext1 = __SSAT(gnext1, 16);
+      gnext0 = (((q31_t) fcurr0 * (*pk++)) >> 15U) + gcurr0;
+      gnext0 = __SSAT(gnext0, 16);
 
-
-      /* f1(n) is saved in fcurnt1
-         for next stage processing */
-      fcurnt1 = fnext1;
+      /* f1(n) is saved in fcurr0 for next stage processing */
+      fcurr0 = fnext0;
 
       stageCnt--;
-
     }
 
     /* y(n) = fN(n) */
-    *pDst++ = __SSAT(fcurnt1, 16);
-
+    *pDst++ = __SSAT(fcurr0, 16);
 
     blkCnt--;
-
   }
 
 #else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t fcurnt, fnext, gcurnt, gnext;            /* temporary variables */
-  uint32_t numStages = S->numStages;             /* Length of the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
-
-  pState = &S->pState[0];
+/* alternate version for CM0_FAMILY */
 
   blkCnt = blockSize;
 
   while (blkCnt > 0U)
   {
     /* f0(n) = x(n) */
-    fcurnt = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
+    fcurr0 = *pSrc++;
 
     /* Initialize state pointer */
     px = pState;
 
+    /* Initialize coeff pointer */
+    pk = pCoeffs;
+
     /* read g0(n-1) from state buffer */
-    gcurnt = *px;
+    gcurr0 = *px;
 
     /* for sample 1 processing */
     /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext = ((gcurnt * (*pk)) >> 15U) + fcurnt;
-    fnext = __SSAT(fnext, 16);
-
+    fnext0 = ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+    fnext0 = __SSAT(fnext, 16);
 
     /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext = ((fcurnt * (*pk++)) >> 15U) + gcurnt;
-    gnext = __SSAT(gnext, 16);
+    gnext0 = ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
+    gnext0 = __SSAT(gnext0, 16);
 
     /* save f0(n) in state buffer */
-    *px++ = (q15_t) fcurnt;
+    *px++ = (q15_t) fcurr0;
 
-    /* f1(n) is saved in fcurnt
-       for next stage processing */
-    fcurnt = fnext;
+    /* f1(n) is saved in fcurr for next stage processing */
+    fcurr0 = fnext0;
 
     stageCnt = (numStages - 1U);
 
@@ -484,41 +471,36 @@
     while (stageCnt > 0U)
     {
       /* read g1(n-1) from state buffer */
-      gcurnt = *px;
+      gcurr0 = *px;
 
       /* save g0(n-1) in state buffer */
-      *px++ = (q15_t) gnext;
+      *px++ = (q15_t) gnext0;
 
       /* Sample processing for K2, K3.... */
       /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext = ((gcurnt * (*pk)) >> 15U) + fcurnt;
-      fnext = __SSAT(fnext, 16);
+      fnext0 = ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+      fnext0 = __SSAT(fnext0, 16);
 
       /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext = ((fcurnt * (*pk++)) >> 15U) + gcurnt;
-      gnext = __SSAT(gnext, 16);
+      gnext0 = ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
+      gnext0 = __SSAT(gnext0, 16);
 
-
-      /* f1(n) is saved in fcurnt
-         for next stage processing */
-      fcurnt = fnext;
+      /* f1(n) is saved in fcurr0 for next stage processing */
+      fcurr0 = fnext0;
 
       stageCnt--;
-
     }
 
     /* y(n) = fN(n) */
-    *pDst++ = __SSAT(fcurnt, 16);
-
+    *pDst++ = __SSAT(fcurr0, 16);
 
     blkCnt--;
-
   }
 
-#endif /*   #if defined (ARM_MATH_DSP) */
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
 
 }
 
 /**
- * @} end of FIR_Lattice group
+  @} end of FIR_Lattice group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c b/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c
index 8acfd34..c8d28d7 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_lattice_q31.c
  * Description:  Q31 FIR lattice filter processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,313 +29,477 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR_Lattice
- * @{
+  @addtogroup FIR_Lattice
+  @{
  */
 
-
 /**
- * @brief Processing function for the Q31 FIR lattice filter.
- * @param[in]  *S        points to an instance of the Q31 FIR lattice structure.
- * @param[in]  *pSrc     points to the block of input data.
- * @param[out] *pDst     points to the block of output data
- * @param[in]  blockSize number of samples to process.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- * In order to avoid overflows the input signal must be scaled down by 2*log2(numStages) bits.
+  @brief         Processing function for the Q31 FIR lattice filter.
+  @param[in]     S          points to an instance of the Q31 FIR lattice structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   In order to avoid overflows the input signal must be scaled down by 2*log2(numStages) bits.
  */
 
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
 void arm_fir_lattice_q31(
   const arm_fir_lattice_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-  q31_t *pState;                                 /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *px;                                     /* temporary state pointer */
-  q31_t *pk;                                     /* temporary coefficient pointer */
-  q31_t fcurr1, fnext1, gcurr1 = 0, gnext1;      /* temporary variables for first sample in loop unrolling */
-  q31_t fcurr2, fnext2, gnext2;                  /* temporary variables for second sample in loop unrolling */
-  uint32_t numStages = S->numStages;             /* Length of the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
-  q31_t k;
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *px;                                     /* Temporary state pointer */
+  const q31_t *pk;                                     /* Temporary coefficient pointer */
+        uint32_t numStages = S->numStages;             /* Number of stages in the filter */
+        uint32_t blkCnt, stageCnt;                     /* Loop counters */
+        q31_t fcurr0, fnext0, gnext0, gcurr0;          /* Temporary variables */
 
-  pState = &S->pState[0];
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
 
-  blkCnt = blockSize >> 1U;
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t fcurr1, fnext1, gnext1;                  /* Temporary variables for second sample in loop unrolling */
+        q31_t fcurr2, fnext2, gnext2;                  /* Temporary variables for third sample in loop unrolling */
+        q31_t fcurr3, fnext3, gnext3;                  /* Temporary variables for fourth sample in loop unrolling */
+#endif
 
-  /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.
-     a second loop below computes the remaining 1 sample. */
+  gcurr0 = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
   while (blkCnt > 0U)
   {
+    /* Read two samples from input buffer */
     /* f0(n) = x(n) */
+    fcurr0 = *pSrc++;
     fcurr1 = *pSrc++;
 
-    /* f0(n) = x(n) */
-    fcurr2 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
     /* Initialize state pointer */
     px = pState;
 
-    /* read g0(n - 1) from state buffer */
-    gcurr1 = *px;
+    /* Initialize coeff pointer */
+    pk = pCoeffs;
 
-    /* Read the reflection coefficient */
-    k = *pk++;
+    /* Read g0(n-1) from state buffer */
+    gcurr0 = *px;
 
-    /* for sample 1 processing */
+    /* Process first sample for first tap */
     /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
+    fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+    fnext0 = (fnext0 << 1U) + fcurr0;
 
     /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
-    fnext1 = fcurr1 + (fnext1 << 1U);
-    gnext1 = gcurr1 + (gnext1 << 1U);
+    gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk)) >> 32U);
+    gnext0 = (gnext0 << 1U) + gcurr0;
 
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext2 = (q31_t) (((q63_t) fcurr1 * k) >> 32);
+    /* Process second sample for first tap */
+    fnext1 = (q31_t) (((q63_t) fcurr0 * (*pk)) >> 32U);
+    fnext1 = (fnext1 << 1U) + fcurr1;
+    gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
+    gnext1 = (gnext1 << 1U) + fcurr0;
 
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext2 = (q31_t) (((q63_t) fcurr2 * (k)) >> 32);
-    fnext2 = fcurr2 + (fnext2 << 1U);
-    gnext2 = fcurr1 + (gnext2 << 1U);
+    /* Read next two samples from input buffer */
+    /* f0(n+2) = x(n+2) */
+    fcurr2 = *pSrc++;
+    fcurr3 = *pSrc++;
 
-    /* save g1(n) in state buffer */
-    *px++ = fcurr2;
+    /* Process third sample for first tap */
+    fnext2 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
+    fnext2 = (fnext2 << 1U) + fcurr2;
+    gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U);
+    gnext2 = (gnext2 << 1U) + fcurr1;
 
-    /* f1(n) is saved in fcurr1
-       for next stage processing */
+    /* Process fourth sample for first tap */
+    fnext3 = (q31_t) (((q63_t) fcurr2 * (*pk  )) >> 32U);
+    fnext3 = (fnext3 << 1U) + fcurr3;
+    gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk++)) >> 32U);
+    gnext3 = (gnext3 << 1U) + fcurr2;
+
+    /* Copy only last input sample into the state buffer
+       which will be used for next samples processing */
+    *px++ = fcurr3;
+
+    /* Update of f values for next coefficient set processing */
+    fcurr0 = fnext0;
     fcurr1 = fnext1;
     fcurr2 = fnext2;
+    fcurr3 = fnext3;
 
-    stageCnt = (numStages - 1U);
+    /* Loop unrolling.  Process 4 taps at a time . */
+    stageCnt = (numStages - 1U) >> 2U;
 
-    /* stage loop */
+    /* Loop over the number of taps.  Unroll by a factor of 4.
+       Repeat until we've computed numStages-3 coefficients. */
+
+    /* Process 2nd, 3rd, 4th and 5th taps ... here */
     while (stageCnt > 0U)
     {
-
-      /* Read the reflection coefficient */
-      k = *pk++;
-
-      /* read g2(n) from state buffer */
-      gcurr1 = *px;
+      /* Read g1(n-1), g3(n-1) .... from state */
+      gcurr0 = *px;
 
       /* save g1(n) in state buffer */
-      *px++ = gnext2;
+      *px++ = gnext3;
 
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
-      fnext2 = (q31_t) (((q63_t) gnext1 * k) >> 32);
+      /* Process first sample for 2nd, 6th .. tap */
+      /* Sample processing for K2, K6.... */
+      /* f1(n) = f0(n) +  K1 * g0(n-1) */
+      fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+      fnext0 = (fnext0 << 1U) + fcurr0;
 
-      fnext1 = fcurr1 + (fnext1 << 1U);
-      fnext2 = fcurr2 + (fnext2 << 1U);
+      /* Process second sample for 2nd, 6th .. tap */
+      /* for sample 2 processing */
+      fnext1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
+      fnext1 = (fnext1 << 1U) + fcurr1;
 
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext2 = (q31_t) (((q63_t) fcurr2 * (k)) >> 32);
-      gnext2 = gnext1 + (gnext2 << 1U);
+      /* Process third sample for 2nd, 6th .. tap */
+      fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
+      fnext2 = (fnext2 << 1U) + fcurr2;
 
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
-      gnext1 = gcurr1 + (gnext1 << 1U);
+      /* Process fourth sample for 2nd, 6th .. tap */
+      fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
+      fnext3 = (fnext3 << 1U) + fcurr3;
 
-      /* f1(n) is saved in fcurr1
-         for next stage processing */
+      /* g1(n) = f0(n) * K1  +  g0(n-1) */
+      /* Calculation of state values for next stage */
+      gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 32U);
+      gnext3 = (gnext3 << 1U) + gnext2;
+
+      gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U);
+      gnext2 = (gnext2 << 1U) + gnext1;
+
+      gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
+      gnext1 = (gnext1 << 1U) + gnext0;
+
+      gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+      gnext0 = (gnext0 << 1U) + gcurr0;
+
+
+      /* Read g2(n-1), g4(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g1(n) in state buffer */
+      *px++ = gnext3;
+
+      /* Sample processing for K3, K7.... */
+      /* Process first sample for 3rd, 7th .. tap */
+      /* f3(n) = f2(n) +  K3 * g2(n-1) */
+      fcurr0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+      fcurr0 = (fcurr0 << 1U) + fnext0;
+
+      /* Process second sample for 3rd, 7th .. tap */
+      fcurr1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
+      fcurr1 = (fcurr1 << 1U) + fnext1;
+
+      /* Process third sample for 3rd, 7th .. tap */
+      fcurr2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
+      fcurr2 = (fcurr2 << 1U) + fnext2;
+
+      /* Process fourth sample for 3rd, 7th .. tap */
+      fcurr3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
+      fcurr3 = (fcurr3 << 1U) + fnext3;
+
+      /* Calculation of state values for next stage */
+      /* g3(n) = f2(n) * K3  +  g2(n-1) */
+      gnext3 = (q31_t) (((q63_t) fnext3 * (*pk)) >> 32U);
+      gnext3 = (gnext3 << 1U) + gnext2;
+
+      gnext2 = (q31_t) (((q63_t) fnext2 * (*pk)) >> 32U);
+      gnext2 = (gnext2 << 1U) + gnext1;
+
+      gnext1 = (q31_t) (((q63_t) fnext1 * (*pk)) >> 32U);
+      gnext1 = (gnext1 << 1U) + gnext0;
+
+      gnext0 = (q31_t) (((q63_t) fnext0 * (*pk++)) >> 32U);
+      gnext0 = (gnext0 << 1U) + gcurr0;
+
+      /* Read g1(n-1), g3(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g1(n) in state buffer */
+      *px++ = gnext3;
+
+      /* Sample processing for K4, K8.... */
+      /* Process first sample for 4th, 8th .. tap */
+      /* f4(n) = f3(n) +  K4 * g3(n-1) */
+      fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+      fnext0 = (fnext0 << 1U) + fcurr0;
+
+      /* Process second sample for 4th, 8th .. tap */
+      /* for sample 2 processing */
+      fnext1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
+      fnext1 = (fnext1 << 1U) + fcurr1;
+
+      /* Process third sample for 4th, 8th .. tap */
+      fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
+      fnext2 = (fnext2 << 1U) + fcurr2;
+
+      /* Process fourth sample for 4th, 8th .. tap */
+      fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
+      fnext3 = (fnext3 << 1U) + fcurr3;
+
+      /* g4(n) = f3(n) * K4  +  g3(n-1) */
+      /* Calculation of state values for next stage */
+      gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 32U);
+      gnext3 = (gnext3 << 1U) + gnext2;
+
+      gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U);
+      gnext2 = (gnext2 << 1U) + gnext1;
+
+      gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
+      gnext1 = (gnext1 << 1U) + gnext0;
+
+      gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+      gnext0 = (gnext0 << 1U) + gcurr0;
+
+      /* Read g2(n-1), g4(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g4(n) in state buffer */
+      *px++ = gnext3;
+
+      /* Sample processing for K5, K9.... */
+      /* Process first sample for 5th, 9th .. tap */
+      /* f5(n) = f4(n) +  K5 * g4(n-1) */
+      fcurr0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+      fcurr0 = (fcurr0 << 1U) + fnext0;
+
+      /* Process second sample for 5th, 9th .. tap */
+      fcurr1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
+      fcurr1 = (fcurr1 << 1U) + fnext1;
+
+      /* Process third sample for 5th, 9th .. tap */
+      fcurr2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
+      fcurr2 = (fcurr2 << 1U) + fnext2;
+
+      /* Process fourth sample for 5th, 9th .. tap */
+      fcurr3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
+      fcurr3 = (fcurr3 << 1U) + fnext3;
+
+      /* Calculation of state values for next stage */
+      /* g5(n) = f4(n) * K5  +  g4(n-1) */
+      gnext3 = (q31_t) (((q63_t) fnext3 * (*pk)) >> 32U);
+      gnext3 = (gnext3 << 1U) + gnext2;
+
+      gnext2 = (q31_t) (((q63_t) fnext2 * (*pk)) >> 32U);
+      gnext2 = (gnext2 << 1U) + gnext1;
+
+      gnext1 = (q31_t) (((q63_t) fnext1 * (*pk)) >> 32U);
+      gnext1 = (gnext1 << 1U) + gnext0;
+
+      gnext0 = (q31_t) (((q63_t) fnext0 * (*pk++)) >> 32U);
+      gnext0 = (gnext0 << 1U) + gcurr0;
+
+      stageCnt--;
+    }
+
+    /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
+    stageCnt = (numStages - 1U) % 0x4U;
+
+    while (stageCnt > 0U)
+    {
+      gcurr0 = *px;
+
+      /* save g value in state buffer */
+      *px++ = gnext3;
+
+      /* Process four samples for last three taps here */
+      fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+      fnext0 = (fnext0 << 1U) + fcurr0;
+
+      fnext1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
+      fnext1 = (fnext1 << 1U) + fcurr1;
+
+      fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
+      fnext2 = (fnext2 << 1U) + fcurr2;
+
+      fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
+      fnext3 = (fnext3 << 1U) + fcurr3;
+
+      /* g1(n) = f0(n) * K1  +  g0(n-1) */
+      gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 32U);
+      gnext3 = (gnext3 << 1U) + gnext2;
+
+      gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U);
+      gnext2 = (gnext2 << 1U) + gnext1;
+
+      gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
+      gnext1 = (gnext1 << 1U) + gnext0;
+
+      gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+      gnext0 = (gnext0 << 1U) + gcurr0;
+
+      /* Update of f values for next coefficient set processing */
+      fcurr0 = fnext0;
       fcurr1 = fnext1;
       fcurr2 = fnext2;
+      fcurr3 = fnext3;
 
       stageCnt--;
-
     }
 
+    /* The results in the 4 accumulators, store in the destination buffer. */
     /* y(n) = fN(n) */
+    *pDst++ = fcurr0;
     *pDst++ = fcurr1;
     *pDst++ = fcurr2;
+    *pDst++ = fcurr3;
 
     blkCnt--;
-
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x2U;
-
-  while (blkCnt > 0U)
-  {
-    /* f0(n) = x(n) */
-    fcurr1 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g0(n - 1) from state buffer */
-    gcurr1 = *px;
-
-    /* Read the reflection coefficient */
-    k = *pk++;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
-    fnext1 = fcurr1 + (fnext1 << 1U);
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
-    gnext1 = gcurr1 + (gnext1 << 1U);
-
-    /* save g1(n) in state buffer */
-    *px++ = fcurr1;
-
-    /* f1(n) is saved in fcurr1
-       for next stage processing */
-    fcurr1 = fnext1;
-
-    stageCnt = (numStages - 1U);
-
-    /* stage loop */
-    while (stageCnt > 0U)
-    {
-      /* Read the reflection coefficient */
-      k = *pk++;
-
-      /* read g2(n) from state buffer */
-      gcurr1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext1;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
-      fnext1 = fcurr1 + (fnext1 << 1U);
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
-      gnext1 = gcurr1 + (gnext1 << 1U);
-
-      /* f1(n) is saved in fcurr1
-         for next stage processing */
-      fcurr1 = fnext1;
-
-      stageCnt--;
-
-    }
-
-
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr1;
-
-    blkCnt--;
-
-  }
-
-
-}
-
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
 
 #else
 
-/* Run the below code for Cortex-M0 */
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
 
-void arm_fir_lattice_q31(
-  const arm_fir_lattice_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState;                                 /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *px;                                     /* temporary state pointer */
-  q31_t *pk;                                     /* temporary coefficient pointer */
-  q31_t fcurr, fnext, gcurr, gnext;              /* temporary variables */
-  uint32_t numStages = S->numStages;             /* Length of the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
-  pState = &S->pState[0];
+  while (blkCnt > 0U)
+  {
+    /* f0(n) = x(n) */
+    fcurr0 = *pSrc++;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pk = pCoeffs;
+
+    /* read g2(n) from state buffer */
+    gcurr0 = *px;
+
+    /* for sample 1 processing */
+    /* f1(n) = f0(n) +  K1 * g0(n-1) */
+    fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+    fnext0 = (fnext0 << 1U) + fcurr0;
+
+    /* g1(n) = f0(n) * K1  +  g0(n-1) */
+    gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+    gnext0 = (gnext0 << 1U) + gcurr0;
+
+    /* save g1(n) in state buffer */
+    *px++ = fcurr0;
+
+    /* f1(n) is saved in fcurr0 for next stage processing */
+    fcurr0 = fnext0;
+
+    stageCnt = (numStages - 1U);
+
+    /* stage loop */
+    while (stageCnt > 0U)
+    {
+      /* read g2(n) from state buffer */
+      gcurr0 = *px;
+
+      /* save g1(n) in state buffer */
+      *px++ = gnext0;
+
+      /* Sample processing for K2, K3.... */
+      /* f2(n) = f1(n) +  K2 * g1(n-1) */
+      fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+      fnext0 = (fnext0 << 1U) + fcurr0;
+
+      /* g2(n) = f1(n) * K2  +  g1(n-1) */
+      gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+      gnext0 = (gnext0 << 1U) + gcurr0;
+
+      /* f1(n) is saved in fcurr0 for next stage processing */
+      fcurr0 = fnext0;
+
+      stageCnt--;
+    }
+
+    /* y(n) = fN(n) */
+    *pDst++ = fcurr0;
+
+    blkCnt--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
 
   blkCnt = blockSize;
 
   while (blkCnt > 0U)
   {
     /* f0(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
+    fcurr0 = *pSrc++;
 
     /* Initialize state pointer */
     px = pState;
 
+    /* Initialize coeff pointer */
+    pk = pCoeffs;
+
     /* read g0(n-1) from state buffer */
-    gcurr = *px;
+    gcurr0 = *px;
 
     /* for sample 1 processing */
     /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext = (q31_t) (((q63_t) gcurr * (*pk)) >> 31) + fcurr;
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext = (q31_t) (((q63_t) fcurr * (*pk++)) >> 31) + gcurr;
-    /* save g1(n) in state buffer */
-    *px++ = fcurr;
+    fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+    fnext0 = (fnext << 1U) + fcurr0;
 
-    /* f1(n) is saved in fcurr1
-       for next stage processing */
-    fcurr = fnext;
+    /* g1(n) = f0(n) * K1  +  g0(n-1) */
+    gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+    gnext0 = (gnext0 << 1U) + gcurr0;
+
+    /* save f0(n) in state buffer */
+    *px++ = fcurr0;
+
+    /* f1(n) is saved in fcurr for next stage processing */
+    fcurr0 = fnext0;
 
     stageCnt = (numStages - 1U);
 
     /* stage loop */
     while (stageCnt > 0U)
     {
-      /* read g2(n) from state buffer */
-      gcurr = *px;
+      /* read g1(n-1) from state buffer */
+      gcurr0 = *px;
 
-      /* save g1(n) in state buffer */
-      *px++ = gnext;
+      /* save g0(n-1) in state buffer */
+      *px++ = gnext0;
 
       /* Sample processing for K2, K3.... */
       /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext = (q31_t) (((q63_t) gcurr * (*pk)) >> 31) + fcurr;
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext = (q31_t) (((q63_t) fcurr * (*pk++)) >> 31) + gcurr;
+      fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+      fnext0 = (fnext0 << 1U) + fcurr0;
 
-      /* f1(n) is saved in fcurr1
-         for next stage processing */
-      fcurr = fnext;
+      /* g2(n) = f1(n) * K2  +  g1(n-1) */
+      gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+      gnext0 = (gnext0 << 1U) + gcurr0;
+
+      /* f1(n) is saved in fcurr0 for next stage processing */
+      fcurr0 = fnext0;
 
       stageCnt--;
-
     }
 
     /* y(n) = fN(n) */
-    *pDst++ = fcurr;
+    *pDst++ = fcurr0;
 
     blkCnt--;
-
   }
 
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
 }
 
-#endif /*   #if defined (ARM_MATH_DSP) */
-
-
 /**
- * @} end of FIR_Lattice group
+  @} end of FIR_Lattice group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_q15.c b/DSP/Source/FilteringFunctions/arm_fir_q15.c
index e970a10..e20798e 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_q15.c
  * Description:  Q15 FIR filter processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,334 +29,78 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR
- * @{
+  @addtogroup FIR
+  @{
  */
 
 /**
- * @brief Processing function for the Q15 FIR filter.
- * @param[in] *S points to an instance of the Q15 FIR structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in]  blockSize number of samples to process per call.
- * @return none.
- *
- *
- * \par Restrictions
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- *	In this case input, output, state buffers should be aligned by 32-bit
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.
- *
- * \par
- * Refer to the function <code>arm_fir_fast_q15()</code> for a faster but less precise implementation of this function.
+  @brief         Processing function for the Q15 FIR filter.
+  @param[in]     S          points to an instance of the Q15 FIR filter structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+                   Lastly, the accumulator is saturated to yield a result in 1.15 format.
+
+  @remark
+                   Refer to \ref arm_fir_fast_q15() for a faster but less precise implementation of this function.
  */
 
-#if defined (ARM_MATH_DSP)
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-
 void arm_fir_q15(
   const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px1;                                    /* Temporary q15 pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold SIMD state and coefficient values */
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q15_t *px;                                     /* Temporary pointer for state buffer */
+  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q63_t acc0;                                    /* Accumulators */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
 
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc1, acc2, acc3;                        /* Accumulators */
+        q31_t x0, x1, x2, c0;                          /* Temporary variables to hold state and coefficient values */
+#endif
 
   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
   /* pStateCurnt points to the location where the new input data should be written */
   pStateCurnt = &(S->pState[(numTaps - 1U)]);
 
-  /* Apply loop unrolling and compute 4 output values simultaneously.
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 output values simultaneously.
    * The variables acc0 ... acc3 hold output values that are being computed:
    *
    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
    */
+  blkCnt = blockSize >> 2U;
 
-  blkCnt = blockSize >> 2;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* Copy four new input samples into the state buffer.
-     ** Use 32-bit SIMD to move the 16-bit data.  Only requires two copies. */
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pSrc)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pSrc)++;
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Initialize state pointer of type q15 */
-    px1 = pState;
-
-    /* Initialize coeff pointer of type q31 */
-    pb = pCoeffs;
-
-    /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */
-    x0 = _SIMD32_OFFSET(px1);
-
-    /* Read the third and forth samples from the state buffer: x[n-N-1], x[n-N-2] */
-    x1 = _SIMD32_OFFSET(px1 + 1U);
-
-    px1 += 2U;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    tapCnt = numTaps >> 2;
-
-    while (tapCnt > 0U)
-    {
-      /* Read the first two coefficients using SIMD:  b[N] and b[N-1] coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
-      acc0 = __SMLALD(x0, c0, acc0);
-
-      /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
-      acc1 = __SMLALD(x1, c0, acc1);
-
-      /* Read state x[n-N-2], x[n-N-3] */
-      x2 = _SIMD32_OFFSET(px1);
-
-      /* Read state x[n-N-3], x[n-N-4] */
-      x3 = _SIMD32_OFFSET(px1 + 1U);
-
-      /* acc2 +=  b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
-      acc2 = __SMLALD(x2, c0, acc2);
-
-      /* acc3 +=  b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
-      acc3 = __SMLALD(x3, c0, acc3);
-
-      /* Read coefficients b[N-2], b[N-3] */
-      c0 = *__SIMD32(pb)++;
-
-      /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
-      acc0 = __SMLALD(x2, c0, acc0);
-
-      /* acc1 +=  b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
-      acc1 = __SMLALD(x3, c0, acc1);
-
-      /* Read state x[n-N-4], x[n-N-5] */
-      x0 = _SIMD32_OFFSET(px1 + 2U);
-
-      /* Read state x[n-N-5], x[n-N-6] */
-      x1 = _SIMD32_OFFSET(px1 + 3U);
-
-      /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
-      acc2 = __SMLALD(x0, c0, acc2);
-
-      /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
-      acc3 = __SMLALD(x1, c0, acc3);
-
-      px1 += 4U;
-
-      tapCnt--;
-
-    }
-
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps.
-     ** This is always be 2 taps since the filter length is even. */
-    if ((numTaps & 0x3U) != 0U)
-    {
-      /* Read 2 coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* Fetch 4 state variables */
-      x2 = _SIMD32_OFFSET(px1);
-
-      x3 = _SIMD32_OFFSET(px1 + 1U);
-
-      /* Perform the multiply-accumulates */
-      acc0 = __SMLALD(x0, c0, acc0);
-
-      px1 += 2U;
-
-      acc1 = __SMLALD(x1, c0, acc1);
-      acc2 = __SMLALD(x2, c0, acc2);
-      acc3 = __SMLALD(x3, c0, acc3);
-    }
-
-    /* The results in the 4 accumulators are in 2.30 format.  Convert to 1.15 with saturation.
-     ** Then store the 4 outputs in the destination buffer. */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN       */
-
-
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4U;
-  while (blkCnt > 0U)
-  {
-    /* Copy two samples into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Initialize state pointer of type q15 */
-    px1 = pState;
-
-    /* Initialize coeff pointer of type q31 */
-    pb = pCoeffs;
-
-    tapCnt = numTaps >> 1;
-
-    do
-    {
-
-      c0 = *__SIMD32(pb)++;
-      x0 = *__SIMD32(px1)++;
-
-      acc0 = __SMLALD(x0, c0, acc0);
-      tapCnt--;
-    }
-    while (tapCnt > 0U);
-
-    /* The result is in 2.30 format.  Convert to 1.15 with saturation.
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  /* Calculation of count for copying integer writes */
-  tapCnt = (numTaps - 1U) >> 2;
-
-  while (tapCnt > 0U)
-  {
-
-    /* Copy state values to start of state buffer */
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-
-    tapCnt--;
-
-  }
-
-  /* Calculation of count for remaining q15_t data */
-  tapCnt = (numTaps - 1U) % 0x4U;
-
-  /* copy remaining data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-}
-
-#else /* UNALIGNED_SUPPORT_DISABLE */
-
-void arm_fir_q15(
-  const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q15_t *px;                                     /* Temporary q31 pointer for SIMD state buffer accesses */
-  q31_t x0, x1, x2, c0;                          /* Temporary variables to hold SIMD state and coefficient values */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
-  /* Apply loop unrolling and compute 4 output values simultaneously.
-   * The variables acc0 ... acc3 hold output values that are being computed:
-   *
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
-   */
-
-  blkCnt = blockSize >> 2;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while (blkCnt > 0U)
-  {
-    /* Copy four new input samples into the state buffer.
-     ** Use 32-bit SIMD to move the 16-bit data.  Only requires two copies. */
+    /* Copy 4 new input samples into the state buffer. */
     *pStateCurnt++ = *pSrc++;
     *pStateCurnt++ = *pSrc++;
     *pStateCurnt++ = *pSrc++;
     *pStateCurnt++ = *pSrc++;
 
-
     /* Set all accumulators to zero */
     acc0 = 0;
     acc1 = 0;
@@ -370,19 +114,19 @@
     pb = pCoeffs;
 
     /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */
-    x0 = *__SIMD32(px)++;
+    x0 = read_q15x2_ia (&px);
 
     /* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */
-    x2 = *__SIMD32(px)++;
+    x2 = read_q15x2_ia (&px);
 
     /* Loop over the number of taps.  Unroll by a factor of 4.
-     ** Repeat until we've computed numTaps-(numTaps%4) coefficients. */
-    tapCnt = numTaps >> 2;
+       Repeat until we've computed numTaps-(numTaps%4) coefficients. */
+    tapCnt = numTaps >> 2U;
 
-    while (tapCnt > 0)
+    while (tapCnt > 0U)
     {
       /* Read the first two coefficients using SIMD:  b[N] and b[N-1] coefficients */
-      c0 = *__SIMD32(pb)++;
+      c0 = read_q15x2_ia ((q15_t **) &pb);
 
       /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
       acc0 = __SMLALD(x0, c0, acc0);
@@ -398,7 +142,7 @@
 #endif
 
       /* Read state x[n-N-4], x[n-N-5] */
-      x0 = _SIMD32_OFFSET(px);
+      x0 = read_q15x2_ia (&px);
 
       /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
       acc1 = __SMLALDX(x1, c0, acc1);
@@ -414,13 +158,13 @@
       acc3 = __SMLALDX(x1, c0, acc3);
 
       /* Read coefficients b[N-2], b[N-3] */
-      c0 = *__SIMD32(pb)++;
+      c0 = read_q15x2_ia ((q15_t **) &pb);
 
       /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
       acc0 = __SMLALD(x2, c0, acc0);
 
       /* Read state x[n-N-6], x[n-N-7] with offset */
-      x2 = _SIMD32_OFFSET(px + 2U);
+      x2 = read_q15x2_ia (&px);
 
       /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
       acc2 = __SMLALD(x0, c0, acc2);
@@ -438,21 +182,16 @@
       /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
       acc3 = __SMLALDX(x1, c0, acc3);
 
-      /* Update state pointer for next state reading */
-      px += 4U;
-
       /* Decrement tap count */
       tapCnt--;
-
     }
 
     /* If the filter length is not a multiple of 4, compute the remaining filter taps.
-     ** This is always be 2 taps since the filter length is even. */
+       This is always be 2 taps since the filter length is even. */
     if ((numTaps & 0x3U) != 0U)
     {
-
       /* Read last two coefficients */
-      c0 = *__SIMD32(pb)++;
+      c0 = read_q15x2_ia ((q15_t **) &pb);
 
       /* Perform the multiply-accumulates */
       acc0 = __SMLALD(x0, c0, acc0);
@@ -466,7 +205,7 @@
 #endif
 
       /* Read last state variables */
-      x0 = *__SIMD32(px);
+      x0 = read_q15x2 (px);
 
       /* Perform the multiply-accumulates */
       acc1 = __SMLALDX(x1, c0, acc1);
@@ -482,37 +221,33 @@
       acc3 = __SMLALDX(x1, c0, acc3);
     }
 
-    /* The results in the 4 accumulators are in 2.30 format.  Convert to 1.15 with saturation.
-     ** Then store the 4 outputs in the destination buffer. */
-
+    /* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation.
+       Then store the 4 outputs in the destination buffer. */
 #ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
 #else
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN       */
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 4;
+    pState = pState + 4U;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining output samples */
   blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of taps */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     /* Copy two samples into state buffer */
@@ -529,33 +264,37 @@
 
     do
     {
-      acc0 += (q31_t) * px++ * *pb++;
-	  acc0 += (q31_t) * px++ * *pb++;
+      acc0 += (q31_t) *px++ * *pb++;
+	  acc0 += (q31_t) *px++ * *pb++;
+
       tapCnt--;
     }
     while (tapCnt > 0U);
 
-    /* The result is in 2.30 format.  Convert to 1.15 with saturation.
-     ** Then store the output in the destination buffer. */
+    /* The result is in 2.30 format. Convert to 1.15 with saturation.
+       Then store the output in the destination buffer. */
     *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
 
     /* Advance state pointer by 1 for the next sample */
     pState = pState + 1U;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
   /* Processing is complete.
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
-   ** This prepares the state buffer for the next function call. */
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
 
   /* Points to the start of the state buffer */
   pStateCurnt = S->pState;
 
-  /* Calculation of count for copying integer writes */
-  tapCnt = (numTaps - 1U) >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
 
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
   while (tapCnt > 0U)
   {
     *pStateCurnt++ = *pState++;
@@ -563,117 +302,31 @@
     *pStateCurnt++ = *pState++;
     *pStateCurnt++ = *pState++;
 
+    /* Decrement loop counter */
     tapCnt--;
-
   }
 
-  /* Calculation of count for remaining q15_t data */
+  /* Calculate remaining number of copies */
   tapCnt = (numTaps - 1U) % 0x4U;
 
-  /* copy remaining data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
+#else
 
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-}
-
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
-#else /* ARM_MATH_CM0_FAMILY */
-
-
-/* Run the below code for Cortex-M0 */
-
-void arm_fir_q15(
-  const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-
-
-
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q63_t acc;                                     /* Accumulator */
-  uint32_t numTaps = S->numTaps;                 /* Number of nTaps in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
-  /* Initialize blkCnt with blockSize */
-  blkCnt = blockSize;
-
-  while (blkCnt > 0U)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = pCoeffs;
-
-    tapCnt = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
-      acc += (q31_t) * px++ * *pb++;
-      tapCnt--;
-    } while (tapCnt > 0U);
-
-    /* The result is in 2.30 format.  Convert to 1.15
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q15_t) __SSAT((acc >> 15U), 16);
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the samples loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  /* Copy numTaps number of values */
+  /* Initialize tapCnt with number of taps */
   tapCnt = (numTaps - 1U);
 
-  /* copy data */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy remaining data */
   while (tapCnt > 0U)
   {
     *pStateCurnt++ = *pState++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     tapCnt--;
   }
 
 }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
-
-
-
 /**
- * @} end of FIR group
+  @} end of FIR group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_q31.c b/DSP/Source/FilteringFunctions/arm_fir_q31.c
index 4ca8295..c57371b 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_q31.c
  * Description:  Q31 FIR filter processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,80 +29,74 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR
- * @{
+  @addtogroup FIR
+  @{
  */
 
 /**
- * @param[in] *S points to an instance of the Q31 FIR filter structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process per call.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * Thus, if the accumulator result overflows it wraps around rather than clip.
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
- * After all multiply-accumulates are performed, the 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
- *
- * \par
- * Refer to the function <code>arm_fir_fast_q31()</code> for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.
+  @brief         Processing function for Q31 FIR filter.
+  @param[in]     S          points to an instance of the Q31 FIR filter structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clip.
+                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
+                   After all multiply-accumulates are performed, the 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
+
+ @remark
+                   Refer to \ref arm_fir_fast_q31() for a faster but less precise implementation of this filter.
  */
 
 void arm_fir_q31(
   const arm_fir_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q31_t *px;                                     /* Temporary pointer for state buffer */
+  const q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q63_t acc0;                                    /* Accumulator */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
 
-
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t x0, x1, x2;                              /* Temporary variables to hold state */
-  q31_t c0;                                      /* Temporary variable to hold coefficient value */
-  q31_t *px;                                     /* Temporary pointer for state */
-  q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q63_t acc0, acc1, acc2;                        /* Accumulators */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t i, tapCnt, blkCnt, tapCntN3;          /* Loop counters */
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc1, acc2;                              /* Accumulators */
+        q31_t x0, x1, x2;                              /* Temporary variables to hold state values */
+        q31_t c0;                                      /* Temporary variable to hold coefficient value */
+#endif
 
   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
   /* pStateCurnt points to the location where the new input data should be written */
   pStateCurnt = &(S->pState[(numTaps - 1U)]);
 
-  /* Apply loop unrolling and compute 4 output values simultaneously.
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 output values simultaneously.
    * The variables acc0 ... acc3 hold output values that are being computed:
    *
    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
    */
+
   blkCnt = blockSize / 3;
-  blockSize = blockSize - (3 * blkCnt);
 
-  tapCnt = numTaps / 3;
-  tapCntN3 = numTaps - (3 * tapCnt);
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* Copy three new input samples into the state buffer */
+    /* Copy 3 new input samples into the state buffer. */
     *pStateCurnt++ = *pSrc++;
     *pStateCurnt++ = *pSrc++;
     *pStateCurnt++ = *pSrc++;
@@ -118,15 +112,14 @@
     /* Initialize coefficient pointer */
     pb = pCoeffs;
 
-    /* Read the first two samples from the state buffer:
-     *  x[n-numTaps], x[n-numTaps-1] */
-    x0 = *(px++);
-    x1 = *(px++);
+    /* Read the first 2 samples from the state buffer: x[n-numTaps], x[n-numTaps-1] */
+    x0 = *px++;
+    x1 = *px++;
 
-    /* Loop unrolling.  Process 3 taps at a time. */
-    i = tapCnt;
+    /* Loop unrolling: process 3 taps at a time. */
+    tapCnt = numTaps / 3;
 
-    while (i > 0U)
+    while (tapCnt > 0U)
     {
       /* Read the b[numTaps] coefficient */
       c0 = *pb;
@@ -160,15 +153,14 @@
       acc1 += ((q63_t) x0 * c0);
       acc2 += ((q63_t) x1 * c0);
 
-      /* Decrement the loop counter */
-      i--;
+      /* Decrement loop counter */
+      tapCnt--;
     }
 
-    /* If the filter length is not a multiple of 3, compute the remaining filter taps */
+    /* Loop unrolling: Compute remaining outputs */
+    tapCnt = numTaps % 0x3U;
 
-    i = tapCntN3;
-
-    while (i > 0U)
+    while (tapCnt > 0U)
     {
       /* Read coefficients */
       c0 = *(pb++);
@@ -185,117 +177,39 @@
       x0 = x1;
       x1 = x2;
 
-      /* Decrement the loop counter */
-      i--;
+      /* Decrement loop counter */
+      tapCnt--;
     }
 
     /* Advance the state pointer by 3 to process the next group of 3 samples */
     pState = pState + 3;
 
-    /* The results in the 3 accumulators are in 2.30 format.  Convert to 1.31
-     ** Then store the 3 outputs in the destination buffer. */
+    /* The result is in 2.30 format. Convert to 1.31 and store in destination buffer. */
     *pDst++ = (q31_t) (acc0 >> 31U);
     *pDst++ = (q31_t) (acc1 >> 31U);
     *pDst++ = (q31_t) (acc2 >> 31U);
 
-    /* Decrement the samples loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 3, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-
-  while (blockSize > 0U)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = (pCoeffs);
-
-    i = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      acc0 += (q63_t) * (px++) * (*(pb++));
-      i--;
-    } while (i > 0U);
-
-    /* The result is in 2.62 format.  Convert to 1.31
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q31_t) (acc0 >> 31U);
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the samples loop counter */
-    blockSize--;
-  }
-
-  /* Processing is complete.
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  tapCnt = (numTaps - 1U) >> 2U;
-
-  /* copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1U) % 0x4U;
-
-  /* Copy the remaining q31_t data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
+  /* Loop unrolling: Compute remaining output samples */
+  blkCnt = blockSize % 0x3U;
 
 #else
 
-/* Run the below code for Cortex-M0 */
-
-  q31_t *px;                                     /* Temporary pointer for state */
-  q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q63_t acc;                                     /* Accumulator */
-  uint32_t numTaps = S->numTaps;                 /* Length of the filter */
-  uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
-  /* Initialize blkCnt with blockSize */
+  /* Initialize blkCnt with number of taps */
   blkCnt = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     /* Copy one sample at a time into state buffer */
     *pStateCurnt++ = *pSrc++;
 
     /* Set the accumulator to zero */
-    acc = 0;
+    acc0 = 0;
 
     /* Initialize state pointer */
     px = pState;
@@ -309,45 +223,66 @@
     do
     {
       /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
-      acc += (q63_t) * px++ * *pb++;
+      acc0 += (q63_t) *px++ * *pb++;
+
       i--;
     } while (i > 0U);
 
-    /* The result is in 2.62 format.  Convert to 1.31
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q31_t) (acc >> 31U);
+    /* Result is in 2.62 format. Convert to 1.31 and store in destination buffer. */
+    *pDst++ = (q31_t) (acc0 >> 31U);
 
     /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
+    pState = pState + 1U;
 
-    /* Decrement the samples loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
   /* Processing is complete.
-   ** Now copy the last numTaps - 1 samples to the starting of the state buffer.
-   ** This prepares the state buffer for the next function call. */
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
 
   /* Points to the start of the state buffer */
   pStateCurnt = S->pState;
 
-  /* Copy numTaps number of values */
-  tapCnt = numTaps - 1U;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* Copy the data */
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Calculate remaining number of copies */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy remaining data */
   while (tapCnt > 0U)
   {
     *pStateCurnt++ = *pState++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     tapCnt--;
   }
 
-
-#endif /*  #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of FIR group
+  @} end of FIR group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_q7.c b/DSP/Source/FilteringFunctions/arm_fir_q7.c
index 23e60ad..5f6d354 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_q7.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_q7.c
  * Description:  Q7 FIR filter processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,72 +29,70 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR
- * @{
+  @addtogroup FIR
+  @{
  */
 
 /**
- * @param[in]   *S points to an instance of the Q7 FIR filter structure.
- * @param[in]   *pSrc points to the block of input data.
- * @param[out]  *pDst points to the block of output data.
- * @param[in]   blockSize number of samples to process per call.
- * @return 	none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using a 32-bit internal accumulator.
- * Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result.
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
- * The accumulator is converted to 18.7 format by discarding the low 7 bits.
- * Finally, the result is truncated to 1.7 format.
+  @brief         Processing function for Q7 FIR filter.
+  @param[in]     S          points to an instance of the Q7 FIR filter structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result.
+                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   The accumulator is converted to 18.7 format by discarding the low 7 bits.
+                   Finally, the result is truncated to 1.7 format.
  */
 
 void arm_fir_q7(
   const arm_fir_instance_q7 * S,
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
 {
+        q7_t *pState = S->pState;                      /* State pointer */
+  const q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
+        q7_t *pStateCurnt;                             /* Points to the current sample of the state */
+        q7_t *px;                                      /* Temporary pointer for state buffer */
+  const q7_t *pb;                                      /* Temporary pointer for coefficient buffer */
+        q31_t acc0;                                    /* Accumulators */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
 
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t *pState = S->pState;                      /* State pointer */
-  q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
-  q7_t *pStateCurnt;                             /* Points to the current sample of the state */
-  q7_t x0, x1, x2, x3;                           /* Temporary variables to hold state */
-  q7_t c0;                                       /* Temporary variable to hold coefficient value */
-  q7_t *px;                                      /* Temporary pointer for state */
-  q7_t *pb;                                      /* Temporary pointer for coefficient buffer */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc1, acc2, acc3;                        /* Accumulators */
+        q7_t x0, x1, x2, x3, c0;                       /* Temporary variables to hold state */
+#endif
 
   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
   /* pStateCurnt points to the location where the new input data should be written */
   pStateCurnt = &(S->pState[(numTaps - 1U)]);
 
-  /* Apply loop unrolling and compute 4 output values simultaneously.
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 output values simultaneously.
    * The variables acc0 ... acc3 hold output values that are being computed:
    *
    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
    */
-  blkCnt = blockSize >> 2;
+  blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* Copy four new input samples into the state buffer */
+    /* Copy 4 new input samples into the state buffer. */
     *pStateCurnt++ = *pSrc++;
     *pStateCurnt++ = *pSrc++;
     *pStateCurnt++ = *pSrc++;
@@ -112,17 +110,18 @@
     /* Initialize coefficient pointer */
     pb = pCoeffs;
 
-    /* Read the first three samples from the state buffer:
+    /* Read the first 3 samples from the state buffer:
      *  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
-    x0 = *(px++);
-    x1 = *(px++);
-    x2 = *(px++);
+    x0 = *px++;
+    x1 = *px++;
+    x2 = *px++;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-    i = tapCnt;
+    /* Loop unrolling. Process 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
 
-    while (i > 0U)
+    /* Loop over the number of taps.  Unroll by a factor of 4.
+       Repeat until we've computed numTaps-4 coefficients. */
+    while (tapCnt > 0U)
     {
       /* Read the b[numTaps] coefficient */
       c0 = *pb;
@@ -182,14 +181,14 @@
       pb += 4U;
       px += 4U;
 
-      /* Decrement the loop counter */
-      i--;
+      /* Decrement loop counter */
+      tapCnt--;
     }
 
     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    tapCnt = numTaps % 0x4U;
 
-    i = numTaps - (tapCnt * 4U);
-    while (i > 0U)
+    while (tapCnt > 0U)
     {
       /* Read coefficients */
       c0 = *(pb++);
@@ -208,15 +207,12 @@
       x1 = x2;
       x2 = x3;
 
-      /* Decrement the loop counter */
-      i--;
+      /* Decrement loop counter */
+      tapCnt--;
     }
 
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 4;
-
-    /* The results in the 4 accumulators are in 2.62 format.  Convert to 1.31
-     ** Then store the 4 outputs in the destination buffer. */
+    /* The results in the 4 accumulators are in 2.62 format. Convert to 1.31
+       Then store the 4 outputs in the destination buffer. */
     acc0 = __SSAT((acc0 >> 7U), 8);
     *pDst++ = acc0;
     acc1 = __SSAT((acc1 >> 7U), 8);
@@ -226,14 +222,22 @@
     acc3 = __SSAT((acc3 >> 7U), 8);
     *pDst++ = acc3;
 
-    /* Decrement the samples loop counter */
+    /* Advance the state pointer by 4 to process the next group of 4 samples */
+    pState = pState + 4U;
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
+  /* Loop unrolling: Compute remaining output samples */
+  blkCnt = blockSize % 0x4U;
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 4U;
+#else
+
+  /* Initialize blkCnt with number of taps */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
@@ -247,7 +251,7 @@
     px = pState;
 
     /* Initialize Coefficient pointer */
-    pb = (pCoeffs);
+    pb = pCoeffs;
 
     i = numTaps;
 
@@ -258,27 +262,30 @@
       i--;
     } while (i > 0U);
 
-    /* The result is in 2.14 format.  Convert to 1.7
-     ** Then store the output in the destination buffer. */
+    /* The result is in 2.14 format. Convert to 1.7
+       Then store the output in the destination buffer. */
     *pDst++ = __SSAT((acc0 >> 7U), 8);
 
     /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
+    pState = pState + 1U;
 
-    /* Decrement the samples loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
   /* Processing is complete.
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
-   ** This prepares the state buffer for the next function call. */
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
 
   /* Points to the start of the state buffer */
   pStateCurnt = S->pState;
 
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time */
   tapCnt = (numTaps - 1U) >> 2U;
 
-  /* copy data */
+  /* Copy data */
   while (tapCnt > 0U)
   {
     *pStateCurnt++ = *pState++;
@@ -286,14 +293,21 @@
     *pStateCurnt++ = *pState++;
     *pStateCurnt++ = *pState++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     tapCnt--;
   }
 
   /* Calculate remaining number of copies */
   tapCnt = (numTaps - 1U) % 0x4U;
 
-  /* Copy the remaining q31_t data */
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy remaining data */
   while (tapCnt > 0U)
   {
     *pStateCurnt++ = *pState++;
@@ -302,84 +316,8 @@
     tapCnt--;
   }
 
-#else
-
-/* Run the below code for Cortex-M0 */
-
-  uint32_t numTaps = S->numTaps;                 /* Number of taps in the filter */
-  uint32_t i, blkCnt;                            /* Loop counters */
-  q7_t *pState = S->pState;                      /* State pointer */
-  q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
-  q7_t *px, *pb;                                 /* Temporary pointers to state and coeff */
-  q31_t acc = 0;                                 /* Accumlator */
-  q7_t *pStateCurnt;                             /* Points to the current sample of the state */
-
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1U);
-
-  /* Initialize blkCnt with blockSize */
-  blkCnt = blockSize;
-
-  /* Perform filtering upto BlockSize - BlockSize%4  */
-  while (blkCnt > 0U)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set accumulator to zero */
-    acc = 0;
-
-    /* Initialize state pointer of type q7 */
-    px = pState;
-
-    /* Initialize coeff pointer of type q7 */
-    pb = pCoeffs;
-
-
-    i = numTaps;
-
-    while (i > 0U)
-    {
-      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
-      acc += (q15_t) * px++ * *pb++;
-      i--;
-    }
-
-    /* Store the 1.7 format filter output in destination buffer */
-    *pDst++ = (q7_t) __SSAT((acc >> 7), 8);
-
-    /* Advance the state pointer by 1 to process the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
-   ** This prepares the state buffer for the next function call. */
-
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-
-  /* Copy numTaps number of values */
-  i = (numTaps - 1U);
-
-  /* Copy q7_t data */
-  while (i > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-    i--;
-  }
-
-#endif /*   #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of FIR group
+  @} end of FIR group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c b/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c
index bba2936..f44f037 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_sparse_f32.c
  * Description:  Floating-point sparse FIR filter processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,117 +29,111 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @defgroup FIR_Sparse Finite Impulse Response (FIR) Sparse Filters
- *
- * This group of functions implements sparse FIR filters.
- * Sparse FIR filters are equivalent to standard FIR filters except that most of the coefficients are equal to zero.
- * Sparse filters are used for simulating reflections in communications and audio applications.
- *
- * There are separate functions for Q7, Q15, Q31, and floating-point data types.
- * The functions operate on blocks  of input and output data and each call to the function processes
- * <code>blockSize</code> samples through the filter.  <code>pSrc</code> and
- * <code>pDst</code> points to input and output arrays respectively containing <code>blockSize</code> values.
- *
- * \par Algorithm:
- * The sparse filter instant structure contains an array of tap indices <code>pTapDelay</code> which specifies the locations of the non-zero coefficients.
- * This is in addition to the coefficient array <code>b</code>.
- * The implementation essentially skips the multiplications by zero and leads to an efficient realization.
- * <pre>
- *     y[n] = b[0] * x[n-pTapDelay[0]] + b[1] * x[n-pTapDelay[1]] + b[2] * x[n-pTapDelay[2]] + ...+ b[numTaps-1] * x[n-pTapDelay[numTaps-1]]
- * </pre>
- * \par
- * \image html FIRSparse.gif "Sparse FIR filter.  b[n] represents the filter coefficients"
- * \par
- * <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>;
- * <code>pTapDelay</code> points to an array of nonzero indices and is also of size <code>numTaps</code>;
- * <code>pState</code> points to a state array of size <code>maxDelay + blockSize</code>, where
- * <code>maxDelay</code> is the largest offset value that is ever used in the <code>pTapDelay</code> array.
- * Some of the processing functions also require temporary working buffers.
- *
- * \par Instance Structure
- * The coefficients and state variables for a filter are stored together in an instance data structure.
- * A separate instance structure must be defined for each filter.
- * Coefficient and offset arrays may be shared among several instances while state variable arrays cannot be shared.
- * There are separate instance structure declarations for each of the 4 supported data types.
- *
- * \par Initialization Functions
- * There is also an associated initialization function for each data type.
- * The initialization function performs the following operations:
- * - Sets the values of the internal structure fields.
- * - Zeros out the values in the state buffer.
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numTaps, pCoeffs, pTapDelay, maxDelay, stateIndex, pState. Also set all of the values in pState to zero.
- *
- * \par
- * Use of the initialization function is optional.
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
- * To place an instance structure into a const data section, the instance structure must be manually initialized.
- * Set the values in the state buffer to zeros before static initialization.
- * The code below statically initializes each of the 4 different data type filter instance structures
- * <pre>
- *arm_fir_sparse_instance_f32 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
- *arm_fir_sparse_instance_q31 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
- *arm_fir_sparse_instance_q15 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
- *arm_fir_sparse_instance_q7 S =  {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
- * </pre>
- * \par
- *
- * \par Fixed-Point Behavior
- * Care must be taken when using the fixed-point versions of the sparse FIR filter functions.
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
- * Refer to the function specific documentation below for usage guidelines.
+  @defgroup FIR_Sparse Finite Impulse Response (FIR) Sparse Filters
+
+  This group of functions implements sparse FIR filters.
+  Sparse FIR filters are equivalent to standard FIR filters except that most of the coefficients are equal to zero.
+  Sparse filters are used for simulating reflections in communications and audio applications.
+
+  There are separate functions for Q7, Q15, Q31, and floating-point data types.
+  The functions operate on blocks  of input and output data and each call to the function processes
+  <code>blockSize</code> samples through the filter.  <code>pSrc</code> and
+  <code>pDst</code> points to input and output arrays respectively containing <code>blockSize</code> values.
+
+  @par           Algorithm
+                   The sparse filter instant structure contains an array of tap indices <code>pTapDelay</code> which specifies the locations of the non-zero coefficients.
+                   This is in addition to the coefficient array <code>b</code>.
+                   The implementation essentially skips the multiplications by zero and leads to an efficient realization.
+  <pre>
+      y[n] = b[0] * x[n-pTapDelay[0]] + b[1] * x[n-pTapDelay[1]] + b[2] * x[n-pTapDelay[2]] + ...+ b[numTaps-1] * x[n-pTapDelay[numTaps-1]]
+  </pre>
+  @par
+                   \image html FIRSparse.gif "Sparse FIR filter.  b[n] represents the filter coefficients"
+  @par
+                   <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>;
+                   <code>pTapDelay</code> points to an array of nonzero indices and is also of size <code>numTaps</code>;
+                   <code>pState</code> points to a state array of size <code>maxDelay + blockSize</code>, where
+                   <code>maxDelay</code> is the largest offset value that is ever used in the <code>pTapDelay</code> array.
+                   Some of the processing functions also require temporary working buffers.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient and offset arrays may be shared among several instances while state variable arrays cannot be shared.
+                   There are separate instance structure declarations for each of the 4 supported data types.
+
+  @par           Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numTaps, pCoeffs, pTapDelay, maxDelay, stateIndex, pState. Also set all of the values in pState to zero.
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Set the values in the state buffer to zeros before static initialization.
+                   The code below statically initializes each of the 4 different data type filter instance structures
+  <pre>
+      arm_fir_sparse_instance_f32 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
+      arm_fir_sparse_instance_q31 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
+      arm_fir_sparse_instance_q15 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
+      arm_fir_sparse_instance_q7 S =  {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
+  </pre>
+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the fixed-point versions of the sparse FIR filter functions.
+                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+                   Refer to the function specific documentation below for usage guidelines.
  */
 
 /**
- * @addtogroup FIR_Sparse
- * @{
+  @addtogroup FIR_Sparse
+  @{
  */
 
 /**
- * @brief Processing function for the floating-point sparse FIR filter.
- * @param[in]  *S          points to an instance of the floating-point sparse FIR structure.
- * @param[in]  *pSrc       points to the block of input data.
- * @param[out] *pDst       points to the block of output data
- * @param[in]  *pScratchIn points to a temporary buffer of size blockSize.
- * @param[in]  blockSize   number of input samples to process per call.
- * @return none.
+  @brief         Processing function for the floating-point sparse FIR filter.
+  @param[in]     S           points to an instance of the floating-point sparse FIR structure
+  @param[in]     pSrc        points to the block of input data
+  @param[out]    pDst        points to the block of output data
+  @param[in]     pScratchIn  points to a temporary buffer of size blockSize
+  @param[in]     blockSize   number of input samples to process
+  @return        none
  */
 
 void arm_fir_sparse_f32(
-  arm_fir_sparse_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  float32_t * pScratchIn,
-  uint32_t blockSize)
+        arm_fir_sparse_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        float32_t * pScratchIn,
+        uint32_t blockSize)
 {
-
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *px;                                 /* Scratch buffer pointer */
-  float32_t *py = pState;                        /* Temporary pointers for state buffer */
-  float32_t *pb = pScratchIn;                    /* Temporary pointers for scratch buffer */
-  float32_t *pOut;                               /* Destination pointer */
-  int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-  uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-  uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
-  int32_t readIndex;                             /* Read index of the state buffer */
-  uint32_t tapCnt, blkCnt;                       /* loop counters */
-  float32_t coeff = *pCoeffs++;                  /* Read the first coefficient value */
-
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *px;                                 /* Scratch buffer pointer */
+        float32_t *py = pState;                        /* Temporary pointers for state buffer */
+        float32_t *pb = pScratchIn;                    /* Temporary pointers for scratch buffer */
+        float32_t *pOut;                               /* Destination pointer */
+        int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
+        uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
+        uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
+        int32_t readIndex;                             /* Read index of the state buffer */
+        uint32_t tapCnt, blkCnt;                       /* loop counters */
+        float32_t coeff = *pCoeffs++;                  /* Read the first coefficient value */
 
 
   /* BlockSize of Input samples are copied into the state buffer */
   /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1,
-                        (int32_t *) pSrc, 1, blockSize);
-
+  arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1, (int32_t *) pSrc, 1, blockSize);
 
   /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
+  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
 
   /* Wraparound of readIndex */
   if (readIndex < 0)
@@ -152,46 +146,51 @@
 
   /* blockSize samples are read from the state buffer */
   arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                       (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                       blockSize);
+                       (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
 
-  /* Working pointer for the scratch buffer */
+  /* Working pointer for the scratch buffer of state values */
   px = pb;
 
-  /* Working pointer for destination buffer */
+  /* Working pointer for scratch buffer of output values */
   pOut = pDst;
 
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Loop over the blockSize. Unroll by a factor of 4.
-   * Compute 4 Multiplications at a time. */
+  /* Loop unrolling: Compute 4 outputs at a time. */
   blkCnt = blockSize >> 2U;
 
   while (blkCnt > 0U)
   {
     /* Perform Multiplications and store in destination buffer */
     *pOut++ = *px++ * coeff;
-    *pOut++ = *px++ * coeff;
-    *pOut++ = *px++ * coeff;
+
     *pOut++ = *px++ * coeff;
 
-    /* Decrement the loop counter */
+    *pOut++ = *px++ * coeff;
+
+    *pOut++ = *px++ * coeff;
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4,
-   * compute the remaining samples */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
-    /* Perform Multiplications and store in destination buffer */
+    /* Perform Multiplication and store in destination buffer */
     *pOut++ = *px++ * coeff;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
@@ -200,7 +199,7 @@
   coeff = *pCoeffs++;
 
   /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
+  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
 
   /* Wraparound of readIndex */
   if (readIndex < 0)
@@ -213,169 +212,56 @@
 
   while (tapCnt > 0U)
   {
-
     /* Working pointer for state buffer is updated */
     py = pState;
 
     /* blockSize samples are read from the state buffer */
     arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                         (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                         blockSize);
+                         (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
 
-    /* Working pointer for the scratch buffer */
+    /* Working pointer for the scratch buffer of state values */
     px = pb;
 
-    /* Working pointer for destination buffer */
+    /* Working pointer for scratch buffer of output values */
     pOut = pDst;
 
-    /* Loop over the blockSize. Unroll by a factor of 4.
-     * Compute 4 MACS at a time. */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time. */
     blkCnt = blockSize >> 2U;
 
     while (blkCnt > 0U)
     {
       /* Perform Multiply-Accumulate */
       *pOut++ += *px++ * coeff;
-      *pOut++ += *px++ * coeff;
-      *pOut++ += *px++ * coeff;
+
       *pOut++ += *px++ * coeff;
 
-      /* Decrement the loop counter */
+      *pOut++ += *px++ * coeff;
+
+      *pOut++ += *px++ * coeff;
+
+      /* Decrement loop counter */
       blkCnt--;
     }
 
-    /* If the blockSize is not a multiple of 4,
-     * compute the remaining samples */
+    /* Loop unrolling: Compute remaining outputs */
     blkCnt = blockSize % 0x4U;
 
-    while (blkCnt > 0U)
-    {
-      /* Perform Multiply-Accumulate */
-      *pOut++ += *px++ * coeff;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = ((int32_t) S->stateIndex -
-                 (int32_t) blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if (readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-
-	/* Compute last tap without the final read of pTapDelay */
-
-	/* Working pointer for state buffer is updated */
-	py = pState;
-
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-											 (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-											 blockSize);
-
-	/* Working pointer for the scratch buffer */
-	px = pb;
-
-	/* Working pointer for destination buffer */
-	pOut = pDst;
-
-	/* Loop over the blockSize. Unroll by a factor of 4.
-	 * Compute 4 MACS at a time. */
-	blkCnt = blockSize >> 2U;
-
-	while (blkCnt > 0U)
-	{
-		/* Perform Multiply-Accumulate */
-		*pOut++ += *px++ * coeff;
-		*pOut++ += *px++ * coeff;
-		*pOut++ += *px++ * coeff;
-		*pOut++ += *px++ * coeff;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-	/* If the blockSize is not a multiple of 4,
-	 * compute the remaining samples */
-	blkCnt = blockSize % 0x4U;
-
-	while (blkCnt > 0U)
-	{
-		/* Perform Multiply-Accumulate */
-		*pOut++ += *px++ * coeff;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
 #else
 
-/* Run the below code for Cortex-M0 */
-
-  blkCnt = blockSize;
-
-  while (blkCnt > 0U)
-  {
-    /* Perform Multiplications and store in destination buffer */
-    *pOut++ = *px++ * coeff;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if (readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2U;
-
-  while (tapCnt > 0U)
-  {
-
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                         (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                         blockSize);
-
-    /* Working pointer for the scratch buffer */
-    px = pb;
-
-    /* Working pointer for destination buffer */
-    pOut = pDst;
-
+    /* Initialize blkCnt with number of samples */
     blkCnt = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (blkCnt > 0U)
     {
       /* Perform Multiply-Accumulate */
       *pOut++ += *px++ * coeff;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
@@ -384,8 +270,7 @@
     coeff = *pCoeffs++;
 
     /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex =
-      ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
+    readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
 
     /* Wraparound of readIndex */
     if (readIndex < 0)
@@ -393,41 +278,64 @@
       readIndex += (int32_t) delaySize;
     }
 
-    /* Decrement the tap loop counter */
+    /* Decrement tap loop counter */
     tapCnt--;
   }
 
-	/* Compute last tap without the final read of pTapDelay */
+  /* Compute last tap without the final read of pTapDelay */
 
-	/* Working pointer for state buffer is updated */
-	py = pState;
+  /* Working pointer for state buffer is updated */
+  py = pState;
 
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-											 (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-											 blockSize);
+  /* blockSize samples are read from the state buffer */
+  arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
+                       (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
 
-	/* Working pointer for the scratch buffer */
-	px = pb;
+  /* Working pointer for the scratch buffer of state values */
+  px = pb;
 
-	/* Working pointer for destination buffer */
-	pOut = pDst;
+  /* Working pointer for scratch buffer of output values */
+  pOut = pDst;
 
-	blkCnt = blockSize;
 
-	while (blkCnt > 0U)
-	{
-		/* Perform Multiply-Accumulate */
-		*pOut++ += *px++ * coeff;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
 
-#endif /*   #if defined (ARM_MATH_DSP)        */
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiply-Accumulate */
+    *pOut++ += *px++ * coeff;
+    *pOut++ += *px++ * coeff;
+    *pOut++ += *px++ * coeff;
+    *pOut++ += *px++ * coeff;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiply-Accumulate */
+    *pOut++ += *px++ * coeff;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
 
 }
 
 /**
- * @} end of FIR_Sparse group
+  @} end of FIR_Sparse group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c b/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c
index d663679..7745e71 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_sparse_init_f32.c
  * Description:  Floating-point sparse FIR filter initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,43 +29,42 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR_Sparse
- * @{
+  @addtogroup FIR_Sparse
+  @{
  */
 
 /**
- * @brief  Initialization function for the floating-point sparse FIR filter.
- * @param[in,out] *S         points to an instance of the floating-point sparse FIR structure.
- * @param[in]     numTaps    number of nonzero coefficients in the filter.
- * @param[in]     *pCoeffs   points to the array of filter coefficients.
- * @param[in]     *pState    points to the state buffer.
- * @param[in]     *pTapDelay points to the array of offset times.
- * @param[in]     maxDelay   maximum offset time supported.
- * @param[in]     blockSize  number of samples that will be processed per block.
- * @return none
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
- * <code>pState</code> holds the filter's state variables and must be of length
- * <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
- * is the maximum number of delay line values.
- * <code>blockSize</code> is the
- * number of samples processed by the <code>arm_fir_sparse_f32()</code> function.
+  @brief         Initialization function for the floating-point sparse FIR filter.
+  @param[in,out] S          points to an instance of the floating-point sparse FIR structure
+  @param[in]     numTaps    number of nonzero coefficients in the filter
+  @param[in]     pCoeffs    points to the array of filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     pTapDelay  points to the array of offset times
+  @param[in]     maxDelay   maximum offset time supported
+  @param[in]     blockSize  number of samples that will be processed per block
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
+                   <code>pState</code> holds the filter's state variables and must be of length
+                   <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
+                   is the maximum number of delay line values.
+                   <code>blockSize</code> is the 
+                   number of samples processed by the <code>arm_fir_sparse_f32()</code> function.
  */
 
 void arm_fir_sparse_init_f32(
-  arm_fir_sparse_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize)
+        arm_fir_sparse_instance_f32 * S,
+        uint16_t numTaps,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize)
 {
   /* Assign filter taps */
   S->numTaps = numTaps;
@@ -87,9 +86,8 @@
 
   /* Assign state pointer */
   S->pState = pState;
-
 }
 
 /**
- * @} end of FIR_Sparse group
+  @} end of FIR_Sparse group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c b/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c
index 08c2d0e..d07d611 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_sparse_init_q15.c
  * Description:  Q15 sparse FIR filter initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,43 +29,42 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR_Sparse
- * @{
+  @addtogroup FIR_Sparse
+  @{
  */
 
 /**
- * @brief  Initialization function for the Q15 sparse FIR filter.
- * @param[in,out] *S         points to an instance of the Q15 sparse FIR structure.
- * @param[in]     numTaps    number of nonzero coefficients in the filter.
- * @param[in]     *pCoeffs   points to the array of filter coefficients.
- * @param[in]     *pState    points to the state buffer.
- * @param[in]     *pTapDelay points to the array of offset times.
- * @param[in]     maxDelay   maximum offset time supported.
- * @param[in]     blockSize  number of samples that will be processed per block.
- * @return none
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
- * <code>pState</code> holds the filter's state variables and must be of length
- * <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
- * is the maximum number of delay line values.
- * <code>blockSize</code> is the
- * number of words processed by <code>arm_fir_sparse_q15()</code> function.
+  @brief         Initialization function for the Q15 sparse FIR filter.
+  @param[in,out] S          points to an instance of the Q15 sparse FIR structure
+  @param[in]     numTaps    number of nonzero coefficients in the filter
+  @param[in]     pCoeffs    points to the array of filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     pTapDelay  points to the array of offset times
+  @param[in]     maxDelay   maximum offset time supported
+  @param[in]     blockSize  number of samples that will be processed per block
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
+                   <code>pState</code> holds the filter's state variables and must be of length
+                   <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
+                   is the maximum number of delay line values.
+                   <code>blockSize</code> is the
+                   number of words processed by <code>arm_fir_sparse_q15()</code> function.
  */
 
 void arm_fir_sparse_init_q15(
-  arm_fir_sparse_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize)
+        arm_fir_sparse_instance_q15 * S,
+        uint16_t numTaps,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize)
 {
   /* Assign filter taps */
   S->numTaps = numTaps;
@@ -87,9 +86,8 @@
 
   /* Assign state pointer */
   S->pState = pState;
-
 }
 
 /**
- * @} end of FIR_Sparse group
+  @} end of FIR_Sparse group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c b/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c
index 4a94232..7c32cea 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_sparse_init_q31.c
  * Description:  Q31 sparse FIR filter initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,42 +29,41 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR_Sparse
- * @{
+  @addtogroup FIR_Sparse
+  @{
  */
 
 /**
- * @brief  Initialization function for the Q31 sparse FIR filter.
- * @param[in,out] *S         points to an instance of the Q31 sparse FIR structure.
- * @param[in]     numTaps    number of nonzero coefficients in the filter.
- * @param[in]     *pCoeffs   points to the array of filter coefficients.
- * @param[in]     *pState    points to the state buffer.
- * @param[in]     *pTapDelay points to the array of offset times.
- * @param[in]     maxDelay   maximum offset time supported.
- * @param[in]     blockSize  number of samples that will be processed per block.
- * @return none
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
- * <code>pState</code> holds the filter's state variables and must be of length
- * <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
- * is the maximum number of delay line values.
- * <code>blockSize</code> is the number of words processed by <code>arm_fir_sparse_q31()</code> function.
+  @brief         Initialization function for the Q31 sparse FIR filter.
+  @param[in,out] S          points to an instance of the Q31 sparse FIR structure
+  @param[in]     numTaps    number of nonzero coefficients in the filter
+  @param[in]     pCoeffs    points to the array of filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     pTapDelay  points to the array of offset times
+  @param[in]     maxDelay   maximum offset time supported
+  @param[in]     blockSize  number of samples that will be processed per block
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
+                   <code>pState</code> holds the filter's state variables and must be of length
+                   <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
+                   is the maximum number of delay line values.
+                   <code>blockSize</code> is the number of words processed by <code>arm_fir_sparse_q31()</code> function.
  */
 
 void arm_fir_sparse_init_q31(
-  arm_fir_sparse_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize)
+        arm_fir_sparse_instance_q31 * S,
+        uint16_t numTaps,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize)
 {
   /* Assign filter taps */
   S->numTaps = numTaps;
@@ -86,9 +85,8 @@
 
   /* Assign state pointer */
   S->pState = pState;
-
 }
 
 /**
- * @} end of FIR_Sparse group
+  @} end of FIR_Sparse group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c b/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c
index 58d6705..98153f3 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_sparse_init_q7.c
  * Description:  Q7 sparse FIR filter initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,43 +29,42 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR_Sparse
- * @{
+  @addtogroup FIR_Sparse
+  @{
  */
 
 /**
- * @brief  Initialization function for the Q7 sparse FIR filter.
- * @param[in,out] *S         points to an instance of the Q7 sparse FIR structure.
- * @param[in]     numTaps    number of nonzero coefficients in the filter.
- * @param[in]     *pCoeffs   points to the array of filter coefficients.
- * @param[in]     *pState    points to the state buffer.
- * @param[in]     *pTapDelay points to the array of offset times.
- * @param[in]     maxDelay   maximum offset time supported.
- * @param[in]     blockSize  number of samples that will be processed per block.
- * @return none
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
- * <code>pState</code> holds the filter's state variables and must be of length
- * <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
- * is the maximum number of delay line values.
- * <code>blockSize</code> is the
- * number of samples processed by the <code>arm_fir_sparse_q7()</code> function.
+  @brief         Initialization function for the Q7 sparse FIR filter.
+  @param[in,out] S          points to an instance of the Q7 sparse FIR structure
+  @param[in]     numTaps    number of nonzero coefficients in the filter
+  @param[in]     pCoeffs    points to the array of filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     pTapDelay  points to the array of offset times
+  @param[in]     maxDelay   maximum offset time supported
+  @param[in]     blockSize  number of samples that will be processed per block
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
+                   <code>pState</code> holds the filter's state variables and must be of length
+                   <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
+                   is the maximum number of delay line values.
+                   <code>blockSize</code> is the
+                   number of samples processed by the <code>arm_fir_sparse_q7()</code> function.
  */
 
 void arm_fir_sparse_init_q7(
-  arm_fir_sparse_instance_q7 * S,
-  uint16_t numTaps,
-  q7_t * pCoeffs,
-  q7_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize)
+        arm_fir_sparse_instance_q7 * S,
+        uint16_t numTaps,
+  const q7_t * pCoeffs,
+        q7_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize)
 {
   /* Assign filter taps */
   S->numTaps = numTaps;
@@ -87,9 +86,8 @@
 
   /* Assign state pointer */
   S->pState = pState;
-
 }
 
 /**
- * @} end of FIR_Sparse group
+  @} end of FIR_Sparse group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c b/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c
index e17f2bd..9cea93e 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_sparse_q15.c
  * Description:  Q15 sparse FIR filter processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,72 +29,68 @@
 #include "arm_math.h"
 
 /**
- * @addtogroup FIR_Sparse
- * @{
+  @ingroup groupFilters
  */
 
 /**
- * @brief Processing function for the Q15 sparse FIR filter.
- * @param[in]  *S           points to an instance of the Q15 sparse FIR structure.
- * @param[in]  *pSrc        points to the block of input data.
- * @param[out] *pDst        points to the block of output data
- * @param[in]  *pScratchIn  points to a temporary buffer of size blockSize.
- * @param[in]  *pScratchOut points to a temporary buffer of size blockSize.
- * @param[in]  blockSize    number of input samples to process per call.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 32-bit accumulator.
- * The 1.15 x 1.15 multiplications yield a 2.30 result and these are added to a 2.30 accumulator.
- * Thus the full precision of the multiplications is maintained but there is only a single guard bit in the accumulator.
- * If the accumulator result overflows it will wrap around rather than saturate.
- * After all multiply-accumulates are performed, the 2.30 accumulator is truncated to 2.15 format and then saturated to 1.15 format.
- * In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.
+  @addtogroup FIR_Sparse
+  @{
  */
 
+/**
+  @brief         Processing function for the Q15 sparse FIR filter.
+  @param[in]     S           points to an instance of the Q15 sparse FIR structure
+  @param[in]     pSrc        points to the block of input data
+  @param[out]    pDst        points to the block of output data
+  @param[in]     pScratchIn  points to a temporary buffer of size blockSize
+  @param[in]     pScratchOut points to a temporary buffer of size blockSize
+  @param[in]     blockSize   number of input samples to process per call
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 32-bit accumulator.
+                   The 1.15 x 1.15 multiplications yield a 2.30 result and these are added to a 2.30 accumulator.
+                   Thus the full precision of the multiplications is maintained but there is only a single guard bit in the accumulator.
+                   If the accumulator result overflows it will wrap around rather than saturate.
+                   After all multiply-accumulates are performed, the 2.30 accumulator is truncated to 2.15 format and then saturated to 1.15 format.
+                   In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.
+ */
 
 void arm_fir_sparse_q15(
-  arm_fir_sparse_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  q15_t * pScratchIn,
-  q31_t * pScratchOut,
-  uint32_t blockSize)
+        arm_fir_sparse_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        q15_t * pScratchIn,
+        q31_t * pScratchOut,
+        uint32_t blockSize)
 {
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *px;                                     /* Temporary pointers for scratch buffer */
+        q15_t *py = pState;                            /* Temporary pointers for state buffer */
+        q15_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
+        q15_t *pOut = pDst;                            /* Working pointer for output */
+        int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
+        uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
+        uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
+        int32_t readIndex;                             /* Read index of the state buffer */
+        uint32_t tapCnt, blkCnt;                       /* loop counters */
+        q31_t *pScr2 = pScratchOut;                    /* Working pointer for scratch buffer of output values */
+        q15_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
 
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pIn = pSrc;                             /* Working pointer for input */
-  q15_t *pOut = pDst;                            /* Working pointer for output */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *px;                                     /* Temporary pointers for scratch buffer */
-  q15_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
-  q15_t *py = pState;                            /* Temporary pointers for state buffer */
-  int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-  uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-  uint16_t numTaps = S->numTaps;                 /* Filter order */
-  int32_t readIndex;                             /* Read index of the state buffer */
-  uint32_t tapCnt, blkCnt;                       /* loop counters */
-  q15_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
-  q31_t *pScr2 = pScratchOut;                    /* Working pointer for pScratchOut */
-
-
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in1, in2;                                /* Temporary variables */
-
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t in1, in2;                                /* Temporary variables */
+#endif
 
   /* BlockSize of Input samples are copied into the state buffer */
   /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_q15(py, delaySize, &S->stateIndex, 1, pIn, 1, blockSize);
+  arm_circularWrite_q15(py, (int32_t) delaySize, &S->stateIndex, 1,pSrc, 1, blockSize);
 
   /* Loop over the number of taps. */
   tapCnt = numTaps;
 
   /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
+  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
 
   /* Wraparound of readIndex */
   if (readIndex < 0)
@@ -106,8 +102,8 @@
   py = pState;
 
   /* blockSize samples are read from the state buffer */
-  arm_circularRead_q15(py, delaySize, &readIndex, 1,
-                       pb, pb, blockSize, 1, blockSize);
+  arm_circularRead_q15(py, (int32_t) delaySize, &readIndex, 1,
+                       pb, pb, (int32_t) blockSize, 1, blockSize);
 
   /* Working pointer for the scratch buffer of state values */
   px = pb;
@@ -115,32 +111,40 @@
   /* Working pointer for scratch buffer of output values */
   pScratchOut = pScr2;
 
-  /* Loop over the blockSize. Unroll by a factor of 4.
-   * Compute 4 multiplications at a time. */
-  blkCnt = blockSize >> 2;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
 
   while (blkCnt > 0U)
   {
     /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4,
-   * compute the remaining samples */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
+    /* Perform Multiplication and store in the scratch buffer */
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
@@ -149,7 +153,7 @@
   coeff = *pCoeffs++;
 
   /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
+  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
 
   /* Wraparound of readIndex */
   if (readIndex < 0)
@@ -166,8 +170,8 @@
     py = pState;
 
     /* blockSize samples are read from the state buffer */
-    arm_circularRead_q15(py, delaySize, &readIndex, 1,
-                         pb, pb, blockSize, 1, blockSize);
+    arm_circularRead_q15(py, (int32_t) delaySize, &readIndex, 1,
+                         pb, pb, (int32_t) blockSize, 1, blockSize);
 
     /* Working pointer for the scratch buffer of state values */
     px = pb;
@@ -175,32 +179,40 @@
     /* Working pointer for scratch buffer of output values */
     pScratchOut = pScr2;
 
-    /* Loop over the blockSize. Unroll by a factor of 4.
-     * Compute 4 MACS at a time. */
-    blkCnt = blockSize >> 2;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time. */
+    blkCnt = blockSize >> 2U;
 
     while (blkCnt > 0U)
     {
       /* Perform Multiply-Accumulate */
-      *pScratchOut++ += (q31_t) * px++ * coeff;
-      *pScratchOut++ += (q31_t) * px++ * coeff;
-      *pScratchOut++ += (q31_t) * px++ * coeff;
-      *pScratchOut++ += (q31_t) * px++ * coeff;
+      *pScratchOut++ += (q31_t) *px++ * coeff;
+      *pScratchOut++ += (q31_t) *px++ * coeff;
+      *pScratchOut++ += (q31_t) *px++ * coeff;
+      *pScratchOut++ += (q31_t) *px++ * coeff;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
-    /* If the blockSize is not a multiple of 4,
-     * compute the remaining samples */
+    /* Loop unrolling: Compute remaining outputs */
     blkCnt = blockSize % 0x4U;
 
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (blkCnt > 0U)
     {
       /* Perform Multiply-Accumulate */
-      *pScratchOut++ += (q31_t) * px++ * coeff;
+      *pScratchOut++ += (q31_t) *px++ * coeff;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
@@ -209,7 +221,7 @@
     coeff = *pCoeffs++;
 
     /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
+    readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
 
     /* Wraparound of readIndex */
     if (readIndex < 0)
@@ -217,136 +229,18 @@
       readIndex += (int32_t) delaySize;
     }
 
-    /* Decrement the tap loop counter */
+    /* Decrement loop counter */
     tapCnt--;
   }
 
-	/* Compute last tap without the final read of pTapDelay */
-
-	/* Working pointer for state buffer is updated */
-	py = pState;
-
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_q15(py, delaySize, &readIndex, 1,
-											 pb, pb, blockSize, 1, blockSize);
-
-	/* Working pointer for the scratch buffer of state values */
-	px = pb;
-
-	/* Working pointer for scratch buffer of output values */
-	pScratchOut = pScr2;
-
-	/* Loop over the blockSize. Unroll by a factor of 4.
-	 * Compute 4 MACS at a time. */
-	blkCnt = blockSize >> 2;
-
-	while (blkCnt > 0U)
-	{
-		/* Perform Multiply-Accumulate */
-		*pScratchOut++ += (q31_t) * px++ * coeff;
-		*pScratchOut++ += (q31_t) * px++ * coeff;
-		*pScratchOut++ += (q31_t) * px++ * coeff;
-		*pScratchOut++ += (q31_t) * px++ * coeff;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-	/* If the blockSize is not a multiple of 4,
-	 * compute the remaining samples */
-	blkCnt = blockSize % 0x4U;
-
-	while (blkCnt > 0U)
-	{
-		/* Perform Multiply-Accumulate */
-		*pScratchOut++ += (q31_t) * px++ * coeff;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-  /* All the output values are in pScratchOut buffer.
-     Convert them into 1.15 format, saturate and store in the destination buffer. */
-  /* Loop over the blockSize. */
-  blkCnt = blockSize >> 2;
-
-  while (blkCnt > 0U)
-  {
-    in1 = *pScr2++;
-    in2 = *pScr2++;
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pOut)++ =
-      __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16),
-              16);
-
-#else
-    *__SIMD32(pOut)++ =
-      __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16),
-              16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-    in1 = *pScr2++;
-
-    in2 = *pScr2++;
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pOut)++ =
-      __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16),
-              16);
-
-#else
-
-    *__SIMD32(pOut)++ =
-      __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16),
-              16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-
-    blkCnt--;
-
-  }
-
-  /* If the blockSize is not a multiple of 4,
-     remaining samples are processed in the below loop */
-  blkCnt = blockSize % 0x4U;
-
-  while (blkCnt > 0U)
-  {
-    *pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16);
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_q15(py, delaySize, &S->stateIndex, 1, pIn, 1, blockSize);
-
-  /* Loop over the number of taps. */
-  tapCnt = numTaps;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if (readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
+  /* Compute last tap without the final read of pTapDelay */
 
   /* Working pointer for state buffer is updated */
   py = pState;
 
   /* blockSize samples are read from the state buffer */
-  arm_circularRead_q15(py, delaySize, &readIndex, 1,
-                       pb, pb, blockSize, 1, blockSize);
+  arm_circularRead_q15(py, (int32_t) delaySize, &readIndex, 1,
+                       pb, pb, (int32_t) blockSize, 1, blockSize);
 
   /* Working pointer for the scratch buffer of state values */
   px = pb;
@@ -354,117 +248,94 @@
   /* Working pointer for scratch buffer of output values */
   pScratchOut = pScr2;
 
-  blkCnt = blockSize;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
 
   while (blkCnt > 0U)
   {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
+    /* Perform Multiply-Accumulate */
+    *pScratchOut++ += (q31_t) *px++ * coeff;
+    *pScratchOut++ += (q31_t) *px++ * coeff;
+    *pScratchOut++ += (q31_t) *px++ * coeff;
+    *pScratchOut++ += (q31_t) *px++ * coeff;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* Load the coefficient value and
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
 
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
+#else
 
-  /* Wraparound of readIndex */
-  if (readIndex < 0)
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
   {
-    readIndex += (int32_t) delaySize;
+    /* Perform Multiply-Accumulate */
+    *pScratchOut++ += (q31_t) *px++ * coeff;
+
+    /* Decrement loop counter */
+    blkCnt--;
   }
 
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2U;
-
-  while (tapCnt > 0U)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_q15(py, delaySize, &readIndex, 1,
-                         pb, pb, blockSize, 1, blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pScratchOut = pScr2;
-
-    blkCnt = blockSize;
-
-    while (blkCnt > 0U)
-    {
-      /* Perform Multiply-Accumulate */
-      *pScratchOut++ += (q31_t) * px++ * coeff;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if (readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-
-	/* Compute last tap without the final read of pTapDelay */
-
-	/* Working pointer for state buffer is updated */
-	py = pState;
-
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_q15(py, delaySize, &readIndex, 1,
-											 pb, pb, blockSize, 1, blockSize);
-
-	/* Working pointer for the scratch buffer of state values */
-	px = pb;
-
-	/* Working pointer for scratch buffer of output values */
-	pScratchOut = pScr2;
-
-	blkCnt = blockSize;
-
-	while (blkCnt > 0U)
-	{
-		/* Perform Multiply-Accumulate */
-		*pScratchOut++ += (q31_t) * px++ * coeff;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
   /* All the output values are in pScratchOut buffer.
      Convert them into 1.15 format, saturate and store in the destination buffer. */
-  /* Loop over the blockSize. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    in1 = *pScr2++;
+    in2 = *pScr2++;
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16), 16));
+#else
+    write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    in1 = *pScr2++;
+    in2 = *pScr2++;
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16), 16));
+#else
+    write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     *pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16);
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#endif /*   #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of FIR_Sparse group
+  @} end of FIR_Sparse group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c b/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c
index e441716..86d3e1d 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_sparse_q31.c
  * Description:  Q31 sparse FIR filter processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -28,52 +28,53 @@
 
 #include "arm_math.h"
 
-
 /**
- * @addtogroup FIR_Sparse
- * @{
+  @ingroup groupFilters
  */
 
 /**
- * @brief Processing function for the Q31 sparse FIR filter.
- * @param[in]  *S          points to an instance of the Q31 sparse FIR structure.
- * @param[in]  *pSrc       points to the block of input data.
- * @param[out] *pDst       points to the block of output data
- * @param[in]  *pScratchIn points to a temporary buffer of size blockSize.
- * @param[in]  blockSize   number of input samples to process per call.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 32-bit accumulator.
- * The 1.31 x 1.31 multiplications are truncated to 2.30 format.
- * This leads to loss of precision on the intermediate multiplications and provides only a single guard bit.
- * If the accumulator result overflows, it wraps around rather than saturate.
- * In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.
+  @addtogroup FIR_Sparse
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 sparse FIR filter.
+  @param[in]     S           points to an instance of the Q31 sparse FIR structure
+  @param[in]     pSrc        points to the block of input data
+  @param[out]    pDst        points to the block of output data
+  @param[in]     pScratchIn  points to a temporary buffer of size blockSize
+  @param[in]     blockSize   number of input samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 32-bit accumulator.
+                   The 1.31 x 1.31 multiplications are truncated to 2.30 format.
+                   This leads to loss of precision on the intermediate multiplications and provides only a single guard bit.
+                   If the accumulator result overflows, it wraps around rather than saturate.
+                   In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.
  */
 
 void arm_fir_sparse_q31(
-  arm_fir_sparse_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  q31_t * pScratchIn,
-  uint32_t blockSize)
+        arm_fir_sparse_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        q31_t * pScratchIn,
+        uint32_t blockSize)
 {
-
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *px;                                     /* Scratch buffer pointer */
-  q31_t *py = pState;                            /* Temporary pointers for state buffer */
-  q31_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
-  q31_t *pOut;                                   /* Destination pointer */
-  q63_t out;                                     /* Temporary output variable */
-  int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-  uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-  uint16_t numTaps = S->numTaps;                 /* Filter order */
-  int32_t readIndex;                             /* Read index of the state buffer */
-  uint32_t tapCnt, blkCnt;                       /* loop counters */
-  q31_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
-  q31_t in;
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *px;                                     /* Scratch buffer pointer */
+        q31_t *py = pState;                            /* Temporary pointers for state buffer */
+        q31_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
+        q31_t *pOut;                                   /* Destination pointer */
+        int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
+        uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
+        uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
+        int32_t readIndex;                             /* Read index of the state buffer */
+        uint32_t tapCnt, blkCnt;                       /* loop counters */
+        q31_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
+        q31_t in;
+        q63_t out;                                     /* Temporary output variable */
 
 
   /* BlockSize of Input samples are copied into the state buffer */
@@ -95,8 +96,7 @@
 
   /* blockSize samples are read from the state buffer */
   arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                       (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                       blockSize);
+                       (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
 
   /* Working pointer for the scratch buffer of state values */
   px = pb;
@@ -105,233 +105,42 @@
   pOut = pDst;
 
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Loop over the blockSize. Unroll by a factor of 4.
-   * Compute 4 Multiplications at a time. */
-  blkCnt = blockSize >> 2;
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
 
   while (blkCnt > 0U)
   {
-    /* Perform Multiplications and store in the destination buffer */
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
+    /* Perform Multiplications and store in destination buffer */
+    *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
 
-    /* Decrement the loop counter */
+    *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
+
+    *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
+
+    *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4,
-   * compute the remaining samples */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    /* Perform Multiplications and store in the destination buffer */
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if (readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2U;
-
-  while (tapCnt > 0U)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                         (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                         blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pOut = pDst;
-
-    /* Loop over the blockSize. Unroll by a factor of 4.
-     * Compute 4 MACS at a time. */
-    blkCnt = blockSize >> 2;
-
-    while (blkCnt > 0U)
-    {
-      out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4,
-     * compute the remaining samples */
-    blkCnt = blockSize % 0x4U;
-
-    while (blkCnt > 0U)
-    {
-      /* Perform Multiply-Accumulate */
-      out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if (readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-
-	/* Compute last tap without the final read of pTapDelay */
-
-	/* Working pointer for state buffer is updated */
-	py = pState;
-
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-											 (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-											 blockSize);
-
-	/* Working pointer for the scratch buffer of state values */
-	px = pb;
-
-	/* Working pointer for scratch buffer of output values */
-	pOut = pDst;
-
-	/* Loop over the blockSize. Unroll by a factor of 4.
-	 * Compute 4 MACS at a time. */
-	blkCnt = blockSize >> 2;
-
-	while (blkCnt > 0U)
-	{
-		out = *pOut;
-		out += ((q63_t) * px++ * coeff) >> 32;
-		*pOut++ = (q31_t) (out);
-
-		out = *pOut;
-		out += ((q63_t) * px++ * coeff) >> 32;
-		*pOut++ = (q31_t) (out);
-
-		out = *pOut;
-		out += ((q63_t) * px++ * coeff) >> 32;
-		*pOut++ = (q31_t) (out);
-
-		out = *pOut;
-		out += ((q63_t) * px++ * coeff) >> 32;
-		*pOut++ = (q31_t) (out);
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-	/* If the blockSize is not a multiple of 4,
-	 * compute the remaining samples */
-	blkCnt = blockSize % 0x4U;
-
-	while (blkCnt > 0U)
-	{
-		/* Perform Multiply-Accumulate */
-		out = *pOut;
-		out += ((q63_t) * px++ * coeff) >> 32;
-		*pOut++ = (q31_t) (out);
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-  /* Working output pointer is updated */
-  pOut = pDst;
-
-  /* Output is converted into 1.31 format. */
-  /* Loop over the blockSize. Unroll by a factor of 4.
-   * process 4 output samples at a time. */
-  blkCnt = blockSize >> 2;
-
-  while (blkCnt > 0U)
-  {
-    in = *pOut << 1;
-    *pOut++ = in;
-    in = *pOut << 1;
-    *pOut++ = in;
-    in = *pOut << 1;
-    *pOut++ = in;
-    in = *pOut << 1;
-    *pOut++ = in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4,
-   * process the remaining output samples */
-  blkCnt = blockSize % 0x4U;
-
-  while (blkCnt > 0U)
-  {
-    in = *pOut << 1;
-    *pOut++ = in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
-    /* Perform Multiplications and store in the destination buffer */
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
+    /* Perform Multiplication and store in destination buffer */
+    *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
@@ -358,8 +167,7 @@
 
     /* blockSize samples are read from the state buffer */
     arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                         (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                         blockSize);
+                         (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
 
     /* Working pointer for the scratch buffer of state values */
     px = pb;
@@ -367,16 +175,53 @@
     /* Working pointer for scratch buffer of output values */
     pOut = pDst;
 
-    blkCnt = blockSize;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time. */
+    blkCnt = blockSize >> 2U;
 
     while (blkCnt > 0U)
     {
       /* Perform Multiply-Accumulate */
       out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
+      out += ((q63_t) *px++ * coeff) >> 32;
       *pOut++ = (q31_t) (out);
 
-      /* Decrement the loop counter */
+      out = *pOut;
+      out += ((q63_t) *px++ * coeff) >> 32;
+      *pOut++ = (q31_t) (out);
+
+      out = *pOut;
+      out += ((q63_t) *px++ * coeff) >> 32;
+      *pOut++ = (q31_t) (out);
+
+      out = *pOut;
+      out += ((q63_t) *px++ * coeff) >> 32;
+      *pOut++ = (q31_t) (out);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = blockSize % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* Perform Multiply-Accumulate */
+      out = *pOut;
+      out += ((q63_t) *px++ * coeff) >> 32;
+      *pOut++ = (q31_t) (out);
+
+      /* Decrement loop counter */
       blkCnt--;
     }
 
@@ -393,58 +238,120 @@
       readIndex += (int32_t) delaySize;
     }
 
-    /* Decrement the tap loop counter */
+    /* Decrement tap loop counter */
     tapCnt--;
   }
 
-	/* Compute last tap without the final read of pTapDelay */
+  /* Compute last tap without the final read of pTapDelay */
 
-	/* Working pointer for state buffer is updated */
-	py = pState;
+  /* Working pointer for state buffer is updated */
+  py = pState;
 
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-											 (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-											 blockSize);
+  /* blockSize samples are read from the state buffer */
+  arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
+                       (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
 
-	/* Working pointer for the scratch buffer of state values */
-	px = pb;
+  /* Working pointer for the scratch buffer of state values */
+  px = pb;
 
-	/* Working pointer for scratch buffer of output values */
-	pOut = pDst;
+  /* Working pointer for scratch buffer of output values */
+  pOut = pDst;
 
-	blkCnt = blockSize;
 
-	while (blkCnt > 0U)
-	{
-		/* Perform Multiply-Accumulate */
-		out = *pOut;
-		out += ((q63_t) * px++ * coeff) >> 32;
-		*pOut++ = (q31_t) (out);
+#if defined (ARM_MATH_LOOPUNROLL)
 
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiply-Accumulate */
+    out = *pOut;
+    out += ((q63_t) * px++ * coeff) >> 32;
+    *pOut++ = (q31_t) (out);
+
+    out = *pOut;
+    out += ((q63_t) * px++ * coeff) >> 32;
+    *pOut++ = (q31_t) (out);
+
+    out = *pOut;
+    out += ((q63_t) * px++ * coeff) >> 32;
+    *pOut++ = (q31_t) (out);
+
+    out = *pOut;
+    out += ((q63_t) * px++ * coeff) >> 32;
+    *pOut++ = (q31_t) (out);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiply-Accumulate */
+    out = *pOut;
+    out += ((q63_t) *px++ * coeff) >> 32;
+    *pOut++ = (q31_t) (out);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
 
   /* Working output pointer is updated */
   pOut = pDst;
 
   /* Output is converted into 1.31 format. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    in = *pOut << 1;
+    *pOut++ = in;
+    in = *pOut << 1;
+    *pOut++ = in;
+    in = *pOut << 1;
+    *pOut++ = in;
+    in = *pOut << 1;
+    *pOut++ = in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
     in = *pOut << 1;
     *pOut++ = in;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#endif /*   #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of FIR_Sparse group
+  @} end of FIR_Sparse group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c b/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c
index c1b4ce3..7a2b57f 100644
--- a/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c
+++ b/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_fir_sparse_q7.c
  * Description:  Q7 sparse FIR filter processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -28,78 +28,70 @@
 
 #include "arm_math.h"
 
-
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup FIR_Sparse
- * @{
+  @addtogroup FIR_Sparse
+  @{
  */
 
-
 /**
- * @brief Processing function for the Q7 sparse FIR filter.
- * @param[in]  *S           points to an instance of the Q7 sparse FIR structure.
- * @param[in]  *pSrc        points to the block of input data.
- * @param[out] *pDst        points to the block of output data
- * @param[in]  *pScratchIn  points to a temporary buffer of size blockSize.
- * @param[in]  *pScratchOut points to a temporary buffer of size blockSize.
- * @param[in]  blockSize    number of input samples to process per call.
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using a 32-bit internal accumulator.
- * Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result.
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
- * The accumulator is then converted to 18.7 format by discarding the low 7 bits.
- * Finally, the result is truncated to 1.7 format.
+  @brief         Processing function for the Q7 sparse FIR filter.
+  @param[in]     S           points to an instance of the Q7 sparse FIR structure
+  @param[in]     pSrc        points to the block of input data
+  @param[out]    pDst        points to the block of output data
+  @param[in]     pScratchIn  points to a temporary buffer of size blockSize
+  @param[in]     pScratchOut points to a temporary buffer of size blockSize
+  @param[in]     blockSize   number of input samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result.
+                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   The accumulator is then converted to 18.7 format by discarding the low 7 bits.
+                   Finally, the result is truncated to 1.7 format.
  */
 
 void arm_fir_sparse_q7(
-  arm_fir_sparse_instance_q7 * S,
-  q7_t * pSrc,
-  q7_t * pDst,
-  q7_t * pScratchIn,
-  q31_t * pScratchOut,
-  uint32_t blockSize)
+        arm_fir_sparse_instance_q7 * S,
+  const q7_t * pSrc,
+        q7_t * pDst,
+        q7_t * pScratchIn,
+        q31_t * pScratchOut,
+        uint32_t blockSize)
 {
+        q7_t *pState = S->pState;                      /* State pointer */
+  const q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
+        q7_t *px;                                      /* Scratch buffer pointer */
+        q7_t *py = pState;                             /* Temporary pointers for state buffer */
+        q7_t *pb = pScratchIn;                         /* Temporary pointers for scratch buffer */
+        q7_t *pOut = pDst;                             /* Destination pointer */
+        int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
+        uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
+        uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
+        int32_t readIndex;                             /* Read index of the state buffer */
+        uint32_t tapCnt, blkCnt;                       /* loop counters */
+        q31_t *pScr2 = pScratchOut;                    /* Working pointer for scratch buffer of output values */
+        q31_t in;
+        q7_t coeff = *pCoeffs++;                       /* Read the coefficient value */
 
-  q7_t *pState = S->pState;                      /* State pointer */
-  q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
-  q7_t *px;                                      /* Scratch buffer pointer */
-  q7_t *py = pState;                             /* Temporary pointers for state buffer */
-  q7_t *pb = pScratchIn;                         /* Temporary pointers for scratch buffer */
-  q7_t *pOut = pDst;                             /* Destination pointer */
-  int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-  uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-  uint16_t numTaps = S->numTaps;                 /* Filter order */
-  int32_t readIndex;                             /* Read index of the state buffer */
-  uint32_t tapCnt, blkCnt;                       /* loop counters */
-  q7_t coeff = *pCoeffs++;                       /* Read the coefficient value */
-  q31_t *pScr2 = pScratchOut;                    /* Working pointer for scratch buffer of output values */
-  q31_t in;
-
-
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t in1, in2, in3, in4;
+#if defined (ARM_MATH_LOOPUNROLL)
+        q7_t in1, in2, in3, in4;
+#endif
 
   /* BlockSize of Input samples are copied into the state buffer */
   /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1,
-                       blockSize);
+  arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1, blockSize);
 
   /* Loop over the number of taps. */
   tapCnt = numTaps;
 
   /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
+  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
 
   /* Wraparound of readIndex */
   if (readIndex < 0)
@@ -111,8 +103,8 @@
   py = pState;
 
   /* blockSize samples are read from the state buffer */
-  arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
-                      (int32_t) blockSize, 1, blockSize);
+  arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1,
+                   pb, pb, (int32_t) blockSize, 1, blockSize);
 
   /* Working pointer for the scratch buffer of state values */
   px = pb;
@@ -120,32 +112,40 @@
   /* Working pointer for scratch buffer of output values */
   pScratchOut = pScr2;
 
-  /* Loop over the blockSize. Unroll by a factor of 4.
-   * Compute 4 multiplications at a time. */
-  blkCnt = blockSize >> 2;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
 
   while (blkCnt > 0U)
   {
     /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4,
-   * compute the remaining samples */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
+    /* Perform Multiplication and store in the scratch buffer */
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
@@ -154,7 +154,7 @@
   coeff = *pCoeffs++;
 
   /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
+  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
 
   /* Wraparound of readIndex */
   if (readIndex < 0)
@@ -171,8 +171,8 @@
     py = pState;
 
     /* blockSize samples are read from the state buffer */
-    arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
-                        (int32_t) blockSize, 1, blockSize);
+    arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1,
+                        pb, pb, (int32_t) blockSize, 1, blockSize);
 
     /* Working pointer for the scratch buffer of state values */
     px = pb;
@@ -180,9 +180,11 @@
     /* Working pointer for scratch buffer of output values */
     pScratchOut = pScr2;
 
-    /* Loop over the blockSize. Unroll by a factor of 4.
-     * Compute 4 MACS at a time. */
-    blkCnt = blockSize >> 2;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time. */
+    blkCnt = blockSize >> 2U;
 
     while (blkCnt > 0U)
     {
@@ -196,21 +198,27 @@
       in = *pScratchOut + ((q31_t) * px++ * coeff);
       *pScratchOut++ = in;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
-    /* If the blockSize is not a multiple of 4,
-     * compute the remaining samples */
+    /* Loop unrolling: Compute remaining outputs */
     blkCnt = blockSize % 0x4U;
 
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (blkCnt > 0U)
     {
       /* Perform Multiply-Accumulate */
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
+      in = *pScratchOut + ((q31_t) *px++ * coeff);
       *pScratchOut++ = in;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
@@ -219,8 +227,7 @@
     coeff = *pCoeffs++;
 
     /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = ((int32_t) S->stateIndex -
-                 (int32_t) blockSize) - *pTapDelay++;
+    readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
 
     /* Wraparound of readIndex */
     if (readIndex < 0)
@@ -228,63 +235,73 @@
       readIndex += (int32_t) delaySize;
     }
 
-    /* Decrement the tap loop counter */
+    /* Decrement loop counter */
     tapCnt--;
   }
 
-	/* Compute last tap without the final read of pTapDelay */
+  /* Compute last tap without the final read of pTapDelay */
 
-	/* Working pointer for state buffer is updated */
-	py = pState;
+  /* Working pointer for state buffer is updated */
+  py = pState;
 
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
-											(int32_t) blockSize, 1, blockSize);
+  /* blockSize samples are read from the state buffer */
+  arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1,
+                      pb, pb, (int32_t) blockSize, 1, blockSize);
 
-	/* Working pointer for the scratch buffer of state values */
-	px = pb;
+  /* Working pointer for the scratch buffer of state values */
+  px = pb;
 
-	/* Working pointer for scratch buffer of output values */
-	pScratchOut = pScr2;
+  /* Working pointer for scratch buffer of output values */
+  pScratchOut = pScr2;
 
-	/* Loop over the blockSize. Unroll by a factor of 4.
-	 * Compute 4 MACS at a time. */
-	blkCnt = blockSize >> 2;
 
-	while (blkCnt > 0U)
-	{
-		/* Perform Multiply-Accumulate */
-		in = *pScratchOut + ((q31_t) * px++ * coeff);
-		*pScratchOut++ = in;
-		in = *pScratchOut + ((q31_t) * px++ * coeff);
-		*pScratchOut++ = in;
-		in = *pScratchOut + ((q31_t) * px++ * coeff);
-		*pScratchOut++ = in;
-		in = *pScratchOut + ((q31_t) * px++ * coeff);
-		*pScratchOut++ = in;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
 
-	/* If the blockSize is not a multiple of 4,
-	 * compute the remaining samples */
-	blkCnt = blockSize % 0x4U;
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiply-Accumulate */
+    in = *pScratchOut + ((q31_t) *px++ * coeff);
+    *pScratchOut++ = in;
+    in = *pScratchOut + ((q31_t) *px++ * coeff);
+    *pScratchOut++ = in;
+    in = *pScratchOut + ((q31_t) *px++ * coeff);
+    *pScratchOut++ = in;
+    in = *pScratchOut + ((q31_t) *px++ * coeff);
+    *pScratchOut++ = in;
 
-	while (blkCnt > 0U)
-	{
-		/* Perform Multiply-Accumulate */
-		in = *pScratchOut + ((q31_t) * px++ * coeff);
-		*pScratchOut++ = in;
+    /* Decrement loop counter */
+    blkCnt--;
+  }
 
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiply-Accumulate */
+    in = *pScratchOut + ((q31_t) *px++ * coeff);
+    *pScratchOut++ = in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
 
   /* All the output values are in pScratchOut buffer.
      Convert them into 1.15 format, saturate and store in the destination buffer. */
-  /* Loop over the blockSize. */
-  blkCnt = blockSize >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
 
   while (blkCnt > 0U)
   {
@@ -293,177 +310,32 @@
     in3 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
     in4 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
 
-    *__SIMD32(pOut)++ = __PACKq7(in1, in2, in3, in4);
+    write_q7x4_ia (&pOut, __PACKq7(in1, in2, in3, in4));
 
-    /* Decrement the blockSize loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4,
-     remaining samples are processed in the below loop */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    *pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1,
-                       blockSize);
-
-  /* Loop over the number of taps. */
-  tapCnt = numTaps;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if (readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
-                      (int32_t) blockSize, 1, blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pScratchOut = pScr2;
-
-  /* Loop over the blockSize */
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-  while (blkCnt > 0U)
-  {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if (readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2U;
-
-  while (tapCnt > 0U)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
-                        (int32_t) blockSize, 1, blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pScratchOut = pScr2;
-
-    /* Loop over the blockSize */
-    blkCnt = blockSize;
-
-    while (blkCnt > 0U)
-    {
-      /* Perform Multiply-Accumulate */
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
-      *pScratchOut++ = in;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex =
-      ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if (readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-
-	/* Compute last tap without the final read of pTapDelay */
-
-	/* Working pointer for state buffer is updated */
-	py = pState;
-
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
-											(int32_t) blockSize, 1, blockSize);
-
-	/* Working pointer for the scratch buffer of state values */
-	px = pb;
-
-	/* Working pointer for scratch buffer of output values */
-	pScratchOut = pScr2;
-
-	/* Loop over the blockSize */
-	blkCnt = blockSize;
-
-	while (blkCnt > 0U)
-	{
-		/* Perform Multiply-Accumulate */
-		in = *pScratchOut + ((q31_t) * px++ * coeff);
-		*pScratchOut++ = in;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-  /* All the output values are in pScratchOut buffer.
-     Convert them into 1.15 format, saturate and store in the destination buffer. */
-  /* Loop over the blockSize. */
-  blkCnt = blockSize;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     *pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8);
 
-    /* Decrement the blockSize loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#endif /*   #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of FIR_Sparse group
+  @} end of FIR_Sparse group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c b/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c
index 424be38..c48efe3 100644
--- a/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_iir_lattice_f32.c
  * Description:  Floating-point IIR Lattice filter processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,120 +29,118 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @defgroup IIR_Lattice Infinite Impulse Response (IIR) Lattice Filters
- *
- * This set of functions implements lattice filters
- * for Q15, Q31 and floating-point data types.  Lattice filters are used in a
- * variety of adaptive filter applications.  The filter structure has feedforward and
- * feedback components and the net impulse response is infinite length.
- * The functions operate on blocks
- * of input and output data and each call to the function processes
- * <code>blockSize</code> samples through the filter.  <code>pSrc</code> and
- * <code>pDst</code> point to input and output arrays containing <code>blockSize</code> values.
+  @defgroup IIR_Lattice Infinite Impulse Response (IIR) Lattice Filters
 
- * \par Algorithm:
- * \image html IIRLattice.gif "Infinite Impulse Response Lattice filter"
- * <pre>
- *    fN(n)   =  x(n)
- *    fm-1(n) = fm(n) - km * gm-1(n-1)   for m = N, N-1, ...1
- *    gm(n)   = km * fm-1(n) + gm-1(n-1) for m = N, N-1, ...1
- *    y(n)    = vN * gN(n) + vN-1 * gN-1(n) + ...+ v0 * g0(n)
- * </pre>
- * \par
- * <code>pkCoeffs</code> points to array of reflection coefficients of size <code>numStages</code>.
- * Reflection coefficients are stored in time-reversed order.
- * \par
- * <pre>
- *    {kN, kN-1, ....k1}
- * </pre>
- * <code>pvCoeffs</code> points to the array of ladder coefficients of size <code>(numStages+1)</code>.
- * Ladder coefficients are stored in time-reversed order.
- * \par
- * <pre>
- *    {vN, vN-1, ...v0}
- * </pre>
- * <code>pState</code> points to a state array of size <code>numStages + blockSize</code>.
- * The state variables shown in the figure above (the g values) are stored in the <code>pState</code> array.
- * The state variables are updated after each block of data is processed; the coefficients are untouched.
- * \par Instance Structure
- * The coefficients and state variables for a filter are stored together in an instance data structure.
- * A separate instance structure must be defined for each filter.
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
- * There are separate instance structure declarations for each of the 3 supported data types.
-  *
- * \par Initialization Functions
- * There is also an associated initialization function for each data type.
- * The initialization function performs the following operations:
- * - Sets the values of the internal structure fields.
- * - Zeros out the values in the state buffer.
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numStages, pkCoeffs, pvCoeffs, pState. Also set all of the values in pState to zero.
- *
- * \par
- * Use of the initialization function is optional.
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
- * To place an instance structure into a const data section, the instance structure must be manually initialized.
- * Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:
- * <pre>
- *arm_iir_lattice_instance_f32 S = {numStages, pState, pkCoeffs, pvCoeffs};
- *arm_iir_lattice_instance_q31 S = {numStages, pState, pkCoeffs, pvCoeffs};
- *arm_iir_lattice_instance_q15 S = {numStages, pState, pkCoeffs, pvCoeffs};
- * </pre>
- * \par
- * where <code>numStages</code> is the number of stages in the filter; <code>pState</code> points to the state buffer array;
- * <code>pkCoeffs</code> points to array of the reflection coefficients; <code>pvCoeffs</code> points to the array of ladder coefficients.
- * \par Fixed-Point Behavior
- * Care must be taken when using the fixed-point versions of the IIR lattice filter functions.
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
- * Refer to the function specific documentation below for usage guidelines.
+  This set of functions implements lattice filters
+  for Q15, Q31 and floating-point data types.  Lattice filters are used in a
+  variety of adaptive filter applications. The filter structure has feedforward and
+  feedback components and the net impulse response is infinite length.
+  The functions operate on blocks
+  of input and output data and each call to the function processes
+  <code>blockSize</code> samples through the filter.  <code>pSrc</code> and
+  <code>pDst</code> point to input and output arrays containing <code>blockSize</code> values.
+
+  @par           Algorithm
+                   \image html IIRLattice.gif "Infinite Impulse Response Lattice filter"
+  @par
+  <pre>
+      fN(n)   = x(n)
+      fm-1(n) = fm(n) - km * gm-1(n-1)   for m = N, N-1, ..., 1
+      gm(n)   = km * fm-1(n) + gm-1(n-1) for m = N, N-1, ..., 1
+      y(n)    = vN * gN(n) + vN-1 * gN-1(n) + ...+ v0 * g0(n)
+  </pre>
+  @par
+                   <code>pkCoeffs</code> points to array of reflection coefficients of size <code>numStages</code>.
+                   Reflection Coefficients are stored in time-reversed order.
+  @par
+  <pre>
+     {kN, kN-1, ..., k1}
+  </pre>
+  @par
+                  <code>pvCoeffs</code> points to the array of ladder coefficients of size <code>(numStages+1)</code>.
+                  Ladder coefficients are stored in time-reversed order.
+  <pre>
+      {vN, vN-1, ..., v0}
+  </pre>
+  @par
+                   <code>pState</code> points to a state array of size <code>numStages + blockSize</code>.
+                   The state variables shown in the figure above (the g values) are stored in the <code>pState</code> array.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+
+  @par           Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numStages, pkCoeffs, pvCoeffs, pState. Also set all of the values in pState to zero.
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:
+  <pre>
+      arm_iir_lattice_instance_f32 S = {numStages, pState, pkCoeffs, pvCoeffs};
+      arm_iir_lattice_instance_q31 S = {numStages, pState, pkCoeffs, pvCoeffs};
+      arm_iir_lattice_instance_q15 S = {numStages, pState, pkCoeffs, pvCoeffs};
+  </pre>
+  @par
+                   where <code>numStages</code> is the number of stages in the filter; <code>pState</code> points to the state buffer array;
+                   <code>pkCoeffs</code> points to array of the reflection coefficients; <code>pvCoeffs</code> points to the array of ladder coefficients.
+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the fixed-point versions of the IIR lattice filter functions.
+                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+                   Refer to the function specific documentation below for usage guidelines.
  */
 
 /**
- * @addtogroup IIR_Lattice
- * @{
+  @addtogroup IIR_Lattice
+  @{
  */
 
 /**
- * @brief Processing function for the floating-point IIR lattice filter.
- * @param[in] *S points to an instance of the floating-point IIR lattice structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- * @return none.
+  @brief         Processing function for the floating-point IIR lattice filter.
+  @param[in]     S          points to an instance of the floating-point IIR lattice structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
  */
 
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
 void arm_iir_lattice_f32(
   const arm_iir_lattice_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t fnext1, gcurr1, gnext;               /* Temporary variables for lattice stages */
-  float32_t acc;                                 /* Accumlator */
-  uint32_t blkCnt, tapCnt;                       /* temporary variables for counts */
-  float32_t *px1, *px2, *pk, *pv;                /* temporary pointers for state and coef */
-  uint32_t numStages = S->numStages;             /* number of stages */
-  float32_t *pState;                             /* State pointer */
-  float32_t *pStateCurnt;                        /* State current pointer */
-  float32_t k1, k2;
-  float32_t v1, v2, v3, v4;
-  float32_t gcurr2;
-  float32_t fnext2;
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{       
+        float32_t *pState = S->pState;                   /* State pointer */
+        float32_t *pStateCur;                            /* State current pointer */
+        float32_t acc;                                   /* Accumlator */
+        float32_t fnext1, fnext2, gcurr1, gnext;         /* Temporary variables for lattice stages */
+        float32_t *px1, *px2, *pk, *pv;                  /* Temporary pointers for state and coef */
+        uint32_t numStages = S->numStages;               /* Number of stages */
+        uint32_t blkCnt, tapCnt;                         /* Temporary variables for counts */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        float32_t gcurr2;                                /* Temporary variables for lattice stages */
+        float32_t k1, k2;
+        float32_t v1, v2, v3, v4;
+#endif
 
   /* initialise loop count */
   blkCnt = blockSize;
 
-  /* initialise state pointer */
-  pState = &S->pState[0];
-
   /* Sample processing */
   while (blkCnt > 0U)
   {
@@ -152,19 +150,23 @@
 
     /* Initialize Ladder coeff pointer */
     pv = &S->pvCoeffs[0];
+
     /* Initialize Reflection coeff pointer */
     pk = &S->pkCoeffs[0];
 
     /* Initialize state read pointer */
     px1 = pState;
+
     /* Initialize state write pointer */
     px2 = pState;
 
     /* Set accumulator to zero */
     acc = 0.0;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = (numStages) >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = (numStages) >> 2U;
 
     while (tapCnt > 0U)
     {
@@ -259,12 +261,19 @@
       px1 += 4U;
       pv += 4U;
 
+      /* Decrement loop counter */
       tapCnt--;
-
     }
 
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = (numStages) % 0x4U;
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numStages % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numStages;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
     while (tapCnt > 0U)
     {
@@ -277,8 +286,8 @@
       *px2++ = gnext;
       fnext2 = fnext1;
 
+      /* Decrement loop counter */
       tapCnt--;
-
     }
 
     /* y(n) += g0(n) * v0 */
@@ -292,144 +301,54 @@
     /* Advance the state pointer by 4 to process the next group of 4 samples */
     pState = pState + 1U;
 
+    /* Decrement loop counter */
     blkCnt--;
-
   }
 
   /* Processing is complete. Now copy last S->numStages samples to start of the buffer
      for the preperation of next frame process */
 
   /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
+  pStateCur = &S->pState[0];
   pState = &S->pState[blockSize];
 
+  /* Copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
   tapCnt = numStages >> 2U;
 
-  /* copy data */
   while (tapCnt > 0U)
   {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
 
-    /* Decrement the loop counter */
-    tapCnt--;
-
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numStages) % 0x4U;
-
-  /* Copy the remaining q31_t data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     tapCnt--;
   }
-}
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = numStages % 0x4U;
 
 #else
 
-void arm_iir_lattice_f32(
-  const arm_iir_lattice_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t fcurr, fnext = 0, gcurr, gnext;      /* Temporary variables for lattice stages */
-  float32_t acc;                                 /* Accumlator */
-  uint32_t blkCnt, tapCnt;                       /* temporary variables for counts */
-  float32_t *px1, *px2, *pk, *pv;                /* temporary pointers for state and coef */
-  uint32_t numStages = S->numStages;             /* number of stages */
-  float32_t *pState;                             /* State pointer */
-  float32_t *pStateCurnt;                        /* State current pointer */
-
-
-  /* Run the below code for Cortex-M0 */
-
-  blkCnt = blockSize;
-
-  pState = &S->pState[0];
-
-  /* Sample processing */
-  while (blkCnt > 0U)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize state read pointer */
-    px1 = pState;
-    /* Initialize state write pointer */
-    px2 = pState;
-    /* Set accumulator to zero */
-    acc = 0.0f;
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-
-    /* Process sample for numStages */
-    tapCnt = numStages;
-
-    while (tapCnt > 0U)
-    {
-      gcurr = *px1++;
-      /* Process sample for last taps */
-      fnext = fcurr - ((*pk) * gcurr);
-      gnext = (fnext * (*pk++)) + gcurr;
-
-      /* Output samples for last taps */
-      acc += (gnext * (*pv++));
-      *px2++ = gnext;
-      fcurr = fnext;
-
-      /* Decrementing loop counter */
-      tapCnt--;
-
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += (fnext * (*pv));
-
-    *px2++ = fnext;
-
-    /* write out into pDst */
-    *pDst++ = acc;
-
-    /* Advance the state pointer by 1 to process the next group of samples */
-    pState = pState + 1U;
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer
-     for the preperation of next frame process */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
-  pState = &S->pState[blockSize];
-
+  /* Initialize blkCnt with number of samples */
   tapCnt = numStages;
 
-  /* Copy the data */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (tapCnt > 0U)
   {
-    *pStateCurnt++ = *pState++;
+    *pStateCur++ = *pState++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     tapCnt--;
   }
 
 }
 
-#endif /*   #if defined (ARM_MATH_DSP) */
-
-
 /**
- * @} end of IIR_Lattice group
+  @} end of IIR_Lattice group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c b/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c
index 530c7ff..bd9f933 100644
--- a/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_iir_lattice_init_f32.c
  * Description:  Floating-point IIR lattice filter initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,23 +29,23 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup IIR_Lattice
- * @{
+  @addtogroup IIR_Lattice
+  @{
  */
 
 /**
- * @brief Initialization function for the floating-point IIR lattice filter.
- * @param[in] *S points to an instance of the floating-point IIR lattice structure.
- * @param[in] numStages number of stages in the filter.
- * @param[in] *pkCoeffs points to the reflection coefficient buffer.  The array is of length numStages.
- * @param[in] *pvCoeffs points to the ladder coefficient buffer.  The array is of length numStages+1.
- * @param[in] *pState points to the state buffer.  The array is of length numStages+blockSize.
- * @param[in] blockSize number of samples to process.
- * @return none.
+  @brief         Initialization function for the floating-point IIR lattice filter.
+  @param[in]     S          points to an instance of the floating-point IIR lattice structure
+  @param[in]     numStages  number of stages in the filter
+  @param[in]     pkCoeffs   points to reflection coefficient buffer.  The array is of length numStages
+  @param[in]     pvCoeffs   points to ladder coefficient buffer.  The array is of length numStages+1
+  @param[in]     pState     points to state buffer.  The array is of length numStages+blockSize
+  @param[in]     blockSize  number of samples to process
+  @return        none
  */
 
 void arm_iir_lattice_init_f32(
@@ -70,10 +70,8 @@
 
   /* Assign state pointer */
   S->pState = pState;
-
-
 }
 
-  /**
-   * @} end of IIR_Lattice group
-   */
+/**
+  @} end of IIR_Lattice group
+ */
diff --git a/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c b/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c
index 9b991f8..01abf48 100644
--- a/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_iir_lattice_init_q15.c
  * Description:  Q15 IIR lattice filter initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,24 +29,24 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup IIR_Lattice
- * @{
+  @addtogroup IIR_Lattice
+  @{
  */
 
-  /**
-   * @brief Initialization function for the Q15 IIR lattice filter.
-   * @param[in] *S points to an instance of the Q15 IIR lattice structure.
-   * @param[in] numStages  number of stages in the filter.
-   * @param[in] *pkCoeffs points to reflection coefficient buffer.  The array is of length numStages.
-   * @param[in] *pvCoeffs points to ladder coefficient buffer.  The array is of length numStages+1.
-   * @param[in] *pState points to state buffer.  The array is of length numStages+blockSize.
-   * @param[in] blockSize number of samples to process per call.
-   * @return none.
-   */
+/**
+  @brief     Initialization function for the Q15 IIR lattice filter.
+  @param[in] S          points to an instance of the Q15 IIR lattice structure
+  @param[in] numStages  number of stages in the filter
+  @param[in] pkCoeffs   points to reflection coefficient buffer.  The array is of length numStages
+  @param[in] pvCoeffs   points to ladder coefficient buffer.  The array is of length numStages+1
+  @param[in] pState     points to state buffer.  The array is of length numStages+blockSize
+  @param[in] blockSize  number of samples to process
+  @return        none
+ */
 
 void arm_iir_lattice_init_q15(
   arm_iir_lattice_instance_q15 * S,
@@ -70,10 +70,8 @@
 
   /* Assign state pointer */
   S->pState = pState;
-
-
 }
 
 /**
- * @} end of IIR_Lattice group
+  @} end of IIR_Lattice group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c b/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c
index 1543206..b472f6c 100644
--- a/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_iir_lattice_init_q31.c
  * Description:  Initialization function for the Q31 IIR lattice filter
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,24 +29,24 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup IIR_Lattice
- * @{
+  @addtogroup IIR_Lattice
+  @{
  */
 
-  /**
-   * @brief Initialization function for the Q31 IIR lattice filter.
-   * @param[in] *S points to an instance of the Q31 IIR lattice structure.
-   * @param[in] numStages number of stages in the filter.
-   * @param[in] *pkCoeffs points to the reflection coefficient buffer.  The array is of length numStages.
-   * @param[in] *pvCoeffs points to the ladder coefficient buffer.  The array is of length numStages+1.
-   * @param[in] *pState points to the state buffer.  The array is of length numStages+blockSize.
-   * @param[in] blockSize number of samples to process.
-   * @return none.
-   */
+/**
+  @brief         Initialization function for the Q31 IIR lattice filter.
+  @param[in]     S          points to an instance of the Q31 IIR lattice structure
+  @param[in]     numStages  number of stages in the filter
+  @param[in]     pkCoeffs   points to reflection coefficient buffer.  The array is of length numStages
+  @param[in]     pvCoeffs   points to ladder coefficient buffer.  The array is of length numStages+1
+  @param[in]     pState     points to state buffer.  The array is of length numStages+blockSize
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
 
 void arm_iir_lattice_init_q31(
   arm_iir_lattice_instance_q31 * S,
@@ -70,10 +70,8 @@
 
   /* Assign state pointer */
   S->pState = pState;
-
-
 }
 
 /**
- * @} end of IIR_Lattice group
+  @} end of IIR_Lattice group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c b/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c
index 8f68068..9dbea81 100644
--- a/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c
@@ -1,15 +1,15 @@
 /* ----------------------------------------------------------------------
  * Project:      CMSIS DSP Library
  * Title:        arm_iir_lattice_q15.c
- * Description:  Q15 IIR lattice filter processing function
+ * Description:  Q15 IIR Lattice filter processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,64 +29,55 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup IIR_Lattice
- * @{
+  @addtogroup IIR_Lattice
+  @{
  */
 
 /**
- * @brief Processing function for the Q15 IIR lattice filter.
- * @param[in] *S points to an instance of the Q15 IIR lattice structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.
+  @brief         Processing function for the Q15 IIR lattice filter.
+  @param[in]     S          points to an instance of the Q15 IIR lattice structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+                   Lastly, the accumulator is saturated to yield a result in 1.15 format.
  */
 
 void arm_iir_lattice_q15(
   const arm_iir_lattice_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
+        q15_t *pState = S->pState;                     /* State pointer */
+        q15_t *pStateCur;                              /* State current pointer */
+        q31_t fcurr, fnext = 0, gcurr = 0, gnext;      /* Temporary variables for lattice stages */
+        q63_t acc;                                     /* Accumlator */
+        q15_t *px1, *px2, *pk, *pv;                    /* Temporary pointers for state and coef */
+        uint32_t numStages = S->numStages;             /* Number of stages */
+        uint32_t blkCnt, tapCnt;                       /* Temporary variables for counts */
+        q15_t out;                                     /* Temporary variable for output */
 
-
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t fcurr, fnext, gcurr = 0, gnext;          /* Temporary variables for lattice stages */
-  q15_t gnext1, gnext2;                          /* Temporary variables for lattice stages */
-  uint32_t stgCnt;                               /* Temporary variables for counts */
-  q63_t acc;                                     /* Accumlator */
-  uint32_t blkCnt, tapCnt;                       /* Temporary variables for counts */
-  q15_t *px1, *px2, *pk, *pv;                    /* temporary pointers for state and coef */
-  uint32_t numStages = S->numStages;             /* number of stages */
-  q15_t *pState;                                 /* State pointer */
-  q15_t *pStateCurnt;                            /* State current pointer */
-  q15_t out;                                     /* Temporary variable for output */
-  q31_t v;                                       /* Temporary variable for ladder coefficient */
-#ifdef UNALIGNED_SUPPORT_DISABLE
-	q15_t v1, v2;
+#if defined (ARM_MATH_DSP) && defined (ARM_MATH_LOOPUNROLL)
+        q15_t gnext1, gnext2;                          /* Temporary variables for lattice stages */
+        q31_t v;                                       /* Temporary variable for ladder coefficient */
 #endif
 
-
+  /* initialise loop count */
   blkCnt = blockSize;
 
-  pState = &S->pState[0];
+#if defined (ARM_MATH_DSP)
 
   /* Sample processing */
   while (blkCnt > 0U)
@@ -95,57 +86,62 @@
     /* fN(n) = x(n) */
     fcurr = *pSrc++;
 
-    /* Initialize state read pointer */
-    px1 = pState;
-    /* Initialize state write pointer */
-    px2 = pState;
-    /* Set accumulator to zero */
-    acc = 0;
     /* Initialize Ladder coeff pointer */
     pv = &S->pvCoeffs[0];
+
     /* Initialize Reflection coeff pointer */
     pk = &S->pkCoeffs[0];
 
+    /* Initialize state read pointer */
+    px1 = pState;
+
+    /* Initialize state write pointer */
+    px2 = pState;
+
+    /* Set accumulator to zero */
+    acc = 0;
 
     /* Process sample for first tap */
     gcurr = *px1++;
     /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
     fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
     fnext = __SSAT(fnext, 16);
+
     /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
     gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
     gnext = __SSAT(gnext, 16);
+
     /* write gN(n) into state for next sample processing */
     *px2++ = (q15_t) gnext;
-    /* y(n) += gN(n) * vN  */
-    acc += (q31_t) ((gnext * (*pv++)));
 
+    /* y(n) += gN(n) * vN */
+    acc += (q31_t) ((gnext * (*pv++)));
 
     /* Update f values for next coefficient processing */
     fcurr = fnext;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = (numStages - 1U) >> 2;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = (numStages - 1U) >> 2U;
 
     while (tapCnt > 0U)
     {
-
       /* Process sample for 2nd, 6th ...taps */
       /* Read gN-2(n-1) from state buffer */
       gcurr = *px1++;
-      /* Process sample for 2nd, 6th .. taps */
       /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
       fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
       fnext = __SSAT(fnext, 16);
       /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
       gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
       gnext1 = (q15_t) __SSAT(gnext, 16);
-      /* write gN-1(n) into state */
+      /* write gN-1(n) into state for next sample processing */
       *px2++ = (q15_t) gnext1;
 
-
       /* Process sample for 3nd, 7th ...taps */
-      /* Read gN-3(n-1) from state */
+      /* Read gN-3(n-1) from state buffer */
       gcurr = *px1++;
       /* Process sample for 3rd, 7th .. taps */
       /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
@@ -158,39 +154,15 @@
       *px2++ = (q15_t) gnext2;
 
       /* Read vN-1 and vN-2 at a time */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      v = *__SIMD32(pv)++;
-
-#else
-
-	  v1 = *pv++;
-	  v2 = *pv++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  v = __PKHBT(v1, v2, 16);
-
-#else
-
-	  v = __PKHBT(v2, v1, 16);
-
-#endif	/* 	#ifndef ARM_MATH_BIG_ENDIAN		*/
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE */
-
+      v = read_q15x2_ia (&pv);
 
       /* Pack gN-1(n) and gN-2(n) */
 
 #ifndef  ARM_MATH_BIG_ENDIAN
-
       gnext = __PKHBT(gnext1, gnext2, 16);
-
 #else
-
       gnext = __PKHBT(gnext2, gnext1, 16);
-
-#endif /*   #ifndef  ARM_MATH_BIG_ENDIAN    */
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
 
       /* y(n) += gN-1(n) * vN-1  */
       /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
@@ -198,9 +170,8 @@
       /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
       acc = __SMLALD(gnext, v, acc);
 
-
       /* Process sample for 4th, 8th ...taps */
-      /* Read gN-4(n-1) from state */
+      /* Read gN-4(n-1) from state buffer */
       gcurr = *px1++;
       /* Process sample for 4th, 8th .. taps */
       /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
@@ -212,9 +183,8 @@
       /* write  gN-3(n) for the next sample process */
       *px2++ = (q15_t) gnext1;
 
-
       /* Process sample for 5th, 9th ...taps */
-      /* Read gN-5(n-1) from state */
+      /* Read gN-5(n-1) from state buffer */
       gcurr = *px1++;
       /* Process sample for 5th, 9th .. taps */
       /* fN-5(n) = fN-4(n) - kN-4 * gN-5(n-1) */
@@ -227,38 +197,14 @@
       *px2++ = (q15_t) gnext2;
 
       /* Read vN-3 and vN-4 at a time */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      v = *__SIMD32(pv)++;
-
-#else
-
-	  v1 = *pv++;
-	  v2 = *pv++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  v = __PKHBT(v1, v2, 16);
-
-#else
-
-	  v = __PKHBT(v2, v1, 16);
-
-#endif	/* #ifndef ARM_MATH_BIG_ENDIAN	 */
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE */
-
+      v = read_q15x2_ia (&pv);
 
       /* Pack gN-3(n) and gN-4(n) */
-#ifndef  ARM_MATH_BIG_ENDIAN
-
+#ifndef ARM_MATH_BIG_ENDIAN
       gnext = __PKHBT(gnext1, gnext2, 16);
-
 #else
-
       gnext = __PKHBT(gnext2, gnext1, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
       /* y(n) += gN-4(n) * vN-4  */
       /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
@@ -266,15 +212,22 @@
       /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
       acc = __SMLALD(gnext, v, acc);
 
+      /* Decrement loop counter */
       tapCnt--;
-
     }
 
     fnext = fcurr;
 
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    /* Loop unrolling: Compute remaining taps */
     tapCnt = (numStages - 1U) % 0x4U;
 
+#else
+
+    /* Initialize blkCnt with number of samples */
+    tapCnt = (numStages - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (tapCnt > 0U)
     {
       gcurr = *px1++;
@@ -283,11 +236,13 @@
       fnext = __SSAT(fnext, 16);
       gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
       gnext = __SSAT(gnext, 16);
+
       /* Output samples for last taps */
       acc += (q31_t) (((q31_t) gnext * (*pv++)));
       *px2++ = (q15_t) gnext;
       fcurr = fnext;
 
+      /* Decrement loop counter */
       tapCnt--;
     }
 
@@ -302,70 +257,52 @@
 
     /* Advance the state pointer by 4 to process the next group of 4 samples */
     pState = pState + 1U;
-    blkCnt--;
 
+    /* Decrement loop counter */
+    blkCnt--;
   }
 
   /* Processing is complete. Now copy last S->numStages samples to start of the buffer
      for the preperation of next frame process */
+
   /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
+  pStateCur = &S->pState[0];
   pState = &S->pState[blockSize];
 
-  stgCnt = (numStages >> 2U);
-
   /* copy data */
-  while (stgCnt > 0U)
-  {
-#ifndef UNALIGNED_SUPPORT_DISABLE
+#if defined (ARM_MATH_LOOPUNROLL)
 
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = numStages >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = numStages % 0x4U;
 
 #else
 
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
+  /* Initialize blkCnt with number of samples */
+  tapCnt = (numStages - 1U);
 
-#endif /*	#ifndef UNALIGNED_SUPPORT_DISABLE */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
-    /* Decrement the loop counter */
-    stgCnt--;
-
-  }
-
-  /* Calculation of count for remaining q15_t data */
-  stgCnt = (numStages) % 0x4U;
-
-  /* copy data */
-  while (stgCnt > 0U)
+  while (tapCnt > 0U)
   {
-    *pStateCurnt++ = *pState++;
+    *pStateCur++ = *pState++;
 
-    /* Decrement the loop counter */
-    stgCnt--;
+    /* Decrement loop counter */
+    tapCnt--;
   }
 
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t fcurr, fnext = 0, gcurr = 0, gnext;      /* Temporary variables for lattice stages */
-  uint32_t stgCnt;                               /* Temporary variables for counts */
-  q63_t acc;                                     /* Accumlator */
-  uint32_t blkCnt, tapCnt;                       /* Temporary variables for counts */
-  q15_t *px1, *px2, *pk, *pv;                    /* temporary pointers for state and coef */
-  uint32_t numStages = S->numStages;             /* number of stages */
-  q15_t *pState;                                 /* State pointer */
-  q15_t *pStateCurnt;                            /* State current pointer */
-  q15_t out;                                     /* Temporary variable for output */
-
-
-  blkCnt = blockSize;
-
-  pState = &S->pState[0];
+#else /* #if defined (ARM_MATH_DSP) */
 
   /* Sample processing */
   while (blkCnt > 0U)
@@ -374,17 +311,21 @@
     /* fN(n) = x(n) */
     fcurr = *pSrc++;
 
-    /* Initialize state read pointer */
-    px1 = pState;
-    /* Initialize state write pointer */
-    px2 = pState;
-    /* Set accumulator to zero */
-    acc = 0;
     /* Initialize Ladder coeff pointer */
     pv = &S->pvCoeffs[0];
+
     /* Initialize Reflection coeff pointer */
     pk = &S->pkCoeffs[0];
 
+    /* Initialize state read pointer */
+    px1 = pState;
+
+    /* Initialize state write pointer */
+    px2 = pState;
+
+    /* Set accumulator to zero */
+    acc = 0;
+
     tapCnt = numStages;
 
     while (tapCnt > 0U)
@@ -394,14 +335,18 @@
       /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
       fnext = fcurr - ((gcurr * (*pk)) >> 15);
       fnext = __SSAT(fnext, 16);
+
       /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
       gnext = ((fnext * (*pk++)) >> 15) + gcurr;
       gnext = __SSAT(gnext, 16);
+
       /* Output samples */
       /* y(n) += gN(n) * vN */
       acc += (q31_t) ((gnext * (*pv++)));
+
       /* write gN(n) into state for next sample processing */
       *px2++ = (q15_t) gnext;
+
       /* Update f values for next coefficient processing */
       fcurr = fnext;
 
@@ -419,34 +364,33 @@
 
     /* Advance the state pointer by 1 to process the next group of samples */
     pState = pState + 1U;
-    blkCnt--;
 
+    /* Decrement loop counter */
+    blkCnt--;
   }
 
   /* Processing is complete. Now copy last S->numStages samples to start of the buffer
      for the preperation of next frame process */
+
   /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
+  pStateCur = &S->pState[0];
   pState = &S->pState[blockSize];
 
-  stgCnt = numStages;
+  tapCnt = numStages;
 
-  /* copy data */
-  while (stgCnt > 0U)
+  /* Copy data */
+  while (tapCnt > 0U)
   {
-    *pStateCurnt++ = *pState++;
+    *pStateCur++ = *pState++;
 
-    /* Decrement the loop counter */
-    stgCnt--;
+    /* Decrement loop counter */
+    tapCnt--;
   }
 
-#endif /*   #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_DSP) */
 
 }
 
-
-
-
 /**
- * @} end of IIR_Lattice group
+  @} end of IIR_Lattice group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c b/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c
index a14dd7a..c4b9a76 100644
--- a/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c
@@ -1,15 +1,15 @@
 /* ----------------------------------------------------------------------
  * Project:      CMSIS DSP Library
  * Title:        arm_iir_lattice_q31.c
- * Description:  Q31 IIR lattice filter processing function
+ * Description:  Q31 IIR Lattice filter processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,55 +29,50 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup IIR_Lattice
- * @{
+  @addtogroup IIR_Lattice
+  @{
  */
 
 /**
- * @brief Processing function for the Q31 IIR lattice filter.
- * @param[in] *S points to an instance of the Q31 IIR lattice structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * Thus, if the accumulator result overflows it wraps around rather than clip.
- * In order to avoid overflows completely the input signal must be scaled down by 2*log2(numStages) bits.
- * After all multiply-accumulates are performed, the 2.62 accumulator is saturated to 1.32 format and then truncated to 1.31 format.
+  @brief         Processing function for the Q31 IIR lattice filter.
+  @param[in]     S          points to an instance of the Q31 IIR lattice structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clip.
+                   In order to avoid overflows completely the input signal must be scaled down by 2*log2(numStages) bits.
+                   After all multiply-accumulates are performed, the 2.62 accumulator is saturated to 1.32 format and then truncated to 1.31 format.
  */
 
 void arm_iir_lattice_q31(
   const arm_iir_lattice_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t fcurr, fnext = 0, gcurr = 0, gnext;      /* Temporary variables for lattice stages */
-  q63_t acc;                                     /* Accumlator */
-  uint32_t blkCnt, tapCnt;                       /* Temporary variables for counts */
-  q31_t *px1, *px2, *pk, *pv;                    /* Temporary pointers for state and coef */
-  uint32_t numStages = S->numStages;             /* number of stages */
-  q31_t *pState;                                 /* State pointer */
-  q31_t *pStateCurnt;                            /* State current pointer */
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{       
+        q31_t *pState = S->pState;                       /* State pointer */
+        q31_t *pStateCur;                                /* State current pointer */
+        q31_t fcurr, fnext = 0, gcurr = 0, gnext;        /* Temporary variables for lattice stages */
+        q63_t acc;                                       /* Accumlator */
+        q31_t *px1, *px2, *pk, *pv;                      /* Temporary pointers for state and coef */
+        uint32_t numStages = S->numStages;               /* Number of stages */
+        uint32_t blkCnt, tapCnt;                         /* Temporary variables for counts */
 
+
+  /* initialise loop count */
   blkCnt = blockSize;
 
-  pState = &S->pState[0];
-
-
 #if defined (ARM_MATH_DSP)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
   /* Sample processing */
   while (blkCnt > 0U)
   {
@@ -85,43 +80,51 @@
     /* fN(n) = x(n) */
     fcurr = *pSrc++;
 
-    /* Initialize state read pointer */
-    px1 = pState;
-    /* Initialize state write pointer */
-    px2 = pState;
-    /* Set accumulator to zero */
-    acc = 0;
     /* Initialize Ladder coeff pointer */
     pv = &S->pvCoeffs[0];
+
     /* Initialize Reflection coeff pointer */
     pk = &S->pkCoeffs[0];
 
+    /* Initialize state read pointer */
+    px1 = pState;
+
+    /* Initialize state write pointer */
+    px2 = pState;
+
+    /* Set accumulator to zero */
+    acc = 0;
 
     /* Process sample for first tap */
     gcurr = *px1++;
     /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
-    fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
+    fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
+
     /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
     gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
+
     /* write gN-1(n-1) into state for next sample processing */
     *px2++ = gnext;
-    /* y(n) += gN(n) * vN  */
+
+    /* y(n) += gN(n) * vN */
     acc += ((q63_t) gnext * *pv++);
 
     /* Update f values for next coefficient processing */
     fcurr = fnext;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = (numStages - 1U) >> 2;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = (numStages - 1U) >> 2U;
 
     while (tapCnt > 0U)
     {
-
-      /* Process sample for 2nd, 6th .. taps */
+      /* Process sample for 2nd, 6th ...taps */
       /* Read gN-2(n-1) from state buffer */
       gcurr = *px1++;
       /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
-      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
+      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
       /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
       gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
       /* y(n) += gN-1(n) * vN-1  */
@@ -135,7 +138,7 @@
       gcurr = *px1++;
       /* Process sample for 3rd, 7th .. taps */
       /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
-      fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
+      fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
       /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
       gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
       /* y(n) += gN-2(n) * vN-2  */
@@ -144,13 +147,12 @@
       /* write gN-2(n) into state for next sample processing */
       *px2++ = gnext;
 
-
       /* Process sample for 4th, 8th ...taps */
       /* Read gN-4(n-1) from state buffer */
       gcurr = *px1++;
       /* Process sample for 4th, 8th .. taps */
       /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
-      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
+      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
       /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */
       gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
       /* y(n) += gN-3(n) * vN-3  */
@@ -159,48 +161,55 @@
       /* write gN-3(n) into state for next sample processing */
       *px2++ = gnext;
 
-
       /* Process sample for 5th, 9th ...taps */
       /* Read gN-5(n-1) from state buffer */
       gcurr = *px1++;
       /* Process sample for 5th, 9th .. taps */
       /* fN-5(n) = fN-4(n) - kN-4 * gN-1(n-1) */
-      fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
+      fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
       /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
       gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
       /* y(n) += gN-4(n) * vN-4  */
       /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
       acc += ((q63_t) gnext * *pv++);
+
       /* write gN-4(n) into state for next sample processing */
       *px2++ = gnext;
 
+      /* Decrement loop counter */
       tapCnt--;
-
     }
 
     fnext = fcurr;
 
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    /* Loop unrolling: Compute remaining taps */
     tapCnt = (numStages - 1U) % 0x4U;
 
+#else
+
+    /* Initialize blkCnt with number of samples */
+    tapCnt = (numStages - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (tapCnt > 0U)
     {
       gcurr = *px1++;
       /* Process sample for last taps */
-      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
+      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
       gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
+
       /* Output samples for last taps */
       acc += ((q63_t) gnext * *pv++);
       *px2++ = gnext;
       fcurr = fnext;
 
+      /* Decrement loop counter */
       tapCnt--;
-
     }
 
     /* y(n) += g0(n) * v0 */
-    acc += (q63_t) fnext *(
-  *pv++);
+    acc += ((q63_t) fnext * *pv++);
 
     *px2++ = fnext;
 
@@ -209,47 +218,55 @@
 
     /* Advance the state pointer by 4 to process the next group of 4 samples */
     pState = pState + 1U;
-    blkCnt--;
 
+    /* Decrement loop counter */
+    blkCnt--;
   }
 
   /* Processing is complete. Now copy last S->numStages samples to start of the buffer
      for the preperation of next frame process */
 
   /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
+  pStateCur = &S->pState[0];
   pState = &S->pState[blockSize];
 
+  /* Copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
   tapCnt = numStages >> 2U;
 
-  /* copy data */
   while (tapCnt > 0U)
   {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     tapCnt--;
-
   }
 
-  /* Calculate remaining number of copies */
-  tapCnt = (numStages) % 0x4U;
-
-  /* Copy the remaining q31_t data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  };
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = numStages % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
+  /* Initialize blkCnt with number of samples */
+  tapCnt = (numStages - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#else /* #if defined (ARM_MATH_DSP) */
+
   /* Sample processing */
   while (blkCnt > 0U)
   {
@@ -257,17 +274,21 @@
     /* fN(n) = x(n) */
     fcurr = *pSrc++;
 
-    /* Initialize state read pointer */
-    px1 = pState;
-    /* Initialize state write pointer */
-    px2 = pState;
-    /* Set accumulator to zero */
-    acc = 0;
     /* Initialize Ladder coeff pointer */
     pv = &S->pvCoeffs[0];
+
     /* Initialize Reflection coeff pointer */
     pk = &S->pkCoeffs[0];
 
+    /* Initialize state read pointer */
+    px1 = pState;
+
+    /* Initialize state write pointer */
+    px2 = pState;
+
+    /* Set accumulator to zero */
+    acc = 0;
+
     tapCnt = numStages;
 
     while (tapCnt > 0U)
@@ -275,18 +296,18 @@
       gcurr = *px1++;
       /* Process sample */
       /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
-      fnext =
-        clip_q63_to_q31(((q63_t) fcurr -
-                         ((q31_t) (((q63_t) gcurr * (*pk)) >> 31))));
+      fnext = clip_q63_to_q31(((q63_t) fcurr - ((q31_t) (((q63_t) gcurr * (*pk  )) >> 31))));
+
       /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
-      gnext =
-        clip_q63_to_q31(((q63_t) gcurr +
-                         ((q31_t) (((q63_t) fnext * (*pk++)) >> 31))));
+      gnext = clip_q63_to_q31(((q63_t) gcurr + ((q31_t) (((q63_t) fnext * (*pk++)) >> 31))));
+
       /* Output samples */
-      /* y(n) += gN(n) * vN  */
+      /* y(n) += gN(n) * vN */
       acc += ((q63_t) gnext * *pv++);
+
       /* write gN-1(n-1) into state for next sample processing */
       *px2++ = gnext;
+
       /* Update f values for next coefficient processing */
       fcurr = fnext;
 
@@ -294,8 +315,7 @@
     }
 
     /* y(n) += g0(n) * v0 */
-    acc += (q63_t) fnext *(
-  *pv++);
+    acc += ((q63_t) fnext * *pv++);
 
     *px2++ = fnext;
 
@@ -304,35 +324,33 @@
 
     /* Advance the state pointer by 1 to process the next group of samples */
     pState = pState + 1U;
-    blkCnt--;
 
+    /* Decrement loop counter */
+    blkCnt--;
   }
 
   /* Processing is complete. Now copy last S->numStages samples to start of the buffer
      for the preperation of next frame process */
 
   /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
+  pStateCur = &S->pState[0];
   pState = &S->pState[blockSize];
 
   tapCnt = numStages;
 
-  /* Copy the remaining q31_t data */
+  /* Copy data */
   while (tapCnt > 0U)
   {
-    *pStateCurnt++ = *pState++;
+    *pStateCur++ = *pState++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     tapCnt--;
   }
 
-#endif /*   #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_DSP) */
 
 }
 
-
-
-
 /**
- * @} end of IIR_Lattice group
+  @} end of IIR_Lattice group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_lms_f32.c b/DSP/Source/FilteringFunctions/arm_lms_f32.c
index e5728b4..4fc6e7e 100644
--- a/DSP/Source/FilteringFunctions/arm_lms_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_lms_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_lms_f32.c
  * Description:  Processing function for the floating-point LMS filter
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,146 +29,143 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @defgroup LMS Least Mean Square (LMS) Filters
- *
- * LMS filters are a class of adaptive filters that are able to "learn" an unknown transfer functions.
- * LMS filters use a gradient descent method in which the filter coefficients are updated based on the instantaneous error signal.
- * Adaptive filters are often used in communication systems, equalizers, and noise removal.
- * The CMSIS DSP Library contains LMS filter functions that operate on Q15, Q31, and floating-point data types.
- * The library also contains normalized LMS filters in which the filter coefficient adaptation is indepedent of the level of the input signal.
- *
- * An LMS filter consists of two components as shown below.
- * The first component is a standard transversal or FIR filter.
- * The second component is a coefficient update mechanism.
- * The LMS filter has two input signals.
- * The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter.
- * That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input.
- * The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input.
- * This "error signal" tends towards zero as the filter adapts.
- * The LMS processing functions accept the input and reference input signals and generate the filter output and error signal.
- * \image html LMS.gif "Internal structure of the Least Mean Square filter"
- *
- * The functions operate on blocks of data and each call to the function processes
- * <code>blockSize</code> samples through the filter.
- * <code>pSrc</code> points to input signal, <code>pRef</code> points to reference signal,
- * <code>pOut</code> points to output signal and <code>pErr</code> points to error signal.
- * All arrays contain <code>blockSize</code> values.
- *
- * The functions operate on a block-by-block basis.
- * Internally, the filter coefficients <code>b[n]</code> are updated on a sample-by-sample basis.
- * The convergence of the LMS filter is slower compared to the normalized LMS algorithm.
- *
- * \par Algorithm:
- * The output signal <code>y[n]</code> is computed by a standard FIR filter:
- * <pre>
- *     y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
- * </pre>
- *
- * \par
- * The error signal equals the difference between the reference signal <code>d[n]</code> and the filter output:
- * <pre>
- *     e[n] = d[n] - y[n].
- * </pre>
- *
- * \par
- * After each sample of the error signal is computed, the filter coefficients <code>b[k]</code> are updated on a sample-by-sample basis:
- * <pre>
- *     b[k] = b[k] + e[n] * mu * x[n-k],  for k=0, 1, ..., numTaps-1
- * </pre>
- * where <code>mu</code> is the step size and controls the rate of coefficient convergence.
- *\par
- * In the APIs, <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
- * Coefficients are stored in time reversed order.
- * \par
- * <pre>
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * \par
- * <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
- * Samples in the state buffer are stored in the order:
- * \par
- * <pre>
- *    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
- * </pre>
- * \par
- * Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code> samples.
- * The increased state buffer length allows circular addressing, which is traditionally used in FIR filters,
- * to be avoided and yields a significant speed improvement.
- * The state variables are updated after each block of data is processed.
- * \par Instance Structure
- * The coefficients and state variables for a filter are stored together in an instance data structure.
- * A separate instance structure must be defined for each filter and
- * coefficient and state arrays cannot be shared among instances.
- * There are separate instance structure declarations for each of the 3 supported data types.
- *
- * \par Initialization Functions
- * There is also an associated initialization function for each data type.
- * The initialization function performs the following operations:
- * - Sets the values of the internal structure fields.
- * - Zeros out the values in the state buffer.
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numTaps, pCoeffs, mu, postShift (not for f32), pState. Also set all of the values in pState to zero.
- *
- * \par
- * Use of the initialization function is optional.
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
- * To place an instance structure into a const data section, the instance structure must be manually initialized.
- * Set the values in the state buffer to zeros before static initialization.
- * The code below statically initializes each of the 3 different data type filter instance structures
- * <pre>
- *    arm_lms_instance_f32 S = {numTaps, pState, pCoeffs, mu};
- *    arm_lms_instance_q31 S = {numTaps, pState, pCoeffs, mu, postShift};
- *    arm_lms_instance_q15 S = {numTaps, pState, pCoeffs, mu, postShift};
- * </pre>
- * where <code>numTaps</code> is the number of filter coefficients in the filter; <code>pState</code> is the address of the state buffer;
- * <code>pCoeffs</code> is the address of the coefficient buffer; <code>mu</code> is the step size parameter; and <code>postShift</code> is the shift applied to coefficients.
- *
- * \par Fixed-Point Behavior:
- * Care must be taken when using the Q15 and Q31 versions of the LMS filter.
- * The following issues must be considered:
- * - Scaling of coefficients
- * - Overflow and saturation
- *
- * \par Scaling of Coefficients:
- * Filter coefficients are represented as fractional values and
- * coefficients are restricted to lie in the range <code>[-1 +1)</code>.
- * The fixed-point functions have an additional scaling parameter <code>postShift</code>.
- * At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
- * This essentially scales the filter coefficients by <code>2^postShift</code> and
- * allows the filter coefficients to exceed the range <code>[+1 -1)</code>.
- * The value of <code>postShift</code> is set by the user based on the expected gain through the system being modeled.
- *
- * \par Overflow and Saturation:
- * Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are
- * described separately as part of the function specific documentation below.
+  @defgroup LMS Least Mean Square (LMS) Filters
+
+  LMS filters are a class of adaptive filters that are able to "learn" an unknown transfer functions.
+  LMS filters use a gradient descent method in which the filter coefficients are updated based on the instantaneous error signal.
+  Adaptive filters are often used in communication systems, equalizers, and noise removal.
+  The CMSIS DSP Library contains LMS filter functions that operate on Q15, Q31, and floating-point data types.
+  The library also contains normalized LMS filters in which the filter coefficient adaptation is indepedent of the level of the input signal.
+
+  An LMS filter consists of two components as shown below.
+  The first component is a standard transversal or FIR filter.
+  The second component is a coefficient update mechanism.
+  The LMS filter has two input signals.
+  The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter.
+  That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input.
+  The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input.
+  This "error signal" tends towards zero as the filter adapts.
+  The LMS processing functions accept the input and reference input signals and generate the filter output and error signal.
+  \image html LMS.gif "Internal structure of the Least Mean Square filter"
+
+  The functions operate on blocks of data and each call to the function processes
+  <code>blockSize</code> samples through the filter.
+  <code>pSrc</code> points to input signal, <code>pRef</code> points to reference signal,
+  <code>pOut</code> points to output signal and <code>pErr</code> points to error signal.
+  All arrays contain <code>blockSize</code> values.
+
+  The functions operate on a block-by-block basis.
+  Internally, the filter coefficients <code>b[n]</code> are updated on a sample-by-sample basis.
+  The convergence of the LMS filter is slower compared to the normalized LMS algorithm.
+
+  @par           Algorithm
+                   The output signal <code>y[n]</code> is computed by a standard FIR filter:
+  <pre>
+      y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
+  </pre>
+
+  @par
+                   The error signal equals the difference between the reference signal <code>d[n]</code> and the filter output:
+  <pre>
+      e[n] = d[n] - y[n].
+  </pre>
+
+  @par
+                   After each sample of the error signal is computed, the filter coefficients <code>b[k]</code> are updated on a sample-by-sample basis:
+  <pre>
+      b[k] = b[k] + e[n] * mu * x[n-k],  for k=0, 1, ..., numTaps-1
+  </pre>
+                   where <code>mu</code> is the step size and controls the rate of coefficient convergence.
+  @par
+                   In the APIs, <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
+                   Coefficients are stored in time reversed order.
+  @par
+  <pre>
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+  @par
+                   <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
+                   Samples in the state buffer are stored in the order:
+  @par
+  <pre>
+     {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
+  </pre>
+  @par
+                   Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code> samples.
+                   The increased state buffer length allows circular addressing, which is traditionally used in FIR filters,
+                   to be avoided and yields a significant speed improvement.
+                   The state variables are updated after each block of data is processed.
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter and
+                   coefficient and state arrays cannot be shared among instances.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+
+  @par           Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numTaps, pCoeffs, mu, postShift (not for f32), pState. Also set all of the values in pState to zero.
+
+  @par
+                 Use of the initialization function is optional.
+                 However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                 To place an instance structure into a const data section, the instance structure must be manually initialized.
+                 Set the values in the state buffer to zeros before static initialization.
+                 The code below statically initializes each of the 3 different data type filter instance structures
+  <pre>
+     arm_lms_instance_f32 S = {numTaps, pState, pCoeffs, mu};
+     arm_lms_instance_q31 S = {numTaps, pState, pCoeffs, mu, postShift};
+     arm_lms_instance_q15 S = {numTaps, pState, pCoeffs, mu, postShift};
+  </pre>
+                 where <code>numTaps</code> is the number of filter coefficients in the filter; <code>pState</code> is the address of the state buffer;
+                 <code>pCoeffs</code> is the address of the coefficient buffer; <code>mu</code> is the step size parameter; and <code>postShift</code> is the shift applied to coefficients.
+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the Q15 and Q31 versions of the LMS filter.
+                   The following issues must be considered:
+                   - Scaling of coefficients
+                   - Overflow and saturation
+
+  @par           Scaling of Coefficients
+                   Filter coefficients are represented as fractional values and
+                   coefficients are restricted to lie in the range <code>[-1 +1)</code>.
+                   The fixed-point functions have an additional scaling parameter <code>postShift</code>.
+                   At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
+                   This essentially scales the filter coefficients by <code>2^postShift</code> and
+                   allows the filter coefficients to exceed the range <code>[+1 -1)</code>.
+                   The value of <code>postShift</code> is set by the user based on the expected gain through the system being modeled.
+
+  @par           Overflow and Saturation
+                   Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are
+                   described separately as part of the function specific documentation below.
  */
 
 /**
- * @addtogroup LMS
- * @{
+  @addtogroup LMS
+  @{
  */
 
 /**
- * @details
- * This function operates on floating-point data types.
- *
- * @brief Processing function for floating-point LMS filter.
- * @param[in]  *S points to an instance of the floating-point LMS filter structure.
- * @param[in]  *pSrc points to the block of input data.
- * @param[in]  *pRef points to the block of reference data.
- * @param[out] *pOut points to the block of output data.
- * @param[out] *pErr points to the block of error data.
- * @param[in]  blockSize number of samples to process.
- * @return     none.
+  @brief         Processing function for floating-point LMS filter.
+  @param[in]     S          points to an instance of the floating-point LMS filter structure
+  @param[in]     pSrc       points to the block of input data
+  @param[in]     pRef       points to the block of reference data
+  @param[out]    pOut       points to the block of output data
+  @param[out]    pErr       points to the block of error data
+  @param[in]     blockSize  number of samples to process
+  @return        none
  */
-
+#if defined(ARM_MATH_NEON)
 void arm_lms_f32(
   const arm_lms_instance_f32 * S,
-  float32_t * pSrc,
+  const float32_t * pSrc,
   float32_t * pRef,
   float32_t * pOut,
   float32_t * pErr,
@@ -184,6 +181,9 @@
   float32_t sum, e, d;                           /* accumulator, error, reference data sample */
   float32_t w = 0.0f;                            /* weight factor */
 
+  float32x4_t tempV, sumV, xV, bV;
+  float32x2_t tempV2;
+
   e = 0.0f;
   d = 0.0f;
 
@@ -193,11 +193,6 @@
 
   blkCnt = blockSize;
 
-
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
   while (blkCnt > 0U)
   {
     /* Copy the new input sample into the state buffer */
@@ -211,21 +206,27 @@
 
     /* Set the accumulator to zero */
     sum = 0.0f;
+    sumV = vdupq_n_f32(0.0);
 
-    /* Loop unrolling.  Process 4 taps at a time. */
+    /* Process 4 taps at a time. */
     tapCnt = numTaps >> 2;
 
     while (tapCnt > 0U)
     {
       /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
+      xV = vld1q_f32(px);
+      bV = vld1q_f32(pb);
+      sumV = vmlaq_f32(sumV, xV, bV);
+
+      px += 4; 
+      pb += 4;
 
       /* Decrement the loop counter */
       tapCnt--;
     }
+    tempV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
+    sum = tempV2[0] + tempV2[1];
+
 
     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
     tapCnt = numTaps % 0x4U;
@@ -256,24 +257,21 @@
     /* Initialize coeff pointer */
     pb = (pCoeffs);
 
-    /* Loop unrolling.  Process 4 taps at a time. */
+    /* Process 4 taps at a time. */
     tapCnt = numTaps >> 2;
 
     /* Update filter coefficients */
     while (tapCnt > 0U)
     {
       /* Perform the multiply-accumulate */
-      *pb = *pb + (w * (*px++));
-      pb++;
+      xV = vld1q_f32(px);
+      bV = vld1q_f32(pb);
+      px += 4;
+      bV = vmlaq_n_f32(bV,xV,w);
 
-      *pb = *pb + (w * (*px++));
-      pb++;
+      vst1q_f32(pb,bV); 
+      pb += 4;
 
-      *pb = *pb + (w * (*px++));
-      pb++;
-
-      *pb = *pb + (w * (*px++));
-      pb++;
 
       /* Decrement the loop counter */
       tapCnt--;
@@ -307,16 +305,16 @@
   /* Points to the start of the pState buffer */
   pStateCurnt = S->pState;
 
-  /* Loop unrolling for (numTaps - 1U) samples copy */
+  /* Process 4 taps at a time for (numTaps - 1U) samples copy */
   tapCnt = (numTaps - 1U) >> 2U;
 
   /* copy data */
   while (tapCnt > 0U)
   {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
+    tempV = vld1q_f32(pState);
+    vst1q_f32(pStateCurnt,tempV); 
+    pState += 4;
+    pStateCurnt += 4;
 
     /* Decrement the loop counter */
     tapCnt--;
@@ -334,9 +332,37 @@
     tapCnt--;
   }
 
-#else
 
-  /* Run the below code for Cortex-M0 */
+}
+#else
+void arm_lms_f32(
+  const arm_lms_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pRef,
+        float32_t * pOut,
+        float32_t * pErr,
+        uint32_t blockSize)
+{       
+        float32_t *pState = S->pState;                 /* State pointer */
+        float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+        float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
+        float32_t mu = S->mu;                          /* Adaptive factor */
+        float32_t acc, e;                              /* Accumulator, error */
+        float32_t w;                                   /* Weight factor */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
+
+  /* Initializations of error,  difference, Coefficient update */
+  e = 0.0f;
+  w = 0.0f;
+
+  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+  /* initialise loop count */
+  blkCnt = blockSize;
 
   while (blkCnt > 0U)
   {
@@ -346,85 +372,162 @@
     /* Initialize pState pointer */
     px = pState;
 
-    /* Initialize pCoeffs pointer */
+    /* Initialize coefficient pointer */
     pb = pCoeffs;
 
     /* Set the accumulator to zero */
-    sum = 0.0f;
+    acc = 0.0f;
 
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
 
     while (tapCnt > 0U)
     {
       /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
+      acc += (*px++) * (*pb++);
+
+      acc += (*px++) * (*pb++);
+
+      acc += (*px++) * (*pb++);
+
+      acc += (*px++) * (*pb++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      acc += (*px++) * (*pb++);
 
       /* Decrement the loop counter */
       tapCnt--;
     }
 
-    /* The result is stored in the destination buffer. */
-    *pOut++ = sum;
+    /* Store the result from accumulator into the destination buffer. */
+    *pOut++ = acc;
 
     /* Compute and store error */
-    d = (float32_t) (*pRef++);
-    e = d - sum;
+    e = (float32_t) *pRef++ - acc;
     *pErr++ = e;
 
-    /* Weighting factor for the LMS version */
+    /* Calculation of Weighting factor for updating filter coefficients */
     w = e * mu;
 
     /* Initialize pState pointer */
-    px = pState;
+    /* Advance state pointer by 1 for the next sample */
+    px = pState++;
 
-    /* Initialize pCoeffs pointer */
+    /* Initialize coefficient pointer */
     pb = pCoeffs;
 
-    /* Loop over numTaps number of values */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    /* Update filter coefficients */
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      *pb += w * (*px++);
+      pb++;
+
+      *pb += w * (*px++);
+      pb++;
+
+      *pb += w * (*px++);
+      pb++;
+
+      *pb += w * (*px++);
+      pb++;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
     tapCnt = numTaps;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (tapCnt > 0U)
     {
       /* Perform the multiply-accumulate */
-      *pb = *pb + (w * (*px++));
+      *pb += w * (*px++);
       pb++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the
-   * start of the state buffer. This prepares the state buffer for the
-   * next function call. */
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
 
   /* Points to the start of the pState buffer */
   pStateCurnt = S->pState;
 
-  /*  Copy (numTaps - 1U) samples  */
+  /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of samples */
   tapCnt = (numTaps - 1U);
 
-  /* Copy the data */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (tapCnt > 0U)
   {
     *pStateCurnt++ = *pState++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     tapCnt--;
   }
 
-#endif /*   #if defined (ARM_MATH_DSP) */
-
 }
+#endif /* #if defined(ARM_MATH_NEON) */
 
 /**
-   * @} end of LMS group
-   */
+  @} end of LMS group
+ */
diff --git a/DSP/Source/FilteringFunctions/arm_lms_init_f32.c b/DSP/Source/FilteringFunctions/arm_lms_init_f32.c
index 9fc87f1..f418f46 100644
--- a/DSP/Source/FilteringFunctions/arm_lms_init_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_lms_init_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_lms_init_f32.c
  * Description:  Floating-point LMS filter initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,29 +29,27 @@
 #include "arm_math.h"
 
 /**
- * @addtogroup LMS
- * @{
+  @addtogroup LMS
+  @{
  */
 
-  /**
-   * @brief Initialization function for floating-point LMS filter.
-   * @param[in] *S points to an instance of the floating-point LMS filter structure.
-   * @param[in] numTaps  number of filter coefficients.
-   * @param[in] *pCoeffs points to the coefficient buffer.
-   * @param[in] *pState points to state buffer.
-   * @param[in] mu step size that controls filter coefficient updates.
-   * @param[in] blockSize number of samples to process.
-   * @return none.
-   */
-
 /**
- * \par Description:
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * The initial filter coefficients serve as a starting point for the adaptive filter.
- * <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_f32()</code>.
+  @brief         Initialization function for floating-point LMS filter.
+  @param[in]     S          points to an instance of the floating-point LMS filter structure
+  @param[in]     numTaps    number of filter coefficients
+  @param[in]     pCoeffs    points to coefficient buffer
+  @param[in]     pState     points to state buffer
+  @param[in]     mu         step size that controls filter coefficient updates
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+                   The initial filter coefficients serve as a starting point for the adaptive filter.
+                   <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_f32()</code>.
  */
 
 void arm_lms_init_f32(
@@ -79,5 +77,5 @@
 }
 
 /**
- * @} end of LMS group
+  @} end of LMS group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_lms_init_q15.c b/DSP/Source/FilteringFunctions/arm_lms_init_q15.c
index 3a13f26..fe0a5c5 100644
--- a/DSP/Source/FilteringFunctions/arm_lms_init_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_lms_init_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_lms_init_q15.c
  * Description:  Q15 LMS filter initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,35 +29,35 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup LMS
- * @{
+  @addtogroup LMS
+  @{
  */
 
 /**
-* @brief Initialization function for the Q15 LMS filter.
-* @param[in] *S points to an instance of the Q15 LMS filter structure.
-* @param[in] numTaps  number of filter coefficients.
-* @param[in] *pCoeffs points to the coefficient buffer.
-* @param[in] *pState points to the state buffer.
-* @param[in] mu step size that controls filter coefficient updates.
-* @param[in] blockSize number of samples to process.
-* @param[in] postShift bit shift applied to coefficients.
-* @return    none.
-*
-* \par Description:
-* <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
-* <pre>
-*    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-* </pre>
-* The initial filter coefficients serve as a starting point for the adaptive filter.
-* <code>pState</code> points to the array of state variables and size of array is
-* <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of
-* input samples processed by each call to <code>arm_lms_q15()</code>.
-*/
+  @brief         Initialization function for the Q15 LMS filter.
+  @param[in]     S          points to an instance of the Q15 LMS filter structure.
+  @param[in]     numTaps    number of filter coefficients.
+  @param[in]     pCoeffs    points to coefficient buffer.
+  @param[in]     pState     points to state buffer.
+  @param[in]     mu         step size that controls filter coefficient updates.
+  @param[in]     blockSize  number of samples to process.
+  @param[in]     postShift  bit shift applied to coefficients.
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+                   The initial filter coefficients serve as a starting point for the adaptive filter.
+                   <code>pState</code> points to the array of state variables and size of array is
+                   <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of
+                   input samples processed by each call to <code>arm_lms_q15()</code>.
+ */
 
 void arm_lms_init_q15(
   arm_lms_instance_q15 * S,
@@ -85,9 +85,8 @@
 
   /* Assign postShift value to be applied */
   S->postShift = postShift;
-
 }
 
 /**
- * @} end of LMS group
+  @} end of LMS group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_lms_init_q31.c b/DSP/Source/FilteringFunctions/arm_lms_init_q31.c
index 5859c84..3410b9f 100644
--- a/DSP/Source/FilteringFunctions/arm_lms_init_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_lms_init_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_lms_init_q31.c
  * Description:  Q31 LMS filter initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,34 +29,34 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup LMS
- * @{
+  @addtogroup LMS
+  @{
  */
 
-  /**
-   * @brief Initialization function for Q31 LMS filter.
-   * @param[in] *S points to an instance of the Q31 LMS filter structure.
-   * @param[in] numTaps  number of filter coefficients.
-   * @param[in] *pCoeffs points to coefficient buffer.
-   * @param[in] *pState points to state buffer.
-   * @param[in] mu step size that controls filter coefficient updates.
-   * @param[in] blockSize number of samples to process.
-   * @param[in] postShift bit shift applied to coefficients.
-   * @return none.
- *
- * \par Description:
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * The initial filter coefficients serve as a starting point for the adaptive filter.
- * <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
- * where <code>blockSize</code> is the number of input samples processed by each call to
- * <code>arm_lms_q31()</code>.
+/**
+  @brief         Initialization function for Q31 LMS filter.
+  @param[in]     S          points to an instance of the Q31 LMS filter structure
+  @param[in]     numTaps    number of filter coefficients
+  @param[in]     pCoeffs    points to coefficient buffer
+  @param[in]     pState     points to state buffer
+  @param[in]     mu         step size that controls filter coefficient updates
+  @param[in]     blockSize  number of samples to process
+  @param[in]     postShift  bit shift applied to coefficients
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+                   The initial filter coefficients serve as a starting point for the adaptive filter.
+                   <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
+                   where <code>blockSize</code> is the number of input samples processed by each call to
+                   <code>arm_lms_q31()</code>.
  */
 
 void arm_lms_init_q31(
@@ -75,7 +75,7 @@
   S->pCoeffs = pCoeffs;
 
   /* Clear state buffer and size is always blockSize + numTaps - 1 */
-  memset(pState, 0, ((uint32_t) numTaps + (blockSize - 1U)) * sizeof(q31_t));
+  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));
 
   /* Assign state pointer */
   S->pState = pState;
@@ -85,9 +85,8 @@
 
   /* Assign postShift value to be applied */
   S->postShift = postShift;
-
 }
 
 /**
- * @} end of LMS group
+  @} end of LMS group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c b/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c
index 3fdc5a1..28ab04a 100644
--- a/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c
@@ -1,15 +1,15 @@
 /* ----------------------------------------------------------------------
  * Project:      CMSIS DSP Library
  * Title:        arm_lms_norm_f32.c
- * Description:  Processing function for the floating-point Normalised LMS
+ * Description:  Processing function for the floating-point NLMS filter
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,138 +29,137 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @defgroup LMS_NORM Normalized LMS Filters
- *
- * This set of functions implements a commonly used adaptive filter.
- * It is related to the Least Mean Square (LMS) adaptive filter and includes an additional normalization
- * factor which increases the adaptation rate of the filter.
- * The CMSIS DSP Library contains normalized LMS filter functions that operate on Q15, Q31, and floating-point data types.
- *
- * A normalized least mean square (NLMS) filter consists of two components as shown below.
- * The first component is a standard transversal or FIR filter.
- * The second component is a coefficient update mechanism.
- * The NLMS filter has two input signals.
- * The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter.
- * That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input.
- * The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input.
- * This "error signal" tends towards zero as the filter adapts.
- * The NLMS processing functions accept the input and reference input signals and generate the filter output and error signal.
- * \image html LMS.gif "Internal structure of the NLMS adaptive filter"
- *
- * The functions operate on blocks of data and each call to the function processes
- * <code>blockSize</code> samples through the filter.
- * <code>pSrc</code> points to input signal, <code>pRef</code> points to reference signal,
- * <code>pOut</code> points to output signal and <code>pErr</code> points to error signal.
- * All arrays contain <code>blockSize</code> values.
- *
- * The functions operate on a block-by-block basis.
- * Internally, the filter coefficients <code>b[n]</code> are updated on a sample-by-sample basis.
- * The convergence of the LMS filter is slower compared to the normalized LMS algorithm.
- *
- * \par Algorithm:
- * The output signal <code>y[n]</code> is computed by a standard FIR filter:
- * <pre>
- *     y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
- * </pre>
- *
- * \par
- * The error signal equals the difference between the reference signal <code>d[n]</code> and the filter output:
- * <pre>
- *     e[n] = d[n] - y[n].
- * </pre>
- *
- * \par
- * After each sample of the error signal is computed the instanteous energy of the filter state variables is calculated:
- * <pre>
- *    E = x[n]^2 + x[n-1]^2 + ... + x[n-numTaps+1]^2.
- * </pre>
- * The filter coefficients <code>b[k]</code> are then updated on a sample-by-sample basis:
- * <pre>
- *     b[k] = b[k] + e[n] * (mu/E) * x[n-k],  for k=0, 1, ..., numTaps-1
- * </pre>
- * where <code>mu</code> is the step size and controls the rate of coefficient convergence.
- *\par
- * In the APIs, <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
- * Coefficients are stored in time reversed order.
- * \par
- * <pre>
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * \par
- * <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
- * Samples in the state buffer are stored in the order:
- * \par
- * <pre>
- *    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
- * </pre>
- * \par
- * Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code> samples.
- * The increased state buffer length allows circular addressing, which is traditionally used in FIR filters,
- * to be avoided and yields a significant speed improvement.
- * The state variables are updated after each block of data is processed.
- * \par Instance Structure
- * The coefficients and state variables for a filter are stored together in an instance data structure.
- * A separate instance structure must be defined for each filter and
- * coefficient and state arrays cannot be shared among instances.
- * There are separate instance structure declarations for each of the 3 supported data types.
- *
- * \par Initialization Functions
- * There is also an associated initialization function for each data type.
- * The initialization function performs the following operations:
- * - Sets the values of the internal structure fields.
- * - Zeros out the values in the state buffer.
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numTaps, pCoeffs, mu, energy, x0, pState. Also set all of the values in pState to zero.
- * For Q7, Q15, and Q31 the following fields must also be initialized;
- * recipTable, postShift
- *
- * \par
- * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
- * \par Fixed-Point Behavior:
- * Care must be taken when using the Q15 and Q31 versions of the normalised LMS filter.
- * The following issues must be considered:
- * - Scaling of coefficients
- * - Overflow and saturation
- *
- * \par Scaling of Coefficients:
- * Filter coefficients are represented as fractional values and
- * coefficients are restricted to lie in the range <code>[-1 +1)</code>.
- * The fixed-point functions have an additional scaling parameter <code>postShift</code>.
- * At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
- * This essentially scales the filter coefficients by <code>2^postShift</code> and
- * allows the filter coefficients to exceed the range <code>[+1 -1)</code>.
- * The value of <code>postShift</code> is set by the user based on the expected gain through the system being modeled.
- *
- * \par Overflow and Saturation:
- * Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are
- * described separately as part of the function specific documentation below.
- */
+  @defgroup LMS_NORM Normalized LMS Filters
 
+  This set of functions implements a commonly used adaptive filter.
+  It is related to the Least Mean Square (LMS) adaptive filter and includes an additional normalization
+  factor which increases the adaptation rate of the filter.
+  The CMSIS DSP Library contains normalized LMS filter functions that operate on Q15, Q31, and floating-point data types.
+
+  A normalized least mean square (NLMS) filter consists of two components as shown below.
+  The first component is a standard transversal or FIR filter.
+  The second component is a coefficient update mechanism.
+  The NLMS filter has two input signals.
+  The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter.
+  That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input.
+  The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input.
+  This "error signal" tends towards zero as the filter adapts.
+  The NLMS processing functions accept the input and reference input signals and generate the filter output and error signal.
+  \image html LMS.gif "Internal structure of the NLMS adaptive filter"
+
+  The functions operate on blocks of data and each call to the function processes
+  <code>blockSize</code> samples through the filter.
+  <code>pSrc</code> points to input signal, <code>pRef</code> points to reference signal,
+  <code>pOut</code> points to output signal and <code>pErr</code> points to error signal.
+  All arrays contain <code>blockSize</code> values.
+
+  The functions operate on a block-by-block basis.
+  Internally, the filter coefficients <code>b[n]</code> are updated on a sample-by-sample basis.
+  The convergence of the LMS filter is slower compared to the normalized LMS algorithm.
+
+ @par            Algorithm
+                   The output signal <code>y[n]</code> is computed by a standard FIR filter:
+  <pre>
+      y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
+  </pre>
+
+ @par
+                   The error signal equals the difference between the reference signal <code>d[n]</code> and the filter output:
+  <pre>
+      e[n] = d[n] - y[n].
+  </pre>
+
+ @par
+                   After each sample of the error signal is computed the instanteous energy of the filter state variables is calculated:
+  <pre>
+     E = x[n]^2 + x[n-1]^2 + ... + x[n-numTaps+1]^2.
+  </pre>
+                   The filter coefficients <code>b[k]</code> are then updated on a sample-by-sample basis:
+  <pre>
+      b[k] = b[k] + e[n] * (mu/E) * x[n-k],  for k=0, 1, ..., numTaps-1
+  </pre>
+                   where <code>mu</code> is the step size and controls the rate of coefficient convergence.
+ @par
+                   In the APIs, <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
+                   Coefficients are stored in time reversed order.
+ @par
+  <pre>
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+ @par
+                   <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
+                   Samples in the state buffer are stored in the order:
+ @par
+  <pre>
+     {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
+  </pre>
+ @par
+                   Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code> samples.
+                   The increased state buffer length allows circular addressing, which is traditionally used in FIR filters,
+                   to be avoided and yields a significant speed improvement.
+                   The state variables are updated after each block of data is processed.
+
+ @par            Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter and
+                   coefficient and state arrays cannot be shared among instances.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+
+ @par            Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numTaps, pCoeffs, mu, energy, x0, pState. Also set all of the values in pState to zero.
+                   For Q7, Q15, and Q31 the following fields must also be initialized;
+                   recipTable, postShift
+ @par
+                   Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
+ @par            Fixed-Point Behavior
+                   Care must be taken when using the Q15 and Q31 versions of the normalised LMS filter.
+                   The following issues must be considered:
+                   - Scaling of coefficients
+                   - Overflow and saturation
+
+ @par            Scaling of Coefficients
+                   Filter coefficients are represented as fractional values and
+                   coefficients are restricted to lie in the range <code>[-1 +1)</code>.
+                   The fixed-point functions have an additional scaling parameter <code>postShift</code>.
+                   At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
+                   This essentially scales the filter coefficients by <code>2^postShift</code> and
+                   allows the filter coefficients to exceed the range <code>[+1 -1)</code>.
+                   The value of <code>postShift</code> is set by the user based on the expected gain through the system being modeled.
+
+ @par            Overflow and Saturation
+                   Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are
+                   described separately as part of the function specific documentation below.
+ */
 
 /**
- * @addtogroup LMS_NORM
- * @{
+  @addtogroup LMS_NORM
+  @{
  */
 
+/**
+  @brief         Processing function for floating-point normalized LMS filter.
+  @param[in]     S         points to an instance of the floating-point normalized LMS filter structure
+  @param[in]     pSrc      points to the block of input data
+  @param[in]     pRef      points to the block of reference data
+  @param[out]    pOut      points to the block of output data
+  @param[out]    pErr      points to the block of error data
+  @param[in]     blockSize number of samples to process
+  @return        none
+ */
 
-  /**
-   * @brief Processing function for floating-point normalized LMS filter.
-   * @param[in] *S points to an instance of the floating-point normalized LMS filter structure.
-   * @param[in] *pSrc points to the block of input data.
-   * @param[in] *pRef points to the block of reference data.
-   * @param[out] *pOut points to the block of output data.
-   * @param[out] *pErr points to the block of error data.
-   * @param[in] blockSize number of samples to process.
-   * @return none.
-   */
-
+#if defined(ARM_MATH_NEON)
 void arm_lms_norm_f32(
   arm_lms_norm_instance_f32 * S,
-  float32_t * pSrc,
+  const float32_t * pSrc,
   float32_t * pRef,
   float32_t * pOut,
   float32_t * pErr,
@@ -177,6 +176,9 @@
   float32_t sum, e, d;                           /* accumulator, error, reference data sample */
   float32_t w, x0, in;                           /* weight factor, temporary variable to hold input sample and state */
 
+  float32x4_t tempV, sumV, xV, bV;
+  float32x2_t tempV2;
+
   /* Initializations of error,  difference, Coefficient update */
   e = 0.0f;
   d = 0.0f;
@@ -192,11 +194,6 @@
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
   while (blkCnt > 0U)
   {
     /* Copy the new input sample into the state buffer */
@@ -217,21 +214,26 @@
 
     /* Set the accumulator to zero */
     sum = 0.0f;
+    sumV = vdupq_n_f32(0.0);
 
-    /* Loop unrolling.  Process 4 taps at a time. */
+    /* Process 4 taps at a time. */
     tapCnt = numTaps >> 2;
 
     while (tapCnt > 0U)
     {
       /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
+      xV = vld1q_f32(px);
+      bV = vld1q_f32(pb);
+      sumV = vmlaq_f32(sumV, xV, bV);
+
+      px += 4; 
+      pb += 4;
 
       /* Decrement the loop counter */
       tapCnt--;
     }
+    tempV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
+    sum = tempV2[0] + tempV2[1];
 
     /* If the filter length is not a multiple of 4, compute the remaining filter taps */
     tapCnt = numTaps % 0x4U;
@@ -263,24 +265,20 @@
     /* Initialize coeff pointer */
     pb = (pCoeffs);
 
-    /* Loop unrolling.  Process 4 taps at a time. */
+    /* Process 4 taps at a time. */
     tapCnt = numTaps >> 2;
 
     /* Update filter coefficients */
     while (tapCnt > 0U)
     {
       /* Perform the multiply-accumulate */
-      *pb += w * (*px++);
-      pb++;
+      xV = vld1q_f32(px);
+      bV = vld1q_f32(pb);
+      px += 4;
+      bV = vmlaq_n_f32(bV,xV,w);
 
-      *pb += w * (*px++);
-      pb++;
-
-      *pb += w * (*px++);
-      pb++;
-
-      *pb += w * (*px++);
-      pb++;
+      vst1q_f32(pb,bV); 
+      pb += 4;
 
 
       /* Decrement the loop counter */
@@ -319,16 +317,16 @@
   /* Points to the start of the pState buffer */
   pStateCurnt = S->pState;
 
-  /* Loop unrolling for (numTaps - 1U)/4 samples copy */
+  /* Process 4 taps at a time for (numTaps - 1U)/4 samples copy */
   tapCnt = (numTaps - 1U) >> 2U;
 
   /* copy data */
   while (tapCnt > 0U)
   {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
+    tempV = vld1q_f32(pState);
+    vst1q_f32(pStateCurnt,tempV); 
+    pState += 4;
+    pStateCurnt += 4;
 
     /* Decrement the loop counter */
     tapCnt--;
@@ -346,9 +344,41 @@
     tapCnt--;
   }
 
+}
 #else
+void arm_lms_norm_f32(
+        arm_lms_norm_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pRef,
+        float32_t * pOut,
+        float32_t * pErr,
+        uint32_t blockSize)
+{
+        float32_t *pState = S->pState;                 /* State pointer */
+        float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+        float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
+        float32_t mu = S->mu;                          /* Adaptive factor */
+        float32_t acc, e;                              /* Accumulator, error */
+        float32_t w;                                   /* Weight factor */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
+        float32_t energy;                              /* Energy of the input */
+        float32_t x0, in;                              /* Temporary variable to hold input sample and state */
 
-  /* Run the below code for Cortex-M0 */
+  /* Initializations of error,  difference, Coefficient update */
+  e = 0.0f;
+  w = 0.0f;
+
+  energy = S->energy;
+  x0 = S->x0;
+
+  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+  /* initialise loop count */
+  blkCnt = blockSize;
 
   while (blkCnt > 0U)
   {
@@ -358,7 +388,7 @@
     /* Initialize pState pointer */
     px = pState;
 
-    /* Initialize pCoeffs pointer */
+    /* Initialize coefficient pointer */
     pb = pCoeffs;
 
     /* Read the sample from input buffer */
@@ -369,26 +399,52 @@
     energy += in * in;
 
     /* Set the accumulator to zero */
-    sum = 0.0f;
+    acc = 0.0f;
 
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
 
     while (tapCnt > 0U)
     {
       /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
+      acc += (*px++) * (*pb++);
+
+      acc += (*px++) * (*pb++);
+
+      acc += (*px++) * (*pb++);
+
+      acc += (*px++) * (*pb++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      acc += (*px++) * (*pb++);
 
       /* Decrement the loop counter */
       tapCnt--;
     }
 
-    /* The result in the accumulator is stored in the destination buffer. */
-    *pOut++ = sum;
+    /* Store the result from accumulator into the destination buffer. */
+    *pOut++ = acc;
 
     /* Compute and store error */
-    d = (float32_t) (*pRef++);
-    e = d - sum;
+    e = (float32_t) *pRef++ - acc;
     *pErr++ = e;
 
     /* Calculation of Weighting factor for updating filter coefficients */
@@ -398,19 +454,51 @@
     /* Initialize pState pointer */
     px = pState;
 
-    /* Initialize pCcoeffs pointer */
+    /* Initialize coefficient pointer */
     pb = pCoeffs;
 
-    /* Loop over numTaps number of values */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    /* Update filter coefficients */
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      *pb += w * (*px++);
+      pb++;
+
+      *pb += w * (*px++);
+      pb++;
+
+      *pb += w * (*px++);
+      pb++;
+
+      *pb += w * (*px++);
+      pb++;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
     tapCnt = numTaps;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (tapCnt > 0U)
     {
       /* Perform the multiply-accumulate */
       *pb += w * (*px++);
       pb++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
@@ -419,36 +507,58 @@
     /* Advance state pointer by 1 for the next sample */
     pState = pState + 1;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
+  /* Save energy and x0 values for the next frame */
   S->energy = energy;
   S->x0 = x0;
 
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the
-     satrt of the state buffer. This prepares the state buffer for the
-     next function call. */
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
 
   /* Points to the start of the pState buffer */
   pStateCurnt = S->pState;
 
-  /* Copy (numTaps - 1U) samples  */
+  /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of samples */
   tapCnt = (numTaps - 1U);
 
-  /* Copy the remaining q31_t data */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (tapCnt > 0U)
   {
     *pStateCurnt++ = *pState++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     tapCnt--;
   }
 
-#endif /*   #if defined (ARM_MATH_DSP) */
-
 }
-
+#endif /* #if defined(ARM_MATH_NEON) */
 /**
-   * @} end of LMS_NORM group
-   */
+  @} end of LMS_NORM group
+ */
diff --git a/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c b/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c
index 820c5c8..543dc72 100644
--- a/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c
+++ b/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_lms_norm_init_f32.c
  * Description:  Floating-point NLMS filter initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,41 +29,41 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup LMS_NORM
- * @{
+  @addtogroup LMS_NORM
+  @{
  */
 
-  /**
-   * @brief Initialization function for floating-point normalized LMS filter.
-   * @param[in] *S points to an instance of the floating-point LMS filter structure.
-   * @param[in] numTaps  number of filter coefficients.
-   * @param[in] *pCoeffs points to coefficient buffer.
-   * @param[in] *pState points to state buffer.
-   * @param[in] mu step size that controls filter coefficient updates.
-   * @param[in] blockSize number of samples to process.
-   * @return none.
-   *
- * \par Description:
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * The initial filter coefficients serve as a starting point for the adaptive filter.
- * <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
- * where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_norm_f32()</code>.
+/**
+  @brief         Initialization function for floating-point normalized LMS filter.
+  @param[in]     S         points to an instance of the floating-point LMS filter structure
+  @param[in]     numTaps   number of filter coefficients
+  @param[in]     pCoeffs   points to coefficient buffer
+  @param[in]     pState    points to state buffer
+  @param[in]     mu        step size that controls filter coefficient updates
+  @param[in]     blockSize number of samples to process
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+                   The initial filter coefficients serve as a starting point for the adaptive filter.
+                   <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
+                   where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_norm_f32()</code>.
  */
 
 void arm_lms_norm_init_f32(
-  arm_lms_norm_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  float32_t mu,
-  uint32_t blockSize)
+        arm_lms_norm_instance_f32 * S,
+        uint16_t numTaps,
+        float32_t * pCoeffs,
+        float32_t * pState,
+        float32_t mu,
+        uint32_t blockSize)
 {
   /* Assign filter taps */
   S->numTaps = numTaps;
@@ -85,9 +85,8 @@
 
   /* Initialise x0 to zero */
   S->x0 = 0.0f;
-
 }
 
 /**
- * @} end of LMS_NORM group
+  @} end of LMS_NORM group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c b/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c
index 4bedbd9..d581ac1 100644
--- a/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c
@@ -1,15 +1,15 @@
 /* ----------------------------------------------------------------------
  * Project:      CMSIS DSP Library
  * Title:        arm_lms_norm_init_q15.c
- * Description:  Q15 NLMS initialization function
+ * Description:  Q15 NLMS filter initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,41 +30,40 @@
 #include "arm_common_tables.h"
 
 /**
- * @addtogroup LMS_NORM
- * @{
+  @addtogroup LMS_NORM
+  @{
  */
 
-  /**
-   * @brief Initialization function for Q15 normalized LMS filter.
-   * @param[in] *S points to an instance of the Q15 normalized LMS filter structure.
-   * @param[in] numTaps  number of filter coefficients.
-   * @param[in] *pCoeffs points to coefficient buffer.
-   * @param[in] *pState points to state buffer.
-   * @param[in] mu step size that controls filter coefficient updates.
-   * @param[in] blockSize number of samples to process.
-   * @param[in] postShift bit shift applied to coefficients.
-   * @return none.
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * The initial filter coefficients serve as a starting point for the adaptive filter.
- * <code>pState</code> points to the array of state variables and size of array is
- * <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed
- * by each call to <code>arm_lms_norm_q15()</code>.
+/**
+  @brief         Initialization function for Q15 normalized LMS filter.
+  @param[in]     S         points to an instance of the Q15 normalized LMS filter structure.
+  @param[in]     numTaps   number of filter coefficients.
+  @param[in]     pCoeffs   points to coefficient buffer.
+  @param[in]     pState    points to state buffer.
+  @param[in]     mu        step size that controls filter coefficient updates.
+  @param[in]     blockSize number of samples to process.
+  @param[in]     postShift bit shift applied to coefficients.
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+                   The initial filter coefficients serve as a starting point for the adaptive filter.
+                   <code>pState</code> points to the array of state variables and size of array is
+                   <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed
+                   by each call to <code>arm_lms_norm_q15()</code>.
  */
 
 void arm_lms_norm_init_q15(
-  arm_lms_norm_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  q15_t mu,
-  uint32_t blockSize,
-  uint8_t postShift)
+        arm_lms_norm_instance_q15 * S,
+        uint16_t numTaps,
+        q15_t * pCoeffs,
+        q15_t * pState,
+        q15_t mu,
+        uint32_t blockSize,
+        uint8_t postShift)
 {
   /* Assign filter taps */
   S->numTaps = numTaps;
@@ -92,9 +91,8 @@
 
   /* Initialise x0 to zero */
   S->x0 = 0;
-
 }
 
 /**
- * @} end of LMS_NORM group
+  @} end of LMS_NORM group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c b/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c
index a2402d1..30e78ec 100644
--- a/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c
@@ -1,15 +1,15 @@
 /* ----------------------------------------------------------------------
  * Project:      CMSIS DSP Library
  * Title:        arm_lms_norm_init_q31.c
- * Description:  Q31 NLMS initialization function
+ * Description:  Q31 NLMS filter initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,40 +30,39 @@
 #include "arm_common_tables.h"
 
 /**
- * @addtogroup LMS_NORM
- * @{
+  @addtogroup LMS_NORM
+  @{
  */
 
-  /**
-   * @brief Initialization function for Q31 normalized LMS filter.
-   * @param[in] *S points to an instance of the Q31 normalized LMS filter structure.
-   * @param[in] numTaps  number of filter coefficients.
-   * @param[in] *pCoeffs points to coefficient buffer.
-   * @param[in] *pState points to state buffer.
-   * @param[in] mu step size that controls filter coefficient updates.
-   * @param[in] blockSize number of samples to process.
-   * @param[in] postShift bit shift applied to coefficients.
-   * @return none.
- *
- * <b>Description:</b>
- * \par
- * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
- * <pre>
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- * </pre>
- * The initial filter coefficients serve as a starting point for the adaptive filter.
- * <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
- * where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_norm_q31()</code>.
+/**
+  @brief         Initialization function for Q31 normalized LMS filter.
+  @param[in]     S         points to an instance of the Q31 normalized LMS filter structure.
+  @param[in]     numTaps   number of filter coefficients.
+  @param[in]     pCoeffs   points to coefficient buffer.
+  @param[in]     pState    points to state buffer.
+  @param[in]     mu        step size that controls filter coefficient updates.
+  @param[in]     blockSize number of samples to process.
+  @param[in]     postShift bit shift applied to coefficients.
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+                   The initial filter coefficients serve as a starting point for the adaptive filter.
+                   <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
+                   where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_norm_q31()</code>.
  */
 
 void arm_lms_norm_init_q31(
-  arm_lms_norm_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  q31_t mu,
-  uint32_t blockSize,
-  uint8_t postShift)
+        arm_lms_norm_instance_q31 * S,
+        uint16_t numTaps,
+        q31_t * pCoeffs,
+        q31_t * pState,
+        q31_t mu,
+        uint32_t blockSize,
+        uint8_t postShift)
 {
   /* Assign filter taps */
   S->numTaps = numTaps;
@@ -71,7 +70,7 @@
   /* Assign coefficient pointer */
   S->pCoeffs = pCoeffs;
 
-  /* Clear state buffer and size is always blockSize + numTaps - 1  */
+  /* Clear state buffer and size is always blockSize + numTaps - 1 */
   memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));
 
   /* Assign post Shift value applied to coefficients */
@@ -91,9 +90,8 @@
 
   /* Initialise x0 to zero */
   S->x0 = 0;
-
 }
 
 /**
- * @} end of LMS_NORM group
+  @} end of LMS_NORM group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c b/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c
index 70012ea..c15ad5e 100644
--- a/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c
@@ -1,15 +1,15 @@
 /* ----------------------------------------------------------------------
  * Project:      CMSIS DSP Library
  * Title:        arm_lms_norm_q15.c
- * Description:  Q15 NLMS filter
+ * Description:  Processing function for Q15 normalized LMS filter
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,68 +29,65 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup LMS_NORM
- * @{
+  @addtogroup LMS_NORM
+  @{
  */
 
 /**
-* @brief Processing function for Q15 normalized LMS filter.
-* @param[in] *S points to an instance of the Q15 normalized LMS filter structure.
-* @param[in] *pSrc points to the block of input data.
-* @param[in] *pRef points to the block of reference data.
-* @param[out] *pOut points to the block of output data.
-* @param[out] *pErr points to the block of error data.
-* @param[in] blockSize number of samples to process.
-* @return none.
-*
-* <b>Scaling and Overflow Behavior:</b>
-* \par
-* The function is implemented using a 64-bit internal accumulator.
-* Both coefficients and state variables are represented in 1.15 format and
-* multiplications yield a 2.30 result. The 2.30 intermediate results are
-* accumulated in a 64-bit accumulator in 34.30 format.
-* There is no risk of internal overflow with this approach and the full
-* precision of intermediate multiplications is preserved. After all additions
-* have been performed, the accumulator is truncated to 34.15 format by
-* discarding low 15 bits. Lastly, the accumulator is saturated to yield a
-* result in 1.15 format.
-*
-* \par
-* 	In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.
-*
+  @brief         Processing function for Q15 normalized LMS filter.
+  @param[in]     S         points to an instance of the Q15 normalized LMS filter structure
+  @param[in]     pSrc      points to the block of input data
+  @param[in]     pRef      points to the block of reference data
+  @param[out]    pOut      points to the block of output data
+  @param[out]    pErr      points to the block of error data
+  @param[in]     blockSize number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both coefficients and state variables are represented in 1.15 format and
+                   multiplications yield a 2.30 result. The 2.30 intermediate results are
+                   accumulated in a 64-bit accumulator in 34.30 format.
+                   There is no risk of internal overflow with this approach and the full
+                   precision of intermediate multiplications is preserved. After all additions
+                   have been performed, the accumulator is truncated to 34.15 format by
+                   discarding low 15 bits. Lastly, the accumulator is saturated to yield a
+                   result in 1.15 format.
+ @par
+  	               In this filter, filter coefficients are updated for each sample and the
+                   updation of filter cofficients are saturted.
  */
 
 void arm_lms_norm_q15(
-  arm_lms_norm_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pRef,
-  q15_t * pOut,
-  q15_t * pErr,
-  uint32_t blockSize)
+        arm_lms_norm_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pRef,
+        q15_t * pOut,
+        q15_t * pErr,
+        uint32_t blockSize)
 {
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
-  q15_t mu = S->mu;                              /* Adaptive factor */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  q31_t energy;                                  /* Energy of the input */
-  q63_t acc;                                     /* Accumulator */
-  q15_t e = 0, d = 0;                            /* error, reference data sample */
-  q15_t w = 0, in;                               /* weight factor and state */
-  q15_t x0;                                      /* temporary variable to hold input sample */
-  //uint32_t shift = (uint32_t) S->postShift + 1U; /* Shift to be applied to the output */
-  q15_t errorXmu, oneByEnergy;                   /* Temporary variables to store error and mu product and reciprocal of energy */
-  q15_t postShift;                               /* Post shift to be applied to weight after reciprocal calculation */
-  q31_t coef;                                    /* Teporary variable for coefficient */
-  q31_t acc_l, acc_h;
-  int32_t lShift = (15 - (int32_t) S->postShift);       /*  Post shift  */
-  int32_t uShift = (32 - lShift);
+        q15_t *pState = S->pState;                     /* State pointer */
+        q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q15_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
+        q15_t mu = S->mu;                              /* Adaptive factor */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
+        q63_t acc;                                     /* Accumulator */
+        q31_t energy;                                  /* Energy of the input */
+        q15_t e = 0, d = 0;                            /* Error, reference data sample */
+        q15_t w = 0, in;                               /* Weight factor and state */
+        q15_t x0;                                      /* Temporary variable to hold input sample */
+        q15_t errorXmu, oneByEnergy;                   /* Temporary variables to store error and mu product and reciprocal of energy */
+        q15_t postShift;                               /* Post shift to be applied to weight after reciprocal calculation */
+        q31_t coef;                                    /* Temporary variable for coefficient */
+        q31_t acc_l, acc_h;                            /* Temporary input */
+        int32_t lShift = (15 - (int32_t) S->postShift);       /*  Post shift  */
+        int32_t uShift = (32 - lShift);
 
   energy = S->energy;
   x0 = S->x0;
@@ -99,14 +96,9 @@
   /* pStateCurnt points to the location where the new input data should be written */
   pStateCurnt = &(S->pState[(numTaps - 1U)]);
 
-  /* Loop over blockSize number of values */
+  /* initialise loop count */
   blkCnt = blockSize;
 
-
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
   while (blkCnt > 0U)
   {
     /* Copy the new input sample into the state buffer */
@@ -115,197 +107,7 @@
     /* Initialize pState pointer */
     px = pState;
 
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy -= (((q31_t) x0 * (x0)) >> 15);
-    energy += (((q31_t) in * (in)) >> 15);
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    while (tapCnt > 0U)
-    {
-
-      /* Perform the multiply-accumulate */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
-      acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
-
-#else
-
-      acc += (((q31_t) * px++ * (*pb++)));
-      acc += (((q31_t) * px++ * (*pb++)));
-      acc += (((q31_t) * px++ * (*pb++)));
-      acc += (((q31_t) * px++ * (*pb++)));
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4U;
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      acc += (((q31_t) * px++ * (*pb++)));
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    /* Apply shift for lower part of acc and upper part of acc */
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Converting the result to 1.15 format and saturate the output */
-    acc = __SSAT(acc, 16U);
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q15_t) acc;
-
-    /* Compute and store error */
-    d = *pRef++;
-    e = d - (q15_t) acc;
-    *pErr++ = e;
-
-    /* Calculation of 1/energy */
-    postShift = arm_recip_q15((q15_t) energy + DELTA_Q15,
-                              &oneByEnergy, S->recipTable);
-
-    /* Calculation of e * mu value */
-    errorXmu = (q15_t) (((q31_t) e * mu) >> 15);
-
-    /* Calculation of (e * mu) * (1/energy) value */
-    acc = (((q31_t) errorXmu * oneByEnergy) >> (15 - postShift));
-
-    /* Weighting factor for the normalized version */
-    w = (q15_t) __SSAT((q31_t) acc, 16);
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Update filter coefficients */
-    while (tapCnt > 0U)
-    {
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4U;
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Read the sample from state buffer */
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1U;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Save energy and x0 values for the next frame */
-  S->energy = (q15_t) energy;
-  S->x0 = x0;
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the
-     satrt of the state buffer. This prepares the state buffer for the
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Calculation of count for copying integer writes */
-  tapCnt = (numTaps - 1U) >> 2;
-
-  while (tapCnt > 0U)
-  {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-
-#else
-
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-#endif
-
-    tapCnt--;
-
-  }
-
-  /* Calculation of count for remaining q15_t data */
-  tapCnt = (numTaps - 1U) % 0x4U;
-
-  /* copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while (blkCnt > 0U)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
+    /* Initialize coefficient pointer */
     pb = pCoeffs;
 
     /* Read the sample from input buffer */
@@ -318,13 +120,36 @@
     /* Set the accumulator to zero */
     acc = 0;
 
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
 
     while (tapCnt > 0U)
     {
       /* Perform the multiply-accumulate */
-      acc += (((q31_t) * px++ * (*pb++)));
+      /* acc +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
+      acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc);
+      acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
 
       /* Decrement the loop counter */
       tapCnt--;
@@ -342,9 +167,6 @@
     /* Converting the result to 1.15 format and saturate the output */
     acc = __SSAT(acc, 16U);
 
-    /* Converting the result to 1.15 format */
-    //acc = __SSAT((acc >> (16U - shift)), 16U);
-
     /* Store the result from accumulator into the destination buffer. */
     *pOut++ = (q15_t) acc;
 
@@ -354,8 +176,7 @@
     *pErr++ = e;
 
     /* Calculation of 1/energy */
-    postShift = arm_recip_q15((q15_t) energy + DELTA_Q15,
-                              &oneByEnergy, S->recipTable);
+    postShift = arm_recip_q15((q15_t) energy + DELTA_Q15, &oneByEnergy, S->recipTable);
 
     /* Calculation of e * mu value */
     errorXmu = (q15_t) (((q31_t) e * mu) >> 15);
@@ -369,29 +190,59 @@
     /* Initialize pState pointer */
     px = pState;
 
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
 
-    /* Loop over numTaps number of values */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    /* Update filter coefficients */
+    while (tapCnt > 0U)
+    {
+      coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT(coef, 16);
+
+      coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT(coef, 16);
+
+      coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT(coef, 16);
+
+      coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT(coef, 16);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
     tapCnt = numTaps;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (tapCnt > 0U)
     {
       /* Perform the multiply-accumulate */
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
+      coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT(coef, 16);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-    /* Read the sample from state buffer */
     x0 = *pState;
 
     /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1U;
+    pState = pState + 1;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
@@ -399,30 +250,48 @@
   S->energy = (q15_t) energy;
   S->x0 = x0;
 
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the
-     satrt of the state buffer. This prepares the state buffer for the
-     next function call. */
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
 
   /* Points to the start of the pState buffer */
   pStateCurnt = S->pState;
 
-  /* copy (numTaps - 1U) data */
+  /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState));
+    write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState));
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of samples */
   tapCnt = (numTaps - 1U);
 
-  /* copy data */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (tapCnt > 0U)
   {
     *pStateCurnt++ = *pState++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     tapCnt--;
   }
 
-#endif /*   #if defined (ARM_MATH_DSP) */
-
 }
 
-
 /**
-   * @} end of LMS_NORM group
-   */
+  @} end of LMS_NORM group
+ */
diff --git a/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c b/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c
index 9711738..e26219e 100644
--- a/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_lms_norm_q31.c
  * Description:  Processing function for the Q31 NLMS filter
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,69 +29,65 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup LMS_NORM
- * @{
+  @addtogroup LMS_NORM
+  @{
  */
 
 /**
-* @brief Processing function for Q31 normalized LMS filter.
-* @param[in] *S points to an instance of the Q31 normalized LMS filter structure.
-* @param[in] *pSrc points to the block of input data.
-* @param[in] *pRef points to the block of reference data.
-* @param[out] *pOut points to the block of output data.
-* @param[out] *pErr points to the block of error data.
-* @param[in] blockSize number of samples to process.
-* @return none.
-*
-* <b>Scaling and Overflow Behavior:</b>
-* \par
-* The function is implemented using an internal 64-bit accumulator.
-* The accumulator has a 2.62 format and maintains full precision of the intermediate
-* multiplication results but provides only a single guard bit.
-* Thus, if the accumulator result overflows it wraps around rather than clip.
-* In order to avoid overflows completely the input signal must be scaled down by
-* log2(numTaps) bits. The reference signal should not be scaled down.
-* After all multiply-accumulates are performed, the 2.62 accumulator is shifted
-* and saturated to 1.31 format to yield the final result.
-* The output signal and error signal are in 1.31 format.
-*
-* \par
-* 	In this filter, filter coefficients are updated for each sample and the
-* updation of filter cofficients are saturted.
-*
-*/
+  @brief         Processing function for Q31 normalized LMS filter.
+  @param[in]     S         points to an instance of the Q31 normalized LMS filter structure
+  @param[in]     pSrc      points to the block of input data
+  @param[in]     pRef      points to the block of reference data
+  @param[out]    pOut      points to the block of output data
+  @param[out]    pErr      points to the block of error data
+  @param[in]     blockSize number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate
+                   multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clip.
+                   In order to avoid overflows completely the input signal must be scaled down by
+                   log2(numTaps) bits. The reference signal should not be scaled down.
+                   After all multiply-accumulates are performed, the 2.62 accumulator is shifted
+                   and saturated to 1.31 format to yield the final result.
+                   The output signal and error signal are in 1.31 format.
+ @par
+  	               In this filter, filter coefficients are updated for each sample and the
+                   updation of filter cofficients are saturted.
+ */
 
 void arm_lms_norm_q31(
-  arm_lms_norm_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pRef,
-  q31_t * pOut,
-  q31_t * pErr,
-  uint32_t blockSize)
+        arm_lms_norm_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pRef,
+        q31_t * pOut,
+        q31_t * pErr,
+        uint32_t blockSize)
 {
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
-  q31_t mu = S->mu;                              /* Adaptive factor */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  q63_t energy;                                  /* Energy of the input */
-  q63_t acc;                                     /* Accumulator */
-  q31_t e = 0, d = 0;                            /* error, reference data sample */
-  q31_t w = 0, in;                               /* weight factor and state */
-  q31_t x0;                                      /* temporary variable to hold input sample */
-//  uint32_t shift = 32U - ((uint32_t) S->postShift + 1U);        /* Shift to be applied to the output */
-  q31_t errorXmu, oneByEnergy;                   /* Temporary variables to store error and mu product and reciprocal of energy */
-  q31_t postShift;                               /* Post shift to be applied to weight after reciprocal calculation */
-  q31_t coef;                                    /* Temporary variable for coef */
-  q31_t acc_l, acc_h;                            /*  temporary input */
-  uint32_t uShift = ((uint32_t) S->postShift + 1U);
-  uint32_t lShift = 32U - uShift;                /*  Shift to be applied to the output */
+        q31_t *pState = S->pState;                     /* State pointer */
+        q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q31_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
+        q31_t mu = S->mu;                              /* Adaptive factor */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
+        q63_t acc;                                     /* Accumulator */
+        q63_t energy;                                  /* Energy of the input */
+        q31_t e = 0;                                   /* Error data sample */
+        q31_t w = 0, in;                               /* Weight factor and state */
+        q31_t x0;                                      /* Temporary variable to hold input sample */
+        q31_t errorXmu, oneByEnergy;                   /* Temporary variables to store error and mu product and reciprocal of energy */
+        q31_t postShift;                               /* Post shift to be applied to weight after reciprocal calculation */
+        q31_t coef;                                    /* Temporary variable for coef */
+        q31_t acc_l, acc_h;                            /* Temporary input */
+        uint32_t uShift = ((uint32_t) S->postShift + 1U);
+        uint32_t lShift = 32U - uShift;                /*  Shift to be applied to the output */
 
   energy = S->energy;
   x0 = S->x0;
@@ -100,55 +96,64 @@
   /* pStateCurnt points to the location where the new input data should be written */
   pStateCurnt = &(S->pState[(numTaps - 1U)]);
 
-  /* Loop over blockSize number of values */
+  /* initialise loop count */
   blkCnt = blockSize;
 
-
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
   while (blkCnt > 0U)
   {
-
     /* Copy the new input sample into the state buffer */
     *pStateCurnt++ = *pSrc;
 
     /* Initialize pState pointer */
     px = pState;
 
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
 
     /* Read the sample from input buffer */
     in = *pSrc++;
 
     /* Update the energy calculation */
-    energy = (q31_t) ((((q63_t) energy << 32) -
-                       (((q63_t) x0 * x0) << 1)) >> 32);
+    energy = (q31_t) ((((q63_t) energy << 32) - (((q63_t) x0 * x0) << 1)) >> 32);
     energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32);
 
     /* Set the accumulator to zero */
     acc = 0;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
 
     while (tapCnt > 0U)
     {
       /* Perform the multiply-accumulate */
-      acc += ((q63_t) (*px++)) * (*pb++);
-      acc += ((q63_t) (*px++)) * (*pb++);
-      acc += ((q63_t) (*px++)) * (*pb++);
+      /* acc +=  b[N] * x[n-N] */
       acc += ((q63_t) (*px++)) * (*pb++);
 
-      /* Decrement the loop counter */
+      /* acc +=  b[N-1] * x[n-N-1] */
+      acc += ((q63_t) (*px++)) * (*pb++);
+
+      /* acc +=  b[N-2] * x[n-N-2] */
+      acc += ((q63_t) (*px++)) * (*pb++);
+
+      /* acc +=  b[N-3] * x[n-N-3] */
+      acc += ((q63_t) (*px++)) * (*pb++);
+
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    /* Loop unrolling: Compute remaining taps */
     tapCnt = numTaps % 0x4U;
 
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (tapCnt > 0U)
     {
       /* Perform the multiply-accumulate */
@@ -171,13 +176,11 @@
     *pOut++ = (q31_t) acc;
 
     /* Compute and store error */
-    d = *pRef++;
-    e = d - (q31_t) acc;
+    e = *pRef++ - (q31_t) acc;
     *pErr++ = e;
 
     /* Calculates the reciprocal of energy */
-    postShift = arm_recip_q31(energy + DELTA_Q31,
-                              &oneByEnergy, &S->recipTable[0]);
+    postShift = arm_recip_q31(energy + DELTA_Q31, &oneByEnergy, &S->recipTable[0]);
 
     /* Calculation of product of (e * mu) */
     errorXmu = (q31_t) (((q63_t) e * mu) >> 31);
@@ -188,11 +191,13 @@
     /* Initialize pState pointer */
     px = pState;
 
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
 
     /* Update filter coefficients */
     while (tapCnt > 0U)
@@ -218,162 +223,28 @@
       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
       pb++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    /* Loop unrolling: Compute remaining taps */
     tapCnt = numTaps % 0x4U;
 
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Read the sample from state buffer */
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Save energy and x0 values for the next frame */
-  S->energy = (q31_t) energy;
-  S->x0 = x0;
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the
-     satrt of the state buffer. This prepares the state buffer for the
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Loop unrolling for (numTaps - 1U) samples copy */
-  tapCnt = (numTaps - 1U) >> 2U;
-
-  /* copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1U) % 0x4U;
-
-  /* Copy the remaining q31_t data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  while (blkCnt > 0U)
-  {
-
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy =
-      (q31_t) ((((q63_t) energy << 32) - (((q63_t) x0 * x0) << 1)) >> 32);
-    energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32);
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop over numTaps number of values */
+    /* Initialize tapCnt with number of samples */
     tapCnt = numTaps;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (tapCnt > 0U)
     {
       /* Perform the multiply-accumulate */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Converting the result to 1.31 format */
-    /* Converting the result to 1.31 format */
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-
-    //acc = (q31_t) (acc >> shift);
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q31_t) acc;
-
-    /* Compute and store error */
-    d = *pRef++;
-    e = d - (q31_t) acc;
-    *pErr++ = e;
-
-    /* Calculates the reciprocal of energy */
-    postShift =
-      arm_recip_q31(energy + DELTA_Q31, &oneByEnergy, &S->recipTable[0]);
-
-    /* Calculation of product of (e * mu) */
-    errorXmu = (q31_t) (((q63_t) e * mu) >> 31);
-
-    /* Weighting factor for the normalized version */
-    w = clip_q63_to_q31(((q63_t) errorXmu * oneByEnergy) >> (31 - postShift));
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      /* coef is in 2.30 format */
       coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      /* get coef in 1.31 format by left shifting */
       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
-      /* update coefficient buffer to next coefficient */
       pb++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
@@ -383,7 +254,7 @@
     /* Advance state pointer by 1 for the next sample */
     pState = pState + 1;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
@@ -391,29 +262,50 @@
   S->energy = (q31_t) energy;
   S->x0 = x0;
 
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the
-     start of the state buffer. This prepares the state buffer for the
-     next function call. */
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
 
   /* Points to the start of the pState buffer */
   pStateCurnt = S->pState;
 
-  /* Loop for (numTaps - 1U) samples copy */
+  /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of samples */
   tapCnt = (numTaps - 1U);
 
-  /* Copy the remaining q31_t data */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (tapCnt > 0U)
   {
     *pStateCurnt++ = *pState++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     tapCnt--;
   }
 
-#endif /*   #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of LMS_NORM group
+  @} end of LMS_NORM group
  */
diff --git a/DSP/Source/FilteringFunctions/arm_lms_q15.c b/DSP/Source/FilteringFunctions/arm_lms_q15.c
index 6690294..0fc9878 100644
--- a/DSP/Source/FilteringFunctions/arm_lms_q15.c
+++ b/DSP/Source/FilteringFunctions/arm_lms_q15.c
@@ -1,15 +1,15 @@
 /* ----------------------------------------------------------------------
  * Project:      CMSIS DSP Library
  * Title:        arm_lms_q15.c
- * Description:  Processing function for the Q15 LMS filter
+ * Description:  Processing function for Q15 LMS filter
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -27,73 +27,66 @@
  */
 
 #include "arm_math.h"
+
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup LMS
- * @{
+  @addtogroup LMS
+  @{
  */
 
- /**
- * @brief Processing function for Q15 LMS filter.
- * @param[in] *S points to an instance of the Q15 LMS filter structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[in] *pRef points to the block of reference data.
- * @param[out] *pOut points to the block of output data.
- * @param[out] *pErr points to the block of error data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- *
- * \par Scaling and Overflow Behavior:
- * The function is implemented using a 64-bit internal accumulator.
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.
- *
- * \par
- * 	In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.
- *
+/**
+  @brief         Processing function for Q15 LMS filter.
+  @param[in]     S         points to an instance of the Q15 LMS filter structure
+  @param[in]     pSrc      points to the block of input data
+  @param[in]     pRef      points to the block of reference data
+  @param[out]    pOut      points to the block of output data
+  @param[out]    pErr      points to the block of error data
+  @param[in]     blockSize number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+                   Lastly, the accumulator is saturated to yield a result in 1.15 format.
+  @par
+                   In this filter, filter coefficients are updated for each sample and
+                   the updation of filter cofficients are saturted.
  */
 
 void arm_lms_q15(
   const arm_lms_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pRef,
-  q15_t * pOut,
-  q15_t * pErr,
-  uint32_t blockSize)
+  const q15_t * pSrc,
+        q15_t * pRef,
+        q15_t * pOut,
+        q15_t * pErr,
+        uint32_t blockSize)
 {
-  q15_t *pState = S->pState;                     /* State pointer */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t mu = S->mu;                              /* Adaptive factor */
-  q15_t *px;                                     /* Temporary pointer for state */
-  q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  q63_t acc;                                     /* Accumulator */
-  q15_t e = 0;                                   /* error of data sample */
-  q15_t alpha;                                   /* Intermediate constant for taps update */
-  q31_t coef;                                    /* Teporary variable for coefficient */
-  q31_t acc_l, acc_h;
-  int32_t lShift = (15 - (int32_t) S->postShift);       /*  Post shift  */
-  int32_t uShift = (32 - lShift);
-
-
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
+        q15_t *pState = S->pState;                     /* State pointer */
+        q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q15_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
+        q15_t mu = S->mu;                              /* Adaptive factor */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
+        q63_t acc;                                     /* Accumulator */
+        q15_t e = 0;                                   /* Error of data sample */
+        q15_t alpha;                                   /* Intermediate constant for taps update */
+        q31_t coef;                                    /* Temporary variable for coefficient */
+        q31_t acc_l, acc_h;                            /* Temporary input */
+        int32_t lShift = (15 - (int32_t) S->postShift);       /*  Post shift  */
+        int32_t uShift = (32 - lShift);
 
   /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
   /* pStateCurnt points to the location where the new input data should be written */
   pStateCurnt = &(S->pState[(numTaps - 1U)]);
 
-  /* Initializing blkCnt with blockSize */
+  /* initialise loop count */
   blkCnt = blockSize;
 
   while (blkCnt > 0U)
@@ -101,7 +94,7 @@
     /* Copy the new input sample into the state buffer */
     *pStateCurnt++ = *pSrc++;
 
-    /* Initialize state pointer */
+    /* Initialize pState pointer */
     px = pState;
 
     /* Initialize coefficient pointer */
@@ -110,35 +103,32 @@
     /* Set the accumulator to zero */
     acc = 0;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
     tapCnt = numTaps >> 2U;
 
     while (tapCnt > 0U)
     {
-      /* acc +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
       /* Perform the multiply-accumulate */
-#ifndef UNALIGNED_SUPPORT_DISABLE
+      /* acc +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
+      acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc);
+      acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc);
 
-      acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
-      acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
-
-#else
-
-      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
-      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
-      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
-      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
-
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    /* Loop unrolling: Compute remaining taps */
     tapCnt = numTaps % 0x4U;
 
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (tapCnt > 0U)
     {
       /* Perform the multiply-accumulate */
@@ -158,211 +148,115 @@
     acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
 
     /* Converting the result to 1.15 format and saturate the output */
-    acc = __SSAT(acc, 16);
+    acc = __SSAT(acc, 16U);
 
     /* Store the result from accumulator into the destination buffer. */
     *pOut++ = (q15_t) acc;
 
     /* Compute and store error */
     e = *pRef++ - (q15_t) acc;
-
     *pErr++ = (q15_t) e;
 
     /* Compute alpha i.e. intermediate constant for taps update */
     alpha = (q15_t) (((q31_t) e * (mu)) >> 15);
 
-    /* Initialize state pointer */
+    /* Initialize pState pointer */
     /* Advance state pointer by 1 for the next sample */
     px = pState++;
 
     /* Initialize coefficient pointer */
     pb = pCoeffs;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
     tapCnt = numTaps >> 2U;
 
     /* Update filter coefficients */
     while (tapCnt > 0U)
     {
-      coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
+      coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
       *pb++ = (q15_t) __SSAT((coef), 16);
 
-      /* Decrement the loop counter */
+      coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT((coef), 16);
+
+      coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT((coef), 16);
+
+      coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT((coef), 16);
+
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    /* Loop unrolling: Compute remaining taps */
     tapCnt = numTaps % 0x4U;
 
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (tapCnt > 0U)
     {
       /* Perform the multiply-accumulate */
-      coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
+      coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
       *pb++ = (q15_t) __SSAT((coef), 16);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
-
   }
 
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the
-     satrt of the state buffer. This prepares the state buffer for the
-     next function call. */
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
 
   /* Points to the start of the pState buffer */
   pStateCurnt = S->pState;
 
-  /* Calculation of count for copying integer writes */
-  tapCnt = (numTaps - 1U) >> 2;
-
-  while (tapCnt > 0U)
-  {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-#else
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-#endif
-
-    tapCnt--;
-
-  }
-
-  /* Calculation of count for remaining q15_t data */
-  tapCnt = (numTaps - 1U) % 0x4U;
-
   /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = (numTaps - 1U) >> 2U;
+
   while (tapCnt > 0U)
   {
-    *pStateCurnt++ = *pState++;
+    write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState));
+    write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState));
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     tapCnt--;
   }
 
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while (blkCnt > 0U)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      acc += (q63_t) ((q31_t) (*px++) * (*pb++));
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    /* Apply shift for lower part of acc and upper part of acc */
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Converting the result to 1.15 format and saturate the output */
-    acc = __SSAT(acc, 16);
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q15_t) acc;
-
-    /* Compute and store error */
-    e = *pRef++ - (q15_t) acc;
-
-    *pErr++ = (q15_t) e;
-
-    /* Compute alpha i.e. intermediate constant for taps update */
-    alpha = (q15_t) (((q31_t) e * (mu)) >> 15);
-
-    /* Initialize pState pointer */
-    /* Advance state pointer by 1 for the next sample */
-    px = pState++;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Decrement the loop counter */
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the
-     start of the state buffer. This prepares the state buffer for the
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /*  Copy (numTaps - 1U) samples  */
+  /* Initialize tapCnt with number of samples */
   tapCnt = (numTaps - 1U);
 
-  /* Copy the data */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (tapCnt > 0U)
   {
     *pStateCurnt++ = *pState++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     tapCnt--;
   }
 
-#endif /*   #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
-   * @} end of LMS group
-   */
+  @} end of LMS group
+ */
diff --git a/DSP/Source/FilteringFunctions/arm_lms_q31.c b/DSP/Source/FilteringFunctions/arm_lms_q31.c
index 816e589..b0c0e27 100644
--- a/DSP/Source/FilteringFunctions/arm_lms_q31.c
+++ b/DSP/Source/FilteringFunctions/arm_lms_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_lms_q31.c
  * Description:  Processing function for the Q31 LMS filter
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -27,83 +27,78 @@
  */
 
 #include "arm_math.h"
+
 /**
- * @ingroup groupFilters
+  @ingroup groupFilters
  */
 
 /**
- * @addtogroup LMS
- * @{
+  @addtogroup LMS
+  @{
  */
 
- /**
- * @brief Processing function for Q31 LMS filter.
- * @param[in]  *S points to an instance of the Q15 LMS filter structure.
- * @param[in]  *pSrc points to the block of input data.
- * @param[in]  *pRef points to the block of reference data.
- * @param[out] *pOut points to the block of output data.
- * @param[out] *pErr points to the block of error data.
- * @param[in]  blockSize number of samples to process.
- * @return     none.
- *
- * \par Scaling and Overflow Behavior:
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate
- * multiplication results but provides only a single guard bit.
- * Thus, if the accumulator result overflows it wraps around rather than clips.
- * In order to avoid overflows completely the input signal must be scaled down by
- * log2(numTaps) bits.
- * The reference signal should not be scaled down.
- * After all multiply-accumulates are performed, the 2.62 accumulator is shifted
- * and saturated to 1.31 format to yield the final result.
- * The output signal and error signal are in 1.31 format.
- *
- * \par
- * 	In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.
+/**
+  @brief         Processing function for Q31 LMS filter.
+  @param[in]     S         points to an instance of the Q31 LMS filter structure.
+  @param[in]     pSrc      points to the block of input data.
+  @param[in]     pRef      points to the block of reference data.
+  @param[out]    pOut      points to the block of output data.
+  @param[out]    pErr      points to the block of error data.
+  @param[in]     blockSize number of samples to process.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate
+                   multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clips.
+                   In order to avoid overflows completely the input signal must be scaled down by
+                   log2(numTaps) bits.
+                   The reference signal should not be scaled down.
+                   After all multiply-accumulates are performed, the 2.62 accumulator is shifted
+                   and saturated to 1.31 format to yield the final result.
+                   The output signal and error signal are in 1.31 format.
+ @par
+                   In this filter, filter coefficients are updated for each sample and
+                   the updation of filter cofficients are saturted.
  */
 
 void arm_lms_q31(
   const arm_lms_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pRef,
-  q31_t * pOut,
-  q31_t * pErr,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t mu = S->mu;                              /* Adaptive factor */
-  q31_t *px;                                     /* Temporary pointer for state */
-  q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  q63_t acc;                                     /* Accumulator */
-  q31_t e = 0;                                   /* error of data sample */
-  q31_t alpha;                                   /* Intermediate constant for taps update */
-  q31_t coef;                                    /* Temporary variable for coef */
-  q31_t acc_l, acc_h;                            /*  temporary input */
-  uint32_t uShift = ((uint32_t) S->postShift + 1U);
-  uint32_t lShift = 32U - uShift;                /*  Shift to be applied to the output */
+  const q31_t * pSrc,
+        q31_t * pRef,
+        q31_t * pOut,
+        q31_t * pErr,
+        uint32_t blockSize)
+{       
+        q31_t *pState = S->pState;                     /* State pointer */
+        q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q31_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
+        q31_t mu = S->mu;                              /* Adaptive factor */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
+        q63_t acc;                                     /* Accumulator */
+        q31_t e = 0;                                   /* Error of data sample */
+        q31_t alpha;                                   /* Intermediate constant for taps update */
+        q31_t coef;                                    /* Temporary variable for coef */
+        q31_t acc_l, acc_h;                            /* Temporary input */
+        uint32_t uShift = ((uint32_t) S->postShift + 1U);
+        uint32_t lShift = 32U - uShift;                /*  Shift to be applied to the output */
 
   /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
   /* pStateCurnt points to the location where the new input data should be written */
   pStateCurnt = &(S->pState[(numTaps - 1U)]);
 
-  /* Initializing blkCnt with blockSize */
+  /* initialise loop count */
   blkCnt = blockSize;
 
-
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
   while (blkCnt > 0U)
   {
     /* Copy the new input sample into the state buffer */
     *pStateCurnt++ = *pSrc++;
 
-    /* Initialize state pointer */
+    /* Initialize pState pointer */
     px = pState;
 
     /* Initialize coefficient pointer */
@@ -112,8 +107,10 @@
     /* Set the accumulator to zero */
     acc = 0;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
 
     while (tapCnt > 0U)
     {
@@ -130,13 +127,20 @@
       /* acc +=  b[N-3] * x[n-N-3] */
       acc += ((q63_t) (*px++)) * (*pb++);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    /* Loop unrolling: Compute remaining taps */
     tapCnt = numTaps % 0x4U;
 
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (tapCnt > 0U)
     {
       /* Perform the multiply-accumulate */
@@ -160,25 +164,28 @@
 
     /* Compute and store error */
     e = *pRef++ - (q31_t) acc;
-
-    *pErr++ = (q31_t) e;
+    *pErr++ = e;
 
     /* Compute alpha i.e. intermediate constant for taps update */
     alpha = (q31_t) (((q63_t) e * mu) >> 31);
 
-    /* Initialize state pointer */
+    /* Initialize pState pointer */
     /* Advance state pointer by 1 for the next sample */
     px = pState++;
 
     /* Initialize coefficient pointer */
     pb = pCoeffs;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
 
     /* Update filter coefficients */
     while (tapCnt > 0U)
     {
+      /* Perform the multiply-accumulate */
+
       /* coef is in 2.30 format */
       coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
       /* get coef in 1.31 format by left shifting */
@@ -198,121 +205,19 @@
       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
       pb++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    /* Loop unrolling: Compute remaining taps */
     tapCnt = numTaps % 0x4U;
 
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the
-     satrt of the state buffer. This prepares the state buffer for the
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Loop unrolling for (numTaps - 1U) samples copy */
-  tapCnt = (numTaps - 1U) >> 2U;
-
-  /* copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1U) % 0x4U;
-
-  /* Copy the remaining q31_t data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  while (blkCnt > 0U)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop over numTaps number of values */
+    /* Initialize tapCnt with number of samples */
     tapCnt = numTaps;
 
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Converting the result to 1.31 format */
-    /* Store the result from accumulator into the destination buffer. */
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    *pOut++ = (q31_t) acc;
-
-    /* Compute and store error */
-    e = *pRef++ - (q31_t) acc;
-
-    *pErr++ = (q31_t) e;
-
-    /* Weighting factor for the LMS version */
-    alpha = (q31_t) (((q63_t) e * mu) >> 31);
-
-    /* Initialize pState pointer */
-    /* Advance state pointer by 1 for the next sample */
-    px = pState++;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
     while (tapCnt > 0U)
     {
@@ -321,37 +226,58 @@
       *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
       pb++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       tapCnt--;
     }
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the
-     start of the state buffer. This prepares the state buffer for the
-     next function call. */
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
 
   /* Points to the start of the pState buffer */
   pStateCurnt = S->pState;
 
-  /*  Copy (numTaps - 1U) samples  */
+  /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of samples */
   tapCnt = (numTaps - 1U);
 
-  /* Copy the data */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (tapCnt > 0U)
   {
     *pStateCurnt++ = *pState++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     tapCnt--;
   }
 
-#endif /*   #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
-   * @} end of LMS group
-   */
+  @} end of LMS group
+ */
diff --git a/DSP/Source/MatrixFunctions/CMakeLists.txt b/DSP/Source/MatrixFunctions/CMakeLists.txt
new file mode 100644
index 0000000..d48d6b1
--- /dev/null
+++ b/DSP/Source/MatrixFunctions/CMakeLists.txt
@@ -0,0 +1,16 @@
+cmake_minimum_required (VERSION 3.6)
+
+project(CMSISDSPMatrix)
+
+
+file(GLOB SRC "./*_*.c")
+
+add_library(CMSISDSPMatrix STATIC ${SRC})
+
+configdsp(CMSISDSPMatrix ..)
+
+### Includes
+target_include_directories(CMSISDSPMatrix PUBLIC "${DSP}/../../Include")
+
+
+
diff --git a/DSP/Source/MatrixFunctions/MatrixFunctions.c b/DSP/Source/MatrixFunctions/MatrixFunctions.c
new file mode 100644
index 0000000..da721fe
--- /dev/null
+++ b/DSP/Source/MatrixFunctions/MatrixFunctions.c
@@ -0,0 +1,53 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        MatrixFunctions.c
+ * Description:  Combination of all matrix function source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_mat_add_f32.c"
+#include "arm_mat_add_q15.c"
+#include "arm_mat_add_q31.c"
+#include "arm_mat_cmplx_mult_f32.c"
+#include "arm_mat_cmplx_mult_q15.c"
+#include "arm_mat_cmplx_mult_q31.c"
+#include "arm_mat_init_f32.c"
+#include "arm_mat_init_q15.c"
+#include "arm_mat_init_q31.c"
+#include "arm_mat_inverse_f32.c"
+#include "arm_mat_inverse_f64.c"
+#include "arm_mat_mult_f32.c"
+#include "arm_mat_mult_fast_q15.c"
+#include "arm_mat_mult_fast_q31.c"
+#include "arm_mat_mult_q15.c"
+#include "arm_mat_mult_q31.c"
+#include "arm_mat_scale_f32.c"
+#include "arm_mat_scale_q15.c"
+#include "arm_mat_scale_q31.c"
+#include "arm_mat_sub_f32.c"
+#include "arm_mat_sub_q15.c"
+#include "arm_mat_sub_q31.c"
+#include "arm_mat_trans_f32.c"
+#include "arm_mat_trans_q15.c"
+#include "arm_mat_trans_q31.c"
diff --git a/DSP/Source/MatrixFunctions/arm_mat_add_f32.c b/DSP/Source/MatrixFunctions/arm_mat_add_f32.c
index 4a54049..8e1246c 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_add_f32.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_add_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_mat_add_f32.c
  * Description:  Floating-point matrix addition
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,35 +29,43 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
  */
 
 /**
- * @defgroup MatrixAdd Matrix Addition
- *
- * Adds two matrices.
- * \image html MatrixAddition.gif "Addition of two 3 x 3 matrices"
- *
- * The functions check to make sure that
- * <code>pSrcA</code>, <code>pSrcB</code>, and <code>pDst</code> have the same
- * number of rows and columns.
+  @defgroup MatrixAdd Matrix Addition
+
+  Adds two matrices.
+  \image html MatrixAddition.gif "Addition of two 3 x 3 matrices"
+
+  The functions check to make sure that
+  <code>pSrcA</code>, <code>pSrcB</code>, and <code>pDst</code> have the same
+  number of rows and columns.
  */
 
 /**
- * @addtogroup MatrixAdd
- * @{
+  @addtogroup MatrixAdd
+  @{
  */
 
 
 /**
- * @brief Floating-point matrix addition.
- * @param[in]       *pSrcA points to the first input matrix structure
- * @param[in]       *pSrcB points to the second input matrix structure
- * @param[out]      *pDst points to output matrix structure
- * @return     		The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+  @brief         Floating-point matrix addition.
+  @param[in]     pSrcA      points to first input matrix structure
+  @param[in]     pSrcB      points to second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
  */
+#if defined(ARM_MATH_NEON)
+/*
 
+Neon version is assuming the matrix is small enough.
+So no blocking is used for taking into account cache effects.
+For big matrix, there exist better libraries for Neon.
+
+*/
 arm_status arm_mat_add_f32(
   const arm_matrix_instance_f32 * pSrcA,
   const arm_matrix_instance_f32 * pSrcB,
@@ -67,12 +75,8 @@
   float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B  */
   float32_t *pOut = pDst->pData;                 /* output data matrix pointer   */
 
-#if defined (ARM_MATH_DSP)
-
   float32_t inA1, inA2, inB1, inB2, out1, out2;  /* temporary variables */
 
-#endif //      #if defined (ARM_MATH_DSP)
-
   uint32_t numSamples;                           /* total number of elements in the matrix  */
   uint32_t blkCnt;                               /* loop counters */
   arm_status status;                             /* status of matrix addition */
@@ -89,69 +93,27 @@
   else
 #endif
   {
+    float32x4_t vec1;
+    float32x4_t vec2;
+    float32x4_t res;
 
     /* Total number of samples in the input matrix */
     numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
 
-#if defined (ARM_MATH_DSP)
-
-    /* Loop unrolling */
     blkCnt = numSamples >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+    /* Compute 4 outputs at a time.
      ** a second loop below computes the remaining 1 to 3 samples. */
     while (blkCnt > 0U)
     {
       /* C(m,n) = A(m,n) + B(m,n) */
       /* Add and then store the results in the destination buffer. */
-      /* Read values from source A */
-      inA1 = pIn1[0];
+      vec1 = vld1q_f32(pIn1);
+      vec2 = vld1q_f32(pIn2);
+      res = vaddq_f32(vec1, vec2);
+      vst1q_f32(pOut, res);
 
-      /* Read values from source B */
-      inB1 = pIn2[0];
-
-      /* Read values from source A */
-      inA2 = pIn1[1];
-
-      /* out = sourceA + sourceB */
-      out1 = inA1 + inB1;
-
-      /* Read values from source B */
-      inB2 = pIn2[1];
-
-      /* Read values from source A */
-      inA1 = pIn1[2];
-
-      /* out = sourceA + sourceB */
-      out2 = inA2 + inB2;
-
-      /* Read values from source B */
-      inB1 = pIn2[2];
-
-      /* Store result in destination */
-      pOut[0] = out1;
-      pOut[1] = out2;
-
-      /* Read values from source A */
-      inA2 = pIn1[3];
-
-      /* Read values from source B */
-      inB2 = pIn2[3];
-
-      /* out = sourceA + sourceB */
-      out1 = inA1 + inB1;
-
-      /* out = sourceA + sourceB */
-      out2 = inA2 + inB2;
-
-      /* Store result in destination */
-      pOut[2] = out1;
-
-      /* Store result in destination */
-      pOut[3] = out2;
-
-
-      /* update pointers to process next sampels */
+      /* update pointers to process next samples */
       pIn1 += 4U;
       pIn2 += 4U;
       pOut += 4U;
@@ -163,15 +125,6 @@
      ** No loop unrolling is used. */
     blkCnt = numSamples % 0x4U;
 
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
     while (blkCnt > 0U)
     {
       /* C(m,n) = A(m,n) + B(m,n) */
@@ -184,13 +137,96 @@
 
     /* set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
-
   }
 
   /* Return to application */
   return (status);
 }
+#else
+arm_status arm_mat_add_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+        arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pInA = pSrcA->pData;                /* input data matrix pointer A */
+  float32_t *pInB = pSrcB->pData;                /* input data matrix pointer B */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
+
+  uint32_t numSamples;                           /* total number of elements in the matrix */
+  uint32_t blkCnt;                               /* loop counters */
+  arm_status status;                             /* status of matrix addition */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) + B(m,n) */
+
+      /* Add and store result in destination buffer. */
+      *pOut++ = *pInA++ + *pInB++;
+
+      *pOut++ = *pInA++ + *pInB++;
+
+      *pOut++ = *pInA++ + *pInB++;
+
+      *pOut++ = *pInA++ + *pInB++;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) + B(m,n) */
+
+      /* Add and store result in destination buffer. */
+      *pOut++ = *pInA++ + *pInB++;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
 
 /**
- * @} end of MatrixAdd group
+  @} end of MatrixAdd group
  */
diff --git a/DSP/Source/MatrixFunctions/arm_mat_add_q15.c b/DSP/Source/MatrixFunctions/arm_mat_add_q15.c
index 896e60c..2aaf849 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_add_q15.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_add_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_mat_add_q15.c
  * Description:  Q15 matrix addition
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,116 +29,114 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
  */
 
 /**
- * @addtogroup MatrixAdd
- * @{
+  @addtogroup MatrixAdd
+  @{
  */
 
 /**
- * @brief Q15 matrix addition.
- * @param[in]       *pSrcA points to the first input matrix structure
- * @param[in]       *pSrcB points to the second input matrix structure
- * @param[out]      *pDst points to output matrix structure
- * @return     		The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
+  @brief         Q15 matrix addition.
+  @param[in]     pSrcA      points to first input matrix structure
+  @param[in]     pSrcB      points to second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
  */
 
 arm_status arm_mat_add_q15(
   const arm_matrix_instance_q15 * pSrcA,
   const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst)
+        arm_matrix_instance_q15 * pDst)
 {
-  q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A  */
-  q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
-  q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  uint16_t numSamples;                           /* total number of elements in the matrix  */
-  uint32_t blkCnt;                               /* loop counters  */
-  arm_status status;                             /* status of matrix addition  */
+        q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
+        q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
+        q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
+        
+        uint32_t numSamples;                           /* total number of elements in the matrix */
+        uint32_t blkCnt;                               /* loop counters */
+        arm_status status;                             /* status of matrix addition */
 
 #ifdef ARM_MATH_MATRIX_CHECK
 
-
   /* Check for matrix mismatch condition */
   if ((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
   {
     /* Set status as ARM_MATH_SIZE_MISMATCH */
     status = ARM_MATH_SIZE_MISMATCH;
   }
   else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
 
   {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint16_t) (pSrcA->numRows * pSrcA->numCols);
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
 
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) + B(m,n) */
+
+      /* Add, saturate and store result in destination buffer. */
 #if defined (ARM_MATH_DSP)
+      write_q15x2_ia (&pOut, __QADD16(read_q15x2_ia (&pInA), read_q15x2_ia (&pInB)));
 
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
+      write_q15x2_ia (&pOut, __QADD16(read_q15x2_ia (&pInA), read_q15x2_ia (&pInB)));
+#else
+      *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
 
-    /* Loop unrolling */
-    blkCnt = (uint32_t) numSamples >> 2U;
+      *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
 
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add, Saturate and then store the results in the destination buffer. */
-      *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
-      *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
+      *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
 
-      /* Decrement the loop counter */
+      *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
+#endif
+
+      /* Decrement loop counter */
       blkCnt--;
     }
 
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
-    blkCnt = (uint32_t) numSamples % 0x4U;
-
-    /* q15 pointers of input and output are initialized */
-
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add, Saturate and then store the results in the destination buffer. */
-      *pOut++ = (q15_t) __QADD16(*pInA++, *pInB++);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
 
 #else
 
-    /* Run the below code for Cortex-M0 */
-
     /* Initialize blkCnt with number of samples */
-    blkCnt = (uint32_t) numSamples;
+    blkCnt = numSamples;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
-    /* q15 pointers of input and output are initialized */
     while (blkCnt > 0U)
     {
       /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add, Saturate and then store the results in the destination buffer. */
-      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ + *pInB++), 16);
 
-      /* Decrement the loop counter */
+      /* Add, saturate and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+      *pOut++ = (q15_t) __QADD16(*pInA++, *pInB++);
+#else
+      *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
+#endif
+
+      /* Decrement loop counter */
       blkCnt--;
     }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
-    /* set status as ARM_MATH_SUCCESS */
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
 
@@ -147,5 +145,5 @@
 }
 
 /**
- * @} end of MatrixAdd group
+  @} end of MatrixAdd group
  */
diff --git a/DSP/Source/MatrixFunctions/arm_mat_add_q31.c b/DSP/Source/MatrixFunctions/arm_mat_add_q31.c
index f230ad2..6194809 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_add_q31.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_add_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_mat_add_q31.c
  * Description:  Q31 matrix addition
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,160 +29,104 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
  */
 
 /**
- * @addtogroup MatrixAdd
- * @{
+  @addtogroup MatrixAdd
+  @{
  */
 
 /**
- * @brief Q31 matrix addition.
- * @param[in]       *pSrcA points to the first input matrix structure
- * @param[in]       *pSrcB points to the second input matrix structure
- * @param[out]      *pDst points to output matrix structure
- * @return     		The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
+  @brief         Q31 matrix addition.
+  @param[in]     pSrcA      points to first input matrix structure
+  @param[in]     pSrcB      points to second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
  */
 
 arm_status arm_mat_add_q31(
   const arm_matrix_instance_q31 * pSrcA,
   const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst)
+        arm_matrix_instance_q31 * pDst)
 {
-  q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
+  q31_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
+  q31_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
   q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  q31_t inA1, inB1;                              /* temporary variables */
 
-#if defined (ARM_MATH_DSP)
-
-  q31_t inA2, inB2;                              /* temporary variables */
-  q31_t out1, out2;                              /* temporary variables */
-
-#endif //      #if defined (ARM_MATH_DSP)
-
-  uint32_t numSamples;                           /* total number of elements in the matrix  */
+  uint32_t numSamples;                           /* total number of elements in the matrix */
   uint32_t blkCnt;                               /* loop counters */
   arm_status status;                             /* status of matrix addition */
 
 #ifdef ARM_MATH_MATRIX_CHECK
+
   /* Check for matrix mismatch condition */
   if ((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
   {
     /* Set status as ARM_MATH_SIZE_MISMATCH */
     status = ARM_MATH_SIZE_MISMATCH;
   }
   else
-#endif
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
   {
-    /* Total number of samples in the input matrix */
+    /* Total number of samples in input matrix */
     numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Loop Unrolling */
+    /* Loop unrolling: Compute 4 outputs at a time */
     blkCnt = numSamples >> 2U;
 
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-     ** a second loop below computes the remaining 1 to 3 samples. */
     while (blkCnt > 0U)
     {
       /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add, saturate and then store the results in the destination buffer. */
-      /* Read values from source A */
-      inA1 = pIn1[0];
 
-      /* Read values from source B */
-      inB1 = pIn2[0];
+      /* Add, saturate and store result in destination buffer. */
+      *pOut++ = __QADD(*pInA++, *pInB++);
 
-      /* Read values from source A */
-      inA2 = pIn1[1];
+      *pOut++ = __QADD(*pInA++, *pInB++);
 
-      /* Add and saturate */
-      out1 = __QADD(inA1, inB1);
+      *pOut++ = __QADD(*pInA++, *pInB++);
 
-      /* Read values from source B */
-      inB2 = pIn2[1];
+      *pOut++ = __QADD(*pInA++, *pInB++);
 
-      /* Read values from source A */
-      inA1 = pIn1[2];
-
-      /* Add and saturate */
-      out2 = __QADD(inA2, inB2);
-
-      /* Read values from source B */
-      inB1 = pIn2[2];
-
-      /* Store result in destination */
-      pOut[0] = out1;
-      pOut[1] = out2;
-
-      /* Read values from source A */
-      inA2 = pIn1[3];
-
-      /* Read values from source B */
-      inB2 = pIn2[3];
-
-      /* Add and saturate */
-      out1 = __QADD(inA1, inB1);
-      out2 = __QADD(inA2, inB2);
-
-      /* Store result in destination */
-      pOut[2] = out1;
-      pOut[3] = out2;
-
-      /* update pointers to process next sampels */
-      pIn1 += 4U;
-      pIn2 += 4U;
-      pOut += 4U;
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     blkCnt = numSamples % 0x4U;
 
 #else
 
-    /* Run the below code for Cortex-M0 */
-
     /* Initialize blkCnt with number of samples */
     blkCnt = numSamples;
 
-
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
     while (blkCnt > 0U)
     {
       /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add, saturate and then store the results in the destination buffer. */
-      inA1 = *pIn1++;
-      inB1 = *pIn2++;
 
-      inA1 = __QADD(inA1, inB1);
+      /* Add, saturate and store result in destination buffer. */
+      *pOut++ = __QADD(*pInA++, *pInB++);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
-
-      *pOut++ = inA1;
-
     }
 
-    /* set status as ARM_MATH_SUCCESS */
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
 
@@ -191,5 +135,5 @@
 }
 
 /**
- * @} end of MatrixAdd group
+  @} end of MatrixAdd group
  */
diff --git a/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c b/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c
index bb8341e..8e2af31 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_mat_cmplx_mult_f32.c
  * Description:  Floating-point matrix multiplication
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,36 +29,38 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
  */
 
 /**
- * @defgroup CmplxMatrixMult  Complex Matrix Multiplication
- *
- * Complex Matrix multiplication is only defined if the number of columns of the
- * first matrix equals the number of rows of the second matrix.
- * Multiplying an <code>M x N</code> matrix with an <code>N x P</code> matrix results
- * in an <code>M x P</code> matrix.
- * When matrix size checking is enabled, the functions check: (1) that the inner dimensions of
- * <code>pSrcA</code> and <code>pSrcB</code> are equal; and (2) that the size of the output
- * matrix equals the outer dimensions of <code>pSrcA</code> and <code>pSrcB</code>.
+  @defgroup CmplxMatrixMult  Complex Matrix Multiplication
+
+  Complex Matrix multiplication is only defined if the number of columns of the
+  first matrix equals the number of rows of the second matrix.
+  Multiplying an <code>M x N</code> matrix with an <code>N x P</code> matrix results
+  in an <code>M x P</code> matrix.
+  @par
+  When matrix size checking is enabled, the functions check:
+   - that the inner dimensions of <code>pSrcA</code> and <code>pSrcB</code> are equal;
+   - that the size of the output matrix equals the outer dimensions of <code>pSrcA</code> and <code>pSrcB</code>.
  */
 
 
 /**
- * @addtogroup CmplxMatrixMult
- * @{
+  @addtogroup CmplxMatrixMult
+  @{
  */
 
 /**
- * @brief Floating-point Complex matrix multiplication.
- * @param[in]       *pSrcA points to the first input complex matrix structure
- * @param[in]       *pSrcB points to the second input complex matrix structure
- * @param[out]      *pDst points to output complex matrix structure
- * @return     		The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+  @brief         Floating-point Complex matrix multiplication.
+  @param[in]     pSrcA      points to first input complex matrix structure
+  @param[in]     pSrcB      points to second input complex matrix structure
+  @param[out]    pDst       points to output complex matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
  */
-
+#if defined(ARM_MATH_NEON)
 arm_status arm_mat_cmplx_mult_f32(
   const arm_matrix_instance_f32 * pSrcA,
   const arm_matrix_instance_f32 * pSrcB,
@@ -74,14 +76,20 @@
   uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
   float32_t sumReal1, sumImag1;                  /* accumulator */
   float32_t a0, b0, c0, d0;
-  float32_t a1, b1, c1, d1;
+  float32_t a1, a1B,b1, b1B, c1, d1;
   float32_t sumReal2, sumImag2;                  /* accumulator */
 
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+  float32x4x2_t a0V, a1V;
+  float32x4_t accR0,accI0, accR1,accI1,tempR, tempI;
+  float32x2_t accum = vdup_n_f32(0);
+  float32_t *pIn1B = pSrcA->pData;    
 
-  uint16_t col, i = 0U, j, row = numRowsA, colCnt;      /* loop counters */
+  uint16_t col, i = 0U, j, rowCnt, row = numRowsA, colCnt;      /* loop counters */
   arm_status status;                             /* status of matrix multiplication */
+  float32_t sumReal1B, sumImag1B; 
+  float32_t sumReal2B, sumImag2B; 
+  float32_t *pxB;  
 
 #ifdef ARM_MATH_MATRIX_CHECK
 
@@ -99,8 +107,172 @@
 
   {
     /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
+
+    rowCnt = row >> 1;
+
+    /* Row loop */
+    while (rowCnt > 0U)
+    {
+      /* Output pointer is set to starting address of the row being processed */
+      px = pOut + 2 * i;
+      pxB = px + 2 * numColsB;
+
+      /* For every row wise process, the column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, the pIn2 pointer is set
+       ** to the starting address of the pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      j = 0U;
+
+      /* Column loop */
+      while (col > 0U)
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sumReal1 = 0.0f;
+        sumImag1 = 0.0f;
+        sumReal1B = 0.0f;
+        sumImag1B = 0.0f;
+
+        sumReal2 = 0.0f;
+        sumImag2 = 0.0f;
+        sumReal2B = 0.0f;
+        sumImag2B = 0.0f;
+
+        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
+        pIn1 = pInA;
+        pIn1B = pIn1 + 2*numColsA;
+
+        accR0 = vdupq_n_f32(0.0);
+        accI0 = vdupq_n_f32(0.0);
+        accR1 = vdupq_n_f32(0.0);
+        accI1 = vdupq_n_f32(0.0);
+
+        /* Compute 4 MACs simultaneously. */
+        colCnt = numColsA >> 2;
+
+        /* Matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* Reading real part of complex matrix A */
+          a0V = vld2q_f32(pIn1);  // load & separate real/imag pSrcA (de-interleave 2)
+          a1V = vld2q_f32(pIn1B);  // load & separate real/imag pSrcA (de-interleave 2)
+
+          pIn1 += 8;
+          pIn1B += 8;
+
+          tempR[0] = *pIn2;
+          tempI[0] = *(pIn2 + 1U);
+          pIn2 += 2 * numColsB;
+
+          tempR[1] = *pIn2;
+          tempI[1] = *(pIn2 + 1U);
+          pIn2 += 2 * numColsB;
+
+          tempR[2] = *pIn2;
+          tempI[2] = *(pIn2 + 1U);
+          pIn2 += 2 * numColsB;
+
+          tempR[3] = *pIn2;
+          tempI[3] = *(pIn2 + 1U);
+          pIn2 += 2 * numColsB;
+
+          accR0 = vmlaq_f32(accR0,a0V.val[0],tempR);
+          accR0 = vmlsq_f32(accR0,a0V.val[1],tempI);
+
+          accI0 = vmlaq_f32(accI0,a0V.val[1],tempR);
+          accI0 = vmlaq_f32(accI0,a0V.val[0],tempI);
+
+          accR1 = vmlaq_f32(accR1,a1V.val[0],tempR);
+          accR1 = vmlsq_f32(accR1,a1V.val[1],tempI);
+
+          accI1 = vmlaq_f32(accI1,a1V.val[1],tempR);
+          accI1 = vmlaq_f32(accI1,a1V.val[0],tempI);
+
+          /* Decrement the loop count */
+          colCnt--;
+        }
+
+        accum = vpadd_f32(vget_low_f32(accR0), vget_high_f32(accR0));
+        sumReal1 += accum[0] + accum[1];
+
+        accum = vpadd_f32(vget_low_f32(accI0), vget_high_f32(accI0));
+        sumImag1 += accum[0] + accum[1];
+
+        accum = vpadd_f32(vget_low_f32(accR1), vget_high_f32(accR1));
+        sumReal1B += accum[0] + accum[1];
+
+        accum = vpadd_f32(vget_low_f32(accI1), vget_high_f32(accI1));
+        sumImag1B += accum[0] + accum[1];
+
+        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        colCnt = numColsA & 3;
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
+          a1 = *pIn1;
+          a1B = *pIn1B;
+
+          c1 = *pIn2;
+
+          b1 = *(pIn1 + 1U);
+          b1B = *(pIn1B + 1U);
+
+          d1 = *(pIn2 + 1U);
+
+          sumReal1 += a1 * c1;
+          sumImag1 += b1 * c1;
+
+          sumReal1B += a1B * c1;
+          sumImag1B += b1B * c1;
+
+          pIn1 += 2U;
+          pIn1B += 2U;
+          pIn2 += 2 * numColsB;
+
+          sumReal2 -= b1 * d1;
+          sumImag2 += a1 * d1;
+
+          sumReal2B -= b1B * d1;
+          sumImag2B += a1B * d1;
+
+          /* Decrement the loop counter */
+          colCnt--;
+        }
+
+        sumReal1 += sumReal2;
+        sumImag1 += sumImag2;
+
+        sumReal1B += sumReal2B;
+        sumImag1B += sumImag2B;
+
+        /* Store the result in the destination buffer */
+        *px++ = sumReal1;
+        *px++ = sumImag1;
+        *pxB++ = sumReal1B;
+        *pxB++ = sumImag1B;
+
+        /* Update the pointer pIn2 to point to the  starting address of the next column */
+        j++;
+        pIn2 = pSrcB->pData + 2U * j;
+
+        /* Decrement the column loop counter */
+        col--;
+      } 
+
+      /* Update the pointer pInA to point to the  starting address of the next 2 row */
+      i = i + 2*numColsB;
+      pInA = pInA + 4 * numColsA;
+
+      /* Decrement the row loop counter */
+      rowCnt--;
+    }
+
+    rowCnt = row & 1;
+    while (rowCnt > 0U)
     {
       /* Output pointer is set to starting address of the row being processed */
       px = pOut + 2 * i;
@@ -114,8 +286,8 @@
 
       j = 0U;
 
-      /* column loop */
-      do
+      /* Column loop */
+      while (col > 0U)
       {
         /* Set the variable sum, that acts as accumulator, to zero */
         sumReal1 = 0.0f;
@@ -127,94 +299,58 @@
         /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
         pIn1 = pInA;
 
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+        accR0 = vdupq_n_f32(0.0);
+        accI0 = vdupq_n_f32(0.0);
+
+        /* Compute 4 MACs simultaneously. */
         colCnt = numColsA >> 2;
 
-        /* matrix multiplication        */
+        /* Matrix multiplication */
         while (colCnt > 0U)
         {
-
           /* Reading real part of complex matrix A */
-          a0 = *pIn1;
+          a0V = vld2q_f32(pIn1);  // load & separate real/imag pSrcA (de-interleave 2)
+          pIn1 += 8;
 
-          /* Reading real part of complex matrix B */
-          c0 = *pIn2;
-
-          /* Reading imaginary part of complex matrix A */
-          b0 = *(pIn1 + 1U);
-
-          /* Reading imaginary part of complex matrix B */
-          d0 = *(pIn2 + 1U);
-
-          sumReal1 += a0 * c0;
-          sumImag1 += b0 * c0;
-
-          pIn1 += 2U;
+          tempR[0] = *pIn2;
+          tempI[0] = *(pIn2 + 1U);
           pIn2 += 2 * numColsB;
 
-          sumReal2 -= b0 * d0;
-          sumImag2 += a0 * d0;
-
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-
-          a1 = *pIn1;
-          c1 = *pIn2;
-
-          b1 = *(pIn1 + 1U);
-          d1 = *(pIn2 + 1U);
-
-          sumReal1 += a1 * c1;
-          sumImag1 += b1 * c1;
-
-          pIn1 += 2U;
+          tempR[1] = *pIn2;
+          tempI[1] = *(pIn2 + 1U);
           pIn2 += 2 * numColsB;
 
-          sumReal2 -= b1 * d1;
-          sumImag2 += a1 * d1;
-
-          a0 = *pIn1;
-          c0 = *pIn2;
-
-          b0 = *(pIn1 + 1U);
-          d0 = *(pIn2 + 1U);
-
-          sumReal1 += a0 * c0;
-          sumImag1 += b0 * c0;
-
-          pIn1 += 2U;
+          tempR[2] = *pIn2;
+          tempI[2] = *(pIn2 + 1U);
           pIn2 += 2 * numColsB;
 
-          sumReal2 -= b0 * d0;
-          sumImag2 += a0 * d0;
-
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-
-          a1 = *pIn1;
-          c1 = *pIn2;
-
-          b1 = *(pIn1 + 1U);
-          d1 = *(pIn2 + 1U);
-
-          sumReal1 += a1 * c1;
-          sumImag1 += b1 * c1;
-
-          pIn1 += 2U;
+          tempR[3] = *pIn2;
+          tempI[3] = *(pIn2 + 1U);
           pIn2 += 2 * numColsB;
 
-          sumReal2 -= b1 * d1;
-          sumImag2 += a1 * d1;
+          accR0 = vmlaq_f32(accR0,a0V.val[0],tempR);
+          accR0 = vmlsq_f32(accR0,a0V.val[1],tempI);
+
+          accI0 = vmlaq_f32(accI0,a0V.val[1],tempR);
+          accI0 = vmlaq_f32(accI0,a0V.val[0],tempI);
 
           /* Decrement the loop count */
           colCnt--;
         }
 
+        accum = vpadd_f32(vget_low_f32(accR0), vget_high_f32(accR0));
+        sumReal1 += accum[0] + accum[1];
+
+        accum = vpadd_f32(vget_low_f32(accI0), vget_high_f32(accI0));
+        sumImag1 += accum[0] + accum[1];
+
         /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
          ** No loop unrolling is used. */
-        colCnt = numColsA % 0x4U;
+        colCnt = numColsA & 3;
 
         while (colCnt > 0U)
         {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
+          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
           a1 = *pIn1;
           c1 = *pIn2;
 
@@ -248,13 +384,234 @@
         /* Decrement the column loop counter */
         col--;
 
-      } while (col > 0U);
+      } 
 
       /* Update the pointer pInA to point to the  starting address of the next row */
       i = i + numColsB;
       pInA = pInA + 2 * numColsA;
 
       /* Decrement the row loop counter */
+      rowCnt--;
+
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#else
+arm_status arm_mat_cmplx_mult_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+        arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn1 = pSrcA->pData;                /* Input data matrix pointer A */
+  float32_t *pIn2 = pSrcB->pData;                /* Input data matrix pointer B */
+  float32_t *pInA = pSrcA->pData;                /* Input data matrix pointer A */
+  float32_t *pOut = pDst->pData;                 /* Output data matrix pointer */
+  float32_t *px;                                 /* Temporary output data matrix pointer */
+  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+  float32_t sumReal, sumImag;                    /* Accumulator */
+  float32_t a1, b1, c1, d1;
+  uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* loop counters */
+  arm_status status;                             /* status of matrix multiplication */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  float32_t a0, b0, c0, d0;
+#endif
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* row loop */
+    do
+    {
+      /* Output pointer is set to starting address of the row being processed */
+      px = pOut + 2 * i;
+
+      /* For every row wise process, the column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, the pIn2 pointer is set
+       ** to the starting address of the pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      j = 0U;
+
+      /* column loop */
+      do
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sumReal = 0.0f;
+        sumImag = 0.0f;
+
+        /* Initiate pointer pIn1 to point to starting address of column being processed */
+        pIn1 = pInA;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+
+          /* Reading real part of complex matrix A */
+          a0 = *pIn1;
+
+          /* Reading real part of complex matrix B */
+          c0 = *pIn2;
+
+          /* Reading imaginary part of complex matrix A */
+          b0 = *(pIn1 + 1U);
+
+          /* Reading imaginary part of complex matrix B */
+          d0 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += a0 * c0;
+          sumImag += b0 * c0;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= b0 * d0;
+          sumImag += a0 * d0;
+
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          a1 = *(pIn1     );
+          c1 = *(pIn2     );
+          b1 = *(pIn1 + 1U);
+          d1 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += a1 * c1;
+          sumImag += b1 * c1;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= b1 * d1;
+          sumImag += a1 * d1;
+
+          a0 = *(pIn1     );
+          c0 = *(pIn2     );
+          b0 = *(pIn1 + 1U);
+          d0 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += a0 * c0;
+          sumImag += b0 * c0;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= b0 * d0;
+          sumImag += a0 * d0;
+
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          a1 = *(pIn1     );
+          c1 = *(pIn2     );
+          b1 = *(pIn1 + 1U);
+          d1 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += a1 * c1;
+          sumImag += b1 * c1;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= b1 * d1;
+          sumImag += a1 * d1;
+
+          /* Decrement loop count */
+          colCnt--;
+        }
+
+        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        colCnt = numColsA % 0x4U;
+
+#else
+
+        /* Initialize blkCnt with number of samples */
+        colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+          a1 = *(pIn1     );
+          c1 = *(pIn2     );
+          b1 = *(pIn1 + 1U);
+          d1 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += a1 * c1;
+          sumImag += b1 * c1;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= b1 * d1;
+          sumImag += a1 * d1;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Store result in destination buffer */
+        *px++ = sumReal;
+        *px++ = sumImag;
+
+        /* Update pointer pIn2 to point to starting address of next column */
+        j++;
+        pIn2 = pSrcB->pData + 2U * j;
+
+        /* Decrement column loop counter */
+        col--;
+
+      } while (col > 0U);
+
+      /* Update pointer pInA to point to starting address of next row */
+      i = i + numColsB;
+      pInA = pInA + 2 * numColsA;
+
+      /* Decrement row loop counter */
       row--;
 
     } while (row > 0U);
@@ -267,6 +624,8 @@
   return (status);
 }
 
+#endif /* #if defined(ARM_MATH_NEON) */
+
 /**
- * @} end of MatrixMult group
+  @} end of MatrixMult group
  */
diff --git a/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c b/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c
index 5dee79c..4c5a45b 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_cmplx_mat_mult_q15.c
  * Description:  Q15 complex matrix multiplication
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,141 +29,115 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
  */
 
 /**
- * @addtogroup CmplxMatrixMult
- * @{
+  @addtogroup CmplxMatrixMult
+  @{
  */
 
-
 /**
- * @brief Q15 Complex matrix multiplication
- * @param[in]       *pSrcA points to the first input complex matrix structure
- * @param[in]       *pSrcB points to the second input complex matrix structure
- * @param[out]      *pDst points to output complex matrix structure
- * @param[in]		*pScratch points to the array for storing intermediate results
- * @return     		The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * \par Conditions for optimum performance
- *  Input, output and state buffers should be aligned by 32-bit
- *
- * \par Restrictions
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
- *	In this case input, output, scratch buffers should be aligned by 32-bit
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 64-bit internal accumulator. The inputs to the
- * multiplications are in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate
- * results are accumulated in a 64-bit accumulator in 34.30 format. This approach
- * provides 33 guard bits and there is no risk of overflow. The 34.30 result is then
- * truncated to 34.15 format by discarding the low 15 bits and then saturated to
- * 1.15 format.
- *
- * \par
- * Refer to <code>arm_mat_mult_fast_q15()</code> for a faster but less precise version of this function.
- *
+  @brief         Q15 Complex matrix multiplication.
+  @param[in]     pSrcA      points to first input complex matrix structure
+  @param[in]     pSrcB      points to second input complex matrix structure
+  @param[out]    pDst       points to output complex matrix structure
+  @param[in]     pScratch   points to an array for storing intermediate results
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Conditions for optimum performance
+                   Input, output and state buffers should be aligned by 32-bit
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator. The inputs to the
+                   multiplications are in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then
+                   truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
  */
 
-
-
-
 arm_status arm_mat_cmplx_mult_q15(
   const arm_matrix_instance_q15 * pSrcA,
   const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst,
-  q15_t * pScratch)
+        arm_matrix_instance_q15 * pDst,
+        q15_t                   * pScratch)
 {
-  /* accumulator */
-  q15_t *pSrcBT = pScratch;                      /* input data matrix pointer for transpose */
-  q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
-  q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
-  q15_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  uint16_t numRowsB = pSrcB->numRows;            /* number of rows of input matrix A    */
-  uint16_t col, i = 0U, row = numRowsB, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-  q63_t sumReal, sumImag;
+        q15_t *pSrcBT = pScratch;                      /* input data matrix pointer for transpose */
+        q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
+        q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
+        q15_t *px;                                     /* Temporary output data matrix pointer */
+        uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A */
+        uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
+        uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
+        uint16_t numRowsB = pSrcB->numRows;            /* number of rows of input matrix A */
+        q63_t sumReal, sumImag;                        /* accumulator */
+        uint32_t col, i = 0U, row = numRowsB, colCnt;  /* Loop counters */
+        arm_status status;                             /* Status of matrix multiplication */
 
-#ifdef UNALIGNED_SUPPORT_DISABLE
-  q15_t in;                                      /* Temporary variable to hold the input value */
-  q15_t a, b, c, d;
+#if defined (ARM_MATH_DSP)
+        q31_t prod1, prod2;
+        q31_t pSourceA, pSourceB;
 #else
-  q31_t in;                                      /* Temporary variable to hold the input value */
-  q31_t prod1, prod2;
-  q31_t pSourceA, pSourceB;
-#endif
+        q15_t a, b, c, d;
+#endif /* #if defined (ARM_MATH_DSP) */
 
 #ifdef ARM_MATH_MATRIX_CHECK
+
   /* Check for matrix mismatch condition */
   if ((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
   {
     /* Set status as ARM_MATH_SIZE_MISMATCH */
     status = ARM_MATH_SIZE_MISMATCH;
   }
   else
-#endif
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
   {
     /* Matrix transpose */
     do
     {
+      /* The pointer px is set to starting address of column being processed */
+      px = pSrcBT + i;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
       /* Apply loop unrolling and exchange the columns with row elements */
       col = numColsB >> 2;
 
-      /* The pointer px is set to starting address of the column being processed */
-      px = pSrcBT + i;
-
       /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-       ** a second loop below computes the remaining 1 to 3 samples. */
+         a second loop below computes the remaining 1 to 3 samples. */
       while (col > 0U)
       {
-#ifdef UNALIGNED_SUPPORT_DISABLE
-        /* Read two elements from the row */
-        in = *pInB++;
-        *px = in;
-        in = *pInB++;
-        px[1] = in;
+        /* Read two elements from row */
+        write_q15x2 (px, read_q15x2_ia (&pInB));
 
-        /* Update the pointer px to point to the next row of the transposed matrix */
+        /* Update pointer px to point to next row of transposed matrix */
         px += numRowsB * 2;
 
-        /* Read two elements from the row */
-        in = *pInB++;
-        *px = in;
-        in = *pInB++;
-        px[1] = in;
+        /* Read two elements from row */
+        write_q15x2 (px, read_q15x2_ia (&pInB));
 
-        /* Update the pointer px to point to the next row of the transposed matrix */
+        /* Update pointer px to point to next row of transposed matrix */
         px += numRowsB * 2;
 
-        /* Read two elements from the row */
-        in = *pInB++;
-        *px = in;
-        in = *pInB++;
-        px[1] = in;
+        /* Read two elements from row */
+        write_q15x2 (px, read_q15x2_ia (&pInB));
 
-        /* Update the pointer px to point to the next row of the transposed matrix */
+        /* Update pointer px to point to next row of transposed matrix */
         px += numRowsB * 2;
 
-        /* Read two elements from the row */
-        in = *pInB++;
-        *px = in;
-        in = *pInB++;
-        px[1] = in;
+        /* Read two elements from row */
+        write_q15x2 (px, read_q15x2_ia (&pInB));
 
-        /* Update the pointer px to point to the next row of the transposed matrix */
+        /* Update pointer px to point to next row of transposed matrix */
         px += numRowsB * 2;
 
-        /* Decrement the column loop counter */
+        /* Decrement column loop counter */
         col--;
       }
 
@@ -171,79 +145,33 @@
        ** No loop unrolling is used. */
       col = numColsB % 0x4U;
 
-      while (col > 0U)
-      {
-        /* Read two elements from the row */
-        in = *pInB++;
-        *px = in;
-        in = *pInB++;
-        px[1] = in;
 #else
 
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
+        /* Initialize blkCnt with number of samples */
+        col = numColsB;
 
-        *__SIMD32(px) = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB * 2;
-
-
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        *__SIMD32(px) = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB * 2;
-
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        *__SIMD32(px) = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB * 2;
-
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        *__SIMD32(px) = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB * 2;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-      /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.
-       ** No loop unrolling is used. */
-      col = numColsB % 0x4U;
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
       while (col > 0U)
       {
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
+        /* Read two elements from row */
+        write_q15x2 (px, read_q15x2_ia (&pInB));
 
-        *__SIMD32(px) = in;
-#endif
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
+        /* Update pointer px to point to next row of transposed matrix */
         px += numRowsB * 2;
 
-        /* Decrement the column loop counter */
+        /* Decrement column loop counter */
         col--;
       }
 
       i = i + 2U;
 
-      /* Decrement the row loop counter */
+      /* Decrement row loop counter */
       row--;
 
     } while (row > 0U);
 
-    /* Reset the variables for the usage in the following multiplication process */
+    /* Reset variables for usage in following multiplication process */
     row = numRowsA;
     i = 0U;
     px = pDst->pData;
@@ -252,33 +180,61 @@
     /* row loop */
     do
     {
-      /* For every row wise process, the column loop counter is to be initiated */
+      /* For every row wise process, column loop counter is to be initiated */
       col = numColsB;
 
-      /* For every row wise process, the pIn2 pointer is set
-       ** to the starting address of the transposed pSrcB data */
+      /* For every row wise process, pIn2 pointer is set to starting address of transposed pSrcB data */
       pInB = pSrcBT;
 
       /* column loop */
       do
       {
-        /* Set the variable sum, that acts as accumulator, to zero */
+        /* Set variable sum, that acts as accumulator, to zero */
         sumReal = 0;
         sumImag = 0;
 
-        /* Apply loop unrolling and compute 2 MACs simultaneously. */
-        colCnt = numColsA >> 1;
-
-        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
+        /* Initiate pointer pInA to point to starting address of column being processed */
         pInA = pSrcA->pData + i * 2;
 
+        /* Apply loop unrolling and compute 2 MACs simultaneously. */
+        colCnt = numColsA >> 1U;
 
         /* matrix multiplication */
         while (colCnt > 0U)
         {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
 
-#ifdef UNALIGNED_SUPPORT_DISABLE
+#if defined (ARM_MATH_DSP)
+
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          pSourceA = read_q15x2_ia ((q15_t **) &pInA);
+          pSourceB = read_q15x2_ia ((q15_t **) &pInB);
+
+          /* Multiply and Accumlates */
+#ifdef ARM_MATH_BIG_ENDIAN
+          prod1 = -__SMUSD(pSourceA, pSourceB);
+#else
+          prod1 = __SMUSD(pSourceA, pSourceB);
+#endif
+          prod2 = __SMUADX(pSourceA, pSourceB);
+          sumReal += (q63_t) prod1;
+          sumImag += (q63_t) prod2;
+
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          pSourceA = read_q15x2_ia ((q15_t **) &pInA);
+          pSourceB = read_q15x2_ia ((q15_t **) &pInB);
+
+          /* Multiply and Accumlates */
+#ifdef ARM_MATH_BIG_ENDIAN
+          prod1 = -__SMUSD(pSourceA, pSourceB);
+#else
+          prod1 = __SMUSD(pSourceA, pSourceB);
+#endif
+          prod2 = __SMUADX(pSourceA, pSourceB);
+          sumReal += (q63_t) prod1;
+          sumImag += (q63_t) prod2;
+
+#else /* #if defined (ARM_MATH_DSP) */
 
           /* read real and imag values from pSrcA buffer */
           a = *pInA;
@@ -304,53 +260,40 @@
           pInA += 4U;
 
           /* Multiply and Accumlates */
-          sumReal += (q31_t) a *c;
-          sumImag += (q31_t) a *d;
-          sumReal -= (q31_t) b *d;
-          sumImag += (q31_t) b *c;
+          sumReal += (q31_t) a * c;
+          sumImag += (q31_t) a * d;
+          sumReal -= (q31_t) b * d;
+          sumImag += (q31_t) b * c;
           /* update pointer */
           pInB += 4U;
-#else
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          pSourceA = *__SIMD32(pInA)++;
-          pSourceB = *__SIMD32(pInB)++;
 
-          /* Multiply and Accumlates */
-#ifdef ARM_MATH_BIG_ENDIAN
-          prod1 = -__SMUSD(pSourceA, pSourceB);
-#else
-          prod1 = __SMUSD(pSourceA, pSourceB);
-#endif
-          prod2 = __SMUADX(pSourceA, pSourceB);
-          sumReal += (q63_t) prod1;
-          sumImag += (q63_t) prod2;
+#endif /* #if defined (ARM_MATH_DSP) */
 
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          pSourceA = *__SIMD32(pInA)++;
-          pSourceB = *__SIMD32(pInB)++;
-
-          /* Multiply and Accumlates */
-#ifdef ARM_MATH_BIG_ENDIAN
-          prod1 = -__SMUSD(pSourceA, pSourceB);
-#else
-          prod1 = __SMUSD(pSourceA, pSourceB);
-#endif
-          prod2 = __SMUADX(pSourceA, pSourceB);
-          sumReal += (q63_t) prod1;
-          sumImag += (q63_t) prod2;
-
-#endif /*      #ifdef UNALIGNED_SUPPORT_DISABLE */
-
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           colCnt--;
         }
 
         /* process odd column samples */
         if ((numColsA & 0x1U) > 0U)
         {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
 
-#ifdef UNALIGNED_SUPPORT_DISABLE
+#if defined (ARM_MATH_DSP)
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          pSourceA = read_q15x2_ia ((q15_t **) &pInA);
+          pSourceB = read_q15x2_ia ((q15_t **) &pInB);
+
+          /* Multiply and Accumlates */
+#ifdef ARM_MATH_BIG_ENDIAN
+          prod1 = -__SMUSD(pSourceA, pSourceB);
+#else
+          prod1 = __SMUSD(pSourceA, pSourceB);
+#endif
+          prod2 = __SMUADX(pSourceA, pSourceB);
+          sumReal += (q63_t) prod1;
+          sumImag += (q63_t) prod2;
+
+#else /* #if defined (ARM_MATH_DSP) */
 
           /* read real and imag values from pSrcA and pSrcB buffer */
           a = *pInA++;
@@ -359,48 +302,32 @@
           d = *pInB++;
 
           /* Multiply and Accumlates */
-          sumReal += (q31_t) a *c;
-          sumImag += (q31_t) a *d;
-          sumReal -= (q31_t) b *d;
-          sumImag += (q31_t) b *c;
+          sumReal += (q31_t) a * c;
+          sumImag += (q31_t) a * d;
+          sumReal -= (q31_t) b * d;
+          sumImag += (q31_t) b * c;
 
-#else
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          pSourceA = *__SIMD32(pInA)++;
-          pSourceB = *__SIMD32(pInB)++;
-
-          /* Multiply and Accumlates */
-#ifdef ARM_MATH_BIG_ENDIAN
-          prod1 = -__SMUSD(pSourceA, pSourceB);
-#else
-          prod1 = __SMUSD(pSourceA, pSourceB);
-#endif
-          prod2 = __SMUADX(pSourceA, pSourceB);
-          sumReal += (q63_t) prod1;
-          sumImag += (q63_t) prod2;
-
-#endif /*      #ifdef UNALIGNED_SUPPORT_DISABLE */
+#endif /* #if defined (ARM_MATH_DSP) */
 
         }
 
-        /* Saturate and store the result in the destination buffer */
-
+        /* Saturate and store result in destination buffer */
         *px++ = (q15_t) (__SSAT(sumReal >> 15, 16));
         *px++ = (q15_t) (__SSAT(sumImag >> 15, 16));
 
-        /* Decrement the column loop counter */
+        /* Decrement column loop counter */
         col--;
 
       } while (col > 0U);
 
       i = i + numColsA;
 
-      /* Decrement the row loop counter */
+      /* Decrement row loop counter */
       row--;
 
     } while (row > 0U);
 
-    /* set status as ARM_MATH_SUCCESS */
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
 
@@ -409,5 +336,5 @@
 }
 
 /**
- * @} end of MatrixMult group
+  @} end of MatrixMult group
  */
diff --git a/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c b/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c
index 65cbb66..7b458f9 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_mat_cmplx_mult_q31.c
  * Description:  Floating-point matrix multiplication
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,74 +29,69 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
  */
 
 /**
- * @addtogroup CmplxMatrixMult
- * @{
+  @addtogroup CmplxMatrixMult
+  @{
  */
 
 /**
- * @brief Q31 Complex matrix multiplication
- * @param[in]       *pSrcA points to the first input complex matrix structure
- * @param[in]       *pSrcB points to the second input complex matrix structure
- * @param[out]      *pDst points to output complex matrix structure
- * @return     		The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate
- * multiplication results but provides only a single guard bit. There is no saturation
- * on intermediate additions. Thus, if the accumulator overflows it wraps around and
- * distorts the result. The input signals should be scaled down to avoid intermediate
- * overflows. The input is thus scaled down by log2(numColsA) bits
- * to avoid overflows, as a total of numColsA additions are performed internally.
- * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
- *
- *
+  @brief         Q31 Complex matrix multiplication.
+  @param[in]     pSrcA      points to first input complex matrix structure
+  @param[in]     pSrcB      points to second input complex matrix structure
+  @param[out]    pDst       points to output complex matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate
+                   multiplication results but provides only a single guard bit. There is no saturation
+                   on intermediate additions. Thus, if the accumulator overflows it wraps around and
+                   distorts the result. The input signals should be scaled down to avoid intermediate
+                   overflows. The input is thus scaled down by log2(numColsA) bits
+                   to avoid overflows, as a total of numColsA additions are performed internally.
+                   The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
  */
 
 arm_status arm_mat_cmplx_mult_q31(
   const arm_matrix_instance_q31 * pSrcA,
   const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst)
+        arm_matrix_instance_q31 * pDst)
 {
-  q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
-  q31_t *pInA = pSrcA->pData;                    /* input data matrix pointer A  */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
+  q31_t *pIn1 = pSrcA->pData;                    /* Input data matrix pointer A */
+  q31_t *pIn2 = pSrcB->pData;                    /* Input data matrix pointer B */
+  q31_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A */
+  q31_t *pOut = pDst->pData;                     /* Output data matrix pointer */
   q31_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  q63_t sumReal1, sumImag1;                      /* accumulator */
-  q31_t a0, b0, c0, d0;
+  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+  q63_t sumReal, sumImag;                        /* Accumulator */
   q31_t a1, b1, c1, d1;
-
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  uint16_t col, i = 0U, j, row = numRowsA, colCnt;      /* loop counters */
+  uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* loop counters */
   arm_status status;                             /* status of matrix multiplication */
 
+#if defined (ARM_MATH_LOOPUNROLL)
+  q31_t a0, b0, c0, d0;
+#endif
+
 #ifdef ARM_MATH_MATRIX_CHECK
 
-
   /* Check for matrix mismatch condition */
   if ((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
   {
-
     /* Set status as ARM_MATH_SIZE_MISMATCH */
     status = ARM_MATH_SIZE_MISMATCH;
   }
   else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
 
   {
     /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
@@ -119,16 +114,18 @@
       do
       {
         /* Set the variable sum, that acts as accumulator, to zero */
-        sumReal1 = 0.0;
-        sumImag1 = 0.0;
+        sumReal = 0.0;
+        sumImag = 0.0;
 
-        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
+        /* Initiate pointer pIn1 to point to starting address of column being processed */
         pIn1 = pInA;
 
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        colCnt = numColsA >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-        /* matrix multiplication        */
+        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
         while (colCnt > 0U)
         {
 
@@ -145,76 +142,74 @@
           d0 = *(pIn2 + 1U);
 
           /* Multiply and Accumlates */
-          sumReal1 += (q63_t) a0 *c0;
-          sumImag1 += (q63_t) b0 *c0;
+          sumReal += (q63_t) a0 * c0;
+          sumImag += (q63_t) b0 * c0;
 
           /* update pointers */
           pIn1 += 2U;
           pIn2 += 2 * numColsB;
 
           /* Multiply and Accumlates */
-          sumReal1 -= (q63_t) b0 *d0;
-          sumImag1 += (q63_t) a0 *d0;
+          sumReal -= (q63_t) b0 * d0;
+          sumImag += (q63_t) a0 * d0;
 
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
 
           /* read real and imag values from pSrcA and pSrcB buffer */
-          a1 = *pIn1;
-          c1 = *pIn2;
+          a1 = *(pIn1     );
+          c1 = *(pIn2     );
           b1 = *(pIn1 + 1U);
           d1 = *(pIn2 + 1U);
 
           /* Multiply and Accumlates */
-          sumReal1 += (q63_t) a1 *c1;
-          sumImag1 += (q63_t) b1 *c1;
+          sumReal += (q63_t) a1 * c1;
+          sumImag += (q63_t) b1 * c1;
 
           /* update pointers */
           pIn1 += 2U;
           pIn2 += 2 * numColsB;
 
           /* Multiply and Accumlates */
-          sumReal1 -= (q63_t) b1 *d1;
-          sumImag1 += (q63_t) a1 *d1;
+          sumReal -= (q63_t) b1 * d1;
+          sumImag += (q63_t) a1 * d1;
 
-          a0 = *pIn1;
-          c0 = *pIn2;
-
+          a0 = *(pIn1     );
+          c0 = *(pIn2     );
           b0 = *(pIn1 + 1U);
           d0 = *(pIn2 + 1U);
 
           /* Multiply and Accumlates */
-          sumReal1 += (q63_t) a0 *c0;
-          sumImag1 += (q63_t) b0 *c0;
+          sumReal += (q63_t) a0 * c0;
+          sumImag += (q63_t) b0 * c0;
 
           /* update pointers */
           pIn1 += 2U;
           pIn2 += 2 * numColsB;
 
           /* Multiply and Accumlates */
-          sumReal1 -= (q63_t) b0 *d0;
-          sumImag1 += (q63_t) a0 *d0;
+          sumReal -= (q63_t) b0 * d0;
+          sumImag += (q63_t) a0 * d0;
 
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
 
-          a1 = *pIn1;
-          c1 = *pIn2;
-
+          a1 = *(pIn1     );
+          c1 = *(pIn2     );
           b1 = *(pIn1 + 1U);
           d1 = *(pIn2 + 1U);
 
           /* Multiply and Accumlates */
-          sumReal1 += (q63_t) a1 *c1;
-          sumImag1 += (q63_t) b1 *c1;
+          sumReal += (q63_t) a1 * c1;
+          sumImag += (q63_t) b1 * c1;
 
           /* update pointers */
           pIn1 += 2U;
           pIn2 += 2 * numColsB;
 
           /* Multiply and Accumlates */
-          sumReal1 -= (q63_t) b1 *d1;
-          sumImag1 += (q63_t) a1 *d1;
+          sumReal -= (q63_t) b1 * d1;
+          sumImag += (q63_t) a1 * d1;
 
-          /* Decrement the loop count */
+          /* Decrement loop count */
           colCnt--;
         }
 
@@ -222,49 +217,55 @@
          ** No loop unrolling is used. */
         colCnt = numColsA % 0x4U;
 
+#else
+
+        /* Initialize blkCnt with number of samples */
+        colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
         while (colCnt > 0U)
         {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          a1 = *pIn1;
-          c1 = *pIn2;
-
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+          a1 = *(pIn1     );
+          c1 = *(pIn2     );
           b1 = *(pIn1 + 1U);
           d1 = *(pIn2 + 1U);
 
           /* Multiply and Accumlates */
-          sumReal1 += (q63_t) a1 *c1;
-          sumImag1 += (q63_t) b1 *c1;
+          sumReal += (q63_t) a1 * c1;
+          sumImag += (q63_t) b1 * c1;
 
           /* update pointers */
           pIn1 += 2U;
           pIn2 += 2 * numColsB;
 
           /* Multiply and Accumlates */
-          sumReal1 -= (q63_t) b1 *d1;
-          sumImag1 += (q63_t) a1 *d1;
+          sumReal -= (q63_t) b1 * d1;
+          sumImag += (q63_t) a1 * d1;
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           colCnt--;
         }
 
-        /* Store the result in the destination buffer */
-        *px++ = (q31_t) clip_q63_to_q31(sumReal1 >> 31);
-        *px++ = (q31_t) clip_q63_to_q31(sumImag1 >> 31);
+        /* Store result in destination buffer */
+        *px++ = (q31_t) clip_q63_to_q31(sumReal >> 31);
+        *px++ = (q31_t) clip_q63_to_q31(sumImag >> 31);
 
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
+        /* Update pointer pIn2 to point to starting address of next column */
         j++;
         pIn2 = pSrcB->pData + 2U * j;
 
-        /* Decrement the column loop counter */
+        /* Decrement column loop counter */
         col--;
 
       } while (col > 0U);
 
-      /* Update the pointer pInA to point to the  starting address of the next row */
+      /* Update pointer pInA to point to starting address of next row */
       i = i + numColsB;
       pInA = pInA + 2 * numColsA;
 
-      /* Decrement the row loop counter */
+      /* Decrement row loop counter */
       row--;
 
     } while (row > 0U);
@@ -278,5 +279,5 @@
 }
 
 /**
- * @} end of MatrixMult group
+  @} end of MatrixMult group
  */
diff --git a/DSP/Source/MatrixFunctions/arm_mat_init_f32.c b/DSP/Source/MatrixFunctions/arm_mat_init_f32.c
index 783f7be..ce02a25 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_init_f32.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_init_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_mat_init_f32.c
  * Description:  Floating-point matrix initialization
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,31 +29,31 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
  */
 
 /**
- * @defgroup MatrixInit Matrix Initialization
- *
- * Initializes the underlying matrix data structure.
- * The functions set the <code>numRows</code>,
- * <code>numCols</code>, and <code>pData</code> fields
- * of the matrix data structure.
+  @defgroup MatrixInit Matrix Initialization
+ 
+  Initializes the underlying matrix data structure.
+  The functions set the <code>numRows</code>,
+  <code>numCols</code>, and <code>pData</code> fields
+  of the matrix data structure.
  */
 
 /**
- * @addtogroup MatrixInit
- * @{
+  @addtogroup MatrixInit
+  @{
  */
 
 /**
-   * @brief  Floating-point matrix initialization.
-   * @param[in,out] *S             points to an instance of the floating-point matrix structure.
-   * @param[in]     nRows          number of rows in the matrix.
-   * @param[in]     nColumns       number of columns in the matrix.
-   * @param[in]     *pData	   points to the matrix data array.
-   * @return        none
-   */
+  @brief         Floating-point matrix initialization.
+  @param[in,out] S         points to an instance of the floating-point matrix structure
+  @param[in]     nRows     number of rows in the matrix
+  @param[in]     nColumns  number of columns in the matrix
+  @param[in]     pData     points to the matrix data array
+  @return        none
+ */
 
 void arm_mat_init_f32(
   arm_matrix_instance_f32 * S,
@@ -72,5 +72,5 @@
 }
 
 /**
- * @} end of MatrixInit group
+  @} end of MatrixInit group
  */
diff --git a/DSP/Source/MatrixFunctions/arm_mat_init_q15.c b/DSP/Source/MatrixFunctions/arm_mat_init_q15.c
index 08da19f..0275503 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_init_q15.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_init_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_mat_init_q15.c
  * Description:  Q15 matrix initialization
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,22 +29,22 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
  */
 
 /**
- * @addtogroup MatrixInit
- * @{
+  @addtogroup MatrixInit
+  @{
  */
 
-  /**
-   * @brief  Q15 matrix initialization.
-   * @param[in,out] *S             points to an instance of the floating-point matrix structure.
-   * @param[in]     nRows          number of rows in the matrix.
-   * @param[in]     nColumns       number of columns in the matrix.
-   * @param[in]     *pData	   points to the matrix data array.
-   * @return        none
-   */
+/**
+  @brief         Q15 matrix initialization.
+  @param[in,out] S         points to an instance of the floating-point matrix structure
+  @param[in]     nRows     number of rows in the matrix
+  @param[in]     nColumns  number of columns in the matrix
+  @param[in]     pData     points to the matrix data array
+  @return        none
+ */
 
 void arm_mat_init_q15(
   arm_matrix_instance_q15 * S,
@@ -63,5 +63,5 @@
 }
 
 /**
- * @} end of MatrixInit group
+  @} end of MatrixInit group
  */
diff --git a/DSP/Source/MatrixFunctions/arm_mat_init_q31.c b/DSP/Source/MatrixFunctions/arm_mat_init_q31.c
index 22e6f6d..d5c5722 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_init_q31.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_init_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_mat_init_q31.c
  * Description:  Q31 matrix initialization
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,27 +29,27 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
  */
 
 /**
- * @defgroup MatrixInit Matrix Initialization
- *
+  @defgroup MatrixInit Matrix Initialization
+ 
  */
 
 /**
- * @addtogroup MatrixInit
- * @{
+  @addtogroup MatrixInit
+  @{
  */
 
-  /**
-   * @brief  Q31 matrix initialization.
-   * @param[in,out] *S             points to an instance of the floating-point matrix structure.
-   * @param[in]     nRows          number of rows in the matrix.
-   * @param[in]     nColumns       number of columns in the matrix.
-   * @param[in]     *pData	   points to the matrix data array.
-   * @return        none
-   */
+/**
+  @brief         Q31 matrix initialization.
+  @param[in,out] S         points to an instance of the Q31 matrix structure
+  @param[in]     nRows     number of rows in the matrix
+  @param[in]     nColumns  number of columns in the matrix
+  @param[in]     pData     points to the matrix data array
+  @return        none
+ */
 
 void arm_mat_init_q31(
   arm_matrix_instance_q31 * S,
@@ -68,5 +68,5 @@
 }
 
 /**
- * @} end of MatrixInit group
+  @} end of MatrixInit group
  */
diff --git a/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c b/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c
index b82373a..d602b98 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_mat_inverse_f32.c
  * Description:  Floating-point matrix inverse
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,47 +29,45 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
  */
 
 /**
- * @defgroup MatrixInv Matrix Inverse
- *
- * Computes the inverse of a matrix.
- *
- * The inverse is defined only if the input matrix is square and non-singular (the determinant
- * is non-zero). The function checks that the input and output matrices are square and of the
- * same size.
- *
- * Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix
- * inversion of floating-point matrices.
- *
- * \par Algorithm
- * The Gauss-Jordan method is used to find the inverse.
- * The algorithm performs a sequence of elementary row-operations until it
- * reduces the input matrix to an identity matrix. Applying the same sequence
- * of elementary row-operations to an identity matrix yields the inverse matrix.
- * If the input matrix is singular, then the algorithm terminates and returns error status
- * <code>ARM_MATH_SINGULAR</code>.
- * \image html MatrixInverse.gif "Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method"
+  @defgroup MatrixInv Matrix Inverse
+
+  Computes the inverse of a matrix.
+
+  The inverse is defined only if the input matrix is square and non-singular (the determinant is non-zero).
+  The function checks that the input and output matrices are square and of the same size.
+
+  Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix
+  inversion of floating-point matrices.
+
+  @par Algorithm
+  The Gauss-Jordan method is used to find the inverse.
+  The algorithm performs a sequence of elementary row-operations until it
+  reduces the input matrix to an identity matrix. Applying the same sequence
+  of elementary row-operations to an identity matrix yields the inverse matrix.
+  If the input matrix is singular, then the algorithm terminates and returns error status
+  <code>ARM_MATH_SINGULAR</code>.
+  \image html MatrixInverse.gif "Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method"
  */
 
 /**
- * @addtogroup MatrixInv
- * @{
+  @addtogroup MatrixInv
+  @{
  */
 
 /**
- * @brief Floating-point matrix inverse.
- * @param[in]       *pSrc points to input matrix structure
- * @param[out]      *pDst points to output matrix structure
- * @return     		The function returns
- * <code>ARM_MATH_SIZE_MISMATCH</code> if the input matrix is not square or if the size
- * of the output matrix does not match the size of the input matrix.
- * If the input matrix is found to be singular (non-invertible), then the function returns
- * <code>ARM_MATH_SINGULAR</code>.  Otherwise, the function returns <code>ARM_MATH_SUCCESS</code>.
+  @brief         Floating-point matrix inverse.
+  @param[in]     pSrc      points to input matrix structure
+  @param[out]    pDst      points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+                   - \ref ARM_MATH_SINGULAR      : Input matrix is found to be singular (non-invertible)
  */
-
+#if defined(ARM_MATH_NEON)
 arm_status arm_mat_inverse_f32(
   const arm_matrix_instance_f32 * pSrc,
   arm_matrix_instance_f32 * pDst)
@@ -82,18 +80,17 @@
   uint32_t numRows = pSrc->numRows;              /* Number of rows in the matrix  */
   uint32_t numCols = pSrc->numCols;              /* Number of Cols in the matrix  */
 
-#if defined (ARM_MATH_DSP)
   float32_t maxC;                                /* maximum value in the column */
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
   float32_t Xchg, in = 0.0f, in1;                /* Temporary input values  */
   uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l;      /* loop counters */
   arm_status status;                             /* status of matrix inverse */
+  float32x4_t vec1;
+  float32x4_t vec2;
+  float32x4_t tmpV;
 
 #ifdef ARM_MATH_MATRIX_CHECK
 
-
   /* Check for matrix mismatch condition */
   if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
      || (pSrc->numRows != pDst->numRows))
@@ -105,42 +102,475 @@
 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
 
   {
+   /*--------------------------------------------------------------------------------------------------------------
+   * Matrix Inverse can be solved using elementary row operations.
+   *
+   *  Gauss-Jordan Method:
+   *
+   *     1. First combine the identity matrix and the input matrix separated by a bar to form an
+   *        augmented matrix as follows:
+   *              _                  _         _         _
+   *             |  a11  a12 | 1   0  |       |  X11 X12  |
+   *             |           |        |   =   |           |
+   *             |_ a21  a22 | 0   1 _|       |_ X21 X21 _|
+   *
+   *    2. In our implementation, pDst Matrix is used as identity matrix.
+   *
+   *    3. Begin with the first row. Let i = 1.
+   *
+   *      4. Check to see if the pivot for column i is the greatest of the column.
+   *       The pivot is the element of the main diagonal that is on the current row.
+   *       For instance, if working with row i, then the pivot element is aii.
+   *       If the pivot is not the most significant of the columns, exchange that row with a row
+   *       below it that does contain the most significant value in column i. If the most
+   *         significant value of the column is zero, then an inverse to that matrix does not exist.
+   *       The most significant value of the column is the absolute maximum.
+   *
+   *      5. Divide every element of row i by the pivot.
+   *
+   *      6. For every row below and  row i, replace that row with the sum of that row and
+   *       a multiple of row i so that each new element in column i below row i is zero.
+   *
+   *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
+   *       for every element below and above the main diagonal.
+   *
+   *    8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).
+   *       Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).
+   *----------------------------------------------------------------------------------------------------------------*/
+
+    /* Working pointer for destination matrix */
+    pOutT1 = pOut;
+
+    /* Loop over the number of rows */
+    rowCnt = numRows;
+
+    /* Making the destination matrix as identity matrix */
+    while (rowCnt > 0U)
+    {
+      /* Writing all zeroes in lower triangle of the destination matrix */
+      j = numRows - rowCnt;
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0f;
+        j--;
+      }
+
+      /* Writing all ones in the diagonal of the destination matrix */
+      *pOutT1++ = 1.0f;
+
+      /* Writing all zeroes in upper triangle of the destination matrix */
+      j = rowCnt - 1U;
+
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0f;
+        j--;
+      }
+
+      /* Decrement the loop counter */
+      rowCnt--;
+    }
+
+    /* Loop over the number of columns of the input matrix.
+       All the elements in each column are processed by the row operations */
+    loopCnt = numCols;
+
+    /* Index modifier to navigate through the columns */
+    l = 0U;
+
+    while (loopCnt > 0U)
+    {
+      /* Check if the pivot element is zero..
+       * If it is zero then interchange the row with non zero row below.
+       * If there is no non zero element to replace in the rows below,
+       * then the matrix is Singular. */
+
+      /* Working pointer for the input matrix that points
+       * to the pivot element of the particular row  */
+      pInT1 = pIn + (l * numCols);
+
+      /* Working pointer for the destination matrix that points
+       * to the pivot element of the particular row  */
+      pOutT1 = pOut + (l * numCols);
+
+      /* Temporary variable to hold the pivot value */
+      in = *pInT1;
+
+      /* Grab the most significant value from column l */
+      maxC = 0;
+
+      for (i = l; i < numRows; i++)
+      {
+        maxC = *pInT1 > 0 ? (*pInT1 > maxC ? *pInT1 : maxC) : (-*pInT1 > maxC ? -*pInT1 : maxC);
+        pInT1 += numCols;
+      }
+
+      /* Update the status if the matrix is singular */
+      if (maxC == 0.0f)
+      {
+        return ARM_MATH_SINGULAR;
+      }
+
+      /* Restore pInT1 */
+      pInT1 = pIn;
+
+      /* Destination pointer modifier */
+      k = 1U;
+
+      /* Check if the pivot element is the most significant of the column */
+      if ( (in > 0.0f ? in : -in) != maxC)
+      {
+        /* Loop over the number rows present below */
+        i = numRows - (l + 1U);
+
+        while (i > 0U)
+        {
+          /* Update the input and destination pointers */
+          pInT2 = pInT1 + (numCols * l);
+          pOutT2 = pOutT1 + (numCols * k);
+
+          /* Look for the most significant element to
+           * replace in the rows below */
+          if ((*pInT2 > 0.0f ? *pInT2: -*pInT2) == maxC)
+          {
+            /* Loop over number of columns
+             * to the right of the pilot element */
+            j = numCols - l;
+
+            while (j > 0U)
+            {
+              /* Exchange the row elements of the input matrix */
+              Xchg = *pInT2;
+              *pInT2++ = *pInT1;
+              *pInT1++ = Xchg;
+
+              /* Decrement the loop counter */
+              j--;
+            }
+
+            /* Loop over number of columns of the destination matrix */
+            j = numCols;
+
+            while (j > 0U)
+            {
+              /* Exchange the row elements of the destination matrix */
+              Xchg = *pOutT2;
+              *pOutT2++ = *pOutT1;
+              *pOutT1++ = Xchg;
+
+              /* Decrement the loop counter */
+              j--;
+            }
+
+            /* Flag to indicate whether exchange is done or not */
+            flag = 1U;
+
+            /* Break after exchange is done */
+            break;
+          }
+
+          /* Update the destination pointer modifier */
+          k++;
+
+          /* Decrement the loop counter */
+          i--;
+        }
+      }
+
+      /* Update the status if the matrix is singular */
+      if ((flag != 1U) && (in == 0.0f))
+      {
+        return ARM_MATH_SINGULAR;
+      }
+
+      /* Points to the pivot row of input and destination matrices */
+      pPivotRowIn = pIn + (l * numCols);
+      pPivotRowDst = pOut + (l * numCols);
+
+      /* Temporary pointers to the pivot row pointers */
+      pInT1 = pPivotRowIn;
+      pInT2 = pPivotRowDst;
+
+      /* Pivot element of the row */
+      in = *pPivotRowIn;
+      tmpV = vdupq_n_f32(1.0/in);
+
+      /* Loop over number of columns
+       * to the right of the pilot element */
+      j = (numCols - l) >> 2;
+
+      while (j > 0U)
+      {
+        /* Divide each element of the row of the input matrix
+         * by the pivot element */
+        vec1 = vld1q_f32(pInT1);
+
+        vec1 = vmulq_f32(vec1, tmpV);
+        vst1q_f32(pInT1, vec1);
+        pInT1 += 4;
+
+        /* Decrement the loop counter */
+        j--;
+      }
+
+      /* Tail */
+      j = (numCols - l) & 3;
+
+      while (j > 0U)
+      {
+        /* Divide each element of the row of the input matrix
+         * by the pivot element */
+        in1 = *pInT1;
+        *pInT1++ = in1 / in;
+
+        /* Decrement the loop counter */
+        j--;
+      }
+
+      /* Loop over number of columns of the destination matrix */
+      j = numCols >> 2;
+
+      while (j > 0U)
+      {
+        /* Divide each element of the row of the destination matrix
+         * by the pivot element */
+        vec1 = vld1q_f32(pInT2);
+
+        vec1 = vmulq_f32(vec1, tmpV);
+        vst1q_f32(pInT2, vec1);
+        pInT2 += 4;
+      
+        /* Decrement the loop counter */
+        j--;
+      }
+
+      /* Tail */
+      j = numCols & 3;
+
+      while (j > 0U)
+      {
+        /* Divide each element of the row of the destination matrix
+         * by the pivot element */
+        in1 = *pInT2;
+        *pInT2++ = in1 / in;
+
+        /* Decrement the loop counter */
+        j--;
+      }
+
+      /* Replace the rows with the sum of that row and a multiple of row i
+       * so that each new element in column i above row i is zero.*/
+
+      /* Temporary pointers for input and destination matrices */
+      pInT1 = pIn;
+      pInT2 = pOut;
+
+      /* index used to check for pivot element */
+      i = 0U;
+
+      /* Loop over number of rows */
+      /*  to be replaced by the sum of that row and a multiple of row i */
+      k = numRows;
+
+      while (k > 0U)
+      {
+        /* Check for the pivot element */
+        if (i == l)
+        {
+          /* If the processing element is the pivot element,
+             only the columns to the right are to be processed */
+          pInT1 += numCols - l;
+
+          pInT2 += numCols;
+        }
+        else
+        {
+          /* Element of the reference row */
+          in = *pInT1;
+          tmpV = vdupq_n_f32(in);
+
+          /* Working pointers for input and destination pivot rows */
+          pPRT_in = pPivotRowIn;
+          pPRT_pDst = pPivotRowDst;
+
+          /* Loop over the number of columns to the right of the pivot element,
+             to replace the elements in the input matrix */
+          j = (numCols - l) >> 2;
+	  
+          while (j > 0U)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            vec1 = vld1q_f32(pInT1);
+            vec2 = vld1q_f32(pPRT_in);
+            vec1 = vmlsq_f32(vec1, tmpV, vec2);
+            vst1q_f32(pInT1, vec1);
+            pPRT_in += 4;
+            pInT1 += 4;
+
+            /* Decrement the loop counter */
+            j--;
+          }
+
+	  /* Tail */
+          j = (numCols - l) & 3;
+
+          while (j > 0U)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            in1 = *pInT1;
+            *pInT1++ = in1 - (in * *pPRT_in++);
+
+            /* Decrement the loop counter */
+            j--;
+          }
+
+          /* Loop over the number of columns to
+             replace the elements in the destination matrix */
+          j = numCols >> 2;
+
+          while (j > 0U)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            vec1 = vld1q_f32(pInT2);
+            vec2 = vld1q_f32(pPRT_pDst);
+            vec1 = vmlsq_f32(vec1, tmpV, vec2);
+            vst1q_f32(pInT2, vec1);
+            pPRT_pDst += 4;
+            pInT2 += 4;
+
+            /* Decrement the loop counter */
+            j--;
+          }
+
+	  /* Tail */
+          j = numCols & 3;
+
+          while (j > 0U)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            in1 = *pInT2;
+            *pInT2++ = in1 - (in * *pPRT_pDst++);
+
+            /* Decrement the loop counter */
+            j--;
+          }
+
+        }
+
+        /* Increment the temporary input pointer */
+        pInT1 = pInT1 + l;
+
+        /* Decrement the loop counter */
+        k--;
+
+        /* Increment the pivot index */
+        i++;
+      }
+
+      /* Increment the input pointer */
+      pIn++;
+
+      /* Decrement the loop counter */
+      loopCnt--;
+
+      /* Increment the index modifier */
+      l++;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+
+    if ((flag != 1U) && (in == 0.0f))
+    {
+      pIn = pSrc->pData;
+      for (i = 0; i < numRows * numCols; i++)
+      {
+        if (pIn[i] != 0.0f)
+            break;
+      }
+
+      if (i == numRows * numCols)
+        status = ARM_MATH_SINGULAR;
+    }
+  }
+  /* Return to application */
+  return (status);
+}
+#else
+arm_status arm_mat_inverse_f32(
+  const arm_matrix_instance_f32 * pSrc,
+        arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
+  float32_t *pInT1, *pInT2;                      /* Temporary input data matrix pointer */
+  float32_t *pOutT1, *pOutT2;                    /* Temporary output data matrix pointer */
+  float32_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst;  /* Temporary input and output data matrix pointer */
+  uint32_t numRows = pSrc->numRows;              /* Number of rows in the matrix  */
+  uint32_t numCols = pSrc->numCols;              /* Number of Cols in the matrix  */
+
+#if defined (ARM_MATH_DSP)
+  float32_t maxC;                                /* maximum value in the column */
+
+  float32_t Xchg, in = 0.0f, in1;                /* Temporary input values  */
+  uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l;      /* loop counters */
+  arm_status status;                             /* status of matrix inverse */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pSrc->numCols) ||
+      (pDst->numRows != pDst->numCols) ||
+      (pSrc->numRows != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
 
     /*--------------------------------------------------------------------------------------------------------------
-	 * Matrix Inverse can be solved using elementary row operations.
-	 *
-	 *	Gauss-Jordan Method:
-	 *
-	 *	   1. First combine the identity matrix and the input matrix separated by a bar to form an
-	 *        augmented matrix as follows:
-	 *				        _ 	      	       _         _	       _
-	 *					   |  a11  a12 | 1   0  |       |  X11 X12  |
-	 *					   |           |        |   =   |           |
-	 *					   |_ a21  a22 | 0   1 _|       |_ X21 X21 _|
-	 *
-	 *		2. In our implementation, pDst Matrix is used as identity matrix.
-	 *
-	 *		3. Begin with the first row. Let i = 1.
-	 *
-	 *	    4. Check to see if the pivot for column i is the greatest of the column.
-	 *		   The pivot is the element of the main diagonal that is on the current row.
-	 *		   For instance, if working with row i, then the pivot element is aii.
-	 *		   If the pivot is not the most significant of the columns, exchange that row with a row
-	 *		   below it that does contain the most significant value in column i. If the most
-	 *         significant value of the column is zero, then an inverse to that matrix does not exist.
-	 *		   The most significant value of the column is the absolute maximum.
-	 *
-	 *	    5. Divide every element of row i by the pivot.
-	 *
-	 *	    6. For every row below and  row i, replace that row with the sum of that row and
-	 *		   a multiple of row i so that each new element in column i below row i is zero.
-	 *
-	 *	    7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
-	 *		   for every element below and above the main diagonal.
-	 *
-	 *		8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).
-	 *		   Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).
-	 *----------------------------------------------------------------------------------------------------------------*/
+     * Matrix Inverse can be solved using elementary row operations.
+     *
+     *  Gauss-Jordan Method:
+     *
+     *      1. First combine the identity matrix and the input matrix separated by a bar to form an
+     *        augmented matrix as follows:
+     *                      _                  _         _         _
+     *                     |  a11  a12 | 1   0  |       |  X11 X12  |
+     *                     |           |        |   =   |           |
+     *                     |_ a21  a22 | 0   1 _|       |_ X21 X21 _|
+     *
+     *      2. In our implementation, pDst Matrix is used as identity matrix.
+     *
+     *      3. Begin with the first row. Let i = 1.
+     *
+     *      4. Check to see if the pivot for column i is the greatest of the column.
+     *         The pivot is the element of the main diagonal that is on the current row.
+     *         For instance, if working with row i, then the pivot element is aii.
+     *         If the pivot is not the most significant of the columns, exchange that row with a row
+     *         below it that does contain the most significant value in column i. If the most
+     *         significant value of the column is zero, then an inverse to that matrix does not exist.
+     *         The most significant value of the column is the absolute maximum.
+     *
+     *      5. Divide every element of row i by the pivot.
+     *
+     *      6. For every row below and  row i, replace that row with the sum of that row and
+     *         a multiple of row i so that each new element in column i below row i is zero.
+     *
+     *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
+     *         for every element below and above the main diagonal.
+     *
+     *      8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).
+     *         Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).
+     *----------------------------------------------------------------------------------------------------------------*/
 
     /* Working pointer for destination matrix */
     pOutT1 = pOut;
@@ -170,7 +600,7 @@
         j--;
       }
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       rowCnt--;
     }
 
@@ -260,7 +690,7 @@
               *pOutT2++ = *pOutT1;
               *pOutT1++ = Xchg;
 
-              /* Decrement the loop counter */
+              /* Decrement loop counter */
               j--;
             }
 
@@ -274,7 +704,7 @@
           /* Update the destination pointer modifier */
           k++;
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           i--;
         }
       }
@@ -385,19 +815,19 @@
             in1 = *pInT2;
             *pInT2++ = in1 - (in * *pPRT_pDst++);
 
-            /* Decrement the loop counter */
+            /* Decrement loop counter */
             j--;
           }
 
         }
 
-        /* Increment the temporary input pointer */
+        /* Increment temporary input pointer */
         pInT1 = pInT1 + l;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
 
-        /* Increment the pivot index */
+        /* Increment pivot index */
         i++;
       }
 
@@ -414,8 +844,6 @@
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   float32_t Xchg, in = 0.0f;                     /* Temporary input values  */
   uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l;      /* loop counters */
   arm_status status;                             /* status of matrix inverse */
@@ -423,50 +851,53 @@
 #ifdef ARM_MATH_MATRIX_CHECK
 
   /* Check for matrix mismatch condition */
-  if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
-     || (pSrc->numRows != pDst->numRows))
+  if ((pSrc->numRows != pSrc->numCols) ||
+      (pDst->numRows != pDst->numCols) ||
+      (pSrc->numRows != pDst->numRows)   )
   {
     /* Set status as ARM_MATH_SIZE_MISMATCH */
     status = ARM_MATH_SIZE_MISMATCH;
   }
   else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
   {
 
     /*--------------------------------------------------------------------------------------------------------------
-	 * Matrix Inverse can be solved using elementary row operations.
-	 *
-	 *	Gauss-Jordan Method:
-	 *
-	 *	   1. First combine the identity matrix and the input matrix separated by a bar to form an
-	 *        augmented matrix as follows:
-	 *				        _  _	      _	    _	   _   _         _	       _
-	 *					   |  |  a11  a12  | | | 1   0  |   |       |  X11 X12  |
-	 *					   |  |            | | |        |   |   =   |           |
-	 *					   |_ |_ a21  a22 _| | |_0   1 _|  _|       |_ X21 X21 _|
-	 *
-	 *		2. In our implementation, pDst Matrix is used as identity matrix.
-	 *
-	 *		3. Begin with the first row. Let i = 1.
-	 *
-	 *	    4. Check to see if the pivot for row i is zero.
-	 *		   The pivot is the element of the main diagonal that is on the current row.
-	 *		   For instance, if working with row i, then the pivot element is aii.
-	 *		   If the pivot is zero, exchange that row with a row below it that does not
-	 *		   contain a zero in column i. If this is not possible, then an inverse
-	 *		   to that matrix does not exist.
-	 *
-	 *	    5. Divide every element of row i by the pivot.
-	 *
-	 *	    6. For every row below and  row i, replace that row with the sum of that row and
-	 *		   a multiple of row i so that each new element in column i below row i is zero.
-	 *
-	 *	    7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
-	 *		   for every element below and above the main diagonal.
-	 *
-	 *		8. Now an identical matrix is formed to the left of the bar(input matrix, src).
-	 *		   Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).
-	 *----------------------------------------------------------------------------------------------------------------*/
+     * Matrix Inverse can be solved using elementary row operations.
+     *
+     *  Gauss-Jordan Method:
+     *
+     *      1. First combine the identity matrix and the input matrix separated by a bar to form an
+     *        augmented matrix as follows:
+     *                      _  _          _     _      _   _         _         _
+     *                     |  |  a11  a12  | | | 1   0  |   |       |  X11 X12  |
+     *                     |  |            | | |        |   |   =   |           |
+     *                     |_ |_ a21  a22 _| | |_0   1 _|  _|       |_ X21 X21 _|
+     *
+     *      2. In our implementation, pDst Matrix is used as identity matrix.
+     *
+     *      3. Begin with the first row. Let i = 1.
+     *
+     *      4. Check to see if the pivot for row i is zero.
+     *         The pivot is the element of the main diagonal that is on the current row.
+     *         For instance, if working with row i, then the pivot element is aii.
+     *         If the pivot is zero, exchange that row with a row below it that does not
+     *         contain a zero in column i. If this is not possible, then an inverse
+     *         to that matrix does not exist.
+     *
+     *      5. Divide every element of row i by the pivot.
+     *
+     *      6. For every row below and  row i, replace that row with the sum of that row and
+     *         a multiple of row i so that each new element in column i below row i is zero.
+     *
+     *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
+     *         for every element below and above the main diagonal.
+     *
+     *      8. Now an identical matrix is formed to the left of the bar(input matrix, src).
+     *         Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).
+     *----------------------------------------------------------------------------------------------------------------*/
 
     /* Working pointer for destination matrix */
     pOutT1 = pOut;
@@ -496,7 +927,7 @@
         j--;
       }
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       rowCnt--;
     }
 
@@ -506,7 +937,7 @@
 
     /* Index modifier to navigate through the columns */
     l = 0U;
-    //for(loopCnt = 0U; loopCnt < numCols; loopCnt++)
+
     while (loopCnt > 0U)
     {
       /* Check if the pivot element is zero..
@@ -640,6 +1071,7 @@
             *pInT1 = *pInT1 - (in * *pPRT_in++);
             pInT1++;
           }
+
           /* Loop over the number of columns to
              replace the elements in the destination matrix */
           for (j = 0U; j < numCols; j++)
@@ -651,19 +1083,21 @@
           }
 
         }
-        /* Increment the temporary input pointer */
+
+        /* Increment temporary input pointer */
         pInT1 = pInT1 + l;
       }
+
       /* Increment the input pointer */
       pIn++;
 
       /* Decrement the loop counter */
       loopCnt--;
+
       /* Increment the index modifier */
       l++;
     }
 
-
 #endif /* #if defined (ARM_MATH_DSP) */
 
     /* Set status as ARM_MATH_SUCCESS */
@@ -682,10 +1116,12 @@
         status = ARM_MATH_SINGULAR;
     }
   }
+
   /* Return to application */
   return (status);
 }
+#endif /* #if defined(ARM_MATH_NEON) */
 
 /**
- * @} end of MatrixInv group
+  @} end of MatrixInv group
  */
diff --git a/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c b/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c
index 54e5982..4607e07 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c
@@ -3,13 +3,13 @@
  * Title:        arm_mat_inverse_f64.c
  * Description:  Floating-point matrix inverse
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,50 +29,28 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
+ */
+
+
+/**
+  @addtogroup MatrixInv
+  @{
  */
 
 /**
- * @defgroup MatrixInv Matrix Inverse
- *
- * Computes the inverse of a matrix.
- *
- * The inverse is defined only if the input matrix is square and non-singular (the determinant
- * is non-zero). The function checks that the input and output matrices are square and of the
- * same size.
- *
- * Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix
- * inversion of floating-point matrices.
- *
- * \par Algorithm
- * The Gauss-Jordan method is used to find the inverse.
- * The algorithm performs a sequence of elementary row-operations until it
- * reduces the input matrix to an identity matrix. Applying the same sequence
- * of elementary row-operations to an identity matrix yields the inverse matrix.
- * If the input matrix is singular, then the algorithm terminates and returns error status
- * <code>ARM_MATH_SINGULAR</code>.
- * \image html MatrixInverse.gif "Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method"
- */
-
-/**
- * @addtogroup MatrixInv
- * @{
- */
-
-/**
- * @brief Floating-point matrix inverse.
- * @param[in]       *pSrc points to input matrix structure
- * @param[out]      *pDst points to output matrix structure
- * @return     		The function returns
- * <code>ARM_MATH_SIZE_MISMATCH</code> if the input matrix is not square or if the size
- * of the output matrix does not match the size of the input matrix.
- * If the input matrix is found to be singular (non-invertible), then the function returns
- * <code>ARM_MATH_SINGULAR</code>.  Otherwise, the function returns <code>ARM_MATH_SUCCESS</code>.
+  @brief         Floating-point (64 bit) matrix inverse.
+  @param[in]     pSrc      points to input matrix structure
+  @param[out]    pDst      points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+                   - \ref ARM_MATH_SINGULAR      : Input matrix is found to be singular (non-invertible)
  */
 
 arm_status arm_mat_inverse_f64(
   const arm_matrix_instance_f64 * pSrc,
-  arm_matrix_instance_f64 * pDst)
+        arm_matrix_instance_f64 * pDst)
 {
   float64_t *pIn = pSrc->pData;                  /* input data matrix pointer */
   float64_t *pOut = pDst->pData;                 /* output data matrix pointer */
@@ -85,62 +63,61 @@
 #if defined (ARM_MATH_DSP)
   float64_t maxC;                                /* maximum value in the column */
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float64_t Xchg, in = 0.0f, in1;                /* Temporary input values  */
+  float64_t Xchg, in = 0.0, in1;                /* Temporary input values  */
   uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l;      /* loop counters */
   arm_status status;                             /* status of matrix inverse */
 
 #ifdef ARM_MATH_MATRIX_CHECK
 
-
   /* Check for matrix mismatch condition */
-  if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
-     || (pSrc->numRows != pDst->numRows))
+  if ((pSrc->numRows != pSrc->numCols) ||
+      (pDst->numRows != pDst->numCols) ||
+      (pSrc->numRows != pDst->numRows)   )
   {
     /* Set status as ARM_MATH_SIZE_MISMATCH */
     status = ARM_MATH_SIZE_MISMATCH;
   }
   else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
 
   {
 
     /*--------------------------------------------------------------------------------------------------------------
-	 * Matrix Inverse can be solved using elementary row operations.
-	 *
-	 *	Gauss-Jordan Method:
-	 *
-	 *	   1. First combine the identity matrix and the input matrix separated by a bar to form an
-	 *        augmented matrix as follows:
-	 *				        _ 	      	       _         _	       _
-	 *					   |  a11  a12 | 1   0  |       |  X11 X12  |
-	 *					   |           |        |   =   |           |
-	 *					   |_ a21  a22 | 0   1 _|       |_ X21 X21 _|
-	 *
-	 *		2. In our implementation, pDst Matrix is used as identity matrix.
-	 *
-	 *		3. Begin with the first row. Let i = 1.
-	 *
-	 *	    4. Check to see if the pivot for column i is the greatest of the column.
-	 *		   The pivot is the element of the main diagonal that is on the current row.
-	 *		   For instance, if working with row i, then the pivot element is aii.
-	 *		   If the pivot is not the most significant of the columns, exchange that row with a row
-	 *		   below it that does contain the most significant value in column i. If the most
-	 *         significant value of the column is zero, then an inverse to that matrix does not exist.
-	 *		   The most significant value of the column is the absolute maximum.
-	 *
-	 *	    5. Divide every element of row i by the pivot.
-	 *
-	 *	    6. For every row below and  row i, replace that row with the sum of that row and
-	 *		   a multiple of row i so that each new element in column i below row i is zero.
-	 *
-	 *	    7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
-	 *		   for every element below and above the main diagonal.
-	 *
-	 *		8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).
-	 *		   Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).
-	 *----------------------------------------------------------------------------------------------------------------*/
+     * Matrix Inverse can be solved using elementary row operations.
+     *
+     *  Gauss-Jordan Method:
+     *
+     *      1. First combine the identity matrix and the input matrix separated by a bar to form an
+     *        augmented matrix as follows:
+     *                      _                  _         _         _
+     *                     |  a11  a12 | 1   0  |       |  X11 X12  |
+     *                     |           |        |   =   |           |
+     *                     |_ a21  a22 | 0   1 _|       |_ X21 X21 _|
+     *
+     *      2. In our implementation, pDst Matrix is used as identity matrix.
+     *
+     *      3. Begin with the first row. Let i = 1.
+     *
+     *      4. Check to see if the pivot for column i is the greatest of the column.
+     *         The pivot is the element of the main diagonal that is on the current row.
+     *         For instance, if working with row i, then the pivot element is aii.
+     *         If the pivot is not the most significant of the columns, exchange that row with a row
+     *         below it that does contain the most significant value in column i. If the most
+     *         significant value of the column is zero, then an inverse to that matrix does not exist.
+     *         The most significant value of the column is the absolute maximum.
+     *
+     *      5. Divide every element of row i by the pivot.
+     *
+     *      6. For every row below and  row i, replace that row with the sum of that row and
+     *         a multiple of row i so that each new element in column i below row i is zero.
+     *
+     *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
+     *         for every element below and above the main diagonal.
+     *
+     *      8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).
+     *         Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).
+     *----------------------------------------------------------------------------------------------------------------*/
 
     /* Working pointer for destination matrix */
     pOutT1 = pOut;
@@ -155,22 +132,22 @@
       j = numRows - rowCnt;
       while (j > 0U)
       {
-        *pOutT1++ = 0.0f;
+        *pOutT1++ = 0.0;
         j--;
       }
 
       /* Writing all ones in the diagonal of the destination matrix */
-      *pOutT1++ = 1.0f;
+      *pOutT1++ = 1.0;
 
       /* Writing all zeroes in upper triangle of the destination matrix */
       j = rowCnt - 1U;
       while (j > 0U)
       {
-        *pOutT1++ = 0.0f;
+        *pOutT1++ = 0.0;
         j--;
       }
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       rowCnt--;
     }
 
@@ -208,7 +185,7 @@
       }
 
       /* Update the status if the matrix is singular */
-      if (maxC == 0.0f)
+      if (maxC == 0.0)
       {
         return ARM_MATH_SINGULAR;
       }
@@ -220,7 +197,7 @@
       k = 1U;
 
       /* Check if the pivot element is the most significant of the column */
-      if ( (in > 0.0f ? in : -in) != maxC)
+      if ( (in > 0.0 ? in : -in) != maxC)
       {
         /* Loop over the number rows present below */
         i = numRows - (l + 1U);
@@ -233,7 +210,7 @@
 
           /* Look for the most significant element to
            * replace in the rows below */
-          if ((*pInT2 > 0.0f ? *pInT2: -*pInT2) == maxC)
+          if ((*pInT2 > 0.0 ? *pInT2: -*pInT2) == maxC)
           {
             /* Loop over number of columns
              * to the right of the pilot element */
@@ -260,7 +237,7 @@
               *pOutT2++ = *pOutT1;
               *pOutT1++ = Xchg;
 
-              /* Decrement the loop counter */
+              /* Decrement loop counter */
               j--;
             }
 
@@ -274,13 +251,13 @@
           /* Update the destination pointer modifier */
           k++;
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           i--;
         }
       }
 
       /* Update the status if the matrix is singular */
-      if ((flag != 1U) && (in == 0.0f))
+      if ((flag != 1U) && (in == 0.0))
       {
         return ARM_MATH_SINGULAR;
       }
@@ -385,19 +362,19 @@
             in1 = *pInT2;
             *pInT2++ = in1 - (in * *pPRT_pDst++);
 
-            /* Decrement the loop counter */
+            /* Decrement loop counter */
             j--;
           }
 
         }
 
-        /* Increment the temporary input pointer */
+        /* Increment temporary input pointer */
         pInT1 = pInT1 + l;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
 
-        /* Increment the pivot index */
+        /* Increment pivot index */
         i++;
       }
 
@@ -414,59 +391,60 @@
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  float64_t Xchg, in = 0.0f;                     /* Temporary input values  */
+  float64_t Xchg, in = 0.0;                     /* Temporary input values  */
   uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l;      /* loop counters */
   arm_status status;                             /* status of matrix inverse */
 
 #ifdef ARM_MATH_MATRIX_CHECK
 
   /* Check for matrix mismatch condition */
-  if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
-     || (pSrc->numRows != pDst->numRows))
+  if ((pSrc->numRows != pSrc->numCols) ||
+      (pDst->numRows != pDst->numCols) ||
+      (pSrc->numRows != pDst->numRows)   )
   {
     /* Set status as ARM_MATH_SIZE_MISMATCH */
     status = ARM_MATH_SIZE_MISMATCH;
   }
   else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
   {
 
     /*--------------------------------------------------------------------------------------------------------------
-	 * Matrix Inverse can be solved using elementary row operations.
-	 *
-	 *	Gauss-Jordan Method:
-	 *
-	 *	   1. First combine the identity matrix and the input matrix separated by a bar to form an
-	 *        augmented matrix as follows:
-	 *				        _  _	      _	    _	   _   _         _	       _
-	 *					   |  |  a11  a12  | | | 1   0  |   |       |  X11 X12  |
-	 *					   |  |            | | |        |   |   =   |           |
-	 *					   |_ |_ a21  a22 _| | |_0   1 _|  _|       |_ X21 X21 _|
-	 *
-	 *		2. In our implementation, pDst Matrix is used as identity matrix.
-	 *
-	 *		3. Begin with the first row. Let i = 1.
-	 *
-	 *	    4. Check to see if the pivot for row i is zero.
-	 *		   The pivot is the element of the main diagonal that is on the current row.
-	 *		   For instance, if working with row i, then the pivot element is aii.
-	 *		   If the pivot is zero, exchange that row with a row below it that does not
-	 *		   contain a zero in column i. If this is not possible, then an inverse
-	 *		   to that matrix does not exist.
-	 *
-	 *	    5. Divide every element of row i by the pivot.
-	 *
-	 *	    6. For every row below and  row i, replace that row with the sum of that row and
-	 *		   a multiple of row i so that each new element in column i below row i is zero.
-	 *
-	 *	    7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
-	 *		   for every element below and above the main diagonal.
-	 *
-	 *		8. Now an identical matrix is formed to the left of the bar(input matrix, src).
-	 *		   Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).
-	 *----------------------------------------------------------------------------------------------------------------*/
+     * Matrix Inverse can be solved using elementary row operations.
+     *
+     *  Gauss-Jordan Method:
+     *
+     *      1. First combine the identity matrix and the input matrix separated by a bar to form an
+     *        augmented matrix as follows:
+     *                      _  _          _     _      _   _         _         _
+     *                     |  |  a11  a12  | | | 1   0  |   |       |  X11 X12  |
+     *                     |  |            | | |        |   |   =   |           |
+     *                     |_ |_ a21  a22 _| | |_0   1 _|  _|       |_ X21 X21 _|
+     *
+     *      2. In our implementation, pDst Matrix is used as identity matrix.
+     *
+     *      3. Begin with the first row. Let i = 1.
+     *
+     *      4. Check to see if the pivot for row i is zero.
+     *         The pivot is the element of the main diagonal that is on the current row.
+     *         For instance, if working with row i, then the pivot element is aii.
+     *         If the pivot is zero, exchange that row with a row below it that does not
+     *         contain a zero in column i. If this is not possible, then an inverse
+     *         to that matrix does not exist.
+     *
+     *      5. Divide every element of row i by the pivot.
+     *
+     *      6. For every row below and  row i, replace that row with the sum of that row and
+     *         a multiple of row i so that each new element in column i below row i is zero.
+     *
+     *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
+     *         for every element below and above the main diagonal.
+     *
+     *      8. Now an identical matrix is formed to the left of the bar(input matrix, src).
+     *         Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).
+     *----------------------------------------------------------------------------------------------------------------*/
 
     /* Working pointer for destination matrix */
     pOutT1 = pOut;
@@ -481,22 +459,22 @@
       j = numRows - rowCnt;
       while (j > 0U)
       {
-        *pOutT1++ = 0.0f;
+        *pOutT1++ = 0.0;
         j--;
       }
 
       /* Writing all ones in the diagonal of the destination matrix */
-      *pOutT1++ = 1.0f;
+      *pOutT1++ = 1.0;
 
       /* Writing all zeroes in upper triangle of the destination matrix */
       j = rowCnt - 1U;
       while (j > 0U)
       {
-        *pOutT1++ = 0.0f;
+        *pOutT1++ = 0.0;
         j--;
       }
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       rowCnt--;
     }
 
@@ -506,7 +484,7 @@
 
     /* Index modifier to navigate through the columns */
     l = 0U;
-    //for(loopCnt = 0U; loopCnt < numCols; loopCnt++)
+
     while (loopCnt > 0U)
     {
       /* Check if the pivot element is zero..
@@ -529,7 +507,7 @@
       k = 1U;
 
       /* Check if the pivot element is zero */
-      if (*pInT1 == 0.0f)
+      if (*pInT1 == 0.0)
       {
         /* Loop over the number rows present below */
         for (i = (l + 1U); i < numRows; i++)
@@ -540,7 +518,7 @@
 
           /* Check if there is a non zero pivot element to
            * replace in the rows below */
-          if (*pInT2 != 0.0f)
+          if (*pInT2 != 0.0)
           {
             /* Loop over number of columns
              * to the right of the pilot element */
@@ -572,7 +550,7 @@
       }
 
       /* Update the status if the matrix is singular */
-      if ((flag != 1U) && (in == 0.0f))
+      if ((flag != 1U) && (in == 0.0))
       {
         return ARM_MATH_SINGULAR;
       }
@@ -640,6 +618,7 @@
             *pInT1 = *pInT1 - (in * *pPRT_in++);
             pInT1++;
           }
+
           /* Loop over the number of columns to
              replace the elements in the destination matrix */
           for (j = 0U; j < numCols; j++)
@@ -651,30 +630,32 @@
           }
 
         }
-        /* Increment the temporary input pointer */
+
+        /* Increment temporary input pointer */
         pInT1 = pInT1 + l;
       }
+
       /* Increment the input pointer */
       pIn++;
 
       /* Decrement the loop counter */
       loopCnt--;
+
       /* Increment the index modifier */
       l++;
     }
 
-
 #endif /* #if defined (ARM_MATH_DSP) */
 
     /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
 
-    if ((flag != 1U) && (in == 0.0f))
+    if ((flag != 1U) && (in == 0.0))
     {
       pIn = pSrc->pData;
       for (i = 0; i < numRows * numCols; i++)
       {
-        if (pIn[i] != 0.0f)
+        if (pIn[i] != 0.0)
             break;
       }
 
@@ -682,10 +663,11 @@
         status = ARM_MATH_SINGULAR;
     }
   }
+
   /* Return to application */
   return (status);
 }
 
 /**
- * @} end of MatrixInv group
+  @} end of MatrixInv group
  */
diff --git a/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c b/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c
index a038f2f..ffddf99 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_mat_mult_f32.c
  * Description:  Floating-point matrix multiplication
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -62,6 +62,9 @@
  * @return     		The function returns either
  * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
  */
+#if defined(ARM_MATH_NEON)
+
+#define GROUPOFROWS 8
 
 arm_status arm_mat_mult_f32(
   const arm_matrix_instance_f32 * pSrcA,
@@ -78,32 +81,225 @@
   uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
   uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
 
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
 
   float32_t in1, in2, in3, in4;
-  uint16_t col, i = 0U, j, row = numRowsA, colCnt;      /* loop counters */
+  uint16_t col, i = 0U, j, row = numRowsA, rowCnt, colCnt;      /* loop counters */
   arm_status status;                             /* status of matrix multiplication */
 
-#ifdef ARM_MATH_MATRIX_CHECK
+  float32x4_t a0V, a1V, a2V, a3V, a4V, a5V, a6V, a7V;
+  float32x4_t acc0,acc1,acc2,acc3,acc4,acc5,acc6,acc7,temp;
+  float32x2_t accum = vdup_n_f32(0);
+  float32_t *pIn1B = pSrcA->pData;    
+  float32_t *pIn1C = pSrcA->pData;    
+  float32_t *pIn1D = pSrcA->pData;  
+  float32_t *pIn1E = pSrcA->pData; 
+  float32_t *pIn1F = pSrcA->pData; 
+  float32_t *pIn1G = pSrcA->pData; 
+  float32_t *pIn1H = pSrcA->pData;   
 
+  float32_t *pxB,*pxC, *pxD, *pxE, *pxF, *pxG, *pxH;                                 /* Temporary output data matrix pointer */
+  float32_t sum0,sum1, sum2,sum3, sum4, sum5 , sum6, sum7;
+
+#ifdef ARM_MATH_MATRIX_CHECK
 
   /* Check for matrix mismatch condition */
   if ((pSrcA->numCols != pSrcB->numRows) ||
      (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
   {
-
     /* Set status as ARM_MATH_SIZE_MISMATCH */
     status = ARM_MATH_SIZE_MISMATCH;
   }
   else
 #endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-
   {
     /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
+    /* Row loop */
+    rowCnt = row >> 3;
+
+    while(rowCnt > 0)
+    {
+      /* Output pointer is set to starting address of the row being processed */
+      px = pOut + GROUPOFROWS*i;
+      pxB = px + numColsB;
+      pxC = px + 2*numColsB;
+      pxD = px + 3*numColsB;
+      pxE = px + 4*numColsB;
+      pxF = px + 5*numColsB;
+      pxG = px + 6*numColsB;
+      pxH = px + 7*numColsB;
+
+      /* For every row wise process, the column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, the pIn2 pointer is set
+       ** to the starting address of the pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      j = 0U;
+
+      /* Column loop */
+      do
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sum0 = 0.0f;
+        sum1 = 0.0f;
+        sum2 = 0.0f;
+        sum3 = 0.0f;
+        sum4 = 0.0f;
+        sum5 = 0.0f;
+        sum6 = 0.0f;
+        sum7 = 0.0f;
+
+        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
+        pIn1 = pInA;
+        pIn1B = pIn1 + numColsA;
+        pIn1C = pIn1 + 2*numColsA;
+        pIn1D = pIn1 + 3*numColsA;
+        pIn1E = pIn1 + 4*numColsA;
+        pIn1F = pIn1 + 5*numColsA;
+        pIn1G = pIn1 + 6*numColsA;
+        pIn1H = pIn1 + 7*numColsA;
+
+        acc0 = vdupq_n_f32(0.0);
+        acc1 = vdupq_n_f32(0.0);
+        acc2 = vdupq_n_f32(0.0);
+        acc3 = vdupq_n_f32(0.0);
+        acc4 = vdupq_n_f32(0.0);
+        acc5 = vdupq_n_f32(0.0);
+        acc6 = vdupq_n_f32(0.0);
+        acc7 = vdupq_n_f32(0.0);
+
+        /* Compute 4 MACs simultaneously. */
+        colCnt = numColsA >> 2U;
+
+        /* Matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
+          a0V = vld1q_f32(pIn1);  
+          a1V = vld1q_f32(pIn1B);  
+          a2V = vld1q_f32(pIn1C); 
+          a3V = vld1q_f32(pIn1D); 
+          a4V = vld1q_f32(pIn1E); 
+          a5V = vld1q_f32(pIn1F); 
+          a6V = vld1q_f32(pIn1G); 
+          a7V = vld1q_f32(pIn1H); 
+
+	  pIn1 += 4;
+          pIn1B += 4;
+          pIn1C += 4;
+          pIn1D += 4;
+          pIn1E += 4;
+          pIn1F += 4;
+          pIn1G += 4;
+          pIn1H += 4;
+          
+          temp[0] = *pIn2;
+          pIn2 += numColsB;
+          temp[1] = *pIn2;
+          pIn2 += numColsB;
+          temp[2] = *pIn2;
+          pIn2 += numColsB;
+          temp[3] = *pIn2;
+          pIn2 += numColsB;
+
+          acc0 = vmlaq_f32(acc0,a0V,temp);
+          acc1 = vmlaq_f32(acc1,a1V,temp);
+          acc2 = vmlaq_f32(acc2,a2V,temp);
+          acc3 = vmlaq_f32(acc3,a3V,temp);
+          acc4 = vmlaq_f32(acc4,a4V,temp);
+          acc5 = vmlaq_f32(acc5,a5V,temp);
+          acc6 = vmlaq_f32(acc6,a6V,temp);
+          acc7 = vmlaq_f32(acc7,a7V,temp);
+
+          /* Decrement the loop count */
+          colCnt--;
+        }
+
+        accum = vpadd_f32(vget_low_f32(acc0), vget_high_f32(acc0));
+        sum0 += accum[0] + accum[1];
+
+        accum = vpadd_f32(vget_low_f32(acc1), vget_high_f32(acc1));
+        sum1 += accum[0] + accum[1];
+
+        accum = vpadd_f32(vget_low_f32(acc2), vget_high_f32(acc2));
+        sum2 += accum[0] + accum[1];
+
+        accum = vpadd_f32(vget_low_f32(acc3), vget_high_f32(acc3));
+        sum3 += accum[0] + accum[1];
+
+        accum = vpadd_f32(vget_low_f32(acc4), vget_high_f32(acc4));
+        sum4 += accum[0] + accum[1];
+
+        accum = vpadd_f32(vget_low_f32(acc5), vget_high_f32(acc5));
+        sum5 += accum[0] + accum[1];
+
+        accum = vpadd_f32(vget_low_f32(acc6), vget_high_f32(acc6));
+        sum6 += accum[0] + accum[1];
+
+        accum = vpadd_f32(vget_low_f32(acc7), vget_high_f32(acc7));
+        sum7 += accum[0] + accum[1];
+
+        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        colCnt = numColsA & 3;
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
+          sum0 += *pIn1++ * (*pIn2);
+          sum1 += *pIn1B++ * (*pIn2);
+          sum2 += *pIn1C++ * (*pIn2);
+          sum3 += *pIn1D++ * (*pIn2);
+          sum4 += *pIn1E++ * (*pIn2);
+          sum5 += *pIn1F++ * (*pIn2);
+          sum6 += *pIn1G++ * (*pIn2);
+          sum7 += *pIn1H++ * (*pIn2);
+          pIn2 += numColsB;
+
+          /* Decrement the loop counter */
+          colCnt--;
+        }
+
+        /* Store the result in the destination buffer */
+        *px++ = sum0;
+        *pxB++ = sum1;
+        *pxC++ = sum2;
+        *pxD++ = sum3;
+        *pxE++ = sum4;
+        *pxF++ = sum5;
+        *pxG++ = sum6;
+        *pxH++ = sum7;
+
+        /* Update the pointer pIn2 to point to the  starting address of the next column */
+        j++;
+        pIn2 = pSrcB->pData + j;
+
+        /* Decrement the column loop counter */
+        col--;
+
+      } while (col > 0U);
+
+      /* Update the pointer pInA to point to the  starting address of the next row */
+      i = i + numColsB;
+      pInA = pInA + GROUPOFROWS*numColsA;
+
+      /* Decrement the row loop counter */
+      rowCnt--;
+    } 
+
+    /*
+
+    i was the index of a group of rows computed by previous loop.
+    Now i is the index of a row since below code is computing row per row
+    and no more group of row per group of rows.
+
+    */
+
+    i = GROUPOFROWS*i;
+    rowCnt = row & 7;
+
+    while(rowCnt > 0)
     {
       /* Output pointer is set to starting address of the row being processed */
       px = pOut + i;
@@ -117,7 +313,7 @@
 
       j = 0U;
 
-      /* column loop */
+      /* Column loop */
       do
       {
         /* Set the variable sum, that acts as accumulator, to zero */
@@ -126,43 +322,43 @@
         /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
         pIn1 = pInA;
 
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+        acc0 = vdupq_n_f32(0.0);
+
+        /* Compute 4 MACs simultaneously. */
         colCnt = numColsA >> 2U;
 
-        /* matrix multiplication        */
+        /* Matrix multiplication   */
         while (colCnt > 0U)
         {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          in3 = *pIn2;
+          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
+          a0V = vld1q_f32(pIn1);  // load & separate real/imag pSrcA (de-interleave 2)
+          pIn1 += 4;
+          
+          temp[0] = *pIn2;
           pIn2 += numColsB;
-          in1 = pIn1[0];
-          in2 = pIn1[1];
-          sum += in1 * in3;
-          in4 = *pIn2;
+          temp[1] = *pIn2;
           pIn2 += numColsB;
-          sum += in2 * in4;
+          temp[2] = *pIn2;
+          pIn2 += numColsB;
+          temp[3] = *pIn2;
+          pIn2 += numColsB;
 
-          in3 = *pIn2;
-          pIn2 += numColsB;
-          in1 = pIn1[2];
-          in2 = pIn1[3];
-          sum += in1 * in3;
-          in4 = *pIn2;
-          pIn2 += numColsB;
-          sum += in2 * in4;
-          pIn1 += 4U;
+          acc0 = vmlaq_f32(acc0,a0V,temp);
 
           /* Decrement the loop count */
           colCnt--;
         }
 
+        accum = vpadd_f32(vget_low_f32(acc0), vget_high_f32(acc0));
+        sum += accum[0] + accum[1];
+
         /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
          ** No loop unrolling is used. */
         colCnt = numColsA % 0x4U;
 
         while (colCnt > 0U)
         {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
+          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
           sum += *pIn1++ * (*pIn2);
           pIn2 += numColsB;
 
@@ -182,40 +378,67 @@
 
       } while (col > 0U);
 
+
+      /* Update the pointer pInA to point to the  starting address of the next row */
+      i = i + numColsB;
+      pInA = pInA + numColsA;
+
+      /* Decrement the row loop counter */
+      rowCnt--;
+
+    } 
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
 #else
-
-  /* Run the below code for Cortex-M0 */
-
-  float32_t *pInB = pSrcB->pData;                /* input data matrix pointer B */
-  uint16_t col, i = 0U, row = numRowsA, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
+arm_status arm_mat_mult_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+        arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn1 = pSrcA->pData;                /* Input data matrix pointer A */
+  float32_t *pIn2 = pSrcB->pData;                /* Input data matrix pointer B */
+  float32_t *pInA = pSrcA->pData;                /* Input data matrix pointer A */
+  float32_t *pInB = pSrcB->pData;                /* Input data matrix pointer B */
+  float32_t *pOut = pDst->pData;                 /* Output data matrix pointer */
+  float32_t *px;                                 /* Temporary output data matrix pointer */
+  float32_t sum;                                 /* Accumulator */
+  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+  uint32_t col, i = 0U, row = numRowsA, colCnt;  /* Loop counters */
+  arm_status status;                             /* Status of matrix multiplication */
 
 #ifdef ARM_MATH_MATRIX_CHECK
 
   /* Check for matrix mismatch condition */
   if ((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
   {
-
     /* Set status as ARM_MATH_SIZE_MISMATCH */
     status = ARM_MATH_SIZE_MISMATCH;
   }
   else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
 
   {
-    /* The following loop performs the dot-product of each row in pInA with each column in pInB */
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
     /* row loop */
     do
     {
-      /* Output pointer is set to starting address of the row being processed */
+      /* Output pointer is set to starting address of row being processed */
       px = pOut + i;
 
-      /* For every row wise process, the column loop counter is to be initiated */
+      /* For every row wise process, column loop counter is to be initiated */
       col = numColsB;
 
-      /* For every row wise process, the pIn2 pointer is set
-       ** to the starting address of the pSrcB data */
+      /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */
       pIn2 = pSrcB->pData;
 
       /* column loop */
@@ -224,43 +447,78 @@
         /* Set the variable sum, that acts as accumulator, to zero */
         sum = 0.0f;
 
-        /* Initialize the pointer pIn1 to point to the starting address of the row being processed */
+        /* Initialize pointer pIn1 to point to starting address of column being processed */
         pIn1 = pInA;
 
-        /* Matrix A columns number of MAC operations are to be performed */
-        colCnt = numColsA;
+#if defined (ARM_MATH_LOOPUNROLL)
 
+        /* Loop unrolling: Compute 4 MACs at a time. */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
         while (colCnt > 0U)
         {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          sum += *pIn1++ * (*pIn2);
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* Perform the multiply-accumulates */
+          sum += *pIn1++ * *pIn2;
           pIn2 += numColsB;
 
-          /* Decrement the loop counter */
+          sum += *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          sum += *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          sum += *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          /* Decrement loop counter */
           colCnt--;
         }
 
-        /* Store the result in the destination buffer */
+        /* Loop unrolling: Compute remaining MACs */
+        colCnt = numColsA % 0x4U;
+
+#else
+
+        /* Initialize cntCnt with number of columns */
+        colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* Perform the multiply-accumulates */
+          sum += *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Store result in destination buffer */
         *px++ = sum;
 
-        /* Decrement the column loop counter */
+        /* Decrement column loop counter */
         col--;
 
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
+        /* Update pointer pIn2 to point to starting address of next column */
         pIn2 = pInB + (numColsB - col);
 
       } while (col > 0U);
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
-      /* Update the pointer pInA to point to the  starting address of the next row */
+      /* Update pointer pInA to point to starting address of next row */
       i = i + numColsB;
       pInA = pInA + numColsA;
 
-      /* Decrement the row loop counter */
+      /* Decrement row loop counter */
       row--;
 
     } while (row > 0U);
+
     /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
@@ -269,6 +527,8 @@
   return (status);
 }
 
+#endif /* #if defined(ARM_MATH_NEON) */
+
 /**
  * @} end of MatrixMult group
  */
diff --git a/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c b/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c
index 8d720c7..670ace1 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_mat_mult_fast_q15.c
  * Description:  Q15 matrix multiplication (fast variant)
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,206 +29,165 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
  */
 
 /**
- * @addtogroup MatrixMult
- * @{
+  @addtogroup MatrixMult
+  @{
  */
 
-
 /**
- * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
- * @param[in]       *pSrcA points to the first input matrix structure
- * @param[in]       *pSrcB points to the second input matrix structure
- * @param[out]      *pDst points to output matrix structure
- * @param[in]       *pState points to the array for storing intermediate results
- * @return          The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The difference between the function arm_mat_mult_q15() and this fast variant is that
- * the fast variant use a 32-bit rather than a 64-bit accumulator.
- * The result of each 1.15 x 1.15 multiplication is truncated to
- * 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30
- * format. Finally, the accumulator is saturated and converted to a 1.15 result.
- *
- * \par
- * The fast version has the same overflow behavior as the standard version but provides
- * less precision since it discards the low 16 bits of each multiplication result.
- * In order to avoid overflows completely the input signals must be scaled down.
- * Scale down one of the input matrices by log2(numColsA) bits to
- * avoid overflows, as a total of numColsA additions are computed internally for each
- * output element.
- *
- * \par
- * See <code>arm_mat_mult_q15()</code> for a slower implementation of this function
- * which uses 64-bit accumulation to provide higher precision.
+  @brief         Q15 matrix multiplication (fast variant).
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @param[in]     pState     points to the array for storing intermediate results
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The difference between the function \ref arm_mat_mult_q15() and this fast variant is that
+                   the fast variant use a 32-bit rather than a 64-bit accumulator.
+                   The result of each 1.15 x 1.15 multiplication is truncated to
+                   2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30
+                   format. Finally, the accumulator is saturated and converted to a 1.15 result.
+  @par
+                   The fast version has the same overflow behavior as the standard version but provides
+                   less precision since it discards the low 16 bits of each multiplication result.
+                   In order to avoid overflows completely the input signals must be scaled down.
+                   Scale down one of the input matrices by log2(numColsA) bits to avoid overflows,
+                   as a total of numColsA additions are computed internally for each output element.
+  @remark
+                   Refer to \ref arm_mat_mult_q15() for a slower implementation of this function
+                   which uses 64-bit accumulation to provide higher precision.
  */
 
 arm_status arm_mat_mult_fast_q15(
   const arm_matrix_instance_q15 * pSrcA,
   const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst,
-  q15_t * pState)
+        arm_matrix_instance_q15 * pDst,
+        q15_t                   * pState)
 {
-  q31_t sum;                                     /* accumulator */
-  q15_t *pSrcBT = pState;                        /* input data matrix pointer for transpose */
-  q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
-  q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
-  q15_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  uint16_t numRowsB = pSrcB->numRows;            /* number of rows of input matrix A    */
-  uint32_t col, i = 0U, row = numRowsB, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
+        q31_t sum;                                     /* Accumulator */
+        q15_t *pSrcBT = pState;                        /* Input data matrix pointer for transpose */
+        q15_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A of Q15 type */
+        q15_t *pInB = pSrcB->pData;                    /* Input data matrix pointer B of Q15 type */
+        q15_t *px;                                     /* Temporary output data matrix pointer */
+        uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+        uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+        uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+        uint16_t numRowsB = pSrcB->numRows;            /* Number of rows of input matrix A */
+        uint32_t col, i = 0U, row = numRowsB, colCnt;  /* Loop counters */
+        arm_status status;                             /* Status of matrix multiplication */
 
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  q31_t in;                                      /* Temporary variable to hold the input value */
-  q31_t inA1, inA2, inB1, inB2;
-  q31_t sum2, sum3, sum4;
-  q15_t *pInA2, *pInB2, *px2;
-  uint32_t j = 0;
-
+#if defined (ARM_MATH_DSP)
+        q31_t in;                                      /* Temporary variable to hold the input value */
+        q31_t inA1, inB1, inA2, inB2;
+        q31_t sum2, sum3, sum4;
+        q15_t *pInA2, *pInB2, *px2;
+        uint32_t j = 0;
 #else
-
-  q15_t in;                                      /* Temporary variable to hold the input value */
-  q15_t inA1, inA2, inB1, inB2;
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
+        q15_t in;                                      /* Temporary variable to hold the input value */
+        q15_t inA1, inB1, inA2, inB2;
+#endif /* #if defined (ARM_MATH_DSP) */
 
 #ifdef ARM_MATH_MATRIX_CHECK
+
   /* Check for matrix mismatch condition */
   if ((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
   {
     /* Set status as ARM_MATH_SIZE_MISMATCH */
     status = ARM_MATH_SIZE_MISMATCH;
   }
   else
-#endif
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
   {
     /* Matrix transpose */
     do
     {
-      /* Apply loop unrolling and exchange the columns with row elements */
-      col = numColsB >> 2;
-
-      /* The pointer px is set to starting address of the column being processed */
+      /* The pointer px is set to starting address of column being processed */
       px = pSrcBT + i;
 
+      /* Apply loop unrolling and exchange columns with row elements */
+      col = numColsB >> 2U;
+
       /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
        ** a second loop below computes the remaining 1 to 3 samples. */
       while (col > 0U)
       {
-#ifndef UNALIGNED_SUPPORT_DISABLE
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
 
-        /* Unpack and store one element in the destination */
+#if defined (ARM_MATH_DSP)
+
+        /* Read two elements from row */
+        in = read_q15x2_ia ((q15_t **) &pInB);
+
+        /* Unpack and store one element in destination */
 #ifndef ARM_MATH_BIG_ENDIAN
-
         *px = (q15_t) in;
-
 #else
-
         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
+        /* Update pointer px to point to next row of transposed matrix */
         px += numRowsB;
 
-        /* Unpack and store the second element in the destination */
+        /* Unpack and store second element in destination */
 #ifndef ARM_MATH_BIG_ENDIAN
-
         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
 #else
-
         *px = (q15_t) in;
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
+        /* Update pointer px to point to next row of transposed matrix */
         px += numRowsB;
 
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        /* Unpack and store one element in the destination */
+        in = read_q15x2_ia ((q15_t **) &pInB);
 #ifndef ARM_MATH_BIG_ENDIAN
-
         *px = (q15_t) in;
-
 #else
-
         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
         px += numRowsB;
 
-        /* Unpack and store the second element in the destination */
-
 #ifndef ARM_MATH_BIG_ENDIAN
-
         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
 #else
-
         *px = (q15_t) in;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-#else
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
         px += numRowsB;
 
-        /* Read one element from the row */
+#else /* #if defined (ARM_MATH_DSP) */
+
+        /* Read one element from row */
         in = *pInB++;
 
-        /* Store one element in the destination */
+        /* Store one element in destination */
         *px = in;
 
-        /* Update the pointer px to point to the next row of the transposed matrix */
+        /* Update pointer px to point to next row of transposed matrix */
         px += numRowsB;
 
-        /* Read one element from the row */
         in = *pInB++;
-
-        /* Store one element in the destination */
         *px = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
         px += numRowsB;
 
-        /* Read one element from the row */
         in = *pInB++;
-
-        /* Store one element in the destination */
         *px = in;
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
         px += numRowsB;
 
-        /* Decrement the column loop counter */
+        in = *pInB++;
+        *px = in;
+        px += numRowsB;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+        /* Decrement column loop counter */
         col--;
       }
 
@@ -238,31 +197,31 @@
 
       while (col > 0U)
       {
-        /* Read and store the input element in the destination */
+        /* Read and store input element in destination */
         *px = *pInB++;
 
-        /* Update the pointer px to point to the next row of the transposed matrix */
+        /* Update pointer px to point to next row of transposed matrix */
         px += numRowsB;
 
-        /* Decrement the column loop counter */
+        /* Decrement column loop counter */
         col--;
       }
 
       i++;
 
-      /* Decrement the row loop counter */
+      /* Decrement row loop counter */
       row--;
 
     } while (row > 0U);
 
-    /* Reset the variables for the usage in the following multiplication process */
+    /* Reset variables for usage in following multiplication process */
     row = numRowsA;
     i = 0U;
     px = pDst->pData;
 
-#ifndef UNALIGNED_SUPPORT_DISABLE
+#if defined (ARM_MATH_DSP)
     /* Process two rows from matrix A at a time and output two rows at a time */
-    row = row >> 1;
+    row = row >> 1U;
     px2 = px + numColsB;
 #endif
 
@@ -270,29 +229,28 @@
     /* row loop */
     while (row > 0U)
     {
-      /* For every row wise process, the column loop counter is to be initiated */
+      /* For every row wise process, column loop counter is to be initiated */
       col = numColsB;
 
-      /* For every row wise process, the pIn2 pointer is set
-       ** to the starting address of the transposed pSrcB data */
+      /* For every row wise process, pIn2 pointer is set to starting address of transposed pSrcB data */
       pInB = pSrcBT;
 
-#ifndef UNALIGNED_SUPPORT_DISABLE
+#if defined (ARM_MATH_DSP)
       /* Process two (transposed) columns from matrix B at a time */
-      col = col >> 1;
+      col = col >> 1U;
       j = 0;
 #endif
 
       /* column loop */
       while (col > 0U)
       {
-        /* Set the variable sum, that acts as accumulator, to zero */
+        /* Set variable sum, that acts as accumulator, to zero */
         sum = 0;
 
-        /* Initiate the pointer pInA to point to the starting address of the column being processed */
+        /* Initiate pointer pInA to point to starting address of column being processed */
         pInA = pSrcA->pData + i;
 
-#ifndef UNALIGNED_SUPPORT_DISABLE
+#if defined (ARM_MATH_DSP)
         sum2 = 0;
         sum3 = 0;
         sum4 = 0;
@@ -301,56 +259,55 @@
         pInB2 = pInB + numRowsB;
 
         /* Read in two elements at once - alows dual MAC instruction */
-        colCnt = numColsA >> 1;
+        colCnt = numColsA >> 1U;
 #else
-        colCnt = numColsA >> 2;
+        colCnt = numColsA >> 2U;
 #endif
 
         /* matrix multiplication */
         while (colCnt > 0U)
         {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-#ifndef UNALIGNED_SUPPORT_DISABLE
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
 
-          inA1 = *__SIMD32(pInA)++;
-          inB1 = *__SIMD32(pInB)++;
-          inA2 = *__SIMD32(pInA2)++;
-          inB2 = *__SIMD32(pInB2)++;
+#if defined (ARM_MATH_DSP)
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          inA1 = read_q15x2_ia ((q15_t **) &pInA);
+          inB1 = read_q15x2_ia ((q15_t **) &pInB);
 
+          inA2 = read_q15x2_ia ((q15_t **) &pInA2);
+          inB2 = read_q15x2_ia ((q15_t **) &pInB2);
+
+          /* Multiply and Accumlates */
           sum  = __SMLAD(inA1, inB1, sum);
           sum2 = __SMLAD(inA1, inB2, sum2);
           sum3 = __SMLAD(inA2, inB1, sum3);
           sum4 = __SMLAD(inA2, inB2, sum4);
-
 #else
-
-          inA1 = *pInA;
-          inB1 = *pInB;
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          inA1 = *pInA++;
+          inB1 = *pInB++;
+          /* Multiply and Accumlates */
           sum += inA1 * inB1;
 
-          inA2 = pInA[1];
-          inB2 = pInB[1];
+          inA2 = *pInA++;
+          inB2 = *pInB++;
           sum += inA2 * inB2;
 
-          inA1 = pInA[2];
-          inB1 = pInB[2];
+          inA1 = *pInA++;
+          inB1 = *pInB++;
           sum += inA1 * inB1;
 
-          inA2 = pInA[3];
-          inB2 = pInB[3];
+          inA2 = *pInA++;
+          inB2 = *pInB++;
           sum += inA2 * inB2;
+#endif /* #if defined (ARM_MATH_DSP) */
 
-          pInA += 4;
-          pInB += 4;
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           colCnt--;
         }
 
         /* process odd column samples */
-#ifndef UNALIGNED_SUPPORT_DISABLE
+#if defined (ARM_MATH_DSP)
         if (numColsA & 1U) {
           inA1 = *pInA++;
           inB1 = *pInB++;
@@ -366,44 +323,45 @@
 
         while (colCnt > 0U)
         {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          sum += (q31_t) (*pInA++) * (*pInB++);
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+          sum += (q31_t) *pInA++ * *pInB++;
 
+          /* Decrement loop counter */
           colCnt--;
         }
-#endif
+#endif /* #if defined (ARM_MATH_DSP) */
 
-        /* Saturate and store the result in the destination buffer */
+        /* Saturate and store result in destination buffer */
         *px++  = (q15_t) (sum >> 15);
 
-#ifndef UNALIGNED_SUPPORT_DISABLE
+#if defined (ARM_MATH_DSP)
         *px++  = (q15_t) (sum2 >> 15);
         *px2++ = (q15_t) (sum3 >> 15);
         *px2++ = (q15_t) (sum4 >> 15);
         j += numRowsB * 2;
 #endif
 
-        /* Decrement the column loop counter */
+        /* Decrement column loop counter */
         col--;
 
       }
 
       i = i + numColsA;
 
-#ifndef UNALIGNED_SUPPORT_DISABLE
+#if defined (ARM_MATH_DSP)
       i = i + numColsA;
       px = px2 + (numColsB & 1U);
       px2 = px + numColsB;
 #endif
 
-      /* Decrement the row loop counter */
+      /* Decrement row loop counter */
       row--;
 
     }
 
     /* Compute any remaining odd row/column below */
 
-#ifndef UNALIGNED_SUPPORT_DISABLE
+#if defined (ARM_MATH_DSP)
 
     /* Compute remaining output column */
     if (numColsB & 1U) {
@@ -412,7 +370,7 @@
       row = numRowsA & (~0x1);
 
       /* Point to remaining unfilled column in output matrix */
-      px = pDst->pData+numColsB-1;
+      px = pDst->pData + numColsB-1;
       pInA = pSrcA->pData;
 
       /* row loop */
@@ -420,26 +378,26 @@
       {
 
         /* point to last column in matrix B */
-        pInB  = pSrcBT + numRowsB*(numColsB-1);
+        pInB  = pSrcBT + numRowsB * (numColsB-1);
 
-        /* Set the variable sum, that acts as accumulator, to zero */
+        /* Set variable sum, that acts as accumulator, to zero */
         sum  = 0;
 
         /* Compute 4 columns at once */
-        colCnt = numColsA >> 2;
+        colCnt = numColsA >> 2U;
 
         /* matrix multiplication */
         while (colCnt > 0U)
         {
-          inA1 = *__SIMD32(pInA)++;
-          inA2 = *__SIMD32(pInA)++;
-          inB1 = *__SIMD32(pInB)++;
-          inB2 = *__SIMD32(pInB)++;
+          inA1 = read_q15x2_ia ((q15_t **) &pInA);
+          inA2 = read_q15x2_ia ((q15_t **) &pInA);
+          inB1 = read_q15x2_ia ((q15_t **) &pInB);
+          inB2 = read_q15x2_ia ((q15_t **) &pInB);
 
           sum  = __SMLAD(inA1, inB1, sum);
           sum  = __SMLAD(inA2, inB2, sum);
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           colCnt--;
         }
 
@@ -449,11 +407,11 @@
           colCnt--;
         }
 
-        /* Store the result in the destination buffer */
-        *px  = (q15_t) (sum  >> 15);
+        /* Store result in destination buffer */
+        *px = (q15_t) (sum  >> 15);
         px += numColsB;
 
-        /* Decrement the row loop counter */
+        /* Decrement row loop counter */
         row--;
       }
     }
@@ -462,7 +420,7 @@
     if (numRowsA & 1U) {
 
       /* point to last row in output matrix */
-      px = pDst->pData+(numColsB)*(numRowsA-1);
+      px = pDst->pData + (numColsB) * (numRowsA-1);
 
       pInB  = pSrcBT;
       col = numColsB;
@@ -471,48 +429,48 @@
       /* col loop */
       while (col > 0)
       {
-
         /* point to last row in matrix A */
-        pInA = pSrcA->pData + (numRowsA-1)*numColsA;
+        pInA = pSrcA->pData + (numRowsA-1) * numColsA;
 
-        /* Set the variable sum, that acts as accumulator, to zero */
+        /* Set variable sum, that acts as accumulator, to zero */
         sum  = 0;
 
         /* Compute 4 columns at once */
-        colCnt = numColsA >> 2;
+        colCnt = numColsA >> 2U;
 
         /* matrix multiplication */
         while (colCnt > 0U)
         {
-          inA1 = *__SIMD32(pInA)++;
-          inA2 = *__SIMD32(pInA)++;
-          inB1 = *__SIMD32(pInB)++;
-          inB2 = *__SIMD32(pInB)++;
+          inA1 = read_q15x2_ia ((q15_t **) &pInA);
+          inA2 = read_q15x2_ia ((q15_t **) &pInA);
+          inB1 = read_q15x2_ia ((q15_t **) &pInB);
+          inB2 = read_q15x2_ia ((q15_t **) &pInB);
 
           sum  = __SMLAD(inA1, inB1, sum);
           sum  = __SMLAD(inA2, inB2, sum);
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           colCnt--;
         }
 
-        colCnt = numColsA & 3U;
+        colCnt = numColsA % 4U;
         while (colCnt > 0U) {
           sum += (q31_t) (*pInA++) * (*pInB++);
+
           colCnt--;
         }
 
-        /* Store the result in the destination buffer */
-        *px++  = (q15_t) (sum  >> 15);
+        /* Store result in destination buffer */
+        *px++ = (q15_t) (sum  >> 15);
 
-        /* Decrement the col loop counter */
+        /* Decrement column loop counter */
         col--;
       }
     }
 
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
+#endif /* #if defined (ARM_MATH_DSP) */
 
-    /* set status as ARM_MATH_SUCCESS */
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
 
@@ -521,5 +479,5 @@
 }
 
 /**
- * @} end of MatrixMult group
+  @} end of MatrixMult group
  */
diff --git a/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c b/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c
index 78b33ef..011959a 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_mat_mult_fast_q31.c
  * Description:  Q31 matrix multiplication (fast variant)
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,226 +29,166 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
  */
 
 /**
- * @addtogroup MatrixMult
- * @{
+  @addtogroup MatrixMult
+  @{
  */
 
 /**
- * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
- * @param[in]       *pSrcA points to the first input matrix structure
- * @param[in]       *pSrcB points to the second input matrix structure
- * @param[out]      *pDst points to output matrix structure
- * @return          The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The difference between the function arm_mat_mult_q31() and this fast variant is that
- * the fast variant use a 32-bit rather than a 64-bit accumulator.
- * The result of each 1.31 x 1.31 multiplication is truncated to
- * 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30
- * format. Finally, the accumulator is saturated and converted to a 1.31 result.
- *
- * \par
- * The fast version has the same overflow behavior as the standard version but provides
- * less precision since it discards the low 32 bits of each multiplication result.
- * In order to avoid overflows completely the input signals must be scaled down.
- * Scale down one of the input matrices by log2(numColsA) bits to
- * avoid overflows, as a total of numColsA additions are computed internally for each
- * output element.
- *
- * \par
- * See <code>arm_mat_mult_q31()</code> for a slower implementation of this function
- * which uses 64-bit accumulation to provide higher precision.
+  @brief         Q31 matrix multiplication (fast variant).
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The difference between the function \ref arm_mat_mult_q31() and this fast variant is that
+                   the fast variant use a 32-bit rather than a 64-bit accumulator.
+                   The result of each 1.31 x 1.31 multiplication is truncated to
+                   2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30
+                   format. Finally, the accumulator is saturated and converted to a 1.31 result.
+  @par
+                   The fast version has the same overflow behavior as the standard version but provides
+                   less precision since it discards the low 32 bits of each multiplication result.
+                   In order to avoid overflows completely the input signals must be scaled down.
+                   Scale down one of the input matrices by log2(numColsA) bits to avoid overflows,
+                   as a total of numColsA additions are computed internally for each output element.
+  @remark
+                   Refer to \ref arm_mat_mult_q31() for a slower implementation of this function
+                   which uses 64-bit accumulation to provide higher precision.
  */
 
 arm_status arm_mat_mult_fast_q31(
   const arm_matrix_instance_q31 * pSrcA,
   const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst)
+        arm_matrix_instance_q31 * pDst)
 {
-  q31_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
-  q31_t *px;                                     /* Temporary output data matrix pointer */
-  q31_t sum;                                     /* Accumulator */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  uint32_t col, i = 0U, j, row = numRowsA, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-  q31_t inA1, inB1;
-
-#if defined (ARM_MATH_DSP)
-
-  q31_t sum2, sum3, sum4;
-  q31_t inA2, inB2;
+  q31_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A */
+  q31_t *pInB = pSrcB->pData;                    /* Input data matrix pointer B */
   q31_t *pInA2;
+  q31_t *px;                                     /* Temporary output data matrix pointer */
   q31_t *px2;
+  q31_t sum1, sum2, sum3, sum4;                  /* Accumulator */
+  q31_t inA1, inA2, inB1, inB2;
+  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+  uint32_t col, i = 0U, j, row = numRowsA, colCnt;  /* Loop counters */
+  arm_status status;                             /* Status of matrix multiplication */
 
-#endif
 
 #ifdef ARM_MATH_MATRIX_CHECK
 
   /* Check for matrix mismatch condition */
   if ((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
   {
     /* Set status as ARM_MATH_SIZE_MISMATCH */
     status = ARM_MATH_SIZE_MISMATCH;
   }
   else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
 
   {
-
     px = pDst->pData;
 
-#if defined (ARM_MATH_DSP)
-    row = row >> 1;
+    row = row >> 1U;
     px2 = px + numColsB;
-#endif
 
     /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
     /* row loop */
     while (row > 0U)
     {
-
-      /* For every row wise process, the column loop counter is to be initiated */
+      /* For every row wise process, column loop counter is to be initiated */
       col = numColsB;
 
-      /* For every row wise process, the pIn2 pointer is set
-       ** to the starting address of the pSrcB data */
+      /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */
       pInB = pSrcB->pData;
 
       j = 0U;
 
-#if defined (ARM_MATH_DSP)
-      col = col >> 1;
-#endif
+      col = col >> 1U;
 
       /* column loop */
       while (col > 0U)
       {
         /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Initiate data pointers */
-        pInA = pSrcA->pData + i;
-        pInB  = pSrcB->pData + j;
-
-#if defined (ARM_MATH_DSP)
+        sum1 = 0;
         sum2 = 0;
         sum3 = 0;
         sum4 = 0;
+        
+        /* Initiate data pointers */
+        pInA = pSrcA->pData + i;
+        pInB = pSrcB->pData + j;
         pInA2 = pInA + numColsA;
+        
         colCnt = numColsA;
-#else
-        colCnt = numColsA >> 2;
-#endif
 
         /* matrix multiplication */
         while (colCnt > 0U)
         {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
 
-#if defined (ARM_MATH_DSP)
           inA1 = *pInA++;
           inB1 = pInB[0];
           inA2 = *pInA2++;
           inB2 = pInB[1];
           pInB += numColsB;
 
-          sum  = __SMMLA(inA1, inB1, sum);
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(inA1, inB1, sum1);
           sum2 = __SMMLA(inA1, inB2, sum2);
           sum3 = __SMMLA(inA2, inB1, sum3);
           sum4 = __SMMLA(inA2, inB2, sum4);
 #else
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          /* Perform the multiply-accumulates */
-          inB1 = *pInB;
-          pInB += numColsB;
-          inA1 = pInA[0];
-          sum = __SMMLA(inA1, inB1, sum);
-
-          inB1 = *pInB;
-          pInB += numColsB;
-          inA1 = pInA[1];
-          sum = __SMMLA(inA1, inB1, sum);
-
-          inB1 = *pInB;
-          pInB += numColsB;
-          inA1 = pInA[2];
-          sum = __SMMLA(inA1, inB1, sum);
-
-          inB1 = *pInB;
-          pInB += numColsB;
-          inA1 = pInA[3];
-          sum = __SMMLA(inA1, inB1, sum);
-
-          pInA += 4U;
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA1 * inB1)) >> 32);
+          sum2 = (q31_t) ((((q63_t) sum2 << 32) + ((q63_t) inA1 * inB2)) >> 32);
+          sum3 = (q31_t) ((((q63_t) sum3 << 32) + ((q63_t) inA2 * inB1)) >> 32);
+          sum4 = (q31_t) ((((q63_t) sum4 << 32) + ((q63_t) inA2 * inB2)) >> 32);
 #endif
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           colCnt--;
         }
 
-#ifdef ARM_MATH_CM0_FAMILY
-        /* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here. */
-        colCnt = numColsA % 0x4U;
-        while (colCnt > 0U)
-        {
-          sum = __SMMLA(*pInA++, *pInB, sum);
-          pInB += numColsB;
-          colCnt--;
-        }
-        j++;
-#endif
-
         /* Convert the result from 2.30 to 1.31 format and store in destination buffer */
-        *px++  = sum << 1;
-
-#if defined (ARM_MATH_DSP)
+        *px++  = sum1 << 1;
         *px++  = sum2 << 1;
         *px2++ = sum3 << 1;
         *px2++ = sum4 << 1;
+
         j += 2;
-#endif
 
-        /* Decrement the column loop counter */
+        /* Decrement column loop counter */
         col--;
-
       }
 
-      i = i + numColsA;
+      i = i + (numColsA << 1U);
+      px  = px2 + (numColsB & 1U);
+      px2 = px  +  numColsB;
 
-#if defined (ARM_MATH_DSP)
-      i = i + numColsA;
-      px = px2 + (numColsB & 1U);
-      px2 = px + numColsB;
-#endif
-
-      /* Decrement the row loop counter */
+      /* Decrement row loop counter */
       row--;
-
     }
 
     /* Compute any remaining odd row/column below */
 
-#if defined (ARM_MATH_DSP)
-
     /* Compute remaining output column */
     if (numColsB & 1U) {
 
       /* Avoid redundant computation of last element */
-      row = numRowsA & (~0x1);
+      row = numRowsA & (~1U);
 
       /* Point to remaining unfilled column in output matrix */
-      px = pDst->pData+numColsB-1;
+      px = pDst->pData + numColsB-1;
       pInA = pSrcA->pData;
 
       /* row loop */
@@ -258,49 +198,75 @@
         /* point to last column in matrix B */
         pInB  = pSrcB->pData + numColsB-1;
 
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum  = 0;
+        /* Set variable sum1, that acts as accumulator, to zero */
+        sum1  = 0;
 
-        /* Compute 4 columns at once */
-        colCnt = numColsA >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Loop unrolling: Compute 4 columns at a time. */
+        colCnt = numColsA >> 2U;
 
         /* matrix multiplication */
         while (colCnt > 0U)
         {
-          inA1 = *pInA++;
-          inA2 = *pInA++;
-          inB1 = *pInB;
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
           pInB += numColsB;
-          inB2 = *pInB;
-          pInB += numColsB;
-          sum = __SMMLA(inA1, inB1, sum);
-          sum = __SMMLA(inA2, inB2, sum);
 
-          inA1 = *pInA++;
-          inA2 = *pInA++;
-          inB1 = *pInB;
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
           pInB += numColsB;
-          inB2 = *pInB;
-          pInB += numColsB;
-          sum = __SMMLA(inA1, inB1, sum);
-          sum = __SMMLA(inA2, inB2, sum);
 
-          /* Decrement the loop counter */
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
+          pInB += numColsB;
+
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
+          pInB += numColsB;
+
+          /* Decrement loop counter */
           colCnt--;
         }
 
-        colCnt = numColsA & 3U;
+        /* Loop unrolling: Compute remaining column */
+        colCnt = numColsA % 4U;
+
+#else
+
+        /* Initialize colCnt with number of columns */
+        colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
         while (colCnt > 0U) {
-          sum = __SMMLA(*pInA++, *pInB, sum);
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
           pInB += numColsB;
+          
           colCnt--;
         }
 
         /* Convert the result from 2.30 to 1.31 format and store in destination buffer */
-        *px = sum << 1;
+        *px = sum1 << 1;
         px += numColsB;
 
-        /* Decrement the row loop counter */
+        /* Decrement row loop counter */
         row--;
       }
     }
@@ -309,7 +275,7 @@
     if (numRowsA & 1U) {
 
       /* point to last row in output matrix */
-      px = pDst->pData+(numColsB)*(numRowsA-1);
+      px = pDst->pData + (numColsB) * (numRowsA-1);
 
       col = numColsB;
       i = 0U;
@@ -319,14 +285,16 @@
       {
 
         /* point to last row in matrix A */
-        pInA = pSrcA->pData + (numRowsA-1)*numColsA;
+        pInA = pSrcA->pData + (numRowsA-1) * numColsA;
         pInB  = pSrcB->pData + i;
 
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum  = 0;
+        /* Set variable sum1, that acts as accumulator, to zero */
+        sum1  = 0;
 
-        /* Compute 4 columns at once */
-        colCnt = numColsA >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Loop unrolling: Compute 4 columns at a time. */
+        colCnt = numColsA >> 2U;
 
         /* matrix multiplication */
         while (colCnt > 0U)
@@ -337,8 +305,13 @@
           pInB += numColsB;
           inB2 = *pInB;
           pInB += numColsB;
-          sum = __SMMLA(inA1, inB1, sum);
-          sum = __SMMLA(inA2, inB2, sum);
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(inA1, inB1, sum1);
+          sum1 = __SMMLA(inA2, inB2, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA1 * inB1)) >> 32);
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA2 * inB2)) >> 32);
+#endif
 
           inA1 = *pInA++;
           inA2 = *pInA++;
@@ -346,32 +319,49 @@
           pInB += numColsB;
           inB2 = *pInB;
           pInB += numColsB;
-          sum = __SMMLA(inA1, inB1, sum);
-          sum = __SMMLA(inA2, inB2, sum);
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(inA1, inB1, sum1);
+          sum1 = __SMMLA(inA2, inB2, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA1 * inB1)) >> 32);
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA2 * inB2)) >> 32);
+#endif
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           colCnt--;
         }
 
-        colCnt = numColsA & 3U;
+        /* Loop unrolling: Compute remaining column */
+        colCnt = numColsA % 4U;
+
+#else
+
+        /* Initialize colCnt with number of columns */
+        colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
         while (colCnt > 0U) {
-          sum = __SMMLA(*pInA++, *pInB, sum);
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
           pInB += numColsB;
+
           colCnt--;
         }
 
         /* Saturate and store the result in the destination buffer */
-        *px++ = sum << 1;
+        *px++ = sum1 << 1;
         i++;
 
-        /* Decrement the col loop counter */
+        /* Decrement col loop counter */
         col--;
       }
     }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
-    /* set status as ARM_MATH_SUCCESS */
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
 
@@ -380,5 +370,5 @@
 }
 
 /**
- * @} end of MatrixMult group
+  @} end of MatrixMult group
  */
diff --git a/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c b/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c
index 3244f47..1d2b69c 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_mat_mult_q15.c
  * Description:  Q15 matrix multiplication
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,206 +29,129 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
  */
 
 /**
- * @addtogroup MatrixMult
- * @{
+  @addtogroup MatrixMult
+  @{
  */
 
-
 /**
- * @brief Q15 matrix multiplication
- * @param[in]       *pSrcA points to the first input matrix structure
- * @param[in]       *pSrcB points to the second input matrix structure
- * @param[out]      *pDst points to output matrix structure
- * @param[in]       *pState points to the array for storing intermediate results (Unused)
- * @return          The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 64-bit internal accumulator. The inputs to the
- * multiplications are in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate
- * results are accumulated in a 64-bit accumulator in 34.30 format. This approach
- * provides 33 guard bits and there is no risk of overflow. The 34.30 result is then
- * truncated to 34.15 format by discarding the low 15 bits and then saturated to
- * 1.15 format.
- *
- * \par
- * Refer to <code>arm_mat_mult_fast_q15()</code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.
- *
+  @brief         Q15 matrix multiplication.
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @param[in]     pState     points to the array for storing intermediate results (Unused)
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator. The inputs to the
+                   multiplications are in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   This approach provides 33 guard bits and there is no risk of overflow.
+                   The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits
+                   and then saturated to 1.15 format.
+  @par
+                   Refer to \ref arm_mat_mult_fast_q15() for a faster but less precise version of this function.
  */
 
 arm_status arm_mat_mult_q15(
   const arm_matrix_instance_q15 * pSrcA,
   const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst,
-  q15_t * pState)
+        arm_matrix_instance_q15 * pDst,
+        q15_t                   * pState)
 {
-  q63_t sum;                                     /* accumulator */
+        q63_t sum;                                     /* Accumulator */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_DSP)                             /* != CM0 */
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t *pSrcBT = pState;                        /* input data matrix pointer for transpose */
-  q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
-  q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
-  q15_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  uint16_t numRowsB = pSrcB->numRows;            /* number of rows of input matrix A    */
-  uint16_t col, i = 0U, row = numRowsB, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  q31_t in;                                      /* Temporary variable to hold the input value */
-  q31_t pSourceA1, pSourceB1, pSourceA2, pSourceB2;
-
-#else
-
-  q15_t in;                                      /* Temporary variable to hold the input value */
-  q15_t inA1, inB1, inA2, inB2;
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
+        q15_t *pSrcBT = pState;                        /* Input data matrix pointer for transpose */
+        q15_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A of Q15 type */
+        q15_t *pInB = pSrcB->pData;                    /* Input data matrix pointer B of Q15 type */
+        q15_t *px;                                     /* Temporary output data matrix pointer */
+        uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+        uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+        uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+        uint16_t numRowsB = pSrcB->numRows;            /* Number of rows of input matrix A */
+        uint32_t col, i = 0U, row = numRowsB, colCnt;  /* Loop counters */
+        arm_status status;                             /* Status of matrix multiplication */
+        
+        q31_t in;                                      /* Temporary variable to hold the input value */
+        q31_t inA1, inB1, inA2, inB2;
 
 #ifdef ARM_MATH_MATRIX_CHECK
+
   /* Check for matrix mismatch condition */
   if ((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
   {
     /* Set status as ARM_MATH_SIZE_MISMATCH */
     status = ARM_MATH_SIZE_MISMATCH;
   }
   else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
   {
     /* Matrix transpose */
     do
     {
-      /* Apply loop unrolling and exchange the columns with row elements */
-      col = numColsB >> 2;
-
-      /* The pointer px is set to starting address of the column being processed */
+      /* The pointer px is set to starting address of column being processed */
       px = pSrcBT + i;
 
+      /* Apply loop unrolling and exchange columns with row elements */
+      col = numColsB >> 2U;
+
       /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
        ** a second loop below computes the remaining 1 to 3 samples. */
       while (col > 0U)
       {
-#ifndef UNALIGNED_SUPPORT_DISABLE
+        /* Read two elements from row */
+        in = read_q15x2_ia ((q15_t **) &pInB);
 
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        /* Unpack and store one element in the destination */
+        /* Unpack and store one element in destination */
 #ifndef ARM_MATH_BIG_ENDIAN
-
         *px = (q15_t) in;
-
 #else
-
         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-        /* Update the pointer px to point to the next row of the transposed matrix */
+        /* Update pointer px to point to next row of transposed matrix */
         px += numRowsB;
 
-        /* Unpack and store the second element in the destination */
+        /* Unpack and store second element in destination */
 #ifndef ARM_MATH_BIG_ENDIAN
-
         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
 #else
-
         *px = (q15_t) in;
-
 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-        /* Update the pointer px to point to the next row of the transposed matrix */
+        /* Update pointer px to point to next row of transposed matrix */
         px += numRowsB;
 
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
+        /* Read two elements from row */
+        in = read_q15x2_ia ((q15_t **) &pInB);
 
-        /* Unpack and store one element in the destination */
+        /* Unpack and store one element in destination */
 #ifndef ARM_MATH_BIG_ENDIAN
-
         *px = (q15_t) in;
-
 #else
-
         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
         px += numRowsB;
 
-        /* Unpack and store the second element in the destination */
-
 #ifndef ARM_MATH_BIG_ENDIAN
-
         *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
 #else
-
         *px = (q15_t) in;
-
 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
         px += numRowsB;
 
-#else
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
-       /* Decrement the column loop counter */
+        /* Decrement column loop counter */
         col--;
       }
 
@@ -238,24 +161,24 @@
 
       while (col > 0U)
       {
-        /* Read and store the input element in the destination */
+        /* Read and store input element in destination */
         *px = *pInB++;
 
-        /* Update the pointer px to point to the next row of the transposed matrix */
+        /* Update pointer px to point to next row of transposed matrix */
         px += numRowsB;
 
-        /* Decrement the column loop counter */
+        /* Decrement column loop counter */
         col--;
       }
 
       i++;
 
-      /* Decrement the row loop counter */
+      /* Decrement row loop counter */
       row--;
 
     } while (row > 0U);
 
-    /* Reset the variables for the usage in the following multiplication process */
+    /* Reset variables for usage in following multiplication process */
     row = numRowsA;
     i = 0U;
     px = pDst->pData;
@@ -264,123 +187,98 @@
     /* row loop */
     do
     {
-      /* For every row wise process, the column loop counter is to be initiated */
+      /* For every row wise process, column loop counter is to be initiated */
       col = numColsB;
 
-      /* For every row wise process, the pIn2 pointer is set
-       ** to the starting address of the transposed pSrcB data */
+      /* For every row wise process, pIn2 pointer is set to starting address of transposed pSrcB data */
       pInB = pSrcBT;
 
       /* column loop */
       do
       {
-        /* Set the variable sum, that acts as accumulator, to zero */
+        /* Set variable sum, that acts as accumulator, to zero */
         sum = 0;
 
-        /* Apply loop unrolling and compute 2 MACs simultaneously. */
-        colCnt = numColsA >> 2;
-
-        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
+        /* Initiate pointer pInA to point to starting address of column being processed */
         pInA = pSrcA->pData + i;
 
+        /* Apply loop unrolling and compute 2 MACs simultaneously. */
+        colCnt = numColsA >> 2U;
 
         /* matrix multiplication */
         while (colCnt > 0U)
         {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-#ifndef UNALIGNED_SUPPORT_DISABLE
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
 
           /* read real and imag values from pSrcA and pSrcB buffer */
-          pSourceA1 = *__SIMD32(pInA)++;
-          pSourceB1 = *__SIMD32(pInB)++;
+          inA1 = read_q15x2_ia ((q15_t **) &pInA);
+          inB1 = read_q15x2_ia ((q15_t **) &pInB);
 
-          pSourceA2 = *__SIMD32(pInA)++;
-          pSourceB2 = *__SIMD32(pInB)++;
+          inA2 = read_q15x2_ia ((q15_t **) &pInA);
+          inB2 = read_q15x2_ia ((q15_t **) &pInB);
 
           /* Multiply and Accumlates */
-          sum = __SMLALD(pSourceA1, pSourceB1, sum);
-          sum = __SMLALD(pSourceA2, pSourceB2, sum);
+          sum = __SMLALD(inA1, inB1, sum);
+          sum = __SMLALD(inA2, inB2, sum);
 
-#else
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          inA1 = *pInA++;
-          inB1 = *pInB++;
-          inA2 = *pInA++;
-          /* Multiply and Accumlates */
-          sum += inA1 * inB1;
-          inB2 = *pInB++;
-
-          inA1 = *pInA++;
-          inB1 = *pInB++;
-          /* Multiply and Accumlates */
-          sum += inA2 * inB2;
-          inA2 = *pInA++;
-          inB2 = *pInB++;
-
-          /* Multiply and Accumlates */
-          sum += inA1 * inB1;
-          sum += inA2 * inB2;
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           colCnt--;
         }
 
         /* process remaining column samples */
-        colCnt = numColsA & 3U;
+        colCnt = numColsA % 0x4U;
 
         while (colCnt > 0U)
         {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
           sum += *pInA++ * *pInB++;
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           colCnt--;
         }
 
-        /* Saturate and store the result in the destination buffer */
+        /* Saturate and store result in destination buffer */
         *px = (q15_t) (__SSAT((sum >> 15), 16));
         px++;
 
-        /* Decrement the column loop counter */
+        /* Decrement column loop counter */
         col--;
 
       } while (col > 0U);
 
       i = i + numColsA;
 
-      /* Decrement the row loop counter */
+      /* Decrement row loop counter */
       row--;
 
     } while (row > 0U);
 
-#else
+#else /* #if defined (ARM_MATH_DSP) */
 
-  /* Run the below code for Cortex-M0 */
-
-  q15_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
-  q15_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
-  q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
-  q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
-  q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  q15_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
-  uint16_t col, i = 0U, row = numRowsA, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
+        q15_t *pIn1 = pSrcA->pData;                    /* Input data matrix pointer A */
+        q15_t *pIn2 = pSrcB->pData;                    /* Input data matrix pointer B */
+        q15_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A of Q15 type */
+        q15_t *pInB = pSrcB->pData;                    /* Input data matrix pointer B of Q15 type */
+        q15_t *pOut = pDst->pData;                     /* Output data matrix pointer */
+        q15_t *px;                                     /* Temporary output data matrix pointer */
+        uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+        uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+        uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A    */
+        uint32_t col, i = 0U, row = numRowsA, colCnt;  /* Loop counters */
+        arm_status status;                             /* Status of matrix multiplication */
 
 #ifdef ARM_MATH_MATRIX_CHECK
 
   /* Check for matrix mismatch condition */
   if ((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
   {
     /* Set status as ARM_MATH_SIZE_MISMATCH */
     status = ARM_MATH_SIZE_MISMATCH;
   }
   else
+
 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */
 
   {
@@ -391,11 +289,10 @@
       /* Output pointer is set to starting address of the row being processed */
       px = pOut + i;
 
-      /* For every row wise process, the column loop counter is to be initiated */
+      /* For every row wise process, column loop counter is to be initiated */
       col = numColsB;
 
-      /* For every row wise process, the pIn2 pointer is set
-       ** to the starting address of the pSrcB data */
+      /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */
       pIn2 = pSrcB->pData;
 
       /* column loop */
@@ -404,7 +301,7 @@
         /* Set the variable sum, that acts as accumulator, to zero */
         sum = 0;
 
-        /* Initiate the pointer pIn1 to point to the starting address of pSrcA */
+        /* Initiate pointer pIn1 to point to starting address of pSrcA */
         pIn1 = pInA;
 
         /* Matrix A columns number of MAC operations are to be performed */
@@ -413,38 +310,41 @@
         /* matrix multiplication */
         while (colCnt > 0U)
         {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          /* Perform the multiply-accumulates */
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* Perform multiply-accumulates */
           sum += (q31_t) * pIn1++ * *pIn2;
           pIn2 += numColsB;
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           colCnt--;
         }
 
-        /* Convert the result from 34.30 to 1.15 format and store the saturated value in destination buffer */
-        /* Saturate and store the result in the destination buffer */
+        /* Convert result from 34.30 to 1.15 format and store saturated value in destination buffer */
+
+        /* Saturate and store result in destination buffer */
         *px++ = (q15_t) __SSAT((sum >> 15), 16);
 
-        /* Decrement the column loop counter */
+        /* Decrement column loop counter */
         col--;
 
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
+        /* Update pointer pIn2 to point to starting address of next column */
         pIn2 = pInB + (numColsB - col);
 
       } while (col > 0U);
 
-      /* Update the pointer pSrcA to point to the  starting address of the next row */
+      /* Update pointer pSrcA to point to starting address of next row */
       i = i + numColsB;
       pInA = pInA + numColsA;
 
-      /* Decrement the row loop counter */
+      /* Decrement row loop counter */
       row--;
 
     } while (row > 0U);
 
 #endif /* #if defined (ARM_MATH_DSP) */
-    /* set status as ARM_MATH_SUCCESS */
+
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
 
@@ -453,5 +353,5 @@
 }
 
 /**
- * @} end of MatrixMult group
+  @} end of MatrixMult group
  */
diff --git a/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c b/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c
index 9bd2b97..161e723 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_mat_mult_q31.c
  * Description:  Q31 matrix multiplication
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,254 +29,168 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
  */
 
 /**
- * @addtogroup MatrixMult
- * @{
+  @addtogroup MatrixMult
+  @{
  */
 
 /**
- * @brief Q31 matrix multiplication
- * @param[in]       *pSrcA points to the first input matrix structure
- * @param[in]       *pSrcB points to the second input matrix structure
- * @param[out]      *pDst points to output matrix structure
- * @return     		The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate
- * multiplication results but provides only a single guard bit. There is no saturation
- * on intermediate additions. Thus, if the accumulator overflows it wraps around and
- * distorts the result. The input signals should be scaled down to avoid intermediate
- * overflows. The input is thus scaled down by log2(numColsA) bits
- * to avoid overflows, as a total of numColsA additions are performed internally.
- * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
- *
- * \par
- * See <code>arm_mat_mult_fast_q31()</code> for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.
- *
+  @brief         Q31 matrix multiplication.
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate
+                   multiplication results but provides only a single guard bit. There is no saturation
+                   on intermediate additions. Thus, if the accumulator overflows it wraps around and
+                   distorts the result. The input signals should be scaled down to avoid intermediate
+                   overflows. The input is thus scaled down by log2(numColsA) bits
+                   to avoid overflows, as a total of numColsA additions are performed internally.
+                   The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
+  @remark
+                   Refer to \ref arm_mat_mult_fast_q31() for a faster but less precise implementation of this function.
  */
 
 arm_status arm_mat_mult_q31(
   const arm_matrix_instance_q31 * pSrcA,
   const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst)
+        arm_matrix_instance_q31 * pDst)
 {
-  q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
-  q31_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
+  q31_t *pIn1 = pSrcA->pData;                    /* Input data matrix pointer A */
+  q31_t *pIn2 = pSrcB->pData;                    /* Input data matrix pointer B */
+  q31_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A */
+  q31_t *pInB = pSrcB->pData;                    /* Input data matrix pointer B */
+  q31_t *pOut = pDst->pData;                     /* Output data matrix pointer */
   q31_t *px;                                     /* Temporary output data matrix pointer */
   q63_t sum;                                     /* Accumulator */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  uint16_t col, i = 0U, j, row = numRowsA, colCnt;      /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-  q31_t a0, a1, a2, a3, b0, b1, b2, b3;
+  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+  uint32_t col, i = 0U, row = numRowsA, colCnt;  /* Loop counters */
+  arm_status status;                             /* Status of matrix multiplication */
 
 #ifdef ARM_MATH_MATRIX_CHECK
 
-
   /* Check for matrix mismatch condition */
   if ((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
   {
     /* Set status as ARM_MATH_SIZE_MISMATCH */
     status = ARM_MATH_SIZE_MISMATCH;
   }
   else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
 
   {
     /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
     /* row loop */
     do
     {
-      /* Output pointer is set to starting address of the row being processed */
+      /* Output pointer is set to starting address of row being processed */
       px = pOut + i;
 
-      /* For every row wise process, the column loop counter is to be initiated */
+      /* For every row wise process, column loop counter is to be initiated */
       col = numColsB;
 
-      /* For every row wise process, the pIn2 pointer is set
-       ** to the starting address of the pSrcB data */
+      /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */
       pIn2 = pSrcB->pData;
 
-      j = 0U;
-
       /* column loop */
       do
       {
         /* Set the variable sum, that acts as accumulator, to zero */
         sum = 0;
 
-        /* Initiate the pointer pIn1 to point to the starting address of pInA */
+        /* Initialize pointer pIn1 to point to starting address of column being processed */
         pIn1 = pInA;
 
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        colCnt = numColsA >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
 
+        /* Loop unrolling: Compute 4 MACs at a time. */
+        colCnt = numColsA >> 2U;
 
         /* matrix multiplication */
         while (colCnt > 0U)
         {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
           /* Perform the multiply-accumulates */
-          b0 = *pIn2;
+          sum += (q63_t) *pIn1++ * *pIn2;
           pIn2 += numColsB;
 
-          a0 = *pIn1++;
-          a1 = *pIn1++;
-
-          b1 = *pIn2;
-          pIn2 += numColsB;
-          b2 = *pIn2;
+          sum += (q63_t) *pIn1++ * *pIn2;
           pIn2 += numColsB;
 
-          sum += (q63_t) a0 *b0;
-          sum += (q63_t) a1 *b1;
-
-          a2 = *pIn1++;
-          a3 = *pIn1++;
-
-          b3 = *pIn2;
+          sum += (q63_t) *pIn1++ * *pIn2;
           pIn2 += numColsB;
 
-          sum += (q63_t) a2 *b2;
-          sum += (q63_t) a3 *b3;
+          sum += (q63_t) *pIn1++ * *pIn2;
+          pIn2 += numColsB;
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           colCnt--;
         }
 
-        /* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here.
-         ** No loop unrolling is used. */
+        /* Loop unrolling: Compute remaining MACs */
         colCnt = numColsA % 0x4U;
 
-        while (colCnt > 0U)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          /* Perform the multiply-accumulates */
-          sum += (q63_t) * pIn1++ * *pIn2;
-          pIn2 += numColsB;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Convert the result from 2.62 to 1.31 format and store in destination buffer */
-        *px++ = (q31_t) (sum >> 31);
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        j++;
-        pIn2 = (pSrcB->pData) + j;
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while (col > 0U);
-
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  q31_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
-  uint16_t col, i = 0U, row = numRowsA, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Initiate the pointer pIn1 to point to the starting address of pInA */
-        pIn1 = pInA;
-
-        /* Matrix A columns number of MAC operations are to be performed */
+        /* Initialize cntCnt with number of columns */
         colCnt = numColsA;
 
-        /* matrix multiplication */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
         while (colCnt > 0U)
         {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
           /* Perform the multiply-accumulates */
-          sum += (q63_t) * pIn1++ * *pIn2;
+          sum += (q63_t) *pIn1++ * *pIn2;
           pIn2 += numColsB;
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           colCnt--;
         }
 
-        /* Convert the result from 2.62 to 1.31 format and store in destination buffer */
-        *px++ = (q31_t) clip_q63_to_q31(sum >> 31);
+        /* Convert result from 2.62 to 1.31 format and store in destination buffer */
+        *px++ = (q31_t) (sum >> 31);
 
-        /* Decrement the column loop counter */
+        /* Decrement column loop counter */
         col--;
 
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
+        /* Update pointer pIn2 to point to starting address of next column */
         pIn2 = pInB + (numColsB - col);
 
       } while (col > 0U);
 
-#endif
-
-      /* Update the pointer pInA to point to the  starting address of the next row */
+      /* Update pointer pInA to point to starting address of next row */
       i = i + numColsB;
       pInA = pInA + numColsA;
 
-      /* Decrement the row loop counter */
+      /* Decrement row loop counter */
       row--;
 
     } while (row > 0U);
 
-    /* set status as ARM_MATH_SUCCESS */
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
+
   /* Return to application */
   return (status);
 }
 
 /**
- * @} end of MatrixMult group
+  @} end of MatrixMult group
  */
diff --git a/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c b/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c
index dbc385a..a0097b1 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_mat_scale_f32.c
  * Description:  Multiplies a floating-point matrix by a scalar
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,42 +29,42 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
  */
 
 /**
- * @defgroup MatrixScale Matrix Scale
- *
- * Multiplies a matrix by a scalar.  This is accomplished by multiplying each element in the
- * matrix by the scalar.  For example:
- * \image html MatrixScale.gif "Matrix Scaling of a 3 x 3 matrix"
- *
- * The function checks to make sure that the input and output matrices are of the same size.
- *
- * In the fixed-point Q15 and Q31 functions, <code>scale</code> is represented by
- * a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>.
- * The shift allows the gain of the scaling operation to exceed 1.0.
- * The overall scale factor applied to the fixed-point data is
- * <pre>
- *     scale = scaleFract * 2^shift.
- * </pre>
+  @defgroup MatrixScale Matrix Scale
+
+  Multiplies a matrix by a scalar.  This is accomplished by multiplying each element in the
+  matrix by the scalar.  For example:
+  \image html MatrixScale.gif "Matrix Scaling of a 3 x 3 matrix"
+
+  The function checks to make sure that the input and output matrices are of the same size.
+
+  In the fixed-point Q15 and Q31 functions, <code>scale</code> is represented by
+  a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>.
+  The shift allows the gain of the scaling operation to exceed 1.0.
+  The overall scale factor applied to the fixed-point data is
+  <pre>
+      scale = scaleFract * 2^shift.
+  </pre>
  */
 
 /**
- * @addtogroup MatrixScale
- * @{
+  @addtogroup MatrixScale
+  @{
  */
 
 /**
- * @brief Floating-point matrix scaling.
- * @param[in]       *pSrc points to input matrix structure
- * @param[in]       scale scale factor to be applied
- * @param[out]      *pDst points to output matrix structure
- * @return     		The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
- * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
+  @brief         Floating-point matrix scaling.
+  @param[in]     pSrc       points to input matrix
+  @param[in]     scale      scale factor to be applied
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
  */
-
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
 arm_status arm_mat_scale_f32(
   const arm_matrix_instance_f32 * pSrc,
   float32_t scale,
@@ -76,12 +76,10 @@
   uint32_t blkCnt;                               /* loop counters */
   arm_status status;                             /* status of matrix scaling     */
 
-#if defined (ARM_MATH_DSP)
 
   float32_t in1, in2, in3, in4;                  /* temporary variables */
   float32_t out1, out2, out3, out4;              /* temporary variables */
 
-#endif //      #if defined (ARM_MATH_DSP)
 
 #ifdef ARM_MATH_MATRIX_CHECK
   /* Check for matrix mismatch condition */
@@ -93,37 +91,23 @@
   else
 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
   {
+    float32x4_t vec1;
+    float32x4_t res;
+
     /* Total number of samples in the input matrix */
     numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
 
-#if defined (ARM_MATH_DSP)
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Loop Unrolling */
     blkCnt = numSamples >> 2;
 
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+    /* Compute 4 outputs at a time.
      ** a second loop below computes the remaining 1 to 3 samples. */
     while (blkCnt > 0U)
     {
       /* C(m,n) = A(m,n) * scale */
       /* Scaling and results are stored in the destination buffer. */
-      in1 = pIn[0];
-      in2 = pIn[1];
-      in3 = pIn[2];
-      in4 = pIn[3];
-
-      out1 = in1 * scale;
-      out2 = in2 * scale;
-      out3 = in3 * scale;
-      out4 = in4 * scale;
-
-
-      pOut[0] = out1;
-      pOut[1] = out2;
-      pOut[2] = out3;
-      pOut[3] = out4;
+      vec1 = vld1q_f32(pIn);
+      res = vmulq_f32(vec1, vdupq_n_f32(scale));
+      vst1q_f32(pOut, res);
 
       /* update pointers to process next sampels */
       pIn += 4U;
@@ -137,15 +121,6 @@
      ** No loop unrolling is used. */
     blkCnt = numSamples % 0x4U;
 
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
     while (blkCnt > 0U)
     {
       /* C(m,n) = A(m,n) * scale */
@@ -163,7 +138,84 @@
   /* Return to application */
   return (status);
 }
+#else
+arm_status arm_mat_scale_f32(
+  const arm_matrix_instance_f32 * pSrc,
+        float32_t                 scale,
+        arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn = pSrc->pData;                  /* Input data matrix pointer */
+  float32_t *pOut = pDst->pData;                 /* Output data matrix pointer */
+  uint32_t numSamples;                           /* Total number of elements in the matrix */
+  uint32_t blkCnt;                               /* Loop counters */
+  arm_status status;                             /* Status of matrix scaling */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numRows) ||
+      (pSrc->numCols != pDst->numCols)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) * scale */
+
+      /* Scale and store result in destination buffer. */
+      *pOut++ = (*pIn++) * scale;
+      *pOut++ = (*pIn++) * scale;
+      *pOut++ = (*pIn++) * scale;
+      *pOut++ = (*pIn++) * scale;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) * scale */
+
+      /* Scale and store result in destination buffer. */
+      *pOut++ = (*pIn++) * scale;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
 
 /**
- * @} end of MatrixScale group
+  @} end of MatrixScale group
  */
diff --git a/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c b/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c
index af664ca..9b75d4e 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_mat_scale_q15.c
  * Description:  Multiplies a Q15 matrix by a scalar
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,135 +29,134 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
  */
 
 /**
- * @addtogroup MatrixScale
- * @{
+  @addtogroup MatrixScale
+  @{
  */
 
 /**
- * @brief Q15 matrix scaling.
- * @param[in]       *pSrc points to input matrix
- * @param[in]       scaleFract fractional portion of the scale factor
- * @param[in]       shift number of bits to shift the result by
- * @param[out]      *pDst points to output matrix structure
- * @return     		The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format.
- * These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
+  @brief         Q15 matrix scaling.
+  @param[in]     pSrc        points to input matrix
+  @param[in]     scaleFract  fractional portion of the scale factor
+  @param[in]     shift       number of bits to shift the result by
+  @param[out]    pDst        points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format.
+                   These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
  */
 
 arm_status arm_mat_scale_q15(
   const arm_matrix_instance_q15 * pSrc,
-  q15_t scaleFract,
-  int32_t shift,
-  arm_matrix_instance_q15 * pDst)
+        q15_t                     scaleFract,
+        int32_t                   shift,
+        arm_matrix_instance_q15 * pDst)
 {
-  q15_t *pIn = pSrc->pData;                      /* input data matrix pointer */
-  q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  uint32_t numSamples;                           /* total number of elements in the matrix */
-  int32_t totShift = 15 - shift;                 /* total shift to apply after scaling */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix scaling     */
+        q15_t *pIn = pSrc->pData;                      /* Input data matrix pointer */
+        q15_t *pOut = pDst->pData;                     /* Output data matrix pointer */
+        uint32_t numSamples;                           /* Total number of elements in the matrix */
+        uint32_t blkCnt;                               /* Loop counter */
+        arm_status status;                             /* Status of matrix scaling */
+        int32_t kShift = 15 - shift;                   /* Total shift to apply after scaling */
 
-#if defined (ARM_MATH_DSP)
-
-  q15_t in1, in2, in3, in4;
-  q31_t out1, out2, out3, out4;
-  q31_t inA1, inA2;
-
-#endif //     #if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t inA1, inA2;
+        q31_t out1, out2, out3, out4;                  /* Temporary output variables */
+        q15_t in1, in2, in3, in4;                      /* Temporary input variables */
+#endif
 
 #ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch */
-  if ((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numRows) ||
+      (pSrc->numCols != pDst->numCols)   )
   {
     /* Set status as ARM_MATH_SIZE_MISMATCH */
     status = ARM_MATH_SIZE_MISMATCH;
   }
   else
-#endif //    #ifdef ARM_MATH_MATRIX_CHECK
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
   {
-    /* Total number of samples in the input matrix */
+    /* Total number of samples in input matrix */
     numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-    /* Loop Unrolling */
-    blkCnt = numSamples >> 2;
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-     ** a second loop below computes the remaining 1 to 3 samples. */
     while (blkCnt > 0U)
     {
       /* C(m,n) = A(m,n) * k */
-      /* Scale, saturate and then store the results in the destination buffer. */
-      /* Reading 2 inputs from memory */
-      inA1 = _SIMD32_OFFSET(pIn);
-      inA2 = _SIMD32_OFFSET(pIn + 2);
 
-      /* C = A * scale */
-      /* Scale the inputs and then store the 2 results in the destination buffer
+#if defined (ARM_MATH_DSP)
+      /* read 2 times 2 samples at a time from source */
+      inA1 = read_q15x2_ia ((q15_t **) &pIn);
+      inA2 = read_q15x2_ia ((q15_t **) &pIn);
+
+      /* Scale inputs and store result in temporary variables
        * in single cycle by packing the outputs */
       out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract);
-      out2 = (q31_t) ((q15_t) inA1 * scaleFract);
+      out2 = (q31_t) ((q15_t) (inA1      ) * scaleFract);
       out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract);
-      out4 = (q31_t) ((q15_t) inA2 * scaleFract);
+      out4 = (q31_t) ((q15_t) (inA2      ) * scaleFract);
 
-      out1 = out1 >> totShift;
-      inA1 = _SIMD32_OFFSET(pIn + 4);
-      out2 = out2 >> totShift;
-      inA2 = _SIMD32_OFFSET(pIn + 6);
-      out3 = out3 >> totShift;
-      out4 = out4 >> totShift;
+      /* apply shifting */
+      out1 = out1 >> kShift;
+      out2 = out2 >> kShift;
+      out3 = out3 >> kShift;
+      out4 = out4 >> kShift;
 
+      /* saturate the output */
       in1 = (q15_t) (__SSAT(out1, 16));
       in2 = (q15_t) (__SSAT(out2, 16));
       in3 = (q15_t) (__SSAT(out3, 16));
       in4 = (q15_t) (__SSAT(out4, 16));
 
-      _SIMD32_OFFSET(pOut) = __PKHBT(in2, in1, 16);
-      _SIMD32_OFFSET(pOut + 2) = __PKHBT(in4, in3, 16);
+      /* store result to destination */
+      write_q15x2_ia (&pOut, __PKHBT(in2, in1, 16));
+      write_q15x2_ia (&pOut, __PKHBT(in4, in3, 16));
 
-      /* update pointers to process next sampels */
-      pIn += 4U;
-      pOut += 4U;
+#else
+      *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
+      *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
+      *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
+      *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
+#endif
 
-
-      /* Decrement the numSamples loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     blkCnt = numSamples % 0x4U;
 
 #else
 
-    /* Run the below code for Cortex-M0 */
-
     /* Initialize blkCnt with number of samples */
     blkCnt = numSamples;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
     while (blkCnt > 0U)
     {
       /* C(m,n) = A(m,n) * k */
-      /* Scale, saturate and then store the results in the destination buffer. */
-      *pOut++ =
-        (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> totShift, 16));
 
-      /* Decrement the numSamples loop counter */
+      /* Scale, saturate and store result in destination buffer. */
+      *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
+
+      /* Decrement loop counter */
       blkCnt--;
     }
+
     /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
@@ -167,5 +166,5 @@
 }
 
 /**
- * @} end of MatrixScale group
+  @} end of MatrixScale group
  */
diff --git a/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c b/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c
index d190cf1..929b17f 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_mat_scale_q31.c
  * Description:  Multiplies a Q31 matrix by a scalar
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,152 +29,125 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
  */
 
 /**
- * @addtogroup MatrixScale
- * @{
+  @addtogroup MatrixScale
+  @{
  */
 
 /**
- * @brief Q31 matrix scaling.
- * @param[in]       *pSrc points to input matrix
- * @param[in]       scaleFract fractional portion of the scale factor
- * @param[in]       shift number of bits to shift the result by
- * @param[out]      *pDst points to output matrix structure
- * @return     		The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format.
- * These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.
+  @brief         Q31 matrix scaling.
+  @param[in]     pSrc        points to input matrix
+  @param[in]     scaleFract  fractional portion of the scale factor
+  @param[in]     shift       number of bits to shift the result by
+  @param[out]    pDst        points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format.
+                   These are multiplied to yield a 2.62 intermediate result which is shifted with saturation to 1.31 format.
  */
 
 arm_status arm_mat_scale_q31(
   const arm_matrix_instance_q31 * pSrc,
-  q31_t scaleFract,
-  int32_t shift,
-  arm_matrix_instance_q31 * pDst)
+        q31_t                     scaleFract,
+        int32_t                   shift,
+        arm_matrix_instance_q31 * pDst)
 {
-  q31_t *pIn = pSrc->pData;                      /* input data matrix pointer */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  uint32_t numSamples;                           /* total number of elements in the matrix */
-  int32_t totShift = shift + 1;                  /* shift to apply after scaling */
-  uint32_t blkCnt;                               /* loop counters  */
-  arm_status status;                             /* status of matrix scaling      */
-  q31_t in1, in2, out1;                          /* temporary variabels */
-
-#if defined (ARM_MATH_DSP)
-
-  q31_t in3, in4, out2, out3, out4;              /* temporary variables */
-
-#endif //      #ifndef ARM_MAT_CM0
+  q31_t *pIn = pSrc->pData;                      /* Input data matrix pointer */
+  q31_t *pOut = pDst->pData;                     /* Output data matrix pointer */
+  uint32_t numSamples;                           /* Total number of elements in the matrix */
+  uint32_t blkCnt;                               /* Loop counter */
+  arm_status status;                             /* Status of matrix scaling */
+  int32_t kShift = shift + 1;                    /* Shift to apply after scaling */
+  q31_t in, out;                                 /* Temporary variabels */
 
 #ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch  */
-  if ((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numRows) ||
+      (pSrc->numCols != pDst->numCols)   )
   {
     /* Set status as ARM_MATH_SIZE_MISMATCH */
     status = ARM_MATH_SIZE_MISMATCH;
   }
   else
-#endif //    #ifdef ARM_MATH_MATRIX_CHECK
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
   {
-    /* Total number of samples in the input matrix */
+    /* Total number of samples in input matrix */
     numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Loop Unrolling */
+    /* Loop unrolling: Compute 4 outputs at a time */
     blkCnt = numSamples >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-     ** a second loop below computes the remaining 1 to 3 samples. */
     while (blkCnt > 0U)
     {
       /* C(m,n) = A(m,n) * k */
-      /* Read values from input */
-      in1 = *pIn;
-      in2 = *(pIn + 1);
-      in3 = *(pIn + 2);
-      in4 = *(pIn + 3);
 
-      /* multiply input with scaler value */
-      in1 = ((q63_t) in1 * scaleFract) >> 32;
-      in2 = ((q63_t) in2 * scaleFract) >> 32;
-      in3 = ((q63_t) in3 * scaleFract) >> 32;
-      in4 = ((q63_t) in4 * scaleFract) >> 32;
+      /* Scale, saturate and store result in destination buffer. */
+      in = *pIn++;                                 /* read four inputs from source */
+      in = ((q63_t) in * scaleFract) >> 32;        /* multiply input with scaler value */
+      out = in << kShift;                          /* apply shifting */
+      if (in != (out >> kShift))                   /* saturate the results. */
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pOut++ = out;                               /* Store result destination */
 
-      /* apply shifting */
-      out1 = in1 << totShift;
-      out2 = in2 << totShift;
+      in = *pIn++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pOut++ = out;
 
-      /* saturate the results. */
-      if (in1 != (out1 >> totShift))
-        out1 = 0x7FFFFFFF ^ (in1 >> 31);
+      in = *pIn++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pOut++ = out;
 
-      if (in2 != (out2 >> totShift))
-        out2 = 0x7FFFFFFF ^ (in2 >> 31);
+      in = *pIn++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pOut++ = out;
 
-      out3 = in3 << totShift;
-      out4 = in4 << totShift;
-
-      *pOut = out1;
-      *(pOut + 1) = out2;
-
-      if (in3 != (out3 >> totShift))
-        out3 = 0x7FFFFFFF ^ (in3 >> 31);
-
-      if (in4 != (out4 >> totShift))
-        out4 = 0x7FFFFFFF ^ (in4 >> 31);
-
-
-      *(pOut + 2) = out3;
-      *(pOut + 3) = out4;
-
-      /* update pointers to process next sampels */
-      pIn += 4U;
-      pOut += 4U;
-
-
-      /* Decrement the numSamples loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     blkCnt = numSamples % 0x4U;
 
 #else
 
-    /* Run the below code for Cortex-M0 */
-
     /* Initialize blkCnt with number of samples */
     blkCnt = numSamples;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
     while (blkCnt > 0U)
     {
       /* C(m,n) = A(m,n) * k */
-      /* Scale, saturate and then store the results in the destination buffer. */
-      in1 = *pIn++;
 
-      in2 = ((q63_t) in1 * scaleFract) >> 32;
+      /* Scale, saturate and store result in destination buffer. */
+      in = *pIn++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pOut++ = out;
 
-      out1 = in2 << totShift;
-
-      if (in2 != (out1 >> totShift))
-        out1 = 0x7FFFFFFF ^ (in2 >> 31);
-
-      *pOut++ = out1;
-
-      /* Decrement the numSamples loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
@@ -187,5 +160,5 @@
 }
 
 /**
- * @} end of MatrixScale group
+  @} end of MatrixScale group
  */
diff --git a/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c b/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c
index 7c0b54e..cb57647 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_mat_sub_f32.c
  * Description:  Floating-point matrix subtraction
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,34 +29,36 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
  */
 
 /**
- * @defgroup MatrixSub Matrix Subtraction
- *
- * Subtract two matrices.
- * \image html MatrixSubtraction.gif "Subraction of two 3 x 3 matrices"
- *
- * The functions check to make sure that
- * <code>pSrcA</code>, <code>pSrcB</code>, and <code>pDst</code> have the same
- * number of rows and columns.
+  @defgroup MatrixSub Matrix Subtraction
+
+  Subtract two matrices.
+  \image html MatrixSubtraction.gif "Subraction of two 3 x 3 matrices"
+
+  The functions check to make sure that
+  <code>pSrcA</code>, <code>pSrcB</code>, and <code>pDst</code> have the same
+  number of rows and columns.
  */
 
 /**
- * @addtogroup MatrixSub
- * @{
+  @addtogroup MatrixSub
+  @{
  */
 
 /**
- * @brief Floating-point matrix subtraction
- * @param[in]       *pSrcA points to the first input matrix structure
- * @param[in]       *pSrcB points to the second input matrix structure
- * @param[out]      *pDst points to output matrix structure
- * @return     		The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+  @brief         Floating-point matrix subtraction.
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
  */
 
+#if defined(ARM_MATH_NEON)
 arm_status arm_mat_sub_f32(
   const arm_matrix_instance_f32 * pSrcA,
   const arm_matrix_instance_f32 * pSrcB,
@@ -66,11 +68,9 @@
   float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
   float32_t *pOut = pDst->pData;                 /* output data matrix pointer  */
 
-#if defined (ARM_MATH_DSP)
 
   float32_t inA1, inA2, inB1, inB2, out1, out2;  /* temporary variables */
 
-#endif //      #if defined (ARM_MATH_DSP)
 
   uint32_t numSamples;                           /* total number of elements in the matrix  */
   uint32_t blkCnt;                               /* loop counters */
@@ -88,71 +88,28 @@
   else
 #endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
   {
+    float32x4_t vec1;
+    float32x4_t vec2;
+    float32x4_t res;
+
     /* Total number of samples in the input matrix */
     numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
 
-#if defined (ARM_MATH_DSP)
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Loop Unrolling */
     blkCnt = numSamples >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+    /* Compute 4 outputs at a time.
      ** a second loop below computes the remaining 1 to 3 samples. */
     while (blkCnt > 0U)
     {
       /* C(m,n) = A(m,n) - B(m,n) */
       /* Subtract and then store the results in the destination buffer. */
       /* Read values from source A */
-      inA1 = pIn1[0];
+      vec1 = vld1q_f32(pIn1);
+      vec2 = vld1q_f32(pIn2);
+      res = vsubq_f32(vec1, vec2);
+      vst1q_f32(pOut, res);
 
-      /* Read values from source B */
-      inB1 = pIn2[0];
-
-      /* Read values from source A */
-      inA2 = pIn1[1];
-
-      /* out = sourceA - sourceB */
-      out1 = inA1 - inB1;
-
-      /* Read values from source B */
-      inB2 = pIn2[1];
-
-      /* Read values from source A */
-      inA1 = pIn1[2];
-
-      /* out = sourceA - sourceB */
-      out2 = inA2 - inB2;
-
-      /* Read values from source B */
-      inB1 = pIn2[2];
-
-      /* Store result in destination */
-      pOut[0] = out1;
-      pOut[1] = out2;
-
-      /* Read values from source A */
-      inA2 = pIn1[3];
-
-      /* Read values from source B */
-      inB2 = pIn2[3];
-
-      /* out = sourceA - sourceB */
-      out1 = inA1 - inB1;
-
-
-      /* out = sourceA - sourceB */
-      out2 = inA2 - inB2;
-
-      /* Store result in destination */
-      pOut[2] = out1;
-
-      /* Store result in destination */
-      pOut[3] = out2;
-
-
-      /* update pointers to process next sampels */
+      /* Update pointers to process next samples */
       pIn1 += 4U;
       pIn2 += 4U;
       pOut += 4U;
@@ -165,14 +122,6 @@
      ** No loop unrolling is used. */
     blkCnt = numSamples % 0x4U;
 
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_DSP) */
 
     while (blkCnt > 0U)
     {
@@ -191,7 +140,87 @@
   /* Return to application */
   return (status);
 }
+#else
+arm_status arm_mat_sub_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+        arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pInA = pSrcA->pData;                /* input data matrix pointer A */
+  float32_t *pInB = pSrcB->pData;                /* input data matrix pointer B */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
 
+  uint32_t numSamples;                           /* total number of elements in the matrix */
+  uint32_t blkCnt;                               /* loop counters */
+  arm_status status;                             /* status of matrix subtraction */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) - B(m,n) */
+
+      /* Subtract and store result in destination buffer. */
+      *pOut++ = (*pInA++) - (*pInB++);
+      *pOut++ = (*pInA++) - (*pInB++);
+      *pOut++ = (*pInA++) - (*pInB++);
+      *pOut++ = (*pInA++) - (*pInB++);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) - B(m,n) */
+
+      /* Subtract and store result in destination buffer. */
+      *pOut++ = (*pInA++) - (*pInB++);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
 /**
- * @} end of MatrixSub group
+  @} end of MatrixSub group
  */
diff --git a/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c b/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c
index 28e659f..5d5e5d0 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_mat_sub_q15.c
  * Description:  Q15 Matrix subtraction
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,112 +29,108 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
  */
 
 /**
- * @addtogroup MatrixSub
- * @{
+  @addtogroup MatrixSub
+  @{
  */
 
 /**
- * @brief Q15 matrix subtraction.
- * @param[in]       *pSrcA points to the first input matrix structure
- * @param[in]       *pSrcB points to the second input matrix structure
- * @param[out]      *pDst points to output matrix structure
- * @return     		The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
+  @brief         Q15 matrix subtraction.
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
  */
 
 arm_status arm_mat_sub_q15(
   const arm_matrix_instance_q15 * pSrcA,
   const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst)
+        arm_matrix_instance_q15 * pDst)
 {
-  q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
-  q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
-  q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  uint32_t numSamples;                           /* total number of elements in the matrix */
-  uint32_t blkCnt;                               /* loop counters  */
-  arm_status status;                             /* status of matrix subtraction  */
+        q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
+        q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
+        q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
 
+        uint32_t numSamples;                           /* total number of elements in the matrix */
+        uint32_t blkCnt;                               /* loop counters  */
+        arm_status status;                             /* status of matrix subtraction  */
 
 #ifdef ARM_MATH_MATRIX_CHECK
 
-
   /* Check for matrix mismatch condition */
   if ((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
   {
     /* Set status as ARM_MATH_SIZE_MISMATCH */
     status = ARM_MATH_SIZE_MISMATCH;
   }
   else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
 
   {
-    /* Total number of samples in the input matrix */
+    /* Total number of samples in input matrix */
     numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Apply loop unrolling */
+    /* Loop unrolling: Compute 4 outputs at a time */
     blkCnt = numSamples >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-     ** a second loop below computes the remaining 1 to 3 samples. */
     while (blkCnt > 0U)
     {
       /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract, Saturate and then store the results in the destination buffer. */
-      *__SIMD32(pOut)++ = __QSUB16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
-      *__SIMD32(pOut)++ = __QSUB16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
 
-      /* Decrement the loop counter */
+      /* Subtract, Saturate and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+      write_q15x2_ia (&pOut, __QSUB16(read_q15x2_ia ((q15_t **) &pInA), read_q15x2_ia ((q15_t **) &pInB)));
+      write_q15x2_ia (&pOut, __QSUB16(read_q15x2_ia ((q15_t **) &pInA), read_q15x2_ia ((q15_t **) &pInB)));
+#else
+      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
+      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
+      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
+      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
+#endif
+
+      /* Decrement loop counter */
       blkCnt--;
     }
 
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     blkCnt = numSamples % 0x4U;
 
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract and then store the results in the destination buffer. */
-      *pOut++ = (q15_t) __QSUB16(*pInA++, *pInB++);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
 #else
 
-    /* Run the below code for Cortex-M0 */
-
     /* Initialize blkCnt with number of samples */
     blkCnt = numSamples;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
     while (blkCnt > 0U)
     {
       /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract and then store the results in the destination buffer. */
-      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
 
-      /* Decrement the loop counter */
+      /* Subtract and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+      *pOut++ = (q15_t) __QSUB16(*pInA++, *pInB++);
+#else
+      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
+#endif
+
+      /* Decrement loop counter */
       blkCnt--;
     }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
     /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
@@ -144,5 +140,5 @@
 }
 
 /**
- * @} end of MatrixSub group
+  @} end of MatrixSub group
  */
diff --git a/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c b/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c
index 3bf5508..40d1bef 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_mat_sub_q31.c
  * Description:  Q31 matrix subtraction
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,157 +29,100 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
  */
 
 /**
- * @addtogroup MatrixSub
- * @{
+  @addtogroup MatrixSub
+  @{
  */
 
 /**
- * @brief Q31 matrix subtraction.
- * @param[in]       *pSrcA points to the first input matrix structure
- * @param[in]       *pSrcB points to the second input matrix structure
- * @param[out]      *pDst points to output matrix structure
- * @return     		The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
- */
+  @brief         Q31 matrix subtraction.
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
 
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
+ */
 
 arm_status arm_mat_sub_q31(
   const arm_matrix_instance_q31 * pSrcA,
   const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst)
+        arm_matrix_instance_q31 * pDst)
 {
-  q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
+  q31_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
+  q31_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
   q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  q31_t inA1, inB1;                              /* temporary variables */
 
-#if defined (ARM_MATH_DSP)
-
-  q31_t inA2, inB2;                              /* temporary variables */
-  q31_t out1, out2;                              /* temporary variables */
-
-#endif //      #if defined (ARM_MATH_DSP)
-
-  uint32_t numSamples;                           /* total number of elements in the matrix  */
+  uint32_t numSamples;                           /* total number of elements in the matrix */
   uint32_t blkCnt;                               /* loop counters */
   arm_status status;                             /* status of matrix subtraction */
 
-
 #ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition  */
+
+  /* Check for matrix mismatch condition */
   if ((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
   {
     /* Set status as ARM_MATH_SIZE_MISMATCH */
     status = ARM_MATH_SIZE_MISMATCH;
   }
   else
-#endif
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
   {
-    /* Total number of samples in the input matrix */
+    /* Total number of samples in input matrix */
     numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Loop Unrolling */
+    /* Loop unrolling: Compute 4 outputs at a time */
     blkCnt = numSamples >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-     ** a second loop below computes the remaining 1 to 3 samples. */
     while (blkCnt > 0U)
     {
       /* C(m,n) = A(m,n) - B(m,n) */
+
       /* Subtract, saturate and then store the results in the destination buffer. */
-      /* Read values from source A */
-      inA1 = pIn1[0];
+      *pOut++ = __QSUB(*pInA++, *pInB++);
 
-      /* Read values from source B */
-      inB1 = pIn2[0];
+      *pOut++ = __QSUB(*pInA++, *pInB++);
 
-      /* Read values from source A */
-      inA2 = pIn1[1];
+      *pOut++ = __QSUB(*pInA++, *pInB++);
 
-      /* Subtract and saturate */
-      out1 = __QSUB(inA1, inB1);
+      *pOut++ = __QSUB(*pInA++, *pInB++);
 
-      /* Read values from source B */
-      inB2 = pIn2[1];
-
-      /* Read values from source A */
-      inA1 = pIn1[2];
-
-      /* Subtract and saturate */
-      out2 = __QSUB(inA2, inB2);
-
-      /* Read values from source B */
-      inB1 = pIn2[2];
-
-      /* Store result in destination */
-      pOut[0] = out1;
-      pOut[1] = out2;
-
-      /* Read values from source A */
-      inA2 = pIn1[3];
-
-      /* Read values from source B */
-      inB2 = pIn2[3];
-
-      /* Subtract and saturate */
-      out1 = __QSUB(inA1, inB1);
-
-      /* Subtract and saturate */
-      out2 = __QSUB(inA2, inB2);
-
-      /* Store result in destination */
-      pOut[2] = out1;
-      pOut[3] = out2;
-
-      /* update pointers to process next samples */
-      pIn1 += 4U;
-      pIn2 += 4U;
-      pOut += 4U;
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
+    /* Loop unrolling: Compute remaining outputs */
     blkCnt = numSamples % 0x4U;
 
 #else
 
-    /* Run the below code for Cortex-M0 */
-
     /* Initialize blkCnt with number of samples */
     blkCnt = numSamples;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
     while (blkCnt > 0U)
     {
       /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract, saturate and then store the results in the destination buffer. */
-      inA1 = *pIn1++;
-      inB1 = *pIn2++;
 
-      inA1 = __QSUB(inA1, inB1);
+      /* Subtract, saturate and store result in destination buffer. */
+      *pOut++ = __QSUB(*pInA++, *pInB++);
 
-      *pOut++ = inA1;
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
@@ -192,5 +135,5 @@
 }
 
 /**
- * @} end of MatrixSub group
+  @} end of MatrixSub group
  */
diff --git a/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c b/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c
index 84165ce..71748bf 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c
@@ -3,8 +3,8 @@
  * Title:        arm_mat_trans_f32.c
  * Description:  Floating-point matrix transpose
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
@@ -26,33 +26,36 @@
  * limitations under the License.
  */
 
-/**
- * @defgroup MatrixTrans Matrix Transpose
- *
- * Tranposes a matrix.
- * Transposing an <code>M x N</code> matrix flips it around the center diagonal and results in an <code>N x M</code> matrix.
- * \image html MatrixTranspose.gif "Transpose of a 3 x 3 matrix"
- */
-
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
  */
 
 /**
- * @addtogroup MatrixTrans
- * @{
+  @defgroup MatrixTrans Matrix Transpose
+
+  Tranposes a matrix.
+
+  Transposing an <code>M x N</code> matrix flips it around the center diagonal and results in an <code>N x M</code> matrix.
+  \image html MatrixTranspose.gif "Transpose of a 3 x 3 matrix"
  */
 
 /**
-  * @brief Floating-point matrix transpose.
-  * @param[in]  *pSrc points to the input matrix
-  * @param[out] *pDst points to the output matrix
-  * @return 	The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
-  * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-  */
+  @addtogroup MatrixTrans
+  @{
+ */
 
+/**
+  @brief         Floating-point matrix transpose.
+  @param[in]     pSrc      points to input matrix
+  @param[out]    pDst      points to output matrix
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+
+#if defined(ARM_MATH_NEON)
 
 arm_status arm_mat_trans_f32(
   const arm_matrix_instance_f32 * pSrc,
@@ -64,17 +67,11 @@
   uint16_t nRows = pSrc->numRows;                /* number of rows */
   uint16_t nColumns = pSrc->numCols;             /* number of columns */
 
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  uint16_t blkCnt, i = 0U, row = nRows;          /* loop counters */
+  uint16_t blkCnt, rowCnt, i = 0U, row = nRows;          /* loop counters */
   arm_status status;                             /* status of matrix transpose  */
 
-
 #ifdef ARM_MATH_MATRIX_CHECK
 
-
   /* Check for matrix mismatch condition */
   if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
   {
@@ -86,41 +83,44 @@
 
   {
     /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
-    do
+    /* Row loop */
+    rowCnt = row >> 2;
+    while (rowCnt > 0U)
     {
-      /* Loop Unrolling */
+      float32x4_t row0V,row1V,row2V,row3V;
+      float32x4x2_t ra0,ra1,rb0,rb1;
+
       blkCnt = nColumns >> 2;
 
       /* The pointer px is set to starting address of the column being processed */
       px = pOut + i;
 
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+      /* Compute 4 outputs at a time.
        ** a second loop below computes the remaining 1 to 3 samples. */
-      while (blkCnt > 0U)        /* column loop */
+      while (blkCnt > 0U)        /* Column loop */
       {
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
+        row0V = vld1q_f32(pIn);
+        row1V = vld1q_f32(pIn + 1 * nColumns);
+        row2V = vld1q_f32(pIn + 2 * nColumns);
+        row3V = vld1q_f32(pIn + 3 * nColumns);
+        pIn += 4;
 
-        /* Update the pointer px to point to the next row of the transposed matrix */
+        ra0 = vzipq_f32(row0V,row2V);
+        ra1 = vzipq_f32(row1V,row3V);
+
+        rb0 = vzipq_f32(ra0.val[0],ra1.val[0]);
+        rb1 = vzipq_f32(ra0.val[1],ra1.val[1]);
+
+        vst1q_f32(px,rb0.val[0]);
         px += nRows;
 
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
+        vst1q_f32(px,rb0.val[1]);
         px += nRows;
 
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
+        vst1q_f32(px,rb1.val[0]);
         px += nRows;
 
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
+        vst1q_f32(px,rb1.val[1]);
         px += nRows;
 
         /* Decrement the column loop counter */
@@ -133,46 +133,34 @@
       while (blkCnt > 0U)
       {
         /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
+        *px++ = *pIn;
+        *px++ = *(pIn + 1 * nColumns);
+        *px++ = *(pIn + 2 * nColumns);
+        *px++ = *(pIn + 3 * nColumns);
+        
+        px += (nRows - 4);
+        pIn++;
 
         /* Decrement the column loop counter */
         blkCnt--;
       }
 
-#else
+      i += 4;
+      pIn += 3 * nColumns;
 
-  /* Run the below code for Cortex-M0 */
+      /* Decrement the row loop counter */
+      rowCnt--;
 
-  uint16_t col, i = 0U, row = nRows;             /* loop counters */
-  arm_status status;                             /* status of matrix transpose  */
+    }         /* Row loop end  */
 
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
-    do
+    rowCnt = row & 3;
+    while (rowCnt > 0U)
     {
+      blkCnt = nColumns ;
       /* The pointer px is set to starting address of the column being processed */
       px = pOut + i;
 
-      /* Initialize column loop counter */
-      col = nColumns;
-
-      while (col > 0U)
+      while (blkCnt > 0U)
       {
         /* Read and store the input element in the destination */
         *px = *pIn++;
@@ -181,17 +169,11 @@
         px += nRows;
 
         /* Decrement the column loop counter */
-        col--;
+        blkCnt--;
       }
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
       i++;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while (row > 0U);          /* row loop end  */
+      rowCnt -- ;
+    }
 
     /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
@@ -200,6 +182,102 @@
   /* Return to application */
   return (status);
 }
+#else
+arm_status arm_mat_trans_f32(
+  const arm_matrix_instance_f32 * pSrc,
+        arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
+  float32_t *px;                                 /* Temporary output data matrix pointer */
+  uint16_t nRows = pSrc->numRows;                /* number of rows */
+  uint16_t nCols = pSrc->numCols;                /* number of columns */
+  uint32_t col, row = nRows, i = 0U;             /* Loop counters */
+  arm_status status;                             /* status of matrix transpose */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numCols) ||
+      (pSrc->numCols != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Matrix transpose by exchanging the rows with columns */
+    /* row loop */
+    do
+    {
+      /* Pointer px is set to starting address of column being processed */
+      px = pOut + i;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      col = nCols >> 2U;
+
+      while (col > 0U)        /* column loop */
+      {
+        /* Read and store input element in destination */
+        *px = *pIn++;
+        /* Update pointer px to point to next row of transposed matrix */
+        px += nRows;
+
+        *px = *pIn++;
+        px += nRows;
+
+        *px = *pIn++;
+        px += nRows;
+
+        *px = *pIn++;
+        px += nRows;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      col = nCols % 0x4U;
+
+#else
+
+      /* Initialize col with number of samples */
+      col = nCols;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (col > 0U)
+      {
+        /* Read and store input element in destination */
+        *px = *pIn++;
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += nRows;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      i++;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);          /* row loop end */
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
 
 /**
  * @} end of MatrixTrans group
diff --git a/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c b/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c
index 6ba0904..707e0d6 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_mat_trans_q15.c
  * Description:  Q15 matrix transpose
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,244 +29,154 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
  */
 
 /**
- * @addtogroup MatrixTrans
- * @{
+  @addtogroup MatrixTrans
+  @{
  */
 
-/*
- * @brief Q15 matrix transpose.
- * @param[in]  *pSrc points to the input matrix
- * @param[out] *pDst points to the output matrix
- * @return 	The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
- * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+/**
+  @brief         Q15 matrix transpose.
+  @param[in]     pSrc      points to input matrix
+  @param[out]    pDst      points to output matrix
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
  */
 
 arm_status arm_mat_trans_q15(
   const arm_matrix_instance_q15 * pSrc,
-  arm_matrix_instance_q15 * pDst)
+        arm_matrix_instance_q15 * pDst)
 {
-  q15_t *pSrcA = pSrc->pData;                    /* input data matrix pointer */
-  q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  uint16_t nRows = pSrc->numRows;                /* number of nRows */
-  uint16_t nColumns = pSrc->numCols;             /* number of nColumns */
-  uint16_t col, row = nRows, i = 0U;             /* row and column loop counters */
-  arm_status status;                             /* status of matrix transpose */
+        q15_t *pIn = pSrc->pData;                      /* input data matrix pointer */
+        q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
+        uint16_t nRows = pSrc->numRows;                /* number of rows */
+        uint16_t nCols = pSrc->numCols;                /* number of columns */
+        uint32_t col, row = nRows, i = 0U;             /* Loop counters */
+        arm_status status;                             /* status of matrix transpose */
 
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  q31_t in;                                      /* variable to hold temporary output  */
-
-#else
-
-  q15_t in;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t in;                                      /* variable to hold temporary output  */
+#endif
 
 #ifdef ARM_MATH_MATRIX_CHECK
 
-
   /* Check for matrix mismatch condition */
-  if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
+  if ((pSrc->numRows != pDst->numCols) ||
+      (pSrc->numCols != pDst->numRows)   )
   {
     /* Set status as ARM_MATH_SIZE_MISMATCH */
     status = ARM_MATH_SIZE_MISMATCH;
   }
   else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
 
   {
     /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
+    /* row loop */
     do
     {
-
-      /* Apply loop unrolling and exchange the columns with row elements */
-      col = nColumns >> 2U;
-
-      /* The pointer pOut is set to starting address of the column being processed */
+      /* Pointer pOut is set to starting address of column being processed */
       pOut = pDst->pData + i;
 
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-       ** a second loop below computes the remaining 1 to 3 samples. */
-      while (col > 0U)
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      col = nCols >> 2U;
+
+      while (col > 0U)        /* column loop */
       {
-#ifndef UNALIGNED_SUPPORT_DISABLE
+        /* Read two elements from row */
+        in = read_q15x2_ia ((q15_t **) &pIn);
 
-        /* Read two elements from the row */
-        in = *__SIMD32(pSrcA)++;
-
-        /* Unpack and store one element in the destination */
+        /* Unpack and store one element in  destination */
 #ifndef ARM_MATH_BIG_ENDIAN
-
         *pOut = (q15_t) in;
-
 #else
+        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
+        /* Update pointer pOut to point to next row of transposed matrix */
+        pOut += nRows;
+
+        /* Unpack and store second element in destination */
+#ifndef ARM_MATH_BIG_ENDIAN
+        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#else
+        *pOut = (q15_t) in;
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /* Update  pointer pOut to point to next row of transposed matrix */
+        pOut += nRows;
+
+        /* Read two elements from row */
+        in = read_q15x2_ia ((q15_t **) &pIn);
+
+        /* Unpack and store one element in destination */
+#ifndef ARM_MATH_BIG_ENDIAN
+        *pOut = (q15_t) in;
+#else
         *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
 
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-        /* Update the pointer pOut to point to the next row of the transposed matrix */
+        /* Update pointer pOut to point to next row of transposed matrix */
         pOut += nRows;
 
-        /* Unpack and store the second element in the destination */
-
+        /* Unpack and store second element in destination */
 #ifndef ARM_MATH_BIG_ENDIAN
-
         *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
 #else
-
         *pOut = (q15_t) in;
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer pOut to point to the next row of the transposed matrix */
+        /* Update pointer pOut to point to next row of transposed matrix */
         pOut += nRows;
 
-        /* Read two elements from the row */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        in = *__SIMD32(pSrcA)++;
-
-#else
-
-        in = *__SIMD32(pSrcA)++;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Unpack and store one element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *pOut = (q15_t) in;
-
-#else
-
-        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer pOut to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Unpack and store the second element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#else
-
-        *pOut = (q15_t) in;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-#else
-        /* Read one element from the row */
-        in = *pSrcA++;
-
-        /* Store one element in the destination */
-        *pOut = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Read one element from the row */
-        in = *pSrcA++;
-
-        /* Store one element in the destination */
-        *pOut = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Read one element from the row */
-        in = *pSrcA++;
-
-        /* Store one element in the destination */
-        *pOut = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Read one element from the row */
-        in = *pSrcA++;
-
-        /* Store one element in the destination */
-        *pOut = in;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-        /* Update the pointer pOut to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Decrement the column loop counter */
+        /* Decrement column loop counter */
         col--;
       }
 
-      /* Perform matrix transpose for last 3 samples here. */
-      col = nColumns % 0x4U;
+      /* Loop unrolling: Compute remaining outputs */
+      col = nCols % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
+      /* Initialize col with number of samples */
+      col = nCols;
 
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
-    do
-    {
-      /* The pointer pOut is set to starting address of the column being processed */
-      pOut = pDst->pData + i;
-
-      /* Initialize column loop counter */
-      col = nColumns;
-
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
       while (col > 0U)
       {
-        /* Read and store the input element in the destination */
-        *pOut = *pSrcA++;
+        /* Read and store input element in destination */
+        *pOut = *pIn++;
 
-        /* Update the pointer pOut to point to the next row of the transposed matrix */
+        /* Update pointer pOut to point to next row of transposed matrix */
         pOut += nRows;
 
-        /* Decrement the column loop counter */
+        /* Decrement column loop counter */
         col--;
       }
 
       i++;
 
-      /* Decrement the row loop counter */
+      /* Decrement row loop counter */
       row--;
 
-    } while (row > 0U);
+    } while (row > 0U);          /* row loop end */
 
-    /* set status as ARM_MATH_SUCCESS */
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
+
   /* Return to application */
   return (status);
 }
 
 /**
- * @} end of MatrixTrans group
+  @} end of MatrixTrans group
  */
diff --git a/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c b/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c
index 6f698e0..5d0b5e2 100644
--- a/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c
+++ b/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_mat_trans_q31.c
  * Description:  Q31 matrix transpose
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,163 +29,111 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupMatrix
+  @ingroup groupMatrix
  */
 
 /**
- * @addtogroup MatrixTrans
- * @{
+  @addtogroup MatrixTrans
+  @{
  */
 
-/*
-  * @brief Q31 matrix transpose.
-  * @param[in]  *pSrc points to the input matrix
-  * @param[out] *pDst points to the output matrix
-  * @return 	The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
-  * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+/**
+  @brief         Q31 matrix transpose.
+  @param[in]     pSrc      points to input matrix
+  @param[out]    pDst      points to output matrix
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
  */
 
 arm_status arm_mat_trans_q31(
   const arm_matrix_instance_q31 * pSrc,
-  arm_matrix_instance_q31 * pDst)
+        arm_matrix_instance_q31 * pDst)
 {
-  q31_t *pIn = pSrc->pData;                      /* input data matrix pointer  */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer  */
+  q31_t *pIn = pSrc->pData;                      /* input data matrix pointer */
+  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
   q31_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t nRows = pSrc->numRows;                /* number of nRows */
-  uint16_t nColumns = pSrc->numCols;             /* number of nColumns  */
-
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  uint16_t blkCnt, i = 0U, row = nRows;          /* loop counters */
+  uint16_t nRows = pSrc->numRows;                /* number of rows */
+  uint16_t nCols = pSrc->numCols;                /* number of columns */
+  uint32_t col, row = nRows, i = 0U;             /* Loop counters */
   arm_status status;                             /* status of matrix transpose */
 
-
 #ifdef ARM_MATH_MATRIX_CHECK
 
-
   /* Check for matrix mismatch condition */
-  if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
+  if ((pSrc->numRows != pDst->numCols) ||
+      (pSrc->numCols != pDst->numRows)   )
   {
     /* Set status as ARM_MATH_SIZE_MISMATCH */
     status = ARM_MATH_SIZE_MISMATCH;
   }
   else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
 
   {
     /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
+    /* row loop */
     do
     {
-      /* Apply loop unrolling and exchange the columns with row elements */
-      blkCnt = nColumns >> 2U;
-
-      /* The pointer px is set to starting address of the column being processed */
+      /* Pointer px is set to starting address of column being processed */
       px = pOut + i;
 
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-       ** a second loop below computes the remaining 1 to 3 samples. */
-      while (blkCnt > 0U)
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      col = nCols >> 2U;
+
+      while (col > 0U)        /* column loop */
       {
-        /* Read and store the input element in the destination */
+        /* Read and store input element in destination */
         *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
+        /* Update pointer px to point to next row of transposed matrix */
         px += nRows;
 
-        /* Read and store the input element in the destination */
         *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
         px += nRows;
 
-        /* Read and store the input element in the destination */
         *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
         px += nRows;
 
-        /* Read and store the input element in the destination */
         *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
         px += nRows;
 
-        /* Decrement the column loop counter */
-        blkCnt--;
-      }
-
-      /* Perform matrix transpose for last 3 samples here. */
-      blkCnt = nColumns % 0x4U;
-
-      while (blkCnt > 0U)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Decrement the column loop counter */
-        blkCnt--;
-      }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  uint16_t col, i = 0U, row = nRows;             /* loop counters */
-  arm_status status;                             /* status of matrix transpose */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
-    do
-    {
-      /* The pointer px is set to starting address of the column being processed */
-      px = pOut + i;
-
-      /* Initialize column loop counter */
-      col = nColumns;
-
-      while (col > 0U)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Decrement the column loop counter */
+        /* Decrement column loop counter */
         col--;
       }
 
-#endif /* #if defined (ARM_MATH_DSP) */
+      /* Loop unrolling: Compute remaining outputs */
+      col = nCols % 0x4U;
+
+#else
+
+      /* Initialize col with number of samples */
+      col = nCols;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (col > 0U)
+      {
+        /* Read and store input element in destination */
+        *px = *pIn++;
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += nRows;
+
+        /* Decrement column loop counter */
+        col--;
+      }
 
       i++;
 
-      /* Decrement the row loop counter */
+      /* Decrement row loop counter */
       row--;
 
-    }
-    while (row > 0U);            /* row loop end */
+    } while (row > 0U);          /* row loop end */
 
-    /* set status as ARM_MATH_SUCCESS */
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
 
@@ -194,5 +142,5 @@
 }
 
 /**
- * @} end of MatrixTrans group
+  @} end of MatrixTrans group
  */
diff --git a/DSP/Source/StatisticsFunctions/CMakeLists.txt b/DSP/Source/StatisticsFunctions/CMakeLists.txt
new file mode 100644
index 0000000..3f23355
--- /dev/null
+++ b/DSP/Source/StatisticsFunctions/CMakeLists.txt
@@ -0,0 +1,16 @@
+cmake_minimum_required (VERSION 3.6)
+
+project(CMSISDSPStatistics)
+
+
+file(GLOB SRC "./*_*.c")
+
+add_library(CMSISDSPStatistics STATIC ${SRC})
+
+configdsp(CMSISDSPStatistics ..)
+
+### Includes
+target_include_directories(CMSISDSPStatistics PUBLIC "${DSP}/../../Include")
+
+
+
diff --git a/DSP/Source/StatisticsFunctions/StatisticsFunctions.c b/DSP/Source/StatisticsFunctions/StatisticsFunctions.c
new file mode 100644
index 0000000..4f86aa4
--- /dev/null
+++ b/DSP/Source/StatisticsFunctions/StatisticsFunctions.c
@@ -0,0 +1,53 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        StatisticsFunctions.c
+ * Description:  Combination of all statistics function source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_max_f32.c"
+#include "arm_max_q15.c"
+#include "arm_max_q31.c"
+#include "arm_max_q7.c"
+#include "arm_mean_f32.c"
+#include "arm_mean_q15.c"
+#include "arm_mean_q31.c"
+#include "arm_mean_q7.c"
+#include "arm_min_f32.c"
+#include "arm_min_q15.c"
+#include "arm_min_q31.c"
+#include "arm_min_q7.c"
+#include "arm_power_f32.c"
+#include "arm_power_q15.c"
+#include "arm_power_q31.c"
+#include "arm_power_q7.c"
+#include "arm_rms_f32.c"
+#include "arm_rms_q15.c"
+#include "arm_rms_q31.c"
+#include "arm_std_f32.c"
+#include "arm_std_q15.c"
+#include "arm_std_q31.c"
+#include "arm_var_f32.c"
+#include "arm_var_q15.c"
+#include "arm_var_q31.c"
diff --git a/DSP/Source/StatisticsFunctions/arm_max_f32.c b/DSP/Source/StatisticsFunctions/arm_max_f32.c
index a0a68ac..cd54e2a 100644
--- a/DSP/Source/StatisticsFunctions/arm_max_f32.c
+++ b/DSP/Source/StatisticsFunctions/arm_max_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_max_f32.c
  * Description:  Maximum value of a floating-point vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -27,136 +27,237 @@
  */
 
 #include "arm_math.h"
+#if defined(ARM_MATH_NEON)
+#include <limits.h>
+#endif
 
 /**
- * @ingroup groupStats
+  @ingroup groupStats
  */
 
 /**
- * @defgroup Max Maximum
- *
- * Computes the maximum value of an array of data.
- * The function returns both the maximum value and its position within the array.
- * There are separate functions for floating-point, Q31, Q15, and Q7 data types.
+  @defgroup Max Maximum
+
+  Computes the maximum value of an array of data.
+  The function returns both the maximum value and its position within the array.
+  There are separate functions for floating-point, Q31, Q15, and Q7 data types.
  */
 
 /**
- * @addtogroup Max
- * @{
+  @addtogroup Max
+  @{
  */
 
-
 /**
- * @brief Maximum value of a floating-point vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult maximum value returned here
- * @param[out]      *pIndex index of maximum value returned here
- * @return none.
+  @brief         Maximum value of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @param[out]    pIndex     index of maximum value returned here
+  @return        none
  */
-
+#if defined(ARM_MATH_NEON)
 void arm_max_f32(
-  float32_t * pSrc,
+  const float32_t * pSrc,
   uint32_t blockSize,
   float32_t * pResult,
   uint32_t * pIndex)
 {
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
   float32_t maxVal1, maxVal2, out;               /* Temporary variables to store the output value. */
   uint32_t blkCnt, outIndex, count;              /* loop counter */
 
+  float32x4_t outV, srcV;
+  float32x2_t outV2;
+
+  uint32x4_t idxV;
+  uint32x4_t maxIdx={ULONG_MAX,ULONG_MAX,ULONG_MAX,ULONG_MAX};
+  uint32x4_t index={4,5,6,7};
+  uint32x4_t delta={4,4,4,4};
+  uint32x4_t countV={0,1,2,3};
+  uint32x2_t countV2;
+
   /* Initialise the count value. */
   count = 0U;
+
   /* Initialise the index value to zero. */
   outIndex = 0U;
+
+  /* Load first input value that act as reference value for comparison */
+  if (blockSize <= 3)
+  {
+      out = *pSrc++;
+
+      blkCnt = blockSize - 1;
+
+      while (blkCnt > 0U)
+      {
+        /* Initialize maxVal to the next consecutive values one by one */
+        maxVal1 = *pSrc++;
+    
+        /* compare for the maximum value */
+        if (out < maxVal1)
+        {
+          /* Update the maximum value and it's index */
+          out = maxVal1;
+          outIndex = blockSize - blkCnt;
+        }
+    
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+  }
+  else
+  {
+      outV = vld1q_f32(pSrc);
+      pSrc += 4;
+ 
+      /* Compute 4 outputs at a time */
+      blkCnt = (blockSize - 4 ) >> 2U;
+    
+      while (blkCnt > 0U)
+      {
+        srcV = vld1q_f32(pSrc);
+        pSrc += 4;
+    
+        idxV = vcgtq_f32(srcV, outV);
+        outV = vbslq_f32(idxV, srcV, outV );
+        countV = vbslq_u32(idxV, index,countV );
+    
+        index = vaddq_u32(index,delta);
+    
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+    
+      outV2 = vpmax_f32(vget_low_f32(outV),vget_high_f32(outV));
+      outV2 = vpmax_f32(outV2,outV2);
+      out = outV2[0];
+    
+      idxV = vceqq_f32(outV, vdupq_n_f32(out));
+      countV = vbslq_u32(idxV, countV,maxIdx);
+      
+      countV2 = vpmin_u32(vget_low_u32(countV),vget_high_u32(countV));
+      countV2 = vpmin_u32(countV2,countV2);
+      outIndex = countV2[0];
+    
+      /* if (blockSize - 1U) is not multiple of 4 */
+      blkCnt = (blockSize - 4 ) % 4U;
+    
+      while (blkCnt > 0U)
+      {
+        /* Initialize maxVal to the next consecutive values one by one */
+        maxVal1 = *pSrc++;
+    
+        /* compare for the maximum value */
+        if (out < maxVal1)
+        {
+          /* Update the maximum value and it's index */
+          out = maxVal1;
+          outIndex = blockSize - blkCnt ;
+        }
+    
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+    
+      
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#else
+void arm_max_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult,
+        uint32_t * pIndex)
+{
+        float32_t maxVal, out;                         /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        uint32_t index;                                /* index of maximum value */
+#endif
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+
   /* Load first input value that act as reference value for comparision */
   out = *pSrc++;
 
-  /* Loop unrolling */
+#if defined (ARM_MATH_LOOPUNROLL)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = (blockSize - 1U) >> 2U;
 
   while (blkCnt > 0U)
   {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-    maxVal2 = *pSrc++;
+    /* Initialize maxVal to next consecutive values one by one */
+    maxVal = *pSrc++;
 
     /* compare for the maximum value */
-    if (out < maxVal1)
+    if (out < maxVal)
     {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 1U;
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = index + 1U;
     }
 
-    /* compare for the maximum value */
-    if (out < maxVal2)
+    maxVal = *pSrc++;
+    if (out < maxVal)
     {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 2U;
+      out = maxVal;
+      outIndex = index + 2U;
     }
 
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if (out < maxVal1)
+    maxVal = *pSrc++;
+    if (out < maxVal)
     {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 3U;
+      out = maxVal;
+      outIndex = index + 3U;
     }
 
-    /* compare for the maximum value */
-    if (out < maxVal2)
+    maxVal = *pSrc++;
+    if (out < maxVal)
     {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 4U;
+      out = maxVal;
+      outIndex = index + 4U;
     }
 
-    count += 4U;
+    index += 4U;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* if (blockSize - 1U) is not multiple of 4 */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = (blockSize - 1U) % 4U;
 
 #else
-  /* Run the below code for Cortex-M0 */
 
-  float32_t maxVal1, out;                        /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  /* Initialise the index value to zero. */
-  outIndex = 0U;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
+  /* Initialize blkCnt with number of samples */
   blkCnt = (blockSize - 1U);
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
+    maxVal = *pSrc++;
 
     /* compare for the maximum value */
-    if (out < maxVal1)
+    if (out < maxVal)
     {
       /* Update the maximum value and it's index */
-      out = maxVal1;
+      out = maxVal;
       outIndex = blockSize - blkCnt;
     }
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
@@ -164,7 +265,7 @@
   *pResult = out;
   *pIndex = outIndex;
 }
-
+#endif /* #if defined(ARM_MATH_NEON) */
 /**
- * @} end of Max group
+  @} end of Max group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_max_q15.c b/DSP/Source/StatisticsFunctions/arm_max_q15.c
index 67d5e34..329b0c8 100644
--- a/DSP/Source/StatisticsFunctions/arm_max_q15.c
+++ b/DSP/Source/StatisticsFunctions/arm_max_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_max_q15.c
  * Description:  Maximum value of a Q15 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,126 +29,112 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupStats
+  @ingroup groupStats
  */
 
 /**
- * @addtogroup Max
- * @{
+  @addtogroup Max
+  @{
  */
 
-
 /**
- * @brief Maximum value of a Q15 vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult maximum value returned here
- * @param[out]      *pIndex index of maximum value returned here
- * @return none.
+  @brief         Maximum value of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @param[out]    pIndex     index of maximum value returned here
+  @return        none
  */
 
 void arm_max_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult,
-  uint32_t * pIndex)
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult,
+        uint32_t * pIndex)
 {
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+        q15_t maxVal, out;                             /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
 
-  q15_t maxVal1, maxVal2, out;                   /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
+        uint32_t index;                                /* index of maximum value */
+#endif
 
-  /* Initialise the count value. */
-  count = 0U;
-  /* Initialise the index value to zero. */
+  /* Initialise index value to zero. */
   outIndex = 0U;
   /* Load first input value that act as reference value for comparision */
   out = *pSrc++;
 
-  /* Loop unrolling */
+#if defined (ARM_MATH_LOOPUNROLL)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = (blockSize - 1U) >> 2U;
 
   while (blkCnt > 0U)
   {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-    maxVal2 = *pSrc++;
+    /* Initialize maxVal to next consecutive values one by one */
+    maxVal = *pSrc++;
 
     /* compare for the maximum value */
-    if (out < maxVal1)
+    if (out < maxVal)
     {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 1U;
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = index + 1U;
     }
 
-    /* compare for the maximum value */
-    if (out < maxVal2)
+    maxVal = *pSrc++;
+    if (out < maxVal)
     {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 2U;
+      out = maxVal;
+      outIndex = index + 2U;
     }
 
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if (out < maxVal1)
+    maxVal = *pSrc++;
+    if (out < maxVal)
     {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 3U;
+      out = maxVal;
+      outIndex = index + 3U;
     }
 
-    /* compare for the maximum value */
-    if (out < maxVal2)
+    maxVal = *pSrc++;
+    if (out < maxVal)
     {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 4U;
+      out = maxVal;
+      outIndex = index + 4U;
     }
 
-    count += 4U;
+    index += 4U;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* if (blockSize - 1U) is not multiple of 4 */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = (blockSize - 1U) % 4U;
 
 #else
-  /* Run the below code for Cortex-M0 */
 
-  q15_t maxVal1, out;                            /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  /* Initialise the index value to zero. */
-  outIndex = 0U;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
+  /* Initialize blkCnt with number of samples */
   blkCnt = (blockSize - 1U);
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
+    maxVal = *pSrc++;
 
     /* compare for the maximum value */
-    if (out < maxVal1)
+    if (out < maxVal)
     {
       /* Update the maximum value and it's index */
-      out = maxVal1;
+      out = maxVal;
       outIndex = blockSize - blkCnt;
     }
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
@@ -158,5 +144,5 @@
 }
 
 /**
- * @} end of Max group
+  @} end of Max group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_max_q31.c b/DSP/Source/StatisticsFunctions/arm_max_q31.c
index 5d34bbd..99de13e 100644
--- a/DSP/Source/StatisticsFunctions/arm_max_q31.c
+++ b/DSP/Source/StatisticsFunctions/arm_max_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_max_q31.c
  * Description:  Maximum value of a Q31 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,126 +29,112 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupStats
+  @ingroup groupStats
  */
 
 /**
- * @addtogroup Max
- * @{
+  @addtogroup Max
+  @{
  */
 
-
 /**
- * @brief Maximum value of a Q31 vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult maximum value returned here
- * @param[out]      *pIndex index of maximum value returned here
- * @return none.
+  @brief         Maximum value of a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @param[out]    pIndex     index of maximum value returned here
+  @return        none
  */
 
 void arm_max_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult,
-  uint32_t * pIndex)
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult,
+        uint32_t * pIndex)
 {
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+        q31_t maxVal, out;                             /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
 
-  q31_t maxVal1, maxVal2, out;                   /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
+        uint32_t index;                                /* index of maximum value */
+#endif
 
-  /* Initialise the count value. */
-  count = 0U;
-  /* Initialise the index value to zero. */
+  /* Initialise index value to zero. */
   outIndex = 0U;
   /* Load first input value that act as reference value for comparision */
   out = *pSrc++;
 
-  /* Loop unrolling */
+#if defined (ARM_MATH_LOOPUNROLL)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = (blockSize - 1U) >> 2U;
 
   while (blkCnt > 0U)
   {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-    maxVal2 = *pSrc++;
+    /* Initialize maxVal to next consecutive values one by one */
+    maxVal = *pSrc++;
 
     /* compare for the maximum value */
-    if (out < maxVal1)
+    if (out < maxVal)
     {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 1U;
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = index + 1U;
     }
 
-    /* compare for the maximum value */
-    if (out < maxVal2)
+    maxVal = *pSrc++;
+    if (out < maxVal)
     {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 2U;
+      out = maxVal;
+      outIndex = index + 2U;
     }
 
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if (out < maxVal1)
+    maxVal = *pSrc++;
+    if (out < maxVal)
     {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 3U;
+      out = maxVal;
+      outIndex = index + 3U;
     }
 
-    /* compare for the maximum value */
-    if (out < maxVal2)
+    maxVal = *pSrc++;
+    if (out < maxVal)
     {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 4U;
+      out = maxVal;
+      outIndex = index + 4U;
     }
 
-    count += 4U;
+    index += 4U;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* if (blockSize - 1U) is not multiple of 4 */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = (blockSize - 1U) % 4U;
 
 #else
-  /* Run the below code for Cortex-M0 */
 
-  q31_t maxVal1, out;                            /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  /* Initialise the index value to zero. */
-  outIndex = 0U;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
+  /* Initialize blkCnt with number of samples */
   blkCnt = (blockSize - 1U);
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
+    maxVal = *pSrc++;
 
     /* compare for the maximum value */
-    if (out < maxVal1)
+    if (out < maxVal)
     {
       /* Update the maximum value and it's index */
-      out = maxVal1;
+      out = maxVal;
       outIndex = blockSize - blkCnt;
     }
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
@@ -158,5 +144,5 @@
 }
 
 /**
- * @} end of Max group
+  @} end of Max group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_max_q7.c b/DSP/Source/StatisticsFunctions/arm_max_q7.c
index 72f6e5e..9c8b6d3 100644
--- a/DSP/Source/StatisticsFunctions/arm_max_q7.c
+++ b/DSP/Source/StatisticsFunctions/arm_max_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_max_q7.c
  * Description:  Maximum value of a Q7 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,126 +29,112 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupStats
+  @ingroup groupStats
  */
 
 /**
- * @addtogroup Max
- * @{
+  @addtogroup Max
+  @{
  */
 
-
 /**
- * @brief Maximum value of a Q7 vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult maximum value returned here
- * @param[out]      *pIndex index of maximum value returned here
- * @return none.
+  @brief         Maximum value of a Q7 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @param[out]    pIndex     index of maximum value returned here
+  @return        none
  */
 
 void arm_max_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * pResult,
-  uint32_t * pIndex)
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult,
+        uint32_t * pIndex)
 {
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+        q7_t maxVal, out;                              /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
 
-  q7_t maxVal1, maxVal2, out;                    /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
+        uint32_t index;                                /* index of maximum value */
+#endif
 
-  /* Initialise the count value. */
-  count = 0U;
-  /* Initialise the index value to zero. */
+  /* Initialise index value to zero. */
   outIndex = 0U;
   /* Load first input value that act as reference value for comparision */
   out = *pSrc++;
 
-  /* Loop unrolling */
+#if defined (ARM_MATH_LOOPUNROLL)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = (blockSize - 1U) >> 2U;
 
   while (blkCnt > 0U)
   {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-    maxVal2 = *pSrc++;
+    /* Initialize maxVal to next consecutive values one by one */
+    maxVal = *pSrc++;
 
     /* compare for the maximum value */
-    if (out < maxVal1)
+    if (out < maxVal)
     {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 1U;
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = index + 1U;
     }
 
-    /* compare for the maximum value */
-    if (out < maxVal2)
+    maxVal = *pSrc++;
+    if (out < maxVal)
     {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 2U;
+      out = maxVal;
+      outIndex = index + 2U;
     }
 
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if (out < maxVal1)
+    maxVal = *pSrc++;
+    if (out < maxVal)
     {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 3U;
+      out = maxVal;
+      outIndex = index + 3U;
     }
 
-    /* compare for the maximum value */
-    if (out < maxVal2)
+    maxVal = *pSrc++;
+    if (out < maxVal)
     {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 4U;
+      out = maxVal;
+      outIndex = index + 4U;
     }
 
-    count += 4U;
+    index += 4U;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* if (blockSize - 1U) is not multiple of 4 */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = (blockSize - 1U) % 4U;
 
 #else
-  /* Run the below code for Cortex-M0 */
 
-  q7_t maxVal1, out;                             /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  /* Initialise the index value to zero. */
-  outIndex = 0U;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
+  /* Initialize blkCnt with number of samples */
   blkCnt = (blockSize - 1U);
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
+    maxVal = *pSrc++;
 
     /* compare for the maximum value */
-    if (out < maxVal1)
+    if (out < maxVal)
     {
       /* Update the maximum value and it's index */
-      out = maxVal1;
+      out = maxVal;
       outIndex = blockSize - blkCnt;
     }
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
@@ -158,5 +144,5 @@
 }
 
 /**
- * @} end of Max group
+  @} end of Max group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_mean_f32.c b/DSP/Source/StatisticsFunctions/arm_mean_f32.c
index 85a3b16..63d9652 100644
--- a/DSP/Source/StatisticsFunctions/arm_mean_f32.c
+++ b/DSP/Source/StatisticsFunctions/arm_mean_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_mean_f32.c
  * Description:  Mean value of a floating-point vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,82 +29,70 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupStats
+  @ingroup groupStats
  */
 
 /**
- * @defgroup mean Mean
- *
- * Calculates the mean of the input vector. Mean is defined as the average of the elements in the vector.
- * The underlying algorithm is used:
- *
- * <pre>
- * 	Result = (pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]) / blockSize;
- * </pre>
- *
- * There are separate functions for floating-point, Q31, Q15, and Q7 data types.
+  @defgroup mean Mean
+
+  Calculates the mean of the input vector. Mean is defined as the average of the elements in the vector.
+  The underlying algorithm is used:
+
+  <pre>
+      Result = (pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]) / blockSize;
+  </pre>
+
+  There are separate functions for floating-point, Q31, Q15, and Q7 data types.
  */
 
 /**
- * @addtogroup mean
- * @{
+  @addtogroup mean
+  @{
  */
 
-
 /**
- * @brief Mean value of a floating-point vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult mean value returned here
- * @return none.
+  @brief         Mean value of a floating-point vector.
+  @param[in]     pSrc       points to the input vector.
+  @param[in]     blockSize  number of samples in input vector.
+  @param[out]    pResult    mean value returned here.
+  @return        none
  */
-
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
 void arm_mean_f32(
-  float32_t * pSrc,
+  const float32_t * pSrc,
   uint32_t blockSize,
   float32_t * pResult)
 {
   float32_t sum = 0.0f;                          /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
+  float32x4_t sumV = vdupq_n_f32(0.0f);                          /* Temporary result storage */
+  float32x2_t sumV2;
 
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+  uint32_t blkCnt;                               /* Loop counter */
 
   float32_t in1, in2, in3, in4;
+  float32x4_t inV;
 
-  /*loop Unrolling */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+  /* Compute 4 outputs at a time.
    ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
-
-    sum += in1;
-    sum += in2;
-    sum += in3;
-    sum += in4;
-
+    inV = vld1q_f32(pSrc);
+    sumV = vaddq_f32(sumV, inV);
+    
+    pSrc += 4;
     /* Decrement the loop counter */
     blkCnt--;
   }
 
+  sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
+  sum = sumV2[0] + sumV2[1];
+
   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
    ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4U;
-
-#else
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_DSP) */
+  blkCnt = blockSize & 3;
 
   while (blkCnt > 0U)
   {
@@ -119,7 +107,60 @@
   /* Store the result to the destination */
   *pResult = sum / (float32_t) blockSize;
 }
+#else
+void arm_mean_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t sum = 0.0f;                          /* Temporary result storage */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    sum += *pSrc++;
+
+    sum += *pSrc++;
+
+    sum += *pSrc++;
+
+    sum += *pSrc++;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    sum += *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
+  /* Store result to destination */
+  *pResult = (sum / blockSize);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
 
 /**
- * @} end of mean group
+  @} end of mean group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_mean_q15.c b/DSP/Source/StatisticsFunctions/arm_mean_q15.c
index 7bf55c2..463aa84 100644
--- a/DSP/Source/StatisticsFunctions/arm_mean_q15.c
+++ b/DSP/Source/StatisticsFunctions/arm_mean_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_mean_q15.c
  * Description:  Mean value of a Q15 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,59 +29,55 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupStats
+  @ingroup groupStats
  */
 
 /**
- * @addtogroup mean
- * @{
+  @addtogroup mean
+  @{
  */
 
-
 /**
- * @brief Mean value of a Q15 vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult mean value returned here
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using a 32-bit internal accumulator.
- * The input is represented in 1.15 format and is accumulated in a 32-bit
- * accumulator in 17.15 format.
- * There is no risk of internal overflow with this approach, and the
- * full precision of intermediate result is preserved.
- * Finally, the accumulator is saturated and truncated to yield a result of 1.15 format.
- *
+  @brief         Mean value of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    mean value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   The input is represented in 1.15 format and is accumulated in a 32-bit
+                   accumulator in 17.15 format.
+                   There is no risk of internal overflow with this approach, and the
+                   full precision of intermediate result is preserved.
+                   Finally, the accumulator is truncated to yield a result of 1.15 format.
  */
 
 void arm_mean_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult)
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
 {
-  q31_t sum = 0;                                 /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t sum = 0;                                 /* Temporary result storage */
 
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t in;
+#endif
 
-  q31_t in;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    in = *__SIMD32(pSrc)++;
+    in = read_q15x2_ia ((q15_t **) &pSrc);
     sum += ((in << 16U) >> 16U);
     sum +=  (in >> 16U);
-    in = *__SIMD32(pSrc)++;
+
+    in = read_q15x2_ia ((q15_t **) &pSrc);
     sum += ((in << 16U) >> 16U);
     sum +=  (in >> 16U);
 
@@ -89,32 +85,30 @@
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
-  /* Run the below code for Cortex-M0 */
 
-  /* Loop over blockSize number of values */
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
     sum += *pSrc++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
   /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
-  /* Store the result to the destination */
-  *pResult = (q15_t) (sum / (q31_t)blockSize);
+  /* Store result to destination */
+  *pResult = (q15_t) (sum / (int32_t) blockSize);
 }
 
 /**
- * @} end of mean group
+  @} end of mean group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_mean_q31.c b/DSP/Source/StatisticsFunctions/arm_mean_q31.c
index ea83ced..4b0ed6e 100644
--- a/DSP/Source/StatisticsFunctions/arm_mean_q31.c
+++ b/DSP/Source/StatisticsFunctions/arm_mean_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_mean_q31.c
  * Description:  Mean value of a Q31 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,95 +29,82 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupStats
+  @ingroup groupStats
  */
 
 /**
- * @addtogroup mean
- * @{
+  @addtogroup mean
+  @{
  */
 
-
 /**
- * @brief Mean value of a Q31 vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult mean value returned here
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *\par
- * The function is implemented using a 64-bit internal accumulator.
- * The input is represented in 1.31 format and is accumulated in a 64-bit
- * accumulator in 33.31 format.
- * There is no risk of internal overflow with this approach, and the
- * full precision of intermediate result is preserved.
- * Finally, the accumulator is truncated to yield a result of 1.31 format.
- *
+  @brief         Mean value of a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    mean value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   The input is represented in 1.31 format and is accumulated in a 64-bit
+                   accumulator in 33.31 format.
+                   There is no risk of internal overflow with this approach, and the
+                   full precision of intermediate result is preserved.
+                   Finally, the accumulator is truncated to yield a result of 1.31 format.
  */
 
 void arm_mean_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult)
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
 {
-  q63_t sum = 0;                                 /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Temporary result storage */
 
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  q31_t in1, in2, in3, in4;
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while (blkCnt > 0U)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
-
-    sum += in1;
-    sum += in2;
-    sum += in3;
-    sum += in4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4U;
-
-#else
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
   while (blkCnt > 0U)
   {
     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
     sum += *pSrc++;
 
+    sum += *pSrc++;
+
+    sum += *pSrc++;
+
+    sum += *pSrc++;
+
     /* Decrement the loop counter */
     blkCnt--;
   }
 
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    sum += *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
   /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
-  /* Store the result to the destination */
-  *pResult = (q31_t) (sum / (int32_t) blockSize);
+  /* Store result to destination */
+  *pResult = (q31_t) (sum / blockSize);
 }
 
 /**
- * @} end of mean group
+  @} end of mean group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_mean_q7.c b/DSP/Source/StatisticsFunctions/arm_mean_q7.c
index a7bdfb8..8f52211 100644
--- a/DSP/Source/StatisticsFunctions/arm_mean_q7.c
+++ b/DSP/Source/StatisticsFunctions/arm_mean_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_mean_q7.c
  * Description:  Mean value of a Q7 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,57 +29,51 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupStats
+  @ingroup groupStats
  */
 
 /**
- * @addtogroup mean
- * @{
+  @addtogroup mean
+  @{
  */
 
-
 /**
- * @brief Mean value of a Q7 vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult mean value returned here
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using a 32-bit internal accumulator.
- * The input is represented in 1.7 format and is accumulated in a 32-bit
- * accumulator in 25.7 format.
- * There is no risk of internal overflow with this approach, and the
- * full precision of intermediate result is preserved.
- * Finally, the accumulator is truncated to yield a result of 1.7 format.
- *
+  @brief         Mean value of a Q7 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    mean value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   The input is represented in 1.7 format and is accumulated in a 32-bit
+                   accumulator in 25.7 format.
+                   There is no risk of internal overflow with this approach, and the
+                   full precision of intermediate result is preserved.
+                   Finally, the accumulator is truncated to yield a result of 1.7 format.
  */
 
 void arm_mean_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * pResult)
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult)
 {
-  q31_t sum = 0;                                 /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t sum = 0;                                 /* Temporary result storage */
 
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t in;
+#endif
 
-  q31_t in;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    in = *__SIMD32(pSrc)++;
-
+    in = read_q7x4_ia ((q7_t **) &pSrc);
     sum += ((in << 24U) >> 24U);
     sum += ((in << 16U) >> 24U);
     sum += ((in <<  8U) >> 24U);
@@ -89,32 +83,30 @@
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
-  /* Run the below code for Cortex-M0 */
 
-  /* Loop over blockSize number of values */
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
     sum += *pSrc++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
   /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
-  /* Store the result to the destination */
+  /* Store result to destination */
   *pResult = (q7_t) (sum / (int32_t) blockSize);
 }
 
 /**
- * @} end of mean group
+  @} end of mean group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_min_f32.c b/DSP/Source/StatisticsFunctions/arm_min_f32.c
index 858b0a2..6e9ff4b 100644
--- a/DSP/Source/StatisticsFunctions/arm_min_f32.c
+++ b/DSP/Source/StatisticsFunctions/arm_min_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_min_f32.c
  * Description:  Minimum value of a floating-point vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -27,136 +27,233 @@
  */
 
 #include "arm_math.h"
+#include <limits.h>
 
 /**
- * @ingroup groupStats
+  @ingroup groupStats
  */
 
 /**
- * @defgroup Min Minimum
- *
- * Computes the minimum value of an array of data.
- * The function returns both the minimum value and its position within the array.
- * There are separate functions for floating-point, Q31, Q15, and Q7 data types.
+  @defgroup Min Minimum
+
+  Computes the minimum value of an array of data.
+  The function returns both the minimum value and its position within the array.
+  There are separate functions for floating-point, Q31, Q15, and Q7 data types.
  */
 
 /**
- * @addtogroup Min
- * @{
+  @addtogroup Min
+  @{
  */
 
-
 /**
- * @brief Minimum value of a floating-point vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult minimum value returned here
- * @param[out]      *pIndex index of minimum value returned here
- * @return none.
+  @brief         Minimum value of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @param[out]    pIndex     index of minimum value returned here
+  @return        none
  */
-
+#if defined(ARM_MATH_NEON)
 void arm_min_f32(
-  float32_t * pSrc,
+  const float32_t * pSrc,
   uint32_t blockSize,
   float32_t * pResult,
   uint32_t * pIndex)
 {
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t minVal1, minVal2, out;               /* Temporary variables to store the output value. */
+  float32_t maxVal1, maxVal2, out;               /* Temporary variables to store the output value. */
   uint32_t blkCnt, outIndex, count;              /* loop counter */
 
+  float32x4_t outV, srcV;
+  float32x2_t outV2;
+
+  uint32x4_t idxV;
+  uint32x4_t maxIdx={ULONG_MAX,ULONG_MAX,ULONG_MAX,ULONG_MAX};
+  uint32x4_t index={4,5,6,7};
+  uint32x4_t delta={4,4,4,4};
+  uint32x4_t countV={0,1,2,3};
+  uint32x2_t countV2;
+
   /* Initialise the count value. */
   count = 0U;
+
   /* Initialise the index value to zero. */
   outIndex = 0U;
+
+  /* Load first input value that act as reference value for comparison */
+  if (blockSize <= 3)
+  {
+      out = *pSrc++;
+
+      blkCnt = blockSize - 1;
+
+      while (blkCnt > 0U)
+      {
+        /* Initialize maxVal to the next consecutive values one by one */
+        maxVal1 = *pSrc++;
+    
+        /* compare for the maximum value */
+        if (out > maxVal1)
+        {
+          /* Update the maximum value and it's index */
+          out = maxVal1;
+          outIndex = blockSize - blkCnt;
+        }
+    
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+  }
+  else
+  {
+      outV = vld1q_f32(pSrc);
+      pSrc += 4;
+    
+      /* Compute 4 outputs at a time */
+      blkCnt = (blockSize - 4 ) >> 2U;
+    
+      while (blkCnt > 0U)
+      {
+        srcV = vld1q_f32(pSrc);
+        pSrc += 4;
+    
+        idxV = vcltq_f32(srcV, outV);
+        outV = vbslq_f32(idxV, srcV, outV );
+        countV = vbslq_u32(idxV, index,countV );
+    
+        index = vaddq_u32(index,delta);
+    
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+    
+      outV2 = vpmin_f32(vget_low_f32(outV),vget_high_f32(outV));
+      outV2 = vpmin_f32(outV2,outV2);
+      out = outV2[0];
+    
+      idxV = vceqq_f32(outV, vdupq_n_f32(out));
+      countV = vbslq_u32(idxV, countV,maxIdx);
+      
+      countV2 = vpmin_u32(vget_low_u32(countV),vget_high_u32(countV));
+      countV2 = vpmin_u32(countV2,countV2);
+      outIndex = countV2[0];
+    
+      /* if (blockSize - 1U) is not multiple of 4 */
+      blkCnt = (blockSize - 4 ) % 4U;
+    
+      while (blkCnt > 0U)
+      {
+        /* Initialize maxVal to the next consecutive values one by one */
+        maxVal1 = *pSrc++;
+    
+        /* compare for the maximum value */
+        if (out > maxVal1)
+        {
+          /* Update the maximum value and it's index */
+          out = maxVal1;
+          outIndex = blockSize - blkCnt ;
+        }
+    
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#else
+void arm_min_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult,
+        uint32_t * pIndex)
+{
+        float32_t minVal, out;                         /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        uint32_t index;                                /* index of maximum value */
+#endif
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+
   /* Load first input value that act as reference value for comparision */
   out = *pSrc++;
 
-  /* Loop unrolling */
+#if defined (ARM_MATH_LOOPUNROLL)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = (blockSize - 1U) >> 2U;
 
   while (blkCnt > 0U)
   {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-    minVal2 = *pSrc++;
+    /* Initialize minVal to next consecutive values one by one */
+    minVal = *pSrc++;
 
     /* compare for the minimum value */
-    if (out > minVal1)
+    if (out > minVal)
     {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 1U;
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = index + 1U;
     }
 
-    /* compare for the minimum value */
-    if (out > minVal2)
+    minVal = *pSrc++;
+    if (out > minVal)
     {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 2U;
+      out = minVal;
+      outIndex = index + 2U;
     }
 
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if (out > minVal1)
+    minVal = *pSrc++;
+    if (out > minVal)
     {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 3U;
+      out = minVal;
+      outIndex = index + 3U;
     }
 
-    /* compare for the minimum value */
-    if (out > minVal2)
+    minVal = *pSrc++;
+    if (out > minVal)
     {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 4U;
+      out = minVal;
+      outIndex = index + 4U;
     }
 
-    count += 4U;
+    index += 4U;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* if (blockSize - 1U) is not multiple of 4 */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = (blockSize - 1U) % 4U;
 
 #else
-  /* Run the below code for Cortex-M0 */
 
-  float32_t minVal1, out;                        /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  /* Initialise the index value to zero. */
-  outIndex = 0U;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
+  /* Initialize blkCnt with number of samples */
   blkCnt = (blockSize - 1U);
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
+    minVal = *pSrc++;
 
     /* compare for the minimum value */
-    if (out > minVal1)
+    if (out > minVal)
     {
       /* Update the minimum value and it's index */
-      out = minVal1;
+      out = minVal;
       outIndex = blockSize - blkCnt;
     }
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
@@ -164,7 +261,8 @@
   *pResult = out;
   *pIndex = outIndex;
 }
+#endif /* #if defined(ARM_MATH_NEON) */
 
 /**
- * @} end of Min group
+  @} end of Min group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_min_q15.c b/DSP/Source/StatisticsFunctions/arm_min_q15.c
index fdc32b7..9450383 100644
--- a/DSP/Source/StatisticsFunctions/arm_min_q15.c
+++ b/DSP/Source/StatisticsFunctions/arm_min_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_min_q15.c
  * Description:  Minimum value of a Q15 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,127 +29,113 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupStats
+  @ingroup groupStats
  */
 
 
 /**
- * @addtogroup Min
- * @{
+  @addtogroup Min
+  @{
  */
 
-
 /**
- * @brief Minimum value of a Q15 vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult minimum value returned here
- * @param[out]      *pIndex index of minimum value returned here
- * @return none.
+  @brief         Minimum value of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @param[out]    pIndex     index of minimum value returned here
+  @return        none
  */
 
 void arm_min_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult,
-  uint32_t * pIndex)
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult,
+        uint32_t * pIndex)
 {
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+        q15_t minVal, out;                             /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
 
-  q15_t minVal1, minVal2, out;                   /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
+        uint32_t index;                                /* index of maximum value */
+#endif
 
-  /* Initialise the count value. */
-  count = 0U;
-  /* Initialise the index value to zero. */
+  /* Initialise index value to zero. */
   outIndex = 0U;
   /* Load first input value that act as reference value for comparision */
   out = *pSrc++;
 
-  /* Loop unrolling */
+#if defined (ARM_MATH_LOOPUNROLL)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = (blockSize - 1U) >> 2U;
 
   while (blkCnt > 0U)
   {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-    minVal2 = *pSrc++;
+    /* Initialize minVal to next consecutive values one by one */
+    minVal = *pSrc++;
 
     /* compare for the minimum value */
-    if (out > minVal1)
+    if (out > minVal)
     {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 1U;
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = index + 1U;
     }
 
-    /* compare for the minimum value */
-    if (out > minVal2)
+    minVal = *pSrc++;
+    if (out > minVal)
     {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 2U;
+      out = minVal;
+      outIndex = index + 2U;
     }
 
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if (out > minVal1)
+    minVal = *pSrc++;
+    if (out > minVal)
     {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 3U;
+      out = minVal;
+      outIndex = index + 3U;
     }
 
-    /* compare for the minimum value */
-    if (out > minVal2)
+    minVal = *pSrc++;
+    if (out > minVal)
     {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 4U;
+      out = minVal;
+      outIndex = index + 4U;
     }
 
-    count += 4U;
+    index += 4U;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* if (blockSize - 1U) is not multiple of 4 */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = (blockSize - 1U) % 4U;
 
 #else
-  /* Run the below code for Cortex-M0 */
 
-  q15_t minVal1, out;                            /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  /* Initialise the index value to zero. */
-  outIndex = 0U;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
+  /* Initialize blkCnt with number of samples */
   blkCnt = (blockSize - 1U);
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
+    minVal = *pSrc++;
 
     /* compare for the minimum value */
-    if (out > minVal1)
+    if (out > minVal)
     {
       /* Update the minimum value and it's index */
-      out = minVal1;
+      out = minVal;
       outIndex = blockSize - blkCnt;
     }
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
@@ -159,5 +145,5 @@
 }
 
 /**
- * @} end of Min group
+  @} end of Min group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_min_q31.c b/DSP/Source/StatisticsFunctions/arm_min_q31.c
index fc4c155..e25eb47 100644
--- a/DSP/Source/StatisticsFunctions/arm_min_q31.c
+++ b/DSP/Source/StatisticsFunctions/arm_min_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_min_q31.c
  * Description:  Minimum value of a Q31 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,127 +29,113 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupStats
+  @ingroup groupStats
  */
 
 
 /**
- * @addtogroup Min
- * @{
+  @addtogroup Min
+  @{
  */
 
-
 /**
- * @brief Minimum value of a Q31 vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult minimum value returned here
- * @param[out]      *pIndex index of minimum value returned here
- * @return none.
+  @brief         Minimum value of a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @param[out]    pIndex     index of minimum value returned here
+  @return        none
  */
 
 void arm_min_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult,
-  uint32_t * pIndex)
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult,
+        uint32_t * pIndex)
 {
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+        q31_t minVal, out;                             /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
 
-  q31_t minVal1, minVal2, out;                   /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
+        uint32_t index;                                /* index of maximum value */
+#endif
 
-  /* Initialise the count value. */
-  count = 0U;
-  /* Initialise the index value to zero. */
+  /* Initialise index value to zero. */
   outIndex = 0U;
   /* Load first input value that act as reference value for comparision */
   out = *pSrc++;
 
-  /* Loop unrolling */
+#if defined (ARM_MATH_LOOPUNROLL)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = (blockSize - 1U) >> 2U;
 
   while (blkCnt > 0U)
   {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-    minVal2 = *pSrc++;
+    /* Initialize minVal to next consecutive values one by one */
+    minVal = *pSrc++;
 
     /* compare for the minimum value */
-    if (out > minVal1)
+    if (out > minVal)
     {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 1U;
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = index + 1U;
     }
 
-    /* compare for the minimum value */
-    if (out > minVal2)
+    minVal = *pSrc++;
+    if (out > minVal)
     {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 2U;
+      out = minVal;
+      outIndex = index + 2U;
     }
 
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if (out > minVal1)
+    minVal = *pSrc++;
+    if (out > minVal)
     {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 3U;
+      out = minVal;
+      outIndex = index + 3U;
     }
 
-    /* compare for the minimum value */
-    if (out > minVal2)
+    minVal = *pSrc++;
+    if (out > minVal)
     {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 4U;
+      out = minVal;
+      outIndex = index + 4U;
     }
 
-    count += 4U;
+    index += 4U;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* if (blockSize - 1U) is not multiple of 4 */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = (blockSize - 1U) % 4U;
 
 #else
-  /* Run the below code for Cortex-M0 */
 
-  q31_t minVal1, out;                            /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  /* Initialise the index value to zero. */
-  outIndex = 0U;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
+  /* Initialize blkCnt with number of samples */
   blkCnt = (blockSize - 1U);
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
+    minVal = *pSrc++;
 
     /* compare for the minimum value */
-    if (out > minVal1)
+    if (out > minVal)
     {
       /* Update the minimum value and it's index */
-      out = minVal1;
+      out = minVal;
       outIndex = blockSize - blkCnt;
     }
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
@@ -159,5 +145,5 @@
 }
 
 /**
- * @} end of Min group
+  @} end of Min group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_min_q7.c b/DSP/Source/StatisticsFunctions/arm_min_q7.c
index 50362e6..2b171f0 100644
--- a/DSP/Source/StatisticsFunctions/arm_min_q7.c
+++ b/DSP/Source/StatisticsFunctions/arm_min_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_min_q7.c
  * Description:  Minimum value of a Q7 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,127 +29,113 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupStats
+  @ingroup groupStats
  */
 
 
 /**
- * @addtogroup Min
- * @{
+  @addtogroup Min
+  @{
  */
 
-
 /**
- * @brief Minimum value of a Q7 vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult minimum value returned here
- * @param[out]      *pIndex index of minimum value returned here
- * @return none.
+  @brief         Minimum value of a Q7 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @param[out]    pIndex     index of minimum value returned here
+  @return        none
  */
 
 void arm_min_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * pResult,
-  uint32_t * pIndex)
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult,
+        uint32_t * pIndex)
 {
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+        q7_t minVal, out;                              /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
 
-  q7_t minVal1, minVal2, out;                    /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
+        uint32_t index;                                /* index of maximum value */
+#endif
 
-  /* Initialise the count value. */
-  count = 0U;
-  /* Initialise the index value to zero. */
+  /* Initialise index value to zero. */
   outIndex = 0U;
   /* Load first input value that act as reference value for comparision */
   out = *pSrc++;
 
-  /* Loop unrolling */
+#if defined (ARM_MATH_LOOPUNROLL)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = (blockSize - 1U) >> 2U;
 
   while (blkCnt > 0U)
   {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-    minVal2 = *pSrc++;
+    /* Initialize minVal to next consecutive values one by one */
+    minVal = *pSrc++;
 
     /* compare for the minimum value */
-    if (out > minVal1)
+    if (out > minVal)
     {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 1U;
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = index + 1U;
     }
 
-    /* compare for the minimum value */
-    if (out > minVal2)
+    minVal = *pSrc++;
+    if (out > minVal)
     {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 2U;
+      out = minVal;
+      outIndex = index + 2U;
     }
 
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if (out > minVal1)
+    minVal = *pSrc++;
+    if (out > minVal)
     {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 3U;
+      out = minVal;
+      outIndex = index + 3U;
     }
 
-    /* compare for the minimum value */
-    if (out > minVal2)
+    minVal = *pSrc++;
+    if (out > minVal)
     {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 4U;
+      out = minVal;
+      outIndex = index + 4U;
     }
 
-    count += 4U;
+    index += 4U;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* if (blockSize - 1U) is not multiple of 4 */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = (blockSize - 1U) % 4U;
 
 #else
-  /* Run the below code for Cortex-M0 */
 
-  q7_t minVal1, out;                             /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  /* Initialise the index value to zero. */
-  outIndex = 0U;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
+  /* Initialize blkCnt with number of samples */
   blkCnt = (blockSize - 1U);
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
+    minVal = *pSrc++;
 
     /* compare for the minimum value */
-    if (out > minVal1)
+    if (out > minVal)
     {
       /* Update the minimum value and it's index */
-      out = minVal1;
+      out = minVal;
       outIndex = blockSize - blkCnt;
     }
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
@@ -159,5 +145,5 @@
 }
 
 /**
- * @} end of Min group
+  @} end of Min group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_power_f32.c b/DSP/Source/StatisticsFunctions/arm_power_f32.c
index 1426735..a4825a5 100644
--- a/DSP/Source/StatisticsFunctions/arm_power_f32.c
+++ b/DSP/Source/StatisticsFunctions/arm_power_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_power_f32.c
  * Description:  Sum of the squares of the elements of a floating-point vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,40 +29,37 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupStats
+  @ingroup groupStats
  */
 
 /**
- * @defgroup power Power
- *
- * Calculates the sum of the squares of the elements in the input vector.
- * The underlying algorithm is used:
- *
- * <pre>
- * 	Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];
- * </pre>
- *
- * There are separate functions for floating point, Q31, Q15, and Q7 data types.
+  @defgroup power Power
+
+  Calculates the sum of the squares of the elements in the input vector.
+  The underlying algorithm is used:
+
+  <pre>
+      Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];
+  </pre>
+
+  There are separate functions for floating point, Q31, Q15, and Q7 data types.
  */
 
 /**
- * @addtogroup power
- * @{
+  @addtogroup power
+  @{
  */
 
-
 /**
- * @brief Sum of the squares of the elements of a floating-point vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult sum of the squares value returned here
- * @return none.
- *
+  @brief         Sum of the squares of the elements of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    sum of the squares value returned here
+  @return        none
  */
-
-
+#if defined(ARM_MATH_NEON)
 void arm_power_f32(
-  float32_t * pSrc,
+  const float32_t * pSrc,
   uint32_t blockSize,
   float32_t * pResult)
 {
@@ -70,45 +67,32 @@
   float32_t in;                                  /* Temporary variable to store input value */
   uint32_t blkCnt;                               /* loop counter */
 
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+  float32x4_t sumV = vdupq_n_f32(0.0f);                          /* Temporary result storage */
+  float32x2_t sumV2;
+  float32x4_t inV;
 
-  /*loop Unrolling */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+  /* Compute 4 outputs at a time.
    ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
     /* Compute Power and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
+    inV = vld1q_f32(pSrc);
+    sumV = vmlaq_f32(sumV, inV, inV);
+    pSrc += 4;
 
     /* Decrement the loop counter */
     blkCnt--;
   }
+  sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
+  sum = sumV2[0] + sumV2[1];
 
   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
    ** No loop unrolling is used. */
   blkCnt = blockSize % 0x4U;
 
-
-#else
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-
   while (blkCnt > 0U)
   {
     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
@@ -123,7 +107,69 @@
   /* Store the result to the destination */
   *pResult = sum;
 }
+#else
+void arm_power_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t sum = 0.0f;                          /* Temporary result storage */
+        float32_t in;                                  /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power and store result in a temporary variable, sum. */
+    in = *pSrc++;
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power and store result in a temporary variable, sum. */
+    in = *pSrc++;
+    sum += in * in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store result to destination */
+  *pResult = sum;
+}
+#endif /* #if defined(ARM_MATH_NEON) */
 
 /**
- * @} end of power group
+  @} end of power group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_power_q15.c b/DSP/Source/StatisticsFunctions/arm_power_q15.c
index 6d95f4d..12f524d 100644
--- a/DSP/Source/StatisticsFunctions/arm_power_q15.c
+++ b/DSP/Source/StatisticsFunctions/arm_power_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_power_q15.c
  * Description:  Sum of the squares of the elements of a Q15 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,110 +29,104 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupStats
+  @ingroup groupStats
  */
 
 /**
- * @addtogroup power
- * @{
+  @addtogroup power
+  @{
  */
 
 /**
- * @brief Sum of the squares of the elements of a Q15 vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult sum of the squares value returned here
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * The input is represented in 1.15 format.
- * Intermediate multiplication yields a 2.30 format, and this
- * result is added without saturation to a 64-bit accumulator in 34.30 format.
- * With 33 guard bits in the accumulator, there is no risk of overflow, and the
- * full precision of the intermediate multiplication is preserved.
- * Finally, the return result is in 34.30 format.
- *
+  @brief         Sum of the squares of the elements of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    sum of the squares value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   The input is represented in 1.15 format.
+                   Intermediate multiplication yields a 2.30 format, and this
+                   result is added without saturation to a 64-bit accumulator in 34.30 format.
+                   With 33 guard bits in the accumulator, there is no risk of overflow, and the
+                   full precision of the intermediate multiplication is preserved.
+                   Finally, the return result is in 34.30 format.
  */
 
 void arm_power_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q63_t * pResult)
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q63_t * pResult)
 {
-  q63_t sum = 0;                                 /* Temporary result storage */
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Temporary result storage */
+        q15_t in;                                      /* Temporary variable to store input value */
 
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in32;                                    /* Temporary variable to store packed input value */
+#endif
 
-  q31_t in32;                                    /* Temporary variable to store input value */
-  q15_t in16;                                    /* Temporary variable to store input value */
-  uint32_t blkCnt;                               /* loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
 
-
-  /* loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
-    in32 = *__SIMD32(pSrc)++;
-    sum = __SMLALD(in32, in32, sum);
-    in32 = *__SIMD32(pSrc)++;
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power and store result in a temporary variable, sum. */
+#if defined (ARM_MATH_DSP)
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
     sum = __SMLALD(in32, in32, sum);
 
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
-    in16 = *pSrc++;
-    sum = __SMLALD(in16, in16, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    sum = __SMLALD(in32, in32, sum);
 #else
-  /* Run the below code for Cortex-M0 */
-
-  q15_t in;                                      /* Temporary variable to store input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
     in = *pSrc++;
     sum += ((q31_t) in * in);
 
-    /* Decrement the loop counter */
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
 
-  /* Store the results in 34.30 format  */
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power and store result in a temporary variable, sum. */
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store result in 34.30 format */
   *pResult = sum;
 }
 
 /**
- * @} end of power group
+  @} end of power group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_power_q31.c b/DSP/Source/StatisticsFunctions/arm_power_q31.c
index 16be249..1e193b3 100644
--- a/DSP/Source/StatisticsFunctions/arm_power_q31.c
+++ b/DSP/Source/StatisticsFunctions/arm_power_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_power_q31.c
  * Description:  Sum of the squares of the elements of a Q31 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,58 +29,51 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupStats
+  @ingroup groupStats
  */
 
 /**
- * @addtogroup power
- * @{
+  @addtogroup power
+  @{
  */
 
 /**
- * @brief Sum of the squares of the elements of a Q31 vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult sum of the squares value returned here
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * The input is represented in 1.31 format.
- * Intermediate multiplication yields a 2.62 format, and this
- * result is truncated to 2.48 format by discarding the lower 14 bits.
- * The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
- * With 15 guard bits in the accumulator, there is no risk of overflow, and the
- * full precision of the intermediate multiplication is preserved.
- * Finally, the return result is in 16.48 format.
- *
+  @brief         Sum of the squares of the elements of a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    sum of the squares value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   The input is represented in 1.31 format.
+                   Intermediate multiplication yields a 2.62 format, and this
+                   result is truncated to 2.48 format by discarding the lower 14 bits.
+                   The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
+                   With 15 guard bits in the accumulator, there is no risk of overflow, and the
+                   full precision of the intermediate multiplication is preserved.
+                   Finally, the return result is in 16.48 format.
  */
 
 void arm_power_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q63_t * pResult)
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q63_t * pResult)
 {
-  q63_t sum = 0;                                 /* Temporary result storage */
-  q31_t in;
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Temporary result storage */
+        q31_t in;                                      /* Temporary variable to store input value */
 
+#if defined (ARM_MATH_LOOPUNROLL)
 
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power then shift intermediate results by 14 bits to maintain 16.48 format and then store the result in a temporary variable sum, providing 15 guard bits. */
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power then shift intermediate results by 14 bits to maintain 16.48 format and store result in a temporary variable sum, providing 15 guard bits. */
     in = *pSrc++;
     sum += ((q63_t) in * in) >> 14U;
 
@@ -93,37 +86,36 @@
     in = *pSrc++;
     sum += ((q63_t) in * in) >> 14U;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
-  /* Run the below code for Cortex-M0 */
 
-  /* Loop over blockSize number of values */
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power and store result in a temporary variable, sum. */
     in = *pSrc++;
     sum += ((q63_t) in * in) >> 14U;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* Store the results in 16.48 format  */
+  /* Store results in 16.48 format */
   *pResult = sum;
 }
 
 /**
- * @} end of power group
+  @} end of power group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_power_q7.c b/DSP/Source/StatisticsFunctions/arm_power_q7.c
index 24306cd..47405cd 100644
--- a/DSP/Source/StatisticsFunctions/arm_power_q7.c
+++ b/DSP/Source/StatisticsFunctions/arm_power_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_power_q7.c
  * Description:  Sum of the squares of the elements of a Q7 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,99 +29,108 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupStats
+  @ingroup groupStats
  */
 
 /**
- * @addtogroup power
- * @{
+  @addtogroup power
+  @{
  */
 
 /**
- * @brief Sum of the squares of the elements of a Q7 vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult sum of the squares value returned here
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 32-bit internal accumulator.
- * The input is represented in 1.7 format.
- * Intermediate multiplication yields a 2.14 format, and this
- * result is added without saturation to an accumulator in 18.14 format.
- * With 17 guard bits in the accumulator, there is no risk of overflow, and the
- * full precision of the intermediate multiplication is preserved.
- * Finally, the return result is in 18.14 format.
- *
+  @brief         Sum of the squares of the elements of a Q7 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    sum of the squares value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   The input is represented in 1.7 format.
+                   Intermediate multiplication yields a 2.14 format, and this
+                   result is added without saturation to an accumulator in 18.14 format.
+                   With 17 guard bits in the accumulator, there is no risk of overflow, and the
+                   full precision of the intermediate multiplication is preserved.
+                   Finally, the return result is in 18.14 format.
  */
 
 void arm_power_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult)
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
 {
-  q31_t sum = 0;                                 /* Temporary result storage */
-  q7_t in;                                       /* Temporary variable to store input */
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t sum = 0;                                 /* Temporary result storage */
+        q7_t in;                                       /* Temporary variable to store input value */
 
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in32;                                    /* Temporary variable to store packed input value */
+        q31_t in1, in2;                                /* Temporary variables to store input value */
+#endif
 
-  q31_t input1;                                  /* Temporary variable to store packed input */
-  q31_t in1, in2;                                /* Temporary variables to store input */
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* Reading two inputs of pSrc vector and packing */
-    input1 = *__SIMD32(pSrc)++;
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
 
-    in1 = __SXTB16(__ROR(input1, 8));
-    in2 = __SXTB16(input1);
+    /* Compute Power and store result in a temporary variable, sum. */
+#if defined (ARM_MATH_DSP)
+    in32 = read_q7x4_ia ((q7_t **) &pSrc);
 
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
+    in1 = __SXTB16(__ROR(in32, 8));
+    in2 = __SXTB16(in32);
+
     /* calculate power and accumulate to accumulator */
     sum = __SMLAD(in1, in1, sum);
     sum = __SMLAD(in2, in2, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4U;
-
 #else
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
     in = *pSrc++;
     sum += ((q15_t) in * in);
 
-    /* Decrement the loop counter */
+    in = *pSrc++;
+    sum += ((q15_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q15_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q15_t) in * in);
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* Store the result in 18.14 format  */
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power and store result in a temporary variable, sum. */
+    in = *pSrc++;
+    sum += ((q15_t) in * in);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store result in 18.14 format */
   *pResult = sum;
 }
 
 /**
- * @} end of power group
+  @} end of power group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_rms_f32.c b/DSP/Source/StatisticsFunctions/arm_rms_f32.c
index 8d1b708..4546510 100644
--- a/DSP/Source/StatisticsFunctions/arm_rms_f32.c
+++ b/DSP/Source/StatisticsFunctions/arm_rms_f32.c
@@ -1,15 +1,15 @@
 /* ----------------------------------------------------------------------
  * Project:      CMSIS DSP Library
  * Title:        arm_rms_f32.c
- * Description:  Root mean square value of an array of F32 type
+ * Description:  Root mean square value of the elements of a floating-point vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,88 +29,75 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupStats
+  @ingroup groupStats
  */
 
 /**
- * @defgroup RMS Root mean square (RMS)
- *
- *
- * Calculates the Root Mean Sqaure of the elements in the input vector.
- * The underlying algorithm is used:
- *
- * <pre>
- * 	Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));
- * </pre>
- *
- * There are separate functions for floating point, Q31, and Q15 data types.
+  @defgroup RMS Root mean square (RMS)
+
+  Calculates the Root Mean Square of the elements in the input vector.
+  The underlying algorithm is used:
+
+  <pre>
+      Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));
+  </pre>
+
+  There are separate functions for floating point, Q31, and Q15 data types.
  */
 
 /**
- * @addtogroup RMS
- * @{
+  @addtogroup RMS
+  @{
  */
 
-
 /**
- * @brief Root Mean Square of the elements of a floating-point vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult rms value returned here
- * @return none.
- *
+  @brief         Root Mean Square of the elements of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    root mean square value returned here
+  @return        none
  */
-
+#if defined(ARM_MATH_NEON)
 void arm_rms_f32(
-  float32_t * pSrc,
+  const float32_t * pSrc,
   uint32_t blockSize,
   float32_t * pResult)
 {
-  float32_t sum = 0.0f;                          /* Accumulator */
-  float32_t in;                                  /* Tempoprary variable to store input value */
+  float32_t sum = 0.0f;                          /* accumulator */
+  float32_t in;                                  /* Temporary variable to store input value */
   uint32_t blkCnt;                               /* loop counter */
 
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+  float32x4_t sumV = vdupq_n_f32(0.0f);                          /* Temporary result storage */
+  float32x2_t sumV2;
+  float32x4_t inV;
 
-  /* loop Unrolling */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+  /* Compute 4 outputs at a time.
    ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute sum of the squares and then store the result in a temporary variable, sum  */
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
+    /* Compute Power and then store the result in a temporary variable, sum. */
+    inV = vld1q_f32(pSrc);
+    sumV = vmlaq_f32(sumV, inV, inV);
+    pSrc += 4;
 
     /* Decrement the loop counter */
     blkCnt--;
   }
 
+  sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
+  sum = sumV2[0] + sumV2[1];
+
   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
    ** No loop unrolling is used. */
   blkCnt = blockSize % 0x4U;
 
-#else
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
   while (blkCnt > 0U)
   {
     /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute sum of the squares and then store the results in a temporary variable, sum  */
+    /* compute power and then store the result in a temporary variable, sum. */
     in = *pSrc++;
     sum += in * in;
 
@@ -121,7 +108,69 @@
   /* Compute Rms and store the result in the destination */
   arm_sqrt_f32(sum / (float32_t) blockSize, pResult);
 }
+#else
+void arm_rms_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t sum = 0.0f;                          /* Temporary result storage */
+        float32_t in;                                  /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable, sum. */
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable. */
+    sum += ( in * in);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Compute Rms and store result in destination */
+  arm_sqrt_f32(sum / (float32_t) blockSize, pResult);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
 
 /**
- * @} end of RMS group
+  @} end of RMS group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_rms_q15.c b/DSP/Source/StatisticsFunctions/arm_rms_q15.c
index d0e61ca..9fcd964 100644
--- a/DSP/Source/StatisticsFunctions/arm_rms_q15.c
+++ b/DSP/Source/StatisticsFunctions/arm_rms_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_rms_q15.c
  * Description:  Root Mean Square of the elements of a Q15 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,111 +29,106 @@
 #include "arm_math.h"
 
 /**
- * @addtogroup RMS
- * @{
+  @ingroup groupStats
  */
 
 /**
- * @brief Root Mean Square of the elements of a Q15 vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult rms value returned here
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * The input is represented in 1.15 format.
- * Intermediate multiplication yields a 2.30 format, and this
- * result is added without saturation to a 64-bit accumulator in 34.30 format.
- * With 33 guard bits in the accumulator, there is no risk of overflow, and the
- * full precision of the intermediate multiplication is preserved.
- * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
- * 15 bits, and then saturated to yield a result in 1.15 format.
- *
+  @addtogroup RMS
+  @{
+ */
+
+/**
+  @brief         Root Mean Square of the elements of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    root mean square value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   The input is represented in 1.15 format.
+                   Intermediate multiplication yields a 2.30 format, and this
+                   result is added without saturation to a 64-bit accumulator in 34.30 format.
+                   With 33 guard bits in the accumulator, there is no risk of overflow, and the
+                   full precision of the intermediate multiplication is preserved.
+                   Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
+                   15 bits, and then saturated to yield a result in 1.15 format.
  */
 
 void arm_rms_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult)
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
 {
-  q63_t sum = 0;                                 /* accumulator */
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Temporary result storage */
+        q15_t in;                                      /* Temporary variable to store input value */
 
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in32;                                    /* Temporary variable to store input value */
+#endif
 
-  q31_t in;                                      /* temporary variable to store the input value */
-  q15_t in1;                                     /* temporary variable to store the input value */
-  uint32_t blkCnt;                               /* loop counter */
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute sum of the squares and then store the results in a temporary variable, sum */
-    in = *__SIMD32(pSrc)++;
-    sum = __SMLALD(in, in, sum);
-    in = *__SIMD32(pSrc)++;
-    sum = __SMLALD(in, in, sum);
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
 
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
+    /* Compute sum of squares and store result in a temporary variable. */
+#if defined (ARM_MATH_DSP)
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    sum = __SMLALD(in32, in32, sum);
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute sum of the squares and then store the results in a temporary variable, sum */
-    in1 = *pSrc++;
-    sum = __SMLALD(in1, in1, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Truncating and saturating the accumulator to 1.15 format */
-  /* Store the result in the destination */
-  arm_sqrt_q15(__SSAT((sum / (q63_t)blockSize) >> 15, 16), pResult);
-
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    sum = __SMLALD(in32, in32, sum);
 #else
-  /* Run the below code for Cortex-M0 */
-
-  q15_t in;                                      /* temporary variable to store the input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while (blkCnt > 0U)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute sum of the squares and then store the results in a temporary variable, sum */
     in = *pSrc++;
     sum += ((q31_t) in * in);
 
-    /* Decrement the loop counter */
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable. */
+    sum += ((q31_t) in * in);
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
   /* Truncating and saturating the accumulator to 1.15 format */
-  /* Store the result in the destination */
+  /* Store result in destination */
   arm_sqrt_q15(__SSAT((sum / (q63_t)blockSize) >> 15, 16), pResult);
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
 }
 
 /**
- * @} end of RMS group
+  @} end of RMS group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_rms_q31.c b/DSP/Source/StatisticsFunctions/arm_rms_q31.c
index cb3c58e..5a3e8f3 100644
--- a/DSP/Source/StatisticsFunctions/arm_rms_q31.c
+++ b/DSP/Source/StatisticsFunctions/arm_rms_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_rms_q31.c
  * Description:  Root Mean Square of the elements of a Q31 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,109 +29,96 @@
 #include "arm_math.h"
 
 /**
- * @addtogroup RMS
- * @{
+  @ingroup groupStats
  */
 
+/**
+  @addtogroup RMS
+  @{
+ */
 
 /**
- * @brief Root Mean Square of the elements of a Q31 vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult rms value returned here
- * @return none.
- *
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- *\par
- * The function is implemented using an internal 64-bit accumulator.
- * The input is represented in 1.31 format, and intermediate multiplication
- * yields a 2.62 format.
- * The accumulator maintains full precision of the intermediate multiplication results,
- * but provides only a single guard bit.
- * There is no saturation on intermediate additions.
- * If the accumulator overflows, it wraps around and distorts the result.
- * In order to avoid overflows completely, the input signal must be scaled down by
- * log2(blockSize) bits, as a total of blockSize additions are performed internally.
- * Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.
- *
+  @brief         Root Mean Square of the elements of a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    root mean square value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The input is represented in 1.31 format, and intermediate multiplication
+                   yields a 2.62 format.
+                   The accumulator maintains full precision of the intermediate multiplication results,
+                   but provides only a single guard bit.
+                   There is no saturation on intermediate additions.
+                   If the accumulator overflows, it wraps around and distorts the result.
+                   In order to avoid overflows completely, the input signal must be scaled down by
+                   log2(blockSize) bits, as a total of blockSize additions are performed internally.
+                   Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.
  */
 
 void arm_rms_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult)
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
 {
-  q63_t sum = 0;                                 /* accumulator */
-  q31_t in;                                      /* Temporary variable to store the input */
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+        uint64_t sum = 0;                              /* Temporary result storage (can get never negative. changed type from q63 to uint64 */
+        q31_t in;                                      /* Temporary variable to store input value */
 
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  q31_t in1, in2, in3, in4;                      /* Temporary input variables */
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 8 outputs at a time.
-   ** a second loop below computes the remaining 1 to 7 samples. */
   while (blkCnt > 0U)
   {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute sum of the squares and then store the result in a temporary variable, sum */
-    /* read two samples from source buffer */
-    in1 = pSrc[0];
-    in2 = pSrc[1];
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
 
-    /* calculate power and accumulate to accumulator */
-    sum += (q63_t) in1 *in1;
-    sum += (q63_t) in2 *in2;
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable, sum. */
+    sum += ((q63_t) in * in);
 
-    /* read two samples from source buffer */
-    in3 = pSrc[2];
-    in4 = pSrc[3];
+    in = *pSrc++;
+    sum += ((q63_t) in * in);
 
-    /* calculate power and accumulate to accumulator */
-    sum += (q63_t) in3 *in3;
-    sum += (q63_t) in4 *in4;
+    in = *pSrc++;
+    sum += ((q63_t) in * in);
 
+    in = *pSrc++;
+    sum += ((q63_t) in * in);
 
-    /* update source buffer to process next samples */
-    pSrc += 4U;
-
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 8, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
-  /* Run the below code for Cortex-M0 */
 
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute sum of the squares and then store the results in a temporary variable, sum */
-    in = *pSrc++;
-    sum += (q63_t) in *in;
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
 
-    /* Decrement the loop counter */
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable. */
+    sum += ((q63_t) in * in);
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
   /* Convert data in 2.62 to 1.31 by 31 right shifts and saturate */
-  /* Compute Rms and store the result in the destination vector */
+  /* Compute Rms and store result in destination vector */
   arm_sqrt_q31(clip_q63_to_q31((sum / (q63_t) blockSize) >> 31), pResult);
 }
 
 /**
- * @} end of RMS group
+  @} end of RMS group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_std_f32.c b/DSP/Source/StatisticsFunctions/arm_std_f32.c
index 9750b88..e1e6577 100644
--- a/DSP/Source/StatisticsFunctions/arm_std_f32.c
+++ b/DSP/Source/StatisticsFunctions/arm_std_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_std_f32.c
  * Description:  Standard deviation of the elements of a floating-point vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,111 +29,131 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupStats
+  @ingroup groupStats
  */
 
 /**
- * @defgroup STD Standard deviation
- *
- * Calculates the standard deviation of the elements in the input vector.
- * The underlying algorithm is used:
- *
- * <pre>
- *   Result = sqrt((sumOfSquares - sum<sup>2</sup> / blockSize) / (blockSize - 1))
- *
- *     where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]
- *
- *                     sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]
- * </pre>
- *
- * There are separate functions for floating point, Q31, and Q15 data types.
+  @defgroup STD Standard deviation
+
+  Calculates the standard deviation of the elements in the input vector.
+  The underlying algorithm is used:
+
+  <pre>
+      Result = sqrt((sumOfSquares - sum<sup>2</sup> / blockSize) / (blockSize - 1))
+
+      sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]
+      sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]
+  </pre>
+
+  There are separate functions for floating point, Q31, and Q15 data types.
  */
 
 /**
- * @addtogroup STD
- * @{
+  @addtogroup STD
+  @{
  */
 
-
 /**
- * @brief Standard deviation of the elements of a floating-point vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult standard deviation value returned here
- * @return none.
+  @brief         Standard deviation of the elements of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    standard deviation value returned here
+  @return        none
  */
-
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
 void arm_std_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult)
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult)
 {
-  float32_t sum = 0.0f;                          /* Temporary result storage */
-  float32_t sumOfSquares = 0.0f;                 /* Sum of squares */
-  float32_t in;                                  /* input value */
-  uint32_t blkCnt;                               /* loop counter */
-#if defined (ARM_MATH_DSP)
-  float32_t meanOfSquares, mean, squareOfMean;   /* Temporary variables */
+  float32_t var;
+  arm_var_f32(pSrc,blockSize,&var);
+  arm_sqrt_f32(var, pResult);
+}
 #else
-  float32_t squareOfSum;                         /* Square of Sum */
-  float32_t var;                                 /* Temporary varaince storage */
+void arm_std_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t sum = 0.0f;                          /* Temporary result storage */
+        float32_t sumOfSquares = 0.0f;                 /* Sum of squares */
+        float32_t in;                                  /* Temporary variable to store input value */
+
+#ifndef ARM_MATH_CM0_FAMILY
+        float32_t meanOfSquares, mean, squareOfMean;   /* Temporary variables */
+#else
+        float32_t squareOfSum;                         /* Square of Sum */
+        float32_t var;                                 /* Temporary varaince storage */
 #endif
 
-  if (blockSize == 1U)
+  if (blockSize <= 1U)
   {
     *pResult = 0;
     return;
   }
 
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
-    /* Compute Sum of squares of the input samples
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
 
-    /* Decrement the loop counter */
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    sumOfSquares += in * in;
+    /* Compute sum and store result in a temporary variable, sum. */
+    sum += in;
+
+    in = *pSrc++;
+    sumOfSquares += in * in;
+    sum += in;
+
+    in = *pSrc++;
+    sumOfSquares += in * in;
+    sum += in;
+
+    in = *pSrc++;
+    sumOfSquares += in * in;
+    sum += in;
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
 
-    /* Decrement the loop counter */
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    sumOfSquares += ( in * in);
+    /* Compute sum and store result in a temporary variable, sum. */
+    sum += in;
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* Compute Mean of squares of the input samples
-   * and then store the result in a temporary variable, meanOfSquares. */
+#ifndef ARM_MATH_CM0_FAMILY
+
+  /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
   meanOfSquares = sumOfSquares / ((float32_t) blockSize - 1.0f);
 
   /* Compute mean of all input values */
@@ -143,44 +163,26 @@
   squareOfMean = (mean * mean) * (((float32_t) blockSize) /
                                   ((float32_t) blockSize - 1.0f));
 
-  /* Compute standard deviation and then store the result to the destination */
+  /* Compute standard deviation and store result to destination */
   arm_sqrt_f32((meanOfSquares - squareOfMean), pResult);
 
 #else
   /* Run the below code for Cortex-M0 */
 
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while (blkCnt > 0U)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples
-     * and then store the result in a temporary variable, sumOfSquares. */
-    in = *pSrc++;
-    sumOfSquares += in * in;
-
-    /* C = (A[0] + A[1] + ... + A[blockSize-1]) */
-    /* Compute Sum of the input samples
-     * and then store the result in a temporary variable, sum. */
-    sum += in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute the square of sum */
+  /* Compute square of sum */
   squareOfSum = ((sum * sum) / (float32_t) blockSize);
 
-  /* Compute the variance */
+  /* Compute variance */
   var = ((sumOfSquares - squareOfSum) / (float32_t) (blockSize - 1.0f));
 
-  /* Compute standard deviation and then store the result to the destination */
+  /* Compute standard deviation and store result in destination */
   arm_sqrt_f32(var, pResult);
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
+
 }
+#endif /* #if defined(ARM_MATH_NEON) */
 
 /**
- * @} end of STD group
+  @} end of STD group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_std_q15.c b/DSP/Source/StatisticsFunctions/arm_std_q15.c
index 2f2f52e..8e5c042 100644
--- a/DSP/Source/StatisticsFunctions/arm_std_q15.c
+++ b/DSP/Source/StatisticsFunctions/arm_std_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_std_q15.c
  * Description:  Standard deviation of an array of Q15 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,146 +29,133 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupStats
+  @ingroup groupStats
  */
 
 /**
- * @addtogroup STD
- * @{
+  @addtogroup STD
+  @{
  */
 
 /**
- * @brief Standard deviation of the elements of a Q15 vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult standard deviation value returned here
- * @return none.
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * The input is represented in 1.15 format.
- * Intermediate multiplication yields a 2.30 format, and this
- * result is added without saturation to a 64-bit accumulator in 34.30 format.
- * With 33 guard bits in the accumulator, there is no risk of overflow, and the
- * full precision of the intermediate multiplication is preserved.
- * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
- * 15 bits, and then saturated to yield a result in 1.15 format.
+  @brief         Standard deviation of the elements of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    standard deviation value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   The input is represented in 1.15 format.
+                   Intermediate multiplication yields a 2.30 format, and this
+                   result is added without saturation to a 64-bit accumulator in 34.30 format.
+                   With 33 guard bits in the accumulator, there is no risk of overflow, and the
+                   full precision of the intermediate multiplication is preserved.
+                   Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
+                   15 bits, and then saturated to yield a result in 1.15 format.
  */
 
 void arm_std_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult)
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
 {
-  q31_t sum = 0;                                 /* Accumulator */
-  q31_t meanOfSquares, squareOfMean;             /* square of mean and mean of square */
-  uint32_t blkCnt;                               /* loop counter */
-  q63_t sumOfSquares = 0;                        /* Accumulator */
-#if defined (ARM_MATH_DSP)
-  q31_t in;                                      /* input value */
-  q15_t in1;                                     /* input value */
-#else
-  q15_t in;                                      /* input value */
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t sum = 0;                                 /* Accumulator */
+        q31_t meanOfSquares, squareOfMean;             /* Square of mean and mean of square */
+        q63_t sumOfSquares = 0;                        /* Sum of squares */
+        q15_t in;                                      /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+  q31_t in32;                                    /* Temporary variable to store input value */
 #endif
 
-  if (blockSize == 1U)
+  if (blockSize <= 1U)
   {
     *pResult = 0;
     return;
   }
 
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
-    /* Compute Sum of squares of the input samples
-     * and then store the result in a temporary variable, sum. */
-    in = *__SIMD32(pSrc)++;
-    sum += ((in << 16U) >> 16U);
-    sum +=  (in >> 16U);
-    sumOfSquares = __SMLALD(in, in, sumOfSquares);
-    in = *__SIMD32(pSrc)++;
-    sum += ((in << 16U) >> 16U);
-    sum +=  (in >> 16U);
-    sumOfSquares = __SMLALD(in, in, sumOfSquares);
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
 
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    /* Compute sum and store result in a temporary variable, sum. */
+#if defined (ARM_MATH_DSP)
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    sumOfSquares = __SMLALD(in32, in32, sumOfSquares);
+    sum += ((in32 << 16U) >> 16U);
+    sum +=  (in32 >> 16U);
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples
-     * and then store the result in a temporary variable, sum. */
-    in1 = *pSrc++;
-    sumOfSquares = __SMLALD(in1, in1, sumOfSquares);
-    sum += in1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = (q31_t)(sumOfSquares / (q63_t)(blockSize - 1U));
-
-  /* Compute square of mean */
-  squareOfMean = (q31_t)((q63_t)sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
-
-  /* mean of the squares minus the square of the mean. */
-  /* Compute standard deviation and store the result to the destination */
-  arm_sqrt_q15(__SSAT((meanOfSquares - squareOfMean) >> 15U, 16U), pResult);
-
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    sumOfSquares = __SMLALD(in32, in32, sumOfSquares);
+    sum += ((in32 << 16U) >> 16U);
+    sum +=  (in32 >> 16U);
 #else
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while (blkCnt > 0U)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples
-     * and then store the result in a temporary variable, sumOfSquares. */
     in = *pSrc++;
     sumOfSquares += (in * in);
-
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    /* Compute sum of all input values and then store the result in a temporary variable, sum. */
     sum += in;
 
-    /* Decrement the loop counter */
+    in = *pSrc++;
+    sumOfSquares += (in * in);
+    sum += in;
+
+    in = *pSrc++;
+    sumOfSquares += (in * in);
+    sum += in;
+
+    in = *pSrc++;
+    sumOfSquares += (in * in);
+    sum += in;
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* Compute Mean of squares of the input samples
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = (q31_t)(sumOfSquares / (q63_t)(blockSize - 1U));
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    sumOfSquares += (in * in);
+    /* Compute sum and store result in a temporary variable, sum. */
+    sum += in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
+  meanOfSquares = (q31_t) (sumOfSquares / (q63_t)(blockSize - 1U));
 
   /* Compute square of mean */
-  squareOfMean = (q31_t)((q63_t)sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
+  squareOfMean = (q31_t) ((q63_t) sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
 
-  /* mean of the squares minus the square of the mean. */
-  /* Compute standard deviation and store the result to the destination */
+  /* mean of squares minus the square of mean. */
+  /* Compute standard deviation and store result in destination */
   arm_sqrt_q15(__SSAT((meanOfSquares - squareOfMean) >> 15U, 16U), pResult);
-
-#endif /* #if defined (ARM_MATH_DSP) */
 }
 
 /**
- * @} end of STD group
+  @} end of STD group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_std_q31.c b/DSP/Source/StatisticsFunctions/arm_std_q31.c
index f02cbdd..cfb6cb8 100644
--- a/DSP/Source/StatisticsFunctions/arm_std_q31.c
+++ b/DSP/Source/StatisticsFunctions/arm_std_q31.c
@@ -1,15 +1,15 @@
 /* ----------------------------------------------------------------------
  * Project:      CMSIS DSP Library
  * Title:        arm_std_q31.c
- * Description:  Standard deviation of an array of Q31 type.
+ * Description:  Standard deviation of the elements of a Q31 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,141 +29,119 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupStats
+  @ingroup groupStats
  */
 
 /**
- * @addtogroup STD
- * @{
+  @addtogroup STD
+  @{
  */
 
 /**
- * @brief Standard deviation of the elements of a Q31 vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult standard deviation value returned here
- * @return none.
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- *\par
- * The function is implemented using an internal 64-bit accumulator.
- * The input is represented in 1.31 format, which is then downshifted by 8 bits
- * which yields 1.23, and intermediate multiplication yields a 2.46 format.
- * The accumulator maintains full precision of the intermediate multiplication results,
- * but provides only a 16 guard bits.
- * There is no saturation on intermediate additions.
- * If the accumulator overflows it wraps around and distorts the result.
- * In order to avoid overflows completely the input signal must be scaled down by
- * log2(blockSize)-8 bits, as a total of blockSize additions are performed internally.
- * After division, internal variables should be Q18.46
- * Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value.
- *
+  @brief         Standard deviation of the elements of a Q31 vector.
+  @param[in]     pSrc       points to the input vector.
+  @param[in]     blockSize  number of samples in input vector.
+  @param[out]    pResult    standard deviation value returned here.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The input is represented in 1.31 format, which is then downshifted by 8 bits
+                   which yields 1.23, and intermediate multiplication yields a 2.46 format.
+                   The accumulator maintains full precision of the intermediate multiplication results,
+                   but provides only a 16 guard bits.
+                   There is no saturation on intermediate additions.
+                   If the accumulator overflows it wraps around and distorts the result.
+                   In order to avoid overflows completely the input signal must be scaled down by
+                   log2(blockSize)-8 bits, as a total of blockSize additions are performed internally.
+                   After division, internal variables should be Q18.46
+                   Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value.
  */
 
 void arm_std_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult)
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
 {
-  q63_t sum = 0;                                 /* Accumulator */
-  q63_t meanOfSquares, squareOfMean;             /* square of mean and mean of square */
-  q31_t in;                                      /* input value */
-  uint32_t blkCnt;                               /* loop counter */
-  q63_t sumOfSquares = 0;                        /* Accumulator */
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Accumulator */
+        q63_t meanOfSquares, squareOfMean;             /* Square of mean and mean of square */
+        q63_t sumOfSquares = 0;                        /* Sum of squares */
+        q31_t in;                                      /* Temporary variable to store input value */
 
-  if (blockSize == 1U)
+  if (blockSize <= 1U)
   {
     *pResult = 0;
     return;
   }
 
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
-    /* Compute Sum of squares of the input samples
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++ >> 8U;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-    in = *pSrc++ >> 8U;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-    in = *pSrc++ >> 8U;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-    in = *pSrc++ >> 8U;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
 
-    /* Decrement the loop counter */
+    in = *pSrc++ >> 8U;
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    sumOfSquares += ((q63_t) (in) * (in));
+    /* Compute sum and store result in a temporary variable, sum. */
+    sum += in;
+
+    in = *pSrc++ >> 8U;
+    sumOfSquares += ((q63_t) (in) * (in));
+    sum += in;
+
+    in = *pSrc++ >> 8U;
+    sumOfSquares += ((q63_t) (in) * (in));
+    sum += in;
+
+    in = *pSrc++ >> 8U;
+    sumOfSquares += ((q63_t) (in) * (in));
+    sum += in;
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++ >> 8U;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = sumOfSquares / (q63_t)(blockSize - 1U);
-
 #else
-  /* Run the below code for Cortex-M0 */
 
-  /* Loop over blockSize number of values */
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples
-     * and then store the result in a temporary variable, sumOfSquares. */
-    in = *pSrc++ >> 8U;
-    sumOfSquares += ((q63_t) (in) * (in));
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
 
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    /* Compute sum of all input values and then store the result in a temporary variable, sum. */
+    in = *pSrc++ >> 8U;
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    sumOfSquares += ((q63_t) (in) * (in));
+    /* Compute sum and store result in a temporary variable, sum. */
     sum += in;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* Compute Mean of squares of the input samples
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = sumOfSquares / (q63_t)(blockSize - 1U);
-
-#endif /* #if defined (ARM_MATH_DSP) */
+  /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
+  meanOfSquares = (sumOfSquares / (q63_t)(blockSize - 1U));
 
   /* Compute square of mean */
-  squareOfMean = sum * sum / (q63_t)(blockSize * (blockSize - 1U));
+  squareOfMean = ( sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
 
-  /* Compute standard deviation and then store the result to the destination */
+  /* Compute standard deviation and store result in destination */
   arm_sqrt_q31((meanOfSquares - squareOfMean) >> 15U, pResult);
 }
 
 /**
- * @} end of STD group
+  @} end of STD group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_var_f32.c b/DSP/Source/StatisticsFunctions/arm_var_f32.c
index c0f731d..3c325b1 100644
--- a/DSP/Source/StatisticsFunctions/arm_var_f32.c
+++ b/DSP/Source/StatisticsFunctions/arm_var_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_var_f32.c
  * Description:  Variance of the elements of a floating-point vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,153 +29,206 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupStats
+  @ingroup groupStats
  */
 
 /**
- * @defgroup variance  Variance
- *
- * Calculates the variance of the elements in the input vector.
- * The underlying algorithm used is the direct method sometimes referred to as the two-pass method:
- *
- * <pre>
- *   Result = sum(element - meanOfElements)^2) / numElement - 1
- *
- *     where, meanOfElements = ( pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] ) / blockSize
- *
- * </pre>
- *
- * There are separate functions for floating point, Q31, and Q15 data types.
+  @defgroup variance  Variance
+
+  Calculates the variance of the elements in the input vector.
+  The underlying algorithm used is the direct method sometimes referred to as the two-pass method:
+
+  <pre>
+      Result = sum(element - meanOfElements)^2) / numElement - 1
+
+      meanOfElements = ( pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] ) / blockSize
+  </pre>
+
+  There are separate functions for floating point, Q31, and Q15 data types.
  */
 
 /**
- * @addtogroup variance
- * @{
+  @addtogroup variance
+  @{
  */
 
-
 /**
- * @brief Variance of the elements of a floating-point vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult variance value returned here
- * @return none.
+  @brief         Variance of the elements of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    variance value returned here
+  @return        none
  */
-
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
 void arm_var_f32(
-                 float32_t * pSrc,
+           const float32_t * pSrc,
                  uint32_t blockSize,
                  float32_t * pResult)
 {
-    float32_t fMean, fValue;
-    uint32_t blkCnt;            /* loop counter */
-    float32_t * pInput = pSrc;
-    float32_t sum = 0.0f;
-    float32_t fSum = 0.0f;
-    #if defined(ARM_MATH_DSP)
-    float32_t in1, in2, in3, in4;
-    #endif
+  float32_t mean;
 
-    if (blockSize <= 1U)
-    {
-        *pResult = 0;
-        return;
-    }
+  float32_t sum = 0.0f;                          /* accumulator */
+  float32_t in;                                  /* Temporary variable to store input value */
+  uint32_t blkCnt;                               /* loop counter */
 
-    #if defined(ARM_MATH_DSP)
-        /* Run the below code for Cortex-M4 and Cortex-M7 */
+  float32x4_t sumV = vdupq_n_f32(0.0f);                          /* Temporary result storage */
+  float32x2_t sumV2;
+  float32x4_t inV;
+  float32x4_t avg;
 
-        /*loop Unrolling */
-        blkCnt = blockSize >> 2U;
+  arm_mean_f32(pSrc,blockSize,&mean);
+  avg = vdupq_n_f32(mean);
 
-        /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-        ** a second loop below computes the remaining 1 to 3 samples. */
-        while (blkCnt > 0U)
-        {
-            /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-            in1 = *pInput++;
-            in2 = *pInput++;
-            in3 = *pInput++;
-            in4 = *pInput++;
+  blkCnt = blockSize >> 2U;
 
-            sum += in1;
-            sum += in2;
-            sum += in3;
-            sum += in4;
+  /* Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* Compute Power and then store the result in a temporary variable, sum. */
+    inV = vld1q_f32(pSrc);
+    inV = vsubq_f32(inV, avg);
+    sumV = vmlaq_f32(sumV, inV, inV);
+    pSrc += 4;
 
-            /* Decrement the loop counter */
-            blkCnt--;
-        }
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
 
-        /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-        ** No loop unrolling is used. */
-        blkCnt = blockSize % 0x4U;
+  sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
+  sum = sumV2[0] + sumV2[1];
 
-    #else
-        /* Run the below code for Cortex-M0 or Cortex-M3 */
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4U;
 
-        /* Loop over blockSize number of values */
-        blkCnt = blockSize;
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* compute power and then store the result in a temporary variable, sum. */
+    in = *pSrc++;
+    in = in - mean;
+    sum += in * in;
 
-    #endif
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
 
-    while (blkCnt > 0U)
-    {
-        /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-        sum += *pInput++;
+  /* Variance */
+  *pResult = sum / (float32_t)(blockSize - 1.0f);
 
-        /* Decrement the loop counter */
-        blkCnt--;
-    }
-
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
-    fMean = sum / (float32_t) blockSize;
-
-    pInput = pSrc;
-
-    #if defined(ARM_MATH_DSP)
-
-        /*loop Unrolling */
-        blkCnt = blockSize >> 2U;
-
-        /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-        ** a second loop below computes the remaining 1 to 3 samples. */
-        while (blkCnt > 0U)
-        {
-            fValue = *pInput++ - fMean;
-            fSum += fValue * fValue;
-            fValue = *pInput++ - fMean;
-            fSum += fValue * fValue;
-            fValue = *pInput++ - fMean;
-            fSum += fValue * fValue;
-            fValue = *pInput++ - fMean;
-            fSum += fValue * fValue;
-
-            /* Decrement the loop counter */
-            blkCnt--;
-        }
-
-        blkCnt = blockSize % 0x4U;
-    #else
-        /* Run the below code for Cortex-M0 or Cortex-M3 */
-
-        /* Loop over blockSize number of values */
-        blkCnt = blockSize;
-    #endif
-
-    while (blkCnt > 0U)
-    {
-        fValue = *pInput++ - fMean;
-        fSum += fValue * fValue;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-    }
-
-    /* Variance */
-    *pResult = fSum / (float32_t)(blockSize - 1.0f);
 }
 
+#else
+void arm_var_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t sum = 0.0f;                          /* Temporary result storage */
+        float32_t fSum = 0.0f;
+        float32_t fMean, fValue;
+  const float32_t * pInput = pSrc;
+
+  if (blockSize <= 1U)
+  {
+    *pResult = 0;
+    return;
+  }
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+
+    sum += *pInput++;
+    sum += *pInput++;
+    sum += *pInput++;
+    sum += *pInput++;
+
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+
+    sum += *pInput++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
+  fMean = sum / (float32_t) blockSize;
+
+  pInput = pSrc;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    fValue = *pInput++ - fMean;
+    fSum += fValue * fValue;
+
+    fValue = *pInput++ - fMean;
+    fSum += fValue * fValue;
+
+    fValue = *pInput++ - fMean;
+    fSum += fValue * fValue;
+
+    fValue = *pInput++ - fMean;
+    fSum += fValue * fValue;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    fValue = *pInput++ - fMean;
+    fSum += fValue * fValue;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Variance */
+  *pResult = fSum / (float32_t)(blockSize - 1.0f);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+
 /**
- * @} end of variance group
+  @} end of variance group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_var_q15.c b/DSP/Source/StatisticsFunctions/arm_var_q15.c
index 5ba61f7..259e76b 100644
--- a/DSP/Source/StatisticsFunctions/arm_var_q15.c
+++ b/DSP/Source/StatisticsFunctions/arm_var_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_var_q15.c
  * Description:  Variance of an array of Q15 type
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,144 +29,136 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupStats
+  @ingroup groupStats
  */
 
 /**
- * @addtogroup variance
- * @{
+  @addtogroup variance
+  @{
  */
 
 /**
- * @brief Variance of the elements of a Q15 vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult variance value returned here
- * @return none.
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * The input is represented in 1.15 format.
- * Intermediate multiplication yields a 2.30 format, and this
- * result is added without saturation to a 64-bit accumulator in 34.30 format.
- * With 33 guard bits in the accumulator, there is no risk of overflow, and the
- * full precision of the intermediate multiplication is preserved.
- * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
- * 15 bits, and then saturated to yield a result in 1.15 format.
+  @brief         Variance of the elements of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    variance value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   The input is represented in 1.15 format.
+                   Intermediate multiplication yields a 2.30 format, and this
+                   result is added without saturation to a 64-bit accumulator in 34.30 format.
+                   With 33 guard bits in the accumulator, there is no risk of overflow, and the
+                   full precision of the intermediate multiplication is preserved.
+                   Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
+                   15 bits, and then saturated to yield a result in 1.15 format.
  */
 
 void arm_var_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult)
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
 {
-  q31_t sum = 0;                                 /* Accumulator */
-  q31_t meanOfSquares, squareOfMean;             /* square of mean and mean of square */
-  uint32_t blkCnt;                               /* loop counter */
-  q63_t sumOfSquares = 0;                        /* Accumulator */
-#if defined (ARM_MATH_DSP)
-  q31_t in;                                      /* input value */
-  q15_t in1;                                     /* input value */
-#else
-  q15_t in;                                      /* input value */
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t sum = 0;                                 /* Accumulator */
+        q31_t meanOfSquares, squareOfMean;             /* Square of mean and mean of square */
+        q63_t sumOfSquares = 0;                        /* Sum of squares */
+        q15_t in;                                      /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in32;                                    /* Temporary variable to store input value */
 #endif
 
-  if (blockSize == 1U)
+  if (blockSize <= 1U)
   {
     *pResult = 0;
     return;
   }
 
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
-    /* Compute Sum of squares of the input samples
-     * and then store the result in a temporary variable, sum. */
-    in = *__SIMD32(pSrc)++;
-    sum += ((in << 16U) >> 16U);
-    sum +=  (in >> 16U);
-    sumOfSquares = __SMLALD(in, in, sumOfSquares);
-    in = *__SIMD32(pSrc)++;
-    sum += ((in << 16U) >> 16U);
-    sum +=  (in >> 16U);
-    sumOfSquares = __SMLALD(in, in, sumOfSquares);
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
 
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    /* Compute sum and store result in a temporary variable, sum. */
+#if defined (ARM_MATH_DSP)
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    sumOfSquares = __SMLALD(in32, in32, sumOfSquares);
+    sum += ((in32 << 16U) >> 16U);
+    sum +=  (in32 >> 16U);
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples
-     * and then store the result in a temporary variable, sum. */
-    in1 = *pSrc++;
-    sumOfSquares = __SMLALD(in1, in1, sumOfSquares);
-    sum += in1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = (q31_t)(sumOfSquares / (q63_t)(blockSize - 1U));
-
-  /* Compute square of mean */
-  squareOfMean = (q31_t)((q63_t)sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
-
-  /* mean of the squares minus the square of the mean. */
-  *pResult = (meanOfSquares - squareOfMean) >> 15U;
-
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    sumOfSquares = __SMLALD(in32, in32, sumOfSquares);
+    sum += ((in32 << 16U) >> 16U);
+    sum +=  (in32 >> 16U);
 #else
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while (blkCnt > 0U)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples
-     * and then store the result in a temporary variable, sumOfSquares. */
     in = *pSrc++;
     sumOfSquares += (in * in);
-
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    /* Compute sum of all input values and then store the result in a temporary variable, sum. */
     sum += in;
 
-    /* Decrement the loop counter */
+    in = *pSrc++;
+    sumOfSquares += (in * in);
+    sum += in;
+
+    in = *pSrc++;
+    sumOfSquares += (in * in);
+    sum += in;
+
+    in = *pSrc++;
+    sumOfSquares += (in * in);
+    sum += in;
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* Compute Mean of squares of the input samples
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = (q31_t)(sumOfSquares / (q63_t)(blockSize - 1U));
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+#if defined (ARM_MATH_DSP)
+    sumOfSquares = __SMLALD(in, in, sumOfSquares);
+#else
+    sumOfSquares += (in * in);
+#endif /* #if defined (ARM_MATH_DSP) */
+    /* Compute sum and store result in a temporary variable, sum. */
+    sum += in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
+  meanOfSquares = (q31_t) (sumOfSquares / (q63_t)(blockSize - 1U));
 
   /* Compute square of mean */
-  squareOfMean = (q31_t)((q63_t)sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
+  squareOfMean = (q31_t) ((q63_t) sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
 
-  /* mean of the squares minus the square of the mean. */
-  *pResult = (meanOfSquares - squareOfMean) >> 15;
-
-#endif /* #if defined (ARM_MATH_DSP) */
+  /* mean of squares minus the square of mean. */
+  *pResult = (meanOfSquares - squareOfMean) >> 15U;
 }
 
 /**
- * @} end of variance group
+  @} end of variance group
  */
diff --git a/DSP/Source/StatisticsFunctions/arm_var_q31.c b/DSP/Source/StatisticsFunctions/arm_var_q31.c
index 526c6cd..558332f 100644
--- a/DSP/Source/StatisticsFunctions/arm_var_q31.c
+++ b/DSP/Source/StatisticsFunctions/arm_var_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_var_q31.c
  * Description:  Variance of an array of Q31 type
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,141 +29,119 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupStats
+  @ingroup groupStats
  */
 
 /**
- * @addtogroup variance
- * @{
+  @addtogroup variance
+  @{
  */
 
 /**
- * @brief Variance of the elements of a Q31 vector.
- * @param[in]       *pSrc points to the input vector
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult variance value returned here
- * @return none.
- * @details
- * <b>Scaling and Overflow Behavior:</b>
- *
- *\par
- * The function is implemented using an internal 64-bit accumulator.
- * The input is represented in 1.31 format, which is then downshifted by 8 bits
- * which yields 1.23, and intermediate multiplication yields a 2.46 format.
- * The accumulator maintains full precision of the intermediate multiplication results,
- * but provides only a 16 guard bits.
- * There is no saturation on intermediate additions.
- * If the accumulator overflows it wraps around and distorts the result.
- * In order to avoid overflows completely the input signal must be scaled down by
- * log2(blockSize)-8 bits, as a total of blockSize additions are performed internally.
- * After division, internal variables should be Q18.46
- * Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value.
- *
+  @brief         Variance of the elements of a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    variance value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The input is represented in 1.31 format, which is then downshifted by 8 bits
+                   which yields 1.23, and intermediate multiplication yields a 2.46 format.
+                   The accumulator maintains full precision of the intermediate multiplication results,
+                   but provides only a 16 guard bits.
+                   There is no saturation on intermediate additions.
+                   If the accumulator overflows it wraps around and distorts the result.
+                   In order to avoid overflows completely the input signal must be scaled down by
+                   log2(blockSize)-8 bits, as a total of blockSize additions are performed internally.
+                   After division, internal variables should be Q18.46
+                   Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value.
  */
 
 void arm_var_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult)
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
 {
-  q63_t sum = 0;                                 /* Accumulator */
-  q63_t meanOfSquares, squareOfMean;             /* square of mean and mean of square */
-  q31_t in;                                      /* input value */
-  uint32_t blkCnt;                               /* loop counter */
-  q63_t sumOfSquares = 0;                        /* Accumulator */
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Temporary result storage */
+        q63_t meanOfSquares, squareOfMean;             /* Square of mean and mean of square */
+        q63_t sumOfSquares = 0;                        /* Sum of squares */
+        q31_t in;                                      /* Temporary variable to store input value */
 
-  if (blockSize == 1U)
+  if (blockSize <= 1U)
   {
     *pResult = 0;
     return;
   }
 
-#if defined (ARM_MATH_DSP)
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
-    /* Compute Sum of squares of the input samples
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++ >> 8U;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-    in = *pSrc++ >> 8U;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-    in = *pSrc++ >> 8U;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-    in = *pSrc++ >> 8U;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
 
-    /* Decrement the loop counter */
+    in = *pSrc++ >> 8U;
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    sumOfSquares += ((q63_t) (in) * (in));
+    /* Compute sum and store result in a temporary variable, sum. */
+    sum += in;
+
+    in = *pSrc++ >> 8U;
+    sumOfSquares += ((q63_t) (in) * (in));
+    sum += in;
+
+    in = *pSrc++ >> 8U;
+    sumOfSquares += ((q63_t) (in) * (in));
+    sum += in;
+
+    in = *pSrc++ >> 8U;
+    sumOfSquares += ((q63_t) (in) * (in));
+    sum += in;
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
-  while (blkCnt > 0U)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++ >> 8U;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = sumOfSquares / (q63_t)(blockSize - 1U);
-
 #else
-  /* Run the below code for Cortex-M0 */
 
-  /* Loop over blockSize number of values */
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
   while (blkCnt > 0U)
   {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples
-     * and then store the result in a temporary variable, sumOfSquares. */
-    in = *pSrc++ >> 8U;
-    sumOfSquares += ((q63_t) (in) * (in));
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
 
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    /* Compute sum of all input values and then store the result in a temporary variable, sum. */
+    in = *pSrc++ >> 8U;
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    sumOfSquares += ((q63_t) (in) * (in));
+    /* Compute sum and store result in a temporary variable, sum. */
     sum += in;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* Compute Mean of squares of the input samples
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = sumOfSquares / (q63_t)(blockSize - 1U);
-
-#endif /* #if defined (ARM_MATH_DSP) */
+  /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
+  meanOfSquares = (sumOfSquares / (q63_t)(blockSize - 1U));
 
   /* Compute square of mean */
-  squareOfMean = sum * sum / (q63_t)(blockSize * (blockSize - 1U));
+  squareOfMean = ( sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
 
-  /* Compute standard deviation and then store the result to the destination */
+  /* Compute variance and store result in destination */
   *pResult = (meanOfSquares - squareOfMean) >> 15U;
 }
 
 /**
- * @} end of variance group
+  @} end of variance group
  */
diff --git a/DSP/Source/SupportFunctions/CMakeLists.txt b/DSP/Source/SupportFunctions/CMakeLists.txt
new file mode 100644
index 0000000..33c4f87
--- /dev/null
+++ b/DSP/Source/SupportFunctions/CMakeLists.txt
@@ -0,0 +1,16 @@
+cmake_minimum_required (VERSION 3.6)
+
+project(CMSISDSPSupport)
+
+
+file(GLOB SRC "./*_*.c")
+
+add_library(CMSISDSPSupport STATIC ${SRC})
+
+configdsp(CMSISDSPSupport ..)
+
+### Includes
+target_include_directories(CMSISDSPSupport PUBLIC "${DSP}/../../Include")
+
+
+
diff --git a/DSP/Source/SupportFunctions/SupportFunctions.c b/DSP/Source/SupportFunctions/SupportFunctions.c
new file mode 100644
index 0000000..4deb19b
--- /dev/null
+++ b/DSP/Source/SupportFunctions/SupportFunctions.c
@@ -0,0 +1,48 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        SupportFunctions.c
+ * Description:  Combination of all support function source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_copy_f32.c"
+#include "arm_copy_q15.c"
+#include "arm_copy_q31.c"
+#include "arm_copy_q7.c"
+#include "arm_fill_f32.c"
+#include "arm_fill_q15.c"
+#include "arm_fill_q31.c"
+#include "arm_fill_q7.c"
+#include "arm_float_to_q15.c"
+#include "arm_float_to_q31.c"
+#include "arm_float_to_q7.c"
+#include "arm_q15_to_float.c"
+#include "arm_q15_to_q31.c"
+#include "arm_q15_to_q7.c"
+#include "arm_q31_to_float.c"
+#include "arm_q31_to_q15.c"
+#include "arm_q31_to_q7.c"
+#include "arm_q7_to_float.c"
+#include "arm_q7_to_q15.c"
+#include "arm_q7_to_q31.c"
diff --git a/DSP/Source/SupportFunctions/arm_copy_f32.c b/DSP/Source/SupportFunctions/arm_copy_f32.c
index 1e2b5cf..707adc4 100644
--- a/DSP/Source/SupportFunctions/arm_copy_f32.c
+++ b/DSP/Source/SupportFunctions/arm_copy_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_copy_f32.c
  * Description:  Copies the elements of a floating-point vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,66 +29,56 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupSupport
+  @ingroup groupSupport
  */
 
 /**
- * @defgroup copy Vector Copy
- *
- * Copies sample by sample from source vector to destination vector.
- *
- * <pre>
- * 	pDst[n] = pSrc[n];   0 <= n < blockSize.
- * </pre>
- *
- * There are separate functions for floating point, Q31, Q15, and Q7 data types.
+  @defgroup copy Vector Copy
+
+  Copies sample by sample from source vector to destination vector.
+
+  <pre>
+      pDst[n] = pSrc[n];   0 <= n < blockSize.
+  </pre>
+
+  There are separate functions for floating point, Q31, Q15, and Q7 data types.
  */
 
 /**
- * @addtogroup copy
- * @{
+  @addtogroup copy
+  @{
  */
 
 /**
- * @brief Copies the elements of a floating-point vector.
- * @param[in]       *pSrc points to input vector
- * @param[out]      *pDst points to output vector
- * @param[in]       blockSize length of the input vector
- * @return none.
- *
+  @brief         Copies the elements of a floating-point vector.
+  @param[in]     pSrc       points to input vector
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
  */
 
-
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
 void arm_copy_f32(
-  float32_t * pSrc,
+  const float32_t * pSrc,
   float32_t * pDst,
   uint32_t blockSize)
 {
   uint32_t blkCnt;                               /* loop counter */
 
-#if defined (ARM_MATH_DSP)
+  float32x4_t inV;
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t in1, in2, in3, in4;
-
-  /*loop Unrolling */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+  /* Compute 4 outputs at a time.
    ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = A */
     /* Copy and then store the results in the destination buffer */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
-
-    *pDst++ = in1;
-    *pDst++ = in2;
-    *pDst++ = in3;
-    *pDst++ = in4;
+    inV = vld1q_f32(pSrc);
+    vst1q_f32(pDst, inV);
+    pSrc += 4;
+    pDst += 4;
 
     /* Decrement the loop counter */
     blkCnt--;
@@ -96,16 +86,7 @@
 
   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
    ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_DSP) */
+  blkCnt = blockSize & 3;
 
   while (blkCnt > 0U)
   {
@@ -117,7 +98,55 @@
     blkCnt--;
   }
 }
+#else
+void arm_copy_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
 
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* Copy and store result in destination buffer */
+    *pDst++ = *pSrc++;
+    *pDst++ = *pSrc++;
+    *pDst++ = *pSrc++;
+    *pDst++ = *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* Copy and store result in destination buffer */
+    *pDst++ = *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+#endif /* #if defined(ARM_MATH_NEON) */
 /**
- * @} end of BasicCopy group
+  @} end of BasicCopy group
  */
diff --git a/DSP/Source/SupportFunctions/arm_copy_q15.c b/DSP/Source/SupportFunctions/arm_copy_q15.c
index 0d2fffb..d8da113 100644
--- a/DSP/Source/SupportFunctions/arm_copy_q15.c
+++ b/DSP/Source/SupportFunctions/arm_copy_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_copy_q15.c
  * Description:  Copies the elements of a Q15 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,74 +29,68 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupSupport
+  @ingroup groupSupport
  */
 
 /**
- * @addtogroup copy
- * @{
+  @addtogroup copy
+  @{
  */
+
 /**
- * @brief Copies the elements of a Q15 vector.
- * @param[in]       *pSrc points to input vector
- * @param[out]      *pDst points to output vector
- * @param[in]       blockSize length of the input vector
- * @return none.
- *
+  @brief         Copies the elements of a Q15 vector.
+  @param[in]     pSrc       points to input vector
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
  */
 
 void arm_copy_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
+  uint32_t blkCnt;                               /* Loop counter */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = A */
-    /* Read two inputs */
-    *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
-    *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
 
-    /* Decrement the loop counter */
+    /* read 2 times 2 samples at a time */
+    write_q15x2_ia (&pDst, read_q15x2_ia ((q15_t **) &pSrc));
+    write_q15x2_ia (&pDst, read_q15x2_ia ((q15_t **) &pSrc));
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
-
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* C = A */
-    /* Copy and then store the value in the destination buffer */
+
+    /* Copy and store result in destination buffer */
     *pDst++ = *pSrc++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 }
 
 /**
- * @} end of BasicCopy group
+  @} end of BasicCopy group
  */
diff --git a/DSP/Source/SupportFunctions/arm_copy_q31.c b/DSP/Source/SupportFunctions/arm_copy_q31.c
index 5bf8934..e342a32 100644
--- a/DSP/Source/SupportFunctions/arm_copy_q31.c
+++ b/DSP/Source/SupportFunctions/arm_copy_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_copy_q31.c
  * Description:  Copies the elements of a Q31 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,83 +29,70 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupSupport
+  @ingroup groupSupport
  */
 
 /**
- * @addtogroup copy
- * @{
+  @addtogroup copy
+  @{
  */
 
 /**
- * @brief Copies the elements of a Q31 vector.
- * @param[in]       *pSrc points to input vector
- * @param[out]      *pDst points to output vector
- * @param[in]       blockSize length of the input vector
- * @return none.
- *
+  @brief         Copies the elements of a Q31 vector.
+  @param[in]     pSrc       points to input vector
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
  */
 
 void arm_copy_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
+  uint32_t blkCnt;                               /* Loop counter */
 
+#if defined (ARM_MATH_LOOPUNROLL)
 
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = A */
-    /* Copy and then store the values in the destination buffer */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
 
-    *pDst++ = in1;
-    *pDst++ = in2;
-    *pDst++ = in3;
-    *pDst++ = in4;
+    /* Copy and store result in destination buffer */
+    *pDst++ = *pSrc++;
+    *pDst++ = *pSrc++;
+    *pDst++ = *pSrc++;
+    *pDst++ = *pSrc++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* C = A */
-    /* Copy and then store the value in the destination buffer */
+
+    /* Copy and store result in destination buffer */
     *pDst++ = *pSrc++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 }
 
 /**
- * @} end of BasicCopy group
+  @} end of BasicCopy group
  */
diff --git a/DSP/Source/SupportFunctions/arm_copy_q7.c b/DSP/Source/SupportFunctions/arm_copy_q7.c
index 5c737cd..77da8ca 100644
--- a/DSP/Source/SupportFunctions/arm_copy_q7.c
+++ b/DSP/Source/SupportFunctions/arm_copy_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_copy_q7.c
  * Description:  Copies the elements of a Q7 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,75 +29,67 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupSupport
+  @ingroup groupSupport
  */
 
 /**
- * @addtogroup copy
- * @{
+  @addtogroup copy
+  @{
  */
 
 /**
- * @brief Copies the elements of a Q7 vector.
- * @param[in]       *pSrc points to input vector
- * @param[out]      *pDst points to output vector
- * @param[in]       blockSize length of the input vector
- * @return none.
- *
+  @brief         Copies the elements of a Q7 vector.
+  @param[in]     pSrc       points to input vector
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
  */
 
 void arm_copy_q7(
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
+  uint32_t blkCnt;                               /* Loop counter */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = A */
-    /* Copy and then store the results in the destination buffer */
-    /* 4 samples are copied and stored at a time using SIMD */
-    *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
 
-    /* Decrement the loop counter */
+    /* read 4 samples at a time */
+    write_q7x4_ia (&pDst, read_q7x4_ia ((q7_t **) &pSrc));
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* C = A */
-    /* Copy and then store the results in the destination buffer */
+
+    /* Copy and store result in destination buffer */
     *pDst++ = *pSrc++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 }
 
 /**
- * @} end of BasicCopy group
+  @} end of BasicCopy group
  */
diff --git a/DSP/Source/SupportFunctions/arm_fill_f32.c b/DSP/Source/SupportFunctions/arm_fill_f32.c
index be749c8..29f6286 100644
--- a/DSP/Source/SupportFunctions/arm_fill_f32.c
+++ b/DSP/Source/SupportFunctions/arm_fill_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_fill_f32.c
  * Description:  Fills a constant value into a floating-point vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,36 +29,35 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupSupport
+  @ingroup groupSupport
  */
 
 /**
- * @defgroup Fill Vector Fill
- *
- * Fills the destination vector with a constant value.
- *
- * <pre>
- * 	pDst[n] = value;   0 <= n < blockSize.
- * </pre>
- *
- * There are separate functions for floating point, Q31, Q15, and Q7 data types.
+  @defgroup Fill Vector Fill
+
+  Fills the destination vector with a constant value.
+
+  <pre>
+      pDst[n] = value;   0 <= n < blockSize.
+  </pre>
+
+  There are separate functions for floating point, Q31, Q15, and Q7 data types.
  */
 
 /**
- * @addtogroup Fill
- * @{
+  @addtogroup Fill
+  @{
  */
 
 /**
- * @brief Fills a constant value into a floating-point vector.
- * @param[in]       value input value to be filled
- * @param[out]      *pDst points to output vector
- * @param[in]       blockSize length of the output vector
- * @return none.
- *
+  @brief         Fills a constant value into a floating-point vector.
+  @param[in]     value      input value to be filled
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
  */
 
-
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
 void arm_fill_f32(
   float32_t value,
   float32_t * pDst,
@@ -66,27 +65,19 @@
 {
   uint32_t blkCnt;                               /* loop counter */
 
-#if defined (ARM_MATH_DSP)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t in1 = value;
-  float32_t in2 = value;
-  float32_t in3 = value;
-  float32_t in4 = value;
+  float32x4_t inV = vdupq_n_f32(value);
 
-  /*loop Unrolling */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+  /* Compute 4 outputs at a time.
    ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = value */
     /* Fill the value in the destination buffer */
-    *pDst++ = in1;
-    *pDst++ = in2;
-    *pDst++ = in3;
-    *pDst++ = in4;
+    vst1q_f32(pDst, inV);
+    pDst += 4;
 
     /* Decrement the loop counter */
     blkCnt--;
@@ -94,17 +85,7 @@
 
   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
    ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
+  blkCnt = blockSize & 3;
 
   while (blkCnt > 0U)
   {
@@ -116,7 +97,55 @@
     blkCnt--;
   }
 }
+#else
+void arm_fill_f32(
+  float32_t value,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
 
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* Fill value in destination buffer */
+    *pDst++ = value;
+    *pDst++ = value;
+    *pDst++ = value;
+    *pDst++ = value;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* Fill value in destination buffer */
+    *pDst++ = value;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+#endif /* #if defined(ARM_MATH_NEON) */
 /**
- * @} end of Fill group
+  @} end of Fill group
  */
diff --git a/DSP/Source/SupportFunctions/arm_fill_q15.c b/DSP/Source/SupportFunctions/arm_fill_q15.c
index 27eb42c..d8c0f8d 100644
--- a/DSP/Source/SupportFunctions/arm_fill_q15.c
+++ b/DSP/Source/SupportFunctions/arm_fill_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_fill_q15.c
  * Description:  Fills a constant value into a Q15 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,21 +29,20 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupSupport
+  @ingroup groupSupport
  */
 
 /**
- * @addtogroup Fill
- * @{
+  @addtogroup Fill
+  @{
  */
 
 /**
- * @brief Fills a constant value into a Q15 vector.
- * @param[in]       value input value to be filled
- * @param[out]      *pDst points to output vector
- * @param[in]       blockSize length of the output vector
- * @return none.
- *
+  @brief         Fills a constant value into a Q15 vector.
+  @param[in]     value      input value to be filled
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
  */
 
 void arm_fill_q15(
@@ -51,58 +50,51 @@
   q15_t * pDst,
   uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
+  uint32_t blkCnt;                               /* Loop counter */
 
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
+#if defined (ARM_MATH_LOOPUNROLL)
   q31_t packedValue;                             /* value packed to 32 bits */
 
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2U;
-
   /* Packing two 16 bit values to 32 bit value in order to use SIMD */
   packedValue = __PKHBT(value, value, 16U);
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
   while (blkCnt > 0U)
   {
     /* C = value */
-    /* Fill the value in the destination buffer */
-    *__SIMD32(pDst)++ = packedValue;
-    *__SIMD32(pDst)++ = packedValue;
 
-    /* Decrement the loop counter */
+    /* fill 2 times 2 samples at a time */
+    write_q15x2_ia (&pDst, packedValue);
+    write_q15x2_ia (&pDst, packedValue);
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* C = value */
-    /* Fill the value in the destination buffer */
+
+    /* Fill value in destination buffer */
     *pDst++ = value;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 }
 
 /**
- * @} end of Fill group
+  @} end of Fill group
  */
diff --git a/DSP/Source/SupportFunctions/arm_fill_q31.c b/DSP/Source/SupportFunctions/arm_fill_q31.c
index 397a7b5..e174889 100644
--- a/DSP/Source/SupportFunctions/arm_fill_q31.c
+++ b/DSP/Source/SupportFunctions/arm_fill_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_fill_q31.c
  * Description:  Fills a constant value into a Q31 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,21 +29,20 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupSupport
+  @ingroup groupSupport
  */
 
 /**
- * @addtogroup Fill
- * @{
+  @addtogroup Fill
+  @{
  */
 
 /**
- * @brief Fills a constant value into a Q31 vector.
- * @param[in]       value input value to be filled
- * @param[out]      *pDst points to output vector
- * @param[in]       blockSize length of the output vector
- * @return none.
- *
+  @brief         Fills a constant value into a Q31 vector.
+  @param[in]     value      input value to be filled
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
  */
 
 void arm_fill_q31(
@@ -51,59 +50,49 @@
   q31_t * pDst,
   uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
+  uint32_t blkCnt;                               /* Loop counter */
 
+#if defined (ARM_MATH_LOOPUNROLL)
 
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1 = value;
-  q31_t in2 = value;
-  q31_t in3 = value;
-  q31_t in4 = value;
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = value */
-    /* Fill the value in the destination buffer */
-    *pDst++ = in1;
-    *pDst++ = in2;
-    *pDst++ = in3;
-    *pDst++ = in4;
 
-    /* Decrement the loop counter */
+    /* Fill value in destination buffer */
+    *pDst++ = value;
+    *pDst++ = value;
+    *pDst++ = value;
+    *pDst++ = value;
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* C = value */
-    /* Fill the value in the destination buffer */
+
+    /* Fill value in destination buffer */
     *pDst++ = value;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 }
 
 /**
- * @} end of Fill group
+  @} end of Fill group
  */
diff --git a/DSP/Source/SupportFunctions/arm_fill_q7.c b/DSP/Source/SupportFunctions/arm_fill_q7.c
index dffdf97..bca3267 100644
--- a/DSP/Source/SupportFunctions/arm_fill_q7.c
+++ b/DSP/Source/SupportFunctions/arm_fill_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_fill_q7.c
  * Description:  Fills a constant value into a Q7 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,21 +29,20 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupSupport
+  @ingroup groupSupport
  */
 
 /**
- * @addtogroup Fill
- * @{
+  @addtogroup Fill
+  @{
  */
 
 /**
- * @brief Fills a constant value into a Q7 vector.
- * @param[in]       value input value to be filled
- * @param[out]      *pDst points to output vector
- * @param[in]       blockSize length of the output vector
- * @return none.
- *
+  @brief         Fills a constant value into a Q7 vector.
+  @param[in]     value      input value to be filled
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
  */
 
 void arm_fill_q7(
@@ -51,56 +50,50 @@
   q7_t * pDst,
   uint32_t blockSize)
 {
-  uint32_t blkCnt;                               /* loop counter */
+  uint32_t blkCnt;                               /* Loop counter */
 
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
+#if defined (ARM_MATH_LOOPUNROLL)
   q31_t packedValue;                             /* value packed to 32 bits */
 
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2U;
-
   /* Packing four 8 bit values to 32 bit value in order to use SIMD */
   packedValue = __PACKq7(value, value, value, value);
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
   while (blkCnt > 0U)
   {
     /* C = value */
-    /* Fill the value in the destination buffer */
-    *__SIMD32(pDst)++ = packedValue;
 
-    /* Decrement the loop counter */
+    /* fill 4 samples at a time */
+    write_q7x4_ia (&pDst, packedValue);
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* C = value */
-    /* Fill the value in the destination buffer */
+
+    /* Fill value in destination buffer */
     *pDst++ = value;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 }
 
 /**
- * @} end of Fill group
+  @} end of Fill group
  */
diff --git a/DSP/Source/SupportFunctions/arm_float_to_q15.c b/DSP/Source/SupportFunctions/arm_float_to_q15.c
index 0aa20f1..68c1ad0 100644
--- a/DSP/Source/SupportFunctions/arm_float_to_q15.c
+++ b/DSP/Source/SupportFunctions/arm_float_to_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_float_to_q15.c
  * Description:  Converts the elements of the floating-point vector to Q15 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,95 +29,92 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupSupport
+  @ingroup groupSupport
  */
 
 /**
- * @addtogroup float_to_x
- * @{
+  @addtogroup float_to_x
+  @{
  */
 
 /**
- * @brief Converts the elements of the floating-point vector to Q15 vector.
- * @param[in]       *pSrc points to the floating-point input vector
- * @param[out]      *pDst points to the Q15 output vector
- * @param[in]       blockSize length of the input vector
- * @return none.
- *
- * \par Description:
- * \par
- * The equation used for the conversion process is:
- * <pre>
- * 	pDst[n] = (q15_t)(pSrc[n] * 32768);   0 <= n < blockSize.
- * </pre>
- * \par Scaling and Overflow Behavior:
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
- * \note
- * In order to apply rounding, the library should be rebuilt with the ROUNDING macro
- * defined in the preprocessor section of project options.
- *
+  @brief         Converts the elements of the floating-point vector to Q15 vector.
+  @param[in]     pSrc       points to the floating-point input vector
+  @param[out]    pDst       points to the Q15 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (q15_t)(pSrc[n] * 32768);   0 <= n < blockSize.
+  </pre>
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+
+  @note
+                   In order to apply rounding, the library should be rebuilt with the ROUNDING macro
+                   defined in the preprocessor section of project options.
  */
-
-
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
 void arm_float_to_q15(
-  float32_t * pSrc,
+  const float32_t * pSrc,
   q15_t * pDst,
   uint32_t blockSize)
 {
-  float32_t *pIn = pSrc;                         /* Src pointer */
+  const float32_t *pIn = pSrc;                         /* Src pointer */
   uint32_t blkCnt;                               /* loop counter */
 
-#ifdef ARM_MATH_ROUNDING
-
   float32_t in;
+  float32x4_t inV;
+  #ifdef ARM_MATH_ROUNDING
+  float32x4_t zeroV = vdupq_n_f32(0.0f);
+  float32x4_t pHalf = vdupq_n_f32(0.5f / 32768.0f);
+  float32x4_t mHalf = vdupq_n_f32(-0.5f / 32768.0f);
+  float32x4_t r;
+  uint32x4_t cmp;
+  #endif
 
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
+  int32x4_t cvt;
+  int16x4_t outV;
 
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+  /* Compute 4 outputs at a time.
    ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
 
 #ifdef ARM_MATH_ROUNDING
     /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+    /* Convert from float to q15 and then store the results in the destination buffer */
+    inV = vld1q_f32(pIn);
+    cmp = vcgtq_f32(inV,zeroV);
+    r = vbslq_f32(cmp,pHalf,mHalf);
+    inV = vaddq_f32(inV, r);
 
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+    pIn += 4;
 
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+    cvt = vcvtq_n_s32_f32(inV,15);
+    outV = vqmovn_s32(cvt);
 
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+    vst1_s16(pDst, outV);
+    pDst += 4;
 
 #else
 
     /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
+    /* Convert from float to q15 and then store the results in the destination buffer */
+    inV = vld1q_f32(pIn);
+
+    cvt = vcvtq_n_s32_f32(inV,15);
+    outV = vqmovn_s32(cvt);
+
+    vst1_s16(pDst, outV);
+    pDst += 4;
+    pIn += 4;
 
 #endif /*      #ifdef ARM_MATH_ROUNDING        */
 
@@ -127,14 +124,14 @@
 
   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
    ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4U;
+  blkCnt = blockSize & 3;
 
   while (blkCnt > 0U)
   {
 
 #ifdef ARM_MATH_ROUNDING
     /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
+    /* Convert from float to q15 and then store the results in the destination buffer */
     in = *pIn++;
     in = (in * 32768.0f);
     in += in > 0.0f ? 0.5f : -0.5f;
@@ -143,7 +140,7 @@
 #else
 
     /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
+    /* Convert from float to q15 and then store the results in the destination buffer */
     *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
 
 #endif /*      #ifdef ARM_MATH_ROUNDING        */
@@ -151,42 +148,97 @@
     /* Decrement the loop counter */
     blkCnt--;
   }
-
-
+}
 #else
+void arm_float_to_q15(
+  const float32_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const float32_t *pIn = pSrc;                         /* Source pointer */
 
-  /* Run the below code for Cortex-M0 */
+#ifdef ARM_MATH_ROUNDING
+        float32_t in;
+#endif /* #ifdef ARM_MATH_ROUNDING */
 
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
 
   while (blkCnt > 0U)
   {
-
-#ifdef ARM_MATH_ROUNDING
     /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0 ? 0.5f : -0.5f;
+
+    /* convert from float to Q15 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+    in = (*pIn++ * 32768.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+
+    in = (*pIn++ * 32768.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+
+    in = (*pIn++ * 32768.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+
+    in = (*pIn++ * 32768.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+
+#else
+
+    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
+    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
+    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
+    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * 32768 */
+
+    /* convert from float to Q15 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+    in = (*pIn++ * 32768.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
     *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
 
 #else
 
     /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
+    /* Convert from float to q15 and then store the results in the destination buffer */
     *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
 
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
+#endif /* #ifdef ARM_MATH_ROUNDING */
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
-
 }
+#endif /* #if defined(ARM_MATH_NEON) */
 
 /**
- * @} end of float_to_x group
+  @} end of float_to_x group
  */
diff --git a/DSP/Source/SupportFunctions/arm_float_to_q31.c b/DSP/Source/SupportFunctions/arm_float_to_q31.c
index d17cc3a..479f8c5 100644
--- a/DSP/Source/SupportFunctions/arm_float_to_q31.c
+++ b/DSP/Source/SupportFunctions/arm_float_to_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_float_to_q31.c
  * Description:  Converts the elements of the floating-point vector to Q31 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,7 +29,7 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupSupport
+  @ingroup groupSupport
  */
 
 /**
@@ -37,56 +37,56 @@
  */
 
 /**
- * @addtogroup float_to_x
- * @{
+  @addtogroup float_to_x
+  @{
  */
 
 /**
- * @brief Converts the elements of the floating-point vector to Q31 vector.
- * @param[in]       *pSrc points to the floating-point input vector
- * @param[out]      *pDst points to the Q31 output vector
- * @param[in]       blockSize length of the input vector
- * @return none.
- *
- *\par Description:
- * \par
- * The equation used for the conversion process is:
- *
- * <pre>
- * 	pDst[n] = (q31_t)(pSrc[n] * 2147483648);   0 <= n < blockSize.
- * </pre>
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
- *
- * \note In order to apply rounding, the library should be rebuilt with the ROUNDING macro
- * defined in the preprocessor section of project options.
+  @brief         Converts the elements of the floating-point vector to Q31 vector.
+  @param[in]     pSrc       points to the floating-point input vector
+  @param[out]    pDst       points to the Q31 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (q31_t)(pSrc[n] * 2147483648);   0 <= n < blockSize.
+  </pre>
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] are saturated.
+
+  @note
+                   In order to apply rounding, the library should be rebuilt with the ROUNDING macro
+                   defined in the preprocessor section of project options.
  */
 
-
+#if defined(ARM_MATH_NEON)
 void arm_float_to_q31(
-  float32_t * pSrc,
+  const float32_t * pSrc,
   q31_t * pDst,
   uint32_t blockSize)
 {
-  float32_t *pIn = pSrc;                         /* Src pointer */
+  const float32_t *pIn = pSrc;                         /* Src pointer */
   uint32_t blkCnt;                               /* loop counter */
 
-#ifdef ARM_MATH_ROUNDING
-
   float32_t in;
+  float32x4_t inV;
+  #ifdef ARM_MATH_ROUNDING
+  float32x4_t zeroV = vdupq_n_f32(0.0f);
+  float32x4_t pHalf = vdupq_n_f32(0.5f / 2147483648.0f);
+  float32x4_t mHalf = vdupq_n_f32(-0.5f / 2147483648.0f);
+  float32x4_t r;
+  uint32x4_t cmp;
+  #endif
 
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
+  int32x4_t outV;
 
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+  /* Compute 4 outputs at a time.
    ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
@@ -94,35 +94,30 @@
 #ifdef ARM_MATH_ROUNDING
 
     /* C = A * 32768 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
+    /* Convert from float to Q31 and then store the results in the destination buffer */
+    inV = vld1q_f32(pIn);
+    cmp = vcgtq_f32(inV,zeroV);
+    r = vbslq_f32(cmp,pHalf,mHalf);
+    inV = vaddq_f32(inV, r);
 
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
+    pIn += 4;
 
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
+    outV = vcvtq_n_s32_f32(inV,31);
 
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
+    vst1q_s32(pDst, outV);
+    pDst += 4;
 
 #else
 
     /* C = A * 2147483648 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
+    /* Convert from float to Q31 and then store the results in the destination buffer */
+    inV = vld1q_f32(pIn);
+
+    outV = vcvtq_n_s32_f32(inV,31);
+
+    vst1q_s32(pDst, outV);
+    pDst += 4;
+    pIn += 4;
 
 #endif /*      #ifdef ARM_MATH_ROUNDING        */
 
@@ -132,7 +127,7 @@
 
   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
    ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4U;
+  blkCnt = blockSize & 3;
 
   while (blkCnt > 0U)
   {
@@ -140,7 +135,7 @@
 #ifdef ARM_MATH_ROUNDING
 
     /* C = A * 2147483648 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
+    /* Convert from float to Q31 and then store the results in the destination buffer */
     in = *pIn++;
     in = (in * 2147483648.0f);
     in += in > 0.0f ? 0.5f : -0.5f;
@@ -149,7 +144,7 @@
 #else
 
     /* C = A * 2147483648 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
+    /* Convert from float to Q31 and then store the results in the destination buffer */
     *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
 
 #endif /*      #ifdef ARM_MATH_ROUNDING        */
@@ -159,41 +154,99 @@
   }
 
 
+}
 #else
+void arm_float_to_q31(
+  const float32_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const float32_t *pIn = pSrc;                         /* Source pointer */
 
-  /* Run the below code for Cortex-M0 */
+#ifdef ARM_MATH_ROUNDING
+        float32_t in;
+#endif /* #ifdef ARM_MATH_ROUNDING */
 
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
 
   while (blkCnt > 0U)
   {
+    /* C = A * 2147483648 */
 
+    /* convert from float to Q31 and store result in destination buffer */
 #ifdef ARM_MATH_ROUNDING
 
-    /* C = A * 2147483648 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0 ? 0.5f : -0.5f;
+    in = (*pIn++ * 2147483648.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = clip_q63_to_q31((q63_t) (in));
+
+    in = (*pIn++ * 2147483648.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = clip_q63_to_q31((q63_t) (in));
+
+    in = (*pIn++ * 2147483648.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = clip_q63_to_q31((q63_t) (in));
+
+    in = (*pIn++ * 2147483648.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
     *pDst++ = clip_q63_to_q31((q63_t) (in));
 
 #else
 
     /* C = A * 2147483648 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
+    /* Convert from float to Q31 and then store the results in the destination buffer */
+    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
+    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
+    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
     *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
 
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
+#endif /* #ifdef ARM_MATH_ROUNDING */
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * 2147483648 */
+
+    /* convert from float to Q31 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+    in = (*pIn++ * 2147483648.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = clip_q63_to_q31((q63_t) (in));
+
+#else
+
+    /* C = A * 2147483648 */
+    /* Convert from float to Q31 and then store the results in the destination buffer */
+    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
 
 }
+#endif /* #if defined(ARM_MATH_NEON) */
 
 /**
- * @} end of float_to_x group
+  @} end of float_to_x group
  */
diff --git a/DSP/Source/SupportFunctions/arm_float_to_q7.c b/DSP/Source/SupportFunctions/arm_float_to_q7.c
index 6629a69..5f2a7eb 100644
--- a/DSP/Source/SupportFunctions/arm_float_to_q7.c
+++ b/DSP/Source/SupportFunctions/arm_float_to_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_float_to_q7.c
  * Description:  Converts the elements of the floating-point vector to Q7 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,12 +29,12 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupSupport
+  @ingroup groupSupport
  */
 
 /**
- * @addtogroup float_to_x
- * @{
+  @addtogroup float_to_x
+  @{
  */
 
 /**
@@ -59,65 +59,73 @@
  * defined in the preprocessor section of project options.
  */
 
-
+#if defined(ARM_MATH_NEON)
 void arm_float_to_q7(
-  float32_t * pSrc,
+  const float32_t * pSrc,
   q7_t * pDst,
   uint32_t blockSize)
 {
-  float32_t *pIn = pSrc;                         /* Src pointer */
+  const float32_t *pIn = pSrc;                         /* Src pointer */
   uint32_t blkCnt;                               /* loop counter */
 
-#ifdef ARM_MATH_ROUNDING
-
   float32_t in;
+  float32x4_t inV;
+  #ifdef ARM_MATH_ROUNDING
+  float32x4_t zeroV = vdupq_n_f32(0.0f);
+  float32x4_t pHalf = vdupq_n_f32(0.5f / 128.0f);
+  float32x4_t mHalf = vdupq_n_f32(-0.5f / 128.0f);
+  float32x4_t r;
+  uint32x4_t cmp;
+  #endif
 
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
+  int32x4_t cvt;
+  int16x4_t cvt1,cvt2;
+  int8x8_t outV;
 
-#if defined (ARM_MATH_DSP)
+  blkCnt = blockSize >> 3U;
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2U;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
+  /* Compute 8 outputs at a time.
+   ** a second loop below computes the remaining 1 to 7 samples. */
   while (blkCnt > 0U)
   {
 
 #ifdef ARM_MATH_ROUNDING
     /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 128);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+    /* Convert from float to q7 and then store the results in the destination buffer */
+    inV = vld1q_f32(pIn);
+    cmp = vcgtq_f32(inV,zeroV);
+    r = vbslq_f32(cmp,pHalf,mHalf);
+    inV = vaddq_f32(inV, r);
+    cvt1 = vqmovn_s32(vcvtq_n_s32_f32(inV,7));
+    pIn += 4;
 
-    in = *pIn++;
-    in = (in * 128);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
-
-    in = *pIn++;
-    in = (in * 128);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
-
-    in = *pIn++;
-    in = (in * 128);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+    inV = vld1q_f32(pIn);
+    cmp = vcgtq_f32(inV,zeroV);
+    r = vbslq_f32(cmp,pHalf,mHalf);
+    inV = vaddq_f32(inV, r);
+    cvt2 = vqmovn_s32(vcvtq_n_s32_f32(inV,7));
+    pIn += 4;
+    
+    outV = vqmovn_s16(vcombine_s16(cvt1,cvt2));
+    vst1_s8(pDst, outV);
+    pDst += 8;
 
 #else
 
     /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
+    /* Convert from float to q7 and then store the results in the destination buffer */
+    inV = vld1q_f32(pIn);
+    cvt1 = vqmovn_s32(vcvtq_n_s32_f32(inV,7));
+    pIn += 4;
 
+    inV = vld1q_f32(pIn);
+    cvt2 = vqmovn_s32(vcvtq_n_s32_f32(inV,7));
+    pIn += 4;
+
+    outV = vqmovn_s16(vcombine_s16(cvt1,cvt2));
+
+    vst1_s8(pDst, outV);
+    pDst += 8;
 #endif /*      #ifdef ARM_MATH_ROUNDING        */
 
     /* Decrement the loop counter */
@@ -126,14 +134,14 @@
 
   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
    ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4U;
+  blkCnt = blockSize & 7;
 
   while (blkCnt > 0U)
   {
 
 #ifdef ARM_MATH_ROUNDING
     /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
+    /* Convert from float to q7 and then store the results in the destination buffer */
     in = *pIn++;
     in = (in * 128);
     in += in > 0.0f ? 0.5f : -0.5f;
@@ -142,7 +150,7 @@
 #else
 
     /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
+    /* Convert from float to q7 and then store the results in the destination buffer */
     *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
 
 #endif /*      #ifdef ARM_MATH_ROUNDING        */
@@ -151,41 +159,95 @@
     blkCnt--;
   }
 
-
+}
 #else
+void arm_float_to_q7(
+  const float32_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const float32_t *pIn = pSrc;                         /* Source pointer */
 
-  /* Run the below code for Cortex-M0 */
+#ifdef ARM_MATH_ROUNDING
+        float32_t in;
+#endif /* #ifdef ARM_MATH_ROUNDING */
 
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
 
   while (blkCnt > 0U)
   {
-#ifdef ARM_MATH_ROUNDING
     /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 128.0f);
-    in += in > 0 ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q31_t) (in), 8));
+
+    /* Convert from float to q7 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+    in = (*pIn++ * 128);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+
+    in = (*pIn++ * 128);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+
+    in = (*pIn++ * 128);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+
+    in = (*pIn++ * 128);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
 
 #else
 
-    /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
-    *pDst++ = (q7_t) __SSAT((q31_t) (*pIn++ * 128.0f), 8);
+    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
+    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
+    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
+    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
 
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
+#endif /* #ifdef ARM_MATH_ROUNDING */
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-#endif /* #if defined (ARM_MATH_DSP) */
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * 128 */
+
+    /* Convert from float to q7 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+    in = (*pIn++ * 128);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+
+#else
+
+    *pDst++ = (q7_t) __SSAT((q31_t) (*pIn++ * 128.0f), 8);
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
 
 }
+#endif /* #if defined(ARM_MATH_NEON) */
 
 /**
- * @} end of float_to_x group
+  @} end of float_to_x group
  */
diff --git a/DSP/Source/SupportFunctions/arm_q15_to_float.c b/DSP/Source/SupportFunctions/arm_q15_to_float.c
index 48ef947..f49d9b7 100644
--- a/DSP/Source/SupportFunctions/arm_q15_to_float.c
+++ b/DSP/Source/SupportFunctions/arm_q15_to_float.c
@@ -3,13 +3,13 @@
  * Title:        arm_q15_to_float.c
  * Description:  Converts the elements of the Q15 vector to floating-point vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,7 +29,7 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupSupport
+  @ingroup groupSupport
  */
 
 /**
@@ -37,74 +37,67 @@
  */
 
 /**
- * @addtogroup q15_to_x
- * @{
+  @addtogroup q15_to_x
+  @{
  */
 
-
-
-
 /**
- * @brief  Converts the elements of the Q15 vector to floating-point vector.
- * @param[in]       *pSrc points to the Q15 input vector
- * @param[out]      *pDst points to the floating-point output vector
- * @param[in]       blockSize length of the input vector
- * @return none.
- *
- * \par Description:
- *
- * The equation used for the conversion process is:
- *
- * <pre>
- * 	pDst[n] = (float32_t) pSrc[n] / 32768;   0 <= n < blockSize.
- * </pre>
- *
+  @brief         Converts the elements of the Q15 vector to floating-point vector.
+  @param[in]     pSrc       points to the Q15 input vector
+  @param[out]    pDst       points to the floating-point output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (float32_t) pSrc[n] / 32768;   0 <= n < blockSize.
+  </pre>
  */
 
-
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
 void arm_q15_to_float(
-  q15_t * pSrc,
+  const q15_t * pSrc,
   float32_t * pDst,
   uint32_t blockSize)
 {
-  q15_t *pIn = pSrc;                             /* Src pointer */
+  const q15_t *pIn = pSrc;                             /* Src pointer */
   uint32_t blkCnt;                               /* loop counter */
 
+  int16x8_t inV;
+  int32x4_t inV0, inV1;
+  float32x4_t outV;
 
-#if defined (ARM_MATH_DSP)
+  blkCnt = blockSize >> 3U;
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2U;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
+  /* Compute 8 outputs at a time.
+   ** a second loop below computes the remaining 1 to 7 samples. */
   while (blkCnt > 0U)
   {
     /* C = (float32_t) A / 32768 */
     /* convert from q15 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
+    inV = vld1q_s16(pIn);
+    pIn += 8;
 
+    inV0 = vmovl_s16(vget_low_s16(inV));
+    inV1 = vmovl_s16(vget_high_s16(inV));
+
+    outV = vcvtq_n_f32_s32(inV0,15);
+    vst1q_f32(pDst, outV);
+    pDst += 4;
+
+    outV = vcvtq_n_f32_s32(inV1,15);
+    vst1q_f32(pDst, outV);
+    pDst += 4;
+  
     /* Decrement the loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+  /* If the blockSize is not a multiple of 8, compute any remaining output samples here.
    ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4U;
+  blkCnt = blockSize & 7;
 
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_DSP) */
 
   while (blkCnt > 0U)
   {
@@ -116,7 +109,58 @@
     blkCnt--;
   }
 }
+#else
+void arm_q15_to_float(
+  const q15_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const q15_t *pIn = pSrc;                             /* Source pointer */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 32768 */
+
+    /* Convert from q15 to float and store result in destination buffer */
+    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
+    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
+    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
+    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 32768 */
+
+    /* Convert from q15 to float and store result in destination buffer */
+    *pDst++ = ((float32_t) *pIn++ / 32768.0f);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* #if defined(ARM_MATH_NEON) */
 
 /**
- * @} end of q15_to_x group
+  @} end of q15_to_x group
  */
diff --git a/DSP/Source/SupportFunctions/arm_q15_to_q31.c b/DSP/Source/SupportFunctions/arm_q15_to_q31.c
index bf139a8..1afd489 100644
--- a/DSP/Source/SupportFunctions/arm_q15_to_q31.c
+++ b/DSP/Source/SupportFunctions/arm_q15_to_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_q15_to_q31.c
  * Description:  Converts the elements of the Q15 vector to Q31 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,57 +29,53 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupSupport
+  @ingroup groupSupport
  */
 
 /**
- * @addtogroup q15_to_x
- * @{
+  @addtogroup q15_to_x
+  @{
  */
 
 /**
- * @brief Converts the elements of the Q15 vector to Q31 vector.
- * @param[in]       *pSrc points to the Q15 input vector
- * @param[out]      *pDst points to the Q31 output vector
- * @param[in]       blockSize length of the input vector
- * @return none.
- *
- * \par Description:
- *
- * The equation used for the conversion process is:
- *
- * <pre>
- * 	pDst[n] = (q31_t) pSrc[n] << 16;   0 <= n < blockSize.
- * </pre>
- *
- */
+  @brief         Converts the elements of the Q15 vector to Q31 vector.
+  @param[in]     pSrc       points to the Q15 input vector
+  @param[out]    pDst       points to the Q31 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
 
+  @par           Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (q31_t) pSrc[n] << 16;   0 <= n < blockSize.
+  </pre>
+ */
 
 void arm_q15_to_q31(
-  q15_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
+  const q15_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-  q15_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+  const q15_t *pIn = pSrc;                             /* Source pointer */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t in1, in2;
+        q31_t out1, out2, out3, out4;
+#endif
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2;
-  q31_t out1, out2, out3, out4;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = (q31_t)A << 16 */
-    /* convert from q15 to q31 and then store the results in the destination buffer */
-    in1 = *__SIMD32(pIn)++;
-    in2 = *__SIMD32(pIn)++;
+
+    /* Convert from q15 to q31 and store result in destination buffer */
+    in1 = read_q15x2_ia ((q15_t **) &pIn);
+    in2 = read_q15x2_ia ((q15_t **) &pIn);
 
 #ifndef ARM_MATH_BIG_ENDIAN
 
@@ -103,42 +99,40 @@
     /* extract lower 16 bits to 32 bit result */
     out4 = in2 << 16U;
 
-#endif //      #ifndef ARM_MATH_BIG_ENDIAN
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     *pDst++ = out1;
     *pDst++ = out2;
     *pDst++ = out3;
     *pDst++ = out4;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
-    /* C = (q31_t)A << 16 */
-    /* convert from q15 to q31 and then store the results in the destination buffer */
-    *pDst++ = (q31_t) * pIn++ << 16;
+    /* C = (q31_t) A << 16 */
 
-    /* Decrement the loop counter */
+    /* Convert from q15 to q31 and store result in destination buffer */
+    *pDst++ = (q31_t) *pIn++ << 16;
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
 }
 
 /**
- * @} end of q15_to_x group
+  @} end of q15_to_x group
  */
diff --git a/DSP/Source/SupportFunctions/arm_q15_to_q7.c b/DSP/Source/SupportFunctions/arm_q15_to_q7.c
index 7a45e58..d118b76 100644
--- a/DSP/Source/SupportFunctions/arm_q15_to_q7.c
+++ b/DSP/Source/SupportFunctions/arm_q15_to_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_q15_to_q7.c
  * Description:  Converts the elements of the Q15 vector to Q7 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,58 +29,55 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupSupport
+  @ingroup groupSupport
  */
 
 /**
- * @addtogroup q15_to_x
- * @{
+  @addtogroup q15_to_x
+  @{
  */
 
-
 /**
- * @brief Converts the elements of the Q15 vector to Q7 vector.
- * @param[in]       *pSrc points to the Q15 input vector
- * @param[out]      *pDst points to the Q7 output vector
- * @param[in]       blockSize length of the input vector
- * @return none.
- *
- * \par Description:
- *
- * The equation used for the conversion process is:
- *
- * <pre>
- * 	pDst[n] = (q7_t) pSrc[n] >> 8;   0 <= n < blockSize.
- * </pre>
- *
- */
+  @brief         Converts the elements of the Q15 vector to Q7 vector.
+  @param[in]     pSrc       points to the Q15 input vector
+  @param[out]    pDst       points to the Q7 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
 
+  @par           Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (q7_t) pSrc[n] >> 8;   0 <= n < blockSize.
+  </pre>
+ */
 
 void arm_q15_to_q7(
-  q15_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
+  const q15_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
 {
-  q15_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+  const q15_t *pIn = pSrc;                             /* Source pointer */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in1, in2;
+        q31_t out1, out2;
+#endif
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2;
-  q31_t out1, out2;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = (q7_t) A >> 8 */
-    /* convert from q15 to q7 and then store the results in the destination buffer */
-    in1 = *__SIMD32(pIn)++;
-    in2 = *__SIMD32(pIn)++;
+
+    /* Convert from q15 to q7 and store result in destination buffer */
+#if defined (ARM_MATH_DSP)
+
+    in1 = read_q15x2_ia ((q15_t **) &pIn);
+    in2 = read_q15x2_ia ((q15_t **) &pIn);
 
 #ifndef ARM_MATH_BIG_ENDIAN
 
@@ -92,7 +89,7 @@
     out1 = __PKHTB(in1, in2, 16);
     out2 = __PKHBT(in1, in2, 16);
 
-#endif //      #ifndef ARM_MATH_BIG_ENDIAN
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     /* rotate packed value by 24 */
     out2 = ((uint32_t) out2 << 8) | ((uint32_t) out2 >> 24);
@@ -106,37 +103,44 @@
     out1 = out1 | out2;
 
     /* store 4 samples at a time to destiantion buffer */
-    *__SIMD32(pDst)++ = out1;
+    write_q7x4_ia (&pDst, out1);
 
-    /* Decrement the loop counter */
+#else
+
+    *pDst++ = (q7_t) (*pIn++ >> 8);
+    *pDst++ = (q7_t) (*pIn++ >> 8);
+    *pDst++ = (q7_t) (*pIn++ >> 8);
+    *pDst++ = (q7_t) (*pIn++ >> 8);
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* C = (q7_t) A >> 8 */
-    /* convert from q15 to q7 and then store the results in the destination buffer */
+
+    /* Convert from q15 to q7 and store result in destination buffer */
     *pDst++ = (q7_t) (*pIn++ >> 8);
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
 }
 
 /**
- * @} end of q15_to_x group
+  @} end of q15_to_x group
  */
diff --git a/DSP/Source/SupportFunctions/arm_q31_to_float.c b/DSP/Source/SupportFunctions/arm_q31_to_float.c
index d2d7505..03e7ec6 100644
--- a/DSP/Source/SupportFunctions/arm_q31_to_float.c
+++ b/DSP/Source/SupportFunctions/arm_q31_to_float.c
@@ -3,13 +3,13 @@
  * Title:        arm_q31_to_float.c
  * Description:  Converts the elements of the Q31 vector to floating-point vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,7 +29,7 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupSupport
+  @ingroup groupSupport
  */
 
 /**
@@ -37,54 +37,51 @@
  */
 
 /**
- * @addtogroup q31_to_x
- * @{
+  @addtogroup q31_to_x
+  @{
  */
 
 /**
- * @brief Converts the elements of the Q31 vector to floating-point vector.
- * @param[in]       *pSrc points to the Q31 input vector
- * @param[out]      *pDst points to the floating-point output vector
- * @param[in]       blockSize length of the input vector
- * @return none.
- *
- * \par Description:
- *
- * The equation used for the conversion process is:
- *
- * <pre>
- * 	pDst[n] = (float32_t) pSrc[n] / 2147483648;   0 <= n < blockSize.
- * </pre>
- *
+  @brief         Converts the elements of the Q31 vector to floating-point vector.
+  @param[in]     pSrc       points to the Q31 input vector
+  @param[out]    pDst       points to the floating-point output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (float32_t) pSrc[n] / 2147483648;   0 <= n < blockSize.
+  </pre>
  */
 
-
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
 void arm_q31_to_float(
-  q31_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
+  const q31_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
 {
-  q31_t *pIn = pSrc;                             /* Src pointer */
+  const q31_t *pIn = pSrc;                             /* Src pointer */
   uint32_t blkCnt;                               /* loop counter */
 
+  int32x4_t inV;
+  float32x4_t outV;
 
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+  /* Compute 4 outputs at a time.
    ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = (float32_t) A / 2147483648 */
-    /* convert from q31 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
-    *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
-    *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
-    *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
+    /* Convert from q31 to float and then store the results in the destination buffer */
+    inV = vld1q_s32(pIn);
+    pIn += 4;
+
+    outV = vcvtq_n_f32_s32(inV,31);
+
+    vst1q_f32(pDst, outV);
+    pDst += 4;
 
     /* Decrement the loop counter */
     blkCnt--;
@@ -92,28 +89,71 @@
 
   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
    ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4U;
+  blkCnt = blockSize & 3;
 
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_DSP) */
 
   while (blkCnt > 0U)
   {
     /* C = (float32_t) A / 2147483648 */
-    /* convert from q31 to float and then store the results in the destination buffer */
+    /* Convert from q31 to float and then store the results in the destination buffer */
     *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
 
     /* Decrement the loop counter */
     blkCnt--;
   }
 }
+#else
+void arm_q31_to_float(
+  const q31_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  const q31_t *pIn = pSrc;                             /* Src pointer */
+  uint32_t blkCnt;                               /* loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 2147483648 */
+
+    /* Convert from q31 to float and store result in destination buffer */
+    *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
+    *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
+    *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
+    *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 2147483648 */
+
+    /* Convert from q31 to float and store result in destination buffer */
+    *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* #if defined(ARM_MATH_NEON) */
 
 /**
- * @} end of q31_to_x group
+  @} end of q31_to_x group
  */
diff --git a/DSP/Source/SupportFunctions/arm_q31_to_q15.c b/DSP/Source/SupportFunctions/arm_q31_to_q15.c
index c460fe7..8d82c28 100644
--- a/DSP/Source/SupportFunctions/arm_q31_to_q15.c
+++ b/DSP/Source/SupportFunctions/arm_q31_to_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_q31_to_q15.c
  * Description:  Converts the elements of the Q31 vector to Q15 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,55 +29,53 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupSupport
+  @ingroup groupSupport
  */
 
 /**
- * @addtogroup q31_to_x
- * @{
+  @addtogroup q31_to_x
+  @{
  */
 
 /**
- * @brief Converts the elements of the Q31 vector to Q15 vector.
- * @param[in]       *pSrc points to the Q31 input vector
- * @param[out]      *pDst points to the Q15 output vector
- * @param[in]       blockSize length of the input vector
- * @return none.
- *
- * \par Description:
- *
- * The equation used for the conversion process is:
- *
- * <pre>
- * 	pDst[n] = (q15_t) pSrc[n] >> 16;   0 <= n < blockSize.
- * </pre>
- *
- */
+  @brief         Converts the elements of the Q31 vector to Q15 vector.
+  @param[in]     pSrc       points to the Q31 input vector
+  @param[out]    pDst       points to the Q15 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
 
+  @par           Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (q15_t) pSrc[n] >> 16;   0 <= n < blockSize.
+  </pre>
+ */
 
 void arm_q31_to_q15(
-  q31_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
+  const q31_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
-  q31_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+  const q31_t *pIn = pSrc;                             /* Source pointer */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in1, in2, in3, in4;
+        q31_t out1, out2;
+#endif
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
-  q31_t out1, out2;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* C = (q15_t) A >> 16 */
-    /* convert from q31 to q15 and then store the results in the destination buffer */
+    /* C = (q15_t) (A >> 16) */
+
+    /* Convert from q31 to q15 and store result in destination buffer */
+#if defined (ARM_MATH_DSP)
+
     in1 = *pIn++;
     in2 = *pIn++;
     in3 = *pIn++;
@@ -85,49 +83,52 @@
 
     /* pack two higher 16-bit values from two 32-bit values */
 #ifndef ARM_MATH_BIG_ENDIAN
-
     out1 = __PKHTB(in2, in1, 16);
     out2 = __PKHTB(in4, in3, 16);
+#else
+    out1 = __PKHTB(in1, in2, 16);
+    out2 = __PKHTB(in3, in4, 16);
+#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
+
+    write_q15x2_ia (&pDst, out1);
+    write_q15x2_ia (&pDst, out2);
 
 #else
 
-    out1 = __PKHTB(in1, in2, 16);
-    out2 = __PKHTB(in3, in4, 16);
+    *pDst++ = (q15_t) (*pIn++ >> 16);
+    *pDst++ = (q15_t) (*pIn++ >> 16);
+    *pDst++ = (q15_t) (*pIn++ >> 16);
+    *pDst++ = (q15_t) (*pIn++ >> 16);
 
-#endif //      #ifdef ARM_MATH_BIG_ENDIAN
+#endif /* #if defined (ARM_MATH_DSP) */
 
-    *__SIMD32(pDst)++ = out1;
-    *__SIMD32(pDst)++ = out2;
-
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
-    /* C = (q15_t) A >> 16 */
-    /* convert from q31 to q15 and then store the results in the destination buffer */
+    /* C = (q15_t) (A >> 16) */
+
+    /* Convert from q31 to q15 and store result in destination buffer */
     *pDst++ = (q15_t) (*pIn++ >> 16);
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
 }
 
 /**
- * @} end of q31_to_x group
+  @} end of q31_to_x group
  */
diff --git a/DSP/Source/SupportFunctions/arm_q31_to_q7.c b/DSP/Source/SupportFunctions/arm_q31_to_q7.c
index f092bed..c7d1b4c 100644
--- a/DSP/Source/SupportFunctions/arm_q31_to_q7.c
+++ b/DSP/Source/SupportFunctions/arm_q31_to_q7.c
@@ -3,13 +3,13 @@
  * Title:        arm_q31_to_q7.c
  * Description:  Converts the elements of the Q31 vector to Q7 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,96 +29,82 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupSupport
+  @ingroup groupSupport
  */
 
 /**
- * @addtogroup q31_to_x
- * @{
+  @addtogroup q31_to_x
+  @{
  */
 
 /**
- * @brief Converts the elements of the Q31 vector to Q7 vector.
- * @param[in]       *pSrc points to the Q31 input vector
- * @param[out]      *pDst points to the Q7 output vector
- * @param[in]       blockSize length of the input vector
- * @return none.
- *
- * \par Description:
- *
- * The equation used for the conversion process is:
- *
- * <pre>
- * 	pDst[n] = (q7_t) pSrc[n] >> 24;   0 <= n < blockSize.
- * </pre>
- *
- */
+  @brief         Converts the elements of the Q31 vector to Q7 vector.
+  @param[in]     pSrc       points to the Q31 input vector
+  @param[out]    pDst       points to the Q7 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
 
+  @par           Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (q7_t) pSrc[n] >> 24;   0 <= n < blockSize.
+  </pre>
+ */
 
 void arm_q31_to_q7(
-  q31_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
+  const q31_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
 {
-  q31_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+  const q31_t *pIn = pSrc;                             /* Source pointer */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
   q7_t out1, out2, out3, out4;
 
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
-    /* C = (q7_t) A >> 24 */
-    /* convert from q31 to q7 and then store the results in the destination buffer */
-    in1 = *pIn++;
-    in2 = *pIn++;
-    in3 = *pIn++;
-    in4 = *pIn++;
+    /* C = (q7_t) (A >> 24) */
 
-    out1 = (q7_t) (in1 >> 24);
-    out2 = (q7_t) (in2 >> 24);
-    out3 = (q7_t) (in3 >> 24);
-    out4 = (q7_t) (in4 >> 24);
+    /* Convert from q31 to q7 and store result in destination buffer */
 
-    *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
+    out1 = (q7_t) (*pIn++ >> 24);
+    out2 = (q7_t) (*pIn++ >> 24);
+    out3 = (q7_t) (*pIn++ >> 24);
+    out4 = (q7_t) (*pIn++ >> 24);
+    write_q7x4_ia (&pDst, __PACKq7(out1, out2, out3, out4));
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
-    /* C = (q7_t) A >> 24 */
-    /* convert from q31 to q7 and then store the results in the destination buffer */
+    /* C = (q7_t) (A >> 24) */
+
+    /* Convert from q31 to q7 and store result in destination buffer */
     *pDst++ = (q7_t) (*pIn++ >> 24);
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
 }
 
 /**
- * @} end of q31_to_x group
+  @} end of q31_to_x group
  */
diff --git a/DSP/Source/SupportFunctions/arm_q7_to_float.c b/DSP/Source/SupportFunctions/arm_q7_to_float.c
index ace437f..6bd86bf 100644
--- a/DSP/Source/SupportFunctions/arm_q7_to_float.c
+++ b/DSP/Source/SupportFunctions/arm_q7_to_float.c
@@ -3,13 +3,13 @@
  * Title:        arm_q7_to_float.c
  * Description:  Converts the elements of the Q7 vector to floating-point vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,7 +29,7 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupSupport
+  @ingroup groupSupport
  */
 
 /**
@@ -37,83 +37,143 @@
  */
 
 /**
- * @addtogroup q7_to_x
- * @{
+  @addtogroup q7_to_x
+  @{
  */
 
 /**
- * @brief Converts the elements of the Q7 vector to floating-point vector.
- * @param[in]       *pSrc points to the Q7 input vector
- * @param[out]      *pDst points to the floating-point output vector
- * @param[in]       blockSize length of the input vector
- * @return none.
- *
- * \par Description:
- *
- * The equation used for the conversion process is:
- *
- * <pre>
- * 	pDst[n] = (float32_t) pSrc[n] / 128;   0 <= n < blockSize.
- * </pre>
- *
+  @brief         Converts the elements of the Q7 vector to floating-point vector.
+  @param[in]     pSrc       points to the Q7 input vector
+  @param[out]    pDst       points to the floating-point output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+ @par            Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (float32_t) pSrc[n] / 128;   0 <= n < blockSize.
+  </pre>
  */
 
-
+#if defined(ARM_MATH_NEON)
 void arm_q7_to_float(
-  q7_t * pSrc,
+  const q7_t * pSrc,
   float32_t * pDst,
   uint32_t blockSize)
 {
-  q7_t *pIn = pSrc;                              /* Src pointer */
+  const q7_t *pIn = pSrc;                              /* Src pointer */
   uint32_t blkCnt;                               /* loop counter */
 
+  int8x16_t inV;
+  int16x8_t inVLO, inVHI;
+  int32x4_t inVLL, inVLH, inVHL, inVHH;
+  float32x4_t outV;
 
-#if defined (ARM_MATH_DSP)
+  blkCnt = blockSize >> 4U;
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2U;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
+  /* Compute 16 outputs at a time.
+   ** a second loop below computes the remaining 1 to 15 samples. */
   while (blkCnt > 0U)
   {
     /* C = (float32_t) A / 128 */
-    /* convert from q7 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
+    /* Convert from q7 to float and then store the results in the destination buffer */
+    inV = vld1q_s8(pIn);
+    pIn += 16;
+
+    inVLO = vmovl_s8(vget_low_s8(inV));
+    inVHI = vmovl_s8(vget_high_s8(inV));
+
+    inVLL = vmovl_s16(vget_low_s16(inVLO));
+    inVLH = vmovl_s16(vget_high_s16(inVLO));
+    inVHL = vmovl_s16(vget_low_s16(inVHI));
+    inVHH = vmovl_s16(vget_high_s16(inVHI));
+
+    outV = vcvtq_n_f32_s32(inVLL,7);
+    vst1q_f32(pDst, outV);
+    pDst += 4;
+
+    outV = vcvtq_n_f32_s32(inVLH,7);
+    vst1q_f32(pDst, outV);
+    pDst += 4;
+
+    outV = vcvtq_n_f32_s32(inVHL,7);
+    vst1q_f32(pDst, outV);
+    pDst += 4;
+
+    outV = vcvtq_n_f32_s32(inVHH,7);
+    vst1q_f32(pDst, outV);
+    pDst += 4;
 
     /* Decrement the loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+  /* If the blockSize is not a multiple of 16, compute any remaining output samples here.
    ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_DSP) */
+  blkCnt = blockSize & 0xF;
 
   while (blkCnt > 0U)
   {
     /* C = (float32_t) A / 128 */
-    /* convert from q7 to float and then store the results in the destination buffer */
+    /* Convert from q7 to float and then store the results in the destination buffer */
     *pDst++ = ((float32_t) * pIn++ / 128.0f);
 
     /* Decrement the loop counter */
     blkCnt--;
   }
 }
+#else
+void arm_q7_to_float(
+  const q7_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const q7_t *pIn = pSrc;                              /* Source pointer */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 128 */
+
+    /* Convert from q7 to float and store result in destination buffer */
+    *pDst++ = ((float32_t) * pIn++ / 128.0f);
+    *pDst++ = ((float32_t) * pIn++ / 128.0f);
+    *pDst++ = ((float32_t) * pIn++ / 128.0f);
+    *pDst++ = ((float32_t) * pIn++ / 128.0f);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 128 */
+
+    /* Convert from q7 to float and store result in destination buffer */
+    *pDst++ = ((float32_t) * pIn++ / 128.0f);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* #if defined(ARM_MATH_NEON) */
 
 /**
- * @} end of q7_to_x group
+  @} end of q7_to_x group
  */
diff --git a/DSP/Source/SupportFunctions/arm_q7_to_q15.c b/DSP/Source/SupportFunctions/arm_q7_to_q15.c
index 5348194..89afd10 100644
--- a/DSP/Source/SupportFunctions/arm_q7_to_q15.c
+++ b/DSP/Source/SupportFunctions/arm_q7_to_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_q7_to_q15.c
  * Description:  Converts the elements of the Q7 vector to Q15 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,60 +29,55 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupSupport
+  @ingroup groupSupport
  */
 
 /**
- * @addtogroup q7_to_x
- * @{
+  @addtogroup q7_to_x
+  @{
  */
 
-
-
-
 /**
- * @brief Converts the elements of the Q7 vector to Q15 vector.
- * @param[in]       *pSrc points to the Q7 input vector
- * @param[out]      *pDst points to the Q15 output vector
- * @param[in]       blockSize length of the input vector
- * @return none.
- *
- * \par Description:
- *
- * The equation used for the conversion process is:
- *
- * <pre>
- * 	pDst[n] = (q15_t) pSrc[n] << 8;   0 <= n < blockSize.
- * </pre>
- *
- */
+  @brief         Converts the elements of the Q7 vector to Q15 vector.
+  @param[in]     pSrc       points to the Q7 input vector
+  @param[out]    pDst       points to the Q15 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
 
+  @par           Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (q15_t) pSrc[n] << 8;   0 <= n < blockSize.
+  </pre>
+ */
 
 void arm_q7_to_q15(
-  q7_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
+  const q7_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
 {
-  q7_t *pIn = pSrc;                              /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+  const q7_t *pIn = pSrc;                              /* Source pointer */
 
-#if defined (ARM_MATH_DSP)
-  q31_t in;
-  q31_t in1, in2;
-  q31_t out1, out2;
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in;
+        q31_t in1, in2;
+        q31_t out1, out2;
+#endif
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = (q15_t) A << 8 */
-    /* convert from q7 to q15 and then store the results in the destination buffer */
-    in = *__SIMD32(pIn)++;
+
+    /* Convert from q7 to q15 and store result in destination buffer */
+#if defined (ARM_MATH_DSP)
+
+    in = read_q7x4_ia ((q7_t **) &pIn);
 
     /* rotatate in by 8 and extend two q7_t values to q15_t values */
     in1 = __SXTB16(__ROR(in, 8));
@@ -97,49 +92,52 @@
     in2 = in2 & 0xFF00FF00;
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     out2 = __PKHTB(in1, in2, 16);
     out1 = __PKHBT(in2, in1, 16);
+#else
+    out1 = __PKHTB(in1, in2, 16);
+    out2 = __PKHBT(in2, in1, 16);
+#endif
+
+    write_q15x2_ia (&pDst, out1);
+    write_q15x2_ia (&pDst, out2);
 
 #else
 
-    out1 = __PKHTB(in1, in2, 16);
-    out2 = __PKHBT(in2, in1, 16);
+    *pDst++ = (q15_t) *pIn++ << 8;
+    *pDst++ = (q15_t) *pIn++ << 8;
+    *pDst++ = (q15_t) *pIn++ << 8;
+    *pDst++ = (q15_t) *pIn++ << 8;
 
-#endif
+#endif /* #if defined (ARM_MATH_DSP) */
 
-    *__SIMD32(pDst)++ = out1;
-    *__SIMD32(pDst)++ = out2;
-
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* C = (q15_t) A << 8 */
-    /* convert from q7 to q15 and then store the results in the destination buffer */
+
+    /* Convert from q7 to q15 and store result in destination buffer */
     *pDst++ = (q15_t) * pIn++ << 8;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
 }
 
 /**
- * @} end of q7_to_x group
+  @} end of q7_to_x group
  */
diff --git a/DSP/Source/SupportFunctions/arm_q7_to_q31.c b/DSP/Source/SupportFunctions/arm_q7_to_q31.c
index 27d0952..641c02d 100644
--- a/DSP/Source/SupportFunctions/arm_q7_to_q31.c
+++ b/DSP/Source/SupportFunctions/arm_q7_to_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_q7_to_q31.c
  * Description:  Converts the elements of the Q7 vector to Q31 vector
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,56 +29,49 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupSupport
+  @ingroup groupSupport
  */
 
 /**
- * @addtogroup q7_to_x
- * @{
+  @addtogroup q7_to_x
+  @{
  */
 
 /**
- * @brief Converts the elements of the Q7 vector to Q31 vector.
- * @param[in]       *pSrc points to the Q7 input vector
- * @param[out]      *pDst points to the Q31 output vector
- * @param[in]       blockSize length of the input vector
- * @return none.
- *
- * \par Description:
- *
- * The equation used for the conversion process is:
- *
- * <pre>
- * 	pDst[n] = (q31_t) pSrc[n] << 24;   0 <= n < blockSize.
- * </pre>
- *
- */
+  @brief         Converts the elements of the Q7 vector to Q31 vector.
+  @param[in]     pSrc       points to the Q7 input vector
+  @param[out]    pDst       points to the Q31 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
 
+  @par           Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (q31_t) pSrc[n] << 24;   0 <= n < blockSize.
+  </pre>
+ */
 
 void arm_q7_to_q31(
-  q7_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
+  const q7_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
 {
-  q7_t *pIn = pSrc;                              /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
+        uint32_t blkCnt;                               /* Loop counter */
+  const q7_t *pIn = pSrc;                              /* Source pointer */
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-  q31_t in;
+        q31_t in;
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
+  /* Loop unrolling: Compute 4 outputs at a time */
   blkCnt = blockSize >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
   while (blkCnt > 0U)
   {
     /* C = (q31_t) A << 24 */
-    /* convert from q7 to q31 and then store the results in the destination buffer */
-    in = *__SIMD32(pIn)++;
+
+    /* Convert from q7 to q31 and store result in destination buffer */
+    in = read_q7x4_ia ((q7_t **) &pIn);
 
 #ifndef ARM_MATH_BIG_ENDIAN
 
@@ -94,37 +87,35 @@
     *pDst++ = (__ROR(in, 16)) & 0xFF000000;
     *pDst++ = (__ROR(in, 8)) & 0xFF000000;
 
-#endif //              #ifndef ARM_MATH_BIG_ENDIAN
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
+  /* Loop unrolling: Compute remaining outputs */
   blkCnt = blockSize % 0x4U;
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
+  /* Initialize blkCnt with number of samples */
   blkCnt = blockSize;
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
   while (blkCnt > 0U)
   {
     /* C = (q31_t) A << 24 */
-    /* convert from q7 to q31 and then store the results in the destination buffer */
+
+    /* Convert from q7 to q31 and store result in destination buffer */
     *pDst++ = (q31_t) * pIn++ << 24;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blkCnt--;
   }
 
 }
 
 /**
- * @} end of q7_to_x group
+  @} end of q7_to_x group
  */
diff --git a/DSP/Source/TransformFunctions/CMakeLists.txt b/DSP/Source/TransformFunctions/CMakeLists.txt
new file mode 100644
index 0000000..4e5b4f2
--- /dev/null
+++ b/DSP/Source/TransformFunctions/CMakeLists.txt
@@ -0,0 +1,116 @@
+cmake_minimum_required (VERSION 3.6)
+
+project(CMSISDSPTransform)
+
+
+
+add_library(CMSISDSPTransform STATIC)
+
+include(fft)
+fft(CMSISDSPTransform)
+
+if (CONFIGTABLE AND ALLFFT)
+target_compile_definitions(CMSISDSPTransform PUBLIC ARM_ALL_FFT_TABLES) 
+endif() 
+
+target_sources(CMSISDSPTransform PRIVATE arm_bitreversal.c)
+target_sources(CMSISDSPTransform PRIVATE arm_bitreversal2.c)
+
+if (NOT CONFIGTABLE OR ALLFFT OR CFFT_F32_16 OR CFFT_F32_32 OR CFFT_F32_64 OR CFFT_F32_128 OR CFFT_F32_256 OR CFFT_F32_512 
+    OR CFFT_F32_1024 OR CFFT_F32_2048 OR CFFT_F32_4096)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_f32.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_f32.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix8_f32.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_f32.c)
+endif()
+
+if (NOT CONFIGTABLE OR ALLFFT OR CFFT_Q15_16 OR CFFT_Q15_32 OR CFFT_Q15_64 OR CFFT_Q15_128 OR CFFT_Q15_256 OR CFFT_Q15_512 
+    OR CFFT_Q15_1024 OR CFFT_Q15_2048 OR CFFT_Q15_4096)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_q15.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q15.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_q15.c)
+endif()
+
+if (NOT CONFIGTABLE OR ALLFFT OR CFFT_Q31_16 OR CFFT_Q31_32 OR CFFT_Q31_64 OR CFFT_Q31_128 OR CFFT_Q31_256 OR CFFT_Q31_512 
+    OR CFFT_Q31_1024 OR CFFT_Q31_2048 OR CFFT_Q31_4096)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_q31.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q31.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_q31.c)
+endif()
+
+if (NOT CONFIGTABLE OR ALLFFT)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_init_q15.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_init_q31.c)
+endif()
+
+if (NOT CONFIGTABLE OR ALLFFT OR DCT4_F32_128 OR DCT4_F32_512 OR DCT4_F32_2048 OR DCT4_F32_8192)
+target_sources(CMSISDSPTransform PRIVATE arm_dct4_f32.c)
+target_sources(CMSISDSPTransform PRIVATE arm_dct4_init_f32.c)
+
+target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_f32.c)
+target_sources(CMSISDSPTransform PRIVATE arm_rfft_f32.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_f32.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_f32.c)
+endif()
+
+if (NOT CONFIGTABLE OR ALLFFT OR DCT4_Q31_128 OR DCT4_Q31_512 OR DCT4_Q31_2048 OR DCT4_Q31_8192)
+target_sources(CMSISDSPTransform PRIVATE arm_dct4_q31.c)
+target_sources(CMSISDSPTransform PRIVATE arm_dct4_init_q31.c)
+
+target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_q31.c)
+target_sources(CMSISDSPTransform PRIVATE arm_rfft_q31.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_q31.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_q31.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q31.c)
+endif()
+
+if (NOT CONFIGTABLE OR ALLFFT OR ALLFFT OR DCT4_Q15_128 OR DCT4_Q15_512 OR DCT4_Q15_2048 OR DCT4_Q15_8192)
+target_sources(CMSISDSPTransform PRIVATE arm_dct4_init_q15.c)
+target_sources(CMSISDSPTransform PRIVATE arm_dct4_q15.c)
+
+target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_q15.c)
+target_sources(CMSISDSPTransform PRIVATE arm_rfft_q15.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_q15.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_q15.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q15.c)
+endif()
+
+if (NOT CONFIGTABLE OR ALLFFT OR RFFT_FAST_F32_32 OR RFFT_FAST_F32_64 OR RFFT_FAST_F32_128
+   OR RFFT_FAST_F32_256 OR RFFT_FAST_F32_512 OR RFFT_FAST_F32_1024 OR RFFT_FAST_F32_2048
+   OR RFFT_FAST_F32_4096 )
+target_sources(CMSISDSPTransform PRIVATE arm_rfft_fast_f32.c)
+target_sources(CMSISDSPTransform PRIVATE arm_rfft_fast_init_f32.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_f32.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix8_f32.c)
+endif()
+
+if (NOT CONFIGTABLE OR ALLFFT OR RFFT_F32_128 OR RFFT_F32_512 OR RFFT_F32_2048 OR RFFT_F32_8192)
+target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_f32.c)
+target_sources(CMSISDSPTransform PRIVATE arm_rfft_f32.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_f32.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_f32.c)
+endif()
+
+if (NOT CONFIGTABLE OR ALLFFT OR RFFT_Q15_32 OR RFFT_Q15_64 OR RFFT_Q15_128 OR RFFT_Q15_256
+     OR RFFT_Q15_512 OR RFFT_Q15_1024 OR RFFT_Q15_2048 OR RFFT_Q15_4096 OR RFFT_Q15_8192)
+target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_q15.c)
+target_sources(CMSISDSPTransform PRIVATE arm_rfft_q15.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_q15.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q15.c)
+endif()
+
+if (NOT CONFIGTABLE OR ALLFFT OR RFFT_Q31_32 OR RFFT_Q31_64 OR RFFT_Q31_128 OR RFFT_Q31_256
+     OR RFFT_Q31_512 OR RFFT_Q31_1024 OR RFFT_Q31_2048 OR RFFT_Q31_4096 OR RFFT_Q31_8192)
+target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_q31.c)
+target_sources(CMSISDSPTransform PRIVATE arm_rfft_q31.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_q31.c)
+target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q31.c)
+endif()
+
+configdsp(CMSISDSPTransform ..)
+
+### Includes
+target_include_directories(CMSISDSPTransform PUBLIC "${DSP}/../../Include")
+
+
+
diff --git a/DSP/Source/TransformFunctions/TransformFunctions.c b/DSP/Source/TransformFunctions/TransformFunctions.c
new file mode 100644
index 0000000..d0f7ce4
--- /dev/null
+++ b/DSP/Source/TransformFunctions/TransformFunctions.c
@@ -0,0 +1,60 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        TransformFunctions.c
+ * Description:  Combination of all transform function source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_bitreversal.c"
+#include "arm_bitreversal2.c"
+#include "arm_cfft_f32.c"
+#include "arm_cfft_q15.c"
+#include "arm_cfft_q31.c"
+#include "arm_cfft_radix2_f32.c"
+#include "arm_cfft_radix2_init_f32.c"
+#include "arm_cfft_radix2_init_q15.c"
+#include "arm_cfft_radix2_init_q31.c"
+#include "arm_cfft_radix2_q15.c"
+#include "arm_cfft_radix2_q31.c"
+#include "arm_cfft_radix4_f32.c"
+#include "arm_cfft_radix4_init_f32.c"
+#include "arm_cfft_radix4_init_q15.c"
+#include "arm_cfft_radix4_init_q31.c"
+#include "arm_cfft_radix4_q15.c"
+#include "arm_cfft_radix4_q31.c"
+#include "arm_cfft_radix8_f32.c"
+#include "arm_dct4_f32.c"
+#include "arm_dct4_init_f32.c"
+#include "arm_dct4_init_q15.c"
+#include "arm_dct4_init_q31.c"
+#include "arm_dct4_q15.c"
+#include "arm_dct4_q31.c"
+#include "arm_rfft_f32.c"
+#include "arm_rfft_fast_f32.c"
+#include "arm_rfft_fast_init_f32.c"
+#include "arm_rfft_init_f32.c"
+#include "arm_rfft_init_q15.c"
+#include "arm_rfft_init_q31.c"
+#include "arm_rfft_q15.c"
+#include "arm_rfft_q31.c"
diff --git a/DSP/Source/TransformFunctions/arm_bitreversal.c b/DSP/Source/TransformFunctions/arm_bitreversal.c
index cea4821..c608129 100644
--- a/DSP/Source/TransformFunctions/arm_bitreversal.c
+++ b/DSP/Source/TransformFunctions/arm_bitreversal.c
@@ -3,13 +3,13 @@
  * Title:        arm_bitreversal.c
  * Description:  Bitreversal functions
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,20 +29,20 @@
 #include "arm_math.h"
 #include "arm_common_tables.h"
 
-/*
-* @brief  In-place bit reversal function.
-* @param[in, out] *pSrc        points to the in-place buffer of floating-point data type.
-* @param[in]      fftSize      length of the FFT.
-* @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table.
-* @param[in]      *pBitRevTab  points to the bit reversal table.
-* @return none.
-*/
+/**
+  @brief         In-place floating-point bit reversal function.
+  @param[in,out] pSrc         points to in-place floating-point data buffer
+  @param[in]     fftSize      length of FFT
+  @param[in]     bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
+  @param[in]     pBitRevTab   points to bit reversal table
+  @return        none
+ */
 
 void arm_bitreversal_f32(
-float32_t * pSrc,
-uint16_t fftSize,
-uint16_t bitRevFactor,
-uint16_t * pBitRevTab)
+        float32_t * pSrc,
+        uint16_t fftSize,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab)
 {
    uint16_t fftLenBy2, fftLenBy2p1;
    uint16_t i, j;
@@ -100,21 +100,20 @@
 }
 
 
-
-/*
-* @brief  In-place bit reversal function.
-* @param[in, out] *pSrc        points to the in-place buffer of Q31 data type.
-* @param[in]      fftLen       length of the FFT.
-* @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
-* @param[in]      *pBitRevTab  points to bit reversal table.
-* @return none.
+/**
+  @brief         In-place Q31 bit reversal function.
+  @param[in,out] pSrc         points to in-place Q31 data buffer.
+  @param[in]     fftLen       length of FFT.
+  @param[in]     bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
+  @param[in]     pBitRevTab   points to bit reversal table
+  @return        none
 */
 
 void arm_bitreversal_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-uint16_t bitRevFactor,
-uint16_t * pBitRevTable)
+        q31_t * pSrc,
+        uint32_t fftLen,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab)
 {
    uint32_t fftLenBy2, fftLenBy2p1, i, j;
    q31_t in;
@@ -163,29 +162,29 @@
       pSrc[(2U * (j + fftLenBy2)) + 1U] = in;
 
       /*  Reading the index for the bit reversal */
-      j = *pBitRevTable;
+      j = *pBitRevTab;
 
       /*  Updating the bit reversal index depending on the fft length */
-      pBitRevTable += bitRevFactor;
+      pBitRevTab += bitRevFactor;
    }
 }
 
 
 
-/*
-   * @brief  In-place bit reversal function.
-   * @param[in, out] *pSrc        points to the in-place buffer of Q15 data type.
-   * @param[in]      fftLen       length of the FFT.
-   * @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
-   * @param[in]      *pBitRevTab  points to bit reversal table.
-   * @return none.
+/**
+  @brief         In-place Q15 bit reversal function.
+  @param[in,out] pSrc16       points to in-place Q15 data buffer
+  @param[in]     fftLen       length of FFT
+  @param[in]     bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
+  @param[in]     pBitRevTab   points to bit reversal table
+  @return        none
 */
 
 void arm_bitreversal_q15(
-q15_t * pSrc16,
-uint32_t fftLen,
-uint16_t bitRevFactor,
-uint16_t * pBitRevTab)
+        q15_t * pSrc16,
+        uint32_t fftLen,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab)
 {
    q31_t *pSrc = (q31_t *) pSrc16;
    q31_t in;
diff --git a/DSP/Source/TransformFunctions/arm_bitreversal2.S b/DSP/Source/TransformFunctions/arm_bitreversal2.S
index e0a82db..c16091b 100644
--- a/DSP/Source/TransformFunctions/arm_bitreversal2.S
+++ b/DSP/Source/TransformFunctions/arm_bitreversal2.S
@@ -5,13 +5,13 @@
 ; *               Called after doing an fft to reorder the output.
 ; *               The function is loop unrolled by 2. arm_bitreversal_16 as well.
 ; *
-; * $Date:        27. January 2017
-; * $Revision:    V.1.5.1
+; * $Date:        18. March 2019
+; * $Revision:    V1.5.2
 ; *
 ; * Target Processor: Cortex-M cores
 ; * -------------------------------------------------------------------- */
 ;/*
-; * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+; * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
 ; *
 ; * SPDX-License-Identifier: Apache-2.0
 ; *
@@ -68,13 +68,13 @@
 	CODESECT
 	THUMB
 
-;/*
-;* @brief  In-place bit reversal function.
-;* @param[in, out] *pSrc        points to the in-place buffer of unknown 32-bit data type.
-;* @param[in]      bitRevLen    bit reversal table length
-;* @param[in]      *pBitRevTab  points to bit reversal table.
-;* @return none.
-;*/
+;/**
+;  @brief         In-place bit reversal function.
+;  @param[in,out] pSrc        points to the in-place buffer of unknown 32-bit data type
+;  @param[in]     bitRevLen   bit reversal table length
+;  @param[in]     pBitRevTab  points to bit reversal table
+;  @return        none
+; */
 	EXPORT arm_bitreversal_32
 	EXPORT arm_bitreversal_16
 
@@ -87,7 +87,7 @@
 	.type   arm_bitreversal_32, %function
 #endif
 
-#if defined(ARM_MATH_CM0) || defined(ARM_MATH_CM0PLUS) || defined(ARM_MATH_ARMV8MBL)
+#if defined (ARM_MATH_CM0_FAMILY)
 
 arm_bitreversal_32 PROC
 	ADDS     r3,r1,#1
diff --git a/DSP/Source/TransformFunctions/arm_bitreversal2.c b/DSP/Source/TransformFunctions/arm_bitreversal2.c
new file mode 100644
index 0000000..c5fe60f
--- /dev/null
+++ b/DSP/Source/TransformFunctions/arm_bitreversal2.c
@@ -0,0 +1,99 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_bitreversal2.c
+ * Description:  Bitreversal functions
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @brief         In-place 32 bit reversal function.
+  @param[in,out] pSrc        points to in-place buffer of unknown 32-bit data type
+  @param[in]     bitRevLen   bit reversal table length
+  @param[in]     pBitRevTab  points to bit reversal table
+  @return        none
+*/
+
+void arm_bitreversal_32(
+        uint32_t *pSrc, 
+  const uint16_t bitRevLen, 
+  const uint16_t *pBitRevTab)
+{
+  uint32_t a, b, i, tmp;
+
+  for (i = 0; i < bitRevLen; )
+  {
+     a = pBitRevTab[i    ] >> 2;
+     b = pBitRevTab[i + 1] >> 2;
+
+     //real
+     tmp = pSrc[a];
+     pSrc[a] = pSrc[b];
+     pSrc[b] = tmp;
+
+     //complex
+     tmp = pSrc[a+1];
+     pSrc[a+1] = pSrc[b+1];
+     pSrc[b+1] = tmp;
+
+    i += 2;
+  }
+}
+
+
+/**
+  @brief         In-place 16 bit reversal function.
+  @param[in,out] pSrc        points to in-place buffer of unknown 16-bit data type
+  @param[in]     bitRevLen   bit reversal table length
+  @param[in]     pBitRevTab  points to bit reversal table
+  @return        none
+*/
+
+void arm_bitreversal_16(
+        uint16_t *pSrc, 
+  const uint16_t bitRevLen, 
+  const uint16_t *pBitRevTab)
+{
+  uint16_t a, b, i, tmp;
+
+  for (i = 0; i < bitRevLen; )
+  {
+     a = pBitRevTab[i    ] >> 2;
+     b = pBitRevTab[i + 1] >> 2;
+
+     //real
+     tmp = pSrc[a];
+     pSrc[a] = pSrc[b];
+     pSrc[b] = tmp;
+
+     //complex
+     tmp = pSrc[a+1];
+     pSrc[a+1] = pSrc[b+1];
+     pSrc[b+1] = tmp;
+
+    i += 2;
+  }
+}
diff --git a/DSP/Source/TransformFunctions/arm_cfft_f32.c b/DSP/Source/TransformFunctions/arm_cfft_f32.c
index 4abb6f5..2fff61c 100644
--- a/DSP/Source/TransformFunctions/arm_cfft_f32.c
+++ b/DSP/Source/TransformFunctions/arm_cfft_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_cfft_f32.c
  * Description:  Combined Radix Decimation in Frequency CFFT Floating point processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,281 +30,283 @@
 #include "arm_common_tables.h"
 
 extern void arm_radix8_butterfly_f32(
-    float32_t * pSrc,
-    uint16_t fftLen,
-    const float32_t * pCoef,
-    uint16_t twidCoefModifier);
+        float32_t * pSrc,
+        uint16_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier);
 
 extern void arm_bitreversal_32(
-    uint32_t * pSrc,
-    const uint16_t bitRevLen,
-    const uint16_t * pBitRevTable);
+        uint32_t * pSrc,
+  const uint16_t bitRevLen,
+  const uint16_t * pBitRevTable);
 
 /**
-* @ingroup groupTransforms
-*/
+  @ingroup groupTransforms
+ */
 
 /**
-* @defgroup ComplexFFT Complex FFT Functions
-*
-* \par
-* The Fast Fourier Transform (FFT) is an efficient algorithm for computing the
-* Discrete Fourier Transform (DFT).  The FFT can be orders of magnitude faster
-* than the DFT, especially for long lengths.
-* The algorithms described in this section
-* operate on complex data.  A separate set of functions is devoted to handling
-* of real sequences.
-* \par
-* There are separate algorithms for handling floating-point, Q15, and Q31 data
-* types.  The algorithms available for each data type are described next.
-* \par
-* The FFT functions operate in-place.  That is, the array holding the input data
-* will also be used to hold the corresponding result.  The input data is complex
-* and contains <code>2*fftLen</code> interleaved values as shown below.
-* <pre> {real[0], imag[0], real[1], imag[1],..} </pre>
-* The FFT result will be contained in the same array and the frequency domain
-* values will have the same interleaving.
-*
-* \par Floating-point
-* The floating-point complex FFT uses a mixed-radix algorithm.  Multiple radix-8
-* stages are performed along with a single radix-2 or radix-4 stage, as needed.
-* The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses
-* a different twiddle factor table.
-* \par
-* The function uses the standard FFT definition and output values may grow by a
-* factor of <code>fftLen</code> when computing the forward transform.  The
-* inverse transform includes a scale of <code>1/fftLen</code> as part of the
-* calculation and this matches the textbook definition of the inverse FFT.
-* \par
-* Pre-initialized data structures containing twiddle factors and bit reversal
-* tables are provided and defined in <code>arm_const_structs.h</code>.  Include
-* this header in your function and then pass one of the constant structures as
-* an argument to arm_cfft_f32.  For example:
-* \par
-* <code>arm_cfft_f32(arm_cfft_sR_f32_len64, pSrc, 1, 1)</code>
-* \par
-* computes a 64-point inverse complex FFT including bit reversal.
-* The data structures are treated as constant data and not modified during the
-* calculation.  The same data structure can be reused for multiple transforms
-* including mixing forward and inverse transforms.
-* \par
-* Earlier releases of the library provided separate radix-2 and radix-4
-* algorithms that operated on floating-point data.  These functions are still
-* provided but are deprecated.  The older functions are slower and less general
-* than the new functions.
-* \par
-* An example of initialization of the constants for the arm_cfft_f32 function follows:
-* \code
-* const static arm_cfft_instance_f32 *S;
-* ...
-*   switch (length) {
-*     case 16:
-*       S = &arm_cfft_sR_f32_len16;
-*       break;
-*     case 32:
-*       S = &arm_cfft_sR_f32_len32;
-*       break;
-*     case 64:
-*       S = &arm_cfft_sR_f32_len64;
-*       break;
-*     case 128:
-*       S = &arm_cfft_sR_f32_len128;
-*       break;
-*     case 256:
-*       S = &arm_cfft_sR_f32_len256;
-*       break;
-*     case 512:
-*       S = &arm_cfft_sR_f32_len512;
-*       break;
-*     case 1024:
-*       S = &arm_cfft_sR_f32_len1024;
-*       break;
-*     case 2048:
-*       S = &arm_cfft_sR_f32_len2048;
-*       break;
-*     case 4096:
-*       S = &arm_cfft_sR_f32_len4096;
-*       break;
-*   }
-* \endcode
-* \par Q15 and Q31
-* The floating-point complex FFT uses a mixed-radix algorithm.  Multiple radix-4
-* stages are performed along with a single radix-2 stage, as needed.
-* The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses
-* a different twiddle factor table.
-* \par
-* The function uses the standard FFT definition and output values may grow by a
-* factor of <code>fftLen</code> when computing the forward transform.  The
-* inverse transform includes a scale of <code>1/fftLen</code> as part of the
-* calculation and this matches the textbook definition of the inverse FFT.
-* \par
-* Pre-initialized data structures containing twiddle factors and bit reversal
-* tables are provided and defined in <code>arm_const_structs.h</code>.  Include
-* this header in your function and then pass one of the constant structures as
-* an argument to arm_cfft_q31.  For example:
-* \par
-* <code>arm_cfft_q31(arm_cfft_sR_q31_len64, pSrc, 1, 1)</code>
-* \par
-* computes a 64-point inverse complex FFT including bit reversal.
-* The data structures are treated as constant data and not modified during the
-* calculation.  The same data structure can be reused for multiple transforms
-* including mixing forward and inverse transforms.
-* \par
-* Earlier releases of the library provided separate radix-2 and radix-4
-* algorithms that operated on floating-point data.  These functions are still
-* provided but are deprecated.  The older functions are slower and less general
-* than the new functions.
-* \par
-* An example of initialization of the constants for the arm_cfft_q31 function follows:
-* \code
-* const static arm_cfft_instance_q31 *S;
-* ...
-*   switch (length) {
-*     case 16:
-*       S = &arm_cfft_sR_q31_len16;
-*       break;
-*     case 32:
-*       S = &arm_cfft_sR_q31_len32;
-*       break;
-*     case 64:
-*       S = &arm_cfft_sR_q31_len64;
-*       break;
-*     case 128:
-*       S = &arm_cfft_sR_q31_len128;
-*       break;
-*     case 256:
-*       S = &arm_cfft_sR_q31_len256;
-*       break;
-*     case 512:
-*       S = &arm_cfft_sR_q31_len512;
-*       break;
-*     case 1024:
-*       S = &arm_cfft_sR_q31_len1024;
-*       break;
-*     case 2048:
-*       S = &arm_cfft_sR_q31_len2048;
-*       break;
-*     case 4096:
-*       S = &arm_cfft_sR_q31_len4096;
-*       break;
-*   }
-* \endcode
-*
-*/
+  @defgroup ComplexFFT Complex FFT Functions
+ 
+  @par
+                   The Fast Fourier Transform (FFT) is an efficient algorithm for computing the
+                   Discrete Fourier Transform (DFT).  The FFT can be orders of magnitude faster
+                   than the DFT, especially for long lengths.
+                   The algorithms described in this section
+                   operate on complex data.  A separate set of functions is devoted to handling
+                   of real sequences.
+  @par
+                   There are separate algorithms for handling floating-point, Q15, and Q31 data
+                   types.  The algorithms available for each data type are described next.
+  @par
+                   The FFT functions operate in-place.  That is, the array holding the input data
+                   will also be used to hold the corresponding result.  The input data is complex
+                   and contains <code>2*fftLen</code> interleaved values as shown below.
+                   <pre>{real[0], imag[0], real[1], imag[1], ...} </pre>
+                   The FFT result will be contained in the same array and the frequency domain
+                   values will have the same interleaving.
+ 
+  @par Floating-point
+                   The floating-point complex FFT uses a mixed-radix algorithm.  Multiple radix-8
+                   stages are performed along with a single radix-2 or radix-4 stage, as needed.
+                   The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses
+                   a different twiddle factor table.
+  @par
+                   The function uses the standard FFT definition and output values may grow by a
+                   factor of <code>fftLen</code> when computing the forward transform.  The
+                   inverse transform includes a scale of <code>1/fftLen</code> as part of the
+                   calculation and this matches the textbook definition of the inverse FFT.
+  @par
+                   Pre-initialized data structures containing twiddle factors and bit reversal
+                   tables are provided and defined in <code>arm_const_structs.h</code>.  Include
+                   this header in your function and then pass one of the constant structures as
+                   an argument to arm_cfft_f32.  For example:
+  @par
+                   <code>arm_cfft_f32(arm_cfft_sR_f32_len64, pSrc, 1, 1)</code>
+  @par
+                   computes a 64-point inverse complex FFT including bit reversal.
+                   The data structures are treated as constant data and not modified during the
+                   calculation.  The same data structure can be reused for multiple transforms
+                   including mixing forward and inverse transforms.
+  @par
+                   Earlier releases of the library provided separate radix-2 and radix-4
+                   algorithms that operated on floating-point data.  These functions are still
+                   provided but are deprecated.  The older functions are slower and less general
+                   than the new functions.
+  @par
+                   An example of initialization of the constants for the arm_cfft_f32 function follows:
+  @code
+                   const static arm_cfft_instance_f32 *S;
+                   ...
+                     switch (length) {
+                       case 16:
+                         S = &arm_cfft_sR_f32_len16;
+                         break;
+                       case 32:
+                         S = &arm_cfft_sR_f32_len32;
+                         break;
+                       case 64:
+                         S = &arm_cfft_sR_f32_len64;
+                         break;
+                       case 128:
+                         S = &arm_cfft_sR_f32_len128;
+                         break;
+                       case 256:
+                         S = &arm_cfft_sR_f32_len256;
+                         break;
+                       case 512:
+                         S = &arm_cfft_sR_f32_len512;
+                         break;
+                       case 1024:
+                         S = &arm_cfft_sR_f32_len1024;
+                         break;
+                       case 2048:
+                         S = &arm_cfft_sR_f32_len2048;
+                         break;
+                       case 4096:
+                         S = &arm_cfft_sR_f32_len4096;
+                         break;
+                     }
+  @endcode
+  @par Q15 and Q31
+                   The floating-point complex FFT uses a mixed-radix algorithm.  Multiple radix-4
+                   stages are performed along with a single radix-2 stage, as needed.
+                   The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses
+                   a different twiddle factor table.
+  @par
+                   The function uses the standard FFT definition and output values may grow by a
+                   factor of <code>fftLen</code> when computing the forward transform.  The
+                   inverse transform includes a scale of <code>1/fftLen</code> as part of the
+                   calculation and this matches the textbook definition of the inverse FFT.
+  @par
+                   Pre-initialized data structures containing twiddle factors and bit reversal
+                   tables are provided and defined in <code>arm_const_structs.h</code>.  Include
+                   this header in your function and then pass one of the constant structures as
+                   an argument to arm_cfft_q31. For example:
+  @par
+                   <code>arm_cfft_q31(arm_cfft_sR_q31_len64, pSrc, 1, 1)</code>
+  @par
+                   computes a 64-point inverse complex FFT including bit reversal.
+                   The data structures are treated as constant data and not modified during the
+                   calculation.  The same data structure can be reused for multiple transforms
+                   including mixing forward and inverse transforms.
+  @par
+                   Earlier releases of the library provided separate radix-2 and radix-4
+                   algorithms that operated on floating-point data.  These functions are still
+                   provided but are deprecated.  The older functions are slower and less general
+                   than the new functions.
+  @par
+                   An example of initialization of the constants for the arm_cfft_q31 function follows:
+  @code
+                   const static arm_cfft_instance_q31 *S;
+                   ...
+                     switch (length) {
+                       case 16:
+                         S = &arm_cfft_sR_q31_len16;
+                         break;
+                       case 32:
+                         S = &arm_cfft_sR_q31_len32;
+                         break;
+                       case 64:
+                         S = &arm_cfft_sR_q31_len64;
+                         break;
+                       case 128:
+                         S = &arm_cfft_sR_q31_len128;
+                         break;
+                       case 256:
+                         S = &arm_cfft_sR_q31_len256;
+                         break;
+                       case 512:
+                         S = &arm_cfft_sR_q31_len512;
+                         break;
+                       case 1024:
+                         S = &arm_cfft_sR_q31_len1024;
+                         break;
+                       case 2048:
+                         S = &arm_cfft_sR_q31_len2048;
+                         break;
+                       case 4096:
+                         S = &arm_cfft_sR_q31_len4096;
+                         break;
+                     }
+  @endcode
+ 
+ */
 
-void arm_cfft_radix8by2_f32( arm_cfft_instance_f32 * S, float32_t * p1)
+void arm_cfft_radix8by2_f32 (arm_cfft_instance_f32 * S, float32_t * p1)
 {
-    uint32_t    L  = S->fftLen;
-    float32_t * pCol1, * pCol2, * pMid1, * pMid2;
-    float32_t * p2 = p1 + L;
-    const float32_t * tw = (float32_t *) S->pTwiddle;
-    float32_t t1[4], t2[4], t3[4], t4[4], twR, twI;
-    float32_t m0, m1, m2, m3;
-    uint32_t l;
+  uint32_t    L  = S->fftLen;
+  float32_t * pCol1, * pCol2, * pMid1, * pMid2;
+  float32_t * p2 = p1 + L;
+  const float32_t * tw = (float32_t *) S->pTwiddle;
+  float32_t t1[4], t2[4], t3[4], t4[4], twR, twI;
+  float32_t m0, m1, m2, m3;
+  uint32_t l;
 
-    pCol1 = p1;
-    pCol2 = p2;
+  pCol1 = p1;
+  pCol2 = p2;
 
-    //    Define new length
-    L >>= 1;
-    //    Initialize mid pointers
-    pMid1 = p1 + L;
-    pMid2 = p2 + L;
+  /* Define new length */
+  L >>= 1;
 
-    // do two dot Fourier transform
-    for ( l = L >> 2; l > 0; l-- )
-    {
-        t1[0] = p1[0];
-        t1[1] = p1[1];
-        t1[2] = p1[2];
-        t1[3] = p1[3];
+  /* Initialize mid pointers */
+  pMid1 = p1 + L;
+  pMid2 = p2 + L;
 
-        t2[0] = p2[0];
-        t2[1] = p2[1];
-        t2[2] = p2[2];
-        t2[3] = p2[3];
+  /* do two dot Fourier transform */
+  for (l = L >> 2; l > 0; l-- )
+  {
+    t1[0] = p1[0];
+    t1[1] = p1[1];
+    t1[2] = p1[2];
+    t1[3] = p1[3];
 
-        t3[0] = pMid1[0];
-        t3[1] = pMid1[1];
-        t3[2] = pMid1[2];
-        t3[3] = pMid1[3];
+    t2[0] = p2[0];
+    t2[1] = p2[1];
+    t2[2] = p2[2];
+    t2[3] = p2[3];
 
-        t4[0] = pMid2[0];
-        t4[1] = pMid2[1];
-        t4[2] = pMid2[2];
-        t4[3] = pMid2[3];
+    t3[0] = pMid1[0];
+    t3[1] = pMid1[1];
+    t3[2] = pMid1[2];
+    t3[3] = pMid1[3];
 
-        *p1++ = t1[0] + t2[0];
-        *p1++ = t1[1] + t2[1];
-        *p1++ = t1[2] + t2[2];
-        *p1++ = t1[3] + t2[3];    // col 1
+    t4[0] = pMid2[0];
+    t4[1] = pMid2[1];
+    t4[2] = pMid2[2];
+    t4[3] = pMid2[3];
 
-        t2[0] = t1[0] - t2[0];
-        t2[1] = t1[1] - t2[1];
-        t2[2] = t1[2] - t2[2];
-        t2[3] = t1[3] - t2[3];    // for col 2
+    *p1++ = t1[0] + t2[0];
+    *p1++ = t1[1] + t2[1];
+    *p1++ = t1[2] + t2[2];
+    *p1++ = t1[3] + t2[3];    /* col 1 */
 
-        *pMid1++ = t3[0] + t4[0];
-        *pMid1++ = t3[1] + t4[1];
-        *pMid1++ = t3[2] + t4[2];
-        *pMid1++ = t3[3] + t4[3]; // col 1
+    t2[0] = t1[0] - t2[0];
+    t2[1] = t1[1] - t2[1];
+    t2[2] = t1[2] - t2[2];
+    t2[3] = t1[3] - t2[3];    /* for col 2 */
 
-        t4[0] = t4[0] - t3[0];
-        t4[1] = t4[1] - t3[1];
-        t4[2] = t4[2] - t3[2];
-        t4[3] = t4[3] - t3[3];    // for col 2
+    *pMid1++ = t3[0] + t4[0];
+    *pMid1++ = t3[1] + t4[1];
+    *pMid1++ = t3[2] + t4[2];
+    *pMid1++ = t3[3] + t4[3]; /* col 1 */
 
-        twR = *tw++;
-        twI = *tw++;
+    t4[0] = t4[0] - t3[0];
+    t4[1] = t4[1] - t3[1];
+    t4[2] = t4[2] - t3[2];
+    t4[3] = t4[3] - t3[3];    /* for col 2 */
 
-        // multiply by twiddle factors
-        m0 = t2[0] * twR;
-        m1 = t2[1] * twI;
-        m2 = t2[1] * twR;
-        m3 = t2[0] * twI;
+    twR = *tw++;
+    twI = *tw++;
 
-        // R  =  R  *  Tr - I * Ti
-        *p2++ = m0 + m1;
-        // I  =  I  *  Tr + R * Ti
-        *p2++ = m2 - m3;
+    /* multiply by twiddle factors */
+    m0 = t2[0] * twR;
+    m1 = t2[1] * twI;
+    m2 = t2[1] * twR;
+    m3 = t2[0] * twI;
 
-        // use vertical symmetry
-        //  0.9988 - 0.0491i <==> -0.0491 - 0.9988i
-        m0 = t4[0] * twI;
-        m1 = t4[1] * twR;
-        m2 = t4[1] * twI;
-        m3 = t4[0] * twR;
+    /* R  =  R  *  Tr - I * Ti */
+    *p2++ = m0 + m1;
+    /* I  =  I  *  Tr + R * Ti */
+    *p2++ = m2 - m3;
 
-        *pMid2++ = m0 - m1;
-        *pMid2++ = m2 + m3;
+    /* use vertical symmetry */
+    /*  0.9988 - 0.0491i <==> -0.0491 - 0.9988i */
+    m0 = t4[0] * twI;
+    m1 = t4[1] * twR;
+    m2 = t4[1] * twI;
+    m3 = t4[0] * twR;
 
-        twR = *tw++;
-        twI = *tw++;
+    *pMid2++ = m0 - m1;
+    *pMid2++ = m2 + m3;
 
-        m0 = t2[2] * twR;
-        m1 = t2[3] * twI;
-        m2 = t2[3] * twR;
-        m3 = t2[2] * twI;
+    twR = *tw++;
+    twI = *tw++;
 
-        *p2++ = m0 + m1;
-        *p2++ = m2 - m3;
+    m0 = t2[2] * twR;
+    m1 = t2[3] * twI;
+    m2 = t2[3] * twR;
+    m3 = t2[2] * twI;
 
-        m0 = t4[2] * twI;
-        m1 = t4[3] * twR;
-        m2 = t4[3] * twI;
-        m3 = t4[2] * twR;
+    *p2++ = m0 + m1;
+    *p2++ = m2 - m3;
 
-        *pMid2++ = m0 - m1;
-        *pMid2++ = m2 + m3;
-    }
+    m0 = t4[2] * twI;
+    m1 = t4[3] * twR;
+    m2 = t4[3] * twI;
+    m3 = t4[2] * twR;
 
-    // first col
-    arm_radix8_butterfly_f32( pCol1, L, (float32_t *) S->pTwiddle, 2U);
-    // second col
-    arm_radix8_butterfly_f32( pCol2, L, (float32_t *) S->pTwiddle, 2U);
+    *pMid2++ = m0 - m1;
+    *pMid2++ = m2 + m3;
+  }
+
+  /* first col */
+  arm_radix8_butterfly_f32 (pCol1, L, (float32_t *) S->pTwiddle, 2U);
+
+  /* second col */
+  arm_radix8_butterfly_f32 (pCol2, L, (float32_t *) S->pTwiddle, 2U);
 }
 
-void arm_cfft_radix8by4_f32( arm_cfft_instance_f32 * S, float32_t * p1)
+void arm_cfft_radix8by4_f32 (arm_cfft_instance_f32 * S, float32_t * p1)
 {
     uint32_t    L  = S->fftLen >> 1;
     float32_t * pCol1, *pCol2, *pCol3, *pCol4, *pEnd1, *pEnd2, *pEnd3, *pEnd4;
@@ -317,11 +319,11 @@
     float32_t m0, m1, m2, m3;
     uint32_t l, twMod2, twMod3, twMod4;
 
-    pCol1 = p1;         // points to real values by default
+    pCol1 = p1;         /* points to real values by default */
     pCol2 = p2;
     pCol3 = p3;
     pCol4 = p4;
-    pEnd1 = p2 - 1;     // points to imaginary values by default
+    pEnd1 = p2 - 1;     /* points to imaginary values by default */
     pEnd2 = p3 - 1;
     pEnd3 = p4 - 1;
     pEnd4 = pEnd3 + L;
@@ -330,32 +332,32 @@
 
     L >>= 1;
 
-    // do four dot Fourier transform
+    /* do four dot Fourier transform */
 
     twMod2 = 2;
     twMod3 = 4;
     twMod4 = 6;
 
-    // TOP
+    /* TOP */
     p1ap3_0 = p1[0] + p3[0];
     p1sp3_0 = p1[0] - p3[0];
     p1ap3_1 = p1[1] + p3[1];
     p1sp3_1 = p1[1] - p3[1];
 
-    // col 2
+    /* col 2 */
     t2[0] = p1sp3_0 + p2[1] - p4[1];
     t2[1] = p1sp3_1 - p2[0] + p4[0];
-    // col 3
+    /* col 3 */
     t3[0] = p1ap3_0 - p2[0] - p4[0];
     t3[1] = p1ap3_1 - p2[1] - p4[1];
-    // col 4
+    /* col 4 */
     t4[0] = p1sp3_0 - p2[1] + p4[1];
     t4[1] = p1sp3_1 + p2[0] - p4[0];
-    // col 1
+    /* col 1 */
     *p1++ = p1ap3_0 + p2[0] + p4[0];
     *p1++ = p1ap3_1 + p2[1] + p4[1];
 
-    // Twiddle factors are ones
+    /* Twiddle factors are ones */
     *p2++ = t2[0];
     *p2++ = t2[1];
     *p3++ = t3[0];
@@ -369,138 +371,138 @@
 
     for (l = (L - 2) >> 1; l > 0; l-- )
     {
-        // TOP
-        p1ap3_0 = p1[0] + p3[0];
-        p1sp3_0 = p1[0] - p3[0];
-        p1ap3_1 = p1[1] + p3[1];
-        p1sp3_1 = p1[1] - p3[1];
-        // col 2
-        t2[0] = p1sp3_0 + p2[1] - p4[1];
-        t2[1] = p1sp3_1 - p2[0] + p4[0];
-        // col 3
-        t3[0] = p1ap3_0 - p2[0] - p4[0];
-        t3[1] = p1ap3_1 - p2[1] - p4[1];
-        // col 4
-        t4[0] = p1sp3_0 - p2[1] + p4[1];
-        t4[1] = p1sp3_1 + p2[0] - p4[0];
-        // col 1 - top
-        *p1++ = p1ap3_0 + p2[0] + p4[0];
-        *p1++ = p1ap3_1 + p2[1] + p4[1];
+      /* TOP */
+      p1ap3_0 = p1[0] + p3[0];
+      p1sp3_0 = p1[0] - p3[0];
+      p1ap3_1 = p1[1] + p3[1];
+      p1sp3_1 = p1[1] - p3[1];
+      /* col 2 */
+      t2[0] = p1sp3_0 + p2[1] - p4[1];
+      t2[1] = p1sp3_1 - p2[0] + p4[0];
+      /* col 3 */
+      t3[0] = p1ap3_0 - p2[0] - p4[0];
+      t3[1] = p1ap3_1 - p2[1] - p4[1];
+      /* col 4 */
+      t4[0] = p1sp3_0 - p2[1] + p4[1];
+      t4[1] = p1sp3_1 + p2[0] - p4[0];
+      /* col 1 - top */
+      *p1++ = p1ap3_0 + p2[0] + p4[0];
+      *p1++ = p1ap3_1 + p2[1] + p4[1];
 
-        // BOTTOM
-        p1ap3_1 = pEnd1[-1] + pEnd3[-1];
-        p1sp3_1 = pEnd1[-1] - pEnd3[-1];
-        p1ap3_0 = pEnd1[0] + pEnd3[0];
-        p1sp3_0 = pEnd1[0] - pEnd3[0];
-        // col 2
-        t2[2] = pEnd2[0]  - pEnd4[0] + p1sp3_1;
-        t2[3] = pEnd1[0] - pEnd3[0] - pEnd2[-1] + pEnd4[-1];
-        // col 3
-        t3[2] = p1ap3_1 - pEnd2[-1] - pEnd4[-1];
-        t3[3] = p1ap3_0 - pEnd2[0]  - pEnd4[0];
-        // col 4
-        t4[2] = pEnd2[0]  - pEnd4[0]  - p1sp3_1;
-        t4[3] = pEnd4[-1] - pEnd2[-1] - p1sp3_0;
-        // col 1 - Bottom
-        *pEnd1-- = p1ap3_0 + pEnd2[0] + pEnd4[0];
-        *pEnd1-- = p1ap3_1 + pEnd2[-1] + pEnd4[-1];
+      /* BOTTOM */
+      p1ap3_1 = pEnd1[-1] + pEnd3[-1];
+      p1sp3_1 = pEnd1[-1] - pEnd3[-1];
+      p1ap3_0 = pEnd1[ 0] + pEnd3[0];
+      p1sp3_0 = pEnd1[ 0] - pEnd3[0];
+      /* col 2 */
+      t2[2] = pEnd2[0] - pEnd4[0] + p1sp3_1;
+      t2[3] = pEnd1[0] - pEnd3[0] - pEnd2[-1] + pEnd4[-1];
+      /* col 3 */
+      t3[2] = p1ap3_1 - pEnd2[-1] - pEnd4[-1];
+      t3[3] = p1ap3_0 - pEnd2[ 0] - pEnd4[ 0];
+      /* col 4 */
+      t4[2] = pEnd2[ 0] - pEnd4[ 0] - p1sp3_1;
+      t4[3] = pEnd4[-1] - pEnd2[-1] - p1sp3_0;
+      /* col 1 - Bottom */
+      *pEnd1-- = p1ap3_0 + pEnd2[ 0] + pEnd4[ 0];
+      *pEnd1-- = p1ap3_1 + pEnd2[-1] + pEnd4[-1];
 
-        // COL 2
-        // read twiddle factors
-        twR = *tw2++;
-        twI = *tw2++;
-        // multiply by twiddle factors
-        //  let    Z1 = a + i(b),   Z2 = c + i(d)
-        //   =>  Z1 * Z2  =  (a*c - b*d) + i(b*c + a*d)
+      /* COL 2 */
+      /* read twiddle factors */
+      twR = *tw2++;
+      twI = *tw2++;
+      /* multiply by twiddle factors */
+      /*  let    Z1 = a + i(b),   Z2 = c + i(d) */
+      /*   =>  Z1 * Z2  =  (a*c - b*d) + i(b*c + a*d) */
 
-        // Top
-        m0 = t2[0] * twR;
-        m1 = t2[1] * twI;
-        m2 = t2[1] * twR;
-        m3 = t2[0] * twI;
+      /* Top */
+      m0 = t2[0] * twR;
+      m1 = t2[1] * twI;
+      m2 = t2[1] * twR;
+      m3 = t2[0] * twI;
 
-        *p2++ = m0 + m1;
-        *p2++ = m2 - m3;
-        // use vertical symmetry col 2
-        // 0.9997 - 0.0245i  <==>  0.0245 - 0.9997i
-        // Bottom
-        m0 = t2[3] * twI;
-        m1 = t2[2] * twR;
-        m2 = t2[2] * twI;
-        m3 = t2[3] * twR;
+      *p2++ = m0 + m1;
+      *p2++ = m2 - m3;
+      /* use vertical symmetry col 2 */
+      /* 0.9997 - 0.0245i  <==>  0.0245 - 0.9997i */
+      /* Bottom */
+      m0 = t2[3] * twI;
+      m1 = t2[2] * twR;
+      m2 = t2[2] * twI;
+      m3 = t2[3] * twR;
 
-        *pEnd2-- = m0 - m1;
-        *pEnd2-- = m2 + m3;
+      *pEnd2-- = m0 - m1;
+      *pEnd2-- = m2 + m3;
 
-        // COL 3
-        twR = tw3[0];
-        twI = tw3[1];
-        tw3 += twMod3;
-        // Top
-        m0 = t3[0] * twR;
-        m1 = t3[1] * twI;
-        m2 = t3[1] * twR;
-        m3 = t3[0] * twI;
+      /* COL 3 */
+      twR = tw3[0];
+      twI = tw3[1];
+      tw3 += twMod3;
+      /* Top */
+      m0 = t3[0] * twR;
+      m1 = t3[1] * twI;
+      m2 = t3[1] * twR;
+      m3 = t3[0] * twI;
 
-        *p3++ = m0 + m1;
-        *p3++ = m2 - m3;
-        // use vertical symmetry col 3
-        // 0.9988 - 0.0491i  <==>  -0.9988 - 0.0491i
-        // Bottom
-        m0 = -t3[3] * twR;
-        m1 = t3[2] * twI;
-        m2 = t3[2] * twR;
-        m3 = t3[3] * twI;
+      *p3++ = m0 + m1;
+      *p3++ = m2 - m3;
+      /* use vertical symmetry col 3 */
+      /* 0.9988 - 0.0491i  <==>  -0.9988 - 0.0491i */
+      /* Bottom */
+      m0 = -t3[3] * twR;
+      m1 =  t3[2] * twI;
+      m2 =  t3[2] * twR;
+      m3 =  t3[3] * twI;
 
-        *pEnd3-- = m0 - m1;
-        *pEnd3-- = m3 - m2;
+      *pEnd3-- = m0 - m1;
+      *pEnd3-- = m3 - m2;
 
-        // COL 4
-        twR = tw4[0];
-        twI = tw4[1];
-        tw4 += twMod4;
-        // Top
-        m0 = t4[0] * twR;
-        m1 = t4[1] * twI;
-        m2 = t4[1] * twR;
-        m3 = t4[0] * twI;
+      /* COL 4 */
+      twR = tw4[0];
+      twI = tw4[1];
+      tw4 += twMod4;
+      /* Top */
+      m0 = t4[0] * twR;
+      m1 = t4[1] * twI;
+      m2 = t4[1] * twR;
+      m3 = t4[0] * twI;
 
-        *p4++ = m0 + m1;
-        *p4++ = m2 - m3;
-        // use vertical symmetry col 4
-        // 0.9973 - 0.0736i  <==>  -0.0736 + 0.9973i
-        // Bottom
-        m0 = t4[3] * twI;
-        m1 = t4[2] * twR;
-        m2 = t4[2] * twI;
-        m3 = t4[3] * twR;
+      *p4++ = m0 + m1;
+      *p4++ = m2 - m3;
+      /* use vertical symmetry col 4 */
+      /* 0.9973 - 0.0736i  <==>  -0.0736 + 0.9973i */
+      /* Bottom */
+      m0 = t4[3] * twI;
+      m1 = t4[2] * twR;
+      m2 = t4[2] * twI;
+      m3 = t4[3] * twR;
 
-        *pEnd4-- = m0 - m1;
-        *pEnd4-- = m2 + m3;
+      *pEnd4-- = m0 - m1;
+      *pEnd4-- = m2 + m3;
     }
 
-    //MIDDLE
-    // Twiddle factors are
-    //  1.0000  0.7071-0.7071i  -1.0000i  -0.7071-0.7071i
+    /* MIDDLE */
+    /* Twiddle factors are */
+    /*  1.0000  0.7071-0.7071i  -1.0000i  -0.7071-0.7071i */
     p1ap3_0 = p1[0] + p3[0];
     p1sp3_0 = p1[0] - p3[0];
     p1ap3_1 = p1[1] + p3[1];
     p1sp3_1 = p1[1] - p3[1];
 
-    // col 2
+    /* col 2 */
     t2[0] = p1sp3_0 + p2[1] - p4[1];
     t2[1] = p1sp3_1 - p2[0] + p4[0];
-    // col 3
+    /* col 3 */
     t3[0] = p1ap3_0 - p2[0] - p4[0];
     t3[1] = p1ap3_1 - p2[1] - p4[1];
-    // col 4
+    /* col 4 */
     t4[0] = p1sp3_0 - p2[1] + p4[1];
     t4[1] = p1sp3_1 + p2[0] - p4[0];
-    // col 1 - Top
+    /* col 1 - Top */
     *p1++ = p1ap3_0 + p2[0] + p4[0];
     *p1++ = p1ap3_1 + p2[1] + p4[1];
 
-    // COL 2
+    /* COL 2 */
     twR = tw2[0];
     twI = tw2[1];
 
@@ -511,7 +513,7 @@
 
     *p2++ = m0 + m1;
     *p2++ = m2 - m3;
-    // COL 3
+    /* COL 3 */
     twR = tw3[0];
     twI = tw3[1];
 
@@ -522,7 +524,7 @@
 
     *p3++ = m0 + m1;
     *p3++ = m2 - m3;
-    // COL 4
+    /* COL 4 */
     twR = tw4[0];
     twI = tw4[1];
 
@@ -534,87 +536,94 @@
     *p4++ = m0 + m1;
     *p4++ = m2 - m3;
 
-    // first col
-    arm_radix8_butterfly_f32( pCol1, L, (float32_t *) S->pTwiddle, 4U);
-    // second col
-    arm_radix8_butterfly_f32( pCol2, L, (float32_t *) S->pTwiddle, 4U);
-    // third col
-    arm_radix8_butterfly_f32( pCol3, L, (float32_t *) S->pTwiddle, 4U);
-    // fourth col
-    arm_radix8_butterfly_f32( pCol4, L, (float32_t *) S->pTwiddle, 4U);
+    /* first col */
+    arm_radix8_butterfly_f32 (pCol1, L, (float32_t *) S->pTwiddle, 4U);
+
+    /* second col */
+    arm_radix8_butterfly_f32 (pCol2, L, (float32_t *) S->pTwiddle, 4U);
+
+    /* third col */
+    arm_radix8_butterfly_f32 (pCol3, L, (float32_t *) S->pTwiddle, 4U);
+
+    /* fourth col */
+    arm_radix8_butterfly_f32 (pCol4, L, (float32_t *) S->pTwiddle, 4U);
 }
 
 /**
-* @addtogroup ComplexFFT
-* @{
-*/
+  @addtogroup ComplexFFT
+  @{
+ */
 
 /**
-* @details
-* @brief       Processing function for the floating-point complex FFT.
-* @param[in]      *S    points to an instance of the floating-point CFFT structure.
-* @param[in, out] *p1   points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place.
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return none.
-*/
+  @brief         Processing function for the floating-point complex FFT.
+  @param[in]     S              points to an instance of the floating-point CFFT structure
+  @param[in,out] p1             points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        none
+ */
 
 void arm_cfft_f32(
-    const arm_cfft_instance_f32 * S,
-    float32_t * p1,
-    uint8_t ifftFlag,
-    uint8_t bitReverseFlag)
+  const arm_cfft_instance_f32 * S,
+        float32_t * p1,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag)
 {
-    uint32_t  L = S->fftLen, l;
-    float32_t invL, * pSrc;
+  uint32_t  L = S->fftLen, l;
+  float32_t invL, * pSrc;
 
-    if (ifftFlag == 1U)
+  if (ifftFlag == 1U)
+  {
+    /* Conjugate input data */
+    pSrc = p1 + 1;
+    for (l = 0; l < L; l++)
     {
-        /*  Conjugate input data  */
-        pSrc = p1 + 1;
-        for(l=0; l<L; l++)
-        {
-            *pSrc = -*pSrc;
-            pSrc += 2;
-        }
+      *pSrc = -*pSrc;
+      pSrc += 2;
     }
+  }
 
-    switch (L)
+  switch (L)
+  {
+  case 16:
+  case 128:
+  case 1024:
+    arm_cfft_radix8by2_f32 ( (arm_cfft_instance_f32 *) S, p1);
+    break;
+  case 32:
+  case 256:
+  case 2048:
+    arm_cfft_radix8by4_f32 ( (arm_cfft_instance_f32 *) S, p1);
+    break;
+  case 64:
+  case 512:
+  case 4096:
+    arm_radix8_butterfly_f32 ( p1, L, (float32_t *) S->pTwiddle, 1);
+    break;
+  }
+
+  if ( bitReverseFlag )
+    arm_bitreversal_32 ((uint32_t*) p1, S->bitRevLength, S->pBitRevTable);
+
+  if (ifftFlag == 1U)
+  {
+    invL = 1.0f / (float32_t)L;
+
+    /* Conjugate and scale output data */
+    pSrc = p1;
+    for (l= 0; l < L; l++)
     {
-    case 16:
-    case 128:
-    case 1024:
-        arm_cfft_radix8by2_f32  ( (arm_cfft_instance_f32 *) S, p1);
-        break;
-    case 32:
-    case 256:
-    case 2048:
-        arm_cfft_radix8by4_f32  ( (arm_cfft_instance_f32 *) S, p1);
-        break;
-    case 64:
-    case 512:
-    case 4096:
-        arm_radix8_butterfly_f32( p1, L, (float32_t *) S->pTwiddle, 1);
-        break;
+      *pSrc++ *=   invL ;
+      *pSrc    = -(*pSrc) * invL;
+      pSrc++;
     }
-
-    if ( bitReverseFlag )
-        arm_bitreversal_32((uint32_t*)p1,S->bitRevLength,S->pBitRevTable);
-
-    if (ifftFlag == 1U)
-    {
-        invL = 1.0f/(float32_t)L;
-        /*  Conjugate and scale output data */
-        pSrc = p1;
-        for(l=0; l<L; l++)
-        {
-            *pSrc++ *=   invL ;
-            *pSrc  = -(*pSrc) * invL;
-            pSrc++;
-        }
-    }
+  }
 }
 
 /**
-* @} end of ComplexFFT group
-*/
+  @} end of ComplexFFT group
+ */
diff --git a/DSP/Source/TransformFunctions/arm_cfft_q15.c b/DSP/Source/TransformFunctions/arm_cfft_q15.c
index da76ddc..28ad1e1 100644
--- a/DSP/Source/TransformFunctions/arm_cfft_q15.c
+++ b/DSP/Source/TransformFunctions/arm_cfft_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_cfft_q15.c
  * Description:  Combined Radix Decimation in Q15 Frequency CFFT processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,317 +29,304 @@
 #include "arm_math.h"
 
 extern void arm_radix4_butterfly_q15(
-    q15_t * pSrc,
-    uint32_t fftLen,
-    q15_t * pCoef,
-    uint32_t twidCoefModifier);
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef,
+        uint32_t twidCoefModifier);
 
 extern void arm_radix4_butterfly_inverse_q15(
-    q15_t * pSrc,
-    uint32_t fftLen,
-    q15_t * pCoef,
-    uint32_t twidCoefModifier);
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef,
+        uint32_t twidCoefModifier);
 
 extern void arm_bitreversal_16(
-    uint16_t * pSrc,
-    const uint16_t bitRevLen,
-    const uint16_t * pBitRevTable);
+        uint16_t * pSrc,
+  const uint16_t bitRevLen,
+  const uint16_t * pBitRevTable);
 
 void arm_cfft_radix4by2_q15(
-    q15_t * pSrc,
-    uint32_t fftLen,
-    const q15_t * pCoef);
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef);
 
 void arm_cfft_radix4by2_inverse_q15(
-    q15_t * pSrc,
-    uint32_t fftLen,
-    const q15_t * pCoef);
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef);
 
 /**
-* @ingroup groupTransforms
-*/
+  @ingroup groupTransforms
+ */
 
 /**
-* @addtogroup ComplexFFT
-* @{
-*/
+  @addtogroup ComplexFFT
+  @{
+ */
 
 /**
-* @details
-* @brief       Processing function for the Q15 complex FFT.
-* @param[in]      *S    points to an instance of the Q15 CFFT structure.
-* @param[in, out] *p1   points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place.
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return none.
-*/
+  @brief         Processing function for Q15 complex FFT.
+  @param[in]     S               points to an instance of Q15 CFFT structure
+  @param[in,out] p1              points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        none
+ */
 
 void arm_cfft_q15(
-    const arm_cfft_instance_q15 * S,
-    q15_t * p1,
-    uint8_t ifftFlag,
-    uint8_t bitReverseFlag)
+  const arm_cfft_instance_q15 * S,
+        q15_t * p1,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag)
 {
-    uint32_t L = S->fftLen;
+  uint32_t L = S->fftLen;
 
-    if (ifftFlag == 1U)
-    {
-        switch (L)
-        {
-        case 16:
-        case 64:
-        case 256:
-        case 1024:
-        case 4096:
-            arm_radix4_butterfly_inverse_q15  ( p1, L, (q15_t*)S->pTwiddle, 1 );
-            break;
+  if (ifftFlag == 1U)
+  {
+     switch (L)
+     {
+     case 16:
+     case 64:
+     case 256:
+     case 1024:
+     case 4096:
+       arm_radix4_butterfly_inverse_q15 ( p1, L, (q15_t*)S->pTwiddle, 1 );
+       break;
 
-        case 32:
-        case 128:
-        case 512:
-        case 2048:
-            arm_cfft_radix4by2_inverse_q15  ( p1, L, S->pTwiddle );
-            break;
-        }
-    }
-    else
-    {
-        switch (L)
-        {
-        case 16:
-        case 64:
-        case 256:
-        case 1024:
-        case 4096:
-            arm_radix4_butterfly_q15  ( p1, L, (q15_t*)S->pTwiddle, 1 );
-            break;
+     case 32:
+     case 128:
+     case 512:
+     case 2048:
+       arm_cfft_radix4by2_inverse_q15 ( p1, L, S->pTwiddle );
+       break;
+     }
+  }
+  else
+  {
+     switch (L)
+     {
+     case 16:
+     case 64:
+     case 256:
+     case 1024:
+     case 4096:
+       arm_radix4_butterfly_q15  ( p1, L, (q15_t*)S->pTwiddle, 1 );
+       break;
 
-        case 32:
-        case 128:
-        case 512:
-        case 2048:
-            arm_cfft_radix4by2_q15  ( p1, L, S->pTwiddle );
-            break;
-        }
-    }
+     case 32:
+     case 128:
+     case 512:
+     case 2048:
+       arm_cfft_radix4by2_q15  ( p1, L, S->pTwiddle );
+       break;
+     }
+  }
 
-    if ( bitReverseFlag )
-        arm_bitreversal_16((uint16_t*)p1,S->bitRevLength,S->pBitRevTable);
+  if ( bitReverseFlag )
+    arm_bitreversal_16 ((uint16_t*) p1, S->bitRevLength, S->pBitRevTable);
 }
 
 /**
-* @} end of ComplexFFT group
-*/
+  @} end of ComplexFFT group
+ */
 
 void arm_cfft_radix4by2_q15(
-    q15_t * pSrc,
-    uint32_t fftLen,
-    const q15_t * pCoef)
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef)
 {
-    uint32_t i;
-    uint32_t n2;
-    q15_t p0, p1, p2, p3;
+        uint32_t i;
+        uint32_t n2;
+        q15_t p0, p1, p2, p3;
 #if defined (ARM_MATH_DSP)
-    q31_t T, S, R;
-    q31_t coeff, out1, out2;
-    const q15_t *pC = pCoef;
-    q15_t *pSi = pSrc;
-    q15_t *pSl = pSrc + fftLen;
+        q31_t T, S, R;
+        q31_t coeff, out1, out2;
+  const q15_t *pC = pCoef;
+        q15_t *pSi = pSrc;
+        q15_t *pSl = pSrc + fftLen;
 #else
-    uint32_t ia, l;
-    q15_t xt, yt, cosVal, sinVal;
+        uint32_t l;
+        q15_t xt, yt, cosVal, sinVal;
 #endif
 
-    n2 = fftLen >> 1;
+  n2 = fftLen >> 1U;
 
 #if defined (ARM_MATH_DSP)
 
-    for (i = n2; i > 0; i--)
-    {
-        coeff = _SIMD32_OFFSET(pC);
-        pC += 2;
+  for (i = n2; i > 0; i--)
+  {
+      coeff = read_q15x2_ia ((q15_t **) &pC);
 
-        T = _SIMD32_OFFSET(pSi);
-        T = __SHADD16(T, 0); // this is just a SIMD arithmetic shift right by 1
+      T = read_q15x2 (pSi);
+      T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */
 
-        S = _SIMD32_OFFSET(pSl);
-        S = __SHADD16(S, 0); // this is just a SIMD arithmetic shift right by 1
+      S = read_q15x2 (pSl);
+      S = __SHADD16(S, 0); /* this is just a SIMD arithmetic shift right by 1 */
 
-        R = __QSUB16(T, S);
+      R = __QSUB16(T, S);
 
-        _SIMD32_OFFSET(pSi) = __SHADD16(T, S);
-        pSi += 2;
+      write_q15x2_ia (&pSi, __SHADD16(T, S));
 
-    #ifndef ARM_MATH_BIG_ENDIAN
+#ifndef ARM_MATH_BIG_ENDIAN
+      out1 = __SMUAD(coeff, R) >> 16U;
+      out2 = __SMUSDX(coeff, R);
+#else
+      out1 = __SMUSDX(R, coeff) >> 16U;
+      out2 = __SMUAD(coeff, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-        out1 = __SMUAD(coeff, R) >> 16;
-        out2 = __SMUSDX(coeff, R);
+      write_q15x2_ia (&pSl, (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
+  }
 
-    #else
+#else /* #if defined (ARM_MATH_DSP) */
 
-        out1 = __SMUSDX(R, coeff) >> 16U;
-        out2 = __SMUAD(coeff, R);
+  for (i = 0; i < n2; i++)
+  {
+     cosVal = pCoef[2 * i];
+     sinVal = pCoef[2 * i + 1];
 
-    #endif //     #ifndef ARM_MATH_BIG_ENDIAN
+     l = i + n2;
 
-        _SIMD32_OFFSET(pSl) =
-        (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-        pSl += 2;
-    }
+     xt =           (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
+     pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
 
-#else //    #if defined (ARM_MATH_DSP)
+     yt =               (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
+     pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
 
-    ia = 0;
-    for (i = 0; i < n2; i++)
-    {
-        cosVal = pCoef[ia * 2];
-        sinVal = pCoef[(ia * 2) + 1];
-        ia++;
+     pSrc[2 * l]     = (((int16_t) (((q31_t) xt * cosVal) >> 16U)) +
+                        ((int16_t) (((q31_t) yt * sinVal) >> 16U))  );
 
-        l = i + n2;
+     pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16U)) -
+                        ((int16_t) (((q31_t) xt * sinVal) >> 16U))   );
+  }
 
-        xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
-        pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
+#endif /* #if defined (ARM_MATH_DSP) */
 
-        yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
-        pSrc[2 * i + 1] =
-        ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
+  /* first col */
+  arm_radix4_butterfly_q15( pSrc,          n2, (q15_t*)pCoef, 2U);
 
-        pSrc[2U * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
-                  ((int16_t) (((q31_t) yt * sinVal) >> 16)));
+  /* second col */
+  arm_radix4_butterfly_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2U);
 
-        pSrc[2U * l + 1U] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
-                       ((int16_t) (((q31_t) xt * sinVal) >> 16)));
-    }
+  n2 = fftLen >> 1U;
+  for (i = 0; i < n2; i++)
+  {
+     p0 = pSrc[4 * i + 0];
+     p1 = pSrc[4 * i + 1];
+     p2 = pSrc[4 * i + 2];
+     p3 = pSrc[4 * i + 3];
 
-#endif //    #if defined (ARM_MATH_DSP)
+     p0 <<= 1U;
+     p1 <<= 1U;
+     p2 <<= 1U;
+     p3 <<= 1U;
 
-    // first col
-    arm_radix4_butterfly_q15( pSrc, n2, (q15_t*)pCoef, 2U);
-    // second col
-    arm_radix4_butterfly_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2U);
+     pSrc[4 * i + 0] = p0;
+     pSrc[4 * i + 1] = p1;
+     pSrc[4 * i + 2] = p2;
+     pSrc[4 * i + 3] = p3;
+  }
 
-    for (i = 0; i < fftLen >> 1; i++)
-    {
-        p0 = pSrc[4*i+0];
-        p1 = pSrc[4*i+1];
-        p2 = pSrc[4*i+2];
-        p3 = pSrc[4*i+3];
-
-        p0 <<= 1;
-        p1 <<= 1;
-        p2 <<= 1;
-        p3 <<= 1;
-
-        pSrc[4*i+0] = p0;
-        pSrc[4*i+1] = p1;
-        pSrc[4*i+2] = p2;
-        pSrc[4*i+3] = p3;
-    }
 }
 
 void arm_cfft_radix4by2_inverse_q15(
-    q15_t * pSrc,
-    uint32_t fftLen,
-    const q15_t * pCoef)
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef)
 {
-    uint32_t i;
-    uint32_t n2;
-    q15_t p0, p1, p2, p3;
+        uint32_t i;
+        uint32_t n2;
+        q15_t p0, p1, p2, p3;
 #if defined (ARM_MATH_DSP)
-    q31_t T, S, R;
-    q31_t coeff, out1, out2;
-    const q15_t *pC = pCoef;
-    q15_t *pSi = pSrc;
-    q15_t *pSl = pSrc + fftLen;
+        q31_t T, S, R;
+        q31_t coeff, out1, out2;
+  const q15_t *pC = pCoef;
+        q15_t *pSi = pSrc;
+        q15_t *pSl = pSrc + fftLen;
 #else
-    uint32_t ia, l;
-    q15_t xt, yt, cosVal, sinVal;
+        uint32_t l;
+        q15_t xt, yt, cosVal, sinVal;
 #endif
 
-    n2 = fftLen >> 1;
+  n2 = fftLen >> 1U;
 
 #if defined (ARM_MATH_DSP)
 
-    for (i = n2; i > 0; i--)
-    {
-        coeff = _SIMD32_OFFSET(pC);
-        pC += 2;
+  for (i = n2; i > 0; i--)
+  {
+     coeff = read_q15x2_ia ((q15_t **) &pC);
 
-        T = _SIMD32_OFFSET(pSi);
-        T = __SHADD16(T, 0); // this is just a SIMD arithmetic shift right by 1
+     T = read_q15x2 (pSi);
+     T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */
 
-        S = _SIMD32_OFFSET(pSl);
-        S = __SHADD16(S, 0); // this is just a SIMD arithmetic shift right by 1
+     S = read_q15x2 (pSl);
+     S = __SHADD16(S, 0); /* this is just a SIMD arithmetic shift right by 1 */
 
-        R = __QSUB16(T, S);
+     R = __QSUB16(T, S);
 
-        _SIMD32_OFFSET(pSi) = __SHADD16(T, S);
-        pSi += 2;
+     write_q15x2_ia (&pSi, __SHADD16(T, S));
 
-    #ifndef ARM_MATH_BIG_ENDIAN
+#ifndef ARM_MATH_BIG_ENDIAN
+     out1 = __SMUSD(coeff, R) >> 16U;
+     out2 = __SMUADX(coeff, R);
+#else
+     out1 = __SMUADX(R, coeff) >> 16U;
+     out2 = __SMUSD(__QSUB(0, coeff), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-        out1 = __SMUSD(coeff, R) >> 16;
-        out2 = __SMUADX(coeff, R);
-    #else
+     write_q15x2_ia (&pSl, (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
+  }
 
-        out1 = __SMUADX(R, coeff) >> 16U;
-        out2 = __SMUSD(__QSUB(0, coeff), R);
+#else /* #if defined (ARM_MATH_DSP) */
 
-    #endif //     #ifndef ARM_MATH_BIG_ENDIAN
+  for (i = 0; i < n2; i++)
+  {
+     cosVal = pCoef[2 * i];
+     sinVal = pCoef[2 * i + 1];
 
-        _SIMD32_OFFSET(pSl) =
-        (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-        pSl += 2;
-    }
+     l = i + n2;
 
-#else //    #if defined (ARM_MATH_DSP)
+     xt =           (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
+     pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
 
-    ia = 0;
-    for (i = 0; i < n2; i++)
-    {
-        cosVal = pCoef[ia * 2];
-        sinVal = pCoef[(ia * 2) + 1];
-        ia++;
+     yt =               (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
+     pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
 
-        l = i + n2;
-        xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
-        pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
+     pSrc[2 * l]      = (((int16_t) (((q31_t) xt * cosVal) >> 16U)) -
+                         ((int16_t) (((q31_t) yt * sinVal) >> 16U))  );
 
-        yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
-        pSrc[2 * i + 1] =
-          ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
+     pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16U)) +
+                        ((int16_t) (((q31_t) xt * sinVal) >> 16U))  );
+  }
 
-        pSrc[2U * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
-                        ((int16_t) (((q31_t) yt * sinVal) >> 16)));
+#endif /* #if defined (ARM_MATH_DSP) */
 
-        pSrc[2U * l + 1U] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
-                           ((int16_t) (((q31_t) xt * sinVal) >> 16)));
-    }
+  /* first col */
+  arm_radix4_butterfly_inverse_q15( pSrc,          n2, (q15_t*)pCoef, 2U);
 
-#endif //    #if defined (ARM_MATH_DSP)
+  /* second col */
+  arm_radix4_butterfly_inverse_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2U);
 
-    // first col
-    arm_radix4_butterfly_inverse_q15( pSrc, n2, (q15_t*)pCoef, 2U);
-    // second col
-    arm_radix4_butterfly_inverse_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2U);
+  n2 = fftLen >> 1U;
+  for (i = 0; i < n2; i++)
+  {
+     p0 = pSrc[4 * i + 0];
+     p1 = pSrc[4 * i + 1];
+     p2 = pSrc[4 * i + 2];
+     p3 = pSrc[4 * i + 3];
 
-    for (i = 0; i < fftLen >> 1; i++)
-    {
-        p0 = pSrc[4*i+0];
-        p1 = pSrc[4*i+1];
-        p2 = pSrc[4*i+2];
-        p3 = pSrc[4*i+3];
+     p0 <<= 1U;
+     p1 <<= 1U;
+     p2 <<= 1U;
+     p3 <<= 1U;
 
-        p0 <<= 1;
-        p1 <<= 1;
-        p2 <<= 1;
-        p3 <<= 1;
-
-        pSrc[4*i+0] = p0;
-        pSrc[4*i+1] = p1;
-        pSrc[4*i+2] = p2;
-        pSrc[4*i+3] = p3;
-    }
+     pSrc[4 * i + 0] = p0;
+     pSrc[4 * i + 1] = p1;
+     pSrc[4 * i + 2] = p2;
+     pSrc[4 * i + 3] = p3;
+  }
 }
-
diff --git a/DSP/Source/TransformFunctions/arm_cfft_q31.c b/DSP/Source/TransformFunctions/arm_cfft_q31.c
index ff4ff94..701ac95 100644
--- a/DSP/Source/TransformFunctions/arm_cfft_q31.c
+++ b/DSP/Source/TransformFunctions/arm_cfft_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_cfft_q31.c
  * Description:  Combined Radix Decimation in Frequency CFFT fixed point processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,224 +29,226 @@
 #include "arm_math.h"
 
 extern void arm_radix4_butterfly_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    q31_t * pCoef,
-    uint32_t twidCoefModifier);
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint32_t twidCoefModifier);
 
 extern void arm_radix4_butterfly_inverse_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    q31_t * pCoef,
-    uint32_t twidCoefModifier);
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint32_t twidCoefModifier);
 
 extern void arm_bitreversal_32(
-    uint32_t * pSrc,
-    const uint16_t bitRevLen,
-    const uint16_t * pBitRevTable);
+        uint32_t * pSrc,
+  const uint16_t bitRevLen,
+  const uint16_t * pBitRevTable);
 
 void arm_cfft_radix4by2_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    const q31_t * pCoef);
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef);
 
 void arm_cfft_radix4by2_inverse_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    const q31_t * pCoef);
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef);
 
 /**
-* @ingroup groupTransforms
-*/
+  @ingroup groupTransforms
+ */
 
 /**
-* @addtogroup ComplexFFT
-* @{
-*/
+  @addtogroup ComplexFFT
+  @{
+ */
 
 /**
-* @details
-* @brief       Processing function for the fixed-point complex FFT in Q31 format.
-* @param[in]      *S    points to an instance of the fixed-point CFFT structure.
-* @param[in, out] *p1   points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place.
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return none.
-*/
+  @brief         Processing function for the Q31 complex FFT.
+  @param[in]     S               points to an instance of the fixed-point CFFT structure
+  @param[in,out] p1              points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        none
+ */
 
 void arm_cfft_q31(
-    const arm_cfft_instance_q31 * S,
-    q31_t * p1,
-    uint8_t ifftFlag,
-    uint8_t bitReverseFlag)
+  const arm_cfft_instance_q31 * S,
+        q31_t * p1,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag)
 {
-    uint32_t L = S->fftLen;
+  uint32_t L = S->fftLen;
 
-    if (ifftFlag == 1U)
-    {
-        switch (L)
-        {
-        case 16:
-        case 64:
-        case 256:
-        case 1024:
-        case 4096:
-            arm_radix4_butterfly_inverse_q31  ( p1, L, (q31_t*)S->pTwiddle, 1 );
-            break;
+  if (ifftFlag == 1U)
+  {
+     switch (L)
+     {
+     case 16:
+     case 64:
+     case 256:
+     case 1024:
+     case 4096:
+       arm_radix4_butterfly_inverse_q31 ( p1, L, (q31_t*)S->pTwiddle, 1 );
+       break;
 
-        case 32:
-        case 128:
-        case 512:
-        case 2048:
-            arm_cfft_radix4by2_inverse_q31  ( p1, L, S->pTwiddle );
-            break;
-        }
-    }
-    else
-    {
-        switch (L)
-        {
-        case 16:
-        case 64:
-        case 256:
-        case 1024:
-        case 4096:
-            arm_radix4_butterfly_q31  ( p1, L, (q31_t*)S->pTwiddle, 1 );
-            break;
+     case 32:
+     case 128:
+     case 512:
+     case 2048:
+       arm_cfft_radix4by2_inverse_q31 ( p1, L, S->pTwiddle );
+       break;
+     }
+  }
+  else
+  {
+     switch (L)
+     {
+     case 16:
+     case 64:
+     case 256:
+     case 1024:
+     case 4096:
+       arm_radix4_butterfly_q31 ( p1, L, (q31_t*)S->pTwiddle, 1 );
+       break;
 
-        case 32:
-        case 128:
-        case 512:
-        case 2048:
-            arm_cfft_radix4by2_q31  ( p1, L, S->pTwiddle );
-            break;
-        }
-    }
+     case 32:
+     case 128:
+     case 512:
+     case 2048:
+       arm_cfft_radix4by2_q31 ( p1, L, S->pTwiddle );
+       break;
+     }
+  }
 
-    if ( bitReverseFlag )
-        arm_bitreversal_32((uint32_t*)p1,S->bitRevLength,S->pBitRevTable);
+  if ( bitReverseFlag )
+    arm_bitreversal_32 ((uint32_t*) p1, S->bitRevLength, S->pBitRevTable);
 }
 
 /**
-* @} end of ComplexFFT group
-*/
+  @} end of ComplexFFT group
+ */
 
 void arm_cfft_radix4by2_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    const q31_t * pCoef)
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef)
 {
-    uint32_t i, l;
-    uint32_t n2, ia;
-    q31_t xt, yt, cosVal, sinVal;
-    q31_t p0, p1;
+        uint32_t i, l;
+        uint32_t n2;
+        q31_t xt, yt, cosVal, sinVal;
+        q31_t p0, p1;
 
-    n2 = fftLen >> 1;
-    ia = 0;
-    for (i = 0; i < n2; i++)
-    {
-        cosVal = pCoef[2*ia];
-        sinVal = pCoef[2*ia + 1];
-        ia++;
+  n2 = fftLen >> 1U;
+  for (i = 0; i < n2; i++)
+  {
+     cosVal = pCoef[2 * i];
+     sinVal = pCoef[2 * i + 1];
 
-        l = i + n2;
-        xt = (pSrc[2 * i] >> 2) - (pSrc[2 * l] >> 2);
-        pSrc[2 * i] = (pSrc[2 * i] >> 2) + (pSrc[2 * l] >> 2);
+     l = i + n2;
 
-        yt = (pSrc[2 * i + 1] >> 2) - (pSrc[2 * l + 1] >> 2);
-        pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2) + (pSrc[2 * i + 1] >> 2);
+     xt =          (pSrc[2 * i] >> 2U) - (pSrc[2 * l] >> 2U);
+     pSrc[2 * i] = (pSrc[2 * i] >> 2U) + (pSrc[2 * l] >> 2U);
 
-        mult_32x32_keep32_R(p0, xt, cosVal);
-        mult_32x32_keep32_R(p1, yt, cosVal);
-        multAcc_32x32_keep32_R(p0, yt, sinVal);
-        multSub_32x32_keep32_R(p1, xt, sinVal);
+     yt =              (pSrc[2 * i + 1] >> 2U) - (pSrc[2 * l + 1] >> 2U);
+     pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2U) + (pSrc[2 * i + 1] >> 2U);
 
-        pSrc[2U * l] = p0 << 1;
-        pSrc[2U * l + 1U] = p1 << 1;
+     mult_32x32_keep32_R(p0, xt, cosVal);
+     mult_32x32_keep32_R(p1, yt, cosVal);
+     multAcc_32x32_keep32_R(p0, yt, sinVal);
+     multSub_32x32_keep32_R(p1, xt, sinVal);
 
-    }
+     pSrc[2 * l]     = p0 << 1;
+     pSrc[2 * l + 1] = p1 << 1;
+  }
 
-    // first col
-    arm_radix4_butterfly_q31( pSrc, n2, (q31_t*)pCoef, 2U);
-    // second col
-    arm_radix4_butterfly_q31( pSrc + fftLen, n2, (q31_t*)pCoef, 2U);
+  /* first col */
+  arm_radix4_butterfly_q31 (pSrc,          n2, (q31_t*)pCoef, 2U);
 
-    for (i = 0; i < fftLen >> 1; i++)
-    {
-        p0 = pSrc[4*i+0];
-        p1 = pSrc[4*i+1];
-        xt = pSrc[4*i+2];
-        yt = pSrc[4*i+3];
+  /* second col */
+  arm_radix4_butterfly_q31 (pSrc + fftLen, n2, (q31_t*)pCoef, 2U);
 
-        p0 <<= 1;
-        p1 <<= 1;
-        xt <<= 1;
-        yt <<= 1;
+  n2 = fftLen >> 1U;
+  for (i = 0; i < n2; i++)
+  {
+     p0 = pSrc[4 * i + 0];
+     p1 = pSrc[4 * i + 1];
+     xt = pSrc[4 * i + 2];
+     yt = pSrc[4 * i + 3];
 
-        pSrc[4*i+0] = p0;
-        pSrc[4*i+1] = p1;
-        pSrc[4*i+2] = xt;
-        pSrc[4*i+3] = yt;
-    }
+     p0 <<= 1U;
+     p1 <<= 1U;
+     xt <<= 1U;
+     yt <<= 1U;
+
+     pSrc[4 * i + 0] = p0;
+     pSrc[4 * i + 1] = p1;
+     pSrc[4 * i + 2] = xt;
+     pSrc[4 * i + 3] = yt;
+  }
 
 }
 
 void arm_cfft_radix4by2_inverse_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    const q31_t * pCoef)
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef)
 {
-    uint32_t i, l;
-    uint32_t n2, ia;
-    q31_t xt, yt, cosVal, sinVal;
-    q31_t p0, p1;
+  uint32_t i, l;
+  uint32_t n2;
+  q31_t xt, yt, cosVal, sinVal;
+  q31_t p0, p1;
 
-    n2 = fftLen >> 1;
-    ia = 0;
-    for (i = 0; i < n2; i++)
-    {
-        cosVal = pCoef[2*ia];
-        sinVal = pCoef[2*ia + 1];
-        ia++;
+  n2 = fftLen >> 1U;
+  for (i = 0; i < n2; i++)
+  {
+     cosVal = pCoef[2 * i];
+     sinVal = pCoef[2 * i + 1];
 
-        l = i + n2;
-        xt = (pSrc[2 * i] >> 2) - (pSrc[2 * l] >> 2);
-        pSrc[2 * i] = (pSrc[2 * i] >> 2) + (pSrc[2 * l] >> 2);
+     l = i + n2;
 
-        yt = (pSrc[2 * i + 1] >> 2) - (pSrc[2 * l + 1] >> 2);
-        pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2) + (pSrc[2 * i + 1] >> 2);
+     xt =          (pSrc[2 * i] >> 2U) - (pSrc[2 * l] >> 2U);
+     pSrc[2 * i] = (pSrc[2 * i] >> 2U) + (pSrc[2 * l] >> 2U);
 
-        mult_32x32_keep32_R(p0, xt, cosVal);
-        mult_32x32_keep32_R(p1, yt, cosVal);
-        multSub_32x32_keep32_R(p0, yt, sinVal);
-        multAcc_32x32_keep32_R(p1, xt, sinVal);
+     yt =              (pSrc[2 * i + 1] >> 2U) - (pSrc[2 * l + 1] >> 2U);
+     pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2U) + (pSrc[2 * i + 1] >> 2U);
 
-        pSrc[2U * l] = p0 << 1;
-        pSrc[2U * l + 1U] = p1 << 1;
+     mult_32x32_keep32_R(p0, xt, cosVal);
+     mult_32x32_keep32_R(p1, yt, cosVal);
+     multSub_32x32_keep32_R(p0, yt, sinVal);
+     multAcc_32x32_keep32_R(p1, xt, sinVal);
 
-    }
+     pSrc[2 * l]     = p0 << 1U;
+     pSrc[2 * l + 1] = p1 << 1U;
+  }
 
-    // first col
-    arm_radix4_butterfly_inverse_q31( pSrc, n2, (q31_t*)pCoef, 2U);
-    // second col
-    arm_radix4_butterfly_inverse_q31( pSrc + fftLen, n2, (q31_t*)pCoef, 2U);
+  /* first col */
+  arm_radix4_butterfly_inverse_q31( pSrc,          n2, (q31_t*)pCoef, 2U);
 
-    for (i = 0; i < fftLen >> 1; i++)
-    {
-        p0 = pSrc[4*i+0];
-        p1 = pSrc[4*i+1];
-        xt = pSrc[4*i+2];
-        yt = pSrc[4*i+3];
+  /* second col */
+  arm_radix4_butterfly_inverse_q31( pSrc + fftLen, n2, (q31_t*)pCoef, 2U);
 
-        p0 <<= 1;
-        p1 <<= 1;
-        xt <<= 1;
-        yt <<= 1;
+  n2 = fftLen >> 1U;
+  for (i = 0; i < n2; i++)
+  {
+     p0 = pSrc[4 * i + 0];
+     p1 = pSrc[4 * i + 1];
+     xt = pSrc[4 * i + 2];
+     yt = pSrc[4 * i + 3];
 
-        pSrc[4*i+0] = p0;
-        pSrc[4*i+1] = p1;
-        pSrc[4*i+2] = xt;
-        pSrc[4*i+3] = yt;
-    }
+     p0 <<= 1U;
+     p1 <<= 1U;
+     xt <<= 1U;
+     yt <<= 1U;
+
+     pSrc[4 * i + 0] = p0;
+     pSrc[4 * i + 1] = p1;
+     pSrc[4 * i + 2] = xt;
+     pSrc[4 * i + 3] = yt;
+  }
 }
-
diff --git a/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c b/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c
index d35988d..f75e329 100644
--- a/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c
+++ b/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_cfft_radix2_f32.c
  * Description:  Radix-2 Decimation in Frequency CFFT & CIFFT Floating point processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,64 +29,62 @@
 #include "arm_math.h"
 
 void arm_radix2_butterfly_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pCoef,
-  uint16_t twidCoefModifier);
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier);
 
 void arm_radix2_butterfly_inverse_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pCoef,
-  uint16_t twidCoefModifier,
-  float32_t onebyfftLen);
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier,
+        float32_t onebyfftLen);
 
 extern void arm_bitreversal_f32(
-    float32_t * pSrc,
-    uint16_t fftSize,
-    uint16_t bitRevFactor,
-    uint16_t * pBitRevTab);
+        float32_t * pSrc,
+        uint16_t fftSize,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab);
 
 /**
-* @ingroup groupTransforms
-*/
+  @ingroup groupTransforms
+ */
 
 /**
-* @addtogroup ComplexFFT
-* @{
-*/
+  @addtogroup ComplexFFT
+  @{
+ */
 
 /**
-* @details
-* @brief Radix-2 CFFT/CIFFT.
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_f32 and will be removed
-* in the future.
-* @param[in]      *S    points to an instance of the floating-point Radix-2 CFFT/CIFFT structure.
-* @param[in, out] *pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place.
-* @return none.
-*/
+  @brief         Radix-2 CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be removed in the future
+  @param[in]     S    points to an instance of the floating-point Radix-2 CFFT/CIFFT structure
+  @param[in,out] pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @return        none
+ */
 
 void arm_cfft_radix2_f32(
 const arm_cfft_radix2_instance_f32 * S,
-float32_t * pSrc)
+      float32_t * pSrc)
 {
 
    if (S->ifftFlag == 1U)
    {
-      /*  Complex IFFT radix-2  */
+      /* Complex IFFT radix-2 */
       arm_radix2_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle,
       S->twidCoefModifier, S->onebyfftLen);
    }
    else
    {
-      /*  Complex FFT radix-2  */
+      /* Complex FFT radix-2 */
       arm_radix2_butterfly_f32(pSrc, S->fftLen, S->pTwiddle,
       S->twidCoefModifier);
    }
 
    if (S->bitReverseFlag == 1U)
    {
-      /*  Bit Reversal */
+      /* Bit Reversal */
       arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
    }
 
@@ -94,36 +92,36 @@
 
 
 /**
-* @} end of ComplexFFT group
-*/
+  @} end of ComplexFFT group
+ */
 
 
 
 /* ----------------------------------------------------------------------
-** Internal helper function used by the FFTs
-** ------------------------------------------------------------------- */
+ ** Internal helper function used by the FFTs
+ ** ------------------------------------------------------------------- */
 
-/*
-* @brief  Core function for the floating-point CFFT butterfly process.
-* @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.
-* @param[in]      fftLen           length of the FFT.
-* @param[in]      *pCoef           points to the twiddle coefficient buffer.
-* @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-* @return none.
-*/
+/**
+  brief  Core function for the floating-point CFFT butterfly process.
+  param[in,out] pSrc             points to in-place buffer of floating-point data type
+  param[in]     fftLen           length of the FFT
+  param[in]     pCoef            points to twiddle coefficient buffer
+  param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  return        none
+ */
 
 void arm_radix2_butterfly_f32(
-float32_t * pSrc,
-uint32_t fftLen,
-float32_t * pCoef,
-uint16_t twidCoefModifier)
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier)
 {
 
-   uint32_t i, j, k, l;
-   uint32_t n1, n2, ia;
-   float32_t xt, yt, cosVal, sinVal;
-   float32_t p0, p1, p2, p3;
-   float32_t a0, a1;
+        uint32_t i, j, k, l;
+        uint32_t n1, n2, ia;
+        float32_t xt, yt, cosVal, sinVal;
+        float32_t p0, p1, p2, p3;
+        float32_t a0, a1;
 
 #if defined (ARM_MATH_DSP)
 
@@ -227,7 +225,7 @@
       pSrc[2 * i + 3] = yt;
    }                             // groups loop end
 
-#else
+#else /* #if defined (ARM_MATH_DSP) */
 
    n2 = fftLen;
 
@@ -275,24 +273,24 @@
       twidCoefModifier <<= 1U;
    }
 
-#endif //    #if defined (ARM_MATH_DSP)
+#endif /* #if defined (ARM_MATH_DSP) */
 
 }
 
 
 void arm_radix2_butterfly_inverse_f32(
-float32_t * pSrc,
-uint32_t fftLen,
-float32_t * pCoef,
-uint16_t twidCoefModifier,
-float32_t onebyfftLen)
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier,
+        float32_t onebyfftLen)
 {
 
-   uint32_t i, j, k, l;
-   uint32_t n1, n2, ia;
-   float32_t xt, yt, cosVal, sinVal;
-   float32_t p0, p1, p2, p3;
-   float32_t a0, a1;
+        uint32_t i, j, k, l;
+        uint32_t n1, n2, ia;
+        float32_t xt, yt, cosVal, sinVal;
+        float32_t p0, p1, p2, p3;
+        float32_t a0, a1;
 
 #if defined (ARM_MATH_DSP)
 
@@ -392,7 +390,7 @@
       pSrc[2 * i + 3] = p3;
    }                             // butterfly loop end
 
-#else
+#else /* #if defined (ARM_MATH_DSP) */
 
    n2 = fftLen;
 
@@ -461,12 +459,12 @@
       p3 = yt * onebyfftLen;
 
       pSrc[2 * i] = p0;
-      pSrc[2U * l] = p2;
+      pSrc[2 * l] = p2;
 
       pSrc[2 * i + 1] = p1;
-      pSrc[2U * l + 1U] = p3;
+      pSrc[2 * l + 1] = p3;
    }                             // butterfly loop end
 
-#endif //      #if defined (ARM_MATH_DSP)
+#endif /* #if defined (ARM_MATH_DSP) */
 
 }
diff --git a/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c b/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c
index fdfa63e..417ad91 100644
--- a/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c
+++ b/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_cfft_radix2_init_f32.c
  * Description:  Radix-2 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,36 +30,41 @@
 #include "arm_common_tables.h"
 
 /**
- * @ingroup groupTransforms
+  @ingroup groupTransforms
  */
 
 /**
- * @addtogroup ComplexFFT
- * @{
+  @addtogroup ComplexFFT
+  @{
  */
 
 /**
-* @brief  Initialization function for the floating-point CFFT/CIFFT.
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_f32 and will be removed
-* in the future.
-* @param[in,out] *S             points to an instance of the floating-point CFFT/CIFFT structure.
-* @param[in]     fftLen         length of the FFT.
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
-*
-* \par Description:
-* \par
-* The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
-* \par
-* The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-* \par
-* The parameter <code>fftLen</code>	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
-* \par
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+  @brief         Initialization function for the floating-point CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be removed in the future.
+  @param[in,out] S              points to an instance of the floating-point CFFT/CIFFT structure
+  @param[in]     fftLen         length of the FFT
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+  @par           Details
+                   The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
+  @par
+                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
 */
+
 arm_status arm_cfft_radix2_init_f32(
   arm_cfft_radix2_instance_f32 * S,
   uint16_t fftLen,
@@ -188,5 +193,5 @@
 }
 
 /**
- * @} end of ComplexFFT group
+  @} end of ComplexFFT group
  */
diff --git a/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c b/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c
index 2646374..3d865d0 100644
--- a/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c
+++ b/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_cfft_radix2_init_q15.c
  * Description:  Radix-2 Decimation in Frequency Q15 FFT & IFFT initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,35 +30,40 @@
 #include "arm_common_tables.h"
 
 /**
- * @ingroup groupTransforms
+  @ingroup groupTransforms
  */
 
 
 /**
- * @addtogroup ComplexFFT
- * @{
+  @addtogroup ComplexFFT
+  @{
  */
 
 /**
-* @brief Initialization function for the Q15 CFFT/CIFFT.
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q15 and will be removed
-* @param[in,out] *S             points to an instance of the Q15 CFFT/CIFFT structure.
-* @param[in]     fftLen         length of the FFT.
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
-*
-* \par Description:
-* \par
-* The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
-* \par
-* The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-* \par
-* The parameter <code>fftLen</code>	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
-* \par
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+  @brief                        Initialization function for the Q15 CFFT/CIFFT.
+  @deprecated                   Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed
+  @param[in,out] S              points to an instance of the Q15 CFFT/CIFFT structure.
+  @param[in]     fftLen         length of the FFT.
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+  @par           Details
+                   The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
+  @par
+                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
 */
 
 arm_status arm_cfft_radix2_init_q15(
@@ -173,5 +178,5 @@
 }
 
 /**
- * @} end of ComplexFFT group
+  @} end of ComplexFFT group
  */
diff --git a/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c b/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c
index 56fff4b..f4a20d6 100644
--- a/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c
+++ b/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_cfft_radix2_init_q31.c
  * Description:  Radix-2 Decimation in Frequency Fixed-point CFFT & CIFFT Initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,36 +30,39 @@
 #include "arm_common_tables.h"
 
 /**
- * @ingroup groupTransforms
+  @ingroup groupTransforms
  */
 
 /**
- * @addtogroup ComplexFFT
- * @{
+  @addtogroup ComplexFFT
+  @{
  */
 
-
 /**
-*
-* @brief  Initialization function for the Q31 CFFT/CIFFT.
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q31 and will be removed
-* @param[in,out] *S             points to an instance of the Q31 CFFT/CIFFT structure.
-* @param[in]     fftLen         length of the FFT.
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
-*
-* \par Description:
-* \par
-* The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
-* \par
-* The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-* \par
-* The parameter <code>fftLen</code>	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
-* \par
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+  @brief         Initialization function for the Q31 CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed in the future.
+  @param[in,out] S              points to an instance of the Q31 CFFT/CIFFT structure
+  @param[in]     fftLen         length of the FFT
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+  @par           Details
+                   The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
+  @par
+                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
 */
 
 arm_status arm_cfft_radix2_init_q31(
@@ -76,8 +79,10 @@
 
   /*  Initialise the Twiddle coefficient pointer */
   S->pTwiddle = (q31_t *) twiddleCoef_4096_q31;
+
   /*  Initialise the Flag for selection of CFFT or CIFFT */
   S->ifftFlag = ifftFlag;
+
   /*  Initialise the Flag for calculation Bit reversal or not */
   S->bitReverseFlag = bitReverseFlag;
 
@@ -170,5 +175,5 @@
 }
 
 /**
- * @} end of ComplexFFT group
+  @} end of ComplexFFT group
  */
diff --git a/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c b/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c
index 8880ab9..2a03b57 100644
--- a/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c
+++ b/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_cfft_radix2_q15.c
  * Description:  Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,74 +29,71 @@
 #include "arm_math.h"
 
 void arm_radix2_butterfly_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  q15_t * pCoef,
-  uint16_t twidCoefModifier);
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef,
+        uint16_t twidCoefModifier);
 
 void arm_radix2_butterfly_inverse_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  q15_t * pCoef,
-  uint16_t twidCoefModifier);
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef,
+        uint16_t twidCoefModifier);
 
 void arm_bitreversal_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  uint16_t bitRevFactor,
-  uint16_t * pBitRevTab);
+        q15_t * pSrc,
+        uint32_t fftLen,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab);
 
 /**
- * @ingroup groupTransforms
+  @ingroup groupTransforms
  */
 
 /**
- * @addtogroup ComplexFFT
- * @{
+  @addtogroup ComplexFFT
+  @{
  */
 
 /**
- * @details
- * @brief Processing function for the fixed-point CFFT/CIFFT.
- * @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q15 and will be removed
- * @param[in]      *S    points to an instance of the fixed-point CFFT/CIFFT structure.
- * @param[in, out] *pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place.
- * @return none.
+  @brief         Processing function for the fixed-point CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed in the future.
+  @param[in]     S    points to an instance of the fixed-point CFFT/CIFFT structure
+  @param[in,out] pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @return        none
  */
 
 void arm_cfft_radix2_q15(
   const arm_cfft_radix2_instance_q15 * S,
-  q15_t * pSrc)
+        q15_t * pSrc)
 {
 
   if (S->ifftFlag == 1U)
   {
-    arm_radix2_butterfly_inverse_q15(pSrc, S->fftLen,
-                                     S->pTwiddle, S->twidCoefModifier);
+    arm_radix2_butterfly_inverse_q15 (pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
   }
   else
   {
-    arm_radix2_butterfly_q15(pSrc, S->fftLen,
-                             S->pTwiddle, S->twidCoefModifier);
+    arm_radix2_butterfly_q15 (pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
   }
 
   arm_bitreversal_q15(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
 }
 
 /**
- * @} end of ComplexFFT group
+  @} end of ComplexFFT group
  */
 
 void arm_radix2_butterfly_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  q15_t * pCoef,
-  uint16_t twidCoefModifier)
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef,
+        uint16_t twidCoefModifier)
 {
 #if defined (ARM_MATH_DSP)
 
-  unsigned i, j, k, l;
-  unsigned n1, n2, ia;
+  uint32_t i, j, k, l;
+  uint32_t n1, n2, ia;
   q15_t in;
   q31_t T, S, R;
   q31_t coeff, out1, out2;
@@ -111,215 +108,196 @@
   // loop for groups
   for (i = 0; i < n2; i++)
   {
-    coeff = _SIMD32_OFFSET(pCoef + (ia * 2U));
+    coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
 
     ia = ia + twidCoefModifier;
 
     l = i + n2;
 
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
+    T = read_q15x2 (pSrc + (2 * i));
     in = ((int16_t) (T & 0xFFFF)) >> 1;
     T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
 
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
+    S = read_q15x2 (pSrc + (2 * l));
     in = ((int16_t) (S & 0xFFFF)) >> 1;
     S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
 
     R = __QSUB16(T, S);
 
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
+    write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     out1 = __SMUAD(coeff, R) >> 16;
     out2 = __SMUSDX(coeff, R);
-
 #else
-
     out1 = __SMUSDX(R, coeff) >> 16U;
     out2 = __SMUAD(coeff, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
+    write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
 
-    _SIMD32_OFFSET(pSrc + (2U * l)) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-    coeff = _SIMD32_OFFSET(pCoef + (ia * 2U));
+    coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
 
     ia = ia + twidCoefModifier;
 
-    // loop for butterfly
+    /* loop for butterfly */
     i++;
     l++;
 
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
+    T = read_q15x2 (pSrc + (2 * i));
     in = ((int16_t) (T & 0xFFFF)) >> 1;
     T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
 
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
+    S = read_q15x2 (pSrc + (2 * l));
     in = ((int16_t) (S & 0xFFFF)) >> 1;
     S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
 
     R = __QSUB16(T, S);
 
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
+    write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     out1 = __SMUAD(coeff, R) >> 16;
     out2 = __SMUSDX(coeff, R);
-
 #else
 
     out1 = __SMUSDX(R, coeff) >> 16U;
     out2 = __SMUAD(coeff, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
+    write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
 
-    _SIMD32_OFFSET(pSrc + (2U * l)) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-  }                             // groups loop end
+  } /* groups loop end */
 
   twidCoefModifier = twidCoefModifier << 1U;
 
-  // loop for stage
+  /* loop for stage */
   for (k = fftLen / 2; k > 2; k = k >> 1)
   {
     n1 = n2;
     n2 = n2 >> 1;
     ia = 0;
 
-    // loop for groups
+    /* loop for groups */
     for (j = 0; j < n2; j++)
     {
-      coeff = _SIMD32_OFFSET(pCoef + (ia * 2U));
+      coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
 
       ia = ia + twidCoefModifier;
 
-      // loop for butterfly
+      /* loop for butterfly */
       for (i = j; i < fftLen; i += n1)
       {
         l = i + n2;
 
-        T = _SIMD32_OFFSET(pSrc + (2 * i));
+        T = read_q15x2 (pSrc + (2 * i));
 
-        S = _SIMD32_OFFSET(pSrc + (2 * l));
+        S = read_q15x2 (pSrc + (2 * l));
 
         R = __QSUB16(T, S);
 
-        _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
+        write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
         out1 = __SMUAD(coeff, R) >> 16;
         out2 = __SMUSDX(coeff, R);
-
 #else
-
         out1 = __SMUSDX(R, coeff) >> 16U;
         out2 = __SMUAD(coeff, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-        _SIMD32_OFFSET(pSrc + (2U * l)) =
-          (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+        write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
 
         i += n1;
 
         l = i + n2;
 
-        T = _SIMD32_OFFSET(pSrc + (2 * i));
+        T = read_q15x2 (pSrc + (2 * i));
 
-        S = _SIMD32_OFFSET(pSrc + (2 * l));
+        S = read_q15x2 (pSrc + (2 * l));
 
         R = __QSUB16(T, S);
 
-        _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
+        write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
         out1 = __SMUAD(coeff, R) >> 16;
         out2 = __SMUSDX(coeff, R);
-
 #else
-
         out1 = __SMUSDX(R, coeff) >> 16U;
         out2 = __SMUAD(coeff, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
+        write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
 
-        _SIMD32_OFFSET(pSrc + (2U * l)) =
-          (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+      } /* butterfly loop end */
 
-      }                         // butterfly loop end
-
-    }                           // groups loop end
+    } /* groups loop end */
 
     twidCoefModifier = twidCoefModifier << 1U;
-  }                             // stages loop end
+  } /* stages loop end */
 
   n1 = n2;
   n2 = n2 >> 1;
   ia = 0;
 
-  coeff = _SIMD32_OFFSET(pCoef + (ia * 2U));
+  coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
 
   ia = ia + twidCoefModifier;
 
-  // loop for butterfly
+  /* loop for butterfly */
   for (i = 0; i < fftLen; i += n1)
   {
     l = i + n2;
 
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
+    T = read_q15x2 (pSrc + (2 * i));
 
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
+    S = read_q15x2 (pSrc + (2 * l));
 
     R = __QSUB16(T, S);
 
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __QADD16(T, S);
+    write_q15x2 (pSrc + (2 * i), __QADD16(T, S));
 
-    _SIMD32_OFFSET(pSrc + (2U * l)) = R;
+    write_q15x2 (pSrc + (2 * l), R);
 
     i += n1;
     l = i + n2;
 
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
+    T = read_q15x2 (pSrc + (2 * i));
 
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
+    S = read_q15x2 (pSrc + (2 * l));
 
     R = __QSUB16(T, S);
 
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __QADD16(T, S);
+    write_q15x2 (pSrc + (2 * i), __QADD16(T, S));
 
-    _SIMD32_OFFSET(pSrc + (2U * l)) = R;
+    write_q15x2 (pSrc + (2 * l), R);
 
-  }                             // groups loop end
+  } /* groups loop end */
 
 
-#else
+#else /* #if defined (ARM_MATH_DSP) */
 
-  unsigned i, j, k, l;
-  unsigned n1, n2, ia;
+  uint32_t i, j, k, l;
+  uint32_t n1, n2, ia;
   q15_t xt, yt, cosVal, sinVal;
 
 
-  //N = fftLen;
+  // N = fftLen;
   n2 = fftLen;
 
   n1 = n2;
   n2 = n2 >> 1;
   ia = 0;
 
-  // loop for groups
+  /* loop for groups */
   for (j = 0; j < n2; j++)
   {
-    cosVal = pCoef[ia * 2];
+    cosVal = pCoef[(ia * 2)];
     sinVal = pCoef[(ia * 2) + 1];
     ia = ia + twidCoefModifier;
 
-    // loop for butterfly
+    /* loop for butterfly */
     for (i = j; i < fftLen; i += n1)
     {
       l = i + n2;
@@ -327,36 +305,36 @@
       pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
 
       yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
-      pSrc[2 * i + 1] =
-        ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
+      pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) +
+                         (pSrc[2 * i + 1] >> 1U)  ) >> 1U;
 
-      pSrc[2U * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
-                      ((int16_t) (((q31_t) yt * sinVal) >> 16)));
+      pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
+                     ((int16_t) (((q31_t) yt * sinVal) >> 16)));
 
-      pSrc[2U * l + 1U] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
-                           ((int16_t) (((q31_t) xt * sinVal) >> 16)));
+      pSrc[2U * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
+                          ((int16_t) (((q31_t) xt * sinVal) >> 16)));
 
-    }                           // butterfly loop end
+    } /* butterfly loop end */
 
-  }                             // groups loop end
+  } /* groups loop end */
 
   twidCoefModifier = twidCoefModifier << 1U;
 
-  // loop for stage
+  /* loop for stage */
   for (k = fftLen / 2; k > 2; k = k >> 1)
   {
     n1 = n2;
     n2 = n2 >> 1;
     ia = 0;
 
-    // loop for groups
+    /* loop for groups */
     for (j = 0; j < n2; j++)
     {
       cosVal = pCoef[ia * 2];
       sinVal = pCoef[(ia * 2) + 1];
       ia = ia + twidCoefModifier;
 
-      // loop for butterfly
+      /* loop for butterfly */
       for (i = j; i < fftLen; i += n1)
       {
         l = i + n2;
@@ -366,24 +344,24 @@
         yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
         pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U;
 
-        pSrc[2U * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
-                        ((int16_t) (((q31_t) yt * sinVal) >> 16)));
+        pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
+                       ((int16_t) (((q31_t) yt * sinVal) >> 16)));
 
-        pSrc[2U * l + 1U] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
-                             ((int16_t) (((q31_t) xt * sinVal) >> 16)));
+        pSrc[2U * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
+                            ((int16_t) (((q31_t) xt * sinVal) >> 16)));
 
-      }                         // butterfly loop end
+      } /* butterfly loop end */
 
-    }                           // groups loop end
+    } /* groups loop end */
 
     twidCoefModifier = twidCoefModifier << 1U;
-  }                             // stages loop end
+  } /* stages loop end */
 
   n1 = n2;
   n2 = n2 >> 1;
   ia = 0;
 
-  // loop for groups
+  /* loop for groups */
   for (j = 0; j < n2; j++)
   {
     cosVal = pCoef[ia * 2];
@@ -391,7 +369,7 @@
 
     ia = ia + twidCoefModifier;
 
-    // loop for butterfly
+    /* loop for butterfly */
     for (i = j; i < fftLen; i += n1)
     {
       l = i + n2;
@@ -401,244 +379,226 @@
       yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
       pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
 
-      pSrc[2U * l] = xt;
+      pSrc[2 * l] = xt;
 
-      pSrc[2U * l + 1U] = yt;
+      pSrc[2 * l + 1] = yt;
 
-    }                           // butterfly loop end
+    } /* butterfly loop end */
 
-  }                             // groups loop end
+  } /* groups loop end */
 
   twidCoefModifier = twidCoefModifier << 1U;
 
-#endif //             #if defined (ARM_MATH_DSP)
+#endif /* #if defined (ARM_MATH_DSP) */
 
 }
 
 
 void arm_radix2_butterfly_inverse_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  q15_t * pCoef,
-  uint16_t twidCoefModifier)
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef,
+        uint16_t twidCoefModifier)
 {
 #if defined (ARM_MATH_DSP)
 
-  unsigned i, j, k, l;
-  unsigned n1, n2, ia;
-  q15_t in;
-  q31_t T, S, R;
-  q31_t coeff, out1, out2;
+        uint32_t i, j, k, l;
+        uint32_t n1, n2, ia;
+        q15_t in;
+        q31_t T, S, R;
+        q31_t coeff, out1, out2;
 
-  //N = fftLen;
+  // N = fftLen;
   n2 = fftLen;
 
   n1 = n2;
   n2 = n2 >> 1;
   ia = 0;
 
-  // loop for groups
+  /* loop for groups */
   for (i = 0; i < n2; i++)
   {
-    coeff = _SIMD32_OFFSET(pCoef + (ia * 2U));
+    coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
 
     ia = ia + twidCoefModifier;
 
     l = i + n2;
 
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
+    T = read_q15x2 (pSrc + (2 * i));
     in = ((int16_t) (T & 0xFFFF)) >> 1;
     T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
 
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
+    S = read_q15x2 (pSrc + (2 * l));
     in = ((int16_t) (S & 0xFFFF)) >> 1;
     S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
 
     R = __QSUB16(T, S);
 
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
+    write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     out1 = __SMUSD(coeff, R) >> 16;
     out2 = __SMUADX(coeff, R);
 #else
-
     out1 = __SMUADX(R, coeff) >> 16U;
     out2 = __SMUSD(__QSUB(0, coeff), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
+    write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
 
-    _SIMD32_OFFSET(pSrc + (2U * l)) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-    coeff = _SIMD32_OFFSET(pCoef + (ia * 2U));
+    coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
 
     ia = ia + twidCoefModifier;
 
-    // loop for butterfly
+    /* loop for butterfly */
     i++;
     l++;
 
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
+    T = read_q15x2 (pSrc + (2 * i));
     in = ((int16_t) (T & 0xFFFF)) >> 1;
     T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
 
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
+    S = read_q15x2 (pSrc + (2 * l));
     in = ((int16_t) (S & 0xFFFF)) >> 1;
     S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
 
     R = __QSUB16(T, S);
 
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
+    write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     out1 = __SMUSD(coeff, R) >> 16;
     out2 = __SMUADX(coeff, R);
 #else
-
     out1 = __SMUADX(R, coeff) >> 16U;
     out2 = __SMUSD(__QSUB(0, coeff), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
+    write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
 
-    _SIMD32_OFFSET(pSrc + (2U * l)) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-  }                             // groups loop end
+  } /* groups loop end */
 
   twidCoefModifier = twidCoefModifier << 1U;
 
-  // loop for stage
+  /* loop for stage */
   for (k = fftLen / 2; k > 2; k = k >> 1)
   {
     n1 = n2;
     n2 = n2 >> 1;
     ia = 0;
 
-    // loop for groups
+    /* loop for groups */
     for (j = 0; j < n2; j++)
     {
-      coeff = _SIMD32_OFFSET(pCoef + (ia * 2U));
+      coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
 
       ia = ia + twidCoefModifier;
 
-      // loop for butterfly
+      /* loop for butterfly */
       for (i = j; i < fftLen; i += n1)
       {
         l = i + n2;
 
-        T = _SIMD32_OFFSET(pSrc + (2 * i));
+        T = read_q15x2 (pSrc + (2 * i));
 
-        S = _SIMD32_OFFSET(pSrc + (2 * l));
+        S = read_q15x2 (pSrc + (2 * l));
 
         R = __QSUB16(T, S);
 
-        _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
+        write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
         out1 = __SMUSD(coeff, R) >> 16;
         out2 = __SMUADX(coeff, R);
-
 #else
-
         out1 = __SMUADX(R, coeff) >> 16U;
         out2 = __SMUSD(__QSUB(0, coeff), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-        _SIMD32_OFFSET(pSrc + (2U * l)) =
-          (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+        write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
 
         i += n1;
 
         l = i + n2;
 
-        T = _SIMD32_OFFSET(pSrc + (2 * i));
+        T = read_q15x2 (pSrc + (2 * i));
 
-        S = _SIMD32_OFFSET(pSrc + (2 * l));
+        S = read_q15x2 (pSrc + (2 * l));
 
         R = __QSUB16(T, S);
 
-        _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
+        write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
         out1 = __SMUSD(coeff, R) >> 16;
         out2 = __SMUADX(coeff, R);
 #else
-
         out1 = __SMUADX(R, coeff) >> 16U;
         out2 = __SMUSD(__QSUB(0, coeff), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
+        write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
 
-        _SIMD32_OFFSET(pSrc + (2U * l)) =
-          (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+      } /* butterfly loop end */
 
-      }                         // butterfly loop end
-
-    }                           // groups loop end
+    } /* groups loop end */
 
     twidCoefModifier = twidCoefModifier << 1U;
-  }                             // stages loop end
+  } /* stages loop end */
 
   n1 = n2;
   n2 = n2 >> 1;
   ia = 0;
 
-  // loop for groups
+  /* loop for groups */
   for (j = 0; j < n2; j++)
   {
-    coeff = _SIMD32_OFFSET(pCoef + (ia * 2U));
+    coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
 
     ia = ia + twidCoefModifier;
 
-    // loop for butterfly
+    /* loop for butterfly */
     for (i = j; i < fftLen; i += n1)
     {
       l = i + n2;
 
-      T = _SIMD32_OFFSET(pSrc + (2 * i));
+      T = read_q15x2 (pSrc + (2 * i));
 
-      S = _SIMD32_OFFSET(pSrc + (2 * l));
+      S = read_q15x2 (pSrc + (2 * l));
 
       R = __QSUB16(T, S);
 
-      _SIMD32_OFFSET(pSrc + (2 * i)) = __QADD16(T, S);
+      write_q15x2 (pSrc + (2 * i), __QADD16(T, S));
 
-      _SIMD32_OFFSET(pSrc + (2U * l)) = R;
+      write_q15x2 (pSrc + (2 * l), R);
 
-    }                           // butterfly loop end
+    } /* butterfly loop end */
 
-  }                             // groups loop end
+  } /* groups loop end */
 
   twidCoefModifier = twidCoefModifier << 1U;
 
-#else
+#else /* #if defined (ARM_MATH_DSP) */
 
+        uint32_t i, j, k, l;
+        uint32_t n1, n2, ia;
+        q15_t xt, yt, cosVal, sinVal;
 
-  unsigned i, j, k, l;
-  unsigned n1, n2, ia;
-  q15_t xt, yt, cosVal, sinVal;
-
-  //N = fftLen;
+  // N = fftLen;
   n2 = fftLen;
 
   n1 = n2;
   n2 = n2 >> 1;
   ia = 0;
 
-  // loop for groups
+  /* loop for groups */
   for (j = 0; j < n2; j++)
   {
-    cosVal = pCoef[ia * 2];
+    cosVal = pCoef[(ia * 2)];
     sinVal = pCoef[(ia * 2) + 1];
     ia = ia + twidCoefModifier;
 
-    // loop for butterfly
+    /* loop for butterfly */
     for (i = j; i < fftLen; i += n1)
     {
       l = i + n2;
@@ -646,36 +606,36 @@
       pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
 
       yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
-      pSrc[2 * i + 1] =
-        ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
+      pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) +
+                         (pSrc[2 * i + 1] >> 1U)  ) >> 1U;
 
-      pSrc[2U * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
-                      ((int16_t) (((q31_t) yt * sinVal) >> 16)));
+      pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
+                     ((int16_t) (((q31_t) yt * sinVal) >> 16)));
 
-      pSrc[2U * l + 1U] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
-                           ((int16_t) (((q31_t) xt * sinVal) >> 16)));
+      pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
+                         ((int16_t) (((q31_t) xt * sinVal) >> 16)));
 
-    }                           // butterfly loop end
+    } /* butterfly loop end */
 
-  }                             // groups loop end
+  } /* groups loop end */
 
   twidCoefModifier = twidCoefModifier << 1U;
 
-  // loop for stage
+  /* loop for stage */
   for (k = fftLen / 2; k > 2; k = k >> 1)
   {
     n1 = n2;
     n2 = n2 >> 1;
     ia = 0;
 
-    // loop for groups
+    /* loop for groups */
     for (j = 0; j < n2; j++)
     {
-      cosVal = pCoef[ia * 2];
+      cosVal = pCoef[(ia * 2)];
       sinVal = pCoef[(ia * 2) + 1];
       ia = ia + twidCoefModifier;
 
-      // loop for butterfly
+      /* loop for butterfly */
       for (i = j; i < fftLen; i += n1)
       {
         l = i + n2;
@@ -685,29 +645,29 @@
         yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
         pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U;
 
-        pSrc[2U * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
-                        ((int16_t) (((q31_t) yt * sinVal) >> 16)));
+        pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
+                       ((int16_t) (((q31_t) yt * sinVal) >> 16))  );
 
-        pSrc[2U * l + 1U] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
-                             ((int16_t) (((q31_t) xt * sinVal) >> 16)));
+        pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
+                           ((int16_t) (((q31_t) xt * sinVal) >> 16))  );
 
-      }                         // butterfly loop end
+      } /* butterfly loop end */
 
-    }                           // groups loop end
+    } /* groups loop end */
 
     twidCoefModifier = twidCoefModifier << 1U;
-  }                             // stages loop end
+  } /* stages loop end */
 
   n1 = n2;
   n2 = n2 >> 1;
   ia = 0;
 
-  cosVal = pCoef[ia * 2];
+  cosVal = pCoef[(ia * 2)];
   sinVal = pCoef[(ia * 2) + 1];
 
   ia = ia + twidCoefModifier;
 
-  // loop for butterfly
+  /* loop for butterfly */
   for (i = 0; i < fftLen; i += n1)
   {
     l = i + n2;
@@ -717,13 +677,13 @@
     yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
     pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
 
-    pSrc[2U * l] = xt;
+    pSrc[2 * l] = xt;
 
-    pSrc[2U * l + 1U] = yt;
+    pSrc[2 * l + 1] = yt;
 
-  }                             // groups loop end
+  } /* groups loop end */
 
 
-#endif //             #if defined (ARM_MATH_DSP)
+#endif /* #if defined (ARM_MATH_DSP) */
 
 }
diff --git a/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c b/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c
index c9b1537..6c79a65 100644
--- a/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c
+++ b/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_cfft_radix2_q31.c
  * Description:  Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,44 +29,43 @@
 #include "arm_math.h"
 
 void arm_radix2_butterfly_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pCoef,
-  uint16_t twidCoefModifier);
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint16_t twidCoefModifier);
 
 void arm_radix2_butterfly_inverse_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pCoef,
-  uint16_t twidCoefModifier);
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint16_t twidCoefModifier);
 
 void arm_bitreversal_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  uint16_t bitRevFactor,
-  uint16_t * pBitRevTab);
+        q31_t * pSrc,
+        uint32_t fftLen,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab);
 
 /**
-* @ingroup groupTransforms
-*/
+  @ingroup groupTransforms
+ */
 
 /**
-* @addtogroup ComplexFFT
-* @{
-*/
+  @addtogroup ComplexFFT
+  @{
+ */
 
 /**
-* @details
-* @brief Processing function for the fixed-point CFFT/CIFFT.
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q31 and will be removed
-* @param[in]      *S    points to an instance of the fixed-point CFFT/CIFFT structure.
-* @param[in, out] *pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place.
-* @return none.
-*/
+  @brief         Processing function for the fixed-point CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed in the future.
+  @param[in]     S    points to an instance of the fixed-point CFFT/CIFFT structure
+  @param[in,out] pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @return        none
+ */
 
 void arm_cfft_radix2_q31(
-const arm_cfft_radix2_instance_q31 * S,
-q31_t * pSrc)
+  const arm_cfft_radix2_instance_q31 * S,
+        q31_t * pSrc)
 {
 
    if (S->ifftFlag == 1U)
@@ -84,14 +83,14 @@
 }
 
 /**
-* @} end of ComplexFFT group
-*/
+  @} end of ComplexFFT group
+ */
 
 void arm_radix2_butterfly_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-q31_t * pCoef,
-uint16_t twidCoefModifier)
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint16_t twidCoefModifier)
 {
 
    unsigned i, j, k, l, m;
@@ -216,10 +215,10 @@
 
 
 void arm_radix2_butterfly_inverse_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-q31_t * pCoef,
-uint16_t twidCoefModifier)
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint16_t twidCoefModifier)
 {
 
    unsigned i, j, k, l;
diff --git a/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c b/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c
index d6f66ae..9629145 100644
--- a/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c
+++ b/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_cfft_radix4_f32.c
  * Description:  Radix-4 Decimation in Frequency CFFT & CIFFT Floating point processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,47 +29,45 @@
 #include "arm_math.h"
 
 extern void arm_bitreversal_f32(
-float32_t * pSrc,
-uint16_t fftSize,
-uint16_t bitRevFactor,
-uint16_t * pBitRevTab);
+        float32_t * pSrc,
+        uint16_t fftSize,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab);
 
 void arm_radix4_butterfly_f32(
-float32_t * pSrc,
-uint16_t fftLen,
-float32_t * pCoef,
-uint16_t twidCoefModifier);
+        float32_t * pSrc,
+        uint16_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier);
 
 void arm_radix4_butterfly_inverse_f32(
-float32_t * pSrc,
-uint16_t fftLen,
-float32_t * pCoef,
-uint16_t twidCoefModifier,
-float32_t onebyfftLen);
+        float32_t * pSrc,
+        uint16_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier,
+        float32_t onebyfftLen);
 
 
 /**
-* @ingroup groupTransforms
-*/
+  @ingroup groupTransforms
+ */
 
 /**
-* @addtogroup ComplexFFT
-* @{
-*/
+  @addtogroup ComplexFFT
+  @{
+ */
 
 /**
-* @details
-* @brief Processing function for the floating-point Radix-4 CFFT/CIFFT.
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_f32 and will be removed
-* in the future.
-* @param[in]      *S    points to an instance of the floating-point Radix-4 CFFT/CIFFT structure.
-* @param[in, out] *pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place.
-* @return none.
-*/
+  @brief         Processing function for the floating-point Radix-4 CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be removed in the future.
+  @param[in]     S    points to an instance of the floating-point Radix-4 CFFT/CIFFT structure
+  @param[in,out] pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @return        none
+ */
 
 void arm_cfft_radix4_f32(
   const arm_cfft_radix4_instance_f32 * S,
-  float32_t * pSrc)
+        float32_t * pSrc)
 {
    if (S->ifftFlag == 1U)
    {
@@ -91,46 +89,43 @@
 }
 
 /**
-* @} end of ComplexFFT group
-*/
+  @} end of ComplexFFT group
+ */
 
 /* ----------------------------------------------------------------------
  * Internal helper function used by the FFTs
  * ---------------------------------------------------------------------- */
 
-/*
-* @brief  Core function for the floating-point CFFT butterfly process.
-* @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.
-* @param[in]      fftLen           length of the FFT.
-* @param[in]      *pCoef           points to the twiddle coefficient buffer.
-* @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-* @return none.
-*/
+/**
+  brief         Core function for the floating-point CFFT butterfly process.
+  param[in,out] pSrc             points to the in-place buffer of floating-point data type
+  param[in]     fftLen           length of the FFT
+  param[in]     pCoef            points to the twiddle coefficient buffer
+  param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  return        none
+ */
 
 void arm_radix4_butterfly_f32(
-float32_t * pSrc,
-uint16_t fftLen,
-float32_t * pCoef,
-uint16_t twidCoefModifier)
+        float32_t * pSrc,
+        uint16_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier)
 {
+        float32_t co1, co2, co3, si1, si2, si3;
+        uint32_t ia1, ia2, ia3;
+        uint32_t i0, i1, i2, i3;
+        uint32_t n1, n2, j, k;
 
-   float32_t co1, co2, co3, si1, si2, si3;
-   uint32_t ia1, ia2, ia3;
-   uint32_t i0, i1, i2, i3;
-   uint32_t n1, n2, j, k;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-#if defined (ARM_MATH_DSP)
-
-   /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-   float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
-   float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
-   Ybminusd;
-   float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
-   float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
-   float32_t *ptr1;
-   float32_t p0,p1,p2,p3,p4,p5;
-   float32_t a0,a1,a2,a3,a4,a5,a6,a7;
+        float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
+        float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
+        Ybminusd;
+        float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
+        float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
+        float32_t *ptr1;
+        float32_t p0,p1,p2,p3,p4,p5;
+        float32_t a0,a1,a2,a3,a4,a5,a6,a7;
 
    /*  Initializations for the first stage */
    n2 = fftLen;
@@ -290,11 +285,11 @@
          /*  index calculation for the coefficients */
          ia2 = ia1 + ia1;
          ia3 = ia2 + ia1;
-         co1 = pCoef[ia1 * 2U];
+         co1 = pCoef[(ia1 * 2U)];
          si1 = pCoef[(ia1 * 2U) + 1U];
-         co2 = pCoef[ia2 * 2U];
+         co2 = pCoef[(ia2 * 2U)];
          si2 = pCoef[(ia2 * 2U) + 1U];
-         co3 = pCoef[ia3 * 2U];
+         co3 = pCoef[(ia3 * 2U)];
          si3 = pCoef[(ia3 * 2U) + 1U];
 
          /*  Twiddle coefficients index modifier */
@@ -484,11 +479,9 @@
 
 #else
 
-   float32_t t1, t2, r1, r2, s1, s2;
+        float32_t t1, t2, r1, r2, s1, s2;
 
-   /* Run the below code for Cortex-M0 */
-
-   /*  Initializations for the fft calculation */
+   /* Initializations for the fft calculation */
    n2 = fftLen;
    n1 = n2;
    for (k = fftLen; k > 1U; k >>= 2U)
@@ -597,42 +590,42 @@
       twidCoefModifier <<= 2U;
    }
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
 }
 
-/*
-* @brief  Core function for the floating-point CIFFT butterfly process.
-* @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.
-* @param[in]      fftLen           length of the FFT.
-* @param[in]      *pCoef           points to twiddle coefficient buffer.
-* @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-* @param[in]      onebyfftLen      value of 1/fftLen.
-* @return none.
-*/
+/**
+  brief         Core function for the floating-point CIFFT butterfly process.
+  param[in,out] pSrc             points to the in-place buffer of floating-point data type
+  param[in]     fftLen           length of the FFT
+  param[in]     pCoef            points to twiddle coefficient buffer
+  param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+  param[in]     onebyfftLen      value of 1/fftLen
+  return        none
+ */
 
 void arm_radix4_butterfly_inverse_f32(
-float32_t * pSrc,
-uint16_t fftLen,
-float32_t * pCoef,
-uint16_t twidCoefModifier,
-float32_t onebyfftLen)
+        float32_t * pSrc,
+        uint16_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier,
+        float32_t onebyfftLen)
 {
-   float32_t co1, co2, co3, si1, si2, si3;
-   uint32_t ia1, ia2, ia3;
-   uint32_t i0, i1, i2, i3;
-   uint32_t n1, n2, j, k;
+        float32_t co1, co2, co3, si1, si2, si3;
+        uint32_t ia1, ia2, ia3;
+        uint32_t i0, i1, i2, i3;
+        uint32_t n1, n2, j, k;
 
-#if defined (ARM_MATH_DSP)
+#if defined (ARM_MATH_LOOPUNROLL)
 
-   float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
-   float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
-   Ybminusd;
-   float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
-   float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
-   float32_t *ptr1;
-   float32_t p0,p1,p2,p3,p4,p5,p6,p7;
-   float32_t a0,a1,a2,a3,a4,a5,a6,a7;
+        float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
+        float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
+        Ybminusd;
+        float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
+        float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
+        float32_t *ptr1;
+        float32_t p0,p1,p2,p3,p4,p5,p6,p7;
+        float32_t a0,a1,a2,a3,a4,a5,a6,a7;
 
 
    /*  Initializations for the first stage */
@@ -1008,9 +1001,7 @@
 
 #else
 
-   float32_t t1, t2, r1, r2, s1, s2;
-
-   /* Run the below code for Cortex-M0 */
+        float32_t t1, t2, r1, r2, s1, s2;
 
    /*  Initializations for the first stage */
    n2 = fftLen;
@@ -1203,7 +1194,7 @@
       pSrc[(2U * i3) + 1U] = s2 * onebyfftLen;
    }
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 }
 
 
diff --git a/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c b/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c
index 14ea487..930c2c1 100644
--- a/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c
+++ b/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_cfft_radix4_init_f32.c
  * Description:  Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,36 +30,40 @@
 #include "arm_common_tables.h"
 
 /**
- * @ingroup groupTransforms
+  @ingroup groupTransforms
  */
 
 /**
- * @addtogroup ComplexFFT
- * @{
+  @addtogroup ComplexFFT
+  @{
  */
 
 /**
-* @brief  Initialization function for the floating-point CFFT/CIFFT.
-* @deprecated Do not use this function.  It has been superceded by \ref arm_cfft_f32 and will be removed
-* in the future.
-* @param[in,out] *S             points to an instance of the floating-point CFFT/CIFFT structure.
-* @param[in]     fftLen         length of the FFT.
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
-*
-* \par Description:
-* \par
-* The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
-* \par
-* The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-* \par
-* The parameter <code>fftLen</code>	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
-* \par
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
-*/
+  @brief         Initialization function for the floating-point CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superceded by \ref arm_cfft_f32 and will be removed in the future.
+  @param[in,out] S              points to an instance of the floating-point CFFT/CIFFT structure
+  @param[in]     fftLen         length of the FFT
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+  @par           Details
+                   The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
+  @par
+                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+ */
 
 arm_status arm_cfft_radix4_init_f32(
   arm_cfft_radix4_instance_f32 * S,
@@ -148,5 +152,5 @@
 }
 
 /**
- * @} end of ComplexFFT group
+  @} end of ComplexFFT group
  */
diff --git a/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c b/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c
index ed78236..0090688 100644
--- a/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c
+++ b/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_cfft_radix4_init_q15.c
  * Description:  Radix-4 Decimation in Frequency Q15 FFT & IFFT initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,37 +30,42 @@
 #include "arm_common_tables.h"
 
 /**
- * @ingroup groupTransforms
+  @ingroup groupTransforms
  */
 
 
 /**
- * @addtogroup ComplexFFT
- * @{
+  @addtogroup ComplexFFT
+  @{
  */
 
 
 /**
-* @brief Initialization function for the Q15 CFFT/CIFFT.
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q15 and will be removed
-* @param[in,out] *S             points to an instance of the Q15 CFFT/CIFFT structure.
-* @param[in]     fftLen         length of the FFT.
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
-*
-* \par Description:
-* \par
-* The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
-* \par
-* The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-* \par
-* The parameter <code>fftLen</code>	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
-* \par
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
-*/
+  @brief Initialization function for the Q15 CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed in the future.
+  @param[in,out] S              points to an instance of the Q15 CFFT/CIFFT structure
+  @param[in]     fftLen         length of the FFT
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+  @par           Details
+                   The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
+  @par
+                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+ */
 
 arm_status arm_cfft_radix4_init_q15(
   arm_cfft_radix4_instance_q15 * S,
@@ -136,5 +141,5 @@
 }
 
 /**
- * @} end of ComplexFFT group
+  @} end of ComplexFFT group
  */
diff --git a/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c b/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c
index 6f11763..17d16b7 100644
--- a/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c
+++ b/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_cfft_radix4_init_q31.c
  * Description:  Radix-4 Decimation in Frequency Q31 FFT & IFFT initialization function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,35 +30,40 @@
 #include "arm_common_tables.h"
 
 /**
- * @ingroup groupTransforms
+  @ingroup groupTransforms
  */
 
 /**
- * @addtogroup ComplexFFT
- * @{
+  @addtogroup ComplexFFT
+  @{
  */
 
 /**
-*
-* @brief  Initialization function for the Q31 CFFT/CIFFT.
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q31 and will be removed
-* @param[in,out] *S             points to an instance of the Q31 CFFT/CIFFT structure.
-* @param[in]     fftLen         length of the FFT.
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
-*
-* \par Description:
-* \par
-* The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
-* \par
-* The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-* \par
-* The parameter <code>fftLen</code>	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
-* \par
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+
+  @brief         Initialization function for the Q31 CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed in the future.
+  @param[in,out] S              points to an instance of the Q31 CFFT/CIFFT structure.
+  @param[in]     fftLen         length of the FFT.
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+  @par           Details
+                   The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
+  @par
+                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
 */
 
 arm_status arm_cfft_radix4_init_q31(
@@ -132,5 +137,5 @@
 }
 
 /**
- * @} end of ComplexFFT group
+  @} end of ComplexFFT group
  */
diff --git a/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c b/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c
index f3451f7..b4cabb1 100644
--- a/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c
+++ b/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c
@@ -4,13 +4,13 @@
  * Description:  This file has function definition of Radix-4 FFT & IFFT function and
  *               In-place bit reversal using bit reversal table
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -31,54 +31,52 @@
 
 
 void arm_radix4_butterfly_q15(
-  q15_t * pSrc16,
-  uint32_t fftLen,
-  q15_t * pCoef16,
-  uint32_t twidCoefModifier);
+        q15_t * pSrc16,
+        uint32_t fftLen,
+  const q15_t * pCoef16,
+        uint32_t twidCoefModifier);
 
 void arm_radix4_butterfly_inverse_q15(
-  q15_t * pSrc16,
-  uint32_t fftLen,
-  q15_t * pCoef16,
-  uint32_t twidCoefModifier);
+        q15_t * pSrc16,
+        uint32_t fftLen,
+  const q15_t * pCoef16,
+        uint32_t twidCoefModifier);
 
 void arm_bitreversal_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  uint16_t bitRevFactor,
-  uint16_t * pBitRevTab);
+        q15_t * pSrc,
+        uint32_t fftLen,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab);
 
 /**
- * @ingroup groupTransforms
+  @ingroup groupTransforms
  */
 
 /**
- * @addtogroup ComplexFFT
- * @{
+  @addtogroup ComplexFFT
+  @{
  */
 
 
 /**
- * @details
- * @brief Processing function for the Q15 CFFT/CIFFT.
- * @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q15 and will be removed
- * @param[in]      *S    points to an instance of the Q15 CFFT/CIFFT structure.
- * @param[in, out] *pSrc points to the complex data buffer. Processing occurs in-place.
- * @return none.
- *
- * \par Input and output formats:
- * \par
- * Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
- * Hence the output format is different for different FFT sizes.
- * The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:
- * \par
- * \image html CFFTQ15.gif "Input and Output Formats for Q15 CFFT"
- * \image html CIFFTQ15.gif "Input and Output Formats for Q15 CIFFT"
+  @brief               Processing function for the Q15 CFFT/CIFFT.
+  @deprecated          Do not use this function.  It has been superseded by \ref arm_cfft_q15 and will be removed in the future.
+  @param[in]     S     points to an instance of the Q15 CFFT/CIFFT structure.
+  @param[in,out] pSrc  points to the complex data buffer. Processing occurs in-place.
+  @return        none
+ 
+  @par Input and output formats:
+                 Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
+                 Hence the output format is different for different FFT sizes.
+                 The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:
+  @par
+                 \image html CFFTQ15.gif "Input and Output Formats for Q15 CFFT"
+                 \image html CIFFTQ15.gif "Input and Output Formats for Q15 CIFFT"
  */
 
 void arm_cfft_radix4_q15(
   const arm_cfft_radix4_instance_q15 * S,
-  q15_t * pSrc)
+        q15_t * pSrc)
 {
   if (S->ifftFlag == 1U)
   {
@@ -100,74 +98,72 @@
 }
 
 /**
- * @} end of ComplexFFT group
+  @} end of ComplexFFT group
  */
 
 /*
-* Radix-4 FFT algorithm used is :
-*
-* Input real and imaginary data:
-* x(n) = xa + j * ya
-* x(n+N/4 ) = xb + j * yb
-* x(n+N/2 ) = xc + j * yc
-* x(n+3N 4) = xd + j * yd
-*
-*
-* Output real and imaginary data:
-* x(4r) = xa'+ j * ya'
-* x(4r+1) = xb'+ j * yb'
-* x(4r+2) = xc'+ j * yc'
-* x(4r+3) = xd'+ j * yd'
-*
-*
-* Twiddle factors for radix-4 FFT:
-* Wn = co1 + j * (- si1)
-* W2n = co2 + j * (- si2)
-* W3n = co3 + j * (- si3)
-
-* The real and imaginary output values for the radix-4 butterfly are
-* xa' = xa + xb + xc + xd
-* ya' = ya + yb + yc + yd
-* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)
-* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)
-* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)
-* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)
-* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)
-* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)
-*
-*/
+ * Radix-4 FFT algorithm used is :
+ *
+ * Input real and imaginary data:
+ * x(n) = xa + j * ya
+ * x(n+N/4 ) = xb + j * yb
+ * x(n+N/2 ) = xc + j * yc
+ * x(n+3N 4) = xd + j * yd
+ *
+ *
+ * Output real and imaginary data:
+ * x(4r) = xa'+ j * ya'
+ * x(4r+1) = xb'+ j * yb'
+ * x(4r+2) = xc'+ j * yc'
+ * x(4r+3) = xd'+ j * yd'
+ *
+ *
+ * Twiddle factors for radix-4 FFT:
+ * Wn = co1 + j * (- si1)
+ * W2n = co2 + j * (- si2)
+ * W3n = co3 + j * (- si3)
+ 
+ * The real and imaginary output values for the radix-4 butterfly are
+ * xa' = xa + xb + xc + xd
+ * ya' = ya + yb + yc + yd
+ * xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)
+ * yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)
+ * xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)
+ * yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)
+ * xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)
+ * yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)
+ *
+ */
 
 /**
- * @brief  Core function for the Q15 CFFT butterfly process.
- * @param[in, out] *pSrc16          points to the in-place buffer of Q15 data type.
- * @param[in]      fftLen           length of the FFT.
- * @param[in]      *pCoef16         points to twiddle coefficient buffer.
- * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @return none.
+  @brief         Core function for the Q15 CFFT butterfly process.
+  @param[in,out] pSrc16          points to the in-place buffer of Q15 data type
+  @param[in]     fftLen           length of the FFT
+  @param[in]     pCoef16         points to twiddle coefficient buffer
+  @param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  @return        none
  */
 
 void arm_radix4_butterfly_q15(
-  q15_t * pSrc16,
-  uint32_t fftLen,
-  q15_t * pCoef16,
-  uint32_t twidCoefModifier)
+        q15_t * pSrc16,
+        uint32_t fftLen,
+  const q15_t * pCoef16,
+        uint32_t twidCoefModifier)
 {
 
 #if defined (ARM_MATH_DSP)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+        q31_t R, S, T, U;
+        q31_t C1, C2, C3, out1, out2;
+        uint32_t n1, n2, ic, i0, j, k;
 
-  q31_t R, S, T, U;
-  q31_t C1, C2, C3, out1, out2;
-  uint32_t n1, n2, ic, i0, j, k;
+        q15_t *ptr1;
+        q15_t *pSi0;
+        q15_t *pSi1;
+        q15_t *pSi2;
+        q15_t *pSi3;
 
-  q15_t *ptr1;
-  q15_t *pSi0;
-  q15_t *pSi1;
-  q15_t *pSi2;
-  q15_t *pSi3;
-
-  q31_t xaya, xbyb, xcyc, xdyd;
+        q31_t xaya, xbyb, xcyc, xdyd;
 
   /* Total process is divided into three stages */
 
@@ -198,16 +194,18 @@
   {
     /*  Butterfly implementation */
 
-    /*  Reading i0, i0+fftLen/2 inputs */
+    /* Reading i0, i0+fftLen/2 inputs */
     /* Read ya (real), xa(imag) input */
-    T = _SIMD32_OFFSET(pSi0);
-    T = __SHADD16(T, 0); // this is just a SIMD arithmetic shift right by 1
-    T = __SHADD16(T, 0); // it turns out doing this twice is 2 cycles, the alternative takes 3 cycles
-    //in = ((int16_t) (T & 0xFFFF)) >> 2;       // alternative code that takes 3 cycles
-    //T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
+    T = read_q15x2 (pSi0);
+    T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */
+    T = __SHADD16(T, 0); /* it turns out doing this twice is 2 cycles, the alternative takes 3 cycles */
+/*
+    in = ((int16_t) (T & 0xFFFF)) >> 2;       // alternative code that takes 3 cycles
+     T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
+*/
 
     /* Read yc (real), xc(imag) input */
-    S = _SIMD32_OFFSET(pSi2);
+    S = read_q15x2 (pSi2);
     S = __SHADD16(S, 0);
     S = __SHADD16(S, 0);
 
@@ -219,12 +217,12 @@
 
     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
     /* Read yb (real), xb(imag) input */
-    T = _SIMD32_OFFSET(pSi1);
+    T = read_q15x2 (pSi1);
     T = __SHADD16(T, 0);
     T = __SHADD16(T, 0);
 
     /* Read yd (real), xd(imag) input */
-    U = _SIMD32_OFFSET(pSi3);
+    U = read_q15x2 (pSi3);
     U = __SHADD16(U, 0);
     U = __SHADD16(U, 0);
 
@@ -234,46 +232,39 @@
     /*  writing the butterfly processed i0 sample */
     /* xa' = xa + xb + xc + xd */
     /* ya' = ya + yb + yc + yd */
-    _SIMD32_OFFSET(pSi0) = __SHADD16(R, T);
-    pSi0 += 2;
+    write_q15x2_ia (&pSi0, __SHADD16(R, T));
 
     /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */
     R = __QSUB16(R, T);
 
     /* co2 & si2 are read from SIMD Coefficient pointer */
-    C2 = _SIMD32_OFFSET(pCoef16 + (4U * ic));
+    C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic));
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
     out1 = __SMUAD(C2, R) >> 16U;
     /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
     out2 = __SMUSDX(C2, R);
-
 #else
-
     /* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
     out1 = __SMUSDX(R, C2) >> 16U;
     /* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
     out2 = __SMUAD(C2, R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     /*  Reading i0+fftLen/4 */
     /* T = packed(yb, xb) */
-    T = _SIMD32_OFFSET(pSi1);
+    T = read_q15x2 (pSi1);
     T = __SHADD16(T, 0);
     T = __SHADD16(T, 0);
 
     /* writing the butterfly processed i0 + fftLen/4 sample */
     /* writing output(xc', yc') in little endian format */
-    _SIMD32_OFFSET(pSi1) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-    pSi1 += 2;
+    write_q15x2_ia (&pSi1, (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
 
     /*  Butterfly calculations */
     /* U = packed(yd, xd) */
-    U = _SIMD32_OFFSET(pSi3);
+    U = read_q15x2 (pSi3);
     U = __SHADD16(U, 0);
     U = __SHADD16(U, 0);
 
@@ -281,71 +272,54 @@
     T = __QSUB16(T, U);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
     R = __QASX(S, T);
     /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
     S = __QSAX(S, T);
-
 #else
-
     /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
     R = __QSAX(S, T);
     /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
     S = __QASX(S, T);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     /* co1 & si1 are read from SIMD Coefficient pointer */
-    C1 = _SIMD32_OFFSET(pCoef16 + (2U * ic));
+    C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic));
     /*  Butterfly process for the i0+fftLen/2 sample */
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
     out1 = __SMUAD(C1, S) >> 16U;
     /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
     out2 = __SMUSDX(C1, S);
-
 #else
-
     /* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
     out1 = __SMUSDX(S, C1) >> 16U;
     /* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
     out2 = __SMUAD(C1, S);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     /* writing output(xb', yb') in little endian format */
-    _SIMD32_OFFSET(pSi2) =
-      ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF);
-    pSi2 += 2;
-
+    write_q15x2_ia (&pSi2, ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF));
 
     /* co3 & si3 are read from SIMD Coefficient pointer */
-    C3 = _SIMD32_OFFSET(pCoef16 + (6U * ic));
+    C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic));
     /*  Butterfly process for the i0+3fftLen/4 sample */
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
     out1 = __SMUAD(C3, R) >> 16U;
     /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
     out2 = __SMUSDX(C3, R);
-
 #else
-
     /* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
     out1 = __SMUSDX(R, C3) >> 16U;
     /* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
     out2 = __SMUAD(C3, R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     /* writing output(xd', yd') in little endian format */
-    _SIMD32_OFFSET(pSi3) =
-      ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-    pSi3 += 2;
+    write_q15x2_ia (&pSi3, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
 
     /*  Twiddle coefficients index modifier */
     ic = ic + twidCoefModifier;
@@ -372,9 +346,9 @@
     for (j = 0U; j <= (n2 - 1U); j++)
     {
       /*  index calculation for the coefficients */
-      C1 = _SIMD32_OFFSET(pCoef16 + (2U * ic));
-      C2 = _SIMD32_OFFSET(pCoef16 + (4U * ic));
-      C3 = _SIMD32_OFFSET(pCoef16 + (6U * ic));
+      C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic));
+      C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic));
+      C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic));
 
       /*  Twiddle coefficients index modifier */
       ic = ic + twidCoefModifier;
@@ -389,10 +363,10 @@
       {
         /*  Reading i0, i0+fftLen/2 inputs */
         /* Read ya (real), xa(imag) input */
-        T = _SIMD32_OFFSET(pSi0);
+        T = read_q15x2 (pSi0);
 
         /* Read yc (real), xc(imag) input */
-        S = _SIMD32_OFFSET(pSi2);
+        S = read_q15x2 (pSi2);
 
         /* R = packed( (ya + yc), (xa + xc)) */
         R = __QADD16(T, S);
@@ -402,10 +376,10 @@
 
         /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
         /* Read yb (real), xb(imag) input */
-        T = _SIMD32_OFFSET(pSi1);
+        T = read_q15x2 (pSi1);
 
         /* Read yd (real), xd(imag) input */
-        U = _SIMD32_OFFSET(pSi3);
+        U = read_q15x2 (pSi3);
 
         /* T = packed( (yb + yd), (xb + xd)) */
         T = __QADD16(T, U);
@@ -416,51 +390,45 @@
         /* ya' = ya + yb + yc + yd */
         out1 = __SHADD16(R, T);
         out1 = __SHADD16(out1, 0);
-        _SIMD32_OFFSET(pSi0) = out1;
+        write_q15x2 (pSi0, out1);
         pSi0 += 2 * n1;
 
         /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */
         R = __SHSUB16(R, T);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
         /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
         out1 = __SMUAD(C2, R) >> 16U;
 
         /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
         out2 = __SMUSDX(C2, R);
-
 #else
-
         /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
         out1 = __SMUSDX(R, C2) >> 16U;
 
         /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
         out2 = __SMUAD(C2, R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
         /*  Reading i0+3fftLen/4 */
         /* Read yb (real), xb(imag) input */
-        T = _SIMD32_OFFSET(pSi1);
+        T = read_q15x2 (pSi1);
 
         /*  writing the butterfly processed i0 + fftLen/4 sample */
         /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
         /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        _SIMD32_OFFSET(pSi1) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+        write_q15x2 (pSi1, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
         pSi1 += 2 * n1;
 
         /*  Butterfly calculations */
 
         /* Read yd (real), xd(imag) input */
-        U = _SIMD32_OFFSET(pSi3);
+        U = read_q15x2 (pSi3);
 
         /* T = packed(yb-yd, xb-xd) */
         T = __QSUB16(T, U);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
         /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
         R = __SHASX(S, T);
 
@@ -471,9 +439,7 @@
         /*  Butterfly process for the i0+fftLen/2 sample */
         out1 = __SMUAD(C1, S) >> 16U;
         out2 = __SMUSDX(C1, S);
-
 #else
-
         /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
         R = __SHSAX(S, T);
 
@@ -484,33 +450,26 @@
         /*  Butterfly process for the i0+fftLen/2 sample */
         out1 = __SMUSDX(S, C1) >> 16U;
         out2 = __SMUAD(C1, S);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
         /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
         /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-        _SIMD32_OFFSET(pSi2) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+        write_q15x2 (pSi2, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
         pSi2 += 2 * n1;
 
         /*  Butterfly process for the i0+3fftLen/4 sample */
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
         out1 = __SMUAD(C3, R) >> 16U;
         out2 = __SMUSDX(C3, R);
-
 #else
-
         out1 = __SMUSDX(R, C3) >> 16U;
         out2 = __SMUAD(C3, R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
         /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
         /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-        _SIMD32_OFFSET(pSi3) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+        write_q15x2 (pSi3, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
         pSi3 += 2 * n1;
       }
     }
@@ -536,16 +495,16 @@
   do
   {
     /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD32(ptr1)++;
+    xaya = read_q15x2_ia ((q15_t **) &ptr1);
 
     /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD32(ptr1)++;
+    xbyb = read_q15x2_ia ((q15_t **) &ptr1);
 
     /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD32(ptr1)++;
+    xcyc = read_q15x2_ia ((q15_t **) &ptr1);
 
     /* Read xd (real), yd(imag) input */
-    xdyd = *__SIMD32(ptr1)++;
+    xdyd = read_q15x2_ia ((q15_t **) &ptr1);
 
     /* R = packed((ya + yc), (xa + xc)) */
     R = __QADD16(xaya, xcyc);
@@ -559,14 +518,14 @@
 
     /* xa' = xa + xb + xc + xd */
     /* ya' = ya + yb + yc + yd */
-    *__SIMD32(ptr1)++ = __SHADD16(R, T);
+    write_q15x2_ia (&ptr1, __SHADD16(R, T));
 
     /* T = packed((yb + yd), (xb + xd)) */
     T = __QADD16(xbyb, xdyd);
 
     /* xc' = (xa-xb+xc-xd) */
     /* yc' = (ya-yb+yc-yd) */
-    *__SIMD32(ptr1)++ = __SHSUB16(R, T);
+    write_q15x2_ia (&ptr1, __SHSUB16(R, T));
 
     /* S = packed((ya - yc), (xa - xc)) */
     S = __QSUB16(xaya, xcyc);
@@ -576,28 +535,22 @@
     U = __QSUB16(xbyb, xdyd);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     /* xb' = (xa+yb-xc-yd) */
     /* yb' = (ya-xb-yc+xd) */
-    *__SIMD32(ptr1)++ = __SHSAX(S, U);
-
+    write_q15x2_ia (&ptr1, __SHSAX(S, U));
 
     /* xd' = (xa-yb-xc+yd) */
     /* yd' = (ya+xb-yc-xd) */
-    *__SIMD32(ptr1)++ = __SHASX(S, U);
-
+    write_q15x2_ia (&ptr1, __SHASX(S, U));
 #else
-
     /* xb' = (xa+yb-xc-yd) */
     /* yb' = (ya-xb-yc+xd) */
-    *__SIMD32(ptr1)++ = __SHASX(S, U);
-
+    write_q15x2_ia (&ptr1, __SHASX(S, U));
 
     /* xd' = (xa-yb-xc+yd) */
     /* yd' = (ya+xb-yc-xd) */
-    *__SIMD32(ptr1)++ = __SHSAX(S, U);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+    write_q15x2_ia (&ptr1, __SHSAX(S, U));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
   } while (--j);
 
@@ -609,13 +562,11 @@
   /* output is in 5.11(q11) format for the 16 point  */
 
 
-#else
+#else /* #if defined (ARM_MATH_DSP) */
 
-  /* Run the below code for Cortex-M0 */
-
-  q15_t R0, R1, S0, S1, T0, T1, U0, U1;
-  q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
-  uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
+        q15_t R0, R1, S0, S1, T0, T1, U0, U1;
+        q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
+        uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
 
   /* Total process is divided into three stages */
 
@@ -1015,76 +966,74 @@
 
 
 /**
- * @brief  Core function for the Q15 CIFFT butterfly process.
- * @param[in, out] *pSrc16          points to the in-place buffer of Q15 data type.
- * @param[in]      fftLen           length of the FFT.
- * @param[in]      *pCoef16         points to twiddle coefficient buffer.
- * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @return none.
+  @brief         Core function for the Q15 CIFFT butterfly process.
+  @param[in,out] pSrc16           points to the in-place buffer of Q15 data type
+  @param[in]     fftLen           length of the FFT
+  @param[in]     pCoef16          points to twiddle coefficient buffer
+  @param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+  @return        none
  */
 
 /*
-* Radix-4 IFFT algorithm used is :
-*
-* CIFFT uses same twiddle coefficients as CFFT function
-*  x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]
-*
-*
-* IFFT is implemented with following changes in equations from FFT
-*
-* Input real and imaginary data:
-* x(n) = xa + j * ya
-* x(n+N/4 ) = xb + j * yb
-* x(n+N/2 ) = xc + j * yc
-* x(n+3N 4) = xd + j * yd
-*
-*
-* Output real and imaginary data:
-* x(4r) = xa'+ j * ya'
-* x(4r+1) = xb'+ j * yb'
-* x(4r+2) = xc'+ j * yc'
-* x(4r+3) = xd'+ j * yd'
-*
-*
-* Twiddle factors for radix-4 IFFT:
-* Wn = co1 + j * (si1)
-* W2n = co2 + j * (si2)
-* W3n = co3 + j * (si3)
-
-* The real and imaginary output values for the radix-4 butterfly are
-* xa' = xa + xb + xc + xd
-* ya' = ya + yb + yc + yd
-* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)
-* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)
-* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)
-* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)
-* xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)
-* yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)
-*
-*/
+ * Radix-4 IFFT algorithm used is :
+ *
+ * CIFFT uses same twiddle coefficients as CFFT function
+ *  x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]
+ *
+ *
+ * IFFT is implemented with following changes in equations from FFT
+ *
+ * Input real and imaginary data:
+ * x(n) = xa + j * ya
+ * x(n+N/4 ) = xb + j * yb
+ * x(n+N/2 ) = xc + j * yc
+ * x(n+3N 4) = xd + j * yd
+ *
+ *
+ * Output real and imaginary data:
+ * x(4r) = xa'+ j * ya'
+ * x(4r+1) = xb'+ j * yb'
+ * x(4r+2) = xc'+ j * yc'
+ * x(4r+3) = xd'+ j * yd'
+ *
+ *
+ * Twiddle factors for radix-4 IFFT:
+ * Wn = co1 + j * (si1)
+ * W2n = co2 + j * (si2)
+ * W3n = co3 + j * (si3)
+ 
+ * The real and imaginary output values for the radix-4 butterfly are
+ * xa' = xa + xb + xc + xd
+ * ya' = ya + yb + yc + yd
+ * xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)
+ * yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)
+ * xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)
+ * yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)
+ * xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)
+ * yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)
+ *
+ */
 
 void arm_radix4_butterfly_inverse_q15(
-  q15_t * pSrc16,
-  uint32_t fftLen,
-  q15_t * pCoef16,
-  uint32_t twidCoefModifier)
+        q15_t * pSrc16,
+        uint32_t fftLen,
+  const q15_t * pCoef16,
+        uint32_t twidCoefModifier)
 {
 
 #if defined (ARM_MATH_DSP)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t R, S, T, U;
-  q31_t C1, C2, C3, out1, out2;
-  uint32_t n1, n2, ic, i0, j, k;
-
-  q15_t *ptr1;
-  q15_t *pSi0;
-  q15_t *pSi1;
-  q15_t *pSi2;
-  q15_t *pSi3;
-
-  q31_t xaya, xbyb, xcyc, xdyd;
+        q31_t R, S, T, U;
+        q31_t C1, C2, C3, out1, out2;
+        uint32_t n1, n2, ic, i0, j, k;
+        
+        q15_t *ptr1;
+        q15_t *pSi0;
+        q15_t *pSi1;
+        q15_t *pSi2;
+        q15_t *pSi3;
+        
+        q31_t xaya, xbyb, xcyc, xdyd;
 
   /* Total process is divided into three stages */
 
@@ -1117,12 +1066,12 @@
 
     /*  Reading i0, i0+fftLen/2 inputs */
     /* Read ya (real), xa(imag) input */
-    T = _SIMD32_OFFSET(pSi0);
+    T = read_q15x2 (pSi0);
     T = __SHADD16(T, 0);
     T = __SHADD16(T, 0);
 
     /* Read yc (real), xc(imag) input */
-    S = _SIMD32_OFFSET(pSi2);
+    S = read_q15x2 (pSi2);
     S = __SHADD16(S, 0);
     S = __SHADD16(S, 0);
 
@@ -1134,12 +1083,12 @@
 
     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
     /* Read yb (real), xb(imag) input */
-    T = _SIMD32_OFFSET(pSi1);
+    T = read_q15x2 (pSi1);
     T = __SHADD16(T, 0);
     T = __SHADD16(T, 0);
 
     /* Read yd (real), xd(imag) input */
-    U = _SIMD32_OFFSET(pSi3);
+    U = read_q15x2 (pSi3);
     U = __SHADD16(U, 0);
     U = __SHADD16(U, 0);
 
@@ -1149,46 +1098,39 @@
     /*  writing the butterfly processed i0 sample */
     /* xa' = xa + xb + xc + xd */
     /* ya' = ya + yb + yc + yd */
-    _SIMD32_OFFSET(pSi0) = __SHADD16(R, T);
-    pSi0 += 2;
+    write_q15x2_ia (&pSi0, __SHADD16(R, T));
 
     /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */
     R = __QSUB16(R, T);
 
     /* co2 & si2 are read from SIMD Coefficient pointer */
-    C2 = _SIMD32_OFFSET(pCoef16 + (4U * ic));
+    C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic));
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
     out1 = __SMUSD(C2, R) >> 16U;
     /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
     out2 = __SMUADX(C2, R);
-
 #else
-
     /* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
     out1 = __SMUADX(C2, R) >> 16U;
     /* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
     out2 = __SMUSD(__QSUB16(0, C2), R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     /*  Reading i0+fftLen/4 */
     /* T = packed(yb, xb) */
-    T = _SIMD32_OFFSET(pSi1);
+    T = read_q15x2 (pSi1);
     T = __SHADD16(T, 0);
     T = __SHADD16(T, 0);
 
     /* writing the butterfly processed i0 + fftLen/4 sample */
     /* writing output(xc', yc') in little endian format */
-    _SIMD32_OFFSET(pSi1) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-    pSi1 += 2;
+    write_q15x2_ia (&pSi1, (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
 
     /*  Butterfly calculations */
     /* U = packed(yd, xd) */
-    U = _SIMD32_OFFSET(pSi3);
+    U = read_q15x2 (pSi3);
     U = __SHADD16(U, 0);
     U = __SHADD16(U, 0);
 
@@ -1196,71 +1138,54 @@
     T = __QSUB16(T, U);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
     R = __QSAX(S, T);
     /* S = packed((ya-yc) + (xb- xd),  (xa-xc) - (yb-yd)) */
     S = __QASX(S, T);
-
 #else
-
     /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
     R = __QASX(S, T);
     /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
     S = __QSAX(S, T);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     /* co1 & si1 are read from SIMD Coefficient pointer */
-    C1 = _SIMD32_OFFSET(pCoef16 + (2U * ic));
+    C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic));
     /*  Butterfly process for the i0+fftLen/2 sample */
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
     out1 = __SMUSD(C1, S) >> 16U;
     /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
     out2 = __SMUADX(C1, S);
-
 #else
-
     /* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
     out1 = __SMUADX(C1, S) >> 16U;
     /* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
     out2 = __SMUSD(__QSUB16(0, C1), S);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     /* writing output(xb', yb') in little endian format */
-    _SIMD32_OFFSET(pSi2) =
-      ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF);
-    pSi2 += 2;
-
+    write_q15x2_ia (&pSi2, ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF));
 
     /* co3 & si3 are read from SIMD Coefficient pointer */
-    C3 = _SIMD32_OFFSET(pCoef16 + (6U * ic));
+    C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic));
     /*  Butterfly process for the i0+3fftLen/4 sample */
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
     out1 = __SMUSD(C3, R) >> 16U;
     /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
     out2 = __SMUADX(C3, R);
-
 #else
-
     /* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
     out1 = __SMUADX(C3, R) >> 16U;
     /* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
     out2 = __SMUSD(__QSUB16(0, C3), R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     /* writing output(xd', yd') in little endian format */
-    _SIMD32_OFFSET(pSi3) =
-      ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-    pSi3 += 2;
+    write_q15x2_ia (&pSi3, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
 
     /*  Twiddle coefficients index modifier */
     ic = ic + twidCoefModifier;
@@ -1287,9 +1212,9 @@
     for (j = 0U; j <= (n2 - 1U); j++)
     {
       /*  index calculation for the coefficients */
-      C1 = _SIMD32_OFFSET(pCoef16 + (2U * ic));
-      C2 = _SIMD32_OFFSET(pCoef16 + (4U * ic));
-      C3 = _SIMD32_OFFSET(pCoef16 + (6U * ic));
+      C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic));
+      C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic));
+      C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic));
 
       /*  Twiddle coefficients index modifier */
       ic = ic + twidCoefModifier;
@@ -1304,10 +1229,10 @@
       {
         /*  Reading i0, i0+fftLen/2 inputs */
         /* Read ya (real), xa(imag) input */
-        T = _SIMD32_OFFSET(pSi0);
+        T = read_q15x2 (pSi0);
 
         /* Read yc (real), xc(imag) input */
-        S = _SIMD32_OFFSET(pSi2);
+        S = read_q15x2 (pSi2);
 
         /* R = packed( (ya + yc), (xa + xc)) */
         R = __QADD16(T, S);
@@ -1317,10 +1242,10 @@
 
         /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
         /* Read yb (real), xb(imag) input */
-        T = _SIMD32_OFFSET(pSi1);
+        T = read_q15x2 (pSi1);
 
         /* Read yd (real), xd(imag) input */
-        U = _SIMD32_OFFSET(pSi3);
+        U = read_q15x2 (pSi3);
 
         /* T = packed( (yb + yd), (xb + xd)) */
         T = __QADD16(T, U);
@@ -1331,101 +1256,84 @@
         /* ya' = ya + yb + yc + yd */
         out1 = __SHADD16(R, T);
         out1 = __SHADD16(out1, 0);
-        _SIMD32_OFFSET(pSi0) = out1;
+        write_q15x2 (pSi0, out1);
         pSi0 += 2 * n1;
 
         /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */
         R = __SHSUB16(R, T);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
         /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
         out1 = __SMUSD(C2, R) >> 16U;
 
         /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
         out2 = __SMUADX(C2, R);
-
 #else
-
         /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
         out1 = __SMUADX(R, C2) >> 16U;
 
         /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
         out2 = __SMUSD(__QSUB16(0, C2), R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
         /*  Reading i0+3fftLen/4 */
         /* Read yb (real), xb(imag) input */
-        T = _SIMD32_OFFSET(pSi1);
+        T = read_q15x2 (pSi1);
 
         /*  writing the butterfly processed i0 + fftLen/4 sample */
         /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
         /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        _SIMD32_OFFSET(pSi1) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+        write_q15x2 (pSi1, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
         pSi1 += 2 * n1;
 
         /*  Butterfly calculations */
 
         /* Read yd (real), xd(imag) input */
-        U = _SIMD32_OFFSET(pSi3);
+        U = read_q15x2 (pSi3);
 
         /* T = packed(yb-yd, xb-xd) */
         T = __QSUB16(T, U);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
         /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
         R = __SHSAX(S, T);
 
         /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
         S = __SHASX(S, T);
 
-
         /*  Butterfly process for the i0+fftLen/2 sample */
         out1 = __SMUSD(C1, S) >> 16U;
         out2 = __SMUADX(C1, S);
-
 #else
-
         /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
         R = __SHASX(S, T);
 
         /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
         S = __SHSAX(S, T);
 
-
         /*  Butterfly process for the i0+fftLen/2 sample */
         out1 = __SMUADX(S, C1) >> 16U;
         out2 = __SMUSD(__QSUB16(0, C1), S);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
         /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
         /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-        _SIMD32_OFFSET(pSi2) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+        write_q15x2 (pSi2, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
         pSi2 += 2 * n1;
 
         /*  Butterfly process for the i0+3fftLen/4 sample */
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
         out1 = __SMUSD(C3, R) >> 16U;
         out2 = __SMUADX(C3, R);
-
 #else
-
         out1 = __SMUADX(C3, R) >> 16U;
         out2 = __SMUSD(__QSUB16(0, C3), R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
         /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
         /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-        _SIMD32_OFFSET(pSi3) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+        write_q15x2 (pSi3, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
         pSi3 += 2 * n1;
       }
     }
@@ -1450,16 +1358,16 @@
   do
   {
     /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD32(ptr1)++;
+    xaya = read_q15x2_ia ((q15_t **) &ptr1);
 
     /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD32(ptr1)++;
+    xbyb = read_q15x2_ia ((q15_t **) &ptr1);
 
     /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD32(ptr1)++;
+    xcyc = read_q15x2_ia ((q15_t **) &ptr1);
 
     /* Read xd (real), yd(imag) input */
-    xdyd = *__SIMD32(ptr1)++;
+    xdyd = read_q15x2_ia ((q15_t **) &ptr1);
 
     /* R = packed((ya + yc), (xa + xc)) */
     R = __QADD16(xaya, xcyc);
@@ -1473,14 +1381,14 @@
 
     /* xa' = xa + xb + xc + xd */
     /* ya' = ya + yb + yc + yd */
-    *__SIMD32(ptr1)++ = __SHADD16(R, T);
+    write_q15x2_ia (&ptr1, __SHADD16(R, T));
 
     /* T = packed((yb + yd), (xb + xd)) */
     T = __QADD16(xbyb, xdyd);
 
     /* xc' = (xa-xb+xc-xd) */
     /* yc' = (ya-yb+yc-yd) */
-    *__SIMD32(ptr1)++ = __SHSUB16(R, T);
+    write_q15x2_ia (&ptr1, __SHSUB16(R, T));
 
     /* S = packed((ya - yc), (xa - xc)) */
     S = __QSUB16(xaya, xcyc);
@@ -1490,29 +1398,22 @@
     U = __QSUB16(xbyb, xdyd);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     /* xb' = (xa+yb-xc-yd) */
     /* yb' = (ya-xb-yc+xd) */
-    *__SIMD32(ptr1)++ = __SHASX(S, U);
-
+    write_q15x2_ia (&ptr1, __SHASX(S, U));
 
     /* xd' = (xa-yb-xc+yd) */
     /* yd' = (ya+xb-yc-xd) */
-    *__SIMD32(ptr1)++ = __SHSAX(S, U);
-
+    write_q15x2_ia (&ptr1, __SHSAX(S, U));
 #else
-
     /* xb' = (xa+yb-xc-yd) */
     /* yb' = (ya-xb-yc+xd) */
-    *__SIMD32(ptr1)++ = __SHSAX(S, U);
-
+    write_q15x2_ia (&ptr1, __SHSAX(S, U));
 
     /* xd' = (xa-yb-xc+yd) */
     /* yd' = (ya+xb-yc-xd) */
-    *__SIMD32(ptr1)++ = __SHASX(S, U);
-
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+    write_q15x2_ia (&ptr1, __SHASX(S, U));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
   } while (--j);
 
@@ -1524,13 +1425,11 @@
   /* output is in 5.11(q11) format for the 16 point  */
 
 
-#else
+#else /* arm_radix4_butterfly_inverse_q15 */
 
-  /* Run the below code for Cortex-M0 */
-
-  q15_t R0, R1, S0, S1, T0, T1, U0, U1;
-  q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
-  uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
+        q15_t R0, R1, S0, S1, T0, T1, U0, U1;
+        q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
+        uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
 
   /* Total process is divided into three stages */
 
diff --git a/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c b/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c
index 95292e4..a9a59dd 100644
--- a/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c
+++ b/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c
@@ -4,13 +4,13 @@
  * Description:  This file has function definition of Radix-4 FFT & IFFT function and
  *               In-place bit reversal using bit reversal table
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,54 +30,51 @@
 #include "arm_math.h"
 
 void arm_radix4_butterfly_inverse_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-q31_t * pCoef,
-uint32_t twidCoefModifier);
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint32_t twidCoefModifier);
 
 void arm_radix4_butterfly_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-q31_t * pCoef,
-uint32_t twidCoefModifier);
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint32_t twidCoefModifier);
 
 void arm_bitreversal_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-uint16_t bitRevFactor,
-uint16_t * pBitRevTab);
+        q31_t * pSrc,
+        uint32_t fftLen,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab);
 
 /**
- * @ingroup groupTransforms
+  @ingroup groupTransforms
  */
 
 /**
- * @addtogroup ComplexFFT
- * @{
+  @addtogroup ComplexFFT
+  @{
  */
 
 /**
- * @details
- * @brief Processing function for the Q31 CFFT/CIFFT.
- * @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q31 and will be removed
- * @param[in]      *S    points to an instance of the Q31 CFFT/CIFFT structure.
- * @param[in, out] *pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place.
- * @return none.
- *
- * \par Input and output formats:
- * \par
- * Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
- * Hence the output format is different for different FFT sizes.
- * The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:
- * \par
- * \image html CFFTQ31.gif "Input and Output Formats for Q31 CFFT"
- * \image html CIFFTQ31.gif "Input and Output Formats for Q31 CIFFT"
- *
+  @brief         Processing function for the Q31 CFFT/CIFFT.
+  @deprecated    Do not use this function.  It has been superseded by \ref arm_cfft_q31 and will be removed in the future.
+  @param[in]     S    points to an instance of the Q31 CFFT/CIFFT structure
+  @param[in,out] pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @return        none
+ 
+  @par Input and output formats:
+                 Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
+                 Hence the output format is different for different FFT sizes.
+                 The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:
+  @par
+                 \image html CFFTQ31.gif "Input and Output Formats for Q31 CFFT"
+                 \image html CIFFTQ31.gif "Input and Output Formats for Q31 CIFFT"
  */
 
 void arm_cfft_radix4_q31(
   const arm_cfft_radix4_instance_q31 * S,
-  q31_t * pSrc)
+        q31_t * pSrc)
 {
   if (S->ifftFlag == 1U)
   {
@@ -99,69 +96,68 @@
 }
 
 /**
- * @} end of ComplexFFT group
+  @} end of ComplexFFT group
  */
 
 /*
-* Radix-4 FFT algorithm used is :
-*
-* Input real and imaginary data:
-* x(n) = xa + j * ya
-* x(n+N/4 ) = xb + j * yb
-* x(n+N/2 ) = xc + j * yc
-* x(n+3N 4) = xd + j * yd
-*
-*
-* Output real and imaginary data:
-* x(4r) = xa'+ j * ya'
-* x(4r+1) = xb'+ j * yb'
-* x(4r+2) = xc'+ j * yc'
-* x(4r+3) = xd'+ j * yd'
-*
-*
-* Twiddle factors for radix-4 FFT:
-* Wn = co1 + j * (- si1)
-* W2n = co2 + j * (- si2)
-* W3n = co3 + j * (- si3)
-*
-*  Butterfly implementation:
-* xa' = xa + xb + xc + xd
-* ya' = ya + yb + yc + yd
-* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)
-* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)
-* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)
-* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)
-* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)
-* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)
-*
-*/
+ * Radix-4 FFT algorithm used is :
+ *
+ * Input real and imaginary data:
+ * x(n) = xa + j * ya
+ * x(n+N/4 ) = xb + j * yb
+ * x(n+N/2 ) = xc + j * yc
+ * x(n+3N 4) = xd + j * yd
+ *
+ *
+ * Output real and imaginary data:
+ * x(4r) = xa'+ j * ya'
+ * x(4r+1) = xb'+ j * yb'
+ * x(4r+2) = xc'+ j * yc'
+ * x(4r+3) = xd'+ j * yd'
+ *
+ *
+ * Twiddle factors for radix-4 FFT:
+ * Wn = co1 + j * (- si1)
+ * W2n = co2 + j * (- si2)
+ * W3n = co3 + j * (- si3)
+ *
+ *  Butterfly implementation:
+ * xa' = xa + xb + xc + xd
+ * ya' = ya + yb + yc + yd
+ * xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)
+ * yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)
+ * xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)
+ * yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)
+ * xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)
+ * yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)
+ *
+ */
 
 /**
- * @brief  Core function for the Q31 CFFT butterfly process.
- * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type.
- * @param[in]      fftLen           length of the FFT.
- * @param[in]      *pCoef           points to twiddle coefficient buffer.
- * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @return none.
+  @brief         Core function for the Q31 CFFT butterfly process.
+  @param[in,out] pSrc             points to the in-place buffer of Q31 data type.
+  @param[in]     fftLen           length of the FFT.
+  @param[in]     pCoef            points to twiddle coefficient buffer.
+  @param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+  @return        none
  */
 
 void arm_radix4_butterfly_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pCoef,
-  uint32_t twidCoefModifier)
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint32_t twidCoefModifier)
 {
-#if defined(ARM_MATH_CM7)
-  uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
-  q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
+        uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
+        q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
+        
+        q31_t xa, xb, xc, xd;
+        q31_t ya, yb, yc, yd;
+        q31_t xa_out, xb_out, xc_out, xd_out;
+        q31_t ya_out, yb_out, yc_out, yd_out;
+        
+        q31_t *ptr1;
 
-  q31_t xa, xb, xc, xd;
-  q31_t ya, yb, yc, yd;
-  q31_t xa_out, xb_out, xc_out, xd_out;
-  q31_t ya_out, yb_out, yc_out, yd_out;
-
-  q31_t *ptr1;
-  q63_t xaya, xbyb, xcyc, xdyd;
   /* Total process is divided into three stages */
 
   /* process first stage, middle stages, & last stage */
@@ -194,10 +190,10 @@
     /* xa + xc */
     r1 = (pSrc[(2U * i0)] >> 4U) + (pSrc[(2U * i2)] >> 4U);
     /* xa - xc */
-    r2 = (pSrc[2U * i0] >> 4U) - (pSrc[2U * i2] >> 4U);
+    r2 = (pSrc[(2U * i0)] >> 4U) - (pSrc[(2U * i2)] >> 4U);
 
     /* xb + xd */
-    t1 = (pSrc[2U * i1] >> 4U) + (pSrc[2U * i3] >> 4U);
+    t1 = (pSrc[(2U * i1)] >> 4U) + (pSrc[(2U * i3)] >> 4U);
 
     /* ya + yc */
     s1 = (pSrc[(2U * i0) + 1U] >> 4U) + (pSrc[(2U * i2) + 1U] >> 4U);
@@ -220,11 +216,11 @@
     /* yb - yd */
     t1 = (pSrc[(2U * i1) + 1U] >> 4U) - (pSrc[(2U * i3) + 1U] >> 4U);
     /* xb - xd */
-    t2 = (pSrc[2U * i1] >> 4U) - (pSrc[2U * i3] >> 4U);
+    t2 = (pSrc[(2U * i1)] >> 4U) - (pSrc[(2U * i3)] >> 4U);
 
     /*  index calculation for the coefficients */
     ia2 = 2U * ia1;
-    co2 = pCoef[ia2 * 2U];
+    co2 = pCoef[(ia2 * 2U)];
     si2 = pCoef[(ia2 * 2U) + 1U];
 
     /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
@@ -245,7 +241,7 @@
     /* (ya - yc) + (xb - xd) */
     s2 = s2 + t2;
 
-    co1 = pCoef[ia1 * 2U];
+    co1 = pCoef[(ia1 * 2U)];
     si1 = pCoef[(ia1 * 2U) + 1U];
 
     /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
@@ -258,7 +254,7 @@
 
     /*  index calculation for the coefficients */
     ia3 = 3U * ia1;
-    co3 = pCoef[ia3 * 2U];
+    co3 = pCoef[(ia3 * 2U)];
     si3 = pCoef[(ia3 * 2U) + 1U];
 
     /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
@@ -303,11 +299,11 @@
       /*  index calculation for the coefficients */
       ia2 = ia1 + ia1;
       ia3 = ia2 + ia1;
-      co1 = pCoef[ia1 * 2U];
+      co1 = pCoef[(ia1 * 2U)];
       si1 = pCoef[(ia1 * 2U) + 1U];
-      co2 = pCoef[ia2 * 2U];
+      co2 = pCoef[(ia2 * 2U)];
       si2 = pCoef[(ia2 * 2U) + 1U];
-      co3 = pCoef[ia3 * 2U];
+      co3 = pCoef[(ia3 * 2U)];
       si3 = pCoef[(ia3 * 2U) + 1U];
       /*  Twiddle coefficients index modifier */
       ia1 = ia1 + twidCoefModifier;
@@ -389,256 +385,6 @@
     }
     twidCoefModifier <<= 2U;
   }
-#else
-  uint32_t n1, n2, ia1, ia2, ia3, i0, j, k;
-  q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
-
-  q31_t xa, xb, xc, xd;
-  q31_t ya, yb, yc, yd;
-  q31_t xa_out, xb_out, xc_out, xd_out;
-  q31_t ya_out, yb_out, yc_out, yd_out;
-
-  q31_t *ptr1;
-  q31_t *pSi0;
-  q31_t *pSi1;
-  q31_t *pSi2;
-  q31_t *pSi3;
-  q63_t xaya, xbyb, xcyc, xdyd;
-  /* Total process is divided into three stages */
-
-  /* process first stage, middle stages, & last stage */
-
-
-  /* start of first stage process */
-
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-  /* n2 = fftLen/4 */
-  n2 >>= 2U;
-
-  ia1 = 0U;
-
-  j = n2;
-
-  pSi0 = pSrc;
-  pSi1 = pSi0 + 2 * n2;
-  pSi2 = pSi1 + 2 * n2;
-  pSi3 = pSi2 + 2 * n2;
-
-  /*  Calculation of first stage */
-  do
-  {
-    /* input is in 1.31(q31) format and provide 4 guard bits for the input */
-
-    /*  Butterfly implementation */
-    /* xa + xc */
-    r1 = (pSi0[0] >> 4U) + (pSi2[0] >> 4U);
-    /* xa - xc */
-    r2 = (pSi0[0] >> 4U) - (pSi2[0] >> 4U);
-
-    /* xb + xd */
-    t1 = (pSi1[0] >> 4U) + (pSi3[0] >> 4U);
-
-    /* ya + yc */
-    s1 = (pSi0[1] >> 4U) + (pSi2[1] >> 4U);
-    /* ya - yc */
-    s2 = (pSi0[1] >> 4U) - (pSi2[1] >> 4U);
-
-    /* xa' = xa + xb + xc + xd */
-    *pSi0++ = (r1 + t1);
-    /* (xa + xc) - (xb + xd) */
-    r1 = r1 - t1;
-    /* yb + yd */
-    t2 = (pSi1[1] >> 4U) + (pSi3[1] >> 4U);
-
-    /* ya' = ya + yb + yc + yd */
-    *pSi0++ = (s1 + t2);
-
-    /* (ya + yc) - (yb + yd) */
-    s1 = s1 - t2;
-
-    /* yb - yd */
-    t1 = (pSi1[1] >> 4U) - (pSi3[1] >> 4U);
-    /* xb - xd */
-    t2 = (pSi1[0] >> 4U) - (pSi3[0] >> 4U);
-
-    /*  index calculation for the coefficients */
-    ia2 = 2U * ia1;
-    co2 = pCoef[ia2 * 2U];
-    si2 = pCoef[(ia2 * 2U) + 1U];
-
-    /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-    *pSi1++ = (((int32_t) (((q63_t) r1 * co2) >> 32)) +
-                     ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U;
-
-    /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-    *pSi1++ = (((int32_t) (((q63_t) s1 * co2) >> 32)) -
-                            ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U;
-
-    /* (xa - xc) + (yb - yd) */
-    r1 = r2 + t1;
-    /* (xa - xc) - (yb - yd) */
-    r2 = r2 - t1;
-
-    /* (ya - yc) - (xb - xd) */
-    s1 = s2 - t2;
-    /* (ya - yc) + (xb - xd) */
-    s2 = s2 + t2;
-
-    co1 = pCoef[ia1 * 2U];
-    si1 = pCoef[(ia1 * 2U) + 1U];
-
-    /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-    *pSi2++ = (((int32_t) (((q63_t) r1 * co1) >> 32)) +
-                     ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U;
-
-    /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-    *pSi2++ = (((int32_t) (((q63_t) s1 * co1) >> 32)) -
-                            ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U;
-
-    /*  index calculation for the coefficients */
-    ia3 = 3U * ia1;
-    co3 = pCoef[ia3 * 2U];
-    si3 = pCoef[(ia3 * 2U) + 1U];
-
-    /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-    *pSi3++ = (((int32_t) (((q63_t) r2 * co3) >> 32)) +
-                     ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U;
-
-    /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-    *pSi3++ = (((int32_t) (((q63_t) s2 * co3) >> 32)) -
-                            ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U;
-
-    /*  Twiddle coefficients index modifier */
-    ia1 = ia1 + twidCoefModifier;
-
-  } while (--j);
-
-  /* end of first stage process */
-
-  /* data is in 5.27(q27) format */
-
-
-  /* start of Middle stages process */
-
-
-  /* each stage in middle stages provides two down scaling of the input */
-
-  twidCoefModifier <<= 2U;
-
-
-  for (k = fftLen / 4U; k > 4U; k >>= 2U)
-  {
-    /*  Initializations for the first stage */
-    n1 = n2;
-    n2 >>= 2U;
-    ia1 = 0U;
-
-    /*  Calculation of first stage */
-    for (j = 0U; j <= (n2 - 1U); j++)
-    {
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      ia3 = ia2 + ia1;
-      co1 = pCoef[ia1 * 2U];
-      si1 = pCoef[(ia1 * 2U) + 1U];
-      co2 = pCoef[ia2 * 2U];
-      si2 = pCoef[(ia2 * 2U) + 1U];
-      co3 = pCoef[ia3 * 2U];
-      si3 = pCoef[(ia3 * 2U) + 1U];
-      /*  Twiddle coefficients index modifier */
-      ia1 = ia1 + twidCoefModifier;
-
-      pSi0 = pSrc + 2 * j;
-      pSi1 = pSi0 + 2 * n2;
-      pSi2 = pSi1 + 2 * n2;
-      pSi3 = pSi2 + 2 * n2;
-
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  Butterfly implementation */
-        /* xa + xc */
-        r1 = pSi0[0] + pSi2[0];
-
-        /* xa - xc */
-        r2 = pSi0[0] - pSi2[0];
-
-
-        /* ya + yc */
-        s1 = pSi0[1] + pSi2[1];
-
-        /* ya - yc */
-        s2 = pSi0[1] - pSi2[1];
-
-
-        /* xb + xd */
-        t1 = pSi1[0] + pSi3[0];
-
-
-        /* xa' = xa + xb + xc + xd */
-        pSi0[0] = (r1 + t1) >> 2U;
-        /* xa + xc -(xb + xd) */
-        r1 = r1 - t1;
-
-        /* yb + yd */
-        t2 = pSi1[1] + pSi3[1];
-
-        /* ya' = ya + yb + yc + yd */
-        pSi0[1] = (s1 + t2) >> 2U;
-        pSi0 += 2 * n1;
-
-        /* (ya + yc) - (yb + yd) */
-        s1 = s1 - t2;
-
-        /* (yb - yd) */
-        t1 = pSi1[1] - pSi3[1];
-
-        /* (xb - xd) */
-        t2 = pSi1[0] - pSi3[0];
-
-
-        /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-        pSi1[0] = (((int32_t) (((q63_t) r1 * co2) >> 32)) +
-                         ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1U;
-
-        /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-        pSi1[1] = (((int32_t) (((q63_t) s1 * co2) >> 32)) -
-                                ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1U;
-        pSi1 += 2 * n1;
-
-        /* (xa - xc) + (yb - yd) */
-        r1 = r2 + t1;
-        /* (xa - xc) - (yb - yd) */
-        r2 = r2 - t1;
-
-        /* (ya - yc) -  (xb - xd) */
-        s1 = s2 - t2;
-        /* (ya - yc) +  (xb - xd) */
-        s2 = s2 + t2;
-
-        /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-        pSi2[0] = (((int32_t) (((q63_t) r1 * co1) >> 32)) +
-                         ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U;
-
-        /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-        pSi2[1] = (((int32_t) (((q63_t) s1 * co1) >> 32)) -
-                                ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U;
-        pSi2 += 2 * n1;
-
-        /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-        pSi3[0] = (((int32_t) (((q63_t) r2 * co3) >> 32)) +
-                         ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U;
-
-        /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-        pSi3[1] = (((int32_t) (((q63_t) s2 * co3) >> 32)) -
-                                ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U;
-        pSi3 += 2 * n1;
-      }
-    }
-    twidCoefModifier <<= 2U;
-  }
-#endif
 
   /* End of Middle stages process */
 
@@ -656,53 +402,21 @@
   /*  Calculations of last stage */
   do
   {
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
     /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD64(ptr1)++;
-    xa = (q31_t) xaya;
-    ya = (q31_t) (xaya >> 32);
+    xa = *ptr1++;
+    ya = *ptr1++;
 
     /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD64(ptr1)++;
-    xb = (q31_t) xbyb;
-    yb = (q31_t) (xbyb >> 32);
+    xb = *ptr1++;
+    yb = *ptr1++;
 
     /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD64(ptr1)++;
-    xc = (q31_t) xcyc;
-    yc = (q31_t) (xcyc >> 32);
+    xc = *ptr1++;
+    yc = *ptr1++;
 
     /* Read xc (real), yc(imag) input */
-    xdyd = *__SIMD64(ptr1)++;
-    xd = (q31_t) xdyd;
-    yd = (q31_t) (xdyd >> 32);
-
-#else
-
-    /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD64(ptr1)++;
-    ya = (q31_t) xaya;
-    xa = (q31_t) (xaya >> 32);
-
-    /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD64(ptr1)++;
-    yb = (q31_t) xbyb;
-    xb = (q31_t) (xbyb >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD64(ptr1)++;
-    yc = (q31_t) xcyc;
-    xc = (q31_t) (xcyc >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xdyd = *__SIMD64(ptr1)++;
-    yd = (q31_t) xdyd;
-    xd = (q31_t) (xdyd >> 32);
-
-
-#endif
+    xd = *ptr1++;
+    yd = *ptr1++;
 
     /* xa' = xa + xb + xc + xd */
     xa_out = xa + xb + xc + xd;
@@ -752,71 +466,68 @@
 
 
 /**
- * @brief  Core function for the Q31 CIFFT butterfly process.
- * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type.
- * @param[in]      fftLen           length of the FFT.
- * @param[in]      *pCoef           points to twiddle coefficient buffer.
- * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @return none.
+  @brief         Core function for the Q31 CIFFT butterfly process.
+  @param[in,out] pSrc             points to the in-place buffer of Q31 data type.
+  @param[in]     fftLen           length of the FFT.
+  @param[in]     pCoef            points to twiddle coefficient buffer.
+  @param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+  @return        none
  */
 
-
 /*
-* Radix-4 IFFT algorithm used is :
-*
-* CIFFT uses same twiddle coefficients as CFFT Function
-*  x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]
-*
-*
-* IFFT is implemented with following changes in equations from FFT
-*
-* Input real and imaginary data:
-* x(n) = xa + j * ya
-* x(n+N/4 ) = xb + j * yb
-* x(n+N/2 ) = xc + j * yc
-* x(n+3N 4) = xd + j * yd
-*
-*
-* Output real and imaginary data:
-* x(4r) = xa'+ j * ya'
-* x(4r+1) = xb'+ j * yb'
-* x(4r+2) = xc'+ j * yc'
-* x(4r+3) = xd'+ j * yd'
-*
-*
-* Twiddle factors for radix-4 IFFT:
-* Wn = co1 + j * (si1)
-* W2n = co2 + j * (si2)
-* W3n = co3 + j * (si3)
-
-* The real and imaginary output values for the radix-4 butterfly are
-* xa' = xa + xb + xc + xd
-* ya' = ya + yb + yc + yd
-* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)
-* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)
-* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)
-* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)
-* xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)
-* yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)
-*
-*/
+ * Radix-4 IFFT algorithm used is :
+ *
+ * CIFFT uses same twiddle coefficients as CFFT Function
+ *  x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]
+ *
+ *
+ * IFFT is implemented with following changes in equations from FFT
+ *
+ * Input real and imaginary data:
+ * x(n) = xa + j * ya
+ * x(n+N/4 ) = xb + j * yb
+ * x(n+N/2 ) = xc + j * yc
+ * x(n+3N 4) = xd + j * yd
+ *
+ *
+ * Output real and imaginary data:
+ * x(4r) = xa'+ j * ya'
+ * x(4r+1) = xb'+ j * yb'
+ * x(4r+2) = xc'+ j * yc'
+ * x(4r+3) = xd'+ j * yd'
+ *
+ *
+ * Twiddle factors for radix-4 IFFT:
+ * Wn = co1 + j * (si1)
+ * W2n = co2 + j * (si2)
+ * W3n = co3 + j * (si3)
+ 
+ * The real and imaginary output values for the radix-4 butterfly are
+ * xa' = xa + xb + xc + xd
+ * ya' = ya + yb + yc + yd
+ * xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)
+ * yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)
+ * xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)
+ * yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)
+ * xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)
+ * yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)
+ *
+ */
 
 void arm_radix4_butterfly_inverse_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pCoef,
-  uint32_t twidCoefModifier)
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint32_t twidCoefModifier)
 {
-#if defined(ARM_MATH_CM7)
-  uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
-  q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
-  q31_t xa, xb, xc, xd;
-  q31_t ya, yb, yc, yd;
-  q31_t xa_out, xb_out, xc_out, xd_out;
-  q31_t ya_out, yb_out, yc_out, yd_out;
-
-  q31_t *ptr1;
-  q63_t xaya, xbyb, xcyc, xdyd;
+        uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
+        q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
+        q31_t xa, xb, xc, xd;
+        q31_t ya, yb, yc, yd;
+        q31_t xa_out, xb_out, xc_out, xd_out;
+        q31_t ya_out, yb_out, yc_out, yd_out;
+        
+        q31_t *ptr1;
 
   /* input is be 1.31(q31) format for all FFT sizes */
   /* Total process is divided into three stages */
@@ -836,7 +547,6 @@
 
   do
   {
-
     /* input is in 1.31(q31) format and provide 4 guard bits for the input */
 
     /*  index calculation for the input as, */
@@ -952,11 +662,11 @@
       /*  index calculation for the coefficients */
       ia2 = ia1 + ia1;
       ia3 = ia2 + ia1;
-      co1 = pCoef[ia1 * 2U];
+      co1 = pCoef[(ia1 * 2U)];
       si1 = pCoef[(ia1 * 2U) + 1U];
-      co2 = pCoef[ia2 * 2U];
+      co2 = pCoef[(ia2 * 2U)];
       si2 = pCoef[(ia2 * 2U) + 1U];
-      co3 = pCoef[ia3 * 2U];
+      co3 = pCoef[(ia3 * 2U)];
       si3 = pCoef[(ia3 * 2U) + 1U];
       /*  Twiddle coefficients index modifier */
       ia1 = ia1 + twidCoefModifier;
@@ -1005,9 +715,8 @@
                          ((int32_t) (((q63_t) s1 * si2) >> 32U))) >> 1U;
 
         /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-        pSrc[(2U * i1) + 1U] =
-          (((int32_t) (((q63_t) s1 * co2) >> 32U)) +
-           ((int32_t) (((q63_t) r1 * si2) >> 32U))) >> 1U;
+        pSrc[(2U * i1) + 1U] = (((int32_t) (((q63_t) s1 * co2) >> 32U)) +
+                                ((int32_t) (((q63_t) r1 * si2) >> 32U))) >> 1U;
 
         /* (xa - xc) - (yb - yd) */
         r1 = r2 - t1;
@@ -1038,247 +747,6 @@
     }
     twidCoefModifier <<= 2U;
   }
-#else
-  uint32_t n1, n2, ia1, ia2, ia3, i0, j, k;
-  q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
-  q31_t xa, xb, xc, xd;
-  q31_t ya, yb, yc, yd;
-  q31_t xa_out, xb_out, xc_out, xd_out;
-  q31_t ya_out, yb_out, yc_out, yd_out;
-
-  q31_t *ptr1;
-  q31_t *pSi0;
-  q31_t *pSi1;
-  q31_t *pSi2;
-  q31_t *pSi3;
-  q63_t xaya, xbyb, xcyc, xdyd;
-
-  /* input is be 1.31(q31) format for all FFT sizes */
-  /* Total process is divided into three stages */
-  /* process first stage, middle stages, & last stage */
-
-  /* Start of first stage process */
-
-  /* Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-  /* n2 = fftLen/4 */
-  n2 >>= 2U;
-
-  ia1 = 0U;
-
-  j = n2;
-
-  pSi0 = pSrc;
-  pSi1 = pSi0 + 2 * n2;
-  pSi2 = pSi1 + 2 * n2;
-  pSi3 = pSi2 + 2 * n2;
-
-  do
-  {
-    /*  Butterfly implementation */
-    /* xa + xc */
-    r1 = (pSi0[0] >> 4U) + (pSi2[0] >> 4U);
-    /* xa - xc */
-    r2 = (pSi0[0] >> 4U) - (pSi2[0] >> 4U);
-
-    /* xb + xd */
-    t1 = (pSi1[0] >> 4U) + (pSi3[0] >> 4U);
-
-    /* ya + yc */
-    s1 = (pSi0[1] >> 4U) + (pSi2[1] >> 4U);
-    /* ya - yc */
-    s2 = (pSi0[1] >> 4U) - (pSi2[1] >> 4U);
-
-    /* xa' = xa + xb + xc + xd */
-    *pSi0++ = (r1 + t1);
-    /* (xa + xc) - (xb + xd) */
-    r1 = r1 - t1;
-    /* yb + yd */
-    t2 = (pSi1[1] >> 4U) + (pSi3[1] >> 4U);
-    /* ya' = ya + yb + yc + yd */
-    *pSi0++ = (s1 + t2);
-
-    /* (ya + yc) - (yb + yd) */
-    s1 = s1 - t2;
-
-    /* yb - yd */
-    t1 = (pSi1[1] >> 4U) - (pSi3[1] >> 4U);
-    /* xb - xd */
-    t2 = (pSi1[0] >> 4U) - (pSi3[0] >> 4U);
-
-    /*  index calculation for the coefficients */
-    ia2 = 2U * ia1;
-    co2 = pCoef[ia2 * 2U];
-    si2 = pCoef[(ia2 * 2U) + 1U];
-
-    /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-    *pSi1++ = (((int32_t) (((q63_t) r1 * co2) >> 32)) -
-                     ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U;
-
-    /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-    *pSi1++ = (((int32_t) (((q63_t) s1 * co2) >> 32)) +
-                          ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U;
-
-    /* (xa - xc) - (yb - yd) */
-    r1 = r2 - t1;
-    /* (xa - xc) + (yb - yd) */
-    r2 = r2 + t1;
-
-    /* (ya - yc) + (xb - xd) */
-    s1 = s2 + t2;
-    /* (ya - yc) - (xb - xd) */
-    s2 = s2 - t2;
-
-    co1 = pCoef[ia1 * 2U];
-    si1 = pCoef[(ia1 * 2U) + 1U];
-
-    /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-    *pSi2++ = (((int32_t) (((q63_t) r1 * co1) >> 32)) -
-                     ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U;
-
-    /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-    *pSi2++ = (((int32_t) (((q63_t) s1 * co1) >> 32)) +
-                            ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U;
-
-    /*  index calculation for the coefficients */
-    ia3 = 3U * ia1;
-    co3 = pCoef[ia3 * 2U];
-    si3 = pCoef[(ia3 * 2U) + 1U];
-
-    /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-    *pSi3++ = (((int32_t) (((q63_t) r2 * co3) >> 32)) -
-                     ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U;
-
-    /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-    *pSi3++ = (((int32_t) (((q63_t) s2 * co3) >> 32)) +
-                            ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U;
-
-    /*  Twiddle coefficients index modifier */
-    ia1 = ia1 + twidCoefModifier;
-
-  } while (--j);
-
-  /* data is in 5.27(q27) format */
-  /* each stage provides two down scaling of the input */
-
-
-  /* Start of Middle stages process */
-
-  twidCoefModifier <<= 2U;
-
-  /*  Calculation of second stage to excluding last stage */
-  for (k = fftLen / 4U; k > 4U; k >>= 2U)
-  {
-    /*  Initializations for the first stage */
-    n1 = n2;
-    n2 >>= 2U;
-    ia1 = 0U;
-
-    for (j = 0; j <= (n2 - 1U); j++)
-    {
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      ia3 = ia2 + ia1;
-      co1 = pCoef[ia1 * 2U];
-      si1 = pCoef[(ia1 * 2U) + 1U];
-      co2 = pCoef[ia2 * 2U];
-      si2 = pCoef[(ia2 * 2U) + 1U];
-      co3 = pCoef[ia3 * 2U];
-      si3 = pCoef[(ia3 * 2U) + 1U];
-      /*  Twiddle coefficients index modifier */
-      ia1 = ia1 + twidCoefModifier;
-
-      pSi0 = pSrc + 2 * j;
-      pSi1 = pSi0 + 2 * n2;
-      pSi2 = pSi1 + 2 * n2;
-      pSi3 = pSi2 + 2 * n2;
-
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  Butterfly implementation */
-        /* xa + xc */
-        r1 = pSi0[0] + pSi2[0];
-
-        /* xa - xc */
-        r2 = pSi0[0] - pSi2[0];
-
-
-        /* ya + yc */
-        s1 = pSi0[1] + pSi2[1];
-
-        /* ya - yc */
-        s2 = pSi0[1] - pSi2[1];
-
-
-        /* xb + xd */
-        t1 = pSi1[0] + pSi3[0];
-
-
-        /* xa' = xa + xb + xc + xd */
-        pSi0[0] = (r1 + t1) >> 2U;
-        /* xa + xc -(xb + xd) */
-        r1 = r1 - t1;
-        /* yb + yd */
-        t2 = pSi1[1] + pSi3[1];
-
-        /* ya' = ya + yb + yc + yd */
-        pSi0[1] = (s1 + t2) >> 2U;
-        pSi0 += 2 * n1;
-
-        /* (ya + yc) - (yb + yd) */
-        s1 = s1 - t2;
-
-        /* (yb - yd) */
-        t1 = pSi1[1] - pSi3[1];
-
-        /* (xb - xd) */
-        t2 = pSi1[0] - pSi3[0];
-
-
-        /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-        pSi1[0] = (((int32_t) (((q63_t) r1 * co2) >> 32U)) -
-                         ((int32_t) (((q63_t) s1 * si2) >> 32U))) >> 1U;
-
-        /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-        pSi1[1] =
-
-          (((int32_t) (((q63_t) s1 * co2) >> 32U)) +
-           ((int32_t) (((q63_t) r1 * si2) >> 32U))) >> 1U;
-        pSi1 += 2 * n1;
-
-        /* (xa - xc) - (yb - yd) */
-        r1 = r2 - t1;
-        /* (xa - xc) + (yb - yd) */
-        r2 = r2 + t1;
-
-        /* (ya - yc) +  (xb - xd) */
-        s1 = s2 + t2;
-        /* (ya - yc) -  (xb - xd) */
-        s2 = s2 - t2;
-
-        /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-        pSi2[0] = (((int32_t) (((q63_t) r1 * co1) >> 32)) -
-                         ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U;
-
-        /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-        pSi2[1] = (((int32_t) (((q63_t) s1 * co1) >> 32)) +
-                                ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U;
-        pSi2 += 2 * n1;
-
-        /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-        pSi3[0] = (((int32_t) (((q63_t) r2 * co3) >> 32)) -
-                           ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U;
-
-        /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-        pSi3[1] = (((int32_t) (((q63_t) s2 * co3) >> 32)) +
-                                ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U;
-        pSi3 += 2 * n1;
-      }
-    }
-    twidCoefModifier <<= 2U;
-  }
-#endif
 
   /* End of Middle stages process */
 
@@ -1298,51 +766,21 @@
   /*  Calculations of last stage */
   do
   {
-#ifndef ARM_MATH_BIG_ENDIAN
     /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD64(ptr1)++;
-    xa = (q31_t) xaya;
-    ya = (q31_t) (xaya >> 32);
+    xa = *ptr1++;
+    ya = *ptr1++;
 
     /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD64(ptr1)++;
-    xb = (q31_t) xbyb;
-    yb = (q31_t) (xbyb >> 32);
+    xb = *ptr1++;
+    yb = *ptr1++;
 
     /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD64(ptr1)++;
-    xc = (q31_t) xcyc;
-    yc = (q31_t) (xcyc >> 32);
+    xc = *ptr1++;
+    yc = *ptr1++;
 
     /* Read xc (real), yc(imag) input */
-    xdyd = *__SIMD64(ptr1)++;
-    xd = (q31_t) xdyd;
-    yd = (q31_t) (xdyd >> 32);
-
-#else
-
-    /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD64(ptr1)++;
-    ya = (q31_t) xaya;
-    xa = (q31_t) (xaya >> 32);
-
-    /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD64(ptr1)++;
-    yb = (q31_t) xbyb;
-    xb = (q31_t) (xbyb >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD64(ptr1)++;
-    yc = (q31_t) xcyc;
-    xc = (q31_t) (xcyc >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xdyd = *__SIMD64(ptr1)++;
-    yd = (q31_t) xdyd;
-    xd = (q31_t) (xdyd >> 32);
-
-
-#endif
+    xd = *ptr1++;
+    yd = *ptr1++;
 
     /* xa' = xa + xb + xc + xd */
     xa_out = xa + xb + xc + xd;
diff --git a/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c b/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c
index b70ab38..50048f6 100644
--- a/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c
+++ b/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_cfft_radix8_f32.c
  * Description:  Radix-8 Decimation in Frequency CFFT & CIFFT Floating point processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -33,20 +33,20 @@
  * Internal helper function used by the FFTs
  * -------------------------------------------------------------------- */
 
-/*
-* @brief  Core function for the floating-point CFFT butterfly process.
-* @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.
-* @param[in]      fftLen           length of the FFT.
-* @param[in]      *pCoef           points to the twiddle coefficient buffer.
-* @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-* @return none.
+/**
+  brief         Core function for the floating-point CFFT butterfly process.
+  param[in,out] pSrc             points to the in-place buffer of floating-point data type.
+  param[in]     fftLen           length of the FFT.
+  param[in]     pCoef            points to the twiddle coefficient buffer.
+  param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+  return        none
 */
 
 void arm_radix8_butterfly_f32(
-float32_t * pSrc,
-uint16_t fftLen,
-const float32_t * pCoef,
-uint16_t twidCoefModifier)
+  float32_t * pSrc,
+  uint16_t fftLen,
+  const float32_t * pCoef,
+  uint16_t twidCoefModifier)
 {
    uint32_t ia1, ia2, ia3, ia4, ia5, ia6, ia7;
    uint32_t i1, i2, i3, i4, i5, i6, i7, i8;
diff --git a/DSP/Source/TransformFunctions/arm_dct4_f32.c b/DSP/Source/TransformFunctions/arm_dct4_f32.c
index 231c79a..87455dc 100644
--- a/DSP/Source/TransformFunctions/arm_dct4_f32.c
+++ b/DSP/Source/TransformFunctions/arm_dct4_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_dct4_f32.c
  * Description:  Processing function of DCT4 & IDCT4 F32
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,109 +29,111 @@
 #include "arm_math.h"
 
 /**
- * @ingroup groupTransforms
+  @ingroup groupTransforms
  */
 
 /**
- * @defgroup DCT4_IDCT4 DCT Type IV Functions
- * Representation of signals by minimum number of values is important for storage and transmission.
- * The possibility of large discontinuity between the beginning and end of a period of a signal
- * in DFT can be avoided by extending the signal so that it is even-symmetric.
- * Discrete Cosine Transform (DCT) is constructed such that its energy is heavily concentrated in the lower part of the
- * spectrum and is very widely used in signal and image coding applications.
- * The family of DCTs (DCT type- 1,2,3,4) is the outcome of different combinations of homogeneous boundary conditions.
- * DCT has an excellent energy-packing capability, hence has many applications and in data compression in particular.
- *
- * DCT is essentially the Discrete Fourier Transform(DFT) of an even-extended real signal.
- * Reordering of the input data makes the computation of DCT just a problem of
- * computing the DFT of a real signal with a few additional operations.
- * This approach provides regular, simple, and very efficient DCT algorithms for practical hardware and software implementations.
- *
- * DCT type-II can be implemented using Fast fourier transform (FFT) internally, as the transform is applied on real values, Real FFT can be used.
- * DCT4 is implemented using DCT2 as their implementations are similar except with some added pre-processing and post-processing.
- * DCT2 implementation can be described in the following steps:
- * - Re-ordering input
- * - Calculating Real FFT
- * - Multiplication of weights and Real FFT output and getting real part from the product.
- *
- * This process is explained by the block diagram below:
- * \image html DCT4.gif "Discrete Cosine Transform - type-IV"
- *
- * \par Algorithm:
- * The N-point type-IV DCT is defined as a real, linear transformation by the formula:
- * \image html DCT4Equation.gif
- * where <code>k = 0,1,2,.....N-1</code>
- *\par
- * Its inverse is defined as follows:
- * \image html IDCT4Equation.gif
- * where <code>n = 0,1,2,.....N-1</code>
- *\par
- * The DCT4 matrices become involutory (i.e. they are self-inverse) by multiplying with an overall scale factor of sqrt(2/N).
- * The symmetry of the transform matrix indicates that the fast algorithms for the forward
- * and inverse transform computation are identical.
- * Note that the implementation of Inverse DCT4 and DCT4 is same, hence same process function can be used for both.
- *
- * \par Lengths supported by the transform:
- *  As DCT4 internally uses Real FFT, it supports all the lengths 128, 512, 2048 and 8192.
- * The library provides separate functions for Q15, Q31, and floating-point data types.
- * \par Instance Structure
- * The instances for Real FFT and FFT, cosine values table and twiddle factor table are stored in an instance data structure.
- * A separate instance structure must be defined for each transform.
- * There are separate instance structure declarations for each of the 3 supported data types.
- *
- * \par Initialization Functions
- * There is also an associated initialization function for each data type.
- * The initialization function performs the following operations:
- * - Sets the values of the internal structure fields.
- * - Initializes Real FFT as its process function is used internally in DCT4, by calling arm_rfft_init_f32().
- * \par
- * Use of the initialization function is optional.
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
- * To place an instance structure into a const data section, the instance structure must be manually initialized.
- * Manually initialize the instance structure as follows:
- * <pre>
- *arm_dct4_instance_f32 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
- *arm_dct4_instance_q31 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
- *arm_dct4_instance_q15 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
- * </pre>
- * where \c N is the length of the DCT4; \c Nby2 is half of the length of the DCT4;
- * \c normalize is normalizing factor used and is equal to <code>sqrt(2/N)</code>;
- * \c pTwiddle points to the twiddle factor table;
- * \c pCosFactor points to the cosFactor table;
- * \c pRfft points to the real FFT instance;
- * \c pCfft points to the complex FFT instance;
- * The CFFT and RFFT structures also needs to be initialized, refer to arm_cfft_radix4_f32()
- * and arm_rfft_f32() respectively for details regarding static initialization.
- *
- * \par Fixed-Point Behavior
- * Care must be taken when using the fixed-point versions of the DCT4 transform functions.
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
- * Refer to the function specific documentation below for usage guidelines.
+  @defgroup DCT4_IDCT4 DCT Type IV Functions
+
+  Representation of signals by minimum number of values is important for storage and transmission.
+  The possibility of large discontinuity between the beginning and end of a period of a signal
+  in DFT can be avoided by extending the signal so that it is even-symmetric.
+  Discrete Cosine Transform (DCT) is constructed such that its energy is heavily concentrated in the lower part of the
+  spectrum and is very widely used in signal and image coding applications.
+  The family of DCTs (DCT type- 1,2,3,4) is the outcome of different combinations of homogeneous boundary conditions.
+  DCT has an excellent energy-packing capability, hence has many applications and in data compression in particular.
+  
+  DCT is essentially the Discrete Fourier Transform(DFT) of an even-extended real signal.
+  Reordering of the input data makes the computation of DCT just a problem of
+  computing the DFT of a real signal with a few additional operations.
+  This approach provides regular, simple, and very efficient DCT algorithms for practical hardware and software implementations.
+  
+  DCT type-II can be implemented using Fast fourier transform (FFT) internally, as the transform is applied on real values, Real FFT can be used.
+  DCT4 is implemented using DCT2 as their implementations are similar except with some added pre-processing and post-processing.
+  DCT2 implementation can be described in the following steps:
+  - Re-ordering input
+  - Calculating Real FFT
+  - Multiplication of weights and Real FFT output and getting real part from the product.
+  
+  This process is explained by the block diagram below:
+  \image html DCT4.gif "Discrete Cosine Transform - type-IV"
+ 
+  @par           Algorithm
+                   The N-point type-IV DCT is defined as a real, linear transformation by the formula:
+                   \image html DCT4Equation.gif
+                   where <code>k = 0, 1, 2, ..., N-1</code>
+  @par
+                   Its inverse is defined as follows:
+                   \image html IDCT4Equation.gif
+                   where <code>n = 0, 1, 2, ..., N-1</code>
+  @par
+                   The DCT4 matrices become involutory (i.e. they are self-inverse) by multiplying with an overall scale factor of sqrt(2/N).
+                   The symmetry of the transform matrix indicates that the fast algorithms for the forward
+                   and inverse transform computation are identical.
+                   Note that the implementation of Inverse DCT4 and DCT4 is same, hence same process function can be used for both.
+ 
+  @par           Lengths supported by the transform:
+                   As DCT4 internally uses Real FFT, it supports all the lengths 128, 512, 2048 and 8192.
+                   The library provides separate functions for Q15, Q31, and floating-point data types.
+
+  @par           Instance Structure
+                   The instances for Real FFT and FFT, cosine values table and twiddle factor table are stored in an instance data structure.
+                   A separate instance structure must be defined for each transform.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+                 
+  @par           Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Initializes Real FFT as its process function is used internally in DCT4, by calling \ref arm_rfft_init_f32().
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Manually initialize the instance structure as follows:
+  <pre>
+      arm_dct4_instance_f32 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
+      arm_dct4_instance_q31 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
+      arm_dct4_instance_q15 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
+  </pre>
+                   where \c N is the length of the DCT4; \c Nby2 is half of the length of the DCT4;
+                   \c normalize is normalizing factor used and is equal to <code>sqrt(2/N)</code>;
+                   \c pTwiddle points to the twiddle factor table;
+                   \c pCosFactor points to the cosFactor table;
+                   \c pRfft points to the real FFT instance;
+                   \c pCfft points to the complex FFT instance;
+                   The CFFT and RFFT structures also needs to be initialized, refer to arm_cfft_radix4_f32()
+                   and arm_rfft_f32() respectively for details regarding static initialization.
+ 
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the fixed-point versions of the DCT4 transform functions.
+                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+                   Refer to the function specific documentation below for usage guidelines.
  */
 
  /**
- * @addtogroup DCT4_IDCT4
- * @{
+  @addtogroup DCT4_IDCT4
+  @{
  */
 
 /**
- * @brief Processing function for the floating-point DCT4/IDCT4.
- * @param[in]       *S             points to an instance of the floating-point DCT4/IDCT4 structure.
- * @param[in]       *pState        points to state buffer.
- * @param[in,out]   *pInlineBuffer points to the in-place input and output buffer.
- * @return none.
+  @brief         Processing function for the floating-point DCT4/IDCT4.
+  @param[in]     S             points to an instance of the floating-point DCT4/IDCT4 structure
+  @param[in]     pState        points to state buffer
+  @param[in,out] pInlineBuffer points to the in-place input and output buffer
+  @return        none
  */
 
 void arm_dct4_f32(
   const arm_dct4_instance_f32 * S,
-  float32_t * pState,
-  float32_t * pInlineBuffer)
+        float32_t * pState,
+        float32_t * pInlineBuffer)
 {
-  uint32_t i;                                    /* Loop counter */
-  float32_t *weights = S->pTwiddle;              /* Pointer to the Weights table */
-  float32_t *cosFact = S->pCosFactor;            /* Pointer to the cos factors table */
-  float32_t *pS1, *pS2, *pbuff;                  /* Temporary pointers for input buffer and pState buffer */
-  float32_t in;                                  /* Temporary variable */
+  const float32_t *weights = S->pTwiddle;              /* Pointer to the Weights table */
+  const float32_t *cosFact = S->pCosFactor;            /* Pointer to the cos factors table */
+        float32_t *pS1, *pS2, *pbuff;                  /* Temporary pointers for input buffer and pState buffer */
+        float32_t in;                                  /* Temporary variable */
+        uint32_t i;                                    /* Loop counter */
 
 
   /* DCT4 computation involves DCT2 (which is calculated using RFFT)
@@ -153,13 +155,13 @@
    * (d) Multiplying the output with the normalizing factor sqrt(2/N).
    */
 
-        /*-------- Pre-processing ------------*/
+  /*-------- Pre-processing ------------*/
   /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
   arm_scale_f32(pInlineBuffer, 2.0f, pInlineBuffer, S->N);
   arm_mult_f32(pInlineBuffer, cosFact, pInlineBuffer, S->N);
 
   /* ----------------------------------------------------------------
-   * Step1: Re-ordering of even and odd elements as,
+   * Step1: Re-ordering of even and odd elements as
    *             pState[i] =  pInlineBuffer[2*i] and
    *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2
    ---------------------------------------------------------------------*/
@@ -173,12 +175,11 @@
   /* pbuff initialized to input buffer */
   pbuff = pInlineBuffer;
 
-#if defined (ARM_MATH_DSP)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
 
   /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
-  i = (uint32_t) S->Nby2 >> 2U;
+  i = S->Nby2 >> 2U;
 
   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
    ** a second loop below computes the remaining 1 to 3 samples. */
@@ -199,7 +200,7 @@
     *pS1++ = *pbuff++;
     *pS2-- = *pbuff++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
   } while (i > 0U);
 
@@ -210,7 +211,7 @@
   pS1 = pState;
 
   /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = (uint32_t) S->N >> 2U;
+  i = S->N >> 2U;
 
   /* Processing with loop unrolling 4 times as N is always multiple of 4.
    * Compute 4 outputs at a time */
@@ -231,12 +232,12 @@
    *     Step2: Calculate RFFT for N-point input
    * ---------------------------------------------------------- */
   /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_f32(S->pRfft, pInlineBuffer, pState);
+  arm_rfft_f32 (S->pRfft, pInlineBuffer, pState);
 
-        /*----------------------------------------------------------------------
-	 *  Step3: Multiply the FFT output with the weights.
-	 *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_f32(pState, weights, pState, S->N);
+  /*----------------------------------------------------------------------
+   *  Step3: Multiply the FFT output with the weights.
+   *----------------------------------------------------------------------*/
+  arm_cmplx_mult_cmplx_f32 (pState, weights, pState, S->N);
 
   /* ----------- Post-processing ---------- */
   /* DCT-IV can be obtained from DCT-II by the equation,
@@ -245,7 +246,7 @@
   /* Getting only real part from the output and Converting to DCT-IV */
 
   /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
-  i = ((uint32_t) S->N - 1U) >> 2U;
+  i = (S->N - 1U) >> 2U;
 
   /* pbuff initialized to input buffer. */
   pbuff = pInlineBuffer;
@@ -290,7 +291,7 @@
 
   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
    ** No loop unrolling is used. */
-  i = ((uint32_t) S->N - 1U) % 0x4U;
+  i = (S->N - 1U) % 0x4U;
 
   while (i > 0U)
   {
@@ -298,6 +299,7 @@
     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
     in = *pS1++ - in;
     *pbuff++ = in;
+
     /* points to the next real value */
     pS1++;
 
@@ -306,10 +308,10 @@
   }
 
 
-        /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
+  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
 
   /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = (uint32_t) S->N >> 2U;
+  i = S->N >> 2U;
 
   /* pbuff initialized to the pInlineBuffer(now contains the output values) */
   pbuff = pInlineBuffer;
@@ -337,10 +339,8 @@
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initializing the loop counter to N/2 */
-  i = (uint32_t) S->Nby2;
+  i = S->Nby2;
 
   do
   {
@@ -361,7 +361,7 @@
   pS1 = pState;
 
   /* Initializing the loop counter */
-  i = (uint32_t) S->N;
+  i = S->N;
 
   do
   {
@@ -377,12 +377,12 @@
    *     Step2: Calculate RFFT for N-point input
    * ---------------------------------------------------------- */
   /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_f32(S->pRfft, pInlineBuffer, pState);
+  arm_rfft_f32 (S->pRfft, pInlineBuffer, pState);
 
-        /*----------------------------------------------------------------------
-	 *  Step3: Multiply the FFT output with the weights.
-	 *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_f32(pState, weights, pState, S->N);
+  /*----------------------------------------------------------------------
+   *  Step3: Multiply the FFT output with the weights.
+   *----------------------------------------------------------------------*/
+  arm_cmplx_mult_cmplx_f32 (pState, weights, pState, S->N);
 
   /* ----------- Post-processing ---------- */
   /* DCT-IV can be obtained from DCT-II by the equation,
@@ -405,7 +405,7 @@
   pS1++;
 
   /* Initializing the loop counter */
-  i = ((uint32_t) S->N - 1U);
+  i = (S->N - 1U);
 
   do
   {
@@ -413,21 +413,20 @@
     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
     in = *pS1++ - in;
     *pbuff++ = in;
+
     /* points to the next real value */
     pS1++;
 
-
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
   } while (i > 0U);
 
+  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
 
-        /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
+  /* Initializing loop counter */
+  i = S->N;
 
-  /* Initializing the loop counter */
-  i = (uint32_t) S->N;
-
-  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
+  /* pbuff initialized to the pInlineBuffer (now contains the output values) */
   pbuff = pInlineBuffer;
 
   do
@@ -436,14 +435,14 @@
     in = *pbuff;
     *pbuff++ = in * S->normalize;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
   } while (i > 0U);
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
 }
 
 /**
-   * @} end of DCT4_IDCT4 group
-   */
+  @} end of DCT4_IDCT4 group
+ */
diff --git a/DSP/Source/TransformFunctions/arm_dct4_init_f32.c b/DSP/Source/TransformFunctions/arm_dct4_init_f32.c
index 9b39cd4..3fd70e9 100644
--- a/DSP/Source/TransformFunctions/arm_dct4_init_f32.c
+++ b/DSP/Source/TransformFunctions/arm_dct4_init_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_dct4_init_f32.c
  * Description:  Initialization function of DCT-4 & IDCT4 F32
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -27,16417 +27,35 @@
  */
 
 #include "arm_math.h"
+#include "arm_common_tables.h"
 
 /**
- * @ingroup DCT4_IDCT4
+  @ingroup DCT4_IDCT4
+ */
+
+
+/**
+  @addtogroup DCT4_IDCT4
+  @{
  */
 
 /**
- * @addtogroup DCT4_IDCT4_Table DCT Type IV Tables
- * @{
- */
+  @brief         Initialization function for the floating-point DCT4/IDCT4.
+  @param[in,out] S          points to an instance of floating-point DCT4/IDCT4 structure
+  @param[in]     S_RFFT     points to an instance of floating-point RFFT/RIFFT structure
+  @param[in]     S_CFFT     points to an instance of floating-point CFFT/CIFFT structure
+  @param[in]     N			length of the DCT4
+  @param[in]     Nby2       half of the length of the DCT4
+  @param[in]     normalize  normalizing factor.
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>N</code> is not a supported transform length
 
-/*
-* @brief  Weights Table
-*/
+  @par           Normalizing factor
+                   The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>.
+                   Floating-point normalizing factors are mentioned in the table below for different DCT sizes:
 
-/**
- * \par
- * Weights tables are generated using the formula : <pre>weights[n] = e^(-j*n*pi/(2*N))</pre>
- * \par
- * C command to generate the table
- * <pre>
- * for(i = 0; i< N; i++)
- * {
- *    weights[2*i]= cos(i*c);
- *    weights[(2*i)+1]= -sin(i * c);
- * } </pre>
- * \par
- * Where <code>N</code> is the Number of weights to be calculated and <code>c</code> is <code>pi/(2*N)</code>
- * \par
- * In the tables below the real and imaginary values are placed alternatively, hence the
- * array length is <code>2*N</code>.
- */
-
-static const float32_t Weights_128[256] = {
-  1.000000000000000000f, 0.000000000000000000f, 0.999924701839144500f,
-  -0.012271538285719925f,
-  0.999698818696204250f, -0.024541228522912288f, 0.999322384588349540f,
-  -0.036807222941358832f,
-  0.998795456205172410f, -0.049067674327418015f, 0.998118112900149180f,
-  -0.061320736302208578f,
-  0.997290456678690210f, -0.073564563599667426f, 0.996312612182778000f,
-  -0.085797312344439894f,
-  0.995184726672196930f, -0.098017140329560604f, 0.993906970002356060f,
-  -0.110222207293883060f,
-  0.992479534598709970f, -0.122410675199216200f, 0.990902635427780010f,
-  -0.134580708507126170f,
-  0.989176509964781010f, -0.146730474455361750f, 0.987301418157858430f,
-  -0.158858143333861450f,
-  0.985277642388941220f, -0.170961888760301220f, 0.983105487431216290f,
-  -0.183039887955140950f,
-  0.980785280403230430f, -0.195090322016128250f, 0.978317370719627650f,
-  -0.207111376192218560f,
-  0.975702130038528570f, -0.219101240156869800f, 0.972939952205560180f,
-  -0.231058108280671110f,
-  0.970031253194543970f, -0.242980179903263870f, 0.966976471044852070f,
-  -0.254865659604514570f,
-  0.963776065795439840f, -0.266712757474898370f, 0.960430519415565790f,
-  -0.278519689385053060f,
-  0.956940335732208820f, -0.290284677254462330f, 0.953306040354193860f,
-  -0.302005949319228080f,
-  0.949528180593036670f, -0.313681740398891520f, 0.945607325380521280f,
-  -0.325310292162262930f,
-  0.941544065183020810f, -0.336889853392220050f, 0.937339011912574960f,
-  -0.348418680249434560f,
-  0.932992798834738960f, -0.359895036534988110f, 0.928506080473215590f,
-  -0.371317193951837540f,
-  0.923879532511286740f, -0.382683432365089780f, 0.919113851690057770f,
-  -0.393992040061048100f,
-  0.914209755703530690f, -0.405241314004989860f, 0.909167983090522380f,
-  -0.416429560097637150f,
-  0.903989293123443340f, -0.427555093430282080f, 0.898674465693953820f,
-  -0.438616238538527660f,
-  0.893224301195515320f, -0.449611329654606540f, 0.887639620402853930f,
-  -0.460538710958240010f,
-  0.881921264348355050f, -0.471396736825997640f, 0.876070094195406600f,
-  -0.482183772079122720f,
-  0.870086991108711460f, -0.492898192229784040f, 0.863972856121586810f,
-  -0.503538383725717580f,
-  0.857728610000272120f, -0.514102744193221660f, 0.851355193105265200f,
-  -0.524589682678468950f,
-  0.844853565249707120f, -0.534997619887097150f, 0.838224705554838080f,
-  -0.545324988422046460f,
-  0.831469612302545240f, -0.555570233019602180f, 0.824589302785025290f,
-  -0.565731810783613120f,
-  0.817584813151583710f, -0.575808191417845340f, 0.810457198252594770f,
-  -0.585797857456438860f,
-  0.803207531480644940f, -0.595699304492433360f, 0.795836904608883570f,
-  -0.605511041404325550f,
-  0.788346427626606340f, -0.615231590580626820f, 0.780737228572094490f,
-  -0.624859488142386340f,
-  0.773010453362736990f, -0.634393284163645490f, 0.765167265622458960f,
-  -0.643831542889791390f,
-  0.757208846506484570f, -0.653172842953776760f, 0.749136394523459370f,
-  -0.662415777590171780f,
-  0.740951125354959110f, -0.671558954847018330f, 0.732654271672412820f,
-  -0.680600997795453020f,
-  0.724247082951467000f, -0.689540544737066830f, 0.715730825283818590f,
-  -0.698376249408972920f,
-  0.707106781186547570f, -0.707106781186547460f, 0.698376249408972920f,
-  -0.715730825283818590f,
-  0.689540544737066940f, -0.724247082951466890f, 0.680600997795453130f,
-  -0.732654271672412820f,
-  0.671558954847018330f, -0.740951125354959110f, 0.662415777590171780f,
-  -0.749136394523459260f,
-  0.653172842953776760f, -0.757208846506484460f, 0.643831542889791500f,
-  -0.765167265622458960f,
-  0.634393284163645490f, -0.773010453362736990f, 0.624859488142386450f,
-  -0.780737228572094380f,
-  0.615231590580626820f, -0.788346427626606230f, 0.605511041404325550f,
-  -0.795836904608883460f,
-  0.595699304492433470f, -0.803207531480644830f, 0.585797857456438860f,
-  -0.810457198252594770f,
-  0.575808191417845340f, -0.817584813151583710f, 0.565731810783613230f,
-  -0.824589302785025290f,
-  0.555570233019602290f, -0.831469612302545240f, 0.545324988422046460f,
-  -0.838224705554837970f,
-  0.534997619887097260f, -0.844853565249707010f, 0.524589682678468840f,
-  -0.851355193105265200f,
-  0.514102744193221660f, -0.857728610000272120f, 0.503538383725717580f,
-  -0.863972856121586700f,
-  0.492898192229784090f, -0.870086991108711350f, 0.482183772079122830f,
-  -0.876070094195406600f,
-  0.471396736825997810f, -0.881921264348354940f, 0.460538710958240010f,
-  -0.887639620402853930f,
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-static const float32_t Weights_2048[4096] = {
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-};
-
-/**
-* \par
-* cosFactor tables are generated using the formula : <pre>cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))</pre>
-* \par
-* C command to generate the table
-* \par
-* <pre> for(i = 0; i< N; i++)
-* {
-*    cos_factors[i]= 2 * cos((2*i+1)*c/2);
-* } </pre>
-* \par
-* where <code>N</code> is the number of factors to generate and <code>c</code> is <code>pi/(2*N)</code>
-*/
-static const float32_t cos_factors_128[128] = {
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-  0.995767414467659820f,
-  0.994564570734255420f, 0.993211949234794500f, 0.991709753669099530f,
-  0.990058210262297120f,
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-  0.958703474895871600f,
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-  0.943593458161960390f,
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-  0.926210242138311380f,
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-  0.906595704514915330f,
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-  0.884797098430937790f,
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-  0.860866938637767310f,
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-  0.834862874986380010f,
-  0.828045045257755800f, 0.821102514991104650f, 0.814036329705948410f,
-  0.806847553543799330f,
-  0.799537269107905010f, 0.792106577300212390f, 0.784556597155575240f,
-  0.776888465673232440f,
-  0.769103337645579700f, 0.761202385484261780f, 0.753186799043612520f,
-  0.745057785441466060f,
-  0.736816568877369900f, 0.728464390448225200f, 0.720002507961381650f,
-  0.711432195745216430f,
-  0.702754744457225300f, 0.693971460889654000f, 0.685083667772700360f,
-  0.676092703575316030f,
-  0.666999922303637470f, 0.657806693297078640f, 0.648514401022112550f,
-  0.639124444863775730f,
-  0.629638238914927100f, 0.620057211763289210f, 0.610382806276309480f,
-  0.600616479383868970f,
-  0.590759701858874280f, 0.580813958095764530f, 0.570780745886967370f,
-  0.560661576197336030f,
-  0.550457972936604810f, 0.540171472729892970f, 0.529803624686294830f,
-  0.519355990165589530f,
-  0.508830142543106990f, 0.498227666972781870f, 0.487550160148436050f,
-  0.476799230063322250f,
-  0.465976495767966130f, 0.455083587126343840f, 0.444122144570429260f,
-  0.433093818853152010f,
-  0.422000270799799790f, 0.410843171057903910f, 0.399624199845646790f,
-  0.388345046698826300f,
-  0.377007410216418310f, 0.365612997804773960f, 0.354163525420490510f,
-  0.342660717311994380f,
-  0.331106305759876430f, 0.319502030816015750f, 0.307849640041534980f,
-  0.296150888243623960f,
-  0.284407537211271820f, 0.272621355449948980f, 0.260794117915275570f,
-  0.248927605745720260f,
-  0.237023605994367340f, 0.225083911359792780f, 0.213110319916091360f,
-  0.201104634842091960f,
-  0.189068664149806280f, 0.177004220412148860f, 0.164913120489970090f,
-  0.152797185258443410f,
-  0.140658239332849240f, 0.128498110793793220f, 0.116318630911904880f,
-  0.104121633872054730f,
-  0.091908956497132696f, 0.079682437971430126f, 0.067443919563664106f,
-  0.055195244349690031f,
-  0.042938256934940959f, 0.030674803176636581f, 0.018406729905804820f,
-  0.006135884649154515f
-};
-
-static const float32_t cos_factors_512[512] = {
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-  0.999942349676023910f,
-  0.999904701082852900f, 0.999857641005823860f, 0.999801169887884260f,
-  0.999735288260561680f,
-  0.999659996743959220f, 0.999575296046749220f, 0.999481186966166950f,
-  0.999377670388002850f,
-  0.999264747286594420f, 0.999142418724816910f, 0.999010685854073380f,
-  0.998869549914283560f,
-  0.998719012233872940f, 0.998559074229759310f, 0.998389737407340160f,
-  0.998211003360478190f,
-  0.998022873771486240f, 0.997825350411111640f, 0.997618435138519550f,
-  0.997402129901275300f,
-  0.997176436735326190f, 0.996941357764982160f, 0.996696895202896060f,
-  0.996443051350042630f,
-  0.996179828595696980f, 0.995907229417411720f, 0.995625256380994310f,
-  0.995333912140482280f,
-  0.995033199438118630f, 0.994723121104325700f, 0.994403680057679100f,
-  0.994074879304879370f,
-  0.993736721940724600f, 0.993389211148080650f, 0.993032350197851410f,
-  0.992666142448948020f,
-  0.992290591348257370f, 0.991905700430609330f, 0.991511473318743900f,
-  0.991107913723276890f,
-  0.990695025442664630f, 0.990272812363169110f, 0.989841278458820530f,
-  0.989400427791380380f,
-  0.988950264510302990f, 0.988490792852696590f, 0.988022017143283530f,
-  0.987543941794359230f,
-  0.987056571305750970f, 0.986559910264775410f, 0.986053963346195440f,
-  0.985538735312176060f,
-  0.985014231012239840f, 0.984480455383220930f, 0.983937413449218920f,
-  0.983385110321551180f,
-  0.982823551198705240f, 0.982252741366289370f, 0.981672686196983110f,
-  0.981083391150486710f,
-  0.980484861773469380f, 0.979877103699517640f, 0.979260122649082020f,
-  0.978633924429423210f,
-  0.977998514934557140f, 0.977353900145199960f, 0.976700086128711840f,
-  0.976037079039039020f,
-  0.975364885116656980f, 0.974683510688510670f, 0.973992962167955830f,
-  0.973293246054698250f,
-  0.972584368934732210f, 0.971866337480279400f, 0.971139158449725090f,
-  0.970402838687555500f,
-  0.969657385124292450f, 0.968902804776428870f, 0.968139104746362440f,
-  0.967366292222328510f,
-  0.966584374478333120f, 0.965793358874083680f, 0.964993252854920320f,
-  0.964184063951745830f,
-  0.963365799780954050f, 0.962538468044359160f, 0.961702076529122540f,
-  0.960856633107679660f,
-  0.960002145737665960f, 0.959138622461841890f, 0.958266071408017670f,
-  0.957384500788975860f,
-  0.956493918902395100f, 0.955594334130771110f, 0.954685754941338340f,
-  0.953768189885990330f,
-  0.952841647601198720f, 0.951906136807932350f, 0.950961666311575080f,
-  0.950008245001843000f,
-  0.949045881852700560f, 0.948074585922276230f, 0.947094366352777220f,
-  0.946105232370403450f,
-  0.945107193285260610f, 0.944100258491272660f, 0.943084437466093490f,
-  0.942059739771017310f,
-  0.941026175050889260f, 0.939983753034014050f, 0.938932483532064600f,
-  0.937872376439989890f,
-  0.936803441735921560f, 0.935725689481080370f, 0.934639129819680780f,
-  0.933543772978836170f,
-  0.932439629268462360f, 0.931326709081180430f, 0.930205022892219070f,
-  0.929074581259315860f,
-  0.927935394822617890f, 0.926787474304581750f, 0.925630830509872720f,
-  0.924465474325262600f,
-  0.923291416719527640f, 0.922108668743345180f, 0.920917241529189520f,
-  0.919717146291227360f,
-  0.918508394325212250f, 0.917290997008377910f, 0.916064965799331720f,
-  0.914830312237946200f,
-  0.913587047945250810f, 0.912335184623322750f, 0.911074734055176360f,
-  0.909805708104652220f,
-  0.908528118716306120f, 0.907241977915295820f, 0.905947297807268460f,
-  0.904644090578246240f,
-  0.903332368494511820f, 0.902012143902493180f, 0.900683429228646970f,
-  0.899346236979341570f,
-  0.898000579740739880f, 0.896646470178680150f, 0.895283921038557580f,
-  0.893912945145203250f,
-  0.892533555402764580f, 0.891145764794583180f, 0.889749586383072780f,
-  0.888345033309596350f,
-  0.886932118794342190f, 0.885510856136199950f, 0.884081258712634990f,
-  0.882643339979562790f,
-  0.881197113471222090f, 0.879742592800047410f, 0.878279791656541580f,
-  0.876808723809145650f,
-  0.875329403104110890f, 0.873841843465366860f, 0.872346058894391540f,
-  0.870842063470078980f,
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-  0.864744257519462380f,
-  0.863199421712124160f, 0.861646461143081300f, 0.860085390429390140f,
-  0.858516224264442740f,
-  0.856938977417828760f, 0.855353664735196030f, 0.853760301138111410f,
-  0.852158901623919830f,
-  0.850549481265603480f, 0.848932055211639610f, 0.847306638685858320f,
-  0.845673246987299070f,
-  0.844031895490066410f, 0.842382599643185850f, 0.840725374970458070f,
-  0.839060237070312740f,
-  0.837387201615661940f, 0.835706284353752600f, 0.834017501106018130f,
-  0.832320867767929680f,
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-  0.825456154004377550f,
-  0.823720511227391430f, 0.821977115279241550f, 0.820225982569434690f,
-  0.818467129580298660f,
-  0.816700572866827850f, 0.814926329056526620f, 0.813144414849253590f,
-  0.811354847017063730f,
-  0.809557642404051260f, 0.807752817926190360f, 0.805940390571176280f,
-  0.804120377398265810f,
-  0.802292795538115720f, 0.800457662192622820f, 0.798614994634760820f,
-  0.796764810208418830f,
-  0.794907126328237010f, 0.793041960479443640f, 0.791169330217690200f,
-  0.789289253168885650f,
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-  0.781694832071059390f,
-  0.779777787923014550f, 0.777853404209453150f, 0.775921699043407690f,
-  0.773982690606822900f,
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-  0.766153990196312920f,
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-  0.758209909813015280f,
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-  0.708190637033195400f,
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-  0.699473344640283770f,
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-  0.690650714134534720f,
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-  0.681724074171649820f,
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-  0.663564158612039880f,
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-  0.645004536815544040f,
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-  0.635578320488556230f,
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-  0.616440174530853650f,
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-  0.577061672855679550f,
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-  0.566996048825108680f,
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-  0.556845037275160100f,
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-  0.546610166910834860f,
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-  0.133060525157139180f, 0.130019222722233350f, 0.126976696496885980f,
-  0.123932975118512200f,
-  0.120888087235777220f, 0.117842061508325020f, 0.114794926606510250f,
-  0.111746711211126660f,
-  0.108697444013138670f, 0.105647153713410700f, 0.102595869022436280f,
-  0.099543618660069444f,
-  0.096490431355252607f, 0.093436335845747912f, 0.090381360877865011f,
-  0.087325535206192226f,
-  0.084268887593324127f, 0.081211446809592386f, 0.078153241632794315f,
-  0.075094300847921291f,
-  0.072034653246889416f, 0.068974327628266732f, 0.065913352797003930f,
-  0.062851757564161420f,
-  0.059789570746640007f, 0.056726821166907783f, 0.053663537652730679f,
-  0.050599749036899337f,
-  0.047535484156959261f, 0.044470771854938744f, 0.041405640977076712f,
-  0.038340120373552791f,
-  0.035274238898213947f, 0.032208025408304704f, 0.029141508764193740f,
-  0.026074717829104040f,
-  0.023007681468839410f, 0.019940428551514598f, 0.016872987947281773f,
-  0.013805388528060349f,
-  0.010737659167264572f, 0.007669828739531077f, 0.004601926120448672f,
-  0.001533980186284766f
-};
-
-static const float32_t cos_factors_2048[2048] = {
-  0.999999926465717890f, 0.999999338191525530f, 0.999998161643486980f,
-  0.999996396822294350f,
-  0.999994043728985820f, 0.999991102364945590f, 0.999987572731904080f,
-  0.999983454831937730f,
-  0.999978748667468830f, 0.999973454241265940f, 0.999967571556443780f,
-  0.999961100616462820f,
-  0.999954041425129780f, 0.999946393986597460f, 0.999938158305364590f,
-  0.999929334386276070f,
-  0.999919922234522750f, 0.999909921855641540f, 0.999899333255515390f,
-  0.999888156440373320f,
-  0.999876391416790410f, 0.999864038191687680f, 0.999851096772332190f,
-  0.999837567166337090f,
-  0.999823449381661570f, 0.999808743426610520f, 0.999793449309835270f,
-  0.999777567040332940f,
-  0.999761096627446610f, 0.999744038080865430f, 0.999726391410624470f,
-  0.999708156627104880f,
-  0.999689333741033640f, 0.999669922763483760f, 0.999649923705874240f,
-  0.999629336579970110f,
-  0.999608161397882110f, 0.999586398172067070f, 0.999564046915327740f,
-  0.999541107640812940f,
-  0.999517580362016990f, 0.999493465092780590f, 0.999468761847290050f,
-  0.999443470640077770f,
-  0.999417591486021720f, 0.999391124400346050f, 0.999364069398620550f,
-  0.999336426496761240f,
-  0.999308195711029470f, 0.999279377058032710f, 0.999249970554724420f,
-  0.999219976218403530f,
-  0.999189394066714920f, 0.999158224117649430f, 0.999126466389543390f,
-  0.999094120901079070f,
-  0.999061187671284600f, 0.999027666719533690f, 0.998993558065545680f,
-  0.998958861729386080f,
-  0.998923577731465780f, 0.998887706092541290f, 0.998851246833715180f,
-  0.998814199976435390f,
-  0.998776565542495610f, 0.998738343554035230f, 0.998699534033539280f,
-  0.998660137003838490f,
-  0.998620152488108870f, 0.998579580509872500f, 0.998538421092996730f,
-  0.998496674261694640f,
-  0.998454340040524800f, 0.998411418454391300f, 0.998367909528543820f,
-  0.998323813288577560f,
-  0.998279129760433200f, 0.998233858970396850f, 0.998188000945100300f,
-  0.998141555711520520f,
-  0.998094523296980010f, 0.998046903729146840f, 0.997998697036034390f,
-  0.997949903246001190f,
-  0.997900522387751620f, 0.997850554490335110f, 0.997799999583146470f,
-  0.997748857695925690f,
-  0.997697128858758500f, 0.997644813102075420f, 0.997591910456652630f,
-  0.997538420953611340f,
-  0.997484344624417930f, 0.997429681500884180f, 0.997374431615167150f,
-  0.997318594999768600f,
-  0.997262171687536170f, 0.997205161711661850f, 0.997147565105683480f,
-  0.997089381903483400f,
-  0.997030612139289450f, 0.996971255847674320f, 0.996911313063555740f,
-  0.996850783822196610f,
-  0.996789668159204560f, 0.996727966110532490f, 0.996665677712478160f,
-  0.996602803001684130f,
-  0.996539342015137940f, 0.996475294790172160f, 0.996410661364464100f,
-  0.996345441776035900f,
-  0.996279636063254650f, 0.996213244264832040f, 0.996146266419824620f,
-  0.996078702567633980f,
-  0.996010552748005870f, 0.995941817001031350f, 0.995872495367145730f,
-  0.995802587887129160f,
-  0.995732094602106430f, 0.995661015553546910f, 0.995589350783264600f,
-  0.995517100333418110f,
-  0.995444264246510340f, 0.995370842565388990f, 0.995296835333246090f,
-  0.995222242593618360f,
-  0.995147064390386470f, 0.995071300767776170f, 0.994994951770357020f,
-  0.994918017443043200f,
-  0.994840497831093180f, 0.994762392980109930f, 0.994683702936040250f,
-  0.994604427745175660f,
-  0.994524567454151740f, 0.994444122109948040f, 0.994363091759888570f,
-  0.994281476451641550f,
-  0.994199276233218910f, 0.994116491152977070f, 0.994033121259616400f,
-  0.993949166602181130f,
-  0.993864627230059750f, 0.993779503192984580f, 0.993693794541031790f,
-  0.993607501324621610f,
-  0.993520623594518090f, 0.993433161401829360f, 0.993345114798006910f,
-  0.993256483834846440f,
-  0.993167268564487230f, 0.993077469039412300f, 0.992987085312448390f,
-  0.992896117436765980f,
-  0.992804565465879140f, 0.992712429453645460f, 0.992619709454266140f,
-  0.992526405522286100f,
-  0.992432517712593660f, 0.992338046080420420f, 0.992242990681341700f,
-  0.992147351571276090f,
-  0.992051128806485720f, 0.991954322443575950f, 0.991856932539495470f,
-  0.991758959151536110f,
-  0.991660402337333210f, 0.991561262154865290f, 0.991461538662453790f,
-  0.991361231918763460f,
-  0.991260341982802440f, 0.991158868913921350f, 0.991056812771814340f,
-  0.990954173616518500f,
-  0.990850951508413620f, 0.990747146508222710f, 0.990642758677011570f,
-  0.990537788076188750f,
-  0.990432234767505970f, 0.990326098813057330f, 0.990219380275280000f,
-  0.990112079216953770f,
-  0.990004195701200910f, 0.989895729791486660f, 0.989786681551618640f,
-  0.989677051045747210f,
-  0.989566838338365120f, 0.989456043494307710f, 0.989344666578752640f,
-  0.989232707657220050f,
-  0.989120166795572690f, 0.989007044060015270f, 0.988893339517095130f,
-  0.988779053233701520f,
-  0.988664185277066230f, 0.988548735714763200f, 0.988432704614708340f,
-  0.988316092045159690f,
-  0.988198898074717610f, 0.988081122772324070f, 0.987962766207263420f,
-  0.987843828449161740f,
-  0.987724309567986960f, 0.987604209634049160f, 0.987483528717999710f,
-  0.987362266890832400f,
-  0.987240424223882250f, 0.987118000788826280f, 0.986994996657682980f,
-  0.986871411902812470f,
-  0.986747246596916590f, 0.986622500813038480f, 0.986497174624562880f,
-  0.986371268105216030f,
-  0.986244781329065460f, 0.986117714370520090f, 0.985990067304330140f,
-  0.985861840205586980f,
-  0.985733033149723490f, 0.985603646212513400f, 0.985473679470071810f,
-  0.985343132998854790f,
-  0.985212006875659350f, 0.985080301177623800f, 0.984948015982227030f,
-  0.984815151367289140f,
-  0.984681707410970940f, 0.984547684191773960f, 0.984413081788540700f,
-  0.984277900280454370f,
-  0.984142139747038570f, 0.984005800268157870f, 0.983868881924017220f,
-  0.983731384795162090f,
-  0.983593308962478650f, 0.983454654507193270f, 0.983315421510872810f,
-  0.983175610055424420f,
-  0.983035220223095640f, 0.982894252096474070f, 0.982752705758487830f,
-  0.982610581292404750f,
-  0.982467878781833170f, 0.982324598310721280f, 0.982180739963357090f,
-  0.982036303824369020f,
-  0.981891289978725100f, 0.981745698511732990f, 0.981599529509040720f,
-  0.981452783056635520f,
-  0.981305459240844670f, 0.981157558148334830f, 0.981009079866112630f,
-  0.980860024481523870f,
-  0.980710392082253970f, 0.980560182756327840f, 0.980409396592109910f,
-  0.980258033678303550f,
-  0.980106094103951770f, 0.979953577958436740f, 0.979800485331479790f,
-  0.979646816313141210f,
-  0.979492570993820810f, 0.979337749464256780f, 0.979182351815526930f,
-  0.979026378139047580f,
-  0.978869828526574120f, 0.978712703070200420f, 0.978555001862359550f,
-  0.978396724995823090f,
-  0.978237872563701090f, 0.978078444659442380f, 0.977918441376834370f,
-  0.977757862810002760f,
-  0.977596709053411890f, 0.977434980201864260f, 0.977272676350500860f,
-  0.977109797594800880f,
-  0.976946344030581670f, 0.976782315753998650f, 0.976617712861545640f,
-  0.976452535450054060f,
-  0.976286783616693630f, 0.976120457458971910f, 0.975953557074734300f,
-  0.975786082562163930f,
-  0.975618034019781750f, 0.975449411546446380f, 0.975280215241354220f,
-  0.975110445204038890f,
-  0.974940101534371830f, 0.974769184332561770f, 0.974597693699155050f,
-  0.974425629735034990f,
-  0.974252992541422500f, 0.974079782219875680f, 0.973905998872289570f,
-  0.973731642600896400f,
-  0.973556713508265560f, 0.973381211697303290f, 0.973205137271252800f,
-  0.973028490333694210f,
-  0.972851270988544180f, 0.972673479340056430f, 0.972495115492821190f,
-  0.972316179551765300f,
-  0.972136671622152230f, 0.971956591809581720f, 0.971775940219990140f,
-  0.971594716959650160f,
-  0.971412922135170940f, 0.971230555853497380f, 0.971047618221911100f,
-  0.970864109348029470f,
-  0.970680029339806130f, 0.970495378305530560f, 0.970310156353828110f,
-  0.970124363593660280f,
-  0.969938000134323960f, 0.969751066085452140f, 0.969563561557013180f,
-  0.969375486659311280f,
-  0.969186841502985950f, 0.968997626199012420f, 0.968807840858700970f,
-  0.968617485593697540f,
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-  0.967850367531413620f,
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-  0.967074139692867040f,
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-  0.966288809384209690f,
-  0.966091055410438830f, 0.965892733110190860f, 0.965693842600133690f,
-  0.965494383997269500f,
-  0.965294357418934660f, 0.965093762982799590f, 0.964892600806868890f,
-  0.964690871009481030f,
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-  0.963878277983814200f,
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-  0.963056612568704340f,
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-  0.962225882497979020f,
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-  0.961386095590786250f,
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-  0.960537259751520050f,
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-  0.959679382969746750f,
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-  0.958812473320129310f,
-  0.958594335476470220f, 0.958375633716461170f, 0.958156368168758820f,
-  0.957936538962351420f,
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-  0.957051588141040970f,
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-  0.956157629185692140f,
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-  0.955254670510586990f,
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-  0.954342720614716480f,
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-  0.953421788081700310f,
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-  0.952491881579706320f,
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-  0.947708048828952100f,
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-  0.946724485268921170f,
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-  0.945732010777477150f,
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-  0.944730634696167800f,
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-  0.943720366450326200f,
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-  0.942701215548981900f,
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-  0.941673191584771360f,
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-  0.939590563255789270f,
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-  0.915602980523320230f,
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-  0.095345250425617742f,
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-  0.073947014280897269f,
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-  0.064765325740339871f,
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-  0.061703505285957416f,
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-  0.058641104054683348f,
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-  0.055578150871004817f,
-  0.054812329710889909f, 0.054046476306093640f, 0.053280591107148056f,
-  0.052514674564603257f,
-  0.051748727129028414f, 0.050982749251010900f, 0.050216741381155325f,
-  0.049450703970084824f,
-  0.048684637468439020f, 0.047918542326875327f, 0.047152418996068000f,
-  0.046386267926707213f,
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-  0.043321395278109784f,
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-  0.040256114872041358f,
-  0.039489734439384118f, 0.038723330775933762f, 0.037956904332545366f,
-  0.037190455560088091f,
-  0.036423984909444228f, 0.035657492831508264f, 0.034890979777187955f,
-  0.034124446197403423f,
-  0.033357892543086159f, 0.032591319265180385f, 0.031824726814640963f,
-  0.031058115642434700f,
-  0.030291486199539423f, 0.029524838936943035f, 0.028758174305644590f,
-  0.027991492756653365f,
-  0.027224794740987910f, 0.026458080709677145f, 0.025691351113759395f,
-  0.024924606404281485f,
-  0.024157847032300020f, 0.023391073448879338f, 0.022624286105092803f,
-  0.021857485452021874f,
-  0.021090671940755180f, 0.020323846022389572f, 0.019557008148029204f,
-  0.018790158768784596f,
-  0.018023298335773701f, 0.017256427300120978f, 0.016489546112956454f,
-  0.015722655225417017f,
-  0.014955755088644378f, 0.014188846153786343f, 0.013421928871995907f,
-  0.012655003694430301f,
-  0.011888071072252072f, 0.011121131456628141f, 0.010354185298728884f,
-  0.009587233049729183f,
-  0.008820275160807512f, 0.008053312083144991f, 0.007286344267926684f,
-  0.006519372166339549f,
-  0.005752396229573737f, 0.004985416908821652f, 0.004218434655277024f,
-  0.003451449920135975f,
-  0.002684463154596083f, 0.001917474809855460f, 0.001150485337113809f,
-  0.000383495187571497f
-};
-
-static const float32_t cos_factors_8192[8192] = {
-  1.999999990808214700f, 1.999999917273932200f, 1.999999770205369800f,
-    1.999999549602533100f,
-  1.999999255465430200f, 1.999998887794072000f, 1.999998446588471700f,
-    1.999997931848645600f,
-  1.999997343574612800f, 1.999996681766395000f, 1.999995946424016200f,
-    1.999995137547503600f,
-  1.999994255136887000f, 1.999993299192198700f, 1.999992269713474200f,
-    1.999991166700750800f,
-  1.999989990154069600f, 1.999988740073473500f, 1.999987416459008600f,
-    1.999986019310723500f,
-  1.999984548628669600f, 1.999983004412901000f, 1.999981386663474400f,
-    1.999979695380449400f,
-  1.999977930563888100f, 1.999976092213855400f, 1.999974180330418700f,
-    1.999972194913648900f,
-  1.999970135963618400f, 1.999968003480403000f, 1.999965797464081200f,
-    1.999963517914734100f,
-  1.999961164832445800f, 1.999958738217302300f, 1.999956238069392900f,
-    1.999953664388809800f,
-  1.999951017175647600f, 1.999948296430003500f, 1.999945502151977600f,
-    1.999942634341672600f,
-  1.999939692999193900f, 1.999936678124649700f, 1.999933589718150700f,
-    1.999930427779810900f,
-  1.999927192309745900f, 1.999923883308075200f, 1.999920500774920300f,
-    1.999917044710405500f,
-  1.999913515114657900f, 1.999909911987807200f, 1.999906235329986100f,
-    1.999902485141329400f,
-  1.999898661421975400f, 1.999894764172064600f, 1.999890793391740000f,
-    1.999886749081147800f,
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-    1.999869836539117700f,
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-    1.999851747525188200f,
-  1.999847041449203300f, 1.999842261844559700f, 1.999837408711432600f,
-    1.999832482050000900f,
-  1.999827481860445300f, 1.999822408142949900f, 1.999817260897701400f,
-    1.999812040124888700f,
-  1.999806745824704000f, 1.999801377997341800f, 1.999795936642999600f,
-    1.999790421761877400f,
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-    1.999767626973684400f,
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-    1.999743655773719400f,
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-    1.999718508176084000f,
-  1.999712037466257600f, 1.999705493232735800f, 1.999698875475759600f,
-    1.999692184195571900f,
-  1.999685419392419000f, 1.999678581066549400f, 1.999671669218214600f,
-    1.999664683847668800f,
-  1.999657624955168700f, 1.999650492540973900f, 1.999643286605346800f,
-    1.999636007148552400f,
-  1.999628654170857900f, 1.999621227672533800f, 1.999613727653853500f,
-    1.999606154115092500f,
-  1.999598507056529000f, 1.999590786478444600f, 1.999582992381123000f,
-    1.999575124764850800f,
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-    1.999542919116081000f,
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-    1.999509537187729200f,
-  1.999501007914242600f, 1.999492405124819700f, 1.999483728819776900f,
-    1.999474978999432800f,
-  1.999466155664109600f, 1.999457258814131500f, 1.999448288449825500f,
-    1.999439244571521700f,
-  1.999430127179552500f, 1.999420936274252800f, 1.999411671855960900f,
-    1.999402333925017300f,
-  1.999392922481765500f, 1.999383437526551300f, 1.999373879059723500f,
-    1.999364247081633500f,
-  1.999354541592635500f, 1.999344762593086500f, 1.999334910083345700f,
-    1.999324984063775700f,
-  1.999314984534741100f, 1.999304911496609700f, 1.999294764949752100f,
-    1.999284544894541100f,
-  1.999274251331352400f, 1.999263884260564600f, 1.999253443682558900f,
-    1.999242929597719200f,
-  1.999232342006432000f, 1.999221680909086400f, 1.999210946306074500f,
-    1.999200138197791100f,
-  1.999189256584633600f, 1.999178301467001900f, 1.999167272845298900f,
-    1.999156170719930100f,
-  1.999144995091303600f, 1.999133745959830600f, 1.999122423325924200f,
-    1.999111027190001000f,
-  1.999099557552479900f, 1.999088014413782800f, 1.999076397774334000f,
-    1.999064707634560700f,
-  1.999052943994892300f, 1.999041106855761900f, 1.999029196217604100f,
-    1.999017212080857400f,
-  1.999005154445962200f, 1.998993023313361700f, 1.998980818683502100f,
-    1.998968540556831800f,
-  1.998956188933802800f, 1.998943763814868800f, 1.998931265200486900f,
-    1.998918693091116200f,
-  1.998906047487219600f, 1.998893328389261400f, 1.998880535797709700f,
-    1.998867669713034500f,
-  1.998854730135709400f, 1.998841717066209400f, 1.998828630505013400f,
-    1.998815470452602400f,
-  1.998802236909460500f, 1.998788929876074100f, 1.998775549352932400f,
-    1.998762095340527400f,
-  1.998748567839354000f, 1.998734966849909000f, 1.998721292372693100f,
-    1.998707544408208700f,
-  1.998693722956961500f, 1.998679828019459300f, 1.998665859596213500f,
-    1.998651817687737300f,
-  1.998637702294547000f, 1.998623513417161700f, 1.998609251056103100f,
-    1.998594915211895600f,
-  1.998580505885066100f, 1.998566023076144600f, 1.998551466785663400f,
-    1.998536837014157900f,
-  1.998522133762165900f, 1.998507357030227900f, 1.998492506818887200f,
-    1.998477583128690100f,
-  1.998462585960185000f, 1.998447515313923400f, 1.998432371190459500f,
-    1.998417153590349900f,
-  1.998401862514154200f, 1.998386497962434800f, 1.998371059935756300f,
-    1.998355548434686400f,
-  1.998339963459795400f, 1.998324305011656600f, 1.998308573090845200f,
-    1.998292767697940100f,
-  1.998276888833522300f, 1.998260936498175400f, 1.998244910692486000f,
-    1.998228811417043700f,
-  1.998212638672439900f, 1.998196392459269400f, 1.998180072778129600f,
-    1.998163679629620500f,
-  1.998147213014344900f, 1.998130672932908000f, 1.998114059385918400f,
-    1.998097372373986300f,
-  1.998080611897725700f, 1.998063777957752600f, 1.998046870554686100f,
-    1.998029889689147700f,
-  1.998012835361761900f, 1.997995707573155600f, 1.997978506323958600f,
-    1.997961231614803200f,
-  1.997943883446324800f, 1.997926461819161000f, 1.997908966733952500f,
-    1.997891398191342400f,
-  1.997873756191977000f, 1.997856040736504500f, 1.997838251825576400f,
-    1.997820389459846700f,
-  1.997802453639972300f, 1.997784444366612600f, 1.997766361640429800f,
-    1.997748205462088500f,
-  1.997729975832256600f, 1.997711672751604200f, 1.997693296220804000f,
-    1.997674846240532000f,
-  1.997656322811466500f, 1.997637725934288300f, 1.997619055609681600f,
-    1.997600311838332500f,
-  1.997581494620930300f, 1.997562603958166600f, 1.997543639850736200f,
-    1.997524602299336500f,
-  1.997505491304667000f, 1.997486306867430900f, 1.997467048988333000f,
-    1.997447717668082000f,
-  1.997428312907388200f, 1.997408834706965000f, 1.997389283067528800f,
-    1.997369657989798400f,
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-  0.088749985401530951f, 0.088366866339286629f, 0.087983744028044805f,
-    0.087600618481892656f,
-  0.087217489714916191f, 0.086834357741201490f, 0.086451222574836131f,
-    0.086068084229906014f,
-  0.085684942720498897f, 0.085301798060701386f, 0.084918650264600160f,
-    0.084535499346283349f,
-  0.084152345319837438f, 0.083769188199350780f, 0.083386027998910095f,
-    0.083002864732603973f,
-  0.082619698414519799f, 0.082236529058745025f, 0.081853356679368619f,
-    0.081470181290477811f,
-  0.081087002906161790f, 0.080703821540508452f, 0.080320637207605849f,
-    0.079937449921543474f,
-  0.079554259696409127f, 0.079171066546292510f, 0.078787870485282088f,
-    0.078404671527466441f,
-  0.078021469686935602f, 0.077638264977777913f, 0.077255057414083589f,
-    0.076871847009941652f,
-  0.076488633779441206f, 0.076105417736672773f, 0.075722198895725248f,
-    0.075338977270689375f,
-  0.074955752875654230f, 0.074572525724710764f, 0.074189295831948693f,
-    0.073806063211457842f,
-  0.073422827877329483f, 0.073039589843653177f, 0.072656349124520389f,
-    0.072273105734021334f,
-  0.071889859686246352f, 0.071506610995287156f, 0.071123359675233852f,
-    0.070740105740178361f,
-  0.070356849204211397f, 0.069973590081423773f, 0.069590328385907715f,
-    0.069207064131753759f,
-  0.068823797333054326f, 0.068440528003900616f, 0.068057256158383886f,
-    0.067673981810596848f,
-  0.067290704974630494f, 0.066907425664577733f, 0.066524143894529736f,
-    0.066140859678579578f,
-  0.065757573030819083f, 0.065374283965340146f, 0.064990992496236119f,
-    0.064607698637598646f,
-  0.064224402403521202f, 0.063841103808096086f, 0.063457802865415636f,
-    0.063074499589573618f,
-  0.062691193994662109f, 0.062307886094775049f, 0.061924575904005130f,
-    0.061541263436445129f,
-  0.061157948706189229f, 0.060774631727329942f, 0.060391312513961619f,
-    0.060007991080177375f,
-  0.059624667440070382f, 0.059241341607735261f, 0.058858013597264912f,
-    0.058474683422754095f,
-  0.058091351098295878f, 0.057708016637985186f, 0.057324680055915692f,
-    0.056941341366181127f,
-  0.056558000582876661f, 0.056174657720095743f, 0.055791312791933681f,
-    0.055407965812484541f,
-  0.055024616795842439f, 0.054641265756102911f, 0.054257912707359794f,
-    0.053874557663708772f,
-  0.053491200639244271f, 0.053107841648060788f, 0.052724480704254229f,
-    0.052341117821918783f,
-  0.051957753015150501f, 0.051574386298044173f, 0.051191017684694640f,
-    0.050807647189198162f,
-  0.050424274825649297f, 0.050040900608144430f, 0.049657524550778251f,
-    0.049274146667647289f,
-  0.048890766972846805f, 0.048507385480472134f, 0.048124002204620014f,
-    0.047740617159385448f,
-  0.047357230358865306f, 0.046973841817155179f, 0.046590451548350717f,
-    0.046207059566548990f,
-  0.045823665885845313f, 0.045440270520336883f, 0.045056873484119603f,
-    0.044673474791289434f,
-  0.044290074455943754f, 0.043906672492178188f, 0.043523268914090238f,
-    0.043139863735776100f,
-  0.042756456971332048f, 0.042373048634855741f, 0.041989638740443119f,
-    0.041606227302191955f,
-  0.041222814334198304f, 0.040839399850560058f, 0.040455983865373815f,
-    0.040072566392736257f,
-  0.039689147446745419f, 0.039305727041497644f, 0.038922305191091085f,
-    0.038538881909622631f,
-  0.038155457211189216f, 0.037772031109889144f, 0.037388603619819022f,
-    0.037005174755077273f,
-  0.036621744529761024f, 0.036238312957967478f, 0.035854880053795196f,
-    0.035471445831341021f,
-  0.035088010304703626f, 0.034704573487980395f, 0.034321135395268765f,
-    0.033937696040667535f,
-  0.033554255438273790f, 0.033170813602186440f, 0.032787370546502645f,
-    0.032403926285321405f,
-  0.032020480832740429f, 0.031637034202857461f, 0.031253586409771626f,
-    0.030870137467580314f,
-  0.030486687390382738f, 0.030103236192276818f, 0.029719783887360508f,
-    0.029336330489733147f,
-  0.028952876013492331f, 0.028569420472737472f, 0.028185963881566689f,
-    0.027802506254078142f,
-  0.027419047604371360f, 0.027035587946544135f, 0.026652127294696067f,
-    0.026268665662925468f,
-  0.025885203065330677f, 0.025501739516011413f, 0.025118275029065638f,
-    0.024734809618593138f,
-  0.024351343298691951f, 0.023967876083461924f, 0.023584407987001611f,
-    0.023200939023409587f,
-  0.022817469206785804f, 0.022433998551228459f, 0.022050527070837558f,
-    0.021667054779711814f,
-  0.021283581691949955f, 0.020900107821652084f, 0.020516633182916549f,
-    0.020133157789843505f,
-  0.019749681656531803f, 0.019366204797080316f, 0.018982727225589285f,
-    0.018599248956157190f,
-  0.018215770002884327f, 0.017832290379869671f, 0.017448810101212228f,
-    0.017065329181012358f,
-  0.016681847633368677f, 0.016298365472381587f, 0.015914882712149747f,
-    0.015531399366773606f,
-  0.015147915450352307f, 0.014764430976985016f, 0.014380945960772247f,
-    0.013997460415812761f,
-  0.013613974356207112f, 0.013230487796054543f, 0.012847000749454314f,
-    0.012463513230507034f,
-  0.012080025253311559f, 0.011696536831968529f, 0.011313047980577277f,
-    0.010929558713237145f,
-  0.010546069044048827f, 0.010162578987111254f, 0.009779088556525145f,
-    0.009395597766389905f,
-  0.009012106630804949f, 0.008628615163871038f, 0.008245123379687167f,
-    0.007861631292354124f,
-  0.007478138915970929f, 0.007094646264638386f, 0.006711153352455981f,
-    0.006327660193523208f,
-  0.005944166801940901f, 0.005560673191808128f, 0.005177179377225743f,
-    0.004793685372293270f,
-  0.004410191191110246f, 0.004026696847777542f, 0.003643202356394263f,
-    0.003259707731061291f,
-  0.002876212985878184f, 0.002492718134944503f, 0.002109223192361147f,
-    0.001725728172227238f,
-  0.001342233088643682f, 0.000958737955710053f, 0.000575242787525925f,
-    0.000191747598192208f
-};
-
-/**
- * @} end of DCT4_IDCT4_Table group
- */
-
-/**
- * @addtogroup DCT4_IDCT4
- * @{
- */
-
-/**
- * @brief  Initialization function for the floating-point DCT4/IDCT4.
- * @param[in,out] *S         points to an instance of floating-point DCT4/IDCT4 structure.
- * @param[in]     *S_RFFT    points to an instance of floating-point RFFT/RIFFT structure.
- * @param[in]     *S_CFFT    points to an instance of floating-point CFFT/CIFFT structure.
- * @param[in]     N			 length of the DCT4.
- * @param[in]     Nby2       half of the length of the DCT4.
- * @param[in]     normalize  normalizing factor.
- * @return        arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported transform length.
- * \par Normalizing factor:
- * The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>.
- * Floating-point normalizing factors are mentioned in the table below for different DCT sizes:
- * \image html dct4NormalizingF32Table.gif
+                   \image html dct4NormalizingF32Table.gif
  */
 
 arm_status arm_dct4_init_f32(
@@ -16448,20 +66,9 @@
   uint16_t Nby2,
   float32_t normalize)
 {
-  /*  Initialize the default arm status */
+  /* Initialize the default arm status */
   arm_status status = ARM_MATH_SUCCESS;
 
-  /* Initializing the pointer array with the weight table base addresses of different lengths */
-  float32_t *twiddlePtr[4] =
-    { (float32_t *) Weights_128, (float32_t *) Weights_512,
-    (float32_t *) Weights_2048, (float32_t *) Weights_8192
-  };
-
-  /* Initializing the pointer array with the cos factor table base addresses of different lengths */
-  float32_t *pCosFactor[4] =
-    { (float32_t *) cos_factors_128, (float32_t *) cos_factors_512,
-    (float32_t *) cos_factors_2048, (float32_t *) cos_factors_8192
-  };
 
   /* Initialize the DCT4 length */
   S->N = N;
@@ -16480,28 +87,39 @@
 
   switch (N)
   {
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_8192)
     /* Initialize the table modifier values */
   case 8192U:
-    S->pTwiddle = twiddlePtr[3];
-    S->pCosFactor = pCosFactor[3];
+    S->pTwiddle = Weights_8192;
+    S->pCosFactor = cos_factors_8192;
     break;
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_2048)
   case 2048U:
-    S->pTwiddle = twiddlePtr[2];
-    S->pCosFactor = pCosFactor[2];
+    S->pTwiddle = Weights_2048;
+    S->pCosFactor = cos_factors_2048;
     break;
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_512)
   case 512U:
-    S->pTwiddle = twiddlePtr[1];
-    S->pCosFactor = pCosFactor[1];
+    S->pTwiddle = Weights_512;
+    S->pCosFactor = cos_factors_512;
     break;
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_128)
   case 128U:
-    S->pTwiddle = twiddlePtr[0];
-    S->pCosFactor = pCosFactor[0];
+    S->pTwiddle = Weights_128;
+    S->pCosFactor = cos_factors_128;
     break;
+  #endif
   default:
     status = ARM_MATH_ARGUMENT_ERROR;
   }
 
-  /* Initialize the RFFT/RIFFT */
+  /* Initialize the RFFT/RIFFT Function */
   arm_rfft_init_f32(S->pRfft, S->pCfft, S->N, 0U, 1U);
 
   /* return the status of DCT4 Init function */
@@ -16509,5 +127,5 @@
 }
 
 /**
- * @} end of DCT4_IDCT4 group
+  @} end of DCT4_IDCT4 group
  */
diff --git a/DSP/Source/TransformFunctions/arm_dct4_init_q15.c b/DSP/Source/TransformFunctions/arm_dct4_init_q15.c
index e57541c..3c55192 100644
--- a/DSP/Source/TransformFunctions/arm_dct4_init_q15.c
+++ b/DSP/Source/TransformFunctions/arm_dct4_init_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_dct4_init_q15.c
  * Description:  Initialization function of DCT-4 & IDCT4 Q15
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -27,4185 +27,34 @@
  */
 
 #include "arm_math.h"
+#include "arm_common_tables.h"
 
 /**
- * @ingroup DCT4_IDCT4
+  @ingroup DCT4_IDCT4
  */
 
 /**
- * @addtogroup DCT4_IDCT4_Table DCT Type IV Tables
- * @{
- */
-
-/*
-* @brief  Weights Table
-*/
-
-/**
- * \par
- * Weights tables are generated using the formula : <pre>weights[n] = e^(-j*n*pi/(2*N))</pre>
- * \par
- * C command to generate the table
- * <pre>
- * for(i = 0; i< N; i++)
- * {
- *   weights[2*i]= cos(i*c);
- *   weights[(2*i)+1]= -sin(i * c);
- * } </pre>
- * \par
- * where <code>N</code> is the Number of weights to be calculated and <code>c</code> is <code>pi/(2*N)</code>
- * \par
- * Converted the output to q15 format by multiplying with 2^31 and saturated if required.
- * \par
- * In the tables below the real and imaginary values are placed alternatively, hence the
- * array length is <code>2*N</code>.
- */
-
-static const q15_t ALIGN4 WeightsQ15_128[256] = {
-  (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7fe9, (q15_t)0xfb4a,
-  (q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7f87, (q15_t)0xf505,
-  (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7ed5, (q15_t)0xeec7,
-  (q15_t)0x7e9d, (q15_t)0xed38, (q15_t)0x7e5f, (q15_t)0xebab, (q15_t)0x7e1d, (q15_t)0xea1e, (q15_t)0x7dd6, (q15_t)0xe893,
-  (q15_t)0x7d8a, (q15_t)0xe708, (q15_t)0x7d39, (q15_t)0xe57e, (q15_t)0x7ce3, (q15_t)0xe3f5, (q15_t)0x7c89, (q15_t)0xe26d,
-  (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7bc5, (q15_t)0xdf61, (q15_t)0x7b5d, (q15_t)0xdddd, (q15_t)0x7aef, (q15_t)0xdc5a,
-  (q15_t)0x7a7d, (q15_t)0xdad8, (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x798a, (q15_t)0xd7da, (q15_t)0x7909, (q15_t)0xd65d,
-  (q15_t)0x7884, (q15_t)0xd4e1, (q15_t)0x77fa, (q15_t)0xd368, (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x76d9, (q15_t)0xd079,
-  (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x745f, (q15_t)0xcab3,
-  (q15_t)0x73b5, (q15_t)0xc946, (q15_t)0x7307, (q15_t)0xc7dc, (q15_t)0x7255, (q15_t)0xc674, (q15_t)0x719e, (q15_t)0xc50e,
-  (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x7023, (q15_t)0xc248, (q15_t)0x6f5f, (q15_t)0xc0e9, (q15_t)0x6e96, (q15_t)0xbf8d,
-  (q15_t)0x6dca, (q15_t)0xbe32, (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6c24, (q15_t)0xbb86, (q15_t)0x6b4a, (q15_t)0xba33,
-  (q15_t)0x6a6d, (q15_t)0xb8e4, (q15_t)0x698c, (q15_t)0xb797, (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x67bd, (q15_t)0xb505,
-  (q15_t)0x66cf, (q15_t)0xb3c1, (q15_t)0x65dd, (q15_t)0xb27f, (q15_t)0x64e8, (q15_t)0xb141, (q15_t)0x63ef, (q15_t)0xb005,
-  (q15_t)0x62f2, (q15_t)0xaecd, (q15_t)0x61f1, (q15_t)0xad97, (q15_t)0x60ec, (q15_t)0xac65, (q15_t)0x5fe3, (q15_t)0xab36,
-  (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5dc7, (q15_t)0xa8e3, (q15_t)0x5cb4, (q15_t)0xa7be, (q15_t)0x5b9d, (q15_t)0xa69c,
-  (q15_t)0x5a82, (q15_t)0xa57e, (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x5842, (q15_t)0xa34c, (q15_t)0x571d, (q15_t)0xa239,
-  (q15_t)0x55f5, (q15_t)0xa129, (q15_t)0x54ca, (q15_t)0xa01d, (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x5269, (q15_t)0x9e0f,
-  (q15_t)0x5133, (q15_t)0x9d0e, (q15_t)0x4ffb, (q15_t)0x9c11, (q15_t)0x4ebf, (q15_t)0x9b18, (q15_t)0x4d81, (q15_t)0x9a23,
-  (q15_t)0x4c3f, (q15_t)0x9931, (q15_t)0x4afb, (q15_t)0x9843, (q15_t)0x49b4, (q15_t)0x975a, (q15_t)0x4869, (q15_t)0x9674,
-  (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x45cd, (q15_t)0x94b6, (q15_t)0x447a, (q15_t)0x93dc, (q15_t)0x4325, (q15_t)0x9307,
-  (q15_t)0x41ce, (q15_t)0x9236, (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x3f17, (q15_t)0x90a1, (q15_t)0x3db8, (q15_t)0x8fdd,
-  (q15_t)0x3c56, (q15_t)0x8f1e, (q15_t)0x3af2, (q15_t)0x8e62, (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3824, (q15_t)0x8cf9,
-  (q15_t)0x36ba, (q15_t)0x8c4b, (q15_t)0x354d, (q15_t)0x8ba1, (q15_t)0x33de, (q15_t)0x8afc, (q15_t)0x326e, (q15_t)0x8a5b,
-  (q15_t)0x30fb, (q15_t)0x89bf, (q15_t)0x2f87, (q15_t)0x8927, (q15_t)0x2e11, (q15_t)0x8894, (q15_t)0x2c98, (q15_t)0x8806,
-  (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x26a8, (q15_t)0x85fb,
-  (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x209f, (q15_t)0x843b,
-  (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1a82, (q15_t)0x82c7,
-  (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x1455, (q15_t)0x81a1,
-  (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x1139, (q15_t)0x812b, (q15_t)0xfab, (q15_t)0x80f7, (q15_t)0xe1b, (q15_t)0x80c8,
-  (q15_t)0xc8b, (q15_t)0x809e, (q15_t)0xafb, (q15_t)0x8079, (q15_t)0x96a, (q15_t)0x8059, (q15_t)0x7d9, (q15_t)0x803e,
-  (q15_t)0x647, (q15_t)0x8028, (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x324, (q15_t)0x800a, (q15_t)0x192, (q15_t)0x8003
-};
-
-static const q15_t ALIGN4 WeightsQ15_512[1024] = {
-  (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xff9c, (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7ffe, (q15_t)0xfed3,
-  (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ffc, (q15_t)0xfe0a, (q15_t)0x7ffa, (q15_t)0xfda5, (q15_t)0x7ff8, (q15_t)0xfd41,
-  (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7ff3, (q15_t)0xfc78, (q15_t)0x7ff0, (q15_t)0xfc13, (q15_t)0x7fed, (q15_t)0xfbaf,
-  (q15_t)0x7fe9, (q15_t)0xfb4a, (q15_t)0x7fe5, (q15_t)0xfae6, (q15_t)0x7fe1, (q15_t)0xfa81, (q15_t)0x7fdd, (q15_t)0xfa1d,
-  (q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fd3, (q15_t)0xf954, (q15_t)0x7fce, (q15_t)0xf8f0, (q15_t)0x7fc8, (q15_t)0xf88b,
-  (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fbc, (q15_t)0xf7c3, (q15_t)0x7fb5, (q15_t)0xf75e, (q15_t)0x7fae, (q15_t)0xf6fa,
-  (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7f9f, (q15_t)0xf632, (q15_t)0x7f97, (q15_t)0xf5cd, (q15_t)0x7f8f, (q15_t)0xf569,
-  (q15_t)0x7f87, (q15_t)0xf505, (q15_t)0x7f7e, (q15_t)0xf4a1, (q15_t)0x7f75, (q15_t)0xf43d, (q15_t)0x7f6b, (q15_t)0xf3d9,
-  (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f58, (q15_t)0xf311, (q15_t)0x7f4d, (q15_t)0xf2ad, (q15_t)0x7f43, (q15_t)0xf249,
-  (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f2d, (q15_t)0xf181, (q15_t)0x7f21, (q15_t)0xf11d, (q15_t)0x7f15, (q15_t)0xf0b9,
-  (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7efd, (q15_t)0xeff2, (q15_t)0x7ef0, (q15_t)0xef8e, (q15_t)0x7ee3, (q15_t)0xef2a,
-  (q15_t)0x7ed5, (q15_t)0xeec7, (q15_t)0x7ec8, (q15_t)0xee63, (q15_t)0x7eba, (q15_t)0xedff, (q15_t)0x7eab, (q15_t)0xed9c,
-  (q15_t)0x7e9d, (q15_t)0xed38, (q15_t)0x7e8e, (q15_t)0xecd5, (q15_t)0x7e7f, (q15_t)0xec72, (q15_t)0x7e6f, (q15_t)0xec0e,
-  (q15_t)0x7e5f, (q15_t)0xebab, (q15_t)0x7e4f, (q15_t)0xeb48, (q15_t)0x7e3f, (q15_t)0xeae5, (q15_t)0x7e2e, (q15_t)0xea81,
-  (q15_t)0x7e1d, (q15_t)0xea1e, (q15_t)0x7e0c, (q15_t)0xe9bb, (q15_t)0x7dfa, (q15_t)0xe958, (q15_t)0x7de8, (q15_t)0xe8f6,
-  (q15_t)0x7dd6, (q15_t)0xe893, (q15_t)0x7dc3, (q15_t)0xe830, (q15_t)0x7db0, (q15_t)0xe7cd, (q15_t)0x7d9d, (q15_t)0xe76a,
-  (q15_t)0x7d8a, (q15_t)0xe708, (q15_t)0x7d76, (q15_t)0xe6a5, (q15_t)0x7d62, (q15_t)0xe643, (q15_t)0x7d4e, (q15_t)0xe5e0,
-  (q15_t)0x7d39, (q15_t)0xe57e, (q15_t)0x7d24, (q15_t)0xe51c, (q15_t)0x7d0f, (q15_t)0xe4b9, (q15_t)0x7cf9, (q15_t)0xe457,
-  (q15_t)0x7ce3, (q15_t)0xe3f5, (q15_t)0x7ccd, (q15_t)0xe393, (q15_t)0x7cb7, (q15_t)0xe331, (q15_t)0x7ca0, (q15_t)0xe2cf,
-  (q15_t)0x7c89, (q15_t)0xe26d, (q15_t)0x7c71, (q15_t)0xe20b, (q15_t)0x7c5a, (q15_t)0xe1aa, (q15_t)0x7c42, (q15_t)0xe148,
-  (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7c11, (q15_t)0xe085, (q15_t)0x7bf8, (q15_t)0xe024, (q15_t)0x7bdf, (q15_t)0xdfc2,
-  (q15_t)0x7bc5, (q15_t)0xdf61, (q15_t)0x7bac, (q15_t)0xdf00, (q15_t)0x7b92, (q15_t)0xde9f, (q15_t)0x7b77, (q15_t)0xde3e,
-  (q15_t)0x7b5d, (q15_t)0xdddd, (q15_t)0x7b42, (q15_t)0xdd7c, (q15_t)0x7b26, (q15_t)0xdd1b, (q15_t)0x7b0b, (q15_t)0xdcbb,
-  (q15_t)0x7aef, (q15_t)0xdc5a, (q15_t)0x7ad3, (q15_t)0xdbf9, (q15_t)0x7ab6, (q15_t)0xdb99, (q15_t)0x7a9a, (q15_t)0xdb39,
-  (q15_t)0x7a7d, (q15_t)0xdad8, (q15_t)0x7a5f, (q15_t)0xda78, (q15_t)0x7a42, (q15_t)0xda18, (q15_t)0x7a24, (q15_t)0xd9b8,
-  (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x79e7, (q15_t)0xd8f9, (q15_t)0x79c8, (q15_t)0xd899, (q15_t)0x79a9, (q15_t)0xd839,
-  (q15_t)0x798a, (q15_t)0xd7da, (q15_t)0x796a, (q15_t)0xd77a, (q15_t)0x794a, (q15_t)0xd71b, (q15_t)0x792a, (q15_t)0xd6bc,
-  (q15_t)0x7909, (q15_t)0xd65d, (q15_t)0x78e8, (q15_t)0xd5fe, (q15_t)0x78c7, (q15_t)0xd59f, (q15_t)0x78a6, (q15_t)0xd540,
-  (q15_t)0x7884, (q15_t)0xd4e1, (q15_t)0x7862, (q15_t)0xd483, (q15_t)0x7840, (q15_t)0xd424, (q15_t)0x781d, (q15_t)0xd3c6,
-  (q15_t)0x77fa, (q15_t)0xd368, (q15_t)0x77d7, (q15_t)0xd309, (q15_t)0x77b4, (q15_t)0xd2ab, (q15_t)0x7790, (q15_t)0xd24d,
-  (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x7747, (q15_t)0xd192, (q15_t)0x7723, (q15_t)0xd134, (q15_t)0x76fe, (q15_t)0xd0d7,
-  (q15_t)0x76d9, (q15_t)0xd079, (q15_t)0x76b3, (q15_t)0xd01c, (q15_t)0x768e, (q15_t)0xcfbf, (q15_t)0x7668, (q15_t)0xcf62,
-  (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x761b, (q15_t)0xcea8, (q15_t)0x75f4, (q15_t)0xce4b, (q15_t)0x75cc, (q15_t)0xcdef,
-  (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x757d, (q15_t)0xcd36, (q15_t)0x7555, (q15_t)0xccda, (q15_t)0x752d, (q15_t)0xcc7e,
-  (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x74db, (q15_t)0xcbc6, (q15_t)0x74b2, (q15_t)0xcb6a, (q15_t)0x7489, (q15_t)0xcb0e,
-  (q15_t)0x745f, (q15_t)0xcab3, (q15_t)0x7435, (q15_t)0xca58, (q15_t)0x740b, (q15_t)0xc9fc, (q15_t)0x73e0, (q15_t)0xc9a1,
-  (q15_t)0x73b5, (q15_t)0xc946, (q15_t)0x738a, (q15_t)0xc8ec, (q15_t)0x735f, (q15_t)0xc891, (q15_t)0x7333, (q15_t)0xc836,
-  (q15_t)0x7307, (q15_t)0xc7dc, (q15_t)0x72db, (q15_t)0xc782, (q15_t)0x72af, (q15_t)0xc728, (q15_t)0x7282, (q15_t)0xc6ce,
-  (q15_t)0x7255, (q15_t)0xc674, (q15_t)0x7227, (q15_t)0xc61a, (q15_t)0x71fa, (q15_t)0xc5c0, (q15_t)0x71cc, (q15_t)0xc567,
-  (q15_t)0x719e, (q15_t)0xc50e, (q15_t)0x716f, (q15_t)0xc4b4, (q15_t)0x7141, (q15_t)0xc45b, (q15_t)0x7112, (q15_t)0xc403,
-  (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x70b3, (q15_t)0xc351, (q15_t)0x7083, (q15_t)0xc2f9, (q15_t)0x7053, (q15_t)0xc2a0,
-  (q15_t)0x7023, (q15_t)0xc248, (q15_t)0x6ff2, (q15_t)0xc1f0, (q15_t)0x6fc1, (q15_t)0xc198, (q15_t)0x6f90, (q15_t)0xc141,
-  (q15_t)0x6f5f, (q15_t)0xc0e9, (q15_t)0x6f2d, (q15_t)0xc092, (q15_t)0x6efb, (q15_t)0xc03b, (q15_t)0x6ec9, (q15_t)0xbfe3,
-  (q15_t)0x6e96, (q15_t)0xbf8d, (q15_t)0x6e63, (q15_t)0xbf36, (q15_t)0x6e30, (q15_t)0xbedf, (q15_t)0x6dfd, (q15_t)0xbe89,
-  (q15_t)0x6dca, (q15_t)0xbe32, (q15_t)0x6d96, (q15_t)0xbddc, (q15_t)0x6d62, (q15_t)0xbd86, (q15_t)0x6d2d, (q15_t)0xbd30,
-  (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6cc4, (q15_t)0xbc85, (q15_t)0x6c8f, (q15_t)0xbc30, (q15_t)0x6c59, (q15_t)0xbbdb,
-  (q15_t)0x6c24, (q15_t)0xbb86, (q15_t)0x6bee, (q15_t)0xbb31, (q15_t)0x6bb8, (q15_t)0xbadc, (q15_t)0x6b81, (q15_t)0xba88,
-  (q15_t)0x6b4a, (q15_t)0xba33, (q15_t)0x6b13, (q15_t)0xb9df, (q15_t)0x6adc, (q15_t)0xb98b, (q15_t)0x6aa5, (q15_t)0xb937,
-  (q15_t)0x6a6d, (q15_t)0xb8e4, (q15_t)0x6a35, (q15_t)0xb890, (q15_t)0x69fd, (q15_t)0xb83d, (q15_t)0x69c4, (q15_t)0xb7ea,
-  (q15_t)0x698c, (q15_t)0xb797, (q15_t)0x6953, (q15_t)0xb744, (q15_t)0x6919, (q15_t)0xb6f1, (q15_t)0x68e0, (q15_t)0xb69f,
-  (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x686c, (q15_t)0xb5fa, (q15_t)0x6832, (q15_t)0xb5a8, (q15_t)0x67f7, (q15_t)0xb557,
-  (q15_t)0x67bd, (q15_t)0xb505, (q15_t)0x6782, (q15_t)0xb4b4, (q15_t)0x6746, (q15_t)0xb462, (q15_t)0x670b, (q15_t)0xb411,
-  (q15_t)0x66cf, (q15_t)0xb3c1, (q15_t)0x6693, (q15_t)0xb370, (q15_t)0x6657, (q15_t)0xb31f, (q15_t)0x661a, (q15_t)0xb2cf,
-  (q15_t)0x65dd, (q15_t)0xb27f, (q15_t)0x65a0, (q15_t)0xb22f, (q15_t)0x6563, (q15_t)0xb1df, (q15_t)0x6526, (q15_t)0xb190,
-  (q15_t)0x64e8, (q15_t)0xb141, (q15_t)0x64aa, (q15_t)0xb0f1, (q15_t)0x646c, (q15_t)0xb0a2, (q15_t)0x642d, (q15_t)0xb054,
-  (q15_t)0x63ef, (q15_t)0xb005, (q15_t)0x63b0, (q15_t)0xafb7, (q15_t)0x6371, (q15_t)0xaf69, (q15_t)0x6331, (q15_t)0xaf1b,
-  (q15_t)0x62f2, (q15_t)0xaecd, (q15_t)0x62b2, (q15_t)0xae7f, (q15_t)0x6271, (q15_t)0xae32, (q15_t)0x6231, (q15_t)0xade4,
-  (q15_t)0x61f1, (q15_t)0xad97, (q15_t)0x61b0, (q15_t)0xad4b, (q15_t)0x616f, (q15_t)0xacfe, (q15_t)0x612d, (q15_t)0xacb2,
-  (q15_t)0x60ec, (q15_t)0xac65, (q15_t)0x60aa, (q15_t)0xac19, (q15_t)0x6068, (q15_t)0xabcd, (q15_t)0x6026, (q15_t)0xab82,
-  (q15_t)0x5fe3, (q15_t)0xab36, (q15_t)0x5fa0, (q15_t)0xaaeb, (q15_t)0x5f5e, (q15_t)0xaaa0, (q15_t)0x5f1a, (q15_t)0xaa55,
-  (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5e93, (q15_t)0xa9c0, (q15_t)0x5e50, (q15_t)0xa976, (q15_t)0x5e0b, (q15_t)0xa92c,
-  (q15_t)0x5dc7, (q15_t)0xa8e3, (q15_t)0x5d83, (q15_t)0xa899, (q15_t)0x5d3e, (q15_t)0xa850, (q15_t)0x5cf9, (q15_t)0xa807,
-  (q15_t)0x5cb4, (q15_t)0xa7be, (q15_t)0x5c6e, (q15_t)0xa775, (q15_t)0x5c29, (q15_t)0xa72c, (q15_t)0x5be3, (q15_t)0xa6e4,
-  (q15_t)0x5b9d, (q15_t)0xa69c, (q15_t)0x5b56, (q15_t)0xa654, (q15_t)0x5b10, (q15_t)0xa60d, (q15_t)0x5ac9, (q15_t)0xa5c5,
-  (q15_t)0x5a82, (q15_t)0xa57e, (q15_t)0x5a3b, (q15_t)0xa537, (q15_t)0x59f3, (q15_t)0xa4f0, (q15_t)0x59ac, (q15_t)0xa4aa,
-  (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x591c, (q15_t)0xa41d, (q15_t)0x58d4, (q15_t)0xa3d7, (q15_t)0x588b, (q15_t)0xa392,
-  (q15_t)0x5842, (q15_t)0xa34c, (q15_t)0x57f9, (q15_t)0xa307, (q15_t)0x57b0, (q15_t)0xa2c2, (q15_t)0x5767, (q15_t)0xa27d,
-  (q15_t)0x571d, (q15_t)0xa239, (q15_t)0x56d4, (q15_t)0xa1f5, (q15_t)0x568a, (q15_t)0xa1b0, (q15_t)0x5640, (q15_t)0xa16d,
-  (q15_t)0x55f5, (q15_t)0xa129, (q15_t)0x55ab, (q15_t)0xa0e6, (q15_t)0x5560, (q15_t)0xa0a2, (q15_t)0x5515, (q15_t)0xa060,
-  (q15_t)0x54ca, (q15_t)0xa01d, (q15_t)0x547e, (q15_t)0x9fda, (q15_t)0x5433, (q15_t)0x9f98, (q15_t)0x53e7, (q15_t)0x9f56,
-  (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x534e, (q15_t)0x9ed3, (q15_t)0x5302, (q15_t)0x9e91, (q15_t)0x52b5, (q15_t)0x9e50,
-  (q15_t)0x5269, (q15_t)0x9e0f, (q15_t)0x521c, (q15_t)0x9dcf, (q15_t)0x51ce, (q15_t)0x9d8f, (q15_t)0x5181, (q15_t)0x9d4e,
-  (q15_t)0x5133, (q15_t)0x9d0e, (q15_t)0x50e5, (q15_t)0x9ccf, (q15_t)0x5097, (q15_t)0x9c8f, (q15_t)0x5049, (q15_t)0x9c50,
-  (q15_t)0x4ffb, (q15_t)0x9c11, (q15_t)0x4fac, (q15_t)0x9bd3, (q15_t)0x4f5e, (q15_t)0x9b94, (q15_t)0x4f0f, (q15_t)0x9b56,
-  (q15_t)0x4ebf, (q15_t)0x9b18, (q15_t)0x4e70, (q15_t)0x9ada, (q15_t)0x4e21, (q15_t)0x9a9d, (q15_t)0x4dd1, (q15_t)0x9a60,
-  (q15_t)0x4d81, (q15_t)0x9a23, (q15_t)0x4d31, (q15_t)0x99e6, (q15_t)0x4ce1, (q15_t)0x99a9, (q15_t)0x4c90, (q15_t)0x996d,
-  (q15_t)0x4c3f, (q15_t)0x9931, (q15_t)0x4bef, (q15_t)0x98f5, (q15_t)0x4b9e, (q15_t)0x98ba, (q15_t)0x4b4c, (q15_t)0x987e,
-  (q15_t)0x4afb, (q15_t)0x9843, (q15_t)0x4aa9, (q15_t)0x9809, (q15_t)0x4a58, (q15_t)0x97ce, (q15_t)0x4a06, (q15_t)0x9794,
-  (q15_t)0x49b4, (q15_t)0x975a, (q15_t)0x4961, (q15_t)0x9720, (q15_t)0x490f, (q15_t)0x96e7, (q15_t)0x48bc, (q15_t)0x96ad,
-  (q15_t)0x4869, (q15_t)0x9674, (q15_t)0x4816, (q15_t)0x963c, (q15_t)0x47c3, (q15_t)0x9603, (q15_t)0x4770, (q15_t)0x95cb,
-  (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x46c9, (q15_t)0x955b, (q15_t)0x4675, (q15_t)0x9524, (q15_t)0x4621, (q15_t)0x94ed,
-  (q15_t)0x45cd, (q15_t)0x94b6, (q15_t)0x4578, (q15_t)0x947f, (q15_t)0x4524, (q15_t)0x9448, (q15_t)0x44cf, (q15_t)0x9412,
-  (q15_t)0x447a, (q15_t)0x93dc, (q15_t)0x4425, (q15_t)0x93a7, (q15_t)0x43d0, (q15_t)0x9371, (q15_t)0x437b, (q15_t)0x933c,
-  (q15_t)0x4325, (q15_t)0x9307, (q15_t)0x42d0, (q15_t)0x92d3, (q15_t)0x427a, (q15_t)0x929e, (q15_t)0x4224, (q15_t)0x926a,
-  (q15_t)0x41ce, (q15_t)0x9236, (q15_t)0x4177, (q15_t)0x9203, (q15_t)0x4121, (q15_t)0x91d0, (q15_t)0x40ca, (q15_t)0x919d,
-  (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x401d, (q15_t)0x9137, (q15_t)0x3fc5, (q15_t)0x9105, (q15_t)0x3f6e, (q15_t)0x90d3,
-  (q15_t)0x3f17, (q15_t)0x90a1, (q15_t)0x3ebf, (q15_t)0x9070, (q15_t)0x3e68, (q15_t)0x903f, (q15_t)0x3e10, (q15_t)0x900e,
-  (q15_t)0x3db8, (q15_t)0x8fdd, (q15_t)0x3d60, (q15_t)0x8fad, (q15_t)0x3d07, (q15_t)0x8f7d, (q15_t)0x3caf, (q15_t)0x8f4d,
-  (q15_t)0x3c56, (q15_t)0x8f1e, (q15_t)0x3bfd, (q15_t)0x8eee, (q15_t)0x3ba5, (q15_t)0x8ebf, (q15_t)0x3b4c, (q15_t)0x8e91,
-  (q15_t)0x3af2, (q15_t)0x8e62, (q15_t)0x3a99, (q15_t)0x8e34, (q15_t)0x3a40, (q15_t)0x8e06, (q15_t)0x39e6, (q15_t)0x8dd9,
-  (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3932, (q15_t)0x8d7e, (q15_t)0x38d8, (q15_t)0x8d51, (q15_t)0x387e, (q15_t)0x8d25,
-  (q15_t)0x3824, (q15_t)0x8cf9, (q15_t)0x37ca, (q15_t)0x8ccd, (q15_t)0x376f, (q15_t)0x8ca1, (q15_t)0x3714, (q15_t)0x8c76,
-  (q15_t)0x36ba, (q15_t)0x8c4b, (q15_t)0x365f, (q15_t)0x8c20, (q15_t)0x3604, (q15_t)0x8bf5, (q15_t)0x35a8, (q15_t)0x8bcb,
-  (q15_t)0x354d, (q15_t)0x8ba1, (q15_t)0x34f2, (q15_t)0x8b77, (q15_t)0x3496, (q15_t)0x8b4e, (q15_t)0x343a, (q15_t)0x8b25,
-  (q15_t)0x33de, (q15_t)0x8afc, (q15_t)0x3382, (q15_t)0x8ad3, (q15_t)0x3326, (q15_t)0x8aab, (q15_t)0x32ca, (q15_t)0x8a83,
-  (q15_t)0x326e, (q15_t)0x8a5b, (q15_t)0x3211, (q15_t)0x8a34, (q15_t)0x31b5, (q15_t)0x8a0c, (q15_t)0x3158, (q15_t)0x89e5,
-  (q15_t)0x30fb, (q15_t)0x89bf, (q15_t)0x309e, (q15_t)0x8998, (q15_t)0x3041, (q15_t)0x8972, (q15_t)0x2fe4, (q15_t)0x894d,
-  (q15_t)0x2f87, (q15_t)0x8927, (q15_t)0x2f29, (q15_t)0x8902, (q15_t)0x2ecc, (q15_t)0x88dd, (q15_t)0x2e6e, (q15_t)0x88b9,
-  (q15_t)0x2e11, (q15_t)0x8894, (q15_t)0x2db3, (q15_t)0x8870, (q15_t)0x2d55, (q15_t)0x884c, (q15_t)0x2cf7, (q15_t)0x8829,
-  (q15_t)0x2c98, (q15_t)0x8806, (q15_t)0x2c3a, (q15_t)0x87e3, (q15_t)0x2bdc, (q15_t)0x87c0, (q15_t)0x2b7d, (q15_t)0x879e,
-  (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x2ac0, (q15_t)0x875a, (q15_t)0x2a61, (q15_t)0x8739, (q15_t)0x2a02, (q15_t)0x8718,
-  (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x2944, (q15_t)0x86d6, (q15_t)0x28e5, (q15_t)0x86b6, (q15_t)0x2886, (q15_t)0x8696,
-  (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x27c7, (q15_t)0x8657, (q15_t)0x2767, (q15_t)0x8638, (q15_t)0x2707, (q15_t)0x8619,
-  (q15_t)0x26a8, (q15_t)0x85fb, (q15_t)0x2648, (q15_t)0x85dc, (q15_t)0x25e8, (q15_t)0x85be, (q15_t)0x2588, (q15_t)0x85a1,
-  (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x24c7, (q15_t)0x8566, (q15_t)0x2467, (q15_t)0x854a, (q15_t)0x2407, (q15_t)0x852d,
-  (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x2345, (q15_t)0x84f5, (q15_t)0x22e5, (q15_t)0x84da, (q15_t)0x2284, (q15_t)0x84be,
-  (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x21c2, (q15_t)0x8489, (q15_t)0x2161, (q15_t)0x846e, (q15_t)0x2100, (q15_t)0x8454,
-  (q15_t)0x209f, (q15_t)0x843b, (q15_t)0x203e, (q15_t)0x8421, (q15_t)0x1fdc, (q15_t)0x8408, (q15_t)0x1f7b, (q15_t)0x83ef,
-  (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1eb8, (q15_t)0x83be, (q15_t)0x1e56, (q15_t)0x83a6, (q15_t)0x1df5, (q15_t)0x838f,
-  (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1d31, (q15_t)0x8360, (q15_t)0x1ccf, (q15_t)0x8349, (q15_t)0x1c6d, (q15_t)0x8333,
-  (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1ba9, (q15_t)0x8307, (q15_t)0x1b47, (q15_t)0x82f1, (q15_t)0x1ae4, (q15_t)0x82dc,
-  (q15_t)0x1a82, (q15_t)0x82c7, (q15_t)0x1a20, (q15_t)0x82b2, (q15_t)0x19bd, (q15_t)0x829e, (q15_t)0x195b, (q15_t)0x828a,
-  (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x1896, (q15_t)0x8263, (q15_t)0x1833, (q15_t)0x8250, (q15_t)0x17d0, (q15_t)0x823d,
-  (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x170a, (q15_t)0x8218, (q15_t)0x16a8, (q15_t)0x8206, (q15_t)0x1645, (q15_t)0x81f4,
-  (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x157f, (q15_t)0x81d2, (q15_t)0x151b, (q15_t)0x81c1, (q15_t)0x14b8, (q15_t)0x81b1,
-  (q15_t)0x1455, (q15_t)0x81a1, (q15_t)0x13f2, (q15_t)0x8191, (q15_t)0x138e, (q15_t)0x8181, (q15_t)0x132b, (q15_t)0x8172,
-  (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x1264, (q15_t)0x8155, (q15_t)0x1201, (q15_t)0x8146, (q15_t)0x119d, (q15_t)0x8138,
-  (q15_t)0x1139, (q15_t)0x812b, (q15_t)0x10d6, (q15_t)0x811d, (q15_t)0x1072, (q15_t)0x8110, (q15_t)0x100e, (q15_t)0x8103,
-  (q15_t)0xfab, (q15_t)0x80f7, (q15_t)0xf47, (q15_t)0x80eb, (q15_t)0xee3, (q15_t)0x80df, (q15_t)0xe7f, (q15_t)0x80d3,
-  (q15_t)0xe1b, (q15_t)0x80c8, (q15_t)0xdb7, (q15_t)0x80bd, (q15_t)0xd53, (q15_t)0x80b3, (q15_t)0xcef, (q15_t)0x80a8,
-  (q15_t)0xc8b, (q15_t)0x809e, (q15_t)0xc27, (q15_t)0x8095, (q15_t)0xbc3, (q15_t)0x808b, (q15_t)0xb5f, (q15_t)0x8082,
-  (q15_t)0xafb, (q15_t)0x8079, (q15_t)0xa97, (q15_t)0x8071, (q15_t)0xa33, (q15_t)0x8069, (q15_t)0x9ce, (q15_t)0x8061,
-  (q15_t)0x96a, (q15_t)0x8059, (q15_t)0x906, (q15_t)0x8052, (q15_t)0x8a2, (q15_t)0x804b, (q15_t)0x83d, (q15_t)0x8044,
-  (q15_t)0x7d9, (q15_t)0x803e, (q15_t)0x775, (q15_t)0x8038, (q15_t)0x710, (q15_t)0x8032, (q15_t)0x6ac, (q15_t)0x802d,
-  (q15_t)0x647, (q15_t)0x8028, (q15_t)0x5e3, (q15_t)0x8023, (q15_t)0x57f, (q15_t)0x801f, (q15_t)0x51a, (q15_t)0x801b,
-  (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x451, (q15_t)0x8013, (q15_t)0x3ed, (q15_t)0x8010, (q15_t)0x388, (q15_t)0x800d,
-  (q15_t)0x324, (q15_t)0x800a, (q15_t)0x2bf, (q15_t)0x8008, (q15_t)0x25b, (q15_t)0x8006, (q15_t)0x1f6, (q15_t)0x8004,
-  (q15_t)0x192, (q15_t)0x8003, (q15_t)0x12d, (q15_t)0x8002, (q15_t)0xc9, (q15_t)0x8001, (q15_t)0x64, (q15_t)0x8001
-};
-
-static const q15_t ALIGN4 WeightsQ15_2048[4096] = {
-  (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xffe7, (q15_t)0x7fff, (q15_t)0xffce, (q15_t)0x7fff, (q15_t)0xffb5,
-  (q15_t)0x7fff, (q15_t)0xff9c, (q15_t)0x7fff, (q15_t)0xff83, (q15_t)0x7fff, (q15_t)0xff6a, (q15_t)0x7fff, (q15_t)0xff51,
-  (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7fff, (q15_t)0xff1e, (q15_t)0x7fff, (q15_t)0xff05, (q15_t)0x7ffe, (q15_t)0xfeec,
-  (q15_t)0x7ffe, (q15_t)0xfed3, (q15_t)0x7ffe, (q15_t)0xfeba, (q15_t)0x7ffe, (q15_t)0xfea1, (q15_t)0x7ffd, (q15_t)0xfe88,
-  (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ffd, (q15_t)0xfe55, (q15_t)0x7ffc, (q15_t)0xfe3c, (q15_t)0x7ffc, (q15_t)0xfe23,
-  (q15_t)0x7ffc, (q15_t)0xfe0a, (q15_t)0x7ffb, (q15_t)0xfdf1, (q15_t)0x7ffb, (q15_t)0xfdd8, (q15_t)0x7ffa, (q15_t)0xfdbe,
-  (q15_t)0x7ffa, (q15_t)0xfda5, (q15_t)0x7ff9, (q15_t)0xfd8c, (q15_t)0x7ff9, (q15_t)0xfd73, (q15_t)0x7ff8, (q15_t)0xfd5a,
-  (q15_t)0x7ff8, (q15_t)0xfd41, (q15_t)0x7ff7, (q15_t)0xfd28, (q15_t)0x7ff7, (q15_t)0xfd0f, (q15_t)0x7ff6, (q15_t)0xfcf5,
-  (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7ff5, (q15_t)0xfcc3, (q15_t)0x7ff4, (q15_t)0xfcaa, (q15_t)0x7ff4, (q15_t)0xfc91,
-  (q15_t)0x7ff3, (q15_t)0xfc78, (q15_t)0x7ff2, (q15_t)0xfc5f, (q15_t)0x7ff2, (q15_t)0xfc46, (q15_t)0x7ff1, (q15_t)0xfc2c,
-  (q15_t)0x7ff0, (q15_t)0xfc13, (q15_t)0x7fef, (q15_t)0xfbfa, (q15_t)0x7fee, (q15_t)0xfbe1, (q15_t)0x7fee, (q15_t)0xfbc8,
-  (q15_t)0x7fed, (q15_t)0xfbaf, (q15_t)0x7fec, (q15_t)0xfb96, (q15_t)0x7feb, (q15_t)0xfb7d, (q15_t)0x7fea, (q15_t)0xfb64,
-  (q15_t)0x7fe9, (q15_t)0xfb4a, (q15_t)0x7fe8, (q15_t)0xfb31, (q15_t)0x7fe7, (q15_t)0xfb18, (q15_t)0x7fe6, (q15_t)0xfaff,
-  (q15_t)0x7fe5, (q15_t)0xfae6, (q15_t)0x7fe4, (q15_t)0xfacd, (q15_t)0x7fe3, (q15_t)0xfab4, (q15_t)0x7fe2, (q15_t)0xfa9b,
-  (q15_t)0x7fe1, (q15_t)0xfa81, (q15_t)0x7fe0, (q15_t)0xfa68, (q15_t)0x7fdf, (q15_t)0xfa4f, (q15_t)0x7fde, (q15_t)0xfa36,
-  (q15_t)0x7fdd, (q15_t)0xfa1d, (q15_t)0x7fdc, (q15_t)0xfa04, (q15_t)0x7fda, (q15_t)0xf9eb, (q15_t)0x7fd9, (q15_t)0xf9d2,
-  (q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fd7, (q15_t)0xf9a0, (q15_t)0x7fd6, (q15_t)0xf986, (q15_t)0x7fd4, (q15_t)0xf96d,
-  (q15_t)0x7fd3, (q15_t)0xf954, (q15_t)0x7fd2, (q15_t)0xf93b, (q15_t)0x7fd0, (q15_t)0xf922, (q15_t)0x7fcf, (q15_t)0xf909,
-  (q15_t)0x7fce, (q15_t)0xf8f0, (q15_t)0x7fcc, (q15_t)0xf8d7, (q15_t)0x7fcb, (q15_t)0xf8be, (q15_t)0x7fc9, (q15_t)0xf8a5,
-  (q15_t)0x7fc8, (q15_t)0xf88b, (q15_t)0x7fc6, (q15_t)0xf872, (q15_t)0x7fc5, (q15_t)0xf859, (q15_t)0x7fc3, (q15_t)0xf840,
-  (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fc0, (q15_t)0xf80e, (q15_t)0x7fbf, (q15_t)0xf7f5, (q15_t)0x7fbd, (q15_t)0xf7dc,
-  (q15_t)0x7fbc, (q15_t)0xf7c3, (q15_t)0x7fba, (q15_t)0xf7aa, (q15_t)0x7fb8, (q15_t)0xf791, (q15_t)0x7fb7, (q15_t)0xf778,
-  (q15_t)0x7fb5, (q15_t)0xf75e, (q15_t)0x7fb3, (q15_t)0xf745, (q15_t)0x7fb1, (q15_t)0xf72c, (q15_t)0x7fb0, (q15_t)0xf713,
-  (q15_t)0x7fae, (q15_t)0xf6fa, (q15_t)0x7fac, (q15_t)0xf6e1, (q15_t)0x7faa, (q15_t)0xf6c8, (q15_t)0x7fa9, (q15_t)0xf6af,
-  (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7fa5, (q15_t)0xf67d, (q15_t)0x7fa3, (q15_t)0xf664, (q15_t)0x7fa1, (q15_t)0xf64b,
-  (q15_t)0x7f9f, (q15_t)0xf632, (q15_t)0x7f9d, (q15_t)0xf619, (q15_t)0x7f9b, (q15_t)0xf600, (q15_t)0x7f99, (q15_t)0xf5e7,
-  (q15_t)0x7f97, (q15_t)0xf5cd, (q15_t)0x7f95, (q15_t)0xf5b4, (q15_t)0x7f93, (q15_t)0xf59b, (q15_t)0x7f91, (q15_t)0xf582,
-  (q15_t)0x7f8f, (q15_t)0xf569, (q15_t)0x7f8d, (q15_t)0xf550, (q15_t)0x7f8b, (q15_t)0xf537, (q15_t)0x7f89, (q15_t)0xf51e,
-  (q15_t)0x7f87, (q15_t)0xf505, (q15_t)0x7f85, (q15_t)0xf4ec, (q15_t)0x7f82, (q15_t)0xf4d3, (q15_t)0x7f80, (q15_t)0xf4ba,
-  (q15_t)0x7f7e, (q15_t)0xf4a1, (q15_t)0x7f7c, (q15_t)0xf488, (q15_t)0x7f79, (q15_t)0xf46f, (q15_t)0x7f77, (q15_t)0xf456,
-  (q15_t)0x7f75, (q15_t)0xf43d, (q15_t)0x7f72, (q15_t)0xf424, (q15_t)0x7f70, (q15_t)0xf40b, (q15_t)0x7f6e, (q15_t)0xf3f2,
-  (q15_t)0x7f6b, (q15_t)0xf3d9, (q15_t)0x7f69, (q15_t)0xf3c0, (q15_t)0x7f67, (q15_t)0xf3a7, (q15_t)0x7f64, (q15_t)0xf38e,
-  (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f5f, (q15_t)0xf35c, (q15_t)0x7f5d, (q15_t)0xf343, (q15_t)0x7f5a, (q15_t)0xf32a,
-  (q15_t)0x7f58, (q15_t)0xf311, (q15_t)0x7f55, (q15_t)0xf2f8, (q15_t)0x7f53, (q15_t)0xf2df, (q15_t)0x7f50, (q15_t)0xf2c6,
-  (q15_t)0x7f4d, (q15_t)0xf2ad, (q15_t)0x7f4b, (q15_t)0xf294, (q15_t)0x7f48, (q15_t)0xf27b, (q15_t)0x7f45, (q15_t)0xf262,
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-  (q15_t)0x7e0c, (q15_t)0xe9bb, (q15_t)0x7e07, (q15_t)0xe9a3, (q15_t)0x7e03, (q15_t)0xe98a, (q15_t)0x7dff, (q15_t)0xe971,
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-  (q15_t)0x7cf9, (q15_t)0xe457, (q15_t)0x7cf4, (q15_t)0xe43f, (q15_t)0x7cee, (q15_t)0xe426, (q15_t)0x7ce9, (q15_t)0xe40e,
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-  (q15_t)0x7884, (q15_t)0xd4e1, (q15_t)0x787c, (q15_t)0xd4ca, (q15_t)0x7873, (q15_t)0xd4b2, (q15_t)0x786b, (q15_t)0xd49a,
-  (q15_t)0x7862, (q15_t)0xd483, (q15_t)0x7859, (q15_t)0xd46b, (q15_t)0x7851, (q15_t)0xd453, (q15_t)0x7848, (q15_t)0xd43c,
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-  (q15_t)0x781d, (q15_t)0xd3c6, (q15_t)0x7814, (q15_t)0xd3ae, (q15_t)0x780c, (q15_t)0xd397, (q15_t)0x7803, (q15_t)0xd37f,
-  (q15_t)0x77fa, (q15_t)0xd368, (q15_t)0x77f1, (q15_t)0xd350, (q15_t)0x77e9, (q15_t)0xd338, (q15_t)0x77e0, (q15_t)0xd321,
-  (q15_t)0x77d7, (q15_t)0xd309, (q15_t)0x77ce, (q15_t)0xd2f2, (q15_t)0x77c5, (q15_t)0xd2da, (q15_t)0x77bc, (q15_t)0xd2c3,
-  (q15_t)0x77b4, (q15_t)0xd2ab, (q15_t)0x77ab, (q15_t)0xd294, (q15_t)0x77a2, (q15_t)0xd27c, (q15_t)0x7799, (q15_t)0xd265,
-  (q15_t)0x7790, (q15_t)0xd24d, (q15_t)0x7787, (q15_t)0xd236, (q15_t)0x777e, (q15_t)0xd21e, (q15_t)0x7775, (q15_t)0xd207,
-  (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x7763, (q15_t)0xd1d8, (q15_t)0x775a, (q15_t)0xd1c1, (q15_t)0x7751, (q15_t)0xd1a9,
-  (q15_t)0x7747, (q15_t)0xd192, (q15_t)0x773e, (q15_t)0xd17a, (q15_t)0x7735, (q15_t)0xd163, (q15_t)0x772c, (q15_t)0xd14b,
-  (q15_t)0x7723, (q15_t)0xd134, (q15_t)0x771a, (q15_t)0xd11d, (q15_t)0x7710, (q15_t)0xd105, (q15_t)0x7707, (q15_t)0xd0ee,
-  (q15_t)0x76fe, (q15_t)0xd0d7, (q15_t)0x76f5, (q15_t)0xd0bf, (q15_t)0x76eb, (q15_t)0xd0a8, (q15_t)0x76e2, (q15_t)0xd091,
-  (q15_t)0x76d9, (q15_t)0xd079, (q15_t)0x76cf, (q15_t)0xd062, (q15_t)0x76c6, (q15_t)0xd04b, (q15_t)0x76bd, (q15_t)0xd033,
-  (q15_t)0x76b3, (q15_t)0xd01c, (q15_t)0x76aa, (q15_t)0xd005, (q15_t)0x76a0, (q15_t)0xcfed, (q15_t)0x7697, (q15_t)0xcfd6,
-  (q15_t)0x768e, (q15_t)0xcfbf, (q15_t)0x7684, (q15_t)0xcfa7, (q15_t)0x767b, (q15_t)0xcf90, (q15_t)0x7671, (q15_t)0xcf79,
-  (q15_t)0x7668, (q15_t)0xcf62, (q15_t)0x765e, (q15_t)0xcf4a, (q15_t)0x7654, (q15_t)0xcf33, (q15_t)0x764b, (q15_t)0xcf1c,
-  (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x7638, (q15_t)0xceee, (q15_t)0x762e, (q15_t)0xced6, (q15_t)0x7624, (q15_t)0xcebf,
-  (q15_t)0x761b, (q15_t)0xcea8, (q15_t)0x7611, (q15_t)0xce91, (q15_t)0x7607, (q15_t)0xce7a, (q15_t)0x75fd, (q15_t)0xce62,
-  (q15_t)0x75f4, (q15_t)0xce4b, (q15_t)0x75ea, (q15_t)0xce34, (q15_t)0x75e0, (q15_t)0xce1d, (q15_t)0x75d6, (q15_t)0xce06,
-  (q15_t)0x75cc, (q15_t)0xcdef, (q15_t)0x75c3, (q15_t)0xcdd8, (q15_t)0x75b9, (q15_t)0xcdc0, (q15_t)0x75af, (q15_t)0xcda9,
-  (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x759b, (q15_t)0xcd7b, (q15_t)0x7591, (q15_t)0xcd64, (q15_t)0x7587, (q15_t)0xcd4d,
-  (q15_t)0x757d, (q15_t)0xcd36, (q15_t)0x7573, (q15_t)0xcd1f, (q15_t)0x7569, (q15_t)0xcd08, (q15_t)0x755f, (q15_t)0xccf1,
-  (q15_t)0x7555, (q15_t)0xccda, (q15_t)0x754b, (q15_t)0xccc3, (q15_t)0x7541, (q15_t)0xccac, (q15_t)0x7537, (q15_t)0xcc95,
-  (q15_t)0x752d, (q15_t)0xcc7e, (q15_t)0x7523, (q15_t)0xcc67, (q15_t)0x7519, (q15_t)0xcc50, (q15_t)0x750f, (q15_t)0xcc39,
-  (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x74fa, (q15_t)0xcc0b, (q15_t)0x74f0, (q15_t)0xcbf4, (q15_t)0x74e6, (q15_t)0xcbdd,
-  (q15_t)0x74db, (q15_t)0xcbc6, (q15_t)0x74d1, (q15_t)0xcbaf, (q15_t)0x74c7, (q15_t)0xcb98, (q15_t)0x74bd, (q15_t)0xcb81,
-  (q15_t)0x74b2, (q15_t)0xcb6a, (q15_t)0x74a8, (q15_t)0xcb53, (q15_t)0x749e, (q15_t)0xcb3c, (q15_t)0x7493, (q15_t)0xcb25,
-  (q15_t)0x7489, (q15_t)0xcb0e, (q15_t)0x747e, (q15_t)0xcaf8, (q15_t)0x7474, (q15_t)0xcae1, (q15_t)0x746a, (q15_t)0xcaca,
-  (q15_t)0x745f, (q15_t)0xcab3, (q15_t)0x7455, (q15_t)0xca9c, (q15_t)0x744a, (q15_t)0xca85, (q15_t)0x7440, (q15_t)0xca6e,
-  (q15_t)0x7435, (q15_t)0xca58, (q15_t)0x742b, (q15_t)0xca41, (q15_t)0x7420, (q15_t)0xca2a, (q15_t)0x7415, (q15_t)0xca13,
-  (q15_t)0x740b, (q15_t)0xc9fc, (q15_t)0x7400, (q15_t)0xc9e6, (q15_t)0x73f6, (q15_t)0xc9cf, (q15_t)0x73eb, (q15_t)0xc9b8,
-  (q15_t)0x73e0, (q15_t)0xc9a1, (q15_t)0x73d6, (q15_t)0xc98b, (q15_t)0x73cb, (q15_t)0xc974, (q15_t)0x73c0, (q15_t)0xc95d,
-  (q15_t)0x73b5, (q15_t)0xc946, (q15_t)0x73ab, (q15_t)0xc930, (q15_t)0x73a0, (q15_t)0xc919, (q15_t)0x7395, (q15_t)0xc902,
-  (q15_t)0x738a, (q15_t)0xc8ec, (q15_t)0x737f, (q15_t)0xc8d5, (q15_t)0x7375, (q15_t)0xc8be, (q15_t)0x736a, (q15_t)0xc8a8,
-  (q15_t)0x735f, (q15_t)0xc891, (q15_t)0x7354, (q15_t)0xc87a, (q15_t)0x7349, (q15_t)0xc864, (q15_t)0x733e, (q15_t)0xc84d,
-  (q15_t)0x7333, (q15_t)0xc836, (q15_t)0x7328, (q15_t)0xc820, (q15_t)0x731d, (q15_t)0xc809, (q15_t)0x7312, (q15_t)0xc7f3,
-  (q15_t)0x7307, (q15_t)0xc7dc, (q15_t)0x72fc, (q15_t)0xc7c5, (q15_t)0x72f1, (q15_t)0xc7af, (q15_t)0x72e6, (q15_t)0xc798,
-  (q15_t)0x72db, (q15_t)0xc782, (q15_t)0x72d0, (q15_t)0xc76b, (q15_t)0x72c5, (q15_t)0xc755, (q15_t)0x72ba, (q15_t)0xc73e,
-  (q15_t)0x72af, (q15_t)0xc728, (q15_t)0x72a3, (q15_t)0xc711, (q15_t)0x7298, (q15_t)0xc6fa, (q15_t)0x728d, (q15_t)0xc6e4,
-  (q15_t)0x7282, (q15_t)0xc6ce, (q15_t)0x7276, (q15_t)0xc6b7, (q15_t)0x726b, (q15_t)0xc6a1, (q15_t)0x7260, (q15_t)0xc68a,
-  (q15_t)0x7255, (q15_t)0xc674, (q15_t)0x7249, (q15_t)0xc65d, (q15_t)0x723e, (q15_t)0xc647, (q15_t)0x7233, (q15_t)0xc630,
-  (q15_t)0x7227, (q15_t)0xc61a, (q15_t)0x721c, (q15_t)0xc603, (q15_t)0x7211, (q15_t)0xc5ed, (q15_t)0x7205, (q15_t)0xc5d7,
-  (q15_t)0x71fa, (q15_t)0xc5c0, (q15_t)0x71ee, (q15_t)0xc5aa, (q15_t)0x71e3, (q15_t)0xc594, (q15_t)0x71d7, (q15_t)0xc57d,
-  (q15_t)0x71cc, (q15_t)0xc567, (q15_t)0x71c0, (q15_t)0xc551, (q15_t)0x71b5, (q15_t)0xc53a, (q15_t)0x71a9, (q15_t)0xc524,
-  (q15_t)0x719e, (q15_t)0xc50e, (q15_t)0x7192, (q15_t)0xc4f7, (q15_t)0x7186, (q15_t)0xc4e1, (q15_t)0x717b, (q15_t)0xc4cb,
-  (q15_t)0x716f, (q15_t)0xc4b4, (q15_t)0x7164, (q15_t)0xc49e, (q15_t)0x7158, (q15_t)0xc488, (q15_t)0x714c, (q15_t)0xc472,
-  (q15_t)0x7141, (q15_t)0xc45b, (q15_t)0x7135, (q15_t)0xc445, (q15_t)0x7129, (q15_t)0xc42f, (q15_t)0x711d, (q15_t)0xc419,
-  (q15_t)0x7112, (q15_t)0xc403, (q15_t)0x7106, (q15_t)0xc3ec, (q15_t)0x70fa, (q15_t)0xc3d6, (q15_t)0x70ee, (q15_t)0xc3c0,
-  (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x70d6, (q15_t)0xc394, (q15_t)0x70cb, (q15_t)0xc37d, (q15_t)0x70bf, (q15_t)0xc367,
-  (q15_t)0x70b3, (q15_t)0xc351, (q15_t)0x70a7, (q15_t)0xc33b, (q15_t)0x709b, (q15_t)0xc325, (q15_t)0x708f, (q15_t)0xc30f,
-  (q15_t)0x7083, (q15_t)0xc2f9, (q15_t)0x7077, (q15_t)0xc2e3, (q15_t)0x706b, (q15_t)0xc2cd, (q15_t)0x705f, (q15_t)0xc2b7,
-  (q15_t)0x7053, (q15_t)0xc2a0, (q15_t)0x7047, (q15_t)0xc28a, (q15_t)0x703b, (q15_t)0xc274, (q15_t)0x702f, (q15_t)0xc25e,
-  (q15_t)0x7023, (q15_t)0xc248, (q15_t)0x7016, (q15_t)0xc232, (q15_t)0x700a, (q15_t)0xc21c, (q15_t)0x6ffe, (q15_t)0xc206,
-  (q15_t)0x6ff2, (q15_t)0xc1f0, (q15_t)0x6fe6, (q15_t)0xc1da, (q15_t)0x6fda, (q15_t)0xc1c4, (q15_t)0x6fcd, (q15_t)0xc1ae,
-  (q15_t)0x6fc1, (q15_t)0xc198, (q15_t)0x6fb5, (q15_t)0xc183, (q15_t)0x6fa9, (q15_t)0xc16d, (q15_t)0x6f9c, (q15_t)0xc157,
-  (q15_t)0x6f90, (q15_t)0xc141, (q15_t)0x6f84, (q15_t)0xc12b, (q15_t)0x6f77, (q15_t)0xc115, (q15_t)0x6f6b, (q15_t)0xc0ff,
-  (q15_t)0x6f5f, (q15_t)0xc0e9, (q15_t)0x6f52, (q15_t)0xc0d3, (q15_t)0x6f46, (q15_t)0xc0bd, (q15_t)0x6f39, (q15_t)0xc0a8,
-  (q15_t)0x6f2d, (q15_t)0xc092, (q15_t)0x6f20, (q15_t)0xc07c, (q15_t)0x6f14, (q15_t)0xc066, (q15_t)0x6f07, (q15_t)0xc050,
-  (q15_t)0x6efb, (q15_t)0xc03b, (q15_t)0x6eee, (q15_t)0xc025, (q15_t)0x6ee2, (q15_t)0xc00f, (q15_t)0x6ed5, (q15_t)0xbff9,
-  (q15_t)0x6ec9, (q15_t)0xbfe3, (q15_t)0x6ebc, (q15_t)0xbfce, (q15_t)0x6eaf, (q15_t)0xbfb8, (q15_t)0x6ea3, (q15_t)0xbfa2,
-  (q15_t)0x6e96, (q15_t)0xbf8d, (q15_t)0x6e89, (q15_t)0xbf77, (q15_t)0x6e7d, (q15_t)0xbf61, (q15_t)0x6e70, (q15_t)0xbf4b,
-  (q15_t)0x6e63, (q15_t)0xbf36, (q15_t)0x6e57, (q15_t)0xbf20, (q15_t)0x6e4a, (q15_t)0xbf0a, (q15_t)0x6e3d, (q15_t)0xbef5,
-  (q15_t)0x6e30, (q15_t)0xbedf, (q15_t)0x6e24, (q15_t)0xbeca, (q15_t)0x6e17, (q15_t)0xbeb4, (q15_t)0x6e0a, (q15_t)0xbe9e,
-  (q15_t)0x6dfd, (q15_t)0xbe89, (q15_t)0x6df0, (q15_t)0xbe73, (q15_t)0x6de3, (q15_t)0xbe5e, (q15_t)0x6dd6, (q15_t)0xbe48,
-  (q15_t)0x6dca, (q15_t)0xbe32, (q15_t)0x6dbd, (q15_t)0xbe1d, (q15_t)0x6db0, (q15_t)0xbe07, (q15_t)0x6da3, (q15_t)0xbdf2,
-  (q15_t)0x6d96, (q15_t)0xbddc, (q15_t)0x6d89, (q15_t)0xbdc7, (q15_t)0x6d7c, (q15_t)0xbdb1, (q15_t)0x6d6f, (q15_t)0xbd9c,
-  (q15_t)0x6d62, (q15_t)0xbd86, (q15_t)0x6d55, (q15_t)0xbd71, (q15_t)0x6d48, (q15_t)0xbd5b, (q15_t)0x6d3a, (q15_t)0xbd46,
-  (q15_t)0x6d2d, (q15_t)0xbd30, (q15_t)0x6d20, (q15_t)0xbd1b, (q15_t)0x6d13, (q15_t)0xbd06, (q15_t)0x6d06, (q15_t)0xbcf0,
-  (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6cec, (q15_t)0xbcc5, (q15_t)0x6cde, (q15_t)0xbcb0, (q15_t)0x6cd1, (q15_t)0xbc9b,
-  (q15_t)0x6cc4, (q15_t)0xbc85, (q15_t)0x6cb7, (q15_t)0xbc70, (q15_t)0x6ca9, (q15_t)0xbc5b, (q15_t)0x6c9c, (q15_t)0xbc45,
-  (q15_t)0x6c8f, (q15_t)0xbc30, (q15_t)0x6c81, (q15_t)0xbc1b, (q15_t)0x6c74, (q15_t)0xbc05, (q15_t)0x6c67, (q15_t)0xbbf0,
-  (q15_t)0x6c59, (q15_t)0xbbdb, (q15_t)0x6c4c, (q15_t)0xbbc5, (q15_t)0x6c3f, (q15_t)0xbbb0, (q15_t)0x6c31, (q15_t)0xbb9b,
-  (q15_t)0x6c24, (q15_t)0xbb86, (q15_t)0x6c16, (q15_t)0xbb70, (q15_t)0x6c09, (q15_t)0xbb5b, (q15_t)0x6bfb, (q15_t)0xbb46,
-  (q15_t)0x6bee, (q15_t)0xbb31, (q15_t)0x6be0, (q15_t)0xbb1c, (q15_t)0x6bd3, (q15_t)0xbb06, (q15_t)0x6bc5, (q15_t)0xbaf1,
-  (q15_t)0x6bb8, (q15_t)0xbadc, (q15_t)0x6baa, (q15_t)0xbac7, (q15_t)0x6b9c, (q15_t)0xbab2, (q15_t)0x6b8f, (q15_t)0xba9d,
-  (q15_t)0x6b81, (q15_t)0xba88, (q15_t)0x6b73, (q15_t)0xba73, (q15_t)0x6b66, (q15_t)0xba5d, (q15_t)0x6b58, (q15_t)0xba48,
-  (q15_t)0x6b4a, (q15_t)0xba33, (q15_t)0x6b3d, (q15_t)0xba1e, (q15_t)0x6b2f, (q15_t)0xba09, (q15_t)0x6b21, (q15_t)0xb9f4,
-  (q15_t)0x6b13, (q15_t)0xb9df, (q15_t)0x6b06, (q15_t)0xb9ca, (q15_t)0x6af8, (q15_t)0xb9b5, (q15_t)0x6aea, (q15_t)0xb9a0,
-  (q15_t)0x6adc, (q15_t)0xb98b, (q15_t)0x6ace, (q15_t)0xb976, (q15_t)0x6ac1, (q15_t)0xb961, (q15_t)0x6ab3, (q15_t)0xb94c,
-  (q15_t)0x6aa5, (q15_t)0xb937, (q15_t)0x6a97, (q15_t)0xb922, (q15_t)0x6a89, (q15_t)0xb90d, (q15_t)0x6a7b, (q15_t)0xb8f8,
-  (q15_t)0x6a6d, (q15_t)0xb8e4, (q15_t)0x6a5f, (q15_t)0xb8cf, (q15_t)0x6a51, (q15_t)0xb8ba, (q15_t)0x6a43, (q15_t)0xb8a5,
-  (q15_t)0x6a35, (q15_t)0xb890, (q15_t)0x6a27, (q15_t)0xb87b, (q15_t)0x6a19, (q15_t)0xb866, (q15_t)0x6a0b, (q15_t)0xb852,
-  (q15_t)0x69fd, (q15_t)0xb83d, (q15_t)0x69ef, (q15_t)0xb828, (q15_t)0x69e1, (q15_t)0xb813, (q15_t)0x69d3, (q15_t)0xb7fe,
-  (q15_t)0x69c4, (q15_t)0xb7ea, (q15_t)0x69b6, (q15_t)0xb7d5, (q15_t)0x69a8, (q15_t)0xb7c0, (q15_t)0x699a, (q15_t)0xb7ab,
-  (q15_t)0x698c, (q15_t)0xb797, (q15_t)0x697d, (q15_t)0xb782, (q15_t)0x696f, (q15_t)0xb76d, (q15_t)0x6961, (q15_t)0xb758,
-  (q15_t)0x6953, (q15_t)0xb744, (q15_t)0x6944, (q15_t)0xb72f, (q15_t)0x6936, (q15_t)0xb71a, (q15_t)0x6928, (q15_t)0xb706,
-  (q15_t)0x6919, (q15_t)0xb6f1, (q15_t)0x690b, (q15_t)0xb6dd, (q15_t)0x68fd, (q15_t)0xb6c8, (q15_t)0x68ee, (q15_t)0xb6b3,
-  (q15_t)0x68e0, (q15_t)0xb69f, (q15_t)0x68d1, (q15_t)0xb68a, (q15_t)0x68c3, (q15_t)0xb676, (q15_t)0x68b5, (q15_t)0xb661,
-  (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x6898, (q15_t)0xb638, (q15_t)0x6889, (q15_t)0xb623, (q15_t)0x687b, (q15_t)0xb60f,
-  (q15_t)0x686c, (q15_t)0xb5fa, (q15_t)0x685e, (q15_t)0xb5e6, (q15_t)0x684f, (q15_t)0xb5d1, (q15_t)0x6840, (q15_t)0xb5bd,
-  (q15_t)0x6832, (q15_t)0xb5a8, (q15_t)0x6823, (q15_t)0xb594, (q15_t)0x6815, (q15_t)0xb57f, (q15_t)0x6806, (q15_t)0xb56b,
-  (q15_t)0x67f7, (q15_t)0xb557, (q15_t)0x67e9, (q15_t)0xb542, (q15_t)0x67da, (q15_t)0xb52e, (q15_t)0x67cb, (q15_t)0xb519,
-  (q15_t)0x67bd, (q15_t)0xb505, (q15_t)0x67ae, (q15_t)0xb4f1, (q15_t)0x679f, (q15_t)0xb4dc, (q15_t)0x6790, (q15_t)0xb4c8,
-  (q15_t)0x6782, (q15_t)0xb4b4, (q15_t)0x6773, (q15_t)0xb49f, (q15_t)0x6764, (q15_t)0xb48b, (q15_t)0x6755, (q15_t)0xb477,
-  (q15_t)0x6746, (q15_t)0xb462, (q15_t)0x6737, (q15_t)0xb44e, (q15_t)0x6729, (q15_t)0xb43a, (q15_t)0x671a, (q15_t)0xb426,
-  (q15_t)0x670b, (q15_t)0xb411, (q15_t)0x66fc, (q15_t)0xb3fd, (q15_t)0x66ed, (q15_t)0xb3e9, (q15_t)0x66de, (q15_t)0xb3d5,
-  (q15_t)0x66cf, (q15_t)0xb3c1, (q15_t)0x66c0, (q15_t)0xb3ac, (q15_t)0x66b1, (q15_t)0xb398, (q15_t)0x66a2, (q15_t)0xb384,
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-  (q15_t)0x65dd, (q15_t)0xb27f, (q15_t)0x65ce, (q15_t)0xb26b, (q15_t)0x65bf, (q15_t)0xb257, (q15_t)0x65b0, (q15_t)0xb243,
-  (q15_t)0x65a0, (q15_t)0xb22f, (q15_t)0x6591, (q15_t)0xb21b, (q15_t)0x6582, (q15_t)0xb207, (q15_t)0x6573, (q15_t)0xb1f3,
-  (q15_t)0x6563, (q15_t)0xb1df, (q15_t)0x6554, (q15_t)0xb1cc, (q15_t)0x6545, (q15_t)0xb1b8, (q15_t)0x6535, (q15_t)0xb1a4,
-  (q15_t)0x6526, (q15_t)0xb190, (q15_t)0x6516, (q15_t)0xb17c, (q15_t)0x6507, (q15_t)0xb168, (q15_t)0x64f7, (q15_t)0xb154,
-  (q15_t)0x64e8, (q15_t)0xb141, (q15_t)0x64d9, (q15_t)0xb12d, (q15_t)0x64c9, (q15_t)0xb119, (q15_t)0x64ba, (q15_t)0xb105,
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-  (q15_t)0x646c, (q15_t)0xb0a2, (q15_t)0x645c, (q15_t)0xb08f, (q15_t)0x644d, (q15_t)0xb07b, (q15_t)0x643d, (q15_t)0xb067,
-  (q15_t)0x642d, (q15_t)0xb054, (q15_t)0x641e, (q15_t)0xb040, (q15_t)0x640e, (q15_t)0xb02c, (q15_t)0x63fe, (q15_t)0xb019,
-  (q15_t)0x63ef, (q15_t)0xb005, (q15_t)0x63df, (q15_t)0xaff1, (q15_t)0x63cf, (q15_t)0xafde, (q15_t)0x63c0, (q15_t)0xafca,
-  (q15_t)0x63b0, (q15_t)0xafb7, (q15_t)0x63a0, (q15_t)0xafa3, (q15_t)0x6390, (q15_t)0xaf90, (q15_t)0x6380, (q15_t)0xaf7c,
-  (q15_t)0x6371, (q15_t)0xaf69, (q15_t)0x6361, (q15_t)0xaf55, (q15_t)0x6351, (q15_t)0xaf41, (q15_t)0x6341, (q15_t)0xaf2e,
-  (q15_t)0x6331, (q15_t)0xaf1b, (q15_t)0x6321, (q15_t)0xaf07, (q15_t)0x6311, (q15_t)0xaef4, (q15_t)0x6301, (q15_t)0xaee0,
-  (q15_t)0x62f2, (q15_t)0xaecd, (q15_t)0x62e2, (q15_t)0xaeb9, (q15_t)0x62d2, (q15_t)0xaea6, (q15_t)0x62c2, (q15_t)0xae92,
-  (q15_t)0x62b2, (q15_t)0xae7f, (q15_t)0x62a2, (q15_t)0xae6c, (q15_t)0x6292, (q15_t)0xae58, (q15_t)0x6282, (q15_t)0xae45,
-  (q15_t)0x6271, (q15_t)0xae32, (q15_t)0x6261, (q15_t)0xae1e, (q15_t)0x6251, (q15_t)0xae0b, (q15_t)0x6241, (q15_t)0xadf8,
-  (q15_t)0x6231, (q15_t)0xade4, (q15_t)0x6221, (q15_t)0xadd1, (q15_t)0x6211, (q15_t)0xadbe, (q15_t)0x6201, (q15_t)0xadab,
-  (q15_t)0x61f1, (q15_t)0xad97, (q15_t)0x61e0, (q15_t)0xad84, (q15_t)0x61d0, (q15_t)0xad71, (q15_t)0x61c0, (q15_t)0xad5e,
-  (q15_t)0x61b0, (q15_t)0xad4b, (q15_t)0x619f, (q15_t)0xad37, (q15_t)0x618f, (q15_t)0xad24, (q15_t)0x617f, (q15_t)0xad11,
-  (q15_t)0x616f, (q15_t)0xacfe, (q15_t)0x615e, (q15_t)0xaceb, (q15_t)0x614e, (q15_t)0xacd8, (q15_t)0x613e, (q15_t)0xacc5,
-  (q15_t)0x612d, (q15_t)0xacb2, (q15_t)0x611d, (q15_t)0xac9e, (q15_t)0x610d, (q15_t)0xac8b, (q15_t)0x60fc, (q15_t)0xac78,
-  (q15_t)0x60ec, (q15_t)0xac65, (q15_t)0x60db, (q15_t)0xac52, (q15_t)0x60cb, (q15_t)0xac3f, (q15_t)0x60ba, (q15_t)0xac2c,
-  (q15_t)0x60aa, (q15_t)0xac19, (q15_t)0x6099, (q15_t)0xac06, (q15_t)0x6089, (q15_t)0xabf3, (q15_t)0x6078, (q15_t)0xabe0,
-  (q15_t)0x6068, (q15_t)0xabcd, (q15_t)0x6057, (q15_t)0xabbb, (q15_t)0x6047, (q15_t)0xaba8, (q15_t)0x6036, (q15_t)0xab95,
-  (q15_t)0x6026, (q15_t)0xab82, (q15_t)0x6015, (q15_t)0xab6f, (q15_t)0x6004, (q15_t)0xab5c, (q15_t)0x5ff4, (q15_t)0xab49,
-  (q15_t)0x5fe3, (q15_t)0xab36, (q15_t)0x5fd3, (q15_t)0xab24, (q15_t)0x5fc2, (q15_t)0xab11, (q15_t)0x5fb1, (q15_t)0xaafe,
-  (q15_t)0x5fa0, (q15_t)0xaaeb, (q15_t)0x5f90, (q15_t)0xaad8, (q15_t)0x5f7f, (q15_t)0xaac6, (q15_t)0x5f6e, (q15_t)0xaab3,
-  (q15_t)0x5f5e, (q15_t)0xaaa0, (q15_t)0x5f4d, (q15_t)0xaa8e, (q15_t)0x5f3c, (q15_t)0xaa7b, (q15_t)0x5f2b, (q15_t)0xaa68,
-  (q15_t)0x5f1a, (q15_t)0xaa55, (q15_t)0x5f0a, (q15_t)0xaa43, (q15_t)0x5ef9, (q15_t)0xaa30, (q15_t)0x5ee8, (q15_t)0xaa1d,
-  (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5ec6, (q15_t)0xa9f8, (q15_t)0x5eb5, (q15_t)0xa9e6, (q15_t)0x5ea4, (q15_t)0xa9d3,
-  (q15_t)0x5e93, (q15_t)0xa9c0, (q15_t)0x5e82, (q15_t)0xa9ae, (q15_t)0x5e71, (q15_t)0xa99b, (q15_t)0x5e60, (q15_t)0xa989,
-  (q15_t)0x5e50, (q15_t)0xa976, (q15_t)0x5e3f, (q15_t)0xa964, (q15_t)0x5e2d, (q15_t)0xa951, (q15_t)0x5e1c, (q15_t)0xa93f,
-  (q15_t)0x5e0b, (q15_t)0xa92c, (q15_t)0x5dfa, (q15_t)0xa91a, (q15_t)0x5de9, (q15_t)0xa907, (q15_t)0x5dd8, (q15_t)0xa8f5,
-  (q15_t)0x5dc7, (q15_t)0xa8e3, (q15_t)0x5db6, (q15_t)0xa8d0, (q15_t)0x5da5, (q15_t)0xa8be, (q15_t)0x5d94, (q15_t)0xa8ab,
-  (q15_t)0x5d83, (q15_t)0xa899, (q15_t)0x5d71, (q15_t)0xa887, (q15_t)0x5d60, (q15_t)0xa874, (q15_t)0x5d4f, (q15_t)0xa862,
-  (q15_t)0x5d3e, (q15_t)0xa850, (q15_t)0x5d2d, (q15_t)0xa83d, (q15_t)0x5d1b, (q15_t)0xa82b, (q15_t)0x5d0a, (q15_t)0xa819,
-  (q15_t)0x5cf9, (q15_t)0xa807, (q15_t)0x5ce8, (q15_t)0xa7f4, (q15_t)0x5cd6, (q15_t)0xa7e2, (q15_t)0x5cc5, (q15_t)0xa7d0,
-  (q15_t)0x5cb4, (q15_t)0xa7be, (q15_t)0x5ca2, (q15_t)0xa7ab, (q15_t)0x5c91, (q15_t)0xa799, (q15_t)0x5c80, (q15_t)0xa787,
-  (q15_t)0x5c6e, (q15_t)0xa775, (q15_t)0x5c5d, (q15_t)0xa763, (q15_t)0x5c4b, (q15_t)0xa751, (q15_t)0x5c3a, (q15_t)0xa73f,
-  (q15_t)0x5c29, (q15_t)0xa72c, (q15_t)0x5c17, (q15_t)0xa71a, (q15_t)0x5c06, (q15_t)0xa708, (q15_t)0x5bf4, (q15_t)0xa6f6,
-  (q15_t)0x5be3, (q15_t)0xa6e4, (q15_t)0x5bd1, (q15_t)0xa6d2, (q15_t)0x5bc0, (q15_t)0xa6c0, (q15_t)0x5bae, (q15_t)0xa6ae,
-  (q15_t)0x5b9d, (q15_t)0xa69c, (q15_t)0x5b8b, (q15_t)0xa68a, (q15_t)0x5b79, (q15_t)0xa678, (q15_t)0x5b68, (q15_t)0xa666,
-  (q15_t)0x5b56, (q15_t)0xa654, (q15_t)0x5b45, (q15_t)0xa642, (q15_t)0x5b33, (q15_t)0xa630, (q15_t)0x5b21, (q15_t)0xa61f,
-  (q15_t)0x5b10, (q15_t)0xa60d, (q15_t)0x5afe, (q15_t)0xa5fb, (q15_t)0x5aec, (q15_t)0xa5e9, (q15_t)0x5adb, (q15_t)0xa5d7,
-  (q15_t)0x5ac9, (q15_t)0xa5c5, (q15_t)0x5ab7, (q15_t)0xa5b3, (q15_t)0x5aa5, (q15_t)0xa5a2, (q15_t)0x5a94, (q15_t)0xa590,
-  (q15_t)0x5a82, (q15_t)0xa57e, (q15_t)0x5a70, (q15_t)0xa56c, (q15_t)0x5a5e, (q15_t)0xa55b, (q15_t)0x5a4d, (q15_t)0xa549,
-  (q15_t)0x5a3b, (q15_t)0xa537, (q15_t)0x5a29, (q15_t)0xa525, (q15_t)0x5a17, (q15_t)0xa514, (q15_t)0x5a05, (q15_t)0xa502,
-  (q15_t)0x59f3, (q15_t)0xa4f0, (q15_t)0x59e1, (q15_t)0xa4df, (q15_t)0x59d0, (q15_t)0xa4cd, (q15_t)0x59be, (q15_t)0xa4bb,
-  (q15_t)0x59ac, (q15_t)0xa4aa, (q15_t)0x599a, (q15_t)0xa498, (q15_t)0x5988, (q15_t)0xa487, (q15_t)0x5976, (q15_t)0xa475,
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-  (q15_t)0x58d4, (q15_t)0xa3d7, (q15_t)0x58c1, (q15_t)0xa3c6, (q15_t)0x58af, (q15_t)0xa3b5, (q15_t)0x589d, (q15_t)0xa3a3,
-  (q15_t)0x588b, (q15_t)0xa392, (q15_t)0x5879, (q15_t)0xa380, (q15_t)0x5867, (q15_t)0xa36f, (q15_t)0x5855, (q15_t)0xa35e,
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-  (q15_t)0x57b0, (q15_t)0xa2c2, (q15_t)0x579e, (q15_t)0xa2b1, (q15_t)0x578c, (q15_t)0xa2a0, (q15_t)0x5779, (q15_t)0xa28f,
-  (q15_t)0x5767, (q15_t)0xa27d, (q15_t)0x5755, (q15_t)0xa26c, (q15_t)0x5742, (q15_t)0xa25b, (q15_t)0x5730, (q15_t)0xa24a,
-  (q15_t)0x571d, (q15_t)0xa239, (q15_t)0x570b, (q15_t)0xa228, (q15_t)0x56f9, (q15_t)0xa217, (q15_t)0x56e6, (q15_t)0xa206,
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-  (q15_t)0x568a, (q15_t)0xa1b0, (q15_t)0x5677, (q15_t)0xa1a0, (q15_t)0x5665, (q15_t)0xa18f, (q15_t)0x5652, (q15_t)0xa17e,
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-  (q15_t)0x55f5, (q15_t)0xa129, (q15_t)0x55e3, (q15_t)0xa118, (q15_t)0x55d0, (q15_t)0xa107, (q15_t)0x55bd, (q15_t)0xa0f6,
-  (q15_t)0x55ab, (q15_t)0xa0e6, (q15_t)0x5598, (q15_t)0xa0d5, (q15_t)0x5585, (q15_t)0xa0c4, (q15_t)0x5572, (q15_t)0xa0b3,
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-  (q15_t)0x54ca, (q15_t)0xa01d, (q15_t)0x54b7, (q15_t)0xa00c, (q15_t)0x54a4, (q15_t)0x9ffc, (q15_t)0x5491, (q15_t)0x9feb,
-  (q15_t)0x547e, (q15_t)0x9fda, (q15_t)0x546b, (q15_t)0x9fca, (q15_t)0x5458, (q15_t)0x9fb9, (q15_t)0x5445, (q15_t)0x9fa9,
-  (q15_t)0x5433, (q15_t)0x9f98, (q15_t)0x5420, (q15_t)0x9f88, (q15_t)0x540d, (q15_t)0x9f77, (q15_t)0x53fa, (q15_t)0x9f67,
-  (q15_t)0x53e7, (q15_t)0x9f56, (q15_t)0x53d4, (q15_t)0x9f46, (q15_t)0x53c1, (q15_t)0x9f35, (q15_t)0x53ae, (q15_t)0x9f25,
-  (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x5388, (q15_t)0x9f04, (q15_t)0x5375, (q15_t)0x9ef3, (q15_t)0x5362, (q15_t)0x9ee3,
-  (q15_t)0x534e, (q15_t)0x9ed3, (q15_t)0x533b, (q15_t)0x9ec2, (q15_t)0x5328, (q15_t)0x9eb2, (q15_t)0x5315, (q15_t)0x9ea2,
-  (q15_t)0x5302, (q15_t)0x9e91, (q15_t)0x52ef, (q15_t)0x9e81, (q15_t)0x52dc, (q15_t)0x9e71, (q15_t)0x52c9, (q15_t)0x9e61,
-  (q15_t)0x52b5, (q15_t)0x9e50, (q15_t)0x52a2, (q15_t)0x9e40, (q15_t)0x528f, (q15_t)0x9e30, (q15_t)0x527c, (q15_t)0x9e20,
-  (q15_t)0x5269, (q15_t)0x9e0f, (q15_t)0x5255, (q15_t)0x9dff, (q15_t)0x5242, (q15_t)0x9def, (q15_t)0x522f, (q15_t)0x9ddf,
-  (q15_t)0x521c, (q15_t)0x9dcf, (q15_t)0x5208, (q15_t)0x9dbf, (q15_t)0x51f5, (q15_t)0x9daf, (q15_t)0x51e2, (q15_t)0x9d9f,
-  (q15_t)0x51ce, (q15_t)0x9d8f, (q15_t)0x51bb, (q15_t)0x9d7e, (q15_t)0x51a8, (q15_t)0x9d6e, (q15_t)0x5194, (q15_t)0x9d5e,
-  (q15_t)0x5181, (q15_t)0x9d4e, (q15_t)0x516e, (q15_t)0x9d3e, (q15_t)0x515a, (q15_t)0x9d2e, (q15_t)0x5147, (q15_t)0x9d1e,
-  (q15_t)0x5133, (q15_t)0x9d0e, (q15_t)0x5120, (q15_t)0x9cff, (q15_t)0x510c, (q15_t)0x9cef, (q15_t)0x50f9, (q15_t)0x9cdf,
-  (q15_t)0x50e5, (q15_t)0x9ccf, (q15_t)0x50d2, (q15_t)0x9cbf, (q15_t)0x50bf, (q15_t)0x9caf, (q15_t)0x50ab, (q15_t)0x9c9f,
-  (q15_t)0x5097, (q15_t)0x9c8f, (q15_t)0x5084, (q15_t)0x9c80, (q15_t)0x5070, (q15_t)0x9c70, (q15_t)0x505d, (q15_t)0x9c60,
-  (q15_t)0x5049, (q15_t)0x9c50, (q15_t)0x5036, (q15_t)0x9c40, (q15_t)0x5022, (q15_t)0x9c31, (q15_t)0x500f, (q15_t)0x9c21,
-  (q15_t)0x4ffb, (q15_t)0x9c11, (q15_t)0x4fe7, (q15_t)0x9c02, (q15_t)0x4fd4, (q15_t)0x9bf2, (q15_t)0x4fc0, (q15_t)0x9be2,
-  (q15_t)0x4fac, (q15_t)0x9bd3, (q15_t)0x4f99, (q15_t)0x9bc3, (q15_t)0x4f85, (q15_t)0x9bb3, (q15_t)0x4f71, (q15_t)0x9ba4,
-  (q15_t)0x4f5e, (q15_t)0x9b94, (q15_t)0x4f4a, (q15_t)0x9b85, (q15_t)0x4f36, (q15_t)0x9b75, (q15_t)0x4f22, (q15_t)0x9b65,
-  (q15_t)0x4f0f, (q15_t)0x9b56, (q15_t)0x4efb, (q15_t)0x9b46, (q15_t)0x4ee7, (q15_t)0x9b37, (q15_t)0x4ed3, (q15_t)0x9b27,
-  (q15_t)0x4ebf, (q15_t)0x9b18, (q15_t)0x4eac, (q15_t)0x9b09, (q15_t)0x4e98, (q15_t)0x9af9, (q15_t)0x4e84, (q15_t)0x9aea,
-  (q15_t)0x4e70, (q15_t)0x9ada, (q15_t)0x4e5c, (q15_t)0x9acb, (q15_t)0x4e48, (q15_t)0x9abb, (q15_t)0x4e34, (q15_t)0x9aac,
-  (q15_t)0x4e21, (q15_t)0x9a9d, (q15_t)0x4e0d, (q15_t)0x9a8d, (q15_t)0x4df9, (q15_t)0x9a7e, (q15_t)0x4de5, (q15_t)0x9a6f,
-  (q15_t)0x4dd1, (q15_t)0x9a60, (q15_t)0x4dbd, (q15_t)0x9a50, (q15_t)0x4da9, (q15_t)0x9a41, (q15_t)0x4d95, (q15_t)0x9a32,
-  (q15_t)0x4d81, (q15_t)0x9a23, (q15_t)0x4d6d, (q15_t)0x9a13, (q15_t)0x4d59, (q15_t)0x9a04, (q15_t)0x4d45, (q15_t)0x99f5,
-  (q15_t)0x4d31, (q15_t)0x99e6, (q15_t)0x4d1d, (q15_t)0x99d7, (q15_t)0x4d09, (q15_t)0x99c7, (q15_t)0x4cf5, (q15_t)0x99b8,
-  (q15_t)0x4ce1, (q15_t)0x99a9, (q15_t)0x4ccc, (q15_t)0x999a, (q15_t)0x4cb8, (q15_t)0x998b, (q15_t)0x4ca4, (q15_t)0x997c,
-  (q15_t)0x4c90, (q15_t)0x996d, (q15_t)0x4c7c, (q15_t)0x995e, (q15_t)0x4c68, (q15_t)0x994f, (q15_t)0x4c54, (q15_t)0x9940,
-  (q15_t)0x4c3f, (q15_t)0x9931, (q15_t)0x4c2b, (q15_t)0x9922, (q15_t)0x4c17, (q15_t)0x9913, (q15_t)0x4c03, (q15_t)0x9904,
-  (q15_t)0x4bef, (q15_t)0x98f5, (q15_t)0x4bda, (q15_t)0x98e6, (q15_t)0x4bc6, (q15_t)0x98d7, (q15_t)0x4bb2, (q15_t)0x98c9,
-  (q15_t)0x4b9e, (q15_t)0x98ba, (q15_t)0x4b89, (q15_t)0x98ab, (q15_t)0x4b75, (q15_t)0x989c, (q15_t)0x4b61, (q15_t)0x988d,
-  (q15_t)0x4b4c, (q15_t)0x987e, (q15_t)0x4b38, (q15_t)0x9870, (q15_t)0x4b24, (q15_t)0x9861, (q15_t)0x4b0f, (q15_t)0x9852,
-  (q15_t)0x4afb, (q15_t)0x9843, (q15_t)0x4ae7, (q15_t)0x9835, (q15_t)0x4ad2, (q15_t)0x9826, (q15_t)0x4abe, (q15_t)0x9817,
-  (q15_t)0x4aa9, (q15_t)0x9809, (q15_t)0x4a95, (q15_t)0x97fa, (q15_t)0x4a81, (q15_t)0x97eb, (q15_t)0x4a6c, (q15_t)0x97dd,
-  (q15_t)0x4a58, (q15_t)0x97ce, (q15_t)0x4a43, (q15_t)0x97c0, (q15_t)0x4a2f, (q15_t)0x97b1, (q15_t)0x4a1a, (q15_t)0x97a2,
-  (q15_t)0x4a06, (q15_t)0x9794, (q15_t)0x49f1, (q15_t)0x9785, (q15_t)0x49dd, (q15_t)0x9777, (q15_t)0x49c8, (q15_t)0x9768,
-  (q15_t)0x49b4, (q15_t)0x975a, (q15_t)0x499f, (q15_t)0x974b, (q15_t)0x498a, (q15_t)0x973d, (q15_t)0x4976, (q15_t)0x972f,
-  (q15_t)0x4961, (q15_t)0x9720, (q15_t)0x494d, (q15_t)0x9712, (q15_t)0x4938, (q15_t)0x9703, (q15_t)0x4923, (q15_t)0x96f5,
-  (q15_t)0x490f, (q15_t)0x96e7, (q15_t)0x48fa, (q15_t)0x96d8, (q15_t)0x48e6, (q15_t)0x96ca, (q15_t)0x48d1, (q15_t)0x96bc,
-  (q15_t)0x48bc, (q15_t)0x96ad, (q15_t)0x48a8, (q15_t)0x969f, (q15_t)0x4893, (q15_t)0x9691, (q15_t)0x487e, (q15_t)0x9683,
-  (q15_t)0x4869, (q15_t)0x9674, (q15_t)0x4855, (q15_t)0x9666, (q15_t)0x4840, (q15_t)0x9658, (q15_t)0x482b, (q15_t)0x964a,
-  (q15_t)0x4816, (q15_t)0x963c, (q15_t)0x4802, (q15_t)0x962d, (q15_t)0x47ed, (q15_t)0x961f, (q15_t)0x47d8, (q15_t)0x9611,
-  (q15_t)0x47c3, (q15_t)0x9603, (q15_t)0x47ae, (q15_t)0x95f5, (q15_t)0x479a, (q15_t)0x95e7, (q15_t)0x4785, (q15_t)0x95d9,
-  (q15_t)0x4770, (q15_t)0x95cb, (q15_t)0x475b, (q15_t)0x95bd, (q15_t)0x4746, (q15_t)0x95af, (q15_t)0x4731, (q15_t)0x95a1,
-  (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x4708, (q15_t)0x9585, (q15_t)0x46f3, (q15_t)0x9577, (q15_t)0x46de, (q15_t)0x9569,
-  (q15_t)0x46c9, (q15_t)0x955b, (q15_t)0x46b4, (q15_t)0x954d, (q15_t)0x469f, (q15_t)0x953f, (q15_t)0x468a, (q15_t)0x9532,
-  (q15_t)0x4675, (q15_t)0x9524, (q15_t)0x4660, (q15_t)0x9516, (q15_t)0x464b, (q15_t)0x9508, (q15_t)0x4636, (q15_t)0x94fa,
-  (q15_t)0x4621, (q15_t)0x94ed, (q15_t)0x460c, (q15_t)0x94df, (q15_t)0x45f7, (q15_t)0x94d1, (q15_t)0x45e2, (q15_t)0x94c3,
-  (q15_t)0x45cd, (q15_t)0x94b6, (q15_t)0x45b8, (q15_t)0x94a8, (q15_t)0x45a3, (q15_t)0x949a, (q15_t)0x458d, (q15_t)0x948d,
-  (q15_t)0x4578, (q15_t)0x947f, (q15_t)0x4563, (q15_t)0x9471, (q15_t)0x454e, (q15_t)0x9464, (q15_t)0x4539, (q15_t)0x9456,
-  (q15_t)0x4524, (q15_t)0x9448, (q15_t)0x450f, (q15_t)0x943b, (q15_t)0x44fa, (q15_t)0x942d, (q15_t)0x44e4, (q15_t)0x9420,
-  (q15_t)0x44cf, (q15_t)0x9412, (q15_t)0x44ba, (q15_t)0x9405, (q15_t)0x44a5, (q15_t)0x93f7, (q15_t)0x4490, (q15_t)0x93ea,
-  (q15_t)0x447a, (q15_t)0x93dc, (q15_t)0x4465, (q15_t)0x93cf, (q15_t)0x4450, (q15_t)0x93c1, (q15_t)0x443b, (q15_t)0x93b4,
-  (q15_t)0x4425, (q15_t)0x93a7, (q15_t)0x4410, (q15_t)0x9399, (q15_t)0x43fb, (q15_t)0x938c, (q15_t)0x43e5, (q15_t)0x937f,
-  (q15_t)0x43d0, (q15_t)0x9371, (q15_t)0x43bb, (q15_t)0x9364, (q15_t)0x43a5, (q15_t)0x9357, (q15_t)0x4390, (q15_t)0x9349,
-  (q15_t)0x437b, (q15_t)0x933c, (q15_t)0x4365, (q15_t)0x932f, (q15_t)0x4350, (q15_t)0x9322, (q15_t)0x433b, (q15_t)0x9314,
-  (q15_t)0x4325, (q15_t)0x9307, (q15_t)0x4310, (q15_t)0x92fa, (q15_t)0x42fa, (q15_t)0x92ed, (q15_t)0x42e5, (q15_t)0x92e0,
-  (q15_t)0x42d0, (q15_t)0x92d3, (q15_t)0x42ba, (q15_t)0x92c6, (q15_t)0x42a5, (q15_t)0x92b8, (q15_t)0x428f, (q15_t)0x92ab,
-  (q15_t)0x427a, (q15_t)0x929e, (q15_t)0x4264, (q15_t)0x9291, (q15_t)0x424f, (q15_t)0x9284, (q15_t)0x4239, (q15_t)0x9277,
-  (q15_t)0x4224, (q15_t)0x926a, (q15_t)0x420e, (q15_t)0x925d, (q15_t)0x41f9, (q15_t)0x9250, (q15_t)0x41e3, (q15_t)0x9243,
-  (q15_t)0x41ce, (q15_t)0x9236, (q15_t)0x41b8, (q15_t)0x922a, (q15_t)0x41a2, (q15_t)0x921d, (q15_t)0x418d, (q15_t)0x9210,
-  (q15_t)0x4177, (q15_t)0x9203, (q15_t)0x4162, (q15_t)0x91f6, (q15_t)0x414c, (q15_t)0x91e9, (q15_t)0x4136, (q15_t)0x91dc,
-  (q15_t)0x4121, (q15_t)0x91d0, (q15_t)0x410b, (q15_t)0x91c3, (q15_t)0x40f6, (q15_t)0x91b6, (q15_t)0x40e0, (q15_t)0x91a9,
-  (q15_t)0x40ca, (q15_t)0x919d, (q15_t)0x40b5, (q15_t)0x9190, (q15_t)0x409f, (q15_t)0x9183, (q15_t)0x4089, (q15_t)0x9177,
-  (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x405e, (q15_t)0x915d, (q15_t)0x4048, (q15_t)0x9151, (q15_t)0x4032, (q15_t)0x9144,
-  (q15_t)0x401d, (q15_t)0x9137, (q15_t)0x4007, (q15_t)0x912b, (q15_t)0x3ff1, (q15_t)0x911e, (q15_t)0x3fdb, (q15_t)0x9112,
-  (q15_t)0x3fc5, (q15_t)0x9105, (q15_t)0x3fb0, (q15_t)0x90f9, (q15_t)0x3f9a, (q15_t)0x90ec, (q15_t)0x3f84, (q15_t)0x90e0,
-  (q15_t)0x3f6e, (q15_t)0x90d3, (q15_t)0x3f58, (q15_t)0x90c7, (q15_t)0x3f43, (q15_t)0x90ba, (q15_t)0x3f2d, (q15_t)0x90ae,
-  (q15_t)0x3f17, (q15_t)0x90a1, (q15_t)0x3f01, (q15_t)0x9095, (q15_t)0x3eeb, (q15_t)0x9089, (q15_t)0x3ed5, (q15_t)0x907c,
-  (q15_t)0x3ebf, (q15_t)0x9070, (q15_t)0x3ea9, (q15_t)0x9064, (q15_t)0x3e93, (q15_t)0x9057, (q15_t)0x3e7d, (q15_t)0x904b,
-  (q15_t)0x3e68, (q15_t)0x903f, (q15_t)0x3e52, (q15_t)0x9033, (q15_t)0x3e3c, (q15_t)0x9026, (q15_t)0x3e26, (q15_t)0x901a,
-  (q15_t)0x3e10, (q15_t)0x900e, (q15_t)0x3dfa, (q15_t)0x9002, (q15_t)0x3de4, (q15_t)0x8ff6, (q15_t)0x3dce, (q15_t)0x8fea,
-  (q15_t)0x3db8, (q15_t)0x8fdd, (q15_t)0x3da2, (q15_t)0x8fd1, (q15_t)0x3d8c, (q15_t)0x8fc5, (q15_t)0x3d76, (q15_t)0x8fb9,
-  (q15_t)0x3d60, (q15_t)0x8fad, (q15_t)0x3d49, (q15_t)0x8fa1, (q15_t)0x3d33, (q15_t)0x8f95, (q15_t)0x3d1d, (q15_t)0x8f89,
-  (q15_t)0x3d07, (q15_t)0x8f7d, (q15_t)0x3cf1, (q15_t)0x8f71, (q15_t)0x3cdb, (q15_t)0x8f65, (q15_t)0x3cc5, (q15_t)0x8f59,
-  (q15_t)0x3caf, (q15_t)0x8f4d, (q15_t)0x3c99, (q15_t)0x8f41, (q15_t)0x3c83, (q15_t)0x8f35, (q15_t)0x3c6c, (q15_t)0x8f2a,
-  (q15_t)0x3c56, (q15_t)0x8f1e, (q15_t)0x3c40, (q15_t)0x8f12, (q15_t)0x3c2a, (q15_t)0x8f06, (q15_t)0x3c14, (q15_t)0x8efa,
-  (q15_t)0x3bfd, (q15_t)0x8eee, (q15_t)0x3be7, (q15_t)0x8ee3, (q15_t)0x3bd1, (q15_t)0x8ed7, (q15_t)0x3bbb, (q15_t)0x8ecb,
-  (q15_t)0x3ba5, (q15_t)0x8ebf, (q15_t)0x3b8e, (q15_t)0x8eb4, (q15_t)0x3b78, (q15_t)0x8ea8, (q15_t)0x3b62, (q15_t)0x8e9c,
-  (q15_t)0x3b4c, (q15_t)0x8e91, (q15_t)0x3b35, (q15_t)0x8e85, (q15_t)0x3b1f, (q15_t)0x8e7a, (q15_t)0x3b09, (q15_t)0x8e6e,
-  (q15_t)0x3af2, (q15_t)0x8e62, (q15_t)0x3adc, (q15_t)0x8e57, (q15_t)0x3ac6, (q15_t)0x8e4b, (q15_t)0x3aaf, (q15_t)0x8e40,
-  (q15_t)0x3a99, (q15_t)0x8e34, (q15_t)0x3a83, (q15_t)0x8e29, (q15_t)0x3a6c, (q15_t)0x8e1d, (q15_t)0x3a56, (q15_t)0x8e12,
-  (q15_t)0x3a40, (q15_t)0x8e06, (q15_t)0x3a29, (q15_t)0x8dfb, (q15_t)0x3a13, (q15_t)0x8def, (q15_t)0x39fd, (q15_t)0x8de4,
-  (q15_t)0x39e6, (q15_t)0x8dd9, (q15_t)0x39d0, (q15_t)0x8dcd, (q15_t)0x39b9, (q15_t)0x8dc2, (q15_t)0x39a3, (q15_t)0x8db7,
-  (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3976, (q15_t)0x8da0, (q15_t)0x395f, (q15_t)0x8d95, (q15_t)0x3949, (q15_t)0x8d8a,
-  (q15_t)0x3932, (q15_t)0x8d7e, (q15_t)0x391c, (q15_t)0x8d73, (q15_t)0x3906, (q15_t)0x8d68, (q15_t)0x38ef, (q15_t)0x8d5d,
-  (q15_t)0x38d8, (q15_t)0x8d51, (q15_t)0x38c2, (q15_t)0x8d46, (q15_t)0x38ab, (q15_t)0x8d3b, (q15_t)0x3895, (q15_t)0x8d30,
-  (q15_t)0x387e, (q15_t)0x8d25, (q15_t)0x3868, (q15_t)0x8d1a, (q15_t)0x3851, (q15_t)0x8d0f, (q15_t)0x383b, (q15_t)0x8d04,
-  (q15_t)0x3824, (q15_t)0x8cf9, (q15_t)0x380d, (q15_t)0x8cee, (q15_t)0x37f7, (q15_t)0x8ce3, (q15_t)0x37e0, (q15_t)0x8cd8,
-  (q15_t)0x37ca, (q15_t)0x8ccd, (q15_t)0x37b3, (q15_t)0x8cc2, (q15_t)0x379c, (q15_t)0x8cb7, (q15_t)0x3786, (q15_t)0x8cac,
-  (q15_t)0x376f, (q15_t)0x8ca1, (q15_t)0x3758, (q15_t)0x8c96, (q15_t)0x3742, (q15_t)0x8c8b, (q15_t)0x372b, (q15_t)0x8c81,
-  (q15_t)0x3714, (q15_t)0x8c76, (q15_t)0x36fe, (q15_t)0x8c6b, (q15_t)0x36e7, (q15_t)0x8c60, (q15_t)0x36d0, (q15_t)0x8c55,
-  (q15_t)0x36ba, (q15_t)0x8c4b, (q15_t)0x36a3, (q15_t)0x8c40, (q15_t)0x368c, (q15_t)0x8c35, (q15_t)0x3675, (q15_t)0x8c2a,
-  (q15_t)0x365f, (q15_t)0x8c20, (q15_t)0x3648, (q15_t)0x8c15, (q15_t)0x3631, (q15_t)0x8c0a, (q15_t)0x361a, (q15_t)0x8c00,
-  (q15_t)0x3604, (q15_t)0x8bf5, (q15_t)0x35ed, (q15_t)0x8beb, (q15_t)0x35d6, (q15_t)0x8be0, (q15_t)0x35bf, (q15_t)0x8bd5,
-  (q15_t)0x35a8, (q15_t)0x8bcb, (q15_t)0x3592, (q15_t)0x8bc0, (q15_t)0x357b, (q15_t)0x8bb6, (q15_t)0x3564, (q15_t)0x8bab,
-  (q15_t)0x354d, (q15_t)0x8ba1, (q15_t)0x3536, (q15_t)0x8b96, (q15_t)0x351f, (q15_t)0x8b8c, (q15_t)0x3508, (q15_t)0x8b82,
-  (q15_t)0x34f2, (q15_t)0x8b77, (q15_t)0x34db, (q15_t)0x8b6d, (q15_t)0x34c4, (q15_t)0x8b62, (q15_t)0x34ad, (q15_t)0x8b58,
-  (q15_t)0x3496, (q15_t)0x8b4e, (q15_t)0x347f, (q15_t)0x8b43, (q15_t)0x3468, (q15_t)0x8b39, (q15_t)0x3451, (q15_t)0x8b2f,
-  (q15_t)0x343a, (q15_t)0x8b25, (q15_t)0x3423, (q15_t)0x8b1a, (q15_t)0x340c, (q15_t)0x8b10, (q15_t)0x33f5, (q15_t)0x8b06,
-  (q15_t)0x33de, (q15_t)0x8afc, (q15_t)0x33c7, (q15_t)0x8af1, (q15_t)0x33b0, (q15_t)0x8ae7, (q15_t)0x3399, (q15_t)0x8add,
-  (q15_t)0x3382, (q15_t)0x8ad3, (q15_t)0x336b, (q15_t)0x8ac9, (q15_t)0x3354, (q15_t)0x8abf, (q15_t)0x333d, (q15_t)0x8ab5,
-  (q15_t)0x3326, (q15_t)0x8aab, (q15_t)0x330f, (q15_t)0x8aa1, (q15_t)0x32f8, (q15_t)0x8a97, (q15_t)0x32e1, (q15_t)0x8a8d,
-  (q15_t)0x32ca, (q15_t)0x8a83, (q15_t)0x32b3, (q15_t)0x8a79, (q15_t)0x329c, (q15_t)0x8a6f, (q15_t)0x3285, (q15_t)0x8a65,
-  (q15_t)0x326e, (q15_t)0x8a5b, (q15_t)0x3257, (q15_t)0x8a51, (q15_t)0x3240, (q15_t)0x8a47, (q15_t)0x3228, (q15_t)0x8a3d,
-  (q15_t)0x3211, (q15_t)0x8a34, (q15_t)0x31fa, (q15_t)0x8a2a, (q15_t)0x31e3, (q15_t)0x8a20, (q15_t)0x31cc, (q15_t)0x8a16,
-  (q15_t)0x31b5, (q15_t)0x8a0c, (q15_t)0x319e, (q15_t)0x8a03, (q15_t)0x3186, (q15_t)0x89f9, (q15_t)0x316f, (q15_t)0x89ef,
-  (q15_t)0x3158, (q15_t)0x89e5, (q15_t)0x3141, (q15_t)0x89dc, (q15_t)0x312a, (q15_t)0x89d2, (q15_t)0x3112, (q15_t)0x89c8,
-  (q15_t)0x30fb, (q15_t)0x89bf, (q15_t)0x30e4, (q15_t)0x89b5, (q15_t)0x30cd, (q15_t)0x89ac, (q15_t)0x30b6, (q15_t)0x89a2,
-  (q15_t)0x309e, (q15_t)0x8998, (q15_t)0x3087, (q15_t)0x898f, (q15_t)0x3070, (q15_t)0x8985, (q15_t)0x3059, (q15_t)0x897c,
-  (q15_t)0x3041, (q15_t)0x8972, (q15_t)0x302a, (q15_t)0x8969, (q15_t)0x3013, (q15_t)0x8960, (q15_t)0x2ffb, (q15_t)0x8956,
-  (q15_t)0x2fe4, (q15_t)0x894d, (q15_t)0x2fcd, (q15_t)0x8943, (q15_t)0x2fb5, (q15_t)0x893a, (q15_t)0x2f9e, (q15_t)0x8931,
-  (q15_t)0x2f87, (q15_t)0x8927, (q15_t)0x2f6f, (q15_t)0x891e, (q15_t)0x2f58, (q15_t)0x8915, (q15_t)0x2f41, (q15_t)0x890b,
-  (q15_t)0x2f29, (q15_t)0x8902, (q15_t)0x2f12, (q15_t)0x88f9, (q15_t)0x2efb, (q15_t)0x88f0, (q15_t)0x2ee3, (q15_t)0x88e6,
-  (q15_t)0x2ecc, (q15_t)0x88dd, (q15_t)0x2eb5, (q15_t)0x88d4, (q15_t)0x2e9d, (q15_t)0x88cb, (q15_t)0x2e86, (q15_t)0x88c2,
-  (q15_t)0x2e6e, (q15_t)0x88b9, (q15_t)0x2e57, (q15_t)0x88af, (q15_t)0x2e3f, (q15_t)0x88a6, (q15_t)0x2e28, (q15_t)0x889d,
-  (q15_t)0x2e11, (q15_t)0x8894, (q15_t)0x2df9, (q15_t)0x888b, (q15_t)0x2de2, (q15_t)0x8882, (q15_t)0x2dca, (q15_t)0x8879,
-  (q15_t)0x2db3, (q15_t)0x8870, (q15_t)0x2d9b, (q15_t)0x8867, (q15_t)0x2d84, (q15_t)0x885e, (q15_t)0x2d6c, (q15_t)0x8855,
-  (q15_t)0x2d55, (q15_t)0x884c, (q15_t)0x2d3d, (q15_t)0x8844, (q15_t)0x2d26, (q15_t)0x883b, (q15_t)0x2d0e, (q15_t)0x8832,
-  (q15_t)0x2cf7, (q15_t)0x8829, (q15_t)0x2cdf, (q15_t)0x8820, (q15_t)0x2cc8, (q15_t)0x8817, (q15_t)0x2cb0, (q15_t)0x880f,
-  (q15_t)0x2c98, (q15_t)0x8806, (q15_t)0x2c81, (q15_t)0x87fd, (q15_t)0x2c69, (q15_t)0x87f4, (q15_t)0x2c52, (q15_t)0x87ec,
-  (q15_t)0x2c3a, (q15_t)0x87e3, (q15_t)0x2c23, (q15_t)0x87da, (q15_t)0x2c0b, (q15_t)0x87d2, (q15_t)0x2bf3, (q15_t)0x87c9,
-  (q15_t)0x2bdc, (q15_t)0x87c0, (q15_t)0x2bc4, (q15_t)0x87b8, (q15_t)0x2bad, (q15_t)0x87af, (q15_t)0x2b95, (q15_t)0x87a7,
-  (q15_t)0x2b7d, (q15_t)0x879e, (q15_t)0x2b66, (q15_t)0x8795, (q15_t)0x2b4e, (q15_t)0x878d, (q15_t)0x2b36, (q15_t)0x8784,
-  (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x2b07, (q15_t)0x8774, (q15_t)0x2aef, (q15_t)0x876b, (q15_t)0x2ad8, (q15_t)0x8763,
-  (q15_t)0x2ac0, (q15_t)0x875a, (q15_t)0x2aa8, (q15_t)0x8752, (q15_t)0x2a91, (q15_t)0x874a, (q15_t)0x2a79, (q15_t)0x8741,
-  (q15_t)0x2a61, (q15_t)0x8739, (q15_t)0x2a49, (q15_t)0x8731, (q15_t)0x2a32, (q15_t)0x8728, (q15_t)0x2a1a, (q15_t)0x8720,
-  (q15_t)0x2a02, (q15_t)0x8718, (q15_t)0x29eb, (q15_t)0x870f, (q15_t)0x29d3, (q15_t)0x8707, (q15_t)0x29bb, (q15_t)0x86ff,
-  (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x298b, (q15_t)0x86ef, (q15_t)0x2974, (q15_t)0x86e7, (q15_t)0x295c, (q15_t)0x86de,
-  (q15_t)0x2944, (q15_t)0x86d6, (q15_t)0x292c, (q15_t)0x86ce, (q15_t)0x2915, (q15_t)0x86c6, (q15_t)0x28fd, (q15_t)0x86be,
-  (q15_t)0x28e5, (q15_t)0x86b6, (q15_t)0x28cd, (q15_t)0x86ae, (q15_t)0x28b5, (q15_t)0x86a6, (q15_t)0x289d, (q15_t)0x869e,
-  (q15_t)0x2886, (q15_t)0x8696, (q15_t)0x286e, (q15_t)0x868e, (q15_t)0x2856, (q15_t)0x8686, (q15_t)0x283e, (q15_t)0x867e,
-  (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x280e, (q15_t)0x866e, (q15_t)0x27f6, (q15_t)0x8667, (q15_t)0x27df, (q15_t)0x865f,
-  (q15_t)0x27c7, (q15_t)0x8657, (q15_t)0x27af, (q15_t)0x864f, (q15_t)0x2797, (q15_t)0x8647, (q15_t)0x277f, (q15_t)0x8640,
-  (q15_t)0x2767, (q15_t)0x8638, (q15_t)0x274f, (q15_t)0x8630, (q15_t)0x2737, (q15_t)0x8628, (q15_t)0x271f, (q15_t)0x8621,
-  (q15_t)0x2707, (q15_t)0x8619, (q15_t)0x26ef, (q15_t)0x8611, (q15_t)0x26d8, (q15_t)0x860a, (q15_t)0x26c0, (q15_t)0x8602,
-  (q15_t)0x26a8, (q15_t)0x85fb, (q15_t)0x2690, (q15_t)0x85f3, (q15_t)0x2678, (q15_t)0x85eb, (q15_t)0x2660, (q15_t)0x85e4,
-  (q15_t)0x2648, (q15_t)0x85dc, (q15_t)0x2630, (q15_t)0x85d5, (q15_t)0x2618, (q15_t)0x85cd, (q15_t)0x2600, (q15_t)0x85c6,
-  (q15_t)0x25e8, (q15_t)0x85be, (q15_t)0x25d0, (q15_t)0x85b7, (q15_t)0x25b8, (q15_t)0x85b0, (q15_t)0x25a0, (q15_t)0x85a8,
-  (q15_t)0x2588, (q15_t)0x85a1, (q15_t)0x2570, (q15_t)0x8599, (q15_t)0x2558, (q15_t)0x8592, (q15_t)0x2540, (q15_t)0x858b,
-  (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x250f, (q15_t)0x857c, (q15_t)0x24f7, (q15_t)0x8575, (q15_t)0x24df, (q15_t)0x856e,
-  (q15_t)0x24c7, (q15_t)0x8566, (q15_t)0x24af, (q15_t)0x855f, (q15_t)0x2497, (q15_t)0x8558, (q15_t)0x247f, (q15_t)0x8551,
-  (q15_t)0x2467, (q15_t)0x854a, (q15_t)0x244f, (q15_t)0x8543, (q15_t)0x2437, (q15_t)0x853b, (q15_t)0x241f, (q15_t)0x8534,
-  (q15_t)0x2407, (q15_t)0x852d, (q15_t)0x23ee, (q15_t)0x8526, (q15_t)0x23d6, (q15_t)0x851f, (q15_t)0x23be, (q15_t)0x8518,
-  (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x238e, (q15_t)0x850a, (q15_t)0x2376, (q15_t)0x8503, (q15_t)0x235e, (q15_t)0x84fc,
-  (q15_t)0x2345, (q15_t)0x84f5, (q15_t)0x232d, (q15_t)0x84ee, (q15_t)0x2315, (q15_t)0x84e7, (q15_t)0x22fd, (q15_t)0x84e1,
-  (q15_t)0x22e5, (q15_t)0x84da, (q15_t)0x22cd, (q15_t)0x84d3, (q15_t)0x22b4, (q15_t)0x84cc, (q15_t)0x229c, (q15_t)0x84c5,
-  (q15_t)0x2284, (q15_t)0x84be, (q15_t)0x226c, (q15_t)0x84b8, (q15_t)0x2254, (q15_t)0x84b1, (q15_t)0x223b, (q15_t)0x84aa,
-  (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x220b, (q15_t)0x849d, (q15_t)0x21f3, (q15_t)0x8496, (q15_t)0x21da, (q15_t)0x848f,
-  (q15_t)0x21c2, (q15_t)0x8489, (q15_t)0x21aa, (q15_t)0x8482, (q15_t)0x2192, (q15_t)0x847c, (q15_t)0x2179, (q15_t)0x8475,
-  (q15_t)0x2161, (q15_t)0x846e, (q15_t)0x2149, (q15_t)0x8468, (q15_t)0x2131, (q15_t)0x8461, (q15_t)0x2118, (q15_t)0x845b,
-  (q15_t)0x2100, (q15_t)0x8454, (q15_t)0x20e8, (q15_t)0x844e, (q15_t)0x20d0, (q15_t)0x8447, (q15_t)0x20b7, (q15_t)0x8441,
-  (q15_t)0x209f, (q15_t)0x843b, (q15_t)0x2087, (q15_t)0x8434, (q15_t)0x206e, (q15_t)0x842e, (q15_t)0x2056, (q15_t)0x8427,
-  (q15_t)0x203e, (q15_t)0x8421, (q15_t)0x2025, (q15_t)0x841b, (q15_t)0x200d, (q15_t)0x8415, (q15_t)0x1ff5, (q15_t)0x840e,
-  (q15_t)0x1fdc, (q15_t)0x8408, (q15_t)0x1fc4, (q15_t)0x8402, (q15_t)0x1fac, (q15_t)0x83fb, (q15_t)0x1f93, (q15_t)0x83f5,
-  (q15_t)0x1f7b, (q15_t)0x83ef, (q15_t)0x1f63, (q15_t)0x83e9, (q15_t)0x1f4a, (q15_t)0x83e3, (q15_t)0x1f32, (q15_t)0x83dd,
-  (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1f01, (q15_t)0x83d0, (q15_t)0x1ee9, (q15_t)0x83ca, (q15_t)0x1ed0, (q15_t)0x83c4,
-  (q15_t)0x1eb8, (q15_t)0x83be, (q15_t)0x1ea0, (q15_t)0x83b8, (q15_t)0x1e87, (q15_t)0x83b2, (q15_t)0x1e6f, (q15_t)0x83ac,
-  (q15_t)0x1e56, (q15_t)0x83a6, (q15_t)0x1e3e, (q15_t)0x83a0, (q15_t)0x1e25, (q15_t)0x839a, (q15_t)0x1e0d, (q15_t)0x8394,
-  (q15_t)0x1df5, (q15_t)0x838f, (q15_t)0x1ddc, (q15_t)0x8389, (q15_t)0x1dc4, (q15_t)0x8383, (q15_t)0x1dab, (q15_t)0x837d,
-  (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1d7a, (q15_t)0x8371, (q15_t)0x1d62, (q15_t)0x836c, (q15_t)0x1d49, (q15_t)0x8366,
-  (q15_t)0x1d31, (q15_t)0x8360, (q15_t)0x1d18, (q15_t)0x835a, (q15_t)0x1d00, (q15_t)0x8355, (q15_t)0x1ce8, (q15_t)0x834f,
-  (q15_t)0x1ccf, (q15_t)0x8349, (q15_t)0x1cb7, (q15_t)0x8344, (q15_t)0x1c9e, (q15_t)0x833e, (q15_t)0x1c86, (q15_t)0x8338,
-  (q15_t)0x1c6d, (q15_t)0x8333, (q15_t)0x1c55, (q15_t)0x832d, (q15_t)0x1c3c, (q15_t)0x8328, (q15_t)0x1c24, (q15_t)0x8322,
-  (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1bf2, (q15_t)0x8317, (q15_t)0x1bda, (q15_t)0x8312, (q15_t)0x1bc1, (q15_t)0x830c,
-  (q15_t)0x1ba9, (q15_t)0x8307, (q15_t)0x1b90, (q15_t)0x8301, (q15_t)0x1b78, (q15_t)0x82fc, (q15_t)0x1b5f, (q15_t)0x82f7,
-  (q15_t)0x1b47, (q15_t)0x82f1, (q15_t)0x1b2e, (q15_t)0x82ec, (q15_t)0x1b16, (q15_t)0x82e7, (q15_t)0x1afd, (q15_t)0x82e1,
-  (q15_t)0x1ae4, (q15_t)0x82dc, (q15_t)0x1acc, (q15_t)0x82d7, (q15_t)0x1ab3, (q15_t)0x82d1, (q15_t)0x1a9b, (q15_t)0x82cc,
-  (q15_t)0x1a82, (q15_t)0x82c7, (q15_t)0x1a6a, (q15_t)0x82c2, (q15_t)0x1a51, (q15_t)0x82bd, (q15_t)0x1a38, (q15_t)0x82b7,
-  (q15_t)0x1a20, (q15_t)0x82b2, (q15_t)0x1a07, (q15_t)0x82ad, (q15_t)0x19ef, (q15_t)0x82a8, (q15_t)0x19d6, (q15_t)0x82a3,
-  (q15_t)0x19bd, (q15_t)0x829e, (q15_t)0x19a5, (q15_t)0x8299, (q15_t)0x198c, (q15_t)0x8294, (q15_t)0x1973, (q15_t)0x828f,
-  (q15_t)0x195b, (q15_t)0x828a, (q15_t)0x1942, (q15_t)0x8285, (q15_t)0x192a, (q15_t)0x8280, (q15_t)0x1911, (q15_t)0x827b,
-  (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x18e0, (q15_t)0x8271, (q15_t)0x18c7, (q15_t)0x826c, (q15_t)0x18ae, (q15_t)0x8268,
-  (q15_t)0x1896, (q15_t)0x8263, (q15_t)0x187d, (q15_t)0x825e, (q15_t)0x1864, (q15_t)0x8259, (q15_t)0x184c, (q15_t)0x8254,
-  (q15_t)0x1833, (q15_t)0x8250, (q15_t)0x181a, (q15_t)0x824b, (q15_t)0x1802, (q15_t)0x8246, (q15_t)0x17e9, (q15_t)0x8241,
-  (q15_t)0x17d0, (q15_t)0x823d, (q15_t)0x17b7, (q15_t)0x8238, (q15_t)0x179f, (q15_t)0x8233, (q15_t)0x1786, (q15_t)0x822f,
-  (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x1755, (q15_t)0x8226, (q15_t)0x173c, (q15_t)0x8221, (q15_t)0x1723, (q15_t)0x821c,
-  (q15_t)0x170a, (q15_t)0x8218, (q15_t)0x16f2, (q15_t)0x8213, (q15_t)0x16d9, (q15_t)0x820f, (q15_t)0x16c0, (q15_t)0x820a,
-  (q15_t)0x16a8, (q15_t)0x8206, (q15_t)0x168f, (q15_t)0x8201, (q15_t)0x1676, (q15_t)0x81fd, (q15_t)0x165d, (q15_t)0x81f9,
-  (q15_t)0x1645, (q15_t)0x81f4, (q15_t)0x162c, (q15_t)0x81f0, (q15_t)0x1613, (q15_t)0x81ec, (q15_t)0x15fa, (q15_t)0x81e7,
-  (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x15c9, (q15_t)0x81df, (q15_t)0x15b0, (q15_t)0x81da, (q15_t)0x1597, (q15_t)0x81d6,
-  (q15_t)0x157f, (q15_t)0x81d2, (q15_t)0x1566, (q15_t)0x81ce, (q15_t)0x154d, (q15_t)0x81c9, (q15_t)0x1534, (q15_t)0x81c5,
-  (q15_t)0x151b, (q15_t)0x81c1, (q15_t)0x1503, (q15_t)0x81bd, (q15_t)0x14ea, (q15_t)0x81b9, (q15_t)0x14d1, (q15_t)0x81b5,
-  (q15_t)0x14b8, (q15_t)0x81b1, (q15_t)0x149f, (q15_t)0x81ad, (q15_t)0x1487, (q15_t)0x81a9, (q15_t)0x146e, (q15_t)0x81a5,
-  (q15_t)0x1455, (q15_t)0x81a1, (q15_t)0x143c, (q15_t)0x819d, (q15_t)0x1423, (q15_t)0x8199, (q15_t)0x140b, (q15_t)0x8195,
-  (q15_t)0x13f2, (q15_t)0x8191, (q15_t)0x13d9, (q15_t)0x818d, (q15_t)0x13c0, (q15_t)0x8189, (q15_t)0x13a7, (q15_t)0x8185,
-  (q15_t)0x138e, (q15_t)0x8181, (q15_t)0x1376, (q15_t)0x817d, (q15_t)0x135d, (q15_t)0x817a, (q15_t)0x1344, (q15_t)0x8176,
-  (q15_t)0x132b, (q15_t)0x8172, (q15_t)0x1312, (q15_t)0x816e, (q15_t)0x12f9, (q15_t)0x816b, (q15_t)0x12e0, (q15_t)0x8167,
-  (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x12af, (q15_t)0x815f, (q15_t)0x1296, (q15_t)0x815c, (q15_t)0x127d, (q15_t)0x8158,
-  (q15_t)0x1264, (q15_t)0x8155, (q15_t)0x124b, (q15_t)0x8151, (q15_t)0x1232, (q15_t)0x814d, (q15_t)0x1219, (q15_t)0x814a,
-  (q15_t)0x1201, (q15_t)0x8146, (q15_t)0x11e8, (q15_t)0x8143, (q15_t)0x11cf, (q15_t)0x813f, (q15_t)0x11b6, (q15_t)0x813c,
-  (q15_t)0x119d, (q15_t)0x8138, (q15_t)0x1184, (q15_t)0x8135, (q15_t)0x116b, (q15_t)0x8131, (q15_t)0x1152, (q15_t)0x812e,
-  (q15_t)0x1139, (q15_t)0x812b, (q15_t)0x1121, (q15_t)0x8127, (q15_t)0x1108, (q15_t)0x8124, (q15_t)0x10ef, (q15_t)0x8121,
-  (q15_t)0x10d6, (q15_t)0x811d, (q15_t)0x10bd, (q15_t)0x811a, (q15_t)0x10a4, (q15_t)0x8117, (q15_t)0x108b, (q15_t)0x8113,
-  (q15_t)0x1072, (q15_t)0x8110, (q15_t)0x1059, (q15_t)0x810d, (q15_t)0x1040, (q15_t)0x810a, (q15_t)0x1027, (q15_t)0x8107,
-  (q15_t)0x100e, (q15_t)0x8103, (q15_t)0xff5, (q15_t)0x8100, (q15_t)0xfdd, (q15_t)0x80fd, (q15_t)0xfc4, (q15_t)0x80fa,
-  (q15_t)0xfab, (q15_t)0x80f7, (q15_t)0xf92, (q15_t)0x80f4, (q15_t)0xf79, (q15_t)0x80f1, (q15_t)0xf60, (q15_t)0x80ee,
-  (q15_t)0xf47, (q15_t)0x80eb, (q15_t)0xf2e, (q15_t)0x80e8, (q15_t)0xf15, (q15_t)0x80e5, (q15_t)0xefc, (q15_t)0x80e2,
-  (q15_t)0xee3, (q15_t)0x80df, (q15_t)0xeca, (q15_t)0x80dc, (q15_t)0xeb1, (q15_t)0x80d9, (q15_t)0xe98, (q15_t)0x80d6,
-  (q15_t)0xe7f, (q15_t)0x80d3, (q15_t)0xe66, (q15_t)0x80d1, (q15_t)0xe4d, (q15_t)0x80ce, (q15_t)0xe34, (q15_t)0x80cb,
-  (q15_t)0xe1b, (q15_t)0x80c8, (q15_t)0xe02, (q15_t)0x80c5, (q15_t)0xde9, (q15_t)0x80c3, (q15_t)0xdd0, (q15_t)0x80c0,
-  (q15_t)0xdb7, (q15_t)0x80bd, (q15_t)0xd9e, (q15_t)0x80bb, (q15_t)0xd85, (q15_t)0x80b8, (q15_t)0xd6c, (q15_t)0x80b5,
-  (q15_t)0xd53, (q15_t)0x80b3, (q15_t)0xd3a, (q15_t)0x80b0, (q15_t)0xd21, (q15_t)0x80ad, (q15_t)0xd08, (q15_t)0x80ab,
-  (q15_t)0xcef, (q15_t)0x80a8, (q15_t)0xcd6, (q15_t)0x80a6, (q15_t)0xcbd, (q15_t)0x80a3, (q15_t)0xca4, (q15_t)0x80a1,
-  (q15_t)0xc8b, (q15_t)0x809e, (q15_t)0xc72, (q15_t)0x809c, (q15_t)0xc59, (q15_t)0x8099, (q15_t)0xc40, (q15_t)0x8097,
-  (q15_t)0xc27, (q15_t)0x8095, (q15_t)0xc0e, (q15_t)0x8092, (q15_t)0xbf5, (q15_t)0x8090, (q15_t)0xbdc, (q15_t)0x808e,
-  (q15_t)0xbc3, (q15_t)0x808b, (q15_t)0xbaa, (q15_t)0x8089, (q15_t)0xb91, (q15_t)0x8087, (q15_t)0xb78, (q15_t)0x8084,
-  (q15_t)0xb5f, (q15_t)0x8082, (q15_t)0xb46, (q15_t)0x8080, (q15_t)0xb2d, (q15_t)0x807e, (q15_t)0xb14, (q15_t)0x807b,
-  (q15_t)0xafb, (q15_t)0x8079, (q15_t)0xae2, (q15_t)0x8077, (q15_t)0xac9, (q15_t)0x8075, (q15_t)0xab0, (q15_t)0x8073,
-  (q15_t)0xa97, (q15_t)0x8071, (q15_t)0xa7e, (q15_t)0x806f, (q15_t)0xa65, (q15_t)0x806d, (q15_t)0xa4c, (q15_t)0x806b,
-  (q15_t)0xa33, (q15_t)0x8069, (q15_t)0xa19, (q15_t)0x8067, (q15_t)0xa00, (q15_t)0x8065, (q15_t)0x9e7, (q15_t)0x8063,
-  (q15_t)0x9ce, (q15_t)0x8061, (q15_t)0x9b5, (q15_t)0x805f, (q15_t)0x99c, (q15_t)0x805d, (q15_t)0x983, (q15_t)0x805b,
-  (q15_t)0x96a, (q15_t)0x8059, (q15_t)0x951, (q15_t)0x8057, (q15_t)0x938, (q15_t)0x8056, (q15_t)0x91f, (q15_t)0x8054,
-  (q15_t)0x906, (q15_t)0x8052, (q15_t)0x8ed, (q15_t)0x8050, (q15_t)0x8d4, (q15_t)0x804f, (q15_t)0x8bb, (q15_t)0x804d,
-  (q15_t)0x8a2, (q15_t)0x804b, (q15_t)0x888, (q15_t)0x8049, (q15_t)0x86f, (q15_t)0x8048, (q15_t)0x856, (q15_t)0x8046,
-  (q15_t)0x83d, (q15_t)0x8044, (q15_t)0x824, (q15_t)0x8043, (q15_t)0x80b, (q15_t)0x8041, (q15_t)0x7f2, (q15_t)0x8040,
-  (q15_t)0x7d9, (q15_t)0x803e, (q15_t)0x7c0, (q15_t)0x803d, (q15_t)0x7a7, (q15_t)0x803b, (q15_t)0x78e, (q15_t)0x803a,
-  (q15_t)0x775, (q15_t)0x8038, (q15_t)0x75b, (q15_t)0x8037, (q15_t)0x742, (q15_t)0x8035, (q15_t)0x729, (q15_t)0x8034,
-  (q15_t)0x710, (q15_t)0x8032, (q15_t)0x6f7, (q15_t)0x8031, (q15_t)0x6de, (q15_t)0x8030, (q15_t)0x6c5, (q15_t)0x802e,
-  (q15_t)0x6ac, (q15_t)0x802d, (q15_t)0x693, (q15_t)0x802c, (q15_t)0x67a, (q15_t)0x802a, (q15_t)0x660, (q15_t)0x8029,
-  (q15_t)0x647, (q15_t)0x8028, (q15_t)0x62e, (q15_t)0x8027, (q15_t)0x615, (q15_t)0x8026, (q15_t)0x5fc, (q15_t)0x8024,
-  (q15_t)0x5e3, (q15_t)0x8023, (q15_t)0x5ca, (q15_t)0x8022, (q15_t)0x5b1, (q15_t)0x8021, (q15_t)0x598, (q15_t)0x8020,
-  (q15_t)0x57f, (q15_t)0x801f, (q15_t)0x565, (q15_t)0x801e, (q15_t)0x54c, (q15_t)0x801d, (q15_t)0x533, (q15_t)0x801c,
-  (q15_t)0x51a, (q15_t)0x801b, (q15_t)0x501, (q15_t)0x801a, (q15_t)0x4e8, (q15_t)0x8019, (q15_t)0x4cf, (q15_t)0x8018,
-  (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x49c, (q15_t)0x8016, (q15_t)0x483, (q15_t)0x8015, (q15_t)0x46a, (q15_t)0x8014,
-  (q15_t)0x451, (q15_t)0x8013, (q15_t)0x438, (q15_t)0x8012, (q15_t)0x41f, (q15_t)0x8012, (q15_t)0x406, (q15_t)0x8011,
-  (q15_t)0x3ed, (q15_t)0x8010, (q15_t)0x3d4, (q15_t)0x800f, (q15_t)0x3ba, (q15_t)0x800e, (q15_t)0x3a1, (q15_t)0x800e,
-  (q15_t)0x388, (q15_t)0x800d, (q15_t)0x36f, (q15_t)0x800c, (q15_t)0x356, (q15_t)0x800c, (q15_t)0x33d, (q15_t)0x800b,
-  (q15_t)0x324, (q15_t)0x800a, (q15_t)0x30b, (q15_t)0x800a, (q15_t)0x2f1, (q15_t)0x8009, (q15_t)0x2d8, (q15_t)0x8009,
-  (q15_t)0x2bf, (q15_t)0x8008, (q15_t)0x2a6, (q15_t)0x8008, (q15_t)0x28d, (q15_t)0x8007, (q15_t)0x274, (q15_t)0x8007,
-  (q15_t)0x25b, (q15_t)0x8006, (q15_t)0x242, (q15_t)0x8006, (q15_t)0x228, (q15_t)0x8005, (q15_t)0x20f, (q15_t)0x8005,
-  (q15_t)0x1f6, (q15_t)0x8004, (q15_t)0x1dd, (q15_t)0x8004, (q15_t)0x1c4, (q15_t)0x8004, (q15_t)0x1ab, (q15_t)0x8003,
-  (q15_t)0x192, (q15_t)0x8003, (q15_t)0x178, (q15_t)0x8003, (q15_t)0x15f, (q15_t)0x8002, (q15_t)0x146, (q15_t)0x8002,
-  (q15_t)0x12d, (q15_t)0x8002, (q15_t)0x114, (q15_t)0x8002, (q15_t)0xfb, (q15_t)0x8001, (q15_t)0xe2, (q15_t)0x8001,
-  (q15_t)0xc9, (q15_t)0x8001, (q15_t)0xaf, (q15_t)0x8001, (q15_t)0x96, (q15_t)0x8001, (q15_t)0x7d, (q15_t)0x8001,
-  (q15_t)0x64, (q15_t)0x8001, (q15_t)0x4b, (q15_t)0x8001, (q15_t)0x32, (q15_t)0x8001, (q15_t)0x19, (q15_t)0x8001
-};
-
-static const q15_t ALIGN4 WeightsQ15_8192[16384] = {
-  (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xfffa, (q15_t)0x7fff, (q15_t)0xfff4, (q15_t)0x7fff, (q15_t)0xffee,
-  (q15_t)0x7fff, (q15_t)0xffe7, (q15_t)0x7fff, (q15_t)0xffe1, (q15_t)0x7fff, (q15_t)0xffdb, (q15_t)0x7fff, (q15_t)0xffd5,
-  (q15_t)0x7fff, (q15_t)0xffce, (q15_t)0x7fff, (q15_t)0xffc8, (q15_t)0x7fff, (q15_t)0xffc2, (q15_t)0x7fff, (q15_t)0xffbb,
-  (q15_t)0x7fff, (q15_t)0xffb5, (q15_t)0x7fff, (q15_t)0xffaf, (q15_t)0x7fff, (q15_t)0xffa9, (q15_t)0x7fff, (q15_t)0xffa2,
-  (q15_t)0x7fff, (q15_t)0xff9c, (q15_t)0x7fff, (q15_t)0xff96, (q15_t)0x7fff, (q15_t)0xff8f, (q15_t)0x7fff, (q15_t)0xff89,
-  (q15_t)0x7fff, (q15_t)0xff83, (q15_t)0x7fff, (q15_t)0xff7d, (q15_t)0x7fff, (q15_t)0xff76, (q15_t)0x7fff, (q15_t)0xff70,
-  (q15_t)0x7fff, (q15_t)0xff6a, (q15_t)0x7fff, (q15_t)0xff63, (q15_t)0x7fff, (q15_t)0xff5d, (q15_t)0x7fff, (q15_t)0xff57,
-  (q15_t)0x7fff, (q15_t)0xff51, (q15_t)0x7fff, (q15_t)0xff4a, (q15_t)0x7fff, (q15_t)0xff44, (q15_t)0x7fff, (q15_t)0xff3e,
-  (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7fff, (q15_t)0xff31, (q15_t)0x7fff, (q15_t)0xff2b, (q15_t)0x7fff, (q15_t)0xff25,
-  (q15_t)0x7fff, (q15_t)0xff1e, (q15_t)0x7fff, (q15_t)0xff18, (q15_t)0x7fff, (q15_t)0xff12, (q15_t)0x7fff, (q15_t)0xff0b,
-  (q15_t)0x7fff, (q15_t)0xff05, (q15_t)0x7ffe, (q15_t)0xfeff, (q15_t)0x7ffe, (q15_t)0xfef9, (q15_t)0x7ffe, (q15_t)0xfef2,
-  (q15_t)0x7ffe, (q15_t)0xfeec, (q15_t)0x7ffe, (q15_t)0xfee6, (q15_t)0x7ffe, (q15_t)0xfedf, (q15_t)0x7ffe, (q15_t)0xfed9,
-  (q15_t)0x7ffe, (q15_t)0xfed3, (q15_t)0x7ffe, (q15_t)0xfecd, (q15_t)0x7ffe, (q15_t)0xfec6, (q15_t)0x7ffe, (q15_t)0xfec0,
-  (q15_t)0x7ffe, (q15_t)0xfeba, (q15_t)0x7ffe, (q15_t)0xfeb3, (q15_t)0x7ffe, (q15_t)0xfead, (q15_t)0x7ffe, (q15_t)0xfea7,
-  (q15_t)0x7ffe, (q15_t)0xfea1, (q15_t)0x7ffe, (q15_t)0xfe9a, (q15_t)0x7ffd, (q15_t)0xfe94, (q15_t)0x7ffd, (q15_t)0xfe8e,
-  (q15_t)0x7ffd, (q15_t)0xfe88, (q15_t)0x7ffd, (q15_t)0xfe81, (q15_t)0x7ffd, (q15_t)0xfe7b, (q15_t)0x7ffd, (q15_t)0xfe75,
-  (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ffd, (q15_t)0xfe68, (q15_t)0x7ffd, (q15_t)0xfe62, (q15_t)0x7ffd, (q15_t)0xfe5c,
-  (q15_t)0x7ffd, (q15_t)0xfe55, (q15_t)0x7ffd, (q15_t)0xfe4f, (q15_t)0x7ffd, (q15_t)0xfe49, (q15_t)0x7ffc, (q15_t)0xfe42,
-  (q15_t)0x7ffc, (q15_t)0xfe3c, (q15_t)0x7ffc, (q15_t)0xfe36, (q15_t)0x7ffc, (q15_t)0xfe30, (q15_t)0x7ffc, (q15_t)0xfe29,
-  (q15_t)0x7ffc, (q15_t)0xfe23, (q15_t)0x7ffc, (q15_t)0xfe1d, (q15_t)0x7ffc, (q15_t)0xfe16, (q15_t)0x7ffc, (q15_t)0xfe10,
-  (q15_t)0x7ffc, (q15_t)0xfe0a, (q15_t)0x7ffc, (q15_t)0xfe04, (q15_t)0x7ffb, (q15_t)0xfdfd, (q15_t)0x7ffb, (q15_t)0xfdf7,
-  (q15_t)0x7ffb, (q15_t)0xfdf1, (q15_t)0x7ffb, (q15_t)0xfdea, (q15_t)0x7ffb, (q15_t)0xfde4, (q15_t)0x7ffb, (q15_t)0xfdde,
-  (q15_t)0x7ffb, (q15_t)0xfdd8, (q15_t)0x7ffb, (q15_t)0xfdd1, (q15_t)0x7ffb, (q15_t)0xfdcb, (q15_t)0x7ffb, (q15_t)0xfdc5,
-  (q15_t)0x7ffa, (q15_t)0xfdbe, (q15_t)0x7ffa, (q15_t)0xfdb8, (q15_t)0x7ffa, (q15_t)0xfdb2, (q15_t)0x7ffa, (q15_t)0xfdac,
-  (q15_t)0x7ffa, (q15_t)0xfda5, (q15_t)0x7ffa, (q15_t)0xfd9f, (q15_t)0x7ffa, (q15_t)0xfd99, (q15_t)0x7ffa, (q15_t)0xfd93,
-  (q15_t)0x7ff9, (q15_t)0xfd8c, (q15_t)0x7ff9, (q15_t)0xfd86, (q15_t)0x7ff9, (q15_t)0xfd80, (q15_t)0x7ff9, (q15_t)0xfd79,
-  (q15_t)0x7ff9, (q15_t)0xfd73, (q15_t)0x7ff9, (q15_t)0xfd6d, (q15_t)0x7ff9, (q15_t)0xfd67, (q15_t)0x7ff9, (q15_t)0xfd60,
-  (q15_t)0x7ff8, (q15_t)0xfd5a, (q15_t)0x7ff8, (q15_t)0xfd54, (q15_t)0x7ff8, (q15_t)0xfd4d, (q15_t)0x7ff8, (q15_t)0xfd47,
-  (q15_t)0x7ff8, (q15_t)0xfd41, (q15_t)0x7ff8, (q15_t)0xfd3b, (q15_t)0x7ff8, (q15_t)0xfd34, (q15_t)0x7ff8, (q15_t)0xfd2e,
-  (q15_t)0x7ff7, (q15_t)0xfd28, (q15_t)0x7ff7, (q15_t)0xfd21, (q15_t)0x7ff7, (q15_t)0xfd1b, (q15_t)0x7ff7, (q15_t)0xfd15,
-  (q15_t)0x7ff7, (q15_t)0xfd0f, (q15_t)0x7ff7, (q15_t)0xfd08, (q15_t)0x7ff7, (q15_t)0xfd02, (q15_t)0x7ff6, (q15_t)0xfcfc,
-  (q15_t)0x7ff6, (q15_t)0xfcf5, (q15_t)0x7ff6, (q15_t)0xfcef, (q15_t)0x7ff6, (q15_t)0xfce9, (q15_t)0x7ff6, (q15_t)0xfce3,
-  (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7ff5, (q15_t)0xfcd6, (q15_t)0x7ff5, (q15_t)0xfcd0, (q15_t)0x7ff5, (q15_t)0xfcc9,
-  (q15_t)0x7ff5, (q15_t)0xfcc3, (q15_t)0x7ff5, (q15_t)0xfcbd, (q15_t)0x7ff5, (q15_t)0xfcb7, (q15_t)0x7ff5, (q15_t)0xfcb0,
-  (q15_t)0x7ff4, (q15_t)0xfcaa, (q15_t)0x7ff4, (q15_t)0xfca4, (q15_t)0x7ff4, (q15_t)0xfc9e, (q15_t)0x7ff4, (q15_t)0xfc97,
-  (q15_t)0x7ff4, (q15_t)0xfc91, (q15_t)0x7ff4, (q15_t)0xfc8b, (q15_t)0x7ff3, (q15_t)0xfc84, (q15_t)0x7ff3, (q15_t)0xfc7e,
-  (q15_t)0x7ff3, (q15_t)0xfc78, (q15_t)0x7ff3, (q15_t)0xfc72, (q15_t)0x7ff3, (q15_t)0xfc6b, (q15_t)0x7ff2, (q15_t)0xfc65,
-  (q15_t)0x7ff2, (q15_t)0xfc5f, (q15_t)0x7ff2, (q15_t)0xfc58, (q15_t)0x7ff2, (q15_t)0xfc52, (q15_t)0x7ff2, (q15_t)0xfc4c,
-  (q15_t)0x7ff2, (q15_t)0xfc46, (q15_t)0x7ff1, (q15_t)0xfc3f, (q15_t)0x7ff1, (q15_t)0xfc39, (q15_t)0x7ff1, (q15_t)0xfc33,
-  (q15_t)0x7ff1, (q15_t)0xfc2c, (q15_t)0x7ff1, (q15_t)0xfc26, (q15_t)0x7ff0, (q15_t)0xfc20, (q15_t)0x7ff0, (q15_t)0xfc1a,
-  (q15_t)0x7ff0, (q15_t)0xfc13, (q15_t)0x7ff0, (q15_t)0xfc0d, (q15_t)0x7ff0, (q15_t)0xfc07, (q15_t)0x7fef, (q15_t)0xfc01,
-  (q15_t)0x7fef, (q15_t)0xfbfa, (q15_t)0x7fef, (q15_t)0xfbf4, (q15_t)0x7fef, (q15_t)0xfbee, (q15_t)0x7fef, (q15_t)0xfbe7,
-  (q15_t)0x7fee, (q15_t)0xfbe1, (q15_t)0x7fee, (q15_t)0xfbdb, (q15_t)0x7fee, (q15_t)0xfbd5, (q15_t)0x7fee, (q15_t)0xfbce,
-  (q15_t)0x7fee, (q15_t)0xfbc8, (q15_t)0x7fed, (q15_t)0xfbc2, (q15_t)0x7fed, (q15_t)0xfbbb, (q15_t)0x7fed, (q15_t)0xfbb5,
-  (q15_t)0x7fed, (q15_t)0xfbaf, (q15_t)0x7fed, (q15_t)0xfba9, (q15_t)0x7fec, (q15_t)0xfba2, (q15_t)0x7fec, (q15_t)0xfb9c,
-  (q15_t)0x7fec, (q15_t)0xfb96, (q15_t)0x7fec, (q15_t)0xfb8f, (q15_t)0x7fec, (q15_t)0xfb89, (q15_t)0x7feb, (q15_t)0xfb83,
-  (q15_t)0x7feb, (q15_t)0xfb7d, (q15_t)0x7feb, (q15_t)0xfb76, (q15_t)0x7feb, (q15_t)0xfb70, (q15_t)0x7fea, (q15_t)0xfb6a,
-  (q15_t)0x7fea, (q15_t)0xfb64, (q15_t)0x7fea, (q15_t)0xfb5d, (q15_t)0x7fea, (q15_t)0xfb57, (q15_t)0x7fea, (q15_t)0xfb51,
-  (q15_t)0x7fe9, (q15_t)0xfb4a, (q15_t)0x7fe9, (q15_t)0xfb44, (q15_t)0x7fe9, (q15_t)0xfb3e, (q15_t)0x7fe9, (q15_t)0xfb38,
-  (q15_t)0x7fe8, (q15_t)0xfb31, (q15_t)0x7fe8, (q15_t)0xfb2b, (q15_t)0x7fe8, (q15_t)0xfb25, (q15_t)0x7fe8, (q15_t)0xfb1e,
-  (q15_t)0x7fe7, (q15_t)0xfb18, (q15_t)0x7fe7, (q15_t)0xfb12, (q15_t)0x7fe7, (q15_t)0xfb0c, (q15_t)0x7fe7, (q15_t)0xfb05,
-  (q15_t)0x7fe6, (q15_t)0xfaff, (q15_t)0x7fe6, (q15_t)0xfaf9, (q15_t)0x7fe6, (q15_t)0xfaf3, (q15_t)0x7fe6, (q15_t)0xfaec,
-  (q15_t)0x7fe5, (q15_t)0xfae6, (q15_t)0x7fe5, (q15_t)0xfae0, (q15_t)0x7fe5, (q15_t)0xfad9, (q15_t)0x7fe5, (q15_t)0xfad3,
-  (q15_t)0x7fe4, (q15_t)0xfacd, (q15_t)0x7fe4, (q15_t)0xfac7, (q15_t)0x7fe4, (q15_t)0xfac0, (q15_t)0x7fe4, (q15_t)0xfaba,
-  (q15_t)0x7fe3, (q15_t)0xfab4, (q15_t)0x7fe3, (q15_t)0xfaad, (q15_t)0x7fe3, (q15_t)0xfaa7, (q15_t)0x7fe3, (q15_t)0xfaa1,
-  (q15_t)0x7fe2, (q15_t)0xfa9b, (q15_t)0x7fe2, (q15_t)0xfa94, (q15_t)0x7fe2, (q15_t)0xfa8e, (q15_t)0x7fe2, (q15_t)0xfa88,
-  (q15_t)0x7fe1, (q15_t)0xfa81, (q15_t)0x7fe1, (q15_t)0xfa7b, (q15_t)0x7fe1, (q15_t)0xfa75, (q15_t)0x7fe0, (q15_t)0xfa6f,
-  (q15_t)0x7fe0, (q15_t)0xfa68, (q15_t)0x7fe0, (q15_t)0xfa62, (q15_t)0x7fe0, (q15_t)0xfa5c, (q15_t)0x7fdf, (q15_t)0xfa56,
-  (q15_t)0x7fdf, (q15_t)0xfa4f, (q15_t)0x7fdf, (q15_t)0xfa49, (q15_t)0x7fdf, (q15_t)0xfa43, (q15_t)0x7fde, (q15_t)0xfa3c,
-  (q15_t)0x7fde, (q15_t)0xfa36, (q15_t)0x7fde, (q15_t)0xfa30, (q15_t)0x7fdd, (q15_t)0xfa2a, (q15_t)0x7fdd, (q15_t)0xfa23,
-  (q15_t)0x7fdd, (q15_t)0xfa1d, (q15_t)0x7fdd, (q15_t)0xfa17, (q15_t)0x7fdc, (q15_t)0xfa11, (q15_t)0x7fdc, (q15_t)0xfa0a,
-  (q15_t)0x7fdc, (q15_t)0xfa04, (q15_t)0x7fdb, (q15_t)0xf9fe, (q15_t)0x7fdb, (q15_t)0xf9f7, (q15_t)0x7fdb, (q15_t)0xf9f1,
-  (q15_t)0x7fda, (q15_t)0xf9eb, (q15_t)0x7fda, (q15_t)0xf9e5, (q15_t)0x7fda, (q15_t)0xf9de, (q15_t)0x7fda, (q15_t)0xf9d8,
-  (q15_t)0x7fd9, (q15_t)0xf9d2, (q15_t)0x7fd9, (q15_t)0xf9cb, (q15_t)0x7fd9, (q15_t)0xf9c5, (q15_t)0x7fd8, (q15_t)0xf9bf,
-  (q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fd8, (q15_t)0xf9b2, (q15_t)0x7fd7, (q15_t)0xf9ac, (q15_t)0x7fd7, (q15_t)0xf9a6,
-  (q15_t)0x7fd7, (q15_t)0xf9a0, (q15_t)0x7fd6, (q15_t)0xf999, (q15_t)0x7fd6, (q15_t)0xf993, (q15_t)0x7fd6, (q15_t)0xf98d,
-  (q15_t)0x7fd6, (q15_t)0xf986, (q15_t)0x7fd5, (q15_t)0xf980, (q15_t)0x7fd5, (q15_t)0xf97a, (q15_t)0x7fd5, (q15_t)0xf974,
-  (q15_t)0x7fd4, (q15_t)0xf96d, (q15_t)0x7fd4, (q15_t)0xf967, (q15_t)0x7fd4, (q15_t)0xf961, (q15_t)0x7fd3, (q15_t)0xf95b,
-  (q15_t)0x7fd3, (q15_t)0xf954, (q15_t)0x7fd3, (q15_t)0xf94e, (q15_t)0x7fd2, (q15_t)0xf948, (q15_t)0x7fd2, (q15_t)0xf941,
-  (q15_t)0x7fd2, (q15_t)0xf93b, (q15_t)0x7fd1, (q15_t)0xf935, (q15_t)0x7fd1, (q15_t)0xf92f, (q15_t)0x7fd1, (q15_t)0xf928,
-  (q15_t)0x7fd0, (q15_t)0xf922, (q15_t)0x7fd0, (q15_t)0xf91c, (q15_t)0x7fd0, (q15_t)0xf916, (q15_t)0x7fcf, (q15_t)0xf90f,
-  (q15_t)0x7fcf, (q15_t)0xf909, (q15_t)0x7fcf, (q15_t)0xf903, (q15_t)0x7fce, (q15_t)0xf8fc, (q15_t)0x7fce, (q15_t)0xf8f6,
-  (q15_t)0x7fce, (q15_t)0xf8f0, (q15_t)0x7fcd, (q15_t)0xf8ea, (q15_t)0x7fcd, (q15_t)0xf8e3, (q15_t)0x7fcd, (q15_t)0xf8dd,
-  (q15_t)0x7fcc, (q15_t)0xf8d7, (q15_t)0x7fcc, (q15_t)0xf8d0, (q15_t)0x7fcb, (q15_t)0xf8ca, (q15_t)0x7fcb, (q15_t)0xf8c4,
-  (q15_t)0x7fcb, (q15_t)0xf8be, (q15_t)0x7fca, (q15_t)0xf8b7, (q15_t)0x7fca, (q15_t)0xf8b1, (q15_t)0x7fca, (q15_t)0xf8ab,
-  (q15_t)0x7fc9, (q15_t)0xf8a5, (q15_t)0x7fc9, (q15_t)0xf89e, (q15_t)0x7fc9, (q15_t)0xf898, (q15_t)0x7fc8, (q15_t)0xf892,
-  (q15_t)0x7fc8, (q15_t)0xf88b, (q15_t)0x7fc7, (q15_t)0xf885, (q15_t)0x7fc7, (q15_t)0xf87f, (q15_t)0x7fc7, (q15_t)0xf879,
-  (q15_t)0x7fc6, (q15_t)0xf872, (q15_t)0x7fc6, (q15_t)0xf86c, (q15_t)0x7fc6, (q15_t)0xf866, (q15_t)0x7fc5, (q15_t)0xf860,
-  (q15_t)0x7fc5, (q15_t)0xf859, (q15_t)0x7fc5, (q15_t)0xf853, (q15_t)0x7fc4, (q15_t)0xf84d, (q15_t)0x7fc4, (q15_t)0xf846,
-  (q15_t)0x7fc3, (q15_t)0xf840, (q15_t)0x7fc3, (q15_t)0xf83a, (q15_t)0x7fc3, (q15_t)0xf834, (q15_t)0x7fc2, (q15_t)0xf82d,
-  (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fc1, (q15_t)0xf821, (q15_t)0x7fc1, (q15_t)0xf81b, (q15_t)0x7fc1, (q15_t)0xf814,
-  (q15_t)0x7fc0, (q15_t)0xf80e, (q15_t)0x7fc0, (q15_t)0xf808, (q15_t)0x7fc0, (q15_t)0xf802, (q15_t)0x7fbf, (q15_t)0xf7fb,
-  (q15_t)0x7fbf, (q15_t)0xf7f5, (q15_t)0x7fbe, (q15_t)0xf7ef, (q15_t)0x7fbe, (q15_t)0xf7e8, (q15_t)0x7fbe, (q15_t)0xf7e2,
-  (q15_t)0x7fbd, (q15_t)0xf7dc, (q15_t)0x7fbd, (q15_t)0xf7d6, (q15_t)0x7fbc, (q15_t)0xf7cf, (q15_t)0x7fbc, (q15_t)0xf7c9,
-  (q15_t)0x7fbc, (q15_t)0xf7c3, (q15_t)0x7fbb, (q15_t)0xf7bd, (q15_t)0x7fbb, (q15_t)0xf7b6, (q15_t)0x7fba, (q15_t)0xf7b0,
-  (q15_t)0x7fba, (q15_t)0xf7aa, (q15_t)0x7fb9, (q15_t)0xf7a3, (q15_t)0x7fb9, (q15_t)0xf79d, (q15_t)0x7fb9, (q15_t)0xf797,
-  (q15_t)0x7fb8, (q15_t)0xf791, (q15_t)0x7fb8, (q15_t)0xf78a, (q15_t)0x7fb7, (q15_t)0xf784, (q15_t)0x7fb7, (q15_t)0xf77e,
-  (q15_t)0x7fb7, (q15_t)0xf778, (q15_t)0x7fb6, (q15_t)0xf771, (q15_t)0x7fb6, (q15_t)0xf76b, (q15_t)0x7fb5, (q15_t)0xf765,
-  (q15_t)0x7fb5, (q15_t)0xf75e, (q15_t)0x7fb4, (q15_t)0xf758, (q15_t)0x7fb4, (q15_t)0xf752, (q15_t)0x7fb4, (q15_t)0xf74c,
-  (q15_t)0x7fb3, (q15_t)0xf745, (q15_t)0x7fb3, (q15_t)0xf73f, (q15_t)0x7fb2, (q15_t)0xf739, (q15_t)0x7fb2, (q15_t)0xf733,
-  (q15_t)0x7fb1, (q15_t)0xf72c, (q15_t)0x7fb1, (q15_t)0xf726, (q15_t)0x7fb1, (q15_t)0xf720, (q15_t)0x7fb0, (q15_t)0xf71a,
-  (q15_t)0x7fb0, (q15_t)0xf713, (q15_t)0x7faf, (q15_t)0xf70d, (q15_t)0x7faf, (q15_t)0xf707, (q15_t)0x7fae, (q15_t)0xf700,
-  (q15_t)0x7fae, (q15_t)0xf6fa, (q15_t)0x7fae, (q15_t)0xf6f4, (q15_t)0x7fad, (q15_t)0xf6ee, (q15_t)0x7fad, (q15_t)0xf6e7,
-  (q15_t)0x7fac, (q15_t)0xf6e1, (q15_t)0x7fac, (q15_t)0xf6db, (q15_t)0x7fab, (q15_t)0xf6d5, (q15_t)0x7fab, (q15_t)0xf6ce,
-  (q15_t)0x7faa, (q15_t)0xf6c8, (q15_t)0x7faa, (q15_t)0xf6c2, (q15_t)0x7fa9, (q15_t)0xf6bc, (q15_t)0x7fa9, (q15_t)0xf6b5,
-  (q15_t)0x7fa9, (q15_t)0xf6af, (q15_t)0x7fa8, (q15_t)0xf6a9, (q15_t)0x7fa8, (q15_t)0xf6a2, (q15_t)0x7fa7, (q15_t)0xf69c,
-  (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7fa6, (q15_t)0xf690, (q15_t)0x7fa6, (q15_t)0xf689, (q15_t)0x7fa5, (q15_t)0xf683,
-  (q15_t)0x7fa5, (q15_t)0xf67d, (q15_t)0x7fa4, (q15_t)0xf677, (q15_t)0x7fa4, (q15_t)0xf670, (q15_t)0x7fa3, (q15_t)0xf66a,
-  (q15_t)0x7fa3, (q15_t)0xf664, (q15_t)0x7fa3, (q15_t)0xf65e, (q15_t)0x7fa2, (q15_t)0xf657, (q15_t)0x7fa2, (q15_t)0xf651,
-  (q15_t)0x7fa1, (q15_t)0xf64b, (q15_t)0x7fa1, (q15_t)0xf644, (q15_t)0x7fa0, (q15_t)0xf63e, (q15_t)0x7fa0, (q15_t)0xf638,
-  (q15_t)0x7f9f, (q15_t)0xf632, (q15_t)0x7f9f, (q15_t)0xf62b, (q15_t)0x7f9e, (q15_t)0xf625, (q15_t)0x7f9e, (q15_t)0xf61f,
-  (q15_t)0x7f9d, (q15_t)0xf619, (q15_t)0x7f9d, (q15_t)0xf612, (q15_t)0x7f9c, (q15_t)0xf60c, (q15_t)0x7f9c, (q15_t)0xf606,
-  (q15_t)0x7f9b, (q15_t)0xf600, (q15_t)0x7f9b, (q15_t)0xf5f9, (q15_t)0x7f9a, (q15_t)0xf5f3, (q15_t)0x7f9a, (q15_t)0xf5ed,
-  (q15_t)0x7f99, (q15_t)0xf5e7, (q15_t)0x7f99, (q15_t)0xf5e0, (q15_t)0x7f98, (q15_t)0xf5da, (q15_t)0x7f98, (q15_t)0xf5d4,
-  (q15_t)0x7f97, (q15_t)0xf5cd, (q15_t)0x7f97, (q15_t)0xf5c7, (q15_t)0x7f96, (q15_t)0xf5c1, (q15_t)0x7f96, (q15_t)0xf5bb,
-  (q15_t)0x7f95, (q15_t)0xf5b4, (q15_t)0x7f95, (q15_t)0xf5ae, (q15_t)0x7f94, (q15_t)0xf5a8, (q15_t)0x7f94, (q15_t)0xf5a2,
-  (q15_t)0x7f93, (q15_t)0xf59b, (q15_t)0x7f93, (q15_t)0xf595, (q15_t)0x7f92, (q15_t)0xf58f, (q15_t)0x7f92, (q15_t)0xf589,
-  (q15_t)0x7f91, (q15_t)0xf582, (q15_t)0x7f91, (q15_t)0xf57c, (q15_t)0x7f90, (q15_t)0xf576, (q15_t)0x7f90, (q15_t)0xf570,
-  (q15_t)0x7f8f, (q15_t)0xf569, (q15_t)0x7f8f, (q15_t)0xf563, (q15_t)0x7f8e, (q15_t)0xf55d, (q15_t)0x7f8e, (q15_t)0xf556,
-  (q15_t)0x7f8d, (q15_t)0xf550, (q15_t)0x7f8d, (q15_t)0xf54a, (q15_t)0x7f8c, (q15_t)0xf544, (q15_t)0x7f8b, (q15_t)0xf53d,
-  (q15_t)0x7f8b, (q15_t)0xf537, (q15_t)0x7f8a, (q15_t)0xf531, (q15_t)0x7f8a, (q15_t)0xf52b, (q15_t)0x7f89, (q15_t)0xf524,
-  (q15_t)0x7f89, (q15_t)0xf51e, (q15_t)0x7f88, (q15_t)0xf518, (q15_t)0x7f88, (q15_t)0xf512, (q15_t)0x7f87, (q15_t)0xf50b,
-  (q15_t)0x7f87, (q15_t)0xf505, (q15_t)0x7f86, (q15_t)0xf4ff, (q15_t)0x7f86, (q15_t)0xf4f9, (q15_t)0x7f85, (q15_t)0xf4f2,
-  (q15_t)0x7f85, (q15_t)0xf4ec, (q15_t)0x7f84, (q15_t)0xf4e6, (q15_t)0x7f83, (q15_t)0xf4e0, (q15_t)0x7f83, (q15_t)0xf4d9,
-  (q15_t)0x7f82, (q15_t)0xf4d3, (q15_t)0x7f82, (q15_t)0xf4cd, (q15_t)0x7f81, (q15_t)0xf4c6, (q15_t)0x7f81, (q15_t)0xf4c0,
-  (q15_t)0x7f80, (q15_t)0xf4ba, (q15_t)0x7f80, (q15_t)0xf4b4, (q15_t)0x7f7f, (q15_t)0xf4ad, (q15_t)0x7f7e, (q15_t)0xf4a7,
-  (q15_t)0x7f7e, (q15_t)0xf4a1, (q15_t)0x7f7d, (q15_t)0xf49b, (q15_t)0x7f7d, (q15_t)0xf494, (q15_t)0x7f7c, (q15_t)0xf48e,
-  (q15_t)0x7f7c, (q15_t)0xf488, (q15_t)0x7f7b, (q15_t)0xf482, (q15_t)0x7f7b, (q15_t)0xf47b, (q15_t)0x7f7a, (q15_t)0xf475,
-  (q15_t)0x7f79, (q15_t)0xf46f, (q15_t)0x7f79, (q15_t)0xf469, (q15_t)0x7f78, (q15_t)0xf462, (q15_t)0x7f78, (q15_t)0xf45c,
-  (q15_t)0x7f77, (q15_t)0xf456, (q15_t)0x7f77, (q15_t)0xf450, (q15_t)0x7f76, (q15_t)0xf449, (q15_t)0x7f75, (q15_t)0xf443,
-  (q15_t)0x7f75, (q15_t)0xf43d, (q15_t)0x7f74, (q15_t)0xf437, (q15_t)0x7f74, (q15_t)0xf430, (q15_t)0x7f73, (q15_t)0xf42a,
-  (q15_t)0x7f72, (q15_t)0xf424, (q15_t)0x7f72, (q15_t)0xf41e, (q15_t)0x7f71, (q15_t)0xf417, (q15_t)0x7f71, (q15_t)0xf411,
-  (q15_t)0x7f70, (q15_t)0xf40b, (q15_t)0x7f70, (q15_t)0xf405, (q15_t)0x7f6f, (q15_t)0xf3fe, (q15_t)0x7f6e, (q15_t)0xf3f8,
-  (q15_t)0x7f6e, (q15_t)0xf3f2, (q15_t)0x7f6d, (q15_t)0xf3ec, (q15_t)0x7f6d, (q15_t)0xf3e5, (q15_t)0x7f6c, (q15_t)0xf3df,
-  (q15_t)0x7f6b, (q15_t)0xf3d9, (q15_t)0x7f6b, (q15_t)0xf3d2, (q15_t)0x7f6a, (q15_t)0xf3cc, (q15_t)0x7f6a, (q15_t)0xf3c6,
-  (q15_t)0x7f69, (q15_t)0xf3c0, (q15_t)0x7f68, (q15_t)0xf3b9, (q15_t)0x7f68, (q15_t)0xf3b3, (q15_t)0x7f67, (q15_t)0xf3ad,
-  (q15_t)0x7f67, (q15_t)0xf3a7, (q15_t)0x7f66, (q15_t)0xf3a0, (q15_t)0x7f65, (q15_t)0xf39a, (q15_t)0x7f65, (q15_t)0xf394,
-  (q15_t)0x7f64, (q15_t)0xf38e, (q15_t)0x7f64, (q15_t)0xf387, (q15_t)0x7f63, (q15_t)0xf381, (q15_t)0x7f62, (q15_t)0xf37b,
-  (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f61, (q15_t)0xf36e, (q15_t)0x7f60, (q15_t)0xf368, (q15_t)0x7f60, (q15_t)0xf362,
-  (q15_t)0x7f5f, (q15_t)0xf35c, (q15_t)0x7f5f, (q15_t)0xf355, (q15_t)0x7f5e, (q15_t)0xf34f, (q15_t)0x7f5d, (q15_t)0xf349,
-  (q15_t)0x7f5d, (q15_t)0xf343, (q15_t)0x7f5c, (q15_t)0xf33c, (q15_t)0x7f5b, (q15_t)0xf336, (q15_t)0x7f5b, (q15_t)0xf330,
-  (q15_t)0x7f5a, (q15_t)0xf32a, (q15_t)0x7f5a, (q15_t)0xf323, (q15_t)0x7f59, (q15_t)0xf31d, (q15_t)0x7f58, (q15_t)0xf317,
-  (q15_t)0x7f58, (q15_t)0xf311, (q15_t)0x7f57, (q15_t)0xf30a, (q15_t)0x7f56, (q15_t)0xf304, (q15_t)0x7f56, (q15_t)0xf2fe,
-  (q15_t)0x7f55, (q15_t)0xf2f8, (q15_t)0x7f55, (q15_t)0xf2f1, (q15_t)0x7f54, (q15_t)0xf2eb, (q15_t)0x7f53, (q15_t)0xf2e5,
-  (q15_t)0x7f53, (q15_t)0xf2df, (q15_t)0x7f52, (q15_t)0xf2d8, (q15_t)0x7f51, (q15_t)0xf2d2, (q15_t)0x7f51, (q15_t)0xf2cc,
-  (q15_t)0x7f50, (q15_t)0xf2c6, (q15_t)0x7f4f, (q15_t)0xf2bf, (q15_t)0x7f4f, (q15_t)0xf2b9, (q15_t)0x7f4e, (q15_t)0xf2b3,
-  (q15_t)0x7f4d, (q15_t)0xf2ad, (q15_t)0x7f4d, (q15_t)0xf2a6, (q15_t)0x7f4c, (q15_t)0xf2a0, (q15_t)0x7f4b, (q15_t)0xf29a,
-  (q15_t)0x7f4b, (q15_t)0xf294, (q15_t)0x7f4a, (q15_t)0xf28d, (q15_t)0x7f49, (q15_t)0xf287, (q15_t)0x7f49, (q15_t)0xf281,
-  (q15_t)0x7f48, (q15_t)0xf27b, (q15_t)0x7f47, (q15_t)0xf274, (q15_t)0x7f47, (q15_t)0xf26e, (q15_t)0x7f46, (q15_t)0xf268,
-  (q15_t)0x7f45, (q15_t)0xf262, (q15_t)0x7f45, (q15_t)0xf25b, (q15_t)0x7f44, (q15_t)0xf255, (q15_t)0x7f43, (q15_t)0xf24f,
-  (q15_t)0x7f43, (q15_t)0xf249, (q15_t)0x7f42, (q15_t)0xf242, (q15_t)0x7f41, (q15_t)0xf23c, (q15_t)0x7f41, (q15_t)0xf236,
-  (q15_t)0x7f40, (q15_t)0xf230, (q15_t)0x7f3f, (q15_t)0xf229, (q15_t)0x7f3f, (q15_t)0xf223, (q15_t)0x7f3e, (q15_t)0xf21d,
-  (q15_t)0x7f3d, (q15_t)0xf217, (q15_t)0x7f3d, (q15_t)0xf210, (q15_t)0x7f3c, (q15_t)0xf20a, (q15_t)0x7f3b, (q15_t)0xf204,
-  (q15_t)0x7f3b, (q15_t)0xf1fe, (q15_t)0x7f3a, (q15_t)0xf1f7, (q15_t)0x7f39, (q15_t)0xf1f1, (q15_t)0x7f39, (q15_t)0xf1eb,
-  (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f37, (q15_t)0xf1de, (q15_t)0x7f36, (q15_t)0xf1d8, (q15_t)0x7f36, (q15_t)0xf1d2,
-  (q15_t)0x7f35, (q15_t)0xf1cc, (q15_t)0x7f34, (q15_t)0xf1c6, (q15_t)0x7f34, (q15_t)0xf1bf, (q15_t)0x7f33, (q15_t)0xf1b9,
-  (q15_t)0x7f32, (q15_t)0xf1b3, (q15_t)0x7f32, (q15_t)0xf1ad, (q15_t)0x7f31, (q15_t)0xf1a6, (q15_t)0x7f30, (q15_t)0xf1a0,
-  (q15_t)0x7f2f, (q15_t)0xf19a, (q15_t)0x7f2f, (q15_t)0xf194, (q15_t)0x7f2e, (q15_t)0xf18d, (q15_t)0x7f2d, (q15_t)0xf187,
-  (q15_t)0x7f2d, (q15_t)0xf181, (q15_t)0x7f2c, (q15_t)0xf17b, (q15_t)0x7f2b, (q15_t)0xf174, (q15_t)0x7f2a, (q15_t)0xf16e,
-  (q15_t)0x7f2a, (q15_t)0xf168, (q15_t)0x7f29, (q15_t)0xf162, (q15_t)0x7f28, (q15_t)0xf15b, (q15_t)0x7f28, (q15_t)0xf155,
-  (q15_t)0x7f27, (q15_t)0xf14f, (q15_t)0x7f26, (q15_t)0xf149, (q15_t)0x7f25, (q15_t)0xf142, (q15_t)0x7f25, (q15_t)0xf13c,
-  (q15_t)0x7f24, (q15_t)0xf136, (q15_t)0x7f23, (q15_t)0xf130, (q15_t)0x7f23, (q15_t)0xf129, (q15_t)0x7f22, (q15_t)0xf123,
-  (q15_t)0x7f21, (q15_t)0xf11d, (q15_t)0x7f20, (q15_t)0xf117, (q15_t)0x7f20, (q15_t)0xf110, (q15_t)0x7f1f, (q15_t)0xf10a,
-  (q15_t)0x7f1e, (q15_t)0xf104, (q15_t)0x7f1d, (q15_t)0xf0fe, (q15_t)0x7f1d, (q15_t)0xf0f8, (q15_t)0x7f1c, (q15_t)0xf0f1,
-  (q15_t)0x7f1b, (q15_t)0xf0eb, (q15_t)0x7f1a, (q15_t)0xf0e5, (q15_t)0x7f1a, (q15_t)0xf0df, (q15_t)0x7f19, (q15_t)0xf0d8,
-  (q15_t)0x7f18, (q15_t)0xf0d2, (q15_t)0x7f17, (q15_t)0xf0cc, (q15_t)0x7f17, (q15_t)0xf0c6, (q15_t)0x7f16, (q15_t)0xf0bf,
-  (q15_t)0x7f15, (q15_t)0xf0b9, (q15_t)0x7f14, (q15_t)0xf0b3, (q15_t)0x7f14, (q15_t)0xf0ad, (q15_t)0x7f13, (q15_t)0xf0a6,
-  (q15_t)0x7f12, (q15_t)0xf0a0, (q15_t)0x7f11, (q15_t)0xf09a, (q15_t)0x7f11, (q15_t)0xf094, (q15_t)0x7f10, (q15_t)0xf08d,
-  (q15_t)0x7f0f, (q15_t)0xf087, (q15_t)0x7f0e, (q15_t)0xf081, (q15_t)0x7f0e, (q15_t)0xf07b, (q15_t)0x7f0d, (q15_t)0xf075,
-  (q15_t)0x7f0c, (q15_t)0xf06e, (q15_t)0x7f0b, (q15_t)0xf068, (q15_t)0x7f0b, (q15_t)0xf062, (q15_t)0x7f0a, (q15_t)0xf05c,
-  (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7f08, (q15_t)0xf04f, (q15_t)0x7f08, (q15_t)0xf049, (q15_t)0x7f07, (q15_t)0xf043,
-  (q15_t)0x7f06, (q15_t)0xf03c, (q15_t)0x7f05, (q15_t)0xf036, (q15_t)0x7f04, (q15_t)0xf030, (q15_t)0x7f04, (q15_t)0xf02a,
-  (q15_t)0x7f03, (q15_t)0xf023, (q15_t)0x7f02, (q15_t)0xf01d, (q15_t)0x7f01, (q15_t)0xf017, (q15_t)0x7f01, (q15_t)0xf011,
-  (q15_t)0x7f00, (q15_t)0xf00b, (q15_t)0x7eff, (q15_t)0xf004, (q15_t)0x7efe, (q15_t)0xeffe, (q15_t)0x7efd, (q15_t)0xeff8,
-  (q15_t)0x7efd, (q15_t)0xeff2, (q15_t)0x7efc, (q15_t)0xefeb, (q15_t)0x7efb, (q15_t)0xefe5, (q15_t)0x7efa, (q15_t)0xefdf,
-  (q15_t)0x7ef9, (q15_t)0xefd9, (q15_t)0x7ef9, (q15_t)0xefd2, (q15_t)0x7ef8, (q15_t)0xefcc, (q15_t)0x7ef7, (q15_t)0xefc6,
-  (q15_t)0x7ef6, (q15_t)0xefc0, (q15_t)0x7ef5, (q15_t)0xefb9, (q15_t)0x7ef5, (q15_t)0xefb3, (q15_t)0x7ef4, (q15_t)0xefad,
-  (q15_t)0x7ef3, (q15_t)0xefa7, (q15_t)0x7ef2, (q15_t)0xefa1, (q15_t)0x7ef1, (q15_t)0xef9a, (q15_t)0x7ef1, (q15_t)0xef94,
-  (q15_t)0x7ef0, (q15_t)0xef8e, (q15_t)0x7eef, (q15_t)0xef88, (q15_t)0x7eee, (q15_t)0xef81, (q15_t)0x7eed, (q15_t)0xef7b,
-  (q15_t)0x7eed, (q15_t)0xef75, (q15_t)0x7eec, (q15_t)0xef6f, (q15_t)0x7eeb, (q15_t)0xef68, (q15_t)0x7eea, (q15_t)0xef62,
-  (q15_t)0x7ee9, (q15_t)0xef5c, (q15_t)0x7ee9, (q15_t)0xef56, (q15_t)0x7ee8, (q15_t)0xef50, (q15_t)0x7ee7, (q15_t)0xef49,
-  (q15_t)0x7ee6, (q15_t)0xef43, (q15_t)0x7ee5, (q15_t)0xef3d, (q15_t)0x7ee4, (q15_t)0xef37, (q15_t)0x7ee4, (q15_t)0xef30,
-  (q15_t)0x7ee3, (q15_t)0xef2a, (q15_t)0x7ee2, (q15_t)0xef24, (q15_t)0x7ee1, (q15_t)0xef1e, (q15_t)0x7ee0, (q15_t)0xef18,
-  (q15_t)0x7edf, (q15_t)0xef11, (q15_t)0x7edf, (q15_t)0xef0b, (q15_t)0x7ede, (q15_t)0xef05, (q15_t)0x7edd, (q15_t)0xeeff,
-  (q15_t)0x7edc, (q15_t)0xeef8, (q15_t)0x7edb, (q15_t)0xeef2, (q15_t)0x7eda, (q15_t)0xeeec, (q15_t)0x7eda, (q15_t)0xeee6,
-  (q15_t)0x7ed9, (q15_t)0xeedf, (q15_t)0x7ed8, (q15_t)0xeed9, (q15_t)0x7ed7, (q15_t)0xeed3, (q15_t)0x7ed6, (q15_t)0xeecd,
-  (q15_t)0x7ed5, (q15_t)0xeec7, (q15_t)0x7ed5, (q15_t)0xeec0, (q15_t)0x7ed4, (q15_t)0xeeba, (q15_t)0x7ed3, (q15_t)0xeeb4,
-  (q15_t)0x7ed2, (q15_t)0xeeae, (q15_t)0x7ed1, (q15_t)0xeea7, (q15_t)0x7ed0, (q15_t)0xeea1, (q15_t)0x7ecf, (q15_t)0xee9b,
-  (q15_t)0x7ecf, (q15_t)0xee95, (q15_t)0x7ece, (q15_t)0xee8f, (q15_t)0x7ecd, (q15_t)0xee88, (q15_t)0x7ecc, (q15_t)0xee82,
-  (q15_t)0x7ecb, (q15_t)0xee7c, (q15_t)0x7eca, (q15_t)0xee76, (q15_t)0x7ec9, (q15_t)0xee6f, (q15_t)0x7ec9, (q15_t)0xee69,
-  (q15_t)0x7ec8, (q15_t)0xee63, (q15_t)0x7ec7, (q15_t)0xee5d, (q15_t)0x7ec6, (q15_t)0xee57, (q15_t)0x7ec5, (q15_t)0xee50,
-  (q15_t)0x7ec4, (q15_t)0xee4a, (q15_t)0x7ec3, (q15_t)0xee44, (q15_t)0x7ec3, (q15_t)0xee3e, (q15_t)0x7ec2, (q15_t)0xee37,
-  (q15_t)0x7ec1, (q15_t)0xee31, (q15_t)0x7ec0, (q15_t)0xee2b, (q15_t)0x7ebf, (q15_t)0xee25, (q15_t)0x7ebe, (q15_t)0xee1f,
-  (q15_t)0x7ebd, (q15_t)0xee18, (q15_t)0x7ebc, (q15_t)0xee12, (q15_t)0x7ebb, (q15_t)0xee0c, (q15_t)0x7ebb, (q15_t)0xee06,
-  (q15_t)0x7eba, (q15_t)0xedff, (q15_t)0x7eb9, (q15_t)0xedf9, (q15_t)0x7eb8, (q15_t)0xedf3, (q15_t)0x7eb7, (q15_t)0xeded,
-  (q15_t)0x7eb6, (q15_t)0xede7, (q15_t)0x7eb5, (q15_t)0xede0, (q15_t)0x7eb4, (q15_t)0xedda, (q15_t)0x7eb4, (q15_t)0xedd4,
-  (q15_t)0x7eb3, (q15_t)0xedce, (q15_t)0x7eb2, (q15_t)0xedc7, (q15_t)0x7eb1, (q15_t)0xedc1, (q15_t)0x7eb0, (q15_t)0xedbb,
-  (q15_t)0x7eaf, (q15_t)0xedb5, (q15_t)0x7eae, (q15_t)0xedaf, (q15_t)0x7ead, (q15_t)0xeda8, (q15_t)0x7eac, (q15_t)0xeda2,
-  (q15_t)0x7eab, (q15_t)0xed9c, (q15_t)0x7eab, (q15_t)0xed96, (q15_t)0x7eaa, (q15_t)0xed8f, (q15_t)0x7ea9, (q15_t)0xed89,
-  (q15_t)0x7ea8, (q15_t)0xed83, (q15_t)0x7ea7, (q15_t)0xed7d, (q15_t)0x7ea6, (q15_t)0xed77, (q15_t)0x7ea5, (q15_t)0xed70,
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-  (q15_t)0x7e99, (q15_t)0xed20, (q15_t)0x7e98, (q15_t)0xed19, (q15_t)0x7e97, (q15_t)0xed13, (q15_t)0x7e96, (q15_t)0xed0d,
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-  (q15_t)0x7e7b, (q15_t)0xec59, (q15_t)0x7e7a, (q15_t)0xec53, (q15_t)0x7e79, (q15_t)0xec4c, (q15_t)0x7e78, (q15_t)0xec46,
-  (q15_t)0x7e77, (q15_t)0xec40, (q15_t)0x7e76, (q15_t)0xec3a, (q15_t)0x7e75, (q15_t)0xec34, (q15_t)0x7e74, (q15_t)0xec2d,
-  (q15_t)0x7e73, (q15_t)0xec27, (q15_t)0x7e72, (q15_t)0xec21, (q15_t)0x7e71, (q15_t)0xec1b, (q15_t)0x7e70, (q15_t)0xec15,
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-  (q15_t)0x7e6b, (q15_t)0xebf5, (q15_t)0x7e6a, (q15_t)0xebef, (q15_t)0x7e69, (q15_t)0xebe9, (q15_t)0x7e68, (q15_t)0xebe3,
-  (q15_t)0x7e67, (q15_t)0xebdd, (q15_t)0x7e66, (q15_t)0xebd6, (q15_t)0x7e65, (q15_t)0xebd0, (q15_t)0x7e64, (q15_t)0xebca,
-  (q15_t)0x7e63, (q15_t)0xebc4, (q15_t)0x7e62, (q15_t)0xebbe, (q15_t)0x7e61, (q15_t)0xebb7, (q15_t)0x7e60, (q15_t)0xebb1,
-  (q15_t)0x7e5f, (q15_t)0xebab, (q15_t)0x7e5e, (q15_t)0xeba5, (q15_t)0x7e5d, (q15_t)0xeb9f, (q15_t)0x7e5c, (q15_t)0xeb98,
-  (q15_t)0x7e5b, (q15_t)0xeb92, (q15_t)0x7e5a, (q15_t)0xeb8c, (q15_t)0x7e59, (q15_t)0xeb86, (q15_t)0x7e58, (q15_t)0xeb80,
-  (q15_t)0x7e57, (q15_t)0xeb79, (q15_t)0x7e56, (q15_t)0xeb73, (q15_t)0x7e55, (q15_t)0xeb6d, (q15_t)0x7e54, (q15_t)0xeb67,
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-  (q15_t)0x7e4f, (q15_t)0xeb48, (q15_t)0x7e4e, (q15_t)0xeb42, (q15_t)0x7e4d, (q15_t)0xeb3b, (q15_t)0x7e4c, (q15_t)0xeb35,
-  (q15_t)0x7e4b, (q15_t)0xeb2f, (q15_t)0x7e4a, (q15_t)0xeb29, (q15_t)0x7e49, (q15_t)0xeb23, (q15_t)0x7e48, (q15_t)0xeb1c,
-  (q15_t)0x7e47, (q15_t)0xeb16, (q15_t)0x7e46, (q15_t)0xeb10, (q15_t)0x7e45, (q15_t)0xeb0a, (q15_t)0x7e44, (q15_t)0xeb04,
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-  (q15_t)0x7e3f, (q15_t)0xeae5, (q15_t)0x7e3e, (q15_t)0xeade, (q15_t)0x7e3d, (q15_t)0xead8, (q15_t)0x7e3c, (q15_t)0xead2,
-  (q15_t)0x7e3b, (q15_t)0xeacc, (q15_t)0x7e3a, (q15_t)0xeac6, (q15_t)0x7e39, (q15_t)0xeabf, (q15_t)0x7e38, (q15_t)0xeab9,
-  (q15_t)0x7e37, (q15_t)0xeab3, (q15_t)0x7e35, (q15_t)0xeaad, (q15_t)0x7e34, (q15_t)0xeaa7, (q15_t)0x7e33, (q15_t)0xeaa0,
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-  (q15_t)0x7e2e, (q15_t)0xea81, (q15_t)0x7e2d, (q15_t)0xea7b, (q15_t)0x7e2c, (q15_t)0xea75, (q15_t)0x7e2b, (q15_t)0xea6f,
-  (q15_t)0x7e2a, (q15_t)0xea69, (q15_t)0x7e29, (q15_t)0xea63, (q15_t)0x7e28, (q15_t)0xea5c, (q15_t)0x7e27, (q15_t)0xea56,
-  (q15_t)0x7e26, (q15_t)0xea50, (q15_t)0x7e25, (q15_t)0xea4a, (q15_t)0x7e24, (q15_t)0xea44, (q15_t)0x7e22, (q15_t)0xea3d,
-  (q15_t)0x7e21, (q15_t)0xea37, (q15_t)0x7e20, (q15_t)0xea31, (q15_t)0x7e1f, (q15_t)0xea2b, (q15_t)0x7e1e, (q15_t)0xea25,
-  (q15_t)0x7e1d, (q15_t)0xea1e, (q15_t)0x7e1c, (q15_t)0xea18, (q15_t)0x7e1b, (q15_t)0xea12, (q15_t)0x7e1a, (q15_t)0xea0c,
-  (q15_t)0x7e19, (q15_t)0xea06, (q15_t)0x7e18, (q15_t)0xe9ff, (q15_t)0x7e17, (q15_t)0xe9f9, (q15_t)0x7e16, (q15_t)0xe9f3,
-  (q15_t)0x7e14, (q15_t)0xe9ed, (q15_t)0x7e13, (q15_t)0xe9e7, (q15_t)0x7e12, (q15_t)0xe9e1, (q15_t)0x7e11, (q15_t)0xe9da,
-  (q15_t)0x7e10, (q15_t)0xe9d4, (q15_t)0x7e0f, (q15_t)0xe9ce, (q15_t)0x7e0e, (q15_t)0xe9c8, (q15_t)0x7e0d, (q15_t)0xe9c2,
-  (q15_t)0x7e0c, (q15_t)0xe9bb, (q15_t)0x7e0b, (q15_t)0xe9b5, (q15_t)0x7e0a, (q15_t)0xe9af, (q15_t)0x7e08, (q15_t)0xe9a9,
-  (q15_t)0x7e07, (q15_t)0xe9a3, (q15_t)0x7e06, (q15_t)0xe99c, (q15_t)0x7e05, (q15_t)0xe996, (q15_t)0x7e04, (q15_t)0xe990,
-  (q15_t)0x7e03, (q15_t)0xe98a, (q15_t)0x7e02, (q15_t)0xe984, (q15_t)0x7e01, (q15_t)0xe97e, (q15_t)0x7e00, (q15_t)0xe977,
-  (q15_t)0x7dff, (q15_t)0xe971, (q15_t)0x7dfd, (q15_t)0xe96b, (q15_t)0x7dfc, (q15_t)0xe965, (q15_t)0x7dfb, (q15_t)0xe95f,
-  (q15_t)0x7dfa, (q15_t)0xe958, (q15_t)0x7df9, (q15_t)0xe952, (q15_t)0x7df8, (q15_t)0xe94c, (q15_t)0x7df7, (q15_t)0xe946,
-  (q15_t)0x7df6, (q15_t)0xe940, (q15_t)0x7df5, (q15_t)0xe93a, (q15_t)0x7df3, (q15_t)0xe933, (q15_t)0x7df2, (q15_t)0xe92d,
-  (q15_t)0x7df1, (q15_t)0xe927, (q15_t)0x7df0, (q15_t)0xe921, (q15_t)0x7def, (q15_t)0xe91b, (q15_t)0x7dee, (q15_t)0xe914,
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-  (q15_t)0x7de8, (q15_t)0xe8f6, (q15_t)0x7de7, (q15_t)0xe8ef, (q15_t)0x7de6, (q15_t)0xe8e9, (q15_t)0x7de5, (q15_t)0xe8e3,
-  (q15_t)0x7de4, (q15_t)0xe8dd, (q15_t)0x7de2, (q15_t)0xe8d7, (q15_t)0x7de1, (q15_t)0xe8d0, (q15_t)0x7de0, (q15_t)0xe8ca,
-  (q15_t)0x7ddf, (q15_t)0xe8c4, (q15_t)0x7dde, (q15_t)0xe8be, (q15_t)0x7ddd, (q15_t)0xe8b8, (q15_t)0x7ddc, (q15_t)0xe8b2,
-  (q15_t)0x7dda, (q15_t)0xe8ab, (q15_t)0x7dd9, (q15_t)0xe8a5, (q15_t)0x7dd8, (q15_t)0xe89f, (q15_t)0x7dd7, (q15_t)0xe899,
-  (q15_t)0x7dd6, (q15_t)0xe893, (q15_t)0x7dd5, (q15_t)0xe88c, (q15_t)0x7dd4, (q15_t)0xe886, (q15_t)0x7dd2, (q15_t)0xe880,
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-  (q15_t)0x7dcd, (q15_t)0xe861, (q15_t)0x7dcc, (q15_t)0xe85b, (q15_t)0x7dca, (q15_t)0xe855, (q15_t)0x7dc9, (q15_t)0xe84f,
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-  (q15_t)0x7dc3, (q15_t)0xe830, (q15_t)0x7dc2, (q15_t)0xe82a, (q15_t)0x7dc1, (q15_t)0xe823, (q15_t)0x7dc0, (q15_t)0xe81d,
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-  (q15_t)0x7db0, (q15_t)0xe7cd, (q15_t)0x7daf, (q15_t)0xe7c7, (q15_t)0x7dae, (q15_t)0xe7c1, (q15_t)0x7dad, (q15_t)0xe7bb,
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-  (q15_t)0x7da7, (q15_t)0xe79c, (q15_t)0x7da6, (q15_t)0xe796, (q15_t)0x7da5, (q15_t)0xe78f, (q15_t)0x7da3, (q15_t)0xe789,
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-  (q15_t)0x7d8a, (q15_t)0xe708, (q15_t)0x7d89, (q15_t)0xe702, (q15_t)0x7d87, (q15_t)0xe6fb, (q15_t)0x7d86, (q15_t)0xe6f5,
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-  (q15_t)0x7d7b, (q15_t)0xe6be, (q15_t)0x7d7a, (q15_t)0xe6b8, (q15_t)0x7d79, (q15_t)0xe6b2, (q15_t)0x7d77, (q15_t)0xe6ab,
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-  (q15_t)0x7d6c, (q15_t)0xe674, (q15_t)0x7d6b, (q15_t)0xe66e, (q15_t)0x7d6a, (q15_t)0xe668, (q15_t)0x7d68, (q15_t)0xe661,
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-  (q15_t)0x7d5d, (q15_t)0xe62a, (q15_t)0x7d5c, (q15_t)0xe624, (q15_t)0x7d5a, (q15_t)0xe61e, (q15_t)0x7d59, (q15_t)0xe618,
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-  (q15_t)0x7d4e, (q15_t)0xe5e0, (q15_t)0x7d4c, (q15_t)0xe5da, (q15_t)0x7d4b, (q15_t)0xe5d4, (q15_t)0x7d4a, (q15_t)0xe5ce,
-  (q15_t)0x7d49, (q15_t)0xe5c8, (q15_t)0x7d47, (q15_t)0xe5c2, (q15_t)0x7d46, (q15_t)0xe5bb, (q15_t)0x7d45, (q15_t)0xe5b5,
-  (q15_t)0x7d43, (q15_t)0xe5af, (q15_t)0x7d42, (q15_t)0xe5a9, (q15_t)0x7d41, (q15_t)0xe5a3, (q15_t)0x7d3f, (q15_t)0xe59d,
-  (q15_t)0x7d3e, (q15_t)0xe596, (q15_t)0x7d3d, (q15_t)0xe590, (q15_t)0x7d3c, (q15_t)0xe58a, (q15_t)0x7d3a, (q15_t)0xe584,
-  (q15_t)0x7d39, (q15_t)0xe57e, (q15_t)0x7d38, (q15_t)0xe578, (q15_t)0x7d36, (q15_t)0xe572, (q15_t)0x7d35, (q15_t)0xe56b,
-  (q15_t)0x7d34, (q15_t)0xe565, (q15_t)0x7d32, (q15_t)0xe55f, (q15_t)0x7d31, (q15_t)0xe559, (q15_t)0x7d30, (q15_t)0xe553,
-  (q15_t)0x7d2f, (q15_t)0xe54d, (q15_t)0x7d2d, (q15_t)0xe547, (q15_t)0x7d2c, (q15_t)0xe540, (q15_t)0x7d2b, (q15_t)0xe53a,
-  (q15_t)0x7d29, (q15_t)0xe534, (q15_t)0x7d28, (q15_t)0xe52e, (q15_t)0x7d27, (q15_t)0xe528, (q15_t)0x7d25, (q15_t)0xe522,
-  (q15_t)0x7d24, (q15_t)0xe51c, (q15_t)0x7d23, (q15_t)0xe515, (q15_t)0x7d21, (q15_t)0xe50f, (q15_t)0x7d20, (q15_t)0xe509,
-  (q15_t)0x7d1f, (q15_t)0xe503, (q15_t)0x7d1d, (q15_t)0xe4fd, (q15_t)0x7d1c, (q15_t)0xe4f7, (q15_t)0x7d1b, (q15_t)0xe4f1,
-  (q15_t)0x7d19, (q15_t)0xe4ea, (q15_t)0x7d18, (q15_t)0xe4e4, (q15_t)0x7d17, (q15_t)0xe4de, (q15_t)0x7d15, (q15_t)0xe4d8,
-  (q15_t)0x7d14, (q15_t)0xe4d2, (q15_t)0x7d13, (q15_t)0xe4cc, (q15_t)0x7d11, (q15_t)0xe4c6, (q15_t)0x7d10, (q15_t)0xe4bf,
-  (q15_t)0x7d0f, (q15_t)0xe4b9, (q15_t)0x7d0d, (q15_t)0xe4b3, (q15_t)0x7d0c, (q15_t)0xe4ad, (q15_t)0x7d0b, (q15_t)0xe4a7,
-  (q15_t)0x7d09, (q15_t)0xe4a1, (q15_t)0x7d08, (q15_t)0xe49b, (q15_t)0x7d07, (q15_t)0xe494, (q15_t)0x7d05, (q15_t)0xe48e,
-  (q15_t)0x7d04, (q15_t)0xe488, (q15_t)0x7d03, (q15_t)0xe482, (q15_t)0x7d01, (q15_t)0xe47c, (q15_t)0x7d00, (q15_t)0xe476,
-  (q15_t)0x7cff, (q15_t)0xe470, (q15_t)0x7cfd, (q15_t)0xe46a, (q15_t)0x7cfc, (q15_t)0xe463, (q15_t)0x7cfb, (q15_t)0xe45d,
-  (q15_t)0x7cf9, (q15_t)0xe457, (q15_t)0x7cf8, (q15_t)0xe451, (q15_t)0x7cf6, (q15_t)0xe44b, (q15_t)0x7cf5, (q15_t)0xe445,
-  (q15_t)0x7cf4, (q15_t)0xe43f, (q15_t)0x7cf2, (q15_t)0xe438, (q15_t)0x7cf1, (q15_t)0xe432, (q15_t)0x7cf0, (q15_t)0xe42c,
-  (q15_t)0x7cee, (q15_t)0xe426, (q15_t)0x7ced, (q15_t)0xe420, (q15_t)0x7cec, (q15_t)0xe41a, (q15_t)0x7cea, (q15_t)0xe414,
-  (q15_t)0x7ce9, (q15_t)0xe40e, (q15_t)0x7ce7, (q15_t)0xe407, (q15_t)0x7ce6, (q15_t)0xe401, (q15_t)0x7ce5, (q15_t)0xe3fb,
-  (q15_t)0x7ce3, (q15_t)0xe3f5, (q15_t)0x7ce2, (q15_t)0xe3ef, (q15_t)0x7ce1, (q15_t)0xe3e9, (q15_t)0x7cdf, (q15_t)0xe3e3,
-  (q15_t)0x7cde, (q15_t)0xe3dc, (q15_t)0x7cdc, (q15_t)0xe3d6, (q15_t)0x7cdb, (q15_t)0xe3d0, (q15_t)0x7cda, (q15_t)0xe3ca,
-  (q15_t)0x7cd8, (q15_t)0xe3c4, (q15_t)0x7cd7, (q15_t)0xe3be, (q15_t)0x7cd5, (q15_t)0xe3b8, (q15_t)0x7cd4, (q15_t)0xe3b2,
-  (q15_t)0x7cd3, (q15_t)0xe3ab, (q15_t)0x7cd1, (q15_t)0xe3a5, (q15_t)0x7cd0, (q15_t)0xe39f, (q15_t)0x7ccf, (q15_t)0xe399,
-  (q15_t)0x7ccd, (q15_t)0xe393, (q15_t)0x7ccc, (q15_t)0xe38d, (q15_t)0x7cca, (q15_t)0xe387, (q15_t)0x7cc9, (q15_t)0xe381,
-  (q15_t)0x7cc8, (q15_t)0xe37a, (q15_t)0x7cc6, (q15_t)0xe374, (q15_t)0x7cc5, (q15_t)0xe36e, (q15_t)0x7cc3, (q15_t)0xe368,
-  (q15_t)0x7cc2, (q15_t)0xe362, (q15_t)0x7cc1, (q15_t)0xe35c, (q15_t)0x7cbf, (q15_t)0xe356, (q15_t)0x7cbe, (q15_t)0xe350,
-  (q15_t)0x7cbc, (q15_t)0xe349, (q15_t)0x7cbb, (q15_t)0xe343, (q15_t)0x7cb9, (q15_t)0xe33d, (q15_t)0x7cb8, (q15_t)0xe337,
-  (q15_t)0x7cb7, (q15_t)0xe331, (q15_t)0x7cb5, (q15_t)0xe32b, (q15_t)0x7cb4, (q15_t)0xe325, (q15_t)0x7cb2, (q15_t)0xe31f,
-  (q15_t)0x7cb1, (q15_t)0xe318, (q15_t)0x7cb0, (q15_t)0xe312, (q15_t)0x7cae, (q15_t)0xe30c, (q15_t)0x7cad, (q15_t)0xe306,
-  (q15_t)0x7cab, (q15_t)0xe300, (q15_t)0x7caa, (q15_t)0xe2fa, (q15_t)0x7ca8, (q15_t)0xe2f4, (q15_t)0x7ca7, (q15_t)0xe2ee,
-  (q15_t)0x7ca6, (q15_t)0xe2e8, (q15_t)0x7ca4, (q15_t)0xe2e1, (q15_t)0x7ca3, (q15_t)0xe2db, (q15_t)0x7ca1, (q15_t)0xe2d5,
-  (q15_t)0x7ca0, (q15_t)0xe2cf, (q15_t)0x7c9e, (q15_t)0xe2c9, (q15_t)0x7c9d, (q15_t)0xe2c3, (q15_t)0x7c9c, (q15_t)0xe2bd,
-  (q15_t)0x7c9a, (q15_t)0xe2b7, (q15_t)0x7c99, (q15_t)0xe2b0, (q15_t)0x7c97, (q15_t)0xe2aa, (q15_t)0x7c96, (q15_t)0xe2a4,
-  (q15_t)0x7c94, (q15_t)0xe29e, (q15_t)0x7c93, (q15_t)0xe298, (q15_t)0x7c91, (q15_t)0xe292, (q15_t)0x7c90, (q15_t)0xe28c,
-  (q15_t)0x7c8f, (q15_t)0xe286, (q15_t)0x7c8d, (q15_t)0xe280, (q15_t)0x7c8c, (q15_t)0xe279, (q15_t)0x7c8a, (q15_t)0xe273,
-  (q15_t)0x7c89, (q15_t)0xe26d, (q15_t)0x7c87, (q15_t)0xe267, (q15_t)0x7c86, (q15_t)0xe261, (q15_t)0x7c84, (q15_t)0xe25b,
-  (q15_t)0x7c83, (q15_t)0xe255, (q15_t)0x7c82, (q15_t)0xe24f, (q15_t)0x7c80, (q15_t)0xe249, (q15_t)0x7c7f, (q15_t)0xe242,
-  (q15_t)0x7c7d, (q15_t)0xe23c, (q15_t)0x7c7c, (q15_t)0xe236, (q15_t)0x7c7a, (q15_t)0xe230, (q15_t)0x7c79, (q15_t)0xe22a,
-  (q15_t)0x7c77, (q15_t)0xe224, (q15_t)0x7c76, (q15_t)0xe21e, (q15_t)0x7c74, (q15_t)0xe218, (q15_t)0x7c73, (q15_t)0xe212,
-  (q15_t)0x7c71, (q15_t)0xe20b, (q15_t)0x7c70, (q15_t)0xe205, (q15_t)0x7c6e, (q15_t)0xe1ff, (q15_t)0x7c6d, (q15_t)0xe1f9,
-  (q15_t)0x7c6c, (q15_t)0xe1f3, (q15_t)0x7c6a, (q15_t)0xe1ed, (q15_t)0x7c69, (q15_t)0xe1e7, (q15_t)0x7c67, (q15_t)0xe1e1,
-  (q15_t)0x7c66, (q15_t)0xe1db, (q15_t)0x7c64, (q15_t)0xe1d4, (q15_t)0x7c63, (q15_t)0xe1ce, (q15_t)0x7c61, (q15_t)0xe1c8,
-  (q15_t)0x7c60, (q15_t)0xe1c2, (q15_t)0x7c5e, (q15_t)0xe1bc, (q15_t)0x7c5d, (q15_t)0xe1b6, (q15_t)0x7c5b, (q15_t)0xe1b0,
-  (q15_t)0x7c5a, (q15_t)0xe1aa, (q15_t)0x7c58, (q15_t)0xe1a4, (q15_t)0x7c57, (q15_t)0xe19e, (q15_t)0x7c55, (q15_t)0xe197,
-  (q15_t)0x7c54, (q15_t)0xe191, (q15_t)0x7c52, (q15_t)0xe18b, (q15_t)0x7c51, (q15_t)0xe185, (q15_t)0x7c4f, (q15_t)0xe17f,
-  (q15_t)0x7c4e, (q15_t)0xe179, (q15_t)0x7c4c, (q15_t)0xe173, (q15_t)0x7c4b, (q15_t)0xe16d, (q15_t)0x7c49, (q15_t)0xe167,
-  (q15_t)0x7c48, (q15_t)0xe160, (q15_t)0x7c46, (q15_t)0xe15a, (q15_t)0x7c45, (q15_t)0xe154, (q15_t)0x7c43, (q15_t)0xe14e,
-  (q15_t)0x7c42, (q15_t)0xe148, (q15_t)0x7c40, (q15_t)0xe142, (q15_t)0x7c3f, (q15_t)0xe13c, (q15_t)0x7c3d, (q15_t)0xe136,
-  (q15_t)0x7c3c, (q15_t)0xe130, (q15_t)0x7c3a, (q15_t)0xe12a, (q15_t)0x7c39, (q15_t)0xe123, (q15_t)0x7c37, (q15_t)0xe11d,
-  (q15_t)0x7c36, (q15_t)0xe117, (q15_t)0x7c34, (q15_t)0xe111, (q15_t)0x7c33, (q15_t)0xe10b, (q15_t)0x7c31, (q15_t)0xe105,
-  (q15_t)0x7c30, (q15_t)0xe0ff, (q15_t)0x7c2e, (q15_t)0xe0f9, (q15_t)0x7c2d, (q15_t)0xe0f3, (q15_t)0x7c2b, (q15_t)0xe0ed,
-  (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7c28, (q15_t)0xe0e0, (q15_t)0x7c26, (q15_t)0xe0da, (q15_t)0x7c25, (q15_t)0xe0d4,
-  (q15_t)0x7c23, (q15_t)0xe0ce, (q15_t)0x7c22, (q15_t)0xe0c8, (q15_t)0x7c20, (q15_t)0xe0c2, (q15_t)0x7c1f, (q15_t)0xe0bc,
-  (q15_t)0x7c1d, (q15_t)0xe0b6, (q15_t)0x7c1c, (q15_t)0xe0b0, (q15_t)0x7c1a, (q15_t)0xe0aa, (q15_t)0x7c19, (q15_t)0xe0a3,
-  (q15_t)0x7c17, (q15_t)0xe09d, (q15_t)0x7c16, (q15_t)0xe097, (q15_t)0x7c14, (q15_t)0xe091, (q15_t)0x7c12, (q15_t)0xe08b,
-  (q15_t)0x7c11, (q15_t)0xe085, (q15_t)0x7c0f, (q15_t)0xe07f, (q15_t)0x7c0e, (q15_t)0xe079, (q15_t)0x7c0c, (q15_t)0xe073,
-  (q15_t)0x7c0b, (q15_t)0xe06d, (q15_t)0x7c09, (q15_t)0xe067, (q15_t)0x7c08, (q15_t)0xe061, (q15_t)0x7c06, (q15_t)0xe05a,
-  (q15_t)0x7c05, (q15_t)0xe054, (q15_t)0x7c03, (q15_t)0xe04e, (q15_t)0x7c01, (q15_t)0xe048, (q15_t)0x7c00, (q15_t)0xe042,
-  (q15_t)0x7bfe, (q15_t)0xe03c, (q15_t)0x7bfd, (q15_t)0xe036, (q15_t)0x7bfb, (q15_t)0xe030, (q15_t)0x7bfa, (q15_t)0xe02a,
-  (q15_t)0x7bf8, (q15_t)0xe024, (q15_t)0x7bf6, (q15_t)0xe01e, (q15_t)0x7bf5, (q15_t)0xe017, (q15_t)0x7bf3, (q15_t)0xe011,
-  (q15_t)0x7bf2, (q15_t)0xe00b, (q15_t)0x7bf0, (q15_t)0xe005, (q15_t)0x7bef, (q15_t)0xdfff, (q15_t)0x7bed, (q15_t)0xdff9,
-  (q15_t)0x7beb, (q15_t)0xdff3, (q15_t)0x7bea, (q15_t)0xdfed, (q15_t)0x7be8, (q15_t)0xdfe7, (q15_t)0x7be7, (q15_t)0xdfe1,
-  (q15_t)0x7be5, (q15_t)0xdfdb, (q15_t)0x7be4, (q15_t)0xdfd5, (q15_t)0x7be2, (q15_t)0xdfce, (q15_t)0x7be0, (q15_t)0xdfc8,
-  (q15_t)0x7bdf, (q15_t)0xdfc2, (q15_t)0x7bdd, (q15_t)0xdfbc, (q15_t)0x7bdc, (q15_t)0xdfb6, (q15_t)0x7bda, (q15_t)0xdfb0,
-  (q15_t)0x7bd9, (q15_t)0xdfaa, (q15_t)0x7bd7, (q15_t)0xdfa4, (q15_t)0x7bd5, (q15_t)0xdf9e, (q15_t)0x7bd4, (q15_t)0xdf98,
-  (q15_t)0x7bd2, (q15_t)0xdf92, (q15_t)0x7bd1, (q15_t)0xdf8c, (q15_t)0x7bcf, (q15_t)0xdf86, (q15_t)0x7bcd, (q15_t)0xdf7f,
-  (q15_t)0x7bcc, (q15_t)0xdf79, (q15_t)0x7bca, (q15_t)0xdf73, (q15_t)0x7bc9, (q15_t)0xdf6d, (q15_t)0x7bc7, (q15_t)0xdf67,
-  (q15_t)0x7bc5, (q15_t)0xdf61, (q15_t)0x7bc4, (q15_t)0xdf5b, (q15_t)0x7bc2, (q15_t)0xdf55, (q15_t)0x7bc1, (q15_t)0xdf4f,
-  (q15_t)0x7bbf, (q15_t)0xdf49, (q15_t)0x7bbd, (q15_t)0xdf43, (q15_t)0x7bbc, (q15_t)0xdf3d, (q15_t)0x7bba, (q15_t)0xdf37,
-  (q15_t)0x7bb9, (q15_t)0xdf30, (q15_t)0x7bb7, (q15_t)0xdf2a, (q15_t)0x7bb5, (q15_t)0xdf24, (q15_t)0x7bb4, (q15_t)0xdf1e,
-  (q15_t)0x7bb2, (q15_t)0xdf18, (q15_t)0x7bb0, (q15_t)0xdf12, (q15_t)0x7baf, (q15_t)0xdf0c, (q15_t)0x7bad, (q15_t)0xdf06,
-  (q15_t)0x7bac, (q15_t)0xdf00, (q15_t)0x7baa, (q15_t)0xdefa, (q15_t)0x7ba8, (q15_t)0xdef4, (q15_t)0x7ba7, (q15_t)0xdeee,
-  (q15_t)0x7ba5, (q15_t)0xdee8, (q15_t)0x7ba3, (q15_t)0xdee2, (q15_t)0x7ba2, (q15_t)0xdedb, (q15_t)0x7ba0, (q15_t)0xded5,
-  (q15_t)0x7b9f, (q15_t)0xdecf, (q15_t)0x7b9d, (q15_t)0xdec9, (q15_t)0x7b9b, (q15_t)0xdec3, (q15_t)0x7b9a, (q15_t)0xdebd,
-  (q15_t)0x7b98, (q15_t)0xdeb7, (q15_t)0x7b96, (q15_t)0xdeb1, (q15_t)0x7b95, (q15_t)0xdeab, (q15_t)0x7b93, (q15_t)0xdea5,
-  (q15_t)0x7b92, (q15_t)0xde9f, (q15_t)0x7b90, (q15_t)0xde99, (q15_t)0x7b8e, (q15_t)0xde93, (q15_t)0x7b8d, (q15_t)0xde8d,
-  (q15_t)0x7b8b, (q15_t)0xde87, (q15_t)0x7b89, (q15_t)0xde80, (q15_t)0x7b88, (q15_t)0xde7a, (q15_t)0x7b86, (q15_t)0xde74,
-  (q15_t)0x7b84, (q15_t)0xde6e, (q15_t)0x7b83, (q15_t)0xde68, (q15_t)0x7b81, (q15_t)0xde62, (q15_t)0x7b7f, (q15_t)0xde5c,
-  (q15_t)0x7b7e, (q15_t)0xde56, (q15_t)0x7b7c, (q15_t)0xde50, (q15_t)0x7b7a, (q15_t)0xde4a, (q15_t)0x7b79, (q15_t)0xde44,
-  (q15_t)0x7b77, (q15_t)0xde3e, (q15_t)0x7b76, (q15_t)0xde38, (q15_t)0x7b74, (q15_t)0xde32, (q15_t)0x7b72, (q15_t)0xde2c,
-  (q15_t)0x7b71, (q15_t)0xde26, (q15_t)0x7b6f, (q15_t)0xde1f, (q15_t)0x7b6d, (q15_t)0xde19, (q15_t)0x7b6c, (q15_t)0xde13,
-  (q15_t)0x7b6a, (q15_t)0xde0d, (q15_t)0x7b68, (q15_t)0xde07, (q15_t)0x7b67, (q15_t)0xde01, (q15_t)0x7b65, (q15_t)0xddfb,
-  (q15_t)0x7b63, (q15_t)0xddf5, (q15_t)0x7b62, (q15_t)0xddef, (q15_t)0x7b60, (q15_t)0xdde9, (q15_t)0x7b5e, (q15_t)0xdde3,
-  (q15_t)0x7b5d, (q15_t)0xdddd, (q15_t)0x7b5b, (q15_t)0xddd7, (q15_t)0x7b59, (q15_t)0xddd1, (q15_t)0x7b57, (q15_t)0xddcb,
-  (q15_t)0x7b56, (q15_t)0xddc5, (q15_t)0x7b54, (q15_t)0xddbf, (q15_t)0x7b52, (q15_t)0xddb9, (q15_t)0x7b51, (q15_t)0xddb2,
-  (q15_t)0x7b4f, (q15_t)0xddac, (q15_t)0x7b4d, (q15_t)0xdda6, (q15_t)0x7b4c, (q15_t)0xdda0, (q15_t)0x7b4a, (q15_t)0xdd9a,
-  (q15_t)0x7b48, (q15_t)0xdd94, (q15_t)0x7b47, (q15_t)0xdd8e, (q15_t)0x7b45, (q15_t)0xdd88, (q15_t)0x7b43, (q15_t)0xdd82,
-  (q15_t)0x7b42, (q15_t)0xdd7c, (q15_t)0x7b40, (q15_t)0xdd76, (q15_t)0x7b3e, (q15_t)0xdd70, (q15_t)0x7b3c, (q15_t)0xdd6a,
-  (q15_t)0x7b3b, (q15_t)0xdd64, (q15_t)0x7b39, (q15_t)0xdd5e, (q15_t)0x7b37, (q15_t)0xdd58, (q15_t)0x7b36, (q15_t)0xdd52,
-  (q15_t)0x7b34, (q15_t)0xdd4c, (q15_t)0x7b32, (q15_t)0xdd46, (q15_t)0x7b31, (q15_t)0xdd40, (q15_t)0x7b2f, (q15_t)0xdd39,
-  (q15_t)0x7b2d, (q15_t)0xdd33, (q15_t)0x7b2b, (q15_t)0xdd2d, (q15_t)0x7b2a, (q15_t)0xdd27, (q15_t)0x7b28, (q15_t)0xdd21,
-  (q15_t)0x7b26, (q15_t)0xdd1b, (q15_t)0x7b25, (q15_t)0xdd15, (q15_t)0x7b23, (q15_t)0xdd0f, (q15_t)0x7b21, (q15_t)0xdd09,
-  (q15_t)0x7b1f, (q15_t)0xdd03, (q15_t)0x7b1e, (q15_t)0xdcfd, (q15_t)0x7b1c, (q15_t)0xdcf7, (q15_t)0x7b1a, (q15_t)0xdcf1,
-  (q15_t)0x7b19, (q15_t)0xdceb, (q15_t)0x7b17, (q15_t)0xdce5, (q15_t)0x7b15, (q15_t)0xdcdf, (q15_t)0x7b13, (q15_t)0xdcd9,
-  (q15_t)0x7b12, (q15_t)0xdcd3, (q15_t)0x7b10, (q15_t)0xdccd, (q15_t)0x7b0e, (q15_t)0xdcc7, (q15_t)0x7b0c, (q15_t)0xdcc1,
-  (q15_t)0x7b0b, (q15_t)0xdcbb, (q15_t)0x7b09, (q15_t)0xdcb5, (q15_t)0x7b07, (q15_t)0xdcae, (q15_t)0x7b06, (q15_t)0xdca8,
-  (q15_t)0x7b04, (q15_t)0xdca2, (q15_t)0x7b02, (q15_t)0xdc9c, (q15_t)0x7b00, (q15_t)0xdc96, (q15_t)0x7aff, (q15_t)0xdc90,
-  (q15_t)0x7afd, (q15_t)0xdc8a, (q15_t)0x7afb, (q15_t)0xdc84, (q15_t)0x7af9, (q15_t)0xdc7e, (q15_t)0x7af8, (q15_t)0xdc78,
-  (q15_t)0x7af6, (q15_t)0xdc72, (q15_t)0x7af4, (q15_t)0xdc6c, (q15_t)0x7af2, (q15_t)0xdc66, (q15_t)0x7af1, (q15_t)0xdc60,
-  (q15_t)0x7aef, (q15_t)0xdc5a, (q15_t)0x7aed, (q15_t)0xdc54, (q15_t)0x7aeb, (q15_t)0xdc4e, (q15_t)0x7aea, (q15_t)0xdc48,
-  (q15_t)0x7ae8, (q15_t)0xdc42, (q15_t)0x7ae6, (q15_t)0xdc3c, (q15_t)0x7ae4, (q15_t)0xdc36, (q15_t)0x7ae3, (q15_t)0xdc30,
-  (q15_t)0x7ae1, (q15_t)0xdc2a, (q15_t)0x7adf, (q15_t)0xdc24, (q15_t)0x7add, (q15_t)0xdc1e, (q15_t)0x7adc, (q15_t)0xdc18,
-  (q15_t)0x7ada, (q15_t)0xdc12, (q15_t)0x7ad8, (q15_t)0xdc0c, (q15_t)0x7ad6, (q15_t)0xdc06, (q15_t)0x7ad5, (q15_t)0xdbff,
-  (q15_t)0x7ad3, (q15_t)0xdbf9, (q15_t)0x7ad1, (q15_t)0xdbf3, (q15_t)0x7acf, (q15_t)0xdbed, (q15_t)0x7acd, (q15_t)0xdbe7,
-  (q15_t)0x7acc, (q15_t)0xdbe1, (q15_t)0x7aca, (q15_t)0xdbdb, (q15_t)0x7ac8, (q15_t)0xdbd5, (q15_t)0x7ac6, (q15_t)0xdbcf,
-  (q15_t)0x7ac5, (q15_t)0xdbc9, (q15_t)0x7ac3, (q15_t)0xdbc3, (q15_t)0x7ac1, (q15_t)0xdbbd, (q15_t)0x7abf, (q15_t)0xdbb7,
-  (q15_t)0x7abd, (q15_t)0xdbb1, (q15_t)0x7abc, (q15_t)0xdbab, (q15_t)0x7aba, (q15_t)0xdba5, (q15_t)0x7ab8, (q15_t)0xdb9f,
-  (q15_t)0x7ab6, (q15_t)0xdb99, (q15_t)0x7ab5, (q15_t)0xdb93, (q15_t)0x7ab3, (q15_t)0xdb8d, (q15_t)0x7ab1, (q15_t)0xdb87,
-  (q15_t)0x7aaf, (q15_t)0xdb81, (q15_t)0x7aad, (q15_t)0xdb7b, (q15_t)0x7aac, (q15_t)0xdb75, (q15_t)0x7aaa, (q15_t)0xdb6f,
-  (q15_t)0x7aa8, (q15_t)0xdb69, (q15_t)0x7aa6, (q15_t)0xdb63, (q15_t)0x7aa4, (q15_t)0xdb5d, (q15_t)0x7aa3, (q15_t)0xdb57,
-  (q15_t)0x7aa1, (q15_t)0xdb51, (q15_t)0x7a9f, (q15_t)0xdb4b, (q15_t)0x7a9d, (q15_t)0xdb45, (q15_t)0x7a9b, (q15_t)0xdb3f,
-  (q15_t)0x7a9a, (q15_t)0xdb39, (q15_t)0x7a98, (q15_t)0xdb33, (q15_t)0x7a96, (q15_t)0xdb2d, (q15_t)0x7a94, (q15_t)0xdb27,
-  (q15_t)0x7a92, (q15_t)0xdb21, (q15_t)0x7a91, (q15_t)0xdb1b, (q15_t)0x7a8f, (q15_t)0xdb15, (q15_t)0x7a8d, (q15_t)0xdb0f,
-  (q15_t)0x7a8b, (q15_t)0xdb09, (q15_t)0x7a89, (q15_t)0xdb03, (q15_t)0x7a87, (q15_t)0xdafd, (q15_t)0x7a86, (q15_t)0xdaf7,
-  (q15_t)0x7a84, (q15_t)0xdaf1, (q15_t)0x7a82, (q15_t)0xdaea, (q15_t)0x7a80, (q15_t)0xdae4, (q15_t)0x7a7e, (q15_t)0xdade,
-  (q15_t)0x7a7d, (q15_t)0xdad8, (q15_t)0x7a7b, (q15_t)0xdad2, (q15_t)0x7a79, (q15_t)0xdacc, (q15_t)0x7a77, (q15_t)0xdac6,
-  (q15_t)0x7a75, (q15_t)0xdac0, (q15_t)0x7a73, (q15_t)0xdaba, (q15_t)0x7a72, (q15_t)0xdab4, (q15_t)0x7a70, (q15_t)0xdaae,
-  (q15_t)0x7a6e, (q15_t)0xdaa8, (q15_t)0x7a6c, (q15_t)0xdaa2, (q15_t)0x7a6a, (q15_t)0xda9c, (q15_t)0x7a68, (q15_t)0xda96,
-  (q15_t)0x7a67, (q15_t)0xda90, (q15_t)0x7a65, (q15_t)0xda8a, (q15_t)0x7a63, (q15_t)0xda84, (q15_t)0x7a61, (q15_t)0xda7e,
-  (q15_t)0x7a5f, (q15_t)0xda78, (q15_t)0x7a5d, (q15_t)0xda72, (q15_t)0x7a5c, (q15_t)0xda6c, (q15_t)0x7a5a, (q15_t)0xda66,
-  (q15_t)0x7a58, (q15_t)0xda60, (q15_t)0x7a56, (q15_t)0xda5a, (q15_t)0x7a54, (q15_t)0xda54, (q15_t)0x7a52, (q15_t)0xda4e,
-  (q15_t)0x7a50, (q15_t)0xda48, (q15_t)0x7a4f, (q15_t)0xda42, (q15_t)0x7a4d, (q15_t)0xda3c, (q15_t)0x7a4b, (q15_t)0xda36,
-  (q15_t)0x7a49, (q15_t)0xda30, (q15_t)0x7a47, (q15_t)0xda2a, (q15_t)0x7a45, (q15_t)0xda24, (q15_t)0x7a43, (q15_t)0xda1e,
-  (q15_t)0x7a42, (q15_t)0xda18, (q15_t)0x7a40, (q15_t)0xda12, (q15_t)0x7a3e, (q15_t)0xda0c, (q15_t)0x7a3c, (q15_t)0xda06,
-  (q15_t)0x7a3a, (q15_t)0xda00, (q15_t)0x7a38, (q15_t)0xd9fa, (q15_t)0x7a36, (q15_t)0xd9f4, (q15_t)0x7a35, (q15_t)0xd9ee,
-  (q15_t)0x7a33, (q15_t)0xd9e8, (q15_t)0x7a31, (q15_t)0xd9e2, (q15_t)0x7a2f, (q15_t)0xd9dc, (q15_t)0x7a2d, (q15_t)0xd9d6,
-  (q15_t)0x7a2b, (q15_t)0xd9d0, (q15_t)0x7a29, (q15_t)0xd9ca, (q15_t)0x7a27, (q15_t)0xd9c4, (q15_t)0x7a26, (q15_t)0xd9be,
-  (q15_t)0x7a24, (q15_t)0xd9b8, (q15_t)0x7a22, (q15_t)0xd9b2, (q15_t)0x7a20, (q15_t)0xd9ac, (q15_t)0x7a1e, (q15_t)0xd9a6,
-  (q15_t)0x7a1c, (q15_t)0xd9a0, (q15_t)0x7a1a, (q15_t)0xd99a, (q15_t)0x7a18, (q15_t)0xd994, (q15_t)0x7a16, (q15_t)0xd98e,
-  (q15_t)0x7a15, (q15_t)0xd988, (q15_t)0x7a13, (q15_t)0xd982, (q15_t)0x7a11, (q15_t)0xd97c, (q15_t)0x7a0f, (q15_t)0xd976,
-  (q15_t)0x7a0d, (q15_t)0xd970, (q15_t)0x7a0b, (q15_t)0xd96a, (q15_t)0x7a09, (q15_t)0xd964, (q15_t)0x7a07, (q15_t)0xd95e,
-  (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x7a04, (q15_t)0xd952, (q15_t)0x7a02, (q15_t)0xd94c, (q15_t)0x7a00, (q15_t)0xd946,
-  (q15_t)0x79fe, (q15_t)0xd940, (q15_t)0x79fc, (q15_t)0xd93a, (q15_t)0x79fa, (q15_t)0xd934, (q15_t)0x79f8, (q15_t)0xd92e,
-  (q15_t)0x79f6, (q15_t)0xd928, (q15_t)0x79f4, (q15_t)0xd922, (q15_t)0x79f2, (q15_t)0xd91c, (q15_t)0x79f0, (q15_t)0xd917,
-  (q15_t)0x79ef, (q15_t)0xd911, (q15_t)0x79ed, (q15_t)0xd90b, (q15_t)0x79eb, (q15_t)0xd905, (q15_t)0x79e9, (q15_t)0xd8ff,
-  (q15_t)0x79e7, (q15_t)0xd8f9, (q15_t)0x79e5, (q15_t)0xd8f3, (q15_t)0x79e3, (q15_t)0xd8ed, (q15_t)0x79e1, (q15_t)0xd8e7,
-  (q15_t)0x79df, (q15_t)0xd8e1, (q15_t)0x79dd, (q15_t)0xd8db, (q15_t)0x79db, (q15_t)0xd8d5, (q15_t)0x79d9, (q15_t)0xd8cf,
-  (q15_t)0x79d8, (q15_t)0xd8c9, (q15_t)0x79d6, (q15_t)0xd8c3, (q15_t)0x79d4, (q15_t)0xd8bd, (q15_t)0x79d2, (q15_t)0xd8b7,
-  (q15_t)0x79d0, (q15_t)0xd8b1, (q15_t)0x79ce, (q15_t)0xd8ab, (q15_t)0x79cc, (q15_t)0xd8a5, (q15_t)0x79ca, (q15_t)0xd89f,
-  (q15_t)0x79c8, (q15_t)0xd899, (q15_t)0x79c6, (q15_t)0xd893, (q15_t)0x79c4, (q15_t)0xd88d, (q15_t)0x79c2, (q15_t)0xd887,
-  (q15_t)0x79c0, (q15_t)0xd881, (q15_t)0x79be, (q15_t)0xd87b, (q15_t)0x79bc, (q15_t)0xd875, (q15_t)0x79bb, (q15_t)0xd86f,
-  (q15_t)0x79b9, (q15_t)0xd869, (q15_t)0x79b7, (q15_t)0xd863, (q15_t)0x79b5, (q15_t)0xd85d, (q15_t)0x79b3, (q15_t)0xd857,
-  (q15_t)0x79b1, (q15_t)0xd851, (q15_t)0x79af, (q15_t)0xd84b, (q15_t)0x79ad, (q15_t)0xd845, (q15_t)0x79ab, (q15_t)0xd83f,
-  (q15_t)0x79a9, (q15_t)0xd839, (q15_t)0x79a7, (q15_t)0xd833, (q15_t)0x79a5, (q15_t)0xd82d, (q15_t)0x79a3, (q15_t)0xd827,
-  (q15_t)0x79a1, (q15_t)0xd821, (q15_t)0x799f, (q15_t)0xd81b, (q15_t)0x799d, (q15_t)0xd815, (q15_t)0x799b, (q15_t)0xd80f,
-  (q15_t)0x7999, (q15_t)0xd80a, (q15_t)0x7997, (q15_t)0xd804, (q15_t)0x7995, (q15_t)0xd7fe, (q15_t)0x7993, (q15_t)0xd7f8,
-  (q15_t)0x7992, (q15_t)0xd7f2, (q15_t)0x7990, (q15_t)0xd7ec, (q15_t)0x798e, (q15_t)0xd7e6, (q15_t)0x798c, (q15_t)0xd7e0,
-  (q15_t)0x798a, (q15_t)0xd7da, (q15_t)0x7988, (q15_t)0xd7d4, (q15_t)0x7986, (q15_t)0xd7ce, (q15_t)0x7984, (q15_t)0xd7c8,
-  (q15_t)0x7982, (q15_t)0xd7c2, (q15_t)0x7980, (q15_t)0xd7bc, (q15_t)0x797e, (q15_t)0xd7b6, (q15_t)0x797c, (q15_t)0xd7b0,
-  (q15_t)0x797a, (q15_t)0xd7aa, (q15_t)0x7978, (q15_t)0xd7a4, (q15_t)0x7976, (q15_t)0xd79e, (q15_t)0x7974, (q15_t)0xd798,
-  (q15_t)0x7972, (q15_t)0xd792, (q15_t)0x7970, (q15_t)0xd78c, (q15_t)0x796e, (q15_t)0xd786, (q15_t)0x796c, (q15_t)0xd780,
-  (q15_t)0x796a, (q15_t)0xd77a, (q15_t)0x7968, (q15_t)0xd774, (q15_t)0x7966, (q15_t)0xd76e, (q15_t)0x7964, (q15_t)0xd768,
-  (q15_t)0x7962, (q15_t)0xd763, (q15_t)0x7960, (q15_t)0xd75d, (q15_t)0x795e, (q15_t)0xd757, (q15_t)0x795c, (q15_t)0xd751,
-  (q15_t)0x795a, (q15_t)0xd74b, (q15_t)0x7958, (q15_t)0xd745, (q15_t)0x7956, (q15_t)0xd73f, (q15_t)0x7954, (q15_t)0xd739,
-  (q15_t)0x7952, (q15_t)0xd733, (q15_t)0x7950, (q15_t)0xd72d, (q15_t)0x794e, (q15_t)0xd727, (q15_t)0x794c, (q15_t)0xd721,
-  (q15_t)0x794a, (q15_t)0xd71b, (q15_t)0x7948, (q15_t)0xd715, (q15_t)0x7946, (q15_t)0xd70f, (q15_t)0x7944, (q15_t)0xd709,
-  (q15_t)0x7942, (q15_t)0xd703, (q15_t)0x7940, (q15_t)0xd6fd, (q15_t)0x793e, (q15_t)0xd6f7, (q15_t)0x793c, (q15_t)0xd6f1,
-  (q15_t)0x793a, (q15_t)0xd6eb, (q15_t)0x7938, (q15_t)0xd6e5, (q15_t)0x7936, (q15_t)0xd6e0, (q15_t)0x7934, (q15_t)0xd6da,
-  (q15_t)0x7932, (q15_t)0xd6d4, (q15_t)0x7930, (q15_t)0xd6ce, (q15_t)0x792e, (q15_t)0xd6c8, (q15_t)0x792c, (q15_t)0xd6c2,
-  (q15_t)0x792a, (q15_t)0xd6bc, (q15_t)0x7928, (q15_t)0xd6b6, (q15_t)0x7926, (q15_t)0xd6b0, (q15_t)0x7924, (q15_t)0xd6aa,
-  (q15_t)0x7922, (q15_t)0xd6a4, (q15_t)0x7920, (q15_t)0xd69e, (q15_t)0x791e, (q15_t)0xd698, (q15_t)0x791c, (q15_t)0xd692,
-  (q15_t)0x7919, (q15_t)0xd68c, (q15_t)0x7917, (q15_t)0xd686, (q15_t)0x7915, (q15_t)0xd680, (q15_t)0x7913, (q15_t)0xd67a,
-  (q15_t)0x7911, (q15_t)0xd675, (q15_t)0x790f, (q15_t)0xd66f, (q15_t)0x790d, (q15_t)0xd669, (q15_t)0x790b, (q15_t)0xd663,
-  (q15_t)0x7909, (q15_t)0xd65d, (q15_t)0x7907, (q15_t)0xd657, (q15_t)0x7905, (q15_t)0xd651, (q15_t)0x7903, (q15_t)0xd64b,
-  (q15_t)0x7901, (q15_t)0xd645, (q15_t)0x78ff, (q15_t)0xd63f, (q15_t)0x78fd, (q15_t)0xd639, (q15_t)0x78fb, (q15_t)0xd633,
-  (q15_t)0x78f9, (q15_t)0xd62d, (q15_t)0x78f7, (q15_t)0xd627, (q15_t)0x78f5, (q15_t)0xd621, (q15_t)0x78f3, (q15_t)0xd61b,
-  (q15_t)0x78f1, (q15_t)0xd615, (q15_t)0x78ee, (q15_t)0xd610, (q15_t)0x78ec, (q15_t)0xd60a, (q15_t)0x78ea, (q15_t)0xd604,
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-  (q15_t)0x7684, (q15_t)0xcfa7, (q15_t)0x7682, (q15_t)0xcfa2, (q15_t)0x767f, (q15_t)0xcf9c, (q15_t)0x767d, (q15_t)0xcf96,
-  (q15_t)0x767b, (q15_t)0xcf90, (q15_t)0x7678, (q15_t)0xcf8a, (q15_t)0x7676, (q15_t)0xcf85, (q15_t)0x7673, (q15_t)0xcf7f,
-  (q15_t)0x7671, (q15_t)0xcf79, (q15_t)0x766f, (q15_t)0xcf73, (q15_t)0x766c, (q15_t)0xcf6d, (q15_t)0x766a, (q15_t)0xcf67,
-  (q15_t)0x7668, (q15_t)0xcf62, (q15_t)0x7665, (q15_t)0xcf5c, (q15_t)0x7663, (q15_t)0xcf56, (q15_t)0x7660, (q15_t)0xcf50,
-  (q15_t)0x765e, (q15_t)0xcf4a, (q15_t)0x765c, (q15_t)0xcf45, (q15_t)0x7659, (q15_t)0xcf3f, (q15_t)0x7657, (q15_t)0xcf39,
-  (q15_t)0x7654, (q15_t)0xcf33, (q15_t)0x7652, (q15_t)0xcf2d, (q15_t)0x7650, (q15_t)0xcf28, (q15_t)0x764d, (q15_t)0xcf22,
-  (q15_t)0x764b, (q15_t)0xcf1c, (q15_t)0x7648, (q15_t)0xcf16, (q15_t)0x7646, (q15_t)0xcf10, (q15_t)0x7644, (q15_t)0xcf0b,
-  (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x763f, (q15_t)0xceff, (q15_t)0x763c, (q15_t)0xcef9, (q15_t)0x763a, (q15_t)0xcef3,
-  (q15_t)0x7638, (q15_t)0xceee, (q15_t)0x7635, (q15_t)0xcee8, (q15_t)0x7633, (q15_t)0xcee2, (q15_t)0x7630, (q15_t)0xcedc,
-  (q15_t)0x762e, (q15_t)0xced6, (q15_t)0x762b, (q15_t)0xced1, (q15_t)0x7629, (q15_t)0xcecb, (q15_t)0x7627, (q15_t)0xcec5,
-  (q15_t)0x7624, (q15_t)0xcebf, (q15_t)0x7622, (q15_t)0xceb9, (q15_t)0x761f, (q15_t)0xceb4, (q15_t)0x761d, (q15_t)0xceae,
-  (q15_t)0x761b, (q15_t)0xcea8, (q15_t)0x7618, (q15_t)0xcea2, (q15_t)0x7616, (q15_t)0xce9c, (q15_t)0x7613, (q15_t)0xce97,
-  (q15_t)0x7611, (q15_t)0xce91, (q15_t)0x760e, (q15_t)0xce8b, (q15_t)0x760c, (q15_t)0xce85, (q15_t)0x760a, (q15_t)0xce7f,
-  (q15_t)0x7607, (q15_t)0xce7a, (q15_t)0x7605, (q15_t)0xce74, (q15_t)0x7602, (q15_t)0xce6e, (q15_t)0x7600, (q15_t)0xce68,
-  (q15_t)0x75fd, (q15_t)0xce62, (q15_t)0x75fb, (q15_t)0xce5d, (q15_t)0x75f9, (q15_t)0xce57, (q15_t)0x75f6, (q15_t)0xce51,
-  (q15_t)0x75f4, (q15_t)0xce4b, (q15_t)0x75f1, (q15_t)0xce45, (q15_t)0x75ef, (q15_t)0xce40, (q15_t)0x75ec, (q15_t)0xce3a,
-  (q15_t)0x75ea, (q15_t)0xce34, (q15_t)0x75e7, (q15_t)0xce2e, (q15_t)0x75e5, (q15_t)0xce28, (q15_t)0x75e3, (q15_t)0xce23,
-  (q15_t)0x75e0, (q15_t)0xce1d, (q15_t)0x75de, (q15_t)0xce17, (q15_t)0x75db, (q15_t)0xce11, (q15_t)0x75d9, (q15_t)0xce0c,
-  (q15_t)0x75d6, (q15_t)0xce06, (q15_t)0x75d4, (q15_t)0xce00, (q15_t)0x75d1, (q15_t)0xcdfa, (q15_t)0x75cf, (q15_t)0xcdf4,
-  (q15_t)0x75cc, (q15_t)0xcdef, (q15_t)0x75ca, (q15_t)0xcde9, (q15_t)0x75c8, (q15_t)0xcde3, (q15_t)0x75c5, (q15_t)0xcddd,
-  (q15_t)0x75c3, (q15_t)0xcdd8, (q15_t)0x75c0, (q15_t)0xcdd2, (q15_t)0x75be, (q15_t)0xcdcc, (q15_t)0x75bb, (q15_t)0xcdc6,
-  (q15_t)0x75b9, (q15_t)0xcdc0, (q15_t)0x75b6, (q15_t)0xcdbb, (q15_t)0x75b4, (q15_t)0xcdb5, (q15_t)0x75b1, (q15_t)0xcdaf,
-  (q15_t)0x75af, (q15_t)0xcda9, (q15_t)0x75ac, (q15_t)0xcda3, (q15_t)0x75aa, (q15_t)0xcd9e, (q15_t)0x75a7, (q15_t)0xcd98,
-  (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x75a3, (q15_t)0xcd8c, (q15_t)0x75a0, (q15_t)0xcd87, (q15_t)0x759e, (q15_t)0xcd81,
-  (q15_t)0x759b, (q15_t)0xcd7b, (q15_t)0x7599, (q15_t)0xcd75, (q15_t)0x7596, (q15_t)0xcd70, (q15_t)0x7594, (q15_t)0xcd6a,
-  (q15_t)0x7591, (q15_t)0xcd64, (q15_t)0x758f, (q15_t)0xcd5e, (q15_t)0x758c, (q15_t)0xcd58, (q15_t)0x758a, (q15_t)0xcd53,
-  (q15_t)0x7587, (q15_t)0xcd4d, (q15_t)0x7585, (q15_t)0xcd47, (q15_t)0x7582, (q15_t)0xcd41, (q15_t)0x7580, (q15_t)0xcd3c,
-  (q15_t)0x757d, (q15_t)0xcd36, (q15_t)0x757b, (q15_t)0xcd30, (q15_t)0x7578, (q15_t)0xcd2a, (q15_t)0x7576, (q15_t)0xcd25,
-  (q15_t)0x7573, (q15_t)0xcd1f, (q15_t)0x7571, (q15_t)0xcd19, (q15_t)0x756e, (q15_t)0xcd13, (q15_t)0x756c, (q15_t)0xcd0d,
-  (q15_t)0x7569, (q15_t)0xcd08, (q15_t)0x7567, (q15_t)0xcd02, (q15_t)0x7564, (q15_t)0xccfc, (q15_t)0x7562, (q15_t)0xccf6,
-  (q15_t)0x755f, (q15_t)0xccf1, (q15_t)0x755d, (q15_t)0xcceb, (q15_t)0x755a, (q15_t)0xcce5, (q15_t)0x7558, (q15_t)0xccdf,
-  (q15_t)0x7555, (q15_t)0xccda, (q15_t)0x7553, (q15_t)0xccd4, (q15_t)0x7550, (q15_t)0xccce, (q15_t)0x754e, (q15_t)0xccc8,
-  (q15_t)0x754b, (q15_t)0xccc3, (q15_t)0x7549, (q15_t)0xccbd, (q15_t)0x7546, (q15_t)0xccb7, (q15_t)0x7544, (q15_t)0xccb1,
-  (q15_t)0x7541, (q15_t)0xccac, (q15_t)0x753f, (q15_t)0xcca6, (q15_t)0x753c, (q15_t)0xcca0, (q15_t)0x753a, (q15_t)0xcc9a,
-  (q15_t)0x7537, (q15_t)0xcc95, (q15_t)0x7535, (q15_t)0xcc8f, (q15_t)0x7532, (q15_t)0xcc89, (q15_t)0x752f, (q15_t)0xcc83,
-  (q15_t)0x752d, (q15_t)0xcc7e, (q15_t)0x752a, (q15_t)0xcc78, (q15_t)0x7528, (q15_t)0xcc72, (q15_t)0x7525, (q15_t)0xcc6c,
-  (q15_t)0x7523, (q15_t)0xcc67, (q15_t)0x7520, (q15_t)0xcc61, (q15_t)0x751e, (q15_t)0xcc5b, (q15_t)0x751b, (q15_t)0xcc55,
-  (q15_t)0x7519, (q15_t)0xcc50, (q15_t)0x7516, (q15_t)0xcc4a, (q15_t)0x7514, (q15_t)0xcc44, (q15_t)0x7511, (q15_t)0xcc3e,
-  (q15_t)0x750f, (q15_t)0xcc39, (q15_t)0x750c, (q15_t)0xcc33, (q15_t)0x7509, (q15_t)0xcc2d, (q15_t)0x7507, (q15_t)0xcc27,
-  (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x7502, (q15_t)0xcc1c, (q15_t)0x74ff, (q15_t)0xcc16, (q15_t)0x74fd, (q15_t)0xcc10,
-  (q15_t)0x74fa, (q15_t)0xcc0b, (q15_t)0x74f8, (q15_t)0xcc05, (q15_t)0x74f5, (q15_t)0xcbff, (q15_t)0x74f2, (q15_t)0xcbf9,
-  (q15_t)0x74f0, (q15_t)0xcbf4, (q15_t)0x74ed, (q15_t)0xcbee, (q15_t)0x74eb, (q15_t)0xcbe8, (q15_t)0x74e8, (q15_t)0xcbe2,
-  (q15_t)0x74e6, (q15_t)0xcbdd, (q15_t)0x74e3, (q15_t)0xcbd7, (q15_t)0x74e1, (q15_t)0xcbd1, (q15_t)0x74de, (q15_t)0xcbcb,
-  (q15_t)0x74db, (q15_t)0xcbc6, (q15_t)0x74d9, (q15_t)0xcbc0, (q15_t)0x74d6, (q15_t)0xcbba, (q15_t)0x74d4, (q15_t)0xcbb5,
-  (q15_t)0x74d1, (q15_t)0xcbaf, (q15_t)0x74cf, (q15_t)0xcba9, (q15_t)0x74cc, (q15_t)0xcba3, (q15_t)0x74c9, (q15_t)0xcb9e,
-  (q15_t)0x74c7, (q15_t)0xcb98, (q15_t)0x74c4, (q15_t)0xcb92, (q15_t)0x74c2, (q15_t)0xcb8c, (q15_t)0x74bf, (q15_t)0xcb87,
-  (q15_t)0x74bd, (q15_t)0xcb81, (q15_t)0x74ba, (q15_t)0xcb7b, (q15_t)0x74b7, (q15_t)0xcb75, (q15_t)0x74b5, (q15_t)0xcb70,
-  (q15_t)0x74b2, (q15_t)0xcb6a, (q15_t)0x74b0, (q15_t)0xcb64, (q15_t)0x74ad, (q15_t)0xcb5f, (q15_t)0x74ab, (q15_t)0xcb59,
-  (q15_t)0x74a8, (q15_t)0xcb53, (q15_t)0x74a5, (q15_t)0xcb4d, (q15_t)0x74a3, (q15_t)0xcb48, (q15_t)0x74a0, (q15_t)0xcb42,
-  (q15_t)0x749e, (q15_t)0xcb3c, (q15_t)0x749b, (q15_t)0xcb36, (q15_t)0x7498, (q15_t)0xcb31, (q15_t)0x7496, (q15_t)0xcb2b,
-  (q15_t)0x7493, (q15_t)0xcb25, (q15_t)0x7491, (q15_t)0xcb20, (q15_t)0x748e, (q15_t)0xcb1a, (q15_t)0x748b, (q15_t)0xcb14,
-  (q15_t)0x7489, (q15_t)0xcb0e, (q15_t)0x7486, (q15_t)0xcb09, (q15_t)0x7484, (q15_t)0xcb03, (q15_t)0x7481, (q15_t)0xcafd,
-  (q15_t)0x747e, (q15_t)0xcaf8, (q15_t)0x747c, (q15_t)0xcaf2, (q15_t)0x7479, (q15_t)0xcaec, (q15_t)0x7477, (q15_t)0xcae6,
-  (q15_t)0x7474, (q15_t)0xcae1, (q15_t)0x7471, (q15_t)0xcadb, (q15_t)0x746f, (q15_t)0xcad5, (q15_t)0x746c, (q15_t)0xcad0,
-  (q15_t)0x746a, (q15_t)0xcaca, (q15_t)0x7467, (q15_t)0xcac4, (q15_t)0x7464, (q15_t)0xcabe, (q15_t)0x7462, (q15_t)0xcab9,
-  (q15_t)0x745f, (q15_t)0xcab3, (q15_t)0x745c, (q15_t)0xcaad, (q15_t)0x745a, (q15_t)0xcaa8, (q15_t)0x7457, (q15_t)0xcaa2,
-  (q15_t)0x7455, (q15_t)0xca9c, (q15_t)0x7452, (q15_t)0xca96, (q15_t)0x744f, (q15_t)0xca91, (q15_t)0x744d, (q15_t)0xca8b,
-  (q15_t)0x744a, (q15_t)0xca85, (q15_t)0x7448, (q15_t)0xca80, (q15_t)0x7445, (q15_t)0xca7a, (q15_t)0x7442, (q15_t)0xca74,
-  (q15_t)0x7440, (q15_t)0xca6e, (q15_t)0x743d, (q15_t)0xca69, (q15_t)0x743a, (q15_t)0xca63, (q15_t)0x7438, (q15_t)0xca5d,
-  (q15_t)0x7435, (q15_t)0xca58, (q15_t)0x7432, (q15_t)0xca52, (q15_t)0x7430, (q15_t)0xca4c, (q15_t)0x742d, (q15_t)0xca46,
-  (q15_t)0x742b, (q15_t)0xca41, (q15_t)0x7428, (q15_t)0xca3b, (q15_t)0x7425, (q15_t)0xca35, (q15_t)0x7423, (q15_t)0xca30,
-  (q15_t)0x7420, (q15_t)0xca2a, (q15_t)0x741d, (q15_t)0xca24, (q15_t)0x741b, (q15_t)0xca1f, (q15_t)0x7418, (q15_t)0xca19,
-  (q15_t)0x7415, (q15_t)0xca13, (q15_t)0x7413, (q15_t)0xca0d, (q15_t)0x7410, (q15_t)0xca08, (q15_t)0x740d, (q15_t)0xca02,
-  (q15_t)0x740b, (q15_t)0xc9fc, (q15_t)0x7408, (q15_t)0xc9f7, (q15_t)0x7406, (q15_t)0xc9f1, (q15_t)0x7403, (q15_t)0xc9eb,
-  (q15_t)0x7400, (q15_t)0xc9e6, (q15_t)0x73fe, (q15_t)0xc9e0, (q15_t)0x73fb, (q15_t)0xc9da, (q15_t)0x73f8, (q15_t)0xc9d5,
-  (q15_t)0x73f6, (q15_t)0xc9cf, (q15_t)0x73f3, (q15_t)0xc9c9, (q15_t)0x73f0, (q15_t)0xc9c3, (q15_t)0x73ee, (q15_t)0xc9be,
-  (q15_t)0x73eb, (q15_t)0xc9b8, (q15_t)0x73e8, (q15_t)0xc9b2, (q15_t)0x73e6, (q15_t)0xc9ad, (q15_t)0x73e3, (q15_t)0xc9a7,
-  (q15_t)0x73e0, (q15_t)0xc9a1, (q15_t)0x73de, (q15_t)0xc99c, (q15_t)0x73db, (q15_t)0xc996, (q15_t)0x73d8, (q15_t)0xc990,
-  (q15_t)0x73d6, (q15_t)0xc98b, (q15_t)0x73d3, (q15_t)0xc985, (q15_t)0x73d0, (q15_t)0xc97f, (q15_t)0x73ce, (q15_t)0xc97a,
-  (q15_t)0x73cb, (q15_t)0xc974, (q15_t)0x73c8, (q15_t)0xc96e, (q15_t)0x73c6, (q15_t)0xc968, (q15_t)0x73c3, (q15_t)0xc963,
-  (q15_t)0x73c0, (q15_t)0xc95d, (q15_t)0x73bd, (q15_t)0xc957, (q15_t)0x73bb, (q15_t)0xc952, (q15_t)0x73b8, (q15_t)0xc94c,
-  (q15_t)0x73b5, (q15_t)0xc946, (q15_t)0x73b3, (q15_t)0xc941, (q15_t)0x73b0, (q15_t)0xc93b, (q15_t)0x73ad, (q15_t)0xc935,
-  (q15_t)0x73ab, (q15_t)0xc930, (q15_t)0x73a8, (q15_t)0xc92a, (q15_t)0x73a5, (q15_t)0xc924, (q15_t)0x73a3, (q15_t)0xc91f,
-  (q15_t)0x73a0, (q15_t)0xc919, (q15_t)0x739d, (q15_t)0xc913, (q15_t)0x739b, (q15_t)0xc90e, (q15_t)0x7398, (q15_t)0xc908,
-  (q15_t)0x7395, (q15_t)0xc902, (q15_t)0x7392, (q15_t)0xc8fd, (q15_t)0x7390, (q15_t)0xc8f7, (q15_t)0x738d, (q15_t)0xc8f1,
-  (q15_t)0x738a, (q15_t)0xc8ec, (q15_t)0x7388, (q15_t)0xc8e6, (q15_t)0x7385, (q15_t)0xc8e0, (q15_t)0x7382, (q15_t)0xc8db,
-  (q15_t)0x737f, (q15_t)0xc8d5, (q15_t)0x737d, (q15_t)0xc8cf, (q15_t)0x737a, (q15_t)0xc8ca, (q15_t)0x7377, (q15_t)0xc8c4,
-  (q15_t)0x7375, (q15_t)0xc8be, (q15_t)0x7372, (q15_t)0xc8b9, (q15_t)0x736f, (q15_t)0xc8b3, (q15_t)0x736c, (q15_t)0xc8ad,
-  (q15_t)0x736a, (q15_t)0xc8a8, (q15_t)0x7367, (q15_t)0xc8a2, (q15_t)0x7364, (q15_t)0xc89c, (q15_t)0x7362, (q15_t)0xc897,
-  (q15_t)0x735f, (q15_t)0xc891, (q15_t)0x735c, (q15_t)0xc88b, (q15_t)0x7359, (q15_t)0xc886, (q15_t)0x7357, (q15_t)0xc880,
-  (q15_t)0x7354, (q15_t)0xc87a, (q15_t)0x7351, (q15_t)0xc875, (q15_t)0x734f, (q15_t)0xc86f, (q15_t)0x734c, (q15_t)0xc869,
-  (q15_t)0x7349, (q15_t)0xc864, (q15_t)0x7346, (q15_t)0xc85e, (q15_t)0x7344, (q15_t)0xc858, (q15_t)0x7341, (q15_t)0xc853,
-  (q15_t)0x733e, (q15_t)0xc84d, (q15_t)0x733b, (q15_t)0xc847, (q15_t)0x7339, (q15_t)0xc842, (q15_t)0x7336, (q15_t)0xc83c,
-  (q15_t)0x7333, (q15_t)0xc836, (q15_t)0x7330, (q15_t)0xc831, (q15_t)0x732e, (q15_t)0xc82b, (q15_t)0x732b, (q15_t)0xc825,
-  (q15_t)0x7328, (q15_t)0xc820, (q15_t)0x7326, (q15_t)0xc81a, (q15_t)0x7323, (q15_t)0xc814, (q15_t)0x7320, (q15_t)0xc80f,
-  (q15_t)0x731d, (q15_t)0xc809, (q15_t)0x731b, (q15_t)0xc803, (q15_t)0x7318, (q15_t)0xc7fe, (q15_t)0x7315, (q15_t)0xc7f8,
-  (q15_t)0x7312, (q15_t)0xc7f3, (q15_t)0x7310, (q15_t)0xc7ed, (q15_t)0x730d, (q15_t)0xc7e7, (q15_t)0x730a, (q15_t)0xc7e2,
-  (q15_t)0x7307, (q15_t)0xc7dc, (q15_t)0x7305, (q15_t)0xc7d6, (q15_t)0x7302, (q15_t)0xc7d1, (q15_t)0x72ff, (q15_t)0xc7cb,
-  (q15_t)0x72fc, (q15_t)0xc7c5, (q15_t)0x72f9, (q15_t)0xc7c0, (q15_t)0x72f7, (q15_t)0xc7ba, (q15_t)0x72f4, (q15_t)0xc7b4,
-  (q15_t)0x72f1, (q15_t)0xc7af, (q15_t)0x72ee, (q15_t)0xc7a9, (q15_t)0x72ec, (q15_t)0xc7a3, (q15_t)0x72e9, (q15_t)0xc79e,
-  (q15_t)0x72e6, (q15_t)0xc798, (q15_t)0x72e3, (q15_t)0xc793, (q15_t)0x72e1, (q15_t)0xc78d, (q15_t)0x72de, (q15_t)0xc787,
-  (q15_t)0x72db, (q15_t)0xc782, (q15_t)0x72d8, (q15_t)0xc77c, (q15_t)0x72d5, (q15_t)0xc776, (q15_t)0x72d3, (q15_t)0xc771,
-  (q15_t)0x72d0, (q15_t)0xc76b, (q15_t)0x72cd, (q15_t)0xc765, (q15_t)0x72ca, (q15_t)0xc760, (q15_t)0x72c8, (q15_t)0xc75a,
-  (q15_t)0x72c5, (q15_t)0xc755, (q15_t)0x72c2, (q15_t)0xc74f, (q15_t)0x72bf, (q15_t)0xc749, (q15_t)0x72bc, (q15_t)0xc744,
-  (q15_t)0x72ba, (q15_t)0xc73e, (q15_t)0x72b7, (q15_t)0xc738, (q15_t)0x72b4, (q15_t)0xc733, (q15_t)0x72b1, (q15_t)0xc72d,
-  (q15_t)0x72af, (q15_t)0xc728, (q15_t)0x72ac, (q15_t)0xc722, (q15_t)0x72a9, (q15_t)0xc71c, (q15_t)0x72a6, (q15_t)0xc717,
-  (q15_t)0x72a3, (q15_t)0xc711, (q15_t)0x72a1, (q15_t)0xc70b, (q15_t)0x729e, (q15_t)0xc706, (q15_t)0x729b, (q15_t)0xc700,
-  (q15_t)0x7298, (q15_t)0xc6fa, (q15_t)0x7295, (q15_t)0xc6f5, (q15_t)0x7293, (q15_t)0xc6ef, (q15_t)0x7290, (q15_t)0xc6ea,
-  (q15_t)0x728d, (q15_t)0xc6e4, (q15_t)0x728a, (q15_t)0xc6de, (q15_t)0x7287, (q15_t)0xc6d9, (q15_t)0x7285, (q15_t)0xc6d3,
-  (q15_t)0x7282, (q15_t)0xc6ce, (q15_t)0x727f, (q15_t)0xc6c8, (q15_t)0x727c, (q15_t)0xc6c2, (q15_t)0x7279, (q15_t)0xc6bd,
-  (q15_t)0x7276, (q15_t)0xc6b7, (q15_t)0x7274, (q15_t)0xc6b1, (q15_t)0x7271, (q15_t)0xc6ac, (q15_t)0x726e, (q15_t)0xc6a6,
-  (q15_t)0x726b, (q15_t)0xc6a1, (q15_t)0x7268, (q15_t)0xc69b, (q15_t)0x7266, (q15_t)0xc695, (q15_t)0x7263, (q15_t)0xc690,
-  (q15_t)0x7260, (q15_t)0xc68a, (q15_t)0x725d, (q15_t)0xc684, (q15_t)0x725a, (q15_t)0xc67f, (q15_t)0x7257, (q15_t)0xc679,
-  (q15_t)0x7255, (q15_t)0xc674, (q15_t)0x7252, (q15_t)0xc66e, (q15_t)0x724f, (q15_t)0xc668, (q15_t)0x724c, (q15_t)0xc663,
-  (q15_t)0x7249, (q15_t)0xc65d, (q15_t)0x7247, (q15_t)0xc658, (q15_t)0x7244, (q15_t)0xc652, (q15_t)0x7241, (q15_t)0xc64c,
-  (q15_t)0x723e, (q15_t)0xc647, (q15_t)0x723b, (q15_t)0xc641, (q15_t)0x7238, (q15_t)0xc63c, (q15_t)0x7236, (q15_t)0xc636,
-  (q15_t)0x7233, (q15_t)0xc630, (q15_t)0x7230, (q15_t)0xc62b, (q15_t)0x722d, (q15_t)0xc625, (q15_t)0x722a, (q15_t)0xc620,
-  (q15_t)0x7227, (q15_t)0xc61a, (q15_t)0x7224, (q15_t)0xc614, (q15_t)0x7222, (q15_t)0xc60f, (q15_t)0x721f, (q15_t)0xc609,
-  (q15_t)0x721c, (q15_t)0xc603, (q15_t)0x7219, (q15_t)0xc5fe, (q15_t)0x7216, (q15_t)0xc5f8, (q15_t)0x7213, (q15_t)0xc5f3,
-  (q15_t)0x7211, (q15_t)0xc5ed, (q15_t)0x720e, (q15_t)0xc5e7, (q15_t)0x720b, (q15_t)0xc5e2, (q15_t)0x7208, (q15_t)0xc5dc,
-  (q15_t)0x7205, (q15_t)0xc5d7, (q15_t)0x7202, (q15_t)0xc5d1, (q15_t)0x71ff, (q15_t)0xc5cc, (q15_t)0x71fd, (q15_t)0xc5c6,
-  (q15_t)0x71fa, (q15_t)0xc5c0, (q15_t)0x71f7, (q15_t)0xc5bb, (q15_t)0x71f4, (q15_t)0xc5b5, (q15_t)0x71f1, (q15_t)0xc5b0,
-  (q15_t)0x71ee, (q15_t)0xc5aa, (q15_t)0x71eb, (q15_t)0xc5a4, (q15_t)0x71e9, (q15_t)0xc59f, (q15_t)0x71e6, (q15_t)0xc599,
-  (q15_t)0x71e3, (q15_t)0xc594, (q15_t)0x71e0, (q15_t)0xc58e, (q15_t)0x71dd, (q15_t)0xc588, (q15_t)0x71da, (q15_t)0xc583,
-  (q15_t)0x71d7, (q15_t)0xc57d, (q15_t)0x71d4, (q15_t)0xc578, (q15_t)0x71d2, (q15_t)0xc572, (q15_t)0x71cf, (q15_t)0xc56c,
-  (q15_t)0x71cc, (q15_t)0xc567, (q15_t)0x71c9, (q15_t)0xc561, (q15_t)0x71c6, (q15_t)0xc55c, (q15_t)0x71c3, (q15_t)0xc556,
-  (q15_t)0x71c0, (q15_t)0xc551, (q15_t)0x71bd, (q15_t)0xc54b, (q15_t)0x71bb, (q15_t)0xc545, (q15_t)0x71b8, (q15_t)0xc540,
-  (q15_t)0x71b5, (q15_t)0xc53a, (q15_t)0x71b2, (q15_t)0xc535, (q15_t)0x71af, (q15_t)0xc52f, (q15_t)0x71ac, (q15_t)0xc529,
-  (q15_t)0x71a9, (q15_t)0xc524, (q15_t)0x71a6, (q15_t)0xc51e, (q15_t)0x71a3, (q15_t)0xc519, (q15_t)0x71a1, (q15_t)0xc513,
-  (q15_t)0x719e, (q15_t)0xc50e, (q15_t)0x719b, (q15_t)0xc508, (q15_t)0x7198, (q15_t)0xc502, (q15_t)0x7195, (q15_t)0xc4fd,
-  (q15_t)0x7192, (q15_t)0xc4f7, (q15_t)0x718f, (q15_t)0xc4f2, (q15_t)0x718c, (q15_t)0xc4ec, (q15_t)0x7189, (q15_t)0xc4e7,
-  (q15_t)0x7186, (q15_t)0xc4e1, (q15_t)0x7184, (q15_t)0xc4db, (q15_t)0x7181, (q15_t)0xc4d6, (q15_t)0x717e, (q15_t)0xc4d0,
-  (q15_t)0x717b, (q15_t)0xc4cb, (q15_t)0x7178, (q15_t)0xc4c5, (q15_t)0x7175, (q15_t)0xc4c0, (q15_t)0x7172, (q15_t)0xc4ba,
-  (q15_t)0x716f, (q15_t)0xc4b4, (q15_t)0x716c, (q15_t)0xc4af, (q15_t)0x7169, (q15_t)0xc4a9, (q15_t)0x7167, (q15_t)0xc4a4,
-  (q15_t)0x7164, (q15_t)0xc49e, (q15_t)0x7161, (q15_t)0xc499, (q15_t)0x715e, (q15_t)0xc493, (q15_t)0x715b, (q15_t)0xc48d,
-  (q15_t)0x7158, (q15_t)0xc488, (q15_t)0x7155, (q15_t)0xc482, (q15_t)0x7152, (q15_t)0xc47d, (q15_t)0x714f, (q15_t)0xc477,
-  (q15_t)0x714c, (q15_t)0xc472, (q15_t)0x7149, (q15_t)0xc46c, (q15_t)0x7146, (q15_t)0xc467, (q15_t)0x7143, (q15_t)0xc461,
-  (q15_t)0x7141, (q15_t)0xc45b, (q15_t)0x713e, (q15_t)0xc456, (q15_t)0x713b, (q15_t)0xc450, (q15_t)0x7138, (q15_t)0xc44b,
-  (q15_t)0x7135, (q15_t)0xc445, (q15_t)0x7132, (q15_t)0xc440, (q15_t)0x712f, (q15_t)0xc43a, (q15_t)0x712c, (q15_t)0xc434,
-  (q15_t)0x7129, (q15_t)0xc42f, (q15_t)0x7126, (q15_t)0xc429, (q15_t)0x7123, (q15_t)0xc424, (q15_t)0x7120, (q15_t)0xc41e,
-  (q15_t)0x711d, (q15_t)0xc419, (q15_t)0x711a, (q15_t)0xc413, (q15_t)0x7117, (q15_t)0xc40e, (q15_t)0x7114, (q15_t)0xc408,
-  (q15_t)0x7112, (q15_t)0xc403, (q15_t)0x710f, (q15_t)0xc3fd, (q15_t)0x710c, (q15_t)0xc3f7, (q15_t)0x7109, (q15_t)0xc3f2,
-  (q15_t)0x7106, (q15_t)0xc3ec, (q15_t)0x7103, (q15_t)0xc3e7, (q15_t)0x7100, (q15_t)0xc3e1, (q15_t)0x70fd, (q15_t)0xc3dc,
-  (q15_t)0x70fa, (q15_t)0xc3d6, (q15_t)0x70f7, (q15_t)0xc3d1, (q15_t)0x70f4, (q15_t)0xc3cb, (q15_t)0x70f1, (q15_t)0xc3c5,
-  (q15_t)0x70ee, (q15_t)0xc3c0, (q15_t)0x70eb, (q15_t)0xc3ba, (q15_t)0x70e8, (q15_t)0xc3b5, (q15_t)0x70e5, (q15_t)0xc3af,
-  (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x70df, (q15_t)0xc3a4, (q15_t)0x70dc, (q15_t)0xc39f, (q15_t)0x70d9, (q15_t)0xc399,
-  (q15_t)0x70d6, (q15_t)0xc394, (q15_t)0x70d3, (q15_t)0xc38e, (q15_t)0x70d1, (q15_t)0xc389, (q15_t)0x70ce, (q15_t)0xc383,
-  (q15_t)0x70cb, (q15_t)0xc37d, (q15_t)0x70c8, (q15_t)0xc378, (q15_t)0x70c5, (q15_t)0xc372, (q15_t)0x70c2, (q15_t)0xc36d,
-  (q15_t)0x70bf, (q15_t)0xc367, (q15_t)0x70bc, (q15_t)0xc362, (q15_t)0x70b9, (q15_t)0xc35c, (q15_t)0x70b6, (q15_t)0xc357,
-  (q15_t)0x70b3, (q15_t)0xc351, (q15_t)0x70b0, (q15_t)0xc34c, (q15_t)0x70ad, (q15_t)0xc346, (q15_t)0x70aa, (q15_t)0xc341,
-  (q15_t)0x70a7, (q15_t)0xc33b, (q15_t)0x70a4, (q15_t)0xc336, (q15_t)0x70a1, (q15_t)0xc330, (q15_t)0x709e, (q15_t)0xc32a,
-  (q15_t)0x709b, (q15_t)0xc325, (q15_t)0x7098, (q15_t)0xc31f, (q15_t)0x7095, (q15_t)0xc31a, (q15_t)0x7092, (q15_t)0xc314,
-  (q15_t)0x708f, (q15_t)0xc30f, (q15_t)0x708c, (q15_t)0xc309, (q15_t)0x7089, (q15_t)0xc304, (q15_t)0x7086, (q15_t)0xc2fe,
-  (q15_t)0x7083, (q15_t)0xc2f9, (q15_t)0x7080, (q15_t)0xc2f3, (q15_t)0x707d, (q15_t)0xc2ee, (q15_t)0x707a, (q15_t)0xc2e8,
-  (q15_t)0x7077, (q15_t)0xc2e3, (q15_t)0x7074, (q15_t)0xc2dd, (q15_t)0x7071, (q15_t)0xc2d8, (q15_t)0x706e, (q15_t)0xc2d2,
-  (q15_t)0x706b, (q15_t)0xc2cd, (q15_t)0x7068, (q15_t)0xc2c7, (q15_t)0x7065, (q15_t)0xc2c2, (q15_t)0x7062, (q15_t)0xc2bc,
-  (q15_t)0x705f, (q15_t)0xc2b7, (q15_t)0x705c, (q15_t)0xc2b1, (q15_t)0x7059, (q15_t)0xc2ab, (q15_t)0x7056, (q15_t)0xc2a6,
-  (q15_t)0x7053, (q15_t)0xc2a0, (q15_t)0x7050, (q15_t)0xc29b, (q15_t)0x704d, (q15_t)0xc295, (q15_t)0x704a, (q15_t)0xc290,
-  (q15_t)0x7047, (q15_t)0xc28a, (q15_t)0x7044, (q15_t)0xc285, (q15_t)0x7041, (q15_t)0xc27f, (q15_t)0x703e, (q15_t)0xc27a,
-  (q15_t)0x703b, (q15_t)0xc274, (q15_t)0x7038, (q15_t)0xc26f, (q15_t)0x7035, (q15_t)0xc269, (q15_t)0x7032, (q15_t)0xc264,
-  (q15_t)0x702f, (q15_t)0xc25e, (q15_t)0x702c, (q15_t)0xc259, (q15_t)0x7029, (q15_t)0xc253, (q15_t)0x7026, (q15_t)0xc24e,
-  (q15_t)0x7023, (q15_t)0xc248, (q15_t)0x7020, (q15_t)0xc243, (q15_t)0x701d, (q15_t)0xc23d, (q15_t)0x7019, (q15_t)0xc238,
-  (q15_t)0x7016, (q15_t)0xc232, (q15_t)0x7013, (q15_t)0xc22d, (q15_t)0x7010, (q15_t)0xc227, (q15_t)0x700d, (q15_t)0xc222,
-  (q15_t)0x700a, (q15_t)0xc21c, (q15_t)0x7007, (q15_t)0xc217, (q15_t)0x7004, (q15_t)0xc211, (q15_t)0x7001, (q15_t)0xc20c,
-  (q15_t)0x6ffe, (q15_t)0xc206, (q15_t)0x6ffb, (q15_t)0xc201, (q15_t)0x6ff8, (q15_t)0xc1fb, (q15_t)0x6ff5, (q15_t)0xc1f6,
-  (q15_t)0x6ff2, (q15_t)0xc1f0, (q15_t)0x6fef, (q15_t)0xc1eb, (q15_t)0x6fec, (q15_t)0xc1e5, (q15_t)0x6fe9, (q15_t)0xc1e0,
-  (q15_t)0x6fe6, (q15_t)0xc1da, (q15_t)0x6fe3, (q15_t)0xc1d5, (q15_t)0x6fe0, (q15_t)0xc1cf, (q15_t)0x6fdd, (q15_t)0xc1ca,
-  (q15_t)0x6fda, (q15_t)0xc1c4, (q15_t)0x6fd6, (q15_t)0xc1bf, (q15_t)0x6fd3, (q15_t)0xc1b9, (q15_t)0x6fd0, (q15_t)0xc1b4,
-  (q15_t)0x6fcd, (q15_t)0xc1ae, (q15_t)0x6fca, (q15_t)0xc1a9, (q15_t)0x6fc7, (q15_t)0xc1a3, (q15_t)0x6fc4, (q15_t)0xc19e,
-  (q15_t)0x6fc1, (q15_t)0xc198, (q15_t)0x6fbe, (q15_t)0xc193, (q15_t)0x6fbb, (q15_t)0xc18d, (q15_t)0x6fb8, (q15_t)0xc188,
-  (q15_t)0x6fb5, (q15_t)0xc183, (q15_t)0x6fb2, (q15_t)0xc17d, (q15_t)0x6faf, (q15_t)0xc178, (q15_t)0x6fac, (q15_t)0xc172,
-  (q15_t)0x6fa9, (q15_t)0xc16d, (q15_t)0x6fa5, (q15_t)0xc167, (q15_t)0x6fa2, (q15_t)0xc162, (q15_t)0x6f9f, (q15_t)0xc15c,
-  (q15_t)0x6f9c, (q15_t)0xc157, (q15_t)0x6f99, (q15_t)0xc151, (q15_t)0x6f96, (q15_t)0xc14c, (q15_t)0x6f93, (q15_t)0xc146,
-  (q15_t)0x6f90, (q15_t)0xc141, (q15_t)0x6f8d, (q15_t)0xc13b, (q15_t)0x6f8a, (q15_t)0xc136, (q15_t)0x6f87, (q15_t)0xc130,
-  (q15_t)0x6f84, (q15_t)0xc12b, (q15_t)0x6f81, (q15_t)0xc125, (q15_t)0x6f7d, (q15_t)0xc120, (q15_t)0x6f7a, (q15_t)0xc11a,
-  (q15_t)0x6f77, (q15_t)0xc115, (q15_t)0x6f74, (q15_t)0xc10f, (q15_t)0x6f71, (q15_t)0xc10a, (q15_t)0x6f6e, (q15_t)0xc105,
-  (q15_t)0x6f6b, (q15_t)0xc0ff, (q15_t)0x6f68, (q15_t)0xc0fa, (q15_t)0x6f65, (q15_t)0xc0f4, (q15_t)0x6f62, (q15_t)0xc0ef,
-  (q15_t)0x6f5f, (q15_t)0xc0e9, (q15_t)0x6f5b, (q15_t)0xc0e4, (q15_t)0x6f58, (q15_t)0xc0de, (q15_t)0x6f55, (q15_t)0xc0d9,
-  (q15_t)0x6f52, (q15_t)0xc0d3, (q15_t)0x6f4f, (q15_t)0xc0ce, (q15_t)0x6f4c, (q15_t)0xc0c8, (q15_t)0x6f49, (q15_t)0xc0c3,
-  (q15_t)0x6f46, (q15_t)0xc0bd, (q15_t)0x6f43, (q15_t)0xc0b8, (q15_t)0x6f3f, (q15_t)0xc0b3, (q15_t)0x6f3c, (q15_t)0xc0ad,
-  (q15_t)0x6f39, (q15_t)0xc0a8, (q15_t)0x6f36, (q15_t)0xc0a2, (q15_t)0x6f33, (q15_t)0xc09d, (q15_t)0x6f30, (q15_t)0xc097,
-  (q15_t)0x6f2d, (q15_t)0xc092, (q15_t)0x6f2a, (q15_t)0xc08c, (q15_t)0x6f27, (q15_t)0xc087, (q15_t)0x6f23, (q15_t)0xc081,
-  (q15_t)0x6f20, (q15_t)0xc07c, (q15_t)0x6f1d, (q15_t)0xc077, (q15_t)0x6f1a, (q15_t)0xc071, (q15_t)0x6f17, (q15_t)0xc06c,
-  (q15_t)0x6f14, (q15_t)0xc066, (q15_t)0x6f11, (q15_t)0xc061, (q15_t)0x6f0e, (q15_t)0xc05b, (q15_t)0x6f0b, (q15_t)0xc056,
-  (q15_t)0x6f07, (q15_t)0xc050, (q15_t)0x6f04, (q15_t)0xc04b, (q15_t)0x6f01, (q15_t)0xc045, (q15_t)0x6efe, (q15_t)0xc040,
-  (q15_t)0x6efb, (q15_t)0xc03b, (q15_t)0x6ef8, (q15_t)0xc035, (q15_t)0x6ef5, (q15_t)0xc030, (q15_t)0x6ef1, (q15_t)0xc02a,
-  (q15_t)0x6eee, (q15_t)0xc025, (q15_t)0x6eeb, (q15_t)0xc01f, (q15_t)0x6ee8, (q15_t)0xc01a, (q15_t)0x6ee5, (q15_t)0xc014,
-  (q15_t)0x6ee2, (q15_t)0xc00f, (q15_t)0x6edf, (q15_t)0xc00a, (q15_t)0x6edc, (q15_t)0xc004, (q15_t)0x6ed8, (q15_t)0xbfff,
-  (q15_t)0x6ed5, (q15_t)0xbff9, (q15_t)0x6ed2, (q15_t)0xbff4, (q15_t)0x6ecf, (q15_t)0xbfee, (q15_t)0x6ecc, (q15_t)0xbfe9,
-  (q15_t)0x6ec9, (q15_t)0xbfe3, (q15_t)0x6ec6, (q15_t)0xbfde, (q15_t)0x6ec2, (q15_t)0xbfd9, (q15_t)0x6ebf, (q15_t)0xbfd3,
-  (q15_t)0x6ebc, (q15_t)0xbfce, (q15_t)0x6eb9, (q15_t)0xbfc8, (q15_t)0x6eb6, (q15_t)0xbfc3, (q15_t)0x6eb3, (q15_t)0xbfbd,
-  (q15_t)0x6eaf, (q15_t)0xbfb8, (q15_t)0x6eac, (q15_t)0xbfb3, (q15_t)0x6ea9, (q15_t)0xbfad, (q15_t)0x6ea6, (q15_t)0xbfa8,
-  (q15_t)0x6ea3, (q15_t)0xbfa2, (q15_t)0x6ea0, (q15_t)0xbf9d, (q15_t)0x6e9c, (q15_t)0xbf97, (q15_t)0x6e99, (q15_t)0xbf92,
-  (q15_t)0x6e96, (q15_t)0xbf8d, (q15_t)0x6e93, (q15_t)0xbf87, (q15_t)0x6e90, (q15_t)0xbf82, (q15_t)0x6e8d, (q15_t)0xbf7c,
-  (q15_t)0x6e89, (q15_t)0xbf77, (q15_t)0x6e86, (q15_t)0xbf71, (q15_t)0x6e83, (q15_t)0xbf6c, (q15_t)0x6e80, (q15_t)0xbf67,
-  (q15_t)0x6e7d, (q15_t)0xbf61, (q15_t)0x6e7a, (q15_t)0xbf5c, (q15_t)0x6e76, (q15_t)0xbf56, (q15_t)0x6e73, (q15_t)0xbf51,
-  (q15_t)0x6e70, (q15_t)0xbf4b, (q15_t)0x6e6d, (q15_t)0xbf46, (q15_t)0x6e6a, (q15_t)0xbf41, (q15_t)0x6e67, (q15_t)0xbf3b,
-  (q15_t)0x6e63, (q15_t)0xbf36, (q15_t)0x6e60, (q15_t)0xbf30, (q15_t)0x6e5d, (q15_t)0xbf2b, (q15_t)0x6e5a, (q15_t)0xbf26,
-  (q15_t)0x6e57, (q15_t)0xbf20, (q15_t)0x6e53, (q15_t)0xbf1b, (q15_t)0x6e50, (q15_t)0xbf15, (q15_t)0x6e4d, (q15_t)0xbf10,
-  (q15_t)0x6e4a, (q15_t)0xbf0a, (q15_t)0x6e47, (q15_t)0xbf05, (q15_t)0x6e44, (q15_t)0xbf00, (q15_t)0x6e40, (q15_t)0xbefa,
-  (q15_t)0x6e3d, (q15_t)0xbef5, (q15_t)0x6e3a, (q15_t)0xbeef, (q15_t)0x6e37, (q15_t)0xbeea, (q15_t)0x6e34, (q15_t)0xbee5,
-  (q15_t)0x6e30, (q15_t)0xbedf, (q15_t)0x6e2d, (q15_t)0xbeda, (q15_t)0x6e2a, (q15_t)0xbed4, (q15_t)0x6e27, (q15_t)0xbecf,
-  (q15_t)0x6e24, (q15_t)0xbeca, (q15_t)0x6e20, (q15_t)0xbec4, (q15_t)0x6e1d, (q15_t)0xbebf, (q15_t)0x6e1a, (q15_t)0xbeb9,
-  (q15_t)0x6e17, (q15_t)0xbeb4, (q15_t)0x6e14, (q15_t)0xbeae, (q15_t)0x6e10, (q15_t)0xbea9, (q15_t)0x6e0d, (q15_t)0xbea4,
-  (q15_t)0x6e0a, (q15_t)0xbe9e, (q15_t)0x6e07, (q15_t)0xbe99, (q15_t)0x6e04, (q15_t)0xbe93, (q15_t)0x6e00, (q15_t)0xbe8e,
-  (q15_t)0x6dfd, (q15_t)0xbe89, (q15_t)0x6dfa, (q15_t)0xbe83, (q15_t)0x6df7, (q15_t)0xbe7e, (q15_t)0x6df3, (q15_t)0xbe78,
-  (q15_t)0x6df0, (q15_t)0xbe73, (q15_t)0x6ded, (q15_t)0xbe6e, (q15_t)0x6dea, (q15_t)0xbe68, (q15_t)0x6de7, (q15_t)0xbe63,
-  (q15_t)0x6de3, (q15_t)0xbe5e, (q15_t)0x6de0, (q15_t)0xbe58, (q15_t)0x6ddd, (q15_t)0xbe53, (q15_t)0x6dda, (q15_t)0xbe4d,
-  (q15_t)0x6dd6, (q15_t)0xbe48, (q15_t)0x6dd3, (q15_t)0xbe43, (q15_t)0x6dd0, (q15_t)0xbe3d, (q15_t)0x6dcd, (q15_t)0xbe38,
-  (q15_t)0x6dca, (q15_t)0xbe32, (q15_t)0x6dc6, (q15_t)0xbe2d, (q15_t)0x6dc3, (q15_t)0xbe28, (q15_t)0x6dc0, (q15_t)0xbe22,
-  (q15_t)0x6dbd, (q15_t)0xbe1d, (q15_t)0x6db9, (q15_t)0xbe17, (q15_t)0x6db6, (q15_t)0xbe12, (q15_t)0x6db3, (q15_t)0xbe0d,
-  (q15_t)0x6db0, (q15_t)0xbe07, (q15_t)0x6dac, (q15_t)0xbe02, (q15_t)0x6da9, (q15_t)0xbdfd, (q15_t)0x6da6, (q15_t)0xbdf7,
-  (q15_t)0x6da3, (q15_t)0xbdf2, (q15_t)0x6d9f, (q15_t)0xbdec, (q15_t)0x6d9c, (q15_t)0xbde7, (q15_t)0x6d99, (q15_t)0xbde2,
-  (q15_t)0x6d96, (q15_t)0xbddc, (q15_t)0x6d92, (q15_t)0xbdd7, (q15_t)0x6d8f, (q15_t)0xbdd1, (q15_t)0x6d8c, (q15_t)0xbdcc,
-  (q15_t)0x6d89, (q15_t)0xbdc7, (q15_t)0x6d85, (q15_t)0xbdc1, (q15_t)0x6d82, (q15_t)0xbdbc, (q15_t)0x6d7f, (q15_t)0xbdb7,
-  (q15_t)0x6d7c, (q15_t)0xbdb1, (q15_t)0x6d78, (q15_t)0xbdac, (q15_t)0x6d75, (q15_t)0xbda6, (q15_t)0x6d72, (q15_t)0xbda1,
-  (q15_t)0x6d6f, (q15_t)0xbd9c, (q15_t)0x6d6b, (q15_t)0xbd96, (q15_t)0x6d68, (q15_t)0xbd91, (q15_t)0x6d65, (q15_t)0xbd8c,
-  (q15_t)0x6d62, (q15_t)0xbd86, (q15_t)0x6d5e, (q15_t)0xbd81, (q15_t)0x6d5b, (q15_t)0xbd7c, (q15_t)0x6d58, (q15_t)0xbd76,
-  (q15_t)0x6d55, (q15_t)0xbd71, (q15_t)0x6d51, (q15_t)0xbd6b, (q15_t)0x6d4e, (q15_t)0xbd66, (q15_t)0x6d4b, (q15_t)0xbd61,
-  (q15_t)0x6d48, (q15_t)0xbd5b, (q15_t)0x6d44, (q15_t)0xbd56, (q15_t)0x6d41, (q15_t)0xbd51, (q15_t)0x6d3e, (q15_t)0xbd4b,
-  (q15_t)0x6d3a, (q15_t)0xbd46, (q15_t)0x6d37, (q15_t)0xbd40, (q15_t)0x6d34, (q15_t)0xbd3b, (q15_t)0x6d31, (q15_t)0xbd36,
-  (q15_t)0x6d2d, (q15_t)0xbd30, (q15_t)0x6d2a, (q15_t)0xbd2b, (q15_t)0x6d27, (q15_t)0xbd26, (q15_t)0x6d23, (q15_t)0xbd20,
-  (q15_t)0x6d20, (q15_t)0xbd1b, (q15_t)0x6d1d, (q15_t)0xbd16, (q15_t)0x6d1a, (q15_t)0xbd10, (q15_t)0x6d16, (q15_t)0xbd0b,
-  (q15_t)0x6d13, (q15_t)0xbd06, (q15_t)0x6d10, (q15_t)0xbd00, (q15_t)0x6d0c, (q15_t)0xbcfb, (q15_t)0x6d09, (q15_t)0xbcf5,
-  (q15_t)0x6d06, (q15_t)0xbcf0, (q15_t)0x6d03, (q15_t)0xbceb, (q15_t)0x6cff, (q15_t)0xbce5, (q15_t)0x6cfc, (q15_t)0xbce0,
-  (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6cf5, (q15_t)0xbcd5, (q15_t)0x6cf2, (q15_t)0xbcd0, (q15_t)0x6cef, (q15_t)0xbccb,
-  (q15_t)0x6cec, (q15_t)0xbcc5, (q15_t)0x6ce8, (q15_t)0xbcc0, (q15_t)0x6ce5, (q15_t)0xbcbb, (q15_t)0x6ce2, (q15_t)0xbcb5,
-  (q15_t)0x6cde, (q15_t)0xbcb0, (q15_t)0x6cdb, (q15_t)0xbcab, (q15_t)0x6cd8, (q15_t)0xbca5, (q15_t)0x6cd4, (q15_t)0xbca0,
-  (q15_t)0x6cd1, (q15_t)0xbc9b, (q15_t)0x6cce, (q15_t)0xbc95, (q15_t)0x6cca, (q15_t)0xbc90, (q15_t)0x6cc7, (q15_t)0xbc8b,
-  (q15_t)0x6cc4, (q15_t)0xbc85, (q15_t)0x6cc1, (q15_t)0xbc80, (q15_t)0x6cbd, (q15_t)0xbc7b, (q15_t)0x6cba, (q15_t)0xbc75,
-  (q15_t)0x6cb7, (q15_t)0xbc70, (q15_t)0x6cb3, (q15_t)0xbc6b, (q15_t)0x6cb0, (q15_t)0xbc65, (q15_t)0x6cad, (q15_t)0xbc60,
-  (q15_t)0x6ca9, (q15_t)0xbc5b, (q15_t)0x6ca6, (q15_t)0xbc55, (q15_t)0x6ca3, (q15_t)0xbc50, (q15_t)0x6c9f, (q15_t)0xbc4b,
-  (q15_t)0x6c9c, (q15_t)0xbc45, (q15_t)0x6c99, (q15_t)0xbc40, (q15_t)0x6c95, (q15_t)0xbc3b, (q15_t)0x6c92, (q15_t)0xbc35,
-  (q15_t)0x6c8f, (q15_t)0xbc30, (q15_t)0x6c8b, (q15_t)0xbc2b, (q15_t)0x6c88, (q15_t)0xbc25, (q15_t)0x6c85, (q15_t)0xbc20,
-  (q15_t)0x6c81, (q15_t)0xbc1b, (q15_t)0x6c7e, (q15_t)0xbc15, (q15_t)0x6c7b, (q15_t)0xbc10, (q15_t)0x6c77, (q15_t)0xbc0b,
-  (q15_t)0x6c74, (q15_t)0xbc05, (q15_t)0x6c71, (q15_t)0xbc00, (q15_t)0x6c6d, (q15_t)0xbbfb, (q15_t)0x6c6a, (q15_t)0xbbf5,
-  (q15_t)0x6c67, (q15_t)0xbbf0, (q15_t)0x6c63, (q15_t)0xbbeb, (q15_t)0x6c60, (q15_t)0xbbe5, (q15_t)0x6c5d, (q15_t)0xbbe0,
-  (q15_t)0x6c59, (q15_t)0xbbdb, (q15_t)0x6c56, (q15_t)0xbbd5, (q15_t)0x6c53, (q15_t)0xbbd0, (q15_t)0x6c4f, (q15_t)0xbbcb,
-  (q15_t)0x6c4c, (q15_t)0xbbc5, (q15_t)0x6c49, (q15_t)0xbbc0, (q15_t)0x6c45, (q15_t)0xbbbb, (q15_t)0x6c42, (q15_t)0xbbb5,
-  (q15_t)0x6c3f, (q15_t)0xbbb0, (q15_t)0x6c3b, (q15_t)0xbbab, (q15_t)0x6c38, (q15_t)0xbba6, (q15_t)0x6c34, (q15_t)0xbba0,
-  (q15_t)0x6c31, (q15_t)0xbb9b, (q15_t)0x6c2e, (q15_t)0xbb96, (q15_t)0x6c2a, (q15_t)0xbb90, (q15_t)0x6c27, (q15_t)0xbb8b,
-  (q15_t)0x6c24, (q15_t)0xbb86, (q15_t)0x6c20, (q15_t)0xbb80, (q15_t)0x6c1d, (q15_t)0xbb7b, (q15_t)0x6c1a, (q15_t)0xbb76,
-  (q15_t)0x6c16, (q15_t)0xbb70, (q15_t)0x6c13, (q15_t)0xbb6b, (q15_t)0x6c0f, (q15_t)0xbb66, (q15_t)0x6c0c, (q15_t)0xbb61,
-  (q15_t)0x6c09, (q15_t)0xbb5b, (q15_t)0x6c05, (q15_t)0xbb56, (q15_t)0x6c02, (q15_t)0xbb51, (q15_t)0x6bff, (q15_t)0xbb4b,
-  (q15_t)0x6bfb, (q15_t)0xbb46, (q15_t)0x6bf8, (q15_t)0xbb41, (q15_t)0x6bf5, (q15_t)0xbb3b, (q15_t)0x6bf1, (q15_t)0xbb36,
-  (q15_t)0x6bee, (q15_t)0xbb31, (q15_t)0x6bea, (q15_t)0xbb2c, (q15_t)0x6be7, (q15_t)0xbb26, (q15_t)0x6be4, (q15_t)0xbb21,
-  (q15_t)0x6be0, (q15_t)0xbb1c, (q15_t)0x6bdd, (q15_t)0xbb16, (q15_t)0x6bd9, (q15_t)0xbb11, (q15_t)0x6bd6, (q15_t)0xbb0c,
-  (q15_t)0x6bd3, (q15_t)0xbb06, (q15_t)0x6bcf, (q15_t)0xbb01, (q15_t)0x6bcc, (q15_t)0xbafc, (q15_t)0x6bc9, (q15_t)0xbaf7,
-  (q15_t)0x6bc5, (q15_t)0xbaf1, (q15_t)0x6bc2, (q15_t)0xbaec, (q15_t)0x6bbe, (q15_t)0xbae7, (q15_t)0x6bbb, (q15_t)0xbae1,
-  (q15_t)0x6bb8, (q15_t)0xbadc, (q15_t)0x6bb4, (q15_t)0xbad7, (q15_t)0x6bb1, (q15_t)0xbad2, (q15_t)0x6bad, (q15_t)0xbacc,
-  (q15_t)0x6baa, (q15_t)0xbac7, (q15_t)0x6ba7, (q15_t)0xbac2, (q15_t)0x6ba3, (q15_t)0xbabc, (q15_t)0x6ba0, (q15_t)0xbab7,
-  (q15_t)0x6b9c, (q15_t)0xbab2, (q15_t)0x6b99, (q15_t)0xbaad, (q15_t)0x6b96, (q15_t)0xbaa7, (q15_t)0x6b92, (q15_t)0xbaa2,
-  (q15_t)0x6b8f, (q15_t)0xba9d, (q15_t)0x6b8b, (q15_t)0xba97, (q15_t)0x6b88, (q15_t)0xba92, (q15_t)0x6b85, (q15_t)0xba8d,
-  (q15_t)0x6b81, (q15_t)0xba88, (q15_t)0x6b7e, (q15_t)0xba82, (q15_t)0x6b7a, (q15_t)0xba7d, (q15_t)0x6b77, (q15_t)0xba78,
-  (q15_t)0x6b73, (q15_t)0xba73, (q15_t)0x6b70, (q15_t)0xba6d, (q15_t)0x6b6d, (q15_t)0xba68, (q15_t)0x6b69, (q15_t)0xba63,
-  (q15_t)0x6b66, (q15_t)0xba5d, (q15_t)0x6b62, (q15_t)0xba58, (q15_t)0x6b5f, (q15_t)0xba53, (q15_t)0x6b5c, (q15_t)0xba4e,
-  (q15_t)0x6b58, (q15_t)0xba48, (q15_t)0x6b55, (q15_t)0xba43, (q15_t)0x6b51, (q15_t)0xba3e, (q15_t)0x6b4e, (q15_t)0xba39,
-  (q15_t)0x6b4a, (q15_t)0xba33, (q15_t)0x6b47, (q15_t)0xba2e, (q15_t)0x6b44, (q15_t)0xba29, (q15_t)0x6b40, (q15_t)0xba23,
-  (q15_t)0x6b3d, (q15_t)0xba1e, (q15_t)0x6b39, (q15_t)0xba19, (q15_t)0x6b36, (q15_t)0xba14, (q15_t)0x6b32, (q15_t)0xba0e,
-  (q15_t)0x6b2f, (q15_t)0xba09, (q15_t)0x6b2c, (q15_t)0xba04, (q15_t)0x6b28, (q15_t)0xb9ff, (q15_t)0x6b25, (q15_t)0xb9f9,
-  (q15_t)0x6b21, (q15_t)0xb9f4, (q15_t)0x6b1e, (q15_t)0xb9ef, (q15_t)0x6b1a, (q15_t)0xb9ea, (q15_t)0x6b17, (q15_t)0xb9e4,
-  (q15_t)0x6b13, (q15_t)0xb9df, (q15_t)0x6b10, (q15_t)0xb9da, (q15_t)0x6b0d, (q15_t)0xb9d5, (q15_t)0x6b09, (q15_t)0xb9cf,
-  (q15_t)0x6b06, (q15_t)0xb9ca, (q15_t)0x6b02, (q15_t)0xb9c5, (q15_t)0x6aff, (q15_t)0xb9c0, (q15_t)0x6afb, (q15_t)0xb9ba,
-  (q15_t)0x6af8, (q15_t)0xb9b5, (q15_t)0x6af4, (q15_t)0xb9b0, (q15_t)0x6af1, (q15_t)0xb9ab, (q15_t)0x6aee, (q15_t)0xb9a5,
-  (q15_t)0x6aea, (q15_t)0xb9a0, (q15_t)0x6ae7, (q15_t)0xb99b, (q15_t)0x6ae3, (q15_t)0xb996, (q15_t)0x6ae0, (q15_t)0xb990,
-  (q15_t)0x6adc, (q15_t)0xb98b, (q15_t)0x6ad9, (q15_t)0xb986, (q15_t)0x6ad5, (q15_t)0xb981, (q15_t)0x6ad2, (q15_t)0xb97b,
-  (q15_t)0x6ace, (q15_t)0xb976, (q15_t)0x6acb, (q15_t)0xb971, (q15_t)0x6ac8, (q15_t)0xb96c, (q15_t)0x6ac4, (q15_t)0xb966,
-  (q15_t)0x6ac1, (q15_t)0xb961, (q15_t)0x6abd, (q15_t)0xb95c, (q15_t)0x6aba, (q15_t)0xb957, (q15_t)0x6ab6, (q15_t)0xb951,
-  (q15_t)0x6ab3, (q15_t)0xb94c, (q15_t)0x6aaf, (q15_t)0xb947, (q15_t)0x6aac, (q15_t)0xb942, (q15_t)0x6aa8, (q15_t)0xb93c,
-  (q15_t)0x6aa5, (q15_t)0xb937, (q15_t)0x6aa1, (q15_t)0xb932, (q15_t)0x6a9e, (q15_t)0xb92d, (q15_t)0x6a9a, (q15_t)0xb928,
-  (q15_t)0x6a97, (q15_t)0xb922, (q15_t)0x6a93, (q15_t)0xb91d, (q15_t)0x6a90, (q15_t)0xb918, (q15_t)0x6a8c, (q15_t)0xb913,
-  (q15_t)0x6a89, (q15_t)0xb90d, (q15_t)0x6a86, (q15_t)0xb908, (q15_t)0x6a82, (q15_t)0xb903, (q15_t)0x6a7f, (q15_t)0xb8fe,
-  (q15_t)0x6a7b, (q15_t)0xb8f8, (q15_t)0x6a78, (q15_t)0xb8f3, (q15_t)0x6a74, (q15_t)0xb8ee, (q15_t)0x6a71, (q15_t)0xb8e9,
-  (q15_t)0x6a6d, (q15_t)0xb8e4, (q15_t)0x6a6a, (q15_t)0xb8de, (q15_t)0x6a66, (q15_t)0xb8d9, (q15_t)0x6a63, (q15_t)0xb8d4,
-  (q15_t)0x6a5f, (q15_t)0xb8cf, (q15_t)0x6a5c, (q15_t)0xb8c9, (q15_t)0x6a58, (q15_t)0xb8c4, (q15_t)0x6a55, (q15_t)0xb8bf,
-  (q15_t)0x6a51, (q15_t)0xb8ba, (q15_t)0x6a4e, (q15_t)0xb8b5, (q15_t)0x6a4a, (q15_t)0xb8af, (q15_t)0x6a47, (q15_t)0xb8aa,
-  (q15_t)0x6a43, (q15_t)0xb8a5, (q15_t)0x6a40, (q15_t)0xb8a0, (q15_t)0x6a3c, (q15_t)0xb89b, (q15_t)0x6a39, (q15_t)0xb895,
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-  (q15_t)0x69a8, (q15_t)0xb7c0, (q15_t)0x69a5, (q15_t)0xb7bb, (q15_t)0x69a1, (q15_t)0xb7b6, (q15_t)0x699d, (q15_t)0xb7b1,
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-  (q15_t)0x698c, (q15_t)0xb797, (q15_t)0x6988, (q15_t)0xb791, (q15_t)0x6985, (q15_t)0xb78c, (q15_t)0x6981, (q15_t)0xb787,
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-  (q15_t)0x6953, (q15_t)0xb744, (q15_t)0x694f, (q15_t)0xb73f, (q15_t)0x694b, (q15_t)0xb739, (q15_t)0x6948, (q15_t)0xb734,
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-  (q15_t)0x6936, (q15_t)0xb71a, (q15_t)0x6932, (q15_t)0xb715, (q15_t)0x692f, (q15_t)0xb710, (q15_t)0x692b, (q15_t)0xb70b,
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-  (q15_t)0x690b, (q15_t)0xb6dd, (q15_t)0x6907, (q15_t)0xb6d7, (q15_t)0x6904, (q15_t)0xb6d2, (q15_t)0x6900, (q15_t)0xb6cd,
-  (q15_t)0x68fd, (q15_t)0xb6c8, (q15_t)0x68f9, (q15_t)0xb6c3, (q15_t)0x68f5, (q15_t)0xb6be, (q15_t)0x68f2, (q15_t)0xb6b8,
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-  (q15_t)0x68e0, (q15_t)0xb69f, (q15_t)0x68dc, (q15_t)0xb69a, (q15_t)0x68d9, (q15_t)0xb694, (q15_t)0x68d5, (q15_t)0xb68f,
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-  (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x68a3, (q15_t)0xb647, (q15_t)0x689f, (q15_t)0xb642, (q15_t)0x689b, (q15_t)0xb63d,
-  (q15_t)0x6898, (q15_t)0xb638, (q15_t)0x6894, (q15_t)0xb633, (q15_t)0x6890, (q15_t)0xb62e, (q15_t)0x688d, (q15_t)0xb628,
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-  (q15_t)0x6563, (q15_t)0xb1df, (q15_t)0x655f, (q15_t)0xb1da, (q15_t)0x655c, (q15_t)0xb1d6, (q15_t)0x6558, (q15_t)0xb1d1,
-  (q15_t)0x6554, (q15_t)0xb1cc, (q15_t)0x6550, (q15_t)0xb1c7, (q15_t)0x654c, (q15_t)0xb1c2, (q15_t)0x6548, (q15_t)0xb1bd,
-  (q15_t)0x6545, (q15_t)0xb1b8, (q15_t)0x6541, (q15_t)0xb1b3, (q15_t)0x653d, (q15_t)0xb1ae, (q15_t)0x6539, (q15_t)0xb1a9,
-  (q15_t)0x6535, (q15_t)0xb1a4, (q15_t)0x6531, (q15_t)0xb19f, (q15_t)0x652d, (q15_t)0xb19a, (q15_t)0x652a, (q15_t)0xb195,
-  (q15_t)0x6526, (q15_t)0xb190, (q15_t)0x6522, (q15_t)0xb18b, (q15_t)0x651e, (q15_t)0xb186, (q15_t)0x651a, (q15_t)0xb181,
-  (q15_t)0x6516, (q15_t)0xb17c, (q15_t)0x6513, (q15_t)0xb177, (q15_t)0x650f, (q15_t)0xb172, (q15_t)0x650b, (q15_t)0xb16d,
-  (q15_t)0x6507, (q15_t)0xb168, (q15_t)0x6503, (q15_t)0xb163, (q15_t)0x64ff, (q15_t)0xb15e, (q15_t)0x64fb, (q15_t)0xb159,
-  (q15_t)0x64f7, (q15_t)0xb154, (q15_t)0x64f4, (q15_t)0xb14f, (q15_t)0x64f0, (q15_t)0xb14a, (q15_t)0x64ec, (q15_t)0xb146,
-  (q15_t)0x64e8, (q15_t)0xb141, (q15_t)0x64e4, (q15_t)0xb13c, (q15_t)0x64e0, (q15_t)0xb137, (q15_t)0x64dc, (q15_t)0xb132,
-  (q15_t)0x64d9, (q15_t)0xb12d, (q15_t)0x64d5, (q15_t)0xb128, (q15_t)0x64d1, (q15_t)0xb123, (q15_t)0x64cd, (q15_t)0xb11e,
-  (q15_t)0x64c9, (q15_t)0xb119, (q15_t)0x64c5, (q15_t)0xb114, (q15_t)0x64c1, (q15_t)0xb10f, (q15_t)0x64bd, (q15_t)0xb10a,
-  (q15_t)0x64ba, (q15_t)0xb105, (q15_t)0x64b6, (q15_t)0xb100, (q15_t)0x64b2, (q15_t)0xb0fb, (q15_t)0x64ae, (q15_t)0xb0f6,
-  (q15_t)0x64aa, (q15_t)0xb0f1, (q15_t)0x64a6, (q15_t)0xb0ec, (q15_t)0x64a2, (q15_t)0xb0e8, (q15_t)0x649e, (q15_t)0xb0e3,
-  (q15_t)0x649b, (q15_t)0xb0de, (q15_t)0x6497, (q15_t)0xb0d9, (q15_t)0x6493, (q15_t)0xb0d4, (q15_t)0x648f, (q15_t)0xb0cf,
-  (q15_t)0x648b, (q15_t)0xb0ca, (q15_t)0x6487, (q15_t)0xb0c5, (q15_t)0x6483, (q15_t)0xb0c0, (q15_t)0x647f, (q15_t)0xb0bb,
-  (q15_t)0x647b, (q15_t)0xb0b6, (q15_t)0x6478, (q15_t)0xb0b1, (q15_t)0x6474, (q15_t)0xb0ac, (q15_t)0x6470, (q15_t)0xb0a7,
-  (q15_t)0x646c, (q15_t)0xb0a2, (q15_t)0x6468, (q15_t)0xb09e, (q15_t)0x6464, (q15_t)0xb099, (q15_t)0x6460, (q15_t)0xb094,
-  (q15_t)0x645c, (q15_t)0xb08f, (q15_t)0x6458, (q15_t)0xb08a, (q15_t)0x6454, (q15_t)0xb085, (q15_t)0x6451, (q15_t)0xb080,
-  (q15_t)0x644d, (q15_t)0xb07b, (q15_t)0x6449, (q15_t)0xb076, (q15_t)0x6445, (q15_t)0xb071, (q15_t)0x6441, (q15_t)0xb06c,
-  (q15_t)0x643d, (q15_t)0xb067, (q15_t)0x6439, (q15_t)0xb062, (q15_t)0x6435, (q15_t)0xb05e, (q15_t)0x6431, (q15_t)0xb059,
-  (q15_t)0x642d, (q15_t)0xb054, (q15_t)0x6429, (q15_t)0xb04f, (q15_t)0x6426, (q15_t)0xb04a, (q15_t)0x6422, (q15_t)0xb045,
-  (q15_t)0x641e, (q15_t)0xb040, (q15_t)0x641a, (q15_t)0xb03b, (q15_t)0x6416, (q15_t)0xb036, (q15_t)0x6412, (q15_t)0xb031,
-  (q15_t)0x640e, (q15_t)0xb02c, (q15_t)0x640a, (q15_t)0xb027, (q15_t)0x6406, (q15_t)0xb023, (q15_t)0x6402, (q15_t)0xb01e,
-  (q15_t)0x63fe, (q15_t)0xb019, (q15_t)0x63fa, (q15_t)0xb014, (q15_t)0x63f7, (q15_t)0xb00f, (q15_t)0x63f3, (q15_t)0xb00a,
-  (q15_t)0x63ef, (q15_t)0xb005, (q15_t)0x63eb, (q15_t)0xb000, (q15_t)0x63e7, (q15_t)0xaffb, (q15_t)0x63e3, (q15_t)0xaff6,
-  (q15_t)0x63df, (q15_t)0xaff1, (q15_t)0x63db, (q15_t)0xafed, (q15_t)0x63d7, (q15_t)0xafe8, (q15_t)0x63d3, (q15_t)0xafe3,
-  (q15_t)0x63cf, (q15_t)0xafde, (q15_t)0x63cb, (q15_t)0xafd9, (q15_t)0x63c7, (q15_t)0xafd4, (q15_t)0x63c3, (q15_t)0xafcf,
-  (q15_t)0x63c0, (q15_t)0xafca, (q15_t)0x63bc, (q15_t)0xafc5, (q15_t)0x63b8, (q15_t)0xafc1, (q15_t)0x63b4, (q15_t)0xafbc,
-  (q15_t)0x63b0, (q15_t)0xafb7, (q15_t)0x63ac, (q15_t)0xafb2, (q15_t)0x63a8, (q15_t)0xafad, (q15_t)0x63a4, (q15_t)0xafa8,
-  (q15_t)0x63a0, (q15_t)0xafa3, (q15_t)0x639c, (q15_t)0xaf9e, (q15_t)0x6398, (q15_t)0xaf99, (q15_t)0x6394, (q15_t)0xaf94,
-  (q15_t)0x6390, (q15_t)0xaf90, (q15_t)0x638c, (q15_t)0xaf8b, (q15_t)0x6388, (q15_t)0xaf86, (q15_t)0x6384, (q15_t)0xaf81,
-  (q15_t)0x6380, (q15_t)0xaf7c, (q15_t)0x637c, (q15_t)0xaf77, (q15_t)0x6378, (q15_t)0xaf72, (q15_t)0x6375, (q15_t)0xaf6d,
-  (q15_t)0x6371, (q15_t)0xaf69, (q15_t)0x636d, (q15_t)0xaf64, (q15_t)0x6369, (q15_t)0xaf5f, (q15_t)0x6365, (q15_t)0xaf5a,
-  (q15_t)0x6361, (q15_t)0xaf55, (q15_t)0x635d, (q15_t)0xaf50, (q15_t)0x6359, (q15_t)0xaf4b, (q15_t)0x6355, (q15_t)0xaf46,
-  (q15_t)0x6351, (q15_t)0xaf41, (q15_t)0x634d, (q15_t)0xaf3d, (q15_t)0x6349, (q15_t)0xaf38, (q15_t)0x6345, (q15_t)0xaf33,
-  (q15_t)0x6341, (q15_t)0xaf2e, (q15_t)0x633d, (q15_t)0xaf29, (q15_t)0x6339, (q15_t)0xaf24, (q15_t)0x6335, (q15_t)0xaf1f,
-  (q15_t)0x6331, (q15_t)0xaf1b, (q15_t)0x632d, (q15_t)0xaf16, (q15_t)0x6329, (q15_t)0xaf11, (q15_t)0x6325, (q15_t)0xaf0c,
-  (q15_t)0x6321, (q15_t)0xaf07, (q15_t)0x631d, (q15_t)0xaf02, (q15_t)0x6319, (q15_t)0xaefd, (q15_t)0x6315, (q15_t)0xaef8,
-  (q15_t)0x6311, (q15_t)0xaef4, (q15_t)0x630d, (q15_t)0xaeef, (q15_t)0x6309, (q15_t)0xaeea, (q15_t)0x6305, (q15_t)0xaee5,
-  (q15_t)0x6301, (q15_t)0xaee0, (q15_t)0x62fd, (q15_t)0xaedb, (q15_t)0x62f9, (q15_t)0xaed6, (q15_t)0x62f5, (q15_t)0xaed2,
-  (q15_t)0x62f2, (q15_t)0xaecd, (q15_t)0x62ee, (q15_t)0xaec8, (q15_t)0x62ea, (q15_t)0xaec3, (q15_t)0x62e6, (q15_t)0xaebe,
-  (q15_t)0x62e2, (q15_t)0xaeb9, (q15_t)0x62de, (q15_t)0xaeb4, (q15_t)0x62da, (q15_t)0xaeb0, (q15_t)0x62d6, (q15_t)0xaeab,
-  (q15_t)0x62d2, (q15_t)0xaea6, (q15_t)0x62ce, (q15_t)0xaea1, (q15_t)0x62ca, (q15_t)0xae9c, (q15_t)0x62c6, (q15_t)0xae97,
-  (q15_t)0x62c2, (q15_t)0xae92, (q15_t)0x62be, (q15_t)0xae8e, (q15_t)0x62ba, (q15_t)0xae89, (q15_t)0x62b6, (q15_t)0xae84,
-  (q15_t)0x62b2, (q15_t)0xae7f, (q15_t)0x62ae, (q15_t)0xae7a, (q15_t)0x62aa, (q15_t)0xae75, (q15_t)0x62a6, (q15_t)0xae71,
-  (q15_t)0x62a2, (q15_t)0xae6c, (q15_t)0x629e, (q15_t)0xae67, (q15_t)0x629a, (q15_t)0xae62, (q15_t)0x6296, (q15_t)0xae5d,
-  (q15_t)0x6292, (q15_t)0xae58, (q15_t)0x628e, (q15_t)0xae54, (q15_t)0x628a, (q15_t)0xae4f, (q15_t)0x6286, (q15_t)0xae4a,
-  (q15_t)0x6282, (q15_t)0xae45, (q15_t)0x627e, (q15_t)0xae40, (q15_t)0x627a, (q15_t)0xae3b, (q15_t)0x6275, (q15_t)0xae37,
-  (q15_t)0x6271, (q15_t)0xae32, (q15_t)0x626d, (q15_t)0xae2d, (q15_t)0x6269, (q15_t)0xae28, (q15_t)0x6265, (q15_t)0xae23,
-  (q15_t)0x6261, (q15_t)0xae1e, (q15_t)0x625d, (q15_t)0xae1a, (q15_t)0x6259, (q15_t)0xae15, (q15_t)0x6255, (q15_t)0xae10,
-  (q15_t)0x6251, (q15_t)0xae0b, (q15_t)0x624d, (q15_t)0xae06, (q15_t)0x6249, (q15_t)0xae01, (q15_t)0x6245, (q15_t)0xadfd,
-  (q15_t)0x6241, (q15_t)0xadf8, (q15_t)0x623d, (q15_t)0xadf3, (q15_t)0x6239, (q15_t)0xadee, (q15_t)0x6235, (q15_t)0xade9,
-  (q15_t)0x6231, (q15_t)0xade4, (q15_t)0x622d, (q15_t)0xade0, (q15_t)0x6229, (q15_t)0xaddb, (q15_t)0x6225, (q15_t)0xadd6,
-  (q15_t)0x6221, (q15_t)0xadd1, (q15_t)0x621d, (q15_t)0xadcc, (q15_t)0x6219, (q15_t)0xadc8, (q15_t)0x6215, (q15_t)0xadc3,
-  (q15_t)0x6211, (q15_t)0xadbe, (q15_t)0x620d, (q15_t)0xadb9, (q15_t)0x6209, (q15_t)0xadb4, (q15_t)0x6205, (q15_t)0xadaf,
-  (q15_t)0x6201, (q15_t)0xadab, (q15_t)0x61fd, (q15_t)0xada6, (q15_t)0x61f9, (q15_t)0xada1, (q15_t)0x61f5, (q15_t)0xad9c,
-  (q15_t)0x61f1, (q15_t)0xad97, (q15_t)0x61ec, (q15_t)0xad93, (q15_t)0x61e8, (q15_t)0xad8e, (q15_t)0x61e4, (q15_t)0xad89,
-  (q15_t)0x61e0, (q15_t)0xad84, (q15_t)0x61dc, (q15_t)0xad7f, (q15_t)0x61d8, (q15_t)0xad7b, (q15_t)0x61d4, (q15_t)0xad76,
-  (q15_t)0x61d0, (q15_t)0xad71, (q15_t)0x61cc, (q15_t)0xad6c, (q15_t)0x61c8, (q15_t)0xad67, (q15_t)0x61c4, (q15_t)0xad63,
-  (q15_t)0x61c0, (q15_t)0xad5e, (q15_t)0x61bc, (q15_t)0xad59, (q15_t)0x61b8, (q15_t)0xad54, (q15_t)0x61b4, (q15_t)0xad4f,
-  (q15_t)0x61b0, (q15_t)0xad4b, (q15_t)0x61ac, (q15_t)0xad46, (q15_t)0x61a8, (q15_t)0xad41, (q15_t)0x61a3, (q15_t)0xad3c,
-  (q15_t)0x619f, (q15_t)0xad37, (q15_t)0x619b, (q15_t)0xad33, (q15_t)0x6197, (q15_t)0xad2e, (q15_t)0x6193, (q15_t)0xad29,
-  (q15_t)0x618f, (q15_t)0xad24, (q15_t)0x618b, (q15_t)0xad1f, (q15_t)0x6187, (q15_t)0xad1b, (q15_t)0x6183, (q15_t)0xad16,
-  (q15_t)0x617f, (q15_t)0xad11, (q15_t)0x617b, (q15_t)0xad0c, (q15_t)0x6177, (q15_t)0xad08, (q15_t)0x6173, (q15_t)0xad03,
-  (q15_t)0x616f, (q15_t)0xacfe, (q15_t)0x616b, (q15_t)0xacf9, (q15_t)0x6166, (q15_t)0xacf4, (q15_t)0x6162, (q15_t)0xacf0,
-  (q15_t)0x615e, (q15_t)0xaceb, (q15_t)0x615a, (q15_t)0xace6, (q15_t)0x6156, (q15_t)0xace1, (q15_t)0x6152, (q15_t)0xacdd,
-  (q15_t)0x614e, (q15_t)0xacd8, (q15_t)0x614a, (q15_t)0xacd3, (q15_t)0x6146, (q15_t)0xacce, (q15_t)0x6142, (q15_t)0xacc9,
-  (q15_t)0x613e, (q15_t)0xacc5, (q15_t)0x613a, (q15_t)0xacc0, (q15_t)0x6135, (q15_t)0xacbb, (q15_t)0x6131, (q15_t)0xacb6,
-  (q15_t)0x612d, (q15_t)0xacb2, (q15_t)0x6129, (q15_t)0xacad, (q15_t)0x6125, (q15_t)0xaca8, (q15_t)0x6121, (q15_t)0xaca3,
-  (q15_t)0x611d, (q15_t)0xac9e, (q15_t)0x6119, (q15_t)0xac9a, (q15_t)0x6115, (q15_t)0xac95, (q15_t)0x6111, (q15_t)0xac90,
-  (q15_t)0x610d, (q15_t)0xac8b, (q15_t)0x6108, (q15_t)0xac87, (q15_t)0x6104, (q15_t)0xac82, (q15_t)0x6100, (q15_t)0xac7d,
-  (q15_t)0x60fc, (q15_t)0xac78, (q15_t)0x60f8, (q15_t)0xac74, (q15_t)0x60f4, (q15_t)0xac6f, (q15_t)0x60f0, (q15_t)0xac6a,
-  (q15_t)0x60ec, (q15_t)0xac65, (q15_t)0x60e8, (q15_t)0xac61, (q15_t)0x60e4, (q15_t)0xac5c, (q15_t)0x60df, (q15_t)0xac57,
-  (q15_t)0x60db, (q15_t)0xac52, (q15_t)0x60d7, (q15_t)0xac4e, (q15_t)0x60d3, (q15_t)0xac49, (q15_t)0x60cf, (q15_t)0xac44,
-  (q15_t)0x60cb, (q15_t)0xac3f, (q15_t)0x60c7, (q15_t)0xac3b, (q15_t)0x60c3, (q15_t)0xac36, (q15_t)0x60bf, (q15_t)0xac31,
-  (q15_t)0x60ba, (q15_t)0xac2c, (q15_t)0x60b6, (q15_t)0xac28, (q15_t)0x60b2, (q15_t)0xac23, (q15_t)0x60ae, (q15_t)0xac1e,
-  (q15_t)0x60aa, (q15_t)0xac19, (q15_t)0x60a6, (q15_t)0xac15, (q15_t)0x60a2, (q15_t)0xac10, (q15_t)0x609e, (q15_t)0xac0b,
-  (q15_t)0x6099, (q15_t)0xac06, (q15_t)0x6095, (q15_t)0xac02, (q15_t)0x6091, (q15_t)0xabfd, (q15_t)0x608d, (q15_t)0xabf8,
-  (q15_t)0x6089, (q15_t)0xabf3, (q15_t)0x6085, (q15_t)0xabef, (q15_t)0x6081, (q15_t)0xabea, (q15_t)0x607d, (q15_t)0xabe5,
-  (q15_t)0x6078, (q15_t)0xabe0, (q15_t)0x6074, (q15_t)0xabdc, (q15_t)0x6070, (q15_t)0xabd7, (q15_t)0x606c, (q15_t)0xabd2,
-  (q15_t)0x6068, (q15_t)0xabcd, (q15_t)0x6064, (q15_t)0xabc9, (q15_t)0x6060, (q15_t)0xabc4, (q15_t)0x605c, (q15_t)0xabbf,
-  (q15_t)0x6057, (q15_t)0xabbb, (q15_t)0x6053, (q15_t)0xabb6, (q15_t)0x604f, (q15_t)0xabb1, (q15_t)0x604b, (q15_t)0xabac,
-  (q15_t)0x6047, (q15_t)0xaba8, (q15_t)0x6043, (q15_t)0xaba3, (q15_t)0x603f, (q15_t)0xab9e, (q15_t)0x603a, (q15_t)0xab99,
-  (q15_t)0x6036, (q15_t)0xab95, (q15_t)0x6032, (q15_t)0xab90, (q15_t)0x602e, (q15_t)0xab8b, (q15_t)0x602a, (q15_t)0xab87,
-  (q15_t)0x6026, (q15_t)0xab82, (q15_t)0x6022, (q15_t)0xab7d, (q15_t)0x601d, (q15_t)0xab78, (q15_t)0x6019, (q15_t)0xab74,
-  (q15_t)0x6015, (q15_t)0xab6f, (q15_t)0x6011, (q15_t)0xab6a, (q15_t)0x600d, (q15_t)0xab66, (q15_t)0x6009, (q15_t)0xab61,
-  (q15_t)0x6004, (q15_t)0xab5c, (q15_t)0x6000, (q15_t)0xab57, (q15_t)0x5ffc, (q15_t)0xab53, (q15_t)0x5ff8, (q15_t)0xab4e,
-  (q15_t)0x5ff4, (q15_t)0xab49, (q15_t)0x5ff0, (q15_t)0xab45, (q15_t)0x5fec, (q15_t)0xab40, (q15_t)0x5fe7, (q15_t)0xab3b,
-  (q15_t)0x5fe3, (q15_t)0xab36, (q15_t)0x5fdf, (q15_t)0xab32, (q15_t)0x5fdb, (q15_t)0xab2d, (q15_t)0x5fd7, (q15_t)0xab28,
-  (q15_t)0x5fd3, (q15_t)0xab24, (q15_t)0x5fce, (q15_t)0xab1f, (q15_t)0x5fca, (q15_t)0xab1a, (q15_t)0x5fc6, (q15_t)0xab16,
-  (q15_t)0x5fc2, (q15_t)0xab11, (q15_t)0x5fbe, (q15_t)0xab0c, (q15_t)0x5fba, (q15_t)0xab07, (q15_t)0x5fb5, (q15_t)0xab03,
-  (q15_t)0x5fb1, (q15_t)0xaafe, (q15_t)0x5fad, (q15_t)0xaaf9, (q15_t)0x5fa9, (q15_t)0xaaf5, (q15_t)0x5fa5, (q15_t)0xaaf0,
-  (q15_t)0x5fa0, (q15_t)0xaaeb, (q15_t)0x5f9c, (q15_t)0xaae7, (q15_t)0x5f98, (q15_t)0xaae2, (q15_t)0x5f94, (q15_t)0xaadd,
-  (q15_t)0x5f90, (q15_t)0xaad8, (q15_t)0x5f8c, (q15_t)0xaad4, (q15_t)0x5f87, (q15_t)0xaacf, (q15_t)0x5f83, (q15_t)0xaaca,
-  (q15_t)0x5f7f, (q15_t)0xaac6, (q15_t)0x5f7b, (q15_t)0xaac1, (q15_t)0x5f77, (q15_t)0xaabc, (q15_t)0x5f72, (q15_t)0xaab8,
-  (q15_t)0x5f6e, (q15_t)0xaab3, (q15_t)0x5f6a, (q15_t)0xaaae, (q15_t)0x5f66, (q15_t)0xaaaa, (q15_t)0x5f62, (q15_t)0xaaa5,
-  (q15_t)0x5f5e, (q15_t)0xaaa0, (q15_t)0x5f59, (q15_t)0xaa9c, (q15_t)0x5f55, (q15_t)0xaa97, (q15_t)0x5f51, (q15_t)0xaa92,
-  (q15_t)0x5f4d, (q15_t)0xaa8e, (q15_t)0x5f49, (q15_t)0xaa89, (q15_t)0x5f44, (q15_t)0xaa84, (q15_t)0x5f40, (q15_t)0xaa7f,
-  (q15_t)0x5f3c, (q15_t)0xaa7b, (q15_t)0x5f38, (q15_t)0xaa76, (q15_t)0x5f34, (q15_t)0xaa71, (q15_t)0x5f2f, (q15_t)0xaa6d,
-  (q15_t)0x5f2b, (q15_t)0xaa68, (q15_t)0x5f27, (q15_t)0xaa63, (q15_t)0x5f23, (q15_t)0xaa5f, (q15_t)0x5f1f, (q15_t)0xaa5a,
-  (q15_t)0x5f1a, (q15_t)0xaa55, (q15_t)0x5f16, (q15_t)0xaa51, (q15_t)0x5f12, (q15_t)0xaa4c, (q15_t)0x5f0e, (q15_t)0xaa47,
-  (q15_t)0x5f0a, (q15_t)0xaa43, (q15_t)0x5f05, (q15_t)0xaa3e, (q15_t)0x5f01, (q15_t)0xaa39, (q15_t)0x5efd, (q15_t)0xaa35,
-  (q15_t)0x5ef9, (q15_t)0xaa30, (q15_t)0x5ef5, (q15_t)0xaa2b, (q15_t)0x5ef0, (q15_t)0xaa27, (q15_t)0x5eec, (q15_t)0xaa22,
-  (q15_t)0x5ee8, (q15_t)0xaa1d, (q15_t)0x5ee4, (q15_t)0xaa19, (q15_t)0x5edf, (q15_t)0xaa14, (q15_t)0x5edb, (q15_t)0xaa10,
-  (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5ed3, (q15_t)0xaa06, (q15_t)0x5ecf, (q15_t)0xaa02, (q15_t)0x5eca, (q15_t)0xa9fd,
-  (q15_t)0x5ec6, (q15_t)0xa9f8, (q15_t)0x5ec2, (q15_t)0xa9f4, (q15_t)0x5ebe, (q15_t)0xa9ef, (q15_t)0x5eb9, (q15_t)0xa9ea,
-  (q15_t)0x5eb5, (q15_t)0xa9e6, (q15_t)0x5eb1, (q15_t)0xa9e1, (q15_t)0x5ead, (q15_t)0xa9dc, (q15_t)0x5ea9, (q15_t)0xa9d8,
-  (q15_t)0x5ea4, (q15_t)0xa9d3, (q15_t)0x5ea0, (q15_t)0xa9ce, (q15_t)0x5e9c, (q15_t)0xa9ca, (q15_t)0x5e98, (q15_t)0xa9c5,
-  (q15_t)0x5e93, (q15_t)0xa9c0, (q15_t)0x5e8f, (q15_t)0xa9bc, (q15_t)0x5e8b, (q15_t)0xa9b7, (q15_t)0x5e87, (q15_t)0xa9b3,
-  (q15_t)0x5e82, (q15_t)0xa9ae, (q15_t)0x5e7e, (q15_t)0xa9a9, (q15_t)0x5e7a, (q15_t)0xa9a5, (q15_t)0x5e76, (q15_t)0xa9a0,
-  (q15_t)0x5e71, (q15_t)0xa99b, (q15_t)0x5e6d, (q15_t)0xa997, (q15_t)0x5e69, (q15_t)0xa992, (q15_t)0x5e65, (q15_t)0xa98d,
-  (q15_t)0x5e60, (q15_t)0xa989, (q15_t)0x5e5c, (q15_t)0xa984, (q15_t)0x5e58, (q15_t)0xa980, (q15_t)0x5e54, (q15_t)0xa97b,
-  (q15_t)0x5e50, (q15_t)0xa976, (q15_t)0x5e4b, (q15_t)0xa972, (q15_t)0x5e47, (q15_t)0xa96d, (q15_t)0x5e43, (q15_t)0xa968,
-  (q15_t)0x5e3f, (q15_t)0xa964, (q15_t)0x5e3a, (q15_t)0xa95f, (q15_t)0x5e36, (q15_t)0xa95b, (q15_t)0x5e32, (q15_t)0xa956,
-  (q15_t)0x5e2d, (q15_t)0xa951, (q15_t)0x5e29, (q15_t)0xa94d, (q15_t)0x5e25, (q15_t)0xa948, (q15_t)0x5e21, (q15_t)0xa943,
-  (q15_t)0x5e1c, (q15_t)0xa93f, (q15_t)0x5e18, (q15_t)0xa93a, (q15_t)0x5e14, (q15_t)0xa936, (q15_t)0x5e10, (q15_t)0xa931,
-  (q15_t)0x5e0b, (q15_t)0xa92c, (q15_t)0x5e07, (q15_t)0xa928, (q15_t)0x5e03, (q15_t)0xa923, (q15_t)0x5dff, (q15_t)0xa91e,
-  (q15_t)0x5dfa, (q15_t)0xa91a, (q15_t)0x5df6, (q15_t)0xa915, (q15_t)0x5df2, (q15_t)0xa911, (q15_t)0x5dee, (q15_t)0xa90c,
-  (q15_t)0x5de9, (q15_t)0xa907, (q15_t)0x5de5, (q15_t)0xa903, (q15_t)0x5de1, (q15_t)0xa8fe, (q15_t)0x5ddc, (q15_t)0xa8fa,
-  (q15_t)0x5dd8, (q15_t)0xa8f5, (q15_t)0x5dd4, (q15_t)0xa8f0, (q15_t)0x5dd0, (q15_t)0xa8ec, (q15_t)0x5dcb, (q15_t)0xa8e7,
-  (q15_t)0x5dc7, (q15_t)0xa8e3, (q15_t)0x5dc3, (q15_t)0xa8de, (q15_t)0x5dbf, (q15_t)0xa8d9, (q15_t)0x5dba, (q15_t)0xa8d5,
-  (q15_t)0x5db6, (q15_t)0xa8d0, (q15_t)0x5db2, (q15_t)0xa8cc, (q15_t)0x5dad, (q15_t)0xa8c7, (q15_t)0x5da9, (q15_t)0xa8c2,
-  (q15_t)0x5da5, (q15_t)0xa8be, (q15_t)0x5da1, (q15_t)0xa8b9, (q15_t)0x5d9c, (q15_t)0xa8b5, (q15_t)0x5d98, (q15_t)0xa8b0,
-  (q15_t)0x5d94, (q15_t)0xa8ab, (q15_t)0x5d8f, (q15_t)0xa8a7, (q15_t)0x5d8b, (q15_t)0xa8a2, (q15_t)0x5d87, (q15_t)0xa89e,
-  (q15_t)0x5d83, (q15_t)0xa899, (q15_t)0x5d7e, (q15_t)0xa894, (q15_t)0x5d7a, (q15_t)0xa890, (q15_t)0x5d76, (q15_t)0xa88b,
-  (q15_t)0x5d71, (q15_t)0xa887, (q15_t)0x5d6d, (q15_t)0xa882, (q15_t)0x5d69, (q15_t)0xa87d, (q15_t)0x5d65, (q15_t)0xa879,
-  (q15_t)0x5d60, (q15_t)0xa874, (q15_t)0x5d5c, (q15_t)0xa870, (q15_t)0x5d58, (q15_t)0xa86b, (q15_t)0x5d53, (q15_t)0xa867,
-  (q15_t)0x5d4f, (q15_t)0xa862, (q15_t)0x5d4b, (q15_t)0xa85d, (q15_t)0x5d46, (q15_t)0xa859, (q15_t)0x5d42, (q15_t)0xa854,
-  (q15_t)0x5d3e, (q15_t)0xa850, (q15_t)0x5d3a, (q15_t)0xa84b, (q15_t)0x5d35, (q15_t)0xa847, (q15_t)0x5d31, (q15_t)0xa842,
-  (q15_t)0x5d2d, (q15_t)0xa83d, (q15_t)0x5d28, (q15_t)0xa839, (q15_t)0x5d24, (q15_t)0xa834, (q15_t)0x5d20, (q15_t)0xa830,
-  (q15_t)0x5d1b, (q15_t)0xa82b, (q15_t)0x5d17, (q15_t)0xa827, (q15_t)0x5d13, (q15_t)0xa822, (q15_t)0x5d0e, (q15_t)0xa81d,
-  (q15_t)0x5d0a, (q15_t)0xa819, (q15_t)0x5d06, (q15_t)0xa814, (q15_t)0x5d01, (q15_t)0xa810, (q15_t)0x5cfd, (q15_t)0xa80b,
-  (q15_t)0x5cf9, (q15_t)0xa807, (q15_t)0x5cf5, (q15_t)0xa802, (q15_t)0x5cf0, (q15_t)0xa7fd, (q15_t)0x5cec, (q15_t)0xa7f9,
-  (q15_t)0x5ce8, (q15_t)0xa7f4, (q15_t)0x5ce3, (q15_t)0xa7f0, (q15_t)0x5cdf, (q15_t)0xa7eb, (q15_t)0x5cdb, (q15_t)0xa7e7,
-  (q15_t)0x5cd6, (q15_t)0xa7e2, (q15_t)0x5cd2, (q15_t)0xa7de, (q15_t)0x5cce, (q15_t)0xa7d9, (q15_t)0x5cc9, (q15_t)0xa7d4,
-  (q15_t)0x5cc5, (q15_t)0xa7d0, (q15_t)0x5cc1, (q15_t)0xa7cb, (q15_t)0x5cbc, (q15_t)0xa7c7, (q15_t)0x5cb8, (q15_t)0xa7c2,
-  (q15_t)0x5cb4, (q15_t)0xa7be, (q15_t)0x5caf, (q15_t)0xa7b9, (q15_t)0x5cab, (q15_t)0xa7b5, (q15_t)0x5ca7, (q15_t)0xa7b0,
-  (q15_t)0x5ca2, (q15_t)0xa7ab, (q15_t)0x5c9e, (q15_t)0xa7a7, (q15_t)0x5c9a, (q15_t)0xa7a2, (q15_t)0x5c95, (q15_t)0xa79e,
-  (q15_t)0x5c91, (q15_t)0xa799, (q15_t)0x5c8d, (q15_t)0xa795, (q15_t)0x5c88, (q15_t)0xa790, (q15_t)0x5c84, (q15_t)0xa78c,
-  (q15_t)0x5c80, (q15_t)0xa787, (q15_t)0x5c7b, (q15_t)0xa783, (q15_t)0x5c77, (q15_t)0xa77e, (q15_t)0x5c73, (q15_t)0xa779,
-  (q15_t)0x5c6e, (q15_t)0xa775, (q15_t)0x5c6a, (q15_t)0xa770, (q15_t)0x5c66, (q15_t)0xa76c, (q15_t)0x5c61, (q15_t)0xa767,
-  (q15_t)0x5c5d, (q15_t)0xa763, (q15_t)0x5c58, (q15_t)0xa75e, (q15_t)0x5c54, (q15_t)0xa75a, (q15_t)0x5c50, (q15_t)0xa755,
-  (q15_t)0x5c4b, (q15_t)0xa751, (q15_t)0x5c47, (q15_t)0xa74c, (q15_t)0x5c43, (q15_t)0xa748, (q15_t)0x5c3e, (q15_t)0xa743,
-  (q15_t)0x5c3a, (q15_t)0xa73f, (q15_t)0x5c36, (q15_t)0xa73a, (q15_t)0x5c31, (q15_t)0xa735, (q15_t)0x5c2d, (q15_t)0xa731,
-  (q15_t)0x5c29, (q15_t)0xa72c, (q15_t)0x5c24, (q15_t)0xa728, (q15_t)0x5c20, (q15_t)0xa723, (q15_t)0x5c1b, (q15_t)0xa71f,
-  (q15_t)0x5c17, (q15_t)0xa71a, (q15_t)0x5c13, (q15_t)0xa716, (q15_t)0x5c0e, (q15_t)0xa711, (q15_t)0x5c0a, (q15_t)0xa70d,
-  (q15_t)0x5c06, (q15_t)0xa708, (q15_t)0x5c01, (q15_t)0xa704, (q15_t)0x5bfd, (q15_t)0xa6ff, (q15_t)0x5bf9, (q15_t)0xa6fb,
-  (q15_t)0x5bf4, (q15_t)0xa6f6, (q15_t)0x5bf0, (q15_t)0xa6f2, (q15_t)0x5beb, (q15_t)0xa6ed, (q15_t)0x5be7, (q15_t)0xa6e9,
-  (q15_t)0x5be3, (q15_t)0xa6e4, (q15_t)0x5bde, (q15_t)0xa6e0, (q15_t)0x5bda, (q15_t)0xa6db, (q15_t)0x5bd6, (q15_t)0xa6d7,
-  (q15_t)0x5bd1, (q15_t)0xa6d2, (q15_t)0x5bcd, (q15_t)0xa6ce, (q15_t)0x5bc8, (q15_t)0xa6c9, (q15_t)0x5bc4, (q15_t)0xa6c5,
-  (q15_t)0x5bc0, (q15_t)0xa6c0, (q15_t)0x5bbb, (q15_t)0xa6bc, (q15_t)0x5bb7, (q15_t)0xa6b7, (q15_t)0x5bb2, (q15_t)0xa6b3,
-  (q15_t)0x5bae, (q15_t)0xa6ae, (q15_t)0x5baa, (q15_t)0xa6aa, (q15_t)0x5ba5, (q15_t)0xa6a5, (q15_t)0x5ba1, (q15_t)0xa6a1,
-  (q15_t)0x5b9d, (q15_t)0xa69c, (q15_t)0x5b98, (q15_t)0xa698, (q15_t)0x5b94, (q15_t)0xa693, (q15_t)0x5b8f, (q15_t)0xa68f,
-  (q15_t)0x5b8b, (q15_t)0xa68a, (q15_t)0x5b87, (q15_t)0xa686, (q15_t)0x5b82, (q15_t)0xa681, (q15_t)0x5b7e, (q15_t)0xa67d,
-  (q15_t)0x5b79, (q15_t)0xa678, (q15_t)0x5b75, (q15_t)0xa674, (q15_t)0x5b71, (q15_t)0xa66f, (q15_t)0x5b6c, (q15_t)0xa66b,
-  (q15_t)0x5b68, (q15_t)0xa666, (q15_t)0x5b63, (q15_t)0xa662, (q15_t)0x5b5f, (q15_t)0xa65d, (q15_t)0x5b5b, (q15_t)0xa659,
-  (q15_t)0x5b56, (q15_t)0xa654, (q15_t)0x5b52, (q15_t)0xa650, (q15_t)0x5b4d, (q15_t)0xa64b, (q15_t)0x5b49, (q15_t)0xa647,
-  (q15_t)0x5b45, (q15_t)0xa642, (q15_t)0x5b40, (q15_t)0xa63e, (q15_t)0x5b3c, (q15_t)0xa639, (q15_t)0x5b37, (q15_t)0xa635,
-  (q15_t)0x5b33, (q15_t)0xa630, (q15_t)0x5b2f, (q15_t)0xa62c, (q15_t)0x5b2a, (q15_t)0xa627, (q15_t)0x5b26, (q15_t)0xa623,
-  (q15_t)0x5b21, (q15_t)0xa61f, (q15_t)0x5b1d, (q15_t)0xa61a, (q15_t)0x5b19, (q15_t)0xa616, (q15_t)0x5b14, (q15_t)0xa611,
-  (q15_t)0x5b10, (q15_t)0xa60d, (q15_t)0x5b0b, (q15_t)0xa608, (q15_t)0x5b07, (q15_t)0xa604, (q15_t)0x5b02, (q15_t)0xa5ff,
-  (q15_t)0x5afe, (q15_t)0xa5fb, (q15_t)0x5afa, (q15_t)0xa5f6, (q15_t)0x5af5, (q15_t)0xa5f2, (q15_t)0x5af1, (q15_t)0xa5ed,
-  (q15_t)0x5aec, (q15_t)0xa5e9, (q15_t)0x5ae8, (q15_t)0xa5e4, (q15_t)0x5ae4, (q15_t)0xa5e0, (q15_t)0x5adf, (q15_t)0xa5dc,
-  (q15_t)0x5adb, (q15_t)0xa5d7, (q15_t)0x5ad6, (q15_t)0xa5d3, (q15_t)0x5ad2, (q15_t)0xa5ce, (q15_t)0x5acd, (q15_t)0xa5ca,
-  (q15_t)0x5ac9, (q15_t)0xa5c5, (q15_t)0x5ac5, (q15_t)0xa5c1, (q15_t)0x5ac0, (q15_t)0xa5bc, (q15_t)0x5abc, (q15_t)0xa5b8,
-  (q15_t)0x5ab7, (q15_t)0xa5b3, (q15_t)0x5ab3, (q15_t)0xa5af, (q15_t)0x5aae, (q15_t)0xa5aa, (q15_t)0x5aaa, (q15_t)0xa5a6,
-  (q15_t)0x5aa5, (q15_t)0xa5a2, (q15_t)0x5aa1, (q15_t)0xa59d, (q15_t)0x5a9d, (q15_t)0xa599, (q15_t)0x5a98, (q15_t)0xa594,
-  (q15_t)0x5a94, (q15_t)0xa590, (q15_t)0x5a8f, (q15_t)0xa58b, (q15_t)0x5a8b, (q15_t)0xa587, (q15_t)0x5a86, (q15_t)0xa582,
-  (q15_t)0x5a82, (q15_t)0xa57e, (q15_t)0x5a7e, (q15_t)0xa57a, (q15_t)0x5a79, (q15_t)0xa575, (q15_t)0x5a75, (q15_t)0xa571,
-  (q15_t)0x5a70, (q15_t)0xa56c, (q15_t)0x5a6c, (q15_t)0xa568, (q15_t)0x5a67, (q15_t)0xa563, (q15_t)0x5a63, (q15_t)0xa55f,
-  (q15_t)0x5a5e, (q15_t)0xa55b, (q15_t)0x5a5a, (q15_t)0xa556, (q15_t)0x5a56, (q15_t)0xa552, (q15_t)0x5a51, (q15_t)0xa54d,
-  (q15_t)0x5a4d, (q15_t)0xa549, (q15_t)0x5a48, (q15_t)0xa544, (q15_t)0x5a44, (q15_t)0xa540, (q15_t)0x5a3f, (q15_t)0xa53b,
-  (q15_t)0x5a3b, (q15_t)0xa537, (q15_t)0x5a36, (q15_t)0xa533, (q15_t)0x5a32, (q15_t)0xa52e, (q15_t)0x5a2d, (q15_t)0xa52a,
-  (q15_t)0x5a29, (q15_t)0xa525, (q15_t)0x5a24, (q15_t)0xa521, (q15_t)0x5a20, (q15_t)0xa51c, (q15_t)0x5a1c, (q15_t)0xa518,
-  (q15_t)0x5a17, (q15_t)0xa514, (q15_t)0x5a13, (q15_t)0xa50f, (q15_t)0x5a0e, (q15_t)0xa50b, (q15_t)0x5a0a, (q15_t)0xa506,
-  (q15_t)0x5a05, (q15_t)0xa502, (q15_t)0x5a01, (q15_t)0xa4fe, (q15_t)0x59fc, (q15_t)0xa4f9, (q15_t)0x59f8, (q15_t)0xa4f5,
-  (q15_t)0x59f3, (q15_t)0xa4f0, (q15_t)0x59ef, (q15_t)0xa4ec, (q15_t)0x59ea, (q15_t)0xa4e7, (q15_t)0x59e6, (q15_t)0xa4e3,
-  (q15_t)0x59e1, (q15_t)0xa4df, (q15_t)0x59dd, (q15_t)0xa4da, (q15_t)0x59d9, (q15_t)0xa4d6, (q15_t)0x59d4, (q15_t)0xa4d1,
-  (q15_t)0x59d0, (q15_t)0xa4cd, (q15_t)0x59cb, (q15_t)0xa4c9, (q15_t)0x59c7, (q15_t)0xa4c4, (q15_t)0x59c2, (q15_t)0xa4c0,
-  (q15_t)0x59be, (q15_t)0xa4bb, (q15_t)0x59b9, (q15_t)0xa4b7, (q15_t)0x59b5, (q15_t)0xa4b3, (q15_t)0x59b0, (q15_t)0xa4ae,
-  (q15_t)0x59ac, (q15_t)0xa4aa, (q15_t)0x59a7, (q15_t)0xa4a5, (q15_t)0x59a3, (q15_t)0xa4a1, (q15_t)0x599e, (q15_t)0xa49d,
-  (q15_t)0x599a, (q15_t)0xa498, (q15_t)0x5995, (q15_t)0xa494, (q15_t)0x5991, (q15_t)0xa48f, (q15_t)0x598c, (q15_t)0xa48b,
-  (q15_t)0x5988, (q15_t)0xa487, (q15_t)0x5983, (q15_t)0xa482, (q15_t)0x597f, (q15_t)0xa47e, (q15_t)0x597a, (q15_t)0xa479,
-  (q15_t)0x5976, (q15_t)0xa475, (q15_t)0x5971, (q15_t)0xa471, (q15_t)0x596d, (q15_t)0xa46c, (q15_t)0x5968, (q15_t)0xa468,
-  (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x595f, (q15_t)0xa45f, (q15_t)0x595b, (q15_t)0xa45b, (q15_t)0x5956, (q15_t)0xa456,
-  (q15_t)0x5952, (q15_t)0xa452, (q15_t)0x594d, (q15_t)0xa44e, (q15_t)0x5949, (q15_t)0xa449, (q15_t)0x5944, (q15_t)0xa445,
-  (q15_t)0x5940, (q15_t)0xa440, (q15_t)0x593b, (q15_t)0xa43c, (q15_t)0x5937, (q15_t)0xa438, (q15_t)0x5932, (q15_t)0xa433,
-  (q15_t)0x592e, (q15_t)0xa42f, (q15_t)0x5929, (q15_t)0xa42a, (q15_t)0x5925, (q15_t)0xa426, (q15_t)0x5920, (q15_t)0xa422,
-  (q15_t)0x591c, (q15_t)0xa41d, (q15_t)0x5917, (q15_t)0xa419, (q15_t)0x5913, (q15_t)0xa415, (q15_t)0x590e, (q15_t)0xa410,
-  (q15_t)0x590a, (q15_t)0xa40c, (q15_t)0x5905, (q15_t)0xa407, (q15_t)0x5901, (q15_t)0xa403, (q15_t)0x58fc, (q15_t)0xa3ff,
-  (q15_t)0x58f8, (q15_t)0xa3fa, (q15_t)0x58f3, (q15_t)0xa3f6, (q15_t)0x58ef, (q15_t)0xa3f2, (q15_t)0x58ea, (q15_t)0xa3ed,
-  (q15_t)0x58e6, (q15_t)0xa3e9, (q15_t)0x58e1, (q15_t)0xa3e5, (q15_t)0x58dd, (q15_t)0xa3e0, (q15_t)0x58d8, (q15_t)0xa3dc,
-  (q15_t)0x58d4, (q15_t)0xa3d7, (q15_t)0x58cf, (q15_t)0xa3d3, (q15_t)0x58cb, (q15_t)0xa3cf, (q15_t)0x58c6, (q15_t)0xa3ca,
-  (q15_t)0x58c1, (q15_t)0xa3c6, (q15_t)0x58bd, (q15_t)0xa3c2, (q15_t)0x58b8, (q15_t)0xa3bd, (q15_t)0x58b4, (q15_t)0xa3b9,
-  (q15_t)0x58af, (q15_t)0xa3b5, (q15_t)0x58ab, (q15_t)0xa3b0, (q15_t)0x58a6, (q15_t)0xa3ac, (q15_t)0x58a2, (q15_t)0xa3a8,
-  (q15_t)0x589d, (q15_t)0xa3a3, (q15_t)0x5899, (q15_t)0xa39f, (q15_t)0x5894, (q15_t)0xa39a, (q15_t)0x5890, (q15_t)0xa396,
-  (q15_t)0x588b, (q15_t)0xa392, (q15_t)0x5887, (q15_t)0xa38d, (q15_t)0x5882, (q15_t)0xa389, (q15_t)0x587d, (q15_t)0xa385,
-  (q15_t)0x5879, (q15_t)0xa380, (q15_t)0x5874, (q15_t)0xa37c, (q15_t)0x5870, (q15_t)0xa378, (q15_t)0x586b, (q15_t)0xa373,
-  (q15_t)0x5867, (q15_t)0xa36f, (q15_t)0x5862, (q15_t)0xa36b, (q15_t)0x585e, (q15_t)0xa366, (q15_t)0x5859, (q15_t)0xa362,
-  (q15_t)0x5855, (q15_t)0xa35e, (q15_t)0x5850, (q15_t)0xa359, (q15_t)0x584b, (q15_t)0xa355, (q15_t)0x5847, (q15_t)0xa351,
-  (q15_t)0x5842, (q15_t)0xa34c, (q15_t)0x583e, (q15_t)0xa348, (q15_t)0x5839, (q15_t)0xa344, (q15_t)0x5835, (q15_t)0xa33f,
-  (q15_t)0x5830, (q15_t)0xa33b, (q15_t)0x582c, (q15_t)0xa337, (q15_t)0x5827, (q15_t)0xa332, (q15_t)0x5822, (q15_t)0xa32e,
-  (q15_t)0x581e, (q15_t)0xa32a, (q15_t)0x5819, (q15_t)0xa325, (q15_t)0x5815, (q15_t)0xa321, (q15_t)0x5810, (q15_t)0xa31d,
-  (q15_t)0x580c, (q15_t)0xa318, (q15_t)0x5807, (q15_t)0xa314, (q15_t)0x5803, (q15_t)0xa310, (q15_t)0x57fe, (q15_t)0xa30b,
-  (q15_t)0x57f9, (q15_t)0xa307, (q15_t)0x57f5, (q15_t)0xa303, (q15_t)0x57f0, (q15_t)0xa2ff, (q15_t)0x57ec, (q15_t)0xa2fa,
-  (q15_t)0x57e7, (q15_t)0xa2f6, (q15_t)0x57e3, (q15_t)0xa2f2, (q15_t)0x57de, (q15_t)0xa2ed, (q15_t)0x57d9, (q15_t)0xa2e9,
-  (q15_t)0x57d5, (q15_t)0xa2e5, (q15_t)0x57d0, (q15_t)0xa2e0, (q15_t)0x57cc, (q15_t)0xa2dc, (q15_t)0x57c7, (q15_t)0xa2d8,
-  (q15_t)0x57c3, (q15_t)0xa2d3, (q15_t)0x57be, (q15_t)0xa2cf, (q15_t)0x57b9, (q15_t)0xa2cb, (q15_t)0x57b5, (q15_t)0xa2c6,
-  (q15_t)0x57b0, (q15_t)0xa2c2, (q15_t)0x57ac, (q15_t)0xa2be, (q15_t)0x57a7, (q15_t)0xa2ba, (q15_t)0x57a3, (q15_t)0xa2b5,
-  (q15_t)0x579e, (q15_t)0xa2b1, (q15_t)0x5799, (q15_t)0xa2ad, (q15_t)0x5795, (q15_t)0xa2a8, (q15_t)0x5790, (q15_t)0xa2a4,
-  (q15_t)0x578c, (q15_t)0xa2a0, (q15_t)0x5787, (q15_t)0xa29b, (q15_t)0x5783, (q15_t)0xa297, (q15_t)0x577e, (q15_t)0xa293,
-  (q15_t)0x5779, (q15_t)0xa28f, (q15_t)0x5775, (q15_t)0xa28a, (q15_t)0x5770, (q15_t)0xa286, (q15_t)0x576c, (q15_t)0xa282,
-  (q15_t)0x5767, (q15_t)0xa27d, (q15_t)0x5762, (q15_t)0xa279, (q15_t)0x575e, (q15_t)0xa275, (q15_t)0x5759, (q15_t)0xa271,
-  (q15_t)0x5755, (q15_t)0xa26c, (q15_t)0x5750, (q15_t)0xa268, (q15_t)0x574b, (q15_t)0xa264, (q15_t)0x5747, (q15_t)0xa25f,
-  (q15_t)0x5742, (q15_t)0xa25b, (q15_t)0x573e, (q15_t)0xa257, (q15_t)0x5739, (q15_t)0xa253, (q15_t)0x5734, (q15_t)0xa24e,
-  (q15_t)0x5730, (q15_t)0xa24a, (q15_t)0x572b, (q15_t)0xa246, (q15_t)0x5727, (q15_t)0xa241, (q15_t)0x5722, (q15_t)0xa23d,
-  (q15_t)0x571d, (q15_t)0xa239, (q15_t)0x5719, (q15_t)0xa235, (q15_t)0x5714, (q15_t)0xa230, (q15_t)0x5710, (q15_t)0xa22c,
-  (q15_t)0x570b, (q15_t)0xa228, (q15_t)0x5706, (q15_t)0xa224, (q15_t)0x5702, (q15_t)0xa21f, (q15_t)0x56fd, (q15_t)0xa21b,
-  (q15_t)0x56f9, (q15_t)0xa217, (q15_t)0x56f4, (q15_t)0xa212, (q15_t)0x56ef, (q15_t)0xa20e, (q15_t)0x56eb, (q15_t)0xa20a,
-  (q15_t)0x56e6, (q15_t)0xa206, (q15_t)0x56e2, (q15_t)0xa201, (q15_t)0x56dd, (q15_t)0xa1fd, (q15_t)0x56d8, (q15_t)0xa1f9,
-  (q15_t)0x56d4, (q15_t)0xa1f5, (q15_t)0x56cf, (q15_t)0xa1f0, (q15_t)0x56ca, (q15_t)0xa1ec, (q15_t)0x56c6, (q15_t)0xa1e8,
-  (q15_t)0x56c1, (q15_t)0xa1e4, (q15_t)0x56bd, (q15_t)0xa1df, (q15_t)0x56b8, (q15_t)0xa1db, (q15_t)0x56b3, (q15_t)0xa1d7,
-  (q15_t)0x56af, (q15_t)0xa1d3, (q15_t)0x56aa, (q15_t)0xa1ce, (q15_t)0x56a5, (q15_t)0xa1ca, (q15_t)0x56a1, (q15_t)0xa1c6,
-  (q15_t)0x569c, (q15_t)0xa1c1, (q15_t)0x5698, (q15_t)0xa1bd, (q15_t)0x5693, (q15_t)0xa1b9, (q15_t)0x568e, (q15_t)0xa1b5,
-  (q15_t)0x568a, (q15_t)0xa1b0, (q15_t)0x5685, (q15_t)0xa1ac, (q15_t)0x5680, (q15_t)0xa1a8, (q15_t)0x567c, (q15_t)0xa1a4,
-  (q15_t)0x5677, (q15_t)0xa1a0, (q15_t)0x5673, (q15_t)0xa19b, (q15_t)0x566e, (q15_t)0xa197, (q15_t)0x5669, (q15_t)0xa193,
-  (q15_t)0x5665, (q15_t)0xa18f, (q15_t)0x5660, (q15_t)0xa18a, (q15_t)0x565b, (q15_t)0xa186, (q15_t)0x5657, (q15_t)0xa182,
-  (q15_t)0x5652, (q15_t)0xa17e, (q15_t)0x564d, (q15_t)0xa179, (q15_t)0x5649, (q15_t)0xa175, (q15_t)0x5644, (q15_t)0xa171,
-  (q15_t)0x5640, (q15_t)0xa16d, (q15_t)0x563b, (q15_t)0xa168, (q15_t)0x5636, (q15_t)0xa164, (q15_t)0x5632, (q15_t)0xa160,
-  (q15_t)0x562d, (q15_t)0xa15c, (q15_t)0x5628, (q15_t)0xa157, (q15_t)0x5624, (q15_t)0xa153, (q15_t)0x561f, (q15_t)0xa14f,
-  (q15_t)0x561a, (q15_t)0xa14b, (q15_t)0x5616, (q15_t)0xa147, (q15_t)0x5611, (q15_t)0xa142, (q15_t)0x560c, (q15_t)0xa13e,
-  (q15_t)0x5608, (q15_t)0xa13a, (q15_t)0x5603, (q15_t)0xa136, (q15_t)0x55fe, (q15_t)0xa131, (q15_t)0x55fa, (q15_t)0xa12d,
-  (q15_t)0x55f5, (q15_t)0xa129, (q15_t)0x55f0, (q15_t)0xa125, (q15_t)0x55ec, (q15_t)0xa121, (q15_t)0x55e7, (q15_t)0xa11c,
-  (q15_t)0x55e3, (q15_t)0xa118, (q15_t)0x55de, (q15_t)0xa114, (q15_t)0x55d9, (q15_t)0xa110, (q15_t)0x55d5, (q15_t)0xa10b,
-  (q15_t)0x55d0, (q15_t)0xa107, (q15_t)0x55cb, (q15_t)0xa103, (q15_t)0x55c7, (q15_t)0xa0ff, (q15_t)0x55c2, (q15_t)0xa0fb,
-  (q15_t)0x55bd, (q15_t)0xa0f6, (q15_t)0x55b9, (q15_t)0xa0f2, (q15_t)0x55b4, (q15_t)0xa0ee, (q15_t)0x55af, (q15_t)0xa0ea,
-  (q15_t)0x55ab, (q15_t)0xa0e6, (q15_t)0x55a6, (q15_t)0xa0e1, (q15_t)0x55a1, (q15_t)0xa0dd, (q15_t)0x559d, (q15_t)0xa0d9,
-  (q15_t)0x5598, (q15_t)0xa0d5, (q15_t)0x5593, (q15_t)0xa0d1, (q15_t)0x558f, (q15_t)0xa0cc, (q15_t)0x558a, (q15_t)0xa0c8,
-  (q15_t)0x5585, (q15_t)0xa0c4, (q15_t)0x5581, (q15_t)0xa0c0, (q15_t)0x557c, (q15_t)0xa0bc, (q15_t)0x5577, (q15_t)0xa0b7,
-  (q15_t)0x5572, (q15_t)0xa0b3, (q15_t)0x556e, (q15_t)0xa0af, (q15_t)0x5569, (q15_t)0xa0ab, (q15_t)0x5564, (q15_t)0xa0a7,
-  (q15_t)0x5560, (q15_t)0xa0a2, (q15_t)0x555b, (q15_t)0xa09e, (q15_t)0x5556, (q15_t)0xa09a, (q15_t)0x5552, (q15_t)0xa096,
-  (q15_t)0x554d, (q15_t)0xa092, (q15_t)0x5548, (q15_t)0xa08e, (q15_t)0x5544, (q15_t)0xa089, (q15_t)0x553f, (q15_t)0xa085,
-  (q15_t)0x553a, (q15_t)0xa081, (q15_t)0x5536, (q15_t)0xa07d, (q15_t)0x5531, (q15_t)0xa079, (q15_t)0x552c, (q15_t)0xa074,
-  (q15_t)0x5528, (q15_t)0xa070, (q15_t)0x5523, (q15_t)0xa06c, (q15_t)0x551e, (q15_t)0xa068, (q15_t)0x5519, (q15_t)0xa064,
-  (q15_t)0x5515, (q15_t)0xa060, (q15_t)0x5510, (q15_t)0xa05b, (q15_t)0x550b, (q15_t)0xa057, (q15_t)0x5507, (q15_t)0xa053,
-  (q15_t)0x5502, (q15_t)0xa04f, (q15_t)0x54fd, (q15_t)0xa04b, (q15_t)0x54f9, (q15_t)0xa046, (q15_t)0x54f4, (q15_t)0xa042,
-  (q15_t)0x54ef, (q15_t)0xa03e, (q15_t)0x54ea, (q15_t)0xa03a, (q15_t)0x54e6, (q15_t)0xa036, (q15_t)0x54e1, (q15_t)0xa032,
-  (q15_t)0x54dc, (q15_t)0xa02d, (q15_t)0x54d8, (q15_t)0xa029, (q15_t)0x54d3, (q15_t)0xa025, (q15_t)0x54ce, (q15_t)0xa021,
-  (q15_t)0x54ca, (q15_t)0xa01d, (q15_t)0x54c5, (q15_t)0xa019, (q15_t)0x54c0, (q15_t)0xa014, (q15_t)0x54bb, (q15_t)0xa010,
-  (q15_t)0x54b7, (q15_t)0xa00c, (q15_t)0x54b2, (q15_t)0xa008, (q15_t)0x54ad, (q15_t)0xa004, (q15_t)0x54a9, (q15_t)0xa000,
-  (q15_t)0x54a4, (q15_t)0x9ffc, (q15_t)0x549f, (q15_t)0x9ff7, (q15_t)0x549a, (q15_t)0x9ff3, (q15_t)0x5496, (q15_t)0x9fef,
-  (q15_t)0x5491, (q15_t)0x9feb, (q15_t)0x548c, (q15_t)0x9fe7, (q15_t)0x5488, (q15_t)0x9fe3, (q15_t)0x5483, (q15_t)0x9fde,
-  (q15_t)0x547e, (q15_t)0x9fda, (q15_t)0x5479, (q15_t)0x9fd6, (q15_t)0x5475, (q15_t)0x9fd2, (q15_t)0x5470, (q15_t)0x9fce,
-  (q15_t)0x546b, (q15_t)0x9fca, (q15_t)0x5467, (q15_t)0x9fc6, (q15_t)0x5462, (q15_t)0x9fc1, (q15_t)0x545d, (q15_t)0x9fbd,
-  (q15_t)0x5458, (q15_t)0x9fb9, (q15_t)0x5454, (q15_t)0x9fb5, (q15_t)0x544f, (q15_t)0x9fb1, (q15_t)0x544a, (q15_t)0x9fad,
-  (q15_t)0x5445, (q15_t)0x9fa9, (q15_t)0x5441, (q15_t)0x9fa4, (q15_t)0x543c, (q15_t)0x9fa0, (q15_t)0x5437, (q15_t)0x9f9c,
-  (q15_t)0x5433, (q15_t)0x9f98, (q15_t)0x542e, (q15_t)0x9f94, (q15_t)0x5429, (q15_t)0x9f90, (q15_t)0x5424, (q15_t)0x9f8c,
-  (q15_t)0x5420, (q15_t)0x9f88, (q15_t)0x541b, (q15_t)0x9f83, (q15_t)0x5416, (q15_t)0x9f7f, (q15_t)0x5411, (q15_t)0x9f7b,
-  (q15_t)0x540d, (q15_t)0x9f77, (q15_t)0x5408, (q15_t)0x9f73, (q15_t)0x5403, (q15_t)0x9f6f, (q15_t)0x53fe, (q15_t)0x9f6b,
-  (q15_t)0x53fa, (q15_t)0x9f67, (q15_t)0x53f5, (q15_t)0x9f62, (q15_t)0x53f0, (q15_t)0x9f5e, (q15_t)0x53eb, (q15_t)0x9f5a,
-  (q15_t)0x53e7, (q15_t)0x9f56, (q15_t)0x53e2, (q15_t)0x9f52, (q15_t)0x53dd, (q15_t)0x9f4e, (q15_t)0x53d8, (q15_t)0x9f4a,
-  (q15_t)0x53d4, (q15_t)0x9f46, (q15_t)0x53cf, (q15_t)0x9f41, (q15_t)0x53ca, (q15_t)0x9f3d, (q15_t)0x53c5, (q15_t)0x9f39,
-  (q15_t)0x53c1, (q15_t)0x9f35, (q15_t)0x53bc, (q15_t)0x9f31, (q15_t)0x53b7, (q15_t)0x9f2d, (q15_t)0x53b2, (q15_t)0x9f29,
-  (q15_t)0x53ae, (q15_t)0x9f25, (q15_t)0x53a9, (q15_t)0x9f21, (q15_t)0x53a4, (q15_t)0x9f1c, (q15_t)0x539f, (q15_t)0x9f18,
-  (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x5396, (q15_t)0x9f10, (q15_t)0x5391, (q15_t)0x9f0c, (q15_t)0x538c, (q15_t)0x9f08,
-  (q15_t)0x5388, (q15_t)0x9f04, (q15_t)0x5383, (q15_t)0x9f00, (q15_t)0x537e, (q15_t)0x9efc, (q15_t)0x5379, (q15_t)0x9ef8,
-  (q15_t)0x5375, (q15_t)0x9ef3, (q15_t)0x5370, (q15_t)0x9eef, (q15_t)0x536b, (q15_t)0x9eeb, (q15_t)0x5366, (q15_t)0x9ee7,
-  (q15_t)0x5362, (q15_t)0x9ee3, (q15_t)0x535d, (q15_t)0x9edf, (q15_t)0x5358, (q15_t)0x9edb, (q15_t)0x5353, (q15_t)0x9ed7,
-  (q15_t)0x534e, (q15_t)0x9ed3, (q15_t)0x534a, (q15_t)0x9ecf, (q15_t)0x5345, (q15_t)0x9ecb, (q15_t)0x5340, (q15_t)0x9ec6,
-  (q15_t)0x533b, (q15_t)0x9ec2, (q15_t)0x5337, (q15_t)0x9ebe, (q15_t)0x5332, (q15_t)0x9eba, (q15_t)0x532d, (q15_t)0x9eb6,
-  (q15_t)0x5328, (q15_t)0x9eb2, (q15_t)0x5323, (q15_t)0x9eae, (q15_t)0x531f, (q15_t)0x9eaa, (q15_t)0x531a, (q15_t)0x9ea6,
-  (q15_t)0x5315, (q15_t)0x9ea2, (q15_t)0x5310, (q15_t)0x9e9e, (q15_t)0x530c, (q15_t)0x9e9a, (q15_t)0x5307, (q15_t)0x9e95,
-  (q15_t)0x5302, (q15_t)0x9e91, (q15_t)0x52fd, (q15_t)0x9e8d, (q15_t)0x52f8, (q15_t)0x9e89, (q15_t)0x52f4, (q15_t)0x9e85,
-  (q15_t)0x52ef, (q15_t)0x9e81, (q15_t)0x52ea, (q15_t)0x9e7d, (q15_t)0x52e5, (q15_t)0x9e79, (q15_t)0x52e1, (q15_t)0x9e75,
-  (q15_t)0x52dc, (q15_t)0x9e71, (q15_t)0x52d7, (q15_t)0x9e6d, (q15_t)0x52d2, (q15_t)0x9e69, (q15_t)0x52cd, (q15_t)0x9e65,
-  (q15_t)0x52c9, (q15_t)0x9e61, (q15_t)0x52c4, (q15_t)0x9e5d, (q15_t)0x52bf, (q15_t)0x9e58, (q15_t)0x52ba, (q15_t)0x9e54,
-  (q15_t)0x52b5, (q15_t)0x9e50, (q15_t)0x52b1, (q15_t)0x9e4c, (q15_t)0x52ac, (q15_t)0x9e48, (q15_t)0x52a7, (q15_t)0x9e44,
-  (q15_t)0x52a2, (q15_t)0x9e40, (q15_t)0x529d, (q15_t)0x9e3c, (q15_t)0x5299, (q15_t)0x9e38, (q15_t)0x5294, (q15_t)0x9e34,
-  (q15_t)0x528f, (q15_t)0x9e30, (q15_t)0x528a, (q15_t)0x9e2c, (q15_t)0x5285, (q15_t)0x9e28, (q15_t)0x5281, (q15_t)0x9e24,
-  (q15_t)0x527c, (q15_t)0x9e20, (q15_t)0x5277, (q15_t)0x9e1c, (q15_t)0x5272, (q15_t)0x9e18, (q15_t)0x526d, (q15_t)0x9e14,
-  (q15_t)0x5269, (q15_t)0x9e0f, (q15_t)0x5264, (q15_t)0x9e0b, (q15_t)0x525f, (q15_t)0x9e07, (q15_t)0x525a, (q15_t)0x9e03,
-  (q15_t)0x5255, (q15_t)0x9dff, (q15_t)0x5251, (q15_t)0x9dfb, (q15_t)0x524c, (q15_t)0x9df7, (q15_t)0x5247, (q15_t)0x9df3,
-  (q15_t)0x5242, (q15_t)0x9def, (q15_t)0x523d, (q15_t)0x9deb, (q15_t)0x5238, (q15_t)0x9de7, (q15_t)0x5234, (q15_t)0x9de3,
-  (q15_t)0x522f, (q15_t)0x9ddf, (q15_t)0x522a, (q15_t)0x9ddb, (q15_t)0x5225, (q15_t)0x9dd7, (q15_t)0x5220, (q15_t)0x9dd3,
-  (q15_t)0x521c, (q15_t)0x9dcf, (q15_t)0x5217, (q15_t)0x9dcb, (q15_t)0x5212, (q15_t)0x9dc7, (q15_t)0x520d, (q15_t)0x9dc3,
-  (q15_t)0x5208, (q15_t)0x9dbf, (q15_t)0x5203, (q15_t)0x9dbb, (q15_t)0x51ff, (q15_t)0x9db7, (q15_t)0x51fa, (q15_t)0x9db3,
-  (q15_t)0x51f5, (q15_t)0x9daf, (q15_t)0x51f0, (q15_t)0x9dab, (q15_t)0x51eb, (q15_t)0x9da7, (q15_t)0x51e6, (q15_t)0x9da3,
-  (q15_t)0x51e2, (q15_t)0x9d9f, (q15_t)0x51dd, (q15_t)0x9d9b, (q15_t)0x51d8, (q15_t)0x9d97, (q15_t)0x51d3, (q15_t)0x9d93,
-  (q15_t)0x51ce, (q15_t)0x9d8f, (q15_t)0x51c9, (q15_t)0x9d8b, (q15_t)0x51c5, (q15_t)0x9d86, (q15_t)0x51c0, (q15_t)0x9d82,
-  (q15_t)0x51bb, (q15_t)0x9d7e, (q15_t)0x51b6, (q15_t)0x9d7a, (q15_t)0x51b1, (q15_t)0x9d76, (q15_t)0x51ac, (q15_t)0x9d72,
-  (q15_t)0x51a8, (q15_t)0x9d6e, (q15_t)0x51a3, (q15_t)0x9d6a, (q15_t)0x519e, (q15_t)0x9d66, (q15_t)0x5199, (q15_t)0x9d62,
-  (q15_t)0x5194, (q15_t)0x9d5e, (q15_t)0x518f, (q15_t)0x9d5a, (q15_t)0x518b, (q15_t)0x9d56, (q15_t)0x5186, (q15_t)0x9d52,
-  (q15_t)0x5181, (q15_t)0x9d4e, (q15_t)0x517c, (q15_t)0x9d4a, (q15_t)0x5177, (q15_t)0x9d46, (q15_t)0x5172, (q15_t)0x9d42,
-  (q15_t)0x516e, (q15_t)0x9d3e, (q15_t)0x5169, (q15_t)0x9d3a, (q15_t)0x5164, (q15_t)0x9d36, (q15_t)0x515f, (q15_t)0x9d32,
-  (q15_t)0x515a, (q15_t)0x9d2e, (q15_t)0x5155, (q15_t)0x9d2a, (q15_t)0x5150, (q15_t)0x9d26, (q15_t)0x514c, (q15_t)0x9d22,
-  (q15_t)0x5147, (q15_t)0x9d1e, (q15_t)0x5142, (q15_t)0x9d1a, (q15_t)0x513d, (q15_t)0x9d16, (q15_t)0x5138, (q15_t)0x9d12,
-  (q15_t)0x5133, (q15_t)0x9d0e, (q15_t)0x512e, (q15_t)0x9d0b, (q15_t)0x512a, (q15_t)0x9d07, (q15_t)0x5125, (q15_t)0x9d03,
-  (q15_t)0x5120, (q15_t)0x9cff, (q15_t)0x511b, (q15_t)0x9cfb, (q15_t)0x5116, (q15_t)0x9cf7, (q15_t)0x5111, (q15_t)0x9cf3,
-  (q15_t)0x510c, (q15_t)0x9cef, (q15_t)0x5108, (q15_t)0x9ceb, (q15_t)0x5103, (q15_t)0x9ce7, (q15_t)0x50fe, (q15_t)0x9ce3,
-  (q15_t)0x50f9, (q15_t)0x9cdf, (q15_t)0x50f4, (q15_t)0x9cdb, (q15_t)0x50ef, (q15_t)0x9cd7, (q15_t)0x50ea, (q15_t)0x9cd3,
-  (q15_t)0x50e5, (q15_t)0x9ccf, (q15_t)0x50e1, (q15_t)0x9ccb, (q15_t)0x50dc, (q15_t)0x9cc7, (q15_t)0x50d7, (q15_t)0x9cc3,
-  (q15_t)0x50d2, (q15_t)0x9cbf, (q15_t)0x50cd, (q15_t)0x9cbb, (q15_t)0x50c8, (q15_t)0x9cb7, (q15_t)0x50c3, (q15_t)0x9cb3,
-  (q15_t)0x50bf, (q15_t)0x9caf, (q15_t)0x50ba, (q15_t)0x9cab, (q15_t)0x50b5, (q15_t)0x9ca7, (q15_t)0x50b0, (q15_t)0x9ca3,
-  (q15_t)0x50ab, (q15_t)0x9c9f, (q15_t)0x50a6, (q15_t)0x9c9b, (q15_t)0x50a1, (q15_t)0x9c97, (q15_t)0x509c, (q15_t)0x9c93,
-  (q15_t)0x5097, (q15_t)0x9c8f, (q15_t)0x5093, (q15_t)0x9c8b, (q15_t)0x508e, (q15_t)0x9c88, (q15_t)0x5089, (q15_t)0x9c84,
-  (q15_t)0x5084, (q15_t)0x9c80, (q15_t)0x507f, (q15_t)0x9c7c, (q15_t)0x507a, (q15_t)0x9c78, (q15_t)0x5075, (q15_t)0x9c74,
-  (q15_t)0x5070, (q15_t)0x9c70, (q15_t)0x506c, (q15_t)0x9c6c, (q15_t)0x5067, (q15_t)0x9c68, (q15_t)0x5062, (q15_t)0x9c64,
-  (q15_t)0x505d, (q15_t)0x9c60, (q15_t)0x5058, (q15_t)0x9c5c, (q15_t)0x5053, (q15_t)0x9c58, (q15_t)0x504e, (q15_t)0x9c54,
-  (q15_t)0x5049, (q15_t)0x9c50, (q15_t)0x5044, (q15_t)0x9c4c, (q15_t)0x503f, (q15_t)0x9c48, (q15_t)0x503b, (q15_t)0x9c44,
-  (q15_t)0x5036, (q15_t)0x9c40, (q15_t)0x5031, (q15_t)0x9c3d, (q15_t)0x502c, (q15_t)0x9c39, (q15_t)0x5027, (q15_t)0x9c35,
-  (q15_t)0x5022, (q15_t)0x9c31, (q15_t)0x501d, (q15_t)0x9c2d, (q15_t)0x5018, (q15_t)0x9c29, (q15_t)0x5013, (q15_t)0x9c25,
-  (q15_t)0x500f, (q15_t)0x9c21, (q15_t)0x500a, (q15_t)0x9c1d, (q15_t)0x5005, (q15_t)0x9c19, (q15_t)0x5000, (q15_t)0x9c15,
-  (q15_t)0x4ffb, (q15_t)0x9c11, (q15_t)0x4ff6, (q15_t)0x9c0d, (q15_t)0x4ff1, (q15_t)0x9c09, (q15_t)0x4fec, (q15_t)0x9c06,
-  (q15_t)0x4fe7, (q15_t)0x9c02, (q15_t)0x4fe2, (q15_t)0x9bfe, (q15_t)0x4fdd, (q15_t)0x9bfa, (q15_t)0x4fd9, (q15_t)0x9bf6,
-  (q15_t)0x4fd4, (q15_t)0x9bf2, (q15_t)0x4fcf, (q15_t)0x9bee, (q15_t)0x4fca, (q15_t)0x9bea, (q15_t)0x4fc5, (q15_t)0x9be6,
-  (q15_t)0x4fc0, (q15_t)0x9be2, (q15_t)0x4fbb, (q15_t)0x9bde, (q15_t)0x4fb6, (q15_t)0x9bda, (q15_t)0x4fb1, (q15_t)0x9bd7,
-  (q15_t)0x4fac, (q15_t)0x9bd3, (q15_t)0x4fa7, (q15_t)0x9bcf, (q15_t)0x4fa2, (q15_t)0x9bcb, (q15_t)0x4f9e, (q15_t)0x9bc7,
-  (q15_t)0x4f99, (q15_t)0x9bc3, (q15_t)0x4f94, (q15_t)0x9bbf, (q15_t)0x4f8f, (q15_t)0x9bbb, (q15_t)0x4f8a, (q15_t)0x9bb7,
-  (q15_t)0x4f85, (q15_t)0x9bb3, (q15_t)0x4f80, (q15_t)0x9baf, (q15_t)0x4f7b, (q15_t)0x9bac, (q15_t)0x4f76, (q15_t)0x9ba8,
-  (q15_t)0x4f71, (q15_t)0x9ba4, (q15_t)0x4f6c, (q15_t)0x9ba0, (q15_t)0x4f67, (q15_t)0x9b9c, (q15_t)0x4f62, (q15_t)0x9b98,
-  (q15_t)0x4f5e, (q15_t)0x9b94, (q15_t)0x4f59, (q15_t)0x9b90, (q15_t)0x4f54, (q15_t)0x9b8c, (q15_t)0x4f4f, (q15_t)0x9b88,
-  (q15_t)0x4f4a, (q15_t)0x9b85, (q15_t)0x4f45, (q15_t)0x9b81, (q15_t)0x4f40, (q15_t)0x9b7d, (q15_t)0x4f3b, (q15_t)0x9b79,
-  (q15_t)0x4f36, (q15_t)0x9b75, (q15_t)0x4f31, (q15_t)0x9b71, (q15_t)0x4f2c, (q15_t)0x9b6d, (q15_t)0x4f27, (q15_t)0x9b69,
-  (q15_t)0x4f22, (q15_t)0x9b65, (q15_t)0x4f1d, (q15_t)0x9b62, (q15_t)0x4f18, (q15_t)0x9b5e, (q15_t)0x4f14, (q15_t)0x9b5a,
-  (q15_t)0x4f0f, (q15_t)0x9b56, (q15_t)0x4f0a, (q15_t)0x9b52, (q15_t)0x4f05, (q15_t)0x9b4e, (q15_t)0x4f00, (q15_t)0x9b4a,
-  (q15_t)0x4efb, (q15_t)0x9b46, (q15_t)0x4ef6, (q15_t)0x9b43, (q15_t)0x4ef1, (q15_t)0x9b3f, (q15_t)0x4eec, (q15_t)0x9b3b,
-  (q15_t)0x4ee7, (q15_t)0x9b37, (q15_t)0x4ee2, (q15_t)0x9b33, (q15_t)0x4edd, (q15_t)0x9b2f, (q15_t)0x4ed8, (q15_t)0x9b2b,
-  (q15_t)0x4ed3, (q15_t)0x9b27, (q15_t)0x4ece, (q15_t)0x9b24, (q15_t)0x4ec9, (q15_t)0x9b20, (q15_t)0x4ec4, (q15_t)0x9b1c,
-  (q15_t)0x4ebf, (q15_t)0x9b18, (q15_t)0x4eba, (q15_t)0x9b14, (q15_t)0x4eb6, (q15_t)0x9b10, (q15_t)0x4eb1, (q15_t)0x9b0c,
-  (q15_t)0x4eac, (q15_t)0x9b09, (q15_t)0x4ea7, (q15_t)0x9b05, (q15_t)0x4ea2, (q15_t)0x9b01, (q15_t)0x4e9d, (q15_t)0x9afd,
-  (q15_t)0x4e98, (q15_t)0x9af9, (q15_t)0x4e93, (q15_t)0x9af5, (q15_t)0x4e8e, (q15_t)0x9af1, (q15_t)0x4e89, (q15_t)0x9aed,
-  (q15_t)0x4e84, (q15_t)0x9aea, (q15_t)0x4e7f, (q15_t)0x9ae6, (q15_t)0x4e7a, (q15_t)0x9ae2, (q15_t)0x4e75, (q15_t)0x9ade,
-  (q15_t)0x4e70, (q15_t)0x9ada, (q15_t)0x4e6b, (q15_t)0x9ad6, (q15_t)0x4e66, (q15_t)0x9ad3, (q15_t)0x4e61, (q15_t)0x9acf,
-  (q15_t)0x4e5c, (q15_t)0x9acb, (q15_t)0x4e57, (q15_t)0x9ac7, (q15_t)0x4e52, (q15_t)0x9ac3, (q15_t)0x4e4d, (q15_t)0x9abf,
-  (q15_t)0x4e48, (q15_t)0x9abb, (q15_t)0x4e43, (q15_t)0x9ab8, (q15_t)0x4e3e, (q15_t)0x9ab4, (q15_t)0x4e39, (q15_t)0x9ab0,
-  (q15_t)0x4e34, (q15_t)0x9aac, (q15_t)0x4e2f, (q15_t)0x9aa8, (q15_t)0x4e2a, (q15_t)0x9aa4, (q15_t)0x4e26, (q15_t)0x9aa1,
-  (q15_t)0x4e21, (q15_t)0x9a9d, (q15_t)0x4e1c, (q15_t)0x9a99, (q15_t)0x4e17, (q15_t)0x9a95, (q15_t)0x4e12, (q15_t)0x9a91,
-  (q15_t)0x4e0d, (q15_t)0x9a8d, (q15_t)0x4e08, (q15_t)0x9a8a, (q15_t)0x4e03, (q15_t)0x9a86, (q15_t)0x4dfe, (q15_t)0x9a82,
-  (q15_t)0x4df9, (q15_t)0x9a7e, (q15_t)0x4df4, (q15_t)0x9a7a, (q15_t)0x4def, (q15_t)0x9a76, (q15_t)0x4dea, (q15_t)0x9a73,
-  (q15_t)0x4de5, (q15_t)0x9a6f, (q15_t)0x4de0, (q15_t)0x9a6b, (q15_t)0x4ddb, (q15_t)0x9a67, (q15_t)0x4dd6, (q15_t)0x9a63,
-  (q15_t)0x4dd1, (q15_t)0x9a60, (q15_t)0x4dcc, (q15_t)0x9a5c, (q15_t)0x4dc7, (q15_t)0x9a58, (q15_t)0x4dc2, (q15_t)0x9a54,
-  (q15_t)0x4dbd, (q15_t)0x9a50, (q15_t)0x4db8, (q15_t)0x9a4c, (q15_t)0x4db3, (q15_t)0x9a49, (q15_t)0x4dae, (q15_t)0x9a45,
-  (q15_t)0x4da9, (q15_t)0x9a41, (q15_t)0x4da4, (q15_t)0x9a3d, (q15_t)0x4d9f, (q15_t)0x9a39, (q15_t)0x4d9a, (q15_t)0x9a36,
-  (q15_t)0x4d95, (q15_t)0x9a32, (q15_t)0x4d90, (q15_t)0x9a2e, (q15_t)0x4d8b, (q15_t)0x9a2a, (q15_t)0x4d86, (q15_t)0x9a26,
-  (q15_t)0x4d81, (q15_t)0x9a23, (q15_t)0x4d7c, (q15_t)0x9a1f, (q15_t)0x4d77, (q15_t)0x9a1b, (q15_t)0x4d72, (q15_t)0x9a17,
-  (q15_t)0x4d6d, (q15_t)0x9a13, (q15_t)0x4d68, (q15_t)0x9a10, (q15_t)0x4d63, (q15_t)0x9a0c, (q15_t)0x4d5e, (q15_t)0x9a08,
-  (q15_t)0x4d59, (q15_t)0x9a04, (q15_t)0x4d54, (q15_t)0x9a00, (q15_t)0x4d4f, (q15_t)0x99fd, (q15_t)0x4d4a, (q15_t)0x99f9,
-  (q15_t)0x4d45, (q15_t)0x99f5, (q15_t)0x4d40, (q15_t)0x99f1, (q15_t)0x4d3b, (q15_t)0x99ed, (q15_t)0x4d36, (q15_t)0x99ea,
-  (q15_t)0x4d31, (q15_t)0x99e6, (q15_t)0x4d2c, (q15_t)0x99e2, (q15_t)0x4d27, (q15_t)0x99de, (q15_t)0x4d22, (q15_t)0x99da,
-  (q15_t)0x4d1d, (q15_t)0x99d7, (q15_t)0x4d18, (q15_t)0x99d3, (q15_t)0x4d13, (q15_t)0x99cf, (q15_t)0x4d0e, (q15_t)0x99cb,
-  (q15_t)0x4d09, (q15_t)0x99c7, (q15_t)0x4d04, (q15_t)0x99c4, (q15_t)0x4cff, (q15_t)0x99c0, (q15_t)0x4cfa, (q15_t)0x99bc,
-  (q15_t)0x4cf5, (q15_t)0x99b8, (q15_t)0x4cf0, (q15_t)0x99b5, (q15_t)0x4ceb, (q15_t)0x99b1, (q15_t)0x4ce6, (q15_t)0x99ad,
-  (q15_t)0x4ce1, (q15_t)0x99a9, (q15_t)0x4cdb, (q15_t)0x99a5, (q15_t)0x4cd6, (q15_t)0x99a2, (q15_t)0x4cd1, (q15_t)0x999e,
-  (q15_t)0x4ccc, (q15_t)0x999a, (q15_t)0x4cc7, (q15_t)0x9996, (q15_t)0x4cc2, (q15_t)0x9993, (q15_t)0x4cbd, (q15_t)0x998f,
-  (q15_t)0x4cb8, (q15_t)0x998b, (q15_t)0x4cb3, (q15_t)0x9987, (q15_t)0x4cae, (q15_t)0x9984, (q15_t)0x4ca9, (q15_t)0x9980,
-  (q15_t)0x4ca4, (q15_t)0x997c, (q15_t)0x4c9f, (q15_t)0x9978, (q15_t)0x4c9a, (q15_t)0x9975, (q15_t)0x4c95, (q15_t)0x9971,
-  (q15_t)0x4c90, (q15_t)0x996d, (q15_t)0x4c8b, (q15_t)0x9969, (q15_t)0x4c86, (q15_t)0x9965, (q15_t)0x4c81, (q15_t)0x9962,
-  (q15_t)0x4c7c, (q15_t)0x995e, (q15_t)0x4c77, (q15_t)0x995a, (q15_t)0x4c72, (q15_t)0x9956, (q15_t)0x4c6d, (q15_t)0x9953,
-  (q15_t)0x4c68, (q15_t)0x994f, (q15_t)0x4c63, (q15_t)0x994b, (q15_t)0x4c5e, (q15_t)0x9947, (q15_t)0x4c59, (q15_t)0x9944,
-  (q15_t)0x4c54, (q15_t)0x9940, (q15_t)0x4c4f, (q15_t)0x993c, (q15_t)0x4c49, (q15_t)0x9938, (q15_t)0x4c44, (q15_t)0x9935,
-  (q15_t)0x4c3f, (q15_t)0x9931, (q15_t)0x4c3a, (q15_t)0x992d, (q15_t)0x4c35, (q15_t)0x992a, (q15_t)0x4c30, (q15_t)0x9926,
-  (q15_t)0x4c2b, (q15_t)0x9922, (q15_t)0x4c26, (q15_t)0x991e, (q15_t)0x4c21, (q15_t)0x991b, (q15_t)0x4c1c, (q15_t)0x9917,
-  (q15_t)0x4c17, (q15_t)0x9913, (q15_t)0x4c12, (q15_t)0x990f, (q15_t)0x4c0d, (q15_t)0x990c, (q15_t)0x4c08, (q15_t)0x9908,
-  (q15_t)0x4c03, (q15_t)0x9904, (q15_t)0x4bfe, (q15_t)0x9900, (q15_t)0x4bf9, (q15_t)0x98fd, (q15_t)0x4bf4, (q15_t)0x98f9,
-  (q15_t)0x4bef, (q15_t)0x98f5, (q15_t)0x4be9, (q15_t)0x98f2, (q15_t)0x4be4, (q15_t)0x98ee, (q15_t)0x4bdf, (q15_t)0x98ea,
-  (q15_t)0x4bda, (q15_t)0x98e6, (q15_t)0x4bd5, (q15_t)0x98e3, (q15_t)0x4bd0, (q15_t)0x98df, (q15_t)0x4bcb, (q15_t)0x98db,
-  (q15_t)0x4bc6, (q15_t)0x98d7, (q15_t)0x4bc1, (q15_t)0x98d4, (q15_t)0x4bbc, (q15_t)0x98d0, (q15_t)0x4bb7, (q15_t)0x98cc,
-  (q15_t)0x4bb2, (q15_t)0x98c9, (q15_t)0x4bad, (q15_t)0x98c5, (q15_t)0x4ba8, (q15_t)0x98c1, (q15_t)0x4ba3, (q15_t)0x98bd,
-  (q15_t)0x4b9e, (q15_t)0x98ba, (q15_t)0x4b98, (q15_t)0x98b6, (q15_t)0x4b93, (q15_t)0x98b2, (q15_t)0x4b8e, (q15_t)0x98af,
-  (q15_t)0x4b89, (q15_t)0x98ab, (q15_t)0x4b84, (q15_t)0x98a7, (q15_t)0x4b7f, (q15_t)0x98a3, (q15_t)0x4b7a, (q15_t)0x98a0,
-  (q15_t)0x4b75, (q15_t)0x989c, (q15_t)0x4b70, (q15_t)0x9898, (q15_t)0x4b6b, (q15_t)0x9895, (q15_t)0x4b66, (q15_t)0x9891,
-  (q15_t)0x4b61, (q15_t)0x988d, (q15_t)0x4b5c, (q15_t)0x988a, (q15_t)0x4b56, (q15_t)0x9886, (q15_t)0x4b51, (q15_t)0x9882,
-  (q15_t)0x4b4c, (q15_t)0x987e, (q15_t)0x4b47, (q15_t)0x987b, (q15_t)0x4b42, (q15_t)0x9877, (q15_t)0x4b3d, (q15_t)0x9873,
-  (q15_t)0x4b38, (q15_t)0x9870, (q15_t)0x4b33, (q15_t)0x986c, (q15_t)0x4b2e, (q15_t)0x9868, (q15_t)0x4b29, (q15_t)0x9865,
-  (q15_t)0x4b24, (q15_t)0x9861, (q15_t)0x4b1f, (q15_t)0x985d, (q15_t)0x4b19, (q15_t)0x985a, (q15_t)0x4b14, (q15_t)0x9856,
-  (q15_t)0x4b0f, (q15_t)0x9852, (q15_t)0x4b0a, (q15_t)0x984e, (q15_t)0x4b05, (q15_t)0x984b, (q15_t)0x4b00, (q15_t)0x9847,
-  (q15_t)0x4afb, (q15_t)0x9843, (q15_t)0x4af6, (q15_t)0x9840, (q15_t)0x4af1, (q15_t)0x983c, (q15_t)0x4aec, (q15_t)0x9838,
-  (q15_t)0x4ae7, (q15_t)0x9835, (q15_t)0x4ae1, (q15_t)0x9831, (q15_t)0x4adc, (q15_t)0x982d, (q15_t)0x4ad7, (q15_t)0x982a,
-  (q15_t)0x4ad2, (q15_t)0x9826, (q15_t)0x4acd, (q15_t)0x9822, (q15_t)0x4ac8, (q15_t)0x981f, (q15_t)0x4ac3, (q15_t)0x981b,
-  (q15_t)0x4abe, (q15_t)0x9817, (q15_t)0x4ab9, (q15_t)0x9814, (q15_t)0x4ab4, (q15_t)0x9810, (q15_t)0x4aae, (q15_t)0x980c,
-  (q15_t)0x4aa9, (q15_t)0x9809, (q15_t)0x4aa4, (q15_t)0x9805, (q15_t)0x4a9f, (q15_t)0x9801, (q15_t)0x4a9a, (q15_t)0x97fe,
-  (q15_t)0x4a95, (q15_t)0x97fa, (q15_t)0x4a90, (q15_t)0x97f6, (q15_t)0x4a8b, (q15_t)0x97f3, (q15_t)0x4a86, (q15_t)0x97ef,
-  (q15_t)0x4a81, (q15_t)0x97eb, (q15_t)0x4a7b, (q15_t)0x97e8, (q15_t)0x4a76, (q15_t)0x97e4, (q15_t)0x4a71, (q15_t)0x97e0,
-  (q15_t)0x4a6c, (q15_t)0x97dd, (q15_t)0x4a67, (q15_t)0x97d9, (q15_t)0x4a62, (q15_t)0x97d5, (q15_t)0x4a5d, (q15_t)0x97d2,
-  (q15_t)0x4a58, (q15_t)0x97ce, (q15_t)0x4a52, (q15_t)0x97cb, (q15_t)0x4a4d, (q15_t)0x97c7, (q15_t)0x4a48, (q15_t)0x97c3,
-  (q15_t)0x4a43, (q15_t)0x97c0, (q15_t)0x4a3e, (q15_t)0x97bc, (q15_t)0x4a39, (q15_t)0x97b8, (q15_t)0x4a34, (q15_t)0x97b5,
-  (q15_t)0x4a2f, (q15_t)0x97b1, (q15_t)0x4a2a, (q15_t)0x97ad, (q15_t)0x4a24, (q15_t)0x97aa, (q15_t)0x4a1f, (q15_t)0x97a6,
-  (q15_t)0x4a1a, (q15_t)0x97a2, (q15_t)0x4a15, (q15_t)0x979f, (q15_t)0x4a10, (q15_t)0x979b, (q15_t)0x4a0b, (q15_t)0x9798,
-  (q15_t)0x4a06, (q15_t)0x9794, (q15_t)0x4a01, (q15_t)0x9790, (q15_t)0x49fb, (q15_t)0x978d, (q15_t)0x49f6, (q15_t)0x9789,
-  (q15_t)0x49f1, (q15_t)0x9785, (q15_t)0x49ec, (q15_t)0x9782, (q15_t)0x49e7, (q15_t)0x977e, (q15_t)0x49e2, (q15_t)0x977a,
-  (q15_t)0x49dd, (q15_t)0x9777, (q15_t)0x49d8, (q15_t)0x9773, (q15_t)0x49d2, (q15_t)0x9770, (q15_t)0x49cd, (q15_t)0x976c,
-  (q15_t)0x49c8, (q15_t)0x9768, (q15_t)0x49c3, (q15_t)0x9765, (q15_t)0x49be, (q15_t)0x9761, (q15_t)0x49b9, (q15_t)0x975d,
-  (q15_t)0x49b4, (q15_t)0x975a, (q15_t)0x49ae, (q15_t)0x9756, (q15_t)0x49a9, (q15_t)0x9753, (q15_t)0x49a4, (q15_t)0x974f,
-  (q15_t)0x499f, (q15_t)0x974b, (q15_t)0x499a, (q15_t)0x9748, (q15_t)0x4995, (q15_t)0x9744, (q15_t)0x4990, (q15_t)0x9741,
-  (q15_t)0x498a, (q15_t)0x973d, (q15_t)0x4985, (q15_t)0x9739, (q15_t)0x4980, (q15_t)0x9736, (q15_t)0x497b, (q15_t)0x9732,
-  (q15_t)0x4976, (q15_t)0x972f, (q15_t)0x4971, (q15_t)0x972b, (q15_t)0x496c, (q15_t)0x9727, (q15_t)0x4966, (q15_t)0x9724,
-  (q15_t)0x4961, (q15_t)0x9720, (q15_t)0x495c, (q15_t)0x971d, (q15_t)0x4957, (q15_t)0x9719, (q15_t)0x4952, (q15_t)0x9715,
-  (q15_t)0x494d, (q15_t)0x9712, (q15_t)0x4948, (q15_t)0x970e, (q15_t)0x4942, (q15_t)0x970b, (q15_t)0x493d, (q15_t)0x9707,
-  (q15_t)0x4938, (q15_t)0x9703, (q15_t)0x4933, (q15_t)0x9700, (q15_t)0x492e, (q15_t)0x96fc, (q15_t)0x4929, (q15_t)0x96f9,
-  (q15_t)0x4923, (q15_t)0x96f5, (q15_t)0x491e, (q15_t)0x96f1, (q15_t)0x4919, (q15_t)0x96ee, (q15_t)0x4914, (q15_t)0x96ea,
-  (q15_t)0x490f, (q15_t)0x96e7, (q15_t)0x490a, (q15_t)0x96e3, (q15_t)0x4905, (q15_t)0x96df, (q15_t)0x48ff, (q15_t)0x96dc,
-  (q15_t)0x48fa, (q15_t)0x96d8, (q15_t)0x48f5, (q15_t)0x96d5, (q15_t)0x48f0, (q15_t)0x96d1, (q15_t)0x48eb, (q15_t)0x96ce,
-  (q15_t)0x48e6, (q15_t)0x96ca, (q15_t)0x48e0, (q15_t)0x96c6, (q15_t)0x48db, (q15_t)0x96c3, (q15_t)0x48d6, (q15_t)0x96bf,
-  (q15_t)0x48d1, (q15_t)0x96bc, (q15_t)0x48cc, (q15_t)0x96b8, (q15_t)0x48c7, (q15_t)0x96b5, (q15_t)0x48c1, (q15_t)0x96b1,
-  (q15_t)0x48bc, (q15_t)0x96ad, (q15_t)0x48b7, (q15_t)0x96aa, (q15_t)0x48b2, (q15_t)0x96a6, (q15_t)0x48ad, (q15_t)0x96a3,
-  (q15_t)0x48a8, (q15_t)0x969f, (q15_t)0x48a2, (q15_t)0x969c, (q15_t)0x489d, (q15_t)0x9698, (q15_t)0x4898, (q15_t)0x9694,
-  (q15_t)0x4893, (q15_t)0x9691, (q15_t)0x488e, (q15_t)0x968d, (q15_t)0x4888, (q15_t)0x968a, (q15_t)0x4883, (q15_t)0x9686,
-  (q15_t)0x487e, (q15_t)0x9683, (q15_t)0x4879, (q15_t)0x967f, (q15_t)0x4874, (q15_t)0x967b, (q15_t)0x486f, (q15_t)0x9678,
-  (q15_t)0x4869, (q15_t)0x9674, (q15_t)0x4864, (q15_t)0x9671, (q15_t)0x485f, (q15_t)0x966d, (q15_t)0x485a, (q15_t)0x966a,
-  (q15_t)0x4855, (q15_t)0x9666, (q15_t)0x484f, (q15_t)0x9663, (q15_t)0x484a, (q15_t)0x965f, (q15_t)0x4845, (q15_t)0x965b,
-  (q15_t)0x4840, (q15_t)0x9658, (q15_t)0x483b, (q15_t)0x9654, (q15_t)0x4836, (q15_t)0x9651, (q15_t)0x4830, (q15_t)0x964d,
-  (q15_t)0x482b, (q15_t)0x964a, (q15_t)0x4826, (q15_t)0x9646, (q15_t)0x4821, (q15_t)0x9643, (q15_t)0x481c, (q15_t)0x963f,
-  (q15_t)0x4816, (q15_t)0x963c, (q15_t)0x4811, (q15_t)0x9638, (q15_t)0x480c, (q15_t)0x9635, (q15_t)0x4807, (q15_t)0x9631,
-  (q15_t)0x4802, (q15_t)0x962d, (q15_t)0x47fc, (q15_t)0x962a, (q15_t)0x47f7, (q15_t)0x9626, (q15_t)0x47f2, (q15_t)0x9623,
-  (q15_t)0x47ed, (q15_t)0x961f, (q15_t)0x47e8, (q15_t)0x961c, (q15_t)0x47e2, (q15_t)0x9618, (q15_t)0x47dd, (q15_t)0x9615,
-  (q15_t)0x47d8, (q15_t)0x9611, (q15_t)0x47d3, (q15_t)0x960e, (q15_t)0x47ce, (q15_t)0x960a, (q15_t)0x47c8, (q15_t)0x9607,
-  (q15_t)0x47c3, (q15_t)0x9603, (q15_t)0x47be, (q15_t)0x9600, (q15_t)0x47b9, (q15_t)0x95fc, (q15_t)0x47b4, (q15_t)0x95f9,
-  (q15_t)0x47ae, (q15_t)0x95f5, (q15_t)0x47a9, (q15_t)0x95f2, (q15_t)0x47a4, (q15_t)0x95ee, (q15_t)0x479f, (q15_t)0x95ea,
-  (q15_t)0x479a, (q15_t)0x95e7, (q15_t)0x4794, (q15_t)0x95e3, (q15_t)0x478f, (q15_t)0x95e0, (q15_t)0x478a, (q15_t)0x95dc,
-  (q15_t)0x4785, (q15_t)0x95d9, (q15_t)0x4780, (q15_t)0x95d5, (q15_t)0x477a, (q15_t)0x95d2, (q15_t)0x4775, (q15_t)0x95ce,
-  (q15_t)0x4770, (q15_t)0x95cb, (q15_t)0x476b, (q15_t)0x95c7, (q15_t)0x4765, (q15_t)0x95c4, (q15_t)0x4760, (q15_t)0x95c0,
-  (q15_t)0x475b, (q15_t)0x95bd, (q15_t)0x4756, (q15_t)0x95b9, (q15_t)0x4751, (q15_t)0x95b6, (q15_t)0x474b, (q15_t)0x95b2,
-  (q15_t)0x4746, (q15_t)0x95af, (q15_t)0x4741, (q15_t)0x95ab, (q15_t)0x473c, (q15_t)0x95a8, (q15_t)0x4737, (q15_t)0x95a4,
-  (q15_t)0x4731, (q15_t)0x95a1, (q15_t)0x472c, (q15_t)0x959d, (q15_t)0x4727, (q15_t)0x959a, (q15_t)0x4722, (q15_t)0x9596,
-  (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x4717, (q15_t)0x958f, (q15_t)0x4712, (q15_t)0x958c, (q15_t)0x470d, (q15_t)0x9588,
-  (q15_t)0x4708, (q15_t)0x9585, (q15_t)0x4702, (q15_t)0x9581, (q15_t)0x46fd, (q15_t)0x957e, (q15_t)0x46f8, (q15_t)0x957a,
-  (q15_t)0x46f3, (q15_t)0x9577, (q15_t)0x46ed, (q15_t)0x9574, (q15_t)0x46e8, (q15_t)0x9570, (q15_t)0x46e3, (q15_t)0x956d,
-  (q15_t)0x46de, (q15_t)0x9569, (q15_t)0x46d8, (q15_t)0x9566, (q15_t)0x46d3, (q15_t)0x9562, (q15_t)0x46ce, (q15_t)0x955f,
-  (q15_t)0x46c9, (q15_t)0x955b, (q15_t)0x46c4, (q15_t)0x9558, (q15_t)0x46be, (q15_t)0x9554, (q15_t)0x46b9, (q15_t)0x9551,
-  (q15_t)0x46b4, (q15_t)0x954d, (q15_t)0x46af, (q15_t)0x954a, (q15_t)0x46a9, (q15_t)0x9546, (q15_t)0x46a4, (q15_t)0x9543,
-  (q15_t)0x469f, (q15_t)0x953f, (q15_t)0x469a, (q15_t)0x953c, (q15_t)0x4694, (q15_t)0x9538, (q15_t)0x468f, (q15_t)0x9535,
-  (q15_t)0x468a, (q15_t)0x9532, (q15_t)0x4685, (q15_t)0x952e, (q15_t)0x467f, (q15_t)0x952b, (q15_t)0x467a, (q15_t)0x9527,
-  (q15_t)0x4675, (q15_t)0x9524, (q15_t)0x4670, (q15_t)0x9520, (q15_t)0x466a, (q15_t)0x951d, (q15_t)0x4665, (q15_t)0x9519,
-  (q15_t)0x4660, (q15_t)0x9516, (q15_t)0x465b, (q15_t)0x9512, (q15_t)0x4655, (q15_t)0x950f, (q15_t)0x4650, (q15_t)0x950c,
-  (q15_t)0x464b, (q15_t)0x9508, (q15_t)0x4646, (q15_t)0x9505, (q15_t)0x4640, (q15_t)0x9501, (q15_t)0x463b, (q15_t)0x94fe,
-  (q15_t)0x4636, (q15_t)0x94fa, (q15_t)0x4631, (q15_t)0x94f7, (q15_t)0x462b, (q15_t)0x94f3, (q15_t)0x4626, (q15_t)0x94f0,
-  (q15_t)0x4621, (q15_t)0x94ed, (q15_t)0x461c, (q15_t)0x94e9, (q15_t)0x4616, (q15_t)0x94e6, (q15_t)0x4611, (q15_t)0x94e2,
-  (q15_t)0x460c, (q15_t)0x94df, (q15_t)0x4607, (q15_t)0x94db, (q15_t)0x4601, (q15_t)0x94d8, (q15_t)0x45fc, (q15_t)0x94d4,
-  (q15_t)0x45f7, (q15_t)0x94d1, (q15_t)0x45f2, (q15_t)0x94ce, (q15_t)0x45ec, (q15_t)0x94ca, (q15_t)0x45e7, (q15_t)0x94c7,
-  (q15_t)0x45e2, (q15_t)0x94c3, (q15_t)0x45dd, (q15_t)0x94c0, (q15_t)0x45d7, (q15_t)0x94bc, (q15_t)0x45d2, (q15_t)0x94b9,
-  (q15_t)0x45cd, (q15_t)0x94b6, (q15_t)0x45c7, (q15_t)0x94b2, (q15_t)0x45c2, (q15_t)0x94af, (q15_t)0x45bd, (q15_t)0x94ab,
-  (q15_t)0x45b8, (q15_t)0x94a8, (q15_t)0x45b2, (q15_t)0x94a4, (q15_t)0x45ad, (q15_t)0x94a1, (q15_t)0x45a8, (q15_t)0x949e,
-  (q15_t)0x45a3, (q15_t)0x949a, (q15_t)0x459d, (q15_t)0x9497, (q15_t)0x4598, (q15_t)0x9493, (q15_t)0x4593, (q15_t)0x9490,
-  (q15_t)0x458d, (q15_t)0x948d, (q15_t)0x4588, (q15_t)0x9489, (q15_t)0x4583, (q15_t)0x9486, (q15_t)0x457e, (q15_t)0x9482,
-  (q15_t)0x4578, (q15_t)0x947f, (q15_t)0x4573, (q15_t)0x947b, (q15_t)0x456e, (q15_t)0x9478, (q15_t)0x4569, (q15_t)0x9475,
-  (q15_t)0x4563, (q15_t)0x9471, (q15_t)0x455e, (q15_t)0x946e, (q15_t)0x4559, (q15_t)0x946a, (q15_t)0x4553, (q15_t)0x9467,
-  (q15_t)0x454e, (q15_t)0x9464, (q15_t)0x4549, (q15_t)0x9460, (q15_t)0x4544, (q15_t)0x945d, (q15_t)0x453e, (q15_t)0x9459,
-  (q15_t)0x4539, (q15_t)0x9456, (q15_t)0x4534, (q15_t)0x9453, (q15_t)0x452e, (q15_t)0x944f, (q15_t)0x4529, (q15_t)0x944c,
-  (q15_t)0x4524, (q15_t)0x9448, (q15_t)0x451f, (q15_t)0x9445, (q15_t)0x4519, (q15_t)0x9442, (q15_t)0x4514, (q15_t)0x943e,
-  (q15_t)0x450f, (q15_t)0x943b, (q15_t)0x4509, (q15_t)0x9437, (q15_t)0x4504, (q15_t)0x9434, (q15_t)0x44ff, (q15_t)0x9431,
-  (q15_t)0x44fa, (q15_t)0x942d, (q15_t)0x44f4, (q15_t)0x942a, (q15_t)0x44ef, (q15_t)0x9427, (q15_t)0x44ea, (q15_t)0x9423,
-  (q15_t)0x44e4, (q15_t)0x9420, (q15_t)0x44df, (q15_t)0x941c, (q15_t)0x44da, (q15_t)0x9419, (q15_t)0x44d4, (q15_t)0x9416,
-  (q15_t)0x44cf, (q15_t)0x9412, (q15_t)0x44ca, (q15_t)0x940f, (q15_t)0x44c5, (q15_t)0x940b, (q15_t)0x44bf, (q15_t)0x9408,
-  (q15_t)0x44ba, (q15_t)0x9405, (q15_t)0x44b5, (q15_t)0x9401, (q15_t)0x44af, (q15_t)0x93fe, (q15_t)0x44aa, (q15_t)0x93fb,
-  (q15_t)0x44a5, (q15_t)0x93f7, (q15_t)0x449f, (q15_t)0x93f4, (q15_t)0x449a, (q15_t)0x93f1, (q15_t)0x4495, (q15_t)0x93ed,
-  (q15_t)0x4490, (q15_t)0x93ea, (q15_t)0x448a, (q15_t)0x93e6, (q15_t)0x4485, (q15_t)0x93e3, (q15_t)0x4480, (q15_t)0x93e0,
-  (q15_t)0x447a, (q15_t)0x93dc, (q15_t)0x4475, (q15_t)0x93d9, (q15_t)0x4470, (q15_t)0x93d6, (q15_t)0x446a, (q15_t)0x93d2,
-  (q15_t)0x4465, (q15_t)0x93cf, (q15_t)0x4460, (q15_t)0x93cc, (q15_t)0x445a, (q15_t)0x93c8, (q15_t)0x4455, (q15_t)0x93c5,
-  (q15_t)0x4450, (q15_t)0x93c1, (q15_t)0x444b, (q15_t)0x93be, (q15_t)0x4445, (q15_t)0x93bb, (q15_t)0x4440, (q15_t)0x93b7,
-  (q15_t)0x443b, (q15_t)0x93b4, (q15_t)0x4435, (q15_t)0x93b1, (q15_t)0x4430, (q15_t)0x93ad, (q15_t)0x442b, (q15_t)0x93aa,
-  (q15_t)0x4425, (q15_t)0x93a7, (q15_t)0x4420, (q15_t)0x93a3, (q15_t)0x441b, (q15_t)0x93a0, (q15_t)0x4415, (q15_t)0x939d,
-  (q15_t)0x4410, (q15_t)0x9399, (q15_t)0x440b, (q15_t)0x9396, (q15_t)0x4405, (q15_t)0x9393, (q15_t)0x4400, (q15_t)0x938f,
-  (q15_t)0x43fb, (q15_t)0x938c, (q15_t)0x43f5, (q15_t)0x9389, (q15_t)0x43f0, (q15_t)0x9385, (q15_t)0x43eb, (q15_t)0x9382,
-  (q15_t)0x43e5, (q15_t)0x937f, (q15_t)0x43e0, (q15_t)0x937b, (q15_t)0x43db, (q15_t)0x9378, (q15_t)0x43d5, (q15_t)0x9375,
-  (q15_t)0x43d0, (q15_t)0x9371, (q15_t)0x43cb, (q15_t)0x936e, (q15_t)0x43c5, (q15_t)0x936b, (q15_t)0x43c0, (q15_t)0x9367,
-  (q15_t)0x43bb, (q15_t)0x9364, (q15_t)0x43b5, (q15_t)0x9361, (q15_t)0x43b0, (q15_t)0x935d, (q15_t)0x43ab, (q15_t)0x935a,
-  (q15_t)0x43a5, (q15_t)0x9357, (q15_t)0x43a0, (q15_t)0x9353, (q15_t)0x439b, (q15_t)0x9350, (q15_t)0x4395, (q15_t)0x934d,
-  (q15_t)0x4390, (q15_t)0x9349, (q15_t)0x438b, (q15_t)0x9346, (q15_t)0x4385, (q15_t)0x9343, (q15_t)0x4380, (q15_t)0x933f,
-  (q15_t)0x437b, (q15_t)0x933c, (q15_t)0x4375, (q15_t)0x9339, (q15_t)0x4370, (q15_t)0x9336, (q15_t)0x436b, (q15_t)0x9332,
-  (q15_t)0x4365, (q15_t)0x932f, (q15_t)0x4360, (q15_t)0x932c, (q15_t)0x435b, (q15_t)0x9328, (q15_t)0x4355, (q15_t)0x9325,
-  (q15_t)0x4350, (q15_t)0x9322, (q15_t)0x434b, (q15_t)0x931e, (q15_t)0x4345, (q15_t)0x931b, (q15_t)0x4340, (q15_t)0x9318,
-  (q15_t)0x433b, (q15_t)0x9314, (q15_t)0x4335, (q15_t)0x9311, (q15_t)0x4330, (q15_t)0x930e, (q15_t)0x432b, (q15_t)0x930b,
-  (q15_t)0x4325, (q15_t)0x9307, (q15_t)0x4320, (q15_t)0x9304, (q15_t)0x431b, (q15_t)0x9301, (q15_t)0x4315, (q15_t)0x92fd,
-  (q15_t)0x4310, (q15_t)0x92fa, (q15_t)0x430b, (q15_t)0x92f7, (q15_t)0x4305, (q15_t)0x92f4, (q15_t)0x4300, (q15_t)0x92f0,
-  (q15_t)0x42fa, (q15_t)0x92ed, (q15_t)0x42f5, (q15_t)0x92ea, (q15_t)0x42f0, (q15_t)0x92e6, (q15_t)0x42ea, (q15_t)0x92e3,
-  (q15_t)0x42e5, (q15_t)0x92e0, (q15_t)0x42e0, (q15_t)0x92dd, (q15_t)0x42da, (q15_t)0x92d9, (q15_t)0x42d5, (q15_t)0x92d6,
-  (q15_t)0x42d0, (q15_t)0x92d3, (q15_t)0x42ca, (q15_t)0x92cf, (q15_t)0x42c5, (q15_t)0x92cc, (q15_t)0x42c0, (q15_t)0x92c9,
-  (q15_t)0x42ba, (q15_t)0x92c6, (q15_t)0x42b5, (q15_t)0x92c2, (q15_t)0x42af, (q15_t)0x92bf, (q15_t)0x42aa, (q15_t)0x92bc,
-  (q15_t)0x42a5, (q15_t)0x92b8, (q15_t)0x429f, (q15_t)0x92b5, (q15_t)0x429a, (q15_t)0x92b2, (q15_t)0x4295, (q15_t)0x92af,
-  (q15_t)0x428f, (q15_t)0x92ab, (q15_t)0x428a, (q15_t)0x92a8, (q15_t)0x4284, (q15_t)0x92a5, (q15_t)0x427f, (q15_t)0x92a2,
-  (q15_t)0x427a, (q15_t)0x929e, (q15_t)0x4274, (q15_t)0x929b, (q15_t)0x426f, (q15_t)0x9298, (q15_t)0x426a, (q15_t)0x9295,
-  (q15_t)0x4264, (q15_t)0x9291, (q15_t)0x425f, (q15_t)0x928e, (q15_t)0x425a, (q15_t)0x928b, (q15_t)0x4254, (q15_t)0x9288,
-  (q15_t)0x424f, (q15_t)0x9284, (q15_t)0x4249, (q15_t)0x9281, (q15_t)0x4244, (q15_t)0x927e, (q15_t)0x423f, (q15_t)0x927b,
-  (q15_t)0x4239, (q15_t)0x9277, (q15_t)0x4234, (q15_t)0x9274, (q15_t)0x422f, (q15_t)0x9271, (q15_t)0x4229, (q15_t)0x926e,
-  (q15_t)0x4224, (q15_t)0x926a, (q15_t)0x421e, (q15_t)0x9267, (q15_t)0x4219, (q15_t)0x9264, (q15_t)0x4214, (q15_t)0x9261,
-  (q15_t)0x420e, (q15_t)0x925d, (q15_t)0x4209, (q15_t)0x925a, (q15_t)0x4203, (q15_t)0x9257, (q15_t)0x41fe, (q15_t)0x9254,
-  (q15_t)0x41f9, (q15_t)0x9250, (q15_t)0x41f3, (q15_t)0x924d, (q15_t)0x41ee, (q15_t)0x924a, (q15_t)0x41e9, (q15_t)0x9247,
-  (q15_t)0x41e3, (q15_t)0x9243, (q15_t)0x41de, (q15_t)0x9240, (q15_t)0x41d8, (q15_t)0x923d, (q15_t)0x41d3, (q15_t)0x923a,
-  (q15_t)0x41ce, (q15_t)0x9236, (q15_t)0x41c8, (q15_t)0x9233, (q15_t)0x41c3, (q15_t)0x9230, (q15_t)0x41bd, (q15_t)0x922d,
-  (q15_t)0x41b8, (q15_t)0x922a, (q15_t)0x41b3, (q15_t)0x9226, (q15_t)0x41ad, (q15_t)0x9223, (q15_t)0x41a8, (q15_t)0x9220,
-  (q15_t)0x41a2, (q15_t)0x921d, (q15_t)0x419d, (q15_t)0x9219, (q15_t)0x4198, (q15_t)0x9216, (q15_t)0x4192, (q15_t)0x9213,
-  (q15_t)0x418d, (q15_t)0x9210, (q15_t)0x4188, (q15_t)0x920d, (q15_t)0x4182, (q15_t)0x9209, (q15_t)0x417d, (q15_t)0x9206,
-  (q15_t)0x4177, (q15_t)0x9203, (q15_t)0x4172, (q15_t)0x9200, (q15_t)0x416d, (q15_t)0x91fc, (q15_t)0x4167, (q15_t)0x91f9,
-  (q15_t)0x4162, (q15_t)0x91f6, (q15_t)0x415c, (q15_t)0x91f3, (q15_t)0x4157, (q15_t)0x91f0, (q15_t)0x4152, (q15_t)0x91ec,
-  (q15_t)0x414c, (q15_t)0x91e9, (q15_t)0x4147, (q15_t)0x91e6, (q15_t)0x4141, (q15_t)0x91e3, (q15_t)0x413c, (q15_t)0x91e0,
-  (q15_t)0x4136, (q15_t)0x91dc, (q15_t)0x4131, (q15_t)0x91d9, (q15_t)0x412c, (q15_t)0x91d6, (q15_t)0x4126, (q15_t)0x91d3,
-  (q15_t)0x4121, (q15_t)0x91d0, (q15_t)0x411b, (q15_t)0x91cc, (q15_t)0x4116, (q15_t)0x91c9, (q15_t)0x4111, (q15_t)0x91c6,
-  (q15_t)0x410b, (q15_t)0x91c3, (q15_t)0x4106, (q15_t)0x91c0, (q15_t)0x4100, (q15_t)0x91bc, (q15_t)0x40fb, (q15_t)0x91b9,
-  (q15_t)0x40f6, (q15_t)0x91b6, (q15_t)0x40f0, (q15_t)0x91b3, (q15_t)0x40eb, (q15_t)0x91b0, (q15_t)0x40e5, (q15_t)0x91ad,
-  (q15_t)0x40e0, (q15_t)0x91a9, (q15_t)0x40da, (q15_t)0x91a6, (q15_t)0x40d5, (q15_t)0x91a3, (q15_t)0x40d0, (q15_t)0x91a0,
-  (q15_t)0x40ca, (q15_t)0x919d, (q15_t)0x40c5, (q15_t)0x9199, (q15_t)0x40bf, (q15_t)0x9196, (q15_t)0x40ba, (q15_t)0x9193,
-  (q15_t)0x40b5, (q15_t)0x9190, (q15_t)0x40af, (q15_t)0x918d, (q15_t)0x40aa, (q15_t)0x918a, (q15_t)0x40a4, (q15_t)0x9186,
-  (q15_t)0x409f, (q15_t)0x9183, (q15_t)0x4099, (q15_t)0x9180, (q15_t)0x4094, (q15_t)0x917d, (q15_t)0x408f, (q15_t)0x917a,
-  (q15_t)0x4089, (q15_t)0x9177, (q15_t)0x4084, (q15_t)0x9173, (q15_t)0x407e, (q15_t)0x9170, (q15_t)0x4079, (q15_t)0x916d,
-  (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x406e, (q15_t)0x9167, (q15_t)0x4069, (q15_t)0x9164, (q15_t)0x4063, (q15_t)0x9160,
-  (q15_t)0x405e, (q15_t)0x915d, (q15_t)0x4058, (q15_t)0x915a, (q15_t)0x4053, (q15_t)0x9157, (q15_t)0x404d, (q15_t)0x9154,
-  (q15_t)0x4048, (q15_t)0x9151, (q15_t)0x4043, (q15_t)0x914d, (q15_t)0x403d, (q15_t)0x914a, (q15_t)0x4038, (q15_t)0x9147,
-  (q15_t)0x4032, (q15_t)0x9144, (q15_t)0x402d, (q15_t)0x9141, (q15_t)0x4027, (q15_t)0x913e, (q15_t)0x4022, (q15_t)0x913a,
-  (q15_t)0x401d, (q15_t)0x9137, (q15_t)0x4017, (q15_t)0x9134, (q15_t)0x4012, (q15_t)0x9131, (q15_t)0x400c, (q15_t)0x912e,
-  (q15_t)0x4007, (q15_t)0x912b, (q15_t)0x4001, (q15_t)0x9128, (q15_t)0x3ffc, (q15_t)0x9124, (q15_t)0x3ff6, (q15_t)0x9121,
-  (q15_t)0x3ff1, (q15_t)0x911e, (q15_t)0x3fec, (q15_t)0x911b, (q15_t)0x3fe6, (q15_t)0x9118, (q15_t)0x3fe1, (q15_t)0x9115,
-  (q15_t)0x3fdb, (q15_t)0x9112, (q15_t)0x3fd6, (q15_t)0x910f, (q15_t)0x3fd0, (q15_t)0x910b, (q15_t)0x3fcb, (q15_t)0x9108,
-  (q15_t)0x3fc5, (q15_t)0x9105, (q15_t)0x3fc0, (q15_t)0x9102, (q15_t)0x3fbb, (q15_t)0x90ff, (q15_t)0x3fb5, (q15_t)0x90fc,
-  (q15_t)0x3fb0, (q15_t)0x90f9, (q15_t)0x3faa, (q15_t)0x90f5, (q15_t)0x3fa5, (q15_t)0x90f2, (q15_t)0x3f9f, (q15_t)0x90ef,
-  (q15_t)0x3f9a, (q15_t)0x90ec, (q15_t)0x3f94, (q15_t)0x90e9, (q15_t)0x3f8f, (q15_t)0x90e6, (q15_t)0x3f89, (q15_t)0x90e3,
-  (q15_t)0x3f84, (q15_t)0x90e0, (q15_t)0x3f7f, (q15_t)0x90dd, (q15_t)0x3f79, (q15_t)0x90d9, (q15_t)0x3f74, (q15_t)0x90d6,
-  (q15_t)0x3f6e, (q15_t)0x90d3, (q15_t)0x3f69, (q15_t)0x90d0, (q15_t)0x3f63, (q15_t)0x90cd, (q15_t)0x3f5e, (q15_t)0x90ca,
-  (q15_t)0x3f58, (q15_t)0x90c7, (q15_t)0x3f53, (q15_t)0x90c4, (q15_t)0x3f4d, (q15_t)0x90c1, (q15_t)0x3f48, (q15_t)0x90bd,
-  (q15_t)0x3f43, (q15_t)0x90ba, (q15_t)0x3f3d, (q15_t)0x90b7, (q15_t)0x3f38, (q15_t)0x90b4, (q15_t)0x3f32, (q15_t)0x90b1,
-  (q15_t)0x3f2d, (q15_t)0x90ae, (q15_t)0x3f27, (q15_t)0x90ab, (q15_t)0x3f22, (q15_t)0x90a8, (q15_t)0x3f1c, (q15_t)0x90a5,
-  (q15_t)0x3f17, (q15_t)0x90a1, (q15_t)0x3f11, (q15_t)0x909e, (q15_t)0x3f0c, (q15_t)0x909b, (q15_t)0x3f06, (q15_t)0x9098,
-  (q15_t)0x3f01, (q15_t)0x9095, (q15_t)0x3efb, (q15_t)0x9092, (q15_t)0x3ef6, (q15_t)0x908f, (q15_t)0x3ef1, (q15_t)0x908c,
-  (q15_t)0x3eeb, (q15_t)0x9089, (q15_t)0x3ee6, (q15_t)0x9086, (q15_t)0x3ee0, (q15_t)0x9083, (q15_t)0x3edb, (q15_t)0x907f,
-  (q15_t)0x3ed5, (q15_t)0x907c, (q15_t)0x3ed0, (q15_t)0x9079, (q15_t)0x3eca, (q15_t)0x9076, (q15_t)0x3ec5, (q15_t)0x9073,
-  (q15_t)0x3ebf, (q15_t)0x9070, (q15_t)0x3eba, (q15_t)0x906d, (q15_t)0x3eb4, (q15_t)0x906a, (q15_t)0x3eaf, (q15_t)0x9067,
-  (q15_t)0x3ea9, (q15_t)0x9064, (q15_t)0x3ea4, (q15_t)0x9061, (q15_t)0x3e9e, (q15_t)0x905e, (q15_t)0x3e99, (q15_t)0x905b,
-  (q15_t)0x3e93, (q15_t)0x9057, (q15_t)0x3e8e, (q15_t)0x9054, (q15_t)0x3e88, (q15_t)0x9051, (q15_t)0x3e83, (q15_t)0x904e,
-  (q15_t)0x3e7d, (q15_t)0x904b, (q15_t)0x3e78, (q15_t)0x9048, (q15_t)0x3e73, (q15_t)0x9045, (q15_t)0x3e6d, (q15_t)0x9042,
-  (q15_t)0x3e68, (q15_t)0x903f, (q15_t)0x3e62, (q15_t)0x903c, (q15_t)0x3e5d, (q15_t)0x9039, (q15_t)0x3e57, (q15_t)0x9036,
-  (q15_t)0x3e52, (q15_t)0x9033, (q15_t)0x3e4c, (q15_t)0x9030, (q15_t)0x3e47, (q15_t)0x902d, (q15_t)0x3e41, (q15_t)0x902a,
-  (q15_t)0x3e3c, (q15_t)0x9026, (q15_t)0x3e36, (q15_t)0x9023, (q15_t)0x3e31, (q15_t)0x9020, (q15_t)0x3e2b, (q15_t)0x901d,
-  (q15_t)0x3e26, (q15_t)0x901a, (q15_t)0x3e20, (q15_t)0x9017, (q15_t)0x3e1b, (q15_t)0x9014, (q15_t)0x3e15, (q15_t)0x9011,
-  (q15_t)0x3e10, (q15_t)0x900e, (q15_t)0x3e0a, (q15_t)0x900b, (q15_t)0x3e05, (q15_t)0x9008, (q15_t)0x3dff, (q15_t)0x9005,
-  (q15_t)0x3dfa, (q15_t)0x9002, (q15_t)0x3df4, (q15_t)0x8fff, (q15_t)0x3def, (q15_t)0x8ffc, (q15_t)0x3de9, (q15_t)0x8ff9,
-  (q15_t)0x3de4, (q15_t)0x8ff6, (q15_t)0x3dde, (q15_t)0x8ff3, (q15_t)0x3dd9, (q15_t)0x8ff0, (q15_t)0x3dd3, (q15_t)0x8fed,
-  (q15_t)0x3dce, (q15_t)0x8fea, (q15_t)0x3dc8, (q15_t)0x8fe7, (q15_t)0x3dc3, (q15_t)0x8fe3, (q15_t)0x3dbd, (q15_t)0x8fe0,
-  (q15_t)0x3db8, (q15_t)0x8fdd, (q15_t)0x3db2, (q15_t)0x8fda, (q15_t)0x3dad, (q15_t)0x8fd7, (q15_t)0x3da7, (q15_t)0x8fd4,
-  (q15_t)0x3da2, (q15_t)0x8fd1, (q15_t)0x3d9c, (q15_t)0x8fce, (q15_t)0x3d97, (q15_t)0x8fcb, (q15_t)0x3d91, (q15_t)0x8fc8,
-  (q15_t)0x3d8c, (q15_t)0x8fc5, (q15_t)0x3d86, (q15_t)0x8fc2, (q15_t)0x3d81, (q15_t)0x8fbf, (q15_t)0x3d7b, (q15_t)0x8fbc,
-  (q15_t)0x3d76, (q15_t)0x8fb9, (q15_t)0x3d70, (q15_t)0x8fb6, (q15_t)0x3d6b, (q15_t)0x8fb3, (q15_t)0x3d65, (q15_t)0x8fb0,
-  (q15_t)0x3d60, (q15_t)0x8fad, (q15_t)0x3d5a, (q15_t)0x8faa, (q15_t)0x3d55, (q15_t)0x8fa7, (q15_t)0x3d4f, (q15_t)0x8fa4,
-  (q15_t)0x3d49, (q15_t)0x8fa1, (q15_t)0x3d44, (q15_t)0x8f9e, (q15_t)0x3d3e, (q15_t)0x8f9b, (q15_t)0x3d39, (q15_t)0x8f98,
-  (q15_t)0x3d33, (q15_t)0x8f95, (q15_t)0x3d2e, (q15_t)0x8f92, (q15_t)0x3d28, (q15_t)0x8f8f, (q15_t)0x3d23, (q15_t)0x8f8c,
-  (q15_t)0x3d1d, (q15_t)0x8f89, (q15_t)0x3d18, (q15_t)0x8f86, (q15_t)0x3d12, (q15_t)0x8f83, (q15_t)0x3d0d, (q15_t)0x8f80,
-  (q15_t)0x3d07, (q15_t)0x8f7d, (q15_t)0x3d02, (q15_t)0x8f7a, (q15_t)0x3cfc, (q15_t)0x8f77, (q15_t)0x3cf7, (q15_t)0x8f74,
-  (q15_t)0x3cf1, (q15_t)0x8f71, (q15_t)0x3cec, (q15_t)0x8f6e, (q15_t)0x3ce6, (q15_t)0x8f6b, (q15_t)0x3ce1, (q15_t)0x8f68,
-  (q15_t)0x3cdb, (q15_t)0x8f65, (q15_t)0x3cd6, (q15_t)0x8f62, (q15_t)0x3cd0, (q15_t)0x8f5f, (q15_t)0x3cca, (q15_t)0x8f5c,
-  (q15_t)0x3cc5, (q15_t)0x8f59, (q15_t)0x3cbf, (q15_t)0x8f56, (q15_t)0x3cba, (q15_t)0x8f53, (q15_t)0x3cb4, (q15_t)0x8f50,
-  (q15_t)0x3caf, (q15_t)0x8f4d, (q15_t)0x3ca9, (q15_t)0x8f4a, (q15_t)0x3ca4, (q15_t)0x8f47, (q15_t)0x3c9e, (q15_t)0x8f44,
-  (q15_t)0x3c99, (q15_t)0x8f41, (q15_t)0x3c93, (q15_t)0x8f3e, (q15_t)0x3c8e, (q15_t)0x8f3b, (q15_t)0x3c88, (q15_t)0x8f38,
-  (q15_t)0x3c83, (q15_t)0x8f35, (q15_t)0x3c7d, (q15_t)0x8f32, (q15_t)0x3c77, (q15_t)0x8f2f, (q15_t)0x3c72, (q15_t)0x8f2d,
-  (q15_t)0x3c6c, (q15_t)0x8f2a, (q15_t)0x3c67, (q15_t)0x8f27, (q15_t)0x3c61, (q15_t)0x8f24, (q15_t)0x3c5c, (q15_t)0x8f21,
-  (q15_t)0x3c56, (q15_t)0x8f1e, (q15_t)0x3c51, (q15_t)0x8f1b, (q15_t)0x3c4b, (q15_t)0x8f18, (q15_t)0x3c46, (q15_t)0x8f15,
-  (q15_t)0x3c40, (q15_t)0x8f12, (q15_t)0x3c3b, (q15_t)0x8f0f, (q15_t)0x3c35, (q15_t)0x8f0c, (q15_t)0x3c2f, (q15_t)0x8f09,
-  (q15_t)0x3c2a, (q15_t)0x8f06, (q15_t)0x3c24, (q15_t)0x8f03, (q15_t)0x3c1f, (q15_t)0x8f00, (q15_t)0x3c19, (q15_t)0x8efd,
-  (q15_t)0x3c14, (q15_t)0x8efa, (q15_t)0x3c0e, (q15_t)0x8ef7, (q15_t)0x3c09, (q15_t)0x8ef4, (q15_t)0x3c03, (q15_t)0x8ef1,
-  (q15_t)0x3bfd, (q15_t)0x8eee, (q15_t)0x3bf8, (q15_t)0x8eec, (q15_t)0x3bf2, (q15_t)0x8ee9, (q15_t)0x3bed, (q15_t)0x8ee6,
-  (q15_t)0x3be7, (q15_t)0x8ee3, (q15_t)0x3be2, (q15_t)0x8ee0, (q15_t)0x3bdc, (q15_t)0x8edd, (q15_t)0x3bd7, (q15_t)0x8eda,
-  (q15_t)0x3bd1, (q15_t)0x8ed7, (q15_t)0x3bcc, (q15_t)0x8ed4, (q15_t)0x3bc6, (q15_t)0x8ed1, (q15_t)0x3bc0, (q15_t)0x8ece,
-  (q15_t)0x3bbb, (q15_t)0x8ecb, (q15_t)0x3bb5, (q15_t)0x8ec8, (q15_t)0x3bb0, (q15_t)0x8ec5, (q15_t)0x3baa, (q15_t)0x8ec2,
-  (q15_t)0x3ba5, (q15_t)0x8ebf, (q15_t)0x3b9f, (q15_t)0x8ebd, (q15_t)0x3b99, (q15_t)0x8eba, (q15_t)0x3b94, (q15_t)0x8eb7,
-  (q15_t)0x3b8e, (q15_t)0x8eb4, (q15_t)0x3b89, (q15_t)0x8eb1, (q15_t)0x3b83, (q15_t)0x8eae, (q15_t)0x3b7e, (q15_t)0x8eab,
-  (q15_t)0x3b78, (q15_t)0x8ea8, (q15_t)0x3b73, (q15_t)0x8ea5, (q15_t)0x3b6d, (q15_t)0x8ea2, (q15_t)0x3b67, (q15_t)0x8e9f,
-  (q15_t)0x3b62, (q15_t)0x8e9c, (q15_t)0x3b5c, (q15_t)0x8e99, (q15_t)0x3b57, (q15_t)0x8e97, (q15_t)0x3b51, (q15_t)0x8e94,
-  (q15_t)0x3b4c, (q15_t)0x8e91, (q15_t)0x3b46, (q15_t)0x8e8e, (q15_t)0x3b40, (q15_t)0x8e8b, (q15_t)0x3b3b, (q15_t)0x8e88,
-  (q15_t)0x3b35, (q15_t)0x8e85, (q15_t)0x3b30, (q15_t)0x8e82, (q15_t)0x3b2a, (q15_t)0x8e7f, (q15_t)0x3b25, (q15_t)0x8e7c,
-  (q15_t)0x3b1f, (q15_t)0x8e7a, (q15_t)0x3b19, (q15_t)0x8e77, (q15_t)0x3b14, (q15_t)0x8e74, (q15_t)0x3b0e, (q15_t)0x8e71,
-  (q15_t)0x3b09, (q15_t)0x8e6e, (q15_t)0x3b03, (q15_t)0x8e6b, (q15_t)0x3afe, (q15_t)0x8e68, (q15_t)0x3af8, (q15_t)0x8e65,
-  (q15_t)0x3af2, (q15_t)0x8e62, (q15_t)0x3aed, (q15_t)0x8e5f, (q15_t)0x3ae7, (q15_t)0x8e5d, (q15_t)0x3ae2, (q15_t)0x8e5a,
-  (q15_t)0x3adc, (q15_t)0x8e57, (q15_t)0x3ad7, (q15_t)0x8e54, (q15_t)0x3ad1, (q15_t)0x8e51, (q15_t)0x3acb, (q15_t)0x8e4e,
-  (q15_t)0x3ac6, (q15_t)0x8e4b, (q15_t)0x3ac0, (q15_t)0x8e48, (q15_t)0x3abb, (q15_t)0x8e45, (q15_t)0x3ab5, (q15_t)0x8e43,
-  (q15_t)0x3aaf, (q15_t)0x8e40, (q15_t)0x3aaa, (q15_t)0x8e3d, (q15_t)0x3aa4, (q15_t)0x8e3a, (q15_t)0x3a9f, (q15_t)0x8e37,
-  (q15_t)0x3a99, (q15_t)0x8e34, (q15_t)0x3a94, (q15_t)0x8e31, (q15_t)0x3a8e, (q15_t)0x8e2e, (q15_t)0x3a88, (q15_t)0x8e2c,
-  (q15_t)0x3a83, (q15_t)0x8e29, (q15_t)0x3a7d, (q15_t)0x8e26, (q15_t)0x3a78, (q15_t)0x8e23, (q15_t)0x3a72, (q15_t)0x8e20,
-  (q15_t)0x3a6c, (q15_t)0x8e1d, (q15_t)0x3a67, (q15_t)0x8e1a, (q15_t)0x3a61, (q15_t)0x8e17, (q15_t)0x3a5c, (q15_t)0x8e15,
-  (q15_t)0x3a56, (q15_t)0x8e12, (q15_t)0x3a50, (q15_t)0x8e0f, (q15_t)0x3a4b, (q15_t)0x8e0c, (q15_t)0x3a45, (q15_t)0x8e09,
-  (q15_t)0x3a40, (q15_t)0x8e06, (q15_t)0x3a3a, (q15_t)0x8e03, (q15_t)0x3a34, (q15_t)0x8e01, (q15_t)0x3a2f, (q15_t)0x8dfe,
-  (q15_t)0x3a29, (q15_t)0x8dfb, (q15_t)0x3a24, (q15_t)0x8df8, (q15_t)0x3a1e, (q15_t)0x8df5, (q15_t)0x3a19, (q15_t)0x8df2,
-  (q15_t)0x3a13, (q15_t)0x8def, (q15_t)0x3a0d, (q15_t)0x8ded, (q15_t)0x3a08, (q15_t)0x8dea, (q15_t)0x3a02, (q15_t)0x8de7,
-  (q15_t)0x39fd, (q15_t)0x8de4, (q15_t)0x39f7, (q15_t)0x8de1, (q15_t)0x39f1, (q15_t)0x8dde, (q15_t)0x39ec, (q15_t)0x8ddc,
-  (q15_t)0x39e6, (q15_t)0x8dd9, (q15_t)0x39e0, (q15_t)0x8dd6, (q15_t)0x39db, (q15_t)0x8dd3, (q15_t)0x39d5, (q15_t)0x8dd0,
-  (q15_t)0x39d0, (q15_t)0x8dcd, (q15_t)0x39ca, (q15_t)0x8dca, (q15_t)0x39c4, (q15_t)0x8dc8, (q15_t)0x39bf, (q15_t)0x8dc5,
-  (q15_t)0x39b9, (q15_t)0x8dc2, (q15_t)0x39b4, (q15_t)0x8dbf, (q15_t)0x39ae, (q15_t)0x8dbc, (q15_t)0x39a8, (q15_t)0x8db9,
-  (q15_t)0x39a3, (q15_t)0x8db7, (q15_t)0x399d, (q15_t)0x8db4, (q15_t)0x3998, (q15_t)0x8db1, (q15_t)0x3992, (q15_t)0x8dae,
-  (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3987, (q15_t)0x8da9, (q15_t)0x3981, (q15_t)0x8da6, (q15_t)0x397c, (q15_t)0x8da3,
-  (q15_t)0x3976, (q15_t)0x8da0, (q15_t)0x3970, (q15_t)0x8d9d, (q15_t)0x396b, (q15_t)0x8d9a, (q15_t)0x3965, (q15_t)0x8d98,
-  (q15_t)0x395f, (q15_t)0x8d95, (q15_t)0x395a, (q15_t)0x8d92, (q15_t)0x3954, (q15_t)0x8d8f, (q15_t)0x394f, (q15_t)0x8d8c,
-  (q15_t)0x3949, (q15_t)0x8d8a, (q15_t)0x3943, (q15_t)0x8d87, (q15_t)0x393e, (q15_t)0x8d84, (q15_t)0x3938, (q15_t)0x8d81,
-  (q15_t)0x3932, (q15_t)0x8d7e, (q15_t)0x392d, (q15_t)0x8d7b, (q15_t)0x3927, (q15_t)0x8d79, (q15_t)0x3922, (q15_t)0x8d76,
-  (q15_t)0x391c, (q15_t)0x8d73, (q15_t)0x3916, (q15_t)0x8d70, (q15_t)0x3911, (q15_t)0x8d6d, (q15_t)0x390b, (q15_t)0x8d6b,
-  (q15_t)0x3906, (q15_t)0x8d68, (q15_t)0x3900, (q15_t)0x8d65, (q15_t)0x38fa, (q15_t)0x8d62, (q15_t)0x38f5, (q15_t)0x8d5f,
-  (q15_t)0x38ef, (q15_t)0x8d5d, (q15_t)0x38e9, (q15_t)0x8d5a, (q15_t)0x38e4, (q15_t)0x8d57, (q15_t)0x38de, (q15_t)0x8d54,
-  (q15_t)0x38d8, (q15_t)0x8d51, (q15_t)0x38d3, (q15_t)0x8d4f, (q15_t)0x38cd, (q15_t)0x8d4c, (q15_t)0x38c8, (q15_t)0x8d49,
-  (q15_t)0x38c2, (q15_t)0x8d46, (q15_t)0x38bc, (q15_t)0x8d44, (q15_t)0x38b7, (q15_t)0x8d41, (q15_t)0x38b1, (q15_t)0x8d3e,
-  (q15_t)0x38ab, (q15_t)0x8d3b, (q15_t)0x38a6, (q15_t)0x8d38, (q15_t)0x38a0, (q15_t)0x8d36, (q15_t)0x389b, (q15_t)0x8d33,
-  (q15_t)0x3895, (q15_t)0x8d30, (q15_t)0x388f, (q15_t)0x8d2d, (q15_t)0x388a, (q15_t)0x8d2b, (q15_t)0x3884, (q15_t)0x8d28,
-  (q15_t)0x387e, (q15_t)0x8d25, (q15_t)0x3879, (q15_t)0x8d22, (q15_t)0x3873, (q15_t)0x8d1f, (q15_t)0x386d, (q15_t)0x8d1d,
-  (q15_t)0x3868, (q15_t)0x8d1a, (q15_t)0x3862, (q15_t)0x8d17, (q15_t)0x385d, (q15_t)0x8d14, (q15_t)0x3857, (q15_t)0x8d12,
-  (q15_t)0x3851, (q15_t)0x8d0f, (q15_t)0x384c, (q15_t)0x8d0c, (q15_t)0x3846, (q15_t)0x8d09, (q15_t)0x3840, (q15_t)0x8d07,
-  (q15_t)0x383b, (q15_t)0x8d04, (q15_t)0x3835, (q15_t)0x8d01, (q15_t)0x382f, (q15_t)0x8cfe, (q15_t)0x382a, (q15_t)0x8cfb,
-  (q15_t)0x3824, (q15_t)0x8cf9, (q15_t)0x381e, (q15_t)0x8cf6, (q15_t)0x3819, (q15_t)0x8cf3, (q15_t)0x3813, (q15_t)0x8cf0,
-  (q15_t)0x380d, (q15_t)0x8cee, (q15_t)0x3808, (q15_t)0x8ceb, (q15_t)0x3802, (q15_t)0x8ce8, (q15_t)0x37fd, (q15_t)0x8ce5,
-  (q15_t)0x37f7, (q15_t)0x8ce3, (q15_t)0x37f1, (q15_t)0x8ce0, (q15_t)0x37ec, (q15_t)0x8cdd, (q15_t)0x37e6, (q15_t)0x8cda,
-  (q15_t)0x37e0, (q15_t)0x8cd8, (q15_t)0x37db, (q15_t)0x8cd5, (q15_t)0x37d5, (q15_t)0x8cd2, (q15_t)0x37cf, (q15_t)0x8cd0,
-  (q15_t)0x37ca, (q15_t)0x8ccd, (q15_t)0x37c4, (q15_t)0x8cca, (q15_t)0x37be, (q15_t)0x8cc7, (q15_t)0x37b9, (q15_t)0x8cc5,
-  (q15_t)0x37b3, (q15_t)0x8cc2, (q15_t)0x37ad, (q15_t)0x8cbf, (q15_t)0x37a8, (q15_t)0x8cbc, (q15_t)0x37a2, (q15_t)0x8cba,
-  (q15_t)0x379c, (q15_t)0x8cb7, (q15_t)0x3797, (q15_t)0x8cb4, (q15_t)0x3791, (q15_t)0x8cb1, (q15_t)0x378b, (q15_t)0x8caf,
-  (q15_t)0x3786, (q15_t)0x8cac, (q15_t)0x3780, (q15_t)0x8ca9, (q15_t)0x377a, (q15_t)0x8ca7, (q15_t)0x3775, (q15_t)0x8ca4,
-  (q15_t)0x376f, (q15_t)0x8ca1, (q15_t)0x3769, (q15_t)0x8c9e, (q15_t)0x3764, (q15_t)0x8c9c, (q15_t)0x375e, (q15_t)0x8c99,
-  (q15_t)0x3758, (q15_t)0x8c96, (q15_t)0x3753, (q15_t)0x8c94, (q15_t)0x374d, (q15_t)0x8c91, (q15_t)0x3747, (q15_t)0x8c8e,
-  (q15_t)0x3742, (q15_t)0x8c8b, (q15_t)0x373c, (q15_t)0x8c89, (q15_t)0x3736, (q15_t)0x8c86, (q15_t)0x3731, (q15_t)0x8c83,
-  (q15_t)0x372b, (q15_t)0x8c81, (q15_t)0x3725, (q15_t)0x8c7e, (q15_t)0x3720, (q15_t)0x8c7b, (q15_t)0x371a, (q15_t)0x8c78,
-  (q15_t)0x3714, (q15_t)0x8c76, (q15_t)0x370f, (q15_t)0x8c73, (q15_t)0x3709, (q15_t)0x8c70, (q15_t)0x3703, (q15_t)0x8c6e,
-  (q15_t)0x36fe, (q15_t)0x8c6b, (q15_t)0x36f8, (q15_t)0x8c68, (q15_t)0x36f2, (q15_t)0x8c65, (q15_t)0x36ed, (q15_t)0x8c63,
-  (q15_t)0x36e7, (q15_t)0x8c60, (q15_t)0x36e1, (q15_t)0x8c5d, (q15_t)0x36dc, (q15_t)0x8c5b, (q15_t)0x36d6, (q15_t)0x8c58,
-  (q15_t)0x36d0, (q15_t)0x8c55, (q15_t)0x36cb, (q15_t)0x8c53, (q15_t)0x36c5, (q15_t)0x8c50, (q15_t)0x36bf, (q15_t)0x8c4d,
-  (q15_t)0x36ba, (q15_t)0x8c4b, (q15_t)0x36b4, (q15_t)0x8c48, (q15_t)0x36ae, (q15_t)0x8c45, (q15_t)0x36a9, (q15_t)0x8c43,
-  (q15_t)0x36a3, (q15_t)0x8c40, (q15_t)0x369d, (q15_t)0x8c3d, (q15_t)0x3698, (q15_t)0x8c3a, (q15_t)0x3692, (q15_t)0x8c38,
-  (q15_t)0x368c, (q15_t)0x8c35, (q15_t)0x3686, (q15_t)0x8c32, (q15_t)0x3681, (q15_t)0x8c30, (q15_t)0x367b, (q15_t)0x8c2d,
-  (q15_t)0x3675, (q15_t)0x8c2a, (q15_t)0x3670, (q15_t)0x8c28, (q15_t)0x366a, (q15_t)0x8c25, (q15_t)0x3664, (q15_t)0x8c22,
-  (q15_t)0x365f, (q15_t)0x8c20, (q15_t)0x3659, (q15_t)0x8c1d, (q15_t)0x3653, (q15_t)0x8c1a, (q15_t)0x364e, (q15_t)0x8c18,
-  (q15_t)0x3648, (q15_t)0x8c15, (q15_t)0x3642, (q15_t)0x8c12, (q15_t)0x363d, (q15_t)0x8c10, (q15_t)0x3637, (q15_t)0x8c0d,
-  (q15_t)0x3631, (q15_t)0x8c0a, (q15_t)0x362b, (q15_t)0x8c08, (q15_t)0x3626, (q15_t)0x8c05, (q15_t)0x3620, (q15_t)0x8c02,
-  (q15_t)0x361a, (q15_t)0x8c00, (q15_t)0x3615, (q15_t)0x8bfd, (q15_t)0x360f, (q15_t)0x8bfa, (q15_t)0x3609, (q15_t)0x8bf8,
-  (q15_t)0x3604, (q15_t)0x8bf5, (q15_t)0x35fe, (q15_t)0x8bf3, (q15_t)0x35f8, (q15_t)0x8bf0, (q15_t)0x35f3, (q15_t)0x8bed,
-  (q15_t)0x35ed, (q15_t)0x8beb, (q15_t)0x35e7, (q15_t)0x8be8, (q15_t)0x35e1, (q15_t)0x8be5, (q15_t)0x35dc, (q15_t)0x8be3,
-  (q15_t)0x35d6, (q15_t)0x8be0, (q15_t)0x35d0, (q15_t)0x8bdd, (q15_t)0x35cb, (q15_t)0x8bdb, (q15_t)0x35c5, (q15_t)0x8bd8,
-  (q15_t)0x35bf, (q15_t)0x8bd5, (q15_t)0x35ba, (q15_t)0x8bd3, (q15_t)0x35b4, (q15_t)0x8bd0, (q15_t)0x35ae, (q15_t)0x8bce,
-  (q15_t)0x35a8, (q15_t)0x8bcb, (q15_t)0x35a3, (q15_t)0x8bc8, (q15_t)0x359d, (q15_t)0x8bc6, (q15_t)0x3597, (q15_t)0x8bc3,
-  (q15_t)0x3592, (q15_t)0x8bc0, (q15_t)0x358c, (q15_t)0x8bbe, (q15_t)0x3586, (q15_t)0x8bbb, (q15_t)0x3580, (q15_t)0x8bb8,
-  (q15_t)0x357b, (q15_t)0x8bb6, (q15_t)0x3575, (q15_t)0x8bb3, (q15_t)0x356f, (q15_t)0x8bb1, (q15_t)0x356a, (q15_t)0x8bae,
-  (q15_t)0x3564, (q15_t)0x8bab, (q15_t)0x355e, (q15_t)0x8ba9, (q15_t)0x3558, (q15_t)0x8ba6, (q15_t)0x3553, (q15_t)0x8ba4,
-  (q15_t)0x354d, (q15_t)0x8ba1, (q15_t)0x3547, (q15_t)0x8b9e, (q15_t)0x3542, (q15_t)0x8b9c, (q15_t)0x353c, (q15_t)0x8b99,
-  (q15_t)0x3536, (q15_t)0x8b96, (q15_t)0x3530, (q15_t)0x8b94, (q15_t)0x352b, (q15_t)0x8b91, (q15_t)0x3525, (q15_t)0x8b8f,
-  (q15_t)0x351f, (q15_t)0x8b8c, (q15_t)0x351a, (q15_t)0x8b89, (q15_t)0x3514, (q15_t)0x8b87, (q15_t)0x350e, (q15_t)0x8b84,
-  (q15_t)0x3508, (q15_t)0x8b82, (q15_t)0x3503, (q15_t)0x8b7f, (q15_t)0x34fd, (q15_t)0x8b7c, (q15_t)0x34f7, (q15_t)0x8b7a,
-  (q15_t)0x34f2, (q15_t)0x8b77, (q15_t)0x34ec, (q15_t)0x8b75, (q15_t)0x34e6, (q15_t)0x8b72, (q15_t)0x34e0, (q15_t)0x8b6f,
-  (q15_t)0x34db, (q15_t)0x8b6d, (q15_t)0x34d5, (q15_t)0x8b6a, (q15_t)0x34cf, (q15_t)0x8b68, (q15_t)0x34ca, (q15_t)0x8b65,
-  (q15_t)0x34c4, (q15_t)0x8b62, (q15_t)0x34be, (q15_t)0x8b60, (q15_t)0x34b8, (q15_t)0x8b5d, (q15_t)0x34b3, (q15_t)0x8b5b,
-  (q15_t)0x34ad, (q15_t)0x8b58, (q15_t)0x34a7, (q15_t)0x8b55, (q15_t)0x34a1, (q15_t)0x8b53, (q15_t)0x349c, (q15_t)0x8b50,
-  (q15_t)0x3496, (q15_t)0x8b4e, (q15_t)0x3490, (q15_t)0x8b4b, (q15_t)0x348b, (q15_t)0x8b49, (q15_t)0x3485, (q15_t)0x8b46,
-  (q15_t)0x347f, (q15_t)0x8b43, (q15_t)0x3479, (q15_t)0x8b41, (q15_t)0x3474, (q15_t)0x8b3e, (q15_t)0x346e, (q15_t)0x8b3c,
-  (q15_t)0x3468, (q15_t)0x8b39, (q15_t)0x3462, (q15_t)0x8b37, (q15_t)0x345d, (q15_t)0x8b34, (q15_t)0x3457, (q15_t)0x8b31,
-  (q15_t)0x3451, (q15_t)0x8b2f, (q15_t)0x344b, (q15_t)0x8b2c, (q15_t)0x3446, (q15_t)0x8b2a, (q15_t)0x3440, (q15_t)0x8b27,
-  (q15_t)0x343a, (q15_t)0x8b25, (q15_t)0x3435, (q15_t)0x8b22, (q15_t)0x342f, (q15_t)0x8b1f, (q15_t)0x3429, (q15_t)0x8b1d,
-  (q15_t)0x3423, (q15_t)0x8b1a, (q15_t)0x341e, (q15_t)0x8b18, (q15_t)0x3418, (q15_t)0x8b15, (q15_t)0x3412, (q15_t)0x8b13,
-  (q15_t)0x340c, (q15_t)0x8b10, (q15_t)0x3407, (q15_t)0x8b0e, (q15_t)0x3401, (q15_t)0x8b0b, (q15_t)0x33fb, (q15_t)0x8b08,
-  (q15_t)0x33f5, (q15_t)0x8b06, (q15_t)0x33f0, (q15_t)0x8b03, (q15_t)0x33ea, (q15_t)0x8b01, (q15_t)0x33e4, (q15_t)0x8afe,
-  (q15_t)0x33de, (q15_t)0x8afc, (q15_t)0x33d9, (q15_t)0x8af9, (q15_t)0x33d3, (q15_t)0x8af7, (q15_t)0x33cd, (q15_t)0x8af4,
-  (q15_t)0x33c7, (q15_t)0x8af1, (q15_t)0x33c2, (q15_t)0x8aef, (q15_t)0x33bc, (q15_t)0x8aec, (q15_t)0x33b6, (q15_t)0x8aea,
-  (q15_t)0x33b0, (q15_t)0x8ae7, (q15_t)0x33ab, (q15_t)0x8ae5, (q15_t)0x33a5, (q15_t)0x8ae2, (q15_t)0x339f, (q15_t)0x8ae0,
-  (q15_t)0x3399, (q15_t)0x8add, (q15_t)0x3394, (q15_t)0x8adb, (q15_t)0x338e, (q15_t)0x8ad8, (q15_t)0x3388, (q15_t)0x8ad6,
-  (q15_t)0x3382, (q15_t)0x8ad3, (q15_t)0x337d, (q15_t)0x8ad1, (q15_t)0x3377, (q15_t)0x8ace, (q15_t)0x3371, (q15_t)0x8acb,
-  (q15_t)0x336b, (q15_t)0x8ac9, (q15_t)0x3366, (q15_t)0x8ac6, (q15_t)0x3360, (q15_t)0x8ac4, (q15_t)0x335a, (q15_t)0x8ac1,
-  (q15_t)0x3354, (q15_t)0x8abf, (q15_t)0x334f, (q15_t)0x8abc, (q15_t)0x3349, (q15_t)0x8aba, (q15_t)0x3343, (q15_t)0x8ab7,
-  (q15_t)0x333d, (q15_t)0x8ab5, (q15_t)0x3338, (q15_t)0x8ab2, (q15_t)0x3332, (q15_t)0x8ab0, (q15_t)0x332c, (q15_t)0x8aad,
-  (q15_t)0x3326, (q15_t)0x8aab, (q15_t)0x3321, (q15_t)0x8aa8, (q15_t)0x331b, (q15_t)0x8aa6, (q15_t)0x3315, (q15_t)0x8aa3,
-  (q15_t)0x330f, (q15_t)0x8aa1, (q15_t)0x330a, (q15_t)0x8a9e, (q15_t)0x3304, (q15_t)0x8a9c, (q15_t)0x32fe, (q15_t)0x8a99,
-  (q15_t)0x32f8, (q15_t)0x8a97, (q15_t)0x32f3, (q15_t)0x8a94, (q15_t)0x32ed, (q15_t)0x8a92, (q15_t)0x32e7, (q15_t)0x8a8f,
-  (q15_t)0x32e1, (q15_t)0x8a8d, (q15_t)0x32db, (q15_t)0x8a8a, (q15_t)0x32d6, (q15_t)0x8a88, (q15_t)0x32d0, (q15_t)0x8a85,
-  (q15_t)0x32ca, (q15_t)0x8a83, (q15_t)0x32c4, (q15_t)0x8a80, (q15_t)0x32bf, (q15_t)0x8a7e, (q15_t)0x32b9, (q15_t)0x8a7b,
-  (q15_t)0x32b3, (q15_t)0x8a79, (q15_t)0x32ad, (q15_t)0x8a76, (q15_t)0x32a8, (q15_t)0x8a74, (q15_t)0x32a2, (q15_t)0x8a71,
-  (q15_t)0x329c, (q15_t)0x8a6f, (q15_t)0x3296, (q15_t)0x8a6c, (q15_t)0x3290, (q15_t)0x8a6a, (q15_t)0x328b, (q15_t)0x8a67,
-  (q15_t)0x3285, (q15_t)0x8a65, (q15_t)0x327f, (q15_t)0x8a62, (q15_t)0x3279, (q15_t)0x8a60, (q15_t)0x3274, (q15_t)0x8a5d,
-  (q15_t)0x326e, (q15_t)0x8a5b, (q15_t)0x3268, (q15_t)0x8a59, (q15_t)0x3262, (q15_t)0x8a56, (q15_t)0x325d, (q15_t)0x8a54,
-  (q15_t)0x3257, (q15_t)0x8a51, (q15_t)0x3251, (q15_t)0x8a4f, (q15_t)0x324b, (q15_t)0x8a4c, (q15_t)0x3245, (q15_t)0x8a4a,
-  (q15_t)0x3240, (q15_t)0x8a47, (q15_t)0x323a, (q15_t)0x8a45, (q15_t)0x3234, (q15_t)0x8a42, (q15_t)0x322e, (q15_t)0x8a40,
-  (q15_t)0x3228, (q15_t)0x8a3d, (q15_t)0x3223, (q15_t)0x8a3b, (q15_t)0x321d, (q15_t)0x8a38, (q15_t)0x3217, (q15_t)0x8a36,
-  (q15_t)0x3211, (q15_t)0x8a34, (q15_t)0x320c, (q15_t)0x8a31, (q15_t)0x3206, (q15_t)0x8a2f, (q15_t)0x3200, (q15_t)0x8a2c,
-  (q15_t)0x31fa, (q15_t)0x8a2a, (q15_t)0x31f4, (q15_t)0x8a27, (q15_t)0x31ef, (q15_t)0x8a25, (q15_t)0x31e9, (q15_t)0x8a22,
-  (q15_t)0x31e3, (q15_t)0x8a20, (q15_t)0x31dd, (q15_t)0x8a1d, (q15_t)0x31d8, (q15_t)0x8a1b, (q15_t)0x31d2, (q15_t)0x8a19,
-  (q15_t)0x31cc, (q15_t)0x8a16, (q15_t)0x31c6, (q15_t)0x8a14, (q15_t)0x31c0, (q15_t)0x8a11, (q15_t)0x31bb, (q15_t)0x8a0f,
-  (q15_t)0x31b5, (q15_t)0x8a0c, (q15_t)0x31af, (q15_t)0x8a0a, (q15_t)0x31a9, (q15_t)0x8a07, (q15_t)0x31a3, (q15_t)0x8a05,
-  (q15_t)0x319e, (q15_t)0x8a03, (q15_t)0x3198, (q15_t)0x8a00, (q15_t)0x3192, (q15_t)0x89fe, (q15_t)0x318c, (q15_t)0x89fb,
-  (q15_t)0x3186, (q15_t)0x89f9, (q15_t)0x3181, (q15_t)0x89f6, (q15_t)0x317b, (q15_t)0x89f4, (q15_t)0x3175, (q15_t)0x89f2,
-  (q15_t)0x316f, (q15_t)0x89ef, (q15_t)0x3169, (q15_t)0x89ed, (q15_t)0x3164, (q15_t)0x89ea, (q15_t)0x315e, (q15_t)0x89e8,
-  (q15_t)0x3158, (q15_t)0x89e5, (q15_t)0x3152, (q15_t)0x89e3, (q15_t)0x314c, (q15_t)0x89e1, (q15_t)0x3147, (q15_t)0x89de,
-  (q15_t)0x3141, (q15_t)0x89dc, (q15_t)0x313b, (q15_t)0x89d9, (q15_t)0x3135, (q15_t)0x89d7, (q15_t)0x312f, (q15_t)0x89d5,
-  (q15_t)0x312a, (q15_t)0x89d2, (q15_t)0x3124, (q15_t)0x89d0, (q15_t)0x311e, (q15_t)0x89cd, (q15_t)0x3118, (q15_t)0x89cb,
-  (q15_t)0x3112, (q15_t)0x89c8, (q15_t)0x310d, (q15_t)0x89c6, (q15_t)0x3107, (q15_t)0x89c4, (q15_t)0x3101, (q15_t)0x89c1,
-  (q15_t)0x30fb, (q15_t)0x89bf, (q15_t)0x30f5, (q15_t)0x89bc, (q15_t)0x30f0, (q15_t)0x89ba, (q15_t)0x30ea, (q15_t)0x89b8,
-  (q15_t)0x30e4, (q15_t)0x89b5, (q15_t)0x30de, (q15_t)0x89b3, (q15_t)0x30d8, (q15_t)0x89b0, (q15_t)0x30d3, (q15_t)0x89ae,
-  (q15_t)0x30cd, (q15_t)0x89ac, (q15_t)0x30c7, (q15_t)0x89a9, (q15_t)0x30c1, (q15_t)0x89a7, (q15_t)0x30bb, (q15_t)0x89a4,
-  (q15_t)0x30b6, (q15_t)0x89a2, (q15_t)0x30b0, (q15_t)0x89a0, (q15_t)0x30aa, (q15_t)0x899d, (q15_t)0x30a4, (q15_t)0x899b,
-  (q15_t)0x309e, (q15_t)0x8998, (q15_t)0x3099, (q15_t)0x8996, (q15_t)0x3093, (q15_t)0x8994, (q15_t)0x308d, (q15_t)0x8991,
-  (q15_t)0x3087, (q15_t)0x898f, (q15_t)0x3081, (q15_t)0x898d, (q15_t)0x307b, (q15_t)0x898a, (q15_t)0x3076, (q15_t)0x8988,
-  (q15_t)0x3070, (q15_t)0x8985, (q15_t)0x306a, (q15_t)0x8983, (q15_t)0x3064, (q15_t)0x8981, (q15_t)0x305e, (q15_t)0x897e,
-  (q15_t)0x3059, (q15_t)0x897c, (q15_t)0x3053, (q15_t)0x897a, (q15_t)0x304d, (q15_t)0x8977, (q15_t)0x3047, (q15_t)0x8975,
-  (q15_t)0x3041, (q15_t)0x8972, (q15_t)0x303b, (q15_t)0x8970, (q15_t)0x3036, (q15_t)0x896e, (q15_t)0x3030, (q15_t)0x896b,
-  (q15_t)0x302a, (q15_t)0x8969, (q15_t)0x3024, (q15_t)0x8967, (q15_t)0x301e, (q15_t)0x8964, (q15_t)0x3019, (q15_t)0x8962,
-  (q15_t)0x3013, (q15_t)0x8960, (q15_t)0x300d, (q15_t)0x895d, (q15_t)0x3007, (q15_t)0x895b, (q15_t)0x3001, (q15_t)0x8958,
-  (q15_t)0x2ffb, (q15_t)0x8956, (q15_t)0x2ff6, (q15_t)0x8954, (q15_t)0x2ff0, (q15_t)0x8951, (q15_t)0x2fea, (q15_t)0x894f,
-  (q15_t)0x2fe4, (q15_t)0x894d, (q15_t)0x2fde, (q15_t)0x894a, (q15_t)0x2fd8, (q15_t)0x8948, (q15_t)0x2fd3, (q15_t)0x8946,
-  (q15_t)0x2fcd, (q15_t)0x8943, (q15_t)0x2fc7, (q15_t)0x8941, (q15_t)0x2fc1, (q15_t)0x893f, (q15_t)0x2fbb, (q15_t)0x893c,
-  (q15_t)0x2fb5, (q15_t)0x893a, (q15_t)0x2fb0, (q15_t)0x8938, (q15_t)0x2faa, (q15_t)0x8935, (q15_t)0x2fa4, (q15_t)0x8933,
-  (q15_t)0x2f9e, (q15_t)0x8931, (q15_t)0x2f98, (q15_t)0x892e, (q15_t)0x2f92, (q15_t)0x892c, (q15_t)0x2f8d, (q15_t)0x892a,
-  (q15_t)0x2f87, (q15_t)0x8927, (q15_t)0x2f81, (q15_t)0x8925, (q15_t)0x2f7b, (q15_t)0x8923, (q15_t)0x2f75, (q15_t)0x8920,
-  (q15_t)0x2f6f, (q15_t)0x891e, (q15_t)0x2f6a, (q15_t)0x891c, (q15_t)0x2f64, (q15_t)0x8919, (q15_t)0x2f5e, (q15_t)0x8917,
-  (q15_t)0x2f58, (q15_t)0x8915, (q15_t)0x2f52, (q15_t)0x8912, (q15_t)0x2f4c, (q15_t)0x8910, (q15_t)0x2f47, (q15_t)0x890e,
-  (q15_t)0x2f41, (q15_t)0x890b, (q15_t)0x2f3b, (q15_t)0x8909, (q15_t)0x2f35, (q15_t)0x8907, (q15_t)0x2f2f, (q15_t)0x8904,
-  (q15_t)0x2f29, (q15_t)0x8902, (q15_t)0x2f24, (q15_t)0x8900, (q15_t)0x2f1e, (q15_t)0x88fd, (q15_t)0x2f18, (q15_t)0x88fb,
-  (q15_t)0x2f12, (q15_t)0x88f9, (q15_t)0x2f0c, (q15_t)0x88f6, (q15_t)0x2f06, (q15_t)0x88f4, (q15_t)0x2f01, (q15_t)0x88f2,
-  (q15_t)0x2efb, (q15_t)0x88f0, (q15_t)0x2ef5, (q15_t)0x88ed, (q15_t)0x2eef, (q15_t)0x88eb, (q15_t)0x2ee9, (q15_t)0x88e9,
-  (q15_t)0x2ee3, (q15_t)0x88e6, (q15_t)0x2edd, (q15_t)0x88e4, (q15_t)0x2ed8, (q15_t)0x88e2, (q15_t)0x2ed2, (q15_t)0x88df,
-  (q15_t)0x2ecc, (q15_t)0x88dd, (q15_t)0x2ec6, (q15_t)0x88db, (q15_t)0x2ec0, (q15_t)0x88d9, (q15_t)0x2eba, (q15_t)0x88d6,
-  (q15_t)0x2eb5, (q15_t)0x88d4, (q15_t)0x2eaf, (q15_t)0x88d2, (q15_t)0x2ea9, (q15_t)0x88cf, (q15_t)0x2ea3, (q15_t)0x88cd,
-  (q15_t)0x2e9d, (q15_t)0x88cb, (q15_t)0x2e97, (q15_t)0x88c8, (q15_t)0x2e91, (q15_t)0x88c6, (q15_t)0x2e8c, (q15_t)0x88c4,
-  (q15_t)0x2e86, (q15_t)0x88c2, (q15_t)0x2e80, (q15_t)0x88bf, (q15_t)0x2e7a, (q15_t)0x88bd, (q15_t)0x2e74, (q15_t)0x88bb,
-  (q15_t)0x2e6e, (q15_t)0x88b9, (q15_t)0x2e68, (q15_t)0x88b6, (q15_t)0x2e63, (q15_t)0x88b4, (q15_t)0x2e5d, (q15_t)0x88b2,
-  (q15_t)0x2e57, (q15_t)0x88af, (q15_t)0x2e51, (q15_t)0x88ad, (q15_t)0x2e4b, (q15_t)0x88ab, (q15_t)0x2e45, (q15_t)0x88a9,
-  (q15_t)0x2e3f, (q15_t)0x88a6, (q15_t)0x2e3a, (q15_t)0x88a4, (q15_t)0x2e34, (q15_t)0x88a2, (q15_t)0x2e2e, (q15_t)0x88a0,
-  (q15_t)0x2e28, (q15_t)0x889d, (q15_t)0x2e22, (q15_t)0x889b, (q15_t)0x2e1c, (q15_t)0x8899, (q15_t)0x2e16, (q15_t)0x8896,
-  (q15_t)0x2e11, (q15_t)0x8894, (q15_t)0x2e0b, (q15_t)0x8892, (q15_t)0x2e05, (q15_t)0x8890, (q15_t)0x2dff, (q15_t)0x888d,
-  (q15_t)0x2df9, (q15_t)0x888b, (q15_t)0x2df3, (q15_t)0x8889, (q15_t)0x2ded, (q15_t)0x8887, (q15_t)0x2de7, (q15_t)0x8884,
-  (q15_t)0x2de2, (q15_t)0x8882, (q15_t)0x2ddc, (q15_t)0x8880, (q15_t)0x2dd6, (q15_t)0x887e, (q15_t)0x2dd0, (q15_t)0x887b,
-  (q15_t)0x2dca, (q15_t)0x8879, (q15_t)0x2dc4, (q15_t)0x8877, (q15_t)0x2dbe, (q15_t)0x8875, (q15_t)0x2db9, (q15_t)0x8872,
-  (q15_t)0x2db3, (q15_t)0x8870, (q15_t)0x2dad, (q15_t)0x886e, (q15_t)0x2da7, (q15_t)0x886c, (q15_t)0x2da1, (q15_t)0x8869,
-  (q15_t)0x2d9b, (q15_t)0x8867, (q15_t)0x2d95, (q15_t)0x8865, (q15_t)0x2d8f, (q15_t)0x8863, (q15_t)0x2d8a, (q15_t)0x8860,
-  (q15_t)0x2d84, (q15_t)0x885e, (q15_t)0x2d7e, (q15_t)0x885c, (q15_t)0x2d78, (q15_t)0x885a, (q15_t)0x2d72, (q15_t)0x8858,
-  (q15_t)0x2d6c, (q15_t)0x8855, (q15_t)0x2d66, (q15_t)0x8853, (q15_t)0x2d60, (q15_t)0x8851, (q15_t)0x2d5b, (q15_t)0x884f,
-  (q15_t)0x2d55, (q15_t)0x884c, (q15_t)0x2d4f, (q15_t)0x884a, (q15_t)0x2d49, (q15_t)0x8848, (q15_t)0x2d43, (q15_t)0x8846,
-  (q15_t)0x2d3d, (q15_t)0x8844, (q15_t)0x2d37, (q15_t)0x8841, (q15_t)0x2d31, (q15_t)0x883f, (q15_t)0x2d2c, (q15_t)0x883d,
-  (q15_t)0x2d26, (q15_t)0x883b, (q15_t)0x2d20, (q15_t)0x8838, (q15_t)0x2d1a, (q15_t)0x8836, (q15_t)0x2d14, (q15_t)0x8834,
-  (q15_t)0x2d0e, (q15_t)0x8832, (q15_t)0x2d08, (q15_t)0x8830, (q15_t)0x2d02, (q15_t)0x882d, (q15_t)0x2cfd, (q15_t)0x882b,
-  (q15_t)0x2cf7, (q15_t)0x8829, (q15_t)0x2cf1, (q15_t)0x8827, (q15_t)0x2ceb, (q15_t)0x8825, (q15_t)0x2ce5, (q15_t)0x8822,
-  (q15_t)0x2cdf, (q15_t)0x8820, (q15_t)0x2cd9, (q15_t)0x881e, (q15_t)0x2cd3, (q15_t)0x881c, (q15_t)0x2ccd, (q15_t)0x881a,
-  (q15_t)0x2cc8, (q15_t)0x8817, (q15_t)0x2cc2, (q15_t)0x8815, (q15_t)0x2cbc, (q15_t)0x8813, (q15_t)0x2cb6, (q15_t)0x8811,
-  (q15_t)0x2cb0, (q15_t)0x880f, (q15_t)0x2caa, (q15_t)0x880c, (q15_t)0x2ca4, (q15_t)0x880a, (q15_t)0x2c9e, (q15_t)0x8808,
-  (q15_t)0x2c98, (q15_t)0x8806, (q15_t)0x2c93, (q15_t)0x8804, (q15_t)0x2c8d, (q15_t)0x8801, (q15_t)0x2c87, (q15_t)0x87ff,
-  (q15_t)0x2c81, (q15_t)0x87fd, (q15_t)0x2c7b, (q15_t)0x87fb, (q15_t)0x2c75, (q15_t)0x87f9, (q15_t)0x2c6f, (q15_t)0x87f6,
-  (q15_t)0x2c69, (q15_t)0x87f4, (q15_t)0x2c63, (q15_t)0x87f2, (q15_t)0x2c5e, (q15_t)0x87f0, (q15_t)0x2c58, (q15_t)0x87ee,
-  (q15_t)0x2c52, (q15_t)0x87ec, (q15_t)0x2c4c, (q15_t)0x87e9, (q15_t)0x2c46, (q15_t)0x87e7, (q15_t)0x2c40, (q15_t)0x87e5,
-  (q15_t)0x2c3a, (q15_t)0x87e3, (q15_t)0x2c34, (q15_t)0x87e1, (q15_t)0x2c2e, (q15_t)0x87df, (q15_t)0x2c29, (q15_t)0x87dc,
-  (q15_t)0x2c23, (q15_t)0x87da, (q15_t)0x2c1d, (q15_t)0x87d8, (q15_t)0x2c17, (q15_t)0x87d6, (q15_t)0x2c11, (q15_t)0x87d4,
-  (q15_t)0x2c0b, (q15_t)0x87d2, (q15_t)0x2c05, (q15_t)0x87cf, (q15_t)0x2bff, (q15_t)0x87cd, (q15_t)0x2bf9, (q15_t)0x87cb,
-  (q15_t)0x2bf3, (q15_t)0x87c9, (q15_t)0x2bee, (q15_t)0x87c7, (q15_t)0x2be8, (q15_t)0x87c5, (q15_t)0x2be2, (q15_t)0x87c2,
-  (q15_t)0x2bdc, (q15_t)0x87c0, (q15_t)0x2bd6, (q15_t)0x87be, (q15_t)0x2bd0, (q15_t)0x87bc, (q15_t)0x2bca, (q15_t)0x87ba,
-  (q15_t)0x2bc4, (q15_t)0x87b8, (q15_t)0x2bbe, (q15_t)0x87b6, (q15_t)0x2bb8, (q15_t)0x87b3, (q15_t)0x2bb2, (q15_t)0x87b1,
-  (q15_t)0x2bad, (q15_t)0x87af, (q15_t)0x2ba7, (q15_t)0x87ad, (q15_t)0x2ba1, (q15_t)0x87ab, (q15_t)0x2b9b, (q15_t)0x87a9,
-  (q15_t)0x2b95, (q15_t)0x87a7, (q15_t)0x2b8f, (q15_t)0x87a4, (q15_t)0x2b89, (q15_t)0x87a2, (q15_t)0x2b83, (q15_t)0x87a0,
-  (q15_t)0x2b7d, (q15_t)0x879e, (q15_t)0x2b77, (q15_t)0x879c, (q15_t)0x2b71, (q15_t)0x879a, (q15_t)0x2b6c, (q15_t)0x8798,
-  (q15_t)0x2b66, (q15_t)0x8795, (q15_t)0x2b60, (q15_t)0x8793, (q15_t)0x2b5a, (q15_t)0x8791, (q15_t)0x2b54, (q15_t)0x878f,
-  (q15_t)0x2b4e, (q15_t)0x878d, (q15_t)0x2b48, (q15_t)0x878b, (q15_t)0x2b42, (q15_t)0x8789, (q15_t)0x2b3c, (q15_t)0x8787,
-  (q15_t)0x2b36, (q15_t)0x8784, (q15_t)0x2b30, (q15_t)0x8782, (q15_t)0x2b2b, (q15_t)0x8780, (q15_t)0x2b25, (q15_t)0x877e,
-  (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x2b19, (q15_t)0x877a, (q15_t)0x2b13, (q15_t)0x8778, (q15_t)0x2b0d, (q15_t)0x8776,
-  (q15_t)0x2b07, (q15_t)0x8774, (q15_t)0x2b01, (q15_t)0x8771, (q15_t)0x2afb, (q15_t)0x876f, (q15_t)0x2af5, (q15_t)0x876d,
-  (q15_t)0x2aef, (q15_t)0x876b, (q15_t)0x2ae9, (q15_t)0x8769, (q15_t)0x2ae4, (q15_t)0x8767, (q15_t)0x2ade, (q15_t)0x8765,
-  (q15_t)0x2ad8, (q15_t)0x8763, (q15_t)0x2ad2, (q15_t)0x8761, (q15_t)0x2acc, (q15_t)0x875e, (q15_t)0x2ac6, (q15_t)0x875c,
-  (q15_t)0x2ac0, (q15_t)0x875a, (q15_t)0x2aba, (q15_t)0x8758, (q15_t)0x2ab4, (q15_t)0x8756, (q15_t)0x2aae, (q15_t)0x8754,
-  (q15_t)0x2aa8, (q15_t)0x8752, (q15_t)0x2aa2, (q15_t)0x8750, (q15_t)0x2a9c, (q15_t)0x874e, (q15_t)0x2a97, (q15_t)0x874c,
-  (q15_t)0x2a91, (q15_t)0x874a, (q15_t)0x2a8b, (q15_t)0x8747, (q15_t)0x2a85, (q15_t)0x8745, (q15_t)0x2a7f, (q15_t)0x8743,
-  (q15_t)0x2a79, (q15_t)0x8741, (q15_t)0x2a73, (q15_t)0x873f, (q15_t)0x2a6d, (q15_t)0x873d, (q15_t)0x2a67, (q15_t)0x873b,
-  (q15_t)0x2a61, (q15_t)0x8739, (q15_t)0x2a5b, (q15_t)0x8737, (q15_t)0x2a55, (q15_t)0x8735, (q15_t)0x2a4f, (q15_t)0x8733,
-  (q15_t)0x2a49, (q15_t)0x8731, (q15_t)0x2a44, (q15_t)0x872e, (q15_t)0x2a3e, (q15_t)0x872c, (q15_t)0x2a38, (q15_t)0x872a,
-  (q15_t)0x2a32, (q15_t)0x8728, (q15_t)0x2a2c, (q15_t)0x8726, (q15_t)0x2a26, (q15_t)0x8724, (q15_t)0x2a20, (q15_t)0x8722,
-  (q15_t)0x2a1a, (q15_t)0x8720, (q15_t)0x2a14, (q15_t)0x871e, (q15_t)0x2a0e, (q15_t)0x871c, (q15_t)0x2a08, (q15_t)0x871a,
-  (q15_t)0x2a02, (q15_t)0x8718, (q15_t)0x29fc, (q15_t)0x8716, (q15_t)0x29f6, (q15_t)0x8714, (q15_t)0x29f0, (q15_t)0x8712,
-  (q15_t)0x29eb, (q15_t)0x870f, (q15_t)0x29e5, (q15_t)0x870d, (q15_t)0x29df, (q15_t)0x870b, (q15_t)0x29d9, (q15_t)0x8709,
-  (q15_t)0x29d3, (q15_t)0x8707, (q15_t)0x29cd, (q15_t)0x8705, (q15_t)0x29c7, (q15_t)0x8703, (q15_t)0x29c1, (q15_t)0x8701,
-  (q15_t)0x29bb, (q15_t)0x86ff, (q15_t)0x29b5, (q15_t)0x86fd, (q15_t)0x29af, (q15_t)0x86fb, (q15_t)0x29a9, (q15_t)0x86f9,
-  (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x299d, (q15_t)0x86f5, (q15_t)0x2997, (q15_t)0x86f3, (q15_t)0x2991, (q15_t)0x86f1,
-  (q15_t)0x298b, (q15_t)0x86ef, (q15_t)0x2986, (q15_t)0x86ed, (q15_t)0x2980, (q15_t)0x86eb, (q15_t)0x297a, (q15_t)0x86e9,
-  (q15_t)0x2974, (q15_t)0x86e7, (q15_t)0x296e, (q15_t)0x86e4, (q15_t)0x2968, (q15_t)0x86e2, (q15_t)0x2962, (q15_t)0x86e0,
-  (q15_t)0x295c, (q15_t)0x86de, (q15_t)0x2956, (q15_t)0x86dc, (q15_t)0x2950, (q15_t)0x86da, (q15_t)0x294a, (q15_t)0x86d8,
-  (q15_t)0x2944, (q15_t)0x86d6, (q15_t)0x293e, (q15_t)0x86d4, (q15_t)0x2938, (q15_t)0x86d2, (q15_t)0x2932, (q15_t)0x86d0,
-  (q15_t)0x292c, (q15_t)0x86ce, (q15_t)0x2926, (q15_t)0x86cc, (q15_t)0x2920, (q15_t)0x86ca, (q15_t)0x291b, (q15_t)0x86c8,
-  (q15_t)0x2915, (q15_t)0x86c6, (q15_t)0x290f, (q15_t)0x86c4, (q15_t)0x2909, (q15_t)0x86c2, (q15_t)0x2903, (q15_t)0x86c0,
-  (q15_t)0x28fd, (q15_t)0x86be, (q15_t)0x28f7, (q15_t)0x86bc, (q15_t)0x28f1, (q15_t)0x86ba, (q15_t)0x28eb, (q15_t)0x86b8,
-  (q15_t)0x28e5, (q15_t)0x86b6, (q15_t)0x28df, (q15_t)0x86b4, (q15_t)0x28d9, (q15_t)0x86b2, (q15_t)0x28d3, (q15_t)0x86b0,
-  (q15_t)0x28cd, (q15_t)0x86ae, (q15_t)0x28c7, (q15_t)0x86ac, (q15_t)0x28c1, (q15_t)0x86aa, (q15_t)0x28bb, (q15_t)0x86a8,
-  (q15_t)0x28b5, (q15_t)0x86a6, (q15_t)0x28af, (q15_t)0x86a4, (q15_t)0x28a9, (q15_t)0x86a2, (q15_t)0x28a3, (q15_t)0x86a0,
-  (q15_t)0x289d, (q15_t)0x869e, (q15_t)0x2898, (q15_t)0x869c, (q15_t)0x2892, (q15_t)0x869a, (q15_t)0x288c, (q15_t)0x8698,
-  (q15_t)0x2886, (q15_t)0x8696, (q15_t)0x2880, (q15_t)0x8694, (q15_t)0x287a, (q15_t)0x8692, (q15_t)0x2874, (q15_t)0x8690,
-  (q15_t)0x286e, (q15_t)0x868e, (q15_t)0x2868, (q15_t)0x868c, (q15_t)0x2862, (q15_t)0x868a, (q15_t)0x285c, (q15_t)0x8688,
-  (q15_t)0x2856, (q15_t)0x8686, (q15_t)0x2850, (q15_t)0x8684, (q15_t)0x284a, (q15_t)0x8682, (q15_t)0x2844, (q15_t)0x8680,
-  (q15_t)0x283e, (q15_t)0x867e, (q15_t)0x2838, (q15_t)0x867c, (q15_t)0x2832, (q15_t)0x867a, (q15_t)0x282c, (q15_t)0x8678,
-  (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x2820, (q15_t)0x8674, (q15_t)0x281a, (q15_t)0x8672, (q15_t)0x2814, (q15_t)0x8670,
-  (q15_t)0x280e, (q15_t)0x866e, (q15_t)0x2808, (q15_t)0x866d, (q15_t)0x2802, (q15_t)0x866b, (q15_t)0x27fc, (q15_t)0x8669,
-  (q15_t)0x27f6, (q15_t)0x8667, (q15_t)0x27f1, (q15_t)0x8665, (q15_t)0x27eb, (q15_t)0x8663, (q15_t)0x27e5, (q15_t)0x8661,
-  (q15_t)0x27df, (q15_t)0x865f, (q15_t)0x27d9, (q15_t)0x865d, (q15_t)0x27d3, (q15_t)0x865b, (q15_t)0x27cd, (q15_t)0x8659,
-  (q15_t)0x27c7, (q15_t)0x8657, (q15_t)0x27c1, (q15_t)0x8655, (q15_t)0x27bb, (q15_t)0x8653, (q15_t)0x27b5, (q15_t)0x8651,
-  (q15_t)0x27af, (q15_t)0x864f, (q15_t)0x27a9, (q15_t)0x864d, (q15_t)0x27a3, (q15_t)0x864b, (q15_t)0x279d, (q15_t)0x8649,
-  (q15_t)0x2797, (q15_t)0x8647, (q15_t)0x2791, (q15_t)0x8645, (q15_t)0x278b, (q15_t)0x8644, (q15_t)0x2785, (q15_t)0x8642,
-  (q15_t)0x277f, (q15_t)0x8640, (q15_t)0x2779, (q15_t)0x863e, (q15_t)0x2773, (q15_t)0x863c, (q15_t)0x276d, (q15_t)0x863a,
-  (q15_t)0x2767, (q15_t)0x8638, (q15_t)0x2761, (q15_t)0x8636, (q15_t)0x275b, (q15_t)0x8634, (q15_t)0x2755, (q15_t)0x8632,
-  (q15_t)0x274f, (q15_t)0x8630, (q15_t)0x2749, (q15_t)0x862e, (q15_t)0x2743, (q15_t)0x862c, (q15_t)0x273d, (q15_t)0x862a,
-  (q15_t)0x2737, (q15_t)0x8628, (q15_t)0x2731, (q15_t)0x8627, (q15_t)0x272b, (q15_t)0x8625, (q15_t)0x2725, (q15_t)0x8623,
-  (q15_t)0x271f, (q15_t)0x8621, (q15_t)0x2719, (q15_t)0x861f, (q15_t)0x2713, (q15_t)0x861d, (q15_t)0x270d, (q15_t)0x861b,
-  (q15_t)0x2707, (q15_t)0x8619, (q15_t)0x2701, (q15_t)0x8617, (q15_t)0x26fb, (q15_t)0x8615, (q15_t)0x26f5, (q15_t)0x8613,
-  (q15_t)0x26ef, (q15_t)0x8611, (q15_t)0x26e9, (q15_t)0x8610, (q15_t)0x26e4, (q15_t)0x860e, (q15_t)0x26de, (q15_t)0x860c,
-  (q15_t)0x26d8, (q15_t)0x860a, (q15_t)0x26d2, (q15_t)0x8608, (q15_t)0x26cc, (q15_t)0x8606, (q15_t)0x26c6, (q15_t)0x8604,
-  (q15_t)0x26c0, (q15_t)0x8602, (q15_t)0x26ba, (q15_t)0x8600, (q15_t)0x26b4, (q15_t)0x85fe, (q15_t)0x26ae, (q15_t)0x85fc,
-  (q15_t)0x26a8, (q15_t)0x85fb, (q15_t)0x26a2, (q15_t)0x85f9, (q15_t)0x269c, (q15_t)0x85f7, (q15_t)0x2696, (q15_t)0x85f5,
-  (q15_t)0x2690, (q15_t)0x85f3, (q15_t)0x268a, (q15_t)0x85f1, (q15_t)0x2684, (q15_t)0x85ef, (q15_t)0x267e, (q15_t)0x85ed,
-  (q15_t)0x2678, (q15_t)0x85eb, (q15_t)0x2672, (q15_t)0x85ea, (q15_t)0x266c, (q15_t)0x85e8, (q15_t)0x2666, (q15_t)0x85e6,
-  (q15_t)0x2660, (q15_t)0x85e4, (q15_t)0x265a, (q15_t)0x85e2, (q15_t)0x2654, (q15_t)0x85e0, (q15_t)0x264e, (q15_t)0x85de,
-  (q15_t)0x2648, (q15_t)0x85dc, (q15_t)0x2642, (q15_t)0x85da, (q15_t)0x263c, (q15_t)0x85d9, (q15_t)0x2636, (q15_t)0x85d7,
-  (q15_t)0x2630, (q15_t)0x85d5, (q15_t)0x262a, (q15_t)0x85d3, (q15_t)0x2624, (q15_t)0x85d1, (q15_t)0x261e, (q15_t)0x85cf,
-  (q15_t)0x2618, (q15_t)0x85cd, (q15_t)0x2612, (q15_t)0x85cb, (q15_t)0x260c, (q15_t)0x85ca, (q15_t)0x2606, (q15_t)0x85c8,
-  (q15_t)0x2600, (q15_t)0x85c6, (q15_t)0x25fa, (q15_t)0x85c4, (q15_t)0x25f4, (q15_t)0x85c2, (q15_t)0x25ee, (q15_t)0x85c0,
-  (q15_t)0x25e8, (q15_t)0x85be, (q15_t)0x25e2, (q15_t)0x85bd, (q15_t)0x25dc, (q15_t)0x85bb, (q15_t)0x25d6, (q15_t)0x85b9,
-  (q15_t)0x25d0, (q15_t)0x85b7, (q15_t)0x25ca, (q15_t)0x85b5, (q15_t)0x25c4, (q15_t)0x85b3, (q15_t)0x25be, (q15_t)0x85b1,
-  (q15_t)0x25b8, (q15_t)0x85b0, (q15_t)0x25b2, (q15_t)0x85ae, (q15_t)0x25ac, (q15_t)0x85ac, (q15_t)0x25a6, (q15_t)0x85aa,
-  (q15_t)0x25a0, (q15_t)0x85a8, (q15_t)0x259a, (q15_t)0x85a6, (q15_t)0x2594, (q15_t)0x85a4, (q15_t)0x258e, (q15_t)0x85a3,
-  (q15_t)0x2588, (q15_t)0x85a1, (q15_t)0x2582, (q15_t)0x859f, (q15_t)0x257c, (q15_t)0x859d, (q15_t)0x2576, (q15_t)0x859b,
-  (q15_t)0x2570, (q15_t)0x8599, (q15_t)0x256a, (q15_t)0x8598, (q15_t)0x2564, (q15_t)0x8596, (q15_t)0x255e, (q15_t)0x8594,
-  (q15_t)0x2558, (q15_t)0x8592, (q15_t)0x2552, (q15_t)0x8590, (q15_t)0x254c, (q15_t)0x858e, (q15_t)0x2546, (q15_t)0x858d,
-  (q15_t)0x2540, (q15_t)0x858b, (q15_t)0x253a, (q15_t)0x8589, (q15_t)0x2534, (q15_t)0x8587, (q15_t)0x252e, (q15_t)0x8585,
-  (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x2522, (q15_t)0x8582, (q15_t)0x251c, (q15_t)0x8580, (q15_t)0x2516, (q15_t)0x857e,
-  (q15_t)0x250f, (q15_t)0x857c, (q15_t)0x2509, (q15_t)0x857a, (q15_t)0x2503, (q15_t)0x8579, (q15_t)0x24fd, (q15_t)0x8577,
-  (q15_t)0x24f7, (q15_t)0x8575, (q15_t)0x24f1, (q15_t)0x8573, (q15_t)0x24eb, (q15_t)0x8571, (q15_t)0x24e5, (q15_t)0x856f,
-  (q15_t)0x24df, (q15_t)0x856e, (q15_t)0x24d9, (q15_t)0x856c, (q15_t)0x24d3, (q15_t)0x856a, (q15_t)0x24cd, (q15_t)0x8568,
-  (q15_t)0x24c7, (q15_t)0x8566, (q15_t)0x24c1, (q15_t)0x8565, (q15_t)0x24bb, (q15_t)0x8563, (q15_t)0x24b5, (q15_t)0x8561,
-  (q15_t)0x24af, (q15_t)0x855f, (q15_t)0x24a9, (q15_t)0x855d, (q15_t)0x24a3, (q15_t)0x855c, (q15_t)0x249d, (q15_t)0x855a,
-  (q15_t)0x2497, (q15_t)0x8558, (q15_t)0x2491, (q15_t)0x8556, (q15_t)0x248b, (q15_t)0x8554, (q15_t)0x2485, (q15_t)0x8553,
-  (q15_t)0x247f, (q15_t)0x8551, (q15_t)0x2479, (q15_t)0x854f, (q15_t)0x2473, (q15_t)0x854d, (q15_t)0x246d, (q15_t)0x854b,
-  (q15_t)0x2467, (q15_t)0x854a, (q15_t)0x2461, (q15_t)0x8548, (q15_t)0x245b, (q15_t)0x8546, (q15_t)0x2455, (q15_t)0x8544,
-  (q15_t)0x244f, (q15_t)0x8543, (q15_t)0x2449, (q15_t)0x8541, (q15_t)0x2443, (q15_t)0x853f, (q15_t)0x243d, (q15_t)0x853d,
-  (q15_t)0x2437, (q15_t)0x853b, (q15_t)0x2431, (q15_t)0x853a, (q15_t)0x242b, (q15_t)0x8538, (q15_t)0x2425, (q15_t)0x8536,
-  (q15_t)0x241f, (q15_t)0x8534, (q15_t)0x2419, (q15_t)0x8533, (q15_t)0x2413, (q15_t)0x8531, (q15_t)0x240d, (q15_t)0x852f,
-  (q15_t)0x2407, (q15_t)0x852d, (q15_t)0x2401, (q15_t)0x852b, (q15_t)0x23fa, (q15_t)0x852a, (q15_t)0x23f4, (q15_t)0x8528,
-  (q15_t)0x23ee, (q15_t)0x8526, (q15_t)0x23e8, (q15_t)0x8524, (q15_t)0x23e2, (q15_t)0x8523, (q15_t)0x23dc, (q15_t)0x8521,
-  (q15_t)0x23d6, (q15_t)0x851f, (q15_t)0x23d0, (q15_t)0x851d, (q15_t)0x23ca, (q15_t)0x851c, (q15_t)0x23c4, (q15_t)0x851a,
-  (q15_t)0x23be, (q15_t)0x8518, (q15_t)0x23b8, (q15_t)0x8516, (q15_t)0x23b2, (q15_t)0x8515, (q15_t)0x23ac, (q15_t)0x8513,
-  (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x23a0, (q15_t)0x850f, (q15_t)0x239a, (q15_t)0x850e, (q15_t)0x2394, (q15_t)0x850c,
-  (q15_t)0x238e, (q15_t)0x850a, (q15_t)0x2388, (q15_t)0x8508, (q15_t)0x2382, (q15_t)0x8507, (q15_t)0x237c, (q15_t)0x8505,
-  (q15_t)0x2376, (q15_t)0x8503, (q15_t)0x2370, (q15_t)0x8501, (q15_t)0x236a, (q15_t)0x8500, (q15_t)0x2364, (q15_t)0x84fe,
-  (q15_t)0x235e, (q15_t)0x84fc, (q15_t)0x2358, (q15_t)0x84fa, (q15_t)0x2352, (q15_t)0x84f9, (q15_t)0x234b, (q15_t)0x84f7,
-  (q15_t)0x2345, (q15_t)0x84f5, (q15_t)0x233f, (q15_t)0x84f4, (q15_t)0x2339, (q15_t)0x84f2, (q15_t)0x2333, (q15_t)0x84f0,
-  (q15_t)0x232d, (q15_t)0x84ee, (q15_t)0x2327, (q15_t)0x84ed, (q15_t)0x2321, (q15_t)0x84eb, (q15_t)0x231b, (q15_t)0x84e9,
-  (q15_t)0x2315, (q15_t)0x84e7, (q15_t)0x230f, (q15_t)0x84e6, (q15_t)0x2309, (q15_t)0x84e4, (q15_t)0x2303, (q15_t)0x84e2,
-  (q15_t)0x22fd, (q15_t)0x84e1, (q15_t)0x22f7, (q15_t)0x84df, (q15_t)0x22f1, (q15_t)0x84dd, (q15_t)0x22eb, (q15_t)0x84db,
-  (q15_t)0x22e5, (q15_t)0x84da, (q15_t)0x22df, (q15_t)0x84d8, (q15_t)0x22d9, (q15_t)0x84d6, (q15_t)0x22d3, (q15_t)0x84d5,
-  (q15_t)0x22cd, (q15_t)0x84d3, (q15_t)0x22c7, (q15_t)0x84d1, (q15_t)0x22c0, (q15_t)0x84cf, (q15_t)0x22ba, (q15_t)0x84ce,
-  (q15_t)0x22b4, (q15_t)0x84cc, (q15_t)0x22ae, (q15_t)0x84ca, (q15_t)0x22a8, (q15_t)0x84c9, (q15_t)0x22a2, (q15_t)0x84c7,
-  (q15_t)0x229c, (q15_t)0x84c5, (q15_t)0x2296, (q15_t)0x84c4, (q15_t)0x2290, (q15_t)0x84c2, (q15_t)0x228a, (q15_t)0x84c0,
-  (q15_t)0x2284, (q15_t)0x84be, (q15_t)0x227e, (q15_t)0x84bd, (q15_t)0x2278, (q15_t)0x84bb, (q15_t)0x2272, (q15_t)0x84b9,
-  (q15_t)0x226c, (q15_t)0x84b8, (q15_t)0x2266, (q15_t)0x84b6, (q15_t)0x2260, (q15_t)0x84b4, (q15_t)0x225a, (q15_t)0x84b3,
-  (q15_t)0x2254, (q15_t)0x84b1, (q15_t)0x224e, (q15_t)0x84af, (q15_t)0x2247, (q15_t)0x84ae, (q15_t)0x2241, (q15_t)0x84ac,
-  (q15_t)0x223b, (q15_t)0x84aa, (q15_t)0x2235, (q15_t)0x84a9, (q15_t)0x222f, (q15_t)0x84a7, (q15_t)0x2229, (q15_t)0x84a5,
-  (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x221d, (q15_t)0x84a2, (q15_t)0x2217, (q15_t)0x84a0, (q15_t)0x2211, (q15_t)0x849e,
-  (q15_t)0x220b, (q15_t)0x849d, (q15_t)0x2205, (q15_t)0x849b, (q15_t)0x21ff, (q15_t)0x8499, (q15_t)0x21f9, (q15_t)0x8498,
-  (q15_t)0x21f3, (q15_t)0x8496, (q15_t)0x21ed, (q15_t)0x8494, (q15_t)0x21e7, (q15_t)0x8493, (q15_t)0x21e1, (q15_t)0x8491,
-  (q15_t)0x21da, (q15_t)0x848f, (q15_t)0x21d4, (q15_t)0x848e, (q15_t)0x21ce, (q15_t)0x848c, (q15_t)0x21c8, (q15_t)0x848a,
-  (q15_t)0x21c2, (q15_t)0x8489, (q15_t)0x21bc, (q15_t)0x8487, (q15_t)0x21b6, (q15_t)0x8486, (q15_t)0x21b0, (q15_t)0x8484,
-  (q15_t)0x21aa, (q15_t)0x8482, (q15_t)0x21a4, (q15_t)0x8481, (q15_t)0x219e, (q15_t)0x847f, (q15_t)0x2198, (q15_t)0x847d,
-  (q15_t)0x2192, (q15_t)0x847c, (q15_t)0x218c, (q15_t)0x847a, (q15_t)0x2186, (q15_t)0x8478, (q15_t)0x2180, (q15_t)0x8477,
-  (q15_t)0x2179, (q15_t)0x8475, (q15_t)0x2173, (q15_t)0x8473, (q15_t)0x216d, (q15_t)0x8472, (q15_t)0x2167, (q15_t)0x8470,
-  (q15_t)0x2161, (q15_t)0x846e, (q15_t)0x215b, (q15_t)0x846d, (q15_t)0x2155, (q15_t)0x846b, (q15_t)0x214f, (q15_t)0x846a,
-  (q15_t)0x2149, (q15_t)0x8468, (q15_t)0x2143, (q15_t)0x8466, (q15_t)0x213d, (q15_t)0x8465, (q15_t)0x2137, (q15_t)0x8463,
-  (q15_t)0x2131, (q15_t)0x8461, (q15_t)0x212b, (q15_t)0x8460, (q15_t)0x2125, (q15_t)0x845e, (q15_t)0x211e, (q15_t)0x845d,
-  (q15_t)0x2118, (q15_t)0x845b, (q15_t)0x2112, (q15_t)0x8459, (q15_t)0x210c, (q15_t)0x8458, (q15_t)0x2106, (q15_t)0x8456,
-  (q15_t)0x2100, (q15_t)0x8454, (q15_t)0x20fa, (q15_t)0x8453, (q15_t)0x20f4, (q15_t)0x8451, (q15_t)0x20ee, (q15_t)0x8450,
-  (q15_t)0x20e8, (q15_t)0x844e, (q15_t)0x20e2, (q15_t)0x844c, (q15_t)0x20dc, (q15_t)0x844b, (q15_t)0x20d6, (q15_t)0x8449,
-  (q15_t)0x20d0, (q15_t)0x8447, (q15_t)0x20c9, (q15_t)0x8446, (q15_t)0x20c3, (q15_t)0x8444, (q15_t)0x20bd, (q15_t)0x8443,
-  (q15_t)0x20b7, (q15_t)0x8441, (q15_t)0x20b1, (q15_t)0x843f, (q15_t)0x20ab, (q15_t)0x843e, (q15_t)0x20a5, (q15_t)0x843c,
-  (q15_t)0x209f, (q15_t)0x843b, (q15_t)0x2099, (q15_t)0x8439, (q15_t)0x2093, (q15_t)0x8437, (q15_t)0x208d, (q15_t)0x8436,
-  (q15_t)0x2087, (q15_t)0x8434, (q15_t)0x2081, (q15_t)0x8433, (q15_t)0x207a, (q15_t)0x8431, (q15_t)0x2074, (q15_t)0x842f,
-  (q15_t)0x206e, (q15_t)0x842e, (q15_t)0x2068, (q15_t)0x842c, (q15_t)0x2062, (q15_t)0x842b, (q15_t)0x205c, (q15_t)0x8429,
-  (q15_t)0x2056, (q15_t)0x8427, (q15_t)0x2050, (q15_t)0x8426, (q15_t)0x204a, (q15_t)0x8424, (q15_t)0x2044, (q15_t)0x8423,
-  (q15_t)0x203e, (q15_t)0x8421, (q15_t)0x2038, (q15_t)0x8420, (q15_t)0x2032, (q15_t)0x841e, (q15_t)0x202b, (q15_t)0x841c,
-  (q15_t)0x2025, (q15_t)0x841b, (q15_t)0x201f, (q15_t)0x8419, (q15_t)0x2019, (q15_t)0x8418, (q15_t)0x2013, (q15_t)0x8416,
-  (q15_t)0x200d, (q15_t)0x8415, (q15_t)0x2007, (q15_t)0x8413, (q15_t)0x2001, (q15_t)0x8411, (q15_t)0x1ffb, (q15_t)0x8410,
-  (q15_t)0x1ff5, (q15_t)0x840e, (q15_t)0x1fef, (q15_t)0x840d, (q15_t)0x1fe9, (q15_t)0x840b, (q15_t)0x1fe2, (q15_t)0x840a,
-  (q15_t)0x1fdc, (q15_t)0x8408, (q15_t)0x1fd6, (q15_t)0x8406, (q15_t)0x1fd0, (q15_t)0x8405, (q15_t)0x1fca, (q15_t)0x8403,
-  (q15_t)0x1fc4, (q15_t)0x8402, (q15_t)0x1fbe, (q15_t)0x8400, (q15_t)0x1fb8, (q15_t)0x83ff, (q15_t)0x1fb2, (q15_t)0x83fd,
-  (q15_t)0x1fac, (q15_t)0x83fb, (q15_t)0x1fa6, (q15_t)0x83fa, (q15_t)0x1f9f, (q15_t)0x83f8, (q15_t)0x1f99, (q15_t)0x83f7,
-  (q15_t)0x1f93, (q15_t)0x83f5, (q15_t)0x1f8d, (q15_t)0x83f4, (q15_t)0x1f87, (q15_t)0x83f2, (q15_t)0x1f81, (q15_t)0x83f1,
-  (q15_t)0x1f7b, (q15_t)0x83ef, (q15_t)0x1f75, (q15_t)0x83ee, (q15_t)0x1f6f, (q15_t)0x83ec, (q15_t)0x1f69, (q15_t)0x83ea,
-  (q15_t)0x1f63, (q15_t)0x83e9, (q15_t)0x1f5d, (q15_t)0x83e7, (q15_t)0x1f56, (q15_t)0x83e6, (q15_t)0x1f50, (q15_t)0x83e4,
-  (q15_t)0x1f4a, (q15_t)0x83e3, (q15_t)0x1f44, (q15_t)0x83e1, (q15_t)0x1f3e, (q15_t)0x83e0, (q15_t)0x1f38, (q15_t)0x83de,
-  (q15_t)0x1f32, (q15_t)0x83dd, (q15_t)0x1f2c, (q15_t)0x83db, (q15_t)0x1f26, (q15_t)0x83da, (q15_t)0x1f20, (q15_t)0x83d8,
-  (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1f13, (q15_t)0x83d5, (q15_t)0x1f0d, (q15_t)0x83d3, (q15_t)0x1f07, (q15_t)0x83d2,
-  (q15_t)0x1f01, (q15_t)0x83d0, (q15_t)0x1efb, (q15_t)0x83cf, (q15_t)0x1ef5, (q15_t)0x83cd, (q15_t)0x1eef, (q15_t)0x83cc,
-  (q15_t)0x1ee9, (q15_t)0x83ca, (q15_t)0x1ee3, (q15_t)0x83c9, (q15_t)0x1edd, (q15_t)0x83c7, (q15_t)0x1ed6, (q15_t)0x83c6,
-  (q15_t)0x1ed0, (q15_t)0x83c4, (q15_t)0x1eca, (q15_t)0x83c3, (q15_t)0x1ec4, (q15_t)0x83c1, (q15_t)0x1ebe, (q15_t)0x83c0,
-  (q15_t)0x1eb8, (q15_t)0x83be, (q15_t)0x1eb2, (q15_t)0x83bd, (q15_t)0x1eac, (q15_t)0x83bb, (q15_t)0x1ea6, (q15_t)0x83ba,
-  (q15_t)0x1ea0, (q15_t)0x83b8, (q15_t)0x1e99, (q15_t)0x83b7, (q15_t)0x1e93, (q15_t)0x83b5, (q15_t)0x1e8d, (q15_t)0x83b4,
-  (q15_t)0x1e87, (q15_t)0x83b2, (q15_t)0x1e81, (q15_t)0x83b1, (q15_t)0x1e7b, (q15_t)0x83af, (q15_t)0x1e75, (q15_t)0x83ae,
-  (q15_t)0x1e6f, (q15_t)0x83ac, (q15_t)0x1e69, (q15_t)0x83ab, (q15_t)0x1e62, (q15_t)0x83a9, (q15_t)0x1e5c, (q15_t)0x83a8,
-  (q15_t)0x1e56, (q15_t)0x83a6, (q15_t)0x1e50, (q15_t)0x83a5, (q15_t)0x1e4a, (q15_t)0x83a3, (q15_t)0x1e44, (q15_t)0x83a2,
-  (q15_t)0x1e3e, (q15_t)0x83a0, (q15_t)0x1e38, (q15_t)0x839f, (q15_t)0x1e32, (q15_t)0x839d, (q15_t)0x1e2c, (q15_t)0x839c,
-  (q15_t)0x1e25, (q15_t)0x839a, (q15_t)0x1e1f, (q15_t)0x8399, (q15_t)0x1e19, (q15_t)0x8397, (q15_t)0x1e13, (q15_t)0x8396,
-  (q15_t)0x1e0d, (q15_t)0x8394, (q15_t)0x1e07, (q15_t)0x8393, (q15_t)0x1e01, (q15_t)0x8392, (q15_t)0x1dfb, (q15_t)0x8390,
-  (q15_t)0x1df5, (q15_t)0x838f, (q15_t)0x1dee, (q15_t)0x838d, (q15_t)0x1de8, (q15_t)0x838c, (q15_t)0x1de2, (q15_t)0x838a,
-  (q15_t)0x1ddc, (q15_t)0x8389, (q15_t)0x1dd6, (q15_t)0x8387, (q15_t)0x1dd0, (q15_t)0x8386, (q15_t)0x1dca, (q15_t)0x8384,
-  (q15_t)0x1dc4, (q15_t)0x8383, (q15_t)0x1dbe, (q15_t)0x8381, (q15_t)0x1db7, (q15_t)0x8380, (q15_t)0x1db1, (q15_t)0x837e,
-  (q15_t)0x1dab, (q15_t)0x837d, (q15_t)0x1da5, (q15_t)0x837c, (q15_t)0x1d9f, (q15_t)0x837a, (q15_t)0x1d99, (q15_t)0x8379,
-  (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1d8d, (q15_t)0x8376, (q15_t)0x1d87, (q15_t)0x8374, (q15_t)0x1d80, (q15_t)0x8373,
-  (q15_t)0x1d7a, (q15_t)0x8371, (q15_t)0x1d74, (q15_t)0x8370, (q15_t)0x1d6e, (q15_t)0x836f, (q15_t)0x1d68, (q15_t)0x836d,
-  (q15_t)0x1d62, (q15_t)0x836c, (q15_t)0x1d5c, (q15_t)0x836a, (q15_t)0x1d56, (q15_t)0x8369, (q15_t)0x1d50, (q15_t)0x8367,
-  (q15_t)0x1d49, (q15_t)0x8366, (q15_t)0x1d43, (q15_t)0x8364, (q15_t)0x1d3d, (q15_t)0x8363, (q15_t)0x1d37, (q15_t)0x8362,
-  (q15_t)0x1d31, (q15_t)0x8360, (q15_t)0x1d2b, (q15_t)0x835f, (q15_t)0x1d25, (q15_t)0x835d, (q15_t)0x1d1f, (q15_t)0x835c,
-  (q15_t)0x1d18, (q15_t)0x835a, (q15_t)0x1d12, (q15_t)0x8359, (q15_t)0x1d0c, (q15_t)0x8358, (q15_t)0x1d06, (q15_t)0x8356,
-  (q15_t)0x1d00, (q15_t)0x8355, (q15_t)0x1cfa, (q15_t)0x8353, (q15_t)0x1cf4, (q15_t)0x8352, (q15_t)0x1cee, (q15_t)0x8350,
-  (q15_t)0x1ce8, (q15_t)0x834f, (q15_t)0x1ce1, (q15_t)0x834e, (q15_t)0x1cdb, (q15_t)0x834c, (q15_t)0x1cd5, (q15_t)0x834b,
-  (q15_t)0x1ccf, (q15_t)0x8349, (q15_t)0x1cc9, (q15_t)0x8348, (q15_t)0x1cc3, (q15_t)0x8347, (q15_t)0x1cbd, (q15_t)0x8345,
-  (q15_t)0x1cb7, (q15_t)0x8344, (q15_t)0x1cb0, (q15_t)0x8342, (q15_t)0x1caa, (q15_t)0x8341, (q15_t)0x1ca4, (q15_t)0x833f,
-  (q15_t)0x1c9e, (q15_t)0x833e, (q15_t)0x1c98, (q15_t)0x833d, (q15_t)0x1c92, (q15_t)0x833b, (q15_t)0x1c8c, (q15_t)0x833a,
-  (q15_t)0x1c86, (q15_t)0x8338, (q15_t)0x1c7f, (q15_t)0x8337, (q15_t)0x1c79, (q15_t)0x8336, (q15_t)0x1c73, (q15_t)0x8334,
-  (q15_t)0x1c6d, (q15_t)0x8333, (q15_t)0x1c67, (q15_t)0x8331, (q15_t)0x1c61, (q15_t)0x8330, (q15_t)0x1c5b, (q15_t)0x832f,
-  (q15_t)0x1c55, (q15_t)0x832d, (q15_t)0x1c4e, (q15_t)0x832c, (q15_t)0x1c48, (q15_t)0x832b, (q15_t)0x1c42, (q15_t)0x8329,
-  (q15_t)0x1c3c, (q15_t)0x8328, (q15_t)0x1c36, (q15_t)0x8326, (q15_t)0x1c30, (q15_t)0x8325, (q15_t)0x1c2a, (q15_t)0x8324,
-  (q15_t)0x1c24, (q15_t)0x8322, (q15_t)0x1c1d, (q15_t)0x8321, (q15_t)0x1c17, (q15_t)0x831f, (q15_t)0x1c11, (q15_t)0x831e,
-  (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1c05, (q15_t)0x831b, (q15_t)0x1bff, (q15_t)0x831a, (q15_t)0x1bf9, (q15_t)0x8319,
-  (q15_t)0x1bf2, (q15_t)0x8317, (q15_t)0x1bec, (q15_t)0x8316, (q15_t)0x1be6, (q15_t)0x8314, (q15_t)0x1be0, (q15_t)0x8313,
-  (q15_t)0x1bda, (q15_t)0x8312, (q15_t)0x1bd4, (q15_t)0x8310, (q15_t)0x1bce, (q15_t)0x830f, (q15_t)0x1bc8, (q15_t)0x830e,
-  (q15_t)0x1bc1, (q15_t)0x830c, (q15_t)0x1bbb, (q15_t)0x830b, (q15_t)0x1bb5, (q15_t)0x830a, (q15_t)0x1baf, (q15_t)0x8308,
-  (q15_t)0x1ba9, (q15_t)0x8307, (q15_t)0x1ba3, (q15_t)0x8305, (q15_t)0x1b9d, (q15_t)0x8304, (q15_t)0x1b96, (q15_t)0x8303,
-  (q15_t)0x1b90, (q15_t)0x8301, (q15_t)0x1b8a, (q15_t)0x8300, (q15_t)0x1b84, (q15_t)0x82ff, (q15_t)0x1b7e, (q15_t)0x82fd,
-  (q15_t)0x1b78, (q15_t)0x82fc, (q15_t)0x1b72, (q15_t)0x82fb, (q15_t)0x1b6c, (q15_t)0x82f9, (q15_t)0x1b65, (q15_t)0x82f8,
-  (q15_t)0x1b5f, (q15_t)0x82f7, (q15_t)0x1b59, (q15_t)0x82f5, (q15_t)0x1b53, (q15_t)0x82f4, (q15_t)0x1b4d, (q15_t)0x82f3,
-  (q15_t)0x1b47, (q15_t)0x82f1, (q15_t)0x1b41, (q15_t)0x82f0, (q15_t)0x1b3a, (q15_t)0x82ef, (q15_t)0x1b34, (q15_t)0x82ed,
-  (q15_t)0x1b2e, (q15_t)0x82ec, (q15_t)0x1b28, (q15_t)0x82eb, (q15_t)0x1b22, (q15_t)0x82e9, (q15_t)0x1b1c, (q15_t)0x82e8,
-  (q15_t)0x1b16, (q15_t)0x82e7, (q15_t)0x1b0f, (q15_t)0x82e5, (q15_t)0x1b09, (q15_t)0x82e4, (q15_t)0x1b03, (q15_t)0x82e3,
-  (q15_t)0x1afd, (q15_t)0x82e1, (q15_t)0x1af7, (q15_t)0x82e0, (q15_t)0x1af1, (q15_t)0x82df, (q15_t)0x1aeb, (q15_t)0x82dd,
-  (q15_t)0x1ae4, (q15_t)0x82dc, (q15_t)0x1ade, (q15_t)0x82db, (q15_t)0x1ad8, (q15_t)0x82d9, (q15_t)0x1ad2, (q15_t)0x82d8,
-  (q15_t)0x1acc, (q15_t)0x82d7, (q15_t)0x1ac6, (q15_t)0x82d5, (q15_t)0x1ac0, (q15_t)0x82d4, (q15_t)0x1ab9, (q15_t)0x82d3,
-  (q15_t)0x1ab3, (q15_t)0x82d1, (q15_t)0x1aad, (q15_t)0x82d0, (q15_t)0x1aa7, (q15_t)0x82cf, (q15_t)0x1aa1, (q15_t)0x82ce,
-  (q15_t)0x1a9b, (q15_t)0x82cc, (q15_t)0x1a95, (q15_t)0x82cb, (q15_t)0x1a8e, (q15_t)0x82ca, (q15_t)0x1a88, (q15_t)0x82c8,
-  (q15_t)0x1a82, (q15_t)0x82c7, (q15_t)0x1a7c, (q15_t)0x82c6, (q15_t)0x1a76, (q15_t)0x82c4, (q15_t)0x1a70, (q15_t)0x82c3,
-  (q15_t)0x1a6a, (q15_t)0x82c2, (q15_t)0x1a63, (q15_t)0x82c1, (q15_t)0x1a5d, (q15_t)0x82bf, (q15_t)0x1a57, (q15_t)0x82be,
-  (q15_t)0x1a51, (q15_t)0x82bd, (q15_t)0x1a4b, (q15_t)0x82bb, (q15_t)0x1a45, (q15_t)0x82ba, (q15_t)0x1a3e, (q15_t)0x82b9,
-  (q15_t)0x1a38, (q15_t)0x82b7, (q15_t)0x1a32, (q15_t)0x82b6, (q15_t)0x1a2c, (q15_t)0x82b5, (q15_t)0x1a26, (q15_t)0x82b4,
-  (q15_t)0x1a20, (q15_t)0x82b2, (q15_t)0x1a1a, (q15_t)0x82b1, (q15_t)0x1a13, (q15_t)0x82b0, (q15_t)0x1a0d, (q15_t)0x82ae,
-  (q15_t)0x1a07, (q15_t)0x82ad, (q15_t)0x1a01, (q15_t)0x82ac, (q15_t)0x19fb, (q15_t)0x82ab, (q15_t)0x19f5, (q15_t)0x82a9,
-  (q15_t)0x19ef, (q15_t)0x82a8, (q15_t)0x19e8, (q15_t)0x82a7, (q15_t)0x19e2, (q15_t)0x82a6, (q15_t)0x19dc, (q15_t)0x82a4,
-  (q15_t)0x19d6, (q15_t)0x82a3, (q15_t)0x19d0, (q15_t)0x82a2, (q15_t)0x19ca, (q15_t)0x82a0, (q15_t)0x19c3, (q15_t)0x829f,
-  (q15_t)0x19bd, (q15_t)0x829e, (q15_t)0x19b7, (q15_t)0x829d, (q15_t)0x19b1, (q15_t)0x829b, (q15_t)0x19ab, (q15_t)0x829a,
-  (q15_t)0x19a5, (q15_t)0x8299, (q15_t)0x199f, (q15_t)0x8298, (q15_t)0x1998, (q15_t)0x8296, (q15_t)0x1992, (q15_t)0x8295,
-  (q15_t)0x198c, (q15_t)0x8294, (q15_t)0x1986, (q15_t)0x8293, (q15_t)0x1980, (q15_t)0x8291, (q15_t)0x197a, (q15_t)0x8290,
-  (q15_t)0x1973, (q15_t)0x828f, (q15_t)0x196d, (q15_t)0x828e, (q15_t)0x1967, (q15_t)0x828c, (q15_t)0x1961, (q15_t)0x828b,
-  (q15_t)0x195b, (q15_t)0x828a, (q15_t)0x1955, (q15_t)0x8289, (q15_t)0x194e, (q15_t)0x8287, (q15_t)0x1948, (q15_t)0x8286,
-  (q15_t)0x1942, (q15_t)0x8285, (q15_t)0x193c, (q15_t)0x8284, (q15_t)0x1936, (q15_t)0x8282, (q15_t)0x1930, (q15_t)0x8281,
-  (q15_t)0x192a, (q15_t)0x8280, (q15_t)0x1923, (q15_t)0x827f, (q15_t)0x191d, (q15_t)0x827e, (q15_t)0x1917, (q15_t)0x827c,
-  (q15_t)0x1911, (q15_t)0x827b, (q15_t)0x190b, (q15_t)0x827a, (q15_t)0x1905, (q15_t)0x8279, (q15_t)0x18fe, (q15_t)0x8277,
-  (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x18f2, (q15_t)0x8275, (q15_t)0x18ec, (q15_t)0x8274, (q15_t)0x18e6, (q15_t)0x8272,
-  (q15_t)0x18e0, (q15_t)0x8271, (q15_t)0x18d9, (q15_t)0x8270, (q15_t)0x18d3, (q15_t)0x826f, (q15_t)0x18cd, (q15_t)0x826e,
-  (q15_t)0x18c7, (q15_t)0x826c, (q15_t)0x18c1, (q15_t)0x826b, (q15_t)0x18bb, (q15_t)0x826a, (q15_t)0x18b4, (q15_t)0x8269,
-  (q15_t)0x18ae, (q15_t)0x8268, (q15_t)0x18a8, (q15_t)0x8266, (q15_t)0x18a2, (q15_t)0x8265, (q15_t)0x189c, (q15_t)0x8264,
-  (q15_t)0x1896, (q15_t)0x8263, (q15_t)0x188f, (q15_t)0x8261, (q15_t)0x1889, (q15_t)0x8260, (q15_t)0x1883, (q15_t)0x825f,
-  (q15_t)0x187d, (q15_t)0x825e, (q15_t)0x1877, (q15_t)0x825d, (q15_t)0x1871, (q15_t)0x825b, (q15_t)0x186a, (q15_t)0x825a,
-  (q15_t)0x1864, (q15_t)0x8259, (q15_t)0x185e, (q15_t)0x8258, (q15_t)0x1858, (q15_t)0x8257, (q15_t)0x1852, (q15_t)0x8255,
-  (q15_t)0x184c, (q15_t)0x8254, (q15_t)0x1845, (q15_t)0x8253, (q15_t)0x183f, (q15_t)0x8252, (q15_t)0x1839, (q15_t)0x8251,
-  (q15_t)0x1833, (q15_t)0x8250, (q15_t)0x182d, (q15_t)0x824e, (q15_t)0x1827, (q15_t)0x824d, (q15_t)0x1820, (q15_t)0x824c,
-  (q15_t)0x181a, (q15_t)0x824b, (q15_t)0x1814, (q15_t)0x824a, (q15_t)0x180e, (q15_t)0x8248, (q15_t)0x1808, (q15_t)0x8247,
-  (q15_t)0x1802, (q15_t)0x8246, (q15_t)0x17fb, (q15_t)0x8245, (q15_t)0x17f5, (q15_t)0x8244, (q15_t)0x17ef, (q15_t)0x8243,
-  (q15_t)0x17e9, (q15_t)0x8241, (q15_t)0x17e3, (q15_t)0x8240, (q15_t)0x17dd, (q15_t)0x823f, (q15_t)0x17d6, (q15_t)0x823e,
-  (q15_t)0x17d0, (q15_t)0x823d, (q15_t)0x17ca, (q15_t)0x823b, (q15_t)0x17c4, (q15_t)0x823a, (q15_t)0x17be, (q15_t)0x8239,
-  (q15_t)0x17b7, (q15_t)0x8238, (q15_t)0x17b1, (q15_t)0x8237, (q15_t)0x17ab, (q15_t)0x8236, (q15_t)0x17a5, (q15_t)0x8234,
-  (q15_t)0x179f, (q15_t)0x8233, (q15_t)0x1799, (q15_t)0x8232, (q15_t)0x1792, (q15_t)0x8231, (q15_t)0x178c, (q15_t)0x8230,
-  (q15_t)0x1786, (q15_t)0x822f, (q15_t)0x1780, (q15_t)0x822e, (q15_t)0x177a, (q15_t)0x822c, (q15_t)0x1774, (q15_t)0x822b,
-  (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x1767, (q15_t)0x8229, (q15_t)0x1761, (q15_t)0x8228, (q15_t)0x175b, (q15_t)0x8227,
-  (q15_t)0x1755, (q15_t)0x8226, (q15_t)0x174e, (q15_t)0x8224, (q15_t)0x1748, (q15_t)0x8223, (q15_t)0x1742, (q15_t)0x8222,
-  (q15_t)0x173c, (q15_t)0x8221, (q15_t)0x1736, (q15_t)0x8220, (q15_t)0x1730, (q15_t)0x821f, (q15_t)0x1729, (q15_t)0x821e,
-  (q15_t)0x1723, (q15_t)0x821c, (q15_t)0x171d, (q15_t)0x821b, (q15_t)0x1717, (q15_t)0x821a, (q15_t)0x1711, (q15_t)0x8219,
-  (q15_t)0x170a, (q15_t)0x8218, (q15_t)0x1704, (q15_t)0x8217, (q15_t)0x16fe, (q15_t)0x8216, (q15_t)0x16f8, (q15_t)0x8214,
-  (q15_t)0x16f2, (q15_t)0x8213, (q15_t)0x16ec, (q15_t)0x8212, (q15_t)0x16e5, (q15_t)0x8211, (q15_t)0x16df, (q15_t)0x8210,
-  (q15_t)0x16d9, (q15_t)0x820f, (q15_t)0x16d3, (q15_t)0x820e, (q15_t)0x16cd, (q15_t)0x820d, (q15_t)0x16c6, (q15_t)0x820b,
-  (q15_t)0x16c0, (q15_t)0x820a, (q15_t)0x16ba, (q15_t)0x8209, (q15_t)0x16b4, (q15_t)0x8208, (q15_t)0x16ae, (q15_t)0x8207,
-  (q15_t)0x16a8, (q15_t)0x8206, (q15_t)0x16a1, (q15_t)0x8205, (q15_t)0x169b, (q15_t)0x8204, (q15_t)0x1695, (q15_t)0x8203,
-  (q15_t)0x168f, (q15_t)0x8201, (q15_t)0x1689, (q15_t)0x8200, (q15_t)0x1682, (q15_t)0x81ff, (q15_t)0x167c, (q15_t)0x81fe,
-  (q15_t)0x1676, (q15_t)0x81fd, (q15_t)0x1670, (q15_t)0x81fc, (q15_t)0x166a, (q15_t)0x81fb, (q15_t)0x1664, (q15_t)0x81fa,
-  (q15_t)0x165d, (q15_t)0x81f9, (q15_t)0x1657, (q15_t)0x81f8, (q15_t)0x1651, (q15_t)0x81f6, (q15_t)0x164b, (q15_t)0x81f5,
-  (q15_t)0x1645, (q15_t)0x81f4, (q15_t)0x163e, (q15_t)0x81f3, (q15_t)0x1638, (q15_t)0x81f2, (q15_t)0x1632, (q15_t)0x81f1,
-  (q15_t)0x162c, (q15_t)0x81f0, (q15_t)0x1626, (q15_t)0x81ef, (q15_t)0x161f, (q15_t)0x81ee, (q15_t)0x1619, (q15_t)0x81ed,
-  (q15_t)0x1613, (q15_t)0x81ec, (q15_t)0x160d, (q15_t)0x81ea, (q15_t)0x1607, (q15_t)0x81e9, (q15_t)0x1601, (q15_t)0x81e8,
-  (q15_t)0x15fa, (q15_t)0x81e7, (q15_t)0x15f4, (q15_t)0x81e6, (q15_t)0x15ee, (q15_t)0x81e5, (q15_t)0x15e8, (q15_t)0x81e4,
-  (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x15db, (q15_t)0x81e2, (q15_t)0x15d5, (q15_t)0x81e1, (q15_t)0x15cf, (q15_t)0x81e0,
-  (q15_t)0x15c9, (q15_t)0x81df, (q15_t)0x15c3, (q15_t)0x81de, (q15_t)0x15bc, (q15_t)0x81dc, (q15_t)0x15b6, (q15_t)0x81db,
-  (q15_t)0x15b0, (q15_t)0x81da, (q15_t)0x15aa, (q15_t)0x81d9, (q15_t)0x15a4, (q15_t)0x81d8, (q15_t)0x159d, (q15_t)0x81d7,
-  (q15_t)0x1597, (q15_t)0x81d6, (q15_t)0x1591, (q15_t)0x81d5, (q15_t)0x158b, (q15_t)0x81d4, (q15_t)0x1585, (q15_t)0x81d3,
-  (q15_t)0x157f, (q15_t)0x81d2, (q15_t)0x1578, (q15_t)0x81d1, (q15_t)0x1572, (q15_t)0x81d0, (q15_t)0x156c, (q15_t)0x81cf,
-  (q15_t)0x1566, (q15_t)0x81ce, (q15_t)0x1560, (q15_t)0x81cd, (q15_t)0x1559, (q15_t)0x81cc, (q15_t)0x1553, (q15_t)0x81cb,
-  (q15_t)0x154d, (q15_t)0x81c9, (q15_t)0x1547, (q15_t)0x81c8, (q15_t)0x1541, (q15_t)0x81c7, (q15_t)0x153a, (q15_t)0x81c6,
-  (q15_t)0x1534, (q15_t)0x81c5, (q15_t)0x152e, (q15_t)0x81c4, (q15_t)0x1528, (q15_t)0x81c3, (q15_t)0x1522, (q15_t)0x81c2,
-  (q15_t)0x151b, (q15_t)0x81c1, (q15_t)0x1515, (q15_t)0x81c0, (q15_t)0x150f, (q15_t)0x81bf, (q15_t)0x1509, (q15_t)0x81be,
-  (q15_t)0x1503, (q15_t)0x81bd, (q15_t)0x14fc, (q15_t)0x81bc, (q15_t)0x14f6, (q15_t)0x81bb, (q15_t)0x14f0, (q15_t)0x81ba,
-  (q15_t)0x14ea, (q15_t)0x81b9, (q15_t)0x14e4, (q15_t)0x81b8, (q15_t)0x14dd, (q15_t)0x81b7, (q15_t)0x14d7, (q15_t)0x81b6,
-  (q15_t)0x14d1, (q15_t)0x81b5, (q15_t)0x14cb, (q15_t)0x81b4, (q15_t)0x14c5, (q15_t)0x81b3, (q15_t)0x14be, (q15_t)0x81b2,
-  (q15_t)0x14b8, (q15_t)0x81b1, (q15_t)0x14b2, (q15_t)0x81b0, (q15_t)0x14ac, (q15_t)0x81af, (q15_t)0x14a6, (q15_t)0x81ae,
-  (q15_t)0x149f, (q15_t)0x81ad, (q15_t)0x1499, (q15_t)0x81ac, (q15_t)0x1493, (q15_t)0x81ab, (q15_t)0x148d, (q15_t)0x81aa,
-  (q15_t)0x1487, (q15_t)0x81a9, (q15_t)0x1480, (q15_t)0x81a8, (q15_t)0x147a, (q15_t)0x81a7, (q15_t)0x1474, (q15_t)0x81a6,
-  (q15_t)0x146e, (q15_t)0x81a5, (q15_t)0x1468, (q15_t)0x81a4, (q15_t)0x1461, (q15_t)0x81a3, (q15_t)0x145b, (q15_t)0x81a2,
-  (q15_t)0x1455, (q15_t)0x81a1, (q15_t)0x144f, (q15_t)0x81a0, (q15_t)0x1449, (q15_t)0x819f, (q15_t)0x1442, (q15_t)0x819e,
-  (q15_t)0x143c, (q15_t)0x819d, (q15_t)0x1436, (q15_t)0x819c, (q15_t)0x1430, (q15_t)0x819b, (q15_t)0x142a, (q15_t)0x819a,
-  (q15_t)0x1423, (q15_t)0x8199, (q15_t)0x141d, (q15_t)0x8198, (q15_t)0x1417, (q15_t)0x8197, (q15_t)0x1411, (q15_t)0x8196,
-  (q15_t)0x140b, (q15_t)0x8195, (q15_t)0x1404, (q15_t)0x8194, (q15_t)0x13fe, (q15_t)0x8193, (q15_t)0x13f8, (q15_t)0x8192,
-  (q15_t)0x13f2, (q15_t)0x8191, (q15_t)0x13eb, (q15_t)0x8190, (q15_t)0x13e5, (q15_t)0x818f, (q15_t)0x13df, (q15_t)0x818e,
-  (q15_t)0x13d9, (q15_t)0x818d, (q15_t)0x13d3, (q15_t)0x818c, (q15_t)0x13cc, (q15_t)0x818b, (q15_t)0x13c6, (q15_t)0x818a,
-  (q15_t)0x13c0, (q15_t)0x8189, (q15_t)0x13ba, (q15_t)0x8188, (q15_t)0x13b4, (q15_t)0x8187, (q15_t)0x13ad, (q15_t)0x8186,
-  (q15_t)0x13a7, (q15_t)0x8185, (q15_t)0x13a1, (q15_t)0x8184, (q15_t)0x139b, (q15_t)0x8183, (q15_t)0x1395, (q15_t)0x8182,
-  (q15_t)0x138e, (q15_t)0x8181, (q15_t)0x1388, (q15_t)0x8180, (q15_t)0x1382, (q15_t)0x817f, (q15_t)0x137c, (q15_t)0x817e,
-  (q15_t)0x1376, (q15_t)0x817d, (q15_t)0x136f, (q15_t)0x817c, (q15_t)0x1369, (q15_t)0x817c, (q15_t)0x1363, (q15_t)0x817b,
-  (q15_t)0x135d, (q15_t)0x817a, (q15_t)0x1356, (q15_t)0x8179, (q15_t)0x1350, (q15_t)0x8178, (q15_t)0x134a, (q15_t)0x8177,
-  (q15_t)0x1344, (q15_t)0x8176, (q15_t)0x133e, (q15_t)0x8175, (q15_t)0x1337, (q15_t)0x8174, (q15_t)0x1331, (q15_t)0x8173,
-  (q15_t)0x132b, (q15_t)0x8172, (q15_t)0x1325, (q15_t)0x8171, (q15_t)0x131f, (q15_t)0x8170, (q15_t)0x1318, (q15_t)0x816f,
-  (q15_t)0x1312, (q15_t)0x816e, (q15_t)0x130c, (q15_t)0x816d, (q15_t)0x1306, (q15_t)0x816c, (q15_t)0x12ff, (q15_t)0x816c,
-  (q15_t)0x12f9, (q15_t)0x816b, (q15_t)0x12f3, (q15_t)0x816a, (q15_t)0x12ed, (q15_t)0x8169, (q15_t)0x12e7, (q15_t)0x8168,
-  (q15_t)0x12e0, (q15_t)0x8167, (q15_t)0x12da, (q15_t)0x8166, (q15_t)0x12d4, (q15_t)0x8165, (q15_t)0x12ce, (q15_t)0x8164,
-  (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x12c1, (q15_t)0x8162, (q15_t)0x12bb, (q15_t)0x8161, (q15_t)0x12b5, (q15_t)0x8160,
-  (q15_t)0x12af, (q15_t)0x815f, (q15_t)0x12a8, (q15_t)0x815f, (q15_t)0x12a2, (q15_t)0x815e, (q15_t)0x129c, (q15_t)0x815d,
-  (q15_t)0x1296, (q15_t)0x815c, (q15_t)0x1290, (q15_t)0x815b, (q15_t)0x1289, (q15_t)0x815a, (q15_t)0x1283, (q15_t)0x8159,
-  (q15_t)0x127d, (q15_t)0x8158, (q15_t)0x1277, (q15_t)0x8157, (q15_t)0x1271, (q15_t)0x8156, (q15_t)0x126a, (q15_t)0x8155,
-  (q15_t)0x1264, (q15_t)0x8155, (q15_t)0x125e, (q15_t)0x8154, (q15_t)0x1258, (q15_t)0x8153, (q15_t)0x1251, (q15_t)0x8152,
-  (q15_t)0x124b, (q15_t)0x8151, (q15_t)0x1245, (q15_t)0x8150, (q15_t)0x123f, (q15_t)0x814f, (q15_t)0x1239, (q15_t)0x814e,
-  (q15_t)0x1232, (q15_t)0x814d, (q15_t)0x122c, (q15_t)0x814c, (q15_t)0x1226, (q15_t)0x814c, (q15_t)0x1220, (q15_t)0x814b,
-  (q15_t)0x1219, (q15_t)0x814a, (q15_t)0x1213, (q15_t)0x8149, (q15_t)0x120d, (q15_t)0x8148, (q15_t)0x1207, (q15_t)0x8147,
-  (q15_t)0x1201, (q15_t)0x8146, (q15_t)0x11fa, (q15_t)0x8145, (q15_t)0x11f4, (q15_t)0x8145, (q15_t)0x11ee, (q15_t)0x8144,
-  (q15_t)0x11e8, (q15_t)0x8143, (q15_t)0x11e1, (q15_t)0x8142, (q15_t)0x11db, (q15_t)0x8141, (q15_t)0x11d5, (q15_t)0x8140,
-  (q15_t)0x11cf, (q15_t)0x813f, (q15_t)0x11c9, (q15_t)0x813e, (q15_t)0x11c2, (q15_t)0x813d, (q15_t)0x11bc, (q15_t)0x813d,
-  (q15_t)0x11b6, (q15_t)0x813c, (q15_t)0x11b0, (q15_t)0x813b, (q15_t)0x11a9, (q15_t)0x813a, (q15_t)0x11a3, (q15_t)0x8139,
-  (q15_t)0x119d, (q15_t)0x8138, (q15_t)0x1197, (q15_t)0x8137, (q15_t)0x1191, (q15_t)0x8137, (q15_t)0x118a, (q15_t)0x8136,
-  (q15_t)0x1184, (q15_t)0x8135, (q15_t)0x117e, (q15_t)0x8134, (q15_t)0x1178, (q15_t)0x8133, (q15_t)0x1171, (q15_t)0x8132,
-  (q15_t)0x116b, (q15_t)0x8131, (q15_t)0x1165, (q15_t)0x8131, (q15_t)0x115f, (q15_t)0x8130, (q15_t)0x1159, (q15_t)0x812f,
-  (q15_t)0x1152, (q15_t)0x812e, (q15_t)0x114c, (q15_t)0x812d, (q15_t)0x1146, (q15_t)0x812c, (q15_t)0x1140, (q15_t)0x812b,
-  (q15_t)0x1139, (q15_t)0x812b, (q15_t)0x1133, (q15_t)0x812a, (q15_t)0x112d, (q15_t)0x8129, (q15_t)0x1127, (q15_t)0x8128,
-  (q15_t)0x1121, (q15_t)0x8127, (q15_t)0x111a, (q15_t)0x8126, (q15_t)0x1114, (q15_t)0x8126, (q15_t)0x110e, (q15_t)0x8125,
-  (q15_t)0x1108, (q15_t)0x8124, (q15_t)0x1101, (q15_t)0x8123, (q15_t)0x10fb, (q15_t)0x8122, (q15_t)0x10f5, (q15_t)0x8121,
-  (q15_t)0x10ef, (q15_t)0x8121, (q15_t)0x10e8, (q15_t)0x8120, (q15_t)0x10e2, (q15_t)0x811f, (q15_t)0x10dc, (q15_t)0x811e,
-  (q15_t)0x10d6, (q15_t)0x811d, (q15_t)0x10d0, (q15_t)0x811c, (q15_t)0x10c9, (q15_t)0x811c, (q15_t)0x10c3, (q15_t)0x811b,
-  (q15_t)0x10bd, (q15_t)0x811a, (q15_t)0x10b7, (q15_t)0x8119, (q15_t)0x10b0, (q15_t)0x8118, (q15_t)0x10aa, (q15_t)0x8117,
-  (q15_t)0x10a4, (q15_t)0x8117, (q15_t)0x109e, (q15_t)0x8116, (q15_t)0x1098, (q15_t)0x8115, (q15_t)0x1091, (q15_t)0x8114,
-  (q15_t)0x108b, (q15_t)0x8113, (q15_t)0x1085, (q15_t)0x8113, (q15_t)0x107f, (q15_t)0x8112, (q15_t)0x1078, (q15_t)0x8111,
-  (q15_t)0x1072, (q15_t)0x8110, (q15_t)0x106c, (q15_t)0x810f, (q15_t)0x1066, (q15_t)0x810f, (q15_t)0x105f, (q15_t)0x810e,
-  (q15_t)0x1059, (q15_t)0x810d, (q15_t)0x1053, (q15_t)0x810c, (q15_t)0x104d, (q15_t)0x810b, (q15_t)0x1047, (q15_t)0x810b,
-  (q15_t)0x1040, (q15_t)0x810a, (q15_t)0x103a, (q15_t)0x8109, (q15_t)0x1034, (q15_t)0x8108, (q15_t)0x102e, (q15_t)0x8107,
-  (q15_t)0x1027, (q15_t)0x8107, (q15_t)0x1021, (q15_t)0x8106, (q15_t)0x101b, (q15_t)0x8105, (q15_t)0x1015, (q15_t)0x8104,
-  (q15_t)0x100e, (q15_t)0x8103, (q15_t)0x1008, (q15_t)0x8103, (q15_t)0x1002, (q15_t)0x8102, (q15_t)0xffc, (q15_t)0x8101,
-  (q15_t)0xff5, (q15_t)0x8100, (q15_t)0xfef, (q15_t)0x80ff, (q15_t)0xfe9, (q15_t)0x80ff, (q15_t)0xfe3, (q15_t)0x80fe,
-  (q15_t)0xfdd, (q15_t)0x80fd, (q15_t)0xfd6, (q15_t)0x80fc, (q15_t)0xfd0, (q15_t)0x80fc, (q15_t)0xfca, (q15_t)0x80fb,
-  (q15_t)0xfc4, (q15_t)0x80fa, (q15_t)0xfbd, (q15_t)0x80f9, (q15_t)0xfb7, (q15_t)0x80f8, (q15_t)0xfb1, (q15_t)0x80f8,
-  (q15_t)0xfab, (q15_t)0x80f7, (q15_t)0xfa4, (q15_t)0x80f6, (q15_t)0xf9e, (q15_t)0x80f5, (q15_t)0xf98, (q15_t)0x80f5,
-  (q15_t)0xf92, (q15_t)0x80f4, (q15_t)0xf8b, (q15_t)0x80f3, (q15_t)0xf85, (q15_t)0x80f2, (q15_t)0xf7f, (q15_t)0x80f2,
-  (q15_t)0xf79, (q15_t)0x80f1, (q15_t)0xf73, (q15_t)0x80f0, (q15_t)0xf6c, (q15_t)0x80ef, (q15_t)0xf66, (q15_t)0x80ef,
-  (q15_t)0xf60, (q15_t)0x80ee, (q15_t)0xf5a, (q15_t)0x80ed, (q15_t)0xf53, (q15_t)0x80ec, (q15_t)0xf4d, (q15_t)0x80ec,
-  (q15_t)0xf47, (q15_t)0x80eb, (q15_t)0xf41, (q15_t)0x80ea, (q15_t)0xf3a, (q15_t)0x80e9, (q15_t)0xf34, (q15_t)0x80e9,
-  (q15_t)0xf2e, (q15_t)0x80e8, (q15_t)0xf28, (q15_t)0x80e7, (q15_t)0xf21, (q15_t)0x80e6, (q15_t)0xf1b, (q15_t)0x80e6,
-  (q15_t)0xf15, (q15_t)0x80e5, (q15_t)0xf0f, (q15_t)0x80e4, (q15_t)0xf08, (q15_t)0x80e3, (q15_t)0xf02, (q15_t)0x80e3,
-  (q15_t)0xefc, (q15_t)0x80e2, (q15_t)0xef6, (q15_t)0x80e1, (q15_t)0xef0, (q15_t)0x80e0, (q15_t)0xee9, (q15_t)0x80e0,
-  (q15_t)0xee3, (q15_t)0x80df, (q15_t)0xedd, (q15_t)0x80de, (q15_t)0xed7, (q15_t)0x80dd, (q15_t)0xed0, (q15_t)0x80dd,
-  (q15_t)0xeca, (q15_t)0x80dc, (q15_t)0xec4, (q15_t)0x80db, (q15_t)0xebe, (q15_t)0x80db, (q15_t)0xeb7, (q15_t)0x80da,
-  (q15_t)0xeb1, (q15_t)0x80d9, (q15_t)0xeab, (q15_t)0x80d8, (q15_t)0xea5, (q15_t)0x80d8, (q15_t)0xe9e, (q15_t)0x80d7,
-  (q15_t)0xe98, (q15_t)0x80d6, (q15_t)0xe92, (q15_t)0x80d6, (q15_t)0xe8c, (q15_t)0x80d5, (q15_t)0xe85, (q15_t)0x80d4,
-  (q15_t)0xe7f, (q15_t)0x80d3, (q15_t)0xe79, (q15_t)0x80d3, (q15_t)0xe73, (q15_t)0x80d2, (q15_t)0xe6c, (q15_t)0x80d1,
-  (q15_t)0xe66, (q15_t)0x80d1, (q15_t)0xe60, (q15_t)0x80d0, (q15_t)0xe5a, (q15_t)0x80cf, (q15_t)0xe53, (q15_t)0x80ce,
-  (q15_t)0xe4d, (q15_t)0x80ce, (q15_t)0xe47, (q15_t)0x80cd, (q15_t)0xe41, (q15_t)0x80cc, (q15_t)0xe3a, (q15_t)0x80cc,
-  (q15_t)0xe34, (q15_t)0x80cb, (q15_t)0xe2e, (q15_t)0x80ca, (q15_t)0xe28, (q15_t)0x80ca, (q15_t)0xe22, (q15_t)0x80c9,
-  (q15_t)0xe1b, (q15_t)0x80c8, (q15_t)0xe15, (q15_t)0x80c7, (q15_t)0xe0f, (q15_t)0x80c7, (q15_t)0xe09, (q15_t)0x80c6,
-  (q15_t)0xe02, (q15_t)0x80c5, (q15_t)0xdfc, (q15_t)0x80c5, (q15_t)0xdf6, (q15_t)0x80c4, (q15_t)0xdf0, (q15_t)0x80c3,
-  (q15_t)0xde9, (q15_t)0x80c3, (q15_t)0xde3, (q15_t)0x80c2, (q15_t)0xddd, (q15_t)0x80c1, (q15_t)0xdd7, (q15_t)0x80c1,
-  (q15_t)0xdd0, (q15_t)0x80c0, (q15_t)0xdca, (q15_t)0x80bf, (q15_t)0xdc4, (q15_t)0x80bf, (q15_t)0xdbe, (q15_t)0x80be,
-  (q15_t)0xdb7, (q15_t)0x80bd, (q15_t)0xdb1, (q15_t)0x80bd, (q15_t)0xdab, (q15_t)0x80bc, (q15_t)0xda5, (q15_t)0x80bb,
-  (q15_t)0xd9e, (q15_t)0x80bb, (q15_t)0xd98, (q15_t)0x80ba, (q15_t)0xd92, (q15_t)0x80b9, (q15_t)0xd8c, (q15_t)0x80b9,
-  (q15_t)0xd85, (q15_t)0x80b8, (q15_t)0xd7f, (q15_t)0x80b7, (q15_t)0xd79, (q15_t)0x80b7, (q15_t)0xd73, (q15_t)0x80b6,
-  (q15_t)0xd6c, (q15_t)0x80b5, (q15_t)0xd66, (q15_t)0x80b5, (q15_t)0xd60, (q15_t)0x80b4, (q15_t)0xd5a, (q15_t)0x80b3,
-  (q15_t)0xd53, (q15_t)0x80b3, (q15_t)0xd4d, (q15_t)0x80b2, (q15_t)0xd47, (q15_t)0x80b1, (q15_t)0xd41, (q15_t)0x80b1,
-  (q15_t)0xd3a, (q15_t)0x80b0, (q15_t)0xd34, (q15_t)0x80af, (q15_t)0xd2e, (q15_t)0x80af, (q15_t)0xd28, (q15_t)0x80ae,
-  (q15_t)0xd21, (q15_t)0x80ad, (q15_t)0xd1b, (q15_t)0x80ad, (q15_t)0xd15, (q15_t)0x80ac, (q15_t)0xd0f, (q15_t)0x80ab,
-  (q15_t)0xd08, (q15_t)0x80ab, (q15_t)0xd02, (q15_t)0x80aa, (q15_t)0xcfc, (q15_t)0x80aa, (q15_t)0xcf6, (q15_t)0x80a9,
-  (q15_t)0xcef, (q15_t)0x80a8, (q15_t)0xce9, (q15_t)0x80a8, (q15_t)0xce3, (q15_t)0x80a7, (q15_t)0xcdd, (q15_t)0x80a6,
-  (q15_t)0xcd6, (q15_t)0x80a6, (q15_t)0xcd0, (q15_t)0x80a5, (q15_t)0xcca, (q15_t)0x80a5, (q15_t)0xcc4, (q15_t)0x80a4,
-  (q15_t)0xcbd, (q15_t)0x80a3, (q15_t)0xcb7, (q15_t)0x80a3, (q15_t)0xcb1, (q15_t)0x80a2, (q15_t)0xcab, (q15_t)0x80a1,
-  (q15_t)0xca4, (q15_t)0x80a1, (q15_t)0xc9e, (q15_t)0x80a0, (q15_t)0xc98, (q15_t)0x80a0, (q15_t)0xc92, (q15_t)0x809f,
-  (q15_t)0xc8b, (q15_t)0x809e, (q15_t)0xc85, (q15_t)0x809e, (q15_t)0xc7f, (q15_t)0x809d, (q15_t)0xc79, (q15_t)0x809c,
-  (q15_t)0xc72, (q15_t)0x809c, (q15_t)0xc6c, (q15_t)0x809b, (q15_t)0xc66, (q15_t)0x809b, (q15_t)0xc60, (q15_t)0x809a,
-  (q15_t)0xc59, (q15_t)0x8099, (q15_t)0xc53, (q15_t)0x8099, (q15_t)0xc4d, (q15_t)0x8098, (q15_t)0xc47, (q15_t)0x8098,
-  (q15_t)0xc40, (q15_t)0x8097, (q15_t)0xc3a, (q15_t)0x8096, (q15_t)0xc34, (q15_t)0x8096, (q15_t)0xc2e, (q15_t)0x8095,
-  (q15_t)0xc27, (q15_t)0x8095, (q15_t)0xc21, (q15_t)0x8094, (q15_t)0xc1b, (q15_t)0x8093, (q15_t)0xc14, (q15_t)0x8093,
-  (q15_t)0xc0e, (q15_t)0x8092, (q15_t)0xc08, (q15_t)0x8092, (q15_t)0xc02, (q15_t)0x8091, (q15_t)0xbfb, (q15_t)0x8090,
-  (q15_t)0xbf5, (q15_t)0x8090, (q15_t)0xbef, (q15_t)0x808f, (q15_t)0xbe9, (q15_t)0x808f, (q15_t)0xbe2, (q15_t)0x808e,
-  (q15_t)0xbdc, (q15_t)0x808e, (q15_t)0xbd6, (q15_t)0x808d, (q15_t)0xbd0, (q15_t)0x808c, (q15_t)0xbc9, (q15_t)0x808c,
-  (q15_t)0xbc3, (q15_t)0x808b, (q15_t)0xbbd, (q15_t)0x808b, (q15_t)0xbb7, (q15_t)0x808a, (q15_t)0xbb0, (q15_t)0x8089,
-  (q15_t)0xbaa, (q15_t)0x8089, (q15_t)0xba4, (q15_t)0x8088, (q15_t)0xb9e, (q15_t)0x8088, (q15_t)0xb97, (q15_t)0x8087,
-  (q15_t)0xb91, (q15_t)0x8087, (q15_t)0xb8b, (q15_t)0x8086, (q15_t)0xb85, (q15_t)0x8085, (q15_t)0xb7e, (q15_t)0x8085,
-  (q15_t)0xb78, (q15_t)0x8084, (q15_t)0xb72, (q15_t)0x8084, (q15_t)0xb6c, (q15_t)0x8083, (q15_t)0xb65, (q15_t)0x8083,
-  (q15_t)0xb5f, (q15_t)0x8082, (q15_t)0xb59, (q15_t)0x8082, (q15_t)0xb53, (q15_t)0x8081, (q15_t)0xb4c, (q15_t)0x8080,
-  (q15_t)0xb46, (q15_t)0x8080, (q15_t)0xb40, (q15_t)0x807f, (q15_t)0xb3a, (q15_t)0x807f, (q15_t)0xb33, (q15_t)0x807e,
-  (q15_t)0xb2d, (q15_t)0x807e, (q15_t)0xb27, (q15_t)0x807d, (q15_t)0xb20, (q15_t)0x807d, (q15_t)0xb1a, (q15_t)0x807c,
-  (q15_t)0xb14, (q15_t)0x807b, (q15_t)0xb0e, (q15_t)0x807b, (q15_t)0xb07, (q15_t)0x807a, (q15_t)0xb01, (q15_t)0x807a,
-  (q15_t)0xafb, (q15_t)0x8079, (q15_t)0xaf5, (q15_t)0x8079, (q15_t)0xaee, (q15_t)0x8078, (q15_t)0xae8, (q15_t)0x8078,
-  (q15_t)0xae2, (q15_t)0x8077, (q15_t)0xadc, (q15_t)0x8077, (q15_t)0xad5, (q15_t)0x8076, (q15_t)0xacf, (q15_t)0x8076,
-  (q15_t)0xac9, (q15_t)0x8075, (q15_t)0xac3, (q15_t)0x8075, (q15_t)0xabc, (q15_t)0x8074, (q15_t)0xab6, (q15_t)0x8073,
-  (q15_t)0xab0, (q15_t)0x8073, (q15_t)0xaaa, (q15_t)0x8072, (q15_t)0xaa3, (q15_t)0x8072, (q15_t)0xa9d, (q15_t)0x8071,
-  (q15_t)0xa97, (q15_t)0x8071, (q15_t)0xa90, (q15_t)0x8070, (q15_t)0xa8a, (q15_t)0x8070, (q15_t)0xa84, (q15_t)0x806f,
-  (q15_t)0xa7e, (q15_t)0x806f, (q15_t)0xa77, (q15_t)0x806e, (q15_t)0xa71, (q15_t)0x806e, (q15_t)0xa6b, (q15_t)0x806d,
-  (q15_t)0xa65, (q15_t)0x806d, (q15_t)0xa5e, (q15_t)0x806c, (q15_t)0xa58, (q15_t)0x806c, (q15_t)0xa52, (q15_t)0x806b,
-  (q15_t)0xa4c, (q15_t)0x806b, (q15_t)0xa45, (q15_t)0x806a, (q15_t)0xa3f, (q15_t)0x806a, (q15_t)0xa39, (q15_t)0x8069,
-  (q15_t)0xa33, (q15_t)0x8069, (q15_t)0xa2c, (q15_t)0x8068, (q15_t)0xa26, (q15_t)0x8068, (q15_t)0xa20, (q15_t)0x8067,
-  (q15_t)0xa19, (q15_t)0x8067, (q15_t)0xa13, (q15_t)0x8066, (q15_t)0xa0d, (q15_t)0x8066, (q15_t)0xa07, (q15_t)0x8065,
-  (q15_t)0xa00, (q15_t)0x8065, (q15_t)0x9fa, (q15_t)0x8064, (q15_t)0x9f4, (q15_t)0x8064, (q15_t)0x9ee, (q15_t)0x8063,
-  (q15_t)0x9e7, (q15_t)0x8063, (q15_t)0x9e1, (q15_t)0x8062, (q15_t)0x9db, (q15_t)0x8062, (q15_t)0x9d5, (q15_t)0x8061,
-  (q15_t)0x9ce, (q15_t)0x8061, (q15_t)0x9c8, (q15_t)0x8060, (q15_t)0x9c2, (q15_t)0x8060, (q15_t)0x9bc, (q15_t)0x805f,
-  (q15_t)0x9b5, (q15_t)0x805f, (q15_t)0x9af, (q15_t)0x805e, (q15_t)0x9a9, (q15_t)0x805e, (q15_t)0x9a2, (q15_t)0x805d,
-  (q15_t)0x99c, (q15_t)0x805d, (q15_t)0x996, (q15_t)0x805d, (q15_t)0x990, (q15_t)0x805c, (q15_t)0x989, (q15_t)0x805c,
-  (q15_t)0x983, (q15_t)0x805b, (q15_t)0x97d, (q15_t)0x805b, (q15_t)0x977, (q15_t)0x805a, (q15_t)0x970, (q15_t)0x805a,
-  (q15_t)0x96a, (q15_t)0x8059, (q15_t)0x964, (q15_t)0x8059, (q15_t)0x95e, (q15_t)0x8058, (q15_t)0x957, (q15_t)0x8058,
-  (q15_t)0x951, (q15_t)0x8057, (q15_t)0x94b, (q15_t)0x8057, (q15_t)0x944, (q15_t)0x8057, (q15_t)0x93e, (q15_t)0x8056,
-  (q15_t)0x938, (q15_t)0x8056, (q15_t)0x932, (q15_t)0x8055, (q15_t)0x92b, (q15_t)0x8055, (q15_t)0x925, (q15_t)0x8054,
-  (q15_t)0x91f, (q15_t)0x8054, (q15_t)0x919, (q15_t)0x8053, (q15_t)0x912, (q15_t)0x8053, (q15_t)0x90c, (q15_t)0x8052,
-  (q15_t)0x906, (q15_t)0x8052, (q15_t)0x900, (q15_t)0x8052, (q15_t)0x8f9, (q15_t)0x8051, (q15_t)0x8f3, (q15_t)0x8051,
-  (q15_t)0x8ed, (q15_t)0x8050, (q15_t)0x8e6, (q15_t)0x8050, (q15_t)0x8e0, (q15_t)0x804f, (q15_t)0x8da, (q15_t)0x804f,
-  (q15_t)0x8d4, (q15_t)0x804f, (q15_t)0x8cd, (q15_t)0x804e, (q15_t)0x8c7, (q15_t)0x804e, (q15_t)0x8c1, (q15_t)0x804d,
-  (q15_t)0x8bb, (q15_t)0x804d, (q15_t)0x8b4, (q15_t)0x804c, (q15_t)0x8ae, (q15_t)0x804c, (q15_t)0x8a8, (q15_t)0x804c,
-  (q15_t)0x8a2, (q15_t)0x804b, (q15_t)0x89b, (q15_t)0x804b, (q15_t)0x895, (q15_t)0x804a, (q15_t)0x88f, (q15_t)0x804a,
-  (q15_t)0x888, (q15_t)0x8049, (q15_t)0x882, (q15_t)0x8049, (q15_t)0x87c, (q15_t)0x8049, (q15_t)0x876, (q15_t)0x8048,
-  (q15_t)0x86f, (q15_t)0x8048, (q15_t)0x869, (q15_t)0x8047, (q15_t)0x863, (q15_t)0x8047, (q15_t)0x85d, (q15_t)0x8047,
-  (q15_t)0x856, (q15_t)0x8046, (q15_t)0x850, (q15_t)0x8046, (q15_t)0x84a, (q15_t)0x8045, (q15_t)0x843, (q15_t)0x8045,
-  (q15_t)0x83d, (q15_t)0x8044, (q15_t)0x837, (q15_t)0x8044, (q15_t)0x831, (q15_t)0x8044, (q15_t)0x82a, (q15_t)0x8043,
-  (q15_t)0x824, (q15_t)0x8043, (q15_t)0x81e, (q15_t)0x8042, (q15_t)0x818, (q15_t)0x8042, (q15_t)0x811, (q15_t)0x8042,
-  (q15_t)0x80b, (q15_t)0x8041, (q15_t)0x805, (q15_t)0x8041, (q15_t)0x7fe, (q15_t)0x8040, (q15_t)0x7f8, (q15_t)0x8040,
-  (q15_t)0x7f2, (q15_t)0x8040, (q15_t)0x7ec, (q15_t)0x803f, (q15_t)0x7e5, (q15_t)0x803f, (q15_t)0x7df, (q15_t)0x803f,
-  (q15_t)0x7d9, (q15_t)0x803e, (q15_t)0x7d3, (q15_t)0x803e, (q15_t)0x7cc, (q15_t)0x803d, (q15_t)0x7c6, (q15_t)0x803d,
-  (q15_t)0x7c0, (q15_t)0x803d, (q15_t)0x7ba, (q15_t)0x803c, (q15_t)0x7b3, (q15_t)0x803c, (q15_t)0x7ad, (q15_t)0x803b,
-  (q15_t)0x7a7, (q15_t)0x803b, (q15_t)0x7a0, (q15_t)0x803b, (q15_t)0x79a, (q15_t)0x803a, (q15_t)0x794, (q15_t)0x803a,
-  (q15_t)0x78e, (q15_t)0x803a, (q15_t)0x787, (q15_t)0x8039, (q15_t)0x781, (q15_t)0x8039, (q15_t)0x77b, (q15_t)0x8039,
-  (q15_t)0x775, (q15_t)0x8038, (q15_t)0x76e, (q15_t)0x8038, (q15_t)0x768, (q15_t)0x8037, (q15_t)0x762, (q15_t)0x8037,
-  (q15_t)0x75b, (q15_t)0x8037, (q15_t)0x755, (q15_t)0x8036, (q15_t)0x74f, (q15_t)0x8036, (q15_t)0x749, (q15_t)0x8036,
-  (q15_t)0x742, (q15_t)0x8035, (q15_t)0x73c, (q15_t)0x8035, (q15_t)0x736, (q15_t)0x8035, (q15_t)0x730, (q15_t)0x8034,
-  (q15_t)0x729, (q15_t)0x8034, (q15_t)0x723, (q15_t)0x8033, (q15_t)0x71d, (q15_t)0x8033, (q15_t)0x716, (q15_t)0x8033,
-  (q15_t)0x710, (q15_t)0x8032, (q15_t)0x70a, (q15_t)0x8032, (q15_t)0x704, (q15_t)0x8032, (q15_t)0x6fd, (q15_t)0x8031,
-  (q15_t)0x6f7, (q15_t)0x8031, (q15_t)0x6f1, (q15_t)0x8031, (q15_t)0x6ea, (q15_t)0x8030, (q15_t)0x6e4, (q15_t)0x8030,
-  (q15_t)0x6de, (q15_t)0x8030, (q15_t)0x6d8, (q15_t)0x802f, (q15_t)0x6d1, (q15_t)0x802f, (q15_t)0x6cb, (q15_t)0x802f,
-  (q15_t)0x6c5, (q15_t)0x802e, (q15_t)0x6bf, (q15_t)0x802e, (q15_t)0x6b8, (q15_t)0x802e, (q15_t)0x6b2, (q15_t)0x802d,
-  (q15_t)0x6ac, (q15_t)0x802d, (q15_t)0x6a5, (q15_t)0x802d, (q15_t)0x69f, (q15_t)0x802c, (q15_t)0x699, (q15_t)0x802c,
-  (q15_t)0x693, (q15_t)0x802c, (q15_t)0x68c, (q15_t)0x802b, (q15_t)0x686, (q15_t)0x802b, (q15_t)0x680, (q15_t)0x802b,
-  (q15_t)0x67a, (q15_t)0x802a, (q15_t)0x673, (q15_t)0x802a, (q15_t)0x66d, (q15_t)0x802a, (q15_t)0x667, (q15_t)0x802a,
-  (q15_t)0x660, (q15_t)0x8029, (q15_t)0x65a, (q15_t)0x8029, (q15_t)0x654, (q15_t)0x8029, (q15_t)0x64e, (q15_t)0x8028,
-  (q15_t)0x647, (q15_t)0x8028, (q15_t)0x641, (q15_t)0x8028, (q15_t)0x63b, (q15_t)0x8027, (q15_t)0x635, (q15_t)0x8027,
-  (q15_t)0x62e, (q15_t)0x8027, (q15_t)0x628, (q15_t)0x8026, (q15_t)0x622, (q15_t)0x8026, (q15_t)0x61b, (q15_t)0x8026,
-  (q15_t)0x615, (q15_t)0x8026, (q15_t)0x60f, (q15_t)0x8025, (q15_t)0x609, (q15_t)0x8025, (q15_t)0x602, (q15_t)0x8025,
-  (q15_t)0x5fc, (q15_t)0x8024, (q15_t)0x5f6, (q15_t)0x8024, (q15_t)0x5ef, (q15_t)0x8024, (q15_t)0x5e9, (q15_t)0x8023,
-  (q15_t)0x5e3, (q15_t)0x8023, (q15_t)0x5dd, (q15_t)0x8023, (q15_t)0x5d6, (q15_t)0x8023, (q15_t)0x5d0, (q15_t)0x8022,
-  (q15_t)0x5ca, (q15_t)0x8022, (q15_t)0x5c4, (q15_t)0x8022, (q15_t)0x5bd, (q15_t)0x8021, (q15_t)0x5b7, (q15_t)0x8021,
-  (q15_t)0x5b1, (q15_t)0x8021, (q15_t)0x5aa, (q15_t)0x8021, (q15_t)0x5a4, (q15_t)0x8020, (q15_t)0x59e, (q15_t)0x8020,
-  (q15_t)0x598, (q15_t)0x8020, (q15_t)0x591, (q15_t)0x8020, (q15_t)0x58b, (q15_t)0x801f, (q15_t)0x585, (q15_t)0x801f,
-  (q15_t)0x57f, (q15_t)0x801f, (q15_t)0x578, (q15_t)0x801e, (q15_t)0x572, (q15_t)0x801e, (q15_t)0x56c, (q15_t)0x801e,
-  (q15_t)0x565, (q15_t)0x801e, (q15_t)0x55f, (q15_t)0x801d, (q15_t)0x559, (q15_t)0x801d, (q15_t)0x553, (q15_t)0x801d,
-  (q15_t)0x54c, (q15_t)0x801d, (q15_t)0x546, (q15_t)0x801c, (q15_t)0x540, (q15_t)0x801c, (q15_t)0x539, (q15_t)0x801c,
-  (q15_t)0x533, (q15_t)0x801c, (q15_t)0x52d, (q15_t)0x801b, (q15_t)0x527, (q15_t)0x801b, (q15_t)0x520, (q15_t)0x801b,
-  (q15_t)0x51a, (q15_t)0x801b, (q15_t)0x514, (q15_t)0x801a, (q15_t)0x50d, (q15_t)0x801a, (q15_t)0x507, (q15_t)0x801a,
-  (q15_t)0x501, (q15_t)0x801a, (q15_t)0x4fb, (q15_t)0x8019, (q15_t)0x4f4, (q15_t)0x8019, (q15_t)0x4ee, (q15_t)0x8019,
-  (q15_t)0x4e8, (q15_t)0x8019, (q15_t)0x4e2, (q15_t)0x8018, (q15_t)0x4db, (q15_t)0x8018, (q15_t)0x4d5, (q15_t)0x8018,
-  (q15_t)0x4cf, (q15_t)0x8018, (q15_t)0x4c8, (q15_t)0x8017, (q15_t)0x4c2, (q15_t)0x8017, (q15_t)0x4bc, (q15_t)0x8017,
-  (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x4af, (q15_t)0x8016, (q15_t)0x4a9, (q15_t)0x8016, (q15_t)0x4a3, (q15_t)0x8016,
-  (q15_t)0x49c, (q15_t)0x8016, (q15_t)0x496, (q15_t)0x8016, (q15_t)0x490, (q15_t)0x8015, (q15_t)0x48a, (q15_t)0x8015,
-  (q15_t)0x483, (q15_t)0x8015, (q15_t)0x47d, (q15_t)0x8015, (q15_t)0x477, (q15_t)0x8014, (q15_t)0x471, (q15_t)0x8014,
-  (q15_t)0x46a, (q15_t)0x8014, (q15_t)0x464, (q15_t)0x8014, (q15_t)0x45e, (q15_t)0x8014, (q15_t)0x457, (q15_t)0x8013,
-  (q15_t)0x451, (q15_t)0x8013, (q15_t)0x44b, (q15_t)0x8013, (q15_t)0x445, (q15_t)0x8013, (q15_t)0x43e, (q15_t)0x8013,
-  (q15_t)0x438, (q15_t)0x8012, (q15_t)0x432, (q15_t)0x8012, (q15_t)0x42b, (q15_t)0x8012, (q15_t)0x425, (q15_t)0x8012,
-  (q15_t)0x41f, (q15_t)0x8012, (q15_t)0x419, (q15_t)0x8011, (q15_t)0x412, (q15_t)0x8011, (q15_t)0x40c, (q15_t)0x8011,
-  (q15_t)0x406, (q15_t)0x8011, (q15_t)0x3ff, (q15_t)0x8011, (q15_t)0x3f9, (q15_t)0x8010, (q15_t)0x3f3, (q15_t)0x8010,
-  (q15_t)0x3ed, (q15_t)0x8010, (q15_t)0x3e6, (q15_t)0x8010, (q15_t)0x3e0, (q15_t)0x8010, (q15_t)0x3da, (q15_t)0x800f,
-  (q15_t)0x3d4, (q15_t)0x800f, (q15_t)0x3cd, (q15_t)0x800f, (q15_t)0x3c7, (q15_t)0x800f, (q15_t)0x3c1, (q15_t)0x800f,
-  (q15_t)0x3ba, (q15_t)0x800e, (q15_t)0x3b4, (q15_t)0x800e, (q15_t)0x3ae, (q15_t)0x800e, (q15_t)0x3a8, (q15_t)0x800e,
-  (q15_t)0x3a1, (q15_t)0x800e, (q15_t)0x39b, (q15_t)0x800e, (q15_t)0x395, (q15_t)0x800d, (q15_t)0x38e, (q15_t)0x800d,
-  (q15_t)0x388, (q15_t)0x800d, (q15_t)0x382, (q15_t)0x800d, (q15_t)0x37c, (q15_t)0x800d, (q15_t)0x375, (q15_t)0x800c,
-  (q15_t)0x36f, (q15_t)0x800c, (q15_t)0x369, (q15_t)0x800c, (q15_t)0x362, (q15_t)0x800c, (q15_t)0x35c, (q15_t)0x800c,
-  (q15_t)0x356, (q15_t)0x800c, (q15_t)0x350, (q15_t)0x800b, (q15_t)0x349, (q15_t)0x800b, (q15_t)0x343, (q15_t)0x800b,
-  (q15_t)0x33d, (q15_t)0x800b, (q15_t)0x337, (q15_t)0x800b, (q15_t)0x330, (q15_t)0x800b, (q15_t)0x32a, (q15_t)0x800b,
-  (q15_t)0x324, (q15_t)0x800a, (q15_t)0x31d, (q15_t)0x800a, (q15_t)0x317, (q15_t)0x800a, (q15_t)0x311, (q15_t)0x800a,
-  (q15_t)0x30b, (q15_t)0x800a, (q15_t)0x304, (q15_t)0x800a, (q15_t)0x2fe, (q15_t)0x8009, (q15_t)0x2f8, (q15_t)0x8009,
-  (q15_t)0x2f1, (q15_t)0x8009, (q15_t)0x2eb, (q15_t)0x8009, (q15_t)0x2e5, (q15_t)0x8009, (q15_t)0x2df, (q15_t)0x8009,
-  (q15_t)0x2d8, (q15_t)0x8009, (q15_t)0x2d2, (q15_t)0x8008, (q15_t)0x2cc, (q15_t)0x8008, (q15_t)0x2c5, (q15_t)0x8008,
-  (q15_t)0x2bf, (q15_t)0x8008, (q15_t)0x2b9, (q15_t)0x8008, (q15_t)0x2b3, (q15_t)0x8008, (q15_t)0x2ac, (q15_t)0x8008,
-  (q15_t)0x2a6, (q15_t)0x8008, (q15_t)0x2a0, (q15_t)0x8007, (q15_t)0x299, (q15_t)0x8007, (q15_t)0x293, (q15_t)0x8007,
-  (q15_t)0x28d, (q15_t)0x8007, (q15_t)0x287, (q15_t)0x8007, (q15_t)0x280, (q15_t)0x8007, (q15_t)0x27a, (q15_t)0x8007,
-  (q15_t)0x274, (q15_t)0x8007, (q15_t)0x26d, (q15_t)0x8006, (q15_t)0x267, (q15_t)0x8006, (q15_t)0x261, (q15_t)0x8006,
-  (q15_t)0x25b, (q15_t)0x8006, (q15_t)0x254, (q15_t)0x8006, (q15_t)0x24e, (q15_t)0x8006, (q15_t)0x248, (q15_t)0x8006,
-  (q15_t)0x242, (q15_t)0x8006, (q15_t)0x23b, (q15_t)0x8005, (q15_t)0x235, (q15_t)0x8005, (q15_t)0x22f, (q15_t)0x8005,
-  (q15_t)0x228, (q15_t)0x8005, (q15_t)0x222, (q15_t)0x8005, (q15_t)0x21c, (q15_t)0x8005, (q15_t)0x216, (q15_t)0x8005,
-  (q15_t)0x20f, (q15_t)0x8005, (q15_t)0x209, (q15_t)0x8005, (q15_t)0x203, (q15_t)0x8005, (q15_t)0x1fc, (q15_t)0x8004,
-  (q15_t)0x1f6, (q15_t)0x8004, (q15_t)0x1f0, (q15_t)0x8004, (q15_t)0x1ea, (q15_t)0x8004, (q15_t)0x1e3, (q15_t)0x8004,
-  (q15_t)0x1dd, (q15_t)0x8004, (q15_t)0x1d7, (q15_t)0x8004, (q15_t)0x1d0, (q15_t)0x8004, (q15_t)0x1ca, (q15_t)0x8004,
-  (q15_t)0x1c4, (q15_t)0x8004, (q15_t)0x1be, (q15_t)0x8004, (q15_t)0x1b7, (q15_t)0x8003, (q15_t)0x1b1, (q15_t)0x8003,
-  (q15_t)0x1ab, (q15_t)0x8003, (q15_t)0x1a4, (q15_t)0x8003, (q15_t)0x19e, (q15_t)0x8003, (q15_t)0x198, (q15_t)0x8003,
-  (q15_t)0x192, (q15_t)0x8003, (q15_t)0x18b, (q15_t)0x8003, (q15_t)0x185, (q15_t)0x8003, (q15_t)0x17f, (q15_t)0x8003,
-  (q15_t)0x178, (q15_t)0x8003, (q15_t)0x172, (q15_t)0x8003, (q15_t)0x16c, (q15_t)0x8003, (q15_t)0x166, (q15_t)0x8002,
-  (q15_t)0x15f, (q15_t)0x8002, (q15_t)0x159, (q15_t)0x8002, (q15_t)0x153, (q15_t)0x8002, (q15_t)0x14d, (q15_t)0x8002,
-  (q15_t)0x146, (q15_t)0x8002, (q15_t)0x140, (q15_t)0x8002, (q15_t)0x13a, (q15_t)0x8002, (q15_t)0x133, (q15_t)0x8002,
-  (q15_t)0x12d, (q15_t)0x8002, (q15_t)0x127, (q15_t)0x8002, (q15_t)0x121, (q15_t)0x8002, (q15_t)0x11a, (q15_t)0x8002,
-  (q15_t)0x114, (q15_t)0x8002, (q15_t)0x10e, (q15_t)0x8002, (q15_t)0x107, (q15_t)0x8002, (q15_t)0x101, (q15_t)0x8002,
-  (q15_t)0xfb, (q15_t)0x8001, (q15_t)0xf5, (q15_t)0x8001, (q15_t)0xee, (q15_t)0x8001, (q15_t)0xe8, (q15_t)0x8001,
-  (q15_t)0xe2, (q15_t)0x8001, (q15_t)0xdb, (q15_t)0x8001, (q15_t)0xd5, (q15_t)0x8001, (q15_t)0xcf, (q15_t)0x8001,
-  (q15_t)0xc9, (q15_t)0x8001, (q15_t)0xc2, (q15_t)0x8001, (q15_t)0xbc, (q15_t)0x8001, (q15_t)0xb6, (q15_t)0x8001,
-  (q15_t)0xaf, (q15_t)0x8001, (q15_t)0xa9, (q15_t)0x8001, (q15_t)0xa3, (q15_t)0x8001, (q15_t)0x9d, (q15_t)0x8001,
-  (q15_t)0x96, (q15_t)0x8001, (q15_t)0x90, (q15_t)0x8001, (q15_t)0x8a, (q15_t)0x8001, (q15_t)0x83, (q15_t)0x8001,
-  (q15_t)0x7d, (q15_t)0x8001, (q15_t)0x77, (q15_t)0x8001, (q15_t)0x71, (q15_t)0x8001, (q15_t)0x6a, (q15_t)0x8001,
-  (q15_t)0x64, (q15_t)0x8001, (q15_t)0x5e, (q15_t)0x8001, (q15_t)0x57, (q15_t)0x8001, (q15_t)0x51, (q15_t)0x8001,
-  (q15_t)0x4b, (q15_t)0x8001, (q15_t)0x45, (q15_t)0x8001, (q15_t)0x3e, (q15_t)0x8001, (q15_t)0x38, (q15_t)0x8001,
-  (q15_t)0x32, (q15_t)0x8001, (q15_t)0x2b, (q15_t)0x8001, (q15_t)0x25, (q15_t)0x8001, (q15_t)0x1f, (q15_t)0x8001,
-  (q15_t)0x19, (q15_t)0x8001, (q15_t)0x12, (q15_t)0x8001, (q15_t)0xc, (q15_t)0x8001, (q15_t)0x6, (q15_t)0x8001
-};
-
-
-/**
-* \par
-* cosFactor tables are generated using the formula : <pre> cos_factors[n] = 2 * cos((2n+1)*pi/(4*N)) </pre>
-* \par
-* C command to generate the table
-* <pre>
-* for(i = 0; i< N; i++)
-* {
-*   cos_factors[i]= 2 * cos((2*i+1)*c/2);
-* } </pre>
-* \par
-* where <code>N</code> is the number of factors to generate and <code>c</code> is <code>pi/(2*N)</code>
-* \par
-* Then converted to q15 format by multiplying with 2^31 and saturated if required.
-
-*/
-
-static const q15_t ALIGN4 cos_factorsQ15_128[128] = {
-  (q15_t)0x7fff, (q15_t)0x7ffa, (q15_t)0x7ff0, (q15_t)0x7fe1, (q15_t)0x7fce, (q15_t)0x7fb5, (q15_t)0x7f97, (q15_t)0x7f75,
-  (q15_t)0x7f4d, (q15_t)0x7f21, (q15_t)0x7ef0, (q15_t)0x7eba, (q15_t)0x7e7f, (q15_t)0x7e3f, (q15_t)0x7dfa, (q15_t)0x7db0,
-  (q15_t)0x7d62, (q15_t)0x7d0f, (q15_t)0x7cb7, (q15_t)0x7c5a, (q15_t)0x7bf8, (q15_t)0x7b92, (q15_t)0x7b26, (q15_t)0x7ab6,
-  (q15_t)0x7a42, (q15_t)0x79c8, (q15_t)0x794a, (q15_t)0x78c7, (q15_t)0x7840, (q15_t)0x77b4, (q15_t)0x7723, (q15_t)0x768e,
-  (q15_t)0x75f4, (q15_t)0x7555, (q15_t)0x74b2, (q15_t)0x740b, (q15_t)0x735f, (q15_t)0x72af, (q15_t)0x71fa, (q15_t)0x7141,
-  (q15_t)0x7083, (q15_t)0x6fc1, (q15_t)0x6efb, (q15_t)0x6e30, (q15_t)0x6d62, (q15_t)0x6c8f, (q15_t)0x6bb8, (q15_t)0x6adc,
-  (q15_t)0x69fd, (q15_t)0x6919, (q15_t)0x6832, (q15_t)0x6746, (q15_t)0x6657, (q15_t)0x6563, (q15_t)0x646c, (q15_t)0x6371,
-  (q15_t)0x6271, (q15_t)0x616f, (q15_t)0x6068, (q15_t)0x5f5e, (q15_t)0x5e50, (q15_t)0x5d3e, (q15_t)0x5c29, (q15_t)0x5b10,
-  (q15_t)0x59f3, (q15_t)0x58d4, (q15_t)0x57b0, (q15_t)0x568a, (q15_t)0x5560, (q15_t)0x5433, (q15_t)0x5302, (q15_t)0x51ce,
-  (q15_t)0x5097, (q15_t)0x4f5e, (q15_t)0x4e21, (q15_t)0x4ce1, (q15_t)0x4b9e, (q15_t)0x4a58, (q15_t)0x490f, (q15_t)0x47c3,
-  (q15_t)0x4675, (q15_t)0x4524, (q15_t)0x43d0, (q15_t)0x427a, (q15_t)0x4121, (q15_t)0x3fc5, (q15_t)0x3e68, (q15_t)0x3d07,
-  (q15_t)0x3ba5, (q15_t)0x3a40, (q15_t)0x38d8, (q15_t)0x376f, (q15_t)0x3604, (q15_t)0x3496, (q15_t)0x3326, (q15_t)0x31b5,
-  (q15_t)0x3041, (q15_t)0x2ecc, (q15_t)0x2d55, (q15_t)0x2bdc, (q15_t)0x2a61, (q15_t)0x28e5, (q15_t)0x2767, (q15_t)0x25e8,
-  (q15_t)0x2467, (q15_t)0x22e5, (q15_t)0x2161, (q15_t)0x1fdc, (q15_t)0x1e56, (q15_t)0x1ccf, (q15_t)0x1b47, (q15_t)0x19bd,
-  (q15_t)0x1833, (q15_t)0x16a8, (q15_t)0x151b, (q15_t)0x138e, (q15_t)0x1201, (q15_t)0x1072, (q15_t)0xee3, (q15_t)0xd53,
-  (q15_t)0xbc3, (q15_t)0xa33, (q15_t)0x8a2, (q15_t)0x710, (q15_t)0x57f, (q15_t)0x3ed, (q15_t)0x25b, (q15_t)0xc9
-};
-
-static const q15_t ALIGN4 cos_factorsQ15_512[512] = {
-  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7ffe, (q15_t)0x7ffc, (q15_t)0x7ffb, (q15_t)0x7ff9, (q15_t)0x7ff7,
-  (q15_t)0x7ff4, (q15_t)0x7ff2, (q15_t)0x7fee, (q15_t)0x7feb, (q15_t)0x7fe7, (q15_t)0x7fe3, (q15_t)0x7fdf, (q15_t)0x7fda,
-  (q15_t)0x7fd6, (q15_t)0x7fd0, (q15_t)0x7fcb, (q15_t)0x7fc5, (q15_t)0x7fbf, (q15_t)0x7fb8, (q15_t)0x7fb1, (q15_t)0x7faa,
-  (q15_t)0x7fa3, (q15_t)0x7f9b, (q15_t)0x7f93, (q15_t)0x7f8b, (q15_t)0x7f82, (q15_t)0x7f79, (q15_t)0x7f70, (q15_t)0x7f67,
-  (q15_t)0x7f5d, (q15_t)0x7f53, (q15_t)0x7f48, (q15_t)0x7f3d, (q15_t)0x7f32, (q15_t)0x7f27, (q15_t)0x7f1b, (q15_t)0x7f0f,
-  (q15_t)0x7f03, (q15_t)0x7ef6, (q15_t)0x7ee9, (q15_t)0x7edc, (q15_t)0x7ecf, (q15_t)0x7ec1, (q15_t)0x7eb3, (q15_t)0x7ea4,
-  (q15_t)0x7e95, (q15_t)0x7e86, (q15_t)0x7e77, (q15_t)0x7e67, (q15_t)0x7e57, (q15_t)0x7e47, (q15_t)0x7e37, (q15_t)0x7e26,
-  (q15_t)0x7e14, (q15_t)0x7e03, (q15_t)0x7df1, (q15_t)0x7ddf, (q15_t)0x7dcd, (q15_t)0x7dba, (q15_t)0x7da7, (q15_t)0x7d94,
-  (q15_t)0x7d80, (q15_t)0x7d6c, (q15_t)0x7d58, (q15_t)0x7d43, (q15_t)0x7d2f, (q15_t)0x7d19, (q15_t)0x7d04, (q15_t)0x7cee,
-  (q15_t)0x7cd8, (q15_t)0x7cc2, (q15_t)0x7cab, (q15_t)0x7c94, (q15_t)0x7c7d, (q15_t)0x7c66, (q15_t)0x7c4e, (q15_t)0x7c36,
-  (q15_t)0x7c1d, (q15_t)0x7c05, (q15_t)0x7beb, (q15_t)0x7bd2, (q15_t)0x7bb9, (q15_t)0x7b9f, (q15_t)0x7b84, (q15_t)0x7b6a,
-  (q15_t)0x7b4f, (q15_t)0x7b34, (q15_t)0x7b19, (q15_t)0x7afd, (q15_t)0x7ae1, (q15_t)0x7ac5, (q15_t)0x7aa8, (q15_t)0x7a8b,
-  (q15_t)0x7a6e, (q15_t)0x7a50, (q15_t)0x7a33, (q15_t)0x7a15, (q15_t)0x79f6, (q15_t)0x79d8, (q15_t)0x79b9, (q15_t)0x7999,
-  (q15_t)0x797a, (q15_t)0x795a, (q15_t)0x793a, (q15_t)0x7919, (q15_t)0x78f9, (q15_t)0x78d8, (q15_t)0x78b6, (q15_t)0x7895,
-  (q15_t)0x7873, (q15_t)0x7851, (q15_t)0x782e, (q15_t)0x780c, (q15_t)0x77e9, (q15_t)0x77c5, (q15_t)0x77a2, (q15_t)0x777e,
-  (q15_t)0x775a, (q15_t)0x7735, (q15_t)0x7710, (q15_t)0x76eb, (q15_t)0x76c6, (q15_t)0x76a0, (q15_t)0x767b, (q15_t)0x7654,
-  (q15_t)0x762e, (q15_t)0x7607, (q15_t)0x75e0, (q15_t)0x75b9, (q15_t)0x7591, (q15_t)0x7569, (q15_t)0x7541, (q15_t)0x7519,
-  (q15_t)0x74f0, (q15_t)0x74c7, (q15_t)0x749e, (q15_t)0x7474, (q15_t)0x744a, (q15_t)0x7420, (q15_t)0x73f6, (q15_t)0x73cb,
-  (q15_t)0x73a0, (q15_t)0x7375, (q15_t)0x7349, (q15_t)0x731d, (q15_t)0x72f1, (q15_t)0x72c5, (q15_t)0x7298, (q15_t)0x726b,
-  (q15_t)0x723e, (q15_t)0x7211, (q15_t)0x71e3, (q15_t)0x71b5, (q15_t)0x7186, (q15_t)0x7158, (q15_t)0x7129, (q15_t)0x70fa,
-  (q15_t)0x70cb, (q15_t)0x709b, (q15_t)0x706b, (q15_t)0x703b, (q15_t)0x700a, (q15_t)0x6fda, (q15_t)0x6fa9, (q15_t)0x6f77,
-  (q15_t)0x6f46, (q15_t)0x6f14, (q15_t)0x6ee2, (q15_t)0x6eaf, (q15_t)0x6e7d, (q15_t)0x6e4a, (q15_t)0x6e17, (q15_t)0x6de3,
-  (q15_t)0x6db0, (q15_t)0x6d7c, (q15_t)0x6d48, (q15_t)0x6d13, (q15_t)0x6cde, (q15_t)0x6ca9, (q15_t)0x6c74, (q15_t)0x6c3f,
-  (q15_t)0x6c09, (q15_t)0x6bd3, (q15_t)0x6b9c, (q15_t)0x6b66, (q15_t)0x6b2f, (q15_t)0x6af8, (q15_t)0x6ac1, (q15_t)0x6a89,
-  (q15_t)0x6a51, (q15_t)0x6a19, (q15_t)0x69e1, (q15_t)0x69a8, (q15_t)0x696f, (q15_t)0x6936, (q15_t)0x68fd, (q15_t)0x68c3,
-  (q15_t)0x6889, (q15_t)0x684f, (q15_t)0x6815, (q15_t)0x67da, (q15_t)0x679f, (q15_t)0x6764, (q15_t)0x6729, (q15_t)0x66ed,
-  (q15_t)0x66b1, (q15_t)0x6675, (q15_t)0x6639, (q15_t)0x65fc, (q15_t)0x65bf, (q15_t)0x6582, (q15_t)0x6545, (q15_t)0x6507,
-  (q15_t)0x64c9, (q15_t)0x648b, (q15_t)0x644d, (q15_t)0x640e, (q15_t)0x63cf, (q15_t)0x6390, (q15_t)0x6351, (q15_t)0x6311,
-  (q15_t)0x62d2, (q15_t)0x6292, (q15_t)0x6251, (q15_t)0x6211, (q15_t)0x61d0, (q15_t)0x618f, (q15_t)0x614e, (q15_t)0x610d,
-  (q15_t)0x60cb, (q15_t)0x6089, (q15_t)0x6047, (q15_t)0x6004, (q15_t)0x5fc2, (q15_t)0x5f7f, (q15_t)0x5f3c, (q15_t)0x5ef9,
-  (q15_t)0x5eb5, (q15_t)0x5e71, (q15_t)0x5e2d, (q15_t)0x5de9, (q15_t)0x5da5, (q15_t)0x5d60, (q15_t)0x5d1b, (q15_t)0x5cd6,
-  (q15_t)0x5c91, (q15_t)0x5c4b, (q15_t)0x5c06, (q15_t)0x5bc0, (q15_t)0x5b79, (q15_t)0x5b33, (q15_t)0x5aec, (q15_t)0x5aa5,
-  (q15_t)0x5a5e, (q15_t)0x5a17, (q15_t)0x59d0, (q15_t)0x5988, (q15_t)0x5940, (q15_t)0x58f8, (q15_t)0x58af, (q15_t)0x5867,
-  (q15_t)0x581e, (q15_t)0x57d5, (q15_t)0x578c, (q15_t)0x5742, (q15_t)0x56f9, (q15_t)0x56af, (q15_t)0x5665, (q15_t)0x561a,
-  (q15_t)0x55d0, (q15_t)0x5585, (q15_t)0x553a, (q15_t)0x54ef, (q15_t)0x54a4, (q15_t)0x5458, (q15_t)0x540d, (q15_t)0x53c1,
-  (q15_t)0x5375, (q15_t)0x5328, (q15_t)0x52dc, (q15_t)0x528f, (q15_t)0x5242, (q15_t)0x51f5, (q15_t)0x51a8, (q15_t)0x515a,
-  (q15_t)0x510c, (q15_t)0x50bf, (q15_t)0x5070, (q15_t)0x5022, (q15_t)0x4fd4, (q15_t)0x4f85, (q15_t)0x4f36, (q15_t)0x4ee7,
-  (q15_t)0x4e98, (q15_t)0x4e48, (q15_t)0x4df9, (q15_t)0x4da9, (q15_t)0x4d59, (q15_t)0x4d09, (q15_t)0x4cb8, (q15_t)0x4c68,
-  (q15_t)0x4c17, (q15_t)0x4bc6, (q15_t)0x4b75, (q15_t)0x4b24, (q15_t)0x4ad2, (q15_t)0x4a81, (q15_t)0x4a2f, (q15_t)0x49dd,
-  (q15_t)0x498a, (q15_t)0x4938, (q15_t)0x48e6, (q15_t)0x4893, (q15_t)0x4840, (q15_t)0x47ed, (q15_t)0x479a, (q15_t)0x4746,
-  (q15_t)0x46f3, (q15_t)0x469f, (q15_t)0x464b, (q15_t)0x45f7, (q15_t)0x45a3, (q15_t)0x454e, (q15_t)0x44fa, (q15_t)0x44a5,
-  (q15_t)0x4450, (q15_t)0x43fb, (q15_t)0x43a5, (q15_t)0x4350, (q15_t)0x42fa, (q15_t)0x42a5, (q15_t)0x424f, (q15_t)0x41f9,
-  (q15_t)0x41a2, (q15_t)0x414c, (q15_t)0x40f6, (q15_t)0x409f, (q15_t)0x4048, (q15_t)0x3ff1, (q15_t)0x3f9a, (q15_t)0x3f43,
-  (q15_t)0x3eeb, (q15_t)0x3e93, (q15_t)0x3e3c, (q15_t)0x3de4, (q15_t)0x3d8c, (q15_t)0x3d33, (q15_t)0x3cdb, (q15_t)0x3c83,
-  (q15_t)0x3c2a, (q15_t)0x3bd1, (q15_t)0x3b78, (q15_t)0x3b1f, (q15_t)0x3ac6, (q15_t)0x3a6c, (q15_t)0x3a13, (q15_t)0x39b9,
-  (q15_t)0x395f, (q15_t)0x3906, (q15_t)0x38ab, (q15_t)0x3851, (q15_t)0x37f7, (q15_t)0x379c, (q15_t)0x3742, (q15_t)0x36e7,
-  (q15_t)0x368c, (q15_t)0x3631, (q15_t)0x35d6, (q15_t)0x357b, (q15_t)0x351f, (q15_t)0x34c4, (q15_t)0x3468, (q15_t)0x340c,
-  (q15_t)0x33b0, (q15_t)0x3354, (q15_t)0x32f8, (q15_t)0x329c, (q15_t)0x3240, (q15_t)0x31e3, (q15_t)0x3186, (q15_t)0x312a,
-  (q15_t)0x30cd, (q15_t)0x3070, (q15_t)0x3013, (q15_t)0x2fb5, (q15_t)0x2f58, (q15_t)0x2efb, (q15_t)0x2e9d, (q15_t)0x2e3f,
-  (q15_t)0x2de2, (q15_t)0x2d84, (q15_t)0x2d26, (q15_t)0x2cc8, (q15_t)0x2c69, (q15_t)0x2c0b, (q15_t)0x2bad, (q15_t)0x2b4e,
-  (q15_t)0x2aef, (q15_t)0x2a91, (q15_t)0x2a32, (q15_t)0x29d3, (q15_t)0x2974, (q15_t)0x2915, (q15_t)0x28b5, (q15_t)0x2856,
-  (q15_t)0x27f6, (q15_t)0x2797, (q15_t)0x2737, (q15_t)0x26d8, (q15_t)0x2678, (q15_t)0x2618, (q15_t)0x25b8, (q15_t)0x2558,
-  (q15_t)0x24f7, (q15_t)0x2497, (q15_t)0x2437, (q15_t)0x23d6, (q15_t)0x2376, (q15_t)0x2315, (q15_t)0x22b4, (q15_t)0x2254,
-  (q15_t)0x21f3, (q15_t)0x2192, (q15_t)0x2131, (q15_t)0x20d0, (q15_t)0x206e, (q15_t)0x200d, (q15_t)0x1fac, (q15_t)0x1f4a,
-  (q15_t)0x1ee9, (q15_t)0x1e87, (q15_t)0x1e25, (q15_t)0x1dc4, (q15_t)0x1d62, (q15_t)0x1d00, (q15_t)0x1c9e, (q15_t)0x1c3c,
-  (q15_t)0x1bda, (q15_t)0x1b78, (q15_t)0x1b16, (q15_t)0x1ab3, (q15_t)0x1a51, (q15_t)0x19ef, (q15_t)0x198c, (q15_t)0x192a,
-  (q15_t)0x18c7, (q15_t)0x1864, (q15_t)0x1802, (q15_t)0x179f, (q15_t)0x173c, (q15_t)0x16d9, (q15_t)0x1676, (q15_t)0x1613,
-  (q15_t)0x15b0, (q15_t)0x154d, (q15_t)0x14ea, (q15_t)0x1487, (q15_t)0x1423, (q15_t)0x13c0, (q15_t)0x135d, (q15_t)0x12f9,
-  (q15_t)0x1296, (q15_t)0x1232, (q15_t)0x11cf, (q15_t)0x116b, (q15_t)0x1108, (q15_t)0x10a4, (q15_t)0x1040, (q15_t)0xfdd,
-  (q15_t)0xf79, (q15_t)0xf15, (q15_t)0xeb1, (q15_t)0xe4d, (q15_t)0xde9, (q15_t)0xd85, (q15_t)0xd21, (q15_t)0xcbd,
-  (q15_t)0xc59, (q15_t)0xbf5, (q15_t)0xb91, (q15_t)0xb2d, (q15_t)0xac9, (q15_t)0xa65, (q15_t)0xa00, (q15_t)0x99c,
-  (q15_t)0x938, (q15_t)0x8d4, (q15_t)0x86f, (q15_t)0x80b, (q15_t)0x7a7, (q15_t)0x742, (q15_t)0x6de, (q15_t)0x67a,
-  (q15_t)0x615, (q15_t)0x5b1, (q15_t)0x54c, (q15_t)0x4e8, (q15_t)0x483, (q15_t)0x41f, (q15_t)0x3ba, (q15_t)0x356,
-  (q15_t)0x2f1, (q15_t)0x28d, (q15_t)0x228, (q15_t)0x1c4, (q15_t)0x15f, (q15_t)0xfb, (q15_t)0x96, (q15_t)0x32
-};
-
-static const q15_t ALIGN4 cos_factorsQ15_2048[2048] = {
-  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
-  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffd, (q15_t)0x7ffd,
-  (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffa,
-  (q15_t)0x7ffa, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff6,
-  (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff4, (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff2, (q15_t)0x7ff1, (q15_t)0x7ff0,
-  (q15_t)0x7ff0, (q15_t)0x7fef, (q15_t)0x7fee, (q15_t)0x7fed, (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7feb, (q15_t)0x7fea,
-  (q15_t)0x7fe9, (q15_t)0x7fe8, (q15_t)0x7fe7, (q15_t)0x7fe6, (q15_t)0x7fe5, (q15_t)0x7fe4, (q15_t)0x7fe3, (q15_t)0x7fe2,
-  (q15_t)0x7fe1, (q15_t)0x7fe0, (q15_t)0x7fdf, (q15_t)0x7fdd, (q15_t)0x7fdc, (q15_t)0x7fdb, (q15_t)0x7fda, (q15_t)0x7fd9,
-  (q15_t)0x7fd7, (q15_t)0x7fd6, (q15_t)0x7fd5, (q15_t)0x7fd4, (q15_t)0x7fd2, (q15_t)0x7fd1, (q15_t)0x7fd0, (q15_t)0x7fce,
-  (q15_t)0x7fcd, (q15_t)0x7fcb, (q15_t)0x7fca, (q15_t)0x7fc9, (q15_t)0x7fc7, (q15_t)0x7fc6, (q15_t)0x7fc4, (q15_t)0x7fc3,
-  (q15_t)0x7fc1, (q15_t)0x7fc0, (q15_t)0x7fbe, (q15_t)0x7fbc, (q15_t)0x7fbb, (q15_t)0x7fb9, (q15_t)0x7fb7, (q15_t)0x7fb6,
-  (q15_t)0x7fb4, (q15_t)0x7fb2, (q15_t)0x7fb1, (q15_t)0x7faf, (q15_t)0x7fad, (q15_t)0x7fab, (q15_t)0x7fa9, (q15_t)0x7fa8,
-  (q15_t)0x7fa6, (q15_t)0x7fa4, (q15_t)0x7fa2, (q15_t)0x7fa0, (q15_t)0x7f9e, (q15_t)0x7f9c, (q15_t)0x7f9a, (q15_t)0x7f98,
-  (q15_t)0x7f96, (q15_t)0x7f94, (q15_t)0x7f92, (q15_t)0x7f90, (q15_t)0x7f8e, (q15_t)0x7f8c, (q15_t)0x7f8a, (q15_t)0x7f88,
-  (q15_t)0x7f86, (q15_t)0x7f83, (q15_t)0x7f81, (q15_t)0x7f7f, (q15_t)0x7f7d, (q15_t)0x7f7b, (q15_t)0x7f78, (q15_t)0x7f76,
-  (q15_t)0x7f74, (q15_t)0x7f71, (q15_t)0x7f6f, (q15_t)0x7f6d, (q15_t)0x7f6a, (q15_t)0x7f68, (q15_t)0x7f65, (q15_t)0x7f63,
-  (q15_t)0x7f60, (q15_t)0x7f5e, (q15_t)0x7f5b, (q15_t)0x7f59, (q15_t)0x7f56, (q15_t)0x7f54, (q15_t)0x7f51, (q15_t)0x7f4f,
-  (q15_t)0x7f4c, (q15_t)0x7f49, (q15_t)0x7f47, (q15_t)0x7f44, (q15_t)0x7f41, (q15_t)0x7f3f, (q15_t)0x7f3c, (q15_t)0x7f39,
-  (q15_t)0x7f36, (q15_t)0x7f34, (q15_t)0x7f31, (q15_t)0x7f2e, (q15_t)0x7f2b, (q15_t)0x7f28, (q15_t)0x7f25, (q15_t)0x7f23,
-  (q15_t)0x7f20, (q15_t)0x7f1d, (q15_t)0x7f1a, (q15_t)0x7f17, (q15_t)0x7f14, (q15_t)0x7f11, (q15_t)0x7f0e, (q15_t)0x7f0b,
-  (q15_t)0x7f08, (q15_t)0x7f04, (q15_t)0x7f01, (q15_t)0x7efe, (q15_t)0x7efb, (q15_t)0x7ef8, (q15_t)0x7ef5, (q15_t)0x7ef1,
-  (q15_t)0x7eee, (q15_t)0x7eeb, (q15_t)0x7ee8, (q15_t)0x7ee4, (q15_t)0x7ee1, (q15_t)0x7ede, (q15_t)0x7eda, (q15_t)0x7ed7,
-  (q15_t)0x7ed4, (q15_t)0x7ed0, (q15_t)0x7ecd, (q15_t)0x7ec9, (q15_t)0x7ec6, (q15_t)0x7ec3, (q15_t)0x7ebf, (q15_t)0x7ebb,
-  (q15_t)0x7eb8, (q15_t)0x7eb4, (q15_t)0x7eb1, (q15_t)0x7ead, (q15_t)0x7eaa, (q15_t)0x7ea6, (q15_t)0x7ea2, (q15_t)0x7e9f,
-  (q15_t)0x7e9b, (q15_t)0x7e97, (q15_t)0x7e94, (q15_t)0x7e90, (q15_t)0x7e8c, (q15_t)0x7e88, (q15_t)0x7e84, (q15_t)0x7e81,
-  (q15_t)0x7e7d, (q15_t)0x7e79, (q15_t)0x7e75, (q15_t)0x7e71, (q15_t)0x7e6d, (q15_t)0x7e69, (q15_t)0x7e65, (q15_t)0x7e61,
-  (q15_t)0x7e5d, (q15_t)0x7e59, (q15_t)0x7e55, (q15_t)0x7e51, (q15_t)0x7e4d, (q15_t)0x7e49, (q15_t)0x7e45, (q15_t)0x7e41,
-  (q15_t)0x7e3d, (q15_t)0x7e39, (q15_t)0x7e34, (q15_t)0x7e30, (q15_t)0x7e2c, (q15_t)0x7e28, (q15_t)0x7e24, (q15_t)0x7e1f,
-  (q15_t)0x7e1b, (q15_t)0x7e17, (q15_t)0x7e12, (q15_t)0x7e0e, (q15_t)0x7e0a, (q15_t)0x7e05, (q15_t)0x7e01, (q15_t)0x7dfc,
-  (q15_t)0x7df8, (q15_t)0x7df3, (q15_t)0x7def, (q15_t)0x7dea, (q15_t)0x7de6, (q15_t)0x7de1, (q15_t)0x7ddd, (q15_t)0x7dd8,
-  (q15_t)0x7dd4, (q15_t)0x7dcf, (q15_t)0x7dca, (q15_t)0x7dc6, (q15_t)0x7dc1, (q15_t)0x7dbc, (q15_t)0x7db8, (q15_t)0x7db3,
-  (q15_t)0x7dae, (q15_t)0x7da9, (q15_t)0x7da5, (q15_t)0x7da0, (q15_t)0x7d9b, (q15_t)0x7d96, (q15_t)0x7d91, (q15_t)0x7d8c,
-  (q15_t)0x7d87, (q15_t)0x7d82, (q15_t)0x7d7e, (q15_t)0x7d79, (q15_t)0x7d74, (q15_t)0x7d6f, (q15_t)0x7d6a, (q15_t)0x7d65,
-  (q15_t)0x7d60, (q15_t)0x7d5a, (q15_t)0x7d55, (q15_t)0x7d50, (q15_t)0x7d4b, (q15_t)0x7d46, (q15_t)0x7d41, (q15_t)0x7d3c,
-  (q15_t)0x7d36, (q15_t)0x7d31, (q15_t)0x7d2c, (q15_t)0x7d27, (q15_t)0x7d21, (q15_t)0x7d1c, (q15_t)0x7d17, (q15_t)0x7d11,
-  (q15_t)0x7d0c, (q15_t)0x7d07, (q15_t)0x7d01, (q15_t)0x7cfc, (q15_t)0x7cf6, (q15_t)0x7cf1, (q15_t)0x7cec, (q15_t)0x7ce6,
-  (q15_t)0x7ce1, (q15_t)0x7cdb, (q15_t)0x7cd5, (q15_t)0x7cd0, (q15_t)0x7cca, (q15_t)0x7cc5, (q15_t)0x7cbf, (q15_t)0x7cb9,
-  (q15_t)0x7cb4, (q15_t)0x7cae, (q15_t)0x7ca8, (q15_t)0x7ca3, (q15_t)0x7c9d, (q15_t)0x7c97, (q15_t)0x7c91, (q15_t)0x7c8c,
-  (q15_t)0x7c86, (q15_t)0x7c80, (q15_t)0x7c7a, (q15_t)0x7c74, (q15_t)0x7c6e, (q15_t)0x7c69, (q15_t)0x7c63, (q15_t)0x7c5d,
-  (q15_t)0x7c57, (q15_t)0x7c51, (q15_t)0x7c4b, (q15_t)0x7c45, (q15_t)0x7c3f, (q15_t)0x7c39, (q15_t)0x7c33, (q15_t)0x7c2d,
-  (q15_t)0x7c26, (q15_t)0x7c20, (q15_t)0x7c1a, (q15_t)0x7c14, (q15_t)0x7c0e, (q15_t)0x7c08, (q15_t)0x7c01, (q15_t)0x7bfb,
-  (q15_t)0x7bf5, (q15_t)0x7bef, (q15_t)0x7be8, (q15_t)0x7be2, (q15_t)0x7bdc, (q15_t)0x7bd5, (q15_t)0x7bcf, (q15_t)0x7bc9,
-  (q15_t)0x7bc2, (q15_t)0x7bbc, (q15_t)0x7bb5, (q15_t)0x7baf, (q15_t)0x7ba8, (q15_t)0x7ba2, (q15_t)0x7b9b, (q15_t)0x7b95,
-  (q15_t)0x7b8e, (q15_t)0x7b88, (q15_t)0x7b81, (q15_t)0x7b7a, (q15_t)0x7b74, (q15_t)0x7b6d, (q15_t)0x7b67, (q15_t)0x7b60,
-  (q15_t)0x7b59, (q15_t)0x7b52, (q15_t)0x7b4c, (q15_t)0x7b45, (q15_t)0x7b3e, (q15_t)0x7b37, (q15_t)0x7b31, (q15_t)0x7b2a,
-  (q15_t)0x7b23, (q15_t)0x7b1c, (q15_t)0x7b15, (q15_t)0x7b0e, (q15_t)0x7b07, (q15_t)0x7b00, (q15_t)0x7af9, (q15_t)0x7af2,
-  (q15_t)0x7aeb, (q15_t)0x7ae4, (q15_t)0x7add, (q15_t)0x7ad6, (q15_t)0x7acf, (q15_t)0x7ac8, (q15_t)0x7ac1, (q15_t)0x7aba,
-  (q15_t)0x7ab3, (q15_t)0x7aac, (q15_t)0x7aa4, (q15_t)0x7a9d, (q15_t)0x7a96, (q15_t)0x7a8f, (q15_t)0x7a87, (q15_t)0x7a80,
-  (q15_t)0x7a79, (q15_t)0x7a72, (q15_t)0x7a6a, (q15_t)0x7a63, (q15_t)0x7a5c, (q15_t)0x7a54, (q15_t)0x7a4d, (q15_t)0x7a45,
-  (q15_t)0x7a3e, (q15_t)0x7a36, (q15_t)0x7a2f, (q15_t)0x7a27, (q15_t)0x7a20, (q15_t)0x7a18, (q15_t)0x7a11, (q15_t)0x7a09,
-  (q15_t)0x7a02, (q15_t)0x79fa, (q15_t)0x79f2, (q15_t)0x79eb, (q15_t)0x79e3, (q15_t)0x79db, (q15_t)0x79d4, (q15_t)0x79cc,
-  (q15_t)0x79c4, (q15_t)0x79bc, (q15_t)0x79b5, (q15_t)0x79ad, (q15_t)0x79a5, (q15_t)0x799d, (q15_t)0x7995, (q15_t)0x798e,
-  (q15_t)0x7986, (q15_t)0x797e, (q15_t)0x7976, (q15_t)0x796e, (q15_t)0x7966, (q15_t)0x795e, (q15_t)0x7956, (q15_t)0x794e,
-  (q15_t)0x7946, (q15_t)0x793e, (q15_t)0x7936, (q15_t)0x792e, (q15_t)0x7926, (q15_t)0x791e, (q15_t)0x7915, (q15_t)0x790d,
-  (q15_t)0x7905, (q15_t)0x78fd, (q15_t)0x78f5, (q15_t)0x78ec, (q15_t)0x78e4, (q15_t)0x78dc, (q15_t)0x78d4, (q15_t)0x78cb,
-  (q15_t)0x78c3, (q15_t)0x78bb, (q15_t)0x78b2, (q15_t)0x78aa, (q15_t)0x78a2, (q15_t)0x7899, (q15_t)0x7891, (q15_t)0x7888,
-  (q15_t)0x7880, (q15_t)0x7877, (q15_t)0x786f, (q15_t)0x7866, (q15_t)0x785e, (q15_t)0x7855, (q15_t)0x784d, (q15_t)0x7844,
-  (q15_t)0x783b, (q15_t)0x7833, (q15_t)0x782a, (q15_t)0x7821, (q15_t)0x7819, (q15_t)0x7810, (q15_t)0x7807, (q15_t)0x77ff,
-  (q15_t)0x77f6, (q15_t)0x77ed, (q15_t)0x77e4, (q15_t)0x77db, (q15_t)0x77d3, (q15_t)0x77ca, (q15_t)0x77c1, (q15_t)0x77b8,
-  (q15_t)0x77af, (q15_t)0x77a6, (q15_t)0x779d, (q15_t)0x7794, (q15_t)0x778b, (q15_t)0x7782, (q15_t)0x7779, (q15_t)0x7770,
-  (q15_t)0x7767, (q15_t)0x775e, (q15_t)0x7755, (q15_t)0x774c, (q15_t)0x7743, (q15_t)0x773a, (q15_t)0x7731, (q15_t)0x7727,
-  (q15_t)0x771e, (q15_t)0x7715, (q15_t)0x770c, (q15_t)0x7703, (q15_t)0x76f9, (q15_t)0x76f0, (q15_t)0x76e7, (q15_t)0x76dd,
-  (q15_t)0x76d4, (q15_t)0x76cb, (q15_t)0x76c1, (q15_t)0x76b8, (q15_t)0x76af, (q15_t)0x76a5, (q15_t)0x769c, (q15_t)0x7692,
-  (q15_t)0x7689, (q15_t)0x767f, (q15_t)0x7676, (q15_t)0x766c, (q15_t)0x7663, (q15_t)0x7659, (q15_t)0x7650, (q15_t)0x7646,
-  (q15_t)0x763c, (q15_t)0x7633, (q15_t)0x7629, (q15_t)0x761f, (q15_t)0x7616, (q15_t)0x760c, (q15_t)0x7602, (q15_t)0x75f9,
-  (q15_t)0x75ef, (q15_t)0x75e5, (q15_t)0x75db, (q15_t)0x75d1, (q15_t)0x75c8, (q15_t)0x75be, (q15_t)0x75b4, (q15_t)0x75aa,
-  (q15_t)0x75a0, (q15_t)0x7596, (q15_t)0x758c, (q15_t)0x7582, (q15_t)0x7578, (q15_t)0x756e, (q15_t)0x7564, (q15_t)0x755a,
-  (q15_t)0x7550, (q15_t)0x7546, (q15_t)0x753c, (q15_t)0x7532, (q15_t)0x7528, (q15_t)0x751e, (q15_t)0x7514, (q15_t)0x7509,
-  (q15_t)0x74ff, (q15_t)0x74f5, (q15_t)0x74eb, (q15_t)0x74e1, (q15_t)0x74d6, (q15_t)0x74cc, (q15_t)0x74c2, (q15_t)0x74b7,
-  (q15_t)0x74ad, (q15_t)0x74a3, (q15_t)0x7498, (q15_t)0x748e, (q15_t)0x7484, (q15_t)0x7479, (q15_t)0x746f, (q15_t)0x7464,
-  (q15_t)0x745a, (q15_t)0x744f, (q15_t)0x7445, (q15_t)0x743a, (q15_t)0x7430, (q15_t)0x7425, (q15_t)0x741b, (q15_t)0x7410,
-  (q15_t)0x7406, (q15_t)0x73fb, (q15_t)0x73f0, (q15_t)0x73e6, (q15_t)0x73db, (q15_t)0x73d0, (q15_t)0x73c6, (q15_t)0x73bb,
-  (q15_t)0x73b0, (q15_t)0x73a5, (q15_t)0x739b, (q15_t)0x7390, (q15_t)0x7385, (q15_t)0x737a, (q15_t)0x736f, (q15_t)0x7364,
-  (q15_t)0x7359, (q15_t)0x734f, (q15_t)0x7344, (q15_t)0x7339, (q15_t)0x732e, (q15_t)0x7323, (q15_t)0x7318, (q15_t)0x730d,
-  (q15_t)0x7302, (q15_t)0x72f7, (q15_t)0x72ec, (q15_t)0x72e1, (q15_t)0x72d5, (q15_t)0x72ca, (q15_t)0x72bf, (q15_t)0x72b4,
-  (q15_t)0x72a9, (q15_t)0x729e, (q15_t)0x7293, (q15_t)0x7287, (q15_t)0x727c, (q15_t)0x7271, (q15_t)0x7266, (q15_t)0x725a,
-  (q15_t)0x724f, (q15_t)0x7244, (q15_t)0x7238, (q15_t)0x722d, (q15_t)0x7222, (q15_t)0x7216, (q15_t)0x720b, (q15_t)0x71ff,
-  (q15_t)0x71f4, (q15_t)0x71e9, (q15_t)0x71dd, (q15_t)0x71d2, (q15_t)0x71c6, (q15_t)0x71bb, (q15_t)0x71af, (q15_t)0x71a3,
-  (q15_t)0x7198, (q15_t)0x718c, (q15_t)0x7181, (q15_t)0x7175, (q15_t)0x7169, (q15_t)0x715e, (q15_t)0x7152, (q15_t)0x7146,
-  (q15_t)0x713b, (q15_t)0x712f, (q15_t)0x7123, (q15_t)0x7117, (q15_t)0x710c, (q15_t)0x7100, (q15_t)0x70f4, (q15_t)0x70e8,
-  (q15_t)0x70dc, (q15_t)0x70d1, (q15_t)0x70c5, (q15_t)0x70b9, (q15_t)0x70ad, (q15_t)0x70a1, (q15_t)0x7095, (q15_t)0x7089,
-  (q15_t)0x707d, (q15_t)0x7071, (q15_t)0x7065, (q15_t)0x7059, (q15_t)0x704d, (q15_t)0x7041, (q15_t)0x7035, (q15_t)0x7029,
-  (q15_t)0x701d, (q15_t)0x7010, (q15_t)0x7004, (q15_t)0x6ff8, (q15_t)0x6fec, (q15_t)0x6fe0, (q15_t)0x6fd3, (q15_t)0x6fc7,
-  (q15_t)0x6fbb, (q15_t)0x6faf, (q15_t)0x6fa2, (q15_t)0x6f96, (q15_t)0x6f8a, (q15_t)0x6f7d, (q15_t)0x6f71, (q15_t)0x6f65,
-  (q15_t)0x6f58, (q15_t)0x6f4c, (q15_t)0x6f3f, (q15_t)0x6f33, (q15_t)0x6f27, (q15_t)0x6f1a, (q15_t)0x6f0e, (q15_t)0x6f01,
-  (q15_t)0x6ef5, (q15_t)0x6ee8, (q15_t)0x6edc, (q15_t)0x6ecf, (q15_t)0x6ec2, (q15_t)0x6eb6, (q15_t)0x6ea9, (q15_t)0x6e9c,
-  (q15_t)0x6e90, (q15_t)0x6e83, (q15_t)0x6e76, (q15_t)0x6e6a, (q15_t)0x6e5d, (q15_t)0x6e50, (q15_t)0x6e44, (q15_t)0x6e37,
-  (q15_t)0x6e2a, (q15_t)0x6e1d, (q15_t)0x6e10, (q15_t)0x6e04, (q15_t)0x6df7, (q15_t)0x6dea, (q15_t)0x6ddd, (q15_t)0x6dd0,
-  (q15_t)0x6dc3, (q15_t)0x6db6, (q15_t)0x6da9, (q15_t)0x6d9c, (q15_t)0x6d8f, (q15_t)0x6d82, (q15_t)0x6d75, (q15_t)0x6d68,
-  (q15_t)0x6d5b, (q15_t)0x6d4e, (q15_t)0x6d41, (q15_t)0x6d34, (q15_t)0x6d27, (q15_t)0x6d1a, (q15_t)0x6d0c, (q15_t)0x6cff,
-  (q15_t)0x6cf2, (q15_t)0x6ce5, (q15_t)0x6cd8, (q15_t)0x6cca, (q15_t)0x6cbd, (q15_t)0x6cb0, (q15_t)0x6ca3, (q15_t)0x6c95,
-  (q15_t)0x6c88, (q15_t)0x6c7b, (q15_t)0x6c6d, (q15_t)0x6c60, (q15_t)0x6c53, (q15_t)0x6c45, (q15_t)0x6c38, (q15_t)0x6c2a,
-  (q15_t)0x6c1d, (q15_t)0x6c0f, (q15_t)0x6c02, (q15_t)0x6bf5, (q15_t)0x6be7, (q15_t)0x6bd9, (q15_t)0x6bcc, (q15_t)0x6bbe,
-  (q15_t)0x6bb1, (q15_t)0x6ba3, (q15_t)0x6b96, (q15_t)0x6b88, (q15_t)0x6b7a, (q15_t)0x6b6d, (q15_t)0x6b5f, (q15_t)0x6b51,
-  (q15_t)0x6b44, (q15_t)0x6b36, (q15_t)0x6b28, (q15_t)0x6b1a, (q15_t)0x6b0d, (q15_t)0x6aff, (q15_t)0x6af1, (q15_t)0x6ae3,
-  (q15_t)0x6ad5, (q15_t)0x6ac8, (q15_t)0x6aba, (q15_t)0x6aac, (q15_t)0x6a9e, (q15_t)0x6a90, (q15_t)0x6a82, (q15_t)0x6a74,
-  (q15_t)0x6a66, (q15_t)0x6a58, (q15_t)0x6a4a, (q15_t)0x6a3c, (q15_t)0x6a2e, (q15_t)0x6a20, (q15_t)0x6a12, (q15_t)0x6a04,
-  (q15_t)0x69f6, (q15_t)0x69e8, (q15_t)0x69da, (q15_t)0x69cb, (q15_t)0x69bd, (q15_t)0x69af, (q15_t)0x69a1, (q15_t)0x6993,
-  (q15_t)0x6985, (q15_t)0x6976, (q15_t)0x6968, (q15_t)0x695a, (q15_t)0x694b, (q15_t)0x693d, (q15_t)0x692f, (q15_t)0x6921,
-  (q15_t)0x6912, (q15_t)0x6904, (q15_t)0x68f5, (q15_t)0x68e7, (q15_t)0x68d9, (q15_t)0x68ca, (q15_t)0x68bc, (q15_t)0x68ad,
-  (q15_t)0x689f, (q15_t)0x6890, (q15_t)0x6882, (q15_t)0x6873, (q15_t)0x6865, (q15_t)0x6856, (q15_t)0x6848, (q15_t)0x6839,
-  (q15_t)0x682b, (q15_t)0x681c, (q15_t)0x680d, (q15_t)0x67ff, (q15_t)0x67f0, (q15_t)0x67e1, (q15_t)0x67d3, (q15_t)0x67c4,
-  (q15_t)0x67b5, (q15_t)0x67a6, (q15_t)0x6798, (q15_t)0x6789, (q15_t)0x677a, (q15_t)0x676b, (q15_t)0x675d, (q15_t)0x674e,
-  (q15_t)0x673f, (q15_t)0x6730, (q15_t)0x6721, (q15_t)0x6712, (q15_t)0x6703, (q15_t)0x66f4, (q15_t)0x66e5, (q15_t)0x66d6,
-  (q15_t)0x66c8, (q15_t)0x66b9, (q15_t)0x66aa, (q15_t)0x669b, (q15_t)0x668b, (q15_t)0x667c, (q15_t)0x666d, (q15_t)0x665e,
-  (q15_t)0x664f, (q15_t)0x6640, (q15_t)0x6631, (q15_t)0x6622, (q15_t)0x6613, (q15_t)0x6603, (q15_t)0x65f4, (q15_t)0x65e5,
-  (q15_t)0x65d6, (q15_t)0x65c7, (q15_t)0x65b7, (q15_t)0x65a8, (q15_t)0x6599, (q15_t)0x658a, (q15_t)0x657a, (q15_t)0x656b,
-  (q15_t)0x655c, (q15_t)0x654c, (q15_t)0x653d, (q15_t)0x652d, (q15_t)0x651e, (q15_t)0x650f, (q15_t)0x64ff, (q15_t)0x64f0,
-  (q15_t)0x64e0, (q15_t)0x64d1, (q15_t)0x64c1, (q15_t)0x64b2, (q15_t)0x64a2, (q15_t)0x6493, (q15_t)0x6483, (q15_t)0x6474,
-  (q15_t)0x6464, (q15_t)0x6454, (q15_t)0x6445, (q15_t)0x6435, (q15_t)0x6426, (q15_t)0x6416, (q15_t)0x6406, (q15_t)0x63f7,
-  (q15_t)0x63e7, (q15_t)0x63d7, (q15_t)0x63c7, (q15_t)0x63b8, (q15_t)0x63a8, (q15_t)0x6398, (q15_t)0x6388, (q15_t)0x6378,
-  (q15_t)0x6369, (q15_t)0x6359, (q15_t)0x6349, (q15_t)0x6339, (q15_t)0x6329, (q15_t)0x6319, (q15_t)0x6309, (q15_t)0x62f9,
-  (q15_t)0x62ea, (q15_t)0x62da, (q15_t)0x62ca, (q15_t)0x62ba, (q15_t)0x62aa, (q15_t)0x629a, (q15_t)0x628a, (q15_t)0x627a,
-  (q15_t)0x6269, (q15_t)0x6259, (q15_t)0x6249, (q15_t)0x6239, (q15_t)0x6229, (q15_t)0x6219, (q15_t)0x6209, (q15_t)0x61f9,
-  (q15_t)0x61e8, (q15_t)0x61d8, (q15_t)0x61c8, (q15_t)0x61b8, (q15_t)0x61a8, (q15_t)0x6197, (q15_t)0x6187, (q15_t)0x6177,
-  (q15_t)0x6166, (q15_t)0x6156, (q15_t)0x6146, (q15_t)0x6135, (q15_t)0x6125, (q15_t)0x6115, (q15_t)0x6104, (q15_t)0x60f4,
-  (q15_t)0x60e4, (q15_t)0x60d3, (q15_t)0x60c3, (q15_t)0x60b2, (q15_t)0x60a2, (q15_t)0x6091, (q15_t)0x6081, (q15_t)0x6070,
-  (q15_t)0x6060, (q15_t)0x604f, (q15_t)0x603f, (q15_t)0x602e, (q15_t)0x601d, (q15_t)0x600d, (q15_t)0x5ffc, (q15_t)0x5fec,
-  (q15_t)0x5fdb, (q15_t)0x5fca, (q15_t)0x5fba, (q15_t)0x5fa9, (q15_t)0x5f98, (q15_t)0x5f87, (q15_t)0x5f77, (q15_t)0x5f66,
-  (q15_t)0x5f55, (q15_t)0x5f44, (q15_t)0x5f34, (q15_t)0x5f23, (q15_t)0x5f12, (q15_t)0x5f01, (q15_t)0x5ef0, (q15_t)0x5edf,
-  (q15_t)0x5ecf, (q15_t)0x5ebe, (q15_t)0x5ead, (q15_t)0x5e9c, (q15_t)0x5e8b, (q15_t)0x5e7a, (q15_t)0x5e69, (q15_t)0x5e58,
-  (q15_t)0x5e47, (q15_t)0x5e36, (q15_t)0x5e25, (q15_t)0x5e14, (q15_t)0x5e03, (q15_t)0x5df2, (q15_t)0x5de1, (q15_t)0x5dd0,
-  (q15_t)0x5dbf, (q15_t)0x5dad, (q15_t)0x5d9c, (q15_t)0x5d8b, (q15_t)0x5d7a, (q15_t)0x5d69, (q15_t)0x5d58, (q15_t)0x5d46,
-  (q15_t)0x5d35, (q15_t)0x5d24, (q15_t)0x5d13, (q15_t)0x5d01, (q15_t)0x5cf0, (q15_t)0x5cdf, (q15_t)0x5cce, (q15_t)0x5cbc,
-  (q15_t)0x5cab, (q15_t)0x5c9a, (q15_t)0x5c88, (q15_t)0x5c77, (q15_t)0x5c66, (q15_t)0x5c54, (q15_t)0x5c43, (q15_t)0x5c31,
-  (q15_t)0x5c20, (q15_t)0x5c0e, (q15_t)0x5bfd, (q15_t)0x5beb, (q15_t)0x5bda, (q15_t)0x5bc8, (q15_t)0x5bb7, (q15_t)0x5ba5,
-  (q15_t)0x5b94, (q15_t)0x5b82, (q15_t)0x5b71, (q15_t)0x5b5f, (q15_t)0x5b4d, (q15_t)0x5b3c, (q15_t)0x5b2a, (q15_t)0x5b19,
-  (q15_t)0x5b07, (q15_t)0x5af5, (q15_t)0x5ae4, (q15_t)0x5ad2, (q15_t)0x5ac0, (q15_t)0x5aae, (q15_t)0x5a9d, (q15_t)0x5a8b,
-  (q15_t)0x5a79, (q15_t)0x5a67, (q15_t)0x5a56, (q15_t)0x5a44, (q15_t)0x5a32, (q15_t)0x5a20, (q15_t)0x5a0e, (q15_t)0x59fc,
-  (q15_t)0x59ea, (q15_t)0x59d9, (q15_t)0x59c7, (q15_t)0x59b5, (q15_t)0x59a3, (q15_t)0x5991, (q15_t)0x597f, (q15_t)0x596d,
-  (q15_t)0x595b, (q15_t)0x5949, (q15_t)0x5937, (q15_t)0x5925, (q15_t)0x5913, (q15_t)0x5901, (q15_t)0x58ef, (q15_t)0x58dd,
-  (q15_t)0x58cb, (q15_t)0x58b8, (q15_t)0x58a6, (q15_t)0x5894, (q15_t)0x5882, (q15_t)0x5870, (q15_t)0x585e, (q15_t)0x584b,
-  (q15_t)0x5839, (q15_t)0x5827, (q15_t)0x5815, (q15_t)0x5803, (q15_t)0x57f0, (q15_t)0x57de, (q15_t)0x57cc, (q15_t)0x57b9,
-  (q15_t)0x57a7, (q15_t)0x5795, (q15_t)0x5783, (q15_t)0x5770, (q15_t)0x575e, (q15_t)0x574b, (q15_t)0x5739, (q15_t)0x5727,
-  (q15_t)0x5714, (q15_t)0x5702, (q15_t)0x56ef, (q15_t)0x56dd, (q15_t)0x56ca, (q15_t)0x56b8, (q15_t)0x56a5, (q15_t)0x5693,
-  (q15_t)0x5680, (q15_t)0x566e, (q15_t)0x565b, (q15_t)0x5649, (q15_t)0x5636, (q15_t)0x5624, (q15_t)0x5611, (q15_t)0x55fe,
-  (q15_t)0x55ec, (q15_t)0x55d9, (q15_t)0x55c7, (q15_t)0x55b4, (q15_t)0x55a1, (q15_t)0x558f, (q15_t)0x557c, (q15_t)0x5569,
-  (q15_t)0x5556, (q15_t)0x5544, (q15_t)0x5531, (q15_t)0x551e, (q15_t)0x550b, (q15_t)0x54f9, (q15_t)0x54e6, (q15_t)0x54d3,
-  (q15_t)0x54c0, (q15_t)0x54ad, (q15_t)0x549a, (q15_t)0x5488, (q15_t)0x5475, (q15_t)0x5462, (q15_t)0x544f, (q15_t)0x543c,
-  (q15_t)0x5429, (q15_t)0x5416, (q15_t)0x5403, (q15_t)0x53f0, (q15_t)0x53dd, (q15_t)0x53ca, (q15_t)0x53b7, (q15_t)0x53a4,
-  (q15_t)0x5391, (q15_t)0x537e, (q15_t)0x536b, (q15_t)0x5358, (q15_t)0x5345, (q15_t)0x5332, (q15_t)0x531f, (q15_t)0x530c,
-  (q15_t)0x52f8, (q15_t)0x52e5, (q15_t)0x52d2, (q15_t)0x52bf, (q15_t)0x52ac, (q15_t)0x5299, (q15_t)0x5285, (q15_t)0x5272,
-  (q15_t)0x525f, (q15_t)0x524c, (q15_t)0x5238, (q15_t)0x5225, (q15_t)0x5212, (q15_t)0x51ff, (q15_t)0x51eb, (q15_t)0x51d8,
-  (q15_t)0x51c5, (q15_t)0x51b1, (q15_t)0x519e, (q15_t)0x518b, (q15_t)0x5177, (q15_t)0x5164, (q15_t)0x5150, (q15_t)0x513d,
-  (q15_t)0x512a, (q15_t)0x5116, (q15_t)0x5103, (q15_t)0x50ef, (q15_t)0x50dc, (q15_t)0x50c8, (q15_t)0x50b5, (q15_t)0x50a1,
-  (q15_t)0x508e, (q15_t)0x507a, (q15_t)0x5067, (q15_t)0x5053, (q15_t)0x503f, (q15_t)0x502c, (q15_t)0x5018, (q15_t)0x5005,
-  (q15_t)0x4ff1, (q15_t)0x4fdd, (q15_t)0x4fca, (q15_t)0x4fb6, (q15_t)0x4fa2, (q15_t)0x4f8f, (q15_t)0x4f7b, (q15_t)0x4f67,
-  (q15_t)0x4f54, (q15_t)0x4f40, (q15_t)0x4f2c, (q15_t)0x4f18, (q15_t)0x4f05, (q15_t)0x4ef1, (q15_t)0x4edd, (q15_t)0x4ec9,
-  (q15_t)0x4eb6, (q15_t)0x4ea2, (q15_t)0x4e8e, (q15_t)0x4e7a, (q15_t)0x4e66, (q15_t)0x4e52, (q15_t)0x4e3e, (q15_t)0x4e2a,
-  (q15_t)0x4e17, (q15_t)0x4e03, (q15_t)0x4def, (q15_t)0x4ddb, (q15_t)0x4dc7, (q15_t)0x4db3, (q15_t)0x4d9f, (q15_t)0x4d8b,
-  (q15_t)0x4d77, (q15_t)0x4d63, (q15_t)0x4d4f, (q15_t)0x4d3b, (q15_t)0x4d27, (q15_t)0x4d13, (q15_t)0x4cff, (q15_t)0x4ceb,
-  (q15_t)0x4cd6, (q15_t)0x4cc2, (q15_t)0x4cae, (q15_t)0x4c9a, (q15_t)0x4c86, (q15_t)0x4c72, (q15_t)0x4c5e, (q15_t)0x4c49,
-  (q15_t)0x4c35, (q15_t)0x4c21, (q15_t)0x4c0d, (q15_t)0x4bf9, (q15_t)0x4be4, (q15_t)0x4bd0, (q15_t)0x4bbc, (q15_t)0x4ba8,
-  (q15_t)0x4b93, (q15_t)0x4b7f, (q15_t)0x4b6b, (q15_t)0x4b56, (q15_t)0x4b42, (q15_t)0x4b2e, (q15_t)0x4b19, (q15_t)0x4b05,
-  (q15_t)0x4af1, (q15_t)0x4adc, (q15_t)0x4ac8, (q15_t)0x4ab4, (q15_t)0x4a9f, (q15_t)0x4a8b, (q15_t)0x4a76, (q15_t)0x4a62,
-  (q15_t)0x4a4d, (q15_t)0x4a39, (q15_t)0x4a24, (q15_t)0x4a10, (q15_t)0x49fb, (q15_t)0x49e7, (q15_t)0x49d2, (q15_t)0x49be,
-  (q15_t)0x49a9, (q15_t)0x4995, (q15_t)0x4980, (q15_t)0x496c, (q15_t)0x4957, (q15_t)0x4942, (q15_t)0x492e, (q15_t)0x4919,
-  (q15_t)0x4905, (q15_t)0x48f0, (q15_t)0x48db, (q15_t)0x48c7, (q15_t)0x48b2, (q15_t)0x489d, (q15_t)0x4888, (q15_t)0x4874,
-  (q15_t)0x485f, (q15_t)0x484a, (q15_t)0x4836, (q15_t)0x4821, (q15_t)0x480c, (q15_t)0x47f7, (q15_t)0x47e2, (q15_t)0x47ce,
-  (q15_t)0x47b9, (q15_t)0x47a4, (q15_t)0x478f, (q15_t)0x477a, (q15_t)0x4765, (q15_t)0x4751, (q15_t)0x473c, (q15_t)0x4727,
-  (q15_t)0x4712, (q15_t)0x46fd, (q15_t)0x46e8, (q15_t)0x46d3, (q15_t)0x46be, (q15_t)0x46a9, (q15_t)0x4694, (q15_t)0x467f,
-  (q15_t)0x466a, (q15_t)0x4655, (q15_t)0x4640, (q15_t)0x462b, (q15_t)0x4616, (q15_t)0x4601, (q15_t)0x45ec, (q15_t)0x45d7,
-  (q15_t)0x45c2, (q15_t)0x45ad, (q15_t)0x4598, (q15_t)0x4583, (q15_t)0x456e, (q15_t)0x4559, (q15_t)0x4544, (q15_t)0x452e,
-  (q15_t)0x4519, (q15_t)0x4504, (q15_t)0x44ef, (q15_t)0x44da, (q15_t)0x44c5, (q15_t)0x44af, (q15_t)0x449a, (q15_t)0x4485,
-  (q15_t)0x4470, (q15_t)0x445a, (q15_t)0x4445, (q15_t)0x4430, (q15_t)0x441b, (q15_t)0x4405, (q15_t)0x43f0, (q15_t)0x43db,
-  (q15_t)0x43c5, (q15_t)0x43b0, (q15_t)0x439b, (q15_t)0x4385, (q15_t)0x4370, (q15_t)0x435b, (q15_t)0x4345, (q15_t)0x4330,
-  (q15_t)0x431b, (q15_t)0x4305, (q15_t)0x42f0, (q15_t)0x42da, (q15_t)0x42c5, (q15_t)0x42af, (q15_t)0x429a, (q15_t)0x4284,
-  (q15_t)0x426f, (q15_t)0x425a, (q15_t)0x4244, (q15_t)0x422f, (q15_t)0x4219, (q15_t)0x4203, (q15_t)0x41ee, (q15_t)0x41d8,
-  (q15_t)0x41c3, (q15_t)0x41ad, (q15_t)0x4198, (q15_t)0x4182, (q15_t)0x416d, (q15_t)0x4157, (q15_t)0x4141, (q15_t)0x412c,
-  (q15_t)0x4116, (q15_t)0x4100, (q15_t)0x40eb, (q15_t)0x40d5, (q15_t)0x40bf, (q15_t)0x40aa, (q15_t)0x4094, (q15_t)0x407e,
-  (q15_t)0x4069, (q15_t)0x4053, (q15_t)0x403d, (q15_t)0x4027, (q15_t)0x4012, (q15_t)0x3ffc, (q15_t)0x3fe6, (q15_t)0x3fd0,
-  (q15_t)0x3fbb, (q15_t)0x3fa5, (q15_t)0x3f8f, (q15_t)0x3f79, (q15_t)0x3f63, (q15_t)0x3f4d, (q15_t)0x3f38, (q15_t)0x3f22,
-  (q15_t)0x3f0c, (q15_t)0x3ef6, (q15_t)0x3ee0, (q15_t)0x3eca, (q15_t)0x3eb4, (q15_t)0x3e9e, (q15_t)0x3e88, (q15_t)0x3e73,
-  (q15_t)0x3e5d, (q15_t)0x3e47, (q15_t)0x3e31, (q15_t)0x3e1b, (q15_t)0x3e05, (q15_t)0x3def, (q15_t)0x3dd9, (q15_t)0x3dc3,
-  (q15_t)0x3dad, (q15_t)0x3d97, (q15_t)0x3d81, (q15_t)0x3d6b, (q15_t)0x3d55, (q15_t)0x3d3e, (q15_t)0x3d28, (q15_t)0x3d12,
-  (q15_t)0x3cfc, (q15_t)0x3ce6, (q15_t)0x3cd0, (q15_t)0x3cba, (q15_t)0x3ca4, (q15_t)0x3c8e, (q15_t)0x3c77, (q15_t)0x3c61,
-  (q15_t)0x3c4b, (q15_t)0x3c35, (q15_t)0x3c1f, (q15_t)0x3c09, (q15_t)0x3bf2, (q15_t)0x3bdc, (q15_t)0x3bc6, (q15_t)0x3bb0,
-  (q15_t)0x3b99, (q15_t)0x3b83, (q15_t)0x3b6d, (q15_t)0x3b57, (q15_t)0x3b40, (q15_t)0x3b2a, (q15_t)0x3b14, (q15_t)0x3afe,
-  (q15_t)0x3ae7, (q15_t)0x3ad1, (q15_t)0x3abb, (q15_t)0x3aa4, (q15_t)0x3a8e, (q15_t)0x3a78, (q15_t)0x3a61, (q15_t)0x3a4b,
-  (q15_t)0x3a34, (q15_t)0x3a1e, (q15_t)0x3a08, (q15_t)0x39f1, (q15_t)0x39db, (q15_t)0x39c4, (q15_t)0x39ae, (q15_t)0x3998,
-  (q15_t)0x3981, (q15_t)0x396b, (q15_t)0x3954, (q15_t)0x393e, (q15_t)0x3927, (q15_t)0x3911, (q15_t)0x38fa, (q15_t)0x38e4,
-  (q15_t)0x38cd, (q15_t)0x38b7, (q15_t)0x38a0, (q15_t)0x388a, (q15_t)0x3873, (q15_t)0x385d, (q15_t)0x3846, (q15_t)0x382f,
-  (q15_t)0x3819, (q15_t)0x3802, (q15_t)0x37ec, (q15_t)0x37d5, (q15_t)0x37be, (q15_t)0x37a8, (q15_t)0x3791, (q15_t)0x377a,
-  (q15_t)0x3764, (q15_t)0x374d, (q15_t)0x3736, (q15_t)0x3720, (q15_t)0x3709, (q15_t)0x36f2, (q15_t)0x36dc, (q15_t)0x36c5,
-  (q15_t)0x36ae, (q15_t)0x3698, (q15_t)0x3681, (q15_t)0x366a, (q15_t)0x3653, (q15_t)0x363d, (q15_t)0x3626, (q15_t)0x360f,
-  (q15_t)0x35f8, (q15_t)0x35e1, (q15_t)0x35cb, (q15_t)0x35b4, (q15_t)0x359d, (q15_t)0x3586, (q15_t)0x356f, (q15_t)0x3558,
-  (q15_t)0x3542, (q15_t)0x352b, (q15_t)0x3514, (q15_t)0x34fd, (q15_t)0x34e6, (q15_t)0x34cf, (q15_t)0x34b8, (q15_t)0x34a1,
-  (q15_t)0x348b, (q15_t)0x3474, (q15_t)0x345d, (q15_t)0x3446, (q15_t)0x342f, (q15_t)0x3418, (q15_t)0x3401, (q15_t)0x33ea,
-  (q15_t)0x33d3, (q15_t)0x33bc, (q15_t)0x33a5, (q15_t)0x338e, (q15_t)0x3377, (q15_t)0x3360, (q15_t)0x3349, (q15_t)0x3332,
-  (q15_t)0x331b, (q15_t)0x3304, (q15_t)0x32ed, (q15_t)0x32d6, (q15_t)0x32bf, (q15_t)0x32a8, (q15_t)0x3290, (q15_t)0x3279,
-  (q15_t)0x3262, (q15_t)0x324b, (q15_t)0x3234, (q15_t)0x321d, (q15_t)0x3206, (q15_t)0x31ef, (q15_t)0x31d8, (q15_t)0x31c0,
-  (q15_t)0x31a9, (q15_t)0x3192, (q15_t)0x317b, (q15_t)0x3164, (q15_t)0x314c, (q15_t)0x3135, (q15_t)0x311e, (q15_t)0x3107,
-  (q15_t)0x30f0, (q15_t)0x30d8, (q15_t)0x30c1, (q15_t)0x30aa, (q15_t)0x3093, (q15_t)0x307b, (q15_t)0x3064, (q15_t)0x304d,
-  (q15_t)0x3036, (q15_t)0x301e, (q15_t)0x3007, (q15_t)0x2ff0, (q15_t)0x2fd8, (q15_t)0x2fc1, (q15_t)0x2faa, (q15_t)0x2f92,
-  (q15_t)0x2f7b, (q15_t)0x2f64, (q15_t)0x2f4c, (q15_t)0x2f35, (q15_t)0x2f1e, (q15_t)0x2f06, (q15_t)0x2eef, (q15_t)0x2ed8,
-  (q15_t)0x2ec0, (q15_t)0x2ea9, (q15_t)0x2e91, (q15_t)0x2e7a, (q15_t)0x2e63, (q15_t)0x2e4b, (q15_t)0x2e34, (q15_t)0x2e1c,
-  (q15_t)0x2e05, (q15_t)0x2ded, (q15_t)0x2dd6, (q15_t)0x2dbe, (q15_t)0x2da7, (q15_t)0x2d8f, (q15_t)0x2d78, (q15_t)0x2d60,
-  (q15_t)0x2d49, (q15_t)0x2d31, (q15_t)0x2d1a, (q15_t)0x2d02, (q15_t)0x2ceb, (q15_t)0x2cd3, (q15_t)0x2cbc, (q15_t)0x2ca4,
-  (q15_t)0x2c8d, (q15_t)0x2c75, (q15_t)0x2c5e, (q15_t)0x2c46, (q15_t)0x2c2e, (q15_t)0x2c17, (q15_t)0x2bff, (q15_t)0x2be8,
-  (q15_t)0x2bd0, (q15_t)0x2bb8, (q15_t)0x2ba1, (q15_t)0x2b89, (q15_t)0x2b71, (q15_t)0x2b5a, (q15_t)0x2b42, (q15_t)0x2b2b,
-  (q15_t)0x2b13, (q15_t)0x2afb, (q15_t)0x2ae4, (q15_t)0x2acc, (q15_t)0x2ab4, (q15_t)0x2a9c, (q15_t)0x2a85, (q15_t)0x2a6d,
-  (q15_t)0x2a55, (q15_t)0x2a3e, (q15_t)0x2a26, (q15_t)0x2a0e, (q15_t)0x29f6, (q15_t)0x29df, (q15_t)0x29c7, (q15_t)0x29af,
-  (q15_t)0x2997, (q15_t)0x2980, (q15_t)0x2968, (q15_t)0x2950, (q15_t)0x2938, (q15_t)0x2920, (q15_t)0x2909, (q15_t)0x28f1,
-  (q15_t)0x28d9, (q15_t)0x28c1, (q15_t)0x28a9, (q15_t)0x2892, (q15_t)0x287a, (q15_t)0x2862, (q15_t)0x284a, (q15_t)0x2832,
-  (q15_t)0x281a, (q15_t)0x2802, (q15_t)0x27eb, (q15_t)0x27d3, (q15_t)0x27bb, (q15_t)0x27a3, (q15_t)0x278b, (q15_t)0x2773,
-  (q15_t)0x275b, (q15_t)0x2743, (q15_t)0x272b, (q15_t)0x2713, (q15_t)0x26fb, (q15_t)0x26e4, (q15_t)0x26cc, (q15_t)0x26b4,
-  (q15_t)0x269c, (q15_t)0x2684, (q15_t)0x266c, (q15_t)0x2654, (q15_t)0x263c, (q15_t)0x2624, (q15_t)0x260c, (q15_t)0x25f4,
-  (q15_t)0x25dc, (q15_t)0x25c4, (q15_t)0x25ac, (q15_t)0x2594, (q15_t)0x257c, (q15_t)0x2564, (q15_t)0x254c, (q15_t)0x2534,
-  (q15_t)0x251c, (q15_t)0x2503, (q15_t)0x24eb, (q15_t)0x24d3, (q15_t)0x24bb, (q15_t)0x24a3, (q15_t)0x248b, (q15_t)0x2473,
-  (q15_t)0x245b, (q15_t)0x2443, (q15_t)0x242b, (q15_t)0x2413, (q15_t)0x23fa, (q15_t)0x23e2, (q15_t)0x23ca, (q15_t)0x23b2,
-  (q15_t)0x239a, (q15_t)0x2382, (q15_t)0x236a, (q15_t)0x2352, (q15_t)0x2339, (q15_t)0x2321, (q15_t)0x2309, (q15_t)0x22f1,
-  (q15_t)0x22d9, (q15_t)0x22c0, (q15_t)0x22a8, (q15_t)0x2290, (q15_t)0x2278, (q15_t)0x2260, (q15_t)0x2247, (q15_t)0x222f,
-  (q15_t)0x2217, (q15_t)0x21ff, (q15_t)0x21e7, (q15_t)0x21ce, (q15_t)0x21b6, (q15_t)0x219e, (q15_t)0x2186, (q15_t)0x216d,
-  (q15_t)0x2155, (q15_t)0x213d, (q15_t)0x2125, (q15_t)0x210c, (q15_t)0x20f4, (q15_t)0x20dc, (q15_t)0x20c3, (q15_t)0x20ab,
-  (q15_t)0x2093, (q15_t)0x207a, (q15_t)0x2062, (q15_t)0x204a, (q15_t)0x2032, (q15_t)0x2019, (q15_t)0x2001, (q15_t)0x1fe9,
-  (q15_t)0x1fd0, (q15_t)0x1fb8, (q15_t)0x1f9f, (q15_t)0x1f87, (q15_t)0x1f6f, (q15_t)0x1f56, (q15_t)0x1f3e, (q15_t)0x1f26,
-  (q15_t)0x1f0d, (q15_t)0x1ef5, (q15_t)0x1edd, (q15_t)0x1ec4, (q15_t)0x1eac, (q15_t)0x1e93, (q15_t)0x1e7b, (q15_t)0x1e62,
-  (q15_t)0x1e4a, (q15_t)0x1e32, (q15_t)0x1e19, (q15_t)0x1e01, (q15_t)0x1de8, (q15_t)0x1dd0, (q15_t)0x1db7, (q15_t)0x1d9f,
-  (q15_t)0x1d87, (q15_t)0x1d6e, (q15_t)0x1d56, (q15_t)0x1d3d, (q15_t)0x1d25, (q15_t)0x1d0c, (q15_t)0x1cf4, (q15_t)0x1cdb,
-  (q15_t)0x1cc3, (q15_t)0x1caa, (q15_t)0x1c92, (q15_t)0x1c79, (q15_t)0x1c61, (q15_t)0x1c48, (q15_t)0x1c30, (q15_t)0x1c17,
-  (q15_t)0x1bff, (q15_t)0x1be6, (q15_t)0x1bce, (q15_t)0x1bb5, (q15_t)0x1b9d, (q15_t)0x1b84, (q15_t)0x1b6c, (q15_t)0x1b53,
-  (q15_t)0x1b3a, (q15_t)0x1b22, (q15_t)0x1b09, (q15_t)0x1af1, (q15_t)0x1ad8, (q15_t)0x1ac0, (q15_t)0x1aa7, (q15_t)0x1a8e,
-  (q15_t)0x1a76, (q15_t)0x1a5d, (q15_t)0x1a45, (q15_t)0x1a2c, (q15_t)0x1a13, (q15_t)0x19fb, (q15_t)0x19e2, (q15_t)0x19ca,
-  (q15_t)0x19b1, (q15_t)0x1998, (q15_t)0x1980, (q15_t)0x1967, (q15_t)0x194e, (q15_t)0x1936, (q15_t)0x191d, (q15_t)0x1905,
-  (q15_t)0x18ec, (q15_t)0x18d3, (q15_t)0x18bb, (q15_t)0x18a2, (q15_t)0x1889, (q15_t)0x1871, (q15_t)0x1858, (q15_t)0x183f,
-  (q15_t)0x1827, (q15_t)0x180e, (q15_t)0x17f5, (q15_t)0x17dd, (q15_t)0x17c4, (q15_t)0x17ab, (q15_t)0x1792, (q15_t)0x177a,
-  (q15_t)0x1761, (q15_t)0x1748, (q15_t)0x1730, (q15_t)0x1717, (q15_t)0x16fe, (q15_t)0x16e5, (q15_t)0x16cd, (q15_t)0x16b4,
-  (q15_t)0x169b, (q15_t)0x1682, (q15_t)0x166a, (q15_t)0x1651, (q15_t)0x1638, (q15_t)0x161f, (q15_t)0x1607, (q15_t)0x15ee,
-  (q15_t)0x15d5, (q15_t)0x15bc, (q15_t)0x15a4, (q15_t)0x158b, (q15_t)0x1572, (q15_t)0x1559, (q15_t)0x1541, (q15_t)0x1528,
-  (q15_t)0x150f, (q15_t)0x14f6, (q15_t)0x14dd, (q15_t)0x14c5, (q15_t)0x14ac, (q15_t)0x1493, (q15_t)0x147a, (q15_t)0x1461,
-  (q15_t)0x1449, (q15_t)0x1430, (q15_t)0x1417, (q15_t)0x13fe, (q15_t)0x13e5, (q15_t)0x13cc, (q15_t)0x13b4, (q15_t)0x139b,
-  (q15_t)0x1382, (q15_t)0x1369, (q15_t)0x1350, (q15_t)0x1337, (q15_t)0x131f, (q15_t)0x1306, (q15_t)0x12ed, (q15_t)0x12d4,
-  (q15_t)0x12bb, (q15_t)0x12a2, (q15_t)0x1289, (q15_t)0x1271, (q15_t)0x1258, (q15_t)0x123f, (q15_t)0x1226, (q15_t)0x120d,
-  (q15_t)0x11f4, (q15_t)0x11db, (q15_t)0x11c2, (q15_t)0x11a9, (q15_t)0x1191, (q15_t)0x1178, (q15_t)0x115f, (q15_t)0x1146,
-  (q15_t)0x112d, (q15_t)0x1114, (q15_t)0x10fb, (q15_t)0x10e2, (q15_t)0x10c9, (q15_t)0x10b0, (q15_t)0x1098, (q15_t)0x107f,
-  (q15_t)0x1066, (q15_t)0x104d, (q15_t)0x1034, (q15_t)0x101b, (q15_t)0x1002, (q15_t)0xfe9, (q15_t)0xfd0, (q15_t)0xfb7,
-  (q15_t)0xf9e, (q15_t)0xf85, (q15_t)0xf6c, (q15_t)0xf53, (q15_t)0xf3a, (q15_t)0xf21, (q15_t)0xf08, (q15_t)0xef0,
-  (q15_t)0xed7, (q15_t)0xebe, (q15_t)0xea5, (q15_t)0xe8c, (q15_t)0xe73, (q15_t)0xe5a, (q15_t)0xe41, (q15_t)0xe28,
-  (q15_t)0xe0f, (q15_t)0xdf6, (q15_t)0xddd, (q15_t)0xdc4, (q15_t)0xdab, (q15_t)0xd92, (q15_t)0xd79, (q15_t)0xd60,
-  (q15_t)0xd47, (q15_t)0xd2e, (q15_t)0xd15, (q15_t)0xcfc, (q15_t)0xce3, (q15_t)0xcca, (q15_t)0xcb1, (q15_t)0xc98,
-  (q15_t)0xc7f, (q15_t)0xc66, (q15_t)0xc4d, (q15_t)0xc34, (q15_t)0xc1b, (q15_t)0xc02, (q15_t)0xbe9, (q15_t)0xbd0,
-  (q15_t)0xbb7, (q15_t)0xb9e, (q15_t)0xb85, (q15_t)0xb6c, (q15_t)0xb53, (q15_t)0xb3a, (q15_t)0xb20, (q15_t)0xb07,
-  (q15_t)0xaee, (q15_t)0xad5, (q15_t)0xabc, (q15_t)0xaa3, (q15_t)0xa8a, (q15_t)0xa71, (q15_t)0xa58, (q15_t)0xa3f,
-  (q15_t)0xa26, (q15_t)0xa0d, (q15_t)0x9f4, (q15_t)0x9db, (q15_t)0x9c2, (q15_t)0x9a9, (q15_t)0x990, (q15_t)0x977,
-  (q15_t)0x95e, (q15_t)0x944, (q15_t)0x92b, (q15_t)0x912, (q15_t)0x8f9, (q15_t)0x8e0, (q15_t)0x8c7, (q15_t)0x8ae,
-  (q15_t)0x895, (q15_t)0x87c, (q15_t)0x863, (q15_t)0x84a, (q15_t)0x831, (q15_t)0x818, (q15_t)0x7fe, (q15_t)0x7e5,
-  (q15_t)0x7cc, (q15_t)0x7b3, (q15_t)0x79a, (q15_t)0x781, (q15_t)0x768, (q15_t)0x74f, (q15_t)0x736, (q15_t)0x71d,
-  (q15_t)0x704, (q15_t)0x6ea, (q15_t)0x6d1, (q15_t)0x6b8, (q15_t)0x69f, (q15_t)0x686, (q15_t)0x66d, (q15_t)0x654,
-  (q15_t)0x63b, (q15_t)0x622, (q15_t)0x609, (q15_t)0x5ef, (q15_t)0x5d6, (q15_t)0x5bd, (q15_t)0x5a4, (q15_t)0x58b,
-  (q15_t)0x572, (q15_t)0x559, (q15_t)0x540, (q15_t)0x527, (q15_t)0x50d, (q15_t)0x4f4, (q15_t)0x4db, (q15_t)0x4c2,
-  (q15_t)0x4a9, (q15_t)0x490, (q15_t)0x477, (q15_t)0x45e, (q15_t)0x445, (q15_t)0x42b, (q15_t)0x412, (q15_t)0x3f9,
-  (q15_t)0x3e0, (q15_t)0x3c7, (q15_t)0x3ae, (q15_t)0x395, (q15_t)0x37c, (q15_t)0x362, (q15_t)0x349, (q15_t)0x330,
-  (q15_t)0x317, (q15_t)0x2fe, (q15_t)0x2e5, (q15_t)0x2cc, (q15_t)0x2b3, (q15_t)0x299, (q15_t)0x280, (q15_t)0x267,
-  (q15_t)0x24e, (q15_t)0x235, (q15_t)0x21c, (q15_t)0x203, (q15_t)0x1ea, (q15_t)0x1d0, (q15_t)0x1b7, (q15_t)0x19e,
-  (q15_t)0x185, (q15_t)0x16c, (q15_t)0x153, (q15_t)0x13a, (q15_t)0x121, (q15_t)0x107, (q15_t)0xee, (q15_t)0xd5,
-  (q15_t)0xbc, (q15_t)0xa3, (q15_t)0x8a, (q15_t)0x71, (q15_t)0x57, (q15_t)0x3e, (q15_t)0x25, (q15_t)0xc
-
-};
-
-static const q15_t ALIGN4 cos_factorsQ15_8192[8192] = {
-  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
-  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
-  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
-  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
-  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
-  (q15_t)0x7fff, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe,
-  (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe,
-  (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd,
-  (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffc,
-  (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc,
-  (q15_t)0x7ffc, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb,
-  (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa,
-  (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9,
-  (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff8,
-  (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff7,
-  (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6,
-  (q15_t)0x7ff6, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff4,
-  (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff3,
-  (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff2, (q15_t)0x7ff2, (q15_t)0x7ff2, (q15_t)0x7ff2, (q15_t)0x7ff2,
-  (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff0, (q15_t)0x7ff0,
-  (q15_t)0x7ff0, (q15_t)0x7ff0, (q15_t)0x7ff0, (q15_t)0x7fef, (q15_t)0x7fef, (q15_t)0x7fef, (q15_t)0x7fef, (q15_t)0x7fef,
-  (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fed, (q15_t)0x7fed, (q15_t)0x7fed,
-  (q15_t)0x7fed, (q15_t)0x7fed, (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7feb, (q15_t)0x7feb,
-  (q15_t)0x7feb, (q15_t)0x7feb, (q15_t)0x7feb, (q15_t)0x7fea, (q15_t)0x7fea, (q15_t)0x7fea, (q15_t)0x7fea, (q15_t)0x7fe9,
-  (q15_t)0x7fe9, (q15_t)0x7fe9, (q15_t)0x7fe9, (q15_t)0x7fe8, (q15_t)0x7fe8, (q15_t)0x7fe8, (q15_t)0x7fe8, (q15_t)0x7fe8,
-  (q15_t)0x7fe7, (q15_t)0x7fe7, (q15_t)0x7fe7, (q15_t)0x7fe7, (q15_t)0x7fe6, (q15_t)0x7fe6, (q15_t)0x7fe6, (q15_t)0x7fe6,
-  (q15_t)0x7fe5, (q15_t)0x7fe5, (q15_t)0x7fe5, (q15_t)0x7fe5, (q15_t)0x7fe4, (q15_t)0x7fe4, (q15_t)0x7fe4, (q15_t)0x7fe4,
-  (q15_t)0x7fe3, (q15_t)0x7fe3, (q15_t)0x7fe3, (q15_t)0x7fe2, (q15_t)0x7fe2, (q15_t)0x7fe2, (q15_t)0x7fe2, (q15_t)0x7fe1,
-  (q15_t)0x7fe1, (q15_t)0x7fe1, (q15_t)0x7fe1, (q15_t)0x7fe0, (q15_t)0x7fe0, (q15_t)0x7fe0, (q15_t)0x7fdf, (q15_t)0x7fdf,
-  (q15_t)0x7fdf, (q15_t)0x7fdf, (q15_t)0x7fde, (q15_t)0x7fde, (q15_t)0x7fde, (q15_t)0x7fde, (q15_t)0x7fdd, (q15_t)0x7fdd,
-  (q15_t)0x7fdd, (q15_t)0x7fdc, (q15_t)0x7fdc, (q15_t)0x7fdc, (q15_t)0x7fdb, (q15_t)0x7fdb, (q15_t)0x7fdb, (q15_t)0x7fdb,
-  (q15_t)0x7fda, (q15_t)0x7fda, (q15_t)0x7fda, (q15_t)0x7fd9, (q15_t)0x7fd9, (q15_t)0x7fd9, (q15_t)0x7fd8, (q15_t)0x7fd8,
-  (q15_t)0x7fd8, (q15_t)0x7fd8, (q15_t)0x7fd7, (q15_t)0x7fd7, (q15_t)0x7fd7, (q15_t)0x7fd6, (q15_t)0x7fd6, (q15_t)0x7fd6,
-  (q15_t)0x7fd5, (q15_t)0x7fd5, (q15_t)0x7fd5, (q15_t)0x7fd4, (q15_t)0x7fd4, (q15_t)0x7fd4, (q15_t)0x7fd3, (q15_t)0x7fd3,
-  (q15_t)0x7fd3, (q15_t)0x7fd2, (q15_t)0x7fd2, (q15_t)0x7fd2, (q15_t)0x7fd1, (q15_t)0x7fd1, (q15_t)0x7fd1, (q15_t)0x7fd0,
-  (q15_t)0x7fd0, (q15_t)0x7fd0, (q15_t)0x7fcf, (q15_t)0x7fcf, (q15_t)0x7fcf, (q15_t)0x7fce, (q15_t)0x7fce, (q15_t)0x7fce,
-  (q15_t)0x7fcd, (q15_t)0x7fcd, (q15_t)0x7fcd, (q15_t)0x7fcc, (q15_t)0x7fcc, (q15_t)0x7fcc, (q15_t)0x7fcb, (q15_t)0x7fcb,
-  (q15_t)0x7fcb, (q15_t)0x7fca, (q15_t)0x7fca, (q15_t)0x7fc9, (q15_t)0x7fc9, (q15_t)0x7fc9, (q15_t)0x7fc8, (q15_t)0x7fc8,
-  (q15_t)0x7fc8, (q15_t)0x7fc7, (q15_t)0x7fc7, (q15_t)0x7fc7, (q15_t)0x7fc6, (q15_t)0x7fc6, (q15_t)0x7fc5, (q15_t)0x7fc5,
-  (q15_t)0x7fc5, (q15_t)0x7fc4, (q15_t)0x7fc4, (q15_t)0x7fc4, (q15_t)0x7fc3, (q15_t)0x7fc3, (q15_t)0x7fc2, (q15_t)0x7fc2,
-  (q15_t)0x7fc2, (q15_t)0x7fc1, (q15_t)0x7fc1, (q15_t)0x7fc0, (q15_t)0x7fc0, (q15_t)0x7fc0, (q15_t)0x7fbf, (q15_t)0x7fbf,
-  (q15_t)0x7fbf, (q15_t)0x7fbe, (q15_t)0x7fbe, (q15_t)0x7fbd, (q15_t)0x7fbd, (q15_t)0x7fbd, (q15_t)0x7fbc, (q15_t)0x7fbc,
-  (q15_t)0x7fbb, (q15_t)0x7fbb, (q15_t)0x7fbb, (q15_t)0x7fba, (q15_t)0x7fba, (q15_t)0x7fb9, (q15_t)0x7fb9, (q15_t)0x7fb8,
-  (q15_t)0x7fb8, (q15_t)0x7fb8, (q15_t)0x7fb7, (q15_t)0x7fb7, (q15_t)0x7fb6, (q15_t)0x7fb6, (q15_t)0x7fb6, (q15_t)0x7fb5,
-  (q15_t)0x7fb5, (q15_t)0x7fb4, (q15_t)0x7fb4, (q15_t)0x7fb3, (q15_t)0x7fb3, (q15_t)0x7fb3, (q15_t)0x7fb2, (q15_t)0x7fb2,
-  (q15_t)0x7fb1, (q15_t)0x7fb1, (q15_t)0x7fb0, (q15_t)0x7fb0, (q15_t)0x7faf, (q15_t)0x7faf, (q15_t)0x7faf, (q15_t)0x7fae,
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-  (q15_t)0x7f9b, (q15_t)0x7f9b, (q15_t)0x7f9a, (q15_t)0x7f9a, (q15_t)0x7f99, (q15_t)0x7f99, (q15_t)0x7f98, (q15_t)0x7f98,
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-  (q15_t)0x7f7e, (q15_t)0x7f7d, (q15_t)0x7f7c, (q15_t)0x7f7c, (q15_t)0x7f7b, (q15_t)0x7f7b, (q15_t)0x7f7a, (q15_t)0x7f7a,
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-  (q15_t)0x7f6b, (q15_t)0x7f6b, (q15_t)0x7f6a, (q15_t)0x7f69, (q15_t)0x7f69, (q15_t)0x7f68, (q15_t)0x7f68, (q15_t)0x7f67,
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-  (q15_t)0x7f61, (q15_t)0x7f61, (q15_t)0x7f60, (q15_t)0x7f60, (q15_t)0x7f5f, (q15_t)0x7f5e, (q15_t)0x7f5e, (q15_t)0x7f5d,
-  (q15_t)0x7f5c, (q15_t)0x7f5c, (q15_t)0x7f5b, (q15_t)0x7f5b, (q15_t)0x7f5a, (q15_t)0x7f59, (q15_t)0x7f59, (q15_t)0x7f58,
-  (q15_t)0x7f57, (q15_t)0x7f57, (q15_t)0x7f56, (q15_t)0x7f55, (q15_t)0x7f55, (q15_t)0x7f54, (q15_t)0x7f54, (q15_t)0x7f53,
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-  (q15_t)0x7f3d, (q15_t)0x7f3c, (q15_t)0x7f3c, (q15_t)0x7f3b, (q15_t)0x7f3a, (q15_t)0x7f3a, (q15_t)0x7f39, (q15_t)0x7f38,
-  (q15_t)0x7f37, (q15_t)0x7f37, (q15_t)0x7f36, (q15_t)0x7f35, (q15_t)0x7f35, (q15_t)0x7f34, (q15_t)0x7f33, (q15_t)0x7f33,
-  (q15_t)0x7f32, (q15_t)0x7f31, (q15_t)0x7f31, (q15_t)0x7f30, (q15_t)0x7f2f, (q15_t)0x7f2e, (q15_t)0x7f2e, (q15_t)0x7f2d,
-  (q15_t)0x7f2c, (q15_t)0x7f2c, (q15_t)0x7f2b, (q15_t)0x7f2a, (q15_t)0x7f29, (q15_t)0x7f29, (q15_t)0x7f28, (q15_t)0x7f27,
-  (q15_t)0x7f27, (q15_t)0x7f26, (q15_t)0x7f25, (q15_t)0x7f24, (q15_t)0x7f24, (q15_t)0x7f23, (q15_t)0x7f22, (q15_t)0x7f21,
-  (q15_t)0x7f21, (q15_t)0x7f20, (q15_t)0x7f1f, (q15_t)0x7f1f, (q15_t)0x7f1e, (q15_t)0x7f1d, (q15_t)0x7f1c, (q15_t)0x7f1c,
-  (q15_t)0x7f1b, (q15_t)0x7f1a, (q15_t)0x7f19, (q15_t)0x7f19, (q15_t)0x7f18, (q15_t)0x7f17, (q15_t)0x7f16, (q15_t)0x7f16,
-  (q15_t)0x7f15, (q15_t)0x7f14, (q15_t)0x7f13, (q15_t)0x7f13, (q15_t)0x7f12, (q15_t)0x7f11, (q15_t)0x7f10, (q15_t)0x7f10,
-  (q15_t)0x7f0f, (q15_t)0x7f0e, (q15_t)0x7f0d, (q15_t)0x7f0d, (q15_t)0x7f0c, (q15_t)0x7f0b, (q15_t)0x7f0a, (q15_t)0x7f09,
-  (q15_t)0x7f09, (q15_t)0x7f08, (q15_t)0x7f07, (q15_t)0x7f06, (q15_t)0x7f06, (q15_t)0x7f05, (q15_t)0x7f04, (q15_t)0x7f03,
-  (q15_t)0x7f02, (q15_t)0x7f02, (q15_t)0x7f01, (q15_t)0x7f00, (q15_t)0x7eff, (q15_t)0x7eff, (q15_t)0x7efe, (q15_t)0x7efd,
-  (q15_t)0x7efc, (q15_t)0x7efb, (q15_t)0x7efb, (q15_t)0x7efa, (q15_t)0x7ef9, (q15_t)0x7ef8, (q15_t)0x7ef7, (q15_t)0x7ef7,
-  (q15_t)0x7ef6, (q15_t)0x7ef5, (q15_t)0x7ef4, (q15_t)0x7ef3, (q15_t)0x7ef3, (q15_t)0x7ef2, (q15_t)0x7ef1, (q15_t)0x7ef0,
-  (q15_t)0x7eef, (q15_t)0x7eef, (q15_t)0x7eee, (q15_t)0x7eed, (q15_t)0x7eec, (q15_t)0x7eeb, (q15_t)0x7eeb, (q15_t)0x7eea,
-  (q15_t)0x7ee9, (q15_t)0x7ee8, (q15_t)0x7ee7, (q15_t)0x7ee6, (q15_t)0x7ee6, (q15_t)0x7ee5, (q15_t)0x7ee4, (q15_t)0x7ee3,
-  (q15_t)0x7ee2, (q15_t)0x7ee2, (q15_t)0x7ee1, (q15_t)0x7ee0, (q15_t)0x7edf, (q15_t)0x7ede, (q15_t)0x7edd, (q15_t)0x7edd,
-  (q15_t)0x7edc, (q15_t)0x7edb, (q15_t)0x7eda, (q15_t)0x7ed9, (q15_t)0x7ed8, (q15_t)0x7ed8, (q15_t)0x7ed7, (q15_t)0x7ed6,
-  (q15_t)0x7ed5, (q15_t)0x7ed4, (q15_t)0x7ed3, (q15_t)0x7ed2, (q15_t)0x7ed2, (q15_t)0x7ed1, (q15_t)0x7ed0, (q15_t)0x7ecf,
-  (q15_t)0x7ece, (q15_t)0x7ecd, (q15_t)0x7ecc, (q15_t)0x7ecc, (q15_t)0x7ecb, (q15_t)0x7eca, (q15_t)0x7ec9, (q15_t)0x7ec8,
-  (q15_t)0x7ec7, (q15_t)0x7ec6, (q15_t)0x7ec6, (q15_t)0x7ec5, (q15_t)0x7ec4, (q15_t)0x7ec3, (q15_t)0x7ec2, (q15_t)0x7ec1,
-  (q15_t)0x7ec0, (q15_t)0x7ebf, (q15_t)0x7ebf, (q15_t)0x7ebe, (q15_t)0x7ebd, (q15_t)0x7ebc, (q15_t)0x7ebb, (q15_t)0x7eba,
-  (q15_t)0x7eb9, (q15_t)0x7eb8, (q15_t)0x7eb8, (q15_t)0x7eb7, (q15_t)0x7eb6, (q15_t)0x7eb5, (q15_t)0x7eb4, (q15_t)0x7eb3,
-  (q15_t)0x7eb2, (q15_t)0x7eb1, (q15_t)0x7eb0, (q15_t)0x7eaf, (q15_t)0x7eaf, (q15_t)0x7eae, (q15_t)0x7ead, (q15_t)0x7eac,
-  (q15_t)0x7eab, (q15_t)0x7eaa, (q15_t)0x7ea9, (q15_t)0x7ea8, (q15_t)0x7ea7, (q15_t)0x7ea6, (q15_t)0x7ea6, (q15_t)0x7ea5,
-  (q15_t)0x7ea4, (q15_t)0x7ea3, (q15_t)0x7ea2, (q15_t)0x7ea1, (q15_t)0x7ea0, (q15_t)0x7e9f, (q15_t)0x7e9e, (q15_t)0x7e9d,
-  (q15_t)0x7e9c, (q15_t)0x7e9b, (q15_t)0x7e9b, (q15_t)0x7e9a, (q15_t)0x7e99, (q15_t)0x7e98, (q15_t)0x7e97, (q15_t)0x7e96,
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-  (q15_t)0x7e8d, (q15_t)0x7e8d, (q15_t)0x7e8c, (q15_t)0x7e8b, (q15_t)0x7e8a, (q15_t)0x7e89, (q15_t)0x7e88, (q15_t)0x7e87,
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-  (q15_t)0x7e7e, (q15_t)0x7e7d, (q15_t)0x7e7c, (q15_t)0x7e7b, (q15_t)0x7e7a, (q15_t)0x7e79, (q15_t)0x7e78, (q15_t)0x7e77,
-  (q15_t)0x7e77, (q15_t)0x7e76, (q15_t)0x7e75, (q15_t)0x7e74, (q15_t)0x7e73, (q15_t)0x7e72, (q15_t)0x7e71, (q15_t)0x7e70,
-  (q15_t)0x7e6f, (q15_t)0x7e6e, (q15_t)0x7e6d, (q15_t)0x7e6c, (q15_t)0x7e6b, (q15_t)0x7e6a, (q15_t)0x7e69, (q15_t)0x7e68,
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-  (q15_t)0x7e57, (q15_t)0x7e56, (q15_t)0x7e55, (q15_t)0x7e54, (q15_t)0x7e53, (q15_t)0x7e52, (q15_t)0x7e51, (q15_t)0x7e50,
-  (q15_t)0x7e4f, (q15_t)0x7e4e, (q15_t)0x7e4d, (q15_t)0x7e4c, (q15_t)0x7e4b, (q15_t)0x7e4a, (q15_t)0x7e49, (q15_t)0x7e48,
-  (q15_t)0x7e47, (q15_t)0x7e46, (q15_t)0x7e45, (q15_t)0x7e43, (q15_t)0x7e42, (q15_t)0x7e41, (q15_t)0x7e40, (q15_t)0x7e3f,
-  (q15_t)0x7e3e, (q15_t)0x7e3d, (q15_t)0x7e3c, (q15_t)0x7e3b, (q15_t)0x7e3a, (q15_t)0x7e39, (q15_t)0x7e38, (q15_t)0x7e37,
-  (q15_t)0x7e36, (q15_t)0x7e35, (q15_t)0x7e34, (q15_t)0x7e33, (q15_t)0x7e32, (q15_t)0x7e31, (q15_t)0x7e30, (q15_t)0x7e2f,
-  (q15_t)0x7e2e, (q15_t)0x7e2d, (q15_t)0x7e2b, (q15_t)0x7e2a, (q15_t)0x7e29, (q15_t)0x7e28, (q15_t)0x7e27, (q15_t)0x7e26,
-  (q15_t)0x7e25, (q15_t)0x7e24, (q15_t)0x7e23, (q15_t)0x7e22, (q15_t)0x7e21, (q15_t)0x7e20, (q15_t)0x7e1f, (q15_t)0x7e1e,
-  (q15_t)0x7e1d, (q15_t)0x7e1b, (q15_t)0x7e1a, (q15_t)0x7e19, (q15_t)0x7e18, (q15_t)0x7e17, (q15_t)0x7e16, (q15_t)0x7e15,
-  (q15_t)0x7e14, (q15_t)0x7e13, (q15_t)0x7e12, (q15_t)0x7e11, (q15_t)0x7e10, (q15_t)0x7e0e, (q15_t)0x7e0d, (q15_t)0x7e0c,
-  (q15_t)0x7e0b, (q15_t)0x7e0a, (q15_t)0x7e09, (q15_t)0x7e08, (q15_t)0x7e07, (q15_t)0x7e06, (q15_t)0x7e05, (q15_t)0x7e04,
-  (q15_t)0x7e02, (q15_t)0x7e01, (q15_t)0x7e00, (q15_t)0x7dff, (q15_t)0x7dfe, (q15_t)0x7dfd, (q15_t)0x7dfc, (q15_t)0x7dfb,
-  (q15_t)0x7dfa, (q15_t)0x7df8, (q15_t)0x7df7, (q15_t)0x7df6, (q15_t)0x7df5, (q15_t)0x7df4, (q15_t)0x7df3, (q15_t)0x7df2,
-  (q15_t)0x7df1, (q15_t)0x7def, (q15_t)0x7dee, (q15_t)0x7ded, (q15_t)0x7dec, (q15_t)0x7deb, (q15_t)0x7dea, (q15_t)0x7de9,
-  (q15_t)0x7de8, (q15_t)0x7de6, (q15_t)0x7de5, (q15_t)0x7de4, (q15_t)0x7de3, (q15_t)0x7de2, (q15_t)0x7de1, (q15_t)0x7de0,
-  (q15_t)0x7dde, (q15_t)0x7ddd, (q15_t)0x7ddc, (q15_t)0x7ddb, (q15_t)0x7dda, (q15_t)0x7dd9, (q15_t)0x7dd8, (q15_t)0x7dd6,
-  (q15_t)0x7dd5, (q15_t)0x7dd4, (q15_t)0x7dd3, (q15_t)0x7dd2, (q15_t)0x7dd1, (q15_t)0x7dd0, (q15_t)0x7dce, (q15_t)0x7dcd,
-  (q15_t)0x7dcc, (q15_t)0x7dcb, (q15_t)0x7dca, (q15_t)0x7dc9, (q15_t)0x7dc7, (q15_t)0x7dc6, (q15_t)0x7dc5, (q15_t)0x7dc4,
-  (q15_t)0x7dc3, (q15_t)0x7dc2, (q15_t)0x7dc0, (q15_t)0x7dbf, (q15_t)0x7dbe, (q15_t)0x7dbd, (q15_t)0x7dbc, (q15_t)0x7dbb,
-  (q15_t)0x7db9, (q15_t)0x7db8, (q15_t)0x7db7, (q15_t)0x7db6, (q15_t)0x7db5, (q15_t)0x7db3, (q15_t)0x7db2, (q15_t)0x7db1,
-  (q15_t)0x7db0, (q15_t)0x7daf, (q15_t)0x7dae, (q15_t)0x7dac, (q15_t)0x7dab, (q15_t)0x7daa, (q15_t)0x7da9, (q15_t)0x7da8,
-  (q15_t)0x7da6, (q15_t)0x7da5, (q15_t)0x7da4, (q15_t)0x7da3, (q15_t)0x7da2, (q15_t)0x7da0, (q15_t)0x7d9f, (q15_t)0x7d9e,
-  (q15_t)0x7d9d, (q15_t)0x7d9c, (q15_t)0x7d9a, (q15_t)0x7d99, (q15_t)0x7d98, (q15_t)0x7d97, (q15_t)0x7d95, (q15_t)0x7d94,
-  (q15_t)0x7d93, (q15_t)0x7d92, (q15_t)0x7d91, (q15_t)0x7d8f, (q15_t)0x7d8e, (q15_t)0x7d8d, (q15_t)0x7d8c, (q15_t)0x7d8a,
-  (q15_t)0x7d89, (q15_t)0x7d88, (q15_t)0x7d87, (q15_t)0x7d86, (q15_t)0x7d84, (q15_t)0x7d83, (q15_t)0x7d82, (q15_t)0x7d81,
-  (q15_t)0x7d7f, (q15_t)0x7d7e, (q15_t)0x7d7d, (q15_t)0x7d7c, (q15_t)0x7d7a, (q15_t)0x7d79, (q15_t)0x7d78, (q15_t)0x7d77,
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-  (q15_t)0x7d6b, (q15_t)0x7d6a, (q15_t)0x7d69, (q15_t)0x7d68, (q15_t)0x7d66, (q15_t)0x7d65, (q15_t)0x7d64, (q15_t)0x7d63,
-  (q15_t)0x7d61, (q15_t)0x7d60, (q15_t)0x7d5f, (q15_t)0x7d5e, (q15_t)0x7d5c, (q15_t)0x7d5b, (q15_t)0x7d5a, (q15_t)0x7d59,
-  (q15_t)0x7d57, (q15_t)0x7d56, (q15_t)0x7d55, (q15_t)0x7d53, (q15_t)0x7d52, (q15_t)0x7d51, (q15_t)0x7d50, (q15_t)0x7d4e,
-  (q15_t)0x7d4d, (q15_t)0x7d4c, (q15_t)0x7d4a, (q15_t)0x7d49, (q15_t)0x7d48, (q15_t)0x7d47, (q15_t)0x7d45, (q15_t)0x7d44,
-  (q15_t)0x7d43, (q15_t)0x7d41, (q15_t)0x7d40, (q15_t)0x7d3f, (q15_t)0x7d3e, (q15_t)0x7d3c, (q15_t)0x7d3b, (q15_t)0x7d3a,
-  (q15_t)0x7d38, (q15_t)0x7d37, (q15_t)0x7d36, (q15_t)0x7d34, (q15_t)0x7d33, (q15_t)0x7d32, (q15_t)0x7d31, (q15_t)0x7d2f,
-  (q15_t)0x7d2e, (q15_t)0x7d2d, (q15_t)0x7d2b, (q15_t)0x7d2a, (q15_t)0x7d29, (q15_t)0x7d27, (q15_t)0x7d26, (q15_t)0x7d25,
-  (q15_t)0x7d23, (q15_t)0x7d22, (q15_t)0x7d21, (q15_t)0x7d1f, (q15_t)0x7d1e, (q15_t)0x7d1d, (q15_t)0x7d1b, (q15_t)0x7d1a,
-  (q15_t)0x7d19, (q15_t)0x7d17, (q15_t)0x7d16, (q15_t)0x7d15, (q15_t)0x7d13, (q15_t)0x7d12, (q15_t)0x7d11, (q15_t)0x7d0f,
-  (q15_t)0x7d0e, (q15_t)0x7d0d, (q15_t)0x7d0b, (q15_t)0x7d0a, (q15_t)0x7d09, (q15_t)0x7d07, (q15_t)0x7d06, (q15_t)0x7d05,
-  (q15_t)0x7d03, (q15_t)0x7d02, (q15_t)0x7d01, (q15_t)0x7cff, (q15_t)0x7cfe, (q15_t)0x7cfd, (q15_t)0x7cfb, (q15_t)0x7cfa,
-  (q15_t)0x7cf9, (q15_t)0x7cf7, (q15_t)0x7cf6, (q15_t)0x7cf4, (q15_t)0x7cf3, (q15_t)0x7cf2, (q15_t)0x7cf0, (q15_t)0x7cef,
-  (q15_t)0x7cee, (q15_t)0x7cec, (q15_t)0x7ceb, (q15_t)0x7ce9, (q15_t)0x7ce8, (q15_t)0x7ce7, (q15_t)0x7ce5, (q15_t)0x7ce4,
-  (q15_t)0x7ce3, (q15_t)0x7ce1, (q15_t)0x7ce0, (q15_t)0x7cde, (q15_t)0x7cdd, (q15_t)0x7cdc, (q15_t)0x7cda, (q15_t)0x7cd9,
-  (q15_t)0x7cd8, (q15_t)0x7cd6, (q15_t)0x7cd5, (q15_t)0x7cd3, (q15_t)0x7cd2, (q15_t)0x7cd1, (q15_t)0x7ccf, (q15_t)0x7cce,
-  (q15_t)0x7ccc, (q15_t)0x7ccb, (q15_t)0x7cca, (q15_t)0x7cc8, (q15_t)0x7cc7, (q15_t)0x7cc5, (q15_t)0x7cc4, (q15_t)0x7cc3,
-  (q15_t)0x7cc1, (q15_t)0x7cc0, (q15_t)0x7cbe, (q15_t)0x7cbd, (q15_t)0x7cbc, (q15_t)0x7cba, (q15_t)0x7cb9, (q15_t)0x7cb7,
-  (q15_t)0x7cb6, (q15_t)0x7cb5, (q15_t)0x7cb3, (q15_t)0x7cb2, (q15_t)0x7cb0, (q15_t)0x7caf, (q15_t)0x7cad, (q15_t)0x7cac,
-  (q15_t)0x7cab, (q15_t)0x7ca9, (q15_t)0x7ca8, (q15_t)0x7ca6, (q15_t)0x7ca5, (q15_t)0x7ca3, (q15_t)0x7ca2, (q15_t)0x7ca1,
-  (q15_t)0x7c9f, (q15_t)0x7c9e, (q15_t)0x7c9c, (q15_t)0x7c9b, (q15_t)0x7c99, (q15_t)0x7c98, (q15_t)0x7c97, (q15_t)0x7c95,
-  (q15_t)0x7c94, (q15_t)0x7c92, (q15_t)0x7c91, (q15_t)0x7c8f, (q15_t)0x7c8e, (q15_t)0x7c8c, (q15_t)0x7c8b, (q15_t)0x7c8a,
-  (q15_t)0x7c88, (q15_t)0x7c87, (q15_t)0x7c85, (q15_t)0x7c84, (q15_t)0x7c82, (q15_t)0x7c81, (q15_t)0x7c7f, (q15_t)0x7c7e,
-  (q15_t)0x7c7c, (q15_t)0x7c7b, (q15_t)0x7c79, (q15_t)0x7c78, (q15_t)0x7c77, (q15_t)0x7c75, (q15_t)0x7c74, (q15_t)0x7c72,
-  (q15_t)0x7c71, (q15_t)0x7c6f, (q15_t)0x7c6e, (q15_t)0x7c6c, (q15_t)0x7c6b, (q15_t)0x7c69, (q15_t)0x7c68, (q15_t)0x7c66,
-  (q15_t)0x7c65, (q15_t)0x7c63, (q15_t)0x7c62, (q15_t)0x7c60, (q15_t)0x7c5f, (q15_t)0x7c5d, (q15_t)0x7c5c, (q15_t)0x7c5a,
-  (q15_t)0x7c59, (q15_t)0x7c58, (q15_t)0x7c56, (q15_t)0x7c55, (q15_t)0x7c53, (q15_t)0x7c52, (q15_t)0x7c50, (q15_t)0x7c4f,
-  (q15_t)0x7c4d, (q15_t)0x7c4c, (q15_t)0x7c4a, (q15_t)0x7c49, (q15_t)0x7c47, (q15_t)0x7c46, (q15_t)0x7c44, (q15_t)0x7c43,
-  (q15_t)0x7c41, (q15_t)0x7c3f, (q15_t)0x7c3e, (q15_t)0x7c3c, (q15_t)0x7c3b, (q15_t)0x7c39, (q15_t)0x7c38, (q15_t)0x7c36,
-  (q15_t)0x7c35, (q15_t)0x7c33, (q15_t)0x7c32, (q15_t)0x7c30, (q15_t)0x7c2f, (q15_t)0x7c2d, (q15_t)0x7c2c, (q15_t)0x7c2a,
-  (q15_t)0x7c29, (q15_t)0x7c27, (q15_t)0x7c26, (q15_t)0x7c24, (q15_t)0x7c23, (q15_t)0x7c21, (q15_t)0x7c20, (q15_t)0x7c1e,
-  (q15_t)0x7c1c, (q15_t)0x7c1b, (q15_t)0x7c19, (q15_t)0x7c18, (q15_t)0x7c16, (q15_t)0x7c15, (q15_t)0x7c13, (q15_t)0x7c12,
-  (q15_t)0x7c10, (q15_t)0x7c0f, (q15_t)0x7c0d, (q15_t)0x7c0b, (q15_t)0x7c0a, (q15_t)0x7c08, (q15_t)0x7c07, (q15_t)0x7c05,
-  (q15_t)0x7c04, (q15_t)0x7c02, (q15_t)0x7c01, (q15_t)0x7bff, (q15_t)0x7bfd, (q15_t)0x7bfc, (q15_t)0x7bfa, (q15_t)0x7bf9,
-  (q15_t)0x7bf7, (q15_t)0x7bf6, (q15_t)0x7bf4, (q15_t)0x7bf3, (q15_t)0x7bf1, (q15_t)0x7bef, (q15_t)0x7bee, (q15_t)0x7bec,
-  (q15_t)0x7beb, (q15_t)0x7be9, (q15_t)0x7be8, (q15_t)0x7be6, (q15_t)0x7be4, (q15_t)0x7be3, (q15_t)0x7be1, (q15_t)0x7be0,
-  (q15_t)0x7bde, (q15_t)0x7bdc, (q15_t)0x7bdb, (q15_t)0x7bd9, (q15_t)0x7bd8, (q15_t)0x7bd6, (q15_t)0x7bd5, (q15_t)0x7bd3,
-  (q15_t)0x7bd1, (q15_t)0x7bd0, (q15_t)0x7bce, (q15_t)0x7bcd, (q15_t)0x7bcb, (q15_t)0x7bc9, (q15_t)0x7bc8, (q15_t)0x7bc6,
-  (q15_t)0x7bc5, (q15_t)0x7bc3, (q15_t)0x7bc1, (q15_t)0x7bc0, (q15_t)0x7bbe, (q15_t)0x7bbd, (q15_t)0x7bbb, (q15_t)0x7bb9,
-  (q15_t)0x7bb8, (q15_t)0x7bb6, (q15_t)0x7bb5, (q15_t)0x7bb3, (q15_t)0x7bb1, (q15_t)0x7bb0, (q15_t)0x7bae, (q15_t)0x7bac,
-  (q15_t)0x7bab, (q15_t)0x7ba9, (q15_t)0x7ba8, (q15_t)0x7ba6, (q15_t)0x7ba4, (q15_t)0x7ba3, (q15_t)0x7ba1, (q15_t)0x7b9f,
-  (q15_t)0x7b9e, (q15_t)0x7b9c, (q15_t)0x7b9b, (q15_t)0x7b99, (q15_t)0x7b97, (q15_t)0x7b96, (q15_t)0x7b94, (q15_t)0x7b92,
-  (q15_t)0x7b91, (q15_t)0x7b8f, (q15_t)0x7b8d, (q15_t)0x7b8c, (q15_t)0x7b8a, (q15_t)0x7b89, (q15_t)0x7b87, (q15_t)0x7b85,
-  (q15_t)0x7b84, (q15_t)0x7b82, (q15_t)0x7b80, (q15_t)0x7b7f, (q15_t)0x7b7d, (q15_t)0x7b7b, (q15_t)0x7b7a, (q15_t)0x7b78,
-  (q15_t)0x7b76, (q15_t)0x7b75, (q15_t)0x7b73, (q15_t)0x7b71, (q15_t)0x7b70, (q15_t)0x7b6e, (q15_t)0x7b6c, (q15_t)0x7b6b,
-  (q15_t)0x7b69, (q15_t)0x7b67, (q15_t)0x7b66, (q15_t)0x7b64, (q15_t)0x7b62, (q15_t)0x7b61, (q15_t)0x7b5f, (q15_t)0x7b5d,
-  (q15_t)0x7b5c, (q15_t)0x7b5a, (q15_t)0x7b58, (q15_t)0x7b57, (q15_t)0x7b55, (q15_t)0x7b53, (q15_t)0x7b52, (q15_t)0x7b50,
-  (q15_t)0x7b4e, (q15_t)0x7b4d, (q15_t)0x7b4b, (q15_t)0x7b49, (q15_t)0x7b47, (q15_t)0x7b46, (q15_t)0x7b44, (q15_t)0x7b42,
-  (q15_t)0x7b41, (q15_t)0x7b3f, (q15_t)0x7b3d, (q15_t)0x7b3c, (q15_t)0x7b3a, (q15_t)0x7b38, (q15_t)0x7b37, (q15_t)0x7b35,
-  (q15_t)0x7b33, (q15_t)0x7b31, (q15_t)0x7b30, (q15_t)0x7b2e, (q15_t)0x7b2c, (q15_t)0x7b2b, (q15_t)0x7b29, (q15_t)0x7b27,
-  (q15_t)0x7b25, (q15_t)0x7b24, (q15_t)0x7b22, (q15_t)0x7b20, (q15_t)0x7b1f, (q15_t)0x7b1d, (q15_t)0x7b1b, (q15_t)0x7b19,
-  (q15_t)0x7b18, (q15_t)0x7b16, (q15_t)0x7b14, (q15_t)0x7b13, (q15_t)0x7b11, (q15_t)0x7b0f, (q15_t)0x7b0d, (q15_t)0x7b0c,
-  (q15_t)0x7b0a, (q15_t)0x7b08, (q15_t)0x7b06, (q15_t)0x7b05, (q15_t)0x7b03, (q15_t)0x7b01, (q15_t)0x7aff, (q15_t)0x7afe,
-  (q15_t)0x7afc, (q15_t)0x7afa, (q15_t)0x7af8, (q15_t)0x7af7, (q15_t)0x7af5, (q15_t)0x7af3, (q15_t)0x7af2, (q15_t)0x7af0,
-  (q15_t)0x7aee, (q15_t)0x7aec, (q15_t)0x7aeb, (q15_t)0x7ae9, (q15_t)0x7ae7, (q15_t)0x7ae5, (q15_t)0x7ae3, (q15_t)0x7ae2,
-  (q15_t)0x7ae0, (q15_t)0x7ade, (q15_t)0x7adc, (q15_t)0x7adb, (q15_t)0x7ad9, (q15_t)0x7ad7, (q15_t)0x7ad5, (q15_t)0x7ad4,
-  (q15_t)0x7ad2, (q15_t)0x7ad0, (q15_t)0x7ace, (q15_t)0x7acd, (q15_t)0x7acb, (q15_t)0x7ac9, (q15_t)0x7ac7, (q15_t)0x7ac5,
-  (q15_t)0x7ac4, (q15_t)0x7ac2, (q15_t)0x7ac0, (q15_t)0x7abe, (q15_t)0x7abd, (q15_t)0x7abb, (q15_t)0x7ab9, (q15_t)0x7ab7,
-  (q15_t)0x7ab5, (q15_t)0x7ab4, (q15_t)0x7ab2, (q15_t)0x7ab0, (q15_t)0x7aae, (q15_t)0x7aac, (q15_t)0x7aab, (q15_t)0x7aa9,
-  (q15_t)0x7aa7, (q15_t)0x7aa5, (q15_t)0x7aa3, (q15_t)0x7aa2, (q15_t)0x7aa0, (q15_t)0x7a9e, (q15_t)0x7a9c, (q15_t)0x7a9a,
-  (q15_t)0x7a99, (q15_t)0x7a97, (q15_t)0x7a95, (q15_t)0x7a93, (q15_t)0x7a91, (q15_t)0x7a90, (q15_t)0x7a8e, (q15_t)0x7a8c,
-  (q15_t)0x7a8a, (q15_t)0x7a88, (q15_t)0x7a87, (q15_t)0x7a85, (q15_t)0x7a83, (q15_t)0x7a81, (q15_t)0x7a7f, (q15_t)0x7a7d,
-  (q15_t)0x7a7c, (q15_t)0x7a7a, (q15_t)0x7a78, (q15_t)0x7a76, (q15_t)0x7a74, (q15_t)0x7a72, (q15_t)0x7a71, (q15_t)0x7a6f,
-  (q15_t)0x7a6d, (q15_t)0x7a6b, (q15_t)0x7a69, (q15_t)0x7a67, (q15_t)0x7a66, (q15_t)0x7a64, (q15_t)0x7a62, (q15_t)0x7a60,
-  (q15_t)0x7a5e, (q15_t)0x7a5c, (q15_t)0x7a5b, (q15_t)0x7a59, (q15_t)0x7a57, (q15_t)0x7a55, (q15_t)0x7a53, (q15_t)0x7a51,
-  (q15_t)0x7a4f, (q15_t)0x7a4e, (q15_t)0x7a4c, (q15_t)0x7a4a, (q15_t)0x7a48, (q15_t)0x7a46, (q15_t)0x7a44, (q15_t)0x7a42,
-  (q15_t)0x7a41, (q15_t)0x7a3f, (q15_t)0x7a3d, (q15_t)0x7a3b, (q15_t)0x7a39, (q15_t)0x7a37, (q15_t)0x7a35, (q15_t)0x7a34,
-  (q15_t)0x7a32, (q15_t)0x7a30, (q15_t)0x7a2e, (q15_t)0x7a2c, (q15_t)0x7a2a, (q15_t)0x7a28, (q15_t)0x7a26, (q15_t)0x7a25,
-  (q15_t)0x7a23, (q15_t)0x7a21, (q15_t)0x7a1f, (q15_t)0x7a1d, (q15_t)0x7a1b, (q15_t)0x7a19, (q15_t)0x7a17, (q15_t)0x7a16,
-  (q15_t)0x7a14, (q15_t)0x7a12, (q15_t)0x7a10, (q15_t)0x7a0e, (q15_t)0x7a0c, (q15_t)0x7a0a, (q15_t)0x7a08, (q15_t)0x7a06,
-  (q15_t)0x7a04, (q15_t)0x7a03, (q15_t)0x7a01, (q15_t)0x79ff, (q15_t)0x79fd, (q15_t)0x79fb, (q15_t)0x79f9, (q15_t)0x79f7,
-  (q15_t)0x79f5, (q15_t)0x79f3, (q15_t)0x79f1, (q15_t)0x79f0, (q15_t)0x79ee, (q15_t)0x79ec, (q15_t)0x79ea, (q15_t)0x79e8,
-  (q15_t)0x79e6, (q15_t)0x79e4, (q15_t)0x79e2, (q15_t)0x79e0, (q15_t)0x79de, (q15_t)0x79dc, (q15_t)0x79da, (q15_t)0x79d9,
-  (q15_t)0x79d7, (q15_t)0x79d5, (q15_t)0x79d3, (q15_t)0x79d1, (q15_t)0x79cf, (q15_t)0x79cd, (q15_t)0x79cb, (q15_t)0x79c9,
-  (q15_t)0x79c7, (q15_t)0x79c5, (q15_t)0x79c3, (q15_t)0x79c1, (q15_t)0x79bf, (q15_t)0x79bd, (q15_t)0x79bc, (q15_t)0x79ba,
-  (q15_t)0x79b8, (q15_t)0x79b6, (q15_t)0x79b4, (q15_t)0x79b2, (q15_t)0x79b0, (q15_t)0x79ae, (q15_t)0x79ac, (q15_t)0x79aa,
-  (q15_t)0x79a8, (q15_t)0x79a6, (q15_t)0x79a4, (q15_t)0x79a2, (q15_t)0x79a0, (q15_t)0x799e, (q15_t)0x799c, (q15_t)0x799a,
-  (q15_t)0x7998, (q15_t)0x7996, (q15_t)0x7994, (q15_t)0x7992, (q15_t)0x7991, (q15_t)0x798f, (q15_t)0x798d, (q15_t)0x798b,
-  (q15_t)0x7989, (q15_t)0x7987, (q15_t)0x7985, (q15_t)0x7983, (q15_t)0x7981, (q15_t)0x797f, (q15_t)0x797d, (q15_t)0x797b,
-  (q15_t)0x7979, (q15_t)0x7977, (q15_t)0x7975, (q15_t)0x7973, (q15_t)0x7971, (q15_t)0x796f, (q15_t)0x796d, (q15_t)0x796b,
-  (q15_t)0x7969, (q15_t)0x7967, (q15_t)0x7965, (q15_t)0x7963, (q15_t)0x7961, (q15_t)0x795f, (q15_t)0x795d, (q15_t)0x795b,
-  (q15_t)0x7959, (q15_t)0x7957, (q15_t)0x7955, (q15_t)0x7953, (q15_t)0x7951, (q15_t)0x794f, (q15_t)0x794d, (q15_t)0x794b,
-  (q15_t)0x7949, (q15_t)0x7947, (q15_t)0x7945, (q15_t)0x7943, (q15_t)0x7941, (q15_t)0x793f, (q15_t)0x793d, (q15_t)0x793b,
-  (q15_t)0x7939, (q15_t)0x7937, (q15_t)0x7935, (q15_t)0x7933, (q15_t)0x7931, (q15_t)0x792f, (q15_t)0x792d, (q15_t)0x792b,
-  (q15_t)0x7929, (q15_t)0x7927, (q15_t)0x7925, (q15_t)0x7923, (q15_t)0x7921, (q15_t)0x791f, (q15_t)0x791d, (q15_t)0x791a,
-  (q15_t)0x7918, (q15_t)0x7916, (q15_t)0x7914, (q15_t)0x7912, (q15_t)0x7910, (q15_t)0x790e, (q15_t)0x790c, (q15_t)0x790a,
-  (q15_t)0x7908, (q15_t)0x7906, (q15_t)0x7904, (q15_t)0x7902, (q15_t)0x7900, (q15_t)0x78fe, (q15_t)0x78fc, (q15_t)0x78fa,
-  (q15_t)0x78f8, (q15_t)0x78f6, (q15_t)0x78f4, (q15_t)0x78f2, (q15_t)0x78f0, (q15_t)0x78ed, (q15_t)0x78eb, (q15_t)0x78e9,
-  (q15_t)0x78e7, (q15_t)0x78e5, (q15_t)0x78e3, (q15_t)0x78e1, (q15_t)0x78df, (q15_t)0x78dd, (q15_t)0x78db, (q15_t)0x78d9,
-  (q15_t)0x78d7, (q15_t)0x78d5, (q15_t)0x78d3, (q15_t)0x78d1, (q15_t)0x78ce, (q15_t)0x78cc, (q15_t)0x78ca, (q15_t)0x78c8,
-  (q15_t)0x78c6, (q15_t)0x78c4, (q15_t)0x78c2, (q15_t)0x78c0, (q15_t)0x78be, (q15_t)0x78bc, (q15_t)0x78ba, (q15_t)0x78b8,
-  (q15_t)0x78b5, (q15_t)0x78b3, (q15_t)0x78b1, (q15_t)0x78af, (q15_t)0x78ad, (q15_t)0x78ab, (q15_t)0x78a9, (q15_t)0x78a7,
-  (q15_t)0x78a5, (q15_t)0x78a3, (q15_t)0x78a0, (q15_t)0x789e, (q15_t)0x789c, (q15_t)0x789a, (q15_t)0x7898, (q15_t)0x7896,
-  (q15_t)0x7894, (q15_t)0x7892, (q15_t)0x7890, (q15_t)0x788e, (q15_t)0x788b, (q15_t)0x7889, (q15_t)0x7887, (q15_t)0x7885,
-  (q15_t)0x7883, (q15_t)0x7881, (q15_t)0x787f, (q15_t)0x787d, (q15_t)0x787a, (q15_t)0x7878, (q15_t)0x7876, (q15_t)0x7874,
-  (q15_t)0x7872, (q15_t)0x7870, (q15_t)0x786e, (q15_t)0x786c, (q15_t)0x7869, (q15_t)0x7867, (q15_t)0x7865, (q15_t)0x7863,
-  (q15_t)0x7861, (q15_t)0x785f, (q15_t)0x785d, (q15_t)0x785b, (q15_t)0x7858, (q15_t)0x7856, (q15_t)0x7854, (q15_t)0x7852,
-  (q15_t)0x7850, (q15_t)0x784e, (q15_t)0x784c, (q15_t)0x7849, (q15_t)0x7847, (q15_t)0x7845, (q15_t)0x7843, (q15_t)0x7841,
-  (q15_t)0x783f, (q15_t)0x783c, (q15_t)0x783a, (q15_t)0x7838, (q15_t)0x7836, (q15_t)0x7834, (q15_t)0x7832, (q15_t)0x7830,
-  (q15_t)0x782d, (q15_t)0x782b, (q15_t)0x7829, (q15_t)0x7827, (q15_t)0x7825, (q15_t)0x7823, (q15_t)0x7820, (q15_t)0x781e,
-  (q15_t)0x781c, (q15_t)0x781a, (q15_t)0x7818, (q15_t)0x7816, (q15_t)0x7813, (q15_t)0x7811, (q15_t)0x780f, (q15_t)0x780d,
-  (q15_t)0x780b, (q15_t)0x7808, (q15_t)0x7806, (q15_t)0x7804, (q15_t)0x7802, (q15_t)0x7800, (q15_t)0x77fe, (q15_t)0x77fb,
-  (q15_t)0x77f9, (q15_t)0x77f7, (q15_t)0x77f5, (q15_t)0x77f3, (q15_t)0x77f0, (q15_t)0x77ee, (q15_t)0x77ec, (q15_t)0x77ea,
-  (q15_t)0x77e8, (q15_t)0x77e5, (q15_t)0x77e3, (q15_t)0x77e1, (q15_t)0x77df, (q15_t)0x77dd, (q15_t)0x77da, (q15_t)0x77d8,
-  (q15_t)0x77d6, (q15_t)0x77d4, (q15_t)0x77d2, (q15_t)0x77cf, (q15_t)0x77cd, (q15_t)0x77cb, (q15_t)0x77c9, (q15_t)0x77c6,
-  (q15_t)0x77c4, (q15_t)0x77c2, (q15_t)0x77c0, (q15_t)0x77be, (q15_t)0x77bb, (q15_t)0x77b9, (q15_t)0x77b7, (q15_t)0x77b5,
-  (q15_t)0x77b2, (q15_t)0x77b0, (q15_t)0x77ae, (q15_t)0x77ac, (q15_t)0x77aa, (q15_t)0x77a7, (q15_t)0x77a5, (q15_t)0x77a3,
-  (q15_t)0x77a1, (q15_t)0x779e, (q15_t)0x779c, (q15_t)0x779a, (q15_t)0x7798, (q15_t)0x7795, (q15_t)0x7793, (q15_t)0x7791,
-  (q15_t)0x778f, (q15_t)0x778c, (q15_t)0x778a, (q15_t)0x7788, (q15_t)0x7786, (q15_t)0x7783, (q15_t)0x7781, (q15_t)0x777f,
-  (q15_t)0x777d, (q15_t)0x777a, (q15_t)0x7778, (q15_t)0x7776, (q15_t)0x7774, (q15_t)0x7771, (q15_t)0x776f, (q15_t)0x776d,
-  (q15_t)0x776b, (q15_t)0x7768, (q15_t)0x7766, (q15_t)0x7764, (q15_t)0x7762, (q15_t)0x775f, (q15_t)0x775d, (q15_t)0x775b,
-  (q15_t)0x7759, (q15_t)0x7756, (q15_t)0x7754, (q15_t)0x7752, (q15_t)0x774f, (q15_t)0x774d, (q15_t)0x774b, (q15_t)0x7749,
-  (q15_t)0x7746, (q15_t)0x7744, (q15_t)0x7742, (q15_t)0x773f, (q15_t)0x773d, (q15_t)0x773b, (q15_t)0x7739, (q15_t)0x7736,
-  (q15_t)0x7734, (q15_t)0x7732, (q15_t)0x772f, (q15_t)0x772d, (q15_t)0x772b, (q15_t)0x7729, (q15_t)0x7726, (q15_t)0x7724,
-  (q15_t)0x7722, (q15_t)0x771f, (q15_t)0x771d, (q15_t)0x771b, (q15_t)0x7719, (q15_t)0x7716, (q15_t)0x7714, (q15_t)0x7712,
-  (q15_t)0x770f, (q15_t)0x770d, (q15_t)0x770b, (q15_t)0x7708, (q15_t)0x7706, (q15_t)0x7704, (q15_t)0x7701, (q15_t)0x76ff,
-  (q15_t)0x76fd, (q15_t)0x76fa, (q15_t)0x76f8, (q15_t)0x76f6, (q15_t)0x76f4, (q15_t)0x76f1, (q15_t)0x76ef, (q15_t)0x76ed,
-  (q15_t)0x76ea, (q15_t)0x76e8, (q15_t)0x76e6, (q15_t)0x76e3, (q15_t)0x76e1, (q15_t)0x76df, (q15_t)0x76dc, (q15_t)0x76da,
-  (q15_t)0x76d8, (q15_t)0x76d5, (q15_t)0x76d3, (q15_t)0x76d1, (q15_t)0x76ce, (q15_t)0x76cc, (q15_t)0x76ca, (q15_t)0x76c7,
-  (q15_t)0x76c5, (q15_t)0x76c3, (q15_t)0x76c0, (q15_t)0x76be, (q15_t)0x76bc, (q15_t)0x76b9, (q15_t)0x76b7, (q15_t)0x76b4,
-  (q15_t)0x76b2, (q15_t)0x76b0, (q15_t)0x76ad, (q15_t)0x76ab, (q15_t)0x76a9, (q15_t)0x76a6, (q15_t)0x76a4, (q15_t)0x76a2,
-  (q15_t)0x769f, (q15_t)0x769d, (q15_t)0x769b, (q15_t)0x7698, (q15_t)0x7696, (q15_t)0x7693, (q15_t)0x7691, (q15_t)0x768f,
-  (q15_t)0x768c, (q15_t)0x768a, (q15_t)0x7688, (q15_t)0x7685, (q15_t)0x7683, (q15_t)0x7681, (q15_t)0x767e, (q15_t)0x767c,
-  (q15_t)0x7679, (q15_t)0x7677, (q15_t)0x7675, (q15_t)0x7672, (q15_t)0x7670, (q15_t)0x766d, (q15_t)0x766b, (q15_t)0x7669,
-  (q15_t)0x7666, (q15_t)0x7664, (q15_t)0x7662, (q15_t)0x765f, (q15_t)0x765d, (q15_t)0x765a, (q15_t)0x7658, (q15_t)0x7656,
-  (q15_t)0x7653, (q15_t)0x7651, (q15_t)0x764e, (q15_t)0x764c, (q15_t)0x764a, (q15_t)0x7647, (q15_t)0x7645, (q15_t)0x7642,
-  (q15_t)0x7640, (q15_t)0x763e, (q15_t)0x763b, (q15_t)0x7639, (q15_t)0x7636, (q15_t)0x7634, (q15_t)0x7632, (q15_t)0x762f,
-  (q15_t)0x762d, (q15_t)0x762a, (q15_t)0x7628, (q15_t)0x7625, (q15_t)0x7623, (q15_t)0x7621, (q15_t)0x761e, (q15_t)0x761c,
-  (q15_t)0x7619, (q15_t)0x7617, (q15_t)0x7615, (q15_t)0x7612, (q15_t)0x7610, (q15_t)0x760d, (q15_t)0x760b, (q15_t)0x7608,
-  (q15_t)0x7606, (q15_t)0x7604, (q15_t)0x7601, (q15_t)0x75ff, (q15_t)0x75fc, (q15_t)0x75fa, (q15_t)0x75f7, (q15_t)0x75f5,
-  (q15_t)0x75f2, (q15_t)0x75f0, (q15_t)0x75ee, (q15_t)0x75eb, (q15_t)0x75e9, (q15_t)0x75e6, (q15_t)0x75e4, (q15_t)0x75e1,
-  (q15_t)0x75df, (q15_t)0x75dc, (q15_t)0x75da, (q15_t)0x75d8, (q15_t)0x75d5, (q15_t)0x75d3, (q15_t)0x75d0, (q15_t)0x75ce,
-  (q15_t)0x75cb, (q15_t)0x75c9, (q15_t)0x75c6, (q15_t)0x75c4, (q15_t)0x75c1, (q15_t)0x75bf, (q15_t)0x75bc, (q15_t)0x75ba,
-  (q15_t)0x75b8, (q15_t)0x75b5, (q15_t)0x75b3, (q15_t)0x75b0, (q15_t)0x75ae, (q15_t)0x75ab, (q15_t)0x75a9, (q15_t)0x75a6,
-  (q15_t)0x75a4, (q15_t)0x75a1, (q15_t)0x759f, (q15_t)0x759c, (q15_t)0x759a, (q15_t)0x7597, (q15_t)0x7595, (q15_t)0x7592,
-  (q15_t)0x7590, (q15_t)0x758d, (q15_t)0x758b, (q15_t)0x7588, (q15_t)0x7586, (q15_t)0x7584, (q15_t)0x7581, (q15_t)0x757f,
-  (q15_t)0x757c, (q15_t)0x757a, (q15_t)0x7577, (q15_t)0x7575, (q15_t)0x7572, (q15_t)0x7570, (q15_t)0x756d, (q15_t)0x756b,
-  (q15_t)0x7568, (q15_t)0x7566, (q15_t)0x7563, (q15_t)0x7561, (q15_t)0x755e, (q15_t)0x755c, (q15_t)0x7559, (q15_t)0x7556,
-  (q15_t)0x7554, (q15_t)0x7551, (q15_t)0x754f, (q15_t)0x754c, (q15_t)0x754a, (q15_t)0x7547, (q15_t)0x7545, (q15_t)0x7542,
-  (q15_t)0x7540, (q15_t)0x753d, (q15_t)0x753b, (q15_t)0x7538, (q15_t)0x7536, (q15_t)0x7533, (q15_t)0x7531, (q15_t)0x752e,
-  (q15_t)0x752c, (q15_t)0x7529, (q15_t)0x7527, (q15_t)0x7524, (q15_t)0x7522, (q15_t)0x751f, (q15_t)0x751c, (q15_t)0x751a,
-  (q15_t)0x7517, (q15_t)0x7515, (q15_t)0x7512, (q15_t)0x7510, (q15_t)0x750d, (q15_t)0x750b, (q15_t)0x7508, (q15_t)0x7506,
-  (q15_t)0x7503, (q15_t)0x7501, (q15_t)0x74fe, (q15_t)0x74fb, (q15_t)0x74f9, (q15_t)0x74f6, (q15_t)0x74f4, (q15_t)0x74f1,
-  (q15_t)0x74ef, (q15_t)0x74ec, (q15_t)0x74ea, (q15_t)0x74e7, (q15_t)0x74e4, (q15_t)0x74e2, (q15_t)0x74df, (q15_t)0x74dd,
-  (q15_t)0x74da, (q15_t)0x74d8, (q15_t)0x74d5, (q15_t)0x74d2, (q15_t)0x74d0, (q15_t)0x74cd, (q15_t)0x74cb, (q15_t)0x74c8,
-  (q15_t)0x74c6, (q15_t)0x74c3, (q15_t)0x74c0, (q15_t)0x74be, (q15_t)0x74bb, (q15_t)0x74b9, (q15_t)0x74b6, (q15_t)0x74b4,
-  (q15_t)0x74b1, (q15_t)0x74ae, (q15_t)0x74ac, (q15_t)0x74a9, (q15_t)0x74a7, (q15_t)0x74a4, (q15_t)0x74a1, (q15_t)0x749f,
-  (q15_t)0x749c, (q15_t)0x749a, (q15_t)0x7497, (q15_t)0x7495, (q15_t)0x7492, (q15_t)0x748f, (q15_t)0x748d, (q15_t)0x748a,
-  (q15_t)0x7488, (q15_t)0x7485, (q15_t)0x7482, (q15_t)0x7480, (q15_t)0x747d, (q15_t)0x747b, (q15_t)0x7478, (q15_t)0x7475,
-  (q15_t)0x7473, (q15_t)0x7470, (q15_t)0x746d, (q15_t)0x746b, (q15_t)0x7468, (q15_t)0x7466, (q15_t)0x7463, (q15_t)0x7460,
-  (q15_t)0x745e, (q15_t)0x745b, (q15_t)0x7459, (q15_t)0x7456, (q15_t)0x7453, (q15_t)0x7451, (q15_t)0x744e, (q15_t)0x744b,
-  (q15_t)0x7449, (q15_t)0x7446, (q15_t)0x7444, (q15_t)0x7441, (q15_t)0x743e, (q15_t)0x743c, (q15_t)0x7439, (q15_t)0x7436,
-  (q15_t)0x7434, (q15_t)0x7431, (q15_t)0x742f, (q15_t)0x742c, (q15_t)0x7429, (q15_t)0x7427, (q15_t)0x7424, (q15_t)0x7421,
-  (q15_t)0x741f, (q15_t)0x741c, (q15_t)0x7419, (q15_t)0x7417, (q15_t)0x7414, (q15_t)0x7411, (q15_t)0x740f, (q15_t)0x740c,
-  (q15_t)0x740a, (q15_t)0x7407, (q15_t)0x7404, (q15_t)0x7402, (q15_t)0x73ff, (q15_t)0x73fc, (q15_t)0x73fa, (q15_t)0x73f7,
-  (q15_t)0x73f4, (q15_t)0x73f2, (q15_t)0x73ef, (q15_t)0x73ec, (q15_t)0x73ea, (q15_t)0x73e7, (q15_t)0x73e4, (q15_t)0x73e2,
-  (q15_t)0x73df, (q15_t)0x73dc, (q15_t)0x73da, (q15_t)0x73d7, (q15_t)0x73d4, (q15_t)0x73d2, (q15_t)0x73cf, (q15_t)0x73cc,
-  (q15_t)0x73ca, (q15_t)0x73c7, (q15_t)0x73c4, (q15_t)0x73c1, (q15_t)0x73bf, (q15_t)0x73bc, (q15_t)0x73b9, (q15_t)0x73b7,
-  (q15_t)0x73b4, (q15_t)0x73b1, (q15_t)0x73af, (q15_t)0x73ac, (q15_t)0x73a9, (q15_t)0x73a7, (q15_t)0x73a4, (q15_t)0x73a1,
-  (q15_t)0x739f, (q15_t)0x739c, (q15_t)0x7399, (q15_t)0x7396, (q15_t)0x7394, (q15_t)0x7391, (q15_t)0x738e, (q15_t)0x738c,
-  (q15_t)0x7389, (q15_t)0x7386, (q15_t)0x7384, (q15_t)0x7381, (q15_t)0x737e, (q15_t)0x737b, (q15_t)0x7379, (q15_t)0x7376,
-  (q15_t)0x7373, (q15_t)0x7371, (q15_t)0x736e, (q15_t)0x736b, (q15_t)0x7368, (q15_t)0x7366, (q15_t)0x7363, (q15_t)0x7360,
-  (q15_t)0x735e, (q15_t)0x735b, (q15_t)0x7358, (q15_t)0x7355, (q15_t)0x7353, (q15_t)0x7350, (q15_t)0x734d, (q15_t)0x734a,
-  (q15_t)0x7348, (q15_t)0x7345, (q15_t)0x7342, (q15_t)0x7340, (q15_t)0x733d, (q15_t)0x733a, (q15_t)0x7337, (q15_t)0x7335,
-  (q15_t)0x7332, (q15_t)0x732f, (q15_t)0x732c, (q15_t)0x732a, (q15_t)0x7327, (q15_t)0x7324, (q15_t)0x7321, (q15_t)0x731f,
-  (q15_t)0x731c, (q15_t)0x7319, (q15_t)0x7316, (q15_t)0x7314, (q15_t)0x7311, (q15_t)0x730e, (q15_t)0x730b, (q15_t)0x7309,
-  (q15_t)0x7306, (q15_t)0x7303, (q15_t)0x7300, (q15_t)0x72fe, (q15_t)0x72fb, (q15_t)0x72f8, (q15_t)0x72f5, (q15_t)0x72f3,
-  (q15_t)0x72f0, (q15_t)0x72ed, (q15_t)0x72ea, (q15_t)0x72e8, (q15_t)0x72e5, (q15_t)0x72e2, (q15_t)0x72df, (q15_t)0x72dc,
-  (q15_t)0x72da, (q15_t)0x72d7, (q15_t)0x72d4, (q15_t)0x72d1, (q15_t)0x72cf, (q15_t)0x72cc, (q15_t)0x72c9, (q15_t)0x72c6,
-  (q15_t)0x72c3, (q15_t)0x72c1, (q15_t)0x72be, (q15_t)0x72bb, (q15_t)0x72b8, (q15_t)0x72b5, (q15_t)0x72b3, (q15_t)0x72b0,
-  (q15_t)0x72ad, (q15_t)0x72aa, (q15_t)0x72a8, (q15_t)0x72a5, (q15_t)0x72a2, (q15_t)0x729f, (q15_t)0x729c, (q15_t)0x729a,
-  (q15_t)0x7297, (q15_t)0x7294, (q15_t)0x7291, (q15_t)0x728e, (q15_t)0x728c, (q15_t)0x7289, (q15_t)0x7286, (q15_t)0x7283,
-  (q15_t)0x7280, (q15_t)0x727e, (q15_t)0x727b, (q15_t)0x7278, (q15_t)0x7275, (q15_t)0x7272, (q15_t)0x726f, (q15_t)0x726d,
-  (q15_t)0x726a, (q15_t)0x7267, (q15_t)0x7264, (q15_t)0x7261, (q15_t)0x725f, (q15_t)0x725c, (q15_t)0x7259, (q15_t)0x7256,
-  (q15_t)0x7253, (q15_t)0x7250, (q15_t)0x724e, (q15_t)0x724b, (q15_t)0x7248, (q15_t)0x7245, (q15_t)0x7242, (q15_t)0x723f,
-  (q15_t)0x723d, (q15_t)0x723a, (q15_t)0x7237, (q15_t)0x7234, (q15_t)0x7231, (q15_t)0x722e, (q15_t)0x722c, (q15_t)0x7229,
-  (q15_t)0x7226, (q15_t)0x7223, (q15_t)0x7220, (q15_t)0x721d, (q15_t)0x721b, (q15_t)0x7218, (q15_t)0x7215, (q15_t)0x7212,
-  (q15_t)0x720f, (q15_t)0x720c, (q15_t)0x7209, (q15_t)0x7207, (q15_t)0x7204, (q15_t)0x7201, (q15_t)0x71fe, (q15_t)0x71fb,
-  (q15_t)0x71f8, (q15_t)0x71f5, (q15_t)0x71f3, (q15_t)0x71f0, (q15_t)0x71ed, (q15_t)0x71ea, (q15_t)0x71e7, (q15_t)0x71e4,
-  (q15_t)0x71e1, (q15_t)0x71df, (q15_t)0x71dc, (q15_t)0x71d9, (q15_t)0x71d6, (q15_t)0x71d3, (q15_t)0x71d0, (q15_t)0x71cd,
-  (q15_t)0x71ca, (q15_t)0x71c8, (q15_t)0x71c5, (q15_t)0x71c2, (q15_t)0x71bf, (q15_t)0x71bc, (q15_t)0x71b9, (q15_t)0x71b6,
-  (q15_t)0x71b3, (q15_t)0x71b0, (q15_t)0x71ae, (q15_t)0x71ab, (q15_t)0x71a8, (q15_t)0x71a5, (q15_t)0x71a2, (q15_t)0x719f,
-  (q15_t)0x719c, (q15_t)0x7199, (q15_t)0x7196, (q15_t)0x7194, (q15_t)0x7191, (q15_t)0x718e, (q15_t)0x718b, (q15_t)0x7188,
-  (q15_t)0x7185, (q15_t)0x7182, (q15_t)0x717f, (q15_t)0x717c, (q15_t)0x7179, (q15_t)0x7177, (q15_t)0x7174, (q15_t)0x7171,
-  (q15_t)0x716e, (q15_t)0x716b, (q15_t)0x7168, (q15_t)0x7165, (q15_t)0x7162, (q15_t)0x715f, (q15_t)0x715c, (q15_t)0x7159,
-  (q15_t)0x7156, (q15_t)0x7154, (q15_t)0x7151, (q15_t)0x714e, (q15_t)0x714b, (q15_t)0x7148, (q15_t)0x7145, (q15_t)0x7142,
-  (q15_t)0x713f, (q15_t)0x713c, (q15_t)0x7139, (q15_t)0x7136, (q15_t)0x7133, (q15_t)0x7130, (q15_t)0x712d, (q15_t)0x712b,
-  (q15_t)0x7128, (q15_t)0x7125, (q15_t)0x7122, (q15_t)0x711f, (q15_t)0x711c, (q15_t)0x7119, (q15_t)0x7116, (q15_t)0x7113,
-  (q15_t)0x7110, (q15_t)0x710d, (q15_t)0x710a, (q15_t)0x7107, (q15_t)0x7104, (q15_t)0x7101, (q15_t)0x70fe, (q15_t)0x70fb,
-  (q15_t)0x70f8, (q15_t)0x70f6, (q15_t)0x70f3, (q15_t)0x70f0, (q15_t)0x70ed, (q15_t)0x70ea, (q15_t)0x70e7, (q15_t)0x70e4,
-  (q15_t)0x70e1, (q15_t)0x70de, (q15_t)0x70db, (q15_t)0x70d8, (q15_t)0x70d5, (q15_t)0x70d2, (q15_t)0x70cf, (q15_t)0x70cc,
-  (q15_t)0x70c9, (q15_t)0x70c6, (q15_t)0x70c3, (q15_t)0x70c0, (q15_t)0x70bd, (q15_t)0x70ba, (q15_t)0x70b7, (q15_t)0x70b4,
-  (q15_t)0x70b1, (q15_t)0x70ae, (q15_t)0x70ab, (q15_t)0x70a8, (q15_t)0x70a5, (q15_t)0x70a2, (q15_t)0x709f, (q15_t)0x709c,
-  (q15_t)0x7099, (q15_t)0x7096, (q15_t)0x7093, (q15_t)0x7090, (q15_t)0x708d, (q15_t)0x708a, (q15_t)0x7087, (q15_t)0x7084,
-  (q15_t)0x7081, (q15_t)0x707e, (q15_t)0x707b, (q15_t)0x7078, (q15_t)0x7075, (q15_t)0x7072, (q15_t)0x706f, (q15_t)0x706c,
-  (q15_t)0x7069, (q15_t)0x7066, (q15_t)0x7063, (q15_t)0x7060, (q15_t)0x705d, (q15_t)0x705a, (q15_t)0x7057, (q15_t)0x7054,
-  (q15_t)0x7051, (q15_t)0x704e, (q15_t)0x704b, (q15_t)0x7048, (q15_t)0x7045, (q15_t)0x7042, (q15_t)0x703f, (q15_t)0x703c,
-  (q15_t)0x7039, (q15_t)0x7036, (q15_t)0x7033, (q15_t)0x7030, (q15_t)0x702d, (q15_t)0x702a, (q15_t)0x7027, (q15_t)0x7024,
-  (q15_t)0x7021, (q15_t)0x701e, (q15_t)0x701b, (q15_t)0x7018, (q15_t)0x7015, (q15_t)0x7012, (q15_t)0x700f, (q15_t)0x700c,
-  (q15_t)0x7009, (q15_t)0x7006, (q15_t)0x7003, (q15_t)0x7000, (q15_t)0x6ffd, (q15_t)0x6ffa, (q15_t)0x6ff7, (q15_t)0x6ff3,
-  (q15_t)0x6ff0, (q15_t)0x6fed, (q15_t)0x6fea, (q15_t)0x6fe7, (q15_t)0x6fe4, (q15_t)0x6fe1, (q15_t)0x6fde, (q15_t)0x6fdb,
-  (q15_t)0x6fd8, (q15_t)0x6fd5, (q15_t)0x6fd2, (q15_t)0x6fcf, (q15_t)0x6fcc, (q15_t)0x6fc9, (q15_t)0x6fc6, (q15_t)0x6fc3,
-  (q15_t)0x6fc0, (q15_t)0x6fbc, (q15_t)0x6fb9, (q15_t)0x6fb6, (q15_t)0x6fb3, (q15_t)0x6fb0, (q15_t)0x6fad, (q15_t)0x6faa,
-  (q15_t)0x6fa7, (q15_t)0x6fa4, (q15_t)0x6fa1, (q15_t)0x6f9e, (q15_t)0x6f9b, (q15_t)0x6f98, (q15_t)0x6f95, (q15_t)0x6f91,
-  (q15_t)0x6f8e, (q15_t)0x6f8b, (q15_t)0x6f88, (q15_t)0x6f85, (q15_t)0x6f82, (q15_t)0x6f7f, (q15_t)0x6f7c, (q15_t)0x6f79,
-  (q15_t)0x6f76, (q15_t)0x6f73, (q15_t)0x6f70, (q15_t)0x6f6c, (q15_t)0x6f69, (q15_t)0x6f66, (q15_t)0x6f63, (q15_t)0x6f60,
-  (q15_t)0x6f5d, (q15_t)0x6f5a, (q15_t)0x6f57, (q15_t)0x6f54, (q15_t)0x6f51, (q15_t)0x6f4d, (q15_t)0x6f4a, (q15_t)0x6f47,
-  (q15_t)0x6f44, (q15_t)0x6f41, (q15_t)0x6f3e, (q15_t)0x6f3b, (q15_t)0x6f38, (q15_t)0x6f35, (q15_t)0x6f31, (q15_t)0x6f2e,
-  (q15_t)0x6f2b, (q15_t)0x6f28, (q15_t)0x6f25, (q15_t)0x6f22, (q15_t)0x6f1f, (q15_t)0x6f1c, (q15_t)0x6f19, (q15_t)0x6f15,
-  (q15_t)0x6f12, (q15_t)0x6f0f, (q15_t)0x6f0c, (q15_t)0x6f09, (q15_t)0x6f06, (q15_t)0x6f03, (q15_t)0x6f00, (q15_t)0x6efc,
-  (q15_t)0x6ef9, (q15_t)0x6ef6, (q15_t)0x6ef3, (q15_t)0x6ef0, (q15_t)0x6eed, (q15_t)0x6eea, (q15_t)0x6ee7, (q15_t)0x6ee3,
-  (q15_t)0x6ee0, (q15_t)0x6edd, (q15_t)0x6eda, (q15_t)0x6ed7, (q15_t)0x6ed4, (q15_t)0x6ed1, (q15_t)0x6ecd, (q15_t)0x6eca,
-  (q15_t)0x6ec7, (q15_t)0x6ec4, (q15_t)0x6ec1, (q15_t)0x6ebe, (q15_t)0x6eba, (q15_t)0x6eb7, (q15_t)0x6eb4, (q15_t)0x6eb1,
-  (q15_t)0x6eae, (q15_t)0x6eab, (q15_t)0x6ea8, (q15_t)0x6ea4, (q15_t)0x6ea1, (q15_t)0x6e9e, (q15_t)0x6e9b, (q15_t)0x6e98,
-  (q15_t)0x6e95, (q15_t)0x6e91, (q15_t)0x6e8e, (q15_t)0x6e8b, (q15_t)0x6e88, (q15_t)0x6e85, (q15_t)0x6e82, (q15_t)0x6e7e,
-  (q15_t)0x6e7b, (q15_t)0x6e78, (q15_t)0x6e75, (q15_t)0x6e72, (q15_t)0x6e6f, (q15_t)0x6e6b, (q15_t)0x6e68, (q15_t)0x6e65,
-  (q15_t)0x6e62, (q15_t)0x6e5f, (q15_t)0x6e5b, (q15_t)0x6e58, (q15_t)0x6e55, (q15_t)0x6e52, (q15_t)0x6e4f, (q15_t)0x6e4c,
-  (q15_t)0x6e48, (q15_t)0x6e45, (q15_t)0x6e42, (q15_t)0x6e3f, (q15_t)0x6e3c, (q15_t)0x6e38, (q15_t)0x6e35, (q15_t)0x6e32,
-  (q15_t)0x6e2f, (q15_t)0x6e2c, (q15_t)0x6e28, (q15_t)0x6e25, (q15_t)0x6e22, (q15_t)0x6e1f, (q15_t)0x6e1c, (q15_t)0x6e18,
-  (q15_t)0x6e15, (q15_t)0x6e12, (q15_t)0x6e0f, (q15_t)0x6e0c, (q15_t)0x6e08, (q15_t)0x6e05, (q15_t)0x6e02, (q15_t)0x6dff,
-  (q15_t)0x6dfb, (q15_t)0x6df8, (q15_t)0x6df5, (q15_t)0x6df2, (q15_t)0x6def, (q15_t)0x6deb, (q15_t)0x6de8, (q15_t)0x6de5,
-  (q15_t)0x6de2, (q15_t)0x6ddf, (q15_t)0x6ddb, (q15_t)0x6dd8, (q15_t)0x6dd5, (q15_t)0x6dd2, (q15_t)0x6dce, (q15_t)0x6dcb,
-  (q15_t)0x6dc8, (q15_t)0x6dc5, (q15_t)0x6dc1, (q15_t)0x6dbe, (q15_t)0x6dbb, (q15_t)0x6db8, (q15_t)0x6db5, (q15_t)0x6db1,
-  (q15_t)0x6dae, (q15_t)0x6dab, (q15_t)0x6da8, (q15_t)0x6da4, (q15_t)0x6da1, (q15_t)0x6d9e, (q15_t)0x6d9b, (q15_t)0x6d97,
-  (q15_t)0x6d94, (q15_t)0x6d91, (q15_t)0x6d8e, (q15_t)0x6d8a, (q15_t)0x6d87, (q15_t)0x6d84, (q15_t)0x6d81, (q15_t)0x6d7d,
-  (q15_t)0x6d7a, (q15_t)0x6d77, (q15_t)0x6d74, (q15_t)0x6d70, (q15_t)0x6d6d, (q15_t)0x6d6a, (q15_t)0x6d67, (q15_t)0x6d63,
-  (q15_t)0x6d60, (q15_t)0x6d5d, (q15_t)0x6d59, (q15_t)0x6d56, (q15_t)0x6d53, (q15_t)0x6d50, (q15_t)0x6d4c, (q15_t)0x6d49,
-  (q15_t)0x6d46, (q15_t)0x6d43, (q15_t)0x6d3f, (q15_t)0x6d3c, (q15_t)0x6d39, (q15_t)0x6d36, (q15_t)0x6d32, (q15_t)0x6d2f,
-  (q15_t)0x6d2c, (q15_t)0x6d28, (q15_t)0x6d25, (q15_t)0x6d22, (q15_t)0x6d1f, (q15_t)0x6d1b, (q15_t)0x6d18, (q15_t)0x6d15,
-  (q15_t)0x6d11, (q15_t)0x6d0e, (q15_t)0x6d0b, (q15_t)0x6d08, (q15_t)0x6d04, (q15_t)0x6d01, (q15_t)0x6cfe, (q15_t)0x6cfa,
-  (q15_t)0x6cf7, (q15_t)0x6cf4, (q15_t)0x6cf0, (q15_t)0x6ced, (q15_t)0x6cea, (q15_t)0x6ce7, (q15_t)0x6ce3, (q15_t)0x6ce0,
-  (q15_t)0x6cdd, (q15_t)0x6cd9, (q15_t)0x6cd6, (q15_t)0x6cd3, (q15_t)0x6ccf, (q15_t)0x6ccc, (q15_t)0x6cc9, (q15_t)0x6cc5,
-  (q15_t)0x6cc2, (q15_t)0x6cbf, (q15_t)0x6cbc, (q15_t)0x6cb8, (q15_t)0x6cb5, (q15_t)0x6cb2, (q15_t)0x6cae, (q15_t)0x6cab,
-  (q15_t)0x6ca8, (q15_t)0x6ca4, (q15_t)0x6ca1, (q15_t)0x6c9e, (q15_t)0x6c9a, (q15_t)0x6c97, (q15_t)0x6c94, (q15_t)0x6c90,
-  (q15_t)0x6c8d, (q15_t)0x6c8a, (q15_t)0x6c86, (q15_t)0x6c83, (q15_t)0x6c80, (q15_t)0x6c7c, (q15_t)0x6c79, (q15_t)0x6c76,
-  (q15_t)0x6c72, (q15_t)0x6c6f, (q15_t)0x6c6c, (q15_t)0x6c68, (q15_t)0x6c65, (q15_t)0x6c62, (q15_t)0x6c5e, (q15_t)0x6c5b,
-  (q15_t)0x6c58, (q15_t)0x6c54, (q15_t)0x6c51, (q15_t)0x6c4e, (q15_t)0x6c4a, (q15_t)0x6c47, (q15_t)0x6c44, (q15_t)0x6c40,
-  (q15_t)0x6c3d, (q15_t)0x6c39, (q15_t)0x6c36, (q15_t)0x6c33, (q15_t)0x6c2f, (q15_t)0x6c2c, (q15_t)0x6c29, (q15_t)0x6c25,
-  (q15_t)0x6c22, (q15_t)0x6c1f, (q15_t)0x6c1b, (q15_t)0x6c18, (q15_t)0x6c15, (q15_t)0x6c11, (q15_t)0x6c0e, (q15_t)0x6c0a,
-  (q15_t)0x6c07, (q15_t)0x6c04, (q15_t)0x6c00, (q15_t)0x6bfd, (q15_t)0x6bfa, (q15_t)0x6bf6, (q15_t)0x6bf3, (q15_t)0x6bef,
-  (q15_t)0x6bec, (q15_t)0x6be9, (q15_t)0x6be5, (q15_t)0x6be2, (q15_t)0x6bdf, (q15_t)0x6bdb, (q15_t)0x6bd8, (q15_t)0x6bd4,
-  (q15_t)0x6bd1, (q15_t)0x6bce, (q15_t)0x6bca, (q15_t)0x6bc7, (q15_t)0x6bc3, (q15_t)0x6bc0, (q15_t)0x6bbd, (q15_t)0x6bb9,
-  (q15_t)0x6bb6, (q15_t)0x6bb2, (q15_t)0x6baf, (q15_t)0x6bac, (q15_t)0x6ba8, (q15_t)0x6ba5, (q15_t)0x6ba1, (q15_t)0x6b9e,
-  (q15_t)0x6b9b, (q15_t)0x6b97, (q15_t)0x6b94, (q15_t)0x6b90, (q15_t)0x6b8d, (q15_t)0x6b8a, (q15_t)0x6b86, (q15_t)0x6b83,
-  (q15_t)0x6b7f, (q15_t)0x6b7c, (q15_t)0x6b79, (q15_t)0x6b75, (q15_t)0x6b72, (q15_t)0x6b6e, (q15_t)0x6b6b, (q15_t)0x6b68,
-  (q15_t)0x6b64, (q15_t)0x6b61, (q15_t)0x6b5d, (q15_t)0x6b5a, (q15_t)0x6b56, (q15_t)0x6b53, (q15_t)0x6b50, (q15_t)0x6b4c,
-  (q15_t)0x6b49, (q15_t)0x6b45, (q15_t)0x6b42, (q15_t)0x6b3e, (q15_t)0x6b3b, (q15_t)0x6b38, (q15_t)0x6b34, (q15_t)0x6b31,
-  (q15_t)0x6b2d, (q15_t)0x6b2a, (q15_t)0x6b26, (q15_t)0x6b23, (q15_t)0x6b20, (q15_t)0x6b1c, (q15_t)0x6b19, (q15_t)0x6b15,
-  (q15_t)0x6b12, (q15_t)0x6b0e, (q15_t)0x6b0b, (q15_t)0x6b07, (q15_t)0x6b04, (q15_t)0x6b01, (q15_t)0x6afd, (q15_t)0x6afa,
-  (q15_t)0x6af6, (q15_t)0x6af3, (q15_t)0x6aef, (q15_t)0x6aec, (q15_t)0x6ae8, (q15_t)0x6ae5, (q15_t)0x6ae1, (q15_t)0x6ade,
-  (q15_t)0x6adb, (q15_t)0x6ad7, (q15_t)0x6ad4, (q15_t)0x6ad0, (q15_t)0x6acd, (q15_t)0x6ac9, (q15_t)0x6ac6, (q15_t)0x6ac2,
-  (q15_t)0x6abf, (q15_t)0x6abb, (q15_t)0x6ab8, (q15_t)0x6ab4, (q15_t)0x6ab1, (q15_t)0x6aae, (q15_t)0x6aaa, (q15_t)0x6aa7,
-  (q15_t)0x6aa3, (q15_t)0x6aa0, (q15_t)0x6a9c, (q15_t)0x6a99, (q15_t)0x6a95, (q15_t)0x6a92, (q15_t)0x6a8e, (q15_t)0x6a8b,
-  (q15_t)0x6a87, (q15_t)0x6a84, (q15_t)0x6a80, (q15_t)0x6a7d, (q15_t)0x6a79, (q15_t)0x6a76, (q15_t)0x6a72, (q15_t)0x6a6f,
-  (q15_t)0x6a6b, (q15_t)0x6a68, (q15_t)0x6a64, (q15_t)0x6a61, (q15_t)0x6a5d, (q15_t)0x6a5a, (q15_t)0x6a56, (q15_t)0x6a53,
-  (q15_t)0x6a4f, (q15_t)0x6a4c, (q15_t)0x6a48, (q15_t)0x6a45, (q15_t)0x6a41, (q15_t)0x6a3e, (q15_t)0x6a3a, (q15_t)0x6a37,
-  (q15_t)0x6a33, (q15_t)0x6a30, (q15_t)0x6a2c, (q15_t)0x6a29, (q15_t)0x6a25, (q15_t)0x6a22, (q15_t)0x6a1e, (q15_t)0x6a1b,
-  (q15_t)0x6a17, (q15_t)0x6a14, (q15_t)0x6a10, (q15_t)0x6a0d, (q15_t)0x6a09, (q15_t)0x6a06, (q15_t)0x6a02, (q15_t)0x69ff,
-  (q15_t)0x69fb, (q15_t)0x69f8, (q15_t)0x69f4, (q15_t)0x69f1, (q15_t)0x69ed, (q15_t)0x69e9, (q15_t)0x69e6, (q15_t)0x69e2,
-  (q15_t)0x69df, (q15_t)0x69db, (q15_t)0x69d8, (q15_t)0x69d4, (q15_t)0x69d1, (q15_t)0x69cd, (q15_t)0x69ca, (q15_t)0x69c6,
-  (q15_t)0x69c3, (q15_t)0x69bf, (q15_t)0x69bc, (q15_t)0x69b8, (q15_t)0x69b4, (q15_t)0x69b1, (q15_t)0x69ad, (q15_t)0x69aa,
-  (q15_t)0x69a6, (q15_t)0x69a3, (q15_t)0x699f, (q15_t)0x699c, (q15_t)0x6998, (q15_t)0x6995, (q15_t)0x6991, (q15_t)0x698d,
-  (q15_t)0x698a, (q15_t)0x6986, (q15_t)0x6983, (q15_t)0x697f, (q15_t)0x697c, (q15_t)0x6978, (q15_t)0x6975, (q15_t)0x6971,
-  (q15_t)0x696d, (q15_t)0x696a, (q15_t)0x6966, (q15_t)0x6963, (q15_t)0x695f, (q15_t)0x695c, (q15_t)0x6958, (q15_t)0x6954,
-  (q15_t)0x6951, (q15_t)0x694d, (q15_t)0x694a, (q15_t)0x6946, (q15_t)0x6943, (q15_t)0x693f, (q15_t)0x693b, (q15_t)0x6938,
-  (q15_t)0x6934, (q15_t)0x6931, (q15_t)0x692d, (q15_t)0x692a, (q15_t)0x6926, (q15_t)0x6922, (q15_t)0x691f, (q15_t)0x691b,
-  (q15_t)0x6918, (q15_t)0x6914, (q15_t)0x6910, (q15_t)0x690d, (q15_t)0x6909, (q15_t)0x6906, (q15_t)0x6902, (q15_t)0x68fe,
-  (q15_t)0x68fb, (q15_t)0x68f7, (q15_t)0x68f4, (q15_t)0x68f0, (q15_t)0x68ec, (q15_t)0x68e9, (q15_t)0x68e5, (q15_t)0x68e2,
-  (q15_t)0x68de, (q15_t)0x68da, (q15_t)0x68d7, (q15_t)0x68d3, (q15_t)0x68d0, (q15_t)0x68cc, (q15_t)0x68c8, (q15_t)0x68c5,
-  (q15_t)0x68c1, (q15_t)0x68be, (q15_t)0x68ba, (q15_t)0x68b6, (q15_t)0x68b3, (q15_t)0x68af, (q15_t)0x68ac, (q15_t)0x68a8,
-  (q15_t)0x68a4, (q15_t)0x68a1, (q15_t)0x689d, (q15_t)0x6899, (q15_t)0x6896, (q15_t)0x6892, (q15_t)0x688f, (q15_t)0x688b,
-  (q15_t)0x6887, (q15_t)0x6884, (q15_t)0x6880, (q15_t)0x687c, (q15_t)0x6879, (q15_t)0x6875, (q15_t)0x6872, (q15_t)0x686e,
-  (q15_t)0x686a, (q15_t)0x6867, (q15_t)0x6863, (q15_t)0x685f, (q15_t)0x685c, (q15_t)0x6858, (q15_t)0x6854, (q15_t)0x6851,
-  (q15_t)0x684d, (q15_t)0x684a, (q15_t)0x6846, (q15_t)0x6842, (q15_t)0x683f, (q15_t)0x683b, (q15_t)0x6837, (q15_t)0x6834,
-  (q15_t)0x6830, (q15_t)0x682c, (q15_t)0x6829, (q15_t)0x6825, (q15_t)0x6821, (q15_t)0x681e, (q15_t)0x681a, (q15_t)0x6816,
-  (q15_t)0x6813, (q15_t)0x680f, (q15_t)0x680b, (q15_t)0x6808, (q15_t)0x6804, (q15_t)0x6800, (q15_t)0x67fd, (q15_t)0x67f9,
-  (q15_t)0x67f5, (q15_t)0x67f2, (q15_t)0x67ee, (q15_t)0x67ea, (q15_t)0x67e7, (q15_t)0x67e3, (q15_t)0x67df, (q15_t)0x67dc,
-  (q15_t)0x67d8, (q15_t)0x67d4, (q15_t)0x67d1, (q15_t)0x67cd, (q15_t)0x67c9, (q15_t)0x67c6, (q15_t)0x67c2, (q15_t)0x67be,
-  (q15_t)0x67bb, (q15_t)0x67b7, (q15_t)0x67b3, (q15_t)0x67b0, (q15_t)0x67ac, (q15_t)0x67a8, (q15_t)0x67a5, (q15_t)0x67a1,
-  (q15_t)0x679d, (q15_t)0x679a, (q15_t)0x6796, (q15_t)0x6792, (q15_t)0x678e, (q15_t)0x678b, (q15_t)0x6787, (q15_t)0x6783,
-  (q15_t)0x6780, (q15_t)0x677c, (q15_t)0x6778, (q15_t)0x6775, (q15_t)0x6771, (q15_t)0x676d, (q15_t)0x6769, (q15_t)0x6766,
-  (q15_t)0x6762, (q15_t)0x675e, (q15_t)0x675b, (q15_t)0x6757, (q15_t)0x6753, (q15_t)0x6750, (q15_t)0x674c, (q15_t)0x6748,
-  (q15_t)0x6744, (q15_t)0x6741, (q15_t)0x673d, (q15_t)0x6739, (q15_t)0x6736, (q15_t)0x6732, (q15_t)0x672e, (q15_t)0x672a,
-  (q15_t)0x6727, (q15_t)0x6723, (q15_t)0x671f, (q15_t)0x671c, (q15_t)0x6718, (q15_t)0x6714, (q15_t)0x6710, (q15_t)0x670d,
-  (q15_t)0x6709, (q15_t)0x6705, (q15_t)0x6701, (q15_t)0x66fe, (q15_t)0x66fa, (q15_t)0x66f6, (q15_t)0x66f3, (q15_t)0x66ef,
-  (q15_t)0x66eb, (q15_t)0x66e7, (q15_t)0x66e4, (q15_t)0x66e0, (q15_t)0x66dc, (q15_t)0x66d8, (q15_t)0x66d5, (q15_t)0x66d1,
-  (q15_t)0x66cd, (q15_t)0x66c9, (q15_t)0x66c6, (q15_t)0x66c2, (q15_t)0x66be, (q15_t)0x66ba, (q15_t)0x66b7, (q15_t)0x66b3,
-  (q15_t)0x66af, (q15_t)0x66ab, (q15_t)0x66a8, (q15_t)0x66a4, (q15_t)0x66a0, (q15_t)0x669c, (q15_t)0x6699, (q15_t)0x6695,
-  (q15_t)0x6691, (q15_t)0x668d, (q15_t)0x668a, (q15_t)0x6686, (q15_t)0x6682, (q15_t)0x667e, (q15_t)0x667b, (q15_t)0x6677,
-  (q15_t)0x6673, (q15_t)0x666f, (q15_t)0x666b, (q15_t)0x6668, (q15_t)0x6664, (q15_t)0x6660, (q15_t)0x665c, (q15_t)0x6659,
-  (q15_t)0x6655, (q15_t)0x6651, (q15_t)0x664d, (q15_t)0x664a, (q15_t)0x6646, (q15_t)0x6642, (q15_t)0x663e, (q15_t)0x663a,
-  (q15_t)0x6637, (q15_t)0x6633, (q15_t)0x662f, (q15_t)0x662b, (q15_t)0x6627, (q15_t)0x6624, (q15_t)0x6620, (q15_t)0x661c,
-  (q15_t)0x6618, (q15_t)0x6615, (q15_t)0x6611, (q15_t)0x660d, (q15_t)0x6609, (q15_t)0x6605, (q15_t)0x6602, (q15_t)0x65fe,
-  (q15_t)0x65fa, (q15_t)0x65f6, (q15_t)0x65f2, (q15_t)0x65ef, (q15_t)0x65eb, (q15_t)0x65e7, (q15_t)0x65e3, (q15_t)0x65df,
-  (q15_t)0x65dc, (q15_t)0x65d8, (q15_t)0x65d4, (q15_t)0x65d0, (q15_t)0x65cc, (q15_t)0x65c9, (q15_t)0x65c5, (q15_t)0x65c1,
-  (q15_t)0x65bd, (q15_t)0x65b9, (q15_t)0x65b5, (q15_t)0x65b2, (q15_t)0x65ae, (q15_t)0x65aa, (q15_t)0x65a6, (q15_t)0x65a2,
-  (q15_t)0x659f, (q15_t)0x659b, (q15_t)0x6597, (q15_t)0x6593, (q15_t)0x658f, (q15_t)0x658b, (q15_t)0x6588, (q15_t)0x6584,
-  (q15_t)0x6580, (q15_t)0x657c, (q15_t)0x6578, (q15_t)0x6574, (q15_t)0x6571, (q15_t)0x656d, (q15_t)0x6569, (q15_t)0x6565,
-  (q15_t)0x6561, (q15_t)0x655d, (q15_t)0x655a, (q15_t)0x6556, (q15_t)0x6552, (q15_t)0x654e, (q15_t)0x654a, (q15_t)0x6546,
-  (q15_t)0x6543, (q15_t)0x653f, (q15_t)0x653b, (q15_t)0x6537, (q15_t)0x6533, (q15_t)0x652f, (q15_t)0x652c, (q15_t)0x6528,
-  (q15_t)0x6524, (q15_t)0x6520, (q15_t)0x651c, (q15_t)0x6518, (q15_t)0x6514, (q15_t)0x6511, (q15_t)0x650d, (q15_t)0x6509,
-  (q15_t)0x6505, (q15_t)0x6501, (q15_t)0x64fd, (q15_t)0x64f9, (q15_t)0x64f6, (q15_t)0x64f2, (q15_t)0x64ee, (q15_t)0x64ea,
-  (q15_t)0x64e6, (q15_t)0x64e2, (q15_t)0x64de, (q15_t)0x64db, (q15_t)0x64d7, (q15_t)0x64d3, (q15_t)0x64cf, (q15_t)0x64cb,
-  (q15_t)0x64c7, (q15_t)0x64c3, (q15_t)0x64bf, (q15_t)0x64bc, (q15_t)0x64b8, (q15_t)0x64b4, (q15_t)0x64b0, (q15_t)0x64ac,
-  (q15_t)0x64a8, (q15_t)0x64a4, (q15_t)0x64a0, (q15_t)0x649c, (q15_t)0x6499, (q15_t)0x6495, (q15_t)0x6491, (q15_t)0x648d,
-  (q15_t)0x6489, (q15_t)0x6485, (q15_t)0x6481, (q15_t)0x647d, (q15_t)0x6479, (q15_t)0x6476, (q15_t)0x6472, (q15_t)0x646e,
-  (q15_t)0x646a, (q15_t)0x6466, (q15_t)0x6462, (q15_t)0x645e, (q15_t)0x645a, (q15_t)0x6456, (q15_t)0x6453, (q15_t)0x644f,
-  (q15_t)0x644b, (q15_t)0x6447, (q15_t)0x6443, (q15_t)0x643f, (q15_t)0x643b, (q15_t)0x6437, (q15_t)0x6433, (q15_t)0x642f,
-  (q15_t)0x642b, (q15_t)0x6428, (q15_t)0x6424, (q15_t)0x6420, (q15_t)0x641c, (q15_t)0x6418, (q15_t)0x6414, (q15_t)0x6410,
-  (q15_t)0x640c, (q15_t)0x6408, (q15_t)0x6404, (q15_t)0x6400, (q15_t)0x63fc, (q15_t)0x63f9, (q15_t)0x63f5, (q15_t)0x63f1,
-  (q15_t)0x63ed, (q15_t)0x63e9, (q15_t)0x63e5, (q15_t)0x63e1, (q15_t)0x63dd, (q15_t)0x63d9, (q15_t)0x63d5, (q15_t)0x63d1,
-  (q15_t)0x63cd, (q15_t)0x63c9, (q15_t)0x63c5, (q15_t)0x63c1, (q15_t)0x63be, (q15_t)0x63ba, (q15_t)0x63b6, (q15_t)0x63b2,
-  (q15_t)0x63ae, (q15_t)0x63aa, (q15_t)0x63a6, (q15_t)0x63a2, (q15_t)0x639e, (q15_t)0x639a, (q15_t)0x6396, (q15_t)0x6392,
-  (q15_t)0x638e, (q15_t)0x638a, (q15_t)0x6386, (q15_t)0x6382, (q15_t)0x637e, (q15_t)0x637a, (q15_t)0x6377, (q15_t)0x6373,
-  (q15_t)0x636f, (q15_t)0x636b, (q15_t)0x6367, (q15_t)0x6363, (q15_t)0x635f, (q15_t)0x635b, (q15_t)0x6357, (q15_t)0x6353,
-  (q15_t)0x634f, (q15_t)0x634b, (q15_t)0x6347, (q15_t)0x6343, (q15_t)0x633f, (q15_t)0x633b, (q15_t)0x6337, (q15_t)0x6333,
-  (q15_t)0x632f, (q15_t)0x632b, (q15_t)0x6327, (q15_t)0x6323, (q15_t)0x631f, (q15_t)0x631b, (q15_t)0x6317, (q15_t)0x6313,
-  (q15_t)0x630f, (q15_t)0x630b, (q15_t)0x6307, (q15_t)0x6303, (q15_t)0x62ff, (q15_t)0x62fb, (q15_t)0x62f7, (q15_t)0x62f3,
-  (q15_t)0x62f0, (q15_t)0x62ec, (q15_t)0x62e8, (q15_t)0x62e4, (q15_t)0x62e0, (q15_t)0x62dc, (q15_t)0x62d8, (q15_t)0x62d4,
-  (q15_t)0x62d0, (q15_t)0x62cc, (q15_t)0x62c8, (q15_t)0x62c4, (q15_t)0x62c0, (q15_t)0x62bc, (q15_t)0x62b8, (q15_t)0x62b4,
-  (q15_t)0x62b0, (q15_t)0x62ac, (q15_t)0x62a8, (q15_t)0x62a4, (q15_t)0x62a0, (q15_t)0x629c, (q15_t)0x6298, (q15_t)0x6294,
-  (q15_t)0x6290, (q15_t)0x628c, (q15_t)0x6288, (q15_t)0x6284, (q15_t)0x6280, (q15_t)0x627c, (q15_t)0x6278, (q15_t)0x6273,
-  (q15_t)0x626f, (q15_t)0x626b, (q15_t)0x6267, (q15_t)0x6263, (q15_t)0x625f, (q15_t)0x625b, (q15_t)0x6257, (q15_t)0x6253,
-  (q15_t)0x624f, (q15_t)0x624b, (q15_t)0x6247, (q15_t)0x6243, (q15_t)0x623f, (q15_t)0x623b, (q15_t)0x6237, (q15_t)0x6233,
-  (q15_t)0x622f, (q15_t)0x622b, (q15_t)0x6227, (q15_t)0x6223, (q15_t)0x621f, (q15_t)0x621b, (q15_t)0x6217, (q15_t)0x6213,
-  (q15_t)0x620f, (q15_t)0x620b, (q15_t)0x6207, (q15_t)0x6203, (q15_t)0x61ff, (q15_t)0x61fb, (q15_t)0x61f7, (q15_t)0x61f3,
-  (q15_t)0x61ee, (q15_t)0x61ea, (q15_t)0x61e6, (q15_t)0x61e2, (q15_t)0x61de, (q15_t)0x61da, (q15_t)0x61d6, (q15_t)0x61d2,
-  (q15_t)0x61ce, (q15_t)0x61ca, (q15_t)0x61c6, (q15_t)0x61c2, (q15_t)0x61be, (q15_t)0x61ba, (q15_t)0x61b6, (q15_t)0x61b2,
-  (q15_t)0x61ae, (q15_t)0x61aa, (q15_t)0x61a6, (q15_t)0x61a1, (q15_t)0x619d, (q15_t)0x6199, (q15_t)0x6195, (q15_t)0x6191,
-  (q15_t)0x618d, (q15_t)0x6189, (q15_t)0x6185, (q15_t)0x6181, (q15_t)0x617d, (q15_t)0x6179, (q15_t)0x6175, (q15_t)0x6171,
-  (q15_t)0x616d, (q15_t)0x6168, (q15_t)0x6164, (q15_t)0x6160, (q15_t)0x615c, (q15_t)0x6158, (q15_t)0x6154, (q15_t)0x6150,
-  (q15_t)0x614c, (q15_t)0x6148, (q15_t)0x6144, (q15_t)0x6140, (q15_t)0x613c, (q15_t)0x6137, (q15_t)0x6133, (q15_t)0x612f,
-  (q15_t)0x612b, (q15_t)0x6127, (q15_t)0x6123, (q15_t)0x611f, (q15_t)0x611b, (q15_t)0x6117, (q15_t)0x6113, (q15_t)0x610f,
-  (q15_t)0x610a, (q15_t)0x6106, (q15_t)0x6102, (q15_t)0x60fe, (q15_t)0x60fa, (q15_t)0x60f6, (q15_t)0x60f2, (q15_t)0x60ee,
-  (q15_t)0x60ea, (q15_t)0x60e6, (q15_t)0x60e1, (q15_t)0x60dd, (q15_t)0x60d9, (q15_t)0x60d5, (q15_t)0x60d1, (q15_t)0x60cd,
-  (q15_t)0x60c9, (q15_t)0x60c5, (q15_t)0x60c1, (q15_t)0x60bc, (q15_t)0x60b8, (q15_t)0x60b4, (q15_t)0x60b0, (q15_t)0x60ac,
-  (q15_t)0x60a8, (q15_t)0x60a4, (q15_t)0x60a0, (q15_t)0x609c, (q15_t)0x6097, (q15_t)0x6093, (q15_t)0x608f, (q15_t)0x608b,
-  (q15_t)0x6087, (q15_t)0x6083, (q15_t)0x607f, (q15_t)0x607b, (q15_t)0x6076, (q15_t)0x6072, (q15_t)0x606e, (q15_t)0x606a,
-  (q15_t)0x6066, (q15_t)0x6062, (q15_t)0x605e, (q15_t)0x6059, (q15_t)0x6055, (q15_t)0x6051, (q15_t)0x604d, (q15_t)0x6049,
-  (q15_t)0x6045, (q15_t)0x6041, (q15_t)0x603c, (q15_t)0x6038, (q15_t)0x6034, (q15_t)0x6030, (q15_t)0x602c, (q15_t)0x6028,
-  (q15_t)0x6024, (q15_t)0x601f, (q15_t)0x601b, (q15_t)0x6017, (q15_t)0x6013, (q15_t)0x600f, (q15_t)0x600b, (q15_t)0x6007,
-  (q15_t)0x6002, (q15_t)0x5ffe, (q15_t)0x5ffa, (q15_t)0x5ff6, (q15_t)0x5ff2, (q15_t)0x5fee, (q15_t)0x5fe9, (q15_t)0x5fe5,
-  (q15_t)0x5fe1, (q15_t)0x5fdd, (q15_t)0x5fd9, (q15_t)0x5fd5, (q15_t)0x5fd0, (q15_t)0x5fcc, (q15_t)0x5fc8, (q15_t)0x5fc4,
-  (q15_t)0x5fc0, (q15_t)0x5fbc, (q15_t)0x5fb7, (q15_t)0x5fb3, (q15_t)0x5faf, (q15_t)0x5fab, (q15_t)0x5fa7, (q15_t)0x5fa3,
-  (q15_t)0x5f9e, (q15_t)0x5f9a, (q15_t)0x5f96, (q15_t)0x5f92, (q15_t)0x5f8e, (q15_t)0x5f8a, (q15_t)0x5f85, (q15_t)0x5f81,
-  (q15_t)0x5f7d, (q15_t)0x5f79, (q15_t)0x5f75, (q15_t)0x5f70, (q15_t)0x5f6c, (q15_t)0x5f68, (q15_t)0x5f64, (q15_t)0x5f60,
-  (q15_t)0x5f5b, (q15_t)0x5f57, (q15_t)0x5f53, (q15_t)0x5f4f, (q15_t)0x5f4b, (q15_t)0x5f46, (q15_t)0x5f42, (q15_t)0x5f3e,
-  (q15_t)0x5f3a, (q15_t)0x5f36, (q15_t)0x5f31, (q15_t)0x5f2d, (q15_t)0x5f29, (q15_t)0x5f25, (q15_t)0x5f21, (q15_t)0x5f1c,
-  (q15_t)0x5f18, (q15_t)0x5f14, (q15_t)0x5f10, (q15_t)0x5f0c, (q15_t)0x5f07, (q15_t)0x5f03, (q15_t)0x5eff, (q15_t)0x5efb,
-  (q15_t)0x5ef7, (q15_t)0x5ef2, (q15_t)0x5eee, (q15_t)0x5eea, (q15_t)0x5ee6, (q15_t)0x5ee2, (q15_t)0x5edd, (q15_t)0x5ed9,
-  (q15_t)0x5ed5, (q15_t)0x5ed1, (q15_t)0x5ecc, (q15_t)0x5ec8, (q15_t)0x5ec4, (q15_t)0x5ec0, (q15_t)0x5ebc, (q15_t)0x5eb7,
-  (q15_t)0x5eb3, (q15_t)0x5eaf, (q15_t)0x5eab, (q15_t)0x5ea6, (q15_t)0x5ea2, (q15_t)0x5e9e, (q15_t)0x5e9a, (q15_t)0x5e95,
-  (q15_t)0x5e91, (q15_t)0x5e8d, (q15_t)0x5e89, (q15_t)0x5e85, (q15_t)0x5e80, (q15_t)0x5e7c, (q15_t)0x5e78, (q15_t)0x5e74,
-  (q15_t)0x5e6f, (q15_t)0x5e6b, (q15_t)0x5e67, (q15_t)0x5e63, (q15_t)0x5e5e, (q15_t)0x5e5a, (q15_t)0x5e56, (q15_t)0x5e52,
-  (q15_t)0x5e4d, (q15_t)0x5e49, (q15_t)0x5e45, (q15_t)0x5e41, (q15_t)0x5e3c, (q15_t)0x5e38, (q15_t)0x5e34, (q15_t)0x5e30,
-  (q15_t)0x5e2b, (q15_t)0x5e27, (q15_t)0x5e23, (q15_t)0x5e1f, (q15_t)0x5e1a, (q15_t)0x5e16, (q15_t)0x5e12, (q15_t)0x5e0e,
-  (q15_t)0x5e09, (q15_t)0x5e05, (q15_t)0x5e01, (q15_t)0x5dfd, (q15_t)0x5df8, (q15_t)0x5df4, (q15_t)0x5df0, (q15_t)0x5deb,
-  (q15_t)0x5de7, (q15_t)0x5de3, (q15_t)0x5ddf, (q15_t)0x5dda, (q15_t)0x5dd6, (q15_t)0x5dd2, (q15_t)0x5dce, (q15_t)0x5dc9,
-  (q15_t)0x5dc5, (q15_t)0x5dc1, (q15_t)0x5dbc, (q15_t)0x5db8, (q15_t)0x5db4, (q15_t)0x5db0, (q15_t)0x5dab, (q15_t)0x5da7,
-  (q15_t)0x5da3, (q15_t)0x5d9e, (q15_t)0x5d9a, (q15_t)0x5d96, (q15_t)0x5d92, (q15_t)0x5d8d, (q15_t)0x5d89, (q15_t)0x5d85,
-  (q15_t)0x5d80, (q15_t)0x5d7c, (q15_t)0x5d78, (q15_t)0x5d74, (q15_t)0x5d6f, (q15_t)0x5d6b, (q15_t)0x5d67, (q15_t)0x5d62,
-  (q15_t)0x5d5e, (q15_t)0x5d5a, (q15_t)0x5d55, (q15_t)0x5d51, (q15_t)0x5d4d, (q15_t)0x5d49, (q15_t)0x5d44, (q15_t)0x5d40,
-  (q15_t)0x5d3c, (q15_t)0x5d37, (q15_t)0x5d33, (q15_t)0x5d2f, (q15_t)0x5d2a, (q15_t)0x5d26, (q15_t)0x5d22, (q15_t)0x5d1e,
-  (q15_t)0x5d19, (q15_t)0x5d15, (q15_t)0x5d11, (q15_t)0x5d0c, (q15_t)0x5d08, (q15_t)0x5d04, (q15_t)0x5cff, (q15_t)0x5cfb,
-  (q15_t)0x5cf7, (q15_t)0x5cf2, (q15_t)0x5cee, (q15_t)0x5cea, (q15_t)0x5ce5, (q15_t)0x5ce1, (q15_t)0x5cdd, (q15_t)0x5cd8,
-  (q15_t)0x5cd4, (q15_t)0x5cd0, (q15_t)0x5ccb, (q15_t)0x5cc7, (q15_t)0x5cc3, (q15_t)0x5cbe, (q15_t)0x5cba, (q15_t)0x5cb6,
-  (q15_t)0x5cb1, (q15_t)0x5cad, (q15_t)0x5ca9, (q15_t)0x5ca4, (q15_t)0x5ca0, (q15_t)0x5c9c, (q15_t)0x5c97, (q15_t)0x5c93,
-  (q15_t)0x5c8f, (q15_t)0x5c8a, (q15_t)0x5c86, (q15_t)0x5c82, (q15_t)0x5c7d, (q15_t)0x5c79, (q15_t)0x5c75, (q15_t)0x5c70,
-  (q15_t)0x5c6c, (q15_t)0x5c68, (q15_t)0x5c63, (q15_t)0x5c5f, (q15_t)0x5c5b, (q15_t)0x5c56, (q15_t)0x5c52, (q15_t)0x5c4e,
-  (q15_t)0x5c49, (q15_t)0x5c45, (q15_t)0x5c41, (q15_t)0x5c3c, (q15_t)0x5c38, (q15_t)0x5c33, (q15_t)0x5c2f, (q15_t)0x5c2b,
-  (q15_t)0x5c26, (q15_t)0x5c22, (q15_t)0x5c1e, (q15_t)0x5c19, (q15_t)0x5c15, (q15_t)0x5c11, (q15_t)0x5c0c, (q15_t)0x5c08,
-  (q15_t)0x5c03, (q15_t)0x5bff, (q15_t)0x5bfb, (q15_t)0x5bf6, (q15_t)0x5bf2, (q15_t)0x5bee, (q15_t)0x5be9, (q15_t)0x5be5,
-  (q15_t)0x5be0, (q15_t)0x5bdc, (q15_t)0x5bd8, (q15_t)0x5bd3, (q15_t)0x5bcf, (q15_t)0x5bcb, (q15_t)0x5bc6, (q15_t)0x5bc2,
-  (q15_t)0x5bbd, (q15_t)0x5bb9, (q15_t)0x5bb5, (q15_t)0x5bb0, (q15_t)0x5bac, (q15_t)0x5ba8, (q15_t)0x5ba3, (q15_t)0x5b9f,
-  (q15_t)0x5b9a, (q15_t)0x5b96, (q15_t)0x5b92, (q15_t)0x5b8d, (q15_t)0x5b89, (q15_t)0x5b84, (q15_t)0x5b80, (q15_t)0x5b7c,
-  (q15_t)0x5b77, (q15_t)0x5b73, (q15_t)0x5b6e, (q15_t)0x5b6a, (q15_t)0x5b66, (q15_t)0x5b61, (q15_t)0x5b5d, (q15_t)0x5b58,
-  (q15_t)0x5b54, (q15_t)0x5b50, (q15_t)0x5b4b, (q15_t)0x5b47, (q15_t)0x5b42, (q15_t)0x5b3e, (q15_t)0x5b3a, (q15_t)0x5b35,
-  (q15_t)0x5b31, (q15_t)0x5b2c, (q15_t)0x5b28, (q15_t)0x5b24, (q15_t)0x5b1f, (q15_t)0x5b1b, (q15_t)0x5b16, (q15_t)0x5b12,
-  (q15_t)0x5b0e, (q15_t)0x5b09, (q15_t)0x5b05, (q15_t)0x5b00, (q15_t)0x5afc, (q15_t)0x5af7, (q15_t)0x5af3, (q15_t)0x5aef,
-  (q15_t)0x5aea, (q15_t)0x5ae6, (q15_t)0x5ae1, (q15_t)0x5add, (q15_t)0x5ad8, (q15_t)0x5ad4, (q15_t)0x5ad0, (q15_t)0x5acb,
-  (q15_t)0x5ac7, (q15_t)0x5ac2, (q15_t)0x5abe, (q15_t)0x5ab9, (q15_t)0x5ab5, (q15_t)0x5ab1, (q15_t)0x5aac, (q15_t)0x5aa8,
-  (q15_t)0x5aa3, (q15_t)0x5a9f, (q15_t)0x5a9a, (q15_t)0x5a96, (q15_t)0x5a92, (q15_t)0x5a8d, (q15_t)0x5a89, (q15_t)0x5a84,
-  (q15_t)0x5a80, (q15_t)0x5a7b, (q15_t)0x5a77, (q15_t)0x5a72, (q15_t)0x5a6e, (q15_t)0x5a6a, (q15_t)0x5a65, (q15_t)0x5a61,
-  (q15_t)0x5a5c, (q15_t)0x5a58, (q15_t)0x5a53, (q15_t)0x5a4f, (q15_t)0x5a4a, (q15_t)0x5a46, (q15_t)0x5a41, (q15_t)0x5a3d,
-  (q15_t)0x5a39, (q15_t)0x5a34, (q15_t)0x5a30, (q15_t)0x5a2b, (q15_t)0x5a27, (q15_t)0x5a22, (q15_t)0x5a1e, (q15_t)0x5a19,
-  (q15_t)0x5a15, (q15_t)0x5a10, (q15_t)0x5a0c, (q15_t)0x5a07, (q15_t)0x5a03, (q15_t)0x59ff, (q15_t)0x59fa, (q15_t)0x59f6,
-  (q15_t)0x59f1, (q15_t)0x59ed, (q15_t)0x59e8, (q15_t)0x59e4, (q15_t)0x59df, (q15_t)0x59db, (q15_t)0x59d6, (q15_t)0x59d2,
-  (q15_t)0x59cd, (q15_t)0x59c9, (q15_t)0x59c4, (q15_t)0x59c0, (q15_t)0x59bb, (q15_t)0x59b7, (q15_t)0x59b2, (q15_t)0x59ae,
-  (q15_t)0x59a9, (q15_t)0x59a5, (q15_t)0x59a1, (q15_t)0x599c, (q15_t)0x5998, (q15_t)0x5993, (q15_t)0x598f, (q15_t)0x598a,
-  (q15_t)0x5986, (q15_t)0x5981, (q15_t)0x597d, (q15_t)0x5978, (q15_t)0x5974, (q15_t)0x596f, (q15_t)0x596b, (q15_t)0x5966,
-  (q15_t)0x5962, (q15_t)0x595d, (q15_t)0x5959, (q15_t)0x5954, (q15_t)0x5950, (q15_t)0x594b, (q15_t)0x5947, (q15_t)0x5942,
-  (q15_t)0x593e, (q15_t)0x5939, (q15_t)0x5935, (q15_t)0x5930, (q15_t)0x592c, (q15_t)0x5927, (q15_t)0x5923, (q15_t)0x591e,
-  (q15_t)0x591a, (q15_t)0x5915, (q15_t)0x5911, (q15_t)0x590c, (q15_t)0x5908, (q15_t)0x5903, (q15_t)0x58fe, (q15_t)0x58fa,
-  (q15_t)0x58f5, (q15_t)0x58f1, (q15_t)0x58ec, (q15_t)0x58e8, (q15_t)0x58e3, (q15_t)0x58df, (q15_t)0x58da, (q15_t)0x58d6,
-  (q15_t)0x58d1, (q15_t)0x58cd, (q15_t)0x58c8, (q15_t)0x58c4, (q15_t)0x58bf, (q15_t)0x58bb, (q15_t)0x58b6, (q15_t)0x58b2,
-  (q15_t)0x58ad, (q15_t)0x58a9, (q15_t)0x58a4, (q15_t)0x589f, (q15_t)0x589b, (q15_t)0x5896, (q15_t)0x5892, (q15_t)0x588d,
-  (q15_t)0x5889, (q15_t)0x5884, (q15_t)0x5880, (q15_t)0x587b, (q15_t)0x5877, (q15_t)0x5872, (q15_t)0x586e, (q15_t)0x5869,
-  (q15_t)0x5864, (q15_t)0x5860, (q15_t)0x585b, (q15_t)0x5857, (q15_t)0x5852, (q15_t)0x584e, (q15_t)0x5849, (q15_t)0x5845,
-  (q15_t)0x5840, (q15_t)0x583c, (q15_t)0x5837, (q15_t)0x5832, (q15_t)0x582e, (q15_t)0x5829, (q15_t)0x5825, (q15_t)0x5820,
-  (q15_t)0x581c, (q15_t)0x5817, (q15_t)0x5813, (q15_t)0x580e, (q15_t)0x5809, (q15_t)0x5805, (q15_t)0x5800, (q15_t)0x57fc,
-  (q15_t)0x57f7, (q15_t)0x57f3, (q15_t)0x57ee, (q15_t)0x57e9, (q15_t)0x57e5, (q15_t)0x57e0, (q15_t)0x57dc, (q15_t)0x57d7,
-  (q15_t)0x57d3, (q15_t)0x57ce, (q15_t)0x57c9, (q15_t)0x57c5, (q15_t)0x57c0, (q15_t)0x57bc, (q15_t)0x57b7, (q15_t)0x57b3,
-  (q15_t)0x57ae, (q15_t)0x57a9, (q15_t)0x57a5, (q15_t)0x57a0, (q15_t)0x579c, (q15_t)0x5797, (q15_t)0x5793, (q15_t)0x578e,
-  (q15_t)0x5789, (q15_t)0x5785, (q15_t)0x5780, (q15_t)0x577c, (q15_t)0x5777, (q15_t)0x5772, (q15_t)0x576e, (q15_t)0x5769,
-  (q15_t)0x5765, (q15_t)0x5760, (q15_t)0x575c, (q15_t)0x5757, (q15_t)0x5752, (q15_t)0x574e, (q15_t)0x5749, (q15_t)0x5745,
-  (q15_t)0x5740, (q15_t)0x573b, (q15_t)0x5737, (q15_t)0x5732, (q15_t)0x572e, (q15_t)0x5729, (q15_t)0x5724, (q15_t)0x5720,
-  (q15_t)0x571b, (q15_t)0x5717, (q15_t)0x5712, (q15_t)0x570d, (q15_t)0x5709, (q15_t)0x5704, (q15_t)0x56ff, (q15_t)0x56fb,
-  (q15_t)0x56f6, (q15_t)0x56f2, (q15_t)0x56ed, (q15_t)0x56e8, (q15_t)0x56e4, (q15_t)0x56df, (q15_t)0x56db, (q15_t)0x56d6,
-  (q15_t)0x56d1, (q15_t)0x56cd, (q15_t)0x56c8, (q15_t)0x56c4, (q15_t)0x56bf, (q15_t)0x56ba, (q15_t)0x56b6, (q15_t)0x56b1,
-  (q15_t)0x56ac, (q15_t)0x56a8, (q15_t)0x56a3, (q15_t)0x569f, (q15_t)0x569a, (q15_t)0x5695, (q15_t)0x5691, (q15_t)0x568c,
-  (q15_t)0x5687, (q15_t)0x5683, (q15_t)0x567e, (q15_t)0x5679, (q15_t)0x5675, (q15_t)0x5670, (q15_t)0x566c, (q15_t)0x5667,
-  (q15_t)0x5662, (q15_t)0x565e, (q15_t)0x5659, (q15_t)0x5654, (q15_t)0x5650, (q15_t)0x564b, (q15_t)0x5646, (q15_t)0x5642,
-  (q15_t)0x563d, (q15_t)0x5639, (q15_t)0x5634, (q15_t)0x562f, (q15_t)0x562b, (q15_t)0x5626, (q15_t)0x5621, (q15_t)0x561d,
-  (q15_t)0x5618, (q15_t)0x5613, (q15_t)0x560f, (q15_t)0x560a, (q15_t)0x5605, (q15_t)0x5601, (q15_t)0x55fc, (q15_t)0x55f7,
-  (q15_t)0x55f3, (q15_t)0x55ee, (q15_t)0x55ea, (q15_t)0x55e5, (q15_t)0x55e0, (q15_t)0x55dc, (q15_t)0x55d7, (q15_t)0x55d2,
-  (q15_t)0x55ce, (q15_t)0x55c9, (q15_t)0x55c4, (q15_t)0x55c0, (q15_t)0x55bb, (q15_t)0x55b6, (q15_t)0x55b2, (q15_t)0x55ad,
-  (q15_t)0x55a8, (q15_t)0x55a4, (q15_t)0x559f, (q15_t)0x559a, (q15_t)0x5596, (q15_t)0x5591, (q15_t)0x558c, (q15_t)0x5588,
-  (q15_t)0x5583, (q15_t)0x557e, (q15_t)0x5579, (q15_t)0x5575, (q15_t)0x5570, (q15_t)0x556b, (q15_t)0x5567, (q15_t)0x5562,
-  (q15_t)0x555d, (q15_t)0x5559, (q15_t)0x5554, (q15_t)0x554f, (q15_t)0x554b, (q15_t)0x5546, (q15_t)0x5541, (q15_t)0x553d,
-  (q15_t)0x5538, (q15_t)0x5533, (q15_t)0x552f, (q15_t)0x552a, (q15_t)0x5525, (q15_t)0x5520, (q15_t)0x551c, (q15_t)0x5517,
-  (q15_t)0x5512, (q15_t)0x550e, (q15_t)0x5509, (q15_t)0x5504, (q15_t)0x5500, (q15_t)0x54fb, (q15_t)0x54f6, (q15_t)0x54f2,
-  (q15_t)0x54ed, (q15_t)0x54e8, (q15_t)0x54e3, (q15_t)0x54df, (q15_t)0x54da, (q15_t)0x54d5, (q15_t)0x54d1, (q15_t)0x54cc,
-  (q15_t)0x54c7, (q15_t)0x54c2, (q15_t)0x54be, (q15_t)0x54b9, (q15_t)0x54b4, (q15_t)0x54b0, (q15_t)0x54ab, (q15_t)0x54a6,
-  (q15_t)0x54a2, (q15_t)0x549d, (q15_t)0x5498, (q15_t)0x5493, (q15_t)0x548f, (q15_t)0x548a, (q15_t)0x5485, (q15_t)0x5480,
-  (q15_t)0x547c, (q15_t)0x5477, (q15_t)0x5472, (q15_t)0x546e, (q15_t)0x5469, (q15_t)0x5464, (q15_t)0x545f, (q15_t)0x545b,
-  (q15_t)0x5456, (q15_t)0x5451, (q15_t)0x544d, (q15_t)0x5448, (q15_t)0x5443, (q15_t)0x543e, (q15_t)0x543a, (q15_t)0x5435,
-  (q15_t)0x5430, (q15_t)0x542b, (q15_t)0x5427, (q15_t)0x5422, (q15_t)0x541d, (q15_t)0x5418, (q15_t)0x5414, (q15_t)0x540f,
-  (q15_t)0x540a, (q15_t)0x5406, (q15_t)0x5401, (q15_t)0x53fc, (q15_t)0x53f7, (q15_t)0x53f3, (q15_t)0x53ee, (q15_t)0x53e9,
-  (q15_t)0x53e4, (q15_t)0x53e0, (q15_t)0x53db, (q15_t)0x53d6, (q15_t)0x53d1, (q15_t)0x53cd, (q15_t)0x53c8, (q15_t)0x53c3,
-  (q15_t)0x53be, (q15_t)0x53ba, (q15_t)0x53b5, (q15_t)0x53b0, (q15_t)0x53ab, (q15_t)0x53a7, (q15_t)0x53a2, (q15_t)0x539d,
-  (q15_t)0x5398, (q15_t)0x5394, (q15_t)0x538f, (q15_t)0x538a, (q15_t)0x5385, (q15_t)0x5380, (q15_t)0x537c, (q15_t)0x5377,
-  (q15_t)0x5372, (q15_t)0x536d, (q15_t)0x5369, (q15_t)0x5364, (q15_t)0x535f, (q15_t)0x535a, (q15_t)0x5356, (q15_t)0x5351,
-  (q15_t)0x534c, (q15_t)0x5347, (q15_t)0x5343, (q15_t)0x533e, (q15_t)0x5339, (q15_t)0x5334, (q15_t)0x532f, (q15_t)0x532b,
-  (q15_t)0x5326, (q15_t)0x5321, (q15_t)0x531c, (q15_t)0x5318, (q15_t)0x5313, (q15_t)0x530e, (q15_t)0x5309, (q15_t)0x5304,
-  (q15_t)0x5300, (q15_t)0x52fb, (q15_t)0x52f6, (q15_t)0x52f1, (q15_t)0x52ec, (q15_t)0x52e8, (q15_t)0x52e3, (q15_t)0x52de,
-  (q15_t)0x52d9, (q15_t)0x52d5, (q15_t)0x52d0, (q15_t)0x52cb, (q15_t)0x52c6, (q15_t)0x52c1, (q15_t)0x52bd, (q15_t)0x52b8,
-  (q15_t)0x52b3, (q15_t)0x52ae, (q15_t)0x52a9, (q15_t)0x52a5, (q15_t)0x52a0, (q15_t)0x529b, (q15_t)0x5296, (q15_t)0x5291,
-  (q15_t)0x528d, (q15_t)0x5288, (q15_t)0x5283, (q15_t)0x527e, (q15_t)0x5279, (q15_t)0x5275, (q15_t)0x5270, (q15_t)0x526b,
-  (q15_t)0x5266, (q15_t)0x5261, (q15_t)0x525d, (q15_t)0x5258, (q15_t)0x5253, (q15_t)0x524e, (q15_t)0x5249, (q15_t)0x5244,
-  (q15_t)0x5240, (q15_t)0x523b, (q15_t)0x5236, (q15_t)0x5231, (q15_t)0x522c, (q15_t)0x5228, (q15_t)0x5223, (q15_t)0x521e,
-  (q15_t)0x5219, (q15_t)0x5214, (q15_t)0x520f, (q15_t)0x520b, (q15_t)0x5206, (q15_t)0x5201, (q15_t)0x51fc, (q15_t)0x51f7,
-  (q15_t)0x51f3, (q15_t)0x51ee, (q15_t)0x51e9, (q15_t)0x51e4, (q15_t)0x51df, (q15_t)0x51da, (q15_t)0x51d6, (q15_t)0x51d1,
-  (q15_t)0x51cc, (q15_t)0x51c7, (q15_t)0x51c2, (q15_t)0x51bd, (q15_t)0x51b9, (q15_t)0x51b4, (q15_t)0x51af, (q15_t)0x51aa,
-  (q15_t)0x51a5, (q15_t)0x51a0, (q15_t)0x519c, (q15_t)0x5197, (q15_t)0x5192, (q15_t)0x518d, (q15_t)0x5188, (q15_t)0x5183,
-  (q15_t)0x517e, (q15_t)0x517a, (q15_t)0x5175, (q15_t)0x5170, (q15_t)0x516b, (q15_t)0x5166, (q15_t)0x5161, (q15_t)0x515d,
-  (q15_t)0x5158, (q15_t)0x5153, (q15_t)0x514e, (q15_t)0x5149, (q15_t)0x5144, (q15_t)0x513f, (q15_t)0x513b, (q15_t)0x5136,
-  (q15_t)0x5131, (q15_t)0x512c, (q15_t)0x5127, (q15_t)0x5122, (q15_t)0x511d, (q15_t)0x5119, (q15_t)0x5114, (q15_t)0x510f,
-  (q15_t)0x510a, (q15_t)0x5105, (q15_t)0x5100, (q15_t)0x50fb, (q15_t)0x50f7, (q15_t)0x50f2, (q15_t)0x50ed, (q15_t)0x50e8,
-  (q15_t)0x50e3, (q15_t)0x50de, (q15_t)0x50d9, (q15_t)0x50d4, (q15_t)0x50d0, (q15_t)0x50cb, (q15_t)0x50c6, (q15_t)0x50c1,
-  (q15_t)0x50bc, (q15_t)0x50b7, (q15_t)0x50b2, (q15_t)0x50ad, (q15_t)0x50a9, (q15_t)0x50a4, (q15_t)0x509f, (q15_t)0x509a,
-  (q15_t)0x5095, (q15_t)0x5090, (q15_t)0x508b, (q15_t)0x5086, (q15_t)0x5082, (q15_t)0x507d, (q15_t)0x5078, (q15_t)0x5073,
-  (q15_t)0x506e, (q15_t)0x5069, (q15_t)0x5064, (q15_t)0x505f, (q15_t)0x505a, (q15_t)0x5056, (q15_t)0x5051, (q15_t)0x504c,
-  (q15_t)0x5047, (q15_t)0x5042, (q15_t)0x503d, (q15_t)0x5038, (q15_t)0x5033, (q15_t)0x502e, (q15_t)0x5029, (q15_t)0x5025,
-  (q15_t)0x5020, (q15_t)0x501b, (q15_t)0x5016, (q15_t)0x5011, (q15_t)0x500c, (q15_t)0x5007, (q15_t)0x5002, (q15_t)0x4ffd,
-  (q15_t)0x4ff8, (q15_t)0x4ff4, (q15_t)0x4fef, (q15_t)0x4fea, (q15_t)0x4fe5, (q15_t)0x4fe0, (q15_t)0x4fdb, (q15_t)0x4fd6,
-  (q15_t)0x4fd1, (q15_t)0x4fcc, (q15_t)0x4fc7, (q15_t)0x4fc2, (q15_t)0x4fbe, (q15_t)0x4fb9, (q15_t)0x4fb4, (q15_t)0x4faf,
-  (q15_t)0x4faa, (q15_t)0x4fa5, (q15_t)0x4fa0, (q15_t)0x4f9b, (q15_t)0x4f96, (q15_t)0x4f91, (q15_t)0x4f8c, (q15_t)0x4f87,
-  (q15_t)0x4f82, (q15_t)0x4f7e, (q15_t)0x4f79, (q15_t)0x4f74, (q15_t)0x4f6f, (q15_t)0x4f6a, (q15_t)0x4f65, (q15_t)0x4f60,
-  (q15_t)0x4f5b, (q15_t)0x4f56, (q15_t)0x4f51, (q15_t)0x4f4c, (q15_t)0x4f47, (q15_t)0x4f42, (q15_t)0x4f3d, (q15_t)0x4f39,
-  (q15_t)0x4f34, (q15_t)0x4f2f, (q15_t)0x4f2a, (q15_t)0x4f25, (q15_t)0x4f20, (q15_t)0x4f1b, (q15_t)0x4f16, (q15_t)0x4f11,
-  (q15_t)0x4f0c, (q15_t)0x4f07, (q15_t)0x4f02, (q15_t)0x4efd, (q15_t)0x4ef8, (q15_t)0x4ef3, (q15_t)0x4eee, (q15_t)0x4ee9,
-  (q15_t)0x4ee5, (q15_t)0x4ee0, (q15_t)0x4edb, (q15_t)0x4ed6, (q15_t)0x4ed1, (q15_t)0x4ecc, (q15_t)0x4ec7, (q15_t)0x4ec2,
-  (q15_t)0x4ebd, (q15_t)0x4eb8, (q15_t)0x4eb3, (q15_t)0x4eae, (q15_t)0x4ea9, (q15_t)0x4ea4, (q15_t)0x4e9f, (q15_t)0x4e9a,
-  (q15_t)0x4e95, (q15_t)0x4e90, (q15_t)0x4e8b, (q15_t)0x4e86, (q15_t)0x4e81, (q15_t)0x4e7c, (q15_t)0x4e78, (q15_t)0x4e73,
-  (q15_t)0x4e6e, (q15_t)0x4e69, (q15_t)0x4e64, (q15_t)0x4e5f, (q15_t)0x4e5a, (q15_t)0x4e55, (q15_t)0x4e50, (q15_t)0x4e4b,
-  (q15_t)0x4e46, (q15_t)0x4e41, (q15_t)0x4e3c, (q15_t)0x4e37, (q15_t)0x4e32, (q15_t)0x4e2d, (q15_t)0x4e28, (q15_t)0x4e23,
-  (q15_t)0x4e1e, (q15_t)0x4e19, (q15_t)0x4e14, (q15_t)0x4e0f, (q15_t)0x4e0a, (q15_t)0x4e05, (q15_t)0x4e00, (q15_t)0x4dfb,
-  (q15_t)0x4df6, (q15_t)0x4df1, (q15_t)0x4dec, (q15_t)0x4de7, (q15_t)0x4de2, (q15_t)0x4ddd, (q15_t)0x4dd8, (q15_t)0x4dd3,
-  (q15_t)0x4dce, (q15_t)0x4dc9, (q15_t)0x4dc4, (q15_t)0x4dbf, (q15_t)0x4dba, (q15_t)0x4db5, (q15_t)0x4db0, (q15_t)0x4dab,
-  (q15_t)0x4da6, (q15_t)0x4da1, (q15_t)0x4d9c, (q15_t)0x4d97, (q15_t)0x4d92, (q15_t)0x4d8d, (q15_t)0x4d88, (q15_t)0x4d83,
-  (q15_t)0x4d7e, (q15_t)0x4d79, (q15_t)0x4d74, (q15_t)0x4d6f, (q15_t)0x4d6a, (q15_t)0x4d65, (q15_t)0x4d60, (q15_t)0x4d5b,
-  (q15_t)0x4d56, (q15_t)0x4d51, (q15_t)0x4d4c, (q15_t)0x4d47, (q15_t)0x4d42, (q15_t)0x4d3d, (q15_t)0x4d38, (q15_t)0x4d33,
-  (q15_t)0x4d2e, (q15_t)0x4d29, (q15_t)0x4d24, (q15_t)0x4d1f, (q15_t)0x4d1a, (q15_t)0x4d15, (q15_t)0x4d10, (q15_t)0x4d0b,
-  (q15_t)0x4d06, (q15_t)0x4d01, (q15_t)0x4cfc, (q15_t)0x4cf7, (q15_t)0x4cf2, (q15_t)0x4ced, (q15_t)0x4ce8, (q15_t)0x4ce3,
-  (q15_t)0x4cde, (q15_t)0x4cd9, (q15_t)0x4cd4, (q15_t)0x4ccf, (q15_t)0x4cca, (q15_t)0x4cc5, (q15_t)0x4cc0, (q15_t)0x4cbb,
-  (q15_t)0x4cb6, (q15_t)0x4cb1, (q15_t)0x4cac, (q15_t)0x4ca7, (q15_t)0x4ca2, (q15_t)0x4c9d, (q15_t)0x4c98, (q15_t)0x4c93,
-  (q15_t)0x4c8e, (q15_t)0x4c88, (q15_t)0x4c83, (q15_t)0x4c7e, (q15_t)0x4c79, (q15_t)0x4c74, (q15_t)0x4c6f, (q15_t)0x4c6a,
-  (q15_t)0x4c65, (q15_t)0x4c60, (q15_t)0x4c5b, (q15_t)0x4c56, (q15_t)0x4c51, (q15_t)0x4c4c, (q15_t)0x4c47, (q15_t)0x4c42,
-  (q15_t)0x4c3d, (q15_t)0x4c38, (q15_t)0x4c33, (q15_t)0x4c2e, (q15_t)0x4c29, (q15_t)0x4c24, (q15_t)0x4c1f, (q15_t)0x4c1a,
-  (q15_t)0x4c14, (q15_t)0x4c0f, (q15_t)0x4c0a, (q15_t)0x4c05, (q15_t)0x4c00, (q15_t)0x4bfb, (q15_t)0x4bf6, (q15_t)0x4bf1,
-  (q15_t)0x4bec, (q15_t)0x4be7, (q15_t)0x4be2, (q15_t)0x4bdd, (q15_t)0x4bd8, (q15_t)0x4bd3, (q15_t)0x4bce, (q15_t)0x4bc9,
-  (q15_t)0x4bc4, (q15_t)0x4bbe, (q15_t)0x4bb9, (q15_t)0x4bb4, (q15_t)0x4baf, (q15_t)0x4baa, (q15_t)0x4ba5, (q15_t)0x4ba0,
-  (q15_t)0x4b9b, (q15_t)0x4b96, (q15_t)0x4b91, (q15_t)0x4b8c, (q15_t)0x4b87, (q15_t)0x4b82, (q15_t)0x4b7d, (q15_t)0x4b77,
-  (q15_t)0x4b72, (q15_t)0x4b6d, (q15_t)0x4b68, (q15_t)0x4b63, (q15_t)0x4b5e, (q15_t)0x4b59, (q15_t)0x4b54, (q15_t)0x4b4f,
-  (q15_t)0x4b4a, (q15_t)0x4b45, (q15_t)0x4b40, (q15_t)0x4b3b, (q15_t)0x4b35, (q15_t)0x4b30, (q15_t)0x4b2b, (q15_t)0x4b26,
-  (q15_t)0x4b21, (q15_t)0x4b1c, (q15_t)0x4b17, (q15_t)0x4b12, (q15_t)0x4b0d, (q15_t)0x4b08, (q15_t)0x4b03, (q15_t)0x4afd,
-  (q15_t)0x4af8, (q15_t)0x4af3, (q15_t)0x4aee, (q15_t)0x4ae9, (q15_t)0x4ae4, (q15_t)0x4adf, (q15_t)0x4ada, (q15_t)0x4ad5,
-  (q15_t)0x4ad0, (q15_t)0x4acb, (q15_t)0x4ac5, (q15_t)0x4ac0, (q15_t)0x4abb, (q15_t)0x4ab6, (q15_t)0x4ab1, (q15_t)0x4aac,
-  (q15_t)0x4aa7, (q15_t)0x4aa2, (q15_t)0x4a9d, (q15_t)0x4a97, (q15_t)0x4a92, (q15_t)0x4a8d, (q15_t)0x4a88, (q15_t)0x4a83,
-  (q15_t)0x4a7e, (q15_t)0x4a79, (q15_t)0x4a74, (q15_t)0x4a6f, (q15_t)0x4a6a, (q15_t)0x4a64, (q15_t)0x4a5f, (q15_t)0x4a5a,
-  (q15_t)0x4a55, (q15_t)0x4a50, (q15_t)0x4a4b, (q15_t)0x4a46, (q15_t)0x4a41, (q15_t)0x4a3b, (q15_t)0x4a36, (q15_t)0x4a31,
-  (q15_t)0x4a2c, (q15_t)0x4a27, (q15_t)0x4a22, (q15_t)0x4a1d, (q15_t)0x4a18, (q15_t)0x4a12, (q15_t)0x4a0d, (q15_t)0x4a08,
-  (q15_t)0x4a03, (q15_t)0x49fe, (q15_t)0x49f9, (q15_t)0x49f4, (q15_t)0x49ef, (q15_t)0x49e9, (q15_t)0x49e4, (q15_t)0x49df,
-  (q15_t)0x49da, (q15_t)0x49d5, (q15_t)0x49d0, (q15_t)0x49cb, (q15_t)0x49c6, (q15_t)0x49c0, (q15_t)0x49bb, (q15_t)0x49b6,
-  (q15_t)0x49b1, (q15_t)0x49ac, (q15_t)0x49a7, (q15_t)0x49a2, (q15_t)0x499c, (q15_t)0x4997, (q15_t)0x4992, (q15_t)0x498d,
-  (q15_t)0x4988, (q15_t)0x4983, (q15_t)0x497e, (q15_t)0x4978, (q15_t)0x4973, (q15_t)0x496e, (q15_t)0x4969, (q15_t)0x4964,
-  (q15_t)0x495f, (q15_t)0x495a, (q15_t)0x4954, (q15_t)0x494f, (q15_t)0x494a, (q15_t)0x4945, (q15_t)0x4940, (q15_t)0x493b,
-  (q15_t)0x4936, (q15_t)0x4930, (q15_t)0x492b, (q15_t)0x4926, (q15_t)0x4921, (q15_t)0x491c, (q15_t)0x4917, (q15_t)0x4911,
-  (q15_t)0x490c, (q15_t)0x4907, (q15_t)0x4902, (q15_t)0x48fd, (q15_t)0x48f8, (q15_t)0x48f2, (q15_t)0x48ed, (q15_t)0x48e8,
-  (q15_t)0x48e3, (q15_t)0x48de, (q15_t)0x48d9, (q15_t)0x48d3, (q15_t)0x48ce, (q15_t)0x48c9, (q15_t)0x48c4, (q15_t)0x48bf,
-  (q15_t)0x48ba, (q15_t)0x48b4, (q15_t)0x48af, (q15_t)0x48aa, (q15_t)0x48a5, (q15_t)0x48a0, (q15_t)0x489b, (q15_t)0x4895,
-  (q15_t)0x4890, (q15_t)0x488b, (q15_t)0x4886, (q15_t)0x4881, (q15_t)0x487c, (q15_t)0x4876, (q15_t)0x4871, (q15_t)0x486c,
-  (q15_t)0x4867, (q15_t)0x4862, (q15_t)0x485c, (q15_t)0x4857, (q15_t)0x4852, (q15_t)0x484d, (q15_t)0x4848, (q15_t)0x4843,
-  (q15_t)0x483d, (q15_t)0x4838, (q15_t)0x4833, (q15_t)0x482e, (q15_t)0x4829, (q15_t)0x4823, (q15_t)0x481e, (q15_t)0x4819,
-  (q15_t)0x4814, (q15_t)0x480f, (q15_t)0x4809, (q15_t)0x4804, (q15_t)0x47ff, (q15_t)0x47fa, (q15_t)0x47f5, (q15_t)0x47ef,
-  (q15_t)0x47ea, (q15_t)0x47e5, (q15_t)0x47e0, (q15_t)0x47db, (q15_t)0x47d5, (q15_t)0x47d0, (q15_t)0x47cb, (q15_t)0x47c6,
-  (q15_t)0x47c1, (q15_t)0x47bb, (q15_t)0x47b6, (q15_t)0x47b1, (q15_t)0x47ac, (q15_t)0x47a7, (q15_t)0x47a1, (q15_t)0x479c,
-  (q15_t)0x4797, (q15_t)0x4792, (q15_t)0x478d, (q15_t)0x4787, (q15_t)0x4782, (q15_t)0x477d, (q15_t)0x4778, (q15_t)0x4773,
-  (q15_t)0x476d, (q15_t)0x4768, (q15_t)0x4763, (q15_t)0x475e, (q15_t)0x4758, (q15_t)0x4753, (q15_t)0x474e, (q15_t)0x4749,
-  (q15_t)0x4744, (q15_t)0x473e, (q15_t)0x4739, (q15_t)0x4734, (q15_t)0x472f, (q15_t)0x4729, (q15_t)0x4724, (q15_t)0x471f,
-  (q15_t)0x471a, (q15_t)0x4715, (q15_t)0x470f, (q15_t)0x470a, (q15_t)0x4705, (q15_t)0x4700, (q15_t)0x46fa, (q15_t)0x46f5,
-  (q15_t)0x46f0, (q15_t)0x46eb, (q15_t)0x46e6, (q15_t)0x46e0, (q15_t)0x46db, (q15_t)0x46d6, (q15_t)0x46d1, (q15_t)0x46cb,
-  (q15_t)0x46c6, (q15_t)0x46c1, (q15_t)0x46bc, (q15_t)0x46b6, (q15_t)0x46b1, (q15_t)0x46ac, (q15_t)0x46a7, (q15_t)0x46a1,
-  (q15_t)0x469c, (q15_t)0x4697, (q15_t)0x4692, (q15_t)0x468d, (q15_t)0x4687, (q15_t)0x4682, (q15_t)0x467d, (q15_t)0x4678,
-  (q15_t)0x4672, (q15_t)0x466d, (q15_t)0x4668, (q15_t)0x4663, (q15_t)0x465d, (q15_t)0x4658, (q15_t)0x4653, (q15_t)0x464e,
-  (q15_t)0x4648, (q15_t)0x4643, (q15_t)0x463e, (q15_t)0x4639, (q15_t)0x4633, (q15_t)0x462e, (q15_t)0x4629, (q15_t)0x4624,
-  (q15_t)0x461e, (q15_t)0x4619, (q15_t)0x4614, (q15_t)0x460e, (q15_t)0x4609, (q15_t)0x4604, (q15_t)0x45ff, (q15_t)0x45f9,
-  (q15_t)0x45f4, (q15_t)0x45ef, (q15_t)0x45ea, (q15_t)0x45e4, (q15_t)0x45df, (q15_t)0x45da, (q15_t)0x45d5, (q15_t)0x45cf,
-  (q15_t)0x45ca, (q15_t)0x45c5, (q15_t)0x45c0, (q15_t)0x45ba, (q15_t)0x45b5, (q15_t)0x45b0, (q15_t)0x45aa, (q15_t)0x45a5,
-  (q15_t)0x45a0, (q15_t)0x459b, (q15_t)0x4595, (q15_t)0x4590, (q15_t)0x458b, (q15_t)0x4586, (q15_t)0x4580, (q15_t)0x457b,
-  (q15_t)0x4576, (q15_t)0x4570, (q15_t)0x456b, (q15_t)0x4566, (q15_t)0x4561, (q15_t)0x455b, (q15_t)0x4556, (q15_t)0x4551,
-  (q15_t)0x454b, (q15_t)0x4546, (q15_t)0x4541, (q15_t)0x453c, (q15_t)0x4536, (q15_t)0x4531, (q15_t)0x452c, (q15_t)0x4526,
-  (q15_t)0x4521, (q15_t)0x451c, (q15_t)0x4517, (q15_t)0x4511, (q15_t)0x450c, (q15_t)0x4507, (q15_t)0x4501, (q15_t)0x44fc,
-  (q15_t)0x44f7, (q15_t)0x44f2, (q15_t)0x44ec, (q15_t)0x44e7, (q15_t)0x44e2, (q15_t)0x44dc, (q15_t)0x44d7, (q15_t)0x44d2,
-  (q15_t)0x44cd, (q15_t)0x44c7, (q15_t)0x44c2, (q15_t)0x44bd, (q15_t)0x44b7, (q15_t)0x44b2, (q15_t)0x44ad, (q15_t)0x44a7,
-  (q15_t)0x44a2, (q15_t)0x449d, (q15_t)0x4497, (q15_t)0x4492, (q15_t)0x448d, (q15_t)0x4488, (q15_t)0x4482, (q15_t)0x447d,
-  (q15_t)0x4478, (q15_t)0x4472, (q15_t)0x446d, (q15_t)0x4468, (q15_t)0x4462, (q15_t)0x445d, (q15_t)0x4458, (q15_t)0x4452,
-  (q15_t)0x444d, (q15_t)0x4448, (q15_t)0x4443, (q15_t)0x443d, (q15_t)0x4438, (q15_t)0x4433, (q15_t)0x442d, (q15_t)0x4428,
-  (q15_t)0x4423, (q15_t)0x441d, (q15_t)0x4418, (q15_t)0x4413, (q15_t)0x440d, (q15_t)0x4408, (q15_t)0x4403, (q15_t)0x43fd,
-  (q15_t)0x43f8, (q15_t)0x43f3, (q15_t)0x43ed, (q15_t)0x43e8, (q15_t)0x43e3, (q15_t)0x43dd, (q15_t)0x43d8, (q15_t)0x43d3,
-  (q15_t)0x43cd, (q15_t)0x43c8, (q15_t)0x43c3, (q15_t)0x43bd, (q15_t)0x43b8, (q15_t)0x43b3, (q15_t)0x43ad, (q15_t)0x43a8,
-  (q15_t)0x43a3, (q15_t)0x439d, (q15_t)0x4398, (q15_t)0x4393, (q15_t)0x438d, (q15_t)0x4388, (q15_t)0x4383, (q15_t)0x437d,
-  (q15_t)0x4378, (q15_t)0x4373, (q15_t)0x436d, (q15_t)0x4368, (q15_t)0x4363, (q15_t)0x435d, (q15_t)0x4358, (q15_t)0x4353,
-  (q15_t)0x434d, (q15_t)0x4348, (q15_t)0x4343, (q15_t)0x433d, (q15_t)0x4338, (q15_t)0x4333, (q15_t)0x432d, (q15_t)0x4328,
-  (q15_t)0x4323, (q15_t)0x431d, (q15_t)0x4318, (q15_t)0x4313, (q15_t)0x430d, (q15_t)0x4308, (q15_t)0x4302, (q15_t)0x42fd,
-  (q15_t)0x42f8, (q15_t)0x42f2, (q15_t)0x42ed, (q15_t)0x42e8, (q15_t)0x42e2, (q15_t)0x42dd, (q15_t)0x42d8, (q15_t)0x42d2,
-  (q15_t)0x42cd, (q15_t)0x42c8, (q15_t)0x42c2, (q15_t)0x42bd, (q15_t)0x42b7, (q15_t)0x42b2, (q15_t)0x42ad, (q15_t)0x42a7,
-  (q15_t)0x42a2, (q15_t)0x429d, (q15_t)0x4297, (q15_t)0x4292, (q15_t)0x428d, (q15_t)0x4287, (q15_t)0x4282, (q15_t)0x427c,
-  (q15_t)0x4277, (q15_t)0x4272, (q15_t)0x426c, (q15_t)0x4267, (q15_t)0x4262, (q15_t)0x425c, (q15_t)0x4257, (q15_t)0x4251,
-  (q15_t)0x424c, (q15_t)0x4247, (q15_t)0x4241, (q15_t)0x423c, (q15_t)0x4237, (q15_t)0x4231, (q15_t)0x422c, (q15_t)0x4226,
-  (q15_t)0x4221, (q15_t)0x421c, (q15_t)0x4216, (q15_t)0x4211, (q15_t)0x420c, (q15_t)0x4206, (q15_t)0x4201, (q15_t)0x41fb,
-  (q15_t)0x41f6, (q15_t)0x41f1, (q15_t)0x41eb, (q15_t)0x41e6, (q15_t)0x41e0, (q15_t)0x41db, (q15_t)0x41d6, (q15_t)0x41d0,
-  (q15_t)0x41cb, (q15_t)0x41c6, (q15_t)0x41c0, (q15_t)0x41bb, (q15_t)0x41b5, (q15_t)0x41b0, (q15_t)0x41ab, (q15_t)0x41a5,
-  (q15_t)0x41a0, (q15_t)0x419a, (q15_t)0x4195, (q15_t)0x4190, (q15_t)0x418a, (q15_t)0x4185, (q15_t)0x417f, (q15_t)0x417a,
-  (q15_t)0x4175, (q15_t)0x416f, (q15_t)0x416a, (q15_t)0x4164, (q15_t)0x415f, (q15_t)0x415a, (q15_t)0x4154, (q15_t)0x414f,
-  (q15_t)0x4149, (q15_t)0x4144, (q15_t)0x413f, (q15_t)0x4139, (q15_t)0x4134, (q15_t)0x412e, (q15_t)0x4129, (q15_t)0x4124,
-  (q15_t)0x411e, (q15_t)0x4119, (q15_t)0x4113, (q15_t)0x410e, (q15_t)0x4108, (q15_t)0x4103, (q15_t)0x40fe, (q15_t)0x40f8,
-  (q15_t)0x40f3, (q15_t)0x40ed, (q15_t)0x40e8, (q15_t)0x40e3, (q15_t)0x40dd, (q15_t)0x40d8, (q15_t)0x40d2, (q15_t)0x40cd,
-  (q15_t)0x40c8, (q15_t)0x40c2, (q15_t)0x40bd, (q15_t)0x40b7, (q15_t)0x40b2, (q15_t)0x40ac, (q15_t)0x40a7, (q15_t)0x40a2,
-  (q15_t)0x409c, (q15_t)0x4097, (q15_t)0x4091, (q15_t)0x408c, (q15_t)0x4086, (q15_t)0x4081, (q15_t)0x407c, (q15_t)0x4076,
-  (q15_t)0x4071, (q15_t)0x406b, (q15_t)0x4066, (q15_t)0x4060, (q15_t)0x405b, (q15_t)0x4056, (q15_t)0x4050, (q15_t)0x404b,
-  (q15_t)0x4045, (q15_t)0x4040, (q15_t)0x403a, (q15_t)0x4035, (q15_t)0x4030, (q15_t)0x402a, (q15_t)0x4025, (q15_t)0x401f,
-  (q15_t)0x401a, (q15_t)0x4014, (q15_t)0x400f, (q15_t)0x4009, (q15_t)0x4004, (q15_t)0x3fff, (q15_t)0x3ff9, (q15_t)0x3ff4,
-  (q15_t)0x3fee, (q15_t)0x3fe9, (q15_t)0x3fe3, (q15_t)0x3fde, (q15_t)0x3fd8, (q15_t)0x3fd3, (q15_t)0x3fce, (q15_t)0x3fc8,
-  (q15_t)0x3fc3, (q15_t)0x3fbd, (q15_t)0x3fb8, (q15_t)0x3fb2, (q15_t)0x3fad, (q15_t)0x3fa7, (q15_t)0x3fa2, (q15_t)0x3f9d,
-  (q15_t)0x3f97, (q15_t)0x3f92, (q15_t)0x3f8c, (q15_t)0x3f87, (q15_t)0x3f81, (q15_t)0x3f7c, (q15_t)0x3f76, (q15_t)0x3f71,
-  (q15_t)0x3f6b, (q15_t)0x3f66, (q15_t)0x3f61, (q15_t)0x3f5b, (q15_t)0x3f56, (q15_t)0x3f50, (q15_t)0x3f4b, (q15_t)0x3f45,
-  (q15_t)0x3f40, (q15_t)0x3f3a, (q15_t)0x3f35, (q15_t)0x3f2f, (q15_t)0x3f2a, (q15_t)0x3f24, (q15_t)0x3f1f, (q15_t)0x3f1a,
-  (q15_t)0x3f14, (q15_t)0x3f0f, (q15_t)0x3f09, (q15_t)0x3f04, (q15_t)0x3efe, (q15_t)0x3ef9, (q15_t)0x3ef3, (q15_t)0x3eee,
-  (q15_t)0x3ee8, (q15_t)0x3ee3, (q15_t)0x3edd, (q15_t)0x3ed8, (q15_t)0x3ed2, (q15_t)0x3ecd, (q15_t)0x3ec7, (q15_t)0x3ec2,
-  (q15_t)0x3ebd, (q15_t)0x3eb7, (q15_t)0x3eb2, (q15_t)0x3eac, (q15_t)0x3ea7, (q15_t)0x3ea1, (q15_t)0x3e9c, (q15_t)0x3e96,
-  (q15_t)0x3e91, (q15_t)0x3e8b, (q15_t)0x3e86, (q15_t)0x3e80, (q15_t)0x3e7b, (q15_t)0x3e75, (q15_t)0x3e70, (q15_t)0x3e6a,
-  (q15_t)0x3e65, (q15_t)0x3e5f, (q15_t)0x3e5a, (q15_t)0x3e54, (q15_t)0x3e4f, (q15_t)0x3e49, (q15_t)0x3e44, (q15_t)0x3e3e,
-  (q15_t)0x3e39, (q15_t)0x3e33, (q15_t)0x3e2e, (q15_t)0x3e28, (q15_t)0x3e23, (q15_t)0x3e1d, (q15_t)0x3e18, (q15_t)0x3e12,
-  (q15_t)0x3e0d, (q15_t)0x3e07, (q15_t)0x3e02, (q15_t)0x3dfc, (q15_t)0x3df7, (q15_t)0x3df1, (q15_t)0x3dec, (q15_t)0x3de6,
-  (q15_t)0x3de1, (q15_t)0x3ddb, (q15_t)0x3dd6, (q15_t)0x3dd0, (q15_t)0x3dcb, (q15_t)0x3dc5, (q15_t)0x3dc0, (q15_t)0x3dba,
-  (q15_t)0x3db5, (q15_t)0x3daf, (q15_t)0x3daa, (q15_t)0x3da4, (q15_t)0x3d9f, (q15_t)0x3d99, (q15_t)0x3d94, (q15_t)0x3d8e,
-  (q15_t)0x3d89, (q15_t)0x3d83, (q15_t)0x3d7e, (q15_t)0x3d78, (q15_t)0x3d73, (q15_t)0x3d6d, (q15_t)0x3d68, (q15_t)0x3d62,
-  (q15_t)0x3d5d, (q15_t)0x3d57, (q15_t)0x3d52, (q15_t)0x3d4c, (q15_t)0x3d47, (q15_t)0x3d41, (q15_t)0x3d3c, (q15_t)0x3d36,
-  (q15_t)0x3d31, (q15_t)0x3d2b, (q15_t)0x3d26, (q15_t)0x3d20, (q15_t)0x3d1b, (q15_t)0x3d15, (q15_t)0x3d10, (q15_t)0x3d0a,
-  (q15_t)0x3d04, (q15_t)0x3cff, (q15_t)0x3cf9, (q15_t)0x3cf4, (q15_t)0x3cee, (q15_t)0x3ce9, (q15_t)0x3ce3, (q15_t)0x3cde,
-  (q15_t)0x3cd8, (q15_t)0x3cd3, (q15_t)0x3ccd, (q15_t)0x3cc8, (q15_t)0x3cc2, (q15_t)0x3cbd, (q15_t)0x3cb7, (q15_t)0x3cb2,
-  (q15_t)0x3cac, (q15_t)0x3ca7, (q15_t)0x3ca1, (q15_t)0x3c9b, (q15_t)0x3c96, (q15_t)0x3c90, (q15_t)0x3c8b, (q15_t)0x3c85,
-  (q15_t)0x3c80, (q15_t)0x3c7a, (q15_t)0x3c75, (q15_t)0x3c6f, (q15_t)0x3c6a, (q15_t)0x3c64, (q15_t)0x3c5f, (q15_t)0x3c59,
-  (q15_t)0x3c53, (q15_t)0x3c4e, (q15_t)0x3c48, (q15_t)0x3c43, (q15_t)0x3c3d, (q15_t)0x3c38, (q15_t)0x3c32, (q15_t)0x3c2d,
-  (q15_t)0x3c27, (q15_t)0x3c22, (q15_t)0x3c1c, (q15_t)0x3c16, (q15_t)0x3c11, (q15_t)0x3c0b, (q15_t)0x3c06, (q15_t)0x3c00,
-  (q15_t)0x3bfb, (q15_t)0x3bf5, (q15_t)0x3bf0, (q15_t)0x3bea, (q15_t)0x3be5, (q15_t)0x3bdf, (q15_t)0x3bd9, (q15_t)0x3bd4,
-  (q15_t)0x3bce, (q15_t)0x3bc9, (q15_t)0x3bc3, (q15_t)0x3bbe, (q15_t)0x3bb8, (q15_t)0x3bb3, (q15_t)0x3bad, (q15_t)0x3ba7,
-  (q15_t)0x3ba2, (q15_t)0x3b9c, (q15_t)0x3b97, (q15_t)0x3b91, (q15_t)0x3b8c, (q15_t)0x3b86, (q15_t)0x3b80, (q15_t)0x3b7b,
-  (q15_t)0x3b75, (q15_t)0x3b70, (q15_t)0x3b6a, (q15_t)0x3b65, (q15_t)0x3b5f, (q15_t)0x3b5a, (q15_t)0x3b54, (q15_t)0x3b4e,
-  (q15_t)0x3b49, (q15_t)0x3b43, (q15_t)0x3b3e, (q15_t)0x3b38, (q15_t)0x3b33, (q15_t)0x3b2d, (q15_t)0x3b27, (q15_t)0x3b22,
-  (q15_t)0x3b1c, (q15_t)0x3b17, (q15_t)0x3b11, (q15_t)0x3b0c, (q15_t)0x3b06, (q15_t)0x3b00, (q15_t)0x3afb, (q15_t)0x3af5,
-  (q15_t)0x3af0, (q15_t)0x3aea, (q15_t)0x3ae4, (q15_t)0x3adf, (q15_t)0x3ad9, (q15_t)0x3ad4, (q15_t)0x3ace, (q15_t)0x3ac9,
-  (q15_t)0x3ac3, (q15_t)0x3abd, (q15_t)0x3ab8, (q15_t)0x3ab2, (q15_t)0x3aad, (q15_t)0x3aa7, (q15_t)0x3aa2, (q15_t)0x3a9c,
-  (q15_t)0x3a96, (q15_t)0x3a91, (q15_t)0x3a8b, (q15_t)0x3a86, (q15_t)0x3a80, (q15_t)0x3a7a, (q15_t)0x3a75, (q15_t)0x3a6f,
-  (q15_t)0x3a6a, (q15_t)0x3a64, (q15_t)0x3a5e, (q15_t)0x3a59, (q15_t)0x3a53, (q15_t)0x3a4e, (q15_t)0x3a48, (q15_t)0x3a42,
-  (q15_t)0x3a3d, (q15_t)0x3a37, (q15_t)0x3a32, (q15_t)0x3a2c, (q15_t)0x3a26, (q15_t)0x3a21, (q15_t)0x3a1b, (q15_t)0x3a16,
-  (q15_t)0x3a10, (q15_t)0x3a0b, (q15_t)0x3a05, (q15_t)0x39ff, (q15_t)0x39fa, (q15_t)0x39f4, (q15_t)0x39ee, (q15_t)0x39e9,
-  (q15_t)0x39e3, (q15_t)0x39de, (q15_t)0x39d8, (q15_t)0x39d2, (q15_t)0x39cd, (q15_t)0x39c7, (q15_t)0x39c2, (q15_t)0x39bc,
-  (q15_t)0x39b6, (q15_t)0x39b1, (q15_t)0x39ab, (q15_t)0x39a6, (q15_t)0x39a0, (q15_t)0x399a, (q15_t)0x3995, (q15_t)0x398f,
-  (q15_t)0x398a, (q15_t)0x3984, (q15_t)0x397e, (q15_t)0x3979, (q15_t)0x3973, (q15_t)0x396d, (q15_t)0x3968, (q15_t)0x3962,
-  (q15_t)0x395d, (q15_t)0x3957, (q15_t)0x3951, (q15_t)0x394c, (q15_t)0x3946, (q15_t)0x3941, (q15_t)0x393b, (q15_t)0x3935,
-  (q15_t)0x3930, (q15_t)0x392a, (q15_t)0x3924, (q15_t)0x391f, (q15_t)0x3919, (q15_t)0x3914, (q15_t)0x390e, (q15_t)0x3908,
-  (q15_t)0x3903, (q15_t)0x38fd, (q15_t)0x38f7, (q15_t)0x38f2, (q15_t)0x38ec, (q15_t)0x38e7, (q15_t)0x38e1, (q15_t)0x38db,
-  (q15_t)0x38d6, (q15_t)0x38d0, (q15_t)0x38ca, (q15_t)0x38c5, (q15_t)0x38bf, (q15_t)0x38ba, (q15_t)0x38b4, (q15_t)0x38ae,
-  (q15_t)0x38a9, (q15_t)0x38a3, (q15_t)0x389d, (q15_t)0x3898, (q15_t)0x3892, (q15_t)0x388c, (q15_t)0x3887, (q15_t)0x3881,
-  (q15_t)0x387c, (q15_t)0x3876, (q15_t)0x3870, (q15_t)0x386b, (q15_t)0x3865, (q15_t)0x385f, (q15_t)0x385a, (q15_t)0x3854,
-  (q15_t)0x384e, (q15_t)0x3849, (q15_t)0x3843, (q15_t)0x383d, (q15_t)0x3838, (q15_t)0x3832, (q15_t)0x382d, (q15_t)0x3827,
-  (q15_t)0x3821, (q15_t)0x381c, (q15_t)0x3816, (q15_t)0x3810, (q15_t)0x380b, (q15_t)0x3805, (q15_t)0x37ff, (q15_t)0x37fa,
-  (q15_t)0x37f4, (q15_t)0x37ee, (q15_t)0x37e9, (q15_t)0x37e3, (q15_t)0x37dd, (q15_t)0x37d8, (q15_t)0x37d2, (q15_t)0x37cc,
-  (q15_t)0x37c7, (q15_t)0x37c1, (q15_t)0x37bc, (q15_t)0x37b6, (q15_t)0x37b0, (q15_t)0x37ab, (q15_t)0x37a5, (q15_t)0x379f,
-  (q15_t)0x379a, (q15_t)0x3794, (q15_t)0x378e, (q15_t)0x3789, (q15_t)0x3783, (q15_t)0x377d, (q15_t)0x3778, (q15_t)0x3772,
-  (q15_t)0x376c, (q15_t)0x3767, (q15_t)0x3761, (q15_t)0x375b, (q15_t)0x3756, (q15_t)0x3750, (q15_t)0x374a, (q15_t)0x3745,
-  (q15_t)0x373f, (q15_t)0x3739, (q15_t)0x3734, (q15_t)0x372e, (q15_t)0x3728, (q15_t)0x3723, (q15_t)0x371d, (q15_t)0x3717,
-  (q15_t)0x3712, (q15_t)0x370c, (q15_t)0x3706, (q15_t)0x3701, (q15_t)0x36fb, (q15_t)0x36f5, (q15_t)0x36f0, (q15_t)0x36ea,
-  (q15_t)0x36e4, (q15_t)0x36df, (q15_t)0x36d9, (q15_t)0x36d3, (q15_t)0x36ce, (q15_t)0x36c8, (q15_t)0x36c2, (q15_t)0x36bc,
-  (q15_t)0x36b7, (q15_t)0x36b1, (q15_t)0x36ab, (q15_t)0x36a6, (q15_t)0x36a0, (q15_t)0x369a, (q15_t)0x3695, (q15_t)0x368f,
-  (q15_t)0x3689, (q15_t)0x3684, (q15_t)0x367e, (q15_t)0x3678, (q15_t)0x3673, (q15_t)0x366d, (q15_t)0x3667, (q15_t)0x3662,
-  (q15_t)0x365c, (q15_t)0x3656, (q15_t)0x3650, (q15_t)0x364b, (q15_t)0x3645, (q15_t)0x363f, (q15_t)0x363a, (q15_t)0x3634,
-  (q15_t)0x362e, (q15_t)0x3629, (q15_t)0x3623, (q15_t)0x361d, (q15_t)0x3618, (q15_t)0x3612, (q15_t)0x360c, (q15_t)0x3606,
-  (q15_t)0x3601, (q15_t)0x35fb, (q15_t)0x35f5, (q15_t)0x35f0, (q15_t)0x35ea, (q15_t)0x35e4, (q15_t)0x35df, (q15_t)0x35d9,
-  (q15_t)0x35d3, (q15_t)0x35cd, (q15_t)0x35c8, (q15_t)0x35c2, (q15_t)0x35bc, (q15_t)0x35b7, (q15_t)0x35b1, (q15_t)0x35ab,
-  (q15_t)0x35a6, (q15_t)0x35a0, (q15_t)0x359a, (q15_t)0x3594, (q15_t)0x358f, (q15_t)0x3589, (q15_t)0x3583, (q15_t)0x357e,
-  (q15_t)0x3578, (q15_t)0x3572, (q15_t)0x356c, (q15_t)0x3567, (q15_t)0x3561, (q15_t)0x355b, (q15_t)0x3556, (q15_t)0x3550,
-  (q15_t)0x354a, (q15_t)0x3544, (q15_t)0x353f, (q15_t)0x3539, (q15_t)0x3533, (q15_t)0x352e, (q15_t)0x3528, (q15_t)0x3522,
-  (q15_t)0x351c, (q15_t)0x3517, (q15_t)0x3511, (q15_t)0x350b, (q15_t)0x3506, (q15_t)0x3500, (q15_t)0x34fa, (q15_t)0x34f4,
-  (q15_t)0x34ef, (q15_t)0x34e9, (q15_t)0x34e3, (q15_t)0x34de, (q15_t)0x34d8, (q15_t)0x34d2, (q15_t)0x34cc, (q15_t)0x34c7,
-  (q15_t)0x34c1, (q15_t)0x34bb, (q15_t)0x34b6, (q15_t)0x34b0, (q15_t)0x34aa, (q15_t)0x34a4, (q15_t)0x349f, (q15_t)0x3499,
-  (q15_t)0x3493, (q15_t)0x348d, (q15_t)0x3488, (q15_t)0x3482, (q15_t)0x347c, (q15_t)0x3476, (q15_t)0x3471, (q15_t)0x346b,
-  (q15_t)0x3465, (q15_t)0x3460, (q15_t)0x345a, (q15_t)0x3454, (q15_t)0x344e, (q15_t)0x3449, (q15_t)0x3443, (q15_t)0x343d,
-  (q15_t)0x3437, (q15_t)0x3432, (q15_t)0x342c, (q15_t)0x3426, (q15_t)0x3420, (q15_t)0x341b, (q15_t)0x3415, (q15_t)0x340f,
-  (q15_t)0x340a, (q15_t)0x3404, (q15_t)0x33fe, (q15_t)0x33f8, (q15_t)0x33f3, (q15_t)0x33ed, (q15_t)0x33e7, (q15_t)0x33e1,
-  (q15_t)0x33dc, (q15_t)0x33d6, (q15_t)0x33d0, (q15_t)0x33ca, (q15_t)0x33c5, (q15_t)0x33bf, (q15_t)0x33b9, (q15_t)0x33b3,
-  (q15_t)0x33ae, (q15_t)0x33a8, (q15_t)0x33a2, (q15_t)0x339c, (q15_t)0x3397, (q15_t)0x3391, (q15_t)0x338b, (q15_t)0x3385,
-  (q15_t)0x3380, (q15_t)0x337a, (q15_t)0x3374, (q15_t)0x336e, (q15_t)0x3369, (q15_t)0x3363, (q15_t)0x335d, (q15_t)0x3357,
-  (q15_t)0x3352, (q15_t)0x334c, (q15_t)0x3346, (q15_t)0x3340, (q15_t)0x333b, (q15_t)0x3335, (q15_t)0x332f, (q15_t)0x3329,
-  (q15_t)0x3324, (q15_t)0x331e, (q15_t)0x3318, (q15_t)0x3312, (q15_t)0x330c, (q15_t)0x3307, (q15_t)0x3301, (q15_t)0x32fb,
-  (q15_t)0x32f5, (q15_t)0x32f0, (q15_t)0x32ea, (q15_t)0x32e4, (q15_t)0x32de, (q15_t)0x32d9, (q15_t)0x32d3, (q15_t)0x32cd,
-  (q15_t)0x32c7, (q15_t)0x32c2, (q15_t)0x32bc, (q15_t)0x32b6, (q15_t)0x32b0, (q15_t)0x32aa, (q15_t)0x32a5, (q15_t)0x329f,
-  (q15_t)0x3299, (q15_t)0x3293, (q15_t)0x328e, (q15_t)0x3288, (q15_t)0x3282, (q15_t)0x327c, (q15_t)0x3276, (q15_t)0x3271,
-  (q15_t)0x326b, (q15_t)0x3265, (q15_t)0x325f, (q15_t)0x325a, (q15_t)0x3254, (q15_t)0x324e, (q15_t)0x3248, (q15_t)0x3243,
-  (q15_t)0x323d, (q15_t)0x3237, (q15_t)0x3231, (q15_t)0x322b, (q15_t)0x3226, (q15_t)0x3220, (q15_t)0x321a, (q15_t)0x3214,
-  (q15_t)0x320e, (q15_t)0x3209, (q15_t)0x3203, (q15_t)0x31fd, (q15_t)0x31f7, (q15_t)0x31f2, (q15_t)0x31ec, (q15_t)0x31e6,
-  (q15_t)0x31e0, (q15_t)0x31da, (q15_t)0x31d5, (q15_t)0x31cf, (q15_t)0x31c9, (q15_t)0x31c3, (q15_t)0x31bd, (q15_t)0x31b8,
-  (q15_t)0x31b2, (q15_t)0x31ac, (q15_t)0x31a6, (q15_t)0x31a1, (q15_t)0x319b, (q15_t)0x3195, (q15_t)0x318f, (q15_t)0x3189,
-  (q15_t)0x3184, (q15_t)0x317e, (q15_t)0x3178, (q15_t)0x3172, (q15_t)0x316c, (q15_t)0x3167, (q15_t)0x3161, (q15_t)0x315b,
-  (q15_t)0x3155, (q15_t)0x314f, (q15_t)0x314a, (q15_t)0x3144, (q15_t)0x313e, (q15_t)0x3138, (q15_t)0x3132, (q15_t)0x312d,
-  (q15_t)0x3127, (q15_t)0x3121, (q15_t)0x311b, (q15_t)0x3115, (q15_t)0x3110, (q15_t)0x310a, (q15_t)0x3104, (q15_t)0x30fe,
-  (q15_t)0x30f8, (q15_t)0x30f3, (q15_t)0x30ed, (q15_t)0x30e7, (q15_t)0x30e1, (q15_t)0x30db, (q15_t)0x30d6, (q15_t)0x30d0,
-  (q15_t)0x30ca, (q15_t)0x30c4, (q15_t)0x30be, (q15_t)0x30b8, (q15_t)0x30b3, (q15_t)0x30ad, (q15_t)0x30a7, (q15_t)0x30a1,
-  (q15_t)0x309b, (q15_t)0x3096, (q15_t)0x3090, (q15_t)0x308a, (q15_t)0x3084, (q15_t)0x307e, (q15_t)0x3079, (q15_t)0x3073,
-  (q15_t)0x306d, (q15_t)0x3067, (q15_t)0x3061, (q15_t)0x305b, (q15_t)0x3056, (q15_t)0x3050, (q15_t)0x304a, (q15_t)0x3044,
-  (q15_t)0x303e, (q15_t)0x3039, (q15_t)0x3033, (q15_t)0x302d, (q15_t)0x3027, (q15_t)0x3021, (q15_t)0x301b, (q15_t)0x3016,
-  (q15_t)0x3010, (q15_t)0x300a, (q15_t)0x3004, (q15_t)0x2ffe, (q15_t)0x2ff8, (q15_t)0x2ff3, (q15_t)0x2fed, (q15_t)0x2fe7,
-  (q15_t)0x2fe1, (q15_t)0x2fdb, (q15_t)0x2fd6, (q15_t)0x2fd0, (q15_t)0x2fca, (q15_t)0x2fc4, (q15_t)0x2fbe, (q15_t)0x2fb8,
-  (q15_t)0x2fb3, (q15_t)0x2fad, (q15_t)0x2fa7, (q15_t)0x2fa1, (q15_t)0x2f9b, (q15_t)0x2f95, (q15_t)0x2f90, (q15_t)0x2f8a,
-  (q15_t)0x2f84, (q15_t)0x2f7e, (q15_t)0x2f78, (q15_t)0x2f72, (q15_t)0x2f6d, (q15_t)0x2f67, (q15_t)0x2f61, (q15_t)0x2f5b,
-  (q15_t)0x2f55, (q15_t)0x2f4f, (q15_t)0x2f4a, (q15_t)0x2f44, (q15_t)0x2f3e, (q15_t)0x2f38, (q15_t)0x2f32, (q15_t)0x2f2c,
-  (q15_t)0x2f27, (q15_t)0x2f21, (q15_t)0x2f1b, (q15_t)0x2f15, (q15_t)0x2f0f, (q15_t)0x2f09, (q15_t)0x2f03, (q15_t)0x2efe,
-  (q15_t)0x2ef8, (q15_t)0x2ef2, (q15_t)0x2eec, (q15_t)0x2ee6, (q15_t)0x2ee0, (q15_t)0x2edb, (q15_t)0x2ed5, (q15_t)0x2ecf,
-  (q15_t)0x2ec9, (q15_t)0x2ec3, (q15_t)0x2ebd, (q15_t)0x2eb7, (q15_t)0x2eb2, (q15_t)0x2eac, (q15_t)0x2ea6, (q15_t)0x2ea0,
-  (q15_t)0x2e9a, (q15_t)0x2e94, (q15_t)0x2e8e, (q15_t)0x2e89, (q15_t)0x2e83, (q15_t)0x2e7d, (q15_t)0x2e77, (q15_t)0x2e71,
-  (q15_t)0x2e6b, (q15_t)0x2e65, (q15_t)0x2e60, (q15_t)0x2e5a, (q15_t)0x2e54, (q15_t)0x2e4e, (q15_t)0x2e48, (q15_t)0x2e42,
-  (q15_t)0x2e3c, (q15_t)0x2e37, (q15_t)0x2e31, (q15_t)0x2e2b, (q15_t)0x2e25, (q15_t)0x2e1f, (q15_t)0x2e19, (q15_t)0x2e13,
-  (q15_t)0x2e0e, (q15_t)0x2e08, (q15_t)0x2e02, (q15_t)0x2dfc, (q15_t)0x2df6, (q15_t)0x2df0, (q15_t)0x2dea, (q15_t)0x2de5,
-  (q15_t)0x2ddf, (q15_t)0x2dd9, (q15_t)0x2dd3, (q15_t)0x2dcd, (q15_t)0x2dc7, (q15_t)0x2dc1, (q15_t)0x2dbb, (q15_t)0x2db6,
-  (q15_t)0x2db0, (q15_t)0x2daa, (q15_t)0x2da4, (q15_t)0x2d9e, (q15_t)0x2d98, (q15_t)0x2d92, (q15_t)0x2d8d, (q15_t)0x2d87,
-  (q15_t)0x2d81, (q15_t)0x2d7b, (q15_t)0x2d75, (q15_t)0x2d6f, (q15_t)0x2d69, (q15_t)0x2d63, (q15_t)0x2d5e, (q15_t)0x2d58,
-  (q15_t)0x2d52, (q15_t)0x2d4c, (q15_t)0x2d46, (q15_t)0x2d40, (q15_t)0x2d3a, (q15_t)0x2d34, (q15_t)0x2d2f, (q15_t)0x2d29,
-  (q15_t)0x2d23, (q15_t)0x2d1d, (q15_t)0x2d17, (q15_t)0x2d11, (q15_t)0x2d0b, (q15_t)0x2d05, (q15_t)0x2cff, (q15_t)0x2cfa,
-  (q15_t)0x2cf4, (q15_t)0x2cee, (q15_t)0x2ce8, (q15_t)0x2ce2, (q15_t)0x2cdc, (q15_t)0x2cd6, (q15_t)0x2cd0, (q15_t)0x2ccb,
-  (q15_t)0x2cc5, (q15_t)0x2cbf, (q15_t)0x2cb9, (q15_t)0x2cb3, (q15_t)0x2cad, (q15_t)0x2ca7, (q15_t)0x2ca1, (q15_t)0x2c9b,
-  (q15_t)0x2c96, (q15_t)0x2c90, (q15_t)0x2c8a, (q15_t)0x2c84, (q15_t)0x2c7e, (q15_t)0x2c78, (q15_t)0x2c72, (q15_t)0x2c6c,
-  (q15_t)0x2c66, (q15_t)0x2c61, (q15_t)0x2c5b, (q15_t)0x2c55, (q15_t)0x2c4f, (q15_t)0x2c49, (q15_t)0x2c43, (q15_t)0x2c3d,
-  (q15_t)0x2c37, (q15_t)0x2c31, (q15_t)0x2c2b, (q15_t)0x2c26, (q15_t)0x2c20, (q15_t)0x2c1a, (q15_t)0x2c14, (q15_t)0x2c0e,
-  (q15_t)0x2c08, (q15_t)0x2c02, (q15_t)0x2bfc, (q15_t)0x2bf6, (q15_t)0x2bf0, (q15_t)0x2beb, (q15_t)0x2be5, (q15_t)0x2bdf,
-  (q15_t)0x2bd9, (q15_t)0x2bd3, (q15_t)0x2bcd, (q15_t)0x2bc7, (q15_t)0x2bc1, (q15_t)0x2bbb, (q15_t)0x2bb5, (q15_t)0x2bb0,
-  (q15_t)0x2baa, (q15_t)0x2ba4, (q15_t)0x2b9e, (q15_t)0x2b98, (q15_t)0x2b92, (q15_t)0x2b8c, (q15_t)0x2b86, (q15_t)0x2b80,
-  (q15_t)0x2b7a, (q15_t)0x2b74, (q15_t)0x2b6f, (q15_t)0x2b69, (q15_t)0x2b63, (q15_t)0x2b5d, (q15_t)0x2b57, (q15_t)0x2b51,
-  (q15_t)0x2b4b, (q15_t)0x2b45, (q15_t)0x2b3f, (q15_t)0x2b39, (q15_t)0x2b33, (q15_t)0x2b2d, (q15_t)0x2b28, (q15_t)0x2b22,
-  (q15_t)0x2b1c, (q15_t)0x2b16, (q15_t)0x2b10, (q15_t)0x2b0a, (q15_t)0x2b04, (q15_t)0x2afe, (q15_t)0x2af8, (q15_t)0x2af2,
-  (q15_t)0x2aec, (q15_t)0x2ae6, (q15_t)0x2ae1, (q15_t)0x2adb, (q15_t)0x2ad5, (q15_t)0x2acf, (q15_t)0x2ac9, (q15_t)0x2ac3,
-  (q15_t)0x2abd, (q15_t)0x2ab7, (q15_t)0x2ab1, (q15_t)0x2aab, (q15_t)0x2aa5, (q15_t)0x2a9f, (q15_t)0x2a99, (q15_t)0x2a94,
-  (q15_t)0x2a8e, (q15_t)0x2a88, (q15_t)0x2a82, (q15_t)0x2a7c, (q15_t)0x2a76, (q15_t)0x2a70, (q15_t)0x2a6a, (q15_t)0x2a64,
-  (q15_t)0x2a5e, (q15_t)0x2a58, (q15_t)0x2a52, (q15_t)0x2a4c, (q15_t)0x2a47, (q15_t)0x2a41, (q15_t)0x2a3b, (q15_t)0x2a35,
-  (q15_t)0x2a2f, (q15_t)0x2a29, (q15_t)0x2a23, (q15_t)0x2a1d, (q15_t)0x2a17, (q15_t)0x2a11, (q15_t)0x2a0b, (q15_t)0x2a05,
-  (q15_t)0x29ff, (q15_t)0x29f9, (q15_t)0x29f3, (q15_t)0x29ee, (q15_t)0x29e8, (q15_t)0x29e2, (q15_t)0x29dc, (q15_t)0x29d6,
-  (q15_t)0x29d0, (q15_t)0x29ca, (q15_t)0x29c4, (q15_t)0x29be, (q15_t)0x29b8, (q15_t)0x29b2, (q15_t)0x29ac, (q15_t)0x29a6,
-  (q15_t)0x29a0, (q15_t)0x299a, (q15_t)0x2994, (q15_t)0x298e, (q15_t)0x2989, (q15_t)0x2983, (q15_t)0x297d, (q15_t)0x2977,
-  (q15_t)0x2971, (q15_t)0x296b, (q15_t)0x2965, (q15_t)0x295f, (q15_t)0x2959, (q15_t)0x2953, (q15_t)0x294d, (q15_t)0x2947,
-  (q15_t)0x2941, (q15_t)0x293b, (q15_t)0x2935, (q15_t)0x292f, (q15_t)0x2929, (q15_t)0x2923, (q15_t)0x291d, (q15_t)0x2918,
-  (q15_t)0x2912, (q15_t)0x290c, (q15_t)0x2906, (q15_t)0x2900, (q15_t)0x28fa, (q15_t)0x28f4, (q15_t)0x28ee, (q15_t)0x28e8,
-  (q15_t)0x28e2, (q15_t)0x28dc, (q15_t)0x28d6, (q15_t)0x28d0, (q15_t)0x28ca, (q15_t)0x28c4, (q15_t)0x28be, (q15_t)0x28b8,
-  (q15_t)0x28b2, (q15_t)0x28ac, (q15_t)0x28a6, (q15_t)0x28a0, (q15_t)0x289a, (q15_t)0x2895, (q15_t)0x288f, (q15_t)0x2889,
-  (q15_t)0x2883, (q15_t)0x287d, (q15_t)0x2877, (q15_t)0x2871, (q15_t)0x286b, (q15_t)0x2865, (q15_t)0x285f, (q15_t)0x2859,
-  (q15_t)0x2853, (q15_t)0x284d, (q15_t)0x2847, (q15_t)0x2841, (q15_t)0x283b, (q15_t)0x2835, (q15_t)0x282f, (q15_t)0x2829,
-  (q15_t)0x2823, (q15_t)0x281d, (q15_t)0x2817, (q15_t)0x2811, (q15_t)0x280b, (q15_t)0x2805, (q15_t)0x27ff, (q15_t)0x27f9,
-  (q15_t)0x27f3, (q15_t)0x27ee, (q15_t)0x27e8, (q15_t)0x27e2, (q15_t)0x27dc, (q15_t)0x27d6, (q15_t)0x27d0, (q15_t)0x27ca,
-  (q15_t)0x27c4, (q15_t)0x27be, (q15_t)0x27b8, (q15_t)0x27b2, (q15_t)0x27ac, (q15_t)0x27a6, (q15_t)0x27a0, (q15_t)0x279a,
-  (q15_t)0x2794, (q15_t)0x278e, (q15_t)0x2788, (q15_t)0x2782, (q15_t)0x277c, (q15_t)0x2776, (q15_t)0x2770, (q15_t)0x276a,
-  (q15_t)0x2764, (q15_t)0x275e, (q15_t)0x2758, (q15_t)0x2752, (q15_t)0x274c, (q15_t)0x2746, (q15_t)0x2740, (q15_t)0x273a,
-  (q15_t)0x2734, (q15_t)0x272e, (q15_t)0x2728, (q15_t)0x2722, (q15_t)0x271c, (q15_t)0x2716, (q15_t)0x2710, (q15_t)0x270a,
-  (q15_t)0x2704, (q15_t)0x26fe, (q15_t)0x26f8, (q15_t)0x26f2, (q15_t)0x26ec, (q15_t)0x26e7, (q15_t)0x26e1, (q15_t)0x26db,
-  (q15_t)0x26d5, (q15_t)0x26cf, (q15_t)0x26c9, (q15_t)0x26c3, (q15_t)0x26bd, (q15_t)0x26b7, (q15_t)0x26b1, (q15_t)0x26ab,
-  (q15_t)0x26a5, (q15_t)0x269f, (q15_t)0x2699, (q15_t)0x2693, (q15_t)0x268d, (q15_t)0x2687, (q15_t)0x2681, (q15_t)0x267b,
-  (q15_t)0x2675, (q15_t)0x266f, (q15_t)0x2669, (q15_t)0x2663, (q15_t)0x265d, (q15_t)0x2657, (q15_t)0x2651, (q15_t)0x264b,
-  (q15_t)0x2645, (q15_t)0x263f, (q15_t)0x2639, (q15_t)0x2633, (q15_t)0x262d, (q15_t)0x2627, (q15_t)0x2621, (q15_t)0x261b,
-  (q15_t)0x2615, (q15_t)0x260f, (q15_t)0x2609, (q15_t)0x2603, (q15_t)0x25fd, (q15_t)0x25f7, (q15_t)0x25f1, (q15_t)0x25eb,
-  (q15_t)0x25e5, (q15_t)0x25df, (q15_t)0x25d9, (q15_t)0x25d3, (q15_t)0x25cd, (q15_t)0x25c7, (q15_t)0x25c1, (q15_t)0x25bb,
-  (q15_t)0x25b5, (q15_t)0x25af, (q15_t)0x25a9, (q15_t)0x25a3, (q15_t)0x259d, (q15_t)0x2597, (q15_t)0x2591, (q15_t)0x258b,
-  (q15_t)0x2585, (q15_t)0x257f, (q15_t)0x2579, (q15_t)0x2573, (q15_t)0x256d, (q15_t)0x2567, (q15_t)0x2561, (q15_t)0x255b,
-  (q15_t)0x2555, (q15_t)0x254f, (q15_t)0x2549, (q15_t)0x2543, (q15_t)0x253d, (q15_t)0x2537, (q15_t)0x2531, (q15_t)0x252b,
-  (q15_t)0x2525, (q15_t)0x251f, (q15_t)0x2519, (q15_t)0x2513, (q15_t)0x250c, (q15_t)0x2506, (q15_t)0x2500, (q15_t)0x24fa,
-  (q15_t)0x24f4, (q15_t)0x24ee, (q15_t)0x24e8, (q15_t)0x24e2, (q15_t)0x24dc, (q15_t)0x24d6, (q15_t)0x24d0, (q15_t)0x24ca,
-  (q15_t)0x24c4, (q15_t)0x24be, (q15_t)0x24b8, (q15_t)0x24b2, (q15_t)0x24ac, (q15_t)0x24a6, (q15_t)0x24a0, (q15_t)0x249a,
-  (q15_t)0x2494, (q15_t)0x248e, (q15_t)0x2488, (q15_t)0x2482, (q15_t)0x247c, (q15_t)0x2476, (q15_t)0x2470, (q15_t)0x246a,
-  (q15_t)0x2464, (q15_t)0x245e, (q15_t)0x2458, (q15_t)0x2452, (q15_t)0x244c, (q15_t)0x2446, (q15_t)0x2440, (q15_t)0x243a,
-  (q15_t)0x2434, (q15_t)0x242e, (q15_t)0x2428, (q15_t)0x2422, (q15_t)0x241c, (q15_t)0x2416, (q15_t)0x2410, (q15_t)0x240a,
-  (q15_t)0x2404, (q15_t)0x23fd, (q15_t)0x23f7, (q15_t)0x23f1, (q15_t)0x23eb, (q15_t)0x23e5, (q15_t)0x23df, (q15_t)0x23d9,
-  (q15_t)0x23d3, (q15_t)0x23cd, (q15_t)0x23c7, (q15_t)0x23c1, (q15_t)0x23bb, (q15_t)0x23b5, (q15_t)0x23af, (q15_t)0x23a9,
-  (q15_t)0x23a3, (q15_t)0x239d, (q15_t)0x2397, (q15_t)0x2391, (q15_t)0x238b, (q15_t)0x2385, (q15_t)0x237f, (q15_t)0x2379,
-  (q15_t)0x2373, (q15_t)0x236d, (q15_t)0x2367, (q15_t)0x2361, (q15_t)0x235b, (q15_t)0x2355, (q15_t)0x234e, (q15_t)0x2348,
-  (q15_t)0x2342, (q15_t)0x233c, (q15_t)0x2336, (q15_t)0x2330, (q15_t)0x232a, (q15_t)0x2324, (q15_t)0x231e, (q15_t)0x2318,
-  (q15_t)0x2312, (q15_t)0x230c, (q15_t)0x2306, (q15_t)0x2300, (q15_t)0x22fa, (q15_t)0x22f4, (q15_t)0x22ee, (q15_t)0x22e8,
-  (q15_t)0x22e2, (q15_t)0x22dc, (q15_t)0x22d6, (q15_t)0x22d0, (q15_t)0x22ca, (q15_t)0x22c4, (q15_t)0x22bd, (q15_t)0x22b7,
-  (q15_t)0x22b1, (q15_t)0x22ab, (q15_t)0x22a5, (q15_t)0x229f, (q15_t)0x2299, (q15_t)0x2293, (q15_t)0x228d, (q15_t)0x2287,
-  (q15_t)0x2281, (q15_t)0x227b, (q15_t)0x2275, (q15_t)0x226f, (q15_t)0x2269, (q15_t)0x2263, (q15_t)0x225d, (q15_t)0x2257,
-  (q15_t)0x2251, (q15_t)0x224a, (q15_t)0x2244, (q15_t)0x223e, (q15_t)0x2238, (q15_t)0x2232, (q15_t)0x222c, (q15_t)0x2226,
-  (q15_t)0x2220, (q15_t)0x221a, (q15_t)0x2214, (q15_t)0x220e, (q15_t)0x2208, (q15_t)0x2202, (q15_t)0x21fc, (q15_t)0x21f6,
-  (q15_t)0x21f0, (q15_t)0x21ea, (q15_t)0x21e4, (q15_t)0x21dd, (q15_t)0x21d7, (q15_t)0x21d1, (q15_t)0x21cb, (q15_t)0x21c5,
-  (q15_t)0x21bf, (q15_t)0x21b9, (q15_t)0x21b3, (q15_t)0x21ad, (q15_t)0x21a7, (q15_t)0x21a1, (q15_t)0x219b, (q15_t)0x2195,
-  (q15_t)0x218f, (q15_t)0x2189, (q15_t)0x2183, (q15_t)0x217c, (q15_t)0x2176, (q15_t)0x2170, (q15_t)0x216a, (q15_t)0x2164,
-  (q15_t)0x215e, (q15_t)0x2158, (q15_t)0x2152, (q15_t)0x214c, (q15_t)0x2146, (q15_t)0x2140, (q15_t)0x213a, (q15_t)0x2134,
-  (q15_t)0x212e, (q15_t)0x2128, (q15_t)0x2121, (q15_t)0x211b, (q15_t)0x2115, (q15_t)0x210f, (q15_t)0x2109, (q15_t)0x2103,
-  (q15_t)0x20fd, (q15_t)0x20f7, (q15_t)0x20f1, (q15_t)0x20eb, (q15_t)0x20e5, (q15_t)0x20df, (q15_t)0x20d9, (q15_t)0x20d3,
-  (q15_t)0x20cc, (q15_t)0x20c6, (q15_t)0x20c0, (q15_t)0x20ba, (q15_t)0x20b4, (q15_t)0x20ae, (q15_t)0x20a8, (q15_t)0x20a2,
-  (q15_t)0x209c, (q15_t)0x2096, (q15_t)0x2090, (q15_t)0x208a, (q15_t)0x2084, (q15_t)0x207e, (q15_t)0x2077, (q15_t)0x2071,
-  (q15_t)0x206b, (q15_t)0x2065, (q15_t)0x205f, (q15_t)0x2059, (q15_t)0x2053, (q15_t)0x204d, (q15_t)0x2047, (q15_t)0x2041,
-  (q15_t)0x203b, (q15_t)0x2035, (q15_t)0x202e, (q15_t)0x2028, (q15_t)0x2022, (q15_t)0x201c, (q15_t)0x2016, (q15_t)0x2010,
-  (q15_t)0x200a, (q15_t)0x2004, (q15_t)0x1ffe, (q15_t)0x1ff8, (q15_t)0x1ff2, (q15_t)0x1fec, (q15_t)0x1fe5, (q15_t)0x1fdf,
-  (q15_t)0x1fd9, (q15_t)0x1fd3, (q15_t)0x1fcd, (q15_t)0x1fc7, (q15_t)0x1fc1, (q15_t)0x1fbb, (q15_t)0x1fb5, (q15_t)0x1faf,
-  (q15_t)0x1fa9, (q15_t)0x1fa3, (q15_t)0x1f9c, (q15_t)0x1f96, (q15_t)0x1f90, (q15_t)0x1f8a, (q15_t)0x1f84, (q15_t)0x1f7e,
-  (q15_t)0x1f78, (q15_t)0x1f72, (q15_t)0x1f6c, (q15_t)0x1f66, (q15_t)0x1f60, (q15_t)0x1f59, (q15_t)0x1f53, (q15_t)0x1f4d,
-  (q15_t)0x1f47, (q15_t)0x1f41, (q15_t)0x1f3b, (q15_t)0x1f35, (q15_t)0x1f2f, (q15_t)0x1f29, (q15_t)0x1f23, (q15_t)0x1f1d,
-  (q15_t)0x1f16, (q15_t)0x1f10, (q15_t)0x1f0a, (q15_t)0x1f04, (q15_t)0x1efe, (q15_t)0x1ef8, (q15_t)0x1ef2, (q15_t)0x1eec,
-  (q15_t)0x1ee6, (q15_t)0x1ee0, (q15_t)0x1ed9, (q15_t)0x1ed3, (q15_t)0x1ecd, (q15_t)0x1ec7, (q15_t)0x1ec1, (q15_t)0x1ebb,
-  (q15_t)0x1eb5, (q15_t)0x1eaf, (q15_t)0x1ea9, (q15_t)0x1ea3, (q15_t)0x1e9c, (q15_t)0x1e96, (q15_t)0x1e90, (q15_t)0x1e8a,
-  (q15_t)0x1e84, (q15_t)0x1e7e, (q15_t)0x1e78, (q15_t)0x1e72, (q15_t)0x1e6c, (q15_t)0x1e66, (q15_t)0x1e5f, (q15_t)0x1e59,
-  (q15_t)0x1e53, (q15_t)0x1e4d, (q15_t)0x1e47, (q15_t)0x1e41, (q15_t)0x1e3b, (q15_t)0x1e35, (q15_t)0x1e2f, (q15_t)0x1e29,
-  (q15_t)0x1e22, (q15_t)0x1e1c, (q15_t)0x1e16, (q15_t)0x1e10, (q15_t)0x1e0a, (q15_t)0x1e04, (q15_t)0x1dfe, (q15_t)0x1df8,
-  (q15_t)0x1df2, (q15_t)0x1deb, (q15_t)0x1de5, (q15_t)0x1ddf, (q15_t)0x1dd9, (q15_t)0x1dd3, (q15_t)0x1dcd, (q15_t)0x1dc7,
-  (q15_t)0x1dc1, (q15_t)0x1dbb, (q15_t)0x1db4, (q15_t)0x1dae, (q15_t)0x1da8, (q15_t)0x1da2, (q15_t)0x1d9c, (q15_t)0x1d96,
-  (q15_t)0x1d90, (q15_t)0x1d8a, (q15_t)0x1d84, (q15_t)0x1d7d, (q15_t)0x1d77, (q15_t)0x1d71, (q15_t)0x1d6b, (q15_t)0x1d65,
-  (q15_t)0x1d5f, (q15_t)0x1d59, (q15_t)0x1d53, (q15_t)0x1d4c, (q15_t)0x1d46, (q15_t)0x1d40, (q15_t)0x1d3a, (q15_t)0x1d34,
-  (q15_t)0x1d2e, (q15_t)0x1d28, (q15_t)0x1d22, (q15_t)0x1d1c, (q15_t)0x1d15, (q15_t)0x1d0f, (q15_t)0x1d09, (q15_t)0x1d03,
-  (q15_t)0x1cfd, (q15_t)0x1cf7, (q15_t)0x1cf1, (q15_t)0x1ceb, (q15_t)0x1ce4, (q15_t)0x1cde, (q15_t)0x1cd8, (q15_t)0x1cd2,
-  (q15_t)0x1ccc, (q15_t)0x1cc6, (q15_t)0x1cc0, (q15_t)0x1cba, (q15_t)0x1cb3, (q15_t)0x1cad, (q15_t)0x1ca7, (q15_t)0x1ca1,
-  (q15_t)0x1c9b, (q15_t)0x1c95, (q15_t)0x1c8f, (q15_t)0x1c89, (q15_t)0x1c83, (q15_t)0x1c7c, (q15_t)0x1c76, (q15_t)0x1c70,
-  (q15_t)0x1c6a, (q15_t)0x1c64, (q15_t)0x1c5e, (q15_t)0x1c58, (q15_t)0x1c51, (q15_t)0x1c4b, (q15_t)0x1c45, (q15_t)0x1c3f,
-  (q15_t)0x1c39, (q15_t)0x1c33, (q15_t)0x1c2d, (q15_t)0x1c27, (q15_t)0x1c20, (q15_t)0x1c1a, (q15_t)0x1c14, (q15_t)0x1c0e,
-  (q15_t)0x1c08, (q15_t)0x1c02, (q15_t)0x1bfc, (q15_t)0x1bf6, (q15_t)0x1bef, (q15_t)0x1be9, (q15_t)0x1be3, (q15_t)0x1bdd,
-  (q15_t)0x1bd7, (q15_t)0x1bd1, (q15_t)0x1bcb, (q15_t)0x1bc4, (q15_t)0x1bbe, (q15_t)0x1bb8, (q15_t)0x1bb2, (q15_t)0x1bac,
-  (q15_t)0x1ba6, (q15_t)0x1ba0, (q15_t)0x1b9a, (q15_t)0x1b93, (q15_t)0x1b8d, (q15_t)0x1b87, (q15_t)0x1b81, (q15_t)0x1b7b,
-  (q15_t)0x1b75, (q15_t)0x1b6f, (q15_t)0x1b68, (q15_t)0x1b62, (q15_t)0x1b5c, (q15_t)0x1b56, (q15_t)0x1b50, (q15_t)0x1b4a,
-  (q15_t)0x1b44, (q15_t)0x1b3d, (q15_t)0x1b37, (q15_t)0x1b31, (q15_t)0x1b2b, (q15_t)0x1b25, (q15_t)0x1b1f, (q15_t)0x1b19,
-  (q15_t)0x1b13, (q15_t)0x1b0c, (q15_t)0x1b06, (q15_t)0x1b00, (q15_t)0x1afa, (q15_t)0x1af4, (q15_t)0x1aee, (q15_t)0x1ae8,
-  (q15_t)0x1ae1, (q15_t)0x1adb, (q15_t)0x1ad5, (q15_t)0x1acf, (q15_t)0x1ac9, (q15_t)0x1ac3, (q15_t)0x1abd, (q15_t)0x1ab6,
-  (q15_t)0x1ab0, (q15_t)0x1aaa, (q15_t)0x1aa4, (q15_t)0x1a9e, (q15_t)0x1a98, (q15_t)0x1a91, (q15_t)0x1a8b, (q15_t)0x1a85,
-  (q15_t)0x1a7f, (q15_t)0x1a79, (q15_t)0x1a73, (q15_t)0x1a6d, (q15_t)0x1a66, (q15_t)0x1a60, (q15_t)0x1a5a, (q15_t)0x1a54,
-  (q15_t)0x1a4e, (q15_t)0x1a48, (q15_t)0x1a42, (q15_t)0x1a3b, (q15_t)0x1a35, (q15_t)0x1a2f, (q15_t)0x1a29, (q15_t)0x1a23,
-  (q15_t)0x1a1d, (q15_t)0x1a17, (q15_t)0x1a10, (q15_t)0x1a0a, (q15_t)0x1a04, (q15_t)0x19fe, (q15_t)0x19f8, (q15_t)0x19f2,
-  (q15_t)0x19eb, (q15_t)0x19e5, (q15_t)0x19df, (q15_t)0x19d9, (q15_t)0x19d3, (q15_t)0x19cd, (q15_t)0x19c7, (q15_t)0x19c0,
-  (q15_t)0x19ba, (q15_t)0x19b4, (q15_t)0x19ae, (q15_t)0x19a8, (q15_t)0x19a2, (q15_t)0x199b, (q15_t)0x1995, (q15_t)0x198f,
-  (q15_t)0x1989, (q15_t)0x1983, (q15_t)0x197d, (q15_t)0x1977, (q15_t)0x1970, (q15_t)0x196a, (q15_t)0x1964, (q15_t)0x195e,
-  (q15_t)0x1958, (q15_t)0x1952, (q15_t)0x194b, (q15_t)0x1945, (q15_t)0x193f, (q15_t)0x1939, (q15_t)0x1933, (q15_t)0x192d,
-  (q15_t)0x1926, (q15_t)0x1920, (q15_t)0x191a, (q15_t)0x1914, (q15_t)0x190e, (q15_t)0x1908, (q15_t)0x1901, (q15_t)0x18fb,
-  (q15_t)0x18f5, (q15_t)0x18ef, (q15_t)0x18e9, (q15_t)0x18e3, (q15_t)0x18dc, (q15_t)0x18d6, (q15_t)0x18d0, (q15_t)0x18ca,
-  (q15_t)0x18c4, (q15_t)0x18be, (q15_t)0x18b8, (q15_t)0x18b1, (q15_t)0x18ab, (q15_t)0x18a5, (q15_t)0x189f, (q15_t)0x1899,
-  (q15_t)0x1893, (q15_t)0x188c, (q15_t)0x1886, (q15_t)0x1880, (q15_t)0x187a, (q15_t)0x1874, (q15_t)0x186e, (q15_t)0x1867,
-  (q15_t)0x1861, (q15_t)0x185b, (q15_t)0x1855, (q15_t)0x184f, (q15_t)0x1848, (q15_t)0x1842, (q15_t)0x183c, (q15_t)0x1836,
-  (q15_t)0x1830, (q15_t)0x182a, (q15_t)0x1823, (q15_t)0x181d, (q15_t)0x1817, (q15_t)0x1811, (q15_t)0x180b, (q15_t)0x1805,
-  (q15_t)0x17fe, (q15_t)0x17f8, (q15_t)0x17f2, (q15_t)0x17ec, (q15_t)0x17e6, (q15_t)0x17e0, (q15_t)0x17d9, (q15_t)0x17d3,
-  (q15_t)0x17cd, (q15_t)0x17c7, (q15_t)0x17c1, (q15_t)0x17bb, (q15_t)0x17b4, (q15_t)0x17ae, (q15_t)0x17a8, (q15_t)0x17a2,
-  (q15_t)0x179c, (q15_t)0x1795, (q15_t)0x178f, (q15_t)0x1789, (q15_t)0x1783, (q15_t)0x177d, (q15_t)0x1777, (q15_t)0x1770,
-  (q15_t)0x176a, (q15_t)0x1764, (q15_t)0x175e, (q15_t)0x1758, (q15_t)0x1752, (q15_t)0x174b, (q15_t)0x1745, (q15_t)0x173f,
-  (q15_t)0x1739, (q15_t)0x1733, (q15_t)0x172c, (q15_t)0x1726, (q15_t)0x1720, (q15_t)0x171a, (q15_t)0x1714, (q15_t)0x170e,
-  (q15_t)0x1707, (q15_t)0x1701, (q15_t)0x16fb, (q15_t)0x16f5, (q15_t)0x16ef, (q15_t)0x16e8, (q15_t)0x16e2, (q15_t)0x16dc,
-  (q15_t)0x16d6, (q15_t)0x16d0, (q15_t)0x16ca, (q15_t)0x16c3, (q15_t)0x16bd, (q15_t)0x16b7, (q15_t)0x16b1, (q15_t)0x16ab,
-  (q15_t)0x16a4, (q15_t)0x169e, (q15_t)0x1698, (q15_t)0x1692, (q15_t)0x168c, (q15_t)0x1686, (q15_t)0x167f, (q15_t)0x1679,
-  (q15_t)0x1673, (q15_t)0x166d, (q15_t)0x1667, (q15_t)0x1660, (q15_t)0x165a, (q15_t)0x1654, (q15_t)0x164e, (q15_t)0x1648,
-  (q15_t)0x1642, (q15_t)0x163b, (q15_t)0x1635, (q15_t)0x162f, (q15_t)0x1629, (q15_t)0x1623, (q15_t)0x161c, (q15_t)0x1616,
-  (q15_t)0x1610, (q15_t)0x160a, (q15_t)0x1604, (q15_t)0x15fd, (q15_t)0x15f7, (q15_t)0x15f1, (q15_t)0x15eb, (q15_t)0x15e5,
-  (q15_t)0x15de, (q15_t)0x15d8, (q15_t)0x15d2, (q15_t)0x15cc, (q15_t)0x15c6, (q15_t)0x15c0, (q15_t)0x15b9, (q15_t)0x15b3,
-  (q15_t)0x15ad, (q15_t)0x15a7, (q15_t)0x15a1, (q15_t)0x159a, (q15_t)0x1594, (q15_t)0x158e, (q15_t)0x1588, (q15_t)0x1582,
-  (q15_t)0x157b, (q15_t)0x1575, (q15_t)0x156f, (q15_t)0x1569, (q15_t)0x1563, (q15_t)0x155c, (q15_t)0x1556, (q15_t)0x1550,
-  (q15_t)0x154a, (q15_t)0x1544, (q15_t)0x153d, (q15_t)0x1537, (q15_t)0x1531, (q15_t)0x152b, (q15_t)0x1525, (q15_t)0x151e,
-  (q15_t)0x1518, (q15_t)0x1512, (q15_t)0x150c, (q15_t)0x1506, (q15_t)0x14ff, (q15_t)0x14f9, (q15_t)0x14f3, (q15_t)0x14ed,
-  (q15_t)0x14e7, (q15_t)0x14e0, (q15_t)0x14da, (q15_t)0x14d4, (q15_t)0x14ce, (q15_t)0x14c8, (q15_t)0x14c1, (q15_t)0x14bb,
-  (q15_t)0x14b5, (q15_t)0x14af, (q15_t)0x14a9, (q15_t)0x14a2, (q15_t)0x149c, (q15_t)0x1496, (q15_t)0x1490, (q15_t)0x148a,
-  (q15_t)0x1483, (q15_t)0x147d, (q15_t)0x1477, (q15_t)0x1471, (q15_t)0x146b, (q15_t)0x1464, (q15_t)0x145e, (q15_t)0x1458,
-  (q15_t)0x1452, (q15_t)0x144c, (q15_t)0x1445, (q15_t)0x143f, (q15_t)0x1439, (q15_t)0x1433, (q15_t)0x142d, (q15_t)0x1426,
-  (q15_t)0x1420, (q15_t)0x141a, (q15_t)0x1414, (q15_t)0x140e, (q15_t)0x1407, (q15_t)0x1401, (q15_t)0x13fb, (q15_t)0x13f5,
-  (q15_t)0x13ef, (q15_t)0x13e8, (q15_t)0x13e2, (q15_t)0x13dc, (q15_t)0x13d6, (q15_t)0x13d0, (q15_t)0x13c9, (q15_t)0x13c3,
-  (q15_t)0x13bd, (q15_t)0x13b7, (q15_t)0x13b1, (q15_t)0x13aa, (q15_t)0x13a4, (q15_t)0x139e, (q15_t)0x1398, (q15_t)0x1391,
-  (q15_t)0x138b, (q15_t)0x1385, (q15_t)0x137f, (q15_t)0x1379, (q15_t)0x1372, (q15_t)0x136c, (q15_t)0x1366, (q15_t)0x1360,
-  (q15_t)0x135a, (q15_t)0x1353, (q15_t)0x134d, (q15_t)0x1347, (q15_t)0x1341, (q15_t)0x133b, (q15_t)0x1334, (q15_t)0x132e,
-  (q15_t)0x1328, (q15_t)0x1322, (q15_t)0x131b, (q15_t)0x1315, (q15_t)0x130f, (q15_t)0x1309, (q15_t)0x1303, (q15_t)0x12fc,
-  (q15_t)0x12f6, (q15_t)0x12f0, (q15_t)0x12ea, (q15_t)0x12e4, (q15_t)0x12dd, (q15_t)0x12d7, (q15_t)0x12d1, (q15_t)0x12cb,
-  (q15_t)0x12c4, (q15_t)0x12be, (q15_t)0x12b8, (q15_t)0x12b2, (q15_t)0x12ac, (q15_t)0x12a5, (q15_t)0x129f, (q15_t)0x1299,
-  (q15_t)0x1293, (q15_t)0x128d, (q15_t)0x1286, (q15_t)0x1280, (q15_t)0x127a, (q15_t)0x1274, (q15_t)0x126d, (q15_t)0x1267,
-  (q15_t)0x1261, (q15_t)0x125b, (q15_t)0x1255, (q15_t)0x124e, (q15_t)0x1248, (q15_t)0x1242, (q15_t)0x123c, (q15_t)0x1235,
-  (q15_t)0x122f, (q15_t)0x1229, (q15_t)0x1223, (q15_t)0x121d, (q15_t)0x1216, (q15_t)0x1210, (q15_t)0x120a, (q15_t)0x1204,
-  (q15_t)0x11fd, (q15_t)0x11f7, (q15_t)0x11f1, (q15_t)0x11eb, (q15_t)0x11e5, (q15_t)0x11de, (q15_t)0x11d8, (q15_t)0x11d2,
-  (q15_t)0x11cc, (q15_t)0x11c5, (q15_t)0x11bf, (q15_t)0x11b9, (q15_t)0x11b3, (q15_t)0x11ad, (q15_t)0x11a6, (q15_t)0x11a0,
-  (q15_t)0x119a, (q15_t)0x1194, (q15_t)0x118d, (q15_t)0x1187, (q15_t)0x1181, (q15_t)0x117b, (q15_t)0x1175, (q15_t)0x116e,
-  (q15_t)0x1168, (q15_t)0x1162, (q15_t)0x115c, (q15_t)0x1155, (q15_t)0x114f, (q15_t)0x1149, (q15_t)0x1143, (q15_t)0x113d,
-  (q15_t)0x1136, (q15_t)0x1130, (q15_t)0x112a, (q15_t)0x1124, (q15_t)0x111d, (q15_t)0x1117, (q15_t)0x1111, (q15_t)0x110b,
-  (q15_t)0x1105, (q15_t)0x10fe, (q15_t)0x10f8, (q15_t)0x10f2, (q15_t)0x10ec, (q15_t)0x10e5, (q15_t)0x10df, (q15_t)0x10d9,
-  (q15_t)0x10d3, (q15_t)0x10cc, (q15_t)0x10c6, (q15_t)0x10c0, (q15_t)0x10ba, (q15_t)0x10b4, (q15_t)0x10ad, (q15_t)0x10a7,
-  (q15_t)0x10a1, (q15_t)0x109b, (q15_t)0x1094, (q15_t)0x108e, (q15_t)0x1088, (q15_t)0x1082, (q15_t)0x107b, (q15_t)0x1075,
-  (q15_t)0x106f, (q15_t)0x1069, (q15_t)0x1063, (q15_t)0x105c, (q15_t)0x1056, (q15_t)0x1050, (q15_t)0x104a, (q15_t)0x1043,
-  (q15_t)0x103d, (q15_t)0x1037, (q15_t)0x1031, (q15_t)0x102a, (q15_t)0x1024, (q15_t)0x101e, (q15_t)0x1018, (q15_t)0x1012,
-  (q15_t)0x100b, (q15_t)0x1005, (q15_t)0xfff, (q15_t)0xff9, (q15_t)0xff2, (q15_t)0xfec, (q15_t)0xfe6, (q15_t)0xfe0,
-  (q15_t)0xfd9, (q15_t)0xfd3, (q15_t)0xfcd, (q15_t)0xfc7, (q15_t)0xfc0, (q15_t)0xfba, (q15_t)0xfb4, (q15_t)0xfae,
-  (q15_t)0xfa8, (q15_t)0xfa1, (q15_t)0xf9b, (q15_t)0xf95, (q15_t)0xf8f, (q15_t)0xf88, (q15_t)0xf82, (q15_t)0xf7c,
-  (q15_t)0xf76, (q15_t)0xf6f, (q15_t)0xf69, (q15_t)0xf63, (q15_t)0xf5d, (q15_t)0xf56, (q15_t)0xf50, (q15_t)0xf4a,
-  (q15_t)0xf44, (q15_t)0xf3e, (q15_t)0xf37, (q15_t)0xf31, (q15_t)0xf2b, (q15_t)0xf25, (q15_t)0xf1e, (q15_t)0xf18,
-  (q15_t)0xf12, (q15_t)0xf0c, (q15_t)0xf05, (q15_t)0xeff, (q15_t)0xef9, (q15_t)0xef3, (q15_t)0xeec, (q15_t)0xee6,
-  (q15_t)0xee0, (q15_t)0xeda, (q15_t)0xed3, (q15_t)0xecd, (q15_t)0xec7, (q15_t)0xec1, (q15_t)0xeba, (q15_t)0xeb4,
-  (q15_t)0xeae, (q15_t)0xea8, (q15_t)0xea1, (q15_t)0xe9b, (q15_t)0xe95, (q15_t)0xe8f, (q15_t)0xe89, (q15_t)0xe82,
-  (q15_t)0xe7c, (q15_t)0xe76, (q15_t)0xe70, (q15_t)0xe69, (q15_t)0xe63, (q15_t)0xe5d, (q15_t)0xe57, (q15_t)0xe50,
-  (q15_t)0xe4a, (q15_t)0xe44, (q15_t)0xe3e, (q15_t)0xe37, (q15_t)0xe31, (q15_t)0xe2b, (q15_t)0xe25, (q15_t)0xe1e,
-  (q15_t)0xe18, (q15_t)0xe12, (q15_t)0xe0c, (q15_t)0xe05, (q15_t)0xdff, (q15_t)0xdf9, (q15_t)0xdf3, (q15_t)0xdec,
-  (q15_t)0xde6, (q15_t)0xde0, (q15_t)0xdda, (q15_t)0xdd3, (q15_t)0xdcd, (q15_t)0xdc7, (q15_t)0xdc1, (q15_t)0xdba,
-  (q15_t)0xdb4, (q15_t)0xdae, (q15_t)0xda8, (q15_t)0xda1, (q15_t)0xd9b, (q15_t)0xd95, (q15_t)0xd8f, (q15_t)0xd88,
-  (q15_t)0xd82, (q15_t)0xd7c, (q15_t)0xd76, (q15_t)0xd6f, (q15_t)0xd69, (q15_t)0xd63, (q15_t)0xd5d, (q15_t)0xd56,
-  (q15_t)0xd50, (q15_t)0xd4a, (q15_t)0xd44, (q15_t)0xd3d, (q15_t)0xd37, (q15_t)0xd31, (q15_t)0xd2b, (q15_t)0xd24,
-  (q15_t)0xd1e, (q15_t)0xd18, (q15_t)0xd12, (q15_t)0xd0b, (q15_t)0xd05, (q15_t)0xcff, (q15_t)0xcf9, (q15_t)0xcf2,
-  (q15_t)0xcec, (q15_t)0xce6, (q15_t)0xce0, (q15_t)0xcd9, (q15_t)0xcd3, (q15_t)0xccd, (q15_t)0xcc7, (q15_t)0xcc0,
-  (q15_t)0xcba, (q15_t)0xcb4, (q15_t)0xcae, (q15_t)0xca7, (q15_t)0xca1, (q15_t)0xc9b, (q15_t)0xc95, (q15_t)0xc8e,
-  (q15_t)0xc88, (q15_t)0xc82, (q15_t)0xc7c, (q15_t)0xc75, (q15_t)0xc6f, (q15_t)0xc69, (q15_t)0xc63, (q15_t)0xc5c,
-  (q15_t)0xc56, (q15_t)0xc50, (q15_t)0xc4a, (q15_t)0xc43, (q15_t)0xc3d, (q15_t)0xc37, (q15_t)0xc31, (q15_t)0xc2a,
-  (q15_t)0xc24, (q15_t)0xc1e, (q15_t)0xc18, (q15_t)0xc11, (q15_t)0xc0b, (q15_t)0xc05, (q15_t)0xbff, (q15_t)0xbf8,
-  (q15_t)0xbf2, (q15_t)0xbec, (q15_t)0xbe6, (q15_t)0xbdf, (q15_t)0xbd9, (q15_t)0xbd3, (q15_t)0xbcd, (q15_t)0xbc6,
-  (q15_t)0xbc0, (q15_t)0xbba, (q15_t)0xbb4, (q15_t)0xbad, (q15_t)0xba7, (q15_t)0xba1, (q15_t)0xb9b, (q15_t)0xb94,
-  (q15_t)0xb8e, (q15_t)0xb88, (q15_t)0xb81, (q15_t)0xb7b, (q15_t)0xb75, (q15_t)0xb6f, (q15_t)0xb68, (q15_t)0xb62,
-  (q15_t)0xb5c, (q15_t)0xb56, (q15_t)0xb4f, (q15_t)0xb49, (q15_t)0xb43, (q15_t)0xb3d, (q15_t)0xb36, (q15_t)0xb30,
-  (q15_t)0xb2a, (q15_t)0xb24, (q15_t)0xb1d, (q15_t)0xb17, (q15_t)0xb11, (q15_t)0xb0b, (q15_t)0xb04, (q15_t)0xafe,
-  (q15_t)0xaf8, (q15_t)0xaf2, (q15_t)0xaeb, (q15_t)0xae5, (q15_t)0xadf, (q15_t)0xad8, (q15_t)0xad2, (q15_t)0xacc,
-  (q15_t)0xac6, (q15_t)0xabf, (q15_t)0xab9, (q15_t)0xab3, (q15_t)0xaad, (q15_t)0xaa6, (q15_t)0xaa0, (q15_t)0xa9a,
-  (q15_t)0xa94, (q15_t)0xa8d, (q15_t)0xa87, (q15_t)0xa81, (q15_t)0xa7b, (q15_t)0xa74, (q15_t)0xa6e, (q15_t)0xa68,
-  (q15_t)0xa62, (q15_t)0xa5b, (q15_t)0xa55, (q15_t)0xa4f, (q15_t)0xa48, (q15_t)0xa42, (q15_t)0xa3c, (q15_t)0xa36,
-  (q15_t)0xa2f, (q15_t)0xa29, (q15_t)0xa23, (q15_t)0xa1d, (q15_t)0xa16, (q15_t)0xa10, (q15_t)0xa0a, (q15_t)0xa04,
-  (q15_t)0x9fd, (q15_t)0x9f7, (q15_t)0x9f1, (q15_t)0x9eb, (q15_t)0x9e4, (q15_t)0x9de, (q15_t)0x9d8, (q15_t)0x9d1,
-  (q15_t)0x9cb, (q15_t)0x9c5, (q15_t)0x9bf, (q15_t)0x9b8, (q15_t)0x9b2, (q15_t)0x9ac, (q15_t)0x9a6, (q15_t)0x99f,
-  (q15_t)0x999, (q15_t)0x993, (q15_t)0x98d, (q15_t)0x986, (q15_t)0x980, (q15_t)0x97a, (q15_t)0x973, (q15_t)0x96d,
-  (q15_t)0x967, (q15_t)0x961, (q15_t)0x95a, (q15_t)0x954, (q15_t)0x94e, (q15_t)0x948, (q15_t)0x941, (q15_t)0x93b,
-  (q15_t)0x935, (q15_t)0x92f, (q15_t)0x928, (q15_t)0x922, (q15_t)0x91c, (q15_t)0x915, (q15_t)0x90f, (q15_t)0x909,
-  (q15_t)0x903, (q15_t)0x8fc, (q15_t)0x8f6, (q15_t)0x8f0, (q15_t)0x8ea, (q15_t)0x8e3, (q15_t)0x8dd, (q15_t)0x8d7,
-  (q15_t)0x8d1, (q15_t)0x8ca, (q15_t)0x8c4, (q15_t)0x8be, (q15_t)0x8b7, (q15_t)0x8b1, (q15_t)0x8ab, (q15_t)0x8a5,
-  (q15_t)0x89e, (q15_t)0x898, (q15_t)0x892, (q15_t)0x88c, (q15_t)0x885, (q15_t)0x87f, (q15_t)0x879, (q15_t)0x872,
-  (q15_t)0x86c, (q15_t)0x866, (q15_t)0x860, (q15_t)0x859, (q15_t)0x853, (q15_t)0x84d, (q15_t)0x847, (q15_t)0x840,
-  (q15_t)0x83a, (q15_t)0x834, (q15_t)0x82e, (q15_t)0x827, (q15_t)0x821, (q15_t)0x81b, (q15_t)0x814, (q15_t)0x80e,
-  (q15_t)0x808, (q15_t)0x802, (q15_t)0x7fb, (q15_t)0x7f5, (q15_t)0x7ef, (q15_t)0x7e9, (q15_t)0x7e2, (q15_t)0x7dc,
-  (q15_t)0x7d6, (q15_t)0x7cf, (q15_t)0x7c9, (q15_t)0x7c3, (q15_t)0x7bd, (q15_t)0x7b6, (q15_t)0x7b0, (q15_t)0x7aa,
-  (q15_t)0x7a4, (q15_t)0x79d, (q15_t)0x797, (q15_t)0x791, (q15_t)0x78a, (q15_t)0x784, (q15_t)0x77e, (q15_t)0x778,
-  (q15_t)0x771, (q15_t)0x76b, (q15_t)0x765, (q15_t)0x75f, (q15_t)0x758, (q15_t)0x752, (q15_t)0x74c, (q15_t)0x745,
-  (q15_t)0x73f, (q15_t)0x739, (q15_t)0x733, (q15_t)0x72c, (q15_t)0x726, (q15_t)0x720, (q15_t)0x71a, (q15_t)0x713,
-  (q15_t)0x70d, (q15_t)0x707, (q15_t)0x700, (q15_t)0x6fa, (q15_t)0x6f4, (q15_t)0x6ee, (q15_t)0x6e7, (q15_t)0x6e1,
-  (q15_t)0x6db, (q15_t)0x6d5, (q15_t)0x6ce, (q15_t)0x6c8, (q15_t)0x6c2, (q15_t)0x6bb, (q15_t)0x6b5, (q15_t)0x6af,
-  (q15_t)0x6a9, (q15_t)0x6a2, (q15_t)0x69c, (q15_t)0x696, (q15_t)0x690, (q15_t)0x689, (q15_t)0x683, (q15_t)0x67d,
-  (q15_t)0x676, (q15_t)0x670, (q15_t)0x66a, (q15_t)0x664, (q15_t)0x65d, (q15_t)0x657, (q15_t)0x651, (q15_t)0x64a,
-  (q15_t)0x644, (q15_t)0x63e, (q15_t)0x638, (q15_t)0x631, (q15_t)0x62b, (q15_t)0x625, (q15_t)0x61f, (q15_t)0x618,
-  (q15_t)0x612, (q15_t)0x60c, (q15_t)0x605, (q15_t)0x5ff, (q15_t)0x5f9, (q15_t)0x5f3, (q15_t)0x5ec, (q15_t)0x5e6,
-  (q15_t)0x5e0, (q15_t)0x5da, (q15_t)0x5d3, (q15_t)0x5cd, (q15_t)0x5c7, (q15_t)0x5c0, (q15_t)0x5ba, (q15_t)0x5b4,
-  (q15_t)0x5ae, (q15_t)0x5a7, (q15_t)0x5a1, (q15_t)0x59b, (q15_t)0x594, (q15_t)0x58e, (q15_t)0x588, (q15_t)0x582,
-  (q15_t)0x57b, (q15_t)0x575, (q15_t)0x56f, (q15_t)0x569, (q15_t)0x562, (q15_t)0x55c, (q15_t)0x556, (q15_t)0x54f,
-  (q15_t)0x549, (q15_t)0x543, (q15_t)0x53d, (q15_t)0x536, (q15_t)0x530, (q15_t)0x52a, (q15_t)0x523, (q15_t)0x51d,
-  (q15_t)0x517, (q15_t)0x511, (q15_t)0x50a, (q15_t)0x504, (q15_t)0x4fe, (q15_t)0x4f8, (q15_t)0x4f1, (q15_t)0x4eb,
-  (q15_t)0x4e5, (q15_t)0x4de, (q15_t)0x4d8, (q15_t)0x4d2, (q15_t)0x4cc, (q15_t)0x4c5, (q15_t)0x4bf, (q15_t)0x4b9,
-  (q15_t)0x4b2, (q15_t)0x4ac, (q15_t)0x4a6, (q15_t)0x4a0, (q15_t)0x499, (q15_t)0x493, (q15_t)0x48d, (q15_t)0x487,
-  (q15_t)0x480, (q15_t)0x47a, (q15_t)0x474, (q15_t)0x46d, (q15_t)0x467, (q15_t)0x461, (q15_t)0x45b, (q15_t)0x454,
-  (q15_t)0x44e, (q15_t)0x448, (q15_t)0x441, (q15_t)0x43b, (q15_t)0x435, (q15_t)0x42f, (q15_t)0x428, (q15_t)0x422,
-  (q15_t)0x41c, (q15_t)0x415, (q15_t)0x40f, (q15_t)0x409, (q15_t)0x403, (q15_t)0x3fc, (q15_t)0x3f6, (q15_t)0x3f0,
-  (q15_t)0x3ea, (q15_t)0x3e3, (q15_t)0x3dd, (q15_t)0x3d7, (q15_t)0x3d0, (q15_t)0x3ca, (q15_t)0x3c4, (q15_t)0x3be,
-  (q15_t)0x3b7, (q15_t)0x3b1, (q15_t)0x3ab, (q15_t)0x3a4, (q15_t)0x39e, (q15_t)0x398, (q15_t)0x392, (q15_t)0x38b,
-  (q15_t)0x385, (q15_t)0x37f, (q15_t)0x378, (q15_t)0x372, (q15_t)0x36c, (q15_t)0x366, (q15_t)0x35f, (q15_t)0x359,
-  (q15_t)0x353, (q15_t)0x34c, (q15_t)0x346, (q15_t)0x340, (q15_t)0x33a, (q15_t)0x333, (q15_t)0x32d, (q15_t)0x327,
-  (q15_t)0x321, (q15_t)0x31a, (q15_t)0x314, (q15_t)0x30e, (q15_t)0x307, (q15_t)0x301, (q15_t)0x2fb, (q15_t)0x2f5,
-  (q15_t)0x2ee, (q15_t)0x2e8, (q15_t)0x2e2, (q15_t)0x2db, (q15_t)0x2d5, (q15_t)0x2cf, (q15_t)0x2c9, (q15_t)0x2c2,
-  (q15_t)0x2bc, (q15_t)0x2b6, (q15_t)0x2af, (q15_t)0x2a9, (q15_t)0x2a3, (q15_t)0x29d, (q15_t)0x296, (q15_t)0x290,
-  (q15_t)0x28a, (q15_t)0x283, (q15_t)0x27d, (q15_t)0x277, (q15_t)0x271, (q15_t)0x26a, (q15_t)0x264, (q15_t)0x25e,
-  (q15_t)0x258, (q15_t)0x251, (q15_t)0x24b, (q15_t)0x245, (q15_t)0x23e, (q15_t)0x238, (q15_t)0x232, (q15_t)0x22c,
-  (q15_t)0x225, (q15_t)0x21f, (q15_t)0x219, (q15_t)0x212, (q15_t)0x20c, (q15_t)0x206, (q15_t)0x200, (q15_t)0x1f9,
-  (q15_t)0x1f3, (q15_t)0x1ed, (q15_t)0x1e6, (q15_t)0x1e0, (q15_t)0x1da, (q15_t)0x1d4, (q15_t)0x1cd, (q15_t)0x1c7,
-  (q15_t)0x1c1, (q15_t)0x1ba, (q15_t)0x1b4, (q15_t)0x1ae, (q15_t)0x1a8, (q15_t)0x1a1, (q15_t)0x19b, (q15_t)0x195,
-  (q15_t)0x18e, (q15_t)0x188, (q15_t)0x182, (q15_t)0x17c, (q15_t)0x175, (q15_t)0x16f, (q15_t)0x169, (q15_t)0x162,
-  (q15_t)0x15c, (q15_t)0x156, (q15_t)0x150, (q15_t)0x149, (q15_t)0x143, (q15_t)0x13d, (q15_t)0x137, (q15_t)0x130,
-  (q15_t)0x12a, (q15_t)0x124, (q15_t)0x11d, (q15_t)0x117, (q15_t)0x111, (q15_t)0x10b, (q15_t)0x104, (q15_t)0xfe,
-  (q15_t)0xf8, (q15_t)0xf1, (q15_t)0xeb, (q15_t)0xe5, (q15_t)0xdf, (q15_t)0xd8, (q15_t)0xd2, (q15_t)0xcc,
-  (q15_t)0xc5, (q15_t)0xbf, (q15_t)0xb9, (q15_t)0xb3, (q15_t)0xac, (q15_t)0xa6, (q15_t)0xa0, (q15_t)0x99,
-  (q15_t)0x93, (q15_t)0x8d, (q15_t)0x87, (q15_t)0x80, (q15_t)0x7a, (q15_t)0x74, (q15_t)0x6d, (q15_t)0x67,
-  (q15_t)0x61, (q15_t)0x5b, (q15_t)0x54, (q15_t)0x4e, (q15_t)0x48, (q15_t)0x41, (q15_t)0x3b, (q15_t)0x35,
-  (q15_t)0x2f, (q15_t)0x28, (q15_t)0x22, (q15_t)0x1c, (q15_t)0x15, (q15_t)0xf, (q15_t)0x9, (q15_t)0x3
-};
-
-/**
- * @} end of DCT4_IDCT4_Table group
+  @addtogroup DCT4_IDCT4
+  @{
  */
 
 /**
- * @addtogroup DCT4_IDCT4
- * @{
- */
+  @brief         Initialization function for the Q15 DCT4/IDCT4.
+  @param[in,out] S         points to an instance of Q15 DCT4/IDCT4 structure
+  @param[in]     S_RFFT    points to an instance of Q15 RFFT/RIFFT structure
+  @param[in]     S_CFFT    points to an instance of Q15 CFFT/CIFFT structure
+  @param[in]     N          length of the DCT4
+  @param[in]     Nby2       half of the length of the DCT4
+  @param[in]     normalize  normalizing factor
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>N</code> is not a supported transform length
 
-/**
- * @brief  Initialization function for the Q15 DCT4/IDCT4.
- * @param[in,out] *S         points to an instance of Q15 DCT4/IDCT4 structure.
- * @param[in]     *S_RFFT    points to an instance of Q15 RFFT/RIFFT structure.
- * @param[in]     *S_CFFT    points to an instance of Q15 CFFT/CIFFT structure.
- * @param[in]     N          length of the DCT4.
- * @param[in]     Nby2       half of the length of the DCT4.
- * @param[in]     normalize  normalizing factor.
- * @return  	  arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
- * \par Normalizing factor:
- * The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>.
- * Normalizing factors in 1.15 format are mentioned in the table below for different DCT sizes:
- * \image html dct4NormalizingQ15Table.gif
+  @par           Normalizing factor
+                   The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>.
+                   Normalizing factors in 1.15 format are mentioned in the table below for different DCT sizes:
+
+                   \image html dct4NormalizingQ15Table.gif
  */
 
 arm_status arm_dct4_init_q15(
@@ -4219,17 +68,6 @@
   /*  Initialise the default arm status */
   arm_status status = ARM_MATH_SUCCESS;
 
-  /* Initializing the pointer array with the weight table base addresses of different lengths */
-  q15_t *twiddlePtr[4] = { (q15_t *) WeightsQ15_128, (q15_t *) WeightsQ15_512,
-    (q15_t *) WeightsQ15_2048, (q15_t *) WeightsQ15_8192
-  };
-
-  /* Initializing the pointer array with the cos factor table base addresses of different lengths */
-  q15_t *pCosFactor[4] =
-    { (q15_t *) cos_factorsQ15_128, (q15_t *) cos_factorsQ15_512,
-    (q15_t *) cos_factorsQ15_2048, (q15_t *) cos_factorsQ15_8192
-  };
-
   /* Initialize the DCT4 length */
   S->N = N;
 
@@ -4247,23 +85,35 @@
 
   switch (N)
   {
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_8192)
     /* Initialize the table modifier values */
   case 8192U:
-    S->pTwiddle = twiddlePtr[3];
-    S->pCosFactor = pCosFactor[3];
+    S->pTwiddle = WeightsQ15_8192;
+    S->pCosFactor = cos_factorsQ15_8192;
     break;
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_2048)
   case 2048U:
-    S->pTwiddle = twiddlePtr[2];
-    S->pCosFactor = pCosFactor[2];
+    S->pTwiddle = WeightsQ15_2048;
+    S->pCosFactor = cos_factorsQ15_2048;
     break;
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_512)
   case 512U:
-    S->pTwiddle = twiddlePtr[1];
-    S->pCosFactor = pCosFactor[1];
+    S->pTwiddle = WeightsQ15_512;
+    S->pCosFactor = cos_factorsQ15_512;
     break;
+  #endif 
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_128)
   case 128U:
-    S->pTwiddle = twiddlePtr[0];
-    S->pCosFactor = pCosFactor[0];
+    S->pTwiddle = WeightsQ15_128;
+    S->pCosFactor = cos_factorsQ15_128;
     break;
+  #endif 
+
   default:
     status = ARM_MATH_ARGUMENT_ERROR;
   }
@@ -4276,5 +126,5 @@
 }
 
 /**
- * @} end of DCT4_IDCT4 group
+  @} end of DCT4_IDCT4 group
  */
diff --git a/DSP/Source/TransformFunctions/arm_dct4_init_q31.c b/DSP/Source/TransformFunctions/arm_dct4_init_q31.c
index 8156844..f5cc78b 100644
--- a/DSP/Source/TransformFunctions/arm_dct4_init_q31.c
+++ b/DSP/Source/TransformFunctions/arm_dct4_init_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_dct4_init_q31.c
  * Description:  Initialization function of DCT-4 & IDCT4 Q31
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -27,7591 +27,35 @@
  */
 
 #include "arm_math.h"
+#include "arm_common_tables.h"
 
 /**
- * @ingroup DCT4_IDCT4
+  @ingroup DCT4_IDCT4
+ */
+
+
+/**
+  @addtogroup DCT4_IDCT4
+  @{
  */
 
 /**
- * @addtogroup DCT4_IDCT4_Table DCT Type IV Tables
- * @{
- */
+  @brief  Initialization function for the Q31 DCT4/IDCT4.
+  @param[in,out] S          points to an instance of Q31 DCT4/IDCT4 structure.
+  @param[in]     S_RFFT     points to an instance of Q31 RFFT/RIFFT structure
+  @param[in]     S_CFFT     points to an instance of Q31 CFFT/CIFFT structure
+  @param[in]     N          length of the DCT4.
+  @param[in]     Nby2       half of the length of the DCT4.
+  @param[in]     normalize  normalizing factor.
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>N</code> is not a supported transform length
 
-/*
-* @brief  Weights Table
-*/
+  @par           Normalizing factor:
+                   The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>.
+                   Normalizing factors in 1.31 format are mentioned in the table below for different DCT sizes:
 
-/**
- * \par
- * Weights tables are generated using the formula : <pre>weights[n] = e^(-j*n*pi/(2*N))</pre>
- * \par
- * C command to generate the table
- * <pre>
- * for(i = 0; i< N; i++)
- * {
- *   weights[2*i]= cos(i*c);
- *   weights[(2*i)+1]= -sin(i * c);
- * } </pre>
- * \par
- * where <code>N</code> is the Number of weights to be calculated and <code>c</code> is <code>pi/(2*N)</code>
- * \par
- * Convert the output to q31 format by multiplying with 2^31 and saturated if required.
- * \par
- * In the tables below the real and imaginary values are placed alternatively, hence the
- * array length is <code>2*N</code>.
- */
-
-static const q31_t WeightsQ31_128[256] = {
-  (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3,
-  (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7f872bf3, (q31_t)0xf50497fb,
-  (q31_t)0x7f62368f, (q31_t)0xf3742ca2, (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c, (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31,
-  (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e5fe493, (q31_t)0xebaa894f, (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7dd6668f, (q31_t)0xe8922622,
-  (q31_t)0x7d8a5f40, (q31_t)0xe70747c4, (q31_t)0x7d3980ec, (q31_t)0xe57d5fda, (q31_t)0x7ce3ceb2, (q31_t)0xe3f47d96, (q31_t)0x7c894bde, (q31_t)0xe26cb01b,
-  (q31_t)0x7c29fbee, (q31_t)0xe0e60685, (q31_t)0x7bc5e290, (q31_t)0xdf608fe4, (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7aef6323, (q31_t)0xdc597781,
-  (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a05eead, (q31_t)0xd957de7a, (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x7909a92d, (q31_t)0xd65c3b7b,
-  (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x77fab989, (q31_t)0xd3670446, (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x76d94989, (q31_t)0xd078ad9e,
-  (q31_t)0x7641af3d, (q31_t)0xcf043ab3, (q31_t)0x75a585cf, (q31_t)0xcd91ab39, (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x745f9dd1, (q31_t)0xcab26fa9,
-  (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x7307c3d0, (q31_t)0xc7db6c50, (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x719e2cd2, (q31_t)0xc50d1149,
-  (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3,
-  (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6cf934fc, (q31_t)0xbcda3ecb, (q31_t)0x6c242960, (q31_t)0xbb8532b0, (q31_t)0x6b4af279, (q31_t)0xba32ca71,
-  (q31_t)0x6a6d98a4, (q31_t)0xb8e31319, (q31_t)0x698c246c, (q31_t)0xb796199b, (q31_t)0x68a69e81, (q31_t)0xb64beacd, (q31_t)0x67bd0fbd, (q31_t)0xb5049368,
-  (q31_t)0x66cf8120, (q31_t)0xb3c0200c, (q31_t)0x65ddfbd3, (q31_t)0xb27e9d3c, (q31_t)0x64e88926, (q31_t)0xb140175b, (q31_t)0x63ef3290, (q31_t)0xb0049ab3,
-  (q31_t)0x62f201ac, (q31_t)0xaecc336c, (q31_t)0x61f1003f, (q31_t)0xad96ed92, (q31_t)0x60ec3830, (q31_t)0xac64d510, (q31_t)0x5fe3b38d, (q31_t)0xab35f5b5,
-  (q31_t)0x5ed77c8a, (q31_t)0xaa0a5b2e, (q31_t)0x5dc79d7c, (q31_t)0xa8e21106, (q31_t)0x5cb420e0, (q31_t)0xa7bd22ac, (q31_t)0x5b9d1154, (q31_t)0xa69b9b68,
-  (q31_t)0x5a82799a, (q31_t)0xa57d8666, (q31_t)0x59646498, (q31_t)0xa462eeac, (q31_t)0x5842dd54, (q31_t)0xa34bdf20, (q31_t)0x571deefa, (q31_t)0xa2386284,
-  (q31_t)0x55f5a4d2, (q31_t)0xa1288376, (q31_t)0x54ca0a4b, (q31_t)0xa01c4c73, (q31_t)0x539b2af0, (q31_t)0x9f13c7d0, (q31_t)0x5269126e, (q31_t)0x9e0effc1,
-  (q31_t)0x5133cc94, (q31_t)0x9d0dfe54, (q31_t)0x4ffb654d, (q31_t)0x9c10cd70, (q31_t)0x4ebfe8a5, (q31_t)0x9b1776da, (q31_t)0x4d8162c4, (q31_t)0x9a22042d,
-  (q31_t)0x4c3fdff4, (q31_t)0x99307ee0, (q31_t)0x4afb6c98, (q31_t)0x9842f043, (q31_t)0x49b41533, (q31_t)0x9759617f, (q31_t)0x4869e665, (q31_t)0x9673db94,
-  (q31_t)0x471cece7, (q31_t)0x9592675c, (q31_t)0x45cd358f, (q31_t)0x94b50d87, (q31_t)0x447acd50, (q31_t)0x93dbd6a0, (q31_t)0x4325c135, (q31_t)0x9306cb04,
-  (q31_t)0x41ce1e65, (q31_t)0x9235f2ec, (q31_t)0x4073f21d, (q31_t)0x91695663, (q31_t)0x3f1749b8, (q31_t)0x90a0fd4e, (q31_t)0x3db832a6, (q31_t)0x8fdcef66,
-  (q31_t)0x3c56ba70, (q31_t)0x8f1d343a, (q31_t)0x3af2eeb7, (q31_t)0x8e61d32e, (q31_t)0x398cdd32, (q31_t)0x8daad37b, (q31_t)0x382493b0, (q31_t)0x8cf83c30,
-  (q31_t)0x36ba2014, (q31_t)0x8c4a142f, (q31_t)0x354d9057, (q31_t)0x8ba0622f, (q31_t)0x33def287, (q31_t)0x8afb2cbb, (q31_t)0x326e54c7, (q31_t)0x8a5a7a31,
-  (q31_t)0x30fbc54d, (q31_t)0x89be50c3, (q31_t)0x2f875262, (q31_t)0x8926b677, (q31_t)0x2e110a62, (q31_t)0x8893b125, (q31_t)0x2c98fbba, (q31_t)0x88054677,
-  (q31_t)0x2b1f34eb, (q31_t)0x877b7bec, (q31_t)0x29a3c485, (q31_t)0x86f656d3, (q31_t)0x2826b928, (q31_t)0x8675dc4f, (q31_t)0x26a82186, (q31_t)0x85fa1153,
-  (q31_t)0x25280c5e, (q31_t)0x8582faa5, (q31_t)0x23a6887f, (q31_t)0x85109cdd, (q31_t)0x2223a4c5, (q31_t)0x84a2fc62, (q31_t)0x209f701c, (q31_t)0x843a1d70,
-  (q31_t)0x1f19f97b, (q31_t)0x83d60412, (q31_t)0x1d934fe5, (q31_t)0x8376b422, (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1a82a026, (q31_t)0x82c67f14,
-  (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x145576b1, (q31_t)0x81a01b6d,
-  (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0xfab272b, (q31_t)0x80f66e3c, (q31_t)0xe1bc2e4, (q31_t)0x80c7a80a,
-  (q31_t)0xc8bd35e, (q31_t)0x809dc971, (q31_t)0xafb6805, (q31_t)0x8078d40d, (q31_t)0x96a9049, (q31_t)0x8058c94c, (q31_t)0x7d95b9e, (q31_t)0x803daa6a,
-  (q31_t)0x647d97c, (q31_t)0x80277872, (q31_t)0x4b6195d, (q31_t)0x80163440, (q31_t)0x3242abf, (q31_t)0x8009de7e, (q31_t)0x1921d20, (q31_t)0x800277a6
-};
-
-static const q31_t WeightsQ31_512[1024] = {
-  (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7fffd886, (q31_t)0xff9b781d, (q31_t)0x7fff6216, (q31_t)0xff36f078, (q31_t)0x7ffe9cb2, (q31_t)0xfed2694f,
-  (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ffc250f, (q31_t)0xfe095d69, (q31_t)0x7ffa72d1, (q31_t)0xfda4d929, (q31_t)0x7ff871a2, (q31_t)0xfd40565c,
-  (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7ff38274, (q31_t)0xfc775616, (q31_t)0x7ff09478, (q31_t)0xfc12d91a, (q31_t)0x7fed5791, (q31_t)0xfbae5e89,
-  (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3, (q31_t)0x7fe5f108, (q31_t)0xfae571a4, (q31_t)0x7fe1c76b, (q31_t)0xfa80ffcb, (q31_t)0x7fdd4eec, (q31_t)0xfa1c9157,
-  (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fd37153, (q31_t)0xf953bf91, (q31_t)0x7fce0c3e, (q31_t)0xf8ef5cbb, (q31_t)0x7fc85854, (q31_t)0xf88afe42,
-  (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fbc040a, (q31_t)0xf7c24f59, (q31_t)0x7fb563b3, (q31_t)0xf75dff66, (q31_t)0x7fae7495, (q31_t)0xf6f9b4c6,
-  (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7f9faa15, (q31_t)0xf6313077, (q31_t)0x7f97cebd, (q31_t)0xf5ccf743, (q31_t)0x7f8fa4b0, (q31_t)0xf568c45b,
-  (q31_t)0x7f872bf3, (q31_t)0xf50497fb, (q31_t)0x7f7e648c, (q31_t)0xf4a07261, (q31_t)0x7f754e80, (q31_t)0xf43c53cb, (q31_t)0x7f6be9d4, (q31_t)0xf3d83c77,
-  (q31_t)0x7f62368f, (q31_t)0xf3742ca2, (q31_t)0x7f5834b7, (q31_t)0xf310248a, (q31_t)0x7f4de451, (q31_t)0xf2ac246e, (q31_t)0x7f434563, (q31_t)0xf2482c8a,
-  (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c, (q31_t)0x7f2d1c0e, (q31_t)0xf1805662, (q31_t)0x7f2191b4, (q31_t)0xf11c789a, (q31_t)0x7f15b8ee, (q31_t)0xf0b8a401,
-  (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7efd1c3c, (q31_t)0xeff11753, (q31_t)0x7ef05860, (q31_t)0xef8d5fb8, (q31_t)0x7ee34636, (q31_t)0xef29b243,
-  (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31, (q31_t)0x7ec8371a, (q31_t)0xee6276bf, (q31_t)0x7eba3a39, (q31_t)0xedfee92b, (q31_t)0x7eabef2c, (q31_t)0xed9b66b2,
-  (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e8e6eb2, (q31_t)0xecd48407, (q31_t)0x7e7f3957, (q31_t)0xec71244f, (q31_t)0x7e6fb5f4, (q31_t)0xec0dd0a8,
-  (q31_t)0x7e5fe493, (q31_t)0xebaa894f, (q31_t)0x7e4fc53e, (q31_t)0xeb474e81, (q31_t)0x7e3f57ff, (q31_t)0xeae4207a, (q31_t)0x7e2e9cdf, (q31_t)0xea80ff7a,
-  (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7e0c3d29, (q31_t)0xe9bae57d, (q31_t)0x7dfa98a8, (q31_t)0xe957ecfb, (q31_t)0x7de8a670, (q31_t)0xe8f50273,
-  (q31_t)0x7dd6668f, (q31_t)0xe8922622, (q31_t)0x7dc3d90d, (q31_t)0xe82f5844, (q31_t)0x7db0fdf8, (q31_t)0xe7cc9917, (q31_t)0x7d9dd55a, (q31_t)0xe769e8d8,
-  (q31_t)0x7d8a5f40, (q31_t)0xe70747c4, (q31_t)0x7d769bb5, (q31_t)0xe6a4b616, (q31_t)0x7d628ac6, (q31_t)0xe642340d, (q31_t)0x7d4e2c7f, (q31_t)0xe5dfc1e5,
-  (q31_t)0x7d3980ec, (q31_t)0xe57d5fda, (q31_t)0x7d24881b, (q31_t)0xe51b0e2a, (q31_t)0x7d0f4218, (q31_t)0xe4b8cd11, (q31_t)0x7cf9aef0, (q31_t)0xe4569ccb,
-  (q31_t)0x7ce3ceb2, (q31_t)0xe3f47d96, (q31_t)0x7ccda169, (q31_t)0xe3926fad, (q31_t)0x7cb72724, (q31_t)0xe330734d, (q31_t)0x7ca05ff1, (q31_t)0xe2ce88b3,
-  (q31_t)0x7c894bde, (q31_t)0xe26cb01b, (q31_t)0x7c71eaf9, (q31_t)0xe20ae9c1, (q31_t)0x7c5a3d50, (q31_t)0xe1a935e2, (q31_t)0x7c4242f2, (q31_t)0xe14794ba,
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-  (q31_t)0x3db832a6, (q31_t)0x8fdcef66, (q31_t)0x3d600d2c, (q31_t)0x8fac988f, (q31_t)0x3d07c1d6, (q31_t)0x8f7c8701, (q31_t)0x3caf50da, (q31_t)0x8f4cbadb,
-  (q31_t)0x3c56ba70, (q31_t)0x8f1d343a, (q31_t)0x3bfdfecd, (q31_t)0x8eedf33b, (q31_t)0x3ba51e29, (q31_t)0x8ebef7fb, (q31_t)0x3b4c18ba, (q31_t)0x8e904298,
-  (q31_t)0x3af2eeb7, (q31_t)0x8e61d32e, (q31_t)0x3a99a057, (q31_t)0x8e33a9da, (q31_t)0x3a402dd2, (q31_t)0x8e05c6b7, (q31_t)0x39e6975e, (q31_t)0x8dd829e4,
-  (q31_t)0x398cdd32, (q31_t)0x8daad37b, (q31_t)0x3932ff87, (q31_t)0x8d7dc399, (q31_t)0x38d8fe93, (q31_t)0x8d50fa59, (q31_t)0x387eda8e, (q31_t)0x8d2477d8,
-  (q31_t)0x382493b0, (q31_t)0x8cf83c30, (q31_t)0x37ca2a30, (q31_t)0x8ccc477d, (q31_t)0x376f9e46, (q31_t)0x8ca099da, (q31_t)0x3714f02a, (q31_t)0x8c753362,
-  (q31_t)0x36ba2014, (q31_t)0x8c4a142f, (q31_t)0x365f2e3b, (q31_t)0x8c1f3c5d, (q31_t)0x36041ad9, (q31_t)0x8bf4ac05, (q31_t)0x35a8e625, (q31_t)0x8bca6343,
-  (q31_t)0x354d9057, (q31_t)0x8ba0622f, (q31_t)0x34f219a8, (q31_t)0x8b76a8e4, (q31_t)0x34968250, (q31_t)0x8b4d377c, (q31_t)0x343aca87, (q31_t)0x8b240e11,
-  (q31_t)0x33def287, (q31_t)0x8afb2cbb, (q31_t)0x3382fa88, (q31_t)0x8ad29394, (q31_t)0x3326e2c3, (q31_t)0x8aaa42b4, (q31_t)0x32caab6f, (q31_t)0x8a823a36,
-  (q31_t)0x326e54c7, (q31_t)0x8a5a7a31, (q31_t)0x3211df04, (q31_t)0x8a3302be, (q31_t)0x31b54a5e, (q31_t)0x8a0bd3f5, (q31_t)0x3158970e, (q31_t)0x89e4edef,
-  (q31_t)0x30fbc54d, (q31_t)0x89be50c3, (q31_t)0x309ed556, (q31_t)0x8997fc8a, (q31_t)0x3041c761, (q31_t)0x8971f15a, (q31_t)0x2fe49ba7, (q31_t)0x894c2f4c,
-  (q31_t)0x2f875262, (q31_t)0x8926b677, (q31_t)0x2f29ebcc, (q31_t)0x890186f2, (q31_t)0x2ecc681e, (q31_t)0x88dca0d3, (q31_t)0x2e6ec792, (q31_t)0x88b80432,
-  (q31_t)0x2e110a62, (q31_t)0x8893b125, (q31_t)0x2db330c7, (q31_t)0x886fa7c2, (q31_t)0x2d553afc, (q31_t)0x884be821, (q31_t)0x2cf72939, (q31_t)0x88287256,
-  (q31_t)0x2c98fbba, (q31_t)0x88054677, (q31_t)0x2c3ab2b9, (q31_t)0x87e2649b, (q31_t)0x2bdc4e6f, (q31_t)0x87bfccd7, (q31_t)0x2b7dcf17, (q31_t)0x879d7f41,
-  (q31_t)0x2b1f34eb, (q31_t)0x877b7bec, (q31_t)0x2ac08026, (q31_t)0x8759c2ef, (q31_t)0x2a61b101, (q31_t)0x8738545e, (q31_t)0x2a02c7b8, (q31_t)0x8717304e,
-  (q31_t)0x29a3c485, (q31_t)0x86f656d3, (q31_t)0x2944a7a2, (q31_t)0x86d5c802, (q31_t)0x28e5714b, (q31_t)0x86b583ee, (q31_t)0x288621b9, (q31_t)0x86958aac,
-  (q31_t)0x2826b928, (q31_t)0x8675dc4f, (q31_t)0x27c737d3, (q31_t)0x865678eb, (q31_t)0x27679df4, (q31_t)0x86376092, (q31_t)0x2707ebc7, (q31_t)0x86189359,
-  (q31_t)0x26a82186, (q31_t)0x85fa1153, (q31_t)0x26483f6c, (q31_t)0x85dbda91, (q31_t)0x25e845b6, (q31_t)0x85bdef28, (q31_t)0x2588349d, (q31_t)0x85a04f28,
-  (q31_t)0x25280c5e, (q31_t)0x8582faa5, (q31_t)0x24c7cd33, (q31_t)0x8565f1b0, (q31_t)0x24677758, (q31_t)0x8549345c, (q31_t)0x24070b08, (q31_t)0x852cc2bb,
-  (q31_t)0x23a6887f, (q31_t)0x85109cdd, (q31_t)0x2345eff8, (q31_t)0x84f4c2d4, (q31_t)0x22e541af, (q31_t)0x84d934b1, (q31_t)0x22847de0, (q31_t)0x84bdf286,
-  (q31_t)0x2223a4c5, (q31_t)0x84a2fc62, (q31_t)0x21c2b69c, (q31_t)0x84885258, (q31_t)0x2161b3a0, (q31_t)0x846df477, (q31_t)0x21009c0c, (q31_t)0x8453e2cf,
-  (q31_t)0x209f701c, (q31_t)0x843a1d70, (q31_t)0x203e300d, (q31_t)0x8420a46c, (q31_t)0x1fdcdc1b, (q31_t)0x840777d0, (q31_t)0x1f7b7481, (q31_t)0x83ee97ad,
-  (q31_t)0x1f19f97b, (q31_t)0x83d60412, (q31_t)0x1eb86b46, (q31_t)0x83bdbd0e, (q31_t)0x1e56ca1e, (q31_t)0x83a5c2b0, (q31_t)0x1df5163f, (q31_t)0x838e1507,
-  (q31_t)0x1d934fe5, (q31_t)0x8376b422, (q31_t)0x1d31774d, (q31_t)0x835fa00f, (q31_t)0x1ccf8cb3, (q31_t)0x8348d8dc, (q31_t)0x1c6d9053, (q31_t)0x83325e97,
-  (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1ba96335, (q31_t)0x83065110, (q31_t)0x1b4732ef, (q31_t)0x82f0bde8, (q31_t)0x1ae4f1d6, (q31_t)0x82db77e5,
-  (q31_t)0x1a82a026, (q31_t)0x82c67f14, (q31_t)0x1a203e1b, (q31_t)0x82b1d381, (q31_t)0x19bdcbf3, (q31_t)0x829d753a, (q31_t)0x195b49ea, (q31_t)0x8289644b,
-  (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x18961728, (q31_t)0x82622aa6, (q31_t)0x183366e9, (q31_t)0x824f0208, (q31_t)0x17d0a7bc, (q31_t)0x823c26f3,
-  (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x170afd8d, (q31_t)0x82175990, (q31_t)0x16a81305, (q31_t)0x82056758, (q31_t)0x16451a83, (q31_t)0x81f3c2d7,
-  (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x157f0086, (q31_t)0x81d16321, (q31_t)0x151bdf86, (q31_t)0x81c0a801, (q31_t)0x14b8b17f, (q31_t)0x81b03ac2,
-  (q31_t)0x145576b1, (q31_t)0x81a01b6d, (q31_t)0x13f22f58, (q31_t)0x81904a0c, (q31_t)0x138edbb1, (q31_t)0x8180c6a9, (q31_t)0x132b7bf9, (q31_t)0x8171914e,
-  (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x1264994e, (q31_t)0x815410d4, (q31_t)0x120116d5, (q31_t)0x8145c5c7, (q31_t)0x119d8941, (q31_t)0x8137c8e6,
-  (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x10d64dbd, (q31_t)0x811cb9ca, (q31_t)0x1072a048, (q31_t)0x810fa7a0, (q31_t)0x100ee8ad, (q31_t)0x8102e3c4,
-  (q31_t)0xfab272b, (q31_t)0x80f66e3c, (q31_t)0xf475bff, (q31_t)0x80ea4712, (q31_t)0xee38766, (q31_t)0x80de6e4c, (q31_t)0xe7fa99e, (q31_t)0x80d2e3f2,
-  (q31_t)0xe1bc2e4, (q31_t)0x80c7a80a, (q31_t)0xdb7d376, (q31_t)0x80bcba9d, (q31_t)0xd53db92, (q31_t)0x80b21baf, (q31_t)0xcefdb76, (q31_t)0x80a7cb49,
-  (q31_t)0xc8bd35e, (q31_t)0x809dc971, (q31_t)0xc27c389, (q31_t)0x8094162c, (q31_t)0xbc3ac35, (q31_t)0x808ab180, (q31_t)0xb5f8d9f, (q31_t)0x80819b74,
-  (q31_t)0xafb6805, (q31_t)0x8078d40d, (q31_t)0xa973ba5, (q31_t)0x80705b50, (q31_t)0xa3308bd, (q31_t)0x80683143, (q31_t)0x9cecf89, (q31_t)0x806055eb,
-  (q31_t)0x96a9049, (q31_t)0x8058c94c, (q31_t)0x9064b3a, (q31_t)0x80518b6b, (q31_t)0x8a2009a, (q31_t)0x804a9c4d, (q31_t)0x83db0a7, (q31_t)0x8043fbf6,
-  (q31_t)0x7d95b9e, (q31_t)0x803daa6a, (q31_t)0x77501be, (q31_t)0x8037a7ac, (q31_t)0x710a345, (q31_t)0x8031f3c2, (q31_t)0x6ac406f, (q31_t)0x802c8ead,
-  (q31_t)0x647d97c, (q31_t)0x80277872, (q31_t)0x5e36ea9, (q31_t)0x8022b114, (q31_t)0x57f0035, (q31_t)0x801e3895, (q31_t)0x51a8e5c, (q31_t)0x801a0ef8,
-  (q31_t)0x4b6195d, (q31_t)0x80163440, (q31_t)0x451a177, (q31_t)0x8012a86f, (q31_t)0x3ed26e6, (q31_t)0x800f6b88, (q31_t)0x388a9ea, (q31_t)0x800c7d8c,
-  (q31_t)0x3242abf, (q31_t)0x8009de7e, (q31_t)0x2bfa9a4, (q31_t)0x80078e5e, (q31_t)0x25b26d7, (q31_t)0x80058d2f, (q31_t)0x1f6a297, (q31_t)0x8003daf1,
-  (q31_t)0x1921d20, (q31_t)0x800277a6, (q31_t)0x12d96b1, (q31_t)0x8001634e, (q31_t)0xc90f88, (q31_t)0x80009dea, (q31_t)0x6487e3, (q31_t)0x8000277a
-};
-
-static const q31_t WeightsQ31_2048[4096] = {
-  (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7ffffd88, (q31_t)0xffe6de05, (q31_t)0x7ffff621, (q31_t)0xffcdbc0b, (q31_t)0x7fffe9cb, (q31_t)0xffb49a12,
-  (q31_t)0x7fffd886, (q31_t)0xff9b781d, (q31_t)0x7fffc251, (q31_t)0xff82562c, (q31_t)0x7fffa72c, (q31_t)0xff69343f, (q31_t)0x7fff8719, (q31_t)0xff501258,
-  (q31_t)0x7fff6216, (q31_t)0xff36f078, (q31_t)0x7fff3824, (q31_t)0xff1dcea0, (q31_t)0x7fff0943, (q31_t)0xff04acd0, (q31_t)0x7ffed572, (q31_t)0xfeeb8b0a,
-  (q31_t)0x7ffe9cb2, (q31_t)0xfed2694f, (q31_t)0x7ffe5f03, (q31_t)0xfeb947a0, (q31_t)0x7ffe1c65, (q31_t)0xfea025fd, (q31_t)0x7ffdd4d7, (q31_t)0xfe870467,
-  (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ffd36ee, (q31_t)0xfe54c169, (q31_t)0x7ffce093, (q31_t)0xfe3ba002, (q31_t)0x7ffc8549, (q31_t)0xfe227eac,
-  (q31_t)0x7ffc250f, (q31_t)0xfe095d69, (q31_t)0x7ffbbfe6, (q31_t)0xfdf03c3a, (q31_t)0x7ffb55ce, (q31_t)0xfdd71b1e, (q31_t)0x7ffae6c7, (q31_t)0xfdbdfa18,
-  (q31_t)0x7ffa72d1, (q31_t)0xfda4d929, (q31_t)0x7ff9f9ec, (q31_t)0xfd8bb850, (q31_t)0x7ff97c18, (q31_t)0xfd729790, (q31_t)0x7ff8f954, (q31_t)0xfd5976e9,
-  (q31_t)0x7ff871a2, (q31_t)0xfd40565c, (q31_t)0x7ff7e500, (q31_t)0xfd2735ea, (q31_t)0x7ff75370, (q31_t)0xfd0e1594, (q31_t)0x7ff6bcf0, (q31_t)0xfcf4f55c,
-  (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7ff58125, (q31_t)0xfcc2b545, (q31_t)0x7ff4dbd9, (q31_t)0xfca9956a, (q31_t)0x7ff4319d, (q31_t)0xfc9075af,
-  (q31_t)0x7ff38274, (q31_t)0xfc775616, (q31_t)0x7ff2ce5b, (q31_t)0xfc5e36a0, (q31_t)0x7ff21553, (q31_t)0xfc45174e, (q31_t)0x7ff1575d, (q31_t)0xfc2bf821,
-  (q31_t)0x7ff09478, (q31_t)0xfc12d91a, (q31_t)0x7fefcca4, (q31_t)0xfbf9ba39, (q31_t)0x7feeffe1, (q31_t)0xfbe09b80, (q31_t)0x7fee2e30, (q31_t)0xfbc77cf0,
-  (q31_t)0x7fed5791, (q31_t)0xfbae5e89, (q31_t)0x7fec7c02, (q31_t)0xfb95404d, (q31_t)0x7feb9b85, (q31_t)0xfb7c223d, (q31_t)0x7feab61a, (q31_t)0xfb630459,
-  (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3, (q31_t)0x7fe8dc78, (q31_t)0xfb30c91b, (q31_t)0x7fe7e841, (q31_t)0xfb17abc2, (q31_t)0x7fe6ef1c, (q31_t)0xfafe8e9b,
-  (q31_t)0x7fe5f108, (q31_t)0xfae571a4, (q31_t)0x7fe4ee06, (q31_t)0xfacc54e0, (q31_t)0x7fe3e616, (q31_t)0xfab3384f, (q31_t)0x7fe2d938, (q31_t)0xfa9a1bf3,
-  (q31_t)0x7fe1c76b, (q31_t)0xfa80ffcb, (q31_t)0x7fe0b0b1, (q31_t)0xfa67e3da, (q31_t)0x7fdf9508, (q31_t)0xfa4ec821, (q31_t)0x7fde7471, (q31_t)0xfa35ac9f,
-  (q31_t)0x7fdd4eec, (q31_t)0xfa1c9157, (q31_t)0x7fdc247a, (q31_t)0xfa037648, (q31_t)0x7fdaf519, (q31_t)0xf9ea5b75, (q31_t)0x7fd9c0ca, (q31_t)0xf9d140de,
-  (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fd74964, (q31_t)0xf99f0c68, (q31_t)0x7fd6064c, (q31_t)0xf985f28a, (q31_t)0x7fd4be46, (q31_t)0xf96cd8ed,
-  (q31_t)0x7fd37153, (q31_t)0xf953bf91, (q31_t)0x7fd21f72, (q31_t)0xf93aa676, (q31_t)0x7fd0c8a3, (q31_t)0xf9218d9e, (q31_t)0x7fcf6ce8, (q31_t)0xf908750a,
-  (q31_t)0x7fce0c3e, (q31_t)0xf8ef5cbb, (q31_t)0x7fcca6a7, (q31_t)0xf8d644b2, (q31_t)0x7fcb3c23, (q31_t)0xf8bd2cef, (q31_t)0x7fc9ccb2, (q31_t)0xf8a41574,
-  (q31_t)0x7fc85854, (q31_t)0xf88afe42, (q31_t)0x7fc6df08, (q31_t)0xf871e759, (q31_t)0x7fc560cf, (q31_t)0xf858d0bb, (q31_t)0x7fc3dda9, (q31_t)0xf83fba68,
-  (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fc0c896, (q31_t)0xf80d8ea9, (q31_t)0x7fbf36aa, (q31_t)0xf7f4793e, (q31_t)0x7fbd9fd0, (q31_t)0xf7db6423,
-  (q31_t)0x7fbc040a, (q31_t)0xf7c24f59, (q31_t)0x7fba6357, (q31_t)0xf7a93ae0, (q31_t)0x7fb8bdb8, (q31_t)0xf79026b9, (q31_t)0x7fb7132b, (q31_t)0xf77712e5,
-  (q31_t)0x7fb563b3, (q31_t)0xf75dff66, (q31_t)0x7fb3af4e, (q31_t)0xf744ec3b, (q31_t)0x7fb1f5fc, (q31_t)0xf72bd967, (q31_t)0x7fb037bf, (q31_t)0xf712c6ea,
-  (q31_t)0x7fae7495, (q31_t)0xf6f9b4c6, (q31_t)0x7facac7f, (q31_t)0xf6e0a2fa, (q31_t)0x7faadf7c, (q31_t)0xf6c79188, (q31_t)0x7fa90d8e, (q31_t)0xf6ae8071,
-  (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7fa55aee, (q31_t)0xf67c5f59, (q31_t)0x7fa37a3c, (q31_t)0xf6634f59, (q31_t)0x7fa1949e, (q31_t)0xf64a3fb8,
-  (q31_t)0x7f9faa15, (q31_t)0xf6313077, (q31_t)0x7f9dbaa0, (q31_t)0xf6182196, (q31_t)0x7f9bc640, (q31_t)0xf5ff1318, (q31_t)0x7f99ccf4, (q31_t)0xf5e604fc,
-  (q31_t)0x7f97cebd, (q31_t)0xf5ccf743, (q31_t)0x7f95cb9a, (q31_t)0xf5b3e9f0, (q31_t)0x7f93c38c, (q31_t)0xf59add02, (q31_t)0x7f91b694, (q31_t)0xf581d07b,
-  (q31_t)0x7f8fa4b0, (q31_t)0xf568c45b, (q31_t)0x7f8d8de1, (q31_t)0xf54fb8a4, (q31_t)0x7f8b7227, (q31_t)0xf536ad56, (q31_t)0x7f895182, (q31_t)0xf51da273,
-  (q31_t)0x7f872bf3, (q31_t)0xf50497fb, (q31_t)0x7f850179, (q31_t)0xf4eb8def, (q31_t)0x7f82d214, (q31_t)0xf4d28451, (q31_t)0x7f809dc5, (q31_t)0xf4b97b21,
-  (q31_t)0x7f7e648c, (q31_t)0xf4a07261, (q31_t)0x7f7c2668, (q31_t)0xf4876a10, (q31_t)0x7f79e35a, (q31_t)0xf46e6231, (q31_t)0x7f779b62, (q31_t)0xf4555ac5,
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-  (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1bf2fc3a, (q31_t)0x8316b205, (q31_t)0x1bda74f6, (q31_t)0x8311378d, (q31_t)0x1bc1ec9e, (q31_t)0x830bc1e6,
-  (q31_t)0x1ba96335, (q31_t)0x83065110, (q31_t)0x1b90d8bb, (q31_t)0x8300e50b, (q31_t)0x1b784d30, (q31_t)0x82fb7dd8, (q31_t)0x1b5fc097, (q31_t)0x82f61b77,
-  (q31_t)0x1b4732ef, (q31_t)0x82f0bde8, (q31_t)0x1b2ea43a, (q31_t)0x82eb652b, (q31_t)0x1b161479, (q31_t)0x82e61141, (q31_t)0x1afd83ad, (q31_t)0x82e0c22a,
-  (q31_t)0x1ae4f1d6, (q31_t)0x82db77e5, (q31_t)0x1acc5ef6, (q31_t)0x82d63274, (q31_t)0x1ab3cb0d, (q31_t)0x82d0f1d5, (q31_t)0x1a9b361d, (q31_t)0x82cbb60b,
-  (q31_t)0x1a82a026, (q31_t)0x82c67f14, (q31_t)0x1a6a0929, (q31_t)0x82c14cf1, (q31_t)0x1a517128, (q31_t)0x82bc1fa2, (q31_t)0x1a38d823, (q31_t)0x82b6f727,
-  (q31_t)0x1a203e1b, (q31_t)0x82b1d381, (q31_t)0x1a07a311, (q31_t)0x82acb4b0, (q31_t)0x19ef0707, (q31_t)0x82a79ab3, (q31_t)0x19d669fc, (q31_t)0x82a2858c,
-  (q31_t)0x19bdcbf3, (q31_t)0x829d753a, (q31_t)0x19a52ceb, (q31_t)0x829869be, (q31_t)0x198c8ce7, (q31_t)0x82936317, (q31_t)0x1973ebe6, (q31_t)0x828e6146,
-  (q31_t)0x195b49ea, (q31_t)0x8289644b, (q31_t)0x1942a6f3, (q31_t)0x82846c26, (q31_t)0x192a0304, (q31_t)0x827f78d8, (q31_t)0x19115e1c, (q31_t)0x827a8a61,
-  (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x18e01167, (q31_t)0x8270bbf7, (q31_t)0x18c7699b, (q31_t)0x826bdc04, (q31_t)0x18aec0db, (q31_t)0x826700e9,
-  (q31_t)0x18961728, (q31_t)0x82622aa6, (q31_t)0x187d6c82, (q31_t)0x825d593a, (q31_t)0x1864c0ea, (q31_t)0x82588ca7, (q31_t)0x184c1461, (q31_t)0x8253c4eb,
-  (q31_t)0x183366e9, (q31_t)0x824f0208, (q31_t)0x181ab881, (q31_t)0x824a43fe, (q31_t)0x1802092c, (q31_t)0x82458acc, (q31_t)0x17e958ea, (q31_t)0x8240d673,
-  (q31_t)0x17d0a7bc, (q31_t)0x823c26f3, (q31_t)0x17b7f5a3, (q31_t)0x82377c4c, (q31_t)0x179f429f, (q31_t)0x8232d67f, (q31_t)0x17868eb3, (q31_t)0x822e358b,
-  (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x17552422, (q31_t)0x82250232, (q31_t)0x173c6d80, (q31_t)0x82206fcc, (q31_t)0x1723b5f9, (q31_t)0x821be240,
-  (q31_t)0x170afd8d, (q31_t)0x82175990, (q31_t)0x16f2443e, (q31_t)0x8212d5b9, (q31_t)0x16d98a0c, (q31_t)0x820e56be, (q31_t)0x16c0cef9, (q31_t)0x8209dc9e,
-  (q31_t)0x16a81305, (q31_t)0x82056758, (q31_t)0x168f5632, (q31_t)0x8200f6ef, (q31_t)0x1676987f, (q31_t)0x81fc8b60, (q31_t)0x165dd9f0, (q31_t)0x81f824ae,
-  (q31_t)0x16451a83, (q31_t)0x81f3c2d7, (q31_t)0x162c5a3b, (q31_t)0x81ef65dc, (q31_t)0x16139918, (q31_t)0x81eb0dbe, (q31_t)0x15fad71b, (q31_t)0x81e6ba7c,
-  (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x15c95097, (q31_t)0x81de228d, (q31_t)0x15b08c12, (q31_t)0x81d9dde1, (q31_t)0x1597c6b7, (q31_t)0x81d59e13,
-  (q31_t)0x157f0086, (q31_t)0x81d16321, (q31_t)0x15663982, (q31_t)0x81cd2d0c, (q31_t)0x154d71aa, (q31_t)0x81c8fbd6, (q31_t)0x1534a901, (q31_t)0x81c4cf7d,
-  (q31_t)0x151bdf86, (q31_t)0x81c0a801, (q31_t)0x1503153a, (q31_t)0x81bc8564, (q31_t)0x14ea4a1f, (q31_t)0x81b867a5, (q31_t)0x14d17e36, (q31_t)0x81b44ec4,
-  (q31_t)0x14b8b17f, (q31_t)0x81b03ac2, (q31_t)0x149fe3fc, (q31_t)0x81ac2b9e, (q31_t)0x148715ae, (q31_t)0x81a82159, (q31_t)0x146e4694, (q31_t)0x81a41bf4,
-  (q31_t)0x145576b1, (q31_t)0x81a01b6d, (q31_t)0x143ca605, (q31_t)0x819c1fc5, (q31_t)0x1423d492, (q31_t)0x819828fd, (q31_t)0x140b0258, (q31_t)0x81943715,
-  (q31_t)0x13f22f58, (q31_t)0x81904a0c, (q31_t)0x13d95b93, (q31_t)0x818c61e3, (q31_t)0x13c0870a, (q31_t)0x81887e9a, (q31_t)0x13a7b1bf, (q31_t)0x8184a032,
-  (q31_t)0x138edbb1, (q31_t)0x8180c6a9, (q31_t)0x137604e2, (q31_t)0x817cf201, (q31_t)0x135d2d53, (q31_t)0x8179223a, (q31_t)0x13445505, (q31_t)0x81755754,
-  (q31_t)0x132b7bf9, (q31_t)0x8171914e, (q31_t)0x1312a230, (q31_t)0x816dd02a, (q31_t)0x12f9c7aa, (q31_t)0x816a13e6, (q31_t)0x12e0ec6a, (q31_t)0x81665c84,
-  (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x12af33ba, (q31_t)0x815efc65, (q31_t)0x1296564d, (q31_t)0x815b53a8, (q31_t)0x127d7829, (q31_t)0x8157afcd,
-  (q31_t)0x1264994e, (q31_t)0x815410d4, (q31_t)0x124bb9be, (q31_t)0x815076bd, (q31_t)0x1232d979, (q31_t)0x814ce188, (q31_t)0x1219f880, (q31_t)0x81495136,
-  (q31_t)0x120116d5, (q31_t)0x8145c5c7, (q31_t)0x11e83478, (q31_t)0x81423f3a, (q31_t)0x11cf516a, (q31_t)0x813ebd90, (q31_t)0x11b66dad, (q31_t)0x813b40ca,
-  (q31_t)0x119d8941, (q31_t)0x8137c8e6, (q31_t)0x1184a427, (q31_t)0x813455e6, (q31_t)0x116bbe60, (q31_t)0x8130e7c9, (q31_t)0x1152d7ed, (q31_t)0x812d7e8f,
-  (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x11210907, (q31_t)0x8126bac8, (q31_t)0x11082096, (q31_t)0x8123603a, (q31_t)0x10ef377d, (q31_t)0x81200a90,
-  (q31_t)0x10d64dbd, (q31_t)0x811cb9ca, (q31_t)0x10bd6356, (q31_t)0x81196de9, (q31_t)0x10a4784b, (q31_t)0x811626ec, (q31_t)0x108b8c9b, (q31_t)0x8112e4d4,
-  (q31_t)0x1072a048, (q31_t)0x810fa7a0, (q31_t)0x1059b352, (q31_t)0x810c6f52, (q31_t)0x1040c5bb, (q31_t)0x81093be8, (q31_t)0x1027d784, (q31_t)0x81060d63,
-  (q31_t)0x100ee8ad, (q31_t)0x8102e3c4, (q31_t)0xff5f938, (q31_t)0x80ffbf0a, (q31_t)0xfdd0926, (q31_t)0x80fc9f35, (q31_t)0xfc41876, (q31_t)0x80f98446,
-  (q31_t)0xfab272b, (q31_t)0x80f66e3c, (q31_t)0xf923546, (q31_t)0x80f35d19, (q31_t)0xf7942c7, (q31_t)0x80f050db, (q31_t)0xf604faf, (q31_t)0x80ed4984,
-  (q31_t)0xf475bff, (q31_t)0x80ea4712, (q31_t)0xf2e67b8, (q31_t)0x80e74987, (q31_t)0xf1572dc, (q31_t)0x80e450e2, (q31_t)0xefc7d6b, (q31_t)0x80e15d24,
-  (q31_t)0xee38766, (q31_t)0x80de6e4c, (q31_t)0xeca90ce, (q31_t)0x80db845b, (q31_t)0xeb199a4, (q31_t)0x80d89f51, (q31_t)0xe98a1e9, (q31_t)0x80d5bf2e,
-  (q31_t)0xe7fa99e, (q31_t)0x80d2e3f2, (q31_t)0xe66b0c3, (q31_t)0x80d00d9d, (q31_t)0xe4db75b, (q31_t)0x80cd3c2f, (q31_t)0xe34bd66, (q31_t)0x80ca6fa9,
-  (q31_t)0xe1bc2e4, (q31_t)0x80c7a80a, (q31_t)0xe02c7d7, (q31_t)0x80c4e553, (q31_t)0xde9cc40, (q31_t)0x80c22784, (q31_t)0xdd0d01f, (q31_t)0x80bf6e9c,
-  (q31_t)0xdb7d376, (q31_t)0x80bcba9d, (q31_t)0xd9ed646, (q31_t)0x80ba0b85, (q31_t)0xd85d88f, (q31_t)0x80b76156, (q31_t)0xd6cda53, (q31_t)0x80b4bc0e,
-  (q31_t)0xd53db92, (q31_t)0x80b21baf, (q31_t)0xd3adc4e, (q31_t)0x80af8039, (q31_t)0xd21dc87, (q31_t)0x80ace9ab, (q31_t)0xd08dc3f, (q31_t)0x80aa5806,
-  (q31_t)0xcefdb76, (q31_t)0x80a7cb49, (q31_t)0xcd6da2d, (q31_t)0x80a54376, (q31_t)0xcbdd865, (q31_t)0x80a2c08b, (q31_t)0xca4d620, (q31_t)0x80a04289,
-  (q31_t)0xc8bd35e, (q31_t)0x809dc971, (q31_t)0xc72d020, (q31_t)0x809b5541, (q31_t)0xc59cc68, (q31_t)0x8098e5fb, (q31_t)0xc40c835, (q31_t)0x80967b9f,
-  (q31_t)0xc27c389, (q31_t)0x8094162c, (q31_t)0xc0ebe66, (q31_t)0x8091b5a2, (q31_t)0xbf5b8cb, (q31_t)0x808f5a02, (q31_t)0xbdcb2bb, (q31_t)0x808d034c,
-  (q31_t)0xbc3ac35, (q31_t)0x808ab180, (q31_t)0xbaaa53b, (q31_t)0x8088649e, (q31_t)0xb919dcf, (q31_t)0x80861ca6, (q31_t)0xb7895f0, (q31_t)0x8083d998,
-  (q31_t)0xb5f8d9f, (q31_t)0x80819b74, (q31_t)0xb4684df, (q31_t)0x807f623b, (q31_t)0xb2d7baf, (q31_t)0x807d2dec, (q31_t)0xb147211, (q31_t)0x807afe87,
-  (q31_t)0xafb6805, (q31_t)0x8078d40d, (q31_t)0xae25d8d, (q31_t)0x8076ae7e, (q31_t)0xac952aa, (q31_t)0x80748dd9, (q31_t)0xab0475c, (q31_t)0x8072721f,
-  (q31_t)0xa973ba5, (q31_t)0x80705b50, (q31_t)0xa7e2f85, (q31_t)0x806e496c, (q31_t)0xa6522fe, (q31_t)0x806c3c74, (q31_t)0xa4c1610, (q31_t)0x806a3466,
-  (q31_t)0xa3308bd, (q31_t)0x80683143, (q31_t)0xa19fb04, (q31_t)0x8066330c, (q31_t)0xa00ece8, (q31_t)0x806439c0, (q31_t)0x9e7de6a, (q31_t)0x80624560,
-  (q31_t)0x9cecf89, (q31_t)0x806055eb, (q31_t)0x9b5c048, (q31_t)0x805e6b62, (q31_t)0x99cb0a7, (q31_t)0x805c85c4, (q31_t)0x983a0a7, (q31_t)0x805aa512,
-  (q31_t)0x96a9049, (q31_t)0x8058c94c, (q31_t)0x9517f8f, (q31_t)0x8056f272, (q31_t)0x9386e78, (q31_t)0x80552084, (q31_t)0x91f5d06, (q31_t)0x80535381,
-  (q31_t)0x9064b3a, (q31_t)0x80518b6b, (q31_t)0x8ed3916, (q31_t)0x804fc841, (q31_t)0x8d42699, (q31_t)0x804e0a04, (q31_t)0x8bb13c5, (q31_t)0x804c50b2,
-  (q31_t)0x8a2009a, (q31_t)0x804a9c4d, (q31_t)0x888ed1b, (q31_t)0x8048ecd5, (q31_t)0x86fd947, (q31_t)0x80474248, (q31_t)0x856c520, (q31_t)0x80459ca9,
-  (q31_t)0x83db0a7, (q31_t)0x8043fbf6, (q31_t)0x8249bdd, (q31_t)0x80426030, (q31_t)0x80b86c2, (q31_t)0x8040c956, (q31_t)0x7f27157, (q31_t)0x803f376a,
-  (q31_t)0x7d95b9e, (q31_t)0x803daa6a, (q31_t)0x7c04598, (q31_t)0x803c2257, (q31_t)0x7a72f45, (q31_t)0x803a9f31, (q31_t)0x78e18a7, (q31_t)0x803920f8,
-  (q31_t)0x77501be, (q31_t)0x8037a7ac, (q31_t)0x75bea8c, (q31_t)0x8036334e, (q31_t)0x742d311, (q31_t)0x8034c3dd, (q31_t)0x729bb4e, (q31_t)0x80335959,
-  (q31_t)0x710a345, (q31_t)0x8031f3c2, (q31_t)0x6f78af6, (q31_t)0x80309318, (q31_t)0x6de7262, (q31_t)0x802f375d, (q31_t)0x6c5598a, (q31_t)0x802de08e,
-  (q31_t)0x6ac406f, (q31_t)0x802c8ead, (q31_t)0x6932713, (q31_t)0x802b41ba, (q31_t)0x67a0d76, (q31_t)0x8029f9b4, (q31_t)0x660f398, (q31_t)0x8028b69c,
-  (q31_t)0x647d97c, (q31_t)0x80277872, (q31_t)0x62ebf22, (q31_t)0x80263f36, (q31_t)0x615a48b, (q31_t)0x80250ae7, (q31_t)0x5fc89b8, (q31_t)0x8023db86,
-  (q31_t)0x5e36ea9, (q31_t)0x8022b114, (q31_t)0x5ca5361, (q31_t)0x80218b8f, (q31_t)0x5b137df, (q31_t)0x80206af8, (q31_t)0x5981c26, (q31_t)0x801f4f4f,
-  (q31_t)0x57f0035, (q31_t)0x801e3895, (q31_t)0x565e40d, (q31_t)0x801d26c8, (q31_t)0x54cc7b1, (q31_t)0x801c19ea, (q31_t)0x533ab20, (q31_t)0x801b11fa,
-  (q31_t)0x51a8e5c, (q31_t)0x801a0ef8, (q31_t)0x5017165, (q31_t)0x801910e4, (q31_t)0x4e8543e, (q31_t)0x801817bf, (q31_t)0x4cf36e5, (q31_t)0x80172388,
-  (q31_t)0x4b6195d, (q31_t)0x80163440, (q31_t)0x49cfba7, (q31_t)0x801549e6, (q31_t)0x483ddc3, (q31_t)0x8014647b, (q31_t)0x46abfb3, (q31_t)0x801383fe,
-  (q31_t)0x451a177, (q31_t)0x8012a86f, (q31_t)0x4388310, (q31_t)0x8011d1d0, (q31_t)0x41f6480, (q31_t)0x8011001f, (q31_t)0x40645c7, (q31_t)0x8010335c,
-  (q31_t)0x3ed26e6, (q31_t)0x800f6b88, (q31_t)0x3d407df, (q31_t)0x800ea8a3, (q31_t)0x3bae8b2, (q31_t)0x800deaad, (q31_t)0x3a1c960, (q31_t)0x800d31a5,
-  (q31_t)0x388a9ea, (q31_t)0x800c7d8c, (q31_t)0x36f8a51, (q31_t)0x800bce63, (q31_t)0x3566a96, (q31_t)0x800b2427, (q31_t)0x33d4abb, (q31_t)0x800a7edb,
-  (q31_t)0x3242abf, (q31_t)0x8009de7e, (q31_t)0x30b0aa4, (q31_t)0x80094310, (q31_t)0x2f1ea6c, (q31_t)0x8008ac90, (q31_t)0x2d8ca16, (q31_t)0x80081b00,
-  (q31_t)0x2bfa9a4, (q31_t)0x80078e5e, (q31_t)0x2a68917, (q31_t)0x800706ac, (q31_t)0x28d6870, (q31_t)0x800683e8, (q31_t)0x27447b0, (q31_t)0x80060614,
-  (q31_t)0x25b26d7, (q31_t)0x80058d2f, (q31_t)0x24205e8, (q31_t)0x80051939, (q31_t)0x228e4e2, (q31_t)0x8004aa32, (q31_t)0x20fc3c6, (q31_t)0x8004401a,
-  (q31_t)0x1f6a297, (q31_t)0x8003daf1, (q31_t)0x1dd8154, (q31_t)0x80037ab7, (q31_t)0x1c45ffe, (q31_t)0x80031f6d, (q31_t)0x1ab3e97, (q31_t)0x8002c912,
-  (q31_t)0x1921d20, (q31_t)0x800277a6, (q31_t)0x178fb99, (q31_t)0x80022b29, (q31_t)0x15fda03, (q31_t)0x8001e39b, (q31_t)0x146b860, (q31_t)0x8001a0fd,
-  (q31_t)0x12d96b1, (q31_t)0x8001634e, (q31_t)0x11474f6, (q31_t)0x80012a8e, (q31_t)0xfb5330, (q31_t)0x8000f6bd, (q31_t)0xe23160, (q31_t)0x8000c7dc,
-  (q31_t)0xc90f88, (q31_t)0x80009dea, (q31_t)0xafeda8, (q31_t)0x800078e7, (q31_t)0x96cbc1, (q31_t)0x800058d4, (q31_t)0x7da9d4, (q31_t)0x80003daf,
-  (q31_t)0x6487e3, (q31_t)0x8000277a, (q31_t)0x4b65ee, (q31_t)0x80001635, (q31_t)0x3243f5, (q31_t)0x800009df, (q31_t)0x1921fb, (q31_t)0x80000278
-};
-
-static const q31_t WeightsQ31_8192[16384] = {
-  (q31_t)0x7fffffff, (q31_t)0x0, (q31_t)0x7fffffd9, (q31_t)0xfff9b781, (q31_t)0x7fffff62, (q31_t)0xfff36f02, (q31_t)0x7ffffe9d,
-    (q31_t)0xffed2684,
-  (q31_t)0x7ffffd88, (q31_t)0xffe6de05, (q31_t)0x7ffffc25, (q31_t)0xffe09586, (q31_t)0x7ffffa73, (q31_t)0xffda4d08,
-    (q31_t)0x7ffff872, (q31_t)0xffd40489,
-  (q31_t)0x7ffff621, (q31_t)0xffcdbc0b, (q31_t)0x7ffff382, (q31_t)0xffc7738c, (q31_t)0x7ffff094, (q31_t)0xffc12b0e,
-    (q31_t)0x7fffed57, (q31_t)0xffbae290,
-  (q31_t)0x7fffe9cb, (q31_t)0xffb49a12, (q31_t)0x7fffe5f0, (q31_t)0xffae5195, (q31_t)0x7fffe1c6, (q31_t)0xffa80917,
-    (q31_t)0x7fffdd4d, (q31_t)0xffa1c09a,
-  (q31_t)0x7fffd886, (q31_t)0xff9b781d, (q31_t)0x7fffd36f, (q31_t)0xff952fa0, (q31_t)0x7fffce09, (q31_t)0xff8ee724,
-    (q31_t)0x7fffc854, (q31_t)0xff889ea7,
-  (q31_t)0x7fffc251, (q31_t)0xff82562c, (q31_t)0x7fffbbfe, (q31_t)0xff7c0db0, (q31_t)0x7fffb55c, (q31_t)0xff75c535,
-    (q31_t)0x7fffae6c, (q31_t)0xff6f7cba,
-  (q31_t)0x7fffa72c, (q31_t)0xff69343f, (q31_t)0x7fff9f9e, (q31_t)0xff62ebc5, (q31_t)0x7fff97c1, (q31_t)0xff5ca34b,
-    (q31_t)0x7fff8f94, (q31_t)0xff565ad1,
-  (q31_t)0x7fff8719, (q31_t)0xff501258, (q31_t)0x7fff7e4f, (q31_t)0xff49c9df, (q31_t)0x7fff7536, (q31_t)0xff438167,
-    (q31_t)0x7fff6bcd, (q31_t)0xff3d38ef,
-  (q31_t)0x7fff6216, (q31_t)0xff36f078, (q31_t)0x7fff5810, (q31_t)0xff30a801, (q31_t)0x7fff4dbb, (q31_t)0xff2a5f8b,
-    (q31_t)0x7fff4317, (q31_t)0xff241715,
-  (q31_t)0x7fff3824, (q31_t)0xff1dcea0, (q31_t)0x7fff2ce2, (q31_t)0xff17862b, (q31_t)0x7fff2151, (q31_t)0xff113db7,
-    (q31_t)0x7fff1572, (q31_t)0xff0af543,
-  (q31_t)0x7fff0943, (q31_t)0xff04acd0, (q31_t)0x7ffefcc5, (q31_t)0xfefe645e, (q31_t)0x7ffeeff8, (q31_t)0xfef81bec,
-    (q31_t)0x7ffee2dd, (q31_t)0xfef1d37b,
-  (q31_t)0x7ffed572, (q31_t)0xfeeb8b0a, (q31_t)0x7ffec7b9, (q31_t)0xfee5429a, (q31_t)0x7ffeb9b0, (q31_t)0xfedefa2b,
-    (q31_t)0x7ffeab59, (q31_t)0xfed8b1bd,
-  (q31_t)0x7ffe9cb2, (q31_t)0xfed2694f, (q31_t)0x7ffe8dbd, (q31_t)0xfecc20e2, (q31_t)0x7ffe7e79, (q31_t)0xfec5d876,
-    (q31_t)0x7ffe6ee5, (q31_t)0xfebf900a,
-  (q31_t)0x7ffe5f03, (q31_t)0xfeb947a0, (q31_t)0x7ffe4ed2, (q31_t)0xfeb2ff36, (q31_t)0x7ffe3e52, (q31_t)0xfeacb6cc,
-    (q31_t)0x7ffe2d83, (q31_t)0xfea66e64,
-  (q31_t)0x7ffe1c65, (q31_t)0xfea025fd, (q31_t)0x7ffe0af8, (q31_t)0xfe99dd96, (q31_t)0x7ffdf93c, (q31_t)0xfe939530,
-    (q31_t)0x7ffde731, (q31_t)0xfe8d4ccb,
-  (q31_t)0x7ffdd4d7, (q31_t)0xfe870467, (q31_t)0x7ffdc22e, (q31_t)0xfe80bc04, (q31_t)0x7ffdaf37, (q31_t)0xfe7a73a2,
-    (q31_t)0x7ffd9bf0, (q31_t)0xfe742b41,
-  (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ffd7476, (q31_t)0xfe679a81, (q31_t)0x7ffd6042, (q31_t)0xfe615223,
-    (q31_t)0x7ffd4bc0, (q31_t)0xfe5b09c5,
-  (q31_t)0x7ffd36ee, (q31_t)0xfe54c169, (q31_t)0x7ffd21ce, (q31_t)0xfe4e790d, (q31_t)0x7ffd0c5f, (q31_t)0xfe4830b3,
-    (q31_t)0x7ffcf6a0, (q31_t)0xfe41e85a,
-  (q31_t)0x7ffce093, (q31_t)0xfe3ba002, (q31_t)0x7ffcca37, (q31_t)0xfe3557ab, (q31_t)0x7ffcb38c, (q31_t)0xfe2f0f55,
-    (q31_t)0x7ffc9c92, (q31_t)0xfe28c700,
-  (q31_t)0x7ffc8549, (q31_t)0xfe227eac, (q31_t)0x7ffc6db1, (q31_t)0xfe1c365a, (q31_t)0x7ffc55ca, (q31_t)0xfe15ee09,
-    (q31_t)0x7ffc3d94, (q31_t)0xfe0fa5b8,
-  (q31_t)0x7ffc250f, (q31_t)0xfe095d69, (q31_t)0x7ffc0c3b, (q31_t)0xfe03151c, (q31_t)0x7ffbf319, (q31_t)0xfdfccccf,
-    (q31_t)0x7ffbd9a7, (q31_t)0xfdf68484,
-  (q31_t)0x7ffbbfe6, (q31_t)0xfdf03c3a, (q31_t)0x7ffba5d7, (q31_t)0xfde9f3f1, (q31_t)0x7ffb8b78, (q31_t)0xfde3aba9,
-    (q31_t)0x7ffb70cb, (q31_t)0xfddd6363,
-  (q31_t)0x7ffb55ce, (q31_t)0xfdd71b1e, (q31_t)0x7ffb3a83, (q31_t)0xfdd0d2db, (q31_t)0x7ffb1ee9, (q31_t)0xfdca8a99,
-    (q31_t)0x7ffb0300, (q31_t)0xfdc44258,
-  (q31_t)0x7ffae6c7, (q31_t)0xfdbdfa18, (q31_t)0x7ffaca40, (q31_t)0xfdb7b1da, (q31_t)0x7ffaad6a, (q31_t)0xfdb1699e,
-    (q31_t)0x7ffa9045, (q31_t)0xfdab2162,
-  (q31_t)0x7ffa72d1, (q31_t)0xfda4d929, (q31_t)0x7ffa550e, (q31_t)0xfd9e90f0, (q31_t)0x7ffa36fc, (q31_t)0xfd9848b9,
-    (q31_t)0x7ffa189c, (q31_t)0xfd920084,
-  (q31_t)0x7ff9f9ec, (q31_t)0xfd8bb850, (q31_t)0x7ff9daed, (q31_t)0xfd85701e, (q31_t)0x7ff9bba0, (q31_t)0xfd7f27ed,
-    (q31_t)0x7ff99c03, (q31_t)0xfd78dfbd,
-  (q31_t)0x7ff97c18, (q31_t)0xfd729790, (q31_t)0x7ff95bdd, (q31_t)0xfd6c4f64, (q31_t)0x7ff93b54, (q31_t)0xfd660739,
-    (q31_t)0x7ff91a7b, (q31_t)0xfd5fbf10,
-  (q31_t)0x7ff8f954, (q31_t)0xfd5976e9, (q31_t)0x7ff8d7de, (q31_t)0xfd532ec3, (q31_t)0x7ff8b619, (q31_t)0xfd4ce69f,
-    (q31_t)0x7ff89405, (q31_t)0xfd469e7c,
-  (q31_t)0x7ff871a2, (q31_t)0xfd40565c, (q31_t)0x7ff84ef0, (q31_t)0xfd3a0e3d, (q31_t)0x7ff82bef, (q31_t)0xfd33c61f,
-    (q31_t)0x7ff8089f, (q31_t)0xfd2d7e04,
-  (q31_t)0x7ff7e500, (q31_t)0xfd2735ea, (q31_t)0x7ff7c113, (q31_t)0xfd20edd2, (q31_t)0x7ff79cd6, (q31_t)0xfd1aa5bc,
-    (q31_t)0x7ff7784a, (q31_t)0xfd145da7,
-  (q31_t)0x7ff75370, (q31_t)0xfd0e1594, (q31_t)0x7ff72e46, (q31_t)0xfd07cd83, (q31_t)0x7ff708ce, (q31_t)0xfd018574,
-    (q31_t)0x7ff6e307, (q31_t)0xfcfb3d67,
-  (q31_t)0x7ff6bcf0, (q31_t)0xfcf4f55c, (q31_t)0x7ff6968b, (q31_t)0xfceead52, (q31_t)0x7ff66fd7, (q31_t)0xfce8654b,
-    (q31_t)0x7ff648d4, (q31_t)0xfce21d45,
-  (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7ff5f9e1, (q31_t)0xfcd58d3f, (q31_t)0x7ff5d1f1, (q31_t)0xfccf453f,
-    (q31_t)0x7ff5a9b2, (q31_t)0xfcc8fd41,
-  (q31_t)0x7ff58125, (q31_t)0xfcc2b545, (q31_t)0x7ff55848, (q31_t)0xfcbc6d4c, (q31_t)0x7ff52f1d, (q31_t)0xfcb62554,
-    (q31_t)0x7ff505a2, (q31_t)0xfcafdd5e,
-  (q31_t)0x7ff4dbd9, (q31_t)0xfca9956a, (q31_t)0x7ff4b1c0, (q31_t)0xfca34d78, (q31_t)0x7ff48759, (q31_t)0xfc9d0588,
-    (q31_t)0x7ff45ca3, (q31_t)0xfc96bd9b,
-  (q31_t)0x7ff4319d, (q31_t)0xfc9075af, (q31_t)0x7ff40649, (q31_t)0xfc8a2dc6, (q31_t)0x7ff3daa6, (q31_t)0xfc83e5de,
-    (q31_t)0x7ff3aeb4, (q31_t)0xfc7d9df9,
-  (q31_t)0x7ff38274, (q31_t)0xfc775616, (q31_t)0x7ff355e4, (q31_t)0xfc710e36, (q31_t)0x7ff32905, (q31_t)0xfc6ac657,
-    (q31_t)0x7ff2fbd7, (q31_t)0xfc647e7b,
-  (q31_t)0x7ff2ce5b, (q31_t)0xfc5e36a0, (q31_t)0x7ff2a08f, (q31_t)0xfc57eec9, (q31_t)0x7ff27275, (q31_t)0xfc51a6f3,
-    (q31_t)0x7ff2440b, (q31_t)0xfc4b5f20,
-  (q31_t)0x7ff21553, (q31_t)0xfc45174e, (q31_t)0x7ff1e64c, (q31_t)0xfc3ecf80, (q31_t)0x7ff1b6f6, (q31_t)0xfc3887b3,
-    (q31_t)0x7ff18751, (q31_t)0xfc323fe9,
-  (q31_t)0x7ff1575d, (q31_t)0xfc2bf821, (q31_t)0x7ff1271a, (q31_t)0xfc25b05c, (q31_t)0x7ff0f688, (q31_t)0xfc1f6899,
-    (q31_t)0x7ff0c5a7, (q31_t)0xfc1920d8,
-  (q31_t)0x7ff09478, (q31_t)0xfc12d91a, (q31_t)0x7ff062f9, (q31_t)0xfc0c915e, (q31_t)0x7ff0312c, (q31_t)0xfc0649a5,
-    (q31_t)0x7fefff0f, (q31_t)0xfc0001ee,
-  (q31_t)0x7fefcca4, (q31_t)0xfbf9ba39, (q31_t)0x7fef99ea, (q31_t)0xfbf37287, (q31_t)0x7fef66e1, (q31_t)0xfbed2ad8,
-    (q31_t)0x7fef3388, (q31_t)0xfbe6e32b,
-  (q31_t)0x7feeffe1, (q31_t)0xfbe09b80, (q31_t)0x7feecbec, (q31_t)0xfbda53d8, (q31_t)0x7fee97a7, (q31_t)0xfbd40c33,
-    (q31_t)0x7fee6313, (q31_t)0xfbcdc490,
-  (q31_t)0x7fee2e30, (q31_t)0xfbc77cf0, (q31_t)0x7fedf8ff, (q31_t)0xfbc13552, (q31_t)0x7fedc37e, (q31_t)0xfbbaedb7,
-    (q31_t)0x7fed8daf, (q31_t)0xfbb4a61f,
-  (q31_t)0x7fed5791, (q31_t)0xfbae5e89, (q31_t)0x7fed2123, (q31_t)0xfba816f6, (q31_t)0x7fecea67, (q31_t)0xfba1cf66,
-    (q31_t)0x7fecb35c, (q31_t)0xfb9b87d8,
-  (q31_t)0x7fec7c02, (q31_t)0xfb95404d, (q31_t)0x7fec4459, (q31_t)0xfb8ef8c5, (q31_t)0x7fec0c62, (q31_t)0xfb88b13f,
-    (q31_t)0x7febd41b, (q31_t)0xfb8269bd,
-  (q31_t)0x7feb9b85, (q31_t)0xfb7c223d, (q31_t)0x7feb62a1, (q31_t)0xfb75dac0, (q31_t)0x7feb296d, (q31_t)0xfb6f9345,
-    (q31_t)0x7feaefeb, (q31_t)0xfb694bce,
-  (q31_t)0x7feab61a, (q31_t)0xfb630459, (q31_t)0x7fea7bfa, (q31_t)0xfb5cbce7, (q31_t)0x7fea418b, (q31_t)0xfb567578,
-    (q31_t)0x7fea06cd, (q31_t)0xfb502e0c,
-  (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3, (q31_t)0x7fe99064, (q31_t)0xfb439f3c, (q31_t)0x7fe954ba, (q31_t)0xfb3d57d9,
-    (q31_t)0x7fe918c0, (q31_t)0xfb371078,
-  (q31_t)0x7fe8dc78, (q31_t)0xfb30c91b, (q31_t)0x7fe89fe0, (q31_t)0xfb2a81c0, (q31_t)0x7fe862fa, (q31_t)0xfb243a69,
-    (q31_t)0x7fe825c5, (q31_t)0xfb1df314,
-  (q31_t)0x7fe7e841, (q31_t)0xfb17abc2, (q31_t)0x7fe7aa6e, (q31_t)0xfb116474, (q31_t)0x7fe76c4c, (q31_t)0xfb0b1d28,
-    (q31_t)0x7fe72ddb, (q31_t)0xfb04d5e0,
-  (q31_t)0x7fe6ef1c, (q31_t)0xfafe8e9b, (q31_t)0x7fe6b00d, (q31_t)0xfaf84758, (q31_t)0x7fe670b0, (q31_t)0xfaf20019,
-    (q31_t)0x7fe63103, (q31_t)0xfaebb8dd,
-  (q31_t)0x7fe5f108, (q31_t)0xfae571a4, (q31_t)0x7fe5b0be, (q31_t)0xfadf2a6e, (q31_t)0x7fe57025, (q31_t)0xfad8e33c,
-    (q31_t)0x7fe52f3d, (q31_t)0xfad29c0c,
-  (q31_t)0x7fe4ee06, (q31_t)0xfacc54e0, (q31_t)0x7fe4ac81, (q31_t)0xfac60db7, (q31_t)0x7fe46aac, (q31_t)0xfabfc691,
-    (q31_t)0x7fe42889, (q31_t)0xfab97f6e,
-  (q31_t)0x7fe3e616, (q31_t)0xfab3384f, (q31_t)0x7fe3a355, (q31_t)0xfaacf133, (q31_t)0x7fe36045, (q31_t)0xfaa6aa1a,
-    (q31_t)0x7fe31ce6, (q31_t)0xfaa06305,
-  (q31_t)0x7fe2d938, (q31_t)0xfa9a1bf3, (q31_t)0x7fe2953b, (q31_t)0xfa93d4e4, (q31_t)0x7fe250ef, (q31_t)0xfa8d8dd8,
-    (q31_t)0x7fe20c55, (q31_t)0xfa8746d0,
-  (q31_t)0x7fe1c76b, (q31_t)0xfa80ffcb, (q31_t)0x7fe18233, (q31_t)0xfa7ab8ca, (q31_t)0x7fe13cac, (q31_t)0xfa7471cc,
-    (q31_t)0x7fe0f6d6, (q31_t)0xfa6e2ad1,
-  (q31_t)0x7fe0b0b1, (q31_t)0xfa67e3da, (q31_t)0x7fe06a3d, (q31_t)0xfa619ce7, (q31_t)0x7fe0237a, (q31_t)0xfa5b55f7,
-    (q31_t)0x7fdfdc69, (q31_t)0xfa550f0a,
-  (q31_t)0x7fdf9508, (q31_t)0xfa4ec821, (q31_t)0x7fdf4d59, (q31_t)0xfa48813b, (q31_t)0x7fdf055a, (q31_t)0xfa423a59,
-    (q31_t)0x7fdebd0d, (q31_t)0xfa3bf37a,
-  (q31_t)0x7fde7471, (q31_t)0xfa35ac9f, (q31_t)0x7fde2b86, (q31_t)0xfa2f65c8, (q31_t)0x7fdde24d, (q31_t)0xfa291ef4,
-    (q31_t)0x7fdd98c4, (q31_t)0xfa22d823,
-  (q31_t)0x7fdd4eec, (q31_t)0xfa1c9157, (q31_t)0x7fdd04c6, (q31_t)0xfa164a8e, (q31_t)0x7fdcba51, (q31_t)0xfa1003c8,
-    (q31_t)0x7fdc6f8d, (q31_t)0xfa09bd06,
-  (q31_t)0x7fdc247a, (q31_t)0xfa037648, (q31_t)0x7fdbd918, (q31_t)0xf9fd2f8e, (q31_t)0x7fdb8d67, (q31_t)0xf9f6e8d7,
-    (q31_t)0x7fdb4167, (q31_t)0xf9f0a224,
-  (q31_t)0x7fdaf519, (q31_t)0xf9ea5b75, (q31_t)0x7fdaa87c, (q31_t)0xf9e414ca, (q31_t)0x7fda5b8f, (q31_t)0xf9ddce22,
-    (q31_t)0x7fda0e54, (q31_t)0xf9d7877e,
-  (q31_t)0x7fd9c0ca, (q31_t)0xf9d140de, (q31_t)0x7fd972f2, (q31_t)0xf9cafa42, (q31_t)0x7fd924ca, (q31_t)0xf9c4b3a9,
-    (q31_t)0x7fd8d653, (q31_t)0xf9be6d15,
-  (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fd8387a, (q31_t)0xf9b1dff7, (q31_t)0x7fd7e917, (q31_t)0xf9ab996e,
-    (q31_t)0x7fd79965, (q31_t)0xf9a552e9,
-  (q31_t)0x7fd74964, (q31_t)0xf99f0c68, (q31_t)0x7fd6f914, (q31_t)0xf998c5ea, (q31_t)0x7fd6a875, (q31_t)0xf9927f71,
-    (q31_t)0x7fd65788, (q31_t)0xf98c38fc,
-  (q31_t)0x7fd6064c, (q31_t)0xf985f28a, (q31_t)0x7fd5b4c1, (q31_t)0xf97fac1d, (q31_t)0x7fd562e7, (q31_t)0xf97965b4,
-    (q31_t)0x7fd510be, (q31_t)0xf9731f4e,
-  (q31_t)0x7fd4be46, (q31_t)0xf96cd8ed, (q31_t)0x7fd46b80, (q31_t)0xf9669290, (q31_t)0x7fd4186a, (q31_t)0xf9604c37,
-    (q31_t)0x7fd3c506, (q31_t)0xf95a05e2,
-  (q31_t)0x7fd37153, (q31_t)0xf953bf91, (q31_t)0x7fd31d51, (q31_t)0xf94d7944, (q31_t)0x7fd2c900, (q31_t)0xf94732fb,
-    (q31_t)0x7fd27460, (q31_t)0xf940ecb7,
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-    (q31_t)0x723608af, (q31_t)0xc6356efc,
-  (q31_t)0x72333251, (q31_t)0xc62fd3d6, (q31_t)0x72305bae, (q31_t)0xc62a38d4, (q31_t)0x722d84c4, (q31_t)0xc6249df5,
-    (q31_t)0x722aad93, (q31_t)0xc61f033a,
-  (q31_t)0x7227d61c, (q31_t)0xc61968a2, (q31_t)0x7224fe5f, (q31_t)0xc613ce2f, (q31_t)0x7222265b, (q31_t)0xc60e33df,
-    (q31_t)0x721f4e11, (q31_t)0xc60899b2,
-  (q31_t)0x721c7580, (q31_t)0xc602ffaa, (q31_t)0x72199ca9, (q31_t)0xc5fd65c5, (q31_t)0x7216c38c, (q31_t)0xc5f7cc04,
-    (q31_t)0x7213ea28, (q31_t)0xc5f23267,
-  (q31_t)0x7211107e, (q31_t)0xc5ec98ee, (q31_t)0x720e368d, (q31_t)0xc5e6ff98, (q31_t)0x720b5c57, (q31_t)0xc5e16667,
-    (q31_t)0x720881d9, (q31_t)0xc5dbcd59,
-  (q31_t)0x7205a716, (q31_t)0xc5d6346f, (q31_t)0x7202cc0c, (q31_t)0xc5d09ba9, (q31_t)0x71fff0bc, (q31_t)0xc5cb0307,
-    (q31_t)0x71fd1525, (q31_t)0xc5c56a89,
-  (q31_t)0x71fa3949, (q31_t)0xc5bfd22e, (q31_t)0x71f75d25, (q31_t)0xc5ba39f8, (q31_t)0x71f480bc, (q31_t)0xc5b4a1e5,
-    (q31_t)0x71f1a40c, (q31_t)0xc5af09f7,
-  (q31_t)0x71eec716, (q31_t)0xc5a9722c, (q31_t)0x71ebe9da, (q31_t)0xc5a3da86, (q31_t)0x71e90c57, (q31_t)0xc59e4303,
-    (q31_t)0x71e62e8f, (q31_t)0xc598aba5,
-  (q31_t)0x71e35080, (q31_t)0xc593146a, (q31_t)0x71e0722a, (q31_t)0xc58d7d54, (q31_t)0x71dd938f, (q31_t)0xc587e661,
-    (q31_t)0x71dab4ad, (q31_t)0xc5824f93,
-  (q31_t)0x71d7d585, (q31_t)0xc57cb8e9, (q31_t)0x71d4f617, (q31_t)0xc5772263, (q31_t)0x71d21662, (q31_t)0xc5718c00,
-    (q31_t)0x71cf3667, (q31_t)0xc56bf5c2,
-  (q31_t)0x71cc5626, (q31_t)0xc5665fa9, (q31_t)0x71c9759f, (q31_t)0xc560c9b3, (q31_t)0x71c694d2, (q31_t)0xc55b33e2,
-    (q31_t)0x71c3b3bf, (q31_t)0xc5559e34,
-  (q31_t)0x71c0d265, (q31_t)0xc55008ab, (q31_t)0x71bdf0c5, (q31_t)0xc54a7346, (q31_t)0x71bb0edf, (q31_t)0xc544de05,
-    (q31_t)0x71b82cb3, (q31_t)0xc53f48e9,
-  (q31_t)0x71b54a41, (q31_t)0xc539b3f1, (q31_t)0x71b26788, (q31_t)0xc5341f1d, (q31_t)0x71af848a, (q31_t)0xc52e8a6d,
-    (q31_t)0x71aca145, (q31_t)0xc528f5e1,
-  (q31_t)0x71a9bdba, (q31_t)0xc523617a, (q31_t)0x71a6d9e9, (q31_t)0xc51dcd37, (q31_t)0x71a3f5d2, (q31_t)0xc5183919,
-    (q31_t)0x71a11175, (q31_t)0xc512a51f,
-  (q31_t)0x719e2cd2, (q31_t)0xc50d1149, (q31_t)0x719b47e9, (q31_t)0xc5077d97, (q31_t)0x719862b9, (q31_t)0xc501ea0a,
-    (q31_t)0x71957d44, (q31_t)0xc4fc56a2,
-  (q31_t)0x71929789, (q31_t)0xc4f6c35d, (q31_t)0x718fb187, (q31_t)0xc4f1303d, (q31_t)0x718ccb3f, (q31_t)0xc4eb9d42,
-    (q31_t)0x7189e4b2, (q31_t)0xc4e60a6b,
-  (q31_t)0x7186fdde, (q31_t)0xc4e077b8, (q31_t)0x718416c4, (q31_t)0xc4dae52a, (q31_t)0x71812f65, (q31_t)0xc4d552c1,
-    (q31_t)0x717e47bf, (q31_t)0xc4cfc07c,
-  (q31_t)0x717b5fd3, (q31_t)0xc4ca2e5b, (q31_t)0x717877a1, (q31_t)0xc4c49c5f, (q31_t)0x71758f29, (q31_t)0xc4bf0a87,
-    (q31_t)0x7172a66c, (q31_t)0xc4b978d4,
-  (q31_t)0x716fbd68, (q31_t)0xc4b3e746, (q31_t)0x716cd41e, (q31_t)0xc4ae55dc, (q31_t)0x7169ea8f, (q31_t)0xc4a8c497,
-    (q31_t)0x716700b9, (q31_t)0xc4a33376,
-  (q31_t)0x7164169d, (q31_t)0xc49da27a, (q31_t)0x71612c3c, (q31_t)0xc49811a3, (q31_t)0x715e4194, (q31_t)0xc49280f0,
-    (q31_t)0x715b56a7, (q31_t)0xc48cf062,
-  (q31_t)0x71586b74, (q31_t)0xc4875ff9, (q31_t)0x71557ffa, (q31_t)0xc481cfb4, (q31_t)0x7152943b, (q31_t)0xc47c3f94,
-    (q31_t)0x714fa836, (q31_t)0xc476af98,
-  (q31_t)0x714cbbeb, (q31_t)0xc4711fc2, (q31_t)0x7149cf5a, (q31_t)0xc46b9010, (q31_t)0x7146e284, (q31_t)0xc4660083,
-    (q31_t)0x7143f567, (q31_t)0xc460711b,
-  (q31_t)0x71410805, (q31_t)0xc45ae1d7, (q31_t)0x713e1a5c, (q31_t)0xc45552b8, (q31_t)0x713b2c6e, (q31_t)0xc44fc3be,
-    (q31_t)0x71383e3a, (q31_t)0xc44a34e9,
-  (q31_t)0x71354fc0, (q31_t)0xc444a639, (q31_t)0x71326101, (q31_t)0xc43f17ad, (q31_t)0x712f71fb, (q31_t)0xc4398947,
-    (q31_t)0x712c82b0, (q31_t)0xc433fb05,
-  (q31_t)0x7129931f, (q31_t)0xc42e6ce8, (q31_t)0x7126a348, (q31_t)0xc428def0, (q31_t)0x7123b32b, (q31_t)0xc423511d,
-    (q31_t)0x7120c2c8, (q31_t)0xc41dc36f,
-  (q31_t)0x711dd220, (q31_t)0xc41835e6, (q31_t)0x711ae132, (q31_t)0xc412a882, (q31_t)0x7117effe, (q31_t)0xc40d1b42,
-    (q31_t)0x7114fe84, (q31_t)0xc4078e28,
-  (q31_t)0x71120cc5, (q31_t)0xc4020133, (q31_t)0x710f1ac0, (q31_t)0xc3fc7462, (q31_t)0x710c2875, (q31_t)0xc3f6e7b7,
-    (q31_t)0x710935e4, (q31_t)0xc3f15b31,
-  (q31_t)0x7106430e, (q31_t)0xc3ebced0, (q31_t)0x71034ff2, (q31_t)0xc3e64294, (q31_t)0x71005c90, (q31_t)0xc3e0b67d,
-    (q31_t)0x70fd68e9, (q31_t)0xc3db2a8b,
-  (q31_t)0x70fa74fc, (q31_t)0xc3d59ebe, (q31_t)0x70f780c9, (q31_t)0xc3d01316, (q31_t)0x70f48c50, (q31_t)0xc3ca8793,
-    (q31_t)0x70f19792, (q31_t)0xc3c4fc36,
-  (q31_t)0x70eea28e, (q31_t)0xc3bf70fd, (q31_t)0x70ebad45, (q31_t)0xc3b9e5ea, (q31_t)0x70e8b7b5, (q31_t)0xc3b45afc,
-    (q31_t)0x70e5c1e1, (q31_t)0xc3aed034,
-  (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x70dfd566, (q31_t)0xc3a3bb12, (q31_t)0x70dcdec0, (q31_t)0xc39e30b8,
-    (q31_t)0x70d9e7d5, (q31_t)0xc398a685,
-  (q31_t)0x70d6f0a4, (q31_t)0xc3931c76, (q31_t)0x70d3f92d, (q31_t)0xc38d928d, (q31_t)0x70d10171, (q31_t)0xc38808c9,
-    (q31_t)0x70ce096f, (q31_t)0xc3827f2a,
-  (q31_t)0x70cb1128, (q31_t)0xc37cf5b0, (q31_t)0x70c8189b, (q31_t)0xc3776c5c, (q31_t)0x70c51fc8, (q31_t)0xc371e32d,
-    (q31_t)0x70c226b0, (q31_t)0xc36c5a24,
-  (q31_t)0x70bf2d53, (q31_t)0xc366d140, (q31_t)0x70bc33b0, (q31_t)0xc3614881, (q31_t)0x70b939c7, (q31_t)0xc35bbfe8,
-    (q31_t)0x70b63f99, (q31_t)0xc3563774,
-  (q31_t)0x70b34525, (q31_t)0xc350af26, (q31_t)0x70b04a6b, (q31_t)0xc34b26fc, (q31_t)0x70ad4f6d, (q31_t)0xc3459ef9,
-    (q31_t)0x70aa5428, (q31_t)0xc340171b,
-  (q31_t)0x70a7589f, (q31_t)0xc33a8f62, (q31_t)0x70a45ccf, (q31_t)0xc33507cf, (q31_t)0x70a160ba, (q31_t)0xc32f8061,
-    (q31_t)0x709e6460, (q31_t)0xc329f919,
-  (q31_t)0x709b67c0, (q31_t)0xc32471f7, (q31_t)0x70986adb, (q31_t)0xc31eeaf9, (q31_t)0x70956db1, (q31_t)0xc3196422,
-    (q31_t)0x70927041, (q31_t)0xc313dd70,
-  (q31_t)0x708f728b, (q31_t)0xc30e56e4, (q31_t)0x708c7490, (q31_t)0xc308d07d, (q31_t)0x70897650, (q31_t)0xc3034a3c,
-    (q31_t)0x708677ca, (q31_t)0xc2fdc420,
-  (q31_t)0x708378ff, (q31_t)0xc2f83e2a, (q31_t)0x708079ee, (q31_t)0xc2f2b85a, (q31_t)0x707d7a98, (q31_t)0xc2ed32af,
-    (q31_t)0x707a7afd, (q31_t)0xc2e7ad2a,
-  (q31_t)0x70777b1c, (q31_t)0xc2e227cb, (q31_t)0x70747af6, (q31_t)0xc2dca291, (q31_t)0x70717a8a, (q31_t)0xc2d71d7e,
-    (q31_t)0x706e79d9, (q31_t)0xc2d1988f,
-  (q31_t)0x706b78e3, (q31_t)0xc2cc13c7, (q31_t)0x706877a7, (q31_t)0xc2c68f24, (q31_t)0x70657626, (q31_t)0xc2c10aa7,
-    (q31_t)0x70627460, (q31_t)0xc2bb8650,
-  (q31_t)0x705f7255, (q31_t)0xc2b6021f, (q31_t)0x705c7004, (q31_t)0xc2b07e14, (q31_t)0x70596d6d, (q31_t)0xc2aafa2e,
-    (q31_t)0x70566a92, (q31_t)0xc2a5766e,
-  (q31_t)0x70536771, (q31_t)0xc29ff2d4, (q31_t)0x7050640b, (q31_t)0xc29a6f60, (q31_t)0x704d6060, (q31_t)0xc294ec12,
-    (q31_t)0x704a5c6f, (q31_t)0xc28f68e9,
-  (q31_t)0x70475839, (q31_t)0xc289e5e7, (q31_t)0x704453be, (q31_t)0xc284630a, (q31_t)0x70414efd, (q31_t)0xc27ee054,
-    (q31_t)0x703e49f8, (q31_t)0xc2795dc3,
-  (q31_t)0x703b44ad, (q31_t)0xc273db58, (q31_t)0x70383f1d, (q31_t)0xc26e5913, (q31_t)0x70353947, (q31_t)0xc268d6f5,
-    (q31_t)0x7032332d, (q31_t)0xc26354fc,
-  (q31_t)0x702f2ccd, (q31_t)0xc25dd329, (q31_t)0x702c2628, (q31_t)0xc258517c, (q31_t)0x70291f3e, (q31_t)0xc252cff5,
-    (q31_t)0x7026180e, (q31_t)0xc24d4e95,
-  (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x702008e0, (q31_t)0xc2424c46, (q31_t)0x701d00e1, (q31_t)0xc23ccb57,
-    (q31_t)0x7019f89d, (q31_t)0xc2374a8f,
-  (q31_t)0x7016f014, (q31_t)0xc231c9ec, (q31_t)0x7013e746, (q31_t)0xc22c4970, (q31_t)0x7010de32, (q31_t)0xc226c91a,
-    (q31_t)0x700dd4da, (q31_t)0xc22148ea,
-  (q31_t)0x700acb3c, (q31_t)0xc21bc8e1, (q31_t)0x7007c159, (q31_t)0xc21648fd, (q31_t)0x7004b731, (q31_t)0xc210c940,
-    (q31_t)0x7001acc4, (q31_t)0xc20b49a9,
-  (q31_t)0x6ffea212, (q31_t)0xc205ca38, (q31_t)0x6ffb971b, (q31_t)0xc2004aed, (q31_t)0x6ff88bde, (q31_t)0xc1facbc9,
-    (q31_t)0x6ff5805d, (q31_t)0xc1f54cca,
-  (q31_t)0x6ff27497, (q31_t)0xc1efcdf3, (q31_t)0x6fef688b, (q31_t)0xc1ea4f41, (q31_t)0x6fec5c3b, (q31_t)0xc1e4d0b6,
-    (q31_t)0x6fe94fa5, (q31_t)0xc1df5251,
-  (q31_t)0x6fe642ca, (q31_t)0xc1d9d412, (q31_t)0x6fe335ab, (q31_t)0xc1d455f9, (q31_t)0x6fe02846, (q31_t)0xc1ced807,
-    (q31_t)0x6fdd1a9c, (q31_t)0xc1c95a3c,
-  (q31_t)0x6fda0cae, (q31_t)0xc1c3dc97, (q31_t)0x6fd6fe7a, (q31_t)0xc1be5f18, (q31_t)0x6fd3f001, (q31_t)0xc1b8e1bf,
-    (q31_t)0x6fd0e144, (q31_t)0xc1b3648d,
-  (q31_t)0x6fcdd241, (q31_t)0xc1ade781, (q31_t)0x6fcac2fa, (q31_t)0xc1a86a9c, (q31_t)0x6fc7b36d, (q31_t)0xc1a2edde,
-    (q31_t)0x6fc4a39c, (q31_t)0xc19d7145,
-  (q31_t)0x6fc19385, (q31_t)0xc197f4d4, (q31_t)0x6fbe832a, (q31_t)0xc1927888, (q31_t)0x6fbb728a, (q31_t)0xc18cfc63,
-    (q31_t)0x6fb861a4, (q31_t)0xc1878065,
-  (q31_t)0x6fb5507a, (q31_t)0xc182048d, (q31_t)0x6fb23f0b, (q31_t)0xc17c88dc, (q31_t)0x6faf2d57, (q31_t)0xc1770d52,
-    (q31_t)0x6fac1b5f, (q31_t)0xc17191ee,
-  (q31_t)0x6fa90921, (q31_t)0xc16c16b0, (q31_t)0x6fa5f69e, (q31_t)0xc1669b99, (q31_t)0x6fa2e3d7, (q31_t)0xc16120a9,
-    (q31_t)0x6f9fd0cb, (q31_t)0xc15ba5df,
-  (q31_t)0x6f9cbd79, (q31_t)0xc1562b3d, (q31_t)0x6f99a9e3, (q31_t)0xc150b0c0, (q31_t)0x6f969608, (q31_t)0xc14b366b,
-    (q31_t)0x6f9381e9, (q31_t)0xc145bc3c,
-  (q31_t)0x6f906d84, (q31_t)0xc1404233, (q31_t)0x6f8d58db, (q31_t)0xc13ac852, (q31_t)0x6f8a43ed, (q31_t)0xc1354e97,
-    (q31_t)0x6f872eba, (q31_t)0xc12fd503,
-  (q31_t)0x6f841942, (q31_t)0xc12a5b95, (q31_t)0x6f810386, (q31_t)0xc124e24f, (q31_t)0x6f7ded84, (q31_t)0xc11f692f,
-    (q31_t)0x6f7ad73e, (q31_t)0xc119f036,
-  (q31_t)0x6f77c0b3, (q31_t)0xc1147764, (q31_t)0x6f74a9e4, (q31_t)0xc10efeb8, (q31_t)0x6f7192cf, (q31_t)0xc1098634,
-    (q31_t)0x6f6e7b76, (q31_t)0xc1040dd6,
-  (q31_t)0x6f6b63d8, (q31_t)0xc0fe959f, (q31_t)0x6f684bf6, (q31_t)0xc0f91d8f, (q31_t)0x6f6533ce, (q31_t)0xc0f3a5a6,
-    (q31_t)0x6f621b62, (q31_t)0xc0ee2de3,
-  (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6f5be9bc, (q31_t)0xc0e33ed4, (q31_t)0x6f58d082, (q31_t)0xc0ddc786,
-    (q31_t)0x6f55b703, (q31_t)0xc0d8505f,
-  (q31_t)0x6f529d40, (q31_t)0xc0d2d960, (q31_t)0x6f4f8338, (q31_t)0xc0cd6287, (q31_t)0x6f4c68eb, (q31_t)0xc0c7ebd6,
-    (q31_t)0x6f494e5a, (q31_t)0xc0c2754b,
-  (q31_t)0x6f463383, (q31_t)0xc0bcfee7, (q31_t)0x6f431869, (q31_t)0xc0b788ab, (q31_t)0x6f3ffd09, (q31_t)0xc0b21295,
-    (q31_t)0x6f3ce165, (q31_t)0xc0ac9ca6,
-  (q31_t)0x6f39c57d, (q31_t)0xc0a726df, (q31_t)0x6f36a94f, (q31_t)0xc0a1b13e, (q31_t)0x6f338cde, (q31_t)0xc09c3bc5,
-    (q31_t)0x6f307027, (q31_t)0xc096c673,
-  (q31_t)0x6f2d532c, (q31_t)0xc0915148, (q31_t)0x6f2a35ed, (q31_t)0xc08bdc44, (q31_t)0x6f271868, (q31_t)0xc0866767,
-    (q31_t)0x6f23faa0, (q31_t)0xc080f2b1,
-  (q31_t)0x6f20dc92, (q31_t)0xc07b7e23, (q31_t)0x6f1dbe41, (q31_t)0xc07609bb, (q31_t)0x6f1a9faa, (q31_t)0xc070957b,
-    (q31_t)0x6f1780cf, (q31_t)0xc06b2162,
-  (q31_t)0x6f1461b0, (q31_t)0xc065ad70, (q31_t)0x6f11424c, (q31_t)0xc06039a6, (q31_t)0x6f0e22a3, (q31_t)0xc05ac603,
-    (q31_t)0x6f0b02b6, (q31_t)0xc0555287,
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-  (q31_t)0x11474f6, (q31_t)0x80012a8e, (q31_t)0x10e2c85, (q31_t)0x80011d23, (q31_t)0x107e414, (q31_t)0x80011008,
-    (q31_t)0x1019ba2, (q31_t)0x8001033b,
-  (q31_t)0xfb5330, (q31_t)0x8000f6bd, (q31_t)0xf50abd, (q31_t)0x8000ea8e, (q31_t)0xeec249, (q31_t)0x8000deaf, (q31_t)0xe879d5,
-    (q31_t)0x8000d31e,
-  (q31_t)0xe23160, (q31_t)0x8000c7dc, (q31_t)0xdbe8eb, (q31_t)0x8000bce9, (q31_t)0xd5a075, (q31_t)0x8000b245, (q31_t)0xcf57ff,
-    (q31_t)0x8000a7f0,
-  (q31_t)0xc90f88, (q31_t)0x80009dea, (q31_t)0xc2c711, (q31_t)0x80009433, (q31_t)0xbc7e99, (q31_t)0x80008aca, (q31_t)0xb63621,
-    (q31_t)0x800081b1,
-  (q31_t)0xafeda8, (q31_t)0x800078e7, (q31_t)0xa9a52f, (q31_t)0x8000706c, (q31_t)0xa35cb5, (q31_t)0x8000683f, (q31_t)0x9d143b,
-    (q31_t)0x80006062,
-  (q31_t)0x96cbc1, (q31_t)0x800058d4, (q31_t)0x908346, (q31_t)0x80005194, (q31_t)0x8a3acb, (q31_t)0x80004aa4, (q31_t)0x83f250,
-    (q31_t)0x80004402,
-  (q31_t)0x7da9d4, (q31_t)0x80003daf, (q31_t)0x776159, (q31_t)0x800037ac, (q31_t)0x7118dc, (q31_t)0x800031f7, (q31_t)0x6ad060,
-    (q31_t)0x80002c91,
-  (q31_t)0x6487e3, (q31_t)0x8000277a, (q31_t)0x5e3f66, (q31_t)0x800022b3, (q31_t)0x57f6e9, (q31_t)0x80001e3a, (q31_t)0x51ae6b,
-    (q31_t)0x80001a10,
-  (q31_t)0x4b65ee, (q31_t)0x80001635, (q31_t)0x451d70, (q31_t)0x800012a9, (q31_t)0x3ed4f2, (q31_t)0x80000f6c, (q31_t)0x388c74,
-    (q31_t)0x80000c7e,
-  (q31_t)0x3243f5, (q31_t)0x800009df, (q31_t)0x2bfb77, (q31_t)0x8000078e, (q31_t)0x25b2f8, (q31_t)0x8000058d, (q31_t)0x1f6a7a,
-    (q31_t)0x800003db,
-  (q31_t)0x1921fb, (q31_t)0x80000278, (q31_t)0x12d97c, (q31_t)0x80000163, (q31_t)0xc90fe, (q31_t)0x8000009e, (q31_t)0x6487f,
-    (q31_t)0x80000027
-
-};
-
-/**
-* \par
-* cosFactor tables are generated using the formula : <pre>cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))</pre>
-* \par
-* C command to generate the table
-* <pre>
-* for(i = 0; i< N; i++)
-* {
-*   cos_factors[i]= 2 * cos((2*i+1)*c/2);
-* } </pre>
-* \par
-* where <code>N</code> is the number of factors to generate and <code>c</code> is <code>pi/(2*N)</code>
-* \par
-* Then converted to q31 format by multiplying with 2^31 and saturated if required.
-*/
-
-
-static const q31_t cos_factorsQ31_128[128] = {
-  (q31_t)0x7fff6216, (q31_t)0x7ffa72d1, (q31_t)0x7ff09478, (q31_t)0x7fe1c76b, (q31_t)0x7fce0c3e, (q31_t)0x7fb563b3,
-  (q31_t)0x7f97cebd, (q31_t)0x7f754e80,
-  (q31_t)0x7f4de451, (q31_t)0x7f2191b4, (q31_t)0x7ef05860, (q31_t)0x7eba3a39, (q31_t)0x7e7f3957, (q31_t)0x7e3f57ff,
-  (q31_t)0x7dfa98a8, (q31_t)0x7db0fdf8,
-  (q31_t)0x7d628ac6, (q31_t)0x7d0f4218, (q31_t)0x7cb72724, (q31_t)0x7c5a3d50, (q31_t)0x7bf88830, (q31_t)0x7b920b89,
-  (q31_t)0x7b26cb4f, (q31_t)0x7ab6cba4,
-  (q31_t)0x7a4210d8, (q31_t)0x79c89f6e, (q31_t)0x794a7c12, (q31_t)0x78c7aba2, (q31_t)0x78403329, (q31_t)0x77b417df,
-  (q31_t)0x77235f2d, (q31_t)0x768e0ea6,
-  (q31_t)0x75f42c0b, (q31_t)0x7555bd4c, (q31_t)0x74b2c884, (q31_t)0x740b53fb, (q31_t)0x735f6626, (q31_t)0x72af05a7,
-  (q31_t)0x71fa3949, (q31_t)0x71410805,
-  (q31_t)0x708378ff, (q31_t)0x6fc19385, (q31_t)0x6efb5f12, (q31_t)0x6e30e34a, (q31_t)0x6d6227fa, (q31_t)0x6c8f351c,
-  (q31_t)0x6bb812d1, (q31_t)0x6adcc964,
-  (q31_t)0x69fd614a, (q31_t)0x6919e320, (q31_t)0x683257ab, (q31_t)0x6746c7d8, (q31_t)0x66573cbb, (q31_t)0x6563bf92,
-  (q31_t)0x646c59bf, (q31_t)0x637114cc,
-  (q31_t)0x6271fa69, (q31_t)0x616f146c, (q31_t)0x60686ccf, (q31_t)0x5f5e0db3, (q31_t)0x5e50015d, (q31_t)0x5d3e5237,
-  (q31_t)0x5c290acc, (q31_t)0x5b1035cf,
-  (q31_t)0x59f3de12, (q31_t)0x58d40e8c, (q31_t)0x57b0d256, (q31_t)0x568a34a9, (q31_t)0x556040e2, (q31_t)0x5433027d,
-  (q31_t)0x53028518, (q31_t)0x51ced46e,
-  (q31_t)0x5097fc5e, (q31_t)0x4f5e08e3, (q31_t)0x4e210617, (q31_t)0x4ce10034, (q31_t)0x4b9e0390, (q31_t)0x4a581c9e,
-  (q31_t)0x490f57ee, (q31_t)0x47c3c22f,
-  (q31_t)0x46756828, (q31_t)0x452456bd, (q31_t)0x43d09aed, (q31_t)0x427a41d0, (q31_t)0x4121589b, (q31_t)0x3fc5ec98,
-  (q31_t)0x3e680b2c, (q31_t)0x3d07c1d6,
-  (q31_t)0x3ba51e29, (q31_t)0x3a402dd2, (q31_t)0x38d8fe93, (q31_t)0x376f9e46, (q31_t)0x36041ad9, (q31_t)0x34968250,
-  (q31_t)0x3326e2c3, (q31_t)0x31b54a5e,
-  (q31_t)0x3041c761, (q31_t)0x2ecc681e, (q31_t)0x2d553afc, (q31_t)0x2bdc4e6f, (q31_t)0x2a61b101, (q31_t)0x28e5714b,
-  (q31_t)0x27679df4, (q31_t)0x25e845b6,
-  (q31_t)0x24677758, (q31_t)0x22e541af, (q31_t)0x2161b3a0, (q31_t)0x1fdcdc1b, (q31_t)0x1e56ca1e, (q31_t)0x1ccf8cb3,
-  (q31_t)0x1b4732ef, (q31_t)0x19bdcbf3,
-  (q31_t)0x183366e9, (q31_t)0x16a81305, (q31_t)0x151bdf86, (q31_t)0x138edbb1, (q31_t)0x120116d5, (q31_t)0x1072a048,
-  (q31_t)0xee38766, (q31_t)0xd53db92,
-  (q31_t)0xbc3ac35, (q31_t)0xa3308bd, (q31_t)0x8a2009a, (q31_t)0x710a345, (q31_t)0x57f0035, (q31_t)0x3ed26e6, (q31_t)0x25b26d7,
-  (q31_t)0xc90f88
-};
-
-static const q31_t cos_factorsQ31_512[512] = {
-  (q31_t)0x7ffff621, (q31_t)0x7fffa72c, (q31_t)0x7fff0943, (q31_t)0x7ffe1c65, (q31_t)0x7ffce093, (q31_t)0x7ffb55ce,
-  (q31_t)0x7ff97c18, (q31_t)0x7ff75370,
-  (q31_t)0x7ff4dbd9, (q31_t)0x7ff21553, (q31_t)0x7feeffe1, (q31_t)0x7feb9b85, (q31_t)0x7fe7e841, (q31_t)0x7fe3e616,
-  (q31_t)0x7fdf9508, (q31_t)0x7fdaf519,
-  (q31_t)0x7fd6064c, (q31_t)0x7fd0c8a3, (q31_t)0x7fcb3c23, (q31_t)0x7fc560cf, (q31_t)0x7fbf36aa, (q31_t)0x7fb8bdb8,
-  (q31_t)0x7fb1f5fc, (q31_t)0x7faadf7c,
-  (q31_t)0x7fa37a3c, (q31_t)0x7f9bc640, (q31_t)0x7f93c38c, (q31_t)0x7f8b7227, (q31_t)0x7f82d214, (q31_t)0x7f79e35a,
-  (q31_t)0x7f70a5fe, (q31_t)0x7f671a05,
-  (q31_t)0x7f5d3f75, (q31_t)0x7f531655, (q31_t)0x7f489eaa, (q31_t)0x7f3dd87c, (q31_t)0x7f32c3d1, (q31_t)0x7f2760af,
-  (q31_t)0x7f1baf1e, (q31_t)0x7f0faf25,
-  (q31_t)0x7f0360cb, (q31_t)0x7ef6c418, (q31_t)0x7ee9d914, (q31_t)0x7edc9fc6, (q31_t)0x7ecf1837, (q31_t)0x7ec14270,
-  (q31_t)0x7eb31e78, (q31_t)0x7ea4ac58,
-  (q31_t)0x7e95ec1a, (q31_t)0x7e86ddc6, (q31_t)0x7e778166, (q31_t)0x7e67d703, (q31_t)0x7e57dea7, (q31_t)0x7e47985b,
-  (q31_t)0x7e37042a, (q31_t)0x7e26221f,
-  (q31_t)0x7e14f242, (q31_t)0x7e0374a0, (q31_t)0x7df1a942, (q31_t)0x7ddf9034, (q31_t)0x7dcd2981, (q31_t)0x7dba7534,
-  (q31_t)0x7da77359, (q31_t)0x7d9423fc,
-  (q31_t)0x7d808728, (q31_t)0x7d6c9ce9, (q31_t)0x7d58654d, (q31_t)0x7d43e05e, (q31_t)0x7d2f0e2b, (q31_t)0x7d19eebf,
-  (q31_t)0x7d048228, (q31_t)0x7ceec873,
-  (q31_t)0x7cd8c1ae, (q31_t)0x7cc26de5, (q31_t)0x7cabcd28, (q31_t)0x7c94df83, (q31_t)0x7c7da505, (q31_t)0x7c661dbc,
-  (q31_t)0x7c4e49b7, (q31_t)0x7c362904,
-  (q31_t)0x7c1dbbb3, (q31_t)0x7c0501d2, (q31_t)0x7bebfb70, (q31_t)0x7bd2a89e, (q31_t)0x7bb9096b, (q31_t)0x7b9f1de6,
-  (q31_t)0x7b84e61f, (q31_t)0x7b6a6227,
-  (q31_t)0x7b4f920e, (q31_t)0x7b3475e5, (q31_t)0x7b190dbc, (q31_t)0x7afd59a4, (q31_t)0x7ae159ae, (q31_t)0x7ac50dec,
-  (q31_t)0x7aa8766f, (q31_t)0x7a8b9348,
-  (q31_t)0x7a6e648a, (q31_t)0x7a50ea47, (q31_t)0x7a332490, (q31_t)0x7a151378, (q31_t)0x79f6b711, (q31_t)0x79d80f6f,
-  (q31_t)0x79b91ca4, (q31_t)0x7999dec4,
-  (q31_t)0x797a55e0, (q31_t)0x795a820e, (q31_t)0x793a6361, (q31_t)0x7919f9ec, (q31_t)0x78f945c3, (q31_t)0x78d846fb,
-  (q31_t)0x78b6fda8, (q31_t)0x789569df,
-  (q31_t)0x78738bb3, (q31_t)0x7851633b, (q31_t)0x782ef08b, (q31_t)0x780c33b8, (q31_t)0x77e92cd9, (q31_t)0x77c5dc01,
-  (q31_t)0x77a24148, (q31_t)0x777e5cc3,
-  (q31_t)0x775a2e89, (q31_t)0x7735b6af, (q31_t)0x7710f54c, (q31_t)0x76ebea77, (q31_t)0x76c69647, (q31_t)0x76a0f8d2,
-  (q31_t)0x767b1231, (q31_t)0x7654e279,
-  (q31_t)0x762e69c4, (q31_t)0x7607a828, (q31_t)0x75e09dbd, (q31_t)0x75b94a9c, (q31_t)0x7591aedd, (q31_t)0x7569ca99,
-  (q31_t)0x75419de7, (q31_t)0x751928e0,
-  (q31_t)0x74f06b9e, (q31_t)0x74c7663a, (q31_t)0x749e18cd, (q31_t)0x74748371, (q31_t)0x744aa63f, (q31_t)0x74208150,
-  (q31_t)0x73f614c0, (q31_t)0x73cb60a8,
-  (q31_t)0x73a06522, (q31_t)0x73752249, (q31_t)0x73499838, (q31_t)0x731dc70a, (q31_t)0x72f1aed9, (q31_t)0x72c54fc1,
-  (q31_t)0x7298a9dd, (q31_t)0x726bbd48,
-  (q31_t)0x723e8a20, (q31_t)0x7211107e, (q31_t)0x71e35080, (q31_t)0x71b54a41, (q31_t)0x7186fdde, (q31_t)0x71586b74,
-  (q31_t)0x7129931f, (q31_t)0x70fa74fc,
-  (q31_t)0x70cb1128, (q31_t)0x709b67c0, (q31_t)0x706b78e3, (q31_t)0x703b44ad, (q31_t)0x700acb3c, (q31_t)0x6fda0cae,
-  (q31_t)0x6fa90921, (q31_t)0x6f77c0b3,
-  (q31_t)0x6f463383, (q31_t)0x6f1461b0, (q31_t)0x6ee24b57, (q31_t)0x6eaff099, (q31_t)0x6e7d5193, (q31_t)0x6e4a6e66,
-  (q31_t)0x6e174730, (q31_t)0x6de3dc11,
-  (q31_t)0x6db02d29, (q31_t)0x6d7c3a98, (q31_t)0x6d48047e, (q31_t)0x6d138afb, (q31_t)0x6cdece2f, (q31_t)0x6ca9ce3b,
-  (q31_t)0x6c748b3f, (q31_t)0x6c3f055d,
-  (q31_t)0x6c093cb6, (q31_t)0x6bd3316a, (q31_t)0x6b9ce39b, (q31_t)0x6b66536b, (q31_t)0x6b2f80fb, (q31_t)0x6af86c6c,
-  (q31_t)0x6ac115e2, (q31_t)0x6a897d7d,
-  (q31_t)0x6a51a361, (q31_t)0x6a1987b0, (q31_t)0x69e12a8c, (q31_t)0x69a88c19, (q31_t)0x696fac78, (q31_t)0x69368bce,
-  (q31_t)0x68fd2a3d, (q31_t)0x68c387e9,
-  (q31_t)0x6889a4f6, (q31_t)0x684f8186, (q31_t)0x68151dbe, (q31_t)0x67da79c3, (q31_t)0x679f95b7, (q31_t)0x676471c0,
-  (q31_t)0x67290e02, (q31_t)0x66ed6aa1,
-  (q31_t)0x66b187c3, (q31_t)0x6675658c, (q31_t)0x66390422, (q31_t)0x65fc63a9, (q31_t)0x65bf8447, (q31_t)0x65826622,
-  (q31_t)0x6545095f, (q31_t)0x65076e25,
-  (q31_t)0x64c99498, (q31_t)0x648b7ce0, (q31_t)0x644d2722, (q31_t)0x640e9386, (q31_t)0x63cfc231, (q31_t)0x6390b34a,
-  (q31_t)0x635166f9, (q31_t)0x6311dd64,
-  (q31_t)0x62d216b3, (q31_t)0x6292130c, (q31_t)0x6251d298, (q31_t)0x6211557e, (q31_t)0x61d09be5, (q31_t)0x618fa5f7,
-  (q31_t)0x614e73da, (q31_t)0x610d05b7,
-  (q31_t)0x60cb5bb7, (q31_t)0x60897601, (q31_t)0x604754bf, (q31_t)0x6004f819, (q31_t)0x5fc26038, (q31_t)0x5f7f8d46,
-  (q31_t)0x5f3c7f6b, (q31_t)0x5ef936d1,
-  (q31_t)0x5eb5b3a2, (q31_t)0x5e71f606, (q31_t)0x5e2dfe29, (q31_t)0x5de9cc33, (q31_t)0x5da5604f, (q31_t)0x5d60baa7,
-  (q31_t)0x5d1bdb65, (q31_t)0x5cd6c2b5,
-  (q31_t)0x5c9170bf, (q31_t)0x5c4be5b0, (q31_t)0x5c0621b2, (q31_t)0x5bc024f0, (q31_t)0x5b79ef96, (q31_t)0x5b3381ce,
-  (q31_t)0x5aecdbc5, (q31_t)0x5aa5fda5,
-  (q31_t)0x5a5ee79a, (q31_t)0x5a1799d1, (q31_t)0x59d01475, (q31_t)0x598857b2, (q31_t)0x594063b5, (q31_t)0x58f838a9,
-  (q31_t)0x58afd6bd, (q31_t)0x58673e1b,
-  (q31_t)0x581e6ef1, (q31_t)0x57d5696d, (q31_t)0x578c2dba, (q31_t)0x5742bc06, (q31_t)0x56f9147e, (q31_t)0x56af3750,
-  (q31_t)0x566524aa, (q31_t)0x561adcb9,
-  (q31_t)0x55d05faa, (q31_t)0x5585adad, (q31_t)0x553ac6ee, (q31_t)0x54efab9c, (q31_t)0x54a45be6, (q31_t)0x5458d7f9,
-  (q31_t)0x540d2005, (q31_t)0x53c13439,
-  (q31_t)0x537514c2, (q31_t)0x5328c1d0, (q31_t)0x52dc3b92, (q31_t)0x528f8238, (q31_t)0x524295f0, (q31_t)0x51f576ea,
-  (q31_t)0x51a82555, (q31_t)0x515aa162,
-  (q31_t)0x510ceb40, (q31_t)0x50bf031f, (q31_t)0x5070e92f, (q31_t)0x50229da1, (q31_t)0x4fd420a4, (q31_t)0x4f857269,
-  (q31_t)0x4f369320, (q31_t)0x4ee782fb,
-  (q31_t)0x4e984229, (q31_t)0x4e48d0dd, (q31_t)0x4df92f46, (q31_t)0x4da95d96, (q31_t)0x4d595bfe, (q31_t)0x4d092ab0,
-  (q31_t)0x4cb8c9dd, (q31_t)0x4c6839b7,
-  (q31_t)0x4c177a6e, (q31_t)0x4bc68c36, (q31_t)0x4b756f40, (q31_t)0x4b2423be, (q31_t)0x4ad2a9e2, (q31_t)0x4a8101de,
-  (q31_t)0x4a2f2be6, (q31_t)0x49dd282a,
-  (q31_t)0x498af6df, (q31_t)0x49389836, (q31_t)0x48e60c62, (q31_t)0x48935397, (q31_t)0x48406e08, (q31_t)0x47ed5be6,
-  (q31_t)0x479a1d67, (q31_t)0x4746b2bc,
-  (q31_t)0x46f31c1a, (q31_t)0x469f59b4, (q31_t)0x464b6bbe, (q31_t)0x45f7526b, (q31_t)0x45a30df0, (q31_t)0x454e9e80,
-  (q31_t)0x44fa0450, (q31_t)0x44a53f93,
-  (q31_t)0x4450507e, (q31_t)0x43fb3746, (q31_t)0x43a5f41e, (q31_t)0x4350873c, (q31_t)0x42faf0d4, (q31_t)0x42a5311b,
-  (q31_t)0x424f4845, (q31_t)0x41f93689,
-  (q31_t)0x41a2fc1a, (q31_t)0x414c992f, (q31_t)0x40f60dfb, (q31_t)0x409f5ab6, (q31_t)0x40487f94, (q31_t)0x3ff17cca,
-  (q31_t)0x3f9a5290, (q31_t)0x3f430119,
-  (q31_t)0x3eeb889c, (q31_t)0x3e93e950, (q31_t)0x3e3c2369, (q31_t)0x3de4371f, (q31_t)0x3d8c24a8, (q31_t)0x3d33ec39,
-  (q31_t)0x3cdb8e09, (q31_t)0x3c830a50,
-  (q31_t)0x3c2a6142, (q31_t)0x3bd19318, (q31_t)0x3b78a007, (q31_t)0x3b1f8848, (q31_t)0x3ac64c0f, (q31_t)0x3a6ceb96,
-  (q31_t)0x3a136712, (q31_t)0x39b9bebc,
-  (q31_t)0x395ff2c9, (q31_t)0x39060373, (q31_t)0x38abf0ef, (q31_t)0x3851bb77, (q31_t)0x37f76341, (q31_t)0x379ce885,
-  (q31_t)0x37424b7b, (q31_t)0x36e78c5b,
-  (q31_t)0x368cab5c, (q31_t)0x3631a8b8, (q31_t)0x35d684a6, (q31_t)0x357b3f5d, (q31_t)0x351fd918, (q31_t)0x34c4520d,
-  (q31_t)0x3468aa76, (q31_t)0x340ce28b,
-  (q31_t)0x33b0fa84, (q31_t)0x3354f29b, (q31_t)0x32f8cb07, (q31_t)0x329c8402, (q31_t)0x32401dc6, (q31_t)0x31e39889,
-  (q31_t)0x3186f487, (q31_t)0x312a31f8,
-  (q31_t)0x30cd5115, (q31_t)0x30705217, (q31_t)0x30133539, (q31_t)0x2fb5fab2, (q31_t)0x2f58a2be, (q31_t)0x2efb2d95,
-  (q31_t)0x2e9d9b70, (q31_t)0x2e3fec8b,
-  (q31_t)0x2de2211e, (q31_t)0x2d843964, (q31_t)0x2d263596, (q31_t)0x2cc815ee, (q31_t)0x2c69daa6, (q31_t)0x2c0b83fa,
-  (q31_t)0x2bad1221, (q31_t)0x2b4e8558,
-  (q31_t)0x2aefddd8, (q31_t)0x2a911bdc, (q31_t)0x2a323f9e, (q31_t)0x29d34958, (q31_t)0x29743946, (q31_t)0x29150fa1,
-  (q31_t)0x28b5cca5, (q31_t)0x2856708d,
-  (q31_t)0x27f6fb92, (q31_t)0x27976df1, (q31_t)0x2737c7e3, (q31_t)0x26d809a5, (q31_t)0x26783370, (q31_t)0x26184581,
-  (q31_t)0x25b84012, (q31_t)0x2558235f,
-  (q31_t)0x24f7efa2, (q31_t)0x2497a517, (q31_t)0x243743fa, (q31_t)0x23d6cc87, (q31_t)0x23763ef7, (q31_t)0x23159b88,
-  (q31_t)0x22b4e274, (q31_t)0x225413f8,
-  (q31_t)0x21f3304f, (q31_t)0x219237b5, (q31_t)0x21312a65, (q31_t)0x20d0089c, (q31_t)0x206ed295, (q31_t)0x200d888d,
-  (q31_t)0x1fac2abf, (q31_t)0x1f4ab968,
-  (q31_t)0x1ee934c3, (q31_t)0x1e879d0d, (q31_t)0x1e25f282, (q31_t)0x1dc4355e, (q31_t)0x1d6265dd, (q31_t)0x1d00843d,
-  (q31_t)0x1c9e90b8, (q31_t)0x1c3c8b8c,
-  (q31_t)0x1bda74f6, (q31_t)0x1b784d30, (q31_t)0x1b161479, (q31_t)0x1ab3cb0d, (q31_t)0x1a517128, (q31_t)0x19ef0707,
-  (q31_t)0x198c8ce7, (q31_t)0x192a0304,
-  (q31_t)0x18c7699b, (q31_t)0x1864c0ea, (q31_t)0x1802092c, (q31_t)0x179f429f, (q31_t)0x173c6d80, (q31_t)0x16d98a0c,
-  (q31_t)0x1676987f, (q31_t)0x16139918,
-  (q31_t)0x15b08c12, (q31_t)0x154d71aa, (q31_t)0x14ea4a1f, (q31_t)0x148715ae, (q31_t)0x1423d492, (q31_t)0x13c0870a,
-  (q31_t)0x135d2d53, (q31_t)0x12f9c7aa,
-  (q31_t)0x1296564d, (q31_t)0x1232d979, (q31_t)0x11cf516a, (q31_t)0x116bbe60, (q31_t)0x11082096, (q31_t)0x10a4784b,
-  (q31_t)0x1040c5bb, (q31_t)0xfdd0926,
-  (q31_t)0xf7942c7, (q31_t)0xf1572dc, (q31_t)0xeb199a4, (q31_t)0xe4db75b, (q31_t)0xde9cc40, (q31_t)0xd85d88f, (q31_t)0xd21dc87,
-  (q31_t)0xcbdd865,
-  (q31_t)0xc59cc68, (q31_t)0xbf5b8cb, (q31_t)0xb919dcf, (q31_t)0xb2d7baf, (q31_t)0xac952aa, (q31_t)0xa6522fe, (q31_t)0xa00ece8,
-  (q31_t)0x99cb0a7,
-  (q31_t)0x9386e78, (q31_t)0x8d42699, (q31_t)0x86fd947, (q31_t)0x80b86c2, (q31_t)0x7a72f45, (q31_t)0x742d311, (q31_t)0x6de7262,
-  (q31_t)0x67a0d76,
-  (q31_t)0x615a48b, (q31_t)0x5b137df, (q31_t)0x54cc7b1, (q31_t)0x4e8543e, (q31_t)0x483ddc3, (q31_t)0x41f6480, (q31_t)0x3bae8b2,
-  (q31_t)0x3566a96,
-  (q31_t)0x2f1ea6c, (q31_t)0x28d6870, (q31_t)0x228e4e2, (q31_t)0x1c45ffe, (q31_t)0x15fda03, (q31_t)0xfb5330, (q31_t)0x96cbc1,
-  (q31_t)0x3243f5
-};
-
-static const q31_t cos_factorsQ31_2048[2048] = {
-  (q31_t)0x7fffff62, (q31_t)0x7ffffa73, (q31_t)0x7ffff094, (q31_t)0x7fffe1c6, (q31_t)0x7fffce09, (q31_t)0x7fffb55c,
-  (q31_t)0x7fff97c1, (q31_t)0x7fff7536,
-  (q31_t)0x7fff4dbb, (q31_t)0x7fff2151, (q31_t)0x7ffeeff8, (q31_t)0x7ffeb9b0, (q31_t)0x7ffe7e79, (q31_t)0x7ffe3e52,
-  (q31_t)0x7ffdf93c, (q31_t)0x7ffdaf37,
-  (q31_t)0x7ffd6042, (q31_t)0x7ffd0c5f, (q31_t)0x7ffcb38c, (q31_t)0x7ffc55ca, (q31_t)0x7ffbf319, (q31_t)0x7ffb8b78,
-  (q31_t)0x7ffb1ee9, (q31_t)0x7ffaad6a,
-  (q31_t)0x7ffa36fc, (q31_t)0x7ff9bba0, (q31_t)0x7ff93b54, (q31_t)0x7ff8b619, (q31_t)0x7ff82bef, (q31_t)0x7ff79cd6,
-  (q31_t)0x7ff708ce, (q31_t)0x7ff66fd7,
-  (q31_t)0x7ff5d1f1, (q31_t)0x7ff52f1d, (q31_t)0x7ff48759, (q31_t)0x7ff3daa6, (q31_t)0x7ff32905, (q31_t)0x7ff27275,
-  (q31_t)0x7ff1b6f6, (q31_t)0x7ff0f688,
-  (q31_t)0x7ff0312c, (q31_t)0x7fef66e1, (q31_t)0x7fee97a7, (q31_t)0x7fedc37e, (q31_t)0x7fecea67, (q31_t)0x7fec0c62,
-  (q31_t)0x7feb296d, (q31_t)0x7fea418b,
-  (q31_t)0x7fe954ba, (q31_t)0x7fe862fa, (q31_t)0x7fe76c4c, (q31_t)0x7fe670b0, (q31_t)0x7fe57025, (q31_t)0x7fe46aac,
-  (q31_t)0x7fe36045, (q31_t)0x7fe250ef,
-  (q31_t)0x7fe13cac, (q31_t)0x7fe0237a, (q31_t)0x7fdf055a, (q31_t)0x7fdde24d, (q31_t)0x7fdcba51, (q31_t)0x7fdb8d67,
-  (q31_t)0x7fda5b8f, (q31_t)0x7fd924ca,
-  (q31_t)0x7fd7e917, (q31_t)0x7fd6a875, (q31_t)0x7fd562e7, (q31_t)0x7fd4186a, (q31_t)0x7fd2c900, (q31_t)0x7fd174a8,
-  (q31_t)0x7fd01b63, (q31_t)0x7fcebd31,
-  (q31_t)0x7fcd5a11, (q31_t)0x7fcbf203, (q31_t)0x7fca8508, (q31_t)0x7fc91320, (q31_t)0x7fc79c4b, (q31_t)0x7fc62089,
-  (q31_t)0x7fc49fda, (q31_t)0x7fc31a3d,
-  (q31_t)0x7fc18fb4, (q31_t)0x7fc0003e, (q31_t)0x7fbe6bdb, (q31_t)0x7fbcd28b, (q31_t)0x7fbb344e, (q31_t)0x7fb99125,
-  (q31_t)0x7fb7e90f, (q31_t)0x7fb63c0d,
-  (q31_t)0x7fb48a1e, (q31_t)0x7fb2d343, (q31_t)0x7fb1177b, (q31_t)0x7faf56c7, (q31_t)0x7fad9127, (q31_t)0x7fabc69b,
-  (q31_t)0x7fa9f723, (q31_t)0x7fa822bf,
-  (q31_t)0x7fa6496e, (q31_t)0x7fa46b32, (q31_t)0x7fa2880b, (q31_t)0x7fa09ff7, (q31_t)0x7f9eb2f8, (q31_t)0x7f9cc10d,
-  (q31_t)0x7f9aca37, (q31_t)0x7f98ce76,
-  (q31_t)0x7f96cdc9, (q31_t)0x7f94c831, (q31_t)0x7f92bdad, (q31_t)0x7f90ae3f, (q31_t)0x7f8e99e6, (q31_t)0x7f8c80a1,
-  (q31_t)0x7f8a6272, (q31_t)0x7f883f58,
-  (q31_t)0x7f861753, (q31_t)0x7f83ea64, (q31_t)0x7f81b88a, (q31_t)0x7f7f81c6, (q31_t)0x7f7d4617, (q31_t)0x7f7b057e,
-  (q31_t)0x7f78bffb, (q31_t)0x7f76758e,
-  (q31_t)0x7f742637, (q31_t)0x7f71d1f6, (q31_t)0x7f6f78cb, (q31_t)0x7f6d1ab6, (q31_t)0x7f6ab7b8, (q31_t)0x7f684fd0,
-  (q31_t)0x7f65e2ff, (q31_t)0x7f637144,
-  (q31_t)0x7f60faa0, (q31_t)0x7f5e7f13, (q31_t)0x7f5bfe9d, (q31_t)0x7f59793e, (q31_t)0x7f56eef5, (q31_t)0x7f545fc5,
-  (q31_t)0x7f51cbab, (q31_t)0x7f4f32a9,
-  (q31_t)0x7f4c94be, (q31_t)0x7f49f1eb, (q31_t)0x7f474a30, (q31_t)0x7f449d8c, (q31_t)0x7f41ec01, (q31_t)0x7f3f358d,
-  (q31_t)0x7f3c7a31, (q31_t)0x7f39b9ee,
-  (q31_t)0x7f36f4c3, (q31_t)0x7f342ab1, (q31_t)0x7f315bb7, (q31_t)0x7f2e87d6, (q31_t)0x7f2baf0d, (q31_t)0x7f28d15d,
-  (q31_t)0x7f25eec7, (q31_t)0x7f230749,
-  (q31_t)0x7f201ae5, (q31_t)0x7f1d299a, (q31_t)0x7f1a3368, (q31_t)0x7f173850, (q31_t)0x7f143852, (q31_t)0x7f11336d,
-  (q31_t)0x7f0e29a3, (q31_t)0x7f0b1af2,
-  (q31_t)0x7f08075c, (q31_t)0x7f04eedf, (q31_t)0x7f01d17d, (q31_t)0x7efeaf36, (q31_t)0x7efb8809, (q31_t)0x7ef85bf7,
-  (q31_t)0x7ef52b00, (q31_t)0x7ef1f524,
-  (q31_t)0x7eeeba62, (q31_t)0x7eeb7abc, (q31_t)0x7ee83632, (q31_t)0x7ee4ecc3, (q31_t)0x7ee19e6f, (q31_t)0x7ede4b38,
-  (q31_t)0x7edaf31c, (q31_t)0x7ed7961c,
-  (q31_t)0x7ed43438, (q31_t)0x7ed0cd70, (q31_t)0x7ecd61c5, (q31_t)0x7ec9f137, (q31_t)0x7ec67bc5, (q31_t)0x7ec3016f,
-  (q31_t)0x7ebf8237, (q31_t)0x7ebbfe1c,
-  (q31_t)0x7eb8751e, (q31_t)0x7eb4e73d, (q31_t)0x7eb1547a, (q31_t)0x7eadbcd4, (q31_t)0x7eaa204c, (q31_t)0x7ea67ee2,
-  (q31_t)0x7ea2d896, (q31_t)0x7e9f2d68,
-  (q31_t)0x7e9b7d58, (q31_t)0x7e97c867, (q31_t)0x7e940e94, (q31_t)0x7e904fe0, (q31_t)0x7e8c8c4b, (q31_t)0x7e88c3d5,
-  (q31_t)0x7e84f67e, (q31_t)0x7e812447,
-  (q31_t)0x7e7d4d2f, (q31_t)0x7e797136, (q31_t)0x7e75905d, (q31_t)0x7e71aaa4, (q31_t)0x7e6dc00c, (q31_t)0x7e69d093,
-  (q31_t)0x7e65dc3b, (q31_t)0x7e61e303,
-  (q31_t)0x7e5de4ec, (q31_t)0x7e59e1f5, (q31_t)0x7e55da20, (q31_t)0x7e51cd6c, (q31_t)0x7e4dbbd9, (q31_t)0x7e49a567,
-  (q31_t)0x7e458a17, (q31_t)0x7e4169e9,
-  (q31_t)0x7e3d44dd, (q31_t)0x7e391af3, (q31_t)0x7e34ec2b, (q31_t)0x7e30b885, (q31_t)0x7e2c8002, (q31_t)0x7e2842a2,
-  (q31_t)0x7e240064, (q31_t)0x7e1fb94a,
-  (q31_t)0x7e1b6d53, (q31_t)0x7e171c7f, (q31_t)0x7e12c6ce, (q31_t)0x7e0e6c42, (q31_t)0x7e0a0cd9, (q31_t)0x7e05a894,
-  (q31_t)0x7e013f74, (q31_t)0x7dfcd178,
-  (q31_t)0x7df85ea0, (q31_t)0x7df3e6ee, (q31_t)0x7def6a60, (q31_t)0x7deae8f7, (q31_t)0x7de662b3, (q31_t)0x7de1d795,
-  (q31_t)0x7ddd479d, (q31_t)0x7dd8b2ca,
-  (q31_t)0x7dd4191d, (q31_t)0x7dcf7a96, (q31_t)0x7dcad736, (q31_t)0x7dc62efc, (q31_t)0x7dc181e8, (q31_t)0x7dbccffc,
-  (q31_t)0x7db81936, (q31_t)0x7db35d98,
-  (q31_t)0x7dae9d21, (q31_t)0x7da9d7d2, (q31_t)0x7da50dab, (q31_t)0x7da03eab, (q31_t)0x7d9b6ad3, (q31_t)0x7d969224,
-  (q31_t)0x7d91b49e, (q31_t)0x7d8cd240,
-  (q31_t)0x7d87eb0a, (q31_t)0x7d82fefe, (q31_t)0x7d7e0e1c, (q31_t)0x7d791862, (q31_t)0x7d741dd2, (q31_t)0x7d6f1e6c,
-  (q31_t)0x7d6a1a31, (q31_t)0x7d65111f,
-  (q31_t)0x7d600338, (q31_t)0x7d5af07b, (q31_t)0x7d55d8e9, (q31_t)0x7d50bc82, (q31_t)0x7d4b9b46, (q31_t)0x7d467536,
-  (q31_t)0x7d414a51, (q31_t)0x7d3c1a98,
-  (q31_t)0x7d36e60b, (q31_t)0x7d31acaa, (q31_t)0x7d2c6e76, (q31_t)0x7d272b6e, (q31_t)0x7d21e393, (q31_t)0x7d1c96e5,
-  (q31_t)0x7d174564, (q31_t)0x7d11ef11,
-  (q31_t)0x7d0c93eb, (q31_t)0x7d0733f3, (q31_t)0x7d01cf29, (q31_t)0x7cfc658d, (q31_t)0x7cf6f720, (q31_t)0x7cf183e1,
-  (q31_t)0x7cec0bd1, (q31_t)0x7ce68ef0,
-  (q31_t)0x7ce10d3f, (q31_t)0x7cdb86bd, (q31_t)0x7cd5fb6a, (q31_t)0x7cd06b48, (q31_t)0x7ccad656, (q31_t)0x7cc53c94,
-  (q31_t)0x7cbf9e03, (q31_t)0x7cb9faa2,
-  (q31_t)0x7cb45272, (q31_t)0x7caea574, (q31_t)0x7ca8f3a7, (q31_t)0x7ca33d0c, (q31_t)0x7c9d81a3, (q31_t)0x7c97c16b,
-  (q31_t)0x7c91fc66, (q31_t)0x7c8c3294,
-  (q31_t)0x7c8663f4, (q31_t)0x7c809088, (q31_t)0x7c7ab84e, (q31_t)0x7c74db48, (q31_t)0x7c6ef976, (q31_t)0x7c6912d7,
-  (q31_t)0x7c63276d, (q31_t)0x7c5d3737,
-  (q31_t)0x7c574236, (q31_t)0x7c514869, (q31_t)0x7c4b49d2, (q31_t)0x7c45466f, (q31_t)0x7c3f3e42, (q31_t)0x7c39314b,
-  (q31_t)0x7c331f8a, (q31_t)0x7c2d08ff,
-  (q31_t)0x7c26edab, (q31_t)0x7c20cd8d, (q31_t)0x7c1aa8a6, (q31_t)0x7c147ef6, (q31_t)0x7c0e507e, (q31_t)0x7c081d3d,
-  (q31_t)0x7c01e534, (q31_t)0x7bfba863,
-  (q31_t)0x7bf566cb, (q31_t)0x7bef206b, (q31_t)0x7be8d544, (q31_t)0x7be28556, (q31_t)0x7bdc30a1, (q31_t)0x7bd5d726,
-  (q31_t)0x7bcf78e5, (q31_t)0x7bc915dd,
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-  (q31_t)0xa2681ed, (q31_t)0xa0d7403, (q31_t)0x9f465b5, (q31_t)0x9db5706, (q31_t)0x9c247f5, (q31_t)0x9a93884, (q31_t)0x99028b3,
-  (q31_t)0x9771884,
-  (q31_t)0x95e07f8, (q31_t)0x944f70f, (q31_t)0x92be5ca, (q31_t)0x912d42c, (q31_t)0x8f9c233, (q31_t)0x8e0afe2, (q31_t)0x8c79d3a,
-  (q31_t)0x8ae8a3a,
-  (q31_t)0x89576e5, (q31_t)0x87c633c, (q31_t)0x8634f3e, (q31_t)0x84a3aee, (q31_t)0x831264c, (q31_t)0x8181159, (q31_t)0x7fefc16,
-  (q31_t)0x7e5e685,
-  (q31_t)0x7ccd0a5, (q31_t)0x7b3ba78, (q31_t)0x79aa400, (q31_t)0x7818d3c, (q31_t)0x768762e, (q31_t)0x74f5ed7, (q31_t)0x7364738,
-  (q31_t)0x71d2f52,
-  (q31_t)0x7041726, (q31_t)0x6eafeb4, (q31_t)0x6d1e5fe, (q31_t)0x6b8cd05, (q31_t)0x69fb3c9, (q31_t)0x6869a4c, (q31_t)0x66d808f,
-  (q31_t)0x6546692,
-  (q31_t)0x63b4c57, (q31_t)0x62231de, (q31_t)0x6091729, (q31_t)0x5effc38, (q31_t)0x5d6e10c, (q31_t)0x5bdc5a7, (q31_t)0x5a4aa09,
-  (q31_t)0x58b8e34,
-  (q31_t)0x5727228, (q31_t)0x55955e6, (q31_t)0x540396f, (q31_t)0x5271cc4, (q31_t)0x50dffe7, (q31_t)0x4f4e2d8, (q31_t)0x4dbc597,
-  (q31_t)0x4c2a827,
-  (q31_t)0x4a98a88, (q31_t)0x4906cbb, (q31_t)0x4774ec1, (q31_t)0x45e309a, (q31_t)0x4451249, (q31_t)0x42bf3cd, (q31_t)0x412d528,
-  (q31_t)0x3f9b65b,
-  (q31_t)0x3e09767, (q31_t)0x3c7784d, (q31_t)0x3ae590d, (q31_t)0x39539a9, (q31_t)0x37c1a22, (q31_t)0x362fa78, (q31_t)0x349daac,
-  (q31_t)0x330bac1,
-  (q31_t)0x3179ab5, (q31_t)0x2fe7a8c, (q31_t)0x2e55a44, (q31_t)0x2cc39e1, (q31_t)0x2b31961, (q31_t)0x299f8c7, (q31_t)0x280d813,
-  (q31_t)0x267b747,
-  (q31_t)0x24e9662, (q31_t)0x2357567, (q31_t)0x21c5457, (q31_t)0x2033331, (q31_t)0x1ea11f7, (q31_t)0x1d0f0ab, (q31_t)0x1b7cf4d,
-  (q31_t)0x19eaddd,
-  (q31_t)0x1858c5e, (q31_t)0x16c6ad0, (q31_t)0x1534934, (q31_t)0x13a278a, (q31_t)0x12105d5, (q31_t)0x107e414, (q31_t)0xeec249,
-  (q31_t)0xd5a075,
-  (q31_t)0xbc7e99, (q31_t)0xa35cb5, (q31_t)0x8a3acb, (q31_t)0x7118dc, (q31_t)0x57f6e9, (q31_t)0x3ed4f2, (q31_t)0x25b2f8,
-  (q31_t)0xc90fe
-};
-
-static const q31_t cos_factorsQ31_8192[8192] = {
-  (q31_t)0x7ffffff6, (q31_t)0x7fffffa7, (q31_t)0x7fffff09, (q31_t)0x7ffffe1c, (q31_t)0x7ffffce1, (q31_t)0x7ffffb56,
-    (q31_t)0x7ffff97c, (q31_t)0x7ffff753,
-  (q31_t)0x7ffff4dc, (q31_t)0x7ffff215, (q31_t)0x7fffef00, (q31_t)0x7fffeb9b, (q31_t)0x7fffe7e8, (q31_t)0x7fffe3e5,
-    (q31_t)0x7fffdf94, (q31_t)0x7fffdaf3,
-  (q31_t)0x7fffd604, (q31_t)0x7fffd0c6, (q31_t)0x7fffcb39, (q31_t)0x7fffc55c, (q31_t)0x7fffbf31, (q31_t)0x7fffb8b7,
-    (q31_t)0x7fffb1ee, (q31_t)0x7fffaad6,
-  (q31_t)0x7fffa36f, (q31_t)0x7fff9bb9, (q31_t)0x7fff93b4, (q31_t)0x7fff8b61, (q31_t)0x7fff82be, (q31_t)0x7fff79cc,
-    (q31_t)0x7fff708b, (q31_t)0x7fff66fc,
-  (q31_t)0x7fff5d1d, (q31_t)0x7fff52ef, (q31_t)0x7fff4873, (q31_t)0x7fff3da8, (q31_t)0x7fff328d, (q31_t)0x7fff2724,
-    (q31_t)0x7fff1b6b, (q31_t)0x7fff0f64,
-  (q31_t)0x7fff030e, (q31_t)0x7ffef669, (q31_t)0x7ffee975, (q31_t)0x7ffedc31, (q31_t)0x7ffece9f, (q31_t)0x7ffec0be,
-    (q31_t)0x7ffeb28e, (q31_t)0x7ffea40f,
-  (q31_t)0x7ffe9542, (q31_t)0x7ffe8625, (q31_t)0x7ffe76b9, (q31_t)0x7ffe66fe, (q31_t)0x7ffe56f5, (q31_t)0x7ffe469c,
-    (q31_t)0x7ffe35f4, (q31_t)0x7ffe24fe,
-  (q31_t)0x7ffe13b8, (q31_t)0x7ffe0224, (q31_t)0x7ffdf040, (q31_t)0x7ffdde0e, (q31_t)0x7ffdcb8d, (q31_t)0x7ffdb8bc,
-    (q31_t)0x7ffda59d, (q31_t)0x7ffd922f,
-  (q31_t)0x7ffd7e72, (q31_t)0x7ffd6a66, (q31_t)0x7ffd560b, (q31_t)0x7ffd4161, (q31_t)0x7ffd2c68, (q31_t)0x7ffd1720,
-    (q31_t)0x7ffd0189, (q31_t)0x7ffceba4,
-  (q31_t)0x7ffcd56f, (q31_t)0x7ffcbeeb, (q31_t)0x7ffca819, (q31_t)0x7ffc90f7, (q31_t)0x7ffc7987, (q31_t)0x7ffc61c7,
-    (q31_t)0x7ffc49b9, (q31_t)0x7ffc315b,
-  (q31_t)0x7ffc18af, (q31_t)0x7ffbffb4, (q31_t)0x7ffbe66a, (q31_t)0x7ffbccd0, (q31_t)0x7ffbb2e8, (q31_t)0x7ffb98b1,
-    (q31_t)0x7ffb7e2b, (q31_t)0x7ffb6356,
-  (q31_t)0x7ffb4833, (q31_t)0x7ffb2cc0, (q31_t)0x7ffb10fe, (q31_t)0x7ffaf4ed, (q31_t)0x7ffad88e, (q31_t)0x7ffabbdf,
-    (q31_t)0x7ffa9ee2, (q31_t)0x7ffa8195,
-  (q31_t)0x7ffa63fa, (q31_t)0x7ffa460f, (q31_t)0x7ffa27d6, (q31_t)0x7ffa094e, (q31_t)0x7ff9ea76, (q31_t)0x7ff9cb50,
-    (q31_t)0x7ff9abdb, (q31_t)0x7ff98c17,
-  (q31_t)0x7ff96c04, (q31_t)0x7ff94ba2, (q31_t)0x7ff92af1, (q31_t)0x7ff909f2, (q31_t)0x7ff8e8a3, (q31_t)0x7ff8c705,
-    (q31_t)0x7ff8a519, (q31_t)0x7ff882dd,
-  (q31_t)0x7ff86053, (q31_t)0x7ff83d79, (q31_t)0x7ff81a51, (q31_t)0x7ff7f6da, (q31_t)0x7ff7d313, (q31_t)0x7ff7aefe,
-    (q31_t)0x7ff78a9a, (q31_t)0x7ff765e7,
-  (q31_t)0x7ff740e5, (q31_t)0x7ff71b94, (q31_t)0x7ff6f5f4, (q31_t)0x7ff6d005, (q31_t)0x7ff6a9c8, (q31_t)0x7ff6833b,
-    (q31_t)0x7ff65c5f, (q31_t)0x7ff63535,
-  (q31_t)0x7ff60dbb, (q31_t)0x7ff5e5f3, (q31_t)0x7ff5bddc, (q31_t)0x7ff59576, (q31_t)0x7ff56cc0, (q31_t)0x7ff543bc,
-    (q31_t)0x7ff51a69, (q31_t)0x7ff4f0c7,
-  (q31_t)0x7ff4c6d6, (q31_t)0x7ff49c96, (q31_t)0x7ff47208, (q31_t)0x7ff4472a, (q31_t)0x7ff41bfd, (q31_t)0x7ff3f082,
-    (q31_t)0x7ff3c4b7, (q31_t)0x7ff3989e,
-  (q31_t)0x7ff36c36, (q31_t)0x7ff33f7e, (q31_t)0x7ff31278, (q31_t)0x7ff2e523, (q31_t)0x7ff2b77f, (q31_t)0x7ff2898c,
-    (q31_t)0x7ff25b4a, (q31_t)0x7ff22cb9,
-  (q31_t)0x7ff1fdd9, (q31_t)0x7ff1ceab, (q31_t)0x7ff19f2d, (q31_t)0x7ff16f61, (q31_t)0x7ff13f45, (q31_t)0x7ff10edb,
-    (q31_t)0x7ff0de22, (q31_t)0x7ff0ad19,
-  (q31_t)0x7ff07bc2, (q31_t)0x7ff04a1c, (q31_t)0x7ff01827, (q31_t)0x7fefe5e4, (q31_t)0x7fefb351, (q31_t)0x7fef806f,
-    (q31_t)0x7fef4d3e, (q31_t)0x7fef19bf,
-  (q31_t)0x7feee5f0, (q31_t)0x7feeb1d3, (q31_t)0x7fee7d67, (q31_t)0x7fee48ac, (q31_t)0x7fee13a1, (q31_t)0x7fedde48,
-    (q31_t)0x7feda8a0, (q31_t)0x7fed72aa,
-  (q31_t)0x7fed3c64, (q31_t)0x7fed05cf, (q31_t)0x7fecceec, (q31_t)0x7fec97b9, (q31_t)0x7fec6038, (q31_t)0x7fec2867,
-    (q31_t)0x7febf048, (q31_t)0x7febb7da,
-  (q31_t)0x7feb7f1d, (q31_t)0x7feb4611, (q31_t)0x7feb0cb6, (q31_t)0x7fead30c, (q31_t)0x7fea9914, (q31_t)0x7fea5ecc,
-    (q31_t)0x7fea2436, (q31_t)0x7fe9e950,
-  (q31_t)0x7fe9ae1c, (q31_t)0x7fe97299, (q31_t)0x7fe936c7, (q31_t)0x7fe8faa6, (q31_t)0x7fe8be36, (q31_t)0x7fe88177,
-    (q31_t)0x7fe84469, (q31_t)0x7fe8070d,
-  (q31_t)0x7fe7c961, (q31_t)0x7fe78b67, (q31_t)0x7fe74d1e, (q31_t)0x7fe70e85, (q31_t)0x7fe6cf9e, (q31_t)0x7fe69068,
-    (q31_t)0x7fe650e3, (q31_t)0x7fe61110,
-  (q31_t)0x7fe5d0ed, (q31_t)0x7fe5907b, (q31_t)0x7fe54fbb, (q31_t)0x7fe50eac, (q31_t)0x7fe4cd4d, (q31_t)0x7fe48ba0,
-    (q31_t)0x7fe449a4, (q31_t)0x7fe40759,
-  (q31_t)0x7fe3c4bf, (q31_t)0x7fe381d7, (q31_t)0x7fe33e9f, (q31_t)0x7fe2fb19, (q31_t)0x7fe2b743, (q31_t)0x7fe2731f,
-    (q31_t)0x7fe22eac, (q31_t)0x7fe1e9ea,
-  (q31_t)0x7fe1a4d9, (q31_t)0x7fe15f79, (q31_t)0x7fe119cb, (q31_t)0x7fe0d3cd, (q31_t)0x7fe08d81, (q31_t)0x7fe046e5,
-    (q31_t)0x7fdffffb, (q31_t)0x7fdfb8c2,
-  (q31_t)0x7fdf713a, (q31_t)0x7fdf2963, (q31_t)0x7fdee13e, (q31_t)0x7fde98c9, (q31_t)0x7fde5006, (q31_t)0x7fde06f3,
-    (q31_t)0x7fddbd92, (q31_t)0x7fdd73e2,
-  (q31_t)0x7fdd29e3, (q31_t)0x7fdcdf95, (q31_t)0x7fdc94f9, (q31_t)0x7fdc4a0d, (q31_t)0x7fdbfed3, (q31_t)0x7fdbb349,
-    (q31_t)0x7fdb6771, (q31_t)0x7fdb1b4a,
-  (q31_t)0x7fdaced4, (q31_t)0x7fda820f, (q31_t)0x7fda34fc, (q31_t)0x7fd9e799, (q31_t)0x7fd999e8, (q31_t)0x7fd94be8,
-    (q31_t)0x7fd8fd98, (q31_t)0x7fd8aefa,
-  (q31_t)0x7fd8600e, (q31_t)0x7fd810d2, (q31_t)0x7fd7c147, (q31_t)0x7fd7716e, (q31_t)0x7fd72146, (q31_t)0x7fd6d0cf,
-    (q31_t)0x7fd68009, (q31_t)0x7fd62ef4,
-  (q31_t)0x7fd5dd90, (q31_t)0x7fd58bdd, (q31_t)0x7fd539dc, (q31_t)0x7fd4e78c, (q31_t)0x7fd494ed, (q31_t)0x7fd441ff,
-    (q31_t)0x7fd3eec2, (q31_t)0x7fd39b36,
-  (q31_t)0x7fd3475c, (q31_t)0x7fd2f332, (q31_t)0x7fd29eba, (q31_t)0x7fd249f3, (q31_t)0x7fd1f4dd, (q31_t)0x7fd19f78,
-    (q31_t)0x7fd149c5, (q31_t)0x7fd0f3c2,
-  (q31_t)0x7fd09d71, (q31_t)0x7fd046d1, (q31_t)0x7fcfefe2, (q31_t)0x7fcf98a4, (q31_t)0x7fcf4117, (q31_t)0x7fcee93c,
-    (q31_t)0x7fce9112, (q31_t)0x7fce3898,
-  (q31_t)0x7fcddfd0, (q31_t)0x7fcd86b9, (q31_t)0x7fcd2d54, (q31_t)0x7fccd39f, (q31_t)0x7fcc799c, (q31_t)0x7fcc1f4a,
-    (q31_t)0x7fcbc4a9, (q31_t)0x7fcb69b9,
-  (q31_t)0x7fcb0e7a, (q31_t)0x7fcab2ed, (q31_t)0x7fca5710, (q31_t)0x7fc9fae5, (q31_t)0x7fc99e6b, (q31_t)0x7fc941a2,
-    (q31_t)0x7fc8e48b, (q31_t)0x7fc88724,
-  (q31_t)0x7fc8296f, (q31_t)0x7fc7cb6b, (q31_t)0x7fc76d18, (q31_t)0x7fc70e76, (q31_t)0x7fc6af86, (q31_t)0x7fc65046,
-    (q31_t)0x7fc5f0b8, (q31_t)0x7fc590db,
-  (q31_t)0x7fc530af, (q31_t)0x7fc4d035, (q31_t)0x7fc46f6b, (q31_t)0x7fc40e53, (q31_t)0x7fc3acec, (q31_t)0x7fc34b36,
-    (q31_t)0x7fc2e931, (q31_t)0x7fc286de,
-  (q31_t)0x7fc2243b, (q31_t)0x7fc1c14a, (q31_t)0x7fc15e0a, (q31_t)0x7fc0fa7b, (q31_t)0x7fc0969e, (q31_t)0x7fc03271,
-    (q31_t)0x7fbfcdf6, (q31_t)0x7fbf692c,
-  (q31_t)0x7fbf0414, (q31_t)0x7fbe9eac, (q31_t)0x7fbe38f6, (q31_t)0x7fbdd2f0, (q31_t)0x7fbd6c9c, (q31_t)0x7fbd05fa,
-    (q31_t)0x7fbc9f08, (q31_t)0x7fbc37c8,
-  (q31_t)0x7fbbd039, (q31_t)0x7fbb685b, (q31_t)0x7fbb002e, (q31_t)0x7fba97b2, (q31_t)0x7fba2ee8, (q31_t)0x7fb9c5cf,
-    (q31_t)0x7fb95c67, (q31_t)0x7fb8f2b0,
-  (q31_t)0x7fb888ab, (q31_t)0x7fb81e57, (q31_t)0x7fb7b3b4, (q31_t)0x7fb748c2, (q31_t)0x7fb6dd81, (q31_t)0x7fb671f2,
-    (q31_t)0x7fb60614, (q31_t)0x7fb599e7,
-  (q31_t)0x7fb52d6b, (q31_t)0x7fb4c0a1, (q31_t)0x7fb45387, (q31_t)0x7fb3e61f, (q31_t)0x7fb37869, (q31_t)0x7fb30a63,
-    (q31_t)0x7fb29c0f, (q31_t)0x7fb22d6c,
-  (q31_t)0x7fb1be7a, (q31_t)0x7fb14f39, (q31_t)0x7fb0dfaa, (q31_t)0x7fb06fcb, (q31_t)0x7fafff9e, (q31_t)0x7faf8f23,
-    (q31_t)0x7faf1e58, (q31_t)0x7faead3f,
-  (q31_t)0x7fae3bd7, (q31_t)0x7fadca20, (q31_t)0x7fad581b, (q31_t)0x7face5c6, (q31_t)0x7fac7323, (q31_t)0x7fac0031,
-    (q31_t)0x7fab8cf1, (q31_t)0x7fab1962,
-  (q31_t)0x7faaa584, (q31_t)0x7faa3157, (q31_t)0x7fa9bcdb, (q31_t)0x7fa94811, (q31_t)0x7fa8d2f8, (q31_t)0x7fa85d90,
-    (q31_t)0x7fa7e7d9, (q31_t)0x7fa771d4,
-  (q31_t)0x7fa6fb80, (q31_t)0x7fa684dd, (q31_t)0x7fa60dec, (q31_t)0x7fa596ac, (q31_t)0x7fa51f1d, (q31_t)0x7fa4a73f,
-    (q31_t)0x7fa42f12, (q31_t)0x7fa3b697,
-  (q31_t)0x7fa33dcd, (q31_t)0x7fa2c4b5, (q31_t)0x7fa24b4d, (q31_t)0x7fa1d197, (q31_t)0x7fa15792, (q31_t)0x7fa0dd3f,
-    (q31_t)0x7fa0629c, (q31_t)0x7f9fe7ab,
-  (q31_t)0x7f9f6c6b, (q31_t)0x7f9ef0dd, (q31_t)0x7f9e7500, (q31_t)0x7f9df8d4, (q31_t)0x7f9d7c59, (q31_t)0x7f9cff90,
-    (q31_t)0x7f9c8278, (q31_t)0x7f9c0511,
-  (q31_t)0x7f9b875b, (q31_t)0x7f9b0957, (q31_t)0x7f9a8b04, (q31_t)0x7f9a0c62, (q31_t)0x7f998d72, (q31_t)0x7f990e33,
-    (q31_t)0x7f988ea5, (q31_t)0x7f980ec8,
-  (q31_t)0x7f978e9d, (q31_t)0x7f970e23, (q31_t)0x7f968d5b, (q31_t)0x7f960c43, (q31_t)0x7f958add, (q31_t)0x7f950929,
-    (q31_t)0x7f948725, (q31_t)0x7f9404d3,
-  (q31_t)0x7f938232, (q31_t)0x7f92ff43, (q31_t)0x7f927c04, (q31_t)0x7f91f878, (q31_t)0x7f91749c, (q31_t)0x7f90f072,
-    (q31_t)0x7f906bf9, (q31_t)0x7f8fe731,
-  (q31_t)0x7f8f621b, (q31_t)0x7f8edcb6, (q31_t)0x7f8e5702, (q31_t)0x7f8dd0ff, (q31_t)0x7f8d4aae, (q31_t)0x7f8cc40f,
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-  (q31_t)0x5e04b43, (q31_t)0x5da0475, (q31_t)0x5d3bda3, (q31_t)0x5cd76cd, (q31_t)0x5c72ff4, (q31_t)0x5c0e917, (q31_t)0x5baa237,
-    (q31_t)0x5b45b53,
-  (q31_t)0x5ae146b, (q31_t)0x5a7cd80, (q31_t)0x5a18692, (q31_t)0x59b3fa0, (q31_t)0x594f8aa, (q31_t)0x58eb1b2, (q31_t)0x5886ab5,
-    (q31_t)0x58223b6,
-  (q31_t)0x57bdcb3, (q31_t)0x57595ac, (q31_t)0x56f4ea2, (q31_t)0x5690795, (q31_t)0x562c085, (q31_t)0x55c7971, (q31_t)0x556325a,
-    (q31_t)0x54feb3f,
-  (q31_t)0x549a422, (q31_t)0x5435d01, (q31_t)0x53d15dd, (q31_t)0x536ceb5, (q31_t)0x530878a, (q31_t)0x52a405d, (q31_t)0x523f92c,
-    (q31_t)0x51db1f7,
-  (q31_t)0x5176ac0, (q31_t)0x5112385, (q31_t)0x50adc48, (q31_t)0x5049507, (q31_t)0x4fe4dc3, (q31_t)0x4f8067c, (q31_t)0x4f1bf32,
-    (q31_t)0x4eb77e5,
-  (q31_t)0x4e53095, (q31_t)0x4dee942, (q31_t)0x4d8a1ec, (q31_t)0x4d25a93, (q31_t)0x4cc1337, (q31_t)0x4c5cbd8, (q31_t)0x4bf8476,
-    (q31_t)0x4b93d11,
-  (q31_t)0x4b2f5a9, (q31_t)0x4acae3e, (q31_t)0x4a666d1, (q31_t)0x4a01f60, (q31_t)0x499d7ed, (q31_t)0x4939077, (q31_t)0x48d48fe,
-    (q31_t)0x4870182,
-  (q31_t)0x480ba04, (q31_t)0x47a7282, (q31_t)0x4742afe, (q31_t)0x46de377, (q31_t)0x4679bee, (q31_t)0x4615461, (q31_t)0x45b0cd2,
-    (q31_t)0x454c541,
-  (q31_t)0x44e7dac, (q31_t)0x4483615, (q31_t)0x441ee7c, (q31_t)0x43ba6df, (q31_t)0x4355f40, (q31_t)0x42f179f, (q31_t)0x428cffb,
-    (q31_t)0x4228854,
-  (q31_t)0x41c40ab, (q31_t)0x415f8ff, (q31_t)0x40fb151, (q31_t)0x40969a0, (q31_t)0x40321ed, (q31_t)0x3fcda37, (q31_t)0x3f6927f,
-    (q31_t)0x3f04ac4,
-  (q31_t)0x3ea0307, (q31_t)0x3e3bb48, (q31_t)0x3dd7386, (q31_t)0x3d72bc2, (q31_t)0x3d0e3fb, (q31_t)0x3ca9c32, (q31_t)0x3c45467,
-    (q31_t)0x3be0c99,
-  (q31_t)0x3b7c4c9, (q31_t)0x3b17cf7, (q31_t)0x3ab3523, (q31_t)0x3a4ed4c, (q31_t)0x39ea573, (q31_t)0x3985d97, (q31_t)0x39215ba,
-    (q31_t)0x38bcdda,
-  (q31_t)0x38585f8, (q31_t)0x37f3e14, (q31_t)0x378f62e, (q31_t)0x372ae46, (q31_t)0x36c665b, (q31_t)0x3661e6f, (q31_t)0x35fd680,
-    (q31_t)0x3598e8f,
-  (q31_t)0x353469c, (q31_t)0x34cfea8, (q31_t)0x346b6b1, (q31_t)0x3406eb8, (q31_t)0x33a26bd, (q31_t)0x333dec0, (q31_t)0x32d96c1,
-    (q31_t)0x3274ec0,
-  (q31_t)0x32106bd, (q31_t)0x31abeb9, (q31_t)0x31476b2, (q31_t)0x30e2ea9, (q31_t)0x307e69f, (q31_t)0x3019e93, (q31_t)0x2fb5684,
-    (q31_t)0x2f50e74,
-  (q31_t)0x2eec663, (q31_t)0x2e87e4f, (q31_t)0x2e2363a, (q31_t)0x2dbee22, (q31_t)0x2d5a609, (q31_t)0x2cf5def, (q31_t)0x2c915d2,
-    (q31_t)0x2c2cdb4,
-  (q31_t)0x2bc8594, (q31_t)0x2b63d73, (q31_t)0x2aff54f, (q31_t)0x2a9ad2a, (q31_t)0x2a36504, (q31_t)0x29d1cdc, (q31_t)0x296d4b2,
-    (q31_t)0x2908c87,
-  (q31_t)0x28a445a, (q31_t)0x283fc2b, (q31_t)0x27db3fb, (q31_t)0x2776bc9, (q31_t)0x2712396, (q31_t)0x26adb62, (q31_t)0x264932b,
-    (q31_t)0x25e4af4,
-  (q31_t)0x25802bb, (q31_t)0x251ba80, (q31_t)0x24b7244, (q31_t)0x2452a07, (q31_t)0x23ee1c8, (q31_t)0x2389988, (q31_t)0x2325147,
-    (q31_t)0x22c0904,
-  (q31_t)0x225c0bf, (q31_t)0x21f787a, (q31_t)0x2193033, (q31_t)0x212e7eb, (q31_t)0x20c9fa1, (q31_t)0x2065757, (q31_t)0x2000f0b,
-    (q31_t)0x1f9c6be,
-  (q31_t)0x1f37e6f, (q31_t)0x1ed3620, (q31_t)0x1e6edcf, (q31_t)0x1e0a57d, (q31_t)0x1da5d2a, (q31_t)0x1d414d6, (q31_t)0x1cdcc80,
-    (q31_t)0x1c7842a,
-  (q31_t)0x1c13bd2, (q31_t)0x1baf37a, (q31_t)0x1b4ab20, (q31_t)0x1ae62c5, (q31_t)0x1a81a69, (q31_t)0x1a1d20c, (q31_t)0x19b89ae,
-    (q31_t)0x1954150,
-  (q31_t)0x18ef8f0, (q31_t)0x188b08f, (q31_t)0x182682d, (q31_t)0x17c1fcb, (q31_t)0x175d767, (q31_t)0x16f8f03, (q31_t)0x169469d,
-    (q31_t)0x162fe37,
-  (q31_t)0x15cb5d0, (q31_t)0x1566d68, (q31_t)0x15024ff, (q31_t)0x149dc96, (q31_t)0x143942b, (q31_t)0x13d4bc0, (q31_t)0x1370354,
-    (q31_t)0x130bae7,
-  (q31_t)0x12a727a, (q31_t)0x1242a0c, (q31_t)0x11de19d, (q31_t)0x117992e, (q31_t)0x11150be, (q31_t)0x10b084d, (q31_t)0x104bfdb,
-    (q31_t)0xfe7769,
-  (q31_t)0xf82ef6, (q31_t)0xf1e683, (q31_t)0xeb9e0f, (q31_t)0xe5559b, (q31_t)0xdf0d26, (q31_t)0xd8c4b0, (q31_t)0xd27c3a,
-    (q31_t)0xcc33c3,
-  (q31_t)0xc5eb4c, (q31_t)0xbfa2d5, (q31_t)0xb95a5d, (q31_t)0xb311e4, (q31_t)0xacc96b, (q31_t)0xa680f2, (q31_t)0xa03878,
-    (q31_t)0x99effe,
-  (q31_t)0x93a784, (q31_t)0x8d5f09, (q31_t)0x87168e, (q31_t)0x80ce12, (q31_t)0x7a8597, (q31_t)0x743d1a, (q31_t)0x6df49e,
-    (q31_t)0x67ac21,
-  (q31_t)0x6163a5, (q31_t)0x5b1b27, (q31_t)0x54d2aa, (q31_t)0x4e8a2c, (q31_t)0x4841af, (q31_t)0x41f931, (q31_t)0x3bb0b3,
-    (q31_t)0x356835,
-  (q31_t)0x2f1fb6, (q31_t)0x28d738, (q31_t)0x228eb9, (q31_t)0x1c463b, (q31_t)0x15fdbc, (q31_t)0xfb53d, (q31_t)0x96cbe, (q31_t)0x3243f
-};
-
-/**
- * @} end of DCT4_IDCT4_Table group
- */
-
-/**
- * @addtogroup DCT4_IDCT4
- * @{
- */
-
-/**
- * @brief  Initialization function for the Q31 DCT4/IDCT4.
- * @param[in,out] *S         points to an instance of Q31 DCT4/IDCT4 structure.
- * @param[in]     *S_RFFT    points to an instance of Q31 RFFT/RIFFT structure
- * @param[in]     *S_CFFT    points to an instance of Q31 CFFT/CIFFT structure
- * @param[in]     N          length of the DCT4.
- * @param[in]     Nby2       half of the length of the DCT4.
- * @param[in]     normalize  normalizing factor.
- * @return		  arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
- * \par Normalizing factor:
- * The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>.
- * Normalizing factors in 1.31 format are mentioned in the table below for different DCT sizes:
- * \image html dct4NormalizingQ31Table.gif
+                   \image html dct4NormalizingQ31Table.gif
  */
 
 arm_status arm_dct4_init_q31(
@@ -7622,20 +66,9 @@
   uint16_t Nby2,
   q31_t normalize)
 {
-  /*  Initialise the default arm status */
+  /* Initialize the default arm status */
   arm_status status = ARM_MATH_SUCCESS;
 
-  /* Initializing the pointer array with the weight table base addresses of different lengths */
-  q31_t *twiddlePtr[4] = { (q31_t *) WeightsQ31_128, (q31_t *) WeightsQ31_512,
-    (q31_t *) WeightsQ31_2048, (q31_t *) WeightsQ31_8192
-  };
-
-  /* Initializing the pointer array with the cos factor table base addresses of different lengths */
-  q31_t *pCosFactor[4] =
-    { (q31_t *) cos_factorsQ31_128, (q31_t *) cos_factorsQ31_512,
-    (q31_t *) cos_factorsQ31_2048, (q31_t *) cos_factorsQ31_8192
-  };
-
   /* Initialize the DCT4 length */
   S->N = N;
 
@@ -7653,34 +86,45 @@
 
   switch (N)
   {
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_8192)
     /* Initialize the table modifier values */
   case 8192U:
-    S->pTwiddle = twiddlePtr[3];
-    S->pCosFactor = pCosFactor[3];
+    S->pTwiddle = WeightsQ31_8192;
+    S->pCosFactor = cos_factorsQ31_8192;
     break;
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_2048)
   case 2048U:
-    S->pTwiddle = twiddlePtr[2];
-    S->pCosFactor = pCosFactor[2];
+    S->pTwiddle = WeightsQ31_2048;
+    S->pCosFactor = cos_factorsQ31_2048;
     break;
+  #endif 
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_512)
   case 512U:
-    S->pTwiddle = twiddlePtr[1];
-    S->pCosFactor = pCosFactor[1];
+    S->pTwiddle = WeightsQ31_512;
+    S->pCosFactor = cos_factorsQ31_512;
     break;
+  #endif 
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_128)
   case 128U:
-    S->pTwiddle = twiddlePtr[0];
-    S->pCosFactor = pCosFactor[0];
+    S->pTwiddle = WeightsQ31_128;
+    S->pCosFactor = cos_factorsQ31_128;
     break;
+  #endif
   default:
     status = ARM_MATH_ARGUMENT_ERROR;
   }
 
   /* Initialize the RFFT/RIFFT Function */
-  arm_rfft_init_q31(S->pRfft,  S->N, 0, 1);
+  arm_rfft_init_q31(S->pRfft,  S->N, 0U, 1U);
 
   /* return the status of DCT4 Init function */
   return (status);
 }
 
 /**
- * @} end of DCT4_IDCT4 group
+  @} end of DCT4_IDCT4 group
  */
diff --git a/DSP/Source/TransformFunctions/arm_dct4_q15.c b/DSP/Source/TransformFunctions/arm_dct4_q15.c
index 918f0bd..f926a1d 100644
--- a/DSP/Source/TransformFunctions/arm_dct4_q15.c
+++ b/DSP/Source/TransformFunctions/arm_dct4_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_dct4_q15.c
  * Description:  Processing function of DCT4 & IDCT4 Q15
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,35 +29,35 @@
 #include "arm_math.h"
 
 /**
- * @addtogroup DCT4_IDCT4
- * @{
+  @addtogroup DCT4_IDCT4
+  @{
  */
 
 /**
- * @brief Processing function for the Q15 DCT4/IDCT4.
- * @param[in]       *S             points to an instance of the Q15 DCT4 structure.
- * @param[in]       *pState        points to state buffer.
- * @param[in,out]   *pInlineBuffer points to the in-place input and output buffer.
- * @return none.
- *
- * \par Input an output formats:
- * Internally inputs are downscaled in the RFFT process function to avoid overflows.
- * Number of bits downscaled, depends on the size of the transform.
- * The input and output formats for different DCT sizes and number of bits to upscale are mentioned in the table below:
- *
- * \image html dct4FormatsQ15Table.gif
+  @brief         Processing function for the Q15 DCT4/IDCT4.
+  @param[in]     S             points to an instance of the Q15 DCT4 structure.
+  @param[in]     pState        points to state buffer.
+  @param[in,out] pInlineBuffer points to the in-place input and output buffer.
+  @return        none
+ 
+  @par           Input an output formats
+                   Internally inputs are downscaled in the RFFT process function to avoid overflows.
+                   Number of bits downscaled, depends on the size of the transform. The input and output
+                   formats for different DCT sizes and number of bits to upscale are mentioned in the table below:
+
+                   \image html dct4FormatsQ15Table.gif
  */
 
 void arm_dct4_q15(
   const arm_dct4_instance_q15 * S,
-  q15_t * pState,
-  q15_t * pInlineBuffer)
+        q15_t * pState,
+        q15_t * pInlineBuffer)
 {
-  uint32_t i;                                    /* Loop counter */
-  q15_t *weights = S->pTwiddle;                  /* Pointer to the Weights table */
-  q15_t *cosFact = S->pCosFactor;                /* Pointer to the cos factors table */
-  q15_t *pS1, *pS2, *pbuff;                      /* Temporary pointers for input buffer and pState buffer */
-  q15_t in;                                      /* Temporary variable */
+  const q15_t *weights = S->pTwiddle;                  /* Pointer to the Weights table */
+  const q15_t *cosFact = S->pCosFactor;                /* Pointer to the cos factors table */
+        q15_t *pS1, *pS2, *pbuff;                      /* Temporary pointers for input buffer and pState buffer */
+        q15_t in;                                      /* Temporary variable */
+        uint32_t i;                                    /* Loop counter */
 
 
   /* DCT4 computation involves DCT2 (which is calculated using RFFT)
@@ -79,10 +79,10 @@
    * (d) Multiplying the output with the normalizing factor sqrt(2/N).
    */
 
-        /*-------- Pre-processing ------------*/
+  /*-------- Pre-processing ------------*/
   /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
-  arm_mult_q15(pInlineBuffer, cosFact, pInlineBuffer, S->N);
-  arm_shift_q15(pInlineBuffer, 1, pInlineBuffer, S->N);
+  arm_mult_q15 (pInlineBuffer, cosFact, pInlineBuffer, S->N);
+  arm_shift_q15 (pInlineBuffer, 1, pInlineBuffer, S->N);
 
   /* ----------------------------------------------------------------
    * Step1: Re-ordering of even and odd elements as
@@ -100,12 +100,10 @@
   pbuff = pInlineBuffer;
 
 
-#if defined (ARM_MATH_DSP)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
 
   /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
-  i = (uint32_t) S->Nby2 >> 2U;
+  i = S->Nby2 >> 2U;
 
   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
    ** a second loop below computes the remaining 1 to 3 samples. */
@@ -126,7 +124,7 @@
     *pS1++ = *pbuff++;
     *pS2-- = *pbuff++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
   } while (i > 0U);
 
@@ -137,7 +135,7 @@
   pS1 = pState;
 
   /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = (uint32_t) S->N >> 2U;
+  i = S->N >> 2U;
 
   /* Processing with loop unrolling 4 times as N is always multiple of 4.
    * Compute 4 outputs at a time */
@@ -158,16 +156,16 @@
    *     Step2: Calculate RFFT for N-point input
    * ---------------------------------------------------------- */
   /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_q15(S->pRfft, pInlineBuffer, pState);
+  arm_rfft_q15 (S->pRfft, pInlineBuffer, pState);
 
- /*----------------------------------------------------------------------
-  *  Step3: Multiply the FFT output with the weights.
-  *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_q15(pState, weights, pState, S->N);
+  /*----------------------------------------------------------------------
+   *  Step3: Multiply the FFT output with the weights.
+   *----------------------------------------------------------------------*/
+  arm_cmplx_mult_cmplx_q15 (pState, weights, pState, S->N);
 
   /* The output of complex multiplication is in 3.13 format.
    * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting left by 2 bits. */
-  arm_shift_q15(pState, 2, pState, S->N * 2);
+  arm_shift_q15 (pState, 2, pState, S->N * 2);
 
   /* ----------- Post-processing ---------- */
   /* DCT-IV can be obtained from DCT-II by the equation,
@@ -176,7 +174,7 @@
   /* Getting only real part from the output and Converting to DCT-IV */
 
   /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
-  i = ((uint32_t) S->N - 1U) >> 2U;
+  i = (S->N - 1U) >> 2U;
 
   /* pbuff initialized to input buffer. */
   pbuff = pInlineBuffer;
@@ -221,7 +219,7 @@
 
   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
    ** No loop unrolling is used. */
-  i = ((uint32_t) S->N - 1U) % 0x4U;
+  i = (S->N - 1U) % 0x4U;
 
   while (i > 0U)
   {
@@ -229,18 +227,19 @@
     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
     in = *pS1++ - in;
     *pbuff++ = in;
+
     /* points to the next real value */
     pS1++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
   }
 
 
-   /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
+  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
 
   /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = (uint32_t) S->N >> 2U;
+  i = S->N >> 2U;
 
   /* pbuff initialized to the pInlineBuffer(now contains the output values) */
   pbuff = pInlineBuffer;
@@ -261,17 +260,15 @@
     in = *pbuff;
     *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
   } while (i > 0U);
 
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initializing the loop counter to N/2 */
-  i = (uint32_t) S->Nby2;
+  i = S->Nby2;
 
   do
   {
@@ -292,7 +289,7 @@
   pS1 = pState;
 
   /* Initializing the loop counter */
-  i = (uint32_t) S->N;
+  i = S->N;
 
   do
   {
@@ -308,16 +305,16 @@
    *     Step2: Calculate RFFT for N-point input
    * ---------------------------------------------------------- */
   /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_q15(S->pRfft, pInlineBuffer, pState);
+  arm_rfft_q15 (S->pRfft, pInlineBuffer, pState);
 
- /*----------------------------------------------------------------------
-  *  Step3: Multiply the FFT output with the weights.
-  *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_q15(pState, weights, pState, S->N);
+  /*----------------------------------------------------------------------
+   *  Step3: Multiply the FFT output with the weights.
+   *----------------------------------------------------------------------*/
+  arm_cmplx_mult_cmplx_q15 (pState, weights, pState, S->N);
 
   /* The output of complex multiplication is in 3.13 format.
    * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting left by 2 bits. */
-  arm_shift_q15(pState, 2, pState, S->N * 2);
+  arm_shift_q15 (pState, 2, pState, S->N * 2);
 
   /* ----------- Post-processing ---------- */
   /* DCT-IV can be obtained from DCT-II by the equation,
@@ -325,9 +322,6 @@
    *       Hence, Y4(0) = Y2(0)/2  */
   /* Getting only real part from the output and Converting to DCT-IV */
 
-  /* Initializing the loop counter */
-  i = ((uint32_t) S->N - 1U);
-
   /* pbuff initialized to input buffer. */
   pbuff = pInlineBuffer;
 
@@ -342,25 +336,29 @@
   /* pState pointer is incremented twice as the real values are located alternatively in the array */
   pS1++;
 
+  /* Initializing the loop counter */
+  i = (S->N - 1U);
+
   do
   {
     /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
     in = *pS1++ - in;
     *pbuff++ = in;
+
     /* points to the next real value */
     pS1++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
   } while (i > 0U);
 
-   /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
+  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
 
-  /* Initializing the loop counter */
-  i = (uint32_t) S->N;
+  /* Initializing loop counter */
+  i = S->N;
 
-  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
+  /* pbuff initialized to the pInlineBuffer (now contains the output values) */
   pbuff = pInlineBuffer;
 
   do
@@ -369,14 +367,15 @@
     in = *pbuff;
     *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
+
   } while (i > 0U);
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
 }
 
 /**
-   * @} end of DCT4_IDCT4 group
-   */
+  @} end of DCT4_IDCT4 group
+ */
diff --git a/DSP/Source/TransformFunctions/arm_dct4_q31.c b/DSP/Source/TransformFunctions/arm_dct4_q31.c
index 0569778..369a5c3 100644
--- a/DSP/Source/TransformFunctions/arm_dct4_q31.c
+++ b/DSP/Source/TransformFunctions/arm_dct4_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_dct4_q31.c
  * Description:  Processing function of DCT4 & IDCT4 Q31
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,36 +29,38 @@
 #include "arm_math.h"
 
 /**
- * @addtogroup DCT4_IDCT4
- * @{
+  @addtogroup DCT4_IDCT4
+  @{
  */
 
 /**
- * @brief Processing function for the Q31 DCT4/IDCT4.
- * @param[in]       *S             points to an instance of the Q31 DCT4 structure.
- * @param[in]       *pState        points to state buffer.
- * @param[in,out]   *pInlineBuffer points to the in-place input and output buffer.
- * @return none.
- * \par Input an output formats:
- * Input samples need to be downscaled by 1 bit to avoid saturations in the Q31 DCT process,
- * as the conversion from DCT2 to DCT4 involves one subtraction.
- * Internally inputs are downscaled in the RFFT process function to avoid overflows.
- * Number of bits downscaled, depends on the size of the transform.
- * The input and output formats for different DCT sizes and number of bits to upscale are mentioned in the table below:
- *
- * \image html dct4FormatsQ31Table.gif
+  @brief         Processing function for the Q31 DCT4/IDCT4.
+  @param[in]     S             points to an instance of the Q31 DCT4 structure.
+  @param[in]     pState        points to state buffer.
+  @param[in,out] pInlineBuffer points to the in-place input and output buffer.
+  @return        none
+
+  @par           Input an output formats
+                   Input samples need to be downscaled by 1 bit to avoid saturations in the Q31 DCT process,
+                   as the conversion from DCT2 to DCT4 involves one subtraction.
+                   Internally inputs are downscaled in the RFFT process function to avoid overflows.
+                   Number of bits downscaled, depends on the size of the transform.
+                   The input and output formats for different DCT sizes and number of bits to upscale are
+                   mentioned in the table below:
+
+                   \image html dct4FormatsQ31Table.gif
  */
 
 void arm_dct4_q31(
   const arm_dct4_instance_q31 * S,
-  q31_t * pState,
-  q31_t * pInlineBuffer)
+        q31_t * pState,
+        q31_t * pInlineBuffer)
 {
-  uint16_t i;                                    /* Loop counter */
-  q31_t *weights = S->pTwiddle;                  /* Pointer to the Weights table */
-  q31_t *cosFact = S->pCosFactor;                /* Pointer to the cos factors table */
-  q31_t *pS1, *pS2, *pbuff;                      /* Temporary pointers for input buffer and pState buffer */
-  q31_t in;                                      /* Temporary variable */
+  const q31_t *weights = S->pTwiddle;                  /* Pointer to the Weights table */
+  const q31_t *cosFact = S->pCosFactor;                /* Pointer to the cos factors table */
+        q31_t *pS1, *pS2, *pbuff;                      /* Temporary pointers for input buffer and pState buffer */
+        q31_t in;                                      /* Temporary variable */
+        uint32_t i;                                    /* Loop counter */
 
 
   /* DCT4 computation involves DCT2 (which is calculated using RFFT)
@@ -80,10 +82,10 @@
    * (d) Multiplying the output with the normalizing factor sqrt(2/N).
    */
 
-        /*-------- Pre-processing ------------*/
+  /*-------- Pre-processing ------------*/
   /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
-  arm_mult_q31(pInlineBuffer, cosFact, pInlineBuffer, S->N);
-  arm_shift_q31(pInlineBuffer, 1, pInlineBuffer, S->N);
+  arm_mult_q31 (pInlineBuffer, cosFact, pInlineBuffer, S->N);
+  arm_shift_q31 (pInlineBuffer, 1, pInlineBuffer, S->N);
 
   /* ----------------------------------------------------------------
    * Step1: Re-ordering of even and odd elements as
@@ -100,9 +102,8 @@
   /* pbuff initialized to input buffer */
   pbuff = pInlineBuffer;
 
-#if defined (ARM_MATH_DSP)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
 
   /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
   i = S->Nby2 >> 2U;
@@ -126,7 +127,7 @@
     *pS1++ = *pbuff++;
     *pS2-- = *pbuff++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
   } while (i > 0U);
 
@@ -158,16 +159,16 @@
    *     Step2: Calculate RFFT for N-point input
    * ---------------------------------------------------------- */
   /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_q31(S->pRfft, pInlineBuffer, pState);
+  arm_rfft_q31 (S->pRfft, pInlineBuffer, pState);
 
   /*----------------------------------------------------------------------
    *  Step3: Multiply the FFT output with the weights.
    *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_q31(pState, weights, pState, S->N);
+  arm_cmplx_mult_cmplx_q31 (pState, weights, pState, S->N);
 
   /* The output of complex multiplication is in 3.29 format.
    * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting left by 2 bits. */
-  arm_shift_q31(pState, 2, pState, S->N * 2);
+  arm_shift_q31 (pState, 2, pState, S->N * 2);
 
   /* ----------- Post-processing ---------- */
   /* DCT-IV can be obtained from DCT-II by the equation,
@@ -229,15 +230,16 @@
     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
     in = *pS1++ - in;
     *pbuff++ = in;
+
     /* points to the next real value */
     pS1++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
   }
 
 
-        /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
+  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
 
   /* Initializing the loop counter to N/4 instead of N for loop unrolling */
   i = S->N >> 2U;
@@ -261,15 +263,13 @@
     in = *pbuff;
     *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
   } while (i > 0U);
 
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initializing the loop counter to N/2 */
   i = S->Nby2;
 
@@ -308,12 +308,12 @@
    *     Step2: Calculate RFFT for N-point input
    * ---------------------------------------------------------- */
   /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_q31(S->pRfft, pInlineBuffer, pState);
+  arm_rfft_q31 (S->pRfft, pInlineBuffer, pState);
 
   /*----------------------------------------------------------------------
    *  Step3: Multiply the FFT output with the weights.
    *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_q31(pState, weights, pState, S->N);
+  arm_cmplx_mult_cmplx_q31 (pState, weights, pState, S->N);
 
   /* The output of complex multiplication is in 3.29 format.
    * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting left by 2 bits. */
@@ -348,20 +348,20 @@
     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
     in = *pS1++ - in;
     *pbuff++ = in;
+
     /* points to the next real value */
     pS1++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
   }
 
+  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
 
-        /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
-
-  /* Initializing the loop counter */
+  /* Initializing loop counter */
   i = S->N;
 
-  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
+  /* pbuff initialized to the pInlineBuffer (now contains the output values) */
   pbuff = pInlineBuffer;
 
   do
@@ -370,14 +370,14 @@
     in = *pbuff;
     *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
   } while (i > 0U);
 
-#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
 }
 
 /**
-   * @} end of DCT4_IDCT4 group
-   */
+  @} end of DCT4_IDCT4 group
+ */
diff --git a/DSP/Source/TransformFunctions/arm_rfft_f32.c b/DSP/Source/TransformFunctions/arm_rfft_f32.c
index a1bd81b..b5d0a66 100644
--- a/DSP/Source/TransformFunctions/arm_rfft_f32.c
+++ b/DSP/Source/TransformFunctions/arm_rfft_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_rfft_f32.c
  * Description:  RFFT & RIFFT Floating point process function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -33,159 +33,149 @@
  * -------------------------------------------------------------------- */
 
 extern void arm_radix4_butterfly_f32(
-    float32_t * pSrc,
-    uint16_t fftLen,
-    float32_t * pCoef,
-    uint16_t twidCoefModifier);
+        float32_t * pSrc,
+        uint16_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier);
 
 extern void arm_radix4_butterfly_inverse_f32(
-    float32_t * pSrc,
-    uint16_t fftLen,
-    float32_t * pCoef,
-    uint16_t twidCoefModifier,
-    float32_t onebyfftLen);
+        float32_t * pSrc,
+        uint16_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier,
+        float32_t onebyfftLen);
 
 extern void arm_bitreversal_f32(
-    float32_t * pSrc,
-    uint16_t fftSize,
-    uint16_t bitRevFactor,
-    uint16_t * pBitRevTab);
+        float32_t * pSrc,
+        uint16_t fftSize,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab);
 
 void arm_split_rfft_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pATable,
-  float32_t * pBTable,
-  float32_t * pDst,
-  uint32_t modifier);
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pATable,
+  const float32_t * pBTable,
+        float32_t * pDst,
+        uint32_t modifier);
 
 void arm_split_rifft_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pATable,
-  float32_t * pBTable,
-  float32_t * pDst,
-  uint32_t modifier);
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pATable,
+  const float32_t * pBTable,
+        float32_t * pDst,
+        uint32_t modifier);
 
 /**
-* @ingroup groupTransforms
-*/
-
-/**
- * @addtogroup RealFFT
- * @{
+  @ingroup groupTransforms
  */
 
 /**
- * @brief Processing function for the floating-point RFFT/RIFFT.
- * @deprecated Do not use this function.  It has been superceded by \ref arm_rfft_fast_f32 and will be removed
- * in the future.
- * @param[in]  *S    points to an instance of the floating-point RFFT/RIFFT structure.
- * @param[in]  *pSrc points to the input buffer.
- * @param[out] *pDst points to the output buffer.
- * @return none.
+  @addtogroup RealFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point RFFT/RIFFT.
+  @deprecated    Do not use this function.  It has been superceded by \ref arm_rfft_fast_f32 and will be removed in the future.
+  @param[in]     S    points to an instance of the floating-point RFFT/RIFFT structure
+  @param[in]     pSrc points to the input buffer
+  @param[out]    pDst points to the output buffer
+  @return        none
  */
 
 void arm_rfft_f32(
   const arm_rfft_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst)
+        float32_t * pSrc,
+        float32_t * pDst)
 {
   const arm_cfft_radix4_instance_f32 *S_CFFT = S->pCfft;
 
-
   /* Calculation of Real IFFT of input */
   if (S->ifftFlagR == 1U)
   {
-    /*  Real IFFT core process */
-    arm_split_rifft_f32(pSrc, S->fftLenBy2, S->pTwiddleAReal,
-                        S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+     /*  Real IFFT core process */
+     arm_split_rifft_f32 (pSrc, S->fftLenBy2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
 
 
-    /* Complex radix-4 IFFT process */
-    arm_radix4_butterfly_inverse_f32(pDst, S_CFFT->fftLen,
-                                     S_CFFT->pTwiddle,
-                                     S_CFFT->twidCoefModifier,
-                                     S_CFFT->onebyfftLen);
+     /* Complex radix-4 IFFT process */
+     arm_radix4_butterfly_inverse_f32 (pDst, S_CFFT->fftLen, S_CFFT->pTwiddle, S_CFFT->twidCoefModifier, S_CFFT->onebyfftLen);
 
     /* Bit reversal process */
     if (S->bitReverseFlagR == 1U)
     {
-      arm_bitreversal_f32(pDst, S_CFFT->fftLen,
-                          S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
+      arm_bitreversal_f32 (pDst, S_CFFT->fftLen, S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
     }
   }
   else
   {
-
     /* Calculation of RFFT of input */
 
     /* Complex radix-4 FFT process */
-    arm_radix4_butterfly_f32(pSrc, S_CFFT->fftLen,
-                             S_CFFT->pTwiddle, S_CFFT->twidCoefModifier);
+    arm_radix4_butterfly_f32 (pSrc, S_CFFT->fftLen, S_CFFT->pTwiddle, S_CFFT->twidCoefModifier);
 
     /* Bit reversal process */
     if (S->bitReverseFlagR == 1U)
     {
-      arm_bitreversal_f32(pSrc, S_CFFT->fftLen,
-                          S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
+      arm_bitreversal_f32 (pSrc, S_CFFT->fftLen, S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
     }
 
-
     /*  Real FFT core process */
-    arm_split_rfft_f32(pSrc, S->fftLenBy2, S->pTwiddleAReal,
-                       S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+    arm_split_rfft_f32 (pSrc, S->fftLenBy2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
   }
 
 }
 
 /**
-   * @} end of RealFFT group
-   */
+  @} end of RealFFT group
+ */
 
 /**
- * @brief  Core Real FFT process
- * @param[in]   *pSrc 				points to the input buffer.
- * @param[in]   fftLen  			length of FFT.
- * @param[in]   *pATable 			points to the twiddle Coef A buffer.
- * @param[in]   *pBTable 			points to the twiddle Coef B buffer.
- * @param[out]  *pDst 				points to the output buffer.
- * @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @return none.
+  @brief         Core Real FFT process
+  @param[in]     pSrc      points to input buffer
+  @param[in]     fftLen    length of FFT
+  @param[in]     pATable   points to twiddle Coef A buffer
+  @param[in]     pBTable   points to twiddle Coef B buffer
+  @param[out]    pDst      points to output buffer
+  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  @return        none
  */
 
 void arm_split_rfft_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pATable,
-  float32_t * pBTable,
-  float32_t * pDst,
-  uint32_t modifier)
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pATable,
+  const float32_t * pBTable,
+        float32_t * pDst,
+        uint32_t modifier)
 {
-  uint32_t i;                                    /* Loop Counter */
-  float32_t outR, outI;                          /* Temporary variables for output */
-  float32_t *pCoefA, *pCoefB;                    /* Temporary pointers for twiddle factors */
-  float32_t CoefA1, CoefA2, CoefB1;              /* Temporary variables for twiddle coefficients */
-  float32_t *pDst1 = &pDst[2], *pDst2 = &pDst[(4U * fftLen) - 1U];      /* temp pointers for output buffer */
-  float32_t *pSrc1 = &pSrc[2], *pSrc2 = &pSrc[(2U * fftLen) - 1U];      /* temp pointers for input buffer */
+        uint32_t i;                                    /* Loop Counter */
+        float32_t outR, outI;                          /* Temporary variables for output */
+  const float32_t *pCoefA, *pCoefB;                    /* Temporary pointers for twiddle factors */
+        float32_t CoefA1, CoefA2, CoefB1;              /* Temporary variables for twiddle coefficients */
+        float32_t *pDst1 = &pDst[2], *pDst2 = &pDst[(4U * fftLen) - 1U];      /* temp pointers for output buffer */
+        float32_t *pSrc1 = &pSrc[2], *pSrc2 = &pSrc[(2U * fftLen) - 1U];      /* temp pointers for input buffer */
 
   /* Init coefficient pointers */
-  pCoefA = &pATable[modifier * 2U];
-  pCoefB = &pBTable[modifier * 2U];
+  pCoefA = &pATable[modifier * 2];
+  pCoefB = &pBTable[modifier * 2];
 
   i = fftLen - 1U;
 
   while (i > 0U)
   {
-    /*
-       outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]
-       + pSrc[2 * n - 2 * i] * pBTable[2 * i] +
-       pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
-     */
+     /*
+       outR = (  pSrc[2 * i]             * pATable[2 * i]
+               - pSrc[2 * i + 1]         * pATable[2 * i + 1]
+               + pSrc[2 * n - 2 * i]     * pBTable[2 * i]
+               + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
 
-    /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +
-       pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */
+       outI = (  pIn[2 * i + 1]         * pATable[2 * i]
+               + pIn[2 * i]             * pATable[2 * i + 1]
+               + pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
+               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+      */
 
     /* read pATable[2 * i] */
     CoefA1 = *pCoefA++;
@@ -238,81 +228,82 @@
 
 
 /**
- * @brief  Core Real IFFT process
- * @param[in]   *pSrc 				points to the input buffer.
- * @param[in]   fftLen  			length of FFT.
- * @param[in]   *pATable 			points to the twiddle Coef A buffer.
- * @param[in]   *pBTable 			points to the twiddle Coef B buffer.
- * @param[out]  *pDst 				points to the output buffer.
- * @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @return none.
+  @brief         Core Real IFFT process
+  @param[in]     pSrc      points to input buffer
+  @param[in]     fftLen    length of FFT
+  @param[in]     pATable   points to twiddle Coef A buffer
+  @param[in]     pBTable   points to twiddle Coef B buffer
+  @param[out]    pDst      points to output buffer
+  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  @return        none
  */
 
 void arm_split_rifft_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pATable,
-  float32_t * pBTable,
-  float32_t * pDst,
-  uint32_t modifier)
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pATable,
+  const float32_t * pBTable,
+        float32_t * pDst,
+        uint32_t modifier)
 {
-  float32_t outR, outI;                          /* Temporary variables for output */
-  float32_t *pCoefA, *pCoefB;                    /* Temporary pointers for twiddle factors */
-  float32_t CoefA1, CoefA2, CoefB1;              /* Temporary variables for twiddle coefficients */
-  float32_t *pSrc1 = &pSrc[0], *pSrc2 = &pSrc[(2U * fftLen) + 1U];
+        float32_t outR, outI;                          /* Temporary variables for output */
+  const float32_t *pCoefA, *pCoefB;                    /* Temporary pointers for twiddle factors */
+        float32_t CoefA1, CoefA2, CoefB1;              /* Temporary variables for twiddle coefficients */
+        float32_t *pSrc1 = &pSrc[0], *pSrc2 = &pSrc[(2U * fftLen) + 1U];
 
   pCoefA = &pATable[0];
   pCoefB = &pBTable[0];
 
   while (fftLen > 0U)
   {
-    /*
-       outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +
-       pIn[2 * n - 2 * i] * pBTable[2 * i] -
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
+     /*
+       outR = (  pIn[2 * i]             * pATable[2 * i]
+               + pIn[2 * i + 1]         * pATable[2 * i + 1]
+               + pIn[2 * n - 2 * i]     * pBTable[2 * i]
+               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
 
-       outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -
-       pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+       outI = (  pIn[2 * i + 1]         * pATable[2 * i]
+               - pIn[2 * i]             * pATable[2 * i + 1]
+               - pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
+               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+      */
 
-     */
+     CoefA1 = *pCoefA++;
+     CoefA2 = *pCoefA;
 
-    CoefA1 = *pCoefA++;
-    CoefA2 = *pCoefA;
+     /* outR = (pSrc[2 * i] * CoefA1 */
+     outR = *pSrc1 * CoefA1;
 
-    /* outR = (pSrc[2 * i] * CoefA1 */
-    outR = *pSrc1 * CoefA1;
+     /* - pSrc[2 * i] * CoefA2 */
+     outI = -(*pSrc1++) * CoefA2;
 
-    /* - pSrc[2 * i] * CoefA2 */
-    outI = -(*pSrc1++) * CoefA2;
+     /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */
+     outR += (*pSrc1 + *pSrc2) * CoefA2;
 
-    /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */
-    outR += (*pSrc1 + *pSrc2) * CoefA2;
+     /* pSrc[2 * i + 1] * CoefA1 */
+     outI += (*pSrc1++) * CoefA1;
 
-    /* pSrc[2 * i + 1] * CoefA1 */
-    outI += (*pSrc1++) * CoefA1;
+     CoefB1 = *pCoefB;
 
-    CoefB1 = *pCoefB;
+     /* - pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */
+     outI -= *pSrc2-- * CoefB1;
 
-    /* - pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */
-    outI -= *pSrc2-- * CoefB1;
+     /* pSrc[2 * fftLen - 2 * i] * CoefB1 */
+     outR += *pSrc2 * CoefB1;
 
-    /* pSrc[2 * fftLen - 2 * i] * CoefB1 */
-    outR += *pSrc2 * CoefB1;
+     /* pSrc[2 * fftLen - 2 * i] * CoefA2 */
+     outI += *pSrc2-- * CoefA2;
 
-    /* pSrc[2 * fftLen - 2 * i] * CoefA2 */
-    outI += *pSrc2-- * CoefA2;
+     /* write output */
+     *pDst++ = outR;
+     *pDst++ = outI;
 
-    /* write output */
-    *pDst++ = outR;
-    *pDst++ = outI;
+     /* update coefficient pointer */
+     pCoefB = pCoefB + (modifier * 2);
+     pCoefA = pCoefA + (modifier * 2 - 1);
 
-    /* update coefficient pointer */
-    pCoefB = pCoefB + (modifier * 2U);
-    pCoefA = pCoefA + ((modifier * 2U) - 1U);
-
-    /* Decrement loop count */
-    fftLen--;
+     /* Decrement loop count */
+     fftLen--;
   }
 
 }
diff --git a/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c b/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c
index f7c52e9..7a1af14 100644
--- a/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c
+++ b/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_rfft_f32.c
  * Description:  RFFT & RIFFT Floating point process function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -29,17 +29,18 @@
 #include "arm_math.h"
 
 void stage_rfft_f32(
-  arm_rfft_fast_instance_f32 * S,
-  float32_t * p, float32_t * pOut)
+  const arm_rfft_fast_instance_f32 * S,
+        float32_t * p,
+        float32_t * pOut)
 {
-   uint32_t  k;								   /* Loop Counter                     */
-   float32_t twR, twI;						   /* RFFT Twiddle coefficients        */
-   float32_t * pCoeff = S->pTwiddleRFFT;  /* Points to RFFT Twiddle factors   */
-   float32_t *pA = p;						   /* increasing pointer               */
-   float32_t *pB = p;						   /* decreasing pointer               */
-   float32_t xAR, xAI, xBR, xBI;				/* temporary variables              */
-   float32_t t1a, t1b;				         /* temporary variables              */
-   float32_t p0, p1, p2, p3;				   /* temporary variables              */
+        uint32_t  k;                                /* Loop Counter */
+        float32_t twR, twI;                         /* RFFT Twiddle coefficients */
+  const float32_t * pCoeff = S->pTwiddleRFFT;       /* Points to RFFT Twiddle factors */
+        float32_t *pA = p;                          /* increasing pointer */
+        float32_t *pB = p;                          /* decreasing pointer */
+        float32_t xAR, xAI, xBR, xBI;               /* temporary variables */
+        float32_t t1a, t1b;                         /* temporary variables */
+        float32_t p0, p1, p2, p3;                   /* temporary variables */
 
 
    k = (S->Sint).fftLen - 1;
@@ -115,16 +116,17 @@
 
 /* Prepares data for inverse cfft */
 void merge_rfft_f32(
-arm_rfft_fast_instance_f32 * S,
-float32_t * p, float32_t * pOut)
+  const arm_rfft_fast_instance_f32 * S,
+        float32_t * p,
+        float32_t * pOut)
 {
-   uint32_t  k;								/* Loop Counter                     */
-   float32_t twR, twI;						/* RFFT Twiddle coefficients        */
-   float32_t *pCoeff = S->pTwiddleRFFT;		/* Points to RFFT Twiddle factors   */
-   float32_t *pA = p;						/* increasing pointer               */
-   float32_t *pB = p;						/* decreasing pointer               */
-   float32_t xAR, xAI, xBR, xBI;			/* temporary variables              */
-   float32_t t1a, t1b, r, s, t, u;			/* temporary variables              */
+        uint32_t  k;                                /* Loop Counter */
+        float32_t twR, twI;                         /* RFFT Twiddle coefficients */
+  const float32_t *pCoeff = S->pTwiddleRFFT;        /* Points to RFFT Twiddle factors */
+        float32_t *pA = p;                          /* increasing pointer */
+        float32_t *pB = p;                          /* decreasing pointer */
+        float32_t xAR, xAI, xBR, xBI;               /* temporary variables */
+        float32_t t1a, t1b, r, s, t, u;             /* temporary variables */
 
    k = (S->Sint).fftLen - 1;
 
@@ -173,122 +175,123 @@
 }
 
 /**
-* @ingroup groupTransforms
+  @ingroup groupTransforms
 */
 
 /**
- * @defgroup RealFFT Real FFT Functions
- *
- * \par
- * The CMSIS DSP library includes specialized algorithms for computing the
- * FFT of real data sequences.  The FFT is defined over complex data but
- * in many applications the input is real.  Real FFT algorithms take advantage
- * of the symmetry properties of the FFT and have a speed advantage over complex
- * algorithms of the same length.
- * \par
- * The Fast RFFT algorith relays on the mixed radix CFFT that save processor usage.
- * \par
- * The real length N forward FFT of a sequence is computed using the steps shown below.
- * \par
- * \image html RFFT.gif "Real Fast Fourier Transform"
- * \par
- * The real sequence is initially treated as if it were complex to perform a CFFT.
- * Later, a processing stage reshapes the data to obtain half of the frequency spectrum
- * in complex format. Except the first complex number that contains the two real numbers
- * X[0] and X[N/2] all the data is complex. In other words, the first complex sample
- * contains two real values packed.
- * \par
- * The input for the inverse RFFT should keep the same format as the output of the
- * forward RFFT. A first processing stage pre-process the data to later perform an
- * inverse CFFT.
- * \par
- * \image html RIFFT.gif "Real Inverse Fast Fourier Transform"
- * \par
- * The algorithms for floating-point, Q15, and Q31 data are slightly different
- * and we describe each algorithm in turn.
- * \par Floating-point
- * The main functions are arm_rfft_fast_f32() and arm_rfft_fast_init_f32().
- * The older functions arm_rfft_f32() and arm_rfft_init_f32() have been
- * deprecated but are still documented.
- * \par
- * The FFT of a real N-point sequence has even symmetry in the frequency
- * domain. The second half of the data equals the conjugate of the first
- * half flipped in frequency. Looking at the data, we see that we can
- * uniquely represent the FFT using only N/2 complex numbers. These are
- * packed into the output array in alternating real and imaginary
- * components:
- * \par
- * X = { real[0], imag[0], real[1], imag[1], real[2], imag[2] ...
- * real[(N/2)-1], imag[(N/2)-1 }
- * \par
- * It happens that the first complex number (real[0], imag[0]) is actually
- * all real. real[0] represents the DC offset, and imag[0] should be 0.
- * (real[1], imag[1]) is the fundamental frequency, (real[2], imag[2]) is
- * the first harmonic and so on.
- * \par
- * The real FFT functions pack the frequency domain data in this fashion.
- * The forward transform outputs the data in this form and the inverse
- * transform expects input data in this form. The function always performs
- * the needed bitreversal so that the input and output data is always in
- * normal order. The functions support lengths of [32, 64, 128, ..., 4096]
- * samples.
- * \par Q15 and Q31
- * The real algorithms are defined in a similar manner and utilize N/2 complex
- * transforms behind the scenes.
- * \par
- * The complex transforms used internally include scaling to prevent fixed-point
- * overflows.  The overall scaling equals 1/(fftLen/2).
- * \par
- * A separate instance structure must be defined for each transform used but
- * twiddle factor and bit reversal tables can be reused.
- * \par
- * There is also an associated initialization function for each data type.
- * The initialization function performs the following operations:
- * - Sets the values of the internal structure fields.
- * - Initializes twiddle factor table and bit reversal table pointers.
- * - Initializes the internal complex FFT data structure.
- * \par
- * Use of the initialization function is optional.
- * However, if the initialization function is used, then the instance structure
- * cannot be placed into a const data section. To place an instance structure
- * into a const data section, the instance structure should be manually
- * initialized as follows:
- * <pre>
- *arm_rfft_instance_q31 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
- *arm_rfft_instance_q15 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
- * </pre>
- * where <code>fftLenReal</code> is the length of the real transform;
- * <code>fftLenBy2</code> length of  the internal complex transform.
- * <code>ifftFlagR</code> Selects forward (=0) or inverse (=1) transform.
- * <code>bitReverseFlagR</code> Selects bit reversed output (=0) or normal order
- * output (=1).
- * <code>twidCoefRModifier</code> stride modifier for the twiddle factor table.
- * The value is based on the FFT length;
- * <code>pTwiddleAReal</code>points to the A array of twiddle coefficients;
- * <code>pTwiddleBReal</code>points to the B array of twiddle coefficients;
- * <code>pCfft</code> points to the CFFT Instance structure. The CFFT structure
- * must also be initialized.  Refer to arm_cfft_radix4_f32() for details regarding
- * static initialization of the complex FFT instance structure.
+  @defgroup RealFFT Real FFT Functions
+ 
+  @par
+                   The CMSIS DSP library includes specialized algorithms for computing the
+                   FFT of real data sequences.  The FFT is defined over complex data but
+                   in many applications the input is real.  Real FFT algorithms take advantage
+                   of the symmetry properties of the FFT and have a speed advantage over complex
+                   algorithms of the same length.
+  @par
+                   The Fast RFFT algorith relays on the mixed radix CFFT that save processor usage.
+  @par
+                   The real length N forward FFT of a sequence is computed using the steps shown below.
+  @par
+                   \image html RFFT.gif "Real Fast Fourier Transform"
+  @par
+                   The real sequence is initially treated as if it were complex to perform a CFFT.
+                   Later, a processing stage reshapes the data to obtain half of the frequency spectrum
+                   in complex format. Except the first complex number that contains the two real numbers
+                   X[0] and X[N/2] all the data is complex. In other words, the first complex sample
+                   contains two real values packed.
+  @par
+                   The input for the inverse RFFT should keep the same format as the output of the
+                   forward RFFT. A first processing stage pre-process the data to later perform an
+                   inverse CFFT.
+  @par
+                   \image html RIFFT.gif "Real Inverse Fast Fourier Transform"
+  @par
+                   The algorithms for floating-point, Q15, and Q31 data are slightly different
+                   and we describe each algorithm in turn.
+  @par           Floating-point
+                   The main functions are \ref arm_rfft_fast_f32() and \ref arm_rfft_fast_init_f32().
+                   The older functions \ref arm_rfft_f32() and \ref arm_rfft_init_f32() have been deprecated
+                   but are still documented.
+  @par
+                   The FFT of a real N-point sequence has even symmetry in the frequency domain. 
+                   The second half of the data equals the conjugate of the first half flipped in frequency. 
+                   Looking at the data, we see that we can uniquely represent the FFT using only N/2 complex numbers.
+                   These are packed into the output array in alternating real and imaginary components:
+  @par
+                   X = { real[0], imag[0], real[1], imag[1], real[2], imag[2] ...
+                   real[(N/2)-1], imag[(N/2)-1 }
+  @par
+                   It happens that the first complex number (real[0], imag[0]) is actually
+                   all real. real[0] represents the DC offset, and imag[0] should be 0.
+                   (real[1], imag[1]) is the fundamental frequency, (real[2], imag[2]) is
+                   the first harmonic and so on.
+  @par
+                   The real FFT functions pack the frequency domain data in this fashion.
+                   The forward transform outputs the data in this form and the inverse
+                   transform expects input data in this form. The function always performs
+                   the needed bitreversal so that the input and output data is always in
+                   normal order. The functions support lengths of [32, 64, 128, ..., 4096]
+                   samples.
+  @par           Q15 and Q31
+                   The real algorithms are defined in a similar manner and utilize N/2 complex
+                   transforms behind the scenes.
+  @par
+                   The complex transforms used internally include scaling to prevent fixed-point
+                   overflows.  The overall scaling equals 1/(fftLen/2).
+  @par
+                   A separate instance structure must be defined for each transform used but
+                   twiddle factor and bit reversal tables can be reused.
+  @par
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                    - Sets the values of the internal structure fields.
+                    - Initializes twiddle factor table and bit reversal table pointers.
+                    - Initializes the internal complex FFT data structure.
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure
+                   cannot be placed into a const data section. To place an instance structure
+                   into a const data section, the instance structure should be manually
+                   initialized as follows:
+  <pre>
+      arm_rfft_instance_q31 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
+      arm_rfft_instance_q15 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
+  </pre>
+                   where <code>fftLenReal</code> is the length of the real transform;
+                   <code>fftLenBy2</code> length of  the internal complex transform.
+                   <code>ifftFlagR</code> Selects forward (=0) or inverse (=1) transform.
+                   <code>bitReverseFlagR</code> Selects bit reversed output (=0) or normal order
+                   output (=1).
+                   <code>twidCoefRModifier</code> stride modifier for the twiddle factor table.
+                   The value is based on the FFT length;
+                   <code>pTwiddleAReal</code>points to the A array of twiddle coefficients;
+                   <code>pTwiddleBReal</code>points to the B array of twiddle coefficients;
+                   <code>pCfft</code> points to the CFFT Instance structure. The CFFT structure
+                   must also be initialized.  Refer to arm_cfft_radix4_f32() for details regarding
+                   static initialization of the complex FFT instance structure.
  */
 
 /**
-* @addtogroup RealFFT
-* @{
+  @addtogroup RealFFT
+  @{
 */
 
 /**
-* @brief Processing function for the floating-point real FFT.
-* @param[in]  *S              points to an arm_rfft_fast_instance_f32 structure.
-* @param[in]  *p              points to the input buffer.
-* @param[in]  *pOut           points to the output buffer.
-* @param[in]  ifftFlag        RFFT if flag is 0, RIFFT if flag is 1
-* @return none.
+  @brief         Processing function for the floating-point real FFT.
+  @param[in]     S         points to an arm_rfft_fast_instance_f32 structure
+  @param[in]     p         points to input buffer
+  @param[in]     pOut      points to output buffer
+  @param[in]     ifftFlag
+                   - value = 0: RFFT
+                   - value = 1: RIFFT
+  @return        none
 */
 
 void arm_rfft_fast_f32(
-arm_rfft_fast_instance_f32 * S,
-float32_t * p, float32_t * pOut,
-uint8_t ifftFlag)
+  arm_rfft_fast_instance_f32 * S,
+  float32_t * p,
+  float32_t * pOut,
+  uint8_t ifftFlag)
 {
    arm_cfft_instance_f32 * Sint = &(S->Sint);
    Sint->fftLen = S->fftLenRFFT / 2;
diff --git a/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c b/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c
index 2f8dfe6..58fbfdb 100644
--- a/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c
+++ b/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_cfft_init_f32.c
  * Description:  Split Radix Decimation in Frequency CFFT Floating point processing function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,102 +30,315 @@
 #include "arm_common_tables.h"
 
 /**
- * @ingroup groupTransforms
+  @ingroup groupTransforms
  */
 
 /**
- * @addtogroup RealFFT
- * @{
+  @addtogroup RealFFT
+  @{
  */
 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_BITREVIDX_FLT_16) && defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32))
+
 /**
-* @brief  Initialization function for the floating-point real FFT.
-* @param[in,out] *S             points to an arm_rfft_fast_instance_f32 structure.
-* @param[in]     fftLen         length of the Real Sequence.
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
-*
-* \par Description:
-* \par
-* The parameter <code>fftLen</code>	Specifies length of RFFT/CIFFT process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096.
-* \par
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+  @brief         Initialization function for the 32pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+arm_status arm_rfft_32_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_cfft_instance_f32 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 16U;
+  S->fftLenRFFT = 32U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLE_16_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable16;
+  Sint->pTwiddle     = (float32_t *) twiddleCoef_16;
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_32;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32) && defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64))
+
+/**
+  @brief         Initialization function for the 64pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+arm_status arm_rfft_64_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_cfft_instance_f32 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 32U;
+  S->fftLenRFFT = 64U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLE_32_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable32;
+  Sint->pTwiddle     = (float32_t *) twiddleCoef_32;
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_64;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64) && defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128))
+
+/**
+  @brief         Initialization function for the 128pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+arm_status arm_rfft_128_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_cfft_instance_f32 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 64U;
+  S->fftLenRFFT = 128U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLE_64_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable64;
+  Sint->pTwiddle     = (float32_t *) twiddleCoef_64;
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_128;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128) && defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256))
+
+/**
+  @brief         Initialization function for the 256pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
 */
+
+arm_status arm_rfft_256_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_cfft_instance_f32 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 128U;
+  S->fftLenRFFT = 256U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLE_128_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable128;
+  Sint->pTwiddle     = (float32_t *) twiddleCoef_128;
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_256;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256) && defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512))
+
+/**
+  @brief         Initialization function for the 512pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+arm_status arm_rfft_512_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_cfft_instance_f32 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 256U;
+  S->fftLenRFFT = 512U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLE_256_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable256;
+  Sint->pTwiddle     = (float32_t *) twiddleCoef_256;
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_512;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512) && defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024))
+/**
+  @brief         Initialization function for the 1024pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+arm_status arm_rfft_1024_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_cfft_instance_f32 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 512U;
+  S->fftLenRFFT = 1024U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLE_512_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable512;
+  Sint->pTwiddle     = (float32_t *) twiddleCoef_512;
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_1024;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024) && defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048))
+/**
+  @brief         Initialization function for the 2048pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+arm_status arm_rfft_2048_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_cfft_instance_f32 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 1024U;
+  S->fftLenRFFT = 2048U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLE_1024_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable1024;
+  Sint->pTwiddle     = (float32_t *) twiddleCoef_1024;
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_2048;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048) && defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096))
+/**
+* @brief         Initialization function for the 4096pt floating-point real FFT.
+* @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+arm_status arm_rfft_4096_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_cfft_instance_f32 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 2048U;
+  S->fftLenRFFT = 4096U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLE_2048_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable2048;
+  Sint->pTwiddle     = (float32_t *) twiddleCoef_2048;
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_4096;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+/**
+  @brief         Initialization function for the floating-point real FFT.
+  @param[in,out] S       points to an arm_rfft_fast_instance_f32 structure
+  @param[in]     fftLen  length of the Real Sequence
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+  @par           Description
+                   The parameter <code>fftLen</code> specifies the length of RFFT/CIFFT process.
+                   Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+ */
+
 arm_status arm_rfft_fast_init_f32(
   arm_rfft_fast_instance_f32 * S,
   uint16_t fftLen)
 {
-  arm_cfft_instance_f32 * Sint;
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-  /*  Initialise the FFT length */
-  Sint = &(S->Sint);
-  Sint->fftLen = fftLen/2;
-  S->fftLenRFFT = fftLen;
+  typedef arm_status(*fft_init_ptr)( arm_rfft_fast_instance_f32 *);
+  fft_init_ptr fptr = 0x0;
 
-  /*  Initializations of structure parameters depending on the FFT length */
-  switch (Sint->fftLen)
+  switch (fftLen)
   {
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048) && defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096))
+  case 4096U:
+    fptr = arm_rfft_4096_fast_init_f32;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024) && defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048))
   case 2048U:
-    /*  Initializations of structure parameters for 2048 point FFT */
-    /*  Initialise the bit reversal table length */
-    Sint->bitRevLength = ARMBITREVINDEXTABLE_2048_TABLE_LENGTH;
-    /*  Initialise the bit reversal table pointer */
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable2048;
-    /*  Initialise the Twiddle coefficient pointers */
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_2048;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_4096;
+    fptr = arm_rfft_2048_fast_init_f32;
     break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512) && defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024))
   case 1024U:
-    Sint->bitRevLength = ARMBITREVINDEXTABLE_1024_TABLE_LENGTH;
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable1024;
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_1024;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_2048;
+    fptr = arm_rfft_1024_fast_init_f32;
     break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256) && defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512))
   case 512U:
-    Sint->bitRevLength = ARMBITREVINDEXTABLE_512_TABLE_LENGTH;
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable512;
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_512;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_1024;
+    fptr = arm_rfft_512_fast_init_f32;
     break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128) && defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256))
   case 256U:
-    Sint->bitRevLength = ARMBITREVINDEXTABLE_256_TABLE_LENGTH;
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable256;
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_256;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_512;
+    fptr = arm_rfft_256_fast_init_f32;
     break;
+#endif
+#if (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64) && defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128))
   case 128U:
-    Sint->bitRevLength = ARMBITREVINDEXTABLE_128_TABLE_LENGTH;
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable128;
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_128;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_256;
+    fptr = arm_rfft_128_fast_init_f32;
     break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32) && defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64))
   case 64U:
-    Sint->bitRevLength = ARMBITREVINDEXTABLE_64_TABLE_LENGTH;
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable64;
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_64;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_128;
+    fptr = arm_rfft_64_fast_init_f32;
     break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_BITREVIDX_FLT_16) && defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32))
   case 32U:
-    Sint->bitRevLength = ARMBITREVINDEXTABLE_32_TABLE_LENGTH;
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable32;
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_32;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_64;
+    fptr = arm_rfft_32_fast_init_f32;
     break;
-  case 16U:
-    Sint->bitRevLength = ARMBITREVINDEXTABLE_16_TABLE_LENGTH;
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable16;
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_16;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_32;
-    break;
+#endif
   default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
+    return ARM_MATH_ARGUMENT_ERROR;
   }
 
-  return (status);
+  if( ! fptr ) return ARM_MATH_ARGUMENT_ERROR;
+  return fptr( S );
+
 }
 
 /**
- * @} end of RealFFT group
+  @} end of RealFFT group
  */
diff --git a/DSP/Source/TransformFunctions/arm_rfft_init_f32.c b/DSP/Source/TransformFunctions/arm_rfft_init_f32.c
index bb3213a..141f8b6 100644
--- a/DSP/Source/TransformFunctions/arm_rfft_init_f32.c
+++ b/DSP/Source/TransformFunctions/arm_rfft_init_f32.c
@@ -3,13 +3,13 @@
  * Title:        arm_rfft_init_f32.c
  * Description:  RFFT & RIFFT Floating point initialisation function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -27,4177 +27,43 @@
  */
 
 #include "arm_math.h"
+#include "arm_common_tables.h"
+
 
 /**
- * @ingroup RealFFT
+  @addtogroup RealFFT
+  @{
  */
 
 /**
- * @addtogroup RealFFT_Table Real FFT Tables
- * @{
+  @brief         Initialization function for the floating-point RFFT/RIFFT.
+  @deprecated    Do not use this function. It has been superceded by \ref arm_rfft_fast_init_f32 and will be removed in the future.
+  @param[in,out] S             points to an instance of the floating-point RFFT/RIFFT structure
+  @param[in,out] S_CFFT        points to an instance of the floating-point CFFT/CIFFT structure
+  @param[in]     fftLenReal     length of the FFT.
+  @param[in]     ifftFlagR      flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLenReal</code> is not a supported length
+
+  @par Description
+                   The parameter <code>fftLenReal</code>specifies length of RFFT/RIFFT Process.
+                   Supported FFT Lengths are 128, 512, 2048.
+  @par
+                   The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
+  @par
+                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   This function also initializes Twiddle factor table.
  */
 
-/**
-* \par
-* Generation of realCoefA array:
-* \par
-* 	n = 4096
-* <pre>for (i = 0; i < n; i++)
-*  {
-*    pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
-*    pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-*  } </pre>
-*/
-static const float32_t realCoefA[8192] = {
-  0.500000000000000f, -0.500000000000000f, 0.499616503715515f, -0.499999850988388f,
-  0.499233007431030f, -0.499999403953552f, 0.498849511146545f, -0.499998688697815f,
-  0.498466014862061f, -0.499997645616531f, 0.498082518577576f, -0.499996334314346f,
-  0.497699022293091f, -0.499994695186615f, 0.497315555810928f, -0.499992787837982f,
-  0.496932059526443f, -0.499990582466125f, 0.496548563241959f, -0.499988079071045f,
-  0.496165096759796f, -0.499985307455063f, 0.495781600475311f, -0.499982208013535f,
-  0.495398133993149f, -0.499978810548782f, 0.495014637708664f, -0.499975144863129f,
-  0.494631171226501f, -0.499971181154251f, 0.494247704744339f, -0.499966919422150f,
-  0.493864238262177f, -0.499962359666824f, 0.493480771780014f, -0.499957501888275f,
-  0.493097305297852f, -0.499952346086502f, 0.492713838815689f, -0.499946922063828f,
-  0.492330402135849f, -0.499941170215607f, 0.491946935653687f, -0.499935150146484f,
-  0.491563498973846f, -0.499928832054138f, 0.491180062294006f, -0.499922215938568f,
-  0.490796625614166f, -0.499915301799774f, 0.490413218736649f, -0.499908089637756f,
-  0.490029782056808f, -0.499900579452515f, 0.489646375179291f, -0.499892801046371f,
-  0.489262968301773f, -0.499884694814682f, 0.488879561424255f, -0.499876320362091f,
-  0.488496154546738f, -0.499867647886276f, 0.488112777471542f, -0.499858677387238f,
-  0.487729400396347f, -0.499849408864975f, 0.487346023321152f, -0.499839842319489f,
-  0.486962646245956f, -0.499830007553101f, 0.486579269170761f, -0.499819844961166f,
-  0.486195921897888f, -0.499809414148331f, 0.485812574625015f, -0.499798685312271f,
-  0.485429257154465f, -0.499787658452988f, 0.485045909881592f, -0.499776333570480f,
-  0.484662592411041f, -0.499764710664749f, 0.484279274940491f, -0.499752789735794f,
-  0.483895987272263f, -0.499740600585938f, 0.483512699604034f, -0.499728083610535f,
-  0.483129411935806f, -0.499715298414230f, 0.482746154069901f, -0.499702215194702f,
-  0.482362866401672f, -0.499688833951950f, 0.481979638338089f, -0.499675154685974f,
-  0.481596380472183f, -0.499661177396774f, 0.481213152408600f, -0.499646931886673f,
-  0.480829954147339f, -0.499632388353348f, 0.480446726083755f, -0.499617516994476f,
-  0.480063527822495f, -0.499602377414703f, 0.479680359363556f, -0.499586939811707f,
-  0.479297190904617f, -0.499571204185486f, 0.478914022445679f, -0.499555170536041f,
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-  0.420570939779282f, 0.493650704622269f, 0.420949578285217f, 0.493711471557617f,
-  0.421328276395798f, 0.493771970272064f, 0.421707004308701f, 0.493832170963287f,
-  0.422085791826248f, 0.493892073631287f, 0.422464638948441f, 0.493951678276062f,
-  0.422843515872955f, 0.494011014699936f, 0.423222452402115f, 0.494070053100586f,
-  0.423601418733597f, 0.494128793478012f, 0.423980414867401f, 0.494187235832214f,
-  0.424359470605850f, 0.494245409965515f, 0.424738585948944f, 0.494303256273270f,
-  0.425117731094360f, 0.494360834360123f, 0.425496935844421f, 0.494418144226074f,
-  0.425876170396805f, 0.494475126266479f, 0.426255434751511f, 0.494531840085983f,
-  0.426634758710861f, 0.494588255882263f, 0.427014142274857f, 0.494644373655319f,
-  0.427393525838852f, 0.494700223207474f, 0.427772998809814f, 0.494755744934082f,
-  0.428152471780777f, 0.494810998439789f, 0.428532034158707f, 0.494865983724594f,
-  0.428911596536636f, 0.494920641183853f, 0.429291218519211f, 0.494975030422211f,
-  0.429670870304108f, 0.495029091835022f, 0.430050581693649f, 0.495082914829254f,
-  0.430430322885513f, 0.495136409997940f, 0.430810123682022f, 0.495189607143402f,
-  0.431189924478531f, 0.495242536067963f, 0.431569814682007f, 0.495295166969299f,
-  0.431949704885483f, 0.495347499847412f, 0.432329654693604f, 0.495399564504623f,
-  0.432709634304047f, 0.495451331138611f, 0.433089673519135f, 0.495502769947052f,
-  0.433469742536545f, 0.495553970336914f, 0.433849841356277f, 0.495604842901230f,
-  0.434229999780655f, 0.495655417442322f, 0.434610158205032f, 0.495705723762512f,
-  0.434990376234055f, 0.495755732059479f, 0.435370653867722f, 0.495805442333221f,
-  0.435750931501389f, 0.495854884386063f, 0.436131268739700f, 0.495903998613358f,
-  0.436511665582657f, 0.495952844619751f, 0.436892062425613f, 0.496001392602921f,
-  0.437272518873215f, 0.496049642562866f, 0.437653005123138f, 0.496097624301910f,
-  0.438033521175385f, 0.496145308017731f, 0.438414067029953f, 0.496192663908005f,
-  0.438794672489166f, 0.496239781379700f, 0.439175277948380f, 0.496286571025848f,
-  0.439555943012238f, 0.496333062648773f, 0.439936667680740f, 0.496379286050797f,
-  0.440317392349243f, 0.496425211429596f, 0.440698176622391f, 0.496470838785172f,
-  0.441078960895538f, 0.496516168117523f, 0.441459804773331f, 0.496561229228973f,
-  0.441840678453445f, 0.496605962514877f, 0.442221581935883f, 0.496650427579880f,
-  0.442602545022964f, 0.496694594621658f, 0.442983508110046f, 0.496738493442535f,
-  0.443364530801773f, 0.496782064437866f, 0.443745553493500f, 0.496825367212296f,
-  0.444126635789871f, 0.496868371963501f, 0.444507747888565f, 0.496911078691483f,
-  0.444888889789581f, 0.496953487396240f, 0.445270061492920f, 0.496995598077774f,
-  0.445651292800903f, 0.497037440538406f, 0.446032524108887f, 0.497078984975815f,
-  0.446413785219193f, 0.497120231389999f, 0.446795076131821f, 0.497161179780960f,
-  0.447176426649094f, 0.497201830148697f, 0.447557777166367f, 0.497242212295532f,
-  0.447939187288284f, 0.497282296419144f, 0.448320597410202f, 0.497322082519531f,
-  0.448702067136765f, 0.497361570596695f, 0.449083566665649f, 0.497400760650635f,
-  0.449465066194534f, 0.497439652681351f, 0.449846625328064f, 0.497478276491165f,
-  0.450228184461594f, 0.497516602277756f, 0.450609803199768f, 0.497554630041122f,
-  0.450991421937943f, 0.497592359781265f, 0.451373100280762f, 0.497629791498184f,
-  0.451754778623581f, 0.497666954994202f, 0.452136516571045f, 0.497703820466995f,
-  0.452518254518509f, 0.497740387916565f, 0.452900022268295f, 0.497776657342911f,
-  0.453281819820404f, 0.497812628746033f, 0.453663676977158f, 0.497848302125931f,
-  0.454045534133911f, 0.497883707284927f, 0.454427421092987f, 0.497918814420700f,
-  0.454809308052063f, 0.497953623533249f, 0.455191254615784f, 0.497988134622574f,
-  0.455573230981827f, 0.498022347688675f, 0.455955207347870f, 0.498056292533875f,
-  0.456337243318558f, 0.498089909553528f, 0.456719279289246f, 0.498123258352280f,
-  0.457101345062256f, 0.498156309127808f, 0.457483440637589f, 0.498189061880112f,
-  0.457865566015244f, 0.498221516609192f, 0.458247691392899f, 0.498253703117371f,
-  0.458629876375198f, 0.498285561800003f, 0.459012061357498f, 0.498317152261734f,
-  0.459394276142120f, 0.498348444700241f, 0.459776520729065f, 0.498379439115524f,
-  0.460158795118332f, 0.498410135507584f, 0.460541069507599f, 0.498440563678741f,
-  0.460923373699188f, 0.498470664024353f, 0.461305707693100f, 0.498500496149063f,
-  0.461688071489334f, 0.498530030250549f, 0.462070435285568f, 0.498559266328812f,
-  0.462452858686447f, 0.498588204383850f, 0.462835282087326f, 0.498616874217987f,
-  0.463217705488205f, 0.498645216226578f, 0.463600188493729f, 0.498673290014267f,
-  0.463982671499252f, 0.498701065778732f, 0.464365184307098f, 0.498728543519974f,
-  0.464747726917267f, 0.498755723237991f, 0.465130269527435f, 0.498782604932785f,
-  0.465512841939926f, 0.498809218406677f, 0.465895414352417f, 0.498835533857346f,
-  0.466278046369553f, 0.498861521482468f, 0.466660678386688f, 0.498887240886688f,
-  0.467043310403824f, 0.498912662267685f, 0.467426002025604f, 0.498937815427780f,
-  0.467808693647385f, 0.498962640762329f, 0.468191385269165f, 0.498987197875977f,
-  0.468574106693268f, 0.499011427164078f, 0.468956857919693f, 0.499035388231277f,
-  0.469339638948441f, 0.499059051275253f, 0.469722419977188f, 0.499082416296005f,
-  0.470105201005936f, 0.499105513095856f, 0.470488041639328f, 0.499128282070160f,
-  0.470870882272720f, 0.499150782823563f, 0.471253722906113f, 0.499172955751419f,
-  0.471636593341827f, 0.499194860458374f, 0.472019463777542f, 0.499216467142105f,
-  0.472402364015579f, 0.499237775802612f, 0.472785294055939f, 0.499258816242218f,
-  0.473168224096298f, 0.499279528856277f, 0.473551183938980f, 0.499299973249435f,
-  0.473934143781662f, 0.499320119619370f, 0.474317133426666f, 0.499339967966080f,
-  0.474700123071671f, 0.499359518289566f, 0.475083142518997f, 0.499378770589828f,
-  0.475466161966324f, 0.499397724866867f, 0.475849211215973f, 0.499416410923004f,
-  0.476232260465622f, 0.499434769153595f, 0.476615339517593f, 0.499452859163284f,
-  0.476998418569565f, 0.499470651149750f, 0.477381497621536f, 0.499488145112991f,
-  0.477764606475830f, 0.499505341053009f, 0.478147745132446f, 0.499522238969803f,
-  0.478530883789063f, 0.499538868665695f, 0.478914022445679f, 0.499555170536041f,
-  0.479297190904617f, 0.499571204185486f, 0.479680359363556f, 0.499586939811707f,
-  0.480063527822495f, 0.499602377414703f, 0.480446726083755f, 0.499617516994476f,
-  0.480829954147339f, 0.499632388353348f, 0.481213152408600f, 0.499646931886673f,
-  0.481596380472183f, 0.499661177396774f, 0.481979638338089f, 0.499675154685974f,
-  0.482362866401672f, 0.499688833951950f, 0.482746154069901f, 0.499702215194702f,
-  0.483129411935806f, 0.499715298414230f, 0.483512699604034f, 0.499728083610535f,
-  0.483895987272263f, 0.499740600585938f, 0.484279274940491f, 0.499752789735794f,
-  0.484662592411041f, 0.499764710664749f, 0.485045909881592f, 0.499776333570480f,
-  0.485429257154465f, 0.499787658452988f, 0.485812574625015f, 0.499798685312271f,
-  0.486195921897888f, 0.499809414148331f, 0.486579269170761f, 0.499819844961166f,
-  0.486962646245956f, 0.499830007553101f, 0.487346023321152f, 0.499839842319489f,
-  0.487729400396347f, 0.499849408864975f, 0.488112777471542f, 0.499858677387238f,
-  0.488496154546738f, 0.499867647886276f, 0.488879561424255f, 0.499876320362091f,
-  0.489262968301773f, 0.499884694814682f, 0.489646375179291f, 0.499892801046371f,
-  0.490029782056808f, 0.499900579452515f, 0.490413218736649f, 0.499908089637756f,
-  0.490796625614166f, 0.499915301799774f, 0.491180062294006f, 0.499922215938568f,
-  0.491563498973846f, 0.499928832054138f, 0.491946935653687f, 0.499935150146484f,
-  0.492330402135849f, 0.499941170215607f, 0.492713838815689f, 0.499946922063828f,
-  0.493097305297852f, 0.499952346086502f, 0.493480771780014f, 0.499957501888275f,
-  0.493864238262177f, 0.499962359666824f, 0.494247704744339f, 0.499966919422150f,
-  0.494631171226501f, 0.499971181154251f, 0.495014637708664f, 0.499975144863129f,
-  0.495398133993149f, 0.499978810548782f, 0.495781600475311f, 0.499982208013535f,
-  0.496165096759796f, 0.499985307455063f, 0.496548563241959f, 0.499988079071045f,
-  0.496932059526443f, 0.499990582466125f, 0.497315555810928f, 0.499992787837982f,
-  0.497699022293091f, 0.499994695186615f, 0.498082518577576f, 0.499996334314346f,
-  0.498466014862061f, 0.499997645616531f, 0.498849511146545f, 0.499998688697815f,
-  0.499233007431030f, 0.499999403953552f, 0.499616503715515f, 0.499999850988388f,
-};
-
-
-/**
-* \par
-* Generation of realCoefB array:
-* \par
-* n = 4096
-* <pre>for (i = 0; i < n; i++)
-* {
-*    pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
-*    pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-*  } </pre>
-*
-*/
-static const float32_t realCoefB[8192] = {
-  0.500000000000000f, 0.500000000000000f, 0.500383496284485f, 0.499999850988388f,
-  0.500766992568970f, 0.499999403953552f, 0.501150488853455f, 0.499998688697815f,
-  0.501533985137939f, 0.499997645616531f, 0.501917481422424f, 0.499996334314346f,
-  0.502300977706909f, 0.499994695186615f, 0.502684473991394f, 0.499992787837982f,
-  0.503067970275879f, 0.499990582466125f, 0.503451406955719f, 0.499988079071045f,
-  0.503834903240204f, 0.499985307455063f, 0.504218399524689f, 0.499982208013535f,
-  0.504601895809174f, 0.499978810548782f, 0.504985332489014f, 0.499975144863129f,
-  0.505368828773499f, 0.499971181154251f, 0.505752325057983f, 0.499966919422150f,
-  0.506135761737823f, 0.499962359666824f, 0.506519258022308f, 0.499957501888275f,
-  0.506902694702148f, 0.499952346086502f, 0.507286131381989f, 0.499946922063828f,
-  0.507669627666473f, 0.499941170215607f, 0.508053064346313f, 0.499935150146484f,
-  0.508436501026154f, 0.499928832054138f, 0.508819937705994f, 0.499922215938568f,
-  0.509203374385834f, 0.499915301799774f, 0.509586811065674f, 0.499908089637756f,
-  0.509970188140869f, 0.499900579452515f, 0.510353624820709f, 0.499892801046371f,
-  0.510737061500549f, 0.499884694814682f, 0.511120438575745f, 0.499876320362091f,
-  0.511503815650940f, 0.499867647886276f, 0.511887252330780f, 0.499858677387238f,
-  0.512270629405975f, 0.499849408864975f, 0.512654006481171f, 0.499839842319489f,
-  0.513037383556366f, 0.499830007553101f, 0.513420701026917f, 0.499819844961166f,
-  0.513804078102112f, 0.499809414148331f, 0.514187395572662f, 0.499798685312271f,
-  0.514570772647858f, 0.499787658452988f, 0.514954090118408f, 0.499776333570480f,
-  0.515337407588959f, 0.499764710664749f, 0.515720725059509f, 0.499752789735794f,
-  0.516103982925415f, 0.499740600585938f, 0.516487300395966f, 0.499728083610535f,
-  0.516870558261871f, 0.499715298414230f, 0.517253875732422f, 0.499702215194702f,
-  0.517637133598328f, 0.499688833951950f, 0.518020391464233f, 0.499675154685974f,
-  0.518403589725494f, 0.499661177396774f, 0.518786847591400f, 0.499646931886673f,
-  0.519170045852661f, 0.499632388353348f, 0.519553244113922f, 0.499617516994476f,
-  0.519936442375183f, 0.499602377414703f, 0.520319640636444f, 0.499586939811707f,
-  0.520702838897705f, 0.499571204185486f, 0.521085977554321f, 0.499555170536041f,
-  0.521469116210938f, 0.499538868665695f, 0.521852254867554f, 0.499522238969803f,
-  0.522235393524170f, 0.499505341053009f, 0.522618472576141f, 0.499488145112991f,
-  0.523001611232758f, 0.499470651149750f, 0.523384690284729f, 0.499452859163284f,
-  0.523767769336700f, 0.499434769153595f, 0.524150788784027f, 0.499416410923004f,
-  0.524533808231354f, 0.499397724866867f, 0.524916887283325f, 0.499378770589828f,
-  0.525299847126007f, 0.499359518289566f, 0.525682866573334f, 0.499339967966080f,
-  0.526065826416016f, 0.499320119619370f, 0.526448845863342f, 0.499299973249435f,
-  0.526831746101379f, 0.499279528856277f, 0.527214705944061f, 0.499258816242218f,
-  0.527597606182098f, 0.499237775802612f, 0.527980506420136f, 0.499216467142105f,
-  0.528363406658173f, 0.499194860458374f, 0.528746306896210f, 0.499172955751419f,
-  0.529129147529602f, 0.499150782823563f, 0.529511988162994f, 0.499128282070160f,
-  0.529894769191742f, 0.499105513095856f, 0.530277609825134f, 0.499082416296005f,
-  0.530660390853882f, 0.499059051275253f, 0.531043112277985f, 0.499035388231277f,
-  0.531425893306732f, 0.499011427164078f, 0.531808614730835f, 0.498987197875977f,
-  0.532191336154938f, 0.498962640762329f, 0.532573997974396f, 0.498937815427780f,
-  0.532956659793854f, 0.498912662267685f, 0.533339321613312f, 0.498887240886688f,
-  0.533721983432770f, 0.498861521482468f, 0.534104585647583f, 0.498835533857346f,
-  0.534487187862396f, 0.498809218406677f, 0.534869730472565f, 0.498782604932785f,
-  0.535252273082733f, 0.498755723237991f, 0.535634815692902f, 0.498728543519974f,
-  0.536017298698425f, 0.498701065778732f, 0.536399841308594f, 0.498673290014267f,
-  0.536782264709473f, 0.498645216226578f, 0.537164747714996f, 0.498616874217987f,
-  0.537547171115875f, 0.498588204383850f, 0.537929534912109f, 0.498559266328812f,
-  0.538311958312988f, 0.498530030250549f, 0.538694262504578f, 0.498500496149063f,
-  0.539076626300812f, 0.498470664024353f, 0.539458930492401f, 0.498440563678741f,
-  0.539841234683990f, 0.498410135507584f, 0.540223479270935f, 0.498379439115524f,
-  0.540605723857880f, 0.498348444700241f, 0.540987968444824f, 0.498317152261734f,
-  0.541370153427124f, 0.498285561800003f, 0.541752278804779f, 0.498253703117371f,
-  0.542134463787079f, 0.498221516609192f, 0.542516589164734f, 0.498189061880112f,
-  0.542898654937744f, 0.498156309127808f, 0.543280720710754f, 0.498123258352280f,
-  0.543662786483765f, 0.498089909553528f, 0.544044792652130f, 0.498056292533875f,
-  0.544426798820496f, 0.498022347688675f, 0.544808745384216f, 0.497988134622574f,
-  0.545190691947937f, 0.497953623533249f, 0.545572578907013f, 0.497918814420700f,
-  0.545954465866089f, 0.497883707284927f, 0.546336352825165f, 0.497848302125931f,
-  0.546718180179596f, 0.497812628746033f, 0.547099947929382f, 0.497776657342911f,
-  0.547481775283813f, 0.497740387916565f, 0.547863483428955f, 0.497703820466995f,
-  0.548245191574097f, 0.497666954994202f, 0.548626899719238f, 0.497629791498184f,
-  0.549008548259735f, 0.497592359781265f, 0.549390196800232f, 0.497554630041122f,
-  0.549771785736084f, 0.497516602277756f, 0.550153374671936f, 0.497478276491165f,
-  0.550534904003143f, 0.497439652681351f, 0.550916433334351f, 0.497400760650635f,
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-  0.559682607650757f, -0.496425211429596f, 0.559301853179932f, -0.496470838785172f,
-  0.558921039104462f, -0.496516168117523f, 0.558540165424347f, -0.496561229228973f,
-  0.558159291744232f, -0.496605962514877f, 0.557778418064117f, -0.496650427579880f,
-  0.557397484779358f, -0.496694594621658f, 0.557016491889954f, -0.496738493442535f,
-  0.556635499000549f, -0.496782064437866f, 0.556254446506500f, -0.496825367212296f,
-  0.555873334407806f, -0.496868371963501f, 0.555492222309113f, -0.496911078691483f,
-  0.555111110210419f, -0.496953487396240f, 0.554729938507080f, -0.496995598077774f,
-  0.554348707199097f, -0.497037440538406f, 0.553967475891113f, -0.497078984975815f,
-  0.553586184978485f, -0.497120231389999f, 0.553204894065857f, -0.497161179780960f,
-  0.552823603153229f, -0.497201830148697f, 0.552442193031311f, -0.497242212295532f,
-  0.552060842514038f, -0.497282296419144f, 0.551679372787476f, -0.497322082519531f,
-  0.551297962665558f, -0.497361570596695f, 0.550916433334351f, -0.497400760650635f,
-  0.550534904003143f, -0.497439652681351f, 0.550153374671936f, -0.497478276491165f,
-  0.549771785736084f, -0.497516602277756f, 0.549390196800232f, -0.497554630041122f,
-  0.549008548259735f, -0.497592359781265f, 0.548626899719238f, -0.497629791498184f,
-  0.548245191574097f, -0.497666954994202f, 0.547863483428955f, -0.497703820466995f,
-  0.547481775283813f, -0.497740387916565f, 0.547099947929382f, -0.497776657342911f,
-  0.546718180179596f, -0.497812628746033f, 0.546336352825165f, -0.497848302125931f,
-  0.545954465866089f, -0.497883707284927f, 0.545572578907013f, -0.497918814420700f,
-  0.545190691947937f, -0.497953623533249f, 0.544808745384216f, -0.497988134622574f,
-  0.544426798820496f, -0.498022347688675f, 0.544044792652130f, -0.498056292533875f,
-  0.543662786483765f, -0.498089909553528f, 0.543280720710754f, -0.498123258352280f,
-  0.542898654937744f, -0.498156309127808f, 0.542516589164734f, -0.498189061880112f,
-  0.542134463787079f, -0.498221516609192f, 0.541752278804779f, -0.498253703117371f,
-  0.541370153427124f, -0.498285561800003f, 0.540987968444824f, -0.498317152261734f,
-  0.540605723857880f, -0.498348444700241f, 0.540223479270935f, -0.498379439115524f,
-  0.539841234683990f, -0.498410135507584f, 0.539458930492401f, -0.498440563678741f,
-  0.539076626300812f, -0.498470664024353f, 0.538694262504578f, -0.498500496149063f,
-  0.538311958312988f, -0.498530030250549f, 0.537929534912109f, -0.498559266328812f,
-  0.537547171115875f, -0.498588204383850f, 0.537164747714996f, -0.498616874217987f,
-  0.536782264709473f, -0.498645216226578f, 0.536399841308594f, -0.498673290014267f,
-  0.536017298698425f, -0.498701065778732f, 0.535634815692902f, -0.498728543519974f,
-  0.535252273082733f, -0.498755723237991f, 0.534869730472565f, -0.498782604932785f,
-  0.534487187862396f, -0.498809218406677f, 0.534104585647583f, -0.498835533857346f,
-  0.533721983432770f, -0.498861521482468f, 0.533339321613312f, -0.498887240886688f,
-  0.532956659793854f, -0.498912662267685f, 0.532573997974396f, -0.498937815427780f,
-  0.532191336154938f, -0.498962640762329f, 0.531808614730835f, -0.498987197875977f,
-  0.531425893306732f, -0.499011427164078f, 0.531043112277985f, -0.499035388231277f,
-  0.530660390853882f, -0.499059051275253f, 0.530277609825134f, -0.499082416296005f,
-  0.529894769191742f, -0.499105513095856f, 0.529511988162994f, -0.499128282070160f,
-  0.529129147529602f, -0.499150782823563f, 0.528746306896210f, -0.499172955751419f,
-  0.528363406658173f, -0.499194860458374f, 0.527980506420136f, -0.499216467142105f,
-  0.527597606182098f, -0.499237775802612f, 0.527214705944061f, -0.499258816242218f,
-  0.526831746101379f, -0.499279528856277f, 0.526448845863342f, -0.499299973249435f,
-  0.526065826416016f, -0.499320119619370f, 0.525682866573334f, -0.499339967966080f,
-  0.525299847126007f, -0.499359518289566f, 0.524916887283325f, -0.499378770589828f,
-  0.524533808231354f, -0.499397724866867f, 0.524150788784027f, -0.499416410923004f,
-  0.523767769336700f, -0.499434769153595f, 0.523384690284729f, -0.499452859163284f,
-  0.523001611232758f, -0.499470651149750f, 0.522618472576141f, -0.499488145112991f,
-  0.522235393524170f, -0.499505341053009f, 0.521852254867554f, -0.499522238969803f,
-  0.521469116210938f, -0.499538868665695f, 0.521085977554321f, -0.499555170536041f,
-  0.520702838897705f, -0.499571204185486f, 0.520319640636444f, -0.499586939811707f,
-  0.519936442375183f, -0.499602377414703f, 0.519553244113922f, -0.499617516994476f,
-  0.519170045852661f, -0.499632388353348f, 0.518786847591400f, -0.499646931886673f,
-  0.518403589725494f, -0.499661177396774f, 0.518020391464233f, -0.499675154685974f,
-  0.517637133598328f, -0.499688833951950f, 0.517253875732422f, -0.499702215194702f,
-  0.516870558261871f, -0.499715298414230f, 0.516487300395966f, -0.499728083610535f,
-  0.516103982925415f, -0.499740600585938f, 0.515720725059509f, -0.499752789735794f,
-  0.515337407588959f, -0.499764710664749f, 0.514954090118408f, -0.499776333570480f,
-  0.514570772647858f, -0.499787658452988f, 0.514187395572662f, -0.499798685312271f,
-  0.513804078102112f, -0.499809414148331f, 0.513420701026917f, -0.499819844961166f,
-  0.513037383556366f, -0.499830007553101f, 0.512654006481171f, -0.499839842319489f,
-  0.512270629405975f, -0.499849408864975f, 0.511887252330780f, -0.499858677387238f,
-  0.511503815650940f, -0.499867647886276f, 0.511120438575745f, -0.499876320362091f,
-  0.510737061500549f, -0.499884694814682f, 0.510353624820709f, -0.499892801046371f,
-  0.509970188140869f, -0.499900579452515f, 0.509586811065674f, -0.499908089637756f,
-  0.509203374385834f, -0.499915301799774f, 0.508819937705994f, -0.499922215938568f,
-  0.508436501026154f, -0.499928832054138f, 0.508053064346313f, -0.499935150146484f,
-  0.507669627666473f, -0.499941170215607f, 0.507286131381989f, -0.499946922063828f,
-  0.506902694702148f, -0.499952346086502f, 0.506519258022308f, -0.499957501888275f,
-  0.506135761737823f, -0.499962359666824f, 0.505752325057983f, -0.499966919422150f,
-  0.505368828773499f, -0.499971181154251f, 0.504985332489014f, -0.499975144863129f,
-  0.504601895809174f, -0.499978810548782f, 0.504218399524689f, -0.499982208013535f,
-  0.503834903240204f, -0.499985307455063f, 0.503451406955719f, -0.499988079071045f,
-  0.503067970275879f, -0.499990582466125f, 0.502684473991394f, -0.499992787837982f,
-  0.502300977706909f, -0.499994695186615f, 0.501917481422424f, -0.499996334314346f,
-  0.501533985137939f, -0.499997645616531f, 0.501150488853455f, -0.499998688697815f,
-  0.500766992568970f, -0.499999403953552f, 0.500383496284485f, -0.499999850988388f,
-};
-
-
-
-/**
-* @brief  Initialization function for the floating-point RFFT/RIFFT.
-* @deprecated Do not use this function.  It has been superceded by \ref arm_rfft_fast_init_f32 and will be removed
-* in the future.
-* @param[in,out] *S             points to an instance of the floating-point RFFT/RIFFT structure.
-* @param[in,out] *S_CFFT        points to an instance of the floating-point CFFT/CIFFT structure.
-* @param[in]     fftLenReal     length of the FFT.
-* @param[in]     ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
-*
-* \par Description:
-* \par
-* The parameter <code>fftLenReal</code>	Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048.
-* \par
-* The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed.
-* Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
-* \par
-* The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-* \par
-* This function also initializes Twiddle factor table.
-*/
-
-/**
-* @} end of RealFFT_Table group
-*/
-
-/**
-* @addtogroup RealFFT
-* @{
-*/
-
 arm_status arm_rfft_init_f32(
   arm_rfft_instance_f32 * S,
   arm_cfft_radix4_instance_f32 * S_CFFT,
@@ -4268,6 +134,6 @@
 
 }
 
-  /**
-   * @} end of RealFFT group
-   */
+/**
+  @} end of RealFFT group
+ */
diff --git a/DSP/Source/TransformFunctions/arm_rfft_init_q15.c b/DSP/Source/TransformFunctions/arm_rfft_init_q15.c
index 0e09737..6f90771 100644
--- a/DSP/Source/TransformFunctions/arm_rfft_init_q15.c
+++ b/DSP/Source/TransformFunctions/arm_rfft_init_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_rfft_init_q15.c
  * Description:  RFFT & RIFFT Q15 initialisation function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -31,2126 +31,37 @@
 #include "arm_const_structs.h"
 
 /**
-* @ingroup RealFFT
-*/
+  @addtogroup RealFFT
+  @{
+ */
 
 /**
- * @addtogroup RealFFT_Table Real FFT Tables
-* @{
-*/
+  @brief         Initialization function for the Q15 RFFT/RIFFT.
+  @param[in,out] S              points to an instance of the Q15 RFFT/RIFFT structure
+  @param[in]     fftLenReal     length of the FFT
+  @param[in]     ifftFlagR      flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLenReal</code> is not a supported length
 
-/**
-* \par
-* Generation fixed-point realCoefAQ15 array in Q15 format:
-* \par
-* n = 4096
-* <pre>for (i = 0; i < n; i++)
-*  {
-*    pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
-*    pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-*  } </pre>
-* \par
-* Convert to fixed point Q15 format
-*       round(pATable[i] * pow(2, 15))
-*/
-const q15_t ALIGN4 realCoefAQ15[8192] = {
-    (q15_t)0x4000, (q15_t)0xc000, (q15_t)0x3ff3, (q15_t)0xc000, (q15_t)0x3fe7, (q15_t)0xc000, (q15_t)0x3fda, (q15_t)0xc000,
-    (q15_t)0x3fce, (q15_t)0xc000, (q15_t)0x3fc1, (q15_t)0xc000, (q15_t)0x3fb5, (q15_t)0xc000, (q15_t)0x3fa8, (q15_t)0xc000,
-    (q15_t)0x3f9b, (q15_t)0xc000, (q15_t)0x3f8f, (q15_t)0xc000, (q15_t)0x3f82, (q15_t)0xc000, (q15_t)0x3f76, (q15_t)0xc001,
-    (q15_t)0x3f69, (q15_t)0xc001, (q15_t)0x3f5d, (q15_t)0xc001, (q15_t)0x3f50, (q15_t)0xc001, (q15_t)0x3f44, (q15_t)0xc001,
-    (q15_t)0x3f37, (q15_t)0xc001, (q15_t)0x3f2a, (q15_t)0xc001, (q15_t)0x3f1e, (q15_t)0xc002, (q15_t)0x3f11, (q15_t)0xc002,
-    (q15_t)0x3f05, (q15_t)0xc002, (q15_t)0x3ef8, (q15_t)0xc002, (q15_t)0x3eec, (q15_t)0xc002, (q15_t)0x3edf, (q15_t)0xc003,
-    (q15_t)0x3ed2, (q15_t)0xc003, (q15_t)0x3ec6, (q15_t)0xc003, (q15_t)0x3eb9, (q15_t)0xc003, (q15_t)0x3ead, (q15_t)0xc004,
-    (q15_t)0x3ea0, (q15_t)0xc004, (q15_t)0x3e94, (q15_t)0xc004, (q15_t)0x3e87, (q15_t)0xc004, (q15_t)0x3e7a, (q15_t)0xc005,
-    (q15_t)0x3e6e, (q15_t)0xc005, (q15_t)0x3e61, (q15_t)0xc005, (q15_t)0x3e55, (q15_t)0xc006, (q15_t)0x3e48, (q15_t)0xc006,
-    (q15_t)0x3e3c, (q15_t)0xc006, (q15_t)0x3e2f, (q15_t)0xc007, (q15_t)0x3e23, (q15_t)0xc007, (q15_t)0x3e16, (q15_t)0xc007,
-    (q15_t)0x3e09, (q15_t)0xc008, (q15_t)0x3dfd, (q15_t)0xc008, (q15_t)0x3df0, (q15_t)0xc009, (q15_t)0x3de4, (q15_t)0xc009,
-    (q15_t)0x3dd7, (q15_t)0xc009, (q15_t)0x3dcb, (q15_t)0xc00a, (q15_t)0x3dbe, (q15_t)0xc00a, (q15_t)0x3db2, (q15_t)0xc00b,
-    (q15_t)0x3da5, (q15_t)0xc00b, (q15_t)0x3d98, (q15_t)0xc00c, (q15_t)0x3d8c, (q15_t)0xc00c, (q15_t)0x3d7f, (q15_t)0xc00d,
-    (q15_t)0x3d73, (q15_t)0xc00d, (q15_t)0x3d66, (q15_t)0xc00e, (q15_t)0x3d5a, (q15_t)0xc00e, (q15_t)0x3d4d, (q15_t)0xc00f,
-    (q15_t)0x3d40, (q15_t)0xc00f, (q15_t)0x3d34, (q15_t)0xc010, (q15_t)0x3d27, (q15_t)0xc010, (q15_t)0x3d1b, (q15_t)0xc011,
-    (q15_t)0x3d0e, (q15_t)0xc011, (q15_t)0x3d02, (q15_t)0xc012, (q15_t)0x3cf5, (q15_t)0xc013, (q15_t)0x3ce9, (q15_t)0xc013,
-    (q15_t)0x3cdc, (q15_t)0xc014, (q15_t)0x3cd0, (q15_t)0xc014, (q15_t)0x3cc3, (q15_t)0xc015, (q15_t)0x3cb6, (q15_t)0xc016,
-    (q15_t)0x3caa, (q15_t)0xc016, (q15_t)0x3c9d, (q15_t)0xc017, (q15_t)0x3c91, (q15_t)0xc018, (q15_t)0x3c84, (q15_t)0xc018,
-    (q15_t)0x3c78, (q15_t)0xc019, (q15_t)0x3c6b, (q15_t)0xc01a, (q15_t)0x3c5f, (q15_t)0xc01a, (q15_t)0x3c52, (q15_t)0xc01b,
-    (q15_t)0x3c45, (q15_t)0xc01c, (q15_t)0x3c39, (q15_t)0xc01d, (q15_t)0x3c2c, (q15_t)0xc01d, (q15_t)0x3c20, (q15_t)0xc01e,
-    (q15_t)0x3c13, (q15_t)0xc01f, (q15_t)0x3c07, (q15_t)0xc020, (q15_t)0x3bfa, (q15_t)0xc020, (q15_t)0x3bee, (q15_t)0xc021,
-    (q15_t)0x3be1, (q15_t)0xc022, (q15_t)0x3bd5, (q15_t)0xc023, (q15_t)0x3bc8, (q15_t)0xc024, (q15_t)0x3bbc, (q15_t)0xc024,
-    (q15_t)0x3baf, (q15_t)0xc025, (q15_t)0x3ba2, (q15_t)0xc026, (q15_t)0x3b96, (q15_t)0xc027, (q15_t)0x3b89, (q15_t)0xc028,
-    (q15_t)0x3b7d, (q15_t)0xc029, (q15_t)0x3b70, (q15_t)0xc02a, (q15_t)0x3b64, (q15_t)0xc02b, (q15_t)0x3b57, (q15_t)0xc02b,
-    (q15_t)0x3b4b, (q15_t)0xc02c, (q15_t)0x3b3e, (q15_t)0xc02d, (q15_t)0x3b32, (q15_t)0xc02e, (q15_t)0x3b25, (q15_t)0xc02f,
-    (q15_t)0x3b19, (q15_t)0xc030, (q15_t)0x3b0c, (q15_t)0xc031, (q15_t)0x3b00, (q15_t)0xc032, (q15_t)0x3af3, (q15_t)0xc033,
-    (q15_t)0x3ae6, (q15_t)0xc034, (q15_t)0x3ada, (q15_t)0xc035, (q15_t)0x3acd, (q15_t)0xc036, (q15_t)0x3ac1, (q15_t)0xc037,
-    (q15_t)0x3ab4, (q15_t)0xc038, (q15_t)0x3aa8, (q15_t)0xc039, (q15_t)0x3a9b, (q15_t)0xc03a, (q15_t)0x3a8f, (q15_t)0xc03b,
-    (q15_t)0x3a82, (q15_t)0xc03c, (q15_t)0x3a76, (q15_t)0xc03d, (q15_t)0x3a69, (q15_t)0xc03f, (q15_t)0x3a5d, (q15_t)0xc040,
-    (q15_t)0x3a50, (q15_t)0xc041, (q15_t)0x3a44, (q15_t)0xc042, (q15_t)0x3a37, (q15_t)0xc043, (q15_t)0x3a2b, (q15_t)0xc044,
-    (q15_t)0x3a1e, (q15_t)0xc045, (q15_t)0x3a12, (q15_t)0xc047, (q15_t)0x3a05, (q15_t)0xc048, (q15_t)0x39f9, (q15_t)0xc049,
-    (q15_t)0x39ec, (q15_t)0xc04a, (q15_t)0x39e0, (q15_t)0xc04b, (q15_t)0x39d3, (q15_t)0xc04c, (q15_t)0x39c7, (q15_t)0xc04e,
-    (q15_t)0x39ba, (q15_t)0xc04f, (q15_t)0x39ae, (q15_t)0xc050, (q15_t)0x39a1, (q15_t)0xc051, (q15_t)0x3995, (q15_t)0xc053,
-    (q15_t)0x3988, (q15_t)0xc054, (q15_t)0x397c, (q15_t)0xc055, (q15_t)0x396f, (q15_t)0xc056, (q15_t)0x3963, (q15_t)0xc058,
-    (q15_t)0x3956, (q15_t)0xc059, (q15_t)0x394a, (q15_t)0xc05a, (q15_t)0x393d, (q15_t)0xc05c, (q15_t)0x3931, (q15_t)0xc05d,
-    (q15_t)0x3924, (q15_t)0xc05e, (q15_t)0x3918, (q15_t)0xc060, (q15_t)0x390b, (q15_t)0xc061, (q15_t)0x38ff, (q15_t)0xc062,
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-    (q15_t)0x37c7, (q15_t)0xc088, (q15_t)0x37ba, (q15_t)0xc089, (q15_t)0x37ae, (q15_t)0xc08b, (q15_t)0x37a1, (q15_t)0xc08d,
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-    (q15_t)0x36ff, (q15_t)0xc0a3, (q15_t)0x36f3, (q15_t)0xc0a5, (q15_t)0x36e7, (q15_t)0xc0a6, (q15_t)0x36da, (q15_t)0xc0a8,
-    (q15_t)0x36ce, (q15_t)0xc0aa, (q15_t)0x36c1, (q15_t)0xc0ac, (q15_t)0x36b5, (q15_t)0xc0ae, (q15_t)0x36a8, (q15_t)0xc0af,
-    (q15_t)0x369c, (q15_t)0xc0b1, (q15_t)0x3690, (q15_t)0xc0b3, (q15_t)0x3683, (q15_t)0xc0b5, (q15_t)0x3677, (q15_t)0xc0b7,
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-    (q15_t)0x3639, (q15_t)0xc0c0, (q15_t)0x362c, (q15_t)0xc0c2, (q15_t)0x3620, (q15_t)0xc0c4, (q15_t)0x3613, (q15_t)0xc0c6,
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-    (q15_t)0x35d5, (q15_t)0xc0d0, (q15_t)0x35c9, (q15_t)0xc0d2, (q15_t)0x35bc, (q15_t)0xc0d4, (q15_t)0x35b0, (q15_t)0xc0d6,
-    (q15_t)0x35a4, (q15_t)0xc0d8, (q15_t)0x3597, (q15_t)0xc0da, (q15_t)0x358b, (q15_t)0xc0dc, (q15_t)0x357e, (q15_t)0xc0de,
-    (q15_t)0x3572, (q15_t)0xc0e0, (q15_t)0x3566, (q15_t)0xc0e2, (q15_t)0x3559, (q15_t)0xc0e4, (q15_t)0x354d, (q15_t)0xc0e7,
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-    (q15_t)0x34dd, (q15_t)0xc0fa, (q15_t)0x34d1, (q15_t)0xc0fc, (q15_t)0x34c5, (q15_t)0xc0fe, (q15_t)0x34b8, (q15_t)0xc100,
-    (q15_t)0x34ac, (q15_t)0xc103, (q15_t)0x34a0, (q15_t)0xc105, (q15_t)0x3493, (q15_t)0xc107, (q15_t)0x3487, (q15_t)0xc109,
-    (q15_t)0x347b, (q15_t)0xc10c, (q15_t)0x346e, (q15_t)0xc10e, (q15_t)0x3462, (q15_t)0xc110, (q15_t)0x3455, (q15_t)0xc113,
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-    (q15_t)0x33e6, (q15_t)0xc128, (q15_t)0x33da, (q15_t)0xc12a, (q15_t)0x33ce, (q15_t)0xc12c, (q15_t)0x33c1, (q15_t)0xc12f,
-    (q15_t)0x33b5, (q15_t)0xc131, (q15_t)0x33a9, (q15_t)0xc134, (q15_t)0x339c, (q15_t)0xc136, (q15_t)0x3390, (q15_t)0xc138,
-    (q15_t)0x3384, (q15_t)0xc13b, (q15_t)0x3377, (q15_t)0xc13d, (q15_t)0x336b, (q15_t)0xc140, (q15_t)0x335f, (q15_t)0xc142,
-    (q15_t)0x3352, (q15_t)0xc145, (q15_t)0x3346, (q15_t)0xc147, (q15_t)0x333a, (q15_t)0xc14a, (q15_t)0x332d, (q15_t)0xc14c,
-    (q15_t)0x3321, (q15_t)0xc14f, (q15_t)0x3315, (q15_t)0xc151, (q15_t)0x3308, (q15_t)0xc154, (q15_t)0x32fc, (q15_t)0xc156,
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-    (q15_t)0x32bf, (q15_t)0xc163, (q15_t)0x32b2, (q15_t)0xc166, (q15_t)0x32a6, (q15_t)0xc168, (q15_t)0x329a, (q15_t)0xc16b,
-    (q15_t)0x328e, (q15_t)0xc16e, (q15_t)0x3281, (q15_t)0xc170, (q15_t)0x3275, (q15_t)0xc173, (q15_t)0x3269, (q15_t)0xc176,
-    (q15_t)0x325c, (q15_t)0xc178, (q15_t)0x3250, (q15_t)0xc17b, (q15_t)0x3244, (q15_t)0xc17e, (q15_t)0x3238, (q15_t)0xc180,
-    (q15_t)0x322b, (q15_t)0xc183, (q15_t)0x321f, (q15_t)0xc186, (q15_t)0x3213, (q15_t)0xc189, (q15_t)0x3207, (q15_t)0xc18b,
-    (q15_t)0x31fa, (q15_t)0xc18e, (q15_t)0x31ee, (q15_t)0xc191, (q15_t)0x31e2, (q15_t)0xc194, (q15_t)0x31d5, (q15_t)0xc196,
-    (q15_t)0x31c9, (q15_t)0xc199, (q15_t)0x31bd, (q15_t)0xc19c, (q15_t)0x31b1, (q15_t)0xc19f, (q15_t)0x31a4, (q15_t)0xc1a2,
-    (q15_t)0x3198, (q15_t)0xc1a4, (q15_t)0x318c, (q15_t)0xc1a7, (q15_t)0x3180, (q15_t)0xc1aa, (q15_t)0x3174, (q15_t)0xc1ad,
-    (q15_t)0x3167, (q15_t)0xc1b0, (q15_t)0x315b, (q15_t)0xc1b3, (q15_t)0x314f, (q15_t)0xc1b6, (q15_t)0x3143, (q15_t)0xc1b8,
-    (q15_t)0x3136, (q15_t)0xc1bb, (q15_t)0x312a, (q15_t)0xc1be, (q15_t)0x311e, (q15_t)0xc1c1, (q15_t)0x3112, (q15_t)0xc1c4,
-    (q15_t)0x3105, (q15_t)0xc1c7, (q15_t)0x30f9, (q15_t)0xc1ca, (q15_t)0x30ed, (q15_t)0xc1cd, (q15_t)0x30e1, (q15_t)0xc1d0,
-    (q15_t)0x30d5, (q15_t)0xc1d3, (q15_t)0x30c8, (q15_t)0xc1d6, (q15_t)0x30bc, (q15_t)0xc1d9, (q15_t)0x30b0, (q15_t)0xc1dc,
-    (q15_t)0x30a4, (q15_t)0xc1df, (q15_t)0x3098, (q15_t)0xc1e2, (q15_t)0x308b, (q15_t)0xc1e5, (q15_t)0x307f, (q15_t)0xc1e8,
-    (q15_t)0x3073, (q15_t)0xc1eb, (q15_t)0x3067, (q15_t)0xc1ee, (q15_t)0x305b, (q15_t)0xc1f1, (q15_t)0x304e, (q15_t)0xc1f4,
-    (q15_t)0x3042, (q15_t)0xc1f7, (q15_t)0x3036, (q15_t)0xc1fa, (q15_t)0x302a, (q15_t)0xc1fd, (q15_t)0x301e, (q15_t)0xc201,
-    (q15_t)0x3012, (q15_t)0xc204, (q15_t)0x3005, (q15_t)0xc207, (q15_t)0x2ff9, (q15_t)0xc20a, (q15_t)0x2fed, (q15_t)0xc20d,
-    (q15_t)0x2fe1, (q15_t)0xc210, (q15_t)0x2fd5, (q15_t)0xc213, (q15_t)0x2fc9, (q15_t)0xc217, (q15_t)0x2fbc, (q15_t)0xc21a,
-    (q15_t)0x2fb0, (q15_t)0xc21d, (q15_t)0x2fa4, (q15_t)0xc220, (q15_t)0x2f98, (q15_t)0xc223, (q15_t)0x2f8c, (q15_t)0xc227,
-    (q15_t)0x2f80, (q15_t)0xc22a, (q15_t)0x2f74, (q15_t)0xc22d, (q15_t)0x2f67, (q15_t)0xc230, (q15_t)0x2f5b, (q15_t)0xc234,
-    (q15_t)0x2f4f, (q15_t)0xc237, (q15_t)0x2f43, (q15_t)0xc23a, (q15_t)0x2f37, (q15_t)0xc23e, (q15_t)0x2f2b, (q15_t)0xc241,
-    (q15_t)0x2f1f, (q15_t)0xc244, (q15_t)0x2f13, (q15_t)0xc247, (q15_t)0x2f06, (q15_t)0xc24b, (q15_t)0x2efa, (q15_t)0xc24e,
-    (q15_t)0x2eee, (q15_t)0xc251, (q15_t)0x2ee2, (q15_t)0xc255, (q15_t)0x2ed6, (q15_t)0xc258, (q15_t)0x2eca, (q15_t)0xc25c,
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-    (q15_t)0x2dfc, (q15_t)0xc296, (q15_t)0x2df0, (q15_t)0xc29a, (q15_t)0x2de4, (q15_t)0xc29d, (q15_t)0x2dd8, (q15_t)0xc2a1,
-    (q15_t)0x2dcc, (q15_t)0xc2a5, (q15_t)0x2dc0, (q15_t)0xc2a8, (q15_t)0x2db4, (q15_t)0xc2ac, (q15_t)0x2da8, (q15_t)0xc2af,
-    (q15_t)0x2d9c, (q15_t)0xc2b3, (q15_t)0x2d90, (q15_t)0xc2b7, (q15_t)0x2d84, (q15_t)0xc2ba, (q15_t)0x2d78, (q15_t)0xc2be,
-    (q15_t)0x2d6c, (q15_t)0xc2c1, (q15_t)0x2d60, (q15_t)0xc2c5, (q15_t)0x2d54, (q15_t)0xc2c9, (q15_t)0x2d48, (q15_t)0xc2cc,
-    (q15_t)0x2d3c, (q15_t)0xc2d0, (q15_t)0x2d30, (q15_t)0xc2d4, (q15_t)0x2d24, (q15_t)0xc2d8, (q15_t)0x2d18, (q15_t)0xc2db,
-    (q15_t)0x2d0c, (q15_t)0xc2df, (q15_t)0x2d00, (q15_t)0xc2e3, (q15_t)0x2cf4, (q15_t)0xc2e6, (q15_t)0x2ce8, (q15_t)0xc2ea,
-    (q15_t)0x2cdc, (q15_t)0xc2ee, (q15_t)0x2cd0, (q15_t)0xc2f2, (q15_t)0x2cc4, (q15_t)0xc2f5, (q15_t)0x2cb8, (q15_t)0xc2f9,
-    (q15_t)0x2cac, (q15_t)0xc2fd, (q15_t)0x2ca0, (q15_t)0xc301, (q15_t)0x2c94, (q15_t)0xc305, (q15_t)0x2c88, (q15_t)0xc308,
-    (q15_t)0x2c7c, (q15_t)0xc30c, (q15_t)0x2c70, (q15_t)0xc310, (q15_t)0x2c64, (q15_t)0xc314, (q15_t)0x2c58, (q15_t)0xc318,
-    (q15_t)0x2c4c, (q15_t)0xc31c, (q15_t)0x2c40, (q15_t)0xc320, (q15_t)0x2c34, (q15_t)0xc323, (q15_t)0x2c28, (q15_t)0xc327,
-    (q15_t)0x2c1c, (q15_t)0xc32b, (q15_t)0x2c10, (q15_t)0xc32f, (q15_t)0x2c05, (q15_t)0xc333, (q15_t)0x2bf9, (q15_t)0xc337,
-    (q15_t)0x2bed, (q15_t)0xc33b, (q15_t)0x2be1, (q15_t)0xc33f, (q15_t)0x2bd5, (q15_t)0xc343, (q15_t)0x2bc9, (q15_t)0xc347,
-    (q15_t)0x2bbd, (q15_t)0xc34b, (q15_t)0x2bb1, (q15_t)0xc34f, (q15_t)0x2ba5, (q15_t)0xc353, (q15_t)0x2b99, (q15_t)0xc357,
-    (q15_t)0x2b8d, (q15_t)0xc35b, (q15_t)0x2b81, (q15_t)0xc35f, (q15_t)0x2b75, (q15_t)0xc363, (q15_t)0x2b6a, (q15_t)0xc367,
-    (q15_t)0x2b5e, (q15_t)0xc36b, (q15_t)0x2b52, (q15_t)0xc36f, (q15_t)0x2b46, (q15_t)0xc373, (q15_t)0x2b3a, (q15_t)0xc377,
-    (q15_t)0x2b2e, (q15_t)0xc37b, (q15_t)0x2b22, (q15_t)0xc37f, (q15_t)0x2b16, (q15_t)0xc383, (q15_t)0x2b0a, (q15_t)0xc387,
-    (q15_t)0x2aff, (q15_t)0xc38c, (q15_t)0x2af3, (q15_t)0xc390, (q15_t)0x2ae7, (q15_t)0xc394, (q15_t)0x2adb, (q15_t)0xc398,
-    (q15_t)0x2acf, (q15_t)0xc39c, (q15_t)0x2ac3, (q15_t)0xc3a0, (q15_t)0x2ab7, (q15_t)0xc3a5, (q15_t)0x2aac, (q15_t)0xc3a9,
-    (q15_t)0x2aa0, (q15_t)0xc3ad, (q15_t)0x2a94, (q15_t)0xc3b1, (q15_t)0x2a88, (q15_t)0xc3b5, (q15_t)0x2a7c, (q15_t)0xc3ba,
-    (q15_t)0x2a70, (q15_t)0xc3be, (q15_t)0x2a65, (q15_t)0xc3c2, (q15_t)0x2a59, (q15_t)0xc3c6, (q15_t)0x2a4d, (q15_t)0xc3ca,
-    (q15_t)0x2a41, (q15_t)0xc3cf, (q15_t)0x2a35, (q15_t)0xc3d3, (q15_t)0x2a29, (q15_t)0xc3d7, (q15_t)0x2a1e, (q15_t)0xc3dc,
-    (q15_t)0x2a12, (q15_t)0xc3e0, (q15_t)0x2a06, (q15_t)0xc3e4, (q15_t)0x29fa, (q15_t)0xc3e9, (q15_t)0x29ee, (q15_t)0xc3ed,
-    (q15_t)0x29e3, (q15_t)0xc3f1, (q15_t)0x29d7, (q15_t)0xc3f6, (q15_t)0x29cb, (q15_t)0xc3fa, (q15_t)0x29bf, (q15_t)0xc3fe,
-    (q15_t)0x29b4, (q15_t)0xc403, (q15_t)0x29a8, (q15_t)0xc407, (q15_t)0x299c, (q15_t)0xc40b, (q15_t)0x2990, (q15_t)0xc410,
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-    (q15_t)0x2955, (q15_t)0xc426, (q15_t)0x294a, (q15_t)0xc42a, (q15_t)0x293e, (q15_t)0xc42f, (q15_t)0x2932, (q15_t)0xc433,
-    (q15_t)0x2926, (q15_t)0xc438, (q15_t)0x291b, (q15_t)0xc43c, (q15_t)0x290f, (q15_t)0xc441, (q15_t)0x2903, (q15_t)0xc445,
-    (q15_t)0x28f7, (q15_t)0xc44a, (q15_t)0x28ec, (q15_t)0xc44e, (q15_t)0x28e0, (q15_t)0xc453, (q15_t)0x28d4, (q15_t)0xc457,
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-    (q15_t)0x280e, (q15_t)0xc4a6, (q15_t)0x2802, (q15_t)0xc4ab, (q15_t)0x27f6, (q15_t)0xc4b0, (q15_t)0x27eb, (q15_t)0xc4b4,
-    (q15_t)0x27df, (q15_t)0xc4b9, (q15_t)0x27d3, (q15_t)0xc4be, (q15_t)0x27c8, (q15_t)0xc4c2, (q15_t)0x27bc, (q15_t)0xc4c7,
-    (q15_t)0x27b1, (q15_t)0xc4cc, (q15_t)0x27a5, (q15_t)0xc4d1, (q15_t)0x2799, (q15_t)0xc4d6, (q15_t)0x278e, (q15_t)0xc4da,
-    (q15_t)0x2782, (q15_t)0xc4df, (q15_t)0x2777, (q15_t)0xc4e4, (q15_t)0x276b, (q15_t)0xc4e9, (q15_t)0x275f, (q15_t)0xc4ee,
-    (q15_t)0x2754, (q15_t)0xc4f2, (q15_t)0x2748, (q15_t)0xc4f7, (q15_t)0x273d, (q15_t)0xc4fc, (q15_t)0x2731, (q15_t)0xc501,
-    (q15_t)0x2725, (q15_t)0xc506, (q15_t)0x271a, (q15_t)0xc50b, (q15_t)0x270e, (q15_t)0xc510, (q15_t)0x2703, (q15_t)0xc515,
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-    (q15_t)0x26c9, (q15_t)0xc52d, (q15_t)0x26bd, (q15_t)0xc532, (q15_t)0x26b2, (q15_t)0xc537, (q15_t)0x26a6, (q15_t)0xc53c,
-    (q15_t)0x269b, (q15_t)0xc541, (q15_t)0x268f, (q15_t)0xc546, (q15_t)0x2684, (q15_t)0xc54b, (q15_t)0x2678, (q15_t)0xc550,
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-    (q15_t)0x263f, (q15_t)0xc569, (q15_t)0x2633, (q15_t)0xc56e, (q15_t)0x2628, (q15_t)0xc573, (q15_t)0x261c, (q15_t)0xc578,
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-    (q15_t)0x25e3, (q15_t)0xc592, (q15_t)0x25d7, (q15_t)0xc597, (q15_t)0x25cc, (q15_t)0xc59c, (q15_t)0x25c0, (q15_t)0xc5a1,
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-    (q15_t)0x2587, (q15_t)0xc5bb, (q15_t)0x257c, (q15_t)0xc5c1, (q15_t)0x2570, (q15_t)0xc5c6, (q15_t)0x2565, (q15_t)0xc5cb,
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-    (q15_t)0x24d0, (q15_t)0xc610, (q15_t)0x24c5, (q15_t)0xc615, (q15_t)0x24ba, (q15_t)0xc61a, (q15_t)0x24ae, (q15_t)0xc620,
-    (q15_t)0x24a3, (q15_t)0xc625, (q15_t)0x2498, (q15_t)0xc62a, (q15_t)0x248c, (q15_t)0xc630, (q15_t)0x2481, (q15_t)0xc635,
-    (q15_t)0x2476, (q15_t)0xc63b, (q15_t)0x246a, (q15_t)0xc640, (q15_t)0x245f, (q15_t)0xc645, (q15_t)0x2454, (q15_t)0xc64b,
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-    (q15_t)0x23c1, (q15_t)0xc692, (q15_t)0x23b5, (q15_t)0xc698, (q15_t)0x23aa, (q15_t)0xc69d, (q15_t)0x239f, (q15_t)0xc6a3,
-    (q15_t)0x2394, (q15_t)0xc6a8, (q15_t)0x2388, (q15_t)0xc6ae, (q15_t)0x237d, (q15_t)0xc6b4, (q15_t)0x2372, (q15_t)0xc6b9,
-    (q15_t)0x2367, (q15_t)0xc6bf, (q15_t)0x235b, (q15_t)0xc6c5, (q15_t)0x2350, (q15_t)0xc6ca, (q15_t)0x2345, (q15_t)0xc6d0,
-    (q15_t)0x233a, (q15_t)0xc6d5, (q15_t)0x232e, (q15_t)0xc6db, (q15_t)0x2323, (q15_t)0xc6e1, (q15_t)0x2318, (q15_t)0xc6e6,
-    (q15_t)0x230d, (q15_t)0xc6ec, (q15_t)0x2301, (q15_t)0xc6f2, (q15_t)0x22f6, (q15_t)0xc6f7, (q15_t)0x22eb, (q15_t)0xc6fd,
-    (q15_t)0x22e0, (q15_t)0xc703, (q15_t)0x22d5, (q15_t)0xc709, (q15_t)0x22ca, (q15_t)0xc70e, (q15_t)0x22be, (q15_t)0xc714,
-    (q15_t)0x22b3, (q15_t)0xc71a, (q15_t)0x22a8, (q15_t)0xc720, (q15_t)0x229d, (q15_t)0xc725, (q15_t)0x2292, (q15_t)0xc72b,
-    (q15_t)0x2287, (q15_t)0xc731, (q15_t)0x227b, (q15_t)0xc737, (q15_t)0x2270, (q15_t)0xc73d, (q15_t)0x2265, (q15_t)0xc742,
-    (q15_t)0x225a, (q15_t)0xc748, (q15_t)0x224f, (q15_t)0xc74e, (q15_t)0x2244, (q15_t)0xc754, (q15_t)0x2239, (q15_t)0xc75a,
-    (q15_t)0x222d, (q15_t)0xc75f, (q15_t)0x2222, (q15_t)0xc765, (q15_t)0x2217, (q15_t)0xc76b, (q15_t)0x220c, (q15_t)0xc771,
-    (q15_t)0x2201, (q15_t)0xc777, (q15_t)0x21f6, (q15_t)0xc77d, (q15_t)0x21eb, (q15_t)0xc783, (q15_t)0x21e0, (q15_t)0xc789,
-    (q15_t)0x21d5, (q15_t)0xc78f, (q15_t)0x21ca, (q15_t)0xc795, (q15_t)0x21be, (q15_t)0xc79a, (q15_t)0x21b3, (q15_t)0xc7a0,
-    (q15_t)0x21a8, (q15_t)0xc7a6, (q15_t)0x219d, (q15_t)0xc7ac, (q15_t)0x2192, (q15_t)0xc7b2, (q15_t)0x2187, (q15_t)0xc7b8,
-    (q15_t)0x217c, (q15_t)0xc7be, (q15_t)0x2171, (q15_t)0xc7c4, (q15_t)0x2166, (q15_t)0xc7ca, (q15_t)0x215b, (q15_t)0xc7d0,
-    (q15_t)0x2150, (q15_t)0xc7d6, (q15_t)0x2145, (q15_t)0xc7dc, (q15_t)0x213a, (q15_t)0xc7e2, (q15_t)0x212f, (q15_t)0xc7e8,
-    (q15_t)0x2124, (q15_t)0xc7ee, (q15_t)0x2119, (q15_t)0xc7f5, (q15_t)0x210e, (q15_t)0xc7fb, (q15_t)0x2103, (q15_t)0xc801,
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-    (q15_t)0x2074, (q15_t)0xc850, (q15_t)0x2069, (q15_t)0xc857, (q15_t)0x205e, (q15_t)0xc85d, (q15_t)0x2054, (q15_t)0xc863,
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-    (q15_t)0x1fc6, (q15_t)0xc8b5, (q15_t)0x1fbb, (q15_t)0xc8bb, (q15_t)0x1fb0, (q15_t)0xc8c1, (q15_t)0x1fa5, (q15_t)0xc8c8,
-    (q15_t)0x1f9b, (q15_t)0xc8ce, (q15_t)0x1f90, (q15_t)0xc8d4, (q15_t)0x1f85, (q15_t)0xc8db, (q15_t)0x1f7a, (q15_t)0xc8e1,
-    (q15_t)0x1f6f, (q15_t)0xc8e8, (q15_t)0x1f65, (q15_t)0xc8ee, (q15_t)0x1f5a, (q15_t)0xc8f4, (q15_t)0x1f4f, (q15_t)0xc8fb,
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-    (q15_t)0x1eee, (q15_t)0xc935, (q15_t)0x1ee3, (q15_t)0xc93b, (q15_t)0x1ed8, (q15_t)0xc942, (q15_t)0x1ece, (q15_t)0xc948,
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-    (q15_t)0x1e6d, (q15_t)0xc983, (q15_t)0x1e62, (q15_t)0xc98a, (q15_t)0x1e58, (q15_t)0xc991, (q15_t)0x1e4d, (q15_t)0xc997,
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-    (q15_t)0x1d98, (q15_t)0xca09, (q15_t)0x1d8e, (q15_t)0xca10, (q15_t)0x1d83, (q15_t)0xca16, (q15_t)0x1d78, (q15_t)0xca1d,
-    (q15_t)0x1d6e, (q15_t)0xca24, (q15_t)0x1d63, (q15_t)0xca2b, (q15_t)0x1d59, (q15_t)0xca32, (q15_t)0x1d4e, (q15_t)0xca38,
-    (q15_t)0x1d44, (q15_t)0xca3f, (q15_t)0x1d39, (q15_t)0xca46, (q15_t)0x1d2e, (q15_t)0xca4d, (q15_t)0x1d24, (q15_t)0xca54,
-    (q15_t)0x1d19, (q15_t)0xca5b, (q15_t)0x1d0f, (q15_t)0xca61, (q15_t)0x1d04, (q15_t)0xca68, (q15_t)0x1cfa, (q15_t)0xca6f,
-    (q15_t)0x1cef, (q15_t)0xca76, (q15_t)0x1ce5, (q15_t)0xca7d, (q15_t)0x1cda, (q15_t)0xca84, (q15_t)0x1cd0, (q15_t)0xca8b,
-    (q15_t)0x1cc5, (q15_t)0xca92, (q15_t)0x1cbb, (q15_t)0xca99, (q15_t)0x1cb0, (q15_t)0xca9f, (q15_t)0x1ca6, (q15_t)0xcaa6,
-    (q15_t)0x1c9b, (q15_t)0xcaad, (q15_t)0x1c91, (q15_t)0xcab4, (q15_t)0x1c86, (q15_t)0xcabb, (q15_t)0x1c7c, (q15_t)0xcac2,
-    (q15_t)0x1c72, (q15_t)0xcac9, (q15_t)0x1c67, (q15_t)0xcad0, (q15_t)0x1c5d, (q15_t)0xcad7, (q15_t)0x1c52, (q15_t)0xcade,
-    (q15_t)0x1c48, (q15_t)0xcae5, (q15_t)0x1c3d, (q15_t)0xcaec, (q15_t)0x1c33, (q15_t)0xcaf3, (q15_t)0x1c29, (q15_t)0xcafa,
-    (q15_t)0x1c1e, (q15_t)0xcb01, (q15_t)0x1c14, (q15_t)0xcb08, (q15_t)0x1c09, (q15_t)0xcb0f, (q15_t)0x1bff, (q15_t)0xcb16,
-    (q15_t)0x1bf5, (q15_t)0xcb1e, (q15_t)0x1bea, (q15_t)0xcb25, (q15_t)0x1be0, (q15_t)0xcb2c, (q15_t)0x1bd5, (q15_t)0xcb33,
-    (q15_t)0x1bcb, (q15_t)0xcb3a, (q15_t)0x1bc1, (q15_t)0xcb41, (q15_t)0x1bb6, (q15_t)0xcb48, (q15_t)0x1bac, (q15_t)0xcb4f,
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-    (q15_t)0x4a6, (q15_t)0x17f2, (q15_t)0x4ab, (q15_t)0x17fe, (q15_t)0x4b0, (q15_t)0x180a, (q15_t)0x4b4, (q15_t)0x1815,
-    (q15_t)0x4b9, (q15_t)0x1821, (q15_t)0x4be, (q15_t)0x182d, (q15_t)0x4c2, (q15_t)0x1838, (q15_t)0x4c7, (q15_t)0x1844,
-    (q15_t)0x4cc, (q15_t)0x184f, (q15_t)0x4d1, (q15_t)0x185b, (q15_t)0x4d6, (q15_t)0x1867, (q15_t)0x4da, (q15_t)0x1872,
-    (q15_t)0x4df, (q15_t)0x187e, (q15_t)0x4e4, (q15_t)0x1889, (q15_t)0x4e9, (q15_t)0x1895, (q15_t)0x4ee, (q15_t)0x18a1,
-    (q15_t)0x4f2, (q15_t)0x18ac, (q15_t)0x4f7, (q15_t)0x18b8, (q15_t)0x4fc, (q15_t)0x18c3, (q15_t)0x501, (q15_t)0x18cf,
-    (q15_t)0x506, (q15_t)0x18db, (q15_t)0x50b, (q15_t)0x18e6, (q15_t)0x510, (q15_t)0x18f2, (q15_t)0x515, (q15_t)0x18fd,
-    (q15_t)0x51a, (q15_t)0x1909, (q15_t)0x51e, (q15_t)0x1914, (q15_t)0x523, (q15_t)0x1920, (q15_t)0x528, (q15_t)0x192c,
-    (q15_t)0x52d, (q15_t)0x1937, (q15_t)0x532, (q15_t)0x1943, (q15_t)0x537, (q15_t)0x194e, (q15_t)0x53c, (q15_t)0x195a,
-    (q15_t)0x541, (q15_t)0x1965, (q15_t)0x546, (q15_t)0x1971, (q15_t)0x54b, (q15_t)0x197c, (q15_t)0x550, (q15_t)0x1988,
-    (q15_t)0x555, (q15_t)0x1993, (q15_t)0x55a, (q15_t)0x199f, (q15_t)0x55f, (q15_t)0x19aa, (q15_t)0x564, (q15_t)0x19b6,
-    (q15_t)0x569, (q15_t)0x19c1, (q15_t)0x56e, (q15_t)0x19cd, (q15_t)0x573, (q15_t)0x19d8, (q15_t)0x578, (q15_t)0x19e4,
-    (q15_t)0x57e, (q15_t)0x19ef, (q15_t)0x583, (q15_t)0x19fb, (q15_t)0x588, (q15_t)0x1a06, (q15_t)0x58d, (q15_t)0x1a12,
-    (q15_t)0x592, (q15_t)0x1a1d, (q15_t)0x597, (q15_t)0x1a29, (q15_t)0x59c, (q15_t)0x1a34, (q15_t)0x5a1, (q15_t)0x1a40,
-    (q15_t)0x5a7, (q15_t)0x1a4b, (q15_t)0x5ac, (q15_t)0x1a57, (q15_t)0x5b1, (q15_t)0x1a62, (q15_t)0x5b6, (q15_t)0x1a6e,
-    (q15_t)0x5bb, (q15_t)0x1a79, (q15_t)0x5c1, (q15_t)0x1a84, (q15_t)0x5c6, (q15_t)0x1a90, (q15_t)0x5cb, (q15_t)0x1a9b,
-    (q15_t)0x5d0, (q15_t)0x1aa7, (q15_t)0x5d5, (q15_t)0x1ab2, (q15_t)0x5db, (q15_t)0x1abe, (q15_t)0x5e0, (q15_t)0x1ac9,
-    (q15_t)0x5e5, (q15_t)0x1ad4, (q15_t)0x5ea, (q15_t)0x1ae0, (q15_t)0x5f0, (q15_t)0x1aeb, (q15_t)0x5f5, (q15_t)0x1af7,
-    (q15_t)0x5fa, (q15_t)0x1b02, (q15_t)0x600, (q15_t)0x1b0d, (q15_t)0x605, (q15_t)0x1b19, (q15_t)0x60a, (q15_t)0x1b24,
-    (q15_t)0x610, (q15_t)0x1b30, (q15_t)0x615, (q15_t)0x1b3b, (q15_t)0x61a, (q15_t)0x1b46, (q15_t)0x620, (q15_t)0x1b52,
-    (q15_t)0x625, (q15_t)0x1b5d, (q15_t)0x62a, (q15_t)0x1b68, (q15_t)0x630, (q15_t)0x1b74, (q15_t)0x635, (q15_t)0x1b7f,
-    (q15_t)0x63b, (q15_t)0x1b8a, (q15_t)0x640, (q15_t)0x1b96, (q15_t)0x645, (q15_t)0x1ba1, (q15_t)0x64b, (q15_t)0x1bac,
-    (q15_t)0x650, (q15_t)0x1bb8, (q15_t)0x656, (q15_t)0x1bc3, (q15_t)0x65b, (q15_t)0x1bce, (q15_t)0x661, (q15_t)0x1bda,
-    (q15_t)0x666, (q15_t)0x1be5, (q15_t)0x66c, (q15_t)0x1bf0, (q15_t)0x671, (q15_t)0x1bfc, (q15_t)0x677, (q15_t)0x1c07,
-    (q15_t)0x67c, (q15_t)0x1c12, (q15_t)0x682, (q15_t)0x1c1e, (q15_t)0x687, (q15_t)0x1c29, (q15_t)0x68d, (q15_t)0x1c34,
-    (q15_t)0x692, (q15_t)0x1c3f, (q15_t)0x698, (q15_t)0x1c4b, (q15_t)0x69d, (q15_t)0x1c56, (q15_t)0x6a3, (q15_t)0x1c61,
-    (q15_t)0x6a8, (q15_t)0x1c6c, (q15_t)0x6ae, (q15_t)0x1c78, (q15_t)0x6b4, (q15_t)0x1c83, (q15_t)0x6b9, (q15_t)0x1c8e,
-    (q15_t)0x6bf, (q15_t)0x1c99, (q15_t)0x6c5, (q15_t)0x1ca5, (q15_t)0x6ca, (q15_t)0x1cb0, (q15_t)0x6d0, (q15_t)0x1cbb,
-    (q15_t)0x6d5, (q15_t)0x1cc6, (q15_t)0x6db, (q15_t)0x1cd2, (q15_t)0x6e1, (q15_t)0x1cdd, (q15_t)0x6e6, (q15_t)0x1ce8,
-    (q15_t)0x6ec, (q15_t)0x1cf3, (q15_t)0x6f2, (q15_t)0x1cff, (q15_t)0x6f7, (q15_t)0x1d0a, (q15_t)0x6fd, (q15_t)0x1d15,
-    (q15_t)0x703, (q15_t)0x1d20, (q15_t)0x709, (q15_t)0x1d2b, (q15_t)0x70e, (q15_t)0x1d36, (q15_t)0x714, (q15_t)0x1d42,
-    (q15_t)0x71a, (q15_t)0x1d4d, (q15_t)0x720, (q15_t)0x1d58, (q15_t)0x725, (q15_t)0x1d63, (q15_t)0x72b, (q15_t)0x1d6e,
-    (q15_t)0x731, (q15_t)0x1d79, (q15_t)0x737, (q15_t)0x1d85, (q15_t)0x73d, (q15_t)0x1d90, (q15_t)0x742, (q15_t)0x1d9b,
-    (q15_t)0x748, (q15_t)0x1da6, (q15_t)0x74e, (q15_t)0x1db1, (q15_t)0x754, (q15_t)0x1dbc, (q15_t)0x75a, (q15_t)0x1dc7,
-    (q15_t)0x75f, (q15_t)0x1dd3, (q15_t)0x765, (q15_t)0x1dde, (q15_t)0x76b, (q15_t)0x1de9, (q15_t)0x771, (q15_t)0x1df4,
-    (q15_t)0x777, (q15_t)0x1dff, (q15_t)0x77d, (q15_t)0x1e0a, (q15_t)0x783, (q15_t)0x1e15, (q15_t)0x789, (q15_t)0x1e20,
-    (q15_t)0x78f, (q15_t)0x1e2b, (q15_t)0x795, (q15_t)0x1e36, (q15_t)0x79a, (q15_t)0x1e42, (q15_t)0x7a0, (q15_t)0x1e4d,
-    (q15_t)0x7a6, (q15_t)0x1e58, (q15_t)0x7ac, (q15_t)0x1e63, (q15_t)0x7b2, (q15_t)0x1e6e, (q15_t)0x7b8, (q15_t)0x1e79,
-    (q15_t)0x7be, (q15_t)0x1e84, (q15_t)0x7c4, (q15_t)0x1e8f, (q15_t)0x7ca, (q15_t)0x1e9a, (q15_t)0x7d0, (q15_t)0x1ea5,
-    (q15_t)0x7d6, (q15_t)0x1eb0, (q15_t)0x7dc, (q15_t)0x1ebb, (q15_t)0x7e2, (q15_t)0x1ec6, (q15_t)0x7e8, (q15_t)0x1ed1,
-    (q15_t)0x7ee, (q15_t)0x1edc, (q15_t)0x7f5, (q15_t)0x1ee7, (q15_t)0x7fb, (q15_t)0x1ef2, (q15_t)0x801, (q15_t)0x1efd,
-    (q15_t)0x807, (q15_t)0x1f08, (q15_t)0x80d, (q15_t)0x1f13, (q15_t)0x813, (q15_t)0x1f1e, (q15_t)0x819, (q15_t)0x1f29,
-    (q15_t)0x81f, (q15_t)0x1f34, (q15_t)0x825, (q15_t)0x1f3f, (q15_t)0x82b, (q15_t)0x1f4a, (q15_t)0x832, (q15_t)0x1f55,
-    (q15_t)0x838, (q15_t)0x1f60, (q15_t)0x83e, (q15_t)0x1f6b, (q15_t)0x844, (q15_t)0x1f76, (q15_t)0x84a, (q15_t)0x1f81,
-    (q15_t)0x850, (q15_t)0x1f8c, (q15_t)0x857, (q15_t)0x1f97, (q15_t)0x85d, (q15_t)0x1fa2, (q15_t)0x863, (q15_t)0x1fac,
-    (q15_t)0x869, (q15_t)0x1fb7, (q15_t)0x870, (q15_t)0x1fc2, (q15_t)0x876, (q15_t)0x1fcd, (q15_t)0x87c, (q15_t)0x1fd8,
-    (q15_t)0x882, (q15_t)0x1fe3, (q15_t)0x889, (q15_t)0x1fee, (q15_t)0x88f, (q15_t)0x1ff9, (q15_t)0x895, (q15_t)0x2004,
-    (q15_t)0x89b, (q15_t)0x200f, (q15_t)0x8a2, (q15_t)0x2019, (q15_t)0x8a8, (q15_t)0x2024, (q15_t)0x8ae, (q15_t)0x202f,
-    (q15_t)0x8b5, (q15_t)0x203a, (q15_t)0x8bb, (q15_t)0x2045, (q15_t)0x8c1, (q15_t)0x2050, (q15_t)0x8c8, (q15_t)0x205b,
-    (q15_t)0x8ce, (q15_t)0x2065, (q15_t)0x8d4, (q15_t)0x2070, (q15_t)0x8db, (q15_t)0x207b, (q15_t)0x8e1, (q15_t)0x2086,
-    (q15_t)0x8e8, (q15_t)0x2091, (q15_t)0x8ee, (q15_t)0x209b, (q15_t)0x8f4, (q15_t)0x20a6, (q15_t)0x8fb, (q15_t)0x20b1,
-    (q15_t)0x901, (q15_t)0x20bc, (q15_t)0x908, (q15_t)0x20c7, (q15_t)0x90e, (q15_t)0x20d1, (q15_t)0x915, (q15_t)0x20dc,
-    (q15_t)0x91b, (q15_t)0x20e7, (q15_t)0x921, (q15_t)0x20f2, (q15_t)0x928, (q15_t)0x20fd, (q15_t)0x92e, (q15_t)0x2107,
-    (q15_t)0x935, (q15_t)0x2112, (q15_t)0x93b, (q15_t)0x211d, (q15_t)0x942, (q15_t)0x2128, (q15_t)0x948, (q15_t)0x2132,
-    (q15_t)0x94f, (q15_t)0x213d, (q15_t)0x955, (q15_t)0x2148, (q15_t)0x95c, (q15_t)0x2153, (q15_t)0x963, (q15_t)0x215d,
-    (q15_t)0x969, (q15_t)0x2168, (q15_t)0x970, (q15_t)0x2173, (q15_t)0x976, (q15_t)0x217d, (q15_t)0x97d, (q15_t)0x2188,
-    (q15_t)0x983, (q15_t)0x2193, (q15_t)0x98a, (q15_t)0x219e, (q15_t)0x991, (q15_t)0x21a8, (q15_t)0x997, (q15_t)0x21b3,
-    (q15_t)0x99e, (q15_t)0x21be, (q15_t)0x9a4, (q15_t)0x21c8, (q15_t)0x9ab, (q15_t)0x21d3, (q15_t)0x9b2, (q15_t)0x21de,
-    (q15_t)0x9b8, (q15_t)0x21e8, (q15_t)0x9bf, (q15_t)0x21f3, (q15_t)0x9c6, (q15_t)0x21fe, (q15_t)0x9cc, (q15_t)0x2208,
-    (q15_t)0x9d3, (q15_t)0x2213, (q15_t)0x9da, (q15_t)0x221e, (q15_t)0x9e0, (q15_t)0x2228, (q15_t)0x9e7, (q15_t)0x2233,
-    (q15_t)0x9ee, (q15_t)0x223d, (q15_t)0x9f5, (q15_t)0x2248, (q15_t)0x9fb, (q15_t)0x2253, (q15_t)0xa02, (q15_t)0x225d,
-    (q15_t)0xa09, (q15_t)0x2268, (q15_t)0xa10, (q15_t)0x2272, (q15_t)0xa16, (q15_t)0x227d, (q15_t)0xa1d, (q15_t)0x2288,
-    (q15_t)0xa24, (q15_t)0x2292, (q15_t)0xa2b, (q15_t)0x229d, (q15_t)0xa32, (q15_t)0x22a7, (q15_t)0xa38, (q15_t)0x22b2,
-    (q15_t)0xa3f, (q15_t)0x22bc, (q15_t)0xa46, (q15_t)0x22c7, (q15_t)0xa4d, (q15_t)0x22d2, (q15_t)0xa54, (q15_t)0x22dc,
-    (q15_t)0xa5b, (q15_t)0x22e7, (q15_t)0xa61, (q15_t)0x22f1, (q15_t)0xa68, (q15_t)0x22fc, (q15_t)0xa6f, (q15_t)0x2306,
-    (q15_t)0xa76, (q15_t)0x2311, (q15_t)0xa7d, (q15_t)0x231b, (q15_t)0xa84, (q15_t)0x2326, (q15_t)0xa8b, (q15_t)0x2330,
-    (q15_t)0xa92, (q15_t)0x233b, (q15_t)0xa99, (q15_t)0x2345, (q15_t)0xa9f, (q15_t)0x2350, (q15_t)0xaa6, (q15_t)0x235a,
-    (q15_t)0xaad, (q15_t)0x2365, (q15_t)0xab4, (q15_t)0x236f, (q15_t)0xabb, (q15_t)0x237a, (q15_t)0xac2, (q15_t)0x2384,
-    (q15_t)0xac9, (q15_t)0x238e, (q15_t)0xad0, (q15_t)0x2399, (q15_t)0xad7, (q15_t)0x23a3, (q15_t)0xade, (q15_t)0x23ae,
-    (q15_t)0xae5, (q15_t)0x23b8, (q15_t)0xaec, (q15_t)0x23c3, (q15_t)0xaf3, (q15_t)0x23cd, (q15_t)0xafa, (q15_t)0x23d7,
-    (q15_t)0xb01, (q15_t)0x23e2, (q15_t)0xb08, (q15_t)0x23ec, (q15_t)0xb0f, (q15_t)0x23f7, (q15_t)0xb16, (q15_t)0x2401,
-    (q15_t)0xb1e, (q15_t)0x240b, (q15_t)0xb25, (q15_t)0x2416, (q15_t)0xb2c, (q15_t)0x2420, (q15_t)0xb33, (q15_t)0x242b,
-    (q15_t)0xb3a, (q15_t)0x2435, (q15_t)0xb41, (q15_t)0x243f, (q15_t)0xb48, (q15_t)0x244a, (q15_t)0xb4f, (q15_t)0x2454,
-    (q15_t)0xb56, (q15_t)0x245e, (q15_t)0xb5e, (q15_t)0x2469, (q15_t)0xb65, (q15_t)0x2473, (q15_t)0xb6c, (q15_t)0x247d,
-    (q15_t)0xb73, (q15_t)0x2488, (q15_t)0xb7a, (q15_t)0x2492, (q15_t)0xb81, (q15_t)0x249c, (q15_t)0xb89, (q15_t)0x24a7,
-    (q15_t)0xb90, (q15_t)0x24b1, (q15_t)0xb97, (q15_t)0x24bb, (q15_t)0xb9e, (q15_t)0x24c5, (q15_t)0xba5, (q15_t)0x24d0,
-    (q15_t)0xbad, (q15_t)0x24da, (q15_t)0xbb4, (q15_t)0x24e4, (q15_t)0xbbb, (q15_t)0x24ef, (q15_t)0xbc2, (q15_t)0x24f9,
-    (q15_t)0xbca, (q15_t)0x2503, (q15_t)0xbd1, (q15_t)0x250d, (q15_t)0xbd8, (q15_t)0x2518, (q15_t)0xbe0, (q15_t)0x2522,
-    (q15_t)0xbe7, (q15_t)0x252c, (q15_t)0xbee, (q15_t)0x2536, (q15_t)0xbf5, (q15_t)0x2541, (q15_t)0xbfd, (q15_t)0x254b,
-    (q15_t)0xc04, (q15_t)0x2555, (q15_t)0xc0b, (q15_t)0x255f, (q15_t)0xc13, (q15_t)0x2569, (q15_t)0xc1a, (q15_t)0x2574,
-    (q15_t)0xc21, (q15_t)0x257e, (q15_t)0xc29, (q15_t)0x2588, (q15_t)0xc30, (q15_t)0x2592, (q15_t)0xc38, (q15_t)0x259c,
-    (q15_t)0xc3f, (q15_t)0x25a6, (q15_t)0xc46, (q15_t)0x25b1, (q15_t)0xc4e, (q15_t)0x25bb, (q15_t)0xc55, (q15_t)0x25c5,
-    (q15_t)0xc5d, (q15_t)0x25cf, (q15_t)0xc64, (q15_t)0x25d9, (q15_t)0xc6b, (q15_t)0x25e3, (q15_t)0xc73, (q15_t)0x25ed,
-    (q15_t)0xc7a, (q15_t)0x25f8, (q15_t)0xc82, (q15_t)0x2602, (q15_t)0xc89, (q15_t)0x260c, (q15_t)0xc91, (q15_t)0x2616,
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-    (q15_t)0x34dd, (q15_t)0x3f06, (q15_t)0x34ea, (q15_t)0x3f08, (q15_t)0x34f6, (q15_t)0x3f0a, (q15_t)0x3503, (q15_t)0x3f0d,
-    (q15_t)0x350f, (q15_t)0x3f0f, (q15_t)0x351b, (q15_t)0x3f11, (q15_t)0x3528, (q15_t)0x3f13, (q15_t)0x3534, (q15_t)0x3f15,
-    (q15_t)0x3540, (q15_t)0x3f17, (q15_t)0x354d, (q15_t)0x3f19, (q15_t)0x3559, (q15_t)0x3f1c, (q15_t)0x3566, (q15_t)0x3f1e,
-    (q15_t)0x3572, (q15_t)0x3f20, (q15_t)0x357e, (q15_t)0x3f22, (q15_t)0x358b, (q15_t)0x3f24, (q15_t)0x3597, (q15_t)0x3f26,
-    (q15_t)0x35a4, (q15_t)0x3f28, (q15_t)0x35b0, (q15_t)0x3f2a, (q15_t)0x35bc, (q15_t)0x3f2c, (q15_t)0x35c9, (q15_t)0x3f2e,
-    (q15_t)0x35d5, (q15_t)0x3f30, (q15_t)0x35e2, (q15_t)0x3f32, (q15_t)0x35ee, (q15_t)0x3f34, (q15_t)0x35fa, (q15_t)0x3f36,
-    (q15_t)0x3607, (q15_t)0x3f38, (q15_t)0x3613, (q15_t)0x3f3a, (q15_t)0x3620, (q15_t)0x3f3c, (q15_t)0x362c, (q15_t)0x3f3e,
-    (q15_t)0x3639, (q15_t)0x3f40, (q15_t)0x3645, (q15_t)0x3f42, (q15_t)0x3651, (q15_t)0x3f43, (q15_t)0x365e, (q15_t)0x3f45,
-    (q15_t)0x366a, (q15_t)0x3f47, (q15_t)0x3677, (q15_t)0x3f49, (q15_t)0x3683, (q15_t)0x3f4b, (q15_t)0x3690, (q15_t)0x3f4d,
-    (q15_t)0x369c, (q15_t)0x3f4f, (q15_t)0x36a8, (q15_t)0x3f51, (q15_t)0x36b5, (q15_t)0x3f52, (q15_t)0x36c1, (q15_t)0x3f54,
-    (q15_t)0x36ce, (q15_t)0x3f56, (q15_t)0x36da, (q15_t)0x3f58, (q15_t)0x36e7, (q15_t)0x3f5a, (q15_t)0x36f3, (q15_t)0x3f5b,
-    (q15_t)0x36ff, (q15_t)0x3f5d, (q15_t)0x370c, (q15_t)0x3f5f, (q15_t)0x3718, (q15_t)0x3f61, (q15_t)0x3725, (q15_t)0x3f62,
-    (q15_t)0x3731, (q15_t)0x3f64, (q15_t)0x373e, (q15_t)0x3f66, (q15_t)0x374a, (q15_t)0x3f68, (q15_t)0x3757, (q15_t)0x3f69,
-    (q15_t)0x3763, (q15_t)0x3f6b, (q15_t)0x376f, (q15_t)0x3f6d, (q15_t)0x377c, (q15_t)0x3f6e, (q15_t)0x3788, (q15_t)0x3f70,
-    (q15_t)0x3795, (q15_t)0x3f72, (q15_t)0x37a1, (q15_t)0x3f73, (q15_t)0x37ae, (q15_t)0x3f75, (q15_t)0x37ba, (q15_t)0x3f77,
-    (q15_t)0x37c7, (q15_t)0x3f78, (q15_t)0x37d3, (q15_t)0x3f7a, (q15_t)0x37e0, (q15_t)0x3f7b, (q15_t)0x37ec, (q15_t)0x3f7d,
-    (q15_t)0x37f9, (q15_t)0x3f7f, (q15_t)0x3805, (q15_t)0x3f80, (q15_t)0x3811, (q15_t)0x3f82, (q15_t)0x381e, (q15_t)0x3f83,
-    (q15_t)0x382a, (q15_t)0x3f85, (q15_t)0x3837, (q15_t)0x3f86, (q15_t)0x3843, (q15_t)0x3f88, (q15_t)0x3850, (q15_t)0x3f89,
-    (q15_t)0x385c, (q15_t)0x3f8b, (q15_t)0x3869, (q15_t)0x3f8c, (q15_t)0x3875, (q15_t)0x3f8e, (q15_t)0x3882, (q15_t)0x3f8f,
-    (q15_t)0x388e, (q15_t)0x3f91, (q15_t)0x389b, (q15_t)0x3f92, (q15_t)0x38a7, (q15_t)0x3f94, (q15_t)0x38b4, (q15_t)0x3f95,
-    (q15_t)0x38c0, (q15_t)0x3f97, (q15_t)0x38cd, (q15_t)0x3f98, (q15_t)0x38d9, (q15_t)0x3f99, (q15_t)0x38e6, (q15_t)0x3f9b,
-    (q15_t)0x38f2, (q15_t)0x3f9c, (q15_t)0x38ff, (q15_t)0x3f9e, (q15_t)0x390b, (q15_t)0x3f9f, (q15_t)0x3918, (q15_t)0x3fa0,
-    (q15_t)0x3924, (q15_t)0x3fa2, (q15_t)0x3931, (q15_t)0x3fa3, (q15_t)0x393d, (q15_t)0x3fa4, (q15_t)0x394a, (q15_t)0x3fa6,
-    (q15_t)0x3956, (q15_t)0x3fa7, (q15_t)0x3963, (q15_t)0x3fa8, (q15_t)0x396f, (q15_t)0x3faa, (q15_t)0x397c, (q15_t)0x3fab,
-    (q15_t)0x3988, (q15_t)0x3fac, (q15_t)0x3995, (q15_t)0x3fad, (q15_t)0x39a1, (q15_t)0x3faf, (q15_t)0x39ae, (q15_t)0x3fb0,
-    (q15_t)0x39ba, (q15_t)0x3fb1, (q15_t)0x39c7, (q15_t)0x3fb2, (q15_t)0x39d3, (q15_t)0x3fb4, (q15_t)0x39e0, (q15_t)0x3fb5,
-    (q15_t)0x39ec, (q15_t)0x3fb6, (q15_t)0x39f9, (q15_t)0x3fb7, (q15_t)0x3a05, (q15_t)0x3fb8, (q15_t)0x3a12, (q15_t)0x3fb9,
-    (q15_t)0x3a1e, (q15_t)0x3fbb, (q15_t)0x3a2b, (q15_t)0x3fbc, (q15_t)0x3a37, (q15_t)0x3fbd, (q15_t)0x3a44, (q15_t)0x3fbe,
-    (q15_t)0x3a50, (q15_t)0x3fbf, (q15_t)0x3a5d, (q15_t)0x3fc0, (q15_t)0x3a69, (q15_t)0x3fc1, (q15_t)0x3a76, (q15_t)0x3fc3,
-    (q15_t)0x3a82, (q15_t)0x3fc4, (q15_t)0x3a8f, (q15_t)0x3fc5, (q15_t)0x3a9b, (q15_t)0x3fc6, (q15_t)0x3aa8, (q15_t)0x3fc7,
-    (q15_t)0x3ab4, (q15_t)0x3fc8, (q15_t)0x3ac1, (q15_t)0x3fc9, (q15_t)0x3acd, (q15_t)0x3fca, (q15_t)0x3ada, (q15_t)0x3fcb,
-    (q15_t)0x3ae6, (q15_t)0x3fcc, (q15_t)0x3af3, (q15_t)0x3fcd, (q15_t)0x3b00, (q15_t)0x3fce, (q15_t)0x3b0c, (q15_t)0x3fcf,
-    (q15_t)0x3b19, (q15_t)0x3fd0, (q15_t)0x3b25, (q15_t)0x3fd1, (q15_t)0x3b32, (q15_t)0x3fd2, (q15_t)0x3b3e, (q15_t)0x3fd3,
-    (q15_t)0x3b4b, (q15_t)0x3fd4, (q15_t)0x3b57, (q15_t)0x3fd5, (q15_t)0x3b64, (q15_t)0x3fd5, (q15_t)0x3b70, (q15_t)0x3fd6,
-    (q15_t)0x3b7d, (q15_t)0x3fd7, (q15_t)0x3b89, (q15_t)0x3fd8, (q15_t)0x3b96, (q15_t)0x3fd9, (q15_t)0x3ba2, (q15_t)0x3fda,
-    (q15_t)0x3baf, (q15_t)0x3fdb, (q15_t)0x3bbc, (q15_t)0x3fdc, (q15_t)0x3bc8, (q15_t)0x3fdc, (q15_t)0x3bd5, (q15_t)0x3fdd,
-    (q15_t)0x3be1, (q15_t)0x3fde, (q15_t)0x3bee, (q15_t)0x3fdf, (q15_t)0x3bfa, (q15_t)0x3fe0, (q15_t)0x3c07, (q15_t)0x3fe0,
-    (q15_t)0x3c13, (q15_t)0x3fe1, (q15_t)0x3c20, (q15_t)0x3fe2, (q15_t)0x3c2c, (q15_t)0x3fe3, (q15_t)0x3c39, (q15_t)0x3fe3,
-    (q15_t)0x3c45, (q15_t)0x3fe4, (q15_t)0x3c52, (q15_t)0x3fe5, (q15_t)0x3c5f, (q15_t)0x3fe6, (q15_t)0x3c6b, (q15_t)0x3fe6,
-    (q15_t)0x3c78, (q15_t)0x3fe7, (q15_t)0x3c84, (q15_t)0x3fe8, (q15_t)0x3c91, (q15_t)0x3fe8, (q15_t)0x3c9d, (q15_t)0x3fe9,
-    (q15_t)0x3caa, (q15_t)0x3fea, (q15_t)0x3cb6, (q15_t)0x3fea, (q15_t)0x3cc3, (q15_t)0x3feb, (q15_t)0x3cd0, (q15_t)0x3fec,
-    (q15_t)0x3cdc, (q15_t)0x3fec, (q15_t)0x3ce9, (q15_t)0x3fed, (q15_t)0x3cf5, (q15_t)0x3fed, (q15_t)0x3d02, (q15_t)0x3fee,
-    (q15_t)0x3d0e, (q15_t)0x3fef, (q15_t)0x3d1b, (q15_t)0x3fef, (q15_t)0x3d27, (q15_t)0x3ff0, (q15_t)0x3d34, (q15_t)0x3ff0,
-    (q15_t)0x3d40, (q15_t)0x3ff1, (q15_t)0x3d4d, (q15_t)0x3ff1, (q15_t)0x3d5a, (q15_t)0x3ff2, (q15_t)0x3d66, (q15_t)0x3ff2,
-    (q15_t)0x3d73, (q15_t)0x3ff3, (q15_t)0x3d7f, (q15_t)0x3ff3, (q15_t)0x3d8c, (q15_t)0x3ff4, (q15_t)0x3d98, (q15_t)0x3ff4,
-    (q15_t)0x3da5, (q15_t)0x3ff5, (q15_t)0x3db2, (q15_t)0x3ff5, (q15_t)0x3dbe, (q15_t)0x3ff6, (q15_t)0x3dcb, (q15_t)0x3ff6,
-    (q15_t)0x3dd7, (q15_t)0x3ff7, (q15_t)0x3de4, (q15_t)0x3ff7, (q15_t)0x3df0, (q15_t)0x3ff7, (q15_t)0x3dfd, (q15_t)0x3ff8,
-    (q15_t)0x3e09, (q15_t)0x3ff8, (q15_t)0x3e16, (q15_t)0x3ff9, (q15_t)0x3e23, (q15_t)0x3ff9, (q15_t)0x3e2f, (q15_t)0x3ff9,
-    (q15_t)0x3e3c, (q15_t)0x3ffa, (q15_t)0x3e48, (q15_t)0x3ffa, (q15_t)0x3e55, (q15_t)0x3ffa, (q15_t)0x3e61, (q15_t)0x3ffb,
-    (q15_t)0x3e6e, (q15_t)0x3ffb, (q15_t)0x3e7a, (q15_t)0x3ffb, (q15_t)0x3e87, (q15_t)0x3ffc, (q15_t)0x3e94, (q15_t)0x3ffc,
-    (q15_t)0x3ea0, (q15_t)0x3ffc, (q15_t)0x3ead, (q15_t)0x3ffc, (q15_t)0x3eb9, (q15_t)0x3ffd, (q15_t)0x3ec6, (q15_t)0x3ffd,
-    (q15_t)0x3ed2, (q15_t)0x3ffd, (q15_t)0x3edf, (q15_t)0x3ffd, (q15_t)0x3eec, (q15_t)0x3ffe, (q15_t)0x3ef8, (q15_t)0x3ffe,
-    (q15_t)0x3f05, (q15_t)0x3ffe, (q15_t)0x3f11, (q15_t)0x3ffe, (q15_t)0x3f1e, (q15_t)0x3ffe, (q15_t)0x3f2a, (q15_t)0x3fff,
-    (q15_t)0x3f37, (q15_t)0x3fff, (q15_t)0x3f44, (q15_t)0x3fff, (q15_t)0x3f50, (q15_t)0x3fff, (q15_t)0x3f5d, (q15_t)0x3fff,
-    (q15_t)0x3f69, (q15_t)0x3fff, (q15_t)0x3f76, (q15_t)0x3fff, (q15_t)0x3f82, (q15_t)0x4000, (q15_t)0x3f8f, (q15_t)0x4000,
-    (q15_t)0x3f9b, (q15_t)0x4000, (q15_t)0x3fa8, (q15_t)0x4000, (q15_t)0x3fb5, (q15_t)0x4000, (q15_t)0x3fc1, (q15_t)0x4000,
-    (q15_t)0x3fce, (q15_t)0x4000, (q15_t)0x3fda, (q15_t)0x4000, (q15_t)0x3fe7, (q15_t)0x4000, (q15_t)0x3ff3, (q15_t)0x4000,
-};
+  @par           Details
+                   The parameter <code>fftLenReal</code> specifies length of RFFT/RIFFT Process.
+                   Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192.
+  @par
+                   The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
+  @par
+                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   This function also initializes Twiddle factor table.
+ */
 
-/**
-* \par
-* Generation of real_CoefB array:
-* \par
-* n = 4096
-* <pre>for (i = 0; i < n; i++)
-*  {
-*    pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
-*    pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-*  } </pre>
-* \par
-* Convert to fixed point Q15 format
-*       round(pBTable[i] * pow(2, 15))
-*
-*/
-const q15_t ALIGN4 realCoefBQ15[8192] = {
-    (q15_t)0x4000, (q15_t)0x4000, (q15_t)0x400d, (q15_t)0x4000, (q15_t)0x4019, (q15_t)0x4000, (q15_t)0x4026, (q15_t)0x4000,
-    (q15_t)0x4032, (q15_t)0x4000, (q15_t)0x403f, (q15_t)0x4000, (q15_t)0x404b, (q15_t)0x4000, (q15_t)0x4058, (q15_t)0x4000,
-    (q15_t)0x4065, (q15_t)0x4000, (q15_t)0x4071, (q15_t)0x4000, (q15_t)0x407e, (q15_t)0x4000, (q15_t)0x408a, (q15_t)0x3fff,
-    (q15_t)0x4097, (q15_t)0x3fff, (q15_t)0x40a3, (q15_t)0x3fff, (q15_t)0x40b0, (q15_t)0x3fff, (q15_t)0x40bc, (q15_t)0x3fff,
-    (q15_t)0x40c9, (q15_t)0x3fff, (q15_t)0x40d6, (q15_t)0x3fff, (q15_t)0x40e2, (q15_t)0x3ffe, (q15_t)0x40ef, (q15_t)0x3ffe,
-    (q15_t)0x40fb, (q15_t)0x3ffe, (q15_t)0x4108, (q15_t)0x3ffe, (q15_t)0x4114, (q15_t)0x3ffe, (q15_t)0x4121, (q15_t)0x3ffd,
-    (q15_t)0x412e, (q15_t)0x3ffd, (q15_t)0x413a, (q15_t)0x3ffd, (q15_t)0x4147, (q15_t)0x3ffd, (q15_t)0x4153, (q15_t)0x3ffc,
-    (q15_t)0x4160, (q15_t)0x3ffc, (q15_t)0x416c, (q15_t)0x3ffc, (q15_t)0x4179, (q15_t)0x3ffc, (q15_t)0x4186, (q15_t)0x3ffb,
-    (q15_t)0x4192, (q15_t)0x3ffb, (q15_t)0x419f, (q15_t)0x3ffb, (q15_t)0x41ab, (q15_t)0x3ffa, (q15_t)0x41b8, (q15_t)0x3ffa,
-    (q15_t)0x41c4, (q15_t)0x3ffa, (q15_t)0x41d1, (q15_t)0x3ff9, (q15_t)0x41dd, (q15_t)0x3ff9, (q15_t)0x41ea, (q15_t)0x3ff9,
-    (q15_t)0x41f7, (q15_t)0x3ff8, (q15_t)0x4203, (q15_t)0x3ff8, (q15_t)0x4210, (q15_t)0x3ff7, (q15_t)0x421c, (q15_t)0x3ff7,
-    (q15_t)0x4229, (q15_t)0x3ff7, (q15_t)0x4235, (q15_t)0x3ff6, (q15_t)0x4242, (q15_t)0x3ff6, (q15_t)0x424e, (q15_t)0x3ff5,
-    (q15_t)0x425b, (q15_t)0x3ff5, (q15_t)0x4268, (q15_t)0x3ff4, (q15_t)0x4274, (q15_t)0x3ff4, (q15_t)0x4281, (q15_t)0x3ff3,
-    (q15_t)0x428d, (q15_t)0x3ff3, (q15_t)0x429a, (q15_t)0x3ff2, (q15_t)0x42a6, (q15_t)0x3ff2, (q15_t)0x42b3, (q15_t)0x3ff1,
-    (q15_t)0x42c0, (q15_t)0x3ff1, (q15_t)0x42cc, (q15_t)0x3ff0, (q15_t)0x42d9, (q15_t)0x3ff0, (q15_t)0x42e5, (q15_t)0x3fef,
-    (q15_t)0x42f2, (q15_t)0x3fef, (q15_t)0x42fe, (q15_t)0x3fee, (q15_t)0x430b, (q15_t)0x3fed, (q15_t)0x4317, (q15_t)0x3fed,
-    (q15_t)0x4324, (q15_t)0x3fec, (q15_t)0x4330, (q15_t)0x3fec, (q15_t)0x433d, (q15_t)0x3feb, (q15_t)0x434a, (q15_t)0x3fea,
-    (q15_t)0x4356, (q15_t)0x3fea, (q15_t)0x4363, (q15_t)0x3fe9, (q15_t)0x436f, (q15_t)0x3fe8, (q15_t)0x437c, (q15_t)0x3fe8,
-    (q15_t)0x4388, (q15_t)0x3fe7, (q15_t)0x4395, (q15_t)0x3fe6, (q15_t)0x43a1, (q15_t)0x3fe6, (q15_t)0x43ae, (q15_t)0x3fe5,
-    (q15_t)0x43bb, (q15_t)0x3fe4, (q15_t)0x43c7, (q15_t)0x3fe3, (q15_t)0x43d4, (q15_t)0x3fe3, (q15_t)0x43e0, (q15_t)0x3fe2,
-    (q15_t)0x43ed, (q15_t)0x3fe1, (q15_t)0x43f9, (q15_t)0x3fe0, (q15_t)0x4406, (q15_t)0x3fe0, (q15_t)0x4412, (q15_t)0x3fdf,
-    (q15_t)0x441f, (q15_t)0x3fde, (q15_t)0x442b, (q15_t)0x3fdd, (q15_t)0x4438, (q15_t)0x3fdc, (q15_t)0x4444, (q15_t)0x3fdc,
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-    (q15_t)0x7dd6, (q15_t)0x1080, (q15_t)0x7dd9, (q15_t)0x1074, (q15_t)0x7ddd, (q15_t)0x1068, (q15_t)0x7de0, (q15_t)0x105c,
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-    (q15_t)0x7fff, (q15_t)0xff9b, (q15_t)0x7fff, (q15_t)0xff8f, (q15_t)0x7fff, (q15_t)0xff82, (q15_t)0x7fff, (q15_t)0xff76,
-    (q15_t)0x7fff, (q15_t)0xff69, (q15_t)0x7fff, (q15_t)0xff5d, (q15_t)0x7fff, (q15_t)0xff50, (q15_t)0x7fff, (q15_t)0xff44,
-    (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7fff, (q15_t)0xff2a, (q15_t)0x7ffe, (q15_t)0xff1e, (q15_t)0x7ffe, (q15_t)0xff11,
-    (q15_t)0x7ffe, (q15_t)0xff05, (q15_t)0x7ffe, (q15_t)0xfef8, (q15_t)0x7ffe, (q15_t)0xfeec, (q15_t)0x7ffd, (q15_t)0xfedf,
-    (q15_t)0x7ffd, (q15_t)0xfed2, (q15_t)0x7ffd, (q15_t)0xfec6, (q15_t)0x7ffd, (q15_t)0xfeb9, (q15_t)0x7ffc, (q15_t)0xfead,
-    (q15_t)0x7ffc, (q15_t)0xfea0, (q15_t)0x7ffc, (q15_t)0xfe94, (q15_t)0x7ffc, (q15_t)0xfe87, (q15_t)0x7ffb, (q15_t)0xfe7a,
-    (q15_t)0x7ffb, (q15_t)0xfe6e, (q15_t)0x7ffb, (q15_t)0xfe61, (q15_t)0x7ffa, (q15_t)0xfe55, (q15_t)0x7ffa, (q15_t)0xfe48,
-    (q15_t)0x7ffa, (q15_t)0xfe3c, (q15_t)0x7ff9, (q15_t)0xfe2f, (q15_t)0x7ff9, (q15_t)0xfe23, (q15_t)0x7ff9, (q15_t)0xfe16,
-    (q15_t)0x7ff8, (q15_t)0xfe09, (q15_t)0x7ff8, (q15_t)0xfdfd, (q15_t)0x7ff7, (q15_t)0xfdf0, (q15_t)0x7ff7, (q15_t)0xfde4,
-    (q15_t)0x7ff7, (q15_t)0xfdd7, (q15_t)0x7ff6, (q15_t)0xfdcb, (q15_t)0x7ff6, (q15_t)0xfdbe, (q15_t)0x7ff5, (q15_t)0xfdb2,
-    (q15_t)0x7ff5, (q15_t)0xfda5, (q15_t)0x7ff4, (q15_t)0xfd98, (q15_t)0x7ff4, (q15_t)0xfd8c, (q15_t)0x7ff3, (q15_t)0xfd7f,
-    (q15_t)0x7ff3, (q15_t)0xfd73, (q15_t)0x7ff2, (q15_t)0xfd66, (q15_t)0x7ff2, (q15_t)0xfd5a, (q15_t)0x7ff1, (q15_t)0xfd4d,
-    (q15_t)0x7ff1, (q15_t)0xfd40, (q15_t)0x7ff0, (q15_t)0xfd34, (q15_t)0x7ff0, (q15_t)0xfd27, (q15_t)0x7fef, (q15_t)0xfd1b,
-    (q15_t)0x7fef, (q15_t)0xfd0e, (q15_t)0x7fee, (q15_t)0xfd02, (q15_t)0x7fed, (q15_t)0xfcf5, (q15_t)0x7fed, (q15_t)0xfce9,
-    (q15_t)0x7fec, (q15_t)0xfcdc, (q15_t)0x7fec, (q15_t)0xfcd0, (q15_t)0x7feb, (q15_t)0xfcc3, (q15_t)0x7fea, (q15_t)0xfcb6,
-    (q15_t)0x7fea, (q15_t)0xfcaa, (q15_t)0x7fe9, (q15_t)0xfc9d, (q15_t)0x7fe8, (q15_t)0xfc91, (q15_t)0x7fe8, (q15_t)0xfc84,
-    (q15_t)0x7fe7, (q15_t)0xfc78, (q15_t)0x7fe6, (q15_t)0xfc6b, (q15_t)0x7fe6, (q15_t)0xfc5f, (q15_t)0x7fe5, (q15_t)0xfc52,
-    (q15_t)0x7fe4, (q15_t)0xfc45, (q15_t)0x7fe3, (q15_t)0xfc39, (q15_t)0x7fe3, (q15_t)0xfc2c, (q15_t)0x7fe2, (q15_t)0xfc20,
-    (q15_t)0x7fe1, (q15_t)0xfc13, (q15_t)0x7fe0, (q15_t)0xfc07, (q15_t)0x7fe0, (q15_t)0xfbfa, (q15_t)0x7fdf, (q15_t)0xfbee,
-    (q15_t)0x7fde, (q15_t)0xfbe1, (q15_t)0x7fdd, (q15_t)0xfbd5, (q15_t)0x7fdc, (q15_t)0xfbc8, (q15_t)0x7fdc, (q15_t)0xfbbc,
-    (q15_t)0x7fdb, (q15_t)0xfbaf, (q15_t)0x7fda, (q15_t)0xfba2, (q15_t)0x7fd9, (q15_t)0xfb96, (q15_t)0x7fd8, (q15_t)0xfb89,
-    (q15_t)0x7fd7, (q15_t)0xfb7d, (q15_t)0x7fd6, (q15_t)0xfb70, (q15_t)0x7fd5, (q15_t)0xfb64, (q15_t)0x7fd5, (q15_t)0xfb57,
-    (q15_t)0x7fd4, (q15_t)0xfb4b, (q15_t)0x7fd3, (q15_t)0xfb3e, (q15_t)0x7fd2, (q15_t)0xfb32, (q15_t)0x7fd1, (q15_t)0xfb25,
-    (q15_t)0x7fd0, (q15_t)0xfb19, (q15_t)0x7fcf, (q15_t)0xfb0c, (q15_t)0x7fce, (q15_t)0xfb00, (q15_t)0x7fcd, (q15_t)0xfaf3,
-    (q15_t)0x7fcc, (q15_t)0xfae6, (q15_t)0x7fcb, (q15_t)0xfada, (q15_t)0x7fca, (q15_t)0xfacd, (q15_t)0x7fc9, (q15_t)0xfac1,
-    (q15_t)0x7fc8, (q15_t)0xfab4, (q15_t)0x7fc7, (q15_t)0xfaa8, (q15_t)0x7fc6, (q15_t)0xfa9b, (q15_t)0x7fc5, (q15_t)0xfa8f,
-    (q15_t)0x7fc4, (q15_t)0xfa82, (q15_t)0x7fc3, (q15_t)0xfa76, (q15_t)0x7fc1, (q15_t)0xfa69, (q15_t)0x7fc0, (q15_t)0xfa5d,
-    (q15_t)0x7fbf, (q15_t)0xfa50, (q15_t)0x7fbe, (q15_t)0xfa44, (q15_t)0x7fbd, (q15_t)0xfa37, (q15_t)0x7fbc, (q15_t)0xfa2b,
-    (q15_t)0x7fbb, (q15_t)0xfa1e, (q15_t)0x7fb9, (q15_t)0xfa12, (q15_t)0x7fb8, (q15_t)0xfa05, (q15_t)0x7fb7, (q15_t)0xf9f9,
-    (q15_t)0x7fb6, (q15_t)0xf9ec, (q15_t)0x7fb5, (q15_t)0xf9e0, (q15_t)0x7fb4, (q15_t)0xf9d3, (q15_t)0x7fb2, (q15_t)0xf9c7,
-    (q15_t)0x7fb1, (q15_t)0xf9ba, (q15_t)0x7fb0, (q15_t)0xf9ae, (q15_t)0x7faf, (q15_t)0xf9a1, (q15_t)0x7fad, (q15_t)0xf995,
-    (q15_t)0x7fac, (q15_t)0xf988, (q15_t)0x7fab, (q15_t)0xf97c, (q15_t)0x7faa, (q15_t)0xf96f, (q15_t)0x7fa8, (q15_t)0xf963,
-    (q15_t)0x7fa7, (q15_t)0xf956, (q15_t)0x7fa6, (q15_t)0xf94a, (q15_t)0x7fa4, (q15_t)0xf93d, (q15_t)0x7fa3, (q15_t)0xf931,
-    (q15_t)0x7fa2, (q15_t)0xf924, (q15_t)0x7fa0, (q15_t)0xf918, (q15_t)0x7f9f, (q15_t)0xf90b, (q15_t)0x7f9e, (q15_t)0xf8ff,
-    (q15_t)0x7f9c, (q15_t)0xf8f2, (q15_t)0x7f9b, (q15_t)0xf8e6, (q15_t)0x7f99, (q15_t)0xf8d9, (q15_t)0x7f98, (q15_t)0xf8cd,
-    (q15_t)0x7f97, (q15_t)0xf8c0, (q15_t)0x7f95, (q15_t)0xf8b4, (q15_t)0x7f94, (q15_t)0xf8a7, (q15_t)0x7f92, (q15_t)0xf89b,
-    (q15_t)0x7f91, (q15_t)0xf88e, (q15_t)0x7f8f, (q15_t)0xf882, (q15_t)0x7f8e, (q15_t)0xf875, (q15_t)0x7f8c, (q15_t)0xf869,
-    (q15_t)0x7f8b, (q15_t)0xf85c, (q15_t)0x7f89, (q15_t)0xf850, (q15_t)0x7f88, (q15_t)0xf843, (q15_t)0x7f86, (q15_t)0xf837,
-    (q15_t)0x7f85, (q15_t)0xf82a, (q15_t)0x7f83, (q15_t)0xf81e, (q15_t)0x7f82, (q15_t)0xf811, (q15_t)0x7f80, (q15_t)0xf805,
-    (q15_t)0x7f7f, (q15_t)0xf7f9, (q15_t)0x7f7d, (q15_t)0xf7ec, (q15_t)0x7f7b, (q15_t)0xf7e0, (q15_t)0x7f7a, (q15_t)0xf7d3,
-    (q15_t)0x7f78, (q15_t)0xf7c7, (q15_t)0x7f77, (q15_t)0xf7ba, (q15_t)0x7f75, (q15_t)0xf7ae, (q15_t)0x7f73, (q15_t)0xf7a1,
-    (q15_t)0x7f72, (q15_t)0xf795, (q15_t)0x7f70, (q15_t)0xf788, (q15_t)0x7f6e, (q15_t)0xf77c, (q15_t)0x7f6d, (q15_t)0xf76f,
-    (q15_t)0x7f6b, (q15_t)0xf763, (q15_t)0x7f69, (q15_t)0xf757, (q15_t)0x7f68, (q15_t)0xf74a, (q15_t)0x7f66, (q15_t)0xf73e,
-    (q15_t)0x7f64, (q15_t)0xf731, (q15_t)0x7f62, (q15_t)0xf725, (q15_t)0x7f61, (q15_t)0xf718, (q15_t)0x7f5f, (q15_t)0xf70c,
-    (q15_t)0x7f5d, (q15_t)0xf6ff, (q15_t)0x7f5b, (q15_t)0xf6f3, (q15_t)0x7f5a, (q15_t)0xf6e7, (q15_t)0x7f58, (q15_t)0xf6da,
-    (q15_t)0x7f56, (q15_t)0xf6ce, (q15_t)0x7f54, (q15_t)0xf6c1, (q15_t)0x7f52, (q15_t)0xf6b5, (q15_t)0x7f51, (q15_t)0xf6a8,
-    (q15_t)0x7f4f, (q15_t)0xf69c, (q15_t)0x7f4d, (q15_t)0xf690, (q15_t)0x7f4b, (q15_t)0xf683, (q15_t)0x7f49, (q15_t)0xf677,
-    (q15_t)0x7f47, (q15_t)0xf66a, (q15_t)0x7f45, (q15_t)0xf65e, (q15_t)0x7f43, (q15_t)0xf651, (q15_t)0x7f42, (q15_t)0xf645,
-    (q15_t)0x7f40, (q15_t)0xf639, (q15_t)0x7f3e, (q15_t)0xf62c, (q15_t)0x7f3c, (q15_t)0xf620, (q15_t)0x7f3a, (q15_t)0xf613,
-    (q15_t)0x7f38, (q15_t)0xf607, (q15_t)0x7f36, (q15_t)0xf5fa, (q15_t)0x7f34, (q15_t)0xf5ee, (q15_t)0x7f32, (q15_t)0xf5e2,
-    (q15_t)0x7f30, (q15_t)0xf5d5, (q15_t)0x7f2e, (q15_t)0xf5c9, (q15_t)0x7f2c, (q15_t)0xf5bc, (q15_t)0x7f2a, (q15_t)0xf5b0,
-    (q15_t)0x7f28, (q15_t)0xf5a4, (q15_t)0x7f26, (q15_t)0xf597, (q15_t)0x7f24, (q15_t)0xf58b, (q15_t)0x7f22, (q15_t)0xf57e,
-    (q15_t)0x7f20, (q15_t)0xf572, (q15_t)0x7f1e, (q15_t)0xf566, (q15_t)0x7f1c, (q15_t)0xf559, (q15_t)0x7f19, (q15_t)0xf54d,
-    (q15_t)0x7f17, (q15_t)0xf540, (q15_t)0x7f15, (q15_t)0xf534, (q15_t)0x7f13, (q15_t)0xf528, (q15_t)0x7f11, (q15_t)0xf51b,
-    (q15_t)0x7f0f, (q15_t)0xf50f, (q15_t)0x7f0d, (q15_t)0xf503, (q15_t)0x7f0a, (q15_t)0xf4f6, (q15_t)0x7f08, (q15_t)0xf4ea,
-    (q15_t)0x7f06, (q15_t)0xf4dd, (q15_t)0x7f04, (q15_t)0xf4d1, (q15_t)0x7f02, (q15_t)0xf4c5, (q15_t)0x7f00, (q15_t)0xf4b8,
-    (q15_t)0x7efd, (q15_t)0xf4ac, (q15_t)0x7efb, (q15_t)0xf4a0, (q15_t)0x7ef9, (q15_t)0xf493, (q15_t)0x7ef7, (q15_t)0xf487,
-    (q15_t)0x7ef4, (q15_t)0xf47b, (q15_t)0x7ef2, (q15_t)0xf46e, (q15_t)0x7ef0, (q15_t)0xf462, (q15_t)0x7eed, (q15_t)0xf455,
-    (q15_t)0x7eeb, (q15_t)0xf449, (q15_t)0x7ee9, (q15_t)0xf43d, (q15_t)0x7ee7, (q15_t)0xf430, (q15_t)0x7ee4, (q15_t)0xf424,
-    (q15_t)0x7ee2, (q15_t)0xf418, (q15_t)0x7ee0, (q15_t)0xf40b, (q15_t)0x7edd, (q15_t)0xf3ff, (q15_t)0x7edb, (q15_t)0xf3f3,
-    (q15_t)0x7ed8, (q15_t)0xf3e6, (q15_t)0x7ed6, (q15_t)0xf3da, (q15_t)0x7ed4, (q15_t)0xf3ce, (q15_t)0x7ed1, (q15_t)0xf3c1,
-    (q15_t)0x7ecf, (q15_t)0xf3b5, (q15_t)0x7ecc, (q15_t)0xf3a9, (q15_t)0x7eca, (q15_t)0xf39c, (q15_t)0x7ec8, (q15_t)0xf390,
-    (q15_t)0x7ec5, (q15_t)0xf384, (q15_t)0x7ec3, (q15_t)0xf377, (q15_t)0x7ec0, (q15_t)0xf36b, (q15_t)0x7ebe, (q15_t)0xf35f,
-    (q15_t)0x7ebb, (q15_t)0xf352, (q15_t)0x7eb9, (q15_t)0xf346, (q15_t)0x7eb6, (q15_t)0xf33a, (q15_t)0x7eb4, (q15_t)0xf32d,
-    (q15_t)0x7eb1, (q15_t)0xf321, (q15_t)0x7eaf, (q15_t)0xf315, (q15_t)0x7eac, (q15_t)0xf308, (q15_t)0x7eaa, (q15_t)0xf2fc,
-    (q15_t)0x7ea7, (q15_t)0xf2f0, (q15_t)0x7ea5, (q15_t)0xf2e4, (q15_t)0x7ea2, (q15_t)0xf2d7, (q15_t)0x7e9f, (q15_t)0xf2cb,
-    (q15_t)0x7e9d, (q15_t)0xf2bf, (q15_t)0x7e9a, (q15_t)0xf2b2, (q15_t)0x7e98, (q15_t)0xf2a6, (q15_t)0x7e95, (q15_t)0xf29a,
-    (q15_t)0x7e92, (q15_t)0xf28e, (q15_t)0x7e90, (q15_t)0xf281, (q15_t)0x7e8d, (q15_t)0xf275, (q15_t)0x7e8a, (q15_t)0xf269,
-    (q15_t)0x7e88, (q15_t)0xf25c, (q15_t)0x7e85, (q15_t)0xf250, (q15_t)0x7e82, (q15_t)0xf244, (q15_t)0x7e80, (q15_t)0xf238,
-    (q15_t)0x7e7d, (q15_t)0xf22b, (q15_t)0x7e7a, (q15_t)0xf21f, (q15_t)0x7e77, (q15_t)0xf213, (q15_t)0x7e75, (q15_t)0xf207,
-    (q15_t)0x7e72, (q15_t)0xf1fa, (q15_t)0x7e6f, (q15_t)0xf1ee, (q15_t)0x7e6c, (q15_t)0xf1e2, (q15_t)0x7e6a, (q15_t)0xf1d5,
-    (q15_t)0x7e67, (q15_t)0xf1c9, (q15_t)0x7e64, (q15_t)0xf1bd, (q15_t)0x7e61, (q15_t)0xf1b1, (q15_t)0x7e5e, (q15_t)0xf1a4,
-    (q15_t)0x7e5c, (q15_t)0xf198, (q15_t)0x7e59, (q15_t)0xf18c, (q15_t)0x7e56, (q15_t)0xf180, (q15_t)0x7e53, (q15_t)0xf174,
-    (q15_t)0x7e50, (q15_t)0xf167, (q15_t)0x7e4d, (q15_t)0xf15b, (q15_t)0x7e4a, (q15_t)0xf14f, (q15_t)0x7e48, (q15_t)0xf143,
-    (q15_t)0x7e45, (q15_t)0xf136, (q15_t)0x7e42, (q15_t)0xf12a, (q15_t)0x7e3f, (q15_t)0xf11e, (q15_t)0x7e3c, (q15_t)0xf112,
-    (q15_t)0x7e39, (q15_t)0xf105, (q15_t)0x7e36, (q15_t)0xf0f9, (q15_t)0x7e33, (q15_t)0xf0ed, (q15_t)0x7e30, (q15_t)0xf0e1,
-    (q15_t)0x7e2d, (q15_t)0xf0d5, (q15_t)0x7e2a, (q15_t)0xf0c8, (q15_t)0x7e27, (q15_t)0xf0bc, (q15_t)0x7e24, (q15_t)0xf0b0,
-    (q15_t)0x7e21, (q15_t)0xf0a4, (q15_t)0x7e1e, (q15_t)0xf098, (q15_t)0x7e1b, (q15_t)0xf08b, (q15_t)0x7e18, (q15_t)0xf07f,
-    (q15_t)0x7e15, (q15_t)0xf073, (q15_t)0x7e12, (q15_t)0xf067, (q15_t)0x7e0f, (q15_t)0xf05b, (q15_t)0x7e0c, (q15_t)0xf04e,
-    (q15_t)0x7e09, (q15_t)0xf042, (q15_t)0x7e06, (q15_t)0xf036, (q15_t)0x7e03, (q15_t)0xf02a, (q15_t)0x7dff, (q15_t)0xf01e,
-    (q15_t)0x7dfc, (q15_t)0xf012, (q15_t)0x7df9, (q15_t)0xf005, (q15_t)0x7df6, (q15_t)0xeff9, (q15_t)0x7df3, (q15_t)0xefed,
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-    (q15_t)0x5edc, (q15_t)0xc7ee, (q15_t)0x5ed1, (q15_t)0xc7e8, (q15_t)0x5ec6, (q15_t)0xc7e2, (q15_t)0x5ebb, (q15_t)0xc7dc,
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-    (q15_t)0x5be5, (q15_t)0xc666, (q15_t)0x5bda, (q15_t)0xc661, (q15_t)0x5bce, (q15_t)0xc65b, (q15_t)0x5bc3, (q15_t)0xc656,
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-    (q15_t)0x5ad4, (q15_t)0xc5e5, (q15_t)0x5ac9, (q15_t)0xc5e0, (q15_t)0x5abe, (q15_t)0xc5db, (q15_t)0x5ab2, (q15_t)0xc5d5,
-    (q15_t)0x5aa7, (q15_t)0xc5d0, (q15_t)0x5a9b, (q15_t)0xc5cb, (q15_t)0x5a90, (q15_t)0xc5c6, (q15_t)0x5a84, (q15_t)0xc5c1,
-    (q15_t)0x5a79, (q15_t)0xc5bb, (q15_t)0x5a6e, (q15_t)0xc5b6, (q15_t)0x5a62, (q15_t)0xc5b1, (q15_t)0x5a57, (q15_t)0xc5ac,
-    (q15_t)0x5a4b, (q15_t)0xc5a7, (q15_t)0x5a40, (q15_t)0xc5a1, (q15_t)0x5a34, (q15_t)0xc59c, (q15_t)0x5a29, (q15_t)0xc597,
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-    (q15_t)0x52f4, (q15_t)0xc2df, (q15_t)0x52e8, (q15_t)0xc2db, (q15_t)0x52dc, (q15_t)0xc2d8, (q15_t)0x52d0, (q15_t)0xc2d4,
-    (q15_t)0x52c4, (q15_t)0xc2d0, (q15_t)0x52b8, (q15_t)0xc2cc, (q15_t)0x52ac, (q15_t)0xc2c9, (q15_t)0x52a0, (q15_t)0xc2c5,
-    (q15_t)0x5294, (q15_t)0xc2c1, (q15_t)0x5288, (q15_t)0xc2be, (q15_t)0x527c, (q15_t)0xc2ba, (q15_t)0x5270, (q15_t)0xc2b7,
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-    (q15_t)0x5234, (q15_t)0xc2a5, (q15_t)0x5228, (q15_t)0xc2a1, (q15_t)0x521c, (q15_t)0xc29d, (q15_t)0x5210, (q15_t)0xc29a,
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-    (q15_t)0x51d3, (q15_t)0xc288, (q15_t)0x51c7, (q15_t)0xc285, (q15_t)0x51bb, (q15_t)0xc281, (q15_t)0x51af, (q15_t)0xc27e,
-    (q15_t)0x51a3, (q15_t)0xc27a, (q15_t)0x5197, (q15_t)0xc277, (q15_t)0x518b, (q15_t)0xc273, (q15_t)0x517f, (q15_t)0xc270,
-    (q15_t)0x5173, (q15_t)0xc26d, (q15_t)0x5167, (q15_t)0xc269, (q15_t)0x515a, (q15_t)0xc266, (q15_t)0x514e, (q15_t)0xc262,
-    (q15_t)0x5142, (q15_t)0xc25f, (q15_t)0x5136, (q15_t)0xc25c, (q15_t)0x512a, (q15_t)0xc258, (q15_t)0x511e, (q15_t)0xc255,
-    (q15_t)0x5112, (q15_t)0xc251, (q15_t)0x5106, (q15_t)0xc24e, (q15_t)0x50fa, (q15_t)0xc24b, (q15_t)0x50ed, (q15_t)0xc247,
-    (q15_t)0x50e1, (q15_t)0xc244, (q15_t)0x50d5, (q15_t)0xc241, (q15_t)0x50c9, (q15_t)0xc23e, (q15_t)0x50bd, (q15_t)0xc23a,
-    (q15_t)0x50b1, (q15_t)0xc237, (q15_t)0x50a5, (q15_t)0xc234, (q15_t)0x5099, (q15_t)0xc230, (q15_t)0x508c, (q15_t)0xc22d,
-    (q15_t)0x5080, (q15_t)0xc22a, (q15_t)0x5074, (q15_t)0xc227, (q15_t)0x5068, (q15_t)0xc223, (q15_t)0x505c, (q15_t)0xc220,
-    (q15_t)0x5050, (q15_t)0xc21d, (q15_t)0x5044, (q15_t)0xc21a, (q15_t)0x5037, (q15_t)0xc217, (q15_t)0x502b, (q15_t)0xc213,
-    (q15_t)0x501f, (q15_t)0xc210, (q15_t)0x5013, (q15_t)0xc20d, (q15_t)0x5007, (q15_t)0xc20a, (q15_t)0x4ffb, (q15_t)0xc207,
-    (q15_t)0x4fee, (q15_t)0xc204, (q15_t)0x4fe2, (q15_t)0xc201, (q15_t)0x4fd6, (q15_t)0xc1fd, (q15_t)0x4fca, (q15_t)0xc1fa,
-    (q15_t)0x4fbe, (q15_t)0xc1f7, (q15_t)0x4fb2, (q15_t)0xc1f4, (q15_t)0x4fa5, (q15_t)0xc1f1, (q15_t)0x4f99, (q15_t)0xc1ee,
-    (q15_t)0x4f8d, (q15_t)0xc1eb, (q15_t)0x4f81, (q15_t)0xc1e8, (q15_t)0x4f75, (q15_t)0xc1e5, (q15_t)0x4f68, (q15_t)0xc1e2,
-    (q15_t)0x4f5c, (q15_t)0xc1df, (q15_t)0x4f50, (q15_t)0xc1dc, (q15_t)0x4f44, (q15_t)0xc1d9, (q15_t)0x4f38, (q15_t)0xc1d6,
-    (q15_t)0x4f2b, (q15_t)0xc1d3, (q15_t)0x4f1f, (q15_t)0xc1d0, (q15_t)0x4f13, (q15_t)0xc1cd, (q15_t)0x4f07, (q15_t)0xc1ca,
-    (q15_t)0x4efb, (q15_t)0xc1c7, (q15_t)0x4eee, (q15_t)0xc1c4, (q15_t)0x4ee2, (q15_t)0xc1c1, (q15_t)0x4ed6, (q15_t)0xc1be,
-    (q15_t)0x4eca, (q15_t)0xc1bb, (q15_t)0x4ebd, (q15_t)0xc1b8, (q15_t)0x4eb1, (q15_t)0xc1b6, (q15_t)0x4ea5, (q15_t)0xc1b3,
-    (q15_t)0x4e99, (q15_t)0xc1b0, (q15_t)0x4e8c, (q15_t)0xc1ad, (q15_t)0x4e80, (q15_t)0xc1aa, (q15_t)0x4e74, (q15_t)0xc1a7,
-    (q15_t)0x4e68, (q15_t)0xc1a4, (q15_t)0x4e5c, (q15_t)0xc1a2, (q15_t)0x4e4f, (q15_t)0xc19f, (q15_t)0x4e43, (q15_t)0xc19c,
-    (q15_t)0x4e37, (q15_t)0xc199, (q15_t)0x4e2b, (q15_t)0xc196, (q15_t)0x4e1e, (q15_t)0xc194, (q15_t)0x4e12, (q15_t)0xc191,
-    (q15_t)0x4e06, (q15_t)0xc18e, (q15_t)0x4df9, (q15_t)0xc18b, (q15_t)0x4ded, (q15_t)0xc189, (q15_t)0x4de1, (q15_t)0xc186,
-    (q15_t)0x4dd5, (q15_t)0xc183, (q15_t)0x4dc8, (q15_t)0xc180, (q15_t)0x4dbc, (q15_t)0xc17e, (q15_t)0x4db0, (q15_t)0xc17b,
-    (q15_t)0x4da4, (q15_t)0xc178, (q15_t)0x4d97, (q15_t)0xc176, (q15_t)0x4d8b, (q15_t)0xc173, (q15_t)0x4d7f, (q15_t)0xc170,
-    (q15_t)0x4d72, (q15_t)0xc16e, (q15_t)0x4d66, (q15_t)0xc16b, (q15_t)0x4d5a, (q15_t)0xc168, (q15_t)0x4d4e, (q15_t)0xc166,
-    (q15_t)0x4d41, (q15_t)0xc163, (q15_t)0x4d35, (q15_t)0xc161, (q15_t)0x4d29, (q15_t)0xc15e, (q15_t)0x4d1c, (q15_t)0xc15b,
-    (q15_t)0x4d10, (q15_t)0xc159, (q15_t)0x4d04, (q15_t)0xc156, (q15_t)0x4cf8, (q15_t)0xc154, (q15_t)0x4ceb, (q15_t)0xc151,
-    (q15_t)0x4cdf, (q15_t)0xc14f, (q15_t)0x4cd3, (q15_t)0xc14c, (q15_t)0x4cc6, (q15_t)0xc14a, (q15_t)0x4cba, (q15_t)0xc147,
-    (q15_t)0x4cae, (q15_t)0xc145, (q15_t)0x4ca1, (q15_t)0xc142, (q15_t)0x4c95, (q15_t)0xc140, (q15_t)0x4c89, (q15_t)0xc13d,
-    (q15_t)0x4c7c, (q15_t)0xc13b, (q15_t)0x4c70, (q15_t)0xc138, (q15_t)0x4c64, (q15_t)0xc136, (q15_t)0x4c57, (q15_t)0xc134,
-    (q15_t)0x4c4b, (q15_t)0xc131, (q15_t)0x4c3f, (q15_t)0xc12f, (q15_t)0x4c32, (q15_t)0xc12c, (q15_t)0x4c26, (q15_t)0xc12a,
-    (q15_t)0x4c1a, (q15_t)0xc128, (q15_t)0x4c0d, (q15_t)0xc125, (q15_t)0x4c01, (q15_t)0xc123, (q15_t)0x4bf5, (q15_t)0xc120,
-    (q15_t)0x4be8, (q15_t)0xc11e, (q15_t)0x4bdc, (q15_t)0xc11c, (q15_t)0x4bd0, (q15_t)0xc119, (q15_t)0x4bc3, (q15_t)0xc117,
-    (q15_t)0x4bb7, (q15_t)0xc115, (q15_t)0x4bab, (q15_t)0xc113, (q15_t)0x4b9e, (q15_t)0xc110, (q15_t)0x4b92, (q15_t)0xc10e,
-    (q15_t)0x4b85, (q15_t)0xc10c, (q15_t)0x4b79, (q15_t)0xc109, (q15_t)0x4b6d, (q15_t)0xc107, (q15_t)0x4b60, (q15_t)0xc105,
-    (q15_t)0x4b54, (q15_t)0xc103, (q15_t)0x4b48, (q15_t)0xc100, (q15_t)0x4b3b, (q15_t)0xc0fe, (q15_t)0x4b2f, (q15_t)0xc0fc,
-    (q15_t)0x4b23, (q15_t)0xc0fa, (q15_t)0x4b16, (q15_t)0xc0f8, (q15_t)0x4b0a, (q15_t)0xc0f6, (q15_t)0x4afd, (q15_t)0xc0f3,
-    (q15_t)0x4af1, (q15_t)0xc0f1, (q15_t)0x4ae5, (q15_t)0xc0ef, (q15_t)0x4ad8, (q15_t)0xc0ed, (q15_t)0x4acc, (q15_t)0xc0eb,
-    (q15_t)0x4ac0, (q15_t)0xc0e9, (q15_t)0x4ab3, (q15_t)0xc0e7, (q15_t)0x4aa7, (q15_t)0xc0e4, (q15_t)0x4a9a, (q15_t)0xc0e2,
-    (q15_t)0x4a8e, (q15_t)0xc0e0, (q15_t)0x4a82, (q15_t)0xc0de, (q15_t)0x4a75, (q15_t)0xc0dc, (q15_t)0x4a69, (q15_t)0xc0da,
-    (q15_t)0x4a5c, (q15_t)0xc0d8, (q15_t)0x4a50, (q15_t)0xc0d6, (q15_t)0x4a44, (q15_t)0xc0d4, (q15_t)0x4a37, (q15_t)0xc0d2,
-    (q15_t)0x4a2b, (q15_t)0xc0d0, (q15_t)0x4a1e, (q15_t)0xc0ce, (q15_t)0x4a12, (q15_t)0xc0cc, (q15_t)0x4a06, (q15_t)0xc0ca,
-    (q15_t)0x49f9, (q15_t)0xc0c8, (q15_t)0x49ed, (q15_t)0xc0c6, (q15_t)0x49e0, (q15_t)0xc0c4, (q15_t)0x49d4, (q15_t)0xc0c2,
-    (q15_t)0x49c7, (q15_t)0xc0c0, (q15_t)0x49bb, (q15_t)0xc0be, (q15_t)0x49af, (q15_t)0xc0bd, (q15_t)0x49a2, (q15_t)0xc0bb,
-    (q15_t)0x4996, (q15_t)0xc0b9, (q15_t)0x4989, (q15_t)0xc0b7, (q15_t)0x497d, (q15_t)0xc0b5, (q15_t)0x4970, (q15_t)0xc0b3,
-    (q15_t)0x4964, (q15_t)0xc0b1, (q15_t)0x4958, (q15_t)0xc0af, (q15_t)0x494b, (q15_t)0xc0ae, (q15_t)0x493f, (q15_t)0xc0ac,
-    (q15_t)0x4932, (q15_t)0xc0aa, (q15_t)0x4926, (q15_t)0xc0a8, (q15_t)0x4919, (q15_t)0xc0a6, (q15_t)0x490d, (q15_t)0xc0a5,
-    (q15_t)0x4901, (q15_t)0xc0a3, (q15_t)0x48f4, (q15_t)0xc0a1, (q15_t)0x48e8, (q15_t)0xc09f, (q15_t)0x48db, (q15_t)0xc09e,
-    (q15_t)0x48cf, (q15_t)0xc09c, (q15_t)0x48c2, (q15_t)0xc09a, (q15_t)0x48b6, (q15_t)0xc098, (q15_t)0x48a9, (q15_t)0xc097,
-    (q15_t)0x489d, (q15_t)0xc095, (q15_t)0x4891, (q15_t)0xc093, (q15_t)0x4884, (q15_t)0xc092, (q15_t)0x4878, (q15_t)0xc090,
-    (q15_t)0x486b, (q15_t)0xc08e, (q15_t)0x485f, (q15_t)0xc08d, (q15_t)0x4852, (q15_t)0xc08b, (q15_t)0x4846, (q15_t)0xc089,
-    (q15_t)0x4839, (q15_t)0xc088, (q15_t)0x482d, (q15_t)0xc086, (q15_t)0x4820, (q15_t)0xc085, (q15_t)0x4814, (q15_t)0xc083,
-    (q15_t)0x4807, (q15_t)0xc081, (q15_t)0x47fb, (q15_t)0xc080, (q15_t)0x47ef, (q15_t)0xc07e, (q15_t)0x47e2, (q15_t)0xc07d,
-    (q15_t)0x47d6, (q15_t)0xc07b, (q15_t)0x47c9, (q15_t)0xc07a, (q15_t)0x47bd, (q15_t)0xc078, (q15_t)0x47b0, (q15_t)0xc077,
-    (q15_t)0x47a4, (q15_t)0xc075, (q15_t)0x4797, (q15_t)0xc074, (q15_t)0x478b, (q15_t)0xc072, (q15_t)0x477e, (q15_t)0xc071,
-    (q15_t)0x4772, (q15_t)0xc06f, (q15_t)0x4765, (q15_t)0xc06e, (q15_t)0x4759, (q15_t)0xc06c, (q15_t)0x474c, (q15_t)0xc06b,
-    (q15_t)0x4740, (q15_t)0xc069, (q15_t)0x4733, (q15_t)0xc068, (q15_t)0x4727, (q15_t)0xc067, (q15_t)0x471a, (q15_t)0xc065,
-    (q15_t)0x470e, (q15_t)0xc064, (q15_t)0x4701, (q15_t)0xc062, (q15_t)0x46f5, (q15_t)0xc061, (q15_t)0x46e8, (q15_t)0xc060,
-    (q15_t)0x46dc, (q15_t)0xc05e, (q15_t)0x46cf, (q15_t)0xc05d, (q15_t)0x46c3, (q15_t)0xc05c, (q15_t)0x46b6, (q15_t)0xc05a,
-    (q15_t)0x46aa, (q15_t)0xc059, (q15_t)0x469d, (q15_t)0xc058, (q15_t)0x4691, (q15_t)0xc056, (q15_t)0x4684, (q15_t)0xc055,
-    (q15_t)0x4678, (q15_t)0xc054, (q15_t)0x466b, (q15_t)0xc053, (q15_t)0x465f, (q15_t)0xc051, (q15_t)0x4652, (q15_t)0xc050,
-    (q15_t)0x4646, (q15_t)0xc04f, (q15_t)0x4639, (q15_t)0xc04e, (q15_t)0x462d, (q15_t)0xc04c, (q15_t)0x4620, (q15_t)0xc04b,
-    (q15_t)0x4614, (q15_t)0xc04a, (q15_t)0x4607, (q15_t)0xc049, (q15_t)0x45fb, (q15_t)0xc048, (q15_t)0x45ee, (q15_t)0xc047,
-    (q15_t)0x45e2, (q15_t)0xc045, (q15_t)0x45d5, (q15_t)0xc044, (q15_t)0x45c9, (q15_t)0xc043, (q15_t)0x45bc, (q15_t)0xc042,
-    (q15_t)0x45b0, (q15_t)0xc041, (q15_t)0x45a3, (q15_t)0xc040, (q15_t)0x4597, (q15_t)0xc03f, (q15_t)0x458a, (q15_t)0xc03d,
-    (q15_t)0x457e, (q15_t)0xc03c, (q15_t)0x4571, (q15_t)0xc03b, (q15_t)0x4565, (q15_t)0xc03a, (q15_t)0x4558, (q15_t)0xc039,
-    (q15_t)0x454c, (q15_t)0xc038, (q15_t)0x453f, (q15_t)0xc037, (q15_t)0x4533, (q15_t)0xc036, (q15_t)0x4526, (q15_t)0xc035,
-    (q15_t)0x451a, (q15_t)0xc034, (q15_t)0x450d, (q15_t)0xc033, (q15_t)0x4500, (q15_t)0xc032, (q15_t)0x44f4, (q15_t)0xc031,
-    (q15_t)0x44e7, (q15_t)0xc030, (q15_t)0x44db, (q15_t)0xc02f, (q15_t)0x44ce, (q15_t)0xc02e, (q15_t)0x44c2, (q15_t)0xc02d,
-    (q15_t)0x44b5, (q15_t)0xc02c, (q15_t)0x44a9, (q15_t)0xc02b, (q15_t)0x449c, (q15_t)0xc02b, (q15_t)0x4490, (q15_t)0xc02a,
-    (q15_t)0x4483, (q15_t)0xc029, (q15_t)0x4477, (q15_t)0xc028, (q15_t)0x446a, (q15_t)0xc027, (q15_t)0x445e, (q15_t)0xc026,
-    (q15_t)0x4451, (q15_t)0xc025, (q15_t)0x4444, (q15_t)0xc024, (q15_t)0x4438, (q15_t)0xc024, (q15_t)0x442b, (q15_t)0xc023,
-    (q15_t)0x441f, (q15_t)0xc022, (q15_t)0x4412, (q15_t)0xc021, (q15_t)0x4406, (q15_t)0xc020, (q15_t)0x43f9, (q15_t)0xc020,
-    (q15_t)0x43ed, (q15_t)0xc01f, (q15_t)0x43e0, (q15_t)0xc01e, (q15_t)0x43d4, (q15_t)0xc01d, (q15_t)0x43c7, (q15_t)0xc01d,
-    (q15_t)0x43bb, (q15_t)0xc01c, (q15_t)0x43ae, (q15_t)0xc01b, (q15_t)0x43a1, (q15_t)0xc01a, (q15_t)0x4395, (q15_t)0xc01a,
-    (q15_t)0x4388, (q15_t)0xc019, (q15_t)0x437c, (q15_t)0xc018, (q15_t)0x436f, (q15_t)0xc018, (q15_t)0x4363, (q15_t)0xc017,
-    (q15_t)0x4356, (q15_t)0xc016, (q15_t)0x434a, (q15_t)0xc016, (q15_t)0x433d, (q15_t)0xc015, (q15_t)0x4330, (q15_t)0xc014,
-    (q15_t)0x4324, (q15_t)0xc014, (q15_t)0x4317, (q15_t)0xc013, (q15_t)0x430b, (q15_t)0xc013, (q15_t)0x42fe, (q15_t)0xc012,
-    (q15_t)0x42f2, (q15_t)0xc011, (q15_t)0x42e5, (q15_t)0xc011, (q15_t)0x42d9, (q15_t)0xc010, (q15_t)0x42cc, (q15_t)0xc010,
-    (q15_t)0x42c0, (q15_t)0xc00f, (q15_t)0x42b3, (q15_t)0xc00f, (q15_t)0x42a6, (q15_t)0xc00e, (q15_t)0x429a, (q15_t)0xc00e,
-    (q15_t)0x428d, (q15_t)0xc00d, (q15_t)0x4281, (q15_t)0xc00d, (q15_t)0x4274, (q15_t)0xc00c, (q15_t)0x4268, (q15_t)0xc00c,
-    (q15_t)0x425b, (q15_t)0xc00b, (q15_t)0x424e, (q15_t)0xc00b, (q15_t)0x4242, (q15_t)0xc00a, (q15_t)0x4235, (q15_t)0xc00a,
-    (q15_t)0x4229, (q15_t)0xc009, (q15_t)0x421c, (q15_t)0xc009, (q15_t)0x4210, (q15_t)0xc009, (q15_t)0x4203, (q15_t)0xc008,
-    (q15_t)0x41f7, (q15_t)0xc008, (q15_t)0x41ea, (q15_t)0xc007, (q15_t)0x41dd, (q15_t)0xc007, (q15_t)0x41d1, (q15_t)0xc007,
-    (q15_t)0x41c4, (q15_t)0xc006, (q15_t)0x41b8, (q15_t)0xc006, (q15_t)0x41ab, (q15_t)0xc006, (q15_t)0x419f, (q15_t)0xc005,
-    (q15_t)0x4192, (q15_t)0xc005, (q15_t)0x4186, (q15_t)0xc005, (q15_t)0x4179, (q15_t)0xc004, (q15_t)0x416c, (q15_t)0xc004,
-    (q15_t)0x4160, (q15_t)0xc004, (q15_t)0x4153, (q15_t)0xc004, (q15_t)0x4147, (q15_t)0xc003, (q15_t)0x413a, (q15_t)0xc003,
-    (q15_t)0x412e, (q15_t)0xc003, (q15_t)0x4121, (q15_t)0xc003, (q15_t)0x4114, (q15_t)0xc002, (q15_t)0x4108, (q15_t)0xc002,
-    (q15_t)0x40fb, (q15_t)0xc002, (q15_t)0x40ef, (q15_t)0xc002, (q15_t)0x40e2, (q15_t)0xc002, (q15_t)0x40d6, (q15_t)0xc001,
-    (q15_t)0x40c9, (q15_t)0xc001, (q15_t)0x40bc, (q15_t)0xc001, (q15_t)0x40b0, (q15_t)0xc001, (q15_t)0x40a3, (q15_t)0xc001,
-    (q15_t)0x4097, (q15_t)0xc001, (q15_t)0x408a, (q15_t)0xc001, (q15_t)0x407e, (q15_t)0xc000, (q15_t)0x4071, (q15_t)0xc000,
-    (q15_t)0x4065, (q15_t)0xc000, (q15_t)0x4058, (q15_t)0xc000, (q15_t)0x404b, (q15_t)0xc000, (q15_t)0x403f, (q15_t)0xc000,
-    (q15_t)0x4032, (q15_t)0xc000, (q15_t)0x4026, (q15_t)0xc000, (q15_t)0x4019, (q15_t)0xc000, (q15_t)0x400d, (q15_t)0xc000,
-};
-
-/**
-* @} end of RealFFT_Table group
-*/
-
-/**
-* @addtogroup RealFFT
-* @{
-*/
-
-/**
-* @brief  Initialization function for the Q15 RFFT/RIFFT.
-* @param[in, out] *S             points to an instance of the Q15 RFFT/RIFFT structure.
-* @param[in]      fftLenReal     length of the FFT.
-* @param[in]      ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
-* @param[in]      bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return         The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
-*
-* \par Description:
-* \par
-* The parameter <code>fftLenReal</code>	Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192.
-* \par
-* The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed.
-* Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
-* \par
-* The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-* \par
-* This function also initializes Twiddle factor table.
-*/
 arm_status arm_rfft_init_q15(
     arm_rfft_instance_q15 * S,
     uint32_t fftLenReal,
@@ -2178,42 +89,60 @@
     /*  Initialization of coef modifier depending on the FFT length */
     switch (S->fftLenReal)
     {
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
     case 8192U:
         S->twidCoefRModifier = 1U;
         S->pCfft = &arm_cfft_sR_q15_len4096;
         break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
     case 4096U:
         S->twidCoefRModifier = 2U;
         S->pCfft = &arm_cfft_sR_q15_len2048;
         break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
     case 2048U:
         S->twidCoefRModifier = 4U;
         S->pCfft = &arm_cfft_sR_q15_len1024;
         break;
+#endif 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
     case 1024U:
         S->twidCoefRModifier = 8U;
         S->pCfft = &arm_cfft_sR_q15_len512;
         break;
+#endif 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
     case 512U:
         S->twidCoefRModifier = 16U;
         S->pCfft = &arm_cfft_sR_q15_len256;
         break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
     case 256U:
         S->twidCoefRModifier = 32U;
         S->pCfft = &arm_cfft_sR_q15_len128;
         break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
     case 128U:
         S->twidCoefRModifier = 64U;
         S->pCfft = &arm_cfft_sR_q15_len64;
         break;
+#endif 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
     case 64U:
         S->twidCoefRModifier = 128U;
         S->pCfft = &arm_cfft_sR_q15_len32;
         break;
+#endif 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
     case 32U:
         S->twidCoefRModifier = 256U;
         S->pCfft = &arm_cfft_sR_q15_len16;
         break;
+#endif
     default:
         /*  Reporting argument error if rfftSize is not valid value */
         status = ARM_MATH_ARGUMENT_ERROR;
@@ -2225,5 +154,5 @@
 }
 
 /**
-* @} end of RealFFT group
-*/
+  @} end of RealFFT group
+ */
diff --git a/DSP/Source/TransformFunctions/arm_rfft_init_q31.c b/DSP/Source/TransformFunctions/arm_rfft_init_q31.c
index 71ec4f5..a791c92 100644
--- a/DSP/Source/TransformFunctions/arm_rfft_init_q31.c
+++ b/DSP/Source/TransformFunctions/arm_rfft_init_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_rfft_init_q31.c
  * Description:  RFFT & RIFFT Q31 initialisation function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,4176 +30,38 @@
 #include "arm_common_tables.h"
 #include "arm_const_structs.h"
 
-/**
-* @ingroup RealFFT
-*/
-
-/**
- * @addtogroup RealFFT_Table Real FFT Tables
-* @{
-*/
-
-/**
-* \par
-* Generation fixed-point realCoefAQ31 array in Q31 format:
-* \par
-* n = 4096
-* <pre>for (i = 0; i < n; i++)
-* {
-*    pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
-*    pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-* }</pre>
-* \par
-* Convert to fixed point Q31 format
-*     round(pATable[i] * pow(2, 31))
-*/
-const q31_t realCoefAQ31[8192] = {
-    (q31_t)0x40000000, (q31_t)0xc0000000, (q31_t)0x3ff36f02, (q31_t)0xc000013c,
-    (q31_t)0x3fe6de05, (q31_t)0xc00004ef, (q31_t)0x3fda4d09, (q31_t)0xc0000b1a,
-    (q31_t)0x3fcdbc0f, (q31_t)0xc00013bd, (q31_t)0x3fc12b16, (q31_t)0xc0001ed8,
-    (q31_t)0x3fb49a1f, (q31_t)0xc0002c6a, (q31_t)0x3fa8092c, (q31_t)0xc0003c74,
-    (q31_t)0x3f9b783c, (q31_t)0xc0004ef5, (q31_t)0x3f8ee750, (q31_t)0xc00063ee,
-    (q31_t)0x3f825668, (q31_t)0xc0007b5f, (q31_t)0x3f75c585, (q31_t)0xc0009547,
-    (q31_t)0x3f6934a8, (q31_t)0xc000b1a7, (q31_t)0x3f5ca3d0, (q31_t)0xc000d07e,
-    (q31_t)0x3f5012fe, (q31_t)0xc000f1ce, (q31_t)0x3f438234, (q31_t)0xc0011594,
-    (q31_t)0x3f36f170, (q31_t)0xc0013bd3, (q31_t)0x3f2a60b4, (q31_t)0xc0016489,
-    (q31_t)0x3f1dd001, (q31_t)0xc0018fb6, (q31_t)0x3f113f56, (q31_t)0xc001bd5c,
-    (q31_t)0x3f04aeb5, (q31_t)0xc001ed78, (q31_t)0x3ef81e1d, (q31_t)0xc002200d,
-    (q31_t)0x3eeb8d8f, (q31_t)0xc0025519, (q31_t)0x3edefd0c, (q31_t)0xc0028c9c,
-    (q31_t)0x3ed26c94, (q31_t)0xc002c697, (q31_t)0x3ec5dc28, (q31_t)0xc003030a,
-    (q31_t)0x3eb94bc8, (q31_t)0xc00341f4, (q31_t)0x3eacbb74, (q31_t)0xc0038356,
-    (q31_t)0x3ea02b2e, (q31_t)0xc003c72f, (q31_t)0x3e939af5, (q31_t)0xc0040d80,
-    (q31_t)0x3e870aca, (q31_t)0xc0045648, (q31_t)0x3e7a7aae, (q31_t)0xc004a188,
-    (q31_t)0x3e6deaa1, (q31_t)0xc004ef3f, (q31_t)0x3e615aa3, (q31_t)0xc0053f6e,
-    (q31_t)0x3e54cab5, (q31_t)0xc0059214, (q31_t)0x3e483ad8, (q31_t)0xc005e731,
-    (q31_t)0x3e3bab0b, (q31_t)0xc0063ec6, (q31_t)0x3e2f1b50, (q31_t)0xc00698d3,
-    (q31_t)0x3e228ba7, (q31_t)0xc006f556, (q31_t)0x3e15fc11, (q31_t)0xc0075452,
-    (q31_t)0x3e096c8d, (q31_t)0xc007b5c4, (q31_t)0x3dfcdd1d, (q31_t)0xc00819ae,
-    (q31_t)0x3df04dc0, (q31_t)0xc008800f, (q31_t)0x3de3be78, (q31_t)0xc008e8e8,
-    (q31_t)0x3dd72f45, (q31_t)0xc0095438, (q31_t)0x3dcaa027, (q31_t)0xc009c1ff,
-    (q31_t)0x3dbe111e, (q31_t)0xc00a323d, (q31_t)0x3db1822c, (q31_t)0xc00aa4f3,
-    (q31_t)0x3da4f351, (q31_t)0xc00b1a20, (q31_t)0x3d98648d, (q31_t)0xc00b91c4,
-    (q31_t)0x3d8bd5e1, (q31_t)0xc00c0be0, (q31_t)0x3d7f474d, (q31_t)0xc00c8872,
-    (q31_t)0x3d72b8d2, (q31_t)0xc00d077c, (q31_t)0x3d662a70, (q31_t)0xc00d88fd,
-    (q31_t)0x3d599c28, (q31_t)0xc00e0cf5, (q31_t)0x3d4d0df9, (q31_t)0xc00e9364,
-    (q31_t)0x3d407fe6, (q31_t)0xc00f1c4a, (q31_t)0x3d33f1ed, (q31_t)0xc00fa7a8,
-    (q31_t)0x3d276410, (q31_t)0xc010357c, (q31_t)0x3d1ad650, (q31_t)0xc010c5c7,
-    (q31_t)0x3d0e48ab, (q31_t)0xc011588a, (q31_t)0x3d01bb24, (q31_t)0xc011edc3,
-    (q31_t)0x3cf52dbb, (q31_t)0xc0128574, (q31_t)0x3ce8a06f, (q31_t)0xc0131f9b,
-    (q31_t)0x3cdc1342, (q31_t)0xc013bc39, (q31_t)0x3ccf8634, (q31_t)0xc0145b4e,
-    (q31_t)0x3cc2f945, (q31_t)0xc014fcda, (q31_t)0x3cb66c77, (q31_t)0xc015a0dd,
-    (q31_t)0x3ca9dfc8, (q31_t)0xc0164757, (q31_t)0x3c9d533b, (q31_t)0xc016f047,
-    (q31_t)0x3c90c6cf, (q31_t)0xc0179bae, (q31_t)0x3c843a85, (q31_t)0xc018498c,
-    (q31_t)0x3c77ae5e, (q31_t)0xc018f9e1, (q31_t)0x3c6b2259, (q31_t)0xc019acac,
-    (q31_t)0x3c5e9678, (q31_t)0xc01a61ee, (q31_t)0x3c520aba, (q31_t)0xc01b19a7,
-    (q31_t)0x3c457f21, (q31_t)0xc01bd3d6, (q31_t)0x3c38f3ac, (q31_t)0xc01c907c,
-    (q31_t)0x3c2c685d, (q31_t)0xc01d4f99, (q31_t)0x3c1fdd34, (q31_t)0xc01e112b,
-    (q31_t)0x3c135231, (q31_t)0xc01ed535, (q31_t)0x3c06c754, (q31_t)0xc01f9bb5,
-    (q31_t)0x3bfa3c9f, (q31_t)0xc02064ab, (q31_t)0x3bedb212, (q31_t)0xc0213018,
-    (q31_t)0x3be127ac, (q31_t)0xc021fdfb, (q31_t)0x3bd49d70, (q31_t)0xc022ce54,
-    (q31_t)0x3bc8135c, (q31_t)0xc023a124, (q31_t)0x3bbb8973, (q31_t)0xc024766a,
-    (q31_t)0x3baeffb3, (q31_t)0xc0254e27, (q31_t)0x3ba2761e, (q31_t)0xc0262859,
-    (q31_t)0x3b95ecb4, (q31_t)0xc0270502, (q31_t)0x3b896375, (q31_t)0xc027e421,
-    (q31_t)0x3b7cda63, (q31_t)0xc028c5b6, (q31_t)0x3b70517d, (q31_t)0xc029a9c1,
-    (q31_t)0x3b63c8c4, (q31_t)0xc02a9042, (q31_t)0x3b574039, (q31_t)0xc02b7939,
-    (q31_t)0x3b4ab7db, (q31_t)0xc02c64a6, (q31_t)0x3b3e2fac, (q31_t)0xc02d5289,
-    (q31_t)0x3b31a7ac, (q31_t)0xc02e42e2, (q31_t)0x3b251fdc, (q31_t)0xc02f35b1,
-    (q31_t)0x3b18983b, (q31_t)0xc0302af5, (q31_t)0x3b0c10cb, (q31_t)0xc03122b0,
-    (q31_t)0x3aff898c, (q31_t)0xc0321ce0, (q31_t)0x3af3027e, (q31_t)0xc0331986,
-    (q31_t)0x3ae67ba2, (q31_t)0xc03418a2, (q31_t)0x3ad9f4f8, (q31_t)0xc0351a33,
-    (q31_t)0x3acd6e81, (q31_t)0xc0361e3a, (q31_t)0x3ac0e83d, (q31_t)0xc03724b6,
-    (q31_t)0x3ab4622d, (q31_t)0xc0382da8, (q31_t)0x3aa7dc52, (q31_t)0xc0393910,
-    (q31_t)0x3a9b56ab, (q31_t)0xc03a46ed, (q31_t)0x3a8ed139, (q31_t)0xc03b573f,
-    (q31_t)0x3a824bfd, (q31_t)0xc03c6a07, (q31_t)0x3a75c6f8, (q31_t)0xc03d7f44,
-    (q31_t)0x3a694229, (q31_t)0xc03e96f6, (q31_t)0x3a5cbd91, (q31_t)0xc03fb11d,
-    (q31_t)0x3a503930, (q31_t)0xc040cdba, (q31_t)0x3a43b508, (q31_t)0xc041eccc,
-    (q31_t)0x3a373119, (q31_t)0xc0430e53, (q31_t)0x3a2aad62, (q31_t)0xc044324f,
-    (q31_t)0x3a1e29e5, (q31_t)0xc04558c0, (q31_t)0x3a11a6a3, (q31_t)0xc04681a6,
-    (q31_t)0x3a05239a, (q31_t)0xc047ad01, (q31_t)0x39f8a0cd, (q31_t)0xc048dad1,
-    (q31_t)0x39ec1e3b, (q31_t)0xc04a0b16, (q31_t)0x39df9be6, (q31_t)0xc04b3dcf,
-    (q31_t)0x39d319cc, (q31_t)0xc04c72fe, (q31_t)0x39c697f0, (q31_t)0xc04daaa1,
-    (q31_t)0x39ba1651, (q31_t)0xc04ee4b8, (q31_t)0x39ad94f0, (q31_t)0xc0502145,
-    (q31_t)0x39a113cd, (q31_t)0xc0516045, (q31_t)0x399492ea, (q31_t)0xc052a1bb,
-    (q31_t)0x39881245, (q31_t)0xc053e5a5, (q31_t)0x397b91e1, (q31_t)0xc0552c03,
-    (q31_t)0x396f11bc, (q31_t)0xc05674d6, (q31_t)0x396291d9, (q31_t)0xc057c01d,
-    (q31_t)0x39561237, (q31_t)0xc0590dd8, (q31_t)0x394992d7, (q31_t)0xc05a5e07,
-    (q31_t)0x393d13b8, (q31_t)0xc05bb0ab, (q31_t)0x393094dd, (q31_t)0xc05d05c3,
-    (q31_t)0x39241645, (q31_t)0xc05e5d4e, (q31_t)0x391797f0, (q31_t)0xc05fb74e,
-    (q31_t)0x390b19e0, (q31_t)0xc06113c2, (q31_t)0x38fe9c15, (q31_t)0xc06272aa,
-    (q31_t)0x38f21e8e, (q31_t)0xc063d405, (q31_t)0x38e5a14d, (q31_t)0xc06537d4,
-    (q31_t)0x38d92452, (q31_t)0xc0669e18, (q31_t)0x38cca79e, (q31_t)0xc06806ce,
-    (q31_t)0x38c02b31, (q31_t)0xc06971f9, (q31_t)0x38b3af0c, (q31_t)0xc06adf97,
-    (q31_t)0x38a7332e, (q31_t)0xc06c4fa8, (q31_t)0x389ab799, (q31_t)0xc06dc22e,
-    (q31_t)0x388e3c4d, (q31_t)0xc06f3726, (q31_t)0x3881c14b, (q31_t)0xc070ae92,
-    (q31_t)0x38754692, (q31_t)0xc0722871, (q31_t)0x3868cc24, (q31_t)0xc073a4c3,
-    (q31_t)0x385c5201, (q31_t)0xc0752389, (q31_t)0x384fd829, (q31_t)0xc076a4c2,
-    (q31_t)0x38435e9d, (q31_t)0xc078286e, (q31_t)0x3836e55d, (q31_t)0xc079ae8c,
-    (q31_t)0x382a6c6a, (q31_t)0xc07b371e, (q31_t)0x381df3c5, (q31_t)0xc07cc223,
-    (q31_t)0x38117b6d, (q31_t)0xc07e4f9b, (q31_t)0x38050364, (q31_t)0xc07fdf85,
-    (q31_t)0x37f88ba9, (q31_t)0xc08171e2, (q31_t)0x37ec143e, (q31_t)0xc08306b2,
-    (q31_t)0x37df9d22, (q31_t)0xc0849df4, (q31_t)0x37d32657, (q31_t)0xc08637a9,
-    (q31_t)0x37c6afdc, (q31_t)0xc087d3d0, (q31_t)0x37ba39b3, (q31_t)0xc089726a,
-    (q31_t)0x37adc3db, (q31_t)0xc08b1376, (q31_t)0x37a14e55, (q31_t)0xc08cb6f5,
-    (q31_t)0x3794d922, (q31_t)0xc08e5ce5, (q31_t)0x37886442, (q31_t)0xc0900548,
-    (q31_t)0x377befb5, (q31_t)0xc091b01d, (q31_t)0x376f7b7d, (q31_t)0xc0935d64,
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-    (q31_t)0x3d72b8d2, (q31_t)0x3ff2f884, (q31_t)0x3d7f474d, (q31_t)0x3ff3778e,
-    (q31_t)0x3d8bd5e1, (q31_t)0x3ff3f420, (q31_t)0x3d98648d, (q31_t)0x3ff46e3c,
-    (q31_t)0x3da4f351, (q31_t)0x3ff4e5e0, (q31_t)0x3db1822c, (q31_t)0x3ff55b0d,
-    (q31_t)0x3dbe111e, (q31_t)0x3ff5cdc3, (q31_t)0x3dcaa027, (q31_t)0x3ff63e01,
-    (q31_t)0x3dd72f45, (q31_t)0x3ff6abc8, (q31_t)0x3de3be78, (q31_t)0x3ff71718,
-    (q31_t)0x3df04dc0, (q31_t)0x3ff77ff1, (q31_t)0x3dfcdd1d, (q31_t)0x3ff7e652,
-    (q31_t)0x3e096c8d, (q31_t)0x3ff84a3c, (q31_t)0x3e15fc11, (q31_t)0x3ff8abae,
-    (q31_t)0x3e228ba7, (q31_t)0x3ff90aaa, (q31_t)0x3e2f1b50, (q31_t)0x3ff9672d,
-    (q31_t)0x3e3bab0b, (q31_t)0x3ff9c13a, (q31_t)0x3e483ad8, (q31_t)0x3ffa18cf,
-    (q31_t)0x3e54cab5, (q31_t)0x3ffa6dec, (q31_t)0x3e615aa3, (q31_t)0x3ffac092,
-    (q31_t)0x3e6deaa1, (q31_t)0x3ffb10c1, (q31_t)0x3e7a7aae, (q31_t)0x3ffb5e78,
-    (q31_t)0x3e870aca, (q31_t)0x3ffba9b8, (q31_t)0x3e939af5, (q31_t)0x3ffbf280,
-    (q31_t)0x3ea02b2e, (q31_t)0x3ffc38d1, (q31_t)0x3eacbb74, (q31_t)0x3ffc7caa,
-    (q31_t)0x3eb94bc8, (q31_t)0x3ffcbe0c, (q31_t)0x3ec5dc28, (q31_t)0x3ffcfcf6,
-    (q31_t)0x3ed26c94, (q31_t)0x3ffd3969, (q31_t)0x3edefd0c, (q31_t)0x3ffd7364,
-    (q31_t)0x3eeb8d8f, (q31_t)0x3ffdaae7, (q31_t)0x3ef81e1d, (q31_t)0x3ffddff3,
-    (q31_t)0x3f04aeb5, (q31_t)0x3ffe1288, (q31_t)0x3f113f56, (q31_t)0x3ffe42a4,
-    (q31_t)0x3f1dd001, (q31_t)0x3ffe704a, (q31_t)0x3f2a60b4, (q31_t)0x3ffe9b77,
-    (q31_t)0x3f36f170, (q31_t)0x3ffec42d, (q31_t)0x3f438234, (q31_t)0x3ffeea6c,
-    (q31_t)0x3f5012fe, (q31_t)0x3fff0e32, (q31_t)0x3f5ca3d0, (q31_t)0x3fff2f82,
-    (q31_t)0x3f6934a8, (q31_t)0x3fff4e59, (q31_t)0x3f75c585, (q31_t)0x3fff6ab9,
-    (q31_t)0x3f825668, (q31_t)0x3fff84a1, (q31_t)0x3f8ee750, (q31_t)0x3fff9c12,
-    (q31_t)0x3f9b783c, (q31_t)0x3fffb10b, (q31_t)0x3fa8092c, (q31_t)0x3fffc38c,
-    (q31_t)0x3fb49a1f, (q31_t)0x3fffd396, (q31_t)0x3fc12b16, (q31_t)0x3fffe128,
-    (q31_t)0x3fcdbc0f, (q31_t)0x3fffec43, (q31_t)0x3fda4d09, (q31_t)0x3ffff4e6,
-    (q31_t)0x3fe6de05, (q31_t)0x3ffffb11, (q31_t)0x3ff36f02, (q31_t)0x3ffffec4,
-};
 
 
 /**
-* \par
-* Generation of realCoefBQ31 array:
-* \par
-*  n = 4096
-* <pre>for (i = 0; i < n; i++)
-* {
-*    pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
-*    pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-* } </pre>
-* \par
-* Convert to fixed point Q31 format
-*     round(pBTable[i] * pow(2, 31))
-*
-*/
-
-const q31_t realCoefBQ31[8192] = {
-    (q31_t)0x40000000, (q31_t)0x40000000, (q31_t)0x400c90fe, (q31_t)0x3ffffec4,
-    (q31_t)0x401921fb, (q31_t)0x3ffffb11, (q31_t)0x4025b2f7, (q31_t)0x3ffff4e6,
-    (q31_t)0x403243f1, (q31_t)0x3fffec43, (q31_t)0x403ed4ea, (q31_t)0x3fffe128,
-    (q31_t)0x404b65e1, (q31_t)0x3fffd396, (q31_t)0x4057f6d4, (q31_t)0x3fffc38c,
-    (q31_t)0x406487c4, (q31_t)0x3fffb10b, (q31_t)0x407118b0, (q31_t)0x3fff9c12,
-    (q31_t)0x407da998, (q31_t)0x3fff84a1, (q31_t)0x408a3a7b, (q31_t)0x3fff6ab9,
-    (q31_t)0x4096cb58, (q31_t)0x3fff4e59, (q31_t)0x40a35c30, (q31_t)0x3fff2f82,
-    (q31_t)0x40afed02, (q31_t)0x3fff0e32, (q31_t)0x40bc7dcc, (q31_t)0x3ffeea6c,
-    (q31_t)0x40c90e90, (q31_t)0x3ffec42d, (q31_t)0x40d59f4c, (q31_t)0x3ffe9b77,
-    (q31_t)0x40e22fff, (q31_t)0x3ffe704a, (q31_t)0x40eec0aa, (q31_t)0x3ffe42a4,
-    (q31_t)0x40fb514b, (q31_t)0x3ffe1288, (q31_t)0x4107e1e3, (q31_t)0x3ffddff3,
-    (q31_t)0x41147271, (q31_t)0x3ffdaae7, (q31_t)0x412102f4, (q31_t)0x3ffd7364,
-    (q31_t)0x412d936c, (q31_t)0x3ffd3969, (q31_t)0x413a23d8, (q31_t)0x3ffcfcf6,
-    (q31_t)0x4146b438, (q31_t)0x3ffcbe0c, (q31_t)0x4153448c, (q31_t)0x3ffc7caa,
-    (q31_t)0x415fd4d2, (q31_t)0x3ffc38d1, (q31_t)0x416c650b, (q31_t)0x3ffbf280,
-    (q31_t)0x4178f536, (q31_t)0x3ffba9b8, (q31_t)0x41858552, (q31_t)0x3ffb5e78,
-    (q31_t)0x4192155f, (q31_t)0x3ffb10c1, (q31_t)0x419ea55d, (q31_t)0x3ffac092,
-    (q31_t)0x41ab354b, (q31_t)0x3ffa6dec, (q31_t)0x41b7c528, (q31_t)0x3ffa18cf,
-    (q31_t)0x41c454f5, (q31_t)0x3ff9c13a, (q31_t)0x41d0e4b0, (q31_t)0x3ff9672d,
-    (q31_t)0x41dd7459, (q31_t)0x3ff90aaa, (q31_t)0x41ea03ef, (q31_t)0x3ff8abae,
-    (q31_t)0x41f69373, (q31_t)0x3ff84a3c, (q31_t)0x420322e3, (q31_t)0x3ff7e652,
-    (q31_t)0x420fb240, (q31_t)0x3ff77ff1, (q31_t)0x421c4188, (q31_t)0x3ff71718,
-    (q31_t)0x4228d0bb, (q31_t)0x3ff6abc8, (q31_t)0x42355fd9, (q31_t)0x3ff63e01,
-    (q31_t)0x4241eee2, (q31_t)0x3ff5cdc3, (q31_t)0x424e7dd4, (q31_t)0x3ff55b0d,
-    (q31_t)0x425b0caf, (q31_t)0x3ff4e5e0, (q31_t)0x42679b73, (q31_t)0x3ff46e3c,
-    (q31_t)0x42742a1f, (q31_t)0x3ff3f420, (q31_t)0x4280b8b3, (q31_t)0x3ff3778e,
-    (q31_t)0x428d472e, (q31_t)0x3ff2f884, (q31_t)0x4299d590, (q31_t)0x3ff27703,
-    (q31_t)0x42a663d8, (q31_t)0x3ff1f30b, (q31_t)0x42b2f207, (q31_t)0x3ff16c9c,
-    (q31_t)0x42bf801a, (q31_t)0x3ff0e3b6, (q31_t)0x42cc0e13, (q31_t)0x3ff05858,
-    (q31_t)0x42d89bf0, (q31_t)0x3fefca84, (q31_t)0x42e529b0, (q31_t)0x3fef3a39,
-    (q31_t)0x42f1b755, (q31_t)0x3feea776, (q31_t)0x42fe44dc, (q31_t)0x3fee123d,
-    (q31_t)0x430ad245, (q31_t)0x3fed7a8c, (q31_t)0x43175f91, (q31_t)0x3fece065,
-    (q31_t)0x4323ecbe, (q31_t)0x3fec43c7, (q31_t)0x433079cc, (q31_t)0x3feba4b2,
-    (q31_t)0x433d06bb, (q31_t)0x3feb0326, (q31_t)0x43499389, (q31_t)0x3fea5f23,
-    (q31_t)0x43562038, (q31_t)0x3fe9b8a9, (q31_t)0x4362acc5, (q31_t)0x3fe90fb9,
-    (q31_t)0x436f3931, (q31_t)0x3fe86452, (q31_t)0x437bc57b, (q31_t)0x3fe7b674,
-    (q31_t)0x438851a2, (q31_t)0x3fe7061f, (q31_t)0x4394dda7, (q31_t)0x3fe65354,
-    (q31_t)0x43a16988, (q31_t)0x3fe59e12, (q31_t)0x43adf546, (q31_t)0x3fe4e659,
-    (q31_t)0x43ba80df, (q31_t)0x3fe42c2a, (q31_t)0x43c70c54, (q31_t)0x3fe36f84,
-    (q31_t)0x43d397a3, (q31_t)0x3fe2b067, (q31_t)0x43e022cc, (q31_t)0x3fe1eed5,
-    (q31_t)0x43ecadcf, (q31_t)0x3fe12acb, (q31_t)0x43f938ac, (q31_t)0x3fe0644b,
-    (q31_t)0x4405c361, (q31_t)0x3fdf9b55, (q31_t)0x44124dee, (q31_t)0x3fdecfe8,
-    (q31_t)0x441ed854, (q31_t)0x3fde0205, (q31_t)0x442b6290, (q31_t)0x3fdd31ac,
-    (q31_t)0x4437eca4, (q31_t)0x3fdc5edc, (q31_t)0x4444768d, (q31_t)0x3fdb8996,
-    (q31_t)0x4451004d, (q31_t)0x3fdab1d9, (q31_t)0x445d89e2, (q31_t)0x3fd9d7a7,
-    (q31_t)0x446a134c, (q31_t)0x3fd8fafe, (q31_t)0x44769c8b, (q31_t)0x3fd81bdf,
-    (q31_t)0x4483259d, (q31_t)0x3fd73a4a, (q31_t)0x448fae83, (q31_t)0x3fd6563f,
-    (q31_t)0x449c373c, (q31_t)0x3fd56fbe, (q31_t)0x44a8bfc7, (q31_t)0x3fd486c7,
-    (q31_t)0x44b54825, (q31_t)0x3fd39b5a, (q31_t)0x44c1d054, (q31_t)0x3fd2ad77,
-    (q31_t)0x44ce5854, (q31_t)0x3fd1bd1e, (q31_t)0x44dae024, (q31_t)0x3fd0ca4f,
-    (q31_t)0x44e767c5, (q31_t)0x3fcfd50b, (q31_t)0x44f3ef35, (q31_t)0x3fcedd50,
-    (q31_t)0x45007674, (q31_t)0x3fcde320, (q31_t)0x450cfd82, (q31_t)0x3fcce67a,
-    (q31_t)0x4519845e, (q31_t)0x3fcbe75e, (q31_t)0x45260b08, (q31_t)0x3fcae5cd,
-    (q31_t)0x4532917f, (q31_t)0x3fc9e1c6, (q31_t)0x453f17c3, (q31_t)0x3fc8db4a,
-    (q31_t)0x454b9dd3, (q31_t)0x3fc7d258, (q31_t)0x455823ae, (q31_t)0x3fc6c6f0,
-    (q31_t)0x4564a955, (q31_t)0x3fc5b913, (q31_t)0x45712ec7, (q31_t)0x3fc4a8c1,
-    (q31_t)0x457db403, (q31_t)0x3fc395f9, (q31_t)0x458a3908, (q31_t)0x3fc280bc,
-    (q31_t)0x4596bdd7, (q31_t)0x3fc1690a, (q31_t)0x45a3426f, (q31_t)0x3fc04ee3,
-    (q31_t)0x45afc6d0, (q31_t)0x3fbf3246, (q31_t)0x45bc4af8, (q31_t)0x3fbe1334,
-    (q31_t)0x45c8cee7, (q31_t)0x3fbcf1ad, (q31_t)0x45d5529e, (q31_t)0x3fbbcdb1,
-    (q31_t)0x45e1d61b, (q31_t)0x3fbaa740, (q31_t)0x45ee595d, (q31_t)0x3fb97e5a,
-    (q31_t)0x45fadc66, (q31_t)0x3fb852ff, (q31_t)0x46075f33, (q31_t)0x3fb7252f,
-    (q31_t)0x4613e1c5, (q31_t)0x3fb5f4ea, (q31_t)0x4620641a, (q31_t)0x3fb4c231,
-    (q31_t)0x462ce634, (q31_t)0x3fb38d02, (q31_t)0x46396810, (q31_t)0x3fb2555f,
-    (q31_t)0x4645e9af, (q31_t)0x3fb11b48, (q31_t)0x46526b10, (q31_t)0x3fafdebb,
-    (q31_t)0x465eec33, (q31_t)0x3fae9fbb, (q31_t)0x466b6d16, (q31_t)0x3fad5e45,
-    (q31_t)0x4677edbb, (q31_t)0x3fac1a5b, (q31_t)0x46846e1f, (q31_t)0x3faad3fd,
-    (q31_t)0x4690ee44, (q31_t)0x3fa98b2a, (q31_t)0x469d6e27, (q31_t)0x3fa83fe3,
-    (q31_t)0x46a9edc9, (q31_t)0x3fa6f228, (q31_t)0x46b66d29, (q31_t)0x3fa5a1f9,
-    (q31_t)0x46c2ec48, (q31_t)0x3fa44f55, (q31_t)0x46cf6b23, (q31_t)0x3fa2fa3d,
-    (q31_t)0x46dbe9bb, (q31_t)0x3fa1a2b2, (q31_t)0x46e86810, (q31_t)0x3fa048b2,
-    (q31_t)0x46f4e620, (q31_t)0x3f9eec3e, (q31_t)0x470163eb, (q31_t)0x3f9d8d56,
-    (q31_t)0x470de172, (q31_t)0x3f9c2bfb, (q31_t)0x471a5eb3, (q31_t)0x3f9ac82c,
-    (q31_t)0x4726dbae, (q31_t)0x3f9961e8, (q31_t)0x47335862, (q31_t)0x3f97f932,
-    (q31_t)0x473fd4cf, (q31_t)0x3f968e07, (q31_t)0x474c50f4, (q31_t)0x3f952069,
-    (q31_t)0x4758ccd2, (q31_t)0x3f93b058, (q31_t)0x47654867, (q31_t)0x3f923dd2,
-    (q31_t)0x4771c3b3, (q31_t)0x3f90c8da, (q31_t)0x477e3eb5, (q31_t)0x3f8f516e,
-    (q31_t)0x478ab96e, (q31_t)0x3f8dd78f, (q31_t)0x479733dc, (q31_t)0x3f8c5b3d,
-    (q31_t)0x47a3adff, (q31_t)0x3f8adc77, (q31_t)0x47b027d7, (q31_t)0x3f895b3e,
-    (q31_t)0x47bca163, (q31_t)0x3f87d792, (q31_t)0x47c91aa3, (q31_t)0x3f865174,
-    (q31_t)0x47d59396, (q31_t)0x3f84c8e2, (q31_t)0x47e20c3b, (q31_t)0x3f833ddd,
-    (q31_t)0x47ee8493, (q31_t)0x3f81b065, (q31_t)0x47fafc9c, (q31_t)0x3f80207b,
-    (q31_t)0x48077457, (q31_t)0x3f7e8e1e, (q31_t)0x4813ebc2, (q31_t)0x3f7cf94e,
-    (q31_t)0x482062de, (q31_t)0x3f7b620c, (q31_t)0x482cd9a9, (q31_t)0x3f79c857,
-    (q31_t)0x48395024, (q31_t)0x3f782c30, (q31_t)0x4845c64d, (q31_t)0x3f768d96,
-    (q31_t)0x48523c25, (q31_t)0x3f74ec8a, (q31_t)0x485eb1ab, (q31_t)0x3f73490b,
-    (q31_t)0x486b26de, (q31_t)0x3f71a31b, (q31_t)0x48779bbe, (q31_t)0x3f6ffab8,
-    (q31_t)0x4884104b, (q31_t)0x3f6e4fe3, (q31_t)0x48908483, (q31_t)0x3f6ca29c,
-    (q31_t)0x489cf867, (q31_t)0x3f6af2e3, (q31_t)0x48a96bf6, (q31_t)0x3f6940b8,
-    (q31_t)0x48b5df30, (q31_t)0x3f678c1c, (q31_t)0x48c25213, (q31_t)0x3f65d50d,
-    (q31_t)0x48cec4a0, (q31_t)0x3f641b8d, (q31_t)0x48db36d6, (q31_t)0x3f625f9b,
-    (q31_t)0x48e7a8b5, (q31_t)0x3f60a138, (q31_t)0x48f41a3c, (q31_t)0x3f5ee063,
-    (q31_t)0x49008b6a, (q31_t)0x3f5d1d1d, (q31_t)0x490cfc40, (q31_t)0x3f5b5765,
-    (q31_t)0x49196cbc, (q31_t)0x3f598f3c, (q31_t)0x4925dcdf, (q31_t)0x3f57c4a2,
-    (q31_t)0x49324ca7, (q31_t)0x3f55f796, (q31_t)0x493ebc14, (q31_t)0x3f54281a,
-    (q31_t)0x494b2b27, (q31_t)0x3f52562c, (q31_t)0x495799dd, (q31_t)0x3f5081cd,
-    (q31_t)0x49640837, (q31_t)0x3f4eaafe, (q31_t)0x49707635, (q31_t)0x3f4cd1be,
-    (q31_t)0x497ce3d5, (q31_t)0x3f4af60d, (q31_t)0x49895118, (q31_t)0x3f4917eb,
-    (q31_t)0x4995bdfd, (q31_t)0x3f473759, (q31_t)0x49a22a83, (q31_t)0x3f455456,
-    (q31_t)0x49ae96aa, (q31_t)0x3f436ee3, (q31_t)0x49bb0271, (q31_t)0x3f4186ff,
-    (q31_t)0x49c76dd8, (q31_t)0x3f3f9cab, (q31_t)0x49d3d8df, (q31_t)0x3f3dafe7,
-    (q31_t)0x49e04385, (q31_t)0x3f3bc0b3, (q31_t)0x49ecadc9, (q31_t)0x3f39cf0e,
-    (q31_t)0x49f917ac, (q31_t)0x3f37dafa, (q31_t)0x4a05812c, (q31_t)0x3f35e476,
-    (q31_t)0x4a11ea49, (q31_t)0x3f33eb81, (q31_t)0x4a1e5303, (q31_t)0x3f31f01d,
-    (q31_t)0x4a2abb59, (q31_t)0x3f2ff24a, (q31_t)0x4a37234a, (q31_t)0x3f2df206,
-    (q31_t)0x4a438ad7, (q31_t)0x3f2bef53, (q31_t)0x4a4ff1fe, (q31_t)0x3f29ea31,
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-    (q31_t)0x45007674, (q31_t)0xc0321ce0, (q31_t)0x44f3ef35, (q31_t)0xc03122b0,
-    (q31_t)0x44e767c5, (q31_t)0xc0302af5, (q31_t)0x44dae024, (q31_t)0xc02f35b1,
-    (q31_t)0x44ce5854, (q31_t)0xc02e42e2, (q31_t)0x44c1d054, (q31_t)0xc02d5289,
-    (q31_t)0x44b54825, (q31_t)0xc02c64a6, (q31_t)0x44a8bfc7, (q31_t)0xc02b7939,
-    (q31_t)0x449c373c, (q31_t)0xc02a9042, (q31_t)0x448fae83, (q31_t)0xc029a9c1,
-    (q31_t)0x4483259d, (q31_t)0xc028c5b6, (q31_t)0x44769c8b, (q31_t)0xc027e421,
-    (q31_t)0x446a134c, (q31_t)0xc0270502, (q31_t)0x445d89e2, (q31_t)0xc0262859,
-    (q31_t)0x4451004d, (q31_t)0xc0254e27, (q31_t)0x4444768d, (q31_t)0xc024766a,
-    (q31_t)0x4437eca4, (q31_t)0xc023a124, (q31_t)0x442b6290, (q31_t)0xc022ce54,
-    (q31_t)0x441ed854, (q31_t)0xc021fdfb, (q31_t)0x44124dee, (q31_t)0xc0213018,
-    (q31_t)0x4405c361, (q31_t)0xc02064ab, (q31_t)0x43f938ac, (q31_t)0xc01f9bb5,
-    (q31_t)0x43ecadcf, (q31_t)0xc01ed535, (q31_t)0x43e022cc, (q31_t)0xc01e112b,
-    (q31_t)0x43d397a3, (q31_t)0xc01d4f99, (q31_t)0x43c70c54, (q31_t)0xc01c907c,
-    (q31_t)0x43ba80df, (q31_t)0xc01bd3d6, (q31_t)0x43adf546, (q31_t)0xc01b19a7,
-    (q31_t)0x43a16988, (q31_t)0xc01a61ee, (q31_t)0x4394dda7, (q31_t)0xc019acac,
-    (q31_t)0x438851a2, (q31_t)0xc018f9e1, (q31_t)0x437bc57b, (q31_t)0xc018498c,
-    (q31_t)0x436f3931, (q31_t)0xc0179bae, (q31_t)0x4362acc5, (q31_t)0xc016f047,
-    (q31_t)0x43562038, (q31_t)0xc0164757, (q31_t)0x43499389, (q31_t)0xc015a0dd,
-    (q31_t)0x433d06bb, (q31_t)0xc014fcda, (q31_t)0x433079cc, (q31_t)0xc0145b4e,
-    (q31_t)0x4323ecbe, (q31_t)0xc013bc39, (q31_t)0x43175f91, (q31_t)0xc0131f9b,
-    (q31_t)0x430ad245, (q31_t)0xc0128574, (q31_t)0x42fe44dc, (q31_t)0xc011edc3,
-    (q31_t)0x42f1b755, (q31_t)0xc011588a, (q31_t)0x42e529b0, (q31_t)0xc010c5c7,
-    (q31_t)0x42d89bf0, (q31_t)0xc010357c, (q31_t)0x42cc0e13, (q31_t)0xc00fa7a8,
-    (q31_t)0x42bf801a, (q31_t)0xc00f1c4a, (q31_t)0x42b2f207, (q31_t)0xc00e9364,
-    (q31_t)0x42a663d8, (q31_t)0xc00e0cf5, (q31_t)0x4299d590, (q31_t)0xc00d88fd,
-    (q31_t)0x428d472e, (q31_t)0xc00d077c, (q31_t)0x4280b8b3, (q31_t)0xc00c8872,
-    (q31_t)0x42742a1f, (q31_t)0xc00c0be0, (q31_t)0x42679b73, (q31_t)0xc00b91c4,
-    (q31_t)0x425b0caf, (q31_t)0xc00b1a20, (q31_t)0x424e7dd4, (q31_t)0xc00aa4f3,
-    (q31_t)0x4241eee2, (q31_t)0xc00a323d, (q31_t)0x42355fd9, (q31_t)0xc009c1ff,
-    (q31_t)0x4228d0bb, (q31_t)0xc0095438, (q31_t)0x421c4188, (q31_t)0xc008e8e8,
-    (q31_t)0x420fb240, (q31_t)0xc008800f, (q31_t)0x420322e3, (q31_t)0xc00819ae,
-    (q31_t)0x41f69373, (q31_t)0xc007b5c4, (q31_t)0x41ea03ef, (q31_t)0xc0075452,
-    (q31_t)0x41dd7459, (q31_t)0xc006f556, (q31_t)0x41d0e4b0, (q31_t)0xc00698d3,
-    (q31_t)0x41c454f5, (q31_t)0xc0063ec6, (q31_t)0x41b7c528, (q31_t)0xc005e731,
-    (q31_t)0x41ab354b, (q31_t)0xc0059214, (q31_t)0x419ea55d, (q31_t)0xc0053f6e,
-    (q31_t)0x4192155f, (q31_t)0xc004ef3f, (q31_t)0x41858552, (q31_t)0xc004a188,
-    (q31_t)0x4178f536, (q31_t)0xc0045648, (q31_t)0x416c650b, (q31_t)0xc0040d80,
-    (q31_t)0x415fd4d2, (q31_t)0xc003c72f, (q31_t)0x4153448c, (q31_t)0xc0038356,
-    (q31_t)0x4146b438, (q31_t)0xc00341f4, (q31_t)0x413a23d8, (q31_t)0xc003030a,
-    (q31_t)0x412d936c, (q31_t)0xc002c697, (q31_t)0x412102f4, (q31_t)0xc0028c9c,
-    (q31_t)0x41147271, (q31_t)0xc0025519, (q31_t)0x4107e1e3, (q31_t)0xc002200d,
-    (q31_t)0x40fb514b, (q31_t)0xc001ed78, (q31_t)0x40eec0aa, (q31_t)0xc001bd5c,
-    (q31_t)0x40e22fff, (q31_t)0xc0018fb6, (q31_t)0x40d59f4c, (q31_t)0xc0016489,
-    (q31_t)0x40c90e90, (q31_t)0xc0013bd3, (q31_t)0x40bc7dcc, (q31_t)0xc0011594,
-    (q31_t)0x40afed02, (q31_t)0xc000f1ce, (q31_t)0x40a35c30, (q31_t)0xc000d07e,
-    (q31_t)0x4096cb58, (q31_t)0xc000b1a7, (q31_t)0x408a3a7b, (q31_t)0xc0009547,
-    (q31_t)0x407da998, (q31_t)0xc0007b5f, (q31_t)0x407118b0, (q31_t)0xc00063ee,
-    (q31_t)0x406487c4, (q31_t)0xc0004ef5, (q31_t)0x4057f6d4, (q31_t)0xc0003c74,
-    (q31_t)0x404b65e1, (q31_t)0xc0002c6a, (q31_t)0x403ed4ea, (q31_t)0xc0001ed8,
-    (q31_t)0x403243f1, (q31_t)0xc00013bd, (q31_t)0x4025b2f7, (q31_t)0xc0000b1a,
-    (q31_t)0x401921fb, (q31_t)0xc00004ef, (q31_t)0x400c90fe, (q31_t)0xc000013c,
-};
+  @addtogroup RealFFT
+  @{
+ */
 
 /**
-* @} end of RealFFT_Table group
-*/
+  @brief         Initialization function for the Q31 RFFT/RIFFT.
+  @param[in,out] S              points to an instance of the Q31 RFFT/RIFFT structure
+  @param[in]     fftLenReal     length of the FFT
+  @param[in]     ifftFlagR      flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLenReal</code> is not a supported length
 
-/**
-* @addtogroup RealFFT
-* @{
-*/
-
-/**
-* @brief  Initialization function for the Q31 RFFT/RIFFT.
-* @param[in, out] *S             points to an instance of the Q31 RFFT/RIFFT structure.
-* @param[in]      fftLenReal     length of the FFT.
-* @param[in]      ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
-* @param[in]      bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-* @return         The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
-*
-* \par Description:
-* \par
-* The parameter <code>fftLenReal</code>	Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192.
-* \par
-* The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed.
-* Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
-* \par
-* The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-* \par    7
-* This function also initializes Twiddle factor table.
+  @par           Details
+                   The parameter <code>fftLenReal</code> specifies length of RFFT/RIFFT Process.
+                   Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192.
+  @par
+                   The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
+  @par
+                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   This function also initializes Twiddle factor table.
 */
 
 arm_status arm_rfft_init_q31(
@@ -4229,42 +91,60 @@
     /*  Initialization of coef modifier depending on the FFT length */
     switch (S->fftLenReal)
     {
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
     case 8192U:
         S->twidCoefRModifier = 1U;
         S->pCfft = &arm_cfft_sR_q31_len4096;
         break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
     case 4096U:
         S->twidCoefRModifier = 2U;
         S->pCfft = &arm_cfft_sR_q31_len2048;
         break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
     case 2048U:
         S->twidCoefRModifier = 4U;
         S->pCfft = &arm_cfft_sR_q31_len1024;
         break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
     case 1024U:
         S->twidCoefRModifier = 8U;
         S->pCfft = &arm_cfft_sR_q31_len512;
         break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
     case 512U:
         S->twidCoefRModifier = 16U;
         S->pCfft = &arm_cfft_sR_q31_len256;
         break;
+#endif 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
     case 256U:
         S->twidCoefRModifier = 32U;
         S->pCfft = &arm_cfft_sR_q31_len128;
         break;
+#endif 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
     case 128U:
         S->twidCoefRModifier = 64U;
         S->pCfft = &arm_cfft_sR_q31_len64;
         break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
     case 64U:
         S->twidCoefRModifier = 128U;
         S->pCfft = &arm_cfft_sR_q31_len32;
         break;
+#endif 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
     case 32U:
         S->twidCoefRModifier = 256U;
         S->pCfft = &arm_cfft_sR_q31_len16;
         break;
+#endif
     default:
         /*  Reporting argument error if rfftSize is not valid value */
         status = ARM_MATH_ARGUMENT_ERROR;
@@ -4276,5 +156,5 @@
 }
 
 /**
-* @} end of RealFFT group
-*/
+  @} end of RealFFT group
+ */
diff --git a/DSP/Source/TransformFunctions/arm_rfft_q15.c b/DSP/Source/TransformFunctions/arm_rfft_q15.c
index f85cf30..fdc9bab 100644
--- a/DSP/Source/TransformFunctions/arm_rfft_q15.c
+++ b/DSP/Source/TransformFunctions/arm_rfft_q15.c
@@ -3,13 +3,13 @@
  * Title:        arm_rfft_q15.c
  * Description:  RFFT & RIFFT Q15 process function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -33,173 +33,161 @@
  * -------------------------------------------------------------------- */
 
 void arm_split_rfft_q15(
-    q15_t * pSrc,
-    uint32_t fftLen,
-    q15_t * pATable,
-    q15_t * pBTable,
-    q15_t * pDst,
-    uint32_t modifier);
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pATable,
+  const q15_t * pBTable,
+        q15_t * pDst,
+        uint32_t modifier);
 
 void arm_split_rifft_q15(
-    q15_t * pSrc,
-    uint32_t fftLen,
-    q15_t * pATable,
-    q15_t * pBTable,
-    q15_t * pDst,
-    uint32_t modifier);
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pATable,
+  const q15_t * pBTable,
+        q15_t * pDst,
+        uint32_t modifier);
 
 /**
-* @addtogroup RealFFT
-* @{
-*/
+  @addtogroup RealFFT
+  @{
+ */
 
 /**
-* @brief Processing function for the Q15 RFFT/RIFFT.
-* @param[in]  *S    points to an instance of the Q15 RFFT/RIFFT structure.
-* @param[in]  *pSrc points to the input buffer.
-* @param[out] *pDst points to the output buffer.
-* @return none.
-*
-* \par Input an output formats:
-* \par
-* Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
-* Hence the output format is different for different RFFT sizes.
-* The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:
-* \par
-* \image html RFFTQ15.gif "Input and Output Formats for Q15 RFFT"
-* \par
-* \image html RIFFTQ15.gif "Input and Output Formats for Q15 RIFFT"
-*/
+  @brief         Processing function for the Q15 RFFT/RIFFT.
+  @param[in]     S     points to an instance of the Q15 RFFT/RIFFT structure
+  @param[in]     pSrc  points to input buffer
+  @param[out]    pDst  points to output buffer
+  @return        none
+
+  @par           Input an output formats
+                   Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
+                   Hence the output format is different for different RFFT sizes.
+                   The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:
+  @par
+                   \image html RFFTQ15.gif "Input and Output Formats for Q15 RFFT"
+  @par
+                   \image html RIFFTQ15.gif "Input and Output Formats for Q15 RIFFT"
+ */
 
 void arm_rfft_q15(
-    const arm_rfft_instance_q15 * S,
-    q15_t * pSrc,
-    q15_t * pDst)
+  const arm_rfft_instance_q15 * S,
+        q15_t * pSrc,
+        q15_t * pDst)
 {
-    const arm_cfft_instance_q15 *S_CFFT = S->pCfft;
-    uint32_t i;
-    uint32_t L2 = S->fftLenReal >> 1;
+  const arm_cfft_instance_q15 *S_CFFT = S->pCfft;
+        uint32_t L2 = S->fftLenReal >> 1U;
+        uint32_t i;
 
-    /* Calculation of RIFFT of input */
-    if (S->ifftFlagR == 1U)
-    {
-        /*  Real IFFT core process */
-        arm_split_rifft_q15(pSrc, L2, S->pTwiddleAReal,
-                            S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+  /* Calculation of RIFFT of input */
+  if (S->ifftFlagR == 1U)
+  {
+     /*  Real IFFT core process */
+     arm_split_rifft_q15 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
 
-        /* Complex IFFT process */
-        arm_cfft_q15(S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR);
+     /* Complex IFFT process */
+     arm_cfft_q15 (S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR);
 
-        for(i=0;i<S->fftLenReal;i++)
-        {
-            pDst[i] = pDst[i] << 1;
-        }
-    }
-    else
-    {
-        /* Calculation of RFFT of input */
+     for(i = 0; i < S->fftLenReal; i++)
+     {
+        pDst[i] = pDst[i] << 1U;
+     }
+  }
+  else
+  {
+     /* Calculation of RFFT of input */
 
-        /* Complex FFT process */
-        arm_cfft_q15(S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR);
+     /* Complex FFT process */
+     arm_cfft_q15 (S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR);
 
-        /*  Real FFT core process */
-        arm_split_rfft_q15(pSrc, L2, S->pTwiddleAReal,
-                            S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-    }
+     /*  Real FFT core process */
+     arm_split_rfft_q15 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+  }
+
 }
 
 /**
-* @} end of RealFFT group
-*/
+  @} end of RealFFT group
+ */
 
 /**
-* @brief  Core Real FFT process
-* @param  *pSrc 				points to the input buffer.
-* @param  fftLen  				length of FFT.
-* @param  *pATable 			points to the A twiddle Coef buffer.
-* @param  *pBTable 			points to the B twiddle Coef buffer.
-* @param  *pDst 				points to the output buffer.
-* @param  modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-* @return none.
-* The function implements a Real FFT
-*/
+  @brief         Core Real FFT process
+  @param[in]     pSrc      points to input buffer
+  @param[in]     fftLen    length of FFT
+  @param[in]     pATable   points to twiddle Coef A buffer
+  @param[in]     pBTable   points to twiddle Coef B buffer
+  @param[out]    pDst      points to output buffer
+  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  @return        none
+
+  @par
+                   The function implements a Real FFT
+ */
 
 void arm_split_rfft_q15(
-    q15_t * pSrc,
-    uint32_t fftLen,
-    q15_t * pATable,
-    q15_t * pBTable,
-    q15_t * pDst,
-    uint32_t modifier)
-{
-    uint32_t i;                                    /* Loop Counter */
-    q31_t outR, outI;                              /* Temporary variables for output */
-    q15_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
-    q15_t *pSrc1, *pSrc2;
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pATable,
+  const q15_t * pBTable,
+        q15_t * pDst,
+        uint32_t modifier)
+{       
+        uint32_t i;                                    /* Loop Counter */
+        q31_t outR, outI;                              /* Temporary variables for output */
+  const q15_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
+        q15_t *pSrc1, *pSrc2;
 #if defined (ARM_MATH_DSP)
-    q15_t *pD1, *pD2;
+        q15_t *pD1, *pD2;
 #endif
 
-    //  pSrc[2U * fftLen] = pSrc[0];
-    //  pSrc[(2U * fftLen) + 1U] = pSrc[1];
+  /* Init coefficient pointers */
+  pCoefA = &pATable[modifier * 2];
+  pCoefB = &pBTable[modifier * 2];
 
-    pCoefA = &pATable[modifier * 2U];
-    pCoefB = &pBTable[modifier * 2U];
-
-    pSrc1 = &pSrc[2];
-    pSrc2 = &pSrc[(2U * fftLen) - 2U];
+  pSrc1 = &pSrc[2];
+  pSrc2 = &pSrc[(2U * fftLen) - 2U];
 
 #if defined (ARM_MATH_DSP)
 
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
     i = 1U;
     pD1 = pDst + 2;
     pD2 = pDst + (4U * fftLen) - 2;
 
-    for(i = fftLen - 1; i > 0; i--)
+    for (i = fftLen - 1; i > 0; i--)
     {
         /*
-        outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]
-        + pSrc[2 * n - 2 * i] * pBTable[2 * i] +
-        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
-        */
+          outR = (  pSrc[2 * i]             * pATable[2 * i]
+                  - pSrc[2 * i + 1]         * pATable[2 * i + 1]
+                  + pSrc[2 * n - 2 * i]     * pBTable[2 * i]
+                  + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
 
-        /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +
-        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */
+          outI = (  pIn[2 * i + 1]         * pATable[2 * i]
+                  + pIn[2 * i]             * pATable[2 * i + 1]
+                  + pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
+                  - pIn[2 * n - 2 * i + 1] * pBTable[2 * i])
+         */
 
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
         /* pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1] */
-        outR = __SMUSD(*__SIMD32(pSrc1), *__SIMD32(pCoefA));
-
+        outR = __SMUSD(read_q15x2 (pSrc1), read_q15x2((q15_t *) pCoefA));
 #else
-
         /* -(pSrc[2 * i + 1] * pATable[2 * i + 1] - pSrc[2 * i] * pATable[2 * i]) */
-        outR = -(__SMUSD(*__SIMD32(pSrc1), *__SIMD32(pCoefA)));
+        outR = -(__SMUSD(read_q15x2 (pSrc1), read_q15x2((q15_t *) pCoefA)));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+        /* pSrc[2 * n - 2 * i] * pBTable[2 * i] + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
+        outR = __SMLAD(read_q15x2 (pSrc2), read_q15x2((q15_t *) pCoefB), outR) >> 16U;
 
-        /* pSrc[2 * n - 2 * i] * pBTable[2 * i] +
-        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
-        outR = __SMLAD(*__SIMD32(pSrc2), *__SIMD32(pCoefB), outR) >> 16U;
-
-        /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
-
+        /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
 #ifndef ARM_MATH_BIG_ENDIAN
-
-        outI = __SMUSDX(*__SIMD32(pSrc2)--, *__SIMD32(pCoefB));
-
+        outI = __SMUSDX(read_q15x2_da (&pSrc2), read_q15x2((q15_t *) pCoefB));
 #else
-
-        outI = __SMUSDX(*__SIMD32(pCoefB), *__SIMD32(pSrc2)--);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+        outI = __SMUSDX(read_q15x2 ((q15_t *) pCoefB), read_q15x2_da (&pSrc2));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
         /* (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] */
-        outI = __SMLADX(*__SIMD32(pSrc1)++, *__SIMD32(pCoefA), outI);
+        outI = __SMLADX(read_q15x2_ia (&pSrc1), read_q15x2 ((q15_t *) pCoefA), outI);
 
         /* write output */
         *pD1++ = (q15_t) outR;
@@ -215,23 +203,23 @@
         pCoefA = pCoefA + (2U * modifier);
     }
 
-    pDst[2U * fftLen] = (pSrc[0] - pSrc[1]) >> 1;
-    pDst[(2U * fftLen) + 1U] = 0;
+    pDst[2U * fftLen]      = (pSrc[0] - pSrc[1]) >> 1U;
+    pDst[2U * fftLen + 1U] = 0;
 
-    pDst[0] = (pSrc[0] + pSrc[1]) >> 1;
+    pDst[0] = (pSrc[0] + pSrc[1]) >> 1U;
     pDst[1] = 0;
 
 #else
 
-    /* Run the below code for Cortex-M0 */
     i = 1U;
 
     while (i < fftLen)
     {
         /*
-        outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]
-        + pSrc[2 * n - 2 * i] * pBTable[2 * i] +
-        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
+          outR = (  pSrc[2 * i]             * pATable[2 * i]
+                  - pSrc[2 * i + 1]         * pATable[2 * i + 1]
+                  + pSrc[2 * n - 2 * i]     * pBTable[2 * i]
+                  + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
         */
 
         outR = *pSrc1 * *pCoefA;
@@ -239,10 +227,11 @@
         outR = outR + (*pSrc2 * *pCoefB);
         outR = (outR + (*(pSrc2 + 1) * *(pCoefB + 1))) >> 16;
 
-
-        /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +
-        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+        /*
+          outI = (  pIn[2 * i + 1]         * pATable[2 * i]
+                  + pIn[2 * i]             * pATable[2 * i + 1]
+                  + pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
+                  - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
         */
 
         outI = *pSrc2 * *(pCoefB + 1);
@@ -256,7 +245,7 @@
 
         /* write output */
         pDst[2U * i] = (q15_t) outR;
-        pDst[(2U * i) + 1U] = outI >> 16U;
+        pDst[2U * i + 1U] = outI >> 16U;
 
         /* write complex conjugate output */
         pDst[(4U * fftLen) - (2U * i)] = (q15_t) outR;
@@ -270,7 +259,7 @@
     }
 
     pDst[2U * fftLen] = (pSrc[0] - pSrc[1]) >> 1;
-    pDst[(2U * fftLen) + 1U] = 0;
+    pDst[2U * fftLen + 1U] = 0;
 
     pDst[0] = (pSrc[0] + pSrc[1]) >> 1;
     pDst[1] = 0;
@@ -280,147 +269,112 @@
 
 
 /**
-* @brief  Core Real IFFT process
-* @param[in]   *pSrc 				points to the input buffer.
-* @param[in]   fftLen  		    length of FFT.
-* @param[in]   *pATable 			points to the twiddle Coef A buffer.
-* @param[in]   *pBTable 			points to the twiddle Coef B buffer.
-* @param[out]  *pDst 				points to the output buffer.
-* @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-* @return none.
-* The function implements a Real IFFT
-*/
+  @brief         Core Real IFFT process
+  @param[in]     pSrc      points to input buffer
+  @param[in]     fftLen    length of FFT
+  @param[in]     pATable   points to twiddle Coef A buffer
+  @param[in]     pBTable   points to twiddle Coef B buffer
+  @param[out]    pDst      points to output buffer
+  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  @return        none
+
+  @par
+                   The function implements a Real IFFT
+ */
+
 void arm_split_rifft_q15(
-    q15_t * pSrc,
-    uint32_t fftLen,
-    q15_t * pATable,
-    q15_t * pBTable,
-    q15_t * pDst,
-    uint32_t modifier)
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pATable,
+  const q15_t * pBTable,
+        q15_t * pDst,
+        uint32_t modifier)
 {
-    uint32_t i;                                    /* Loop Counter */
-    q31_t outR, outI;                              /* Temporary variables for output */
-    q15_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
-    q15_t *pSrc1, *pSrc2;
-    q15_t *pDst1 = &pDst[0];
+        uint32_t i;                                    /* Loop Counter */
+        q31_t outR, outI;                              /* Temporary variables for output */
+  const q15_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
+        q15_t *pSrc1, *pSrc2;
+        q15_t *pDst1 = &pDst[0];
 
-    pCoefA = &pATable[0];
-    pCoefB = &pBTable[0];
+  pCoefA = &pATable[0];
+  pCoefB = &pBTable[0];
 
-    pSrc1 = &pSrc[0];
-    pSrc2 = &pSrc[2U * fftLen];
+  pSrc1 = &pSrc[0];
+  pSrc2 = &pSrc[2 * fftLen];
+
+  i = fftLen;
+  while (i > 0U)
+  {
+      /*
+        outR = (  pIn[2 * i]             * pATable[2 * i]
+                + pIn[2 * i + 1]         * pATable[2 * i + 1]
+                + pIn[2 * n - 2 * i]     * pBTable[2 * i]
+                - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
+
+        outI = (  pIn[2 * i + 1]         * pATable[2 * i]
+                - pIn[2 * i]             * pATable[2 * i + 1]
+                - pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
+                - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+       */
 
 #if defined (ARM_MATH_DSP)
 
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-    i = fftLen;
-
-    while (i > 0U)
-    {
-        /*
-        outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +
-        pIn[2 * n - 2 * i] * pBTable[2 * i] -
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
-
-        outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -
-        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
-        */
-
-
 #ifndef ARM_MATH_BIG_ENDIAN
-
-        /* pIn[2 * n - 2 * i] * pBTable[2 * i] -
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
-        outR = __SMUSD(*__SIMD32(pSrc2), *__SIMD32(pCoefB));
-
+      /* pIn[2 * n - 2 * i] * pBTable[2 * i] - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
+      outR = __SMUSD(read_q15x2(pSrc2), read_q15x2((q15_t *) pCoefB));
 #else
+      /* -(-pIn[2 * n - 2 * i] * pBTable[2 * i] + pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1])) */
+      outR = -(__SMUSD(read_q15x2(pSrc2), read_q15x2((q15_t *) pCoefB)));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-        /* -(-pIn[2 * n - 2 * i] * pBTable[2 * i] +
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1])) */
-        outR = -(__SMUSD(*__SIMD32(pSrc2), *__SIMD32(pCoefB)));
+      /* pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] + pIn[2 * n - 2 * i] * pBTable[2 * i] */
+      outR = __SMLAD(read_q15x2(pSrc1), read_q15x2 ((q15_t *) pCoefA), outR) >> 16U;
 
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+      /* -pIn[2 * n - 2 * i] * pBTable[2 * i + 1] + pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
+      outI = __SMUADX(read_q15x2_da (&pSrc2), read_q15x2((q15_t *) pCoefB));
 
-        /* pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +
-        pIn[2 * n - 2 * i] * pBTable[2 * i] */
-        outR = __SMLAD(*__SIMD32(pSrc1), *__SIMD32(pCoefA), outR) >> 16U;
-
-        /*
-        -pIn[2 * n - 2 * i] * pBTable[2 * i + 1] +
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
-        outI = __SMUADX(*__SIMD32(pSrc2)--, *__SIMD32(pCoefB));
-
-        /* pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] */
-
+      /* pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] */
 #ifndef ARM_MATH_BIG_ENDIAN
-
-        outI = __SMLSDX(*__SIMD32(pCoefA), *__SIMD32(pSrc1)++, -outI);
-
+      outI = __SMLSDX(read_q15x2 ((q15_t *) pCoefA), read_q15x2_ia (&pSrc1), -outI);
 #else
+      outI = __SMLSDX(read_q15x2_ia (&pSrc1), read_q15x2 ((q15_t *) pCoefA), -outI);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-        outI = __SMLSDX(*__SIMD32(pSrc1)++, *__SIMD32(pCoefA), -outI);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-        /* write output */
-
+      /* write output */
 #ifndef ARM_MATH_BIG_ENDIAN
-
-        *__SIMD32(pDst1)++ = __PKHBT(outR, (outI >> 16U), 16);
-
+      write_q15x2_ia (&pDst1, __PKHBT(outR, (outI >> 16U), 16));
 #else
+      write_q15x2_ia (&pDst1, __PKHBT((outI >> 16U), outR, 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-        *__SIMD32(pDst1)++ = __PKHBT((outI >> 16U), outR, 16);
 
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#else  /* #if defined (ARM_MATH_DSP) */
 
-        /* update coefficient pointer */
-        pCoefB = pCoefB + (2U * modifier);
-        pCoefA = pCoefA + (2U * modifier);
+      outR = *pSrc2 * *pCoefB;
+      outR = outR - (*(pSrc2 + 1) * *(pCoefB + 1));
+      outR = outR + (*pSrc1 * *pCoefA);
+      outR = (outR + (*(pSrc1 + 1) * *(pCoefA + 1))) >> 16;
 
-        i--;
-    }
-#else
-    /* Run the below code for Cortex-M0 */
-    i = fftLen;
+      outI = *(pSrc1 + 1) * *pCoefA;
+      outI = outI - (*pSrc1 * *(pCoefA + 1));
+      outI = outI - (*pSrc2 * *(pCoefB + 1));
+      outI = outI - (*(pSrc2 + 1) * *(pCoefB));
 
-    while (i > 0U)
-    {
-        /*
-        outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +
-        pIn[2 * n - 2 * i] * pBTable[2 * i] -
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
-        */
+      /* update input pointers */
+      pSrc1 += 2U;
+      pSrc2 -= 2U;
 
-        outR = *pSrc2 * *pCoefB;
-        outR = outR - (*(pSrc2 + 1) * *(pCoefB + 1));
-        outR = outR + (*pSrc1 * *pCoefA);
-        outR = (outR + (*(pSrc1 + 1) * *(pCoefA + 1))) >> 16;
+      /* write output */
+      *pDst1++ = (q15_t) outR;
+      *pDst1++ = (q15_t) (outI >> 16);
 
-        /*
-        outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -
-        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
-        */
-
-        outI = *(pSrc1 + 1) * *pCoefA;
-        outI = outI - (*pSrc1 * *(pCoefA + 1));
-        outI = outI - (*pSrc2 * *(pCoefB + 1));
-        outI = outI - (*(pSrc2 + 1) * *(pCoefB));
-
-        /* update input pointers */
-        pSrc1 += 2U;
-        pSrc2 -= 2U;
-
-        /* write output */
-        *pDst1++ = (q15_t) outR;
-        *pDst1++ = (q15_t) (outI >> 16);
-
-        /* update coefficient pointer */
-        pCoefB = pCoefB + (2U * modifier);
-        pCoefA = pCoefA + (2U * modifier);
-
-        i--;
-    }
 #endif /* #if defined (ARM_MATH_DSP) */
+
+      /* update coefficient pointer */
+      pCoefB = pCoefB + (2 * modifier);
+      pCoefA = pCoefA + (2 * modifier);
+
+      i--;
+  }
+
 }
diff --git a/DSP/Source/TransformFunctions/arm_rfft_q31.c b/DSP/Source/TransformFunctions/arm_rfft_q31.c
index 5386140..d16600d 100644
--- a/DSP/Source/TransformFunctions/arm_rfft_q31.c
+++ b/DSP/Source/TransformFunctions/arm_rfft_q31.c
@@ -3,13 +3,13 @@
  * Title:        arm_rfft_q31.c
  * Description:  FFT & RIFFT Q31 process function
  *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
  *
  * Target Processor: Cortex-M cores
  * -------------------------------------------------------------------- */
 /*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -33,251 +33,260 @@
  * -------------------------------------------------------------------- */
 
 void arm_split_rfft_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    q31_t * pATable,
-    q31_t * pBTable,
-    q31_t * pDst,
-    uint32_t modifier);
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pATable,
+  const q31_t * pBTable,
+        q31_t * pDst,
+        uint32_t modifier);
 
 void arm_split_rifft_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    q31_t * pATable,
-    q31_t * pBTable,
-    q31_t * pDst,
-    uint32_t modifier);
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pATable,
+  const q31_t * pBTable,
+        q31_t * pDst,
+        uint32_t modifier);
 
 /**
-* @addtogroup RealFFT
-* @{
-*/
+  @addtogroup RealFFT
+  @{
+ */
 
 /**
-* @brief Processing function for the Q31 RFFT/RIFFT.
-* @param[in]  *S    points to an instance of the Q31 RFFT/RIFFT structure.
-* @param[in]  *pSrc points to the input buffer.
-* @param[out] *pDst points to the output buffer.
-* @return none.
-*
-* \par Input an output formats:
-* \par
-* Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
-* Hence the output format is different for different RFFT sizes.
-* The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:
-* \par
-* \image html RFFTQ31.gif "Input and Output Formats for Q31 RFFT"
-*
-* \par
-* \image html RIFFTQ31.gif "Input and Output Formats for Q31 RIFFT"
-*/
+  @brief         Processing function for the Q31 RFFT/RIFFT.
+  @param[in]     S     points to an instance of the Q31 RFFT/RIFFT structure
+  @param[in]     pSrc  points to input buffer
+  @param[out]    pDst  points to output buffer
+  @return        none
+
+  @par           Input an output formats
+                   Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
+                   Hence the output format is different for different RFFT sizes.
+                   The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:
+  @par
+                   \image html RFFTQ31.gif "Input and Output Formats for Q31 RFFT"
+  @par
+                   \image html RIFFTQ31.gif "Input and Output Formats for Q31 RIFFT"
+ */
+
 void arm_rfft_q31(
-    const arm_rfft_instance_q31 * S,
-    q31_t * pSrc,
-    q31_t * pDst)
+  const arm_rfft_instance_q31 * S,
+        q31_t * pSrc,
+        q31_t * pDst)
 {
-    const arm_cfft_instance_q31 *S_CFFT = S->pCfft;
-    uint32_t i;
-    uint32_t L2 = S->fftLenReal >> 1;
+  const arm_cfft_instance_q31 *S_CFFT = S->pCfft;
+        uint32_t L2 = S->fftLenReal >> 1U;
+        uint32_t i;
 
-    /* Calculation of RIFFT of input */
-    if (S->ifftFlagR == 1U)
-    {
-        /*  Real IFFT core process */
-        arm_split_rifft_q31(pSrc, L2, S->pTwiddleAReal,
-                            S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+  /* Calculation of RIFFT of input */
+  if (S->ifftFlagR == 1U)
+  {
+     /*  Real IFFT core process */
+     arm_split_rifft_q31 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
 
-        /* Complex IFFT process */
-        arm_cfft_q31(S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR);
+     /* Complex IFFT process */
+     arm_cfft_q31 (S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR);
 
-        for(i=0;i<S->fftLenReal;i++)
-        {
-            pDst[i] = pDst[i] << 1;
-        }
-    }
-    else
-    {
-        /* Calculation of RFFT of input */
+     for(i = 0; i < S->fftLenReal; i++)
+     {
+        pDst[i] = pDst[i] << 1U;
+     }
+  }
+  else
+  {
+     /* Calculation of RFFT of input */
 
-        /* Complex FFT process */
-        arm_cfft_q31(S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR);
+     /* Complex FFT process */
+     arm_cfft_q31 (S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR);
 
-        /*  Real FFT core process */
-        arm_split_rfft_q31(pSrc, L2, S->pTwiddleAReal,
-                            S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-    }
+     /*  Real FFT core process */
+     arm_split_rfft_q31 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+  }
+
 }
 
 /**
-* @} end of RealFFT group
-*/
+  @} end of RealFFT group
+ */
 
 /**
-* @brief  Core Real FFT process
-* @param[in]   *pSrc 				points to the input buffer.
-* @param[in]   fftLen  			    length of FFT.
-* @param[in]   *pATable 			points to the twiddle Coef A buffer.
-* @param[in]   *pBTable 			points to the twiddle Coef B buffer.
-* @param[out]  *pDst 				points to the output buffer.
-* @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-* @return none.
-*/
+  @brief         Core Real FFT process
+  @param[in]     pSrc      points to input buffer
+  @param[in]     fftLen    length of FFT
+  @param[in]     pATable   points to twiddle Coef A buffer
+  @param[in]     pBTable   points to twiddle Coef B buffer
+  @param[out]    pDst      points to output buffer
+  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  @return        none
+ */
+
 void arm_split_rfft_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    q31_t * pATable,
-    q31_t * pBTable,
-    q31_t * pDst,
-    uint32_t modifier)
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pATable,
+  const q31_t * pBTable,
+        q31_t * pDst,
+        uint32_t modifier)
 {
-    uint32_t i;                                    /* Loop Counter */
-    q31_t outR, outI;                              /* Temporary variables for output */
-    q31_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
-    q31_t CoefA1, CoefA2, CoefB1;                  /* Temporary variables for twiddle coefficients */
-    q31_t *pOut1 = &pDst[2], *pOut2 = &pDst[(4U * fftLen) - 1U];
-    q31_t *pIn1 = &pSrc[2], *pIn2 = &pSrc[(2U * fftLen) - 1U];
+        uint32_t i;                                    /* Loop Counter */
+        q31_t outR, outI;                              /* Temporary variables for output */
+  const q31_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
+        q31_t CoefA1, CoefA2, CoefB1;                  /* Temporary variables for twiddle coefficients */
+        q31_t *pOut1 = &pDst[2], *pOut2 = &pDst[4 * fftLen - 1];
+        q31_t *pIn1 =  &pSrc[2], *pIn2 =  &pSrc[2 * fftLen - 1];
 
-    /* Init coefficient pointers */
-    pCoefA = &pATable[modifier * 2U];
-    pCoefB = &pBTable[modifier * 2U];
+  /* Init coefficient pointers */
+  pCoefA = &pATable[modifier * 2];
+  pCoefB = &pBTable[modifier * 2];
 
-    i = fftLen - 1U;
+  i = fftLen - 1U;
 
-    while (i > 0U)
-    {
-        /*
-        outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]
-        + pSrc[2 * n - 2 * i] * pBTable[2 * i] +
-        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
-        */
+  while (i > 0U)
+  {
+     /*
+       outR = (  pSrc[2 * i]             * pATable[2 * i]
+               - pSrc[2 * i + 1]         * pATable[2 * i + 1]
+               + pSrc[2 * n - 2 * i]     * pBTable[2 * i]
+               + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
 
-        /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +
-        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */
+       outI = (  pIn[2 * i + 1]         * pATable[2 * i]
+               + pIn[2 * i]             * pATable[2 * i + 1]
+               + pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
+               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+      */
 
-        CoefA1 = *pCoefA++;
-        CoefA2 = *pCoefA;
+     CoefA1 = *pCoefA++;
+     CoefA2 = *pCoefA;
 
-        /* outR = (pSrc[2 * i] * pATable[2 * i] */
-        mult_32x32_keep32_R(outR, *pIn1, CoefA1);
+     /* outR = (pSrc[2 * i] * pATable[2 * i] */
+     mult_32x32_keep32_R (outR, *pIn1, CoefA1);
 
-        /* outI = pIn[2 * i] * pATable[2 * i + 1] */
-        mult_32x32_keep32_R(outI, *pIn1++, CoefA2);
+     /* outI = pIn[2 * i] * pATable[2 * i + 1] */
+     mult_32x32_keep32_R (outI, *pIn1++, CoefA2);
 
-        /* - pSrc[2 * i + 1] * pATable[2 * i + 1] */
-        multSub_32x32_keep32_R(outR, *pIn1, CoefA2);
+     /* - pSrc[2 * i + 1] * pATable[2 * i + 1] */
+     multSub_32x32_keep32_R (outR, *pIn1, CoefA2);
 
-        /* (pIn[2 * i + 1] * pATable[2 * i] */
-        multAcc_32x32_keep32_R(outI, *pIn1++, CoefA1);
+     /* (pIn[2 * i + 1] * pATable[2 * i] */
+     multAcc_32x32_keep32_R (outI, *pIn1++, CoefA1);
 
-        /* pSrc[2 * n - 2 * i] * pBTable[2 * i]  */
-        multSub_32x32_keep32_R(outR, *pIn2, CoefA2);
-        CoefB1 = *pCoefB;
+     /* pSrc[2 * n - 2 * i] * pBTable[2 * i]  */
+     multSub_32x32_keep32_R (outR, *pIn2, CoefA2);
+     CoefB1 = *pCoefB;
 
-        /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
-        multSub_32x32_keep32_R(outI, *pIn2--, CoefB1);
+     /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
+     multSub_32x32_keep32_R (outI, *pIn2--, CoefB1);
 
-        /* pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
-        multAcc_32x32_keep32_R(outR, *pIn2, CoefB1);
+     /* pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
+     multAcc_32x32_keep32_R (outR, *pIn2, CoefB1);
 
-        /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
-        multSub_32x32_keep32_R(outI, *pIn2--, CoefA2);
+     /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
+     multSub_32x32_keep32_R (outI, *pIn2--, CoefA2);
 
-        /* write output */
-        *pOut1++ = outR;
-        *pOut1++ = outI;
+     /* write output */
+     *pOut1++ = outR;
+     *pOut1++ = outI;
 
-        /* write complex conjugate output */
-        *pOut2-- = -outI;
-        *pOut2-- = outR;
+     /* write complex conjugate output */
+     *pOut2-- = -outI;
+     *pOut2-- = outR;
 
-        /* update coefficient pointer */
-        pCoefB = pCoefB + (modifier * 2U);
-        pCoefA = pCoefA + ((modifier * 2U) - 1U);
+     /* update coefficient pointer */
+     pCoefB = pCoefB + (2 * modifier);
+     pCoefA = pCoefA + (2 * modifier - 1);
 
-        i--;
-    }
-    pDst[2U * fftLen] = (pSrc[0] - pSrc[1]) >> 1;
-    pDst[(2U * fftLen) + 1U] = 0;
+     /* Decrement loop count */
+     i--;
+  }
 
-    pDst[0] = (pSrc[0] + pSrc[1]) >> 1;
-    pDst[1] = 0;
+  pDst[2 * fftLen]     = (pSrc[0] - pSrc[1]) >> 1U;
+  pDst[2 * fftLen + 1] = 0;
+
+  pDst[0] = (pSrc[0] + pSrc[1]) >> 1U;
+  pDst[1] = 0;
 }
 
+
 /**
-* @brief  Core Real IFFT process
-* @param[in]   *pSrc 				points to the input buffer.
-* @param[in]   fftLen  			    length of FFT.
-* @param[in]   *pATable 			points to the twiddle Coef A buffer.
-* @param[in]   *pBTable 			points to the twiddle Coef B buffer.
-* @param[out]  *pDst 				points to the output buffer.
-* @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-* @return none.
-*/
+  @brief         Core Real IFFT process
+  @param[in]     pSrc      points to input buffer
+  @param[in]     fftLen    length of FFT
+  @param[in]     pATable   points to twiddle Coef A buffer
+  @param[in]     pBTable   points to twiddle Coef B buffer
+  @param[out]    pDst      points to output buffer
+  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  @return        none
+ */
+
 void arm_split_rifft_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    q31_t * pATable,
-    q31_t * pBTable,
-    q31_t * pDst,
-    uint32_t modifier)
-{
-    q31_t outR, outI;                              /* Temporary variables for output */
-    q31_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
-    q31_t CoefA1, CoefA2, CoefB1;                  /* Temporary variables for twiddle coefficients */
-    q31_t *pIn1 = &pSrc[0], *pIn2 = &pSrc[(2U * fftLen) + 1U];
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pATable,
+  const q31_t * pBTable,
+        q31_t * pDst,
+        uint32_t modifier)
+{       
+        q31_t outR, outI;                              /* Temporary variables for output */
+  const q31_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
+        q31_t CoefA1, CoefA2, CoefB1;                  /* Temporary variables for twiddle coefficients */
+        q31_t *pIn1 = &pSrc[0], *pIn2 = &pSrc[2 * fftLen + 1];
 
-    pCoefA = &pATable[0];
-    pCoefB = &pBTable[0];
+  pCoefA = &pATable[0];
+  pCoefB = &pBTable[0];
 
-    while (fftLen > 0U)
-    {
-        /*
-        outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +
-        pIn[2 * n - 2 * i] * pBTable[2 * i] -
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
+  while (fftLen > 0U)
+  {
+     /*
+       outR = (  pIn[2 * i]             * pATable[2 * i]
+               + pIn[2 * i + 1]         * pATable[2 * i + 1]
+               + pIn[2 * n - 2 * i]     * pBTable[2 * i]
+               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
 
-        outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -
-        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
-        */
-        CoefA1 = *pCoefA++;
-        CoefA2 = *pCoefA;
+       outI = (  pIn[2 * i + 1]         * pATable[2 * i]
+               - pIn[2 * i]             * pATable[2 * i + 1]
+               - pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
+               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+      */
 
-        /* outR = (pIn[2 * i] * pATable[2 * i] */
-        mult_32x32_keep32_R(outR, *pIn1, CoefA1);
+     CoefA1 = *pCoefA++;
+     CoefA2 = *pCoefA;
 
-        /* - pIn[2 * i] * pATable[2 * i + 1] */
-        mult_32x32_keep32_R(outI, *pIn1++, -CoefA2);
+     /* outR = (pIn[2 * i] * pATable[2 * i] */
+     mult_32x32_keep32_R (outR, *pIn1, CoefA1);
 
-        /* pIn[2 * i + 1] * pATable[2 * i + 1] */
-        multAcc_32x32_keep32_R(outR, *pIn1, CoefA2);
+     /* - pIn[2 * i] * pATable[2 * i + 1] */
+     mult_32x32_keep32_R (outI, *pIn1++, -CoefA2);
 
-        /* pIn[2 * i + 1] * pATable[2 * i] */
-        multAcc_32x32_keep32_R(outI, *pIn1++, CoefA1);
+     /* pIn[2 * i + 1] * pATable[2 * i + 1] */
+     multAcc_32x32_keep32_R (outR, *pIn1, CoefA2);
 
-        /* pIn[2 * n - 2 * i] * pBTable[2 * i] */
-        multAcc_32x32_keep32_R(outR, *pIn2, CoefA2);
-        CoefB1 = *pCoefB;
+     /* pIn[2 * i + 1] * pATable[2 * i] */
+     multAcc_32x32_keep32_R (outI, *pIn1++, CoefA1);
 
-        /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
-        multSub_32x32_keep32_R(outI, *pIn2--, CoefB1);
+     /* pIn[2 * n - 2 * i] * pBTable[2 * i] */
+     multAcc_32x32_keep32_R (outR, *pIn2, CoefA2);
+     CoefB1 = *pCoefB;
 
-        /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
-        multAcc_32x32_keep32_R(outR, *pIn2, CoefB1);
+     /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
+     multSub_32x32_keep32_R (outI, *pIn2--, CoefB1);
 
-        /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
-        multAcc_32x32_keep32_R(outI, *pIn2--, CoefA2);
+     /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
+     multAcc_32x32_keep32_R (outR, *pIn2, CoefB1);
 
-        /* write output */
-        *pDst++ = outR;
-        *pDst++ = outI;
+     /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
+     multAcc_32x32_keep32_R (outI, *pIn2--, CoefA2);
 
-        /* update coefficient pointer */
-        pCoefB = pCoefB + (modifier * 2U);
-        pCoefA = pCoefA + ((modifier * 2U) - 1U);
+     /* write output */
+     *pDst++ = outR;
+     *pDst++ = outI;
 
-        /* Decrement loop count */
-        fftLen--;
-    }
+     /* update coefficient pointer */
+     pCoefB = pCoefB + (modifier * 2);
+     pCoefA = pCoefA + (modifier * 2 - 1);
+
+     /* Decrement loop count */
+     fftLen--;
+  }
+
 }
diff --git a/DSP/armcc.cmake b/DSP/armcc.cmake
new file mode 100644
index 0000000..544a834
--- /dev/null
+++ b/DSP/armcc.cmake
@@ -0,0 +1,48 @@
+# Setting Linux is forcing th extension to be .o instead of .obj when building on WIndows.
+# It is important because armlink is failing when files have .obj extensions (error with
+# scatter file section not found)
+SET(CMAKE_SYSTEM_NAME Linux)
+SET(CMAKE_SYSTEM_PROCESSOR arm)
+
+
+
+SET(tools "C:/PROGRA~1/ARM/DEVELO~1.0/sw/ARMCOM~1.12")
+
+SET(CMAKE_C_COMPILER "${tools}/bin/armclang.exe")
+SET(CMAKE_CXX_COMPILER "${tools}/bin/armclang.exe")
+
+SET(CMAKE_AR "${tools}/bin/armar.exe")
+SET(CMAKE_CXX_COMPILER_AR "${tools}/bin/armar.exe")
+SET(CMAKE_C_COMPILER_AR "${tools}/bin/armar.exe")
+SET(CMAKE_LINKER "${tools}/bin/armlink.exe")
+SET(CMAKE_C_LINK_EXECUTABLE "<CMAKE_LINKER> <LINK_FLAGS> -o <TARGET> <LINK_LIBRARIES> <OBJECTS>")
+set(CMAKE_C_RESPONSE_FILE_LINK_FLAG "--via ")
+SET(CMAKE_C_OUTPUT_EXTENSION .o)
+SET(CMAKE_CXX_OUTPUT_EXTENSION .o)
+SET(CMAKE_ASM_OUTPUT_EXTENSION .o)
+# When library defined as STATIC, this line is needed to describe how the .a file must be
+# create. Some changes to the line may be needed.
+SET(CMAKE_C_CREATE_STATIC_LIBRARY "${tools}/bin/armar.exe -r -s --create <TARGET> <LINK_FLAGS> <OBJECTS>" )
+set(ARMAC6 ON)
+# default core
+
+if(NOT ARM_CPU)
+    set(
+            ARM_CPU "cortex-a5"
+            CACHE STRING "Set ARM CPU. Default : cortex-a5"
+    )
+endif(NOT ARM_CPU)
+
+SET(CMAKE_C_FLAGS "-mcpu=${ARM_CPU} --target=arm-arm-none-eabi" CACHE INTERNAL "C compiler common flags")
+SET(CMAKE_CXX_FLAGS "-mcpu=${ARM_CPU} --target=arm-arm-none-eabi" CACHE INTERNAL "C compiler common flags")
+SET(CMAKE_ASM_FLAGS "-g -x assembler-with-cpp -masm=auto -mcpu=${ARM_CPU} --target=arm-arm-none-eabi" CACHE INTERNAL "ASM compiler common flags")
+#SET(CMAKE_EXE_LINKER_FLAGS "-flto" CACHE INTERNAL "linker flags")
+
+# Where is the target environment
+SET(CMAKE_FIND_ROOT_PATH "${tools}")
+# Search for programs in the build host directories
+SET(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
+# For libraries and headers in the target directories
+SET(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
+SET(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
+
diff --git a/DSP/config.cmake b/DSP/config.cmake
new file mode 100644
index 0000000..b6c84be
--- /dev/null
+++ b/DSP/config.cmake
@@ -0,0 +1,141 @@
+include(CMakePrintHelpers)
+cmake_policy(SET CMP0077 NEW)
+
+SET(CORTEXM ON)
+option(FASTMATHCOMPUTATIONS "Fast Math enabled" ON)
+option(NEON "Neon acceleration" OFF)
+option(NEONEXPERIMENTAL "Neon experimental acceleration" OFF)
+option(LOOPUNROLL "Loop unrolling" ON)
+option(ROUNDING "Rounding" OFF)
+option(MATRIXCHECK "Matrix Checks" OFF)
+
+###################
+#
+# ALL CORTEX
+#
+
+function(configdsp PROJECTNAME DSP)
+  target_compile_options(${PROJECTNAME} PUBLIC "-mfloat-abi=hard;-mlittle-endian")
+
+  if (CONFIGTABLE)
+      # Public because initialization for FFT may be defined in client code 
+      # and needs access to the table.
+      target_compile_definitions(${PROJECTNAME} PUBLIC ARM_DSP_CONFIG_TABLES)
+  endif()
+  
+  if (FASTMATHCOMPUTATIONS)
+    target_compile_options(${PROJECTNAME} PUBLIC "-ffast-math")
+  endif()
+  
+  if (LOOPUNROLL)
+    target_compile_definitions(${PROJECTNAME} PRIVATE ARM_MATH_LOOPUNROLL)
+  endif()
+  
+  if (ROUNDING)
+    target_compile_definitions(${PROJECTNAME} PRIVATE ARM_MATH_ROUNDING)
+  endif()
+  
+  if (MATRIXCHECK)
+    target_compile_definitions(${PROJECTNAME} PRIVATE ARM_MATH_MATRIX_CHECK)
+  endif()
+  
+  
+  ###################
+  #
+  # CORTEX-A
+  #
+  
+  # CORTEX-A9
+  if (ARM_CPU STREQUAL "cortex-a9" )
+    target_include_directories(${PROJECTNAME} PUBLIC "${DSP}/../../Core_A/Include")
+    SET(CORTEXM OFF)
+  
+    if (NOT (NEON OR NEONEXPERIMENTAL))
+      target_compile_options(${PROJECTNAME} PUBLIC "-mfpu=vfpv3-d16-fp16")
+    endif()
+  
+  endif()
+  
+  # CORTEX-A7
+  if (ARM_CPU STREQUAL "cortex-a7" )
+    target_include_directories(${PROJECTNAME} PUBLIC "${DSP}/../../Core_A/Include")
+    SET(CORTEXM OFF)
+  
+    if (NOT (NEON OR NEONEXPERIMENTAL))
+      target_compile_options(${PROJECTNAME} PUBLIC "-mfpu=vfpv4-d16")
+    endif()
+  
+  endif()
+  
+  # CORTEX-A5
+  if (ARM_CPU STREQUAL "cortex-a5" )
+    target_include_directories(${PROJECTNAME} PUBLIC "${DSP}/../../Core_A/Include")
+    SET(CORTEXM OFF)
+    
+    if ((NEON OR NEONEXPERIMENTAL))
+      target_compile_options(${PROJECTNAME} PUBLIC "-mfpu=neon-vfpv4")
+    else()
+      target_compile_options(${PROJECTNAME} PUBLIC "-mfpu=vfpv4-d16")
+    endif()
+  endif()
+  
+  
+  ###################
+  #
+  # CORTEX-M
+  #
+  
+  # CORTEX-M35
+  if (ARM_CPU STREQUAL "cortex-m35")
+    target_include_directories(${PROJECTNAME} PUBLIC "${DSP}/../../Core/Include")
+  endif()
+  
+  # CORTEX-M33
+  if (ARM_CPU STREQUAL "cortex-m33")
+    target_include_directories(${PROJECTNAME} PUBLIC "${DSP}/../../Core/Include")
+  endif()
+  
+  # CORTEX-M23
+  if (ARM_CPU STREQUAL "cortex-m23")
+    target_include_directories(${PROJECTNAME} PUBLIC "${DSP}/../../Core/Include")
+  endif()
+  
+  # CORTEX-M7
+  if (ARM_CPU STREQUAL "cortex-m7")
+    target_include_directories(${PROJECTNAME} PUBLIC "${DSP}/../../Core/Include")  
+  endif()
+  
+  # CORTEX-M4
+  if (ARM_CPU STREQUAL "cortex-m4")
+    target_include_directories(${PROJECTNAME} PUBLIC "${DSP}/../../Core/Include")
+  
+  endif()
+  
+  # CORTEX-M3
+  if (ARM_CPU STREQUAL "cortex-m3")
+    target_include_directories(${PROJECTNAME} PUBLIC "${DSP}/../../Core/Include")
+  endif()
+  
+  # CORTEX-M0plus
+  if (ARM_CPU STREQUAL "cortex-m0p")
+    target_include_directories(${PROJECTNAME} PUBLIC "${DSP}/../../Core/Include")
+  endif()
+  
+  # CORTEX-M0
+  if (ARM_CPU STREQUAL "cortex-m0")
+    target_include_directories(${PROJECTNAME} PUBLIC "${DSP}/../../Core/Include")
+  endif()
+  
+  ###################
+  #
+  # FEATURES
+  #
+    
+  if (NEON AND NOT CORTEXM)
+    target_compile_definitions(${PROJECTNAME} PRIVATE ARM_MATH_NEON __FPU_PRESENT)
+  endif()
+  
+  if (NEONEXPERIMENTAL AND NOT CORTEXM)
+    target_compile_definitions(${PROJECTNAME} PRIVATE ARM_MATH_NEON_EXPERIMENTAL __FPU_PRESENT)
+  endif()
+endfunction()
\ No newline at end of file
diff --git a/DSP/configBoot.cmake b/DSP/configBoot.cmake
new file mode 100644
index 0000000..68a364c
--- /dev/null
+++ b/DSP/configBoot.cmake
@@ -0,0 +1,118 @@
+include(CMakePrintHelpers)
+include(configUtils)
+
+enable_language(C ASM)
+
+option(FILEIO "Test trace using printf" ON)
+
+# Otherwise there is a .obj on windows and it creates problems
+# with armlink. 
+SET(CMAKE_C_OUTPUT_EXTENSION .o)
+SET(CMAKE_CXX_OUTPUT_EXTENSION .o)
+SET(CMAKE_ASM_OUTPUT_EXTENSION .o)
+
+
+get_filename_component(PROJECT_NAME ${CMAKE_CURRENT_SOURCE_DIR} NAME)
+
+cmake_print_variables(PROJECT_NAME)
+
+#set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../../../..)
+
+if (ARMAC6)
+
+  ###################
+  #
+  # Cortex cortex-m7
+  #
+  if (ARM_CPU STREQUAL "cortex-m7")
+    cortexm(ARMCM7)
+
+    target_compile_definitions(${PROJECT_NAME} PRIVATE ARMCM7_DP)
+    
+    
+  endif()
+  
+  ###################
+  #
+  # Cortex cortex-m4
+  #
+  if (ARM_CPU STREQUAL "cortex-m4")
+      cortexm(ARMCM4)
+      target_compile_definitions(${PROJECT_NAME} PRIVATE ARMCM4_FP)
+  endif()
+  
+  ###################
+  #
+  # Cortex cortex-m35p
+  #
+  if (ARM_CPU STREQUAL "cortex-m35")
+      cortexm(ARMCM35P)
+      target_compile_definitions(${PROJECT_NAME} PRIVATE ARMCM35P)
+  endif()
+  
+  ###################
+  #
+  # Cortex cortex-m33
+  #
+  if (ARM_CPU STREQUAL "cortex-m33")
+      cortexm(ARMCM33)
+      target_compile_definitions(${PROJECT_NAME} PRIVATE ARMCM33)
+  endif()
+  
+  ###################
+  #
+  # Cortex cortex-m23
+  #
+  if (ARM_CPU STREQUAL "cortex-m23")
+      cortexm(ARMCM23)
+      target_compile_definitions(${PROJECT_NAME} PRIVATE ARMCM23)
+  endif()
+
+  ###################
+  #
+  # Cortex cortex-m0+
+  #
+  if (ARM_CPU STREQUAL "cortex-m0p")
+      cortexm(ARMCM0plus)
+  endif()
+
+  ###################
+  #
+  # Cortex cortex-m0
+  #
+  if (ARM_CPU STREQUAL "cortex-m0")
+      cortexm(ARMCM0)
+  endif()
+  
+  ###################
+  #
+  # Cortex cortex-a5
+  #
+  if (ARM_CPU STREQUAL "cortex-a5")
+    cortexa(ARMCA5)
+    target_compile_definitions(${PROJECT_NAME} PRIVATE ARMv7A) 
+  endif()
+
+  ###################
+  #
+  # Cortex cortex-a7
+  #
+  if (ARM_CPU STREQUAL "cortex-a7")
+    cortexa(ARMCA7)
+    target_compile_definitions(${PROJECT_NAME} PRIVATE ARMv7A) 
+  endif()
+
+  ###################
+  #
+  # Cortex cortex-a9
+  #
+  if (ARM_CPU STREQUAL "cortex-a9")
+    cortexa(ARMCA9)
+    target_compile_definitions(${PROJECT_NAME} PRIVATE ARMv7A) 
+  endif()
+  
+endif()
+
+if (FILEIO)
+  target_compile_definitions(${PROJECT_NAME} PRIVATE FILEIO)
+endif()
\ No newline at end of file
diff --git a/DSP/configUtils.cmake b/DSP/configUtils.cmake
new file mode 100644
index 0000000..43b1c5f
--- /dev/null
+++ b/DSP/configUtils.cmake
@@ -0,0 +1,51 @@
+function(cortexm CORE)
+    target_sources(${PROJECT_NAME} PRIVATE ${ROOT}/Device/ARM/${CORE}/Source/ARM/startup_${CORE}.s)
+    target_sources(${PROJECT_NAME} PRIVATE ${ROOT}/Device/ARM/${CORE}/Source/system_${CORE}.c)
+    target_include_directories(${PROJECT_NAME} PRIVATE ${ROOT}/Device/ARM/${CORE}/Include)
+    target_include_directories(${PROJECT_NAME} PRIVATE ${ROOT}/CMSIS/Core/Include)
+  
+    if (TESTFRAMEWORK)
+      # Need bigger sections for test framework
+      # So we use the test framework scatter file
+      set(SCATTERFILE "${ROOT}/CMSIS/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/armcc6_arm.sct")
+    else()
+      set(SCATTERFILE "${ROOT}/Device/ARM/${CORE}/Source/ARM/${CORE}_ac6.sct")
+    endif()
+
+    target_link_options(${PROJECT_NAME} PRIVATE "--info=sizes;--entry=Reset_Handler;--scatter=${SCATTERFILE}")
+
+endfunction()
+
+function(cortexa CORE)
+    target_sources(${PROJECT_NAME} PRIVATE ${ROOT}/Device/ARM/${CORE}/Source/mmu_${CORE}.c)
+    target_sources(${PROJECT_NAME} PRIVATE ${ROOT}/Device/ARM/${CORE}/Source/system_${CORE}.c)
+    target_sources(${PROJECT_NAME} PRIVATE ${ROOT}/CMSIS/Core_A/Source/irq_ctrl_gic.c)
+    
+    target_include_directories(${PROJECT_NAME} PRIVATE ${ROOT}/Device/ARM/${CORE}/Include)
+    target_include_directories(${PROJECT_NAME} PRIVATE ${ROOT}/Device/ARM/${CORE}/Config)
+    target_include_directories(${PROJECT_NAME} PRIVATE ${ROOT}/CMSIS/Core_A/Include)
+    
+    target_sources(${PROJECT_NAME} PRIVATE ${ROOT}/Device/ARM/${CORE}/Source/AC6/startup_${CORE}.c)
+    
+    if (TESTFRAMEWORK)
+      # Test scatter file is missing some sections required by startup file for
+      # cortex-a
+      #set(SCATTERFILE "${ROOT}/CMSIS/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/armcc6_arm.sct")
+      target_include_directories(${PROJECT_NAME} PRIVATE ../Examples/ARM/boot)
+    else()
+      target_include_directories(${PROJECT_NAME} PRIVATE ../boot)
+    endif()
+
+    set(SCATTERFILE ${CMAKE_CURRENT_BINARY_DIR}/tempLink/${CORE}.sct)
+
+    
+    # Copy the mem file to the build directory 
+    # so that it can be find when preprocessing the scatter file
+    # since we cannot pass an include path to armlink
+    file(COPY ${ROOT}/Device/ARM/${CORE}/Config/mem_${CORE}.h DESTINATION tempLink)
+    file(COPY ${ROOT}/Device/ARM/${CORE}/Source/AC6/${CORE}.sct DESTINATION tempLink)
+    
+    target_compile_definitions(${PROJECT_NAME} PRIVATE -DCMSIS_device_header="${CORE}.h")
+
+    target_link_options(${PROJECT_NAME} PRIVATE "--info=sizes;--entry=Vectors;--scatter=${SCATTERFILE}")
+endfunction()
\ No newline at end of file
diff --git a/DSP/fft.cmake b/DSP/fft.cmake
new file mode 100644
index 0000000..ddaade1
--- /dev/null
+++ b/DSP/fft.cmake
@@ -0,0 +1,523 @@
+function(fft PROJECT)
+#######################################
+#
+# CFFT F32
+#
+
+
+if (CONFIGTABLE AND CFFT_F32_16)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_16)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FLT_16)
+endif()
+
+if (CONFIGTABLE AND CFFT_F32_32)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_32)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FLT_32)
+endif()
+
+if (CONFIGTABLE AND CFFT_F32_64)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_64)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FLT_64)
+endif()
+
+if (CONFIGTABLE AND CFFT_F32_128)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_128)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FLT_128)
+endif()
+
+if (CONFIGTABLE AND CFFT_F32_256)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_256)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FLT_256)
+endif()
+
+if (CONFIGTABLE AND CFFT_F32_512)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_512)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FLT_512)
+endif()
+
+if (CONFIGTABLE AND CFFT_F32_1024)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_1024)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FLT_1024)
+endif()
+
+if (CONFIGTABLE AND CFFT_F32_2048)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_2048)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FLT_2048)
+endif()
+
+if (CONFIGTABLE AND CFFT_F32_4096)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_4096)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FLT_4096)
+endif()
+
+#######################################
+#
+# CFFT Q31
+#
+
+if (CONFIGTABLE AND CFFT_Q31_16)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_16)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_16)
+endif()
+
+if (CONFIGTABLE AND CFFT_Q31_32)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_32)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_32)
+endif()
+
+if (CONFIGTABLE AND CFFT_Q31_64)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_64)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_64)
+endif()
+
+if (CONFIGTABLE AND CFFT_Q31_128)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_128)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_128)
+endif()
+
+if (CONFIGTABLE AND CFFT_Q31_256)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_256)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_256)
+endif()
+
+if (CONFIGTABLE AND CFFT_Q31_512)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_512)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_512)
+endif()
+
+if (CONFIGTABLE AND CFFT_Q31_1024)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_1024)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_1024)
+endif()
+
+if (CONFIGTABLE AND CFFT_Q31_2048)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_2048)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_2048)
+endif()
+
+if (CONFIGTABLE AND CFFT_Q31_4096)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_4096)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_4096)
+endif()
+
+#######################################
+#
+# CFFT Q15
+#
+
+if (CONFIGTABLE AND CFFT_Q15_16)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_16)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_16)
+endif()
+
+if (CONFIGTABLE AND CFFT_Q15_32)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_32)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_32)
+endif()
+
+if (CONFIGTABLE AND CFFT_Q15_64)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_64)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_64)
+endif()
+
+if (CONFIGTABLE AND CFFT_Q15_128)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_128)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_128)
+endif()
+
+if (CONFIGTABLE AND CFFT_Q15_256)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_256)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_256)
+endif()
+
+if (CONFIGTABLE AND CFFT_Q15_512)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_512)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_512)
+endif()
+
+if (CONFIGTABLE AND CFFT_Q15_1024)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_1024)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_1024)
+endif()
+
+if (CONFIGTABLE AND CFFT_Q15_2048)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_2048)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_2048)
+endif()
+
+if (CONFIGTABLE AND CFFT_Q15_4096)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_4096)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_4096)
+endif()
+
+#######################################
+#
+# RFFT FAST F32
+#
+
+if (CONFIGTABLE AND RFFT_FAST_F32_32)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_16) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FLT_16) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_RFFT_F32_32) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_16)  
+endif()
+
+if (CONFIGTABLE AND RFFT_FAST_F32_64)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_32) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FLT_32) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_RFFT_F32_64) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_32)  
+endif()
+
+if (CONFIGTABLE AND RFFT_FAST_F32_128)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_64) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FLT_64) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_RFFT_F32_128) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_64) 
+endif()
+
+if (CONFIGTABLE AND RFFT_FAST_F32_256)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_128) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FLT_128) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_RFFT_F32_256)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_128) 
+endif()
+
+if (CONFIGTABLE AND RFFT_FAST_F32_512)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_256) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FLT_256) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_RFFT_F32_512) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_256) 
+endif()
+
+if (CONFIGTABLE AND RFFT_FAST_F32_1024)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_512) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FLT_512) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_512) 
+endif()
+
+if (CONFIGTABLE AND RFFT_FAST_F32_2048)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FLT_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_1024) 
+endif()
+
+if (CONFIGTABLE AND RFFT_FAST_F32_4096)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_2048) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FLT_2048) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_2048) 
+endif()
+
+#######################################
+#
+# RFFT F32
+#
+
+if (CONFIGTABLE AND RFFT_F32_32)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_F32) 
+    # For cfft_radix4_init
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREV_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_4096) 
+endif()
+
+if (CONFIGTABLE AND RFFT_F32_64)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q31) 
+    # For cfft_radix4_init
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREV_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_4096) 
+endif()
+
+if (CONFIGTABLE AND RFFT_F32_128)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_F32)
+    # For cfft_radix4_init
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREV_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_4096)  
+endif()
+
+if (CONFIGTABLE AND RFFT_F32_256)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_F32) 
+    # For cfft_radix4_init
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREV_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_4096) 
+endif()
+
+if (CONFIGTABLE AND RFFT_F32_512)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_F32)
+    # For cfft_radix4_init
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREV_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_4096)  
+endif()
+
+if (CONFIGTABLE AND RFFT_F32_1024)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_F32)
+    # For cfft_radix4_init
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREV_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_4096)  
+endif()
+
+if (CONFIGTABLE AND RFFT_F32_2048)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_F32) 
+    # For cfft_radix4_init
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREV_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_4096) 
+endif()
+
+if (CONFIGTABLE AND RFFT_F32_4096)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_F32)
+    # For cfft_radix4_init
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREV_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_4096)  
+endif()
+
+if (CONFIGTABLE AND RFFT_F32_8192)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_F32) 
+    # For cfft_radix4_init
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREV_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_4096) 
+endif()
+
+#######################################
+#
+# RFFT Q31
+#
+
+if (CONFIGTABLE AND RFFT_Q31_32)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q31) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_16)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_16)
+endif()
+
+if (CONFIGTABLE AND RFFT_Q31_64)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q31) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_32)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_32)
+endif()
+
+if (CONFIGTABLE AND RFFT_Q31_128)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q31) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_64)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_64)
+endif()
+
+if (CONFIGTABLE AND RFFT_Q31_256)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q31) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_128)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_128)
+endif()
+
+if (CONFIGTABLE AND RFFT_Q31_512)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q31) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_256)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_256)
+endif()
+
+if (CONFIGTABLE AND RFFT_Q31_1024)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q31) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_512)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_512)
+endif()
+
+if (CONFIGTABLE AND RFFT_Q31_2048)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q31) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_1024)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_1024)
+endif()
+
+if (CONFIGTABLE AND RFFT_Q31_4096)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q31) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_2048)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_2048)
+endif()
+
+if (CONFIGTABLE AND RFFT_Q31_8192)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q31) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_4096)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_4096)
+endif()
+
+#######################################
+#
+# RFFT FAST Q15
+#
+
+if (CONFIGTABLE AND RFFT_Q15_32)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q15)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_16)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_16) 
+endif()
+
+if (CONFIGTABLE AND RFFT_Q15_64)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q15) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_32)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_32)
+endif()
+
+if (CONFIGTABLE AND RFFT_Q15_128)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q15) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_64)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_64)
+endif()
+
+if (CONFIGTABLE AND RFFT_Q15_256)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q15) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_128)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_128)
+endif()
+
+if (CONFIGTABLE AND RFFT_Q15_512)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q15) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_256)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_256)
+endif()
+
+if (CONFIGTABLE AND RFFT_Q15_1024)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q15) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_512)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_512)
+endif()
+
+if (CONFIGTABLE AND RFFT_Q15_2048)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q15)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_1024)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_1024) 
+endif()
+
+if (CONFIGTABLE AND RFFT_Q15_4096)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q15) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_2048)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_2048)
+endif()
+
+if (CONFIGTABLE AND RFFT_Q15_8192)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q15) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_4096)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREVIDX_FXT_4096)
+endif()
+
+#######################################
+#
+# DCT4 F32
+#
+
+if (CONFIGTABLE AND DCT4_F32_128)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_DCT4_F32_128) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_F32) 
+
+    # For cfft_radix4_init
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREV_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_4096)
+endif()
+
+if (CONFIGTABLE AND DCT4_F32_512)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_DCT4_F32_512)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_F32) 
+
+    # For cfft_radix4_init
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREV_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_4096) 
+endif()
+
+if (CONFIGTABLE AND DCT4_F32_2048)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_DCT4_F32_2048) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_F32) 
+
+    # For cfft_radix4_init
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREV_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_4096)
+endif()
+
+if (CONFIGTABLE AND DCT4_F32_8192)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_DCT4_F32_8192) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_F32) 
+
+    # For cfft_radix4_init
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREV_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_F32_4096)
+endif()
+
+#######################################
+#
+# DCT4 Q31
+#
+
+if (CONFIGTABLE AND DCT4_Q31_128)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_DCT4_Q31_128) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q31) 
+
+    # For cfft_radix4_init
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREV_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_4096)
+endif()
+
+if (CONFIGTABLE AND DCT4_Q31_512) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_DCT4_Q31_512)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q31)
+
+    # For cfft_radix4_init
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREV_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_4096)  
+endif()
+
+if (CONFIGTABLE AND DCT4_Q31_2048)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_DCT4_Q31_2048)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q31) 
+
+    # For cfft_radix4_init
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREV_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_4096)
+endif()
+
+if (CONFIGTABLE AND DCT4_Q31_8192)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_DCT4_Q31_8192)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q31) 
+
+    # For cfft_radix4_init
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREV_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q31_4096) 
+endif()
+
+#######################################
+#
+# DCT4 Q15
+#
+
+if (CONFIGTABLE AND DCT4_Q15_128) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_DCT4_Q15_128) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q15) 
+
+    # For cfft_radix4_init
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREV_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_4096)
+endif()
+
+if (CONFIGTABLE AND DCT4_Q15_512) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_DCT4_Q15_512)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q15) 
+
+    # For cfft_radix4_init
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREV_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_4096)
+endif()
+
+if (CONFIGTABLE AND DCT4_Q15_2048)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_DCT4_Q15_2048) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q15)
+
+    # For cfft_radix4_init
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREV_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_4096)
+endif()
+
+if (CONFIGTABLE AND DCT4_Q15_8192)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_DCT4_Q15_8192) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_REALCOEF_Q15)
+
+    # For cfft_radix4_init
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_BITREV_1024) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_TWIDDLECOEF_Q15_4096)
+endif()
+
+endfunction()
\ No newline at end of file
diff --git a/DSP/interpol.cmake b/DSP/interpol.cmake
new file mode 100644
index 0000000..80282cf
--- /dev/null
+++ b/DSP/interpol.cmake
@@ -0,0 +1,43 @@
+function(interpol PROJECT)
+
+if (CONFIGTABLE AND ARM_COS_F32)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_F32)
+endif()
+
+if (CONFIGTABLE AND ARM_COS_Q31) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_Q31)
+endif()
+
+if (CONFIGTABLE AND ARM_COS_Q15) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_Q15)
+endif()
+
+if (CONFIGTABLE AND ARM_SIN_F32) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_F32)
+endif()
+
+if (CONFIGTABLE AND ARM_SIN_Q31) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_Q31)
+endif()
+
+if (CONFIGTABLE AND ARM_SIN_Q15) 
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_Q15)
+endif()
+
+if (CONFIGTABLE AND ARM_SIN_COS_F32)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_F32)
+endif()
+
+if (CONFIGTABLE AND ARM_SIN_COS_Q31)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_SIN_Q31)
+endif()
+
+if (CONFIGTABLE AND ARM_LMS_NORM_Q31)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_RECIP_Q31)
+endif()
+
+if (CONFIGTABLE AND ARM_LMS_NORM_Q15)
+    target_compile_definitions(${PROJECT} PUBLIC ARM_TABLE_RECIP_Q15)
+endif()
+
+endfunction()
\ No newline at end of file
diff --git a/Include/cmsis_armcc.h b/Include/cmsis_armcc.h
index 4d9d064..59f173a 100644
--- a/Include/cmsis_armcc.h
+++ b/Include/cmsis_armcc.h
@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     cmsis_armcc.h
  * @brief    CMSIS compiler ARMCC (Arm Compiler 5) header file
- * @version  V5.0.4
- * @date     10. January 2018
+ * @version  V5.1.0
+ * @date     08. May 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -47,6 +47,10 @@
   /* __ARM_ARCH_8M_BASE__  not applicable */
   /* __ARM_ARCH_8M_MAIN__  not applicable */
 
+/* CMSIS compiler control DSP macros */
+#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
+  #define __ARM_FEATURE_DSP         1
+#endif
 
 /* CMSIS compiler specific defines */
 #ifndef   __ASM
@@ -100,6 +104,31 @@
 #ifndef   __RESTRICT
   #define __RESTRICT                             __restrict
 #endif
+#ifndef   __COMPILER_BARRIER
+  #define __COMPILER_BARRIER()                   __memory_changed()
+#endif
+
+/* #########################  Startup and Lowlevel Init  ######################## */
+
+#ifndef __PROGRAM_START
+#define __PROGRAM_START           __main
+#endif
+
+#ifndef __INITIAL_SP
+#define __INITIAL_SP              Image$$ARM_LIB_STACK$$ZI$$Limit
+#endif
+
+#ifndef __STACK_LIMIT
+#define __STACK_LIMIT             Image$$ARM_LIB_STACK$$ZI$$Base
+#endif
+
+#ifndef __VECTOR_TABLE
+#define __VECTOR_TABLE            __Vectors
+#endif
+
+#ifndef __VECTOR_TABLE_ATTRIBUTE
+#define __VECTOR_TABLE_ATTRIBUTE  __attribute((used, section("RESET")))
+#endif
 
 /* ###########################  Core Function Access  ########################### */
 /** \ingroup  CMSIS_Core_FunctionInterface
diff --git a/Include/cmsis_armclang.h b/Include/cmsis_armclang.h
index 162a400..e917f35 100644
--- a/Include/cmsis_armclang.h
+++ b/Include/cmsis_armclang.h
@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     cmsis_armclang.h
  * @brief    CMSIS compiler armclang (Arm Compiler 6) header file
- * @version  V5.0.4
- * @date     10. January 2018
+ * @version  V5.2.0
+ * @date     08. May 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -43,9 +43,9 @@
 #ifndef   __STATIC_INLINE
   #define __STATIC_INLINE                        static __inline
 #endif
-#ifndef   __STATIC_FORCEINLINE                 
+#ifndef   __STATIC_FORCEINLINE
   #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static __inline
-#endif                                           
+#endif
 #ifndef   __NO_RETURN
   #define __NO_RETURN                            __attribute__((__noreturn__))
 #endif
@@ -110,7 +110,31 @@
 #ifndef   __RESTRICT
   #define __RESTRICT                             __restrict
 #endif
+#ifndef   __COMPILER_BARRIER
+  #define __COMPILER_BARRIER()                   __ASM volatile("":::"memory")
+#endif
 
+/* #########################  Startup and Lowlevel Init  ######################## */
+
+#ifndef __PROGRAM_START
+#define __PROGRAM_START           __main
+#endif
+
+#ifndef __INITIAL_SP
+#define __INITIAL_SP              Image$$ARM_LIB_STACK$$ZI$$Limit
+#endif
+
+#ifndef __STACK_LIMIT
+#define __STACK_LIMIT             Image$$ARM_LIB_STACK$$ZI$$Base
+#endif
+
+#ifndef __VECTOR_TABLE
+#define __VECTOR_TABLE            __Vectors
+#endif
+
+#ifndef __VECTOR_TABLE_ATTRIBUTE
+#define __VECTOR_TABLE_ATTRIBUTE  __attribute((used, section("RESET")))
+#endif
 
 /* ###########################  Core Function Access  ########################### */
 /** \ingroup  CMSIS_Core_FunctionInterface
@@ -781,9 +805,11 @@
  * Otherwise, use general registers, specified by constraint "r" */
 #if defined (__thumb__) && !defined (__thumb2__)
 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
+#define __CMSIS_GCC_RW_REG(r) "+l" (r)
 #define __CMSIS_GCC_USE_REG(r) "l" (r)
 #else
 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
+#define __CMSIS_GCC_RW_REG(r) "+r" (r)
 #define __CMSIS_GCC_USE_REG(r) "r" (r)
 #endif
 
@@ -821,14 +847,14 @@
            so that all instructions following the ISB are fetched from cache or memory,
            after the instruction has been completed.
  */
-#define __ISB()        __builtin_arm_isb(0xF);
+#define __ISB()        __builtin_arm_isb(0xF)
 
 /**
   \brief   Data Synchronization Barrier
   \details Acts as a special kind of Data Memory Barrier.
            It completes when all explicit memory accesses before this instruction complete.
  */
-#define __DSB()        __builtin_arm_dsb(0xF);
+#define __DSB()        __builtin_arm_dsb(0xF)
 
 
 /**
@@ -836,7 +862,7 @@
   \details Ensures the apparent order of the explicit memory operations before
            and after the instruction, without ensuring their completion.
  */
-#define __DMB()        __builtin_arm_dmb(0xF);
+#define __DMB()        __builtin_arm_dmb(0xF)
 
 
 /**
@@ -908,7 +934,23 @@
   \param [in]  value  Value to count the leading zeros
   \return             number of leading zeros in value
  */
-#define __CLZ             (uint8_t)__builtin_clz
+__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
+{
+  /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
+     __builtin_clz(0) is undefined behaviour, so handle this case specially.
+     This guarantees ARM-compatible results if happening to compile on a non-ARM
+     target, and ensures the compiler doesn't decide to activate any
+     optimisations using the logic "value was passed to __builtin_clz, so it
+     is non-zero".
+     ARM Compiler 6.10 and possibly earlier will optimise this test away, leaving a
+     single CLZ instruction.
+   */
+  if (value == 0U)
+  {
+    return 32U;
+  }
+  return __builtin_clz(value);
+}
 
 
 #if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
@@ -1321,532 +1363,65 @@
 
 #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
 
-__STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-
-__STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-
-__STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-#define __SSAT16(ARG1,ARG2) \
-({                          \
-  int32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
-#define __USAT16(ARG1,ARG2) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("usat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
-__STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
-{
-  uint32_t result;
-
-  __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
-{
-  uint32_t result;
-
-  __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUAD  (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUSD  (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint32_t __SEL  (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE  int32_t __QADD( int32_t op1,  int32_t op2)
-{
-  int32_t result;
-
-  __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE  int32_t __QSUB( int32_t op1,  int32_t op2)
-{
-  int32_t result;
-
-  __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-#if 0
-#define __PKHBT(ARG1,ARG2,ARG3) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
-  __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2), "I" (ARG3)  ); \
-  __RES; \
- })
-
-#define __PKHTB(ARG1,ARG2,ARG3) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
-  if (ARG3 == 0) \
-    __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2)  ); \
-  else \
-    __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2), "I" (ARG3)  ); \
-  __RES; \
- })
-#endif
+#define     __SADD8                 __builtin_arm_sadd8
+#define     __QADD8                 __builtin_arm_qadd8
+#define     __SHADD8                __builtin_arm_shadd8
+#define     __UADD8                 __builtin_arm_uadd8
+#define     __UQADD8                __builtin_arm_uqadd8
+#define     __UHADD8                __builtin_arm_uhadd8
+#define     __SSUB8                 __builtin_arm_ssub8
+#define     __QSUB8                 __builtin_arm_qsub8
+#define     __SHSUB8                __builtin_arm_shsub8
+#define     __USUB8                 __builtin_arm_usub8
+#define     __UQSUB8                __builtin_arm_uqsub8
+#define     __UHSUB8                __builtin_arm_uhsub8
+#define     __SADD16                __builtin_arm_sadd16
+#define     __QADD16                __builtin_arm_qadd16
+#define     __SHADD16               __builtin_arm_shadd16
+#define     __UADD16                __builtin_arm_uadd16
+#define     __UQADD16               __builtin_arm_uqadd16
+#define     __UHADD16               __builtin_arm_uhadd16
+#define     __SSUB16                __builtin_arm_ssub16
+#define     __QSUB16                __builtin_arm_qsub16
+#define     __SHSUB16               __builtin_arm_shsub16
+#define     __USUB16                __builtin_arm_usub16
+#define     __UQSUB16               __builtin_arm_uqsub16
+#define     __UHSUB16               __builtin_arm_uhsub16
+#define     __SASX                  __builtin_arm_sasx
+#define     __QASX                  __builtin_arm_qasx
+#define     __SHASX                 __builtin_arm_shasx
+#define     __UASX                  __builtin_arm_uasx
+#define     __UQASX                 __builtin_arm_uqasx
+#define     __UHASX                 __builtin_arm_uhasx
+#define     __SSAX                  __builtin_arm_ssax
+#define     __QSAX                  __builtin_arm_qsax
+#define     __SHSAX                 __builtin_arm_shsax
+#define     __USAX                  __builtin_arm_usax
+#define     __UQSAX                 __builtin_arm_uqsax
+#define     __UHSAX                 __builtin_arm_uhsax
+#define     __USAD8                 __builtin_arm_usad8
+#define     __USADA8                __builtin_arm_usada8
+#define     __SSAT16                __builtin_arm_ssat16
+#define     __USAT16                __builtin_arm_usat16
+#define     __UXTB16                __builtin_arm_uxtb16
+#define     __UXTAB16               __builtin_arm_uxtab16
+#define     __SXTB16                __builtin_arm_sxtb16
+#define     __SXTAB16               __builtin_arm_sxtab16
+#define     __SMUAD                 __builtin_arm_smuad
+#define     __SMUADX                __builtin_arm_smuadx
+#define     __SMLAD                 __builtin_arm_smlad
+#define     __SMLADX                __builtin_arm_smladx
+#define     __SMLALD                __builtin_arm_smlald
+#define     __SMLALDX               __builtin_arm_smlaldx
+#define     __SMUSD                 __builtin_arm_smusd
+#define     __SMUSDX                __builtin_arm_smusdx
+#define     __SMLSD                 __builtin_arm_smlsd
+#define     __SMLSDX                __builtin_arm_smlsdx
+#define     __SMLSLD                __builtin_arm_smlsld
+#define     __SMLSLDX               __builtin_arm_smlsldx
+#define     __SEL                   __builtin_arm_sel
+#define     __QADD                  __builtin_arm_qadd
+#define     __QSUB                  __builtin_arm_qsub
 
 #define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \
                                            ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )
diff --git a/Include/cmsis_armclang_ltm.h b/Include/cmsis_armclang_ltm.h
new file mode 100644
index 0000000..feec324
--- /dev/null
+++ b/Include/cmsis_armclang_ltm.h
@@ -0,0 +1,1891 @@
+/**************************************************************************//**
+ * @file     cmsis_armclang_ltm.h
+ * @brief    CMSIS compiler armclang (Arm Compiler 6) header file
+ * @version  V1.2.0
+ * @date     08. May 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2018-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */
+
+#ifndef __CMSIS_ARMCLANG_H
+#define __CMSIS_ARMCLANG_H
+
+#pragma clang system_header   /* treat file as system include file */
+
+#ifndef __ARM_COMPAT_H
+#include <arm_compat.h>    /* Compatibility header for Arm Compiler 5 intrinsics */
+#endif
+
+/* CMSIS compiler specific defines */
+#ifndef   __ASM
+  #define __ASM                                  __asm
+#endif
+#ifndef   __INLINE
+  #define __INLINE                               __inline
+#endif
+#ifndef   __STATIC_INLINE
+  #define __STATIC_INLINE                        static __inline
+#endif
+#ifndef   __STATIC_FORCEINLINE
+  #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static __inline
+#endif
+#ifndef   __NO_RETURN
+  #define __NO_RETURN                            __attribute__((__noreturn__))
+#endif
+#ifndef   __USED
+  #define __USED                                 __attribute__((used))
+#endif
+#ifndef   __WEAK
+  #define __WEAK                                 __attribute__((weak))
+#endif
+#ifndef   __PACKED
+  #define __PACKED                               __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __PACKED_STRUCT
+  #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __PACKED_UNION
+  #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __UNALIGNED_UINT32        /* deprecated */
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */
+  struct __attribute__((packed)) T_UINT32 { uint32_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+#endif
+#ifndef   __UNALIGNED_UINT16_WRITE
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */
+  __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT16_READ
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */
+  __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+#endif
+#ifndef   __UNALIGNED_UINT32_WRITE
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */
+  __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT32_READ
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */
+  __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+#endif
+#ifndef   __ALIGNED
+  #define __ALIGNED(x)                           __attribute__((aligned(x)))
+#endif
+#ifndef   __RESTRICT
+  #define __RESTRICT                             __restrict
+#endif
+#ifndef   __COMPILER_BARRIER
+  #define __COMPILER_BARRIER()                   __ASM volatile("":::"memory")
+#endif
+
+/* #########################  Startup and Lowlevel Init  ######################## */
+
+#ifndef __PROGRAM_START
+#define __PROGRAM_START           __main
+#endif
+
+#ifndef __INITIAL_SP
+#define __INITIAL_SP              Image$$ARM_LIB_STACK$$ZI$$Limit
+#endif
+
+#ifndef __STACK_LIMIT
+#define __STACK_LIMIT             Image$$ARM_LIB_STACK$$ZI$$Base
+#endif
+
+#ifndef __VECTOR_TABLE
+#define __VECTOR_TABLE            __Vectors
+#endif
+
+#ifndef __VECTOR_TABLE_ATTRIBUTE
+#define __VECTOR_TABLE_ATTRIBUTE  __attribute((used, section("RESET")))
+#endif
+
+
+/* ###########################  Core Function Access  ########################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
+  @{
+ */
+
+/**
+  \brief   Enable IRQ Interrupts
+  \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+/* intrinsic void __enable_irq();  see arm_compat.h */
+
+
+/**
+  \brief   Disable IRQ Interrupts
+  \details Disables IRQ interrupts by setting the I-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+/* intrinsic void __disable_irq();  see arm_compat.h */
+
+
+/**
+  \brief   Get Control Register
+  \details Returns the content of the Control Register.
+  \return               Control Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, control" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Control Register (non-secure)
+  \details Returns the content of the non-secure Control Register when in secure mode.
+  \return               non-secure Control Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Control Register
+  \details Writes the given value to the Control Register.
+  \param [in]    control  Control Register value to set
+ */
+__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
+{
+  __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Control Register (non-secure)
+  \details Writes the given value to the non-secure Control Register when in secure state.
+  \param [in]    control  Control Register value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
+{
+  __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
+}
+#endif
+
+
+/**
+  \brief   Get IPSR Register
+  \details Returns the content of the IPSR Register.
+  \return               IPSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get APSR Register
+  \details Returns the content of the APSR Register.
+  \return               APSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_APSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, apsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get xPSR Register
+  \details Returns the content of the xPSR Register.
+  \return               xPSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_xPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get Process Stack Pointer
+  \details Returns the current value of the Process Stack Pointer (PSP).
+  \return               PSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PSP(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, psp"  : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Process Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
+  \return               PSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, psp_ns"  : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Process Stack Pointer
+  \details Assigns the given value to the Process Stack Pointer (PSP).
+  \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
+{
+  __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Process Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
+  \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
+{
+  __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
+}
+#endif
+
+
+/**
+  \brief   Get Main Stack Pointer
+  \details Returns the current value of the Main Stack Pointer (MSP).
+  \return               MSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_MSP(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, msp" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Main Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
+  \return               MSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Main Stack Pointer
+  \details Assigns the given value to the Main Stack Pointer (MSP).
+  \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
+{
+  __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Main Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
+  \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
+{
+  __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
+}
+#endif
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
+  \return               SP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Set Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
+  \param [in]    topOfStack  Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
+{
+  __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
+}
+#endif
+
+
+/**
+  \brief   Get Priority Mask
+  \details Returns the current state of the priority mask bit from the Priority Mask Register.
+  \return               Priority Mask value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, primask" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Priority Mask (non-secure)
+  \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
+  \return               Priority Mask value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Priority Mask
+  \details Assigns the given value to the Priority Mask Register.
+  \param [in]    priMask  Priority Mask
+ */
+__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
+{
+  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Priority Mask (non-secure)
+  \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
+  \param [in]    priMask  Priority Mask
+ */
+__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
+{
+  __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
+}
+#endif
+
+
+#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
+/**
+  \brief   Enable FIQ
+  \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+#define __enable_fault_irq                __enable_fiq   /* see arm_compat.h */
+
+
+/**
+  \brief   Disable FIQ
+  \details Disables FIQ interrupts by setting the F-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+#define __disable_fault_irq               __disable_fiq   /* see arm_compat.h */
+
+
+/**
+  \brief   Get Base Priority
+  \details Returns the current value of the Base Priority register.
+  \return               Base Priority register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, basepri" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Base Priority (non-secure)
+  \details Returns the current value of the non-secure Base Priority register when in secure state.
+  \return               Base Priority register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Base Priority
+  \details Assigns the given value to the Base Priority register.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Base Priority (non-secure)
+  \details Assigns the given value to the non-secure Base Priority register when in secure state.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
+}
+#endif
+
+
+/**
+  \brief   Set Base Priority with condition
+  \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
+           or the new value increases the BASEPRI priority level.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
+}
+
+
+/**
+  \brief   Get Fault Mask
+  \details Returns the current value of the Fault Mask register.
+  \return               Fault Mask register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Fault Mask (non-secure)
+  \details Returns the current value of the non-secure Fault Mask register when in secure state.
+  \return               Fault Mask register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Fault Mask
+  \details Assigns the given value to the Fault Mask register.
+  \param [in]    faultMask  Fault Mask value to set
+ */
+__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
+{
+  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Fault Mask (non-secure)
+  \details Assigns the given value to the non-secure Fault Mask register when in secure state.
+  \param [in]    faultMask  Fault Mask value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
+{
+  __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
+}
+#endif
+
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
+
+
+#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+
+/**
+  \brief   Get Process Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always in non-secure
+  mode.
+  
+  \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
+  \return               PSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure PSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, psplim"  : "=r" (result) );
+  return result;
+#endif
+}
+
+#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Process Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always in non-secure
+  mode.
+
+  \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
+  \return               PSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, psplim_ns"  : "=r" (result) );
+  return result;
+#endif
+}
+#endif
+
+
+/**
+  \brief   Set Process Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored in non-secure
+  mode.
+  
+  \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
+  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  (void)ProcStackPtrLimit;
+#else
+  __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Set Process Stack Pointer (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored in non-secure
+  mode.
+
+  \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
+  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  (void)ProcStackPtrLimit;
+#else
+  __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
+#endif
+}
+#endif
+
+
+/**
+  \brief   Get Main Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always.
+
+  \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
+  \return               MSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, msplim" : "=r" (result) );
+  return result;
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Get Main Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always.
+
+  \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
+  \return               MSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
+  return result;
+#endif
+}
+#endif
+
+
+/**
+  \brief   Set Main Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored.
+
+  \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
+  \param [in]    MainStackPtrLimit  Main Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  (void)MainStackPtrLimit;
+#else
+  __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Set Main Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored.
+
+  \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
+  \param [in]    MainStackPtrLimit  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  (void)MainStackPtrLimit;
+#else
+  __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
+#endif
+}
+#endif
+
+#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
+
+/**
+  \brief   Get FPSCR
+  \details Returns the current value of the Floating Point Status/Control register.
+  \return               Floating Point Status/Control register value
+ */
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+#define __get_FPSCR      (uint32_t)__builtin_arm_get_fpscr
+#else
+#define __get_FPSCR()      ((uint32_t)0U)
+#endif
+
+/**
+  \brief   Set FPSCR
+  \details Assigns the given value to the Floating Point Status/Control register.
+  \param [in]    fpscr  Floating Point Status/Control value to set
+ */
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+#define __set_FPSCR      __builtin_arm_set_fpscr
+#else
+#define __set_FPSCR(x)      ((void)(x))
+#endif
+
+
+/*@} end of CMSIS_Core_RegAccFunctions */
+
+
+/* ##########################  Core Instruction Access  ######################### */
+/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
+  Access to dedicated instructions
+  @{
+*/
+
+/* Define macros for porting to both thumb1 and thumb2.
+ * For thumb1, use low register (r0-r7), specified by constraint "l"
+ * Otherwise, use general registers, specified by constraint "r" */
+#if defined (__thumb__) && !defined (__thumb2__)
+#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
+#define __CMSIS_GCC_USE_REG(r) "l" (r)
+#else
+#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
+#define __CMSIS_GCC_USE_REG(r) "r" (r)
+#endif
+
+/**
+  \brief   No Operation
+  \details No Operation does nothing. This instruction can be used for code alignment purposes.
+ */
+#define __NOP          __builtin_arm_nop
+
+/**
+  \brief   Wait For Interrupt
+  \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
+ */
+#define __WFI          __builtin_arm_wfi
+
+
+/**
+  \brief   Wait For Event
+  \details Wait For Event is a hint instruction that permits the processor to enter
+           a low-power state until one of a number of events occurs.
+ */
+#define __WFE          __builtin_arm_wfe
+
+
+/**
+  \brief   Send Event
+  \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
+ */
+#define __SEV          __builtin_arm_sev
+
+
+/**
+  \brief   Instruction Synchronization Barrier
+  \details Instruction Synchronization Barrier flushes the pipeline in the processor,
+           so that all instructions following the ISB are fetched from cache or memory,
+           after the instruction has been completed.
+ */
+#define __ISB()        __builtin_arm_isb(0xF)
+
+/**
+  \brief   Data Synchronization Barrier
+  \details Acts as a special kind of Data Memory Barrier.
+           It completes when all explicit memory accesses before this instruction complete.
+ */
+#define __DSB()        __builtin_arm_dsb(0xF)
+
+
+/**
+  \brief   Data Memory Barrier
+  \details Ensures the apparent order of the explicit memory operations before
+           and after the instruction, without ensuring their completion.
+ */
+#define __DMB()        __builtin_arm_dmb(0xF)
+
+
+/**
+  \brief   Reverse byte order (32 bit)
+  \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __REV(value)   __builtin_bswap32(value)
+
+
+/**
+  \brief   Reverse byte order (16 bit)
+  \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __REV16(value) __ROR(__REV(value), 16)
+
+
+/**
+  \brief   Reverse byte order (16 bit)
+  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __REVSH(value) (int16_t)__builtin_bswap16(value)
+
+
+/**
+  \brief   Rotate Right in unsigned value (32 bit)
+  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
+  \param [in]    op1  Value to rotate
+  \param [in]    op2  Number of Bits to rotate
+  \return               Rotated value
+ */
+__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
+{
+  op2 %= 32U;
+  if (op2 == 0U)
+  {
+    return op1;
+  }
+  return (op1 >> op2) | (op1 << (32U - op2));
+}
+
+
+/**
+  \brief   Breakpoint
+  \details Causes the processor to enter Debug state.
+           Debug tools can use this to investigate system state when the instruction at a particular address is reached.
+  \param [in]    value  is ignored by the processor.
+                 If required, a debugger can use it to store additional information about the breakpoint.
+ */
+#define __BKPT(value)     __ASM volatile ("bkpt "#value)
+
+
+/**
+  \brief   Reverse bit order of value
+  \details Reverses the bit order of the given value.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __RBIT            __builtin_arm_rbit
+
+/**
+  \brief   Count leading zeros
+  \details Counts the number of leading zeros of a data value.
+  \param [in]  value  Value to count the leading zeros
+  \return             number of leading zeros in value
+ */
+__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
+{
+  /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
+     __builtin_clz(0) is undefined behaviour, so handle this case specially.
+     This guarantees ARM-compatible results if happening to compile on a non-ARM
+     target, and ensures the compiler doesn't decide to activate any
+     optimisations using the logic "value was passed to __builtin_clz, so it
+     is non-zero".
+     ARM Compiler 6.10 and possibly earlier will optimise this test away, leaving a
+     single CLZ instruction.
+   */
+  if (value == 0U)
+  {
+    return 32U;
+  }
+  return __builtin_clz(value);
+}
+
+
+#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+/**
+  \brief   LDR Exclusive (8 bit)
+  \details Executes a exclusive LDR instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+#define __LDREXB        (uint8_t)__builtin_arm_ldrex
+
+
+/**
+  \brief   LDR Exclusive (16 bit)
+  \details Executes a exclusive LDR instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+#define __LDREXH        (uint16_t)__builtin_arm_ldrex
+
+
+/**
+  \brief   LDR Exclusive (32 bit)
+  \details Executes a exclusive LDR instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+#define __LDREXW        (uint32_t)__builtin_arm_ldrex
+
+
+/**
+  \brief   STR Exclusive (8 bit)
+  \details Executes a exclusive STR instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define __STREXB        (uint32_t)__builtin_arm_strex
+
+
+/**
+  \brief   STR Exclusive (16 bit)
+  \details Executes a exclusive STR instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define __STREXH        (uint32_t)__builtin_arm_strex
+
+
+/**
+  \brief   STR Exclusive (32 bit)
+  \details Executes a exclusive STR instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define __STREXW        (uint32_t)__builtin_arm_strex
+
+
+/**
+  \brief   Remove the exclusive lock
+  \details Removes the exclusive lock which is created by LDREX.
+ */
+#define __CLREX             __builtin_arm_clrex
+
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
+
+
+#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
+
+/**
+  \brief   Signed Saturate
+  \details Saturates a signed value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (1..32)
+  \return             Saturated value
+ */
+#define __SSAT             __builtin_arm_ssat
+
+
+/**
+  \brief   Unsigned Saturate
+  \details Saturates an unsigned value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (0..31)
+  \return             Saturated value
+ */
+#define __USAT             __builtin_arm_usat
+
+
+/**
+  \brief   Rotate Right with Extend (32 bit)
+  \details Moves each bit of a bitstring right by one bit.
+           The carry input is shifted in at the left end of the bitstring.
+  \param [in]    value  Value to rotate
+  \return               Rotated value
+ */
+__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
+{
+  uint32_t result;
+
+  __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return(result);
+}
+
+
+/**
+  \brief   LDRT Unprivileged (8 bit)
+  \details Executes a Unprivileged LDRT instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return ((uint8_t) result);    /* Add explicit type cast here */
+}
+
+
+/**
+  \brief   LDRT Unprivileged (16 bit)
+  \details Executes a Unprivileged LDRT instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return ((uint16_t) result);    /* Add explicit type cast here */
+}
+
+
+/**
+  \brief   LDRT Unprivileged (32 bit)
+  \details Executes a Unprivileged LDRT instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return(result);
+}
+
+
+/**
+  \brief   STRT Unprivileged (8 bit)
+  \details Executes a Unprivileged STRT instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
+{
+  __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   STRT Unprivileged (16 bit)
+  \details Executes a Unprivileged STRT instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
+{
+  __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   STRT Unprivileged (32 bit)
+  \details Executes a Unprivileged STRT instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
+{
+  __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
+}
+
+#else  /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
+
+/**
+  \brief   Signed Saturate
+  \details Saturates a signed value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (1..32)
+  \return             Saturated value
+ */
+__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
+{
+  if ((sat >= 1U) && (sat <= 32U))
+  {
+    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
+    const int32_t min = -1 - max ;
+    if (val > max)
+    {
+      return max;
+    }
+    else if (val < min)
+    {
+      return min;
+    }
+  }
+  return val;
+}
+
+/**
+  \brief   Unsigned Saturate
+  \details Saturates an unsigned value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (0..31)
+  \return             Saturated value
+ */
+__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
+{
+  if (sat <= 31U)
+  {
+    const uint32_t max = ((1U << sat) - 1U);
+    if (val > (int32_t)max)
+    {
+      return max;
+    }
+    else if (val < 0)
+    {
+      return 0U;
+    }
+  }
+  return (uint32_t)val;
+}
+
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
+
+
+#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+/**
+  \brief   Load-Acquire (8 bit)
+  \details Executes a LDAB instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return ((uint8_t) result);
+}
+
+
+/**
+  \brief   Load-Acquire (16 bit)
+  \details Executes a LDAH instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return ((uint16_t) result);
+}
+
+
+/**
+  \brief   Load-Acquire (32 bit)
+  \details Executes a LDA instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return(result);
+}
+
+
+/**
+  \brief   Store-Release (8 bit)
+  \details Executes a STLB instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
+{
+  __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   Store-Release (16 bit)
+  \details Executes a STLH instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
+{
+  __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   Store-Release (32 bit)
+  \details Executes a STL instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
+{
+  __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   Load-Acquire Exclusive (8 bit)
+  \details Executes a LDAB exclusive instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+#define     __LDAEXB                 (uint8_t)__builtin_arm_ldaex
+
+
+/**
+  \brief   Load-Acquire Exclusive (16 bit)
+  \details Executes a LDAH exclusive instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+#define     __LDAEXH                 (uint16_t)__builtin_arm_ldaex
+
+
+/**
+  \brief   Load-Acquire Exclusive (32 bit)
+  \details Executes a LDA exclusive instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+#define     __LDAEX                  (uint32_t)__builtin_arm_ldaex
+
+
+/**
+  \brief   Store-Release Exclusive (8 bit)
+  \details Executes a STLB exclusive instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define     __STLEXB                 (uint32_t)__builtin_arm_stlex
+
+
+/**
+  \brief   Store-Release Exclusive (16 bit)
+  \details Executes a STLH exclusive instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define     __STLEXH                 (uint32_t)__builtin_arm_stlex
+
+
+/**
+  \brief   Store-Release Exclusive (32 bit)
+  \details Executes a STL exclusive instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define     __STLEX                  (uint32_t)__builtin_arm_stlex
+
+#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
+
+/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
+
+
+/* ###################  Compiler specific Intrinsics  ########################### */
+/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
+  Access to dedicated SIMD instructions
+  @{
+*/
+
+#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
+
+__STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+
+__STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+
+__STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+#define __SSAT16(ARG1,ARG2) \
+({                          \
+  int32_t __RES, __ARG1 = (ARG1); \
+  __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
+  __RES; \
+ })
+
+#define __USAT16(ARG1,ARG2) \
+({                          \
+  uint32_t __RES, __ARG1 = (ARG1); \
+  __ASM ("usat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
+  __RES; \
+ })
+
+__STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
+{
+  uint32_t result;
+
+  __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
+{
+  uint32_t result;
+
+  __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMUAD  (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMUSD  (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint32_t __SEL  (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE  int32_t __QADD( int32_t op1,  int32_t op2)
+{
+  int32_t result;
+
+  __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE  int32_t __QSUB( int32_t op1,  int32_t op2)
+{
+  int32_t result;
+
+  __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \
+                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )
+
+#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \
+                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )
+
+__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
+{
+  int32_t result;
+
+  __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r"  (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+#endif /* (__ARM_FEATURE_DSP == 1) */
+/*@} end of group CMSIS_SIMD_intrinsics */
+
+
+#endif /* __CMSIS_ARMCLANG_H */
diff --git a/Include/cmsis_compiler.h b/Include/cmsis_compiler.h
index 94212eb..adbf296 100644
--- a/Include/cmsis_compiler.h
+++ b/Include/cmsis_compiler.h
@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     cmsis_compiler.h
  * @brief    CMSIS compiler generic header file
- * @version  V5.0.4
- * @date     10. January 2018
+ * @version  V5.1.0
+ * @date     09. October 2018
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -35,9 +35,15 @@
 
 
 /*
- * Arm Compiler 6 (armclang)
+ * Arm Compiler 6.6 LTM (armclang)
  */
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
+  #include "cmsis_armclang_ltm.h"
+
+  /*
+ * Arm Compiler above 6.10.1 (armclang)
+ */
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
   #include "cmsis_armclang.h"
 
 
@@ -115,8 +121,11 @@
     #define __ALIGNED(x)                           __attribute__((aligned(x)))
   #endif
   #ifndef   __RESTRICT
-    #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
-    #define __RESTRICT
+    #define __RESTRICT                             __restrict
+  #endif
+  #ifndef   __COMPILER_BARRIER
+    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
+    #define __COMPILER_BARRIER()                   (void)0
   #endif
 
 
@@ -187,6 +196,10 @@
     #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
     #define __RESTRICT
   #endif
+  #ifndef   __COMPILER_BARRIER
+    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
+    #define __COMPILER_BARRIER()                   (void)0
+  #endif
 
 
 /*
@@ -255,6 +268,10 @@
     #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
     #define __RESTRICT
   #endif
+  #ifndef   __COMPILER_BARRIER
+    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
+    #define __COMPILER_BARRIER()                   (void)0
+  #endif
 
 
 #else
diff --git a/Include/cmsis_gcc.h b/Include/cmsis_gcc.h
index 2d9db15..3ddcc58 100644
--- a/Include/cmsis_gcc.h
+++ b/Include/cmsis_gcc.h
@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     cmsis_gcc.h
  * @brief    CMSIS compiler GCC header file
- * @version  V5.0.4
- * @date     09. April 2018
+ * @version  V5.2.0
+ * @date     08. May 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -113,7 +113,74 @@
 #ifndef   __RESTRICT
   #define __RESTRICT                             __restrict
 #endif
+#ifndef   __COMPILER_BARRIER
+  #define __COMPILER_BARRIER()                   __ASM volatile("":::"memory")
+#endif
 
+/* #########################  Startup and Lowlevel Init  ######################## */
+
+#ifndef __PROGRAM_START
+
+/**
+  \brief   Initializes data and bss sections
+  \details This default implementations initialized all data and additional bss
+           sections relying on .copy.table and .zero.table specified properly
+           in the used linker script.
+  
+ */
+__STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
+{
+  extern void _start(void) __NO_RETURN;
+  
+  typedef struct {
+    uint32_t const* src;
+    uint32_t* dest;
+    uint32_t  wlen;
+  } __copy_table_t;
+  
+  typedef struct {
+    uint32_t* dest;
+    uint32_t  wlen;
+  } __zero_table_t;
+  
+  extern const __copy_table_t __copy_table_start__;
+  extern const __copy_table_t __copy_table_end__;
+  extern const __zero_table_t __zero_table_start__;
+  extern const __zero_table_t __zero_table_end__;
+
+  for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable) {
+    for(uint32_t i=0u; i<pTable->wlen; ++i) {
+      pTable->dest[i] = pTable->src[i];
+    }
+  }
+ 
+  for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable) {
+    for(uint32_t i=0u; i<pTable->wlen; ++i) {
+      pTable->dest[i] = 0u;
+    }
+  }
+ 
+  _start();
+}
+  
+#define __PROGRAM_START           __cmsis_start
+#endif
+
+#ifndef __INITIAL_SP
+#define __INITIAL_SP              __StackTop
+#endif
+
+#ifndef __STACK_LIMIT
+#define __STACK_LIMIT             __StackLimit
+#endif
+
+#ifndef __VECTOR_TABLE
+#define __VECTOR_TABLE            __Vectors
+#endif
+
+#ifndef __VECTOR_TABLE_ATTRIBUTE
+#define __VECTOR_TABLE_ATTRIBUTE  __attribute((used, section(".vectors")))
+#endif
 
 /* ###########################  Core Function Access  ########################### */
 /** \ingroup  CMSIS_Core_FunctionInterface
@@ -1008,7 +1075,23 @@
   \param [in]  value  Value to count the leading zeros
   \return             number of leading zeros in value
  */
-#define __CLZ             (uint8_t)__builtin_clz
+__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
+{
+  /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
+     __builtin_clz(0) is undefined behaviour, so handle this case specially.
+     This guarantees ARM-compatible results if happening to compile on a non-ARM
+     target, and ensures the compiler doesn't decide to activate any
+     optimisations using the logic "value was passed to __builtin_clz, so it
+     is non-zero".
+     ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a
+     single CLZ instruction.
+   */
+  if (value == 0U)
+  {
+    return 32U;
+  }
+  return __builtin_clz(value);
+}
 
 
 #if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
diff --git a/Include/cmsis_iccarm.h b/Include/cmsis_iccarm.h
index 11c4af0..12d68fd 100644
--- a/Include/cmsis_iccarm.h
+++ b/Include/cmsis_iccarm.h
@@ -1,13 +1,14 @@
 /**************************************************************************//**
  * @file     cmsis_iccarm.h
  * @brief    CMSIS compiler ICCARM (IAR Compiler for Arm) header file
- * @version  V5.0.7
- * @date     19. June 2018
+ * @version  V5.1.0
+ * @date     08. May 2019
  ******************************************************************************/
 
 //------------------------------------------------------------------------------
 //
-// Copyright (c) 2017-2018 IAR Systems
+// Copyright (c) 2017-2019 IAR Systems
+// Copyright (c) 2017-2019 Arm Limited. All rights reserved. 
 //
 // Licensed under the Apache License, Version 2.0 (the "License")
 // you may not use this file except in compliance with the License.
@@ -110,6 +111,10 @@
   #define __ASM __asm
 #endif
 
+#ifndef   __COMPILER_BARRIER
+  #define __COMPILER_BARRIER() __ASM volatile("":::"memory")
+#endif
+
 #ifndef __INLINE
   #define __INLINE inline
 #endif
@@ -150,7 +155,12 @@
 #endif
 
 #ifndef   __RESTRICT
-  #define __RESTRICT            __restrict
+  #if __ICCARM_V8
+    #define __RESTRICT            __restrict
+  #else
+    /* Needs IAR language extensions */
+    #define __RESTRICT            restrict
+  #endif
 #endif
 
 #ifndef   __STATIC_INLINE
@@ -234,6 +244,25 @@
   #endif
 #endif
 
+#ifndef __PROGRAM_START
+#define __PROGRAM_START           __iar_program_start
+#endif
+
+#ifndef __INITIAL_SP
+#define __INITIAL_SP              CSTACK$$Limit
+#endif
+
+#ifndef __STACK_LIMIT
+#define __STACK_LIMIT             CSTACK$$Base
+#endif
+
+#ifndef __VECTOR_TABLE
+#define __VECTOR_TABLE            __vector_table
+#endif
+
+#ifndef __VECTOR_TABLE_ATTRIBUTE
+#define __VECTOR_TABLE_ATTRIBUTE  @".intvec"
+#endif
 
 #ifndef __ICCARM_INTRINSICS_VERSION__
   #define __ICCARM_INTRINSICS_VERSION__  0
diff --git a/Include/cmsis_version.h b/Include/cmsis_version.h
index 660f612..f2e2746 100644
--- a/Include/cmsis_version.h
+++ b/Include/cmsis_version.h
@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     cmsis_version.h
  * @brief    CMSIS Core(M) Version definitions
- * @version  V5.0.2
- * @date     19. April 2017
+ * @version  V5.0.3
+ * @date     24. June 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
+ * Copyright (c) 2009-2019 ARM Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -33,7 +33,7 @@
 
 /*  CMSIS Version definitions */
 #define __CM_CMSIS_VERSION_MAIN  ( 5U)                                      /*!< [31:16] CMSIS Core(M) main version */
-#define __CM_CMSIS_VERSION_SUB   ( 1U)                                      /*!< [15:0]  CMSIS Core(M) sub version */
+#define __CM_CMSIS_VERSION_SUB   ( 3U)                                      /*!< [15:0]  CMSIS Core(M) sub version */
 #define __CM_CMSIS_VERSION       ((__CM_CMSIS_VERSION_MAIN << 16U) | \
                                    __CM_CMSIS_VERSION_SUB           )       /*!< CMSIS Core(M) version number */
 #endif
diff --git a/Include/core_armv81mml.h b/Include/core_armv81mml.h
new file mode 100644
index 0000000..8441e57
--- /dev/null
+++ b/Include/core_armv81mml.h
@@ -0,0 +1,2968 @@
+/**************************************************************************//**
+ * @file     core_armv81mml.h
+ * @brief    CMSIS Armv8.1-M Mainline Core Peripheral Access Layer Header File
+ * @version  V1.0.0
+ * @date     15. March 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2018-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CORE_ARMV81MML_H_GENERIC
+#define __CORE_ARMV81MML_H_GENERIC
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_ARMV81MML
+  @{
+ */
+
+#include "cmsis_version.h"
+ 
+#define __ARM_ARCH_8M_MAIN__    1  // patching for now
+/*  CMSIS ARMV81MML definitions */
+#define __ARMv81MML_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __ARMv81MML_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __ARMv81MML_CMSIS_VERSION       ((__ARMv81MML_CMSIS_VERSION_MAIN << 16U) | \
+                                         __ARMv81MML_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                     (81U)                                       /*!< Cortex-M Core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
+*/
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U    
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+  
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U    
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+  
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U    
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+  
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U    
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+  
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_ARMV81MML_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_ARMV81MML_H_DEPENDANT
+#define __CORE_ARMV81MML_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __ARMv81MML_REV
+    #define __ARMv81MML_REV               0x0000U
+    #warning "__ARMv81MML_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __FPU_PRESENT
+    #define __FPU_PRESENT             0U
+    #warning "__FPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __SAUREGION_PRESENT
+    #define __SAUREGION_PRESENT       0U
+    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __DSP_PRESENT
+    #define __DSP_PRESENT             0U
+    #warning "__DSP_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          3U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group ARMv81MML */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+  - Core SAU Register
+  - Core FPU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
+#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
+
+#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
+#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
+#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
+
+#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */
+#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
+#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
+    uint32_t FPCA:1;                     /*!< bit:      2  Floating-point context active */
+    uint32_t SFPA:1;                     /*!< bit:      3  Secure floating-point active */
+    uint32_t _reserved1:28;              /*!< bit:  4..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SFPA_Pos                    3U                                            /*!< CONTROL: SFPA Position */
+#define CONTROL_SFPA_Msk                   (1UL << CONTROL_SFPA_Pos)                      /*!< CONTROL: SFPA Mask */
+
+#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
+#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
+
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[16U];
+  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RSERVED1[16U];
+  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[16U];
+  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[16U];
+  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[16U];
+  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
+        uint32_t RESERVED5[16U];
+  __IOM uint8_t  IPR[496U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        uint32_t RESERVED6[580U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
+}  NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+  __IM  uint32_t ID_ADR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+  __IM  uint32_t ID_MMFR[4U];            /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+  __IM  uint32_t ID_ISAR[6U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
+  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
+  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
+  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
+  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
+  __IOM uint32_t NSACR;                  /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */
+        uint32_t RESERVED3[92U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
+        uint32_t RESERVED4[15U];
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
+        uint32_t RESERVED5[1U];
+  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
+        uint32_t RESERVED6[1U];
+  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
+  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
+  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
+  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
+  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
+  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
+  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
+  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
+        uint32_t RESERVED7[6U];
+  __IOM uint32_t ITCMCR;                 /*!< Offset: 0x290 (R/W)  Instruction Tightly-Coupled Memory Control Register */
+  __IOM uint32_t DTCMCR;                 /*!< Offset: 0x294 (R/W)  Data Tightly-Coupled Memory Control Registers */
+  __IOM uint32_t AHBPCR;                 /*!< Offset: 0x298 (R/W)  AHBP Control Register */
+  __IOM uint32_t CACR;                   /*!< Offset: 0x29C (R/W)  L1 Cache Control Register */
+  __IOM uint32_t AHBSCR;                 /*!< Offset: 0x2A0 (R/W)  AHB Slave Control Register */
+        uint32_t RESERVED8[1U];
+  __IOM uint32_t ABFSR;                  /*!< Offset: 0x2A8 (R/W)  Auxiliary Bus Fault Status Register */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
+#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
+
+#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
+#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
+
+#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
+#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
+#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
+#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
+
+#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
+#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
+#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
+#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
+#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
+
+#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
+#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
+
+#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
+#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
+
+#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
+#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
+#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTPENDED_Pos    20U                                            /*!< SCB SHCSR: SECUREFAULTPENDED Position */
+#define SCB_SHCSR_SECUREFAULTPENDED_Msk    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos)       /*!< SCB SHCSR: SECUREFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTENA_Pos       19U                                            /*!< SCB SHCSR: SECUREFAULTENA Position */
+#define SCB_SHCSR_SECUREFAULTENA_Msk       (1UL << SCB_SHCSR_SECUREFAULTENA_Pos)          /*!< SCB SHCSR: SECUREFAULTENA Mask */
+
+#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
+#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
+
+#define SCB_SHCSR_SECUREFAULTACT_Pos        4U                                            /*!< SCB SHCSR: SECUREFAULTACT Position */
+#define SCB_SHCSR_SECUREFAULTACT_Msk       (1UL << SCB_SHCSR_SECUREFAULTACT_Pos)          /*!< SCB SHCSR: SECUREFAULTACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
+#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */
+#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
+
+#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
+#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
+
+#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_STKOF_Pos                (SCB_CFSR_USGFAULTSR_Pos + 4U)                  /*!< SCB CFSR (UFSR): STKOF Position */
+#define SCB_CFSR_STKOF_Msk                (1UL << SCB_CFSR_STKOF_Pos)                     /*!< SCB CFSR (UFSR): STKOF Mask */
+
+#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
+
+/* SCB Non-Secure Access Control Register Definitions */
+#define SCB_NSACR_CP11_Pos                 11U                                            /*!< SCB NSACR: CP11 Position */
+#define SCB_NSACR_CP11_Msk                 (1UL << SCB_NSACR_CP11_Pos)                    /*!< SCB NSACR: CP11 Mask */
+
+#define SCB_NSACR_CP10_Pos                 10U                                            /*!< SCB NSACR: CP10 Position */
+#define SCB_NSACR_CP10_Msk                 (1UL << SCB_NSACR_CP10_Pos)                    /*!< SCB NSACR: CP10 Mask */
+
+#define SCB_NSACR_CPn_Pos                   0U                                            /*!< SCB NSACR: CPn Position */
+#define SCB_NSACR_CPn_Msk                  (1UL /*<< SCB_NSACR_CPn_Pos*/)                 /*!< SCB NSACR: CPn Mask */
+
+/* SCB Cache Level ID Register Definitions */
+#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
+#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
+
+#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
+#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
+
+/* SCB Cache Type Register Definitions */
+#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
+#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
+
+#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
+#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
+
+#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
+#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
+
+#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
+#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
+
+#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
+#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
+
+/* SCB Cache Size ID Register Definitions */
+#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
+#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
+
+#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
+#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
+
+#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
+#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
+
+#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
+#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
+
+#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
+#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
+
+#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
+#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
+
+#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
+#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
+
+/* SCB Cache Size Selection Register Definitions */
+#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
+#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
+
+#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
+#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
+
+/* SCB Software Triggered Interrupt Register Definitions */
+#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
+#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
+
+/* SCB D-Cache Invalidate by Set-way Register Definitions */
+#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
+#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
+
+#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
+#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
+
+/* SCB D-Cache Clean by Set-way Register Definitions */
+#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
+#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
+
+#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
+#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
+
+/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
+#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
+#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
+
+#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
+#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
+
+/* Instruction Tightly-Coupled Memory Control Register Definitions */
+#define SCB_ITCMCR_SZ_Pos                   3U                                            /*!< SCB ITCMCR: SZ Position */
+#define SCB_ITCMCR_SZ_Msk                  (0xFUL << SCB_ITCMCR_SZ_Pos)                   /*!< SCB ITCMCR: SZ Mask */
+
+#define SCB_ITCMCR_RETEN_Pos                2U                                            /*!< SCB ITCMCR: RETEN Position */
+#define SCB_ITCMCR_RETEN_Msk               (1UL << SCB_ITCMCR_RETEN_Pos)                  /*!< SCB ITCMCR: RETEN Mask */
+
+#define SCB_ITCMCR_RMW_Pos                  1U                                            /*!< SCB ITCMCR: RMW Position */
+#define SCB_ITCMCR_RMW_Msk                 (1UL << SCB_ITCMCR_RMW_Pos)                    /*!< SCB ITCMCR: RMW Mask */
+
+#define SCB_ITCMCR_EN_Pos                   0U                                            /*!< SCB ITCMCR: EN Position */
+#define SCB_ITCMCR_EN_Msk                  (1UL /*<< SCB_ITCMCR_EN_Pos*/)                 /*!< SCB ITCMCR: EN Mask */
+
+/* Data Tightly-Coupled Memory Control Register Definitions */
+#define SCB_DTCMCR_SZ_Pos                   3U                                            /*!< SCB DTCMCR: SZ Position */
+#define SCB_DTCMCR_SZ_Msk                  (0xFUL << SCB_DTCMCR_SZ_Pos)                   /*!< SCB DTCMCR: SZ Mask */
+
+#define SCB_DTCMCR_RETEN_Pos                2U                                            /*!< SCB DTCMCR: RETEN Position */
+#define SCB_DTCMCR_RETEN_Msk               (1UL << SCB_DTCMCR_RETEN_Pos)                   /*!< SCB DTCMCR: RETEN Mask */
+
+#define SCB_DTCMCR_RMW_Pos                  1U                                            /*!< SCB DTCMCR: RMW Position */
+#define SCB_DTCMCR_RMW_Msk                 (1UL << SCB_DTCMCR_RMW_Pos)                    /*!< SCB DTCMCR: RMW Mask */
+
+#define SCB_DTCMCR_EN_Pos                   0U                                            /*!< SCB DTCMCR: EN Position */
+#define SCB_DTCMCR_EN_Msk                  (1UL /*<< SCB_DTCMCR_EN_Pos*/)                 /*!< SCB DTCMCR: EN Mask */
+
+/* AHBP Control Register Definitions */
+#define SCB_AHBPCR_SZ_Pos                   1U                                            /*!< SCB AHBPCR: SZ Position */
+#define SCB_AHBPCR_SZ_Msk                  (7UL << SCB_AHBPCR_SZ_Pos)                     /*!< SCB AHBPCR: SZ Mask */
+
+#define SCB_AHBPCR_EN_Pos                   0U                                            /*!< SCB AHBPCR: EN Position */
+#define SCB_AHBPCR_EN_Msk                  (1UL /*<< SCB_AHBPCR_EN_Pos*/)                 /*!< SCB AHBPCR: EN Mask */
+
+/* L1 Cache Control Register Definitions */
+#define SCB_CACR_FORCEWT_Pos                2U                                            /*!< SCB CACR: FORCEWT Position */
+#define SCB_CACR_FORCEWT_Msk               (1UL << SCB_CACR_FORCEWT_Pos)                  /*!< SCB CACR: FORCEWT Mask */
+
+#define SCB_CACR_ECCEN_Pos                  1U                                            /*!< SCB CACR: ECCEN Position */
+#define SCB_CACR_ECCEN_Msk                 (1UL << SCB_CACR_ECCEN_Pos)                    /*!< SCB CACR: ECCEN Mask */
+
+#define SCB_CACR_SIWT_Pos                   0U                                            /*!< SCB CACR: SIWT Position */
+#define SCB_CACR_SIWT_Msk                  (1UL /*<< SCB_CACR_SIWT_Pos*/)                 /*!< SCB CACR: SIWT Mask */
+
+/* AHBS Control Register Definitions */
+#define SCB_AHBSCR_INITCOUNT_Pos           11U                                            /*!< SCB AHBSCR: INITCOUNT Position */
+#define SCB_AHBSCR_INITCOUNT_Msk           (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos)           /*!< SCB AHBSCR: INITCOUNT Mask */
+
+#define SCB_AHBSCR_TPRI_Pos                 2U                                            /*!< SCB AHBSCR: TPRI Position */
+#define SCB_AHBSCR_TPRI_Msk                (0x1FFUL << SCB_AHBPCR_TPRI_Pos)               /*!< SCB AHBSCR: TPRI Mask */
+
+#define SCB_AHBSCR_CTL_Pos                  0U                                            /*!< SCB AHBSCR: CTL Position*/
+#define SCB_AHBSCR_CTL_Msk                 (3UL /*<< SCB_AHBPCR_CTL_Pos*/)                /*!< SCB AHBSCR: CTL Mask */
+
+/* Auxiliary Bus Fault Status Register Definitions */
+#define SCB_ABFSR_AXIMTYPE_Pos              8U                                            /*!< SCB ABFSR: AXIMTYPE Position*/
+#define SCB_ABFSR_AXIMTYPE_Msk             (3UL << SCB_ABFSR_AXIMTYPE_Pos)                /*!< SCB ABFSR: AXIMTYPE Mask */
+
+#define SCB_ABFSR_EPPB_Pos                  4U                                            /*!< SCB ABFSR: EPPB Position*/
+#define SCB_ABFSR_EPPB_Msk                 (1UL << SCB_ABFSR_EPPB_Pos)                    /*!< SCB ABFSR: EPPB Mask */
+
+#define SCB_ABFSR_AXIM_Pos                  3U                                            /*!< SCB ABFSR: AXIM Position*/
+#define SCB_ABFSR_AXIM_Msk                 (1UL << SCB_ABFSR_AXIM_Pos)                    /*!< SCB ABFSR: AXIM Mask */
+
+#define SCB_ABFSR_AHBP_Pos                  2U                                            /*!< SCB ABFSR: AHBP Position*/
+#define SCB_ABFSR_AHBP_Msk                 (1UL << SCB_ABFSR_AHBP_Pos)                    /*!< SCB ABFSR: AHBP Mask */
+
+#define SCB_ABFSR_DTCM_Pos                  1U                                            /*!< SCB ABFSR: DTCM Position*/
+#define SCB_ABFSR_DTCM_Msk                 (1UL << SCB_ABFSR_DTCM_Pos)                    /*!< SCB ABFSR: DTCM Mask */
+
+#define SCB_ABFSR_ITCM_Pos                  0U                                            /*!< SCB ABFSR: ITCM Position*/
+#define SCB_ABFSR_ITCM_Msk                 (1UL /*<< SCB_ABFSR_ITCM_Pos*/)                /*!< SCB ABFSR: ITCM Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
+  __IOM uint32_t CPPWR;                  /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+  __OM  union
+  {
+    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+        uint32_t RESERVED0[864U];
+  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        uint32_t RESERVED1[15U];
+  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        uint32_t RESERVED2[15U];
+  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        uint32_t RESERVED3[29U];
+  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
+  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
+  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
+        uint32_t RESERVED4[43U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        uint32_t RESERVED5[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */
+        uint32_t RESERVED6[4U];
+  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+} ITM_Type;
+
+/* ITM Stimulus Port Register Definitions */
+#define ITM_STIM_DISABLED_Pos               1U                                            /*!< ITM STIM: DISABLED Position */
+#define ITM_STIM_DISABLED_Msk              (0x1UL << ITM_STIM_DISABLED_Pos)               /*!< ITM STIM: DISABLED Mask */
+
+#define ITM_STIM_FIFOREADY_Pos              0U                                            /*!< ITM STIM: FIFOREADY Position */
+#define ITM_STIM_FIFOREADY_Msk             (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/)          /*!< ITM STIM: FIFOREADY Mask */
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/)            /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TRACEBUSID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TRACEBUSID_Msk             (0x7FUL << ITM_TCR_TRACEBUSID_Pos)             /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPRESCALE_Pos              8U                                            /*!< ITM TCR: TSPRESCALE Position */
+#define ITM_TCR_TSPRESCALE_Msk             (3UL << ITM_TCR_TSPRESCALE_Pos)                /*!< ITM TCR: TSPRESCALE Mask */
+
+#define ITM_TCR_STALLENA_Pos                5U                                            /*!< ITM TCR: STALLENA Position */
+#define ITM_TCR_STALLENA_Msk               (1UL << ITM_TCR_STALLENA_Pos)                  /*!< ITM TCR: STALLENA Mask */
+
+#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Integration Write Register Definitions */
+#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */
+#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
+
+/* ITM Integration Read Register Definitions */
+#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */
+#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
+
+/* ITM Integration Mode Control Register Definitions */
+#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */
+#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
+  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
+  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+        uint32_t RESERVED3[1U];
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+        uint32_t RESERVED5[1U];
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED6[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+        uint32_t RESERVED7[1U];
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+        uint32_t RESERVED8[1U];
+  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
+        uint32_t RESERVED9[1U];
+  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
+        uint32_t RESERVED10[1U];
+  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
+        uint32_t RESERVED11[1U];
+  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
+        uint32_t RESERVED12[1U];
+  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
+        uint32_t RESERVED13[1U];
+  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
+        uint32_t RESERVED14[1U];
+  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
+        uint32_t RESERVED15[1U];
+  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
+        uint32_t RESERVED16[1U];
+  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
+        uint32_t RESERVED17[1U];
+  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
+        uint32_t RESERVED18[1U];
+  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
+        uint32_t RESERVED19[1U];
+  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
+        uint32_t RESERVED20[1U];
+  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
+        uint32_t RESERVED21[1U];
+  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
+        uint32_t RESERVED22[1U];
+  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
+        uint32_t RESERVED23[1U];
+  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
+        uint32_t RESERVED24[1U];
+  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
+        uint32_t RESERVED25[1U];
+  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
+        uint32_t RESERVED26[1U];
+  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
+        uint32_t RESERVED27[1U];
+  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
+        uint32_t RESERVED28[1U];
+  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
+        uint32_t RESERVED29[1U];
+  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
+        uint32_t RESERVED30[1U];
+  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
+        uint32_t RESERVED31[1U];
+  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
+        uint32_t RESERVED32[934U];
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
+        uint32_t RESERVED33[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  Device Architecture Register */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCDISS_Pos               23U                                         /*!< DWT CTRL: CYCDISS Position */
+#define DWT_CTRL_CYCDISS_Msk               (0x1UL << DWT_CTRL_CYCDISS_Pos)             /*!< DWT CTRL: CYCDISS Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
+#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
+
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
+#define DWT_FUNCTION_ACTION_Msk            (0x1UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
+
+#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
+#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Sizes Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Sizes Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
+        uint32_t RESERVED3[759U];
+  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER */
+  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
+  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
+        uint32_t RESERVED4[1U];
+  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
+  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
+  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+        uint32_t RESERVED5[39U];
+  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+        uint32_t RESERVED7[8U];
+  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI TRIGGER Register Definitions */
+#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
+
+/* TPI Integration ETM Data Register Definitions (FIFO0) */
+#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
+#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+
+#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
+#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
+
+#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
+#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+
+#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
+#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
+
+#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */
+#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
+
+#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */
+#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
+
+#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */
+#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */
+
+/* TPI ITATBCTR2 Register Definitions */
+#define TPI_ITATBCTR2_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR2: ATREADY Position */
+#define TPI_ITATBCTR2_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/)    /*!< TPI ITATBCTR2: ATREADY Mask */
+
+/* TPI Integration ITM Data Register Definitions (FIFO1) */
+#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
+#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+
+#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
+#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
+
+#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
+#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+
+#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
+#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
+
+#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */
+#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
+
+#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */
+#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
+
+#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */
+#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */
+
+/* TPI ITATBCTR0 Register Definitions */
+#define TPI_ITATBCTR0_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR0: ATREADY Position */
+#define TPI_ITATBCTR0_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/)    /*!< TPI ITATBCTR0: ATREADY Mask */
+
+/* TPI Integration Mode Control Register Definitions */
+#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk                (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */
+#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
+
+#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */
+#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
+
+#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_MajorType_Pos           4U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+#define TPI_DEVTYPE_SubType_Pos             0U                                         /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
+  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */
+  __IOM uint32_t RLAR_A1;                /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */
+  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */
+  __IOM uint32_t RLAR_A2;                /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */
+  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */
+  __IOM uint32_t RLAR_A3;                /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */
+        uint32_t RESERVED0[1];
+  union {
+  __IOM uint32_t MAIR[2];
+  struct {
+  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
+  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
+  };
+  };
+} MPU_Type;
+
+#define MPU_TYPE_RALIASES                  4U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */
+#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
+
+#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
+#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
+
+#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
+#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
+
+#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
+#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
+
+/* MPU Region Limit Address Register Definitions */
+#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
+#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
+
+#define MPU_RLAR_PXN_Pos                    4U                                            /*!< MPU RLAR: PXN Position */
+#define MPU_RLAR_PXN_Msk                   (0x1UL << MPU_RLAR_PXN_Pos)                    /*!< MPU RLAR: PXN Mask */
+
+#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
+#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
+
+#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: Region enable bit Position */
+#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: Region enable bit Disable Mask */
+
+/* MPU Memory Attribute Indirection Register 0 Definitions */
+#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
+#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
+
+#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
+#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
+
+#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
+#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
+
+#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
+#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
+
+/* MPU Memory Attribute Indirection Register 1 Definitions */
+#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
+#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
+
+#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
+#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
+
+#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
+#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
+
+#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
+#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
+  \brief    Type definitions for the Security Attribution Unit (SAU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Security Attribution Unit (SAU).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
+#else
+        uint32_t RESERVED0[3];
+#endif
+  __IOM uint32_t SFSR;                   /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */
+  __IOM uint32_t SFAR;                   /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */
+} SAU_Type;
+
+/* SAU Control Register Definitions */
+#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
+#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
+
+#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
+#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
+
+/* SAU Type Register Definitions */
+#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
+#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
+
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+/* SAU Region Number Register Definitions */
+#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
+#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
+
+/* SAU Region Base Address Register Definitions */
+#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
+#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
+
+/* SAU Region Limit Address Register Definitions */
+#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
+#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
+
+#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
+#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
+
+#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
+#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
+
+#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
+
+/* Secure Fault Status Register Definitions */
+#define SAU_SFSR_LSERR_Pos                  7U                                            /*!< SAU SFSR: LSERR Position */
+#define SAU_SFSR_LSERR_Msk                 (1UL << SAU_SFSR_LSERR_Pos)                    /*!< SAU SFSR: LSERR Mask */
+
+#define SAU_SFSR_SFARVALID_Pos              6U                                            /*!< SAU SFSR: SFARVALID Position */
+#define SAU_SFSR_SFARVALID_Msk             (1UL << SAU_SFSR_SFARVALID_Pos)                /*!< SAU SFSR: SFARVALID Mask */
+
+#define SAU_SFSR_LSPERR_Pos                 5U                                            /*!< SAU SFSR: LSPERR Position */
+#define SAU_SFSR_LSPERR_Msk                (1UL << SAU_SFSR_LSPERR_Pos)                   /*!< SAU SFSR: LSPERR Mask */
+
+#define SAU_SFSR_INVTRAN_Pos                4U                                            /*!< SAU SFSR: INVTRAN Position */
+#define SAU_SFSR_INVTRAN_Msk               (1UL << SAU_SFSR_INVTRAN_Pos)                  /*!< SAU SFSR: INVTRAN Mask */
+
+#define SAU_SFSR_AUVIOL_Pos                 3U                                            /*!< SAU SFSR: AUVIOL Position */
+#define SAU_SFSR_AUVIOL_Msk                (1UL << SAU_SFSR_AUVIOL_Pos)                   /*!< SAU SFSR: AUVIOL Mask */
+
+#define SAU_SFSR_INVER_Pos                  2U                                            /*!< SAU SFSR: INVER Position */
+#define SAU_SFSR_INVER_Msk                 (1UL << SAU_SFSR_INVER_Pos)                    /*!< SAU SFSR: INVER Mask */
+
+#define SAU_SFSR_INVIS_Pos                  1U                                            /*!< SAU SFSR: INVIS Position */
+#define SAU_SFSR_INVIS_Msk                 (1UL << SAU_SFSR_INVIS_Pos)                    /*!< SAU SFSR: INVIS Mask */
+
+#define SAU_SFSR_INVEP_Pos                  0U                                            /*!< SAU SFSR: INVEP Position */
+#define SAU_SFSR_INVEP_Msk                 (1UL /*<< SAU_SFSR_INVEP_Pos*/)                /*!< SAU SFSR: INVEP Mask */
+
+/*@} end of group CMSIS_SAU */
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
+  \brief    Type definitions for the Floating Point Unit (FPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Floating Point Unit (FPU).
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
+  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
+  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
+} FPU_Type;
+
+/* Floating-Point Context Control Register Definitions */
+#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
+#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
+
+#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
+#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
+
+#define FPU_FPCCR_LSPENS_Pos               29U                                            /*!< FPCCR: LSPENS Position */
+#define FPU_FPCCR_LSPENS_Msk               (1UL << FPU_FPCCR_LSPENS_Pos)                  /*!< FPCCR: LSPENS bit Mask */
+
+#define FPU_FPCCR_CLRONRET_Pos             28U                                            /*!< FPCCR: CLRONRET Position */
+#define FPU_FPCCR_CLRONRET_Msk             (1UL << FPU_FPCCR_CLRONRET_Pos)                /*!< FPCCR: CLRONRET bit Mask */
+
+#define FPU_FPCCR_CLRONRETS_Pos            27U                                            /*!< FPCCR: CLRONRETS Position */
+#define FPU_FPCCR_CLRONRETS_Msk            (1UL << FPU_FPCCR_CLRONRETS_Pos)               /*!< FPCCR: CLRONRETS bit Mask */
+
+#define FPU_FPCCR_TS_Pos                   26U                                            /*!< FPCCR: TS Position */
+#define FPU_FPCCR_TS_Msk                   (1UL << FPU_FPCCR_TS_Pos)                      /*!< FPCCR: TS bit Mask */
+
+#define FPU_FPCCR_UFRDY_Pos                10U                                            /*!< FPCCR: UFRDY Position */
+#define FPU_FPCCR_UFRDY_Msk                (1UL << FPU_FPCCR_UFRDY_Pos)                   /*!< FPCCR: UFRDY bit Mask */
+
+#define FPU_FPCCR_SPLIMVIOL_Pos             9U                                            /*!< FPCCR: SPLIMVIOL Position */
+#define FPU_FPCCR_SPLIMVIOL_Msk            (1UL << FPU_FPCCR_SPLIMVIOL_Pos)               /*!< FPCCR: SPLIMVIOL bit Mask */
+
+#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
+#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
+
+#define FPU_FPCCR_SFRDY_Pos                 7U                                            /*!< FPCCR: SFRDY Position */
+#define FPU_FPCCR_SFRDY_Msk                (1UL << FPU_FPCCR_SFRDY_Pos)                   /*!< FPCCR: SFRDY bit Mask */
+
+#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
+#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
+
+#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
+#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
+
+#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
+#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
+
+#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
+#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
+
+#define FPU_FPCCR_S_Pos                     2U                                            /*!< FPCCR: Security status of the FP context bit Position */
+#define FPU_FPCCR_S_Msk                    (1UL << FPU_FPCCR_S_Pos)                       /*!< FPCCR: Security status of the FP context bit Mask */
+
+#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
+#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
+
+#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
+#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
+
+/* Floating-Point Context Address Register Definitions */
+#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
+#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
+
+/* Floating-Point Default Status Control Register Definitions */
+#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
+#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
+
+#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
+#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
+
+#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
+#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
+
+#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
+#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
+
+/* Media and FP Feature Register 0 Definitions */
+#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
+#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
+
+#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
+#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
+
+#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
+#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
+
+#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
+#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
+
+#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
+#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
+
+#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
+#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
+
+#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
+#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
+
+#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
+#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
+
+/* Media and FP Feature Register 1 Definitions */
+#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
+#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
+
+#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
+#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
+
+#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
+#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
+
+#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
+#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
+
+/*@} end of group CMSIS_FPU */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */
+#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+
+/* Debug Authentication Control Register Definitions */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
+
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
+
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
+
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
+
+/* Debug Security Control and Status Register Definitions */
+#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */
+#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */
+
+#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */
+#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */
+
+#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */
+#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
+  #define ITM_BASE            (0xE0000000UL)                             /*!< ITM Base Address */
+  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
+  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
+  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */
+  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
+  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
+  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
+
+  #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE         ) /*!< System control Register not in SCB */
+  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
+  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
+  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
+  #define ITM                 ((ITM_Type       *)     ITM_BASE         ) /*!< ITM configuration struct */
+  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
+  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
+  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
+    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
+  #endif
+
+  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
+    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
+  #endif
+
+  #define FPU_BASE            (SCS_BASE +  0x0F30UL)                     /*!< Floating Point Unit */
+  #define FPU                 ((FPU_Type       *)     FPU_BASE         ) /*!< Floating Point Unit */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
+  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */
+  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
+  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
+  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
+
+  #define SCnSCB_NS           ((SCnSCB_Type    *)     SCS_BASE_NS      ) /*!< System control Register not in SCB(non-secure address space) */
+  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
+  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
+  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
+  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
+    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
+  #endif
+
+  #define FPU_BASE_NS         (SCS_BASE_NS +  0x0F30UL)                  /*!< Floating Point Unit               (non-secure address space) */
+  #define FPU_NS              ((FPU_Type       *)     FPU_BASE_NS      ) /*!< Floating Point Unit               (non-secure address space) */
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Debug Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+
+/**
+  \brief   Set Priority Grouping
+  \details Sets the priority grouping field using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
+  SCB->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Interrupt Target State
+  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+  \return             1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Target State
+  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Clear Interrupt Target State
+  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
+                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Set Priority Grouping (non-secure)
+  \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB_NS->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk));             /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
+  SCB_NS->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping (non-secure)
+  \details Reads the priority grouping field from the non-secure NVIC when in secure state.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
+{
+  return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt (non-secure)
+  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status (non-secure)
+  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt (non-secure)
+  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt (non-secure)
+  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt (non-secure)
+  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt (non-secure)
+  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt (non-secure)
+  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority (non-secure)
+  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every non-secure processor exception.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority (non-secure)
+  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+/* ##########################  MPU functions  #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv8.h"
+
+#endif
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+  uint32_t mvfr0;
+
+  mvfr0 = FPU->MVFR0;
+  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
+  {
+    return 2U;           /* Double + Single precision FPU */
+  }
+  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
+  {
+    return 1U;           /* Single precision FPU */
+  }
+  else
+  {
+    return 0U;           /* No FPU */
+  }
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+
+/* ##########################   SAU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SAUFunctions SAU Functions
+  \brief    Functions that configure the SAU.
+  @{
+ */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
+/**
+  \brief   Enable SAU
+  \details Enables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Enable(void)
+{
+    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
+}
+
+
+
+/**
+  \brief   Disable SAU
+  \details Disables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Disable(void)
+{
+    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
+}
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_SAUFunctions */
+
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   System Tick Configuration (non-secure)
+  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                         /* Reload value impossible */
+  }
+
+  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
+  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
+  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                      SysTick_CTRL_TICKINT_Msk   |
+                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                           /* Function successful */
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_core_DebugFunctions ITM Functions
+  \brief    Functions that access the ITM debug interface.
+  @{
+ */
+
+extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
+#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/**
+  \brief   ITM Send Character
+  \details Transmits a character via the ITM channel 0, and
+           \li Just returns when no debugger is connected that has booked the output.
+           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+  \param [in]     ch  Character to transmit.
+  \returns            Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
+      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
+  {
+    while (ITM->PORT[0U].u32 == 0UL)
+    {
+      __NOP();
+    }
+    ITM->PORT[0U].u8 = (uint8_t)ch;
+  }
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Receive Character
+  \details Inputs a character via the external variable \ref ITM_RxBuffer.
+  \return             Received character.
+  \return         -1  No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
+  int32_t ch = -1;                           /* no character available */
+
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+  {
+    ch = ITM_RxBuffer;
+    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
+  }
+
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Check Character
+  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+  \return          0  No character available.
+  \return          1  Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
+
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+  {
+    return (0);                              /* no character available */
+  }
+  else
+  {
+    return (1);                              /*    character available */
+  }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_ARMV81MML_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Include/core_armv8mbl.h b/Include/core_armv8mbl.h
index 251e4ed..344dca5 100644
--- a/Include/core_armv8mbl.h
+++ b/Include/core_armv8mbl.h
@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     core_armv8mbl.h
  * @brief    CMSIS Armv8-M Baseline Core Peripheral Access Layer Header File
- * @version  V5.0.7
- * @date     22. June 2018
+ * @version  V5.0.8
+ * @date     12. November 2018
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -81,7 +81,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
+  #if defined __ARM_FP
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
@@ -1223,7 +1223,7 @@
 #define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
 #define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
 #define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
-#define EXC_RETURN_SPSEL           (0x00000002UL)     /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP           */
+#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
 #define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
 
 /* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
@@ -1253,7 +1253,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -1552,6 +1554,7 @@
   uint32_t *vectors = (uint32_t *)0x0U;
 #endif
   vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
 }
 
 
diff --git a/Include/core_armv8mml.h b/Include/core_armv8mml.h
index 3a3148e..5ddb8ae 100644
--- a/Include/core_armv8mml.h
+++ b/Include/core_armv8mml.h
@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     core_armv8mml.h
  * @brief    CMSIS Armv8-M Mainline Core Peripheral Access Layer Header File
- * @version  V5.0.7
- * @date     06. July 2018
+ * @version  V5.1.0
+ * @date     12. September 2018
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -97,7 +97,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
+  #if defined __ARM_FP
     #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
       #define __FPU_USED       1U
     #else
@@ -538,14 +538,6 @@
   __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
   __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
   __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
-        uint32_t RESERVED7[6U];
-  __IOM uint32_t ITCMCR;                 /*!< Offset: 0x290 (R/W)  Instruction Tightly-Coupled Memory Control Register */
-  __IOM uint32_t DTCMCR;                 /*!< Offset: 0x294 (R/W)  Data Tightly-Coupled Memory Control Registers */
-  __IOM uint32_t AHBPCR;                 /*!< Offset: 0x298 (R/W)  AHBP Control Register */
-  __IOM uint32_t CACR;                   /*!< Offset: 0x29C (R/W)  L1 Cache Control Register */
-  __IOM uint32_t AHBSCR;                 /*!< Offset: 0x2A0 (R/W)  AHB Slave Control Register */
-        uint32_t RESERVED8[1U];
-  __IOM uint32_t ABFSR;                  /*!< Offset: 0x2A8 (R/W)  Auxiliary Bus Fault Status Register */
 } SCB_Type;
 
 /* SCB CPUID Register Definitions */
@@ -921,78 +913,6 @@
 #define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
 #define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
 
-/* Instruction Tightly-Coupled Memory Control Register Definitions */
-#define SCB_ITCMCR_SZ_Pos                   3U                                            /*!< SCB ITCMCR: SZ Position */
-#define SCB_ITCMCR_SZ_Msk                  (0xFUL << SCB_ITCMCR_SZ_Pos)                   /*!< SCB ITCMCR: SZ Mask */
-
-#define SCB_ITCMCR_RETEN_Pos                2U                                            /*!< SCB ITCMCR: RETEN Position */
-#define SCB_ITCMCR_RETEN_Msk               (1UL << SCB_ITCMCR_RETEN_Pos)                  /*!< SCB ITCMCR: RETEN Mask */
-
-#define SCB_ITCMCR_RMW_Pos                  1U                                            /*!< SCB ITCMCR: RMW Position */
-#define SCB_ITCMCR_RMW_Msk                 (1UL << SCB_ITCMCR_RMW_Pos)                    /*!< SCB ITCMCR: RMW Mask */
-
-#define SCB_ITCMCR_EN_Pos                   0U                                            /*!< SCB ITCMCR: EN Position */
-#define SCB_ITCMCR_EN_Msk                  (1UL /*<< SCB_ITCMCR_EN_Pos*/)                 /*!< SCB ITCMCR: EN Mask */
-
-/* Data Tightly-Coupled Memory Control Register Definitions */
-#define SCB_DTCMCR_SZ_Pos                   3U                                            /*!< SCB DTCMCR: SZ Position */
-#define SCB_DTCMCR_SZ_Msk                  (0xFUL << SCB_DTCMCR_SZ_Pos)                   /*!< SCB DTCMCR: SZ Mask */
-
-#define SCB_DTCMCR_RETEN_Pos                2U                                            /*!< SCB DTCMCR: RETEN Position */
-#define SCB_DTCMCR_RETEN_Msk               (1UL << SCB_DTCMCR_RETEN_Pos)                   /*!< SCB DTCMCR: RETEN Mask */
-
-#define SCB_DTCMCR_RMW_Pos                  1U                                            /*!< SCB DTCMCR: RMW Position */
-#define SCB_DTCMCR_RMW_Msk                 (1UL << SCB_DTCMCR_RMW_Pos)                    /*!< SCB DTCMCR: RMW Mask */
-
-#define SCB_DTCMCR_EN_Pos                   0U                                            /*!< SCB DTCMCR: EN Position */
-#define SCB_DTCMCR_EN_Msk                  (1UL /*<< SCB_DTCMCR_EN_Pos*/)                 /*!< SCB DTCMCR: EN Mask */
-
-/* AHBP Control Register Definitions */
-#define SCB_AHBPCR_SZ_Pos                   1U                                            /*!< SCB AHBPCR: SZ Position */
-#define SCB_AHBPCR_SZ_Msk                  (7UL << SCB_AHBPCR_SZ_Pos)                     /*!< SCB AHBPCR: SZ Mask */
-
-#define SCB_AHBPCR_EN_Pos                   0U                                            /*!< SCB AHBPCR: EN Position */
-#define SCB_AHBPCR_EN_Msk                  (1UL /*<< SCB_AHBPCR_EN_Pos*/)                 /*!< SCB AHBPCR: EN Mask */
-
-/* L1 Cache Control Register Definitions */
-#define SCB_CACR_FORCEWT_Pos                2U                                            /*!< SCB CACR: FORCEWT Position */
-#define SCB_CACR_FORCEWT_Msk               (1UL << SCB_CACR_FORCEWT_Pos)                  /*!< SCB CACR: FORCEWT Mask */
-
-#define SCB_CACR_ECCEN_Pos                  1U                                            /*!< SCB CACR: ECCEN Position */
-#define SCB_CACR_ECCEN_Msk                 (1UL << SCB_CACR_ECCEN_Pos)                    /*!< SCB CACR: ECCEN Mask */
-
-#define SCB_CACR_SIWT_Pos                   0U                                            /*!< SCB CACR: SIWT Position */
-#define SCB_CACR_SIWT_Msk                  (1UL /*<< SCB_CACR_SIWT_Pos*/)                 /*!< SCB CACR: SIWT Mask */
-
-/* AHBS Control Register Definitions */
-#define SCB_AHBSCR_INITCOUNT_Pos           11U                                            /*!< SCB AHBSCR: INITCOUNT Position */
-#define SCB_AHBSCR_INITCOUNT_Msk           (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos)           /*!< SCB AHBSCR: INITCOUNT Mask */
-
-#define SCB_AHBSCR_TPRI_Pos                 2U                                            /*!< SCB AHBSCR: TPRI Position */
-#define SCB_AHBSCR_TPRI_Msk                (0x1FFUL << SCB_AHBPCR_TPRI_Pos)               /*!< SCB AHBSCR: TPRI Mask */
-
-#define SCB_AHBSCR_CTL_Pos                  0U                                            /*!< SCB AHBSCR: CTL Position*/
-#define SCB_AHBSCR_CTL_Msk                 (3UL /*<< SCB_AHBPCR_CTL_Pos*/)                /*!< SCB AHBSCR: CTL Mask */
-
-/* Auxiliary Bus Fault Status Register Definitions */
-#define SCB_ABFSR_AXIMTYPE_Pos              8U                                            /*!< SCB ABFSR: AXIMTYPE Position*/
-#define SCB_ABFSR_AXIMTYPE_Msk             (3UL << SCB_ABFSR_AXIMTYPE_Pos)                /*!< SCB ABFSR: AXIMTYPE Mask */
-
-#define SCB_ABFSR_EPPB_Pos                  4U                                            /*!< SCB ABFSR: EPPB Position*/
-#define SCB_ABFSR_EPPB_Msk                 (1UL << SCB_ABFSR_EPPB_Pos)                    /*!< SCB ABFSR: EPPB Mask */
-
-#define SCB_ABFSR_AXIM_Pos                  3U                                            /*!< SCB ABFSR: AXIM Position*/
-#define SCB_ABFSR_AXIM_Msk                 (1UL << SCB_ABFSR_AXIM_Pos)                    /*!< SCB ABFSR: AXIM Mask */
-
-#define SCB_ABFSR_AHBP_Pos                  2U                                            /*!< SCB ABFSR: AHBP Position*/
-#define SCB_ABFSR_AHBP_Msk                 (1UL << SCB_ABFSR_AHBP_Pos)                    /*!< SCB ABFSR: AHBP Mask */
-
-#define SCB_ABFSR_DTCM_Pos                  1U                                            /*!< SCB ABFSR: DTCM Position*/
-#define SCB_ABFSR_DTCM_Msk                 (1UL << SCB_ABFSR_DTCM_Pos)                    /*!< SCB ABFSR: DTCM Mask */
-
-#define SCB_ABFSR_ITCM_Pos                  0U                                            /*!< SCB ABFSR: ITCM Position*/
-#define SCB_ABFSR_ITCM_Msk                 (1UL /*<< SCB_ABFSR_ITCM_Pos*/)                /*!< SCB ABFSR: ITCM Mask */
-
 /*@} end of group CMSIS_SCB */
 
 
@@ -1097,10 +1017,7 @@
   __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
         uint32_t RESERVED2[15U];
   __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[29U];
-  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
-  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
-  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
+        uint32_t RESERVED3[32U];
         uint32_t RESERVED4[43U];
   __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
   __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
@@ -1163,18 +1080,6 @@
 #define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
 #define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
 
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
-
 /* ITM Lock Status Register Definitions */
 #define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
 #define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
@@ -2093,7 +1998,7 @@
 #define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
 #define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
 #define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
-#define EXC_RETURN_SPSEL           (0x00000002UL)     /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP           */
+#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
 #define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
 
 /* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
@@ -2122,7 +2027,7 @@
   reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
   reg_value  =  (reg_value                                   |
                 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
   SCB->AIRCR =  reg_value;
 }
 
@@ -2148,7 +2053,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -2440,6 +2347,7 @@
 {
   uint32_t *vectors = (uint32_t *)SCB->VTOR;
   vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
 }
 
 
@@ -2496,7 +2404,7 @@
   reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk));             /* clear bits to change               */
   reg_value  =  (reg_value                                   |
                 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)                      );              /* Insert write key and priority group */
   SCB_NS->AIRCR =  reg_value;
 }
 
diff --git a/Include/core_cm0.h b/Include/core_cm0.h
index f929bba..cafae5a 100644
--- a/Include/core_cm0.h
+++ b/Include/core_cm0.h
@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     core_cm0.h
  * @brief    CMSIS Cortex-M0 Core Peripheral Access Layer Header File
- * @version  V5.0.5
- * @date     28. May 2018
+ * @version  V5.0.6
+ * @date     13. March 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -81,7 +81,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
+  #if defined __ARM_FP
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
@@ -316,7 +316,7 @@
   __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
         uint32_t RESERVED0[31U];
   __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[31U];
+        uint32_t RESERVED1[31U];
   __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
         uint32_t RESERVED2[31U];
   __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
@@ -624,7 +624,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -829,8 +831,9 @@
  */
 __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
 {
-  uint32_t *vectors = (uint32_t *)0x0U;
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  uint32_t vectors = 0x0U;
+  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
+  /* ARM Application Note 321 states that the M0 does not require the architectural barrier */
 }
 
 
@@ -844,8 +847,8 @@
  */
 __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
 {
-  uint32_t *vectors = (uint32_t *)0x0U;
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+  uint32_t vectors = 0x0U;
+  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
 }
 
 
diff --git a/Include/core_cm0plus.h b/Include/core_cm0plus.h
index 424011a..d104965 100644
--- a/Include/core_cm0plus.h
+++ b/Include/core_cm0plus.h
@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     core_cm0plus.h
  * @brief    CMSIS Cortex-M0+ Core Peripheral Access Layer Header File
- * @version  V5.0.6
- * @date     28. May 2018
+ * @version  V5.0.7
+ * @date     13. March 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -81,7 +81,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
+  #if defined __ARM_FP
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
@@ -330,7 +330,7 @@
   __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
         uint32_t RESERVED0[31U];
   __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[31U];
+        uint32_t RESERVED1[31U];
   __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
         uint32_t RESERVED2[31U];
   __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
@@ -742,7 +742,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -948,11 +950,12 @@
 __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
 {
 #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  uint32_t vectors = SCB->VTOR;
 #else
-    uint32_t *vectors = (uint32_t *)0x0U;
+  uint32_t vectors = 0x0U;
 #endif
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
+  /* ARM Application Note 321 states that the M0+ does not require the architectural barrier */
 }
 
 
@@ -967,12 +970,11 @@
 __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
 {
 #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  uint32_t vectors = SCB->VTOR;
 #else
-  uint32_t *vectors = (uint32_t *)0x0U;
+  uint32_t vectors = 0x0U;
 #endif
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-
+  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
 }
 
 
diff --git a/Include/core_cm1.h b/Include/core_cm1.h
index 0ed678e..76b4569 100644
--- a/Include/core_cm1.h
+++ b/Include/core_cm1.h
@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     core_cm1.h
  * @brief    CMSIS Cortex-M1 Core Peripheral Access Layer Header File
- * @version  V1.0.0
- * @date     23. July 2018
+ * @version  V1.0.1
+ * @date     12. November 2018
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -81,7 +81,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
+  #if defined __ARM_FP
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
@@ -651,7 +651,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -858,6 +860,7 @@
 {
   uint32_t *vectors = (uint32_t *)0x0U;
   vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  /* ARM Application Note 321 states that the M1 does not require the architectural barrier */
 }
 
 
diff --git a/Include/core_cm23.h b/Include/core_cm23.h
index acbc5df..b79c6af 100644
--- a/Include/core_cm23.h
+++ b/Include/core_cm23.h
@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     core_cm23.h
  * @brief    CMSIS Cortex-M23 Core Peripheral Access Layer Header File
- * @version  V5.0.7
- * @date     22. June 2018
+ * @version  V5.0.8
+ * @date     12. November 2018
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -81,7 +81,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
+  #if defined __ARM_FP
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
@@ -1298,7 +1298,7 @@
 #define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
 #define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
 #define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
-#define EXC_RETURN_SPSEL           (0x00000002UL)     /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP           */
+#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
 #define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
 
 /* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
@@ -1328,7 +1328,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -1627,6 +1629,7 @@
   uint32_t *vectors = (uint32_t *)0x0U;
 #endif
   vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
 }
 
 
diff --git a/Include/core_cm3.h b/Include/core_cm3.h
index 74bff64..8157ca7 100644
--- a/Include/core_cm3.h
+++ b/Include/core_cm3.h
@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     core_cm3.h
  * @brief    CMSIS Cortex-M3 Core Peripheral Access Layer Header File
- * @version  V5.0.8
- * @date     04. June 2018
+ * @version  V5.1.0
+ * @date     13. March 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -81,7 +81,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
+  #if defined __ARM_FP
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
@@ -342,7 +342,7 @@
   __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
         uint32_t RESERVED0[24U];
   __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[24U];
+        uint32_t RESERVED1[24U];
   __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
         uint32_t RESERVED2[24U];
   __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
@@ -668,6 +668,12 @@
 #define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
 
 /* Auxiliary Control Register Definitions */
+#if defined (__CM3_REV) && (__CM3_REV >= 0x200U)
+#define SCnSCB_ACTLR_DISOOFP_Pos            9U                                         /*!< ACTLR: DISOOFP Position */
+#define SCnSCB_ACTLR_DISOOFP_Msk           (1UL << SCnSCB_ACTLR_DISOOFP_Pos)           /*!< ACTLR: DISOOFP Mask */
+
+#define SCnSCB_ACTLR_DISFPCA_Pos            8U                                         /*!< ACTLR: DISFPCA Position */
+#define SCnSCB_ACTLR_DISFPCA_Msk           (1UL << SCnSCB_ACTLR_DISFPCA_Pos)           /*!< ACTLR: DISFPCA Mask */
 
 #define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: DISFOLD Position */
 #define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */
@@ -677,6 +683,7 @@
 
 #define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
 #define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
+#endif
 
 /*@} end of group CMSIS_SCnotSCB */
 
@@ -757,10 +764,7 @@
   __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
         uint32_t RESERVED2[15U];
   __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[29U];
-  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
-  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
-  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
+        uint32_t RESERVED3[32U];
         uint32_t RESERVED4[43U];
   __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
   __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
@@ -811,18 +815,6 @@
 #define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
 #define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
 
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
-
 /* ITM Lock Status Register Definitions */
 #define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
 #define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
@@ -1055,13 +1047,13 @@
 
 /* TPI Integration ETM Data Register Definitions (FIFO0) */
 #define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
 
 #define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
 #define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
 
 #define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
 
 #define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
 #define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
@@ -1084,13 +1076,13 @@
 
 /* TPI Integration ITM Data Register Definitions (FIFO1) */
 #define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
 
 #define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
 #define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
 
 #define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
 
 #define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
 #define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
@@ -1512,7 +1504,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -1735,8 +1729,9 @@
  */
 __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
 {
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
+  /* ARM Application Note 321 states that the M3 does not require the architectural barrier */
 }
 
 
@@ -1750,8 +1745,8 @@
  */
 __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
 {
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
 }
 
 
@@ -1784,6 +1779,7 @@
 
 #endif
 
+
 /* ##########################  FPU functions  #################################### */
 /**
   \ingroup  CMSIS_Core_FunctionInterface
diff --git a/Include/core_cm33.h b/Include/core_cm33.h
index 6cd2db7..7fed59a 100644
--- a/Include/core_cm33.h
+++ b/Include/core_cm33.h
@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     core_cm33.h
  * @brief    CMSIS Cortex-M33 Core Peripheral Access Layer Header File
- * @version  V5.0.9
- * @date     06. July 2018
+ * @version  V5.1.0
+ * @date     12. November 2018
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -97,7 +97,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined (__ARM_PCS_VFP)
+  #if defined (__ARM_FP)
     #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
       #define __FPU_USED       1U
     #else
@@ -538,14 +538,6 @@
   __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
   __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
   __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
-        uint32_t RESERVED7[6U];
-  __IOM uint32_t ITCMCR;                 /*!< Offset: 0x290 (R/W)  Instruction Tightly-Coupled Memory Control Register */
-  __IOM uint32_t DTCMCR;                 /*!< Offset: 0x294 (R/W)  Data Tightly-Coupled Memory Control Registers */
-  __IOM uint32_t AHBPCR;                 /*!< Offset: 0x298 (R/W)  AHBP Control Register */
-  __IOM uint32_t CACR;                   /*!< Offset: 0x29C (R/W)  L1 Cache Control Register */
-  __IOM uint32_t AHBSCR;                 /*!< Offset: 0x2A0 (R/W)  AHB Slave Control Register */
-        uint32_t RESERVED8[1U];
-  __IOM uint32_t ABFSR;                  /*!< Offset: 0x2A8 (R/W)  Auxiliary Bus Fault Status Register */
 } SCB_Type;
 
 /* SCB CPUID Register Definitions */
@@ -921,78 +913,6 @@
 #define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
 #define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
 
-/* Instruction Tightly-Coupled Memory Control Register Definitions */
-#define SCB_ITCMCR_SZ_Pos                   3U                                            /*!< SCB ITCMCR: SZ Position */
-#define SCB_ITCMCR_SZ_Msk                  (0xFUL << SCB_ITCMCR_SZ_Pos)                   /*!< SCB ITCMCR: SZ Mask */
-
-#define SCB_ITCMCR_RETEN_Pos                2U                                            /*!< SCB ITCMCR: RETEN Position */
-#define SCB_ITCMCR_RETEN_Msk               (1UL << SCB_ITCMCR_RETEN_Pos)                  /*!< SCB ITCMCR: RETEN Mask */
-
-#define SCB_ITCMCR_RMW_Pos                  1U                                            /*!< SCB ITCMCR: RMW Position */
-#define SCB_ITCMCR_RMW_Msk                 (1UL << SCB_ITCMCR_RMW_Pos)                    /*!< SCB ITCMCR: RMW Mask */
-
-#define SCB_ITCMCR_EN_Pos                   0U                                            /*!< SCB ITCMCR: EN Position */
-#define SCB_ITCMCR_EN_Msk                  (1UL /*<< SCB_ITCMCR_EN_Pos*/)                 /*!< SCB ITCMCR: EN Mask */
-
-/* Data Tightly-Coupled Memory Control Register Definitions */
-#define SCB_DTCMCR_SZ_Pos                   3U                                            /*!< SCB DTCMCR: SZ Position */
-#define SCB_DTCMCR_SZ_Msk                  (0xFUL << SCB_DTCMCR_SZ_Pos)                   /*!< SCB DTCMCR: SZ Mask */
-
-#define SCB_DTCMCR_RETEN_Pos                2U                                            /*!< SCB DTCMCR: RETEN Position */
-#define SCB_DTCMCR_RETEN_Msk               (1UL << SCB_DTCMCR_RETEN_Pos)                   /*!< SCB DTCMCR: RETEN Mask */
-
-#define SCB_DTCMCR_RMW_Pos                  1U                                            /*!< SCB DTCMCR: RMW Position */
-#define SCB_DTCMCR_RMW_Msk                 (1UL << SCB_DTCMCR_RMW_Pos)                    /*!< SCB DTCMCR: RMW Mask */
-
-#define SCB_DTCMCR_EN_Pos                   0U                                            /*!< SCB DTCMCR: EN Position */
-#define SCB_DTCMCR_EN_Msk                  (1UL /*<< SCB_DTCMCR_EN_Pos*/)                 /*!< SCB DTCMCR: EN Mask */
-
-/* AHBP Control Register Definitions */
-#define SCB_AHBPCR_SZ_Pos                   1U                                            /*!< SCB AHBPCR: SZ Position */
-#define SCB_AHBPCR_SZ_Msk                  (7UL << SCB_AHBPCR_SZ_Pos)                     /*!< SCB AHBPCR: SZ Mask */
-
-#define SCB_AHBPCR_EN_Pos                   0U                                            /*!< SCB AHBPCR: EN Position */
-#define SCB_AHBPCR_EN_Msk                  (1UL /*<< SCB_AHBPCR_EN_Pos*/)                 /*!< SCB AHBPCR: EN Mask */
-
-/* L1 Cache Control Register Definitions */
-#define SCB_CACR_FORCEWT_Pos                2U                                            /*!< SCB CACR: FORCEWT Position */
-#define SCB_CACR_FORCEWT_Msk               (1UL << SCB_CACR_FORCEWT_Pos)                  /*!< SCB CACR: FORCEWT Mask */
-
-#define SCB_CACR_ECCEN_Pos                  1U                                            /*!< SCB CACR: ECCEN Position */
-#define SCB_CACR_ECCEN_Msk                 (1UL << SCB_CACR_ECCEN_Pos)                    /*!< SCB CACR: ECCEN Mask */
-
-#define SCB_CACR_SIWT_Pos                   0U                                            /*!< SCB CACR: SIWT Position */
-#define SCB_CACR_SIWT_Msk                  (1UL /*<< SCB_CACR_SIWT_Pos*/)                 /*!< SCB CACR: SIWT Mask */
-
-/* AHBS Control Register Definitions */
-#define SCB_AHBSCR_INITCOUNT_Pos           11U                                            /*!< SCB AHBSCR: INITCOUNT Position */
-#define SCB_AHBSCR_INITCOUNT_Msk           (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos)           /*!< SCB AHBSCR: INITCOUNT Mask */
-
-#define SCB_AHBSCR_TPRI_Pos                 2U                                            /*!< SCB AHBSCR: TPRI Position */
-#define SCB_AHBSCR_TPRI_Msk                (0x1FFUL << SCB_AHBPCR_TPRI_Pos)               /*!< SCB AHBSCR: TPRI Mask */
-
-#define SCB_AHBSCR_CTL_Pos                  0U                                            /*!< SCB AHBSCR: CTL Position*/
-#define SCB_AHBSCR_CTL_Msk                 (3UL /*<< SCB_AHBPCR_CTL_Pos*/)                /*!< SCB AHBSCR: CTL Mask */
-
-/* Auxiliary Bus Fault Status Register Definitions */
-#define SCB_ABFSR_AXIMTYPE_Pos              8U                                            /*!< SCB ABFSR: AXIMTYPE Position*/
-#define SCB_ABFSR_AXIMTYPE_Msk             (3UL << SCB_ABFSR_AXIMTYPE_Pos)                /*!< SCB ABFSR: AXIMTYPE Mask */
-
-#define SCB_ABFSR_EPPB_Pos                  4U                                            /*!< SCB ABFSR: EPPB Position*/
-#define SCB_ABFSR_EPPB_Msk                 (1UL << SCB_ABFSR_EPPB_Pos)                    /*!< SCB ABFSR: EPPB Mask */
-
-#define SCB_ABFSR_AXIM_Pos                  3U                                            /*!< SCB ABFSR: AXIM Position*/
-#define SCB_ABFSR_AXIM_Msk                 (1UL << SCB_ABFSR_AXIM_Pos)                    /*!< SCB ABFSR: AXIM Mask */
-
-#define SCB_ABFSR_AHBP_Pos                  2U                                            /*!< SCB ABFSR: AHBP Position*/
-#define SCB_ABFSR_AHBP_Msk                 (1UL << SCB_ABFSR_AHBP_Pos)                    /*!< SCB ABFSR: AHBP Mask */
-
-#define SCB_ABFSR_DTCM_Pos                  1U                                            /*!< SCB ABFSR: DTCM Position*/
-#define SCB_ABFSR_DTCM_Msk                 (1UL << SCB_ABFSR_DTCM_Pos)                    /*!< SCB ABFSR: DTCM Mask */
-
-#define SCB_ABFSR_ITCM_Pos                  0U                                            /*!< SCB ABFSR: ITCM Position*/
-#define SCB_ABFSR_ITCM_Msk                 (1UL /*<< SCB_ABFSR_ITCM_Pos*/)                /*!< SCB ABFSR: ITCM Mask */
-
 /*@} end of group CMSIS_SCB */
 
 
@@ -1097,10 +1017,7 @@
   __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
         uint32_t RESERVED2[15U];
   __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[29U];
-  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
-  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
-  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
+        uint32_t RESERVED3[32U];
         uint32_t RESERVED4[43U];
   __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
   __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
@@ -1163,18 +1080,6 @@
 #define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
 #define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
 
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
-
 /* ITM Lock Status Register Definitions */
 #define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
 #define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
@@ -2168,7 +2073,7 @@
 #define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
 #define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
 #define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
-#define EXC_RETURN_SPSEL           (0x00000002UL)     /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP           */
+#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
 #define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
 
 /* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
@@ -2197,7 +2102,7 @@
   reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
   reg_value  =  (reg_value                                   |
                 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priority group */
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
   SCB->AIRCR =  reg_value;
 }
 
@@ -2223,7 +2128,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -2515,6 +2422,7 @@
 {
   uint32_t *vectors = (uint32_t *)SCB->VTOR;
   vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
 }
 
 
diff --git a/Include/core_cm35p.h b/Include/core_cm35p.h
new file mode 100644
index 0000000..5579c82
--- /dev/null
+++ b/Include/core_cm35p.h
@@ -0,0 +1,2910 @@
+/**************************************************************************//**
+ * @file     core_cm35p.h
+ * @brief    CMSIS Cortex-M35P Core Peripheral Access Layer Header File
+ * @version  V1.0.0
+ * @date     12. November 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CORE_CM35P_H_GENERIC
+#define __CORE_CM35P_H_GENERIC
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_M35P
+  @{
+ */
+
+#include "cmsis_version.h"
+
+/*  CMSIS CM35P definitions */
+#define __CM35P_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                  /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM35P_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                   /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __CM35P_CMSIS_VERSION       ((__CM35P_CMSIS_VERSION_MAIN << 16U) | \
+                                      __CM35P_CMSIS_VERSION_SUB           )    /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                 (35U)                                       /*!< Cortex-M Core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
+*/
+#if defined ( __CC_ARM )
+  #if defined (__TARGET_FPU_VFP)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined (__ARM_FP)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined (__ARMVFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined (__TI_VFP_SUPPORT__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined (__FPU_VFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM35P_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM35P_H_DEPENDANT
+#define __CORE_CM35P_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __CM35P_REV
+    #define __CM35P_REV               0x0000U
+    #warning "__CM35P_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __FPU_PRESENT
+    #define __FPU_PRESENT             0U
+    #warning "__FPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __SAUREGION_PRESENT
+    #define __SAUREGION_PRESENT       0U
+    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __DSP_PRESENT
+    #define __DSP_PRESENT             0U
+    #warning "__DSP_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          3U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group Cortex_M35P */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+  - Core SAU Register
+  - Core FPU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
+#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
+
+#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
+#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
+#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
+
+#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */
+#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
+#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
+    uint32_t FPCA:1;                     /*!< bit:      2  Floating-point context active */
+    uint32_t SFPA:1;                     /*!< bit:      3  Secure floating-point active */
+    uint32_t _reserved1:28;              /*!< bit:  4..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SFPA_Pos                    3U                                            /*!< CONTROL: SFPA Position */
+#define CONTROL_SFPA_Msk                   (1UL << CONTROL_SFPA_Pos)                      /*!< CONTROL: SFPA Mask */
+
+#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
+#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
+
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[16U];
+  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RSERVED1[16U];
+  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[16U];
+  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[16U];
+  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[16U];
+  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
+        uint32_t RESERVED5[16U];
+  __IOM uint8_t  IPR[496U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        uint32_t RESERVED6[580U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
+}  NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+  __IM  uint32_t ID_ADR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+  __IM  uint32_t ID_MMFR[4U];            /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+  __IM  uint32_t ID_ISAR[6U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
+  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
+  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
+  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
+  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
+  __IOM uint32_t NSACR;                  /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */
+        uint32_t RESERVED3[92U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
+        uint32_t RESERVED4[15U];
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
+        uint32_t RESERVED5[1U];
+  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
+        uint32_t RESERVED6[1U];
+  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
+  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
+  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
+  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
+  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
+  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
+  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
+  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
+#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
+
+#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
+#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
+
+#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
+#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
+#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
+#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
+
+#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
+#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
+#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
+#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
+#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
+
+#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
+#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
+
+#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
+#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
+
+#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
+#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
+#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTPENDED_Pos    20U                                            /*!< SCB SHCSR: SECUREFAULTPENDED Position */
+#define SCB_SHCSR_SECUREFAULTPENDED_Msk    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos)       /*!< SCB SHCSR: SECUREFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTENA_Pos       19U                                            /*!< SCB SHCSR: SECUREFAULTENA Position */
+#define SCB_SHCSR_SECUREFAULTENA_Msk       (1UL << SCB_SHCSR_SECUREFAULTENA_Pos)          /*!< SCB SHCSR: SECUREFAULTENA Mask */
+
+#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
+#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
+
+#define SCB_SHCSR_SECUREFAULTACT_Pos        4U                                            /*!< SCB SHCSR: SECUREFAULTACT Position */
+#define SCB_SHCSR_SECUREFAULTACT_Msk       (1UL << SCB_SHCSR_SECUREFAULTACT_Pos)          /*!< SCB SHCSR: SECUREFAULTACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
+#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */
+#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
+
+#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
+#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
+
+#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_STKOF_Pos                (SCB_CFSR_USGFAULTSR_Pos + 4U)                  /*!< SCB CFSR (UFSR): STKOF Position */
+#define SCB_CFSR_STKOF_Msk                (1UL << SCB_CFSR_STKOF_Pos)                     /*!< SCB CFSR (UFSR): STKOF Mask */
+
+#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
+
+/* SCB Non-Secure Access Control Register Definitions */
+#define SCB_NSACR_CP11_Pos                 11U                                            /*!< SCB NSACR: CP11 Position */
+#define SCB_NSACR_CP11_Msk                 (1UL << SCB_NSACR_CP11_Pos)                    /*!< SCB NSACR: CP11 Mask */
+
+#define SCB_NSACR_CP10_Pos                 10U                                            /*!< SCB NSACR: CP10 Position */
+#define SCB_NSACR_CP10_Msk                 (1UL << SCB_NSACR_CP10_Pos)                    /*!< SCB NSACR: CP10 Mask */
+
+#define SCB_NSACR_CPn_Pos                   0U                                            /*!< SCB NSACR: CPn Position */
+#define SCB_NSACR_CPn_Msk                  (1UL /*<< SCB_NSACR_CPn_Pos*/)                 /*!< SCB NSACR: CPn Mask */
+
+/* SCB Cache Level ID Register Definitions */
+#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
+#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
+
+#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
+#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
+
+/* SCB Cache Type Register Definitions */
+#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
+#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
+
+#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
+#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
+
+#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
+#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
+
+#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
+#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
+
+#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
+#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
+
+/* SCB Cache Size ID Register Definitions */
+#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
+#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
+
+#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
+#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
+
+#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
+#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
+
+#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
+#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
+
+#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
+#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
+
+#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
+#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
+
+#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
+#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
+
+/* SCB Cache Size Selection Register Definitions */
+#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
+#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
+
+#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
+#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
+
+/* SCB Software Triggered Interrupt Register Definitions */
+#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
+#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
+
+/* SCB D-Cache Invalidate by Set-way Register Definitions */
+#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
+#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
+
+#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
+#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
+
+/* SCB D-Cache Clean by Set-way Register Definitions */
+#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
+#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
+
+#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
+#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
+
+/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
+#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
+#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
+
+#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
+#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
+  __IOM uint32_t CPPWR;                  /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+  __OM  union
+  {
+    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+        uint32_t RESERVED0[864U];
+  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        uint32_t RESERVED1[15U];
+  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        uint32_t RESERVED2[15U];
+  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        uint32_t RESERVED3[32U];
+        uint32_t RESERVED4[43U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        uint32_t RESERVED5[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */
+        uint32_t RESERVED6[4U];
+  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+} ITM_Type;
+
+/* ITM Stimulus Port Register Definitions */
+#define ITM_STIM_DISABLED_Pos               1U                                            /*!< ITM STIM: DISABLED Position */
+#define ITM_STIM_DISABLED_Msk              (0x1UL << ITM_STIM_DISABLED_Pos)               /*!< ITM STIM: DISABLED Mask */
+
+#define ITM_STIM_FIFOREADY_Pos              0U                                            /*!< ITM STIM: FIFOREADY Position */
+#define ITM_STIM_FIFOREADY_Msk             (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/)          /*!< ITM STIM: FIFOREADY Mask */
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TRACEBUSID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TRACEBUSID_Msk             (0x7FUL << ITM_TCR_TRACEBUSID_Pos)             /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPRESCALE_Pos              8U                                            /*!< ITM TCR: TSPRESCALE Position */
+#define ITM_TCR_TSPRESCALE_Msk             (3UL << ITM_TCR_TSPRESCALE_Pos)                /*!< ITM TCR: TSPRESCALE Mask */
+
+#define ITM_TCR_STALLENA_Pos                5U                                            /*!< ITM TCR: STALLENA Position */
+#define ITM_TCR_STALLENA_Msk               (1UL << ITM_TCR_STALLENA_Pos)                  /*!< ITM TCR: STALLENA Mask */
+
+#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
+  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
+  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+        uint32_t RESERVED3[1U];
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+        uint32_t RESERVED5[1U];
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED6[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+        uint32_t RESERVED7[1U];
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+        uint32_t RESERVED8[1U];
+  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
+        uint32_t RESERVED9[1U];
+  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
+        uint32_t RESERVED10[1U];
+  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
+        uint32_t RESERVED11[1U];
+  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
+        uint32_t RESERVED12[1U];
+  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
+        uint32_t RESERVED13[1U];
+  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
+        uint32_t RESERVED14[1U];
+  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
+        uint32_t RESERVED15[1U];
+  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
+        uint32_t RESERVED16[1U];
+  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
+        uint32_t RESERVED17[1U];
+  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
+        uint32_t RESERVED18[1U];
+  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
+        uint32_t RESERVED19[1U];
+  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
+        uint32_t RESERVED20[1U];
+  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
+        uint32_t RESERVED21[1U];
+  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
+        uint32_t RESERVED22[1U];
+  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
+        uint32_t RESERVED23[1U];
+  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
+        uint32_t RESERVED24[1U];
+  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
+        uint32_t RESERVED25[1U];
+  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
+        uint32_t RESERVED26[1U];
+  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
+        uint32_t RESERVED27[1U];
+  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
+        uint32_t RESERVED28[1U];
+  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
+        uint32_t RESERVED29[1U];
+  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
+        uint32_t RESERVED30[1U];
+  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
+        uint32_t RESERVED31[1U];
+  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
+        uint32_t RESERVED32[934U];
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
+        uint32_t RESERVED33[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  Device Architecture Register */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCDISS_Pos               23U                                         /*!< DWT CTRL: CYCDISS Position */
+#define DWT_CTRL_CYCDISS_Msk               (0x1UL << DWT_CTRL_CYCDISS_Pos)             /*!< DWT CTRL: CYCDISS Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
+#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
+
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
+#define DWT_FUNCTION_ACTION_Msk            (0x1UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
+
+#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
+#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */
+        uint32_t RESERVED3[759U];
+  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
+  __IM  uint32_t ITFTTD0;                /*!< Offset: 0xEEC (R/ )  Integration Test FIFO Test Data 0 Register */
+  __IOM uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/W)  Integration Test ATB Control Register 2 */
+        uint32_t RESERVED4[1U];
+  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  Integration Test ATB Control Register 0 */
+  __IM  uint32_t ITFTTD1;                /*!< Offset: 0xEFC (R/ )  Integration Test FIFO Test Data 1 Register */
+  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+        uint32_t RESERVED5[39U];
+  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+        uint32_t RESERVED7[8U];
+  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  Device Configuration Register */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Identifier Register */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */
+#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */
+
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI TRIGGER Register Definitions */
+#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
+
+/* TPI Integration Test FIFO Test Data 0 Register Definitions */
+#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */
+#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */
+
+#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */
+#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */
+#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */
+#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data2_Pos      16U                                         /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */
+#define TPI_ITFTTD0_ATB_IF1_data2_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data1_Pos       8U                                         /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */
+#define TPI_ITFTTD0_ATB_IF1_data1_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data0_Pos       0U                                          /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */
+#define TPI_ITFTTD0_ATB_IF1_data0_Msk      (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */
+
+/* TPI Integration Test ATB Control Register 2 Register Definitions */
+#define TPI_ITATBCTR2_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID2S Position */
+#define TPI_ITATBCTR2_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos)      /*!< TPI ITATBCTR2: AFVALID2SS Mask */
+
+#define TPI_ITATBCTR2_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID1S Position */
+#define TPI_ITATBCTR2_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos)      /*!< TPI ITATBCTR2: AFVALID1SS Mask */
+
+#define TPI_ITATBCTR2_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY2S Position */
+#define TPI_ITATBCTR2_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY2S Mask */
+
+#define TPI_ITATBCTR2_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY1S Position */
+#define TPI_ITATBCTR2_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY1S Mask */
+
+/* TPI Integration Test FIFO Test Data 1 Register Definitions */
+#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */
+#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */
+#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */
+
+#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */
+#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */
+
+#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */
+#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data2_Pos      16U                                         /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */
+#define TPI_ITFTTD1_ATB_IF2_data2_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data1_Pos       8U                                         /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */
+#define TPI_ITFTTD1_ATB_IF2_data1_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data0_Pos       0U                                          /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */
+#define TPI_ITFTTD1_ATB_IF2_data0_Msk      (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */
+
+/* TPI Integration Test ATB Control Register 0 Definitions */
+#define TPI_ITATBCTR0_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID2S Position */
+#define TPI_ITATBCTR0_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos)      /*!< TPI ITATBCTR0: AFVALID2SS Mask */
+
+#define TPI_ITATBCTR0_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID1S Position */
+#define TPI_ITATBCTR0_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos)      /*!< TPI ITATBCTR0: AFVALID1SS Mask */
+
+#define TPI_ITATBCTR0_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY2S Position */
+#define TPI_ITATBCTR0_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY2S Mask */
+
+#define TPI_ITATBCTR0_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY1S Position */
+#define TPI_ITATBCTR0_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY1S Mask */
+
+/* TPI Integration Mode Control Register Definitions */
+#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFOSZ Position */
+#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFOSZ Mask */
+
+#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk         (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+
+#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
+  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */
+  __IOM uint32_t RLAR_A1;                /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */
+  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */
+  __IOM uint32_t RLAR_A2;                /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */
+  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */
+  __IOM uint32_t RLAR_A3;                /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */
+        uint32_t RESERVED0[1];
+  union {
+  __IOM uint32_t MAIR[2];
+  struct {
+  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
+  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
+  };
+  };
+} MPU_Type;
+
+#define MPU_TYPE_RALIASES                  4U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */
+#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */
+
+#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
+#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
+
+#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
+#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
+
+#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
+#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
+
+/* MPU Region Limit Address Register Definitions */
+#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
+#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
+
+#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
+#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
+
+#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: Region enable bit Position */
+#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: Region enable bit Disable Mask */
+
+/* MPU Memory Attribute Indirection Register 0 Definitions */
+#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
+#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
+
+#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
+#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
+
+#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
+#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
+
+#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
+#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
+
+/* MPU Memory Attribute Indirection Register 1 Definitions */
+#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
+#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
+
+#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
+#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
+
+#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
+#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
+
+#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
+#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
+  \brief    Type definitions for the Security Attribution Unit (SAU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Security Attribution Unit (SAU).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
+#else
+        uint32_t RESERVED0[3];
+#endif
+  __IOM uint32_t SFSR;                   /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */
+  __IOM uint32_t SFAR;                   /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */
+} SAU_Type;
+
+/* SAU Control Register Definitions */
+#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
+#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
+
+#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
+#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
+
+/* SAU Type Register Definitions */
+#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
+#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
+
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+/* SAU Region Number Register Definitions */
+#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
+#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
+
+/* SAU Region Base Address Register Definitions */
+#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
+#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
+
+/* SAU Region Limit Address Register Definitions */
+#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
+#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
+
+#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
+#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
+
+#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
+#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
+
+#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
+
+/* Secure Fault Status Register Definitions */
+#define SAU_SFSR_LSERR_Pos                  7U                                            /*!< SAU SFSR: LSERR Position */
+#define SAU_SFSR_LSERR_Msk                 (1UL << SAU_SFSR_LSERR_Pos)                    /*!< SAU SFSR: LSERR Mask */
+
+#define SAU_SFSR_SFARVALID_Pos              6U                                            /*!< SAU SFSR: SFARVALID Position */
+#define SAU_SFSR_SFARVALID_Msk             (1UL << SAU_SFSR_SFARVALID_Pos)                /*!< SAU SFSR: SFARVALID Mask */
+
+#define SAU_SFSR_LSPERR_Pos                 5U                                            /*!< SAU SFSR: LSPERR Position */
+#define SAU_SFSR_LSPERR_Msk                (1UL << SAU_SFSR_LSPERR_Pos)                   /*!< SAU SFSR: LSPERR Mask */
+
+#define SAU_SFSR_INVTRAN_Pos                4U                                            /*!< SAU SFSR: INVTRAN Position */
+#define SAU_SFSR_INVTRAN_Msk               (1UL << SAU_SFSR_INVTRAN_Pos)                  /*!< SAU SFSR: INVTRAN Mask */
+
+#define SAU_SFSR_AUVIOL_Pos                 3U                                            /*!< SAU SFSR: AUVIOL Position */
+#define SAU_SFSR_AUVIOL_Msk                (1UL << SAU_SFSR_AUVIOL_Pos)                   /*!< SAU SFSR: AUVIOL Mask */
+
+#define SAU_SFSR_INVER_Pos                  2U                                            /*!< SAU SFSR: INVER Position */
+#define SAU_SFSR_INVER_Msk                 (1UL << SAU_SFSR_INVER_Pos)                    /*!< SAU SFSR: INVER Mask */
+
+#define SAU_SFSR_INVIS_Pos                  1U                                            /*!< SAU SFSR: INVIS Position */
+#define SAU_SFSR_INVIS_Msk                 (1UL << SAU_SFSR_INVIS_Pos)                    /*!< SAU SFSR: INVIS Mask */
+
+#define SAU_SFSR_INVEP_Pos                  0U                                            /*!< SAU SFSR: INVEP Position */
+#define SAU_SFSR_INVEP_Msk                 (1UL /*<< SAU_SFSR_INVEP_Pos*/)                /*!< SAU SFSR: INVEP Mask */
+
+/*@} end of group CMSIS_SAU */
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
+  \brief    Type definitions for the Floating Point Unit (FPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Floating Point Unit (FPU).
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
+  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
+  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
+} FPU_Type;
+
+/* Floating-Point Context Control Register Definitions */
+#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
+#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
+
+#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
+#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
+
+#define FPU_FPCCR_LSPENS_Pos               29U                                            /*!< FPCCR: LSPENS Position */
+#define FPU_FPCCR_LSPENS_Msk               (1UL << FPU_FPCCR_LSPENS_Pos)                  /*!< FPCCR: LSPENS bit Mask */
+
+#define FPU_FPCCR_CLRONRET_Pos             28U                                            /*!< FPCCR: CLRONRET Position */
+#define FPU_FPCCR_CLRONRET_Msk             (1UL << FPU_FPCCR_CLRONRET_Pos)                /*!< FPCCR: CLRONRET bit Mask */
+
+#define FPU_FPCCR_CLRONRETS_Pos            27U                                            /*!< FPCCR: CLRONRETS Position */
+#define FPU_FPCCR_CLRONRETS_Msk            (1UL << FPU_FPCCR_CLRONRETS_Pos)               /*!< FPCCR: CLRONRETS bit Mask */
+
+#define FPU_FPCCR_TS_Pos                   26U                                            /*!< FPCCR: TS Position */
+#define FPU_FPCCR_TS_Msk                   (1UL << FPU_FPCCR_TS_Pos)                      /*!< FPCCR: TS bit Mask */
+
+#define FPU_FPCCR_UFRDY_Pos                10U                                            /*!< FPCCR: UFRDY Position */
+#define FPU_FPCCR_UFRDY_Msk                (1UL << FPU_FPCCR_UFRDY_Pos)                   /*!< FPCCR: UFRDY bit Mask */
+
+#define FPU_FPCCR_SPLIMVIOL_Pos             9U                                            /*!< FPCCR: SPLIMVIOL Position */
+#define FPU_FPCCR_SPLIMVIOL_Msk            (1UL << FPU_FPCCR_SPLIMVIOL_Pos)               /*!< FPCCR: SPLIMVIOL bit Mask */
+
+#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
+#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
+
+#define FPU_FPCCR_SFRDY_Pos                 7U                                            /*!< FPCCR: SFRDY Position */
+#define FPU_FPCCR_SFRDY_Msk                (1UL << FPU_FPCCR_SFRDY_Pos)                   /*!< FPCCR: SFRDY bit Mask */
+
+#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
+#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
+
+#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
+#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
+
+#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
+#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
+
+#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
+#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
+
+#define FPU_FPCCR_S_Pos                     2U                                            /*!< FPCCR: Security status of the FP context bit Position */
+#define FPU_FPCCR_S_Msk                    (1UL << FPU_FPCCR_S_Pos)                       /*!< FPCCR: Security status of the FP context bit Mask */
+
+#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
+#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
+
+#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
+#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
+
+/* Floating-Point Context Address Register Definitions */
+#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
+#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
+
+/* Floating-Point Default Status Control Register Definitions */
+#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
+#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
+
+#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
+#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
+
+#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
+#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
+
+#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
+#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
+
+/* Media and FP Feature Register 0 Definitions */
+#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
+#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
+
+#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
+#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
+
+#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
+#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
+
+#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
+#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
+
+#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
+#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
+
+#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
+#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
+
+#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
+#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
+
+#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
+#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
+
+/* Media and FP Feature Register 1 Definitions */
+#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
+#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
+
+#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
+#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
+
+#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
+#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
+
+#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
+#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
+
+/*@} end of group CMSIS_FPU */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */
+#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+
+/* Debug Authentication Control Register Definitions */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
+
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
+
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
+
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
+
+/* Debug Security Control and Status Register Definitions */
+#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */
+#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */
+
+#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */
+#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */
+
+#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */
+#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
+  #define ITM_BASE            (0xE0000000UL)                             /*!< ITM Base Address */
+  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
+  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
+  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */
+  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
+  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
+  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
+
+  #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE         ) /*!< System control Register not in SCB */
+  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
+  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
+  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
+  #define ITM                 ((ITM_Type       *)     ITM_BASE         ) /*!< ITM configuration struct */
+  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
+  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
+  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
+    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
+  #endif
+
+  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
+    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
+  #endif
+
+  #define FPU_BASE            (SCS_BASE +  0x0F30UL)                     /*!< Floating Point Unit */
+  #define FPU                 ((FPU_Type       *)     FPU_BASE         ) /*!< Floating Point Unit */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
+  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */
+  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
+  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
+  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
+
+  #define SCnSCB_NS           ((SCnSCB_Type    *)     SCS_BASE_NS      ) /*!< System control Register not in SCB(non-secure address space) */
+  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
+  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
+  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
+  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
+    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
+  #endif
+
+  #define FPU_BASE_NS         (SCS_BASE_NS +  0x0F30UL)                  /*!< Floating Point Unit               (non-secure address space) */
+  #define FPU_NS              ((FPU_Type       *)     FPU_BASE_NS      ) /*!< Floating Point Unit               (non-secure address space) */
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Debug Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */
+
+/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */ 
+#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */
+
+/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
+#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */
+#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */
+#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
+#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
+#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
+#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
+#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
+
+/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
+#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */
+#else 
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */
+#endif
+
+
+/**
+  \brief   Set Priority Grouping
+  \details Sets the priority grouping field using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+  SCB->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Interrupt Target State
+  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+  \return             1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Target State
+  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Clear Interrupt Target State
+  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
+                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Set Priority Grouping (non-secure)
+  \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB_NS->AIRCR;                                                /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+  SCB_NS->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping (non-secure)
+  \details Reads the priority grouping field from the non-secure NVIC when in secure state.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
+{
+  return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt (non-secure)
+  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status (non-secure)
+  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt (non-secure)
+  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt (non-secure)
+  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt (non-secure)
+  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt (non-secure)
+  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt (non-secure)
+  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority (non-secure)
+  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every non-secure processor exception.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority (non-secure)
+  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+/* ##########################  MPU functions  #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv8.h"
+
+#endif
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+  uint32_t mvfr0;
+
+  mvfr0 = FPU->MVFR0;
+  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
+  {
+    return 2U;           /* Double + Single precision FPU */
+  }
+  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
+  {
+    return 1U;           /* Single precision FPU */
+  }
+  else
+  {
+    return 0U;           /* No FPU */
+  }
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+
+/* ##########################   SAU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SAUFunctions SAU Functions
+  \brief    Functions that configure the SAU.
+  @{
+ */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
+/**
+  \brief   Enable SAU
+  \details Enables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Enable(void)
+{
+    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
+}
+
+
+
+/**
+  \brief   Disable SAU
+  \details Disables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Disable(void)
+{
+    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
+}
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_SAUFunctions */
+
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   System Tick Configuration (non-secure)
+  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                         /* Reload value impossible */
+  }
+
+  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
+  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
+  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                      SysTick_CTRL_TICKINT_Msk   |
+                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                           /* Function successful */
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_core_DebugFunctions ITM Functions
+  \brief    Functions that access the ITM debug interface.
+  @{
+ */
+
+extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
+#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/**
+  \brief   ITM Send Character
+  \details Transmits a character via the ITM channel 0, and
+           \li Just returns when no debugger is connected that has booked the output.
+           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+  \param [in]     ch  Character to transmit.
+  \returns            Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
+      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
+  {
+    while (ITM->PORT[0U].u32 == 0UL)
+    {
+      __NOP();
+    }
+    ITM->PORT[0U].u8 = (uint8_t)ch;
+  }
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Receive Character
+  \details Inputs a character via the external variable \ref ITM_RxBuffer.
+  \return             Received character.
+  \return         -1  No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
+  int32_t ch = -1;                           /* no character available */
+
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+  {
+    ch = ITM_RxBuffer;
+    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
+  }
+
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Check Character
+  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+  \return          0  No character available.
+  \return          1  Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
+
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+  {
+    return (0);                              /* no character available */
+  }
+  else
+  {
+    return (1);                              /*    character available */
+  }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM35P_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Include/core_cm4.h b/Include/core_cm4.h
index 7d56873..12c023b 100644
--- a/Include/core_cm4.h
+++ b/Include/core_cm4.h
@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     core_cm4.h
  * @brief    CMSIS Cortex-M4 Core Peripheral Access Layer Header File
- * @version  V5.0.8
- * @date     04. June 2018
+ * @version  V5.1.0
+ * @date     13. March 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -86,7 +86,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
+  #if defined __ARM_FP
     #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
       #define __FPU_USED       1U
     #else
@@ -408,7 +408,7 @@
   __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
         uint32_t RESERVED0[24U];
   __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[24U];
+        uint32_t RESERVED1[24U];
   __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
         uint32_t RESERVED2[24U];
   __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
@@ -822,10 +822,7 @@
   __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
         uint32_t RESERVED2[15U];
   __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[29U];
-  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
-  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
-  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
+        uint32_t RESERVED3[32U];
         uint32_t RESERVED4[43U];
   __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
   __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
@@ -876,18 +873,6 @@
 #define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
 #define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
 
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
-
 /* ITM Lock Status Register Definitions */
 #define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
 #define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
@@ -1120,13 +1105,13 @@
 
 /* TPI Integration ETM Data Register Definitions (FIFO0) */
 #define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
 
 #define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
 #define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
 
 #define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
 
 #define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
 #define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
@@ -1149,13 +1134,13 @@
 
 /* TPI Integration ITM Data Register Definitions (FIFO1) */
 #define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
 
 #define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
 #define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
 
 #define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
 
 #define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
 #define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
@@ -1324,6 +1309,7 @@
   __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
   __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
   __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x018 (R/ )  Media and FP Feature Register 2 */
 } FPU_Type;
 
 /* Floating-Point Context Control Register Definitions */
@@ -1409,6 +1395,11 @@
 #define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
 #define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
 
+/* Media and FP Feature Register 2 Definitions */
+
+#define FPU_MVFR2_VFP_Misc_Pos              4U                                            /*!< MVFR2: VFP Misc bits Position */
+#define FPU_MVFR2_VFP_Misc_Msk             (0xFUL << FPU_MVFR2_VFP_Misc_Pos)              /*!< MVFR2: VFP Misc bits Mask */
+
 /*@} end of group CMSIS_FPU */
 
 
@@ -1625,7 +1616,7 @@
 
 #ifdef CMSIS_VECTAB_VIRTUAL
   #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-   #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
   #endif
   #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
 #else
@@ -1689,7 +1680,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -1912,8 +1905,9 @@
  */
 __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
 {
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
+  /* ARM Application Note 321 states that the M4 does not require the architectural barrier */
 }
 
 
@@ -1927,8 +1921,8 @@
  */
 __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
 {
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
 }
 
 
@@ -1953,6 +1947,7 @@
 
 /*@} end of CMSIS_Core_NVICFunctions */
 
+
 /* ##########################  MPU functions  #################################### */
 
 #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
diff --git a/Include/core_cm7.h b/Include/core_cm7.h
index a14dc62..c4515d8 100644
--- a/Include/core_cm7.h
+++ b/Include/core_cm7.h
@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     core_cm7.h
  * @brief    CMSIS Cortex-M7 Core Peripheral Access Layer Header File
- * @version  V5.0.8
- * @date     04. June 2018
+ * @version  V5.1.1
+ * @date     28. March 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -86,7 +86,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
+  #if defined __ARM_FP
     #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
       #define __FPU_USED       1U
     #else
@@ -423,7 +423,7 @@
   __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
         uint32_t RESERVED0[24U];
   __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[24U];
+        uint32_t RESERVED1[24U];
   __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
         uint32_t RESERVED2[24U];
   __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
@@ -930,6 +930,24 @@
 #define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
 
 /* Auxiliary Control Register Definitions */
+#define SCnSCB_ACTLR_DISDYNADD_Pos         26U                                         /*!< ACTLR: DISDYNADD Position */
+#define SCnSCB_ACTLR_DISDYNADD_Msk         (1UL << SCnSCB_ACTLR_DISDYNADD_Pos)         /*!< ACTLR: DISDYNADD Mask */
+
+#define SCnSCB_ACTLR_DISISSCH1_Pos         21U                                         /*!< ACTLR: DISISSCH1 Position */
+#define SCnSCB_ACTLR_DISISSCH1_Msk         (0x1FUL << SCnSCB_ACTLR_DISISSCH1_Pos)      /*!< ACTLR: DISISSCH1 Mask */
+
+#define SCnSCB_ACTLR_DISDI_Pos             16U                                         /*!< ACTLR: DISDI Position */
+#define SCnSCB_ACTLR_DISDI_Msk             (0x1FUL << SCnSCB_ACTLR_DISDI_Pos)          /*!< ACTLR: DISDI Mask */
+
+#define SCnSCB_ACTLR_DISCRITAXIRUR_Pos     15U                                         /*!< ACTLR: DISCRITAXIRUR Position */
+#define SCnSCB_ACTLR_DISCRITAXIRUR_Msk     (1UL << SCnSCB_ACTLR_DISCRITAXIRUR_Pos)     /*!< ACTLR: DISCRITAXIRUR Mask */
+
+#define SCnSCB_ACTLR_DISBTACALLOC_Pos      14U                                         /*!< ACTLR: DISBTACALLOC Position */
+#define SCnSCB_ACTLR_DISBTACALLOC_Msk      (1UL << SCnSCB_ACTLR_DISBTACALLOC_Pos)      /*!< ACTLR: DISBTACALLOC Mask */
+
+#define SCnSCB_ACTLR_DISBTACREAD_Pos       13U                                         /*!< ACTLR: DISBTACREAD Position */
+#define SCnSCB_ACTLR_DISBTACREAD_Msk       (1UL << SCnSCB_ACTLR_DISBTACREAD_Pos)       /*!< ACTLR: DISBTACREAD Mask */
+
 #define SCnSCB_ACTLR_DISITMATBFLUSH_Pos    12U                                         /*!< ACTLR: DISITMATBFLUSH Position */
 #define SCnSCB_ACTLR_DISITMATBFLUSH_Msk    (1UL << SCnSCB_ACTLR_DISITMATBFLUSH_Pos)    /*!< ACTLR: DISITMATBFLUSH Mask */
 
@@ -1024,10 +1042,7 @@
   __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
         uint32_t RESERVED2[15U];
   __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[29U];
-  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
-  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
-  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
+        uint32_t RESERVED3[32U];
         uint32_t RESERVED4[43U];
   __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
   __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
@@ -1078,18 +1093,6 @@
 #define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
 #define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
 
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
-
 /* ITM Lock Status Register Definitions */
 #define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
 #define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
@@ -1325,13 +1328,13 @@
 
 /* TPI Integration ETM Data Register Definitions (FIFO0) */
 #define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
 
 #define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
 #define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
 
 #define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
 
 #define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
 #define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
@@ -1354,13 +1357,13 @@
 
 /* TPI Integration ITM Data Register Definitions (FIFO1) */
 #define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
 
 #define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
 #define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
 
 #define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
 
 #define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
 #define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
@@ -1617,6 +1620,9 @@
 
 /* Media and FP Feature Register 2 Definitions */
 
+#define FPU_MVFR2_VFP_Misc_Pos              4U                                            /*!< MVFR2: VFP Misc bits Position */
+#define FPU_MVFR2_VFP_Misc_Msk             (0xFUL << FPU_MVFR2_VFP_Misc_Pos)              /*!< MVFR2: VFP Misc bits Mask */
+
 /*@} end of group CMSIS_FPU */
 
 
@@ -1897,7 +1903,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -2120,8 +2128,9 @@
  */
 __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
 {
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
+  __DSB();
 }
 
 
@@ -2135,8 +2144,8 @@
  */
 __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
 {
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
 }
 
 
@@ -2161,6 +2170,7 @@
 
 /*@} end of CMSIS_Core_NVICFunctions */
 
+
 /* ##########################  MPU functions  #################################### */
 
 #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
@@ -2169,6 +2179,7 @@
 
 #endif
 
+
 /* ##########################  FPU functions  #################################### */
 /**
   \ingroup  CMSIS_Core_FunctionInterface
@@ -2204,7 +2215,6 @@
   }
 }
 
-
 /*@} end of CMSIS_Core_FpuFunctions */
 
 
@@ -2221,14 +2231,18 @@
 #define CCSIDR_WAYS(x)         (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)
 #define CCSIDR_SETS(x)         (((x) & SCB_CCSIDR_NUMSETS_Msk      ) >> SCB_CCSIDR_NUMSETS_Pos      )
 
+#define __SCB_DCACHE_LINE_SIZE  32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
+#define __SCB_ICACHE_LINE_SIZE  32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
 
 /**
   \brief   Enable I-Cache
   \details Turns on I-Cache
   */
-__STATIC_INLINE void SCB_EnableICache (void)
+__STATIC_FORCEINLINE void SCB_EnableICache (void)
 {
   #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
+    if (SCB->CCR & SCB_CCR_IC_Msk) return;  /* return if ICache is already enabled */
+
     __DSB();
     __ISB();
     SCB->ICIALLU = 0UL;                     /* invalidate I-Cache */
@@ -2245,7 +2259,7 @@
   \brief   Disable I-Cache
   \details Turns off I-Cache
   */
-__STATIC_INLINE void SCB_DisableICache (void)
+__STATIC_FORCEINLINE void SCB_DisableICache (void)
 {
   #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
     __DSB();
@@ -2262,7 +2276,7 @@
   \brief   Invalidate I-Cache
   \details Invalidates I-Cache
   */
-__STATIC_INLINE void SCB_InvalidateICache (void)
+__STATIC_FORCEINLINE void SCB_InvalidateICache (void)
 {
   #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
     __DSB();
@@ -2275,17 +2289,49 @@
 
 
 /**
+  \brief   I-Cache Invalidate by address
+  \details Invalidates I-Cache for the given address.
+           I-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
+           I-Cache memory blocks which are part of given address + given size are invalidated.
+  \param[in]   addr    address
+  \param[in]   isize   size of memory block (in number of bytes)
+*/
+__STATIC_FORCEINLINE void SCB_InvalidateICache_by_Addr (void *addr, int32_t isize)
+{
+  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
+    if ( isize > 0 ) {
+       int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U));
+      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_ICACHE_LINE_SIZE - 1U) */;
+
+      __DSB();
+
+      do {
+        SCB->ICIMVAU = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */
+        op_addr += __SCB_ICACHE_LINE_SIZE;
+        op_size -= __SCB_ICACHE_LINE_SIZE;
+      } while ( op_size > 0 );
+
+      __DSB();
+      __ISB();
+    }
+  #endif
+}
+
+
+/**
   \brief   Enable D-Cache
   \details Turns on D-Cache
   */
-__STATIC_INLINE void SCB_EnableDCache (void)
+__STATIC_FORCEINLINE void SCB_EnableDCache (void)
 {
   #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
     uint32_t ccsidr;
     uint32_t sets;
     uint32_t ways;
 
-    SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/  /* Level 1 data cache */
+    if (SCB->CCR & SCB_CCR_DC_Msk) return;  /* return if DCache is already enabled */
+
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
     __DSB();
 
     ccsidr = SCB->CCSIDR;
@@ -2316,14 +2362,14 @@
   \brief   Disable D-Cache
   \details Turns off D-Cache
   */
-__STATIC_INLINE void SCB_DisableDCache (void)
+__STATIC_FORCEINLINE void SCB_DisableDCache (void)
 {
   #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
     uint32_t ccsidr;
     uint32_t sets;
     uint32_t ways;
 
-    SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/  /* Level 1 data cache */
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
     __DSB();
 
     SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk;  /* disable D-Cache */
@@ -2354,14 +2400,14 @@
   \brief   Invalidate D-Cache
   \details Invalidates D-Cache
   */
-__STATIC_INLINE void SCB_InvalidateDCache (void)
+__STATIC_FORCEINLINE void SCB_InvalidateDCache (void)
 {
   #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
     uint32_t ccsidr;
     uint32_t sets;
     uint32_t ways;
 
-    SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/  /* Level 1 data cache */
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
     __DSB();
 
     ccsidr = SCB->CCSIDR;
@@ -2389,15 +2435,15 @@
   \brief   Clean D-Cache
   \details Cleans D-Cache
   */
-__STATIC_INLINE void SCB_CleanDCache (void)
+__STATIC_FORCEINLINE void SCB_CleanDCache (void)
 {
   #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
     uint32_t ccsidr;
     uint32_t sets;
     uint32_t ways;
 
-     SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/  /* Level 1 data cache */
-   __DSB();
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
+    __DSB();
 
     ccsidr = SCB->CCSIDR;
 
@@ -2424,14 +2470,14 @@
   \brief   Clean & Invalidate D-Cache
   \details Cleans and Invalidates D-Cache
   */
-__STATIC_INLINE void SCB_CleanInvalidateDCache (void)
+__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void)
 {
   #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
     uint32_t ccsidr;
     uint32_t sets;
     uint32_t ways;
 
-    SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/  /* Level 1 data cache */
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
     __DSB();
 
     ccsidr = SCB->CCSIDR;
@@ -2457,27 +2503,30 @@
 
 /**
   \brief   D-Cache Invalidate by address
-  \details Invalidates D-Cache for the given address
-  \param[in]   addr    address (aligned to 32-byte boundary)
+  \details Invalidates D-Cache for the given address.
+           D-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
+           D-Cache memory blocks which are part of given address + given size are invalidated.
+  \param[in]   addr    address
   \param[in]   dsize   size of memory block (in number of bytes)
 */
-__STATIC_INLINE void SCB_InvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
+__STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (void *addr, int32_t dsize)
 {
   #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
-     int32_t op_size = dsize;
-    uint32_t op_addr = (uint32_t)addr;
-     int32_t linesize = 32;                /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */
+    if ( dsize > 0 ) { 
+       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
+      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
+    
+      __DSB();
 
-    __DSB();
+      do {
+        SCB->DCIMVAC = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */
+        op_addr += __SCB_DCACHE_LINE_SIZE;
+        op_size -= __SCB_DCACHE_LINE_SIZE;
+      } while ( op_size > 0 );
 
-    while (op_size > 0) {
-      SCB->DCIMVAC = op_addr;
-      op_addr += (uint32_t)linesize;
-      op_size -=           linesize;
+      __DSB();
+      __ISB();
     }
-
-    __DSB();
-    __ISB();
   #endif
 }
 
@@ -2485,26 +2534,29 @@
 /**
   \brief   D-Cache Clean by address
   \details Cleans D-Cache for the given address
-  \param[in]   addr    address (aligned to 32-byte boundary)
+           D-Cache is cleaned starting from a 32 byte aligned address in 32 byte granularity.
+           D-Cache memory blocks which are part of given address + given size are cleaned.
+  \param[in]   addr    address
   \param[in]   dsize   size of memory block (in number of bytes)
 */
-__STATIC_INLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize)
+__STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize)
 {
   #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
-     int32_t op_size = dsize;
-    uint32_t op_addr = (uint32_t) addr;
-     int32_t linesize = 32;                /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */
+    if ( dsize > 0 ) { 
+       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
+      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
+    
+      __DSB();
 
-    __DSB();
+      do {
+        SCB->DCCMVAC = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */
+        op_addr += __SCB_DCACHE_LINE_SIZE;
+        op_size -= __SCB_DCACHE_LINE_SIZE;
+      } while ( op_size > 0 );
 
-    while (op_size > 0) {
-      SCB->DCCMVAC = op_addr;
-      op_addr += (uint32_t)linesize;
-      op_size -=           linesize;
+      __DSB();
+      __ISB();
     }
-
-    __DSB();
-    __ISB();
   #endif
 }
 
@@ -2512,30 +2564,32 @@
 /**
   \brief   D-Cache Clean and Invalidate by address
   \details Cleans and invalidates D_Cache for the given address
+           D-Cache is cleaned and invalidated starting from a 32 byte aligned address in 32 byte granularity.
+           D-Cache memory blocks which are part of given address + given size are cleaned and invalidated.
   \param[in]   addr    address (aligned to 32-byte boundary)
   \param[in]   dsize   size of memory block (in number of bytes)
 */
-__STATIC_INLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
+__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
 {
   #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
-     int32_t op_size = dsize;
-    uint32_t op_addr = (uint32_t) addr;
-     int32_t linesize = 32;                /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */
+    if ( dsize > 0 ) { 
+       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
+      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
+    
+      __DSB();
 
-    __DSB();
+      do {
+        SCB->DCCIMVAC = op_addr;            /* register accepts only 32byte aligned values, only bits 31..5 are valid */
+        op_addr +=          __SCB_DCACHE_LINE_SIZE;
+        op_size -=          __SCB_DCACHE_LINE_SIZE;
+      } while ( op_size > 0 );
 
-    while (op_size > 0) {
-      SCB->DCCIMVAC = op_addr;
-      op_addr += (uint32_t)linesize;
-      op_size -=           linesize;
+      __DSB();
+      __ISB();
     }
-
-    __DSB();
-    __ISB();
   #endif
 }
 
-
 /*@} end of CMSIS_Core_CacheFunctions */
 
 
diff --git a/Include/core_sc000.h b/Include/core_sc000.h
index 9b67c92..cf92577 100644
--- a/Include/core_sc000.h
+++ b/Include/core_sc000.h
@@ -1,8 +1,8 @@
 /**************************************************************************//**
  * @file     core_sc000.h
  * @brief    CMSIS SC000 Core Peripheral Access Layer Header File
- * @version  V5.0.5
- * @date     28. May 2018
+ * @version  V5.0.6
+ * @date     12. November 2018
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -81,7 +81,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
+  #if defined __ARM_FP
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
@@ -750,7 +750,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -904,6 +906,7 @@
 {
   uint32_t *vectors = (uint32_t *)SCB->VTOR;
   vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  /* ARM Application Note 321 states that the M0 and M0+ do not require the architectural barrier - assume SC000 is the same */
 }
 
 
diff --git a/Include/core_sc300.h b/Include/core_sc300.h
index 3e8a471..40f3af8 100644
--- a/Include/core_sc300.h
+++ b/Include/core_sc300.h
@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     core_sc300.h
  * @brief    CMSIS SC300 Core Peripheral Access Layer Header File
- * @version  V5.0.6
- * @date     04. June 2018
+ * @version  V5.0.8
+ * @date     31. May 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -81,7 +81,7 @@
   #endif
 
 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
+  #if defined __ARM_FP
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
@@ -342,7 +342,7 @@
   __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
         uint32_t RESERVED0[24U];
   __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[24U];
+        uint32_t RESERVED1[24U];
   __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
         uint32_t RESERVED2[24U];
   __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
@@ -653,13 +653,23 @@
 {
         uint32_t RESERVED0[1U];
   __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
-        uint32_t RESERVED1[1U];
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
 } SCnSCB_Type;
 
 /* Interrupt Controller Type Register Definitions */
 #define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
 #define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
 
+/* Auxiliary Control Register Definitions */
+#define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: DISFOLD Position */
+#define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */
+
+#define SCnSCB_ACTLR_DISDEFWBUF_Pos         1U                                         /*!< ACTLR: DISDEFWBUF Position */
+#define SCnSCB_ACTLR_DISDEFWBUF_Msk        (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)        /*!< ACTLR: DISDEFWBUF Mask */
+
+#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
+#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
+
 /*@} end of group CMSIS_SCnotSCB */
 
 
@@ -739,10 +749,7 @@
   __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
         uint32_t RESERVED2[15U];
   __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[29U];
-  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
-  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
-  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
+        uint32_t RESERVED3[32U];
         uint32_t RESERVED4[43U];
   __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
   __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
@@ -793,18 +800,6 @@
 #define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
 #define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
 
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
-
 /* ITM Lock Status Register Definitions */
 #define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
 #define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
@@ -1037,13 +1032,13 @@
 
 /* TPI Integration ETM Data Register Definitions (FIFO0) */
 #define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
 
 #define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
 #define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
 
 #define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
 
 #define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
 #define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
@@ -1066,13 +1061,13 @@
 
 /* TPI Integration ITM Data Register Definitions (FIFO1) */
 #define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
 
 #define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
 #define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
 
 #define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
 
 #define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
 #define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
@@ -1448,7 +1443,6 @@
 #define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
 
 
-
 /**
   \brief   Set Priority Grouping
   \details Sets the priority grouping field using the required unlock sequence.
@@ -1467,7 +1461,7 @@
   reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
   reg_value  =  (reg_value                                   |
                 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
   SCB->AIRCR =  reg_value;
 }
 
@@ -1493,7 +1487,9 @@
 {
   if ((int32_t)(IRQn) >= 0)
   {
+    __COMPILER_BARRIER();
     NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
   }
 }
 
@@ -1716,8 +1712,9 @@
  */
 __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
 {
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
+  /* ARM Application Note 321 states that the M3 does not require the architectural barrier */
 }
 
 
@@ -1731,8 +1728,8 @@
  */
 __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
 {
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
 }
 
 
diff --git a/Include/mpu_armv7.h b/Include/mpu_armv7.h
index 0142203..66ef59b 100644
--- a/Include/mpu_armv7.h
+++ b/Include/mpu_armv7.h
@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     mpu_armv7.h
  * @brief    CMSIS MPU API for Armv7-M MPU
- * @version  V5.0.4
- * @date     10. January 2018
+ * @version  V5.1.0
+ * @date     08. March 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2017-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -86,10 +86,10 @@
 * \param IsBufferable      Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
 */  
 #define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable)   \
-  ((((TypeExtField ) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk)                 | \
-   (((IsShareable ) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk)                      | \
-   (((IsCacheable ) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk)                      | \
-   (((IsBufferable ) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk))
+  ((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk)                  | \
+   (((IsShareable)  << MPU_RASR_S_Pos)   & MPU_RASR_S_Msk)                    | \
+   (((IsCacheable)  << MPU_RASR_C_Pos)   & MPU_RASR_C_Msk)                    | \
+   (((IsBufferable) << MPU_RASR_B_Pos)   & MPU_RASR_B_Msk))
 
 /**
 * MPU Region Attribute and Size Register Value
@@ -100,11 +100,14 @@
 * \param SubRegionDisable  Sub-region disable field.
 * \param Size              Region size of the region to be configured, for example 4K, 8K.
 */
-#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size)      \
-  ((((DisableExec ) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk)                                          | \
-   (((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk)                                      | \
-   (((AccessAttributes) ) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk)))
-  
+#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size)    \
+  ((((DisableExec)      << MPU_RASR_XN_Pos)   & MPU_RASR_XN_Msk)                                  | \
+   (((AccessPermission) << MPU_RASR_AP_Pos)   & MPU_RASR_AP_Msk)                                  | \
+   (((AccessAttributes) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) | \
+   (((SubRegionDisable) << MPU_RASR_SRD_Pos)  & MPU_RASR_SRD_Msk)                                 | \
+   (((Size)             << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk)                                | \
+   (((MPU_RASR_ENABLE_Msk))))
+
 /**
 * MPU Region Attribute and Size Register Value
 * 
@@ -131,7 +134,7 @@
 
 /**
 * MPU Memory Access Attribute for device memory.
-*  - TEX: 000b (if non-shareable) or 010b (if shareable)
+*  - TEX: 000b (if shareable) or 010b (if non-shareable)
 *  - Shareable or non-shareable
 *  - Non-cacheable
 *  - Bufferable (if shareable) or non-bufferable (if non-shareable)
@@ -187,20 +190,19 @@
 */
 __STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
 {
-  __DSB();
-  __ISB();
   MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
 #ifdef SCB_SHCSR_MEMFAULTENA_Msk
   SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
 #endif
+  __DSB();
+  __ISB();
 }
 
 /** Disable the MPU.
 */
 __STATIC_INLINE void ARM_MPU_Disable(void)
 {
-  __DSB();
-  __ISB();
+  __DMB();
 #ifdef SCB_SHCSR_MEMFAULTENA_Msk
   SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
 #endif
@@ -243,7 +245,7 @@
 * \param src Source data is copied from.
 * \param len Amount of data words to be copied.
 */
-__STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
+__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
 {
   uint32_t i;
   for (i = 0U; i < len; ++i) 
@@ -260,11 +262,11 @@
 {
   const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
   while (cnt > MPU_TYPE_RALIASES) {
-    orderedCpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
+    ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
     table += MPU_TYPE_RALIASES;
     cnt -= MPU_TYPE_RALIASES;
   }
-  orderedCpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
+  ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
 }
 
 #endif
diff --git a/Include/mpu_armv8.h b/Include/mpu_armv8.h
index 62571da..0041d4d 100644
--- a/Include/mpu_armv8.h
+++ b/Include/mpu_armv8.h
@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     mpu_armv8.h
- * @brief    CMSIS MPU API for Armv8-M MPU
- * @version  V5.0.4
- * @date     10. January 2018
+ * @brief    CMSIS MPU API for Armv8-M and Armv8.1-M MPU
+ * @version  V5.1.0
+ * @date     08. March 2019
  ******************************************************************************/
 /*
- * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
+ * Copyright (c) 2017-2019 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -101,6 +101,21 @@
   ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
   (MPU_RLAR_EN_Msk))
 
+#if defined(MPU_RLAR_PXN_Pos)
+  
+/** \brief Region Limit Address Register with PXN value
+* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
+* \param PXN Privileged execute never. Defines whether code can be executed from this privileged region.
+* \param IDX The attribute index to be associated with this memory region.
+*/
+#define ARM_MPU_RLAR_PXN(LIMIT, PXN, IDX) \
+  ((LIMIT & MPU_RLAR_LIMIT_Msk) | \
+  ((PXN << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \
+  ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
+  (MPU_RLAR_EN_Msk))
+  
+#endif
+
 /**
 * Struct for a single MPU Region
 */
@@ -114,20 +129,19 @@
 */
 __STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
 {
-  __DSB();
-  __ISB();
   MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
 #ifdef SCB_SHCSR_MEMFAULTENA_Msk
   SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
 #endif
+  __DSB();
+  __ISB();
 }
 
 /** Disable the MPU.
 */
 __STATIC_INLINE void ARM_MPU_Disable(void)
 {
-  __DSB();
-  __ISB();
+  __DMB();
 #ifdef SCB_SHCSR_MEMFAULTENA_Msk
   SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
 #endif
@@ -140,20 +154,19 @@
 */
 __STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)
 {
-  __DSB();
-  __ISB();
   MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
 #ifdef SCB_SHCSR_MEMFAULTENA_Msk
   SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
 #endif
+  __DSB();
+  __ISB();
 }
 
 /** Disable the Non-secure MPU.
 */
 __STATIC_INLINE void ARM_MPU_Disable_NS(void)
 {
-  __DSB();
-  __ISB();
+  __DMB();
 #ifdef SCB_SHCSR_MEMFAULTENA_Msk
   SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
 #endif
@@ -267,7 +280,7 @@
 * \param src Source data is copied from.
 * \param len Amount of data words to be copied.
 */
-__STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
+__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
 {
   uint32_t i;
   for (i = 0U; i < len; ++i) 
@@ -287,7 +300,7 @@
   const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
   if (cnt == 1U) {
     mpu->RNR = rnr;
-    orderedCpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);
+    ARM_MPU_OrderedMemcpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);
   } else {
     uint32_t rnrBase   = rnr & ~(MPU_TYPE_RALIASES-1U);
     uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
@@ -295,7 +308,7 @@
     mpu->RNR = rnrBase;
     while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
       uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
-      orderedCpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize);
+      ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize);
       table += c;
       cnt -= c;
       rnrOffset = 0U;
@@ -303,7 +316,7 @@
       mpu->RNR = rnrBase;
     }
     
-    orderedCpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
+    ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
   }
 }
 
diff --git a/Lib/ARM/arm_cortexM4b_math.lib b/Lib/ARM/arm_cortexM4b_math.lib
deleted file mode 100644
index 5a4b86f..0000000
--- a/Lib/ARM/arm_cortexM4b_math.lib
+++ /dev/null
Binary files differ
diff --git a/Lib/ARM/arm_cortexM4bf_math.lib b/Lib/ARM/arm_cortexM4bf_math.lib
deleted file mode 100644
index fe135ae..0000000
--- a/Lib/ARM/arm_cortexM4bf_math.lib
+++ /dev/null
Binary files differ
diff --git a/Lib/ARM/arm_cortexM4l_math.lib b/Lib/ARM/arm_cortexM4l_math.lib
deleted file mode 100644
index 593d42f..0000000
--- a/Lib/ARM/arm_cortexM4l_math.lib
+++ /dev/null
Binary files differ
diff --git a/Lib/ARM/arm_cortexM4lf_math.lib b/Lib/ARM/arm_cortexM4lf_math.lib
deleted file mode 100644
index 5e8d842..0000000
--- a/Lib/ARM/arm_cortexM4lf_math.lib
+++ /dev/null
Binary files differ
diff --git a/Lib/GCC/libarm_cortexM4l_math.a b/Lib/GCC/libarm_cortexM4l_math.a
deleted file mode 100644
index ca10192..0000000
--- a/Lib/GCC/libarm_cortexM4l_math.a
+++ /dev/null
Binary files differ
diff --git a/Lib/GCC/libarm_cortexM4lf_math.a b/Lib/GCC/libarm_cortexM4lf_math.a
deleted file mode 100644
index d8c3658..0000000
--- a/Lib/GCC/libarm_cortexM4lf_math.a
+++ /dev/null
Binary files differ
diff --git a/Lib/IAR/iar_cortexM4b_math.a b/Lib/IAR/iar_cortexM4b_math.a
deleted file mode 100644
index d17c8c8..0000000
--- a/Lib/IAR/iar_cortexM4b_math.a
+++ /dev/null
Binary files differ
diff --git a/Lib/IAR/iar_cortexM4bf_math.a b/Lib/IAR/iar_cortexM4bf_math.a
deleted file mode 100644
index fe2a42e..0000000
--- a/Lib/IAR/iar_cortexM4bf_math.a
+++ /dev/null
Binary files differ
diff --git a/Lib/IAR/iar_cortexM4l_math.a b/Lib/IAR/iar_cortexM4l_math.a
deleted file mode 100644
index 805e7ea..0000000
--- a/Lib/IAR/iar_cortexM4l_math.a
+++ /dev/null
Binary files differ
diff --git a/Lib/IAR/iar_cortexM4lf_math.a b/Lib/IAR/iar_cortexM4lf_math.a
deleted file mode 100644
index 2260b2e..0000000
--- a/Lib/IAR/iar_cortexM4lf_math.a
+++ /dev/null
Binary files differ
diff --git a/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM0/startup_ARMCM0.s b/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM0/startup_ARMCM0.s
new file mode 100644
index 0000000..9fc447d
--- /dev/null
+++ b/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM0/startup_ARMCM0.s
@@ -0,0 +1,242 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM0.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM0 Device Series
+; * @version  V5.00
+; * @date     02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size      EQU     0x00000400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size       EQU     0x00000C00
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp              ; Top of Stack
+                DCD     Reset_Handler             ; Reset Handler
+                DCD     NMI_Handler               ; NMI Handler
+                DCD     HardFault_Handler         ; Hard Fault Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     SVC_Handler               ; SVCall Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     PendSV_Handler            ; PendSV Handler
+                DCD     SysTick_Handler           ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WDT_IRQHandler            ;  0:  Watchdog Timer
+                DCD     RTC_IRQHandler            ;  1:  Real Time Clock
+                DCD     TIM0_IRQHandler           ;  2:  Timer0 / Timer1
+                DCD     TIM2_IRQHandler           ;  3:  Timer2 / Timer3
+                DCD     MCIA_IRQHandler           ;  4:  MCIa
+                DCD     MCIB_IRQHandler           ;  5:  MCIb
+                DCD     UART0_IRQHandler          ;  6:  UART0 - DUT FPGA
+                DCD     UART1_IRQHandler          ;  7:  UART1 - DUT FPGA
+                DCD     UART2_IRQHandler          ;  8:  UART2 - DUT FPGA
+                DCD     UART4_IRQHandler          ;  9:  UART4 - not connected
+                DCD     AACI_IRQHandler           ; 10: AACI / AC97
+                DCD     CLCD_IRQHandler           ; 11: CLCD Combined Interrupt
+                DCD     ENET_IRQHandler           ; 12: Ethernet
+                DCD     USBDC_IRQHandler          ; 13: USB Device
+                DCD     USBHC_IRQHandler          ; 14: USB Host Controller
+                DCD     CHLCD_IRQHandler          ; 15: Character LCD
+                DCD     FLEXRAY_IRQHandler        ; 16: Flexray
+                DCD     CAN_IRQHandler            ; 17: CAN
+                DCD     LIN_IRQHandler            ; 18: LIN
+                DCD     I2C_IRQHandler            ; 19: I2C ADC/DAC
+                DCD     0                         ; 20: Reserved
+                DCD     0                         ; 21: Reserved
+                DCD     0                         ; 22: Reserved
+                DCD     0                         ; 23: Reserved
+                DCD     0                         ; 24: Reserved
+                DCD     0                         ; 25: Reserved
+                DCD     0                         ; 26: Reserved
+                DCD     0                         ; 27: Reserved
+                DCD     CPU_CLCD_IRQHandler       ; 28: Reserved - CPU FPGA CLCD
+                DCD     0                         ; 29: Reserved - CPU FPGA
+                DCD     UART3_IRQHandler          ; 30: UART3    - CPU FPGA
+                DCD     SPI_IRQHandler            ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size  EQU     __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT  Reset_Handler             [WEAK]
+                IMPORT  SystemInit
+                IMPORT  __main
+                LDR     R0, =SystemInit
+                BLX     R0
+                LDR     R0, =__main
+                BX      R0
+                ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler               [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler               [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler            [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler           [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  WDT_IRQHandler            [WEAK]
+                EXPORT  RTC_IRQHandler            [WEAK]
+                EXPORT  TIM0_IRQHandler           [WEAK]
+                EXPORT  TIM2_IRQHandler           [WEAK]
+                EXPORT  MCIA_IRQHandler           [WEAK]
+                EXPORT  MCIB_IRQHandler           [WEAK]
+                EXPORT  UART0_IRQHandler          [WEAK]
+                EXPORT  UART1_IRQHandler          [WEAK]
+                EXPORT  UART2_IRQHandler          [WEAK]
+                EXPORT  UART3_IRQHandler          [WEAK]
+                EXPORT  UART4_IRQHandler          [WEAK]
+                EXPORT  AACI_IRQHandler           [WEAK]
+                EXPORT  CLCD_IRQHandler           [WEAK]
+                EXPORT  ENET_IRQHandler           [WEAK]
+                EXPORT  USBDC_IRQHandler          [WEAK]
+                EXPORT  USBHC_IRQHandler          [WEAK]
+                EXPORT  CHLCD_IRQHandler          [WEAK]
+                EXPORT  FLEXRAY_IRQHandler        [WEAK]
+                EXPORT  CAN_IRQHandler            [WEAK]
+                EXPORT  LIN_IRQHandler            [WEAK]
+                EXPORT  I2C_IRQHandler            [WEAK]
+                EXPORT  CPU_CLCD_IRQHandler       [WEAK]
+                EXPORT  SPI_IRQHandler            [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+                B       .
+
+                ENDP
+
+
+                ALIGN
+
+
+; User Initial Stack & Heap
+
+                IF      :DEF:__MICROLIB
+
+                EXPORT  __initial_sp
+                EXPORT  __heap_base
+                EXPORT  __heap_limit
+
+                ELSE
+
+                IMPORT  __use_two_region_memory
+                EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap PROC
+                LDR     R0, =  Heap_Mem
+                LDR     R1, =(Stack_Mem + Stack_Size)
+                LDR     R2, = (Heap_Mem +  Heap_Size)
+                LDR     R3, = Stack_Mem
+                BX      LR
+                ENDP
+
+                ALIGN
+
+                ENDIF
+
+
+                END
diff --git a/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM0/system_ARMCM0.c b/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM0/system_ARMCM0.c
new file mode 100644
index 0000000..66829ad
--- /dev/null
+++ b/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM0/system_ARMCM0.c
@@ -0,0 +1,56 @@
+/**************************************************************************//**
+ * @file     system_ARMCM0.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM0 Device Series
+ * @version  V5.00
+ * @date     08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM0.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            ( 5000000U)      /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM3/startup_ARMCM3.s b/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM3/startup_ARMCM3.s
new file mode 100644
index 0000000..16e56b0
--- /dev/null
+++ b/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM3/startup_ARMCM3.s
@@ -0,0 +1,262 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM3.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM3 Device Series
+; * @version  V5.00
+; * @date     02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size      EQU     0x00000400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size       EQU     0x00000C00
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp              ; Top of Stack
+                DCD     Reset_Handler             ; Reset Handler
+                DCD     NMI_Handler               ; NMI Handler
+                DCD     HardFault_Handler         ; Hard Fault Handler
+                DCD     MemManage_Handler         ; MPU Fault Handler
+                DCD     BusFault_Handler          ; Bus Fault Handler
+                DCD     UsageFault_Handler        ; Usage Fault Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     SVC_Handler               ; SVCall Handler
+                DCD     DebugMon_Handler          ; Debug Monitor Handler
+                DCD     0                         ; Reserved
+                DCD     PendSV_Handler            ; PendSV Handler
+                DCD     SysTick_Handler           ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WDT_IRQHandler            ;  0:  Watchdog Timer
+                DCD     RTC_IRQHandler            ;  1:  Real Time Clock
+                DCD     TIM0_IRQHandler           ;  2:  Timer0 / Timer1
+                DCD     TIM2_IRQHandler           ;  3:  Timer2 / Timer3
+                DCD     MCIA_IRQHandler           ;  4:  MCIa
+                DCD     MCIB_IRQHandler           ;  5:  MCIb
+                DCD     UART0_IRQHandler          ;  6:  UART0 - DUT FPGA
+                DCD     UART1_IRQHandler          ;  7:  UART1 - DUT FPGA
+                DCD     UART2_IRQHandler          ;  8:  UART2 - DUT FPGA
+                DCD     UART4_IRQHandler          ;  9:  UART4 - not connected
+                DCD     AACI_IRQHandler           ; 10: AACI / AC97
+                DCD     CLCD_IRQHandler           ; 11: CLCD Combined Interrupt
+                DCD     ENET_IRQHandler           ; 12: Ethernet
+                DCD     USBDC_IRQHandler          ; 13: USB Device
+                DCD     USBHC_IRQHandler          ; 14: USB Host Controller
+                DCD     CHLCD_IRQHandler          ; 15: Character LCD
+                DCD     FLEXRAY_IRQHandler        ; 16: Flexray
+                DCD     CAN_IRQHandler            ; 17: CAN
+                DCD     LIN_IRQHandler            ; 18: LIN
+                DCD     I2C_IRQHandler            ; 19: I2C ADC/DAC
+                DCD     0                         ; 20: Reserved
+                DCD     0                         ; 21: Reserved
+                DCD     0                         ; 22: Reserved
+                DCD     0                         ; 23: Reserved
+                DCD     0                         ; 24: Reserved
+                DCD     0                         ; 25: Reserved
+                DCD     0                         ; 26: Reserved
+                DCD     0                         ; 27: Reserved
+                DCD     CPU_CLCD_IRQHandler       ; 28: Reserved - CPU FPGA CLCD
+                DCD     0                         ; 29: Reserved - CPU FPGA
+                DCD     UART3_IRQHandler          ; 30: UART3    - CPU FPGA
+                DCD     SPI_IRQHandler            ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size  EQU     __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT  Reset_Handler             [WEAK]
+                IMPORT  SystemInit
+                IMPORT  __main
+                LDR     R0, =SystemInit
+                BLX     R0
+                LDR     R0, =__main
+                BX      R0
+                ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler               [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler         [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler         [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler          [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler        [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler               [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler          [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler            [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler           [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  WDT_IRQHandler            [WEAK]
+                EXPORT  RTC_IRQHandler            [WEAK]
+                EXPORT  TIM0_IRQHandler           [WEAK]
+                EXPORT  TIM2_IRQHandler           [WEAK]
+                EXPORT  MCIA_IRQHandler           [WEAK]
+                EXPORT  MCIB_IRQHandler           [WEAK]
+                EXPORT  UART0_IRQHandler          [WEAK]
+                EXPORT  UART1_IRQHandler          [WEAK]
+                EXPORT  UART2_IRQHandler          [WEAK]
+                EXPORT  UART3_IRQHandler          [WEAK]
+                EXPORT  UART4_IRQHandler          [WEAK]
+                EXPORT  AACI_IRQHandler           [WEAK]
+                EXPORT  CLCD_IRQHandler           [WEAK]
+                EXPORT  ENET_IRQHandler           [WEAK]
+                EXPORT  USBDC_IRQHandler          [WEAK]
+                EXPORT  USBHC_IRQHandler          [WEAK]
+                EXPORT  CHLCD_IRQHandler          [WEAK]
+                EXPORT  FLEXRAY_IRQHandler        [WEAK]
+                EXPORT  CAN_IRQHandler            [WEAK]
+                EXPORT  LIN_IRQHandler            [WEAK]
+                EXPORT  I2C_IRQHandler            [WEAK]
+                EXPORT  CPU_CLCD_IRQHandler       [WEAK]
+                EXPORT  SPI_IRQHandler            [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+                B       .
+
+                ENDP
+
+
+                ALIGN
+
+
+; User Initial Stack & Heap
+
+                IF      :DEF:__MICROLIB
+
+                EXPORT  __initial_sp
+                EXPORT  __heap_base
+                EXPORT  __heap_limit
+
+                ELSE
+
+                IMPORT  __use_two_region_memory
+                EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap PROC
+                LDR     R0, =  Heap_Mem
+                LDR     R1, =(Stack_Mem + Stack_Size)
+                LDR     R2, = (Heap_Mem +  Heap_Size)
+                LDR     R3, = Stack_Mem
+                BX      LR
+                ENDP
+
+                ALIGN
+
+                ENDIF
+
+
+                END
diff --git a/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM3/system_ARMCM3.c b/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM3/system_ARMCM3.c
new file mode 100644
index 0000000..f08df7a
--- /dev/null
+++ b/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM3/system_ARMCM3.c
@@ -0,0 +1,68 @@
+/**************************************************************************//**
+ * @file     system_ARMCM3.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM3 Device Series
+ * @version  V5.00
+ * @date     08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM3.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            ( 5000000U)      /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4_FP/startup_ARMCM4.s b/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
new file mode 100644
index 0000000..dae6439
--- /dev/null
+++ b/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
@@ -0,0 +1,262 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM4.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM4 Device Series
+; * @version  V5.00
+; * @date     02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size      EQU     0x00000400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size       EQU     0x00000C00
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp              ; Top of Stack
+                DCD     Reset_Handler             ; Reset Handler
+                DCD     NMI_Handler               ; NMI Handler
+                DCD     HardFault_Handler         ; Hard Fault Handler
+                DCD     MemManage_Handler         ; MPU Fault Handler
+                DCD     BusFault_Handler          ; Bus Fault Handler
+                DCD     UsageFault_Handler        ; Usage Fault Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     SVC_Handler               ; SVCall Handler
+                DCD     DebugMon_Handler          ; Debug Monitor Handler
+                DCD     0                         ; Reserved
+                DCD     PendSV_Handler            ; PendSV Handler
+                DCD     SysTick_Handler           ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WDT_IRQHandler            ;  0:  Watchdog Timer
+                DCD     RTC_IRQHandler            ;  1:  Real Time Clock
+                DCD     TIM0_IRQHandler           ;  2:  Timer0 / Timer1
+                DCD     TIM2_IRQHandler           ;  3:  Timer2 / Timer3
+                DCD     MCIA_IRQHandler           ;  4:  MCIa
+                DCD     MCIB_IRQHandler           ;  5:  MCIb
+                DCD     UART0_IRQHandler          ;  6:  UART0 - DUT FPGA
+                DCD     UART1_IRQHandler          ;  7:  UART1 - DUT FPGA
+                DCD     UART2_IRQHandler          ;  8:  UART2 - DUT FPGA
+                DCD     UART4_IRQHandler          ;  9:  UART4 - not connected
+                DCD     AACI_IRQHandler           ; 10: AACI / AC97
+                DCD     CLCD_IRQHandler           ; 11: CLCD Combined Interrupt
+                DCD     ENET_IRQHandler           ; 12: Ethernet
+                DCD     USBDC_IRQHandler          ; 13: USB Device
+                DCD     USBHC_IRQHandler          ; 14: USB Host Controller
+                DCD     CHLCD_IRQHandler          ; 15: Character LCD
+                DCD     FLEXRAY_IRQHandler        ; 16: Flexray
+                DCD     CAN_IRQHandler            ; 17: CAN
+                DCD     LIN_IRQHandler            ; 18: LIN
+                DCD     I2C_IRQHandler            ; 19: I2C ADC/DAC
+                DCD     0                         ; 20: Reserved
+                DCD     0                         ; 21: Reserved
+                DCD     0                         ; 22: Reserved
+                DCD     0                         ; 23: Reserved
+                DCD     0                         ; 24: Reserved
+                DCD     0                         ; 25: Reserved
+                DCD     0                         ; 26: Reserved
+                DCD     0                         ; 27: Reserved
+                DCD     CPU_CLCD_IRQHandler       ; 28: Reserved - CPU FPGA CLCD
+                DCD     0                         ; 29: Reserved - CPU FPGA
+                DCD     UART3_IRQHandler          ; 30: UART3    - CPU FPGA
+                DCD     SPI_IRQHandler            ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size  EQU     __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT  Reset_Handler             [WEAK]
+                IMPORT  SystemInit
+                IMPORT  __main
+                LDR     R0, =SystemInit
+                BLX     R0
+                LDR     R0, =__main
+                BX      R0
+                ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler               [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler         [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler         [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler          [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler        [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler               [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler          [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler            [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler           [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  WDT_IRQHandler            [WEAK]
+                EXPORT  RTC_IRQHandler            [WEAK]
+                EXPORT  TIM0_IRQHandler           [WEAK]
+                EXPORT  TIM2_IRQHandler           [WEAK]
+                EXPORT  MCIA_IRQHandler           [WEAK]
+                EXPORT  MCIB_IRQHandler           [WEAK]
+                EXPORT  UART0_IRQHandler          [WEAK]
+                EXPORT  UART1_IRQHandler          [WEAK]
+                EXPORT  UART2_IRQHandler          [WEAK]
+                EXPORT  UART3_IRQHandler          [WEAK]
+                EXPORT  UART4_IRQHandler          [WEAK]
+                EXPORT  AACI_IRQHandler           [WEAK]
+                EXPORT  CLCD_IRQHandler           [WEAK]
+                EXPORT  ENET_IRQHandler           [WEAK]
+                EXPORT  USBDC_IRQHandler          [WEAK]
+                EXPORT  USBHC_IRQHandler          [WEAK]
+                EXPORT  CHLCD_IRQHandler          [WEAK]
+                EXPORT  FLEXRAY_IRQHandler        [WEAK]
+                EXPORT  CAN_IRQHandler            [WEAK]
+                EXPORT  LIN_IRQHandler            [WEAK]
+                EXPORT  I2C_IRQHandler            [WEAK]
+                EXPORT  CPU_CLCD_IRQHandler       [WEAK]
+                EXPORT  SPI_IRQHandler            [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+                B       .
+
+                ENDP
+
+
+                ALIGN
+
+
+; User Initial Stack & Heap
+
+                IF      :DEF:__MICROLIB
+
+                EXPORT  __initial_sp
+                EXPORT  __heap_base
+                EXPORT  __heap_limit
+
+                ELSE
+
+                IMPORT  __use_two_region_memory
+                EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap PROC
+                LDR     R0, =  Heap_Mem
+                LDR     R1, =(Stack_Mem + Stack_Size)
+                LDR     R2, = (Heap_Mem +  Heap_Size)
+                LDR     R3, = Stack_Mem
+                BX      LR
+                ENDP
+
+                ALIGN
+
+                ENDIF
+
+
+                END
diff --git a/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4_FP/system_ARMCM4.c
new file mode 100644
index 0000000..070fa1e
--- /dev/null
+++ b/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM4_FP/system_ARMCM4.c
@@ -0,0 +1,83 @@
+/**************************************************************************//**
+ * @file     system_ARMCM4.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM4 Device Series
+ * @version  V5.00
+ * @date     08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM4)
+  #include "ARMCM4.h"
+#elif defined (ARMCM4_FP)
+  #include "ARMCM4_FP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            ( 5000000U)      /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1)
+  SCB->CPACR |= ((3U << 10*2) |           /* set CP10 Full Access */
+                 (3U << 11*2)  );         /* set CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/gcc_arm.ld b/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/gcc_arm.ld
new file mode 100644
index 0000000..b987fd1
--- /dev/null
+++ b/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/gcc_arm.ld
@@ -0,0 +1,196 @@
+/* Linker script to configure memory regions. */
+MEMORY
+{
+  FLASH (rx)  : ORIGIN = 0x00000000, LENGTH = 512K
+  RAM   (rwx) : ORIGIN = 0x20000000, LENGTH = 256K
+}
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __copy_table_start__
+ *   __copy_table_end__
+ *   __zero_table_start__
+ *   __zero_table_end__
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapBase
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ *   __Vectors_End
+ *   __Vectors_Size
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+	.text :
+	{
+		KEEP(*(.vectors))
+		__Vectors_End = .;
+		__Vectors_Size = __Vectors_End - __Vectors;
+		__end__ = .;
+
+		*(.text*)
+
+		KEEP(*(.init))
+		KEEP(*(.fini))
+
+		/* .ctors */
+		*crtbegin.o(.ctors)
+		*crtbegin?.o(.ctors)
+		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+		*(SORT(.ctors.*))
+		*(.ctors)
+
+		/* .dtors */
+ 		*crtbegin.o(.dtors)
+ 		*crtbegin?.o(.dtors)
+ 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ 		*(SORT(.dtors.*))
+ 		*(.dtors)
+
+		*(.rodata*)
+
+		KEEP(*(.eh_frame*))
+	} > FLASH
+
+	.ARM.extab :
+	{
+		*(.ARM.extab* .gnu.linkonce.armextab.*)
+	} > FLASH
+
+	__exidx_start = .;
+	.ARM.exidx :
+	{
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
+	} > FLASH
+	__exidx_end = .;
+
+	/* To copy multiple ROM to RAM sections,
+	 * uncomment .copy.table section and,
+	 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.copy.table :
+	{
+		. = ALIGN(4);
+		__copy_table_start__ = .;
+		LONG (__etext)
+		LONG (__data_start__)
+		LONG (__data_end__ - __data_start__)
+		LONG (__etext2)
+		LONG (__data2_start__)
+		LONG (__data2_end__ - __data2_start__)
+		__copy_table_end__ = .;
+	} > FLASH
+	*/
+
+	/* To clear multiple BSS sections,
+	 * uncomment .zero.table section and,
+	 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.zero.table :
+	{
+		. = ALIGN(4);
+		__zero_table_start__ = .;
+		LONG (__bss_start__)
+		LONG (__bss_end__ - __bss_start__)
+		LONG (__bss2_start__)
+		LONG (__bss2_end__ - __bss2_start__)
+		__zero_table_end__ = .;
+	} > FLASH
+	*/
+
+	__etext = .;
+
+	.data : AT (__etext)
+	{
+		__data_start__ = .;
+		*(vtable)
+		*(.data*)
+
+		. = ALIGN(4);
+		/* preinit data */
+		PROVIDE_HIDDEN (__preinit_array_start = .);
+		KEEP(*(.preinit_array))
+		PROVIDE_HIDDEN (__preinit_array_end = .);
+
+		. = ALIGN(4);
+		/* init data */
+		PROVIDE_HIDDEN (__init_array_start = .);
+		KEEP(*(SORT(.init_array.*)))
+		KEEP(*(.init_array))
+		PROVIDE_HIDDEN (__init_array_end = .);
+
+
+		. = ALIGN(4);
+		/* finit data */
+		PROVIDE_HIDDEN (__fini_array_start = .);
+		KEEP(*(SORT(.fini_array.*)))
+		KEEP(*(.fini_array))
+		PROVIDE_HIDDEN (__fini_array_end = .);
+
+		KEEP(*(.jcr*))
+		. = ALIGN(4);
+		/* All data end */
+		__data_end__ = .;
+
+	} > RAM
+
+	.bss :
+	{
+		. = ALIGN(4);
+		__bss_start__ = .;
+		*(.bss*)
+		*(COMMON)
+		. = ALIGN(4);
+		__bss_end__ = .;
+	} > RAM
+
+	.heap (COPY):
+	{
+		__HeapBase = .;
+		__end__ = .;
+		end = __end__;
+		KEEP(*(.heap*))
+		__HeapLimit = .;
+	} > RAM
+
+	/* .stack_dummy section doesn't contains any symbols. It is only
+	 * used for linker to calculate size of stack sections, and assign
+	 * values to stack symbols later */
+	.stack_dummy (COPY):
+	{
+		KEEP(*(.stack*))
+	} > RAM
+
+	/* Set stack top to end of RAM, and stack limit move down by
+	 * size of stack_dummy section */
+	__StackTop = ORIGIN(RAM) + LENGTH(RAM);
+	__StackLimit = __StackTop - SIZEOF(.stack_dummy);
+	PROVIDE(__stack = __StackTop);
+
+	/* Check if data + heap + stack exceeds RAM limit */
+	ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/startup_ARMCM7.c b/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/startup_ARMCM7.c
new file mode 100644
index 0000000..26edb9f
--- /dev/null
+++ b/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/startup_ARMCM7.c
@@ -0,0 +1,295 @@
+/**************************************************************************//**
+ * @file     startup_ARMCM7.s
+ * @brief    CMSIS Core Device Startup File for
+ *           ARMCM7 Device Series
+ * @version  V5.00
+ * @date     26. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <stdint.h>
+
+
+/*----------------------------------------------------------------------------
+  Linker generated Symbols
+ *----------------------------------------------------------------------------*/
+extern uint32_t __etext;
+extern uint32_t __data_start__;
+extern uint32_t __data_end__;
+extern uint32_t __copy_table_start__;
+extern uint32_t __copy_table_end__;
+extern uint32_t __zero_table_start__;
+extern uint32_t __zero_table_end__;
+extern uint32_t __bss_start__;
+extern uint32_t __bss_end__;
+extern uint32_t __StackTop;
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler Function Prototype
+ *----------------------------------------------------------------------------*/
+typedef void( *pFunc )( void );
+
+
+/*----------------------------------------------------------------------------
+  External References
+ *----------------------------------------------------------------------------*/
+#ifndef __START
+extern void  _start(void) __attribute__((noreturn));    /* PreeMain (C library entry point) */
+#else
+extern int  __START(void) __attribute__((noreturn));    /* main entry point */
+#endif
+
+#ifndef __NO_SYSTEM_INIT
+extern void SystemInit (void);            /* CMSIS System Initialization      */
+#endif
+
+
+/*----------------------------------------------------------------------------
+  Internal References
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void);                          /* Default empty handler */
+void Reset_Handler(void);                            /* Reset Handler */
+
+
+/*----------------------------------------------------------------------------
+  User Initial Stack & Heap
+ *----------------------------------------------------------------------------*/
+#ifndef __STACK_SIZE
+  #define	__STACK_SIZE  0x00000400
+#endif
+static uint8_t stack[__STACK_SIZE] __attribute__ ((aligned(8), used, section(".stack")));
+
+#ifndef __HEAP_SIZE
+  #define	__HEAP_SIZE   0x00000C00
+#endif
+#if __HEAP_SIZE > 0
+static uint8_t heap[__HEAP_SIZE]   __attribute__ ((aligned(8), used, section(".heap")));
+#endif
+
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler
+ *----------------------------------------------------------------------------*/
+/* Cortex-M7 Processor Exceptions */
+void NMI_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void HardFault_Handler   (void) __attribute__ ((weak, alias("Default_Handler")));
+void MemManage_Handler   (void) __attribute__ ((weak, alias("Default_Handler")));
+void BusFault_Handler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void UsageFault_Handler  (void) __attribute__ ((weak, alias("Default_Handler")));
+void SVC_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void DebugMon_Handler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void PendSV_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void SysTick_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+
+/* ARMCM7 Specific Interrupts */
+void WDT_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void RTC_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIM0_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIM2_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void MCIA_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void MCIB_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART0_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART1_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART2_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART4_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void AACI_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void CLCD_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void ENET_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void USBDC_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void USBHC_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void CHLCD_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void FLEXRAY_IRQHandler  (void) __attribute__ ((weak, alias("Default_Handler")));
+void CAN_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void LIN_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void I2C_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void CPU_CLCD_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART3_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void SPI_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Vector table
+ *----------------------------------------------------------------------------*/
+const pFunc __Vectors[] __attribute__ ((section(".vectors"))) = {
+  /* Cortex-M7 Exceptions Handler */
+  (pFunc)((uint32_t)&__StackTop),           /*      Initial Stack Pointer     */
+  Reset_Handler,                            /*      Reset Handler             */
+  NMI_Handler,                              /*      NMI Handler               */
+  HardFault_Handler,                        /*      Hard Fault Handler        */
+  MemManage_Handler,                        /*      MPU Fault Handler         */
+  BusFault_Handler,                         /*      Bus Fault Handler         */
+  UsageFault_Handler,                       /*      Usage Fault Handler       */
+  0,                                        /*      Reserved                  */
+  0,                                        /*      Reserved                  */
+  0,                                        /*      Reserved                  */
+  0,                                        /*      Reserved                  */
+  SVC_Handler,                              /*      SVCall Handler            */
+  DebugMon_Handler,                         /*      Debug Monitor Handler     */
+  0,                                        /*      Reserved                  */
+  PendSV_Handler,                           /*      PendSV Handler            */
+  SysTick_Handler,                          /*      SysTick Handler           */
+
+  /* External interrupts */
+  WDT_IRQHandler,                           /*  0:  Watchdog Timer            */
+  RTC_IRQHandler,                           /*  1:  Real Time Clock           */
+  TIM0_IRQHandler,                          /*  2:  Timer0 / Timer1           */
+  TIM2_IRQHandler,                          /*  3:  Timer2 / Timer3           */
+  MCIA_IRQHandler,                          /*  4:  MCIa                      */
+  MCIB_IRQHandler,                          /*  5:  MCIb                      */
+  UART0_IRQHandler,                         /*  6:  UART0 - DUT FPGA          */
+  UART1_IRQHandler,                         /*  7:  UART1 - DUT FPGA          */
+  UART2_IRQHandler,                         /*  8:  UART2 - DUT FPGA          */
+  UART4_IRQHandler,                         /*  9:  UART4 - not connected     */
+  AACI_IRQHandler,                          /* 10: AACI / AC97                */
+  CLCD_IRQHandler,                          /* 11: CLCD Combined Interrupt    */
+  ENET_IRQHandler,                          /* 12: Ethernet                   */
+  USBDC_IRQHandler,                         /* 13: USB Device                 */
+  USBHC_IRQHandler,                         /* 14: USB Host Controller        */
+  CHLCD_IRQHandler,                         /* 15: Character LCD              */
+  FLEXRAY_IRQHandler,                       /* 16: Flexray                    */
+  CAN_IRQHandler,                           /* 17: CAN                        */
+  LIN_IRQHandler,                           /* 18: LIN                        */
+  I2C_IRQHandler,                           /* 19: I2C ADC/DAC                */
+  0,                                        /* 20: Reserved                   */
+  0,                                        /* 21: Reserved                   */
+  0,                                        /* 22: Reserved                   */
+  0,                                        /* 23: Reserved                   */
+  0,                                        /* 24: Reserved                   */
+  0,                                        /* 25: Reserved                   */
+  0,                                        /* 26: Reserved                   */
+  0,                                        /* 27: Reserved                   */
+  CPU_CLCD_IRQHandler,                      /* 28: Reserved - CPU FPGA CLCD   */
+  0,                                        /* 29: Reserved - CPU FPGA        */
+  UART3_IRQHandler,                         /* 30: UART3    - CPU FPGA        */
+  SPI_IRQHandler                            /* 31: SPI Touchscreen - CPU FPGA */
+};
+
+
+/*----------------------------------------------------------------------------
+  Reset Handler called on controller reset
+ *----------------------------------------------------------------------------*/
+void Reset_Handler(void) {
+  uint32_t *pSrc, *pDest;
+  uint32_t *pTable __attribute__((unused));
+
+/*  Firstly it copies data from read only memory to RAM. There are two schemes
+ *  to copy. One can copy more than one sections. Another can only copy
+ *  one section.  The former scheme needs more instructions and read-only
+ *  data to implement than the latter.
+ *  Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes.  */
+
+#ifdef __STARTUP_COPY_MULTIPLE
+/*  Multiple sections scheme.
+ *
+ *  Between symbol address __copy_table_start__ and __copy_table_end__,
+ *  there are array of triplets, each of which specify:
+ *    offset 0: LMA of start of a section to copy from
+ *    offset 4: VMA of start of a section to copy to
+ *    offset 8: size of the section to copy. Must be multiply of 4
+ *
+ *  All addresses must be aligned to 4 bytes boundary.
+ */
+  pTable = &__copy_table_start__;
+
+  for (; pTable < &__copy_table_end__; pTable = pTable + 3) {
+		pSrc  = (uint32_t*)*(pTable + 0);
+		pDest = (uint32_t*)*(pTable + 1);
+		for (; pDest < (uint32_t*)(*(pTable + 1) + *(pTable + 2)) ; ) {
+      *pDest++ = *pSrc++;
+		}
+	}
+#else
+/*  Single section scheme.
+ *
+ *  The ranges of copy from/to are specified by following symbols
+ *    __etext: LMA of start of the section to copy from. Usually end of text
+ *    __data_start__: VMA of start of the section to copy to
+ *    __data_end__: VMA of end of the section to copy to
+ *
+ *  All addresses must be aligned to 4 bytes boundary.
+ */
+  pSrc  = &__etext;
+  pDest = &__data_start__;
+
+  for ( ; pDest < &__data_end__ ; ) {
+    *pDest++ = *pSrc++;
+  }
+#endif /*__STARTUP_COPY_MULTIPLE */
+
+/*  This part of work usually is done in C library startup code. Otherwise,
+ *  define this macro to enable it in this startup.
+ *
+ *  There are two schemes too. One can clear multiple BSS sections. Another
+ *  can only clear one section. The former is more size expensive than the
+ *  latter.
+ *
+ *  Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former.
+ *  Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later.
+ */
+#ifdef __STARTUP_CLEAR_BSS_MULTIPLE
+/*  Multiple sections scheme.
+ *
+ *  Between symbol address __copy_table_start__ and __copy_table_end__,
+ *  there are array of tuples specifying:
+ *    offset 0: Start of a BSS section
+ *    offset 4: Size of this BSS section. Must be multiply of 4
+ */
+  pTable = &__zero_table_start__;
+
+  for (; pTable < &__zero_table_end__; pTable = pTable + 2) {
+		pDest = (uint32_t*)*(pTable + 0);
+		for (; pDest < (uint32_t*)(*(pTable + 0) + *(pTable + 1)) ; ) {
+      *pDest++ = 0;
+		}
+	}
+#elif defined (__STARTUP_CLEAR_BSS)
+/*  Single BSS section scheme.
+ *
+ *  The BSS section is specified by following symbols
+ *    __bss_start__: start of the BSS section.
+ *    __bss_end__: end of the BSS section.
+ *
+ *  Both addresses must be aligned to 4 bytes boundary.
+ */
+  pDest = &__bss_start__;
+
+  for ( ; pDest < &__bss_end__ ; ) {
+    *pDest++ = 0UL;
+  }
+#endif /* __STARTUP_CLEAR_BSS_MULTIPLE || __STARTUP_CLEAR_BSS */
+
+#ifndef __NO_SYSTEM_INIT
+	SystemInit();
+#endif
+
+#ifndef __START
+#define __START _start
+#endif
+	__START();
+
+}
+
+
+/*----------------------------------------------------------------------------
+  Default Handler for Exceptions / Interrupts
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void) {
+
+	while(1);
+}
diff --git a/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/startup_ARMCM7.s b/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
new file mode 100644
index 0000000..b69f038
--- /dev/null
+++ b/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
@@ -0,0 +1,262 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM7.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM7 Device Series
+; * @version  V5.00
+; * @date     02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size      EQU     0x00000400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size       EQU     0x00000C00
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp              ; Top of Stack
+                DCD     Reset_Handler             ; Reset Handler
+                DCD     NMI_Handler               ; NMI Handler
+                DCD     HardFault_Handler         ; Hard Fault Handler
+                DCD     MemManage_Handler         ; MPU Fault Handler
+                DCD     BusFault_Handler          ; Bus Fault Handler
+                DCD     UsageFault_Handler        ; Usage Fault Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     SVC_Handler               ; SVCall Handler
+                DCD     DebugMon_Handler          ; Debug Monitor Handler
+                DCD     0                         ; Reserved
+                DCD     PendSV_Handler            ; PendSV Handler
+                DCD     SysTick_Handler           ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WDT_IRQHandler            ;  0:  Watchdog Timer
+                DCD     RTC_IRQHandler            ;  1:  Real Time Clock
+                DCD     TIM0_IRQHandler           ;  2:  Timer0 / Timer1
+                DCD     TIM2_IRQHandler           ;  3:  Timer2 / Timer3
+                DCD     MCIA_IRQHandler           ;  4:  MCIa
+                DCD     MCIB_IRQHandler           ;  5:  MCIb
+                DCD     UART0_IRQHandler          ;  6:  UART0 - DUT FPGA
+                DCD     UART1_IRQHandler          ;  7:  UART1 - DUT FPGA
+                DCD     UART2_IRQHandler          ;  8:  UART2 - DUT FPGA
+                DCD     UART4_IRQHandler          ;  9:  UART4 - not connected
+                DCD     AACI_IRQHandler           ; 10: AACI / AC97
+                DCD     CLCD_IRQHandler           ; 11: CLCD Combined Interrupt
+                DCD     ENET_IRQHandler           ; 12: Ethernet
+                DCD     USBDC_IRQHandler          ; 13: USB Device
+                DCD     USBHC_IRQHandler          ; 14: USB Host Controller
+                DCD     CHLCD_IRQHandler          ; 15: Character LCD
+                DCD     FLEXRAY_IRQHandler        ; 16: Flexray
+                DCD     CAN_IRQHandler            ; 17: CAN
+                DCD     LIN_IRQHandler            ; 18: LIN
+                DCD     I2C_IRQHandler            ; 19: I2C ADC/DAC
+                DCD     0                         ; 20: Reserved
+                DCD     0                         ; 21: Reserved
+                DCD     0                         ; 22: Reserved
+                DCD     0                         ; 23: Reserved
+                DCD     0                         ; 24: Reserved
+                DCD     0                         ; 25: Reserved
+                DCD     0                         ; 26: Reserved
+                DCD     0                         ; 27: Reserved
+                DCD     CPU_CLCD_IRQHandler       ; 28: Reserved - CPU FPGA CLCD
+                DCD     0                         ; 29: Reserved - CPU FPGA
+                DCD     UART3_IRQHandler          ; 30: UART3    - CPU FPGA
+                DCD     SPI_IRQHandler            ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size  EQU     __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT  Reset_Handler             [WEAK]
+                IMPORT  SystemInit
+                IMPORT  __main
+                LDR     R0, =SystemInit
+                BLX     R0
+                LDR     R0, =__main
+                BX      R0
+                ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler               [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler         [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler         [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler          [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler        [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler               [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler          [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler            [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler           [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  WDT_IRQHandler            [WEAK]
+                EXPORT  RTC_IRQHandler            [WEAK]
+                EXPORT  TIM0_IRQHandler           [WEAK]
+                EXPORT  TIM2_IRQHandler           [WEAK]
+                EXPORT  MCIA_IRQHandler           [WEAK]
+                EXPORT  MCIB_IRQHandler           [WEAK]
+                EXPORT  UART0_IRQHandler          [WEAK]
+                EXPORT  UART1_IRQHandler          [WEAK]
+                EXPORT  UART2_IRQHandler          [WEAK]
+                EXPORT  UART3_IRQHandler          [WEAK]
+                EXPORT  UART4_IRQHandler          [WEAK]
+                EXPORT  AACI_IRQHandler           [WEAK]
+                EXPORT  CLCD_IRQHandler           [WEAK]
+                EXPORT  ENET_IRQHandler           [WEAK]
+                EXPORT  USBDC_IRQHandler          [WEAK]
+                EXPORT  USBHC_IRQHandler          [WEAK]
+                EXPORT  CHLCD_IRQHandler          [WEAK]
+                EXPORT  FLEXRAY_IRQHandler        [WEAK]
+                EXPORT  CAN_IRQHandler            [WEAK]
+                EXPORT  LIN_IRQHandler            [WEAK]
+                EXPORT  I2C_IRQHandler            [WEAK]
+                EXPORT  CPU_CLCD_IRQHandler       [WEAK]
+                EXPORT  SPI_IRQHandler            [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+                B       .
+
+                ENDP
+
+
+                ALIGN
+
+
+; User Initial Stack & Heap
+
+                IF      :DEF:__MICROLIB
+
+                EXPORT  __initial_sp
+                EXPORT  __heap_base
+                EXPORT  __heap_limit
+
+                ELSE
+
+                IMPORT  __use_two_region_memory
+                EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap PROC
+                LDR     R0, =  Heap_Mem
+                LDR     R1, =(Stack_Mem + Stack_Size)
+                LDR     R2, = (Heap_Mem +  Heap_Size)
+                LDR     R3, = Stack_Mem
+                BX      LR
+                ENDP
+
+                ALIGN
+
+                ENDIF
+
+
+                END
diff --git a/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/system_ARMCM7.c
new file mode 100644
index 0000000..65bfaca
--- /dev/null
+++ b/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Device/ARMCM7_SP/system_ARMCM7.c
@@ -0,0 +1,85 @@
+/**************************************************************************//**
+ * @file     system_ARMCM7.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM7 Device Series
+ * @version  V5.00
+ * @date     08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM7)
+  #include "ARMCM7.h"
+#elif defined (ARMCM7_SP)
+  #include "ARMCM7_SP.h"
+#elif defined (ARMCM7_DP)
+  #include "ARMCM7_DP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            ( 5000000U)      /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1)
+  SCB->CPACR |= ((3U << 10*2) |           /* set CP10 Full Access */
+                 (3U << 11*2)  );         /* set CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM0/startup_ARMCM0.s b/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM0/startup_ARMCM0.s
new file mode 100644
index 0000000..9fc447d
--- /dev/null
+++ b/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM0/startup_ARMCM0.s
@@ -0,0 +1,242 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM0.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM0 Device Series
+; * @version  V5.00
+; * @date     02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size      EQU     0x00000400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size       EQU     0x00000C00
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp              ; Top of Stack
+                DCD     Reset_Handler             ; Reset Handler
+                DCD     NMI_Handler               ; NMI Handler
+                DCD     HardFault_Handler         ; Hard Fault Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     SVC_Handler               ; SVCall Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     PendSV_Handler            ; PendSV Handler
+                DCD     SysTick_Handler           ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WDT_IRQHandler            ;  0:  Watchdog Timer
+                DCD     RTC_IRQHandler            ;  1:  Real Time Clock
+                DCD     TIM0_IRQHandler           ;  2:  Timer0 / Timer1
+                DCD     TIM2_IRQHandler           ;  3:  Timer2 / Timer3
+                DCD     MCIA_IRQHandler           ;  4:  MCIa
+                DCD     MCIB_IRQHandler           ;  5:  MCIb
+                DCD     UART0_IRQHandler          ;  6:  UART0 - DUT FPGA
+                DCD     UART1_IRQHandler          ;  7:  UART1 - DUT FPGA
+                DCD     UART2_IRQHandler          ;  8:  UART2 - DUT FPGA
+                DCD     UART4_IRQHandler          ;  9:  UART4 - not connected
+                DCD     AACI_IRQHandler           ; 10: AACI / AC97
+                DCD     CLCD_IRQHandler           ; 11: CLCD Combined Interrupt
+                DCD     ENET_IRQHandler           ; 12: Ethernet
+                DCD     USBDC_IRQHandler          ; 13: USB Device
+                DCD     USBHC_IRQHandler          ; 14: USB Host Controller
+                DCD     CHLCD_IRQHandler          ; 15: Character LCD
+                DCD     FLEXRAY_IRQHandler        ; 16: Flexray
+                DCD     CAN_IRQHandler            ; 17: CAN
+                DCD     LIN_IRQHandler            ; 18: LIN
+                DCD     I2C_IRQHandler            ; 19: I2C ADC/DAC
+                DCD     0                         ; 20: Reserved
+                DCD     0                         ; 21: Reserved
+                DCD     0                         ; 22: Reserved
+                DCD     0                         ; 23: Reserved
+                DCD     0                         ; 24: Reserved
+                DCD     0                         ; 25: Reserved
+                DCD     0                         ; 26: Reserved
+                DCD     0                         ; 27: Reserved
+                DCD     CPU_CLCD_IRQHandler       ; 28: Reserved - CPU FPGA CLCD
+                DCD     0                         ; 29: Reserved - CPU FPGA
+                DCD     UART3_IRQHandler          ; 30: UART3    - CPU FPGA
+                DCD     SPI_IRQHandler            ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size  EQU     __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT  Reset_Handler             [WEAK]
+                IMPORT  SystemInit
+                IMPORT  __main
+                LDR     R0, =SystemInit
+                BLX     R0
+                LDR     R0, =__main
+                BX      R0
+                ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler               [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler               [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler            [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler           [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  WDT_IRQHandler            [WEAK]
+                EXPORT  RTC_IRQHandler            [WEAK]
+                EXPORT  TIM0_IRQHandler           [WEAK]
+                EXPORT  TIM2_IRQHandler           [WEAK]
+                EXPORT  MCIA_IRQHandler           [WEAK]
+                EXPORT  MCIB_IRQHandler           [WEAK]
+                EXPORT  UART0_IRQHandler          [WEAK]
+                EXPORT  UART1_IRQHandler          [WEAK]
+                EXPORT  UART2_IRQHandler          [WEAK]
+                EXPORT  UART3_IRQHandler          [WEAK]
+                EXPORT  UART4_IRQHandler          [WEAK]
+                EXPORT  AACI_IRQHandler           [WEAK]
+                EXPORT  CLCD_IRQHandler           [WEAK]
+                EXPORT  ENET_IRQHandler           [WEAK]
+                EXPORT  USBDC_IRQHandler          [WEAK]
+                EXPORT  USBHC_IRQHandler          [WEAK]
+                EXPORT  CHLCD_IRQHandler          [WEAK]
+                EXPORT  FLEXRAY_IRQHandler        [WEAK]
+                EXPORT  CAN_IRQHandler            [WEAK]
+                EXPORT  LIN_IRQHandler            [WEAK]
+                EXPORT  I2C_IRQHandler            [WEAK]
+                EXPORT  CPU_CLCD_IRQHandler       [WEAK]
+                EXPORT  SPI_IRQHandler            [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+                B       .
+
+                ENDP
+
+
+                ALIGN
+
+
+; User Initial Stack & Heap
+
+                IF      :DEF:__MICROLIB
+
+                EXPORT  __initial_sp
+                EXPORT  __heap_base
+                EXPORT  __heap_limit
+
+                ELSE
+
+                IMPORT  __use_two_region_memory
+                EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap PROC
+                LDR     R0, =  Heap_Mem
+                LDR     R1, =(Stack_Mem + Stack_Size)
+                LDR     R2, = (Heap_Mem +  Heap_Size)
+                LDR     R3, = Stack_Mem
+                BX      LR
+                ENDP
+
+                ALIGN
+
+                ENDIF
+
+
+                END
diff --git a/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM0/system_ARMCM0.c b/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM0/system_ARMCM0.c
new file mode 100644
index 0000000..66829ad
--- /dev/null
+++ b/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM0/system_ARMCM0.c
@@ -0,0 +1,56 @@
+/**************************************************************************//**
+ * @file     system_ARMCM0.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM0 Device Series
+ * @version  V5.00
+ * @date     08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM0.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            ( 5000000U)      /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM3/startup_ARMCM3.s b/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM3/startup_ARMCM3.s
new file mode 100644
index 0000000..16e56b0
--- /dev/null
+++ b/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM3/startup_ARMCM3.s
@@ -0,0 +1,262 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM3.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM3 Device Series
+; * @version  V5.00
+; * @date     02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size      EQU     0x00000400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size       EQU     0x00000C00
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp              ; Top of Stack
+                DCD     Reset_Handler             ; Reset Handler
+                DCD     NMI_Handler               ; NMI Handler
+                DCD     HardFault_Handler         ; Hard Fault Handler
+                DCD     MemManage_Handler         ; MPU Fault Handler
+                DCD     BusFault_Handler          ; Bus Fault Handler
+                DCD     UsageFault_Handler        ; Usage Fault Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     SVC_Handler               ; SVCall Handler
+                DCD     DebugMon_Handler          ; Debug Monitor Handler
+                DCD     0                         ; Reserved
+                DCD     PendSV_Handler            ; PendSV Handler
+                DCD     SysTick_Handler           ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WDT_IRQHandler            ;  0:  Watchdog Timer
+                DCD     RTC_IRQHandler            ;  1:  Real Time Clock
+                DCD     TIM0_IRQHandler           ;  2:  Timer0 / Timer1
+                DCD     TIM2_IRQHandler           ;  3:  Timer2 / Timer3
+                DCD     MCIA_IRQHandler           ;  4:  MCIa
+                DCD     MCIB_IRQHandler           ;  5:  MCIb
+                DCD     UART0_IRQHandler          ;  6:  UART0 - DUT FPGA
+                DCD     UART1_IRQHandler          ;  7:  UART1 - DUT FPGA
+                DCD     UART2_IRQHandler          ;  8:  UART2 - DUT FPGA
+                DCD     UART4_IRQHandler          ;  9:  UART4 - not connected
+                DCD     AACI_IRQHandler           ; 10: AACI / AC97
+                DCD     CLCD_IRQHandler           ; 11: CLCD Combined Interrupt
+                DCD     ENET_IRQHandler           ; 12: Ethernet
+                DCD     USBDC_IRQHandler          ; 13: USB Device
+                DCD     USBHC_IRQHandler          ; 14: USB Host Controller
+                DCD     CHLCD_IRQHandler          ; 15: Character LCD
+                DCD     FLEXRAY_IRQHandler        ; 16: Flexray
+                DCD     CAN_IRQHandler            ; 17: CAN
+                DCD     LIN_IRQHandler            ; 18: LIN
+                DCD     I2C_IRQHandler            ; 19: I2C ADC/DAC
+                DCD     0                         ; 20: Reserved
+                DCD     0                         ; 21: Reserved
+                DCD     0                         ; 22: Reserved
+                DCD     0                         ; 23: Reserved
+                DCD     0                         ; 24: Reserved
+                DCD     0                         ; 25: Reserved
+                DCD     0                         ; 26: Reserved
+                DCD     0                         ; 27: Reserved
+                DCD     CPU_CLCD_IRQHandler       ; 28: Reserved - CPU FPGA CLCD
+                DCD     0                         ; 29: Reserved - CPU FPGA
+                DCD     UART3_IRQHandler          ; 30: UART3    - CPU FPGA
+                DCD     SPI_IRQHandler            ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size  EQU     __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT  Reset_Handler             [WEAK]
+                IMPORT  SystemInit
+                IMPORT  __main
+                LDR     R0, =SystemInit
+                BLX     R0
+                LDR     R0, =__main
+                BX      R0
+                ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler               [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler         [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler         [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler          [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler        [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler               [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler          [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler            [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler           [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  WDT_IRQHandler            [WEAK]
+                EXPORT  RTC_IRQHandler            [WEAK]
+                EXPORT  TIM0_IRQHandler           [WEAK]
+                EXPORT  TIM2_IRQHandler           [WEAK]
+                EXPORT  MCIA_IRQHandler           [WEAK]
+                EXPORT  MCIB_IRQHandler           [WEAK]
+                EXPORT  UART0_IRQHandler          [WEAK]
+                EXPORT  UART1_IRQHandler          [WEAK]
+                EXPORT  UART2_IRQHandler          [WEAK]
+                EXPORT  UART3_IRQHandler          [WEAK]
+                EXPORT  UART4_IRQHandler          [WEAK]
+                EXPORT  AACI_IRQHandler           [WEAK]
+                EXPORT  CLCD_IRQHandler           [WEAK]
+                EXPORT  ENET_IRQHandler           [WEAK]
+                EXPORT  USBDC_IRQHandler          [WEAK]
+                EXPORT  USBHC_IRQHandler          [WEAK]
+                EXPORT  CHLCD_IRQHandler          [WEAK]
+                EXPORT  FLEXRAY_IRQHandler        [WEAK]
+                EXPORT  CAN_IRQHandler            [WEAK]
+                EXPORT  LIN_IRQHandler            [WEAK]
+                EXPORT  I2C_IRQHandler            [WEAK]
+                EXPORT  CPU_CLCD_IRQHandler       [WEAK]
+                EXPORT  SPI_IRQHandler            [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+                B       .
+
+                ENDP
+
+
+                ALIGN
+
+
+; User Initial Stack & Heap
+
+                IF      :DEF:__MICROLIB
+
+                EXPORT  __initial_sp
+                EXPORT  __heap_base
+                EXPORT  __heap_limit
+
+                ELSE
+
+                IMPORT  __use_two_region_memory
+                EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap PROC
+                LDR     R0, =  Heap_Mem
+                LDR     R1, =(Stack_Mem + Stack_Size)
+                LDR     R2, = (Heap_Mem +  Heap_Size)
+                LDR     R3, = Stack_Mem
+                BX      LR
+                ENDP
+
+                ALIGN
+
+                ENDIF
+
+
+                END
diff --git a/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM3/system_ARMCM3.c b/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM3/system_ARMCM3.c
new file mode 100644
index 0000000..f08df7a
--- /dev/null
+++ b/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM3/system_ARMCM3.c
@@ -0,0 +1,68 @@
+/**************************************************************************//**
+ * @file     system_ARMCM3.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM3 Device Series
+ * @version  V5.00
+ * @date     08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM3.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            ( 5000000U)      /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4_FP/startup_ARMCM4.s b/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
new file mode 100644
index 0000000..dae6439
--- /dev/null
+++ b/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
@@ -0,0 +1,262 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM4.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM4 Device Series
+; * @version  V5.00
+; * @date     02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size      EQU     0x00000400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size       EQU     0x00000C00
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp              ; Top of Stack
+                DCD     Reset_Handler             ; Reset Handler
+                DCD     NMI_Handler               ; NMI Handler
+                DCD     HardFault_Handler         ; Hard Fault Handler
+                DCD     MemManage_Handler         ; MPU Fault Handler
+                DCD     BusFault_Handler          ; Bus Fault Handler
+                DCD     UsageFault_Handler        ; Usage Fault Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     SVC_Handler               ; SVCall Handler
+                DCD     DebugMon_Handler          ; Debug Monitor Handler
+                DCD     0                         ; Reserved
+                DCD     PendSV_Handler            ; PendSV Handler
+                DCD     SysTick_Handler           ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WDT_IRQHandler            ;  0:  Watchdog Timer
+                DCD     RTC_IRQHandler            ;  1:  Real Time Clock
+                DCD     TIM0_IRQHandler           ;  2:  Timer0 / Timer1
+                DCD     TIM2_IRQHandler           ;  3:  Timer2 / Timer3
+                DCD     MCIA_IRQHandler           ;  4:  MCIa
+                DCD     MCIB_IRQHandler           ;  5:  MCIb
+                DCD     UART0_IRQHandler          ;  6:  UART0 - DUT FPGA
+                DCD     UART1_IRQHandler          ;  7:  UART1 - DUT FPGA
+                DCD     UART2_IRQHandler          ;  8:  UART2 - DUT FPGA
+                DCD     UART4_IRQHandler          ;  9:  UART4 - not connected
+                DCD     AACI_IRQHandler           ; 10: AACI / AC97
+                DCD     CLCD_IRQHandler           ; 11: CLCD Combined Interrupt
+                DCD     ENET_IRQHandler           ; 12: Ethernet
+                DCD     USBDC_IRQHandler          ; 13: USB Device
+                DCD     USBHC_IRQHandler          ; 14: USB Host Controller
+                DCD     CHLCD_IRQHandler          ; 15: Character LCD
+                DCD     FLEXRAY_IRQHandler        ; 16: Flexray
+                DCD     CAN_IRQHandler            ; 17: CAN
+                DCD     LIN_IRQHandler            ; 18: LIN
+                DCD     I2C_IRQHandler            ; 19: I2C ADC/DAC
+                DCD     0                         ; 20: Reserved
+                DCD     0                         ; 21: Reserved
+                DCD     0                         ; 22: Reserved
+                DCD     0                         ; 23: Reserved
+                DCD     0                         ; 24: Reserved
+                DCD     0                         ; 25: Reserved
+                DCD     0                         ; 26: Reserved
+                DCD     0                         ; 27: Reserved
+                DCD     CPU_CLCD_IRQHandler       ; 28: Reserved - CPU FPGA CLCD
+                DCD     0                         ; 29: Reserved - CPU FPGA
+                DCD     UART3_IRQHandler          ; 30: UART3    - CPU FPGA
+                DCD     SPI_IRQHandler            ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size  EQU     __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT  Reset_Handler             [WEAK]
+                IMPORT  SystemInit
+                IMPORT  __main
+                LDR     R0, =SystemInit
+                BLX     R0
+                LDR     R0, =__main
+                BX      R0
+                ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler               [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler         [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler         [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler          [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler        [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler               [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler          [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler            [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler           [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  WDT_IRQHandler            [WEAK]
+                EXPORT  RTC_IRQHandler            [WEAK]
+                EXPORT  TIM0_IRQHandler           [WEAK]
+                EXPORT  TIM2_IRQHandler           [WEAK]
+                EXPORT  MCIA_IRQHandler           [WEAK]
+                EXPORT  MCIB_IRQHandler           [WEAK]
+                EXPORT  UART0_IRQHandler          [WEAK]
+                EXPORT  UART1_IRQHandler          [WEAK]
+                EXPORT  UART2_IRQHandler          [WEAK]
+                EXPORT  UART3_IRQHandler          [WEAK]
+                EXPORT  UART4_IRQHandler          [WEAK]
+                EXPORT  AACI_IRQHandler           [WEAK]
+                EXPORT  CLCD_IRQHandler           [WEAK]
+                EXPORT  ENET_IRQHandler           [WEAK]
+                EXPORT  USBDC_IRQHandler          [WEAK]
+                EXPORT  USBHC_IRQHandler          [WEAK]
+                EXPORT  CHLCD_IRQHandler          [WEAK]
+                EXPORT  FLEXRAY_IRQHandler        [WEAK]
+                EXPORT  CAN_IRQHandler            [WEAK]
+                EXPORT  LIN_IRQHandler            [WEAK]
+                EXPORT  I2C_IRQHandler            [WEAK]
+                EXPORT  CPU_CLCD_IRQHandler       [WEAK]
+                EXPORT  SPI_IRQHandler            [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+                B       .
+
+                ENDP
+
+
+                ALIGN
+
+
+; User Initial Stack & Heap
+
+                IF      :DEF:__MICROLIB
+
+                EXPORT  __initial_sp
+                EXPORT  __heap_base
+                EXPORT  __heap_limit
+
+                ELSE
+
+                IMPORT  __use_two_region_memory
+                EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap PROC
+                LDR     R0, =  Heap_Mem
+                LDR     R1, =(Stack_Mem + Stack_Size)
+                LDR     R2, = (Heap_Mem +  Heap_Size)
+                LDR     R3, = Stack_Mem
+                BX      LR
+                ENDP
+
+                ALIGN
+
+                ENDIF
+
+
+                END
diff --git a/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4_FP/system_ARMCM4.c
new file mode 100644
index 0000000..070fa1e
--- /dev/null
+++ b/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM4_FP/system_ARMCM4.c
@@ -0,0 +1,83 @@
+/**************************************************************************//**
+ * @file     system_ARMCM4.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM4 Device Series
+ * @version  V5.00
+ * @date     08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM4)
+  #include "ARMCM4.h"
+#elif defined (ARMCM4_FP)
+  #include "ARMCM4_FP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            ( 5000000U)      /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1)
+  SCB->CPACR |= ((3U << 10*2) |           /* set CP10 Full Access */
+                 (3U << 11*2)  );         /* set CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/gcc_arm.ld b/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/gcc_arm.ld
new file mode 100644
index 0000000..b987fd1
--- /dev/null
+++ b/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/gcc_arm.ld
@@ -0,0 +1,196 @@
+/* Linker script to configure memory regions. */
+MEMORY
+{
+  FLASH (rx)  : ORIGIN = 0x00000000, LENGTH = 512K
+  RAM   (rwx) : ORIGIN = 0x20000000, LENGTH = 256K
+}
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __copy_table_start__
+ *   __copy_table_end__
+ *   __zero_table_start__
+ *   __zero_table_end__
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapBase
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ *   __Vectors_End
+ *   __Vectors_Size
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+	.text :
+	{
+		KEEP(*(.vectors))
+		__Vectors_End = .;
+		__Vectors_Size = __Vectors_End - __Vectors;
+		__end__ = .;
+
+		*(.text*)
+
+		KEEP(*(.init))
+		KEEP(*(.fini))
+
+		/* .ctors */
+		*crtbegin.o(.ctors)
+		*crtbegin?.o(.ctors)
+		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+		*(SORT(.ctors.*))
+		*(.ctors)
+
+		/* .dtors */
+ 		*crtbegin.o(.dtors)
+ 		*crtbegin?.o(.dtors)
+ 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ 		*(SORT(.dtors.*))
+ 		*(.dtors)
+
+		*(.rodata*)
+
+		KEEP(*(.eh_frame*))
+	} > FLASH
+
+	.ARM.extab :
+	{
+		*(.ARM.extab* .gnu.linkonce.armextab.*)
+	} > FLASH
+
+	__exidx_start = .;
+	.ARM.exidx :
+	{
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
+	} > FLASH
+	__exidx_end = .;
+
+	/* To copy multiple ROM to RAM sections,
+	 * uncomment .copy.table section and,
+	 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.copy.table :
+	{
+		. = ALIGN(4);
+		__copy_table_start__ = .;
+		LONG (__etext)
+		LONG (__data_start__)
+		LONG (__data_end__ - __data_start__)
+		LONG (__etext2)
+		LONG (__data2_start__)
+		LONG (__data2_end__ - __data2_start__)
+		__copy_table_end__ = .;
+	} > FLASH
+	*/
+
+	/* To clear multiple BSS sections,
+	 * uncomment .zero.table section and,
+	 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.zero.table :
+	{
+		. = ALIGN(4);
+		__zero_table_start__ = .;
+		LONG (__bss_start__)
+		LONG (__bss_end__ - __bss_start__)
+		LONG (__bss2_start__)
+		LONG (__bss2_end__ - __bss2_start__)
+		__zero_table_end__ = .;
+	} > FLASH
+	*/
+
+	__etext = .;
+
+	.data : AT (__etext)
+	{
+		__data_start__ = .;
+		*(vtable)
+		*(.data*)
+
+		. = ALIGN(4);
+		/* preinit data */
+		PROVIDE_HIDDEN (__preinit_array_start = .);
+		KEEP(*(.preinit_array))
+		PROVIDE_HIDDEN (__preinit_array_end = .);
+
+		. = ALIGN(4);
+		/* init data */
+		PROVIDE_HIDDEN (__init_array_start = .);
+		KEEP(*(SORT(.init_array.*)))
+		KEEP(*(.init_array))
+		PROVIDE_HIDDEN (__init_array_end = .);
+
+
+		. = ALIGN(4);
+		/* finit data */
+		PROVIDE_HIDDEN (__fini_array_start = .);
+		KEEP(*(SORT(.fini_array.*)))
+		KEEP(*(.fini_array))
+		PROVIDE_HIDDEN (__fini_array_end = .);
+
+		KEEP(*(.jcr*))
+		. = ALIGN(4);
+		/* All data end */
+		__data_end__ = .;
+
+	} > RAM
+
+	.bss :
+	{
+		. = ALIGN(4);
+		__bss_start__ = .;
+		*(.bss*)
+		*(COMMON)
+		. = ALIGN(4);
+		__bss_end__ = .;
+	} > RAM
+
+	.heap (COPY):
+	{
+		__HeapBase = .;
+		__end__ = .;
+		end = __end__;
+		KEEP(*(.heap*))
+		__HeapLimit = .;
+	} > RAM
+
+	/* .stack_dummy section doesn't contains any symbols. It is only
+	 * used for linker to calculate size of stack sections, and assign
+	 * values to stack symbols later */
+	.stack_dummy (COPY):
+	{
+		KEEP(*(.stack*))
+	} > RAM
+
+	/* Set stack top to end of RAM, and stack limit move down by
+	 * size of stack_dummy section */
+	__StackTop = ORIGIN(RAM) + LENGTH(RAM);
+	__StackLimit = __StackTop - SIZEOF(.stack_dummy);
+	PROVIDE(__stack = __StackTop);
+
+	/* Check if data + heap + stack exceeds RAM limit */
+	ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/startup_ARMCM7.c b/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/startup_ARMCM7.c
new file mode 100644
index 0000000..26edb9f
--- /dev/null
+++ b/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/startup_ARMCM7.c
@@ -0,0 +1,295 @@
+/**************************************************************************//**
+ * @file     startup_ARMCM7.s
+ * @brief    CMSIS Core Device Startup File for
+ *           ARMCM7 Device Series
+ * @version  V5.00
+ * @date     26. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <stdint.h>
+
+
+/*----------------------------------------------------------------------------
+  Linker generated Symbols
+ *----------------------------------------------------------------------------*/
+extern uint32_t __etext;
+extern uint32_t __data_start__;
+extern uint32_t __data_end__;
+extern uint32_t __copy_table_start__;
+extern uint32_t __copy_table_end__;
+extern uint32_t __zero_table_start__;
+extern uint32_t __zero_table_end__;
+extern uint32_t __bss_start__;
+extern uint32_t __bss_end__;
+extern uint32_t __StackTop;
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler Function Prototype
+ *----------------------------------------------------------------------------*/
+typedef void( *pFunc )( void );
+
+
+/*----------------------------------------------------------------------------
+  External References
+ *----------------------------------------------------------------------------*/
+#ifndef __START
+extern void  _start(void) __attribute__((noreturn));    /* PreeMain (C library entry point) */
+#else
+extern int  __START(void) __attribute__((noreturn));    /* main entry point */
+#endif
+
+#ifndef __NO_SYSTEM_INIT
+extern void SystemInit (void);            /* CMSIS System Initialization      */
+#endif
+
+
+/*----------------------------------------------------------------------------
+  Internal References
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void);                          /* Default empty handler */
+void Reset_Handler(void);                            /* Reset Handler */
+
+
+/*----------------------------------------------------------------------------
+  User Initial Stack & Heap
+ *----------------------------------------------------------------------------*/
+#ifndef __STACK_SIZE
+  #define	__STACK_SIZE  0x00000400
+#endif
+static uint8_t stack[__STACK_SIZE] __attribute__ ((aligned(8), used, section(".stack")));
+
+#ifndef __HEAP_SIZE
+  #define	__HEAP_SIZE   0x00000C00
+#endif
+#if __HEAP_SIZE > 0
+static uint8_t heap[__HEAP_SIZE]   __attribute__ ((aligned(8), used, section(".heap")));
+#endif
+
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler
+ *----------------------------------------------------------------------------*/
+/* Cortex-M7 Processor Exceptions */
+void NMI_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void HardFault_Handler   (void) __attribute__ ((weak, alias("Default_Handler")));
+void MemManage_Handler   (void) __attribute__ ((weak, alias("Default_Handler")));
+void BusFault_Handler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void UsageFault_Handler  (void) __attribute__ ((weak, alias("Default_Handler")));
+void SVC_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void DebugMon_Handler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void PendSV_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void SysTick_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+
+/* ARMCM7 Specific Interrupts */
+void WDT_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void RTC_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIM0_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIM2_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void MCIA_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void MCIB_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART0_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART1_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART2_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART4_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void AACI_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void CLCD_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void ENET_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void USBDC_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void USBHC_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void CHLCD_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void FLEXRAY_IRQHandler  (void) __attribute__ ((weak, alias("Default_Handler")));
+void CAN_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void LIN_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void I2C_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void CPU_CLCD_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART3_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void SPI_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Vector table
+ *----------------------------------------------------------------------------*/
+const pFunc __Vectors[] __attribute__ ((section(".vectors"))) = {
+  /* Cortex-M7 Exceptions Handler */
+  (pFunc)((uint32_t)&__StackTop),           /*      Initial Stack Pointer     */
+  Reset_Handler,                            /*      Reset Handler             */
+  NMI_Handler,                              /*      NMI Handler               */
+  HardFault_Handler,                        /*      Hard Fault Handler        */
+  MemManage_Handler,                        /*      MPU Fault Handler         */
+  BusFault_Handler,                         /*      Bus Fault Handler         */
+  UsageFault_Handler,                       /*      Usage Fault Handler       */
+  0,                                        /*      Reserved                  */
+  0,                                        /*      Reserved                  */
+  0,                                        /*      Reserved                  */
+  0,                                        /*      Reserved                  */
+  SVC_Handler,                              /*      SVCall Handler            */
+  DebugMon_Handler,                         /*      Debug Monitor Handler     */
+  0,                                        /*      Reserved                  */
+  PendSV_Handler,                           /*      PendSV Handler            */
+  SysTick_Handler,                          /*      SysTick Handler           */
+
+  /* External interrupts */
+  WDT_IRQHandler,                           /*  0:  Watchdog Timer            */
+  RTC_IRQHandler,                           /*  1:  Real Time Clock           */
+  TIM0_IRQHandler,                          /*  2:  Timer0 / Timer1           */
+  TIM2_IRQHandler,                          /*  3:  Timer2 / Timer3           */
+  MCIA_IRQHandler,                          /*  4:  MCIa                      */
+  MCIB_IRQHandler,                          /*  5:  MCIb                      */
+  UART0_IRQHandler,                         /*  6:  UART0 - DUT FPGA          */
+  UART1_IRQHandler,                         /*  7:  UART1 - DUT FPGA          */
+  UART2_IRQHandler,                         /*  8:  UART2 - DUT FPGA          */
+  UART4_IRQHandler,                         /*  9:  UART4 - not connected     */
+  AACI_IRQHandler,                          /* 10: AACI / AC97                */
+  CLCD_IRQHandler,                          /* 11: CLCD Combined Interrupt    */
+  ENET_IRQHandler,                          /* 12: Ethernet                   */
+  USBDC_IRQHandler,                         /* 13: USB Device                 */
+  USBHC_IRQHandler,                         /* 14: USB Host Controller        */
+  CHLCD_IRQHandler,                         /* 15: Character LCD              */
+  FLEXRAY_IRQHandler,                       /* 16: Flexray                    */
+  CAN_IRQHandler,                           /* 17: CAN                        */
+  LIN_IRQHandler,                           /* 18: LIN                        */
+  I2C_IRQHandler,                           /* 19: I2C ADC/DAC                */
+  0,                                        /* 20: Reserved                   */
+  0,                                        /* 21: Reserved                   */
+  0,                                        /* 22: Reserved                   */
+  0,                                        /* 23: Reserved                   */
+  0,                                        /* 24: Reserved                   */
+  0,                                        /* 25: Reserved                   */
+  0,                                        /* 26: Reserved                   */
+  0,                                        /* 27: Reserved                   */
+  CPU_CLCD_IRQHandler,                      /* 28: Reserved - CPU FPGA CLCD   */
+  0,                                        /* 29: Reserved - CPU FPGA        */
+  UART3_IRQHandler,                         /* 30: UART3    - CPU FPGA        */
+  SPI_IRQHandler                            /* 31: SPI Touchscreen - CPU FPGA */
+};
+
+
+/*----------------------------------------------------------------------------
+  Reset Handler called on controller reset
+ *----------------------------------------------------------------------------*/
+void Reset_Handler(void) {
+  uint32_t *pSrc, *pDest;
+  uint32_t *pTable __attribute__((unused));
+
+/*  Firstly it copies data from read only memory to RAM. There are two schemes
+ *  to copy. One can copy more than one sections. Another can only copy
+ *  one section.  The former scheme needs more instructions and read-only
+ *  data to implement than the latter.
+ *  Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes.  */
+
+#ifdef __STARTUP_COPY_MULTIPLE
+/*  Multiple sections scheme.
+ *
+ *  Between symbol address __copy_table_start__ and __copy_table_end__,
+ *  there are array of triplets, each of which specify:
+ *    offset 0: LMA of start of a section to copy from
+ *    offset 4: VMA of start of a section to copy to
+ *    offset 8: size of the section to copy. Must be multiply of 4
+ *
+ *  All addresses must be aligned to 4 bytes boundary.
+ */
+  pTable = &__copy_table_start__;
+
+  for (; pTable < &__copy_table_end__; pTable = pTable + 3) {
+		pSrc  = (uint32_t*)*(pTable + 0);
+		pDest = (uint32_t*)*(pTable + 1);
+		for (; pDest < (uint32_t*)(*(pTable + 1) + *(pTable + 2)) ; ) {
+      *pDest++ = *pSrc++;
+		}
+	}
+#else
+/*  Single section scheme.
+ *
+ *  The ranges of copy from/to are specified by following symbols
+ *    __etext: LMA of start of the section to copy from. Usually end of text
+ *    __data_start__: VMA of start of the section to copy to
+ *    __data_end__: VMA of end of the section to copy to
+ *
+ *  All addresses must be aligned to 4 bytes boundary.
+ */
+  pSrc  = &__etext;
+  pDest = &__data_start__;
+
+  for ( ; pDest < &__data_end__ ; ) {
+    *pDest++ = *pSrc++;
+  }
+#endif /*__STARTUP_COPY_MULTIPLE */
+
+/*  This part of work usually is done in C library startup code. Otherwise,
+ *  define this macro to enable it in this startup.
+ *
+ *  There are two schemes too. One can clear multiple BSS sections. Another
+ *  can only clear one section. The former is more size expensive than the
+ *  latter.
+ *
+ *  Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former.
+ *  Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later.
+ */
+#ifdef __STARTUP_CLEAR_BSS_MULTIPLE
+/*  Multiple sections scheme.
+ *
+ *  Between symbol address __copy_table_start__ and __copy_table_end__,
+ *  there are array of tuples specifying:
+ *    offset 0: Start of a BSS section
+ *    offset 4: Size of this BSS section. Must be multiply of 4
+ */
+  pTable = &__zero_table_start__;
+
+  for (; pTable < &__zero_table_end__; pTable = pTable + 2) {
+		pDest = (uint32_t*)*(pTable + 0);
+		for (; pDest < (uint32_t*)(*(pTable + 0) + *(pTable + 1)) ; ) {
+      *pDest++ = 0;
+		}
+	}
+#elif defined (__STARTUP_CLEAR_BSS)
+/*  Single BSS section scheme.
+ *
+ *  The BSS section is specified by following symbols
+ *    __bss_start__: start of the BSS section.
+ *    __bss_end__: end of the BSS section.
+ *
+ *  Both addresses must be aligned to 4 bytes boundary.
+ */
+  pDest = &__bss_start__;
+
+  for ( ; pDest < &__bss_end__ ; ) {
+    *pDest++ = 0UL;
+  }
+#endif /* __STARTUP_CLEAR_BSS_MULTIPLE || __STARTUP_CLEAR_BSS */
+
+#ifndef __NO_SYSTEM_INIT
+	SystemInit();
+#endif
+
+#ifndef __START
+#define __START _start
+#endif
+	__START();
+
+}
+
+
+/*----------------------------------------------------------------------------
+  Default Handler for Exceptions / Interrupts
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void) {
+
+	while(1);
+}
diff --git a/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/startup_ARMCM7.s b/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
new file mode 100644
index 0000000..b69f038
--- /dev/null
+++ b/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
@@ -0,0 +1,262 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM7.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM7 Device Series
+; * @version  V5.00
+; * @date     02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size      EQU     0x00000400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size       EQU     0x00000C00
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp              ; Top of Stack
+                DCD     Reset_Handler             ; Reset Handler
+                DCD     NMI_Handler               ; NMI Handler
+                DCD     HardFault_Handler         ; Hard Fault Handler
+                DCD     MemManage_Handler         ; MPU Fault Handler
+                DCD     BusFault_Handler          ; Bus Fault Handler
+                DCD     UsageFault_Handler        ; Usage Fault Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     SVC_Handler               ; SVCall Handler
+                DCD     DebugMon_Handler          ; Debug Monitor Handler
+                DCD     0                         ; Reserved
+                DCD     PendSV_Handler            ; PendSV Handler
+                DCD     SysTick_Handler           ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WDT_IRQHandler            ;  0:  Watchdog Timer
+                DCD     RTC_IRQHandler            ;  1:  Real Time Clock
+                DCD     TIM0_IRQHandler           ;  2:  Timer0 / Timer1
+                DCD     TIM2_IRQHandler           ;  3:  Timer2 / Timer3
+                DCD     MCIA_IRQHandler           ;  4:  MCIa
+                DCD     MCIB_IRQHandler           ;  5:  MCIb
+                DCD     UART0_IRQHandler          ;  6:  UART0 - DUT FPGA
+                DCD     UART1_IRQHandler          ;  7:  UART1 - DUT FPGA
+                DCD     UART2_IRQHandler          ;  8:  UART2 - DUT FPGA
+                DCD     UART4_IRQHandler          ;  9:  UART4 - not connected
+                DCD     AACI_IRQHandler           ; 10: AACI / AC97
+                DCD     CLCD_IRQHandler           ; 11: CLCD Combined Interrupt
+                DCD     ENET_IRQHandler           ; 12: Ethernet
+                DCD     USBDC_IRQHandler          ; 13: USB Device
+                DCD     USBHC_IRQHandler          ; 14: USB Host Controller
+                DCD     CHLCD_IRQHandler          ; 15: Character LCD
+                DCD     FLEXRAY_IRQHandler        ; 16: Flexray
+                DCD     CAN_IRQHandler            ; 17: CAN
+                DCD     LIN_IRQHandler            ; 18: LIN
+                DCD     I2C_IRQHandler            ; 19: I2C ADC/DAC
+                DCD     0                         ; 20: Reserved
+                DCD     0                         ; 21: Reserved
+                DCD     0                         ; 22: Reserved
+                DCD     0                         ; 23: Reserved
+                DCD     0                         ; 24: Reserved
+                DCD     0                         ; 25: Reserved
+                DCD     0                         ; 26: Reserved
+                DCD     0                         ; 27: Reserved
+                DCD     CPU_CLCD_IRQHandler       ; 28: Reserved - CPU FPGA CLCD
+                DCD     0                         ; 29: Reserved - CPU FPGA
+                DCD     UART3_IRQHandler          ; 30: UART3    - CPU FPGA
+                DCD     SPI_IRQHandler            ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size  EQU     __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT  Reset_Handler             [WEAK]
+                IMPORT  SystemInit
+                IMPORT  __main
+                LDR     R0, =SystemInit
+                BLX     R0
+                LDR     R0, =__main
+                BX      R0
+                ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler               [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler         [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler         [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler          [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler        [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler               [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler          [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler            [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler           [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  WDT_IRQHandler            [WEAK]
+                EXPORT  RTC_IRQHandler            [WEAK]
+                EXPORT  TIM0_IRQHandler           [WEAK]
+                EXPORT  TIM2_IRQHandler           [WEAK]
+                EXPORT  MCIA_IRQHandler           [WEAK]
+                EXPORT  MCIB_IRQHandler           [WEAK]
+                EXPORT  UART0_IRQHandler          [WEAK]
+                EXPORT  UART1_IRQHandler          [WEAK]
+                EXPORT  UART2_IRQHandler          [WEAK]
+                EXPORT  UART3_IRQHandler          [WEAK]
+                EXPORT  UART4_IRQHandler          [WEAK]
+                EXPORT  AACI_IRQHandler           [WEAK]
+                EXPORT  CLCD_IRQHandler           [WEAK]
+                EXPORT  ENET_IRQHandler           [WEAK]
+                EXPORT  USBDC_IRQHandler          [WEAK]
+                EXPORT  USBHC_IRQHandler          [WEAK]
+                EXPORT  CHLCD_IRQHandler          [WEAK]
+                EXPORT  FLEXRAY_IRQHandler        [WEAK]
+                EXPORT  CAN_IRQHandler            [WEAK]
+                EXPORT  LIN_IRQHandler            [WEAK]
+                EXPORT  I2C_IRQHandler            [WEAK]
+                EXPORT  CPU_CLCD_IRQHandler       [WEAK]
+                EXPORT  SPI_IRQHandler            [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+                B       .
+
+                ENDP
+
+
+                ALIGN
+
+
+; User Initial Stack & Heap
+
+                IF      :DEF:__MICROLIB
+
+                EXPORT  __initial_sp
+                EXPORT  __heap_base
+                EXPORT  __heap_limit
+
+                ELSE
+
+                IMPORT  __use_two_region_memory
+                EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap PROC
+                LDR     R0, =  Heap_Mem
+                LDR     R1, =(Stack_Mem + Stack_Size)
+                LDR     R2, = (Heap_Mem +  Heap_Size)
+                LDR     R3, = Stack_Mem
+                BX      LR
+                ENDP
+
+                ALIGN
+
+                ENDIF
+
+
+                END
diff --git a/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/system_ARMCM7.c
new file mode 100644
index 0000000..65bfaca
--- /dev/null
+++ b/NN/Examples/ARM/arm_nn_examples/gru/RTE/Device/ARMCM7_SP/system_ARMCM7.c
@@ -0,0 +1,85 @@
+/**************************************************************************//**
+ * @file     system_ARMCM7.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM7 Device Series
+ * @version  V5.00
+ * @date     08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM7)
+  #include "ARMCM7.h"
+#elif defined (ARMCM7_SP)
+  #include "ARMCM7_SP.h"
+#elif defined (ARMCM7_DP)
+  #include "ARMCM7_DP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            ( 5000000U)      /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1)
+  SCB->CPACR |= ((3U << 10*2) |           /* set CP10 Full Access */
+                 (3U << 11*2)  );         /* set CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/NN-example-cifar10.ewp b/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/NN-example-cifar10.ewp
new file mode 100644
index 0000000..d3be3cf
--- /dev/null
+++ b/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/NN-example-cifar10.ewp
@@ -0,0 +1,2260 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+    <fileVersion>3</fileVersion>
+    <configuration>
+        <name>Debug</name>
+        <toolchain>
+            <name>ARM</name>
+        </toolchain>
+        <debug>1</debug>
+        <settings>
+            <name>General</name>
+            <archiveVersion>3</archiveVersion>
+            <data>
+                <version>30</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>ExePath</name>
+                    <state>Debug\Exe</state>
+                </option>
+                <option>
+                    <name>ObjPath</name>
+                    <state>Debug\Obj</state>
+                </option>
+                <option>
+                    <name>ListPath</name>
+                    <state>Debug\List</state>
+                </option>
+                <option>
+                    <name>GEndianMode</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>Input description</name>
+                    <state>Automatic choice of formatter, without multibyte support.</state>
+                </option>
+                <option>
+                    <name>Output description</name>
+                    <state>Automatic choice of formatter, without multibyte support.</state>
+                </option>
+                <option>
+                    <name>GOutputBinary</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGCoreOrChip</name>
+                    <state>2</state>
+                </option>
+                <option>
+                    <name>GRuntimeLibSelect</name>
+                    <version>0</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GRuntimeLibSelectSlave</name>
+                    <version>0</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RTDescription</name>
+                    <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
+                </option>
+                <option>
+                    <name>OGProductVersion</name>
+                    <state>8.22.2.15993</state>
+                </option>
+                <option>
+                    <name>OGLastSavedByProductVersion</name>
+                    <state>8.22.2.15993</state>
+                </option>
+                <option>
+                    <name>GeneralEnableMisra</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GeneralMisraVerbose</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGChipSelectEditMenu</name>
+                    <state>Default	None</state>
+                </option>
+                <option>
+                    <name>GenLowLevelInterface</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GEndianModeBE</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OGBufferedTerminalOutput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GenStdoutInterface</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GeneralMisraRules98</name>
+                    <version>0</version>
+                    <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+                </option>
+                <option>
+                    <name>GeneralMisraVer</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GeneralMisraRules04</name>
+                    <version>0</version>
+                    <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+                </option>
+                <option>
+                    <name>RTConfigPath2</name>
+                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+                </option>
+                <option>
+                    <name>GBECoreSlave</name>
+                    <version>26</version>
+                    <state>34</state>
+                </option>
+                <option>
+                    <name>OGUseCmsis</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OGUseCmsisDspLib</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GRuntimeLibThreads</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CoreVariant</name>
+                    <version>26</version>
+                    <state>34</state>
+                </option>
+                <option>
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+                    <state></state>
+                </option>
+                <option>
+                    <name>CrcAlgorithm</name>
+                    <version>1</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CrcUnitSize</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkThreadsSlave</name>
+                    <state>1</state>
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+                <option>
+                    <name>IlinkLogCallGraph</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkIcfFile_AltDefault</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkEncInput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkEncOutput</name>
+                    <state>0</state>
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+                <option>
+                    <name>IlinkEncOutputBom</name>
+                    <state>1</state>
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+                <option>
+                    <name>IlinkHeapSelect</name>
+                    <state>1</state>
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+                <option>
+                    <name>IlinkLocaleSelect</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>IARCHIVE</name>
+            <archiveVersion>0</archiveVersion>
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+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
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+                    <name>IarchiveInputs</name>
+                    <state></state>
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+                <option>
+                    <name>IarchiveOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IarchiveOutput</name>
+                    <state>###Unitialized###</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>BILINK</name>
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+            <data />
+        </settings>
+        <settings>
+            <name>Coder</name>
+            <archiveVersion>0</archiveVersion>
+            <data />
+        </settings>
+    </configuration>
+    <configuration>
+        <name>Release</name>
+        <toolchain>
+            <name>ARM</name>
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+        <debug>0</debug>
+        <settings>
+            <name>General</name>
+            <archiveVersion>3</archiveVersion>
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+                <wantNonLocal>1</wantNonLocal>
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+                    <state>Release\Exe</state>
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+                <option>
+                    <name>ObjPath</name>
+                    <state>Release\Obj</state>
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+                <option>
+                    <name>ListPath</name>
+                    <state>Release\List</state>
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+                    <name>GEndianMode</name>
+                    <state>0</state>
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+                <option>
+                    <name>Input description</name>
+                    <state></state>
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+                    <name>Output description</name>
+                    <state></state>
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+                <option>
+                    <name>GOutputBinary</name>
+                    <state>0</state>
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+                <option>
+                    <name>OGCoreOrChip</name>
+                    <state>2</state>
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+                    <name>GRuntimeLibSelect</name>
+                    <version>0</version>
+                    <state>1</state>
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+                <option>
+                    <name>GRuntimeLibSelectSlave</name>
+                    <version>0</version>
+                    <state>1</state>
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+                <option>
+                    <name>RTDescription</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OGProductVersion</name>
+                    <state>8.22.2.15993</state>
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+                <option>
+                    <name>OGLastSavedByProductVersion</name>
+                    <state>8.22.2.15993</state>
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+                <option>
+                    <name>GeneralEnableMisra</name>
+                    <state>0</state>
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+                <option>
+                    <name>GeneralMisraVerbose</name>
+                    <state>0</state>
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+                <option>
+                    <name>OGChipSelectEditMenu</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>GenLowLevelInterface</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GEndianModeBE</name>
+                    <state>0</state>
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+                <option>
+                    <name>OGBufferedTerminalOutput</name>
+                    <state>0</state>
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+                <option>
+                    <name>GenStdoutInterface</name>
+                    <state>0</state>
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+                    <version>0</version>
+                    <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
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+                    <name>GeneralMisraVer</name>
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+                    <version>0</version>
+                    <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
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+                    <name>GBECoreSlave</name>
+                    <version>26</version>
+                    <state>38</state>
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+                    <name>OGUseCmsis</name>
+                    <state>1</state>
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+                <option>
+                    <name>OGUseCmsisDspLib</name>
+                    <state>0</state>
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+                <option>
+                    <name>GRuntimeLibThreads</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CoreVariant</name>
+                    <version>26</version>
+                    <state>34</state>
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+                <option>
+                    <name>GFPUDeviceSlave</name>
+                    <state>-</state>
+                </option>
+                <option>
+                    <name>FPU2</name>
+                    <version>0</version>
+                    <state>0</state>
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+                <option>
+                    <name>NrRegs</name>
+                    <version>0</version>
+                    <state>0</state>
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+                <option>
+                    <name>NEON</name>
+                    <state>0</state>
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+                    <name>GFPUCoreSlave2</name>
+                    <version>26</version>
+                    <state>38</state>
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+                <option>
+                    <name>OGCMSISPackSelectDevice</name>
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+                <option>
+                    <name>OgLibHeap</name>
+                    <state>0</state>
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+                <option>
+                    <name>OGLibAdditionalLocale</name>
+                    <state>0</state>
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+                    <name>OGPrintfVariant</name>
+                    <version>0</version>
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+                <option>
+                    <name>OGPrintfMultibyteSupport</name>
+                    <state>0</state>
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+                <option>
+                    <name>OGScanfVariant</name>
+                    <version>0</version>
+                    <state>0</state>
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+                <option>
+                    <name>OGScanfMultibyteSupport</name>
+                    <state>0</state>
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+                <option>
+                    <name>GenLocaleTags</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>GenLocaleDisplayOnly</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>DSPExtension</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>TrustZone</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>ICCARM</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>34</version>
+                <wantNonLocal>1</wantNonLocal>
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+                <option>
+                    <name>CCDefines</name>
+                    <state>NDEBUG</state>
+                    <state>$CMSIS_PACK_DEVICE_DEFINES$</state>
+                    <state>_RTE_</state>
+                </option>
+                <option>
+                    <name>CCPreprocFile</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCPreprocComments</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCPreprocLine</name>
+                    <state>1</state>
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+                <option>
+                    <name>CCListCFile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListCMnemonics</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListCMessages</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListAssFile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListAssSource</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCEnableRemarks</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCDiagSuppress</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCDiagRemark</name>
+                    <state></state>
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+                <option>
+                    <name>CCDiagWarning</name>
+                    <state></state>
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+                <option>
+                    <name>CCDiagError</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCObjPrefix</name>
+                    <state>1</state>
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+                <option>
+                    <name>CCAllowList</name>
+                    <version>1</version>
+                    <state>11111110</state>
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+                    <name>CCDebugInfo</name>
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+                    <name>IEndianMode</name>
+                    <state>1</state>
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+                    <name>IProcessor</name>
+                    <state>1</state>
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+                    <name>IExtraOptionsCheck</name>
+                    <state>0</state>
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+                <option>
+                    <name>IExtraOptions</name>
+                    <state></state>
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+                    <name>CCLangConformance</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCSignedPlainChar</name>
+                    <state>1</state>
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+                <option>
+                    <name>CCRequirePrototypes</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCDiagWarnAreErr</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCCompilerRuntimeInfo</name>
+                    <state>0</state>
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+                <option>
+                    <name>IFpuProcessor</name>
+                    <state>1</state>
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+                <option>
+                    <name>OutputFile</name>
+                    <state></state>
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+                <option>
+                    <name>CCLibConfigHeader</name>
+                    <state>1</state>
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+                    <name>PreInclude</name>
+                    <state></state>
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+                <option>
+                    <name>CompilerMisraOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCIncludePath2</name>
+                    <state>$CMSIS_PACK_DEVICE_INCLUDES$</state>
+                    <state>$CMSIS_PACK_INCLUDES$</state>
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+                <option>
+                    <name>CCStdIncCheck</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCCodeSection</name>
+                    <state>.text</state>
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+                <option>
+                    <name>IProcessorMode2</name>
+                    <state>1</state>
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+                <option>
+                    <name>CCOptLevel</name>
+                    <state>3</state>
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+                    <name>CCOptStrategy</name>
+                    <version>0</version>
+                    <state>0</state>
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+                <option>
+                    <name>CCOptLevelSlave</name>
+                    <state>1</state>
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+                    <name>CompilerMisraRules98</name>
+                    <version>0</version>
+                    <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
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+                    <name>CCPosIndRwpi</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCPosIndNoDynInit</name>
+                    <state>0</state>
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+                <option>
+                    <name>IccLang</name>
+                    <state>0</state>
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+                <option>
+                    <name>IccCDialect</name>
+                    <state>1</state>
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+                <option>
+                    <name>IccAllowVLA</name>
+                    <state>0</state>
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+                <option>
+                    <name>IccStaticDestr</name>
+                    <state>1</state>
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+                <option>
+                    <name>IccCppInlineSemantics</name>
+                    <state>0</state>
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+                <option>
+                    <name>IccCmsis</name>
+                    <state>1</state>
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+                <option>
+                    <name>IccFloatSemantics</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCOptimizationNoSizeConstraints</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCNoLiteralPool</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCOptStrategySlave</name>
+                    <version>0</version>
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+                <option>
+                    <name>CCGuardCalls</name>
+                    <state>1</state>
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+                <option>
+                    <name>CCEncSource</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCEncOutput</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCEncOutputBom</name>
+                    <state>1</state>
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+                <option>
+                    <name>CCEncInput</name>
+                    <state>0</state>
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+                <option>
+                    <name>IccExceptions2</name>
+                    <state>0</state>
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+                <option>
+                    <name>IccRTTI2</name>
+                    <state>0</state>
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+        </settings>
+        <settings>
+            <name>AARM</name>
+            <archiveVersion>2</archiveVersion>
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+                <version>10</version>
+                <wantNonLocal>1</wantNonLocal>
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+                    <name>AObjPrefix</name>
+                    <state>1</state>
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+                <option>
+                    <name>AEndian</name>
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+                    <name>ACaseSensitivity</name>
+                    <state>1</state>
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+                <option>
+                    <name>MacroChars</name>
+                    <version>0</version>
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+                    <name>AWarnEnable</name>
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+                    <name>AWarnWhat</name>
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+                    <name>AWarnOne</name>
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+                    <name>AWarnRange1</name>
+                    <state></state>
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+                    <name>AWarnRange2</name>
+                    <state></state>
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+                    <name>ADebug</name>
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+                <option>
+                    <name>AltRegisterNames</name>
+                    <state>0</state>
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+                <option>
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+                    <state>$CMSIS_PACK_DEVICE_DEFINES$</state>
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+                    <name>AList</name>
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+                <option>
+                    <name>AListHeader</name>
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+                    <name>AListing</name>
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+                    <name>MacDefs</name>
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+                    <name>OnlyAssed</name>
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+                    <name>MultiLine</name>
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+                    <name>PageLengthCheck</name>
+                    <state>0</state>
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+                <option>
+                    <name>PageLength</name>
+                    <state>80</state>
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+                    <name>TabSpacing</name>
+                    <state>8</state>
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+                <option>
+                    <name>ALimitErrorsEdit</name>
+                    <state>100</state>
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+                    <name>AIgnoreStdInclude</name>
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+                <option>
+                    <name>AUserIncludes</name>
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+                    <state>$CMSIS_PACK_INCLUDES$</state>
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+                    <version>3</version>
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+                    <name>OOCCommandLineProducer</name>
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+                    <name>OOCObjCopyEnable</name>
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+            <name>BICOMP</name>
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+        <settings>
+            <name>BUILDACTION</name>
+            <archiveVersion>1</archiveVersion>
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+                <prebuild></prebuild>
+                <postbuild></postbuild>
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+                    <name>XLinkMisraHandler</name>
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+                    <name>IlinkInputFileSlave</name>
+                    <state>0</state>
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+                <option>
+                    <name>IlinkOutputFile</name>
+                    <state>###Unitialized###</state>
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+                <option>
+                    <name>IlinkDebugInfoEnable</name>
+                    <state>1</state>
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+                <option>
+                    <name>IlinkKeepSymbols</name>
+                    <state></state>
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+                    <name>IlinkRawBinaryFile</name>
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+                    <name>IlinkRawBinarySymbol</name>
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+                    <name>IlinkRawBinarySegment</name>
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+                    <name>IlinkRawBinaryAlign</name>
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diff --git a/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10.cpp b/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10.cpp
new file mode 100644
index 0000000..471899c
--- /dev/null
+++ b/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10.cpp
@@ -0,0 +1,196 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2018 Arm Limited. All rights reserved.
+*
+*
+* Project:       CMSIS NN Library
+* Title:         arm_nnexamples_cifar10.cpp
+*
+* Description:   Convolutional Neural Network Example
+*
+* Target Processor: Cortex-M4/Cortex-M7
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of Arm LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+* -------------------------------------------------------------------- */
+
+/**
+ * @ingroup groupExamples
+ */
+
+/**
+ * @defgroup CNNExample Convolutional Neural Network Example
+ *
+ * \par Description:
+ * \par
+ * Demonstrates a convolutional neural network (CNN) example with the use of convolution,
+ * ReLU activation, pooling and fully-connected functions.
+ *
+ * \par Model definition:
+ * \par
+ * The CNN used in this example is based on CIFAR-10 example from Caffe [1]. 
+ * The neural network consists
+ * of 3 convolution layers interspersed by ReLU activation and max pooling layers, followed by a 
+ * fully-connected layer at the end. The input to the network is a 32x32 pixel color image, which will 
+ * be classified into one of the 10 output classes. 
+ * This example model implementation needs 32.3 KB to store weights, 40 KB for activations and 
+ * 3.1 KB for storing the \c im2col data.
+ *
+ * \image html CIFAR10_CNN.gif "Neural Network model definition"
+ *
+ * \par Variables Description:
+ * \par
+ * \li \c conv1_wt, \c conv2_wt, \c conv3_wt are convolution layer weight matrices
+ * \li \c conv1_bias, \c conv2_bias, \c conv3_bias are convolution layer bias arrays
+ * \li \c ip1_wt, ip1_bias point to fully-connected layer weights and biases
+ * \li \c input_data points to the input image data
+ * \li \c output_data points to the classification output
+ * \li \c col_buffer is a buffer to store the \c im2col output
+ * \li \c scratch_buffer is used to store the activation data (intermediate layer outputs)
+ *
+ * \par CMSIS DSP Software Library Functions Used:
+ * \par
+ * - arm_convolve_HWC_q7_RGB()
+ * - arm_convolve_HWC_q7_fast()
+ * - arm_relu_q7()
+ * - arm_maxpool_q7_HWC()
+ * - arm_avepool_q7_HWC()
+ * - arm_fully_connected_q7_opt()
+ * - arm_fully_connected_q7()
+ *
+ * <b> Refer  </b>
+ * \link arm_nnexamples_cifar10.cpp \endlink
+ *
+ * \par [1] https://github.com/BVLC/caffe
+ */
+
+#include <stdint.h>
+#include <stdio.h>
+#include "arm_math.h"
+#include "arm_nnexamples_cifar10_parameter.h"
+#include "arm_nnexamples_cifar10_weights.h"
+
+#include "arm_nnfunctions.h"
+#include "arm_nnexamples_cifar10_inputs.h"
+
+#ifdef _RTE_
+#include "RTE_Components.h"
+#ifdef RTE_Compiler_EventRecorder
+#include "EventRecorder.h"
+#endif
+#endif
+
+// include the input and weights
+
+static q7_t conv1_wt[CONV1_IM_CH * CONV1_KER_DIM * CONV1_KER_DIM * CONV1_OUT_CH] = CONV1_WT;
+static q7_t conv1_bias[CONV1_OUT_CH] = CONV1_BIAS;
+
+static q7_t conv2_wt[CONV2_IM_CH * CONV2_KER_DIM * CONV2_KER_DIM * CONV2_OUT_CH] = CONV2_WT;
+static q7_t conv2_bias[CONV2_OUT_CH] = CONV2_BIAS;
+
+static q7_t conv3_wt[CONV3_IM_CH * CONV3_KER_DIM * CONV3_KER_DIM * CONV3_OUT_CH] = CONV3_WT;
+static q7_t conv3_bias[CONV3_OUT_CH] = CONV3_BIAS;
+
+static q7_t ip1_wt[IP1_DIM * IP1_OUT] = IP1_WT;
+static q7_t ip1_bias[IP1_OUT] = IP1_BIAS;
+
+/* Here the image_data should be the raw uint8 type RGB image in [RGB, RGB, RGB ... RGB] format */
+uint8_t   image_data[CONV1_IM_CH * CONV1_IM_DIM * CONV1_IM_DIM] = IMG_DATA;
+q7_t      output_data[IP1_OUT];
+
+//vector buffer: max(im2col buffer,average pool buffer, fully connected buffer)
+q7_t      col_buffer[2 * 5 * 5 * 32 * 2];
+
+q7_t      scratch_buffer[32 * 32 * 10 * 4];
+
+int main()
+{
+  #ifdef RTE_Compiler_EventRecorder
+  EventRecorderInitialize (EventRecordAll, 1);  // initialize and start Event Recorder
+  #endif
+
+  printf("start execution\n");
+  /* start the execution */
+
+  q7_t     *img_buffer1 = scratch_buffer;
+  q7_t     *img_buffer2 = img_buffer1 + 32 * 32 * 32;
+
+  /* input pre-processing */
+  int mean_data[3] = INPUT_MEAN_SHIFT;
+  unsigned int scale_data[3] = INPUT_RIGHT_SHIFT;
+  for (int i=0;i<32*32*3; i+=3) {
+    img_buffer2[i] =   (q7_t)__SSAT( ((((int)image_data[i]   - mean_data[0])<<7) + (0x1<<(scale_data[0]-1)))
+                             >> scale_data[0], 8);
+    img_buffer2[i+1] = (q7_t)__SSAT( ((((int)image_data[i+1] - mean_data[1])<<7) + (0x1<<(scale_data[1]-1)))
+                             >> scale_data[1], 8);
+    img_buffer2[i+2] = (q7_t)__SSAT( ((((int)image_data[i+2] - mean_data[2])<<7) + (0x1<<(scale_data[2]-1)))
+                             >> scale_data[2], 8);
+  }
+  
+  // conv1 img_buffer2 -> img_buffer1
+  arm_convolve_HWC_q7_RGB(img_buffer2, CONV1_IM_DIM, CONV1_IM_CH, conv1_wt, CONV1_OUT_CH, CONV1_KER_DIM, CONV1_PADDING,
+                          CONV1_STRIDE, conv1_bias, CONV1_BIAS_LSHIFT, CONV1_OUT_RSHIFT, img_buffer1, CONV1_OUT_DIM,
+                          (q15_t *) col_buffer, NULL);
+
+  arm_relu_q7(img_buffer1, CONV1_OUT_DIM * CONV1_OUT_DIM * CONV1_OUT_CH);
+
+  // pool1 img_buffer1 -> img_buffer2
+  arm_maxpool_q7_HWC(img_buffer1, CONV1_OUT_DIM, CONV1_OUT_CH, POOL1_KER_DIM,
+                     POOL1_PADDING, POOL1_STRIDE, POOL1_OUT_DIM, NULL, img_buffer2);
+
+  // conv2 img_buffer2 -> img_buffer1
+  arm_convolve_HWC_q7_fast(img_buffer2, CONV2_IM_DIM, CONV2_IM_CH, conv2_wt, CONV2_OUT_CH, CONV2_KER_DIM,
+                           CONV2_PADDING, CONV2_STRIDE, conv2_bias, CONV2_BIAS_LSHIFT, CONV2_OUT_RSHIFT, img_buffer1,
+                           CONV2_OUT_DIM, (q15_t *) col_buffer, NULL);
+
+  arm_relu_q7(img_buffer1, CONV2_OUT_DIM * CONV2_OUT_DIM * CONV2_OUT_CH);
+
+  // pool2 img_buffer1 -> img_buffer2
+  arm_maxpool_q7_HWC(img_buffer1, CONV2_OUT_DIM, CONV2_OUT_CH, POOL2_KER_DIM,
+                     POOL2_PADDING, POOL2_STRIDE, POOL2_OUT_DIM, col_buffer, img_buffer2);
+
+// conv3 img_buffer2 -> img_buffer1
+  arm_convolve_HWC_q7_fast(img_buffer2, CONV3_IM_DIM, CONV3_IM_CH, conv3_wt, CONV3_OUT_CH, CONV3_KER_DIM,
+                           CONV3_PADDING, CONV3_STRIDE, conv3_bias, CONV3_BIAS_LSHIFT, CONV3_OUT_RSHIFT, img_buffer1,
+                           CONV3_OUT_DIM, (q15_t *) col_buffer, NULL);
+
+  arm_relu_q7(img_buffer1, CONV3_OUT_DIM * CONV3_OUT_DIM * CONV3_OUT_CH);
+
+  // pool3 img_buffer-> img_buffer2
+  arm_maxpool_q7_HWC(img_buffer1, CONV3_OUT_DIM, CONV3_OUT_CH, POOL3_KER_DIM,
+                     POOL3_PADDING, POOL3_STRIDE, POOL3_OUT_DIM, col_buffer, img_buffer2);
+
+  arm_fully_connected_q7_opt(img_buffer2, ip1_wt, IP1_DIM, IP1_OUT, IP1_BIAS_LSHIFT, IP1_OUT_RSHIFT, ip1_bias,
+                             output_data, (q15_t *) img_buffer1);
+
+  arm_softmax_q7(output_data, 10, output_data);
+
+  for (int i = 0; i < 10; i++)
+  {
+      printf("%d: %d\n", i, output_data[i]);
+  }
+
+  return 0;
+}
diff --git a/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10_inputs.h b/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10_inputs.h
new file mode 100644
index 0000000..c600c5a
--- /dev/null
+++ b/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10_inputs.h
@@ -0,0 +1,6 @@
+/* Here are two different test images */
+
+//#define IMG_DATA {158,112,49,159,111,47,165,116,51,166,118,53,160,112,46,156,109,41,162,115,47,159,113,45,158,111,44,159,113,41,161,116,41,160,111,52,161,111,49,166,117,41,169,117,45,170,119,44,167,117,40,162,113,38,160,111,39,160,112,43,156,109,44,149,107,45,150,107,45,148,106,43,149,107,44,143,101,39,140,98,43,141,97,41,143,97,38,137,95,36,126,91,36,116,85,33,152,112,51,151,110,40,159,114,45,166,116,56,162,112,49,160,113,43,164,117,47,162,114,45,163,116,46,156,110,38,155,111,41,159,110,54,163,113,52,170,119,41,171,117,40,171,115,33,169,115,30,160,111,33,154,112,41,151,115,50,145,110,53,139,104,55,140,102,52,141,100,48,149,105,50,147,102,46,145,102,45,142,97,38,143,98,34,136,95,31,125,91,32,119,88,34,151,110,47,151,109,33,158,111,36,167,111,48,160,106,42,163,115,44,165,117,45,165,117,45,163,115,43,162,115,43,158,114,48,157,109,57,161,111,51,166,115,38,167,114,37,169,113,35,170,116,39,159,114,47,145,111,54,121,96,49,110,90,52,98,78,50,101,77,47,114,85,50,120,86,48,134,96,55,143,103,51,140,99,39,142,99,35,139,98,34,130,95,34,120,89,33,155,107,40,155,110,32,160,109,31,174,112,44,167,110,43,167,117,46,169,120,48,169,119,48,165,115,44,165,117,45,167,123,57,191,146,95,177,130,75,157,111,41,162,115,47,164,114,54,158,112,58,149,111,67,104,80,47,103,87,65,98,90,76,92,90,84,80,75,66,74,63,50,86,70,52,83,62,39,113,85,45,132,98,46,140,102,43,140,101,39,136,99,39,127,94,36,155,107,41,156,114,48,161,115,49,170,114,47,169,114,43,163,113,40,169,120,47,166,116,44,164,113,41,164,116,42,173,128,59,246,214,164,195,156,107,151,114,56,146,111,60,142,108,71,111,80,50,78,53,31,85,69,56,113,103,98,112,110,111,106,114,118,97,102,105,93,94,93,74,72,67,84,78,70,85,73,47,105,83,45,128,96,48,138,101,46,133,94,36,129,93,36,148,109,54,133,104,64,130,100,57,147,112,53,161,115,44,165,113,39,167,116,41,167,115,41,163,111,37,165,116,39,163,118,42,180,138,85,157,122,78,128,102,58,97,75,43,66,50,31,69,58,43,66,56,45,89,83,76,118,113,110,122,121,120,119,122,122,114,116,116,94,96,96,99,100,97,91,91,86,58,58,47,67,58,37,108,84,49,140,105,58,138,98,44,134,95,40,127,100,57,109,95,80,47,37,17,88,74,28,153,117,48,170,118,43,168,115,40,170,118,43,169,117,42,166,116,37,164,120,39,147,107,52,129,98,59,127,108,75,100,87,70,68,67,57,78,83,72,72,75,64,83,84,74,132,130,121,146,142,132,124,118,108,105,99,90,107,102,94,115,111,103,85,83,77,63,71,69,46,47,39,79,61,36,132,98,58,141,99,48,134,93,39,131,115,90,99,96,92,42,43,38,70,64,41,143,111,56,167,117,42,165,114,36,168,116,39,171,119,49,161,113,51,140,109,51,120,94,49,130,110,77,144,131,107,116,106,93,88,87,79,91,95,88,85,88,82,77,77,69,124,118,107,163,153,140,136,124,112,102,93,81,106,98,88,100,93,84,85,81,74,54,60,58,49,53,49,57,47,32,107,83,50,138,103,51,136,97,39,170,161,144,103,105,105,54,58,59,124,121,113,153,124,82,161,113,43,163,117,41,166,122,50,165,121,66,174,135,95,113,89,59,125,105,78,157,141,121,156,143,128,121,111,101,86,80,74,82,81,77,84,85,82,80,78,73,81,71,61,138,125,112,146,135,123,113,103,93,87,79,70,83,77,69,86,82,76,71,73,67,56,57,53,40,35,27,74,59,35,133,106,59,137,103,45,180,176,163,134,139,143,94,100,105,154,154,149,174,149,112,158,116,51,156,116,47,153,118,60,207,180,146,237,214,198,207,180,166,156,131,119,174,153,145,148,131,125,125,110,107,93,85,79,86,84,79,74,74,71,59,57,53,76,68,58,137,125,112,143,133,122,133,124,114,106,98,89,86,81,74,87,85,78,84,85,78,75,76,71,50,49,43,40,30,15,95,75,44,132,103,57,183,183,175,108,116,122,142,151,158,165,169,168,177,156,122,155,112,50,159,118,51,122,89,47,213,197,179,237,224,226,220,191,188,164,135,131,183,159,155,156,137,132,125,108,104,120,111,104,78,76,69,80,80,77,45,44,40,91,85,77,175,165,154,157,147,137,155,147,138,107,100,92,87,83,77,103,102,96,88,88,79,78,79,73,59,59,59,41,36,33,59,46,31,104,81,46,188,191,189,100,108,116,135,144,153,170,175,178,187,167,136,166,120,59,173,123,55,134,93,44,117,95,80,194,182,188,199,171,164,170,142,133,185,161,151,189,171,159,134,119,106,117,107,95,102,98,89,84,84,79,38,38,34,125,121,113,210,201,192,160,152,142,146,139,130,93,89,82,83,80,75,94,93,88,104,104,94,85,87,81,73,75,78,55,53,55,62,55,48,76,56,26,189,194,194,90,96,105,127,134,144,175,180,185,174,156,133,166,123,68,178,123,53,159,109,47,97,68,44,168,154,152,168,144,126,137,114,94,186,166,148,216,202,183,160,149,129,123,113,98,120,114,105,115,114,109,50,50,47,150,147,140,194,187,178,155,149,140,123,118,111,91,88,83,84,83,79,84,84,80,95,95,85,86,87,81,84,87,89,73,73,73,79,74,64,73,55,24,189,192,193,93,95,103,152,154,163,185,188,192,119,110,98,136,106,66,173,124,58,167,116,50,103,72,39,147,132,120,145,125,103,167,149,127,189,174,155,226,216,200,180,172,157,141,131,117,126,117,107,117,114,109,71,71,68,154,152,147,186,181,174,149,144,136,114,110,104,87,85,80,80,80,76,72,73,70,80,80,72,99,100,94,100,101,99,90,88,81,97,89,69,94,73,34,194,196,196,108,107,112,168,167,172,186,186,188,105,109,109,99,89,67,156,119,62,167,122,55,100,74,34,115,106,88,138,123,103,198,185,169,190,180,169,172,165,159,145,140,140,154,143,134,146,136,125,103,100,95,71,71,70,152,152,149,179,175,170,137,13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+
+
+#define IMG_DATA {235,235,235,231,231,231,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,232,233,233,231,233,232,231,233,231,233,233,230,233,232,232,232,234,232,231,234,232,232,232,233,233,230,232,233,231,233,233,233,232,232,232,232,232,232,232,232,232,233,233,233,233,233,233,232,232,232,238,238,238,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,237,234,233,236,234,233,236,236,234,234,236,234,234,235,237,234,234,238,235,236,237,236,236,235,236,236,234,236,236,236,235,235,235,235,235,235,235,235,235,236,236,236,236,236,236,235,235,235,237,237,237,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,235,235,235,235,234,234,236,233,231,236,234,231,235,235,234,234,235,236,227,230,233,231,235,238,231,233,235,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,235,235,235,235,235,235,234,234,234,238,238,238,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,235,235,235,235,235,234,233,233,230,232,232,231,228,230,232,223,226,231,186,192,197,209,216,219,207,210,213,228,228,230,236,235,235,234,234,234,234,234,234,234,234,234,234,234,234,235,235,235,235,235,235,235,235,235,237,237,237,234,234,234,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,234,234,234,234,234,234,235,235,235,235,235,235,234,234,234,234,234,234,235,235,235,235,235,235,236,238,236,233,237,237,219,225,230,203,210,219,163,172,179,195,205,208,214,218,221,230,229,232,237,235,237,235,235,235,235,235,235,235,235,235,235,236,236,236,236,236,236,236,236,236,236,236,239,239,238,236,235,235,236,235,235,236,235,235,236,235,235,236,235,235,235,236,235,235,235,235,234,234,234,235,235,235,237,236,236,237,236,236,234,235,236,232,233,234,235,237,237,229,231,232,208,216,218,194,205,210,185,198,207,174,188,200,165,179,189,184,196,202,207,215,220,226,228,232,236,235,237,236,236,235,236,236,235,236,236,235,236,236,236,237,237,237,237,237,237,237,237,237,228,229,229,228,227,228,232,230,231,231,228,230,234,232,233,237,236,236,237,237,235,236,237,235,237,235,236,237,235,236,239,236,237,239,237,238,225,229,230,224,228,229,233,237,238,221,226,228,183,197,204,161,180,190,159,180,191,154,176,190,144,163,177,143,159,171,156,169,177,198,206,211,233,238,239,236,237,234,235,236,233,235,235,235,235,236,236,236,238,237,237,237,237,239,237,238,212,220,222,224,230,233,230,234,238,227,232,234,229,234,234,234,237,236,237,238,235,238,237,236,239,237,238,239,237,238,239,236,237,240,238,239,201,204,203,219,222,221,233,236,235,214,218,218,193,204,210,185,201,210,184,201,211,173,191,203,165,182,196,159,174,187,162,176,185,186,199,204,229,239,240,234,239,238,233,238,237,233,238,238,234,239,238,236,239,238,237,239,238,238,238,238,216,234,241,221,236,243,225,238,246,225,239,243,227,240,240,231,238,237,236,237,235,238,236,235,238,236,237,238,236,237,237,237,237,239,239,239,197,198,196,220,221,218,233,234,231,230,231,229,209,213,217,209,216,222,219,228,235,208,218,227,209,221,234,210,224,235,217,233,240,218,235,241,225,240,243,228,238,240,228,239,240,230,240,240,230,240,239,235,240,239,237,240,239,238,238,238,118,140,149,119,138,148,124,142,153,136,155,161,172,188,191,225,234,233,235,236,233,237,234,232,236,233,234,235,235,235,235,237,236,233,237,235,214,216,214,226,228,226,232,234,232,236,237,236,228,230,232,227,230,235,231,236,241,225,232,239,225,237,247,217,233,243,201,219,226,185,204,211,172,189,195,167,179,186,167,180,185,186,199,201,223,235,235,235,241,239,236,240,239,238,240,239,109,130,141,103,121,133,108,125,137,111,127,137,146,159,165,222,229,231,227,228,225,229,226,224,236,232,233,234,234,234,231,236,234,230,237,235,229,234,235,231,235,236,232,237,238,230,235,236,231,236,238,231,237,240,229,237,241,223,232,238,191,206,213,164,184,191,146,165,172,137,156,163,134,149,159,128,140,153,121,133,143,149,162,166,216,228,229,234,241,239,235,240,238,237,240,239,195,212,224,188,202,215,199,211,224,200,211,223,209,217,227,223,227,231,213,213,211,211,209,206,216,213,214,220,222,222,219,226,225,210,221,219,209,219,223,211,221,225,216,225,230,220,229,233,225,234,237,226,236,239,225,237,241,218,231,237,183,204,208,175,198,203,181,200,207,178,194,202,186,197,211,170,178,196,142,151,164,185,195,202,219,230,233,231,240,238,234,241,239,236,240,239,193,207,222,191,202,217,202,211,224,214,217,234,223,225,241,214,219,227,203,208,208,171,174,174,177,180,183,207,213,214,174,184,188,98,112,121,93,114,126,101,121,132,111,129,139,122,138,147,137,152,161,153,167,174,202,216,220,223,236,237,218,232,235,220,233,238,223,234,240,217,226,233,221,228,237,212,219,229,196,203,212,222,230,237,219,227,234,221,230,233,232,239,242,235,241,242,113,130,152,111,125,147,113,125,141,125,131,151,138,145,165,170,182,193,191,201,205,190,199,204,208,219,226,216,230,234,158,172,183,54,71,92,45,70,91,49,73,91,53,73,90,66,84,98,102,114,129,159,168,179,221,227,233,234,239,241,233,237,241,227,231,237,223,228,233,207,211,217,202,208,212,211,218,220,212,219,223,199,206,214,179,186,196,188,197,205,211,221,227,221,231,234,61,81,108,69,86,114,63,79,100,68,85,102,123,141,155,139,155,164,151,157,164,195,200,207,214,228,234,206,223,228,163,180,190,103,121,138,95,112,131,101,117,135,138,151,168,181,192,207,207,212,223,221,222,232,219,219,227,205,203,212,183,186,195,158,166,174,147,154,163,131,138,147,125,133,140,130,139,144,136,146,152,133,142,151,128,137,147,138,153,160,182,197,203,197,212,216,40,53,77,58,70,94,85,98,116,127,144,153,132,151,156,96,107,110,119,115,118,163,158,161,173,180,182,184,194,197,182,194,198,181,193,200,183,194,202,198,209,217,218,228,236,200,210,217,174,181,186,159,165,172,145,150,159,132,136,149,116,125,138,98,111,123,94,106,118,99,111,123,105,118,128,107,121,130,122,135,145,138,151,161,150,164,174,157,174,184,188,206,213,185,203,208,13,15,35,26,29,47,134,140,151,206,216,220,138,150,150,118,123,123,141,133,134,172,162,162,181,181,180,207,209,211,220,224,225,228,234,233,224,234,232,230,241,240,226,238,238,176,189,190,144,159,163,138,154,162,142,158,170,145,163,177,154,171,187,149,165,182,149,165,182,154,171,187,157,174,189,160,177,191,173,190,204,187,204,217,190,207,218,178,196,208,165,183,193,157,175,183,5,5,24,58,62,79,200,207,217,225,232,239,197,205,212,199,207,211,212,212,218,226,224,229,229,230,237,233,236,246,232,238,245,230,238,239,209,221,220,223,238,239,221,238,241,210,228,234,198,217,228,180,200,214,193,216,230,188,213,229,189,212,231,194,214,234,192,212,232,184,204,224,172,193,212,171,191,209,161,181,197,144,165,179,136,156,169,131,146,161,128,143,158,138,154,165,39,45,71,145,155,179,190,204,222,186,196,216,184,197,217,192,211,229,194,211,230,194,208,227,194,206,227,191,203,228,192,207,228,190,207,221,177,193,207,180,198,215,154,176,193,147,169,188,145,161,184,156,171,195,146,163,186,113,133,156,114,137,161,132,157,180,126,150,173,111,135,158,92,115,138,91,112,135,93,114,133,94,116,131,105,125,140,121,133,151,129,141,158,129,142,156,122,135,161,162,179,207,143,160,194,137,154,189,131,152,187,128,152,190,127,150,192,130,150,193,131,150,192,128,147,190,127,147,189,129,149,189,129,149,188,124,145,186,104,126,163,100,122,154,102,120,154,118,134,170,112,128,163,94,109,145,94,112,148,94,117,153,87,112,144,83,103,136,80,97,130,83,103,134,93,111,139,101,117,141,108,121,144,115,125,146,121,133,148,130,144,156,73,87,109,76,90,113,77,90,122,80,93,127,84,98,134,87,102,142,87,102,147,90,105,150,94,111,152,102,119,160,107,124,165,113,131,172,115,137,181,118,136,186,118,132,180,120,133,175,115,136,172,110,133,168,106,127,163,100,119,155,95,109,148,85,101,139,79,97,132,80,92,127,80,94,129,77,100,133,80,100,129,82,98,122,92,104,126,113,119,138,125,135,146,136,149,156,13,25,41,3,11,25,9,16,35,18,26,48,18,26,52,21,25,56,20,25,58,22,30,61,26,36,62,34,43,70,42,51,77,48,59,87,52,69,106,60,75,121,66,77,126,70,79,126,71,87,127,72,88,126,67,81,120,60,72,112,55,67,106,53,68,104,53,69,103,57,69,102,57,71,105,57,78,110,72,89,115,87,100,119,104,113,128,120,124,136,130,136,141,137,146,149,36,46,55,11,16,20,8,13,19,32,44,53,36,45,58,22,25,41,8,11,30,3,8,24,1,4,17,0,2,15,0,2,15,0,4,20,6,13,42,5,18,56,1,19,60,3,23,62,13,29,71,24,38,81,21,33,77,21,31,76,21,38,78,22,44,79,30,50,83,39,58,90,57,70,101,85,90,118,113,115,138,123,123,138,116,115,125,122,123,128,134,139,137,153,160,158,35,41,45,26,27,26,13,19,18,27,41,41,71,81,84,70,70,76,49,50,57,27,31,37,15,15,21,5,5,11,2,2,7,0,0,7,17,17,35,57,64,91,31,50,78,10,36,62,4,30,60,4,30,62,7,30,63,14,35,69,25,43,74,41,55,83,62,71,99,86,97,123,122,124,146,144,131,149,132,120,135,114,105,114,117,111,116,132,134,133,146,152,146,172,179,175,16,15,17,13,10,9,4,10,8,3,12,11,45,44,46,65,52,57,54,43,47,36,33,35,18,18,20,4,4,7,2,2,4,0,1,3,7,8,15,118,117,134,161,158,179,131,128,148,112,112,131,105,105,125,105,103,124,109,105,127,118,107,126,138,115,133,154,126,144,151,126,141,127,106,116,105,86,91,106,94,97,120,116,116,129,130,129,142,147,144,164,172,165,184,194,190,40,40,35,12,10,7,0,3,3,0,4,4,12,6,7,30,12,17,32,12,17,21,10,12,7,6,7,2,1,3,2,1,2,3,2,3,0,0,2,68,58,64,182,128,146,205,130,148,196,127,144,194,123,141,195,119,137,187,113,129,172,110,122,150,96,106,123,75,83,103,66,69,95,71,70,104,93,88,122,118,113,129,132,126,132,141,135,152,162,158,171,182,176,185,197,194,69,77,64,26,29,21,1,1,1,1,1,2,4,1,0,12,2,5,18,3,9,12,2,5,4,1,2,2,0,0,2,0,0,4,0,1,1,1,1,32,12,11,153,45,59,203,47,68,195,46,67,191,48,69,179,50,67,155,49,59,119,42,49,91,38,42,81,48,46,94,77,71,117,110,102,125,126,116,125,128,120,129,135,128,144,153,147,162,176,171,173,187,183,184,198,196,83,94,82,47,52,43,1,1,1,2,1,2,2,0,0,5,1,2,7,1,5,4,0,2,1,0,0,1,0,0,1,0,0,3,0,0,1,2,0,27,3,2,142,25,38,205,32,54,198,25,46,169,25,43,121,25,36,85,29,34,74,41,39,85,66,56,102,92,82,121,113,105,128,124,115,122,126,115,121,127,118,132,139,131,147,157,150,165,179,174,176,191,187,186,201,199,92,102,93,54,60,50,6,7,3,3,2,1,2,2,0,1,3,1,1,3,3,1,2,2,1,1,1,1,0,0,1,0,0,1,1,1,0,3,2,15,1,0,102,19,28,157,31,47,117,17,23,74,13,12,56,27,22,74,58,55,99,90,81,115,115,99,122,126,111,124,124,112,123,123,113,125,130,119,128,135,126,136,145,137,148,159,151,162,176,171,177,192,188,188,202,201,87,99,89,43,51,37,19,23,11,11,12,4,8,10,2,5,11,4,2,10,4,2,7,2,3,4,1,3,4,1,3,4,1,2,3,2,0,6,6,4,5,2,42,13,13,71,21,24,53,27,25,57,50,41,80,77,62,113,98,82,132,113,101,134,126,113,123,126,112,116,125,111,120,128,115,131,138,126,139,148,137,143,154,145,156,168,161,169,184,179,182,197,193,188,202,201,82,96,82,46,57,36,36,44,22,31,35,17,27,30,15,22,28,15,17,26,13,16,23,12,18,21,12,19,21,13,20,22,14,19,23,15,19,27,20,23,31,21,37,40,27,64,55,45,87,70,67,104,88,81,116,102,85,128,112,88,139,121,105,131,122,110,117,122,107,115,127,112,123,133,119,131,139,127,139,149,138,148,160,151,159,172,164,174,189,183,185,200,196,187,202,200,85,101,83,62,75,48,58,67,38,55,61,37,51,56,35,47,53,33,46,53,34,48,55,38,49,55,40,51,56,41,53,58,44,55,62,46,59,67,45,68,71,48,81,84,59,104,96,74,116,103,83,127,109,92,133,116,97,127,121,97,127,127,107,118,124,106,114,125,108,122,131,117,129,136,123,136,145,133,141,152,141,149,162,153,158,171,163,168,183,178,180,195,191,186,200,199}
diff --git a/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10_parameter.h b/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10_parameter.h
new file mode 100644
index 0000000..09d0ca3
--- /dev/null
+++ b/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10_parameter.h
@@ -0,0 +1,43 @@
+#define CONV1_IM_DIM 32
+#define CONV1_IM_CH 3
+#define CONV1_KER_DIM 5
+#define CONV1_PADDING 2
+#define CONV1_STRIDE 1
+#define CONV1_OUT_CH 32
+#define CONV1_OUT_DIM 32
+
+#define POOL1_KER_DIM 3
+#define POOL1_STRIDE 2
+#define POOL1_PADDING 0
+#define POOL1_OUT_DIM 16
+
+#define CONV2_IM_DIM 16
+#define CONV2_IM_CH 32
+#define CONV2_KER_DIM 5
+#define CONV2_PADDING 2
+#define CONV2_STRIDE 1
+#define CONV2_OUT_CH 16
+#define CONV2_OUT_DIM 16
+
+#define POOL2_KER_DIM 3
+#define POOL2_STRIDE 2
+#define POOL2_PADDING 0
+#define POOL2_OUT_DIM 8
+
+#define CONV3_IM_DIM 8
+#define CONV3_IM_CH 16
+#define CONV3_KER_DIM 5
+#define CONV3_PADDING 2
+#define CONV3_STRIDE 1
+#define CONV3_OUT_CH 32
+#define CONV3_OUT_DIM 8
+
+#define POOL3_KER_DIM 3
+#define POOL3_STRIDE 2
+#define POOL3_PADDING 0
+#define POOL3_OUT_DIM 4
+
+#define IP1_DIM 4*4*32
+#define IP1_IM_DIM 4
+#define IP1_IM_CH 32
+#define IP1_OUT 10
diff --git a/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10_weights.h b/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10_weights.h
new file mode 100644
index 0000000..8d92d21
--- /dev/null
+++ b/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/arm_nnexamples_cifar10_weights.h
@@ -0,0 +1,26 @@
+#define CONV1_WT {-9,-1,2,6,-4,6,4,-11,8,-9,-11,10,-12,5,15,11,-1,-1,33,-25,-18,47,-35,-23,25,-27,-5,0,-4,9,2,-5,0,34,-25,-21,55,-40,-33,34,-32,-16,5,-7,2,-21,16,14,-4,5,3,14,-10,-7,3,-10,-2,-8,5,8,-29,23,12,-25,15,8,-15,4,7,-16,5,8,-13,17,12,2,-4,-1,-1,-10,9,6,-4,21,11,0,12,-10,-9,-4,13,10,12,19,11,27,0,-5,11,-21,-26,-28,-7,3,-15,16,14,26,-22,-25,-8,-29,-24,-23,0,6,-13,13,25,0,-21,-18,-3,-21,-19,-13,11,14,4,13,18,-4,6,16,-1,-10,-14,-7,12,9,5,13,8,-4,9,10,-9,-4,7,-3,7,7,-12,7,3,0,-1,-7,2,-8,-5,9,-3,6,-4,7,-10,-25,7,-7,-7,10,2,14,-4,2,17,-9,5,-3,7,-10,-25,4,-10,-8,0,0,16,-7,11,25,-14,13,4,7,-12,-23,5,-16,-17,8,0,11,2,13,21,-11,9,-3,2,-9,-9,-3,-14,-11,1,-1,6,-6,6,14,-1,16,11,7,3,-14,21,6,-6,17,13,4,1,7,-3,-6,2,2,27,13,-5,18,0,-7,-6,-4,2,-24,-11,0,-18,-8,6,24,8,-14,11,-6,-8,-8,0,12,-22,-2,13,-15,-3,7,29,6,-16,10,-6,-4,-12,-7,11,-26,-14,3,-10,-8,0,16,5,-8,-5,-5,3,-15,-2,23,-17,-5,17,1,1,12,10,3,-5,-7,-18,-7,-3,-4,2,3,6,4,4,2,-7,17,20,12,-23,-27,-15,-3,3,6,5,15,6,-2,2,-5,22,22,11,-26,-30,-19,-6,-5,3,10,12,6,2,1,-3,20,14,4,-15,-26,-18,0,-9,1,14,8,6,1,-7,-9,8,11,6,-10,-13,-11,-4,-4,8,2,5,17,-9,0,11,-9,-11,21,6,13,39,-7,1,30,2,12,36,-11,-1,28,-2,-25,-6,6,-16,-6,-9,-34,-24,3,-17,-15,2,-20,-11,0,-13,-11,25,13,6,0,-15,-20,16,7,-11,7,-3,-10,-5,-2,-6,14,22,12,-16,-5,-12,7,23,7,-10,5,-2,-10,-1,-9,7,21,8,-19,-2,-13,2,21,3,-15,9,-2,-4,-2,-2,-12,2,13,-19,1,6,0,16,-1,5,8,-28,11,-2,-4,-10,-1,21,-30,-4,22,-8,14,9,11,14,-21,20,-9,-23,0,-4,19,-28,-9,31,-30,-1,12,3,14,-11,30,3,-24,3,-8,6,-22,-9,31,-29,2,26,-5,11,8,24,2,-36,24,3,-9,-6,-17,4,-8,-8,12,1,-1,5,3,-12,15,-6,-2,-1,0,15,-11,-18,6,-18,-10,6,3,6,-3,3,-12,13,-14,-1,43,-23,-3,52,-16,-11,28,-8,4,-6,5,-11,16,-6,-20,32,-28,-24,38,-31,-22,20,-16,5,-13,7,-2,5,3,-6,17,-10,-8,22,-13,-5,13,0,11,-16,14,-3,-14,6,3,-4,4,4,-2,2,-3,-9,5,2,1,-2,-10,-6,-3,-17,-2,1,-19,2,1,-14,8,11,14,3,7,1,-13,-13,2,-1,-3,-9,0,-5,-18,4,0,18,3,9,15,-10,-8,10,-12,-18,5,-3,-16,-10,0,-14,5,4,14,14,-1,10,16,-6,-2,14,-1,-12,8,2,-18,-13,-1,17,-2,2,24,-4,-3,17,8,-1,12,9,-6,-3,-2,-9,3,-2,-13,-1,-5,-17,-5,-7,-16,-7,-8,-14,-9,3,-9,-1,0,-13,-7,4,-9,-7,3,-6,-8,-2,-4,-7,5,-7,-4,1,-8,-11,10,6,-3,14,12,-1,6,10,-2,0,-12,-16,-3,-9,-19,0,1,-12,9,12,-2,1,10,-1,10,4,-8,6,3,-11,11,14,1,12,19,8,3,16,9,-7,-1,4,-11,-1,3,1,12,8,7,15,13,-5,-2,4,-7,-5,1,-8,-3,2,1,10,9,-1,8,9,-11,-9,-2,0,-1,6,-14,-13,-6,1,3,10,3,4,11,-1,-5,5,7,4,10,-14,-17,-10,-12,-13,-6,-11,-14,-6,1,-6,1,2,-1,1,-5,-7,-3,-2,-4,1,-11,-13,-9,-12,-16,-12,-2,-1,-2,-9,-5,-4,-7,-3,3,-1,-3,8,9,-2,1,8,11,13,5,14,17,1,10,17,-1,3,18,0,-6,0,-1,0,3,4,13,16,-1,8,14,-4,2,14,-16,-20,-14,-3,-3,0,13,21,25,5,11,14,-5,-2,9,1,-5,2,-6,-9,-14,-7,-4,-8,-10,-9,-13,-10,-12,-12,7,-1,-2,-5,2,-14,-5,3,-6,1,9,3,-8,3,-1,-9,2,0,-12,-4,-21,6,17,8,17,28,22,-5,6,2,-15,-8,-7,8,21,-3,2,20,-5,-1,16,-8,7,17,3,0,6,1,11,26,0,-22,-4,-33,-36,-16,-40,-2,14,1,2,10,5,1,17,-10,-16,3,-22,-22,-1,-14,-9,10,6,-7,7,7,10,-8,5,-3,-4,-1,-7,-7,-7,1,0,-2,-7,11,9,5,-2,2,12,14,16,12,7,2,0,-9,-23,-14,-8,-23,-1,-11,-14,-7,-9,-7,14,11,7,44,35,19,34,38,12,1,3,9,-6,-4,8,-32,-28,-19,-41,-45,-37,-14,-17,-17,-7,4,-3,-5,8,8,3,16,21,8,14,24,-3,-5,6,-11,-15,-18,-8,-12,-12,-6,-14,-8,9,-6,1,16,3,11,3,3,-8,-5,0,-6,-13,-13,-13,-6,-15,-15,6,-5,-4,9,16,5,1,14,5,-4,7,-1,-12,-11,-18,0,-6,-12,5,14,0,-1,13,2,2,18,6,-9,-4,-16,0,-3,-17,4,12,0,-1,13,2,0,16,6,-6,1,-9,-5,-8,-19,18,-1,-4,16,-2,-6,18,-1,-4,9,-4,1,-12,-13,-4,9,-3,-9,6,-4,-14,15,5,-2,-5,-5,-1,-20,-9,-3,16,2,-5,12,3,-7,15,7,1,-12,-7,-2,-15,-2,2,18,7,-1,10,2,-5,-1,-8,-8,-18,-15,-7,-2,7,9,-15,-15,-17,-7,-6,-7,-12,-12,-6,-17,-12,-6,9,14,12,13,7,6,3,-3,2,-6,-7,1,-7,-4,3,-11,-12,-6,12,11,6,-4,-3,-2,-15,-12,-4,-7,-4,3,-9,-9,-4,15,17,12,-3,1,2,-18,-13,-6,4,5,10,6,1,5,9,14,8,-6,1,3,-21,-15,-7,-2,-1,5,4,-1,2,4,17,14,-4,4,9,-24,-20,-11,-7,-7,3,-2,-6,1,5,9,-10,6,9,-12,12,11,-7,4,1,-15,11,9,-6,25,15,5,21,13,5,23,14,7,13,2,-3,17,10,6,-1,-10,-2,-20,-21,-14,-11,-11,-2,-11,-12,-3,-16,-15,-3,-4,-14,6,-16,-19,-1,-3,-2,13,-1,-3,12,-6,-10,8,0,-5,10,-11,-10,4,-4,-1,8,-11,-5,3,-6,-1,8,-8,-15,0,-3,0,9,4,11,14,-3,3,4,-15,-9,-6,-12,-14,-1,-18,-8,-1,-26,-12,-8,-28,-12,-9,-30,-13,-8,10,-1,-6,15,17,5,11,22,8,15,24,8,17,25,12,10,-5,-9,4,4,-5,1,10,1,2,4,-8,6,7,-7,5,-10,-6,-1,-5,-3,3,8,10,1,4,-2,-1,0,-8,2,-8,3,0,-6,9,1,-2,-8,6,1,-3,1,-10,6,5,-6,7,-8,-12,0,11,17,-4,-7,-1,-12,1,-2,9,11,2,17,-35,-32,-21,38,52,20,-27,-17,-30,4,2,17,18,10,19,-44,-34,-34,43,59,28,-25,-17,-31,6,0,16,10,4,18,-31,-27,-22,27,31,16,-10,-9,-16,3,-6,6,-2,-11,15,10,0,14,-2,-8,-8,0,-7,-7,13,0,11,2,-7,3,10,4,3,0,-2,-14,-1,-1,-16,-1,3,-6,8,-4,3,12,4,2,4,1,-17,7,10,-8,0,10,-2,-3,-15,0,10,4,8,-10,-13,-24,-7,-2,-16,0,8,-3,-6,-6,7,7,11,13,2,9,-6,-4,11,-15,2,22,0,2,-4,-2,-10,-12,-5,24,15,25,-1,-4,-2,-11,-1,-3,7,11,5,-16,-17,-23,-29,-35,-30,53,45,54,-11,-9,-12,-3,5,4,44,39,36,-45,-51,-51,-19,-28,-16,25,24,28,-15,0,-12,7,1,2,44,42,40,-36,-41,-41,5,0,3,-1,18,5,-17,-15,-15,7,8,14,11,3,4,1,-11,-8,10,-1,-2,-5,-10,-3,6,6,10,5,9,9,-6,3,0,-14,-21,-16,-40,-39,-26,0,4,16,15,20,24,-14,-7,-5,3,-5,1,-13,-12,0,-16,-11,6,4,7,20,-11,-9,-1,11,-4,7,14,7,22,-14,-14,5,-7,-6,12,-4,-9,4,18,-6,5,14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+
+#define CONV1_BIAS {-49,-18,-7,-20,-12,-15,7,2,-10,-84,-72,-65,-53,-6,-87,-63,-64,-28,-28,-4,-3,-10,-52,-15,-5,-7,-31,-44,-102,-19,-5,-65}
+
+#define CONV2_WT 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+
+#define CONV2_BIAS {55,50,34,43,-37,35,-21,10,35,-53,-76,7,14,-1,92,20}
+
+#define CONV3_WT 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+
+#define CONV3_BIAS {18,36,-46,-45,64,8,13,-19,28,1,14,-57,23,20,-2,32,48,-11,85,73,-7,52,125,33,125,13,92,-72,89,-1,11,70}
+
+#define IP1_WT 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34,-1,-20}
+
+#define IP1_BIAS {30,-121,-51,77,40,20,46,-35,28,-33}
+
+#define CONV1_BIAS_LSHIFT 6
+#define CONV1_OUT_RSHIFT 9
+#define CONV2_BIAS_LSHIFT 4
+#define CONV2_OUT_RSHIFT 9
+#define CONV3_BIAS_LSHIFT 1
+#define CONV3_OUT_RSHIFT 7
+#define IP1_BIAS_LSHIFT 1
+#define IP1_OUT_RSHIFT 8
+#define INPUT_MEAN_SHIFT {125,123,114}
+#define INPUT_RIGHT_SHIFT {8,8,8}
diff --git a/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/readme_iar.txt b/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/readme_iar.txt
new file mode 100644
index 0000000..8ca1d5c
--- /dev/null
+++ b/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10/readme_iar.txt
@@ -0,0 +1,7 @@
+CMSIS NN Lib example arm_nnexample_cifar10 for
+  Cortex-M0, Cortex-M3, Cortex-M4 and Cortex-M7.
+
+The example is configured for IAR Embedded Workbench for ARM Simulator.
+
+When changing target, remember to change the ARM_MATH_CMx and __FPU_PRESENT
+Preprocessor defines for C/C++ Compiler
diff --git a/NN/Examples/IAR/iar_nn_examples/NN-example-gru/NN-example-gru.ewp b/NN/Examples/IAR/iar_nn_examples/NN-example-gru/NN-example-gru.ewp
new file mode 100644
index 0000000..4d30325
--- /dev/null
+++ b/NN/Examples/IAR/iar_nn_examples/NN-example-gru/NN-example-gru.ewp
@@ -0,0 +1,2276 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+    <fileVersion>3</fileVersion>
+    <configuration>
+        <name>Debug</name>
+        <toolchain>
+            <name>ARM</name>
+        </toolchain>
+        <debug>1</debug>
+        <settings>
+            <name>General</name>
+            <archiveVersion>3</archiveVersion>
+            <data>
+                <version>30</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>ExePath</name>
+                    <state>Debug\Exe</state>
+                </option>
+                <option>
+                    <name>ObjPath</name>
+                    <state>Debug\Obj</state>
+                </option>
+                <option>
+                    <name>ListPath</name>
+                    <state>Debug\List</state>
+                </option>
+                <option>
+                    <name>GEndianMode</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>Input description</name>
+                    <state>Automatic choice of formatter, without multibyte support.</state>
+                </option>
+                <option>
+                    <name>Output description</name>
+                    <state>Automatic choice of formatter, without multibyte support.</state>
+                </option>
+                <option>
+                    <name>GOutputBinary</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGCoreOrChip</name>
+                    <state>2</state>
+                </option>
+                <option>
+                    <name>GRuntimeLibSelect</name>
+                    <version>0</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GRuntimeLibSelectSlave</name>
+                    <version>0</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>RTDescription</name>
+                    <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
+                </option>
+                <option>
+                    <name>OGProductVersion</name>
+                    <state>8.22.2.15993</state>
+                </option>
+                <option>
+                    <name>OGLastSavedByProductVersion</name>
+                    <state>8.22.2.15993</state>
+                </option>
+                <option>
+                    <name>GeneralEnableMisra</name>
+                    <state>0</state>
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+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGChipSelectEditMenu</name>
+                    <state>Default	None</state>
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+                <option>
+                    <name>GenLowLevelInterface</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GEndianModeBE</name>
+                    <state>1</state>
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+                <option>
+                    <name>OGBufferedTerminalOutput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GenStdoutInterface</name>
+                    <state>0</state>
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+                    <name>GeneralMisraRules98</name>
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+                    <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
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+                    <name>GBECoreSlave</name>
+                    <version>26</version>
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+                    <state>1</state>
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+                    <name>OGUseCmsisDspLib</name>
+                    <state>1</state>
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+                    <name>GRuntimeLibThreads</name>
+                    <state>0</state>
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+                    <name>CoreVariant</name>
+                    <version>26</version>
+                    <state>34</state>
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+                <option>
+                    <name>GFPUDeviceSlave</name>
+                    <state>Default	None</state>
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+                    <name>FPU2</name>
+                    <version>0</version>
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+                    <version>26</version>
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+                    <state>0</state>
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+                <option>
+                    <name>OGLibAdditionalLocale</name>
+                    <state>0</state>
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+                    <name>OGPrintfVariant</name>
+                    <version>0</version>
+                    <state>0</state>
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+                    <name>OGPrintfMultibyteSupport</name>
+                    <state>0</state>
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+                <option>
+                    <name>OGScanfVariant</name>
+                    <version>0</version>
+                    <state>0</state>
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+                <option>
+                    <name>OGScanfMultibyteSupport</name>
+                    <state>0</state>
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+                <option>
+                    <name>GenLocaleTags</name>
+                    <state></state>
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+                    <name>GenLocaleDisplayOnly</name>
+                    <state></state>
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+                    <name>DSPExtension</name>
+                    <state>0</state>
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+                <option>
+                    <name>TrustZone</name>
+                    <state>0</state>
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+            <name>ICCARM</name>
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+                <version>34</version>
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+                    <state>ARM_MATH_CM0</state>
+                    <state>$CMSIS_PACK_DEVICE_DEFINES$</state>
+                    <state>_RTE_</state>
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+                <option>
+                    <name>CCPreprocFile</name>
+                    <state>0</state>
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+                    <name>CCPreprocComments</name>
+                    <state>0</state>
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+                    <name>CCPreprocLine</name>
+                    <state>1</state>
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+                    <name>CCListCFile</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCListCMnemonics</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCListCMessages</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCListAssFile</name>
+                    <state>0</state>
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+                    <name>CCListAssSource</name>
+                    <state>0</state>
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+                    <name>CCEnableRemarks</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCDiagSuppress</name>
+                    <state></state>
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+                <option>
+                    <name>CCDiagRemark</name>
+                    <state></state>
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+                    <name>CCDiagWarning</name>
+                    <state></state>
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+                    <name>CCDiagError</name>
+                    <state></state>
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+                    <name>CCObjPrefix</name>
+                    <state>1</state>
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+                    <name>CCAllowList</name>
+                    <version>1</version>
+                    <state>00000000</state>
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+                    <name>CCDebugInfo</name>
+                    <state>1</state>
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+                    <name>IProcessor</name>
+                    <state>1</state>
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+                    <state>0</state>
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+                    <name>IExtraOptions</name>
+                    <state></state>
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+                    <name>CCLangConformance</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCSignedPlainChar</name>
+                    <state>1</state>
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+                    <name>CCRequirePrototypes</name>
+                    <state>0</state>
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+                    <name>CCDiagWarnAreErr</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCCompilerRuntimeInfo</name>
+                    <state>0</state>
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+                    <name>IFpuProcessor</name>
+                    <state>1</state>
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+                    <name>OutputFile</name>
+                    <state>$FILE_BNAME$.o</state>
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+                <option>
+                    <name>CCLibConfigHeader</name>
+                    <state>1</state>
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+                <option>
+                    <name>PreInclude</name>
+                    <state></state>
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+                    <name>CompilerMisraOverride</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCIncludePath2</name>
+                    <state>$CMSIS_PACK_DEVICE_INCLUDES$</state>
+                    <state>$CMSIS_PACK_INCLUDES$</state>
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+                <option>
+                    <name>CCStdIncCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCodeSection</name>
+                    <state>.text</state>
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+                <option>
+                    <name>IProcessorMode2</name>
+                    <state>1</state>
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+                    <name>CCOptLevel</name>
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+                    <name>CCOptStrategy</name>
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+                    <name>CCOptLevelSlave</name>
+                    <state>1</state>
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+                    <name>CompilerMisraRules98</name>
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+                    <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
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+                    <name>CCPosIndRopi</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCPosIndRwpi</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCPosIndNoDynInit</name>
+                    <state>0</state>
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+                <option>
+                    <name>IccLang</name>
+                    <state>0</state>
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+                <option>
+                    <name>IccCDialect</name>
+                    <state>1</state>
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+                <option>
+                    <name>IccAllowVLA</name>
+                    <state>0</state>
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+                <option>
+                    <name>IccStaticDestr</name>
+                    <state>1</state>
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+                <option>
+                    <name>IccCppInlineSemantics</name>
+                    <state>0</state>
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+                <option>
+                    <name>IccCmsis</name>
+                    <state>1</state>
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+                <option>
+                    <name>IccFloatSemantics</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCOptimizationNoSizeConstraints</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCNoLiteralPool</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCOptStrategySlave</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCGuardCalls</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCEncSource</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCEncOutput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCEncOutputBom</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCEncInput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IccExceptions2</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IccRTTI2</name>
+                    <state>0</state>
+                </option>
+            </data>
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+            <name>AARM</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>10</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>AObjPrefix</name>
+                    <state>1</state>
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+                <option>
+                    <name>AEndian</name>
+                    <state>1</state>
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+                    <name>ACaseSensitivity</name>
+                    <state>1</state>
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+                <option>
+                    <name>MacroChars</name>
+                    <version>0</version>
+                    <state>0</state>
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+                <option>
+                    <name>AWarnEnable</name>
+                    <state>0</state>
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+                <option>
+                    <name>AWarnWhat</name>
+                    <state>0</state>
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+                <option>
+                    <name>AWarnOne</name>
+                    <state></state>
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+                <option>
+                    <name>AWarnRange1</name>
+                    <state></state>
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+                <option>
+                    <name>AWarnRange2</name>
+                    <state></state>
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+                    <name>ADebug</name>
+                    <state>1</state>
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+                <option>
+                    <name>AltRegisterNames</name>
+                    <state>0</state>
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+                <option>
+                    <name>ADefines</name>
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+                    <name>AListHeader</name>
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+                    <name>AListing</name>
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+            <archiveVersion>1</archiveVersion>
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+                    <name>XLinkMisraHandler</name>
+                    <state>0</state>
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+                <option>
+                    <name>IlinkInputFileSlave</name>
+                    <state>0</state>
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+                    <state>iar_nnexamples_gru.out</state>
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+                    <name>IlinkDebugInfoEnable</name>
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+                    <name>IlinkKeepSymbols</name>
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+                    <name>IlinkEnableRemarks</name>
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+                    <state>1</state>
+                </option>
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+                    <name>IlinkStdoutInterfaceSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CrcFullSize</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkIElfToolPostProcess</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogAutoLibSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogRedirSymbols</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogUnusedFragments</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkCrcReverseByteOrder</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkCrcUseAsInput</name>
+                    <state>1</state>
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+                <option>
+                    <name>IlinkOptInline</name>
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+                    <state>1</state>
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+                <option>
+                    <name>IlinkOptExceptionsForce</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkCmsis</name>
+                    <state>1</state>
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+                <option>
+                    <name>IlinkOptMergeDuplSections</name>
+                    <state>0</state>
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+                <option>
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+                    <state>1</state>
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+                    <name>IlinkOptForceVfe</name>
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+                <option>
+                    <name>IlinkStackAnalysisEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkStackControlFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkStackCallGraphFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CrcAlgorithm</name>
+                    <version>1</version>
+                    <state>1</state>
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+                    <name>CrcUnitSize</name>
+                    <version>0</version>
+                    <state>0</state>
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+                <option>
+                    <name>IlinkThreadsSlave</name>
+                    <state>1</state>
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+                    <name>IlinkLogCallGraph</name>
+                    <state>0</state>
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+                    <name>IlinkIcfFile_AltDefault</name>
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+                <option>
+                    <name>IlinkEncOutput</name>
+                    <state>0</state>
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+                    <name>IlinkEncOutputBom</name>
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+                    <name>IlinkHeapSelect</name>
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+                    <name>IlinkLocaleSelect</name>
+                    <state>1</state>
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+            </data>
+        </settings>
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+            <name>IARCHIVE</name>
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+                    <name>IarchiveOverride</name>
+                    <state>0</state>
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+                <option>
+                    <name>IarchiveOutput</name>
+                    <state>###Unitialized###</state>
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+            </data>
+        </settings>
+        <settings>
+            <name>BILINK</name>
+            <archiveVersion>0</archiveVersion>
+            <data />
+        </settings>
+        <settings>
+            <name>Coder</name>
+            <archiveVersion>0</archiveVersion>
+            <data />
+        </settings>
+    </configuration>
+    <configuration>
+        <name>Release</name>
+        <toolchain>
+            <name>ARM</name>
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+                    <name>ObjPath</name>
+                    <state>Release\Obj</state>
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+                    <name>ListPath</name>
+                    <state>Release\List</state>
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+                    <name>Input description</name>
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+                    <state></state>
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+                <option>
+                    <name>OGChipSelectEditMenu</name>
+                    <state></state>
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+                    <name>GenLowLevelInterface</name>
+                    <state>0</state>
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+                <option>
+                    <name>GEndianModeBE</name>
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+                    <name>OGBufferedTerminalOutput</name>
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+                    <name>GenStdoutInterface</name>
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+                    <name>GRuntimeLibThreads</name>
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+                    <name>CoreVariant</name>
+                    <version>26</version>
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+                    <name>GFPUDeviceSlave</name>
+                    <state>-</state>
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+                    <name>FPU2</name>
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+                    <state>0</state>
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+                <option>
+                    <name>NrRegs</name>
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+                    <name>NEON</name>
+                    <state>0</state>
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+                    <name>GFPUCoreSlave2</name>
+                    <version>26</version>
+                    <state>38</state>
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+                    <name>OGCMSISPackSelectDevice</name>
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+                <option>
+                    <name>OgLibHeap</name>
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+                    <version>0</version>
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+                    <name>OGScanfMultibyteSupport</name>
+                    <state>0</state>
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+                <option>
+                    <name>GenLocaleTags</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>GenLocaleDisplayOnly</name>
+                    <state></state>
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+                <option>
+                    <name>DSPExtension</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>TrustZone</name>
+                    <state>0</state>
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+            </data>
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+        <settings>
+            <name>ICCARM</name>
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+                <version>34</version>
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+                    <state>NDEBUG</state>
+                    <state>$CMSIS_PACK_DEVICE_DEFINES$</state>
+                    <state>_RTE_</state>
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+                <option>
+                    <name>CCPreprocFile</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCPreprocComments</name>
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+                <option>
+                    <name>CCPreprocLine</name>
+                    <state>1</state>
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+                <option>
+                    <name>CCListCFile</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCListCMnemonics</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCListCMessages</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCListAssFile</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCListAssSource</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCEnableRemarks</name>
+                    <state>0</state>
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+                <option>
+                    <name>CCDiagSuppress</name>
+                    <state></state>
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+                <option>
+                    <name>CCDiagRemark</name>
+                    <state></state>
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+                <option>
+                    <name>CCDiagWarning</name>
+                    <state></state>
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+                    <name>CCDiagError</name>
+                    <state></state>
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+                <option>
+                    <name>CCObjPrefix</name>
+                    <state>1</state>
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+                    <version>1</version>
+                    <state>11111110</state>
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+                    <name>IExtraOptions</name>
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+                    <name>CCSignedPlainChar</name>
+                    <state>1</state>
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+                    <name>CCRequirePrototypes</name>
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+                    <name>CCDiagWarnAreErr</name>
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+                    <state>$CMSIS_PACK_INCLUDES$</state>
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+&lt;file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/&gt;
+&lt;file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/&gt;
+&lt;file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/&gt;
+&lt;file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/&gt;
+&lt;file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/&gt;
+&lt;file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/&gt;
+&lt;file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/&gt;
+&lt;file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/&gt;
+&lt;file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/&gt;
+&lt;file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/&gt;
+&lt;file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/&gt;
+&lt;file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/&gt;
+&lt;file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/&gt;
+&lt;/component&gt;
+&lt;component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" deviceDependent="1"&gt;
+&lt;package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.0-dev0"/&gt;
+&lt;file category="header" deviceDependent="1" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/&gt;
+&lt;file attr="config" category="sourceAsm" condition="IAR" deviceDependent="1" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0"/&gt;
+&lt;file attr="config" category="sourceC" deviceDependent="1" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0"/&gt;
+&lt;/component&gt;
+&lt;/components&gt;
+&lt;apis/&gt;
+&lt;/configuration&gt;
+</rte>
+    </cmsisPackSettings>
+</project>
diff --git a/NN/Examples/IAR/iar_nn_examples/NN-example-gru/arm_nnexamples_gru.cpp b/NN/Examples/IAR/iar_nn_examples/NN-example-gru/arm_nnexamples_gru.cpp
new file mode 100644
index 0000000..340dc33
--- /dev/null
+++ b/NN/Examples/IAR/iar_nn_examples/NN-example-gru/arm_nnexamples_gru.cpp
@@ -0,0 +1,221 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2018 Arm Limited. All rights reserved.
+*
+*
+* Project:       CMSIS NN Library
+* Title:         arm_nnexamples_gru.cpp
+*
+* Description:   Gated Recurrent Unit Example
+*
+* Target Processor: Cortex-M4/Cortex-M7
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of Arm LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+* -------------------------------------------------------------------- */
+
+/**
+ * @ingroup groupExamples
+ */
+
+/**
+ * @defgroup GRUExample Gated Recurrent Unit Example
+ *
+ * \par Description:
+ * \par
+ * Demonstrates a gated recurrent unit (GRU) example with the use of fully-connected,
+ * Tanh/Sigmoid activation functions.
+ *
+ * \par Model definition:
+ * \par
+ * GRU is a type of recurrent neural network (RNN). It contains two sigmoid gates and one hidden
+ * state. 
+ * \par
+ * The computation can be summarized as:
+ * <pre>z[t] = sigmoid( W_z &sdot; {h[t-1],x[t]} )
+ * r[t] = sigmoid( W_r &sdot; {h[t-1],x[t]} ) 
+ * n[t] = tanh( W_n &sdot; [r[t] &times; {h[t-1], x[t]} ) 
+ * h[t] = (1 - z[t]) &times; h[t-1] + z[t] &times; n[t] </pre>
+ * \image html GRU.gif "Gate Recurrent Unit Diagram"
+ *
+ * \par Variables Description:
+ * \par
+ * \li \c update_gate_weights, \c reset_gate_weights, \c hidden_state_weights are weights corresponding to update gate (W_z), reset gate (W_r), and hidden state (W_n).
+ * \li \c update_gate_bias, \c reset_gate_bias, \c hidden_state_bias are layer bias arrays
+ * \li \c test_input1, \c test_input2, \c test_history are the inputs and initial history
+ *
+ * \par
+ * The buffer is allocated as:
+ * \par
+ * | reset | input | history | update | hidden_state |
+ * \par
+ * In this way, the concatination is automatically done since (reset, input) and (input, history)
+ * are physically concatinated in memory.
+ * \par
+ *  The ordering of the weight matrix should be adjusted accordingly.
+ *
+  *
+ * 
+ * \par CMSIS DSP Software Library Functions Used:
+ * \par
+ * - arm_fully_connected_mat_q7_vec_q15_opt()
+ * - arm_nn_activations_direct_q15()
+ * - arm_mult_q15()
+ * - arm_offset_q15()
+ * - arm_sub_q15()
+ * - arm_copy_q15()
+ *
+ * <b> Refer  </b>
+ * \link arm_nnexamples_gru.cpp \endlink
+ *
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <math.h>
+#include "arm_nnexamples_gru_test_data.h"
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+
+#ifdef _RTE_
+#include "RTE_Components.h"
+#ifdef RTE_Compiler_EventRecorder
+#include "EventRecorder.h"
+#endif
+#endif
+
+#define DIM_HISTORY 32
+#define DIM_INPUT 32
+#define DIM_VEC 64
+
+#define USE_X4
+
+#ifndef USE_X4
+static q7_t update_gate_weights[DIM_VEC * DIM_HISTORY] = UPDATE_GATE_WEIGHT_X2;
+static q7_t reset_gate_weights[DIM_VEC * DIM_HISTORY] = RESET_GATE_WEIGHT_X2;
+static q7_t hidden_state_weights[DIM_VEC * DIM_HISTORY] = HIDDEN_STATE_WEIGHT_X2;
+#else
+static q7_t update_gate_weights[DIM_VEC * DIM_HISTORY] = UPDATE_GATE_WEIGHT_X4;
+static q7_t reset_gate_weights[DIM_VEC * DIM_HISTORY] = RESET_GATE_WEIGHT_X4;
+static q7_t hidden_state_weights[DIM_VEC * DIM_HISTORY] = HIDDEN_STATE_WEIGHT_X4;
+#endif
+
+static q7_t update_gate_bias[DIM_HISTORY] = UPDATE_GATE_BIAS;
+static q7_t reset_gate_bias[DIM_HISTORY] = RESET_GATE_BIAS;
+static q7_t hidden_state_bias[DIM_HISTORY] = HIDDEN_STATE_BIAS;
+
+static q15_t test_input1[DIM_INPUT] = INPUT_DATA1;
+static q15_t test_input2[DIM_INPUT] = INPUT_DATA2;
+static q15_t test_history[DIM_HISTORY] = HISTORY_DATA;
+
+q15_t     scratch_buffer[DIM_HISTORY * 4 + DIM_INPUT];
+
+void gru_example(q15_t * scratch_input, uint16_t input_size, uint16_t history_size,
+                 q7_t * weights_update, q7_t * weights_reset, q7_t * weights_hidden_state,
+                 q7_t * bias_update, q7_t * bias_reset, q7_t * bias_hidden_state)
+{
+  q15_t    *reset = scratch_input;
+  q15_t    *input = scratch_input + history_size;
+  q15_t    *history = scratch_input + history_size + input_size;
+  q15_t    *update = scratch_input + 2 * history_size + input_size;
+  q15_t    *hidden_state = scratch_input + 3 * history_size + input_size;
+
+  // reset gate calculation
+  // the range of the output can be adjusted with bias_shift and output_shift
+#ifndef USE_X4
+  arm_fully_connected_mat_q7_vec_q15(input, weights_reset, input_size + history_size, history_size, 0, 15, bias_reset,
+                                     reset, NULL);
+#else
+  arm_fully_connected_mat_q7_vec_q15_opt(input, weights_reset, input_size + history_size, history_size, 0, 15,
+                                         bias_reset, reset, NULL);
+#endif
+  // sigmoid function, the size of the integer bit-width should be consistent with out_shift
+  arm_nn_activations_direct_q15(reset, history_size, 0, ARM_SIGMOID);
+  arm_mult_q15(history, reset, reset, history_size);
+
+  // update gate calculation
+  // the range of the output can be adjusted with bias_shift and output_shift
+#ifndef USE_X4
+  arm_fully_connected_mat_q7_vec_q15(input, weights_update, input_size + history_size, history_size, 0, 15,
+                                     bias_update, update, NULL);
+#else
+  arm_fully_connected_mat_q7_vec_q15_opt(input, weights_update, input_size + history_size, history_size, 0, 15,
+                                         bias_update, update, NULL);
+#endif
+
+  // sigmoid function, the size of the integer bit-width should be consistent with out_shift
+  arm_nn_activations_direct_q15(update, history_size, 0, ARM_SIGMOID);
+
+  // hidden state calculation
+#ifndef USE_X4
+  arm_fully_connected_mat_q7_vec_q15(reset, weights_hidden_state, input_size + history_size, history_size, 0, 15,
+                                     bias_hidden_state, hidden_state, NULL);
+#else
+  arm_fully_connected_mat_q7_vec_q15_opt(reset, weights_hidden_state, input_size + history_size, history_size, 0, 15,
+                                         bias_hidden_state, hidden_state, NULL);
+#endif
+
+  // tanh function, the size of the integer bit-width should be consistent with out_shift
+  arm_nn_activations_direct_q15(hidden_state, history_size, 0, ARM_TANH);
+  arm_mult_q15(update, hidden_state, hidden_state, history_size);
+
+  // we calculate z - 1 here
+  // so final addition becomes substraction
+  arm_offset_q15(update, 0x8000, update, history_size);
+  // multiply history
+  arm_mult_q15(history, update, update, history_size);
+  // calculate history_out
+  arm_sub_q15(hidden_state, update, history, history_size);
+
+  return;
+}
+
+int main()
+{
+  #ifdef RTE_Compiler_EventRecorder
+  EventRecorderInitialize (EventRecordAll, 1);  // initialize and start Event Recorder
+  #endif
+
+  printf("Start GRU execution\n");
+  int       input_size = DIM_INPUT;
+  int       history_size = DIM_HISTORY;
+
+  // copy over the input data 
+  arm_copy_q15(test_input1, scratch_buffer + history_size, input_size);
+  arm_copy_q15(test_history, scratch_buffer + history_size + input_size, history_size);
+
+  gru_example(scratch_buffer, input_size, history_size,
+              update_gate_weights, reset_gate_weights, hidden_state_weights,
+              update_gate_bias, reset_gate_bias, hidden_state_bias);
+  printf("Complete first iteration on GRU\n");
+
+  arm_copy_q15(test_input2, scratch_buffer + history_size, input_size);
+  gru_example(scratch_buffer, input_size, history_size,
+              update_gate_weights, reset_gate_weights, hidden_state_weights,
+              update_gate_bias, reset_gate_bias, hidden_state_bias);
+  printf("Complete second iteration on GRU\n");
+
+  return 0;
+}
diff --git a/NN/Examples/IAR/iar_nn_examples/NN-example-gru/arm_nnexamples_gru_test_data.h b/NN/Examples/IAR/iar_nn_examples/NN-example-gru/arm_nnexamples_gru_test_data.h
new file mode 100644
index 0000000..4fd2bb0
--- /dev/null
+++ b/NN/Examples/IAR/iar_nn_examples/NN-example-gru/arm_nnexamples_gru_test_data.h
@@ -0,0 +1,23 @@
+#define UPDATE_GATE_WEIGHT_X2 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+
+#define UPDATE_GATE_WEIGHT_X4 {-62,78,83,104,-68,28,-33,-63,-58,104,-89,17,-70,83,-16,-85,-80,-116,1,-40,-42,101,-9,40,-93,-83,31,4,-104,23,107,-39,101,88,95,-110,-81,74,-16,-99,121,-111,-83,-98,42,73,-74,50,71,18,18,-89,-63,-20,-4,123,-98,120,-5,-84,-128,-88,-109,-13,44,66,-100,-69,-105,-126,55,-25,-16,-8,-73,-22,-51,70,-68,-11,25,-91,62,-29,-88,16,19,-28,34,-41,-22,110,-39,121,116,-29,-16,55,42,-124,-7,20,66,-69,9,-67,-125,103,52,104,-29,117,60,-40,-78,-100,63,-40,-94,-1,15,1,-76,-25,71,-97,-2,-12,-76,-68,-63,-62,-127,31,31,32,71,-89,-25,-75,-103,15,120,-32,78,-20,-66,-78,124,77,41,31,38,101,-118,-92,-13,16,-23,40,-71,-51,-120,-97,127,107,59,-52,-80,-54,28,59,-22,-52,54,-89,33,-78,51,41,-2,-17,32,124,82,34,-105,-102,-87,-95,-109,54,26,-9,-47,-53,85,48,-31,-40,38,56,86,103,-5,37,-59,24,-114,-55,44,13,-122,-46,-97,42,90,81,-98,-75,-14,119,-88,5,105,-20,-123,-37,-19,-118,43,-45,24,29,95,36,-30,-10,115,106,-12,110,11,84,42,83,14,57,49,-80,-35,-127,10,-74,121,-10,-56,-8,85,50,-120,37,44,-34,37,15,-25,-44,98,-114,16,-88,83,-87,-31,6,-98,-53,25,88,-54,18,111,8,127,115,88,19,-78,61,-96,66,-111,7,-49,-67,-114,-108,-65,-67,114,93,111,80,-100,-6,28,107,-17,-48,-74,-11,-31,-68,-111,25,40,-61,-18,31,33,25,66,25,35,38,19,29,74,-82,-43,71,31,-59,48,-70,112,62,119,121,-23,0,53,25,-80,-31,-26,-4,102,106,41,-7,74,17,-81,-6,89,-44,-27,53,-123,-60,55,-17,87,62,-54,19,-126,116,32,-67,-121,-64,-113,109,-66,45,110,117,97,70,125,-103,-86,-90,-118,12,125,-114,-108,97,-21,-68,15,20,58,57,-17,112,16,121,26,-65,8,24,70,-66,13,-43,-109,74,-67,-127,-55,29,41,-104,-16,-42,59,29,42,-31,88,-69,81,35,-85,-87,78,-125,-82,4,-55,-17,27,54,16,-98,-89,5,109,95,66,101,67,-39,-52,-82,118,18,54,56,-74,-88,-39,65,57,43,33,-63,-19,-113,-16,-57,86,89,72,-73,77,-91,-68,1,-10,-8,126,80,-122,112,-19,37,110,-51,-7,-27,-109,-75,-50,10,-17,67,58,-42,78,-5,-84,4,103,-50,-88,79,15,60,-3,-18,94,81,2,-55,16,23,-61,-16,66,68,-52,44,-23,-114,51,-103,39,-111,-110,-88,34,92,-91,-23,96,-123,-35,111,31,72,-60,-80,-64,24,61,43,88,58,-1,-17,75,-7,-108,42,-38,-125,55,53,-108,23,31,-11,117,96,73,114,38,-13,-26,126,38,25,75,-105,-113,-88,-57,96,65,-105,-9,120,-92,13,9,-128,0,-70,-92,-25,-3,-40,59,85,124,-82,-30,29,93,-38,14,-17,-39,103,-27,-43,-100,3,-95,23,-91,-37,-55,2,125,-121,107,76,-34,58,52,-110,72,54,85,108,-83,16,110,-43,12,30,-31,-116,-68,-44,84,66,-83,28,-78,22,-86,89,65,60,-79,-81,21,0,-118,6,92,-6,11,-8,56,-108,60,27,87,126,-106,-80,-3,-34,-116,88,35,64,-38,-42,33,-125,53,22,-24,126,-79,75,-94,-45,85,-116,15,-69,-11,-116,77,28,91,-29,-109,-41,-22,81,-94,-70,100,-3,95,94,82,31,-89,-81,97,-80,-1,-116,-2,5,88,42,111,119,-113,-46,116,5,36,105,74,-40,-64,-21,93,-105,-110,-109,7,105,-62,78,-11,-20,-74,64,91,5,101,-34,35,54,-112,72,21,-32,-91,46,51,-124,32,-95,-59,90,-6,120,21,-83,98,60,36,6,29,44,25,-17,10,-29,-41,40,-19,-18,57,65,110,4,-56,51,89,87,-50,112,-12,109,109,-50,34,38,-123,-115,-88,-38,85,25,-32,-27,-18,37,-30,-13,87,-52,20,-84,9,1,18,-106,118,87,-19,103,-81,85,23,76,21,44,-45,-50,-120,36,106,78,40,101,-120,-49,20,-119,115,16,78,-102,2,68,18,20,-72,-20,-103,104,70,119,75,-113,11,23,83,107,100,43,64,-67,44,-88,117,18,126,105,-9,44,-63,-85,98,119,63,4,-82,-48,30,-21,115,-53,114,16,-62,-42,123,-84,-39,-7,106,83,-11,-39,25,-8,15,-114,104,106,-9,31,84,23,52,-54,-13,-34,88,-76,46,74,77,80,-40,-51,101,68,64,77,-104,-40,73,82,108,-111,125,19,-13,-75,52,-116,33,-104,34,-41,125,60,116,-118,-54,109,65,77,6,82,-114,-29,-47,-6,57,-96,-128,-121,85,-91,2,81,-2,-43,115,114,-117,-102,-80,-76,7,-124,-65,-1,100,-82,-20,64,-73,-75,82,32,98,121,-75,27,72,34,-109,-117,-83,-98,-24,-24,99,21,43,64,-125,-88,-91,36,-94,-87,-106,-100,-97,115,95,59,-39,-29,-4,-36,-46,-84,15,-121,-127,-45,58,-46,-94,4,-21,29,123,-111,-128,4,53,45,-27,73,29,-44,-80,-94,-117,-109,100,-78,-84,-18,53,101,-25,-7,-27,84,44,101,28,108,105,60,95,-95,-126,-24,-59,-61,15,15,88,-71,-11,-90,94,-59,25,112,-38,126,58,-48,-64,-114,-88,71,122,36,112,1,82,-14,62,39,-62,-42,127,106,58,52,-28,-85,95,-126,50,109,5,-45,-86,-68,125,105,-6,-100,-102,74,-83,-18,-9,-127,90,-33,-18,-68,-100,48,101,-41,-86,-94,104,-68,-124,57,22,-93,17,-22,108,-99,21,13,-91,-25,-64,31,-22,-86,50,-71,-100,66,73,85,-102,-27,-27,-43,-92,-23,-17,-70,-31,69,115,122,86,4,-11,127,-105,92,85,-70,33,123,-40,125,-49,-95,-112,115,-43,124,84,117,-82,-87,61,-61,114,-32,104,-8,57,-71,62,18,-31,-18,30,18,112,94,-84,49,-7,123,-119,-90,-92,103,5,-101,-26,37,78,-31,-92,-1,-10,-50,-21,-111,35,-50,90,-60,-89,-73,60,124,-45,-2,-13,96,-96,-18,48,54,-75,31,-125,-1,-34,-64,88,93,-19,-98,-83,75,-80,-69,-91,16,-75,104,29,-6,92,112,12,21,15,-38,-33,-24,118,-56,-2,56,127,127,-14,94,-38,127,83,113,29,-48,-80,97,-50,-48,-109,-57,61,-96,41,4,-111,-4,-26,85,67,-108,-14,106,76,-113,-31,-12,-2,-30,-29,-76,-7,80,-41,26,63,94,-5,116,58,-39,-13,-76,95,44,-79,-109,-72,-101,-81,-104,26,-122,-42,38,-116,-6,-24,48,-91,112,-109,-103,-45,38,46,-82,-19,99,107,-119,-20,-52,114,-91,-102,49,62,35,97,-38,-14,112,111,107,-35,108,125,110,11,115,80,47,36,54,22,76,26,69,55,11,-65,-50,27,100,-2,-116,26,-73,76,37,-88,109,-2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+
+#define RESET_GATE_WEIGHT_X2 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+
+#define RESET_GATE_WEIGHT_X4 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+
+#define HIDDEN_STATE_WEIGHT_X2 {-3,-33,59,21,117,70,0,44,108,108,-47,-80,-118,34,88,-91,-123,-108,8,51,26,82,-80,107,-100,-69,97,-90,17,19,63,111,-40,-125,110,24,58,-69,26,-31,-65,-37,-47,-41,-109,106,-100,108,-99,108,116,104,86,-50,-45,10,-53,112,34,96,-10,-39,-32,-25,69,102,-2,-4,-25,121,-1,-28,-48,-100,0,-128,60,-73,42,-32,118,-88,-113,-112,-113,70,-98,118,95,77,-52,123,-99,72,26,-102,-32,120,113,22,6,-68,84,-33,103,66,111,60,-76,33,10,25,-43,93,41,-79,110,13,67,107,-113,90,58,64,-125,79,-85,-18,76,80,-59,11,-18,-74,15,-102,99,-19,117,99,65,-50,-108,-121,-9,-104,33,94,-95,110,-48,-97,76,36,1,-58,86,-115,45,-88,38,51,123,-23,-20,-43,-37,15,91,-85,-88,6,-96,58,78,13,23,1,-43,62,-70,-108,44,30,74,90,79,-80,-20,71,-21,0,60,19,-59,-52,44,-14,77,92,-69,121,-123,-27,119,-84,79,87,24,85,118,1,-51,-96,60,102,-6,15,96,120,-109,6,35,11,-119,-109,-18,16,-112,91,-126,71,-29,121,-21,-120,37,57,-117,-39,93,56,-73,-104,77,-107,-52,111,-61,-4,44,-119,67,72,-66,36,-127,-113,-124,123,21,98,84,86,76,23,78,7,-127,-4,1,-46,-107,59,-21,53,-65,-99,-15,-98,53,-31,7,64,7,105,51,-75,50,-52,48,101,-126,-120,5,34,3,81,-39,70,41,112,25,30,79,-6,107,-11,-97,92,-84,67,49,107,60,101,-37,27,-91,-61,-96,120,-113,87,-46,68,64,102,-86,-60,13,-71,56,-105,90,-9,-35,27,103,120,39,23,-39,-1,-85,-95,-6,119,-41,-2,-69,102,102,-119,-3,-11,-125,-111,40,-115,-41,-117,-44,-7,83,123,-21,23,99,-107,43,100,-99,-3,89,3,-113,103,47,-94,-69,-38,-28,-37,49,-117,-49,-126,17,-98,37,92,55,-116,-70,-50,77,120,47,124,78,114,67,-48,6,-42,-115,85,116,-114,-46,-50,-13,70,-101,110,-55,20,-51,125,-19,-9,-15,46,30,-27,-123,114,-50,-30,-72,76,-83,71,47,-45,74,102,44,108,-26,108,-113,-43,110,-91,37,-69,76,-33,106,-76,-96,20,-117,63,-33,-5,11,-121,-51,63,-56,59,-16,-33,114,74,124,73,99,-50,51,-71,118,106,30,-92,26,-40,119,-121,2,-45,9,0,-5,-2,-89,88,-11,-85,-60,19,81,-96,75,82,-40,124,89,-36,-117,-100,-2,-34,112,101,39,-101,-106,60,59,-126,-32,96,68,-53,87,20,54,-24,46,-95,65,-112,22,60,122,-22,-106,-124,97,-37,-86,95,-110,-8,44,58,-12,-120,-45,-86,-32,-86,-94,-14,15,29,-8,-114,71,70,-93,-69,100,-123,-18,-47,-12,127,104,-102,93,-11,-73,121,87,-79,-92,46,92,-108,-107,79,121,-71,-89,16,-11,-52,72,-114,-32,-60,-9,-57,-4,10,-81,-22,68,74,76,-68,-127,96,-84,69,-3,-26,-106,-3,-87,-65,105,109,122,-103,31,-108,-86,-5,-39,85,88,67,-82,0,-25,93,61,-62,5,-54,-114,-51,-9,-114,20,49,-26,38,19,39,-103,33,-120,37,-97,32,-89,119,111,-124,-99,78,-49,-128,76,-18,-12,-109,96,90,-73,-104,59,-59,-92,123,55,54,-120,-80,-48,-16,-95,96,36,118,-119,-58,93,45,-43,-75,64,38,-2,-72,-111,22,-89,-75,-120,-42,45,108,59,-105,40,27,32,-66,121,-22,-71,-9,118,124,60,-96,47,4,14,-27,64,70,47,-91,-70,1,-44,94,-46,53,4,23,-124,-92,-95,83,-49,-81,40,-80,48,0,39,1,-113,32,40,-21,-1,-110,102,1,-74,-51,40,108,-35,-36,89,84,123,-48,-115,-115,83,-61,114,-127,-61,114,100,-82,-45,60,87,60,19,86,97,-68,40,-66,75,86,-32,-128,88,-57,-27,77,3,-27,43,-39,-62,66,5,-82,45,-104,-78,34,57,96,89,-90,66,-10,37,-110,-30,82,-58,13,94,12,115,35,117,0,80,61,-7,107,-104,-21,21,-70,-93,-94,-51,-61,39,-62,64,-82,-109,76,84,58,-47,-100,52,46,-51,88,91,8,-47,108,-80,25,-58,111,-59,-83,-75,92,98,110,54,106,65,-47,-120,-5,90,-123,101,-61,-85,-93,109,88,0,8,59,86,56,126,17,-26,58,-101,-25,35,0,-123,-3,-56,112,-128,8,17,-52,88,31,-3,105,-56,68,-1,-94,96,-19,10,-22,-88,-10,119,-44,19,42,75,-86,18,-107,89,-82,-120,76,40,84,-122,29,33,-47,17,-50,-13,23,-66,-46,85,-29,-110,42,-68,8,99,-93,-29,101,16,52,-13,127,0,86,-117,-92,-70,-32,-27,127,-123,1,34,-13,92,114,-11,29,-103,-121,-54,20,73,16,74,108,16,-61,89,50,-30,-14,116,44,-31,16,96,24,-51,7,39,-87,-69,-61,-98,61,-46,113,85,-95,103,67,99,-66,-45,-42,-70,96,104,5,-111,69,-25,99,-118,23,109,11,4,-41,-94,73,100,96,6,90,-75,-25,79,-13,-43,-6,-12,51,12,40,124,-56,81,-8,59,-60,-26,-54,33,122,85,53,-99,125,19,-26,94,41,-5,46,-48,-70,-10,41,102,-1,-98,-9,15,29,46,-66,-118,-53,45,119,-127,94,53,-58,90,124,5,-110,-98,-80,-77,77,29,19,105,-121,92,9,-124,50,-119,59,40,67,104,-12,13,103,101,47,-51,34,-66,-101,-117,112,-5,118,-48,-60,-114,38,-71,2,51,114,80,115,-5,116,20,16,-47,-19,30,24,-68,7,-30,-3,-64,-7,-34,-12,44,34,-91,-97,116,112,-99,108,-75,17,26,-14,-61,80,22,-7,34,47,-93,45,106,121,78,43,-97,39,-99,-68,-72,-7,64,-49,-82,-127,78,-64,48,18,15,126,-125,-111,-69,-111,10,-46,111,-75,123,-44,-67,-31,-96,-67,-53,-53,-106,67,-101,23,62,30,9,-114,-12,-57,-38,-78,95,-10,-3,110,88,123,-26,78,-125,114,53,10,-57,26,38,-51,73,92,-124,79,15,75,-62,109,-113,-67,1,35,52,-36,55,7,111,-43,109,101,88,122,-21,-32,-87,59,16,-122,-109,-118,17,-22,-39,53,-105,77,90,-24,-65,43,-27,113,30,-117,-30,106,37,55,59,54,-70,99,99,-73,120,97,-39,-88,-54,101,51,-76,70,-121,-68,23,-73,-31,75,-8,-63,-123,-93,96,-81,99,-95,28,-36,55,-104,32,-64,41,-97,95,-89,126,-26,-25,126,2,-26,-54,110,-86,110,74,-3,-110,56,-60,-49,117,-82,-55,-103,-112,70,-85,85,-63,82,7,75,-61,90,32,35,-115,72,73,-121,63,-84,-52,-29,-59,-4,29,64,119,127,58,-117,48,126,120,-115,-15,-10,27,27,-81,117,-5,121,-72,113,31,-13,10,27,-106,-51,81,-96,-22,19,-78,6,71,-34,123,118,75,-23,-72,-97,111,-121,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+
+#define HIDDEN_STATE_WEIGHT_X4 {-3,69,-33,102,76,60,80,19,59,-2,21,-4,-59,-59,11,-52,117,-25,70,121,-18,44,-74,-14,0,-1,44,-28,15,77,-102,92,108,-48,108,-100,99,-69,-19,121,-47,0,-80,-128,117,-123,99,-27,-118,60,34,-73,65,119,-50,-84,88,42,-91,-32,-108,79,-121,87,-123,118,-108,-88,-9,24,-104,85,8,-113,51,-112,33,118,94,1,26,-113,82,70,-95,-51,110,-96,-80,-98,107,118,-48,60,-97,102,-100,95,-69,77,76,-6,36,15,97,-52,-90,123,1,96,-58,120,17,-99,19,72,86,-109,-115,6,63,26,111,-102,45,35,-88,11,-40,-32,-125,120,38,-119,51,-109,110,113,24,22,123,-18,-23,16,58,6,-69,-68,-20,-112,-43,91,26,84,-31,-33,-37,-126,15,71,-65,103,-37,66,91,-29,-85,121,-47,111,-41,60,-88,-21,6,-120,-109,-76,106,33,-96,37,58,57,-100,10,108,25,78,-117,13,-39,-99,-43,108,93,23,93,1,56,116,41,104,-79,-43,-73,62,-104,86,110,-50,13,-70,77,-108,-107,-45,67,10,107,44,-52,30,111,-53,-113,112,90,74,-61,90,-4,34,58,96,64,79,44,-80,-119,-10,-125,-39,79,-20,67,71,72,-32,-85,-25,-18,-21,-66,0,36,-127,-96,-113,120,49,76,-117,-33,-124,-113,123,87,-49,106,-126,-76,21,-46,98,68,17,-96,-98,20,84,64,86,102,37,-117,92,63,76,-86,23,-60,55,-33,-116,-5,78,13,7,-71,-70,11,-50,-121,-127,56,-4,-105,77,-51,120,63,1,90,-46,-9,47,-56,124,59,-107,-35,59,27,78,-16,114,-33,-21,103,53,120,67,114,-48,74,-65,39,-99,23,6,124,-42,73,-15,-39,-98,-1,-115,99,85,-50,53,-85,-31,-95,116,51,-114,-71,7,-6,64,119,-46,118,-50,106,7,-41,105,-2,-13,30,70,-92,51,-69,-75,102,-101,26,110,-40,50,102,-52,-119,-55,119,20,-121,48,-3,101,-11,-51,2,125,-45,-126,-125,-120,-111,-19,9,-9,0,5,40,34,-115,-15,-5,46,-2,3,-41,81,-117,30,-89,-27,88,-39,-44,70,-7,-123,-11,114,-85,41,83,112,123,-50,-60,-30,19,25,-21,30,23,-72,81,76,-96,79,99,-6,-107,-83,75,71,82,107,43,-11,100,47,-40,-45,124,-97,-99,92,-3,74,89,102,-36,-84,89,67,3,44,-117,108,-100,49,-113,107,103,-26,-2,108,-34,60,47,101,-94,-113,112,-43,101,-37,-69,27,-38,110,39,-91,-101,-91,-28,-61,-37,37,-106,-69,60,59,121,-126,-71,-97,47,32,4,-32,-89,96,16,-89,14,119,-27,68,-11,-53,-52,111,64,-124,70,87,72,20,-114,-99,47,78,-91,54,-32,-24,-60,-49,-70,-128,1,46,-9,-95,-57,76,-44,-18,94,65,-4,-112,10,-12,-46,-109,53,22,-81,60,-22,96,4,90,23,122,68,-22,74,-73,-124,-104,-92,-106,76,-124,-68,59,-95,-59,83,97,-127,-37,96,-92,-49,123,-81,-86,-84,95,69,55,40,54,-80,-110,-3,-8,-26,-120,48,-80,0,44,-106,58,-3,-48,39,-16,1,-12,-87,-120,-65,-95,-113,96,32,-45,105,-86,109,36,40,118,-21,-32,122,-86,-103,-119,-1,-58,-110,-94,31,-14,-108,93,102,45,1,15,-86,29,-5,-43,-74,-75,-51,-8,-39,-114,85,64,40,38,108,71,88,70,67,-2,-35,-72,-36,-93,-82,-69,0,-111,89,22,84,100,-25,-123,93,-89,123,-75,-48,-18,61,-47,-62,-120,-115,-42,-115,-12,5,127,-54,45,83,108,-61,104,-114,-102,-51,59,114,-105,-127,93,-9,-11,-114,40,-61,27,114,-73,20,121,49,32,100,-66,-82,87,-26,-79,38,121,-45,-22,60,-92,19,46,39,-71,87,-9,60,92,-103,-108,33,118,19,124,86,-107,-120,79,37,60,97,-96,-68,40,-51,-66,88,-10,-61,119,89,75,91,86,8,-44,50,19,-30,-32,-47,-128,108,42,-14,75,116,88,-80,-57,25,-86,44,18,-31,-27,-58,77,111,-107,16,89,96,3,-59,-27,-83,-82,24,-120,-51,43,-75,-39,92,76,7,40,39,-62,98,66,110,84,-87,-122,-69,5,54,-82,106,29,-61,33,-98,45,65,-104,-47,-47,61,17,-46,-78,-120,34,-5,-50,113,-13,85,57,90,96,-123,23,-95,-66,103,89,101,-90,-61,-46,67,85,99,66,-85,-10,-93,-29,-66,-110,-45,37,109,-110,88,42,-42,-68,-70,-30,0,82,8,8,96,99,104,-58,59,13,86,-93,5,-29,-111,94,56,12,126,101,69,16,-25,115,17,35,-26,52,99,-13,-118,117,58,0,-101,127,23,0,109,80,-25,61,35,86,11,-117,4,-7,0,107,-123,-92,-41,-70,-94,-104,-3,-21,-56,-32,73,-27,100,21,112,-70,-128,127,96,-123,6,-93,8,-94,17,1,90,34,-75,-51,-52,-61,88,-13,-25,92,79,39,31,-62,-3,114,-13,-11,-43,64,105,-82,-56,29,-6,-103,-12,-109,68,76,-1,-121,51,-54,12,84,-94,58,96,20,40,73,124,-47,-19,-100,10,16,-56,74,81,52,-22,46,-88,108,-8,16,59,-60,-101,-26,-117,-127,-36,78,55,-54,112,33,-5,-64,7,48,111,122,118,85,-48,18,-43,15,109,53,-60,-99,-114,126,101,-125,88,125,38,19,-71,-111,122,-69,-21,-26,2,94,51,-111,-32,10,-87,41,114,-5,80,-46,59,111,16,46,115,-48,-5,-75,-122,123,-109,-70,116,-10,20,-44,-118,-67,17,41,16,102,-47,-31,-22,-96,-39,-1,-19,-98,30,-67,53,-53,-105,-9,24,15,-68,-53,77,-106,90,29,7,46,-30,67,-24,-101,-65,-66,-3,-118,-64,23,43,62,-27,-53,-7,45,-34,30,113,9,30,119,-12,-127,44,-114,-117,-12,-30,94,34,53,-91,-57,106,-38,37,-58,-97,90,116,-78,55,95,59,124,112,5,-99,-10,54,-3,-70,-110,108,-98,-75,110,99,88,99,-80,17,-77,26,123,-73,-26,120,77,-14,29,-61,78,97,-125,-39,19,80,105,22,114,-88,53,-54,-121,-7,92,34,10,101,-57,51,9,47,-124,-93,26,-76,38,70,50,45,-119,106,-51,-121,73,-68,59,121,40,78,92,23,-124,-73,67,43,104,-97,79,-31,15,75,-12,39,13,-99,75,-8,-62,-63,103,-68,101,-72,109,-123,-113,-93,47,-7,-51,64,-67,96,1,-81,34,-49,-66,-82,35,99,52,-95,28,27,-36,27,-93,-15,52,-68,55,-81,-104,117,67,-3,53,102,32,-5,-64,121,-31,-10,19,-123,41,-72,-97,113,45,-10,-111,-71,95,31,-89,-13,36,-111,39,86,126,10,-26,27,-91,48,-77,-45,-25,-106,126,-51,104,101,71,81,2,81,-26,-96,7,-114,-44,-94,-54,-22,110,19,-76,77,3,-127,-86,-78,110,6,-62,-96,121,-100,74,71,-3,-34,43,86,37,109,-110,123,56,118,-7,-33,-96,15,-60,75,-49,-23,-6,-34,57,60,117,-72,-82,-97,-104,88,30,-86,-55,111,-103,-121,-126,-63,-94,-103,-112,0,70,80,118,-46,-44,101,-85,28,85,52,91,-127,29,-88,-63,95,82,59,124,90,-86,-37,7,-116,75,72,-13,82,55,-125,-61,80,90,-75,41,-28,-41,-6,32,-62,35,88,91,61,-112,-104,-115,23,72,-102,-25,77,103,0,73,13,-121,6,81,-52,-70,59,63,113,-84,-85,-112,-9,113,-82,-52,98,-29,45,-25,59,-73,-78,-59,-96,-4,-32,-82,79,16,80,29,94,64,-7,67,-77,-5,-125,119,12,127,-9,104,-95,56,16,58,86,-117,18,66,26,-115,-55,48,59,126,-15,-90,-16,-126,15,120,75,-115,13,106,-76,80,-9,-15,-70,-10,50,-78,56,-51,110,85,-29,-102,20,15,-56,-73,-64,-23,-66,-12,-80,-128,-6,-121,-103,-6,-122,-97,40,46,-36,30,-2,-34,-2,32,116,-93,-59,-109,34,-79,126,-95,-120,-15,-40,-86,-64,71,-48,126,124,-2,-39,75,-64,127,57,30,-107,1,-74,-32,-105,-112,104,-115,80,-27,50,-86,-86,75,-13,-8,81,-13,-66,-38,-14,125,118,103,33,48,-71,10,35,-118,88,65,119,-36,-116,-107,-20,-43,-110,107,33,-27,15,-48,-119,46,-35,96,-75,88,-12,-7,90,-41,-6,-87,89,-88,-117,98,-29,-64,-41,-18,99,-83,13,61,-8,126,46,82,127,-81,-75,20,57,10,-36,81,54,-123,67,18,124,45,-55,95,50,-41,-38,-127,66,61,24,9,51,-55,113,-66,-80,28,49,-113,-71,24,113,-107,105,-71,37,47,-117,73,45,30,-74,117,114,26,6,-42,-80,-74,108,-81,110,73,88,124,-24,-43,-3,49,84,-55,-30,-125,36,102,62,-126,-45,-33,-50,98,-8,6,109,62,113,-84,-12,32,-40,24,-101,-87,-57,-56,59,-123,106,32,12,-71,-18,97,49,113,-47,105,-113,49,99,-124,-124,-81,-118,117,-12,-76,46,-9,-48,-41,-3,-54,-86,97,88,119,-82,-113,-52,-126,-93,-23,-121,127,-97,-28,-24,31,-62,-119,52,-93,75,7,33,-101,-67,67,-45,39,74,-83,127,-115,-66,4,-6,-18,-29,29,-23,68,-123,-103,31,24,117,49,8,-70,41,1,20,71,99,-40,-21,-116,-30,93,66,95,27,63,117,-49,20,-113,-92,-7,127,115,-85,97,-39,34,-67,-10,-53,123,-87,119,2,-77,68,-74,-66,22,96,-13,-12,96,-26,86,35,47,-128,-4,83,52,114,-2,-84,-14,67,-94,-53,-45,-74,-71,-94,94,-101,-122,3,-48,-14,124,-43,56,-3,58,-22,-97,-106,1,-32,57,-16,-127,51,23,-67,-59,-27,-60,125,-46,-125,-117,28,-74,29,29,-76,94,25,58,-32,-31,-101,-105,42,49,101,-115,-60,114,-55,-72,101,94,35,-14,-6,-115,-101,20,-36,-8,103,77,-42,82,61,104,85,35,-71,100,111,67,107,-90,-24,19,6,117,-87,-16,-67,-26,26,24,105,-64,102,105,-36,-7,60,109,112,-19,119,59,-81,10,-91,-9,69,124,-54,124,52,80,13,-105,21,-116,-114,-33,5,0,10,126,-93,22,-26,-115,115,94,22,105,-111,30,-7,102,44,63,0,85,-38,91,-30,98,-21,43,4,-63,-34,-124,-67,38,33,-2,45,-32,-86,12,-92,-38,29,39,121,-119,-42,-23,-30,-106,3,-12,-54,-108,7}
+
+#define UPDATE_GATE_BIAS {-85,78,113,70,33,38,8,114,70,-35,-67,65,31,-24,-70,-124,-89,104,124,-122,111,61,-87,75,-61,-98,83,-69,-63,45,-11,103}
+
+#define RESET_GATE_BIAS {-77,67,-93,-3,98,59,-121,33,49,50,41,91,-115,-33,71,47,-70,45,89,-115,72,106,-22,100,97,-100,-95,108,-33,3,14,30}
+
+#define HIDDEN_STATE_BIAS {-85,78,113,70,33,38,8,114,70,-35,-67,65,31,-24,-70,-124,-89,104,124,-122,111,61,-87,75,-61,-98,83,-69,-63,45,-11,103}
+
+#define INPUT_DATA1 {-367,-338,0,-89,453,-413,-343,-16,42,418,201,274,-352,477,-290,-92,266,-49,342,453,-398,247,-153,328,217,342,85,69,-38,351,73,128}
+
+#define INPUT_DATA2 {280,41,-322,61,315,350,504,-227,-221,-483,352,252,455,-236,344,364,-378,229,-187,-498,295,357,-511,58,-349,-458,-420,-66,-400,-379,477,-60}
+
+#define HISTORY_DATA {-38,53,105,-79,-463,51,-343,-226,-435,-282,218,441,-299,-215,-109,335,340,-471,-109,273,33,-245,-469,170,-26,-59,192,-119,76,-6,236,-145}
diff --git a/NN/Examples/IAR/iar_nn_examples/NN-example-gru/readme_iar.txt b/NN/Examples/IAR/iar_nn_examples/NN-example-gru/readme_iar.txt
new file mode 100644
index 0000000..a73e193
--- /dev/null
+++ b/NN/Examples/IAR/iar_nn_examples/NN-example-gru/readme_iar.txt
@@ -0,0 +1,7 @@
+CMSIS NN Lib example arm_nnexample_gru0 for
+  Cortex-M0, Cortex-M3, Cortex-M4 and Cortex-M7.
+
+The example is configured for IAR Embedded Workbench for ARM Simulator.
+
+When changing target, remember to change the ARM_MATH_CMx and __FPU_PRESENT
+Preprocessor defines for C/C++ Compiler
\ No newline at end of file
diff --git a/NN/Include/arm_nn_tables.h b/NN/Include/arm_nn_tables.h
index d56d82c..36be5a8 100644
--- a/NN/Include/arm_nn_tables.h
+++ b/NN/Include/arm_nn_tables.h
@@ -53,7 +53,4 @@
 extern const q15_t sigmoidHTable_q15[192];
 extern const q15_t sigmoidLTable_q15[128];
 
-extern const q15_t sigmoidLTable_q15[128];
-extern const q15_t sigmoidHTable_q15[192];
-
 #endif                          /*  ARM_NN_TABLES_H */
diff --git a/NN/Include/arm_nnfunctions.h b/NN/Include/arm_nnfunctions.h
index c6ec83a..331255b 100644
--- a/NN/Include/arm_nnfunctions.h
+++ b/NN/Include/arm_nnfunctions.h
@@ -34,7 +34,7 @@
    * ------------
    *
    * This user manual describes the CMSIS NN software library,
-   * a collection of efficient neural network kernels developed to maximize the 
+   * a collection of efficient neural network kernels developed to maximize the
    * performance and minimize the memory footprint of neural networks on Cortex-M processor cores.
    *
    * The library is divided into a number of functions each covering a specific category:
@@ -47,8 +47,8 @@
    *
    * The library has separate functions for operating on different weight and activation data
    * types including 8-bit integers (q7_t) and 16-bit integers (q15_t). The descrition of the
-   * kernels are included in the function description. The implementation details are also 
-   * described in this paper [1]. 
+   * kernels are included in the function description. The implementation details are also
+   * described in this paper [1].
    *
    * Block Diagram
    * --------
@@ -86,7 +86,7 @@
 
 /**
  * @defgroup groupNN Neural Network Functions
- * These functions perform basic operations for neural network layers. 
+ * These functions perform basic operations for neural network layers.
  */
 
 #ifndef _ARM_NNFUNCTIONS_H
@@ -111,12 +111,12 @@
  *
  * The convolution is implemented in 2 steps: im2col and GEMM
  *
- * im2col is a process of converting each patch of image data into 
+ * im2col is a process of converting each patch of image data into
  * a column. After im2col, the convolution is computed as matrix-matrix
  * multiplication.
- * 
+ *
  * To reduce the memory footprint, the im2col is performed partially.
- * Each iteration, only a few column (i.e., patches) are generated and 
+ * Each iteration, only a few column (i.e., patches) are generated and
  * computed with GEMM kernels similar to CMSIS-DSP arm_mat_mult functions.
  *
  */
@@ -136,9 +136,9 @@
    * @param[in]       out_shift   amount of right-shift for output
    * @param[in,out]   Im_out      pointer to output tensor
    * @param[in]       dim_im_out  output tensor dimension
-   * @param[in,out]   bufferA     pointer to buffer space for input 
+   * @param[in,out]   bufferA     pointer to buffer space for input
    * @param[in,out]   bufferB     pointer to buffer space for output
-   * @return     The function returns <code>ARM_MATH_SUCCESS</code> 
+   * @return     The function returns <code>ARM_MATH_SUCCESS</code>
    *
    */
 
@@ -153,9 +153,9 @@
                                          const q7_t * bias,
                                          const uint16_t bias_shift,
                                          const uint16_t out_shift,
-                                         q7_t * Im_out, 
-                                         const uint16_t dim_im_out, 
-                                         q15_t * bufferA, 
+                                         q7_t * Im_out,
+                                         const uint16_t dim_im_out,
+                                         q15_t * bufferA,
                                          q7_t * bufferB);
 
   /**
@@ -180,7 +180,7 @@
    * @param[in]       dim_im_out_y output tensor dimension y
    * @param[in,out]   bufferA      pointer to buffer space for input
    * @param[in,out]   bufferB      pointer to buffer space for output
-   * @return     The function returns <code>ARM_MATH_SUCCESS</code> 
+   * @return     The function returns <code>ARM_MATH_SUCCESS</code>
    */
 
     arm_status arm_convolve_HWC_q7_basic_nonsquare(const q7_t * Im_in,
@@ -219,9 +219,9 @@
    * @param[in]       out_shift   amount of right-shift for output
    * @param[in,out]   Im_out      pointer to output tensor
    * @param[in]       dim_im_out  output tensor dimension
-   * @param[in,out]   bufferA     pointer to buffer space for input 
+   * @param[in,out]   bufferA     pointer to buffer space for input
    * @param[in,out]   bufferB     pointer to buffer space for output
-   * @return     The function returns <code>ARM_MATH_SUCCESS</code> 
+   * @return     The function returns <code>ARM_MATH_SUCCESS</code>
    *
    */
 
@@ -236,9 +236,9 @@
                                           const q15_t * bias,
                                           const uint16_t bias_shift,
                                           const uint16_t out_shift,
-                                          q15_t * Im_out, 
-                                          const uint16_t dim_im_out, 
-                                          q15_t * bufferA, 
+                                          q15_t * Im_out,
+                                          const uint16_t dim_im_out,
+                                          q15_t * bufferA,
                                           q7_t * bufferB);
 
   /**
@@ -256,7 +256,7 @@
    * @param[in]       out_shift   amount of right-shift for output
    * @param[in,out]   Im_out      pointer to output tensor
    * @param[in]       dim_im_out  output tensor dimension
-   * @param[in,out]   bufferA     pointer to buffer space for input 
+   * @param[in,out]   bufferA     pointer to buffer space for input
    * @param[in,out]   bufferB     pointer to buffer space for output
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
@@ -278,9 +278,9 @@
                                         const q7_t * bias,
                                         const uint16_t bias_shift,
                                         const uint16_t out_shift,
-                                        q7_t * Im_out, 
-                                        const uint16_t dim_im_out, 
-                                        q15_t * bufferA, 
+                                        q7_t * Im_out,
+                                        const uint16_t dim_im_out,
+                                        q15_t * bufferA,
                                         q7_t * bufferB);
 
   /**
@@ -303,7 +303,7 @@
    * @param[in,out]   Im_out       pointer to output tensor
    * @param[in]       dim_im_out_x output tensor dimension x
    * @param[in]       dim_im_out_y output tensor dimension y
-   * @param[in,out]   bufferA      pointer to buffer space for input 
+   * @param[in,out]   bufferA      pointer to buffer space for input
    * @param[in,out]   bufferB      pointer to buffer space for output
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
@@ -355,7 +355,7 @@
    * @param[in,out]   Im_out       pointer to output tensor
    * @param[in]       dim_im_out_x output tensor dimension x
    * @param[in]       dim_im_out_y output tensor dimension y
-   * @param[in,out]   bufferA      pointer to buffer space for input 
+   * @param[in,out]   bufferA      pointer to buffer space for input
    * @param[in,out]   bufferB      pointer to buffer space for output
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
@@ -405,7 +405,7 @@
    * @param[in]       out_shift   amount of right-shift for output
    * @param[in,out]   Im_out      pointer to output tensor
    * @param[in]       dim_im_out  output tensor dimension
-   * @param[in,out]   bufferA     pointer to buffer space for input 
+   * @param[in,out]   bufferA     pointer to buffer space for input
    * @param[in,out]   bufferB     pointer to buffer space for output
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
@@ -426,9 +426,9 @@
                                        const q7_t * bias,
                                        const uint16_t bias_shift,
                                        const uint16_t out_shift,
-                                       q7_t * Im_out, 
-                                       const uint16_t dim_im_out, 
-                                       q15_t * bufferA, 
+                                       q7_t * Im_out,
+                                       const uint16_t dim_im_out,
+                                       q15_t * bufferA,
                                        q7_t * bufferB);
 
   /**
@@ -446,7 +446,7 @@
    * @param[in]       out_shift   amount of right-shift for output
    * @param[in,out]   Im_out      pointer to output tensor
    * @param[in]       dim_im_out  output tensor dimension
-   * @param[in,out]   bufferA     pointer to buffer space for input 
+   * @param[in,out]   bufferA     pointer to buffer space for input
    * @param[in,out]   bufferB     pointer to buffer space for output
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
@@ -468,9 +468,9 @@
                                          const q15_t * bias,
                                          const uint16_t bias_shift,
                                          const uint16_t out_shift,
-                                         q15_t * Im_out, 
-                                         const uint16_t dim_im_out, 
-                                         q15_t * bufferA, 
+                                         q15_t * Im_out,
+                                         const uint16_t dim_im_out,
+                                         q15_t * bufferA,
                                          q7_t * bufferB);
 
   /**
@@ -493,7 +493,7 @@
    * @param[in,out]   Im_out       pointer to output tensor
    * @param[in]       dim_im_out_x output tensor dimension x
    * @param[in]       dim_im_out_y output tensor dimension y
-   * @param[in,out]   bufferA      pointer to buffer space for input 
+   * @param[in,out]   bufferA      pointer to buffer space for input
    * @param[in,out]   bufferB      pointer to buffer space for output
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
@@ -508,7 +508,7 @@
    *
    * <b>Input dimension constraints:</b>
    *
-   * ch_im_in is multiple of 2 
+   * ch_im_in is multiple of 2
    *
    * ch_im_out is multipe of 2
    *
@@ -532,10 +532,10 @@
                               const uint16_t out_shift,
                               q15_t * Im_out,
                               const uint16_t dim_im_out_x,
-                              const uint16_t dim_im_out_y, 
-                              q15_t * bufferA, 
+                              const uint16_t dim_im_out_y,
+                              q15_t * bufferA,
                               q7_t * bufferB);
-										 
+
   /**
    * @brief Q7 depthwise separable convolution function
    * @param[in]       Im_in       pointer to input tensor
@@ -551,7 +551,7 @@
    * @param[in]       out_shift   amount of right-shift for output
    * @param[in,out]   Im_out      pointer to output tensor
    * @param[in]       dim_im_out  output tensor dimension
-   * @param[in,out]   bufferA     pointer to buffer space for input 
+   * @param[in,out]   bufferA     pointer to buffer space for input
    * @param[in,out]   bufferB     pointer to buffer space for output
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
@@ -574,8 +574,8 @@
                                                    const uint16_t bias_shift,
                                                    const uint16_t out_shift,
                                                    q7_t * Im_out,
-                                                   const uint16_t dim_im_out, 
-                                                   q15_t * bufferA, 
+                                                   const uint16_t dim_im_out,
+                                                   q15_t * bufferA,
                                                    q7_t * bufferB);
 
   /**
@@ -598,7 +598,7 @@
    * @param[in,out]   Im_out        pointer to output tensor
    * @param[in]       dim_im_out_x  output tensor dimension x
    * @param[in]       dim_im_out_y  output tensor dimension y
-   * @param[in,out]   bufferA       pointer to buffer space for input 
+   * @param[in,out]   bufferA       pointer to buffer space for input
    * @param[in,out]   bufferB       pointer to buffer space for output
    * @return     The function returns either
    * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
@@ -642,7 +642,7 @@
  *
  * Here we have two types of kernel functions. The basic function
  * implements the function using regular GEMV approach. The opt functions
- * operates with weights in interleaved formats. 
+ * operates with weights in interleaved formats.
  *
  */
 
@@ -666,9 +666,9 @@
                                       const uint16_t dim_vec,
                                       const uint16_t num_of_rows,
                                       const uint16_t bias_shift,
-                                      const uint16_t out_shift, 
-                                      const q7_t * bias, 
-                                      q7_t * pOut, 
+                                      const uint16_t out_shift,
+                                      const q7_t * bias,
+                                      q7_t * pOut,
                                       q15_t * vec_buffer);
 
   /**
@@ -691,9 +691,9 @@
                                           const uint16_t dim_vec,
                                           const uint16_t num_of_rows,
                                           const uint16_t bias_shift,
-                                          const uint16_t out_shift, 
-                                          const q7_t * bias, 
-                                          q7_t * pOut, 
+                                          const uint16_t out_shift,
+                                          const q7_t * bias,
+                                          q7_t * pOut,
                                           q15_t * vec_buffer);
 
   /**
@@ -716,9 +716,9 @@
                                        const uint16_t dim_vec,
                                        const uint16_t num_of_rows,
                                        const uint16_t bias_shift,
-                                       const uint16_t out_shift, 
-                                       const q15_t * bias, 
-                                       q15_t * pOut, 
+                                       const uint16_t out_shift,
+                                       const q15_t * bias,
+                                       q15_t * pOut,
                                        q15_t * vec_buffer);
 
   /**
@@ -742,8 +742,8 @@
                                            const uint16_t num_of_rows,
                                            const uint16_t bias_shift,
                                            const uint16_t out_shift,
-                                           const q15_t * bias, 
-                                           q15_t * pOut, 
+                                           const q15_t * bias,
+                                           q15_t * pOut,
                                            q15_t * vec_buffer);
 
   /**
@@ -767,8 +767,8 @@
                                                   const uint16_t num_of_rows,
                                                   const uint16_t bias_shift,
                                                   const uint16_t out_shift,
-                                                  const q7_t * bias, 
-                                                  q15_t * pOut, 
+                                                  const q7_t * bias,
+                                                  q15_t * pOut,
                                                   q15_t * vec_buffer);
 
   /**
@@ -792,16 +792,16 @@
                                                       const uint16_t num_of_rows,
                                                       const uint16_t bias_shift,
                                                       const uint16_t out_shift,
-                                                      const q7_t * bias, 
-                                                      q15_t * pOut, 
+                                                      const q7_t * bias,
+                                                      q15_t * pOut,
                                                       q15_t * vec_buffer);
 
 /**
  * @brief Matrix-Multiplication Kernels for Convolution
  *
- * These functions are used within convolution layer functions for 
+ * These functions are used within convolution layer functions for
  * matrix multiplication.
- * 
+ *
  * The implementation is similar to CMSIS-DSP arm_mat_mult functions
  * with one Q7 and one Q15 operands. The Q15 operand is the im2col
  * output which is always with 2 columns.
@@ -826,8 +826,8 @@
                                             const uint16_t ch_im_out,
                                             const uint16_t numCol_A,
                                             const uint16_t bias_shift,
-                                            const uint16_t out_shift, 
-                                            const q7_t * bias, 
+                                            const uint16_t out_shift,
+                                            const q7_t * bias,
                                             q7_t * pOut);
 
   /**
@@ -848,8 +848,8 @@
                                                       const uint16_t ch_im_out,
                                                       const uint16_t numCol_A,
                                                       const uint16_t bias_shift,
-                                                      const uint16_t out_shift, 
-                                                      const q7_t * bias, 
+                                                      const uint16_t out_shift,
+                                                      const q7_t * bias,
                                                       q7_t * pOut);
 
 #ifdef __cplusplus
@@ -902,7 +902,7 @@
    * @return none.
    */
 
-    void      arm_nn_activations_direct_q7(q7_t * data, uint16_t size, uint16_t int_width, 
+    void      arm_nn_activations_direct_q7(q7_t * data, uint16_t size, uint16_t int_width,
                                            arm_nn_activation_type type);
 
   /**
@@ -944,9 +944,9 @@
                                  const uint16_t ch_im_in,
                                  const uint16_t dim_kernel,
                                  const uint16_t padding,
-                                 const uint16_t stride, 
-                                 const uint16_t dim_im_out, 
-                                 q7_t * bufferA, 
+                                 const uint16_t stride,
+                                 const uint16_t dim_im_out,
+                                 q7_t * bufferA,
                                  q7_t * Im_out);
 
   /**
@@ -969,9 +969,9 @@
                                  const uint16_t ch_im_in,
                                  const uint16_t dim_kernel,
                                  const uint16_t padding,
-                                 const uint16_t stride, 
-                                 const uint16_t dim_im_out, 
-                                 q7_t * bufferA, 
+                                 const uint16_t stride,
+                                 const uint16_t dim_im_out,
+                                 q7_t * bufferA,
                                  q7_t * Im_out);
 
 /**
@@ -1003,6 +1003,71 @@
 
     void      arm_softmax_q15(const q15_t * vec_in, const uint16_t dim_vec, q15_t * p_out);
 
+  /**
+   * @brief uint8 depthwise convolution function with asymmetric quantization for even number of channel multiplier
+   *        and input channels. Unless specified otherwise, arguments are mandatory.
+   *
+   * @param[in]     input     Pointer to input tensor
+   * @param[in]     input_x   Width of input tensor
+   * @param[in]     input_y   Height of input tensor
+   * @param[in]     input_ch  Channels in input tensor
+   * @param[in]     kernel    Pointer to kernel weights
+   * @param[in]     kernel_x  Width of kernel
+   * @param[in]     kernel_y  Height of kernel
+   * @param[in]     ch_mult   Number of channel multiplier
+   * @param[in]     pad_x     Padding sizes x
+   * @param[in]     pad_y     Padding sizes y
+   * @param[in]     stride_x  Convolution stride along the width
+   * @param[in]     stride_y  Convolution stride along the height
+   * @param[in]     dilation_x Dilation along width. Not used and intended for future enhancement.
+   * @param[in]     dilation_y Dilation along height. Not used and intended for future enhancement.
+   * @param[in]     bias       Pointer to optional bias values. If no bias is
+   *                           availble, NULL is expected
+   * @param[in]     input_offset  Input tensor zero offset
+   * @param[in]     filter_offset Kernel tensor zero offset
+   * @param[in]     output_offset Output tensor zero offset
+   * @param[in,out] output        Pointer to output tensor
+   * @param[in]     output_x  Width of output tensor
+   * @param[in]     output_y  Height of output tensor
+   * @param[in]     output_activation_min   Minimum value to clamp the output to. Range : {0, 255}
+   * @param[in]     output_activation_max   Minimum value to clamp the output to. Range : {0, 255}
+   * @param[in]     out_shift  Amount of right-shift for output
+   * @param[in]     out_mult   Output multiplier for requantization
+   * @return        The function returns one of the following
+   *                <code>ARM_MATH_SIZE_MISMATCH</code> - Not supported dimension of tensors
+   *                <code>ARM_MATH_SUCCESS</code> - Successful operation
+   *                <code>ARM_MATH_ARGUMENT_ERROR</code> - Implementation not available
+   *
+   * <b> Input constraints</b>
+   * ch_mult  is multiple of 2
+   * kernel_x is multiple of 2
+   *
+   */
+    arm_status arm_depthwise_conv_u8_basic_ver1(const uint8_t *input,
+                                                const uint16_t input_x,
+                                                const uint16_t input_y,
+                                                const uint16_t input_ch,
+                                                const uint8_t *kernel,
+                                                const uint16_t kernel_x,
+                                                const uint16_t kernel_y,
+                                                const int16_t ch_mult,
+                                                const int16_t pad_x,
+                                                const int16_t pad_y,
+                                                const int16_t stride_x,
+                                                const int16_t stride_y,
+                                                const int16_t dilation_x,
+                                                const int16_t dilation_y,
+                                                const int32_t *bias,
+                                                const int32_t input_offset,
+                                                const int32_t filter_offset,
+                                                const int32_t output_offset,
+                                                uint8_t *output,
+                                                const uint16_t output_x,
+                                                const uint16_t output_y,
+                                                const int32_t output_activation_min,
+                                                const int32_t output_activation_max,
+                                                const int32_t out_shift,
+                                                const int32_t out_mult);
 #ifdef __cplusplus
 }
 #endif
diff --git a/NN/Include/arm_nnsupportfunctions.h b/NN/Include/arm_nnsupportfunctions.h
index 8460190..af426e1 100644
--- a/NN/Include/arm_nnsupportfunctions.h
+++ b/NN/Include/arm_nnsupportfunctions.h
@@ -32,13 +32,17 @@
 
 #include "arm_math.h"
 #include "arm_common_tables.h"
-//#include <cstring>
 
 #ifdef __cplusplus
 extern    "C"
 {
 #endif
 
+#define LEFT_SHIFT(_shift)  (_shift > 0 ? _shift : 0)
+#define RIGHT_SHIFT(_shift) (_shift > 0 ? 0 : -_shift)
+#define Q31_MIN (0x80000000L)
+#define Q31_MAX (0x7FFFFFFFL)
+
 /**
  * @brief Union for SIMD access of Q31/Q15/Q7 types
  */
@@ -72,11 +76,11 @@
  */
 
 /**
- * @brief Converts the elements of the Q7 vector to Q15 vector without left-shift 
- * @param[in]       *pSrc points to the Q7 input vector    
- * @param[out]      *pDst points to the Q15 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
+ * @brief Converts the elements of the Q7 vector to Q15 vector without left-shift
+ * @param[in]       *pSrc points to the Q7 input vector
+ * @param[out]      *pDst points to the Q15 output vector
+ * @param[in]       blockSize length of the input vector
+ * @return none.
  *
  */
 
@@ -84,10 +88,10 @@
 
 /**
  * @brief  Converts the elements of the Q7 vector to reordered Q15 vector without left-shift
- * @param[in]       *pSrc points to the Q7 input vector    
- * @param[out]      *pDst points to the Q15 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
+ * @param[in]       *pSrc points to the Q7 input vector
+ * @param[out]      *pDst points to the Q15 output vector
+ * @param[in]       blockSize length of the input vector
+ * @return none.
  *
  */
 
@@ -163,7 +167,7 @@
   q15_t * pDst,
   const uint16_t out_shift,
   uint32_t blockSize);
-  
+
 /**
  * @brief           Q7 vector multiplication with variable output shifts
  * @param[in]       *pSrcA        pointer to the first input vector
@@ -185,16 +189,79 @@
   q7_t * pDst,
   const uint16_t out_shift,
   uint32_t blockSize);
- 
+
 /**
- * @brief defition to adding rouding offset
+ * @brief macro for adding rounding offset
  */
 #ifndef ARM_NN_TRUNCATE
-    #define NN_ROUND(out_shift) ( 0x1 << (out_shift - 1) )
+    #define NN_ROUND(out_shift) ( (0x1u << out_shift) >> 1 )
 #else
     #define NN_ROUND(out_shift) 0
 #endif
 
+/**
+ * @brief           Saturating doubling high multiply. Result matches
+ *                  NEON instruction VQRDMULH.
+ * @param[in]       m1        Multiplicand
+ * @param[in]       m2        Multiplier
+ * @return          Result of multiplication.
+ *
+ */
+__STATIC_FORCEINLINE q31_t arm_nn_sat_doubling_high_mult(const q31_t m1, const q31_t m2)
+{
+    q31_t result = 0;
+    // Rounding offset to add for a right shift of 31
+    q63_t mult = 1 << 30;
+
+    if ((m1 < 0) ^ (m2 < 0))
+    {
+        mult = 1 - mult;
+    }
+    // Gets resolved as a SMLAL instruction
+    mult = mult + (q63_t)m1 * m2;
+
+    // Utilize all of the upper 32 bits. This is the doubling step
+    // as well.
+    result = mult / (1UL << 31);
+
+    if ((m1 == m2) && (m1 == Q31_MIN))
+    {
+        result = Q31_MAX;
+    }
+    return result;
+}
+
+/**
+ * @brief           Rounding divide by power of two.
+ * @param[in]       dividend - Dividend
+ * @param[in]       exponent - Divisor = power(2, exponent)
+ *                             Range: [0, 31]
+ * @return          Rounded result of division. Midpoint is rounded away from zero.
+ *
+ */
+__STATIC_FORCEINLINE q31_t arm_nn_divide_by_power_of_two(const q31_t dividend, const q31_t exponent)
+{
+    q31_t result = 0;
+    const q31_t remainder_mask = (1l << exponent) - 1;
+    int32_t remainder = remainder_mask & dividend;
+
+    // Basic division
+    result = dividend >> exponent;
+
+    // Adjust 'result' for rounding (mid point away from zero)
+    q31_t threshold = remainder_mask >> 1;
+    if (result < 0)
+    {
+        threshold++;
+    }
+    if (remainder > threshold)
+    {
+        result++;
+    }
+
+    return result;
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM0/startup_ARMCM0.s b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM0/startup_ARMCM0.s
new file mode 100644
index 0000000..9fc447d
--- /dev/null
+++ b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM0/startup_ARMCM0.s
@@ -0,0 +1,242 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM0.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM0 Device Series
+; * @version  V5.00
+; * @date     02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size      EQU     0x00000400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size       EQU     0x00000C00
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp              ; Top of Stack
+                DCD     Reset_Handler             ; Reset Handler
+                DCD     NMI_Handler               ; NMI Handler
+                DCD     HardFault_Handler         ; Hard Fault Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     SVC_Handler               ; SVCall Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     PendSV_Handler            ; PendSV Handler
+                DCD     SysTick_Handler           ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WDT_IRQHandler            ;  0:  Watchdog Timer
+                DCD     RTC_IRQHandler            ;  1:  Real Time Clock
+                DCD     TIM0_IRQHandler           ;  2:  Timer0 / Timer1
+                DCD     TIM2_IRQHandler           ;  3:  Timer2 / Timer3
+                DCD     MCIA_IRQHandler           ;  4:  MCIa
+                DCD     MCIB_IRQHandler           ;  5:  MCIb
+                DCD     UART0_IRQHandler          ;  6:  UART0 - DUT FPGA
+                DCD     UART1_IRQHandler          ;  7:  UART1 - DUT FPGA
+                DCD     UART2_IRQHandler          ;  8:  UART2 - DUT FPGA
+                DCD     UART4_IRQHandler          ;  9:  UART4 - not connected
+                DCD     AACI_IRQHandler           ; 10: AACI / AC97
+                DCD     CLCD_IRQHandler           ; 11: CLCD Combined Interrupt
+                DCD     ENET_IRQHandler           ; 12: Ethernet
+                DCD     USBDC_IRQHandler          ; 13: USB Device
+                DCD     USBHC_IRQHandler          ; 14: USB Host Controller
+                DCD     CHLCD_IRQHandler          ; 15: Character LCD
+                DCD     FLEXRAY_IRQHandler        ; 16: Flexray
+                DCD     CAN_IRQHandler            ; 17: CAN
+                DCD     LIN_IRQHandler            ; 18: LIN
+                DCD     I2C_IRQHandler            ; 19: I2C ADC/DAC
+                DCD     0                         ; 20: Reserved
+                DCD     0                         ; 21: Reserved
+                DCD     0                         ; 22: Reserved
+                DCD     0                         ; 23: Reserved
+                DCD     0                         ; 24: Reserved
+                DCD     0                         ; 25: Reserved
+                DCD     0                         ; 26: Reserved
+                DCD     0                         ; 27: Reserved
+                DCD     CPU_CLCD_IRQHandler       ; 28: Reserved - CPU FPGA CLCD
+                DCD     0                         ; 29: Reserved - CPU FPGA
+                DCD     UART3_IRQHandler          ; 30: UART3    - CPU FPGA
+                DCD     SPI_IRQHandler            ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size  EQU     __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT  Reset_Handler             [WEAK]
+                IMPORT  SystemInit
+                IMPORT  __main
+                LDR     R0, =SystemInit
+                BLX     R0
+                LDR     R0, =__main
+                BX      R0
+                ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler               [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler               [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler            [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler           [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  WDT_IRQHandler            [WEAK]
+                EXPORT  RTC_IRQHandler            [WEAK]
+                EXPORT  TIM0_IRQHandler           [WEAK]
+                EXPORT  TIM2_IRQHandler           [WEAK]
+                EXPORT  MCIA_IRQHandler           [WEAK]
+                EXPORT  MCIB_IRQHandler           [WEAK]
+                EXPORT  UART0_IRQHandler          [WEAK]
+                EXPORT  UART1_IRQHandler          [WEAK]
+                EXPORT  UART2_IRQHandler          [WEAK]
+                EXPORT  UART3_IRQHandler          [WEAK]
+                EXPORT  UART4_IRQHandler          [WEAK]
+                EXPORT  AACI_IRQHandler           [WEAK]
+                EXPORT  CLCD_IRQHandler           [WEAK]
+                EXPORT  ENET_IRQHandler           [WEAK]
+                EXPORT  USBDC_IRQHandler          [WEAK]
+                EXPORT  USBHC_IRQHandler          [WEAK]
+                EXPORT  CHLCD_IRQHandler          [WEAK]
+                EXPORT  FLEXRAY_IRQHandler        [WEAK]
+                EXPORT  CAN_IRQHandler            [WEAK]
+                EXPORT  LIN_IRQHandler            [WEAK]
+                EXPORT  I2C_IRQHandler            [WEAK]
+                EXPORT  CPU_CLCD_IRQHandler       [WEAK]
+                EXPORT  SPI_IRQHandler            [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+                B       .
+
+                ENDP
+
+
+                ALIGN
+
+
+; User Initial Stack & Heap
+
+                IF      :DEF:__MICROLIB
+
+                EXPORT  __initial_sp
+                EXPORT  __heap_base
+                EXPORT  __heap_limit
+
+                ELSE
+
+                IMPORT  __use_two_region_memory
+                EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap PROC
+                LDR     R0, =  Heap_Mem
+                LDR     R1, =(Stack_Mem + Stack_Size)
+                LDR     R2, = (Heap_Mem +  Heap_Size)
+                LDR     R3, = Stack_Mem
+                BX      LR
+                ENDP
+
+                ALIGN
+
+                ENDIF
+
+
+                END
diff --git a/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM0/system_ARMCM0.c b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM0/system_ARMCM0.c
new file mode 100644
index 0000000..66829ad
--- /dev/null
+++ b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM0/system_ARMCM0.c
@@ -0,0 +1,56 @@
+/**************************************************************************//**
+ * @file     system_ARMCM0.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM0 Device Series
+ * @version  V5.00
+ * @date     08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM0.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            ( 5000000U)      /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM3/startup_ARMCM3.s b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM3/startup_ARMCM3.s
new file mode 100644
index 0000000..e3ea17f
--- /dev/null
+++ b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM3/startup_ARMCM3.s
@@ -0,0 +1,262 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM3.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM3 Device Series
+; * @version  V5.00
+; * @date     02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size      EQU     0x00000400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size       EQU     0x00080000
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp              ; Top of Stack
+                DCD     Reset_Handler             ; Reset Handler
+                DCD     NMI_Handler               ; NMI Handler
+                DCD     HardFault_Handler         ; Hard Fault Handler
+                DCD     MemManage_Handler         ; MPU Fault Handler
+                DCD     BusFault_Handler          ; Bus Fault Handler
+                DCD     UsageFault_Handler        ; Usage Fault Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     SVC_Handler               ; SVCall Handler
+                DCD     DebugMon_Handler          ; Debug Monitor Handler
+                DCD     0                         ; Reserved
+                DCD     PendSV_Handler            ; PendSV Handler
+                DCD     SysTick_Handler           ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WDT_IRQHandler            ;  0:  Watchdog Timer
+                DCD     RTC_IRQHandler            ;  1:  Real Time Clock
+                DCD     TIM0_IRQHandler           ;  2:  Timer0 / Timer1
+                DCD     TIM2_IRQHandler           ;  3:  Timer2 / Timer3
+                DCD     MCIA_IRQHandler           ;  4:  MCIa
+                DCD     MCIB_IRQHandler           ;  5:  MCIb
+                DCD     UART0_IRQHandler          ;  6:  UART0 - DUT FPGA
+                DCD     UART1_IRQHandler          ;  7:  UART1 - DUT FPGA
+                DCD     UART2_IRQHandler          ;  8:  UART2 - DUT FPGA
+                DCD     UART4_IRQHandler          ;  9:  UART4 - not connected
+                DCD     AACI_IRQHandler           ; 10: AACI / AC97
+                DCD     CLCD_IRQHandler           ; 11: CLCD Combined Interrupt
+                DCD     ENET_IRQHandler           ; 12: Ethernet
+                DCD     USBDC_IRQHandler          ; 13: USB Device
+                DCD     USBHC_IRQHandler          ; 14: USB Host Controller
+                DCD     CHLCD_IRQHandler          ; 15: Character LCD
+                DCD     FLEXRAY_IRQHandler        ; 16: Flexray
+                DCD     CAN_IRQHandler            ; 17: CAN
+                DCD     LIN_IRQHandler            ; 18: LIN
+                DCD     I2C_IRQHandler            ; 19: I2C ADC/DAC
+                DCD     0                         ; 20: Reserved
+                DCD     0                         ; 21: Reserved
+                DCD     0                         ; 22: Reserved
+                DCD     0                         ; 23: Reserved
+                DCD     0                         ; 24: Reserved
+                DCD     0                         ; 25: Reserved
+                DCD     0                         ; 26: Reserved
+                DCD     0                         ; 27: Reserved
+                DCD     CPU_CLCD_IRQHandler       ; 28: Reserved - CPU FPGA CLCD
+                DCD     0                         ; 29: Reserved - CPU FPGA
+                DCD     UART3_IRQHandler          ; 30: UART3    - CPU FPGA
+                DCD     SPI_IRQHandler            ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size  EQU     __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT  Reset_Handler             [WEAK]
+                IMPORT  SystemInit
+                IMPORT  __main
+                LDR     R0, =SystemInit
+                BLX     R0
+                LDR     R0, =__main
+                BX      R0
+                ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler               [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler         [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler         [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler          [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler        [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler               [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler          [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler            [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler           [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  WDT_IRQHandler            [WEAK]
+                EXPORT  RTC_IRQHandler            [WEAK]
+                EXPORT  TIM0_IRQHandler           [WEAK]
+                EXPORT  TIM2_IRQHandler           [WEAK]
+                EXPORT  MCIA_IRQHandler           [WEAK]
+                EXPORT  MCIB_IRQHandler           [WEAK]
+                EXPORT  UART0_IRQHandler          [WEAK]
+                EXPORT  UART1_IRQHandler          [WEAK]
+                EXPORT  UART2_IRQHandler          [WEAK]
+                EXPORT  UART3_IRQHandler          [WEAK]
+                EXPORT  UART4_IRQHandler          [WEAK]
+                EXPORT  AACI_IRQHandler           [WEAK]
+                EXPORT  CLCD_IRQHandler           [WEAK]
+                EXPORT  ENET_IRQHandler           [WEAK]
+                EXPORT  USBDC_IRQHandler          [WEAK]
+                EXPORT  USBHC_IRQHandler          [WEAK]
+                EXPORT  CHLCD_IRQHandler          [WEAK]
+                EXPORT  FLEXRAY_IRQHandler        [WEAK]
+                EXPORT  CAN_IRQHandler            [WEAK]
+                EXPORT  LIN_IRQHandler            [WEAK]
+                EXPORT  I2C_IRQHandler            [WEAK]
+                EXPORT  CPU_CLCD_IRQHandler       [WEAK]
+                EXPORT  SPI_IRQHandler            [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+                B       .
+
+                ENDP
+
+
+                ALIGN
+
+
+; User Initial Stack & Heap
+
+                IF      :DEF:__MICROLIB
+
+                EXPORT  __initial_sp
+                EXPORT  __heap_base
+                EXPORT  __heap_limit
+
+                ELSE
+
+                IMPORT  __use_two_region_memory
+                EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap PROC
+                LDR     R0, =  Heap_Mem
+                LDR     R1, =(Stack_Mem + Stack_Size)
+                LDR     R2, = (Heap_Mem +  Heap_Size)
+                LDR     R3, = Stack_Mem
+                BX      LR
+                ENDP
+
+                ALIGN
+
+                ENDIF
+
+
+                END
diff --git a/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM3/system_ARMCM3.c b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM3/system_ARMCM3.c
new file mode 100644
index 0000000..f08df7a
--- /dev/null
+++ b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM3/system_ARMCM3.c
@@ -0,0 +1,68 @@
+/**************************************************************************//**
+ * @file     system_ARMCM3.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM3 Device Series
+ * @version  V5.00
+ * @date     08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ARMCM3.h"
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            ( 5000000U)      /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4/startup_ARMCM4.s b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4/startup_ARMCM4.s
new file mode 100644
index 0000000..dae6439
--- /dev/null
+++ b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4/startup_ARMCM4.s
@@ -0,0 +1,262 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM4.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM4 Device Series
+; * @version  V5.00
+; * @date     02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size      EQU     0x00000400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size       EQU     0x00000C00
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp              ; Top of Stack
+                DCD     Reset_Handler             ; Reset Handler
+                DCD     NMI_Handler               ; NMI Handler
+                DCD     HardFault_Handler         ; Hard Fault Handler
+                DCD     MemManage_Handler         ; MPU Fault Handler
+                DCD     BusFault_Handler          ; Bus Fault Handler
+                DCD     UsageFault_Handler        ; Usage Fault Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     SVC_Handler               ; SVCall Handler
+                DCD     DebugMon_Handler          ; Debug Monitor Handler
+                DCD     0                         ; Reserved
+                DCD     PendSV_Handler            ; PendSV Handler
+                DCD     SysTick_Handler           ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WDT_IRQHandler            ;  0:  Watchdog Timer
+                DCD     RTC_IRQHandler            ;  1:  Real Time Clock
+                DCD     TIM0_IRQHandler           ;  2:  Timer0 / Timer1
+                DCD     TIM2_IRQHandler           ;  3:  Timer2 / Timer3
+                DCD     MCIA_IRQHandler           ;  4:  MCIa
+                DCD     MCIB_IRQHandler           ;  5:  MCIb
+                DCD     UART0_IRQHandler          ;  6:  UART0 - DUT FPGA
+                DCD     UART1_IRQHandler          ;  7:  UART1 - DUT FPGA
+                DCD     UART2_IRQHandler          ;  8:  UART2 - DUT FPGA
+                DCD     UART4_IRQHandler          ;  9:  UART4 - not connected
+                DCD     AACI_IRQHandler           ; 10: AACI / AC97
+                DCD     CLCD_IRQHandler           ; 11: CLCD Combined Interrupt
+                DCD     ENET_IRQHandler           ; 12: Ethernet
+                DCD     USBDC_IRQHandler          ; 13: USB Device
+                DCD     USBHC_IRQHandler          ; 14: USB Host Controller
+                DCD     CHLCD_IRQHandler          ; 15: Character LCD
+                DCD     FLEXRAY_IRQHandler        ; 16: Flexray
+                DCD     CAN_IRQHandler            ; 17: CAN
+                DCD     LIN_IRQHandler            ; 18: LIN
+                DCD     I2C_IRQHandler            ; 19: I2C ADC/DAC
+                DCD     0                         ; 20: Reserved
+                DCD     0                         ; 21: Reserved
+                DCD     0                         ; 22: Reserved
+                DCD     0                         ; 23: Reserved
+                DCD     0                         ; 24: Reserved
+                DCD     0                         ; 25: Reserved
+                DCD     0                         ; 26: Reserved
+                DCD     0                         ; 27: Reserved
+                DCD     CPU_CLCD_IRQHandler       ; 28: Reserved - CPU FPGA CLCD
+                DCD     0                         ; 29: Reserved - CPU FPGA
+                DCD     UART3_IRQHandler          ; 30: UART3    - CPU FPGA
+                DCD     SPI_IRQHandler            ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size  EQU     __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT  Reset_Handler             [WEAK]
+                IMPORT  SystemInit
+                IMPORT  __main
+                LDR     R0, =SystemInit
+                BLX     R0
+                LDR     R0, =__main
+                BX      R0
+                ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler               [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler         [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler         [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler          [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler        [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler               [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler          [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler            [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler           [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  WDT_IRQHandler            [WEAK]
+                EXPORT  RTC_IRQHandler            [WEAK]
+                EXPORT  TIM0_IRQHandler           [WEAK]
+                EXPORT  TIM2_IRQHandler           [WEAK]
+                EXPORT  MCIA_IRQHandler           [WEAK]
+                EXPORT  MCIB_IRQHandler           [WEAK]
+                EXPORT  UART0_IRQHandler          [WEAK]
+                EXPORT  UART1_IRQHandler          [WEAK]
+                EXPORT  UART2_IRQHandler          [WEAK]
+                EXPORT  UART3_IRQHandler          [WEAK]
+                EXPORT  UART4_IRQHandler          [WEAK]
+                EXPORT  AACI_IRQHandler           [WEAK]
+                EXPORT  CLCD_IRQHandler           [WEAK]
+                EXPORT  ENET_IRQHandler           [WEAK]
+                EXPORT  USBDC_IRQHandler          [WEAK]
+                EXPORT  USBHC_IRQHandler          [WEAK]
+                EXPORT  CHLCD_IRQHandler          [WEAK]
+                EXPORT  FLEXRAY_IRQHandler        [WEAK]
+                EXPORT  CAN_IRQHandler            [WEAK]
+                EXPORT  LIN_IRQHandler            [WEAK]
+                EXPORT  I2C_IRQHandler            [WEAK]
+                EXPORT  CPU_CLCD_IRQHandler       [WEAK]
+                EXPORT  SPI_IRQHandler            [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+                B       .
+
+                ENDP
+
+
+                ALIGN
+
+
+; User Initial Stack & Heap
+
+                IF      :DEF:__MICROLIB
+
+                EXPORT  __initial_sp
+                EXPORT  __heap_base
+                EXPORT  __heap_limit
+
+                ELSE
+
+                IMPORT  __use_two_region_memory
+                EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap PROC
+                LDR     R0, =  Heap_Mem
+                LDR     R1, =(Stack_Mem + Stack_Size)
+                LDR     R2, = (Heap_Mem +  Heap_Size)
+                LDR     R3, = Stack_Mem
+                BX      LR
+                ENDP
+
+                ALIGN
+
+                ENDIF
+
+
+                END
diff --git a/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4/system_ARMCM4.c b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4/system_ARMCM4.c
new file mode 100644
index 0000000..af23005
--- /dev/null
+++ b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4/system_ARMCM4.c
@@ -0,0 +1,83 @@
+/**************************************************************************//**
+ * @file     system_ARMCM4.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM4 Device Series
+ * @version  V5.00
+ * @date     07. September 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM4)
+  #include "ARMCM4.h"
+#elif defined (ARMCM4_FP)
+  #include "ARMCM4_FP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            ( 5000000UL)      /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (5U * XTAL)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+  SCB->CPACR |= ((3U << 10U*2U) |           /* set CP10 Full Access */
+                 (3U << 11U*2U)  );         /* set CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4_FP/startup_ARMCM4.s b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
new file mode 100644
index 0000000..116c5cb
--- /dev/null
+++ b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4_FP/startup_ARMCM4.s
@@ -0,0 +1,262 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM4.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM4 Device Series
+; * @version  V5.00
+; * @date     02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size      EQU     0x00004000
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size       EQU     0x00100000
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp              ; Top of Stack
+                DCD     Reset_Handler             ; Reset Handler
+                DCD     NMI_Handler               ; NMI Handler
+                DCD     HardFault_Handler         ; Hard Fault Handler
+                DCD     MemManage_Handler         ; MPU Fault Handler
+                DCD     BusFault_Handler          ; Bus Fault Handler
+                DCD     UsageFault_Handler        ; Usage Fault Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     SVC_Handler               ; SVCall Handler
+                DCD     DebugMon_Handler          ; Debug Monitor Handler
+                DCD     0                         ; Reserved
+                DCD     PendSV_Handler            ; PendSV Handler
+                DCD     SysTick_Handler           ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WDT_IRQHandler            ;  0:  Watchdog Timer
+                DCD     RTC_IRQHandler            ;  1:  Real Time Clock
+                DCD     TIM0_IRQHandler           ;  2:  Timer0 / Timer1
+                DCD     TIM2_IRQHandler           ;  3:  Timer2 / Timer3
+                DCD     MCIA_IRQHandler           ;  4:  MCIa
+                DCD     MCIB_IRQHandler           ;  5:  MCIb
+                DCD     UART0_IRQHandler          ;  6:  UART0 - DUT FPGA
+                DCD     UART1_IRQHandler          ;  7:  UART1 - DUT FPGA
+                DCD     UART2_IRQHandler          ;  8:  UART2 - DUT FPGA
+                DCD     UART4_IRQHandler          ;  9:  UART4 - not connected
+                DCD     AACI_IRQHandler           ; 10: AACI / AC97
+                DCD     CLCD_IRQHandler           ; 11: CLCD Combined Interrupt
+                DCD     ENET_IRQHandler           ; 12: Ethernet
+                DCD     USBDC_IRQHandler          ; 13: USB Device
+                DCD     USBHC_IRQHandler          ; 14: USB Host Controller
+                DCD     CHLCD_IRQHandler          ; 15: Character LCD
+                DCD     FLEXRAY_IRQHandler        ; 16: Flexray
+                DCD     CAN_IRQHandler            ; 17: CAN
+                DCD     LIN_IRQHandler            ; 18: LIN
+                DCD     I2C_IRQHandler            ; 19: I2C ADC/DAC
+                DCD     0                         ; 20: Reserved
+                DCD     0                         ; 21: Reserved
+                DCD     0                         ; 22: Reserved
+                DCD     0                         ; 23: Reserved
+                DCD     0                         ; 24: Reserved
+                DCD     0                         ; 25: Reserved
+                DCD     0                         ; 26: Reserved
+                DCD     0                         ; 27: Reserved
+                DCD     CPU_CLCD_IRQHandler       ; 28: Reserved - CPU FPGA CLCD
+                DCD     0                         ; 29: Reserved - CPU FPGA
+                DCD     UART3_IRQHandler          ; 30: UART3    - CPU FPGA
+                DCD     SPI_IRQHandler            ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size  EQU     __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT  Reset_Handler             [WEAK]
+                IMPORT  SystemInit
+                IMPORT  __main
+                LDR     R0, =SystemInit
+                BLX     R0
+                LDR     R0, =__main
+                BX      R0
+                ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler               [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler         [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler         [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler          [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler        [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler               [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler          [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler            [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler           [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  WDT_IRQHandler            [WEAK]
+                EXPORT  RTC_IRQHandler            [WEAK]
+                EXPORT  TIM0_IRQHandler           [WEAK]
+                EXPORT  TIM2_IRQHandler           [WEAK]
+                EXPORT  MCIA_IRQHandler           [WEAK]
+                EXPORT  MCIB_IRQHandler           [WEAK]
+                EXPORT  UART0_IRQHandler          [WEAK]
+                EXPORT  UART1_IRQHandler          [WEAK]
+                EXPORT  UART2_IRQHandler          [WEAK]
+                EXPORT  UART3_IRQHandler          [WEAK]
+                EXPORT  UART4_IRQHandler          [WEAK]
+                EXPORT  AACI_IRQHandler           [WEAK]
+                EXPORT  CLCD_IRQHandler           [WEAK]
+                EXPORT  ENET_IRQHandler           [WEAK]
+                EXPORT  USBDC_IRQHandler          [WEAK]
+                EXPORT  USBHC_IRQHandler          [WEAK]
+                EXPORT  CHLCD_IRQHandler          [WEAK]
+                EXPORT  FLEXRAY_IRQHandler        [WEAK]
+                EXPORT  CAN_IRQHandler            [WEAK]
+                EXPORT  LIN_IRQHandler            [WEAK]
+                EXPORT  I2C_IRQHandler            [WEAK]
+                EXPORT  CPU_CLCD_IRQHandler       [WEAK]
+                EXPORT  SPI_IRQHandler            [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+                B       .
+
+                ENDP
+
+
+                ALIGN
+
+
+; User Initial Stack & Heap
+
+                IF      :DEF:__MICROLIB
+
+                EXPORT  __initial_sp
+                EXPORT  __heap_base
+                EXPORT  __heap_limit
+
+                ELSE
+
+                IMPORT  __use_two_region_memory
+                EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap PROC
+                LDR     R0, =  Heap_Mem
+                LDR     R1, =(Stack_Mem + Stack_Size)
+                LDR     R2, = (Heap_Mem +  Heap_Size)
+                LDR     R3, = Stack_Mem
+                BX      LR
+                ENDP
+
+                ALIGN
+
+                ENDIF
+
+
+                END
diff --git a/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4_FP/system_ARMCM4.c b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4_FP/system_ARMCM4.c
new file mode 100644
index 0000000..070fa1e
--- /dev/null
+++ b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM4_FP/system_ARMCM4.c
@@ -0,0 +1,83 @@
+/**************************************************************************//**
+ * @file     system_ARMCM4.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM4 Device Series
+ * @version  V5.00
+ * @date     08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM4)
+  #include "ARMCM4.h"
+#elif defined (ARMCM4_FP)
+  #include "ARMCM4_FP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            ( 5000000U)      /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1)
+  SCB->CPACR |= ((3U << 10*2) |           /* set CP10 Full Access */
+                 (3U << 11*2)  );         /* set CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/gcc_arm.ld b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/gcc_arm.ld
new file mode 100644
index 0000000..b987fd1
--- /dev/null
+++ b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/gcc_arm.ld
@@ -0,0 +1,196 @@
+/* Linker script to configure memory regions. */
+MEMORY
+{
+  FLASH (rx)  : ORIGIN = 0x00000000, LENGTH = 512K
+  RAM   (rwx) : ORIGIN = 0x20000000, LENGTH = 256K
+}
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __copy_table_start__
+ *   __copy_table_end__
+ *   __zero_table_start__
+ *   __zero_table_end__
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapBase
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ *   __Vectors_End
+ *   __Vectors_Size
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+	.text :
+	{
+		KEEP(*(.vectors))
+		__Vectors_End = .;
+		__Vectors_Size = __Vectors_End - __Vectors;
+		__end__ = .;
+
+		*(.text*)
+
+		KEEP(*(.init))
+		KEEP(*(.fini))
+
+		/* .ctors */
+		*crtbegin.o(.ctors)
+		*crtbegin?.o(.ctors)
+		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+		*(SORT(.ctors.*))
+		*(.ctors)
+
+		/* .dtors */
+ 		*crtbegin.o(.dtors)
+ 		*crtbegin?.o(.dtors)
+ 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ 		*(SORT(.dtors.*))
+ 		*(.dtors)
+
+		*(.rodata*)
+
+		KEEP(*(.eh_frame*))
+	} > FLASH
+
+	.ARM.extab :
+	{
+		*(.ARM.extab* .gnu.linkonce.armextab.*)
+	} > FLASH
+
+	__exidx_start = .;
+	.ARM.exidx :
+	{
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
+	} > FLASH
+	__exidx_end = .;
+
+	/* To copy multiple ROM to RAM sections,
+	 * uncomment .copy.table section and,
+	 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.copy.table :
+	{
+		. = ALIGN(4);
+		__copy_table_start__ = .;
+		LONG (__etext)
+		LONG (__data_start__)
+		LONG (__data_end__ - __data_start__)
+		LONG (__etext2)
+		LONG (__data2_start__)
+		LONG (__data2_end__ - __data2_start__)
+		__copy_table_end__ = .;
+	} > FLASH
+	*/
+
+	/* To clear multiple BSS sections,
+	 * uncomment .zero.table section and,
+	 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.zero.table :
+	{
+		. = ALIGN(4);
+		__zero_table_start__ = .;
+		LONG (__bss_start__)
+		LONG (__bss_end__ - __bss_start__)
+		LONG (__bss2_start__)
+		LONG (__bss2_end__ - __bss2_start__)
+		__zero_table_end__ = .;
+	} > FLASH
+	*/
+
+	__etext = .;
+
+	.data : AT (__etext)
+	{
+		__data_start__ = .;
+		*(vtable)
+		*(.data*)
+
+		. = ALIGN(4);
+		/* preinit data */
+		PROVIDE_HIDDEN (__preinit_array_start = .);
+		KEEP(*(.preinit_array))
+		PROVIDE_HIDDEN (__preinit_array_end = .);
+
+		. = ALIGN(4);
+		/* init data */
+		PROVIDE_HIDDEN (__init_array_start = .);
+		KEEP(*(SORT(.init_array.*)))
+		KEEP(*(.init_array))
+		PROVIDE_HIDDEN (__init_array_end = .);
+
+
+		. = ALIGN(4);
+		/* finit data */
+		PROVIDE_HIDDEN (__fini_array_start = .);
+		KEEP(*(SORT(.fini_array.*)))
+		KEEP(*(.fini_array))
+		PROVIDE_HIDDEN (__fini_array_end = .);
+
+		KEEP(*(.jcr*))
+		. = ALIGN(4);
+		/* All data end */
+		__data_end__ = .;
+
+	} > RAM
+
+	.bss :
+	{
+		. = ALIGN(4);
+		__bss_start__ = .;
+		*(.bss*)
+		*(COMMON)
+		. = ALIGN(4);
+		__bss_end__ = .;
+	} > RAM
+
+	.heap (COPY):
+	{
+		__HeapBase = .;
+		__end__ = .;
+		end = __end__;
+		KEEP(*(.heap*))
+		__HeapLimit = .;
+	} > RAM
+
+	/* .stack_dummy section doesn't contains any symbols. It is only
+	 * used for linker to calculate size of stack sections, and assign
+	 * values to stack symbols later */
+	.stack_dummy (COPY):
+	{
+		KEEP(*(.stack*))
+	} > RAM
+
+	/* Set stack top to end of RAM, and stack limit move down by
+	 * size of stack_dummy section */
+	__StackTop = ORIGIN(RAM) + LENGTH(RAM);
+	__StackLimit = __StackTop - SIZEOF(.stack_dummy);
+	PROVIDE(__stack = __StackTop);
+
+	/* Check if data + heap + stack exceeds RAM limit */
+	ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/startup_ARMCM7.c b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/startup_ARMCM7.c
new file mode 100644
index 0000000..26edb9f
--- /dev/null
+++ b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/startup_ARMCM7.c
@@ -0,0 +1,295 @@
+/**************************************************************************//**
+ * @file     startup_ARMCM7.s
+ * @brief    CMSIS Core Device Startup File for
+ *           ARMCM7 Device Series
+ * @version  V5.00
+ * @date     26. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <stdint.h>
+
+
+/*----------------------------------------------------------------------------
+  Linker generated Symbols
+ *----------------------------------------------------------------------------*/
+extern uint32_t __etext;
+extern uint32_t __data_start__;
+extern uint32_t __data_end__;
+extern uint32_t __copy_table_start__;
+extern uint32_t __copy_table_end__;
+extern uint32_t __zero_table_start__;
+extern uint32_t __zero_table_end__;
+extern uint32_t __bss_start__;
+extern uint32_t __bss_end__;
+extern uint32_t __StackTop;
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler Function Prototype
+ *----------------------------------------------------------------------------*/
+typedef void( *pFunc )( void );
+
+
+/*----------------------------------------------------------------------------
+  External References
+ *----------------------------------------------------------------------------*/
+#ifndef __START
+extern void  _start(void) __attribute__((noreturn));    /* PreeMain (C library entry point) */
+#else
+extern int  __START(void) __attribute__((noreturn));    /* main entry point */
+#endif
+
+#ifndef __NO_SYSTEM_INIT
+extern void SystemInit (void);            /* CMSIS System Initialization      */
+#endif
+
+
+/*----------------------------------------------------------------------------
+  Internal References
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void);                          /* Default empty handler */
+void Reset_Handler(void);                            /* Reset Handler */
+
+
+/*----------------------------------------------------------------------------
+  User Initial Stack & Heap
+ *----------------------------------------------------------------------------*/
+#ifndef __STACK_SIZE
+  #define	__STACK_SIZE  0x00000400
+#endif
+static uint8_t stack[__STACK_SIZE] __attribute__ ((aligned(8), used, section(".stack")));
+
+#ifndef __HEAP_SIZE
+  #define	__HEAP_SIZE   0x00000C00
+#endif
+#if __HEAP_SIZE > 0
+static uint8_t heap[__HEAP_SIZE]   __attribute__ ((aligned(8), used, section(".heap")));
+#endif
+
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler
+ *----------------------------------------------------------------------------*/
+/* Cortex-M7 Processor Exceptions */
+void NMI_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void HardFault_Handler   (void) __attribute__ ((weak, alias("Default_Handler")));
+void MemManage_Handler   (void) __attribute__ ((weak, alias("Default_Handler")));
+void BusFault_Handler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void UsageFault_Handler  (void) __attribute__ ((weak, alias("Default_Handler")));
+void SVC_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void DebugMon_Handler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void PendSV_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void SysTick_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+
+/* ARMCM7 Specific Interrupts */
+void WDT_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void RTC_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIM0_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIM2_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void MCIA_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void MCIB_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART0_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART1_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART2_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART4_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void AACI_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void CLCD_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void ENET_IRQHandler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void USBDC_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void USBHC_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void CHLCD_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void FLEXRAY_IRQHandler  (void) __attribute__ ((weak, alias("Default_Handler")));
+void CAN_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void LIN_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void I2C_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void CPU_CLCD_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART3_IRQHandler    (void) __attribute__ ((weak, alias("Default_Handler")));
+void SPI_IRQHandler      (void) __attribute__ ((weak, alias("Default_Handler")));
+
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Vector table
+ *----------------------------------------------------------------------------*/
+const pFunc __Vectors[] __attribute__ ((section(".vectors"))) = {
+  /* Cortex-M7 Exceptions Handler */
+  (pFunc)((uint32_t)&__StackTop),           /*      Initial Stack Pointer     */
+  Reset_Handler,                            /*      Reset Handler             */
+  NMI_Handler,                              /*      NMI Handler               */
+  HardFault_Handler,                        /*      Hard Fault Handler        */
+  MemManage_Handler,                        /*      MPU Fault Handler         */
+  BusFault_Handler,                         /*      Bus Fault Handler         */
+  UsageFault_Handler,                       /*      Usage Fault Handler       */
+  0,                                        /*      Reserved                  */
+  0,                                        /*      Reserved                  */
+  0,                                        /*      Reserved                  */
+  0,                                        /*      Reserved                  */
+  SVC_Handler,                              /*      SVCall Handler            */
+  DebugMon_Handler,                         /*      Debug Monitor Handler     */
+  0,                                        /*      Reserved                  */
+  PendSV_Handler,                           /*      PendSV Handler            */
+  SysTick_Handler,                          /*      SysTick Handler           */
+
+  /* External interrupts */
+  WDT_IRQHandler,                           /*  0:  Watchdog Timer            */
+  RTC_IRQHandler,                           /*  1:  Real Time Clock           */
+  TIM0_IRQHandler,                          /*  2:  Timer0 / Timer1           */
+  TIM2_IRQHandler,                          /*  3:  Timer2 / Timer3           */
+  MCIA_IRQHandler,                          /*  4:  MCIa                      */
+  MCIB_IRQHandler,                          /*  5:  MCIb                      */
+  UART0_IRQHandler,                         /*  6:  UART0 - DUT FPGA          */
+  UART1_IRQHandler,                         /*  7:  UART1 - DUT FPGA          */
+  UART2_IRQHandler,                         /*  8:  UART2 - DUT FPGA          */
+  UART4_IRQHandler,                         /*  9:  UART4 - not connected     */
+  AACI_IRQHandler,                          /* 10: AACI / AC97                */
+  CLCD_IRQHandler,                          /* 11: CLCD Combined Interrupt    */
+  ENET_IRQHandler,                          /* 12: Ethernet                   */
+  USBDC_IRQHandler,                         /* 13: USB Device                 */
+  USBHC_IRQHandler,                         /* 14: USB Host Controller        */
+  CHLCD_IRQHandler,                         /* 15: Character LCD              */
+  FLEXRAY_IRQHandler,                       /* 16: Flexray                    */
+  CAN_IRQHandler,                           /* 17: CAN                        */
+  LIN_IRQHandler,                           /* 18: LIN                        */
+  I2C_IRQHandler,                           /* 19: I2C ADC/DAC                */
+  0,                                        /* 20: Reserved                   */
+  0,                                        /* 21: Reserved                   */
+  0,                                        /* 22: Reserved                   */
+  0,                                        /* 23: Reserved                   */
+  0,                                        /* 24: Reserved                   */
+  0,                                        /* 25: Reserved                   */
+  0,                                        /* 26: Reserved                   */
+  0,                                        /* 27: Reserved                   */
+  CPU_CLCD_IRQHandler,                      /* 28: Reserved - CPU FPGA CLCD   */
+  0,                                        /* 29: Reserved - CPU FPGA        */
+  UART3_IRQHandler,                         /* 30: UART3    - CPU FPGA        */
+  SPI_IRQHandler                            /* 31: SPI Touchscreen - CPU FPGA */
+};
+
+
+/*----------------------------------------------------------------------------
+  Reset Handler called on controller reset
+ *----------------------------------------------------------------------------*/
+void Reset_Handler(void) {
+  uint32_t *pSrc, *pDest;
+  uint32_t *pTable __attribute__((unused));
+
+/*  Firstly it copies data from read only memory to RAM. There are two schemes
+ *  to copy. One can copy more than one sections. Another can only copy
+ *  one section.  The former scheme needs more instructions and read-only
+ *  data to implement than the latter.
+ *  Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes.  */
+
+#ifdef __STARTUP_COPY_MULTIPLE
+/*  Multiple sections scheme.
+ *
+ *  Between symbol address __copy_table_start__ and __copy_table_end__,
+ *  there are array of triplets, each of which specify:
+ *    offset 0: LMA of start of a section to copy from
+ *    offset 4: VMA of start of a section to copy to
+ *    offset 8: size of the section to copy. Must be multiply of 4
+ *
+ *  All addresses must be aligned to 4 bytes boundary.
+ */
+  pTable = &__copy_table_start__;
+
+  for (; pTable < &__copy_table_end__; pTable = pTable + 3) {
+		pSrc  = (uint32_t*)*(pTable + 0);
+		pDest = (uint32_t*)*(pTable + 1);
+		for (; pDest < (uint32_t*)(*(pTable + 1) + *(pTable + 2)) ; ) {
+      *pDest++ = *pSrc++;
+		}
+	}
+#else
+/*  Single section scheme.
+ *
+ *  The ranges of copy from/to are specified by following symbols
+ *    __etext: LMA of start of the section to copy from. Usually end of text
+ *    __data_start__: VMA of start of the section to copy to
+ *    __data_end__: VMA of end of the section to copy to
+ *
+ *  All addresses must be aligned to 4 bytes boundary.
+ */
+  pSrc  = &__etext;
+  pDest = &__data_start__;
+
+  for ( ; pDest < &__data_end__ ; ) {
+    *pDest++ = *pSrc++;
+  }
+#endif /*__STARTUP_COPY_MULTIPLE */
+
+/*  This part of work usually is done in C library startup code. Otherwise,
+ *  define this macro to enable it in this startup.
+ *
+ *  There are two schemes too. One can clear multiple BSS sections. Another
+ *  can only clear one section. The former is more size expensive than the
+ *  latter.
+ *
+ *  Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former.
+ *  Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later.
+ */
+#ifdef __STARTUP_CLEAR_BSS_MULTIPLE
+/*  Multiple sections scheme.
+ *
+ *  Between symbol address __copy_table_start__ and __copy_table_end__,
+ *  there are array of tuples specifying:
+ *    offset 0: Start of a BSS section
+ *    offset 4: Size of this BSS section. Must be multiply of 4
+ */
+  pTable = &__zero_table_start__;
+
+  for (; pTable < &__zero_table_end__; pTable = pTable + 2) {
+		pDest = (uint32_t*)*(pTable + 0);
+		for (; pDest < (uint32_t*)(*(pTable + 0) + *(pTable + 1)) ; ) {
+      *pDest++ = 0;
+		}
+	}
+#elif defined (__STARTUP_CLEAR_BSS)
+/*  Single BSS section scheme.
+ *
+ *  The BSS section is specified by following symbols
+ *    __bss_start__: start of the BSS section.
+ *    __bss_end__: end of the BSS section.
+ *
+ *  Both addresses must be aligned to 4 bytes boundary.
+ */
+  pDest = &__bss_start__;
+
+  for ( ; pDest < &__bss_end__ ; ) {
+    *pDest++ = 0UL;
+  }
+#endif /* __STARTUP_CLEAR_BSS_MULTIPLE || __STARTUP_CLEAR_BSS */
+
+#ifndef __NO_SYSTEM_INIT
+	SystemInit();
+#endif
+
+#ifndef __START
+#define __START _start
+#endif
+	__START();
+
+}
+
+
+/*----------------------------------------------------------------------------
+  Default Handler for Exceptions / Interrupts
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void) {
+
+	while(1);
+}
diff --git a/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/startup_ARMCM7.s b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
new file mode 100644
index 0000000..0170ef4
--- /dev/null
+++ b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/startup_ARMCM7.s
@@ -0,0 +1,262 @@
+;/**************************************************************************//**
+; * @file     startup_ARMCM7.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM7 Device Series
+; * @version  V5.00
+; * @date     02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size      EQU     0x00000400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size       EQU     0x00080000
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp              ; Top of Stack
+                DCD     Reset_Handler             ; Reset Handler
+                DCD     NMI_Handler               ; NMI Handler
+                DCD     HardFault_Handler         ; Hard Fault Handler
+                DCD     MemManage_Handler         ; MPU Fault Handler
+                DCD     BusFault_Handler          ; Bus Fault Handler
+                DCD     UsageFault_Handler        ; Usage Fault Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     SVC_Handler               ; SVCall Handler
+                DCD     DebugMon_Handler          ; Debug Monitor Handler
+                DCD     0                         ; Reserved
+                DCD     PendSV_Handler            ; PendSV Handler
+                DCD     SysTick_Handler           ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WDT_IRQHandler            ;  0:  Watchdog Timer
+                DCD     RTC_IRQHandler            ;  1:  Real Time Clock
+                DCD     TIM0_IRQHandler           ;  2:  Timer0 / Timer1
+                DCD     TIM2_IRQHandler           ;  3:  Timer2 / Timer3
+                DCD     MCIA_IRQHandler           ;  4:  MCIa
+                DCD     MCIB_IRQHandler           ;  5:  MCIb
+                DCD     UART0_IRQHandler          ;  6:  UART0 - DUT FPGA
+                DCD     UART1_IRQHandler          ;  7:  UART1 - DUT FPGA
+                DCD     UART2_IRQHandler          ;  8:  UART2 - DUT FPGA
+                DCD     UART4_IRQHandler          ;  9:  UART4 - not connected
+                DCD     AACI_IRQHandler           ; 10: AACI / AC97
+                DCD     CLCD_IRQHandler           ; 11: CLCD Combined Interrupt
+                DCD     ENET_IRQHandler           ; 12: Ethernet
+                DCD     USBDC_IRQHandler          ; 13: USB Device
+                DCD     USBHC_IRQHandler          ; 14: USB Host Controller
+                DCD     CHLCD_IRQHandler          ; 15: Character LCD
+                DCD     FLEXRAY_IRQHandler        ; 16: Flexray
+                DCD     CAN_IRQHandler            ; 17: CAN
+                DCD     LIN_IRQHandler            ; 18: LIN
+                DCD     I2C_IRQHandler            ; 19: I2C ADC/DAC
+                DCD     0                         ; 20: Reserved
+                DCD     0                         ; 21: Reserved
+                DCD     0                         ; 22: Reserved
+                DCD     0                         ; 23: Reserved
+                DCD     0                         ; 24: Reserved
+                DCD     0                         ; 25: Reserved
+                DCD     0                         ; 26: Reserved
+                DCD     0                         ; 27: Reserved
+                DCD     CPU_CLCD_IRQHandler       ; 28: Reserved - CPU FPGA CLCD
+                DCD     0                         ; 29: Reserved - CPU FPGA
+                DCD     UART3_IRQHandler          ; 30: UART3    - CPU FPGA
+                DCD     SPI_IRQHandler            ; 31: SPI Touchscreen - CPU FPGA
+__Vectors_End
+
+__Vectors_Size  EQU     __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT  Reset_Handler             [WEAK]
+                IMPORT  SystemInit
+                IMPORT  __main
+                LDR     R0, =SystemInit
+                BLX     R0
+                LDR     R0, =__main
+                BX      R0
+                ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler               [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler         [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler         [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler          [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler        [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler               [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler          [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler            [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler           [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  WDT_IRQHandler            [WEAK]
+                EXPORT  RTC_IRQHandler            [WEAK]
+                EXPORT  TIM0_IRQHandler           [WEAK]
+                EXPORT  TIM2_IRQHandler           [WEAK]
+                EXPORT  MCIA_IRQHandler           [WEAK]
+                EXPORT  MCIB_IRQHandler           [WEAK]
+                EXPORT  UART0_IRQHandler          [WEAK]
+                EXPORT  UART1_IRQHandler          [WEAK]
+                EXPORT  UART2_IRQHandler          [WEAK]
+                EXPORT  UART3_IRQHandler          [WEAK]
+                EXPORT  UART4_IRQHandler          [WEAK]
+                EXPORT  AACI_IRQHandler           [WEAK]
+                EXPORT  CLCD_IRQHandler           [WEAK]
+                EXPORT  ENET_IRQHandler           [WEAK]
+                EXPORT  USBDC_IRQHandler          [WEAK]
+                EXPORT  USBHC_IRQHandler          [WEAK]
+                EXPORT  CHLCD_IRQHandler          [WEAK]
+                EXPORT  FLEXRAY_IRQHandler        [WEAK]
+                EXPORT  CAN_IRQHandler            [WEAK]
+                EXPORT  LIN_IRQHandler            [WEAK]
+                EXPORT  I2C_IRQHandler            [WEAK]
+                EXPORT  CPU_CLCD_IRQHandler       [WEAK]
+                EXPORT  SPI_IRQHandler            [WEAK]
+
+WDT_IRQHandler
+RTC_IRQHandler
+TIM0_IRQHandler
+TIM2_IRQHandler
+MCIA_IRQHandler
+MCIB_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+AACI_IRQHandler
+CLCD_IRQHandler
+ENET_IRQHandler
+USBDC_IRQHandler
+USBHC_IRQHandler
+CHLCD_IRQHandler
+FLEXRAY_IRQHandler
+CAN_IRQHandler
+LIN_IRQHandler
+I2C_IRQHandler
+CPU_CLCD_IRQHandler
+SPI_IRQHandler
+                B       .
+
+                ENDP
+
+
+                ALIGN
+
+
+; User Initial Stack & Heap
+
+                IF      :DEF:__MICROLIB
+
+                EXPORT  __initial_sp
+                EXPORT  __heap_base
+                EXPORT  __heap_limit
+
+                ELSE
+
+                IMPORT  __use_two_region_memory
+                EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap PROC
+                LDR     R0, =  Heap_Mem
+                LDR     R1, =(Stack_Mem + Stack_Size)
+                LDR     R2, = (Heap_Mem +  Heap_Size)
+                LDR     R3, = Stack_Mem
+                BX      LR
+                ENDP
+
+                ALIGN
+
+                ENDIF
+
+
+                END
diff --git a/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/system_ARMCM7.c b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/system_ARMCM7.c
new file mode 100644
index 0000000..65bfaca
--- /dev/null
+++ b/NN/NN_Lib_Tests/nn_test/RTE/Device/ARMCM7_SP/system_ARMCM7.c
@@ -0,0 +1,85 @@
+/**************************************************************************//**
+ * @file     system_ARMCM7.c
+ * @brief    CMSIS Device System Source File for
+ *           ARMCM7 Device Series
+ * @version  V5.00
+ * @date     08. April 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM7)
+  #include "ARMCM7.h"
+#elif defined (ARMCM7_SP)
+  #include "ARMCM7_SP.h"
+#elif defined (ARMCM7_DP)
+  #include "ARMCM7_DP.h"
+#else
+  #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  XTAL            ( 5000000U)      /* Oscillator frequency */
+
+#define  SYSTEM_CLOCK    (5 * XTAL)
+
+
+/*----------------------------------------------------------------------------
+  Externals
+ *----------------------------------------------------------------------------*/
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+  extern uint32_t __Vectors;
+#endif
+
+/*----------------------------------------------------------------------------
+  System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK;
+
+
+/*----------------------------------------------------------------------------
+  System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+  SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1)
+  SCB->VTOR = (uint32_t) &__Vectors;
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1)
+  SCB->CPACR |= ((3U << 10*2) |           /* set CP10 Full Access */
+                 (3U << 11*2)  );         /* set CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+  SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/NN/NN_Lib_Tests/nn_test/RTE/Device/STM32F411RETx/startup_stm32f411xe.s b/NN/NN_Lib_Tests/nn_test/RTE/Device/STM32F411RETx/startup_stm32f411xe.s
new file mode 100644
index 0000000..9b70614
--- /dev/null
+++ b/NN/NN_Lib_Tests/nn_test/RTE/Device/STM32F411RETx/startup_stm32f411xe.s
@@ -0,0 +1,395 @@
+;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
+;* File Name          : startup_stm32f411xe.s
+;* Author             : MCD Application Team
+;* Version            : V2.6.0
+;* Date               : 04-November-2016
+;* Description        : STM32F411xExx devices vector table for MDK-ARM toolchain. 
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the CortexM4 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;* <<< Use Configuration Wizard in Context Menu >>>   
+;*******************************************************************************
+; 
+;* Redistribution and use in source and binary forms, with or without modification,
+;* are permitted provided that the following conditions are met:
+;*   1. Redistributions of source code must retain the above copyright notice,
+;*      this list of conditions and the following disclaimer.
+;*   2. Redistributions in binary form must reproduce the above copyright notice,
+;*      this list of conditions and the following disclaimer in the documentation
+;*      and/or other materials provided with the distribution.
+;*   3. Neither the name of STMicroelectronics nor the names of its contributors
+;*      may be used to endorse or promote products derived from this software
+;*      without specific prior written permission.
+;*
+;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+; 
+;*******************************************************************************
+
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size      EQU     0x00000400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size       EQU     0x00000200
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog                                        
+                DCD     PVD_IRQHandler                    ; PVD through EXTI Line detection                        
+                DCD     TAMP_STAMP_IRQHandler             ; Tamper and TimeStamps through the EXTI line            
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line                       
+                DCD     FLASH_IRQHandler                  ; FLASH                                           
+                DCD     RCC_IRQHandler                    ; RCC                                             
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0                                             
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1                                             
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2                                             
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3                                             
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4                                             
+                DCD     DMA1_Stream0_IRQHandler           ; DMA1 Stream 0                                   
+                DCD     DMA1_Stream1_IRQHandler           ; DMA1 Stream 1                                   
+                DCD     DMA1_Stream2_IRQHandler           ; DMA1 Stream 2                                   
+                DCD     DMA1_Stream3_IRQHandler           ; DMA1 Stream 3                                   
+                DCD     DMA1_Stream4_IRQHandler           ; DMA1 Stream 4                                   
+                DCD     DMA1_Stream5_IRQHandler           ; DMA1 Stream 5                                   
+                DCD     DMA1_Stream6_IRQHandler           ; DMA1 Stream 6                                   
+                DCD     ADC_IRQHandler                    ; ADC1, ADC2 and ADC3s                            
+                DCD     0                                 ; Reserved                                                
+                DCD     0                                 ; Reserved                                               
+                DCD     0                                 ; Reserved                                             
+                DCD     0                                 ; Reserved                                               
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s                                    
+                DCD     TIM1_BRK_TIM9_IRQHandler          ; TIM1 Break and TIM9                   
+                DCD     TIM1_UP_TIM10_IRQHandler          ; TIM1 Update and TIM10                 
+                DCD     TIM1_TRG_COM_TIM11_IRQHandler     ; TIM1 Trigger and Commutation and TIM11
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare                                   
+                DCD     TIM2_IRQHandler                   ; TIM2                                            
+                DCD     TIM3_IRQHandler                   ; TIM3                                            
+                DCD     TIM4_IRQHandler                   ; TIM4                                            
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event                                             
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error                                             
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event                                             
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error                                               
+                DCD     SPI1_IRQHandler                   ; SPI1                                            
+                DCD     SPI2_IRQHandler                   ; SPI2                                            
+                DCD     USART1_IRQHandler                 ; USART1                                          
+                DCD     USART2_IRQHandler                 ; USART2                                          
+                DCD     0                                 ; Reserved                                          
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]s                                  
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line                  
+                DCD     OTG_FS_WKUP_IRQHandler            ; USB OTG FS Wakeup through EXTI line                        
+                DCD     0                                 ; Reserved                  
+                DCD     0                                 ; Reserved                 
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved                                   
+                DCD     DMA1_Stream7_IRQHandler           ; DMA1 Stream7                                           
+                DCD     0                                 ; Reserved                                             
+                DCD     SDIO_IRQHandler                   ; SDIO                                            
+                DCD     TIM5_IRQHandler                   ; TIM5                                            
+                DCD     SPI3_IRQHandler                   ; SPI3                                            
+                DCD     0                                 ; Reserved                                           
+                DCD     0                                 ; Reserved                                           
+                DCD     0                                 ; Reserved                   
+                DCD     0                                 ; Reserved                   
+                DCD     DMA2_Stream0_IRQHandler           ; DMA2 Stream 0                                   
+                DCD     DMA2_Stream1_IRQHandler           ; DMA2 Stream 1                                   
+                DCD     DMA2_Stream2_IRQHandler           ; DMA2 Stream 2                                   
+                DCD     DMA2_Stream3_IRQHandler           ; DMA2 Stream 3                                   
+                DCD     DMA2_Stream4_IRQHandler           ; DMA2 Stream 4
+                DCD     0                                 ; Reserved  
+                DCD     0                                 ; Reserved  
+                DCD     0                                 ; Reserved                                              
+                DCD     0                                 ; Reserved                                               
+                DCD     0                                 ; Reserved                                               
+                DCD     0                                 ; Reserved                                               
+                DCD     OTG_FS_IRQHandler                 ; USB OTG FS                                      
+                DCD     DMA2_Stream5_IRQHandler           ; DMA2 Stream 5                                   
+                DCD     DMA2_Stream6_IRQHandler           ; DMA2 Stream 6                                   
+                DCD     DMA2_Stream7_IRQHandler           ; DMA2 Stream 7                                   
+                DCD     USART6_IRQHandler                 ; USART6                                           
+                DCD     I2C3_EV_IRQHandler                ; I2C3 event                                             
+                DCD     I2C3_ER_IRQHandler                ; I2C3 error                                             
+                DCD     0                                 ; Reserved                     
+                DCD     0                                 ; Reserved                       
+                DCD     0                                 ; Reserved                         
+                DCD     0                                 ; Reserved                                    
+                DCD     0                                 ; Reserved  
+                DCD     0                                 ; Reserved				                              
+                DCD     0                                 ; Reserved
+                DCD     FPU_IRQHandler                    ; FPU
+                DCD     0                                 ; Reserved
+		        DCD     0                                 ; Reserved
+		        DCD     SPI4_IRQHandler                   ; SPI4
+				DCD     SPI5_IRQHandler                   ; SPI5
+                                         
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  WWDG_IRQHandler                   [WEAK]                                        
+                EXPORT  PVD_IRQHandler                    [WEAK]                      
+                EXPORT  TAMP_STAMP_IRQHandler             [WEAK]         
+                EXPORT  RTC_WKUP_IRQHandler               [WEAK]                     
+                EXPORT  FLASH_IRQHandler                  [WEAK]                                         
+                EXPORT  RCC_IRQHandler                    [WEAK]                                            
+                EXPORT  EXTI0_IRQHandler                  [WEAK]                                            
+                EXPORT  EXTI1_IRQHandler                  [WEAK]                                             
+                EXPORT  EXTI2_IRQHandler                  [WEAK]                                            
+                EXPORT  EXTI3_IRQHandler                  [WEAK]                                           
+                EXPORT  EXTI4_IRQHandler                  [WEAK]                                            
+                EXPORT  DMA1_Stream0_IRQHandler           [WEAK]                                
+                EXPORT  DMA1_Stream1_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream2_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream3_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream4_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream5_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream6_IRQHandler           [WEAK]                                   
+                EXPORT  ADC_IRQHandler                    [WEAK]                                                                        
+                EXPORT  EXTI9_5_IRQHandler                [WEAK]                                    
+                EXPORT  TIM1_BRK_TIM9_IRQHandler          [WEAK]                  
+                EXPORT  TIM1_UP_TIM10_IRQHandler          [WEAK]                
+                EXPORT  TIM1_TRG_COM_TIM11_IRQHandler     [WEAK] 
+                EXPORT  TIM1_CC_IRQHandler                [WEAK]                                   
+                EXPORT  TIM2_IRQHandler                   [WEAK]                                            
+                EXPORT  TIM3_IRQHandler                   [WEAK]                                            
+                EXPORT  TIM4_IRQHandler                   [WEAK]                                            
+                EXPORT  I2C1_EV_IRQHandler                [WEAK]                                             
+                EXPORT  I2C1_ER_IRQHandler                [WEAK]                                             
+                EXPORT  I2C2_EV_IRQHandler                [WEAK]                                            
+                EXPORT  I2C2_ER_IRQHandler                [WEAK]                                               
+                EXPORT  SPI1_IRQHandler                   [WEAK]                                           
+                EXPORT  SPI2_IRQHandler                   [WEAK]                                            
+                EXPORT  USART1_IRQHandler                 [WEAK]                                          
+                EXPORT  USART2_IRQHandler                 [WEAK]                                                                                  
+                EXPORT  EXTI15_10_IRQHandler              [WEAK]                                  
+                EXPORT  RTC_Alarm_IRQHandler              [WEAK]                  
+                EXPORT  OTG_FS_WKUP_IRQHandler            [WEAK]                        
+                EXPORT  DMA1_Stream7_IRQHandler           [WEAK]                                                                                     
+                EXPORT  SDIO_IRQHandler                   [WEAK]                                             
+                EXPORT  TIM5_IRQHandler                   [WEAK]                                             
+                EXPORT  SPI3_IRQHandler                   [WEAK]                                                               
+                EXPORT  DMA2_Stream0_IRQHandler           [WEAK]                                  
+                EXPORT  DMA2_Stream1_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream2_IRQHandler           [WEAK]                                    
+                EXPORT  DMA2_Stream3_IRQHandler           [WEAK]                                    
+                EXPORT  DMA2_Stream4_IRQHandler           [WEAK]                                                                                                     
+                EXPORT  OTG_FS_IRQHandler                 [WEAK]                                       
+                EXPORT  DMA2_Stream5_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream6_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream7_IRQHandler           [WEAK]                                   
+                EXPORT  USART6_IRQHandler                 [WEAK]                                           
+                EXPORT  I2C3_EV_IRQHandler                [WEAK]                                              
+                EXPORT  I2C3_ER_IRQHandler                [WEAK]                                              
+                EXPORT  FPU_IRQHandler                    [WEAK]
+				EXPORT  SPI4_IRQHandler                   [WEAK]
+                EXPORT  SPI5_IRQHandler                   [WEAK]
+
+WWDG_IRQHandler                                                       
+PVD_IRQHandler                                      
+TAMP_STAMP_IRQHandler                  
+RTC_WKUP_IRQHandler                                
+FLASH_IRQHandler                                                       
+RCC_IRQHandler                                                            
+EXTI0_IRQHandler                                                          
+EXTI1_IRQHandler                                                           
+EXTI2_IRQHandler                                                          
+EXTI3_IRQHandler                                                         
+EXTI4_IRQHandler                                                          
+DMA1_Stream0_IRQHandler                                       
+DMA1_Stream1_IRQHandler                                          
+DMA1_Stream2_IRQHandler                                          
+DMA1_Stream3_IRQHandler                                          
+DMA1_Stream4_IRQHandler                                          
+DMA1_Stream5_IRQHandler                                          
+DMA1_Stream6_IRQHandler                                          
+ADC_IRQHandler                                                                                                    
+EXTI9_5_IRQHandler                                                
+TIM1_BRK_TIM9_IRQHandler                        
+TIM1_UP_TIM10_IRQHandler                      
+TIM1_TRG_COM_TIM11_IRQHandler  
+TIM1_CC_IRQHandler                                               
+TIM2_IRQHandler                                                           
+TIM3_IRQHandler                                                           
+TIM4_IRQHandler                                                           
+I2C1_EV_IRQHandler                                                         
+I2C1_ER_IRQHandler                                                         
+I2C2_EV_IRQHandler                                                        
+I2C2_ER_IRQHandler                                                           
+SPI1_IRQHandler                                                          
+SPI2_IRQHandler                                                           
+USART1_IRQHandler                                                       
+USART2_IRQHandler                                                                                                           
+EXTI15_10_IRQHandler                                            
+RTC_Alarm_IRQHandler                            
+OTG_FS_WKUP_IRQHandler                                                                           
+DMA1_Stream7_IRQHandler                                                                                                             
+SDIO_IRQHandler                                                            
+TIM5_IRQHandler                                                            
+SPI3_IRQHandler                                                                                     
+DMA2_Stream0_IRQHandler                                         
+DMA2_Stream1_IRQHandler                                          
+DMA2_Stream2_IRQHandler                                           
+DMA2_Stream3_IRQHandler                                           
+DMA2_Stream4_IRQHandler                                                                                                                                  
+OTG_FS_IRQHandler                                                    
+DMA2_Stream5_IRQHandler                                          
+DMA2_Stream6_IRQHandler                                          
+DMA2_Stream7_IRQHandler                                          
+USART6_IRQHandler                                                        
+I2C3_EV_IRQHandler                                                          
+I2C3_ER_IRQHandler                                                          
+FPU_IRQHandler
+SPI4_IRQHandler
+SPI5_IRQHandler
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+                
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+                
+                 ELSE
+                
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+                 
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/NN/NN_Lib_Tests/nn_test/RTE/Device/STM32F411RETx/system_stm32f4xx.c b/NN/NN_Lib_Tests/nn_test/RTE/Device/STM32F411RETx/system_stm32f4xx.c
new file mode 100644
index 0000000..bca0633
--- /dev/null
+++ b/NN/NN_Lib_Tests/nn_test/RTE/Device/STM32F411RETx/system_stm32f4xx.c
@@ -0,0 +1,763 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32f4xx.c
+  * @author  MCD Application Team
+  * @version V2.6.0
+  * @date    04-November-2016
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
+  *
+  *   This file provides two functions and one global variable to be called from 
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and 
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32f4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick 
+  *                                  timer or configure other parameters.
+  *                                     
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT 2016 STMicroelectronics</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32f4xx_system
+  * @{
+  */  
+  
+/** @addtogroup STM32F4xx_System_Private_Includes
+  * @{
+  */
+
+
+#include "stm32f4xx.h"
+
+#if !defined  (HSE_VALUE) 
+  #define HSE_VALUE    ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to use external SRAM or SDRAM as data memory  */
+#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
+ || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
+/* #define DATA_IN_ExtSRAM */
+#endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx ||\
+          STM32F412Zx || STM32F412Vx */
+ 
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
+/* #define DATA_IN_ExtSDRAM */
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
+          STM32F479xx */
+
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00 /*!< Vector Table base offset field. 
+                                   This value must be a multiple of 0x200. */
+/******************************************************************************/
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_Variables
+  * @{
+  */
+  /* This variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+uint32_t SystemCoreClock = 16000000;
+const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t APBPrescTable[8]  = {0, 0, 0, 0, 1, 2, 3, 4};
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
+  static void SystemInit_ExtMemCtl(void); 
+#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system
+  *         Initialize the FPU setting, vector table location and External memory 
+  *         configuration.
+  * @param  None
+  * @retval None
+  */
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
+  #endif
+  /* Reset the RCC clock configuration to the default reset state ------------*/
+  /* Set HSION bit */
+  RCC->CR |= (uint32_t)0x00000001;
+
+  /* Reset CFGR register */
+  RCC->CFGR = 0x00000000;
+
+  /* Reset HSEON, CSSON and PLLON bits */
+  RCC->CR &= (uint32_t)0xFEF6FFFF;
+
+  /* Reset PLLCFGR register */
+  RCC->PLLCFGR = 0x24003010;
+
+  /* Reset HSEBYP bit */
+  RCC->CR &= (uint32_t)0xFFFBFFFF;
+
+  /* Disable all interrupts */
+  RCC->CIR = 0x00000000;
+
+#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
+  SystemInit_ExtMemCtl(); 
+#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+   * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *           
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.         
+  *     
+  * @note   - The system frequency computed by this function is not the real 
+  *           frequency in the chip. It is calculated based on the predefined 
+  *           constant and the selected clock source:
+  *             
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+  *                                              
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
+  *                          
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) 
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *         
+  *         (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
+  *             16 MHz) but the real value may vary depending on the variations
+  *             in voltage and temperature.   
+  *    
+  *         (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
+  *              depends on the application requirements), user has to ensure that HSE_VALUE
+  *              is same as the real frequency of the crystal used. Otherwise, this function
+  *              may have wrong result.
+  *                
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *     
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
+  
+  /* Get SYSCLK source -------------------------------------------------------*/
+  tmp = RCC->CFGR & RCC_CFGR_SWS;
+
+  switch (tmp)
+  {
+    case 0x00:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+    case 0x04:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+    case 0x08:  /* PLL used as system clock source */
+
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
+         SYSCLK = PLL_VCO / PLL_P
+         */    
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
+      pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+      
+      if (pllsource != 0)
+      {
+        /* HSE used as PLL clock source */
+        pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+      }
+      else
+      {
+        /* HSI used as PLL clock source */
+        pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+      }
+
+      pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
+      SystemCoreClock = pllvco/pllp;
+      break;
+    default:
+      SystemCoreClock = HSI_VALUE;
+      break;
+  }
+  /* Compute HCLK frequency --------------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK frequency */
+  SystemCoreClock >>= tmp;
+}
+
+#if defined (DATA_IN_ExtSRAM) && defined (DATA_IN_ExtSDRAM)
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx)
+/**
+  * @brief  Setup the external memory controller.
+  *         Called in startup_stm32f4xx.s before jump to main.
+  *         This function configures the external memories (SRAM/SDRAM)
+  *         This SRAM/SDRAM will be used as program data memory (including heap and stack).
+  * @param  None
+  * @retval None
+  */
+void SystemInit_ExtMemCtl(void)
+{
+  __IO uint32_t tmp = 0x00;
+
+  register uint32_t tmpreg = 0, timeout = 0xFFFF;
+  register __IO uint32_t index;
+
+  /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface clock */
+  RCC->AHB1ENR |= 0x000001F8;
+
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
+  
+  /* Connect PDx pins to FMC Alternate function */
+  GPIOD->AFR[0]  = 0x00CCC0CC;
+  GPIOD->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PDx pins in Alternate function mode */  
+  GPIOD->MODER   = 0xAAAA0A8A;
+  /* Configure PDx pins speed to 100 MHz */  
+  GPIOD->OSPEEDR = 0xFFFF0FCF;
+  /* Configure PDx pins Output type to push-pull */  
+  GPIOD->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PDx pins */ 
+  GPIOD->PUPDR   = 0x00000000;
+
+  /* Connect PEx pins to FMC Alternate function */
+  GPIOE->AFR[0]  = 0xC00CC0CC;
+  GPIOE->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PEx pins in Alternate function mode */ 
+  GPIOE->MODER   = 0xAAAA828A;
+  /* Configure PEx pins speed to 100 MHz */ 
+  GPIOE->OSPEEDR = 0xFFFFC3CF;
+  /* Configure PEx pins Output type to push-pull */  
+  GPIOE->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PEx pins */ 
+  GPIOE->PUPDR   = 0x00000000;
+  
+  /* Connect PFx pins to FMC Alternate function */
+  GPIOF->AFR[0]  = 0xCCCCCCCC;
+  GPIOF->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PFx pins in Alternate function mode */   
+  GPIOF->MODER   = 0xAA800AAA;
+  /* Configure PFx pins speed to 50 MHz */ 
+  GPIOF->OSPEEDR = 0xAA800AAA;
+  /* Configure PFx pins Output type to push-pull */  
+  GPIOF->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PFx pins */ 
+  GPIOF->PUPDR   = 0x00000000;
+
+  /* Connect PGx pins to FMC Alternate function */
+  GPIOG->AFR[0]  = 0xCCCCCCCC;
+  GPIOG->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PGx pins in Alternate function mode */ 
+  GPIOG->MODER   = 0xAAAAAAAA;
+  /* Configure PGx pins speed to 50 MHz */ 
+  GPIOG->OSPEEDR = 0xAAAAAAAA;
+  /* Configure PGx pins Output type to push-pull */  
+  GPIOG->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PGx pins */ 
+  GPIOG->PUPDR   = 0x00000000;
+  
+  /* Connect PHx pins to FMC Alternate function */
+  GPIOH->AFR[0]  = 0x00C0CC00;
+  GPIOH->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PHx pins in Alternate function mode */ 
+  GPIOH->MODER   = 0xAAAA08A0;
+  /* Configure PHx pins speed to 50 MHz */ 
+  GPIOH->OSPEEDR = 0xAAAA08A0;
+  /* Configure PHx pins Output type to push-pull */  
+  GPIOH->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PHx pins */ 
+  GPIOH->PUPDR   = 0x00000000;
+  
+  /* Connect PIx pins to FMC Alternate function */
+  GPIOI->AFR[0]  = 0xCCCCCCCC;
+  GPIOI->AFR[1]  = 0x00000CC0;
+  /* Configure PIx pins in Alternate function mode */ 
+  GPIOI->MODER   = 0x0028AAAA;
+  /* Configure PIx pins speed to 50 MHz */ 
+  GPIOI->OSPEEDR = 0x0028AAAA;
+  /* Configure PIx pins Output type to push-pull */  
+  GPIOI->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PIx pins */ 
+  GPIOI->PUPDR   = 0x00000000;
+  
+/*-- FMC Configuration -------------------------------------------------------*/
+  /* Enable the FMC interface clock */
+  RCC->AHB3ENR |= 0x00000001;
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+
+  FMC_Bank5_6->SDCR[0] = 0x000019E4;
+  FMC_Bank5_6->SDTR[0] = 0x01115351;      
+  
+  /* SDRAM initialization sequence */
+  /* Clock enable command */
+  FMC_Bank5_6->SDCMR = 0x00000011; 
+  tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  }
+
+  /* Delay */
+  for (index = 0; index<1000; index++);
+  
+  /* PALL command */
+  FMC_Bank5_6->SDCMR = 0x00000012;           
+  timeout = 0xFFFF;
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  }
+  
+  /* Auto refresh command */
+  FMC_Bank5_6->SDCMR = 0x00000073;
+  timeout = 0xFFFF;
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  }
+ 
+  /* MRD register program */
+  FMC_Bank5_6->SDCMR = 0x00046014;
+  timeout = 0xFFFF;
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  } 
+  
+  /* Set refresh count */
+  tmpreg = FMC_Bank5_6->SDRTR;
+  FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
+  
+  /* Disable write protection */
+  tmpreg = FMC_Bank5_6->SDCR[0]; 
+  FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
+
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
+  /* Configure and enable Bank1_SRAM2 */
+  FMC_Bank1->BTCR[2]  = 0x00001011;
+  FMC_Bank1->BTCR[3]  = 0x00000201;
+  FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ 
+#if defined(STM32F469xx) || defined(STM32F479xx)
+  /* Configure and enable Bank1_SRAM2 */
+  FMC_Bank1->BTCR[2]  = 0x00001091;
+  FMC_Bank1->BTCR[3]  = 0x00110212;
+  FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F469xx || STM32F479xx */
+
+  (void)(tmp); 
+}
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
+#elif defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
+/**
+  * @brief  Setup the external memory controller.
+  *         Called in startup_stm32f4xx.s before jump to main.
+  *         This function configures the external memories (SRAM/SDRAM)
+  *         This SRAM/SDRAM will be used as program data memory (including heap and stack).
+  * @param  None
+  * @retval None
+  */
+void SystemInit_ExtMemCtl(void)
+{
+  __IO uint32_t tmp = 0x00;
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
+#if defined (DATA_IN_ExtSDRAM)
+  register uint32_t tmpreg = 0, timeout = 0xFFFF;
+  register __IO uint32_t index;
+
+#if defined(STM32F446xx)
+  /* Enable GPIOA, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG interface
+      clock */
+  RCC->AHB1ENR |= 0x0000007D;
+#else
+  /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface 
+      clock */
+  RCC->AHB1ENR |= 0x000001F8;
+#endif /* STM32F446xx */  
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
+  
+#if defined(STM32F446xx)
+  /* Connect PAx pins to FMC Alternate function */
+  GPIOA->AFR[0]  |= 0xC0000000;
+  GPIOA->AFR[1]  |= 0x00000000;
+  /* Configure PDx pins in Alternate function mode */
+  GPIOA->MODER   |= 0x00008000;
+  /* Configure PDx pins speed to 50 MHz */
+  GPIOA->OSPEEDR |= 0x00008000;
+  /* Configure PDx pins Output type to push-pull */
+  GPIOA->OTYPER  |= 0x00000000;
+  /* No pull-up, pull-down for PDx pins */
+  GPIOA->PUPDR   |= 0x00000000;
+
+  /* Connect PCx pins to FMC Alternate function */
+  GPIOC->AFR[0]  |= 0x00CC0000;
+  GPIOC->AFR[1]  |= 0x00000000;
+  /* Configure PDx pins in Alternate function mode */
+  GPIOC->MODER   |= 0x00000A00;
+  /* Configure PDx pins speed to 50 MHz */
+  GPIOC->OSPEEDR |= 0x00000A00;
+  /* Configure PDx pins Output type to push-pull */
+  GPIOC->OTYPER  |= 0x00000000;
+  /* No pull-up, pull-down for PDx pins */
+  GPIOC->PUPDR   |= 0x00000000;
+#endif /* STM32F446xx */
+
+  /* Connect PDx pins to FMC Alternate function */
+  GPIOD->AFR[0]  = 0x000000CC;
+  GPIOD->AFR[1]  = 0xCC000CCC;
+  /* Configure PDx pins in Alternate function mode */  
+  GPIOD->MODER   = 0xA02A000A;
+  /* Configure PDx pins speed to 50 MHz */  
+  GPIOD->OSPEEDR = 0xA02A000A;
+  /* Configure PDx pins Output type to push-pull */  
+  GPIOD->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PDx pins */ 
+  GPIOD->PUPDR   = 0x00000000;
+
+  /* Connect PEx pins to FMC Alternate function */
+  GPIOE->AFR[0]  = 0xC00000CC;
+  GPIOE->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PEx pins in Alternate function mode */ 
+  GPIOE->MODER   = 0xAAAA800A;
+  /* Configure PEx pins speed to 50 MHz */ 
+  GPIOE->OSPEEDR = 0xAAAA800A;
+  /* Configure PEx pins Output type to push-pull */  
+  GPIOE->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PEx pins */ 
+  GPIOE->PUPDR   = 0x00000000;
+
+  /* Connect PFx pins to FMC Alternate function */
+  GPIOF->AFR[0]  = 0xCCCCCCCC;
+  GPIOF->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PFx pins in Alternate function mode */   
+  GPIOF->MODER   = 0xAA800AAA;
+  /* Configure PFx pins speed to 50 MHz */ 
+  GPIOF->OSPEEDR = 0xAA800AAA;
+  /* Configure PFx pins Output type to push-pull */  
+  GPIOF->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PFx pins */ 
+  GPIOF->PUPDR   = 0x00000000;
+
+  /* Connect PGx pins to FMC Alternate function */
+  GPIOG->AFR[0]  = 0xCCCCCCCC;
+  GPIOG->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PGx pins in Alternate function mode */ 
+  GPIOG->MODER   = 0xAAAAAAAA;
+  /* Configure PGx pins speed to 50 MHz */ 
+  GPIOG->OSPEEDR = 0xAAAAAAAA;
+  /* Configure PGx pins Output type to push-pull */  
+  GPIOG->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PGx pins */ 
+  GPIOG->PUPDR   = 0x00000000;
+
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx)  
+  /* Connect PHx pins to FMC Alternate function */
+  GPIOH->AFR[0]  = 0x00C0CC00;
+  GPIOH->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PHx pins in Alternate function mode */ 
+  GPIOH->MODER   = 0xAAAA08A0;
+  /* Configure PHx pins speed to 50 MHz */ 
+  GPIOH->OSPEEDR = 0xAAAA08A0;
+  /* Configure PHx pins Output type to push-pull */  
+  GPIOH->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PHx pins */ 
+  GPIOH->PUPDR   = 0x00000000;
+  
+  /* Connect PIx pins to FMC Alternate function */
+  GPIOI->AFR[0]  = 0xCCCCCCCC;
+  GPIOI->AFR[1]  = 0x00000CC0;
+  /* Configure PIx pins in Alternate function mode */ 
+  GPIOI->MODER   = 0x0028AAAA;
+  /* Configure PIx pins speed to 50 MHz */ 
+  GPIOI->OSPEEDR = 0x0028AAAA;
+  /* Configure PIx pins Output type to push-pull */  
+  GPIOI->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PIx pins */ 
+  GPIOI->PUPDR   = 0x00000000;
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
+  
+/*-- FMC Configuration -------------------------------------------------------*/
+  /* Enable the FMC interface clock */
+  RCC->AHB3ENR |= 0x00000001;
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+
+  /* Configure and enable SDRAM bank1 */
+#if defined(STM32F446xx)
+  FMC_Bank5_6->SDCR[0] = 0x00001954;
+#else  
+  FMC_Bank5_6->SDCR[0] = 0x000019E4;
+#endif /* STM32F446xx */
+  FMC_Bank5_6->SDTR[0] = 0x01115351;      
+  
+  /* SDRAM initialization sequence */
+  /* Clock enable command */
+  FMC_Bank5_6->SDCMR = 0x00000011; 
+  tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  }
+
+  /* Delay */
+  for (index = 0; index<1000; index++);
+  
+  /* PALL command */
+  FMC_Bank5_6->SDCMR = 0x00000012;           
+  timeout = 0xFFFF;
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  }
+  
+  /* Auto refresh command */
+#if defined(STM32F446xx)
+  FMC_Bank5_6->SDCMR = 0x000000F3;
+#else  
+  FMC_Bank5_6->SDCMR = 0x00000073;
+#endif /* STM32F446xx */
+  timeout = 0xFFFF;
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  }
+ 
+  /* MRD register program */
+#if defined(STM32F446xx)
+  FMC_Bank5_6->SDCMR = 0x00044014;
+#else  
+  FMC_Bank5_6->SDCMR = 0x00046014;
+#endif /* STM32F446xx */
+  timeout = 0xFFFF;
+  while((tmpreg != 0) && (timeout-- > 0))
+  {
+    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 
+  } 
+  
+  /* Set refresh count */
+  tmpreg = FMC_Bank5_6->SDRTR;
+#if defined(STM32F446xx)
+  FMC_Bank5_6->SDRTR = (tmpreg | (0x0000050C<<1));
+#else    
+  FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
+#endif /* STM32F446xx */
+  
+  /* Disable write protection */
+  tmpreg = FMC_Bank5_6->SDCR[0]; 
+  FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
+#endif /* DATA_IN_ExtSDRAM */
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
+
+#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
+ || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+ || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
+
+#if defined(DATA_IN_ExtSRAM)
+/*-- GPIOs Configuration -----------------------------------------------------*/
+   /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
+  RCC->AHB1ENR   |= 0x00000078;
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);
+  
+  /* Connect PDx pins to FMC Alternate function */
+  GPIOD->AFR[0]  = 0x00CCC0CC;
+  GPIOD->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PDx pins in Alternate function mode */  
+  GPIOD->MODER   = 0xAAAA0A8A;
+  /* Configure PDx pins speed to 100 MHz */  
+  GPIOD->OSPEEDR = 0xFFFF0FCF;
+  /* Configure PDx pins Output type to push-pull */  
+  GPIOD->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PDx pins */ 
+  GPIOD->PUPDR   = 0x00000000;
+
+  /* Connect PEx pins to FMC Alternate function */
+  GPIOE->AFR[0]  = 0xC00CC0CC;
+  GPIOE->AFR[1]  = 0xCCCCCCCC;
+  /* Configure PEx pins in Alternate function mode */ 
+  GPIOE->MODER   = 0xAAAA828A;
+  /* Configure PEx pins speed to 100 MHz */ 
+  GPIOE->OSPEEDR = 0xFFFFC3CF;
+  /* Configure PEx pins Output type to push-pull */  
+  GPIOE->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PEx pins */ 
+  GPIOE->PUPDR   = 0x00000000;
+
+  /* Connect PFx pins to FMC Alternate function */
+  GPIOF->AFR[0]  = 0x00CCCCCC;
+  GPIOF->AFR[1]  = 0xCCCC0000;
+  /* Configure PFx pins in Alternate function mode */   
+  GPIOF->MODER   = 0xAA000AAA;
+  /* Configure PFx pins speed to 100 MHz */ 
+  GPIOF->OSPEEDR = 0xFF000FFF;
+  /* Configure PFx pins Output type to push-pull */  
+  GPIOF->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PFx pins */ 
+  GPIOF->PUPDR   = 0x00000000;
+
+  /* Connect PGx pins to FMC Alternate function */
+  GPIOG->AFR[0]  = 0x00CCCCCC;
+  GPIOG->AFR[1]  = 0x000000C0;
+  /* Configure PGx pins in Alternate function mode */ 
+  GPIOG->MODER   = 0x00085AAA;
+  /* Configure PGx pins speed to 100 MHz */ 
+  GPIOG->OSPEEDR = 0x000CAFFF;
+  /* Configure PGx pins Output type to push-pull */  
+  GPIOG->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PGx pins */ 
+  GPIOG->PUPDR   = 0x00000000;
+  
+/*-- FMC/FSMC Configuration --------------------------------------------------*/
+  /* Enable the FMC/FSMC interface clock */
+  RCC->AHB3ENR         |= 0x00000001;
+
+#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+  /* Configure and enable Bank1_SRAM2 */
+  FMC_Bank1->BTCR[2]  = 0x00001011;
+  FMC_Bank1->BTCR[3]  = 0x00000201;
+  FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ 
+#if defined(STM32F469xx) || defined(STM32F479xx)
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
+  /* Configure and enable Bank1_SRAM2 */
+  FMC_Bank1->BTCR[2]  = 0x00001091;
+  FMC_Bank1->BTCR[3]  = 0x00110212;
+  FMC_Bank1E->BWTR[2] = 0x0fffffff;
+#endif /* STM32F469xx || STM32F479xx */
+#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)\
+   || defined(STM32F412Zx) || defined(STM32F412Vx)
+  /* Delay after an RCC peripheral clock enabling */
+  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN);
+  /* Configure and enable Bank1_SRAM2 */
+  FSMC_Bank1->BTCR[2]  = 0x00001011;
+  FSMC_Bank1->BTCR[3]  = 0x00000201;
+  FSMC_Bank1E->BWTR[2] = 0x0FFFFFFF;
+#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx */
+
+#endif /* DATA_IN_ExtSRAM */
+#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
+          STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx  */ 
+  (void)(tmp); 
+}
+#endif /* DATA_IN_ExtSRAM && DATA_IN_ExtSDRAM */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/NN/NN_Lib_Tests/nn_test/runTest.bat b/NN/NN_Lib_Tests/nn_test/runTest.bat
new file mode 100644
index 0000000..fbf8cdb
--- /dev/null
+++ b/NN/NN_Lib_Tests/nn_test/runTest.bat
@@ -0,0 +1,57 @@
+@echo off
+
+set UVEXE=C:\Keil_v5\UV4\UV4.EXE
+
+echo Building NN Test for Cortex-M7 Single Precision Little Endian
+%UVEXE% -rb -j0 arm_nnexamples_nn_test.uvprojx -t "ARMCM7_SP" -o "NN_Test_ARMCM7_SP_build.log"
+
+echo Running NN Test for Cortex-M7 Single Precision Little Endian
+%UVEXE% -d arm_nnexamples_nn_test.uvprojx -t "ARMCM7_SP" -j0
+
+type NN_TEST.log
+del NN_TEST.log
+
+echo Building NN Test for Cortex-M4 FP Little Endian
+%UVEXE% -rb -j0 arm_nnexamples_nn_test.uvprojx -t "ARMCM4_FP" -o "NN_Test_ARMCM4_FP_build.log"
+
+echo Running NN Test for Cortex-M4 FP Little Endian
+%UVEXE% -d arm_nnexamples_nn_test.uvprojx -t "ARMCM4_FP" -j0
+
+type NN_TEST.log
+del NN_TEST.log
+
+echo Building NN Test for Cortex-M4 FP Little Endian Truncate
+%UVEXE% -rb -j0 arm_nnexamples_nn_test.uvprojx -t "ARMCM4_FP_truncate" -o "NN_Test_ARMCM4_FP_truncate_build.log"
+
+echo Running NN Test for Cortex-M4 FP Little Endian Truncate
+%UVEXE% -d arm_nnexamples_nn_test.uvprojx -t "ARMCM4_FP_truncate" -j0
+
+type NN_TEST.log
+del NN_TEST.log
+
+echo Building NN Test for Cortex-M7 Single Precision Big Endian
+%UVEXE% -rb -j0 arm_nnexamples_nn_test.uvprojx -t "ARMCM7b_SP" -o "NN_Test_ARMCM7b_SP_build.log"
+
+echo Running NN Test for Cortex-M7 Single Precision Big Endian
+%UVEXE% -d arm_nnexamples_nn_test.uvprojx -t "ARMCM7b_SP" -j0
+
+type NN_TEST.log
+del NN_TEST.log
+
+echo Building NN Test for Cortex-M4 FP Big Endian
+%UVEXE% -rb -j0 arm_nnexamples_nn_test.uvprojx -t "ARMCM4b_FP" -o "NN_Test_ARMCM4b_FP_build.log"
+
+echo Running NN Test for Cortex-M4 FP Big Endian
+%UVEXE% -d arm_nnexamples_nn_test.uvprojx -t "ARMCM4b_FP" -j0
+
+type NN_TEST.log
+del NN_TEST.log
+
+echo Building NN Test for Cortex-M3
+%UVEXE% -rb -j0 arm_nnexamples_nn_test.uvprojx -t "ARMCM3" -o "NN_Test_ARMCM3_build.log"
+
+echo Running NN Test for Cortex-M3
+%UVEXE% -d arm_nnexamples_nn_test.uvprojx -t "ARMCM3" -j0
+
+type NN_TEST.log
+del NN_TEST.log
\ No newline at end of file
diff --git a/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c b/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c
new file mode 100644
index 0000000..b6cd573
--- /dev/null
+++ b/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c
@@ -0,0 +1,239 @@
+/*
+ * Copyright (C) 2010-2019 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS NN Library
+ * Title:        arm_depthwise_conv_u8_basic_ver1.c
+ * Description:  u8 depthwise convolution function
+ *
+ * $Date:        June, 2019
+ * $Revision:    V.0.8.0
+ *
+ * Target :  Cortex-M cores with DSP extension
+ *
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "arm_nnfunctions.h"
+#include <stdint.h>
+#include <stdio.h>
+
+#define DILATION_X (1)
+#define DILATION_Y (1)
+
+/**
+ *  @ingroup groupNN
+ */
+
+/**
+ * @addtogroup NNConv
+ * @{
+ */
+
+/**
+ * @brief uint8 depthwise convolution function with asymmetric quantization for even number of channel multiplier
+ *        and input channels. Unless specified otherwise, arguments are mandatory. Both square and non-square inputs
+ *        are accepted.
+ *
+ * @param[in]     input     Pointer to input tensor
+ * @param[in]     input_x   Width of input tensor
+ * @param[in]     input_y   Height of input tensor
+ * @param[in]     input_ch  Channels in input tensor
+ * @param[in]     kernel    Pointer to kernel weights
+ * @param[in]     kernel_x  Width of kernel
+ * @param[in]     kernel_y  Height of kernel
+ * @param[in]     ch_mult   Number of channel multiplier
+ * @param[in]     pad_x     Padding sizes x
+ * @param[in]     pad_y     Padding sizes y
+ * @param[in]     stride_x  Convolution stride along the width
+ * @param[in]     stride_y  Convolution stride along the height
+ * @param[in]     dilation_x Dilation along width. Not used and intended for future enhancement.
+ * @param[in]     dilation_y Dilation along height. Not used and intended for future enhancement.
+ * @param[in]     bias       Pointer to optional bias values. If no bias is
+ *                           availble, NULL is expected
+ * @param[in]     input_offset  Input tensor zero offset
+ * @param[in]     filter_offset Kernel tensor zero offset
+ * @param[in]     output_offset Output tensor zero offset
+ * @param[in,out] output        Pointer to output tensor
+ * @param[in]     output_x  Width of output tensor
+ * @param[in]     output_y  Height of output tensor
+ * @param[in]     output_activation_min   Minimum value to clamp the output to. Range : {0, 255}
+ * @param[in]     output_activation_max   Minimum value to clamp the output to. Range : {0, 255}
+ * @param[in]     out_shift  Amount of right-shift for output
+ * @param[in]     out_mult   Output multiplier for requantization
+ * @return        The function returns one of the following
+ *                <code>ARM_MATH_SIZE_MISMATCH</code> - Not supported dimension of tensors
+ *                <code>ARM_MATH_SUCCESS</code> - Successful operation
+ *                <code>ARM_MATH_ARGUMENT_ERROR</code> - Implementation not available
+ *
+ * <b> Input constraints</b>
+ * ch_mult  is multiple of 2
+ * kernel_x is multiple of 2
+ *
+ */
+
+arm_status arm_depthwise_conv_u8_basic_ver1(const uint8_t *input,
+                                            const uint16_t input_x,
+                                            const uint16_t input_y,
+                                            const uint16_t input_ch,
+                                            const uint8_t *kernel,
+                                            const uint16_t kernel_x,
+                                            const uint16_t kernel_y,
+                                            const int16_t ch_mult,
+                                            const int16_t pad_x,
+                                            const int16_t pad_y,
+                                            const int16_t stride_x,
+                                            const int16_t stride_y,
+                                            const int16_t dilation_x,
+                                            const int16_t dilation_y,
+                                            const int32_t *bias,
+                                            const int32_t input_offset,
+                                            const int32_t filter_offset,
+                                            const int32_t output_offset,
+                                            uint8_t *output,
+                                            const uint16_t output_x,
+                                            const uint16_t output_y,
+                                            const int32_t output_activation_min,
+                                            const int32_t output_activation_max,
+                                            const int32_t out_shift,
+                                            const int32_t out_mult)
+{
+    arm_status status = ARM_MATH_SUCCESS;
+ #if defined (ARM_MATH_DSP)
+    int i_out = 0;
+    (void)dilation_x;
+    (void)dilation_y;
+
+    const int32_t input_offset_pkd = (input_offset & 0xFFFF) | (input_offset & 0xFFFF) << 16;
+    const int32_t kernel_offset_pkd = (filter_offset & 0xFFFF) | (filter_offset & 0xFFFF) << 16;
+
+    if (0 != ch_mult % 2 || 0 != kernel_x % 2)
+    {
+        return ARM_MATH_SIZE_MISMATCH;
+    }
+
+    for (int i_out_y = 0; i_out_y < output_y; i_out_y++)
+    {
+        const int16_t base_idx_y = (i_out_y * stride_y) - pad_y;
+        for (int i_out_x = 0; i_out_x < output_x; i_out_x++)
+        {
+            const int16_t base_idx_x = (i_out_x * stride_x) - pad_x;
+            for (int i_input_ch = 0; i_input_ch < input_ch; i_input_ch++)
+            {
+                for (int i_ch_mult = 0; i_ch_mult < ch_mult; i_ch_mult += 2)
+                {
+                    const int idx_out_ch = i_ch_mult + i_input_ch * ch_mult;
+
+                    int32_t acc_0 = 0;
+                    int32_t acc_1 = 0;
+                    if (NULL != bias)
+                    {
+                        acc_0 = bias[idx_out_ch];
+                        acc_1 = bias[idx_out_ch + 1];
+                    }
+
+                    for (int i_ker_y = 0; i_ker_y < kernel_y; i_ker_y++)
+                    {
+                        const int32_t idx_y = base_idx_y + DILATION_Y * i_ker_y;
+                        const int32_t y_in_range = (idx_y >= 0) && (idx_y < input_y);
+
+                        for (int i_ker_x = 0; i_ker_x < kernel_x; i_ker_x += 2)
+                        {
+                            if (1 == y_in_range)
+                            {
+                                const int32_t idx_x = base_idx_x + DILATION_X * i_ker_x;
+                                const int32_t idx_x1 = base_idx_x + DILATION_X * (i_ker_x + 1);
+                                /* Range check for first input */
+                                if (idx_x >= 0 && idx_x < input_x)
+                                {
+                                    const int32_t idx_0 = (idx_y * input_x + idx_x) * input_ch + i_input_ch;
+
+                                    const int32_t ker_idx_0 =
+                                        (i_ker_y * kernel_x + i_ker_x) * (input_ch * ch_mult) + idx_out_ch;
+                                    const int32_t ker_idx_1 = ker_idx_0 + input_ch * ch_mult;
+
+                                    int32_t input_pkd = input[idx_0] | (input[idx_0 + input_ch] << 16);
+                                    int32_t kernel_pkd = kernel[ker_idx_0] | (kernel[ker_idx_1] << 16);
+
+                                    input_pkd = __SADD16(input_pkd, input_offset_pkd);
+                                    kernel_pkd = __SADD16(kernel_pkd, kernel_offset_pkd);
+                                    /* Range check for second input */
+                                    if (idx_x1 >= input_x)
+                                    {
+                                        input_pkd &= 0xFFFF;
+                                    }
+                                    acc_0 = __SMLAD(input_pkd, kernel_pkd, acc_0);
+
+                                    kernel_pkd = kernel[ker_idx_0 + 1] | (kernel[ker_idx_1 + 1] << 16);
+                                    kernel_pkd = __SADD16(kernel_pkd, kernel_offset_pkd);
+                                    acc_1 = __SMLAD(input_pkd, kernel_pkd, acc_1);
+                                }
+                            }
+                        }
+                    }
+
+                    /* Requantize and clamp output to provided range */
+                    acc_0 = arm_nn_divide_by_power_of_two(arm_nn_sat_doubling_high_mult(
+                                                              acc_0 * (1 << LEFT_SHIFT(out_shift)), out_mult),
+                                                          RIGHT_SHIFT(out_shift));
+
+                    acc_0 += output_offset;
+
+                    if (output_activation_min > acc_0)
+                    {
+                        acc_0 = output_activation_min;
+                    }
+
+                    if (acc_0 > output_activation_max)
+                    {
+                        acc_0 = output_activation_max;
+                    }
+                    output[i_out++] = acc_0;
+
+                    /* Requantize and clamp output to provided range */
+                    acc_1 = arm_nn_divide_by_power_of_two(arm_nn_sat_doubling_high_mult(
+                                                              acc_1 * (1 << LEFT_SHIFT(out_shift)), out_mult),
+                                                          RIGHT_SHIFT(out_shift));
+                    acc_1 += output_offset;
+
+                    if (output_activation_min > acc_1)
+                    {
+                        acc_1 = output_activation_min;
+                    }
+
+                    if (acc_1 > output_activation_max)
+                    {
+                        acc_1 = output_activation_max;
+                    }
+                    output[i_out++] = acc_1;
+                }
+            }
+        }
+    }
+#else
+    /* No available implementation. */
+    status = ARM_MATH_ARGUMENT_ERROR;
+#endif
+    return status;
+}
+
+/**
+ * @} end of NNConv group
+ */
+
+
diff --git a/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c b/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c
index b451f5e..2956774 100644
--- a/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c
+++ b/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c
@@ -50,12 +50,12 @@
 }
 
 static void compare_and_replace_if_larger_q7(q7_t * base,   // base data
-                                             q7_t * target, // compare target
+                                             const q7_t * target,   // compare target
                                              const uint16_t length  // data length
     )
 {
     q7_t     *pIn = base;
-    q7_t     *pCom = target;
+    const q7_t     *pCom = target;
     union arm_nnword in;
     union arm_nnword com;
     uint16_t  cnt = length >> 2;
@@ -79,6 +79,18 @@
 
         cnt--;
     }
+
+    cnt = length & 0x3;
+    while (cnt > 0u)
+    {
+      if (*pCom > *pIn)
+      {
+        *pIn = *pCom;
+      }
+      pIn++;
+      pCom++;
+      cnt--;
+    }
 }
 
 static void accumulate_q7_to_q15(q15_t * base, q7_t * target, const uint16_t length)
diff --git a/README.md b/README.md
index c90c9a6..e80769f 100644
--- a/README.md
+++ b/README.md
@@ -1,6 +1,6 @@
 # CMSIS Version 5
 
-The branch *master* of this GitHub repository contains the CMSIS Version 5.4.0.  The [documentation](http://arm-software.github.io/CMSIS_5/General/html/index.html) is available under http://arm-software.github.io/CMSIS_5/General/html/index.html
+The branch *master* of this GitHub repository contains the CMSIS Version 5.6.0.  The [documentation](http://arm-software.github.io/CMSIS_5/General/html/index.html) is available under http://arm-software.github.io/CMSIS_5/General/html/index.html
 
 Use [Issues](https://github.com/ARM-software/CMSIS_5#issues-and-labels) to provide feedback and report problems for CMSIS Version 5. 
 
@@ -8,6 +8,24 @@
 
 A [pre-built documentation](http://www.keil.com/pack/doc/CMSIS_Dev/index.html) is updated from time to time, but may be also generated using the instructions under [Generate CMSIS Pack for Release](https://github.com/ARM-software/CMSIS_5#generate-cmsis-pack-for-release).
 
+## Overview of CMSIS Components
+
+The following is an list of all CMSIS components that are available.
+
+| CMSIS-... | Target Processors   | Description  |
+|:----------|:--------------------|:-------------|
+|[Core(M)](http://arm-software.github.io/CMSIS_5/Core/html/index.html)  | All Cortex-M, SecurCore | Standardized API for the Cortex-M processor core and peripherals. Includes intrinsic functions for Cortex-M4/M7/M33/M35P SIMD instructions.|
+|[Core(A)](http://arm-software.github.io/CMSIS_5/Core_A/html/index.html)| Cortex-A5/A7/A9 | API and basic run-time system for the Cortex-A5/A7/A9 processor core and peripherals.|
+|[Driver](http://arm-software.github.io/CMSIS_5/Driver/html/index.html) | All Cortex-M, SecurCore | Generic peripheral driver interfaces for middleware. Connects microcontroller peripherals with middleware that implements for example communication stacks, file systems, or graphic user interfaces.|
+|[DSP](http://arm-software.github.io/CMSIS_5/DSP/html/index.html)       | All Cortex-M | DSP library collection with over 60 Functions for various data types: fixed-point (fractional q7, q15, q31) and single precision floating-point (32-bit). Implementations optimized for the SIMD instruction set are available for Cortex-M4/M7/M33/M35P.|
+|[NN](http://arm-software.github.io/CMSIS_5/NN/html/index.html)        | All Cortex-M | Collection of efficient neural network kernels developed to maximize the performance and minimize the memory footprint on Cortex-M processor cores.|
+|[RTOS v1](http://arm-software.github.io/CMSIS_5/RTOS/html/index.html) | Cortex-M0/M0+/M3/M4/M7 | Common API for real-time operating systems along with a reference implementation based on RTX. It enables software components that can work across multiple RTOS systems.|
+|[RTOS v2](http://arm-software.github.io/CMSIS_5/RTOS2/html/index.html)| All Cortex-M, Cortex-A5/A7/A9 | Extends CMSIS-RTOS v1 with Armv8-M support, dynamic object creation, provisions for multi-core systems, binary compatible interface. |
+|[Pack](http://arm-software.github.io/CMSIS_5/Pack/html/index.html)    | All Cortex-M, SecurCore, Cortex-A5/A7/A9 | Describes a delivery mechanism for software components, device parameters, and evaluation board support. It simplifies software re-use and product life-cycle management (PLM). |
+|[SVD](http://arm-software.github.io/CMSIS_5/SVD/html/index.html)      | All Cortex-M, SecurCore | Peripheral description of a device that can be used to create peripheral awareness in debuggers or CMSIS-Core header files.|
+|[DAP](http://arm-software.github.io/CMSIS_5/DAP/html/index.html)      | All Cortex | Firmware for a debug unit that interfaces to the CoreSight Debug Access Port. |
+|[Zone](http://arm-software.github.io/CMSIS_5/Zone/html/index.html)    | All Cortex | Defines methods to describe system resources and to partition these resources into multiple projects and execution areas. |
+
 ## Implemented Enhancements
  - CMSIS-Core-A, RTX5: implementation for Cortex-A5/A7/A9
  - Support for Armv8-M Architecture (Mainline and Baseline) as well as devices Cortex-M23 and Cortex-M33
@@ -26,33 +44,49 @@
    - CPDSC project file format: allows project templates that are agnostic of an IDE
    - Minimize need for IDE specific settings: CMSIS-Pack supports IDE specific parameters. Analyze and minimize 
 
-For further details see also the [Slides of the Embedded World CMSIS Partner Meeting](https://github.com/ARM-software/CMSIS_5/blob/develop/CMSIS_EW2018.pdf).
+For further details see also the [Slides of the Embedded World CMSIS Partner Meeting](https://github.com/ARM-software/CMSIS_5/blob/develop/CMSIS_EW2019.pdf).
+
+## Other related GitHub repositories
+
+| Repository                  | Description                                               |                
+|:--------------------------- |:--------------------------------------------------------- |
+| [cmsis-pack-eclipse](https://github.com/ARM-software/cmsis-pack-eclipse)    |  CMSIS-Pack Management for Eclipse reference implementation Pack support  |
+| [CMSIS-FreeRTOS](https://github.com/arm-software/CMSIS-FreeRTOS)            | CMSIS-RTOS adoption of FreeRTOS                                                      |
+| [CMSIS-Driver](https://github.com/arm-software/CMSIS-Driver)                | Generic MCU driver implementations and templates for Ethernet MAC/PHY and Flash.  |
+| [CMSIS-Driver_Validation](https://github.com/ARM-software/CMSIS-Driver_Validation) | CMSIS-Driver Validation can be used to verify CMSIS-Driver in a user system |
+| [CMSIS-Zone](https://github.com/ARM-software/CMSIS-Zone)                    | CMSIS-Zone Utility along with example projects and FreeMarker templates         |
+| [NXP_LPC](https://github.com/ARM-software/NXP_LPC)                          | CMSIS Driver Implementations for the NXP LPC Microcontroller Series       |
+| [mdk-packs](https://github.com/mdk-packs)                                   | IoT cloud connectors as trail implementations for MDK (help us to make it generic)|
+| [trustedfirmware.org](https://www.trustedfirmware.org/)                     | Arm Trusted Firmware provides a reference implementation of secure world software for Armv8-A and Armv8-M.|
+ 
 
 ## Directory Structure
 
-| Directory       | Content                                        |                
-| --------------- | ---------------------------------------------- |
-| CMSIS/Core      | CMSIS-Core related files (for release)         |
-| CMSIS/DAP       | CMSIS-DAP related files and examples           |
-| CMSIS/Driver    | CMSIS-Driver API headers and template files    |
-| CMSIS/DSP       | CMSIS-DSP related files                        |
-| CMSIS/NN        | CMSIS-NN related files                         |
-| CMSIS/RTOS      | RTOS v1 related files (for Cortex-M)           |
-| CMSIS/RTOS2     | RTOS v2 related files (for Cortex-M & Armv8-M) |
-| CMSIS/Pack      | CMSIS-Pack examples and tutorials              |
-| CMSIS/DoxyGen   | Source of the documentation                    |
-| CMSIS/Utilities | Utility programs                               |
+| Directory            | Content                                                   |                
+|:-------------------- |:--------------------------------------------------------- |
+| CMSIS/Core           | CMSIS-Core(M) related files (for release)                 |
+| CMSIS/Core_A         | CMSIS-Core(A) related files (for release)                 |
+| CMSIS/CoreValidation | Validation for Core(M) and Core(A) (NOT part of release)  |
+| CMSIS/DAP            | CMSIS-DAP related files and examples                      |
+| CMSIS/Driver         | CMSIS-Driver API headers and template files               |
+| CMSIS/DSP            | CMSIS-DSP related files                                   |
+| CMSIS/NN             | CMSIS-NN related files                                    |
+| CMSIS/RTOS           | RTOS v1 related files (for Cortex-M)                      |
+| CMSIS/RTOS2          | RTOS v2 related files (for Cortex-M & Armv8-M)            |
+| CMSIS/Pack           | CMSIS-Pack examples and tutorials                         |
+| CMSIS/DoxyGen        | Source of the documentation                               |
+| CMSIS/Utilities      | Utility programs                                          |
 
 ## Generate CMSIS Pack for Release
 
-This GitHub development repository contains already pre-built libraries of various software components (DSP, RTOS, RTOS2).
-These libraries are validated for release.
+This GitHub development repository contains already pre-built libraries (stored in Git-LFS) of various software components (DSP, RTOS, RTOS2).
+These libraries are validated for release. Git-LFS needs to be installed to retrieve the actual binary files, please see https://git-lfs.github.com/.
 
 To build a complete CMSIS pack for installation the following additional tools are required:
  - **doxygen.exe**    Version: 1.8.6 (Documentation Generator)
  - **mscgen.exe**     Version: 0.20  (Message Sequence Chart Converter)
  - **7z.exe (7-Zip)** Version: 16.02 (File Archiver)
-  
+ 
 Using these tools, you can generate on a Windows PC:
  - **CMSIS Software Pack** using the batch file **gen_pack.bat** (located in ./CMSIS/Utilities). This batch file also generates the documentation.
   
diff --git a/docs/Core/html/annotated.html b/docs/Core/html/annotated.html
index ad4b9ea..cd9eb9e 100644
--- a/docs/Core/html/annotated.html
+++ b/docs/Core/html/annotated.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -141,7 +141,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/classes.html b/docs/Core/html/classes.html
index 470e04e..f3597d5 100644
--- a/docs/Core/html/classes.html
+++ b/docs/Core/html/classes.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -144,7 +144,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/cmsis.css b/docs/Core/html/cmsis.css
index bba1010..586d4d2 100644
--- a/docs/Core/html/cmsis.css
+++ b/docs/Core/html/cmsis.css
@@ -1148,7 +1148,7 @@
 
 .image
 {
-        text-align: center;
+        text-align: left;
 }
 
 .dotgraph
diff --git a/docs/Core/html/coreMISRA_Exceptions_pg.html b/docs/Core/html/coreMISRA_Exceptions_pg.html
index d6b95dc..924ec18 100644
--- a/docs/Core/html/coreMISRA_Exceptions_pg.html
+++ b/docs/Core/html/coreMISRA_Exceptions_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -111,58 +111,13 @@
 <div class="title">MISRA-C Deviations </div>  </div>
 </div><!--header-->
 <div class="contents">
-<div class="textblock"><p>CMSIS-Core (Cortex-M) uses the common coding rules for CMSIS components that are documented under <a href="../../General/html/index.html"><b>Introduction</b></a>.</p>
-<p>CMSIS-Core (Cortex-M) violates the following MISRA-C:2004 rules:</p>
-<ul>
-<li>Required Rule 8.5, object/function definition in header file.<br/>
- Violated since function definitions in header files are used for function inlining'.</li>
-<li>Advisory Rule 12.4, Side effects on right hand side of logical operator.<br/>
- Violated because volatile is used for core register definitions.</li>
-<li>Advisory Rule 14.7, Return statement before end of function.<br/>
- Violated to simplify code logic.</li>
-<li>Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br/>
- Violated since unions are used for effective representation of core registers.</li>
-<li>Advisory Rule 19.4, Disallowed definition for macro.<br/>
- Violated since macros are used for assembler keywords.</li>
-<li>Advisory Rule 19.7, Function-like macro defined.<br/>
- Violated since function-like macros are used to generate more efficient code.</li>
-<li>Advisory Rule 19.16, all preprocessing directives must be valid.<br/>
- Violated to set default settings for macros.</li>
-</ul>
-<p>CMSIS-Core (Cortex-M) violates the following MISRA-C:2012 rules:</p>
-<ul>
-<li>Directive 4.9, function-like macro defined.<br/>
- Violated since function-like macros are used to generate more efficient code.</li>
-<li>Rule 1.3, multiple use of '#/##' operators in macro definition.<br/>
- Violated since function-like macros are used to generate more efficient code.</li>
-<li>Rule 11.4, conversion between a pointer and integer type.<br/>
- Violated because of core register access.</li>
-<li>Rule 11.6, cast from unsigned long to pointer.<br/>
- Violated because of core register access.</li>
-<li>Rule 13.5, side effects on right hand side of logical operator.<br/>
- Violated because of shift operand is used in macros and functions.</li>
-<li>Rule 14.4, conditional expression should have essentially Boolean type.<br/>
- Violated since macros with several instructions are used.</li>
-<li>Rule 15.5, return statement before end of function.<br/>
- Violated to simplify code logic.</li>
-<li>Rule 20.10, '#/##' operators used.<br/>
- Violated since function-like macros are used to generate more efficient code.</li>
-<li>Rule 21.1, reserved to the compiler.<br/>
- Violated since macros with leading underscores are used.</li>
-</ul>
-<p>&lt;device&gt;.h files generated by <b>SVDConv.exe</b> violate the following MISRA-C:2004 rules:</p>
-<ul>
-<li>Advisory Rule 20.2, Re-use of C90 identifier pattern.<br/>
- Violated since CMSIS macros begin with '__'. Since CMSIS is developed and verified with various compilers this approach is acceptable and avoids conflicts with user symbols.</li>
-<li>Advisory Rule 19.1, Declaration before #include.<br/>
- Violated since Interrupt Number Definition Type (IRQn_Type) must be defined before including the core header file. </li>
-</ul>
+<div class="textblock"><p>CMSIS-Core (Cortex-M) uses the common coding rules for CMSIS components that are documented under <a href="../../General/html/index.html"><b>Introduction</b></a> . </p>
 </div></div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/core_revisionHistory.html b/docs/Core/html/core_revisionHistory.html
index 0016702..a4a3f03 100644
--- a/docs/Core/html/core_revisionHistory.html
+++ b/docs/Core/html/core_revisionHistory.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -115,27 +115,33 @@
 <tr>
 <th>Version </th><th>Description  </th></tr>
 <tr>
+<td>V5.3.0 </td><td>Added: Provisions for compiler-independent C startup code.   </td></tr>
+<tr>
+<td>V5.2.1 </td><td>Fixed: Compilation issue in cmsis_armclang_ltm.h introduced in 5.2.0   </td></tr>
+<tr>
+<td>V5.2.0 </td><td>Added: Cortex-M35P support.<br/>
+ Added: Cortex-M1 support.<br/>
+ Added: Armv8.1 architecture support.<br/>
+ Added: <a class="el" href="group__compiler__conntrol__gr.html#ga378ac21329d33f561f90265eef89f564">__RESTRICT</a> and <a class="el" href="group__compiler__conntrol__gr.html#gab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> compiler control macros.   </td></tr>
+<tr>
 <td>V5.1.2 </td><td>Removed using get/set built-ins FPSCR in GCC &gt;= 7.2 due to shortcomings.<br/>
  Added __NO_RETURN to __NVIC_SystemReset() to silence compiler warnings.<br/>
  Added support for Cortex-M1 (beta). <br/>
  Removed usage of register keyword. <br/>
  Added defines for EXC_RETURN, FNC_RETURN and integrity signature values. <br/>
- Enhanced MPUv7 API with defines for memory access attributes.<br/>
-   </td></tr>
+ Enhanced MPUv7 API with defines for memory access attributes.   </td></tr>
 <tr>
-<td>V5.1.1 </td><td>Aligned MSPLIM and PSPLIM access functions along supported compilers.<br/>
-   </td></tr>
+<td>V5.1.1 </td><td>Aligned MSPLIM and PSPLIM access functions along supported compilers.   </td></tr>
 <tr>
 <td>V5.1.0 </td><td>Added MPU Functions for ARMv8-M for Cortex-M23/M33.<br/>
  Moved __SSAT and __USAT intrinsics to CMSIS-Core.<br/>
- Aligned __REV, __REV16 and __REVSH intrinsics along supported compilers.<br/>
-   </td></tr>
+ Aligned __REV, __REV16 and __REVSH intrinsics along supported compilers.   </td></tr>
 <tr>
 <td>V5.0.2 </td><td>Added macros <a class="el" href="group__compiler__conntrol__gr.html#gabe8693a7200e573101551d49a1772fb9">__UNALIGNED_UINT16_READ</a>, <a class="el" href="group__compiler__conntrol__gr.html#gadb9cd73446f7e11e92383cd327a23407">__UNALIGNED_UINT16_WRITE</a>.<br/>
  Added macros <a class="el" href="group__compiler__conntrol__gr.html#ga254322c344d954c9f829719a50a88e87">__UNALIGNED_UINT32_READ</a>, <a class="el" href="group__compiler__conntrol__gr.html#gabb2180285c417aa9120a360c51f64b4b">__UNALIGNED_UINT32_WRITE</a>.<br/>
  Deprecated macro <a class="el" href="group__compiler__conntrol__gr.html#ga27fd2ec6767ca1ab66d36b5cc0103268">__UNALIGNED_UINT32</a>.<br/>
  Changed <a class="el" href="group__version__control__gr.html">Version Control</a> macros to be core agnostic. <br/>
- Added <a class="el" href="group__mpu__functions.html">MPU Functions for Armv7-M</a> for Cortex-M0+/M3/M4/M7.   </td></tr>
+ Added <a class="el" href="group__mpu__functions.html">MPU Functions for Armv6-M/v7-M</a> for Cortex-M0+/M3/M4/M7.   </td></tr>
 <tr>
 <td>V5.0.1 </td><td>Added: macro <a class="el" href="group__compiler__conntrol__gr.html#ga4dbb70fab85207c27b581ecb6532b314">__PACKED_STRUCT</a>. <br/>
  Added: uVisor support. <br/>
@@ -262,7 +268,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/deprecated.html b/docs/Core/html/deprecated.html
index f8b5907..bbc12bc 100644
--- a/docs/Core/html/deprecated.html
+++ b/docs/Core/html/deprecated.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -112,23 +112,17 @@
 </div><!--header-->
 <div class="contents">
 <div class="textblock"><dl class="reflist">
-<dt><a class="anchor" id="_deprecated000004"></a>Global <a class="el" href="group__compiler__conntrol__gr.html#ga27fd2ec6767ca1ab66d36b5cc0103268">__UNALIGNED_UINT32</a>  </dt>
+<dt><a class="anchor" id="_deprecated000001"></a>Global <a class="el" href="group__compiler__conntrol__gr.html#ga27fd2ec6767ca1ab66d36b5cc0103268">__UNALIGNED_UINT32</a>  </dt>
 <dd><p class="startdd">Do not use this macro. It has been superseded by <a class="el" href="group__compiler__conntrol__gr.html#ga254322c344d954c9f829719a50a88e87">__UNALIGNED_UINT32_READ</a>, <a class="el" href="group__compiler__conntrol__gr.html#gabb2180285c417aa9120a360c51f64b4b">__UNALIGNED_UINT32_WRITE</a> and will be removed in the future.</p>
 <p class="enddd"></p>
 </dd>
-<dt><a class="anchor" id="_deprecated000003"></a>Global <a class="el" href="group__version__control__depricated__gr.html#gabea7df329b150f620ee42f9d82516241">__XXX_CMSIS_VERSION</a>  </dt>
-<dd>Only rely on this define for CMSIS 5.0 and before.  </dd>
-<dt><a class="anchor" id="_deprecated000001"></a>Global <a class="el" href="group__version__control__depricated__gr.html#ga2ecc1658e18eb1a0be7959e33b836d05">__XXX_CMSIS_VERSION_MAIN</a>  </dt>
-<dd>Only rely on this define for CMSIS 5.0 and before.  </dd>
-<dt><a class="anchor" id="_deprecated000002"></a>Global <a class="el" href="group__version__control__depricated__gr.html#ga962096f43e0d194f0b79021964c57fbd">__XXX_CMSIS_VERSION_SUB</a>  </dt>
-<dd>Only rely on this define for CMSIS 5.0 and before. </dd>
 </dl>
 </div></div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/device_h_pg.html b/docs/Core/html/device_h_pg.html
index d72aff3..6f3dc2e 100644
--- a/docs/Core/html/device_h_pg.html
+++ b/docs/Core/html/device_h_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -124,7 +124,7 @@
 <p><a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> contains the enumeration <a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> that defines all exceptions and interrupts of the device.</p>
 <ul>
 <li>Negative IRQn values represent processor core exceptions (internal interrupts).</li>
-<li>Positive IRQn values represent device-specific exceptions (external interrupts). The first device-specific interrupt has the IRQn value 0. The IRQn values needs extension to reflect the device-specific interrupt vector table in the <a class="el" href="startup_s_pg.html">Startup File startup_&lt;device&gt;.s</a>.</li>
+<li>Positive IRQn values represent device-specific exceptions (external interrupts). The first device-specific interrupt has the IRQn value 0. The IRQn values needs extension to reflect the device-specific interrupt vector table in the <a class="el" href="startup_s_pg.html">Startup File startup_&lt;device&gt;.s (deprecated)</a>.</li>
 </ul>
 <p><b>Example:</b> </p>
 <p>The following example shows the extension of the interrupt vector table for the LPC1100 device family.</p>
@@ -277,7 +277,7 @@
 <tr>
 <td>__Vendor_SysTickConfig </td><td>0 .. 1 </td><td>0 </td><td>If this define is set to 1, then the default <b>SysTick_Config</b> function is excluded. In this case, the file <em><b>device.h</b></em> must contain a vendor specific implementation of this function.  </td></tr>
 </table>
-<p><b>core_CM33.h</b> or <b>core_ARMv8MML.h</b> </p>
+<p><b>core_CM33.h</b> or <b>core_cm35p.h</b> or <b>core_ARMv8MML.h</b> </p>
 <table  class="cmtable">
 <tr>
 <th>#define </th><th>Value Range </th><th>Default </th><th>Description  </th></tr>
@@ -321,6 +321,12 @@
 <div class="line"><span class="preprocessor">                                        __CM0P_CMSIS_VERSION_SUB          ) </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div>
 <div class="line"><span class="preprocessor"></span> </div>
 <div class="line"><span class="preprocessor">#define __CORTEX_M                    (0U)                                  </span><span class="comment">/* Cortex-M Core */</span><span class="preprocessor"></span></div>
+</div><!-- fragment --><p><b>core_cm1.h</b> </p>
+<div class="fragment"><div class="line"><span class="preprocessor">#define __CM1_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              </span></div>
+<div class="line"><span class="preprocessor">#define __CM1_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               </span></div>
+<div class="line"><span class="preprocessor">#define __CM1_CMSIS_VERSION       ((__CM1_CMSIS_VERSION_MAIN &lt;&lt; 16U) | \</span></div>
+<div class="line"><span class="preprocessor">                                    __CM1_CMSIS_VERSION_SUB           )  </span></div>
+<div class="line"><span class="preprocessor">#define __CORTEX_M                (1U)                                   </span></div>
 </div><!-- fragment --><p><b>core_cm3.h</b> </p>
 <div class="fragment"><div class="line"><span class="preprocessor">#define __CM3_CMSIS_VERSION_MAIN  (5U)                                 </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div>
 <div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM3_CMSIS_VERSION_SUB   (0U)                                 </span><span class="comment">/* [15:0]  CMSIS HAL sub version */</span><span class="preprocessor"></span></div>
@@ -347,14 +353,14 @@
 <div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __SC000_CMSIS_VERSION_SUB   (0U)                                   </span><span class="comment">/* [15:0]  CMSIS HAL sub version */</span><span class="preprocessor"></span></div>
 <div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __SC000_CMSIS_VERSION       ((__SC000_CMSIS_VERSION_MAIN &lt;&lt; 16U) | \</span></div>
 <div class="line"><span class="preprocessor">                                      __SC000_CMSIS_VERSION_SUB          ) </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span> </div>
+<div class="line"><span class="preprocessor"></span></div>
 <div class="line"><span class="preprocessor">#define __CORTEX_SC                 (0U)                                   </span><span class="comment">/* Cortex secure core */</span><span class="preprocessor"></span></div>
 </div><!-- fragment --><p><b>core_sc300.h</b> </p>
 <div class="fragment"><div class="line"><span class="preprocessor">#define __SC300_CMSIS_VERSION_MAIN  (5U)                                   </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div>
 <div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __SC300_CMSIS_VERSION_SUB   (0U)                                   </span><span class="comment">/* [15:0]  CMSIS HAL sub version */</span><span class="preprocessor"></span></div>
 <div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __SC300_CMSIS_VERSION       ((__SC300_CMSIS_VERSION_MAIN &lt;&lt; 16U) | \</span></div>
 <div class="line"><span class="preprocessor">                                      __SC300_CMSIS_VERSION_SUB          ) </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span> </div>
+<div class="line"><span class="preprocessor"></span></div>
 <div class="line"><span class="preprocessor">#define __CORTEX_SC                 (300U)                                 </span><span class="comment">/* Cortex secure core */</span><span class="preprocessor"></span></div>
 </div><!-- fragment --><p><b>core_ARMv8MBL.h</b> </p>
 <div class="fragment"><div class="line"><span class="preprocessor">#define __ARMv8MBL_CMSIS_VERSION_MAIN  (5U)                                       </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div>
@@ -643,7 +649,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/functions.html b/docs/Core/html/functions.html
index e217893..521853d 100644
--- a/docs/Core/html/functions.html
+++ b/docs/Core/html/functions.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -517,7 +517,7 @@
 : <a class="el" href="structMPU__Type.html#a7d15172b163797736a6c6b4dcc0fa3dd">MPU_Type</a>
 </li>
 <li>RBAR
-: <a class="el" href="structARM__MPU__Region__t.html#aa5e3c6aeaddbc0c283085dc971dd1a22">ARM_MPU_Region_t</a>
+: <a class="el" href="structARM__MPU__Region__t.html#afe7a7721aa08988d915670efa432cdd2">ARM_MPU_Region_t</a>
 , <a class="el" href="structMPU__Type.html#a990c609b26d990b8ba832b110adfd353">MPU_Type</a>
 </li>
 <li>RBAR_A1
@@ -561,6 +561,9 @@
 <li>RESERVED7
 : <a class="el" href="structTPI__Type.html#a476ca23fbc9480f1697fbec871130550">TPI_Type</a>
 </li>
+<li>RLAR
+: <a class="el" href="structARM__MPU__Region__t.html#ab5d3a650dbffd0b272bf7df5b140e8a8">ARM_MPU_Region_t</a>
+</li>
 <li>RNR
 : <a class="el" href="structMPU__Type.html#a2f7a117a12cb661c76edc4765453f05c">MPU_Type</a>
 </li>
@@ -668,7 +671,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/functions_vars.html b/docs/Core/html/functions_vars.html
index a5f74d8..fdc2ef2 100644
--- a/docs/Core/html/functions_vars.html
+++ b/docs/Core/html/functions_vars.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -517,7 +517,7 @@
 : <a class="el" href="structMPU__Type.html#a7d15172b163797736a6c6b4dcc0fa3dd">MPU_Type</a>
 </li>
 <li>RBAR
-: <a class="el" href="structARM__MPU__Region__t.html#aa5e3c6aeaddbc0c283085dc971dd1a22">ARM_MPU_Region_t</a>
+: <a class="el" href="structARM__MPU__Region__t.html#afe7a7721aa08988d915670efa432cdd2">ARM_MPU_Region_t</a>
 , <a class="el" href="structMPU__Type.html#a990c609b26d990b8ba832b110adfd353">MPU_Type</a>
 </li>
 <li>RBAR_A1
@@ -561,6 +561,9 @@
 <li>RESERVED7
 : <a class="el" href="structTPI__Type.html#a476ca23fbc9480f1697fbec871130550">TPI_Type</a>
 </li>
+<li>RLAR
+: <a class="el" href="structARM__MPU__Region__t.html#ab5d3a650dbffd0b272bf7df5b140e8a8">ARM_MPU_Region_t</a>
+</li>
 <li>RNR
 : <a class="el" href="structMPU__Type.html#a2f7a117a12cb661c76edc4765453f05c">MPU_Type</a>
 </li>
@@ -668,7 +671,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/globals.html b/docs/Core/html/globals.html
index c6085ac..73454d3 100644
--- a/docs/Core/html/globals.html
+++ b/docs/Core/html/globals.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -177,6 +177,9 @@
 <li>__CM_CMSIS_VERSION_SUB
 : <a class="el" href="group__version__control__gr.html#ga22083cbe7f0606cfd538ec12b2e41608">Ref_VersionControl.txt</a>
 </li>
+<li>__COMPILER_BARRIER
+: <a class="el" href="group__compiler__conntrol__gr.html#ga6f053389e2958b5a239a54d4e4047bf5">Ref_CompilerControl.txt</a>
+</li>
 <li>__CORTEX_M
 : <a class="el" href="group__version__control__gr.html#ga63ea62503c88acab19fcf3d5743009e3">Ref_VersionControl.txt</a>
 </li>
@@ -237,6 +240,9 @@
 <li>__get_xPSR()
 : <a class="el" href="group__Core__Register__gr.html#ga732e08184154f44a617963cc65ff95bd">Ref_CoreReg.txt</a>
 </li>
+<li>__INITIAL_SP
+: <a class="el" href="group__compiler__conntrol__gr.html#ga1002e751427b1189f92787d4e4eef965">Ref_CompilerControl.txt</a>
+</li>
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 </li>
+<li>__PROGRAM_START
+: <a class="el" href="group__compiler__conntrol__gr.html#ga72db8b026c5e100254080fefabd9fd88">Ref_CompilerControl.txt</a>
+</li>
 <li>__QADD()
 : <a class="el" href="group__intrinsic__SIMD__gr.html#ga17b873f246c9f5e9355760ffef3dad4a">Ref_cm4_simd.txt</a>
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@@ -324,6 +333,9 @@
 <li>__RBIT()
 : <a class="el" href="group__intrinsic__CPU__gr.html#gad6f9f297f6b91a995ee199fbc796b863">Ref_cmInstr.txt</a>
 </li>
+<li>__RESTRICT
+: <a class="el" href="group__compiler__conntrol__gr.html#ga378ac21329d33f561f90265eef89f564">Ref_CompilerControl.txt</a>
+</li>
 <li>__REV()
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@@ -331,7 +343,7 @@
 : <a class="el" href="group__intrinsic__CPU__gr.html#gaeef6f853b6df3a365c838ee5b49a7a26">Ref_cmInstr.txt</a>
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-: <a class="el" href="group__intrinsic__CPU__gr.html#ga1ec006e6d79063363cb0c2a2e0b3adbe">Ref_cmInstr.txt</a>
+: <a class="el" href="group__intrinsic__CPU__gr.html#ga211618c03a0bf3264a7b22ad626d4f0a">Ref_cmInstr.txt</a>
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@@ -456,6 +468,12 @@
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 : <a class="el" href="group__intrinsic__SIMD__gr.html#gaba63bb52e1e93fb527e26f3d474da12e">Ref_cm4_simd.txt</a>
 </li>
+<li>__STACK_LIMIT
+: <a class="el" href="group__compiler__conntrol__gr.html#ga84b0bad4aa39632d3faea46aa1e102a8">Ref_CompilerControl.txt</a>
+</li>
+<li>__STATIC_FORCEINLINE
+: <a class="el" href="group__compiler__conntrol__gr.html#gab904513442afdf77d4f8c74f23cbb040">Ref_CompilerControl.txt</a>
+</li>
 <li>__STATIC_INLINE
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 </li>
+<li>__VECTOR_TABLE
+: <a class="el" href="group__compiler__conntrol__gr.html#gab94ebeb20055f1848d7b707d3c7cfc5d">Ref_CompilerControl.txt</a>
+</li>
+<li>__VECTOR_TABLE_ATTRIBUTE
+: <a class="el" href="group__compiler__conntrol__gr.html#ga4f65c96effa79fbd610fea43ee7d745b">Ref_CompilerControl.txt</a>
+</li>
 <li>__WEAK
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@@ -654,15 +678,6 @@
 <li>__WFI()
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-<li>__XXX_CMSIS_VERSION
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-<li>__XXX_CMSIS_VERSION_SUB
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@@ -675,7 +690,7 @@
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
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     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/globals_a.html b/docs/Core/html/globals_a.html
index 16c8841..808fb74 100644
--- a/docs/Core/html/globals_a.html
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@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
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+   &#160;<span id="projectnumber">Version 5.3.0</span>
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    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
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@@ -141,23 +141,76 @@
 <li>ARM_MPU_ACCESS_xxx
 : <a class="el" href="group__mpu__defines.html#ga71d41084e984be70a23cb640fd89d1e2">Ref_MPU.txt</a>
 </li>
+<li>ARM_MPU_AP_
+: <a class="el" href="group__mpu8__functions.html#ga81b2aa3fb55cdd5feadff02da10d391b">Ref_MPU8.txt</a>
+</li>
 <li>ARM_MPU_AP_xxx
 : <a class="el" href="group__mpu__defines.html#gabc4788126d7798469cb862a08d3050cc">Ref_MPU.txt</a>
 </li>
+<li>ARM_MPU_ATTR
+: <a class="el" href="group__mpu8__functions.html#ga2c465cc9429b8233bcb9cd7cbef0e54c">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_ATTR_DEVICE
+: <a class="el" href="group__mpu8__functions.html#gab4bfac6284dc050dc6fa6aeb8e954c2c">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_ATTR_DEVICE_GRE
+: <a class="el" href="group__mpu8__functions.html#ga496bcd6a2bbd038d8935049fec9d0fda">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_ATTR_DEVICE_nGnRE
+: <a class="el" href="group__mpu8__functions.html#ga6e08ae44fab85e03fea96ae6a5fcdfb0">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_ATTR_DEVICE_nGnRnE
+: <a class="el" href="group__mpu8__functions.html#gabfa9ae279357044cf5b74e77af22a686">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_ATTR_DEVICE_nGRE
+: <a class="el" href="group__mpu8__functions.html#gadcc9977aabb4dc7177d30cbbac1b53d1">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_ATTR_MEMORY_
+: <a class="el" href="group__mpu8__functions.html#gac2f1c567950e3785d75773362b525390">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_ATTR_NON_CACHEABLE
+: <a class="el" href="group__mpu8__functions.html#ga03266f9660485693eb1baec6ba255ab2">Ref_MPU8.txt</a>
+</li>
 <li>ARM_MPU_CACHEP_xxx
 : <a class="el" href="group__mpu__defines.html#gab23596306119e7831847bd9683de3934">Ref_MPU.txt</a>
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+, <a class="el" href="group__mpu8__functions.html#ga9dcb0afddf4ac351f33f3c7a5169c62c">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_ClrRegion_NS()
+: <a class="el" href="group__mpu8__functions.html#gac526bc5bfcf048ce57a44c0c0cdadbe4">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_ClrRegionEx()
+: <a class="el" href="group__mpu8__functions.html#ga01fa1151c9ec0ba5de76f908c0999316">Ref_MPU8.txt</a>
 </li>
 <li>ARM_MPU_Disable()
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+, <a class="el" href="group__mpu8__functions.html#ga61814eba4652a0fdfb76bbe222086327">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_Disable_NS()
+: <a class="el" href="group__mpu8__functions.html#ga389f9b6049d176bc83f9964d3259b712">Ref_MPU8.txt</a>
 </li>
 <li>ARM_MPU_Enable()
 : <a class="el" href="group__mpu__functions.html#ga31406efd492ec9a091a70ffa2d8a42fb">Ref_MPU.txt</a>
+, <a class="el" href="group__mpu8__functions.html#ga5a3f40314553baccdeea551f86d9a997">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_Enable_NS()
+: <a class="el" href="group__mpu8__functions.html#ga5866c75d6deb9148a1e9af6337eec50a">Ref_MPU8.txt</a>
 </li>
 <li>ARM_MPU_Load()
 : <a class="el" href="group__mpu__functions.html#gafa27b26d5847fa8e465584e376b6078a">Ref_MPU.txt</a>
+, <a class="el" href="group__mpu8__functions.html#gaca76614e3091c7324aa9d60e634621bf">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_Load_NS()
+: <a class="el" href="group__mpu8__functions.html#ga7f8c6e09be98067d613e4df1832c543d">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_LoadEx()
+: <a class="el" href="group__mpu8__functions.html#gab6094419f2abd678f1f3b121cd115049">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_OrderedMemcpy()
+: <a class="el" href="group__mpu__functions.html#gac1a949403bf84eecaf407003fb553ae7">Ref_MPU.txt</a>
+, <a class="el" href="group__mpu8__functions.html#gac1a949403bf84eecaf407003fb553ae7">Ref_MPU8.txt</a>
 </li>
 <li>ARM_MPU_RASR
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@@ -166,16 +219,43 @@
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 <li>ARM_MPU_RBAR
-: <a class="el" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">Ref_MPU.txt</a>
+: <a class="el" href="group__mpu8__functions.html#gafe39c2f98058bcac7e7e0501e64e7a9d">Ref_MPU8.txt</a>
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 </li>
 <li>ARM_MPU_REGION_SIZE_xxx
 : <a class="el" href="group__mpu__defines.html#gadb0a92c0928c113120567e85ff1ba05c">Ref_MPU.txt</a>
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+<li>ARM_MPU_RLAR
+: <a class="el" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_SetMemAttr()
+: <a class="el" href="group__mpu8__functions.html#gab5b3c0a53d19c09a5550f1d9071ae65c">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_SetMemAttr_NS()
+: <a class="el" href="group__mpu8__functions.html#ga5100a150a755902af2455a455a329ef9">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_SetMemAttrEx()
+: <a class="el" href="group__mpu8__functions.html#ga1799413f08a157d636a1491371c15ce2">Ref_MPU8.txt</a>
+</li>
 <li>ARM_MPU_SetRegion()
 : <a class="el" href="group__mpu__functions.html#ga16931f9ad84d7289e8218e169ae6db5d">Ref_MPU.txt</a>
+, <a class="el" href="group__mpu8__functions.html#ga6d7f220015c070c0e469948c1775ee3d">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_SetRegion_NS()
+: <a class="el" href="group__mpu8__functions.html#ga7566931ca9bb9f22d213a67ec5f8c745">Ref_MPU8.txt</a>
 </li>
 <li>ARM_MPU_SetRegionEx()
 : <a class="el" href="group__mpu__functions.html#ga042ba1a6a1a58795231459ac0410b809">Ref_MPU.txt</a>
+, <a class="el" href="group__mpu8__functions.html#ga3d50ba8546252bea959e45c8fdf16993">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_SH_INNER
+: <a class="el" href="group__mpu8__functions.html#ga73c70127f24f34781ad463cbe51d8f6b">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_SH_NON
+: <a class="el" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_SH_OUTER
+: <a class="el" href="group__mpu8__functions.html#gac4fddbdb9e1350bce6906de33c1fd500">Ref_MPU8.txt</a>
 </li>
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@@ -183,7 +263,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Core/html/globals_b.html b/docs/Core/html/globals_b.html
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@@ -32,7 +32,7 @@
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@@ -147,7 +147,7 @@
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/globals_c.html b/docs/Core/html/globals_c.html
index e7cddf4..13e4edf 100644
--- a/docs/Core/html/globals_c.html
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@@ -32,7 +32,7 @@
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@@ -150,7 +150,7 @@
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Core/html/globals_d.html b/docs/Core/html/globals_d.html
index e3f21e3..cce4c27 100644
--- a/docs/Core/html/globals_d.html
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@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
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    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
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@@ -147,7 +147,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/globals_defs.html b/docs/Core/html/globals_defs.html
index 4b98298..2bfb79c 100644
--- a/docs/Core/html/globals_defs.html
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@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
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@@ -157,12 +157,18 @@
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+<li>__COMPILER_BARRIER
+: <a class="el" href="group__compiler__conntrol__gr.html#ga6f053389e2958b5a239a54d4e4047bf5">Ref_CompilerControl.txt</a>
+</li>
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+<li>__INITIAL_SP
+: <a class="el" href="group__compiler__conntrol__gr.html#ga1002e751427b1189f92787d4e4eef965">Ref_CompilerControl.txt</a>
+</li>
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+<li>__PROGRAM_START
+: <a class="el" href="group__compiler__conntrol__gr.html#ga72db8b026c5e100254080fefabd9fd88">Ref_CompilerControl.txt</a>
+</li>
+<li>__RESTRICT
+: <a class="el" href="group__compiler__conntrol__gr.html#ga378ac21329d33f561f90265eef89f564">Ref_CompilerControl.txt</a>
+</li>
+<li>__STACK_LIMIT
+: <a class="el" href="group__compiler__conntrol__gr.html#ga84b0bad4aa39632d3faea46aa1e102a8">Ref_CompilerControl.txt</a>
+</li>
+<li>__STATIC_FORCEINLINE
+: <a class="el" href="group__compiler__conntrol__gr.html#gab904513442afdf77d4f8c74f23cbb040">Ref_CompilerControl.txt</a>
+</li>
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+<li>__VECTOR_TABLE
+: <a class="el" href="group__compiler__conntrol__gr.html#gab94ebeb20055f1848d7b707d3c7cfc5d">Ref_CompilerControl.txt</a>
+</li>
+<li>__VECTOR_TABLE_ATTRIBUTE
+: <a class="el" href="group__compiler__conntrol__gr.html#ga4f65c96effa79fbd610fea43ee7d745b">Ref_CompilerControl.txt</a>
+</li>
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-</li>
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@@ -221,9 +236,36 @@
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 : <a class="el" href="group__mpu__defines.html#ga71d41084e984be70a23cb640fd89d1e2">Ref_MPU.txt</a>
 </li>
+<li>ARM_MPU_AP_
+: <a class="el" href="group__mpu8__functions.html#ga81b2aa3fb55cdd5feadff02da10d391b">Ref_MPU8.txt</a>
+</li>
 <li>ARM_MPU_AP_xxx
 : <a class="el" href="group__mpu__defines.html#gabc4788126d7798469cb862a08d3050cc">Ref_MPU.txt</a>
 </li>
+<li>ARM_MPU_ATTR
+: <a class="el" href="group__mpu8__functions.html#ga2c465cc9429b8233bcb9cd7cbef0e54c">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_ATTR_DEVICE
+: <a class="el" href="group__mpu8__functions.html#gab4bfac6284dc050dc6fa6aeb8e954c2c">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_ATTR_DEVICE_GRE
+: <a class="el" href="group__mpu8__functions.html#ga496bcd6a2bbd038d8935049fec9d0fda">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_ATTR_DEVICE_nGnRE
+: <a class="el" href="group__mpu8__functions.html#ga6e08ae44fab85e03fea96ae6a5fcdfb0">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_ATTR_DEVICE_nGnRnE
+: <a class="el" href="group__mpu8__functions.html#gabfa9ae279357044cf5b74e77af22a686">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_ATTR_DEVICE_nGRE
+: <a class="el" href="group__mpu8__functions.html#gadcc9977aabb4dc7177d30cbbac1b53d1">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_ATTR_MEMORY_
+: <a class="el" href="group__mpu8__functions.html#gac2f1c567950e3785d75773362b525390">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_ATTR_NON_CACHEABLE
+: <a class="el" href="group__mpu8__functions.html#ga03266f9660485693eb1baec6ba255ab2">Ref_MPU8.txt</a>
+</li>
 <li>ARM_MPU_CACHEP_xxx
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@@ -235,10 +277,23 @@
 </li>
 <li>ARM_MPU_RBAR
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+, <a class="el" href="group__mpu8__functions.html#gafe39c2f98058bcac7e7e0501e64e7a9d">Ref_MPU8.txt</a>
 </li>
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 </li>
+<li>ARM_MPU_RLAR
+: <a class="el" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_SH_INNER
+: <a class="el" href="group__mpu8__functions.html#ga73c70127f24f34781ad463cbe51d8f6b">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_SH_NON
+: <a class="el" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_SH_OUTER
+: <a class="el" href="group__mpu8__functions.html#gac4fddbdb9e1350bce6906de33c1fd500">Ref_MPU8.txt</a>
+</li>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
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diff --git a/docs/Core/html/globals_enum.html b/docs/Core/html/globals_enum.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
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     <a href="http://www.doxygen.org/index.html">
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-: <a class="el" href="group__intrinsic__CPU__gr.html#ga1ec006e6d79063363cb0c2a2e0b3adbe">Ref_cmInstr.txt</a>
+: <a class="el" href="group__intrinsic__CPU__gr.html#ga211618c03a0bf3264a7b22ad626d4f0a">Ref_cmInstr.txt</a>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core/html/globals_func_a.html b/docs/Core/html/globals_func_a.html
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+, <a class="el" href="group__mpu8__functions.html#ga9dcb0afddf4ac351f33f3c7a5169c62c">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_ClrRegion_NS()
+: <a class="el" href="group__mpu8__functions.html#gac526bc5bfcf048ce57a44c0c0cdadbe4">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_ClrRegionEx()
+: <a class="el" href="group__mpu8__functions.html#ga01fa1151c9ec0ba5de76f908c0999316">Ref_MPU8.txt</a>
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 <li>ARM_MPU_Disable()
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+, <a class="el" href="group__mpu8__functions.html#ga61814eba4652a0fdfb76bbe222086327">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_Disable_NS()
+: <a class="el" href="group__mpu8__functions.html#ga389f9b6049d176bc83f9964d3259b712">Ref_MPU8.txt</a>
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+, <a class="el" href="group__mpu8__functions.html#ga5a3f40314553baccdeea551f86d9a997">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_Enable_NS()
+: <a class="el" href="group__mpu8__functions.html#ga5866c75d6deb9148a1e9af6337eec50a">Ref_MPU8.txt</a>
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+, <a class="el" href="group__mpu8__functions.html#gaca76614e3091c7324aa9d60e634621bf">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_Load_NS()
+: <a class="el" href="group__mpu8__functions.html#ga7f8c6e09be98067d613e4df1832c543d">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_LoadEx()
+: <a class="el" href="group__mpu8__functions.html#gab6094419f2abd678f1f3b121cd115049">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_OrderedMemcpy()
+: <a class="el" href="group__mpu__functions.html#gac1a949403bf84eecaf407003fb553ae7">Ref_MPU.txt</a>
+, <a class="el" href="group__mpu8__functions.html#gac1a949403bf84eecaf407003fb553ae7">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_SetMemAttr()
+: <a class="el" href="group__mpu8__functions.html#gab5b3c0a53d19c09a5550f1d9071ae65c">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_SetMemAttr_NS()
+: <a class="el" href="group__mpu8__functions.html#ga5100a150a755902af2455a455a329ef9">Ref_MPU8.txt</a>
+</li>
+<li>ARM_MPU_SetMemAttrEx()
+: <a class="el" href="group__mpu8__functions.html#ga1799413f08a157d636a1491371c15ce2">Ref_MPU8.txt</a>
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-: <a class="el" href="group__mpu__functions.html#ga16931f9ad84d7289e8218e169ae6db5d">Ref_MPU.txt</a>
+: <a class="el" href="group__mpu8__functions.html#ga6d7f220015c070c0e469948c1775ee3d">Ref_MPU8.txt</a>
+, <a class="el" href="group__mpu__functions.html#ga16931f9ad84d7289e8218e169ae6db5d">Ref_MPU.txt</a>
+</li>
+<li>ARM_MPU_SetRegion_NS()
+: <a class="el" href="group__mpu8__functions.html#ga7566931ca9bb9f22d213a67ec5f8c745">Ref_MPU8.txt</a>
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-: <a class="el" href="group__mpu__functions.html#ga042ba1a6a1a58795231459ac0410b809">Ref_MPU.txt</a>
+: <a class="el" href="group__mpu8__functions.html#ga3d50ba8546252bea959e45c8fdf16993">Ref_MPU8.txt</a>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
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@@ -181,7 +181,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core/html/globals_func_t.html b/docs/Core/html/globals_func_t.html
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@@ -196,7 +196,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core/html/globals_h.html b/docs/Core/html/globals_h.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core/html/globals_i.html b/docs/Core/html/globals_i.html
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@@ -159,7 +159,7 @@
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Core/html/globals_m.html b/docs/Core/html/globals_m.html
index 687ebbe..18f3839 100644
--- a/docs/Core/html/globals_m.html
+++ b/docs/Core/html/globals_m.html
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    <div id="projectname">CMSIS-Core (Cortex-M)
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    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
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@@ -147,7 +147,7 @@
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/globals_n.html b/docs/Core/html/globals_n.html
index c07199e..9d75c84 100644
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+++ b/docs/Core/html/globals_n.html
@@ -32,7 +32,7 @@
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    <div id="projectname">CMSIS-Core (Cortex-M)
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    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
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@@ -204,7 +204,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Core/html/globals_p.html b/docs/Core/html/globals_p.html
index 86309ef..7e85f95 100644
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
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    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
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@@ -150,7 +150,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/globals_s.html b/docs/Core/html/globals_s.html
index 31ce5d9..0eae6d9 100644
--- a/docs/Core/html/globals_s.html
+++ b/docs/Core/html/globals_s.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
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    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
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@@ -201,7 +201,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/globals_t.html b/docs/Core/html/globals_t.html
index 8bc9a25..fc6ea29 100644
--- a/docs/Core/html/globals_t.html
+++ b/docs/Core/html/globals_t.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
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@@ -204,7 +204,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/globals_u.html b/docs/Core/html/globals_u.html
index 5d16c9b..e7ed941 100644
--- a/docs/Core/html/globals_u.html
+++ b/docs/Core/html/globals_u.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
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    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
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@@ -147,7 +147,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/globals_vars.html b/docs/Core/html/globals_vars.html
index 9c9ad7f..1899dfa 100644
--- a/docs/Core/html/globals_vars.html
+++ b/docs/Core/html/globals_vars.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
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    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
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@@ -130,7 +130,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/globals_w.html b/docs/Core/html/globals_w.html
index b4c109b..50a0a88 100644
--- a/docs/Core/html/globals_w.html
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@@ -32,7 +32,7 @@
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    <div id="projectname">CMSIS-Core (Cortex-M)
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    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
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@@ -147,7 +147,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Core/html/group__Core__Register__gr.html b/docs/Core/html/group__Core__Register__gr.html
index cad2c5d..399d37d 100644
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    <div id="projectname">CMSIS-Core (Cortex-M)
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    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
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@@ -1274,7 +1274,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Core/html/group__Dcache__functions__m7.html b/docs/Core/html/group__Dcache__functions__m7.html
index 619e877..47f3c7d 100644
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@@ -32,7 +32,7 @@
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    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
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    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
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@@ -344,7 +344,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Core/html/group__ITM__Debug__gr.html b/docs/Core/html/group__ITM__Debug__gr.html
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@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
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@@ -138,7 +138,7 @@
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>CMSIS provides additional debug functions to enlarge the Debug Access. Data can be transmitted via a certain global buffer variable towards the target system.</p>
-<p>The Cortex-M3 / Cortex-M4 / Cortex-M7 incorporates the <b>Instrumented Trace Macrocell (ITM)</b> that provides together with the <b>Serial Viewer Output (SVO)</b> trace capabilities for the microcontroller system. The ITM has 32 communication channels; two ITM communication channels are used by CMSIS to output the following information:</p>
+<p>The Cortex-M3 / Cortex-M4 / Cortex-M7 incorporates the <b>Instrumented Trace Macrocell (ITM)</b> that provides together with the <b>Serial Wire Output (SWO)</b> trace capabilities for the microcontroller system. The ITM has 32 communication channels; two ITM communication channels are used by CMSIS to output the following information:</p>
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@@ -266,7 +266,7 @@
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Core/html/group__Icache__functions__m7.html b/docs/Core/html/group__Icache__functions__m7.html
index f1215a6..a8f419f 100644
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@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
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@@ -191,7 +191,7 @@
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/Core/html/group__NVIC__gr.html b/docs/Core/html/group__NVIC__gr.html
index 37b03e6..55c6036 100644
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@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
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@@ -1413,7 +1413,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/Core/html/group__SysTick__gr.html b/docs/Core/html/group__SysTick__gr.html
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--- a/docs/Core/html/group__SysTick__gr.html
+++ b/docs/Core/html/group__SysTick__gr.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
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    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
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@@ -180,7 +180,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Core/html/group__cache__functions__m7.html b/docs/Core/html/group__cache__functions__m7.html
index fb9cf3a..85dde27 100644
--- a/docs/Core/html/group__cache__functions__m7.html
+++ b/docs/Core/html/group__cache__functions__m7.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
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    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
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@@ -140,7 +140,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Core/html/group__compiler__conntrol__gr.html b/docs/Core/html/group__compiler__conntrol__gr.html
index ffbe33a..858aa5c 100644
--- a/docs/Core/html/group__compiler__conntrol__gr.html
+++ b/docs/Core/html/group__compiler__conntrol__gr.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
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@@ -141,11 +141,17 @@
 <tr class="memdesc:gade2d8d7118f8ff49547f60aa0c3382bb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Recommend that function should be inlined by the compiler.  <a href="#gade2d8d7118f8ff49547f60aa0c3382bb">More...</a><br/></td></tr>
 <tr class="separator:gade2d8d7118f8ff49547f60aa0c3382bb"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gaba87361bfad2ae52cfe2f40c1a1dbf9c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a></td></tr>
-<tr class="memdesc:gaba87361bfad2ae52cfe2f40c1a1dbf9c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Define a static function should be inlined by the compiler.  <a href="#gaba87361bfad2ae52cfe2f40c1a1dbf9c">More...</a><br/></td></tr>
+<tr class="memdesc:gaba87361bfad2ae52cfe2f40c1a1dbf9c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Define a static function that may be inlined by the compiler.  <a href="#gaba87361bfad2ae52cfe2f40c1a1dbf9c">More...</a><br/></td></tr>
 <tr class="separator:gaba87361bfad2ae52cfe2f40c1a1dbf9c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab904513442afdf77d4f8c74f23cbb040"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#gab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a></td></tr>
+<tr class="memdesc:gab904513442afdf77d4f8c74f23cbb040"><td class="mdescLeft">&#160;</td><td class="mdescRight">Define a static function that should be always inlined by the compiler.  <a href="#gab904513442afdf77d4f8c74f23cbb040">More...</a><br/></td></tr>
+<tr class="separator:gab904513442afdf77d4f8c74f23cbb040"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga153a4a31b276a9758959580538720a51"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#ga153a4a31b276a9758959580538720a51">__NO_RETURN</a></td></tr>
 <tr class="memdesc:ga153a4a31b276a9758959580538720a51"><td class="mdescLeft">&#160;</td><td class="mdescRight">Inform the compiler that a function does not return.  <a href="#ga153a4a31b276a9758959580538720a51">More...</a><br/></td></tr>
 <tr class="separator:ga153a4a31b276a9758959580538720a51"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga378ac21329d33f561f90265eef89f564"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#ga378ac21329d33f561f90265eef89f564">__RESTRICT</a></td></tr>
+<tr class="memdesc:ga378ac21329d33f561f90265eef89f564"><td class="mdescLeft">&#160;</td><td class="mdescRight">restrict pointer qualifier to enable additional optimizations.  <a href="#ga378ac21329d33f561f90265eef89f564">More...</a><br/></td></tr>
+<tr class="separator:ga378ac21329d33f561f90265eef89f564"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga3e40e4c553fc11588f7a4c2a19e789e0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#ga3e40e4c553fc11588f7a4c2a19e789e0">__USED</a></td></tr>
 <tr class="memdesc:ga3e40e4c553fc11588f7a4c2a19e789e0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Inform that a variable shall be retained in executable image.  <a href="#ga3e40e4c553fc11588f7a4c2a19e789e0">More...</a><br/></td></tr>
 <tr class="separator:ga3e40e4c553fc11588f7a4c2a19e789e0"><td class="memSeparator" colspan="2">&#160;</td></tr>
@@ -176,6 +182,24 @@
 <tr class="memitem:ga0c58caa5a273e2c21924509a45f8b849"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#ga0c58caa5a273e2c21924509a45f8b849">__ALIGNED</a></td></tr>
 <tr class="memdesc:ga0c58caa5a273e2c21924509a45f8b849"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum alignment for a variable.  <a href="#ga0c58caa5a273e2c21924509a45f8b849">More...</a><br/></td></tr>
 <tr class="separator:ga0c58caa5a273e2c21924509a45f8b849"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga6f053389e2958b5a239a54d4e4047bf5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#ga6f053389e2958b5a239a54d4e4047bf5">__COMPILER_BARRIER</a></td></tr>
+<tr class="memdesc:ga6f053389e2958b5a239a54d4e4047bf5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Barrier to prevent compiler from reordering instructions.  <a href="#ga6f053389e2958b5a239a54d4e4047bf5">More...</a><br/></td></tr>
+<tr class="separator:ga6f053389e2958b5a239a54d4e4047bf5"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga72db8b026c5e100254080fefabd9fd88"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#ga72db8b026c5e100254080fefabd9fd88">__PROGRAM_START</a></td></tr>
+<tr class="memdesc:ga72db8b026c5e100254080fefabd9fd88"><td class="mdescLeft">&#160;</td><td class="mdescRight">Entry function into the user application or library startup.  <a href="#ga72db8b026c5e100254080fefabd9fd88">More...</a><br/></td></tr>
+<tr class="separator:ga72db8b026c5e100254080fefabd9fd88"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1002e751427b1189f92787d4e4eef965"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#ga1002e751427b1189f92787d4e4eef965">__INITIAL_SP</a></td></tr>
+<tr class="memdesc:ga1002e751427b1189f92787d4e4eef965"><td class="mdescLeft">&#160;</td><td class="mdescRight">Compiler/linker symbol specifiying the location of the main stack (MSP).  <a href="#ga1002e751427b1189f92787d4e4eef965">More...</a><br/></td></tr>
+<tr class="separator:ga1002e751427b1189f92787d4e4eef965"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga84b0bad4aa39632d3faea46aa1e102a8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#ga84b0bad4aa39632d3faea46aa1e102a8">__STACK_LIMIT</a></td></tr>
+<tr class="memdesc:ga84b0bad4aa39632d3faea46aa1e102a8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Compiler/linker symbol specifiying the limit of the main stack (MSP).  <a href="#ga84b0bad4aa39632d3faea46aa1e102a8">More...</a><br/></td></tr>
+<tr class="separator:ga84b0bad4aa39632d3faea46aa1e102a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab94ebeb20055f1848d7b707d3c7cfc5d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#gab94ebeb20055f1848d7b707d3c7cfc5d">__VECTOR_TABLE</a></td></tr>
+<tr class="memdesc:gab94ebeb20055f1848d7b707d3c7cfc5d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Symbol name used for the (static) interrupt vector table.  <a href="#gab94ebeb20055f1848d7b707d3c7cfc5d">More...</a><br/></td></tr>
+<tr class="separator:gab94ebeb20055f1848d7b707d3c7cfc5d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4f65c96effa79fbd610fea43ee7d745b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#ga4f65c96effa79fbd610fea43ee7d745b">__VECTOR_TABLE_ATTRIBUTE</a></td></tr>
+<tr class="memdesc:ga4f65c96effa79fbd610fea43ee7d745b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Additional decl specs to be used when defining the (static) interrupt vector table.  <a href="#ga4f65c96effa79fbd610fea43ee7d745b">More...</a><br/></td></tr>
+<tr class="separator:ga4f65c96effa79fbd610fea43ee7d745b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>The CMSIS-Core provides the header file <b>cmsis_compiler.h</b> with consistent #define symbols for generate C or C++ source files that should be compiler agnostic. Each CMSIS compliant compiler should support the functionality described in this section.</p>
@@ -191,7 +215,7 @@
       </table>
 </div><div class="memdoc">
 <p>Specifies a minimum alignment for a variable or structure field, measured in bytes.</p>
-<p><b> Code Example:</b> </p>
+<p><b>Code Example:</b> </p>
 <div class="fragment"><div class="line">uint32_t stack_space[0x100] <a class="code" href="group__compiler__conntrol__gr.html#ga0c58caa5a273e2c21924509a45f8b849">__ALIGNED</a>(8);   <span class="comment">// 8-byte alignment required</span></div>
 </div><!-- fragment --> 
 </div>
@@ -284,6 +308,39 @@
 </div><!-- fragment --> 
 </div>
 </div>
+<a class="anchor" id="ga6f053389e2958b5a239a54d4e4047bf5"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define __COMPILER_BARRIER</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>This barrier limits the compilers reordering optimizations. It prevents the compiler from swapping instructions resulting from code before and after the barrier.</p>
+<p><b>Code Example:</b> The assignments in the example are independent. Hence the compiler could choose a different order of execution, e.g. for a better pipeline utilization. Using the barrier in between prevents this type of reordering.</p>
+<div class="fragment"><div class="line"><span class="keywordtype">void</span> test (uint8_t *ptr) {</div>
+<div class="line">  var1 = 1;</div>
+<div class="line">  __COMPILE_BARRIER();</div>
+<div class="line">  var2 = var3 + 1;</div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="ga1002e751427b1189f92787d4e4eef965"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define __INITIAL_SP</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>The address of the specified symbol is used to initialize the main stack pointer (MSP) during low level init. This is compiler/linker specific. CMSIS specifies common default for supported compilers.</p>
+<dl class="section note"><dt>Note</dt><dd>This define is only intended to be used by the <a class="el" href="startup_c_pg.html">Startup File startup_&lt;device&gt;.c</a>. </dd></dl>
+
+</div>
+</div>
 <a class="anchor" id="gade2d8d7118f8ff49547f60aa0c3382bb"></a>
 <div class="memitem">
 <div class="memproto">
@@ -294,7 +351,7 @@
       </table>
 </div><div class="memdoc">
 <p>Inline functions offer a trade-off between code size and performance. By default, the compiler decides during optimization whether to inline code or not. The <b>__INLINE</b> attribute gives the compiler an hint to inline this function. Still, the compiler may decide not to inline the function. As the function is global an callable function is also generated.</p>
-<p><b> Code Example:</b> </p>
+<p><b>Code Example:</b> </p>
 <div class="fragment"><div class="line"><span class="keyword">const</span> uint32_t led_mask[] = {1U &lt;&lt; 4, 1U &lt;&lt; 5, 1U &lt;&lt; 6, 1U &lt;&lt; 7};</div>
 <div class="line"> </div>
 <div class="line"><span class="comment">/*------------------------------------------------------------------------------</span></div>
@@ -317,7 +374,7 @@
       </table>
 </div><div class="memdoc">
 <p>Informs the compiler that the function does not return. The compiler can then perform optimizations by removing code that is never reached.</p>
-<p><b> Code Example:</b> </p>
+<p><b>Code Example:</b> </p>
 <div class="fragment"><div class="line"><span class="comment">// OS idle demon (running when no other thread is ready to run).</span></div>
 <div class="line"> </div>
 <div class="line"><a class="code" href="group__compiler__conntrol__gr.html#ga153a4a31b276a9758959580538720a51">__NO_RETURN</a> <span class="keywordtype">void</span> os_idle_demon (<span class="keywordtype">void</span>);</div>
@@ -334,7 +391,7 @@
       </table>
 </div><div class="memdoc">
 <p>Specifies that a type must have the smallest possible alignment.</p>
-<p><b> Code Example:</b> </p>
+<p><b>Code Example:</b> </p>
 <div class="fragment"><div class="line"><span class="keyword">struct </span>foo {</div>
 <div class="line">  uint8_t  u8;</div>
 <div class="line">  uint32_t u32[2] <a class="code" href="group__compiler__conntrol__gr.html#gabe8996d3d985ee1529475443cc635bf1">__PACKED</a>;</div>
@@ -352,7 +409,7 @@
       </table>
 </div><div class="memdoc">
 <p>Specifies that a structure must have the smallest possible alignment.</p>
-<p><b> Code Example:</b> </p>
+<p><b>Code Example:</b> </p>
 <div class="fragment"><div class="line"><a class="code" href="group__compiler__conntrol__gr.html#ga4dbb70fab85207c27b581ecb6532b314">__PACKED_STRUCT</a> foo {</div>
 <div class="line">  uint8_t   u8;</div>
 <div class="line">  uint32_t  u32;</div>
@@ -361,6 +418,91 @@
 </div><!-- fragment --> 
 </div>
 </div>
+<a class="anchor" id="ga72db8b026c5e100254080fefabd9fd88"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define __PROGRAM_START</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Gives the function to be jumped into right after low level initialization, i.e. SystemInit. This is compiler and library specific. CMSIS specifies common default for supported compilers.</p>
+<dl class="section note"><dt>Note</dt><dd>This define is only intended to be used by the <a class="el" href="startup_c_pg.html">Startup File startup_&lt;device&gt;.c</a>.</dd></dl>
+<p><b>Code Example:</b> </p>
+<div class="fragment"><div class="line"><span class="keywordtype">void</span> Reset_Handler(<span class="keywordtype">void</span>)</div>
+<div class="line">{</div>
+<div class="line">  <a class="code" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2">SystemInit</a>();                             <span class="comment">/* CMSIS System Initialization */</span></div>
+<div class="line">  <a class="code" href="group__compiler__conntrol__gr.html#ga72db8b026c5e100254080fefabd9fd88">__PROGRAM_START</a>();                        <span class="comment">/* Enter PreMain (C library entry point) */</span></div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="ga378ac21329d33f561f90265eef89f564"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define __RESTRICT</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>The __RESTRICT keyword corresponds to the <b>restrict</b> pointer qualifier that has been introduced in C99. __RESTRICT is a hint to the compiler that enables additional optimizations. It specifies that for the lifetime of the pointer, only the pointer itself or a value directly derived from it (such as pointer + 1) is used to access the object. The compiler may therefore ignore potential pointer aliasing effects and perform additional optimizations.</p>
+<dl class="section note"><dt>Note</dt><dd>For compilers that do not support the restrict keyword, __RESTRICT is defined as an empty macro and a warning is issued.</dd></dl>
+<p><b>Code Example:</b> </p>
+<div class="fragment"><div class="line"><a class="code" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> <span class="keywordtype">void</span> <a class="code" href="group__mpu__functions.html#gac1a949403bf84eecaf407003fb553ae7">ARM_MPU_OrderedMemcpy</a> (<span class="keyword">volatile</span> uint32_t* dst, <span class="keyword">const</span> uint32_t* <a class="code" href="group__compiler__conntrol__gr.html#ga378ac21329d33f561f90265eef89f564">__RESTRICT</a> src, uint32_t len)</div>
+<div class="line">{</div>
+<div class="line">  uint32_t i;</div>
+<div class="line">  <span class="keywordflow">for</span> (i = 0U; i &lt; len; ++i) </div>
+<div class="line">  {</div>
+<div class="line">    dst[i] = src[i];   <span class="comment">// Since src is restrict, the compiler can assume that dst and src are not overlapping may load multiple values at a time</span></div>
+<div class="line">  }</div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="ga84b0bad4aa39632d3faea46aa1e102a8"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define __STACK_LIMIT</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>The address of the specified symbol is used to initialize the main stack pointer limit (MSPLIM on Armv8-M) during low level init. This is compiler/linker specific. CMSIS specifies common default for supported compilers.</p>
+<dl class="section note"><dt>Note</dt><dd>This define is only intended to be used by the <a class="el" href="startup_c_pg.html">Startup File startup_&lt;device&gt;.c</a>.</dd></dl>
+<p><b>Code Example:</b> </p>
+<div class="fragment"><div class="line"><span class="keywordtype">void</span> Reset_Handler(<span class="keywordtype">void</span>)</div>
+<div class="line">{</div>
+<div class="line">  <a class="code" href="group__Core__Register__gr.html#ga6809a07c5cb7410e361f3fba57f72172">__set_MSPLIM</a>((uint32_t)(&amp;<a class="code" href="group__compiler__conntrol__gr.html#ga84b0bad4aa39632d3faea46aa1e102a8">__STACK_LIMIT</a>));</div>
+<div class="line">  <span class="comment">// :</span></div>
+<div class="line">  <span class="comment">// :</span></div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="gab904513442afdf77d4f8c74f23cbb040"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define __STATIC_FORCEINLINE</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Defines a static function that should be always inlined by the compiler.</p>
+<dl class="section note"><dt>Note</dt><dd>For compilers that do not allow to force function inlining, the macro maps to <a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a>.</dd></dl>
+<p><b>Code Example:</b> </p>
+<div class="fragment"><div class="line">\\ Get Interrupt Vector</div>
+<div class="line"><a class="code" href="group__compiler__conntrol__gr.html#gab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> uint32_t <a class="code" href="group__NVIC__gr.html#gaebee9cad6724a5bac1857f0f1fb6d6af">NVIC_GetVector</a>(<a class="code" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</div>
+<div class="line">{</div>
+<div class="line">    uint32_t *vectors = (uint32_t *)SCB-&gt;VTOR;</div>
+<div class="line">    <span class="keywordflow">return</span> vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];</div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
 <a class="anchor" id="gaba87361bfad2ae52cfe2f40c1a1dbf9c"></a>
 <div class="memitem">
 <div class="memproto">
@@ -371,7 +513,7 @@
       </table>
 </div><div class="memdoc">
 <p>Defines a static function that may be inlined by the compiler. If the compiler generates inline code for all calls to this functions, no additional function implementation is generated which may further optimize space.</p>
-<p><b> Code Example:</b> </p>
+<p><b>Code Example:</b> </p>
 <div class="fragment"><div class="line">\\ Get Interrupt Vector</div>
 <div class="line"><a class="code" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t <a class="code" href="group__NVIC__gr.html#gaebee9cad6724a5bac1857f0f1fb6d6af">NVIC_GetVector</a>(<a class="code" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</div>
 <div class="line">{</div>
@@ -391,7 +533,7 @@
       </table>
 </div><div class="memdoc">
 <p>Defines a pointer to a uint16_t from an address that does not need to be aligned. This can then be used in read operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying Arm processor core and compiler settings.</p>
-<p><b> Code Example:</b> </p>
+<p><b>Code Example:</b> </p>
 <div class="fragment"><div class="line">uint16_t val16;</div>
 <div class="line"> </div>
 <div class="line"><span class="keywordtype">void</span> test (uint8_t *ptr) {</div>
@@ -410,7 +552,7 @@
       </table>
 </div><div class="memdoc">
 <p>Defines a pointer to a uint16_t from an address that does not need to be aligned. This can then be used in write operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying Arm processor core and compiler settings.</p>
-<p><b> Code Example:</b> </p>
+<p><b>Code Example:</b> </p>
 <div class="fragment"><div class="line">uint16_t val16 = 0U;</div>
 <div class="line"> </div>
 <div class="line"><span class="keywordtype">void</span> test (uint8_t *ptr) {</div>
@@ -428,9 +570,9 @@
         </tr>
       </table>
 </div><div class="memdoc">
-<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000004">Deprecated:</a></b></dt><dd>Do not use this macro. It has been superseded by <a class="el" href="group__compiler__conntrol__gr.html#ga254322c344d954c9f829719a50a88e87">__UNALIGNED_UINT32_READ</a>, <a class="el" href="group__compiler__conntrol__gr.html#gabb2180285c417aa9120a360c51f64b4b">__UNALIGNED_UINT32_WRITE</a> and will be removed in the future.</dd></dl>
+<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000001">Deprecated:</a></b></dt><dd>Do not use this macro. It has been superseded by <a class="el" href="group__compiler__conntrol__gr.html#ga254322c344d954c9f829719a50a88e87">__UNALIGNED_UINT32_READ</a>, <a class="el" href="group__compiler__conntrol__gr.html#gabb2180285c417aa9120a360c51f64b4b">__UNALIGNED_UINT32_WRITE</a> and will be removed in the future.</dd></dl>
 <p>Defines a pointer to a uint32_t from an address that does not need to be aligned. This can then be used in read/write operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying Arm processor core and compiler settings.</p>
-<p><b> Code Example:</b> </p>
+<p><b>Code Example:</b> </p>
 <div class="fragment"><div class="line">uint32_t val32;</div>
 <div class="line"> </div>
 <div class="line"><span class="keywordtype">void</span> test (uint8_t *ptr) {</div>
@@ -449,7 +591,7 @@
       </table>
 </div><div class="memdoc">
 <p>Defines a pointer to a uint32_t from an address that does not need to be aligned. This can then be used in read operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying Arm processor core and compiler settings.</p>
-<p><b> Code Example:</b> </p>
+<p><b>Code Example:</b> </p>
 <div class="fragment"><div class="line">uint32_t val32;</div>
 <div class="line"> </div>
 <div class="line"><span class="keywordtype">void</span> test (uint8_t *ptr) {</div>
@@ -468,7 +610,7 @@
       </table>
 </div><div class="memdoc">
 <p>Defines a pointer to a uint32_t from an address that does not need to be aligned. This can then be used in write operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying Arm processor core and compiler settings.</p>
-<p><b> Code Example:</b> </p>
+<p><b>Code Example:</b> </p>
 <div class="fragment"><div class="line">uint32_t val32 = 0U;</div>
 <div class="line"> </div>
 <div class="line"><span class="keywordtype">void</span> test (uint8_t *ptr) {</div>
@@ -487,7 +629,7 @@
       </table>
 </div><div class="memdoc">
 <p>Definitions tagged with <b>__USED</b> in the source code should be not removed by the linker when detected as unused.</p>
-<p><b> Code Example:</b> </p>
+<p><b>Code Example:</b> </p>
 <div class="fragment"><div class="line"><span class="comment">/* Export following variables for debugging */</span></div>
 <div class="line"><a class="code" href="group__compiler__conntrol__gr.html#ga3e40e4c553fc11588f7a4c2a19e789e0">__USED</a> uint32_t <span class="keyword">const</span> CMSIS_RTOS_API_Version = osCMSIS;</div>
 <div class="line"><a class="code" href="group__compiler__conntrol__gr.html#ga3e40e4c553fc11588f7a4c2a19e789e0">__USED</a> uint32_t <span class="keyword">const</span> CMSIS_RTOS_RTX_Version = osCMSIS_RTX;</div>
@@ -496,6 +638,34 @@
 </div><!-- fragment --> 
 </div>
 </div>
+<a class="anchor" id="gab94ebeb20055f1848d7b707d3c7cfc5d"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define __VECTOR_TABLE</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>The given name is used for defining the static (compiler time) interrupt vector table. The name must comply with any compiler/linker conventions, e.g. if used for vector table relocation or debugger awareness. CMSIS specifies common default for supported compilers.</p>
+<dl class="section note"><dt>Note</dt><dd>This define is only intended to be used by the <a class="el" href="startup_c_pg.html">Startup File startup_&lt;device&gt;.c</a>. </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga4f65c96effa79fbd610fea43ee7d745b"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define __VECTOR_TABLE_ATTRIBUTE</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>The given decl specs are used for defining the static (compiler time) interrupt vector table, e.g. to mark the table as used and force it into a specific linker section. CMSIS specifies common default for supported compilers.</p>
+<dl class="section note"><dt>Note</dt><dd>This define is only intended to be used by the <a class="el" href="startup_c_pg.html">Startup File startup_&lt;device&gt;.c</a>. </dd></dl>
+
+</div>
+</div>
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 <p>Functions defined with <b>__WEAK</b> export their symbols weakly. A weakly defined function behaves like a normally defined function unless a non-weakly defined function of the same name is linked into the same image. If both a non-weakly defined function and a weakly defined function exist in the same image then all calls to the function resolve to call the non-weak function.</p>
 <p>Functions declared with <b>__WEAK</b> and then defined without <b>__WEAK</b> behave as non-weak functions.</p>
-<p><b> Code Example:</b> </p>
+<p><b>Code Example:</b> </p>
 <div class="fragment"><div class="line"><a class="code" href="group__compiler__conntrol__gr.html#gac607bf387b29162be6a9b77fc7999539">__WEAK</a> <span class="keywordtype">void</span> <a class="code" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2">SystemInit</a>(<span class="keywordtype">void</span>)</div>
 <div class="line">{</div>
 <div class="line">  SystemCoreSetup();</div>
@@ -521,7 +691,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Core/html/group__compiler__conntrol__gr.js b/docs/Core/html/group__compiler__conntrol__gr.js
index 87193e4..6088d0c 100644
--- a/docs/Core/html/group__compiler__conntrol__gr.js
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     [ "__ASM", "group__compiler__conntrol__gr.html#ga1378040bcf22428955c6e3ce9c2053cd", null ],
+    [ "__COMPILER_BARRIER", "group__compiler__conntrol__gr.html#ga6f053389e2958b5a239a54d4e4047bf5", null ],
+    [ "__INITIAL_SP", "group__compiler__conntrol__gr.html#ga1002e751427b1189f92787d4e4eef965", null ],
     [ "__INLINE", "group__compiler__conntrol__gr.html#gade2d8d7118f8ff49547f60aa0c3382bb", null ],
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     [ "__PACKED_STRUCT", "group__compiler__conntrol__gr.html#ga4dbb70fab85207c27b581ecb6532b314", null ],
+    [ "__PROGRAM_START", "group__compiler__conntrol__gr.html#ga72db8b026c5e100254080fefabd9fd88", null ],
+    [ "__RESTRICT", "group__compiler__conntrol__gr.html#ga378ac21329d33f561f90265eef89f564", null ],
+    [ "__STACK_LIMIT", "group__compiler__conntrol__gr.html#ga84b0bad4aa39632d3faea46aa1e102a8", null ],
+    [ "__STATIC_FORCEINLINE", "group__compiler__conntrol__gr.html#gab904513442afdf77d4f8c74f23cbb040", null ],
     [ "__STATIC_INLINE", "group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c", null ],
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     [ "__USED", "group__compiler__conntrol__gr.html#ga3e40e4c553fc11588f7a4c2a19e789e0", null ],
+    [ "__VECTOR_TABLE", "group__compiler__conntrol__gr.html#gab94ebeb20055f1848d7b707d3c7cfc5d", null ],
+    [ "__VECTOR_TABLE_ATTRIBUTE", "group__compiler__conntrol__gr.html#ga4f65c96effa79fbd610fea43ee7d745b", null ],
     [ "__WEAK", "group__compiler__conntrol__gr.html#gac607bf387b29162be6a9b77fc7999539", null ]
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index 3bcaf37..0bd7118 100644
--- a/docs/Core/html/group__context__trustzone__functions.html
+++ b/docs/Core/html/group__context__trustzone__functions.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -110,7 +110,7 @@
   <div class="summary">
 <a href="#func-members">Functions</a>  </div>
   <div class="headertitle">
-<div class="title">RTOS Context Management<div class="ingroups"><a class="el" href="group__trustzone__functions.html">TrustZone for Armv8-M</a></div></div>  </div>
+<div class="title">RTOS Context Management<div class="ingroups"><a class="el" href="group__trustzone__functions.html">TrustZone for Armv8-M/v8.1-M</a></div></div>  </div>
 </div><!--header-->
 <div class="contents">
 
@@ -259,7 +259,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/group__coreregister__trustzone__functions.html b/docs/Core/html/group__coreregister__trustzone__functions.html
index 84584ac..34e71de 100644
--- a/docs/Core/html/group__coreregister__trustzone__functions.html
+++ b/docs/Core/html/group__coreregister__trustzone__functions.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -110,7 +110,7 @@
   <div class="summary">
 <a href="#func-members">Functions</a>  </div>
   <div class="headertitle">
-<div class="title">Core Register Access Functions<div class="ingroups"><a class="el" href="group__trustzone__functions.html">TrustZone for Armv8-M</a></div></div>  </div>
+<div class="title">Core Register Access Functions<div class="ingroups"><a class="el" href="group__trustzone__functions.html">TrustZone for Armv8-M/v8.1-M</a></div></div>  </div>
 </div><!--header-->
 <div class="contents">
 
@@ -598,7 +598,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/group__fpu__functions.html b/docs/Core/html/group__fpu__functions.html
index 35570b7..c873e3d 100644
--- a/docs/Core/html/group__fpu__functions.html
+++ b/docs/Core/html/group__fpu__functions.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -154,7 +154,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/group__intrinsic__CPU__gr.html b/docs/Core/html/group__intrinsic__CPU__gr.html
index b11dac6..5880054 100644
--- a/docs/Core/html/group__intrinsic__CPU__gr.html
+++ b/docs/Core/html/group__intrinsic__CPU__gr.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
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    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
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@@ -149,9 +149,9 @@
 <tr class="memitem:gaeef6f853b6df3a365c838ee5b49a7a26"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gaeef6f853b6df3a365c838ee5b49a7a26">__REV16</a> (uint32_t value)</td></tr>
 <tr class="memdesc:gaeef6f853b6df3a365c838ee5b49a7a26"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reverse byte order (16 bit)  <a href="#gaeef6f853b6df3a365c838ee5b49a7a26">More...</a><br/></td></tr>
 <tr class="separator:gaeef6f853b6df3a365c838ee5b49a7a26"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga1ec006e6d79063363cb0c2a2e0b3adbe"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga1ec006e6d79063363cb0c2a2e0b3adbe">__REVSH</a> (int32_t value)</td></tr>
-<tr class="memdesc:ga1ec006e6d79063363cb0c2a2e0b3adbe"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reverse byte order (16 bit)  <a href="#ga1ec006e6d79063363cb0c2a2e0b3adbe">More...</a><br/></td></tr>
-<tr class="separator:ga1ec006e6d79063363cb0c2a2e0b3adbe"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga211618c03a0bf3264a7b22ad626d4f0a"><td class="memItemLeft" align="right" valign="top">int16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga211618c03a0bf3264a7b22ad626d4f0a">__REVSH</a> (int16_t value)</td></tr>
+<tr class="memdesc:ga211618c03a0bf3264a7b22ad626d4f0a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reverse byte order (16 bit)  <a href="#ga211618c03a0bf3264a7b22ad626d4f0a">More...</a><br/></td></tr>
+<tr class="separator:ga211618c03a0bf3264a7b22ad626d4f0a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gad6f9f297f6b91a995ee199fbc796b863"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gad6f9f297f6b91a995ee199fbc796b863">__RBIT</a> (uint32_t value)</td></tr>
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 <tr class="separator:gad6f9f297f6b91a995ee199fbc796b863"><td class="memSeparator" colspan="2">&#160;</td></tr>
@@ -250,7 +250,7 @@
 <p>The following functions generate specific Cortex-M instructions that cannot be directly accessed by the C/C++ Compiler. Refer to the <a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> for detailed information about these Cortex-M instructions.</p>
 <dl class="section note"><dt>Note</dt><dd>When using the <b>Arm Compiler Version 5 Toolchain</b> the following <a class="el" href="group__intrinsic__CPU__gr.html">Intrinsic Functions for CPU Instructions</a> are implemented using the Embedded Assembler. As the Embedded Assembler may cause side effects (Refer to <b>Arm Compiler v5.xx User Guide - Using the Inline and Embedded Assemblers of the Arm Compiler</b> for more information) it is possible to disable the following intrinsic functions and therefore the usage of the Embedded Assembler with the <b><em>define __NO_EMBEDDED_ASM</em></b>:<ul>
 <li><a class="el" href="group__intrinsic__CPU__gr.html#gaeef6f853b6df3a365c838ee5b49a7a26">__REV16</a></li>
-<li><a class="el" href="group__intrinsic__CPU__gr.html#ga1ec006e6d79063363cb0c2a2e0b3adbe">__REVSH</a></li>
+<li><a class="el" href="group__intrinsic__CPU__gr.html#ga211618c03a0bf3264a7b22ad626d4f0a">__REVSH</a></li>
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+          <td class="memname">int16_t __REVSH </td>
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-          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramtype">int16_t&#160;</td>
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       </table>
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-<p>This function saturates a signed value [not for Cortex-M0, Cortex-M0+, or SC000].</p>
+<p>This function saturates a signed value [not for Cortex-M0, Cortex-M0+, or SC000]. The Q bit is set if saturation occurs.</p>
 <dl class="params"><dt>Parameters</dt><dd>
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-<p>This function saturates an unsigned value [not for Cortex-M0, Cortex-M0+, or SC000].</p>
+<p>This function saturates an unsigned value [not for Cortex-M0, Cortex-M0+, or SC000]. The Q bit is set if saturation occurs.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
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@@ -1411,7 +1411,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Core/html/group__intrinsic__CPU__gr.js b/docs/Core/html/group__intrinsic__CPU__gr.js
index 01310aa..a12621c 100644
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+<title>CMSIS-Core (Cortex-M): MPU Functions for Armv8-M</title>
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+<a href="#nested-classes">Data Structures</a> &#124;
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+  <div class="headertitle">
+<div class="title">MPU Functions for Armv8-M</div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>Functions that relate to the Memory Protection Unit.  
+<a href="#details">More...</a></p>
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a>
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+<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a></td></tr>
+<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Setup information of a single MPU Region.  <a href="structARM__MPU__Region__t.html#details">More...</a><br/></td></tr>
+<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table><table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
+Macros</h2></td></tr>
+<tr class="memitem:gab4bfac6284dc050dc6fa6aeb8e954c2c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gab4bfac6284dc050dc6fa6aeb8e954c2c">ARM_MPU_ATTR_DEVICE</a>&#160;&#160;&#160;( 0U )</td></tr>
+<tr class="memdesc:gab4bfac6284dc050dc6fa6aeb8e954c2c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Attribute for device memory (outer only)  <a href="#gab4bfac6284dc050dc6fa6aeb8e954c2c">More...</a><br/></td></tr>
+<tr class="separator:gab4bfac6284dc050dc6fa6aeb8e954c2c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga03266f9660485693eb1baec6ba255ab2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga03266f9660485693eb1baec6ba255ab2">ARM_MPU_ATTR_NON_CACHEABLE</a>&#160;&#160;&#160;( 4U )</td></tr>
+<tr class="memdesc:ga03266f9660485693eb1baec6ba255ab2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Attribute for non-cacheable, normal memory.  <a href="#ga03266f9660485693eb1baec6ba255ab2">More...</a><br/></td></tr>
+<tr class="separator:ga03266f9660485693eb1baec6ba255ab2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac2f1c567950e3785d75773362b525390"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac2f1c567950e3785d75773362b525390">ARM_MPU_ATTR_MEMORY_</a>(NT, WB, RA, WA)</td></tr>
+<tr class="memdesc:gac2f1c567950e3785d75773362b525390"><td class="mdescLeft">&#160;</td><td class="mdescRight">Attribute for normal memory (outer and inner)  <a href="#gac2f1c567950e3785d75773362b525390">More...</a><br/></td></tr>
+<tr class="separator:gac2f1c567950e3785d75773362b525390"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gabfa9ae279357044cf5b74e77af22a686"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gabfa9ae279357044cf5b74e77af22a686">ARM_MPU_ATTR_DEVICE_nGnRnE</a></td></tr>
+<tr class="memdesc:gabfa9ae279357044cf5b74e77af22a686"><td class="mdescLeft">&#160;</td><td class="mdescRight">Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement.  <a href="#gabfa9ae279357044cf5b74e77af22a686">More...</a><br/></td></tr>
+<tr class="separator:gabfa9ae279357044cf5b74e77af22a686"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga6e08ae44fab85e03fea96ae6a5fcdfb0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga6e08ae44fab85e03fea96ae6a5fcdfb0">ARM_MPU_ATTR_DEVICE_nGnRE</a></td></tr>
+<tr class="memdesc:ga6e08ae44fab85e03fea96ae6a5fcdfb0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement.  <a href="#ga6e08ae44fab85e03fea96ae6a5fcdfb0">More...</a><br/></td></tr>
+<tr class="separator:ga6e08ae44fab85e03fea96ae6a5fcdfb0"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gadcc9977aabb4dc7177d30cbbac1b53d1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gadcc9977aabb4dc7177d30cbbac1b53d1">ARM_MPU_ATTR_DEVICE_nGRE</a></td></tr>
+<tr class="memdesc:gadcc9977aabb4dc7177d30cbbac1b53d1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Device memory type non Gathering, Re-ordering, Early Write Acknowledgement.  <a href="#gadcc9977aabb4dc7177d30cbbac1b53d1">More...</a><br/></td></tr>
+<tr class="separator:gadcc9977aabb4dc7177d30cbbac1b53d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga496bcd6a2bbd038d8935049fec9d0fda"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga496bcd6a2bbd038d8935049fec9d0fda">ARM_MPU_ATTR_DEVICE_GRE</a></td></tr>
+<tr class="memdesc:ga496bcd6a2bbd038d8935049fec9d0fda"><td class="mdescLeft">&#160;</td><td class="mdescRight">Device memory type Gathering, Re-ordering, Early Write Acknowledgement.  <a href="#ga496bcd6a2bbd038d8935049fec9d0fda">More...</a><br/></td></tr>
+<tr class="separator:ga496bcd6a2bbd038d8935049fec9d0fda"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memdesc:ga2c465cc9429b8233bcb9cd7cbef0e54c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Memory Attribute.  <a href="#ga2c465cc9429b8233bcb9cd7cbef0e54c">More...</a><br/></td></tr>
+<tr class="separator:ga2c465cc9429b8233bcb9cd7cbef0e54c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga3d0f688198289f72264f73cf72a742e8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a></td></tr>
+<tr class="memdesc:ga3d0f688198289f72264f73cf72a742e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory non-shareable.  <a href="#ga3d0f688198289f72264f73cf72a742e8">More...</a><br/></td></tr>
+<tr class="separator:ga3d0f688198289f72264f73cf72a742e8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac4fddbdb9e1350bce6906de33c1fd500"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac4fddbdb9e1350bce6906de33c1fd500">ARM_MPU_SH_OUTER</a></td></tr>
+<tr class="memdesc:gac4fddbdb9e1350bce6906de33c1fd500"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory outer shareable.  <a href="#gac4fddbdb9e1350bce6906de33c1fd500">More...</a><br/></td></tr>
+<tr class="separator:gac4fddbdb9e1350bce6906de33c1fd500"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga73c70127f24f34781ad463cbe51d8f6b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga73c70127f24f34781ad463cbe51d8f6b">ARM_MPU_SH_INNER</a></td></tr>
+<tr class="memdesc:ga73c70127f24f34781ad463cbe51d8f6b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory inner shareable.  <a href="#ga73c70127f24f34781ad463cbe51d8f6b">More...</a><br/></td></tr>
+<tr class="separator:ga73c70127f24f34781ad463cbe51d8f6b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga81b2aa3fb55cdd5feadff02da10d391b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga81b2aa3fb55cdd5feadff02da10d391b">ARM_MPU_AP_</a>(RO, NP)</td></tr>
+<tr class="memdesc:ga81b2aa3fb55cdd5feadff02da10d391b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Memory access permissions.  <a href="#ga81b2aa3fb55cdd5feadff02da10d391b">More...</a><br/></td></tr>
+<tr class="separator:ga81b2aa3fb55cdd5feadff02da10d391b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafe39c2f98058bcac7e7e0501e64e7a9d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gafe39c2f98058bcac7e7e0501e64e7a9d">ARM_MPU_RBAR</a>(BASE, SH, RO, NP, XN)</td></tr>
+<tr class="memdesc:gafe39c2f98058bcac7e7e0501e64e7a9d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Region Base Address Register value.  <a href="#gafe39c2f98058bcac7e7e0501e64e7a9d">More...</a><br/></td></tr>
+<tr class="separator:gafe39c2f98058bcac7e7e0501e64e7a9d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaeaaa071276ba7956944e6c3dc05d677e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(LIMIT, IDX)</td></tr>
+<tr class="memdesc:gaeaaa071276ba7956944e6c3dc05d677e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Region Limit Address Register value.  <a href="#gaeaaa071276ba7956944e6c3dc05d677e">More...</a><br/></td></tr>
+<tr class="separator:gaeaaa071276ba7956944e6c3dc05d677e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table><table class="memberdecls">
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+Functions</h2></td></tr>
+<tr class="memitem:ga5a3f40314553baccdeea551f86d9a997"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga5a3f40314553baccdeea551f86d9a997">ARM_MPU_Enable</a> (uint32_t MPU_Control)</td></tr>
+<tr class="separator:ga5a3f40314553baccdeea551f86d9a997"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:ga5866c75d6deb9148a1e9af6337eec50a"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:ga389f9b6049d176bc83f9964d3259b712"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1799413f08a157d636a1491371c15ce2"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga1799413f08a157d636a1491371c15ce2">ARM_MPU_SetMemAttrEx</a> (<a class="el" href="structMPU__Type.html">MPU_Type</a> *mpu, uint8_t idx, uint8_t attr)</td></tr>
+<tr class="separator:ga1799413f08a157d636a1491371c15ce2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab5b3c0a53d19c09a5550f1d9071ae65c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gab5b3c0a53d19c09a5550f1d9071ae65c">ARM_MPU_SetMemAttr</a> (uint8_t idx, uint8_t attr)</td></tr>
+<tr class="separator:gab5b3c0a53d19c09a5550f1d9071ae65c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5100a150a755902af2455a455a329ef9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga5100a150a755902af2455a455a329ef9">ARM_MPU_SetMemAttr_NS</a> (uint8_t idx, uint8_t attr)</td></tr>
+<tr class="separator:ga5100a150a755902af2455a455a329ef9"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga01fa1151c9ec0ba5de76f908c0999316"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga01fa1151c9ec0ba5de76f908c0999316">ARM_MPU_ClrRegionEx</a> (<a class="el" href="structMPU__Type.html">MPU_Type</a> *mpu, uint32_t rnr)</td></tr>
+<tr class="separator:ga01fa1151c9ec0ba5de76f908c0999316"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9dcb0afddf4ac351f33f3c7a5169c62c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga9dcb0afddf4ac351f33f3c7a5169c62c">ARM_MPU_ClrRegion</a> (uint32_t rnr)</td></tr>
+<tr class="separator:ga9dcb0afddf4ac351f33f3c7a5169c62c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac526bc5bfcf048ce57a44c0c0cdadbe4"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac526bc5bfcf048ce57a44c0c0cdadbe4">ARM_MPU_ClrRegion_NS</a> (uint32_t rnr)</td></tr>
+<tr class="separator:gac526bc5bfcf048ce57a44c0c0cdadbe4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga3d50ba8546252bea959e45c8fdf16993"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga3d50ba8546252bea959e45c8fdf16993">ARM_MPU_SetRegionEx</a> (<a class="el" href="structMPU__Type.html">MPU_Type</a> *mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)</td></tr>
+<tr class="separator:ga3d50ba8546252bea959e45c8fdf16993"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga6d7f220015c070c0e469948c1775ee3d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga6d7f220015c070c0e469948c1775ee3d">ARM_MPU_SetRegion</a> (uint32_t rnr, uint32_t rbar, uint32_t rlar)</td></tr>
+<tr class="separator:ga6d7f220015c070c0e469948c1775ee3d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga7566931ca9bb9f22d213a67ec5f8c745"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga7566931ca9bb9f22d213a67ec5f8c745">ARM_MPU_SetRegion_NS</a> (uint32_t rnr, uint32_t rbar, uint32_t rlar)</td></tr>
+<tr class="separator:ga7566931ca9bb9f22d213a67ec5f8c745"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac1a949403bf84eecaf407003fb553ae7"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac1a949403bf84eecaf407003fb553ae7">ARM_MPU_OrderedMemcpy</a> (volatile uint32_t *dst, const uint32_t *<a class="el" href="group__compiler__conntrol__gr.html#ga378ac21329d33f561f90265eef89f564">__RESTRICT</a> src, uint32_t len)</td></tr>
+<tr class="separator:gac1a949403bf84eecaf407003fb553ae7"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab6094419f2abd678f1f3b121cd115049"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gab6094419f2abd678f1f3b121cd115049">ARM_MPU_LoadEx</a> (<a class="el" href="structMPU__Type.html">MPU_Type</a> *mpu, uint32_t rnr, <a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *table, uint32_t cnt)</td></tr>
+<tr class="separator:gab6094419f2abd678f1f3b121cd115049"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaca76614e3091c7324aa9d60e634621bf"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gaca76614e3091c7324aa9d60e634621bf">ARM_MPU_Load</a> (uint32_t rnr, <a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *table, uint32_t cnt)</td></tr>
+<tr class="separator:gaca76614e3091c7324aa9d60e634621bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga7f8c6e09be98067d613e4df1832c543d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga7f8c6e09be98067d613e4df1832c543d">ARM_MPU_Load_NS</a> (uint32_t rnr, <a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *table, uint32_t cnt)</td></tr>
+<tr class="separator:ga7f8c6e09be98067d613e4df1832c543d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>The following functions support the optional Memory Protection Unit (MPU) that is available on the Cortex-M23, M33, M35P processor.</p>
+<p>The MPU is used to prevent from illegal memory accesses that are typically caused by errors in an application software.</p>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line"><span class="keywordtype">void</span> main() </div>
+<div class="line">{</div>
+<div class="line">  <span class="comment">// Set Region 0 using Attr 0</span></div>
+<div class="line">  <a class="code" href="group__mpu8__functions.html#gab5b3c0a53d19c09a5550f1d9071ae65c">ARM_MPU_SetMemAttr</a>(0UL, <a class="code" href="group__mpu8__functions.html#ga2c465cc9429b8233bcb9cd7cbef0e54c">ARM_MPU_ATTR</a>(       <span class="comment">/* Normal memory */</span></div>
+<div class="line">    <a class="code" href="group__mpu8__functions.html#gac2f1c567950e3785d75773362b525390">ARM_MPU_ATTR_MEMORY_</a>(0UL, 1UL, 1UL, 1UL), <span class="comment">/* Outer Write-Back transient with read and write allocate */</span></div>
+<div class="line">    <a class="code" href="group__mpu8__functions.html#gac2f1c567950e3785d75773362b525390">ARM_MPU_ATTR_MEMORY_</a>(0UL, 0UL, 1UL, 1UL)  <span class="comment">/* Inner Write-Through transient with read and write allocate */</span></div>
+<div class="line">  ));</div>
+<div class="line">  </div>
+<div class="line">  <a class="code" href="group__mpu__functions.html#ga16931f9ad84d7289e8218e169ae6db5d">ARM_MPU_SetRegion</a>(0UL,</div>
+<div class="line">    <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x08000000UL, <a class="code" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, 0UL, 1UL, 1UL),  <span class="comment">/* Non-shareable, read/write, non-privileged, execute-never */</span></div>
+<div class="line">    <a class="code" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x080FFFFFUL, 0UL)                             <span class="comment">/* 1MB memory block using Attr 0 */</span></div>
+<div class="line">  );</div>
+<div class="line">  </div>
+<div class="line">  <a class="code" href="group__mpu__functions.html#ga31406efd492ec9a091a70ffa2d8a42fb">ARM_MPU_Enable</a>(0);</div>
+<div class="line">  </div>
+<div class="line">  <span class="comment">// Execute application code that is access protected by the MPU</span></div>
+<div class="line">  </div>
+<div class="line">  <a class="code" href="group__mpu__functions.html#ga7cbc0a4a066ed90e85c8176228235d57">ARM_MPU_Disable</a>();</div>
+<div class="line">}</div>
+</div><!-- fragment --> <h2 class="groupheader">Macro Definition Documentation</h2>
+<a class="anchor" id="ga81b2aa3fb55cdd5feadff02da10d391b"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_MPU_AP_</td>
+          <td>(</td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">RO, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">NP&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">RO</td><td>Read-Only: Set to 1 for read-only memory. </td></tr>
+    <tr><td class="paramname">NP</td><td>Non-Privileged: Set to 1 for non-privileged memory. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+</div>
+</div>
+<a class="anchor" id="ga2c465cc9429b8233bcb9cd7cbef0e54c"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_MPU_ATTR</td>
+          <td>(</td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">O, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">I&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">O</td><td>Outer memory attributes </td></tr>
+    <tr><td class="paramname">I</td><td>O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes </td></tr>
+  </table>
+  </dd>
+</dl>
+
+</div>
+</div>
+<a class="anchor" id="gab4bfac6284dc050dc6fa6aeb8e954c2c"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_MPU_ATTR_DEVICE&#160;&#160;&#160;( 0U )</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="ga496bcd6a2bbd038d8935049fec9d0fda"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_MPU_ATTR_DEVICE_GRE</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="ga6e08ae44fab85e03fea96ae6a5fcdfb0"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_MPU_ATTR_DEVICE_nGnRE</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="gabfa9ae279357044cf5b74e77af22a686"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_MPU_ATTR_DEVICE_nGnRnE</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="gadcc9977aabb4dc7177d30cbbac1b53d1"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_MPU_ATTR_DEVICE_nGRE</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="gac2f1c567950e3785d75773362b525390"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_MPU_ATTR_MEMORY_</td>
+          <td>(</td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">NT, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">WB, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">RA, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">WA&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">NT</td><td>Non-Transient: Set to 1 for non-transient data. </td></tr>
+    <tr><td class="paramname">WB</td><td>Write-Back: Set to 1 to use write-back update policy. </td></tr>
+    <tr><td class="paramname">RA</td><td>Read Allocation: Set to 1 to use cache allocation on read miss. </td></tr>
+    <tr><td class="paramname">WA</td><td>Write Allocation: Set to 1 to use cache allocation on write miss. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+</div>
+</div>
+<a class="anchor" id="ga03266f9660485693eb1baec6ba255ab2"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_MPU_ATTR_NON_CACHEABLE&#160;&#160;&#160;( 4U )</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="gafe39c2f98058bcac7e7e0501e64e7a9d"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_MPU_RBAR</td>
+          <td>(</td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">BASE, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">SH, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">RO, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">NP, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">XN&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">BASE</td><td>The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned. </td></tr>
+    <tr><td class="paramname">SH</td><td>Defines the Shareability domain for this memory region. </td></tr>
+    <tr><td class="paramname">RO</td><td>Read-Only: Set to 1 for a read-only memory region. </td></tr>
+    <tr><td class="paramname">NP</td><td>Non-Privileged: Set to 1 for a non-privileged memory region. </td></tr>
+    <tr><td class="paramname">XN</td><td>eXecute Never: Set to 1 for a non-executable memory region. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+</div>
+</div>
+<a class="anchor" id="gaeaaa071276ba7956944e6c3dc05d677e"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_MPU_RLAR</td>
+          <td>(</td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">LIMIT, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">IDX&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">LIMIT</td><td>The limit address bits [31:5] for this memory region. The value is one extended. </td></tr>
+    <tr><td class="paramname">IDX</td><td>The attribute index to be associated with this memory region. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+</div>
+</div>
+<a class="anchor" id="ga73c70127f24f34781ad463cbe51d8f6b"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_MPU_SH_INNER</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="ga3d0f688198289f72264f73cf72a742e8"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_MPU_SH_NON</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="gac4fddbdb9e1350bce6906de33c1fd500"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_MPU_SH_OUTER</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<h2 class="groupheader">Function Documentation</h2>
+<a class="anchor" id="ga9dcb0afddf4ac351f33f3c7a5169c62c"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_ClrRegion </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>rnr</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Clear and disable the given MPU region. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">rnr</td><td>Region number to be cleared. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+</div>
+</div>
+<a class="anchor" id="gac526bc5bfcf048ce57a44c0c0cdadbe4"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_ClrRegion_NS </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>rnr</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Clear and disable the given Non-secure MPU region. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">rnr</td><td>Region number to be cleared. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+</div>
+</div>
+<a class="anchor" id="ga01fa1151c9ec0ba5de76f908c0999316"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_ClrRegionEx </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="structMPU__Type.html">MPU_Type</a> *&#160;</td>
+          <td class="paramname"><em>mpu</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>rnr</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Clear and disable the given MPU region of the given MPU. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">mpu</td><td>Pointer to MPU to be used. </td></tr>
+    <tr><td class="paramname">rnr</td><td>Region number to be cleared. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+</div>
+</div>
+<a class="anchor" id="ga61814eba4652a0fdfb76bbe222086327"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Disable </td>
+          <td>(</td>
+          <td class="paramtype">void&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Disable the MPU. </p>
+
+</div>
+</div>
+<a class="anchor" id="ga389f9b6049d176bc83f9964d3259b712"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Disable_NS </td>
+          <td>(</td>
+          <td class="paramtype">void&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Disable the Non-secure MPU. </p>
+
+</div>
+</div>
+<a class="anchor" id="ga5a3f40314553baccdeea551f86d9a997"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Enable </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>MPU_Control</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Enable the MPU. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">MPU_Control</td><td>Default access permissions for unconfigured regions. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+</div>
+</div>
+<a class="anchor" id="ga5866c75d6deb9148a1e9af6337eec50a"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> ARM_MPU_Enable_NS </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>MPU_Control</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Enable the Non-secure MPU. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">MPU_Control</td><td>Default access permissions for unconfigured regions. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+</div>
+</div>
+<a class="anchor" id="gaca76614e3091c7324aa9d60e634621bf"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Load </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>rnr</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *&#160;</td>
+          <td class="paramname"><em>table</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>cnt</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Load the given number of MPU regions from a table. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">rnr</td><td>First region number to be configured. </td></tr>
+    <tr><td class="paramname">table</td><td>Pointer to the MPU configuration table. </td></tr>
+    <tr><td class="paramname">cnt</td><td>Amount of regions to be configured.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line"><span class="keyword">const</span> <a class="code" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> mpuTable[1][4] = {</div>
+<div class="line">  {</div>
+<div class="line">    <span class="comment">//                     BASE          SH              RO   NP   XN                         LIMIT         ATTR </span></div>
+<div class="line">    { .<a class="code" href="structARM__MPU__Region__t.html#afe7a7721aa08988d915670efa432cdd2">RBAR</a> = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x08000000UL, <a class="code" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, 0UL, 1UL, 0UL), .RLAR = <a class="code" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x080FFFFFUL, 0UL) },</div>
+<div class="line">    { .RBAR = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x20000000UL, <a class="code" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, 0UL, 1UL, 1UL), .RLAR = <a class="code" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x20007FFFUL, 0UL) },</div>
+<div class="line">    { .RBAR = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x40020000UL, <a class="code" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, 0UL, 1UL, 1UL), .RLAR = <a class="code" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x40021FFFUL, 1UL) },</div>
+<div class="line">    { .RBAR = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x40022000UL, <a class="code" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, 0UL, 1UL, 1UL), .RLAR = <a class="code" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x40022FFFUL, 1UL) }</div>
+<div class="line">  }</div>
+<div class="line">};</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> UpdateMpu(uint32_t idx)</div>
+<div class="line">{</div>
+<div class="line">   <a class="code" href="group__mpu__functions.html#gafa27b26d5847fa8e465584e376b6078a">ARM_MPU_Load</a>(0, mpuTable[idx], 4);</div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="ga7f8c6e09be98067d613e4df1832c543d"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Load_NS </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>rnr</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *&#160;</td>
+          <td class="paramname"><em>table</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>cnt</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Load the given number of MPU regions from a table to the Non-secure MPU. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">rnr</td><td>First region number to be configured. </td></tr>
+    <tr><td class="paramname">table</td><td>Pointer to the MPU configuration table. </td></tr>
+    <tr><td class="paramname">cnt</td><td>Amount of regions to be configured. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+</div>
+</div>
+<a class="anchor" id="gab6094419f2abd678f1f3b121cd115049"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_LoadEx </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="structMPU__Type.html">MPU_Type</a> *&#160;</td>
+          <td class="paramname"><em>mpu</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>rnr</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *&#160;</td>
+          <td class="paramname"><em>table</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>cnt</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Load the given number of MPU regions from a table to the given MPU. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">mpu</td><td>Pointer to the MPU registers to be used. </td></tr>
+    <tr><td class="paramname">rnr</td><td>First region number to be configured. </td></tr>
+    <tr><td class="paramname">table</td><td>Pointer to the MPU configuration table. </td></tr>
+    <tr><td class="paramname">cnt</td><td>Amount of regions to be configured. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+</div>
+</div>
+<a class="anchor" id="gac1a949403bf84eecaf407003fb553ae7"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_OrderedMemcpy </td>
+          <td>(</td>
+          <td class="paramtype">volatile uint32_t *&#160;</td>
+          <td class="paramname"><em>dst</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint32_t *<a class="el" href="group__compiler__conntrol__gr.html#ga378ac21329d33f561f90265eef89f564">__RESTRICT</a>&#160;</td>
+          <td class="paramname"><em>src</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>len</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Memcopy with strictly ordered memory access, e.g. for register targets. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">dst</td><td>Destination data is copied to. </td></tr>
+    <tr><td class="paramname">src</td><td>Source data is copied from. </td></tr>
+    <tr><td class="paramname">len</td><td>Amount of data words to be copied. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+</div>
+</div>
+<a class="anchor" id="gab5b3c0a53d19c09a5550f1d9071ae65c"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetMemAttr </td>
+          <td>(</td>
+          <td class="paramtype">uint8_t&#160;</td>
+          <td class="paramname"><em>idx</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint8_t&#160;</td>
+          <td class="paramname"><em>attr</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Set the memory attribute encoding. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">idx</td><td>The attribute index to be set [0-7] </td></tr>
+    <tr><td class="paramname">attr</td><td>The attribute value to be set. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+</div>
+</div>
+<a class="anchor" id="ga5100a150a755902af2455a455a329ef9"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetMemAttr_NS </td>
+          <td>(</td>
+          <td class="paramtype">uint8_t&#160;</td>
+          <td class="paramname"><em>idx</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint8_t&#160;</td>
+          <td class="paramname"><em>attr</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Set the memory attribute encoding to the Non-secure MPU. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">idx</td><td>The attribute index to be set [0-7] </td></tr>
+    <tr><td class="paramname">attr</td><td>The attribute value to be set. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+</div>
+</div>
+<a class="anchor" id="ga1799413f08a157d636a1491371c15ce2"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetMemAttrEx </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="structMPU__Type.html">MPU_Type</a> *&#160;</td>
+          <td class="paramname"><em>mpu</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint8_t&#160;</td>
+          <td class="paramname"><em>idx</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint8_t&#160;</td>
+          <td class="paramname"><em>attr</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Set the memory attribute encoding to the given MPU. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">mpu</td><td>Pointer to the MPU to be configured. </td></tr>
+    <tr><td class="paramname">idx</td><td>The attribute index to be set [0-7] </td></tr>
+    <tr><td class="paramname">attr</td><td>The attribute value to be set. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+</div>
+</div>
+<a class="anchor" id="ga6d7f220015c070c0e469948c1775ee3d"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetRegion </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>rnr</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>rbar</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>rlar</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Configure the given MPU region. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">rnr</td><td>Region number to be configured. </td></tr>
+    <tr><td class="paramname">rbar</td><td>Value for RBAR register. </td></tr>
+    <tr><td class="paramname">rlar</td><td>Value for RLAR register. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+</div>
+</div>
+<a class="anchor" id="ga7566931ca9bb9f22d213a67ec5f8c745"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetRegion_NS </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>rnr</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>rbar</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>rlar</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Configure the given Non-secure MPU region. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">rnr</td><td>Region number to be configured. </td></tr>
+    <tr><td class="paramname">rbar</td><td>Value for RBAR register. </td></tr>
+    <tr><td class="paramname">rlar</td><td>Value for RLAR register. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+</div>
+</div>
+<a class="anchor" id="ga3d50ba8546252bea959e45c8fdf16993"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetRegionEx </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="structMPU__Type.html">MPU_Type</a> *&#160;</td>
+          <td class="paramname"><em>mpu</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>rnr</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>rbar</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>rlar</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Configure the given MPU region of the given MPU. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramname">mpu</td><td>Pointer to MPU to be used. </td></tr>
+    <tr><td class="paramname">rnr</td><td>Region number to be configured. </td></tr>
+    <tr><td class="paramname">rbar</td><td>Value for RBAR register. </td></tr>
+    <tr><td class="paramname">rlar</td><td>Value for RLAR register. </td></tr>
+  </table>
+  </dd>
+</dl>
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Core/html/group__mpu8__functions.js b/docs/Core/html/group__mpu8__functions.js
new file mode 100644
index 0000000..9c95721
--- /dev/null
+++ b/docs/Core/html/group__mpu8__functions.js
@@ -0,0 +1,39 @@
+var group__mpu8__functions =
+[
+    [ "ARM_MPU_Region_t", "structARM__MPU__Region__t.html", [
+      [ "RASR", "structARM__MPU__Region__t.html#a6a3e404b403c8df611f27d902d745d8d", null ],
+      [ "RBAR", "structARM__MPU__Region__t.html#afe7a7721aa08988d915670efa432cdd2", null ],
+      [ "RLAR", "structARM__MPU__Region__t.html#ab5d3a650dbffd0b272bf7df5b140e8a8", null ]
+    ] ],
+    [ "ARM_MPU_AP_", "group__mpu8__functions.html#ga81b2aa3fb55cdd5feadff02da10d391b", null ],
+    [ "ARM_MPU_ATTR", "group__mpu8__functions.html#ga2c465cc9429b8233bcb9cd7cbef0e54c", null ],
+    [ "ARM_MPU_ATTR_DEVICE", "group__mpu8__functions.html#gab4bfac6284dc050dc6fa6aeb8e954c2c", null ],
+    [ "ARM_MPU_ATTR_DEVICE_GRE", "group__mpu8__functions.html#ga496bcd6a2bbd038d8935049fec9d0fda", null ],
+    [ "ARM_MPU_ATTR_DEVICE_nGnRE", "group__mpu8__functions.html#ga6e08ae44fab85e03fea96ae6a5fcdfb0", null ],
+    [ "ARM_MPU_ATTR_DEVICE_nGnRnE", "group__mpu8__functions.html#gabfa9ae279357044cf5b74e77af22a686", null ],
+    [ "ARM_MPU_ATTR_DEVICE_nGRE", "group__mpu8__functions.html#gadcc9977aabb4dc7177d30cbbac1b53d1", null ],
+    [ "ARM_MPU_ATTR_MEMORY_", "group__mpu8__functions.html#gac2f1c567950e3785d75773362b525390", null ],
+    [ "ARM_MPU_ATTR_NON_CACHEABLE", "group__mpu8__functions.html#ga03266f9660485693eb1baec6ba255ab2", null ],
+    [ "ARM_MPU_RBAR", "group__mpu8__functions.html#gafe39c2f98058bcac7e7e0501e64e7a9d", null ],
+    [ "ARM_MPU_RLAR", "group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e", null ],
+    [ "ARM_MPU_SH_INNER", "group__mpu8__functions.html#ga73c70127f24f34781ad463cbe51d8f6b", null ],
+    [ "ARM_MPU_SH_NON", "group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8", null ],
+    [ "ARM_MPU_SH_OUTER", "group__mpu8__functions.html#gac4fddbdb9e1350bce6906de33c1fd500", null ],
+    [ "ARM_MPU_ClrRegion", "group__mpu8__functions.html#ga9dcb0afddf4ac351f33f3c7a5169c62c", null ],
+    [ "ARM_MPU_ClrRegion_NS", "group__mpu8__functions.html#gac526bc5bfcf048ce57a44c0c0cdadbe4", null ],
+    [ "ARM_MPU_ClrRegionEx", "group__mpu8__functions.html#ga01fa1151c9ec0ba5de76f908c0999316", null ],
+    [ "ARM_MPU_Disable", "group__mpu8__functions.html#ga61814eba4652a0fdfb76bbe222086327", null ],
+    [ "ARM_MPU_Disable_NS", "group__mpu8__functions.html#ga389f9b6049d176bc83f9964d3259b712", null ],
+    [ "ARM_MPU_Enable", "group__mpu8__functions.html#ga5a3f40314553baccdeea551f86d9a997", null ],
+    [ "ARM_MPU_Enable_NS", "group__mpu8__functions.html#ga5866c75d6deb9148a1e9af6337eec50a", null ],
+    [ "ARM_MPU_Load", "group__mpu8__functions.html#gaca76614e3091c7324aa9d60e634621bf", null ],
+    [ "ARM_MPU_Load_NS", "group__mpu8__functions.html#ga7f8c6e09be98067d613e4df1832c543d", null ],
+    [ "ARM_MPU_LoadEx", "group__mpu8__functions.html#gab6094419f2abd678f1f3b121cd115049", null ],
+    [ "ARM_MPU_OrderedMemcpy", "group__mpu8__functions.html#gac1a949403bf84eecaf407003fb553ae7", null ],
+    [ "ARM_MPU_SetMemAttr", "group__mpu8__functions.html#gab5b3c0a53d19c09a5550f1d9071ae65c", null ],
+    [ "ARM_MPU_SetMemAttr_NS", "group__mpu8__functions.html#ga5100a150a755902af2455a455a329ef9", null ],
+    [ "ARM_MPU_SetMemAttrEx", "group__mpu8__functions.html#ga1799413f08a157d636a1491371c15ce2", null ],
+    [ "ARM_MPU_SetRegion", "group__mpu8__functions.html#ga6d7f220015c070c0e469948c1775ee3d", null ],
+    [ "ARM_MPU_SetRegion_NS", "group__mpu8__functions.html#ga7566931ca9bb9f22d213a67ec5f8c745", null ],
+    [ "ARM_MPU_SetRegionEx", "group__mpu8__functions.html#ga3d50ba8546252bea959e45c8fdf16993", null ]
+];
\ No newline at end of file
diff --git a/docs/Core/html/group__mpu__defines.html b/docs/Core/html/group__mpu__defines.html
index ba7ee01..ad14e84 100644
--- a/docs/Core/html/group__mpu__defines.html
+++ b/docs/Core/html/group__mpu__defines.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -110,7 +110,7 @@
   <div class="summary">
 <a href="#define-members">Macros</a>  </div>
   <div class="headertitle">
-<div class="title">Define values<div class="ingroups"><a class="el" href="group__mpu__functions.html">MPU Functions for Armv7-M</a></div></div>  </div>
+<div class="title">Define values<div class="ingroups"><a class="el" href="group__mpu__functions.html">MPU Functions for Armv6-M/v7-M</a></div></div>  </div>
 </div><!--header-->
 <div class="contents">
 
@@ -291,7 +291,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/group__mpu__functions.html b/docs/Core/html/group__mpu__functions.html
index 0803dee..82bccc6 100644
--- a/docs/Core/html/group__mpu__functions.html
+++ b/docs/Core/html/group__mpu__functions.html
@@ -3,8 +3,8 @@
 <head>
 <meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
 <meta http-equiv="X-UA-Compatible" content="IE=9"/>
-<title>MPU Functions for Armv7-M</title>
-<title>CMSIS-Core (Cortex-M): MPU Functions for Armv7-M</title>
+<title>MPU Functions for Armv6-M/v7-M</title>
+<title>CMSIS-Core (Cortex-M): MPU Functions for Armv6-M/v7-M</title>
 <link href="tabs.css" rel="stylesheet" type="text/css"/>
 <link href="cmsis.css" rel="stylesheet" type="text/css" />
 <script type="text/javascript" src="jquery.js"></script>
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -113,7 +113,7 @@
 <a href="#define-members">Macros</a> &#124;
 <a href="#func-members">Functions</a>  </div>
   <div class="headertitle">
-<div class="title">MPU Functions for Armv7-M</div>  </div>
+<div class="title">MPU Functions for Armv6-M/v7-M</div>  </div>
 </div><!--header-->
 <div class="contents">
 
@@ -160,6 +160,8 @@
 <tr class="separator:ga16931f9ad84d7289e8218e169ae6db5d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga042ba1a6a1a58795231459ac0410b809"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu__functions.html#ga042ba1a6a1a58795231459ac0410b809">ARM_MPU_SetRegionEx</a> (uint32_t rnr, uint32_t rbar, uint32_t rasr)</td></tr>
 <tr class="separator:ga042ba1a6a1a58795231459ac0410b809"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac1a949403bf84eecaf407003fb553ae7"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu__functions.html#gac1a949403bf84eecaf407003fb553ae7">ARM_MPU_OrderedMemcpy</a> (volatile uint32_t *dst, const uint32_t *<a class="el" href="group__compiler__conntrol__gr.html#ga378ac21329d33f561f90265eef89f564">__RESTRICT</a> src, uint32_t len)</td></tr>
+<tr class="separator:gac1a949403bf84eecaf407003fb553ae7"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gafa27b26d5847fa8e465584e376b6078a"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu__functions.html#gafa27b26d5847fa8e465584e376b6078a">ARM_MPU_Load</a> (MPU_Region_t const *table, uint32_t cnt)</td></tr>
 <tr class="separator:gafa27b26d5847fa8e465584e376b6078a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
@@ -403,7 +405,7 @@
   </table>
   </dd>
 </dl>
-<p>The function <a class="el" href="group__mpu__functions.html#ga31406efd492ec9a091a70ffa2d8a42fb">ARM_MPU_Enable</a> writes to the register <a class="el" href="structMPU__Type.html#a769178ef949f0d5d8f18ddbd9e4e926f">MPU-&gt;CTRL</a> and sets bit ENABLE. The parameter <em>MPU_CTRL</em> provides additional bit values (see table below) that configure the MPU behaviour. For processors that implement an <b>MPU Fault Handler</b> the <a class="el" href="group__NVIC__gr.html">MemoryManagement_IRQn</a> exception is enabled by setting the bit MEMFAULTACT in register SBC-&gt;SHCSR.</p>
+<p>The function <a class="el" href="group__mpu8__functions.html#ga5a3f40314553baccdeea551f86d9a997">ARM_MPU_Enable</a> writes to the register <a class="el" href="structMPU__Type.html#a769178ef949f0d5d8f18ddbd9e4e926f">MPU-&gt;CTRL</a> and sets bit ENABLE. The parameter <em>MPU_CTRL</em> provides additional bit values (see table below) that configure the MPU behaviour. For processors that implement an <b>MPU Fault Handler</b> the <a class="el" href="group__NVIC__gr.html">MemoryManagement_IRQn</a> exception is enabled by setting the bit MEMFAULTACT in register SBC-&gt;SHCSR.</p>
 <p>The following table contains possible values for the parameter <em>MPU_CTRL</em> that set specific bits in register MPU-&gt;CTRL. </p>
 <table class="doxtable">
 <tr>
@@ -453,11 +455,11 @@
   </table>
   </dd>
 </dl>
-<dl class="section note"><dt>Note</dt><dd>only up to 16 regions can be handled as the function <a class="el" href="group__mpu__functions.html#gafa27b26d5847fa8e465584e376b6078a">ARM_MPU_Load</a> uses the REGION field in <a class="el" href="structMPU__Type.html#a990c609b26d990b8ba832b110adfd353">MPU-&gt;RBAR</a>.</dd></dl>
+<dl class="section note"><dt>Note</dt><dd>only up to 16 regions can be handled as the function <a class="el" href="group__mpu8__functions.html#gaca76614e3091c7324aa9d60e634621bf">ARM_MPU_Load</a> uses the REGION field in <a class="el" href="structMPU__Type.html#a990c609b26d990b8ba832b110adfd353">MPU-&gt;RBAR</a>.</dd></dl>
 <p><b>Example:</b> </p>
 <div class="fragment"><div class="line"><span class="keyword">const</span> <a class="code" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> mpuTable[3][4] = {</div>
 <div class="line">  {</div>
-<div class="line">    { .<a class="code" href="structARM__MPU__Region__t.html#aa5e3c6aeaddbc0c283085dc971dd1a22">RBAR</a> = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0UL, 0x08000000UL), .RASR = <a class="code" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(0UL, ARM_MPU_AP_FULL, 0UL, 0UL, 1UL, 1UL, 0x00UL, ARM_MPU_REGION_SIZE_1MB)  },</div>
+<div class="line">    { .<a class="code" href="structARM__MPU__Region__t.html#afe7a7721aa08988d915670efa432cdd2">RBAR</a> = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0UL, 0x08000000UL), .RASR = <a class="code" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(0UL, ARM_MPU_AP_FULL, 0UL, 0UL, 1UL, 1UL, 0x00UL, ARM_MPU_REGION_SIZE_1MB)  },</div>
 <div class="line">    { .RBAR = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(1UL, 0x20000000UL), .RASR = <a class="code" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(1UL, ARM_MPU_AP_FULL, 0UL, 0UL, 1UL, 1UL, 0x00UL, ARM_MPU_REGION_SIZE_32KB) },</div>
 <div class="line">    { .RBAR = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(2UL, 0x40020000UL), .RASR = <a class="code" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(1UL, ARM_MPU_AP_FULL, 2UL, 0UL, 0UL, 0UL, 0x00UL, ARM_MPU_REGION_SIZE_8KB)  }, </div>
 <div class="line">    { .RBAR = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(3UL, 0x40022000UL), .RASR = <a class="code" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(1UL, ARM_MPU_AP_FULL, 2UL, 0UL, 0UL, 0UL, 0xC0UL, ARM_MPU_REGION_SIZE_4KB)  }</div>
@@ -483,6 +485,47 @@
 </div><!-- fragment --> 
 </div>
 </div>
+<a class="anchor" id="gac1a949403bf84eecaf407003fb553ae7"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_OrderedMemcpy </td>
+          <td>(</td>
+          <td class="paramtype">volatile uint32_t *&#160;</td>
+          <td class="paramname"><em>dst</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint32_t *<a class="el" href="group__compiler__conntrol__gr.html#ga378ac21329d33f561f90265eef89f564">__RESTRICT</a>&#160;</td>
+          <td class="paramname"><em>src</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>len</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Memcopy with strictly ordered memory access, e.g. for register targets. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
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 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Core/html/group__mpu__functions.js b/docs/Core/html/group__mpu__functions.js
index a7f207f..dbc5445 100644
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+      [ "RBAR", "structARM__MPU__Region__t.html#afe7a7721aa08988d915670efa432cdd2", null ],
+      [ "RLAR", "structARM__MPU__Region__t.html#ab5d3a650dbffd0b272bf7df5b140e8a8", null ]
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+    [ "ARM_MPU_OrderedMemcpy", "group__mpu__functions.html#gac1a949403bf84eecaf407003fb553ae7", null ],
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diff --git a/docs/Core/html/group__nvic__trustzone__functions.html b/docs/Core/html/group__nvic__trustzone__functions.html
index 8d56623..5b1fc16 100644
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+++ b/docs/Core/html/group__nvic__trustzone__functions.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -110,7 +110,7 @@
   <div class="summary">
 <a href="#func-members">Functions</a>  </div>
   <div class="headertitle">
-<div class="title">NVIC Functions<div class="ingroups"><a class="el" href="group__trustzone__functions.html">TrustZone for Armv8-M</a></div></div>  </div>
+<div class="title">NVIC Functions<div class="ingroups"><a class="el" href="group__trustzone__functions.html">TrustZone for Armv8-M/v8.1-M</a></div></div>  </div>
 </div><!--header-->
 <div class="contents">
 
@@ -476,7 +476,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Core/html/group__peripheral__gr.html b/docs/Core/html/group__peripheral__gr.html
index 36d8415..ea0720f 100644
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+++ b/docs/Core/html/group__peripheral__gr.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
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    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -340,7 +340,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/group__sau__trustzone__functions.html b/docs/Core/html/group__sau__trustzone__functions.html
index c1cb706..b27e637 100644
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+++ b/docs/Core/html/group__sau__trustzone__functions.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -110,7 +110,7 @@
   <div class="summary">
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   <div class="headertitle">
-<div class="title">SAU Functions<div class="ingroups"><a class="el" href="group__trustzone__functions.html">TrustZone for Armv8-M</a></div></div>  </div>
+<div class="title">SAU Functions<div class="ingroups"><a class="el" href="group__trustzone__functions.html">TrustZone for Armv8-M/v8.1-M</a></div></div>  </div>
 </div><!--header-->
 <div class="contents">
 
@@ -189,7 +189,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/group__system__init__gr.html b/docs/Core/html/group__system__init__gr.html
index 96bf4fe..845ddd5 100644
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+++ b/docs/Core/html/group__system__init__gr.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
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    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
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 <li>A global variable that contains the system frequency, <a class="el" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6">SystemCoreClock</a>.</li>
 </ul>
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+<dl class="section note"><dt>Note</dt><dd>Please pay special attention to the static variable <code>SystemCoreClock</code>. This variable might be used throughout the whole system initialization and runtime to calculate frequency/time related values. Thus one must assure that the variable always reflects the actual system clock speed. Be aware that a value stored to <code>SystemCoreClock</code> during low level initializaton (i.e. <code><a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2" title="Function to Initialize the system. ">SystemInit()</a></code>) might get overwritten by C libray startup code and/or .bss section initialization. Thus its highly recommended to call <a class="el" href="group__system__init__gr.html#gae0c36a9591fe6e9c45ecb21a794f0f0f">SystemCoreClockUpdate</a> at the beginning of the user <code>main()</code> routine.</dd></dl>
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@@ -219,7 +219,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
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-<div class="title">SysTick Functions<div class="ingroups"><a class="el" href="group__trustzone__functions.html">TrustZone for Armv8-M</a></div></div>  </div>
+<div class="title">SysTick Functions<div class="ingroups"><a class="el" href="group__trustzone__functions.html">TrustZone for Armv8-M/v8.1-M</a></div></div>  </div>
 </div><!--header-->
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@@ -161,7 +161,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Core/html/group__trustzone__functions.html b/docs/Core/html/group__trustzone__functions.html
index aadc6ba..50161cd 100644
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-<title>TrustZone for Armv8-M</title>
-<title>CMSIS-Core (Cortex-M): TrustZone for Armv8-M</title>
+<title>TrustZone for Armv8-M/v8.1-M</title>
+<title>CMSIS-Core (Cortex-M): TrustZone for Armv8-M/v8.1-M</title>
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-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
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   <div class="headertitle">
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 <div class="contents">
 
-<p>Functions that related to optional Armv8-M security extension.  
+<p>Functions that related to optional Armv8-M and Armv8.1-M security extension.  
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
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-<p>Version #define symbols for CMSIS release specific C/C++ source code.  
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-<table class="memberdecls">
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-<tr class="memitem:ga2ecc1658e18eb1a0be7959e33b836d05"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__version__control__depricated__gr.html#ga2ecc1658e18eb1a0be7959e33b836d05">__XXX_CMSIS_VERSION_MAIN</a></td></tr>
-<tr class="memdesc:ga2ecc1658e18eb1a0be7959e33b836d05"><td class="mdescLeft">&#160;</td><td class="mdescRight">Contains the CMSIS major version for core of type XXX, i.e. CM0 or SC300.  <a href="#ga2ecc1658e18eb1a0be7959e33b836d05">More...</a><br/></td></tr>
-<tr class="separator:ga2ecc1658e18eb1a0be7959e33b836d05"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga962096f43e0d194f0b79021964c57fbd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__version__control__depricated__gr.html#ga962096f43e0d194f0b79021964c57fbd">__XXX_CMSIS_VERSION_SUB</a></td></tr>
-<tr class="memdesc:ga962096f43e0d194f0b79021964c57fbd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Contains the CMSIS minor version for core of type XXX, i.e. CM0 or SC300.  <a href="#ga962096f43e0d194f0b79021964c57fbd">More...</a><br/></td></tr>
-<tr class="separator:ga962096f43e0d194f0b79021964c57fbd"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gabea7df329b150f620ee42f9d82516241"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__version__control__depricated__gr.html#gabea7df329b150f620ee42f9d82516241">__XXX_CMSIS_VERSION</a></td></tr>
-<tr class="memdesc:gabea7df329b150f620ee42f9d82516241"><td class="mdescLeft">&#160;</td><td class="mdescRight">Contains the CMSIS version for core of type XXX, i.e. CM0 or SC300.  <a href="#gabea7df329b150f620ee42f9d82516241">More...</a><br/></td></tr>
-<tr class="separator:gabea7df329b150f620ee42f9d82516241"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Prior CMSIS release 5.1.0 the version information was core specific.</p>
-<p><b>Code Example:</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#if !defined(__CM_CMSIS_VERSION) &amp;&amp; defined(__CORTEX_M)</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#if ((__CORTEX_M == 0) &amp;&amp; (__CM0_CMSIS_VERSION &gt;= 0x00050000)) || \</span></div>
-<div class="line"><span class="preprocessor">    ((__CORTEX_M == 3) &amp;&amp; (__CM3_CMSIS_VERSION &gt;= 0x00050000)) || \</span></div>
-<div class="line"><span class="preprocessor">    ((__CORTEX_M == 4) &amp;&amp; (__CM4_CMSIS_VERSION &gt;= 0x00050000)) || \</span></div>
-<div class="line"><span class="preprocessor">    ((__CORTEX_M == 7) &amp;&amp; (__CM7_CMSIS_VERSION &gt;= 0x00050000))</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#error Yes, we have CMSIS 5!</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#else</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#error We need CMSIS 5!</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#endif</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#else</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#error We need a Cortex-M controller!</span></div>
-<div class="line"><span class="preprocessor">#endif</span></div>
-</div><!-- fragment --> <h2 class="groupheader">Macro Definition Documentation</h2>
-<a class="anchor" id="gabea7df329b150f620ee42f9d82516241"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define __XXX_CMSIS_VERSION</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>The CMSIS version is a combination of the <a class="el" href="group__version__control__gr.html#ga85987c5fcc1e012d7ac01369ee6ca2b5">__CM_CMSIS_VERSION_MAIN</a> (bits 31..15) and <a class="el" href="group__version__control__gr.html#ga22083cbe7f0606cfd538ec12b2e41608">__CM_CMSIS_VERSION_SUB</a> (bits 14..0). </p>
-<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000003">Deprecated:</a></b></dt><dd>Only rely on this define for CMSIS 5.0 and before. </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga2ecc1658e18eb1a0be7959e33b836d05"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define __XXX_CMSIS_VERSION_MAIN</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>The CMSIS major version can be used to differentiate between CMSIS major releases. </p>
-<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000001">Deprecated:</a></b></dt><dd>Only rely on this define for CMSIS 5.0 and before. </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga962096f43e0d194f0b79021964c57fbd"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define __XXX_CMSIS_VERSION_SUB</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>The CMSIS minor version can be used to query a CMSIS release update level. </p>
-<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000002">Deprecated:</a></b></dt><dd>Only rely on this define for CMSIS 5.0 and before. </dd></dl>
-
-</div>
-</div>
-</div><!-- contents -->
-</div><!-- doc-content -->
-<!-- start footer part -->
-<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
-  <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
-	<!--
-    <a href="http://www.doxygen.org/index.html">
-    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
-	-->
-	</li>
-  </ul>
-</div>
-</body>
-</html>
diff --git a/docs/Core/html/group__version__control__depricated__gr.js b/docs/Core/html/group__version__control__depricated__gr.js
deleted file mode 100644
index 02d3c83..0000000
--- a/docs/Core/html/group__version__control__depricated__gr.js
+++ /dev/null
@@ -1,6 +0,0 @@
-var group__version__control__depricated__gr =
-[
-    [ "__XXX_CMSIS_VERSION", "group__version__control__depricated__gr.html#gabea7df329b150f620ee42f9d82516241", null ],
-    [ "__XXX_CMSIS_VERSION_MAIN", "group__version__control__depricated__gr.html#ga2ecc1658e18eb1a0be7959e33b836d05", null ],
-    [ "__XXX_CMSIS_VERSION_SUB", "group__version__control__depricated__gr.html#ga962096f43e0d194f0b79021964c57fbd", null ]
-];
\ No newline at end of file
diff --git a/docs/Core/html/group__version__control__gr.html b/docs/Core/html/group__version__control__gr.html
index 3ac128f..6044b9a 100644
--- a/docs/Core/html/group__version__control__gr.html
+++ b/docs/Core/html/group__version__control__gr.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -108,7 +108,6 @@
 
 <div class="header">
   <div class="summary">
-<a href="#groups">Content</a> &#124;
 <a href="#define-members">Macros</a>  </div>
   <div class="headertitle">
 <div class="title">Version Control</div>  </div>
@@ -118,12 +117,6 @@
 <p>Version #define symbols for CMSIS release specific C/C++ source code.  
 <a href="#details">More...</a></p>
 <table class="memberdecls">
-<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="groups"></a>
-Content</h2></td></tr>
-<tr class="memitem:group__version__control__depricated__gr"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__version__control__depricated__gr.html">Version Control per Core (Depricated)</a></td></tr>
-<tr class="memdesc:group__version__control__depricated__gr"><td class="mdescLeft">&#160;</td><td class="mdescRight">Version #define symbols for CMSIS release specific C/C++ source code. <br/></td></tr>
-<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table><table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
 Macros</h2></td></tr>
 <tr class="memitem:ga85987c5fcc1e012d7ac01369ee6ca2b5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__version__control__gr.html#ga85987c5fcc1e012d7ac01369ee6ca2b5">__CM_CMSIS_VERSION_MAIN</a></td></tr>
@@ -151,7 +144,14 @@
 <div class="line"><span class="preprocessor"></span><span class="preprocessor">#else</span></div>
 <div class="line"><span class="preprocessor"></span><span class="preprocessor">#error We need CMSIS 5.1 or later!</span></div>
 <div class="line"><span class="preprocessor">#endif</span></div>
-</div><!-- fragment --> <h2 class="groupheader">Macro Definition Documentation</h2>
+</div><!-- fragment --><p><b>Deprecated</b></p>
+<p>The following macros are deprecated:</p>
+<ul>
+<li><b>__XXX_CMSIS_VERSION_MAIN</b> which is replaced by <a class="el" href="group__version__control__gr.html#ga85987c5fcc1e012d7ac01369ee6ca2b5">__CM_CMSIS_VERSION_MAIN</a>.</li>
+<li><b>__XXX_CMSIS_VERSION_SUB</b> which is replaced by <a class="el" href="group__version__control__gr.html#ga22083cbe7f0606cfd538ec12b2e41608">__CM_CMSIS_VERSION_SUB</a>.</li>
+<li><b>__XXX_CMSIS_VERSION</b> which is replaced by <a class="el" href="group__version__control__gr.html#ga39f3d64ff95fb58feccc7639e537ff89">__CM_CMSIS_VERSION</a>. </li>
+</ul>
+<h2 class="groupheader">Macro Definition Documentation</h2>
 <a class="anchor" id="ga39f3d64ff95fb58feccc7639e537ff89"></a>
 <div class="memitem">
 <div class="memproto">
@@ -203,11 +203,13 @@
 <p>This define can be used to differentiate between the various available Cortex-M controllers. Possible values are:</p>
 <ul>
 <li>0 for a Cortex-M0 or Cortex-M0+</li>
+<li>1 for a Cortex-M1</li>
 <li>3 for a Cortex-M3</li>
 <li>4 for a Cortex-M4</li>
 <li>7 for a Cortex-M7</li>
 <li>23 for a Cortex-M23</li>
 <li>33 for a Cortex-M33</li>
+<li>35 for a Cortex-M35P</li>
 </ul>
 <p>This define is only available for Cortex-M class controllers. <b>Code Example:</b> </p>
 <div class="fragment"><div class="line"><span class="preprocessor">#if defined(__CORTEX_M) &amp;&amp; (__CORTEX_M == 4)</span></div>
@@ -246,7 +248,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/group__version__control__gr.js b/docs/Core/html/group__version__control__gr.js
index 32b6209..10595bf 100644
--- a/docs/Core/html/group__version__control__gr.js
+++ b/docs/Core/html/group__version__control__gr.js
@@ -1,6 +1,5 @@
 var group__version__control__gr =
 [
-    [ "Version Control per Core (Depricated)", "group__version__control__depricated__gr.html", "group__version__control__depricated__gr" ],
     [ "__CM_CMSIS_VERSION", "group__version__control__gr.html#ga39f3d64ff95fb58feccc7639e537ff89", null ],
     [ "__CM_CMSIS_VERSION_MAIN", "group__version__control__gr.html#ga85987c5fcc1e012d7ac01369ee6ca2b5", null ],
     [ "__CM_CMSIS_VERSION_SUB", "group__version__control__gr.html#ga22083cbe7f0606cfd538ec12b2e41608", null ],
diff --git a/docs/Core/html/index.doxyidx b/docs/Core/html/index.doxyidx
new file mode 100644
index 0000000..938debe
--- /dev/null
+++ b/docs/Core/html/index.doxyidx
@@ -0,0 +1,518 @@
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * @file     index.doxyidx
+ * @brief    Index file for MDK-ARM Help System
+ * @version  1.0
+ * @date     10. July 2019
+ * @note     Generated by DoxyIndex V1.2.3 on Wednesday, 10.07.2019 15:22:28
+ *           from Path 'C:\tools\PACK\ARM\CMSIS\5.6.0\\CMSIS\Documentation\Core\html',
+ */
+
+'ABCDEFHILMNOPQRSTUVWZ_bcnuwx'
+__ALIGNED, group__compiler__conntrol__gr.html#ga0c58caa5a273e2c21924509a45f8b849, Ref_CompilerControl.txt
+__ARM_ARCH_6M__, group__compiler__conntrol__gr.html#ga8be4ebde5d4dd91b161d206545ce59aa, Ref_CompilerControl.txt
+__ARM_ARCH_7EM__, group__compiler__conntrol__gr.html#ga43ab3e79ec5ecb615f1f2f6e83e7d48a, Ref_CompilerControl.txt
+__ARM_ARCH_7M__, group__compiler__conntrol__gr.html#ga43e1af8bedda108dfc4f8584e6b278a2, Ref_CompilerControl.txt
+__ARM_ARCH_8M_BASE__, group__compiler__conntrol__gr.html#gab3f1284f4cdc6c5e5c9c9d4b8ec29b2a, Ref_CompilerControl.txt
+__ARM_ARCH_8M_MAIN__, group__compiler__conntrol__gr.html#gad424c7143edd08c982dddad0ff65f4cd, Ref_CompilerControl.txt
+__ASM, group__compiler__conntrol__gr.html#ga1378040bcf22428955c6e3ce9c2053cd, Ref_CompilerControl.txt
+__BKPT, group__intrinsic__CPU__gr.html#ga92f5621626711931da71eaa8bf301af7, Ref_cmInstr.txt
+__CLREX, group__intrinsic__CPU__gr.html#ga354c5ac8870cc3dfb823367af9c4b412, Ref_cmInstr.txt
+__CLZ, group__intrinsic__CPU__gr.html#ga90884c591ac5d73d6069334eba9d6c02, Ref_cmInstr.txt
+__CM_CMSIS_VERSION, group__version__control__gr.html#ga39f3d64ff95fb58feccc7639e537ff89, Ref_VersionControl.txt
+__CM_CMSIS_VERSION_MAIN, group__version__control__gr.html#ga85987c5fcc1e012d7ac01369ee6ca2b5, Ref_VersionControl.txt
+__CM_CMSIS_VERSION_SUB, group__version__control__gr.html#ga22083cbe7f0606cfd538ec12b2e41608, Ref_VersionControl.txt
+__COMPILER_BARRIER, group__compiler__conntrol__gr.html#ga6f053389e2958b5a239a54d4e4047bf5, Ref_CompilerControl.txt
+__CORTEX_M, group__version__control__gr.html#ga63ea62503c88acab19fcf3d5743009e3, Ref_VersionControl.txt
+__CORTEX_SC, group__version__control__gr.html#gaeaaf66c86e5ae02a0e1fe542cb7f4d8c, Ref_VersionControl.txt
+__disable_fault_irq, group__Core__Register__gr.html#ga9d174f979b2f76fdb3228a9b338fd939, Ref_CoreReg.txt
+__disable_irq, group__Core__Register__gr.html#gaeb8e5f7564a8ea23678fe3c987b04013, Ref_CoreReg.txt
+__DMB, group__intrinsic__CPU__gr.html#gab1c9b393641dc2d397b3408fdbe72b96, Ref_cmInstr.txt
+__DSB, group__intrinsic__CPU__gr.html#gacb2a8ca6eae1ba4b31161578b720c199, Ref_cmInstr.txt
+__enable_fault_irq, group__Core__Register__gr.html#ga6575d37863cec5d334864f93b5b783bf, Ref_CoreReg.txt
+__enable_irq, group__Core__Register__gr.html#ga0f98dfbd252b89d12564472dbeba9c27, Ref_CoreReg.txt
+__get_APSR, group__Core__Register__gr.html#ga811c0012221ee918a75111ca84c4d5e7, Ref_CoreReg.txt
+__get_BASEPRI, group__Core__Register__gr.html#ga32da759f46e52c95bcfbde5012260667, Ref_CoreReg.txt
+__get_CONTROL, group__Core__Register__gr.html#ga963cf236b73219ce78e965deb01b81a7, Ref_CoreReg.txt
+__get_FAULTMASK, group__Core__Register__gr.html#gaa78e4e6bf619a65e9f01b4af13fed3a8, Ref_CoreReg.txt
+__get_FPSCR, group__Core__Register__gr.html#gad6d7eca9ddd1d9072dd7b020cfe64905, Ref_CoreReg.txt
+__get_IPSR, group__Core__Register__gr.html#ga2c32fc5c7f8f07fb3d436c6f6fe4e8c8, Ref_CoreReg.txt
+__get_MSP, group__Core__Register__gr.html#gab898559392ba027814e5bbb5a98b38d2, Ref_CoreReg.txt
+__get_MSPLIM, group__Core__Register__gr.html#gaf39856ca50fc88cf459031b44eb2521c, Ref_CoreReg.txt
+__get_PRIMASK, group__Core__Register__gr.html#ga799b5d9a2ae75e459264c8512c7c0e02, Ref_CoreReg.txt
+__get_PSP, group__Core__Register__gr.html#ga914dfa8eff7ca53380dd54cf1d8bebd9, Ref_CoreReg.txt
+__get_PSPLIM, group__Core__Register__gr.html#ga8b226929264e903c7019e326b42bef47, Ref_CoreReg.txt
+__get_xPSR, group__Core__Register__gr.html#ga732e08184154f44a617963cc65ff95bd, Ref_CoreReg.txt
+__INITIAL_SP, group__compiler__conntrol__gr.html#ga1002e751427b1189f92787d4e4eef965, Ref_CompilerControl.txt
+__INLINE, group__compiler__conntrol__gr.html#gade2d8d7118f8ff49547f60aa0c3382bb, Ref_CompilerControl.txt
+__ISB, group__intrinsic__CPU__gr.html#ga93c09b4709394d81977300d5f84950e5, Ref_cmInstr.txt
+__LDA, group__intrinsic__CPU__gr.html#ga22a24f416b65c2f5a82d9f1162d9394d, Ref_cmInstr.txt
+__LDAB, group__intrinsic__CPU__gr.html#ga263b9b2d9c06d731022873acddb6aa3f, Ref_cmInstr.txt
+__LDAEX, group__intrinsic__CPU__gr.html#ga3c74d923529f664eda099d1b2668b3c1, Ref_cmInstr.txt
+__LDAEXB, group__intrinsic__CPU__gr.html#ga513beada40cdd7123281f22482603bcc, Ref_cmInstr.txt
+__LDAEXH, group__intrinsic__CPU__gr.html#ga426b61640fc68f21b21ae4dc2726f3b4, Ref_cmInstr.txt
+__LDAH, group__intrinsic__CPU__gr.html#ga5810ac0b87a37e321c2f909cd3860499, Ref_cmInstr.txt
+__LDRBT, group__intrinsic__CPU__gr.html#ga9464d75db32846aa8295c3c3adfacb41, Ref_cmInstr.txt
+__LDREXB, group__intrinsic__CPU__gr.html#ga9e3ac13d8dcf4331176b624cf6234a7e, Ref_cmInstr.txt
+__LDREXH, group__intrinsic__CPU__gr.html#ga9feffc093d6f68b120d592a7a0d45a15, Ref_cmInstr.txt
+__LDREXW, group__intrinsic__CPU__gr.html#gabd78840a0f2464905b7cec791ebc6a4c, Ref_cmInstr.txt
+__LDRHT, group__intrinsic__CPU__gr.html#gaa762b8bc5634ce38cb14d62a6b2aee32, Ref_cmInstr.txt
+__LDRT, group__intrinsic__CPU__gr.html#ga616504f5da979ba8a073d428d6e8d5c7, Ref_cmInstr.txt
+__NO_RETURN, group__compiler__conntrol__gr.html#ga153a4a31b276a9758959580538720a51, Ref_CompilerControl.txt
+__NOP, group__intrinsic__CPU__gr.html#gac71fad9f0a91980fecafcb450ee0a63e, Ref_cmInstr.txt
+__PACKED, group__compiler__conntrol__gr.html#gabe8996d3d985ee1529475443cc635bf1, Ref_CompilerControl.txt
+__PACKED_STRUCT, group__compiler__conntrol__gr.html#ga4dbb70fab85207c27b581ecb6532b314, Ref_CompilerControl.txt
+__PKHBT, group__intrinsic__SIMD__gr.html#gaefb8ebf3a54e197464da1ff69a44f4b5, Ref_cm4_simd.txt
+__PKHTB, group__intrinsic__SIMD__gr.html#gafd8fe4a6d87e947caa81a69ec36c1666, Ref_cm4_simd.txt
+__PROGRAM_START, group__compiler__conntrol__gr.html#ga72db8b026c5e100254080fefabd9fd88, Ref_CompilerControl.txt
+__QADD, group__intrinsic__SIMD__gr.html#ga17b873f246c9f5e9355760ffef3dad4a, Ref_cm4_simd.txt
+__QADD16, group__intrinsic__SIMD__gr.html#gae83a53ec04b496304bed6d9fe8f7461b, Ref_cm4_simd.txt
+__QADD8, group__intrinsic__SIMD__gr.html#gaf2f5a9132dcfc6d01d34cd971c425713, Ref_cm4_simd.txt
+__QASX, group__intrinsic__SIMD__gr.html#ga87618799672e1511e33964bc71467eb3, Ref_cm4_simd.txt
+__QSAX, group__intrinsic__SIMD__gr.html#gab41eb2b17512ab01d476fc9d5bd19520, Ref_cm4_simd.txt
+__QSUB, group__intrinsic__SIMD__gr.html#ga3ba259f8f05a36f7b88b469a71ffc096, Ref_cm4_simd.txt
+__QSUB16, group__intrinsic__SIMD__gr.html#gad089605c16df9823a2c8aaa37777aae5, Ref_cm4_simd.txt
+__QSUB8, group__intrinsic__SIMD__gr.html#ga753493a65493880c28baa82c151a0d61, Ref_cm4_simd.txt
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+SPSEL, unionCONTROL__Type.html#a8cc085fea1c50a8bd9adea63931ee8e2, CONTROL_Type
+SSPSR, structTPI__Type.html#a7b72598e20066133e505bb781690dc22, TPI_Type
+Startup File startup_&lt;device&gt;.c, startup_c_pg.html, templates_pg
+Startup File startup_&lt;device&gt;.s (deprecated), startup_s_pg.html, templates_pg
+STIR, structNVIC__Type.html#a37de89637466e007171c6b135299bc75, NVIC_Type
+SVCall_IRQn, group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a4ce820b3cc6cf3a796b41aadc0cf1237, Ref_NVIC.txt
+System Configuration Files system_&lt;device&gt;.c and system_&lt;device&gt;.h, system_c_pg.html, templates_pg
+System and Clock Configuration, group__system__init__gr.html, 
+SystemCoreClock, group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6, Ref_SystemAndClock.txt
+SystemCoreClockUpdate, group__system__init__gr.html#gae0c36a9591fe6e9c45ecb21a794f0f0f, Ref_SystemAndClock.txt
+SystemInit, group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2, Ref_SystemAndClock.txt
+SysTick_Config, group__SysTick__gr.html#gabe47de40e9b0ad465b752297a9d9f427, Ref_Systick.txt
+Systick Timer (SYSTICK), group__SysTick__gr.html, 
+SysTick_IRQn, group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6dbff8f8543325f3474cbae2446776e7, Ref_NVIC.txt
+SysTick Functions, group__systick__trustzone__functions.html, 
+SysTick_Type, structSysTick__Type.html, 
+T, unionxPSR__Type.html#a7eed9fe24ae8d354cd76ae1c1110a658, xPSR_Type
+TCR, structITM__Type.html#a04b9fbc83759cb818dfa161d39628426, ITM_Type
+Template.txt, Template_8txt.html, 
+TER, structITM__Type.html#acd03c6858f7b678dab6a6121462e7807, ITM_Type
+TPI_Type, structTPI__Type.html, 
+TPR, structITM__Type.html#ae907229ba50538bf370fbdfd54c099a2, ITM_Type
+TRIGGER, structTPI__Type.html#a4d4cd2357f72333a82a1313228287bbd, TPI_Type
+TrustZone for Armv8-M/v8.1-M, group__trustzone__functions.html, 
+TYPE, structMPU__Type.html#aba02af87f77577c725cf73879cabb609, MPU_Type
+TZ_AllocModuleContext_S, group__context__trustzone__functions.html#gacd016f166bee549a0d3e970132e64a90, Ref_Trustzone.txt
+TZ_FreeModuleContext_S, group__context__trustzone__functions.html#gac84f678fbe974f8b02c683e0b8046524, Ref_Trustzone.txt
+TZ_InitContextSystem_S, group__context__trustzone__functions.html#ga926e2ec472535a6d2b8125be1a79e3c0, Ref_Trustzone.txt
+TZ_LoadContext_S, group__context__trustzone__functions.html#ga4748f6bcdd5fed279ac5a6cd7eca2689, Ref_Trustzone.txt
+TZ_NVIC_ClearPendingIRQ_NS, group__nvic__trustzone__functions.html#ga3b30f8b602b593a806617b671a50731a, Ref_Trustzone.txt
+TZ_NVIC_DisableIRQ_NS, group__nvic__trustzone__functions.html#gabc58593dea7803c1f1e1ed3b098f497c, Ref_Trustzone.txt
+TZ_NVIC_EnableIRQ_NS, group__nvic__trustzone__functions.html#gaedea4c16dd4a0b792c7e9d1da4c49295, Ref_Trustzone.txt
+TZ_NVIC_GetActive_NS, group__nvic__trustzone__functions.html#ga1bffd79bd6365d83281883b6c4b0f218, Ref_Trustzone.txt
+TZ_NVIC_GetEnableIRQ_NS, group__nvic__trustzone__functions.html#ga57d2a6736704c4a39421ed1a2e7b689b, Ref_Trustzone.txt
+TZ_NVIC_GetPendingIRQ_NS, group__nvic__trustzone__functions.html#gab85bd0d55d746caf0e414be5284afe24, Ref_Trustzone.txt
+TZ_NVIC_GetPriority_NS, group__nvic__trustzone__functions.html#gade6a8784339946fdd50575d7e65a3268, Ref_Trustzone.txt
+TZ_NVIC_GetPriorityGrouping_NS, group__nvic__trustzone__functions.html#gaf5f578628bc8b7154b29577f6f6a87fd, Ref_Trustzone.txt
+TZ_NVIC_SetPendingIRQ_NS, group__nvic__trustzone__functions.html#gaccbc9aa0eacf4d4c3d3046edb9e02edd, Ref_Trustzone.txt
+TZ_NVIC_SetPriority_NS, group__nvic__trustzone__functions.html#ga2caf0df3603378c436c838138e42059a, Ref_Trustzone.txt
+TZ_NVIC_SetPriorityGrouping_NS, group__nvic__trustzone__functions.html#ga0d3b5db0685bd95cc8bd2f7ad0891d39, Ref_Trustzone.txt
+TZ_SAU_Disable, group__sau__trustzone__functions.html#ga42e201cea0a4b09f588a28b751f726fb, Ref_Trustzone.txt
+TZ_SAU_Enable, group__sau__trustzone__functions.html#ga187377409289e34838225ce801fb102c, Ref_Trustzone.txt
+TZ_SAU_Setup, group__sau__trustzone__functions.html#ga6093bc5939ea8924fbcfdffb8f0553f1, Ref_Trustzone.txt
+TZ_StoreContext_S, group__context__trustzone__functions.html#gac106570f4905f82922fd335aeb08a1bf, Ref_Trustzone.txt
+TZ_SysTick_Config_NS, group__systick__trustzone__functions.html#gad18a1b1a6796c652f2b35e728f2e2670, Ref_Trustzone.txt
+u16, structITM__Type.html#a962a970dfd286cad7f8a8577e87d4ad3, ITM_Type
+u32, structITM__Type.html#a5834885903a557674f078f3b71fa8bc8, ITM_Type
+u8, structITM__Type.html#ae773bf9f9dac64e6c28b14aa39f74275, ITM_Type
+UsageFault_IRQn, group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6895237c9443601ac832efa635dd8bbf, Ref_NVIC.txt
+Using.txt, Using_8txt.html, 
+Using CMSIS with generic Arm Processors, using_ARM_pg.html, using_pg
+Using CMSIS in Embedded Applications, using_pg.html, 
+Using TrustZone for Armv8-M, using_TrustZone_pg.html, 
+Using Interrupt Vector Remap, using_VTOR_pg.html, using_pg
+UsingTrustZone.txt, UsingTrustZone_8txt.html, 
+V, unionxPSR__Type.html#af14df16ea0690070c45b95f2116b7a0a, xPSR_Type::V()
+VAL, structSysTick__Type.html#a9b5420d17e8e43104ddd4ae5a610af93, SysTick_Type
+Version Control, group__version__control__gr.html, 
+VTOR, structSCB__Type.html#a187a4578e920544ed967f98020fb8170, SCB_Type
+w, unionCONTROL__Type.html#a6b642cca3d96da660b1198c133ca2a1f, CONTROL_Type::w()
+WWDG_STM_IRQn, group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8aa62e040960b4beb6cba107e4703c12d2, Ref_NVIC.txt
+xPSR_Type, unionxPSR__Type.html, 
+Z, unionxPSR__Type.html#a1e5d9801013d5146f2e02d9b7b3da562, xPSR_Type::Z()
+
diff --git a/docs/Core/html/index.html b/docs/Core/html/index.html
index 24643bb..65f2e17 100644
--- a/docs/Core/html/index.html
+++ b/docs/Core/html/index.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -147,7 +147,7 @@
 <hr/>
 <h1><a class="anchor" id="ref_v6-v8M"></a>
 Processor Support</h1>
-<p>CMSIS supports the complete range of <a href="http://www.arm.com/products/processors/cortex-m/index.php" target="_blank"><b>Cortex-M processors</b></a> (with exception of Cortex-M1) and the <a href="http://www.arm.com/products/processors/instruction-set-architectures/armv8-m-architecture.php" target="_blank"><b>Armv8-M architecture</b></a> including security extensions.</p>
+<p>CMSIS supports the complete range of <a href="https://developer.arm.com/products/processors/cortex-m" target="_blank"><b>Cortex-M processors</b></a> and the <a href="http://www.arm.com/products/processors/instruction-set-architectures/armv8-m-architecture.php" target="_blank"><b>Armv8-M/v8.1-M architecture</b></a> including security extensions.</p>
 <h2><a class="anchor" id="ref_man_sec"></a>
 Cortex-M Reference Manuals</h2>
 <p>The Cortex-M Device Generic User Guides contain the programmers model and detailed information about the core peripherals and are available for:</p>
@@ -163,19 +163,27 @@
 <li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0550c/cortex_m23_r1p0_technical_reference_manual_DDI0550C_en.pdf" target="_blank"><b>Cortex-M23 Technical Reference Manual</b></a> (Armv8-M baseline architecture)</li>
 <li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.100230_0002_00_en/cortex_m33_trm_100230_0002_00_en.pdf" target="_blank"><b>Cortex-M33 Technical Reference Manual</b></a> (Armv8-M mainline architecture)</li>
 </ul>
+<p>CMSIS also supports the following Cortex-M processor variants:</p>
+<ul>
+<li><a href="https://developer.arm.com/products/processors/cortex-m/cortex-m1" target="_blank"><b>Cortex-M1</b></a> is a processor designed specifically for implementation in FPGAs (Armv6-M architecture).</li>
+<li><a href="https://developer.arm.com/products/processors/cortex-m/sc000-processor" target="_blank"><b>SecurCore SC000</b></a> is designed specifically for smartcard and security applications (Armv6-M architecture).</li>
+<li><a href="https://developer.arm.com/products/processors/cortex-m/sc300-processor" target="_blank"><b>SecurCore SC300</b></a> is designed specifically for smartcard and security applications (Armv7-M architecture).</li>
+<li><a href="https://developer.arm.com/products/processors/cortex-m/sc300-processor" target="_blank"><b>Cortex-M35P</b></a> is a temper resistant Cortex-M processor with optional software isolation using TrustZone for Armv8-M.</li>
+</ul>
 <h2><a class="anchor" id="ARMv8M"></a>
-Armv8-M Architecture</h2>
-<p>Armv8-M introduces two profiles <b>baseline</b> (for power and area constrained applications) and <b>mainline</b> (full-featured with optional SIMD, floating-point, and co-processor extensions). Both Armv8-M profiles are supported by CMSIS.</p>
+Armv8-M and Armv8.1-M Architecture</h2>
+<p>Armv8-M introduces two profiles <b>baseline</b> (for power and area constrained applications) and <b>mainline</b> (full-featured with optional SIMD, floating-point, and co-processor extensions). Both Armv8-M profiles and Armv8.1M are supported by CMSIS.</p>
 <p>The Armv8-M Architecture is described in the <a href="http://developer.arm.com/products/architecture/m-profile/docs/ddi0553/latest/armv8-m-architecture-reference-manual" target="_blank"><b>Armv8-M Architecture Reference Manual</b></a>.</p>
+<p>The Armv8.1-M Architecture further extends Armv8-M with Helium, an Microcontroller Vector Extension (MVE) and further instruction set and debug extensions. More information about Armv8.1-M Architecture is available under <a href="https://developer.arm.com/technologies/helium" target="_blank"><b>Arm Helium technology</b></a>.</p>
 <hr/>
 <h1><a class="anchor" id="tested_tools_sec"></a>
 Tested and Verified Toolchains</h1>
 <p>The <a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a> supplied by Arm have been tested and verified with the following toolchains:</p>
 <ul>
-<li>Arm: Arm Compiler 5.06 update 6 (not for Cortex-M23, Cortex-M33, Armv8-M)</li>
-<li>Arm: Arm Compiler 6.9</li>
-<li>Arm: Arm Compiler 6.6.2 (not for Cortex-M0, Cortex-M23, Cortex-M33, Armv8-M)</li>
-<li>GNU: GNU Tools for Arm Embedded 6.3.1 20170620</li>
+<li>Arm: Arm Compiler 5.06 update 6 (not for Cortex-M23/33/35P, Armv8-M, Armv8.1-M)</li>
+<li>Arm: Arm Compiler 6.12</li>
+<li>Arm: Arm Compiler 6.6.2 (not for Cortex-M0/23/33/35P, Armv8-M, Armv8.1-M)</li>
+<li>GNU: GNU Tools for Arm Embedded 8.2.1 2018q4</li>
 <li>IAR: IAR ANSI C/C++ Compiler for Arm 8.20.1.14183</li>
 </ul>
 <hr/>
@@ -184,7 +192,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/modules.html b/docs/Core/html/modules.html
index d6f059c..ce3c07d 100644
--- a/docs/Core/html/modules.html
+++ b/docs/Core/html/modules.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -113,29 +113,29 @@
 <div class="contents">
 <div class="textblock">Here is a list of all modules:</div><div class="directory">
 <div class="levels">[detail level <span onclick="javascript:toggleLevel(1);">1</span><span onclick="javascript:toggleLevel(2);">2</span>]</div><table class="directory">
-<tr id="row_0_" class="even"><td class="entry"><img id="arr_0_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('0_')"/><a class="el" href="group__version__control__gr.html" target="_self">Version Control</a></td><td class="desc">Version #define symbols for CMSIS release specific C/C++ source code </td></tr>
-<tr id="row_0_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__version__control__depricated__gr.html" target="_self">Version Control per Core (Depricated)</a></td><td class="desc">Version #define symbols for CMSIS release specific C/C++ source code </td></tr>
-<tr id="row_1_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__compiler__conntrol__gr.html" target="_self">Compiler Control</a></td><td class="desc">Compiler agnostic #define symbols for generic C/C++ source code </td></tr>
-<tr id="row_2_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__peripheral__gr.html" target="_self">Peripheral Access</a></td><td class="desc">Naming conventions and optional features for accessing peripherals </td></tr>
-<tr id="row_3_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__system__init__gr.html" target="_self">System and Clock Configuration</a></td><td class="desc">Functions for system and clock setup available in system_<em>device</em>.c </td></tr>
-<tr id="row_4_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__NVIC__gr.html" target="_self">Interrupts and Exceptions (NVIC)</a></td><td class="desc">Functions to access the Nested Vector Interrupt Controller (NVIC) </td></tr>
-<tr id="row_5_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__Core__Register__gr.html" target="_self">Core Register Access</a></td><td class="desc">Functions to access the Cortex-M core registers </td></tr>
-<tr id="row_6_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__intrinsic__CPU__gr.html" target="_self">Intrinsic Functions for CPU Instructions</a></td><td class="desc">Functions that generate specific Cortex-M CPU Instructions </td></tr>
-<tr id="row_7_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__intrinsic__SIMD__gr.html" target="_self">Intrinsic Functions for SIMD Instructions [only Cortex-M4 and Cortex-M7]</a></td><td class="desc">Access to dedicated SIMD instructions </td></tr>
-<tr id="row_8_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__fpu__functions.html" target="_self">FPU Functions</a></td><td class="desc">Functions that relate to the Floating-Point Arithmetic Unit </td></tr>
-<tr id="row_9_" class="even"><td class="entry"><img id="arr_9_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('9_')"/><a class="el" href="group__mpu__functions.html" target="_self">MPU Functions for Armv7-M</a></td><td class="desc">Functions that relate to the Memory Protection Unit </td></tr>
-<tr id="row_9_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__mpu__defines.html" target="_self">Define values</a></td><td class="desc">Define values for MPU region setup </td></tr>
-<tr id="row_10_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__SysTick__gr.html" target="_self">Systick Timer (SYSTICK)</a></td><td class="desc">Initialize and start the SysTick timer </td></tr>
-<tr id="row_11_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__ITM__Debug__gr.html" target="_self">Debug Access</a></td><td class="desc">Debug Access to the Instrumented Trace Macrocell (ITM) </td></tr>
-<tr id="row_12_" class="even"><td class="entry"><img id="arr_12_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('12_')"/><a class="el" href="group__trustzone__functions.html" target="_self">TrustZone for Armv8-M</a></td><td class="desc">Functions that related to optional Armv8-M security extension </td></tr>
-<tr id="row_12_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__coreregister__trustzone__functions.html" target="_self">Core Register Access Functions</a></td><td class="desc">Core register Access functions related to TrustZone for Armv8-M </td></tr>
-<tr id="row_12_1_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__nvic__trustzone__functions.html" target="_self">NVIC Functions</a></td><td class="desc">Nested Vector Interrupt Controller (NVIC) functions related to TrustZone for Armv8-M </td></tr>
-<tr id="row_12_2_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__systick__trustzone__functions.html" target="_self">SysTick Functions</a></td><td class="desc">SysTick functions related to TrustZone for Armv8-M </td></tr>
-<tr id="row_12_3_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sau__trustzone__functions.html" target="_self">SAU Functions</a></td><td class="desc">Secure Attribution Unit (SAU) functions related to TrustZone for Armv8-M </td></tr>
-<tr id="row_12_4_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__context__trustzone__functions.html" target="_self">RTOS Context Management</a></td><td class="desc">RTOS Thread Context Management for Armv8-M TrustZone </td></tr>
-<tr id="row_13_" class="even"><td class="entry"><img id="arr_13_" src="ftv2mlastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('13_')"/><a class="el" href="group__cache__functions__m7.html" target="_self">Cache Functions  (only Cortex-M7)</a></td><td class="desc">Functions for Instruction and Data Cache </td></tr>
-<tr id="row_13_0_"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__Icache__functions__m7.html" target="_self">I-Cache Functions</a></td><td class="desc">Functions for the instruction cache </td></tr>
-<tr id="row_13_1_" class="even"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__Dcache__functions__m7.html" target="_self">D-Cache Functions</a></td><td class="desc">Functions for the data cache </td></tr>
+<tr id="row_0_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__version__control__gr.html" target="_self">Version Control</a></td><td class="desc">Version #define symbols for CMSIS release specific C/C++ source code </td></tr>
+<tr id="row_1_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__compiler__conntrol__gr.html" target="_self">Compiler Control</a></td><td class="desc">Compiler agnostic #define symbols for generic C/C++ source code </td></tr>
+<tr id="row_2_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__peripheral__gr.html" target="_self">Peripheral Access</a></td><td class="desc">Naming conventions and optional features for accessing peripherals </td></tr>
+<tr id="row_3_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__system__init__gr.html" target="_self">System and Clock Configuration</a></td><td class="desc">Functions for system and clock setup available in system_<em>device</em>.c </td></tr>
+<tr id="row_4_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__NVIC__gr.html" target="_self">Interrupts and Exceptions (NVIC)</a></td><td class="desc">Functions to access the Nested Vector Interrupt Controller (NVIC) </td></tr>
+<tr id="row_5_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__Core__Register__gr.html" target="_self">Core Register Access</a></td><td class="desc">Functions to access the Cortex-M core registers </td></tr>
+<tr id="row_6_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__intrinsic__CPU__gr.html" target="_self">Intrinsic Functions for CPU Instructions</a></td><td class="desc">Functions that generate specific Cortex-M CPU Instructions </td></tr>
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+<tr id="row_13_1_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__nvic__trustzone__functions.html" target="_self">NVIC Functions</a></td><td class="desc">Nested Vector Interrupt Controller (NVIC) functions related to TrustZone for Armv8-M </td></tr>
+<tr id="row_13_2_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__systick__trustzone__functions.html" target="_self">SysTick Functions</a></td><td class="desc">SysTick functions related to TrustZone for Armv8-M </td></tr>
+<tr id="row_13_3_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sau__trustzone__functions.html" target="_self">SAU Functions</a></td><td class="desc">Secure Attribution Unit (SAU) functions related to TrustZone for Armv8-M </td></tr>
+<tr id="row_13_4_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__context__trustzone__functions.html" target="_self">RTOS Context Management</a></td><td class="desc">RTOS Thread Context Management for Armv8-M TrustZone </td></tr>
+<tr id="row_14_" class="even"><td class="entry"><img id="arr_14_" src="ftv2mlastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('14_')"/><a class="el" href="group__cache__functions__m7.html" target="_self">Cache Functions  (only Cortex-M7)</a></td><td class="desc">Functions for Instruction and Data Cache </td></tr>
+<tr id="row_14_0_"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__Icache__functions__m7.html" target="_self">I-Cache Functions</a></td><td class="desc">Functions for the instruction cache </td></tr>
+<tr id="row_14_1_" class="even"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__Dcache__functions__m7.html" target="_self">D-Cache Functions</a></td><td class="desc">Functions for the data cache </td></tr>
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diff --git a/docs/Core/html/search/all_f.js b/docs/Core/html/search/all_f.js
index 2dcca5c..ad80567 100644
--- a/docs/Core/html/search/all_f.js
+++ b/docs/Core/html/search/all_f.js
@@ -6,7 +6,7 @@
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+  ['rbar',['RBAR',['../structARM__MPU__Region__t.html#afe7a7721aa08988d915670efa432cdd2',1,'ARM_MPU_Region_t::RBAR()'],['../structMPU__Type.html#a990c609b26d990b8ba832b110adfd353',1,'MPU_Type::RBAR()']]],
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@@ -18,6 +18,7 @@
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   ['ref_5fmpu_2etxt',['Ref_MPU.txt',['../Ref__MPU_8txt.html',1,'']]],
+  ['ref_5fmpu8_2etxt',['Ref_MPU8.txt',['../Ref__MPU8_8txt.html',1,'']]],
   ['ref_5fnvic_2etxt',['Ref_NVIC.txt',['../Ref__NVIC_8txt.html',1,'']]],
   ['ref_5fperipheral_2etxt',['Ref_Peripheral.txt',['../Ref__Peripheral_8txt.html',1,'']]],
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   ['reserved7',['RESERVED7',['../structTPI__Type.html#a476ca23fbc9480f1697fbec871130550',1,'TPI_Type']]],
+  ['rlar',['RLAR',['../structARM__MPU__Region__t.html#ab5d3a650dbffd0b272bf7df5b140e8a8',1,'ARM_MPU_Region_t']]],
   ['rnr',['RNR',['../structMPU__Type.html#a2f7a117a12cb661c76edc4765453f05c',1,'MPU_Type']]],
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diff --git a/docs/Core/html/search/files_3.js b/docs/Core/html/search/files_3.js
index 4e04106..d4fcf76 100644
--- a/docs/Core/html/search/files_3.js
+++ b/docs/Core/html/search/files_3.js
@@ -8,6 +8,7 @@
   ['ref_5fdebug_2etxt',['Ref_Debug.txt',['../Ref__Debug_8txt.html',1,'']]],
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   ['ref_5fmpu_2etxt',['Ref_MPU.txt',['../Ref__MPU_8txt.html',1,'']]],
+  ['ref_5fmpu8_2etxt',['Ref_MPU8.txt',['../Ref__MPU8_8txt.html',1,'']]],
   ['ref_5fnvic_2etxt',['Ref_NVIC.txt',['../Ref__NVIC_8txt.html',1,'']]],
   ['ref_5fperipheral_2etxt',['Ref_Peripheral.txt',['../Ref__Peripheral_8txt.html',1,'']]],
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diff --git a/docs/Core/html/search/functions_0.js b/docs/Core/html/search/functions_0.js
index 6e64255..f864463 100644
--- a/docs/Core/html/search/functions_0.js
+++ b/docs/Core/html/search/functions_0.js
@@ -48,7 +48,7 @@
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+  ['_5f_5frevsh',['__REVSH',['../group__intrinsic__CPU__gr.html#ga211618c03a0bf3264a7b22ad626d4f0a',1,'Ref_cmInstr.txt']]],
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diff --git a/docs/Core/html/search/functions_1.js b/docs/Core/html/search/functions_1.js
index b0232f8..2aea8bb 100644
--- a/docs/Core/html/search/functions_1.js
+++ b/docs/Core/html/search/functions_1.js
@@ -1,9 +1,20 @@
 var searchData=
 [
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+  ['arm_5fmpu_5fclrregion',['ARM_MPU_ClrRegion',['../group__mpu__functions.html#ga9dcb0afddf4ac351f33f3c7a5169c62c',1,'ARM_MPU_ClrRegion(uint32_t rnr):&#160;Ref_MPU.txt'],['../group__mpu8__functions.html#ga9dcb0afddf4ac351f33f3c7a5169c62c',1,'ARM_MPU_ClrRegion(uint32_t rnr):&#160;Ref_MPU8.txt']]],
+  ['arm_5fmpu_5fclrregion_5fns',['ARM_MPU_ClrRegion_NS',['../group__mpu8__functions.html#gac526bc5bfcf048ce57a44c0c0cdadbe4',1,'Ref_MPU8.txt']]],
+  ['arm_5fmpu_5fclrregionex',['ARM_MPU_ClrRegionEx',['../group__mpu8__functions.html#ga01fa1151c9ec0ba5de76f908c0999316',1,'Ref_MPU8.txt']]],
+  ['arm_5fmpu_5fdisable',['ARM_MPU_Disable',['../group__mpu__functions.html#ga7cbc0a4a066ed90e85c8176228235d57',1,'ARM_MPU_Disable():&#160;Ref_MPU.txt'],['../group__mpu8__functions.html#ga61814eba4652a0fdfb76bbe222086327',1,'ARM_MPU_Disable(void):&#160;Ref_MPU8.txt']]],
+  ['arm_5fmpu_5fdisable_5fns',['ARM_MPU_Disable_NS',['../group__mpu8__functions.html#ga389f9b6049d176bc83f9964d3259b712',1,'Ref_MPU8.txt']]],
+  ['arm_5fmpu_5fenable',['ARM_MPU_Enable',['../group__mpu__functions.html#ga31406efd492ec9a091a70ffa2d8a42fb',1,'ARM_MPU_Enable(uint32_t MPU_CTRL):&#160;Ref_MPU.txt'],['../group__mpu8__functions.html#ga5a3f40314553baccdeea551f86d9a997',1,'ARM_MPU_Enable(uint32_t MPU_Control):&#160;Ref_MPU8.txt']]],
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+  ['arm_5fmpu_5fload',['ARM_MPU_Load',['../group__mpu__functions.html#gafa27b26d5847fa8e465584e376b6078a',1,'ARM_MPU_Load(MPU_Region_t const *table, uint32_t cnt):&#160;Ref_MPU.txt'],['../group__mpu8__functions.html#gaca76614e3091c7324aa9d60e634621bf',1,'ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const *table, uint32_t cnt):&#160;Ref_MPU8.txt']]],
+  ['arm_5fmpu_5fload_5fns',['ARM_MPU_Load_NS',['../group__mpu8__functions.html#ga7f8c6e09be98067d613e4df1832c543d',1,'Ref_MPU8.txt']]],
+  ['arm_5fmpu_5floadex',['ARM_MPU_LoadEx',['../group__mpu8__functions.html#gab6094419f2abd678f1f3b121cd115049',1,'Ref_MPU8.txt']]],
+  ['arm_5fmpu_5forderedmemcpy',['ARM_MPU_OrderedMemcpy',['../group__mpu__functions.html#gac1a949403bf84eecaf407003fb553ae7',1,'ARM_MPU_OrderedMemcpy(volatile uint32_t *dst, const uint32_t *__RESTRICT src, uint32_t len):&#160;Ref_MPU.txt'],['../group__mpu8__functions.html#gac1a949403bf84eecaf407003fb553ae7',1,'ARM_MPU_OrderedMemcpy(volatile uint32_t *dst, const uint32_t *__RESTRICT src, uint32_t len):&#160;Ref_MPU8.txt']]],
+  ['arm_5fmpu_5fsetmemattr',['ARM_MPU_SetMemAttr',['../group__mpu8__functions.html#gab5b3c0a53d19c09a5550f1d9071ae65c',1,'Ref_MPU8.txt']]],
+  ['arm_5fmpu_5fsetmemattr_5fns',['ARM_MPU_SetMemAttr_NS',['../group__mpu8__functions.html#ga5100a150a755902af2455a455a329ef9',1,'Ref_MPU8.txt']]],
+  ['arm_5fmpu_5fsetmemattrex',['ARM_MPU_SetMemAttrEx',['../group__mpu8__functions.html#ga1799413f08a157d636a1491371c15ce2',1,'Ref_MPU8.txt']]],
+  ['arm_5fmpu_5fsetregion',['ARM_MPU_SetRegion',['../group__mpu__functions.html#ga16931f9ad84d7289e8218e169ae6db5d',1,'ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr):&#160;Ref_MPU.txt'],['../group__mpu8__functions.html#ga6d7f220015c070c0e469948c1775ee3d',1,'ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar):&#160;Ref_MPU8.txt']]],
+  ['arm_5fmpu_5fsetregion_5fns',['ARM_MPU_SetRegion_NS',['../group__mpu8__functions.html#ga7566931ca9bb9f22d213a67ec5f8c745',1,'Ref_MPU8.txt']]],
+  ['arm_5fmpu_5fsetregionex',['ARM_MPU_SetRegionEx',['../group__mpu__functions.html#ga042ba1a6a1a58795231459ac0410b809',1,'ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr):&#160;Ref_MPU.txt'],['../group__mpu8__functions.html#ga3d50ba8546252bea959e45c8fdf16993',1,'ARM_MPU_SetRegionEx(MPU_Type *mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar):&#160;Ref_MPU8.txt']]]
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diff --git a/docs/Core/html/search/groups_4.js b/docs/Core/html/search/groups_4.js
index 882b2d9..9ea11b2 100644
--- a/docs/Core/html/search/groups_4.js
+++ b/docs/Core/html/search/groups_4.js
@@ -1,4 +1,5 @@
 var searchData=
 [
-  ['mpu_20functions_20for_20armv7_2dm',['MPU Functions for Armv7-M',['../group__mpu__functions.html',1,'']]]
+  ['mpu_20functions_20for_20armv8_2dm',['MPU Functions for Armv8-M',['../group__mpu8__functions.html',1,'']]],
+  ['mpu_20functions_20for_20armv6_2dm_2fv7_2dm',['MPU Functions for Armv6-M/v7-M',['../group__mpu__functions.html',1,'']]]
 ];
diff --git a/docs/Core/html/search/groups_9.js b/docs/Core/html/search/groups_9.js
index ff00e91..0f45f6a 100644
--- a/docs/Core/html/search/groups_9.js
+++ b/docs/Core/html/search/groups_9.js
@@ -1,4 +1,4 @@
 var searchData=
 [
-  ['trustzone_20for_20armv8_2dm',['TrustZone for Armv8-M',['../group__trustzone__functions.html',1,'']]]
+  ['trustzone_20for_20armv8_2dm_2fv8_2e1_2dm',['TrustZone for Armv8-M/v8.1-M',['../group__trustzone__functions.html',1,'']]]
 ];
diff --git a/docs/Core/html/search/groups_a.js b/docs/Core/html/search/groups_a.js
index 04ba1fc..dc5630c 100644
--- a/docs/Core/html/search/groups_a.js
+++ b/docs/Core/html/search/groups_a.js
@@ -1,5 +1,4 @@
 var searchData=
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-  ['version_20control_20per_20core_20_28depricated_29',['Version Control per Core (Depricated)',['../group__version__control__depricated__gr.html',1,'']]],
   ['version_20control',['Version Control',['../group__version__control__gr.html',1,'']]]
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diff --git a/docs/Core/html/search/pages_6.js b/docs/Core/html/search/pages_6.js
index 80ddf96..e566a26 100644
--- a/docs/Core/html/search/pages_6.js
+++ b/docs/Core/html/search/pages_6.js
@@ -1,6 +1,7 @@
 var searchData=
 [
   ['system_20partition_20header_20file_20partition_5f_3cdevice_3e_2eh',['System Partition Header File partition_&lt;device&gt;.h',['../partition_h_pg.html',1,'templates_pg']]],
-  ['startup_20file_20startup_5f_3cdevice_3e_2es',['Startup File startup_&lt;device&gt;.s',['../startup_s_pg.html',1,'templates_pg']]],
+  ['startup_20file_20startup_5f_3cdevice_3e_2ec',['Startup File startup_&lt;device&gt;.c',['../startup_c_pg.html',1,'templates_pg']]],
+  ['startup_20file_20startup_5f_3cdevice_3e_2es_20_28deprecated_29',['Startup File startup_&lt;device&gt;.s (deprecated)',['../startup_s_pg.html',1,'templates_pg']]],
   ['system_20configuration_20files_20system_5f_3cdevice_3e_2ec_20and_20system_5f_3cdevice_3e_2eh',['System Configuration Files system_&lt;device&gt;.c and system_&lt;device&gt;.h',['../system_c_pg.html',1,'templates_pg']]]
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diff --git a/docs/Core/html/search/search.css b/docs/Core/html/search/search.css
index 1746d13..e01a39c 100644
--- a/docs/Core/html/search/search.css
+++ b/docs/Core/html/search/search.css
@@ -4,22 +4,16 @@
     float: left;
 }
 
-#searchli {
-    float: right;
-    display: block;
-    width: 170px;
-    height: 24px;
-}
-
 #MSearchBox {
     white-space : nowrap;
     position: absolute;
     float: none;
     display: inline;
-    margin-top: 3px;
+    margin-top: 8px;
     right: 0px;
     width: 170px;
     z-index: 102;
+    background-color: white;
 }
 
 #MSearchBox .left
@@ -54,7 +48,7 @@
     height:19px;
     background:url('search_m.png') repeat-x;
     border:none;
-    width:116px;
+    width:111px;
     margin-left:20px;
     padding-left:4px;
     color: #909090;
@@ -106,7 +100,7 @@
     display: none;
     position: absolute;
     left: 0; top: 0;
-    border: 1px solid #90A5CE;
+    border: 1px solid #8EA4D0;
     background-color: #F9FAFC;
     z-index: 1;
     padding-top: 4px;
@@ -151,7 +145,7 @@
 
 a.SelectItem:hover {
     color: #FFFFFF;
-    background-color: #3D578C;
+    background-color: #3A568E;
     outline-style: none;
     text-decoration: none;
     cursor: pointer;
@@ -170,7 +164,7 @@
     position: absolute;
     left: 0; top: 0;
     border: 1px solid #000;
-    background-color: #EEF1F7;
+    background-color: #EDF1F7;
 }
 
 /* ----------------------------------- */
@@ -205,7 +199,7 @@
 
 .SRSymbol {
     font-weight: bold; 
-    color: #425E97;
+    color: #3F5D9A;
     font-family: Arial, Verdana, sans-serif;
     text-decoration: none;
     outline: none;
@@ -213,7 +207,7 @@
 
 a.SRScope {
     display: block;
-    color: #425E97; 
+    color: #3F5D9A; 
     font-family: Arial, Verdana, sans-serif;
     text-decoration: none;
     outline: none;
@@ -224,6 +218,10 @@
     text-decoration: underline;
 }
 
+span.SRScope {
+    padding-left: 4px;
+}
+
 .SRPage .SRStatus {
     padding: 2px 5px;
     font-size: 8pt;
@@ -238,3 +236,36 @@
     margin-left: 10px;
     margin-right: 10px;
 }
+
+/*---------------- External search page results */
+
+.searchresult {
+    background-color: #F0F3F8;
+}
+
+.pages b {
+   color: white;
+   padding: 5px 5px 3px 5px;
+   background-image: url("../tab_a.png");
+   background-repeat: repeat-x;
+   text-shadow: 0 1px 1px #000000;
+}
+
+.pages {
+    line-height: 17px;
+    margin-left: 4px;
+    text-decoration: none;
+}
+
+.hl {
+    font-weight: bold;
+}
+
+#searchresults {
+    margin-bottom: 20px;
+}
+
+.searchpages {
+    margin-top: 10px;
+}
+
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index d71ee71..4d2e1ff 100644
--- a/docs/Core/html/search/variables_e.js
+++ b/docs/Core/html/search/variables_e.js
@@ -4,7 +4,7 @@
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+  ['rbar',['RBAR',['../structARM__MPU__Region__t.html#afe7a7721aa08988d915670efa432cdd2',1,'ARM_MPU_Region_t::RBAR()'],['../structMPU__Type.html#a990c609b26d990b8ba832b110adfd353',1,'MPU_Type::RBAR()']]],
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   ['reserved7',['RESERVED7',['../structTPI__Type.html#a476ca23fbc9480f1697fbec871130550',1,'TPI_Type']]],
+  ['rlar',['RLAR',['../structARM__MPU__Region__t.html#ab5d3a650dbffd0b272bf7df5b140e8a8',1,'ARM_MPU_Region_t']]],
   ['rnr',['RNR',['../structMPU__Type.html#a2f7a117a12cb661c76edc4765453f05c',1,'MPU_Type']]],
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 ];
diff --git a/docs/Core/html/startup_c_pg.html b/docs/Core/html/startup_c_pg.html
new file mode 100644
index 0000000..c6fa7c9
--- /dev/null
+++ b/docs/Core/html/startup_c_pg.html
@@ -0,0 +1,319 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>Startup File startup_&lt;device&gt;.c</title>
+<title>CMSIS-Core (Cortex-M): Startup File startup_&lt;device&gt;.c</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Core (Cortex-M)
+   &#160;<span id="projectnumber">Version 5.3.0</span>
+   </div>
+   <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li><a href="modules.html"><span>Reference</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
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+$(document).ready(function(){initNavTree('startup_c_pg.html','');});
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+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
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+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">Startup File startup_&lt;device&gt;.c </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="startup_c_pg.html">Startup File startup_&lt;device&gt;.c</a> contains:</p>
+<ul>
+<li>The reset handler which is executed after CPU reset and typically calls the <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2">SystemInit</a> function.</li>
+<li>The setup values for the Main Stack Pointer (MSP).</li>
+<li>Exception vectors of the Cortex-M Processor with weak functions that implement default routines.</li>
+<li>Interrupt vectors that are device specific with weak functions that implement default routines.</li>
+</ul>
+<p>The file exists for each supported toolchain and is the only tool-chain specific CMSIS file.</p>
+<p>To adapt the file to a new device only the interrupt vector table needs to be extended with the device-specific interrupt handlers. The naming convention for the interrupt handler names are &lt;interrupt_name&gt;_IRQHandler. This table needs to be consistent with <a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> that defines all the IRQ numbers for each interrupt.</p>
+<p><b>Example:</b> </p>
+<p>The following example shows the extension of the interrupt vector table for the LPC1100 device family.</p>
+<div class="fragment"><div class="line"><span class="comment">/*----------------------------------------------------------------------------</span></div>
+<div class="line"><span class="comment">  Exception / Interrupt Handler</span></div>
+<div class="line"><span class="comment"> *----------------------------------------------------------------------------*/</span></div>
+<div class="line"><span class="comment">/* Exceptions */</span></div>
+<div class="line"><span class="keywordtype">void</span> WAKEUP0_IRQHandler     (<span class="keywordtype">void</span>) __attribute__ ((weak, alias(&quot;Default_Handler&quot;)));</div>
+<div class="line"><span class="keywordtype">void</span> WAKEUP1_IRQHandler     (<span class="keywordtype">void</span>) __attribute__ ((weak, alias(&quot;Default_Handler&quot;)));</div>
+<div class="line"><span class="keywordtype">void</span> WAKEUP2_IRQHandler     (<span class="keywordtype">void</span>) __attribute__ ((weak, alias(&quot;Default_Handler&quot;)));</div>
+<div class="line"><span class="comment">// :</span></div>
+<div class="line"><span class="comment">// :</span></div>
+<div class="line"><span class="keywordtype">void</span> EINT1_IRQHandler       (<span class="keywordtype">void</span>) __attribute__ ((weak, alias(&quot;Default_Handler&quot;)));</div>
+<div class="line"><span class="keywordtype">void</span> EINT2_IRQHandler       (<span class="keywordtype">void</span>) __attribute__ ((weak, alias(&quot;Default_Handler&quot;)));</div>
+<div class="line"><span class="comment">// :</span></div>
+<div class="line"><span class="comment">// :</span></div>
+<div class="line"></div>
+<div class="line"><span class="comment">/*----------------------------------------------------------------------------</span></div>
+<div class="line"><span class="comment">  Exception / Interrupt Vector table</span></div>
+<div class="line"><span class="comment"> *----------------------------------------------------------------------------*/</span></div>
+<div class="line">extern const pFunc <a class="code" href="group__compiler__conntrol__gr.html#gab94ebeb20055f1848d7b707d3c7cfc5d">__VECTOR_TABLE</a>[240];</div>
+<div class="line">       const pFunc __VECTOR_TABLE[240] <a class="code" href="group__compiler__conntrol__gr.html#ga4f65c96effa79fbd610fea43ee7d745b">__VECTOR_TABLE_ATTRIBUTE</a> = {</div>
+<div class="line">  (pFunc)(&amp;<a class="code" href="group__compiler__conntrol__gr.html#ga1002e751427b1189f92787d4e4eef965">__INITIAL_SP</a>),                   <span class="comment">/*     Initial Stack Pointer */</span></div>
+<div class="line">  Reset_Handler,                            <span class="comment">/*     Reset Handler */</span></div>
+<div class="line">  NMI_Handler,                              <span class="comment">/* -14 NMI Handler */</span></div>
+<div class="line">  HardFault_Handler,                        <span class="comment">/* -13 Hard Fault Handler */</span></div>
+<div class="line">  MemManage_Handler,                        <span class="comment">/* -12 MPU Fault Handler */</span></div>
+<div class="line">  BusFault_Handler,                         <span class="comment">/* -11 Bus Fault Handler */</span></div>
+<div class="line">  UsageFault_Handler,                       <span class="comment">/* -10 Usage Fault Handler */</span></div>
+<div class="line">  0,                                        <span class="comment">/*     Reserved */</span></div>
+<div class="line">  0,                                        <span class="comment">/*     Reserved */</span></div>
+<div class="line">  0,                                        <span class="comment">/*     Reserved */</span></div>
+<div class="line">  0,                                        <span class="comment">/*     Reserved */</span></div>
+<div class="line">  SVC_Handler,                              <span class="comment">/*  -5 SVCall Handler */</span></div>
+<div class="line">  DebugMon_Handler,                         <span class="comment">/*  -4 Debug Monitor Handler */</span></div>
+<div class="line">  0,                                        <span class="comment">/*     Reserved */</span></div>
+<div class="line">  PendSV_Handler,                           <span class="comment">/*  -2 PendSV Handler */</span></div>
+<div class="line">  SysTick_Handler,                          <span class="comment">/*  -1 SysTick Handler */</span></div>
+<div class="line"></div>
+<div class="line">  <span class="comment">/* Interrupts */</span></div>
+<div class="line">  WAKEUP0_IRQHandler,                       <span class="comment">/*   0 Wakeup PIO0.0 */</span></div>
+<div class="line">  WAKEUP1_IRQHandler,                       <span class="comment">/*   1 Wakeup PIO0.1 */</span></div>
+<div class="line">  WAKEUP2_IRQHandler,                       <span class="comment">/*   2 Wakeup PIO0.2 */</span></div>
+<div class="line">  <span class="comment">// :</span></div>
+<div class="line">  <span class="comment">// :</span></div>
+<div class="line">  EINT1_IRQHandler,                         <span class="comment">/*  30 PIO INT1 */</span></div>
+<div class="line">  EINT2_IRQHandler,                         <span class="comment">/*  31 PIO INT2 */</span></div>
+<div class="line">  <span class="comment">// :</span></div>
+<div class="line">  <span class="comment">// :</span></div>
+<div class="line">};</div>
+</div><!-- fragment --><h1><a class="anchor" id="startup_c_sec"></a>
+startup_Device.c Template File</h1>
+<p>A compiler agnostic <a class="el" href="startup_c_pg.html#startup_c_sec">startup_Device.c Template File</a> for an Armv7-M processor like Cortex-M3 is shown below. The C startup file relys on certain compiler specific preprocessor defines specified in CMSIS compiler headers:</p>
+<ul>
+<li><a class="el" href="group__compiler__conntrol__gr.html#ga1002e751427b1189f92787d4e4eef965">__INITIAL_SP</a></li>
+<li><a class="el" href="group__compiler__conntrol__gr.html#ga84b0bad4aa39632d3faea46aa1e102a8">__STACK_LIMIT</a></li>
+<li><a class="el" href="group__compiler__conntrol__gr.html#ga72db8b026c5e100254080fefabd9fd88">__PROGRAM_START</a></li>
+<li><a class="el" href="group__compiler__conntrol__gr.html#gab94ebeb20055f1848d7b707d3c7cfc5d">__VECTOR_TABLE</a></li>
+<li><a class="el" href="group__compiler__conntrol__gr.html#ga4f65c96effa79fbd610fea43ee7d745b">__VECTOR_TABLE_ATTRIBUTE</a></li>
+</ul>
+<pre class="fragment">/******************************************************************************
+ * @file     startup_Device.c
+ * @brief    CMSIS-Core(M) Device Startup File for &lt;Device&gt;
+ * @version  V2.0.0
+ * @date     20. May 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "&lt;Device&gt;.h"
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler Function Prototype
+ *----------------------------------------------------------------------------*/
+typedef void( *pFunc )( void );
+
+/*----------------------------------------------------------------------------
+  External References
+ *----------------------------------------------------------------------------*/
+extern uint32_t __INITIAL_SP;
+
+extern __NO_RETURN void __PROGRAM_START(void);
+
+/*----------------------------------------------------------------------------
+  Internal References
+ *----------------------------------------------------------------------------*/
+void __NO_RETURN Default_Handler(void);
+void __NO_RETURN Reset_Handler  (void);
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Handler
+ *----------------------------------------------------------------------------*/
+/* Exceptions */
+void NMI_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void HardFault_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void MemManage_Handler      (void) __attribute__ ((weak, alias("Default_Handler")));
+void BusFault_Handler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void UsageFault_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void SVC_Handler            (void) __attribute__ ((weak, alias("Default_Handler")));
+void DebugMon_Handler       (void) __attribute__ ((weak, alias("Default_Handler")));
+void PendSV_Handler         (void) __attribute__ ((weak, alias("Default_Handler")));
+void SysTick_Handler        (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void Interrupt0_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt1_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt2_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt3_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt4_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt5_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt6_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt7_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt8_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+void Interrupt9_Handler     (void) __attribute__ ((weak, alias("Default_Handler")));
+
+
+/*----------------------------------------------------------------------------
+  Exception / Interrupt Vector table
+ *----------------------------------------------------------------------------*/
+extern const pFunc __VECTOR_TABLE[240];
+       const pFunc __VECTOR_TABLE[240] __VECTOR_TABLE_ATTRIBUTE = {
+  (pFunc)(&amp;__INITIAL_SP),                   /*     Initial Stack Pointer */
+  Reset_Handler,                            /*     Reset Handler */
+  NMI_Handler,                              /* -14 NMI Handler */
+  HardFault_Handler,                        /* -13 Hard Fault Handler */
+  MemManage_Handler,                        /* -12 MPU Fault Handler */
+  BusFault_Handler,                         /* -11 Bus Fault Handler */
+  UsageFault_Handler,                       /* -10 Usage Fault Handler */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  0,                                        /*     Reserved */
+  SVC_Handler,                              /*  -5 SVCall Handler */
+  DebugMon_Handler,                         /*  -4 Debug Monitor Handler */
+  0,                                        /*     Reserved */
+  PendSV_Handler,                           /*  -2 PendSV Handler */
+  SysTick_Handler,                          /*  -1 SysTick Handler */
+
+  /* Interrupts */
+  Interrupt0_Handler,                       /*   0 Interrupt 0 */
+  Interrupt1_Handler,                       /*   1 Interrupt 1 */
+  Interrupt2_Handler,                       /*   2 Interrupt 2 */
+  Interrupt3_Handler,                       /*   3 Interrupt 3 */
+  Interrupt4_Handler,                       /*   4 Interrupt 4 */
+  Interrupt5_Handler,                       /*   5 Interrupt 5 */
+  Interrupt6_Handler,                       /*   6 Interrupt 6 */
+  Interrupt7_Handler,                       /*   7 Interrupt 7 */
+  Interrupt8_Handler,                       /*   8 Interrupt 8 */
+  Interrupt9_Handler                        /*   9 Interrupt 9 */
+                                            /* Interrupts 10 .. 223 are left out */
+};
+
+/*----------------------------------------------------------------------------
+  Reset Handler called on controller reset
+ *----------------------------------------------------------------------------*/
+void Reset_Handler(void)
+{
+  SystemInit();                             /* CMSIS System Initialization */
+  __PROGRAM_START();                        /* Enter PreMain (C library entry point) */
+}
+
+/*----------------------------------------------------------------------------
+  Default Handler for Exceptions / Interrupts
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void)
+{
+  while(1);
+}
+</pre> </div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Core/html/startup_s_pg.html b/docs/Core/html/startup_s_pg.html
index 09790b2..1016831 100644
--- a/docs/Core/html/startup_s_pg.html
+++ b/docs/Core/html/startup_s_pg.html
@@ -3,8 +3,8 @@
 <head>
 <meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
 <meta http-equiv="X-UA-Compatible" content="IE=9"/>
-<title>Startup File startup_&lt;device&gt;.s</title>
-<title>CMSIS-Core (Cortex-M): Startup File startup_&lt;device&gt;.s</title>
+<title>Startup File startup_&lt;device&gt;.s (deprecated)</title>
+<title>CMSIS-Core (Cortex-M): Startup File startup_&lt;device&gt;.s (deprecated)</title>
 <link href="tabs.css" rel="stylesheet" type="text/css"/>
 <link href="cmsis.css" rel="stylesheet" type="text/css" />
 <script type="text/javascript" src="jquery.js"></script>
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -108,10 +108,10 @@
 
 <div class="header">
   <div class="headertitle">
-<div class="title">Startup File startup_&lt;device&gt;.s </div>  </div>
+<div class="title">Startup File startup_&lt;device&gt;.s (deprecated) </div>  </div>
 </div><!--header-->
 <div class="contents">
-<div class="textblock"><p>The <a class="el" href="startup_s_pg.html">Startup File startup_&lt;device&gt;.s</a> contains:</p>
+<div class="textblock"><p>The <a class="el" href="startup_s_pg.html">Startup File startup_&lt;device&gt;.s (deprecated)</a> contains:</p>
 <ul>
 <li>The reset handler which is executed after CPU reset and typically calls the <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2">SystemInit</a> function.</li>
 <li>The setup values for the Main Stack Pointer (MSP).</li>
@@ -130,8 +130,8 @@
 <div class="line">                 :       :</div>
 <div class="line">                DCD     EINT1_IRQHandler         ; 16+30: PIO INT1</div>
 <div class="line">                DCD     EINT0_IRQHandler         ; 16+31: PIO INT0</div>
-<div class="line">         :</div>
-<div class="line">         :</div>
+<div class="line">   :</div>
+<div class="line">   :</div>
 <div class="line">                EXPORT  WAKEUP0_IRQHandler       [WEAK]</div>
 <div class="line">                EXPORT  WAKEUP1_IRQHandler       [WEAK]</div>
 <div class="line">                EXPORT  WAKEUP2_IRQHandler       [WEAK]</div>
@@ -155,8 +155,8 @@
 ; * @file     startup_&lt;Device&gt;.s
 ; * @brief    CMSIS Cortex-M ARMv7-M based Core Device Startup File for
 ; *           Device &lt;Device&gt;
-; * @version  V5.3.1
-; * @date     09. July 2018
+; * @version  V5.4.0
+; * @date     12. December 2018
 ; ******************************************************************************/
 ;/*
 ; * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
@@ -233,7 +233,7 @@
                 DCD      PendSV_Handler                      ;  -2 PendSV Handler
                 DCD      SysTick_Handler                     ;  -1 SysTick Handler
 
-                ; External Interrupts
+                ; Interrupts
 ; ToDo:  Add here the vectors for the device specific external interrupts handler
                 DCD      Interrupt0_Handler                  ;   0 Interrupt 0
                 DCD      Interrupt1_Handler                  ;   1 Interrupt 1
@@ -307,6 +307,10 @@
 
 ; User setup Stack &amp; Heap
 
+                IF       :LNOT::DEF:__MICROLIB
+                IMPORT   __use_two_region_memory
+                ENDIF
+
                 EXPORT   __stack_limit
                 EXPORT   __initial_sp
                 IF       Heap_Size != 0                      ; Heap is provided
@@ -321,7 +325,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Core/html/structARM__MPU__Region__t.html b/docs/Core/html/structARM__MPU__Region__t.html
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-<div class="title">ARM_MPU_Region_t Struct Reference<div class="ingroups"><a class="el" href="group__mpu__functions.html">MPU Functions for Armv7-M</a></div></div>  </div>
+<div class="title">ARM_MPU_Region_t Struct Reference<div class="ingroups"><a class="el" href="group__mpu__functions.html">MPU Functions for Armv6-M/v7-M</a> &#124; <a class="el" href="group__mpu8__functions.html">MPU Functions for Armv8-M</a></div></div>  </div>
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 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a>
 Data Fields</h2></td></tr>
-<tr class="memitem:aa5e3c6aeaddbc0c283085dc971dd1a22"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structARM__MPU__Region__t.html#aa5e3c6aeaddbc0c283085dc971dd1a22">RBAR</a></td></tr>
-<tr class="memdesc:aa5e3c6aeaddbc0c283085dc971dd1a22"><td class="mdescLeft">&#160;</td><td class="mdescRight">The region base address register value (<a class="el" href="structMPU__Type.html#a990c609b26d990b8ba832b110adfd353">RBAR</a>)  <a href="#aa5e3c6aeaddbc0c283085dc971dd1a22">More...</a><br/></td></tr>
-<tr class="separator:aa5e3c6aeaddbc0c283085dc971dd1a22"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:afe7a7721aa08988d915670efa432cdd2"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structARM__MPU__Region__t.html#afe7a7721aa08988d915670efa432cdd2">RBAR</a></td></tr>
+<tr class="memdesc:afe7a7721aa08988d915670efa432cdd2"><td class="mdescLeft">&#160;</td><td class="mdescRight">The region base address register value (<a class="el" href="structMPU__Type.html#a990c609b26d990b8ba832b110adfd353">RBAR</a>)  <a href="#afe7a7721aa08988d915670efa432cdd2">More...</a><br/></td></tr>
+<tr class="separator:afe7a7721aa08988d915670efa432cdd2"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a6a3e404b403c8df611f27d902d745d8d"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structARM__MPU__Region__t.html#a6a3e404b403c8df611f27d902d745d8d">RASR</a></td></tr>
 <tr class="memdesc:a6a3e404b403c8df611f27d902d745d8d"><td class="mdescLeft">&#160;</td><td class="mdescRight">The region attribute and size register value (<a class="el" href="structMPU__Type.html#a8f00c4a5e31b0a8d103ed3b0732c17a3">RASR</a>), see <a class="el" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>.  <a href="#a6a3e404b403c8df611f27d902d745d8d">More...</a><br/></td></tr>
 <tr class="separator:a6a3e404b403c8df611f27d902d745d8d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ab5d3a650dbffd0b272bf7df5b140e8a8"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structARM__MPU__Region__t.html#ab5d3a650dbffd0b272bf7df5b140e8a8">RLAR</a></td></tr>
+<tr class="separator:ab5d3a650dbffd0b272bf7df5b140e8a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<div class="textblock"><p>The typedef <a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> allows to define a MPU table (array of MPU regions) with pre-compiled register values. Such tables enable efficient MPU setup using the function <a class="el" href="group__mpu__functions.html#gafa27b26d5847fa8e465584e376b6078a">ARM_MPU_Load</a>.</p>
-<p><b>Example:</b> See <a class="el" href="group__mpu__functions.html#gafa27b26d5847fa8e465584e376b6078a">ARM_MPU_Load</a> </p>
+<div class="textblock"><p>The typedef <a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> allows to define a MPU table (array of MPU regions) with pre-compiled register values. Such tables enable efficient MPU setup using the function <a class="el" href="group__mpu8__functions.html#gaca76614e3091c7324aa9d60e634621bf">ARM_MPU_Load</a>.</p>
+<p><b>Example:</b> See <a class="el" href="group__mpu8__functions.html#gaca76614e3091c7324aa9d60e634621bf">ARM_MPU_Load</a></p>
+<p>Struct for a single MPU Region </p>
 </div><h2 class="groupheader">Field Documentation</h2>
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 </div>
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-<a class="anchor" id="aa5e3c6aeaddbc0c283085dc971dd1a22"></a>
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-          <td class="memname">ARM_MPU_Region_t::RBAR</td>
+          <td class="memname">uint32_t ARM_MPU_Region_t::RBAR</td>
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Region Base Address Register value</p>
 <p>This value specifies the start address of the MPU protected memory region. The address must be a multiple of the region size (size aligned).</p>
 <p>See <a class="el" href="structMPU__Type.html#a990c609b26d990b8ba832b110adfd353">MPU_Type::RBAR</a> for details about field bit format. </p>
 
 </div>
 </div>
+<a class="anchor" id="ab5d3a650dbffd0b272bf7df5b140e8a8"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">uint32_t ARM_MPU_Region_t::RLAR</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Region Limit Address Register value </p>
+
+</div>
+</div>
 </div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Core/html/structARM__MPU__Region__t.js b/docs/Core/html/structARM__MPU__Region__t.js
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+++ b/docs/Core/html/structARM__MPU__Region__t.js
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 var structARM__MPU__Region__t =
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-    [ "RBAR", "structARM__MPU__Region__t.html#aa5e3c6aeaddbc0c283085dc971dd1a22", null ]
+    [ "RBAR", "structARM__MPU__Region__t.html#afe7a7721aa08988d915670efa432cdd2", null ],
+    [ "RLAR", "structARM__MPU__Region__t.html#ab5d3a650dbffd0b272bf7df5b140e8a8", null ]
 ];
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    <div id="projectname">CMSIS-Core (Cortex-M)
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
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     <a href="http://www.doxygen.org/index.html">
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     <li class="navelem"><a class="el" href="structFPU__Type.html">FPU_Type</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
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     <a href="http://www.doxygen.org/index.html">
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
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+<div class="title">MPU_Type Struct Reference<div class="ingroups"><a class="el" href="group__mpu__functions.html">MPU Functions for Armv6-M/v7-M</a></div></div>  </div>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
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    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/system_c_pg.html b/docs/Core/html/system_c_pg.html
index 337fc32..25e4d6e 100644
--- a/docs/Core/html/system_c_pg.html
+++ b/docs/Core/html/system_c_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -253,7 +253,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/templates_pg.html b/docs/Core/html/templates_pg.html
index 41927d4..39d5506 100644
--- a/docs/Core/html/templates_pg.html
+++ b/docs/Core/html/templates_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -144,6 +144,8 @@
 <tr>
 <td align="left">core_cm33.h </td><td align="left">for the Cortex-M33 processor </td></tr>
 <tr>
+<td align="left">core_cm35p.h </td><td align="left">for the Cortex-M35P processor </td></tr>
+<tr>
 <td align="left">core_sc000.h </td><td align="left">for the SecurCore SC000 processor </td></tr>
 <tr>
 <td align="left">core_sc300.h </td><td align="left">for the SecurCore SC300 processor </td></tr>
@@ -185,9 +187,17 @@
 <tr>
 <td align="left">ARM Cortex-M33 </td><td align="left">ARMCM33_TZ </td><td align="left">Cortex-M33 based device with TrustZone, no SIMD, no FPU </td></tr>
 <tr>
-<td align="left">ARM Cortex-M33 </td><td align="left">ARMCM33_DSP_FP </td><td align="left">Cortex-M23 based device with SIMD, FPU, no TrustZone </td></tr>
+<td align="left">ARM Cortex-M33 </td><td align="left">ARMCM33_DSP_FP </td><td align="left">Cortex-M33 based device with SIMD, FPU, no TrustZone </td></tr>
 <tr>
-<td align="left">ARM Cortex-M33 </td><td align="left">ARMCM33_DSP_FP_TZ </td><td align="left">Cortex-M23 based device with TrustZone, SIMD, FPU </td></tr>
+<td align="left">ARM Cortex-M33 </td><td align="left">ARMCM33_DSP_FP_TZ </td><td align="left">Cortex-M33 based device with TrustZone, SIMD, FPU </td></tr>
+<tr>
+<td align="left">ARM Cortex-M35P </td><td align="left">ARMCM35P </td><td align="left">Cortex-M35P based device without TrustZone, SIMD, FPU </td></tr>
+<tr>
+<td align="left">ARM Cortex-M35P </td><td align="left">ARMCM35P_TZ </td><td align="left">Cortex-M35P based device with TrustZone, no SIMD, no FPU </td></tr>
+<tr>
+<td align="left">ARM Cortex-M35P </td><td align="left">ARMCM35P_DSP_FP </td><td align="left">Cortex-M35P based device with SIMD, FPU, no TrustZone </td></tr>
+<tr>
+<td align="left">ARM Cortex-M35P </td><td align="left">ARMCM35P_DSP_FP_TZ </td><td align="left">Cortex-M35P based device with TrustZone, SIMD, FPU </td></tr>
 <tr>
 <td align="left">ARM SC000 </td><td align="left">ARM SC000 </td><td align="left">SC000 based device </td></tr>
 <tr>
@@ -253,7 +263,8 @@
 </table>
 <p>The device configuration of the template files is described in detail on the following pages:</p>
 <ul>
-<li><a class="el" href="startup_s_pg.html">Startup File startup_&lt;device&gt;.s</a></li>
+<li><a class="el" href="startup_c_pg.html">Startup File startup_&lt;device&gt;.c</a></li>
+<li><a class="el" href="startup_s_pg.html">Startup File startup_&lt;device&gt;.s (deprecated)</a> (deprecated)</li>
 <li><a class="el" href="system_c_pg.html">System Configuration Files system_&lt;device&gt;.c and system_&lt;device&gt;.h</a></li>
 <li><a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a></li>
 <li><a class="el" href="partition_h_pg.html">System Partition Header File partition_&lt;device&gt;.h</a> </li>
@@ -263,7 +274,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/templates_pg.js b/docs/Core/html/templates_pg.js
index d47081f..3cb2d11 100644
--- a/docs/Core/html/templates_pg.js
+++ b/docs/Core/html/templates_pg.js
@@ -3,7 +3,10 @@
     [ "CMSIS-Core Processor Files", "templates_pg.html#CMSIS_Processor_files", null ],
     [ "Device Examples", "templates_pg.html#device_examples", null ],
     [ "Template Files", "templates_pg.html#template_files_sec", null ],
-    [ "Startup File startup_<device>.s", "startup_s_pg.html", [
+    [ "Startup File startup_<device>.c", "startup_c_pg.html", [
+      [ "startup_Device.c Template File", "startup_c_pg.html#startup_c_sec", null ]
+    ] ],
+    [ "Startup File startup_<device>.s (deprecated)", "startup_s_pg.html", [
       [ "startup_Device.s Template File", "startup_s_pg.html#startup_s_sec", null ]
     ] ],
     [ "System Configuration Files system_<device>.c and system_<device>.h", "system_c_pg.html", [
diff --git a/docs/Core/html/unionAPSR__Type.html b/docs/Core/html/unionAPSR__Type.html
index 47c8164..a531a96 100644
--- a/docs/Core/html/unionAPSR__Type.html
+++ b/docs/Core/html/unionAPSR__Type.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -254,7 +254,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="unionAPSR__Type.html">APSR_Type</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/unionCONTROL__Type.html b/docs/Core/html/unionCONTROL__Type.html
index 89314db..5ab7300 100644
--- a/docs/Core/html/unionCONTROL__Type.html
+++ b/docs/Core/html/unionCONTROL__Type.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -224,7 +224,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="unionCONTROL__Type.html">CONTROL_Type</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/unionIPSR__Type.html b/docs/Core/html/unionIPSR__Type.html
index e36bca0..f252549 100644
--- a/docs/Core/html/unionIPSR__Type.html
+++ b/docs/Core/html/unionIPSR__Type.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -194,7 +194,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="unionIPSR__Type.html">IPSR_Type</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/unionxPSR__Type.html b/docs/Core/html/unionxPSR__Type.html
index 017f0a1..1a6864d 100644
--- a/docs/Core/html/unionxPSR__Type.html
+++ b/docs/Core/html/unionxPSR__Type.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -299,7 +299,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="unionxPSR__Type.html">xPSR_Type</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:09 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:26 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/using_ARM_pg.html b/docs/Core/html/using_ARM_pg.html
index 551b056..5662223 100644
--- a/docs/Core/html/using_ARM_pg.html
+++ b/docs/Core/html/using_ARM_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -130,6 +130,7 @@
 <tr>
 <td>".\Device\ARM\ARMSC300" </td><td>SecurCore SC300 </td><td>Contains <b>Include</b> and <b>Source</b> template files configured for the SecurCore SC300 processor. The device name is ARMSC300 and the name of the <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> is &lt;ARMSC300.h&gt;.   </td></tr>
 </table>
+<dl class="section note"><dt>Note</dt><dd>CMSIS-Pack provides the <b>#define CMSIS_header_file</b> in <a href="../../Pack/html/pdsc_components_pg.html#RTE_Components_h"><b>RTE_Components.h</b></a> which gives you access to the <b><em>device</em>.h</b> file of a project. This allows you to generate generic software components that adjust to the device settings.</dd></dl>
 <h1><a class="anchor" id="using_ARM_Lib_sec"></a>
 Create generic Libraries with CMSIS</h1>
 <p>The CMSIS Processor and Core Peripheral files allow also to create generic libraries. The <a href="../../DSP/html/index.html"><b>CMSIS-DSP</b> </a> Libraries are an example for such a generic library.</p>
@@ -157,7 +158,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="using_pg.html">Using CMSIS in Embedded Applications</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/using_CMSIS.html b/docs/Core/html/using_CMSIS.html
index dbd6688..1a7f0b0 100644
--- a/docs/Core/html/using_CMSIS.html
+++ b/docs/Core/html/using_CMSIS.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -148,7 +148,7 @@
 <div class="line"> </div>
 <div class="line"> </div>
 <div class="line"><span class="comment">// The processor clock is initialized by CMSIS startup + system file</span></div>
-<div class="line"><span class="keywordtype">void</span> main (<span class="keywordtype">void</span>) {                                   <span class="comment">// user application starts here</span></div>
+<div class="line"><span class="keywordtype">void</span> main (<span class="keywordtype">void</span>) {                               <span class="comment">// user application starts here</span></div>
 <div class="line">  Device_Initialization ();                      <span class="comment">// Configure &amp; Initialize MCU</span></div>
 <div class="line">  <span class="keywordflow">while</span> (1)  {                                   <span class="comment">// Endless Loop (the Super-Loop)</span></div>
 <div class="line">    <a class="code" href="group__Core__Register__gr.html#gaeb8e5f7564a8ea23678fe3c987b04013">__disable_irq</a> ();                            <span class="comment">// Disable all interrupts</span></div>
@@ -159,13 +159,16 @@
 <div class="line">    WaitForTick ();                              <span class="comment">// Synchronize to SysTick Timer</span></div>
 <div class="line">  }</div>
 <div class="line">}</div>
+</div><!-- fragment --><p>CMSIS-Pack provides the <b>#define CMSIS_header_file</b> in <a href="../../Pack/html/pdsc_components_pg.html#RTE_Components_h"><b>RTE_Components.h</b></a> which gives you access to the <b><em>device</em>.h</b> file of a project. This allows you to generate generic software components that use the device selected in a project.</p>
+<div class="fragment"><div class="line"><span class="preprocessor">#include &quot;RTE_Components.h&quot;</span>                      <span class="comment">// include information about project configuration</span></div>
+<div class="line"><span class="preprocessor">#include CMSIS_device_header                     // include &lt;device&gt;.h file</span></div>
 </div><!-- fragment --> </div></div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="using_pg.html">Using CMSIS in Embedded Applications</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/using_TrustZone_pg.html b/docs/Core/html/using_TrustZone_pg.html
index 1604bbb..8c2ce99 100644
--- a/docs/Core/html/using_TrustZone_pg.html
+++ b/docs/Core/html/using_TrustZone_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -197,14 +197,14 @@
 <div class="caption">
 RTOS Thread Context Management for Armv8-M TrustZone</div></div>
 <p> To allocate the context memory for threads, an RTOS kernel that runs in <em>non-secure state</em> calls the interface functions defined by the header file <b>TZ_context.h</b>. The <b>TZ_context</b> functions itself are part of the <em>secure state</em> application. An minimum implementation is provided as part of RTOS2 and should handle the secure stack for the thread execution. However it is also possible to implement the context memory management system with additional features such as access control to <em>secure state</em> memory regions using an MPU.</p>
-<p>The API functions of <b>TZ_context</b> are described in the chapter <a href="Modules.html"><b>Reference</b> </a> under <a class="el" href="group__trustzone__functions.html">TrustZone for Armv8-M</a> - <a class="el" href="group__context__trustzone__functions.html">RTOS Context Management</a>.</p>
+<p>The API functions of <b>TZ_context</b> are described in the chapter <a href="Modules.html"><b>Reference</b> </a> under <a class="el" href="group__trustzone__functions.html">TrustZone for Armv8-M/v8.1-M</a> - <a class="el" href="group__context__trustzone__functions.html">RTOS Context Management</a>.</p>
 <p>Refer to <a class="el" href="using_TrustZone_pg.html#Example_TrustZone">Program Examples</a> for RTOS examples that provide a template implementation for <b>TZ_context.c</b>. </p>
 </div></div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/using_VTOR_pg.html b/docs/Core/html/using_VTOR_pg.html
index 38958cc..b3b0a39 100644
--- a/docs/Core/html/using_VTOR_pg.html
+++ b/docs/Core/html/using_VTOR_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -115,9 +115,9 @@
 <div class="fragment"><div class="line"><span class="preprocessor">#include &quot;ARMCM3.h&quot;</span>                     <span class="comment">// Device header</span></div>
 <div class="line"> </div>
 <div class="line"><span class="comment">/* externals from startup_ARMCM3.s */</span></div>
-<div class="line"><span class="keyword">extern</span> uint32_t __Vectors[];                             <span class="comment">/* vector table ROM  */</span></div>
+<div class="line"><span class="keyword">extern</span> uint32_t __Vectors[];              <span class="comment">/* vector table ROM  */</span></div>
 <div class="line"> </div>
-<div class="line"><span class="preprocessor">#define VECTORTABLE_SIZE        (256)          </span><span class="comment">/* size Cortex-M3 vector table */</span><span class="preprocessor"></span></div>
+<div class="line"><span class="preprocessor">#define VECTORTABLE_SIZE        (256)     </span><span class="comment">/* size Cortex-M3 vector table      */</span><span class="preprocessor"></span></div>
 <div class="line"><span class="preprocessor"></span><span class="preprocessor">#define VECTORTABLE_ALIGNMENT   (0x100ul) </span><span class="comment">/* 16 Cortex + 32 ARMCM3 = 48 words */</span><span class="preprocessor"></span></div>
 <div class="line"><span class="preprocessor"></span>                                          <span class="comment">/* next power of 2 = 256            */</span></div>
 <div class="line"> </div>
@@ -129,7 +129,7 @@
 <div class="line"><span class="comment"> *----------------------------------------------------------------------------*/</span></div>
 <div class="line"><span class="keyword">volatile</span> uint32_t msTicks = 0;                        <span class="comment">/* counts 1ms timeTicks */</span></div>
 <div class="line"><span class="keywordtype">void</span> SysTick_Handler(<span class="keywordtype">void</span>) {</div>
-<div class="line">  msTicks++;                                             <span class="comment">/* increment counter */</span></div>
+<div class="line">  msTicks++;                                          <span class="comment">/* increment counter */</span></div>
 <div class="line">}</div>
 <div class="line"> </div>
 <div class="line"><span class="comment">/*----------------------------------------------------------------------------</span></div>
@@ -137,7 +137,7 @@
 <div class="line"><span class="comment"> *----------------------------------------------------------------------------*/</span></div>
 <div class="line"><span class="keyword">volatile</span> uint32_t msTicks_RAM = 0;                    <span class="comment">/* counts 1ms timeTicks */</span></div>
 <div class="line"><span class="keywordtype">void</span> SysTick_Handler_RAM(<span class="keywordtype">void</span>) {</div>
-<div class="line">  msTicks_RAM++;                                         <span class="comment">/* increment counter */</span></div>
+<div class="line">  msTicks_RAM++;                                      <span class="comment">/* increment counter */</span></div>
 <div class="line">}</div>
 <div class="line"> </div>
 <div class="line"><span class="comment">/*----------------------------------------------------------------------------</span></div>
@@ -151,7 +151,7 @@
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 <div class="line">                                                   <span class="comment">/* replace SysTick Handler */</span></div>
 <div class="line">  vectorTable_RAM[<a class="code" href="group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6dbff8f8543325f3474cbae2446776e7">SysTick_IRQn</a> + 16] = (uint32_t)SysTick_Handler_RAM;</div>
-<div class="line">        </div>
+<div class="line">  </div>
 <div class="line">  <span class="comment">/* relocate vector table */</span> </div>
 <div class="line">  <a class="code" href="group__Core__Register__gr.html#gaeb8e5f7564a8ea23678fe3c987b04013">__disable_irq</a>();</div>
 <div class="line">    SCB-&gt;VTOR = (uint32_t)&amp;vectorTable_RAM;</div>
@@ -169,7 +169,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="using_pg.html">Using CMSIS in Embedded Applications</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core/html/using_pg.html b/docs/Core/html/using_pg.html
index b82e1c9..69b9a73 100644
--- a/docs/Core/html/using_pg.html
+++ b/docs/Core/html/using_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.2</span>
+   &#160;<span id="projectnumber">Version 5.3.0</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -113,12 +113,12 @@
 <div class="contents">
 <div class="textblock"><p>To use the CMSIS-Core (Cortex-M) the following files are added to the embedded application:</p>
 <ul>
-<li><a class="el" href="startup_s_pg.html">Startup File startup_&lt;device&gt;.s</a> with reset handler and exception vectors.</li>
+<li><a class="el" href="startup_c_pg.html">Startup File startup_&lt;device&gt;.c</a> (formerly <a class="el" href="startup_s_pg.html">Startup File startup_&lt;device&gt;.s (deprecated)</a>) with reset handler and exception vectors.</li>
 <li><a class="el" href="system_c_pg.html">System Configuration Files system_&lt;device&gt;.c and system_&lt;device&gt;.h</a> with general device configuration (i.e. for clock and BUS setup).</li>
 <li><a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> gives access to processor core and all peripherals.</li>
 </ul>
-<dl class="section note"><dt>Note</dt><dd>The files <a class="el" href="startup_s_pg.html">Startup File startup_&lt;device&gt;.s</a> and <a class="el" href="system_c_pg.html">System Configuration Files system_&lt;device&gt;.c and system_&lt;device&gt;.h</a> may require application specific adaptations and therefore should be copied into the application project folder prior configuration. The <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> is included in all source files that need device access and can be stored on a central include folder that is generic for all projects.</dd></dl>
-<p>The <a class="el" href="startup_s_pg.html">Startup File startup_&lt;device&gt;.s</a> is executed after reset and calls <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2">SystemInit</a>. After the system initialization control is transferred to the C/C++ run-time library which performs initialization and calls the <b>main</b> function in the user code. In addition the <a class="el" href="startup_s_pg.html">Startup File startup_&lt;device&gt;.s</a> contains all exception and interrupt vectors and implements a default function for every interrupt. It may also contain stack and heap configurations for the user application.</p>
+<dl class="section note"><dt>Note</dt><dd>The files <a class="el" href="startup_c_pg.html">Startup File startup_&lt;device&gt;.c</a> (or <a class="el" href="startup_s_pg.html">Startup File startup_&lt;device&gt;.s (deprecated)</a>) and <a class="el" href="system_c_pg.html">System Configuration Files system_&lt;device&gt;.c and system_&lt;device&gt;.h</a> may require application specific adaptations and therefore should be copied into the application project folder prior configuration. The <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> is included in all source files that need device access and can be stored on a central include folder that is generic for all projects.</dd></dl>
+<p>The <a class="el" href="startup_c_pg.html">Startup File startup_&lt;device&gt;.c</a> (or <a class="el" href="startup_s_pg.html">Startup File startup_&lt;device&gt;.s (deprecated)</a>) is executed after reset and calls <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2">SystemInit</a>. After the system initialization control is transferred to the C/C++ run-time library which performs initialization and calls the <b>main</b> function in the user code. In addition the <a class="el" href="startup_c_pg.html">Startup File startup_&lt;device&gt;.c</a> (or <a class="el" href="startup_s_pg.html">Startup File startup_&lt;device&gt;.s (deprecated)</a>) contains all exception and interrupt vectors and implements a default function for every interrupt. It may also contain stack and heap configurations for the user application.</p>
 <p>The <a class="el" href="system_c_pg.html">System Configuration Files system_&lt;device&gt;.c and system_&lt;device&gt;.h</a> performs the setup for the processor clock. The variable <a class="el" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6">SystemCoreClock</a> indicates the CPU clock speed. <a class="el" href="group__system__init__gr.html">System and Clock Configuration</a> describes the minimum feature set. In addition the file may contain functions for the memory BUS setup and clock re-configuration.</p>
 <p>The <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> is the central include file that the application programmer is using in the C source code. It provides the following features:</p>
 <ul>
@@ -129,23 +129,24 @@
 <li><a class="el" href="group__SysTick__gr.html">Systick Timer (SYSTICK)</a> function to configure and start a periodic timer interrupt.</li>
 <li><a class="el" href="group__ITM__Debug__gr.html">Debug Access</a> are functions that allow printf-style I/O via the CoreSight Debug Unit and ITM communication.</li>
 </ul>
+<p>CMSIS-Pack provides the <b>#define CMSIS_header_file</b> in <a href="../../Pack/html/pdsc_components_pg.html#RTE_Components_h"><b>RTE_Components.h</b></a> which gives you access to this <b><em>device</em>.h</b> file.</p>
 <div class="image">
 <img src="CMSIS_CORE_Files_user.png" alt="CMSIS_CORE_Files_user.png"/>
 <div class="caption">
 CMSIS-Core (Cortex-M) User Files</div></div>
-<p> The CMSIS-Core (Cortex-M) are device specific. In addition, the <a class="el" href="startup_s_pg.html">Startup File startup_&lt;device&gt;.s</a> is also compiler vendor specific. The various compiler vendor tool chains may provide folders that contain the CMSIS files for each supported device.</p>
-<p>For example, the following files are provided in MDK to support the STM32F10x Connectivity Line device variants:</p>
+<p> The CMSIS-Core (Cortex-M) system files are device specific. In addition, the deprecated <a class="el" href="startup_s_pg.html">Startup File startup_&lt;device&gt;.s (deprecated)</a> is also compiler vendor specific. The versions provided by CMSIS are only generic templates. The adopted versions for a concrete device are typically provided by the device vendor through the according device familiy pack (DFP).</p>
+<p>For example, the following files are provided by the STM32F10x device family pack:</p>
 <table  class="cmtable">
 <tr>
 <th>File </th><th>Description  </th></tr>
 <tr>
-<td>".\ARM\Startup\ST\STM32F10x\startup_stm32f10x_cl.s" </td><td><a class="el" href="startup_s_pg.html">Startup File startup_&lt;device&gt;.s</a> for the STM32F10x Connectivity Line device variants.  </td></tr>
+<td>".\Device\Source\ARM\startup_stm32f10x_cl.s" </td><td><a class="el" href="startup_s_pg.html">Startup File startup_&lt;device&gt;.s (deprecated)</a> for the STM32F10x Connectivity Line device variants.  </td></tr>
 <tr>
-<td>".\ARM\Startup\ST\STM32F10x\system_stmf10x.c" </td><td><a class="el" href="system_c_pg.html">System Configuration Files system_&lt;device&gt;.c and system_&lt;device&gt;.h</a> for the STM32F10x device families.  </td></tr>
+<td>".\Device\Source\system_stmf10x.c" </td><td><a class="el" href="system_c_pg.html">System Configuration Files system_&lt;device&gt;.c and system_&lt;device&gt;.h</a> for the STM32F10x device families.  </td></tr>
 <tr>
-<td>".\ARM\INC\ST\STM32F10x\stm32f10x.h" </td><td><a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> for the STM32F10x device families.  </td></tr>
+<td>".\Device\Include\stm32f10x.h" </td><td><a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> for the STM32F10x device families.  </td></tr>
 <tr>
-<td>".\ARM\INC\ST\STM32F10x\system_stm32f10x.h" </td><td><a class="el" href="system_c_pg.html#system_Device_h_sec">system_Device.h Template File</a> for the STM32F10x device families.  </td></tr>
+<td>".\Device\Include\system_stm32f10x.h" </td><td><a class="el" href="system_c_pg.html#system_Device_h_sec">system_Device.h Template File</a> for the STM32F10x device families.  </td></tr>
 </table>
 <dl class="section note"><dt>Note</dt><dd>The silicon vendors create these device-specific CMSIS-Core (Cortex-M) files based on <a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a> provide by Arm.</dd></dl>
 <p>Thereafter, the functions described under <a href="Modules.html"><b>Reference</b> </a> can be used in the application.</p>
@@ -160,7 +161,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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index 208e401..1c43346 100644
--- a/docs/Core_A/html/ARMCA9_8h.html
+++ b/docs/Core_A/html/ARMCA9_8h.html
@@ -32,7 +32,7 @@
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-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
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         <tr>
-          <td class="memname">#define VE_A9_MP_AACI_BASE&#160;&#160;&#160;(0x00040000UL + 0x1C000000UL)</td>
+          <td class="memname">#define VE_A9_MP_AACI_BASE&#160;&#160;&#160;(0x00040000UL + VE_A9_MP_PERIPH_BASE_CS3)</td>
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@@ -381,7 +387,7 @@
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         <tr>
-          <td class="memname">#define VE_A9_MP_CLCD_BASE&#160;&#160;&#160;(0x001F0000UL + 0x1C000000UL)</td>
+          <td class="memname">#define VE_A9_MP_CLCD_BASE&#160;&#160;&#160;(0x001F0000UL + VE_A9_MP_PERIPH_BASE_CS3)</td>
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       </table>
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@@ -394,11 +400,11 @@
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       <table class="memname">
         <tr>
-          <td class="memname">#define VE_A9_MP_DAP_BASE&#160;&#160;&#160;(0x1C000000UL)</td>
+          <td class="memname">#define VE_A9_MP_DAP_BASE&#160;&#160;&#160;(0x00000000UL + VE_A9_MP_PERIPH_BASE_CS3)</td>
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-<p>(DAP ) Base Address </p>
+<p>(LOCAL DAP ) Base Address </p>
 
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-          <td class="memname">#define VE_A9_MP_DVI_BASE&#160;&#160;&#160;(0x00160000UL + 0x1C000000UL)</td>
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-          <td class="memname">#define VE_A9_MP_FLASH_BASE1&#160;&#160;&#160;(0x08000000UL)</td>
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         <tr>
-          <td class="memname">#define VE_A9_MP_GIC_INTERFACE_BASE&#160;&#160;&#160;(0x00000100UL + 0x2C000000UL)</td>
+          <td class="memname">#define VE_A9_MP_GIC_INTERFACE_BASE&#160;&#160;&#160;(0x00000100UL + VE_A9_MP_PRIVATE_PERIPH_BASE)</td>
         </tr>
       </table>
 </div><div class="memdoc">
-<p>(GIC CPU IF) Base Address </p>
+<p>(GIC CPU IF ) Base Address </p>
 
 </div>
 </div>
@@ -498,7 +504,7 @@
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define VE_A9_MP_KMI0_BASE&#160;&#160;&#160;(0x00060000UL + 0x1C000000UL)</td>
+          <td class="memname">#define VE_A9_MP_KMI0_BASE&#160;&#160;&#160;(0x00060000UL + VE_A9_MP_PERIPH_BASE_CS3)</td>
         </tr>
       </table>
 </div><div class="memdoc">
@@ -511,7 +517,7 @@
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define VE_A9_MP_MMCI_BASE&#160;&#160;&#160;(0x00050000UL + 0x1C000000UL)</td>
+          <td class="memname">#define VE_A9_MP_MMCI_BASE&#160;&#160;&#160;(0x00050000UL + VE_A9_MP_PERIPH_BASE_CS3)</td>
         </tr>
       </table>
 </div><div class="memdoc">
@@ -519,16 +525,29 @@
 
 </div>
 </div>
-<a class="anchor" id="ad22dea20bcb552bd05691f62ff5e5799"></a>
+<a class="anchor" id="a1f0eb04274d447fa1261fc34313bbd2f"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define VE_A9_MP_PERIPH_BASE&#160;&#160;&#160;(0x18000000UL)</td>
+          <td class="memname">#define VE_A9_MP_PERIPH_BASE_CS2&#160;&#160;&#160;(0x18000000UL)</td>
         </tr>
       </table>
 </div><div class="memdoc">
-<p>(Peripheral) Base Address </p>
+<p>(Peripheral ) Base Address </p>
+
+</div>
+</div>
+<a class="anchor" id="a15fccfe28c34be132e4b26fecf459d59"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define VE_A9_MP_PERIPH_BASE_CS3&#160;&#160;&#160;(0x1C000000UL)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>(Peripheral ) Base Address </p>
 
 </div>
 </div>
@@ -545,12 +564,25 @@
 
 </div>
 </div>
+<a class="anchor" id="a8d664adb95364c864de72494a7603ee4"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define VE_A9_MP_PRIVATE_PERIPH_BASE&#160;&#160;&#160;(0x2C000000UL)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>(Peripheral ) Base Address </p>
+
+</div>
+</div>
 <a class="anchor" id="a02dee9c2055176f0f8b39f84188662dc"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define VE_A9_MP_PRIVATE_TIMER&#160;&#160;&#160;(0x00000600UL + 0x2C000000UL)</td>
+          <td class="memname">#define VE_A9_MP_PRIVATE_TIMER&#160;&#160;&#160;(0x00000600UL + VE_A9_MP_PRIVATE_PERIPH_BASE)</td>
         </tr>
       </table>
 </div><div class="memdoc">
@@ -563,7 +595,7 @@
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define VE_A9_MP_RTC_BASE&#160;&#160;&#160;(0x00170000UL + 0x1C000000UL)</td>
+          <td class="memname">#define VE_A9_MP_RTC_BASE&#160;&#160;&#160;(0x00170000UL + VE_A9_MP_PERIPH_BASE_CS3)</td>
         </tr>
       </table>
 </div><div class="memdoc">
@@ -576,7 +608,7 @@
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define VE_A9_MP_SERIAL_BASE&#160;&#160;&#160;(0x00030000UL + 0x1C000000UL)</td>
+          <td class="memname">#define VE_A9_MP_SERIAL_BASE&#160;&#160;&#160;(0x00030000UL + VE_A9_MP_PERIPH_BASE_CS3)</td>
         </tr>
       </table>
 </div><div class="memdoc">
@@ -589,7 +621,7 @@
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define VE_A9_MP_SRAM_BASE&#160;&#160;&#160;(0x2E000000UL)</td>
+          <td class="memname">#define VE_A9_MP_SRAM_BASE&#160;&#160;&#160;(0x14000000UL)</td>
         </tr>
       </table>
 </div><div class="memdoc">
@@ -597,16 +629,29 @@
 
 </div>
 </div>
+<a class="anchor" id="a649334fdbe9f99fa6c9e5fb9771deeab"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define VE_A9_MP_SSRAM_BASE&#160;&#160;&#160;(0x2E000000UL)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>(System SRAM) Base Address </p>
+
+</div>
+</div>
 <a class="anchor" id="a6be1b1510ebbf938f10c195c2aae50ed"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define VE_A9_MP_SYSTEM_REG_BASE&#160;&#160;&#160;(0x00010000UL + 0x1C000000UL)</td>
+          <td class="memname">#define VE_A9_MP_SYSTEM_REG_BASE&#160;&#160;&#160;(0x00010000UL + VE_A9_MP_PERIPH_BASE_CS3)</td>
         </tr>
       </table>
 </div><div class="memdoc">
-<p>(SYSTEM REG) Base Address </p>
+<p>(SYSTEM REG ) Base Address </p>
 
 </div>
 </div>
@@ -615,7 +660,7 @@
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define VE_A9_MP_TIMER_BASE&#160;&#160;&#160;(0x00110000UL + 0x1C000000UL)</td>
+          <td class="memname">#define VE_A9_MP_TIMER_BASE&#160;&#160;&#160;(0x00110000UL + VE_A9_MP_PERIPH_BASE_CS3)</td>
         </tr>
       </table>
 </div><div class="memdoc">
@@ -628,7 +673,7 @@
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define VE_A9_MP_UART4_BASE&#160;&#160;&#160;(0x001B0000UL + 0x1C000000UL)</td>
+          <td class="memname">#define VE_A9_MP_UART4_BASE&#160;&#160;&#160;(0x001B0000UL + VE_A9_MP_PERIPH_BASE_CS3)</td>
         </tr>
       </table>
 </div><div class="memdoc">
@@ -641,7 +686,7 @@
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define VE_A9_MP_UART_BASE&#160;&#160;&#160;(0x00090000UL + 0x1C000000UL)</td>
+          <td class="memname">#define VE_A9_MP_UART_BASE&#160;&#160;&#160;(0x00090000UL + VE_A9_MP_PERIPH_BASE_CS3)</td>
         </tr>
       </table>
 </div><div class="memdoc">
@@ -654,7 +699,7 @@
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define VE_A9_MP_USB_BASE&#160;&#160;&#160;(0x03000000UL + VE_A9_MP_PERIPH_BASE)</td>
+          <td class="memname">#define VE_A9_MP_USB_BASE&#160;&#160;&#160;(0x03000000UL + VE_A9_MP_PERIPH_BASE_CS2)</td>
         </tr>
       </table>
 </div><div class="memdoc">
@@ -667,7 +712,7 @@
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define VE_A9_MP_VRAM_BASE&#160;&#160;&#160;(0x18000000UL)</td>
+          <td class="memname">#define VE_A9_MP_VRAM_BASE&#160;&#160;&#160;(0x00000000UL + VE_A9_MP_PERIPH_BASE_CS2)</td>
         </tr>
       </table>
 </div><div class="memdoc">
@@ -680,7 +725,7 @@
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define VE_A9_MP_WDT_BASE&#160;&#160;&#160;(0x000F0000UL + 0x1C000000UL)</td>
+          <td class="memname">#define VE_A9_MP_WDT_BASE&#160;&#160;&#160;(0x000F0000UL + VE_A9_MP_PERIPH_BASE_CS3)</td>
         </tr>
       </table>
 </div><div class="memdoc">
@@ -815,7 +860,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_bcb5d964daf6ffff28eae5a1dee5d6c3.html">Device</a></li><li class="navelem"><a class="el" href="dir_c7e52d5561930380e5580f41be917c2f.html">ARM</a></li><li class="navelem"><a class="el" href="dir_3b4eaae6c8aa6ae26812da492b5e160f.html">ARMCA9</a></li><li class="navelem"><a class="el" href="dir_cf458401307886261324fb8415ee454f.html">Include</a></li><li class="navelem"><a class="el" href="ARMCA9_8h.html">ARMCA9.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/MISRA_8txt.html b/docs/Core_A/html/MISRA_8txt.html
index 0f61a93..a419ded 100644
--- a/docs/Core_A/html/MISRA_8txt.html
+++ b/docs/Core_A/html/MISRA_8txt.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="MISRA_8txt.html">MISRA.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/Overview_8txt.html b/docs/Core_A/html/Overview_8txt.html
index 61fd91b..aa4f144 100644
--- a/docs/Core_A/html/Overview_8txt.html
+++ b/docs/Core_A/html/Overview_8txt.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="Overview_8txt.html">Overview.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/Ref__SystemAndClock_8txt.html b/docs/Core_A/html/Ref__SystemAndClock_8txt.html
index bdad358..465b2db 100644
--- a/docs/Core_A/html/Ref__SystemAndClock_8txt.html
+++ b/docs/Core_A/html/Ref__SystemAndClock_8txt.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -136,7 +136,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="Ref__SystemAndClock_8txt.html">Ref_SystemAndClock.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/Template_8txt.html b/docs/Core_A/html/Template_8txt.html
index 95b79fd..dfa702a 100644
--- a/docs/Core_A/html/Template_8txt.html
+++ b/docs/Core_A/html/Template_8txt.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="Template_8txt.html">Template.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/Using_8txt.html b/docs/Core_A/html/Using_8txt.html
index 236fe62..369f58a 100644
--- a/docs/Core_A/html/Using_8txt.html
+++ b/docs/Core_A/html/Using_8txt.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="Using_8txt.html">Using.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/annotated.html b/docs/Core_A/html/annotated.html
index ed5849b..88152c8 100644
--- a/docs/Core_A/html/annotated.html
+++ b/docs/Core_A/html/annotated.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -140,7 +140,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/classes.html b/docs/Core_A/html/classes.html
index ecdef5e..e50aece 100644
--- a/docs/Core_A/html/classes.html
+++ b/docs/Core_A/html/classes.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -144,7 +144,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/cmsis.css b/docs/Core_A/html/cmsis.css
index bba1010..586d4d2 100644
--- a/docs/Core_A/html/cmsis.css
+++ b/docs/Core_A/html/cmsis.css
@@ -1148,7 +1148,7 @@
 
 .image
 {
-        text-align: center;
+        text-align: left;
 }
 
 .dotgraph
diff --git a/docs/Core_A/html/cmsis__armcc_8h.html b/docs/Core_A/html/cmsis__armcc_8h.html
index 7579eb8..d801fac 100644
--- a/docs/Core_A/html/cmsis__armcc_8h.html
+++ b/docs/Core_A/html/cmsis__armcc_8h.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -163,6 +163,8 @@
 <tr class="memitem:gaa65ef8f7a5e8b7a6ea6c1d48b4c78e55"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__comp__cntrl__gr.html#gaa65ef8f7a5e8b7a6ea6c1d48b4c78e55">__ALIGNED</a>(x)&#160;&#160;&#160;__attribute__((aligned(x)))</td></tr>
 <tr class="memdesc:gaa65ef8f7a5e8b7a6ea6c1d48b4c78e55"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum alignment for a variable.  <a href="group__comp__cntrl__gr.html#gaa65ef8f7a5e8b7a6ea6c1d48b4c78e55">More...</a><br/></td></tr>
 <tr class="separator:gaa65ef8f7a5e8b7a6ea6c1d48b4c78e55"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a6516fb12ab0dd45c734f8cef7d921af6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="cmsis__armcc_8h.html#a6516fb12ab0dd45c734f8cef7d921af6">__COMPILER_BARRIER</a>()&#160;&#160;&#160;__memory_changed()</td></tr>
+<tr class="separator:a6516fb12ab0dd45c734f8cef7d921af6"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gabd585ddc865fb9b7f2493af1eee1a572"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__Core__InstructionInterface.html#gabd585ddc865fb9b7f2493af1eee1a572">__NOP</a>&#160;&#160;&#160;__nop</td></tr>
 <tr class="memdesc:gabd585ddc865fb9b7f2493af1eee1a572"><td class="mdescLeft">&#160;</td><td class="mdescRight">No Operation.  <a href="group__CMSIS__Core__InstructionInterface.html#gabd585ddc865fb9b7f2493af1eee1a572">More...</a><br/></td></tr>
 <tr class="separator:gabd585ddc865fb9b7f2493af1eee1a572"><td class="memSeparator" colspan="2">&#160;</td></tr>
@@ -278,8 +280,8 @@
 <tr class="separator:ga1e4728985ee8b4fa89cc01c032f69565"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<div class="textblock"><dl class="section version"><dt>Version</dt><dd>V1.0.2 </dd></dl>
-<dl class="section date"><dt>Date</dt><dd>10. January 2018 </dd></dl>
+<div class="textblock"><dl class="section version"><dt>Version</dt><dd>V1.0.3 </dd></dl>
+<dl class="section date"><dt>Date</dt><dd>15. May 2019 </dd></dl>
 </div><h2 class="groupheader">Macro Definition Documentation</h2>
 <a class="anchor" id="a7f7b66103530fadcce226375af3c2c03"></a>
 <div class="memitem">
@@ -313,6 +315,21 @@
 
 </div>
 </div>
+<a class="anchor" id="a6516fb12ab0dd45c734f8cef7d921af6"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define __COMPILER_BARRIER</td>
+          <td>(</td>
+          <td class="paramname"></td><td>)</td>
+          <td>&#160;&#160;&#160;__memory_changed()</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
 <a class="anchor" id="a2ecb43ce8e7aa73d32f50afa67b42c76"></a>
 <div class="memitem">
 <div class="memproto">
@@ -1001,7 +1018,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_f806067e3cfd0faadc71b6fb603a0f72.html">Core_A</a></li><li class="navelem"><a class="el" href="dir_3f4b401a2ed0c5733c677abc947b6aa9.html">Include</a></li><li class="navelem"><a class="el" href="cmsis__armcc_8h.html">cmsis_armcc.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/cmsis__armcc_8txt.html b/docs/Core_A/html/cmsis__armcc_8txt.html
index 5bf0b9b..c196028 100644
--- a/docs/Core_A/html/cmsis__armcc_8txt.html
+++ b/docs/Core_A/html/cmsis__armcc_8txt.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -108,6 +108,7 @@
 
 <div class="header">
   <div class="summary">
+<a href="#define-members">Macros</a> &#124;
 <a href="#func-members">Functions</a>  </div>
   <div class="headertitle">
 <div class="title">cmsis_armcc.txt File Reference</div>  </div>
@@ -117,6 +118,30 @@
 <p>CMSIS compiler specific macros, functions, instructions.  
 <a href="#details">More...</a></p>
 <table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
+Macros</h2></td></tr>
+<tr class="memitem:gab904513442afdf77d4f8c74f23cbb040"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__comp__cntrl__gr.html#gab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a></td></tr>
+<tr class="memdesc:gab904513442afdf77d4f8c74f23cbb040"><td class="mdescLeft">&#160;</td><td class="mdescRight">Define a static function that should be always inlined by the compiler.  <a href="group__comp__cntrl__gr.html#gab904513442afdf77d4f8c74f23cbb040">More...</a><br/></td></tr>
+<tr class="separator:gab904513442afdf77d4f8c74f23cbb040"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4dbb70fab85207c27b581ecb6532b314"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__comp__cntrl__gr.html#ga4dbb70fab85207c27b581ecb6532b314">__PACKED_STRUCT</a></td></tr>
+<tr class="memdesc:ga4dbb70fab85207c27b581ecb6532b314"><td class="mdescLeft">&#160;</td><td class="mdescRight">Request smallest possible alignment for a structure.  <a href="group__comp__cntrl__gr.html#ga4dbb70fab85207c27b581ecb6532b314">More...</a><br/></td></tr>
+<tr class="separator:ga4dbb70fab85207c27b581ecb6532b314"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga27fd2ec6767ca1ab66d36b5cc0103268"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__comp__cntrl__gr.html#ga27fd2ec6767ca1ab66d36b5cc0103268">__UNALIGNED_UINT32</a></td></tr>
+<tr class="memdesc:ga27fd2ec6767ca1ab66d36b5cc0103268"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer for unaligned access of a uint32_t variable.  <a href="group__comp__cntrl__gr.html#ga27fd2ec6767ca1ab66d36b5cc0103268">More...</a><br/></td></tr>
+<tr class="separator:ga27fd2ec6767ca1ab66d36b5cc0103268"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gabe8693a7200e573101551d49a1772fb9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__comp__cntrl__gr.html#gabe8693a7200e573101551d49a1772fb9">__UNALIGNED_UINT16_READ</a></td></tr>
+<tr class="memdesc:gabe8693a7200e573101551d49a1772fb9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer for unaligned read of a uint16_t variable.  <a href="group__comp__cntrl__gr.html#gabe8693a7200e573101551d49a1772fb9">More...</a><br/></td></tr>
+<tr class="separator:gabe8693a7200e573101551d49a1772fb9"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gadb9cd73446f7e11e92383cd327a23407"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__comp__cntrl__gr.html#gadb9cd73446f7e11e92383cd327a23407">__UNALIGNED_UINT16_WRITE</a></td></tr>
+<tr class="memdesc:gadb9cd73446f7e11e92383cd327a23407"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer for unaligned write of a uint16_t variable.  <a href="group__comp__cntrl__gr.html#gadb9cd73446f7e11e92383cd327a23407">More...</a><br/></td></tr>
+<tr class="separator:gadb9cd73446f7e11e92383cd327a23407"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga254322c344d954c9f829719a50a88e87"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__comp__cntrl__gr.html#ga254322c344d954c9f829719a50a88e87">__UNALIGNED_UINT32_READ</a></td></tr>
+<tr class="memdesc:ga254322c344d954c9f829719a50a88e87"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer for unaligned read of a uint32_t variable.  <a href="group__comp__cntrl__gr.html#ga254322c344d954c9f829719a50a88e87">More...</a><br/></td></tr>
+<tr class="separator:ga254322c344d954c9f829719a50a88e87"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gabb2180285c417aa9120a360c51f64b4b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__comp__cntrl__gr.html#gabb2180285c417aa9120a360c51f64b4b">__UNALIGNED_UINT32_WRITE</a></td></tr>
+<tr class="memdesc:gabb2180285c417aa9120a360c51f64b4b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer for unaligned write of a uint32_t variable.  <a href="group__comp__cntrl__gr.html#gabb2180285c417aa9120a360c51f64b4b">More...</a><br/></td></tr>
+<tr class="separator:gabb2180285c417aa9120a360c51f64b4b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table><table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
 <tr class="memitem:ga4717abc17af5ba29b1e4c055e0a0d9b8"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__Core__InstructionInterface.html#ga4717abc17af5ba29b1e4c055e0a0d9b8">__REV</a> (uint32_t value)</td></tr>
@@ -147,7 +172,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="cmsis__armcc_8txt.html">cmsis_armcc.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/cmsis__cp15_8h.html b/docs/Core_A/html/cmsis__cp15_8h.html
index 4111115..fcb1f7c 100644
--- a/docs/Core_A/html/cmsis__cp15_8h.html
+++ b/docs/Core_A/html/cmsis__cp15_8h.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -385,7 +385,7 @@
         </tr>
       </table>
 </div><div class="memdoc">
-<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000002">Deprecated:</a></b></dt><dd>CCSIDR itself is read-only. Use __set_CSSELR to select cache level instead. </dd></dl>
+<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000003">Deprecated:</a></b></dt><dd>CCSIDR itself is read-only. Use __set_CSSELR to select cache level instead. </dd></dl>
 
 </div>
 </div>
@@ -482,7 +482,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_f806067e3cfd0faadc71b6fb603a0f72.html">Core_A</a></li><li class="navelem"><a class="el" href="dir_3f4b401a2ed0c5733c677abc947b6aa9.html">Include</a></li><li class="navelem"><a class="el" href="cmsis__cp15_8h.html">cmsis_cp15.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/coreMISRA_Exceptions_pg.html b/docs/Core_A/html/coreMISRA_Exceptions_pg.html
index 0d712a3..5cd35c1 100644
--- a/docs/Core_A/html/coreMISRA_Exceptions_pg.html
+++ b/docs/Core_A/html/coreMISRA_Exceptions_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -119,7 +119,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/core__ca_8h.html b/docs/Core_A/html/core__ca_8h.html
index ccb7454..ac85289 100644
--- a/docs/Core_A/html/core__ca_8h.html
+++ b/docs/Core_A/html/core__ca_8h.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
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@@ -1259,8 +1259,8 @@
 <tr class="separator:ga9de65bea1cabf73dc4302e0e727cc8c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<div class="textblock"><dl class="section version"><dt>Version</dt><dd>V1.0.1 </dd></dl>
-<dl class="section date"><dt>Date</dt><dd>07. May 2018 </dd></dl>
+<div class="textblock"><dl class="section version"><dt>Version</dt><dd>V1.0.2 </dd></dl>
+<dl class="section date"><dt>Date</dt><dd>12. November 2018 </dd></dl>
 </div><h2 class="groupheader">Macro Definition Documentation</h2>
 <a class="anchor" id="add5658d95f6b79934202e6fbf1795b12"></a>
 <div class="memitem">
@@ -2091,7 +2091,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_f806067e3cfd0faadc71b6fb603a0f72.html">Core_A</a></li><li class="navelem"><a class="el" href="dir_3f4b401a2ed0c5733c677abc947b6aa9.html">Include</a></li><li class="navelem"><a class="el" href="core__ca_8h.html">core_ca.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/core__ca_8txt.html b/docs/Core_A/html/core__ca_8txt.html
index 5b92acf..f84cafb 100644
--- a/docs/Core_A/html/core__ca_8txt.html
+++ b/docs/Core_A/html/core__ca_8txt.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -132,7 +132,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="core__ca_8txt.html">core_ca.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/deprecated.html b/docs/Core_A/html/deprecated.html
index 756826d..aab7c0c 100644
--- a/docs/Core_A/html/deprecated.html
+++ b/docs/Core_A/html/deprecated.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -112,17 +112,21 @@
 </div><!--header-->
 <div class="contents">
 <div class="textblock"><dl class="reflist">
-<dt><a class="anchor" id="_deprecated000001"></a>Global <a class="el" href="group__L1__cache__functions.html#ga722ceb077e491bb4befcfbb3aee9b20b">__L1C_CleanInvalidateCache</a>  (uint32_t op)</dt>
+<dt><a class="anchor" id="_deprecated000002"></a>Global <a class="el" href="group__L1__cache__functions.html#ga722ceb077e491bb4befcfbb3aee9b20b">__L1C_CleanInvalidateCache</a>  (uint32_t op)</dt>
 <dd>Use generic L1C_CleanInvalidateCache instead.  </dd>
-<dt><a class="anchor" id="_deprecated000002"></a>Global <a class="el" href="cmsis__cp15_8h.html#a639d467f42fdad7a173f90568b697fc8">__set_CCSIDR</a>  (uint32_t value)</dt>
-<dd>CCSIDR itself is read-only. Use __set_CSSELR to select cache level instead. </dd>
+<dt><a class="anchor" id="_deprecated000003"></a>Global <a class="el" href="cmsis__cp15_8h.html#a639d467f42fdad7a173f90568b697fc8">__set_CCSIDR</a>  (uint32_t value)</dt>
+<dd>CCSIDR itself is read-only. Use __set_CSSELR to select cache level instead.  </dd>
+<dt><a class="anchor" id="_deprecated000001"></a>Global <a class="el" href="group__comp__cntrl__gr.html#ga27fd2ec6767ca1ab66d36b5cc0103268">__UNALIGNED_UINT32</a>  </dt>
+<dd><p class="startdd">Do not use this macro. It has been superseded by <a class="el" href="cmsis__armcc_8h.html#a3b931f0b051b8c1a6377a3dcc7559b5e">__UNALIGNED_UINT32_READ</a>, <a class="el" href="cmsis__armcc_8h.html#a203f593d140ed88b81bc189edc861110">__UNALIGNED_UINT32_WRITE</a> and will be removed in the future.</p>
+<p class="enddd"></p>
+</dd>
 </dl>
 </div></div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/device_h_pg.html b/docs/Core_A/html/device_h_pg.html
index df90fa6..cf9bdf3 100644
--- a/docs/Core_A/html/device_h_pg.html
+++ b/docs/Core_A/html/device_h_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -469,7 +469,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/dir_3541bd7f1207d85fb277b58db6e0335d.html b/docs/Core_A/html/dir_3541bd7f1207d85fb277b58db6e0335d.html
index e1073a3..a45fff2 100644
--- a/docs/Core_A/html/dir_3541bd7f1207d85fb277b58db6e0335d.html
+++ b/docs/Core_A/html/dir_3541bd7f1207d85fb277b58db6e0335d.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -123,7 +123,7 @@
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diff --git a/docs/Core_A/html/functions_a.html b/docs/Core_A/html/functions_a.html
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@@ -175,7 +175,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
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     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/functions_vars_s.html b/docs/Core_A/html/functions_vars_s.html
index d57949f..3dba7e6 100644
--- a/docs/Core_A/html/functions_vars_s.html
+++ b/docs/Core_A/html/functions_vars_s.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -193,7 +193,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/functions_vars_t.html b/docs/Core_A/html/functions_vars_t.html
index 068ac2e..790008f 100644
--- a/docs/Core_A/html/functions_vars_t.html
+++ b/docs/Core_A/html/functions_vars_t.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -172,7 +172,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/functions_vars_u.html b/docs/Core_A/html/functions_vars_u.html
index 313f1e3..273cab8 100644
--- a/docs/Core_A/html/functions_vars_u.html
+++ b/docs/Core_A/html/functions_vars_u.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
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    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -169,7 +169,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/functions_vars_v.html b/docs/Core_A/html/functions_vars_v.html
index ed5a087..7f017d6 100644
--- a/docs/Core_A/html/functions_vars_v.html
+++ b/docs/Core_A/html/functions_vars_v.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -164,7 +164,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/functions_vars_w.html b/docs/Core_A/html/functions_vars_w.html
index 7169219..24c6793 100644
--- a/docs/Core_A/html/functions_vars_w.html
+++ b/docs/Core_A/html/functions_vars_w.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -194,7 +194,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/functions_vars_x.html b/docs/Core_A/html/functions_vars_x.html
index 5378ae5..9f065df 100644
--- a/docs/Core_A/html/functions_vars_x.html
+++ b/docs/Core_A/html/functions_vars_x.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -160,7 +160,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/functions_vars_z.html b/docs/Core_A/html/functions_vars_z.html
index 13e9316..60b97c1 100644
--- a/docs/Core_A/html/functions_vars_z.html
+++ b/docs/Core_A/html/functions_vars_z.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -161,7 +161,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/functions_w.html b/docs/Core_A/html/functions_w.html
index 32f4e13..7e0fada 100644
--- a/docs/Core_A/html/functions_w.html
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@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -194,7 +194,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/functions_x.html b/docs/Core_A/html/functions_x.html
index 526158e..bde3756 100644
--- a/docs/Core_A/html/functions_x.html
+++ b/docs/Core_A/html/functions_x.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -160,7 +160,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/functions_z.html b/docs/Core_A/html/functions_z.html
index a9ed330..95e365e 100644
--- a/docs/Core_A/html/functions_z.html
+++ b/docs/Core_A/html/functions_z.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -161,7 +161,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/globals.html b/docs/Core_A/html/globals.html
index b1b11a6..bf03af1 100644
--- a/docs/Core_A/html/globals.html
+++ b/docs/Core_A/html/globals.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
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@@ -145,9 +145,6 @@
 <div class="textblock">Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:</div>
 
 <h3><a class="anchor" id="index__"></a>- _ -</h3><ul>
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-</li>
 <li>__ALIGNED
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@@ -182,6 +179,9 @@
 <li>__CMSIS_CP15_H
 : <a class="el" href="cmsis__cp15_8h.html#ae6f92562f567fd8583d8ddd98cae46d5">cmsis_cp15.h</a>
 </li>
+<li>__COMPILER_BARRIER
+: <a class="el" href="cmsis__armcc_8h.html#a6516fb12ab0dd45c734f8cef7d921af6">cmsis_armcc.h</a>
+</li>
 <li>__CORE_CA_H_DEPENDANT
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 </li>
@@ -197,9 +197,6 @@
 <li>__DSB
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-<li>__FIQ_STACK_SIZE
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 <li>__FORCEINLINE
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 </li>
@@ -304,9 +301,6 @@
 : <a class="el" href="core__ca_8h.html#a6690a7e24ea0ec4b36a8fb077d01a820">core_ca.h</a>
 , <a class="el" href="ARMCA9_8h.html#a6690a7e24ea0ec4b36a8fb077d01a820">ARMCA9.h</a>
 </li>
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-</li>
 <li>__I
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 </li>
@@ -322,9 +316,6 @@
 <li>__IOM
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 <li>__ISB
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 </li>
@@ -365,13 +356,8 @@
 : <a class="el" href="group__comp__cntrl__gr.html#gabe8996d3d985ee1529475443cc635bf1">cmsis_armcc.h</a>
 </li>
 <li>__PACKED_STRUCT
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-</li>
-<li>__RAM_BASE
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-</li>
-<li>__RAM_SIZE
-: <a class="el" href="mem__ARMCA9_8h.html#a8709883a5b4c1734f7f451e9d83780f2">mem_ARMCA9.h</a>
+: <a class="el" href="group__comp__cntrl__gr.html#ga4dbb70fab85207c27b581ecb6532b314">cmsis_armcc.txt</a>
+, <a class="el" href="cmsis__armcc_8h.html#a4dbb70fab85207c27b581ecb6532b314">cmsis_armcc.h</a>
 </li>
 <li>__RBIT
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@@ -387,19 +373,10 @@
 <li>__REVSH()
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 </li>
-<li>__ROM_BASE
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-</li>
-<li>__ROM_SIZE
-: <a class="el" href="mem__ARMCA9_8h.html#a23423b37c669c6d70b3aeeec7c3209fc">mem_ARMCA9.h</a>
-</li>
 <li>__ROR
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 </li>
-<li>__RW_DATA_SIZE
-: <a class="el" href="mem__ARMCA9_8h.html#a244d488ae9113bf4c972c20a21723ac4">mem_ARMCA9.h</a>
-</li>
 <li>__set_ACTLR()
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@@ -505,11 +482,9 @@
 <li>__SSAT
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 </li>
-<li>__STACK_SIZE
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-</li>
 <li>__STATIC_FORCEINLINE
 : <a class="el" href="cmsis__armcc_8h.html#ab904513442afdf77d4f8c74f23cbb040">cmsis_armcc.h</a>
+, <a class="el" href="group__comp__cntrl__gr.html#gab904513442afdf77d4f8c74f23cbb040">cmsis_armcc.txt</a>
 </li>
 <li>__STATIC_INLINE
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@@ -523,33 +498,28 @@
 <li>__STREXW
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 </li>
-<li>__SVC_STACK_SIZE
-: <a class="el" href="mem__ARMCA9_8h.html#a56b98f7c5dac25e019ab4cc1b195ae60">mem_ARMCA9.h</a>
-</li>
 <li>__TIM_PRESENT
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-, <a class="el" href="ARMCA9_8h.html#a0e57ca9f1bc10c2de05d383d2c76267a">ARMCA9.h</a>
-</li>
-<li>__TTB_BASE
-: <a class="el" href="mem__ARMCA9_8h.html#a5636831f81072fadf130e3b462d7b5f6">mem_ARMCA9.h</a>
-</li>
-<li>__TTB_SIZE
-: <a class="el" href="mem__ARMCA9_8h.html#a7f6661ae744a397001b44a1c5be751ec">mem_ARMCA9.h</a>
+: <a class="el" href="ARMCA9_8h.html#a0e57ca9f1bc10c2de05d383d2c76267a">ARMCA9.h</a>
+, <a class="el" href="core__ca_8h.html#a0e57ca9f1bc10c2de05d383d2c76267a">core_ca.h</a>
 </li>
 <li>__UNALIGNED_UINT16_READ
 : <a class="el" href="cmsis__armcc_8h.html#ab71b66e5ce403158d3dee62a59f9175f">cmsis_armcc.h</a>
+, <a class="el" href="group__comp__cntrl__gr.html#gabe8693a7200e573101551d49a1772fb9">cmsis_armcc.txt</a>
 </li>
 <li>__UNALIGNED_UINT16_WRITE
-: <a class="el" href="cmsis__armcc_8h.html#a5103fb373cae9837cc4a384be55dc87f">cmsis_armcc.h</a>
+: <a class="el" href="group__comp__cntrl__gr.html#gadb9cd73446f7e11e92383cd327a23407">cmsis_armcc.txt</a>
+, <a class="el" href="cmsis__armcc_8h.html#a5103fb373cae9837cc4a384be55dc87f">cmsis_armcc.h</a>
+</li>
+<li>__UNALIGNED_UINT32
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diff --git a/docs/Core_A/html/globals_func.html b/docs/Core_A/html/globals_func.html
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diff --git a/docs/Core_A/html/globals_g.html b/docs/Core_A/html/globals_g.html
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/globals_i.html b/docs/Core_A/html/globals_i.html
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/globals_k.html b/docs/Core_A/html/globals_k.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/globals_l.html b/docs/Core_A/html/globals_l.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/globals_m.html b/docs/Core_A/html/globals_m.html
index 21d3cea..fd3e768 100644
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/globals_n.html b/docs/Core_A/html/globals_n.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/globals_o.html b/docs/Core_A/html/globals_o.html
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diff --git a/docs/Core_A/html/globals_p.html b/docs/Core_A/html/globals_p.html
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@@ -32,7 +32,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Core_A/html/globals_r.html b/docs/Core_A/html/globals_r.html
index bc722b7..240bb28 100644
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@@ -32,7 +32,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Core_A/html/globals_s.html b/docs/Core_A/html/globals_s.html
index ee3156d..9dc30e0 100644
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@@ -32,7 +32,7 @@
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+: <a class="el" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6">Ref_SystemAndClock.txt</a>
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-, <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2">Ref_SystemAndClock.txt</a>
+: <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2">Ref_SystemAndClock.txt</a>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/globals_t.html b/docs/Core_A/html/globals_t.html
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@@ -32,7 +32,7 @@
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@@ -160,7 +160,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Core_A/html/globals_type.html b/docs/Core_A/html/globals_type.html
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@@ -32,7 +32,7 @@
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@@ -131,7 +131,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Core_A/html/globals_u.html b/docs/Core_A/html/globals_u.html
index b655271..1f54315 100644
--- a/docs/Core_A/html/globals_u.html
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@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
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@@ -169,7 +169,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/globals_v.html b/docs/Core_A/html/globals_v.html
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@@ -32,7 +32,7 @@
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 </li>
-<li>VE_A9_MP_PERIPH_BASE
-: <a class="el" href="ARMCA9_8h.html#ad22dea20bcb552bd05691f62ff5e5799">ARMCA9.h</a>
+<li>VE_A9_MP_PERIPH_BASE_CS2
+: <a class="el" href="ARMCA9_8h.html#a1f0eb04274d447fa1261fc34313bbd2f">ARMCA9.h</a>
+</li>
+<li>VE_A9_MP_PERIPH_BASE_CS3
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 </li>
 <li>VE_A9_MP_PL310_BASE
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 </li>
+<li>VE_A9_MP_PRIVATE_PERIPH_BASE
+: <a class="el" href="ARMCA9_8h.html#a8d664adb95364c864de72494a7603ee4">ARMCA9.h</a>
+</li>
 <li>VE_A9_MP_PRIVATE_TIMER
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 </li>
+<li>VE_A9_MP_SSRAM_BASE
+: <a class="el" href="ARMCA9_8h.html#a649334fdbe9f99fa6c9e5fb9771deeab">ARMCA9.h</a>
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 <li>VE_A9_MP_SYSTEM_REG_BASE
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@@ -232,7 +241,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/globals_vars.html b/docs/Core_A/html/globals_vars.html
index 551e51a..339e68c 100644
--- a/docs/Core_A/html/globals_vars.html
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@@ -32,7 +32,7 @@
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/globals_w.html b/docs/Core_A/html/globals_w.html
index 123eae7..b8db864 100644
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__ACTLR.html b/docs/Core_A/html/group__CMSIS__ACTLR.html
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__ACTLR__BITS.html b/docs/Core_A/html/group__CMSIS__ACTLR__BITS.html
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__CBAR.html b/docs/Core_A/html/group__CMSIS__CBAR.html
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__CBAR__BITS.html b/docs/Core_A/html/group__CMSIS__CBAR__BITS.html
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__CBPM.html b/docs/Core_A/html/group__CMSIS__CBPM.html
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--- a/docs/Core_A/html/group__CMSIS__CBPM.html
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__CNTFRQ.html b/docs/Core_A/html/group__CMSIS__CNTFRQ.html
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--- a/docs/Core_A/html/group__CMSIS__CNTFRQ.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__CNTPCT.html b/docs/Core_A/html/group__CMSIS__CNTPCT.html
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--- a/docs/Core_A/html/group__CMSIS__CNTPCT.html
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__CNTP__CTL.html b/docs/Core_A/html/group__CMSIS__CNTP__CTL.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__CNTP__CVAL.html b/docs/Core_A/html/group__CMSIS__CNTP__CVAL.html
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__Core__FunctionInterface.html b/docs/Core_A/html/group__CMSIS__Core__FunctionInterface.html
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__DACR.html b/docs/Core_A/html/group__CMSIS__DACR.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__DACR__Dn.html b/docs/Core_A/html/group__CMSIS__DACR__Dn.html
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__DFSR.html b/docs/Core_A/html/group__CMSIS__DFSR.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__DFSR__BITS.html b/docs/Core_A/html/group__CMSIS__DFSR__BITS.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__FPEXC.html b/docs/Core_A/html/group__CMSIS__FPEXC.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__FPSCR.html b/docs/Core_A/html/group__CMSIS__FPSCR.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__FPSCR__BITS.html b/docs/Core_A/html/group__CMSIS__FPSCR__BITS.html
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@@ -32,7 +32,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__IFSR.html b/docs/Core_A/html/group__CMSIS__IFSR.html
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+++ b/docs/Core_A/html/group__CMSIS__IFSR.html
@@ -32,7 +32,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__IFSR__BITS.html b/docs/Core_A/html/group__CMSIS__IFSR__BITS.html
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--- a/docs/Core_A/html/group__CMSIS__IFSR__BITS.html
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@@ -32,7 +32,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__ISR.html b/docs/Core_A/html/group__CMSIS__ISR.html
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@@ -32,7 +32,7 @@
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@@ -177,7 +177,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__ISR__BITS.html b/docs/Core_A/html/group__CMSIS__ISR__BITS.html
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--- a/docs/Core_A/html/group__CMSIS__ISR__BITS.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__SCTLR__BITS.html b/docs/Core_A/html/group__CMSIS__SCTLR__BITS.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__TLB.html b/docs/Core_A/html/group__CMSIS__TLB.html
index 333e1a9..fcf519a 100644
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@@ -32,7 +32,7 @@
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@@ -150,7 +150,7 @@
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__TTBR.html b/docs/Core_A/html/group__CMSIS__TTBR.html
index 3aacae2..baf190d 100644
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@@ -32,7 +32,7 @@
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__CMSIS__VBAR.html b/docs/Core_A/html/group__CMSIS__VBAR.html
index 2aa7aa9..9cf9bf2 100644
--- a/docs/Core_A/html/group__CMSIS__VBAR.html
+++ b/docs/Core_A/html/group__CMSIS__VBAR.html
@@ -32,7 +32,7 @@
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@@ -185,7 +185,7 @@
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Core_A/html/group__CMSIS__core__register.html b/docs/Core_A/html/group__CMSIS__core__register.html
index 120f536..a2a787d 100644
--- a/docs/Core_A/html/group__CMSIS__core__register.html
+++ b/docs/Core_A/html/group__CMSIS__core__register.html
@@ -32,7 +32,7 @@
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@@ -195,7 +195,7 @@
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__FPU__functions.html b/docs/Core_A/html/group__FPU__functions.html
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@@ -32,7 +32,7 @@
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__GIC__functions.html b/docs/Core_A/html/group__GIC__functions.html
index 635803e..5e9113a 100644
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@@ -32,7 +32,7 @@
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@@ -984,7 +984,7 @@
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
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@@ -32,7 +32,7 @@
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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+++ b/docs/Core_A/html/group__PL1__timer__functions.html
@@ -32,7 +32,7 @@
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@@ -327,7 +327,7 @@
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__PTM__timer__functions.html b/docs/Core_A/html/group__PTM__timer__functions.html
index 23051df..9a3fd37 100644
--- a/docs/Core_A/html/group__PTM__timer__functions.html
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@@ -32,7 +32,7 @@
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@@ -284,7 +284,7 @@
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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@@ -32,7 +32,7 @@
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@@ -131,6 +131,9 @@
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+<tr class="memdesc:ga4dbb70fab85207c27b581ecb6532b314"><td class="mdescLeft">&#160;</td><td class="mdescRight">Request smallest possible alignment for a structure.  <a href="#ga4dbb70fab85207c27b581ecb6532b314">More...</a><br/></td></tr>
+<tr class="separator:ga4dbb70fab85207c27b581ecb6532b314"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga27fd2ec6767ca1ab66d36b5cc0103268"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__comp__cntrl__gr.html#ga27fd2ec6767ca1ab66d36b5cc0103268">__UNALIGNED_UINT32</a></td></tr>
+<tr class="memdesc:ga27fd2ec6767ca1ab66d36b5cc0103268"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer for unaligned access of a uint32_t variable.  <a href="#ga27fd2ec6767ca1ab66d36b5cc0103268">More...</a><br/></td></tr>
+<tr class="separator:ga27fd2ec6767ca1ab66d36b5cc0103268"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gabe8693a7200e573101551d49a1772fb9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__comp__cntrl__gr.html#gabe8693a7200e573101551d49a1772fb9">__UNALIGNED_UINT16_READ</a></td></tr>
+<tr class="memdesc:gabe8693a7200e573101551d49a1772fb9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer for unaligned read of a uint16_t variable.  <a href="#gabe8693a7200e573101551d49a1772fb9">More...</a><br/></td></tr>
+<tr class="separator:gabe8693a7200e573101551d49a1772fb9"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gadb9cd73446f7e11e92383cd327a23407"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__comp__cntrl__gr.html#gadb9cd73446f7e11e92383cd327a23407">__UNALIGNED_UINT16_WRITE</a></td></tr>
+<tr class="memdesc:gadb9cd73446f7e11e92383cd327a23407"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer for unaligned write of a uint16_t variable.  <a href="#gadb9cd73446f7e11e92383cd327a23407">More...</a><br/></td></tr>
+<tr class="separator:gadb9cd73446f7e11e92383cd327a23407"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga254322c344d954c9f829719a50a88e87"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__comp__cntrl__gr.html#ga254322c344d954c9f829719a50a88e87">__UNALIGNED_UINT32_READ</a></td></tr>
+<tr class="memdesc:ga254322c344d954c9f829719a50a88e87"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer for unaligned read of a uint32_t variable.  <a href="#ga254322c344d954c9f829719a50a88e87">More...</a><br/></td></tr>
+<tr class="separator:ga254322c344d954c9f829719a50a88e87"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gabb2180285c417aa9120a360c51f64b4b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__comp__cntrl__gr.html#gabb2180285c417aa9120a360c51f64b4b">__UNALIGNED_UINT32_WRITE</a></td></tr>
+<tr class="memdesc:gabb2180285c417aa9120a360c51f64b4b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer for unaligned write of a uint32_t variable.  <a href="#gabb2180285c417aa9120a360c51f64b4b">More...</a><br/></td></tr>
+<tr class="separator:gabb2180285c417aa9120a360c51f64b4b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>The CMSIS-Core provides the header file <b>cmsis_compiler.h</b> with consistent #define symbols to generate C or C++ source files that should be compiler agnostic. Each CMSIS compliant compiler should support the functionality described in this section. </p>
@@ -263,6 +284,46 @@
 </div><!-- fragment --> 
 </div>
 </div>
+<a class="anchor" id="ga4dbb70fab85207c27b581ecb6532b314"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define __PACKED_STRUCT</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Specifies that a structure must have the smallest possible alignment.</p>
+<p><b> Code Example:</b> </p>
+<div class="fragment"><div class="line"><a class="code" href="group__comp__cntrl__gr.html#ga4dbb70fab85207c27b581ecb6532b314">__PACKED_STRUCT</a> foo {</div>
+<div class="line">  uint8_t   u8;</div>
+<div class="line">  uint32_t  u32;</div>
+<div class="line">  uint16_t  u16;</div>
+<div class="line">};</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="gab904513442afdf77d4f8c74f23cbb040"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define __STATIC_FORCEINLINE</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Defines a static function that should be always inlined by the compiler.</p>
+<dl class="section note"><dt>Note</dt><dd>For compilers that do not allow to force function inlining, the macro maps to <a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a>.</dd></dl>
+<p><b> Code Example:</b> </p>
+<div class="fragment"><div class="line">\\ Get Interrupt Vector</div>
+<div class="line"><a class="code" href="group__comp__cntrl__gr.html#gab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> uint32_t NVIC_GetVector(<a class="code" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</div>
+<div class="line">{</div>
+<div class="line">    uint32_t *vectors = (uint32_t *)SCB-&gt;VTOR;</div>
+<div class="line">    <span class="keywordflow">return</span> vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];</div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
 <a class="anchor" id="gaba87361bfad2ae52cfe2f40c1a1dbf9c"></a>
 <div class="memitem">
 <div class="memproto">
@@ -281,6 +342,102 @@
 </div><!-- fragment --> 
 </div>
 </div>
+<a class="anchor" id="gabe8693a7200e573101551d49a1772fb9"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define __UNALIGNED_UINT16_READ</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Defines a pointer to a uint16_t from an address that does not need to be aligned. This can then be used in read operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying Arm processor core and compiler settings.</p>
+<p><b> Code Example:</b> </p>
+<div class="fragment"><div class="line">uint16_t val16;</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> test (uint8_t *ptr) {</div>
+<div class="line">   val16 = <a class="code" href="group__comp__cntrl__gr.html#gabe8693a7200e573101551d49a1772fb9">__UNALIGNED_UINT16_READ</a>(ptr);</div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="gadb9cd73446f7e11e92383cd327a23407"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define __UNALIGNED_UINT16_WRITE</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Defines a pointer to a uint16_t from an address that does not need to be aligned. This can then be used in write operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying Arm processor core and compiler settings.</p>
+<p><b> Code Example:</b> </p>
+<div class="fragment"><div class="line">uint16_t val16 = 0U;</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> test (uint8_t *ptr) {</div>
+<div class="line">   <a class="code" href="group__comp__cntrl__gr.html#gadb9cd73446f7e11e92383cd327a23407">__UNALIGNED_UINT16_WRITE</a>(ptr, val16);</div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="ga27fd2ec6767ca1ab66d36b5cc0103268"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define __UNALIGNED_UINT32</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000001">Deprecated:</a></b></dt><dd>Do not use this macro. It has been superseded by <a class="el" href="cmsis__armcc_8h.html#a3b931f0b051b8c1a6377a3dcc7559b5e">__UNALIGNED_UINT32_READ</a>, <a class="el" href="cmsis__armcc_8h.html#a203f593d140ed88b81bc189edc861110">__UNALIGNED_UINT32_WRITE</a> and will be removed in the future.</dd></dl>
+<p>Defines a pointer to a uint32_t from an address that does not need to be aligned. This can then be used in read/write operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying Arm processor core and compiler settings.</p>
+<p><b> Code Example:</b> </p>
+<div class="fragment"><div class="line">uint32_t val32;</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> test (uint8_t *ptr) {</div>
+<div class="line">  <a class="code" href="group__comp__cntrl__gr.html#ga27fd2ec6767ca1ab66d36b5cc0103268">__UNALIGNED_UINT32</a>(ptr) = val32;</div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="ga254322c344d954c9f829719a50a88e87"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define __UNALIGNED_UINT32_READ</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Defines a pointer to a uint32_t from an address that does not need to be aligned. This can then be used in read operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying Arm processor core and compiler settings.</p>
+<p><b> Code Example:</b> </p>
+<div class="fragment"><div class="line">uint32_t val32;</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> test (uint8_t *ptr) {</div>
+<div class="line">   val32 = <a class="code" href="group__comp__cntrl__gr.html#ga254322c344d954c9f829719a50a88e87">__UNALIGNED_UINT32_READ</a>(ptr);</div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="gabb2180285c417aa9120a360c51f64b4b"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define __UNALIGNED_UINT32_WRITE</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Defines a pointer to a uint32_t from an address that does not need to be aligned. This can then be used in write operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying Arm processor core and compiler settings.</p>
+<p><b> Code Example:</b> </p>
+<div class="fragment"><div class="line">uint32_t val32 = 0U;</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> test (uint8_t *ptr) {</div>
+<div class="line">   <a class="code" href="group__comp__cntrl__gr.html#gabb2180285c417aa9120a360c51f64b4b">__UNALIGNED_UINT32_WRITE</a>(ptr, val32);</div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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diff --git a/docs/Core_A/html/group__irq__ctrl__gr.html b/docs/Core_A/html/group__irq__ctrl__gr.html
index 6122a40..733530f 100644
--- a/docs/Core_A/html/group__irq__ctrl__gr.html
+++ b/docs/Core_A/html/group__irq__ctrl__gr.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -1049,7 +1049,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/group__irq__mode__defs.html b/docs/Core_A/html/group__irq__mode__defs.html
index bfa8b83..c35409e 100644
--- a/docs/Core_A/html/group__irq__mode__defs.html
+++ b/docs/Core_A/html/group__irq__mode__defs.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -445,7 +445,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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index e7254ad..00e06ca 100644
--- a/docs/Core_A/html/group__irq__priority__defs.html
+++ b/docs/Core_A/html/group__irq__priority__defs.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -160,7 +160,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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index 0621ef1..b50b077 100644
--- a/docs/Core_A/html/group__peripheral__gr.html
+++ b/docs/Core_A/html/group__peripheral__gr.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -348,7 +348,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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index a57dd63..70ab9b0 100644
--- a/docs/Core_A/html/group__system__init__gr.html
+++ b/docs/Core_A/html/group__system__init__gr.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -140,7 +140,7 @@
 <li>A global variable that contains the system frequency, <a class="el" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6">SystemCoreClock</a>.</li>
 </ul>
 <p>The file configures the device and, typically, initializes the oscillator (PLL) that is part of the microcontroller device. This file might export other functions or variables that provide a more flexible configuration of the microcontroller system.</p>
-<dl class="section note"><dt>Note</dt><dd>Please pay special attention to the static variable <code>SystemCoreClock</code>. This variable might be used throughout the whole system initialization and runtime to calculate frequency/time related values. Thus one must assure that the variable always reflects the actual system clock speed. Be aware that a value stored to <code>SystemCoreClock</code> during low level initialization (i.e. <code><a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2" title="Function to Initialize the system. ">SystemInit()</a></code>) might get overwritten by C library startup code. Thus its highly recommended to call <a class="el" href="system__ARMCA9_8h.html#ae0c36a9591fe6e9c45ecb21a794f0f0f">SystemCoreClockUpdate</a> at the beginning of the user <code>main()</code> routine.</dd></dl>
+<dl class="section note"><dt>Note</dt><dd>Please pay special attention to the static variable <code>SystemCoreClock</code>. This variable might be used throughout the whole system initialization and runtime to calculate frequency/time related values. Thus one must assure that the variable always reflects the actual system clock speed. Be aware that a value stored to <code>SystemCoreClock</code> during low level initialization (i.e. <code><a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2" title="Function to Initialize the system. ">SystemInit()</a></code>) might get overwritten by C library startup code. Thus its highly recommended to call <a class="el" href="group__system__init__gr.html#gae0c36a9591fe6e9c45ecb21a794f0f0f">SystemCoreClockUpdate</a> at the beginning of the user <code>main()</code> routine.</dd></dl>
 <h1><a class="anchor" id="system_init_code_ex_sec"></a>
 Code Example</h1>
 <p>The code below shows the usage of the variable <a class="el" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6">SystemCoreClock</a> and the functions <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2" title="Function to Initialize the system. ">SystemInit()</a> and <a class="el" href="group__system__init__gr.html#gae0c36a9591fe6e9c45ecb21a794f0f0f" title="Function to update the variable SystemCoreClock. ">SystemCoreClockUpdate()</a> with an arbitrary Arm Cortex-A9.</p>
@@ -219,7 +219,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/group__version__ctrl.html b/docs/Core_A/html/group__version__ctrl.html
index 38df063..c335a3d 100644
--- a/docs/Core_A/html/group__version__ctrl.html
+++ b/docs/Core_A/html/group__version__ctrl.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
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@@ -253,7 +253,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/index.doxyidx b/docs/Core_A/html/index.doxyidx
new file mode 100644
index 0000000..d0fee4f
--- /dev/null
+++ b/docs/Core_A/html/index.doxyidx
@@ -0,0 +1,937 @@
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * @file     index.doxyidx
+ * @brief    Index file for MDK-ARM Help System
+ * @version  1.0
+ * @date     10. July 2019
+ * @note     Generated by DoxyIndex V1.2.3 on Wednesday, 10.07.2019 15:22:28
+ *           from Path 'C:\tools\PACK\ARM\CMSIS\5.6.0\\CMSIS\Documentation\Core_A\html',
+ */
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+ACTLR_DBDI_Pos, group__CMSIS__ACTLR__BITS.html#ga0367a8413c0a37d6c1de7b90f3a56aee, core_ca.h
+ACTLR_DDI_Msk, group__CMSIS__ACTLR__BITS.html#gaeee8e0fc7b28f2a405b234e7d2c7486e, core_ca.h
+ACTLR_DDI_Pos, group__CMSIS__ACTLR__BITS.html#ga5468e93550ce28af7114cbc1e19474c0, core_ca.h
+ACTLR_DDVM_Msk, group__CMSIS__ACTLR__BITS.html#ga4565f2632e5c4be5e1d3eb90fa6f2ac6, core_ca.h
+ACTLR_DDVM_Pos, group__CMSIS__ACTLR__BITS.html#gaa9fe7651aa9bb48eea4f5301c69ee54d, core_ca.h
+ACTLR_DODMBS_Msk, group__CMSIS__ACTLR__BITS.html#ga88a85e6310334edb190a6e9298ae98b7, core_ca.h
+ACTLR_DODMBS_Pos, group__CMSIS__ACTLR__BITS.html#ga96eb411770c8e2b87f5e62b95e50ee02, core_ca.h
+ACTLR_DWBST_Msk, group__CMSIS__ACTLR__BITS.html#gab948ab9af88a9357e2e383d948e9dc7e, core_ca.h
+ACTLR_DWBST_Pos, group__CMSIS__ACTLR__BITS.html#ga4ca2a9236b157d3f9405cf8c398897a2, core_ca.h
+ACTLR_EXCL_Msk, group__CMSIS__ACTLR__BITS.html#ga8b704419a7ed130ecbee00de9fd72d55, core_ca.h
+ACTLR_EXCL_Pos, group__CMSIS__ACTLR__BITS.html#ga17dcfbcdf5db82900354db5440699701, core_ca.h
+ACTLR_FW_Msk, group__CMSIS__ACTLR__BITS.html#ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1, core_ca.h
+ACTLR_FW_Pos, group__CMSIS__ACTLR__BITS.html#ga89b1a661668534177bc9679149a692ce, core_ca.h
+ACTLR_L1PCTL_Msk, group__CMSIS__ACTLR__BITS.html#gad701fa3ff69b89ba185b7482e81cb6fd, core_ca.h
+ACTLR_L1PCTL_Pos, group__CMSIS__ACTLR__BITS.html#ga546f1f2bbf7344bad6522205257f17ae, core_ca.h
+ACTLR_L1PE_Msk, group__CMSIS__ACTLR__BITS.html#ga969c20495fe3e50e8c2a73454688a674, core_ca.h
+ACTLR_L1PE_Pos, group__CMSIS__ACTLR__BITS.html#ga65c3c81261a2aa26022f6bb967c4e56b, core_ca.h
+ACTLR_L1RADIS_Msk, group__CMSIS__ACTLR__BITS.html#ga6aafd83ca6c02f705def8edc8c064c04, core_ca.h
+ACTLR_L1RADIS_Pos, group__CMSIS__ACTLR__BITS.html#gaf8b306b854ecd78110cf944d414644a1, core_ca.h
+ACTLR_L2RADIS_Msk, group__CMSIS__ACTLR__BITS.html#gad84b20f4f5d1979bb000a14a582cad12, core_ca.h
+ACTLR_L2RADIS_Pos, group__CMSIS__ACTLR__BITS.html#ga505f33bbe45bbcaa9fcb738cb30daf4e, core_ca.h
+ACTLR_PARITY_Msk, group__CMSIS__ACTLR__BITS.html#gadec8e5d68791dc4749bf3f075a3559fb, core_ca.h
+ACTLR_PARITY_Pos, group__CMSIS__ACTLR__BITS.html#ga8300a65b41aa3f5c69c7cc713c847749, core_ca.h
+ACTLR_RADIS_Msk, group__CMSIS__ACTLR__BITS.html#gac6aea849e5320c0e93321d5d8b0c117c, core_ca.h
+ACTLR_RADIS_Pos, group__CMSIS__ACTLR__BITS.html#gaf7a424f7f8c4f46592ce8f47f4bced44, core_ca.h
+ACTLR_RSDIS_Msk, group__CMSIS__ACTLR__BITS.html#ga8487babc3514e2bb8f3d524e5f80d95f, core_ca.h
+ACTLR_RSDIS_Pos, group__CMSIS__ACTLR__BITS.html#ga4412a55ce52db3c5a4f035fcd0e350c6, core_ca.h
+ACTLR_SMP_Msk, group__CMSIS__ACTLR__BITS.html#gac6dcc315f6c4527434b9b0e4106771d8, core_ca.h
+ACTLR_SMP_Pos, group__CMSIS__ACTLR__BITS.html#ga8cb19db067cca1e064189b27b1f1bcbf, core_ca.h
+ACTLR_Type, unionACTLR__Type.html, 
+ACTLR_WFLZM_Msk, group__CMSIS__ACTLR__BITS.html#gae5a89cb553773b10e86a9c826f11179f, core_ca.h
+ACTLR_WFLZM_Pos, group__CMSIS__ACTLR__BITS.html#ga104112fe1d88dde49635e9b0f9530306, core_ca.h
+ADDRESS_FILTER_END, structL2C__310__TypeDef.html#a956e7653f25ae52ac9534eb0e1d94c8c, L2C_310_TypeDef
+ADDRESS_FILTER_START, structL2C__310__TypeDef.html#ae3f752040cdfcabd337b3f0359216b11, L2C_310_TypeDef
+AEOIR, structGICInterface__Type.html#a89d5a920c2b91b4b7bd0312ba4c38a89, GICInterface_Type
+AFE, unionSCTLR__Type.html#ae5a729bf64a6de4cbfa42c1a7d254535, SCTLR_Type
+AHPPIR, structGICInterface__Type.html#a12f25dec95ab3dd13a477573fab4b9c8, GICInterface_Type
+AIAR, structGICInterface__Type.html#a849e9ead6e9ced78dc6f0ba9256dd5a6, GICInterface_Type
+AOW, unionACTLR__Type.html#a3f235030777fe4e20477063df416b515, ACTLR_Type
+APR, structGICInterface__Type.html#aebae4bdcd3930372d639b85c5c9301e8, GICInterface_Type
+ARMCA9.h, ARMCA9_8h.html, 
+ASEDIS, unionCPACR__Type.html#a792fabd71db2311eefbc9b896db37986, CPACR_Type
+AUX_CNT, structL2C__310__TypeDef.html#a4f7bc7277a5baa1d804913e41b8200be, L2C_310_TypeDef
+Auxiliary Control Register (ACTLR), group__CMSIS__ACTLR.html, 
+ACTLR Bits, group__CMSIS__ACTLR__BITS.html, 
+ACTLR Bits, group__CMSIS__DFSR__BITS.html, 
+b, unionSCTLR__Type.html#a805ee3324a333d7a77d9f0d8f0fac9a7, SCTLR_Type::B()
+BP, unionACTLR__Type.html#ac8ac735e3001442e581ae37e773b5929, ACTLR_Type
+BPR, structGICInterface__Type.html#a949317484547dc1db89c9f7ab40d1829, GICInterface_Type
+BTDIS, unionACTLR__Type.html#ad1a121373ae8df19f6d11bde3b3ba9c9, ACTLR_Type
+Basic CMSIS Example, using_CMSIS.html, using_pg
+C, unionSCTLR__Type.html#a122a4dde5ab1a27855ddad88bb3f9f78, SCTLR_Type::C()
+CACHE_ID, structL2C__310__TypeDef.html#a87833c2acdf685d6ad6d0811f45677d7, L2C_310_TypeDef
+CACHE_SYNC, structL2C__310__TypeDef.html#ab9b9d1842b5d9e828a6825533ab80c0f, L2C_310_TypeDef
+CACHE_TYPE, structL2C__310__TypeDef.html#af19e1fd8a729834557884232c9e50bd2, L2C_310_TypeDef
+CLCD_IRQn, ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8ae7da3d1e8aae439524761f44ddfe8e0c, ARMCA9.h
+CLEAN_INV_LINE_INDEX_WAY, structL2C__310__TypeDef.html#a2adcc6bff9e527be24076d197368a962, L2C_310_TypeDef
+CLEAN_INV_LINE_PA, structL2C__310__TypeDef.html#a61615f4a4ac97d5d278000a35100d795, L2C_310_TypeDef
+CLEAN_INV_WAY, structL2C__310__TypeDef.html#ae27fc13cf14eae85ad7ed2c86fd30f6c, L2C_310_TypeDef
+CLEAN_LINE_INDEX_WAY, structL2C__310__TypeDef.html#ac79d3397741a3ae8566c878b45d30970, L2C_310_TypeDef
+CLEAN_LINE_PA, structL2C__310__TypeDef.html#a400d9ededaf12a5193e01d7235f3d65d, L2C_310_TypeDef
+CLEAN_WAY, structL2C__310__TypeDef.html#a0e6d40fb25420d5cac5be15ad2662e2c, L2C_310_TypeDef
+CLRSPI_NSR, structGICDistributor__Type.html#a2f584d3fbeaa355faf234f2ee57d1168, GICDistributor_Type
+CLRSPI_SR, structGICDistributor__Type.html#ab487e4a8684b8a77357c6c20cf71dead, GICDistributor_Type
+CM, unionDFSR__Type.html#a38562a26cc210ea4c39c6b951c4a5b62, DFSR_Type
+cmsis_armcc.h, cmsis__armcc_8h.html, 
+cmsis_armcc.txt, cmsis__armcc_8txt.html, 
+Configuration Base Address Register (CBAR), group__CMSIS__CBAR.html, 
+CBAR Bits, group__CMSIS__CBAR__BITS.html, 
+Cache and branch predictor maintenance operations, group__CMSIS__CBPM.html, 
+Counter Frequency register (CNTFRQ), group__CMSIS__CNTFRQ.html, 
+Core Peripherals, group__CMSIS__Core__FunctionInterface.html, 
+Core Register Access, group__CMSIS__core__register.html, 
+cmsis_cp15.h, cmsis__cp15_8h.html, 
+Coprocessor Access Control Register (CPACR), group__CMSIS__CPACR.html, 
+CPACR Bits, group__CMSIS__CPACR__BITS.html, 
+CPACR CP field values, group__CMSIS__CPACR__CP.html, 
+Current Program Status Register (CPSR), group__CMSIS__CPSR.html, 
+CPSR Bits, group__CMSIS__CPSR__BITS.html, 
+CPSR M field values, group__CMSIS__CPSR__M.html, 
+CMSIS_DEPRECATED, cmsis__armcc_8h.html#acdc36c1b3d3e16c17a73889b7d06d0d2, cmsis_armcc.h
+CNTP_CTL_Type, unionCNTP__CTL__Type.html, 
+Compiler Control, group__comp__cntrl__gr.html, 
+CONTROL, structTimer__Type.html#a91845c88231f4f337be2810d73bc79e4, Timer_Type::CONTROL()
+core_ca.h, core__ca_8h.html, 
+core_ca.txt, core__ca_8txt.html, 
+COUNTER, structTimer__Type.html#ac933977724591e6ca87d91848fc7a6b6, Timer_Type
+CP0, unionCPACR__Type.html#a1a29bc40d708ac1a43153b11f60b8195, CPACR_Type
+CP1, unionCPACR__Type.html#acb2055cdbdf2a6c9b8279dc6f7cbc624, CPACR_Type
+CP10, unionCPACR__Type.html#a0275dc6b0eb9f906ebc5c6431b03dc4e, CPACR_Type
+CP11, unionCPACR__Type.html#ac54b8897f9358f37e0046b010c334e87, CPACR_Type
+CP12, unionCPACR__Type.html#a68d69635225dd479d3035cc51b4c40ce, CPACR_Type
+CP13, unionCPACR__Type.html#a45d9be266fc37a6ff9f31c2bef897f90, CPACR_Type
+CP15BEN, unionSCTLR__Type.html#a98b55213f3bf0a8bd4f1db90512238de, SCTLR_Type
+CP2, unionCPACR__Type.html#a2553fcdfd94ffc09407db9da9db9d586, CPACR_Type
+CP3, unionCPACR__Type.html#af245b8dabfea0bf7dc06f5d4de7bfa79, CPACR_Type
+CP4, unionCPACR__Type.html#a6424b7a81a440217aab8e51e4b623adb, CPACR_Type
+CP5, unionCPACR__Type.html#ad5c0b15cd6a01a6f1db398e020809573, CPACR_Type
+CP6, unionCPACR__Type.html#ad898cab7c89a07b80068d141ced869e3, CPACR_Type
+CP7, unionCPACR__Type.html#a12002991719fb1af7a5db9a73deb323d, CPACR_Type
+CP8, unionCPACR__Type.html#a5a6f694264518a813bdbc202ff47664f, CPACR_Type
+CP9, unionCPACR__Type.html#a4de69636eb450fcc3f5f3e4a19a869f5, CPACR_Type
+CPACR_ASEDIS_Msk, group__CMSIS__CPACR__BITS.html#ga46d28804bfa370b0dd4ac520a7a67609, core_ca.h
+CPACR_ASEDIS_Pos, group__CMSIS__CPACR__BITS.html#ga3acd342ab1e88bd4ad73f5670e7af163, core_ca.h
+CPACR_CP_FA, group__CMSIS__CPACR__CP.html#gaeaa29f06a74fadc7245d6bd183bad11b, core_ca.h
+CPACR_CP_Msk_, group__CMSIS__CPACR__BITS.html#ga7c87723442baa681a80de8f644eda1a2, core_ca.h
+CPACR_CP_NA, group__CMSIS__CPACR__CP.html#gabd03f590b34b809438eaa3df4af2e7db, core_ca.h
+CPACR_CP_PL1, group__CMSIS__CPACR__CP.html#ga8602342c0bad80f3a36d3bdee7418a46, core_ca.h
+CPACR_CP_Pos_, group__CMSIS__CPACR__BITS.html#ga77dc035e6d16dee8f5cf53b36b86cfaf, core_ca.h
+CPACR_D32DIS_Msk, group__CMSIS__CPACR__BITS.html#ga96266eb6bf35c3c3f22718bd06b12d79, core_ca.h
+CPACR_D32DIS_Pos, group__CMSIS__CPACR__BITS.html#ga6df0c4e805105285e63b0f0e992bd416, core_ca.h
+CPACR_TRCDIS_Msk, group__CMSIS__CPACR__BITS.html#gab5d6ec83339e755bd3e7eacb914edf37, core_ca.h
+CPACR_TRCDIS_Pos, group__CMSIS__CPACR__BITS.html#ga6866c97020fdba42f7c287433c58d77c, core_ca.h
+CPACR_Type, unionCPACR__Type.html, 
+CPENDSGIR, structGICDistributor__Type.html#a644a70cf4c12093c0277ce01f194b69b, GICDistributor_Type
+CPSR_A_Msk, group__CMSIS__CPSR__BITS.html#ga002803fa282333e0ead5c9b4cf748cb1, core_ca.h
+CPSR_A_Pos, group__CMSIS__CPSR__BITS.html#ga6f8aa35ca07825d6b4498ae6e2ab616b, core_ca.h
+CPSR_C_Msk, group__CMSIS__CPSR__BITS.html#ga3bc30b14b9b0bf113600eb882304244c, core_ca.h
+CPSR_C_Pos, group__CMSIS__CPSR__BITS.html#ga8565df3cf054dc09506e1c0ea4790131, core_ca.h
+CPSR_E_Msk, group__CMSIS__CPSR__BITS.html#ga6661712dd33a50ce4a42e13bf72aa35b, core_ca.h
+CPSR_E_Pos, group__CMSIS__CPSR__BITS.html#ga6a5e065d9ea93489105c3d62c1d3c08f, core_ca.h
+CPSR_F_Msk, group__CMSIS__CPSR__BITS.html#ga4df09481ffd9dfb17823a8e9895b1566, core_ca.h
+CPSR_F_Pos, group__CMSIS__CPSR__BITS.html#ga5e9868fdea8e65374b25ddd2fde1bf62, core_ca.h
+CPSR_GE_Msk, group__CMSIS__CPSR__BITS.html#ga9a3a6a87437892954cb37662ff27521a, core_ca.h
+CPSR_GE_Pos, group__CMSIS__CPSR__BITS.html#ga37aa76465f6c6055395790e74169d760, core_ca.h
+CPSR_I_Msk, group__CMSIS__CPSR__BITS.html#gad9abe93ba1179e254a70e325cb1a5834, core_ca.h
+CPSR_I_Pos, group__CMSIS__CPSR__BITS.html#gad1d9be2f731f5400fc87076ce3495e59, core_ca.h
+CPSR_IT0_Msk, group__CMSIS__CPSR__BITS.html#ga128366788d0f94d52fbe4610162c97e5, core_ca.h
+CPSR_IT0_Pos, group__CMSIS__CPSR__BITS.html#ga450f3fff0642431fd3478a04b70c3d87, core_ca.h
+CPSR_IT1_Msk, group__CMSIS__CPSR__BITS.html#ga791263c8a9707795b5824dae5485cd39, core_ca.h
+CPSR_IT1_Pos, group__CMSIS__CPSR__BITS.html#gaa2ab21d87052b439c06f058fb65036a5, core_ca.h
+CPSR_J_Msk, group__CMSIS__CPSR__BITS.html#ga6b52a05ec2e95ade71b65090f19285c2, core_ca.h
+CPSR_J_Pos, group__CMSIS__CPSR__BITS.html#ga6b49ddfb770143a51aa682b56be2e990, core_ca.h
+CPSR_M_ABT, group__CMSIS__CPSR__M.html#gac8c0a99a21ef256f5d3115595a845bfa, core_ca.h
+CPSR_M_FIQ, group__CMSIS__CPSR__M.html#ga868ef12e003f541f90a613ca7f6ada74, core_ca.h
+CPSR_M_HYP, group__CMSIS__CPSR__M.html#ga002c78f542ca5c5fdd02d2aeee9f6988, core_ca.h
+CPSR_M_IRQ, group__CMSIS__CPSR__M.html#gada3f31a773f7fc7bf6567d598cf3a1db, core_ca.h
+CPSR_M_MON, group__CMSIS__CPSR__M.html#ga69d734db93f67899b4bffcf62f80f098, core_ca.h
+CPSR_M_Msk, group__CMSIS__CPSR__BITS.html#gadce47959b814f70f802a139250daa04c, core_ca.h
+CPSR_M_Pos, group__CMSIS__CPSR__BITS.html#ga4e9e49c9a75cf3e7d696fc77de7d44d1, core_ca.h
+CPSR_M_SVC, group__CMSIS__CPSR__M.html#ga5afcb85bd2968acc2b09cb9d99c531ad, core_ca.h
+CPSR_M_SYS, group__CMSIS__CPSR__M.html#gaa0a3996ce096cd205bce34f90b10912c, core_ca.h
+CPSR_M_UND, group__CMSIS__CPSR__M.html#ga07d4f42d6971c2f0cc25872008ddf5ef, core_ca.h
+CPSR_M_USR, group__CMSIS__CPSR__M.html#gad716a0ee4dc815f0f01e1339d6511a4e, core_ca.h
+CPSR_N_Msk, group__CMSIS__CPSR__BITS.html#ga6c4a636a3b5ec71e0f2eb021ac353544, core_ca.h
+CPSR_N_Pos, group__CMSIS__CPSR__BITS.html#gaaedc00ebe496885524daac4190742f84, core_ca.h
+CPSR_Q_Msk, group__CMSIS__CPSR__BITS.html#gaba36b1ac0438594afdc6eef220d2e146, core_ca.h
+CPSR_Q_Pos, group__CMSIS__CPSR__BITS.html#ga84c8427c30fdce15f7191bd4f93d7ab7, core_ca.h
+CPSR_T_Msk, group__CMSIS__CPSR__BITS.html#ga23ed422711cbd2f9a5dcbe6c05b2a720, core_ca.h
+CPSR_T_Pos, group__CMSIS__CPSR__BITS.html#gaa1134ff3e774b1354a43227b798a707c, core_ca.h
+CPSR_Type, unionCPSR__Type.html, 
+CPSR_V_Msk, group__CMSIS__CPSR__BITS.html#ga9b9fe5c1da5e922cbff18215b70b4252, core_ca.h
+CPSR_V_Pos, group__CMSIS__CPSR__BITS.html#ga5685fa5745113b4ff61181ee439bc2a5, core_ca.h
+CPSR_Z_Msk, group__CMSIS__CPSR__BITS.html#gab091112988009fb8360b01c79d993f67, core_ca.h
+CPSR_Z_Pos, group__CMSIS__CPSR__BITS.html#ga18e9f21fcda9d385d23a4de0ef860cd4, core_ca.h
+CTLR, structGICInterface__Type.html#a5969edab40aa24e4d96e072af187a3a9, GICInterface_Type::CTLR()
+CMSIS-Core Device Templates, templates_pg.html, 
+Domain Access Control Register (DACR), group__CMSIS__DACR.html, 
+DACR Bits, group__CMSIS__DACR__BITS.html, 
+DACR Dn field values, group__CMSIS__DACR__Dn.html, 
+Data Fault Status Register (DFSR), group__CMSIS__DFSR.html, 
+D32DIS, unionCPACR__Type.html#a6206695a548b18ce0e2ea5276d1eef1d, CPACR_Type
+DACR_D_Msk_, group__CMSIS__DACR__BITS.html#ga41b90c8a7338fbe5e5b06be083ba22fe, core_ca.h
+DACR_D_Pos_, group__CMSIS__DACR__BITS.html#ga2c014e929b74e6ded5e89a74903ce975, core_ca.h
+DACR_Dn_CLIENT, group__CMSIS__DACR__Dn.html#gac76e6128758cd64a9fa92487ec49441b, core_ca.h
+DACR_Dn_MANAGER, group__CMSIS__DACR__Dn.html#gabbf27724d67055138bf7abdb651e9732, core_ca.h
+DACR_Dn_NOACCESS, group__CMSIS__DACR__Dn.html#ga281ebf97decb4ef4f7b1e5c4285c45ab, core_ca.h
+DATA_LOCK_0_WAY, structL2C__310__TypeDef.html#a2dbbc5c93d3ddffe2459c053d30ede2d, L2C_310_TypeDef
+DATA_LOCK_1_WAY, structL2C__310__TypeDef.html#a6288cc2774812105b52a22daedd0c39f, L2C_310_TypeDef
+DATA_LOCK_2_WAY, structL2C__310__TypeDef.html#acdbc2d1db5722edc69752fe78a5c477d, L2C_310_TypeDef
+DATA_LOCK_3_WAY, structL2C__310__TypeDef.html#a331d20510fc27cd593ddfedc88c75240, L2C_310_TypeDef
+DATA_LOCK_4_WAY, structL2C__310__TypeDef.html#aa0a0f2165e329d514cc91dbf84a44a76, L2C_310_TypeDef
+DATA_LOCK_5_WAY, structL2C__310__TypeDef.html#a6f777080cbf9426d8476d07f6e583d71, L2C_310_TypeDef
+DATA_LOCK_6_WAY, structL2C__310__TypeDef.html#ab81366685e54829cae7613f080d69f53, L2C_310_TypeDef
+DATA_LOCK_7_WAY, structL2C__310__TypeDef.html#aed70f16007d4e7d19818e0931581c5a5, L2C_310_TypeDef
+DBDI, unionACTLR__Type.html#a19e5f8f1a2ad8634619399b4eb50a449, ACTLR_Type
+DDI, unionACTLR__Type.html#ab938c32e10162d06ba6b02400e955e01, ACTLR_Type
+DDVM, unionACTLR__Type.html#a4fe04e95b26e089642bee6952f223f82, ACTLR_Type
+DEBUG_CONTROL, structL2C__310__TypeDef.html#a996a2a5c1f311a6f3555844adc28e7f4, L2C_310_TypeDef
+Default_Handler, startup__ARMCA9_8c.html#a4e0c522c1bb26af24accaf20e6b87d12, startup_ARMCA9.c
+Deprecated List, deprecated.html, 
+DESCRIPTOR_FAULT, group__MMU__defs__gr.html#gaba92665a24bc2ba8c49b9a0881c9df8a, core_ca.h
+DEVICE, core__ca_8h.html#ga83ac8de9263f89879079da521e86d5f2a28b8a7b4b6c2a98af7cf438255207174, core_ca.h
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-</table>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<div class="textblock"><dl class="section version"><dt>Version</dt><dd>V1.00 </dd></dl>
-<dl class="section date"><dt>Date</dt><dd>10. January 2018</dd></dl>
-<dl class="section note"><dt>Note</dt><dd></dd></dl>
-</div><h2 class="groupheader">Macro Definition Documentation</h2>
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-<div class="memproto">
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-</div><div class="memdoc">
-
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-<div class="memitem">
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-          <td class="memname">#define __FIQ_STACK_SIZE&#160;&#160;&#160;0x00000100</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-</div>
-</div>
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-<div class="memitem">
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-          <td class="memname">#define __HEAP_SIZE&#160;&#160;&#160;0x00008000</td>
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-
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index 1966f22..48cd0f3 100644
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     <li class="navelem"><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
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index 8fcf4fe..916995c 100644
--- a/docs/Core_A/html/mmu_c_pg.html
+++ b/docs/Core_A/html/mmu_c_pg.html
@@ -32,7 +32,7 @@
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@@ -115,8 +115,8 @@
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  * @brief    MMU Configuration
  *           Device &lt;DeviceAbbreviation&gt;
- * @version  V1.00
- * @date     10. January 2018
+ * @version  V1.1.0
+ * @date     23. November 2018
  ******************************************************************************/
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-  ; 1     - S       0x0 (Non-shared)
-  ; 0     - IRGN[1] 0x1 (Inner WB WA) */
-  __set_TTBR0(((uint32_t)&amp;Image$$TTB$$ZI$$Base) | 9U);
+  ; 6     - IRGN[0] 0x1  (Inner WB WA)
+  ; 5     - NOS     0x0  (Non-shared)
+  ; 4:3   - RGN     0x01 (Outer WB WA)
+  ; 2     - IMP     0x0  (Implementation Defined)
+  ; 1     - S       0x0  (Non-shared)
+  ; 0     - IRGN[1] 0x0  (Inner WB WA) */
+  __set_TTBR0(((uint32_t)&amp;Image$$TTB$$ZI$$Base) | 0x48);
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
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   <td style="padding-left: 0.5em;">
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+   &#160;<span id="projectnumber">Version 1.1.4</span>
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@@ -179,7 +179,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
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index 5b6beab..bf61339 100644
--- a/docs/Core_A/html/navtree.js
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 ];
 
 var SYNCONMSG = 'click to disable panel synchronisation';
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+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -200,7 +200,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/unionACTLR__Type.html b/docs/Core_A/html/unionACTLR__Type.html
index 51fec7a..ef4acd5 100644
--- a/docs/Core_A/html/unionACTLR__Type.html
+++ b/docs/Core_A/html/unionACTLR__Type.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -499,7 +499,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="unionACTLR__Type.html">ACTLR_Type</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/unionCNTP__CTL__Type.html b/docs/Core_A/html/unionCNTP__CTL__Type.html
index 481325a..5a7ba01 100644
--- a/docs/Core_A/html/unionCNTP__CTL__Type.html
+++ b/docs/Core_A/html/unionCNTP__CTL__Type.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -267,7 +267,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="unionCNTP__CTL__Type.html">CNTP_CTL_Type</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/unionCPACR__Type.html b/docs/Core_A/html/unionCPACR__Type.html
index 5d0196d..93cb99e 100644
--- a/docs/Core_A/html/unionCPACR__Type.html
+++ b/docs/Core_A/html/unionCPACR__Type.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -419,7 +419,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="unionCPACR__Type.html">CPACR_Type</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/unionCPSR__Type.html b/docs/Core_A/html/unionCPSR__Type.html
index b55576f..1545274 100644
--- a/docs/Core_A/html/unionCPSR__Type.html
+++ b/docs/Core_A/html/unionCPSR__Type.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -389,7 +389,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="unionCPSR__Type.html">CPSR_Type</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/unionDFSR__Type.html b/docs/Core_A/html/unionDFSR__Type.html
index 0012948..c8eed4a 100644
--- a/docs/Core_A/html/unionDFSR__Type.html
+++ b/docs/Core_A/html/unionDFSR__Type.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -312,7 +312,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="unionDFSR__Type.html">DFSR_Type</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/unionIFSR__Type.html b/docs/Core_A/html/unionIFSR__Type.html
index 93f7ee3..246eaad 100644
--- a/docs/Core_A/html/unionIFSR__Type.html
+++ b/docs/Core_A/html/unionIFSR__Type.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -261,7 +261,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="unionIFSR__Type.html">IFSR_Type</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/unionISR__Type.html b/docs/Core_A/html/unionISR__Type.html
index 9b2e319..322ea55 100644
--- a/docs/Core_A/html/unionISR__Type.html
+++ b/docs/Core_A/html/unionISR__Type.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -209,7 +209,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="unionISR__Type.html">ISR_Type</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/unionSCTLR__Type.html b/docs/Core_A/html/unionSCTLR__Type.html
index 38270e8..ce8ec9e 100644
--- a/docs/Core_A/html/unionSCTLR__Type.html
+++ b/docs/Core_A/html/unionSCTLR__Type.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -479,7 +479,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="unionSCTLR__Type.html">SCTLR_Type</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/using_ARM_pg.html b/docs/Core_A/html/using_ARM_pg.html
index 537ab72..1ce5b04 100644
--- a/docs/Core_A/html/using_ARM_pg.html
+++ b/docs/Core_A/html/using_ARM_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -122,13 +122,14 @@
 <tr>
 <td>".\Device\ARM\ARMCA9" </td><td>Cortex-A9 </td><td>Contains <b>Include</b> and <b>Source</b> template files configured for the Cortex-A9 processor. The device name is ARMCA9 and the name of the <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> is &lt;<a class="el" href="ARMCA9_8h.html">ARMCA9.h</a>&gt;.   </td></tr>
 </table>
+<dl class="section note"><dt>Note</dt><dd>CMSIS-Pack provides the <b>#define CMSIS_header_file</b> in <a href="../../Pack/html/pdsc_components_pg.html#RTE_Components_h"><b>RTE_Components.h</b></a> which gives you access to the <b><em>device</em>.h</b> file of a project. This allows you to generate generic software components that adjust to the device settings. </dd></dl>
 </div></div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="using_pg.html">Using CMSIS in Embedded Applications</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/using_CMSIS.html b/docs/Core_A/html/using_CMSIS.html
index 397e885..be5e946 100644
--- a/docs/Core_A/html/using_CMSIS.html
+++ b/docs/Core_A/html/using_CMSIS.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -167,13 +167,16 @@
 <div class="line">    Delay(500);</div>
 <div class="line">  }</div>
 <div class="line">}</div>
+</div><!-- fragment --><p>CMSIS-Pack provides the <b>#define CMSIS_header_file</b> in <a href="../../Pack/html/pdsc_components_pg.html#RTE_Components_h"><b>RTE_Components.h</b></a> which gives you access to the <b><em>device</em>.h</b> file of a project. This allows you to generate generic software components that use the device selected in a project.</p>
+<div class="fragment"><div class="line"><span class="preprocessor">#include &quot;RTE_Components.h&quot;</span>     <span class="comment">// include information about project configuration</span></div>
+<div class="line"><span class="preprocessor">#include CMSIS_device_header    // include &lt;device&gt;.h file</span></div>
 </div><!-- fragment --> </div></div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="using_pg.html">Using CMSIS in Embedded Applications</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Core_A/html/using_pg.html b/docs/Core_A/html/using_pg.html
index f406fef..3c7a7e6 100644
--- a/docs/Core_A/html/using_pg.html
+++ b/docs/Core_A/html/using_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-A)
-   &#160;<span id="projectnumber">Version 1.1.2</span>
+   &#160;<span id="projectnumber">Version 1.1.4</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
   </td>
@@ -124,7 +124,7 @@
 <ul>
 <li>set the vector base address register (<a class="el" href="group__CMSIS__VBAR.html#ga582f9a60f7b090ae5a4e8f60ef3b79f8">__set_VBAR</a>),</li>
 <li>set stacks for each exception mode (<a class="el" href="cmsis__armcc_8h.html#a306b0a932918f2243a40d4e855503be2">__set_mode</a>, <a class="el" href="group__CMSIS__SP.html#ga6af63cb939bd108aef1c0f12622350cb">__set_SP</a>),</li>
-<li>call <a class="el" href="system__ARMCA9_8h.html#a93f514700ccf00d08dbdcff7f1224eb2">SystemInit</a>.</li>
+<li>call <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2">SystemInit</a>.</li>
 </ul>
 <p>After the system initialization control is transferred to the C/C++ run-time library which performs initialization and calls the <b>main</b> function in the user code. In addition the <a class="el" href="startup_c_pg.html">Startup File startup_&lt;device&gt;.c</a> contains a weak default handler implementation for every exception. It may also contain stack and heap configurations for the user application.</p>
 <p>The <a class="el" href="system_c_pg.html">System Configuration Files system_&lt;device&gt;.c and system_&lt;device&gt;.h</a> performs the setup for the processor clock and the initialization of memory caches, memory management unit, generic interrupt interface and floating point unit. The variable <a class="el" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6">SystemCoreClock</a> indicates the CPU clock speed. <a class="el" href="group__system__init__gr.html">System and Clock Configuration</a> describes the minimum feature set. In addition the file may contain functions for the memory bus setup and clock re-configuration.</p>
@@ -136,6 +136,7 @@
 <li><a class="el" href="group__PL1__timer__functions.html">Generic</a> and <a class="el" href="group__PTM__timer__functions.html">Private</a> Timer functions to configure and start a periodic timer interrupt.</li>
 <li><a class="el" href="group__L1__cache__functions.html">Level 1</a> and <a class="el" href="group__L2__cache__functions.html">Level 2</a> Cache controller functions to enable, disable, clean and invalidate caches.</li>
 </ul>
+<p>CMSIS-Pack provides the <b>#define CMSIS_header_file</b> in <a href="../../Pack/html/pdsc_components_pg.html#RTE_Components_h"><b>RTE_Components.h</b></a> which gives you access to this <b><em>device</em>.h</b> file.</p>
 <div class="image">
 <img src="CMSIS_CORE_A_Files_user.png" alt="CMSIS_CORE_A_Files_user.png"/>
 <div class="caption">
@@ -153,7 +154,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:10 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:27 for CMSIS-Core (Cortex-A) Version 1.1.4 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/TraceManagement.png b/docs/DAP/html/TraceManagement.png
deleted file mode 100644
index 1a1207f..0000000
--- a/docs/DAP/html/TraceManagement.png
+++ /dev/null
Binary files differ
diff --git a/docs/DAP/html/cmsis.css b/docs/DAP/html/cmsis.css
index bba1010..586d4d2 100644
--- a/docs/DAP/html/cmsis.css
+++ b/docs/DAP/html/cmsis.css
@@ -1148,7 +1148,7 @@
 
 .image
 {
-        text-align: center;
+        text-align: left;
 }
 
 .dotgraph
diff --git a/docs/DAP/html/dap_revisionHistory.html b/docs/DAP/html/dap_revisionHistory.html
index fbd54f5..5ac09f7 100644
--- a/docs/DAP/html/dap_revisionHistory.html
+++ b/docs/DAP/html/dap_revisionHistory.html
@@ -136,7 +136,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/dir_337e536fb1c5b958880fe7603a37f369.html b/docs/DAP/html/dir_337e536fb1c5b958880fe7603a37f369.html
deleted file mode 100644
index f93b7e5..0000000
--- a/docs/DAP/html/dir_337e536fb1c5b958880fe7603a37f369.html
+++ /dev/null
@@ -1,135 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
-<meta http-equiv="X-UA-Compatible" content="IE=9"/>
-<title>Config Directory Reference</title>
-<title>CMSIS-DAP: Config Directory Reference</title>
-<link href="tabs.css" rel="stylesheet" type="text/css"/>
-<link href="cmsis.css" rel="stylesheet" type="text/css" />
-<script type="text/javascript" src="jquery.js"></script>
-<script type="text/javascript" src="dynsections.js"></script>
-<script type="text/javascript" src="printComponentTabs.js"></script>
-<link href="navtree.css" rel="stylesheet" type="text/css"/>
-<script type="text/javascript" src="resize.js"></script>
-<script type="text/javascript" src="navtree.js"></script>
-<script type="text/javascript">
-  $(document).ready(initResizable);
-  $(window).load(resizeHeight);
-</script>
-<link href="search/search.css" rel="stylesheet" type="text/css"/>
-<script type="text/javascript" src="search/search.js"></script>
-<script type="text/javascript">
-  $(document).ready(function() { searchBox.OnSelectItem(0); });
-</script>
-</head>
-<body>
-<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
-<div id="titlearea">
-<table cellspacing="0" cellpadding="0">
- <tbody>
- <tr style="height: 46px;">
-  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
-  <td style="padding-left: 0.5em;">
-   <div id="projectname">CMSIS-DAP
-   &#160;<span id="projectnumber">Version 1.1.0</span>
-   </div>
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__ConfigIO__gr.html b/docs/DAP/html/group__DAP__ConfigIO__gr.html
index 9799314..00f1c55 100644
--- a/docs/DAP/html/group__DAP__ConfigIO__gr.html
+++ b/docs/DAP/html/group__DAP__ConfigIO__gr.html
@@ -143,7 +143,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__ConfigMCU__gr.html b/docs/DAP/html/group__DAP__ConfigMCU__gr.html
index 49cf4e5..3ff7296 100644
--- a/docs/DAP/html/group__DAP__ConfigMCU__gr.html
+++ b/docs/DAP/html/group__DAP__ConfigMCU__gr.html
@@ -137,7 +137,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__ConfigUSB__gr.html b/docs/DAP/html/group__DAP__ConfigUSB__gr.html
index 7b986e4..7f1c14d 100644
--- a/docs/DAP/html/group__DAP__ConfigUSB__gr.html
+++ b/docs/DAP/html/group__DAP__ConfigUSB__gr.html
@@ -242,7 +242,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__Config__Debug__gr.html b/docs/DAP/html/group__DAP__Config__Debug__gr.html
index b99b33a..cd6c5df 100644
--- a/docs/DAP/html/group__DAP__Config__Debug__gr.html
+++ b/docs/DAP/html/group__DAP__Config__Debug__gr.html
@@ -513,7 +513,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__Config__Initialization__gr.html b/docs/DAP/html/group__DAP__Config__Initialization__gr.html
index e1eb631..d47fcdf 100644
--- a/docs/DAP/html/group__DAP__Config__Initialization__gr.html
+++ b/docs/DAP/html/group__DAP__Config__Initialization__gr.html
@@ -180,7 +180,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__Config__LEDs__gr.html b/docs/DAP/html/group__DAP__Config__LEDs__gr.html
index 100310b..6e31d0c 100644
--- a/docs/DAP/html/group__DAP__Config__LEDs__gr.html
+++ b/docs/DAP/html/group__DAP__Config__LEDs__gr.html
@@ -195,7 +195,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__Config__PortIO__gr.html b/docs/DAP/html/group__DAP__Config__PortIO__gr.html
index 7d337e2..43362e2 100644
--- a/docs/DAP/html/group__DAP__Config__PortIO__gr.html
+++ b/docs/DAP/html/group__DAP__Config__PortIO__gr.html
@@ -633,7 +633,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__Config__Timestamp__gr.html b/docs/DAP/html/group__DAP__Config__Timestamp__gr.html
index dad5788..9724049 100644
--- a/docs/DAP/html/group__DAP__Config__Timestamp__gr.html
+++ b/docs/DAP/html/group__DAP__Config__Timestamp__gr.html
@@ -151,7 +151,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__Config__gr.html b/docs/DAP/html/group__DAP__Config__gr.html
index c8af115..3cbaf02 100644
--- a/docs/DAP/html/group__DAP__Config__gr.html
+++ b/docs/DAP/html/group__DAP__Config__gr.html
@@ -182,7 +182,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__Connect.html b/docs/DAP/html/group__DAP__Connect.html
index c7a8548..68bfcb0 100644
--- a/docs/DAP/html/group__DAP__Connect.html
+++ b/docs/DAP/html/group__DAP__Connect.html
@@ -145,7 +145,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__Delay.html b/docs/DAP/html/group__DAP__Delay.html
index 0e9195e..7fa8147 100644
--- a/docs/DAP/html/group__DAP__Delay.html
+++ b/docs/DAP/html/group__DAP__Delay.html
@@ -135,7 +135,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__Disconnect.html b/docs/DAP/html/group__DAP__Disconnect.html
index 266fdf5..2e9d558 100644
--- a/docs/DAP/html/group__DAP__Disconnect.html
+++ b/docs/DAP/html/group__DAP__Disconnect.html
@@ -132,7 +132,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__ExecuteCommands__gr.html b/docs/DAP/html/group__DAP__ExecuteCommands__gr.html
index 702571b..ff4c315 100644
--- a/docs/DAP/html/group__DAP__ExecuteCommands__gr.html
+++ b/docs/DAP/html/group__DAP__ExecuteCommands__gr.html
@@ -149,7 +149,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__HostStatus.html b/docs/DAP/html/group__DAP__HostStatus.html
index 799987b..db89bfd 100644
--- a/docs/DAP/html/group__DAP__HostStatus.html
+++ b/docs/DAP/html/group__DAP__HostStatus.html
@@ -145,7 +145,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__Info.html b/docs/DAP/html/group__DAP__Info.html
index 6e47d5f..00e2996 100644
--- a/docs/DAP/html/group__DAP__Info.html
+++ b/docs/DAP/html/group__DAP__Info.html
@@ -198,7 +198,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__JTAG__Configure.html b/docs/DAP/html/group__DAP__JTAG__Configure.html
index bb2084b..7238139 100644
--- a/docs/DAP/html/group__DAP__JTAG__Configure.html
+++ b/docs/DAP/html/group__DAP__JTAG__Configure.html
@@ -136,7 +136,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__JTAG__Sequence.html b/docs/DAP/html/group__DAP__JTAG__Sequence.html
index dd799b8..5895179 100644
--- a/docs/DAP/html/group__DAP__JTAG__Sequence.html
+++ b/docs/DAP/html/group__DAP__JTAG__Sequence.html
@@ -151,7 +151,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__QueueCommands__gr.html b/docs/DAP/html/group__DAP__QueueCommands__gr.html
index c4e31d2..1121a4a 100644
--- a/docs/DAP/html/group__DAP__QueueCommands__gr.html
+++ b/docs/DAP/html/group__DAP__QueueCommands__gr.html
@@ -198,7 +198,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__ResetTarget.html b/docs/DAP/html/group__DAP__ResetTarget.html
index 4009a32..7453ea1 100644
--- a/docs/DAP/html/group__DAP__ResetTarget.html
+++ b/docs/DAP/html/group__DAP__ResetTarget.html
@@ -137,7 +137,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__Response__Status.html b/docs/DAP/html/group__DAP__Response__Status.html
index a97bc15..430234b 100644
--- a/docs/DAP/html/group__DAP__Response__Status.html
+++ b/docs/DAP/html/group__DAP__Response__Status.html
@@ -125,7 +125,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__SWD__Configure.html b/docs/DAP/html/group__DAP__SWD__Configure.html
index f91a439..7d53bdb 100644
--- a/docs/DAP/html/group__DAP__SWD__Configure.html
+++ b/docs/DAP/html/group__DAP__SWD__Configure.html
@@ -140,7 +140,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__SWD__Sequence.html b/docs/DAP/html/group__DAP__SWD__Sequence.html
index 6e2df91..4039cb0 100644
--- a/docs/DAP/html/group__DAP__SWD__Sequence.html
+++ b/docs/DAP/html/group__DAP__SWD__Sequence.html
@@ -160,7 +160,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__SWJ__Clock.html b/docs/DAP/html/group__DAP__SWJ__Clock.html
index 36a6dee..0a254ef 100644
--- a/docs/DAP/html/group__DAP__SWJ__Clock.html
+++ b/docs/DAP/html/group__DAP__SWJ__Clock.html
@@ -135,7 +135,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__SWJ__Pins.html b/docs/DAP/html/group__DAP__SWJ__Pins.html
index 3611a19..aa5135d 100644
--- a/docs/DAP/html/group__DAP__SWJ__Pins.html
+++ b/docs/DAP/html/group__DAP__SWJ__Pins.html
@@ -151,7 +151,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__SWJ__Sequence.html b/docs/DAP/html/group__DAP__SWJ__Sequence.html
index 0c76a51..8c23210 100644
--- a/docs/DAP/html/group__DAP__SWJ__Sequence.html
+++ b/docs/DAP/html/group__DAP__SWJ__Sequence.html
@@ -136,7 +136,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__SWO__Baudrate.html b/docs/DAP/html/group__DAP__SWO__Baudrate.html
index 0a316d1..1150a30 100644
--- a/docs/DAP/html/group__DAP__SWO__Baudrate.html
+++ b/docs/DAP/html/group__DAP__SWO__Baudrate.html
@@ -137,7 +137,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__SWO__Control.html b/docs/DAP/html/group__DAP__SWO__Control.html
index 8ca76f0..f8d4d32 100644
--- a/docs/DAP/html/group__DAP__SWO__Control.html
+++ b/docs/DAP/html/group__DAP__SWO__Control.html
@@ -141,7 +141,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DAP/html/group__DAP__SWO__Data.html b/docs/DAP/html/group__DAP__SWO__Data.html
index 3bada2b..8ca1da3 100644
--- a/docs/DAP/html/group__DAP__SWO__Data.html
+++ b/docs/DAP/html/group__DAP__SWO__Data.html
@@ -143,7 +143,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
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-<div class="title">DAP_TI_Capture<div class="ingroups"><a class="el" href="group__DAP__TestInput__gr.html">Test Input Commands</a></div></div>  </div>
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-<p>Control continuous data recording of Test Input channels.  
-<a href="#details">More...</a></p>
-<p>Control continuous data recording of Test Input channels. </p>
-<p>The <b>DAP_TI_Capture Command</b> controls the data recording of the various Test Input channels.</p>
-<p><b>DAP_TI_Capture Request:</b> </p>
-<div class="fragment"><div class="line">| BYTE | SHORT ******| SHORT ******| BYTE **| BYTE *****|</div>
-<div class="line">&gt; 0x1F | ChannelMask | ChannelDiff | Action | CapSelect |</div>
-<div class="line">|******|*************|*************|********|***********|</div>
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-<li><b>ChannelMask:</b> Bit mask that encodes the channels that should be recorded.</li>
-<li><b>ChannelDiff:</b> Bit mask that enables the channel to communicate data differences.<ul>
-<li><b>0x1</b> = Debug Unit may decide to send data differences.</li>
-<li><b>0x0</b> = Debug Unit will always send data values.</li>
-</ul>
-</li>
-<li><b>Action:</b> start or stop recording.<ul>
-<li><b>0x1</b> = start recording.</li>
-<li><b>0x0</b> = stop recording.</li>
-</ul>
-</li>
-<li><b>CapSelect:</b> select recording frequency for the data capturing (frequency is obtained via <a class="el" href="group__DAP__TI__Info.html">DAP_TI_Info</a> ID=0x02)</li>
-</ul>
-<p><b>DAP_TI_Capture Response:</b> </p>
-<div class="fragment"><div class="line">| BYTE | SHORT ******|</div>
-<div class="line">&lt; 0x1F | ChannelMask |</div>
-<div class="line">|******|*************|</div>
-</div><!-- fragment --><ul>
-<li><b>ChannelMask:</b> Bit mask of channels that are currently recorded. Depending on the capabilities of the Debug Unit, this might be less than the request channels. </li>
-</ul>
-</div><!-- contents -->
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-  <td style="padding-left: 0.5em;">
-   <div id="projectname">CMSIS-DAP
-   &#160;<span id="projectnumber">Version 1.2.0 (Proposal)</span>
-   </div>
-   <div id="projectbrief">Interface Firmware for CoreSight Debug Access Port</div>
-  </td>
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-<div class="title">DAP_TI_Info<div class="ingroups"><a class="el" href="group__DAP__TestInput__gr.html">Test Input Commands</a></div></div>  </div>
-</div><!--header-->
-<div class="contents">
-
-<p>Get information about Test Input channel parameters of the CMSIS-DAP Debug Unit.  
-<a href="#details">More...</a></p>
-<p>Get information about Test Input channel parameters of the CMSIS-DAP Debug Unit. </p>
-<p>The <b>DAP_TI_Info Command</b> provides information about additional Test Inputs that are possible to capture with the CMSIS-DAP Debug Unit.</p>
-<p><b>DAP_TI_Info Request:</b> </p>
-<div class="fragment"><div class="line">| BYTE | BYTE | BYTE ***|</div>
-<div class="line">&gt; 0x1D | ID   | Channel |</div>
-<div class="line">|******|******|*********|</div>
-</div><!-- fragment --><ul>
-<li><b>ID:</b> Request Identifier to obtain information in the Response:<ul>
-<li><b>0x00</b> = Get general Test Input channel parameters (<b>Channel</b> value not used).</li>
-<li><b>0x01</b> = Get parameters of a specific Test Input <b>Channel</b>.</li>
-<li><b>0x02</b> = Get possible data capturing frequencies.</li>
-</ul>
-</li>
-<li><b>Channel:</b> channel number.</li>
-</ul>
-<p><b>DAP_TI_Info Response for <b>ID=0x00</b>: Get general Test Input channel parameters</b> </p>
-<div class="fragment"><div class="line">| BYTE | BYTE ****|</div>
-<div class="line">&lt; 0x1D | Channels |</div>
-<div class="line">|******|**********|</div>
-</div><!-- fragment --><ul>
-<li><b>Channels:</b> number of channels available in the Debug Unit.</li>
-</ul>
-<p><b>DAP_TI_Info Response for <b>ID=0x01</b>: Get parameters of a specific Channel</b> </p>
-<div class="fragment"><div class="line">| BYTE | BYTE ***| BYTE ******| BYTE ***| LWORD ***| LWORD *****| BYTE ****| FLOAT *| FLOAT *|</div>
-<div class="line">&lt; 0x1D | Channel | Attributes | NumBits | IdString | UnitString | Compress | MinVal | MaxVal |</div>
-<div class="line">|******|*********|************|*********|**********|************|**********|++++++++|++++++++|</div>
-</div><!-- fragment --><ul>
-<li><b>Channel:</b> channel number that information belongs to.</li>
-<li><b>Attributes:</b> attributes of the data channel<ul>
-<li>Bit 0..1: DataSize: number of bytes recorded (0=BYTE, 1=SHORT, 2=WORD)</li>
-<li>Bit 2..3: NumRanges: channel data provides additional range bits (see below)</li>
-<li>Bit 4: DT_TimeStamp: 1= channel provides time stamp based on Test Domain Timer</li>
-</ul>
-</li>
-<li><b>NumBits:</b> resolution of the channel in bits</li>
-<li><b>IdString:</b> is a up to 8 character 8-bit US ASCII string that identifies the channel</li>
-<li><b>UnitString:</b> is a up to 8 character 8-bit US ASCII string that identifies the measurement unit of the channel (V, mA, kHz)</li>
-<li><b>Compress:</b> describes the difference communication that is optionally available (see below)</li>
-<li><b>MinVal:</b> minimum data value (= 0) represents the <b>MinVal</b>. Repeated for each range.</li>
-<li><b>MaxVal:</b> maximum data value result represents the <b>MaxVal</b>. Repeated for each range.</li>
-</ul>
-<dl class="section note"><dt>Note</dt><dd><b>NoRanges:</b> specifies if the channel data has data ranges; possible values are:<ul>
-<li>0 = 1 range (1 MinVal/MaxVal value pair in the response).</li>
-<li>1 = 2 ranges (2 MinVal/MaxVal value pairs are provided in the response)</li>
-<li>2 = 4 ranges (4 MinVal/MaxVal value pairs are provided in the response)</li>
-</ul>
-</dd>
-<dd>
-<b>Compress</b> specifies a method for data differences by this channel.<ul>
-<li>0 = no data differences can be communicated. Only <b>Contiguous Value Format</b> is transmitted in <a class="el" href="group__DAP__TI__TransferBlock.html">DAP_TI_TransferBlock</a> Response.</li>
-<li>1 = data differences are transmitted when a single bit is different.</li>
-<li>2 = new data are transmitted when a value has a significant difference. The least significant 3-bits are ignored. This is useful for A/D values.</li>
-<li>3 = new data are transmitted when a value has a significant dynamic difference. Only the uppermost 8-bits are considered. This is useful for dynamic A/D values such as the currency consumption of a device.</li>
-</ul>
-</dd>
-<dd>
-<b>Data Value Scaling</b>: the information <b>NoBits</b>, <b>MinVal</b>, <b>MaxVal</b> is used to convert the binary data value into a floating data value for displaying purposes. If both <b>MinVal</b> and <b>MinMax</b> are 0 no scaling formula is provided and raw data may be displayed instead. Scaling considers the <b>NoBits</b> value, for example at 12-bit resolution the maximum data value is 0x3FF.</dd>
-<dd>
-<b>Data Ranges</b>: the information <b>NoRanges</b>, <b>NoBits</b> allows scaled data value based on range information. The range information is provided in the upper data bits. For example a data channel with NoBits=12 and NRanges=2 provides in bit 0..11 the data value and in bit 12..13 the range value.</dd></dl>
-<p><b>Example 1</b>: parameters for a channel that supports voltage measurement </p>
-<div class="fragment"><div class="line">IdString = <span class="stringliteral">&#39;U0&#39;</span>            <span class="comment">// Voltage symbol for U0 input</span></div>
-<div class="line">UnitString = <span class="charliteral">&#39;V&#39;</span>;          <span class="comment">// ASCII character to denote voltage</span></div>
-<div class="line">NoBits = 10;               <span class="comment">// 10 bit A/D resolution</span></div>
-<div class="line">NoRanges = 0;              <span class="comment">// no ranges are supported</span></div>
-<div class="line">Compress = 2;              <span class="comment">// data differences may be communicated</span></div>
-<div class="line">MinVal = 2.5;              <span class="comment">// A/D result = 0x000 represents 2.5V</span></div>
-<div class="line">MaxVal = 6.0;              <span class="comment">// A/D result = 0x3FF represents 6.0V</span></div>
-</div><!-- fragment --><p><b>Example 2</b>: parameters for a channel that supports current measurement with two ranges </p>
-<div class="fragment"><div class="line">IdString = <span class="charliteral">&#39;I&#39;</span>;            <span class="comment">// Current symbol for I input</span></div>
-<div class="line">UnitString = <span class="stringliteral">&#39;mA&#39;</span>;         <span class="comment">// ASCII character to denote milli Ampere</span></div>
-<div class="line">NoBits = 12;               <span class="comment">// 12 bit A/D resolution (bit 0 .. 11 of data values contain A/D result)</span></div>
-<div class="line">NoRanges = 1;              <span class="comment">// 2 ranges are supported (bit 12 of data values contains range)</span></div>
-<div class="line">Compress = 3;              <span class="comment">// dynamic data differences may be communicated</span></div>
-<div class="line">MinVal[0] = 0;             <span class="comment">// A/D result = 0x000 in range 0 represents 0.0mA</span></div>
-<div class="line">MaxVal[0] = 1.0;           <span class="comment">// A/D result = 0xFFF in range 0 represents 1.0mA</span></div>
-<div class="line">MinVal[1] = 4.0;           <span class="comment">// A/D result = 0x000 in range 0 represents 4.0mA</span></div>
-<div class="line">MaxVal[1] = 20.0;          <span class="comment">// A/D result = 0xFFF in range 0 represents 20.0mA</span></div>
-</div><!-- fragment --><p>For a channel that reports <b>MinVal = MaxVal = 0</b> the formula needs to be provided by the debugger as the debug unit is using perhaps an external shunt resistor.</p>
-<p><b>DAP_TI_Info Response for <b>ID=0x02</b>: Get possible data capturing frequencies for recording of a specific channel</b> </p>
-<div class="fragment"><div class="line">| BYTE | BYTE ***| BYTE ********|DWORD ++++|</div>
-<div class="line">&lt; 0x1D | Channel | NoSelections |Frequency |</div>
-<div class="line">|******|*********|**************|++++++++++| </div>
-</div><!-- fragment --><ul>
-<li><b>Channel:</b> channel number that information belongs to.<ul>
-<li>Channel = 0..0xF: information of the selected channel</li>
-<li>Channel = 0xFF: information for common channel data capturing</li>
-</ul>
-</li>
-<li><b>NoSelections:</b> number of possible capture frequencies<ul>
-<li>NoSelections = 0: channel does not support data recording</li>
-<li>NoSelections = 1..15: channel allows selection of individual data capture frequencies.</li>
-<li>NoSelections = 0xFF: channel allows selection of a common data capture frequency.</li>
-</ul>
-</li>
-<li><b>Frequency:</b> capture frequencies (repeated as indicated by NoSelection = 1..15)<ul>
-<li>Frequency[0] capture frequency for CapSelect=0 (see DAP_TI_Capture)</li>
-<li>Frequency[1] capture frequency for CapSelect=1 (see DAP_TI_Capture)</li>
-<li>Frequency[n] capture frequency for CapSelect=n (see DAP_TI_Capture) </li>
-</ul>
-</li>
-</ul>
-</div><!-- contents -->
-</div><!-- doc-content -->
-<!-- start footer part -->
-<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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-    <li class="footer">Generated on Thu Nov 16 2017 17:06:00 for CMSIS-DAP by ARM Ltd. All rights reserved.
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-   &#160;<span id="projectnumber">Version 1.2.0 (Proposal)</span>
-   </div>
-   <div id="projectbrief">Interface Firmware for CoreSight Debug Access Port</div>
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-<div class="title">DAP_TI_TransferBlock<div class="ingroups"><a class="el" href="group__DAP__TestInput__gr.html">Test Input Commands</a></div></div>  </div>
-</div><!--header-->
-<div class="contents">
-
-<p>Transfer the data that are recorded for various Test Input channels.  
-<a href="#details">More...</a></p>
-<p>Transfer the data that are recorded for various Test Input channels. </p>
-<p>The <b>DAP_TI_TransferBlock Command</b> initiates the data transfer of a single trace data block of the recorded trace data. The command delivers the content of one trace data block in the Trace Data Management system.</p>
-<p><b>DAP_TI_TransferBlock Request:</b> </p>
-<div class="fragment"><div class="line">| BYTE | BYTE *******|</div>
-<div class="line">&gt; 0x20 | DataRequest |</div>
-<div class="line">|******|*************|</div>
-</div><!-- fragment --><ul>
-<li><b>DataRequest:</b> specifies the requested data from the Trace Data Management system.<ul>
-<li><b>bit 0</b>: 1 = deliver one trace data block from any full trace data block (this includes SWO).</li>
-<li><b>bit 1</b>: 1 = deliver one trace data block from SWO channel (even when partially filled).</li>
-<li><b>bit 2</b>: 1 = deliver one trace data block from any partially filled trace data block (this includes SWO).</li>
-</ul>
-</li>
-</ul>
-<p><b>DAP_TI_TransferBlock Response:</b> </p>
-<div class="fragment"><div class="line">| BYTE | BYTE ***| SHORT ****| WORD ********|+++++++++++++|</div>
-<div class="line">&lt; 0x20 | Channel | DataParms | TD_TimeStamp | ChannelData |</div>
-<div class="line">|******|*********|<span class="comment">///////////|//////////////|+++++++++++++|</span></div>
-</div><!-- fragment --><ul>
-<li><b>Channel:</b> <ul>
-<li><b>bit 0..3</b>: number of the channel that the data belong to.</li>
-<li><b>bit 4</b>: SWO record indicator: 1 = data belong to SWO data recording.</li>
-<li><b>bit 6</b>: First record indicator: 1 = DataParms and TimeStamp is transferred. 0 = Only ChannelData.</li>
-<li><b>bit 7</b>: No data indicator: 1 = No ChannelData available for this request. 0 = ChannelData are available.</li>
-</ul>
-</li>
-<li><b>DataParms:</b> parameters for ChannelData.<ul>
-<li><b>bit 0..12</b>: number of data values in <b>ChannelData</b>. <a class="el" href="group__DAP__TI__TransferBlock.html">DAP_TI_TransferBlock</a> Response is repeated until all values are transmitted.</li>
-<li><b>bit 14</b>: 1 = difference value format. 0 = contiguous value format.</li>
-<li><b>bit 15</b>: 1 = Trace Data Management overflow since last <a class="el" href="group__DAP__TI__TransferBlock.html">DAP_TI_TransferBlock</a> Request. 0 = no overflow.</li>
-</ul>
-</li>
-<li><b>TD_TimeStamp:</b> Test Domain Timer value at the read time of data values for ChannelData.</li>
-<li><b>ChannelData:</b> data values from the recorded Test Input channel.</li>
-</ul>
-<p>The <b>ChannelData</b> reply has depending on <b>DataParms bit 14</b> two different formats. If <b>ChannelDiff</b> in <b>DAP_TI_Capture Request</b> is set for the specific channel, the Debug Unit may decide the data format depending on the trace data values.</p>
-<p><b>Contiguous Value Format</b> transmits sequentially all data values stored in the trace data buffer. When <b>DataParms bit 14 = 0 </b> the <b>ChannelData</b> has the following format: </p>
-<div class="fragment"><div class="line">|************|************|************|......</div>
-<div class="line">| TraceValue | TraceValue | TraceValue |</div>
-<div class="line">|************|************|************|......</div>
-</div><!-- fragment --><p>The size of <b>TraceValue</b> depends on the data size for the channel (see <a class="el" href="group__DAP__TI__Info.html">DAP_TI_Info</a> Response, Attributes bit 0..2). <a class="el" href="group__DAP__TI__TransferBlock.html">DAP_TI_TransferBlock</a> Response is repeated until the number of <b>TraceValues</b> specified by <b>DataParms bit 0 .. 12</b> is transmitted.</p>
-<p><b>Difference Value Format</b> transmits data values only when there is a significant difference. When <b>DataParms bit 14 = 1 </b> the <b>ChannelData</b> has the following format: </p>
-<div class="fragment"><div class="line">|*************| SHORT *****|*************|......</div>
-<div class="line">| TraceValue0 | ValueIndex | TraceValueI |</div>
-<div class="line">|*************|<span class="comment">////////////|/////////////|......</span></div>
-</div><!-- fragment --><ul>
-<li><b>TraceValue0:</b> is the first data value on the trace data buffer</li>
-<li><b>ValueIndex:</b> information about the next data value in TraceValueI.<ul>
-<li><b>bit 0..12</b>: <b>index</b> in trace data buffer of next data value with significant difference.</li>
-<li><b>bit 15</b>: 1 = last trace value of trace data buffer send by <a class="el" href="group__DAP__TI__TransferBlock.html">DAP_TI_TransferBlock</a> Response.</li>
-</ul>
-</li>
-<li><b>TraceValueI:</b> is the trace data value in in trace data buffer referenced by <b>index</b>.</li>
-</ul>
-<p>The size of <b>TraceValue0</b> and <b>TraceValueI</b> depends on the data size for the channel (see <a class="el" href="group__DAP__TI__Info.html">DAP_TI_Info</a> Response, Attributes bit 0..2). <a class="el" href="group__DAP__TI__TransferBlock.html">DAP_TI_TransferBlock</a> Response is repeated until <b>ValueIndex</b> with <b>bit 15 = 1</b> is transmitted.</p>
-<dl class="section note"><dt>Note</dt><dd>When all data values in the trace buffer are identical, <b>ValueIndex</b> is set to number of data values with bit 15 set to 1. </dd></dl>
-</div><!-- contents -->
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diff --git a/docs/DAP/html/group__DAP__TI__Value.html b/docs/DAP/html/group__DAP__TI__Value.html
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+++ /dev/null
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-   </div>
-   <div id="projectbrief">Interface Firmware for CoreSight Debug Access Port</div>
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-<div class="title">DAP_TI_Value<div class="ingroups"><a class="el" href="group__DAP__TestInput__gr.html">Test Input Commands</a></div></div>  </div>
-</div><!--header-->
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-
-<p>Get live data values from Test Input channels.  
-<a href="#details">More...</a></p>
-<p>Get live data values from Test Input channels. </p>
-<p>The <b>DAP_TI_Value Command</b> returns the live (current) values of the Test Inputs in the CMSIS-DAP Debug Unit. Returned are live data that are currently available in the Test Inputs channels.</p>
-<p><b>DAP_TI_Value Request:</b> </p>
-<div class="fragment"><div class="line">| BYTE | SHORT ******| BYTE ***********|</div>
-<div class="line">&gt; 0x1E | ChannelMask | DT_Time_Request |</div>
-<div class="line">|******|*************|*****************|</div>
-</div><!-- fragment --><ul>
-<li><b>ChannelMask:</b> Bit mask that encodes the channels that should be scanned.</li>
-<li><b>Time_Request:</b> <ul>
-<li>0: No Time Stamp in response.</li>
-<li>1: Include Time Stamp in response.</li>
-</ul>
-</li>
-</ul>
-<p><b>DAP_TI_Value Response:</b> </p>
-<div class="fragment"><div class="line">| BYTE | SHORT ******| WORD ++++++++|++++++++++++|</div>
-<div class="line">&lt; 0x1E | ChannelMask | TD_TimeStamp | DataValues |</div>
-<div class="line">|******|*************|++++++++++++++|++++++++++++|</div>
-</div><!-- fragment --><ul>
-<li><b>ChannelMask:</b> Bit mask of channels that are actually scanned. Depending on the capabilities of the Debug Unit, this might be less than the request channels.</li>
-<li><b>TD_TimeStamp</b>: Test Domain Timer value at the beginning the the request (only present if <b>DT_Time_Request</b> is set to 1).</li>
-<li><b>DataValues:</b> data values of the various Test Inputs (starting with channel=0). The size of <b>DataValues</b> depends on the data size (see <a class="el" href="group__DAP__TI__Info.html">DAP_TI_Info</a> Response, Attributes bit 0..2) In case of SHORT or WORD data format, the LSB is send first. </li>
-</ul>
-</div><!-- contents -->
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-   &#160;<span id="projectnumber">Version 1.2.0 (Proposal)</span>
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-
-<p>Management commands for optional Test Inputs.  
-<a href="#details">More...</a></p>
-<table class="memberdecls">
-<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="groups"></a>
-Content</h2></td></tr>
-<tr class="memitem:group__DAP__TI__Info"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DAP__TI__Info.html">DAP_TI_Info</a></td></tr>
-<tr class="memdesc:group__DAP__TI__Info"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get information about Test Input channel parameters of the CMSIS-DAP Debug Unit. <br/></td></tr>
-<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:group__DAP__TI__Value"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DAP__TI__Value.html">DAP_TI_Value</a></td></tr>
-<tr class="memdesc:group__DAP__TI__Value"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get live data values from Test Input channels. <br/></td></tr>
-<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:group__DAP__TI__Capture"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DAP__TI__Capture.html">DAP_TI_Capture</a></td></tr>
-<tr class="memdesc:group__DAP__TI__Capture"><td class="mdescLeft">&#160;</td><td class="mdescRight">Control continuous data recording of Test Input channels. <br/></td></tr>
-<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:group__DAP__TI__TransferBlock"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DAP__TI__TransferBlock.html">DAP_TI_TransferBlock</a></td></tr>
-<tr class="memdesc:group__DAP__TI__TransferBlock"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transfer the data that are recorded for various Test Input channels. <br/></td></tr>
-<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Management commands for optional Test Inputs. </p>
-<p>CMSIS-DAP provides a command set that allows to implement an optional Test Input (TI) management in the <b>Debug Unit</b>. Recording of up to 16 different Test Inputs is possible. Test Input values can be recorded as BYTE, SHORT, or WORD. The <b>Debug Unit</b> may include scaling parameters and dynamic ranges for a channel (for example a 14-bit value with a 2-bit range selection).</p>
-<p>Test Inputs could be used for various scenarios, for example:</p>
-<ul>
-<li>capture power measurement from A/D converters.</li>
-<li>capture wait states or cache misses from a memory system.</li>
-<li>capture data transfer parameters of an RF interface.</li>
-<li>test input pins of a Debug Unit.</li>
-</ul>
-<p>These Test Inputs can be recorded continuously with a specified trace recording frequency. The recording allows you to correlate the Test Input information with program execution. For recording of the CMSIS-DAP Firmware includes an optional Trace Data Management based on configurable memory blocks. This Trace Data Management also captures SWO trace information.</p>
-<dl class="section note"><dt>Note</dt><dd>The <a class="el" href="group__DAP__TestInput__gr.html">Test Input Commands</a> are only available when <a class="el" href="group__DAP__Info.html">DAP_Info</a> with ID=0xF0 (Capabilities) returns in <b>Info</b> - Bit 6: <b>1 = Trace Data Management</b>.</dd></dl>
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-Trace Data Management</div></div>
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@@ -121,7 +121,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:11 for CMSIS-DAP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:28 for CMSIS-DAP Version 2.0.0 by Arm Ltd. All rights reserved.
 	<!--
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index 1746d13..e01a39c 100644
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@@ -151,7 +145,7 @@
 
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@@ -224,6 +218,10 @@
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+span.SRScope {
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+   background-repeat: repeat-x;
+   text-shadow: 0 1px 1px #000000;
+}
+
+.pages {
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+    margin-left: 4px;
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+#searchresults {
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diff --git a/docs/DSP/html/BasicMathFunctions_8c.html b/docs/DSP/html/BasicMathFunctions_8c.html
new file mode 100644
index 0000000..4bd12fe
--- /dev/null
+++ b/docs/DSP/html/BasicMathFunctions_8c.html
@@ -0,0 +1,129 @@
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+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>BasicMathFunctions.c File Reference</title>
+<title>CMSIS-DSP: BasicMathFunctions.c File Reference</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
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+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
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+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-DSP
+   &#160;<span id="projectnumber">Version 1.7.0</span>
+   </div>
+   <div id="projectbrief">CMSIS DSP Software Library</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
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+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li><a href="modules.html"><span>Reference</span></a></li>
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+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
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+        name="MSearchResults" id="MSearchResults">
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+<div class="header">
+  <div class="headertitle">
+<div class="title">BasicMathFunctions.c File Reference</div>  </div>
+</div><!--header-->
+<div class="contents">
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="BasicMathFunctions_8c.html">BasicMathFunctions.c</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
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+</body>
+</html>
diff --git a/docs/DSP/html/ChangeLog_pg.html b/docs/DSP/html/ChangeLog_pg.html
index ed53d4f..a4b28b5 100644
--- a/docs/DSP/html/ChangeLog_pg.html
+++ b/docs/DSP/html/ChangeLog_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
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    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -115,6 +115,77 @@
 <tr>
 <th>Version </th><th>Description  </th></tr>
 <tr>
+<td>V1.7.0 </td><td><p class="starttd">New Neon implementations of f32 functions</p>
+<ul>
+<li>Can be enabled with macros ARM_MATH_NEON and ARM_MATH_NEON_EXPERIMENTAL</li>
+</ul>
+<p>Python wrapper compatible with Numpy</p>
+<ul>
+<li>DSP/PythonWrapper/README.md is explaining how to build the wrapper</li>
+</ul>
+<p>Preliminary cmake build</p>
+<ul>
+<li>DSP/README.md is explaining how to use it. This first version is restricted to AC6 toolchain and assume (hard coded path) that ArmDS is used. Future versions will make it easier to switch toolchains.</li>
+</ul>
+<p>Modified <a class="el" href="arm__math_8h.html">arm_math.h</a></p>
+<ul>
+<li>Removed dependance on cores. It is no more testing for some specific cores but is now using features like ARM_MATH_LOOPUNROLL (see comments in <a class="el" href="arm__math_8h.html">arm_math.h</a>)</li>
+<li>Deprecated __SIMD32 and introduced new functions for SIMD accesses.</li>
+</ul>
+<p>Added compilation flags for FFT:</p>
+<ul>
+<li>It is now possible to include only the tables required for FFTs. It is explained in DSP/README.md since it is simpler to use it from the cmake (which is defining the right macros). But the macros can also be defined without cmake.</li>
+</ul>
+<p class="endtd"></p>
+</td></tr>
+<tr>
+<td>V1.6.0 </td><td><p class="starttd">Reworked DSP library source files</p>
+<ul>
+<li>added macro ARM_MATH_LOOPUNROLL</li>
+<li>removed macro UNALIGNED_SUPPORT_DISABLE</li>
+<li>added const-correctness</li>
+<li>replaced SIMD pointer construct with memcopy solution</li>
+<li>replaced macro combination "CMSIS_INLINE __STATIC_INLINE with "__STATIC_FORCEINLINE"</li>
+</ul>
+<p>Reworked DSP library documentation</p>
+<p>Changed DSP folder structure</p>
+<ul>
+<li>moved DSP libraries to ./DSP/Lib</li>
+</ul>
+<p>ARM DSP Libraries are built with ARMCLANG</p>
+<p class="endtd">Added DSP Libraries source variant   </p>
+</td></tr>
+<tr>
+<td>V1.5.4 </td><td><p class="starttd">Updated IAR projects</p>
+<p class="endtd">Note: binaries NOT rebuild!   </p>
+</td></tr>
+<tr>
+<td>V1.5.3 </td><td><p class="starttd">Note: binaries NOT rebuild!</p>
+<p>Merged PullRequests</p>
+<ul>
+<li>#439, #430, #369, #265, #166</li>
+</ul>
+<p>Modified <a class="el" href="arm__math_8h.html">arm_math.h</a></p>
+<ul>
+<li>reworked macros ARM_MATH_CMx</li>
+<li>removed macros __FPU_USED, __DSP_PRESENT</li>
+<li>used different include files</li>
+</ul>
+<p class="endtd">Modified source files (because of new <a class="el" href="arm__math_8h.html">arm_math.h</a>)</p>
+<ul>
+<li><a class="el" href="arm__biquad__cascade__df2T__f32_8c.html">FilteringFunctions\arm_biquad_cascade_df2T_f32.c</a></li>
+<li><a class="el" href="arm__biquad__cascade__df2T__f64_8c.html">FilteringFunctions\arm_biquad_cascade_df2T_f64.c</a></li>
+<li><a class="el" href="arm__biquad__cascade__stereo__df2T__f32_8c.html">FilteringFunctions\arm_biquad_cascade_stereo_df2T_f32.c</a></li>
+<li><a class="el" href="arm__conv__partial__q15_8c.html">FilteringFunctions\arm_conv_partial_q15.c</a></li>
+<li><a class="el" href="arm__correlate__q15_8c.html">FilteringFunctions\arm_correlate_q15.c</a></li>
+<li><a class="el" href="arm__fir__f32_8c.html">FilteringFunctions\arm_fir_f32.c</a></li>
+<li><a class="el" href="arm__mat__scale__q31_8c.html">MatrixFunctions\arm_mat_scale_q31.c</a></li>
+<li><a class="el" href="arm__rms__q31_8c.html">StatisticsFunctions\arm_rms_q31.c</a></li>
+<li>TransformFunctions\arm_bitreversal2.S</li>
+<li><a class="el" href="arm__cfft__radix4__q31_8c.html">TransformFunctions\arm_cfft_radix4_q31.c</a> Reworked DSP_Lib_TestSuite   </li>
+</ul>
+</td></tr>
+<tr>
 <td>V1.5.2 </td><td>Modified <a class="el" href="arm__math_8h.html">arm_math.h</a><ul>
 <li>fixed GNU Compiler specific diagnostics.</li>
 <li>moved __SSAT and __USAT to CMSIS-Core   </li>
@@ -142,7 +213,7 @@
 </ul>
 <p class="endtd">Modified <a class="el" href="arm__var__f32_8c.html">arm_var_f32.c</a></p>
 <ul>
-<li>improved numerical stability for <a class="el" href="group__variance.html#ga393f26c5a3bfa05624fb8d32232a6d96">arm_var_f32()</a>.   </li>
+<li>improved numerical stability for <a class="el" href="group__variance.html#gaae455544f0c8ac92469a1e25d3906515">arm_var_f32()</a>.   </li>
 </ul>
 </td></tr>
 <tr>
@@ -152,15 +223,15 @@
 </ul>
 <p>Modified <a class="el" href="arm__conv__partial__q15_8c.html">arm_conv_partial_q15.c</a></p>
 <ul>
-<li>corrected <a class="el" href="group__PartialConv.html#ga209a2a913a0c5e5679c5988da8f46b03">arm_conv_partial_q15()</a> for Cortex-M7 based cores.</li>
+<li>corrected <a class="el" href="group__PartialConv.html#ga09b1f207980df75c2dcf01b1d3c2006f">arm_conv_partial_q15()</a> for Cortex-M7 based cores.</li>
 </ul>
 <p>Modified <a class="el" href="arm__conv__q15_8c.html">arm_conv_q15.c</a></p>
 <ul>
-<li>corrected <a class="el" href="group__Conv.html#gaccd6a89b0ff7a94df64610598e6e6893">arm_conv_q15()</a> for Cortex-M7 based cores.</li>
+<li>corrected <a class="el" href="group__Conv.html#ga372d3fd79b107dc6b12163a00c22da18">arm_conv_q15()</a> for Cortex-M7 based cores.</li>
 </ul>
 <p class="endtd">Modified <a class="el" href="arm__correlate__q15_8c.html">arm_correlate_q15.c</a></p>
 <ul>
-<li>corrected <a class="el" href="group__Corr.html#ga5ec96b8e420d68b0e626df0812274d46">arm_correlate_q15()</a> for Cortex-M7 based cores.   </li>
+<li>corrected <a class="el" href="group__Corr.html#ga8fc4e632ab08b28435ff62e7eb65f508">arm_correlate_q15()</a> for Cortex-M7 based cores.   </li>
 </ul>
 </td></tr>
 <tr>
@@ -190,7 +261,7 @@
 </td></tr>
 <tr>
 <td>V1.4.6 (no source code change [still labeled 1.4.5]) 2015/08/26 </td><td>Modified <a class="el" href="arm__math_8h.html">arm_math.h</a><ul>
-<li>Updated function <a class="el" href="group__SQRT.html#ga697d82c2747a3302cf44e7c9583da2e8">arm_sqrt_f32</a> for use with IAR.   </li>
+<li>Updated function <a class="el" href="group__SQRT.html#ga5f37f479666ee8ff9711b334286c60ed">arm_sqrt_f32</a> for use with IAR.   </li>
 </ul>
 </td></tr>
 <tr>
@@ -420,7 +491,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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     <a href="http://www.doxygen.org/index.html">
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+<div class="title">CMakeLists.txt File Reference</div>  </div>
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+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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@@ -0,0 +1,172 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-DSP
+   &#160;<span id="projectnumber">Version 1.7.0</span>
+   </div>
+   <div id="projectbrief">CMSIS DSP Software Library</div>
+  </td>
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+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
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+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
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+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="summary">
+<a href="#func-members">Functions</a>  </div>
+  <div class="headertitle">
+<div class="title">CMakeLists.txt File Reference</div>  </div>
+</div><!--header-->
+<div class="contents">
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
+Functions</h2></td></tr>
+<tr class="memitem:a881c069b0c3dd34941126127656e23a1"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Source_2CMakeLists_8txt.html#a881c069b0c3dd34941126127656e23a1">cmake_minimum_required</a> (VERSION 3.6) project(CMSISDSP) list(APPEND CMAKE_MODULE_PATH $</td></tr>
+<tr class="separator:a881c069b0c3dd34941126127656e23a1"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a5790cdedec7ad588e338cab656748165"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Source_2CMakeLists_8txt.html#a5790cdedec7ad588e338cab656748165">option</a> (BASICMATH&quot;Basic Math Functions&quot;ON) option(COMPLEXMATH&quot;Complex Math Functions&quot;ON) option(CONTROLLER&quot;Controller Functions&quot;ON) option(FASTMATH&quot;Fast Math Functions&quot;ON) option(FILTERING&quot;Filtering Functions&quot;ON) option(MATRIX&quot;Matrix Functions&quot;ON) option(STATISTICS&quot;Statistics Functions&quot;ON) option(SUPPORT&quot;Support Functions&quot;ON) option(TRANSFORM&quot;Transform Functions&quot;ON) option(CONFIGTABLE&quot;Configuration of table allowed&quot;OFF) option(ALLFAST&quot;All interpolation tables included&quot;OFF) option(ALLFFT&quot;All fft tables included&quot;OFF) option(ARM_COS_F32&quot;cos f32&quot;OFF) option(ARM_COS_Q31&quot;cos q31&quot;OFF) option(ARM_COS_Q15&quot;cos q15&quot;OFF) option(ARM_SIN_F32&quot;sin f32&quot;OFF) option(ARM_SIN_Q31&quot;sin q31&quot;OFF) option(ARM_SIN_Q15&quot;sin q15&quot;OFF) option(ARM_SIN_COS_F32&quot;sin cos f32&quot;OFF) option(ARM_SIN_COS_Q31&quot;sin cos q31&quot;OFF) option(ARM_LMS_NORM_Q31&quot;lms norm q31&quot;OFF) option(ARM_LMS_NORM_Q15&quot;lms norm q15&quot;OFF) option(CFFT_F32_16&quot;cfft f32 16&quot;OFF) option(CFFT_F32_32&quot;cfft f32 32&quot;OFF) option(CFFT_F32_64&quot;cfft f32 64&quot;OFF) option(CFFT_F32_128&quot;cfft f32 128&quot;OFF) option(CFFT_F32_256&quot;cfft f32 256&quot;OFF) option(CFFT_F32_512&quot;cfft f32 512&quot;OFF) option(CFFT_F32_1024&quot;cfft f32 1024&quot;OFF) option(CFFT_F32_2048&quot;cfft f32 2048&quot;OFF) option(CFFT_F32_4096&quot;cfft f32 4096&quot;OFF) option(CFFT_Q31_16&quot;cfft q31 16&quot;OFF) option(CFFT_Q31_32&quot;cfft q31 32&quot;OFF) option(CFFT_Q31_64&quot;cfft q31 64&quot;OFF) option(CFFT_Q31_128&quot;cfft q31 128&quot;OFF) option(CFFT_Q31_256&quot;cfft q31 256&quot;OFF) option(CFFT_Q31_512&quot;cfft q31 512&quot;OFF) option(CFFT_Q31_1024&quot;cfft q31 1024&quot;OFF) option(CFFT_Q31_2048&quot;cfft q31 2048&quot;OFF) option(CFFT_Q31_4096&quot;cfft q31 4096&quot;OFF) option(CFFT_Q15_16&quot;cfft q15 16&quot;OFF) option(CFFT_Q15_32&quot;cfft q15 32&quot;OFF) option(CFFT_Q15_64&quot;cfft q15 64&quot;OFF) option(CFFT_Q15_128&quot;cfft q15 128&quot;OFF) option(CFFT_Q15_256&quot;cfft q15 256&quot;OFF) option(CFFT_Q15_512&quot;cfft q15 512&quot;OFF) option(CFFT_Q15_1024&quot;cfft q15 1024&quot;OFF) option(CFFT_Q15_2048&quot;cfft q15 2048&quot;OFF) option(CFFT_Q15_4096&quot;cfft q15 4096&quot;OFF) option(RFFT_FAST_F32_32&quot;rfft fast f32 32&quot;OFF) option(RFFT_FAST_F32_64&quot;rfft fast f32 64&quot;OFF) option(RFFT_FAST_F32_128&quot;rfft fast f32 128&quot;OFF) option(RFFT_FAST_F32_256&quot;rfft fast f32 256&quot;OFF) option(RFFT_FAST_F32_512&quot;rfft fast f32 512&quot;OFF) option(RFFT_FAST_F32_1024&quot;rfft fast f32 1024&quot;OFF) option(RFFT_FAST_F32_2048&quot;rfft fast f32 2048&quot;OFF) option(RFFT_FAST_F32_4096&quot;rfft fast f32 4096&quot;OFF) option(RFFT_F32_128&quot;rfft f32 128&quot;OFF) option(RFFT_F32_512&quot;rfft f32 512&quot;OFF) option(RFFT_F32_2048&quot;rfft f32 2048&quot;OFF) option(RFFT_F32_8192&quot;rfft f32 8192&quot;OFF) option(RFFT_Q31_32&quot;rfft q31 32&quot;OFF) option(RFFT_Q31_64&quot;rfft q31 64&quot;OFF) option(RFFT_Q31_128&quot;rfft q31 128&quot;OFF) option(RFFT_Q31_256&quot;rfft q31 256&quot;OFF) option(RFFT_Q31_512&quot;rfft q31 512&quot;OFF) option(RFFT_Q31_1024&quot;rfft q31 1024&quot;OFF) option(RFFT_Q31_2048&quot;rfft q31 2048&quot;OFF) option(RFFT_Q31_4096&quot;rfft q31 4096&quot;OFF) option(RFFT_Q31_8192&quot;rfft q31 8192&quot;OFF) option(RFFT_Q15_32&quot;rfft q15 32&quot;OFF) option(RFFT_Q15_64&quot;rfft q15 64&quot;OFF) option(RFFT_Q15_128&quot;rfft q15 128&quot;OFF) option(RFFT_Q15_256&quot;rfft q15 256&quot;OFF) option(RFFT_Q15_512&quot;rfft q15 512&quot;OFF) option(RFFT_Q15_1024&quot;rfft q15 1024&quot;OFF) option(RFFT_Q15_2048&quot;rfft q15 2048&quot;OFF) option(RFFT_Q15_4096&quot;rfft q15 4096&quot;OFF) option(RFFT_Q15_8192&quot;rfft q15 8192&quot;OFF) option(DCT4_F32_128&quot;dct4 f32 128&quot;OFF) option(DCT4_F32_512&quot;dct4 f32 512&quot;OFF) option(DCT4_F32_2048&quot;dct4 f32 2048&quot;OFF) option(DCT4_F32_8192&quot;dct4 f32 8192&quot;OFF) option(DCT4_Q31_128&quot;dct4 q31 128&quot;OFF) option(DCT4_Q31_512&quot;dct4 q31 512&quot;OFF) option(DCT4_Q31_2048&quot;dct4 q31 2048&quot;OFF) option(DCT4_Q31_8192&quot;dct4 q31 8192&quot;OFF) option(DCT4_Q15_128&quot;dct4 q15 128&quot;OFF) option(DCT4_Q15_512&quot;dct4 q15 512&quot;OFF) option(DCT4_Q15_2048&quot;dct4 q15 2048&quot;OFF) option(DCT4_Q15_8192&quot;dct4 q15 8192&quot;OFF) SET(DSP&quot;.&quot;) add_library(CMSISDSP INTERFACE) <a class="el" href="Examples_2ARM_2arm__variance__example_2CMakeLists_8txt.html#a20de15dc42caeb4c8d037d578fba54bc">include</a>(config) if(BASICMATH) <a class="el" href="Examples_2ARM_2arm__variance__example_2CMakeLists_8txt.html#ab8684add6c129686a0d750931302978d">add_subdirectory</a>(BasicMathFunctions) target_link_libraries(CMSISDSP INTERFACE CMSISDSPBasicMath) endif() if(COMPLEXMATH) <a class="el" href="Examples_2ARM_2arm__variance__example_2CMakeLists_8txt.html#ab8684add6c129686a0d750931302978d">add_subdirectory</a>(ComplexMathFunctions) target_link_libraries(CMSISDSP INTERFACE CMSISDSPComplexMath) endif() if(CONTROLLER) <a class="el" href="Examples_2ARM_2arm__variance__example_2CMakeLists_8txt.html#ab8684add6c129686a0d750931302978d">add_subdirectory</a>(ControllerFunctions) if(CONFIGTABLE) target_compile_definitions(CMSISDSPController PUBLIC ARM_FAST_ALLOW_TABLES) endif() target_link_libraries(CMSISDSP INTERFACE CMSISDSPController) endif() if(FASTMATH) <a class="el" href="Examples_2ARM_2arm__variance__example_2CMakeLists_8txt.html#ab8684add6c129686a0d750931302978d">add_subdirectory</a>(FastMathFunctions) if(CONFIGTABLE) target_compile_definitions(CMSISDSPFastMath PUBLIC ARM_FAST_ALLOW_TABLES) endif() target_link_libraries(CMSISDSP INTERFACE CMSISDSPFastMath) endif() if(FILTERING) <a class="el" href="Examples_2ARM_2arm__variance__example_2CMakeLists_8txt.html#ab8684add6c129686a0d750931302978d">add_subdirectory</a>(FilteringFunctions) if(CONFIGTABLE) target_compile_definitions(CMSISDSPFiltering PUBLIC ARM_FAST_ALLOW_TABLES) endif() target_link_libraries(CMSISDSP INTERFACE CMSISDSPFiltering) endif() if(MATRIX) <a class="el" href="Examples_2ARM_2arm__variance__example_2CMakeLists_8txt.html#ab8684add6c129686a0d750931302978d">add_subdirectory</a>(MatrixFunctions) target_link_libraries(CMSISDSP INTERFACE CMSISDSPMatrix) endif() if(STATISTICS) <a class="el" href="Examples_2ARM_2arm__variance__example_2CMakeLists_8txt.html#ab8684add6c129686a0d750931302978d">add_subdirectory</a>(StatisticsFunctions) target_link_libraries(CMSISDSP INTERFACE CMSISDSPStatistics) endif() if(SUPPORT) <a class="el" href="Examples_2ARM_2arm__variance__example_2CMakeLists_8txt.html#ab8684add6c129686a0d750931302978d">add_subdirectory</a>(SupportFunctions) target_link_libraries(CMSISDSP INTERFACE CMSISDSPSupport) endif() if(TRANSFORM) <a class="el" href="Examples_2ARM_2arm__variance__example_2CMakeLists_8txt.html#ab8684add6c129686a0d750931302978d">add_subdirectory</a>(TransformFunctions) if(CONFIGTABLE) target_compile_definitions(CMSISDSPTransform PUBLIC ARM_FFT_ALLOW_TABLES) endif() target_link_libraries(CMSISDSP INTERFACE CMSISDSPTransform) endif() if(FILTERING OR CONTROLLER OR FASTMATH OR TRANSFORM) <a class="el" href="Examples_2ARM_2arm__variance__example_2CMakeLists_8txt.html#ab8684add6c129686a0d750931302978d">add_subdirectory</a>(CommonTables) if(TRANSFORM) if(CONFIGTABLE) target_compile_definitions(CMSISDSPCommon PUBLIC ARM_FFT_ALLOW_TABLES) endif() endif() if(FILTERING OR CONTROLLER OR FASTMATH) if(CONFIGTABLE) target_compile_definitions(CMSISDSPCommon PUBLIC ARM_FAST_ALLOW_TABLES) endif() endif() target_link_libraries(CMSISDSP INTERFACE CMSISDSPCommon) endif() target_include_directories(CMSISDSP INTERFACE&quot;$</td></tr>
+<tr class="separator:a5790cdedec7ad588e338cab656748165"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<h2 class="groupheader">Function Documentation</h2>
+<a class="anchor" id="a881c069b0c3dd34941126127656e23a1"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">cmake_minimum_required </td>
+          <td>(</td>
+          <td class="paramtype">VERSION 3.&#160;</td>
+          <td class="paramname"><em>6</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="a5790cdedec7ad588e338cab656748165"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">option </td>
+          <td>(</td>
+          <td class="paramtype">BASICMATH&quot;Basic Math Functions&quot;&#160;</td>
+          <td class="paramname"><em>ON</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="Source_2CMakeLists_8txt.html">CMakeLists.txt</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/DSP/html/Source_2CommonTables_2CMakeLists_8txt.html b/docs/DSP/html/Source_2CommonTables_2CMakeLists_8txt.html
new file mode 100644
index 0000000..8aef4f3
--- /dev/null
+++ b/docs/DSP/html/Source_2CommonTables_2CMakeLists_8txt.html
@@ -0,0 +1,154 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>CMakeLists.txt File Reference</title>
+<title>CMSIS-DSP: CMakeLists.txt File Reference</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
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+<a href="#func-members">Functions</a>  </div>
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+<tr class="separator:a450cbc64f30b7f1182d8b66245ccd208"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<a class="anchor" id="a450cbc64f30b7f1182d8b66245ccd208"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
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+          <td class="memname">cmake_minimum_required </td>
+          <td>(</td>
+          <td class="paramtype">VERSION 3.&#160;</td>
+          <td class="paramname"><em>6</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
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+  <ul>
+    <li class="navelem"><a class="el" href="Source_2ControllerFunctions_2CMakeLists_8txt.html">CMakeLists.txt</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
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+  </ul>
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diff --git a/docs/DSP/html/Source_2FastMathFunctions_2CMakeLists_8txt.html b/docs/DSP/html/Source_2FastMathFunctions_2CMakeLists_8txt.html
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--- /dev/null
+++ b/docs/DSP/html/Source_2FastMathFunctions_2CMakeLists_8txt.html
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+<html xmlns="http://www.w3.org/1999/xhtml">
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+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
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+<title>CMSIS-DSP: CMakeLists.txt File Reference</title>
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+<table cellspacing="0" cellpadding="0">
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+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-DSP
+   &#160;<span id="projectnumber">Version 1.7.0</span>
+   </div>
+   <div id="projectbrief">CMSIS DSP Software Library</div>
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+ </tbody>
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+<div class="header">
+  <div class="headertitle">
+<div class="title">CMakeLists.txt File Reference</div>  </div>
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+<div class="contents">
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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+    <li class="navelem"><a class="el" href="Source_2FastMathFunctions_2CMakeLists_8txt.html">CMakeLists.txt</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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+    <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/Source_2FilteringFunctions_2CMakeLists_8txt.html b/docs/DSP/html/Source_2FilteringFunctions_2CMakeLists_8txt.html
new file mode 100644
index 0000000..d6906bc
--- /dev/null
+++ b/docs/DSP/html/Source_2FilteringFunctions_2CMakeLists_8txt.html
@@ -0,0 +1,154 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
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+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
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+</head>
+<body>
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+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-DSP
+   &#160;<span id="projectnumber">Version 1.7.0</span>
+   </div>
+   <div id="projectbrief">CMSIS DSP Software Library</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
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+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
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+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
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+<script type="text/javascript">
+$(document).ready(function(){initNavTree('Source_2FilteringFunctions_2CMakeLists_8txt.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
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+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="summary">
+<a href="#func-members">Functions</a>  </div>
+  <div class="headertitle">
+<div class="title">CMakeLists.txt File Reference</div>  </div>
+</div><!--header-->
+<div class="contents">
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
+Functions</h2></td></tr>
+<tr class="memitem:a459bd5973ca8abbfe2ffa2bd5ea5f0a8"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Source_2FilteringFunctions_2CMakeLists_8txt.html#a459bd5973ca8abbfe2ffa2bd5ea5f0a8">cmake_minimum_required</a> (VERSION 3.6) project(CMSISDSPFiltering) add_library(CMSISDSPFiltering STATIC) <a class="el" href="Examples_2ARM_2arm__variance__example_2CMakeLists_8txt.html#a20de15dc42caeb4c8d037d578fba54bc">include</a>(interpol) interpol(CMSISDSPFiltering) configdsp(CMSISDSPFiltering..) if(CONFIGTABLE AND ALLFAST) target_compile_definitions(CMSISDSPFiltering PUBLIC ARM_ALL_FAST_TABLES) endif() if(NOT CONFIGTABLE OR ALLFAST OR ARM_LMS_NORM_Q31) target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_init_q31.c) endif() if(NOT CONFIGTABLE OR ALLFAST OR ARM_LMS_NORM_Q15) target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_init_q15.c) endif() target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_32x64_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_32x64_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_fast_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_fast_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_init_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_f64.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_init_f64.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_stereo_df2T_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_stereo_df2T_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_fast_opt_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_fast_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_fast_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_opt_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_opt_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_fast_opt_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_fast_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_fast_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_opt_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_opt_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_fast_opt_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_fast_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_fast_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_opt_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_opt_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_q7.c) target_sources(CMSISDSPFiltering PRIVATE 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target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_init_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_init_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_init_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_init_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_init_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_init_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_q31.c) target_include_directories(CMSISDSPFiltering PUBLIC&quot;$</td></tr>
+<tr class="separator:a459bd5973ca8abbfe2ffa2bd5ea5f0a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<h2 class="groupheader">Function Documentation</h2>
+<a class="anchor" id="a459bd5973ca8abbfe2ffa2bd5ea5f0a8"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">cmake_minimum_required </td>
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+   &#160;<span id="projectnumber">Version 1.7.0</span>
+   </div>
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+        name="MSearchResults" id="MSearchResults">
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+
+<div class="header">
+  <div class="summary">
+<a href="#func-members">Functions</a>  </div>
+  <div class="headertitle">
+<div class="title">CMakeLists.txt File Reference</div>  </div>
+</div><!--header-->
+<div class="contents">
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
+Functions</h2></td></tr>
+<tr class="memitem:ac12f00f4dcad3283ec1ce05fb627d05e"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Source_2TransformFunctions_2CMakeLists_8txt.html#ac12f00f4dcad3283ec1ce05fb627d05e">cmake_minimum_required</a> (VERSION 3.6) project(CMSISDSPTransform) add_library(CMSISDSPTransform STATIC) <a class="el" href="Examples_2ARM_2arm__variance__example_2CMakeLists_8txt.html#a20de15dc42caeb4c8d037d578fba54bc">include</a>(fft) fft(CMSISDSPTransform) if(CONFIGTABLE AND ALLFFT) target_compile_definitions(CMSISDSPTransform PUBLIC ARM_ALL_FFT_TABLES) endif() target_sources(CMSISDSPTransform PRIVATE arm_bitreversal.c) target_sources(CMSISDSPTransform PRIVATE arm_bitreversal2.c) if(NOT CONFIGTABLE OR ALLFFT OR CFFT_F32_16 OR CFFT_F32_32 OR CFFT_F32_64 OR CFFT_F32_128 OR CFFT_F32_256 OR CFFT_F32_512 OR CFFT_F32_1024 OR CFFT_F32_2048 OR CFFT_F32_4096) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix8_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_f32.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR CFFT_Q15_16 OR CFFT_Q15_32 OR CFFT_Q15_64 OR CFFT_Q15_128 OR CFFT_Q15_256 OR CFFT_Q15_512 OR CFFT_Q15_1024 OR CFFT_Q15_2048 OR CFFT_Q15_4096) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_q15.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR CFFT_Q31_16 OR CFFT_Q31_32 OR CFFT_Q31_64 OR CFFT_Q31_128 OR CFFT_Q31_256 OR CFFT_Q31_512 OR CFFT_Q31_1024 OR CFFT_Q31_2048 OR CFFT_Q31_4096) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_q31.c) endif() if(NOT CONFIGTABLE OR ALLFFT) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_init_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_init_q31.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR DCT4_F32_128 OR DCT4_F32_512 OR DCT4_F32_2048 OR DCT4_F32_8192) target_sources(CMSISDSPTransform PRIVATE arm_dct4_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_dct4_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_f32.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR DCT4_Q31_128 OR DCT4_Q31_512 OR DCT4_Q31_2048 OR DCT4_Q31_8192) target_sources(CMSISDSPTransform PRIVATE arm_dct4_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_dct4_init_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q31.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR ALLFFT OR DCT4_Q15_128 OR DCT4_Q15_512 OR DCT4_Q15_2048 OR DCT4_Q15_8192) target_sources(CMSISDSPTransform PRIVATE arm_dct4_init_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_dct4_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q15.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR RFFT_FAST_F32_32 OR RFFT_FAST_F32_64 OR RFFT_FAST_F32_128 OR RFFT_FAST_F32_256 OR RFFT_FAST_F32_512 OR RFFT_FAST_F32_1024 OR RFFT_FAST_F32_2048 OR RFFT_FAST_F32_4096) target_sources(CMSISDSPTransform PRIVATE arm_rfft_fast_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_fast_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix8_f32.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR RFFT_F32_128 OR RFFT_F32_512 OR RFFT_F32_2048 OR RFFT_F32_8192) target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_f32.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR RFFT_Q15_32 OR RFFT_Q15_64 OR RFFT_Q15_128 OR RFFT_Q15_256 OR RFFT_Q15_512 OR RFFT_Q15_1024 OR RFFT_Q15_2048 OR RFFT_Q15_4096 OR RFFT_Q15_8192) target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q15.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR RFFT_Q31_32 OR RFFT_Q31_64 OR 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+<tr class="separator:ac12f00f4dcad3283ec1ce05fb627d05e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<h2 class="groupheader">Function Documentation</h2>
+<a class="anchor" id="ac12f00f4dcad3283ec1ce05fb627d05e"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">cmake_minimum_required </td>
+          <td>(</td>
+          <td class="paramtype">VERSION 3.&#160;</td>
+          <td class="paramname"><em>6</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="Source_2TransformFunctions_2CMakeLists_8txt.html">CMakeLists.txt</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
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+  </ul>
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+</body>
+</html>
diff --git a/docs/DSP/html/StatisticsFunctions_8c.html b/docs/DSP/html/StatisticsFunctions_8c.html
new file mode 100644
index 0000000..3049168
--- /dev/null
+++ b/docs/DSP/html/StatisticsFunctions_8c.html
@@ -0,0 +1,129 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>StatisticsFunctions.c File Reference</title>
+<title>CMSIS-DSP: StatisticsFunctions.c File Reference</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
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+<script type="text/javascript" src="dynsections.js"></script>
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+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
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+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-DSP
+   &#160;<span id="projectnumber">Version 1.7.0</span>
+   </div>
+   <div id="projectbrief">CMSIS DSP Software Library</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
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+var searchBox = new SearchBox("searchBox", "search",false,'Search');
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+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
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+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
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+<div class="header">
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+<div class="title">StatisticsFunctions.c File Reference</div>  </div>
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+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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+    <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="StatisticsFunctions_8c.html">StatisticsFunctions.c</a></li>
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diff --git a/docs/DSP/html/SupportFunctions_8c.html b/docs/DSP/html/SupportFunctions_8c.html
new file mode 100644
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+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
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+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-DSP
+   &#160;<span id="projectnumber">Version 1.7.0</span>
+   </div>
+   <div id="projectbrief">CMSIS DSP Software Library</div>
+  </td>
+ </tr>
+ </tbody>
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+<!-- end header part -->
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+</div><!-- contents -->
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+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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diff --git a/docs/DSP/html/annotated.html b/docs/DSP/html/annotated.html
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+<tr class="memdesc:ga5cd90f9490ba8711c86e6f4bd7154359"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 vector absolute value.  <a href="group__BasicAbs.html#ga5cd90f9490ba8711c86e6f4bd7154359">More...</a><br/></td></tr>
+<tr class="separator:ga5cd90f9490ba8711c86e6f4bd7154359"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__abs__q15_8c.html">arm_abs_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__abs__q31_8c.html b/docs/DSP/html/arm__abs__q31_8c.html
index ec9a3b3..f1bbfbd 100644
--- a/docs/DSP/html/arm__abs__q31_8c.html
+++ b/docs/DSP/html/arm__abs__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
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-<tr class="memitem:ga59eafcdcdb52da60d37f20aec6ff4577"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAbs.html#ga59eafcdcdb52da60d37f20aec6ff4577">arm_abs_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga59eafcdcdb52da60d37f20aec6ff4577"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector absolute value.  <a href="group__BasicAbs.html#ga59eafcdcdb52da60d37f20aec6ff4577">More...</a><br/></td></tr>
-<tr class="separator:ga59eafcdcdb52da60d37f20aec6ff4577"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga494bd5db5e2686d96f5548e80ba8ca89"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAbs.html#ga494bd5db5e2686d96f5548e80ba8ca89">arm_abs_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga494bd5db5e2686d96f5548e80ba8ca89"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector absolute value.  <a href="group__BasicAbs.html#ga494bd5db5e2686d96f5548e80ba8ca89">More...</a><br/></td></tr>
+<tr class="separator:ga494bd5db5e2686d96f5548e80ba8ca89"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__abs__q31_8c.html">arm_abs_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__abs__q7_8c.html b/docs/DSP/html/arm__abs__q7_8c.html
index 0dbef55..56d411c 100644
--- a/docs/DSP/html/arm__abs__q7_8c.html
+++ b/docs/DSP/html/arm__abs__q7_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gadc30985e33fbf96802a5a7954dece3b1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAbs.html#gadc30985e33fbf96802a5a7954dece3b1">arm_abs_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gadc30985e33fbf96802a5a7954dece3b1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector absolute value.  <a href="group__BasicAbs.html#gadc30985e33fbf96802a5a7954dece3b1">More...</a><br/></td></tr>
-<tr class="separator:gadc30985e33fbf96802a5a7954dece3b1"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga097f1938c72471930b4e5647de40c505"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAbs.html#ga097f1938c72471930b4e5647de40c505">arm_abs_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga097f1938c72471930b4e5647de40c505"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector absolute value.  <a href="group__BasicAbs.html#ga097f1938c72471930b4e5647de40c505">More...</a><br/></td></tr>
+<tr class="separator:ga097f1938c72471930b4e5647de40c505"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__abs__q7_8c.html">arm_abs_q7.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__add__f32_8c.html b/docs/DSP/html/arm__add__f32_8c.html
index 324ca04..ed95f1a 100644
--- a/docs/DSP/html/arm__add__f32_8c.html
+++ b/docs/DSP/html/arm__add__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga6a904a547413b10565dd1d251c6bafbd"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAdd.html#ga6a904a547413b10565dd1d251c6bafbd">arm_add_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga6a904a547413b10565dd1d251c6bafbd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point vector addition.  <a href="group__BasicAdd.html#ga6a904a547413b10565dd1d251c6bafbd">More...</a><br/></td></tr>
-<tr class="separator:ga6a904a547413b10565dd1d251c6bafbd"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gabfef1e86e458314a61f4baa441d9765e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAdd.html#gabfef1e86e458314a61f4baa441d9765e">arm_add_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gabfef1e86e458314a61f4baa441d9765e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point vector addition.  <a href="group__BasicAdd.html#gabfef1e86e458314a61f4baa441d9765e">More...</a><br/></td></tr>
+<tr class="separator:gabfef1e86e458314a61f4baa441d9765e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__add__f32_8c.html">arm_add_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__add__q15_8c.html b/docs/DSP/html/arm__add__q15_8c.html
index a66017b..89225b5 100644
--- a/docs/DSP/html/arm__add__q15_8c.html
+++ b/docs/DSP/html/arm__add__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gabb51285a41f511670bbff62fc0e1bf62"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAdd.html#gabb51285a41f511670bbff62fc0e1bf62">arm_add_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gabb51285a41f511670bbff62fc0e1bf62"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 vector addition.  <a href="group__BasicAdd.html#gabb51285a41f511670bbff62fc0e1bf62">More...</a><br/></td></tr>
-<tr class="separator:gabb51285a41f511670bbff62fc0e1bf62"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gacea7c052f62fdd71c8f1a14f0495cbed"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAdd.html#gacea7c052f62fdd71c8f1a14f0495cbed">arm_add_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gacea7c052f62fdd71c8f1a14f0495cbed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 vector addition.  <a href="group__BasicAdd.html#gacea7c052f62fdd71c8f1a14f0495cbed">More...</a><br/></td></tr>
+<tr class="separator:gacea7c052f62fdd71c8f1a14f0495cbed"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__add__q15_8c.html">arm_add_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__add__q31_8c.html b/docs/DSP/html/arm__add__q31_8c.html
index 58e09c5..434b054 100644
--- a/docs/DSP/html/arm__add__q31_8c.html
+++ b/docs/DSP/html/arm__add__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga24d6c3f7f8b9fae4847c0c3f26a39a3b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAdd.html#ga24d6c3f7f8b9fae4847c0c3f26a39a3b">arm_add_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga24d6c3f7f8b9fae4847c0c3f26a39a3b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector addition.  <a href="group__BasicAdd.html#ga24d6c3f7f8b9fae4847c0c3f26a39a3b">More...</a><br/></td></tr>
-<tr class="separator:ga24d6c3f7f8b9fae4847c0c3f26a39a3b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga63e5862d90971bff4181b22bfa6ac753"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAdd.html#ga63e5862d90971bff4181b22bfa6ac753">arm_add_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga63e5862d90971bff4181b22bfa6ac753"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector addition.  <a href="group__BasicAdd.html#ga63e5862d90971bff4181b22bfa6ac753">More...</a><br/></td></tr>
+<tr class="separator:ga63e5862d90971bff4181b22bfa6ac753"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__add__q31_8c.html">arm_add_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__add__q7_8c.html b/docs/DSP/html/arm__add__q7_8c.html
index 910ba33..68bf53c 100644
--- a/docs/DSP/html/arm__add__q7_8c.html
+++ b/docs/DSP/html/arm__add__q7_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
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-<tr class="memdesc:gaed633f415a7840a66861debca2dfb96b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector addition.  <a href="group__BasicAdd.html#gaed633f415a7840a66861debca2dfb96b">More...</a><br/></td></tr>
-<tr class="separator:gaed633f415a7840a66861debca2dfb96b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafaecefa2be70b02118c8a317e183f247"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAdd.html#gafaecefa2be70b02118c8a317e183f247">arm_add_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gafaecefa2be70b02118c8a317e183f247"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector addition.  <a href="group__BasicAdd.html#gafaecefa2be70b02118c8a317e183f247">More...</a><br/></td></tr>
+<tr class="separator:gafaecefa2be70b02118c8a317e183f247"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__add__q7_8c.html">arm_add_q7.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__biquad__cascade__df1__32x64__init__q31_8c.html b/docs/DSP/html/arm__biquad__cascade__df1__32x64__init__q31_8c.html
index 7c6e1ad..7034f20 100644
--- a/docs/DSP/html/arm__biquad__cascade__df1__32x64__init__q31_8c.html
+++ b/docs/DSP/html/arm__biquad__cascade__df1__32x64__init__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,8 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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-<tr class="separator:ga44900cecb8083afcaabf905ffcd656bb"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga426cd78591a717e87d66d1eaa9a3d074"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1__32x64.html#ga426cd78591a717e87d66d1eaa9a3d074">arm_biquad_cas_df1_32x64_init_q31</a> (<a class="el" href="structarm__biquad__cas__df1__32x64__ins__q31.html">arm_biquad_cas_df1_32x64_ins_q31</a> *S, uint8_t numStages, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *pState, uint8_t postShift)</td></tr>
+<tr class="memdesc:ga426cd78591a717e87d66d1eaa9a3d074"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 Biquad cascade 32x64 filter.  <a href="group__BiquadCascadeDF1__32x64.html#ga426cd78591a717e87d66d1eaa9a3d074">More...</a><br/></td></tr>
+<tr class="separator:ga426cd78591a717e87d66d1eaa9a3d074"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -125,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__biquad__cascade__df1__32x64__init__q31_8c.html">arm_biquad_cascade_df1_32x64_init_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__biquad__cascade__df1__32x64__q31_8c.html b/docs/DSP/html/arm__biquad__cascade__df1__32x64__q31_8c.html
index d5608d2..6bf43d3 100644
--- a/docs/DSP/html/arm__biquad__cascade__df1__32x64__q31_8c.html
+++ b/docs/DSP/html/arm__biquad__cascade__df1__32x64__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -117,6 +117,7 @@
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
 <tr class="memitem:ga953a83e69685de6575cff37feb358a93"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1__32x64.html#ga953a83e69685de6575cff37feb358a93">arm_biquad_cas_df1_32x64_q31</a> (const <a class="el" href="structarm__biquad__cas__df1__32x64__ins__q31.html">arm_biquad_cas_df1_32x64_ins_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga953a83e69685de6575cff37feb358a93"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 Biquad cascade 32x64 filter.  <a href="group__BiquadCascadeDF1__32x64.html#ga953a83e69685de6575cff37feb358a93">More...</a><br/></td></tr>
 <tr class="separator:ga953a83e69685de6575cff37feb358a93"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
@@ -125,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__biquad__cascade__df1__32x64__q31_8c.html">arm_biquad_cascade_df1_32x64_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__biquad__cascade__df1__f32_8c.html b/docs/DSP/html/arm__biquad__cascade__df1__f32_8c.html
index 73e0592..be84f73 100644
--- a/docs/DSP/html/arm__biquad__cascade__df1__f32_8c.html
+++ b/docs/DSP/html/arm__biquad__cascade__df1__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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-<tr class="memitem:gaa0dbe330d763e3c1d8030b3ef12d5bdc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#gaa0dbe330d763e3c1d8030b3ef12d5bdc">arm_biquad_cascade_df1_f32</a> (const <a class="el" href="structarm__biquad__casd__df1__inst__f32.html">arm_biquad_casd_df1_inst_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaa0dbe330d763e3c1d8030b3ef12d5bdc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point Biquad cascade filter.  <a href="group__BiquadCascadeDF1.html#gaa0dbe330d763e3c1d8030b3ef12d5bdc">More...</a><br/></td></tr>
-<tr class="separator:gaa0dbe330d763e3c1d8030b3ef12d5bdc"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga812eb9769adde4fed6d5ff4968a011d3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#ga812eb9769adde4fed6d5ff4968a011d3">arm_biquad_cascade_df1_f32</a> (const <a class="el" href="structarm__biquad__casd__df1__inst__f32.html">arm_biquad_casd_df1_inst_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga812eb9769adde4fed6d5ff4968a011d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point Biquad cascade filter.  <a href="group__BiquadCascadeDF1.html#ga812eb9769adde4fed6d5ff4968a011d3">More...</a><br/></td></tr>
+<tr class="separator:ga812eb9769adde4fed6d5ff4968a011d3"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__biquad__cascade__df1__f32_8c.html">arm_biquad_cascade_df1_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__biquad__cascade__df1__fast__q15_8c.html b/docs/DSP/html/arm__biquad__cascade__df1__fast__q15_8c.html
index fd47bd7..9348c1e 100644
--- a/docs/DSP/html/arm__biquad__cascade__df1__fast__q15_8c.html
+++ b/docs/DSP/html/arm__biquad__cascade__df1__fast__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gaffb9792c0220882efd4c58f3c6a05fd7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#gaffb9792c0220882efd4c58f3c6a05fd7">arm_biquad_cascade_df1_fast_q15</a> (const <a class="el" href="structarm__biquad__casd__df1__inst__q15.html">arm_biquad_casd_df1_inst_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-<tr class="separator:gadd66a0aefdc645031d607b0a5b37a942"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:ga27af5bfa40dad7c877e48eedc8d67558"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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index c626abb..1a897cb 100644
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-<tr class="separator:ga27b0c54da702713976e5202d20b4473f"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:ga4e7dad0ee6949005909fd4fcf1249b79"><td class="memSeparator" colspan="2">&#160;</td></tr>
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@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__biquad__cascade__df1__q31_8c.html">arm_biquad_cascade_df1_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__biquad__cascade__df2T__f32_8c.html b/docs/DSP/html/arm__biquad__cascade__df2T__f32_8c.html
index ea5fab0..303e514 100644
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   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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-<tr class="separator:ga114f373fbc16a314e9f293c7c7649c7f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaecf9b22907e89fc35f097b50589cf86a"><td class="memItemLeft" align="right" valign="top">LOW_OPTIMIZATION_ENTER void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF2T.html#gaecf9b22907e89fc35f097b50589cf86a">arm_biquad_cascade_df2T_f32</a> (const <a class="el" href="structarm__biquad__cascade__df2T__instance__f32.html">arm_biquad_cascade_df2T_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
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+<tr class="separator:gaecf9b22907e89fc35f097b50589cf86a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
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   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__biquad__cascade__df2T__f32_8c.html">arm_biquad_cascade_df2T_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__biquad__cascade__df2T__f64_8c.html b/docs/DSP/html/arm__biquad__cascade__df2T__f64_8c.html
index 4c1914d..c1999ee 100644
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+++ b/docs/DSP/html/arm__biquad__cascade__df2T__f64_8c.html
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   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__biquad__cascade__df2T__init__f32_8c.html b/docs/DSP/html/arm__biquad__cascade__df2T__init__f32_8c.html
index 5c95b1c..3b9c9f0 100644
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+++ b/docs/DSP/html/arm__biquad__cascade__df2T__init__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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-<tr class="separator:ga70eaddf317a4a8bde6bd6a97df67fedd"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafd8b4068de567e9012e444f1c2320e1c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF2T.html#gafd8b4068de567e9012e444f1c2320e1c">arm_biquad_cascade_df2T_init_f32</a> (<a class="el" href="structarm__biquad__cascade__df2T__instance__f32.html">arm_biquad_cascade_df2T_instance_f32</a> *S, uint8_t numStages, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState)</td></tr>
+<tr class="memdesc:gafd8b4068de567e9012e444f1c2320e1c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point transposed direct form II Biquad cascade filter.  <a href="group__BiquadCascadeDF2T.html#gafd8b4068de567e9012e444f1c2320e1c">More...</a><br/></td></tr>
+<tr class="separator:gafd8b4068de567e9012e444f1c2320e1c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
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@@ -126,7 +126,7 @@
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   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__biquad__cascade__df2T__init__f32_8c.html">arm_biquad_cascade_df2T_init_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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index 8398f9e..7c5ca5f 100644
--- a/docs/DSP/html/arm__biquad__cascade__df2T__init__f64_8c.html
+++ b/docs/DSP/html/arm__biquad__cascade__df2T__init__f64_8c.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -126,7 +126,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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+++ b/docs/DSP/html/arm__biquad__cascade__stereo__df2T__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
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-   &#160;<span id="projectnumber">Version 1.5.2</span>
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-<tr class="separator:gac75de449c3e4f733477d81bd0ada5eec"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaeb8334e64307e85de36db947da04a6eb"><td class="memItemLeft" align="right" valign="top">LOW_OPTIMIZATION_ENTER void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF2T.html#gaeb8334e64307e85de36db947da04a6eb">arm_biquad_cascade_stereo_df2T_f32</a> (const <a class="el" href="structarm__biquad__cascade__stereo__df2T__instance__f32.html">arm_biquad_cascade_stereo_df2T_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaeb8334e64307e85de36db947da04a6eb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point transposed direct form II Biquad cascade filter.  <a href="group__BiquadCascadeDF2T.html#gaeb8334e64307e85de36db947da04a6eb">More...</a><br/></td></tr>
+<tr class="separator:gaeb8334e64307e85de36db947da04a6eb"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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     <a href="http://www.doxygen.org/index.html">
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   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
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 <table class="memberdecls">
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-<tr class="memdesc:ga405197c89fe4d34003efd23786296425"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point transposed direct form II Biquad cascade filter.  <a href="group__BiquadCascadeDF2T.html#ga405197c89fe4d34003efd23786296425">More...</a><br/></td></tr>
-<tr class="separator:ga405197c89fe4d34003efd23786296425"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga31a77581f3cba5f360c84b160d770d98"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF2T.html#ga31a77581f3cba5f360c84b160d770d98">arm_biquad_cascade_stereo_df2T_init_f32</a> (<a class="el" href="structarm__biquad__cascade__stereo__df2T__instance__f32.html">arm_biquad_cascade_stereo_df2T_instance_f32</a> *S, uint8_t numStages, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState)</td></tr>
+<tr class="memdesc:ga31a77581f3cba5f360c84b160d770d98"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point transposed direct form II Biquad cascade filter.  <a href="group__BiquadCascadeDF2T.html#ga31a77581f3cba5f360c84b160d770d98">More...</a><br/></td></tr>
+<tr class="separator:ga31a77581f3cba5f360c84b160d770d98"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
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+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-DSP
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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+   <div id="projectbrief">CMSIS DSP Software Library</div>
+  </td>
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+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
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+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="summary">
+<a href="#func-members">Functions</a>  </div>
+  <div class="headertitle">
+<div class="title">arm_bitreversal2.c File Reference</div>  </div>
+</div><!--header-->
+<div class="contents">
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
+Functions</h2></td></tr>
+<tr class="memitem:aa7638dc36fa3e1674d794918a53ceb8a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__bitreversal2_8c.html#aa7638dc36fa3e1674d794918a53ceb8a">arm_bitreversal_32</a> (uint32_t *pSrc, const uint16_t bitRevLen, const uint16_t *pBitRevTab)</td></tr>
+<tr class="memdesc:aa7638dc36fa3e1674d794918a53ceb8a"><td class="mdescLeft">&#160;</td><td class="mdescRight">In-place 32 bit reversal function.  <a href="#aa7638dc36fa3e1674d794918a53ceb8a">More...</a><br/></td></tr>
+<tr class="separator:aa7638dc36fa3e1674d794918a53ceb8a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:af39358a8b7645d00180115d5009db286"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__bitreversal2_8c.html#af39358a8b7645d00180115d5009db286">arm_bitreversal_16</a> (uint16_t *pSrc, const uint16_t bitRevLen, const uint16_t *pBitRevTab)</td></tr>
+<tr class="memdesc:af39358a8b7645d00180115d5009db286"><td class="mdescLeft">&#160;</td><td class="mdescRight">In-place 16 bit reversal function.  <a href="#af39358a8b7645d00180115d5009db286">More...</a><br/></td></tr>
+<tr class="separator:af39358a8b7645d00180115d5009db286"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<h2 class="groupheader">Function Documentation</h2>
+<a class="anchor" id="af39358a8b7645d00180115d5009db286"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_bitreversal_16 </td>
+          <td>(</td>
+          <td class="paramtype">uint16_t *&#160;</td>
+          <td class="paramname"><em>pSrc</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint16_t&#160;</td>
+          <td class="paramname"><em>bitRevLen</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint16_t *&#160;</td>
+          <td class="paramname"><em>pBitRevTab</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to in-place buffer of unknown 16-bit data type </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitRevLen</td><td>bit reversal table length </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pBitRevTab</td><td>points to bit reversal table </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="aa7638dc36fa3e1674d794918a53ceb8a"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_bitreversal_32 </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t *&#160;</td>
+          <td class="paramname"><em>pSrc</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint16_t&#160;</td>
+          <td class="paramname"><em>bitRevLen</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint16_t *&#160;</td>
+          <td class="paramname"><em>pBitRevTab</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to in-place buffer of unknown 32-bit data type </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitRevLen</td><td>bit reversal table length </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pBitRevTab</td><td>points to bit reversal table </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_f93595924be31e3058e32faa649f9f3e.html">TransformFunctions</a></li><li class="navelem"><a class="el" href="arm__bitreversal2_8c.html">arm_bitreversal2.c</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
+	<!--
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+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
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+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/DSP/html/arm__bitreversal_8c.html b/docs/DSP/html/arm__bitreversal_8c.html
index 4eb589b..21d23a9 100644
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@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,15 +116,18 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:a3d4062fdfa6aaa3f51f41cab868e508b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__bitreversal_8c.html#a3d4062fdfa6aaa3f51f41cab868e508b">arm_bitreversal_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint16_t <a class="el" href="arm__fft__bin__example__f32_8c.html#a9b500899c581f6df3ffc0a9f3a9ef6aa">fftSize</a>, uint16_t bitRevFactor, uint16_t *pBitRevTab)</td></tr>
-<tr class="separator:a3d4062fdfa6aaa3f51f41cab868e508b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a27618705158b5c42db5fb0a381f8efc1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__bitreversal_8c.html#a27618705158b5c42db5fb0a381f8efc1">arm_bitreversal_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, uint16_t bitRevFactor, uint16_t *pBitRevTable)</td></tr>
-<tr class="separator:a27618705158b5c42db5fb0a381f8efc1"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a12a07b49948c354172ae07358309a4a5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__bitreversal_8c.html#a12a07b49948c354172ae07358309a4a5">arm_bitreversal_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc16, uint32_t fftLen, uint16_t bitRevFactor, uint16_t *pBitRevTab)</td></tr>
-<tr class="separator:a12a07b49948c354172ae07358309a4a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a81008b023cbc9d37b3ff849877d1eb52"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__bitreversal_8c.html#a81008b023cbc9d37b3ff849877d1eb52">arm_bitreversal_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint16_t <a class="el" href="arm__fft__bin__example__f32_8c.html#a9b500899c581f6df3ffc0a9f3a9ef6aa">fftSize</a>, uint16_t bitRevFactor, const uint16_t *pBitRevTab)</td></tr>
+<tr class="memdesc:a81008b023cbc9d37b3ff849877d1eb52"><td class="mdescLeft">&#160;</td><td class="mdescRight">In-place floating-point bit reversal function.  <a href="#a81008b023cbc9d37b3ff849877d1eb52">More...</a><br/></td></tr>
+<tr class="separator:a81008b023cbc9d37b3ff849877d1eb52"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a82acdff1d26c7021c2a016a6e7e9eaf8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__bitreversal_8c.html#a82acdff1d26c7021c2a016a6e7e9eaf8">arm_bitreversal_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, uint16_t bitRevFactor, const uint16_t *pBitRevTab)</td></tr>
+<tr class="memdesc:a82acdff1d26c7021c2a016a6e7e9eaf8"><td class="mdescLeft">&#160;</td><td class="mdescRight">In-place Q31 bit reversal function.  <a href="#a82acdff1d26c7021c2a016a6e7e9eaf8">More...</a><br/></td></tr>
+<tr class="separator:a82acdff1d26c7021c2a016a6e7e9eaf8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:aca90e3648bb9032de822180ab177f90c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__bitreversal_8c.html#aca90e3648bb9032de822180ab177f90c">arm_bitreversal_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc16, uint32_t fftLen, uint16_t bitRevFactor, const uint16_t *pBitRevTab)</td></tr>
+<tr class="memdesc:aca90e3648bb9032de822180ab177f90c"><td class="mdescLeft">&#160;</td><td class="mdescRight">In-place Q15 bit reversal function.  <a href="#aca90e3648bb9032de822180ab177f90c">More...</a><br/></td></tr>
+<tr class="separator:aca90e3648bb9032de822180ab177f90c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="a3d4062fdfa6aaa3f51f41cab868e508b"></a>
+<a class="anchor" id="a81008b023cbc9d37b3ff849877d1eb52"></a>
 <div class="memitem">
 <div class="memproto">
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@@ -149,7 +152,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype">uint16_t *&#160;</td>
+          <td class="paramtype">const uint16_t *&#160;</td>
           <td class="paramname"><em>pBitRevTab</em>&#160;</td>
         </tr>
         <tr>
@@ -159,12 +162,20 @@
         </tr>
       </table>
 </div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga9fadd650b802f612ae558ddaab789a6d">arm_cfft_radix2_f32()</a>, <a class="el" href="group__ComplexFFT.html#ga521f670cd9c571bc61aff9bec89f4c26">arm_cfft_radix4_f32()</a>, and <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32()</a>.</p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to in-place floating-point data buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftSize</td><td>length of FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitRevFactor</td><td>bit reversal modifier that supports different size FFTs with the same bit reversal table </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pBitRevTab</td><td>points to bit reversal table </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="a12a07b49948c354172ae07358309a4a5"></a>
+<a class="anchor" id="aca90e3648bb9032de822180ab177f90c"></a>
 <div class="memitem">
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       <table class="memname">
@@ -189,7 +200,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype">uint16_t *&#160;</td>
+          <td class="paramtype">const uint16_t *&#160;</td>
           <td class="paramname"><em>pBitRevTab</em>&#160;</td>
         </tr>
         <tr>
@@ -199,12 +210,20 @@
         </tr>
       </table>
 </div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga55b424341dc3efd3fa0bcaaff4bdbf40">arm_cfft_radix2_q15()</a>, and <a class="el" href="group__ComplexFFT.html#ga8d66cdac41b8bf6cefdb895456eee84a">arm_cfft_radix4_q15()</a>.</p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc16</td><td>points to in-place Q15 data buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitRevFactor</td><td>bit reversal modifier that supports different size FFTs with the same bit reversal table </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pBitRevTab</td><td>points to bit reversal table </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="a27618705158b5c42db5fb0a381f8efc1"></a>
+<a class="anchor" id="a82acdff1d26c7021c2a016a6e7e9eaf8"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
@@ -229,8 +248,8 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype">uint16_t *&#160;</td>
-          <td class="paramname"><em>pBitRevTable</em>&#160;</td>
+          <td class="paramtype">const uint16_t *&#160;</td>
+          <td class="paramname"><em>pBitRevTab</em>&#160;</td>
         </tr>
         <tr>
           <td></td>
@@ -239,8 +258,16 @@
         </tr>
       </table>
 </div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga6321f703ec87a274aedaab33d3e766b4">arm_cfft_radix2_q31()</a>, and <a class="el" href="group__ComplexFFT.html#gafde3ee1f58cf393b45a9073174fff548">arm_cfft_radix4_q31()</a>.</p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to in-place Q31 data buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of FFT. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitRevFactor</td><td>bit reversal modifier that supports different size FFTs with the same bit reversal table </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pBitRevTab</td><td>points to bit reversal table </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -250,7 +277,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_f93595924be31e3058e32faa649f9f3e.html">TransformFunctions</a></li><li class="navelem"><a class="el" href="arm__bitreversal_8c.html">arm_bitreversal.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__cfft__f32_8c.html b/docs/DSP/html/arm__cfft__f32_8c.html
index e79d1b5..f96443d 100644
--- a/docs/DSP/html/arm__cfft__f32_8c.html
+++ b/docs/DSP/html/arm__cfft__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -119,6 +119,7 @@
 <tr class="memitem:a72350c6eaa1eef8796ab43c1497c6b9c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__f32_8c.html#a72350c6eaa1eef8796ab43c1497c6b9c">arm_radix8_butterfly_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint16_t fftLen, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoef, uint16_t twidCoefModifier)</td></tr>
 <tr class="separator:a72350c6eaa1eef8796ab43c1497c6b9c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ac8e7ebe1cb131a5b0f55d0464640591f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__f32_8c.html#ac8e7ebe1cb131a5b0f55d0464640591f">arm_bitreversal_32</a> (uint32_t *pSrc, const uint16_t bitRevLen, const uint16_t *pBitRevTable)</td></tr>
+<tr class="memdesc:ac8e7ebe1cb131a5b0f55d0464640591f"><td class="mdescLeft">&#160;</td><td class="mdescRight">In-place 32 bit reversal function.  <a href="#ac8e7ebe1cb131a5b0f55d0464640591f">More...</a><br/></td></tr>
 <tr class="separator:ac8e7ebe1cb131a5b0f55d0464640591f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ae99e2b173033e9910058869bdf0619d9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__f32_8c.html#ae99e2b173033e9910058869bdf0619d9">arm_cfft_radix8by2_f32</a> (<a class="el" href="structarm__cfft__instance__f32.html">arm_cfft_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *p1)</td></tr>
 <tr class="separator:ae99e2b173033e9910058869bdf0619d9"><td class="memSeparator" colspan="2">&#160;</td></tr>
@@ -149,7 +150,7 @@
           <td class="paramkey"></td>
           <td></td>
           <td class="paramtype">const uint16_t *&#160;</td>
-          <td class="paramname"><em>pBitRevTable</em>&#160;</td>
+          <td class="paramname"><em>pBitRevTab</em>&#160;</td>
         </tr>
         <tr>
           <td></td>
@@ -158,8 +159,15 @@
         </tr>
       </table>
 </div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80">arm_cfft_f32()</a>.</p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to in-place buffer of unknown 32-bit data type </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitRevLen</td><td>bit reversal table length </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pBitRevTab</td><td>points to bit reversal table </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -187,10 +195,6 @@
       </table>
 </div><div class="memdoc">
 
-<p>References <a class="el" href="arm__cfft__f32_8c.html#a72350c6eaa1eef8796ab43c1497c6b9c">arm_radix8_butterfly_f32()</a>, <a class="el" href="structarm__cfft__instance__f32.html#acd8f9e9540e3dd348212726e5d6aaa95">arm_cfft_instance_f32::fftLen</a>, and <a class="el" href="structarm__cfft__instance__f32.html#a59cc6f753f1498716e1444ac054c06de">arm_cfft_instance_f32::pTwiddle</a>.</p>
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80">arm_cfft_f32()</a>.</p>
-
 </div>
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 <a class="anchor" id="a4bb346f59bca06cebe0defc8e15b69a6"></a>
@@ -217,10 +221,6 @@
       </table>
 </div><div class="memdoc">
 
-<p>References <a class="el" href="arm__cfft__f32_8c.html#a72350c6eaa1eef8796ab43c1497c6b9c">arm_radix8_butterfly_f32()</a>, <a class="el" href="structarm__cfft__instance__f32.html#acd8f9e9540e3dd348212726e5d6aaa95">arm_cfft_instance_f32::fftLen</a>, and <a class="el" href="structarm__cfft__instance__f32.html#a59cc6f753f1498716e1444ac054c06de">arm_cfft_instance_f32::pTwiddle</a>.</p>
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80">arm_cfft_f32()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="a72350c6eaa1eef8796ab43c1497c6b9c"></a>
@@ -258,8 +258,7 @@
         </tr>
       </table>
 </div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80">arm_cfft_f32()</a>, <a class="el" href="arm__cfft__f32_8c.html#ae99e2b173033e9910058869bdf0619d9">arm_cfft_radix8by2_f32()</a>, and <a class="el" href="arm__cfft__f32_8c.html#a4bb346f59bca06cebe0defc8e15b69a6">arm_cfft_radix8by4_f32()</a>.</p>
+<p>brief Core function for the floating-point CFFT butterfly process. param[in,out] pSrc points to the in-place buffer of floating-point data type. param[in] fftLen length of the FFT. param[in] pCoef points to the twiddle coefficient buffer. param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. return none </p>
 
 </div>
 </div>
@@ -269,7 +268,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_f93595924be31e3058e32faa649f9f3e.html">TransformFunctions</a></li><li class="navelem"><a class="el" href="arm__cfft__f32_8c.html">arm_cfft_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__cfft__q15_8c.html b/docs/DSP/html/arm__cfft__q15_8c.html
index 7f45d3d..011e694 100644
--- a/docs/DSP/html/arm__cfft__q15_8c.html
+++ b/docs/DSP/html/arm__cfft__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,20 +116,21 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:abf1a2f9aa9f44ad5da1f0dbae8b54f2f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__q15_8c.html#abf1a2f9aa9f44ad5da1f0dbae8b54f2f">arm_radix4_butterfly_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t fftLen, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoef, uint32_t twidCoefModifier)</td></tr>
-<tr class="memdesc:abf1a2f9aa9f44ad5da1f0dbae8b54f2f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core function for the Q15 CFFT butterfly process.  <a href="#abf1a2f9aa9f44ad5da1f0dbae8b54f2f">More...</a><br/></td></tr>
-<tr class="separator:abf1a2f9aa9f44ad5da1f0dbae8b54f2f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a734ecff00f21a6a10e9ec437c8987eb1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__q15_8c.html#a734ecff00f21a6a10e9ec437c8987eb1">arm_radix4_butterfly_inverse_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t fftLen, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoef, uint32_t twidCoefModifier)</td></tr>
-<tr class="memdesc:a734ecff00f21a6a10e9ec437c8987eb1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core function for the Q15 CIFFT butterfly process.  <a href="#a734ecff00f21a6a10e9ec437c8987eb1">More...</a><br/></td></tr>
-<tr class="separator:a734ecff00f21a6a10e9ec437c8987eb1"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a10af006080b7c9872dd9a538b79040da"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__q15_8c.html#a10af006080b7c9872dd9a538b79040da">arm_radix4_butterfly_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoef, uint32_t twidCoefModifier)</td></tr>
+<tr class="memdesc:a10af006080b7c9872dd9a538b79040da"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core function for the Q15 CFFT butterfly process.  <a href="#a10af006080b7c9872dd9a538b79040da">More...</a><br/></td></tr>
+<tr class="separator:a10af006080b7c9872dd9a538b79040da"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a9c0708cce16e3f17a5a616c71fd17ec5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__q15_8c.html#a9c0708cce16e3f17a5a616c71fd17ec5">arm_radix4_butterfly_inverse_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoef, uint32_t twidCoefModifier)</td></tr>
+<tr class="memdesc:a9c0708cce16e3f17a5a616c71fd17ec5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core function for the Q15 CIFFT butterfly process.  <a href="#a9c0708cce16e3f17a5a616c71fd17ec5">More...</a><br/></td></tr>
+<tr class="separator:a9c0708cce16e3f17a5a616c71fd17ec5"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a773957c278f4d9e728711f27e8a6e278"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__q15_8c.html#a773957c278f4d9e728711f27e8a6e278">arm_bitreversal_16</a> (uint16_t *pSrc, const uint16_t bitRevLen, const uint16_t *pBitRevTable)</td></tr>
+<tr class="memdesc:a773957c278f4d9e728711f27e8a6e278"><td class="mdescLeft">&#160;</td><td class="mdescRight">In-place 16 bit reversal function.  <a href="#a773957c278f4d9e728711f27e8a6e278">More...</a><br/></td></tr>
 <tr class="separator:a773957c278f4d9e728711f27e8a6e278"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:af1d4a751153857c173511e0c77ab4fa9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__q15_8c.html#af1d4a751153857c173511e0c77ab4fa9">arm_cfft_radix4by2_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoef)</td></tr>
 <tr class="separator:af1d4a751153857c173511e0c77ab4fa9"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:abe669acc8db57d1fb9b1e2bba30f2224"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__q15_8c.html#abe669acc8db57d1fb9b1e2bba30f2224">arm_cfft_radix4by2_inverse_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoef)</td></tr>
 <tr class="separator:abe669acc8db57d1fb9b1e2bba30f2224"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga68cdacd2267a2967955e40e6b7ec1229"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15</a> (const <a class="el" href="structarm__cfft__instance__q15.html">arm_cfft_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *p1, uint8_t <a class="el" href="arm__fft__bin__example__f32_8c.html#a379ccb99013d369a41b49619083c16ef">ifftFlag</a>, uint8_t bitReverseFlag)</td></tr>
-<tr class="memdesc:ga68cdacd2267a2967955e40e6b7ec1229"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 complex FFT.  <a href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">More...</a><br/></td></tr>
+<tr class="memdesc:ga68cdacd2267a2967955e40e6b7ec1229"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q15 complex FFT.  <a href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">More...</a><br/></td></tr>
 <tr class="separator:ga68cdacd2267a2967955e40e6b7ec1229"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <h2 class="groupheader">Function Documentation</h2>
@@ -153,7 +154,7 @@
           <td class="paramkey"></td>
           <td></td>
           <td class="paramtype">const uint16_t *&#160;</td>
-          <td class="paramname"><em>pBitRevTable</em>&#160;</td>
+          <td class="paramname"><em>pBitRevTab</em>&#160;</td>
         </tr>
         <tr>
           <td></td>
@@ -162,8 +163,15 @@
         </tr>
       </table>
 </div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15()</a>.</p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to in-place buffer of unknown 16-bit data type </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitRevLen</td><td>bit reversal table length </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pBitRevTab</td><td>points to bit reversal table </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -197,10 +205,6 @@
       </table>
 </div><div class="memdoc">
 
-<p>References <a class="el" href="arm__math_8h.html#a15e896d0146c280e600d00f609832350">__QSUB()</a>, <a class="el" href="arm__math_8h.html#a6e4703dc08d1b82eab7f5ef96edb59bb">__QSUB16()</a>, <a class="el" href="arm__math_8h.html#af3d7aff37a4472f1f2bc88eb3b97b526">__SHADD16()</a>, <a class="el" href="arm__math_8h.html#a9c58d7b4648a973d91e27544bc190e60">__SMUADX()</a>, <a class="el" href="arm__math_8h.html#a6b293f62ad7eb225fa9ce0f39458eba3">__SMUSD()</a>, <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>, and <a class="el" href="arm__cfft__q15_8c.html#a734ecff00f21a6a10e9ec437c8987eb1">arm_radix4_butterfly_inverse_q15()</a>.</p>
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="af1d4a751153857c173511e0c77ab4fa9"></a>
@@ -234,13 +238,9 @@
 </div><div class="memdoc">
 <p>end of ComplexFFT group </p>
 
-<p>References <a class="el" href="arm__math_8h.html#a6e4703dc08d1b82eab7f5ef96edb59bb">__QSUB16()</a>, <a class="el" href="arm__math_8h.html#af3d7aff37a4472f1f2bc88eb3b97b526">__SHADD16()</a>, <a class="el" href="arm__math_8h.html#a2eed05660fedbe3fbd0b6dbb1315cfc3">__SMUAD()</a>, <a class="el" href="arm__math_8h.html#a7375d1deba32929dc97008bfa7085d46">__SMUSDX()</a>, <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>, and <a class="el" href="arm__cfft__q15_8c.html#abf1a2f9aa9f44ad5da1f0dbae8b54f2f">arm_radix4_butterfly_q15()</a>.</p>
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15()</a>.</p>
-
 </div>
 </div>
-<a class="anchor" id="a734ecff00f21a6a10e9ec437c8987eb1"></a>
+<a class="anchor" id="a9c0708cce16e3f17a5a616c71fd17ec5"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
@@ -259,7 +259,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pCoef16</em>, </td>
         </tr>
         <tr>
@@ -277,22 +277,18 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*pSrc16</td><td>points to the in-place buffer of Q15 data type. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoef16</td><td>points to twiddle coefficient buffer. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc16</td><td>points to the in-place buffer of Q15 data type </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoef16</td><td>points to twiddle coefficient buffer </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">twidCoefModifier</td><td>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a08bea9cb2c311d925224c0d6829edb8c">__QADD16()</a>, <a class="el" href="arm__math_8h.html#aad6f7afa72d784b95e6357c215a919bb">__QASX()</a>, <a class="el" href="arm__math_8h.html#a391f5f1d2e7cefaccfece0a49141ad47">__QSAX()</a>, <a class="el" href="arm__math_8h.html#a6e4703dc08d1b82eab7f5ef96edb59bb">__QSUB16()</a>, <a class="el" href="arm__math_8h.html#af3d7aff37a4472f1f2bc88eb3b97b526">__SHADD16()</a>, <a class="el" href="arm__math_8h.html#af60f220d422ebc524411f712544feecf">__SHASX()</a>, <a class="el" href="arm__math_8h.html#abbfbf3cfac1971b4b380c0cde120a85b">__SHSAX()</a>, <a class="el" href="arm__math_8h.html#a0987d147320a596bbdb537d70b23de73">__SHSUB16()</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a9c58d7b4648a973d91e27544bc190e60">__SMUADX()</a>, <a class="el" href="arm__math_8h.html#a6b293f62ad7eb225fa9ce0f39458eba3">__SMUSD()</a>, and <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>.</p>
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15()</a>, <a class="el" href="group__ComplexFFT.html#ga8d66cdac41b8bf6cefdb895456eee84a">arm_cfft_radix4_q15()</a>, and <a class="el" href="arm__cfft__q15_8c.html#abe669acc8db57d1fb9b1e2bba30f2224">arm_cfft_radix4by2_inverse_q15()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="abf1a2f9aa9f44ad5da1f0dbae8b54f2f"></a>
+<a class="anchor" id="a10af006080b7c9872dd9a538b79040da"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
@@ -311,7 +307,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pCoef16</em>, </td>
         </tr>
         <tr>
@@ -330,18 +326,14 @@
 <p>end of ComplexFFT group </p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*pSrc16</td><td>points to the in-place buffer of Q15 data type. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoef16</td><td>points to twiddle coefficient buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">twidCoefModifier</td><td>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc16</td><td>points to the in-place buffer of Q15 data type </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoef16</td><td>points to twiddle coefficient buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">twidCoefModifier</td><td>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a08bea9cb2c311d925224c0d6829edb8c">__QADD16()</a>, <a class="el" href="arm__math_8h.html#aad6f7afa72d784b95e6357c215a919bb">__QASX()</a>, <a class="el" href="arm__math_8h.html#a391f5f1d2e7cefaccfece0a49141ad47">__QSAX()</a>, <a class="el" href="arm__math_8h.html#a6e4703dc08d1b82eab7f5ef96edb59bb">__QSUB16()</a>, <a class="el" href="arm__math_8h.html#af3d7aff37a4472f1f2bc88eb3b97b526">__SHADD16()</a>, <a class="el" href="arm__math_8h.html#af60f220d422ebc524411f712544feecf">__SHASX()</a>, <a class="el" href="arm__math_8h.html#abbfbf3cfac1971b4b380c0cde120a85b">__SHSAX()</a>, <a class="el" href="arm__math_8h.html#a0987d147320a596bbdb537d70b23de73">__SHSUB16()</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a2eed05660fedbe3fbd0b6dbb1315cfc3">__SMUAD()</a>, <a class="el" href="arm__math_8h.html#a7375d1deba32929dc97008bfa7085d46">__SMUSDX()</a>, and <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>.</p>
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15()</a>, <a class="el" href="group__ComplexFFT.html#ga8d66cdac41b8bf6cefdb895456eee84a">arm_cfft_radix4_q15()</a>, and <a class="el" href="arm__cfft__q15_8c.html#af1d4a751153857c173511e0c77ab4fa9">arm_cfft_radix4by2_q15()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -351,7 +343,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_f93595924be31e3058e32faa649f9f3e.html">TransformFunctions</a></li><li class="navelem"><a class="el" href="arm__cfft__q15_8c.html">arm_cfft_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/arm__cfft__q31_8c.html b/docs/DSP/html/arm__cfft__q31_8c.html
index f8f61a5..e27b36a 100644
--- a/docs/DSP/html/arm__cfft__q31_8c.html
+++ b/docs/DSP/html/arm__cfft__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,20 +116,21 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ac12f1e7f159d5741358cdc36830a0395"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__q31_8c.html#ac12f1e7f159d5741358cdc36830a0395">arm_radix4_butterfly_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoef, uint32_t twidCoefModifier)</td></tr>
-<tr class="memdesc:ac12f1e7f159d5741358cdc36830a0395"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core function for the Q31 CFFT butterfly process.  <a href="#ac12f1e7f159d5741358cdc36830a0395">More...</a><br/></td></tr>
-<tr class="separator:ac12f1e7f159d5741358cdc36830a0395"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ac9c7c553114c1201a3a987a11b8a6d01"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__q31_8c.html#ac9c7c553114c1201a3a987a11b8a6d01">arm_radix4_butterfly_inverse_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoef, uint32_t twidCoefModifier)</td></tr>
-<tr class="memdesc:ac9c7c553114c1201a3a987a11b8a6d01"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core function for the Q31 CIFFT butterfly process.  <a href="#ac9c7c553114c1201a3a987a11b8a6d01">More...</a><br/></td></tr>
-<tr class="separator:ac9c7c553114c1201a3a987a11b8a6d01"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:af4d3481332146c3c703bf494baf23c45"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__q31_8c.html#af4d3481332146c3c703bf494baf23c45">arm_radix4_butterfly_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoef, uint32_t twidCoefModifier)</td></tr>
+<tr class="memdesc:af4d3481332146c3c703bf494baf23c45"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core function for the Q31 CFFT butterfly process.  <a href="#af4d3481332146c3c703bf494baf23c45">More...</a><br/></td></tr>
+<tr class="separator:af4d3481332146c3c703bf494baf23c45"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a053363aef7c6b41a61af7730c638c79b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__q31_8c.html#a053363aef7c6b41a61af7730c638c79b">arm_radix4_butterfly_inverse_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoef, uint32_t twidCoefModifier)</td></tr>
+<tr class="memdesc:a053363aef7c6b41a61af7730c638c79b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core function for the Q31 CIFFT butterfly process.  <a href="#a053363aef7c6b41a61af7730c638c79b">More...</a><br/></td></tr>
+<tr class="separator:a053363aef7c6b41a61af7730c638c79b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ac8e7ebe1cb131a5b0f55d0464640591f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__q31_8c.html#ac8e7ebe1cb131a5b0f55d0464640591f">arm_bitreversal_32</a> (uint32_t *pSrc, const uint16_t bitRevLen, const uint16_t *pBitRevTable)</td></tr>
+<tr class="memdesc:ac8e7ebe1cb131a5b0f55d0464640591f"><td class="mdescLeft">&#160;</td><td class="mdescRight">In-place 32 bit reversal function.  <a href="#ac8e7ebe1cb131a5b0f55d0464640591f">More...</a><br/></td></tr>
 <tr class="separator:ac8e7ebe1cb131a5b0f55d0464640591f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:af6df8bf714c30d44e6b871ea87d22b30"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__q31_8c.html#af6df8bf714c30d44e6b871ea87d22b30">arm_cfft_radix4by2_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoef)</td></tr>
 <tr class="separator:af6df8bf714c30d44e6b871ea87d22b30"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a3f3ae10bc2057cc1360abfa25f224c8c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__q31_8c.html#a3f3ae10bc2057cc1360abfa25f224c8c">arm_cfft_radix4by2_inverse_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoef)</td></tr>
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 <tr class="memitem:ga5a0008bd997ab6e2e299ef2fb272fb4b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31</a> (const <a class="el" href="structarm__cfft__instance__q31.html">arm_cfft_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *p1, uint8_t <a class="el" href="arm__fft__bin__example__f32_8c.html#a379ccb99013d369a41b49619083c16ef">ifftFlag</a>, uint8_t bitReverseFlag)</td></tr>
-<tr class="memdesc:ga5a0008bd997ab6e2e299ef2fb272fb4b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the fixed-point complex FFT in Q31 format.  <a href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">More...</a><br/></td></tr>
+<tr class="memdesc:ga5a0008bd997ab6e2e299ef2fb272fb4b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 complex FFT.  <a href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">More...</a><br/></td></tr>
 <tr class="separator:ga5a0008bd997ab6e2e299ef2fb272fb4b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <h2 class="groupheader">Function Documentation</h2>
@@ -153,7 +154,7 @@
           <td class="paramkey"></td>
           <td></td>
           <td class="paramtype">const uint16_t *&#160;</td>
-          <td class="paramname"><em>pBitRevTable</em>&#160;</td>
+          <td class="paramname"><em>pBitRevTab</em>&#160;</td>
         </tr>
         <tr>
           <td></td>
@@ -162,8 +163,15 @@
         </tr>
       </table>
 </div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31()</a>.</p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to in-place buffer of unknown 32-bit data type </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitRevLen</td><td>bit reversal table length </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pBitRevTab</td><td>points to bit reversal table </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -197,10 +205,6 @@
       </table>
 </div><div class="memdoc">
 
-<p>References <a class="el" href="arm__cfft__q31_8c.html#ac9c7c553114c1201a3a987a11b8a6d01">arm_radix4_butterfly_inverse_q31()</a>, <a class="el" href="arm__math_8h.html#a960f210642058d2b3d5368729a6e8375">mult_32x32_keep32_R</a>, <a class="el" href="arm__math_8h.html#aba3e538352fc7f9d6d15f9a18d469399">multAcc_32x32_keep32_R</a>, and <a class="el" href="arm__math_8h.html#a668fbf1cd1c3bc8faf1b1c83964ade23">multSub_32x32_keep32_R</a>.</p>
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="af6df8bf714c30d44e6b871ea87d22b30"></a>
@@ -234,13 +238,9 @@
 </div><div class="memdoc">
 <p>end of ComplexFFT group </p>
 
-<p>References <a class="el" href="arm__cfft__q31_8c.html#ac12f1e7f159d5741358cdc36830a0395">arm_radix4_butterfly_q31()</a>, <a class="el" href="arm__math_8h.html#a960f210642058d2b3d5368729a6e8375">mult_32x32_keep32_R</a>, <a class="el" href="arm__math_8h.html#aba3e538352fc7f9d6d15f9a18d469399">multAcc_32x32_keep32_R</a>, and <a class="el" href="arm__math_8h.html#a668fbf1cd1c3bc8faf1b1c83964ade23">multSub_32x32_keep32_R</a>.</p>
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31()</a>.</p>
-
 </div>
 </div>
-<a class="anchor" id="ac9c7c553114c1201a3a987a11b8a6d01"></a>
+<a class="anchor" id="a053363aef7c6b41a61af7730c638c79b"></a>
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         <tr>
           <td class="paramkey"></td>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pCoef</em>, </td>
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 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*pSrc</td><td>points to the in-place buffer of Q31 data type. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to the in-place buffer of Q31 data type. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoef</td><td>points to twiddle coefficient buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoef</td><td>points to twiddle coefficient buffer. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">twidCoefModifier</td><td>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#ad1b053da364f9fd82ca1a381df7590b6">__SIMD64</a>.</p>
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31()</a>, <a class="el" href="group__ComplexFFT.html#gafde3ee1f58cf393b45a9073174fff548">arm_cfft_radix4_q31()</a>, and <a class="el" href="arm__cfft__q31_8c.html#a3f3ae10bc2057cc1360abfa25f224c8c">arm_cfft_radix4by2_inverse_q31()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ac12f1e7f159d5741358cdc36830a0395"></a>
+<a class="anchor" id="af4d3481332146c3c703bf494baf23c45"></a>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pCoef</em>, </td>
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 <p>end of ComplexFFT group </p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*pSrc</td><td>points to the in-place buffer of Q31 data type. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to the in-place buffer of Q31 data type. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoef</td><td>points to twiddle coefficient buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoef</td><td>points to twiddle coefficient buffer. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">twidCoefModifier</td><td>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#ad1b053da364f9fd82ca1a381df7590b6">__SIMD64</a>.</p>
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31()</a>, <a class="el" href="group__ComplexFFT.html#gafde3ee1f58cf393b45a9073174fff548">arm_cfft_radix4_q31()</a>, and <a class="el" href="arm__cfft__q31_8c.html#af6df8bf714c30d44e6b871ea87d22b30">arm_cfft_radix4by2_q31()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -351,7 +343,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_f93595924be31e3058e32faa649f9f3e.html">TransformFunctions</a></li><li class="navelem"><a class="el" href="arm__cfft__q31_8c.html">arm_cfft_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,18 +116,19 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:a04631e102b5209af3402b225b1abe868"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix2__f32_8c.html#a04631e102b5209af3402b225b1abe868">arm_radix2_butterfly_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t fftLen, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoef, uint16_t twidCoefModifier)</td></tr>
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-<tr class="memitem:a3d4062fdfa6aaa3f51f41cab868e508b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix2__f32_8c.html#a3d4062fdfa6aaa3f51f41cab868e508b">arm_bitreversal_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint16_t <a class="el" href="arm__fft__bin__example__f32_8c.html#a9b500899c581f6df3ffc0a9f3a9ef6aa">fftSize</a>, uint16_t bitRevFactor, uint16_t *pBitRevTab)</td></tr>
-<tr class="separator:a3d4062fdfa6aaa3f51f41cab868e508b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:aa0577fd1717a219c08235967d877731d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix2__f32_8c.html#aa0577fd1717a219c08235967d877731d">arm_radix2_butterfly_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoef, uint16_t twidCoefModifier)</td></tr>
+<tr class="separator:aa0577fd1717a219c08235967d877731d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:abab72ded0de6645d6977cdb0e61b3a3b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix2__f32_8c.html#abab72ded0de6645d6977cdb0e61b3a3b">arm_radix2_butterfly_inverse_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoef, uint16_t twidCoefModifier, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> onebyfftLen)</td></tr>
+<tr class="separator:abab72ded0de6645d6977cdb0e61b3a3b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a81008b023cbc9d37b3ff849877d1eb52"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix2__f32_8c.html#a81008b023cbc9d37b3ff849877d1eb52">arm_bitreversal_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint16_t <a class="el" href="arm__fft__bin__example__f32_8c.html#a9b500899c581f6df3ffc0a9f3a9ef6aa">fftSize</a>, uint16_t bitRevFactor, const uint16_t *pBitRevTab)</td></tr>
+<tr class="memdesc:a81008b023cbc9d37b3ff849877d1eb52"><td class="mdescLeft">&#160;</td><td class="mdescRight">In-place floating-point bit reversal function.  <a href="#a81008b023cbc9d37b3ff849877d1eb52">More...</a><br/></td></tr>
+<tr class="separator:a81008b023cbc9d37b3ff849877d1eb52"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga9fadd650b802f612ae558ddaab789a6d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ComplexFFT.html#ga9fadd650b802f612ae558ddaab789a6d">arm_cfft_radix2_f32</a> (const <a class="el" href="structarm__cfft__radix2__instance__f32.html">arm_cfft_radix2_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc)</td></tr>
 <tr class="memdesc:ga9fadd650b802f612ae558ddaab789a6d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Radix-2 CFFT/CIFFT.  <a href="group__ComplexFFT.html#ga9fadd650b802f612ae558ddaab789a6d">More...</a><br/></td></tr>
 <tr class="separator:ga9fadd650b802f612ae558ddaab789a6d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="a3d4062fdfa6aaa3f51f41cab868e508b"></a>
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         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype">uint16_t *&#160;</td>
+          <td class="paramtype">const uint16_t *&#160;</td>
           <td class="paramname"><em>pBitRevTab</em>&#160;</td>
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         <tr>
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         </tr>
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-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga9fadd650b802f612ae558ddaab789a6d">arm_cfft_radix2_f32()</a>.</p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to in-place floating-point data buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftSize</td><td>length of FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitRevFactor</td><td>bit reversal modifier that supports different size FFTs with the same bit reversal table </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pBitRevTab</td><td>points to bit reversal table </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="a04631e102b5209af3402b225b1abe868"></a>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pCoef</em>, </td>
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         <tr>
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-<p>end of ComplexFFT group </p>
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga9fadd650b802f612ae558ddaab789a6d">arm_cfft_radix2_f32()</a>.</p>
+<p>end of ComplexFFT group brief Core function for the floating-point CFFT butterfly process. param[in,out] pSrc points to in-place buffer of floating-point data type param[in] fftLen length of the FFT param[in] pCoef points to twiddle coefficient buffer param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table return none </p>
 
 </div>
 </div>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pCoef</em>, </td>
         </tr>
         <tr>
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       </table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga9fadd650b802f612ae558ddaab789a6d">arm_cfft_radix2_f32()</a>.</p>
-
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@@ -260,7 +265,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/arm__cfft__radix2__init__q15_8c.html b/docs/DSP/html/arm__cfft__radix2__init__q15_8c.html
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_f93595924be31e3058e32faa649f9f3e.html">TransformFunctions</a></li><li class="navelem"><a class="el" href="arm__cfft__radix2__init__q15_8c.html">arm_cfft_radix2_init_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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-   &#160;<span id="projectnumber">Version 1.5.2</span>
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     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_f93595924be31e3058e32faa649f9f3e.html">TransformFunctions</a></li><li class="navelem"><a class="el" href="arm__cfft__radix2__init__q31_8c.html">arm_cfft_radix2_init_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__cfft__radix2__q15_8c.html b/docs/DSP/html/arm__cfft__radix2__q15_8c.html
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+++ b/docs/DSP/html/arm__cfft__radix2__q15_8c.html
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-   &#160;<span id="projectnumber">Version 1.5.2</span>
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@@ -116,18 +116,19 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:a521780ba2fd3450cbf02784e38859699"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix2__q15_8c.html#a521780ba2fd3450cbf02784e38859699">arm_radix2_butterfly_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t fftLen, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoef, uint16_t twidCoefModifier)</td></tr>
-<tr class="separator:a521780ba2fd3450cbf02784e38859699"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a91ff93fa10757b3872680fec4835c412"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix2__q15_8c.html#a91ff93fa10757b3872680fec4835c412">arm_radix2_butterfly_inverse_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t fftLen, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoef, uint16_t twidCoefModifier)</td></tr>
-<tr class="separator:a91ff93fa10757b3872680fec4835c412"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a73f48eaea9297605705ae25d3405343e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix2__q15_8c.html#a73f48eaea9297605705ae25d3405343e">arm_bitreversal_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t fftLen, uint16_t bitRevFactor, uint16_t *pBitRevTab)</td></tr>
-<tr class="separator:a73f48eaea9297605705ae25d3405343e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:abd0991b879ae7baf479040f8fbf82289"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix2__q15_8c.html#abd0991b879ae7baf479040f8fbf82289">arm_radix2_butterfly_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoef, uint16_t twidCoefModifier)</td></tr>
+<tr class="separator:abd0991b879ae7baf479040f8fbf82289"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a972f4e810203402dcf4cafdba7554a36"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix2__q15_8c.html#a972f4e810203402dcf4cafdba7554a36">arm_radix2_butterfly_inverse_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoef, uint16_t twidCoefModifier)</td></tr>
+<tr class="separator:a972f4e810203402dcf4cafdba7554a36"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a192ac22646c129779db528f2f322300d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix2__q15_8c.html#a192ac22646c129779db528f2f322300d">arm_bitreversal_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t fftLen, uint16_t bitRevFactor, const uint16_t *pBitRevTab)</td></tr>
+<tr class="memdesc:a192ac22646c129779db528f2f322300d"><td class="mdescLeft">&#160;</td><td class="mdescRight">In-place Q15 bit reversal function.  <a href="#a192ac22646c129779db528f2f322300d">More...</a><br/></td></tr>
+<tr class="separator:a192ac22646c129779db528f2f322300d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga55b424341dc3efd3fa0bcaaff4bdbf40"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ComplexFFT.html#ga55b424341dc3efd3fa0bcaaff4bdbf40">arm_cfft_radix2_q15</a> (const <a class="el" href="structarm__cfft__radix2__instance__q15.html">arm_cfft_radix2_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc)</td></tr>
 <tr class="memdesc:ga55b424341dc3efd3fa0bcaaff4bdbf40"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the fixed-point CFFT/CIFFT.  <a href="group__ComplexFFT.html#ga55b424341dc3efd3fa0bcaaff4bdbf40">More...</a><br/></td></tr>
 <tr class="separator:ga55b424341dc3efd3fa0bcaaff4bdbf40"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="a73f48eaea9297605705ae25d3405343e"></a>
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           <td class="memname">void arm_bitreversal_q15 </td>
           <td>(</td>
           <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
-          <td class="paramname"><em>pSrc</em>, </td>
+          <td class="paramname"><em>pSrc16</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
@@ -152,7 +153,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype">uint16_t *&#160;</td>
+          <td class="paramtype">const uint16_t *&#160;</td>
           <td class="paramname"><em>pBitRevTab</em>&#160;</td>
         </tr>
         <tr>
@@ -162,12 +163,20 @@
         </tr>
       </table>
 </div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga55b424341dc3efd3fa0bcaaff4bdbf40">arm_cfft_radix2_q15()</a>.</p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc16</td><td>points to in-place Q15 data buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitRevFactor</td><td>bit reversal modifier that supports different size FFTs with the same bit reversal table </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pBitRevTab</td><td>points to bit reversal table </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pCoef</em>, </td>
         </tr>
         <tr>
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       </table>
 </div><div class="memdoc">
 
-<p>References <a class="el" href="arm__math_8h.html#a08bea9cb2c311d925224c0d6829edb8c">__QADD16()</a>, <a class="el" href="arm__math_8h.html#a15e896d0146c280e600d00f609832350">__QSUB()</a>, <a class="el" href="arm__math_8h.html#a6e4703dc08d1b82eab7f5ef96edb59bb">__QSUB16()</a>, <a class="el" href="arm__math_8h.html#af3d7aff37a4472f1f2bc88eb3b97b526">__SHADD16()</a>, <a class="el" href="arm__math_8h.html#a9c58d7b4648a973d91e27544bc190e60">__SMUADX()</a>, <a class="el" href="arm__math_8h.html#a6b293f62ad7eb225fa9ce0f39458eba3">__SMUSD()</a>, and <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>.</p>
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga55b424341dc3efd3fa0bcaaff4bdbf40">arm_cfft_radix2_q15()</a>.</p>
-
 </div>
 </div>
-<a class="anchor" id="a521780ba2fd3450cbf02784e38859699"></a>
+<a class="anchor" id="abd0991b879ae7baf479040f8fbf82289"></a>
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           <td class="paramkey"></td>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pCoef</em>, </td>
         </tr>
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 <p>end of ComplexFFT group </p>
 
-<p>References <a class="el" href="arm__math_8h.html#a08bea9cb2c311d925224c0d6829edb8c">__QADD16()</a>, <a class="el" href="arm__math_8h.html#a6e4703dc08d1b82eab7f5ef96edb59bb">__QSUB16()</a>, <a class="el" href="arm__math_8h.html#af3d7aff37a4472f1f2bc88eb3b97b526">__SHADD16()</a>, <a class="el" href="arm__math_8h.html#a2eed05660fedbe3fbd0b6dbb1315cfc3">__SMUAD()</a>, <a class="el" href="arm__math_8h.html#a7375d1deba32929dc97008bfa7085d46">__SMUSDX()</a>, and <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>.</p>
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga55b424341dc3efd3fa0bcaaff4bdbf40">arm_cfft_radix2_q15()</a>.</p>
-
 </div>
 </div>
 </div><!-- contents -->
@@ -258,7 +259,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_f93595924be31e3058e32faa649f9f3e.html">TransformFunctions</a></li><li class="navelem"><a class="el" href="arm__cfft__radix2__q15_8c.html">arm_cfft_radix2_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__cfft__radix2__q31_8c.html b/docs/DSP/html/arm__cfft__radix2__q31_8c.html
index 9eb4529..34f511d 100644
--- a/docs/DSP/html/arm__cfft__radix2__q31_8c.html
+++ b/docs/DSP/html/arm__cfft__radix2__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,18 +116,19 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:a740f4fe69e6148d22fc99f374d304e7e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix2__q31_8c.html#a740f4fe69e6148d22fc99f374d304e7e">arm_radix2_butterfly_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoef, uint16_t twidCoefModifier)</td></tr>
-<tr class="separator:a740f4fe69e6148d22fc99f374d304e7e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a4d665f67080455b95cafec04009fd52d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix2__q31_8c.html#a4d665f67080455b95cafec04009fd52d">arm_radix2_butterfly_inverse_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoef, uint16_t twidCoefModifier)</td></tr>
-<tr class="separator:a4d665f67080455b95cafec04009fd52d"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a3fab577d25c3a517973c8c214f66f268"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix2__q31_8c.html#a3fab577d25c3a517973c8c214f66f268">arm_bitreversal_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, uint16_t bitRevFactor, uint16_t *pBitRevTab)</td></tr>
-<tr class="separator:a3fab577d25c3a517973c8c214f66f268"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a36c1ec7fd1c2aa80d50979b6bf2a55ef"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix2__q31_8c.html#a36c1ec7fd1c2aa80d50979b6bf2a55ef">arm_radix2_butterfly_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoef, uint16_t twidCoefModifier)</td></tr>
+<tr class="separator:a36c1ec7fd1c2aa80d50979b6bf2a55ef"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a07d1c0ad42637bee8be7482cab5c8956"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix2__q31_8c.html#a07d1c0ad42637bee8be7482cab5c8956">arm_radix2_butterfly_inverse_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoef, uint16_t twidCoefModifier)</td></tr>
+<tr class="separator:a07d1c0ad42637bee8be7482cab5c8956"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a82acdff1d26c7021c2a016a6e7e9eaf8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix2__q31_8c.html#a82acdff1d26c7021c2a016a6e7e9eaf8">arm_bitreversal_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, uint16_t bitRevFactor, const uint16_t *pBitRevTab)</td></tr>
+<tr class="memdesc:a82acdff1d26c7021c2a016a6e7e9eaf8"><td class="mdescLeft">&#160;</td><td class="mdescRight">In-place Q31 bit reversal function.  <a href="#a82acdff1d26c7021c2a016a6e7e9eaf8">More...</a><br/></td></tr>
+<tr class="separator:a82acdff1d26c7021c2a016a6e7e9eaf8"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga6321f703ec87a274aedaab33d3e766b4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ComplexFFT.html#ga6321f703ec87a274aedaab33d3e766b4">arm_cfft_radix2_q31</a> (const <a class="el" href="structarm__cfft__radix2__instance__q31.html">arm_cfft_radix2_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc)</td></tr>
 <tr class="memdesc:ga6321f703ec87a274aedaab33d3e766b4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the fixed-point CFFT/CIFFT.  <a href="group__ComplexFFT.html#ga6321f703ec87a274aedaab33d3e766b4">More...</a><br/></td></tr>
 <tr class="separator:ga6321f703ec87a274aedaab33d3e766b4"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="a3fab577d25c3a517973c8c214f66f268"></a>
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@@ -152,7 +153,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype">uint16_t *&#160;</td>
+          <td class="paramtype">const uint16_t *&#160;</td>
           <td class="paramname"><em>pBitRevTab</em>&#160;</td>
         </tr>
         <tr>
@@ -162,12 +163,20 @@
         </tr>
       </table>
 </div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga6321f703ec87a274aedaab33d3e766b4">arm_cfft_radix2_q31()</a>.</p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to in-place Q31 data buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of FFT. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitRevFactor</td><td>bit reversal modifier that supports different size FFTs with the same bit reversal table </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pBitRevTab</td><td>points to bit reversal table </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="a4d665f67080455b95cafec04009fd52d"></a>
+<a class="anchor" id="a07d1c0ad42637bee8be7482cab5c8956"></a>
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 <div class="memproto">
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           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pCoef</em>, </td>
         </tr>
         <tr>
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       </table>
 </div><div class="memdoc">
 
-<p>References <a class="el" href="arm__math_8h.html#a960f210642058d2b3d5368729a6e8375">mult_32x32_keep32_R</a>, <a class="el" href="arm__math_8h.html#aba3e538352fc7f9d6d15f9a18d469399">multAcc_32x32_keep32_R</a>, and <a class="el" href="arm__math_8h.html#a668fbf1cd1c3bc8faf1b1c83964ade23">multSub_32x32_keep32_R</a>.</p>
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga6321f703ec87a274aedaab33d3e766b4">arm_cfft_radix2_q31()</a>.</p>
-
 </div>
 </div>
-<a class="anchor" id="a740f4fe69e6148d22fc99f374d304e7e"></a>
+<a class="anchor" id="a36c1ec7fd1c2aa80d50979b6bf2a55ef"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
@@ -228,7 +233,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pCoef</em>, </td>
         </tr>
         <tr>
@@ -246,10 +251,6 @@
 </div><div class="memdoc">
 <p>end of ComplexFFT group </p>
 
-<p>References <a class="el" href="arm__math_8h.html#a960f210642058d2b3d5368729a6e8375">mult_32x32_keep32_R</a>, <a class="el" href="arm__math_8h.html#aba3e538352fc7f9d6d15f9a18d469399">multAcc_32x32_keep32_R</a>, and <a class="el" href="arm__math_8h.html#a668fbf1cd1c3bc8faf1b1c83964ade23">multSub_32x32_keep32_R</a>.</p>
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga6321f703ec87a274aedaab33d3e766b4">arm_cfft_radix2_q31()</a>.</p>
-
 </div>
 </div>
 </div><!-- contents -->
@@ -258,7 +259,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_f93595924be31e3058e32faa649f9f3e.html">TransformFunctions</a></li><li class="navelem"><a class="el" href="arm__cfft__radix2__q31_8c.html">arm_cfft_radix2_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__cfft__radix4__f32_8c.html b/docs/DSP/html/arm__cfft__radix4__f32_8c.html
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+++ b/docs/DSP/html/arm__cfft__radix4__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,18 +116,19 @@
 <table class="memberdecls">
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 Functions</h2></td></tr>
-<tr class="memitem:a3d4062fdfa6aaa3f51f41cab868e508b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix4__f32_8c.html#a3d4062fdfa6aaa3f51f41cab868e508b">arm_bitreversal_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint16_t <a class="el" href="arm__fft__bin__example__f32_8c.html#a9b500899c581f6df3ffc0a9f3a9ef6aa">fftSize</a>, uint16_t bitRevFactor, uint16_t *pBitRevTab)</td></tr>
-<tr class="separator:a3d4062fdfa6aaa3f51f41cab868e508b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ae239ddf995d1607115f9e84d5c069b9c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix4__f32_8c.html#ae239ddf995d1607115f9e84d5c069b9c">arm_radix4_butterfly_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint16_t fftLen, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoef, uint16_t twidCoefModifier)</td></tr>
-<tr class="separator:ae239ddf995d1607115f9e84d5c069b9c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a2a78df6e4bbf080624f2b6349224ec93"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix4__f32_8c.html#a2a78df6e4bbf080624f2b6349224ec93">arm_radix4_butterfly_inverse_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint16_t fftLen, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoef, uint16_t twidCoefModifier, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> onebyfftLen)</td></tr>
-<tr class="separator:a2a78df6e4bbf080624f2b6349224ec93"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a81008b023cbc9d37b3ff849877d1eb52"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix4__f32_8c.html#a81008b023cbc9d37b3ff849877d1eb52">arm_bitreversal_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint16_t <a class="el" href="arm__fft__bin__example__f32_8c.html#a9b500899c581f6df3ffc0a9f3a9ef6aa">fftSize</a>, uint16_t bitRevFactor, const uint16_t *pBitRevTab)</td></tr>
+<tr class="memdesc:a81008b023cbc9d37b3ff849877d1eb52"><td class="mdescLeft">&#160;</td><td class="mdescRight">In-place floating-point bit reversal function.  <a href="#a81008b023cbc9d37b3ff849877d1eb52">More...</a><br/></td></tr>
+<tr class="separator:a81008b023cbc9d37b3ff849877d1eb52"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ac00819467b00656801a5f6a9a5e6d824"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix4__f32_8c.html#ac00819467b00656801a5f6a9a5e6d824">arm_radix4_butterfly_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint16_t fftLen, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoef, uint16_t twidCoefModifier)</td></tr>
+<tr class="separator:ac00819467b00656801a5f6a9a5e6d824"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ab3c001e14852633e343079f97cd96f44"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix4__f32_8c.html#ab3c001e14852633e343079f97cd96f44">arm_radix4_butterfly_inverse_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint16_t fftLen, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoef, uint16_t twidCoefModifier, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> onebyfftLen)</td></tr>
+<tr class="separator:ab3c001e14852633e343079f97cd96f44"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga521f670cd9c571bc61aff9bec89f4c26"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ComplexFFT.html#ga521f670cd9c571bc61aff9bec89f4c26">arm_cfft_radix4_f32</a> (const <a class="el" href="structarm__cfft__radix4__instance__f32.html">arm_cfft_radix4_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc)</td></tr>
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 <tr class="separator:ga521f670cd9c571bc61aff9bec89f4c26"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="a3d4062fdfa6aaa3f51f41cab868e508b"></a>
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           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype">uint16_t *&#160;</td>
+          <td class="paramtype">const uint16_t *&#160;</td>
           <td class="paramname"><em>pBitRevTab</em>&#160;</td>
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         <tr>
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-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga521f670cd9c571bc61aff9bec89f4c26">arm_cfft_radix4_f32()</a>.</p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to in-place floating-point data buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftSize</td><td>length of FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitRevFactor</td><td>bit reversal modifier that supports different size FFTs with the same bit reversal table </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pBitRevTab</td><td>points to bit reversal table </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ae239ddf995d1607115f9e84d5c069b9c"></a>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pCoef</em>, </td>
         </tr>
         <tr>
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       </table>
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-<p>end of ComplexFFT group </p>
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga521f670cd9c571bc61aff9bec89f4c26">arm_cfft_radix4_f32()</a>, and <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32()</a>.</p>
+<p>end of ComplexFFT group brief Core function for the floating-point CFFT butterfly process. param[in,out] pSrc points to the in-place buffer of floating-point data type param[in] fftLen length of the FFT param[in] pCoef points to the twiddle coefficient buffer param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table return none </p>
 
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 </div>
-<a class="anchor" id="a2a78df6e4bbf080624f2b6349224ec93"></a>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pCoef</em>, </td>
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-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga521f670cd9c571bc61aff9bec89f4c26">arm_cfft_radix4_f32()</a>, and <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32()</a>.</p>
+<p>brief Core function for the floating-point CIFFT butterfly process. param[in,out] pSrc points to the in-place buffer of floating-point data type param[in] fftLen length of the FFT param[in] pCoef points to twiddle coefficient buffer param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. param[in] onebyfftLen value of 1/fftLen return none </p>
 
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 </div>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:a2d01d2045f280c32036da97d33c52440"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix4__q15_8c.html#a2d01d2045f280c32036da97d33c52440">arm_radix4_butterfly_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc16, uint32_t fftLen, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoef16, uint32_t twidCoefModifier)</td></tr>
-<tr class="memdesc:a2d01d2045f280c32036da97d33c52440"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core function for the Q15 CFFT butterfly process.  <a href="#a2d01d2045f280c32036da97d33c52440">More...</a><br/></td></tr>
-<tr class="separator:a2d01d2045f280c32036da97d33c52440"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:aad04e8439d17dab5617bf1be268bb391"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix4__q15_8c.html#aad04e8439d17dab5617bf1be268bb391">arm_radix4_butterfly_inverse_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc16, uint32_t fftLen, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoef16, uint32_t twidCoefModifier)</td></tr>
-<tr class="memdesc:aad04e8439d17dab5617bf1be268bb391"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core function for the Q15 CIFFT butterfly process.  <a href="#aad04e8439d17dab5617bf1be268bb391">More...</a><br/></td></tr>
-<tr class="separator:aad04e8439d17dab5617bf1be268bb391"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a73f48eaea9297605705ae25d3405343e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix4__q15_8c.html#a73f48eaea9297605705ae25d3405343e">arm_bitreversal_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t fftLen, uint16_t bitRevFactor, uint16_t *pBitRevTab)</td></tr>
-<tr class="separator:a73f48eaea9297605705ae25d3405343e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:af337f7275e22af2196f61c94a0ca079a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix4__q15_8c.html#af337f7275e22af2196f61c94a0ca079a">arm_radix4_butterfly_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc16, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoef16, uint32_t twidCoefModifier)</td></tr>
+<tr class="memdesc:af337f7275e22af2196f61c94a0ca079a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core function for the Q15 CFFT butterfly process.  <a href="#af337f7275e22af2196f61c94a0ca079a">More...</a><br/></td></tr>
+<tr class="separator:af337f7275e22af2196f61c94a0ca079a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:af65a7f0397b531999b7bd21e0b3a1f9f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix4__q15_8c.html#af65a7f0397b531999b7bd21e0b3a1f9f">arm_radix4_butterfly_inverse_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc16, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoef16, uint32_t twidCoefModifier)</td></tr>
+<tr class="memdesc:af65a7f0397b531999b7bd21e0b3a1f9f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core function for the Q15 CIFFT butterfly process.  <a href="#af65a7f0397b531999b7bd21e0b3a1f9f">More...</a><br/></td></tr>
+<tr class="separator:af65a7f0397b531999b7bd21e0b3a1f9f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a192ac22646c129779db528f2f322300d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix4__q15_8c.html#a192ac22646c129779db528f2f322300d">arm_bitreversal_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t fftLen, uint16_t bitRevFactor, const uint16_t *pBitRevTab)</td></tr>
+<tr class="memdesc:a192ac22646c129779db528f2f322300d"><td class="mdescLeft">&#160;</td><td class="mdescRight">In-place Q15 bit reversal function.  <a href="#a192ac22646c129779db528f2f322300d">More...</a><br/></td></tr>
+<tr class="separator:a192ac22646c129779db528f2f322300d"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 <tr class="memdesc:ga8d66cdac41b8bf6cefdb895456eee84a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 CFFT/CIFFT.  <a href="group__ComplexFFT.html#ga8d66cdac41b8bf6cefdb895456eee84a">More...</a><br/></td></tr>
 <tr class="separator:ga8d66cdac41b8bf6cefdb895456eee84a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="a73f48eaea9297605705ae25d3405343e"></a>
+<a class="anchor" id="a192ac22646c129779db528f2f322300d"></a>
 <div class="memitem">
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@@ -137,7 +138,7 @@
           <td class="memname">void arm_bitreversal_q15 </td>
           <td>(</td>
           <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
-          <td class="paramname"><em>pSrc</em>, </td>
+          <td class="paramname"><em>pSrc16</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
@@ -154,7 +155,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype">uint16_t *&#160;</td>
+          <td class="paramtype">const uint16_t *&#160;</td>
           <td class="paramname"><em>pBitRevTab</em>&#160;</td>
         </tr>
         <tr>
@@ -164,12 +165,20 @@
         </tr>
       </table>
 </div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga8d66cdac41b8bf6cefdb895456eee84a">arm_cfft_radix4_q15()</a>.</p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc16</td><td>points to in-place Q15 data buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitRevFactor</td><td>bit reversal modifier that supports different size FFTs with the same bit reversal table </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pBitRevTab</td><td>points to bit reversal table </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="aad04e8439d17dab5617bf1be268bb391"></a>
+<a class="anchor" id="af65a7f0397b531999b7bd21e0b3a1f9f"></a>
 <div class="memitem">
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@@ -188,7 +197,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pCoef16</em>, </td>
         </tr>
         <tr>
@@ -206,22 +215,18 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*pSrc16</td><td>points to the in-place buffer of Q15 data type. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoef16</td><td>points to twiddle coefficient buffer. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc16</td><td>points to the in-place buffer of Q15 data type </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoef16</td><td>points to twiddle coefficient buffer </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">twidCoefModifier</td><td>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a08bea9cb2c311d925224c0d6829edb8c">__QADD16()</a>, <a class="el" href="arm__math_8h.html#aad6f7afa72d784b95e6357c215a919bb">__QASX()</a>, <a class="el" href="arm__math_8h.html#a391f5f1d2e7cefaccfece0a49141ad47">__QSAX()</a>, <a class="el" href="arm__math_8h.html#a6e4703dc08d1b82eab7f5ef96edb59bb">__QSUB16()</a>, <a class="el" href="arm__math_8h.html#af3d7aff37a4472f1f2bc88eb3b97b526">__SHADD16()</a>, <a class="el" href="arm__math_8h.html#af60f220d422ebc524411f712544feecf">__SHASX()</a>, <a class="el" href="arm__math_8h.html#abbfbf3cfac1971b4b380c0cde120a85b">__SHSAX()</a>, <a class="el" href="arm__math_8h.html#a0987d147320a596bbdb537d70b23de73">__SHSUB16()</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a9c58d7b4648a973d91e27544bc190e60">__SMUADX()</a>, <a class="el" href="arm__math_8h.html#a6b293f62ad7eb225fa9ce0f39458eba3">__SMUSD()</a>, and <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>.</p>
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15()</a>, <a class="el" href="group__ComplexFFT.html#ga8d66cdac41b8bf6cefdb895456eee84a">arm_cfft_radix4_q15()</a>, and <a class="el" href="arm__cfft__q15_8c.html#abe669acc8db57d1fb9b1e2bba30f2224">arm_cfft_radix4by2_inverse_q15()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="a2d01d2045f280c32036da97d33c52440"></a>
+<a class="anchor" id="af337f7275e22af2196f61c94a0ca079a"></a>
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@@ -240,7 +245,7 @@
         <tr>
           <td class="paramkey"></td>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pCoef16</em>, </td>
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         <tr>
@@ -259,18 +264,14 @@
 <p>end of ComplexFFT group </p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*pSrc16</td><td>points to the in-place buffer of Q15 data type. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoef16</td><td>points to twiddle coefficient buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">twidCoefModifier</td><td>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc16</td><td>points to the in-place buffer of Q15 data type </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoef16</td><td>points to twiddle coefficient buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">twidCoefModifier</td><td>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a08bea9cb2c311d925224c0d6829edb8c">__QADD16()</a>, <a class="el" href="arm__math_8h.html#aad6f7afa72d784b95e6357c215a919bb">__QASX()</a>, <a class="el" href="arm__math_8h.html#a391f5f1d2e7cefaccfece0a49141ad47">__QSAX()</a>, <a class="el" href="arm__math_8h.html#a6e4703dc08d1b82eab7f5ef96edb59bb">__QSUB16()</a>, <a class="el" href="arm__math_8h.html#af3d7aff37a4472f1f2bc88eb3b97b526">__SHADD16()</a>, <a class="el" href="arm__math_8h.html#af60f220d422ebc524411f712544feecf">__SHASX()</a>, <a class="el" href="arm__math_8h.html#abbfbf3cfac1971b4b380c0cde120a85b">__SHSAX()</a>, <a class="el" href="arm__math_8h.html#a0987d147320a596bbdb537d70b23de73">__SHSUB16()</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a2eed05660fedbe3fbd0b6dbb1315cfc3">__SMUAD()</a>, <a class="el" href="arm__math_8h.html#a7375d1deba32929dc97008bfa7085d46">__SMUSDX()</a>, and <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>.</p>
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15()</a>, <a class="el" href="group__ComplexFFT.html#ga8d66cdac41b8bf6cefdb895456eee84a">arm_cfft_radix4_q15()</a>, and <a class="el" href="arm__cfft__q15_8c.html#af1d4a751153857c173511e0c77ab4fa9">arm_cfft_radix4by2_q15()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -280,7 +281,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_f93595924be31e3058e32faa649f9f3e.html">TransformFunctions</a></li><li class="navelem"><a class="el" href="arm__cfft__radix4__q15_8c.html">arm_cfft_radix4_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/arm__cfft__radix4__q31_8c.html b/docs/DSP/html/arm__cfft__radix4__q31_8c.html
index 66ecf54..0b174ac 100644
--- a/docs/DSP/html/arm__cfft__radix4__q31_8c.html
+++ b/docs/DSP/html/arm__cfft__radix4__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,20 +116,21 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ac9c7c553114c1201a3a987a11b8a6d01"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix4__q31_8c.html#ac9c7c553114c1201a3a987a11b8a6d01">arm_radix4_butterfly_inverse_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoef, uint32_t twidCoefModifier)</td></tr>
-<tr class="memdesc:ac9c7c553114c1201a3a987a11b8a6d01"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core function for the Q31 CIFFT butterfly process.  <a href="#ac9c7c553114c1201a3a987a11b8a6d01">More...</a><br/></td></tr>
-<tr class="separator:ac9c7c553114c1201a3a987a11b8a6d01"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ac12f1e7f159d5741358cdc36830a0395"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix4__q31_8c.html#ac12f1e7f159d5741358cdc36830a0395">arm_radix4_butterfly_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoef, uint32_t twidCoefModifier)</td></tr>
-<tr class="memdesc:ac12f1e7f159d5741358cdc36830a0395"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core function for the Q31 CFFT butterfly process.  <a href="#ac12f1e7f159d5741358cdc36830a0395">More...</a><br/></td></tr>
-<tr class="separator:ac12f1e7f159d5741358cdc36830a0395"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a3fab577d25c3a517973c8c214f66f268"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix4__q31_8c.html#a3fab577d25c3a517973c8c214f66f268">arm_bitreversal_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, uint16_t bitRevFactor, uint16_t *pBitRevTab)</td></tr>
-<tr class="separator:a3fab577d25c3a517973c8c214f66f268"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a053363aef7c6b41a61af7730c638c79b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix4__q31_8c.html#a053363aef7c6b41a61af7730c638c79b">arm_radix4_butterfly_inverse_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoef, uint32_t twidCoefModifier)</td></tr>
+<tr class="memdesc:a053363aef7c6b41a61af7730c638c79b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core function for the Q31 CIFFT butterfly process.  <a href="#a053363aef7c6b41a61af7730c638c79b">More...</a><br/></td></tr>
+<tr class="separator:a053363aef7c6b41a61af7730c638c79b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:af4d3481332146c3c703bf494baf23c45"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix4__q31_8c.html#af4d3481332146c3c703bf494baf23c45">arm_radix4_butterfly_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoef, uint32_t twidCoefModifier)</td></tr>
+<tr class="memdesc:af4d3481332146c3c703bf494baf23c45"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core function for the Q31 CFFT butterfly process.  <a href="#af4d3481332146c3c703bf494baf23c45">More...</a><br/></td></tr>
+<tr class="separator:af4d3481332146c3c703bf494baf23c45"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a82acdff1d26c7021c2a016a6e7e9eaf8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__cfft__radix4__q31_8c.html#a82acdff1d26c7021c2a016a6e7e9eaf8">arm_bitreversal_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, uint16_t bitRevFactor, const uint16_t *pBitRevTab)</td></tr>
+<tr class="memdesc:a82acdff1d26c7021c2a016a6e7e9eaf8"><td class="mdescLeft">&#160;</td><td class="mdescRight">In-place Q31 bit reversal function.  <a href="#a82acdff1d26c7021c2a016a6e7e9eaf8">More...</a><br/></td></tr>
+<tr class="separator:a82acdff1d26c7021c2a016a6e7e9eaf8"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gafde3ee1f58cf393b45a9073174fff548"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ComplexFFT.html#gafde3ee1f58cf393b45a9073174fff548">arm_cfft_radix4_q31</a> (const <a class="el" href="structarm__cfft__radix4__instance__q31.html">arm_cfft_radix4_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc)</td></tr>
 <tr class="memdesc:gafde3ee1f58cf393b45a9073174fff548"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 CFFT/CIFFT.  <a href="group__ComplexFFT.html#gafde3ee1f58cf393b45a9073174fff548">More...</a><br/></td></tr>
 <tr class="separator:gafde3ee1f58cf393b45a9073174fff548"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="a3fab577d25c3a517973c8c214f66f268"></a>
+<a class="anchor" id="a82acdff1d26c7021c2a016a6e7e9eaf8"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
@@ -154,7 +155,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype">uint16_t *&#160;</td>
+          <td class="paramtype">const uint16_t *&#160;</td>
           <td class="paramname"><em>pBitRevTab</em>&#160;</td>
         </tr>
         <tr>
@@ -164,12 +165,20 @@
         </tr>
       </table>
 </div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#gafde3ee1f58cf393b45a9073174fff548">arm_cfft_radix4_q31()</a>.</p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to in-place Q31 data buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of FFT. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitRevFactor</td><td>bit reversal modifier that supports different size FFTs with the same bit reversal table </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pBitRevTab</td><td>points to bit reversal table </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ac9c7c553114c1201a3a987a11b8a6d01"></a>
+<a class="anchor" id="a053363aef7c6b41a61af7730c638c79b"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
@@ -188,7 +197,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pCoef</em>, </td>
         </tr>
         <tr>
@@ -206,22 +215,18 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*pSrc</td><td>points to the in-place buffer of Q31 data type. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to the in-place buffer of Q31 data type. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoef</td><td>points to twiddle coefficient buffer. </td></tr>
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-<p>References <a class="el" href="arm__math_8h.html#ad1b053da364f9fd82ca1a381df7590b6">__SIMD64</a>.</p>
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 <p>end of ComplexFFT group </p>
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   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*pSrc</td><td>points to the in-place buffer of Q31 data type. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to the in-place buffer of Q31 data type. </td></tr>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoef</td><td>points to twiddle coefficient buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoef</td><td>points to twiddle coefficient buffer. </td></tr>
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-<p>References <a class="el" href="arm__math_8h.html#ad1b053da364f9fd82ca1a381df7590b6">__SIMD64</a>.</p>
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-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31()</a>, <a class="el" href="group__ComplexFFT.html#gafde3ee1f58cf393b45a9073174fff548">arm_cfft_radix4_q31()</a>, and <a class="el" href="arm__cfft__q31_8c.html#af6df8bf714c30d44e6b871ea87d22b30">arm_cfft_radix4by2_q31()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/arm__cfft__radix8__f32_8c.html b/docs/DSP/html/arm__cfft__radix8__f32_8c.html
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-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80">arm_cfft_f32()</a>, <a class="el" href="arm__cfft__f32_8c.html#ae99e2b173033e9910058869bdf0619d9">arm_cfft_radix8by2_f32()</a>, and <a class="el" href="arm__cfft__f32_8c.html#a4bb346f59bca06cebe0defc8e15b69a6">arm_cfft_radix8by4_f32()</a>.</p>
+<p>brief Core function for the floating-point CFFT butterfly process. param[in,out] pSrc points to the in-place buffer of floating-point data type. param[in] fftLen length of the FFT. param[in] pCoef points to the twiddle coefficient buffer. param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. return none </p>
 
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/arm__class__marks__example_2Abstract_8txt.html b/docs/DSP/html/arm__class__marks__example_2Abstract_8txt.html
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   <ul>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/arm__class__marks__example__f32_8c.html b/docs/DSP/html/arm__class__marks__example__f32_8c.html
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-<p>Referenced by <a class="el" href="arm__class__marks__example__f32_8c.html#a196718f834091385d38586a0ce4009dc">main()</a>.</p>
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-<p>References <a class="el" href="group__MatrixInit.html#ga11e3dc41592a6401c13182fef9416a27">arm_mat_init_f32()</a>, <a class="el" href="group__MatrixMult.html#ga917bf0270310c1d3f0eda1fc7c0026a0">arm_mat_mult_f32()</a>, <a class="el" href="group__Max.html#ga5b89d1b04575aeec494f678695fb87d8">arm_max_f32()</a>, <a class="el" href="group__mean.html#ga74ce08c49ab61e57bd50c3a0ca1fdb2b">arm_mean_f32()</a>, <a class="el" href="group__Min.html#gaf62b1673740fc516ea64daf777b7d74a">arm_min_f32()</a>, <a class="el" href="group__STD.html#ga4969b5b5f3d001377bc401a3ee99dfc2">arm_std_f32()</a>, <a class="el" href="group__variance.html#ga393f26c5a3bfa05624fb8d32232a6d96">arm_var_f32()</a>, <a class="el" href="arm__class__marks__example__f32_8c.html#aad32888fa966b3d9db9c31bcbba9d9ef">max_marks</a>, <a class="el" href="arm__class__marks__example__f32_8c.html#acc9290716b3c97381ce52d14b4b01681">mean</a>, <a class="el" href="arm__class__marks__example__f32_8c.html#abb7687fa07ec54d8e792cfcbfe2ca809">min_marks</a>, <a class="el" href="arm__class__marks__example__f32_8c.html#a9d89ac0707e7c9363544986d47a70bd3">NUMSTUDENTS</a>, <a class="el" href="arm__class__marks__example__f32_8c.html#ab3b66d06b4af1af4ea2740d0ccf4e7bd">numStudents</a>, <a class="el" href="arm__class__marks__example__f32_8c.html#a7b02f9b34bf2cd4d12633f5bf30771ec">NUMSUBJECTS</a>, <a class="el" href="arm__class__marks__example__f32_8c.html#a3d01884f63bcb694226ca7c24980757a">numSubjects</a>, <a class="el" href="arm__class__marks__example__f32_8c.html#a150b0cf729b51893379f5b5548d4f989">std</a>, <a class="el" href="arm__class__marks__example__f32_8c.html#a798cf43a3725d7df2fcaf3f328969f53">student_num</a>, <a class="el" href="arm__class__marks__example__f32_8c.html#a0153222efa82b7f1a0ea3835921bf921">testMarks_f32</a>, <a class="el" href="arm__class__marks__example__f32_8c.html#afd4d61aad5f35a4e42d580004e2f9a1d">testOutput</a>, <a class="el" href="arm__class__marks__example__f32_8c.html#a993b9b2a1faf43b319c1c6d58b26e7a1">testUnity_f32</a>, and <a class="el" href="arm__class__marks__example__f32_8c.html#a3bd39c4335d84be071cc1eaa9b0a8642">var</a>.</p>
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-<p>Referenced by <a class="el" href="arm__class__marks__example__f32_8c.html#a196718f834091385d38586a0ce4009dc">main()</a>.</p>
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-<p>Referenced by <a class="el" href="group__STD.html#ga4969b5b5f3d001377bc401a3ee99dfc2">arm_std_f32()</a>, and <a class="el" href="arm__class__marks__example__f32_8c.html#a196718f834091385d38586a0ce4009dc">main()</a>.</p>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-<tr class="separator:gaf47689ae07962acaecb8ddde556df4a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-<tr class="separator:gafecc94879a383c5208ec3ef99485e4b5"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__cmplx__dot__prod__f32_8c.html b/docs/DSP/html/arm__cmplx__dot__prod__f32_8c.html
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@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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-<tr class="separator:gadcfaf567a25eb641da4043eafb9bb076"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga93796e73f02771cf6fe13de016e296ed"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__dot__prod.html#ga93796e73f02771cf6fe13de016e296ed">arm_cmplx_dot_prod_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, uint32_t numSamples, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *realResult, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *imagResult)</td></tr>
+<tr class="memdesc:ga93796e73f02771cf6fe13de016e296ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex dot product.  <a href="group__cmplx__dot__prod.html#ga93796e73f02771cf6fe13de016e296ed">More...</a><br/></td></tr>
+<tr class="separator:ga93796e73f02771cf6fe13de016e296ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 </div><!-- contents -->
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@@ -126,7 +126,7 @@
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   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_a3413d16a2695ab37a70c8c03c616c68.html">ComplexMathFunctions</a></li><li class="navelem"><a class="el" href="arm__cmplx__dot__prod__f32_8c.html">arm_cmplx_dot_prod_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__cmplx__dot__prod__q15_8c.html b/docs/DSP/html/arm__cmplx__dot__prod__q15_8c.html
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+++ b/docs/DSP/html/arm__cmplx__dot__prod__q15_8c.html
@@ -32,7 +32,7 @@
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-   &#160;<span id="projectnumber">Version 1.5.2</span>
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-<tr class="separator:ga2b08b5e8001d2c15204639d00893fc70"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae712971379c461cfb8bef7e423bf8417"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__dot__prod.html#gae712971379c461cfb8bef7e423bf8417">arm_cmplx_dot_prod_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t numSamples, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *realResult, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *imagResult)</td></tr>
+<tr class="memdesc:gae712971379c461cfb8bef7e423bf8417"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex dot product.  <a href="group__cmplx__dot__prod.html#gae712971379c461cfb8bef7e423bf8417">More...</a><br/></td></tr>
+<tr class="separator:gae712971379c461cfb8bef7e423bf8417"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 </div><!-- contents -->
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@@ -126,7 +126,7 @@
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   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_a3413d16a2695ab37a70c8c03c616c68.html">ComplexMathFunctions</a></li><li class="navelem"><a class="el" href="arm__cmplx__dot__prod__q15_8c.html">arm_cmplx_dot_prod_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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+++ b/docs/DSP/html/arm__cmplx__dot__prod__q31_8c.html
@@ -32,7 +32,7 @@
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 <table class="memberdecls">
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-<tr class="memitem:ga5b731a59db062a9ad84562ef68a6c8af"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__dot__prod.html#ga5b731a59db062a9ad84562ef68a6c8af">arm_cmplx_dot_prod_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t numSamples, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *realResult, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *imagResult)</td></tr>
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+<tr class="memdesc:gaa90661b5eee3b6d83a149043ada0eb37"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex dot product.  <a href="group__cmplx__dot__prod.html#gaa90661b5eee3b6d83a149043ada0eb37">More...</a><br/></td></tr>
+<tr class="separator:gaa90661b5eee3b6d83a149043ada0eb37"><td class="memSeparator" colspan="2">&#160;</td></tr>
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@@ -126,7 +126,7 @@
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   <ul>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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--- a/docs/DSP/html/arm__cmplx__mag__f32_8c.html
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
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-<tr class="memdesc:gae45024c497392cde2ae358a76d435213"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex magnitude.  <a href="group__cmplx__mag.html#gae45024c497392cde2ae358a76d435213">More...</a><br/></td></tr>
-<tr class="separator:gae45024c497392cde2ae358a76d435213"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memdesc:gaba4e0eff7816fe80d01121fb4cf6c6bc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex magnitude.  <a href="group__cmplx__mag.html#gaba4e0eff7816fe80d01121fb4cf6c6bc">More...</a><br/></td></tr>
+<tr class="separator:gaba4e0eff7816fe80d01121fb4cf6c6bc"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
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 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_a3413d16a2695ab37a70c8c03c616c68.html">ComplexMathFunctions</a></li><li class="navelem"><a class="el" href="arm__cmplx__mag__f32_8c.html">arm_cmplx_mag_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__cmplx__mag__q15_8c.html b/docs/DSP/html/arm__cmplx__mag__q15_8c.html
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--- a/docs/DSP/html/arm__cmplx__mag__q15_8c.html
+++ b/docs/DSP/html/arm__cmplx__mag__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga0a4a8f77a6a51d9b3f3b9d729f85b7a4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag.html#ga0a4a8f77a6a51d9b3f3b9d729f85b7a4">arm_cmplx_mag_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:ga0a4a8f77a6a51d9b3f3b9d729f85b7a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex magnitude.  <a href="group__cmplx__mag.html#ga0a4a8f77a6a51d9b3f3b9d729f85b7a4">More...</a><br/></td></tr>
-<tr class="separator:ga0a4a8f77a6a51d9b3f3b9d729f85b7a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:ga0488e185f4631ac029b02f1759b287cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_a3413d16a2695ab37a70c8c03c616c68.html">ComplexMathFunctions</a></li><li class="navelem"><a class="el" href="arm__cmplx__mag__q15_8c.html">arm_cmplx_mag_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__cmplx__mag__q31_8c.html b/docs/DSP/html/arm__cmplx__mag__q31_8c.html
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--- a/docs/DSP/html/arm__cmplx__mag__q31_8c.html
+++ b/docs/DSP/html/arm__cmplx__mag__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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-<tr class="memitem:ga14f82f9230e9d96d5b9774e2fefcb7be"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag.html#ga14f82f9230e9d96d5b9774e2fefcb7be">arm_cmplx_mag_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:ga14f82f9230e9d96d5b9774e2fefcb7be"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex magnitude.  <a href="group__cmplx__mag.html#ga14f82f9230e9d96d5b9774e2fefcb7be">More...</a><br/></td></tr>
-<tr class="separator:ga14f82f9230e9d96d5b9774e2fefcb7be"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab69ad9237469565958cce6b4555bbb6e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag.html#gab69ad9237469565958cce6b4555bbb6e">arm_cmplx_mag_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:gab69ad9237469565958cce6b4555bbb6e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex magnitude.  <a href="group__cmplx__mag.html#gab69ad9237469565958cce6b4555bbb6e">More...</a><br/></td></tr>
+<tr class="separator:gab69ad9237469565958cce6b4555bbb6e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_a3413d16a2695ab37a70c8c03c616c68.html">ComplexMathFunctions</a></li><li class="navelem"><a class="el" href="arm__cmplx__mag__q31_8c.html">arm_cmplx_mag_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__cmplx__mag__squared__f32_8c.html b/docs/DSP/html/arm__cmplx__mag__squared__f32_8c.html
index 8b59145..f6cf11d 100644
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+++ b/docs/DSP/html/arm__cmplx__mag__squared__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gaa7faccc0d96b061d8b7d0d7d82045074"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag__squared.html#gaa7faccc0d96b061d8b7d0d7d82045074">arm_cmplx_mag_squared_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:gaa7faccc0d96b061d8b7d0d7d82045074"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex magnitude squared.  <a href="group__cmplx__mag__squared.html#gaa7faccc0d96b061d8b7d0d7d82045074">More...</a><br/></td></tr>
-<tr class="separator:gaa7faccc0d96b061d8b7d0d7d82045074"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga925ef5458a384f63d06f1c6997d1fb7d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag__squared.html#ga925ef5458a384f63d06f1c6997d1fb7d">arm_cmplx_mag_squared_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:ga925ef5458a384f63d06f1c6997d1fb7d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex magnitude squared.  <a href="group__cmplx__mag__squared.html#ga925ef5458a384f63d06f1c6997d1fb7d">More...</a><br/></td></tr>
+<tr class="separator:ga925ef5458a384f63d06f1c6997d1fb7d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_a3413d16a2695ab37a70c8c03c616c68.html">ComplexMathFunctions</a></li><li class="navelem"><a class="el" href="arm__cmplx__mag__squared__f32_8c.html">arm_cmplx_mag_squared_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/arm__cmplx__mag__squared__q15_8c.html b/docs/DSP/html/arm__cmplx__mag__squared__q15_8c.html
index bb2a4db..6bd1852 100644
--- a/docs/DSP/html/arm__cmplx__mag__squared__q15_8c.html
+++ b/docs/DSP/html/arm__cmplx__mag__squared__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
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    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,9 +116,9 @@
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-<tr class="memitem:ga45537f576102d960d467eb722b8431f2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag__squared.html#ga45537f576102d960d467eb722b8431f2">arm_cmplx_mag_squared_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t numSamples)</td></tr>
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+<tr class="separator:ga903eb30a02343574e46cb123b52232f4"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/arm__cmplx__mult__real__q15_8c.html b/docs/DSP/html/arm__cmplx__mult__real__q15_8c.html
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-<tr class="separator:ga3bd8889dcb45980e1d3e53344df54e85"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:gaa41d60a567652bf6a783b916931bf20b"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/arm__cmplx__mult__real__q31_8c.html b/docs/DSP/html/arm__cmplx__mult__real__q31_8c.html
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    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
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-<tr class="separator:ga715e4bb8e945b8ca51ec5237611697ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0fe1cd71d35b4481f8ab69d502c96ace"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByRealMult.html#ga0fe1cd71d35b4481f8ab69d502c96ace">arm_cmplx_mult_real_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcCmplx, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcReal, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCmplxDst, uint32_t numSamples)</td></tr>
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+<tr class="separator:ga0fe1cd71d35b4481f8ab69d502c96ace"><td class="memSeparator" colspan="2">&#160;</td></tr>
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@@ -126,7 +126,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__common__tables_8c.html b/docs/DSP/html/arm__common__tables_8c.html
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-   &#160;<span id="projectnumber">Version 1.5.2</span>
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@@ -108,17 +108,26 @@
 
 <div class="header">
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+<a href="#func-members">Functions</a> &#124;
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   <div class="headertitle">
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 </div><!--header-->
 <div class="contents">
 <table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
+Functions</h2></td></tr>
+<tr class="memitem:ga70c20a29dce002df289426d5b4f67fa8"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT__Table.html#ga70c20a29dce002df289426d5b4f67fa8">__ALIGNED</a> (4)</td></tr>
+<tr class="memdesc:ga70c20a29dce002df289426d5b4f67fa8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Weights Table.  <a href="group__RealFFT__Table.html#ga70c20a29dce002df289426d5b4f67fa8">More...</a><br/></td></tr>
+<tr class="separator:ga70c20a29dce002df289426d5b4f67fa8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table><table class="memberdecls">
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 Variables</h2></td></tr>
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+<tr class="memdesc:gae247e83ad50d474107254e25b36ad42b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Table for bit reversal process.  <a href="group__CFFT__CIFFT.html#gae247e83ad50d474107254e25b36ad42b">More...</a><br/></td></tr>
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+<tr class="memdesc:gae75e243ec61706427314270f222e0c8e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point Twiddle factors Table Generation.  <a href="group__CFFT__CIFFT.html#gae75e243ec61706427314270f222e0c8e">More...</a><br/></td></tr>
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@@ -137,6 +146,7 @@
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+<tr class="memdesc:gaef4697e1ba348c4ac9358f2b9e279e93"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 Twiddle factors Table.  <a href="group__CFFT__CIFFT.html#gaef4697e1ba348c4ac9358f2b9e279e93">More...</a><br/></td></tr>
 <tr class="separator:gaef4697e1ba348c4ac9358f2b9e279e93"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga8ba78d5e6ef4bdc58e8f0044e0664a0a"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CFFT__CIFFT.html#ga8ba78d5e6ef4bdc58e8f0044e0664a0a">twiddleCoef_32_q31</a> [48]</td></tr>
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@@ -155,6 +165,7 @@
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 <tr class="memitem:ga8e4e2e05f4a3112184c96cb3308d6c39"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CFFT__CIFFT.html#ga8e4e2e05f4a3112184c96cb3308d6c39">twiddleCoef_16_q15</a> [24]</td></tr>
+<tr class="memdesc:ga8e4e2e05f4a3112184c96cb3308d6c39"><td class="mdescLeft">&#160;</td><td class="mdescRight">q15 Twiddle factors Table  <a href="group__CFFT__CIFFT.html#ga8e4e2e05f4a3112184c96cb3308d6c39">More...</a><br/></td></tr>
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@@ -172,10 +183,6 @@
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-<tr class="memitem:a66ca8ac5f3a63d9962f501ae60aa32be"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> <a class="el" href="arm__math_8h.html#a280a402ab28c399fcc4168f2ed631acb">ALIGN4</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__common__tables_8c.html#a66ca8ac5f3a63d9962f501ae60aa32be">armRecipTableQ15</a> [64]</td></tr>
-<tr class="separator:a66ca8ac5f3a63d9962f501ae60aa32be"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memdesc:gad00f29d896d64d6da7afbbb9d3e182a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Weights Table.  <a href="group__DCT4__IDCT4__Table.html#gad00f29d896d64d6da7afbbb9d3e182a4">More...</a><br/></td></tr>
+<tr class="separator:gad00f29d896d64d6da7afbbb9d3e182a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga16248ed86161ef97538011b49f13e8b7"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#ga16248ed86161ef97538011b49f13e8b7">cos_factors_128</a> [128]</td></tr>
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+<tr class="memitem:ga02d7024538a87214296b01d83ba36b02"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#ga02d7024538a87214296b01d83ba36b02">WeightsQ31_128</a> [256]</td></tr>
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+<tr class="memitem:ga725b65c25a02b3cad329e18bb832f65e"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#ga725b65c25a02b3cad329e18bb832f65e">WeightsQ31_2048</a> [4096]</td></tr>
+<tr class="separator:ga725b65c25a02b3cad329e18bb832f65e"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:gaa15fc3fb058482defda371113cd12e74"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga16bf6bbe5c4c9b35f88253cf7bdcc435"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#ga16bf6bbe5c4c9b35f88253cf7bdcc435">WeightsQ31_8192</a> [16384]</td></tr>
+<tr class="separator:ga16bf6bbe5c4c9b35f88253cf7bdcc435"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf687c4bbdbc700a3ad5d807d28de63e4"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#gaf687c4bbdbc700a3ad5d807d28de63e4">cos_factorsQ31_8192</a> [8192]</td></tr>
+<tr class="separator:gaf687c4bbdbc700a3ad5d807d28de63e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:aae6056f6c4e8f7e494445196bf864479"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__common__tables_8c.html#aae6056f6c4e8f7e494445196bf864479">armRecipTableQ31</a> [64]</td></tr>
+<tr class="memdesc:aae6056f6c4e8f7e494445196bf864479"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 table for reciprocal.  <a href="#aae6056f6c4e8f7e494445196bf864479">More...</a><br/></td></tr>
+<tr class="separator:aae6056f6c4e8f7e494445196bf864479"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a1dec82d596780f1a66ef4f76f137c1d9"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__common__tables_8c.html#a1dec82d596780f1a66ef4f76f137c1d9">sinTable_f32</a> [<a class="el" href="arm__math_8h.html#afcb9147c96853bea484cfc2dde07463d">FAST_MATH_TABLE_SIZE</a>+1]</td></tr>
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@@ -246,8 +297,6 @@
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-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
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@@ -260,8 +309,6 @@
       </table>
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-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
 </div>
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@@ -273,8 +320,7 @@
         </tr>
       </table>
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-
-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
+<p>end of CFFT_CIFFT group </p>
 
 </div>
 </div>
@@ -288,8 +334,6 @@
       </table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
 </div>
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@@ -302,8 +346,6 @@
       </table>
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-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
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@@ -316,8 +358,6 @@
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-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
 </div>
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@@ -342,8 +382,6 @@
       </table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
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@@ -356,8 +394,6 @@
       </table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
 </div>
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@@ -468,21 +504,6 @@
 
 </div>
 </div>
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> <a class="el" href="arm__math_8h.html#a280a402ab28c399fcc4168f2ed631acb">ALIGN4</a> armRecipTableQ15[64]</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>end of CFFT_CIFFT group </p>
-
-<p>Referenced by <a class="el" href="group__LMS__NORM.html#ga213ab1ee2e154cc2fa30d667b1994b89">arm_lms_norm_init_q15()</a>.</p>
-
-</div>
-</div>
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 <div class="memitem">
 <div class="memproto">
@@ -493,8 +514,6 @@
       </table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__LMS__NORM.html#ga1d9659dbbea4c89a7a9d14d5fc0dd490">arm_lms_norm_init_q31()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="a1dec82d596780f1a66ef4f76f137c1d9"></a>
@@ -507,14 +526,12 @@
       </table>
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 <dl class="section user"><dt></dt><dd>Example code for the generation of the floating-point sine table: <pre>
-tableSize = 512;
-for(n = 0; n &lt; (tableSize + 1); n++)
-{
-     sinTable[n]=sin(2*pi*n/tableSize);
-}</pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where pi value is 3.14159265358979 </dd></dl>
-
-<p>Referenced by <a class="el" href="group__cos.html#gace15287f9c64b9b4084d1c797d4c49d8">arm_cos_f32()</a>, <a class="el" href="group__SinCos.html#ga4420d45c37d58c310ef9ae1b5fe58020">arm_sin_cos_f32()</a>, and <a class="el" href="group__sin.html#gae164899c4a3fc0e946dc5d55555fe541">arm_sin_f32()</a>.</p>
+ tableSize = 512;
+ for (n = 0; n &lt; (tableSize + 1); n++)
+ {
+        sinTable[n] = sin(2*PI*n/tableSize);
+ }</pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>where PI value is 3.14159265358979 </dd></dl>
 
 </div>
 </div>
@@ -528,16 +545,14 @@
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 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Table values are in Q15 (1.15 fixed-point format) and generation is done in three steps. First, generate sin values in floating point: <pre>
-tableSize = 512;
-for(n = 0; n &lt; (tableSize + 1); n++)
-{
-     sinTable[n]= sin(2*pi*n/tableSize);
-} </pre> where pi value is 3.14159265358979 </dd></dl>
+ tableSize = 512;
+ for (n = 0; n &lt; (tableSize + 1); n++)
+ {
+        sinTable[n] = sin(2*PI*n/tableSize);
+ } </pre> where PI value is 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Second, convert floating-point to Q15 (Fixed point): (sinTable[i] * pow(2, 15)) </dd></dl>
 <dl class="section user"><dt></dt><dd>Finally, round to the nearest integer value: sinTable[i] += (sinTable[i] &gt; 0 ? 0.5 :-0.5); </dd></dl>
 
-<p>Referenced by <a class="el" href="group__cos.html#gadfd60c24def501638c0d5db20f4c869b">arm_cos_q15()</a>, and <a class="el" href="group__sin.html#ga1fc6d6640be6cfa688a8bea0a48397ee">arm_sin_q15()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="a8bfccee9e1c0042cf4a765f4b19d097d"></a>
@@ -550,15 +565,13 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Table values are in Q31 (1.31 fixed-point format) and generation is done in three steps. First, generate sin values in floating point: <pre>
-tableSize = 512;
-for(n = 0; n &lt; (tableSize + 1); n++)
-{
-     sinTable[n]= sin(2*pi*n/tableSize);
-} </pre> where pi value is 3.14159265358979 </dd></dl>
+ tableSize = 512;
+ for (n = 0; n &lt; (tableSize + 1); n++)
+ {
+        sinTable[n] = sin(2*PI*n/tableSize);
+ } </pre> where PI value is 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Second, convert floating-point to Q31 (Fixed point): (sinTable[i] * pow(2, 31)) </dd></dl>
-<dl class="section user"><dt></dt><dd>Finally, round to the nearest integer value: sinTable[i] += (sinTable[i] &gt; 0 ? 0.5 :-0.5); </dd></dl>
-
-<p>Referenced by <a class="el" href="group__cos.html#gad80f121949ef885a77d83ab36e002567">arm_cos_q31()</a>, <a class="el" href="group__SinCos.html#gae9e4ddebff9d4eb5d0a093e28e0bc504">arm_sin_cos_q31()</a>, and <a class="el" href="group__sin.html#ga57aade7d8892585992cdc6375bd82f9c">arm_sin_q31()</a>.</p>
+<dl class="section user"><dt></dt><dd>Finally, round to the nearest integer value: sinTable[i] += (sinTable[i] &gt; 0 ? 0.5 : -0.5); </dd></dl>
 
 </div>
 </div>
@@ -572,8 +585,6 @@
       </table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
 </div>
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@@ -586,8 +597,6 @@
       </table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="a749a5995ebd433a163f7adc474dabcaa"></a>
@@ -600,8 +609,6 @@
       </table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="a5c5c161dd469d8e6806664956dae31f9"></a>
@@ -614,8 +621,6 @@
       </table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="a5992afe8574289cd71921651b80bd57d"></a>
@@ -628,11 +633,9 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for Floating-point RFFT Twiddle factors Generation: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>TW = exp(2*pi*i*[0:L/2-1]/L - pi/2*i).' </pre> </dd></dl>
+<dl class="section user"><dt></dt><dd><pre>TW = exp(pi/2*i-2*pi*i*[0:L/2-1]/L).' </pre> </dd></dl>
 <dl class="section user"><dt></dt><dd>Real and Imag values are in interleaved fashion </dd></dl>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
 </div>
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@@ -645,8 +648,6 @@
       </table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="a94bd2fc98798f87003fef5cd0c04d1f5"></a>
@@ -659,8 +660,6 @@
       </table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
 </div>
 </div>
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@@ -673,8 +672,6 @@
       </table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
 </div>
 </div>
 </div><!-- contents -->
@@ -683,7 +680,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_e69703b6e48666328a369b2a39b5e8f2.html">CommonTables</a></li><li class="navelem"><a class="el" href="arm__common__tables_8c.html">arm_common_tables.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__common__tables_8h.html b/docs/DSP/html/arm__common__tables_8h.html
index 7e7f24d..e2076d5 100644
--- a/docs/DSP/html/arm__common__tables_8h.html
+++ b/docs/DSP/html/arm__common__tables_8h.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -159,12 +159,10 @@
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="var-members"></a>
 Variables</h2></td></tr>
 <tr class="memitem:gae247e83ad50d474107254e25b36ad42b"><td class="memItemLeft" align="right" valign="top">const uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CFFT__CIFFT.html#gae247e83ad50d474107254e25b36ad42b">armBitRevTable</a> [1024]</td></tr>
+<tr class="memdesc:gae247e83ad50d474107254e25b36ad42b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Table for bit reversal process.  <a href="group__CFFT__CIFFT.html#gae247e83ad50d474107254e25b36ad42b">More...</a><br/></td></tr>
 <tr class="separator:gae247e83ad50d474107254e25b36ad42b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a56d3642e4ee33e3ada57ff11ecda1498"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__common__tables_8h.html#a56d3642e4ee33e3ada57ff11ecda1498">armRecipTableQ15</a> [64]</td></tr>
-<tr class="separator:a56d3642e4ee33e3ada57ff11ecda1498"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:aae6056f6c4e8f7e494445196bf864479"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__common__tables_8h.html#aae6056f6c4e8f7e494445196bf864479">armRecipTableQ31</a> [64]</td></tr>
-<tr class="separator:aae6056f6c4e8f7e494445196bf864479"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gae75e243ec61706427314270f222e0c8e"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CFFT__CIFFT.html#gae75e243ec61706427314270f222e0c8e">twiddleCoef_16</a> [32]</td></tr>
+<tr class="memdesc:gae75e243ec61706427314270f222e0c8e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point Twiddle factors Table Generation.  <a href="group__CFFT__CIFFT.html#gae75e243ec61706427314270f222e0c8e">More...</a><br/></td></tr>
 <tr class="separator:gae75e243ec61706427314270f222e0c8e"><td class="memSeparator" colspan="2">&#160;</td></tr>
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@@ -183,6 +181,7 @@
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 <tr class="memitem:gaef4697e1ba348c4ac9358f2b9e279e93"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CFFT__CIFFT.html#gaef4697e1ba348c4ac9358f2b9e279e93">twiddleCoef_16_q31</a> [24]</td></tr>
+<tr class="memdesc:gaef4697e1ba348c4ac9358f2b9e279e93"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 Twiddle factors Table.  <a href="group__CFFT__CIFFT.html#gaef4697e1ba348c4ac9358f2b9e279e93">More...</a><br/></td></tr>
 <tr class="separator:gaef4697e1ba348c4ac9358f2b9e279e93"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga8ba78d5e6ef4bdc58e8f0044e0664a0a"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CFFT__CIFFT.html#ga8ba78d5e6ef4bdc58e8f0044e0664a0a">twiddleCoef_32_q31</a> [48]</td></tr>
 <tr class="separator:ga8ba78d5e6ef4bdc58e8f0044e0664a0a"><td class="memSeparator" colspan="2">&#160;</td></tr>
@@ -201,6 +200,7 @@
 <tr class="memitem:ga67c0890317deab3391e276f22c1fc400"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CFFT__CIFFT.html#ga67c0890317deab3391e276f22c1fc400">twiddleCoef_4096_q31</a> [6144]</td></tr>
 <tr class="separator:ga67c0890317deab3391e276f22c1fc400"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga8e4e2e05f4a3112184c96cb3308d6c39"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CFFT__CIFFT.html#ga8e4e2e05f4a3112184c96cb3308d6c39">twiddleCoef_16_q15</a> [24]</td></tr>
+<tr class="memdesc:ga8e4e2e05f4a3112184c96cb3308d6c39"><td class="mdescLeft">&#160;</td><td class="mdescRight">q15 Twiddle factors Table  <a href="group__CFFT__CIFFT.html#ga8e4e2e05f4a3112184c96cb3308d6c39">More...</a><br/></td></tr>
 <tr class="separator:ga8e4e2e05f4a3112184c96cb3308d6c39"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memitem:gac52f98b52a1f03bfac8b57a67ba07397"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT__Table.html#gac52f98b52a1f03bfac8b57a67ba07397">realCoefB</a> [8192]</td></tr>
+<tr class="separator:gac52f98b52a1f03bfac8b57a67ba07397"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf1592a6cf0504675205074a43c3728a2"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT__Table.html#gaf1592a6cf0504675205074a43c3728a2">realCoefAQ31</a> [8192]</td></tr>
+<tr class="separator:gaf1592a6cf0504675205074a43c3728a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1eb5745728a61c3715755f5d69a4a960"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT__Table.html#ga1eb5745728a61c3715755f5d69a4a960">realCoefBQ31</a> [8192]</td></tr>
+<tr class="separator:ga1eb5745728a61c3715755f5d69a4a960"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:af8699e77c7774359b96ef388efa7d453"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__common__tables_8h.html#af8699e77c7774359b96ef388efa7d453">realCoefAQ15</a> [8192]</td></tr>
+<tr class="separator:af8699e77c7774359b96ef388efa7d453"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a3b12ecbb17514304c09f90d26cada4cd"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__common__tables_8h.html#a3b12ecbb17514304c09f90d26cada4cd">realCoefBQ15</a> [8192]</td></tr>
+<tr class="separator:a3b12ecbb17514304c09f90d26cada4cd"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad00f29d896d64d6da7afbbb9d3e182a4"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#gad00f29d896d64d6da7afbbb9d3e182a4">Weights_128</a> [256]</td></tr>
+<tr class="memdesc:gad00f29d896d64d6da7afbbb9d3e182a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Weights Table.  <a href="group__DCT4__IDCT4__Table.html#gad00f29d896d64d6da7afbbb9d3e182a4">More...</a><br/></td></tr>
+<tr class="separator:gad00f29d896d64d6da7afbbb9d3e182a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga16248ed86161ef97538011b49f13e8b7"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#ga16248ed86161ef97538011b49f13e8b7">cos_factors_128</a> [128]</td></tr>
+<tr class="separator:ga16248ed86161ef97538011b49f13e8b7"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaeb67b0be5b3c2139d660e02cedeed908"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#gaeb67b0be5b3c2139d660e02cedeed908">Weights_512</a> [1024]</td></tr>
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-<p>Referenced by <a class="el" href="group__LMS__NORM.html#ga1d9659dbbea4c89a7a9d14d5fc0dd490">arm_lms_norm_init_q31()</a>.</p>
+</div>
+</div>
+<a class="anchor" id="a373f2b52659505b0bb5066cd6c8a9041"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> cos_factorsQ15_128[128]</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="afd1bd60aa573ba5ee349a05aaa32d915"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> cos_factorsQ15_2048[2048]</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="af3a2b1f1c23720eed1c1fd380fcc43f9"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> cos_factorsQ15_512[512]</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="ac5e090785e32ca38103873d5cad0d813"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> cos_factorsQ15_8192[8192]</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="af8699e77c7774359b96ef388efa7d453"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> realCoefAQ15[8192]</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="a3b12ecbb17514304c09f90d26cada4cd"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> realCoefBQ15[8192]</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
 
 </div>
 </div>
@@ -796,14 +896,12 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for the generation of the floating-point sine table: <pre>
-tableSize = 512;
-for(n = 0; n &lt; (tableSize + 1); n++)
-{
-     sinTable[n]=sin(2*pi*n/tableSize);
-}</pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where pi value is 3.14159265358979 </dd></dl>
-
-<p>Referenced by <a class="el" href="group__cos.html#gace15287f9c64b9b4084d1c797d4c49d8">arm_cos_f32()</a>, <a class="el" href="group__SinCos.html#ga4420d45c37d58c310ef9ae1b5fe58020">arm_sin_cos_f32()</a>, and <a class="el" href="group__sin.html#gae164899c4a3fc0e946dc5d55555fe541">arm_sin_f32()</a>.</p>
+ tableSize = 512;
+ for (n = 0; n &lt; (tableSize + 1); n++)
+ {
+        sinTable[n] = sin(2*PI*n/tableSize);
+ }</pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>where PI value is 3.14159265358979 </dd></dl>
 
 </div>
 </div>
@@ -817,16 +915,14 @@
       </table>
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 <dl class="section user"><dt></dt><dd>Table values are in Q15 (1.15 fixed-point format) and generation is done in three steps. First, generate sin values in floating point: <pre>
-tableSize = 512;
-for(n = 0; n &lt; (tableSize + 1); n++)
-{
-     sinTable[n]= sin(2*pi*n/tableSize);
-} </pre> where pi value is 3.14159265358979 </dd></dl>
+ tableSize = 512;
+ for (n = 0; n &lt; (tableSize + 1); n++)
+ {
+        sinTable[n] = sin(2*PI*n/tableSize);
+ } </pre> where PI value is 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Second, convert floating-point to Q15 (Fixed point): (sinTable[i] * pow(2, 15)) </dd></dl>
 <dl class="section user"><dt></dt><dd>Finally, round to the nearest integer value: sinTable[i] += (sinTable[i] &gt; 0 ? 0.5 :-0.5); </dd></dl>
 
-<p>Referenced by <a class="el" href="group__cos.html#gadfd60c24def501638c0d5db20f4c869b">arm_cos_q15()</a>, and <a class="el" href="group__sin.html#ga1fc6d6640be6cfa688a8bea0a48397ee">arm_sin_q15()</a>.</p>
-
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 <dl class="section user"><dt></dt><dd>Table values are in Q31 (1.31 fixed-point format) and generation is done in three steps. First, generate sin values in floating point: <pre>
-tableSize = 512;
-for(n = 0; n &lt; (tableSize + 1); n++)
-{
-     sinTable[n]= sin(2*pi*n/tableSize);
-} </pre> where pi value is 3.14159265358979 </dd></dl>
+ tableSize = 512;
+ for (n = 0; n &lt; (tableSize + 1); n++)
+ {
+        sinTable[n] = sin(2*PI*n/tableSize);
+ } </pre> where PI value is 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Second, convert floating-point to Q31 (Fixed point): (sinTable[i] * pow(2, 31)) </dd></dl>
-<dl class="section user"><dt></dt><dd>Finally, round to the nearest integer value: sinTable[i] += (sinTable[i] &gt; 0 ? 0.5 :-0.5); </dd></dl>
-
-<p>Referenced by <a class="el" href="group__cos.html#gad80f121949ef885a77d83ab36e002567">arm_cos_q31()</a>, <a class="el" href="group__SinCos.html#gae9e4ddebff9d4eb5d0a093e28e0bc504">arm_sin_cos_q31()</a>, and <a class="el" href="group__sin.html#ga57aade7d8892585992cdc6375bd82f9c">arm_sin_q31()</a>.</p>
+<dl class="section user"><dt></dt><dd>Finally, round to the nearest integer value: sinTable[i] += (sinTable[i] &gt; 0 ? 0.5 : -0.5); </dd></dl>
 
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-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
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-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
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-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
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-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
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 <dl class="section user"><dt></dt><dd>Example code for Floating-point RFFT Twiddle factors Generation: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>TW = exp(2*pi*i*[0:L/2-1]/L - pi/2*i).' </pre> </dd></dl>
+<dl class="section user"><dt></dt><dd><pre>TW = exp(pi/2*i-2*pi*i*[0:L/2-1]/L).' </pre> </dd></dl>
 <dl class="section user"><dt></dt><dd>Real and Imag values are in interleaved fashion </dd></dl>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
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-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
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-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
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+</div>
+</div>
+<a class="anchor" id="a8e8f0253c5a4337bd90968838db6164d"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> WeightsQ15_128[256]</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="ab858d2072b29f338b5dabf5cde9aaf66"></a>
+<div class="memitem">
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+      <table class="memname">
+        <tr>
+          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> WeightsQ15_2048[4096]</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="a0492a1e2539ffb9d5276a357dab9dca1"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> WeightsQ15_512[1024]</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="a94e0c6d08e4c2eee4d75dc5cde0e4019"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> WeightsQ15_8192[16384]</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
 
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   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_a60f901a1a7665a0737ec2a3f2ba0d4e.html">Include</a></li><li class="navelem"><a class="el" href="arm__common__tables_8h.html">arm_common_tables.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
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index ae17524..3eb9cca 100644
--- a/docs/DSP/html/arm__const__structs_8c.html
+++ b/docs/DSP/html/arm__const__structs_8c.html
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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-<tr class="memitem:ga1eb5745728a61c3715755f5d69a4a960"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT__Table.html#ga1eb5745728a61c3715755f5d69a4a960">realCoefBQ31</a> [8192]</td></tr>
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 <tr class="memitem:ac0dba98698402a40b1d08f9b1e27614d"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="structarm__rfft__instance__q31.html">arm_rfft_instance_q31</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__const__structs_8c.html#ac0dba98698402a40b1d08f9b1e27614d">arm_rfft_sR_q31_len32</a></td></tr>
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 <tr class="memitem:a9a9c7e356f2b129f84c1921fdad33964"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="structarm__rfft__instance__q31.html">arm_rfft_instance_q31</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__const__structs_8c.html#a9a9c7e356f2b129f84c1921fdad33964">arm_rfft_sR_q31_len64</a></td></tr>
@@ -208,10 +204,6 @@
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 <tr class="memitem:a87843f865bfc75f18c4e7bb148a9592c"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="structarm__rfft__instance__q15.html">arm_rfft_instance_q15</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__const__structs_8c.html#a87843f865bfc75f18c4e7bb148a9592c">arm_rfft_sR_q15_len32</a></td></tr>
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-<p>Referenced by <a class="el" href="arm__fft__bin__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
-
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-<p>Referenced by <a class="el" href="group__RealFFT.html#ga053450cc600a55410ba5b5605e96245d">arm_rfft_init_q15()</a>.</p>
-
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-<p>Referenced by <a class="el" href="group__RealFFT.html#ga053450cc600a55410ba5b5605e96245d">arm_rfft_init_q15()</a>.</p>
-
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-<p>Referenced by <a class="el" href="group__RealFFT.html#ga053450cc600a55410ba5b5605e96245d">arm_rfft_init_q15()</a>.</p>
-
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-<p>Referenced by <a class="el" href="group__RealFFT.html#ga053450cc600a55410ba5b5605e96245d">arm_rfft_init_q15()</a>.</p>
-
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-<p>Referenced by <a class="el" href="group__RealFFT.html#ga053450cc600a55410ba5b5605e96245d">arm_rfft_init_q15()</a>.</p>
-
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+<tr class="memitem:ga8ecd292b8e74c8f05b208e7948d05a90"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga8ecd292b8e74c8f05b208e7948d05a90">arm_conv_fast_opt_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
+<tr class="memdesc:ga8ecd292b8e74c8f05b208e7948d05a90"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q15 sequences (fast version).  <a href="group__Conv.html#ga8ecd292b8e74c8f05b208e7948d05a90">More...</a><br/></td></tr>
+<tr class="separator:ga8ecd292b8e74c8f05b208e7948d05a90"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/arm__conv__fast__q15_8c.html b/docs/DSP/html/arm__conv__fast__q15_8c.html
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    <div id="projectname">CMSIS-DSP
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 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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-<tr class="memitem:gad75ca978ce906e04abdf86a8d76306d4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#gad75ca978ce906e04abdf86a8d76306d4">arm_conv_fast_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
-<tr class="memdesc:gad75ca978ce906e04abdf86a8d76306d4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.  <a href="group__Conv.html#gad75ca978ce906e04abdf86a8d76306d4">More...</a><br/></td></tr>
-<tr class="separator:gad75ca978ce906e04abdf86a8d76306d4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf6bc2c8d655ef8c9b66affdae489f366"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#gaf6bc2c8d655ef8c9b66affdae489f366">arm_conv_fast_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
+<tr class="memdesc:gaf6bc2c8d655ef8c9b66affdae489f366"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q15 sequences (fast version).  <a href="group__Conv.html#gaf6bc2c8d655ef8c9b66affdae489f366">More...</a><br/></td></tr>
+<tr class="separator:gaf6bc2c8d655ef8c9b66affdae489f366"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__conv__fast__q15_8c.html">arm_conv_fast_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__conv__fast__q31_8c.html b/docs/DSP/html/arm__conv__fast__q31_8c.html
index 5329560..1e70051 100644
--- a/docs/DSP/html/arm__conv__fast__q31_8c.html
+++ b/docs/DSP/html/arm__conv__fast__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga51112dcdf9b3624eb05182cdc4da9ec0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga51112dcdf9b3624eb05182cdc4da9ec0">arm_conv_fast_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
-<tr class="memdesc:ga51112dcdf9b3624eb05182cdc4da9ec0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.  <a href="group__Conv.html#ga51112dcdf9b3624eb05182cdc4da9ec0">More...</a><br/></td></tr>
-<tr class="separator:ga51112dcdf9b3624eb05182cdc4da9ec0"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga2d2b29b1f7f00a8651f1bc7f0560464b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga2d2b29b1f7f00a8651f1bc7f0560464b">arm_conv_fast_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga2d2b29b1f7f00a8651f1bc7f0560464b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q31 sequences (fast version).  <a href="group__Conv.html#ga2d2b29b1f7f00a8651f1bc7f0560464b">More...</a><br/></td></tr>
+<tr class="separator:ga2d2b29b1f7f00a8651f1bc7f0560464b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__conv__fast__q31_8c.html">arm_conv_fast_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__conv__opt__q15_8c.html b/docs/DSP/html/arm__conv__opt__q15_8c.html
index f758d89..6161331 100644
--- a/docs/DSP/html/arm__conv__opt__q15_8c.html
+++ b/docs/DSP/html/arm__conv__opt__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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-<tr class="memitem:gac77dbcaef5c754cac27eab96c4753a3c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#gac77dbcaef5c754cac27eab96c4753a3c">arm_conv_opt_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
-<tr class="memdesc:gac77dbcaef5c754cac27eab96c4753a3c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q15 sequences.  <a href="group__Conv.html#gac77dbcaef5c754cac27eab96c4753a3c">More...</a><br/></td></tr>
-<tr class="separator:gac77dbcaef5c754cac27eab96c4753a3c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0d60c7a8349c6235d88bf87b04172252"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga0d60c7a8349c6235d88bf87b04172252">arm_conv_opt_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
+<tr class="memdesc:ga0d60c7a8349c6235d88bf87b04172252"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q15 sequences.  <a href="group__Conv.html#ga0d60c7a8349c6235d88bf87b04172252">More...</a><br/></td></tr>
+<tr class="separator:ga0d60c7a8349c6235d88bf87b04172252"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__conv__opt__q15_8c.html">arm_conv_opt_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/arm__conv__opt__q7_8c.html b/docs/DSP/html/arm__conv__opt__q7_8c.html
index 4d54880..32899f2 100644
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+++ b/docs/DSP/html/arm__conv__opt__q7_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga4c7cf073e89d6d57cc4e711f078c3f68"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga4c7cf073e89d6d57cc4e711f078c3f68">arm_conv_opt_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
-<tr class="memdesc:ga4c7cf073e89d6d57cc4e711f078c3f68"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q7 sequences.  <a href="group__Conv.html#ga4c7cf073e89d6d57cc4e711f078c3f68">More...</a><br/></td></tr>
-<tr class="separator:ga4c7cf073e89d6d57cc4e711f078c3f68"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf23966af04840f17c26c93849986baeb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#gaf23966af04840f17c26c93849986baeb">arm_conv_opt_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
+<tr class="memdesc:gaf23966af04840f17c26c93849986baeb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q7 sequences.  <a href="group__Conv.html#gaf23966af04840f17c26c93849986baeb">More...</a><br/></td></tr>
+<tr class="separator:gaf23966af04840f17c26c93849986baeb"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-<tr class="separator:ga16d10f32072cd79fc5fb6e785df45f5e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4e65902884d148ebcbecc260e0dffdd9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#ga4e65902884d148ebcbecc260e0dffdd9">arm_conv_partial_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints)</td></tr>
+<tr class="memdesc:ga4e65902884d148ebcbecc260e0dffdd9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of floating-point sequences.  <a href="group__PartialConv.html#ga4e65902884d148ebcbecc260e0dffdd9">More...</a><br/></td></tr>
+<tr class="separator:ga4e65902884d148ebcbecc260e0dffdd9"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__conv__partial__f32_8c.html">arm_conv_partial_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__conv__partial__fast__opt__q15_8c.html b/docs/DSP/html/arm__conv__partial__fast__opt__q15_8c.html
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+++ b/docs/DSP/html/arm__conv__partial__fast__opt__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
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-<tr class="memdesc:ga3de9c4ddcc7886de25b70d875099a8d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.  <a href="group__PartialConv.html#ga3de9c4ddcc7886de25b70d875099a8d9">More...</a><br/></td></tr>
-<tr class="separator:ga3de9c4ddcc7886de25b70d875099a8d9"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0cdb871f952b8c1305342ae499affa41"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#ga0cdb871f952b8c1305342ae499affa41">arm_conv_partial_fast_opt_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
+<tr class="memdesc:ga0cdb871f952b8c1305342ae499affa41"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q15 sequences (fast version).  <a href="group__PartialConv.html#ga0cdb871f952b8c1305342ae499affa41">More...</a><br/></td></tr>
+<tr class="separator:ga0cdb871f952b8c1305342ae499affa41"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__conv__partial__fast__opt__q15_8c.html">arm_conv_partial_fast_opt_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__conv__partial__fast__q15_8c.html b/docs/DSP/html/arm__conv__partial__fast__q15_8c.html
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@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,9 +116,9 @@
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-<tr class="memitem:ga1e4d43385cb62262a78c6752fe1fafb2"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#ga1e4d43385cb62262a78c6752fe1fafb2">arm_conv_partial_fast_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints)</td></tr>
-<tr class="memdesc:ga1e4d43385cb62262a78c6752fe1fafb2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.  <a href="group__PartialConv.html#ga1e4d43385cb62262a78c6752fe1fafb2">More...</a><br/></td></tr>
-<tr class="separator:ga1e4d43385cb62262a78c6752fe1fafb2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga30eb5ce84581f2d0532a17cdf8a20fc5"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#ga30eb5ce84581f2d0532a17cdf8a20fc5">arm_conv_partial_fast_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints)</td></tr>
+<tr class="memdesc:ga30eb5ce84581f2d0532a17cdf8a20fc5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q15 sequences (fast version).  <a href="group__PartialConv.html#ga30eb5ce84581f2d0532a17cdf8a20fc5">More...</a><br/></td></tr>
+<tr class="separator:ga30eb5ce84581f2d0532a17cdf8a20fc5"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
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   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__conv__partial__fast__q15_8c.html">arm_conv_partial_fast_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/arm__conv__partial__fast__q31_8c.html b/docs/DSP/html/arm__conv__partial__fast__q31_8c.html
index 512d019..21eab6d 100644
--- a/docs/DSP/html/arm__conv__partial__fast__q31_8c.html
+++ b/docs/DSP/html/arm__conv__partial__fast__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
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-<tr class="memdesc:ga10c5294cda8c4985386f4e3944be7650"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.  <a href="group__PartialConv.html#ga10c5294cda8c4985386f4e3944be7650">More...</a><br/></td></tr>
-<tr class="separator:ga10c5294cda8c4985386f4e3944be7650"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:gaaf207e31aa081cea624713aec65d0e77"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-<tr class="separator:ga834b23b4ade8682beeb55778399101f8"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:gaa82f8213533529e9b9252b37fd3b39e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-<tr class="separator:ga3707e16af1435b215840006a7ab0c98f"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memdesc:gadfc0cd0290793c790ccaa1c73eda0694"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q7 sequences.  <a href="group__PartialConv.html#gadfc0cd0290793c790ccaa1c73eda0694">More...</a><br/></td></tr>
+<tr class="separator:gadfc0cd0290793c790ccaa1c73eda0694"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/arm__conv__partial__q15_8c.html b/docs/DSP/html/arm__conv__partial__q15_8c.html
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-<tr class="memdesc:ga209a2a913a0c5e5679c5988da8f46b03"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q15 sequences.  <a href="group__PartialConv.html#ga209a2a913a0c5e5679c5988da8f46b03">More...</a><br/></td></tr>
-<tr class="separator:ga209a2a913a0c5e5679c5988da8f46b03"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memdesc:ga09b1f207980df75c2dcf01b1d3c2006f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q15 sequences.  <a href="group__PartialConv.html#ga09b1f207980df75c2dcf01b1d3c2006f">More...</a><br/></td></tr>
+<tr class="separator:ga09b1f207980df75c2dcf01b1d3c2006f"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-<tr class="separator:ga78e73a5f02d103168a09821fb461e77a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gadc48f14ae5ca8bf4b026916db0765afa"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#gadc48f14ae5ca8bf4b026916db0765afa">arm_conv_partial_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints)</td></tr>
+<tr class="memdesc:gadc48f14ae5ca8bf4b026916db0765afa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q31 sequences.  <a href="group__PartialConv.html#gadc48f14ae5ca8bf4b026916db0765afa">More...</a><br/></td></tr>
+<tr class="separator:gadc48f14ae5ca8bf4b026916db0765afa"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__conv__partial__q31_8c.html">arm_conv_partial_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__conv__partial__q7_8c.html b/docs/DSP/html/arm__conv__partial__q7_8c.html
index 068ed65..5662fc5 100644
--- a/docs/DSP/html/arm__conv__partial__q7_8c.html
+++ b/docs/DSP/html/arm__conv__partial__q7_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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-<tr class="memitem:ga8567259fe18396dd972242c41741ebf4"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#ga8567259fe18396dd972242c41741ebf4">arm_conv_partial_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints)</td></tr>
-<tr class="memdesc:ga8567259fe18396dd972242c41741ebf4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q7 sequences.  <a href="group__PartialConv.html#ga8567259fe18396dd972242c41741ebf4">More...</a><br/></td></tr>
-<tr class="separator:ga8567259fe18396dd972242c41741ebf4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa1bf3428dbe6beb5c9957bff0d00fa19"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#gaa1bf3428dbe6beb5c9957bff0d00fa19">arm_conv_partial_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints)</td></tr>
+<tr class="memdesc:gaa1bf3428dbe6beb5c9957bff0d00fa19"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q7 sequences.  <a href="group__PartialConv.html#gaa1bf3428dbe6beb5c9957bff0d00fa19">More...</a><br/></td></tr>
+<tr class="separator:gaa1bf3428dbe6beb5c9957bff0d00fa19"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__conv__partial__q7_8c.html">arm_conv_partial_q7.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__conv__q15_8c.html b/docs/DSP/html/arm__conv__q15_8c.html
index bbca39c..d41b136 100644
--- a/docs/DSP/html/arm__conv__q15_8c.html
+++ b/docs/DSP/html/arm__conv__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gaccd6a89b0ff7a94df64610598e6e6893"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#gaccd6a89b0ff7a94df64610598e6e6893">arm_conv_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
-<tr class="memdesc:gaccd6a89b0ff7a94df64610598e6e6893"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q15 sequences.  <a href="group__Conv.html#gaccd6a89b0ff7a94df64610598e6e6893">More...</a><br/></td></tr>
-<tr class="separator:gaccd6a89b0ff7a94df64610598e6e6893"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga372d3fd79b107dc6b12163a00c22da18"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga372d3fd79b107dc6b12163a00c22da18">arm_conv_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga372d3fd79b107dc6b12163a00c22da18"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q15 sequences.  <a href="group__Conv.html#ga372d3fd79b107dc6b12163a00c22da18">More...</a><br/></td></tr>
+<tr class="separator:ga372d3fd79b107dc6b12163a00c22da18"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__conv__q15_8c.html">arm_conv_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__conv__q31_8c.html b/docs/DSP/html/arm__conv__q31_8c.html
index e541792..f289ef7 100644
--- a/docs/DSP/html/arm__conv__q31_8c.html
+++ b/docs/DSP/html/arm__conv__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga946b58da734f1e4e78c91fcaab4b12b6"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga946b58da734f1e4e78c91fcaab4b12b6">arm_conv_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
-<tr class="memdesc:ga946b58da734f1e4e78c91fcaab4b12b6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q31 sequences.  <a href="group__Conv.html#ga946b58da734f1e4e78c91fcaab4b12b6">More...</a><br/></td></tr>
-<tr class="separator:ga946b58da734f1e4e78c91fcaab4b12b6"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga08ce299fb5c3329505cb8ce4bf4f6e06"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga08ce299fb5c3329505cb8ce4bf4f6e06">arm_conv_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga08ce299fb5c3329505cb8ce4bf4f6e06"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q31 sequences.  <a href="group__Conv.html#ga08ce299fb5c3329505cb8ce4bf4f6e06">More...</a><br/></td></tr>
+<tr class="separator:ga08ce299fb5c3329505cb8ce4bf4f6e06"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__conv__q31_8c.html">arm_conv_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__conv__q7_8c.html b/docs/DSP/html/arm__conv__q7_8c.html
index 22ea1fa..3fafbeb 100644
--- a/docs/DSP/html/arm__conv__q7_8c.html
+++ b/docs/DSP/html/arm__conv__q7_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gae2070cb792a167e78dbad8d06b97cdab"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#gae2070cb792a167e78dbad8d06b97cdab">arm_conv_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst)</td></tr>
-<tr class="memdesc:gae2070cb792a167e78dbad8d06b97cdab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q7 sequences.  <a href="group__Conv.html#gae2070cb792a167e78dbad8d06b97cdab">More...</a><br/></td></tr>
-<tr class="separator:gae2070cb792a167e78dbad8d06b97cdab"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga625b30107443b6d145350bc242749764"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga625b30107443b6d145350bc242749764">arm_conv_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga625b30107443b6d145350bc242749764"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q7 sequences.  <a href="group__Conv.html#ga625b30107443b6d145350bc242749764">More...</a><br/></td></tr>
+<tr class="separator:ga625b30107443b6d145350bc242749764"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__conv__q7_8c.html">arm_conv_q7.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/arm__convolution__example_2Abstract_8txt.html b/docs/DSP/html/arm__convolution__example_2Abstract_8txt.html
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-<p>Referenced by <a class="el" href="group__Conv.html#ga3f860dc98c6fc4cafc421e4a2aed3c89">arm_conv_f32()</a>, <a class="el" href="group__Conv.html#gaf16f490d245391ec18a42adc73d6d749">arm_conv_fast_opt_q15()</a>, <a class="el" href="group__Conv.html#gad75ca978ce906e04abdf86a8d76306d4">arm_conv_fast_q15()</a>, <a class="el" href="group__Conv.html#ga51112dcdf9b3624eb05182cdc4da9ec0">arm_conv_fast_q31()</a>, <a class="el" href="group__Conv.html#gac77dbcaef5c754cac27eab96c4753a3c">arm_conv_opt_q15()</a>, <a class="el" href="group__Conv.html#ga4c7cf073e89d6d57cc4e711f078c3f68">arm_conv_opt_q7()</a>, <a class="el" href="group__PartialConv.html#ga16d10f32072cd79fc5fb6e785df45f5e">arm_conv_partial_f32()</a>, <a class="el" href="group__PartialConv.html#ga3de9c4ddcc7886de25b70d875099a8d9">arm_conv_partial_fast_opt_q15()</a>, <a class="el" href="group__PartialConv.html#ga1e4d43385cb62262a78c6752fe1fafb2">arm_conv_partial_fast_q15()</a>, <a class="el" href="group__PartialConv.html#ga10c5294cda8c4985386f4e3944be7650">arm_conv_partial_fast_q31()</a>, <a class="el" href="group__PartialConv.html#ga834b23b4ade8682beeb55778399101f8">arm_conv_partial_opt_q15()</a>, <a class="el" href="group__PartialConv.html#ga3707e16af1435b215840006a7ab0c98f">arm_conv_partial_opt_q7()</a>, <a class="el" href="group__PartialConv.html#ga209a2a913a0c5e5679c5988da8f46b03">arm_conv_partial_q15()</a>, <a class="el" href="group__PartialConv.html#ga78e73a5f02d103168a09821fb461e77a">arm_conv_partial_q31()</a>, <a class="el" href="group__PartialConv.html#ga8567259fe18396dd972242c41741ebf4">arm_conv_partial_q7()</a>, <a class="el" href="group__Conv.html#gaccd6a89b0ff7a94df64610598e6e6893">arm_conv_q15()</a>, <a class="el" href="group__Conv.html#ga946b58da734f1e4e78c91fcaab4b12b6">arm_conv_q31()</a>, <a class="el" href="group__Conv.html#gae2070cb792a167e78dbad8d06b97cdab">arm_conv_q7()</a>, <a class="el" href="group__Corr.html#ga22021e4222773f01e9960358a531cfb8">arm_correlate_f32()</a>, <a class="el" href="group__Corr.html#ga40a0236b17220e8e22a22b5bc1c53c6b">arm_correlate_fast_opt_q15()</a>, <a class="el" href="group__Corr.html#gac8de3da44f58e86c2c86156276ca154f">arm_correlate_fast_q15()</a>, <a class="el" href="group__Corr.html#gabecd3d7b077dbbef43f93e9e037815ed">arm_correlate_fast_q31()</a>, <a class="el" href="group__Corr.html#gad71c0ec70ec69edbc48563d9a5f68451">arm_correlate_opt_q15()</a>, <a class="el" href="group__Corr.html#ga746e8857cafe33ec5d6780729c18c311">arm_correlate_opt_q7()</a>, <a class="el" href="group__Corr.html#ga5ec96b8e420d68b0e626df0812274d46">arm_correlate_q15()</a>, <a class="el" href="group__Corr.html#ga1367dc6c80476406c951e68d7fac4e8c">arm_correlate_q31()</a>, <a class="el" href="group__Corr.html#ga284ddcc49e4ac532d52a70d0383c5992">arm_correlate_q7()</a>, and <a class="el" href="arm__convolution__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
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 </dl>
-<p>Referenced by <a class="el" href="arm__convolution__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
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 <dl><dt><b>Examples: </b></dt><dd><a class="el" href="arm_convolution_example_f32_8c-example.html#a5">arm_convolution_example_f32.c</a>.</dd>
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-<p>Referenced by <a class="el" href="arm__convolution__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
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 <dl><dt><b>Examples: </b></dt><dd><a class="el" href="arm_convolution_example_f32_8c-example.html#a6">arm_convolution_example_f32.c</a>.</dd>
 </dl>
-<p>Referenced by <a class="el" href="arm__convolution__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
-
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 </div>
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@@ -373,7 +347,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_abd1d8a41d439a254a6d729f0d888b04.html">Examples</a></li><li class="navelem"><a class="el" href="dir_dd8be1de2cb2fdb097bade8f148f6c3f.html">ARM</a></li><li class="navelem"><a class="el" href="dir_b20befc9106ee721a20d5e80599f43ba.html">arm_convolution_example</a></li><li class="navelem"><a class="el" href="arm__convolution__example__f32_8c.html">arm_convolution_example_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__copy__f32_8c.html b/docs/DSP/html/arm__copy__f32_8c.html
index 1ec9306..d46f2cd 100644
--- a/docs/DSP/html/arm__copy__f32_8c.html
+++ b/docs/DSP/html/arm__copy__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gadd1f737e677e0e6ca31767c7001417b3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#gadd1f737e677e0e6ca31767c7001417b3">arm_copy_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gadd1f737e677e0e6ca31767c7001417b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a floating-point vector.  <a href="group__copy.html#gadd1f737e677e0e6ca31767c7001417b3">More...</a><br/></td></tr>
-<tr class="separator:gadd1f737e677e0e6ca31767c7001417b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa6dfe9554ca61eb3d1eee498396bce88"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#gaa6dfe9554ca61eb3d1eee498396bce88">arm_copy_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaa6dfe9554ca61eb3d1eee498396bce88"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a floating-point vector.  <a href="group__copy.html#gaa6dfe9554ca61eb3d1eee498396bce88">More...</a><br/></td></tr>
+<tr class="separator:gaa6dfe9554ca61eb3d1eee498396bce88"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_562f151f187819373d848c62a25ba73f.html">SupportFunctions</a></li><li class="navelem"><a class="el" href="arm__copy__f32_8c.html">arm_copy_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__copy__q15_8c.html b/docs/DSP/html/arm__copy__q15_8c.html
index fcc1c32..9dcffcf 100644
--- a/docs/DSP/html/arm__copy__q15_8c.html
+++ b/docs/DSP/html/arm__copy__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga872ca4cfc18c680b8991ccd569a5fda0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#ga872ca4cfc18c680b8991ccd569a5fda0">arm_copy_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga872ca4cfc18c680b8991ccd569a5fda0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a Q15 vector.  <a href="group__copy.html#ga872ca4cfc18c680b8991ccd569a5fda0">More...</a><br/></td></tr>
-<tr class="separator:ga872ca4cfc18c680b8991ccd569a5fda0"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaeb9e8c16ec7fe1235e5610142400f15f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#gaeb9e8c16ec7fe1235e5610142400f15f">arm_copy_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaeb9e8c16ec7fe1235e5610142400f15f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a Q15 vector.  <a href="group__copy.html#gaeb9e8c16ec7fe1235e5610142400f15f">More...</a><br/></td></tr>
+<tr class="separator:gaeb9e8c16ec7fe1235e5610142400f15f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_562f151f187819373d848c62a25ba73f.html">SupportFunctions</a></li><li class="navelem"><a class="el" href="arm__copy__q15_8c.html">arm_copy_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__copy__q31_8c.html b/docs/DSP/html/arm__copy__q31_8c.html
index 0319a0c..dcb11e9 100644
--- a/docs/DSP/html/arm__copy__q31_8c.html
+++ b/docs/DSP/html/arm__copy__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gaddf70be7e3f87e535c324862b501f3f9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#gaddf70be7e3f87e535c324862b501f3f9">arm_copy_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaddf70be7e3f87e535c324862b501f3f9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a Q31 vector.  <a href="group__copy.html#gaddf70be7e3f87e535c324862b501f3f9">More...</a><br/></td></tr>
-<tr class="separator:gaddf70be7e3f87e535c324862b501f3f9"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga94c51fe2e82560ade3803787309c1282"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#ga94c51fe2e82560ade3803787309c1282">arm_copy_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga94c51fe2e82560ade3803787309c1282"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a Q31 vector.  <a href="group__copy.html#ga94c51fe2e82560ade3803787309c1282">More...</a><br/></td></tr>
+<tr class="separator:ga94c51fe2e82560ade3803787309c1282"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_562f151f187819373d848c62a25ba73f.html">SupportFunctions</a></li><li class="navelem"><a class="el" href="arm__copy__q31_8c.html">arm_copy_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__copy__q7_8c.html b/docs/DSP/html/arm__copy__q7_8c.html
index d29f436..cab7b4e 100644
--- a/docs/DSP/html/arm__copy__q7_8c.html
+++ b/docs/DSP/html/arm__copy__q7_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga467579beda492aa92797529d794c88fb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#ga467579beda492aa92797529d794c88fb">arm_copy_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga467579beda492aa92797529d794c88fb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a Q7 vector.  <a href="group__copy.html#ga467579beda492aa92797529d794c88fb">More...</a><br/></td></tr>
-<tr class="separator:ga467579beda492aa92797529d794c88fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9b947e38172ae7e5de780bed13a404fe"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#ga9b947e38172ae7e5de780bed13a404fe">arm_copy_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga9b947e38172ae7e5de780bed13a404fe"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a Q7 vector.  <a href="group__copy.html#ga9b947e38172ae7e5de780bed13a404fe">More...</a><br/></td></tr>
+<tr class="separator:ga9b947e38172ae7e5de780bed13a404fe"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
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   <ul>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__correlate__f32_8c.html b/docs/DSP/html/arm__correlate__f32_8c.html
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-<tr class="separator:ga22021e4222773f01e9960358a531cfb8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga371054f6e5fd78bec668908251f1b2f2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga371054f6e5fd78bec668908251f1b2f2">arm_correlate_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga371054f6e5fd78bec668908251f1b2f2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of floating-point sequences.  <a href="group__Corr.html#ga371054f6e5fd78bec668908251f1b2f2">More...</a><br/></td></tr>
+<tr class="separator:ga371054f6e5fd78bec668908251f1b2f2"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/arm__correlate__fast__opt__q15_8c.html b/docs/DSP/html/arm__correlate__fast__opt__q15_8c.html
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-<tr class="separator:ga40a0236b17220e8e22a22b5bc1c53c6b"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memdesc:ga3fc8d680844a3d24af25e45df96c82f3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q15 sequences (fast version).  <a href="group__Corr.html#ga3fc8d680844a3d24af25e45df96c82f3">More...</a><br/></td></tr>
+<tr class="separator:ga3fc8d680844a3d24af25e45df96c82f3"><td class="memSeparator" colspan="2">&#160;</td></tr>
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@@ -126,7 +126,7 @@
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   <ul>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__correlate__fast__q15_8c.html b/docs/DSP/html/arm__correlate__fast__q15_8c.html
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--- a/docs/DSP/html/arm__correlate__fast__q15_8c.html
+++ b/docs/DSP/html/arm__correlate__fast__q15_8c.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
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-<tr class="memitem:gac8de3da44f58e86c2c86156276ca154f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#gac8de3da44f58e86c2c86156276ca154f">arm_correlate_fast_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
-<tr class="memdesc:gac8de3da44f58e86c2c86156276ca154f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.  <a href="group__Corr.html#gac8de3da44f58e86c2c86156276ca154f">More...</a><br/></td></tr>
-<tr class="separator:gac8de3da44f58e86c2c86156276ca154f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab4dea2049c8a26118ee4de9b90f1b9bd"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#gab4dea2049c8a26118ee4de9b90f1b9bd">arm_correlate_fast_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
+<tr class="memdesc:gab4dea2049c8a26118ee4de9b90f1b9bd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q15 sequences (fast version).  <a href="group__Corr.html#gab4dea2049c8a26118ee4de9b90f1b9bd">More...</a><br/></td></tr>
+<tr class="separator:gab4dea2049c8a26118ee4de9b90f1b9bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
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 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
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   <ul>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__correlate__fast__q31_8c.html b/docs/DSP/html/arm__correlate__fast__q31_8c.html
index a3ffbbb..817d33f 100644
--- a/docs/DSP/html/arm__correlate__fast__q31_8c.html
+++ b/docs/DSP/html/arm__correlate__fast__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
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-<tr class="memitem:gabecd3d7b077dbbef43f93e9e037815ed"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#gabecd3d7b077dbbef43f93e9e037815ed">arm_correlate_fast_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
-<tr class="memdesc:gabecd3d7b077dbbef43f93e9e037815ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.  <a href="group__Corr.html#gabecd3d7b077dbbef43f93e9e037815ed">More...</a><br/></td></tr>
-<tr class="separator:gabecd3d7b077dbbef43f93e9e037815ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1e85a8ceac5c0f27007e6ba2c8f20686"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga1e85a8ceac5c0f27007e6ba2c8f20686">arm_correlate_fast_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga1e85a8ceac5c0f27007e6ba2c8f20686"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q31 sequences (fast version).  <a href="group__Corr.html#ga1e85a8ceac5c0f27007e6ba2c8f20686">More...</a><br/></td></tr>
+<tr class="separator:ga1e85a8ceac5c0f27007e6ba2c8f20686"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__correlate__fast__q31_8c.html">arm_correlate_fast_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/arm__correlate__opt__q15_8c.html b/docs/DSP/html/arm__correlate__opt__q15_8c.html
index c1ad995..dd23087 100644
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+++ b/docs/DSP/html/arm__correlate__opt__q15_8c.html
@@ -32,7 +32,7 @@
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    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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 <table class="memberdecls">
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-<tr class="memitem:gad71c0ec70ec69edbc48563d9a5f68451"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#gad71c0ec70ec69edbc48563d9a5f68451">arm_correlate_opt_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch)</td></tr>
-<tr class="memdesc:gad71c0ec70ec69edbc48563d9a5f68451"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q15 sequences.  <a href="group__Corr.html#gad71c0ec70ec69edbc48563d9a5f68451">More...</a><br/></td></tr>
-<tr class="separator:gad71c0ec70ec69edbc48563d9a5f68451"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga3cfae563b16fa3be577cab5acf63aeea"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga3cfae563b16fa3be577cab5acf63aeea">arm_correlate_opt_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch)</td></tr>
+<tr class="memdesc:ga3cfae563b16fa3be577cab5acf63aeea"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q15 sequences.  <a href="group__Corr.html#ga3cfae563b16fa3be577cab5acf63aeea">More...</a><br/></td></tr>
+<tr class="separator:ga3cfae563b16fa3be577cab5acf63aeea"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__correlate__opt__q15_8c.html">arm_correlate_opt_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__correlate__opt__q7_8c.html b/docs/DSP/html/arm__correlate__opt__q7_8c.html
index 713800f..8ccfb45 100644
--- a/docs/DSP/html/arm__correlate__opt__q7_8c.html
+++ b/docs/DSP/html/arm__correlate__opt__q7_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga746e8857cafe33ec5d6780729c18c311"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga746e8857cafe33ec5d6780729c18c311">arm_correlate_opt_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
-<tr class="memdesc:ga746e8857cafe33ec5d6780729c18c311"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q7 sequences.  <a href="group__Corr.html#ga746e8857cafe33ec5d6780729c18c311">More...</a><br/></td></tr>
-<tr class="separator:ga746e8857cafe33ec5d6780729c18c311"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga3c672e8ef8360c652d351097535f080d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga3c672e8ef8360c652d351097535f080d">arm_correlate_opt_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
+<tr class="memdesc:ga3c672e8ef8360c652d351097535f080d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q7 sequences.  <a href="group__Corr.html#ga3c672e8ef8360c652d351097535f080d">More...</a><br/></td></tr>
+<tr class="separator:ga3c672e8ef8360c652d351097535f080d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__correlate__opt__q7_8c.html">arm_correlate_opt_q7.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__correlate__q15_8c.html b/docs/DSP/html/arm__correlate__q15_8c.html
index c316ccf..d53d4b0 100644
--- a/docs/DSP/html/arm__correlate__q15_8c.html
+++ b/docs/DSP/html/arm__correlate__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga5ec96b8e420d68b0e626df0812274d46"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga5ec96b8e420d68b0e626df0812274d46">arm_correlate_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
-<tr class="memdesc:ga5ec96b8e420d68b0e626df0812274d46"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q15 sequences.  <a href="group__Corr.html#ga5ec96b8e420d68b0e626df0812274d46">More...</a><br/></td></tr>
-<tr class="separator:ga5ec96b8e420d68b0e626df0812274d46"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga8fc4e632ab08b28435ff62e7eb65f508"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga8fc4e632ab08b28435ff62e7eb65f508">arm_correlate_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga8fc4e632ab08b28435ff62e7eb65f508"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q15 sequences.  <a href="group__Corr.html#ga8fc4e632ab08b28435ff62e7eb65f508">More...</a><br/></td></tr>
+<tr class="separator:ga8fc4e632ab08b28435ff62e7eb65f508"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__correlate__q15_8c.html">arm_correlate_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__correlate__q31_8c.html b/docs/DSP/html/arm__correlate__q31_8c.html
index ecfd24a..b619c0d 100644
--- a/docs/DSP/html/arm__correlate__q31_8c.html
+++ b/docs/DSP/html/arm__correlate__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga1367dc6c80476406c951e68d7fac4e8c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga1367dc6c80476406c951e68d7fac4e8c">arm_correlate_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
-<tr class="memdesc:ga1367dc6c80476406c951e68d7fac4e8c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q31 sequences.  <a href="group__Corr.html#ga1367dc6c80476406c951e68d7fac4e8c">More...</a><br/></td></tr>
-<tr class="separator:ga1367dc6c80476406c951e68d7fac4e8c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9e8ad8bae8400dac2afc995d38594744"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga9e8ad8bae8400dac2afc995d38594744">arm_correlate_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga9e8ad8bae8400dac2afc995d38594744"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q31 sequences.  <a href="group__Corr.html#ga9e8ad8bae8400dac2afc995d38594744">More...</a><br/></td></tr>
+<tr class="separator:ga9e8ad8bae8400dac2afc995d38594744"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__correlate__q31_8c.html">arm_correlate_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__correlate__q7_8c.html b/docs/DSP/html/arm__correlate__q7_8c.html
index 8dfb9de..64e071a 100644
--- a/docs/DSP/html/arm__correlate__q7_8c.html
+++ b/docs/DSP/html/arm__correlate__q7_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga284ddcc49e4ac532d52a70d0383c5992"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga284ddcc49e4ac532d52a70d0383c5992">arm_correlate_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst)</td></tr>
-<tr class="memdesc:ga284ddcc49e4ac532d52a70d0383c5992"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q7 sequences.  <a href="group__Corr.html#ga284ddcc49e4ac532d52a70d0383c5992">More...</a><br/></td></tr>
-<tr class="separator:ga284ddcc49e4ac532d52a70d0383c5992"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab5d8acc830313be970de59c2d5a26c72"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#gab5d8acc830313be970de59c2d5a26c72">arm_correlate_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst)</td></tr>
+<tr class="memdesc:gab5d8acc830313be970de59c2d5a26c72"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q7 sequences.  <a href="group__Corr.html#gab5d8acc830313be970de59c2d5a26c72">More...</a><br/></td></tr>
+<tr class="separator:gab5d8acc830313be970de59c2d5a26c72"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/arm__cos__q15_8c.html b/docs/DSP/html/arm__cos__q15_8c.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/arm__dct4__f32_8c.html b/docs/DSP/html/arm__dct4__f32_8c.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/arm__dct4__init__f32_8c.html b/docs/DSP/html/arm__dct4__init__f32_8c.html
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@@ -120,25 +119,6 @@
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-<tr class="memitem:gad00f29d896d64d6da7afbbb9d3e182a4"><td class="memItemLeft" align="right" valign="top">static const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#gad00f29d896d64d6da7afbbb9d3e182a4">Weights_128</a> [256]</td></tr>
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-<tr class="memitem:gaeb67b0be5b3c2139d660e02cedeed908"><td class="memItemLeft" align="right" valign="top">static const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#gaeb67b0be5b3c2139d660e02cedeed908">Weights_512</a> [1024]</td></tr>
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@@ -146,7 +126,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/arm__dct4__init__q15_8c.html b/docs/DSP/html/arm__dct4__init__q15_8c.html
index 2773964..56bcf3d 100644
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@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
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@@ -108,8 +108,7 @@
 
 <div class="header">
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-<a href="#func-members">Functions</a> &#124;
-<a href="#var-members">Variables</a>  </div>
+<a href="#func-members">Functions</a>  </div>
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@@ -120,25 +119,6 @@
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-Variables</h2></td></tr>
-<tr class="memitem:gaa4ff5e6f062efb1d1ec8c6c2207c3727"><td class="memItemLeft" align="right" valign="top">static const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> <a class="el" href="arm__math_8h.html#a280a402ab28c399fcc4168f2ed631acb">ALIGN4</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#gaa4ff5e6f062efb1d1ec8c6c2207c3727">WeightsQ15_128</a> [256]</td></tr>
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-<tr class="memitem:gadc8ee250fc217d6cb5c84dd7c1eb6d31"><td class="memItemLeft" align="right" valign="top">static const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> <a class="el" href="arm__math_8h.html#a280a402ab28c399fcc4168f2ed631acb">ALIGN4</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#gadc8ee250fc217d6cb5c84dd7c1eb6d31">WeightsQ15_512</a> [1024]</td></tr>
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-<tr class="memitem:ga1477edd21c7b08b0b59a564f6c24d6c5"><td class="memItemLeft" align="right" valign="top">static const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> <a class="el" href="arm__math_8h.html#a280a402ab28c399fcc4168f2ed631acb">ALIGN4</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#ga1477edd21c7b08b0b59a564f6c24d6c5">cos_factorsQ15_128</a> [128]</td></tr>
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-<tr class="memitem:gaeee5df7c1be2374441868ecbbc6c7e5d"><td class="memItemLeft" align="right" valign="top">static const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> <a class="el" href="arm__math_8h.html#a280a402ab28c399fcc4168f2ed631acb">ALIGN4</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#gaeee5df7c1be2374441868ecbbc6c7e5d">cos_factorsQ15_2048</a> [2048]</td></tr>
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-<tr class="memitem:ga988ff0563cc9df7848c9348871ac6c07"><td class="memItemLeft" align="right" valign="top">static const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> <a class="el" href="arm__math_8h.html#a280a402ab28c399fcc4168f2ed631acb">ALIGN4</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#ga988ff0563cc9df7848c9348871ac6c07">cos_factorsQ15_8192</a> [8192]</td></tr>
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@@ -146,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_f93595924be31e3058e32faa649f9f3e.html">TransformFunctions</a></li><li class="navelem"><a class="el" href="arm__dct4__init__q15_8c.html">arm_dct4_init_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__dct4__init__q31_8c.html b/docs/DSP/html/arm__dct4__init__q31_8c.html
index fc3491b..7c2680e 100644
--- a/docs/DSP/html/arm__dct4__init__q31_8c.html
+++ b/docs/DSP/html/arm__dct4__init__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -108,8 +108,7 @@
 
 <div class="header">
   <div class="summary">
-<a href="#func-members">Functions</a> &#124;
-<a href="#var-members">Variables</a>  </div>
+<a href="#func-members">Functions</a>  </div>
   <div class="headertitle">
 <div class="title">arm_dct4_init_q31.c File Reference</div>  </div>
 </div><!--header-->
@@ -120,25 +119,6 @@
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 <tr class="memdesc:ga631bb59c7c97c814ff7147ecba6a716a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 DCT4/IDCT4.  <a href="group__DCT4__IDCT4.html#ga631bb59c7c97c814ff7147ecba6a716a">More...</a><br/></td></tr>
 <tr class="separator:ga631bb59c7c97c814ff7147ecba6a716a"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table><table class="memberdecls">
-<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="var-members"></a>
-Variables</h2></td></tr>
-<tr class="memitem:ga02d7024538a87214296b01d83ba36b02"><td class="memItemLeft" align="right" valign="top">static const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#ga02d7024538a87214296b01d83ba36b02">WeightsQ31_128</a> [256]</td></tr>
-<tr class="separator:ga02d7024538a87214296b01d83ba36b02"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga31a8217a96f7d3171921e98398f31596"><td class="memItemLeft" align="right" valign="top">static const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#ga31a8217a96f7d3171921e98398f31596">WeightsQ31_512</a> [1024]</td></tr>
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-<tr class="memitem:ga725b65c25a02b3cad329e18bb832f65e"><td class="memItemLeft" align="right" valign="top">static const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#ga725b65c25a02b3cad329e18bb832f65e">WeightsQ31_2048</a> [4096]</td></tr>
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-<tr class="separator:ga16bf6bbe5c4c9b35f88253cf7bdcc435"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:gabb8ee2004a3520fd08388db637d43875"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga3559569e603cb918911074be88523d0e"><td class="memItemLeft" align="right" valign="top">static const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#ga3559569e603cb918911074be88523d0e">cos_factorsQ31_512</a> [512]</td></tr>
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-<tr class="memitem:gaa15fc3fb058482defda371113cd12e74"><td class="memItemLeft" align="right" valign="top">static const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#gaa15fc3fb058482defda371113cd12e74">cos_factorsQ31_2048</a> [2048]</td></tr>
-<tr class="separator:gaa15fc3fb058482defda371113cd12e74"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf687c4bbdbc700a3ad5d807d28de63e4"><td class="memItemLeft" align="right" valign="top">static const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#gaf687c4bbdbc700a3ad5d807d28de63e4">cos_factorsQ31_8192</a> [8192]</td></tr>
-<tr class="separator:gaf687c4bbdbc700a3ad5d807d28de63e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -146,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_f93595924be31e3058e32faa649f9f3e.html">TransformFunctions</a></li><li class="navelem"><a class="el" href="arm__dct4__init__q31_8c.html">arm_dct4_init_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__dct4__q15_8c.html b/docs/DSP/html/arm__dct4__q15_8c.html
index d97434d..3ee31b7 100644
--- a/docs/DSP/html/arm__dct4__q15_8c.html
+++ b/docs/DSP/html/arm__dct4__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_f93595924be31e3058e32faa649f9f3e.html">TransformFunctions</a></li><li class="navelem"><a class="el" href="arm__dct4__q15_8c.html">arm_dct4_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__dct4__q31_8c.html b/docs/DSP/html/arm__dct4__q31_8c.html
index 3c10548..b5d90ed 100644
--- a/docs/DSP/html/arm__dct4__q31_8c.html
+++ b/docs/DSP/html/arm__dct4__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_f93595924be31e3058e32faa649f9f3e.html">TransformFunctions</a></li><li class="navelem"><a class="el" href="arm__dct4__q31_8c.html">arm_dct4_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__dot__prod__f32_8c.html b/docs/DSP/html/arm__dot__prod__f32_8c.html
index a974f8b..875aa27 100644
--- a/docs/DSP/html/arm__dot__prod__f32_8c.html
+++ b/docs/DSP/html/arm__dot__prod__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga55418d4362f6ba84c327f9b4f089a8c3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dot__prod.html#ga55418d4362f6ba84c327f9b4f089a8c3">arm_dot_prod_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *result)</td></tr>
-<tr class="memdesc:ga55418d4362f6ba84c327f9b4f089a8c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of floating-point vectors.  <a href="group__dot__prod.html#ga55418d4362f6ba84c327f9b4f089a8c3">More...</a><br/></td></tr>
-<tr class="separator:ga55418d4362f6ba84c327f9b4f089a8c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gadf26f6bc62d6416528663ad3e46fbf67"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicDotProd.html#gadf26f6bc62d6416528663ad3e46fbf67">arm_dot_prod_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *result)</td></tr>
+<tr class="memdesc:gadf26f6bc62d6416528663ad3e46fbf67"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of floating-point vectors.  <a href="group__BasicDotProd.html#gadf26f6bc62d6416528663ad3e46fbf67">More...</a><br/></td></tr>
+<tr class="separator:gadf26f6bc62d6416528663ad3e46fbf67"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__dot__prod__f32_8c.html">arm_dot_prod_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__dot__prod__q15_8c.html b/docs/DSP/html/arm__dot__prod__q15_8c.html
index af6a64f..89a2255 100644
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-<tr class="memdesc:ga436d5bed28a4b73b24acbde436a3044b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of Q15 vectors.  <a href="group__dot__prod.html#ga436d5bed28a4b73b24acbde436a3044b">More...</a><br/></td></tr>
-<tr class="separator:ga436d5bed28a4b73b24acbde436a3044b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac2314012fbbf73bfd95ce8c57bc9ba69"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicDotProd.html#gac2314012fbbf73bfd95ce8c57bc9ba69">arm_dot_prod_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *result)</td></tr>
+<tr class="memdesc:gac2314012fbbf73bfd95ce8c57bc9ba69"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of Q15 vectors.  <a href="group__BasicDotProd.html#gac2314012fbbf73bfd95ce8c57bc9ba69">More...</a><br/></td></tr>
+<tr class="separator:gac2314012fbbf73bfd95ce8c57bc9ba69"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__dot__prod__q31_8c.html b/docs/DSP/html/arm__dot__prod__q31_8c.html
index 77433b7..dbed4ae 100644
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+++ b/docs/DSP/html/arm__dot__prod__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
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 Functions</h2></td></tr>
-<tr class="memitem:gab15d8fa060fc85b4d948d091b7deaa11"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dot__prod.html#gab15d8fa060fc85b4d948d091b7deaa11">arm_dot_prod_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *result)</td></tr>
-<tr class="memdesc:gab15d8fa060fc85b4d948d091b7deaa11"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of Q31 vectors.  <a href="group__dot__prod.html#gab15d8fa060fc85b4d948d091b7deaa11">More...</a><br/></td></tr>
-<tr class="separator:gab15d8fa060fc85b4d948d091b7deaa11"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafe3f9ace6c4576847eabf44ed7ca7b96"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicDotProd.html#gafe3f9ace6c4576847eabf44ed7ca7b96">arm_dot_prod_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *result)</td></tr>
+<tr class="memdesc:gafe3f9ace6c4576847eabf44ed7ca7b96"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of Q31 vectors.  <a href="group__BasicDotProd.html#gafe3f9ace6c4576847eabf44ed7ca7b96">More...</a><br/></td></tr>
+<tr class="separator:gafe3f9ace6c4576847eabf44ed7ca7b96"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
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@@ -126,7 +126,7 @@
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   <ul>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__dot__prod__q7_8c.html b/docs/DSP/html/arm__dot__prod__q7_8c.html
index 1c6a544..b5dcee3 100644
--- a/docs/DSP/html/arm__dot__prod__q7_8c.html
+++ b/docs/DSP/html/arm__dot__prod__q7_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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 <table class="memberdecls">
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-<tr class="memitem:ga9c3293a50ac7ec8ba928bf8e3aaea6c1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dot__prod.html#ga9c3293a50ac7ec8ba928bf8e3aaea6c1">arm_dot_prod_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *result)</td></tr>
-<tr class="memdesc:ga9c3293a50ac7ec8ba928bf8e3aaea6c1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of Q7 vectors.  <a href="group__dot__prod.html#ga9c3293a50ac7ec8ba928bf8e3aaea6c1">More...</a><br/></td></tr>
-<tr class="separator:ga9c3293a50ac7ec8ba928bf8e3aaea6c1"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaadd347d5f5adf902c63f0b90ffc19538"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicDotProd.html#gaadd347d5f5adf902c63f0b90ffc19538">arm_dot_prod_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *result)</td></tr>
+<tr class="memdesc:gaadd347d5f5adf902c63f0b90ffc19538"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of Q7 vectors.  <a href="group__BasicDotProd.html#gaadd347d5f5adf902c63f0b90ffc19538">More...</a><br/></td></tr>
+<tr class="separator:gaadd347d5f5adf902c63f0b90ffc19538"><td class="memSeparator" colspan="2">&#160;</td></tr>
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   <ul>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__dotproduct__example_2Abstract_8txt.html b/docs/DSP/html/arm__dotproduct__example_2Abstract_8txt.html
index 6f5b73f..2cf546b 100644
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+++ b/docs/DSP/html/arm__dotproduct__example_2Abstract_8txt.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -156,7 +156,7 @@
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   <ul>
     <li class="navelem"><a class="el" href="arm__dotproduct__example_2Abstract_8txt.html">Abstract.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__dotproduct__example__f32_8c.html b/docs/DSP/html/arm__dotproduct__example__f32_8c.html
index 24137b1..727b540 100644
--- a/docs/DSP/html/arm__dotproduct__example__f32_8c.html
+++ b/docs/DSP/html/arm__dotproduct__example__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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-<p>Referenced by <a class="el" href="arm__dotproduct__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
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-<p>Referenced by <a class="el" href="arm__dotproduct__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
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-
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 </dl>
-<p>Referenced by <a class="el" href="arm__dotproduct__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
-
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@@ -221,8 +213,6 @@
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-<p>Referenced by <a class="el" href="arm__dotproduct__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
-
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@@ -236,8 +226,6 @@
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-<p>Referenced by <a class="el" href="arm__dotproduct__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
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@@ -251,8 +239,6 @@
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-<p>Referenced by <a class="el" href="arm__dotproduct__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
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 <dl><dt><b>Examples: </b></dt><dd><a class="el" href="arm_convolution_example_f32_8c-example.html#a12">arm_convolution_example_f32.c</a>, <a class="el" href="arm_dotproduct_example_f32_8c-example.html#a6">arm_dotproduct_example_f32.c</a>, <a class="el" href="arm_fft_bin_example_f32_8c-example.html#a9">arm_fft_bin_example_f32.c</a>, <a class="el" href="arm_fir_example_f32_8c-example.html#a13">arm_fir_example_f32.c</a>, <a class="el" href="arm_graphic_equalizer_example_q31_8c-example.html#a18">arm_graphic_equalizer_example_q31.c</a>, <a class="el" href="arm_linear_interp_example_f32_8c-example.html#a9">arm_linear_interp_example_f32.c</a>, <a class="el" href="arm_matrix_example_f32_8c-example.html#a10">arm_matrix_example_f32.c</a>, <a class="el" href="arm_signal_converge_example_f32_8c-example.html#a22">arm_signal_converge_example_f32.c</a>, and <a class="el" href="arm_variance_example_f32_8c-example.html#a8">arm_variance_example_f32.c</a>.</dd>
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-<p>Referenced by <a class="el" href="group__ComplexFFT.html#gac9565e6bc7229577ecf5e090313cafd7">arm_cfft_radix2_init_f32()</a>, <a class="el" href="group__ComplexFFT.html#ga5c5b2127b3c4ea2d03692127f8543858">arm_cfft_radix2_init_q15()</a>, <a class="el" href="group__ComplexFFT.html#gabec9611e77382f31e152668bf6b4b638">arm_cfft_radix2_init_q31()</a>, <a class="el" href="group__ComplexFFT.html#gaf336459f684f0b17bfae539ef1b1b78a">arm_cfft_radix4_init_f32()</a>, <a class="el" href="group__ComplexFFT.html#ga0c2acfda3126c452e75b81669e8ad9ef">arm_cfft_radix4_init_q15()</a>, <a class="el" href="group__ComplexFFT.html#gad5caaafeec900c8ff72321c01bbd462c">arm_cfft_radix4_init_q31()</a>, <a class="el" href="group__PartialConv.html#ga16d10f32072cd79fc5fb6e785df45f5e">arm_conv_partial_f32()</a>, <a class="el" href="group__PartialConv.html#ga3de9c4ddcc7886de25b70d875099a8d9">arm_conv_partial_fast_opt_q15()</a>, <a class="el" href="group__PartialConv.html#ga1e4d43385cb62262a78c6752fe1fafb2">arm_conv_partial_fast_q15()</a>, <a class="el" href="group__PartialConv.html#ga10c5294cda8c4985386f4e3944be7650">arm_conv_partial_fast_q31()</a>, <a class="el" href="group__PartialConv.html#ga834b23b4ade8682beeb55778399101f8">arm_conv_partial_opt_q15()</a>, <a class="el" href="group__PartialConv.html#ga3707e16af1435b215840006a7ab0c98f">arm_conv_partial_opt_q7()</a>, <a class="el" href="group__PartialConv.html#ga209a2a913a0c5e5679c5988da8f46b03">arm_conv_partial_q15()</a>, <a class="el" href="group__PartialConv.html#ga78e73a5f02d103168a09821fb461e77a">arm_conv_partial_q31()</a>, <a class="el" href="group__PartialConv.html#ga8567259fe18396dd972242c41741ebf4">arm_conv_partial_q7()</a>, <a class="el" href="group__DCT4__IDCT4.html#gab094ad3bc6fa1b84e8b12a24e1850a06">arm_dct4_init_f32()</a>, <a class="el" href="group__DCT4__IDCT4.html#ga966fd1b66a80873964533703ab5dc054">arm_dct4_init_q15()</a>, <a class="el" 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href="group__MatrixMult.html#ga2785e8c1b785348b0c439b56aaf585a3">arm_mat_mult_fast_q31()</a>, <a class="el" href="group__MatrixMult.html#ga7521d59196189bb6dde26e8cdfb66e21">arm_mat_mult_q15()</a>, <a class="el" href="group__MatrixMult.html#ga2ec612a8c2c4916477fb9bc1ab548a6e">arm_mat_mult_q31()</a>, <a class="el" href="group__MatrixScale.html#ga9cb4e385b18c9a0b9cbc940c1067ca12">arm_mat_scale_f32()</a>, <a class="el" href="group__MatrixScale.html#ga7521769e2cf1c3d9c4656138cd2ae2ca">arm_mat_scale_q15()</a>, <a class="el" href="group__MatrixScale.html#ga609743821ee81fa8c34c4bcdc1ed9744">arm_mat_scale_q31()</a>, <a class="el" href="group__MatrixSub.html#gac8b72fb70246ccfee3b372002345732c">arm_mat_sub_f32()</a>, <a class="el" href="group__MatrixSub.html#gaf647776a425b7f9dd0aca3e11d81f02f">arm_mat_sub_q15()</a>, <a class="el" href="group__MatrixSub.html#ga39f42e0e3b7f115fbb909d6ff4e1329d">arm_mat_sub_q31()</a>, <a class="el" href="group__MatrixTrans.html#gad7dd9f108429da13d3864696ceeec789">arm_mat_trans_f32()</a>, <a class="el" href="group__MatrixTrans.html#ga4f4f821cc695fd0ef9061d702e08050a">arm_mat_trans_q15()</a>, <a class="el" href="group__MatrixTrans.html#ga30a4d49489ac67ff98a46b9f58f73bf1">arm_mat_trans_q31()</a>, <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>, <a class="el" href="group__RealFFT.html#ga10717ee326bf50832ef1c25b85a23068">arm_rfft_init_f32()</a>, <a class="el" href="group__RealFFT.html#ga053450cc600a55410ba5b5605e96245d">arm_rfft_init_q15()</a>, <a class="el" href="group__RealFFT.html#ga5abde938abbe72e95c5bab080eb33c45">arm_rfft_init_q31()</a>, and <a class="el" href="arm__convolution__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__fft__bin__example_2Abstract_8txt.html b/docs/DSP/html/arm__fft__bin__example_2Abstract_8txt.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__fft__bin__example__f32_8c.html b/docs/DSP/html/arm__fft__bin__example__f32_8c.html
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-<p>References <a class="el" href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80">arm_cfft_f32()</a>, <a class="el" href="arm__const__structs_8h.html#a05abc294a9159abbd6ffb4f188fe18b1">arm_cfft_sR_f32_len1024</a>, <a class="el" href="group__cmplx__mag.html#gae45024c497392cde2ae358a76d435213">arm_cmplx_mag_f32()</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a09457f2be656b35015fd6d36202fa376">ARM_MATH_TEST_FAILURE</a>, <a class="el" href="group__Max.html#ga5b89d1b04575aeec494f678695fb87d8">arm_max_f32()</a>, <a class="el" href="arm__fft__bin__example__f32_8c.html#a4d2e31c38e8172505e0a369a6898657d">doBitReverse</a>, <a class="el" href="arm__fft__bin__example__f32_8c.html#a9b500899c581f6df3ffc0a9f3a9ef6aa">fftSize</a>, <a class="el" href="arm__fft__bin__example__f32_8c.html#a379ccb99013d369a41b49619083c16ef">ifftFlag</a>, <a class="el" href="arm__fft__bin__example__f32_8c.html#aec50b0f697fd9e7e7e244487a4bd57e4">refIndex</a>, <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>, <a class="el" href="arm__fft__bin__example__f32_8c.html#a4a391651dbb95db35ccba70fc4f9e049">testIndex</a>, <a class="el" href="arm__fft__bin__example__f32_8c.html#a3d8ecb82590486ceebccc76263963b16">testInput_f32_10khz</a>, and <a class="el" href="arm__fft__bin__example__f32_8c.html#aaaf907bde12051bc8bb5d48b7d315a35">testOutput</a>.</p>
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-<p>Referenced by <a class="el" href="arm__fft__bin__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
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-<p>Referenced by <a class="el" href="arm__fft__bin__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
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-<p>Referenced by <a class="el" href="group__ComplexFFT.html#gac9565e6bc7229577ecf5e090313cafd7">arm_cfft_radix2_init_f32()</a>, <a class="el" href="group__ComplexFFT.html#ga5c5b2127b3c4ea2d03692127f8543858">arm_cfft_radix2_init_q15()</a>, <a class="el" href="group__ComplexFFT.html#gabec9611e77382f31e152668bf6b4b638">arm_cfft_radix2_init_q31()</a>, <a class="el" href="group__ComplexFFT.html#gaf336459f684f0b17bfae539ef1b1b78a">arm_cfft_radix4_init_f32()</a>, <a class="el" href="group__ComplexFFT.html#ga0c2acfda3126c452e75b81669e8ad9ef">arm_cfft_radix4_init_q15()</a>, <a class="el" href="group__ComplexFFT.html#gad5caaafeec900c8ff72321c01bbd462c">arm_cfft_radix4_init_q31()</a>, and <a class="el" href="arm__fft__bin__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
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-<p>Referenced by <a class="el" href="arm__fft__bin__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
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-<p>Referenced by <a class="el" href="arm__fft__bin__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
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-<p>Referenced by <a class="el" href="arm__fft__bin__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
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-<p>Referenced by <a class="el" href="arm__fft__bin__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
-
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@@ -297,7 +281,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gaef8e86add28f15fdc5ecc484e9dd7a4e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#gaef8e86add28f15fdc5ecc484e9dd7a4e">arm_fir_decimate_q31</a> (const <a class="el" href="structarm__fir__decimate__instance__q31.html">arm_fir_decimate_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaef8e86add28f15fdc5ecc484e9dd7a4e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 FIR decimator.  <a href="group__FIR__decimate.html#gaef8e86add28f15fdc5ecc484e9dd7a4e">More...</a><br/></td></tr>
-<tr class="separator:gaef8e86add28f15fdc5ecc484e9dd7a4e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga27c05d7892f8a327aab86fbfee9b0f29"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#ga27c05d7892f8a327aab86fbfee9b0f29">arm_fir_decimate_q31</a> (const <a class="el" href="structarm__fir__decimate__instance__q31.html">arm_fir_decimate_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga27c05d7892f8a327aab86fbfee9b0f29"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 FIR decimator.  <a href="group__FIR__decimate.html#ga27c05d7892f8a327aab86fbfee9b0f29">More...</a><br/></td></tr>
+<tr class="separator:ga27c05d7892f8a327aab86fbfee9b0f29"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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     <li class="navelem"><a class="el" href="arm__fir__example_2Abstract_8txt.html">Abstract.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/arm__fir__example_2math__helper_8c.html b/docs/DSP/html/arm__fir__example_2math__helper_8c.html
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 <dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
-<p>References <a class="el" href="arm__fir__example_2math__helper_8c.html#ace1e1f7b72573d1934782ec999a04f99">arm_calc_2pow()</a>.</p>
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 <dl class="section return"><dt>Returns</dt><dd>pow(2, numShifts) </dd></dl>
 
-<p>Referenced by <a class="el" href="arm__fir__example_2math__helper_8c.html#a13580a6ff7a8a68146de727bdf8fba88">arm_apply_guard_bits()</a>.</p>
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 <dl class="section return"><dt>Returns</dt><dd>none The function Provides the guard bits for the buffer to avoid overflow </dd></dl>
 
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
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 </dl>
 <dl class="section return"><dt>Returns</dt><dd>none The function Provides the guard bits for the buffer to avoid overflow </dd></dl>
 
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
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 </dl>
 <dl class="section return"><dt>Returns</dt><dd>none The function Provides the guard bits for the buffer to avoid overflow </dd></dl>
 
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/arm__fir__example_2math__helper_8h.html b/docs/DSP/html/arm__fir__example_2math__helper_8h.html
index a6039bf..274252e 100644
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+++ b/docs/DSP/html/arm__fir__example_2math__helper_8h.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/arm__fir__example__f32_8c.html b/docs/DSP/html/arm__fir__example__f32_8c.html
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-<p>Referenced by <a class="el" href="arm__fir__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
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-<p>Referenced by <a class="el" href="arm__fir__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
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 <dl><dt><b>Examples: </b></dt><dd><a class="el" href="arm_fir_example_f32_8c-example.html#a1">arm_fir_example_f32.c</a>.</dd>
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-<p>Referenced by <a class="el" href="arm__fir__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
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-<p>References <a class="el" href="group__FIR.html#gae8fb334ea67eb6ecbd31824ddc14cd6a">arm_fir_f32()</a>, <a class="el" href="group__FIR.html#ga98d13def6427e29522829f945d0967db">arm_fir_init_f32()</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a09457f2be656b35015fd6d36202fa376">ARM_MATH_TEST_FAILURE</a>, <a class="el" href="arm__convolution__example_2math__helper_8c.html#aeea2952e70a1040a6efa555564bbeeab">arm_snr_f32()</a>, <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__fir__example__f32_8c.html#ae070afd14f437ad1ae0a947e4403dd0e">firCoeffs32</a>, <a class="el" href="arm__fir__example__f32_8c.html#a46d61cabe5cb207f2776e1d4f8ca0f38">firStateF32</a>, <a class="el" href="arm__fir__example__f32_8c.html#a7579d94e0a80fb9d376ea6c7897f73b0">NUM_TAPS</a>, <a class="el" href="arm__fir__example__f32_8c.html#af7d5613bda9a19b2ccae5d6cb79a22bc">numBlocks</a>, <a class="el" href="arm__fir__example__f32_8c.html#a12d0acaa028f1dcd964d2d188e7df331">refOutput</a>, <a class="el" href="arm__fir__example__f32_8c.html#af06013f588a7003278de222913c9d819">snr</a>, <a class="el" href="arm__fir__example__f32_8c.html#af7d1dd4deffa8e7ed6429e5dd0fe1812">SNR_THRESHOLD_F32</a>, <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>, <a class="el" href="arm__fir__example__f32_8c.html#abc004a7fade488e72310fd96c0a101dc">TEST_LENGTH_SAMPLES</a>, <a class="el" href="arm__fir__example__f32_8c.html#a35d190391c204b677e2839d76ede6e8b">testInput_f32_1kHz_15kHz</a>, and <a class="el" href="arm__fir__example__f32_8c.html#afd4d61aad5f35a4e42d580004e2f9a1d">testOutput</a>.</p>
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class="el" href="arm__math_8h.html#a885325c33991f03743a9d9b06868a099">arm_circularWrite_q15()</a>, <a class="el" href="arm__math_8h.html#a2db43ffe947dce0f676c09580d1f6765">arm_circularWrite_q7()</a>, <a class="el" href="group__copy.html#gadd1f737e677e0e6ca31767c7001417b3">arm_copy_f32()</a>, <a class="el" href="group__copy.html#ga872ca4cfc18c680b8991ccd569a5fda0">arm_copy_q15()</a>, <a class="el" href="group__copy.html#gaddf70be7e3f87e535c324862b501f3f9">arm_copy_q31()</a>, <a class="el" href="group__copy.html#ga467579beda492aa92797529d794c88fb">arm_copy_q7()</a>, <a class="el" href="group__dot__prod.html#ga55418d4362f6ba84c327f9b4f089a8c3">arm_dot_prod_f32()</a>, <a class="el" href="group__dot__prod.html#ga436d5bed28a4b73b24acbde436a3044b">arm_dot_prod_q15()</a>, <a class="el" href="group__dot__prod.html#gab15d8fa060fc85b4d948d091b7deaa11">arm_dot_prod_q31()</a>, <a class="el" href="group__dot__prod.html#ga9c3293a50ac7ec8ba928bf8e3aaea6c1">arm_dot_prod_q7()</a>, <a class="el" href="group__Fill.html#ga2248e8d3901b4afb7827163132baad94">arm_fill_f32()</a>, <a class="el" href="group__Fill.html#ga76b21c32a3783a2b3334d930a646e5d8">arm_fill_q15()</a>, <a class="el" href="group__Fill.html#ga69cc781cf337bd0a31bb85c772a35f7f">arm_fill_q31()</a>, <a class="el" href="group__Fill.html#ga0465cf326ada039ed792f94b033d9ec5">arm_fill_q7()</a>, <a class="el" href="group__FIR__Interpolate.html#ga9cae104c5cf60b4e7671c82264a8c12e">arm_fir_interpolate_f32()</a>, <a class="el" href="group__FIR__Interpolate.html#ga7962b5f9636e54899f75d0c5936800b5">arm_fir_interpolate_q15()</a>, <a class="el" href="group__FIR__Interpolate.html#gaac9c0f01ed91c53f7083995d7411f5ee">arm_fir_interpolate_q31()</a>, <a class="el" href="group__FIR__Lattice.html#gae63a45a63a11a65f2eae8b8b1fe370a8">arm_fir_lattice_f32()</a>, <a class="el" href="group__FIR__Lattice.html#gabb0ab07fd313b4d863070c3ddca51542">arm_fir_lattice_q15()</a>, <a class="el" href="group__FIR__Lattice.html#ga2e36fd210e4a1a5dd333ce80dd6d9a88">arm_fir_lattice_q31()</a>, <a class="el" href="group__FIR.html#ga262d173058d6f80fdf60404ba262a8f5">arm_fir_q15()</a>, <a class="el" href="group__FIR.html#gaadd938c68ab08967cbb5fc696f384bb5">arm_fir_q31()</a>, <a class="el" href="group__FIR.html#ga31c91a0bf0962327ef8f626fae68ea32">arm_fir_q7()</a>, <a class="el" href="group__FIR__Sparse.html#ga23a9284de5ee39406713b91d18ac8838">arm_fir_sparse_f32()</a>, <a class="el" href="group__FIR__Sparse.html#ga2bffda2e156e72427e19276cd9c3d3cc">arm_fir_sparse_q15()</a>, <a class="el" href="group__FIR__Sparse.html#ga03e9c2f0f35ad67d20bac66be9f920ec">arm_fir_sparse_q31()</a>, <a class="el" href="group__FIR__Sparse.html#gae86c145efc2d9ec32dc6d8c1ad2ccb3c">arm_fir_sparse_q7()</a>, <a class="el" href="group__float__to__x.html#ga215456e35a18db86882e1d3f0d24e1f2">arm_float_to_q15()</a>, <a class="el" href="group__float__to__x.html#ga177704107f94564e9abe4daaa36f4554">arm_float_to_q31()</a>, <a class="el" href="group__float__to__x.html#ga44a393818cdee8dce80f2d66add25411">arm_float_to_q7()</a>, <a class="el" href="group__IIR__Lattice.html#ga56164a0fe48619b8ceec160347bdd2ff">arm_iir_lattice_f32()</a>, <a class="el" href="group__IIR__Lattice.html#gaeb9e9599a288832ed123183eaa8b294a">arm_iir_lattice_q15()</a>, <a class="el" href="group__IIR__Lattice.html#ga123b26fa9156cd8d3622dd85931741ed">arm_iir_lattice_q31()</a>, <a class="el" href="group__LMS.html#gae266d009e682180421601627c79a3843">arm_lms_f32()</a>, <a class="el" href="group__LMS__NORM.html#ga2418c929087c6eba719758eaae3f3300">arm_lms_norm_f32()</a>, <a class="el" href="group__LMS__NORM.html#gad47486a399dedb0bc85a5990ec5cf981">arm_lms_norm_q15()</a>, <a class="el" href="group__LMS__NORM.html#ga7128775e99817c183a7d7ad34e8b6e05">arm_lms_norm_q31()</a>, <a class="el" href="group__LMS.html#gacde16c17eb75979f81b34e2e2a58c7ac">arm_lms_q15()</a>, <a class="el" href="group__LMS.html#ga6a0abfe6041253a6f91c63b383a64257">arm_lms_q31()</a>, <a class="el" href="group__mean.html#ga74ce08c49ab61e57bd50c3a0ca1fdb2b">arm_mean_f32()</a>, <a class="el" href="group__mean.html#gac882495d5f098819fd3939c1ef7795b3">arm_mean_q15()</a>, <a class="el" href="group__mean.html#gacf2526d8c2d75e486e8f0b0e31877ad0">arm_mean_q31()</a>, <a class="el" href="group__mean.html#gaebc707ee539020357c25da4c75b52eb7">arm_mean_q7()</a>, <a class="el" href="group__BasicMult.html#gaca3f0b8227da431ab29225b88888aa32">arm_mult_f32()</a>, <a class="el" href="group__BasicMult.html#gafb0778d27ed98a2a6f2ecb7d48cc8c75">arm_mult_q15()</a>, <a class="el" href="group__BasicMult.html#ga3528c0f54a0607acc603f0490d3ca6c6">arm_mult_q31()</a>, <a class="el" href="group__BasicMult.html#ga16677275ed83ff0878da531e875c27ef">arm_mult_q7()</a>, <a class="el" href="group__negate.html#ga2e169c4de6cc6e3ba4be9473531e6657">arm_negate_f32()</a>, <a class="el" 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href="group__scale.html#ga83e36cd82bf51ce35406a199e477d47c">arm_scale_q31()</a>, <a class="el" href="group__scale.html#gabc9fd3d37904c58df56492b351d21fb0">arm_scale_q7()</a>, <a class="el" href="group__shift.html#gaa1757e53279780107acc92cf100adb61">arm_shift_q15()</a>, <a class="el" href="group__shift.html#ga387dd8b7b87377378280978f16cdb13d">arm_shift_q31()</a>, <a class="el" href="group__shift.html#ga47295d08a685f7de700a48dafb4db6fb">arm_shift_q7()</a>, <a class="el" href="group__STD.html#ga4969b5b5f3d001377bc401a3ee99dfc2">arm_std_f32()</a>, <a class="el" href="group__STD.html#gaf9d27afa9928ff28a63cd98ea9218a72">arm_std_q15()</a>, <a class="el" href="group__STD.html#ga39495e74f96116178be085c9dc7742f5">arm_std_q31()</a>, <a class="el" href="group__BasicSub.html#ga7f975a472de286331134227c08aad826">arm_sub_f32()</a>, <a class="el" href="group__BasicSub.html#ga997a8ee93088d15bda23c325d455b588">arm_sub_q15()</a>, <a class="el" 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-<p>Referenced by <a class="el" href="arm__fir__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
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-<p>Referenced by <a class="el" href="arm__fir__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
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-<p>Referenced by <a class="el" href="arm__fir__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
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-<p>Referenced by <a class="el" href="arm__fir__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
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@@ -372,7 +348,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_abd1d8a41d439a254a6d729f0d888b04.html">Examples</a></li><li class="navelem"><a class="el" href="dir_dd8be1de2cb2fdb097bade8f148f6c3f.html">ARM</a></li><li class="navelem"><a class="el" href="dir_d47fe067fda502b2aac97b7803894821.html">arm_fir_example</a></li><li class="navelem"><a class="el" href="arm__fir__example__f32_8c.html">arm_fir_example_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/arm__fir__f32_8c.html b/docs/DSP/html/arm__fir__f32_8c.html
index 08454df..e7cb1a7 100644
--- a/docs/DSP/html/arm__fir__f32_8c.html
+++ b/docs/DSP/html/arm__fir__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gae8fb334ea67eb6ecbd31824ddc14cd6a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gae8fb334ea67eb6ecbd31824ddc14cd6a">arm_fir_f32</a> (const <a class="el" href="structarm__fir__instance__f32.html">arm_fir_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gae8fb334ea67eb6ecbd31824ddc14cd6a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point FIR filter.  <a href="group__FIR.html#gae8fb334ea67eb6ecbd31824ddc14cd6a">More...</a><br/></td></tr>
-<tr class="separator:gae8fb334ea67eb6ecbd31824ddc14cd6a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0cf008f650a75f5e2cf82d10691b64d9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga0cf008f650a75f5e2cf82d10691b64d9">arm_fir_f32</a> (const <a class="el" href="structarm__fir__instance__f32.html">arm_fir_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga0cf008f650a75f5e2cf82d10691b64d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for floating-point FIR filter.  <a href="group__FIR.html#ga0cf008f650a75f5e2cf82d10691b64d9">More...</a><br/></td></tr>
+<tr class="separator:ga0cf008f650a75f5e2cf82d10691b64d9"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__fir__f32_8c.html">arm_fir_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__fir__fast__q15_8c.html b/docs/DSP/html/arm__fir__fast__q15_8c.html
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-<tr class="memdesc:gac7d35e9472e49ccd88800f37f3476bd3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4.  <a href="group__FIR.html#gac7d35e9472e49ccd88800f37f3476bd3">More...</a><br/></td></tr>
-<tr class="separator:gac7d35e9472e49ccd88800f37f3476bd3"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf58eee6c38f0b666897b24ca02f9d58d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gaf58eee6c38f0b666897b24ca02f9d58d">arm_fir_fast_q15</a> (const <a class="el" href="structarm__fir__instance__q15.html">arm_fir_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaf58eee6c38f0b666897b24ca02f9d58d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 FIR filter (fast version).  <a href="group__FIR.html#gaf58eee6c38f0b666897b24ca02f9d58d">More...</a><br/></td></tr>
+<tr class="separator:gaf58eee6c38f0b666897b24ca02f9d58d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__fir__fast__q31_8c.html b/docs/DSP/html/arm__fir__fast__q31_8c.html
index bf62c20..c1dbb36 100644
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+++ b/docs/DSP/html/arm__fir__fast__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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-<tr class="memdesc:ga70d11af009dcd25594c58c75cdb5d6e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4.  <a href="group__FIR.html#ga70d11af009dcd25594c58c75cdb5d6e3">More...</a><br/></td></tr>
-<tr class="separator:ga70d11af009dcd25594c58c75cdb5d6e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga07051c8e9f0f228c9634b4a9ca2bcac3"><td class="memItemLeft" align="right" valign="top">IAR_ONLY_LOW_OPTIMIZATION_ENTER <br class="typebreak"/>
+void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga07051c8e9f0f228c9634b4a9ca2bcac3">arm_fir_fast_q31</a> (const <a class="el" href="structarm__fir__instance__q31.html">arm_fir_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga07051c8e9f0f228c9634b4a9ca2bcac3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 FIR filter (fast version).  <a href="group__FIR.html#ga07051c8e9f0f228c9634b4a9ca2bcac3">More...</a><br/></td></tr>
+<tr class="separator:ga07051c8e9f0f228c9634b4a9ca2bcac3"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -127,7 +127,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__fir__init__f32_8c.html b/docs/DSP/html/arm__fir__init__f32_8c.html
index 17e2ed6..656143c 100644
--- a/docs/DSP/html/arm__fir__init__f32_8c.html
+++ b/docs/DSP/html/arm__fir__init__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,9 +116,9 @@
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-<tr class="separator:ga98d13def6427e29522829f945d0967db"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5afaa7b8e6735bbc19e582aa9755b0e1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga5afaa7b8e6735bbc19e582aa9755b0e1">arm_fir_init_f32</a> (<a class="el" href="structarm__fir__instance__f32.html">arm_fir_instance_f32</a> *S, uint16_t numTaps, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga5afaa7b8e6735bbc19e582aa9755b0e1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point FIR filter.  <a href="group__FIR.html#ga5afaa7b8e6735bbc19e582aa9755b0e1">More...</a><br/></td></tr>
+<tr class="separator:ga5afaa7b8e6735bbc19e582aa9755b0e1"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__fir__init__f32_8c.html">arm_fir_init_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__fir__init__q15_8c.html b/docs/DSP/html/arm__fir__init__q15_8c.html
index a5eb8e1..f3c1652 100644
--- a/docs/DSP/html/arm__fir__init__q15_8c.html
+++ b/docs/DSP/html/arm__fir__init__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,9 +116,9 @@
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-<tr class="memitem:gae2a50f692f41ba57e44ed0719b1368bd"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gae2a50f692f41ba57e44ed0719b1368bd">arm_fir_init_q15</a> (<a class="el" href="structarm__fir__instance__q15.html">arm_fir_instance_q15</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gae2a50f692f41ba57e44ed0719b1368bd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q15 FIR filter.  <a href="group__FIR.html#gae2a50f692f41ba57e44ed0719b1368bd">More...</a><br/></td></tr>
-<tr class="separator:gae2a50f692f41ba57e44ed0719b1368bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf4bfa7e20520f3b6e9f03a52ad6d0e41"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gaf4bfa7e20520f3b6e9f03a52ad6d0e41">arm_fir_init_q15</a> (<a class="el" href="structarm__fir__instance__q15.html">arm_fir_instance_q15</a> *S, uint16_t numTaps, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaf4bfa7e20520f3b6e9f03a52ad6d0e41"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q15 FIR filter.  <a href="group__FIR.html#gaf4bfa7e20520f3b6e9f03a52ad6d0e41">More...</a><br/></td></tr>
+<tr class="separator:gaf4bfa7e20520f3b6e9f03a52ad6d0e41"><td class="memSeparator" colspan="2">&#160;</td></tr>
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@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__fir__init__q15_8c.html">arm_fir_init_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/arm__fir__init__q31_8c.html b/docs/DSP/html/arm__fir__init__q31_8c.html
index 9ad6bd8..75281cf 100644
--- a/docs/DSP/html/arm__fir__init__q31_8c.html
+++ b/docs/DSP/html/arm__fir__init__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
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-<tr class="memdesc:gac00d53af87684cbbe135767b55e748a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 FIR filter.  <a href="group__FIR.html#gac00d53af87684cbbe135767b55e748a5">More...</a><br/></td></tr>
-<tr class="separator:gac00d53af87684cbbe135767b55e748a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga23ef4b2597aecc4d43cce7c4b456ae71"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga23ef4b2597aecc4d43cce7c4b456ae71">arm_fir_init_q31</a> (<a class="el" href="structarm__fir__instance__q31.html">arm_fir_instance_q31</a> *S, uint16_t numTaps, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga23ef4b2597aecc4d43cce7c4b456ae71"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 FIR filter.  <a href="group__FIR.html#ga23ef4b2597aecc4d43cce7c4b456ae71">More...</a><br/></td></tr>
+<tr class="separator:ga23ef4b2597aecc4d43cce7c4b456ae71"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-<tr class="separator:ga9cae104c5cf60b4e7671c82264a8c12e"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:ga62d0757246bbbe5bfaf67b9a95c16c51"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/arm__fir__interpolate__init__f32_8c.html b/docs/DSP/html/arm__fir__interpolate__init__f32_8c.html
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-<tr class="separator:ga0f857457a815946f7e4dca989ebf6ff6"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:ga1416bcc1bcf6e2b18ff15261b6e04345"><td class="memSeparator" colspan="2">&#160;</td></tr>
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   <ul>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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+<tr class="separator:ga9d6a3c53991f1dca4da31dc400ed9eec"><td class="memSeparator" colspan="2">&#160;</td></tr>
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@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__fir__interpolate__init__q15_8c.html">arm_fir_interpolate_init_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__fir__interpolate__q15_8c.html b/docs/DSP/html/arm__fir__interpolate__q15_8c.html
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-<tr class="separator:ga7962b5f9636e54899f75d0c5936800b5"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:ga026a02cda40616476e33b82e4eaf855d"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/arm__fir__interpolate__q31_8c.html b/docs/DSP/html/arm__fir__interpolate__q31_8c.html
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-<tr class="separator:gaac9c0f01ed91c53f7083995d7411f5ee"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gadf65923ede13284c769b5621709e8135"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Interpolate.html#gadf65923ede13284c769b5621709e8135">arm_fir_interpolate_q31</a> (const <a class="el" href="structarm__fir__interpolate__instance__q31.html">arm_fir_interpolate_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
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+<tr class="separator:gadf65923ede13284c769b5621709e8135"><td class="memSeparator" colspan="2">&#160;</td></tr>
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@@ -126,7 +126,7 @@
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   <ul>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__fir__lattice__f32_8c.html b/docs/DSP/html/arm__fir__lattice__f32_8c.html
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--- a/docs/DSP/html/arm__fir__lattice__f32_8c.html
+++ b/docs/DSP/html/arm__fir__lattice__f32_8c.html
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    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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-<tr class="separator:gae63a45a63a11a65f2eae8b8b1fe370a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga62053bf9d04f9f97ee5f4ef831533d68"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Lattice.html#ga62053bf9d04f9f97ee5f4ef831533d68">arm_fir_lattice_f32</a> (const <a class="el" href="structarm__fir__lattice__instance__f32.html">arm_fir_lattice_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga62053bf9d04f9f97ee5f4ef831533d68"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point FIR lattice filter.  <a href="group__FIR__Lattice.html#ga62053bf9d04f9f97ee5f4ef831533d68">More...</a><br/></td></tr>
+<tr class="separator:ga62053bf9d04f9f97ee5f4ef831533d68"><td class="memSeparator" colspan="2">&#160;</td></tr>
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@@ -126,7 +126,7 @@
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   <ul>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/arm__fir__lattice__init__f32_8c.html b/docs/DSP/html/arm__fir__lattice__init__f32_8c.html
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+++ b/docs/DSP/html/arm__fir__lattice__init__f32_8c.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,9 +116,9 @@
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-<tr class="separator:ga86199a1590af2b8941c6532ee9d03229"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga489e9fd4fed0037b5ed0947eaa12d68d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Lattice.html#ga489e9fd4fed0037b5ed0947eaa12d68d">arm_fir_lattice_init_f32</a> (<a class="el" href="structarm__fir__lattice__instance__f32.html">arm_fir_lattice_instance_f32</a> *S, uint16_t numStages, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState)</td></tr>
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+<tr class="separator:ga489e9fd4fed0037b5ed0947eaa12d68d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
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@@ -126,7 +126,7 @@
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   <ul>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/arm__fir__lattice__init__q15_8c.html b/docs/DSP/html/arm__fir__lattice__init__q15_8c.html
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-<tr class="separator:ga1b22f30ce1cc19bf5a5d7c9fca154d72"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:gae4657ac1025b5b4294fd4acc1e49e7f8"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__fir__lattice__init__q31_8c.html b/docs/DSP/html/arm__fir__lattice__init__q31_8c.html
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    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
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-<tr class="separator:gac05a17a0188bb851b58d19e572870a54"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf7723f451f6d4cf2586bb4b63d2029cb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Lattice.html#gaf7723f451f6d4cf2586bb4b63d2029cb">arm_fir_lattice_init_q31</a> (<a class="el" href="structarm__fir__lattice__instance__q31.html">arm_fir_lattice_instance_q31</a> *S, uint16_t numStages, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState)</td></tr>
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+<tr class="separator:gaf7723f451f6d4cf2586bb4b63d2029cb"><td class="memSeparator" colspan="2">&#160;</td></tr>
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@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__fir__lattice__q15_8c.html b/docs/DSP/html/arm__fir__lattice__q15_8c.html
index a219282..7d2539b 100644
--- a/docs/DSP/html/arm__fir__lattice__q15_8c.html
+++ b/docs/DSP/html/arm__fir__lattice__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
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-<tr class="memdesc:gabb0ab07fd313b4d863070c3ddca51542"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 FIR lattice filter.  <a href="group__FIR__Lattice.html#gabb0ab07fd313b4d863070c3ddca51542">More...</a><br/></td></tr>
-<tr class="separator:gabb0ab07fd313b4d863070c3ddca51542"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafddb7fd49cb0e8a4b6d9546b58bf60fb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Lattice.html#gafddb7fd49cb0e8a4b6d9546b58bf60fb">arm_fir_lattice_q15</a> (const <a class="el" href="structarm__fir__lattice__instance__q15.html">arm_fir_lattice_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
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+<tr class="separator:gafddb7fd49cb0e8a4b6d9546b58bf60fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
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 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
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   <ul>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__fir__lattice__q31_8c.html b/docs/DSP/html/arm__fir__lattice__q31_8c.html
index 7863ce2..471b3cf 100644
--- a/docs/DSP/html/arm__fir__lattice__q31_8c.html
+++ b/docs/DSP/html/arm__fir__lattice__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,9 +116,9 @@
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 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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-<tr class="memitem:ga2e36fd210e4a1a5dd333ce80dd6d9a88"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Lattice.html#ga2e36fd210e4a1a5dd333ce80dd6d9a88">arm_fir_lattice_q31</a> (const <a class="el" href="structarm__fir__lattice__instance__q31.html">arm_fir_lattice_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga2e36fd210e4a1a5dd333ce80dd6d9a88"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 FIR lattice filter.  <a href="group__FIR__Lattice.html#ga2e36fd210e4a1a5dd333ce80dd6d9a88">More...</a><br/></td></tr>
-<tr class="separator:ga2e36fd210e4a1a5dd333ce80dd6d9a88"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9ae2b76a2a1625d00f902919d0fdea05"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Lattice.html#ga9ae2b76a2a1625d00f902919d0fdea05">arm_fir_lattice_q31</a> (const <a class="el" href="structarm__fir__lattice__instance__q31.html">arm_fir_lattice_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga9ae2b76a2a1625d00f902919d0fdea05"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 FIR lattice filter.  <a href="group__FIR__Lattice.html#ga9ae2b76a2a1625d00f902919d0fdea05">More...</a><br/></td></tr>
+<tr class="separator:ga9ae2b76a2a1625d00f902919d0fdea05"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
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 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__fir__lattice__q31_8c.html">arm_fir_lattice_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__fir__q15_8c.html b/docs/DSP/html/arm__fir__q15_8c.html
index b95b33a..3dc5b1d 100644
--- a/docs/DSP/html/arm__fir__q15_8c.html
+++ b/docs/DSP/html/arm__fir__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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-<tr class="memitem:ga262d173058d6f80fdf60404ba262a8f5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga262d173058d6f80fdf60404ba262a8f5">arm_fir_q15</a> (const <a class="el" href="structarm__fir__instance__q15.html">arm_fir_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga262d173058d6f80fdf60404ba262a8f5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 FIR filter.  <a href="group__FIR.html#ga262d173058d6f80fdf60404ba262a8f5">More...</a><br/></td></tr>
-<tr class="separator:ga262d173058d6f80fdf60404ba262a8f5"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad9f84fdadbb59292592c7fac81adb09c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gad9f84fdadbb59292592c7fac81adb09c">arm_fir_q15</a> (const <a class="el" href="structarm__fir__instance__q15.html">arm_fir_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gad9f84fdadbb59292592c7fac81adb09c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 FIR filter.  <a href="group__FIR.html#gad9f84fdadbb59292592c7fac81adb09c">More...</a><br/></td></tr>
+<tr class="separator:gad9f84fdadbb59292592c7fac81adb09c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__fir__q15_8c.html">arm_fir_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__fir__q31_8c.html b/docs/DSP/html/arm__fir__q31_8c.html
index 84d1d25..be7bbec 100644
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    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
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-<tr class="separator:gaadd938c68ab08967cbb5fc696f384bb5"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga2f6fc6582ab4491b3ea8c038c5247ecf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga2f6fc6582ab4491b3ea8c038c5247ecf">arm_fir_q31</a> (const <a class="el" href="structarm__fir__instance__q31.html">arm_fir_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga2f6fc6582ab4491b3ea8c038c5247ecf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q31 FIR filter.  <a href="group__FIR.html#ga2f6fc6582ab4491b3ea8c038c5247ecf">More...</a><br/></td></tr>
+<tr class="separator:ga2f6fc6582ab4491b3ea8c038c5247ecf"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__fir__q31_8c.html">arm_fir_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__fir__q7_8c.html b/docs/DSP/html/arm__fir__q7_8c.html
index 41c8636..a4951e9 100644
--- a/docs/DSP/html/arm__fir__q7_8c.html
+++ b/docs/DSP/html/arm__fir__q7_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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-<tr class="separator:ga31c91a0bf0962327ef8f626fae68ea32"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac333f1139ef35124e89b0ee7494ad0a2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gac333f1139ef35124e89b0ee7494ad0a2">arm_fir_q7</a> (const <a class="el" href="structarm__fir__instance__q7.html">arm_fir_instance_q7</a> *S, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gac333f1139ef35124e89b0ee7494ad0a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q7 FIR filter.  <a href="group__FIR.html#gac333f1139ef35124e89b0ee7494ad0a2">More...</a><br/></td></tr>
+<tr class="separator:gac333f1139ef35124e89b0ee7494ad0a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__fir__q7_8c.html">arm_fir_q7.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__fir__sparse__f32_8c.html b/docs/DSP/html/arm__fir__sparse__f32_8c.html
index 9fa827c..845d19d 100644
--- a/docs/DSP/html/arm__fir__sparse__f32_8c.html
+++ b/docs/DSP/html/arm__fir__sparse__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga23a9284de5ee39406713b91d18ac8838"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#ga23a9284de5ee39406713b91d18ac8838">arm_fir_sparse_f32</a> (<a class="el" href="structarm__fir__sparse__instance__f32.html">arm_fir_sparse_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pScratchIn, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga23a9284de5ee39406713b91d18ac8838"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point sparse FIR filter.  <a href="group__FIR__Sparse.html#ga23a9284de5ee39406713b91d18ac8838">More...</a><br/></td></tr>
-<tr class="separator:ga23a9284de5ee39406713b91d18ac8838"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac6817bc86974b7121c3288fce25dbc5f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#gac6817bc86974b7121c3288fce25dbc5f">arm_fir_sparse_f32</a> (<a class="el" href="structarm__fir__sparse__instance__f32.html">arm_fir_sparse_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pScratchIn, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gac6817bc86974b7121c3288fce25dbc5f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point sparse FIR filter.  <a href="group__FIR__Sparse.html#gac6817bc86974b7121c3288fce25dbc5f">More...</a><br/></td></tr>
+<tr class="separator:gac6817bc86974b7121c3288fce25dbc5f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__fir__sparse__f32_8c.html">arm_fir_sparse_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__fir__sparse__init__f32_8c.html b/docs/DSP/html/arm__fir__sparse__init__f32_8c.html
index 04d4713..d0b6e9f 100644
--- a/docs/DSP/html/arm__fir__sparse__init__f32_8c.html
+++ b/docs/DSP/html/arm__fir__sparse__init__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
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 Functions</h2></td></tr>
-<tr class="memitem:ga86378a08a9d9e1e0e5de77843b34d396"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#ga86378a08a9d9e1e0e5de77843b34d396">arm_fir_sparse_init_f32</a> (<a class="el" href="structarm__fir__sparse__instance__f32.html">arm_fir_sparse_instance_f32</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga86378a08a9d9e1e0e5de77843b34d396"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point sparse FIR filter.  <a href="group__FIR__Sparse.html#ga86378a08a9d9e1e0e5de77843b34d396">More...</a><br/></td></tr>
-<tr class="separator:ga86378a08a9d9e1e0e5de77843b34d396"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga967a0564d6d59f2b9e12f4a5b7a3f877"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#ga967a0564d6d59f2b9e12f4a5b7a3f877">arm_fir_sparse_init_f32</a> (<a class="el" href="structarm__fir__sparse__instance__f32.html">arm_fir_sparse_instance_f32</a> *S, uint16_t numTaps, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga967a0564d6d59f2b9e12f4a5b7a3f877"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point sparse FIR filter.  <a href="group__FIR__Sparse.html#ga967a0564d6d59f2b9e12f4a5b7a3f877">More...</a><br/></td></tr>
+<tr class="separator:ga967a0564d6d59f2b9e12f4a5b7a3f877"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__fir__sparse__init__f32_8c.html">arm_fir_sparse_init_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__fir__sparse__init__q15_8c.html b/docs/DSP/html/arm__fir__sparse__init__q15_8c.html
index e649deb..fd51c09 100644
--- a/docs/DSP/html/arm__fir__sparse__init__q15_8c.html
+++ b/docs/DSP/html/arm__fir__sparse__init__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga5eaa80bf72bcccef5a2c5fc6648d1baa"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#ga5eaa80bf72bcccef5a2c5fc6648d1baa">arm_fir_sparse_init_q15</a> (<a class="el" href="structarm__fir__sparse__instance__q15.html">arm_fir_sparse_instance_q15</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
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-<tr class="separator:ga5eaa80bf72bcccef5a2c5fc6648d1baa"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad1c7f891760e91301aac7e3a48aca449"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#gad1c7f891760e91301aac7e3a48aca449">arm_fir_sparse_init_q15</a> (<a class="el" href="structarm__fir__sparse__instance__q15.html">arm_fir_sparse_instance_q15</a> *S, uint16_t numTaps, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gad1c7f891760e91301aac7e3a48aca449"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q15 sparse FIR filter.  <a href="group__FIR__Sparse.html#gad1c7f891760e91301aac7e3a48aca449">More...</a><br/></td></tr>
+<tr class="separator:gad1c7f891760e91301aac7e3a48aca449"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
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-<tr class="separator:gae86c145efc2d9ec32dc6d8c1ad2ccb3c"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-<tr class="memdesc:ga215456e35a18db86882e1d3f0d24e1f2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the floating-point vector to Q15 vector.  <a href="group__float__to__x.html#ga215456e35a18db86882e1d3f0d24e1f2">More...</a><br/></td></tr>
-<tr class="separator:ga215456e35a18db86882e1d3f0d24e1f2"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memdesc:gac7696e64963e5051ebb950c88c6ba186"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the floating-point vector to Q15 vector.  <a href="group__float__to__x.html#gac7696e64963e5051ebb950c88c6ba186">More...</a><br/></td></tr>
+<tr class="separator:gac7696e64963e5051ebb950c88c6ba186"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__float__to__q31_8c.html b/docs/DSP/html/arm__float__to__q31_8c.html
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    <div id="projectname">CMSIS-DSP
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-<tr class="memdesc:ga177704107f94564e9abe4daaa36f4554"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the floating-point vector to Q31 vector.  <a href="group__float__to__x.html#ga177704107f94564e9abe4daaa36f4554">More...</a><br/></td></tr>
-<tr class="separator:ga177704107f94564e9abe4daaa36f4554"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaae21be47db707e79552f3e8221a48fb0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__float__to__x.html#gaae21be47db707e79552f3e8221a48fb0">arm_float_to_q31</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaae21be47db707e79552f3e8221a48fb0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the floating-point vector to Q31 vector.  <a href="group__float__to__x.html#gaae21be47db707e79552f3e8221a48fb0">More...</a><br/></td></tr>
+<tr class="separator:gaae21be47db707e79552f3e8221a48fb0"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__float__to__q7_8c.html b/docs/DSP/html/arm__float__to__q7_8c.html
index 8ae3489..dc22dba 100644
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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 <table class="memberdecls">
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-<tr class="memitem:ga44a393818cdee8dce80f2d66add25411"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__float__to__x.html#ga44a393818cdee8dce80f2d66add25411">arm_float_to_q7</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga44a393818cdee8dce80f2d66add25411"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the floating-point vector to Q7 vector.  <a href="group__float__to__x.html#ga44a393818cdee8dce80f2d66add25411">More...</a><br/></td></tr>
-<tr class="separator:ga44a393818cdee8dce80f2d66add25411"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga63b7cef42a242f0be43376ba3380988d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__float__to__x.html#ga63b7cef42a242f0be43376ba3380988d">arm_float_to_q7</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga63b7cef42a242f0be43376ba3380988d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the floating-point vector to Q7 vector.  <a href="group__float__to__x.html#ga63b7cef42a242f0be43376ba3380988d">More...</a><br/></td></tr>
+<tr class="separator:ga63b7cef42a242f0be43376ba3380988d"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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    <div id="projectname">CMSIS-DSP
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/arm__graphic__equalizer__example_2Abstract_8txt.html b/docs/DSP/html/arm__graphic__equalizer__example_2Abstract_8txt.html
index 75d6737..4825095 100644
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+++ b/docs/DSP/html/arm__graphic__equalizer__example_2Abstract_8txt.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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   <ul>
     <li class="navelem"><a class="el" href="arm__graphic__equalizer__example_2Abstract_8txt.html">Abstract.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/arm__graphic__equalizer__example_2math__helper_8c.html b/docs/DSP/html/arm__graphic__equalizer__example_2math__helper_8c.html
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+++ b/docs/DSP/html/arm__graphic__equalizer__example_2math__helper_8c.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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 </dl>
 <dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
-<p>References <a class="el" href="arm__graphic__equalizer__example_2math__helper_8c.html#ace1e1f7b72573d1934782ec999a04f99">arm_calc_2pow()</a>.</p>
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 <dl class="section return"><dt>Returns</dt><dd>pow(2, numShifts) </dd></dl>
 
-<p>Referenced by <a class="el" href="arm__graphic__equalizer__example_2math__helper_8c.html#a13580a6ff7a8a68146de727bdf8fba88">arm_apply_guard_bits()</a>.</p>
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 <dl class="section return"><dt>Returns</dt><dd>none The function Provides the guard bits for the buffer to avoid overflow </dd></dl>
 
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
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-<tr class="separator:ga56164a0fe48619b8ceec160347bdd2ff"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga754a44b604c386d132b4b05a3d9e0f44"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__IIR__Lattice.html#ga754a44b604c386d132b4b05a3d9e0f44">arm_iir_lattice_f32</a> (const <a class="el" href="structarm__iir__lattice__instance__f32.html">arm_iir_lattice_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
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+<tr class="separator:ga754a44b604c386d132b4b05a3d9e0f44"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/arm__iir__lattice__init__q15_8c.html b/docs/DSP/html/arm__iir__lattice__init__q15_8c.html
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__iir__lattice__q15_8c.html b/docs/DSP/html/arm__iir__lattice__q15_8c.html
index 6965f20..265fb42 100644
--- a/docs/DSP/html/arm__iir__lattice__q15_8c.html
+++ b/docs/DSP/html/arm__iir__lattice__q15_8c.html
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-<tr class="memitem:gaeb9e9599a288832ed123183eaa8b294a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__IIR__Lattice.html#gaeb9e9599a288832ed123183eaa8b294a">arm_iir_lattice_q15</a> (const <a class="el" href="structarm__iir__lattice__instance__q15.html">arm_iir_lattice_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaeb9e9599a288832ed123183eaa8b294a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 IIR lattice filter.  <a href="group__IIR__Lattice.html#gaeb9e9599a288832ed123183eaa8b294a">More...</a><br/></td></tr>
-<tr class="separator:gaeb9e9599a288832ed123183eaa8b294a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga49181562f33456fa979e474e2a657d19"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__IIR__Lattice.html#ga49181562f33456fa979e474e2a657d19">arm_iir_lattice_q15</a> (const <a class="el" href="structarm__iir__lattice__instance__q15.html">arm_iir_lattice_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga49181562f33456fa979e474e2a657d19"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 IIR lattice filter.  <a href="group__IIR__Lattice.html#ga49181562f33456fa979e474e2a657d19">More...</a><br/></td></tr>
+<tr class="separator:ga49181562f33456fa979e474e2a657d19"><td class="memSeparator" colspan="2">&#160;</td></tr>
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@@ -126,7 +126,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__iir__lattice__q31_8c.html b/docs/DSP/html/arm__iir__lattice__q31_8c.html
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-<tr class="separator:ga123b26fa9156cd8d3622dd85931741ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga87d7df8f8787402d4331de156a82687f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__IIR__Lattice.html#ga87d7df8f8787402d4331de156a82687f">arm_iir_lattice_q31</a> (const <a class="el" href="structarm__iir__lattice__instance__q31.html">arm_iir_lattice_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga87d7df8f8787402d4331de156a82687f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 IIR lattice filter.  <a href="group__IIR__Lattice.html#ga87d7df8f8787402d4331de156a82687f">More...</a><br/></td></tr>
+<tr class="separator:ga87d7df8f8787402d4331de156a82687f"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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index 63afc5d..dbb7296 100644
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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@@ -202,8 +202,6 @@
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-<p>References <a class="el" href="arm__linear__interp__example_2math__helper_8c.html#ace1e1f7b72573d1934782ec999a04f99">arm_calc_2pow()</a>.</p>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/arm__linear__interp__example__f32_8c.html b/docs/DSP/html/arm__linear__interp__example__f32_8c.html
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-<p>References <a class="el" href="arm__linear__interp__example__f32_8c.html#a1a5a6c95f39221fcf8129fe478f54696">arm_linear_interep_table</a>, <a class="el" href="group__LinearInterpolate.html#ga790bbc697724ee432f840cfebbbae1f4">arm_linear_interp_f32()</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a09457f2be656b35015fd6d36202fa376">ARM_MATH_TEST_FAILURE</a>, <a class="el" href="group__sin.html#gae164899c4a3fc0e946dc5d55555fe541">arm_sin_f32()</a>, <a class="el" href="arm__convolution__example_2math__helper_8c.html#aeea2952e70a1040a6efa555564bbeeab">arm_snr_f32()</a>, <a class="el" href="arm__linear__interp__example__f32_8c.html#ad492c21cf2dd4e9199ae46c77f812cbc">snr1</a>, <a class="el" href="arm__linear__interp__example__f32_8c.html#a269948ab25f230d33e3f22eab85aa1cf">snr2</a>, <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>, <a class="el" href="arm__linear__interp__example__f32_8c.html#abc004a7fade488e72310fd96c0a101dc">TEST_LENGTH_SAMPLES</a>, <a class="el" href="arm__linear__interp__example__f32_8c.html#a4be0c4d25e63ce04b8cc8ad070805287">testInputSin_f32</a>, <a class="el" href="arm__linear__interp__example__f32_8c.html#a8ca7d0ad6e04efed464bcaacedacf925">testLinIntOutput</a>, <a class="el" href="arm__linear__interp__example__f32_8c.html#afd4d61aad5f35a4e42d580004e2f9a1d">testOutput</a>, <a class="el" href="arm__linear__interp__example__f32_8c.html#a5a33218d422603f3e5267b6984bdddd1">testRefSinOutput32_f32</a>, and <a class="el" href="arm__linear__interp__example__f32_8c.html#a0ecae49cebd837aac53411c8f877503d">XSPACING</a>.</p>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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    <div id="projectname">CMSIS-DSP
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 Functions</h2></td></tr>
-<tr class="memitem:gae266d009e682180421601627c79a3843"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS.html#gae266d009e682180421601627c79a3843">arm_lms_f32</a> (const <a class="el" href="structarm__lms__instance__f32.html">arm_lms_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pRef, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pOut, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gae266d009e682180421601627c79a3843"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for floating-point LMS filter.  <a href="group__LMS.html#gae266d009e682180421601627c79a3843">More...</a><br/></td></tr>
-<tr class="separator:gae266d009e682180421601627c79a3843"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac518f7acd1778a8ee90e81c421cfbb90"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS.html#gac518f7acd1778a8ee90e81c421cfbb90">arm_lms_f32</a> (const <a class="el" href="structarm__lms__instance__f32.html">arm_lms_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pRef, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pOut, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gac518f7acd1778a8ee90e81c421cfbb90"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for floating-point LMS filter.  <a href="group__LMS.html#gac518f7acd1778a8ee90e81c421cfbb90">More...</a><br/></td></tr>
+<tr class="separator:gac518f7acd1778a8ee90e81c421cfbb90"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/arm__lms__init__q31_8c.html b/docs/DSP/html/arm__lms__init__q31_8c.html
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/arm__lms__norm__f32_8c.html b/docs/DSP/html/arm__lms__norm__f32_8c.html
index 02009ad..a3d7c29 100644
--- a/docs/DSP/html/arm__lms__norm__f32_8c.html
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   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
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@@ -116,9 +116,9 @@
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 Functions</h2></td></tr>
-<tr class="memitem:ga2418c929087c6eba719758eaae3f3300"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS__NORM.html#ga2418c929087c6eba719758eaae3f3300">arm_lms_norm_f32</a> (<a class="el" href="structarm__lms__norm__instance__f32.html">arm_lms_norm_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pRef, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pOut, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga2418c929087c6eba719758eaae3f3300"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for floating-point normalized LMS filter.  <a href="group__LMS__NORM.html#ga2418c929087c6eba719758eaae3f3300">More...</a><br/></td></tr>
-<tr class="separator:ga2418c929087c6eba719758eaae3f3300"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga72b3755ed1cf97622851cbbeff83c69e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS__NORM.html#ga72b3755ed1cf97622851cbbeff83c69e">arm_lms_norm_f32</a> (<a class="el" href="structarm__lms__norm__instance__f32.html">arm_lms_norm_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pRef, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pOut, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga72b3755ed1cf97622851cbbeff83c69e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for floating-point normalized LMS filter.  <a href="group__LMS__NORM.html#ga72b3755ed1cf97622851cbbeff83c69e">More...</a><br/></td></tr>
+<tr class="separator:ga72b3755ed1cf97622851cbbeff83c69e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__lms__norm__f32_8c.html">arm_lms_norm_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__lms__norm__init__f32_8c.html b/docs/DSP/html/arm__lms__norm__init__f32_8c.html
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--- a/docs/DSP/html/arm__lms__norm__init__f32_8c.html
+++ b/docs/DSP/html/arm__lms__norm__init__f32_8c.html
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@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__lms__norm__init__f32_8c.html">arm_lms_norm_init_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__lms__norm__init__q15_8c.html b/docs/DSP/html/arm__lms__norm__init__q15_8c.html
index 13af5c8..d3b9e36 100644
--- a/docs/DSP/html/arm__lms__norm__init__q15_8c.html
+++ b/docs/DSP/html/arm__lms__norm__init__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
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    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__lms__norm__init__q15_8c.html">arm_lms_norm_init_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__lms__norm__init__q31_8c.html b/docs/DSP/html/arm__lms__norm__init__q31_8c.html
index c9ef656..291c129 100644
--- a/docs/DSP/html/arm__lms__norm__init__q31_8c.html
+++ b/docs/DSP/html/arm__lms__norm__init__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__lms__norm__init__q31_8c.html">arm_lms_norm_init_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/arm__lms__norm__q15_8c.html b/docs/DSP/html/arm__lms__norm__q15_8c.html
index 6c8c35c..147d9bd 100644
--- a/docs/DSP/html/arm__lms__norm__q15_8c.html
+++ b/docs/DSP/html/arm__lms__norm__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gad47486a399dedb0bc85a5990ec5cf981"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS__NORM.html#gad47486a399dedb0bc85a5990ec5cf981">arm_lms_norm_q15</a> (<a class="el" href="structarm__lms__norm__instance__q15.html">arm_lms_norm_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pRef, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pOut, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gad47486a399dedb0bc85a5990ec5cf981"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q15 normalized LMS filter.  <a href="group__LMS__NORM.html#gad47486a399dedb0bc85a5990ec5cf981">More...</a><br/></td></tr>
-<tr class="separator:gad47486a399dedb0bc85a5990ec5cf981"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf03debfeb77ec5a9934e1b23f1ff6c48"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS__NORM.html#gaf03debfeb77ec5a9934e1b23f1ff6c48">arm_lms_norm_q15</a> (<a class="el" href="structarm__lms__norm__instance__q15.html">arm_lms_norm_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pRef, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pOut, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaf03debfeb77ec5a9934e1b23f1ff6c48"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q15 normalized LMS filter.  <a href="group__LMS__NORM.html#gaf03debfeb77ec5a9934e1b23f1ff6c48">More...</a><br/></td></tr>
+<tr class="separator:gaf03debfeb77ec5a9934e1b23f1ff6c48"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__lms__norm__q15_8c.html">arm_lms_norm_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/arm__lms__norm__q31_8c.html b/docs/DSP/html/arm__lms__norm__q31_8c.html
index f1d14dd..e1b4add 100644
--- a/docs/DSP/html/arm__lms__norm__q31_8c.html
+++ b/docs/DSP/html/arm__lms__norm__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga7128775e99817c183a7d7ad34e8b6e05"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS__NORM.html#ga7128775e99817c183a7d7ad34e8b6e05">arm_lms_norm_q31</a> (<a class="el" href="structarm__lms__norm__instance__q31.html">arm_lms_norm_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pRef, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pOut, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga7128775e99817c183a7d7ad34e8b6e05"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q31 normalized LMS filter.  <a href="group__LMS__NORM.html#ga7128775e99817c183a7d7ad34e8b6e05">More...</a><br/></td></tr>
-<tr class="separator:ga7128775e99817c183a7d7ad34e8b6e05"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae12fc16232c8087345e5910fcb840be9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS__NORM.html#gae12fc16232c8087345e5910fcb840be9">arm_lms_norm_q31</a> (<a class="el" href="structarm__lms__norm__instance__q31.html">arm_lms_norm_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pRef, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pOut, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gae12fc16232c8087345e5910fcb840be9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q31 normalized LMS filter.  <a href="group__LMS__NORM.html#gae12fc16232c8087345e5910fcb840be9">More...</a><br/></td></tr>
+<tr class="separator:gae12fc16232c8087345e5910fcb840be9"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__lms__norm__q31_8c.html">arm_lms_norm_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/arm__lms__q15_8c.html b/docs/DSP/html/arm__lms__q15_8c.html
index 9ca1c63..7f45381 100644
--- a/docs/DSP/html/arm__lms__q15_8c.html
+++ b/docs/DSP/html/arm__lms__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gacde16c17eb75979f81b34e2e2a58c7ac"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS.html#gacde16c17eb75979f81b34e2e2a58c7ac">arm_lms_q15</a> (const <a class="el" href="structarm__lms__instance__q15.html">arm_lms_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pRef, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pOut, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gacde16c17eb75979f81b34e2e2a58c7ac"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q15 LMS filter.  <a href="group__LMS.html#gacde16c17eb75979f81b34e2e2a58c7ac">More...</a><br/></td></tr>
-<tr class="separator:gacde16c17eb75979f81b34e2e2a58c7ac"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga12fd93f61401b365789cdfd5dca07e5b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS.html#ga12fd93f61401b365789cdfd5dca07e5b">arm_lms_q15</a> (const <a class="el" href="structarm__lms__instance__q15.html">arm_lms_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pRef, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pOut, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga12fd93f61401b365789cdfd5dca07e5b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q15 LMS filter.  <a href="group__LMS.html#ga12fd93f61401b365789cdfd5dca07e5b">More...</a><br/></td></tr>
+<tr class="separator:ga12fd93f61401b365789cdfd5dca07e5b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__lms__q15_8c.html">arm_lms_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__lms__q31_8c.html b/docs/DSP/html/arm__lms__q31_8c.html
index e6be838..c69896c 100644
--- a/docs/DSP/html/arm__lms__q31_8c.html
+++ b/docs/DSP/html/arm__lms__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga6a0abfe6041253a6f91c63b383a64257"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS.html#ga6a0abfe6041253a6f91c63b383a64257">arm_lms_q31</a> (const <a class="el" href="structarm__lms__instance__q31.html">arm_lms_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pRef, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pOut, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga6a0abfe6041253a6f91c63b383a64257"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q31 LMS filter.  <a href="group__LMS.html#ga6a0abfe6041253a6f91c63b383a64257">More...</a><br/></td></tr>
-<tr class="separator:ga6a0abfe6041253a6f91c63b383a64257"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga69c9c64338c067f1fb4990dcdc8c143f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS.html#ga69c9c64338c067f1fb4990dcdc8c143f">arm_lms_q31</a> (const <a class="el" href="structarm__lms__instance__q31.html">arm_lms_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pRef, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pOut, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga69c9c64338c067f1fb4990dcdc8c143f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q31 LMS filter.  <a href="group__LMS.html#ga69c9c64338c067f1fb4990dcdc8c143f">More...</a><br/></td></tr>
+<tr class="separator:ga69c9c64338c067f1fb4990dcdc8c143f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_4686057ebfd09ff788c87e22ea0e3543.html">FilteringFunctions</a></li><li class="navelem"><a class="el" href="arm__lms__q31_8c.html">arm_lms_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__mat__add__f32_8c.html b/docs/DSP/html/arm__mat__add__f32_8c.html
index d9a7d7a..ccb00cc 100644
--- a/docs/DSP/html/arm__mat__add__f32_8c.html
+++ b/docs/DSP/html/arm__mat__add__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_ae37ae87b9b72905e94a2ae43aaff3a6.html">MatrixFunctions</a></li><li class="navelem"><a class="el" href="arm__mat__add__f32_8c.html">arm_mat_add_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__mat__add__q15_8c.html b/docs/DSP/html/arm__mat__add__q15_8c.html
index f5a50d5..9825ab3 100644
--- a/docs/DSP/html/arm__mat__add__q15_8c.html
+++ b/docs/DSP/html/arm__mat__add__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_ae37ae87b9b72905e94a2ae43aaff3a6.html">MatrixFunctions</a></li><li class="navelem"><a class="el" href="arm__mat__add__q15_8c.html">arm_mat_add_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__mat__add__q31_8c.html b/docs/DSP/html/arm__mat__add__q31_8c.html
index bc512c0..097a4cb 100644
--- a/docs/DSP/html/arm__mat__add__q31_8c.html
+++ b/docs/DSP/html/arm__mat__add__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_ae37ae87b9b72905e94a2ae43aaff3a6.html">MatrixFunctions</a></li><li class="navelem"><a class="el" href="arm__mat__add__q31_8c.html">arm_mat_add_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__mat__cmplx__mult__f32_8c.html b/docs/DSP/html/arm__mat__cmplx__mult__f32_8c.html
index cdb3bfb..7e06e3d 100644
--- a/docs/DSP/html/arm__mat__cmplx__mult__f32_8c.html
+++ b/docs/DSP/html/arm__mat__cmplx__mult__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_ae37ae87b9b72905e94a2ae43aaff3a6.html">MatrixFunctions</a></li><li class="navelem"><a class="el" href="arm__mat__cmplx__mult__f32_8c.html">arm_mat_cmplx_mult_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__mat__cmplx__mult__q15_8c.html b/docs/DSP/html/arm__mat__cmplx__mult__q15_8c.html
index 864c556..dfbd972 100644
--- a/docs/DSP/html/arm__mat__cmplx__mult__q15_8c.html
+++ b/docs/DSP/html/arm__mat__cmplx__mult__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_ae37ae87b9b72905e94a2ae43aaff3a6.html">MatrixFunctions</a></li><li class="navelem"><a class="el" href="arm__mat__cmplx__mult__q15_8c.html">arm_mat_cmplx_mult_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__mat__cmplx__mult__q31_8c.html b/docs/DSP/html/arm__mat__cmplx__mult__q31_8c.html
index f19040e..e9aaced 100644
--- a/docs/DSP/html/arm__mat__cmplx__mult__q31_8c.html
+++ b/docs/DSP/html/arm__mat__cmplx__mult__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_ae37ae87b9b72905e94a2ae43aaff3a6.html">MatrixFunctions</a></li><li class="navelem"><a class="el" href="arm__mat__cmplx__mult__q31_8c.html">arm_mat_cmplx_mult_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__mat__init__f32_8c.html b/docs/DSP/html/arm__mat__init__f32_8c.html
index a3e879b..aa1fb4d 100644
--- a/docs/DSP/html/arm__mat__init__f32_8c.html
+++ b/docs/DSP/html/arm__mat__init__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -126,7 +126,7 @@
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-<tr class="memdesc:a576c5c6286a37eb7f7ba1c5711a577a9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clips Q63 to Q15 values.  <a href="#a576c5c6286a37eb7f7ba1c5711a577a9">More...</a><br/></td></tr>
-<tr class="separator:a576c5c6286a37eb7f7ba1c5711a577a9"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:af815ae1a72c9ef88b8ba0a4cb3b23eaa"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#af815ae1a72c9ef88b8ba0a4cb3b23eaa">clip_q31_to_q7</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> x)</td></tr>
-<tr class="memdesc:af815ae1a72c9ef88b8ba0a4cb3b23eaa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clips Q31 to Q7 values.  <a href="#af815ae1a72c9ef88b8ba0a4cb3b23eaa">More...</a><br/></td></tr>
-<tr class="separator:af815ae1a72c9ef88b8ba0a4cb3b23eaa"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a4604d1ebfef21e380c42fbe16b9724d1"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a4604d1ebfef21e380c42fbe16b9724d1">clip_q31_to_q15</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> x)</td></tr>
-<tr class="memdesc:a4604d1ebfef21e380c42fbe16b9724d1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clips Q31 to Q15 values.  <a href="#a4604d1ebfef21e380c42fbe16b9724d1">More...</a><br/></td></tr>
-<tr class="separator:a4604d1ebfef21e380c42fbe16b9724d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a24ad1cc3560b89335ee15f5b7e69b1f9"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a24ad1cc3560b89335ee15f5b7e69b1f9">mult32x64</a> (<a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> x, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> y)</td></tr>
-<tr class="memdesc:a24ad1cc3560b89335ee15f5b7e69b1f9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies 32 X 64 and returns 32 bit result in 2.30 format.  <a href="#a24ad1cc3560b89335ee15f5b7e69b1f9">More...</a><br/></td></tr>
-<tr class="separator:a24ad1cc3560b89335ee15f5b7e69b1f9"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a71f6bee1ce1bb896739401ce962a7e6a"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a71f6bee1ce1bb896739401ce962a7e6a">arm_recip_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> in, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *dst, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pRecipTable)</td></tr>
-<tr class="memdesc:a71f6bee1ce1bb896739401ce962a7e6a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Function to Calculates 1/in (reciprocal) value of Q31 Data type.  <a href="#a71f6bee1ce1bb896739401ce962a7e6a">More...</a><br/></td></tr>
-<tr class="separator:a71f6bee1ce1bb896739401ce962a7e6a"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a39e9e34c2784ff8cf026430d1d84f54e"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a39e9e34c2784ff8cf026430d1d84f54e">arm_recip_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> in, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *dst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pRecipTable)</td></tr>
-<tr class="memdesc:a39e9e34c2784ff8cf026430d1d84f54e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Function to Calculates 1/in (reciprocal) value of Q15 Data type.  <a href="#a39e9e34c2784ff8cf026430d1d84f54e">More...</a><br/></td></tr>
-<tr class="separator:a39e9e34c2784ff8cf026430d1d84f54e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a937a37e831677294ecde7195ec9d68ee"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a937a37e831677294ecde7195ec9d68ee">__QADD8</a> (uint32_t x, uint32_t y)</td></tr>
-<tr class="separator:a937a37e831677294ecde7195ec9d68ee"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a4690314b420f463093f1a2f68b5fb143"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a4690314b420f463093f1a2f68b5fb143">__QSUB8</a> (uint32_t x, uint32_t y)</td></tr>
-<tr class="separator:a4690314b420f463093f1a2f68b5fb143"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a08bea9cb2c311d925224c0d6829edb8c"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a08bea9cb2c311d925224c0d6829edb8c">__QADD16</a> (uint32_t x, uint32_t y)</td></tr>
-<tr class="separator:a08bea9cb2c311d925224c0d6829edb8c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:af3d7aff37a4472f1f2bc88eb3b97b526"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#af3d7aff37a4472f1f2bc88eb3b97b526">__SHADD16</a> (uint32_t x, uint32_t y)</td></tr>
-<tr class="separator:af3d7aff37a4472f1f2bc88eb3b97b526"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a6e4703dc08d1b82eab7f5ef96edb59bb"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a6e4703dc08d1b82eab7f5ef96edb59bb">__QSUB16</a> (uint32_t x, uint32_t y)</td></tr>
-<tr class="separator:a6e4703dc08d1b82eab7f5ef96edb59bb"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a0987d147320a596bbdb537d70b23de73"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a0987d147320a596bbdb537d70b23de73">__SHSUB16</a> (uint32_t x, uint32_t y)</td></tr>
-<tr class="separator:a0987d147320a596bbdb537d70b23de73"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:aad6f7afa72d784b95e6357c215a919bb"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#aad6f7afa72d784b95e6357c215a919bb">__QASX</a> (uint32_t x, uint32_t y)</td></tr>
-<tr class="separator:aad6f7afa72d784b95e6357c215a919bb"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:af60f220d422ebc524411f712544feecf"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#af60f220d422ebc524411f712544feecf">__SHASX</a> (uint32_t x, uint32_t y)</td></tr>
-<tr class="separator:af60f220d422ebc524411f712544feecf"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a391f5f1d2e7cefaccfece0a49141ad47"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a391f5f1d2e7cefaccfece0a49141ad47">__QSAX</a> (uint32_t x, uint32_t y)</td></tr>
-<tr class="separator:a391f5f1d2e7cefaccfece0a49141ad47"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:abbfbf3cfac1971b4b380c0cde120a85b"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#abbfbf3cfac1971b4b380c0cde120a85b">__SHSAX</a> (uint32_t x, uint32_t y)</td></tr>
-<tr class="separator:abbfbf3cfac1971b4b380c0cde120a85b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a7375d1deba32929dc97008bfa7085d46"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a7375d1deba32929dc97008bfa7085d46">__SMUSDX</a> (uint32_t x, uint32_t y)</td></tr>
-<tr class="separator:a7375d1deba32929dc97008bfa7085d46"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a9c58d7b4648a973d91e27544bc190e60"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a9c58d7b4648a973d91e27544bc190e60">__SMUADX</a> (uint32_t x, uint32_t y)</td></tr>
-<tr class="separator:a9c58d7b4648a973d91e27544bc190e60"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ab9f3cfbfb0f12975ab91ddb179160dcb"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#ab9f3cfbfb0f12975ab91ddb179160dcb">__QADD</a> (int32_t x, int32_t y)</td></tr>
-<tr class="separator:ab9f3cfbfb0f12975ab91ddb179160dcb"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a15e896d0146c280e600d00f609832350"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a15e896d0146c280e600d00f609832350">__QSUB</a> (int32_t x, int32_t y)</td></tr>
-<tr class="separator:a15e896d0146c280e600d00f609832350"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:aa611fdbf6c56c46553701d6596a79aaf"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#aa611fdbf6c56c46553701d6596a79aaf">__SMLAD</a> (uint32_t x, uint32_t y, uint32_t sum)</td></tr>
-<tr class="separator:aa611fdbf6c56c46553701d6596a79aaf"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a7fc670277db1ad9ac34d52d771c7c305"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a7fc670277db1ad9ac34d52d771c7c305">__SMLADX</a> (uint32_t x, uint32_t y, uint32_t sum)</td></tr>
-<tr class="separator:a7fc670277db1ad9ac34d52d771c7c305"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a5d61b7d886888f9f1f35c079eb5d01c9"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a5d61b7d886888f9f1f35c079eb5d01c9">__SMLSDX</a> (uint32_t x, uint32_t y, uint32_t sum)</td></tr>
-<tr class="separator:a5d61b7d886888f9f1f35c079eb5d01c9"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a7aed02041f489a4f65dbd7093073d94e"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-uint64_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a7aed02041f489a4f65dbd7093073d94e">__SMLALD</a> (uint32_t x, uint32_t y, uint64_t sum)</td></tr>
-<tr class="separator:a7aed02041f489a4f65dbd7093073d94e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a3bdab9022ab56e30f6346a043050dfc4"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-uint64_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a3bdab9022ab56e30f6346a043050dfc4">__SMLALDX</a> (uint32_t x, uint32_t y, uint64_t sum)</td></tr>
-<tr class="separator:a3bdab9022ab56e30f6346a043050dfc4"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a2eed05660fedbe3fbd0b6dbb1315cfc3"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a2eed05660fedbe3fbd0b6dbb1315cfc3">__SMUAD</a> (uint32_t x, uint32_t y)</td></tr>
-<tr class="separator:a2eed05660fedbe3fbd0b6dbb1315cfc3"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a6b293f62ad7eb225fa9ce0f39458eba3"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a6b293f62ad7eb225fa9ce0f39458eba3">__SMUSD</a> (uint32_t x, uint32_t y)</td></tr>
-<tr class="separator:a6b293f62ad7eb225fa9ce0f39458eba3"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ac9f7f02a5e0ad5642026dbd0da7418db"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#ac9f7f02a5e0ad5642026dbd0da7418db">__SXTB16</a> (uint32_t x)</td></tr>
-<tr class="separator:ac9f7f02a5e0ad5642026dbd0da7418db"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a0162015f6d3458e2934a265481460ec4"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a0162015f6d3458e2934a265481460ec4">__SMMLA</a> (int32_t x, int32_t y, int32_t sum)</td></tr>
-<tr class="separator:a0162015f6d3458e2934a265481460ec4"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga31c91a0bf0962327ef8f626fae68ea32"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga31c91a0bf0962327ef8f626fae68ea32">arm_fir_q7</a> (const <a class="el" href="structarm__fir__instance__q7.html">arm_fir_instance_q7</a> *S, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga31c91a0bf0962327ef8f626fae68ea32"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q7 FIR filter.  <a href="group__FIR.html#ga31c91a0bf0962327ef8f626fae68ea32">More...</a><br/></td></tr>
-<tr class="separator:ga31c91a0bf0962327ef8f626fae68ea32"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga88e48688224d42dc173dbcec702f0c1d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga88e48688224d42dc173dbcec702f0c1d">arm_fir_init_q7</a> (<a class="el" href="structarm__fir__instance__q7.html">arm_fir_instance_q7</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga88e48688224d42dc173dbcec702f0c1d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q7 FIR filter.  <a href="group__FIR.html#ga88e48688224d42dc173dbcec702f0c1d">More...</a><br/></td></tr>
-<tr class="separator:ga88e48688224d42dc173dbcec702f0c1d"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga262d173058d6f80fdf60404ba262a8f5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga262d173058d6f80fdf60404ba262a8f5">arm_fir_q15</a> (const <a class="el" href="structarm__fir__instance__q15.html">arm_fir_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga262d173058d6f80fdf60404ba262a8f5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 FIR filter.  <a href="group__FIR.html#ga262d173058d6f80fdf60404ba262a8f5">More...</a><br/></td></tr>
-<tr class="separator:ga262d173058d6f80fdf60404ba262a8f5"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac7d35e9472e49ccd88800f37f3476bd3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gac7d35e9472e49ccd88800f37f3476bd3">arm_fir_fast_q15</a> (const <a class="el" href="structarm__fir__instance__q15.html">arm_fir_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gac7d35e9472e49ccd88800f37f3476bd3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4.  <a href="group__FIR.html#gac7d35e9472e49ccd88800f37f3476bd3">More...</a><br/></td></tr>
-<tr class="separator:gac7d35e9472e49ccd88800f37f3476bd3"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gae2a50f692f41ba57e44ed0719b1368bd"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gae2a50f692f41ba57e44ed0719b1368bd">arm_fir_init_q15</a> (<a class="el" href="structarm__fir__instance__q15.html">arm_fir_instance_q15</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gae2a50f692f41ba57e44ed0719b1368bd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q15 FIR filter.  <a href="group__FIR.html#gae2a50f692f41ba57e44ed0719b1368bd">More...</a><br/></td></tr>
-<tr class="separator:gae2a50f692f41ba57e44ed0719b1368bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaadd938c68ab08967cbb5fc696f384bb5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gaadd938c68ab08967cbb5fc696f384bb5">arm_fir_q31</a> (const <a class="el" href="structarm__fir__instance__q31.html">arm_fir_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaadd938c68ab08967cbb5fc696f384bb5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 FIR filter.  <a href="group__FIR.html#gaadd938c68ab08967cbb5fc696f384bb5">More...</a><br/></td></tr>
-<tr class="separator:gaadd938c68ab08967cbb5fc696f384bb5"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga70d11af009dcd25594c58c75cdb5d6e3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga70d11af009dcd25594c58c75cdb5d6e3">arm_fir_fast_q31</a> (const <a class="el" href="structarm__fir__instance__q31.html">arm_fir_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga70d11af009dcd25594c58c75cdb5d6e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4.  <a href="group__FIR.html#ga70d11af009dcd25594c58c75cdb5d6e3">More...</a><br/></td></tr>
-<tr class="separator:ga70d11af009dcd25594c58c75cdb5d6e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac00d53af87684cbbe135767b55e748a5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gac00d53af87684cbbe135767b55e748a5">arm_fir_init_q31</a> (<a class="el" href="structarm__fir__instance__q31.html">arm_fir_instance_q31</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gac00d53af87684cbbe135767b55e748a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 FIR filter.  <a href="group__FIR.html#gac00d53af87684cbbe135767b55e748a5">More...</a><br/></td></tr>
-<tr class="separator:gac00d53af87684cbbe135767b55e748a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gae8fb334ea67eb6ecbd31824ddc14cd6a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gae8fb334ea67eb6ecbd31824ddc14cd6a">arm_fir_f32</a> (const <a class="el" href="structarm__fir__instance__f32.html">arm_fir_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gae8fb334ea67eb6ecbd31824ddc14cd6a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point FIR filter.  <a href="group__FIR.html#gae8fb334ea67eb6ecbd31824ddc14cd6a">More...</a><br/></td></tr>
-<tr class="separator:gae8fb334ea67eb6ecbd31824ddc14cd6a"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga98d13def6427e29522829f945d0967db"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga98d13def6427e29522829f945d0967db">arm_fir_init_f32</a> (<a class="el" href="structarm__fir__instance__f32.html">arm_fir_instance_f32</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga98d13def6427e29522829f945d0967db"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point FIR filter.  <a href="group__FIR.html#ga98d13def6427e29522829f945d0967db">More...</a><br/></td></tr>
-<tr class="separator:ga98d13def6427e29522829f945d0967db"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gadd66a0aefdc645031d607b0a5b37a942"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#gadd66a0aefdc645031d607b0a5b37a942">arm_biquad_cascade_df1_q15</a> (const <a class="el" href="structarm__biquad__casd__df1__inst__q15.html">arm_biquad_casd_df1_inst_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gadd66a0aefdc645031d607b0a5b37a942"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 Biquad cascade filter.  <a href="group__BiquadCascadeDF1.html#gadd66a0aefdc645031d607b0a5b37a942">More...</a><br/></td></tr>
-<tr class="separator:gadd66a0aefdc645031d607b0a5b37a942"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad54c724132f6d742a444eb6df0e9c731"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#gad54c724132f6d742a444eb6df0e9c731">arm_biquad_cascade_df1_init_q15</a> (<a class="el" href="structarm__biquad__casd__df1__inst__q15.html">arm_biquad_casd_df1_inst_q15</a> *S, uint8_t numStages, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState, int8_t postShift)</td></tr>
-<tr class="memdesc:gad54c724132f6d742a444eb6df0e9c731"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q15 Biquad cascade filter.  <a href="group__BiquadCascadeDF1.html#gad54c724132f6d742a444eb6df0e9c731">More...</a><br/></td></tr>
-<tr class="separator:gad54c724132f6d742a444eb6df0e9c731"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaffb9792c0220882efd4c58f3c6a05fd7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#gaffb9792c0220882efd4c58f3c6a05fd7">arm_biquad_cascade_df1_fast_q15</a> (const <a class="el" href="structarm__biquad__casd__df1__inst__q15.html">arm_biquad_casd_df1_inst_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaffb9792c0220882efd4c58f3c6a05fd7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.  <a href="group__BiquadCascadeDF1.html#gaffb9792c0220882efd4c58f3c6a05fd7">More...</a><br/></td></tr>
-<tr class="separator:gaffb9792c0220882efd4c58f3c6a05fd7"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga27b0c54da702713976e5202d20b4473f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#ga27b0c54da702713976e5202d20b4473f">arm_biquad_cascade_df1_q31</a> (const <a class="el" href="structarm__biquad__casd__df1__inst__q31.html">arm_biquad_casd_df1_inst_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga27b0c54da702713976e5202d20b4473f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 Biquad cascade filter.  <a href="group__BiquadCascadeDF1.html#ga27b0c54da702713976e5202d20b4473f">More...</a><br/></td></tr>
-<tr class="separator:ga27b0c54da702713976e5202d20b4473f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga456390f5e448afad3a38bed7d6e380e3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#ga456390f5e448afad3a38bed7d6e380e3">arm_biquad_cascade_df1_fast_q31</a> (const <a class="el" href="structarm__biquad__casd__df1__inst__q31.html">arm_biquad_casd_df1_inst_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga456390f5e448afad3a38bed7d6e380e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.  <a href="group__BiquadCascadeDF1.html#ga456390f5e448afad3a38bed7d6e380e3">More...</a><br/></td></tr>
-<tr class="separator:ga456390f5e448afad3a38bed7d6e380e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf42a44f9b16d61e636418c83eefe577b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#gaf42a44f9b16d61e636418c83eefe577b">arm_biquad_cascade_df1_init_q31</a> (<a class="el" href="structarm__biquad__casd__df1__inst__q31.html">arm_biquad_casd_df1_inst_q31</a> *S, uint8_t numStages, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState, int8_t postShift)</td></tr>
-<tr class="memdesc:gaf42a44f9b16d61e636418c83eefe577b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 Biquad cascade filter.  <a href="group__BiquadCascadeDF1.html#gaf42a44f9b16d61e636418c83eefe577b">More...</a><br/></td></tr>
-<tr class="separator:gaf42a44f9b16d61e636418c83eefe577b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaa0dbe330d763e3c1d8030b3ef12d5bdc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#gaa0dbe330d763e3c1d8030b3ef12d5bdc">arm_biquad_cascade_df1_f32</a> (const <a class="el" href="structarm__biquad__casd__df1__inst__f32.html">arm_biquad_casd_df1_inst_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaa0dbe330d763e3c1d8030b3ef12d5bdc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point Biquad cascade filter.  <a href="group__BiquadCascadeDF1.html#gaa0dbe330d763e3c1d8030b3ef12d5bdc">More...</a><br/></td></tr>
-<tr class="separator:gaa0dbe330d763e3c1d8030b3ef12d5bdc"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga8e73b69a788e681a61bccc8959d823c5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#ga8e73b69a788e681a61bccc8959d823c5">arm_biquad_cascade_df1_init_f32</a> (<a class="el" href="structarm__biquad__casd__df1__inst__f32.html">arm_biquad_casd_df1_inst_f32</a> *S, uint8_t numStages, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState)</td></tr>
-<tr class="memdesc:ga8e73b69a788e681a61bccc8959d823c5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point Biquad cascade filter.  <a href="group__BiquadCascadeDF1.html#ga8e73b69a788e681a61bccc8959d823c5">More...</a><br/></td></tr>
-<tr class="separator:ga8e73b69a788e681a61bccc8959d823c5"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a1eba08f198f867711068918c45026564"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a1eba08f198f867711068918c45026564">read_q15x2</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pQ15)</td></tr>
+<tr class="memdesc:a1eba08f198f867711068918c45026564"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read 2 Q15 from Q15 pointer.  <a href="#a1eba08f198f867711068918c45026564">More...</a><br/></td></tr>
+<tr class="separator:a1eba08f198f867711068918c45026564"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a63675cbbd75b0ba77f5bb21c3b808095"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a63675cbbd75b0ba77f5bb21c3b808095">read_q15x2_ia</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> **pQ15)</td></tr>
+<tr class="memdesc:a63675cbbd75b0ba77f5bb21c3b808095"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read 2 Q15 from Q15 pointer and increment pointer afterwards.  <a href="#a63675cbbd75b0ba77f5bb21c3b808095">More...</a><br/></td></tr>
+<tr class="separator:a63675cbbd75b0ba77f5bb21c3b808095"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ae7ddd4049745db9c70a5cd7e8068d1bb"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#ae7ddd4049745db9c70a5cd7e8068d1bb">read_q15x2_da</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> **pQ15)</td></tr>
+<tr class="memdesc:ae7ddd4049745db9c70a5cd7e8068d1bb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read 2 Q15 from Q15 pointer and decrement pointer afterwards.  <a href="#ae7ddd4049745db9c70a5cd7e8068d1bb">More...</a><br/></td></tr>
+<tr class="separator:ae7ddd4049745db9c70a5cd7e8068d1bb"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a576a0e2a4667277b42c478dfda753dc6"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a576a0e2a4667277b42c478dfda753dc6">write_q15x2_ia</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> **pQ15, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> value)</td></tr>
+<tr class="memdesc:a576a0e2a4667277b42c478dfda753dc6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write 2 Q15 to Q15 pointer and increment pointer afterwards.  <a href="#a576a0e2a4667277b42c478dfda753dc6">More...</a><br/></td></tr>
+<tr class="separator:a576a0e2a4667277b42c478dfda753dc6"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a1c6d46f43d41c6ca1b7d6a0d8ed95036"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a1c6d46f43d41c6ca1b7d6a0d8ed95036">write_q15x2</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pQ15, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> value)</td></tr>
+<tr class="memdesc:a1c6d46f43d41c6ca1b7d6a0d8ed95036"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write 2 Q15 to Q15 pointer.  <a href="#a1c6d46f43d41c6ca1b7d6a0d8ed95036">More...</a><br/></td></tr>
+<tr class="separator:a1c6d46f43d41c6ca1b7d6a0d8ed95036"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a969ec542d2035cd9289f68f932cb626a"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a969ec542d2035cd9289f68f932cb626a">read_q7x4_ia</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> **pQ7)</td></tr>
+<tr class="memdesc:a969ec542d2035cd9289f68f932cb626a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read 4 Q7 from Q7 pointer and increment pointer afterwards.  <a href="#a969ec542d2035cd9289f68f932cb626a">More...</a><br/></td></tr>
+<tr class="separator:a969ec542d2035cd9289f68f932cb626a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a57dbc6933462fd03c5345c660e0b9e78"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a57dbc6933462fd03c5345c660e0b9e78">read_q7x4_da</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> **pQ7)</td></tr>
+<tr class="memdesc:a57dbc6933462fd03c5345c660e0b9e78"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read 4 Q7 from Q7 pointer and decrement pointer afterwards.  <a href="#a57dbc6933462fd03c5345c660e0b9e78">More...</a><br/></td></tr>
+<tr class="separator:a57dbc6933462fd03c5345c660e0b9e78"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a05bde59a4c7dd866d0a2e3e6fcac17bd"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a05bde59a4c7dd866d0a2e3e6fcac17bd">write_q7x4_ia</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> **pQ7, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> value)</td></tr>
+<tr class="memdesc:a05bde59a4c7dd866d0a2e3e6fcac17bd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write 4 Q7 to Q7 pointer and increment pointer afterwards.  <a href="#a05bde59a4c7dd866d0a2e3e6fcac17bd">More...</a><br/></td></tr>
+<tr class="separator:a05bde59a4c7dd866d0a2e3e6fcac17bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ad3a8d07983196592f6edca8f84aec7c7"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#ad3a8d07983196592f6edca8f84aec7c7">clip_q63_to_q31</a> (<a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> x)</td></tr>
+<tr class="memdesc:ad3a8d07983196592f6edca8f84aec7c7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clips Q63 to Q31 values.  <a href="#ad3a8d07983196592f6edca8f84aec7c7">More...</a><br/></td></tr>
+<tr class="separator:ad3a8d07983196592f6edca8f84aec7c7"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a027d446e8a72228f0a681779a7038a4e"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a027d446e8a72228f0a681779a7038a4e">clip_q63_to_q15</a> (<a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> x)</td></tr>
+<tr class="memdesc:a027d446e8a72228f0a681779a7038a4e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clips Q63 to Q15 values.  <a href="#a027d446e8a72228f0a681779a7038a4e">More...</a><br/></td></tr>
+<tr class="separator:a027d446e8a72228f0a681779a7038a4e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:afa69cfc57f04c36c2ba499525168fe0c"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#afa69cfc57f04c36c2ba499525168fe0c">clip_q31_to_q7</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> x)</td></tr>
+<tr class="memdesc:afa69cfc57f04c36c2ba499525168fe0c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clips Q31 to Q7 values.  <a href="#afa69cfc57f04c36c2ba499525168fe0c">More...</a><br/></td></tr>
+<tr class="separator:afa69cfc57f04c36c2ba499525168fe0c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a8648908e55b9fd8893b36eb7050e69a8"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a8648908e55b9fd8893b36eb7050e69a8">clip_q31_to_q15</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> x)</td></tr>
+<tr class="memdesc:a8648908e55b9fd8893b36eb7050e69a8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clips Q31 to Q15 values.  <a href="#a8648908e55b9fd8893b36eb7050e69a8">More...</a><br/></td></tr>
+<tr class="separator:a8648908e55b9fd8893b36eb7050e69a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a1922856352479a1443dad21208351d35"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a1922856352479a1443dad21208351d35">mult32x64</a> (<a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> x, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> y)</td></tr>
+<tr class="memdesc:a1922856352479a1443dad21208351d35"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies 32 X 64 and returns 32 bit result in 2.30 format.  <a href="#a1922856352479a1443dad21208351d35">More...</a><br/></td></tr>
+<tr class="separator:a1922856352479a1443dad21208351d35"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a3cedcf5a91d6c722c64330ec97e0853e"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a3cedcf5a91d6c722c64330ec97e0853e">arm_recip_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> in, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *dst, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pRecipTable)</td></tr>
+<tr class="memdesc:a3cedcf5a91d6c722c64330ec97e0853e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Function to Calculates 1/in (reciprocal) value of Q31 Data type.  <a href="#a3cedcf5a91d6c722c64330ec97e0853e">More...</a><br/></td></tr>
+<tr class="separator:a3cedcf5a91d6c722c64330ec97e0853e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a1e370c58e45bbe92bb7763fe59cf5e57"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a1e370c58e45bbe92bb7763fe59cf5e57">arm_recip_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> in, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *dst, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pRecipTable)</td></tr>
+<tr class="memdesc:a1e370c58e45bbe92bb7763fe59cf5e57"><td class="mdescLeft">&#160;</td><td class="mdescRight">Function to Calculates 1/in (reciprocal) value of Q15 Data type.  <a href="#a1e370c58e45bbe92bb7763fe59cf5e57">More...</a><br/></td></tr>
+<tr class="separator:a1e370c58e45bbe92bb7763fe59cf5e57"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a2fb737513178e1e4b473008d0ebca517"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a2fb737513178e1e4b473008d0ebca517">__QADD8</a> (uint32_t x, uint32_t y)</td></tr>
+<tr class="separator:a2fb737513178e1e4b473008d0ebca517"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:a646b60c85d3e75c6c2bd78df06db9b40"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memitem:a3821f41c9144c9390bd2000c352c6454"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a3821f41c9144c9390bd2000c352c6454">__QSUB16</a> (uint32_t x, uint32_t y)</td></tr>
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+<tr class="memitem:a67078440657eb28859c39adc62ce16b9"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a67078440657eb28859c39adc62ce16b9">__SHSUB16</a> (uint32_t x, uint32_t y)</td></tr>
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+<tr class="separator:a5a21d62839618246ef1383fc5531425b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac333f1139ef35124e89b0ee7494ad0a2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gac333f1139ef35124e89b0ee7494ad0a2">arm_fir_q7</a> (const <a class="el" href="structarm__fir__instance__q7.html">arm_fir_instance_q7</a> *S, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gac333f1139ef35124e89b0ee7494ad0a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q7 FIR filter.  <a href="group__FIR.html#gac333f1139ef35124e89b0ee7494ad0a2">More...</a><br/></td></tr>
+<tr class="separator:gac333f1139ef35124e89b0ee7494ad0a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gabd62c4543b243c25e315e7acb57f726c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gabd62c4543b243c25e315e7acb57f726c">arm_fir_init_q7</a> (<a class="el" href="structarm__fir__instance__q7.html">arm_fir_instance_q7</a> *S, uint16_t numTaps, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gabd62c4543b243c25e315e7acb57f726c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q7 FIR filter.  <a href="group__FIR.html#gabd62c4543b243c25e315e7acb57f726c">More...</a><br/></td></tr>
+<tr class="separator:gabd62c4543b243c25e315e7acb57f726c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad9f84fdadbb59292592c7fac81adb09c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gad9f84fdadbb59292592c7fac81adb09c">arm_fir_q15</a> (const <a class="el" href="structarm__fir__instance__q15.html">arm_fir_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gad9f84fdadbb59292592c7fac81adb09c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 FIR filter.  <a href="group__FIR.html#gad9f84fdadbb59292592c7fac81adb09c">More...</a><br/></td></tr>
+<tr class="separator:gad9f84fdadbb59292592c7fac81adb09c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf58eee6c38f0b666897b24ca02f9d58d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gaf58eee6c38f0b666897b24ca02f9d58d">arm_fir_fast_q15</a> (const <a class="el" href="structarm__fir__instance__q15.html">arm_fir_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaf58eee6c38f0b666897b24ca02f9d58d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the fast Q15 FIR filter (fast version).  <a href="group__FIR.html#gaf58eee6c38f0b666897b24ca02f9d58d">More...</a><br/></td></tr>
+<tr class="separator:gaf58eee6c38f0b666897b24ca02f9d58d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf4bfa7e20520f3b6e9f03a52ad6d0e41"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gaf4bfa7e20520f3b6e9f03a52ad6d0e41">arm_fir_init_q15</a> (<a class="el" href="structarm__fir__instance__q15.html">arm_fir_instance_q15</a> *S, uint16_t numTaps, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaf4bfa7e20520f3b6e9f03a52ad6d0e41"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q15 FIR filter.  <a href="group__FIR.html#gaf4bfa7e20520f3b6e9f03a52ad6d0e41">More...</a><br/></td></tr>
+<tr class="separator:gaf4bfa7e20520f3b6e9f03a52ad6d0e41"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga2f6fc6582ab4491b3ea8c038c5247ecf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga2f6fc6582ab4491b3ea8c038c5247ecf">arm_fir_q31</a> (const <a class="el" href="structarm__fir__instance__q31.html">arm_fir_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga2f6fc6582ab4491b3ea8c038c5247ecf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 FIR filter.  <a href="group__FIR.html#ga2f6fc6582ab4491b3ea8c038c5247ecf">More...</a><br/></td></tr>
+<tr class="separator:ga2f6fc6582ab4491b3ea8c038c5247ecf"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga07051c8e9f0f228c9634b4a9ca2bcac3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga07051c8e9f0f228c9634b4a9ca2bcac3">arm_fir_fast_q31</a> (const <a class="el" href="structarm__fir__instance__q31.html">arm_fir_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga07051c8e9f0f228c9634b4a9ca2bcac3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the fast Q31 FIR filter (fast version).  <a href="group__FIR.html#ga07051c8e9f0f228c9634b4a9ca2bcac3">More...</a><br/></td></tr>
+<tr class="separator:ga07051c8e9f0f228c9634b4a9ca2bcac3"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga23ef4b2597aecc4d43cce7c4b456ae71"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga23ef4b2597aecc4d43cce7c4b456ae71">arm_fir_init_q31</a> (<a class="el" href="structarm__fir__instance__q31.html">arm_fir_instance_q31</a> *S, uint16_t numTaps, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga23ef4b2597aecc4d43cce7c4b456ae71"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 FIR filter.  <a href="group__FIR.html#ga23ef4b2597aecc4d43cce7c4b456ae71">More...</a><br/></td></tr>
+<tr class="separator:ga23ef4b2597aecc4d43cce7c4b456ae71"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0cf008f650a75f5e2cf82d10691b64d9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga0cf008f650a75f5e2cf82d10691b64d9">arm_fir_f32</a> (const <a class="el" href="structarm__fir__instance__f32.html">arm_fir_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga0cf008f650a75f5e2cf82d10691b64d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point FIR filter.  <a href="group__FIR.html#ga0cf008f650a75f5e2cf82d10691b64d9">More...</a><br/></td></tr>
+<tr class="separator:ga0cf008f650a75f5e2cf82d10691b64d9"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5afaa7b8e6735bbc19e582aa9755b0e1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga5afaa7b8e6735bbc19e582aa9755b0e1">arm_fir_init_f32</a> (<a class="el" href="structarm__fir__instance__f32.html">arm_fir_instance_f32</a> *S, uint16_t numTaps, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga5afaa7b8e6735bbc19e582aa9755b0e1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point FIR filter.  <a href="group__FIR.html#ga5afaa7b8e6735bbc19e582aa9755b0e1">More...</a><br/></td></tr>
+<tr class="separator:ga5afaa7b8e6735bbc19e582aa9755b0e1"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga27af5bfa40dad7c877e48eedc8d67558"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#ga27af5bfa40dad7c877e48eedc8d67558">arm_biquad_cascade_df1_q15</a> (const <a class="el" href="structarm__biquad__casd__df1__inst__q15.html">arm_biquad_casd_df1_inst_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga27af5bfa40dad7c877e48eedc8d67558"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 Biquad cascade filter.  <a href="group__BiquadCascadeDF1.html#ga27af5bfa40dad7c877e48eedc8d67558">More...</a><br/></td></tr>
+<tr class="separator:ga27af5bfa40dad7c877e48eedc8d67558"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1115256c79a0e22a3a54f8e627ac256f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#ga1115256c79a0e22a3a54f8e627ac256f">arm_biquad_cascade_df1_init_q15</a> (<a class="el" href="structarm__biquad__casd__df1__inst__q15.html">arm_biquad_casd_df1_inst_q15</a> *S, uint8_t numStages, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState, int8_t postShift)</td></tr>
+<tr class="memdesc:ga1115256c79a0e22a3a54f8e627ac256f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q15 Biquad cascade filter.  <a href="group__BiquadCascadeDF1.html#ga1115256c79a0e22a3a54f8e627ac256f">More...</a><br/></td></tr>
+<tr class="separator:ga1115256c79a0e22a3a54f8e627ac256f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5008df017b9ce4046f35b61482009cbc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#ga5008df017b9ce4046f35b61482009cbc">arm_biquad_cascade_df1_fast_q15</a> (const <a class="el" href="structarm__biquad__casd__df1__inst__q15.html">arm_biquad_casd_df1_inst_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga5008df017b9ce4046f35b61482009cbc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.  <a href="group__BiquadCascadeDF1.html#ga5008df017b9ce4046f35b61482009cbc">More...</a><br/></td></tr>
+<tr class="separator:ga5008df017b9ce4046f35b61482009cbc"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4e7dad0ee6949005909fd4fcf1249b79"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#ga4e7dad0ee6949005909fd4fcf1249b79">arm_biquad_cascade_df1_q31</a> (const <a class="el" href="structarm__biquad__casd__df1__inst__q31.html">arm_biquad_casd_df1_inst_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga4e7dad0ee6949005909fd4fcf1249b79"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 Biquad cascade filter.  <a href="group__BiquadCascadeDF1.html#ga4e7dad0ee6949005909fd4fcf1249b79">More...</a><br/></td></tr>
+<tr class="separator:ga4e7dad0ee6949005909fd4fcf1249b79"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa09ea758c0b24eed9ef92b8d1e5c80c2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#gaa09ea758c0b24eed9ef92b8d1e5c80c2">arm_biquad_cascade_df1_fast_q31</a> (const <a class="el" href="structarm__biquad__casd__df1__inst__q31.html">arm_biquad_casd_df1_inst_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaa09ea758c0b24eed9ef92b8d1e5c80c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.  <a href="group__BiquadCascadeDF1.html#gaa09ea758c0b24eed9ef92b8d1e5c80c2">More...</a><br/></td></tr>
+<tr class="separator:gaa09ea758c0b24eed9ef92b8d1e5c80c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5563b156af44d1be2a7548626988bf4e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#ga5563b156af44d1be2a7548626988bf4e">arm_biquad_cascade_df1_init_q31</a> (<a class="el" href="structarm__biquad__casd__df1__inst__q31.html">arm_biquad_casd_df1_inst_q31</a> *S, uint8_t numStages, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState, int8_t postShift)</td></tr>
+<tr class="memdesc:ga5563b156af44d1be2a7548626988bf4e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 Biquad cascade filter.  <a href="group__BiquadCascadeDF1.html#ga5563b156af44d1be2a7548626988bf4e">More...</a><br/></td></tr>
+<tr class="separator:ga5563b156af44d1be2a7548626988bf4e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga812eb9769adde4fed6d5ff4968a011d3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#ga812eb9769adde4fed6d5ff4968a011d3">arm_biquad_cascade_df1_f32</a> (const <a class="el" href="structarm__biquad__casd__df1__inst__f32.html">arm_biquad_casd_df1_inst_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga812eb9769adde4fed6d5ff4968a011d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point Biquad cascade filter.  <a href="group__BiquadCascadeDF1.html#ga812eb9769adde4fed6d5ff4968a011d3">More...</a><br/></td></tr>
+<tr class="separator:ga812eb9769adde4fed6d5ff4968a011d3"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad0b680d1c529d941e939d265b3c6ae59"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#gad0b680d1c529d941e939d265b3c6ae59">arm_biquad_cascade_df1_init_f32</a> (<a class="el" href="structarm__biquad__casd__df1__inst__f32.html">arm_biquad_casd_df1_inst_f32</a> *S, uint8_t numStages, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState)</td></tr>
+<tr class="memdesc:gad0b680d1c529d941e939d265b3c6ae59"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point Biquad cascade filter.  <a href="group__BiquadCascadeDF1.html#gad0b680d1c529d941e939d265b3c6ae59">More...</a><br/></td></tr>
+<tr class="separator:gad0b680d1c529d941e939d265b3c6ae59"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga04bbf64a5f9c9e57dd1efb26a768aba1"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MatrixAdd.html#ga04bbf64a5f9c9e57dd1efb26a768aba1">arm_mat_add_f32</a> (const <a class="el" href="structarm__matrix__instance__f32.html">arm_matrix_instance_f32</a> *pSrcA, const <a class="el" href="structarm__matrix__instance__f32.html">arm_matrix_instance_f32</a> *pSrcB, <a class="el" href="structarm__matrix__instance__f32.html">arm_matrix_instance_f32</a> *pDst)</td></tr>
 <tr class="memdesc:ga04bbf64a5f9c9e57dd1efb26a768aba1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point matrix addition.  <a href="group__MatrixAdd.html#ga04bbf64a5f9c9e57dd1efb26a768aba1">More...</a><br/></td></tr>
 <tr class="separator:ga04bbf64a5f9c9e57dd1efb26a768aba1"><td class="memSeparator" colspan="2">&#160;</td></tr>
@@ -628,18 +622,18 @@
 <tr class="memitem:ga408566dacb4fa6e0458b2c75672e525f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PID.html#ga408566dacb4fa6e0458b2c75672e525f">arm_pid_reset_q15</a> (<a class="el" href="structarm__pid__instance__q15.html">arm_pid_instance_q15</a> *S)</td></tr>
 <tr class="memdesc:ga408566dacb4fa6e0458b2c75672e525f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reset function for the Q15 PID Control.  <a href="group__PID.html#ga408566dacb4fa6e0458b2c75672e525f">More...</a><br/></td></tr>
 <tr class="separator:ga408566dacb4fa6e0458b2c75672e525f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga16677275ed83ff0878da531e875c27ef"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicMult.html#ga16677275ed83ff0878da531e875c27ef">arm_mult_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga16677275ed83ff0878da531e875c27ef"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector multiplication.  <a href="group__BasicMult.html#ga16677275ed83ff0878da531e875c27ef">More...</a><br/></td></tr>
-<tr class="separator:ga16677275ed83ff0878da531e875c27ef"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gafb0778d27ed98a2a6f2ecb7d48cc8c75"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicMult.html#gafb0778d27ed98a2a6f2ecb7d48cc8c75">arm_mult_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gafb0778d27ed98a2a6f2ecb7d48cc8c75"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 vector multiplication.  <a href="group__BasicMult.html#gafb0778d27ed98a2a6f2ecb7d48cc8c75">More...</a><br/></td></tr>
-<tr class="separator:gafb0778d27ed98a2a6f2ecb7d48cc8c75"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga3528c0f54a0607acc603f0490d3ca6c6"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicMult.html#ga3528c0f54a0607acc603f0490d3ca6c6">arm_mult_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga3528c0f54a0607acc603f0490d3ca6c6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector multiplication.  <a href="group__BasicMult.html#ga3528c0f54a0607acc603f0490d3ca6c6">More...</a><br/></td></tr>
-<tr class="separator:ga3528c0f54a0607acc603f0490d3ca6c6"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaca3f0b8227da431ab29225b88888aa32"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicMult.html#gaca3f0b8227da431ab29225b88888aa32">arm_mult_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaca3f0b8227da431ab29225b88888aa32"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point vector multiplication.  <a href="group__BasicMult.html#gaca3f0b8227da431ab29225b88888aa32">More...</a><br/></td></tr>
-<tr class="separator:gaca3f0b8227da431ab29225b88888aa32"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga7b852d225dd7e91f19107fdcea38a3cb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicMult.html#ga7b852d225dd7e91f19107fdcea38a3cb">arm_mult_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga7b852d225dd7e91f19107fdcea38a3cb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector multiplication.  <a href="group__BasicMult.html#ga7b852d225dd7e91f19107fdcea38a3cb">More...</a><br/></td></tr>
+<tr class="separator:ga7b852d225dd7e91f19107fdcea38a3cb"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaeeda8cdc2c7e79c8a26e905342a0bb17"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicMult.html#gaeeda8cdc2c7e79c8a26e905342a0bb17">arm_mult_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaeeda8cdc2c7e79c8a26e905342a0bb17"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 vector multiplication.  <a href="group__BasicMult.html#gaeeda8cdc2c7e79c8a26e905342a0bb17">More...</a><br/></td></tr>
+<tr class="separator:gaeeda8cdc2c7e79c8a26e905342a0bb17"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf12c75306edf16759bdedd849984324e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicMult.html#gaf12c75306edf16759bdedd849984324e">arm_mult_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaf12c75306edf16759bdedd849984324e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector multiplication.  <a href="group__BasicMult.html#gaf12c75306edf16759bdedd849984324e">More...</a><br/></td></tr>
+<tr class="separator:gaf12c75306edf16759bdedd849984324e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gacf950935141cad927bea886e88fd9e9b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicMult.html#gacf950935141cad927bea886e88fd9e9b">arm_mult_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gacf950935141cad927bea886e88fd9e9b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point vector multiplication.  <a href="group__BasicMult.html#gacf950935141cad927bea886e88fd9e9b">More...</a><br/></td></tr>
+<tr class="separator:gacf950935141cad927bea886e88fd9e9b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga5c5b2127b3c4ea2d03692127f8543858"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ComplexFFT.html#ga5c5b2127b3c4ea2d03692127f8543858">arm_cfft_radix2_init_q15</a> (<a class="el" href="structarm__cfft__radix2__instance__q15.html">arm_cfft_radix2_instance_q15</a> *S, uint16_t fftLen, uint8_t <a class="el" href="arm__fft__bin__example__f32_8c.html#a379ccb99013d369a41b49619083c16ef">ifftFlag</a>, uint8_t bitReverseFlag)</td></tr>
 <tr class="memdesc:ga5c5b2127b3c4ea2d03692127f8543858"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q15 CFFT/CIFFT.  <a href="group__ComplexFFT.html#ga5c5b2127b3c4ea2d03692127f8543858">More...</a><br/></td></tr>
 <tr class="separator:ga5c5b2127b3c4ea2d03692127f8543858"><td class="memSeparator" colspan="2">&#160;</td></tr>
@@ -677,10 +671,10 @@
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 <tr class="separator:ga521f670cd9c571bc61aff9bec89f4c26"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga68cdacd2267a2967955e40e6b7ec1229"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15</a> (const <a class="el" href="structarm__cfft__instance__q15.html">arm_cfft_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *p1, uint8_t <a class="el" href="arm__fft__bin__example__f32_8c.html#a379ccb99013d369a41b49619083c16ef">ifftFlag</a>, uint8_t bitReverseFlag)</td></tr>
-<tr class="memdesc:ga68cdacd2267a2967955e40e6b7ec1229"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 complex FFT.  <a href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">More...</a><br/></td></tr>
+<tr class="memdesc:ga68cdacd2267a2967955e40e6b7ec1229"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q15 complex FFT.  <a href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">More...</a><br/></td></tr>
 <tr class="separator:ga68cdacd2267a2967955e40e6b7ec1229"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga5a0008bd997ab6e2e299ef2fb272fb4b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31</a> (const <a class="el" href="structarm__cfft__instance__q31.html">arm_cfft_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *p1, uint8_t <a class="el" href="arm__fft__bin__example__f32_8c.html#a379ccb99013d369a41b49619083c16ef">ifftFlag</a>, uint8_t bitReverseFlag)</td></tr>
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+<tr class="memdesc:ga5a0008bd997ab6e2e299ef2fb272fb4b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 complex FFT.  <a href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">More...</a><br/></td></tr>
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 <tr class="memitem:gade0f9c4ff157b6b9c72a1eafd86ebf80"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80">arm_cfft_f32</a> (const <a class="el" href="structarm__cfft__instance__f32.html">arm_cfft_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *p1, uint8_t <a class="el" href="arm__fft__bin__example__f32_8c.html#a379ccb99013d369a41b49619083c16ef">ifftFlag</a>, uint8_t bitReverseFlag)</td></tr>
 <tr class="memdesc:gade0f9c4ff157b6b9c72a1eafd86ebf80"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point complex FFT.  <a href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80">More...</a><br/></td></tr>
@@ -698,6 +692,7 @@
 <tr class="memdesc:gabaeab5646aeea9844e6d42ca8c73fe3a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 RFFT/RIFFT.  <a href="group__RealFFT.html#gabaeab5646aeea9844e6d42ca8c73fe3a">More...</a><br/></td></tr>
 <tr class="separator:gabaeab5646aeea9844e6d42ca8c73fe3a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga10717ee326bf50832ef1c25b85a23068"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#ga10717ee326bf50832ef1c25b85a23068">arm_rfft_init_f32</a> (<a class="el" href="structarm__rfft__instance__f32.html">arm_rfft_instance_f32</a> *S, <a class="el" href="structarm__cfft__radix4__instance__f32.html">arm_cfft_radix4_instance_f32</a> *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)</td></tr>
+<tr class="memdesc:ga10717ee326bf50832ef1c25b85a23068"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point RFFT/RIFFT.  <a href="group__RealFFT.html#ga10717ee326bf50832ef1c25b85a23068">More...</a><br/></td></tr>
 <tr class="separator:ga10717ee326bf50832ef1c25b85a23068"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga3df1766d230532bc068fc4ed69d0fcdc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32</a> (const <a class="el" href="structarm__rfft__instance__f32.html">arm_rfft_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst)</td></tr>
 <tr class="memdesc:ga3df1766d230532bc068fc4ed69d0fcdc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point RFFT/RIFFT.  <a href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">More...</a><br/></td></tr>
@@ -705,6 +700,30 @@
 <tr class="memitem:gac5fceb172551e7c11eb4d0e17ef15aa3"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32</a> (<a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S, uint16_t fftLen)</td></tr>
 <tr class="memdesc:gac5fceb172551e7c11eb4d0e17ef15aa3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point real FFT.  <a href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">More...</a><br/></td></tr>
 <tr class="separator:gac5fceb172551e7c11eb4d0e17ef15aa3"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga153c8faa97b7ab8b1aef75fe6ac1b3a2"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#ga153c8faa97b7ab8b1aef75fe6ac1b3a2">arm_rfft_32_fast_init_f32</a> (<a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S)</td></tr>
+<tr class="memdesc:ga153c8faa97b7ab8b1aef75fe6ac1b3a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the 32pt floating-point real FFT.  <a href="group__RealFFT.html#ga153c8faa97b7ab8b1aef75fe6ac1b3a2">More...</a><br/></td></tr>
+<tr class="separator:ga153c8faa97b7ab8b1aef75fe6ac1b3a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memdesc:ga0f67de6a0e5d87011f35426112d2d91b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the 64pt floating-point real FFT.  <a href="group__RealFFT.html#ga0f67de6a0e5d87011f35426112d2d91b">More...</a><br/></td></tr>
+<tr class="separator:ga0f67de6a0e5d87011f35426112d2d91b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gade8432f9318953234761e8e0f2c9e1d2"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#gade8432f9318953234761e8e0f2c9e1d2">arm_rfft_128_fast_init_f32</a> (<a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S)</td></tr>
+<tr class="memdesc:gade8432f9318953234761e8e0f2c9e1d2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the 128pt floating-point real FFT.  <a href="group__RealFFT.html#gade8432f9318953234761e8e0f2c9e1d2">More...</a><br/></td></tr>
+<tr class="separator:gade8432f9318953234761e8e0f2c9e1d2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga678afbb042d942c3dd5a33877ef66492"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#ga678afbb042d942c3dd5a33877ef66492">arm_rfft_256_fast_init_f32</a> (<a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S)</td></tr>
+<tr class="memdesc:ga678afbb042d942c3dd5a33877ef66492"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the 256pt floating-point real FFT.  <a href="group__RealFFT.html#ga678afbb042d942c3dd5a33877ef66492">More...</a><br/></td></tr>
+<tr class="separator:ga678afbb042d942c3dd5a33877ef66492"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9a0e72918318f9d1c03973eab379e580"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#ga9a0e72918318f9d1c03973eab379e580">arm_rfft_512_fast_init_f32</a> (<a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S)</td></tr>
+<tr class="memdesc:ga9a0e72918318f9d1c03973eab379e580"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the 512pt floating-point real FFT.  <a href="group__RealFFT.html#ga9a0e72918318f9d1c03973eab379e580">More...</a><br/></td></tr>
+<tr class="separator:ga9a0e72918318f9d1c03973eab379e580"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga71547c601079d55c2525204aa00ef9c2"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#ga71547c601079d55c2525204aa00ef9c2">arm_rfft_1024_fast_init_f32</a> (<a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S)</td></tr>
+<tr class="memdesc:ga71547c601079d55c2525204aa00ef9c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the 1024pt floating-point real FFT.  <a href="group__RealFFT.html#ga71547c601079d55c2525204aa00ef9c2">More...</a><br/></td></tr>
+<tr class="separator:ga71547c601079d55c2525204aa00ef9c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga33724310a8360ac289d5a835282f778c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#ga33724310a8360ac289d5a835282f778c">arm_rfft_2048_fast_init_f32</a> (<a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S)</td></tr>
+<tr class="memdesc:ga33724310a8360ac289d5a835282f778c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the 2048pt floating-point real FFT.  <a href="group__RealFFT.html#ga33724310a8360ac289d5a835282f778c">More...</a><br/></td></tr>
+<tr class="separator:ga33724310a8360ac289d5a835282f778c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaad50a08bb8191e1a138b5f72a268727a"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#gaad50a08bb8191e1a138b5f72a268727a">arm_rfft_4096_fast_init_f32</a> (<a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S)</td></tr>
+<tr class="memdesc:gaad50a08bb8191e1a138b5f72a268727a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the 4096pt floating-point real FFT.  <a href="group__RealFFT.html#gaad50a08bb8191e1a138b5f72a268727a">More...</a><br/></td></tr>
+<tr class="separator:gaad50a08bb8191e1a138b5f72a268727a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga180d8b764d59cbb85d37a2d5f7cd9799"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#ga180d8b764d59cbb85d37a2d5f7cd9799">arm_rfft_fast_f32</a> (<a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *p, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pOut, uint8_t <a class="el" href="arm__fft__bin__example__f32_8c.html#a379ccb99013d369a41b49619083c16ef">ifftFlag</a>)</td></tr>
 <tr class="memdesc:ga180d8b764d59cbb85d37a2d5f7cd9799"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point real FFT.  <a href="group__RealFFT.html#ga180d8b764d59cbb85d37a2d5f7cd9799">More...</a><br/></td></tr>
 <tr class="separator:ga180d8b764d59cbb85d37a2d5f7cd9799"><td class="memSeparator" colspan="2">&#160;</td></tr>
@@ -726,111 +745,111 @@
 <tr class="memitem:ga114cb9635059f678df291fcc887aaf2b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4.html#ga114cb9635059f678df291fcc887aaf2b">arm_dct4_q15</a> (const <a class="el" href="structarm__dct4__instance__q15.html">arm_dct4_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pInlineBuffer)</td></tr>
 <tr class="memdesc:ga114cb9635059f678df291fcc887aaf2b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 DCT4/IDCT4.  <a href="group__DCT4__IDCT4.html#ga114cb9635059f678df291fcc887aaf2b">More...</a><br/></td></tr>
 <tr class="separator:ga114cb9635059f678df291fcc887aaf2b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga6a904a547413b10565dd1d251c6bafbd"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAdd.html#ga6a904a547413b10565dd1d251c6bafbd">arm_add_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga6a904a547413b10565dd1d251c6bafbd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point vector addition.  <a href="group__BasicAdd.html#ga6a904a547413b10565dd1d251c6bafbd">More...</a><br/></td></tr>
-<tr class="separator:ga6a904a547413b10565dd1d251c6bafbd"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaed633f415a7840a66861debca2dfb96b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAdd.html#gaed633f415a7840a66861debca2dfb96b">arm_add_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaed633f415a7840a66861debca2dfb96b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector addition.  <a href="group__BasicAdd.html#gaed633f415a7840a66861debca2dfb96b">More...</a><br/></td></tr>
-<tr class="separator:gaed633f415a7840a66861debca2dfb96b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gabb51285a41f511670bbff62fc0e1bf62"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAdd.html#gabb51285a41f511670bbff62fc0e1bf62">arm_add_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gabb51285a41f511670bbff62fc0e1bf62"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 vector addition.  <a href="group__BasicAdd.html#gabb51285a41f511670bbff62fc0e1bf62">More...</a><br/></td></tr>
-<tr class="separator:gabb51285a41f511670bbff62fc0e1bf62"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga24d6c3f7f8b9fae4847c0c3f26a39a3b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAdd.html#ga24d6c3f7f8b9fae4847c0c3f26a39a3b">arm_add_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga24d6c3f7f8b9fae4847c0c3f26a39a3b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector addition.  <a href="group__BasicAdd.html#ga24d6c3f7f8b9fae4847c0c3f26a39a3b">More...</a><br/></td></tr>
-<tr class="separator:ga24d6c3f7f8b9fae4847c0c3f26a39a3b"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:ga7f975a472de286331134227c08aad826"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point vector subtraction.  <a href="group__BasicSub.html#ga7f975a472de286331134227c08aad826">More...</a><br/></td></tr>
-<tr class="separator:ga7f975a472de286331134227c08aad826"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab09941de7dfeb247e5c29b406a435fcc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicSub.html#gab09941de7dfeb247e5c29b406a435fcc">arm_sub_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gab09941de7dfeb247e5c29b406a435fcc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector subtraction.  <a href="group__BasicSub.html#gab09941de7dfeb247e5c29b406a435fcc">More...</a><br/></td></tr>
-<tr class="separator:gab09941de7dfeb247e5c29b406a435fcc"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga997a8ee93088d15bda23c325d455b588"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicSub.html#ga997a8ee93088d15bda23c325d455b588">arm_sub_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga997a8ee93088d15bda23c325d455b588"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 vector subtraction.  <a href="group__BasicSub.html#ga997a8ee93088d15bda23c325d455b588">More...</a><br/></td></tr>
-<tr class="separator:ga997a8ee93088d15bda23c325d455b588"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga28aa6908d092752144413e21933dc878"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicSub.html#ga28aa6908d092752144413e21933dc878">arm_sub_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga28aa6908d092752144413e21933dc878"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector subtraction.  <a href="group__BasicSub.html#ga28aa6908d092752144413e21933dc878">More...</a><br/></td></tr>
-<tr class="separator:ga28aa6908d092752144413e21933dc878"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga3487af88b112f682ee90589cd419e123"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__scale.html#ga3487af88b112f682ee90589cd419e123">arm_scale_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> scale, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga3487af88b112f682ee90589cd419e123"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a floating-point vector by a scalar.  <a href="group__scale.html#ga3487af88b112f682ee90589cd419e123">More...</a><br/></td></tr>
-<tr class="separator:ga3487af88b112f682ee90589cd419e123"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gabc9fd3d37904c58df56492b351d21fb0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__scale.html#gabc9fd3d37904c58df56492b351d21fb0">arm_scale_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> scaleFract, int8_t shift, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gabc9fd3d37904c58df56492b351d21fb0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a Q7 vector by a scalar.  <a href="group__scale.html#gabc9fd3d37904c58df56492b351d21fb0">More...</a><br/></td></tr>
-<tr class="separator:gabc9fd3d37904c58df56492b351d21fb0"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gafaac0e1927daffeb68a42719b53ea780"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__scale.html#gafaac0e1927daffeb68a42719b53ea780">arm_scale_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> scaleFract, int8_t shift, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gafaac0e1927daffeb68a42719b53ea780"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a Q15 vector by a scalar.  <a href="group__scale.html#gafaac0e1927daffeb68a42719b53ea780">More...</a><br/></td></tr>
-<tr class="separator:gafaac0e1927daffeb68a42719b53ea780"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga83e36cd82bf51ce35406a199e477d47c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__scale.html#ga83e36cd82bf51ce35406a199e477d47c">arm_scale_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> scaleFract, int8_t shift, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga83e36cd82bf51ce35406a199e477d47c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a Q31 vector by a scalar.  <a href="group__scale.html#ga83e36cd82bf51ce35406a199e477d47c">More...</a><br/></td></tr>
-<tr class="separator:ga83e36cd82bf51ce35406a199e477d47c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gadc30985e33fbf96802a5a7954dece3b1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAbs.html#gadc30985e33fbf96802a5a7954dece3b1">arm_abs_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gadc30985e33fbf96802a5a7954dece3b1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector absolute value.  <a href="group__BasicAbs.html#gadc30985e33fbf96802a5a7954dece3b1">More...</a><br/></td></tr>
-<tr class="separator:gadc30985e33fbf96802a5a7954dece3b1"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga421b6275f9d35f50286c0ff3beceff02"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAbs.html#ga421b6275f9d35f50286c0ff3beceff02">arm_abs_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga421b6275f9d35f50286c0ff3beceff02"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point vector absolute value.  <a href="group__BasicAbs.html#ga421b6275f9d35f50286c0ff3beceff02">More...</a><br/></td></tr>
-<tr class="separator:ga421b6275f9d35f50286c0ff3beceff02"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga39f92964c9b649ba252e26ebe7b95594"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAbs.html#ga39f92964c9b649ba252e26ebe7b95594">arm_abs_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga39f92964c9b649ba252e26ebe7b95594"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 vector absolute value.  <a href="group__BasicAbs.html#ga39f92964c9b649ba252e26ebe7b95594">More...</a><br/></td></tr>
-<tr class="separator:ga39f92964c9b649ba252e26ebe7b95594"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga59eafcdcdb52da60d37f20aec6ff4577"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAbs.html#ga59eafcdcdb52da60d37f20aec6ff4577">arm_abs_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga59eafcdcdb52da60d37f20aec6ff4577"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector absolute value.  <a href="group__BasicAbs.html#ga59eafcdcdb52da60d37f20aec6ff4577">More...</a><br/></td></tr>
-<tr class="separator:ga59eafcdcdb52da60d37f20aec6ff4577"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga55418d4362f6ba84c327f9b4f089a8c3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dot__prod.html#ga55418d4362f6ba84c327f9b4f089a8c3">arm_dot_prod_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *result)</td></tr>
-<tr class="memdesc:ga55418d4362f6ba84c327f9b4f089a8c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of floating-point vectors.  <a href="group__dot__prod.html#ga55418d4362f6ba84c327f9b4f089a8c3">More...</a><br/></td></tr>
-<tr class="separator:ga55418d4362f6ba84c327f9b4f089a8c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga9c3293a50ac7ec8ba928bf8e3aaea6c1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dot__prod.html#ga9c3293a50ac7ec8ba928bf8e3aaea6c1">arm_dot_prod_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *result)</td></tr>
-<tr class="memdesc:ga9c3293a50ac7ec8ba928bf8e3aaea6c1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of Q7 vectors.  <a href="group__dot__prod.html#ga9c3293a50ac7ec8ba928bf8e3aaea6c1">More...</a><br/></td></tr>
-<tr class="separator:ga9c3293a50ac7ec8ba928bf8e3aaea6c1"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga436d5bed28a4b73b24acbde436a3044b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dot__prod.html#ga436d5bed28a4b73b24acbde436a3044b">arm_dot_prod_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *result)</td></tr>
-<tr class="memdesc:ga436d5bed28a4b73b24acbde436a3044b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of Q15 vectors.  <a href="group__dot__prod.html#ga436d5bed28a4b73b24acbde436a3044b">More...</a><br/></td></tr>
-<tr class="separator:ga436d5bed28a4b73b24acbde436a3044b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab15d8fa060fc85b4d948d091b7deaa11"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dot__prod.html#gab15d8fa060fc85b4d948d091b7deaa11">arm_dot_prod_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *result)</td></tr>
-<tr class="memdesc:gab15d8fa060fc85b4d948d091b7deaa11"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of Q31 vectors.  <a href="group__dot__prod.html#gab15d8fa060fc85b4d948d091b7deaa11">More...</a><br/></td></tr>
-<tr class="separator:gab15d8fa060fc85b4d948d091b7deaa11"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga47295d08a685f7de700a48dafb4db6fb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__shift.html#ga47295d08a685f7de700a48dafb4db6fb">arm_shift_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, int8_t shiftBits, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga47295d08a685f7de700a48dafb4db6fb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shifts the elements of a Q7 vector a specified number of bits.  <a href="group__shift.html#ga47295d08a685f7de700a48dafb4db6fb">More...</a><br/></td></tr>
-<tr class="separator:ga47295d08a685f7de700a48dafb4db6fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaa1757e53279780107acc92cf100adb61"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__shift.html#gaa1757e53279780107acc92cf100adb61">arm_shift_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, int8_t shiftBits, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaa1757e53279780107acc92cf100adb61"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shifts the elements of a Q15 vector a specified number of bits.  <a href="group__shift.html#gaa1757e53279780107acc92cf100adb61">More...</a><br/></td></tr>
-<tr class="separator:gaa1757e53279780107acc92cf100adb61"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga387dd8b7b87377378280978f16cdb13d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__shift.html#ga387dd8b7b87377378280978f16cdb13d">arm_shift_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, int8_t shiftBits, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga387dd8b7b87377378280978f16cdb13d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shifts the elements of a Q31 vector a specified number of bits.  <a href="group__shift.html#ga387dd8b7b87377378280978f16cdb13d">More...</a><br/></td></tr>
-<tr class="separator:ga387dd8b7b87377378280978f16cdb13d"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga989dfae15235799d82f62ef9d356abb4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__offset.html#ga989dfae15235799d82f62ef9d356abb4">arm_offset_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> offset, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga989dfae15235799d82f62ef9d356abb4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a floating-point vector.  <a href="group__offset.html#ga989dfae15235799d82f62ef9d356abb4">More...</a><br/></td></tr>
-<tr class="separator:ga989dfae15235799d82f62ef9d356abb4"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga00bd9cc17c5bf905e76c91ad50886393"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__offset.html#ga00bd9cc17c5bf905e76c91ad50886393">arm_offset_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> offset, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga00bd9cc17c5bf905e76c91ad50886393"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a Q7 vector.  <a href="group__offset.html#ga00bd9cc17c5bf905e76c91ad50886393">More...</a><br/></td></tr>
-<tr class="separator:ga00bd9cc17c5bf905e76c91ad50886393"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab4c1d2391b599549e5a06fdfbc2747bf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__offset.html#gab4c1d2391b599549e5a06fdfbc2747bf">arm_offset_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> offset, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gab4c1d2391b599549e5a06fdfbc2747bf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a Q15 vector.  <a href="group__offset.html#gab4c1d2391b599549e5a06fdfbc2747bf">More...</a><br/></td></tr>
-<tr class="separator:gab4c1d2391b599549e5a06fdfbc2747bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac84ec42cbbebc5c197a87d0221819acf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__offset.html#gac84ec42cbbebc5c197a87d0221819acf">arm_offset_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> offset, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gac84ec42cbbebc5c197a87d0221819acf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a Q31 vector.  <a href="group__offset.html#gac84ec42cbbebc5c197a87d0221819acf">More...</a><br/></td></tr>
-<tr class="separator:gac84ec42cbbebc5c197a87d0221819acf"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga2e169c4de6cc6e3ba4be9473531e6657"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__negate.html#ga2e169c4de6cc6e3ba4be9473531e6657">arm_negate_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga2e169c4de6cc6e3ba4be9473531e6657"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a floating-point vector.  <a href="group__negate.html#ga2e169c4de6cc6e3ba4be9473531e6657">More...</a><br/></td></tr>
-<tr class="separator:ga2e169c4de6cc6e3ba4be9473531e6657"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaae78fc079a43bdaa3055f9b32e2a1f4c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__negate.html#gaae78fc079a43bdaa3055f9b32e2a1f4c">arm_negate_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaae78fc079a43bdaa3055f9b32e2a1f4c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a Q7 vector.  <a href="group__negate.html#gaae78fc079a43bdaa3055f9b32e2a1f4c">More...</a><br/></td></tr>
-<tr class="separator:gaae78fc079a43bdaa3055f9b32e2a1f4c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga0239a833d72cf00290b9723c394e5042"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__negate.html#ga0239a833d72cf00290b9723c394e5042">arm_negate_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga0239a833d72cf00290b9723c394e5042"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a Q15 vector.  <a href="group__negate.html#ga0239a833d72cf00290b9723c394e5042">More...</a><br/></td></tr>
-<tr class="separator:ga0239a833d72cf00290b9723c394e5042"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga2784c6887686a73dc7c364e2e41c776c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__negate.html#ga2784c6887686a73dc7c364e2e41c776c">arm_negate_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga2784c6887686a73dc7c364e2e41c776c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a Q31 vector.  <a href="group__negate.html#ga2784c6887686a73dc7c364e2e41c776c">More...</a><br/></td></tr>
-<tr class="separator:ga2784c6887686a73dc7c364e2e41c776c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gadd1f737e677e0e6ca31767c7001417b3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#gadd1f737e677e0e6ca31767c7001417b3">arm_copy_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gadd1f737e677e0e6ca31767c7001417b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a floating-point vector.  <a href="group__copy.html#gadd1f737e677e0e6ca31767c7001417b3">More...</a><br/></td></tr>
-<tr class="separator:gadd1f737e677e0e6ca31767c7001417b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga467579beda492aa92797529d794c88fb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#ga467579beda492aa92797529d794c88fb">arm_copy_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga467579beda492aa92797529d794c88fb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a Q7 vector.  <a href="group__copy.html#ga467579beda492aa92797529d794c88fb">More...</a><br/></td></tr>
-<tr class="separator:ga467579beda492aa92797529d794c88fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga872ca4cfc18c680b8991ccd569a5fda0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#ga872ca4cfc18c680b8991ccd569a5fda0">arm_copy_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga872ca4cfc18c680b8991ccd569a5fda0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a Q15 vector.  <a href="group__copy.html#ga872ca4cfc18c680b8991ccd569a5fda0">More...</a><br/></td></tr>
-<tr class="separator:ga872ca4cfc18c680b8991ccd569a5fda0"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaddf70be7e3f87e535c324862b501f3f9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#gaddf70be7e3f87e535c324862b501f3f9">arm_copy_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaddf70be7e3f87e535c324862b501f3f9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a Q31 vector.  <a href="group__copy.html#gaddf70be7e3f87e535c324862b501f3f9">More...</a><br/></td></tr>
-<tr class="separator:gaddf70be7e3f87e535c324862b501f3f9"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gabfef1e86e458314a61f4baa441d9765e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAdd.html#gabfef1e86e458314a61f4baa441d9765e">arm_add_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gabfef1e86e458314a61f4baa441d9765e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point vector addition.  <a href="group__BasicAdd.html#gabfef1e86e458314a61f4baa441d9765e">More...</a><br/></td></tr>
+<tr class="separator:gabfef1e86e458314a61f4baa441d9765e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafaecefa2be70b02118c8a317e183f247"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAdd.html#gafaecefa2be70b02118c8a317e183f247">arm_add_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gafaecefa2be70b02118c8a317e183f247"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector addition.  <a href="group__BasicAdd.html#gafaecefa2be70b02118c8a317e183f247">More...</a><br/></td></tr>
+<tr class="separator:gafaecefa2be70b02118c8a317e183f247"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gacea7c052f62fdd71c8f1a14f0495cbed"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAdd.html#gacea7c052f62fdd71c8f1a14f0495cbed">arm_add_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gacea7c052f62fdd71c8f1a14f0495cbed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 vector addition.  <a href="group__BasicAdd.html#gacea7c052f62fdd71c8f1a14f0495cbed">More...</a><br/></td></tr>
+<tr class="separator:gacea7c052f62fdd71c8f1a14f0495cbed"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga63e5862d90971bff4181b22bfa6ac753"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAdd.html#ga63e5862d90971bff4181b22bfa6ac753">arm_add_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga63e5862d90971bff4181b22bfa6ac753"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector addition.  <a href="group__BasicAdd.html#ga63e5862d90971bff4181b22bfa6ac753">More...</a><br/></td></tr>
+<tr class="separator:ga63e5862d90971bff4181b22bfa6ac753"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga76b8b2aec34269c6de0b090cab00fb33"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicSub.html#ga76b8b2aec34269c6de0b090cab00fb33">arm_sub_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga76b8b2aec34269c6de0b090cab00fb33"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point vector subtraction.  <a href="group__BasicSub.html#ga76b8b2aec34269c6de0b090cab00fb33">More...</a><br/></td></tr>
+<tr class="separator:ga76b8b2aec34269c6de0b090cab00fb33"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga162990b82a18231c4e606ba0e6584c7e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicSub.html#ga162990b82a18231c4e606ba0e6584c7e">arm_sub_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga162990b82a18231c4e606ba0e6584c7e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector subtraction.  <a href="group__BasicSub.html#ga162990b82a18231c4e606ba0e6584c7e">More...</a><br/></td></tr>
+<tr class="separator:ga162990b82a18231c4e606ba0e6584c7e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga33a096c2860eca18bbc4e6966409064f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicSub.html#ga33a096c2860eca18bbc4e6966409064f">arm_sub_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga33a096c2860eca18bbc4e6966409064f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 vector subtraction.  <a href="group__BasicSub.html#ga33a096c2860eca18bbc4e6966409064f">More...</a><br/></td></tr>
+<tr class="separator:ga33a096c2860eca18bbc4e6966409064f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga913159f71589b56dbfb03ddc1210a59c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicSub.html#ga913159f71589b56dbfb03ddc1210a59c">arm_sub_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga913159f71589b56dbfb03ddc1210a59c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector subtraction.  <a href="group__BasicSub.html#ga913159f71589b56dbfb03ddc1210a59c">More...</a><br/></td></tr>
+<tr class="separator:ga913159f71589b56dbfb03ddc1210a59c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5e769c8e22da173674c6abca7291e713"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicScale.html#ga5e769c8e22da173674c6abca7291e713">arm_scale_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> scale, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga5e769c8e22da173674c6abca7291e713"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a floating-point vector by a scalar.  <a href="group__BasicScale.html#ga5e769c8e22da173674c6abca7291e713">More...</a><br/></td></tr>
+<tr class="separator:ga5e769c8e22da173674c6abca7291e713"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0d135086c6b813251b47a0d127b75eb8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicScale.html#ga0d135086c6b813251b47a0d127b75eb8">arm_scale_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> scaleFract, int8_t shift, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga0d135086c6b813251b47a0d127b75eb8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a Q7 vector by a scalar.  <a href="group__BasicScale.html#ga0d135086c6b813251b47a0d127b75eb8">More...</a><br/></td></tr>
+<tr class="separator:ga0d135086c6b813251b47a0d127b75eb8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4663809f04249df5ea186ea09335e687"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicScale.html#ga4663809f04249df5ea186ea09335e687">arm_scale_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> scaleFract, int8_t shift, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga4663809f04249df5ea186ea09335e687"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a Q15 vector by a scalar.  <a href="group__BasicScale.html#ga4663809f04249df5ea186ea09335e687">More...</a><br/></td></tr>
+<tr class="separator:ga4663809f04249df5ea186ea09335e687"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga8b2b6ea2e39ca464e8f2cfdd937c022b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicScale.html#ga8b2b6ea2e39ca464e8f2cfdd937c022b">arm_scale_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> scaleFract, int8_t shift, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga8b2b6ea2e39ca464e8f2cfdd937c022b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a Q31 vector by a scalar.  <a href="group__BasicScale.html#ga8b2b6ea2e39ca464e8f2cfdd937c022b">More...</a><br/></td></tr>
+<tr class="separator:ga8b2b6ea2e39ca464e8f2cfdd937c022b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga097f1938c72471930b4e5647de40c505"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAbs.html#ga097f1938c72471930b4e5647de40c505">arm_abs_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga097f1938c72471930b4e5647de40c505"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector absolute value.  <a href="group__BasicAbs.html#ga097f1938c72471930b4e5647de40c505">More...</a><br/></td></tr>
+<tr class="separator:ga097f1938c72471930b4e5647de40c505"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0e8fc7df3033cdbe9cda8a766a46e6d9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAbs.html#ga0e8fc7df3033cdbe9cda8a766a46e6d9">arm_abs_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga0e8fc7df3033cdbe9cda8a766a46e6d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point vector absolute value.  <a href="group__BasicAbs.html#ga0e8fc7df3033cdbe9cda8a766a46e6d9">More...</a><br/></td></tr>
+<tr class="separator:ga0e8fc7df3033cdbe9cda8a766a46e6d9"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5cd90f9490ba8711c86e6f4bd7154359"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAbs.html#ga5cd90f9490ba8711c86e6f4bd7154359">arm_abs_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga5cd90f9490ba8711c86e6f4bd7154359"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 vector absolute value.  <a href="group__BasicAbs.html#ga5cd90f9490ba8711c86e6f4bd7154359">More...</a><br/></td></tr>
+<tr class="separator:ga5cd90f9490ba8711c86e6f4bd7154359"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga494bd5db5e2686d96f5548e80ba8ca89"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAbs.html#ga494bd5db5e2686d96f5548e80ba8ca89">arm_abs_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga494bd5db5e2686d96f5548e80ba8ca89"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector absolute value.  <a href="group__BasicAbs.html#ga494bd5db5e2686d96f5548e80ba8ca89">More...</a><br/></td></tr>
+<tr class="separator:ga494bd5db5e2686d96f5548e80ba8ca89"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gadf26f6bc62d6416528663ad3e46fbf67"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicDotProd.html#gadf26f6bc62d6416528663ad3e46fbf67">arm_dot_prod_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *result)</td></tr>
+<tr class="memdesc:gadf26f6bc62d6416528663ad3e46fbf67"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of floating-point vectors.  <a href="group__BasicDotProd.html#gadf26f6bc62d6416528663ad3e46fbf67">More...</a><br/></td></tr>
+<tr class="separator:gadf26f6bc62d6416528663ad3e46fbf67"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaadd347d5f5adf902c63f0b90ffc19538"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicDotProd.html#gaadd347d5f5adf902c63f0b90ffc19538">arm_dot_prod_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *result)</td></tr>
+<tr class="memdesc:gaadd347d5f5adf902c63f0b90ffc19538"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of Q7 vectors.  <a href="group__BasicDotProd.html#gaadd347d5f5adf902c63f0b90ffc19538">More...</a><br/></td></tr>
+<tr class="separator:gaadd347d5f5adf902c63f0b90ffc19538"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac2314012fbbf73bfd95ce8c57bc9ba69"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicDotProd.html#gac2314012fbbf73bfd95ce8c57bc9ba69">arm_dot_prod_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *result)</td></tr>
+<tr class="memdesc:gac2314012fbbf73bfd95ce8c57bc9ba69"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of Q15 vectors.  <a href="group__BasicDotProd.html#gac2314012fbbf73bfd95ce8c57bc9ba69">More...</a><br/></td></tr>
+<tr class="separator:gac2314012fbbf73bfd95ce8c57bc9ba69"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafe3f9ace6c4576847eabf44ed7ca7b96"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicDotProd.html#gafe3f9ace6c4576847eabf44ed7ca7b96">arm_dot_prod_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *result)</td></tr>
+<tr class="memdesc:gafe3f9ace6c4576847eabf44ed7ca7b96"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of Q31 vectors.  <a href="group__BasicDotProd.html#gafe3f9ace6c4576847eabf44ed7ca7b96">More...</a><br/></td></tr>
+<tr class="separator:gafe3f9ace6c4576847eabf44ed7ca7b96"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga87bbb3db84f2af6c38f4fc17cbecfd2e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicShift.html#ga87bbb3db84f2af6c38f4fc17cbecfd2e">arm_shift_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, int8_t shiftBits, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga87bbb3db84f2af6c38f4fc17cbecfd2e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shifts the elements of a Q7 vector a specified number of bits.  <a href="group__BasicShift.html#ga87bbb3db84f2af6c38f4fc17cbecfd2e">More...</a><br/></td></tr>
+<tr class="separator:ga87bbb3db84f2af6c38f4fc17cbecfd2e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab7a2f614c2fcee25cb8bae4c2a6bc3ab"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicShift.html#gab7a2f614c2fcee25cb8bae4c2a6bc3ab">arm_shift_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, int8_t shiftBits, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gab7a2f614c2fcee25cb8bae4c2a6bc3ab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shifts the elements of a Q15 vector a specified number of bits.  <a href="group__BasicShift.html#gab7a2f614c2fcee25cb8bae4c2a6bc3ab">More...</a><br/></td></tr>
+<tr class="separator:gab7a2f614c2fcee25cb8bae4c2a6bc3ab"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gabc69335d1cf2eba1c469c8c8291f3589"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicShift.html#gabc69335d1cf2eba1c469c8c8291f3589">arm_shift_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, int8_t shiftBits, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gabc69335d1cf2eba1c469c8c8291f3589"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shifts the elements of a Q31 vector a specified number of bits.  <a href="group__BasicShift.html#gabc69335d1cf2eba1c469c8c8291f3589">More...</a><br/></td></tr>
+<tr class="separator:gabc69335d1cf2eba1c469c8c8291f3589"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4ea8c9e1829e3b4d297f87e4a40478ad"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicOffset.html#ga4ea8c9e1829e3b4d297f87e4a40478ad">arm_offset_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> offset, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga4ea8c9e1829e3b4d297f87e4a40478ad"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a floating-point vector.  <a href="group__BasicOffset.html#ga4ea8c9e1829e3b4d297f87e4a40478ad">More...</a><br/></td></tr>
+<tr class="separator:ga4ea8c9e1829e3b4d297f87e4a40478ad"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga26adad00c10390145b02080a53e782b4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicOffset.html#ga26adad00c10390145b02080a53e782b4">arm_offset_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> offset, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga26adad00c10390145b02080a53e782b4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a Q7 vector.  <a href="group__BasicOffset.html#ga26adad00c10390145b02080a53e782b4">More...</a><br/></td></tr>
+<tr class="separator:ga26adad00c10390145b02080a53e782b4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaffc78c4cda3e39b518d79cef293532b7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicOffset.html#gaffc78c4cda3e39b518d79cef293532b7">arm_offset_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> offset, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaffc78c4cda3e39b518d79cef293532b7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a Q15 vector.  <a href="group__BasicOffset.html#gaffc78c4cda3e39b518d79cef293532b7">More...</a><br/></td></tr>
+<tr class="separator:gaffc78c4cda3e39b518d79cef293532b7"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga55604198ef59f391a96ec95c188fca85"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicOffset.html#ga55604198ef59f391a96ec95c188fca85">arm_offset_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> offset, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga55604198ef59f391a96ec95c188fca85"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a Q31 vector.  <a href="group__BasicOffset.html#ga55604198ef59f391a96ec95c188fca85">More...</a><br/></td></tr>
+<tr class="separator:ga55604198ef59f391a96ec95c188fca85"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga7d9cfa32eafae01d3dbdcaf05052f431"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicNegate.html#ga7d9cfa32eafae01d3dbdcaf05052f431">arm_negate_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga7d9cfa32eafae01d3dbdcaf05052f431"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a floating-point vector.  <a href="group__BasicNegate.html#ga7d9cfa32eafae01d3dbdcaf05052f431">More...</a><br/></td></tr>
+<tr class="separator:ga7d9cfa32eafae01d3dbdcaf05052f431"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaea178c9f486ed4704f8723a2efee271c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicNegate.html#gaea178c9f486ed4704f8723a2efee271c">arm_negate_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaea178c9f486ed4704f8723a2efee271c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a Q7 vector.  <a href="group__BasicNegate.html#gaea178c9f486ed4704f8723a2efee271c">More...</a><br/></td></tr>
+<tr class="separator:gaea178c9f486ed4704f8723a2efee271c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga55b8bbbcd318d5142925bc221db30186"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicNegate.html#ga55b8bbbcd318d5142925bc221db30186">arm_negate_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga55b8bbbcd318d5142925bc221db30186"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a Q15 vector.  <a href="group__BasicNegate.html#ga55b8bbbcd318d5142925bc221db30186">More...</a><br/></td></tr>
+<tr class="separator:ga55b8bbbcd318d5142925bc221db30186"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad5054d19c205eebab5f2c6e42d8cbb3c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicNegate.html#gad5054d19c205eebab5f2c6e42d8cbb3c">arm_negate_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gad5054d19c205eebab5f2c6e42d8cbb3c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a Q31 vector.  <a href="group__BasicNegate.html#gad5054d19c205eebab5f2c6e42d8cbb3c">More...</a><br/></td></tr>
+<tr class="separator:gad5054d19c205eebab5f2c6e42d8cbb3c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa6dfe9554ca61eb3d1eee498396bce88"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#gaa6dfe9554ca61eb3d1eee498396bce88">arm_copy_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaa6dfe9554ca61eb3d1eee498396bce88"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a floating-point vector.  <a href="group__copy.html#gaa6dfe9554ca61eb3d1eee498396bce88">More...</a><br/></td></tr>
+<tr class="separator:gaa6dfe9554ca61eb3d1eee498396bce88"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9b947e38172ae7e5de780bed13a404fe"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#ga9b947e38172ae7e5de780bed13a404fe">arm_copy_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga9b947e38172ae7e5de780bed13a404fe"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a Q7 vector.  <a href="group__copy.html#ga9b947e38172ae7e5de780bed13a404fe">More...</a><br/></td></tr>
+<tr class="separator:ga9b947e38172ae7e5de780bed13a404fe"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaeb9e8c16ec7fe1235e5610142400f15f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#gaeb9e8c16ec7fe1235e5610142400f15f">arm_copy_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaeb9e8c16ec7fe1235e5610142400f15f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a Q15 vector.  <a href="group__copy.html#gaeb9e8c16ec7fe1235e5610142400f15f">More...</a><br/></td></tr>
+<tr class="separator:gaeb9e8c16ec7fe1235e5610142400f15f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga94c51fe2e82560ade3803787309c1282"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#ga94c51fe2e82560ade3803787309c1282">arm_copy_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga94c51fe2e82560ade3803787309c1282"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a Q31 vector.  <a href="group__copy.html#ga94c51fe2e82560ade3803787309c1282">More...</a><br/></td></tr>
+<tr class="separator:ga94c51fe2e82560ade3803787309c1282"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga2248e8d3901b4afb7827163132baad94"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Fill.html#ga2248e8d3901b4afb7827163132baad94">arm_fill_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> value, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
 <tr class="memdesc:ga2248e8d3901b4afb7827163132baad94"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fills a constant value into a floating-point vector.  <a href="group__Fill.html#ga2248e8d3901b4afb7827163132baad94">More...</a><br/></td></tr>
 <tr class="separator:ga2248e8d3901b4afb7827163132baad94"><td class="memSeparator" colspan="2">&#160;</td></tr>
@@ -843,336 +862,324 @@
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 <tr class="memdesc:ga69cc781cf337bd0a31bb85c772a35f7f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fills a constant value into a Q31 vector.  <a href="group__Fill.html#ga69cc781cf337bd0a31bb85c772a35f7f">More...</a><br/></td></tr>
 <tr class="separator:ga69cc781cf337bd0a31bb85c772a35f7f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga3f860dc98c6fc4cafc421e4a2aed3c89"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga3f860dc98c6fc4cafc421e4a2aed3c89">arm_conv_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst)</td></tr>
-<tr class="memdesc:ga3f860dc98c6fc4cafc421e4a2aed3c89"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of floating-point sequences.  <a href="group__Conv.html#ga3f860dc98c6fc4cafc421e4a2aed3c89">More...</a><br/></td></tr>
-<tr class="separator:ga3f860dc98c6fc4cafc421e4a2aed3c89"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac77dbcaef5c754cac27eab96c4753a3c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#gac77dbcaef5c754cac27eab96c4753a3c">arm_conv_opt_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
-<tr class="memdesc:gac77dbcaef5c754cac27eab96c4753a3c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q15 sequences.  <a href="group__Conv.html#gac77dbcaef5c754cac27eab96c4753a3c">More...</a><br/></td></tr>
-<tr class="separator:gac77dbcaef5c754cac27eab96c4753a3c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaccd6a89b0ff7a94df64610598e6e6893"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#gaccd6a89b0ff7a94df64610598e6e6893">arm_conv_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
-<tr class="memdesc:gaccd6a89b0ff7a94df64610598e6e6893"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q15 sequences.  <a href="group__Conv.html#gaccd6a89b0ff7a94df64610598e6e6893">More...</a><br/></td></tr>
-<tr class="separator:gaccd6a89b0ff7a94df64610598e6e6893"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad75ca978ce906e04abdf86a8d76306d4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#gad75ca978ce906e04abdf86a8d76306d4">arm_conv_fast_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
-<tr class="memdesc:gad75ca978ce906e04abdf86a8d76306d4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.  <a href="group__Conv.html#gad75ca978ce906e04abdf86a8d76306d4">More...</a><br/></td></tr>
-<tr class="separator:gad75ca978ce906e04abdf86a8d76306d4"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf16f490d245391ec18a42adc73d6d749"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#gaf16f490d245391ec18a42adc73d6d749">arm_conv_fast_opt_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
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-<tr class="memitem:ga946b58da734f1e4e78c91fcaab4b12b6"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga946b58da734f1e4e78c91fcaab4b12b6">arm_conv_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
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-<tr class="separator:ga946b58da734f1e4e78c91fcaab4b12b6"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:ga51112dcdf9b3624eb05182cdc4da9ec0"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memitem:gae2070cb792a167e78dbad8d06b97cdab"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#gae2070cb792a167e78dbad8d06b97cdab">arm_conv_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst)</td></tr>
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-<tr class="memitem:ga834b23b4ade8682beeb55778399101f8"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#ga834b23b4ade8682beeb55778399101f8">arm_conv_partial_opt_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
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-<tr class="memdesc:ga10c5294cda8c4985386f4e3944be7650"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.  <a href="group__PartialConv.html#ga10c5294cda8c4985386f4e3944be7650">More...</a><br/></td></tr>
-<tr class="separator:ga10c5294cda8c4985386f4e3944be7650"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga3707e16af1435b215840006a7ab0c98f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#ga3707e16af1435b215840006a7ab0c98f">arm_conv_partial_opt_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
-<tr class="memdesc:ga3707e16af1435b215840006a7ab0c98f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q7 sequences.  <a href="group__PartialConv.html#ga3707e16af1435b215840006a7ab0c98f">More...</a><br/></td></tr>
-<tr class="separator:ga3707e16af1435b215840006a7ab0c98f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga8567259fe18396dd972242c41741ebf4"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#ga8567259fe18396dd972242c41741ebf4">arm_conv_partial_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints)</td></tr>
-<tr class="memdesc:ga8567259fe18396dd972242c41741ebf4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q7 sequences.  <a href="group__PartialConv.html#ga8567259fe18396dd972242c41741ebf4">More...</a><br/></td></tr>
-<tr class="separator:ga8567259fe18396dd972242c41741ebf4"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga25aa3d58a90bf91b6a82272a0bc518f7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#ga25aa3d58a90bf91b6a82272a0bc518f7">arm_fir_decimate_f32</a> (const <a class="el" href="structarm__fir__decimate__instance__f32.html">arm_fir_decimate_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga25aa3d58a90bf91b6a82272a0bc518f7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point FIR decimator.  <a href="group__FIR__decimate.html#ga25aa3d58a90bf91b6a82272a0bc518f7">More...</a><br/></td></tr>
-<tr class="separator:ga25aa3d58a90bf91b6a82272a0bc518f7"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaaa2524b08220fd6c3f753e692ffc7d3b"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#gaaa2524b08220fd6c3f753e692ffc7d3b">arm_fir_decimate_init_f32</a> (<a class="el" href="structarm__fir__decimate__instance__f32.html">arm_fir_decimate_instance_f32</a> *S, uint16_t numTaps, uint8_t M, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaaa2524b08220fd6c3f753e692ffc7d3b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point FIR decimator.  <a href="group__FIR__decimate.html#gaaa2524b08220fd6c3f753e692ffc7d3b">More...</a><br/></td></tr>
-<tr class="separator:gaaa2524b08220fd6c3f753e692ffc7d3b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab8bef6d0f6a26fdbfce9485727713ce5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#gab8bef6d0f6a26fdbfce9485727713ce5">arm_fir_decimate_q15</a> (const <a class="el" href="structarm__fir__decimate__instance__q15.html">arm_fir_decimate_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gab8bef6d0f6a26fdbfce9485727713ce5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 FIR decimator.  <a href="group__FIR__decimate.html#gab8bef6d0f6a26fdbfce9485727713ce5">More...</a><br/></td></tr>
-<tr class="separator:gab8bef6d0f6a26fdbfce9485727713ce5"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga3f434c9a5d3b4e68061feac0714ea2ac"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#ga3f434c9a5d3b4e68061feac0714ea2ac">arm_fir_decimate_fast_q15</a> (const <a class="el" href="structarm__fir__decimate__instance__q15.html">arm_fir_decimate_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga3f434c9a5d3b4e68061feac0714ea2ac"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.  <a href="group__FIR__decimate.html#ga3f434c9a5d3b4e68061feac0714ea2ac">More...</a><br/></td></tr>
-<tr class="separator:ga3f434c9a5d3b4e68061feac0714ea2ac"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gada660e54b93d5d32178c6f5e1c6f368d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#gada660e54b93d5d32178c6f5e1c6f368d">arm_fir_decimate_init_q15</a> (<a class="el" href="structarm__fir__decimate__instance__q15.html">arm_fir_decimate_instance_q15</a> *S, uint16_t numTaps, uint8_t M, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gada660e54b93d5d32178c6f5e1c6f368d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q15 FIR decimator.  <a href="group__FIR__decimate.html#gada660e54b93d5d32178c6f5e1c6f368d">More...</a><br/></td></tr>
-<tr class="separator:gada660e54b93d5d32178c6f5e1c6f368d"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaef8e86add28f15fdc5ecc484e9dd7a4e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#gaef8e86add28f15fdc5ecc484e9dd7a4e">arm_fir_decimate_q31</a> (const <a class="el" href="structarm__fir__decimate__instance__q31.html">arm_fir_decimate_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaef8e86add28f15fdc5ecc484e9dd7a4e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 FIR decimator.  <a href="group__FIR__decimate.html#gaef8e86add28f15fdc5ecc484e9dd7a4e">More...</a><br/></td></tr>
-<tr class="separator:gaef8e86add28f15fdc5ecc484e9dd7a4e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga3c18cc3d0548a410c577f1bead9582b7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#ga3c18cc3d0548a410c577f1bead9582b7">arm_fir_decimate_fast_q31</a> (<a class="el" href="structarm__fir__decimate__instance__q31.html">arm_fir_decimate_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga3c18cc3d0548a410c577f1bead9582b7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.  <a href="group__FIR__decimate.html#ga3c18cc3d0548a410c577f1bead9582b7">More...</a><br/></td></tr>
-<tr class="separator:ga3c18cc3d0548a410c577f1bead9582b7"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga9ed47c4e0f58affa935d84e0508a7f39"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#ga9ed47c4e0f58affa935d84e0508a7f39">arm_fir_decimate_init_q31</a> (<a class="el" href="structarm__fir__decimate__instance__q31.html">arm_fir_decimate_instance_q31</a> *S, uint16_t numTaps, uint8_t M, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga9ed47c4e0f58affa935d84e0508a7f39"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 FIR decimator.  <a href="group__FIR__decimate.html#ga9ed47c4e0f58affa935d84e0508a7f39">More...</a><br/></td></tr>
-<tr class="separator:ga9ed47c4e0f58affa935d84e0508a7f39"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga7962b5f9636e54899f75d0c5936800b5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Interpolate.html#ga7962b5f9636e54899f75d0c5936800b5">arm_fir_interpolate_q15</a> (const <a class="el" href="structarm__fir__interpolate__instance__q15.html">arm_fir_interpolate_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga7962b5f9636e54899f75d0c5936800b5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 FIR interpolator.  <a href="group__FIR__Interpolate.html#ga7962b5f9636e54899f75d0c5936800b5">More...</a><br/></td></tr>
-<tr class="separator:ga7962b5f9636e54899f75d0c5936800b5"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga18e8c4a74ff1d0f88876cc63f675288f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Interpolate.html#ga18e8c4a74ff1d0f88876cc63f675288f">arm_fir_interpolate_init_q15</a> (<a class="el" href="structarm__fir__interpolate__instance__q15.html">arm_fir_interpolate_instance_q15</a> *S, uint8_t L, uint16_t numTaps, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga18e8c4a74ff1d0f88876cc63f675288f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q15 FIR interpolator.  <a href="group__FIR__Interpolate.html#ga18e8c4a74ff1d0f88876cc63f675288f">More...</a><br/></td></tr>
-<tr class="separator:ga18e8c4a74ff1d0f88876cc63f675288f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaac9c0f01ed91c53f7083995d7411f5ee"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Interpolate.html#gaac9c0f01ed91c53f7083995d7411f5ee">arm_fir_interpolate_q31</a> (const <a class="el" href="structarm__fir__interpolate__instance__q31.html">arm_fir_interpolate_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaac9c0f01ed91c53f7083995d7411f5ee"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 FIR interpolator.  <a href="group__FIR__Interpolate.html#gaac9c0f01ed91c53f7083995d7411f5ee">More...</a><br/></td></tr>
-<tr class="separator:gaac9c0f01ed91c53f7083995d7411f5ee"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga9d0ba38ce9f12a850dd242731d307476"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Interpolate.html#ga9d0ba38ce9f12a850dd242731d307476">arm_fir_interpolate_init_q31</a> (<a class="el" href="structarm__fir__interpolate__instance__q31.html">arm_fir_interpolate_instance_q31</a> *S, uint8_t L, uint16_t numTaps, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga9d0ba38ce9f12a850dd242731d307476"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 FIR interpolator.  <a href="group__FIR__Interpolate.html#ga9d0ba38ce9f12a850dd242731d307476">More...</a><br/></td></tr>
-<tr class="separator:ga9d0ba38ce9f12a850dd242731d307476"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga9cae104c5cf60b4e7671c82264a8c12e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Interpolate.html#ga9cae104c5cf60b4e7671c82264a8c12e">arm_fir_interpolate_f32</a> (const <a class="el" href="structarm__fir__interpolate__instance__f32.html">arm_fir_interpolate_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga9cae104c5cf60b4e7671c82264a8c12e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point FIR interpolator.  <a href="group__FIR__Interpolate.html#ga9cae104c5cf60b4e7671c82264a8c12e">More...</a><br/></td></tr>
-<tr class="separator:ga9cae104c5cf60b4e7671c82264a8c12e"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:ga0f857457a815946f7e4dca989ebf6ff6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point FIR interpolator.  <a href="group__FIR__Interpolate.html#ga0f857457a815946f7e4dca989ebf6ff6">More...</a><br/></td></tr>
-<tr class="separator:ga0f857457a815946f7e4dca989ebf6ff6"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga2e977f76e873bd47c6c41c7d940fdf7e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga2e977f76e873bd47c6c41c7d940fdf7e">arm_conv_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga2e977f76e873bd47c6c41c7d940fdf7e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of floating-point sequences.  <a href="group__Conv.html#ga2e977f76e873bd47c6c41c7d940fdf7e">More...</a><br/></td></tr>
+<tr class="separator:ga2e977f76e873bd47c6c41c7d940fdf7e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0d60c7a8349c6235d88bf87b04172252"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga0d60c7a8349c6235d88bf87b04172252">arm_conv_opt_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
+<tr class="memdesc:ga0d60c7a8349c6235d88bf87b04172252"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q15 sequences.  <a href="group__Conv.html#ga0d60c7a8349c6235d88bf87b04172252">More...</a><br/></td></tr>
+<tr class="separator:ga0d60c7a8349c6235d88bf87b04172252"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga372d3fd79b107dc6b12163a00c22da18"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga372d3fd79b107dc6b12163a00c22da18">arm_conv_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga372d3fd79b107dc6b12163a00c22da18"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q15 sequences.  <a href="group__Conv.html#ga372d3fd79b107dc6b12163a00c22da18">More...</a><br/></td></tr>
+<tr class="separator:ga372d3fd79b107dc6b12163a00c22da18"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf6bc2c8d655ef8c9b66affdae489f366"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#gaf6bc2c8d655ef8c9b66affdae489f366">arm_conv_fast_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
+<tr class="memdesc:gaf6bc2c8d655ef8c9b66affdae489f366"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.  <a href="group__Conv.html#gaf6bc2c8d655ef8c9b66affdae489f366">More...</a><br/></td></tr>
+<tr class="separator:gaf6bc2c8d655ef8c9b66affdae489f366"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga8ecd292b8e74c8f05b208e7948d05a90"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga8ecd292b8e74c8f05b208e7948d05a90">arm_conv_fast_opt_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
+<tr class="memdesc:ga8ecd292b8e74c8f05b208e7948d05a90"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.  <a href="group__Conv.html#ga8ecd292b8e74c8f05b208e7948d05a90">More...</a><br/></td></tr>
+<tr class="separator:ga8ecd292b8e74c8f05b208e7948d05a90"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga08ce299fb5c3329505cb8ce4bf4f6e06"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga08ce299fb5c3329505cb8ce4bf4f6e06">arm_conv_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga08ce299fb5c3329505cb8ce4bf4f6e06"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q31 sequences.  <a href="group__Conv.html#ga08ce299fb5c3329505cb8ce4bf4f6e06">More...</a><br/></td></tr>
+<tr class="separator:ga08ce299fb5c3329505cb8ce4bf4f6e06"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga2d2b29b1f7f00a8651f1bc7f0560464b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga2d2b29b1f7f00a8651f1bc7f0560464b">arm_conv_fast_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga2d2b29b1f7f00a8651f1bc7f0560464b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.  <a href="group__Conv.html#ga2d2b29b1f7f00a8651f1bc7f0560464b">More...</a><br/></td></tr>
+<tr class="separator:ga2d2b29b1f7f00a8651f1bc7f0560464b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf23966af04840f17c26c93849986baeb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#gaf23966af04840f17c26c93849986baeb">arm_conv_opt_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
+<tr class="memdesc:gaf23966af04840f17c26c93849986baeb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q7 sequences.  <a href="group__Conv.html#gaf23966af04840f17c26c93849986baeb">More...</a><br/></td></tr>
+<tr class="separator:gaf23966af04840f17c26c93849986baeb"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga625b30107443b6d145350bc242749764"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga625b30107443b6d145350bc242749764">arm_conv_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga625b30107443b6d145350bc242749764"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q7 sequences.  <a href="group__Conv.html#ga625b30107443b6d145350bc242749764">More...</a><br/></td></tr>
+<tr class="separator:ga625b30107443b6d145350bc242749764"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4e65902884d148ebcbecc260e0dffdd9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#ga4e65902884d148ebcbecc260e0dffdd9">arm_conv_partial_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints)</td></tr>
+<tr class="memdesc:ga4e65902884d148ebcbecc260e0dffdd9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of floating-point sequences.  <a href="group__PartialConv.html#ga4e65902884d148ebcbecc260e0dffdd9">More...</a><br/></td></tr>
+<tr class="separator:ga4e65902884d148ebcbecc260e0dffdd9"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa82f8213533529e9b9252b37fd3b39e4"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#gaa82f8213533529e9b9252b37fd3b39e4">arm_conv_partial_opt_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
+<tr class="memdesc:gaa82f8213533529e9b9252b37fd3b39e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q15 sequences.  <a href="group__PartialConv.html#gaa82f8213533529e9b9252b37fd3b39e4">More...</a><br/></td></tr>
+<tr class="separator:gaa82f8213533529e9b9252b37fd3b39e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga09b1f207980df75c2dcf01b1d3c2006f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#ga09b1f207980df75c2dcf01b1d3c2006f">arm_conv_partial_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints)</td></tr>
+<tr class="memdesc:ga09b1f207980df75c2dcf01b1d3c2006f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q15 sequences.  <a href="group__PartialConv.html#ga09b1f207980df75c2dcf01b1d3c2006f">More...</a><br/></td></tr>
+<tr class="separator:ga09b1f207980df75c2dcf01b1d3c2006f"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memdesc:ga30eb5ce84581f2d0532a17cdf8a20fc5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.  <a href="group__PartialConv.html#ga30eb5ce84581f2d0532a17cdf8a20fc5">More...</a><br/></td></tr>
+<tr class="separator:ga30eb5ce84581f2d0532a17cdf8a20fc5"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0cdb871f952b8c1305342ae499affa41"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#ga0cdb871f952b8c1305342ae499affa41">arm_conv_partial_fast_opt_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
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+<tr class="separator:ga0cdb871f952b8c1305342ae499affa41"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gadc48f14ae5ca8bf4b026916db0765afa"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#gadc48f14ae5ca8bf4b026916db0765afa">arm_conv_partial_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints)</td></tr>
+<tr class="memdesc:gadc48f14ae5ca8bf4b026916db0765afa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q31 sequences.  <a href="group__PartialConv.html#gadc48f14ae5ca8bf4b026916db0765afa">More...</a><br/></td></tr>
+<tr class="separator:gadc48f14ae5ca8bf4b026916db0765afa"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:gaaf207e31aa081cea624713aec65d0e77"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gadfc0cd0290793c790ccaa1c73eda0694"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#gadfc0cd0290793c790ccaa1c73eda0694">arm_conv_partial_opt_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
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+<tr class="separator:gadfc0cd0290793c790ccaa1c73eda0694"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa1bf3428dbe6beb5c9957bff0d00fa19"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#gaa1bf3428dbe6beb5c9957bff0d00fa19">arm_conv_partial_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints)</td></tr>
+<tr class="memdesc:gaa1bf3428dbe6beb5c9957bff0d00fa19"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q7 sequences.  <a href="group__PartialConv.html#gaa1bf3428dbe6beb5c9957bff0d00fa19">More...</a><br/></td></tr>
+<tr class="separator:gaa1bf3428dbe6beb5c9957bff0d00fa19"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab9402a0d9b0fffc0b50083a7d56c5905"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#gab9402a0d9b0fffc0b50083a7d56c5905">arm_fir_decimate_f32</a> (const <a class="el" href="structarm__fir__decimate__instance__f32.html">arm_fir_decimate_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gab9402a0d9b0fffc0b50083a7d56c5905"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for floating-point FIR decimator.  <a href="group__FIR__decimate.html#gab9402a0d9b0fffc0b50083a7d56c5905">More...</a><br/></td></tr>
+<tr class="separator:gab9402a0d9b0fffc0b50083a7d56c5905"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga67c80582fc296552fef2bd1f208d853b"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#ga67c80582fc296552fef2bd1f208d853b">arm_fir_decimate_init_f32</a> (<a class="el" href="structarm__fir__decimate__instance__f32.html">arm_fir_decimate_instance_f32</a> *S, uint16_t numTaps, uint8_t M, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga67c80582fc296552fef2bd1f208d853b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point FIR decimator.  <a href="group__FIR__decimate.html#ga67c80582fc296552fef2bd1f208d853b">More...</a><br/></td></tr>
+<tr class="separator:ga67c80582fc296552fef2bd1f208d853b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga262636462d9e24dab67ec792160afcbf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#ga262636462d9e24dab67ec792160afcbf">arm_fir_decimate_q15</a> (const <a class="el" href="structarm__fir__decimate__instance__q15.html">arm_fir_decimate_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga262636462d9e24dab67ec792160afcbf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 FIR decimator.  <a href="group__FIR__decimate.html#ga262636462d9e24dab67ec792160afcbf">More...</a><br/></td></tr>
+<tr class="separator:ga262636462d9e24dab67ec792160afcbf"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab43fa1edb45d3b2e875dc8cd381770cc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#gab43fa1edb45d3b2e875dc8cd381770cc">arm_fir_decimate_fast_q15</a> (const <a class="el" href="structarm__fir__decimate__instance__q15.html">arm_fir_decimate_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gab43fa1edb45d3b2e875dc8cd381770cc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.  <a href="group__FIR__decimate.html#gab43fa1edb45d3b2e875dc8cd381770cc">More...</a><br/></td></tr>
+<tr class="separator:gab43fa1edb45d3b2e875dc8cd381770cc"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga3b01ec9df00d759f79c934b239cead73"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#ga3b01ec9df00d759f79c934b239cead73">arm_fir_decimate_init_q15</a> (<a class="el" href="structarm__fir__decimate__instance__q15.html">arm_fir_decimate_instance_q15</a> *S, uint16_t numTaps, uint8_t M, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga3b01ec9df00d759f79c934b239cead73"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q15 FIR decimator.  <a href="group__FIR__decimate.html#ga3b01ec9df00d759f79c934b239cead73">More...</a><br/></td></tr>
+<tr class="separator:ga3b01ec9df00d759f79c934b239cead73"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga27c05d7892f8a327aab86fbfee9b0f29"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#ga27c05d7892f8a327aab86fbfee9b0f29">arm_fir_decimate_q31</a> (const <a class="el" href="structarm__fir__decimate__instance__q31.html">arm_fir_decimate_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga27c05d7892f8a327aab86fbfee9b0f29"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 FIR decimator.  <a href="group__FIR__decimate.html#ga27c05d7892f8a327aab86fbfee9b0f29">More...</a><br/></td></tr>
+<tr class="separator:ga27c05d7892f8a327aab86fbfee9b0f29"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac03b837d289c8bc4a86a34a89e44afdf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#gac03b837d289c8bc4a86a34a89e44afdf">arm_fir_decimate_fast_q31</a> (const <a class="el" href="structarm__fir__decimate__instance__q31.html">arm_fir_decimate_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gac03b837d289c8bc4a86a34a89e44afdf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.  <a href="group__FIR__decimate.html#gac03b837d289c8bc4a86a34a89e44afdf">More...</a><br/></td></tr>
+<tr class="separator:gac03b837d289c8bc4a86a34a89e44afdf"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga6a19d62083e85b3f5e34e8a8283c1ea0"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#ga6a19d62083e85b3f5e34e8a8283c1ea0">arm_fir_decimate_init_q31</a> (<a class="el" href="structarm__fir__decimate__instance__q31.html">arm_fir_decimate_instance_q31</a> *S, uint16_t numTaps, uint8_t M, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga6a19d62083e85b3f5e34e8a8283c1ea0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 FIR decimator.  <a href="group__FIR__decimate.html#ga6a19d62083e85b3f5e34e8a8283c1ea0">More...</a><br/></td></tr>
+<tr class="separator:ga6a19d62083e85b3f5e34e8a8283c1ea0"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga026a02cda40616476e33b82e4eaf855d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Interpolate.html#ga026a02cda40616476e33b82e4eaf855d">arm_fir_interpolate_q15</a> (const <a class="el" href="structarm__fir__interpolate__instance__q15.html">arm_fir_interpolate_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga026a02cda40616476e33b82e4eaf855d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 FIR interpolator.  <a href="group__FIR__Interpolate.html#ga026a02cda40616476e33b82e4eaf855d">More...</a><br/></td></tr>
+<tr class="separator:ga026a02cda40616476e33b82e4eaf855d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9d6a3c53991f1dca4da31dc400ed9eec"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Interpolate.html#ga9d6a3c53991f1dca4da31dc400ed9eec">arm_fir_interpolate_init_q15</a> (<a class="el" href="structarm__fir__interpolate__instance__q15.html">arm_fir_interpolate_instance_q15</a> *S, uint8_t L, uint16_t numTaps, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga9d6a3c53991f1dca4da31dc400ed9eec"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q15 FIR interpolator.  <a href="group__FIR__Interpolate.html#ga9d6a3c53991f1dca4da31dc400ed9eec">More...</a><br/></td></tr>
+<tr class="separator:ga9d6a3c53991f1dca4da31dc400ed9eec"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gadf65923ede13284c769b5621709e8135"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Interpolate.html#gadf65923ede13284c769b5621709e8135">arm_fir_interpolate_q31</a> (const <a class="el" href="structarm__fir__interpolate__instance__q31.html">arm_fir_interpolate_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gadf65923ede13284c769b5621709e8135"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 FIR interpolator.  <a href="group__FIR__Interpolate.html#gadf65923ede13284c769b5621709e8135">More...</a><br/></td></tr>
+<tr class="separator:gadf65923ede13284c769b5621709e8135"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga2f2288aa947fea3e8bcda3d5e01c1f6d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Interpolate.html#ga2f2288aa947fea3e8bcda3d5e01c1f6d">arm_fir_interpolate_init_q31</a> (<a class="el" href="structarm__fir__interpolate__instance__q31.html">arm_fir_interpolate_instance_q31</a> *S, uint8_t L, uint16_t numTaps, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
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+<tr class="separator:ga2f2288aa947fea3e8bcda3d5e01c1f6d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga62d0757246bbbe5bfaf67b9a95c16c51"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Interpolate.html#ga62d0757246bbbe5bfaf67b9a95c16c51">arm_fir_interpolate_f32</a> (const <a class="el" href="structarm__fir__interpolate__instance__f32.html">arm_fir_interpolate_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga62d0757246bbbe5bfaf67b9a95c16c51"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point FIR interpolator.  <a href="group__FIR__Interpolate.html#ga62d0757246bbbe5bfaf67b9a95c16c51">More...</a><br/></td></tr>
+<tr class="separator:ga62d0757246bbbe5bfaf67b9a95c16c51"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1416bcc1bcf6e2b18ff15261b6e04345"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Interpolate.html#ga1416bcc1bcf6e2b18ff15261b6e04345">arm_fir_interpolate_init_f32</a> (<a class="el" href="structarm__fir__interpolate__instance__f32.html">arm_fir_interpolate_instance_f32</a> *S, uint8_t L, uint16_t numTaps, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
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+<tr class="separator:ga1416bcc1bcf6e2b18ff15261b6e04345"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga953a83e69685de6575cff37feb358a93"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1__32x64.html#ga953a83e69685de6575cff37feb358a93">arm_biquad_cas_df1_32x64_q31</a> (const <a class="el" href="structarm__biquad__cas__df1__32x64__ins__q31.html">arm_biquad_cas_df1_32x64_ins_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga953a83e69685de6575cff37feb358a93"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 Biquad cascade 32x64 filter.  <a href="group__BiquadCascadeDF1__32x64.html#ga953a83e69685de6575cff37feb358a93">More...</a><br/></td></tr>
 <tr class="separator:ga953a83e69685de6575cff37feb358a93"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:ga114f373fbc16a314e9f293c7c7649c7f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point transposed direct form II Biquad cascade filter.  <a href="group__BiquadCascadeDF2T.html#ga114f373fbc16a314e9f293c7c7649c7f">More...</a><br/></td></tr>
-<tr class="separator:ga114f373fbc16a314e9f293c7c7649c7f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac75de449c3e4f733477d81bd0ada5eec"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF2T.html#gac75de449c3e4f733477d81bd0ada5eec">arm_biquad_cascade_stereo_df2T_f32</a> (const <a class="el" href="structarm__biquad__cascade__stereo__df2T__instance__f32.html">arm_biquad_cascade_stereo_df2T_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gac75de449c3e4f733477d81bd0ada5eec"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point transposed direct form II Biquad cascade filter. 2 channels.  <a href="group__BiquadCascadeDF2T.html#gac75de449c3e4f733477d81bd0ada5eec">More...</a><br/></td></tr>
-<tr class="separator:gac75de449c3e4f733477d81bd0ada5eec"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga426cd78591a717e87d66d1eaa9a3d074"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1__32x64.html#ga426cd78591a717e87d66d1eaa9a3d074">arm_biquad_cas_df1_32x64_init_q31</a> (<a class="el" href="structarm__biquad__cas__df1__32x64__ins__q31.html">arm_biquad_cas_df1_32x64_ins_q31</a> *S, uint8_t numStages, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *pState, uint8_t postShift)</td></tr>
+<tr class="memdesc:ga426cd78591a717e87d66d1eaa9a3d074"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 Biquad cascade 32x64 filter.  <a href="group__BiquadCascadeDF1__32x64.html#ga426cd78591a717e87d66d1eaa9a3d074">More...</a><br/></td></tr>
+<tr class="separator:ga426cd78591a717e87d66d1eaa9a3d074"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaecf9b22907e89fc35f097b50589cf86a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF2T.html#gaecf9b22907e89fc35f097b50589cf86a">arm_biquad_cascade_df2T_f32</a> (const <a class="el" href="structarm__biquad__cascade__df2T__instance__f32.html">arm_biquad_cascade_df2T_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaecf9b22907e89fc35f097b50589cf86a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point transposed direct form II Biquad cascade filter.  <a href="group__BiquadCascadeDF2T.html#gaecf9b22907e89fc35f097b50589cf86a">More...</a><br/></td></tr>
+<tr class="separator:gaecf9b22907e89fc35f097b50589cf86a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaeb8334e64307e85de36db947da04a6eb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF2T.html#gaeb8334e64307e85de36db947da04a6eb">arm_biquad_cascade_stereo_df2T_f32</a> (const <a class="el" href="structarm__biquad__cascade__stereo__df2T__instance__f32.html">arm_biquad_cascade_stereo_df2T_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaeb8334e64307e85de36db947da04a6eb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point transposed direct form II Biquad cascade filter. 2 channels.  <a href="group__BiquadCascadeDF2T.html#gaeb8334e64307e85de36db947da04a6eb">More...</a><br/></td></tr>
+<tr class="separator:gaeb8334e64307e85de36db947da04a6eb"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gaa8735dda5f3f36d0936283794c2aa771"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF2T.html#gaa8735dda5f3f36d0936283794c2aa771">arm_biquad_cascade_df2T_f64</a> (const <a class="el" href="structarm__biquad__cascade__df2T__instance__f64.html">arm_biquad_cascade_df2T_instance_f64</a> *S, <a class="el" href="arm__math_8h.html#ac55f3ae81b5bc9053760baacf57e47f4">float64_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ac55f3ae81b5bc9053760baacf57e47f4">float64_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
 <tr class="memdesc:gaa8735dda5f3f36d0936283794c2aa771"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point transposed direct form II Biquad cascade filter.  <a href="group__BiquadCascadeDF2T.html#gaa8735dda5f3f36d0936283794c2aa771">More...</a><br/></td></tr>
 <tr class="separator:gaa8735dda5f3f36d0936283794c2aa771"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:ga70eaddf317a4a8bde6bd6a97df67fedd"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memitem:gafd8b4068de567e9012e444f1c2320e1c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF2T.html#gafd8b4068de567e9012e444f1c2320e1c">arm_biquad_cascade_df2T_init_f32</a> (<a class="el" href="structarm__biquad__cascade__df2T__instance__f32.html">arm_biquad_cascade_df2T_instance_f32</a> *S, uint8_t numStages, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState)</td></tr>
+<tr class="memdesc:gafd8b4068de567e9012e444f1c2320e1c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point transposed direct form II Biquad cascade filter.  <a href="group__BiquadCascadeDF2T.html#gafd8b4068de567e9012e444f1c2320e1c">More...</a><br/></td></tr>
+<tr class="separator:gafd8b4068de567e9012e444f1c2320e1c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga31a77581f3cba5f360c84b160d770d98"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF2T.html#ga31a77581f3cba5f360c84b160d770d98">arm_biquad_cascade_stereo_df2T_init_f32</a> (<a class="el" href="structarm__biquad__cascade__stereo__df2T__instance__f32.html">arm_biquad_cascade_stereo_df2T_instance_f32</a> *S, uint8_t numStages, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState)</td></tr>
+<tr class="memdesc:ga31a77581f3cba5f360c84b160d770d98"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point transposed direct form II Biquad cascade filter.  <a href="group__BiquadCascadeDF2T.html#ga31a77581f3cba5f360c84b160d770d98">More...</a><br/></td></tr>
+<tr class="separator:ga31a77581f3cba5f360c84b160d770d98"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga12dc5d8e8892806ad70e79ca2ff9f86e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF2T.html#ga12dc5d8e8892806ad70e79ca2ff9f86e">arm_biquad_cascade_df2T_init_f64</a> (<a class="el" href="structarm__biquad__cascade__df2T__instance__f64.html">arm_biquad_cascade_df2T_instance_f64</a> *S, uint8_t numStages, <a class="el" href="arm__math_8h.html#ac55f3ae81b5bc9053760baacf57e47f4">float64_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ac55f3ae81b5bc9053760baacf57e47f4">float64_t</a> *pState)</td></tr>
 <tr class="memdesc:ga12dc5d8e8892806ad70e79ca2ff9f86e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point transposed direct form II Biquad cascade filter.  <a href="group__BiquadCascadeDF2T.html#ga12dc5d8e8892806ad70e79ca2ff9f86e">More...</a><br/></td></tr>
 <tr class="separator:ga12dc5d8e8892806ad70e79ca2ff9f86e"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memitem:gac05a17a0188bb851b58d19e572870a54"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Lattice.html#gac05a17a0188bb851b58d19e572870a54">arm_fir_lattice_init_q31</a> (<a class="el" href="structarm__fir__lattice__instance__q31.html">arm_fir_lattice_instance_q31</a> *S, uint16_t numStages, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState)</td></tr>
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-<tr class="separator:ga56164a0fe48619b8ceec160347bdd2ff"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae4657ac1025b5b4294fd4acc1e49e7f8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Lattice.html#gae4657ac1025b5b4294fd4acc1e49e7f8">arm_fir_lattice_init_q15</a> (<a class="el" href="structarm__fir__lattice__instance__q15.html">arm_fir_lattice_instance_q15</a> *S, uint16_t numStages, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState)</td></tr>
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+<tr class="separator:gae4657ac1025b5b4294fd4acc1e49e7f8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafddb7fd49cb0e8a4b6d9546b58bf60fb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Lattice.html#gafddb7fd49cb0e8a4b6d9546b58bf60fb">arm_fir_lattice_q15</a> (const <a class="el" href="structarm__fir__lattice__instance__q15.html">arm_fir_lattice_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
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+<tr class="separator:gafddb7fd49cb0e8a4b6d9546b58bf60fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf7723f451f6d4cf2586bb4b63d2029cb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Lattice.html#gaf7723f451f6d4cf2586bb4b63d2029cb">arm_fir_lattice_init_q31</a> (<a class="el" href="structarm__fir__lattice__instance__q31.html">arm_fir_lattice_instance_q31</a> *S, uint16_t numStages, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState)</td></tr>
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+<tr class="separator:gaf7723f451f6d4cf2586bb4b63d2029cb"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9ae2b76a2a1625d00f902919d0fdea05"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Lattice.html#ga9ae2b76a2a1625d00f902919d0fdea05">arm_fir_lattice_q31</a> (const <a class="el" href="structarm__fir__lattice__instance__q31.html">arm_fir_lattice_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga9ae2b76a2a1625d00f902919d0fdea05"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 FIR lattice filter.  <a href="group__FIR__Lattice.html#ga9ae2b76a2a1625d00f902919d0fdea05">More...</a><br/></td></tr>
+<tr class="separator:ga9ae2b76a2a1625d00f902919d0fdea05"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga489e9fd4fed0037b5ed0947eaa12d68d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Lattice.html#ga489e9fd4fed0037b5ed0947eaa12d68d">arm_fir_lattice_init_f32</a> (<a class="el" href="structarm__fir__lattice__instance__f32.html">arm_fir_lattice_instance_f32</a> *S, uint16_t numStages, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState)</td></tr>
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+<tr class="separator:ga489e9fd4fed0037b5ed0947eaa12d68d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga62053bf9d04f9f97ee5f4ef831533d68"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Lattice.html#ga62053bf9d04f9f97ee5f4ef831533d68">arm_fir_lattice_f32</a> (const <a class="el" href="structarm__fir__lattice__instance__f32.html">arm_fir_lattice_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
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+<tr class="separator:ga62053bf9d04f9f97ee5f4ef831533d68"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga754a44b604c386d132b4b05a3d9e0f44"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__IIR__Lattice.html#ga754a44b604c386d132b4b05a3d9e0f44">arm_iir_lattice_f32</a> (const <a class="el" href="structarm__iir__lattice__instance__f32.html">arm_iir_lattice_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga754a44b604c386d132b4b05a3d9e0f44"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point IIR lattice filter.  <a href="group__IIR__Lattice.html#ga754a44b604c386d132b4b05a3d9e0f44">More...</a><br/></td></tr>
+<tr class="separator:ga754a44b604c386d132b4b05a3d9e0f44"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gaed3b0230bb77439dc902daa625985e04"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__IIR__Lattice.html#gaed3b0230bb77439dc902daa625985e04">arm_iir_lattice_init_f32</a> (<a class="el" href="structarm__iir__lattice__instance__f32.html">arm_iir_lattice_instance_f32</a> *S, uint16_t numStages, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pkCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pvCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
 <tr class="memdesc:gaed3b0230bb77439dc902daa625985e04"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point IIR lattice filter.  <a href="group__IIR__Lattice.html#gaed3b0230bb77439dc902daa625985e04">More...</a><br/></td></tr>
 <tr class="separator:gaed3b0230bb77439dc902daa625985e04"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga123b26fa9156cd8d3622dd85931741ed"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__IIR__Lattice.html#ga123b26fa9156cd8d3622dd85931741ed">arm_iir_lattice_q31</a> (const <a class="el" href="structarm__iir__lattice__instance__q31.html">arm_iir_lattice_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga123b26fa9156cd8d3622dd85931741ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 IIR lattice filter.  <a href="group__IIR__Lattice.html#ga123b26fa9156cd8d3622dd85931741ed">More...</a><br/></td></tr>
-<tr class="separator:ga123b26fa9156cd8d3622dd85931741ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga87d7df8f8787402d4331de156a82687f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__IIR__Lattice.html#ga87d7df8f8787402d4331de156a82687f">arm_iir_lattice_q31</a> (const <a class="el" href="structarm__iir__lattice__instance__q31.html">arm_iir_lattice_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga87d7df8f8787402d4331de156a82687f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 IIR lattice filter.  <a href="group__IIR__Lattice.html#ga87d7df8f8787402d4331de156a82687f">More...</a><br/></td></tr>
+<tr class="separator:ga87d7df8f8787402d4331de156a82687f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gab686c14175581797d9c3ad7bf1d5cc1e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__IIR__Lattice.html#gab686c14175581797d9c3ad7bf1d5cc1e">arm_iir_lattice_init_q31</a> (<a class="el" href="structarm__iir__lattice__instance__q31.html">arm_iir_lattice_instance_q31</a> *S, uint16_t numStages, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pkCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pvCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
 <tr class="memdesc:gab686c14175581797d9c3ad7bf1d5cc1e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 IIR lattice filter.  <a href="group__IIR__Lattice.html#gab686c14175581797d9c3ad7bf1d5cc1e">More...</a><br/></td></tr>
 <tr class="separator:gab686c14175581797d9c3ad7bf1d5cc1e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaeb9e9599a288832ed123183eaa8b294a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__IIR__Lattice.html#gaeb9e9599a288832ed123183eaa8b294a">arm_iir_lattice_q15</a> (const <a class="el" href="structarm__iir__lattice__instance__q15.html">arm_iir_lattice_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaeb9e9599a288832ed123183eaa8b294a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 IIR lattice filter.  <a href="group__IIR__Lattice.html#gaeb9e9599a288832ed123183eaa8b294a">More...</a><br/></td></tr>
-<tr class="separator:gaeb9e9599a288832ed123183eaa8b294a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga49181562f33456fa979e474e2a657d19"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__IIR__Lattice.html#ga49181562f33456fa979e474e2a657d19">arm_iir_lattice_q15</a> (const <a class="el" href="structarm__iir__lattice__instance__q15.html">arm_iir_lattice_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga49181562f33456fa979e474e2a657d19"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 IIR lattice filter.  <a href="group__IIR__Lattice.html#ga49181562f33456fa979e474e2a657d19">More...</a><br/></td></tr>
+<tr class="separator:ga49181562f33456fa979e474e2a657d19"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga1f4bc2dd3d5641e96815d3a5aad58998"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__IIR__Lattice.html#ga1f4bc2dd3d5641e96815d3a5aad58998">arm_iir_lattice_init_q15</a> (<a class="el" href="structarm__iir__lattice__instance__q15.html">arm_iir_lattice_instance_q15</a> *S, uint16_t numStages, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pkCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pvCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
 <tr class="memdesc:ga1f4bc2dd3d5641e96815d3a5aad58998"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q15 IIR lattice filter.  <a href="group__IIR__Lattice.html#ga1f4bc2dd3d5641e96815d3a5aad58998">More...</a><br/></td></tr>
 <tr class="separator:ga1f4bc2dd3d5641e96815d3a5aad58998"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gae266d009e682180421601627c79a3843"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS.html#gae266d009e682180421601627c79a3843">arm_lms_f32</a> (const <a class="el" href="structarm__lms__instance__f32.html">arm_lms_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pRef, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pOut, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gae266d009e682180421601627c79a3843"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for floating-point LMS filter.  <a href="group__LMS.html#gae266d009e682180421601627c79a3843">More...</a><br/></td></tr>
-<tr class="separator:gae266d009e682180421601627c79a3843"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac518f7acd1778a8ee90e81c421cfbb90"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS.html#gac518f7acd1778a8ee90e81c421cfbb90">arm_lms_f32</a> (const <a class="el" href="structarm__lms__instance__f32.html">arm_lms_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pRef, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pOut, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gac518f7acd1778a8ee90e81c421cfbb90"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for floating-point LMS filter.  <a href="group__LMS.html#gac518f7acd1778a8ee90e81c421cfbb90">More...</a><br/></td></tr>
+<tr class="separator:gac518f7acd1778a8ee90e81c421cfbb90"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga9fc7adca0966ff2cec1746fca8364cee"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS.html#ga9fc7adca0966ff2cec1746fca8364cee">arm_lms_init_f32</a> (<a class="el" href="structarm__lms__instance__f32.html">arm_lms_instance_f32</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> mu, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
 <tr class="memdesc:ga9fc7adca0966ff2cec1746fca8364cee"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for floating-point LMS filter.  <a href="group__LMS.html#ga9fc7adca0966ff2cec1746fca8364cee">More...</a><br/></td></tr>
 <tr class="separator:ga9fc7adca0966ff2cec1746fca8364cee"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga9544cc26f18cd4465cfbed371be822b3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS.html#ga9544cc26f18cd4465cfbed371be822b3">arm_lms_init_q15</a> (<a class="el" href="structarm__lms__instance__q15.html">arm_lms_instance_q15</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> mu, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, uint32_t postShift)</td></tr>
 <tr class="memdesc:ga9544cc26f18cd4465cfbed371be822b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q15 LMS filter.  <a href="group__LMS.html#ga9544cc26f18cd4465cfbed371be822b3">More...</a><br/></td></tr>
 <tr class="separator:ga9544cc26f18cd4465cfbed371be822b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gacde16c17eb75979f81b34e2e2a58c7ac"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS.html#gacde16c17eb75979f81b34e2e2a58c7ac">arm_lms_q15</a> (const <a class="el" href="structarm__lms__instance__q15.html">arm_lms_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pRef, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pOut, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gacde16c17eb75979f81b34e2e2a58c7ac"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q15 LMS filter.  <a href="group__LMS.html#gacde16c17eb75979f81b34e2e2a58c7ac">More...</a><br/></td></tr>
-<tr class="separator:gacde16c17eb75979f81b34e2e2a58c7ac"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga6a0abfe6041253a6f91c63b383a64257"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS.html#ga6a0abfe6041253a6f91c63b383a64257">arm_lms_q31</a> (const <a class="el" href="structarm__lms__instance__q31.html">arm_lms_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pRef, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pOut, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga6a0abfe6041253a6f91c63b383a64257"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q31 LMS filter.  <a href="group__LMS.html#ga6a0abfe6041253a6f91c63b383a64257">More...</a><br/></td></tr>
-<tr class="separator:ga6a0abfe6041253a6f91c63b383a64257"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga12fd93f61401b365789cdfd5dca07e5b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS.html#ga12fd93f61401b365789cdfd5dca07e5b">arm_lms_q15</a> (const <a class="el" href="structarm__lms__instance__q15.html">arm_lms_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pRef, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pOut, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga12fd93f61401b365789cdfd5dca07e5b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q15 LMS filter.  <a href="group__LMS.html#ga12fd93f61401b365789cdfd5dca07e5b">More...</a><br/></td></tr>
+<tr class="separator:ga12fd93f61401b365789cdfd5dca07e5b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga69c9c64338c067f1fb4990dcdc8c143f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS.html#ga69c9c64338c067f1fb4990dcdc8c143f">arm_lms_q31</a> (const <a class="el" href="structarm__lms__instance__q31.html">arm_lms_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pRef, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pOut, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga69c9c64338c067f1fb4990dcdc8c143f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q31 LMS filter.  <a href="group__LMS.html#ga69c9c64338c067f1fb4990dcdc8c143f">More...</a><br/></td></tr>
+<tr class="separator:ga69c9c64338c067f1fb4990dcdc8c143f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga8d4bc251169f4b102355097a9f7530d6"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS.html#ga8d4bc251169f4b102355097a9f7530d6">arm_lms_init_q31</a> (<a class="el" href="structarm__lms__instance__q31.html">arm_lms_instance_q31</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> mu, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, uint32_t postShift)</td></tr>
 <tr class="memdesc:ga8d4bc251169f4b102355097a9f7530d6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for Q31 LMS filter.  <a href="group__LMS.html#ga8d4bc251169f4b102355097a9f7530d6">More...</a><br/></td></tr>
 <tr class="separator:ga8d4bc251169f4b102355097a9f7530d6"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga2418c929087c6eba719758eaae3f3300"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS__NORM.html#ga2418c929087c6eba719758eaae3f3300">arm_lms_norm_f32</a> (<a class="el" href="structarm__lms__norm__instance__f32.html">arm_lms_norm_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pRef, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pOut, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga2418c929087c6eba719758eaae3f3300"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for floating-point normalized LMS filter.  <a href="group__LMS__NORM.html#ga2418c929087c6eba719758eaae3f3300">More...</a><br/></td></tr>
-<tr class="separator:ga2418c929087c6eba719758eaae3f3300"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga72b3755ed1cf97622851cbbeff83c69e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS__NORM.html#ga72b3755ed1cf97622851cbbeff83c69e">arm_lms_norm_f32</a> (<a class="el" href="structarm__lms__norm__instance__f32.html">arm_lms_norm_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pRef, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pOut, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga72b3755ed1cf97622851cbbeff83c69e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for floating-point normalized LMS filter.  <a href="group__LMS__NORM.html#ga72b3755ed1cf97622851cbbeff83c69e">More...</a><br/></td></tr>
+<tr class="separator:ga72b3755ed1cf97622851cbbeff83c69e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gac7ccbaea863882056eee815456464670"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS__NORM.html#gac7ccbaea863882056eee815456464670">arm_lms_norm_init_f32</a> (<a class="el" href="structarm__lms__norm__instance__f32.html">arm_lms_norm_instance_f32</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> mu, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
 <tr class="memdesc:gac7ccbaea863882056eee815456464670"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for floating-point normalized LMS filter.  <a href="group__LMS__NORM.html#gac7ccbaea863882056eee815456464670">More...</a><br/></td></tr>
 <tr class="separator:gac7ccbaea863882056eee815456464670"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga7128775e99817c183a7d7ad34e8b6e05"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS__NORM.html#ga7128775e99817c183a7d7ad34e8b6e05">arm_lms_norm_q31</a> (<a class="el" href="structarm__lms__norm__instance__q31.html">arm_lms_norm_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pRef, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pOut, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga7128775e99817c183a7d7ad34e8b6e05"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q31 normalized LMS filter.  <a href="group__LMS__NORM.html#ga7128775e99817c183a7d7ad34e8b6e05">More...</a><br/></td></tr>
-<tr class="separator:ga7128775e99817c183a7d7ad34e8b6e05"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae12fc16232c8087345e5910fcb840be9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS__NORM.html#gae12fc16232c8087345e5910fcb840be9">arm_lms_norm_q31</a> (<a class="el" href="structarm__lms__norm__instance__q31.html">arm_lms_norm_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pRef, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pOut, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gae12fc16232c8087345e5910fcb840be9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q31 normalized LMS filter.  <a href="group__LMS__NORM.html#gae12fc16232c8087345e5910fcb840be9">More...</a><br/></td></tr>
+<tr class="separator:gae12fc16232c8087345e5910fcb840be9"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga1d9659dbbea4c89a7a9d14d5fc0dd490"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS__NORM.html#ga1d9659dbbea4c89a7a9d14d5fc0dd490">arm_lms_norm_init_q31</a> (<a class="el" href="structarm__lms__norm__instance__q31.html">arm_lms_norm_instance_q31</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> mu, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, uint8_t postShift)</td></tr>
 <tr class="memdesc:ga1d9659dbbea4c89a7a9d14d5fc0dd490"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for Q31 normalized LMS filter.  <a href="group__LMS__NORM.html#ga1d9659dbbea4c89a7a9d14d5fc0dd490">More...</a><br/></td></tr>
 <tr class="separator:ga1d9659dbbea4c89a7a9d14d5fc0dd490"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad47486a399dedb0bc85a5990ec5cf981"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS__NORM.html#gad47486a399dedb0bc85a5990ec5cf981">arm_lms_norm_q15</a> (<a class="el" href="structarm__lms__norm__instance__q15.html">arm_lms_norm_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pRef, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pOut, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gad47486a399dedb0bc85a5990ec5cf981"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q15 normalized LMS filter.  <a href="group__LMS__NORM.html#gad47486a399dedb0bc85a5990ec5cf981">More...</a><br/></td></tr>
-<tr class="separator:gad47486a399dedb0bc85a5990ec5cf981"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf03debfeb77ec5a9934e1b23f1ff6c48"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS__NORM.html#gaf03debfeb77ec5a9934e1b23f1ff6c48">arm_lms_norm_q15</a> (<a class="el" href="structarm__lms__norm__instance__q15.html">arm_lms_norm_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pRef, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pOut, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaf03debfeb77ec5a9934e1b23f1ff6c48"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q15 normalized LMS filter.  <a href="group__LMS__NORM.html#gaf03debfeb77ec5a9934e1b23f1ff6c48">More...</a><br/></td></tr>
+<tr class="separator:gaf03debfeb77ec5a9934e1b23f1ff6c48"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga213ab1ee2e154cc2fa30d667b1994b89"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS__NORM.html#ga213ab1ee2e154cc2fa30d667b1994b89">arm_lms_norm_init_q15</a> (<a class="el" href="structarm__lms__norm__instance__q15.html">arm_lms_norm_instance_q15</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> mu, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, uint8_t postShift)</td></tr>
 <tr class="memdesc:ga213ab1ee2e154cc2fa30d667b1994b89"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for Q15 normalized LMS filter.  <a href="group__LMS__NORM.html#ga213ab1ee2e154cc2fa30d667b1994b89">More...</a><br/></td></tr>
 <tr class="separator:ga213ab1ee2e154cc2fa30d667b1994b89"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga22021e4222773f01e9960358a531cfb8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga22021e4222773f01e9960358a531cfb8">arm_correlate_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst)</td></tr>
-<tr class="memdesc:ga22021e4222773f01e9960358a531cfb8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of floating-point sequences.  <a href="group__Corr.html#ga22021e4222773f01e9960358a531cfb8">More...</a><br/></td></tr>
-<tr class="separator:ga22021e4222773f01e9960358a531cfb8"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad71c0ec70ec69edbc48563d9a5f68451"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#gad71c0ec70ec69edbc48563d9a5f68451">arm_correlate_opt_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch)</td></tr>
-<tr class="memdesc:gad71c0ec70ec69edbc48563d9a5f68451"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q15 sequences.  <a href="group__Corr.html#gad71c0ec70ec69edbc48563d9a5f68451">More...</a><br/></td></tr>
-<tr class="separator:gad71c0ec70ec69edbc48563d9a5f68451"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga5ec96b8e420d68b0e626df0812274d46"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga5ec96b8e420d68b0e626df0812274d46">arm_correlate_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
-<tr class="memdesc:ga5ec96b8e420d68b0e626df0812274d46"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q15 sequences.  <a href="group__Corr.html#ga5ec96b8e420d68b0e626df0812274d46">More...</a><br/></td></tr>
-<tr class="separator:ga5ec96b8e420d68b0e626df0812274d46"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac8de3da44f58e86c2c86156276ca154f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#gac8de3da44f58e86c2c86156276ca154f">arm_correlate_fast_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
-<tr class="memdesc:gac8de3da44f58e86c2c86156276ca154f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.  <a href="group__Corr.html#gac8de3da44f58e86c2c86156276ca154f">More...</a><br/></td></tr>
-<tr class="separator:gac8de3da44f58e86c2c86156276ca154f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga40a0236b17220e8e22a22b5bc1c53c6b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga40a0236b17220e8e22a22b5bc1c53c6b">arm_correlate_fast_opt_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch)</td></tr>
-<tr class="memdesc:ga40a0236b17220e8e22a22b5bc1c53c6b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.  <a href="group__Corr.html#ga40a0236b17220e8e22a22b5bc1c53c6b">More...</a><br/></td></tr>
-<tr class="separator:ga40a0236b17220e8e22a22b5bc1c53c6b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga1367dc6c80476406c951e68d7fac4e8c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga1367dc6c80476406c951e68d7fac4e8c">arm_correlate_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
-<tr class="memdesc:ga1367dc6c80476406c951e68d7fac4e8c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q31 sequences.  <a href="group__Corr.html#ga1367dc6c80476406c951e68d7fac4e8c">More...</a><br/></td></tr>
-<tr class="separator:ga1367dc6c80476406c951e68d7fac4e8c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gabecd3d7b077dbbef43f93e9e037815ed"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#gabecd3d7b077dbbef43f93e9e037815ed">arm_correlate_fast_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
-<tr class="memdesc:gabecd3d7b077dbbef43f93e9e037815ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.  <a href="group__Corr.html#gabecd3d7b077dbbef43f93e9e037815ed">More...</a><br/></td></tr>
-<tr class="separator:gabecd3d7b077dbbef43f93e9e037815ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga746e8857cafe33ec5d6780729c18c311"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga746e8857cafe33ec5d6780729c18c311">arm_correlate_opt_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
-<tr class="memdesc:ga746e8857cafe33ec5d6780729c18c311"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q7 sequences.  <a href="group__Corr.html#ga746e8857cafe33ec5d6780729c18c311">More...</a><br/></td></tr>
-<tr class="separator:ga746e8857cafe33ec5d6780729c18c311"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga284ddcc49e4ac532d52a70d0383c5992"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga284ddcc49e4ac532d52a70d0383c5992">arm_correlate_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst)</td></tr>
-<tr class="memdesc:ga284ddcc49e4ac532d52a70d0383c5992"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q7 sequences.  <a href="group__Corr.html#ga284ddcc49e4ac532d52a70d0383c5992">More...</a><br/></td></tr>
-<tr class="separator:ga284ddcc49e4ac532d52a70d0383c5992"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga23a9284de5ee39406713b91d18ac8838"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#ga23a9284de5ee39406713b91d18ac8838">arm_fir_sparse_f32</a> (<a class="el" href="structarm__fir__sparse__instance__f32.html">arm_fir_sparse_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pScratchIn, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga23a9284de5ee39406713b91d18ac8838"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point sparse FIR filter.  <a href="group__FIR__Sparse.html#ga23a9284de5ee39406713b91d18ac8838">More...</a><br/></td></tr>
-<tr class="separator:ga23a9284de5ee39406713b91d18ac8838"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga86378a08a9d9e1e0e5de77843b34d396"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#ga86378a08a9d9e1e0e5de77843b34d396">arm_fir_sparse_init_f32</a> (<a class="el" href="structarm__fir__sparse__instance__f32.html">arm_fir_sparse_instance_f32</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga86378a08a9d9e1e0e5de77843b34d396"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point sparse FIR filter.  <a href="group__FIR__Sparse.html#ga86378a08a9d9e1e0e5de77843b34d396">More...</a><br/></td></tr>
-<tr class="separator:ga86378a08a9d9e1e0e5de77843b34d396"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga03e9c2f0f35ad67d20bac66be9f920ec"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#ga03e9c2f0f35ad67d20bac66be9f920ec">arm_fir_sparse_q31</a> (<a class="el" href="structarm__fir__sparse__instance__q31.html">arm_fir_sparse_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pScratchIn, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga03e9c2f0f35ad67d20bac66be9f920ec"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 sparse FIR filter.  <a href="group__FIR__Sparse.html#ga03e9c2f0f35ad67d20bac66be9f920ec">More...</a><br/></td></tr>
-<tr class="separator:ga03e9c2f0f35ad67d20bac66be9f920ec"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga9a0bb2134bc85d3e55c6be6d946ee634"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#ga9a0bb2134bc85d3e55c6be6d946ee634">arm_fir_sparse_init_q31</a> (<a class="el" href="structarm__fir__sparse__instance__q31.html">arm_fir_sparse_instance_q31</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga9a0bb2134bc85d3e55c6be6d946ee634"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 sparse FIR filter.  <a href="group__FIR__Sparse.html#ga9a0bb2134bc85d3e55c6be6d946ee634">More...</a><br/></td></tr>
-<tr class="separator:ga9a0bb2134bc85d3e55c6be6d946ee634"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga2bffda2e156e72427e19276cd9c3d3cc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#ga2bffda2e156e72427e19276cd9c3d3cc">arm_fir_sparse_q15</a> (<a class="el" href="structarm__fir__sparse__instance__q15.html">arm_fir_sparse_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratchIn, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pScratchOut, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga2bffda2e156e72427e19276cd9c3d3cc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 sparse FIR filter.  <a href="group__FIR__Sparse.html#ga2bffda2e156e72427e19276cd9c3d3cc">More...</a><br/></td></tr>
-<tr class="separator:ga2bffda2e156e72427e19276cd9c3d3cc"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga5eaa80bf72bcccef5a2c5fc6648d1baa"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#ga5eaa80bf72bcccef5a2c5fc6648d1baa">arm_fir_sparse_init_q15</a> (<a class="el" href="structarm__fir__sparse__instance__q15.html">arm_fir_sparse_instance_q15</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga5eaa80bf72bcccef5a2c5fc6648d1baa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q15 sparse FIR filter.  <a href="group__FIR__Sparse.html#ga5eaa80bf72bcccef5a2c5fc6648d1baa">More...</a><br/></td></tr>
-<tr class="separator:ga5eaa80bf72bcccef5a2c5fc6648d1baa"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gae86c145efc2d9ec32dc6d8c1ad2ccb3c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#gae86c145efc2d9ec32dc6d8c1ad2ccb3c">arm_fir_sparse_q7</a> (<a class="el" href="structarm__fir__sparse__instance__q7.html">arm_fir_sparse_instance_q7</a> *S, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pScratchIn, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pScratchOut, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gae86c145efc2d9ec32dc6d8c1ad2ccb3c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q7 sparse FIR filter.  <a href="group__FIR__Sparse.html#gae86c145efc2d9ec32dc6d8c1ad2ccb3c">More...</a><br/></td></tr>
-<tr class="separator:gae86c145efc2d9ec32dc6d8c1ad2ccb3c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga98f5c1a097d4572ce4ff3b0c58ebcdbd"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#ga98f5c1a097d4572ce4ff3b0c58ebcdbd">arm_fir_sparse_init_q7</a> (<a class="el" href="structarm__fir__sparse__instance__q7.html">arm_fir_sparse_instance_q7</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga98f5c1a097d4572ce4ff3b0c58ebcdbd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q7 sparse FIR filter.  <a href="group__FIR__Sparse.html#ga98f5c1a097d4572ce4ff3b0c58ebcdbd">More...</a><br/></td></tr>
-<tr class="separator:ga98f5c1a097d4572ce4ff3b0c58ebcdbd"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga371054f6e5fd78bec668908251f1b2f2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga371054f6e5fd78bec668908251f1b2f2">arm_correlate_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga371054f6e5fd78bec668908251f1b2f2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of floating-point sequences.  <a href="group__Corr.html#ga371054f6e5fd78bec668908251f1b2f2">More...</a><br/></td></tr>
+<tr class="separator:ga371054f6e5fd78bec668908251f1b2f2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga3cfae563b16fa3be577cab5acf63aeea"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga3cfae563b16fa3be577cab5acf63aeea">arm_correlate_opt_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch)</td></tr>
+<tr class="memdesc:ga3cfae563b16fa3be577cab5acf63aeea"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q15 sequences.  <a href="group__Corr.html#ga3cfae563b16fa3be577cab5acf63aeea">More...</a><br/></td></tr>
+<tr class="separator:ga3cfae563b16fa3be577cab5acf63aeea"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga8fc4e632ab08b28435ff62e7eb65f508"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga8fc4e632ab08b28435ff62e7eb65f508">arm_correlate_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga8fc4e632ab08b28435ff62e7eb65f508"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q15 sequences.  <a href="group__Corr.html#ga8fc4e632ab08b28435ff62e7eb65f508">More...</a><br/></td></tr>
+<tr class="separator:ga8fc4e632ab08b28435ff62e7eb65f508"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab4dea2049c8a26118ee4de9b90f1b9bd"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#gab4dea2049c8a26118ee4de9b90f1b9bd">arm_correlate_fast_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
+<tr class="memdesc:gab4dea2049c8a26118ee4de9b90f1b9bd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q15 sequences (fast version).  <a href="group__Corr.html#gab4dea2049c8a26118ee4de9b90f1b9bd">More...</a><br/></td></tr>
+<tr class="separator:gab4dea2049c8a26118ee4de9b90f1b9bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga3fc8d680844a3d24af25e45df96c82f3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga3fc8d680844a3d24af25e45df96c82f3">arm_correlate_fast_opt_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch)</td></tr>
+<tr class="memdesc:ga3fc8d680844a3d24af25e45df96c82f3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q15 sequences (fast version).  <a href="group__Corr.html#ga3fc8d680844a3d24af25e45df96c82f3">More...</a><br/></td></tr>
+<tr class="separator:ga3fc8d680844a3d24af25e45df96c82f3"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9e8ad8bae8400dac2afc995d38594744"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga9e8ad8bae8400dac2afc995d38594744">arm_correlate_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga9e8ad8bae8400dac2afc995d38594744"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q31 sequences.  <a href="group__Corr.html#ga9e8ad8bae8400dac2afc995d38594744">More...</a><br/></td></tr>
+<tr class="separator:ga9e8ad8bae8400dac2afc995d38594744"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1e85a8ceac5c0f27007e6ba2c8f20686"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga1e85a8ceac5c0f27007e6ba2c8f20686">arm_correlate_fast_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga1e85a8ceac5c0f27007e6ba2c8f20686"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q31 sequences (fast version).  <a href="group__Corr.html#ga1e85a8ceac5c0f27007e6ba2c8f20686">More...</a><br/></td></tr>
+<tr class="separator:ga1e85a8ceac5c0f27007e6ba2c8f20686"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga3c672e8ef8360c652d351097535f080d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga3c672e8ef8360c652d351097535f080d">arm_correlate_opt_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
+<tr class="memdesc:ga3c672e8ef8360c652d351097535f080d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q7 sequences.  <a href="group__Corr.html#ga3c672e8ef8360c652d351097535f080d">More...</a><br/></td></tr>
+<tr class="separator:ga3c672e8ef8360c652d351097535f080d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab5d8acc830313be970de59c2d5a26c72"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#gab5d8acc830313be970de59c2d5a26c72">arm_correlate_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst)</td></tr>
+<tr class="memdesc:gab5d8acc830313be970de59c2d5a26c72"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q7 sequences.  <a href="group__Corr.html#gab5d8acc830313be970de59c2d5a26c72">More...</a><br/></td></tr>
+<tr class="separator:gab5d8acc830313be970de59c2d5a26c72"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac6817bc86974b7121c3288fce25dbc5f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#gac6817bc86974b7121c3288fce25dbc5f">arm_fir_sparse_f32</a> (<a class="el" href="structarm__fir__sparse__instance__f32.html">arm_fir_sparse_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pScratchIn, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gac6817bc86974b7121c3288fce25dbc5f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point sparse FIR filter.  <a href="group__FIR__Sparse.html#gac6817bc86974b7121c3288fce25dbc5f">More...</a><br/></td></tr>
+<tr class="separator:gac6817bc86974b7121c3288fce25dbc5f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga967a0564d6d59f2b9e12f4a5b7a3f877"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#ga967a0564d6d59f2b9e12f4a5b7a3f877">arm_fir_sparse_init_f32</a> (<a class="el" href="structarm__fir__sparse__instance__f32.html">arm_fir_sparse_instance_f32</a> *S, uint16_t numTaps, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga967a0564d6d59f2b9e12f4a5b7a3f877"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point sparse FIR filter.  <a href="group__FIR__Sparse.html#ga967a0564d6d59f2b9e12f4a5b7a3f877">More...</a><br/></td></tr>
+<tr class="separator:ga967a0564d6d59f2b9e12f4a5b7a3f877"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaba9f7ef4acf293034af42baa2fd3df52"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#gaba9f7ef4acf293034af42baa2fd3df52">arm_fir_sparse_q31</a> (<a class="el" href="structarm__fir__sparse__instance__q31.html">arm_fir_sparse_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pScratchIn, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaba9f7ef4acf293034af42baa2fd3df52"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 sparse FIR filter.  <a href="group__FIR__Sparse.html#gaba9f7ef4acf293034af42baa2fd3df52">More...</a><br/></td></tr>
+<tr class="separator:gaba9f7ef4acf293034af42baa2fd3df52"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gade71e2e0432a0e6de36fa9f23b2c984c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#gade71e2e0432a0e6de36fa9f23b2c984c">arm_fir_sparse_init_q31</a> (<a class="el" href="structarm__fir__sparse__instance__q31.html">arm_fir_sparse_instance_q31</a> *S, uint16_t numTaps, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gade71e2e0432a0e6de36fa9f23b2c984c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 sparse FIR filter.  <a href="group__FIR__Sparse.html#gade71e2e0432a0e6de36fa9f23b2c984c">More...</a><br/></td></tr>
+<tr class="separator:gade71e2e0432a0e6de36fa9f23b2c984c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac3e43b06bff38ac8e62e145f88e9dbc7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#gac3e43b06bff38ac8e62e145f88e9dbc7">arm_fir_sparse_q15</a> (<a class="el" href="structarm__fir__sparse__instance__q15.html">arm_fir_sparse_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratchIn, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pScratchOut, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gac3e43b06bff38ac8e62e145f88e9dbc7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 sparse FIR filter.  <a href="group__FIR__Sparse.html#gac3e43b06bff38ac8e62e145f88e9dbc7">More...</a><br/></td></tr>
+<tr class="separator:gac3e43b06bff38ac8e62e145f88e9dbc7"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad1c7f891760e91301aac7e3a48aca449"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#gad1c7f891760e91301aac7e3a48aca449">arm_fir_sparse_init_q15</a> (<a class="el" href="structarm__fir__sparse__instance__q15.html">arm_fir_sparse_instance_q15</a> *S, uint16_t numTaps, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gad1c7f891760e91301aac7e3a48aca449"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q15 sparse FIR filter.  <a href="group__FIR__Sparse.html#gad1c7f891760e91301aac7e3a48aca449">More...</a><br/></td></tr>
+<tr class="separator:gad1c7f891760e91301aac7e3a48aca449"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga319b3d9032ba723a8efb819b9d2a3676"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#ga319b3d9032ba723a8efb819b9d2a3676">arm_fir_sparse_q7</a> (<a class="el" href="structarm__fir__sparse__instance__q7.html">arm_fir_sparse_instance_q7</a> *S, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pScratchIn, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pScratchOut, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga319b3d9032ba723a8efb819b9d2a3676"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q7 sparse FIR filter.  <a href="group__FIR__Sparse.html#ga319b3d9032ba723a8efb819b9d2a3676">More...</a><br/></td></tr>
+<tr class="separator:ga319b3d9032ba723a8efb819b9d2a3676"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5e74f8f4e4df85de5feb4e62125ff590"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#ga5e74f8f4e4df85de5feb4e62125ff590">arm_fir_sparse_init_q7</a> (<a class="el" href="structarm__fir__sparse__instance__q7.html">arm_fir_sparse_instance_q7</a> *S, uint16_t numTaps, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga5e74f8f4e4df85de5feb4e62125ff590"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q7 sparse FIR filter.  <a href="group__FIR__Sparse.html#ga5e74f8f4e4df85de5feb4e62125ff590">More...</a><br/></td></tr>
+<tr class="separator:ga5e74f8f4e4df85de5feb4e62125ff590"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga4420d45c37d58c310ef9ae1b5fe58020"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__SinCos.html#ga4420d45c37d58c310ef9ae1b5fe58020">arm_sin_cos_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> theta, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSinVal, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCosVal)</td></tr>
 <tr class="memdesc:ga4420d45c37d58c310ef9ae1b5fe58020"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point sin_cos function.  <a href="group__SinCos.html#ga4420d45c37d58c310ef9ae1b5fe58020">More...</a><br/></td></tr>
 <tr class="separator:ga4420d45c37d58c310ef9ae1b5fe58020"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gae9e4ddebff9d4eb5d0a093e28e0bc504"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__SinCos.html#gae9e4ddebff9d4eb5d0a093e28e0bc504">arm_sin_cos_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> theta, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSinVal, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCosVal)</td></tr>
 <tr class="memdesc:gae9e4ddebff9d4eb5d0a093e28e0bc504"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 sin_cos function.  <a href="group__SinCos.html#gae9e4ddebff9d4eb5d0a093e28e0bc504">More...</a><br/></td></tr>
 <tr class="separator:gae9e4ddebff9d4eb5d0a093e28e0bc504"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga3a102aead6460ad9fcb0626f6b226ffb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__conj.html#ga3a102aead6460ad9fcb0626f6b226ffb">arm_cmplx_conj_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:ga3a102aead6460ad9fcb0626f6b226ffb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex conjugate.  <a href="group__cmplx__conj.html#ga3a102aead6460ad9fcb0626f6b226ffb">More...</a><br/></td></tr>
-<tr class="separator:ga3a102aead6460ad9fcb0626f6b226ffb"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gafecc94879a383c5208ec3ef99485e4b5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__conj.html#gafecc94879a383c5208ec3ef99485e4b5">arm_cmplx_conj_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t numSamples)</td></tr>
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-<tr class="separator:gafecc94879a383c5208ec3ef99485e4b5"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf47689ae07962acaecb8ddde556df4a4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__conj.html#gaf47689ae07962acaecb8ddde556df4a4">arm_cmplx_conj_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:gaf47689ae07962acaecb8ddde556df4a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex conjugate.  <a href="group__cmplx__conj.html#gaf47689ae07962acaecb8ddde556df4a4">More...</a><br/></td></tr>
-<tr class="separator:gaf47689ae07962acaecb8ddde556df4a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:gaa7faccc0d96b061d8b7d0d7d82045074"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:ga384b0538101e8c03fa4fa14271e63b04"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex magnitude squared.  <a href="group__cmplx__mag__squared.html#ga384b0538101e8c03fa4fa14271e63b04">More...</a><br/></td></tr>
-<tr class="separator:ga384b0538101e8c03fa4fa14271e63b04"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga45537f576102d960d467eb722b8431f2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag__squared.html#ga45537f576102d960d467eb722b8431f2">arm_cmplx_mag_squared_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:ga45537f576102d960d467eb722b8431f2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex magnitude squared.  <a href="group__cmplx__mag__squared.html#ga45537f576102d960d467eb722b8431f2">More...</a><br/></td></tr>
-<tr class="separator:ga45537f576102d960d467eb722b8431f2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga9380d08046dd7ec2f5015f569206b9ce"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
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-<tr class="separator:ga9380d08046dd7ec2f5015f569206b9ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga82bc0813c007d50ce308b9b0bf3c76e2"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PID.html#ga82bc0813c007d50ce308b9b0bf3c76e2">arm_pid_q31</a> (<a class="el" href="structarm__pid__instance__q31.html">arm_pid_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> in)</td></tr>
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-<tr class="separator:ga82bc0813c007d50ce308b9b0bf3c76e2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad466471a6b0f8fc570b8b8fc34ac79fa"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PID.html#gad466471a6b0f8fc570b8b8fc34ac79fa">arm_pid_q15</a> (<a class="el" href="structarm__pid__instance__q15.html">arm_pid_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> in)</td></tr>
-<tr class="memdesc:gad466471a6b0f8fc570b8b8fc34ac79fa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Process function for the Q15 PID Control.  <a href="group__PID.html#gad466471a6b0f8fc570b8b8fc34ac79fa">More...</a><br/></td></tr>
-<tr class="separator:gad466471a6b0f8fc570b8b8fc34ac79fa"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1b5571244b051bb72db30886896da2da"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__conj.html#ga1b5571244b051bb72db30886896da2da">arm_cmplx_conj_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:ga1b5571244b051bb72db30886896da2da"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex conjugate.  <a href="group__cmplx__conj.html#ga1b5571244b051bb72db30886896da2da">More...</a><br/></td></tr>
+<tr class="separator:ga1b5571244b051bb72db30886896da2da"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga652edf2688aae9b2f53c5da73f6cc2bc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__conj.html#ga652edf2688aae9b2f53c5da73f6cc2bc">arm_cmplx_conj_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:ga652edf2688aae9b2f53c5da73f6cc2bc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex conjugate.  <a href="group__cmplx__conj.html#ga652edf2688aae9b2f53c5da73f6cc2bc">More...</a><br/></td></tr>
+<tr class="separator:ga652edf2688aae9b2f53c5da73f6cc2bc"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga2eef7dba99852d5f7ec3e025b2e5653b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__conj.html#ga2eef7dba99852d5f7ec3e025b2e5653b">arm_cmplx_conj_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:ga2eef7dba99852d5f7ec3e025b2e5653b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex conjugate.  <a href="group__cmplx__conj.html#ga2eef7dba99852d5f7ec3e025b2e5653b">More...</a><br/></td></tr>
+<tr class="separator:ga2eef7dba99852d5f7ec3e025b2e5653b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga925ef5458a384f63d06f1c6997d1fb7d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag__squared.html#ga925ef5458a384f63d06f1c6997d1fb7d">arm_cmplx_mag_squared_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:ga925ef5458a384f63d06f1c6997d1fb7d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex magnitude squared.  <a href="group__cmplx__mag__squared.html#ga925ef5458a384f63d06f1c6997d1fb7d">More...</a><br/></td></tr>
+<tr class="separator:ga925ef5458a384f63d06f1c6997d1fb7d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9d74dbc0a777cfcc75c1cae33ef4d44a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag__squared.html#ga9d74dbc0a777cfcc75c1cae33ef4d44a">arm_cmplx_mag_squared_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:ga9d74dbc0a777cfcc75c1cae33ef4d44a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex magnitude squared.  <a href="group__cmplx__mag__squared.html#ga9d74dbc0a777cfcc75c1cae33ef4d44a">More...</a><br/></td></tr>
+<tr class="separator:ga9d74dbc0a777cfcc75c1cae33ef4d44a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafdd1e838db0aef7ec201611883bd444c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag__squared.html#gafdd1e838db0aef7ec201611883bd444c">arm_cmplx_mag_squared_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:gafdd1e838db0aef7ec201611883bd444c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex magnitude squared.  <a href="group__cmplx__mag__squared.html#gafdd1e838db0aef7ec201611883bd444c">More...</a><br/></td></tr>
+<tr class="separator:gafdd1e838db0aef7ec201611883bd444c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5a6865ed706b7dd969ef0bd58a61f306"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PID.html#ga5a6865ed706b7dd969ef0bd58a61f306">arm_pid_f32</a> (<a class="el" href="structarm__pid__instance__f32.html">arm_pid_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> in)</td></tr>
+<tr class="memdesc:ga5a6865ed706b7dd969ef0bd58a61f306"><td class="mdescLeft">&#160;</td><td class="mdescRight">Process function for the floating-point PID Control.  <a href="group__PID.html#ga5a6865ed706b7dd969ef0bd58a61f306">More...</a><br/></td></tr>
+<tr class="separator:ga5a6865ed706b7dd969ef0bd58a61f306"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9ead8b3180125fb42879389477b99dc8"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PID.html#ga9ead8b3180125fb42879389477b99dc8">arm_pid_q31</a> (<a class="el" href="structarm__pid__instance__q31.html">arm_pid_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> in)</td></tr>
+<tr class="memdesc:ga9ead8b3180125fb42879389477b99dc8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Process function for the Q31 PID Control.  <a href="group__PID.html#ga9ead8b3180125fb42879389477b99dc8">More...</a><br/></td></tr>
+<tr class="separator:ga9ead8b3180125fb42879389477b99dc8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga7ecc87208cb297fb9a31cec4f18bb54e"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PID.html#ga7ecc87208cb297fb9a31cec4f18bb54e">arm_pid_q15</a> (<a class="el" href="structarm__pid__instance__q15.html">arm_pid_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> in)</td></tr>
+<tr class="memdesc:ga7ecc87208cb297fb9a31cec4f18bb54e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Process function for the Q15 PID Control.  <a href="group__PID.html#ga7ecc87208cb297fb9a31cec4f18bb54e">More...</a><br/></td></tr>
+<tr class="separator:ga7ecc87208cb297fb9a31cec4f18bb54e"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 <tr class="memdesc:ga542be7aabbf7a2297a4b62cf212910e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point matrix inverse.  <a href="group__MatrixInv.html#ga542be7aabbf7a2297a4b62cf212910e3">More...</a><br/></td></tr>
 <tr class="separator:ga542be7aabbf7a2297a4b62cf212910e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gaede2367c02df083cc915ddd5d8fae838"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MatrixInv.html#gaede2367c02df083cc915ddd5d8fae838">arm_mat_inverse_f64</a> (const <a class="el" href="structarm__matrix__instance__f64.html">arm_matrix_instance_f64</a> *src, <a class="el" href="structarm__matrix__instance__f64.html">arm_matrix_instance_f64</a> *dst)</td></tr>
 <tr class="memdesc:gaede2367c02df083cc915ddd5d8fae838"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point matrix inverse.  <a href="group__MatrixInv.html#gaede2367c02df083cc915ddd5d8fae838">More...</a><br/></td></tr>
 <tr class="separator:gaede2367c02df083cc915ddd5d8fae838"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:ga0c69ebd2855ce6d34008eff808881e78"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad8958cd3cb7f521466168b46a25b7908"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q7__to__x.html#gad8958cd3cb7f521466168b46a25b7908">arm_q7_to_q31</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
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-<tr class="separator:gae24bf07174d3b8dddcf30d8c8d8e7fbb"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga5630ed3715091f2795ee10df34672523"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__park.html#ga5630ed3715091f2795ee10df34672523">arm_park_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Ialpha, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Ibeta, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pId, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pIq, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> sinVal, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> cosVal)</td></tr>
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-<tr class="memitem:ga656620f957b65512ed83db03fd455ec5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q7__to__x.html#ga656620f957b65512ed83db03fd455ec5">arm_q7_to_float</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
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-<tr class="separator:ga7ca3a87a0954ed8c9ed5a2e6f1c64f30"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memitem:ga82d40c62bb48ef4d613f1f2f685b4084"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__clarke.html#ga82d40c62bb48ef4d613f1f2f685b4084">arm_clarke_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Ia, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Ib, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pIalpha, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pIbeta)</td></tr>
+<tr class="memdesc:ga82d40c62bb48ef4d613f1f2f685b4084"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point Clarke transform.  <a href="group__clarke.html#ga82d40c62bb48ef4d613f1f2f685b4084">More...</a><br/></td></tr>
+<tr class="separator:ga82d40c62bb48ef4d613f1f2f685b4084"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:ga8d68db2a6e26e1caab677f5ab293c068"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:ga1a73ce96f94b2124d02426690e587197"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:ga3bab178431f22d13332a0dfae4390172"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:ga18f92d09e080edc98a00c01886b56b5d"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:ga69be76685149b18f345f705aa8efaad0"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:ga896b639ecd52c33d427bc7cdc8d303b2"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:gae7165779ef72e1f797d0c601d6d619b2"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:ga5335f60532bab8cee1e7c22f76a41805"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:gaeaf31289367ac36c4727939e1ea73312"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:ga9a308a0de4d4e4fe4a262a99b17121cd"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:gafabd4124a8724055329b5c484419f936"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 <tr class="separator:gadfd60c24def501638c0d5db20f4c869b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga697d82c2747a3302cf44e7c9583da2e8"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
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-<tr class="separator:ga697d82c2747a3302cf44e7c9583da2e8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5f37f479666ee8ff9711b334286c60ed"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__SQRT.html#ga5f37f479666ee8ff9711b334286c60ed">arm_sqrt_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> in, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pOut)</td></tr>
+<tr class="memdesc:ga5f37f479666ee8ff9711b334286c60ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point square root function.  <a href="group__SQRT.html#ga5f37f479666ee8ff9711b334286c60ed">More...</a><br/></td></tr>
+<tr class="separator:ga5f37f479666ee8ff9711b334286c60ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga119e25831e141d734d7ef10636670058"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__SQRT.html#ga119e25831e141d734d7ef10636670058">arm_sqrt_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> in, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pOut)</td></tr>
 <tr class="memdesc:ga119e25831e141d734d7ef10636670058"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 square root function.  <a href="group__SQRT.html#ga119e25831e141d734d7ef10636670058">More...</a><br/></td></tr>
 <tr class="separator:ga119e25831e141d734d7ef10636670058"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga5abe5ca724f3e15849662b03752c1238"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__SQRT.html#ga5abe5ca724f3e15849662b03752c1238">arm_sqrt_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> in, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pOut)</td></tr>
 <tr class="memdesc:ga5abe5ca724f3e15849662b03752c1238"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 square root function.  <a href="group__SQRT.html#ga5abe5ca724f3e15849662b03752c1238">More...</a><br/></td></tr>
 <tr class="separator:ga5abe5ca724f3e15849662b03752c1238"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a87c6129c7f1a7e7b205339054d3ffed7"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a87c6129c7f1a7e7b205339054d3ffed7">arm_circularWrite_f32</a> (int32_t *circBuffer, int32_t L, uint16_t *writeOffset, int32_t bufferInc, const int32_t *src, int32_t srcInc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:a87c6129c7f1a7e7b205339054d3ffed7"><td class="mdescLeft">&#160;</td><td class="mdescRight">floating-point Circular write function.  <a href="#a87c6129c7f1a7e7b205339054d3ffed7">More...</a><br/></td></tr>
-<tr class="separator:a87c6129c7f1a7e7b205339054d3ffed7"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:af4d2359037b7360329ef9dd6836d1353"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#af4d2359037b7360329ef9dd6836d1353">arm_circularRead_f32</a> (int32_t *circBuffer, int32_t L, int32_t *readOffset, int32_t bufferInc, int32_t *dst, int32_t *dst_base, int32_t dst_length, int32_t dstInc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:af4d2359037b7360329ef9dd6836d1353"><td class="mdescLeft">&#160;</td><td class="mdescRight">floating-point Circular Read function.  <a href="#af4d2359037b7360329ef9dd6836d1353">More...</a><br/></td></tr>
-<tr class="separator:af4d2359037b7360329ef9dd6836d1353"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a885325c33991f03743a9d9b06868a099"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a885325c33991f03743a9d9b06868a099">arm_circularWrite_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *circBuffer, int32_t L, uint16_t *writeOffset, int32_t bufferInc, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *src, int32_t srcInc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:a885325c33991f03743a9d9b06868a099"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 Circular write function.  <a href="#a885325c33991f03743a9d9b06868a099">More...</a><br/></td></tr>
-<tr class="separator:a885325c33991f03743a9d9b06868a099"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a98eb923fe8c64909897c31d6b9f69bff"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a98eb923fe8c64909897c31d6b9f69bff">arm_circularRead_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *circBuffer, int32_t L, int32_t *readOffset, int32_t bufferInc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *dst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *dst_base, int32_t dst_length, int32_t dstInc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:a98eb923fe8c64909897c31d6b9f69bff"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 Circular Read function.  <a href="#a98eb923fe8c64909897c31d6b9f69bff">More...</a><br/></td></tr>
-<tr class="separator:a98eb923fe8c64909897c31d6b9f69bff"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a2db43ffe947dce0f676c09580d1f6765"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a2db43ffe947dce0f676c09580d1f6765">arm_circularWrite_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *circBuffer, int32_t L, uint16_t *writeOffset, int32_t bufferInc, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *src, int32_t srcInc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:a2db43ffe947dce0f676c09580d1f6765"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 Circular write function.  <a href="#a2db43ffe947dce0f676c09580d1f6765">More...</a><br/></td></tr>
-<tr class="separator:a2db43ffe947dce0f676c09580d1f6765"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:acd3153fe997f44fe6c20fa1ac6257a2b"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#acd3153fe997f44fe6c20fa1ac6257a2b">arm_circularRead_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *circBuffer, int32_t L, int32_t *readOffset, int32_t bufferInc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *dst, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *dst_base, int32_t dst_length, int32_t dstInc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:acd3153fe997f44fe6c20fa1ac6257a2b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 Circular Read function.  <a href="#acd3153fe997f44fe6c20fa1ac6257a2b">More...</a><br/></td></tr>
-<tr class="separator:acd3153fe997f44fe6c20fa1ac6257a2b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga0b93d31bb5b5ed214c2b94d8a7744cd2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#ga0b93d31bb5b5ed214c2b94d8a7744cd2">arm_power_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *pResult)</td></tr>
-<tr class="memdesc:ga0b93d31bb5b5ed214c2b94d8a7744cd2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a Q31 vector.  <a href="group__power.html#ga0b93d31bb5b5ed214c2b94d8a7744cd2">More...</a><br/></td></tr>
-<tr class="separator:ga0b93d31bb5b5ed214c2b94d8a7744cd2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga993c00dd7f661d66bdb6e58426e893aa"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#ga993c00dd7f661d66bdb6e58426e893aa">arm_power_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
-<tr class="memdesc:ga993c00dd7f661d66bdb6e58426e893aa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a floating-point vector.  <a href="group__power.html#ga993c00dd7f661d66bdb6e58426e893aa">More...</a><br/></td></tr>
-<tr class="separator:ga993c00dd7f661d66bdb6e58426e893aa"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga7050c04b7515e01a75c38f1abbaf71ba"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#ga7050c04b7515e01a75c38f1abbaf71ba">arm_power_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *pResult)</td></tr>
-<tr class="memdesc:ga7050c04b7515e01a75c38f1abbaf71ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a Q15 vector.  <a href="group__power.html#ga7050c04b7515e01a75c38f1abbaf71ba">More...</a><br/></td></tr>
-<tr class="separator:ga7050c04b7515e01a75c38f1abbaf71ba"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf969c85c5655e3d72d7b99ff188f92c9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#gaf969c85c5655e3d72d7b99ff188f92c9">arm_power_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
-<tr class="memdesc:gaf969c85c5655e3d72d7b99ff188f92c9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a Q7 vector.  <a href="group__power.html#gaf969c85c5655e3d72d7b99ff188f92c9">More...</a><br/></td></tr>
-<tr class="separator:gaf969c85c5655e3d72d7b99ff188f92c9"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaebc707ee539020357c25da4c75b52eb7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#gaebc707ee539020357c25da4c75b52eb7">arm_mean_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pResult)</td></tr>
-<tr class="memdesc:gaebc707ee539020357c25da4c75b52eb7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a Q7 vector.  <a href="group__mean.html#gaebc707ee539020357c25da4c75b52eb7">More...</a><br/></td></tr>
-<tr class="separator:gaebc707ee539020357c25da4c75b52eb7"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac882495d5f098819fd3939c1ef7795b3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#gac882495d5f098819fd3939c1ef7795b3">arm_mean_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult)</td></tr>
-<tr class="memdesc:gac882495d5f098819fd3939c1ef7795b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a Q15 vector.  <a href="group__mean.html#gac882495d5f098819fd3939c1ef7795b3">More...</a><br/></td></tr>
-<tr class="separator:gac882495d5f098819fd3939c1ef7795b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gacf2526d8c2d75e486e8f0b0e31877ad0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#gacf2526d8c2d75e486e8f0b0e31877ad0">arm_mean_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
-<tr class="memdesc:gacf2526d8c2d75e486e8f0b0e31877ad0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a Q31 vector.  <a href="group__mean.html#gacf2526d8c2d75e486e8f0b0e31877ad0">More...</a><br/></td></tr>
-<tr class="separator:gacf2526d8c2d75e486e8f0b0e31877ad0"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga74ce08c49ab61e57bd50c3a0ca1fdb2b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#ga74ce08c49ab61e57bd50c3a0ca1fdb2b">arm_mean_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
-<tr class="memdesc:ga74ce08c49ab61e57bd50c3a0ca1fdb2b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a floating-point vector.  <a href="group__mean.html#ga74ce08c49ab61e57bd50c3a0ca1fdb2b">More...</a><br/></td></tr>
-<tr class="separator:ga74ce08c49ab61e57bd50c3a0ca1fdb2b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga393f26c5a3bfa05624fb8d32232a6d96"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__variance.html#ga393f26c5a3bfa05624fb8d32232a6d96">arm_var_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
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-<tr class="separator:ga393f26c5a3bfa05624fb8d32232a6d96"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac02873f1c2cc80adfd799305f0e6465d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__variance.html#gac02873f1c2cc80adfd799305f0e6465d">arm_var_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
-<tr class="memdesc:gac02873f1c2cc80adfd799305f0e6465d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Variance of the elements of a Q31 vector.  <a href="group__variance.html#gac02873f1c2cc80adfd799305f0e6465d">More...</a><br/></td></tr>
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-<tr class="memitem:ga79dce009ed2de28a125aeb3f19631654"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__variance.html#ga79dce009ed2de28a125aeb3f19631654">arm_var_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult)</td></tr>
-<tr class="memdesc:ga79dce009ed2de28a125aeb3f19631654"><td class="mdescLeft">&#160;</td><td class="mdescRight">Variance of the elements of a Q15 vector.  <a href="group__variance.html#ga79dce009ed2de28a125aeb3f19631654">More...</a><br/></td></tr>
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-<tr class="memitem:ga0e3ab1b57da32d45388d1fa90d7fd88c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RMS.html#ga0e3ab1b57da32d45388d1fa90d7fd88c">arm_rms_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
-<tr class="memdesc:ga0e3ab1b57da32d45388d1fa90d7fd88c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Root Mean Square of the elements of a floating-point vector.  <a href="group__RMS.html#ga0e3ab1b57da32d45388d1fa90d7fd88c">More...</a><br/></td></tr>
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-<tr class="memitem:gae33015fda23fc44e7ead5e5ed7e8d314"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RMS.html#gae33015fda23fc44e7ead5e5ed7e8d314">arm_rms_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
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-<tr class="memitem:gaf5b836b72dda9e5dfbbd17c7906fd13f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RMS.html#gaf5b836b72dda9e5dfbbd17c7906fd13f">arm_rms_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult)</td></tr>
-<tr class="memdesc:gaf5b836b72dda9e5dfbbd17c7906fd13f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Root Mean Square of the elements of a Q15 vector.  <a href="group__RMS.html#gaf5b836b72dda9e5dfbbd17c7906fd13f">More...</a><br/></td></tr>
-<tr class="separator:gaf5b836b72dda9e5dfbbd17c7906fd13f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga4969b5b5f3d001377bc401a3ee99dfc2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__STD.html#ga4969b5b5f3d001377bc401a3ee99dfc2">arm_std_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
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-<tr class="separator:ga4969b5b5f3d001377bc401a3ee99dfc2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga39495e74f96116178be085c9dc7742f5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__STD.html#ga39495e74f96116178be085c9dc7742f5">arm_std_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
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-<tr class="memitem:gaf9d27afa9928ff28a63cd98ea9218a72"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__STD.html#gaf9d27afa9928ff28a63cd98ea9218a72">arm_std_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult)</td></tr>
-<tr class="memdesc:gaf9d27afa9928ff28a63cd98ea9218a72"><td class="mdescLeft">&#160;</td><td class="mdescRight">Standard deviation of the elements of a Q15 vector.  <a href="group__STD.html#gaf9d27afa9928ff28a63cd98ea9218a72">More...</a><br/></td></tr>
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-<tr class="memitem:gae45024c497392cde2ae358a76d435213"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag.html#gae45024c497392cde2ae358a76d435213">arm_cmplx_mag_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:gae45024c497392cde2ae358a76d435213"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex magnitude.  <a href="group__cmplx__mag.html#gae45024c497392cde2ae358a76d435213">More...</a><br/></td></tr>
-<tr class="separator:gae45024c497392cde2ae358a76d435213"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga14f82f9230e9d96d5b9774e2fefcb7be"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag.html#ga14f82f9230e9d96d5b9774e2fefcb7be">arm_cmplx_mag_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:ga14f82f9230e9d96d5b9774e2fefcb7be"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex magnitude.  <a href="group__cmplx__mag.html#ga14f82f9230e9d96d5b9774e2fefcb7be">More...</a><br/></td></tr>
-<tr class="separator:ga14f82f9230e9d96d5b9774e2fefcb7be"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga0a4a8f77a6a51d9b3f3b9d729f85b7a4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag.html#ga0a4a8f77a6a51d9b3f3b9d729f85b7a4">arm_cmplx_mag_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t numSamples)</td></tr>
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-<tr class="separator:ga0a4a8f77a6a51d9b3f3b9d729f85b7a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga2b08b5e8001d2c15204639d00893fc70"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__dot__prod.html#ga2b08b5e8001d2c15204639d00893fc70">arm_cmplx_dot_prod_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t numSamples, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *realResult, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *imagResult)</td></tr>
-<tr class="memdesc:ga2b08b5e8001d2c15204639d00893fc70"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex dot product.  <a href="group__cmplx__dot__prod.html#ga2b08b5e8001d2c15204639d00893fc70">More...</a><br/></td></tr>
-<tr class="separator:ga2b08b5e8001d2c15204639d00893fc70"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga5b731a59db062a9ad84562ef68a6c8af"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__dot__prod.html#ga5b731a59db062a9ad84562ef68a6c8af">arm_cmplx_dot_prod_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t numSamples, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *realResult, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *imagResult)</td></tr>
-<tr class="memdesc:ga5b731a59db062a9ad84562ef68a6c8af"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex dot product.  <a href="group__cmplx__dot__prod.html#ga5b731a59db062a9ad84562ef68a6c8af">More...</a><br/></td></tr>
-<tr class="separator:ga5b731a59db062a9ad84562ef68a6c8af"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gadcfaf567a25eb641da4043eafb9bb076"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__dot__prod.html#gadcfaf567a25eb641da4043eafb9bb076">arm_cmplx_dot_prod_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, uint32_t numSamples, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *realResult, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *imagResult)</td></tr>
-<tr class="memdesc:gadcfaf567a25eb641da4043eafb9bb076"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex dot product.  <a href="group__cmplx__dot__prod.html#gadcfaf567a25eb641da4043eafb9bb076">More...</a><br/></td></tr>
-<tr class="separator:gadcfaf567a25eb641da4043eafb9bb076"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga3bd8889dcb45980e1d3e53344df54e85"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByRealMult.html#ga3bd8889dcb45980e1d3e53344df54e85">arm_cmplx_mult_real_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcCmplx, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcReal, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCmplxDst, uint32_t numSamples)</td></tr>
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-<tr class="separator:ga3bd8889dcb45980e1d3e53344df54e85"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga715e4bb8e945b8ca51ec5237611697ce"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByRealMult.html#ga715e4bb8e945b8ca51ec5237611697ce">arm_cmplx_mult_real_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcCmplx, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcReal, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCmplxDst, uint32_t numSamples)</td></tr>
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-<tr class="separator:ga715e4bb8e945b8ca51ec5237611697ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga9c18616f56cb4d3c0889ce0b339221ca"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByRealMult.html#ga9c18616f56cb4d3c0889ce0b339221ca">arm_cmplx_mult_real_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcCmplx, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcReal, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCmplxDst, uint32_t numSamples)</td></tr>
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-<tr class="separator:ga9c18616f56cb4d3c0889ce0b339221ca"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga3631d38ac8d715fc14f6f1b343f4c4ed"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Min.html#ga3631d38ac8d715fc14f6f1b343f4c4ed">arm_min_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *result, uint32_t *index)</td></tr>
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-<tr class="separator:ga3631d38ac8d715fc14f6f1b343f4c4ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad065e37535ebb726750ac1545cb3fa6f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Min.html#gad065e37535ebb726750ac1545cb3fa6f">arm_min_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult, uint32_t *pIndex)</td></tr>
-<tr class="memdesc:gad065e37535ebb726750ac1545cb3fa6f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum value of a Q15 vector.  <a href="group__Min.html#gad065e37535ebb726750ac1545cb3fa6f">More...</a><br/></td></tr>
-<tr class="separator:gad065e37535ebb726750ac1545cb3fa6f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab20faeceb5ff5d2d9dd628c2ecf41303"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Min.html#gab20faeceb5ff5d2d9dd628c2ecf41303">arm_min_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult, uint32_t *pIndex)</td></tr>
-<tr class="memdesc:gab20faeceb5ff5d2d9dd628c2ecf41303"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum value of a Q31 vector.  <a href="group__Min.html#gab20faeceb5ff5d2d9dd628c2ecf41303">More...</a><br/></td></tr>
-<tr class="separator:gab20faeceb5ff5d2d9dd628c2ecf41303"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf62b1673740fc516ea64daf777b7d74a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Min.html#gaf62b1673740fc516ea64daf777b7d74a">arm_min_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult, uint32_t *pIndex)</td></tr>
-<tr class="memdesc:gaf62b1673740fc516ea64daf777b7d74a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum value of a floating-point vector.  <a href="group__Min.html#gaf62b1673740fc516ea64daf777b7d74a">More...</a><br/></td></tr>
-<tr class="separator:gaf62b1673740fc516ea64daf777b7d74a"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga6afd64d381b5c232de59163ebfe71e35"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Max.html#ga6afd64d381b5c232de59163ebfe71e35">arm_max_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pResult, uint32_t *pIndex)</td></tr>
-<tr class="memdesc:ga6afd64d381b5c232de59163ebfe71e35"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a Q7 vector.  <a href="group__Max.html#ga6afd64d381b5c232de59163ebfe71e35">More...</a><br/></td></tr>
-<tr class="separator:ga6afd64d381b5c232de59163ebfe71e35"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac132856c68f4bf2a056eaad5921c7880"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Max.html#gac132856c68f4bf2a056eaad5921c7880">arm_max_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult, uint32_t *pIndex)</td></tr>
-<tr class="memdesc:gac132856c68f4bf2a056eaad5921c7880"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a Q15 vector.  <a href="group__Max.html#gac132856c68f4bf2a056eaad5921c7880">More...</a><br/></td></tr>
-<tr class="separator:gac132856c68f4bf2a056eaad5921c7880"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaff7cbd4e955382def06724cc4cc85795"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Max.html#gaff7cbd4e955382def06724cc4cc85795">arm_max_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult, uint32_t *pIndex)</td></tr>
-<tr class="memdesc:gaff7cbd4e955382def06724cc4cc85795"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a Q31 vector.  <a href="group__Max.html#gaff7cbd4e955382def06724cc4cc85795">More...</a><br/></td></tr>
-<tr class="separator:gaff7cbd4e955382def06724cc4cc85795"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga5b89d1b04575aeec494f678695fb87d8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Max.html#ga5b89d1b04575aeec494f678695fb87d8">arm_max_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult, uint32_t *pIndex)</td></tr>
-<tr class="memdesc:ga5b89d1b04575aeec494f678695fb87d8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a floating-point vector.  <a href="group__Max.html#ga5b89d1b04575aeec494f678695fb87d8">More...</a><br/></td></tr>
-<tr class="separator:ga5b89d1b04575aeec494f678695fb87d8"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga67e96abfc9c3e30efb70a2ec9d0fe7e8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByCmplxMult.html#ga67e96abfc9c3e30efb70a2ec9d0fe7e8">arm_cmplx_mult_cmplx_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:ga67e96abfc9c3e30efb70a2ec9d0fe7e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex-by-complex multiplication.  <a href="group__CmplxByCmplxMult.html#ga67e96abfc9c3e30efb70a2ec9d0fe7e8">More...</a><br/></td></tr>
-<tr class="separator:ga67e96abfc9c3e30efb70a2ec9d0fe7e8"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga1829e50993a90742de225a0ce4213838"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByCmplxMult.html#ga1829e50993a90742de225a0ce4213838">arm_cmplx_mult_cmplx_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:ga1829e50993a90742de225a0ce4213838"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex-by-complex multiplication.  <a href="group__CmplxByCmplxMult.html#ga1829e50993a90742de225a0ce4213838">More...</a><br/></td></tr>
-<tr class="separator:ga1829e50993a90742de225a0ce4213838"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga14b47080054a1ba1250a86805be1ff6b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByCmplxMult.html#ga14b47080054a1ba1250a86805be1ff6b">arm_cmplx_mult_cmplx_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:ga14b47080054a1ba1250a86805be1ff6b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex-by-complex multiplication.  <a href="group__CmplxByCmplxMult.html#ga14b47080054a1ba1250a86805be1ff6b">More...</a><br/></td></tr>
-<tr class="separator:ga14b47080054a1ba1250a86805be1ff6b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga177704107f94564e9abe4daaa36f4554"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__float__to__x.html#ga177704107f94564e9abe4daaa36f4554">arm_float_to_q31</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga177704107f94564e9abe4daaa36f4554"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the floating-point vector to Q31 vector.  <a href="group__float__to__x.html#ga177704107f94564e9abe4daaa36f4554">More...</a><br/></td></tr>
-<tr class="separator:ga177704107f94564e9abe4daaa36f4554"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga215456e35a18db86882e1d3f0d24e1f2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__float__to__x.html#ga215456e35a18db86882e1d3f0d24e1f2">arm_float_to_q15</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga215456e35a18db86882e1d3f0d24e1f2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the floating-point vector to Q15 vector.  <a href="group__float__to__x.html#ga215456e35a18db86882e1d3f0d24e1f2">More...</a><br/></td></tr>
-<tr class="separator:ga215456e35a18db86882e1d3f0d24e1f2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga44a393818cdee8dce80f2d66add25411"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__float__to__x.html#ga44a393818cdee8dce80f2d66add25411">arm_float_to_q7</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga44a393818cdee8dce80f2d66add25411"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the floating-point vector to Q7 vector.  <a href="group__float__to__x.html#ga44a393818cdee8dce80f2d66add25411">More...</a><br/></td></tr>
-<tr class="separator:ga44a393818cdee8dce80f2d66add25411"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga901dede4661365c9e7c630d3eb31c32c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q31__to__x.html#ga901dede4661365c9e7c630d3eb31c32c">arm_q31_to_q15</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga901dede4661365c9e7c630d3eb31c32c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q31 vector to Q15 vector.  <a href="group__q31__to__x.html#ga901dede4661365c9e7c630d3eb31c32c">More...</a><br/></td></tr>
-<tr class="separator:ga901dede4661365c9e7c630d3eb31c32c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga7f297d1a7d776805395095fdb24a8071"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q31__to__x.html#ga7f297d1a7d776805395095fdb24a8071">arm_q31_to_q7</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga7f297d1a7d776805395095fdb24a8071"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q31 vector to Q7 vector.  <a href="group__q31__to__x.html#ga7f297d1a7d776805395095fdb24a8071">More...</a><br/></td></tr>
-<tr class="separator:ga7f297d1a7d776805395095fdb24a8071"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf8b0d2324de273fc430b0e61ad4e9eb2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q15__to__x.html#gaf8b0d2324de273fc430b0e61ad4e9eb2">arm_q15_to_float</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaf8b0d2324de273fc430b0e61ad4e9eb2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q15 vector to floating-point vector.  <a href="group__q15__to__x.html#gaf8b0d2324de273fc430b0e61ad4e9eb2">More...</a><br/></td></tr>
-<tr class="separator:gaf8b0d2324de273fc430b0e61ad4e9eb2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga7ba2d87366990ad5380439e2b4a4c0a5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q15__to__x.html#ga7ba2d87366990ad5380439e2b4a4c0a5">arm_q15_to_q31</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga7ba2d87366990ad5380439e2b4a4c0a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q15 vector to Q31 vector.  <a href="group__q15__to__x.html#ga7ba2d87366990ad5380439e2b4a4c0a5">More...</a><br/></td></tr>
-<tr class="separator:ga7ba2d87366990ad5380439e2b4a4c0a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga8fb31855ff8cce09c2ec9308f48ded69"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q15__to__x.html#ga8fb31855ff8cce09c2ec9308f48ded69">arm_q15_to_q7</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
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-<tr class="separator:ga8fb31855ff8cce09c2ec9308f48ded69"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaba67d2ba2acbd428832f106de29b8627"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
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-<tr class="memdesc:gaba67d2ba2acbd428832f106de29b8627"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point bilinear interpolation.  <a href="group__BilinearInterpolate.html#gaba67d2ba2acbd428832f106de29b8627">More...</a><br/></td></tr>
-<tr class="separator:gaba67d2ba2acbd428832f106de29b8627"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga79d374eda5d39e220b0423ba3cb90c6e"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BilinearInterpolate.html#ga79d374eda5d39e220b0423ba3cb90c6e">arm_bilinear_interp_q31</a> (<a class="el" href="structarm__bilinear__interp__instance__q31.html">arm_bilinear_interp_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> X, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Y)</td></tr>
-<tr class="memdesc:ga79d374eda5d39e220b0423ba3cb90c6e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 bilinear interpolation.  <a href="group__BilinearInterpolate.html#ga79d374eda5d39e220b0423ba3cb90c6e">More...</a><br/></td></tr>
-<tr class="separator:ga79d374eda5d39e220b0423ba3cb90c6e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga5f9b61bcae6d9295d926810cf398dd53"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BilinearInterpolate.html#ga5f9b61bcae6d9295d926810cf398dd53">arm_bilinear_interp_q15</a> (<a class="el" href="structarm__bilinear__interp__instance__q15.html">arm_bilinear_interp_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> X, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Y)</td></tr>
-<tr class="memdesc:ga5f9b61bcae6d9295d926810cf398dd53"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 bilinear interpolation.  <a href="group__BilinearInterpolate.html#ga5f9b61bcae6d9295d926810cf398dd53">More...</a><br/></td></tr>
-<tr class="separator:ga5f9b61bcae6d9295d926810cf398dd53"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga0a986d4a01039914a9d6e81e9a4ccda0"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BilinearInterpolate.html#ga0a986d4a01039914a9d6e81e9a4ccda0">arm_bilinear_interp_q7</a> (<a class="el" href="structarm__bilinear__interp__instance__q7.html">arm_bilinear_interp_instance_q7</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> X, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Y)</td></tr>
-<tr class="memdesc:ga0a986d4a01039914a9d6e81e9a4ccda0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 bilinear interpolation.  <a href="group__BilinearInterpolate.html#ga0a986d4a01039914a9d6e81e9a4ccda0">More...</a><br/></td></tr>
-<tr class="separator:ga0a986d4a01039914a9d6e81e9a4ccda0"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa9b8a2bea8a22489bfd968eb4687a7bd"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__SQRT.html#gaa9b8a2bea8a22489bfd968eb4687a7bd">arm_vsqrt_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pIn, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pOut, uint16_t len)</td></tr>
+<tr class="memdesc:gaa9b8a2bea8a22489bfd968eb4687a7bd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Vector Floating-point square root function.  <a href="group__SQRT.html#gaa9b8a2bea8a22489bfd968eb4687a7bd">More...</a><br/></td></tr>
+<tr class="separator:gaa9b8a2bea8a22489bfd968eb4687a7bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5955b76f2a60c1636ff507182000193d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__SQRT.html#ga5955b76f2a60c1636ff507182000193d">arm_vsqrt_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pIn, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pOut, uint16_t len)</td></tr>
+<tr class="separator:ga5955b76f2a60c1636ff507182000193d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga793f913a2b3a8f45577db36136954cdc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__SQRT.html#ga793f913a2b3a8f45577db36136954cdc">arm_vsqrt_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pIn, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pOut, uint16_t len)</td></tr>
+<tr class="separator:ga793f913a2b3a8f45577db36136954cdc"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a189501700cbecf81c08a005bb16939d9"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a189501700cbecf81c08a005bb16939d9">arm_circularWrite_f32</a> (int32_t *circBuffer, int32_t L, uint16_t *writeOffset, int32_t bufferInc, const int32_t *src, int32_t srcInc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:a189501700cbecf81c08a005bb16939d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">floating-point Circular write function.  <a href="#a189501700cbecf81c08a005bb16939d9">More...</a><br/></td></tr>
+<tr class="separator:a189501700cbecf81c08a005bb16939d9"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:aa0e8f158699a65e023960d555274ad39"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#aa0e8f158699a65e023960d555274ad39">arm_circularRead_f32</a> (int32_t *circBuffer, int32_t L, int32_t *readOffset, int32_t bufferInc, int32_t *dst, int32_t *dst_base, int32_t dst_length, int32_t dstInc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:aa0e8f158699a65e023960d555274ad39"><td class="mdescLeft">&#160;</td><td class="mdescRight">floating-point Circular Read function.  <a href="#aa0e8f158699a65e023960d555274ad39">More...</a><br/></td></tr>
+<tr class="separator:aa0e8f158699a65e023960d555274ad39"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a6799f043f7ab70c0d0e06fb9abbecb6e"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a6799f043f7ab70c0d0e06fb9abbecb6e">arm_circularWrite_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *circBuffer, int32_t L, uint16_t *writeOffset, int32_t bufferInc, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *src, int32_t srcInc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:a6799f043f7ab70c0d0e06fb9abbecb6e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 Circular write function.  <a href="#a6799f043f7ab70c0d0e06fb9abbecb6e">More...</a><br/></td></tr>
+<tr class="separator:a6799f043f7ab70c0d0e06fb9abbecb6e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a4d8edf2fbaa68badce77740563de353f"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a4d8edf2fbaa68badce77740563de353f">arm_circularRead_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *circBuffer, int32_t L, int32_t *readOffset, int32_t bufferInc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *dst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *dst_base, int32_t dst_length, int32_t dstInc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:a4d8edf2fbaa68badce77740563de353f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 Circular Read function.  <a href="#a4d8edf2fbaa68badce77740563de353f">More...</a><br/></td></tr>
+<tr class="separator:a4d8edf2fbaa68badce77740563de353f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a28179a962e4bb51c73c195dcb2f969aa"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a28179a962e4bb51c73c195dcb2f969aa">arm_circularWrite_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *circBuffer, int32_t L, uint16_t *writeOffset, int32_t bufferInc, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *src, int32_t srcInc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:a28179a962e4bb51c73c195dcb2f969aa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 Circular write function.  <a href="#a28179a962e4bb51c73c195dcb2f969aa">More...</a><br/></td></tr>
+<tr class="separator:a28179a962e4bb51c73c195dcb2f969aa"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a734e6ec2b2d568236816464967326748"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__math_8h.html#a734e6ec2b2d568236816464967326748">arm_circularRead_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *circBuffer, int32_t L, int32_t *readOffset, int32_t bufferInc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *dst, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *dst_base, int32_t dst_length, int32_t dstInc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:a734e6ec2b2d568236816464967326748"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 Circular Read function.  <a href="#a734e6ec2b2d568236816464967326748">More...</a><br/></td></tr>
+<tr class="separator:a734e6ec2b2d568236816464967326748"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae490bf87084bcdb5dc9fd1d2ef4030b9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#gae490bf87084bcdb5dc9fd1d2ef4030b9">arm_power_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *pResult)</td></tr>
+<tr class="memdesc:gae490bf87084bcdb5dc9fd1d2ef4030b9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a Q31 vector.  <a href="group__power.html#gae490bf87084bcdb5dc9fd1d2ef4030b9">More...</a><br/></td></tr>
+<tr class="separator:gae490bf87084bcdb5dc9fd1d2ef4030b9"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad0630e3743da2b5aedbe2bb624a8532f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#gad0630e3743da2b5aedbe2bb624a8532f">arm_power_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
+<tr class="memdesc:gad0630e3743da2b5aedbe2bb624a8532f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a floating-point vector.  <a href="group__power.html#gad0630e3743da2b5aedbe2bb624a8532f">More...</a><br/></td></tr>
+<tr class="separator:gad0630e3743da2b5aedbe2bb624a8532f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga6b87986c6a3617d4fc32c0572a07706c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#ga6b87986c6a3617d4fc32c0572a07706c">arm_power_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *pResult)</td></tr>
+<tr class="memdesc:ga6b87986c6a3617d4fc32c0572a07706c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a Q15 vector.  <a href="group__power.html#ga6b87986c6a3617d4fc32c0572a07706c">More...</a><br/></td></tr>
+<tr class="separator:ga6b87986c6a3617d4fc32c0572a07706c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaeb3b9b8e0a4c4bb2549ede074cf43f58"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#gaeb3b9b8e0a4c4bb2549ede074cf43f58">arm_power_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
+<tr class="memdesc:gaeb3b9b8e0a4c4bb2549ede074cf43f58"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a Q7 vector.  <a href="group__power.html#gaeb3b9b8e0a4c4bb2549ede074cf43f58">More...</a><br/></td></tr>
+<tr class="separator:gaeb3b9b8e0a4c4bb2549ede074cf43f58"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa907ace253a82be0741a3203ac04601c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#gaa907ace253a82be0741a3203ac04601c">arm_mean_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pResult)</td></tr>
+<tr class="memdesc:gaa907ace253a82be0741a3203ac04601c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a Q7 vector.  <a href="group__mean.html#gaa907ace253a82be0741a3203ac04601c">More...</a><br/></td></tr>
+<tr class="separator:gaa907ace253a82be0741a3203ac04601c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga55fc43607651123ffe3b967e30305734"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#ga55fc43607651123ffe3b967e30305734">arm_mean_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult)</td></tr>
+<tr class="memdesc:ga55fc43607651123ffe3b967e30305734"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a Q15 vector.  <a href="group__mean.html#ga55fc43607651123ffe3b967e30305734">More...</a><br/></td></tr>
+<tr class="separator:ga55fc43607651123ffe3b967e30305734"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab86ec60eba14c4bc4e2bd9b54ac4b487"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#gab86ec60eba14c4bc4e2bd9b54ac4b487">arm_mean_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
+<tr class="memdesc:gab86ec60eba14c4bc4e2bd9b54ac4b487"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a Q31 vector.  <a href="group__mean.html#gab86ec60eba14c4bc4e2bd9b54ac4b487">More...</a><br/></td></tr>
+<tr class="separator:gab86ec60eba14c4bc4e2bd9b54ac4b487"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae4fb7698771d7c24f536ed24347c1488"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#gae4fb7698771d7c24f536ed24347c1488">arm_mean_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
+<tr class="memdesc:gae4fb7698771d7c24f536ed24347c1488"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a floating-point vector.  <a href="group__mean.html#gae4fb7698771d7c24f536ed24347c1488">More...</a><br/></td></tr>
+<tr class="separator:gae4fb7698771d7c24f536ed24347c1488"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaae455544f0c8ac92469a1e25d3906515"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__variance.html#gaae455544f0c8ac92469a1e25d3906515">arm_var_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
+<tr class="memdesc:gaae455544f0c8ac92469a1e25d3906515"><td class="mdescLeft">&#160;</td><td class="mdescRight">Variance of the elements of a floating-point vector.  <a href="group__variance.html#gaae455544f0c8ac92469a1e25d3906515">More...</a><br/></td></tr>
+<tr class="separator:gaae455544f0c8ac92469a1e25d3906515"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga87a07c87c1d85104de0ea4a3d017454c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__variance.html#ga87a07c87c1d85104de0ea4a3d017454c">arm_var_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
+<tr class="memdesc:ga87a07c87c1d85104de0ea4a3d017454c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Variance of the elements of a Q31 vector.  <a href="group__variance.html#ga87a07c87c1d85104de0ea4a3d017454c">More...</a><br/></td></tr>
+<tr class="separator:ga87a07c87c1d85104de0ea4a3d017454c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaef3ebc6401209c3f93749e08d341ab48"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__variance.html#gaef3ebc6401209c3f93749e08d341ab48">arm_var_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult)</td></tr>
+<tr class="memdesc:gaef3ebc6401209c3f93749e08d341ab48"><td class="mdescLeft">&#160;</td><td class="mdescRight">Variance of the elements of a Q15 vector.  <a href="group__variance.html#gaef3ebc6401209c3f93749e08d341ab48">More...</a><br/></td></tr>
+<tr class="separator:gaef3ebc6401209c3f93749e08d341ab48"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaeb487e726e3755a7614a29c9d16a93e7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RMS.html#gaeb487e726e3755a7614a29c9d16a93e7">arm_rms_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
+<tr class="memdesc:gaeb487e726e3755a7614a29c9d16a93e7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Root Mean Square of the elements of a floating-point vector.  <a href="group__RMS.html#gaeb487e726e3755a7614a29c9d16a93e7">More...</a><br/></td></tr>
+<tr class="separator:gaeb487e726e3755a7614a29c9d16a93e7"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga20586bc59cabbfc38a935c2448833dd2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RMS.html#ga20586bc59cabbfc38a935c2448833dd2">arm_rms_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
+<tr class="memdesc:ga20586bc59cabbfc38a935c2448833dd2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Root Mean Square of the elements of a Q31 vector.  <a href="group__RMS.html#ga20586bc59cabbfc38a935c2448833dd2">More...</a><br/></td></tr>
+<tr class="separator:ga20586bc59cabbfc38a935c2448833dd2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga8be796318d41c7cbb68f8f3c0b96020f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RMS.html#ga8be796318d41c7cbb68f8f3c0b96020f">arm_rms_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult)</td></tr>
+<tr class="memdesc:ga8be796318d41c7cbb68f8f3c0b96020f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Root Mean Square of the elements of a Q15 vector.  <a href="group__RMS.html#ga8be796318d41c7cbb68f8f3c0b96020f">More...</a><br/></td></tr>
+<tr class="separator:ga8be796318d41c7cbb68f8f3c0b96020f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga287b6ce703636c7e8cb9833b290ae4ce"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__STD.html#ga287b6ce703636c7e8cb9833b290ae4ce">arm_std_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
+<tr class="memdesc:ga287b6ce703636c7e8cb9833b290ae4ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Standard deviation of the elements of a floating-point vector.  <a href="group__STD.html#ga287b6ce703636c7e8cb9833b290ae4ce">More...</a><br/></td></tr>
+<tr class="separator:ga287b6ce703636c7e8cb9833b290ae4ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafe382f5d8f3e7d310f2e2f2b5d873797"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__STD.html#gafe382f5d8f3e7d310f2e2f2b5d873797">arm_std_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
+<tr class="memdesc:gafe382f5d8f3e7d310f2e2f2b5d873797"><td class="mdescLeft">&#160;</td><td class="mdescRight">Standard deviation of the elements of a Q31 vector.  <a href="group__STD.html#gafe382f5d8f3e7d310f2e2f2b5d873797">More...</a><br/></td></tr>
+<tr class="separator:gafe382f5d8f3e7d310f2e2f2b5d873797"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4179a8150b161ce2c3d734d8cb19cebe"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__STD.html#ga4179a8150b161ce2c3d734d8cb19cebe">arm_std_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult)</td></tr>
+<tr class="memdesc:ga4179a8150b161ce2c3d734d8cb19cebe"><td class="mdescLeft">&#160;</td><td class="mdescRight">Standard deviation of the elements of a Q15 vector.  <a href="group__STD.html#ga4179a8150b161ce2c3d734d8cb19cebe">More...</a><br/></td></tr>
+<tr class="separator:ga4179a8150b161ce2c3d734d8cb19cebe"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaba4e0eff7816fe80d01121fb4cf6c6bc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag.html#gaba4e0eff7816fe80d01121fb4cf6c6bc">arm_cmplx_mag_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:gaba4e0eff7816fe80d01121fb4cf6c6bc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex magnitude.  <a href="group__cmplx__mag.html#gaba4e0eff7816fe80d01121fb4cf6c6bc">More...</a><br/></td></tr>
+<tr class="separator:gaba4e0eff7816fe80d01121fb4cf6c6bc"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab69ad9237469565958cce6b4555bbb6e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag.html#gab69ad9237469565958cce6b4555bbb6e">arm_cmplx_mag_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:gab69ad9237469565958cce6b4555bbb6e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex magnitude.  <a href="group__cmplx__mag.html#gab69ad9237469565958cce6b4555bbb6e">More...</a><br/></td></tr>
+<tr class="separator:gab69ad9237469565958cce6b4555bbb6e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0488e185f4631ac029b02f1759b287cf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag.html#ga0488e185f4631ac029b02f1759b287cf">arm_cmplx_mag_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:ga0488e185f4631ac029b02f1759b287cf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex magnitude.  <a href="group__cmplx__mag.html#ga0488e185f4631ac029b02f1759b287cf">More...</a><br/></td></tr>
+<tr class="separator:ga0488e185f4631ac029b02f1759b287cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae712971379c461cfb8bef7e423bf8417"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__dot__prod.html#gae712971379c461cfb8bef7e423bf8417">arm_cmplx_dot_prod_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t numSamples, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *realResult, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *imagResult)</td></tr>
+<tr class="memdesc:gae712971379c461cfb8bef7e423bf8417"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex dot product.  <a href="group__cmplx__dot__prod.html#gae712971379c461cfb8bef7e423bf8417">More...</a><br/></td></tr>
+<tr class="separator:gae712971379c461cfb8bef7e423bf8417"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa90661b5eee3b6d83a149043ada0eb37"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__dot__prod.html#gaa90661b5eee3b6d83a149043ada0eb37">arm_cmplx_dot_prod_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t numSamples, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *realResult, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *imagResult)</td></tr>
+<tr class="memdesc:gaa90661b5eee3b6d83a149043ada0eb37"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex dot product.  <a href="group__cmplx__dot__prod.html#gaa90661b5eee3b6d83a149043ada0eb37">More...</a><br/></td></tr>
+<tr class="separator:gaa90661b5eee3b6d83a149043ada0eb37"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga93796e73f02771cf6fe13de016e296ed"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__dot__prod.html#ga93796e73f02771cf6fe13de016e296ed">arm_cmplx_dot_prod_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, uint32_t numSamples, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *realResult, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *imagResult)</td></tr>
+<tr class="memdesc:ga93796e73f02771cf6fe13de016e296ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex dot product.  <a href="group__cmplx__dot__prod.html#ga93796e73f02771cf6fe13de016e296ed">More...</a><br/></td></tr>
+<tr class="separator:ga93796e73f02771cf6fe13de016e296ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa41d60a567652bf6a783b916931bf20b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByRealMult.html#gaa41d60a567652bf6a783b916931bf20b">arm_cmplx_mult_real_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcCmplx, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcReal, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCmplxDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:gaa41d60a567652bf6a783b916931bf20b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex-by-real multiplication.  <a href="group__CmplxByRealMult.html#gaa41d60a567652bf6a783b916931bf20b">More...</a><br/></td></tr>
+<tr class="separator:gaa41d60a567652bf6a783b916931bf20b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0fe1cd71d35b4481f8ab69d502c96ace"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByRealMult.html#ga0fe1cd71d35b4481f8ab69d502c96ace">arm_cmplx_mult_real_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcCmplx, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcReal, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCmplxDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:ga0fe1cd71d35b4481f8ab69d502c96ace"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex-by-real multiplication.  <a href="group__CmplxByRealMult.html#ga0fe1cd71d35b4481f8ab69d502c96ace">More...</a><br/></td></tr>
+<tr class="separator:ga0fe1cd71d35b4481f8ab69d502c96ace"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga903eb30a02343574e46cb123b52232f4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByRealMult.html#ga903eb30a02343574e46cb123b52232f4">arm_cmplx_mult_real_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcCmplx, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcReal, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCmplxDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:ga903eb30a02343574e46cb123b52232f4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex-by-real multiplication.  <a href="group__CmplxByRealMult.html#ga903eb30a02343574e46cb123b52232f4">More...</a><br/></td></tr>
+<tr class="separator:ga903eb30a02343574e46cb123b52232f4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad66b651b1342c2411b4d8ca4955c03b3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Min.html#gad66b651b1342c2411b4d8ca4955c03b3">arm_min_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *result, uint32_t *index)</td></tr>
+<tr class="memdesc:gad66b651b1342c2411b4d8ca4955c03b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum value of a Q7 vector.  <a href="group__Min.html#gad66b651b1342c2411b4d8ca4955c03b3">More...</a><br/></td></tr>
+<tr class="separator:gad66b651b1342c2411b4d8ca4955c03b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9f163584c1131f37b1b22f59b976b822"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Min.html#ga9f163584c1131f37b1b22f59b976b822">arm_min_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult, uint32_t *pIndex)</td></tr>
+<tr class="memdesc:ga9f163584c1131f37b1b22f59b976b822"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum value of a Q15 vector.  <a href="group__Min.html#ga9f163584c1131f37b1b22f59b976b822">More...</a><br/></td></tr>
+<tr class="separator:ga9f163584c1131f37b1b22f59b976b822"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1969bd12eb46b412104f463305871493"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Min.html#ga1969bd12eb46b412104f463305871493">arm_min_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult, uint32_t *pIndex)</td></tr>
+<tr class="memdesc:ga1969bd12eb46b412104f463305871493"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum value of a Q31 vector.  <a href="group__Min.html#ga1969bd12eb46b412104f463305871493">More...</a><br/></td></tr>
+<tr class="separator:ga1969bd12eb46b412104f463305871493"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga514e2c920c432e1a3df2cb03f01d2797"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Min.html#ga514e2c920c432e1a3df2cb03f01d2797">arm_min_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult, uint32_t *pIndex)</td></tr>
+<tr class="memdesc:ga514e2c920c432e1a3df2cb03f01d2797"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum value of a floating-point vector.  <a href="group__Min.html#ga514e2c920c432e1a3df2cb03f01d2797">More...</a><br/></td></tr>
+<tr class="separator:ga514e2c920c432e1a3df2cb03f01d2797"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga504abf036854dc0c4a43bd9a27827863"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Max.html#ga504abf036854dc0c4a43bd9a27827863">arm_max_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pResult, uint32_t *pIndex)</td></tr>
+<tr class="memdesc:ga504abf036854dc0c4a43bd9a27827863"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a Q7 vector.  <a href="group__Max.html#ga504abf036854dc0c4a43bd9a27827863">More...</a><br/></td></tr>
+<tr class="separator:ga504abf036854dc0c4a43bd9a27827863"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaea9ba2039faeca04b034989a2a2a9e36"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Max.html#gaea9ba2039faeca04b034989a2a2a9e36">arm_max_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult, uint32_t *pIndex)</td></tr>
+<tr class="memdesc:gaea9ba2039faeca04b034989a2a2a9e36"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a Q15 vector.  <a href="group__Max.html#gaea9ba2039faeca04b034989a2a2a9e36">More...</a><br/></td></tr>
+<tr class="separator:gaea9ba2039faeca04b034989a2a2a9e36"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga74015f9e9852c710a981c5b488417298"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Max.html#ga74015f9e9852c710a981c5b488417298">arm_max_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult, uint32_t *pIndex)</td></tr>
+<tr class="memdesc:ga74015f9e9852c710a981c5b488417298"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a Q31 vector.  <a href="group__Max.html#ga74015f9e9852c710a981c5b488417298">More...</a><br/></td></tr>
+<tr class="separator:ga74015f9e9852c710a981c5b488417298"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad1eabd31544fe59c414d9ce5bd0cc151"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Max.html#gad1eabd31544fe59c414d9ce5bd0cc151">arm_max_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult, uint32_t *pIndex)</td></tr>
+<tr class="memdesc:gad1eabd31544fe59c414d9ce5bd0cc151"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a floating-point vector.  <a href="group__Max.html#gad1eabd31544fe59c414d9ce5bd0cc151">More...</a><br/></td></tr>
+<tr class="separator:gad1eabd31544fe59c414d9ce5bd0cc151"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga683b32a91cffbf021f58ace5a62904e8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByCmplxMult.html#ga683b32a91cffbf021f58ace5a62904e8">arm_cmplx_mult_cmplx_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:ga683b32a91cffbf021f58ace5a62904e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex-by-complex multiplication.  <a href="group__CmplxByCmplxMult.html#ga683b32a91cffbf021f58ace5a62904e8">More...</a><br/></td></tr>
+<tr class="separator:ga683b32a91cffbf021f58ace5a62904e8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga7748c92e0922cf14e3d7bb257d77593f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByCmplxMult.html#ga7748c92e0922cf14e3d7bb257d77593f">arm_cmplx_mult_cmplx_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:ga7748c92e0922cf14e3d7bb257d77593f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex-by-complex multiplication.  <a href="group__CmplxByCmplxMult.html#ga7748c92e0922cf14e3d7bb257d77593f">More...</a><br/></td></tr>
+<tr class="separator:ga7748c92e0922cf14e3d7bb257d77593f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae221504b01e4abfe5f335eafd801b4ed"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByCmplxMult.html#gae221504b01e4abfe5f335eafd801b4ed">arm_cmplx_mult_cmplx_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:gae221504b01e4abfe5f335eafd801b4ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex-by-complex multiplication.  <a href="group__CmplxByCmplxMult.html#gae221504b01e4abfe5f335eafd801b4ed">More...</a><br/></td></tr>
+<tr class="separator:gae221504b01e4abfe5f335eafd801b4ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaae21be47db707e79552f3e8221a48fb0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__float__to__x.html#gaae21be47db707e79552f3e8221a48fb0">arm_float_to_q31</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaae21be47db707e79552f3e8221a48fb0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the floating-point vector to Q31 vector.  <a href="group__float__to__x.html#gaae21be47db707e79552f3e8221a48fb0">More...</a><br/></td></tr>
+<tr class="separator:gaae21be47db707e79552f3e8221a48fb0"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac7696e64963e5051ebb950c88c6ba186"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__float__to__x.html#gac7696e64963e5051ebb950c88c6ba186">arm_float_to_q15</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gac7696e64963e5051ebb950c88c6ba186"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the floating-point vector to Q15 vector.  <a href="group__float__to__x.html#gac7696e64963e5051ebb950c88c6ba186">More...</a><br/></td></tr>
+<tr class="separator:gac7696e64963e5051ebb950c88c6ba186"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga63b7cef42a242f0be43376ba3380988d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__float__to__x.html#ga63b7cef42a242f0be43376ba3380988d">arm_float_to_q7</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga63b7cef42a242f0be43376ba3380988d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the floating-point vector to Q7 vector.  <a href="group__float__to__x.html#ga63b7cef42a242f0be43376ba3380988d">More...</a><br/></td></tr>
+<tr class="separator:ga63b7cef42a242f0be43376ba3380988d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga19a9d023aca1f99abd5da6f13a42b6cf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q31__to__x.html#ga19a9d023aca1f99abd5da6f13a42b6cf">arm_q31_to_float</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga19a9d023aca1f99abd5da6f13a42b6cf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q31 vector to floating-point vector.  <a href="group__q31__to__x.html#ga19a9d023aca1f99abd5da6f13a42b6cf">More...</a><br/></td></tr>
+<tr class="separator:ga19a9d023aca1f99abd5da6f13a42b6cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga775f3a1996f00a8048c4b7acba2e0828"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q31__to__x.html#ga775f3a1996f00a8048c4b7acba2e0828">arm_q31_to_q15</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga775f3a1996f00a8048c4b7acba2e0828"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q31 vector to Q15 vector.  <a href="group__q31__to__x.html#ga775f3a1996f00a8048c4b7acba2e0828">More...</a><br/></td></tr>
+<tr class="separator:ga775f3a1996f00a8048c4b7acba2e0828"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gabef5357eb3348b3b5b38915fffce8f3d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q31__to__x.html#gabef5357eb3348b3b5b38915fffce8f3d">arm_q31_to_q7</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gabef5357eb3348b3b5b38915fffce8f3d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q31 vector to Q7 vector.  <a href="group__q31__to__x.html#gabef5357eb3348b3b5b38915fffce8f3d">More...</a><br/></td></tr>
+<tr class="separator:gabef5357eb3348b3b5b38915fffce8f3d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5a75381e7d63ea3a3a315344615281cf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q15__to__x.html#ga5a75381e7d63ea3a3a315344615281cf">arm_q15_to_float</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga5a75381e7d63ea3a3a315344615281cf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q15 vector to floating-point vector.  <a href="group__q15__to__x.html#ga5a75381e7d63ea3a3a315344615281cf">More...</a><br/></td></tr>
+<tr class="separator:ga5a75381e7d63ea3a3a315344615281cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga39647b2109a5c64a067b776302c4a083"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q15__to__x.html#ga39647b2109a5c64a067b776302c4a083">arm_q15_to_q31</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga39647b2109a5c64a067b776302c4a083"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q15 vector to Q31 vector.  <a href="group__q15__to__x.html#ga39647b2109a5c64a067b776302c4a083">More...</a><br/></td></tr>
+<tr class="separator:ga39647b2109a5c64a067b776302c4a083"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga837ce281d0e2d5fc445c48334307db19"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q15__to__x.html#ga837ce281d0e2d5fc445c48334307db19">arm_q15_to_q7</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga837ce281d0e2d5fc445c48334307db19"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q15 vector to Q7 vector.  <a href="group__q15__to__x.html#ga837ce281d0e2d5fc445c48334307db19">More...</a><br/></td></tr>
+<tr class="separator:ga837ce281d0e2d5fc445c48334307db19"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga840d8a0e8499d02a54f459bb29f5d63c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q7__to__x.html#ga840d8a0e8499d02a54f459bb29f5d63c">arm_q7_to_float</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga840d8a0e8499d02a54f459bb29f5d63c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q7 vector to floating-point vector.  <a href="group__q7__to__x.html#ga840d8a0e8499d02a54f459bb29f5d63c">More...</a><br/></td></tr>
+<tr class="separator:ga840d8a0e8499d02a54f459bb29f5d63c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga3c73bfb98fc5a1b4f612264662d0549c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q7__to__x.html#ga3c73bfb98fc5a1b4f612264662d0549c">arm_q7_to_q31</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga3c73bfb98fc5a1b4f612264662d0549c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q7 vector to Q31 vector.  <a href="group__q7__to__x.html#ga3c73bfb98fc5a1b4f612264662d0549c">More...</a><br/></td></tr>
+<tr class="separator:ga3c73bfb98fc5a1b4f612264662d0549c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1023c3832ca6be3a6d17ef338cafa28b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q7__to__x.html#ga1023c3832ca6be3a6d17ef338cafa28b">arm_q7_to_q15</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga1023c3832ca6be3a6d17ef338cafa28b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q7 vector to Q15 vector.  <a href="group__q7__to__x.html#ga1023c3832ca6be3a6d17ef338cafa28b">More...</a><br/></td></tr>
+<tr class="separator:ga1023c3832ca6be3a6d17ef338cafa28b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga887756dbbe013d0a15b987836a787677"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BilinearInterpolate.html#ga887756dbbe013d0a15b987836a787677">arm_bilinear_interp_f32</a> (const <a class="el" href="structarm__bilinear__interp__instance__f32.html">arm_bilinear_interp_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> X, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Y)</td></tr>
+<tr class="memdesc:ga887756dbbe013d0a15b987836a787677"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point bilinear interpolation.  <a href="group__BilinearInterpolate.html#ga887756dbbe013d0a15b987836a787677">More...</a><br/></td></tr>
+<tr class="separator:ga887756dbbe013d0a15b987836a787677"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaefe4731017e8b9ac652e5fea57cb1fa5"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BilinearInterpolate.html#gaefe4731017e8b9ac652e5fea57cb1fa5">arm_bilinear_interp_q31</a> (<a class="el" href="structarm__bilinear__interp__instance__q31.html">arm_bilinear_interp_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> X, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Y)</td></tr>
+<tr class="memdesc:gaefe4731017e8b9ac652e5fea57cb1fa5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 bilinear interpolation.  <a href="group__BilinearInterpolate.html#gaefe4731017e8b9ac652e5fea57cb1fa5">More...</a><br/></td></tr>
+<tr class="separator:gaefe4731017e8b9ac652e5fea57cb1fa5"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga56fe34273ffb422f428b1d9feeffe0ea"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BilinearInterpolate.html#ga56fe34273ffb422f428b1d9feeffe0ea">arm_bilinear_interp_q15</a> (<a class="el" href="structarm__bilinear__interp__instance__q15.html">arm_bilinear_interp_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> X, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Y)</td></tr>
+<tr class="memdesc:ga56fe34273ffb422f428b1d9feeffe0ea"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 bilinear interpolation.  <a href="group__BilinearInterpolate.html#ga56fe34273ffb422f428b1d9feeffe0ea">More...</a><br/></td></tr>
+<tr class="separator:ga56fe34273ffb422f428b1d9feeffe0ea"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1230bb062f6d8614db10b37ba7c9a161"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BilinearInterpolate.html#ga1230bb062f6d8614db10b37ba7c9a161">arm_bilinear_interp_q7</a> (<a class="el" href="structarm__bilinear__interp__instance__q7.html">arm_bilinear_interp_instance_q7</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> X, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Y)</td></tr>
+<tr class="memdesc:ga1230bb062f6d8614db10b37ba7c9a161"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 bilinear interpolation.  <a href="group__BilinearInterpolate.html#ga1230bb062f6d8614db10b37ba7c9a161">More...</a><br/></td></tr>
+<tr class="separator:ga1230bb062f6d8614db10b37ba7c9a161"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <h2 class="groupheader">Macro Definition Documentation</h2>
-<a class="anchor" id="a87c3b351c33a90de11a2f23e67867a8a"></a>
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-          <td class="memname">#define __CMSIS_GENERIC</td>
-        </tr>
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-<p>Referenced by <a class="el" href="group__Conv.html#ga4c7cf073e89d6d57cc4e711f078c3f68">arm_conv_opt_q7()</a>, <a class="el" href="group__PartialConv.html#ga3707e16af1435b215840006a7ab0c98f">arm_conv_partial_opt_q7()</a>, <a class="el" href="group__Fill.html#ga0465cf326ada039ed792f94b033d9ec5">arm_fill_q7()</a>, <a class="el" href="group__FIR__Sparse.html#gae86c145efc2d9ec32dc6d8c1ad2ccb3c">arm_fir_sparse_q7()</a>, <a class="el" href="group__BasicMult.html#ga16677275ed83ff0878da531e875c27ef">arm_mult_q7()</a>, <a class="el" href="group__offset.html#ga00bd9cc17c5bf905e76c91ad50886393">arm_offset_q7()</a>, <a class="el" href="group__q31__to__x.html#ga7f297d1a7d776805395095fdb24a8071">arm_q31_to_q7()</a>, <a class="el" href="group__scale.html#gabc9fd3d37904c58df56492b351d21fb0">arm_scale_q7()</a>, and <a class="el" href="group__shift.html#ga47295d08a685f7de700a48dafb4db6fb">arm_shift_q7()</a>.</p>
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@@ -1451,8 +1461,6 @@
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-<p>Referenced by <a class="el" href="group__BasicAbs.html#ga39f92964c9b649ba252e26ebe7b95594">arm_abs_q15()</a>, <a class="el" href="group__BiquadCascadeDF1.html#gaffb9792c0220882efd4c58f3c6a05fd7">arm_biquad_cascade_df1_fast_q15()</a>, <a class="el" href="group__BiquadCascadeDF1.html#gadd66a0aefdc645031d607b0a5b37a942">arm_biquad_cascade_df1_q15()</a>, <a class="el" href="group__CmplxByRealMult.html#ga3bd8889dcb45980e1d3e53344df54e85">arm_cmplx_mult_real_q15()</a>, <a class="el" href="group__Conv.html#gaf16f490d245391ec18a42adc73d6d749">arm_conv_fast_opt_q15()</a>, <a class="el" href="group__Conv.html#gad75ca978ce906e04abdf86a8d76306d4">arm_conv_fast_q15()</a>, <a class="el" href="group__Conv.html#gac77dbcaef5c754cac27eab96c4753a3c">arm_conv_opt_q15()</a>, <a class="el" href="group__Conv.html#ga4c7cf073e89d6d57cc4e711f078c3f68">arm_conv_opt_q7()</a>, <a class="el" href="group__PartialConv.html#ga3de9c4ddcc7886de25b70d875099a8d9">arm_conv_partial_fast_opt_q15()</a>, <a class="el" href="group__PartialConv.html#ga1e4d43385cb62262a78c6752fe1fafb2">arm_conv_partial_fast_q15()</a>, <a class="el" href="group__PartialConv.html#ga834b23b4ade8682beeb55778399101f8">arm_conv_partial_opt_q15()</a>, <a class="el" href="group__PartialConv.html#ga3707e16af1435b215840006a7ab0c98f">arm_conv_partial_opt_q7()</a>, <a class="el" href="group__PartialConv.html#ga209a2a913a0c5e5679c5988da8f46b03">arm_conv_partial_q15()</a>, <a class="el" href="group__Conv.html#gaccd6a89b0ff7a94df64610598e6e6893">arm_conv_q15()</a>, <a class="el" href="group__Corr.html#ga40a0236b17220e8e22a22b5bc1c53c6b">arm_correlate_fast_opt_q15()</a>, <a class="el" href="group__Corr.html#gac8de3da44f58e86c2c86156276ca154f">arm_correlate_fast_q15()</a>, <a class="el" href="group__Corr.html#gad71c0ec70ec69edbc48563d9a5f68451">arm_correlate_opt_q15()</a>, <a class="el" href="group__Corr.html#ga746e8857cafe33ec5d6780729c18c311">arm_correlate_opt_q7()</a>, <a class="el" href="group__Fill.html#ga76b21c32a3783a2b3334d930a646e5d8">arm_fill_q15()</a>, <a class="el" href="group__FIR.html#gac7d35e9472e49ccd88800f37f3476bd3">arm_fir_fast_q15()</a>, <a class="el" href="group__FIR__Lattice.html#gabb0ab07fd313b4d863070c3ddca51542">arm_fir_lattice_q15()</a>, <a class="el" href="group__FIR__Sparse.html#ga2bffda2e156e72427e19276cd9c3d3cc">arm_fir_sparse_q15()</a>, <a class="el" href="group__IIR__Lattice.html#gaeb9e9599a288832ed123183eaa8b294a">arm_iir_lattice_q15()</a>, <a class="el" href="group__MatrixScale.html#ga7521769e2cf1c3d9c4656138cd2ae2ca">arm_mat_scale_q15()</a>, <a class="el" href="group__BasicMult.html#gafb0778d27ed98a2a6f2ecb7d48cc8c75">arm_mult_q15()</a>, <a class="el" href="group__offset.html#gab4c1d2391b599549e5a06fdfbc2747bf">arm_offset_q15()</a>, <a class="el" href="group__PID.html#ga2cb1e3d3ebb167348fdabec74653d5c3">arm_pid_init_q15()</a>, <a class="el" href="group__q15__to__x.html#ga8fb31855ff8cce09c2ec9308f48ded69">arm_q15_to_q7()</a>, <a class="el" href="group__q7__to__x.html#gabc02597fc3f01033daf43ec0547a2f78">arm_q7_to_q15()</a>, <a class="el" href="group__scale.html#gafaac0e1927daffeb68a42719b53ea780">arm_scale_q15()</a>, <a class="el" href="group__shift.html#gaa1757e53279780107acc92cf100adb61">arm_shift_q15()</a>, and <a class="el" href="arm__rfft__q15_8c.html#aa72a531dd15a53570dddaf01b62158f4">arm_split_rifft_q15()</a>.</p>
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@@ -1485,8 +1493,6 @@
       </table>
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-<p>Referenced by <a class="el" href="group__q15__to__x.html#ga8fb31855ff8cce09c2ec9308f48ded69">arm_q15_to_q7()</a>, <a class="el" href="group__q31__to__x.html#ga901dede4661365c9e7c630d3eb31c32c">arm_q31_to_q15()</a>, and <a class="el" href="group__q7__to__x.html#gabc02597fc3f01033daf43ec0547a2f78">arm_q7_to_q15()</a>.</p>
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@@ -1502,8 +1508,7 @@
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-<p>Referenced by <a class="el" href="group__BasicAdd.html#gabb51285a41f511670bbff62fc0e1bf62">arm_add_q15()</a>, <a class="el" href="group__BasicAdd.html#gaed633f415a7840a66861debca2dfb96b">arm_add_q7()</a>, <a class="el" href="group__BiquadCascadeDF1.html#gaffb9792c0220882efd4c58f3c6a05fd7">arm_biquad_cascade_df1_fast_q15()</a>, <a class="el" href="group__BiquadCascadeDF1.html#gadd66a0aefdc645031d607b0a5b37a942">arm_biquad_cascade_df1_q15()</a>, <a class="el" href="group__cmplx__conj.html#gaf47689ae07962acaecb8ddde556df4a4">arm_cmplx_conj_q15()</a>, <a class="el" href="group__cmplx__mag.html#ga0a4a8f77a6a51d9b3f3b9d729f85b7a4">arm_cmplx_mag_q15()</a>, <a class="el" href="group__cmplx__mag__squared.html#ga45537f576102d960d467eb722b8431f2">arm_cmplx_mag_squared_q15()</a>, <a class="el" href="group__CmplxByRealMult.html#ga3bd8889dcb45980e1d3e53344df54e85">arm_cmplx_mult_real_q15()</a>, <a class="el" href="group__Conv.html#gaf16f490d245391ec18a42adc73d6d749">arm_conv_fast_opt_q15()</a>, <a class="el" href="group__Conv.html#gad75ca978ce906e04abdf86a8d76306d4">arm_conv_fast_q15()</a>, <a class="el" href="group__Conv.html#gac77dbcaef5c754cac27eab96c4753a3c">arm_conv_opt_q15()</a>, <a class="el" href="group__Conv.html#ga4c7cf073e89d6d57cc4e711f078c3f68">arm_conv_opt_q7()</a>, <a class="el" href="group__PartialConv.html#ga3de9c4ddcc7886de25b70d875099a8d9">arm_conv_partial_fast_opt_q15()</a>, <a class="el" href="group__PartialConv.html#ga1e4d43385cb62262a78c6752fe1fafb2">arm_conv_partial_fast_q15()</a>, <a class="el" href="group__PartialConv.html#ga834b23b4ade8682beeb55778399101f8">arm_conv_partial_opt_q15()</a>, <a class="el" href="group__PartialConv.html#ga3707e16af1435b215840006a7ab0c98f">arm_conv_partial_opt_q7()</a>, <a class="el" href="group__PartialConv.html#ga209a2a913a0c5e5679c5988da8f46b03">arm_conv_partial_q15()</a>, <a class="el" href="group__Conv.html#gaccd6a89b0ff7a94df64610598e6e6893">arm_conv_q15()</a>, <a class="el" href="group__copy.html#ga872ca4cfc18c680b8991ccd569a5fda0">arm_copy_q15()</a>, <a class="el" href="group__copy.html#ga467579beda492aa92797529d794c88fb">arm_copy_q7()</a>, <a class="el" href="group__Corr.html#ga40a0236b17220e8e22a22b5bc1c53c6b">arm_correlate_fast_opt_q15()</a>, <a class="el" href="group__Corr.html#gac8de3da44f58e86c2c86156276ca154f">arm_correlate_fast_q15()</a>, <a class="el" href="group__Corr.html#gad71c0ec70ec69edbc48563d9a5f68451">arm_correlate_opt_q15()</a>, <a class="el" href="group__Corr.html#ga746e8857cafe33ec5d6780729c18c311">arm_correlate_opt_q7()</a>, <a class="el" href="group__Corr.html#ga5ec96b8e420d68b0e626df0812274d46">arm_correlate_q15()</a>, <a class="el" href="group__dot__prod.html#ga436d5bed28a4b73b24acbde436a3044b">arm_dot_prod_q15()</a>, <a class="el" href="group__dot__prod.html#ga9c3293a50ac7ec8ba928bf8e3aaea6c1">arm_dot_prod_q7()</a>, <a class="el" href="group__Fill.html#ga76b21c32a3783a2b3334d930a646e5d8">arm_fill_q15()</a>, <a class="el" href="group__Fill.html#ga0465cf326ada039ed792f94b033d9ec5">arm_fill_q7()</a>, <a class="el" href="group__FIR__decimate.html#ga3f434c9a5d3b4e68061feac0714ea2ac">arm_fir_decimate_fast_q15()</a>, <a class="el" href="group__FIR.html#gac7d35e9472e49ccd88800f37f3476bd3">arm_fir_fast_q15()</a>, <a class="el" href="group__FIR__Lattice.html#gabb0ab07fd313b4d863070c3ddca51542">arm_fir_lattice_q15()</a>, <a class="el" href="group__FIR__Sparse.html#ga2bffda2e156e72427e19276cd9c3d3cc">arm_fir_sparse_q15()</a>, <a class="el" href="group__FIR__Sparse.html#gae86c145efc2d9ec32dc6d8c1ad2ccb3c">arm_fir_sparse_q7()</a>, <a class="el" href="group__IIR__Lattice.html#gaeb9e9599a288832ed123183eaa8b294a">arm_iir_lattice_q15()</a>, <a class="el" href="group__LMS__NORM.html#gad47486a399dedb0bc85a5990ec5cf981">arm_lms_norm_q15()</a>, <a class="el" href="group__LMS.html#gacde16c17eb75979f81b34e2e2a58c7ac">arm_lms_q15()</a>, <a class="el" href="group__MatrixAdd.html#ga147e90b7c12a162735ab8824127a33ee">arm_mat_add_q15()</a>, <a class="el" href="group__CmplxMatrixMult.html#ga63066615e7d6f6a44f4358725092419e">arm_mat_cmplx_mult_q15()</a>, <a class="el" href="group__MatrixMult.html#ga08f37d93a5bfef0c5000dc5e0a411f93">arm_mat_mult_fast_q15()</a>, <a class="el" href="group__MatrixMult.html#ga7521d59196189bb6dde26e8cdfb66e21">arm_mat_mult_q15()</a>, <a class="el" href="group__MatrixSub.html#gaf647776a425b7f9dd0aca3e11d81f02f">arm_mat_sub_q15()</a>, <a class="el" href="group__MatrixTrans.html#ga4f4f821cc695fd0ef9061d702e08050a">arm_mat_trans_q15()</a>, <a class="el" href="group__mean.html#gac882495d5f098819fd3939c1ef7795b3">arm_mean_q15()</a>, <a class="el" href="group__mean.html#gaebc707ee539020357c25da4c75b52eb7">arm_mean_q7()</a>, <a class="el" href="group__BasicMult.html#gafb0778d27ed98a2a6f2ecb7d48cc8c75">arm_mult_q15()</a>, <a class="el" href="group__BasicMult.html#ga16677275ed83ff0878da531e875c27ef">arm_mult_q7()</a>, <a class="el" href="group__negate.html#gaae78fc079a43bdaa3055f9b32e2a1f4c">arm_negate_q7()</a>, <a class="el" href="group__offset.html#gab4c1d2391b599549e5a06fdfbc2747bf">arm_offset_q15()</a>, <a class="el" href="group__offset.html#ga00bd9cc17c5bf905e76c91ad50886393">arm_offset_q7()</a>, <a class="el" href="group__power.html#ga7050c04b7515e01a75c38f1abbaf71ba">arm_power_q15()</a>, <a class="el" href="group__power.html#gaf969c85c5655e3d72d7b99ff188f92c9">arm_power_q7()</a>, <a class="el" href="group__q15__to__x.html#ga7ba2d87366990ad5380439e2b4a4c0a5">arm_q15_to_q31()</a>, <a class="el" href="group__q15__to__x.html#ga8fb31855ff8cce09c2ec9308f48ded69">arm_q15_to_q7()</a>, <a class="el" href="group__q31__to__x.html#ga901dede4661365c9e7c630d3eb31c32c">arm_q31_to_q15()</a>, <a class="el" href="group__q31__to__x.html#ga7f297d1a7d776805395095fdb24a8071">arm_q31_to_q7()</a>, <a class="el" href="group__q7__to__x.html#gabc02597fc3f01033daf43ec0547a2f78">arm_q7_to_q15()</a>, <a class="el" href="group__q7__to__x.html#gad8958cd3cb7f521466168b46a25b7908">arm_q7_to_q31()</a>, <a class="el" href="arm__cfft__radix4__q15_8c.html#aad04e8439d17dab5617bf1be268bb391">arm_radix4_butterfly_inverse_q15()</a>, <a class="el" href="arm__cfft__radix4__q15_8c.html#a2d01d2045f280c32036da97d33c52440">arm_radix4_butterfly_q15()</a>, <a class="el" href="group__RMS.html#gaf5b836b72dda9e5dfbbd17c7906fd13f">arm_rms_q15()</a>, <a class="el" href="group__scale.html#gafaac0e1927daffeb68a42719b53ea780">arm_scale_q15()</a>, <a class="el" href="group__scale.html#gabc9fd3d37904c58df56492b351d21fb0">arm_scale_q7()</a>, <a class="el" href="group__shift.html#gaa1757e53279780107acc92cf100adb61">arm_shift_q15()</a>, <a class="el" href="group__shift.html#ga47295d08a685f7de700a48dafb4db6fb">arm_shift_q7()</a>, <a class="el" href="arm__rfft__q15_8c.html#a7c2a21793586f9a69c42140665550e09">arm_split_rfft_q15()</a>, <a class="el" href="arm__rfft__q15_8c.html#aa72a531dd15a53570dddaf01b62158f4">arm_split_rifft_q15()</a>, <a class="el" href="group__STD.html#gaf9d27afa9928ff28a63cd98ea9218a72">arm_std_q15()</a>, <a class="el" href="group__BasicSub.html#ga997a8ee93088d15bda23c325d455b588">arm_sub_q15()</a>, <a class="el" href="group__BasicSub.html#gab09941de7dfeb247e5c29b406a435fcc">arm_sub_q7()</a>, and <a class="el" href="group__variance.html#ga79dce009ed2de28a125aeb3f19631654">arm_var_q15()</a>.</p>
+<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000001">Deprecated:</a></b></dt><dd></dd></dl>
 
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@@ -1521,8 +1526,6 @@
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-<p>Referenced by <a class="el" href="group__BasicAbs.html#ga39f92964c9b649ba252e26ebe7b95594">arm_abs_q15()</a>, and <a class="el" href="group__PID.html#gad466471a6b0f8fc570b8b8fc34ac79fa">arm_pid_q15()</a>.</p>
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-<p>Referenced by <a class="el" href="arm__cfft__radix4__q31_8c.html#ac9c7c553114c1201a3a987a11b8a6d01">arm_radix4_butterfly_inverse_q31()</a>, and <a class="el" href="arm__cfft__radix4__q31_8c.html#ac12f1e7f159d5741358cdc36830a0395">arm_radix4_butterfly_q31()</a>.</p>
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-<p>Referenced by <a class="el" href="arm__cfft__q15_8c.html#abe669acc8db57d1fb9b1e2bba30f2224">arm_cfft_radix4by2_inverse_q15()</a>, <a class="el" href="arm__cfft__q15_8c.html#af1d4a751153857c173511e0c77ab4fa9">arm_cfft_radix4by2_q15()</a>, <a class="el" href="group__Conv.html#gaf16f490d245391ec18a42adc73d6d749">arm_conv_fast_opt_q15()</a>, <a class="el" href="group__Conv.html#gad75ca978ce906e04abdf86a8d76306d4">arm_conv_fast_q15()</a>, <a class="el" href="group__Conv.html#gac77dbcaef5c754cac27eab96c4753a3c">arm_conv_opt_q15()</a>, <a class="el" href="group__Conv.html#ga4c7cf073e89d6d57cc4e711f078c3f68">arm_conv_opt_q7()</a>, <a class="el" href="group__PartialConv.html#ga3de9c4ddcc7886de25b70d875099a8d9">arm_conv_partial_fast_opt_q15()</a>, <a class="el" href="group__PartialConv.html#ga1e4d43385cb62262a78c6752fe1fafb2">arm_conv_partial_fast_q15()</a>, <a class="el" href="group__PartialConv.html#ga834b23b4ade8682beeb55778399101f8">arm_conv_partial_opt_q15()</a>, <a class="el" href="group__PartialConv.html#ga3707e16af1435b215840006a7ab0c98f">arm_conv_partial_opt_q7()</a>, <a class="el" href="group__PartialConv.html#ga209a2a913a0c5e5679c5988da8f46b03">arm_conv_partial_q15()</a>, <a class="el" href="group__Conv.html#gaccd6a89b0ff7a94df64610598e6e6893">arm_conv_q15()</a>, <a class="el" href="group__Corr.html#ga40a0236b17220e8e22a22b5bc1c53c6b">arm_correlate_fast_opt_q15()</a>, <a class="el" href="group__Corr.html#gac8de3da44f58e86c2c86156276ca154f">arm_correlate_fast_q15()</a>, <a class="el" href="group__Corr.html#gad71c0ec70ec69edbc48563d9a5f68451">arm_correlate_opt_q15()</a>, <a class="el" href="group__Corr.html#ga746e8857cafe33ec5d6780729c18c311">arm_correlate_opt_q7()</a>, <a class="el" href="group__Corr.html#ga5ec96b8e420d68b0e626df0812274d46">arm_correlate_q15()</a>, <a class="el" href="group__FIR.html#gac7d35e9472e49ccd88800f37f3476bd3">arm_fir_fast_q15()</a>, <a class="el" href="group__MatrixScale.html#ga7521769e2cf1c3d9c4656138cd2ae2ca">arm_mat_scale_q15()</a>, <a class="el" href="group__negate.html#ga0239a833d72cf00290b9723c394e5042">arm_negate_q15()</a>, <a class="el" href="arm__cfft__radix2__q15_8c.html#a91ff93fa10757b3872680fec4835c412">arm_radix2_butterfly_inverse_q15()</a>, <a class="el" href="arm__cfft__radix2__q15_8c.html#a521780ba2fd3450cbf02784e38859699">arm_radix2_butterfly_q15()</a>, <a class="el" href="arm__cfft__radix4__q15_8c.html#aad04e8439d17dab5617bf1be268bb391">arm_radix4_butterfly_inverse_q15()</a>, and <a class="el" href="arm__cfft__radix4__q15_8c.html#a2d01d2045f280c32036da97d33c52440">arm_radix4_butterfly_q15()</a>.</p>
-
-</div>
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-<a class="anchor" id="a280a402ab28c399fcc4168f2ed631acb"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ALIGN4</td>
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-</div><div class="memdoc">
-
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@@ -1583,8 +1570,6 @@
       </table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__SinCos.html#gae9e4ddebff9d4eb5d0a093e28e0bc504">arm_sin_cos_q31()</a>.</p>
-
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 <a class="anchor" id="a663277ff19ad0b409fb98b64b2c2750b"></a>
@@ -1597,8 +1582,6 @@
       </table>
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-<p>Referenced by <a class="el" href="group__LMS__NORM.html#gad47486a399dedb0bc85a5990ec5cf981">arm_lms_norm_q15()</a>.</p>
-
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@@ -1611,8 +1594,6 @@
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-<p>Referenced by <a class="el" href="group__LMS__NORM.html#ga7128775e99817c183a7d7ad34e8b6e05">arm_lms_norm_q31()</a>.</p>
-
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@@ -1625,8 +1606,6 @@
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-<p>Referenced by <a class="el" href="group__cos.html#gadfd60c24def501638c0d5db20f4c869b">arm_cos_q15()</a>, and <a class="el" href="group__sin.html#ga1fc6d6640be6cfa688a8bea0a48397ee">arm_sin_q15()</a>.</p>
-
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 <a class="anchor" id="a4268f77b1811a0c7fc2532a0bf6108b0"></a>
@@ -1639,8 +1618,6 @@
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-<p>Referenced by <a class="el" href="group__cos.html#gad80f121949ef885a77d83ab36e002567">arm_cos_q31()</a>, and <a class="el" href="group__sin.html#ga57aade7d8892585992cdc6375bd82f9c">arm_sin_q31()</a>.</p>
-
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@@ -1653,8 +1630,6 @@
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-<p>Referenced by <a class="el" href="group__cos.html#gace15287f9c64b9b4084d1c797d4c49d8">arm_cos_f32()</a>, <a class="el" href="group__SinCos.html#ga4420d45c37d58c310ef9ae1b5fe58020">arm_sin_cos_f32()</a>, and <a class="el" href="group__sin.html#gae164899c4a3fc0e946dc5d55555fe541">arm_sin_f32()</a>.</p>
-
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@@ -1667,8 +1642,6 @@
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-<p>Referenced by <a class="el" href="arm__math_8h.html#a39e9e34c2784ff8cf026430d1d84f54e">arm_recip_q15()</a>, and <a class="el" href="arm__math_8h.html#a71f6bee1ce1bb896739401ce962a7e6a">arm_recip_q31()</a>.</p>
-
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@@ -1745,8 +1718,6 @@
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 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__BiquadCascadeDF1.html#ga456390f5e448afad3a38bed7d6e380e3">arm_biquad_cascade_df1_fast_q31()</a>, <a class="el" href="arm__cfft__q31_8c.html#a3f3ae10bc2057cc1360abfa25f224c8c">arm_cfft_radix4by2_inverse_q31()</a>, <a class="el" href="arm__cfft__q31_8c.html#af6df8bf714c30d44e6b871ea87d22b30">arm_cfft_radix4by2_q31()</a>, <a class="el" href="arm__cfft__radix2__q31_8c.html#a4d665f67080455b95cafec04009fd52d">arm_radix2_butterfly_inverse_q31()</a>, <a class="el" href="arm__cfft__radix2__q31_8c.html#a740f4fe69e6148d22fc99f374d304e7e">arm_radix2_butterfly_q31()</a>, <a class="el" href="arm__rfft__q31_8c.html#a520e1c358d44fcd2724cb19d46eb5dfa">arm_split_rfft_q31()</a>, and <a class="el" href="arm__rfft__q31_8c.html#acc62dd39a59091c4d6a80d4e55adeb13">arm_split_rifft_q31()</a>.</p>
-
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 <a class="anchor" id="a58454519e12e8157f0a1c36071333655"></a>
@@ -1812,8 +1783,6 @@
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 <p>end of BilinearInterpolate group </p>
 
-<p>Referenced by <a class="el" href="group__BiquadCascadeDF1.html#ga456390f5e448afad3a38bed7d6e380e3">arm_biquad_cascade_df1_fast_q31()</a>, <a class="el" href="arm__cfft__q31_8c.html#a3f3ae10bc2057cc1360abfa25f224c8c">arm_cfft_radix4by2_inverse_q31()</a>, <a class="el" href="arm__cfft__q31_8c.html#af6df8bf714c30d44e6b871ea87d22b30">arm_cfft_radix4by2_q31()</a>, <a class="el" href="group__FIR.html#ga70d11af009dcd25594c58c75cdb5d6e3">arm_fir_fast_q31()</a>, <a class="el" href="arm__cfft__radix2__q31_8c.html#a4d665f67080455b95cafec04009fd52d">arm_radix2_butterfly_inverse_q31()</a>, <a class="el" href="arm__cfft__radix2__q31_8c.html#a740f4fe69e6148d22fc99f374d304e7e">arm_radix2_butterfly_q31()</a>, <a class="el" href="arm__rfft__q31_8c.html#a520e1c358d44fcd2724cb19d46eb5dfa">arm_split_rfft_q31()</a>, and <a class="el" href="arm__rfft__q31_8c.html#acc62dd39a59091c4d6a80d4e55adeb13">arm_split_rifft_q31()</a>.</p>
-
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@@ -1878,8 +1847,6 @@
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-<p>Referenced by <a class="el" href="arm__cfft__q31_8c.html#a3f3ae10bc2057cc1360abfa25f224c8c">arm_cfft_radix4by2_inverse_q31()</a>, <a class="el" href="arm__cfft__q31_8c.html#af6df8bf714c30d44e6b871ea87d22b30">arm_cfft_radix4by2_q31()</a>, <a class="el" href="arm__cfft__radix2__q31_8c.html#a4d665f67080455b95cafec04009fd52d">arm_radix2_butterfly_inverse_q31()</a>, <a class="el" href="arm__cfft__radix2__q31_8c.html#a740f4fe69e6148d22fc99f374d304e7e">arm_radix2_butterfly_q31()</a>, <a class="el" href="arm__rfft__q31_8c.html#a520e1c358d44fcd2724cb19d46eb5dfa">arm_split_rfft_q31()</a>, and <a class="el" href="arm__rfft__q31_8c.html#acc62dd39a59091c4d6a80d4e55adeb13">arm_split_rifft_q31()</a>.</p>
-
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 <a class="anchor" id="a598a3330b3c21701223ee0ca14316eca"></a>
@@ -2012,13 +1979,13 @@
 <p>Length of data buffer is incorrect </p>
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 <p>Test Failed </p>
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-
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-<p>Referenced by <a class="el" href="group__BiquadCascadeDF1.html#gaffb9792c0220882efd4c58f3c6a05fd7">arm_biquad_cascade_df1_fast_q15()</a>, <a class="el" href="group__Conv.html#gaf16f490d245391ec18a42adc73d6d749">arm_conv_fast_opt_q15()</a>, <a class="el" href="group__Conv.html#gad75ca978ce906e04abdf86a8d76306d4">arm_conv_fast_q15()</a>, <a class="el" href="group__Conv.html#ga4c7cf073e89d6d57cc4e711f078c3f68">arm_conv_opt_q7()</a>, <a class="el" href="group__PartialConv.html#ga3de9c4ddcc7886de25b70d875099a8d9">arm_conv_partial_fast_opt_q15()</a>, <a class="el" href="group__PartialConv.html#ga1e4d43385cb62262a78c6752fe1fafb2">arm_conv_partial_fast_q15()</a>, <a class="el" href="group__PartialConv.html#ga3707e16af1435b215840006a7ab0c98f">arm_conv_partial_opt_q7()</a>, <a class="el" href="group__PartialConv.html#ga8567259fe18396dd972242c41741ebf4">arm_conv_partial_q7()</a>, <a class="el" href="group__Conv.html#gae2070cb792a167e78dbad8d06b97cdab">arm_conv_q7()</a>, <a class="el" href="group__Corr.html#ga40a0236b17220e8e22a22b5bc1c53c6b">arm_correlate_fast_opt_q15()</a>, <a class="el" href="group__Corr.html#gac8de3da44f58e86c2c86156276ca154f">arm_correlate_fast_q15()</a>, <a class="el" href="group__Corr.html#ga746e8857cafe33ec5d6780729c18c311">arm_correlate_opt_q7()</a>, <a class="el" href="group__Corr.html#ga284ddcc49e4ac532d52a70d0383c5992">arm_correlate_q7()</a>, <a class="el" href="group__dot__prod.html#ga9c3293a50ac7ec8ba928bf8e3aaea6c1">arm_dot_prod_q7()</a>, <a class="el" href="group__FIR__decimate.html#ga3f434c9a5d3b4e68061feac0714ea2ac">arm_fir_decimate_fast_q15()</a>, <a class="el" href="group__FIR.html#gac7d35e9472e49ccd88800f37f3476bd3">arm_fir_fast_q15()</a>, <a class="el" href="group__MatrixMult.html#ga08f37d93a5bfef0c5000dc5e0a411f93">arm_mat_mult_fast_q15()</a>, <a class="el" href="group__power.html#gaf969c85c5655e3d72d7b99ff188f92c9">arm_power_q7()</a>, <a class="el" href="arm__rfft__q15_8c.html#a7c2a21793586f9a69c42140665550e09">arm_split_rfft_q15()</a>, and <a class="el" href="arm__rfft__q15_8c.html#aa72a531dd15a53570dddaf01b62158f4">arm_split_rifft_q15()</a>.</p>
-
 </div>
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+<a class="anchor" id="aa768ceb80ab9196f4f49aa8840474eac"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE uint32_t __SMLADX </td>
+          <td class="memname">__STATIC_FORCEINLINE uint32_t __SMLADX </td>
           <td>(</td>
           <td class="paramtype">uint32_t&#160;</td>
           <td class="paramname"><em>x</em>, </td>
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       </table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__Conv.html#gaf16f490d245391ec18a42adc73d6d749">arm_conv_fast_opt_q15()</a>, <a class="el" href="group__Conv.html#gad75ca978ce906e04abdf86a8d76306d4">arm_conv_fast_q15()</a>, <a class="el" href="group__Conv.html#ga4c7cf073e89d6d57cc4e711f078c3f68">arm_conv_opt_q7()</a>, <a class="el" href="group__PartialConv.html#ga3de9c4ddcc7886de25b70d875099a8d9">arm_conv_partial_fast_opt_q15()</a>, <a class="el" href="group__PartialConv.html#ga1e4d43385cb62262a78c6752fe1fafb2">arm_conv_partial_fast_q15()</a>, <a class="el" href="group__PartialConv.html#ga3707e16af1435b215840006a7ab0c98f">arm_conv_partial_opt_q7()</a>, <a class="el" href="group__Corr.html#ga40a0236b17220e8e22a22b5bc1c53c6b">arm_correlate_fast_opt_q15()</a>, <a class="el" href="group__Corr.html#gac8de3da44f58e86c2c86156276ca154f">arm_correlate_fast_q15()</a>, <a class="el" href="group__Corr.html#ga746e8857cafe33ec5d6780729c18c311">arm_correlate_opt_q7()</a>, <a class="el" href="group__FIR.html#gac7d35e9472e49ccd88800f37f3476bd3">arm_fir_fast_q15()</a>, and <a class="el" href="arm__rfft__q15_8c.html#a7c2a21793586f9a69c42140665550e09">arm_split_rfft_q15()</a>.</p>
-
 </div>
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+<a class="anchor" id="a5e81e17e4b2c742f2bb2ca18721330b4"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE uint64_t __SMLALD </td>
+          <td class="memname">__STATIC_FORCEINLINE uint64_t __SMLALD </td>
           <td>(</td>
           <td class="paramtype">uint32_t&#160;</td>
           <td class="paramname"><em>x</em>, </td>
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       </table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__BiquadCascadeDF1.html#gadd66a0aefdc645031d607b0a5b37a942">arm_biquad_cascade_df1_q15()</a>, <a class="el" href="group__Conv.html#gac77dbcaef5c754cac27eab96c4753a3c">arm_conv_opt_q15()</a>, <a class="el" href="group__PartialConv.html#ga834b23b4ade8682beeb55778399101f8">arm_conv_partial_opt_q15()</a>, <a class="el" href="group__PartialConv.html#ga209a2a913a0c5e5679c5988da8f46b03">arm_conv_partial_q15()</a>, <a class="el" href="group__Conv.html#gaccd6a89b0ff7a94df64610598e6e6893">arm_conv_q15()</a>, <a class="el" href="group__Corr.html#gad71c0ec70ec69edbc48563d9a5f68451">arm_correlate_opt_q15()</a>, <a class="el" href="group__Corr.html#ga5ec96b8e420d68b0e626df0812274d46">arm_correlate_q15()</a>, <a class="el" href="group__dot__prod.html#ga436d5bed28a4b73b24acbde436a3044b">arm_dot_prod_q15()</a>, <a class="el" href="group__IIR__Lattice.html#gaeb9e9599a288832ed123183eaa8b294a">arm_iir_lattice_q15()</a>, <a class="el" href="group__LMS__NORM.html#gad47486a399dedb0bc85a5990ec5cf981">arm_lms_norm_q15()</a>, <a class="el" href="group__LMS.html#gacde16c17eb75979f81b34e2e2a58c7ac">arm_lms_q15()</a>, <a class="el" href="group__MatrixMult.html#ga7521d59196189bb6dde26e8cdfb66e21">arm_mat_mult_q15()</a>, <a class="el" href="group__PID.html#gad466471a6b0f8fc570b8b8fc34ac79fa">arm_pid_q15()</a>, <a class="el" href="group__power.html#ga7050c04b7515e01a75c38f1abbaf71ba">arm_power_q15()</a>, <a class="el" href="group__RMS.html#gaf5b836b72dda9e5dfbbd17c7906fd13f">arm_rms_q15()</a>, <a class="el" href="group__STD.html#gaf9d27afa9928ff28a63cd98ea9218a72">arm_std_q15()</a>, and <a class="el" href="group__variance.html#ga79dce009ed2de28a125aeb3f19631654">arm_var_q15()</a>.</p>
-
 </div>
 </div>
-<a class="anchor" id="a3bdab9022ab56e30f6346a043050dfc4"></a>
+<a class="anchor" id="ae97294482e85127ef97526a962ebd1b3"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE uint64_t __SMLALDX </td>
+          <td class="memname">__STATIC_FORCEINLINE uint64_t __SMLALDX </td>
           <td>(</td>
           <td class="paramtype">uint32_t&#160;</td>
           <td class="paramname"><em>x</em>, </td>
@@ -2500,16 +2433,14 @@
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 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__Conv.html#gac77dbcaef5c754cac27eab96c4753a3c">arm_conv_opt_q15()</a>, <a class="el" href="group__PartialConv.html#ga834b23b4ade8682beeb55778399101f8">arm_conv_partial_opt_q15()</a>, <a class="el" href="group__PartialConv.html#ga209a2a913a0c5e5679c5988da8f46b03">arm_conv_partial_q15()</a>, <a class="el" href="group__Conv.html#gaccd6a89b0ff7a94df64610598e6e6893">arm_conv_q15()</a>, <a class="el" href="group__Corr.html#gad71c0ec70ec69edbc48563d9a5f68451">arm_correlate_opt_q15()</a>, and <a class="el" href="group__Corr.html#ga5ec96b8e420d68b0e626df0812274d46">arm_correlate_q15()</a>.</p>
-
 </div>
 </div>
-<a class="anchor" id="a5d61b7d886888f9f1f35c079eb5d01c9"></a>
+<a class="anchor" id="a72f55b9cc9aac9fea5ea37acdd642b19"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE uint32_t __SMLSDX </td>
+          <td class="memname">__STATIC_FORCEINLINE uint32_t __SMLSDX </td>
           <td>(</td>
           <td class="paramtype">uint32_t&#160;</td>
           <td class="paramname"><em>x</em>, </td>
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       </table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="arm__rfft__q15_8c.html#aa72a531dd15a53570dddaf01b62158f4">arm_split_rifft_q15()</a>.</p>
-
 </div>
 </div>
-<a class="anchor" id="a0162015f6d3458e2934a265481460ec4"></a>
+<a class="anchor" id="a5a21d62839618246ef1383fc5531425b"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE int32_t __SMMLA </td>
+          <td class="memname">__STATIC_FORCEINLINE int32_t __SMMLA </td>
           <td>(</td>
           <td class="paramtype">int32_t&#160;</td>
           <td class="paramname"><em>x</em>, </td>
@@ -2568,16 +2497,14 @@
       </table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__MatrixMult.html#ga2785e8c1b785348b0c439b56aaf585a3">arm_mat_mult_fast_q31()</a>.</p>
-
 </div>
 </div>
-<a class="anchor" id="a2eed05660fedbe3fbd0b6dbb1315cfc3"></a>
+<a class="anchor" id="a1caa8809ee9d31e162d28ebb09b2a773"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE uint32_t __SMUAD </td>
+          <td class="memname">__STATIC_FORCEINLINE uint32_t __SMUAD </td>
           <td>(</td>
           <td class="paramtype">uint32_t&#160;</td>
           <td class="paramname"><em>x</em>, </td>
@@ -2596,16 +2523,14 @@
       </table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__BiquadCascadeDF1.html#gaffb9792c0220882efd4c58f3c6a05fd7">arm_biquad_cascade_df1_fast_q15()</a>, <a class="el" href="group__BiquadCascadeDF1.html#gadd66a0aefdc645031d607b0a5b37a942">arm_biquad_cascade_df1_q15()</a>, <a class="el" href="arm__cfft__q15_8c.html#af1d4a751153857c173511e0c77ab4fa9">arm_cfft_radix4by2_q15()</a>, <a class="el" href="group__cmplx__mag.html#ga0a4a8f77a6a51d9b3f3b9d729f85b7a4">arm_cmplx_mag_q15()</a>, <a class="el" href="group__cmplx__mag__squared.html#ga45537f576102d960d467eb722b8431f2">arm_cmplx_mag_squared_q15()</a>, <a class="el" href="group__PID.html#gad466471a6b0f8fc570b8b8fc34ac79fa">arm_pid_q15()</a>, <a class="el" href="arm__cfft__radix2__q15_8c.html#a521780ba2fd3450cbf02784e38859699">arm_radix2_butterfly_q15()</a>, and <a class="el" href="arm__cfft__radix4__q15_8c.html#a2d01d2045f280c32036da97d33c52440">arm_radix4_butterfly_q15()</a>.</p>
-
 </div>
 </div>
-<a class="anchor" id="a9c58d7b4648a973d91e27544bc190e60"></a>
+<a class="anchor" id="a5459e095b1250db7f7c12763648f818b"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE uint32_t __SMUADX </td>
+          <td class="memname">__STATIC_FORCEINLINE uint32_t __SMUADX </td>
           <td>(</td>
           <td class="paramtype">uint32_t&#160;</td>
           <td class="paramname"><em>x</em>, </td>
@@ -2624,16 +2549,14 @@
       </table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__BiquadCascadeDF1.html#gaffb9792c0220882efd4c58f3c6a05fd7">arm_biquad_cascade_df1_fast_q15()</a>, <a class="el" href="group__BiquadCascadeDF1.html#gadd66a0aefdc645031d607b0a5b37a942">arm_biquad_cascade_df1_q15()</a>, <a class="el" href="arm__cfft__q15_8c.html#abe669acc8db57d1fb9b1e2bba30f2224">arm_cfft_radix4by2_inverse_q15()</a>, <a class="el" href="group__CmplxMatrixMult.html#ga63066615e7d6f6a44f4358725092419e">arm_mat_cmplx_mult_q15()</a>, <a class="el" href="arm__cfft__radix2__q15_8c.html#a91ff93fa10757b3872680fec4835c412">arm_radix2_butterfly_inverse_q15()</a>, <a class="el" href="arm__cfft__radix4__q15_8c.html#aad04e8439d17dab5617bf1be268bb391">arm_radix4_butterfly_inverse_q15()</a>, and <a class="el" href="arm__rfft__q15_8c.html#aa72a531dd15a53570dddaf01b62158f4">arm_split_rifft_q15()</a>.</p>
-
 </div>
 </div>
-<a class="anchor" id="a6b293f62ad7eb225fa9ce0f39458eba3"></a>
+<a class="anchor" id="a7c93c24f4f94bcbb57fefcafa587e838"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE uint32_t __SMUSD </td>
+          <td class="memname">__STATIC_FORCEINLINE uint32_t __SMUSD </td>
           <td>(</td>
           <td class="paramtype">uint32_t&#160;</td>
           <td class="paramname"><em>x</em>, </td>
@@ -2652,16 +2575,14 @@
       </table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="arm__cfft__q15_8c.html#abe669acc8db57d1fb9b1e2bba30f2224">arm_cfft_radix4by2_inverse_q15()</a>, <a class="el" href="group__CmplxMatrixMult.html#ga63066615e7d6f6a44f4358725092419e">arm_mat_cmplx_mult_q15()</a>, <a class="el" href="arm__cfft__radix2__q15_8c.html#a91ff93fa10757b3872680fec4835c412">arm_radix2_butterfly_inverse_q15()</a>, <a class="el" href="arm__cfft__radix4__q15_8c.html#aad04e8439d17dab5617bf1be268bb391">arm_radix4_butterfly_inverse_q15()</a>, <a class="el" href="arm__rfft__q15_8c.html#a7c2a21793586f9a69c42140665550e09">arm_split_rfft_q15()</a>, and <a class="el" href="arm__rfft__q15_8c.html#aa72a531dd15a53570dddaf01b62158f4">arm_split_rifft_q15()</a>.</p>
-
 </div>
 </div>
-<a class="anchor" id="a7375d1deba32929dc97008bfa7085d46"></a>
+<a class="anchor" id="a19acaeacb4ecb2c19e5df75c36b16895"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE uint32_t __SMUSDX </td>
+          <td class="memname">__STATIC_FORCEINLINE uint32_t __SMUSDX </td>
           <td>(</td>
           <td class="paramtype">uint32_t&#160;</td>
           <td class="paramname"><em>x</em>, </td>
@@ -2680,16 +2601,14 @@
       </table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="arm__cfft__q15_8c.html#af1d4a751153857c173511e0c77ab4fa9">arm_cfft_radix4by2_q15()</a>, <a class="el" href="arm__cfft__radix2__q15_8c.html#a521780ba2fd3450cbf02784e38859699">arm_radix2_butterfly_q15()</a>, <a class="el" href="arm__cfft__radix4__q15_8c.html#a2d01d2045f280c32036da97d33c52440">arm_radix4_butterfly_q15()</a>, and <a class="el" href="arm__rfft__q15_8c.html#a7c2a21793586f9a69c42140665550e09">arm_split_rfft_q15()</a>.</p>
-
 </div>
 </div>
-<a class="anchor" id="ac9f7f02a5e0ad5642026dbd0da7418db"></a>
+<a class="anchor" id="a1d4c96261598742fea98a13d28fbb06a"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE uint32_t __SXTB16 </td>
+          <td class="memname">__STATIC_FORCEINLINE uint32_t __SXTB16 </td>
           <td>(</td>
           <td class="paramtype">uint32_t&#160;</td>
           <td class="paramname"><em>x</em></td><td>)</td>
@@ -2698,16 +2617,14 @@
       </table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__dot__prod.html#ga9c3293a50ac7ec8ba928bf8e3aaea6c1">arm_dot_prod_q7()</a>, <a class="el" href="group__power.html#gaf969c85c5655e3d72d7b99ff188f92c9">arm_power_q7()</a>, and <a class="el" href="group__q7__to__x.html#gabc02597fc3f01033daf43ec0547a2f78">arm_q7_to_q15()</a>.</p>
-
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-<a class="anchor" id="af4d2359037b7360329ef9dd6836d1353"></a>
+<a class="anchor" id="aa0e8f158699a65e023960d555274ad39"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE void arm_circularRead_f32 </td>
+          <td class="memname">__STATIC_FORCEINLINE void arm_circularRead_f32 </td>
           <td>(</td>
           <td class="paramtype">int32_t *&#160;</td>
           <td class="paramname"><em>circBuffer</em>, </td>
@@ -2768,18 +2685,14 @@
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 </div><div class="memdoc">
 
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
-<p>Referenced by <a class="el" href="group__FIR__Sparse.html#ga23a9284de5ee39406713b91d18ac8838">arm_fir_sparse_f32()</a>, and <a class="el" href="group__FIR__Sparse.html#ga03e9c2f0f35ad67d20bac66be9f920ec">arm_fir_sparse_q31()</a>.</p>
-
 </div>
 </div>
-<a class="anchor" id="a98eb923fe8c64909897c31d6b9f69bff"></a>
+<a class="anchor" id="a4d8edf2fbaa68badce77740563de353f"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE void arm_circularRead_q15 </td>
+          <td class="memname">__STATIC_FORCEINLINE void arm_circularRead_q15 </td>
           <td>(</td>
           <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>circBuffer</em>, </td>
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-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
-<p>Referenced by <a class="el" href="group__FIR__Sparse.html#ga2bffda2e156e72427e19276cd9c3d3cc">arm_fir_sparse_q15()</a>.</p>
-
 </div>
 </div>
-<a class="anchor" id="acd3153fe997f44fe6c20fa1ac6257a2b"></a>
+<a class="anchor" id="a734e6ec2b2d568236816464967326748"></a>
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       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE void arm_circularRead_q7 </td>
+          <td class="memname">__STATIC_FORCEINLINE void arm_circularRead_q7 </td>
           <td>(</td>
           <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>circBuffer</em>, </td>
@@ -2912,18 +2821,14 @@
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 </div><div class="memdoc">
 
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
-<p>Referenced by <a class="el" href="group__FIR__Sparse.html#gae86c145efc2d9ec32dc6d8c1ad2ccb3c">arm_fir_sparse_q7()</a>.</p>
-
 </div>
 </div>
-<a class="anchor" id="a87c6129c7f1a7e7b205339054d3ffed7"></a>
+<a class="anchor" id="a189501700cbecf81c08a005bb16939d9"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE void arm_circularWrite_f32 </td>
+          <td class="memname">__STATIC_FORCEINLINE void arm_circularWrite_f32 </td>
           <td>(</td>
           <td class="paramtype">int32_t *&#160;</td>
           <td class="paramname"><em>circBuffer</em>, </td>
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 <p>end of SQRT group </p>
 
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
-<p>Referenced by <a class="el" href="group__FIR__Sparse.html#ga23a9284de5ee39406713b91d18ac8838">arm_fir_sparse_f32()</a>, and <a class="el" href="group__FIR__Sparse.html#ga03e9c2f0f35ad67d20bac66be9f920ec">arm_fir_sparse_q31()</a>.</p>
-
 </div>
 </div>
-<a class="anchor" id="a885325c33991f03743a9d9b06868a099"></a>
+<a class="anchor" id="a6799f043f7ab70c0d0e06fb9abbecb6e"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE void arm_circularWrite_q15 </td>
+          <td class="memname">__STATIC_FORCEINLINE void arm_circularWrite_q15 </td>
           <td>(</td>
           <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>circBuffer</em>, </td>
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-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
-<p>Referenced by <a class="el" href="group__FIR__Sparse.html#ga2bffda2e156e72427e19276cd9c3d3cc">arm_fir_sparse_q15()</a>.</p>
-
 </div>
 </div>
-<a class="anchor" id="a2db43ffe947dce0f676c09580d1f6765"></a>
+<a class="anchor" id="a28179a962e4bb51c73c195dcb2f969aa"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE void arm_circularWrite_q7 </td>
+          <td class="memname">__STATIC_FORCEINLINE void arm_circularWrite_q7 </td>
           <td>(</td>
           <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>circBuffer</em>, </td>
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 </div><div class="memdoc">
 
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
-<p>Referenced by <a class="el" href="group__FIR__Sparse.html#gae86c145efc2d9ec32dc6d8c1ad2ccb3c">arm_fir_sparse_q7()</a>.</p>
-
 </div>
 </div>
-<a class="anchor" id="a39e9e34c2784ff8cf026430d1d84f54e"></a>
+<a class="anchor" id="a1e370c58e45bbe92bb7763fe59cf5e57"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE uint32_t arm_recip_q15 </td>
+          <td class="memname">__STATIC_FORCEINLINE uint32_t arm_recip_q15 </td>
           <td>(</td>
           <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td>
           <td class="paramname"><em>in</em>, </td>
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           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pRecipTable</em>&#160;</td>
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-<p>References <a class="el" href="arm__math_8h.html#a29f839928f4752b73c8858d6dbb55294">INDEX_MASK</a>.</p>
-
-<p>Referenced by <a class="el" href="group__LMS__NORM.html#gad47486a399dedb0bc85a5990ec5cf981">arm_lms_norm_q15()</a>.</p>
-
 </div>
 </div>
-<a class="anchor" id="a71f6bee1ce1bb896739401ce962a7e6a"></a>
+<a class="anchor" id="a3cedcf5a91d6c722c64330ec97e0853e"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE uint32_t arm_recip_q31 </td>
+          <td class="memname">__STATIC_FORCEINLINE uint32_t arm_recip_q31 </td>
           <td>(</td>
           <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td>
           <td class="paramname"><em>in</em>, </td>
@@ -3154,7 +3043,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pRecipTable</em>&#160;</td>
         </tr>
         <tr>
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-<p>References <a class="el" href="arm__math_8h.html#a9a94b78de0f083bd8fadf3c3abe40431">clip_q63_to_q31()</a>, and <a class="el" href="arm__math_8h.html#a29f839928f4752b73c8858d6dbb55294">INDEX_MASK</a>.</p>
-
-<p>Referenced by <a class="el" href="group__LMS__NORM.html#ga7128775e99817c183a7d7ad34e8b6e05">arm_lms_norm_q31()</a>.</p>
-
 </div>
 </div>
-<a class="anchor" id="a4604d1ebfef21e380c42fbe16b9724d1"></a>
+<a class="anchor" id="a8648908e55b9fd8893b36eb7050e69a8"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> clip_q31_to_q15 </td>
+          <td class="memname">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> clip_q31_to_q15 </td>
           <td>(</td>
           <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td>
           <td class="paramname"><em>x</em></td><td>)</td>
@@ -3187,12 +3072,12 @@
 
 </div>
 </div>
-<a class="anchor" id="af815ae1a72c9ef88b8ba0a4cb3b23eaa"></a>
+<a class="anchor" id="afa69cfc57f04c36c2ba499525168fe0c"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
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+          <td class="memname">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> clip_q31_to_q7 </td>
           <td>(</td>
           <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td>
           <td class="paramname"><em>x</em></td><td>)</td>
@@ -3203,12 +3088,12 @@
 
 </div>
 </div>
-<a class="anchor" id="a576c5c6286a37eb7f7ba1c5711a577a9"></a>
+<a class="anchor" id="a027d446e8a72228f0a681779a7038a4e"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> clip_q63_to_q15 </td>
+          <td class="memname">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> clip_q63_to_q15 </td>
           <td>(</td>
           <td class="paramtype"><a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a>&#160;</td>
           <td class="paramname"><em>x</em></td><td>)</td>
@@ -3219,12 +3104,12 @@
 
 </div>
 </div>
-<a class="anchor" id="a9a94b78de0f083bd8fadf3c3abe40431"></a>
+<a class="anchor" id="ad3a8d07983196592f6edca8f84aec7c7"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> clip_q63_to_q31 </td>
+          <td class="memname">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> clip_q63_to_q31 </td>
           <td>(</td>
           <td class="paramtype"><a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a>&#160;</td>
           <td class="paramname"><em>x</em></td><td>)</td>
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       </table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="arm__math_8h.html#ab9f3cfbfb0f12975ab91ddb179160dcb">__QADD()</a>, <a class="el" href="arm__math_8h.html#a15e896d0146c280e600d00f609832350">__QSUB()</a>, <a class="el" href="group__BasicAdd.html#ga24d6c3f7f8b9fae4847c0c3f26a39a3b">arm_add_q31()</a>, <a class="el" href="group__CmplxByRealMult.html#ga715e4bb8e945b8ca51ec5237611697ce">arm_cmplx_mult_real_q31()</a>, <a class="el" href="group__float__to__x.html#ga177704107f94564e9abe4daaa36f4554">arm_float_to_q31()</a>, <a class="el" href="group__IIR__Lattice.html#ga123b26fa9156cd8d3622dd85931741ed">arm_iir_lattice_q31()</a>, <a class="el" href="group__LMS__NORM.html#ga7128775e99817c183a7d7ad34e8b6e05">arm_lms_norm_q31()</a>, <a class="el" href="group__LMS.html#ga6a0abfe6041253a6f91c63b383a64257">arm_lms_q31()</a>, <a class="el" href="group__CmplxMatrixMult.html#gaaf3c0b171ca8412c77bab9fa90804737">arm_mat_cmplx_mult_q31()</a>, <a class="el" href="group__MatrixMult.html#ga2ec612a8c2c4916477fb9bc1ab548a6e">arm_mat_mult_q31()</a>, <a class="el" href="group__BasicMult.html#ga3528c0f54a0607acc603f0490d3ca6c6">arm_mult_q31()</a>, <a class="el" href="group__offset.html#gac84ec42cbbebc5c197a87d0221819acf">arm_offset_q31()</a>, <a class="el" href="group__PID.html#gad9d88485234fa9460b1ce9e64989ac86">arm_pid_init_q31()</a>, <a class="el" href="arm__math_8h.html#a71f6bee1ce1bb896739401ce962a7e6a">arm_recip_q31()</a>, <a class="el" href="group__RMS.html#gae33015fda23fc44e7ead5e5ed7e8d314">arm_rms_q31()</a>, <a class="el" href="group__shift.html#ga387dd8b7b87377378280978f16cdb13d">arm_shift_q31()</a>, <a class="el" href="group__SinCos.html#gae9e4ddebff9d4eb5d0a093e28e0bc504">arm_sin_cos_q31()</a>, and <a class="el" href="group__BasicSub.html#ga28aa6908d092752144413e21933dc878">arm_sub_q31()</a>.</p>
-
 </div>
 </div>
-<a class="anchor" id="a24ad1cc3560b89335ee15f5b7e69b1f9"></a>
+<a class="anchor" id="a1922856352479a1443dad21208351d35"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> mult32x64 </td>
+          <td class="memname">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> mult32x64 </td>
           <td>(</td>
           <td class="paramtype"><a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a>&#160;</td>
           <td class="paramname"><em>x</em>, </td>
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-<p>Referenced by <a class="el" href="group__BiquadCascadeDF1__32x64.html#ga953a83e69685de6575cff37feb358a93">arm_biquad_cas_df1_32x64_q31()</a>.</p>
+</div>
+</div>
+<a class="anchor" id="a1eba08f198f867711068918c45026564"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> read_q15x2 </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramname"><em>pQ15</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pQ15</td><td>points to input value </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>Q31 value </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ae7ddd4049745db9c70a5cd7e8068d1bb"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> read_q15x2_da </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> **&#160;</td>
+          <td class="paramname"><em>pQ15</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pQ15</td><td>points to input value </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>Q31 value </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="a63675cbbd75b0ba77f5bb21c3b808095"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> read_q15x2_ia </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> **&#160;</td>
+          <td class="paramname"><em>pQ15</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pQ15</td><td>points to input value </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>Q31 value </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="a57dbc6933462fd03c5345c660e0b9e78"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> read_q7x4_da </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> **&#160;</td>
+          <td class="paramname"><em>pQ7</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pQ7</td><td>points to input value </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>Q31 value </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="a969ec542d2035cd9289f68f932cb626a"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> read_q7x4_ia </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> **&#160;</td>
+          <td class="paramname"><em>pQ7</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pQ7</td><td>points to input value </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>Q31 value </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="a1c6d46f43d41c6ca1b7d6a0d8ed95036"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__STATIC_FORCEINLINE void write_q15x2 </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramname"><em>pQ15</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td>
+          <td class="paramname"><em>value</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pQ15</td><td>points to input value </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Q31 value </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="a576a0e2a4667277b42c478dfda753dc6"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__STATIC_FORCEINLINE void write_q15x2_ia </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> **&#160;</td>
+          <td class="paramname"><em>pQ15</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td>
+          <td class="paramname"><em>value</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pQ15</td><td>points to input value </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Q31 value </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="a05bde59a4c7dd866d0a2e3e6fcac17bd"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__STATIC_FORCEINLINE void write_q7x4_ia </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> **&#160;</td>
+          <td class="paramname"><em>pQ7</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td>
+          <td class="paramname"><em>value</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pQ7</td><td>points to input value </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Q31 value </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/arm__matrix__example_2math__helper_8c.html b/docs/DSP/html/arm__matrix__example_2math__helper_8c.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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 Functions</h2></td></tr>
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-<tr class="memdesc:ga5b89d1b04575aeec494f678695fb87d8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a floating-point vector.  <a href="group__Max.html#ga5b89d1b04575aeec494f678695fb87d8">More...</a><br/></td></tr>
-<tr class="separator:ga5b89d1b04575aeec494f678695fb87d8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad1eabd31544fe59c414d9ce5bd0cc151"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Max.html#gad1eabd31544fe59c414d9ce5bd0cc151">arm_max_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult, uint32_t *pIndex)</td></tr>
+<tr class="memdesc:gad1eabd31544fe59c414d9ce5bd0cc151"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a floating-point vector.  <a href="group__Max.html#gad1eabd31544fe59c414d9ce5bd0cc151">More...</a><br/></td></tr>
+<tr class="separator:gad1eabd31544fe59c414d9ce5bd0cc151"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__max__f32_8c.html">arm_max_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__max__q15_8c.html b/docs/DSP/html/arm__max__q15_8c.html
index 5f2fd4c..fce3965 100644
--- a/docs/DSP/html/arm__max__q15_8c.html
+++ b/docs/DSP/html/arm__max__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gac132856c68f4bf2a056eaad5921c7880"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Max.html#gac132856c68f4bf2a056eaad5921c7880">arm_max_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult, uint32_t *pIndex)</td></tr>
-<tr class="memdesc:gac132856c68f4bf2a056eaad5921c7880"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a Q15 vector.  <a href="group__Max.html#gac132856c68f4bf2a056eaad5921c7880">More...</a><br/></td></tr>
-<tr class="separator:gac132856c68f4bf2a056eaad5921c7880"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaea9ba2039faeca04b034989a2a2a9e36"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Max.html#gaea9ba2039faeca04b034989a2a2a9e36">arm_max_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult, uint32_t *pIndex)</td></tr>
+<tr class="memdesc:gaea9ba2039faeca04b034989a2a2a9e36"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a Q15 vector.  <a href="group__Max.html#gaea9ba2039faeca04b034989a2a2a9e36">More...</a><br/></td></tr>
+<tr class="separator:gaea9ba2039faeca04b034989a2a2a9e36"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__max__q15_8c.html">arm_max_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__max__q31_8c.html b/docs/DSP/html/arm__max__q31_8c.html
index 30571d9..78dae45 100644
--- a/docs/DSP/html/arm__max__q31_8c.html
+++ b/docs/DSP/html/arm__max__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gaff7cbd4e955382def06724cc4cc85795"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Max.html#gaff7cbd4e955382def06724cc4cc85795">arm_max_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult, uint32_t *pIndex)</td></tr>
-<tr class="memdesc:gaff7cbd4e955382def06724cc4cc85795"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a Q31 vector.  <a href="group__Max.html#gaff7cbd4e955382def06724cc4cc85795">More...</a><br/></td></tr>
-<tr class="separator:gaff7cbd4e955382def06724cc4cc85795"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga74015f9e9852c710a981c5b488417298"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Max.html#ga74015f9e9852c710a981c5b488417298">arm_max_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult, uint32_t *pIndex)</td></tr>
+<tr class="memdesc:ga74015f9e9852c710a981c5b488417298"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a Q31 vector.  <a href="group__Max.html#ga74015f9e9852c710a981c5b488417298">More...</a><br/></td></tr>
+<tr class="separator:ga74015f9e9852c710a981c5b488417298"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__max__q31_8c.html">arm_max_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__max__q7_8c.html b/docs/DSP/html/arm__max__q7_8c.html
index 039e80b..59110c5 100644
--- a/docs/DSP/html/arm__max__q7_8c.html
+++ b/docs/DSP/html/arm__max__q7_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga6afd64d381b5c232de59163ebfe71e35"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Max.html#ga6afd64d381b5c232de59163ebfe71e35">arm_max_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pResult, uint32_t *pIndex)</td></tr>
-<tr class="memdesc:ga6afd64d381b5c232de59163ebfe71e35"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a Q7 vector.  <a href="group__Max.html#ga6afd64d381b5c232de59163ebfe71e35">More...</a><br/></td></tr>
-<tr class="separator:ga6afd64d381b5c232de59163ebfe71e35"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga504abf036854dc0c4a43bd9a27827863"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Max.html#ga504abf036854dc0c4a43bd9a27827863">arm_max_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pResult, uint32_t *pIndex)</td></tr>
+<tr class="memdesc:ga504abf036854dc0c4a43bd9a27827863"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a Q7 vector.  <a href="group__Max.html#ga504abf036854dc0c4a43bd9a27827863">More...</a><br/></td></tr>
+<tr class="separator:ga504abf036854dc0c4a43bd9a27827863"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__max__q7_8c.html">arm_max_q7.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__mean__f32_8c.html b/docs/DSP/html/arm__mean__f32_8c.html
index 38ce98a..c1cf14c 100644
--- a/docs/DSP/html/arm__mean__f32_8c.html
+++ b/docs/DSP/html/arm__mean__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga74ce08c49ab61e57bd50c3a0ca1fdb2b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#ga74ce08c49ab61e57bd50c3a0ca1fdb2b">arm_mean_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
-<tr class="memdesc:ga74ce08c49ab61e57bd50c3a0ca1fdb2b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a floating-point vector.  <a href="group__mean.html#ga74ce08c49ab61e57bd50c3a0ca1fdb2b">More...</a><br/></td></tr>
-<tr class="separator:ga74ce08c49ab61e57bd50c3a0ca1fdb2b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae4fb7698771d7c24f536ed24347c1488"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#gae4fb7698771d7c24f536ed24347c1488">arm_mean_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
+<tr class="memdesc:gae4fb7698771d7c24f536ed24347c1488"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a floating-point vector.  <a href="group__mean.html#gae4fb7698771d7c24f536ed24347c1488">More...</a><br/></td></tr>
+<tr class="separator:gae4fb7698771d7c24f536ed24347c1488"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__mean__f32_8c.html">arm_mean_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__mean__q15_8c.html b/docs/DSP/html/arm__mean__q15_8c.html
index e93a3d9..9f3ff74 100644
--- a/docs/DSP/html/arm__mean__q15_8c.html
+++ b/docs/DSP/html/arm__mean__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gac882495d5f098819fd3939c1ef7795b3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#gac882495d5f098819fd3939c1ef7795b3">arm_mean_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult)</td></tr>
-<tr class="memdesc:gac882495d5f098819fd3939c1ef7795b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a Q15 vector.  <a href="group__mean.html#gac882495d5f098819fd3939c1ef7795b3">More...</a><br/></td></tr>
-<tr class="separator:gac882495d5f098819fd3939c1ef7795b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga55fc43607651123ffe3b967e30305734"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#ga55fc43607651123ffe3b967e30305734">arm_mean_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult)</td></tr>
+<tr class="memdesc:ga55fc43607651123ffe3b967e30305734"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a Q15 vector.  <a href="group__mean.html#ga55fc43607651123ffe3b967e30305734">More...</a><br/></td></tr>
+<tr class="separator:ga55fc43607651123ffe3b967e30305734"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__mean__q15_8c.html">arm_mean_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__mean__q31_8c.html b/docs/DSP/html/arm__mean__q31_8c.html
index da330b8..ff67228 100644
--- a/docs/DSP/html/arm__mean__q31_8c.html
+++ b/docs/DSP/html/arm__mean__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gacf2526d8c2d75e486e8f0b0e31877ad0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#gacf2526d8c2d75e486e8f0b0e31877ad0">arm_mean_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
-<tr class="memdesc:gacf2526d8c2d75e486e8f0b0e31877ad0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a Q31 vector.  <a href="group__mean.html#gacf2526d8c2d75e486e8f0b0e31877ad0">More...</a><br/></td></tr>
-<tr class="separator:gacf2526d8c2d75e486e8f0b0e31877ad0"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab86ec60eba14c4bc4e2bd9b54ac4b487"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#gab86ec60eba14c4bc4e2bd9b54ac4b487">arm_mean_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
+<tr class="memdesc:gab86ec60eba14c4bc4e2bd9b54ac4b487"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a Q31 vector.  <a href="group__mean.html#gab86ec60eba14c4bc4e2bd9b54ac4b487">More...</a><br/></td></tr>
+<tr class="separator:gab86ec60eba14c4bc4e2bd9b54ac4b487"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__mean__q31_8c.html">arm_mean_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__mean__q7_8c.html b/docs/DSP/html/arm__mean__q7_8c.html
index cf7b907..8b007ae 100644
--- a/docs/DSP/html/arm__mean__q7_8c.html
+++ b/docs/DSP/html/arm__mean__q7_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gaebc707ee539020357c25da4c75b52eb7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#gaebc707ee539020357c25da4c75b52eb7">arm_mean_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pResult)</td></tr>
-<tr class="memdesc:gaebc707ee539020357c25da4c75b52eb7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a Q7 vector.  <a href="group__mean.html#gaebc707ee539020357c25da4c75b52eb7">More...</a><br/></td></tr>
-<tr class="separator:gaebc707ee539020357c25da4c75b52eb7"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa907ace253a82be0741a3203ac04601c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#gaa907ace253a82be0741a3203ac04601c">arm_mean_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pResult)</td></tr>
+<tr class="memdesc:gaa907ace253a82be0741a3203ac04601c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a Q7 vector.  <a href="group__mean.html#gaa907ace253a82be0741a3203ac04601c">More...</a><br/></td></tr>
+<tr class="separator:gaa907ace253a82be0741a3203ac04601c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__mean__q7_8c.html">arm_mean_q7.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__min__f32_8c.html b/docs/DSP/html/arm__min__f32_8c.html
index 3799851..7687c25 100644
--- a/docs/DSP/html/arm__min__f32_8c.html
+++ b/docs/DSP/html/arm__min__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gaf62b1673740fc516ea64daf777b7d74a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Min.html#gaf62b1673740fc516ea64daf777b7d74a">arm_min_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult, uint32_t *pIndex)</td></tr>
-<tr class="memdesc:gaf62b1673740fc516ea64daf777b7d74a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum value of a floating-point vector.  <a href="group__Min.html#gaf62b1673740fc516ea64daf777b7d74a">More...</a><br/></td></tr>
-<tr class="separator:gaf62b1673740fc516ea64daf777b7d74a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga514e2c920c432e1a3df2cb03f01d2797"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Min.html#ga514e2c920c432e1a3df2cb03f01d2797">arm_min_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult, uint32_t *pIndex)</td></tr>
+<tr class="memdesc:ga514e2c920c432e1a3df2cb03f01d2797"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum value of a floating-point vector.  <a href="group__Min.html#ga514e2c920c432e1a3df2cb03f01d2797">More...</a><br/></td></tr>
+<tr class="separator:ga514e2c920c432e1a3df2cb03f01d2797"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__min__f32_8c.html">arm_min_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__min__q15_8c.html b/docs/DSP/html/arm__min__q15_8c.html
index 75911a2..d4e27de 100644
--- a/docs/DSP/html/arm__min__q15_8c.html
+++ b/docs/DSP/html/arm__min__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gad065e37535ebb726750ac1545cb3fa6f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Min.html#gad065e37535ebb726750ac1545cb3fa6f">arm_min_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult, uint32_t *pIndex)</td></tr>
-<tr class="memdesc:gad065e37535ebb726750ac1545cb3fa6f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum value of a Q15 vector.  <a href="group__Min.html#gad065e37535ebb726750ac1545cb3fa6f">More...</a><br/></td></tr>
-<tr class="separator:gad065e37535ebb726750ac1545cb3fa6f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9f163584c1131f37b1b22f59b976b822"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Min.html#ga9f163584c1131f37b1b22f59b976b822">arm_min_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult, uint32_t *pIndex)</td></tr>
+<tr class="memdesc:ga9f163584c1131f37b1b22f59b976b822"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum value of a Q15 vector.  <a href="group__Min.html#ga9f163584c1131f37b1b22f59b976b822">More...</a><br/></td></tr>
+<tr class="separator:ga9f163584c1131f37b1b22f59b976b822"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__min__q15_8c.html">arm_min_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__min__q31_8c.html b/docs/DSP/html/arm__min__q31_8c.html
index 1698968..05c04fb 100644
--- a/docs/DSP/html/arm__min__q31_8c.html
+++ b/docs/DSP/html/arm__min__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gab20faeceb5ff5d2d9dd628c2ecf41303"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Min.html#gab20faeceb5ff5d2d9dd628c2ecf41303">arm_min_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult, uint32_t *pIndex)</td></tr>
-<tr class="memdesc:gab20faeceb5ff5d2d9dd628c2ecf41303"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum value of a Q31 vector.  <a href="group__Min.html#gab20faeceb5ff5d2d9dd628c2ecf41303">More...</a><br/></td></tr>
-<tr class="separator:gab20faeceb5ff5d2d9dd628c2ecf41303"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1969bd12eb46b412104f463305871493"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Min.html#ga1969bd12eb46b412104f463305871493">arm_min_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult, uint32_t *pIndex)</td></tr>
+<tr class="memdesc:ga1969bd12eb46b412104f463305871493"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum value of a Q31 vector.  <a href="group__Min.html#ga1969bd12eb46b412104f463305871493">More...</a><br/></td></tr>
+<tr class="separator:ga1969bd12eb46b412104f463305871493"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__min__q31_8c.html">arm_min_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__min__q7_8c.html b/docs/DSP/html/arm__min__q7_8c.html
index 6976166..2593f18 100644
--- a/docs/DSP/html/arm__min__q7_8c.html
+++ b/docs/DSP/html/arm__min__q7_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
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@@ -116,9 +116,9 @@
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-<tr class="memdesc:ga3631d38ac8d715fc14f6f1b343f4c4ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum value of a Q7 vector.  <a href="group__Min.html#ga3631d38ac8d715fc14f6f1b343f4c4ed">More...</a><br/></td></tr>
-<tr class="separator:ga3631d38ac8d715fc14f6f1b343f4c4ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad66b651b1342c2411b4d8ca4955c03b3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Min.html#gad66b651b1342c2411b4d8ca4955c03b3">arm_min_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pResult, uint32_t *pIndex)</td></tr>
+<tr class="memdesc:gad66b651b1342c2411b4d8ca4955c03b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum value of a Q7 vector.  <a href="group__Min.html#gad66b651b1342c2411b4d8ca4955c03b3">More...</a><br/></td></tr>
+<tr class="separator:gad66b651b1342c2411b4d8ca4955c03b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__min__q7_8c.html">arm_min_q7.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__mult__f32_8c.html b/docs/DSP/html/arm__mult__f32_8c.html
index 2076f18..892f4dc 100644
--- a/docs/DSP/html/arm__mult__f32_8c.html
+++ b/docs/DSP/html/arm__mult__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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-<tr class="memdesc:gaca3f0b8227da431ab29225b88888aa32"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point vector multiplication.  <a href="group__BasicMult.html#gaca3f0b8227da431ab29225b88888aa32">More...</a><br/></td></tr>
-<tr class="separator:gaca3f0b8227da431ab29225b88888aa32"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gacf950935141cad927bea886e88fd9e9b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicMult.html#gacf950935141cad927bea886e88fd9e9b">arm_mult_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gacf950935141cad927bea886e88fd9e9b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point vector multiplication.  <a href="group__BasicMult.html#gacf950935141cad927bea886e88fd9e9b">More...</a><br/></td></tr>
+<tr class="separator:gacf950935141cad927bea886e88fd9e9b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__mult__f32_8c.html">arm_mult_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__mult__q15_8c.html b/docs/DSP/html/arm__mult__q15_8c.html
index ec36f8e..55aae14 100644
--- a/docs/DSP/html/arm__mult__q15_8c.html
+++ b/docs/DSP/html/arm__mult__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gafb0778d27ed98a2a6f2ecb7d48cc8c75"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicMult.html#gafb0778d27ed98a2a6f2ecb7d48cc8c75">arm_mult_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gafb0778d27ed98a2a6f2ecb7d48cc8c75"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 vector multiplication.  <a href="group__BasicMult.html#gafb0778d27ed98a2a6f2ecb7d48cc8c75">More...</a><br/></td></tr>
-<tr class="separator:gafb0778d27ed98a2a6f2ecb7d48cc8c75"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaeeda8cdc2c7e79c8a26e905342a0bb17"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicMult.html#gaeeda8cdc2c7e79c8a26e905342a0bb17">arm_mult_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaeeda8cdc2c7e79c8a26e905342a0bb17"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 vector multiplication.  <a href="group__BasicMult.html#gaeeda8cdc2c7e79c8a26e905342a0bb17">More...</a><br/></td></tr>
+<tr class="separator:gaeeda8cdc2c7e79c8a26e905342a0bb17"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__mult__q15_8c.html">arm_mult_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__mult__q31_8c.html b/docs/DSP/html/arm__mult__q31_8c.html
index 6d7aba1..2c4734f 100644
--- a/docs/DSP/html/arm__mult__q31_8c.html
+++ b/docs/DSP/html/arm__mult__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga3528c0f54a0607acc603f0490d3ca6c6"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicMult.html#ga3528c0f54a0607acc603f0490d3ca6c6">arm_mult_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga3528c0f54a0607acc603f0490d3ca6c6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector multiplication.  <a href="group__BasicMult.html#ga3528c0f54a0607acc603f0490d3ca6c6">More...</a><br/></td></tr>
-<tr class="separator:ga3528c0f54a0607acc603f0490d3ca6c6"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf12c75306edf16759bdedd849984324e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicMult.html#gaf12c75306edf16759bdedd849984324e">arm_mult_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaf12c75306edf16759bdedd849984324e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector multiplication.  <a href="group__BasicMult.html#gaf12c75306edf16759bdedd849984324e">More...</a><br/></td></tr>
+<tr class="separator:gaf12c75306edf16759bdedd849984324e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__mult__q31_8c.html">arm_mult_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__mult__q7_8c.html b/docs/DSP/html/arm__mult__q7_8c.html
index de5248b..25c109f 100644
--- a/docs/DSP/html/arm__mult__q7_8c.html
+++ b/docs/DSP/html/arm__mult__q7_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga16677275ed83ff0878da531e875c27ef"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicMult.html#ga16677275ed83ff0878da531e875c27ef">arm_mult_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga16677275ed83ff0878da531e875c27ef"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector multiplication.  <a href="group__BasicMult.html#ga16677275ed83ff0878da531e875c27ef">More...</a><br/></td></tr>
-<tr class="separator:ga16677275ed83ff0878da531e875c27ef"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga7b852d225dd7e91f19107fdcea38a3cb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicMult.html#ga7b852d225dd7e91f19107fdcea38a3cb">arm_mult_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga7b852d225dd7e91f19107fdcea38a3cb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector multiplication.  <a href="group__BasicMult.html#ga7b852d225dd7e91f19107fdcea38a3cb">More...</a><br/></td></tr>
+<tr class="separator:ga7b852d225dd7e91f19107fdcea38a3cb"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__mult__q7_8c.html">arm_mult_q7.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__negate__f32_8c.html b/docs/DSP/html/arm__negate__f32_8c.html
index aa88020..6614077 100644
--- a/docs/DSP/html/arm__negate__f32_8c.html
+++ b/docs/DSP/html/arm__negate__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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-<tr class="memitem:ga2e169c4de6cc6e3ba4be9473531e6657"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__negate.html#ga2e169c4de6cc6e3ba4be9473531e6657">arm_negate_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga2e169c4de6cc6e3ba4be9473531e6657"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a floating-point vector.  <a href="group__negate.html#ga2e169c4de6cc6e3ba4be9473531e6657">More...</a><br/></td></tr>
-<tr class="separator:ga2e169c4de6cc6e3ba4be9473531e6657"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga7d9cfa32eafae01d3dbdcaf05052f431"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicNegate.html#ga7d9cfa32eafae01d3dbdcaf05052f431">arm_negate_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga7d9cfa32eafae01d3dbdcaf05052f431"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a floating-point vector.  <a href="group__BasicNegate.html#ga7d9cfa32eafae01d3dbdcaf05052f431">More...</a><br/></td></tr>
+<tr class="separator:ga7d9cfa32eafae01d3dbdcaf05052f431"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__negate__f32_8c.html">arm_negate_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__negate__q15_8c.html b/docs/DSP/html/arm__negate__q15_8c.html
index 8d564a5..f794fa1 100644
--- a/docs/DSP/html/arm__negate__q15_8c.html
+++ b/docs/DSP/html/arm__negate__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga0239a833d72cf00290b9723c394e5042"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__negate.html#ga0239a833d72cf00290b9723c394e5042">arm_negate_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga0239a833d72cf00290b9723c394e5042"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a Q15 vector.  <a href="group__negate.html#ga0239a833d72cf00290b9723c394e5042">More...</a><br/></td></tr>
-<tr class="separator:ga0239a833d72cf00290b9723c394e5042"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga55b8bbbcd318d5142925bc221db30186"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicNegate.html#ga55b8bbbcd318d5142925bc221db30186">arm_negate_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga55b8bbbcd318d5142925bc221db30186"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a Q15 vector.  <a href="group__BasicNegate.html#ga55b8bbbcd318d5142925bc221db30186">More...</a><br/></td></tr>
+<tr class="separator:ga55b8bbbcd318d5142925bc221db30186"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__negate__q15_8c.html">arm_negate_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__negate__q31_8c.html b/docs/DSP/html/arm__negate__q31_8c.html
index 6a079e6..f7c096f 100644
--- a/docs/DSP/html/arm__negate__q31_8c.html
+++ b/docs/DSP/html/arm__negate__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga2784c6887686a73dc7c364e2e41c776c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__negate.html#ga2784c6887686a73dc7c364e2e41c776c">arm_negate_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga2784c6887686a73dc7c364e2e41c776c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a Q31 vector.  <a href="group__negate.html#ga2784c6887686a73dc7c364e2e41c776c">More...</a><br/></td></tr>
-<tr class="separator:ga2784c6887686a73dc7c364e2e41c776c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad5054d19c205eebab5f2c6e42d8cbb3c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicNegate.html#gad5054d19c205eebab5f2c6e42d8cbb3c">arm_negate_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gad5054d19c205eebab5f2c6e42d8cbb3c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a Q31 vector.  <a href="group__BasicNegate.html#gad5054d19c205eebab5f2c6e42d8cbb3c">More...</a><br/></td></tr>
+<tr class="separator:gad5054d19c205eebab5f2c6e42d8cbb3c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__negate__q31_8c.html">arm_negate_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__negate__q7_8c.html b/docs/DSP/html/arm__negate__q7_8c.html
index 41962b8..1c4edb6 100644
--- a/docs/DSP/html/arm__negate__q7_8c.html
+++ b/docs/DSP/html/arm__negate__q7_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gaae78fc079a43bdaa3055f9b32e2a1f4c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__negate.html#gaae78fc079a43bdaa3055f9b32e2a1f4c">arm_negate_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaae78fc079a43bdaa3055f9b32e2a1f4c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a Q7 vector.  <a href="group__negate.html#gaae78fc079a43bdaa3055f9b32e2a1f4c">More...</a><br/></td></tr>
-<tr class="separator:gaae78fc079a43bdaa3055f9b32e2a1f4c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaea178c9f486ed4704f8723a2efee271c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicNegate.html#gaea178c9f486ed4704f8723a2efee271c">arm_negate_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaea178c9f486ed4704f8723a2efee271c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a Q7 vector.  <a href="group__BasicNegate.html#gaea178c9f486ed4704f8723a2efee271c">More...</a><br/></td></tr>
+<tr class="separator:gaea178c9f486ed4704f8723a2efee271c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__negate__q7_8c.html">arm_negate_q7.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__offset__f32_8c.html b/docs/DSP/html/arm__offset__f32_8c.html
index a8466af..a8f7a85 100644
--- a/docs/DSP/html/arm__offset__f32_8c.html
+++ b/docs/DSP/html/arm__offset__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga989dfae15235799d82f62ef9d356abb4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__offset.html#ga989dfae15235799d82f62ef9d356abb4">arm_offset_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> offset, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga989dfae15235799d82f62ef9d356abb4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a floating-point vector.  <a href="group__offset.html#ga989dfae15235799d82f62ef9d356abb4">More...</a><br/></td></tr>
-<tr class="separator:ga989dfae15235799d82f62ef9d356abb4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4ea8c9e1829e3b4d297f87e4a40478ad"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicOffset.html#ga4ea8c9e1829e3b4d297f87e4a40478ad">arm_offset_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> offset, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga4ea8c9e1829e3b4d297f87e4a40478ad"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a floating-point vector.  <a href="group__BasicOffset.html#ga4ea8c9e1829e3b4d297f87e4a40478ad">More...</a><br/></td></tr>
+<tr class="separator:ga4ea8c9e1829e3b4d297f87e4a40478ad"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__offset__f32_8c.html">arm_offset_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__offset__q15_8c.html b/docs/DSP/html/arm__offset__q15_8c.html
index 6a6c6a1..20b4bab 100644
--- a/docs/DSP/html/arm__offset__q15_8c.html
+++ b/docs/DSP/html/arm__offset__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gab4c1d2391b599549e5a06fdfbc2747bf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__offset.html#gab4c1d2391b599549e5a06fdfbc2747bf">arm_offset_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> offset, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gab4c1d2391b599549e5a06fdfbc2747bf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a Q15 vector.  <a href="group__offset.html#gab4c1d2391b599549e5a06fdfbc2747bf">More...</a><br/></td></tr>
-<tr class="separator:gab4c1d2391b599549e5a06fdfbc2747bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaffc78c4cda3e39b518d79cef293532b7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicOffset.html#gaffc78c4cda3e39b518d79cef293532b7">arm_offset_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> offset, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaffc78c4cda3e39b518d79cef293532b7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a Q15 vector.  <a href="group__BasicOffset.html#gaffc78c4cda3e39b518d79cef293532b7">More...</a><br/></td></tr>
+<tr class="separator:gaffc78c4cda3e39b518d79cef293532b7"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__offset__q15_8c.html">arm_offset_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__offset__q31_8c.html b/docs/DSP/html/arm__offset__q31_8c.html
index 4c2a59d..a7038b6 100644
--- a/docs/DSP/html/arm__offset__q31_8c.html
+++ b/docs/DSP/html/arm__offset__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gac84ec42cbbebc5c197a87d0221819acf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__offset.html#gac84ec42cbbebc5c197a87d0221819acf">arm_offset_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> offset, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gac84ec42cbbebc5c197a87d0221819acf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a Q31 vector.  <a href="group__offset.html#gac84ec42cbbebc5c197a87d0221819acf">More...</a><br/></td></tr>
-<tr class="separator:gac84ec42cbbebc5c197a87d0221819acf"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga55604198ef59f391a96ec95c188fca85"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicOffset.html#ga55604198ef59f391a96ec95c188fca85">arm_offset_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> offset, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga55604198ef59f391a96ec95c188fca85"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a Q31 vector.  <a href="group__BasicOffset.html#ga55604198ef59f391a96ec95c188fca85">More...</a><br/></td></tr>
+<tr class="separator:ga55604198ef59f391a96ec95c188fca85"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__offset__q31_8c.html">arm_offset_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__offset__q7_8c.html b/docs/DSP/html/arm__offset__q7_8c.html
index b1c2bcd..35ddfbb 100644
--- a/docs/DSP/html/arm__offset__q7_8c.html
+++ b/docs/DSP/html/arm__offset__q7_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga00bd9cc17c5bf905e76c91ad50886393"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__offset.html#ga00bd9cc17c5bf905e76c91ad50886393">arm_offset_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> offset, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga00bd9cc17c5bf905e76c91ad50886393"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a Q7 vector.  <a href="group__offset.html#ga00bd9cc17c5bf905e76c91ad50886393">More...</a><br/></td></tr>
-<tr class="separator:ga00bd9cc17c5bf905e76c91ad50886393"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga26adad00c10390145b02080a53e782b4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicOffset.html#ga26adad00c10390145b02080a53e782b4">arm_offset_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> offset, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga26adad00c10390145b02080a53e782b4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a Q7 vector.  <a href="group__BasicOffset.html#ga26adad00c10390145b02080a53e782b4">More...</a><br/></td></tr>
+<tr class="separator:ga26adad00c10390145b02080a53e782b4"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__offset__q7_8c.html">arm_offset_q7.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__pid__init__f32_8c.html b/docs/DSP/html/arm__pid__init__f32_8c.html
index b5c0852..a42a39d 100644
--- a/docs/DSP/html/arm__pid__init__f32_8c.html
+++ b/docs/DSP/html/arm__pid__init__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_ef818d145b5ec6db038e10b22abefd0e.html">ControllerFunctions</a></li><li class="navelem"><a class="el" href="arm__pid__init__f32_8c.html">arm_pid_init_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__pid__init__q15_8c.html b/docs/DSP/html/arm__pid__init__q15_8c.html
index effea9a..9c6f0bf 100644
--- a/docs/DSP/html/arm__pid__init__q15_8c.html
+++ b/docs/DSP/html/arm__pid__init__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_ef818d145b5ec6db038e10b22abefd0e.html">ControllerFunctions</a></li><li class="navelem"><a class="el" href="arm__pid__init__q15_8c.html">arm_pid_init_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__pid__init__q31_8c.html b/docs/DSP/html/arm__pid__init__q31_8c.html
index 4deaffc..5103ad3 100644
--- a/docs/DSP/html/arm__pid__init__q31_8c.html
+++ b/docs/DSP/html/arm__pid__init__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_ef818d145b5ec6db038e10b22abefd0e.html">ControllerFunctions</a></li><li class="navelem"><a class="el" href="arm__pid__init__q31_8c.html">arm_pid_init_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__pid__reset__f32_8c.html b/docs/DSP/html/arm__pid__reset__f32_8c.html
index 98ef05f..b7e0ed5 100644
--- a/docs/DSP/html/arm__pid__reset__f32_8c.html
+++ b/docs/DSP/html/arm__pid__reset__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_ef818d145b5ec6db038e10b22abefd0e.html">ControllerFunctions</a></li><li class="navelem"><a class="el" href="arm__pid__reset__f32_8c.html">arm_pid_reset_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__pid__reset__q15_8c.html b/docs/DSP/html/arm__pid__reset__q15_8c.html
index f9f3e3f..299430f 100644
--- a/docs/DSP/html/arm__pid__reset__q15_8c.html
+++ b/docs/DSP/html/arm__pid__reset__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_ef818d145b5ec6db038e10b22abefd0e.html">ControllerFunctions</a></li><li class="navelem"><a class="el" href="arm__pid__reset__q15_8c.html">arm_pid_reset_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__pid__reset__q31_8c.html b/docs/DSP/html/arm__pid__reset__q31_8c.html
index 84c7adf..6fba209 100644
--- a/docs/DSP/html/arm__pid__reset__q31_8c.html
+++ b/docs/DSP/html/arm__pid__reset__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_ef818d145b5ec6db038e10b22abefd0e.html">ControllerFunctions</a></li><li class="navelem"><a class="el" href="arm__pid__reset__q31_8c.html">arm_pid_reset_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__power__f32_8c.html b/docs/DSP/html/arm__power__f32_8c.html
index e65f83f..8c3caae 100644
--- a/docs/DSP/html/arm__power__f32_8c.html
+++ b/docs/DSP/html/arm__power__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
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-<tr class="memitem:ga993c00dd7f661d66bdb6e58426e893aa"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#ga993c00dd7f661d66bdb6e58426e893aa">arm_power_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
-<tr class="memdesc:ga993c00dd7f661d66bdb6e58426e893aa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a floating-point vector.  <a href="group__power.html#ga993c00dd7f661d66bdb6e58426e893aa">More...</a><br/></td></tr>
-<tr class="separator:ga993c00dd7f661d66bdb6e58426e893aa"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad0630e3743da2b5aedbe2bb624a8532f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#gad0630e3743da2b5aedbe2bb624a8532f">arm_power_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
+<tr class="memdesc:gad0630e3743da2b5aedbe2bb624a8532f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a floating-point vector.  <a href="group__power.html#gad0630e3743da2b5aedbe2bb624a8532f">More...</a><br/></td></tr>
+<tr class="separator:gad0630e3743da2b5aedbe2bb624a8532f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__power__f32_8c.html">arm_power_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__power__q15_8c.html b/docs/DSP/html/arm__power__q15_8c.html
index 7b6f006..369a88b 100644
--- a/docs/DSP/html/arm__power__q15_8c.html
+++ b/docs/DSP/html/arm__power__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga7050c04b7515e01a75c38f1abbaf71ba"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#ga7050c04b7515e01a75c38f1abbaf71ba">arm_power_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *pResult)</td></tr>
-<tr class="memdesc:ga7050c04b7515e01a75c38f1abbaf71ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a Q15 vector.  <a href="group__power.html#ga7050c04b7515e01a75c38f1abbaf71ba">More...</a><br/></td></tr>
-<tr class="separator:ga7050c04b7515e01a75c38f1abbaf71ba"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga6b87986c6a3617d4fc32c0572a07706c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#ga6b87986c6a3617d4fc32c0572a07706c">arm_power_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *pResult)</td></tr>
+<tr class="memdesc:ga6b87986c6a3617d4fc32c0572a07706c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a Q15 vector.  <a href="group__power.html#ga6b87986c6a3617d4fc32c0572a07706c">More...</a><br/></td></tr>
+<tr class="separator:ga6b87986c6a3617d4fc32c0572a07706c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__power__q15_8c.html">arm_power_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__power__q31_8c.html b/docs/DSP/html/arm__power__q31_8c.html
index 0d0f3c0..ba5afbc 100644
--- a/docs/DSP/html/arm__power__q31_8c.html
+++ b/docs/DSP/html/arm__power__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga0b93d31bb5b5ed214c2b94d8a7744cd2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#ga0b93d31bb5b5ed214c2b94d8a7744cd2">arm_power_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *pResult)</td></tr>
-<tr class="memdesc:ga0b93d31bb5b5ed214c2b94d8a7744cd2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a Q31 vector.  <a href="group__power.html#ga0b93d31bb5b5ed214c2b94d8a7744cd2">More...</a><br/></td></tr>
-<tr class="separator:ga0b93d31bb5b5ed214c2b94d8a7744cd2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae490bf87084bcdb5dc9fd1d2ef4030b9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#gae490bf87084bcdb5dc9fd1d2ef4030b9">arm_power_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *pResult)</td></tr>
+<tr class="memdesc:gae490bf87084bcdb5dc9fd1d2ef4030b9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a Q31 vector.  <a href="group__power.html#gae490bf87084bcdb5dc9fd1d2ef4030b9">More...</a><br/></td></tr>
+<tr class="separator:gae490bf87084bcdb5dc9fd1d2ef4030b9"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__power__q31_8c.html">arm_power_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__power__q7_8c.html b/docs/DSP/html/arm__power__q7_8c.html
index 78c5a8a..060087c 100644
--- a/docs/DSP/html/arm__power__q7_8c.html
+++ b/docs/DSP/html/arm__power__q7_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gaf969c85c5655e3d72d7b99ff188f92c9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#gaf969c85c5655e3d72d7b99ff188f92c9">arm_power_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
-<tr class="memdesc:gaf969c85c5655e3d72d7b99ff188f92c9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a Q7 vector.  <a href="group__power.html#gaf969c85c5655e3d72d7b99ff188f92c9">More...</a><br/></td></tr>
-<tr class="separator:gaf969c85c5655e3d72d7b99ff188f92c9"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaeb3b9b8e0a4c4bb2549ede074cf43f58"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#gaeb3b9b8e0a4c4bb2549ede074cf43f58">arm_power_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
+<tr class="memdesc:gaeb3b9b8e0a4c4bb2549ede074cf43f58"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a Q7 vector.  <a href="group__power.html#gaeb3b9b8e0a4c4bb2549ede074cf43f58">More...</a><br/></td></tr>
+<tr class="separator:gaeb3b9b8e0a4c4bb2549ede074cf43f58"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__power__q7_8c.html">arm_power_q7.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__q15__to__float_8c.html b/docs/DSP/html/arm__q15__to__float_8c.html
index 4c6e2cc..acc3aaf 100644
--- a/docs/DSP/html/arm__q15__to__float_8c.html
+++ b/docs/DSP/html/arm__q15__to__float_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gaf8b0d2324de273fc430b0e61ad4e9eb2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q15__to__x.html#gaf8b0d2324de273fc430b0e61ad4e9eb2">arm_q15_to_float</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaf8b0d2324de273fc430b0e61ad4e9eb2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q15 vector to floating-point vector.  <a href="group__q15__to__x.html#gaf8b0d2324de273fc430b0e61ad4e9eb2">More...</a><br/></td></tr>
-<tr class="separator:gaf8b0d2324de273fc430b0e61ad4e9eb2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5a75381e7d63ea3a3a315344615281cf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q15__to__x.html#ga5a75381e7d63ea3a3a315344615281cf">arm_q15_to_float</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga5a75381e7d63ea3a3a315344615281cf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q15 vector to floating-point vector.  <a href="group__q15__to__x.html#ga5a75381e7d63ea3a3a315344615281cf">More...</a><br/></td></tr>
+<tr class="separator:ga5a75381e7d63ea3a3a315344615281cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_562f151f187819373d848c62a25ba73f.html">SupportFunctions</a></li><li class="navelem"><a class="el" href="arm__q15__to__float_8c.html">arm_q15_to_float.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__q15__to__q31_8c.html b/docs/DSP/html/arm__q15__to__q31_8c.html
index 5182cd7..560a2a3 100644
--- a/docs/DSP/html/arm__q15__to__q31_8c.html
+++ b/docs/DSP/html/arm__q15__to__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
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-<tr class="memdesc:ga7ba2d87366990ad5380439e2b4a4c0a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q15 vector to Q31 vector.  <a href="group__q15__to__x.html#ga7ba2d87366990ad5380439e2b4a4c0a5">More...</a><br/></td></tr>
-<tr class="separator:ga7ba2d87366990ad5380439e2b4a4c0a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga39647b2109a5c64a067b776302c4a083"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q15__to__x.html#ga39647b2109a5c64a067b776302c4a083">arm_q15_to_q31</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga39647b2109a5c64a067b776302c4a083"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q15 vector to Q31 vector.  <a href="group__q15__to__x.html#ga39647b2109a5c64a067b776302c4a083">More...</a><br/></td></tr>
+<tr class="separator:ga39647b2109a5c64a067b776302c4a083"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
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 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__q15__to__q7_8c.html b/docs/DSP/html/arm__q15__to__q7_8c.html
index 60615c0..185147c 100644
--- a/docs/DSP/html/arm__q15__to__q7_8c.html
+++ b/docs/DSP/html/arm__q15__to__q7_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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-<tr class="memdesc:ga8fb31855ff8cce09c2ec9308f48ded69"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q15 vector to Q7 vector.  <a href="group__q15__to__x.html#ga8fb31855ff8cce09c2ec9308f48ded69">More...</a><br/></td></tr>
-<tr class="separator:ga8fb31855ff8cce09c2ec9308f48ded69"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga837ce281d0e2d5fc445c48334307db19"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q15__to__x.html#ga837ce281d0e2d5fc445c48334307db19">arm_q15_to_q7</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga837ce281d0e2d5fc445c48334307db19"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q15 vector to Q7 vector.  <a href="group__q15__to__x.html#ga837ce281d0e2d5fc445c48334307db19">More...</a><br/></td></tr>
+<tr class="separator:ga837ce281d0e2d5fc445c48334307db19"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_562f151f187819373d848c62a25ba73f.html">SupportFunctions</a></li><li class="navelem"><a class="el" href="arm__q15__to__q7_8c.html">arm_q15_to_q7.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__q31__to__float_8c.html b/docs/DSP/html/arm__q31__to__float_8c.html
index 0fdfa4e..a5398c2 100644
--- a/docs/DSP/html/arm__q31__to__float_8c.html
+++ b/docs/DSP/html/arm__q31__to__float_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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-<tr class="memitem:gacf407b007a37da18e99dabd9023c56b4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q31__to__x.html#gacf407b007a37da18e99dabd9023c56b4">arm_q31_to_float</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gacf407b007a37da18e99dabd9023c56b4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q31 vector to floating-point vector.  <a href="group__q31__to__x.html#gacf407b007a37da18e99dabd9023c56b4">More...</a><br/></td></tr>
-<tr class="separator:gacf407b007a37da18e99dabd9023c56b4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga19a9d023aca1f99abd5da6f13a42b6cf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q31__to__x.html#ga19a9d023aca1f99abd5da6f13a42b6cf">arm_q31_to_float</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga19a9d023aca1f99abd5da6f13a42b6cf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q31 vector to floating-point vector.  <a href="group__q31__to__x.html#ga19a9d023aca1f99abd5da6f13a42b6cf">More...</a><br/></td></tr>
+<tr class="separator:ga19a9d023aca1f99abd5da6f13a42b6cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_562f151f187819373d848c62a25ba73f.html">SupportFunctions</a></li><li class="navelem"><a class="el" href="arm__q31__to__float_8c.html">arm_q31_to_float.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__q31__to__q15_8c.html b/docs/DSP/html/arm__q31__to__q15_8c.html
index bc9da71..3e1cb4d 100644
--- a/docs/DSP/html/arm__q31__to__q15_8c.html
+++ b/docs/DSP/html/arm__q31__to__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
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-<tr class="memitem:ga901dede4661365c9e7c630d3eb31c32c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q31__to__x.html#ga901dede4661365c9e7c630d3eb31c32c">arm_q31_to_q15</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga901dede4661365c9e7c630d3eb31c32c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q31 vector to Q15 vector.  <a href="group__q31__to__x.html#ga901dede4661365c9e7c630d3eb31c32c">More...</a><br/></td></tr>
-<tr class="separator:ga901dede4661365c9e7c630d3eb31c32c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga775f3a1996f00a8048c4b7acba2e0828"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q31__to__x.html#ga775f3a1996f00a8048c4b7acba2e0828">arm_q31_to_q15</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga775f3a1996f00a8048c4b7acba2e0828"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q31 vector to Q15 vector.  <a href="group__q31__to__x.html#ga775f3a1996f00a8048c4b7acba2e0828">More...</a><br/></td></tr>
+<tr class="separator:ga775f3a1996f00a8048c4b7acba2e0828"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_562f151f187819373d848c62a25ba73f.html">SupportFunctions</a></li><li class="navelem"><a class="el" href="arm__q31__to__q15_8c.html">arm_q31_to_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__q31__to__q7_8c.html b/docs/DSP/html/arm__q31__to__q7_8c.html
index b666873..abf6367 100644
--- a/docs/DSP/html/arm__q31__to__q7_8c.html
+++ b/docs/DSP/html/arm__q31__to__q7_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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-<tr class="memitem:ga7f297d1a7d776805395095fdb24a8071"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q31__to__x.html#ga7f297d1a7d776805395095fdb24a8071">arm_q31_to_q7</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga7f297d1a7d776805395095fdb24a8071"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q31 vector to Q7 vector.  <a href="group__q31__to__x.html#ga7f297d1a7d776805395095fdb24a8071">More...</a><br/></td></tr>
-<tr class="separator:ga7f297d1a7d776805395095fdb24a8071"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gabef5357eb3348b3b5b38915fffce8f3d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q31__to__x.html#gabef5357eb3348b3b5b38915fffce8f3d">arm_q31_to_q7</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gabef5357eb3348b3b5b38915fffce8f3d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q31 vector to Q7 vector.  <a href="group__q31__to__x.html#gabef5357eb3348b3b5b38915fffce8f3d">More...</a><br/></td></tr>
+<tr class="separator:gabef5357eb3348b3b5b38915fffce8f3d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_562f151f187819373d848c62a25ba73f.html">SupportFunctions</a></li><li class="navelem"><a class="el" href="arm__q31__to__q7_8c.html">arm_q31_to_q7.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/arm__q7__to__float_8c.html b/docs/DSP/html/arm__q7__to__float_8c.html
index a48c32f..c3682aa 100644
--- a/docs/DSP/html/arm__q7__to__float_8c.html
+++ b/docs/DSP/html/arm__q7__to__float_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga656620f957b65512ed83db03fd455ec5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q7__to__x.html#ga656620f957b65512ed83db03fd455ec5">arm_q7_to_float</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga656620f957b65512ed83db03fd455ec5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q7 vector to floating-point vector.  <a href="group__q7__to__x.html#ga656620f957b65512ed83db03fd455ec5">More...</a><br/></td></tr>
-<tr class="separator:ga656620f957b65512ed83db03fd455ec5"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga840d8a0e8499d02a54f459bb29f5d63c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q7__to__x.html#ga840d8a0e8499d02a54f459bb29f5d63c">arm_q7_to_float</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga840d8a0e8499d02a54f459bb29f5d63c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q7 vector to floating-point vector.  <a href="group__q7__to__x.html#ga840d8a0e8499d02a54f459bb29f5d63c">More...</a><br/></td></tr>
+<tr class="separator:ga840d8a0e8499d02a54f459bb29f5d63c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__q7__to__q15_8c.html b/docs/DSP/html/arm__q7__to__q15_8c.html
index a8792df..8124e9b 100644
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+++ b/docs/DSP/html/arm__q7__to__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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-<tr class="memitem:gabc02597fc3f01033daf43ec0547a2f78"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q7__to__x.html#gabc02597fc3f01033daf43ec0547a2f78">arm_q7_to_q15</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gabc02597fc3f01033daf43ec0547a2f78"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q7 vector to Q15 vector.  <a href="group__q7__to__x.html#gabc02597fc3f01033daf43ec0547a2f78">More...</a><br/></td></tr>
-<tr class="separator:gabc02597fc3f01033daf43ec0547a2f78"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1023c3832ca6be3a6d17ef338cafa28b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q7__to__x.html#ga1023c3832ca6be3a6d17ef338cafa28b">arm_q7_to_q15</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga1023c3832ca6be3a6d17ef338cafa28b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q7 vector to Q15 vector.  <a href="group__q7__to__x.html#ga1023c3832ca6be3a6d17ef338cafa28b">More...</a><br/></td></tr>
+<tr class="separator:ga1023c3832ca6be3a6d17ef338cafa28b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_562f151f187819373d848c62a25ba73f.html">SupportFunctions</a></li><li class="navelem"><a class="el" href="arm__q7__to__q15_8c.html">arm_q7_to_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__q7__to__q31_8c.html b/docs/DSP/html/arm__q7__to__q31_8c.html
index bbbc6dc..69a2e19 100644
--- a/docs/DSP/html/arm__q7__to__q31_8c.html
+++ b/docs/DSP/html/arm__q7__to__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
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-<tr class="memitem:gad8958cd3cb7f521466168b46a25b7908"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q7__to__x.html#gad8958cd3cb7f521466168b46a25b7908">arm_q7_to_q31</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gad8958cd3cb7f521466168b46a25b7908"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q7 vector to Q31 vector.  <a href="group__q7__to__x.html#gad8958cd3cb7f521466168b46a25b7908">More...</a><br/></td></tr>
-<tr class="separator:gad8958cd3cb7f521466168b46a25b7908"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga3c73bfb98fc5a1b4f612264662d0549c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q7__to__x.html#ga3c73bfb98fc5a1b4f612264662d0549c">arm_q7_to_q31</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga3c73bfb98fc5a1b4f612264662d0549c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q7 vector to Q31 vector.  <a href="group__q7__to__x.html#ga3c73bfb98fc5a1b4f612264662d0549c">More...</a><br/></td></tr>
+<tr class="separator:ga3c73bfb98fc5a1b4f612264662d0549c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_562f151f187819373d848c62a25ba73f.html">SupportFunctions</a></li><li class="navelem"><a class="el" href="arm__q7__to__q31_8c.html">arm_q7_to_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__rfft__f32_8c.html b/docs/DSP/html/arm__rfft__f32_8c.html
index be0a8a0..7326cc2 100644
--- a/docs/DSP/html/arm__rfft__f32_8c.html
+++ b/docs/DSP/html/arm__rfft__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,24 +116,25 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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-<tr class="memitem:a3d4062fdfa6aaa3f51f41cab868e508b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__rfft__f32_8c.html#a3d4062fdfa6aaa3f51f41cab868e508b">arm_bitreversal_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint16_t <a class="el" href="arm__fft__bin__example__f32_8c.html#a9b500899c581f6df3ffc0a9f3a9ef6aa">fftSize</a>, uint16_t bitRevFactor, uint16_t *pBitRevTab)</td></tr>
-<tr class="separator:a3d4062fdfa6aaa3f51f41cab868e508b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a6cfdb6bdc66b13732ef2351caf98fdbb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__rfft__f32_8c.html#a6cfdb6bdc66b13732ef2351caf98fdbb">arm_split_rfft_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t fftLen, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pATable, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pBTable, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t modifier)</td></tr>
-<tr class="memdesc:a6cfdb6bdc66b13732ef2351caf98fdbb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core Real FFT process.  <a href="#a6cfdb6bdc66b13732ef2351caf98fdbb">More...</a><br/></td></tr>
-<tr class="separator:a6cfdb6bdc66b13732ef2351caf98fdbb"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a585bef78c103d150a116241a4feb6442"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__rfft__f32_8c.html#a585bef78c103d150a116241a4feb6442">arm_split_rifft_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t fftLen, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pATable, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pBTable, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t modifier)</td></tr>
-<tr class="memdesc:a585bef78c103d150a116241a4feb6442"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core Real IFFT process.  <a href="#a585bef78c103d150a116241a4feb6442">More...</a><br/></td></tr>
-<tr class="separator:a585bef78c103d150a116241a4feb6442"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ac00819467b00656801a5f6a9a5e6d824"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__rfft__f32_8c.html#ac00819467b00656801a5f6a9a5e6d824">arm_radix4_butterfly_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint16_t fftLen, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoef, uint16_t twidCoefModifier)</td></tr>
+<tr class="separator:ac00819467b00656801a5f6a9a5e6d824"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ab3c001e14852633e343079f97cd96f44"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__rfft__f32_8c.html#ab3c001e14852633e343079f97cd96f44">arm_radix4_butterfly_inverse_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint16_t fftLen, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoef, uint16_t twidCoefModifier, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> onebyfftLen)</td></tr>
+<tr class="separator:ab3c001e14852633e343079f97cd96f44"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a81008b023cbc9d37b3ff849877d1eb52"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__rfft__f32_8c.html#a81008b023cbc9d37b3ff849877d1eb52">arm_bitreversal_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint16_t <a class="el" href="arm__fft__bin__example__f32_8c.html#a9b500899c581f6df3ffc0a9f3a9ef6aa">fftSize</a>, uint16_t bitRevFactor, const uint16_t *pBitRevTab)</td></tr>
+<tr class="memdesc:a81008b023cbc9d37b3ff849877d1eb52"><td class="mdescLeft">&#160;</td><td class="mdescRight">In-place floating-point bit reversal function.  <a href="#a81008b023cbc9d37b3ff849877d1eb52">More...</a><br/></td></tr>
+<tr class="separator:a81008b023cbc9d37b3ff849877d1eb52"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:afe1ca79cba2ffb718de94d57af948c9c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__rfft__f32_8c.html#afe1ca79cba2ffb718de94d57af948c9c">arm_split_rfft_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pATable, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pBTable, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t modifier)</td></tr>
+<tr class="memdesc:afe1ca79cba2ffb718de94d57af948c9c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core Real FFT process.  <a href="#afe1ca79cba2ffb718de94d57af948c9c">More...</a><br/></td></tr>
+<tr class="separator:afe1ca79cba2ffb718de94d57af948c9c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a522656f688f96b46d74ecced3d641ba7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__rfft__f32_8c.html#a522656f688f96b46d74ecced3d641ba7">arm_split_rifft_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pATable, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pBTable, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t modifier)</td></tr>
+<tr class="memdesc:a522656f688f96b46d74ecced3d641ba7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core Real IFFT process.  <a href="#a522656f688f96b46d74ecced3d641ba7">More...</a><br/></td></tr>
+<tr class="separator:a522656f688f96b46d74ecced3d641ba7"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga3df1766d230532bc068fc4ed69d0fcdc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32</a> (const <a class="el" href="structarm__rfft__instance__f32.html">arm_rfft_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst)</td></tr>
 <tr class="memdesc:ga3df1766d230532bc068fc4ed69d0fcdc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point RFFT/RIFFT.  <a href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">More...</a><br/></td></tr>
 <tr class="separator:ga3df1766d230532bc068fc4ed69d0fcdc"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="a3d4062fdfa6aaa3f51f41cab868e508b"></a>
+<a class="anchor" id="a81008b023cbc9d37b3ff849877d1eb52"></a>
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 <div class="memproto">
       <table class="memname">
@@ -158,7 +159,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype">uint16_t *&#160;</td>
+          <td class="paramtype">const uint16_t *&#160;</td>
           <td class="paramname"><em>pBitRevTab</em>&#160;</td>
         </tr>
         <tr>
@@ -168,12 +169,20 @@
         </tr>
       </table>
 </div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32()</a>.</p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to in-place floating-point data buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftSize</td><td>length of FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitRevFactor</td><td>bit reversal modifier that supports different size FFTs with the same bit reversal table </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pBitRevTab</td><td>points to bit reversal table </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ae239ddf995d1607115f9e84d5c069b9c"></a>
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           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pCoef</em>, </td>
         </tr>
         <tr>
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         </tr>
       </table>
 </div><div class="memdoc">
-<p>end of ComplexFFT group </p>
-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga521f670cd9c571bc61aff9bec89f4c26">arm_cfft_radix4_f32()</a>, and <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32()</a>.</p>
+<p>end of ComplexFFT group brief Core function for the floating-point CFFT butterfly process. param[in,out] pSrc points to the in-place buffer of floating-point data type param[in] fftLen length of the FFT param[in] pCoef points to the twiddle coefficient buffer param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table return none </p>
 
 </div>
 </div>
-<a class="anchor" id="a2a78df6e4bbf080624f2b6349224ec93"></a>
+<a class="anchor" id="ab3c001e14852633e343079f97cd96f44"></a>
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           <td class="paramkey"></td>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pCoef</em>, </td>
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         <tr>
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         </tr>
       </table>
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-
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga521f670cd9c571bc61aff9bec89f4c26">arm_cfft_radix4_f32()</a>, and <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32()</a>.</p>
+<p>brief Core function for the floating-point CIFFT butterfly process. param[in,out] pSrc points to the in-place buffer of floating-point data type param[in] fftLen length of the FFT param[in] pCoef points to twiddle coefficient buffer param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. param[in] onebyfftLen value of 1/fftLen return none </p>
 
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 </div>
-<a class="anchor" id="a6cfdb6bdc66b13732ef2351caf98fdbb"></a>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pATable</em>, </td>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pBTable</em>, </td>
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@@ -310,22 +316,20 @@
 <p>end of RealFFT group </p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pATable</td><td>points to the twiddle Coef A buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pBTable</td><td>points to the twiddle Coef B buffer. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">modifier</td><td>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pATable</td><td>points to twiddle Coef A buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pBTable</td><td>points to twiddle Coef B buffer </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">modifier</td><td>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table </td></tr>
   </table>
   </dd>
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-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pATable</td><td>points to the twiddle Coef A buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pBTable</td><td>points to the twiddle Coef B buffer. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">modifier</td><td>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pATable</td><td>points to twiddle Coef A buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pBTable</td><td>points to twiddle Coef B buffer </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">modifier</td><td>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -395,7 +397,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_f93595924be31e3058e32faa649f9f3e.html">TransformFunctions</a></li><li class="navelem"><a class="el" href="arm__rfft__f32_8c.html">arm_rfft_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,23 +116,23 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:a47157c5a53c8aac5e80fda31acf1f9cc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__rfft__fast__f32_8c.html#a47157c5a53c8aac5e80fda31acf1f9cc">stage_rfft_f32</a> (<a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *p, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pOut)</td></tr>
-<tr class="separator:a47157c5a53c8aac5e80fda31acf1f9cc"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a93258bc1e64a939a8ebd086367e459af"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__rfft__fast__f32_8c.html#a93258bc1e64a939a8ebd086367e459af">merge_rfft_f32</a> (<a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *p, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pOut)</td></tr>
-<tr class="separator:a93258bc1e64a939a8ebd086367e459af"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a2f74435c5e0b3ea1ca2335e9119be7cc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__rfft__fast__f32_8c.html#a2f74435c5e0b3ea1ca2335e9119be7cc">stage_rfft_f32</a> (const <a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *p, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pOut)</td></tr>
+<tr class="separator:a2f74435c5e0b3ea1ca2335e9119be7cc"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a7b48b01d0ec30d8d206d99d5dbf5f946"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__rfft__fast__f32_8c.html#a7b48b01d0ec30d8d206d99d5dbf5f946">merge_rfft_f32</a> (const <a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *p, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pOut)</td></tr>
+<tr class="separator:a7b48b01d0ec30d8d206d99d5dbf5f946"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga180d8b764d59cbb85d37a2d5f7cd9799"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#ga180d8b764d59cbb85d37a2d5f7cd9799">arm_rfft_fast_f32</a> (<a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *p, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pOut, uint8_t <a class="el" href="arm__fft__bin__example__f32_8c.html#a379ccb99013d369a41b49619083c16ef">ifftFlag</a>)</td></tr>
 <tr class="memdesc:ga180d8b764d59cbb85d37a2d5f7cd9799"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point real FFT.  <a href="group__RealFFT.html#ga180d8b764d59cbb85d37a2d5f7cd9799">More...</a><br/></td></tr>
 <tr class="separator:ga180d8b764d59cbb85d37a2d5f7cd9799"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="a93258bc1e64a939a8ebd086367e459af"></a>
+<a class="anchor" id="a7b48b01d0ec30d8d206d99d5dbf5f946"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void merge_rfft_f32 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *&#160;</td>
           <td class="paramname"><em>S</em>, </td>
         </tr>
         <tr>
@@ -155,20 +155,16 @@
       </table>
 </div><div class="memdoc">
 
-<p>References <a class="el" href="structarm__rfft__fast__instance__f32.html#a9f30b04f163fabc1b24421d3c323d5fc">arm_rfft_fast_instance_f32::pTwiddleRFFT</a>, and <a class="el" href="structarm__rfft__fast__instance__f32.html#a37419ababdfb3151b1891ae6bcd21012">arm_rfft_fast_instance_f32::Sint</a>.</p>
-
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga180d8b764d59cbb85d37a2d5f7cd9799">arm_rfft_fast_f32()</a>.</p>
-
 </div>
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-<p>References <a class="el" href="structarm__rfft__fast__instance__f32.html#a9f30b04f163fabc1b24421d3c323d5fc">arm_rfft_fast_instance_f32::pTwiddleRFFT</a>, and <a class="el" href="structarm__rfft__fast__instance__f32.html#a37419ababdfb3151b1891ae6bcd21012">arm_rfft_fast_instance_f32::Sint</a>.</p>
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-<p>Referenced by <a class="el" href="group__RealFFT.html#ga180d8b764d59cbb85d37a2d5f7cd9799">arm_rfft_fast_f32()</a>.</p>
-
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@@ -203,7 +195,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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+<tr class="memdesc:ga153c8faa97b7ab8b1aef75fe6ac1b3a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the 32pt floating-point real FFT.  <a href="group__RealFFT.html#ga153c8faa97b7ab8b1aef75fe6ac1b3a2">More...</a><br/></td></tr>
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+<tr class="memdesc:gade8432f9318953234761e8e0f2c9e1d2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the 128pt floating-point real FFT.  <a href="group__RealFFT.html#gade8432f9318953234761e8e0f2c9e1d2">More...</a><br/></td></tr>
+<tr class="separator:gade8432f9318953234761e8e0f2c9e1d2"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memdesc:ga678afbb042d942c3dd5a33877ef66492"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the 256pt floating-point real FFT.  <a href="group__RealFFT.html#ga678afbb042d942c3dd5a33877ef66492">More...</a><br/></td></tr>
+<tr class="separator:ga678afbb042d942c3dd5a33877ef66492"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memdesc:ga9a0e72918318f9d1c03973eab379e580"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the 512pt floating-point real FFT.  <a href="group__RealFFT.html#ga9a0e72918318f9d1c03973eab379e580">More...</a><br/></td></tr>
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+<tr class="memdesc:ga71547c601079d55c2525204aa00ef9c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the 1024pt floating-point real FFT.  <a href="group__RealFFT.html#ga71547c601079d55c2525204aa00ef9c2">More...</a><br/></td></tr>
+<tr class="separator:ga71547c601079d55c2525204aa00ef9c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memdesc:ga33724310a8360ac289d5a835282f778c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the 2048pt floating-point real FFT.  <a href="group__RealFFT.html#ga33724310a8360ac289d5a835282f778c">More...</a><br/></td></tr>
+<tr class="separator:ga33724310a8360ac289d5a835282f778c"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memdesc:gaad50a08bb8191e1a138b5f72a268727a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the 4096pt floating-point real FFT.  <a href="group__RealFFT.html#gaad50a08bb8191e1a138b5f72a268727a">More...</a><br/></td></tr>
+<tr class="separator:gaad50a08bb8191e1a138b5f72a268727a"><td class="memSeparator" colspan="2">&#160;</td></tr>
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@@ -126,7 +150,7 @@
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   <ul>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__rfft__init__f32_8c.html b/docs/DSP/html/arm__rfft__init__f32_8c.html
index eceb28e..bdccf12 100644
--- a/docs/DSP/html/arm__rfft__init__f32_8c.html
+++ b/docs/DSP/html/arm__rfft__init__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -108,8 +108,7 @@
 
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-<a href="#func-members">Functions</a> &#124;
-<a href="#var-members">Variables</a>  </div>
+<a href="#func-members">Functions</a>  </div>
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@@ -118,14 +117,8 @@
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+<tr class="memdesc:ga10717ee326bf50832ef1c25b85a23068"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point RFFT/RIFFT.  <a href="group__RealFFT.html#ga10717ee326bf50832ef1c25b85a23068">More...</a><br/></td></tr>
 <tr class="separator:ga10717ee326bf50832ef1c25b85a23068"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memitem:gac52f98b52a1f03bfac8b57a67ba07397"><td class="memItemLeft" align="right" valign="top">static const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT__Table.html#gac52f98b52a1f03bfac8b57a67ba07397">realCoefB</a> [8192]</td></tr>
-<tr class="separator:gac52f98b52a1f03bfac8b57a67ba07397"><td class="memSeparator" colspan="2">&#160;</td></tr>
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@@ -133,7 +126,7 @@
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   <ul>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__rfft__init__q15_8c.html b/docs/DSP/html/arm__rfft__init__q15_8c.html
index 3eeb5ab..d9a7166 100644
--- a/docs/DSP/html/arm__rfft__init__q15_8c.html
+++ b/docs/DSP/html/arm__rfft__init__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -108,8 +108,7 @@
 
 <div class="header">
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-<a href="#func-members">Functions</a> &#124;
-<a href="#var-members">Variables</a>  </div>
+<a href="#func-members">Functions</a>  </div>
   <div class="headertitle">
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 <tr class="separator:ga053450cc600a55410ba5b5605e96245d"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table><table class="memberdecls">
-<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="var-members"></a>
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-<tr class="memitem:ga11e84d0ee257a547f749b37dd0078d36"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> <a class="el" href="arm__math_8h.html#a280a402ab28c399fcc4168f2ed631acb">ALIGN4</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT__Table.html#ga11e84d0ee257a547f749b37dd0078d36">realCoefAQ15</a> [8192]</td></tr>
-<tr class="separator:ga11e84d0ee257a547f749b37dd0078d36"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac871666f018b70938b2b98017628cb97"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> <a class="el" href="arm__math_8h.html#a280a402ab28c399fcc4168f2ed631acb">ALIGN4</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT__Table.html#gac871666f018b70938b2b98017628cb97">realCoefBQ15</a> [8192]</td></tr>
-<tr class="separator:gac871666f018b70938b2b98017628cb97"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
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@@ -134,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_f93595924be31e3058e32faa649f9f3e.html">TransformFunctions</a></li><li class="navelem"><a class="el" href="arm__rfft__init__q15_8c.html">arm_rfft_init_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__rfft__init__q31_8c.html b/docs/DSP/html/arm__rfft__init__q31_8c.html
index a5e6e95..0bfa3a2 100644
--- a/docs/DSP/html/arm__rfft__init__q31_8c.html
+++ b/docs/DSP/html/arm__rfft__init__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -108,8 +108,7 @@
 
 <div class="header">
   <div class="summary">
-<a href="#func-members">Functions</a> &#124;
-<a href="#var-members">Variables</a>  </div>
+<a href="#func-members">Functions</a>  </div>
   <div class="headertitle">
 <div class="title">arm_rfft_init_q31.c File Reference</div>  </div>
 </div><!--header-->
@@ -120,13 +119,6 @@
 <tr class="memitem:ga5abde938abbe72e95c5bab080eb33c45"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#ga5abde938abbe72e95c5bab080eb33c45">arm_rfft_init_q31</a> (<a class="el" href="structarm__rfft__instance__q31.html">arm_rfft_instance_q31</a> *S, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)</td></tr>
 <tr class="memdesc:ga5abde938abbe72e95c5bab080eb33c45"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 RFFT/RIFFT.  <a href="group__RealFFT.html#ga5abde938abbe72e95c5bab080eb33c45">More...</a><br/></td></tr>
 <tr class="separator:ga5abde938abbe72e95c5bab080eb33c45"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table><table class="memberdecls">
-<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="var-members"></a>
-Variables</h2></td></tr>
-<tr class="memitem:gaf1592a6cf0504675205074a43c3728a2"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT__Table.html#gaf1592a6cf0504675205074a43c3728a2">realCoefAQ31</a> [8192]</td></tr>
-<tr class="separator:gaf1592a6cf0504675205074a43c3728a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga1eb5745728a61c3715755f5d69a4a960"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT__Table.html#ga1eb5745728a61c3715755f5d69a4a960">realCoefBQ31</a> [8192]</td></tr>
-<tr class="separator:ga1eb5745728a61c3715755f5d69a4a960"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -134,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_f93595924be31e3058e32faa649f9f3e.html">TransformFunctions</a></li><li class="navelem"><a class="el" href="arm__rfft__init__q31_8c.html">arm_rfft_init_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__rfft__q15_8c.html b/docs/DSP/html/arm__rfft__q15_8c.html
index 1fab8ad..de9541c 100644
--- a/docs/DSP/html/arm__rfft__q15_8c.html
+++ b/docs/DSP/html/arm__rfft__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,18 +116,18 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:a7c2a21793586f9a69c42140665550e09"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__rfft__q15_8c.html#a7c2a21793586f9a69c42140665550e09">arm_split_rfft_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t fftLen, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pATable, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pBTable, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t modifier)</td></tr>
-<tr class="memdesc:a7c2a21793586f9a69c42140665550e09"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core Real FFT process.  <a href="#a7c2a21793586f9a69c42140665550e09">More...</a><br/></td></tr>
-<tr class="separator:a7c2a21793586f9a69c42140665550e09"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:aa72a531dd15a53570dddaf01b62158f4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__rfft__q15_8c.html#aa72a531dd15a53570dddaf01b62158f4">arm_split_rifft_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t fftLen, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pATable, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pBTable, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t modifier)</td></tr>
-<tr class="memdesc:aa72a531dd15a53570dddaf01b62158f4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core Real IFFT process.  <a href="#aa72a531dd15a53570dddaf01b62158f4">More...</a><br/></td></tr>
-<tr class="separator:aa72a531dd15a53570dddaf01b62158f4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a8bc3e55eab484573a72adf768a59dcb1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__rfft__q15_8c.html#a8bc3e55eab484573a72adf768a59dcb1">arm_split_rfft_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pATable, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pBTable, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t modifier)</td></tr>
+<tr class="memdesc:a8bc3e55eab484573a72adf768a59dcb1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core Real FFT process.  <a href="#a8bc3e55eab484573a72adf768a59dcb1">More...</a><br/></td></tr>
+<tr class="separator:a8bc3e55eab484573a72adf768a59dcb1"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:aa7c916585af6035f064a4f53d85de00a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__rfft__q15_8c.html#aa7c916585af6035f064a4f53d85de00a">arm_split_rifft_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pATable, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pBTable, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t modifier)</td></tr>
+<tr class="memdesc:aa7c916585af6035f064a4f53d85de00a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core Real IFFT process.  <a href="#aa7c916585af6035f064a4f53d85de00a">More...</a><br/></td></tr>
+<tr class="separator:aa7c916585af6035f064a4f53d85de00a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga00e615f5db21736ad5b27fb6146f3fc5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#ga00e615f5db21736ad5b27fb6146f3fc5">arm_rfft_q15</a> (const <a class="el" href="structarm__rfft__instance__q15.html">arm_rfft_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
 <tr class="memdesc:ga00e615f5db21736ad5b27fb6146f3fc5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 RFFT/RIFFT.  <a href="group__RealFFT.html#ga00e615f5db21736ad5b27fb6146f3fc5">More...</a><br/></td></tr>
 <tr class="separator:ga00e615f5db21736ad5b27fb6146f3fc5"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="a7c2a21793586f9a69c42140665550e09"></a>
+<a class="anchor" id="a8bc3e55eab484573a72adf768a59dcb1"></a>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pATable</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pBTable</em>, </td>
         </tr>
         <tr>
@@ -177,24 +177,21 @@
 <p>end of RealFFT group </p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramname">*pSrc</td><td>points to the input buffer. </td></tr>
-    <tr><td class="paramname">fftLen</td><td>length of FFT. </td></tr>
-    <tr><td class="paramname">*pATable</td><td>points to the A twiddle Coef buffer. </td></tr>
-    <tr><td class="paramname">*pBTable</td><td>points to the B twiddle Coef buffer. </td></tr>
-    <tr><td class="paramname">*pDst</td><td>points to the output buffer. </td></tr>
-    <tr><td class="paramname">modifier</td><td>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pATable</td><td>points to twiddle Coef A buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pBTable</td><td>points to twiddle Coef B buffer </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">modifier</td><td>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. The function implements a Real FFT </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#aa611fdbf6c56c46553701d6596a79aaf">__SMLAD()</a>, <a class="el" href="arm__math_8h.html#a7fc670277db1ad9ac34d52d771c7c305">__SMLADX()</a>, <a class="el" href="arm__math_8h.html#a6b293f62ad7eb225fa9ce0f39458eba3">__SMUSD()</a>, and <a class="el" href="arm__math_8h.html#a7375d1deba32929dc97008bfa7085d46">__SMUSDX()</a>.</p>
-
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga00e615f5db21736ad5b27fb6146f3fc5">arm_rfft_q15()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt></dt><dd>The function implements a Real FFT </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="aa72a531dd15a53570dddaf01b62158f4"></a>
+<a class="anchor" id="aa7c916585af6035f064a4f53d85de00a"></a>
 <div class="memitem">
 <div class="memproto">
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pATable</em>, </td>
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         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pBTable</em>, </td>
         </tr>
         <tr>
@@ -243,20 +240,17 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pATable</td><td>points to the twiddle Coef A buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pBTable</td><td>points to the twiddle Coef B buffer. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">modifier</td><td>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pATable</td><td>points to twiddle Coef A buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pBTable</td><td>points to twiddle Coef B buffer </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">modifier</td><td>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. The function implements a Real IFFT </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#aa611fdbf6c56c46553701d6596a79aaf">__SMLAD()</a>, <a class="el" href="arm__math_8h.html#a5d61b7d886888f9f1f35c079eb5d01c9">__SMLSDX()</a>, <a class="el" href="arm__math_8h.html#a9c58d7b4648a973d91e27544bc190e60">__SMUADX()</a>, and <a class="el" href="arm__math_8h.html#a6b293f62ad7eb225fa9ce0f39458eba3">__SMUSD()</a>.</p>
-
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga00e615f5db21736ad5b27fb6146f3fc5">arm_rfft_q15()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt></dt><dd>The function implements a Real IFFT </dd></dl>
 
 </div>
 </div>
@@ -266,7 +260,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_f93595924be31e3058e32faa649f9f3e.html">TransformFunctions</a></li><li class="navelem"><a class="el" href="arm__rfft__q15_8c.html">arm_rfft_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/arm__rfft__q31_8c.html b/docs/DSP/html/arm__rfft__q31_8c.html
index a66c69c..6717135 100644
--- a/docs/DSP/html/arm__rfft__q31_8c.html
+++ b/docs/DSP/html/arm__rfft__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,18 +116,18 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:a520e1c358d44fcd2724cb19d46eb5dfa"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__rfft__q31_8c.html#a520e1c358d44fcd2724cb19d46eb5dfa">arm_split_rfft_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pATable, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pBTable, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t modifier)</td></tr>
-<tr class="memdesc:a520e1c358d44fcd2724cb19d46eb5dfa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core Real FFT process.  <a href="#a520e1c358d44fcd2724cb19d46eb5dfa">More...</a><br/></td></tr>
-<tr class="separator:a520e1c358d44fcd2724cb19d46eb5dfa"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:acc62dd39a59091c4d6a80d4e55adeb13"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__rfft__q31_8c.html#acc62dd39a59091c4d6a80d4e55adeb13">arm_split_rifft_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pATable, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pBTable, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t modifier)</td></tr>
-<tr class="memdesc:acc62dd39a59091c4d6a80d4e55adeb13"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core Real IFFT process.  <a href="#acc62dd39a59091c4d6a80d4e55adeb13">More...</a><br/></td></tr>
-<tr class="separator:acc62dd39a59091c4d6a80d4e55adeb13"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a5a842f3fd929c352132b521cadcb5d22"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__rfft__q31_8c.html#a5a842f3fd929c352132b521cadcb5d22">arm_split_rfft_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pATable, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pBTable, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t modifier)</td></tr>
+<tr class="memdesc:a5a842f3fd929c352132b521cadcb5d22"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core Real FFT process.  <a href="#a5a842f3fd929c352132b521cadcb5d22">More...</a><br/></td></tr>
+<tr class="separator:a5a842f3fd929c352132b521cadcb5d22"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ac8c8d151a7f08f1c6f1c0554f1bb51da"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__rfft__q31_8c.html#ac8c8d151a7f08f1c6f1c0554f1bb51da">arm_split_rifft_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t fftLen, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pATable, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pBTable, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t modifier)</td></tr>
+<tr class="memdesc:ac8c8d151a7f08f1c6f1c0554f1bb51da"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core Real IFFT process.  <a href="#ac8c8d151a7f08f1c6f1c0554f1bb51da">More...</a><br/></td></tr>
+<tr class="separator:ac8c8d151a7f08f1c6f1c0554f1bb51da"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gabaeab5646aeea9844e6d42ca8c73fe3a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#gabaeab5646aeea9844e6d42ca8c73fe3a">arm_rfft_q31</a> (const <a class="el" href="structarm__rfft__instance__q31.html">arm_rfft_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
 <tr class="memdesc:gabaeab5646aeea9844e6d42ca8c73fe3a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 RFFT/RIFFT.  <a href="group__RealFFT.html#gabaeab5646aeea9844e6d42ca8c73fe3a">More...</a><br/></td></tr>
 <tr class="separator:gabaeab5646aeea9844e6d42ca8c73fe3a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="a520e1c358d44fcd2724cb19d46eb5dfa"></a>
+<a class="anchor" id="a5a842f3fd929c352132b521cadcb5d22"></a>
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         <tr>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pATable</em>, </td>
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           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pBTable</em>, </td>
         </tr>
         <tr>
@@ -177,24 +177,20 @@
 <p>end of RealFFT group </p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pATable</td><td>points to the twiddle Coef A buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pBTable</td><td>points to the twiddle Coef B buffer. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">modifier</td><td>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pATable</td><td>points to twiddle Coef A buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pBTable</td><td>points to twiddle Coef B buffer </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">modifier</td><td>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a960f210642058d2b3d5368729a6e8375">mult_32x32_keep32_R</a>, <a class="el" href="arm__math_8h.html#aba3e538352fc7f9d6d15f9a18d469399">multAcc_32x32_keep32_R</a>, and <a class="el" href="arm__math_8h.html#a668fbf1cd1c3bc8faf1b1c83964ade23">multSub_32x32_keep32_R</a>.</p>
-
-<p>Referenced by <a class="el" href="group__RealFFT.html#gabaeab5646aeea9844e6d42ca8c73fe3a">arm_rfft_q31()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="acc62dd39a59091c4d6a80d4e55adeb13"></a>
+<a class="anchor" id="ac8c8d151a7f08f1c6f1c0554f1bb51da"></a>
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           <td class="paramkey"></td>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pATable</em>, </td>
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         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pBTable</em>, </td>
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         <tr>
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 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pATable</td><td>points to the twiddle Coef A buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pBTable</td><td>points to the twiddle Coef B buffer. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">modifier</td><td>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pATable</td><td>points to twiddle Coef A buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pBTable</td><td>points to twiddle Coef B buffer </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">modifier</td><td>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a960f210642058d2b3d5368729a6e8375">mult_32x32_keep32_R</a>, <a class="el" href="arm__math_8h.html#aba3e538352fc7f9d6d15f9a18d469399">multAcc_32x32_keep32_R</a>, and <a class="el" href="arm__math_8h.html#a668fbf1cd1c3bc8faf1b1c83964ade23">multSub_32x32_keep32_R</a>.</p>
-
-<p>Referenced by <a class="el" href="group__RealFFT.html#gabaeab5646aeea9844e6d42ca8c73fe3a">arm_rfft_q31()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -266,7 +258,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_f93595924be31e3058e32faa649f9f3e.html">TransformFunctions</a></li><li class="navelem"><a class="el" href="arm__rfft__q31_8c.html">arm_rfft_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__rms__f32_8c.html b/docs/DSP/html/arm__rms__f32_8c.html
index 0cde4f7..faa1927 100644
--- a/docs/DSP/html/arm__rms__f32_8c.html
+++ b/docs/DSP/html/arm__rms__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga0e3ab1b57da32d45388d1fa90d7fd88c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RMS.html#ga0e3ab1b57da32d45388d1fa90d7fd88c">arm_rms_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
-<tr class="memdesc:ga0e3ab1b57da32d45388d1fa90d7fd88c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Root Mean Square of the elements of a floating-point vector.  <a href="group__RMS.html#ga0e3ab1b57da32d45388d1fa90d7fd88c">More...</a><br/></td></tr>
-<tr class="separator:ga0e3ab1b57da32d45388d1fa90d7fd88c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaeb487e726e3755a7614a29c9d16a93e7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RMS.html#gaeb487e726e3755a7614a29c9d16a93e7">arm_rms_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
+<tr class="memdesc:gaeb487e726e3755a7614a29c9d16a93e7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Root Mean Square of the elements of a floating-point vector.  <a href="group__RMS.html#gaeb487e726e3755a7614a29c9d16a93e7">More...</a><br/></td></tr>
+<tr class="separator:gaeb487e726e3755a7614a29c9d16a93e7"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__rms__f32_8c.html">arm_rms_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__rms__q15_8c.html b/docs/DSP/html/arm__rms__q15_8c.html
index 8f74cfb..e17ac6d 100644
--- a/docs/DSP/html/arm__rms__q15_8c.html
+++ b/docs/DSP/html/arm__rms__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gaf5b836b72dda9e5dfbbd17c7906fd13f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RMS.html#gaf5b836b72dda9e5dfbbd17c7906fd13f">arm_rms_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult)</td></tr>
-<tr class="memdesc:gaf5b836b72dda9e5dfbbd17c7906fd13f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Root Mean Square of the elements of a Q15 vector.  <a href="group__RMS.html#gaf5b836b72dda9e5dfbbd17c7906fd13f">More...</a><br/></td></tr>
-<tr class="separator:gaf5b836b72dda9e5dfbbd17c7906fd13f"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memdesc:ga8be796318d41c7cbb68f8f3c0b96020f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Root Mean Square of the elements of a Q15 vector.  <a href="group__RMS.html#ga8be796318d41c7cbb68f8f3c0b96020f">More...</a><br/></td></tr>
+<tr class="separator:ga8be796318d41c7cbb68f8f3c0b96020f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__rms__q15_8c.html">arm_rms_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__rms__q31_8c.html b/docs/DSP/html/arm__rms__q31_8c.html
index 5c99735..c34c4ac 100644
--- a/docs/DSP/html/arm__rms__q31_8c.html
+++ b/docs/DSP/html/arm__rms__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gae33015fda23fc44e7ead5e5ed7e8d314"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RMS.html#gae33015fda23fc44e7ead5e5ed7e8d314">arm_rms_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
-<tr class="memdesc:gae33015fda23fc44e7ead5e5ed7e8d314"><td class="mdescLeft">&#160;</td><td class="mdescRight">Root Mean Square of the elements of a Q31 vector.  <a href="group__RMS.html#gae33015fda23fc44e7ead5e5ed7e8d314">More...</a><br/></td></tr>
-<tr class="separator:gae33015fda23fc44e7ead5e5ed7e8d314"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga20586bc59cabbfc38a935c2448833dd2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RMS.html#ga20586bc59cabbfc38a935c2448833dd2">arm_rms_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
+<tr class="memdesc:ga20586bc59cabbfc38a935c2448833dd2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Root Mean Square of the elements of a Q31 vector.  <a href="group__RMS.html#ga20586bc59cabbfc38a935c2448833dd2">More...</a><br/></td></tr>
+<tr class="separator:ga20586bc59cabbfc38a935c2448833dd2"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__rms__q31_8c.html">arm_rms_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__scale__f32_8c.html b/docs/DSP/html/arm__scale__f32_8c.html
index fcccdf6..99d0f1b 100644
--- a/docs/DSP/html/arm__scale__f32_8c.html
+++ b/docs/DSP/html/arm__scale__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga3487af88b112f682ee90589cd419e123"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__scale.html#ga3487af88b112f682ee90589cd419e123">arm_scale_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> scale, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga3487af88b112f682ee90589cd419e123"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a floating-point vector by a scalar.  <a href="group__scale.html#ga3487af88b112f682ee90589cd419e123">More...</a><br/></td></tr>
-<tr class="separator:ga3487af88b112f682ee90589cd419e123"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5e769c8e22da173674c6abca7291e713"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicScale.html#ga5e769c8e22da173674c6abca7291e713">arm_scale_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> scale, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga5e769c8e22da173674c6abca7291e713"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a floating-point vector by a scalar.  <a href="group__BasicScale.html#ga5e769c8e22da173674c6abca7291e713">More...</a><br/></td></tr>
+<tr class="separator:ga5e769c8e22da173674c6abca7291e713"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__scale__f32_8c.html">arm_scale_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__scale__q15_8c.html b/docs/DSP/html/arm__scale__q15_8c.html
index 546059c..5ddad81 100644
--- a/docs/DSP/html/arm__scale__q15_8c.html
+++ b/docs/DSP/html/arm__scale__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gafaac0e1927daffeb68a42719b53ea780"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__scale.html#gafaac0e1927daffeb68a42719b53ea780">arm_scale_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> scaleFract, int8_t shift, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gafaac0e1927daffeb68a42719b53ea780"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a Q15 vector by a scalar.  <a href="group__scale.html#gafaac0e1927daffeb68a42719b53ea780">More...</a><br/></td></tr>
-<tr class="separator:gafaac0e1927daffeb68a42719b53ea780"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4663809f04249df5ea186ea09335e687"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicScale.html#ga4663809f04249df5ea186ea09335e687">arm_scale_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> scaleFract, int8_t shift, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga4663809f04249df5ea186ea09335e687"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a Q15 vector by a scalar.  <a href="group__BasicScale.html#ga4663809f04249df5ea186ea09335e687">More...</a><br/></td></tr>
+<tr class="separator:ga4663809f04249df5ea186ea09335e687"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__scale__q15_8c.html">arm_scale_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__scale__q31_8c.html b/docs/DSP/html/arm__scale__q31_8c.html
index f929be9..b28a8b2 100644
--- a/docs/DSP/html/arm__scale__q31_8c.html
+++ b/docs/DSP/html/arm__scale__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga83e36cd82bf51ce35406a199e477d47c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__scale.html#ga83e36cd82bf51ce35406a199e477d47c">arm_scale_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> scaleFract, int8_t shift, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga83e36cd82bf51ce35406a199e477d47c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a Q31 vector by a scalar.  <a href="group__scale.html#ga83e36cd82bf51ce35406a199e477d47c">More...</a><br/></td></tr>
-<tr class="separator:ga83e36cd82bf51ce35406a199e477d47c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga8b2b6ea2e39ca464e8f2cfdd937c022b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicScale.html#ga8b2b6ea2e39ca464e8f2cfdd937c022b">arm_scale_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> scaleFract, int8_t shift, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga8b2b6ea2e39ca464e8f2cfdd937c022b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a Q31 vector by a scalar.  <a href="group__BasicScale.html#ga8b2b6ea2e39ca464e8f2cfdd937c022b">More...</a><br/></td></tr>
+<tr class="separator:ga8b2b6ea2e39ca464e8f2cfdd937c022b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__scale__q31_8c.html">arm_scale_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__scale__q7_8c.html b/docs/DSP/html/arm__scale__q7_8c.html
index ff612bc..85fc4ec 100644
--- a/docs/DSP/html/arm__scale__q7_8c.html
+++ b/docs/DSP/html/arm__scale__q7_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gabc9fd3d37904c58df56492b351d21fb0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__scale.html#gabc9fd3d37904c58df56492b351d21fb0">arm_scale_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> scaleFract, int8_t shift, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gabc9fd3d37904c58df56492b351d21fb0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a Q7 vector by a scalar.  <a href="group__scale.html#gabc9fd3d37904c58df56492b351d21fb0">More...</a><br/></td></tr>
-<tr class="separator:gabc9fd3d37904c58df56492b351d21fb0"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0d135086c6b813251b47a0d127b75eb8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicScale.html#ga0d135086c6b813251b47a0d127b75eb8">arm_scale_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> scaleFract, int8_t shift, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga0d135086c6b813251b47a0d127b75eb8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a Q7 vector by a scalar.  <a href="group__BasicScale.html#ga0d135086c6b813251b47a0d127b75eb8">More...</a><br/></td></tr>
+<tr class="separator:ga0d135086c6b813251b47a0d127b75eb8"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__scale__q7_8c.html">arm_scale_q7.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__shift__q15_8c.html b/docs/DSP/html/arm__shift__q15_8c.html
index ac1cffb..dcee7ce 100644
--- a/docs/DSP/html/arm__shift__q15_8c.html
+++ b/docs/DSP/html/arm__shift__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gaa1757e53279780107acc92cf100adb61"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__shift.html#gaa1757e53279780107acc92cf100adb61">arm_shift_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, int8_t shiftBits, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaa1757e53279780107acc92cf100adb61"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shifts the elements of a Q15 vector a specified number of bits.  <a href="group__shift.html#gaa1757e53279780107acc92cf100adb61">More...</a><br/></td></tr>
-<tr class="separator:gaa1757e53279780107acc92cf100adb61"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab7a2f614c2fcee25cb8bae4c2a6bc3ab"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicShift.html#gab7a2f614c2fcee25cb8bae4c2a6bc3ab">arm_shift_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, int8_t shiftBits, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gab7a2f614c2fcee25cb8bae4c2a6bc3ab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shifts the elements of a Q15 vector a specified number of bits.  <a href="group__BasicShift.html#gab7a2f614c2fcee25cb8bae4c2a6bc3ab">More...</a><br/></td></tr>
+<tr class="separator:gab7a2f614c2fcee25cb8bae4c2a6bc3ab"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__shift__q15_8c.html">arm_shift_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__shift__q31_8c.html b/docs/DSP/html/arm__shift__q31_8c.html
index 06d56e3..a9a5521 100644
--- a/docs/DSP/html/arm__shift__q31_8c.html
+++ b/docs/DSP/html/arm__shift__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga387dd8b7b87377378280978f16cdb13d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__shift.html#ga387dd8b7b87377378280978f16cdb13d">arm_shift_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, int8_t shiftBits, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga387dd8b7b87377378280978f16cdb13d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shifts the elements of a Q31 vector a specified number of bits.  <a href="group__shift.html#ga387dd8b7b87377378280978f16cdb13d">More...</a><br/></td></tr>
-<tr class="separator:ga387dd8b7b87377378280978f16cdb13d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gabc69335d1cf2eba1c469c8c8291f3589"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicShift.html#gabc69335d1cf2eba1c469c8c8291f3589">arm_shift_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, int8_t shiftBits, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gabc69335d1cf2eba1c469c8c8291f3589"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shifts the elements of a Q31 vector a specified number of bits.  <a href="group__BasicShift.html#gabc69335d1cf2eba1c469c8c8291f3589">More...</a><br/></td></tr>
+<tr class="separator:gabc69335d1cf2eba1c469c8c8291f3589"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__shift__q31_8c.html">arm_shift_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__shift__q7_8c.html b/docs/DSP/html/arm__shift__q7_8c.html
index 3b75f17..123c07e 100644
--- a/docs/DSP/html/arm__shift__q7_8c.html
+++ b/docs/DSP/html/arm__shift__q7_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga47295d08a685f7de700a48dafb4db6fb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__shift.html#ga47295d08a685f7de700a48dafb4db6fb">arm_shift_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, int8_t shiftBits, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga47295d08a685f7de700a48dafb4db6fb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shifts the elements of a Q7 vector a specified number of bits.  <a href="group__shift.html#ga47295d08a685f7de700a48dafb4db6fb">More...</a><br/></td></tr>
-<tr class="separator:ga47295d08a685f7de700a48dafb4db6fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga87bbb3db84f2af6c38f4fc17cbecfd2e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicShift.html#ga87bbb3db84f2af6c38f4fc17cbecfd2e">arm_shift_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, int8_t shiftBits, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga87bbb3db84f2af6c38f4fc17cbecfd2e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shifts the elements of a Q7 vector a specified number of bits.  <a href="group__BasicShift.html#ga87bbb3db84f2af6c38f4fc17cbecfd2e">More...</a><br/></td></tr>
+<tr class="separator:ga87bbb3db84f2af6c38f4fc17cbecfd2e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__shift__q7_8c.html">arm_shift_q7.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__signal__converge__data_8c.html b/docs/DSP/html/arm__signal__converge__data_8c.html
index e37c371..5b470c3 100644
--- a/docs/DSP/html/arm__signal__converge__data_8c.html
+++ b/docs/DSP/html/arm__signal__converge__data_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -134,8 +134,6 @@
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-<p>Referenced by <a class="el" href="arm__signal__converge__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
-
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-<p>Referenced by <a class="el" href="arm__signal__converge__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
-
 </div>
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@@ -170,7 +166,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_abd1d8a41d439a254a6d729f0d888b04.html">Examples</a></li><li class="navelem"><a class="el" href="dir_dd8be1de2cb2fdb097bade8f148f6c3f.html">ARM</a></li><li class="navelem"><a class="el" href="dir_f7b1dad887759bfadf83e5e1cd802011.html">arm_signal_converge_example</a></li><li class="navelem"><a class="el" href="arm__signal__converge__data_8c.html">arm_signal_converge_data.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__signal__converge__example_2Abstract_8txt.html b/docs/DSP/html/arm__signal__converge__example_2Abstract_8txt.html
index 056308a..41e54f6 100644
--- a/docs/DSP/html/arm__signal__converge__example_2Abstract_8txt.html
+++ b/docs/DSP/html/arm__signal__converge__example_2Abstract_8txt.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -156,7 +156,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="arm__signal__converge__example_2Abstract_8txt.html">Abstract.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__signal__converge__example_2math__helper_8c.html b/docs/DSP/html/arm__signal__converge__example_2math__helper_8c.html
index 42f195c..450ef1f 100644
--- a/docs/DSP/html/arm__signal__converge__example_2math__helper_8c.html
+++ b/docs/DSP/html/arm__signal__converge__example_2math__helper_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -202,8 +202,6 @@
 </dl>
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-<p>References <a class="el" href="arm__convolution__example_2math__helper_8c.html#ace1e1f7b72573d1934782ec999a04f99">arm_calc_2pow()</a>.</p>
-
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@@ -227,8 +225,6 @@
 </dl>
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-<p>Referenced by <a class="el" href="arm__signal__converge__example_2math__helper_8c.html#a13580a6ff7a8a68146de727bdf8fba88">arm_apply_guard_bits()</a>.</p>
-
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@@ -614,8 +610,6 @@
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-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
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@@ -657,8 +651,6 @@
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>none The function Provides the guard bits for the buffer to avoid overflow </dd></dl>
 
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
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@@ -700,8 +692,6 @@
 </dl>
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-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
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+<tr class="memitem:ga287b6ce703636c7e8cb9833b290ae4ce"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__STD.html#ga287b6ce703636c7e8cb9833b290ae4ce">arm_std_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
+<tr class="memdesc:ga287b6ce703636c7e8cb9833b290ae4ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Standard deviation of the elements of a floating-point vector.  <a href="group__STD.html#ga287b6ce703636c7e8cb9833b290ae4ce">More...</a><br/></td></tr>
+<tr class="separator:ga287b6ce703636c7e8cb9833b290ae4ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__std__f32_8c.html">arm_std_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__std__q15_8c.html b/docs/DSP/html/arm__std__q15_8c.html
index f85103f..125bbf5 100644
--- a/docs/DSP/html/arm__std__q15_8c.html
+++ b/docs/DSP/html/arm__std__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gaf9d27afa9928ff28a63cd98ea9218a72"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__STD.html#gaf9d27afa9928ff28a63cd98ea9218a72">arm_std_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult)</td></tr>
-<tr class="memdesc:gaf9d27afa9928ff28a63cd98ea9218a72"><td class="mdescLeft">&#160;</td><td class="mdescRight">Standard deviation of the elements of a Q15 vector.  <a href="group__STD.html#gaf9d27afa9928ff28a63cd98ea9218a72">More...</a><br/></td></tr>
-<tr class="separator:gaf9d27afa9928ff28a63cd98ea9218a72"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4179a8150b161ce2c3d734d8cb19cebe"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__STD.html#ga4179a8150b161ce2c3d734d8cb19cebe">arm_std_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult)</td></tr>
+<tr class="memdesc:ga4179a8150b161ce2c3d734d8cb19cebe"><td class="mdescLeft">&#160;</td><td class="mdescRight">Standard deviation of the elements of a Q15 vector.  <a href="group__STD.html#ga4179a8150b161ce2c3d734d8cb19cebe">More...</a><br/></td></tr>
+<tr class="separator:ga4179a8150b161ce2c3d734d8cb19cebe"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__std__q15_8c.html">arm_std_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__std__q31_8c.html b/docs/DSP/html/arm__std__q31_8c.html
index ef56074..1f4c770 100644
--- a/docs/DSP/html/arm__std__q31_8c.html
+++ b/docs/DSP/html/arm__std__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga39495e74f96116178be085c9dc7742f5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__STD.html#ga39495e74f96116178be085c9dc7742f5">arm_std_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
-<tr class="memdesc:ga39495e74f96116178be085c9dc7742f5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Standard deviation of the elements of a Q31 vector.  <a href="group__STD.html#ga39495e74f96116178be085c9dc7742f5">More...</a><br/></td></tr>
-<tr class="separator:ga39495e74f96116178be085c9dc7742f5"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafe382f5d8f3e7d310f2e2f2b5d873797"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__STD.html#gafe382f5d8f3e7d310f2e2f2b5d873797">arm_std_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
+<tr class="memdesc:gafe382f5d8f3e7d310f2e2f2b5d873797"><td class="mdescLeft">&#160;</td><td class="mdescRight">Standard deviation of the elements of a Q31 vector.  <a href="group__STD.html#gafe382f5d8f3e7d310f2e2f2b5d873797">More...</a><br/></td></tr>
+<tr class="separator:gafe382f5d8f3e7d310f2e2f2b5d873797"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__std__q31_8c.html">arm_std_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__sub__f32_8c.html b/docs/DSP/html/arm__sub__f32_8c.html
index 326b77a..e82caff 100644
--- a/docs/DSP/html/arm__sub__f32_8c.html
+++ b/docs/DSP/html/arm__sub__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga7f975a472de286331134227c08aad826"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicSub.html#ga7f975a472de286331134227c08aad826">arm_sub_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga7f975a472de286331134227c08aad826"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point vector subtraction.  <a href="group__BasicSub.html#ga7f975a472de286331134227c08aad826">More...</a><br/></td></tr>
-<tr class="separator:ga7f975a472de286331134227c08aad826"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga76b8b2aec34269c6de0b090cab00fb33"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicSub.html#ga76b8b2aec34269c6de0b090cab00fb33">arm_sub_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga76b8b2aec34269c6de0b090cab00fb33"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point vector subtraction.  <a href="group__BasicSub.html#ga76b8b2aec34269c6de0b090cab00fb33">More...</a><br/></td></tr>
+<tr class="separator:ga76b8b2aec34269c6de0b090cab00fb33"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__sub__f32_8c.html">arm_sub_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__sub__q15_8c.html b/docs/DSP/html/arm__sub__q15_8c.html
index 3f188c0..e4a6c6a 100644
--- a/docs/DSP/html/arm__sub__q15_8c.html
+++ b/docs/DSP/html/arm__sub__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga997a8ee93088d15bda23c325d455b588"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicSub.html#ga997a8ee93088d15bda23c325d455b588">arm_sub_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga997a8ee93088d15bda23c325d455b588"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 vector subtraction.  <a href="group__BasicSub.html#ga997a8ee93088d15bda23c325d455b588">More...</a><br/></td></tr>
-<tr class="separator:ga997a8ee93088d15bda23c325d455b588"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga33a096c2860eca18bbc4e6966409064f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicSub.html#ga33a096c2860eca18bbc4e6966409064f">arm_sub_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga33a096c2860eca18bbc4e6966409064f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 vector subtraction.  <a href="group__BasicSub.html#ga33a096c2860eca18bbc4e6966409064f">More...</a><br/></td></tr>
+<tr class="separator:ga33a096c2860eca18bbc4e6966409064f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__sub__q15_8c.html">arm_sub_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__sub__q31_8c.html b/docs/DSP/html/arm__sub__q31_8c.html
index e88a61f..3dc251e 100644
--- a/docs/DSP/html/arm__sub__q31_8c.html
+++ b/docs/DSP/html/arm__sub__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga28aa6908d092752144413e21933dc878"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicSub.html#ga28aa6908d092752144413e21933dc878">arm_sub_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga28aa6908d092752144413e21933dc878"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector subtraction.  <a href="group__BasicSub.html#ga28aa6908d092752144413e21933dc878">More...</a><br/></td></tr>
-<tr class="separator:ga28aa6908d092752144413e21933dc878"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga913159f71589b56dbfb03ddc1210a59c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicSub.html#ga913159f71589b56dbfb03ddc1210a59c">arm_sub_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga913159f71589b56dbfb03ddc1210a59c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector subtraction.  <a href="group__BasicSub.html#ga913159f71589b56dbfb03ddc1210a59c">More...</a><br/></td></tr>
+<tr class="separator:ga913159f71589b56dbfb03ddc1210a59c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__sub__q31_8c.html">arm_sub_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__sub__q7_8c.html b/docs/DSP/html/arm__sub__q7_8c.html
index 45989ca..87bc16c 100644
--- a/docs/DSP/html/arm__sub__q7_8c.html
+++ b/docs/DSP/html/arm__sub__q7_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gab09941de7dfeb247e5c29b406a435fcc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicSub.html#gab09941de7dfeb247e5c29b406a435fcc">arm_sub_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gab09941de7dfeb247e5c29b406a435fcc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector subtraction.  <a href="group__BasicSub.html#gab09941de7dfeb247e5c29b406a435fcc">More...</a><br/></td></tr>
-<tr class="separator:gab09941de7dfeb247e5c29b406a435fcc"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga162990b82a18231c4e606ba0e6584c7e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicSub.html#ga162990b82a18231c4e606ba0e6584c7e">arm_sub_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga162990b82a18231c4e606ba0e6584c7e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector subtraction.  <a href="group__BasicSub.html#ga162990b82a18231c4e606ba0e6584c7e">More...</a><br/></td></tr>
+<tr class="separator:ga162990b82a18231c4e606ba0e6584c7e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cab95e0391c67daec1019df34d95a470.html">BasicMathFunctions</a></li><li class="navelem"><a class="el" href="arm__sub__q7_8c.html">arm_sub_q7.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__var__f32_8c.html b/docs/DSP/html/arm__var__f32_8c.html
index fc8beb2..f33c0af 100644
--- a/docs/DSP/html/arm__var__f32_8c.html
+++ b/docs/DSP/html/arm__var__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga393f26c5a3bfa05624fb8d32232a6d96"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__variance.html#ga393f26c5a3bfa05624fb8d32232a6d96">arm_var_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
-<tr class="memdesc:ga393f26c5a3bfa05624fb8d32232a6d96"><td class="mdescLeft">&#160;</td><td class="mdescRight">Variance of the elements of a floating-point vector.  <a href="group__variance.html#ga393f26c5a3bfa05624fb8d32232a6d96">More...</a><br/></td></tr>
-<tr class="separator:ga393f26c5a3bfa05624fb8d32232a6d96"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaae455544f0c8ac92469a1e25d3906515"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__variance.html#gaae455544f0c8ac92469a1e25d3906515">arm_var_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
+<tr class="memdesc:gaae455544f0c8ac92469a1e25d3906515"><td class="mdescLeft">&#160;</td><td class="mdescRight">Variance of the elements of a floating-point vector.  <a href="group__variance.html#gaae455544f0c8ac92469a1e25d3906515">More...</a><br/></td></tr>
+<tr class="separator:gaae455544f0c8ac92469a1e25d3906515"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__var__f32_8c.html">arm_var_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__var__q15_8c.html b/docs/DSP/html/arm__var__q15_8c.html
index ba467c8..44838c9 100644
--- a/docs/DSP/html/arm__var__q15_8c.html
+++ b/docs/DSP/html/arm__var__q15_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga79dce009ed2de28a125aeb3f19631654"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__variance.html#ga79dce009ed2de28a125aeb3f19631654">arm_var_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult)</td></tr>
-<tr class="memdesc:ga79dce009ed2de28a125aeb3f19631654"><td class="mdescLeft">&#160;</td><td class="mdescRight">Variance of the elements of a Q15 vector.  <a href="group__variance.html#ga79dce009ed2de28a125aeb3f19631654">More...</a><br/></td></tr>
-<tr class="separator:ga79dce009ed2de28a125aeb3f19631654"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaef3ebc6401209c3f93749e08d341ab48"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__variance.html#gaef3ebc6401209c3f93749e08d341ab48">arm_var_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult)</td></tr>
+<tr class="memdesc:gaef3ebc6401209c3f93749e08d341ab48"><td class="mdescLeft">&#160;</td><td class="mdescRight">Variance of the elements of a Q15 vector.  <a href="group__variance.html#gaef3ebc6401209c3f93749e08d341ab48">More...</a><br/></td></tr>
+<tr class="separator:gaef3ebc6401209c3f93749e08d341ab48"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__var__q15_8c.html">arm_var_q15.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__var__q31_8c.html b/docs/DSP/html/arm__var__q31_8c.html
index 3e095ed..e7a8d64 100644
--- a/docs/DSP/html/arm__var__q31_8c.html
+++ b/docs/DSP/html/arm__var__q31_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gac02873f1c2cc80adfd799305f0e6465d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__variance.html#gac02873f1c2cc80adfd799305f0e6465d">arm_var_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
-<tr class="memdesc:gac02873f1c2cc80adfd799305f0e6465d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Variance of the elements of a Q31 vector.  <a href="group__variance.html#gac02873f1c2cc80adfd799305f0e6465d">More...</a><br/></td></tr>
-<tr class="separator:gac02873f1c2cc80adfd799305f0e6465d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga87a07c87c1d85104de0ea4a3d017454c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__variance.html#ga87a07c87c1d85104de0ea4a3d017454c">arm_var_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
+<tr class="memdesc:ga87a07c87c1d85104de0ea4a3d017454c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Variance of the elements of a Q31 vector.  <a href="group__variance.html#ga87a07c87c1d85104de0ea4a3d017454c">More...</a><br/></td></tr>
+<tr class="separator:ga87a07c87c1d85104de0ea4a3d017454c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -126,7 +126,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_cf3b734d050ceea02fbfb06f215bbc8f.html">Source</a></li><li class="navelem"><a class="el" href="dir_cb79679bd7d585e2e3c8a1b12a7b28d8.html">StatisticsFunctions</a></li><li class="navelem"><a class="el" href="arm__var__q31_8c.html">arm_var_q31.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__variance__example_2Abstract_8txt.html b/docs/DSP/html/arm__variance__example_2Abstract_8txt.html
index 26f89bf..8c8a063 100644
--- a/docs/DSP/html/arm__variance__example_2Abstract_8txt.html
+++ b/docs/DSP/html/arm__variance__example_2Abstract_8txt.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -156,7 +156,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="arm__variance__example_2Abstract_8txt.html">Abstract.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:20 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm__variance__example__f32_8c.html b/docs/DSP/html/arm__variance__example__f32_8c.html
index f600c99..4d87ed3 100644
--- a/docs/DSP/html/arm__variance__example__f32_8c.html
+++ b/docs/DSP/html/arm__variance__example__f32_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -155,8 +155,6 @@
 </div><div class="memdoc">
 <dl><dt><b>Examples: </b></dt><dd><a class="el" href="arm_variance_example_f32_8c-example.html#a16">arm_variance_example_f32.c</a>.</dd>
 </dl>
-<p>Referenced by <a class="el" href="arm__variance__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
-
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@@ -188,8 +186,6 @@
 </div><div class="memdoc">
 <dl><dt><b>Examples: </b></dt><dd><a class="el" href="arm_variance_example_f32_8c-example.html#a7">arm_variance_example_f32.c</a>.</dd>
 </dl>
-<p>References <a class="el" href="group__copy.html#gadd1f737e677e0e6ca31767c7001417b3">arm_copy_f32()</a>, <a class="el" href="group__dot__prod.html#ga55418d4362f6ba84c327f9b4f089a8c3">arm_dot_prod_f32()</a>, <a class="el" href="group__Fill.html#ga2248e8d3901b4afb7827163132baad94">arm_fill_f32()</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a09457f2be656b35015fd6d36202fa376">ARM_MATH_TEST_FAILURE</a>, <a class="el" href="group__BasicMult.html#gaca3f0b8227da431ab29225b88888aa32">arm_mult_f32()</a>, <a class="el" href="group__BasicSub.html#ga7f975a472de286331134227c08aad826">arm_sub_f32()</a>, <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__variance__example__f32_8c.html#a3fd2b1bcd7ddcf506237987ad780f495">DELTA</a>, <a class="el" href="arm__class__marks__example__f32_8c.html#acc9290716b3c97381ce52d14b4b01681">mean</a>, <a class="el" href="arm__variance__example__f32_8c.html#a26cbbfe2a7905669e8440159465050df">refVarianceOut</a>, <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>, <a class="el" href="arm__variance__example__f32_8c.html#a9170ec9e681e2b519fe9c46a30455841">testInput_f32</a>, <a class="el" href="arm__variance__example__f32_8c.html#acc43b372d92d5027b9f9cac782c8b3c7">wire1</a>, <a class="el" href="arm__variance__example__f32_8c.html#a41a9afab5be5ccd2e6f618b83102f0d1">wire2</a>, and <a class="el" href="arm__variance__example__f32_8c.html#af61f43ad332a2322e43ced590b6d9768">wire3</a>.</p>
-
 </div>
 </div>
 <h2 class="groupheader">Variable Documentation</h2>
@@ -204,8 +200,6 @@
 </div><div class="memdoc">
 <dl><dt><b>Examples: </b></dt><dd><a class="el" href="arm_variance_example_f32_8c-example.html#a5">arm_variance_example_f32.c</a>.</dd>
 </dl>
-<p>Referenced by <a class="el" href="arm__variance__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="a26cbbfe2a7905669e8440159465050df"></a>
@@ -219,8 +213,6 @@
 </div><div class="memdoc">
 <dl><dt><b>Examples: </b></dt><dd><a class="el" href="arm_variance_example_f32_8c-example.html#a6">arm_variance_example_f32.c</a>.</dd>
 </dl>
-<p>Referenced by <a class="el" href="arm__variance__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
-
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 </div>
 <a class="anchor" id="a9170ec9e681e2b519fe9c46a30455841"></a>
@@ -234,8 +226,6 @@
 </div><div class="memdoc">
 <dl><dt><b>Examples: </b></dt><dd><a class="el" href="arm_variance_example_f32_8c-example.html#a4">arm_variance_example_f32.c</a>.</dd>
 </dl>
-<p>Referenced by <a class="el" href="arm__graphic__equalizer__example__q31_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="acc43b372d92d5027b9f9cac782c8b3c7"></a>
@@ -249,8 +239,6 @@
 </div><div class="memdoc">
 <dl><dt><b>Examples: </b></dt><dd><a class="el" href="arm_variance_example_f32_8c-example.html#a0">arm_variance_example_f32.c</a>.</dd>
 </dl>
-<p>Referenced by <a class="el" href="arm__variance__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="a41a9afab5be5ccd2e6f618b83102f0d1"></a>
@@ -264,8 +252,6 @@
 </div><div class="memdoc">
 <dl><dt><b>Examples: </b></dt><dd><a class="el" href="arm_variance_example_f32_8c-example.html#a2">arm_variance_example_f32.c</a>.</dd>
 </dl>
-<p>Referenced by <a class="el" href="arm__variance__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="af61f43ad332a2322e43ced590b6d9768"></a>
@@ -279,8 +265,6 @@
 </div><div class="memdoc">
 <dl><dt><b>Examples: </b></dt><dd><a class="el" href="arm_variance_example_f32_8c-example.html#a3">arm_variance_example_f32.c</a>.</dd>
 </dl>
-<p>Referenced by <a class="el" href="arm__variance__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
-
 </div>
 </div>
 </div><!-- contents -->
@@ -289,7 +273,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_abd1d8a41d439a254a6d729f0d888b04.html">Examples</a></li><li class="navelem"><a class="el" href="dir_dd8be1de2cb2fdb097bade8f148f6c3f.html">ARM</a></li><li class="navelem"><a class="el" href="dir_1170e6dac28fddf4fdc874a585bf14d6.html">arm_variance_example</a></li><li class="navelem"><a class="el" href="arm__variance__example__f32_8c.html">arm_variance_example_f32.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm_class_marks_example_f32_8c-example.html b/docs/DSP/html/arm_class_marks_example_f32_8c-example.html
index e6f13c0..5008409 100644
--- a/docs/DSP/html/arm_class_marks_example_f32_8c-example.html
+++ b/docs/DSP/html/arm_class_marks_example_f32_8c-example.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -256,27 +256,27 @@
 <div class="line">  <span class="comment">/* ----------------------------------------------------------------------</span></div>
 <div class="line"><span class="comment">  ** Call the Max function to calculate max marks among numStudents</span></div>
 <div class="line"><span class="comment">  ** ------------------------------------------------------------------- */</span></div>
-<div class="line">  <a name="a18"></a><a class="code" href="group__Max.html#ga5b89d1b04575aeec494f678695fb87d8">arm_max_f32</a>(<a class="code" href="arm__class__marks__example__f32_8c.html#afd4d61aad5f35a4e42d580004e2f9a1d">testOutput</a>, <a class="code" href="arm__class__marks__example__f32_8c.html#ab3b66d06b4af1af4ea2740d0ccf4e7bd">numStudents</a>, &amp;<a class="code" href="arm__class__marks__example__f32_8c.html#aad32888fa966b3d9db9c31bcbba9d9ef">max_marks</a>, &amp;<a class="code" href="arm__class__marks__example__f32_8c.html#a798cf43a3725d7df2fcaf3f328969f53">student_num</a>);</div>
+<div class="line">  <a name="a18"></a><a class="code" href="group__Max.html#gad1eabd31544fe59c414d9ce5bd0cc151">arm_max_f32</a>(<a class="code" href="arm__class__marks__example__f32_8c.html#afd4d61aad5f35a4e42d580004e2f9a1d">testOutput</a>, <a class="code" href="arm__class__marks__example__f32_8c.html#ab3b66d06b4af1af4ea2740d0ccf4e7bd">numStudents</a>, &amp;<a class="code" href="arm__class__marks__example__f32_8c.html#aad32888fa966b3d9db9c31bcbba9d9ef">max_marks</a>, &amp;<a class="code" href="arm__class__marks__example__f32_8c.html#a798cf43a3725d7df2fcaf3f328969f53">student_num</a>);</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* ----------------------------------------------------------------------</span></div>
 <div class="line"><span class="comment">  ** Call the Min function to calculate min marks among numStudents</span></div>
 <div class="line"><span class="comment">  ** ------------------------------------------------------------------- */</span></div>
-<div class="line">  <a name="a19"></a><a class="code" href="group__Min.html#gaf62b1673740fc516ea64daf777b7d74a">arm_min_f32</a>(<a class="code" href="arm__class__marks__example__f32_8c.html#afd4d61aad5f35a4e42d580004e2f9a1d">testOutput</a>, <a class="code" href="arm__class__marks__example__f32_8c.html#ab3b66d06b4af1af4ea2740d0ccf4e7bd">numStudents</a>, &amp;<a class="code" href="arm__class__marks__example__f32_8c.html#abb7687fa07ec54d8e792cfcbfe2ca809">min_marks</a>, &amp;<a class="code" href="arm__class__marks__example__f32_8c.html#a798cf43a3725d7df2fcaf3f328969f53">student_num</a>);</div>
+<div class="line">  <a name="a19"></a><a class="code" href="group__Min.html#ga514e2c920c432e1a3df2cb03f01d2797">arm_min_f32</a>(<a class="code" href="arm__class__marks__example__f32_8c.html#afd4d61aad5f35a4e42d580004e2f9a1d">testOutput</a>, <a class="code" href="arm__class__marks__example__f32_8c.html#ab3b66d06b4af1af4ea2740d0ccf4e7bd">numStudents</a>, &amp;<a class="code" href="arm__class__marks__example__f32_8c.html#abb7687fa07ec54d8e792cfcbfe2ca809">min_marks</a>, &amp;<a class="code" href="arm__class__marks__example__f32_8c.html#a798cf43a3725d7df2fcaf3f328969f53">student_num</a>);</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* ----------------------------------------------------------------------</span></div>
 <div class="line"><span class="comment">  ** Call the Mean function to calculate mean</span></div>
 <div class="line"><span class="comment">  ** ------------------------------------------------------------------- */</span></div>
-<div class="line">  <a name="a20"></a><a class="code" href="group__mean.html#ga74ce08c49ab61e57bd50c3a0ca1fdb2b">arm_mean_f32</a>(<a class="code" href="arm__class__marks__example__f32_8c.html#afd4d61aad5f35a4e42d580004e2f9a1d">testOutput</a>, <a class="code" href="arm__class__marks__example__f32_8c.html#ab3b66d06b4af1af4ea2740d0ccf4e7bd">numStudents</a>, &amp;<a class="code" href="arm__class__marks__example__f32_8c.html#acc9290716b3c97381ce52d14b4b01681">mean</a>);</div>
+<div class="line">  <a name="a20"></a><a class="code" href="group__mean.html#gae4fb7698771d7c24f536ed24347c1488">arm_mean_f32</a>(<a class="code" href="arm__class__marks__example__f32_8c.html#afd4d61aad5f35a4e42d580004e2f9a1d">testOutput</a>, <a class="code" href="arm__class__marks__example__f32_8c.html#ab3b66d06b4af1af4ea2740d0ccf4e7bd">numStudents</a>, &amp;<a class="code" href="arm__class__marks__example__f32_8c.html#acc9290716b3c97381ce52d14b4b01681">mean</a>);</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* ----------------------------------------------------------------------</span></div>
 <div class="line"><span class="comment">  ** Call the std function to calculate standard deviation</span></div>
 <div class="line"><span class="comment">  ** ------------------------------------------------------------------- */</span></div>
-<div class="line">  <a name="a21"></a><a class="code" href="group__STD.html#ga4969b5b5f3d001377bc401a3ee99dfc2">arm_std_f32</a>(<a class="code" href="arm__class__marks__example__f32_8c.html#afd4d61aad5f35a4e42d580004e2f9a1d">testOutput</a>, <a class="code" href="arm__class__marks__example__f32_8c.html#ab3b66d06b4af1af4ea2740d0ccf4e7bd">numStudents</a>, &amp;<a class="code" href="arm__class__marks__example__f32_8c.html#a150b0cf729b51893379f5b5548d4f989">std</a>);</div>
+<div class="line">  <a name="a21"></a><a class="code" href="group__STD.html#ga287b6ce703636c7e8cb9833b290ae4ce">arm_std_f32</a>(<a class="code" href="arm__class__marks__example__f32_8c.html#afd4d61aad5f35a4e42d580004e2f9a1d">testOutput</a>, <a class="code" href="arm__class__marks__example__f32_8c.html#ab3b66d06b4af1af4ea2740d0ccf4e7bd">numStudents</a>, &amp;<a class="code" href="arm__class__marks__example__f32_8c.html#a150b0cf729b51893379f5b5548d4f989">std</a>);</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* ----------------------------------------------------------------------</span></div>
 <div class="line"><span class="comment">  ** Call the var function to calculate variance</span></div>
 <div class="line"><span class="comment">  ** ------------------------------------------------------------------- */</span></div>
-<div class="line">  <a name="a22"></a><a class="code" href="group__variance.html#ga393f26c5a3bfa05624fb8d32232a6d96">arm_var_f32</a>(<a class="code" href="arm__class__marks__example__f32_8c.html#afd4d61aad5f35a4e42d580004e2f9a1d">testOutput</a>, <a class="code" href="arm__class__marks__example__f32_8c.html#ab3b66d06b4af1af4ea2740d0ccf4e7bd">numStudents</a>, &amp;<a class="code" href="arm__class__marks__example__f32_8c.html#a3bd39c4335d84be071cc1eaa9b0a8642">var</a>);</div>
+<div class="line">  <a name="a22"></a><a class="code" href="group__variance.html#gaae455544f0c8ac92469a1e25d3906515">arm_var_f32</a>(<a class="code" href="arm__class__marks__example__f32_8c.html#afd4d61aad5f35a4e42d580004e2f9a1d">testOutput</a>, <a class="code" href="arm__class__marks__example__f32_8c.html#ab3b66d06b4af1af4ea2740d0ccf4e7bd">numStudents</a>, &amp;<a class="code" href="arm__class__marks__example__f32_8c.html#a3bd39c4335d84be071cc1eaa9b0a8642">var</a>);</div>
 <div class="line"></div>
 <div class="line">  <span class="keywordflow">while</span> (1);                             <span class="comment">/* main function does not return */</span></div>
 <div class="line">}</div>
@@ -285,7 +285,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:18 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm_convolution_example_f32_8c-example.html b/docs/DSP/html/arm_convolution_example_f32_8c-example.html
index 5b70e09..5cba3fb 100644
--- a/docs/DSP/html/arm_convolution_example_f32_8c-example.html
+++ b/docs/DSP/html/arm_convolution_example_f32_8c-example.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -254,8 +254,8 @@
 <div class="line">  <a class="code" href="group__Fill.html#ga2248e8d3901b4afb7827163132baad94">arm_fill_f32</a>(0.0,  <a class="code" href="arm__convolution__example__f32_8c.html#a88a0167516ae7ed66203fd60e6ddeea3">Bk</a>, <a class="code" href="arm__convolution__example__f32_8c.html#af8a1d2ed31f7c9a00fec46a798edb61b">MAX_BLOCKSIZE</a>);</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* Copy the input values to the fft input buffers */</span></div>
-<div class="line">  <a name="a15"></a><a class="code" href="group__copy.html#gadd1f737e677e0e6ca31767c7001417b3">arm_copy_f32</a>(<a class="code" href="arm__convolution__example__f32_8c.html#a7db2f016e1afcb524a2fdc3c5a3cb640">testInputA_f32</a>,  <a class="code" href="arm__convolution__example__f32_8c.html#aed74eacd4b96cc7f71b64d18f2e95705">Ak</a>, <a class="code" href="arm__convolution__example__f32_8c.html#af8a1d2ed31f7c9a00fec46a798edb61b">MAX_BLOCKSIZE</a>/2);</div>
-<div class="line">  <a class="code" href="group__copy.html#gadd1f737e677e0e6ca31767c7001417b3">arm_copy_f32</a>(<a class="code" href="arm__convolution__example__f32_8c.html#acb22287e7e096b677e352dfd363ba60d">testInputB_f32</a>,  <a class="code" href="arm__convolution__example__f32_8c.html#a88a0167516ae7ed66203fd60e6ddeea3">Bk</a>, <a class="code" href="arm__convolution__example__f32_8c.html#af8a1d2ed31f7c9a00fec46a798edb61b">MAX_BLOCKSIZE</a>/2);</div>
+<div class="line">  <a name="a15"></a><a class="code" href="group__copy.html#gaa6dfe9554ca61eb3d1eee498396bce88">arm_copy_f32</a>(<a class="code" href="arm__convolution__example__f32_8c.html#a7db2f016e1afcb524a2fdc3c5a3cb640">testInputA_f32</a>,  <a class="code" href="arm__convolution__example__f32_8c.html#aed74eacd4b96cc7f71b64d18f2e95705">Ak</a>, <a class="code" href="arm__convolution__example__f32_8c.html#af8a1d2ed31f7c9a00fec46a798edb61b">MAX_BLOCKSIZE</a>/2);</div>
+<div class="line">  <a class="code" href="group__copy.html#gaa6dfe9554ca61eb3d1eee498396bce88">arm_copy_f32</a>(<a class="code" href="arm__convolution__example__f32_8c.html#acb22287e7e096b677e352dfd363ba60d">testInputB_f32</a>,  <a class="code" href="arm__convolution__example__f32_8c.html#a88a0167516ae7ed66203fd60e6ddeea3">Bk</a>, <a class="code" href="arm__convolution__example__f32_8c.html#af8a1d2ed31f7c9a00fec46a798edb61b">MAX_BLOCKSIZE</a>/2);</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* Initialize the CFFT function to compute 64 point fft */</span></div>
 <div class="line">  status = <a name="a16"></a><a class="code" href="group__ComplexFFT.html#gaf336459f684f0b17bfae539ef1b1b78a">arm_cfft_radix4_init_f32</a>(cfft_instance_ptr, 64, 0, 1);</div>
@@ -266,7 +266,7 @@
 <div class="line">  <a class="code" href="group__ComplexFFT.html#ga521f670cd9c571bc61aff9bec89f4c26">arm_cfft_radix4_f32</a>(cfft_instance_ptr, <a class="code" href="arm__convolution__example__f32_8c.html#a88a0167516ae7ed66203fd60e6ddeea3">Bk</a>);</div>
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 <div class="line">  <span class="comment">/* Complex Multiplication of the two input buffers in frequency domain */</span></div>
-<div class="line">  <a name="a18"></a><a class="code" href="group__CmplxByCmplxMult.html#ga14b47080054a1ba1250a86805be1ff6b">arm_cmplx_mult_cmplx_f32</a>(<a class="code" href="arm__convolution__example__f32_8c.html#aed74eacd4b96cc7f71b64d18f2e95705">Ak</a>, <a class="code" href="arm__convolution__example__f32_8c.html#a88a0167516ae7ed66203fd60e6ddeea3">Bk</a>, <a class="code" href="arm__convolution__example__f32_8c.html#a13521f3164dc55679f43b7cb2e41e098">AxB</a>, <a class="code" href="arm__convolution__example__f32_8c.html#af8a1d2ed31f7c9a00fec46a798edb61b">MAX_BLOCKSIZE</a>/2);</div>
+<div class="line">  <a name="a18"></a><a class="code" href="group__CmplxByCmplxMult.html#gae221504b01e4abfe5f335eafd801b4ed">arm_cmplx_mult_cmplx_f32</a>(<a class="code" href="arm__convolution__example__f32_8c.html#aed74eacd4b96cc7f71b64d18f2e95705">Ak</a>, <a class="code" href="arm__convolution__example__f32_8c.html#a88a0167516ae7ed66203fd60e6ddeea3">Bk</a>, <a class="code" href="arm__convolution__example__f32_8c.html#a13521f3164dc55679f43b7cb2e41e098">AxB</a>, <a class="code" href="arm__convolution__example__f32_8c.html#af8a1d2ed31f7c9a00fec46a798edb61b">MAX_BLOCKSIZE</a>/2);</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* Initialize the CIFFT function to compute 64 point ifft */</span></div>
 <div class="line">  status = <a class="code" href="group__ComplexFFT.html#gaf336459f684f0b17bfae539ef1b1b78a">arm_cfft_radix4_init_f32</a>(cfft_instance_ptr, 64, 1, 1);</div>
@@ -298,7 +298,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:18 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm_dotproduct_example_f32_8c-example.html b/docs/DSP/html/arm_dotproduct_example_f32_8c-example.html
index bf7dc47..384a1d5 100644
--- a/docs/DSP/html/arm_dotproduct_example_f32_8c-example.html
+++ b/docs/DSP/html/arm_dotproduct_example_f32_8c-example.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -217,13 +217,13 @@
 <div class="line">  <a class="code" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> diff;     <span class="comment">/* Difference between reference and test outputs */</span></div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* Multiplication of two input buffers */</span></div>
-<div class="line">  <a name="a8"></a><a class="code" href="group__BasicMult.html#gaca3f0b8227da431ab29225b88888aa32">arm_mult_f32</a>(<a class="code" href="arm__dotproduct__example__f32_8c.html#a0c248a472fdc0507e4ab7d693e4876b6">srcA_buf_f32</a>, <a class="code" href="arm__dotproduct__example__f32_8c.html#a67d9082c1585d4854ae9ca38db170ff5">srcB_buf_f32</a>, <a class="code" href="arm__dotproduct__example__f32_8c.html#ad0bfd425dfe1ff2bda80fb957e464098">multOutput</a>, <a class="code" href="arm__dotproduct__example__f32_8c.html#af8a1d2ed31f7c9a00fec46a798edb61b">MAX_BLOCKSIZE</a>);</div>
+<div class="line">  <a name="a8"></a><a class="code" href="group__BasicMult.html#gacf950935141cad927bea886e88fd9e9b">arm_mult_f32</a>(<a class="code" href="arm__dotproduct__example__f32_8c.html#a0c248a472fdc0507e4ab7d693e4876b6">srcA_buf_f32</a>, <a class="code" href="arm__dotproduct__example__f32_8c.html#a67d9082c1585d4854ae9ca38db170ff5">srcB_buf_f32</a>, <a class="code" href="arm__dotproduct__example__f32_8c.html#ad0bfd425dfe1ff2bda80fb957e464098">multOutput</a>, <a class="code" href="arm__dotproduct__example__f32_8c.html#af8a1d2ed31f7c9a00fec46a798edb61b">MAX_BLOCKSIZE</a>);</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* Accumulate the multiplication output values to</span></div>
 <div class="line"><span class="comment">     get the dot product of the two inputs */</span></div>
 <div class="line">  <span class="keywordflow">for</span>(i=0; i&lt; <a class="code" href="arm__dotproduct__example__f32_8c.html#af8a1d2ed31f7c9a00fec46a798edb61b">MAX_BLOCKSIZE</a>; i++)</div>
 <div class="line">  {</div>
-<div class="line">    <a name="a9"></a><a class="code" href="group__BasicAdd.html#ga6a904a547413b10565dd1d251c6bafbd">arm_add_f32</a>(&amp;<a class="code" href="arm__dotproduct__example__f32_8c.html#a324833b61eae796082e07d078a67c34f">testOutput</a>, &amp;<a class="code" href="arm__dotproduct__example__f32_8c.html#ad0bfd425dfe1ff2bda80fb957e464098">multOutput</a>[i], &amp;<a class="code" href="arm__dotproduct__example__f32_8c.html#a324833b61eae796082e07d078a67c34f">testOutput</a>, 1);</div>
+<div class="line">    <a name="a9"></a><a class="code" href="group__BasicAdd.html#gabfef1e86e458314a61f4baa441d9765e">arm_add_f32</a>(&amp;<a class="code" href="arm__dotproduct__example__f32_8c.html#a324833b61eae796082e07d078a67c34f">testOutput</a>, &amp;<a class="code" href="arm__dotproduct__example__f32_8c.html#ad0bfd425dfe1ff2bda80fb957e464098">multOutput</a>[i], &amp;<a class="code" href="arm__dotproduct__example__f32_8c.html#a324833b61eae796082e07d078a67c34f">testOutput</a>, 1);</div>
 <div class="line">  }</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* absolute value of difference between ref and test */</span></div>
@@ -248,7 +248,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:18 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm_fft_bin_example_f32_8c-example.html b/docs/DSP/html/arm_fft_bin_example_f32_8c-example.html
index efb5ce4..2d0c370 100644
--- a/docs/DSP/html/arm_fft_bin_example_f32_8c-example.html
+++ b/docs/DSP/html/arm_fft_bin_example_f32_8c-example.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -190,10 +190,10 @@
 <div class="line"></div>
 <div class="line">  <span class="comment">/* Process the data through the Complex Magnitude Module for</span></div>
 <div class="line"><span class="comment">  calculating the magnitude at each bin */</span></div>
-<div class="line">  <a name="a13"></a><a class="code" href="group__cmplx__mag.html#gae45024c497392cde2ae358a76d435213">arm_cmplx_mag_f32</a>(<a class="code" href="arm__fft__bin__example__f32_8c.html#a3d8ecb82590486ceebccc76263963b16">testInput_f32_10khz</a>, <a class="code" href="arm__fft__bin__example__f32_8c.html#aaaf907bde12051bc8bb5d48b7d315a35">testOutput</a>, <a class="code" href="arm__fft__bin__example__f32_8c.html#a9b500899c581f6df3ffc0a9f3a9ef6aa">fftSize</a>);</div>
+<div class="line">  <a name="a13"></a><a class="code" href="group__cmplx__mag.html#gaba4e0eff7816fe80d01121fb4cf6c6bc">arm_cmplx_mag_f32</a>(<a class="code" href="arm__fft__bin__example__f32_8c.html#a3d8ecb82590486ceebccc76263963b16">testInput_f32_10khz</a>, <a class="code" href="arm__fft__bin__example__f32_8c.html#aaaf907bde12051bc8bb5d48b7d315a35">testOutput</a>, <a class="code" href="arm__fft__bin__example__f32_8c.html#a9b500899c581f6df3ffc0a9f3a9ef6aa">fftSize</a>);</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* Calculates maxValue and returns corresponding BIN value */</span></div>
-<div class="line">  <a name="a14"></a><a class="code" href="group__Max.html#ga5b89d1b04575aeec494f678695fb87d8">arm_max_f32</a>(<a class="code" href="arm__fft__bin__example__f32_8c.html#aaaf907bde12051bc8bb5d48b7d315a35">testOutput</a>, <a class="code" href="arm__fft__bin__example__f32_8c.html#a9b500899c581f6df3ffc0a9f3a9ef6aa">fftSize</a>, &amp;maxValue, &amp;<a class="code" href="arm__fft__bin__example__f32_8c.html#a4a391651dbb95db35ccba70fc4f9e049">testIndex</a>);</div>
+<div class="line">  <a name="a14"></a><a class="code" href="group__Max.html#gad1eabd31544fe59c414d9ce5bd0cc151">arm_max_f32</a>(<a class="code" href="arm__fft__bin__example__f32_8c.html#aaaf907bde12051bc8bb5d48b7d315a35">testOutput</a>, <a class="code" href="arm__fft__bin__example__f32_8c.html#a9b500899c581f6df3ffc0a9f3a9ef6aa">fftSize</a>, &amp;maxValue, &amp;<a class="code" href="arm__fft__bin__example__f32_8c.html#a4a391651dbb95db35ccba70fc4f9e049">testIndex</a>);</div>
 <div class="line"></div>
 <div class="line">  <span class="keywordflow">if</span> (<a class="code" href="arm__fft__bin__example__f32_8c.html#a4a391651dbb95db35ccba70fc4f9e049">testIndex</a> !=  <a class="code" href="arm__fft__bin__example__f32_8c.html#aec50b0f697fd9e7e7e244487a4bd57e4">refIndex</a>)</div>
 <div class="line">  {</div>
@@ -218,7 +218,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:18 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm_fir_example_f32_8c-example.html b/docs/DSP/html/arm_fir_example_f32_8c-example.html
index 6f20e16..94d1a82 100644
--- a/docs/DSP/html/arm_fir_example_f32_8c-example.html
+++ b/docs/DSP/html/arm_fir_example_f32_8c-example.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -225,7 +225,7 @@
 <div class="line">  outputF32 = &amp;<a class="code" href="arm__fir__example__f32_8c.html#afd4d61aad5f35a4e42d580004e2f9a1d">testOutput</a>[0];</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* Call FIR init function to initialize the instance structure. */</span></div>
-<div class="line">  <a name="a14"></a><a class="code" href="group__FIR.html#ga98d13def6427e29522829f945d0967db">arm_fir_init_f32</a>(&amp;S, <a class="code" href="arm__fir__example__f32_8c.html#a7579d94e0a80fb9d376ea6c7897f73b0">NUM_TAPS</a>, (<a class="code" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *)&amp;<a class="code" href="arm__fir__example__f32_8c.html#ae070afd14f437ad1ae0a947e4403dd0e">firCoeffs32</a>[0], &amp;<a class="code" href="arm__signal__converge__example__f32_8c.html#a358ec4e79689e6d3787b89fe78bdb772">firStateF32</a>[0], <a class="code" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>);</div>
+<div class="line">  <a name="a14"></a><a class="code" href="group__FIR.html#ga5afaa7b8e6735bbc19e582aa9755b0e1">arm_fir_init_f32</a>(&amp;S, <a class="code" href="arm__fir__example__f32_8c.html#a7579d94e0a80fb9d376ea6c7897f73b0">NUM_TAPS</a>, (<a class="code" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *)&amp;<a class="code" href="arm__fir__example__f32_8c.html#ae070afd14f437ad1ae0a947e4403dd0e">firCoeffs32</a>[0], &amp;<a class="code" href="arm__signal__converge__example__f32_8c.html#a358ec4e79689e6d3787b89fe78bdb772">firStateF32</a>[0], <a class="code" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>);</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* ----------------------------------------------------------------------</span></div>
 <div class="line"><span class="comment">  ** Call the FIR process function for every blockSize samples</span></div>
@@ -233,7 +233,7 @@
 <div class="line"></div>
 <div class="line">  <span class="keywordflow">for</span>(i=0; i &lt; <a class="code" href="arm__fir__example__f32_8c.html#af7d5613bda9a19b2ccae5d6cb79a22bc">numBlocks</a>; i++)</div>
 <div class="line">  {</div>
-<div class="line">    <a name="a15"></a><a class="code" href="group__FIR.html#gae8fb334ea67eb6ecbd31824ddc14cd6a">arm_fir_f32</a>(&amp;S, inputF32 + (i * <a class="code" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>), outputF32 + (i * blockSize), blockSize);</div>
+<div class="line">    <a name="a15"></a><a class="code" href="group__FIR.html#ga0cf008f650a75f5e2cf82d10691b64d9">arm_fir_f32</a>(&amp;S, inputF32 + (i * <a class="code" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>), outputF32 + (i * blockSize), blockSize);</div>
 <div class="line">  }</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* ----------------------------------------------------------------------</span></div>
@@ -269,7 +269,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:18 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm_graphic_equalizer_example_q31_8c-example.html b/docs/DSP/html/arm_graphic_equalizer_example_q31_8c-example.html
index 13b9e93..ac93515 100644
--- a/docs/DSP/html/arm_graphic_equalizer_example_q31_8c-example.html
+++ b/docs/DSP/html/arm_graphic_equalizer_example_q31_8c-example.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -340,23 +340,23 @@
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 <div class="line">  <span class="comment">/* Initialize the state and coefficient buffers for all Biquad sections */</span></div>
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-<div class="line">  <a name="a19"></a><a class="code" href="group__BiquadCascadeDF1__32x64.html#ga44900cecb8083afcaabf905ffcd656bb">arm_biquad_cas_df1_32x64_init_q31</a>(&amp;S1, <a name="a20"></a><a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a23f8e430b510dfdb3ebe53bffca0d864">NUMSTAGES</a>,</div>
+<div class="line">  <a name="a19"></a><a class="code" href="group__BiquadCascadeDF1__32x64.html#ga426cd78591a717e87d66d1eaa9a3d074">arm_biquad_cas_df1_32x64_init_q31</a>(&amp;S1, <a name="a20"></a><a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a23f8e430b510dfdb3ebe53bffca0d864">NUMSTAGES</a>,</div>
 <div class="line">            (<a class="code" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *) &amp;<a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a024c59772b9603698b898721c1e8204e">coeffTable</a>[190*0 + 10*(<a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a963aee85bb41a50fc943ac9048d123ab">gainDB</a>[0] + 9)],</div>
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-<div class="line">  <a class="code" href="group__BiquadCascadeDF1__32x64.html#ga44900cecb8083afcaabf905ffcd656bb">arm_biquad_cas_df1_32x64_init_q31</a>(&amp;S2, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a23f8e430b510dfdb3ebe53bffca0d864">NUMSTAGES</a>,</div>
+<div class="line">  <a class="code" href="group__BiquadCascadeDF1__32x64.html#ga426cd78591a717e87d66d1eaa9a3d074">arm_biquad_cas_df1_32x64_init_q31</a>(&amp;S2, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a23f8e430b510dfdb3ebe53bffca0d864">NUMSTAGES</a>,</div>
 <div class="line">            (<a class="code" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *) &amp;<a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a024c59772b9603698b898721c1e8204e">coeffTable</a>[190*1 + 10*(<a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a963aee85bb41a50fc943ac9048d123ab">gainDB</a>[1] + 9)],</div>
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-<div class="line">  <a name="a21"></a><a class="code" href="group__BiquadCascadeDF1.html#gaf42a44f9b16d61e636418c83eefe577b">arm_biquad_cascade_df1_init_q31</a>(&amp;S3, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a23f8e430b510dfdb3ebe53bffca0d864">NUMSTAGES</a>,</div>
+<div class="line">  <a name="a21"></a><a class="code" href="group__BiquadCascadeDF1.html#ga5563b156af44d1be2a7548626988bf4e">arm_biquad_cascade_df1_init_q31</a>(&amp;S3, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a23f8e430b510dfdb3ebe53bffca0d864">NUMSTAGES</a>,</div>
 <div class="line">          (<a class="code" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *) &amp;<a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a024c59772b9603698b898721c1e8204e">coeffTable</a>[190*2 + 10*(<a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a963aee85bb41a50fc943ac9048d123ab">gainDB</a>[2] + 9)],</div>
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-<div class="line">  <a class="code" href="group__BiquadCascadeDF1.html#gaf42a44f9b16d61e636418c83eefe577b">arm_biquad_cascade_df1_init_q31</a>(&amp;S4, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a23f8e430b510dfdb3ebe53bffca0d864">NUMSTAGES</a>,</div>
+<div class="line">  <a class="code" href="group__BiquadCascadeDF1.html#ga5563b156af44d1be2a7548626988bf4e">arm_biquad_cascade_df1_init_q31</a>(&amp;S4, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a23f8e430b510dfdb3ebe53bffca0d864">NUMSTAGES</a>,</div>
 <div class="line">          (<a class="code" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *) &amp;<a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a024c59772b9603698b898721c1e8204e">coeffTable</a>[190*3 + 10*(<a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a963aee85bb41a50fc943ac9048d123ab">gainDB</a>[3] + 9)],</div>
 <div class="line">          &amp;<a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a122ed5f6d8665139fbe9424a073b3474">biquadStateBand4Q31</a>[0], 2);</div>
 <div class="line"></div>
-<div class="line">  <a class="code" href="group__BiquadCascadeDF1.html#gaf42a44f9b16d61e636418c83eefe577b">arm_biquad_cascade_df1_init_q31</a>(&amp;S5, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a23f8e430b510dfdb3ebe53bffca0d864">NUMSTAGES</a>,</div>
+<div class="line">  <a class="code" href="group__BiquadCascadeDF1.html#ga5563b156af44d1be2a7548626988bf4e">arm_biquad_cascade_df1_init_q31</a>(&amp;S5, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a23f8e430b510dfdb3ebe53bffca0d864">NUMSTAGES</a>,</div>
 <div class="line">          (<a class="code" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *) &amp;<a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a024c59772b9603698b898721c1e8204e">coeffTable</a>[190*4 + 10*(<a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a963aee85bb41a50fc943ac9048d123ab">gainDB</a>[4] + 9)],</div>
 <div class="line">          &amp;<a class="code" href="arm__graphic__equalizer__example__q31_8c.html#af88658a8c5f87eeea26da30305921b59">biquadStateBand5Q31</a>[0], 2);</div>
 <div class="line"></div>
@@ -371,14 +371,14 @@
 <div class="line"><span class="comment">    ** Convert block of input data from float to Q31</span></div>
 <div class="line"><span class="comment">    ** ------------------------------------------------------------------- */</span></div>
 <div class="line"></div>
-<div class="line">    <a name="a23"></a><a class="code" href="group__float__to__x.html#ga177704107f94564e9abe4daaa36f4554">arm_float_to_q31</a>(inputF32 + (i*<a class="code" href="arm__graphic__equalizer__example__q31_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>), <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a79521a4d6a9adb144c4d999ae713413c">inputQ31</a>, BLOCKSIZE);</div>
+<div class="line">    <a name="a23"></a><a class="code" href="group__float__to__x.html#gaae21be47db707e79552f3e8221a48fb0">arm_float_to_q31</a>(inputF32 + (i*<a class="code" href="arm__graphic__equalizer__example__q31_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>), <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a79521a4d6a9adb144c4d999ae713413c">inputQ31</a>, BLOCKSIZE);</div>
 <div class="line"></div>
 <div class="line">    <span class="comment">/* ----------------------------------------------------------------------</span></div>
 <div class="line"><span class="comment">    ** Scale down by 1/8.  This provides additional headroom so that the</span></div>
 <div class="line"><span class="comment">    ** graphic EQ can apply gain.</span></div>
 <div class="line"><span class="comment">    ** ------------------------------------------------------------------- */</span></div>
 <div class="line"></div>
-<div class="line">    <a name="a24"></a><a class="code" href="group__scale.html#ga83e36cd82bf51ce35406a199e477d47c">arm_scale_q31</a>(<a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a79521a4d6a9adb144c4d999ae713413c">inputQ31</a>, 0x7FFFFFFF, -3, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a79521a4d6a9adb144c4d999ae713413c">inputQ31</a>, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>);</div>
+<div class="line">    <a name="a24"></a><a class="code" href="group__BasicScale.html#ga8b2b6ea2e39ca464e8f2cfdd937c022b">arm_scale_q31</a>(<a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a79521a4d6a9adb144c4d999ae713413c">inputQ31</a>, 0x7FFFFFFF, -3, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a79521a4d6a9adb144c4d999ae713413c">inputQ31</a>, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>);</div>
 <div class="line"></div>
 <div class="line">    <span class="comment">/* ----------------------------------------------------------------------</span></div>
 <div class="line"><span class="comment">    ** Call the Q31 Biquad Cascade DF1 32x64 process function for band1, band2</span></div>
@@ -391,21 +391,21 @@
 <div class="line"><span class="comment">    ** Call the Q31 Biquad Cascade DF1 process function for band3, band4, band5</span></div>
 <div class="line"><span class="comment">    ** ------------------------------------------------------------------- */</span></div>
 <div class="line"></div>
-<div class="line">    <a name="a26"></a><a class="code" href="group__BiquadCascadeDF1.html#ga27b0c54da702713976e5202d20b4473f">arm_biquad_cascade_df1_q31</a>(&amp;S3, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a9862488450f2547b07aee8035d6b4d8a">outputQ31</a>, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a9862488450f2547b07aee8035d6b4d8a">outputQ31</a>, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>);</div>
-<div class="line">    <a class="code" href="group__BiquadCascadeDF1.html#ga27b0c54da702713976e5202d20b4473f">arm_biquad_cascade_df1_q31</a>(&amp;S4, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a9862488450f2547b07aee8035d6b4d8a">outputQ31</a>, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a9862488450f2547b07aee8035d6b4d8a">outputQ31</a>, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>);</div>
-<div class="line">    <a class="code" href="group__BiquadCascadeDF1.html#ga27b0c54da702713976e5202d20b4473f">arm_biquad_cascade_df1_q31</a>(&amp;S5, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a9862488450f2547b07aee8035d6b4d8a">outputQ31</a>, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a9862488450f2547b07aee8035d6b4d8a">outputQ31</a>, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>);</div>
+<div class="line">    <a name="a26"></a><a class="code" href="group__BiquadCascadeDF1.html#ga4e7dad0ee6949005909fd4fcf1249b79">arm_biquad_cascade_df1_q31</a>(&amp;S3, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a9862488450f2547b07aee8035d6b4d8a">outputQ31</a>, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a9862488450f2547b07aee8035d6b4d8a">outputQ31</a>, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>);</div>
+<div class="line">    <a class="code" href="group__BiquadCascadeDF1.html#ga4e7dad0ee6949005909fd4fcf1249b79">arm_biquad_cascade_df1_q31</a>(&amp;S4, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a9862488450f2547b07aee8035d6b4d8a">outputQ31</a>, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a9862488450f2547b07aee8035d6b4d8a">outputQ31</a>, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>);</div>
+<div class="line">    <a class="code" href="group__BiquadCascadeDF1.html#ga4e7dad0ee6949005909fd4fcf1249b79">arm_biquad_cascade_df1_q31</a>(&amp;S5, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a9862488450f2547b07aee8035d6b4d8a">outputQ31</a>, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a9862488450f2547b07aee8035d6b4d8a">outputQ31</a>, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>);</div>
 <div class="line"></div>
 <div class="line">    <span class="comment">/* ----------------------------------------------------------------------</span></div>
 <div class="line"><span class="comment">    ** Convert Q31 result back to float</span></div>
 <div class="line"><span class="comment">    ** ------------------------------------------------------------------- */</span></div>
 <div class="line"></div>
-<div class="line">    <a name="a27"></a><a class="code" href="group__q31__to__x.html#gacf407b007a37da18e99dabd9023c56b4">arm_q31_to_float</a>(<a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a9862488450f2547b07aee8035d6b4d8a">outputQ31</a>, outputF32 + (i * <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>), BLOCKSIZE);</div>
+<div class="line">    <a name="a27"></a><a class="code" href="group__q31__to__x.html#ga19a9d023aca1f99abd5da6f13a42b6cf">arm_q31_to_float</a>(<a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a9862488450f2547b07aee8035d6b4d8a">outputQ31</a>, outputF32 + (i * <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>), BLOCKSIZE);</div>
 <div class="line"></div>
 <div class="line">    <span class="comment">/* ----------------------------------------------------------------------</span></div>
 <div class="line"><span class="comment">    ** Scale back up</span></div>
 <div class="line"><span class="comment">    ** ------------------------------------------------------------------- */</span></div>
 <div class="line"></div>
-<div class="line">    <a name="a28"></a><a class="code" href="group__scale.html#ga3487af88b112f682ee90589cd419e123">arm_scale_f32</a>(outputF32 + (i * <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>), 8.0f, outputF32 + (i * BLOCKSIZE), BLOCKSIZE);</div>
+<div class="line">    <a name="a28"></a><a class="code" href="group__BasicScale.html#ga5e769c8e22da173674c6abca7291e713">arm_scale_f32</a>(outputF32 + (i * <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>), 8.0f, outputF32 + (i * BLOCKSIZE), BLOCKSIZE);</div>
 <div class="line">  };</div>
 <div class="line"></div>
 <div class="line">  <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#af06013f588a7003278de222913c9d819">snr</a> = <a name="a29"></a><a class="code" href="arm__convolution__example_2math__helper_8c.html#aeea2952e70a1040a6efa555564bbeeab">arm_snr_f32</a>(<a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a9cbbafa975d67bc8ee8ea3260fdd5638">testRefOutput_f32</a>, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a3293e83a154108a1d398bb042e293894">testOutput</a>, <a class="code" href="arm__graphic__equalizer__example__q31_8c.html#a4f4a95eaace4e7b4e2f5243ed24f6b28">TESTLENGTH</a>);</div>
@@ -436,7 +436,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:18 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm_linear_interp_example_f32_8c-example.html b/docs/DSP/html/arm_linear_interp_example_f32_8c-example.html
index fce1c2b..927a93e 100644
--- a/docs/DSP/html/arm_linear_interp_example_f32_8c-example.html
+++ b/docs/DSP/html/arm_linear_interp_example_f32_8c-example.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -233,7 +233,7 @@
 <div class="line"></div>
 <div class="line">  <span class="keywordflow">for</span>(i=0; i&lt; <a class="code" href="arm__linear__interp__example__f32_8c.html#abc004a7fade488e72310fd96c0a101dc">TEST_LENGTH_SAMPLES</a>; i++)</div>
 <div class="line">  {</div>
-<div class="line">      <a class="code" href="arm__linear__interp__example__f32_8c.html#a8ca7d0ad6e04efed464bcaacedacf925">testLinIntOutput</a>[i] = <a name="a13"></a><a class="code" href="group__LinearInterpolate.html#ga790bbc697724ee432f840cfebbbae1f4">arm_linear_interp_f32</a>(&amp;S, <a class="code" href="arm__linear__interp__example__f32_8c.html#a4be0c4d25e63ce04b8cc8ad070805287">testInputSin_f32</a>[i]);</div>
+<div class="line">      <a class="code" href="arm__linear__interp__example__f32_8c.html#a8ca7d0ad6e04efed464bcaacedacf925">testLinIntOutput</a>[i] = <a name="a13"></a><a class="code" href="group__LinearInterpolate.html#ga5335f60532bab8cee1e7c22f76a41805">arm_linear_interp_f32</a>(&amp;S, <a class="code" href="arm__linear__interp__example__f32_8c.html#a4be0c4d25e63ce04b8cc8ad070805287">testInputSin_f32</a>[i]);</div>
 <div class="line">  }</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/*------------------------------------------------------------------------------</span></div>
@@ -275,7 +275,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:18 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm_matrix_example_f32_8c-example.html b/docs/DSP/html/arm_matrix_example_f32_8c-example.html
index f981ee3..9313cb7 100644
--- a/docs/DSP/html/arm_matrix_example_f32_8c-example.html
+++ b/docs/DSP/html/arm_matrix_example_f32_8c-example.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -297,7 +297,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:18 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm_signal_converge_example_f32_8c-example.html b/docs/DSP/html/arm_signal_converge_example_f32_8c-example.html
index bdc4b9a..09f2f1a 100644
--- a/docs/DSP/html/arm_signal_converge_example_f32_8c-example.html
+++ b/docs/DSP/html/arm_signal_converge_example_f32_8c-example.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -233,7 +233,7 @@
 <div class="line">  <a name="a23"></a><a class="code" href="group__LMS__NORM.html#gac7ccbaea863882056eee815456464670">arm_lms_norm_init_f32</a>(&amp;lmsNorm_instance, <a class="code" href="arm__signal__converge__example__f32_8c.html#ac1d8ddb4f9a957eef3ad13d44de4d804">NUMTAPS</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#aad7c60c30c5af397bb75e603f250f9d3">lmsNormCoeff_f32</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#a706980f6f654d199c61e08e7814bd0a1">lmsStateF32</a>, <a name="a24"></a><a class="code" href="arm__signal__converge__example__f32_8c.html#a09bc9e6a44f0291cfcf578f2efcddfab">MU</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>);</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* Initialize the FIR data structure */</span></div>
-<div class="line">  <a name="a25"></a><a class="code" href="group__FIR.html#ga98d13def6427e29522829f945d0967db">arm_fir_init_f32</a>(&amp;LPF_instance, <a class="code" href="arm__signal__converge__example__f32_8c.html#ac1d8ddb4f9a957eef3ad13d44de4d804">NUMTAPS</a>, (<a class="code" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *)<a class="code" href="arm__signal__converge__example__f32_8c.html#aede8780f021b7f5c33df0c5ee2183ee6">FIRCoeff_f32</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#a358ec4e79689e6d3787b89fe78bdb772">firStateF32</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>);</div>
+<div class="line">  <a name="a25"></a><a class="code" href="group__FIR.html#ga5afaa7b8e6735bbc19e582aa9755b0e1">arm_fir_init_f32</a>(&amp;LPF_instance, <a class="code" href="arm__signal__converge__example__f32_8c.html#ac1d8ddb4f9a957eef3ad13d44de4d804">NUMTAPS</a>, (<a class="code" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *)<a class="code" href="arm__signal__converge__example__f32_8c.html#aede8780f021b7f5c33df0c5ee2183ee6">FIRCoeff_f32</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#a358ec4e79689e6d3787b89fe78bdb772">firStateF32</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>);</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* ----------------------------------------------------------------------</span></div>
 <div class="line"><span class="comment">  * Loop over the frames of data and execute each of the processing</span></div>
@@ -243,14 +243,14 @@
 <div class="line">  <span class="keywordflow">for</span>(i=0; i &lt; <a name="a26"></a><a class="code" href="arm__signal__converge__example__f32_8c.html#a4b6b859e1e3f6021a360390be287ca2c">NUMFRAMES</a>; i++)</div>
 <div class="line">  {</div>
 <div class="line">    <span class="comment">/* Read the input data - uniformly distributed random noise - into wire1 */</span></div>
-<div class="line">    <a name="a27"></a><a class="code" href="group__copy.html#gadd1f737e677e0e6ca31767c7001417b3">arm_copy_f32</a>(<a class="code" href="arm__signal__converge__example__f32_8c.html#aac98609c83ad8ed2b05c4fd82d2ba59b">testInput_f32</a> + (i * <a class="code" href="arm__signal__converge__example__f32_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>), <a class="code" href="arm__signal__converge__example__f32_8c.html#a16e759789fbc05f878863f009066c8ea">wire1</a>, BLOCKSIZE);</div>
+<div class="line">    <a name="a27"></a><a class="code" href="group__copy.html#gaa6dfe9554ca61eb3d1eee498396bce88">arm_copy_f32</a>(<a class="code" href="arm__signal__converge__example__f32_8c.html#aac98609c83ad8ed2b05c4fd82d2ba59b">testInput_f32</a> + (i * <a class="code" href="arm__signal__converge__example__f32_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>), <a class="code" href="arm__signal__converge__example__f32_8c.html#a16e759789fbc05f878863f009066c8ea">wire1</a>, BLOCKSIZE);</div>
 <div class="line"></div>
 <div class="line">    <span class="comment">/* Execute the FIR processing function.  Input wire1 and output wire2 */</span></div>
-<div class="line">    <a name="a28"></a><a class="code" href="group__FIR.html#gae8fb334ea67eb6ecbd31824ddc14cd6a">arm_fir_f32</a>(&amp;LPF_instance, <a class="code" href="arm__signal__converge__example__f32_8c.html#a16e759789fbc05f878863f009066c8ea">wire1</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#a4e370163c81ae2b72cc655a6b79e4c6a">wire2</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>);</div>
+<div class="line">    <a name="a28"></a><a class="code" href="group__FIR.html#ga0cf008f650a75f5e2cf82d10691b64d9">arm_fir_f32</a>(&amp;LPF_instance, <a class="code" href="arm__signal__converge__example__f32_8c.html#a16e759789fbc05f878863f009066c8ea">wire1</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#a4e370163c81ae2b72cc655a6b79e4c6a">wire2</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>);</div>
 <div class="line"></div>
 <div class="line">    <span class="comment">/* Execute the LMS Norm processing function*/</span></div>
 <div class="line"></div>
-<div class="line">    <a name="a29"></a><a class="code" href="group__LMS__NORM.html#ga2418c929087c6eba719758eaae3f3300">arm_lms_norm_f32</a>(&amp;lmsNorm_instance, <span class="comment">/* LMSNorm instance */</span></div>
+<div class="line">    <a name="a29"></a><a class="code" href="group__LMS__NORM.html#ga72b3755ed1cf97622851cbbeff83c69e">arm_lms_norm_f32</a>(&amp;lmsNorm_instance, <span class="comment">/* LMSNorm instance */</span></div>
 <div class="line">         <a class="code" href="arm__signal__converge__example__f32_8c.html#a16e759789fbc05f878863f009066c8ea">wire1</a>,                         <span class="comment">/* Input signal */</span></div>
 <div class="line">         <a class="code" href="arm__signal__converge__example__f32_8c.html#a4e370163c81ae2b72cc655a6b79e4c6a">wire2</a>,                         <span class="comment">/* Reference Signal */</span></div>
 <div class="line">         <a class="code" href="arm__signal__converge__example__f32_8c.html#a7e2cceadf6ec7f0aa0f698a680fa3a4b">wire3</a>,                         <span class="comment">/* Converged Signal */</span></div>
@@ -258,7 +258,7 @@
 <div class="line">         <a class="code" href="arm__signal__converge__example__f32_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>);                    <span class="comment">/* BlockSize */</span></div>
 <div class="line"></div>
 <div class="line">    <span class="comment">/* apply overall gain */</span></div>
-<div class="line">    <a name="a30"></a><a class="code" href="group__scale.html#ga3487af88b112f682ee90589cd419e123">arm_scale_f32</a>(<a class="code" href="arm__signal__converge__example__f32_8c.html#a7e2cceadf6ec7f0aa0f698a680fa3a4b">wire3</a>, 5, <a class="code" href="arm__signal__converge__example__f32_8c.html#a7e2cceadf6ec7f0aa0f698a680fa3a4b">wire3</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>);   <span class="comment">/* in-place buffer */</span></div>
+<div class="line">    <a name="a30"></a><a class="code" href="group__BasicScale.html#ga5e769c8e22da173674c6abca7291e713">arm_scale_f32</a>(<a class="code" href="arm__signal__converge__example__f32_8c.html#a7e2cceadf6ec7f0aa0f698a680fa3a4b">wire3</a>, 5, <a class="code" href="arm__signal__converge__example__f32_8c.html#a7e2cceadf6ec7f0aa0f698a680fa3a4b">wire3</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>);   <span class="comment">/* in-place buffer */</span></div>
 <div class="line">  }</div>
 <div class="line"></div>
 <div class="line">  status = <a name="a31"></a><a class="code" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>;</div>
@@ -267,8 +267,8 @@
 <div class="line"><span class="comment">  * Test whether the error signal has reached towards 0.</span></div>
 <div class="line"><span class="comment">  * ----------------------------------------------------------------------------- */</span></div>
 <div class="line"></div>
-<div class="line">  <a name="a32"></a><a class="code" href="group__BasicAbs.html#ga421b6275f9d35f50286c0ff3beceff02">arm_abs_f32</a>(<a class="code" href="arm__signal__converge__example__f32_8c.html#ae6bcc00ea126543ab33d6174549eacda">err_signal</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#ae6bcc00ea126543ab33d6174549eacda">err_signal</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>);</div>
-<div class="line">  <a name="a33"></a><a class="code" href="group__Min.html#gaf62b1673740fc516ea64daf777b7d74a">arm_min_f32</a>(<a class="code" href="arm__signal__converge__example__f32_8c.html#ae6bcc00ea126543ab33d6174549eacda">err_signal</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>, &amp;minValue, &amp;index);</div>
+<div class="line">  <a name="a32"></a><a class="code" href="group__BasicAbs.html#ga0e8fc7df3033cdbe9cda8a766a46e6d9">arm_abs_f32</a>(<a class="code" href="arm__signal__converge__example__f32_8c.html#ae6bcc00ea126543ab33d6174549eacda">err_signal</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#ae6bcc00ea126543ab33d6174549eacda">err_signal</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>);</div>
+<div class="line">  <a name="a33"></a><a class="code" href="group__Min.html#ga514e2c920c432e1a3df2cb03f01d2797">arm_min_f32</a>(<a class="code" href="arm__signal__converge__example__f32_8c.html#ae6bcc00ea126543ab33d6174549eacda">err_signal</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#afcf795f5a96fd55561abe69f56224630">BLOCKSIZE</a>, &amp;minValue, &amp;index);</div>
 <div class="line"></div>
 <div class="line">  <span class="keywordflow">if</span> (minValue &gt; <a name="a34"></a><a class="code" href="arm__signal__converge__example__f32_8c.html#a6d3c6a4484dcaac72fbfe5100c39b9b6">DELTA_ERROR</a>)</div>
 <div class="line">  {</div>
@@ -279,10 +279,10 @@
 <div class="line"><span class="comment">  * Test whether the filter coefficients have converged.</span></div>
 <div class="line"><span class="comment">  * ------------------------------------------------------------------- */</span></div>
 <div class="line"></div>
-<div class="line">  <a name="a36"></a><a class="code" href="group__BasicSub.html#ga7f975a472de286331134227c08aad826">arm_sub_f32</a>((<a class="code" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *)<a class="code" href="arm__signal__converge__example__f32_8c.html#aede8780f021b7f5c33df0c5ee2183ee6">FIRCoeff_f32</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#aad7c60c30c5af397bb75e603f250f9d3">lmsNormCoeff_f32</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#aad7c60c30c5af397bb75e603f250f9d3">lmsNormCoeff_f32</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#ac1d8ddb4f9a957eef3ad13d44de4d804">NUMTAPS</a>);</div>
+<div class="line">  <a name="a36"></a><a class="code" href="group__BasicSub.html#ga76b8b2aec34269c6de0b090cab00fb33">arm_sub_f32</a>((<a class="code" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *)<a class="code" href="arm__signal__converge__example__f32_8c.html#aede8780f021b7f5c33df0c5ee2183ee6">FIRCoeff_f32</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#aad7c60c30c5af397bb75e603f250f9d3">lmsNormCoeff_f32</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#aad7c60c30c5af397bb75e603f250f9d3">lmsNormCoeff_f32</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#ac1d8ddb4f9a957eef3ad13d44de4d804">NUMTAPS</a>);</div>
 <div class="line"></div>
-<div class="line">  <a class="code" href="group__BasicAbs.html#ga421b6275f9d35f50286c0ff3beceff02">arm_abs_f32</a>(<a class="code" href="arm__signal__converge__example__f32_8c.html#aad7c60c30c5af397bb75e603f250f9d3">lmsNormCoeff_f32</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#aad7c60c30c5af397bb75e603f250f9d3">lmsNormCoeff_f32</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#ac1d8ddb4f9a957eef3ad13d44de4d804">NUMTAPS</a>);</div>
-<div class="line">  <a class="code" href="group__Min.html#gaf62b1673740fc516ea64daf777b7d74a">arm_min_f32</a>(<a class="code" href="arm__signal__converge__example__f32_8c.html#aad7c60c30c5af397bb75e603f250f9d3">lmsNormCoeff_f32</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#ac1d8ddb4f9a957eef3ad13d44de4d804">NUMTAPS</a>, &amp;minValue, &amp;index);</div>
+<div class="line">  <a class="code" href="group__BasicAbs.html#ga0e8fc7df3033cdbe9cda8a766a46e6d9">arm_abs_f32</a>(<a class="code" href="arm__signal__converge__example__f32_8c.html#aad7c60c30c5af397bb75e603f250f9d3">lmsNormCoeff_f32</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#aad7c60c30c5af397bb75e603f250f9d3">lmsNormCoeff_f32</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#ac1d8ddb4f9a957eef3ad13d44de4d804">NUMTAPS</a>);</div>
+<div class="line">  <a class="code" href="group__Min.html#ga514e2c920c432e1a3df2cb03f01d2797">arm_min_f32</a>(<a class="code" href="arm__signal__converge__example__f32_8c.html#aad7c60c30c5af397bb75e603f250f9d3">lmsNormCoeff_f32</a>, <a class="code" href="arm__signal__converge__example__f32_8c.html#ac1d8ddb4f9a957eef3ad13d44de4d804">NUMTAPS</a>, &amp;minValue, &amp;index);</div>
 <div class="line"></div>
 <div class="line">  <span class="keywordflow">if</span> (minValue &gt; <a name="a37"></a><a class="code" href="arm__signal__converge__example__f32_8c.html#a9156349d99957ded15d8aa3aa11723de">DELTA_COEFF</a>)</div>
 <div class="line">  {</div>
@@ -307,7 +307,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:18 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm_sin_cos_example_f32_8c-example.html b/docs/DSP/html/arm_sin_cos_example_f32_8c-example.html
index 1ac3797..f2cd2fd 100644
--- a/docs/DSP/html/arm_sin_cos_example_f32_8c-example.html
+++ b/docs/DSP/html/arm_sin_cos_example_f32_8c-example.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -204,10 +204,10 @@
 <div class="line">    <a class="code" href="arm__sin__cos__example__f32_8c.html#a85b1050fcef4347d69f35a9aee798f8a">cosOutput</a> = <a name="a11"></a><a class="code" href="group__cos.html#gace15287f9c64b9b4084d1c797d4c49d8">arm_cos_f32</a>(<a class="code" href="arm__sin__cos__example__f32_8c.html#a8b3b7113988efd5bf11a247d07ae39a1">testInput_f32</a>[i]);</div>
 <div class="line">    <a class="code" href="arm__sin__cos__example__f32_8c.html#a1e232694019f6b61710fbff5ee27126c">sinOutput</a> = <a name="a12"></a><a class="code" href="group__sin.html#gae164899c4a3fc0e946dc5d55555fe541">arm_sin_f32</a>(<a class="code" href="arm__sin__cos__example__f32_8c.html#a8b3b7113988efd5bf11a247d07ae39a1">testInput_f32</a>[i]);</div>
 <div class="line"></div>
-<div class="line">    <a name="a13"></a><a class="code" href="group__BasicMult.html#gaca3f0b8227da431ab29225b88888aa32">arm_mult_f32</a>(&amp;<a class="code" href="arm__sin__cos__example__f32_8c.html#a85b1050fcef4347d69f35a9aee798f8a">cosOutput</a>, &amp;<a class="code" href="arm__sin__cos__example__f32_8c.html#a85b1050fcef4347d69f35a9aee798f8a">cosOutput</a>, &amp;<a class="code" href="arm__sin__cos__example__f32_8c.html#a2cb185794dcb587d158f346ab049cc4e">cosSquareOutput</a>, 1);</div>
-<div class="line">    <a class="code" href="group__BasicMult.html#gaca3f0b8227da431ab29225b88888aa32">arm_mult_f32</a>(&amp;<a class="code" href="arm__sin__cos__example__f32_8c.html#a1e232694019f6b61710fbff5ee27126c">sinOutput</a>, &amp;<a class="code" href="arm__sin__cos__example__f32_8c.html#a1e232694019f6b61710fbff5ee27126c">sinOutput</a>, &amp;<a class="code" href="arm__sin__cos__example__f32_8c.html#aa5a66e866ebb91eb971f2805209e9d36">sinSquareOutput</a>, 1);</div>
+<div class="line">    <a name="a13"></a><a class="code" href="group__BasicMult.html#gacf950935141cad927bea886e88fd9e9b">arm_mult_f32</a>(&amp;<a class="code" href="arm__sin__cos__example__f32_8c.html#a85b1050fcef4347d69f35a9aee798f8a">cosOutput</a>, &amp;<a class="code" href="arm__sin__cos__example__f32_8c.html#a85b1050fcef4347d69f35a9aee798f8a">cosOutput</a>, &amp;<a class="code" href="arm__sin__cos__example__f32_8c.html#a2cb185794dcb587d158f346ab049cc4e">cosSquareOutput</a>, 1);</div>
+<div class="line">    <a class="code" href="group__BasicMult.html#gacf950935141cad927bea886e88fd9e9b">arm_mult_f32</a>(&amp;<a class="code" href="arm__sin__cos__example__f32_8c.html#a1e232694019f6b61710fbff5ee27126c">sinOutput</a>, &amp;<a class="code" href="arm__sin__cos__example__f32_8c.html#a1e232694019f6b61710fbff5ee27126c">sinOutput</a>, &amp;<a class="code" href="arm__sin__cos__example__f32_8c.html#aa5a66e866ebb91eb971f2805209e9d36">sinSquareOutput</a>, 1);</div>
 <div class="line"></div>
-<div class="line">    <a name="a14"></a><a class="code" href="group__BasicAdd.html#ga6a904a547413b10565dd1d251c6bafbd">arm_add_f32</a>(&amp;<a class="code" href="arm__sin__cos__example__f32_8c.html#a2cb185794dcb587d158f346ab049cc4e">cosSquareOutput</a>, &amp;<a class="code" href="arm__sin__cos__example__f32_8c.html#aa5a66e866ebb91eb971f2805209e9d36">sinSquareOutput</a>, &amp;<a class="code" href="arm__sin__cos__example__f32_8c.html#a324833b61eae796082e07d078a67c34f">testOutput</a>, 1);</div>
+<div class="line">    <a name="a14"></a><a class="code" href="group__BasicAdd.html#gabfef1e86e458314a61f4baa441d9765e">arm_add_f32</a>(&amp;<a class="code" href="arm__sin__cos__example__f32_8c.html#a2cb185794dcb587d158f346ab049cc4e">cosSquareOutput</a>, &amp;<a class="code" href="arm__sin__cos__example__f32_8c.html#aa5a66e866ebb91eb971f2805209e9d36">sinSquareOutput</a>, &amp;<a class="code" href="arm__sin__cos__example__f32_8c.html#a324833b61eae796082e07d078a67c34f">testOutput</a>, 1);</div>
 <div class="line"></div>
 <div class="line">    <span class="comment">/* absolute value of difference between ref and test */</span></div>
 <div class="line">    diff = fabsf(<a class="code" href="arm__sin__cos__example__f32_8c.html#a8bcb5c1f75ed5f1737e435f0de1850a3">testRefOutput_f32</a> - <a class="code" href="arm__sin__cos__example__f32_8c.html#a324833b61eae796082e07d078a67c34f">testOutput</a>);</div>
@@ -233,7 +233,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:18 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/arm_variance_example_f32_8c-example.html b/docs/DSP/html/arm_variance_example_f32_8c-example.html
index f52baf0..aa64bc0 100644
--- a/docs/DSP/html/arm_variance_example_f32_8c-example.html
+++ b/docs/DSP/html/arm_variance_example_f32_8c-example.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -205,6 +205,11 @@
 <div class="line"></div>
 <div class="line">  status = <a name="a10"></a><a class="code" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>;</div>
 <div class="line"></div>
+<div class="line"><span class="preprocessor">#if defined(FILEIO)</span></div>
+<div class="line"><span class="preprocessor"></span>  printf(<span class="stringliteral">&quot;START\n&quot;</span>);</div>
+<div class="line"><span class="preprocessor">#endif</span></div>
+<div class="line"><span class="preprocessor"></span></div>
+<div class="line"> </div>
 <div class="line">  <span class="comment">/* Calculation of mean value of input */</span></div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* x&#39; = 1/blockSize * (x(0)* 1 + x(1) * 1 + ... + x(n-1) * 1) */</span></div>
@@ -214,13 +219,13 @@
 <div class="line"></div>
 <div class="line">  <span class="comment">/* Calculate the dot product of wire1 and wire2 */</span></div>
 <div class="line">  <span class="comment">/* (x(0)* 1 + x(1) * 1 + ...+ x(n-1) * 1) */</span></div>
-<div class="line">  <a name="a12"></a><a class="code" href="group__dot__prod.html#ga55418d4362f6ba84c327f9b4f089a8c3">arm_dot_prod_f32</a>(<a class="code" href="arm__variance__example__f32_8c.html#a9170ec9e681e2b519fe9c46a30455841">testInput_f32</a>, <a class="code" href="arm__variance__example__f32_8c.html#acc43b372d92d5027b9f9cac782c8b3c7">wire1</a>, <a class="code" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, &amp;mean);</div>
+<div class="line">  <a name="a12"></a><a class="code" href="group__BasicDotProd.html#gadf26f6bc62d6416528663ad3e46fbf67">arm_dot_prod_f32</a>(<a class="code" href="arm__variance__example__f32_8c.html#a9170ec9e681e2b519fe9c46a30455841">testInput_f32</a>, <a class="code" href="arm__variance__example__f32_8c.html#acc43b372d92d5027b9f9cac782c8b3c7">wire1</a>, <a class="code" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, &amp;mean);</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* Calculation of 1/blockSize */</span></div>
 <div class="line">  oneByBlockSize = 1.0 / (<a class="code" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>);</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* 1/blockSize * (x(0)* 1 + x(1) * 1 + ... + x(n-1) * 1)  */</span></div>
-<div class="line">  <a name="a13"></a><a class="code" href="group__BasicMult.html#gaca3f0b8227da431ab29225b88888aa32">arm_mult_f32</a>(&amp;mean, &amp;oneByBlockSize, &amp;mean, 1);</div>
+<div class="line">  <a name="a13"></a><a class="code" href="group__BasicMult.html#gacf950935141cad927bea886e88fd9e9b">arm_mult_f32</a>(&amp;mean, &amp;oneByBlockSize, &amp;mean, 1);</div>
 <div class="line"></div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* Calculation of variance value of input */</span></div>
@@ -231,43 +236,56 @@
 <div class="line">  <a class="code" href="group__Fill.html#ga2248e8d3901b4afb7827163132baad94">arm_fill_f32</a>(mean,  <a class="code" href="arm__variance__example__f32_8c.html#a41a9afab5be5ccd2e6f618b83102f0d1">wire2</a>, <a class="code" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>);</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* wire3 contains (x-x&#39;) */</span></div>
-<div class="line">  <a name="a14"></a><a class="code" href="group__BasicSub.html#ga7f975a472de286331134227c08aad826">arm_sub_f32</a>(<a class="code" href="arm__variance__example__f32_8c.html#a9170ec9e681e2b519fe9c46a30455841">testInput_f32</a>, <a class="code" href="arm__variance__example__f32_8c.html#a41a9afab5be5ccd2e6f618b83102f0d1">wire2</a>, <a class="code" href="arm__variance__example__f32_8c.html#af61f43ad332a2322e43ced590b6d9768">wire3</a>, <a class="code" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>);</div>
+<div class="line">  <a name="a14"></a><a class="code" href="group__BasicSub.html#ga76b8b2aec34269c6de0b090cab00fb33">arm_sub_f32</a>(<a class="code" href="arm__variance__example__f32_8c.html#a9170ec9e681e2b519fe9c46a30455841">testInput_f32</a>, <a class="code" href="arm__variance__example__f32_8c.html#a41a9afab5be5ccd2e6f618b83102f0d1">wire2</a>, <a class="code" href="arm__variance__example__f32_8c.html#af61f43ad332a2322e43ced590b6d9768">wire3</a>, <a class="code" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>);</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* wire2 contains (x-x&#39;) */</span></div>
-<div class="line">  <a name="a15"></a><a class="code" href="group__copy.html#gadd1f737e677e0e6ca31767c7001417b3">arm_copy_f32</a>(<a class="code" href="arm__variance__example__f32_8c.html#af61f43ad332a2322e43ced590b6d9768">wire3</a>, <a class="code" href="arm__variance__example__f32_8c.html#a41a9afab5be5ccd2e6f618b83102f0d1">wire2</a>, <a class="code" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>);</div>
+<div class="line">  <a name="a15"></a><a class="code" href="group__copy.html#gaa6dfe9554ca61eb3d1eee498396bce88">arm_copy_f32</a>(<a class="code" href="arm__variance__example__f32_8c.html#af61f43ad332a2322e43ced590b6d9768">wire3</a>, <a class="code" href="arm__variance__example__f32_8c.html#a41a9afab5be5ccd2e6f618b83102f0d1">wire2</a>, <a class="code" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>);</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* (x(0) - x&#39;) * (x(0) - x&#39;) + (x(1) - x&#39;) * (x(1) - x&#39;) + ... + (x(n-1) - x&#39;) * (x(n-1) - x&#39;) */</span></div>
-<div class="line">  <a class="code" href="group__dot__prod.html#ga55418d4362f6ba84c327f9b4f089a8c3">arm_dot_prod_f32</a>(<a class="code" href="arm__variance__example__f32_8c.html#a41a9afab5be5ccd2e6f618b83102f0d1">wire2</a>, <a class="code" href="arm__variance__example__f32_8c.html#af61f43ad332a2322e43ced590b6d9768">wire3</a>, <a class="code" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, &amp;variance);</div>
+<div class="line">  <a class="code" href="group__BasicDotProd.html#gadf26f6bc62d6416528663ad3e46fbf67">arm_dot_prod_f32</a>(<a class="code" href="arm__variance__example__f32_8c.html#a41a9afab5be5ccd2e6f618b83102f0d1">wire2</a>, <a class="code" href="arm__variance__example__f32_8c.html#af61f43ad332a2322e43ced590b6d9768">wire3</a>, <a class="code" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, &amp;variance);</div>
 <div class="line"></div>
 <div class="line">    <span class="comment">/* Calculation of 1/blockSize */</span></div>
 <div class="line">  oneByBlockSize = 1.0 / (<a class="code" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a> - 1);</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* Calculation of variance */</span></div>
-<div class="line">  <a class="code" href="group__BasicMult.html#gaca3f0b8227da431ab29225b88888aa32">arm_mult_f32</a>(&amp;variance, &amp;oneByBlockSize, &amp;variance, 1);</div>
+<div class="line">  <a class="code" href="group__BasicMult.html#gacf950935141cad927bea886e88fd9e9b">arm_mult_f32</a>(&amp;variance, &amp;oneByBlockSize, &amp;variance, 1);</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* absolute value of difference between ref and test */</span></div>
 <div class="line">  diff = fabsf(<a class="code" href="arm__variance__example__f32_8c.html#a26cbbfe2a7905669e8440159465050df">refVarianceOut</a> - variance);</div>
 <div class="line"></div>
 <div class="line">  <span class="comment">/* Comparison of variance value with reference */</span></div>
+<div class="line">  </div>
 <div class="line">  <span class="keywordflow">if</span> (diff &gt; <a name="a16"></a><a class="code" href="arm__variance__example__f32_8c.html#a3fd2b1bcd7ddcf506237987ad780f495">DELTA</a>)</div>
 <div class="line">  {</div>
 <div class="line">    status = <a name="a17"></a><a class="code" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a09457f2be656b35015fd6d36202fa376">ARM_MATH_TEST_FAILURE</a>;</div>
 <div class="line">  }</div>
 <div class="line"></div>
-<div class="line">  <span class="keywordflow">if</span> ( status != <a class="code" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>)</div>
+<div class="line"></div>
+<div class="line"><span class="preprocessor">#if !defined(FILEIO)</span></div>
+<div class="line"><span class="preprocessor"></span>  <span class="keywordflow">if</span> ( status != <a class="code" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>)</div>
 <div class="line">  {</div>
 <div class="line">    <span class="keywordflow">while</span> (1);</div>
 <div class="line">  }</div>
 <div class="line"></div>
-<div class="line">  <span class="keywordflow">while</span> (1);                             <span class="comment">/* main function does not return */</span></div>
-<div class="line">}</div>
+<div class="line">  <span class="keywordflow">while</span> (1);                            <span class="comment">/* main function does not return */</span></div>
+<div class="line"><span class="preprocessor">#else</span></div>
+<div class="line"><span class="preprocessor"></span>  <span class="keywordflow">if</span> (status == <a class="code" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>)</div>
+<div class="line">  {</div>
+<div class="line">     printf(<span class="stringliteral">&quot;SUCCESS\n&quot;</span>);</div>
+<div class="line">  }</div>
+<div class="line">  <span class="keywordflow">else</span></div>
+<div class="line">  {</div>
+<div class="line">     printf(<span class="stringliteral">&quot;FAILURE\n&quot;</span>);</div>
+<div class="line">  }</div>
+<div class="line"><span class="preprocessor">#endif</span></div>
+<div class="line"><span class="preprocessor"></span>}</div>
 <div class="line"></div>
 </div><!-- fragment --> </div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:18 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:38 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/classes.html b/docs/DSP/html/classes.html
index ccb45a5..e8b94aa 100644
--- a/docs/DSP/html/classes.html
+++ b/docs/DSP/html/classes.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -153,7 +153,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/cmsis.css b/docs/DSP/html/cmsis.css
index bba1010..586d4d2 100644
--- a/docs/DSP/html/cmsis.css
+++ b/docs/DSP/html/cmsis.css
@@ -1148,7 +1148,7 @@
 
 .image
 {
-        text-align: center;
+        text-align: left;
 }
 
 .dotgraph
diff --git a/docs/DSP/html/deprecated.html b/docs/DSP/html/deprecated.html
index fbb7b74..5cf96bc 100644
--- a/docs/DSP/html/deprecated.html
+++ b/docs/DSP/html/deprecated.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -112,148 +112,247 @@
 </div><!--header-->
 <div class="contents">
 <div class="textblock"><dl class="reflist">
-<dt><a class="anchor" id="_deprecated000001"></a>Global <a class="el" href="group__ComplexFFT.html#ga9fadd650b802f612ae558ddaab789a6d">arm_cfft_radix2_f32</a>  (const <a class="el" href="structarm__cfft__radix2__instance__f32.html" title="Instance structure for the floating-point CFFT/CIFFT function. ">arm_cfft_radix2_instance_f32</a> *S, float32_t *pSrc)</dt>
-<dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80">arm_cfft_f32</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
+<dt><a class="anchor" id="_deprecated000001"></a>Global <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>  (addr)</dt>
+<dd></dd>
+<dt><a class="anchor" id="_deprecated000002"></a>Global <a class="el" href="group__ComplexFFT.html#ga9fadd650b802f612ae558ddaab789a6d">arm_cfft_radix2_f32</a>  (const <a class="el" href="structarm__cfft__radix2__instance__f32.html" title="Instance structure for the floating-point CFFT/CIFFT function. ">arm_cfft_radix2_instance_f32</a> *S, float32_t *pSrc)</dt>
+<dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80">arm_cfft_f32</a> and will be removed in the future <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the floating-point Radix-2 CFFT/CIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*pSrc</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the floating-point Radix-2 CFFT/CIFFT structure </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.  </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none  </dd></dl>
 </dd>
-<dt><a class="anchor" id="_deprecated000002"></a>Global <a class="el" href="group__ComplexFFT.html#gac9565e6bc7229577ecf5e090313cafd7">arm_cfft_radix2_init_f32</a>  (<a class="el" href="structarm__cfft__radix2__instance__f32.html" title="Instance structure for the floating-point CFFT/CIFFT function. ">arm_cfft_radix2_instance_f32</a> *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)</dt>
+<dt><a class="anchor" id="_deprecated000003"></a>Global <a class="el" href="group__ComplexFFT.html#gac9565e6bc7229577ecf5e090313cafd7">arm_cfft_radix2_init_f32</a>  (<a class="el" href="structarm__cfft__radix2__instance__f32.html" title="Instance structure for the floating-point CFFT/CIFFT function. ">arm_cfft_radix2_instance_f32</a> *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)</dt>
 <dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80">arm_cfft_f32</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the floating-point CFFT/CIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the floating-point CFFT/CIFFT structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects transform direction<ul>
+<li>value = 0: forward transform</li>
+<li>value = 1: inverse transform </li>
+</ul>
+</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables / disables bit reversal of output<ul>
+<li>value = 0: disables bit reversal of output</li>
+<li>value = 1: enables bit reversal of output </li>
+</ul>
+</td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : <code>fftLen</code> is not a supported length </li>
+</ul>
+</dd></dl>
 </dd>
-<dt><a class="anchor" id="_deprecated000003"></a>Global <a class="el" href="group__ComplexFFT.html#ga5c5b2127b3c4ea2d03692127f8543858">arm_cfft_radix2_init_q15</a>  (<a class="el" href="structarm__cfft__radix2__instance__q15.html" title="Instance structure for the Q15 CFFT/CIFFT function. ">arm_cfft_radix2_instance_q15</a> *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)</dt>
+<dt><a class="anchor" id="_deprecated000004"></a>Global <a class="el" href="group__ComplexFFT.html#ga5c5b2127b3c4ea2d03692127f8543858">arm_cfft_radix2_init_q15</a>  (<a class="el" href="structarm__cfft__radix2__instance__q15.html" title="Instance structure for the Q15 CFFT/CIFFT function. ">arm_cfft_radix2_instance_q15</a> *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)</dt>
 <dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15</a> and will be removed <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q15 CFFT/CIFFT structure. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q15 CFFT/CIFFT structure. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects transform direction<ul>
+<li>value = 0: forward transform</li>
+<li>value = 1: inverse transform </li>
+</ul>
+</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables / disables bit reversal of output<ul>
+<li>value = 0: disables bit reversal of output</li>
+<li>value = 1: enables bit reversal of output </li>
+</ul>
+</td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : <code>fftLen</code> is not a supported length </li>
+</ul>
+</dd></dl>
 </dd>
-<dt><a class="anchor" id="_deprecated000004"></a>Global <a class="el" href="group__ComplexFFT.html#gabec9611e77382f31e152668bf6b4b638">arm_cfft_radix2_init_q31</a>  (<a class="el" href="structarm__cfft__radix2__instance__q31.html" title="Instance structure for the Radix-2 Q31 CFFT/CIFFT function. ">arm_cfft_radix2_instance_q31</a> *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)</dt>
-<dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31</a> and will be removed <dl class="params"><dt>Parameters</dt><dd>
+<dt><a class="anchor" id="_deprecated000005"></a>Global <a class="el" href="group__ComplexFFT.html#gabec9611e77382f31e152668bf6b4b638">arm_cfft_radix2_init_q31</a>  (<a class="el" href="structarm__cfft__radix2__instance__q31.html" title="Instance structure for the Radix-2 Q31 CFFT/CIFFT function. ">arm_cfft_radix2_instance_q31</a> *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)</dt>
+<dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q31 CFFT/CIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q31 CFFT/CIFFT structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects transform direction<ul>
+<li>value = 0: forward transform</li>
+<li>value = 1: inverse transform </li>
+</ul>
+</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables / disables bit reversal of output<ul>
+<li>value = 0: disables bit reversal of output</li>
+<li>value = 1: enables bit reversal of output </li>
+</ul>
+</td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : <code>fftLen</code> is not a supported length </li>
+</ul>
+</dd></dl>
 </dd>
-<dt><a class="anchor" id="_deprecated000005"></a>Global <a class="el" href="group__ComplexFFT.html#ga55b424341dc3efd3fa0bcaaff4bdbf40">arm_cfft_radix2_q15</a>  (const <a class="el" href="structarm__cfft__radix2__instance__q15.html" title="Instance structure for the Q15 CFFT/CIFFT function. ">arm_cfft_radix2_instance_q15</a> *S, q15_t *pSrc)</dt>
-<dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15</a> and will be removed <dl class="params"><dt>Parameters</dt><dd>
+<dt><a class="anchor" id="_deprecated000006"></a>Global <a class="el" href="group__ComplexFFT.html#ga55b424341dc3efd3fa0bcaaff4bdbf40">arm_cfft_radix2_q15</a>  (const <a class="el" href="structarm__cfft__radix2__instance__q15.html" title="Instance structure for the Q15 CFFT/CIFFT function. ">arm_cfft_radix2_instance_q15</a> *S, q15_t *pSrc)</dt>
+<dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the fixed-point CFFT/CIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*pSrc</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the fixed-point CFFT/CIFFT structure </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.  </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none  </dd></dl>
 </dd>
-<dt><a class="anchor" id="_deprecated000006"></a>Global <a class="el" href="group__ComplexFFT.html#ga6321f703ec87a274aedaab33d3e766b4">arm_cfft_radix2_q31</a>  (const <a class="el" href="structarm__cfft__radix2__instance__q31.html" title="Instance structure for the Radix-2 Q31 CFFT/CIFFT function. ">arm_cfft_radix2_instance_q31</a> *S, q31_t *pSrc)</dt>
-<dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31</a> and will be removed <dl class="params"><dt>Parameters</dt><dd>
+<dt><a class="anchor" id="_deprecated000007"></a>Global <a class="el" href="group__ComplexFFT.html#ga6321f703ec87a274aedaab33d3e766b4">arm_cfft_radix2_q31</a>  (const <a class="el" href="structarm__cfft__radix2__instance__q31.html" title="Instance structure for the Radix-2 Q31 CFFT/CIFFT function. ">arm_cfft_radix2_instance_q31</a> *S, q31_t *pSrc)</dt>
+<dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the fixed-point CFFT/CIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*pSrc</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the fixed-point CFFT/CIFFT structure </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.  </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none  </dd></dl>
 </dd>
-<dt><a class="anchor" id="_deprecated000007"></a>Global <a class="el" href="group__ComplexFFT.html#ga521f670cd9c571bc61aff9bec89f4c26">arm_cfft_radix4_f32</a>  (const <a class="el" href="structarm__cfft__radix4__instance__f32.html" title="Instance structure for the floating-point CFFT/CIFFT function. ">arm_cfft_radix4_instance_f32</a> *S, float32_t *pSrc)</dt>
+<dt><a class="anchor" id="_deprecated000008"></a>Global <a class="el" href="group__ComplexFFT.html#ga521f670cd9c571bc61aff9bec89f4c26">arm_cfft_radix4_f32</a>  (const <a class="el" href="structarm__cfft__radix4__instance__f32.html" title="Instance structure for the floating-point CFFT/CIFFT function. ">arm_cfft_radix4_instance_f32</a> *S, float32_t *pSrc)</dt>
 <dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80">arm_cfft_f32</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the floating-point Radix-4 CFFT/CIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*pSrc</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the floating-point Radix-4 CFFT/CIFFT structure </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.  </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none  </dd></dl>
 </dd>
-<dt><a class="anchor" id="_deprecated000008"></a>Global <a class="el" href="group__ComplexFFT.html#gaf336459f684f0b17bfae539ef1b1b78a">arm_cfft_radix4_init_f32</a>  (<a class="el" href="structarm__cfft__radix4__instance__f32.html" title="Instance structure for the floating-point CFFT/CIFFT function. ">arm_cfft_radix4_instance_f32</a> *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)</dt>
+<dt><a class="anchor" id="_deprecated000009"></a>Global <a class="el" href="group__ComplexFFT.html#gaf336459f684f0b17bfae539ef1b1b78a">arm_cfft_radix4_init_f32</a>  (<a class="el" href="structarm__cfft__radix4__instance__f32.html" title="Instance structure for the floating-point CFFT/CIFFT function. ">arm_cfft_radix4_instance_f32</a> *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)</dt>
 <dd>Do not use this function. It has been superceded by <a class="el" href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80">arm_cfft_f32</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the floating-point CFFT/CIFFT structure. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the floating-point CFFT/CIFFT structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects transform direction<ul>
+<li>value = 0: forward transform</li>
+<li>value = 1: inverse transform </li>
+</ul>
+</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables / disables bit reversal of output<ul>
+<li>value = 0: disables bit reversal of output</li>
+<li>value = 1: enables bit reversal of output </li>
+</ul>
+</td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : <code>fftLen</code> is not a supported length </li>
+</ul>
+</dd></dl>
+</dd>
+<dt><a class="anchor" id="_deprecated000010"></a>Global <a class="el" href="group__ComplexFFT.html#ga0c2acfda3126c452e75b81669e8ad9ef">arm_cfft_radix4_init_q15</a>  (<a class="el" href="structarm__cfft__radix4__instance__q15.html" title="Instance structure for the Q15 CFFT/CIFFT function. ">arm_cfft_radix4_instance_q15</a> *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)</dt>
+<dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q15 CFFT/CIFFT structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects transform direction<ul>
+<li>value = 0: forward transform</li>
+<li>value = 1: inverse transform </li>
+</ul>
+</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables / disables bit reversal of output<ul>
+<li>value = 0: disables bit reversal of output</li>
+<li>value = 1: enables bit reversal of output </li>
+</ul>
+</td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : <code>fftLen</code> is not a supported length </li>
+</ul>
+</dd></dl>
+</dd>
+<dt><a class="anchor" id="_deprecated000011"></a>Global <a class="el" href="group__ComplexFFT.html#gad5caaafeec900c8ff72321c01bbd462c">arm_cfft_radix4_init_q31</a>  (<a class="el" href="structarm__cfft__radix4__instance__q31.html" title="Instance structure for the Q31 CFFT/CIFFT function. ">arm_cfft_radix4_instance_q31</a> *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)</dt>
+<dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q31 CFFT/CIFFT structure. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects transform direction<ul>
+<li>value = 0: forward transform</li>
+<li>value = 1: inverse transform </li>
+</ul>
+</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables / disables bit reversal of output<ul>
+<li>value = 0: disables bit reversal of output</li>
+<li>value = 1: enables bit reversal of output </li>
+</ul>
+</td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : <code>fftLen</code> is not a supported length </li>
+</ul>
+</dd></dl>
 </dd>
-<dt><a class="anchor" id="_deprecated000009"></a>Global <a class="el" href="group__ComplexFFT.html#ga0c2acfda3126c452e75b81669e8ad9ef">arm_cfft_radix4_init_q15</a>  (<a class="el" href="structarm__cfft__radix4__instance__q15.html" title="Instance structure for the Q15 CFFT/CIFFT function. ">arm_cfft_radix4_instance_q15</a> *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)</dt>
-<dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15</a> and will be removed <dl class="params"><dt>Parameters</dt><dd>
+<dt><a class="anchor" id="_deprecated000012"></a>Global <a class="el" href="group__ComplexFFT.html#ga8d66cdac41b8bf6cefdb895456eee84a">arm_cfft_radix4_q15</a>  (const <a class="el" href="structarm__cfft__radix4__instance__q15.html" title="Instance structure for the Q15 CFFT/CIFFT function. ">arm_cfft_radix4_instance_q15</a> *S, q15_t *pSrc)</dt>
+<dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q15 CFFT/CIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q15 CFFT/CIFFT structure. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to the complex data buffer. Processing occurs in-place. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 </dd>
-<dt><a class="anchor" id="_deprecated000010"></a>Global <a class="el" href="group__ComplexFFT.html#gad5caaafeec900c8ff72321c01bbd462c">arm_cfft_radix4_init_q31</a>  (<a class="el" href="structarm__cfft__radix4__instance__q31.html" title="Instance structure for the Q31 CFFT/CIFFT function. ">arm_cfft_radix4_instance_q31</a> *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)</dt>
-<dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31</a> and will be removed <dl class="params"><dt>Parameters</dt><dd>
+<dt><a class="anchor" id="_deprecated000013"></a>Global <a class="el" href="group__ComplexFFT.html#gafde3ee1f58cf393b45a9073174fff548">arm_cfft_radix4_q31</a>  (const <a class="el" href="structarm__cfft__radix4__instance__q31.html" title="Instance structure for the Q31 CFFT/CIFFT function. ">arm_cfft_radix4_instance_q31</a> *S, q31_t *pSrc)</dt>
+<dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q31 CFFT/CIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q31 CFFT/CIFFT structure </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 </dd>
-<dt><a class="anchor" id="_deprecated000011"></a>Global <a class="el" href="group__ComplexFFT.html#ga8d66cdac41b8bf6cefdb895456eee84a">arm_cfft_radix4_q15</a>  (const <a class="el" href="structarm__cfft__radix4__instance__q15.html" title="Instance structure for the Q15 CFFT/CIFFT function. ">arm_cfft_radix4_instance_q15</a> *S, q15_t *pSrc)</dt>
-<dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15</a> and will be removed <dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q15 CFFT/CIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*pSrc</td><td>points to the complex data buffer. Processing occurs in-place. </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-</dd>
-<dt><a class="anchor" id="_deprecated000012"></a>Global <a class="el" href="group__ComplexFFT.html#gafde3ee1f58cf393b45a9073174fff548">arm_cfft_radix4_q31</a>  (const <a class="el" href="structarm__cfft__radix4__instance__q31.html" title="Instance structure for the Q31 CFFT/CIFFT function. ">arm_cfft_radix4_instance_q31</a> *S, q31_t *pSrc)</dt>
-<dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31</a> and will be removed <dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q31 CFFT/CIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*pSrc</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place. </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-</dd>
-<dt><a class="anchor" id="_deprecated000013"></a>Global <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32</a>  (const <a class="el" href="structarm__rfft__instance__f32.html" title="Instance structure for the floating-point RFFT/RIFFT function. ">arm_rfft_instance_f32</a> *S, float32_t *pSrc, float32_t *pDst)</dt>
+<dt><a class="anchor" id="_deprecated000014"></a>Global <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32</a>  (const <a class="el" href="structarm__rfft__instance__f32.html" title="Instance structure for the floating-point RFFT/RIFFT function. ">arm_rfft_instance_f32</a> *S, float32_t *pSrc, float32_t *pDst)</dt>
 <dd>Do not use this function. It has been superceded by <a class="el" href="group__RealFFT.html#ga180d8b764d59cbb85d37a2d5f7cd9799">arm_rfft_fast_f32</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the floating-point RFFT/RIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input buffer. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the floating-point RFFT/RIFFT structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input buffer </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output buffer </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none  </dd></dl>
+</dd>
+<dt><a class="anchor" id="_deprecated000015"></a>Global <a class="el" href="group__RealFFT.html#ga10717ee326bf50832ef1c25b85a23068">arm_rfft_init_f32</a>  (<a class="el" href="structarm__rfft__instance__f32.html" title="Instance structure for the floating-point RFFT/RIFFT function. ">arm_rfft_instance_f32</a> *S, <a class="el" href="structarm__cfft__radix4__instance__f32.html" title="Instance structure for the floating-point CFFT/CIFFT function. ">arm_cfft_radix4_instance_f32</a> *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)</dt>
+<dd>Do not use this function. It has been superceded by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the floating-point RFFT/RIFFT structure </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S_CFFT</td><td>points to an instance of the floating-point CFFT/CIFFT structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLenReal</td><td>length of the FFT. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlagR</td><td>flag that selects transform direction<ul>
+<li>value = 0: forward transform</li>
+<li>value = 1: inverse transform </li>
+</ul>
+</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables / disables bit reversal of output<ul>
+<li>value = 0: disables bit reversal of output</li>
+<li>value = 1: enables bit reversal of output </li>
+</ul>
+</td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : <code>fftLenReal</code> is not a supported length</li>
+</ul>
+</dd></dl>
 </dd>
 </dl>
 </div></div><!-- contents -->
@@ -261,7 +360,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/dir_2dfacf8e98c40fbe6b43e4f379522b9d.html b/docs/DSP/html/dir_2dfacf8e98c40fbe6b43e4f379522b9d.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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     <li class="navelem"><a class="el" href="dir_650d82db24a6311fa7658fced19ae149.html">DSP</a></li><li class="navelem"><a class="el" href="dir_abd1d8a41d439a254a6d729f0d888b04.html">Examples</a></li><li class="navelem"><a class="el" href="dir_dd8be1de2cb2fdb097bade8f148f6c3f.html">ARM</a></li><li class="navelem"><a class="el" href="dir_3c115b2b6137a19040f05baba5bbe4bb.html">arm_sin_cos_example</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/dir_4686057ebfd09ff788c87e22ea0e3543.html b/docs/DSP/html/dir_4686057ebfd09ff788c87e22ea0e3543.html
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    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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+<tr class="memitem:FilteringFunctions_8c"><td class="memItemLeft" align="right" valign="top">file &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="FilteringFunctions_8c.html">FilteringFunctions.c</a></td></tr>
+<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/dir_562f151f187819373d848c62a25ba73f.html b/docs/DSP/html/dir_562f151f187819373d848c62a25ba73f.html
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    <div id="projectname">CMSIS-DSP
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+<tr class="memitem:SupportFunctions_8c"><td class="memItemLeft" align="right" valign="top">file &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="SupportFunctions_8c.html">SupportFunctions.c</a></td></tr>
+<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/dir_650d82db24a6311fa7658fced19ae149.html b/docs/DSP/html/dir_650d82db24a6311fa7658fced19ae149.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-: <a class="el" href="arm__math_8h.html#a08bea9cb2c311d925224c0d6829edb8c">arm_math.h</a>
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 </li>
 <li>__QADD8()
-: <a class="el" href="arm__math_8h.html#a937a37e831677294ecde7195ec9d68ee">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#a2fb737513178e1e4b473008d0ebca517">arm_math.h</a>
 </li>
 <li>__QASX()
-: <a class="el" href="arm__math_8h.html#aad6f7afa72d784b95e6357c215a919bb">arm_math.h</a>
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 <li>__QSAX()
-: <a class="el" href="arm__math_8h.html#a391f5f1d2e7cefaccfece0a49141ad47">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#a995e63883c48c3c312c1492cb30d2e79">arm_math.h</a>
 </li>
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-: <a class="el" href="arm__math_8h.html#a15e896d0146c280e600d00f609832350">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#a98e0174c04cb34aec3ce57d5a370953d">arm_math.h</a>
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-: <a class="el" href="arm__math_8h.html#a6e4703dc08d1b82eab7f5ef96edb59bb">arm_math.h</a>
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 <li>__QSUB8()
-: <a class="el" href="arm__math_8h.html#a4690314b420f463093f1a2f68b5fb143">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#a646b60c85d3e75c6c2bd78df06db9b40">arm_math.h</a>
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-: <a class="el" href="arm__math_8h.html#af3d7aff37a4472f1f2bc88eb3b97b526">arm_math.h</a>
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-: <a class="el" href="arm__math_8h.html#af60f220d422ebc524411f712544feecf">arm_math.h</a>
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-: <a class="el" href="arm__math_8h.html#a0987d147320a596bbdb537d70b23de73">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#a67078440657eb28859c39adc62ce16b9">arm_math.h</a>
 </li>
 <li>__SIMD32
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 : <a class="el" href="arm__math_8h.html#ad1b053da364f9fd82ca1a381df7590b6">arm_math.h</a>
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-: <a class="el" href="arm__math_8h.html#aa611fdbf6c56c46553701d6596a79aaf">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#ac2e3c09dbb7c8fe39d3edfa6cdd4a862">arm_math.h</a>
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 <li>__SMLADX()
-: <a class="el" href="arm__math_8h.html#a7fc670277db1ad9ac34d52d771c7c305">arm_math.h</a>
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 </li>
 <li>__SMLALD()
-: <a class="el" href="arm__math_8h.html#a7aed02041f489a4f65dbd7093073d94e">arm_math.h</a>
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 <li>__SMLALDX()
-: <a class="el" href="arm__math_8h.html#a3bdab9022ab56e30f6346a043050dfc4">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#ae97294482e85127ef97526a962ebd1b3">arm_math.h</a>
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-: <a class="el" href="arm__math_8h.html#a5d61b7d886888f9f1f35c079eb5d01c9">arm_math.h</a>
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 </li>
 <li>__SMMLA()
-: <a class="el" href="arm__math_8h.html#a0162015f6d3458e2934a265481460ec4">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#a5a21d62839618246ef1383fc5531425b">arm_math.h</a>
 </li>
 <li>__SMUAD()
-: <a class="el" href="arm__math_8h.html#a2eed05660fedbe3fbd0b6dbb1315cfc3">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#a1caa8809ee9d31e162d28ebb09b2a773">arm_math.h</a>
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-: <a class="el" href="arm__math_8h.html#a9c58d7b4648a973d91e27544bc190e60">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#a5459e095b1250db7f7c12763648f818b">arm_math.h</a>
 </li>
 <li>__SMUSD()
-: <a class="el" href="arm__math_8h.html#a6b293f62ad7eb225fa9ce0f39458eba3">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#a7c93c24f4f94bcbb57fefcafa587e838">arm_math.h</a>
 </li>
 <li>__SMUSDX()
-: <a class="el" href="arm__math_8h.html#a7375d1deba32929dc97008bfa7085d46">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#a19acaeacb4ecb2c19e5df75c36b16895">arm_math.h</a>
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 <li>__SXTB16()
-: <a class="el" href="arm__math_8h.html#ac9f7f02a5e0ad5642026dbd0da7418db">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#a1d4c96261598742fea98a13d28fbb06a">arm_math.h</a>
 </li>
 <li>_SIMD32_OFFSET
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@@ -246,7 +246,7 @@
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/globals_a.html b/docs/DSP/html/globals_a.html
index 97dafc4..b4e73f4 100644
--- a/docs/DSP/html/globals_a.html
+++ b/docs/DSP/html/globals_a.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -150,43 +150,43 @@
 <li>A_f32
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 </li>
+<li>add_subdirectory()
+: <a class="el" href="Examples_2ARM_2arm__variance__example_2CMakeLists_8txt.html#ab8684add6c129686a0d750931302978d">Examples/ARM/arm_variance_example/CMakeLists.txt</a>
+</li>
 <li>Ak
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-<li>ALIGN4
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-</li>
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-, <a class="el" href="group__BasicAbs.html#ga421b6275f9d35f50286c0ff3beceff02">arm_abs_f32.c</a>
+: <a class="el" href="group__BasicAbs.html#ga0e8fc7df3033cdbe9cda8a766a46e6d9">arm_math.h</a>
+, <a class="el" href="group__BasicAbs.html#ga0e8fc7df3033cdbe9cda8a766a46e6d9">arm_abs_f32.c</a>
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-, <a class="el" href="group__BasicAbs.html#ga39f92964c9b649ba252e26ebe7b95594">arm_abs_q15.c</a>
+: <a class="el" href="group__BasicAbs.html#ga5cd90f9490ba8711c86e6f4bd7154359">arm_math.h</a>
+, <a class="el" href="group__BasicAbs.html#ga5cd90f9490ba8711c86e6f4bd7154359">arm_abs_q15.c</a>
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-, <a class="el" href="group__BasicAbs.html#ga59eafcdcdb52da60d37f20aec6ff4577">arm_abs_q31.c</a>
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+, <a class="el" href="group__BasicAbs.html#ga494bd5db5e2686d96f5548e80ba8ca89">arm_abs_q31.c</a>
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-, <a class="el" href="group__BasicAbs.html#gadc30985e33fbf96802a5a7954dece3b1">arm_abs_q7.c</a>
+: <a class="el" href="group__BasicAbs.html#ga097f1938c72471930b4e5647de40c505">arm_math.h</a>
+, <a class="el" href="group__BasicAbs.html#ga097f1938c72471930b4e5647de40c505">arm_abs_q7.c</a>
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-, <a class="el" href="group__BasicAdd.html#ga6a904a547413b10565dd1d251c6bafbd">arm_add_f32.c</a>
+: <a class="el" href="group__BasicAdd.html#gabfef1e86e458314a61f4baa441d9765e">arm_math.h</a>
+, <a class="el" href="group__BasicAdd.html#gabfef1e86e458314a61f4baa441d9765e">arm_add_f32.c</a>
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-, <a class="el" href="group__BasicAdd.html#gabb51285a41f511670bbff62fc0e1bf62">arm_add_q15.c</a>
+: <a class="el" href="group__BasicAdd.html#gacea7c052f62fdd71c8f1a14f0495cbed">arm_math.h</a>
+, <a class="el" href="group__BasicAdd.html#gacea7c052f62fdd71c8f1a14f0495cbed">arm_add_q15.c</a>
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 <li>arm_add_q31()
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-, <a class="el" href="group__BasicAdd.html#ga24d6c3f7f8b9fae4847c0c3f26a39a3b">arm_add_q31.c</a>
+: <a class="el" href="group__BasicAdd.html#ga63e5862d90971bff4181b22bfa6ac753">arm_math.h</a>
+, <a class="el" href="group__BasicAdd.html#ga63e5862d90971bff4181b22bfa6ac753">arm_add_q31.c</a>
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-, <a class="el" href="group__BasicAdd.html#gaed633f415a7840a66861debca2dfb96b">arm_add_q7.c</a>
+: <a class="el" href="group__BasicAdd.html#gafaecefa2be70b02118c8a317e183f247">arm_math.h</a>
+, <a class="el" href="group__BasicAdd.html#gafaecefa2be70b02118c8a317e183f247">arm_add_q7.c</a>
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 <li>armBitRevIndexTable_fixed_256
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-, <a class="el" href="arm__common__tables_8c.html#a14e05e3c3a86ebd7ee0d33c85d67803f">arm_common_tables.c</a>
+: <a class="el" href="arm__common__tables_8c.html#a14e05e3c3a86ebd7ee0d33c85d67803f">arm_common_tables.c</a>
+, <a class="el" href="arm__common__tables_8h.html#a14e05e3c3a86ebd7ee0d33c85d67803f">arm_common_tables.h</a>
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 <li>ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
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-, <a class="el" href="arm__common__tables_8h.html#ac5dc7168ea9694ae75adac3cc567bce8">arm_common_tables.h</a>
+: <a class="el" href="arm__common__tables_8h.html#ac5dc7168ea9694ae75adac3cc567bce8">arm_common_tables.h</a>
+, <a class="el" href="arm__common__tables_8c.html#ac5dc7168ea9694ae75adac3cc567bce8">arm_common_tables.c</a>
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-, <a class="el" href="arm__common__tables_8h.html#a162819f8903f8b65ff40adc195aec214">arm_common_tables.h</a>
+: <a class="el" href="arm__common__tables_8h.html#a162819f8903f8b65ff40adc195aec214">arm_common_tables.h</a>
+, <a class="el" href="arm__common__tables_8c.html#a162819f8903f8b65ff40adc195aec214">arm_common_tables.c</a>
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 <li>armRecipTableQ15
-: <a class="el" href="arm__common__tables_8c.html#a66ca8ac5f3a63d9962f501ae60aa32be">arm_common_tables.c</a>
-, <a class="el" href="arm__common__tables_8h.html#a56d3642e4ee33e3ada57ff11ecda1498">arm_common_tables.h</a>
+: <a class="el" href="arm__common__tables_8h.html#a56d3642e4ee33e3ada57ff11ecda1498">arm_common_tables.h</a>
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 <li>armRecipTableQ31
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-, <a class="el" href="arm__common__tables_8c.html#aae6056f6c4e8f7e494445196bf864479">arm_common_tables.c</a>
+: <a class="el" href="arm__common__tables_8c.html#aae6056f6c4e8f7e494445196bf864479">arm_common_tables.c</a>
+, <a class="el" href="arm__common__tables_8h.html#aae6056f6c4e8f7e494445196bf864479">arm_common_tables.h</a>
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 <li>AT_f32
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@@ -379,7 +378,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/globals_b.html b/docs/DSP/html/globals_b.html
index c161f41..e1dd019 100644
--- a/docs/DSP/html/globals_b.html
+++ b/docs/DSP/html/globals_b.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -148,103 +148,105 @@
 
 <h3><a class="anchor" id="index_b"></a>- b -</h3><ul>
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-: <a class="el" href="group__BilinearInterpolate.html#gaba67d2ba2acbd428832f106de29b8627">arm_math.h</a>
+: <a class="el" href="group__BilinearInterpolate.html#ga887756dbbe013d0a15b987836a787677">arm_math.h</a>
 </li>
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-: <a class="el" href="group__BilinearInterpolate.html#ga5f9b61bcae6d9295d926810cf398dd53">arm_math.h</a>
+: <a class="el" href="group__BilinearInterpolate.html#ga56fe34273ffb422f428b1d9feeffe0ea">arm_math.h</a>
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-: <a class="el" href="group__BilinearInterpolate.html#ga79d374eda5d39e220b0423ba3cb90c6e">arm_math.h</a>
+: <a class="el" href="group__BilinearInterpolate.html#gaefe4731017e8b9ac652e5fea57cb1fa5">arm_math.h</a>
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 <li>arm_bilinear_interp_q7()
-: <a class="el" href="group__BilinearInterpolate.html#ga0a986d4a01039914a9d6e81e9a4ccda0">arm_math.h</a>
+: <a class="el" href="group__BilinearInterpolate.html#ga1230bb062f6d8614db10b37ba7c9a161">arm_math.h</a>
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+: <a class="el" href="group__BiquadCascadeDF1__32x64.html#ga426cd78591a717e87d66d1eaa9a3d074">arm_math.h</a>
+, <a class="el" href="group__BiquadCascadeDF1__32x64.html#ga426cd78591a717e87d66d1eaa9a3d074">arm_biquad_cascade_df1_32x64_init_q31.c</a>
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 <li>arm_biquad_cas_df1_32x64_q31()
 : <a class="el" href="group__BiquadCascadeDF1__32x64.html#ga953a83e69685de6575cff37feb358a93">arm_math.h</a>
 , <a class="el" href="group__BiquadCascadeDF1__32x64.html#ga953a83e69685de6575cff37feb358a93">arm_biquad_cascade_df1_32x64_q31.c</a>
 </li>
 <li>arm_biquad_cascade_df1_f32()
-: <a class="el" href="group__BiquadCascadeDF1.html#gaa0dbe330d763e3c1d8030b3ef12d5bdc">arm_math.h</a>
-, <a class="el" href="group__BiquadCascadeDF1.html#gaa0dbe330d763e3c1d8030b3ef12d5bdc">arm_biquad_cascade_df1_f32.c</a>
+: <a class="el" href="group__BiquadCascadeDF1.html#ga812eb9769adde4fed6d5ff4968a011d3">arm_math.h</a>
+, <a class="el" href="group__BiquadCascadeDF1.html#ga812eb9769adde4fed6d5ff4968a011d3">arm_biquad_cascade_df1_f32.c</a>
 </li>
 <li>arm_biquad_cascade_df1_fast_q15()
-: <a class="el" href="group__BiquadCascadeDF1.html#gaffb9792c0220882efd4c58f3c6a05fd7">arm_math.h</a>
-, <a class="el" href="group__BiquadCascadeDF1.html#gaffb9792c0220882efd4c58f3c6a05fd7">arm_biquad_cascade_df1_fast_q15.c</a>
+: <a class="el" href="group__BiquadCascadeDF1.html#ga5008df017b9ce4046f35b61482009cbc">arm_math.h</a>
+, <a class="el" href="group__BiquadCascadeDF1.html#ga5008df017b9ce4046f35b61482009cbc">arm_biquad_cascade_df1_fast_q15.c</a>
 </li>
 <li>arm_biquad_cascade_df1_fast_q31()
-: <a class="el" href="group__BiquadCascadeDF1.html#ga456390f5e448afad3a38bed7d6e380e3">arm_math.h</a>
-, <a class="el" href="group__BiquadCascadeDF1.html#ga456390f5e448afad3a38bed7d6e380e3">arm_biquad_cascade_df1_fast_q31.c</a>
+: <a class="el" href="group__BiquadCascadeDF1.html#gaa09ea758c0b24eed9ef92b8d1e5c80c2">arm_math.h</a>
+, <a class="el" href="group__BiquadCascadeDF1.html#gaa09ea758c0b24eed9ef92b8d1e5c80c2">arm_biquad_cascade_df1_fast_q31.c</a>
 </li>
 <li>arm_biquad_cascade_df1_init_f32()
-: <a class="el" href="group__BiquadCascadeDF1.html#ga8e73b69a788e681a61bccc8959d823c5">arm_math.h</a>
-, <a class="el" href="group__BiquadCascadeDF1.html#ga8e73b69a788e681a61bccc8959d823c5">arm_biquad_cascade_df1_init_f32.c</a>
+: <a class="el" href="group__BiquadCascadeDF1.html#gad0b680d1c529d941e939d265b3c6ae59">arm_math.h</a>
+, <a class="el" href="group__BiquadCascadeDF1.html#gad0b680d1c529d941e939d265b3c6ae59">arm_biquad_cascade_df1_init_f32.c</a>
 </li>
 <li>arm_biquad_cascade_df1_init_q15()
-: <a class="el" href="group__BiquadCascadeDF1.html#gad54c724132f6d742a444eb6df0e9c731">arm_math.h</a>
-, <a class="el" href="group__BiquadCascadeDF1.html#gad54c724132f6d742a444eb6df0e9c731">arm_biquad_cascade_df1_init_q15.c</a>
+: <a class="el" href="group__BiquadCascadeDF1.html#ga1115256c79a0e22a3a54f8e627ac256f">arm_math.h</a>
+, <a class="el" href="group__BiquadCascadeDF1.html#ga1115256c79a0e22a3a54f8e627ac256f">arm_biquad_cascade_df1_init_q15.c</a>
 </li>
 <li>arm_biquad_cascade_df1_init_q31()
-: <a class="el" href="group__BiquadCascadeDF1.html#gaf42a44f9b16d61e636418c83eefe577b">arm_math.h</a>
-, <a class="el" href="group__BiquadCascadeDF1.html#gaf42a44f9b16d61e636418c83eefe577b">arm_biquad_cascade_df1_init_q31.c</a>
+: <a class="el" href="group__BiquadCascadeDF1.html#ga5563b156af44d1be2a7548626988bf4e">arm_math.h</a>
+, <a class="el" href="group__BiquadCascadeDF1.html#ga5563b156af44d1be2a7548626988bf4e">arm_biquad_cascade_df1_init_q31.c</a>
 </li>
 <li>arm_biquad_cascade_df1_q15()
-: <a class="el" href="group__BiquadCascadeDF1.html#gadd66a0aefdc645031d607b0a5b37a942">arm_math.h</a>
-, <a class="el" href="group__BiquadCascadeDF1.html#gadd66a0aefdc645031d607b0a5b37a942">arm_biquad_cascade_df1_q15.c</a>
+: <a class="el" href="group__BiquadCascadeDF1.html#ga27af5bfa40dad7c877e48eedc8d67558">arm_math.h</a>
+, <a class="el" href="group__BiquadCascadeDF1.html#ga27af5bfa40dad7c877e48eedc8d67558">arm_biquad_cascade_df1_q15.c</a>
 </li>
 <li>arm_biquad_cascade_df1_q31()
-: <a class="el" href="group__BiquadCascadeDF1.html#ga27b0c54da702713976e5202d20b4473f">arm_math.h</a>
-, <a class="el" href="group__BiquadCascadeDF1.html#ga27b0c54da702713976e5202d20b4473f">arm_biquad_cascade_df1_q31.c</a>
+: <a class="el" href="group__BiquadCascadeDF1.html#ga4e7dad0ee6949005909fd4fcf1249b79">arm_math.h</a>
+, <a class="el" href="group__BiquadCascadeDF1.html#ga4e7dad0ee6949005909fd4fcf1249b79">arm_biquad_cascade_df1_q31.c</a>
 </li>
 <li>arm_biquad_cascade_df2T_f32()
-: <a class="el" href="group__BiquadCascadeDF2T.html#ga114f373fbc16a314e9f293c7c7649c7f">arm_math.h</a>
-, <a class="el" href="group__BiquadCascadeDF2T.html#ga114f373fbc16a314e9f293c7c7649c7f">arm_biquad_cascade_df2T_f32.c</a>
+: <a class="el" href="group__BiquadCascadeDF2T.html#gaecf9b22907e89fc35f097b50589cf86a">arm_math.h</a>
+, <a class="el" href="group__BiquadCascadeDF2T.html#gaecf9b22907e89fc35f097b50589cf86a">arm_biquad_cascade_df2T_f32.c</a>
 </li>
 <li>arm_biquad_cascade_df2T_f64()
 : <a class="el" href="group__BiquadCascadeDF2T.html#gaa8735dda5f3f36d0936283794c2aa771">arm_math.h</a>
 , <a class="el" href="group__BiquadCascadeDF2T.html#gaa8735dda5f3f36d0936283794c2aa771">arm_biquad_cascade_df2T_f64.c</a>
 </li>
 <li>arm_biquad_cascade_df2T_init_f32()
-: <a class="el" href="group__BiquadCascadeDF2T.html#ga70eaddf317a4a8bde6bd6a97df67fedd">arm_math.h</a>
-, <a class="el" href="group__BiquadCascadeDF2T.html#ga70eaddf317a4a8bde6bd6a97df67fedd">arm_biquad_cascade_df2T_init_f32.c</a>
+: <a class="el" href="group__BiquadCascadeDF2T.html#gafd8b4068de567e9012e444f1c2320e1c">arm_math.h</a>
+, <a class="el" href="group__BiquadCascadeDF2T.html#gafd8b4068de567e9012e444f1c2320e1c">arm_biquad_cascade_df2T_init_f32.c</a>
 </li>
 <li>arm_biquad_cascade_df2T_init_f64()
 : <a class="el" href="group__BiquadCascadeDF2T.html#ga12dc5d8e8892806ad70e79ca2ff9f86e">arm_math.h</a>
 , <a class="el" href="group__BiquadCascadeDF2T.html#ga12dc5d8e8892806ad70e79ca2ff9f86e">arm_biquad_cascade_df2T_init_f64.c</a>
 </li>
 <li>arm_biquad_cascade_stereo_df2T_f32()
-: <a class="el" href="group__BiquadCascadeDF2T.html#gac75de449c3e4f733477d81bd0ada5eec">arm_math.h</a>
-, <a class="el" href="group__BiquadCascadeDF2T.html#gac75de449c3e4f733477d81bd0ada5eec">arm_biquad_cascade_stereo_df2T_f32.c</a>
+: <a class="el" href="group__BiquadCascadeDF2T.html#gaeb8334e64307e85de36db947da04a6eb">arm_math.h</a>
+, <a class="el" href="group__BiquadCascadeDF2T.html#gaeb8334e64307e85de36db947da04a6eb">arm_biquad_cascade_stereo_df2T_f32.c</a>
 </li>
 <li>arm_biquad_cascade_stereo_df2T_init_f32()
-: <a class="el" href="group__BiquadCascadeDF2T.html#ga405197c89fe4d34003efd23786296425">arm_math.h</a>
-, <a class="el" href="group__BiquadCascadeDF2T.html#ga405197c89fe4d34003efd23786296425">arm_biquad_cascade_stereo_df2T_init_f32.c</a>
+: <a class="el" href="group__BiquadCascadeDF2T.html#ga31a77581f3cba5f360c84b160d770d98">arm_math.h</a>
+, <a class="el" href="group__BiquadCascadeDF2T.html#ga31a77581f3cba5f360c84b160d770d98">arm_biquad_cascade_stereo_df2T_init_f32.c</a>
 </li>
 <li>arm_bitreversal_16()
-: <a class="el" href="arm__cfft__q15_8c.html#a773957c278f4d9e728711f27e8a6e278">arm_cfft_q15.c</a>
+: <a class="el" href="arm__bitreversal2_8c.html#af39358a8b7645d00180115d5009db286">arm_bitreversal2.c</a>
+, <a class="el" href="arm__cfft__q15_8c.html#a773957c278f4d9e728711f27e8a6e278">arm_cfft_q15.c</a>
 </li>
 <li>arm_bitreversal_32()
-: <a class="el" href="arm__cfft__f32_8c.html#ac8e7ebe1cb131a5b0f55d0464640591f">arm_cfft_f32.c</a>
+: <a class="el" href="arm__bitreversal2_8c.html#aa7638dc36fa3e1674d794918a53ceb8a">arm_bitreversal2.c</a>
+, <a class="el" href="arm__cfft__f32_8c.html#ac8e7ebe1cb131a5b0f55d0464640591f">arm_cfft_f32.c</a>
 , <a class="el" href="arm__cfft__q31_8c.html#ac8e7ebe1cb131a5b0f55d0464640591f">arm_cfft_q31.c</a>
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-: <a class="el" href="arm__cfft__radix2__f32_8c.html#a3d4062fdfa6aaa3f51f41cab868e508b">arm_cfft_radix2_f32.c</a>
-, <a class="el" href="arm__bitreversal_8c.html#a3d4062fdfa6aaa3f51f41cab868e508b">arm_bitreversal.c</a>
-, <a class="el" href="arm__cfft__radix4__f32_8c.html#a3d4062fdfa6aaa3f51f41cab868e508b">arm_cfft_radix4_f32.c</a>
-, <a class="el" href="arm__rfft__f32_8c.html#a3d4062fdfa6aaa3f51f41cab868e508b">arm_rfft_f32.c</a>
+: <a class="el" href="arm__rfft__f32_8c.html#a81008b023cbc9d37b3ff849877d1eb52">arm_rfft_f32.c</a>
+, <a class="el" href="arm__bitreversal_8c.html#a81008b023cbc9d37b3ff849877d1eb52">arm_bitreversal.c</a>
+, <a class="el" href="arm__cfft__radix2__f32_8c.html#a81008b023cbc9d37b3ff849877d1eb52">arm_cfft_radix2_f32.c</a>
+, <a class="el" href="arm__cfft__radix4__f32_8c.html#a81008b023cbc9d37b3ff849877d1eb52">arm_cfft_radix4_f32.c</a>
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 <li>arm_bitreversal_q15()
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-, <a class="el" href="arm__cfft__radix4__q15_8c.html#a73f48eaea9297605705ae25d3405343e">arm_cfft_radix4_q15.c</a>
-, <a class="el" href="arm__cfft__radix2__q15_8c.html#a73f48eaea9297605705ae25d3405343e">arm_cfft_radix2_q15.c</a>
+: <a class="el" href="arm__bitreversal_8c.html#aca90e3648bb9032de822180ab177f90c">arm_bitreversal.c</a>
+, <a class="el" href="arm__cfft__radix2__q15_8c.html#a192ac22646c129779db528f2f322300d">arm_cfft_radix2_q15.c</a>
+, <a class="el" href="arm__cfft__radix4__q15_8c.html#a192ac22646c129779db528f2f322300d">arm_cfft_radix4_q15.c</a>
 </li>
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-: <a class="el" href="arm__cfft__radix2__q31_8c.html#a3fab577d25c3a517973c8c214f66f268">arm_cfft_radix2_q31.c</a>
-, <a class="el" href="arm__bitreversal_8c.html#a27618705158b5c42db5fb0a381f8efc1">arm_bitreversal.c</a>
-, <a class="el" href="arm__cfft__radix4__q31_8c.html#a3fab577d25c3a517973c8c214f66f268">arm_cfft_radix4_q31.c</a>
+: <a class="el" href="arm__cfft__radix4__q31_8c.html#a82acdff1d26c7021c2a016a6e7e9eaf8">arm_cfft_radix4_q31.c</a>
+, <a class="el" href="arm__cfft__radix2__q31_8c.html#a82acdff1d26c7021c2a016a6e7e9eaf8">arm_cfft_radix2_q31.c</a>
+, <a class="el" href="arm__bitreversal_8c.html#a82acdff1d26c7021c2a016a6e7e9eaf8">arm_bitreversal.c</a>
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 <li>B_f32
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@@ -270,16 +272,16 @@
 <li>BLOCK_SIZE
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-<li>blockSize
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-, <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">arm_fir_example_f32.c</a>
-</li>
 <li>BLOCKSIZE
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-, <a class="el" href="arm__graphic__equalizer__example__q31_8c.html#afcf795f5a96fd55561abe69f56224630">arm_graphic_equalizer_example_q31.c</a>
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+, <a class="el" href="arm__sin__cos__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">arm_sin_cos_example_f32.c</a>
+, <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">arm_fir_example_f32.c</a>
+</li>
+<li>BLOCKSIZE
+: <a class="el" href="arm__graphic__equalizer__example__q31_8c.html#afcf795f5a96fd55561abe69f56224630">arm_graphic_equalizer_example_q31.c</a>
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@@ -287,7 +289,7 @@
 <!-- start footer part -->
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/globals_c.html b/docs/DSP/html/globals_c.html
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@@ -362,28 +362,28 @@
 , <a class="el" href="arm__const__structs_8c.html#ad11668a5662334e0bc6a2811c9cb1047">arm_const_structs.c</a>
 </li>
 <li>arm_circularRead_f32()
-: <a class="el" href="arm__math_8h.html#af4d2359037b7360329ef9dd6836d1353">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#aa0e8f158699a65e023960d555274ad39">arm_math.h</a>
 </li>
 <li>arm_circularRead_q15()
-: <a class="el" href="arm__math_8h.html#a98eb923fe8c64909897c31d6b9f69bff">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#a4d8edf2fbaa68badce77740563de353f">arm_math.h</a>
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 <li>arm_circularRead_q7()
-: <a class="el" href="arm__math_8h.html#acd3153fe997f44fe6c20fa1ac6257a2b">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#a734e6ec2b2d568236816464967326748">arm_math.h</a>
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 <li>arm_circularWrite_f32()
-: <a class="el" href="arm__math_8h.html#a87c6129c7f1a7e7b205339054d3ffed7">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#a189501700cbecf81c08a005bb16939d9">arm_math.h</a>
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 <li>arm_circularWrite_q15()
-: <a class="el" href="arm__math_8h.html#a885325c33991f03743a9d9b06868a099">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#a6799f043f7ab70c0d0e06fb9abbecb6e">arm_math.h</a>
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 <li>arm_circularWrite_q7()
-: <a class="el" href="arm__math_8h.html#a2db43ffe947dce0f676c09580d1f6765">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#a28179a962e4bb51c73c195dcb2f969aa">arm_math.h</a>
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-: <a class="el" href="group__clarke.html#gabbfa27c68837d22f03d6c6259569caa8">arm_math.h</a>
+: <a class="el" href="group__clarke.html#ga82d40c62bb48ef4d613f1f2f685b4084">arm_math.h</a>
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 <li>arm_clarke_q31()
-: <a class="el" href="group__clarke.html#ga0c69ebd2855ce6d34008eff808881e78">arm_math.h</a>
+: <a class="el" href="group__clarke.html#ga8d68db2a6e26e1caab677f5ab293c068">arm_math.h</a>
 </li>
 <li>arm_clip_f32()
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-, <a class="el" href="group__cmplx__conj.html#ga3a102aead6460ad9fcb0626f6b226ffb">arm_cmplx_conj_f32.c</a>
+: <a class="el" href="group__cmplx__conj.html#ga1b5571244b051bb72db30886896da2da">arm_math.h</a>
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-, <a class="el" href="group__cmplx__conj.html#gaf47689ae07962acaecb8ddde556df4a4">arm_cmplx_conj_q15.c</a>
+: <a class="el" href="group__cmplx__conj.html#ga2eef7dba99852d5f7ec3e025b2e5653b">arm_math.h</a>
+, <a class="el" href="group__cmplx__conj.html#ga2eef7dba99852d5f7ec3e025b2e5653b">arm_cmplx_conj_q15.c</a>
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 <li>arm_cmplx_conj_q31()
-: <a class="el" href="group__cmplx__conj.html#gafecc94879a383c5208ec3ef99485e4b5">arm_math.h</a>
-, <a class="el" href="group__cmplx__conj.html#gafecc94879a383c5208ec3ef99485e4b5">arm_cmplx_conj_q31.c</a>
+: <a class="el" href="group__cmplx__conj.html#ga652edf2688aae9b2f53c5da73f6cc2bc">arm_math.h</a>
+, <a class="el" href="group__cmplx__conj.html#ga652edf2688aae9b2f53c5da73f6cc2bc">arm_cmplx_conj_q31.c</a>
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 <li>arm_cmplx_dot_prod_f32()
-: <a class="el" href="group__cmplx__dot__prod.html#gadcfaf567a25eb641da4043eafb9bb076">arm_math.h</a>
-, <a class="el" href="group__cmplx__dot__prod.html#gadcfaf567a25eb641da4043eafb9bb076">arm_cmplx_dot_prod_f32.c</a>
+: <a class="el" href="group__cmplx__dot__prod.html#ga93796e73f02771cf6fe13de016e296ed">arm_math.h</a>
+, <a class="el" href="group__cmplx__dot__prod.html#ga93796e73f02771cf6fe13de016e296ed">arm_cmplx_dot_prod_f32.c</a>
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 <li>arm_cmplx_dot_prod_q15()
-: <a class="el" href="group__cmplx__dot__prod.html#ga2b08b5e8001d2c15204639d00893fc70">arm_math.h</a>
-, <a class="el" href="group__cmplx__dot__prod.html#ga2b08b5e8001d2c15204639d00893fc70">arm_cmplx_dot_prod_q15.c</a>
+: <a class="el" href="group__cmplx__dot__prod.html#gae712971379c461cfb8bef7e423bf8417">arm_math.h</a>
+, <a class="el" href="group__cmplx__dot__prod.html#gae712971379c461cfb8bef7e423bf8417">arm_cmplx_dot_prod_q15.c</a>
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 <li>arm_cmplx_dot_prod_q31()
-: <a class="el" href="group__cmplx__dot__prod.html#ga5b731a59db062a9ad84562ef68a6c8af">arm_math.h</a>
-, <a class="el" href="group__cmplx__dot__prod.html#ga5b731a59db062a9ad84562ef68a6c8af">arm_cmplx_dot_prod_q31.c</a>
+: <a class="el" href="group__cmplx__dot__prod.html#gaa90661b5eee3b6d83a149043ada0eb37">arm_math.h</a>
+, <a class="el" href="group__cmplx__dot__prod.html#gaa90661b5eee3b6d83a149043ada0eb37">arm_cmplx_dot_prod_q31.c</a>
 </li>
 <li>arm_cmplx_mag_f32()
-: <a class="el" href="group__cmplx__mag.html#gae45024c497392cde2ae358a76d435213">arm_cmplx_mag_f32.c</a>
-, <a class="el" href="group__cmplx__mag.html#gae45024c497392cde2ae358a76d435213">arm_math.h</a>
+: <a class="el" href="group__cmplx__mag.html#gaba4e0eff7816fe80d01121fb4cf6c6bc">arm_math.h</a>
+, <a class="el" href="group__cmplx__mag.html#gaba4e0eff7816fe80d01121fb4cf6c6bc">arm_cmplx_mag_f32.c</a>
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 <li>arm_cmplx_mag_q15()
-: <a class="el" href="group__cmplx__mag.html#ga0a4a8f77a6a51d9b3f3b9d729f85b7a4">arm_math.h</a>
-, <a class="el" href="group__cmplx__mag.html#ga0a4a8f77a6a51d9b3f3b9d729f85b7a4">arm_cmplx_mag_q15.c</a>
+: <a class="el" href="group__cmplx__mag.html#ga0488e185f4631ac029b02f1759b287cf">arm_math.h</a>
+, <a class="el" href="group__cmplx__mag.html#ga0488e185f4631ac029b02f1759b287cf">arm_cmplx_mag_q15.c</a>
 </li>
 <li>arm_cmplx_mag_q31()
-: <a class="el" href="group__cmplx__mag.html#ga14f82f9230e9d96d5b9774e2fefcb7be">arm_math.h</a>
-, <a class="el" href="group__cmplx__mag.html#ga14f82f9230e9d96d5b9774e2fefcb7be">arm_cmplx_mag_q31.c</a>
+: <a class="el" href="group__cmplx__mag.html#gab69ad9237469565958cce6b4555bbb6e">arm_math.h</a>
+, <a class="el" href="group__cmplx__mag.html#gab69ad9237469565958cce6b4555bbb6e">arm_cmplx_mag_q31.c</a>
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 <li>arm_cmplx_mag_squared_f32()
-: <a class="el" href="group__cmplx__mag__squared.html#gaa7faccc0d96b061d8b7d0d7d82045074">arm_math.h</a>
-, <a class="el" href="group__cmplx__mag__squared.html#gaa7faccc0d96b061d8b7d0d7d82045074">arm_cmplx_mag_squared_f32.c</a>
+: <a class="el" href="group__cmplx__mag__squared.html#ga925ef5458a384f63d06f1c6997d1fb7d">arm_math.h</a>
+, <a class="el" href="group__cmplx__mag__squared.html#ga925ef5458a384f63d06f1c6997d1fb7d">arm_cmplx_mag_squared_f32.c</a>
 </li>
 <li>arm_cmplx_mag_squared_q15()
-: <a class="el" href="group__cmplx__mag__squared.html#ga45537f576102d960d467eb722b8431f2">arm_math.h</a>
-, <a class="el" href="group__cmplx__mag__squared.html#ga45537f576102d960d467eb722b8431f2">arm_cmplx_mag_squared_q15.c</a>
+: <a class="el" href="group__cmplx__mag__squared.html#gafdd1e838db0aef7ec201611883bd444c">arm_math.h</a>
+, <a class="el" href="group__cmplx__mag__squared.html#gafdd1e838db0aef7ec201611883bd444c">arm_cmplx_mag_squared_q15.c</a>
 </li>
 <li>arm_cmplx_mag_squared_q31()
-: <a class="el" href="group__cmplx__mag__squared.html#ga384b0538101e8c03fa4fa14271e63b04">arm_math.h</a>
-, <a class="el" href="group__cmplx__mag__squared.html#ga384b0538101e8c03fa4fa14271e63b04">arm_cmplx_mag_squared_q31.c</a>
+: <a class="el" href="group__cmplx__mag__squared.html#ga9d74dbc0a777cfcc75c1cae33ef4d44a">arm_cmplx_mag_squared_q31.c</a>
+, <a class="el" href="group__cmplx__mag__squared.html#ga9d74dbc0a777cfcc75c1cae33ef4d44a">arm_math.h</a>
 </li>
 <li>arm_cmplx_mult_cmplx_f32()
-: <a class="el" href="group__CmplxByCmplxMult.html#ga14b47080054a1ba1250a86805be1ff6b">arm_math.h</a>
-, <a class="el" href="group__CmplxByCmplxMult.html#ga14b47080054a1ba1250a86805be1ff6b">arm_cmplx_mult_cmplx_f32.c</a>
+: <a class="el" href="group__CmplxByCmplxMult.html#gae221504b01e4abfe5f335eafd801b4ed">arm_math.h</a>
+, <a class="el" href="group__CmplxByCmplxMult.html#gae221504b01e4abfe5f335eafd801b4ed">arm_cmplx_mult_cmplx_f32.c</a>
 </li>
 <li>arm_cmplx_mult_cmplx_q15()
-: <a class="el" href="group__CmplxByCmplxMult.html#ga67e96abfc9c3e30efb70a2ec9d0fe7e8">arm_math.h</a>
-, <a class="el" href="group__CmplxByCmplxMult.html#ga67e96abfc9c3e30efb70a2ec9d0fe7e8">arm_cmplx_mult_cmplx_q15.c</a>
+: <a class="el" href="group__CmplxByCmplxMult.html#ga683b32a91cffbf021f58ace5a62904e8">arm_math.h</a>
+, <a class="el" href="group__CmplxByCmplxMult.html#ga683b32a91cffbf021f58ace5a62904e8">arm_cmplx_mult_cmplx_q15.c</a>
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 <li>arm_cmplx_mult_cmplx_q31()
-: <a class="el" href="group__CmplxByCmplxMult.html#ga1829e50993a90742de225a0ce4213838">arm_cmplx_mult_cmplx_q31.c</a>
-, <a class="el" href="group__CmplxByCmplxMult.html#ga1829e50993a90742de225a0ce4213838">arm_math.h</a>
+: <a class="el" href="group__CmplxByCmplxMult.html#ga7748c92e0922cf14e3d7bb257d77593f">arm_math.h</a>
+, <a class="el" href="group__CmplxByCmplxMult.html#ga7748c92e0922cf14e3d7bb257d77593f">arm_cmplx_mult_cmplx_q31.c</a>
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 <li>arm_cmplx_mult_real_f32()
-: <a class="el" href="group__CmplxByRealMult.html#ga9c18616f56cb4d3c0889ce0b339221ca">arm_math.h</a>
-, <a class="el" href="group__CmplxByRealMult.html#ga9c18616f56cb4d3c0889ce0b339221ca">arm_cmplx_mult_real_f32.c</a>
+: <a class="el" href="group__CmplxByRealMult.html#ga903eb30a02343574e46cb123b52232f4">arm_math.h</a>
+, <a class="el" href="group__CmplxByRealMult.html#ga903eb30a02343574e46cb123b52232f4">arm_cmplx_mult_real_f32.c</a>
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 <li>arm_cmplx_mult_real_q15()
-: <a class="el" href="group__CmplxByRealMult.html#ga3bd8889dcb45980e1d3e53344df54e85">arm_cmplx_mult_real_q15.c</a>
-, <a class="el" href="group__CmplxByRealMult.html#ga3bd8889dcb45980e1d3e53344df54e85">arm_math.h</a>
+: <a class="el" href="group__CmplxByRealMult.html#gaa41d60a567652bf6a783b916931bf20b">arm_math.h</a>
+, <a class="el" href="group__CmplxByRealMult.html#gaa41d60a567652bf6a783b916931bf20b">arm_cmplx_mult_real_q15.c</a>
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 <li>arm_cmplx_mult_real_q31()
-: <a class="el" href="group__CmplxByRealMult.html#ga715e4bb8e945b8ca51ec5237611697ce">arm_math.h</a>
-, <a class="el" href="group__CmplxByRealMult.html#ga715e4bb8e945b8ca51ec5237611697ce">arm_cmplx_mult_real_q31.c</a>
+: <a class="el" href="group__CmplxByRealMult.html#ga0fe1cd71d35b4481f8ab69d502c96ace">arm_math.h</a>
+, <a class="el" href="group__CmplxByRealMult.html#ga0fe1cd71d35b4481f8ab69d502c96ace">arm_cmplx_mult_real_q31.c</a>
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 <li>arm_compare_fixed_q15()
 : <a class="el" href="arm__convolution__example_2math__helper_8c.html#a64d5207c035db13cddde479317dd131e">arm_convolution_example/math_helper.c</a>
-, <a class="el" href="arm__convolution__example_2math__helper_8h.html#a64d5207c035db13cddde479317dd131e">arm_convolution_example/math_helper.h</a>
 , <a class="el" href="arm__fir__example_2math__helper_8c.html#a64d5207c035db13cddde479317dd131e">arm_fir_example/math_helper.c</a>
 , <a class="el" href="arm__fir__example_2math__helper_8h.html#a64d5207c035db13cddde479317dd131e">arm_fir_example/math_helper.h</a>
 , <a class="el" href="arm__graphic__equalizer__example_2math__helper_8c.html#a64d5207c035db13cddde479317dd131e">arm_graphic_equalizer_example/math_helper.c</a>
-, <a class="el" href="arm__graphic__equalizer__example_2math__helper_8h.html#a64d5207c035db13cddde479317dd131e">arm_graphic_equalizer_example/math_helper.h</a>
 , <a class="el" href="arm__linear__interp__example_2math__helper_8c.html#a64d5207c035db13cddde479317dd131e">arm_linear_interp_example/math_helper.c</a>
-, <a class="el" href="arm__matrix__example_2math__helper_8c.html#a64d5207c035db13cddde479317dd131e">arm_matrix_example/math_helper.c</a>
-, <a class="el" href="arm__matrix__example_2math__helper_8h.html#a64d5207c035db13cddde479317dd131e">arm_matrix_example/math_helper.h</a>
-, <a class="el" href="arm__signal__converge__example_2math__helper_8c.html#a64d5207c035db13cddde479317dd131e">arm_signal_converge_example/math_helper.c</a>
 , <a class="el" href="arm__linear__interp__example_2math__helper_8h.html#a64d5207c035db13cddde479317dd131e">arm_linear_interp_example/math_helper.h</a>
+, <a class="el" href="arm__matrix__example_2math__helper_8c.html#a64d5207c035db13cddde479317dd131e">arm_matrix_example/math_helper.c</a>
+, <a class="el" href="arm__signal__converge__example_2math__helper_8c.html#a64d5207c035db13cddde479317dd131e">arm_signal_converge_example/math_helper.c</a>
 , <a class="el" href="arm__signal__converge__example_2math__helper_8h.html#a64d5207c035db13cddde479317dd131e">arm_signal_converge_example/math_helper.h</a>
+, <a class="el" href="arm__matrix__example_2math__helper_8h.html#a64d5207c035db13cddde479317dd131e">arm_matrix_example/math_helper.h</a>
+, <a class="el" href="arm__graphic__equalizer__example_2math__helper_8h.html#a64d5207c035db13cddde479317dd131e">arm_graphic_equalizer_example/math_helper.h</a>
+, <a class="el" href="arm__convolution__example_2math__helper_8h.html#a64d5207c035db13cddde479317dd131e">arm_convolution_example/math_helper.h</a>
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 <li>arm_compare_fixed_q31()
-: <a class="el" href="arm__signal__converge__example_2math__helper_8h.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_signal_converge_example/math_helper.h</a>
-, <a class="el" href="arm__linear__interp__example_2math__helper_8h.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_linear_interp_example/math_helper.h</a>
-, <a class="el" href="arm__signal__converge__example_2math__helper_8c.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_signal_converge_example/math_helper.c</a>
+: <a class="el" href="arm__matrix__example_2math__helper_8h.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_matrix_example/math_helper.h</a>
 , <a class="el" href="arm__convolution__example_2math__helper_8c.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_convolution_example/math_helper.c</a>
 , <a class="el" href="arm__convolution__example_2math__helper_8h.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_convolution_example/math_helper.h</a>
 , <a class="el" href="arm__fir__example_2math__helper_8c.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_fir_example/math_helper.c</a>
+, <a class="el" href="arm__fir__example_2math__helper_8h.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_fir_example/math_helper.h</a>
 , <a class="el" href="arm__graphic__equalizer__example_2math__helper_8c.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_graphic_equalizer_example/math_helper.c</a>
-, <a class="el" href="arm__graphic__equalizer__example_2math__helper_8h.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_graphic_equalizer_example/math_helper.h</a>
+, <a class="el" href="arm__linear__interp__example_2math__helper_8h.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_linear_interp_example/math_helper.h</a>
 , <a class="el" href="arm__linear__interp__example_2math__helper_8c.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_linear_interp_example/math_helper.c</a>
 , <a class="el" href="arm__matrix__example_2math__helper_8c.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_matrix_example/math_helper.c</a>
-, <a class="el" href="arm__matrix__example_2math__helper_8h.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_matrix_example/math_helper.h</a>
-, <a class="el" href="arm__fir__example_2math__helper_8h.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_fir_example/math_helper.h</a>
+, <a class="el" href="arm__graphic__equalizer__example_2math__helper_8h.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_graphic_equalizer_example/math_helper.h</a>
+, <a class="el" href="arm__signal__converge__example_2math__helper_8c.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_signal_converge_example/math_helper.c</a>
+, <a class="el" href="arm__signal__converge__example_2math__helper_8h.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_signal_converge_example/math_helper.h</a>
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 <li>arm_conv_f32()
-: <a class="el" href="group__Conv.html#ga3f860dc98c6fc4cafc421e4a2aed3c89">arm_math.h</a>
-, <a class="el" href="group__Conv.html#ga3f860dc98c6fc4cafc421e4a2aed3c89">arm_conv_f32.c</a>
+: <a class="el" href="group__Conv.html#ga2e977f76e873bd47c6c41c7d940fdf7e">arm_conv_f32.c</a>
+, <a class="el" href="group__Conv.html#ga2e977f76e873bd47c6c41c7d940fdf7e">arm_math.h</a>
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 <li>arm_conv_fast_opt_q15()
-: <a class="el" href="group__Conv.html#gaf16f490d245391ec18a42adc73d6d749">arm_math.h</a>
-, <a class="el" href="group__Conv.html#gaf16f490d245391ec18a42adc73d6d749">arm_conv_fast_opt_q15.c</a>
+: <a class="el" href="group__Conv.html#ga8ecd292b8e74c8f05b208e7948d05a90">arm_math.h</a>
+, <a class="el" href="group__Conv.html#ga8ecd292b8e74c8f05b208e7948d05a90">arm_conv_fast_opt_q15.c</a>
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 <li>arm_conv_fast_q15()
-: <a class="el" href="group__Conv.html#gad75ca978ce906e04abdf86a8d76306d4">arm_conv_fast_q15.c</a>
-, <a class="el" href="group__Conv.html#gad75ca978ce906e04abdf86a8d76306d4">arm_math.h</a>
+: <a class="el" href="group__Conv.html#gaf6bc2c8d655ef8c9b66affdae489f366">arm_math.h</a>
+, <a class="el" href="group__Conv.html#gaf6bc2c8d655ef8c9b66affdae489f366">arm_conv_fast_q15.c</a>
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 <li>arm_conv_fast_q31()
-: <a class="el" href="group__Conv.html#ga51112dcdf9b3624eb05182cdc4da9ec0">arm_math.h</a>
-, <a class="el" href="group__Conv.html#ga51112dcdf9b3624eb05182cdc4da9ec0">arm_conv_fast_q31.c</a>
+: <a class="el" href="group__Conv.html#ga2d2b29b1f7f00a8651f1bc7f0560464b">arm_math.h</a>
+, <a class="el" href="group__Conv.html#ga2d2b29b1f7f00a8651f1bc7f0560464b">arm_conv_fast_q31.c</a>
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 <li>arm_conv_opt_q15()
-: <a class="el" href="group__Conv.html#gac77dbcaef5c754cac27eab96c4753a3c">arm_conv_opt_q15.c</a>
-, <a class="el" href="group__Conv.html#gac77dbcaef5c754cac27eab96c4753a3c">arm_math.h</a>
+: <a class="el" href="group__Conv.html#ga0d60c7a8349c6235d88bf87b04172252">arm_math.h</a>
+, <a class="el" href="group__Conv.html#ga0d60c7a8349c6235d88bf87b04172252">arm_conv_opt_q15.c</a>
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 <li>arm_conv_opt_q7()
-: <a class="el" href="group__Conv.html#ga4c7cf073e89d6d57cc4e711f078c3f68">arm_math.h</a>
-, <a class="el" href="group__Conv.html#ga4c7cf073e89d6d57cc4e711f078c3f68">arm_conv_opt_q7.c</a>
+: <a class="el" href="group__Conv.html#gaf23966af04840f17c26c93849986baeb">arm_math.h</a>
+, <a class="el" href="group__Conv.html#gaf23966af04840f17c26c93849986baeb">arm_conv_opt_q7.c</a>
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 <li>arm_conv_partial_f32()
-: <a class="el" href="group__PartialConv.html#ga16d10f32072cd79fc5fb6e785df45f5e">arm_math.h</a>
-, <a class="el" href="group__PartialConv.html#ga16d10f32072cd79fc5fb6e785df45f5e">arm_conv_partial_f32.c</a>
+: <a class="el" href="group__PartialConv.html#ga4e65902884d148ebcbecc260e0dffdd9">arm_conv_partial_f32.c</a>
+, <a class="el" href="group__PartialConv.html#ga4e65902884d148ebcbecc260e0dffdd9">arm_math.h</a>
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 <li>arm_conv_partial_fast_opt_q15()
-: <a class="el" href="group__PartialConv.html#ga3de9c4ddcc7886de25b70d875099a8d9">arm_math.h</a>
-, <a class="el" href="group__PartialConv.html#ga3de9c4ddcc7886de25b70d875099a8d9">arm_conv_partial_fast_opt_q15.c</a>
+: <a class="el" href="group__PartialConv.html#ga0cdb871f952b8c1305342ae499affa41">arm_math.h</a>
+, <a class="el" href="group__PartialConv.html#ga0cdb871f952b8c1305342ae499affa41">arm_conv_partial_fast_opt_q15.c</a>
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-: <a class="el" href="group__PartialConv.html#ga1e4d43385cb62262a78c6752fe1fafb2">arm_math.h</a>
-, <a class="el" href="group__PartialConv.html#ga1e4d43385cb62262a78c6752fe1fafb2">arm_conv_partial_fast_q15.c</a>
+: <a class="el" href="group__PartialConv.html#ga30eb5ce84581f2d0532a17cdf8a20fc5">arm_math.h</a>
+, <a class="el" href="group__PartialConv.html#ga30eb5ce84581f2d0532a17cdf8a20fc5">arm_conv_partial_fast_q15.c</a>
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 <li>arm_conv_partial_fast_q31()
-: <a class="el" href="group__PartialConv.html#ga10c5294cda8c4985386f4e3944be7650">arm_math.h</a>
-, <a class="el" href="group__PartialConv.html#ga10c5294cda8c4985386f4e3944be7650">arm_conv_partial_fast_q31.c</a>
+: <a class="el" href="group__PartialConv.html#gaaf207e31aa081cea624713aec65d0e77">arm_math.h</a>
+, <a class="el" href="group__PartialConv.html#gaaf207e31aa081cea624713aec65d0e77">arm_conv_partial_fast_q31.c</a>
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 <li>arm_conv_partial_opt_q15()
-: <a class="el" href="group__PartialConv.html#ga834b23b4ade8682beeb55778399101f8">arm_math.h</a>
-, <a class="el" href="group__PartialConv.html#ga834b23b4ade8682beeb55778399101f8">arm_conv_partial_opt_q15.c</a>
+: <a class="el" href="group__PartialConv.html#gaa82f8213533529e9b9252b37fd3b39e4">arm_math.h</a>
+, <a class="el" href="group__PartialConv.html#gaa82f8213533529e9b9252b37fd3b39e4">arm_conv_partial_opt_q15.c</a>
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 <li>arm_conv_partial_opt_q7()
-: <a class="el" href="group__PartialConv.html#ga3707e16af1435b215840006a7ab0c98f">arm_conv_partial_opt_q7.c</a>
-, <a class="el" href="group__PartialConv.html#ga3707e16af1435b215840006a7ab0c98f">arm_math.h</a>
+: <a class="el" href="group__PartialConv.html#gadfc0cd0290793c790ccaa1c73eda0694">arm_math.h</a>
+, <a class="el" href="group__PartialConv.html#gadfc0cd0290793c790ccaa1c73eda0694">arm_conv_partial_opt_q7.c</a>
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-: <a class="el" href="group__PartialConv.html#ga209a2a913a0c5e5679c5988da8f46b03">arm_conv_partial_q15.c</a>
-, <a class="el" href="group__PartialConv.html#ga209a2a913a0c5e5679c5988da8f46b03">arm_math.h</a>
+: <a class="el" href="group__PartialConv.html#ga09b1f207980df75c2dcf01b1d3c2006f">arm_math.h</a>
+, <a class="el" href="group__PartialConv.html#ga09b1f207980df75c2dcf01b1d3c2006f">arm_conv_partial_q15.c</a>
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-: <a class="el" href="group__PartialConv.html#ga78e73a5f02d103168a09821fb461e77a">arm_conv_partial_q31.c</a>
-, <a class="el" href="group__PartialConv.html#ga78e73a5f02d103168a09821fb461e77a">arm_math.h</a>
+: <a class="el" href="group__PartialConv.html#gadc48f14ae5ca8bf4b026916db0765afa">arm_math.h</a>
+, <a class="el" href="group__PartialConv.html#gadc48f14ae5ca8bf4b026916db0765afa">arm_conv_partial_q31.c</a>
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-: <a class="el" href="group__PartialConv.html#ga8567259fe18396dd972242c41741ebf4">arm_conv_partial_q7.c</a>
-, <a class="el" href="group__PartialConv.html#ga8567259fe18396dd972242c41741ebf4">arm_math.h</a>
+: <a class="el" href="group__PartialConv.html#gaa1bf3428dbe6beb5c9957bff0d00fa19">arm_math.h</a>
+, <a class="el" href="group__PartialConv.html#gaa1bf3428dbe6beb5c9957bff0d00fa19">arm_conv_partial_q7.c</a>
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-: <a class="el" href="group__Conv.html#gaccd6a89b0ff7a94df64610598e6e6893">arm_math.h</a>
-, <a class="el" href="group__Conv.html#gaccd6a89b0ff7a94df64610598e6e6893">arm_conv_q15.c</a>
+: <a class="el" href="group__Conv.html#ga372d3fd79b107dc6b12163a00c22da18">arm_math.h</a>
+, <a class="el" href="group__Conv.html#ga372d3fd79b107dc6b12163a00c22da18">arm_conv_q15.c</a>
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 <li>arm_conv_q31()
-: <a class="el" href="group__Conv.html#ga946b58da734f1e4e78c91fcaab4b12b6">arm_conv_q31.c</a>
-, <a class="el" href="group__Conv.html#ga946b58da734f1e4e78c91fcaab4b12b6">arm_math.h</a>
+: <a class="el" href="group__Conv.html#ga08ce299fb5c3329505cb8ce4bf4f6e06">arm_conv_q31.c</a>
+, <a class="el" href="group__Conv.html#ga08ce299fb5c3329505cb8ce4bf4f6e06">arm_math.h</a>
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-: <a class="el" href="group__Conv.html#gae2070cb792a167e78dbad8d06b97cdab">arm_math.h</a>
-, <a class="el" href="group__Conv.html#gae2070cb792a167e78dbad8d06b97cdab">arm_conv_q7.c</a>
+: <a class="el" href="group__Conv.html#ga625b30107443b6d145350bc242749764">arm_math.h</a>
+, <a class="el" href="group__Conv.html#ga625b30107443b6d145350bc242749764">arm_conv_q7.c</a>
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-: <a class="el" href="group__copy.html#gadd1f737e677e0e6ca31767c7001417b3">arm_math.h</a>
-, <a class="el" href="group__copy.html#gadd1f737e677e0e6ca31767c7001417b3">arm_copy_f32.c</a>
+: <a class="el" href="group__copy.html#gaa6dfe9554ca61eb3d1eee498396bce88">arm_math.h</a>
+, <a class="el" href="group__copy.html#gaa6dfe9554ca61eb3d1eee498396bce88">arm_copy_f32.c</a>
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-, <a class="el" href="group__copy.html#ga872ca4cfc18c680b8991ccd569a5fda0">arm_copy_q15.c</a>
+: <a class="el" href="group__copy.html#gaeb9e8c16ec7fe1235e5610142400f15f">arm_copy_q15.c</a>
+, <a class="el" href="group__copy.html#gaeb9e8c16ec7fe1235e5610142400f15f">arm_math.h</a>
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-: <a class="el" href="group__copy.html#gaddf70be7e3f87e535c324862b501f3f9">arm_copy_q31.c</a>
-, <a class="el" href="group__copy.html#gaddf70be7e3f87e535c324862b501f3f9">arm_math.h</a>
+: <a class="el" href="group__copy.html#ga94c51fe2e82560ade3803787309c1282">arm_math.h</a>
+, <a class="el" href="group__copy.html#ga94c51fe2e82560ade3803787309c1282">arm_copy_q31.c</a>
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-: <a class="el" href="group__copy.html#ga467579beda492aa92797529d794c88fb">arm_math.h</a>
-, <a class="el" href="group__copy.html#ga467579beda492aa92797529d794c88fb">arm_copy_q7.c</a>
+: <a class="el" href="group__copy.html#ga9b947e38172ae7e5de780bed13a404fe">arm_copy_q7.c</a>
+, <a class="el" href="group__copy.html#ga9b947e38172ae7e5de780bed13a404fe">arm_math.h</a>
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-, <a class="el" href="group__Corr.html#ga22021e4222773f01e9960358a531cfb8">arm_correlate_f32.c</a>
+: <a class="el" href="group__Corr.html#ga371054f6e5fd78bec668908251f1b2f2">arm_math.h</a>
+, <a class="el" href="group__Corr.html#ga371054f6e5fd78bec668908251f1b2f2">arm_correlate_f32.c</a>
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 <li>arm_correlate_fast_opt_q15()
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-, <a class="el" href="group__Corr.html#ga40a0236b17220e8e22a22b5bc1c53c6b">arm_correlate_fast_opt_q15.c</a>
+: <a class="el" href="group__Corr.html#ga3fc8d680844a3d24af25e45df96c82f3">arm_math.h</a>
+, <a class="el" href="group__Corr.html#ga3fc8d680844a3d24af25e45df96c82f3">arm_correlate_fast_opt_q15.c</a>
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-: <a class="el" href="group__Corr.html#gac8de3da44f58e86c2c86156276ca154f">arm_math.h</a>
-, <a class="el" href="group__Corr.html#gac8de3da44f58e86c2c86156276ca154f">arm_correlate_fast_q15.c</a>
+: <a class="el" href="group__Corr.html#gab4dea2049c8a26118ee4de9b90f1b9bd">arm_correlate_fast_q15.c</a>
+, <a class="el" href="group__Corr.html#gab4dea2049c8a26118ee4de9b90f1b9bd">arm_math.h</a>
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-: <a class="el" href="group__Corr.html#gabecd3d7b077dbbef43f93e9e037815ed">arm_math.h</a>
-, <a class="el" href="group__Corr.html#gabecd3d7b077dbbef43f93e9e037815ed">arm_correlate_fast_q31.c</a>
+: <a class="el" href="group__Corr.html#ga1e85a8ceac5c0f27007e6ba2c8f20686">arm_math.h</a>
+, <a class="el" href="group__Corr.html#ga1e85a8ceac5c0f27007e6ba2c8f20686">arm_correlate_fast_q31.c</a>
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-: <a class="el" href="group__Corr.html#gad71c0ec70ec69edbc48563d9a5f68451">arm_math.h</a>
-, <a class="el" href="group__Corr.html#gad71c0ec70ec69edbc48563d9a5f68451">arm_correlate_opt_q15.c</a>
+: <a class="el" href="group__Corr.html#ga3cfae563b16fa3be577cab5acf63aeea">arm_math.h</a>
+, <a class="el" href="group__Corr.html#ga3cfae563b16fa3be577cab5acf63aeea">arm_correlate_opt_q15.c</a>
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-: <a class="el" href="group__Corr.html#ga746e8857cafe33ec5d6780729c18c311">arm_correlate_opt_q7.c</a>
-, <a class="el" href="group__Corr.html#ga746e8857cafe33ec5d6780729c18c311">arm_math.h</a>
+: <a class="el" href="group__Corr.html#ga3c672e8ef8360c652d351097535f080d">arm_math.h</a>
+, <a class="el" href="group__Corr.html#ga3c672e8ef8360c652d351097535f080d">arm_correlate_opt_q7.c</a>
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-: <a class="el" href="group__Corr.html#ga5ec96b8e420d68b0e626df0812274d46">arm_math.h</a>
-, <a class="el" href="group__Corr.html#ga5ec96b8e420d68b0e626df0812274d46">arm_correlate_q15.c</a>
+: <a class="el" href="group__Corr.html#ga8fc4e632ab08b28435ff62e7eb65f508">arm_math.h</a>
+, <a class="el" href="group__Corr.html#ga8fc4e632ab08b28435ff62e7eb65f508">arm_correlate_q15.c</a>
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-: <a class="el" href="group__Corr.html#ga1367dc6c80476406c951e68d7fac4e8c">arm_correlate_q31.c</a>
-, <a class="el" href="group__Corr.html#ga1367dc6c80476406c951e68d7fac4e8c">arm_math.h</a>
+: <a class="el" href="group__Corr.html#ga9e8ad8bae8400dac2afc995d38594744">arm_math.h</a>
+, <a class="el" href="group__Corr.html#ga9e8ad8bae8400dac2afc995d38594744">arm_correlate_q31.c</a>
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-: <a class="el" href="group__Corr.html#ga284ddcc49e4ac532d52a70d0383c5992">arm_correlate_q7.c</a>
-, <a class="el" href="group__Corr.html#ga284ddcc49e4ac532d52a70d0383c5992">arm_math.h</a>
+: <a class="el" href="group__Corr.html#gab5d8acc830313be970de59c2d5a26c72">arm_math.h</a>
+, <a class="el" href="group__Corr.html#gab5d8acc830313be970de59c2d5a26c72">arm_correlate_q7.c</a>
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 : <a class="el" href="group__cos.html#gace15287f9c64b9b4084d1c797d4c49d8">arm_cos_f32.c</a>
 , <a class="el" href="group__cos.html#gace15287f9c64b9b4084d1c797d4c49d8">arm_math.h</a>
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-: <a class="el" href="group__cos.html#gadfd60c24def501638c0d5db20f4c869b">arm_math.h</a>
-, <a class="el" href="group__cos.html#gadfd60c24def501638c0d5db20f4c869b">arm_cos_q15.c</a>
+: <a class="el" href="group__cos.html#gadfd60c24def501638c0d5db20f4c869b">arm_cos_q15.c</a>
+, <a class="el" href="group__cos.html#gadfd60c24def501638c0d5db20f4c869b">arm_math.h</a>
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 : <a class="el" href="group__cos.html#gad80f121949ef885a77d83ab36e002567">arm_cos_q31.c</a>
 , <a class="el" href="group__cos.html#gad80f121949ef885a77d83ab36e002567">arm_math.h</a>
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 <li>clip_q31_to_q15()
-: <a class="el" href="arm__math_8h.html#a4604d1ebfef21e380c42fbe16b9724d1">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#a8648908e55b9fd8893b36eb7050e69a8">arm_math.h</a>
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-: <a class="el" href="arm__math_8h.html#af815ae1a72c9ef88b8ba0a4cb3b23eaa">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#afa69cfc57f04c36c2ba499525168fe0c">arm_math.h</a>
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 <li>clip_q63_to_q15()
-: <a class="el" href="arm__math_8h.html#a576c5c6286a37eb7f7ba1c5711a577a9">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#a027d446e8a72228f0a681779a7038a4e">arm_math.h</a>
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 <li>clip_q63_to_q31()
-: <a class="el" href="arm__math_8h.html#a9a94b78de0f083bd8fadf3c3abe40431">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#ad3a8d07983196592f6edca8f84aec7c7">arm_math.h</a>
+</li>
+<li>cmake_minimum_required()
+: <a class="el" href="Source_2CommonTables_2CMakeLists_8txt.html#ab2ff652a443e047ef6441f2eeaae8048">Source/CommonTables/CMakeLists.txt</a>
+, <a class="el" href="Source_2CMakeLists_8txt.html#a881c069b0c3dd34941126127656e23a1">Source/CMakeLists.txt</a>
+, <a class="el" href="Source_2FilteringFunctions_2CMakeLists_8txt.html#a459bd5973ca8abbfe2ffa2bd5ea5f0a8">Source/FilteringFunctions/CMakeLists.txt</a>
+, <a class="el" href="Examples_2ARM_2arm__variance__example_2CMakeLists_8txt.html#aacae80504fd1beabc4cd793b87cbe4e2">Examples/ARM/arm_variance_example/CMakeLists.txt</a>
+, <a class="el" href="Source_2TransformFunctions_2CMakeLists_8txt.html#ac12f00f4dcad3283ec1ce05fb627d05e">Source/TransformFunctions/CMakeLists.txt</a>
+, <a class="el" href="Source_2ControllerFunctions_2CMakeLists_8txt.html#a450cbc64f30b7f1182d8b66245ccd208">Source/ControllerFunctions/CMakeLists.txt</a>
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 <li>coeffTable
 : <a class="el" href="arm__graphic__equalizer__example__q31_8c.html#a024c59772b9603698b898721c1e8204e">arm_graphic_equalizer_example_q31.c</a>
@@ -654,40 +662,48 @@
 : <a class="el" href="arm__math_8h.html#aaff6d2358c4ada8de838a279254ab550">arm_math.h</a>
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 <li>cos_factors_128
-: <a class="el" href="group__DCT4__IDCT4__Table.html#ga16248ed86161ef97538011b49f13e8b7">arm_dct4_init_f32.c</a>
+: <a class="el" href="group__DCT4__IDCT4__Table.html#ga16248ed86161ef97538011b49f13e8b7">arm_common_tables.h</a>
+, <a class="el" href="group__DCT4__IDCT4__Table.html#ga16248ed86161ef97538011b49f13e8b7">arm_common_tables.c</a>
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-: <a class="el" href="group__DCT4__IDCT4__Table.html#ga1ba5306e0bc44730b40ab34cced45fd6">arm_dct4_init_f32.c</a>
+: <a class="el" href="group__DCT4__IDCT4__Table.html#ga1ba5306e0bc44730b40ab34cced45fd6">arm_common_tables.h</a>
+, <a class="el" href="group__DCT4__IDCT4__Table.html#ga1ba5306e0bc44730b40ab34cced45fd6">arm_common_tables.c</a>
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-: <a class="el" href="group__DCT4__IDCT4__Table.html#ga49fd288352ca5bb43f5cec52273b0d80">arm_dct4_init_f32.c</a>
+: <a class="el" href="group__DCT4__IDCT4__Table.html#ga49fd288352ca5bb43f5cec52273b0d80">arm_common_tables.c</a>
+, <a class="el" href="group__DCT4__IDCT4__Table.html#ga49fd288352ca5bb43f5cec52273b0d80">arm_common_tables.h</a>
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-: <a class="el" href="group__DCT4__IDCT4__Table.html#gac12484542bc6aaecc754c855457411de">arm_dct4_init_f32.c</a>
+: <a class="el" href="group__DCT4__IDCT4__Table.html#gac12484542bc6aaecc754c855457411de">arm_common_tables.h</a>
+, <a class="el" href="group__DCT4__IDCT4__Table.html#gac12484542bc6aaecc754c855457411de">arm_common_tables.c</a>
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-: <a class="el" href="group__DCT4__IDCT4__Table.html#ga1477edd21c7b08b0b59a564f6c24d6c5">arm_dct4_init_q15.c</a>
+: <a class="el" href="arm__common__tables_8h.html#a373f2b52659505b0bb5066cd6c8a9041">arm_common_tables.h</a>
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-: <a class="el" href="group__DCT4__IDCT4__Table.html#gaeee5df7c1be2374441868ecbbc6c7e5d">arm_dct4_init_q15.c</a>
+: <a class="el" href="arm__common__tables_8h.html#afd1bd60aa573ba5ee349a05aaa32d915">arm_common_tables.h</a>
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 <li>cos_factorsQ15_512
-: <a class="el" href="group__DCT4__IDCT4__Table.html#gac056c3d026058eab3ba650828ff5642f">arm_dct4_init_q15.c</a>
+: <a class="el" href="arm__common__tables_8h.html#af3a2b1f1c23720eed1c1fd380fcc43f9">arm_common_tables.h</a>
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-: <a class="el" href="group__DCT4__IDCT4__Table.html#ga988ff0563cc9df7848c9348871ac6c07">arm_dct4_init_q15.c</a>
+: <a class="el" href="arm__common__tables_8h.html#ac5e090785e32ca38103873d5cad0d813">arm_common_tables.h</a>
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-: <a class="el" href="group__DCT4__IDCT4__Table.html#gabb8ee2004a3520fd08388db637d43875">arm_dct4_init_q31.c</a>
+: <a class="el" href="group__DCT4__IDCT4__Table.html#gabb8ee2004a3520fd08388db637d43875">arm_common_tables.c</a>
+, <a class="el" href="group__DCT4__IDCT4__Table.html#gabb8ee2004a3520fd08388db637d43875">arm_common_tables.h</a>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/globals_d.html b/docs/DSP/html/globals_d.html
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--- a/docs/DSP/html/globals_d.html
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@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
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-, <a class="el" href="group__dot__prod.html#ga55418d4362f6ba84c327f9b4f089a8c3">arm_dot_prod_f32.c</a>
+: <a class="el" href="group__BasicDotProd.html#gadf26f6bc62d6416528663ad3e46fbf67">arm_math.h</a>
+, <a class="el" href="group__BasicDotProd.html#gadf26f6bc62d6416528663ad3e46fbf67">arm_dot_prod_f32.c</a>
 </li>
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-, <a class="el" href="group__dot__prod.html#ga436d5bed28a4b73b24acbde436a3044b">arm_dot_prod_q15.c</a>
+: <a class="el" href="group__BasicDotProd.html#gac2314012fbbf73bfd95ce8c57bc9ba69">arm_math.h</a>
+, <a class="el" href="group__BasicDotProd.html#gac2314012fbbf73bfd95ce8c57bc9ba69">arm_dot_prod_q15.c</a>
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 <li>arm_dot_prod_q31()
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-, <a class="el" href="group__dot__prod.html#gab15d8fa060fc85b4d948d091b7deaa11">arm_math.h</a>
+: <a class="el" href="group__BasicDotProd.html#gafe3f9ace6c4576847eabf44ed7ca7b96">arm_dot_prod_q31.c</a>
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-, <a class="el" href="group__dot__prod.html#ga9c3293a50ac7ec8ba928bf8e3aaea6c1">arm_math.h</a>
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+, <a class="el" href="group__BasicDotProd.html#gaadd347d5f5adf902c63f0b90ffc19538">arm_math.h</a>
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 <li>DELTA
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/globals_defs.html b/docs/DSP/html/globals_defs.html
index 8c1bba9..72cefa9 100644
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@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/globals_e.html b/docs/DSP/html/globals_e.html
index 44d5873..2739d78 100644
--- a/docs/DSP/html/globals_e.html
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@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/globals_enum.html b/docs/DSP/html/globals_enum.html
index 7cccddb..a435e82 100644
--- a/docs/DSP/html/globals_enum.html
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@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
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-   &#160;<span id="projectnumber">Version 1.5.2</span>
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   </td>
@@ -128,7 +128,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/globals_eval.html b/docs/DSP/html/globals_eval.html
index 6e557c5..17b5f2b 100644
--- a/docs/DSP/html/globals_eval.html
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@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
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-   &#160;<span id="projectnumber">Version 1.5.2</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -146,7 +146,7 @@
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/globals_f.html b/docs/DSP/html/globals_f.html
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--- a/docs/DSP/html/globals_f.html
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@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -164,156 +164,156 @@
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+: <a class="el" href="group__FIR__decimate.html#gab9402a0d9b0fffc0b50083a7d56c5905">arm_math.h</a>
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-, <a class="el" href="group__FIR__decimate.html#ga3f434c9a5d3b4e68061feac0714ea2ac">arm_math.h</a>
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+: <a class="el" href="group__FIR__decimate.html#gac03b837d289c8bc4a86a34a89e44afdf">arm_math.h</a>
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-, <a class="el" href="group__FIR__decimate.html#gaaa2524b08220fd6c3f753e692ffc7d3b">arm_fir_decimate_init_f32.c</a>
+: <a class="el" href="group__FIR__decimate.html#ga67c80582fc296552fef2bd1f208d853b">arm_math.h</a>
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+: <a class="el" href="group__FIR__decimate.html#ga3b01ec9df00d759f79c934b239cead73">arm_math.h</a>
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-, <a class="el" href="group__FIR__decimate.html#ga9ed47c4e0f58affa935d84e0508a7f39">arm_fir_decimate_init_q31.c</a>
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-, <a class="el" href="group__FIR.html#gae2a50f692f41ba57e44ed0719b1368bd">arm_fir_init_q15.c</a>
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+: <a class="el" href="group__FIR.html#gabd62c4543b243c25e315e7acb57f726c">arm_math.h</a>
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-, <a class="el" href="group__FIR__Interpolate.html#ga9cae104c5cf60b4e7671c82264a8c12e">arm_fir_interpolate_f32.c</a>
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-, <a class="el" href="group__FIR__Interpolate.html#ga0f857457a815946f7e4dca989ebf6ff6">arm_fir_interpolate_init_f32.c</a>
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-, <a class="el" href="group__FIR__Interpolate.html#ga18e8c4a74ff1d0f88876cc63f675288f">arm_fir_interpolate_init_q15.c</a>
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-, <a class="el" href="group__FIR__Interpolate.html#ga9d0ba38ce9f12a850dd242731d307476">arm_fir_interpolate_init_q31.c</a>
+: <a class="el" href="group__FIR__Interpolate.html#ga2f2288aa947fea3e8bcda3d5e01c1f6d">arm_math.h</a>
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+: <a class="el" href="group__FIR__Interpolate.html#ga026a02cda40616476e33b82e4eaf855d">arm_math.h</a>
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-, <a class="el" href="group__FIR__Interpolate.html#gaac9c0f01ed91c53f7083995d7411f5ee">arm_fir_interpolate_q31.c</a>
+: <a class="el" href="group__FIR__Interpolate.html#gadf65923ede13284c769b5621709e8135">arm_math.h</a>
+, <a class="el" href="group__FIR__Interpolate.html#gadf65923ede13284c769b5621709e8135">arm_fir_interpolate_q31.c</a>
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-, <a class="el" href="group__FIR__Lattice.html#gae63a45a63a11a65f2eae8b8b1fe370a8">arm_fir_lattice_f32.c</a>
+: <a class="el" href="group__FIR__Lattice.html#ga62053bf9d04f9f97ee5f4ef831533d68">arm_math.h</a>
+, <a class="el" href="group__FIR__Lattice.html#ga62053bf9d04f9f97ee5f4ef831533d68">arm_fir_lattice_f32.c</a>
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-, <a class="el" href="group__FIR__Lattice.html#ga86199a1590af2b8941c6532ee9d03229">arm_fir_lattice_init_f32.c</a>
+: <a class="el" href="group__FIR__Lattice.html#ga489e9fd4fed0037b5ed0947eaa12d68d">arm_math.h</a>
+, <a class="el" href="group__FIR__Lattice.html#ga489e9fd4fed0037b5ed0947eaa12d68d">arm_fir_lattice_init_f32.c</a>
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-, <a class="el" href="group__FIR__Lattice.html#ga1b22f30ce1cc19bf5a5d7c9fca154d72">arm_fir_lattice_init_q15.c</a>
+: <a class="el" href="group__FIR__Lattice.html#gae4657ac1025b5b4294fd4acc1e49e7f8">arm_math.h</a>
+, <a class="el" href="group__FIR__Lattice.html#gae4657ac1025b5b4294fd4acc1e49e7f8">arm_fir_lattice_init_q15.c</a>
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-, <a class="el" href="group__FIR__Lattice.html#gac05a17a0188bb851b58d19e572870a54">arm_fir_lattice_init_q31.c</a>
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+, <a class="el" href="group__FIR__Lattice.html#gaf7723f451f6d4cf2586bb4b63d2029cb">arm_fir_lattice_init_q31.c</a>
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-, <a class="el" href="group__FIR__Lattice.html#gabb0ab07fd313b4d863070c3ddca51542">arm_math.h</a>
+: <a class="el" href="group__FIR__Lattice.html#gafddb7fd49cb0e8a4b6d9546b58bf60fb">arm_fir_lattice_q15.c</a>
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-, <a class="el" href="group__FIR__Lattice.html#ga2e36fd210e4a1a5dd333ce80dd6d9a88">arm_fir_lattice_q31.c</a>
+: <a class="el" href="group__FIR__Lattice.html#ga9ae2b76a2a1625d00f902919d0fdea05">arm_math.h</a>
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-, <a class="el" href="group__FIR.html#ga262d173058d6f80fdf60404ba262a8f5">arm_fir_q15.c</a>
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+, <a class="el" href="group__FIR.html#gad9f84fdadbb59292592c7fac81adb09c">arm_fir_q15.c</a>
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-, <a class="el" href="group__FIR.html#gaadd938c68ab08967cbb5fc696f384bb5">arm_fir_q31.c</a>
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+, <a class="el" href="group__float__to__x.html#gac7696e64963e5051ebb950c88c6ba186">arm_math.h</a>
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@@ -143,74 +144,77 @@
 &#160;
 
 <h3><a class="anchor" id="index__"></a>- _ -</h3><ul>
+<li>__ALIGNED()
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-: <a class="el" href="arm__math_8h.html#a4690314b420f463093f1a2f68b5fb143">arm_math.h</a>
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 <li>__SHSAX()
-: <a class="el" href="arm__math_8h.html#abbfbf3cfac1971b4b380c0cde120a85b">arm_math.h</a>
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 </li>
 <li>__SHSUB16()
-: <a class="el" href="arm__math_8h.html#a0987d147320a596bbdb537d70b23de73">arm_math.h</a>
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 </li>
 <li>__SMLAD()
-: <a class="el" href="arm__math_8h.html#aa611fdbf6c56c46553701d6596a79aaf">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#ac2e3c09dbb7c8fe39d3edfa6cdd4a862">arm_math.h</a>
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-: <a class="el" href="arm__math_8h.html#a7fc670277db1ad9ac34d52d771c7c305">arm_math.h</a>
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-: <a class="el" href="arm__math_8h.html#a3bdab9022ab56e30f6346a043050dfc4">arm_math.h</a>
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-: <a class="el" href="arm__math_8h.html#a5d61b7d886888f9f1f35c079eb5d01c9">arm_math.h</a>
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-: <a class="el" href="arm__math_8h.html#a0162015f6d3458e2934a265481460ec4">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#a5a21d62839618246ef1383fc5531425b">arm_math.h</a>
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-: <a class="el" href="arm__math_8h.html#a2eed05660fedbe3fbd0b6dbb1315cfc3">arm_math.h</a>
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-: <a class="el" href="arm__math_8h.html#a9c58d7b4648a973d91e27544bc190e60">arm_math.h</a>
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 <li>__SMUSD()
-: <a class="el" href="arm__math_8h.html#a6b293f62ad7eb225fa9ce0f39458eba3">arm_math.h</a>
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 <li>__SMUSDX()
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/globals_func_a.html b/docs/DSP/html/globals_func_a.html
index fabf6d9..f241c4f 100644
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+++ b/docs/DSP/html/globals_func_a.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
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@@ -108,6 +108,7 @@
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       <li><a href="globals_func_v.html#index_v"><span>v</span></a></li>
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@@ -143,51 +144,54 @@
 &#160;
 
 <h3><a class="anchor" id="index_a"></a>- a -</h3><ul>
+<li>add_subdirectory()
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+</li>
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-, <a class="el" href="group__BasicAbs.html#gadc30985e33fbf96802a5a7954dece3b1">arm_math.h</a>
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@@ -195,7 +199,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/globals_func_b.html b/docs/DSP/html/globals_func_b.html
index 84a747c..57f07d6 100644
--- a/docs/DSP/html/globals_func_b.html
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   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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       <li><a href="globals_func_v.html#index_v"><span>v</span></a></li>
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@@ -144,103 +145,105 @@
 
 <h3><a class="anchor" id="index_b"></a>- b -</h3><ul>
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-: <a class="el" href="group__BilinearInterpolate.html#gaba67d2ba2acbd428832f106de29b8627">arm_math.h</a>
+: <a class="el" href="group__BilinearInterpolate.html#ga887756dbbe013d0a15b987836a787677">arm_math.h</a>
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-: <a class="el" href="group__BilinearInterpolate.html#ga79d374eda5d39e220b0423ba3cb90c6e">arm_math.h</a>
+: <a class="el" href="group__BilinearInterpolate.html#gaefe4731017e8b9ac652e5fea57cb1fa5">arm_math.h</a>
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-: <a class="el" href="group__BilinearInterpolate.html#ga0a986d4a01039914a9d6e81e9a4ccda0">arm_math.h</a>
+: <a class="el" href="group__BilinearInterpolate.html#ga1230bb062f6d8614db10b37ba7c9a161">arm_math.h</a>
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-, <a class="el" href="group__BiquadCascadeDF1.html#ga8e73b69a788e681a61bccc8959d823c5">arm_math.h</a>
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+, <a class="el" href="group__BiquadCascadeDF1.html#gad0b680d1c529d941e939d265b3c6ae59">arm_math.h</a>
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-, <a class="el" href="group__BiquadCascadeDF1.html#gad54c724132f6d742a444eb6df0e9c731">arm_biquad_cascade_df1_init_q15.c</a>
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+, <a class="el" href="group__BiquadCascadeDF1.html#ga1115256c79a0e22a3a54f8e627ac256f">arm_biquad_cascade_df1_init_q15.c</a>
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-, <a class="el" href="group__BiquadCascadeDF1.html#gaf42a44f9b16d61e636418c83eefe577b">arm_biquad_cascade_df1_init_q31.c</a>
+: <a class="el" href="group__BiquadCascadeDF1.html#ga5563b156af44d1be2a7548626988bf4e">arm_math.h</a>
+, <a class="el" href="group__BiquadCascadeDF1.html#ga5563b156af44d1be2a7548626988bf4e">arm_biquad_cascade_df1_init_q31.c</a>
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 <li>arm_biquad_cascade_df1_q15()
-: <a class="el" href="group__BiquadCascadeDF1.html#gadd66a0aefdc645031d607b0a5b37a942">arm_math.h</a>
-, <a class="el" href="group__BiquadCascadeDF1.html#gadd66a0aefdc645031d607b0a5b37a942">arm_biquad_cascade_df1_q15.c</a>
+: <a class="el" href="group__BiquadCascadeDF1.html#ga27af5bfa40dad7c877e48eedc8d67558">arm_math.h</a>
+, <a class="el" href="group__BiquadCascadeDF1.html#ga27af5bfa40dad7c877e48eedc8d67558">arm_biquad_cascade_df1_q15.c</a>
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-, <a class="el" href="group__BiquadCascadeDF1.html#ga27b0c54da702713976e5202d20b4473f">arm_biquad_cascade_df1_q31.c</a>
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 <li>arm_biquad_cascade_df2T_f32()
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-, <a class="el" href="group__BiquadCascadeDF2T.html#ga114f373fbc16a314e9f293c7c7649c7f">arm_biquad_cascade_df2T_f32.c</a>
+: <a class="el" href="group__BiquadCascadeDF2T.html#gaecf9b22907e89fc35f097b50589cf86a">arm_math.h</a>
+, <a class="el" href="group__BiquadCascadeDF2T.html#gaecf9b22907e89fc35f097b50589cf86a">arm_biquad_cascade_df2T_f32.c</a>
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 <li>arm_biquad_cascade_df2T_f64()
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 , <a class="el" href="group__BiquadCascadeDF2T.html#gaa8735dda5f3f36d0936283794c2aa771">arm_biquad_cascade_df2T_f64.c</a>
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 <li>arm_biquad_cascade_df2T_init_f32()
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-, <a class="el" href="group__BiquadCascadeDF2T.html#ga70eaddf317a4a8bde6bd6a97df67fedd">arm_biquad_cascade_df2T_init_f32.c</a>
+: <a class="el" href="group__BiquadCascadeDF2T.html#gafd8b4068de567e9012e444f1c2320e1c">arm_math.h</a>
+, <a class="el" href="group__BiquadCascadeDF2T.html#gafd8b4068de567e9012e444f1c2320e1c">arm_biquad_cascade_df2T_init_f32.c</a>
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 <li>arm_biquad_cascade_df2T_init_f64()
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 <li>arm_bitreversal_16()
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+, <a class="el" href="arm__bitreversal2_8c.html#af39358a8b7645d00180115d5009db286">arm_bitreversal2.c</a>
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-: <a class="el" href="arm__bitreversal_8c.html#a3d4062fdfa6aaa3f51f41cab868e508b">arm_bitreversal.c</a>
-, <a class="el" href="arm__cfft__radix2__f32_8c.html#a3d4062fdfa6aaa3f51f41cab868e508b">arm_cfft_radix2_f32.c</a>
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-, <a class="el" href="arm__rfft__f32_8c.html#a3d4062fdfa6aaa3f51f41cab868e508b">arm_rfft_f32.c</a>
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+, <a class="el" href="arm__bitreversal_8c.html#a81008b023cbc9d37b3ff849877d1eb52">arm_bitreversal.c</a>
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 <li>arm_bitreversal_q15()
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-, <a class="el" href="arm__cfft__radix4__q15_8c.html#a73f48eaea9297605705ae25d3405343e">arm_cfft_radix4_q15.c</a>
-, <a class="el" href="arm__bitreversal_8c.html#a12a07b49948c354172ae07358309a4a5">arm_bitreversal.c</a>
+: <a class="el" href="arm__bitreversal_8c.html#aca90e3648bb9032de822180ab177f90c">arm_bitreversal.c</a>
+, <a class="el" href="arm__cfft__radix4__q15_8c.html#a192ac22646c129779db528f2f322300d">arm_cfft_radix4_q15.c</a>
+, <a class="el" href="arm__cfft__radix2__q15_8c.html#a192ac22646c129779db528f2f322300d">arm_cfft_radix2_q15.c</a>
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-: <a class="el" href="arm__cfft__radix4__q31_8c.html#a3fab577d25c3a517973c8c214f66f268">arm_cfft_radix4_q31.c</a>
-, <a class="el" href="arm__cfft__radix2__q31_8c.html#a3fab577d25c3a517973c8c214f66f268">arm_cfft_radix2_q31.c</a>
-, <a class="el" href="arm__bitreversal_8c.html#a27618705158b5c42db5fb0a381f8efc1">arm_bitreversal.c</a>
+: <a class="el" href="arm__cfft__radix4__q31_8c.html#a82acdff1d26c7021c2a016a6e7e9eaf8">arm_cfft_radix4_q31.c</a>
+, <a class="el" href="arm__cfft__radix2__q31_8c.html#a82acdff1d26c7021c2a016a6e7e9eaf8">arm_cfft_radix2_q31.c</a>
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@@ -248,7 +251,7 @@
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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 </li>
 <li>arm_circularRead_f32()
-: <a class="el" href="arm__math_8h.html#af4d2359037b7360329ef9dd6836d1353">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#aa0e8f158699a65e023960d555274ad39">arm_math.h</a>
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 <li>arm_cmplx_mag_q31()
-: <a class="el" href="group__cmplx__mag.html#ga14f82f9230e9d96d5b9774e2fefcb7be">arm_math.h</a>
-, <a class="el" href="group__cmplx__mag.html#ga14f82f9230e9d96d5b9774e2fefcb7be">arm_cmplx_mag_q31.c</a>
+: <a class="el" href="group__cmplx__mag.html#gab69ad9237469565958cce6b4555bbb6e">arm_math.h</a>
+, <a class="el" href="group__cmplx__mag.html#gab69ad9237469565958cce6b4555bbb6e">arm_cmplx_mag_q31.c</a>
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 <li>arm_cmplx_mag_squared_f32()
-: <a class="el" href="group__cmplx__mag__squared.html#gaa7faccc0d96b061d8b7d0d7d82045074">arm_math.h</a>
-, <a class="el" href="group__cmplx__mag__squared.html#gaa7faccc0d96b061d8b7d0d7d82045074">arm_cmplx_mag_squared_f32.c</a>
+: <a class="el" href="group__cmplx__mag__squared.html#ga925ef5458a384f63d06f1c6997d1fb7d">arm_math.h</a>
+, <a class="el" href="group__cmplx__mag__squared.html#ga925ef5458a384f63d06f1c6997d1fb7d">arm_cmplx_mag_squared_f32.c</a>
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 <li>arm_cmplx_mag_squared_q15()
-: <a class="el" href="group__cmplx__mag__squared.html#ga45537f576102d960d467eb722b8431f2">arm_math.h</a>
-, <a class="el" href="group__cmplx__mag__squared.html#ga45537f576102d960d467eb722b8431f2">arm_cmplx_mag_squared_q15.c</a>
+: <a class="el" href="group__cmplx__mag__squared.html#gafdd1e838db0aef7ec201611883bd444c">arm_math.h</a>
+, <a class="el" href="group__cmplx__mag__squared.html#gafdd1e838db0aef7ec201611883bd444c">arm_cmplx_mag_squared_q15.c</a>
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 <li>arm_cmplx_mag_squared_q31()
-: <a class="el" href="group__cmplx__mag__squared.html#ga384b0538101e8c03fa4fa14271e63b04">arm_math.h</a>
-, <a class="el" href="group__cmplx__mag__squared.html#ga384b0538101e8c03fa4fa14271e63b04">arm_cmplx_mag_squared_q31.c</a>
+: <a class="el" href="group__cmplx__mag__squared.html#ga9d74dbc0a777cfcc75c1cae33ef4d44a">arm_math.h</a>
+, <a class="el" href="group__cmplx__mag__squared.html#ga9d74dbc0a777cfcc75c1cae33ef4d44a">arm_cmplx_mag_squared_q31.c</a>
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 <li>arm_cmplx_mult_cmplx_f32()
-: <a class="el" href="group__CmplxByCmplxMult.html#ga14b47080054a1ba1250a86805be1ff6b">arm_math.h</a>
-, <a class="el" href="group__CmplxByCmplxMult.html#ga14b47080054a1ba1250a86805be1ff6b">arm_cmplx_mult_cmplx_f32.c</a>
+: <a class="el" href="group__CmplxByCmplxMult.html#gae221504b01e4abfe5f335eafd801b4ed">arm_math.h</a>
+, <a class="el" href="group__CmplxByCmplxMult.html#gae221504b01e4abfe5f335eafd801b4ed">arm_cmplx_mult_cmplx_f32.c</a>
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 <li>arm_cmplx_mult_cmplx_q15()
-: <a class="el" href="group__CmplxByCmplxMult.html#ga67e96abfc9c3e30efb70a2ec9d0fe7e8">arm_math.h</a>
-, <a class="el" href="group__CmplxByCmplxMult.html#ga67e96abfc9c3e30efb70a2ec9d0fe7e8">arm_cmplx_mult_cmplx_q15.c</a>
+: <a class="el" href="group__CmplxByCmplxMult.html#ga683b32a91cffbf021f58ace5a62904e8">arm_math.h</a>
+, <a class="el" href="group__CmplxByCmplxMult.html#ga683b32a91cffbf021f58ace5a62904e8">arm_cmplx_mult_cmplx_q15.c</a>
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 <li>arm_cmplx_mult_cmplx_q31()
-: <a class="el" href="group__CmplxByCmplxMult.html#ga1829e50993a90742de225a0ce4213838">arm_math.h</a>
-, <a class="el" href="group__CmplxByCmplxMult.html#ga1829e50993a90742de225a0ce4213838">arm_cmplx_mult_cmplx_q31.c</a>
+: <a class="el" href="group__CmplxByCmplxMult.html#ga7748c92e0922cf14e3d7bb257d77593f">arm_math.h</a>
+, <a class="el" href="group__CmplxByCmplxMult.html#ga7748c92e0922cf14e3d7bb257d77593f">arm_cmplx_mult_cmplx_q31.c</a>
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 <li>arm_cmplx_mult_real_f32()
-: <a class="el" href="group__CmplxByRealMult.html#ga9c18616f56cb4d3c0889ce0b339221ca">arm_math.h</a>
-, <a class="el" href="group__CmplxByRealMult.html#ga9c18616f56cb4d3c0889ce0b339221ca">arm_cmplx_mult_real_f32.c</a>
+: <a class="el" href="group__CmplxByRealMult.html#ga903eb30a02343574e46cb123b52232f4">arm_math.h</a>
+, <a class="el" href="group__CmplxByRealMult.html#ga903eb30a02343574e46cb123b52232f4">arm_cmplx_mult_real_f32.c</a>
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 <li>arm_cmplx_mult_real_q15()
-: <a class="el" href="group__CmplxByRealMult.html#ga3bd8889dcb45980e1d3e53344df54e85">arm_math.h</a>
-, <a class="el" href="group__CmplxByRealMult.html#ga3bd8889dcb45980e1d3e53344df54e85">arm_cmplx_mult_real_q15.c</a>
+: <a class="el" href="group__CmplxByRealMult.html#gaa41d60a567652bf6a783b916931bf20b">arm_math.h</a>
+, <a class="el" href="group__CmplxByRealMult.html#gaa41d60a567652bf6a783b916931bf20b">arm_cmplx_mult_real_q15.c</a>
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-: <a class="el" href="group__CmplxByRealMult.html#ga715e4bb8e945b8ca51ec5237611697ce">arm_math.h</a>
-, <a class="el" href="group__CmplxByRealMult.html#ga715e4bb8e945b8ca51ec5237611697ce">arm_cmplx_mult_real_q31.c</a>
+: <a class="el" href="group__CmplxByRealMult.html#ga0fe1cd71d35b4481f8ab69d502c96ace">arm_math.h</a>
+, <a class="el" href="group__CmplxByRealMult.html#ga0fe1cd71d35b4481f8ab69d502c96ace">arm_cmplx_mult_real_q31.c</a>
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-: <a class="el" href="arm__fir__example_2math__helper_8c.html#a64d5207c035db13cddde479317dd131e">arm_fir_example/math_helper.c</a>
-, <a class="el" href="arm__linear__interp__example_2math__helper_8h.html#a64d5207c035db13cddde479317dd131e">arm_linear_interp_example/math_helper.h</a>
-, <a class="el" href="arm__matrix__example_2math__helper_8c.html#a64d5207c035db13cddde479317dd131e">arm_matrix_example/math_helper.c</a>
-, <a class="el" href="arm__matrix__example_2math__helper_8h.html#a64d5207c035db13cddde479317dd131e">arm_matrix_example/math_helper.h</a>
-, <a class="el" href="arm__signal__converge__example_2math__helper_8c.html#a64d5207c035db13cddde479317dd131e">arm_signal_converge_example/math_helper.c</a>
-, <a class="el" href="arm__signal__converge__example_2math__helper_8h.html#a64d5207c035db13cddde479317dd131e">arm_signal_converge_example/math_helper.h</a>
-, <a class="el" href="arm__linear__interp__example_2math__helper_8c.html#a64d5207c035db13cddde479317dd131e">arm_linear_interp_example/math_helper.c</a>
-, <a class="el" href="arm__convolution__example_2math__helper_8c.html#a64d5207c035db13cddde479317dd131e">arm_convolution_example/math_helper.c</a>
+: <a class="el" href="arm__matrix__example_2math__helper_8c.html#a64d5207c035db13cddde479317dd131e">arm_matrix_example/math_helper.c</a>
 , <a class="el" href="arm__convolution__example_2math__helper_8h.html#a64d5207c035db13cddde479317dd131e">arm_convolution_example/math_helper.h</a>
+, <a class="el" href="arm__fir__example_2math__helper_8c.html#a64d5207c035db13cddde479317dd131e">arm_fir_example/math_helper.c</a>
 , <a class="el" href="arm__fir__example_2math__helper_8h.html#a64d5207c035db13cddde479317dd131e">arm_fir_example/math_helper.h</a>
 , <a class="el" href="arm__graphic__equalizer__example_2math__helper_8c.html#a64d5207c035db13cddde479317dd131e">arm_graphic_equalizer_example/math_helper.c</a>
 , <a class="el" href="arm__graphic__equalizer__example_2math__helper_8h.html#a64d5207c035db13cddde479317dd131e">arm_graphic_equalizer_example/math_helper.h</a>
+, <a class="el" href="arm__linear__interp__example_2math__helper_8c.html#a64d5207c035db13cddde479317dd131e">arm_linear_interp_example/math_helper.c</a>
+, <a class="el" href="arm__linear__interp__example_2math__helper_8h.html#a64d5207c035db13cddde479317dd131e">arm_linear_interp_example/math_helper.h</a>
+, <a class="el" href="arm__matrix__example_2math__helper_8h.html#a64d5207c035db13cddde479317dd131e">arm_matrix_example/math_helper.h</a>
+, <a class="el" href="arm__signal__converge__example_2math__helper_8c.html#a64d5207c035db13cddde479317dd131e">arm_signal_converge_example/math_helper.c</a>
+, <a class="el" href="arm__signal__converge__example_2math__helper_8h.html#a64d5207c035db13cddde479317dd131e">arm_signal_converge_example/math_helper.h</a>
+, <a class="el" href="arm__convolution__example_2math__helper_8c.html#a64d5207c035db13cddde479317dd131e">arm_convolution_example/math_helper.c</a>
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 <li>arm_compare_fixed_q31()
-: <a class="el" href="arm__convolution__example_2math__helper_8c.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_convolution_example/math_helper.c</a>
-, <a class="el" href="arm__convolution__example_2math__helper_8h.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_convolution_example/math_helper.h</a>
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+, <a class="el" href="arm__fir__example_2math__helper_8c.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_fir_example/math_helper.c</a>
 , <a class="el" href="arm__fir__example_2math__helper_8h.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_fir_example/math_helper.h</a>
 , <a class="el" href="arm__graphic__equalizer__example_2math__helper_8c.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_graphic_equalizer_example/math_helper.c</a>
 , <a class="el" href="arm__graphic__equalizer__example_2math__helper_8h.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_graphic_equalizer_example/math_helper.h</a>
+, <a class="el" href="arm__linear__interp__example_2math__helper_8c.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_linear_interp_example/math_helper.c</a>
 , <a class="el" href="arm__linear__interp__example_2math__helper_8h.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_linear_interp_example/math_helper.h</a>
-, <a class="el" href="arm__matrix__example_2math__helper_8c.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_matrix_example/math_helper.c</a>
+, <a class="el" href="arm__signal__converge__example_2math__helper_8c.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_signal_converge_example/math_helper.c</a>
 , <a class="el" href="arm__matrix__example_2math__helper_8h.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_matrix_example/math_helper.h</a>
 , <a class="el" href="arm__signal__converge__example_2math__helper_8h.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_signal_converge_example/math_helper.h</a>
-, <a class="el" href="arm__signal__converge__example_2math__helper_8c.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_signal_converge_example/math_helper.c</a>
-, <a class="el" href="arm__linear__interp__example_2math__helper_8c.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_linear_interp_example/math_helper.c</a>
-, <a class="el" href="arm__fir__example_2math__helper_8c.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_fir_example/math_helper.c</a>
+, <a class="el" href="arm__matrix__example_2math__helper_8c.html#a32f9f3d19e53161382c5bd39e3df50fb">arm_matrix_example/math_helper.c</a>
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-, <a class="el" href="group__Conv.html#ga3f860dc98c6fc4cafc421e4a2aed3c89">arm_conv_f32.c</a>
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+, <a class="el" href="group__Conv.html#ga2e977f76e873bd47c6c41c7d940fdf7e">arm_conv_f32.c</a>
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 <li>arm_conv_fast_opt_q15()
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-, <a class="el" href="group__Conv.html#gaf16f490d245391ec18a42adc73d6d749">arm_math.h</a>
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+, <a class="el" href="group__Conv.html#ga8ecd292b8e74c8f05b208e7948d05a90">arm_math.h</a>
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-: <a class="el" href="group__Conv.html#gad75ca978ce906e04abdf86a8d76306d4">arm_conv_fast_q15.c</a>
-, <a class="el" href="group__Conv.html#gad75ca978ce906e04abdf86a8d76306d4">arm_math.h</a>
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-: <a class="el" href="group__Conv.html#ga51112dcdf9b3624eb05182cdc4da9ec0">arm_conv_fast_q31.c</a>
-, <a class="el" href="group__Conv.html#ga51112dcdf9b3624eb05182cdc4da9ec0">arm_math.h</a>
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 <li>arm_conv_opt_q15()
-: <a class="el" href="group__Conv.html#gac77dbcaef5c754cac27eab96c4753a3c">arm_conv_opt_q15.c</a>
-, <a class="el" href="group__Conv.html#gac77dbcaef5c754cac27eab96c4753a3c">arm_math.h</a>
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 <li>arm_conv_opt_q7()
-: <a class="el" href="group__Conv.html#ga4c7cf073e89d6d57cc4e711f078c3f68">arm_conv_opt_q7.c</a>
-, <a class="el" href="group__Conv.html#ga4c7cf073e89d6d57cc4e711f078c3f68">arm_math.h</a>
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-: <a class="el" href="group__PartialConv.html#ga16d10f32072cd79fc5fb6e785df45f5e">arm_conv_partial_f32.c</a>
-, <a class="el" href="group__PartialConv.html#ga16d10f32072cd79fc5fb6e785df45f5e">arm_math.h</a>
+: <a class="el" href="group__PartialConv.html#ga4e65902884d148ebcbecc260e0dffdd9">arm_conv_partial_f32.c</a>
+, <a class="el" href="group__PartialConv.html#ga4e65902884d148ebcbecc260e0dffdd9">arm_math.h</a>
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-, <a class="el" href="group__PartialConv.html#ga3de9c4ddcc7886de25b70d875099a8d9">arm_math.h</a>
+: <a class="el" href="group__PartialConv.html#ga0cdb871f952b8c1305342ae499affa41">arm_math.h</a>
+, <a class="el" href="group__PartialConv.html#ga0cdb871f952b8c1305342ae499affa41">arm_conv_partial_fast_opt_q15.c</a>
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-: <a class="el" href="group__PartialConv.html#ga1e4d43385cb62262a78c6752fe1fafb2">arm_math.h</a>
-, <a class="el" href="group__PartialConv.html#ga1e4d43385cb62262a78c6752fe1fafb2">arm_conv_partial_fast_q15.c</a>
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+, <a class="el" href="group__PartialConv.html#ga30eb5ce84581f2d0532a17cdf8a20fc5">arm_math.h</a>
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-: <a class="el" href="group__PartialConv.html#ga10c5294cda8c4985386f4e3944be7650">arm_conv_partial_fast_q31.c</a>
-, <a class="el" href="group__PartialConv.html#ga10c5294cda8c4985386f4e3944be7650">arm_math.h</a>
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+, <a class="el" href="group__PartialConv.html#gaaf207e31aa081cea624713aec65d0e77">arm_math.h</a>
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-: <a class="el" href="group__PartialConv.html#ga834b23b4ade8682beeb55778399101f8">arm_conv_partial_opt_q15.c</a>
-, <a class="el" href="group__PartialConv.html#ga834b23b4ade8682beeb55778399101f8">arm_math.h</a>
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-: <a class="el" href="group__PartialConv.html#ga3707e16af1435b215840006a7ab0c98f">arm_math.h</a>
-, <a class="el" href="group__PartialConv.html#ga3707e16af1435b215840006a7ab0c98f">arm_conv_partial_opt_q7.c</a>
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+, <a class="el" href="group__PartialConv.html#gadfc0cd0290793c790ccaa1c73eda0694">arm_math.h</a>
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-: <a class="el" href="group__PartialConv.html#ga209a2a913a0c5e5679c5988da8f46b03">arm_conv_partial_q15.c</a>
-, <a class="el" href="group__PartialConv.html#ga209a2a913a0c5e5679c5988da8f46b03">arm_math.h</a>
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 <li>arm_conv_partial_q31()
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-, <a class="el" href="group__PartialConv.html#ga78e73a5f02d103168a09821fb461e77a">arm_math.h</a>
+: <a class="el" href="group__PartialConv.html#gadc48f14ae5ca8bf4b026916db0765afa">arm_conv_partial_q31.c</a>
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-, <a class="el" href="group__PartialConv.html#ga8567259fe18396dd972242c41741ebf4">arm_conv_partial_q7.c</a>
+: <a class="el" href="group__PartialConv.html#gaa1bf3428dbe6beb5c9957bff0d00fa19">arm_math.h</a>
+, <a class="el" href="group__PartialConv.html#gaa1bf3428dbe6beb5c9957bff0d00fa19">arm_conv_partial_q7.c</a>
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 <li>arm_conv_q15()
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-, <a class="el" href="group__Conv.html#gaccd6a89b0ff7a94df64610598e6e6893">arm_math.h</a>
+: <a class="el" href="group__Conv.html#ga372d3fd79b107dc6b12163a00c22da18">arm_conv_q15.c</a>
+, <a class="el" href="group__Conv.html#ga372d3fd79b107dc6b12163a00c22da18">arm_math.h</a>
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 <li>arm_conv_q31()
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-, <a class="el" href="group__Conv.html#ga946b58da734f1e4e78c91fcaab4b12b6">arm_conv_q31.c</a>
+: <a class="el" href="group__Conv.html#ga08ce299fb5c3329505cb8ce4bf4f6e06">arm_conv_q31.c</a>
+, <a class="el" href="group__Conv.html#ga08ce299fb5c3329505cb8ce4bf4f6e06">arm_math.h</a>
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-, <a class="el" href="group__Conv.html#gae2070cb792a167e78dbad8d06b97cdab">arm_math.h</a>
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-, <a class="el" href="group__copy.html#gadd1f737e677e0e6ca31767c7001417b3">arm_copy_f32.c</a>
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+, <a class="el" href="group__copy.html#gaa6dfe9554ca61eb3d1eee498396bce88">arm_copy_f32.c</a>
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-, <a class="el" href="group__copy.html#ga872ca4cfc18c680b8991ccd569a5fda0">arm_copy_q15.c</a>
+: <a class="el" href="group__copy.html#gaeb9e8c16ec7fe1235e5610142400f15f">arm_math.h</a>
+, <a class="el" href="group__copy.html#gaeb9e8c16ec7fe1235e5610142400f15f">arm_copy_q15.c</a>
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-, <a class="el" href="group__copy.html#gaddf70be7e3f87e535c324862b501f3f9">arm_math.h</a>
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+, <a class="el" href="group__copy.html#ga94c51fe2e82560ade3803787309c1282">arm_math.h</a>
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-, <a class="el" href="group__copy.html#ga467579beda492aa92797529d794c88fb">arm_math.h</a>
+: <a class="el" href="group__copy.html#ga9b947e38172ae7e5de780bed13a404fe">arm_copy_q7.c</a>
+, <a class="el" href="group__copy.html#ga9b947e38172ae7e5de780bed13a404fe">arm_math.h</a>
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+: <a class="el" href="group__Corr.html#ga371054f6e5fd78bec668908251f1b2f2">arm_correlate_f32.c</a>
+, <a class="el" href="group__Corr.html#ga371054f6e5fd78bec668908251f1b2f2">arm_math.h</a>
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 <li>arm_correlate_fast_opt_q15()
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-, <a class="el" href="group__Corr.html#ga40a0236b17220e8e22a22b5bc1c53c6b">arm_correlate_fast_opt_q15.c</a>
+: <a class="el" href="group__Corr.html#ga3fc8d680844a3d24af25e45df96c82f3">arm_correlate_fast_opt_q15.c</a>
+, <a class="el" href="group__Corr.html#ga3fc8d680844a3d24af25e45df96c82f3">arm_math.h</a>
 </li>
 <li>arm_correlate_fast_q15()
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-, <a class="el" href="group__Corr.html#gac8de3da44f58e86c2c86156276ca154f">arm_correlate_fast_q15.c</a>
+: <a class="el" href="group__Corr.html#gab4dea2049c8a26118ee4de9b90f1b9bd">arm_correlate_fast_q15.c</a>
+, <a class="el" href="group__Corr.html#gab4dea2049c8a26118ee4de9b90f1b9bd">arm_math.h</a>
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-, <a class="el" href="group__Corr.html#gabecd3d7b077dbbef43f93e9e037815ed">arm_math.h</a>
+: <a class="el" href="group__Corr.html#ga1e85a8ceac5c0f27007e6ba2c8f20686">arm_correlate_fast_q31.c</a>
+, <a class="el" href="group__Corr.html#ga1e85a8ceac5c0f27007e6ba2c8f20686">arm_math.h</a>
 </li>
 <li>arm_correlate_opt_q15()
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-, <a class="el" href="group__Corr.html#gad71c0ec70ec69edbc48563d9a5f68451">arm_math.h</a>
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+, <a class="el" href="group__Corr.html#ga3cfae563b16fa3be577cab5acf63aeea">arm_correlate_opt_q15.c</a>
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 <li>arm_correlate_opt_q7()
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-, <a class="el" href="group__Corr.html#ga746e8857cafe33ec5d6780729c18c311">arm_math.h</a>
+: <a class="el" href="group__Corr.html#ga3c672e8ef8360c652d351097535f080d">arm_math.h</a>
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-, <a class="el" href="group__Corr.html#ga5ec96b8e420d68b0e626df0812274d46">arm_correlate_q15.c</a>
+: <a class="el" href="group__Corr.html#ga8fc4e632ab08b28435ff62e7eb65f508">arm_correlate_q15.c</a>
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+: <a class="el" href="group__Corr.html#ga9e8ad8bae8400dac2afc995d38594744">arm_correlate_q31.c</a>
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-, <a class="el" href="group__Corr.html#ga284ddcc49e4ac532d52a70d0383c5992">arm_math.h</a>
+: <a class="el" href="group__Corr.html#gab5d8acc830313be970de59c2d5a26c72">arm_correlate_q7.c</a>
+, <a class="el" href="group__Corr.html#gab5d8acc830313be970de59c2d5a26c72">arm_math.h</a>
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 <li>arm_cos_f32()
-: <a class="el" href="group__cos.html#gace15287f9c64b9b4084d1c797d4c49d8">arm_math.h</a>
-, <a class="el" href="group__cos.html#gace15287f9c64b9b4084d1c797d4c49d8">arm_cos_f32.c</a>
+: <a class="el" href="group__cos.html#gace15287f9c64b9b4084d1c797d4c49d8">arm_cos_f32.c</a>
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 <li>clip_q31_to_q15()
-: <a class="el" href="arm__math_8h.html#a4604d1ebfef21e380c42fbe16b9724d1">arm_math.h</a>
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-: <a class="el" href="arm__math_8h.html#af815ae1a72c9ef88b8ba0a4cb3b23eaa">arm_math.h</a>
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-: <a class="el" href="arm__math_8h.html#a576c5c6286a37eb7f7ba1c5711a577a9">arm_math.h</a>
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+: <a class="el" href="arm__math_8h.html#ad3a8d07983196592f6edca8f84aec7c7">arm_math.h</a>
+</li>
+<li>cmake_minimum_required()
+: <a class="el" href="Source_2CommonTables_2CMakeLists_8txt.html#ab2ff652a443e047ef6441f2eeaae8048">Source/CommonTables/CMakeLists.txt</a>
+, <a class="el" href="Source_2FilteringFunctions_2CMakeLists_8txt.html#a459bd5973ca8abbfe2ffa2bd5ea5f0a8">Source/FilteringFunctions/CMakeLists.txt</a>
+, <a class="el" href="Source_2ControllerFunctions_2CMakeLists_8txt.html#a450cbc64f30b7f1182d8b66245ccd208">Source/ControllerFunctions/CMakeLists.txt</a>
+, <a class="el" href="Source_2CMakeLists_8txt.html#a881c069b0c3dd34941126127656e23a1">Source/CMakeLists.txt</a>
+, <a class="el" href="Examples_2ARM_2arm__variance__example_2CMakeLists_8txt.html#aacae80504fd1beabc4cd793b87cbe4e2">Examples/ARM/arm_variance_example/CMakeLists.txt</a>
+, <a class="el" href="Source_2TransformFunctions_2CMakeLists_8txt.html#ac12f00f4dcad3283ec1ce05fb627d05e">Source/TransformFunctions/CMakeLists.txt</a>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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+      <li><a href="globals_func_w.html#index_w"><span>w</span></a></li>
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-, <a class="el" href="group__dot__prod.html#ga55418d4362f6ba84c327f9b4f089a8c3">arm_dot_prod_f32.c</a>
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+, <a class="el" href="group__BasicDotProd.html#gadf26f6bc62d6416528663ad3e46fbf67">arm_dot_prod_f32.c</a>
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-, <a class="el" href="group__dot__prod.html#ga436d5bed28a4b73b24acbde436a3044b">arm_dot_prod_q15.c</a>
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-, <a class="el" href="group__dot__prod.html#gab15d8fa060fc85b4d948d091b7deaa11">arm_math.h</a>
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-, <a class="el" href="group__dot__prod.html#ga9c3293a50ac7ec8ba928bf8e3aaea6c1">arm_math.h</a>
+: <a class="el" href="group__BasicDotProd.html#gaadd347d5f5adf902c63f0b90ffc19538">arm_dot_prod_q7.c</a>
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@@ -189,7 +190,7 @@
 <!-- start footer part -->
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/globals_func_f.html b/docs/DSP/html/globals_func_f.html
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
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+      <li><a href="globals_func_w.html#index_w"><span>w</span></a></li>
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@@ -160,156 +161,156 @@
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-, <a class="el" href="group__FIR__decimate.html#ga25aa3d58a90bf91b6a82272a0bc518f7">arm_fir_decimate_f32.c</a>
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 <li>arm_fir_decimate_fast_q15()
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-, <a class="el" href="group__FIR__decimate.html#ga3f434c9a5d3b4e68061feac0714ea2ac">arm_fir_decimate_fast_q15.c</a>
+: <a class="el" href="group__FIR__decimate.html#gab43fa1edb45d3b2e875dc8cd381770cc">arm_math.h</a>
+, <a class="el" href="group__FIR__decimate.html#gab43fa1edb45d3b2e875dc8cd381770cc">arm_fir_decimate_fast_q15.c</a>
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diff --git a/docs/DSP/html/globals_func_g.html b/docs/DSP/html/globals_func_g.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/globals_func_i.html b/docs/DSP/html/globals_func_i.html
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@@ -144,8 +145,8 @@
 
 <h3><a class="anchor" id="index_i"></a>- i -</h3><ul>
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 <li>arm_max_q7()
-: <a class="el" href="group__Max.html#ga6afd64d381b5c232de59163ebfe71e35">arm_math.h</a>
-, <a class="el" href="group__Max.html#ga6afd64d381b5c232de59163ebfe71e35">arm_max_q7.c</a>
+: <a class="el" href="group__Max.html#ga504abf036854dc0c4a43bd9a27827863">arm_math.h</a>
+, <a class="el" href="group__Max.html#ga504abf036854dc0c4a43bd9a27827863">arm_max_q7.c</a>
 </li>
 <li>arm_mean_f32()
-: <a class="el" href="group__mean.html#ga74ce08c49ab61e57bd50c3a0ca1fdb2b">arm_math.h</a>
-, <a class="el" href="group__mean.html#ga74ce08c49ab61e57bd50c3a0ca1fdb2b">arm_mean_f32.c</a>
+: <a class="el" href="group__mean.html#gae4fb7698771d7c24f536ed24347c1488">arm_math.h</a>
+, <a class="el" href="group__mean.html#gae4fb7698771d7c24f536ed24347c1488">arm_mean_f32.c</a>
 </li>
 <li>arm_mean_q15()
-: <a class="el" href="group__mean.html#gac882495d5f098819fd3939c1ef7795b3">arm_math.h</a>
-, <a class="el" href="group__mean.html#gac882495d5f098819fd3939c1ef7795b3">arm_mean_q15.c</a>
+: <a class="el" href="group__mean.html#ga55fc43607651123ffe3b967e30305734">arm_math.h</a>
+, <a class="el" href="group__mean.html#ga55fc43607651123ffe3b967e30305734">arm_mean_q15.c</a>
 </li>
 <li>arm_mean_q31()
-: <a class="el" href="group__mean.html#gacf2526d8c2d75e486e8f0b0e31877ad0">arm_mean_q31.c</a>
-, <a class="el" href="group__mean.html#gacf2526d8c2d75e486e8f0b0e31877ad0">arm_math.h</a>
+: <a class="el" href="group__mean.html#gab86ec60eba14c4bc4e2bd9b54ac4b487">arm_mean_q31.c</a>
+, <a class="el" href="group__mean.html#gab86ec60eba14c4bc4e2bd9b54ac4b487">arm_math.h</a>
 </li>
 <li>arm_mean_q7()
-: <a class="el" href="group__mean.html#gaebc707ee539020357c25da4c75b52eb7">arm_math.h</a>
-, <a class="el" href="group__mean.html#gaebc707ee539020357c25da4c75b52eb7">arm_mean_q7.c</a>
+: <a class="el" href="group__mean.html#gaa907ace253a82be0741a3203ac04601c">arm_math.h</a>
+, <a class="el" href="group__mean.html#gaa907ace253a82be0741a3203ac04601c">arm_mean_q7.c</a>
 </li>
 <li>arm_min_f32()
-: <a class="el" href="group__Min.html#gaf62b1673740fc516ea64daf777b7d74a">arm_math.h</a>
-, <a class="el" href="group__Min.html#gaf62b1673740fc516ea64daf777b7d74a">arm_min_f32.c</a>
+: <a class="el" href="group__Min.html#ga514e2c920c432e1a3df2cb03f01d2797">arm_math.h</a>
+, <a class="el" href="group__Min.html#ga514e2c920c432e1a3df2cb03f01d2797">arm_min_f32.c</a>
 </li>
 <li>arm_min_q15()
-: <a class="el" href="group__Min.html#gad065e37535ebb726750ac1545cb3fa6f">arm_min_q15.c</a>
-, <a class="el" href="group__Min.html#gad065e37535ebb726750ac1545cb3fa6f">arm_math.h</a>
+: <a class="el" href="group__Min.html#ga9f163584c1131f37b1b22f59b976b822">arm_min_q15.c</a>
+, <a class="el" href="group__Min.html#ga9f163584c1131f37b1b22f59b976b822">arm_math.h</a>
 </li>
 <li>arm_min_q31()
-: <a class="el" href="group__Min.html#gab20faeceb5ff5d2d9dd628c2ecf41303">arm_min_q31.c</a>
-, <a class="el" href="group__Min.html#gab20faeceb5ff5d2d9dd628c2ecf41303">arm_math.h</a>
+: <a class="el" href="group__Min.html#ga1969bd12eb46b412104f463305871493">arm_min_q31.c</a>
+, <a class="el" href="group__Min.html#ga1969bd12eb46b412104f463305871493">arm_math.h</a>
 </li>
 <li>arm_min_q7()
-: <a class="el" href="group__Min.html#ga3631d38ac8d715fc14f6f1b343f4c4ed">arm_math.h</a>
-, <a class="el" href="group__Min.html#ga3631d38ac8d715fc14f6f1b343f4c4ed">arm_min_q7.c</a>
+: <a class="el" href="group__Min.html#gad66b651b1342c2411b4d8ca4955c03b3">arm_math.h</a>
+, <a class="el" href="group__Min.html#gad66b651b1342c2411b4d8ca4955c03b3">arm_min_q7.c</a>
 </li>
 <li>arm_mult_f32()
-: <a class="el" href="group__BasicMult.html#gaca3f0b8227da431ab29225b88888aa32">arm_math.h</a>
-, <a class="el" href="group__BasicMult.html#gaca3f0b8227da431ab29225b88888aa32">arm_mult_f32.c</a>
+: <a class="el" href="group__BasicMult.html#gacf950935141cad927bea886e88fd9e9b">arm_math.h</a>
+, <a class="el" href="group__BasicMult.html#gacf950935141cad927bea886e88fd9e9b">arm_mult_f32.c</a>
 </li>
 <li>arm_mult_q15()
-: <a class="el" href="group__BasicMult.html#gafb0778d27ed98a2a6f2ecb7d48cc8c75">arm_mult_q15.c</a>
-, <a class="el" href="group__BasicMult.html#gafb0778d27ed98a2a6f2ecb7d48cc8c75">arm_math.h</a>
+: <a class="el" href="group__BasicMult.html#gaeeda8cdc2c7e79c8a26e905342a0bb17">arm_mult_q15.c</a>
+, <a class="el" href="group__BasicMult.html#gaeeda8cdc2c7e79c8a26e905342a0bb17">arm_math.h</a>
 </li>
 <li>arm_mult_q31()
-: <a class="el" href="group__BasicMult.html#ga3528c0f54a0607acc603f0490d3ca6c6">arm_math.h</a>
-, <a class="el" href="group__BasicMult.html#ga3528c0f54a0607acc603f0490d3ca6c6">arm_mult_q31.c</a>
+: <a class="el" href="group__BasicMult.html#gaf12c75306edf16759bdedd849984324e">arm_math.h</a>
+, <a class="el" href="group__BasicMult.html#gaf12c75306edf16759bdedd849984324e">arm_mult_q31.c</a>
 </li>
 <li>arm_mult_q7()
-: <a class="el" href="group__BasicMult.html#ga16677275ed83ff0878da531e875c27ef">arm_math.h</a>
-, <a class="el" href="group__BasicMult.html#ga16677275ed83ff0878da531e875c27ef">arm_mult_q7.c</a>
+: <a class="el" href="group__BasicMult.html#ga7b852d225dd7e91f19107fdcea38a3cb">arm_math.h</a>
+, <a class="el" href="group__BasicMult.html#ga7b852d225dd7e91f19107fdcea38a3cb">arm_mult_q7.c</a>
 </li>
 <li>main()
 : <a class="el" href="arm__fft__bin__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">arm_fft_bin_example_f32.c</a>
@@ -321,10 +322,10 @@
 , <a class="el" href="arm__graphic__equalizer__example__q31_8c.html#a52d2cba30e6946c95578be946ac12a65">arm_graphic_equalizer_example_q31.c</a>
 </li>
 <li>merge_rfft_f32()
-: <a class="el" href="arm__rfft__fast__f32_8c.html#a93258bc1e64a939a8ebd086367e459af">arm_rfft_fast_f32.c</a>
+: <a class="el" href="arm__rfft__fast__f32_8c.html#a7b48b01d0ec30d8d206d99d5dbf5f946">arm_rfft_fast_f32.c</a>
 </li>
 <li>mult32x64()
-: <a class="el" href="arm__math_8h.html#a24ad1cc3560b89335ee15f5b7e69b1f9">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#a1922856352479a1443dad21208351d35">arm_math.h</a>
 </li>
 </ul>
 </div><!-- contents -->
@@ -332,7 +333,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/globals_func_n.html b/docs/DSP/html/globals_func_n.html
index 9c98504..aa64688 100644
--- a/docs/DSP/html/globals_func_n.html
+++ b/docs/DSP/html/globals_func_n.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -108,6 +108,7 @@
       <li><a href="globals_func_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_func_t.html#index_t"><span>t</span></a></li>
       <li><a href="globals_func_v.html#index_v"><span>v</span></a></li>
+      <li><a href="globals_func_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -144,20 +145,20 @@
 
 <h3><a class="anchor" id="index_n"></a>- n -</h3><ul>
 <li>arm_negate_f32()
-: <a class="el" href="group__negate.html#ga2e169c4de6cc6e3ba4be9473531e6657">arm_math.h</a>
-, <a class="el" href="group__negate.html#ga2e169c4de6cc6e3ba4be9473531e6657">arm_negate_f32.c</a>
+: <a class="el" href="group__BasicNegate.html#ga7d9cfa32eafae01d3dbdcaf05052f431">arm_math.h</a>
+, <a class="el" href="group__BasicNegate.html#ga7d9cfa32eafae01d3dbdcaf05052f431">arm_negate_f32.c</a>
 </li>
 <li>arm_negate_q15()
-: <a class="el" href="group__negate.html#ga0239a833d72cf00290b9723c394e5042">arm_negate_q15.c</a>
-, <a class="el" href="group__negate.html#ga0239a833d72cf00290b9723c394e5042">arm_math.h</a>
+: <a class="el" href="group__BasicNegate.html#ga55b8bbbcd318d5142925bc221db30186">arm_negate_q15.c</a>
+, <a class="el" href="group__BasicNegate.html#ga55b8bbbcd318d5142925bc221db30186">arm_math.h</a>
 </li>
 <li>arm_negate_q31()
-: <a class="el" href="group__negate.html#ga2784c6887686a73dc7c364e2e41c776c">arm_math.h</a>
-, <a class="el" href="group__negate.html#ga2784c6887686a73dc7c364e2e41c776c">arm_negate_q31.c</a>
+: <a class="el" href="group__BasicNegate.html#gad5054d19c205eebab5f2c6e42d8cbb3c">arm_math.h</a>
+, <a class="el" href="group__BasicNegate.html#gad5054d19c205eebab5f2c6e42d8cbb3c">arm_negate_q31.c</a>
 </li>
 <li>arm_negate_q7()
-: <a class="el" href="group__negate.html#gaae78fc079a43bdaa3055f9b32e2a1f4c">arm_negate_q7.c</a>
-, <a class="el" href="group__negate.html#gaae78fc079a43bdaa3055f9b32e2a1f4c">arm_math.h</a>
+: <a class="el" href="group__BasicNegate.html#gaea178c9f486ed4704f8723a2efee271c">arm_negate_q7.c</a>
+, <a class="el" href="group__BasicNegate.html#gaea178c9f486ed4704f8723a2efee271c">arm_math.h</a>
 </li>
 </ul>
 </div><!-- contents -->
@@ -165,7 +166,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/globals_func_o.html b/docs/DSP/html/globals_func_o.html
index 4ec108d..be9eec9 100644
--- a/docs/DSP/html/globals_func_o.html
+++ b/docs/DSP/html/globals_func_o.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -108,6 +108,7 @@
       <li><a href="globals_func_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_func_t.html#index_t"><span>t</span></a></li>
       <li><a href="globals_func_v.html#index_v"><span>v</span></a></li>
+      <li><a href="globals_func_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -144,20 +145,23 @@
 
 <h3><a class="anchor" id="index_o"></a>- o -</h3><ul>
 <li>arm_offset_f32()
-: <a class="el" href="group__offset.html#ga989dfae15235799d82f62ef9d356abb4">arm_math.h</a>
-, <a class="el" href="group__offset.html#ga989dfae15235799d82f62ef9d356abb4">arm_offset_f32.c</a>
+: <a class="el" href="group__BasicOffset.html#ga4ea8c9e1829e3b4d297f87e4a40478ad">arm_math.h</a>
+, <a class="el" href="group__BasicOffset.html#ga4ea8c9e1829e3b4d297f87e4a40478ad">arm_offset_f32.c</a>
 </li>
 <li>arm_offset_q15()
-: <a class="el" href="group__offset.html#gab4c1d2391b599549e5a06fdfbc2747bf">arm_offset_q15.c</a>
-, <a class="el" href="group__offset.html#gab4c1d2391b599549e5a06fdfbc2747bf">arm_math.h</a>
+: <a class="el" href="group__BasicOffset.html#gaffc78c4cda3e39b518d79cef293532b7">arm_offset_q15.c</a>
+, <a class="el" href="group__BasicOffset.html#gaffc78c4cda3e39b518d79cef293532b7">arm_math.h</a>
 </li>
 <li>arm_offset_q31()
-: <a class="el" href="group__offset.html#gac84ec42cbbebc5c197a87d0221819acf">arm_math.h</a>
-, <a class="el" href="group__offset.html#gac84ec42cbbebc5c197a87d0221819acf">arm_offset_q31.c</a>
+: <a class="el" href="group__BasicOffset.html#ga55604198ef59f391a96ec95c188fca85">arm_math.h</a>
+, <a class="el" href="group__BasicOffset.html#ga55604198ef59f391a96ec95c188fca85">arm_offset_q31.c</a>
 </li>
 <li>arm_offset_q7()
-: <a class="el" href="group__offset.html#ga00bd9cc17c5bf905e76c91ad50886393">arm_offset_q7.c</a>
-, <a class="el" href="group__offset.html#ga00bd9cc17c5bf905e76c91ad50886393">arm_math.h</a>
+: <a class="el" href="group__BasicOffset.html#ga26adad00c10390145b02080a53e782b4">arm_offset_q7.c</a>
+, <a class="el" href="group__BasicOffset.html#ga26adad00c10390145b02080a53e782b4">arm_math.h</a>
+</li>
+<li>option()
+: <a class="el" href="Source_2CMakeLists_8txt.html#a5790cdedec7ad588e338cab656748165">Source/CMakeLists.txt</a>
 </li>
 </ul>
 </div><!-- contents -->
@@ -165,7 +169,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/globals_func_p.html b/docs/DSP/html/globals_func_p.html
index a1a9ba4..adf29ce 100644
--- a/docs/DSP/html/globals_func_p.html
+++ b/docs/DSP/html/globals_func_p.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -108,6 +108,7 @@
       <li><a href="globals_func_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_func_t.html#index_t"><span>t</span></a></li>
       <li><a href="globals_func_v.html#index_v"><span>v</span></a></li>
+      <li><a href="globals_func_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -144,13 +145,13 @@
 
 <h3><a class="anchor" id="index_p"></a>- p -</h3><ul>
 <li>arm_park_f32()
-: <a class="el" href="group__park.html#gae24bf07174d3b8dddcf30d8c8d8e7fbb">arm_math.h</a>
+: <a class="el" href="group__park.html#ga18f92d09e080edc98a00c01886b56b5d">arm_math.h</a>
 </li>
 <li>arm_park_q31()
-: <a class="el" href="group__park.html#ga5630ed3715091f2795ee10df34672523">arm_math.h</a>
+: <a class="el" href="group__park.html#ga69be76685149b18f345f705aa8efaad0">arm_math.h</a>
 </li>
 <li>arm_pid_f32()
-: <a class="el" href="group__PID.html#ga9380d08046dd7ec2f5015f569206b9ce">arm_math.h</a>
+: <a class="el" href="group__PID.html#ga5a6865ed706b7dd969ef0bd58a61f306">arm_math.h</a>
 </li>
 <li>arm_pid_init_f32()
 : <a class="el" href="group__PID.html#gae31536b19b82b93ed184fb1ab73cfcb3">arm_math.h</a>
@@ -165,10 +166,10 @@
 , <a class="el" href="group__PID.html#gad9d88485234fa9460b1ce9e64989ac86">arm_pid_init_q31.c</a>
 </li>
 <li>arm_pid_q15()
-: <a class="el" href="group__PID.html#gad466471a6b0f8fc570b8b8fc34ac79fa">arm_math.h</a>
+: <a class="el" href="group__PID.html#ga7ecc87208cb297fb9a31cec4f18bb54e">arm_math.h</a>
 </li>
 <li>arm_pid_q31()
-: <a class="el" href="group__PID.html#ga82bc0813c007d50ce308b9b0bf3c76e2">arm_math.h</a>
+: <a class="el" href="group__PID.html#ga9ead8b3180125fb42879389477b99dc8">arm_math.h</a>
 </li>
 <li>arm_pid_reset_f32()
 : <a class="el" href="group__PID.html#ga9ec860bcb6f8ca31205bf0f1b51ab723">arm_math.h</a>
@@ -183,20 +184,20 @@
 , <a class="el" href="group__PID.html#gaeecbacd3fb37c608ec25474d3a0dffa9">arm_pid_reset_q31.c</a>
 </li>
 <li>arm_power_f32()
-: <a class="el" href="group__power.html#ga993c00dd7f661d66bdb6e58426e893aa">arm_math.h</a>
-, <a class="el" href="group__power.html#ga993c00dd7f661d66bdb6e58426e893aa">arm_power_f32.c</a>
+: <a class="el" href="group__power.html#gad0630e3743da2b5aedbe2bb624a8532f">arm_math.h</a>
+, <a class="el" href="group__power.html#gad0630e3743da2b5aedbe2bb624a8532f">arm_power_f32.c</a>
 </li>
 <li>arm_power_q15()
-: <a class="el" href="group__power.html#ga7050c04b7515e01a75c38f1abbaf71ba">arm_math.h</a>
-, <a class="el" href="group__power.html#ga7050c04b7515e01a75c38f1abbaf71ba">arm_power_q15.c</a>
+: <a class="el" href="group__power.html#ga6b87986c6a3617d4fc32c0572a07706c">arm_math.h</a>
+, <a class="el" href="group__power.html#ga6b87986c6a3617d4fc32c0572a07706c">arm_power_q15.c</a>
 </li>
 <li>arm_power_q31()
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-, <a class="el" href="group__RealFFT.html#ga5abde938abbe72e95c5bab080eb33c45">arm_rfft_init_q31.c</a>
+: <a class="el" href="group__RealFFT.html#ga5abde938abbe72e95c5bab080eb33c45">arm_rfft_init_q31.c</a>
+, <a class="el" href="group__RealFFT.html#ga5abde938abbe72e95c5bab080eb33c45">arm_math.h</a>
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 <li>arm_rfft_q15()
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-, <a class="el" href="group__RealFFT.html#gabaeab5646aeea9844e6d42ca8c73fe3a">arm_rfft_q31.c</a>
+: <a class="el" href="group__RealFFT.html#gabaeab5646aeea9844e6d42ca8c73fe3a">arm_rfft_q31.c</a>
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-, <a class="el" href="group__RMS.html#ga0e3ab1b57da32d45388d1fa90d7fd88c">arm_rms_f32.c</a>
+: <a class="el" href="group__RMS.html#gaeb487e726e3755a7614a29c9d16a93e7">arm_rms_f32.c</a>
+, <a class="el" href="group__RMS.html#gaeb487e726e3755a7614a29c9d16a93e7">arm_math.h</a>
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-, <a class="el" href="group__RMS.html#gaf5b836b72dda9e5dfbbd17c7906fd13f">arm_math.h</a>
+: <a class="el" href="group__RMS.html#ga8be796318d41c7cbb68f8f3c0b96020f">arm_math.h</a>
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-, <a class="el" href="group__RMS.html#gae33015fda23fc44e7ead5e5ed7e8d314">arm_math.h</a>
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+, <a class="el" href="group__RMS.html#ga20586bc59cabbfc38a935c2448833dd2">arm_math.h</a>
+</li>
+<li>read_q15x2()
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+</li>
+<li>read_q15x2_da()
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+</li>
+<li>read_q15x2_ia()
+: <a class="el" href="arm__math_8h.html#a63675cbbd75b0ba77f5bb21c3b808095">arm_math.h</a>
+</li>
+<li>read_q7x4_da()
+: <a class="el" href="arm__math_8h.html#a57dbc6933462fd03c5345c660e0b9e78">arm_math.h</a>
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diff --git a/docs/DSP/html/globals_func_s.html b/docs/DSP/html/globals_func_s.html
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@@ -144,32 +145,32 @@
 
 <h3><a class="anchor" id="index_s"></a>- s -</h3><ul>
 <li>arm_scale_f32()
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-, <a class="el" href="group__scale.html#gafaac0e1927daffeb68a42719b53ea780">arm_math.h</a>
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-, <a class="el" href="group__BasicSub.html#ga7f975a472de286331134227c08aad826">arm_sub_f32.c</a>
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-, <a class="el" href="group__BasicSub.html#ga997a8ee93088d15bda23c325d455b588">arm_sub_q15.c</a>
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 <!-- start footer part -->
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@@ -155,7 +156,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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    <div id="projectname">CMSIS-DSP
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@@ -108,6 +108,7 @@
       <li><a href="globals_func_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_func_t.html#index_t"><span>t</span></a></li>
       <li class="current"><a href="globals_func_v.html#index_v"><span>v</span></a></li>
+      <li><a href="globals_func_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -144,16 +145,25 @@
 
 <h3><a class="anchor" id="index_v"></a>- v -</h3><ul>
 <li>arm_var_f32()
-: <a class="el" href="group__variance.html#ga393f26c5a3bfa05624fb8d32232a6d96">arm_math.h</a>
-, <a class="el" href="group__variance.html#ga393f26c5a3bfa05624fb8d32232a6d96">arm_var_f32.c</a>
+: <a class="el" href="group__variance.html#gaae455544f0c8ac92469a1e25d3906515">arm_math.h</a>
+, <a class="el" href="group__variance.html#gaae455544f0c8ac92469a1e25d3906515">arm_var_f32.c</a>
 </li>
 <li>arm_var_q15()
-: <a class="el" href="group__variance.html#ga79dce009ed2de28a125aeb3f19631654">arm_var_q15.c</a>
-, <a class="el" href="group__variance.html#ga79dce009ed2de28a125aeb3f19631654">arm_math.h</a>
+: <a class="el" href="group__variance.html#gaef3ebc6401209c3f93749e08d341ab48">arm_var_q15.c</a>
+, <a class="el" href="group__variance.html#gaef3ebc6401209c3f93749e08d341ab48">arm_math.h</a>
 </li>
 <li>arm_var_q31()
-: <a class="el" href="group__variance.html#gac02873f1c2cc80adfd799305f0e6465d">arm_var_q31.c</a>
-, <a class="el" href="group__variance.html#gac02873f1c2cc80adfd799305f0e6465d">arm_math.h</a>
+: <a class="el" href="group__variance.html#ga87a07c87c1d85104de0ea4a3d017454c">arm_math.h</a>
+, <a class="el" href="group__variance.html#ga87a07c87c1d85104de0ea4a3d017454c">arm_var_q31.c</a>
+</li>
+<li>arm_vsqrt_f32()
+: <a class="el" href="group__SQRT.html#gaa9b8a2bea8a22489bfd968eb4687a7bd">arm_math.h</a>
+</li>
+<li>arm_vsqrt_q15()
+: <a class="el" href="group__SQRT.html#ga793f913a2b3a8f45577db36136954cdc">arm_math.h</a>
+</li>
+<li>arm_vsqrt_q31()
+: <a class="el" href="group__SQRT.html#ga5955b76f2a60c1636ff507182000193d">arm_math.h</a>
 </li>
 </ul>
 </div><!-- contents -->
@@ -161,7 +171,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/globals_func_w.html b/docs/DSP/html/globals_func_w.html
new file mode 100644
index 0000000..9d0d73b
--- /dev/null
+++ b/docs/DSP/html/globals_func_w.html
@@ -0,0 +1,171 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>Globals</title>
+<title>CMSIS-DSP: Globals</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-DSP
+   &#160;<span id="projectnumber">Version 1.7.0</span>
+   </div>
+   <div id="projectbrief">CMSIS DSP Software Library</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li><a href="modules.html"><span>Reference</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+  <div id="navrow3" class="tabs2">
+    <ul class="tablist">
+      <li><a href="globals.html"><span>All</span></a></li>
+      <li class="current"><a href="globals_func.html"><span>Functions</span></a></li>
+      <li><a href="globals_vars.html"><span>Variables</span></a></li>
+      <li><a href="globals_type.html"><span>Typedefs</span></a></li>
+      <li><a href="globals_enum.html"><span>Enumerations</span></a></li>
+      <li><a href="globals_eval.html"><span>Enumerator</span></a></li>
+      <li><a href="globals_defs.html"><span>Macros</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow4" class="tabs3">
+    <ul class="tablist">
+      <li><a href="globals_func.html#index__"><span>_</span></a></li>
+      <li><a href="globals_func_a.html#index_a"><span>a</span></a></li>
+      <li><a href="globals_func_b.html#index_b"><span>b</span></a></li>
+      <li><a href="globals_func_c.html#index_c"><span>c</span></a></li>
+      <li><a href="globals_func_d.html#index_d"><span>d</span></a></li>
+      <li><a href="globals_func_f.html#index_f"><span>f</span></a></li>
+      <li><a href="globals_func_g.html#index_g"><span>g</span></a></li>
+      <li><a href="globals_func_i.html#index_i"><span>i</span></a></li>
+      <li><a href="globals_func_l.html#index_l"><span>l</span></a></li>
+      <li><a href="globals_func_m.html#index_m"><span>m</span></a></li>
+      <li><a href="globals_func_n.html#index_n"><span>n</span></a></li>
+      <li><a href="globals_func_o.html#index_o"><span>o</span></a></li>
+      <li><a href="globals_func_p.html#index_p"><span>p</span></a></li>
+      <li><a href="globals_func_q.html#index_q"><span>q</span></a></li>
+      <li><a href="globals_func_r.html#index_r"><span>r</span></a></li>
+      <li><a href="globals_func_s.html#index_s"><span>s</span></a></li>
+      <li><a href="globals_func_t.html#index_t"><span>t</span></a></li>
+      <li><a href="globals_func_v.html#index_v"><span>v</span></a></li>
+      <li class="current"><a href="globals_func_w.html#index_w"><span>w</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('globals_func_w.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="contents">
+&#160;
+
+<h3><a class="anchor" id="index_w"></a>- w -</h3><ul>
+<li>write_q15x2()
+: <a class="el" href="arm__math_8h.html#a1c6d46f43d41c6ca1b7d6a0d8ed95036">arm_math.h</a>
+</li>
+<li>write_q15x2_ia()
+: <a class="el" href="arm__math_8h.html#a576a0e2a4667277b42c478dfda753dc6">arm_math.h</a>
+</li>
+<li>write_q7x4_ia()
+: <a class="el" href="arm__math_8h.html#a05bde59a4c7dd866d0a2e3e6fcac17bd">arm_math.h</a>
+</li>
+</ul>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/DSP/html/globals_g.html b/docs/DSP/html/globals_g.html
index dfdfb89..6c88fc5 100644
--- a/docs/DSP/html/globals_g.html
+++ b/docs/DSP/html/globals_g.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -159,7 +159,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/globals_i.html b/docs/DSP/html/globals_i.html
index a31766b..4956327 100644
--- a/docs/DSP/html/globals_i.html
+++ b/docs/DSP/html/globals_i.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -148,8 +148,8 @@
 
 <h3><a class="anchor" id="index_i"></a>- i -</h3><ul>
 <li>arm_iir_lattice_f32()
-: <a class="el" href="group__IIR__Lattice.html#ga56164a0fe48619b8ceec160347bdd2ff">arm_math.h</a>
-, <a class="el" href="group__IIR__Lattice.html#ga56164a0fe48619b8ceec160347bdd2ff">arm_iir_lattice_f32.c</a>
+: <a class="el" href="group__IIR__Lattice.html#ga754a44b604c386d132b4b05a3d9e0f44">arm_math.h</a>
+, <a class="el" href="group__IIR__Lattice.html#ga754a44b604c386d132b4b05a3d9e0f44">arm_iir_lattice_f32.c</a>
 </li>
 <li>arm_iir_lattice_init_f32()
 : <a class="el" href="group__IIR__Lattice.html#gaed3b0230bb77439dc902daa625985e04">arm_math.h</a>
@@ -164,28 +164,31 @@
 , <a class="el" href="group__IIR__Lattice.html#gab686c14175581797d9c3ad7bf1d5cc1e">arm_iir_lattice_init_q31.c</a>
 </li>
 <li>arm_iir_lattice_q15()
-: <a class="el" href="group__IIR__Lattice.html#gaeb9e9599a288832ed123183eaa8b294a">arm_math.h</a>
-, <a class="el" href="group__IIR__Lattice.html#gaeb9e9599a288832ed123183eaa8b294a">arm_iir_lattice_q15.c</a>
+: <a class="el" href="group__IIR__Lattice.html#ga49181562f33456fa979e474e2a657d19">arm_math.h</a>
+, <a class="el" href="group__IIR__Lattice.html#ga49181562f33456fa979e474e2a657d19">arm_iir_lattice_q15.c</a>
 </li>
 <li>arm_iir_lattice_q31()
-: <a class="el" href="group__IIR__Lattice.html#ga123b26fa9156cd8d3622dd85931741ed">arm_math.h</a>
-, <a class="el" href="group__IIR__Lattice.html#ga123b26fa9156cd8d3622dd85931741ed">arm_iir_lattice_q31.c</a>
+: <a class="el" href="group__IIR__Lattice.html#ga87d7df8f8787402d4331de156a82687f">arm_math.h</a>
+, <a class="el" href="group__IIR__Lattice.html#ga87d7df8f8787402d4331de156a82687f">arm_iir_lattice_q31.c</a>
 </li>
 <li>arm_inv_clarke_f32()
-: <a class="el" href="group__inv__clarke.html#ga945eb24e625a57c7c3be8a6e655646e3">arm_math.h</a>
+: <a class="el" href="group__inv__clarke.html#ga1a73ce96f94b2124d02426690e587197">arm_math.h</a>
 </li>
 <li>arm_inv_clarke_q31()
-: <a class="el" href="group__inv__clarke.html#ga50768ebd8b71e8988dbb804cc03a742d">arm_math.h</a>
+: <a class="el" href="group__inv__clarke.html#ga3bab178431f22d13332a0dfae4390172">arm_math.h</a>
 </li>
 <li>arm_inv_park_f32()
-: <a class="el" href="group__inv__park.html#ga7ca3a87a0954ed8c9ed5a2e6f1c64f30">arm_math.h</a>
+: <a class="el" href="group__inv__park.html#ga896b639ecd52c33d427bc7cdc8d303b2">arm_math.h</a>
 </li>
 <li>arm_inv_park_q31()
-: <a class="el" href="group__inv__park.html#ga6e00d7320aa4a85686716af8b763e08a">arm_math.h</a>
+: <a class="el" href="group__inv__park.html#gae7165779ef72e1f797d0c601d6d619b2">arm_math.h</a>
 </li>
 <li>ifftFlag
 : <a class="el" href="arm__fft__bin__example__f32_8c.html#a379ccb99013d369a41b49619083c16ef">arm_fft_bin_example_f32.c</a>
 </li>
+<li>include()
+: <a class="el" href="Examples_2ARM_2arm__variance__example_2CMakeLists_8txt.html#a20de15dc42caeb4c8d037d578fba54bc">Examples/ARM/arm_variance_example/CMakeLists.txt</a>
+</li>
 <li>INDEX_MASK
 : <a class="el" href="arm__math_8h.html#a29f839928f4752b73c8858d6dbb55294">arm_math.h</a>
 </li>
@@ -201,7 +204,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/globals_l.html b/docs/DSP/html/globals_l.html
index f5dfa14..d9a7d25 100644
--- a/docs/DSP/html/globals_l.html
+++ b/docs/DSP/html/globals_l.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -152,20 +152,20 @@
 , <a class="el" href="arm__linear__interp__example__f32_8c.html#a1a5a6c95f39221fcf8129fe478f54696">arm_linear_interp_example_f32.c</a>
 </li>
 <li>arm_linear_interp_f32()
-: <a class="el" href="group__LinearInterpolate.html#ga790bbc697724ee432f840cfebbbae1f4">arm_math.h</a>
+: <a class="el" href="group__LinearInterpolate.html#ga5335f60532bab8cee1e7c22f76a41805">arm_math.h</a>
 </li>
 <li>arm_linear_interp_q15()
-: <a class="el" href="group__LinearInterpolate.html#ga7e5d633c26edd82e009517cd2347fb00">arm_math.h</a>
+: <a class="el" href="group__LinearInterpolate.html#ga9a308a0de4d4e4fe4a262a99b17121cd">arm_math.h</a>
 </li>
 <li>arm_linear_interp_q31()
-: <a class="el" href="group__LinearInterpolate.html#gaad59cea673ab358888075b040bacc71f">arm_math.h</a>
+: <a class="el" href="group__LinearInterpolate.html#gaeaf31289367ac36c4727939e1ea73312">arm_math.h</a>
 </li>
 <li>arm_linear_interp_q7()
-: <a class="el" href="group__LinearInterpolate.html#gaab750789ec9230e65c3bf544029d246f">arm_math.h</a>
+: <a class="el" href="group__LinearInterpolate.html#gafabd4124a8724055329b5c484419f936">arm_math.h</a>
 </li>
 <li>arm_lms_f32()
-: <a class="el" href="group__LMS.html#gae266d009e682180421601627c79a3843">arm_lms_f32.c</a>
-, <a class="el" href="group__LMS.html#gae266d009e682180421601627c79a3843">arm_math.h</a>
+: <a class="el" href="group__LMS.html#gac518f7acd1778a8ee90e81c421cfbb90">arm_lms_f32.c</a>
+, <a class="el" href="group__LMS.html#gac518f7acd1778a8ee90e81c421cfbb90">arm_math.h</a>
 </li>
 <li>arm_lms_init_f32()
 : <a class="el" href="group__LMS.html#ga9fc7adca0966ff2cec1746fca8364cee">arm_math.h</a>
@@ -180,8 +180,8 @@
 , <a class="el" href="group__LMS.html#ga8d4bc251169f4b102355097a9f7530d6">arm_lms_init_q31.c</a>
 </li>
 <li>arm_lms_norm_f32()
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-, <a class="el" href="group__LMS__NORM.html#ga2418c929087c6eba719758eaae3f3300">arm_math.h</a>
+: <a class="el" href="group__LMS__NORM.html#ga72b3755ed1cf97622851cbbeff83c69e">arm_lms_norm_f32.c</a>
+, <a class="el" href="group__LMS__NORM.html#ga72b3755ed1cf97622851cbbeff83c69e">arm_math.h</a>
 </li>
 <li>arm_lms_norm_init_f32()
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@@ -196,20 +196,20 @@
 , <a class="el" href="group__LMS__NORM.html#ga1d9659dbbea4c89a7a9d14d5fc0dd490">arm_lms_norm_init_q31.c</a>
 </li>
 <li>arm_lms_norm_q15()
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-, <a class="el" href="group__LMS__NORM.html#gad47486a399dedb0bc85a5990ec5cf981">arm_math.h</a>
+: <a class="el" href="group__LMS__NORM.html#gaf03debfeb77ec5a9934e1b23f1ff6c48">arm_lms_norm_q15.c</a>
+, <a class="el" href="group__LMS__NORM.html#gaf03debfeb77ec5a9934e1b23f1ff6c48">arm_math.h</a>
 </li>
 <li>arm_lms_norm_q31()
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-, <a class="el" href="group__LMS__NORM.html#ga7128775e99817c183a7d7ad34e8b6e05">arm_math.h</a>
+: <a class="el" href="group__LMS__NORM.html#gae12fc16232c8087345e5910fcb840be9">arm_lms_norm_q31.c</a>
+, <a class="el" href="group__LMS__NORM.html#gae12fc16232c8087345e5910fcb840be9">arm_math.h</a>
 </li>
 <li>arm_lms_q15()
-: <a class="el" href="group__LMS.html#gacde16c17eb75979f81b34e2e2a58c7ac">arm_math.h</a>
-, <a class="el" href="group__LMS.html#gacde16c17eb75979f81b34e2e2a58c7ac">arm_lms_q15.c</a>
+: <a class="el" href="group__LMS.html#ga12fd93f61401b365789cdfd5dca07e5b">arm_math.h</a>
+, <a class="el" href="group__LMS.html#ga12fd93f61401b365789cdfd5dca07e5b">arm_lms_q15.c</a>
 </li>
 <li>arm_lms_q31()
-: <a class="el" href="group__LMS.html#ga6a0abfe6041253a6f91c63b383a64257">arm_math.h</a>
-, <a class="el" href="group__LMS.html#ga6a0abfe6041253a6f91c63b383a64257">arm_lms_q31.c</a>
+: <a class="el" href="group__LMS.html#ga69c9c64338c067f1fb4990dcdc8c143f">arm_math.h</a>
+, <a class="el" href="group__LMS.html#ga69c9c64338c067f1fb4990dcdc8c143f">arm_lms_q31.c</a>
 </li>
 <li>lmsNorm_instance
 : <a class="el" href="arm__signal__converge__example__f32_8c.html#a519f9b4db839245f3bf2075ff4c17605">arm_signal_converge_example_f32.c</a>
@@ -230,7 +230,7 @@
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/globals_m.html b/docs/DSP/html/globals_m.html
index 90e4ab9..034d0dc 100644
--- a/docs/DSP/html/globals_m.html
+++ b/docs/DSP/html/globals_m.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -248,68 +248,68 @@
 , <a class="el" href="group__MatrixTrans.html#ga30a4d49489ac67ff98a46b9f58f73bf1">arm_mat_trans_q31.c</a>
 </li>
 <li>arm_max_f32()
-: <a class="el" href="group__Max.html#ga5b89d1b04575aeec494f678695fb87d8">arm_math.h</a>
-, <a class="el" href="group__Max.html#ga5b89d1b04575aeec494f678695fb87d8">arm_max_f32.c</a>
+: <a class="el" href="group__Max.html#gad1eabd31544fe59c414d9ce5bd0cc151">arm_math.h</a>
+, <a class="el" href="group__Max.html#gad1eabd31544fe59c414d9ce5bd0cc151">arm_max_f32.c</a>
 </li>
 <li>arm_max_q15()
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-, <a class="el" href="group__Max.html#gac132856c68f4bf2a056eaad5921c7880">arm_max_q15.c</a>
+: <a class="el" href="group__Max.html#gaea9ba2039faeca04b034989a2a2a9e36">arm_math.h</a>
+, <a class="el" href="group__Max.html#gaea9ba2039faeca04b034989a2a2a9e36">arm_max_q15.c</a>
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 <li>arm_max_q31()
-: <a class="el" href="group__Max.html#gaff7cbd4e955382def06724cc4cc85795">arm_math.h</a>
-, <a class="el" href="group__Max.html#gaff7cbd4e955382def06724cc4cc85795">arm_max_q31.c</a>
+: <a class="el" href="group__Max.html#ga74015f9e9852c710a981c5b488417298">arm_math.h</a>
+, <a class="el" href="group__Max.html#ga74015f9e9852c710a981c5b488417298">arm_max_q31.c</a>
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-: <a class="el" href="group__Max.html#ga6afd64d381b5c232de59163ebfe71e35">arm_math.h</a>
-, <a class="el" href="group__Max.html#ga6afd64d381b5c232de59163ebfe71e35">arm_max_q7.c</a>
+: <a class="el" href="group__Max.html#ga504abf036854dc0c4a43bd9a27827863">arm_math.h</a>
+, <a class="el" href="group__Max.html#ga504abf036854dc0c4a43bd9a27827863">arm_max_q7.c</a>
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-: <a class="el" href="group__mean.html#ga74ce08c49ab61e57bd50c3a0ca1fdb2b">arm_math.h</a>
-, <a class="el" href="group__mean.html#ga74ce08c49ab61e57bd50c3a0ca1fdb2b">arm_mean_f32.c</a>
+: <a class="el" href="group__mean.html#gae4fb7698771d7c24f536ed24347c1488">arm_math.h</a>
+, <a class="el" href="group__mean.html#gae4fb7698771d7c24f536ed24347c1488">arm_mean_f32.c</a>
 </li>
 <li>arm_mean_q15()
-: <a class="el" href="group__mean.html#gac882495d5f098819fd3939c1ef7795b3">arm_math.h</a>
-, <a class="el" href="group__mean.html#gac882495d5f098819fd3939c1ef7795b3">arm_mean_q15.c</a>
+: <a class="el" href="group__mean.html#ga55fc43607651123ffe3b967e30305734">arm_math.h</a>
+, <a class="el" href="group__mean.html#ga55fc43607651123ffe3b967e30305734">arm_mean_q15.c</a>
 </li>
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-: <a class="el" href="group__mean.html#gacf2526d8c2d75e486e8f0b0e31877ad0">arm_mean_q31.c</a>
-, <a class="el" href="group__mean.html#gacf2526d8c2d75e486e8f0b0e31877ad0">arm_math.h</a>
+: <a class="el" href="group__mean.html#gab86ec60eba14c4bc4e2bd9b54ac4b487">arm_mean_q31.c</a>
+, <a class="el" href="group__mean.html#gab86ec60eba14c4bc4e2bd9b54ac4b487">arm_math.h</a>
 </li>
 <li>arm_mean_q7()
-: <a class="el" href="group__mean.html#gaebc707ee539020357c25da4c75b52eb7">arm_math.h</a>
-, <a class="el" href="group__mean.html#gaebc707ee539020357c25da4c75b52eb7">arm_mean_q7.c</a>
+: <a class="el" href="group__mean.html#gaa907ace253a82be0741a3203ac04601c">arm_math.h</a>
+, <a class="el" href="group__mean.html#gaa907ace253a82be0741a3203ac04601c">arm_mean_q7.c</a>
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 <li>arm_min_f32()
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-, <a class="el" href="group__Min.html#gaf62b1673740fc516ea64daf777b7d74a">arm_min_f32.c</a>
+: <a class="el" href="group__Min.html#ga514e2c920c432e1a3df2cb03f01d2797">arm_math.h</a>
+, <a class="el" href="group__Min.html#ga514e2c920c432e1a3df2cb03f01d2797">arm_min_f32.c</a>
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 <li>arm_min_q15()
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-, <a class="el" href="group__Min.html#gad065e37535ebb726750ac1545cb3fa6f">arm_min_q15.c</a>
+: <a class="el" href="group__Min.html#ga9f163584c1131f37b1b22f59b976b822">arm_math.h</a>
+, <a class="el" href="group__Min.html#ga9f163584c1131f37b1b22f59b976b822">arm_min_q15.c</a>
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 <li>arm_min_q31()
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-, <a class="el" href="group__Min.html#gab20faeceb5ff5d2d9dd628c2ecf41303">arm_min_q31.c</a>
+: <a class="el" href="group__Min.html#ga1969bd12eb46b412104f463305871493">arm_math.h</a>
+, <a class="el" href="group__Min.html#ga1969bd12eb46b412104f463305871493">arm_min_q31.c</a>
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 <li>arm_min_q7()
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-, <a class="el" href="group__Min.html#ga3631d38ac8d715fc14f6f1b343f4c4ed">arm_math.h</a>
+: <a class="el" href="group__Min.html#gad66b651b1342c2411b4d8ca4955c03b3">arm_min_q7.c</a>
+, <a class="el" href="group__Min.html#gad66b651b1342c2411b4d8ca4955c03b3">arm_math.h</a>
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 <li>arm_mult_f32()
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-, <a class="el" href="group__BasicMult.html#gaca3f0b8227da431ab29225b88888aa32">arm_math.h</a>
+: <a class="el" href="group__BasicMult.html#gacf950935141cad927bea886e88fd9e9b">arm_mult_f32.c</a>
+, <a class="el" href="group__BasicMult.html#gacf950935141cad927bea886e88fd9e9b">arm_math.h</a>
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 <li>arm_mult_q15()
-: <a class="el" href="group__BasicMult.html#gafb0778d27ed98a2a6f2ecb7d48cc8c75">arm_mult_q15.c</a>
-, <a class="el" href="group__BasicMult.html#gafb0778d27ed98a2a6f2ecb7d48cc8c75">arm_math.h</a>
+: <a class="el" href="group__BasicMult.html#gaeeda8cdc2c7e79c8a26e905342a0bb17">arm_mult_q15.c</a>
+, <a class="el" href="group__BasicMult.html#gaeeda8cdc2c7e79c8a26e905342a0bb17">arm_math.h</a>
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-, <a class="el" href="group__BasicMult.html#ga3528c0f54a0607acc603f0490d3ca6c6">arm_math.h</a>
+: <a class="el" href="group__BasicMult.html#gaf12c75306edf16759bdedd849984324e">arm_mult_q31.c</a>
+, <a class="el" href="group__BasicMult.html#gaf12c75306edf16759bdedd849984324e">arm_math.h</a>
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 <li>arm_mult_q7()
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-, <a class="el" href="group__BasicMult.html#ga16677275ed83ff0878da531e875c27ef">arm_mult_q7.c</a>
+: <a class="el" href="group__BasicMult.html#ga7b852d225dd7e91f19107fdcea38a3cb">arm_math.h</a>
+, <a class="el" href="group__BasicMult.html#ga7b852d225dd7e91f19107fdcea38a3cb">arm_mult_q7.c</a>
 </li>
 <li>M0
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@@ -363,7 +363,7 @@
 : <a class="el" href="arm__class__marks__example__f32_8c.html#acc9290716b3c97381ce52d14b4b01681">arm_class_marks_example_f32.c</a>
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-: <a class="el" href="arm__rfft__fast__f32_8c.html#a93258bc1e64a939a8ebd086367e459af">arm_rfft_fast_f32.c</a>
+: <a class="el" href="arm__rfft__fast__f32_8c.html#a7b48b01d0ec30d8d206d99d5dbf5f946">arm_rfft_fast_f32.c</a>
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@@ -372,7 +372,7 @@
 : <a class="el" href="arm__signal__converge__example__f32_8c.html#a09bc9e6a44f0291cfcf578f2efcddfab">arm_signal_converge_example_f32.c</a>
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 <li>mult32x64()
-: <a class="el" href="arm__math_8h.html#a24ad1cc3560b89335ee15f5b7e69b1f9">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#a1922856352479a1443dad21208351d35">arm_math.h</a>
 </li>
 <li>mult_32x32_keep32
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@@ -401,7 +401,7 @@
 <!-- start footer part -->
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/globals_n.html b/docs/DSP/html/globals_n.html
index 4839b9f..bf84cea 100644
--- a/docs/DSP/html/globals_n.html
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@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -148,20 +148,20 @@
 
 <h3><a class="anchor" id="index_n"></a>- n -</h3><ul>
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-, <a class="el" href="group__negate.html#ga2e169c4de6cc6e3ba4be9473531e6657">arm_negate_f32.c</a>
+: <a class="el" href="group__BasicNegate.html#ga7d9cfa32eafae01d3dbdcaf05052f431">arm_math.h</a>
+, <a class="el" href="group__BasicNegate.html#ga7d9cfa32eafae01d3dbdcaf05052f431">arm_negate_f32.c</a>
 </li>
 <li>arm_negate_q15()
-: <a class="el" href="group__negate.html#ga0239a833d72cf00290b9723c394e5042">arm_negate_q15.c</a>
-, <a class="el" href="group__negate.html#ga0239a833d72cf00290b9723c394e5042">arm_math.h</a>
+: <a class="el" href="group__BasicNegate.html#ga55b8bbbcd318d5142925bc221db30186">arm_negate_q15.c</a>
+, <a class="el" href="group__BasicNegate.html#ga55b8bbbcd318d5142925bc221db30186">arm_math.h</a>
 </li>
 <li>arm_negate_q31()
-: <a class="el" href="group__negate.html#ga2784c6887686a73dc7c364e2e41c776c">arm_math.h</a>
-, <a class="el" href="group__negate.html#ga2784c6887686a73dc7c364e2e41c776c">arm_negate_q31.c</a>
+: <a class="el" href="group__BasicNegate.html#gad5054d19c205eebab5f2c6e42d8cbb3c">arm_math.h</a>
+, <a class="el" href="group__BasicNegate.html#gad5054d19c205eebab5f2c6e42d8cbb3c">arm_negate_q31.c</a>
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 <li>arm_negate_q7()
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-, <a class="el" href="group__negate.html#gaae78fc079a43bdaa3055f9b32e2a1f4c">arm_math.h</a>
+: <a class="el" href="group__BasicNegate.html#gaea178c9f486ed4704f8723a2efee271c">arm_negate_q7.c</a>
+, <a class="el" href="group__BasicNegate.html#gaea178c9f486ed4704f8723a2efee271c">arm_math.h</a>
 </li>
 <li>NUM_TAPS
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@@ -178,12 +178,12 @@
 <li>NUMSTAGES
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-<li>numStudents
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 </li>
+<li>numStudents
+: <a class="el" href="arm__class__marks__example__f32_8c.html#ab3b66d06b4af1af4ea2740d0ccf4e7bd">arm_class_marks_example_f32.c</a>
+</li>
 <li>numSubjects
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@@ -199,7 +199,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/globals_o.html b/docs/DSP/html/globals_o.html
index d53e365..6e44fc4 100644
--- a/docs/DSP/html/globals_o.html
+++ b/docs/DSP/html/globals_o.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -148,20 +148,23 @@
 
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-, <a class="el" href="group__offset.html#ga989dfae15235799d82f62ef9d356abb4">arm_offset_f32.c</a>
+: <a class="el" href="group__BasicOffset.html#ga4ea8c9e1829e3b4d297f87e4a40478ad">arm_math.h</a>
+, <a class="el" href="group__BasicOffset.html#ga4ea8c9e1829e3b4d297f87e4a40478ad">arm_offset_f32.c</a>
 </li>
 <li>arm_offset_q15()
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-, <a class="el" href="group__offset.html#gab4c1d2391b599549e5a06fdfbc2747bf">arm_math.h</a>
+: <a class="el" href="group__BasicOffset.html#gaffc78c4cda3e39b518d79cef293532b7">arm_offset_q15.c</a>
+, <a class="el" href="group__BasicOffset.html#gaffc78c4cda3e39b518d79cef293532b7">arm_math.h</a>
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-, <a class="el" href="group__offset.html#gac84ec42cbbebc5c197a87d0221819acf">arm_offset_q31.c</a>
+: <a class="el" href="group__BasicOffset.html#ga55604198ef59f391a96ec95c188fca85">arm_math.h</a>
+, <a class="el" href="group__BasicOffset.html#ga55604198ef59f391a96ec95c188fca85">arm_offset_q31.c</a>
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 <li>arm_offset_q7()
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-, <a class="el" href="group__offset.html#ga00bd9cc17c5bf905e76c91ad50886393">arm_offset_q7.c</a>
+: <a class="el" href="group__BasicOffset.html#ga26adad00c10390145b02080a53e782b4">arm_offset_q7.c</a>
+, <a class="el" href="group__BasicOffset.html#ga26adad00c10390145b02080a53e782b4">arm_math.h</a>
+</li>
+<li>option()
+: <a class="el" href="Source_2CMakeLists_8txt.html#a5790cdedec7ad588e338cab656748165">Source/CMakeLists.txt</a>
 </li>
 <li>outLen
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@@ -175,7 +178,7 @@
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/globals_p.html b/docs/DSP/html/globals_p.html
index 20396aa..578dfad 100644
--- a/docs/DSP/html/globals_p.html
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@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -148,13 +148,13 @@
 
 <h3><a class="anchor" id="index_p"></a>- p -</h3><ul>
 <li>arm_park_f32()
-: <a class="el" href="group__park.html#gae24bf07174d3b8dddcf30d8c8d8e7fbb">arm_math.h</a>
+: <a class="el" href="group__park.html#ga18f92d09e080edc98a00c01886b56b5d">arm_math.h</a>
 </li>
 <li>arm_park_q31()
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+: <a class="el" href="group__park.html#ga69be76685149b18f345f705aa8efaad0">arm_math.h</a>
 </li>
 <li>arm_pid_f32()
-: <a class="el" href="group__PID.html#ga9380d08046dd7ec2f5015f569206b9ce">arm_math.h</a>
+: <a class="el" href="group__PID.html#ga5a6865ed706b7dd969ef0bd58a61f306">arm_math.h</a>
 </li>
 <li>arm_pid_init_f32()
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@@ -169,10 +169,10 @@
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 </li>
 <li>arm_pid_q15()
-: <a class="el" href="group__PID.html#gad466471a6b0f8fc570b8b8fc34ac79fa">arm_math.h</a>
+: <a class="el" href="group__PID.html#ga7ecc87208cb297fb9a31cec4f18bb54e">arm_math.h</a>
 </li>
 <li>arm_pid_q31()
-: <a class="el" href="group__PID.html#ga82bc0813c007d50ce308b9b0bf3c76e2">arm_math.h</a>
+: <a class="el" href="group__PID.html#ga9ead8b3180125fb42879389477b99dc8">arm_math.h</a>
 </li>
 <li>arm_pid_reset_f32()
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-, <a class="el" href="group__power.html#ga993c00dd7f661d66bdb6e58426e893aa">arm_power_f32.c</a>
+: <a class="el" href="group__power.html#gad0630e3743da2b5aedbe2bb624a8532f">arm_math.h</a>
+, <a class="el" href="group__power.html#gad0630e3743da2b5aedbe2bb624a8532f">arm_power_f32.c</a>
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-, <a class="el" href="group__power.html#ga7050c04b7515e01a75c38f1abbaf71ba">arm_power_q15.c</a>
+: <a class="el" href="group__power.html#ga6b87986c6a3617d4fc32c0572a07706c">arm_math.h</a>
+, <a class="el" href="group__power.html#ga6b87986c6a3617d4fc32c0572a07706c">arm_power_q15.c</a>
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-, <a class="el" href="group__power.html#ga0b93d31bb5b5ed214c2b94d8a7744cd2">arm_power_q31.c</a>
+: <a class="el" href="group__power.html#gae490bf87084bcdb5dc9fd1d2ef4030b9">arm_math.h</a>
+, <a class="el" href="group__power.html#gae490bf87084bcdb5dc9fd1d2ef4030b9">arm_power_q31.c</a>
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-, <a class="el" href="group__power.html#gaf969c85c5655e3d72d7b99ff188f92c9">arm_power_q7.c</a>
+: <a class="el" href="group__power.html#gaeb3b9b8e0a4c4bb2549ede074cf43f58">arm_math.h</a>
+, <a class="el" href="group__power.html#gaeb3b9b8e0a4c4bb2549ede074cf43f58">arm_power_q7.c</a>
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@@ -247,7 +247,7 @@
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/globals_q.html b/docs/DSP/html/globals_q.html
index 8a7b166..7758106 100644
--- a/docs/DSP/html/globals_q.html
+++ b/docs/DSP/html/globals_q.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -148,40 +148,40 @@
 
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-, <a class="el" href="group__q15__to__x.html#gaf8b0d2324de273fc430b0e61ad4e9eb2">arm_q15_to_float.c</a>
+: <a class="el" href="group__q15__to__x.html#ga5a75381e7d63ea3a3a315344615281cf">arm_math.h</a>
+, <a class="el" href="group__q15__to__x.html#ga5a75381e7d63ea3a3a315344615281cf">arm_q15_to_float.c</a>
 </li>
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-, <a class="el" href="group__q15__to__x.html#ga7ba2d87366990ad5380439e2b4a4c0a5">arm_q15_to_q31.c</a>
+: <a class="el" href="group__q15__to__x.html#ga39647b2109a5c64a067b776302c4a083">arm_math.h</a>
+, <a class="el" href="group__q15__to__x.html#ga39647b2109a5c64a067b776302c4a083">arm_q15_to_q31.c</a>
 </li>
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-: <a class="el" href="group__q15__to__x.html#ga8fb31855ff8cce09c2ec9308f48ded69">arm_math.h</a>
-, <a class="el" href="group__q15__to__x.html#ga8fb31855ff8cce09c2ec9308f48ded69">arm_q15_to_q7.c</a>
+: <a class="el" href="group__q15__to__x.html#ga837ce281d0e2d5fc445c48334307db19">arm_math.h</a>
+, <a class="el" href="group__q15__to__x.html#ga837ce281d0e2d5fc445c48334307db19">arm_q15_to_q7.c</a>
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-, <a class="el" href="group__q31__to__x.html#gacf407b007a37da18e99dabd9023c56b4">arm_q31_to_float.c</a>
+: <a class="el" href="group__q31__to__x.html#ga19a9d023aca1f99abd5da6f13a42b6cf">arm_math.h</a>
+, <a class="el" href="group__q31__to__x.html#ga19a9d023aca1f99abd5da6f13a42b6cf">arm_q31_to_float.c</a>
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-, <a class="el" href="group__q31__to__x.html#ga901dede4661365c9e7c630d3eb31c32c">arm_q31_to_q15.c</a>
+: <a class="el" href="group__q31__to__x.html#ga775f3a1996f00a8048c4b7acba2e0828">arm_math.h</a>
+, <a class="el" href="group__q31__to__x.html#ga775f3a1996f00a8048c4b7acba2e0828">arm_q31_to_q15.c</a>
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-, <a class="el" href="group__q31__to__x.html#ga7f297d1a7d776805395095fdb24a8071">arm_q31_to_q7.c</a>
+: <a class="el" href="group__q31__to__x.html#gabef5357eb3348b3b5b38915fffce8f3d">arm_math.h</a>
+, <a class="el" href="group__q31__to__x.html#gabef5357eb3348b3b5b38915fffce8f3d">arm_q31_to_q7.c</a>
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-, <a class="el" href="group__q7__to__x.html#ga656620f957b65512ed83db03fd455ec5">arm_q7_to_float.c</a>
+: <a class="el" href="group__q7__to__x.html#ga840d8a0e8499d02a54f459bb29f5d63c">arm_math.h</a>
+, <a class="el" href="group__q7__to__x.html#ga840d8a0e8499d02a54f459bb29f5d63c">arm_q7_to_float.c</a>
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-, <a class="el" href="group__q7__to__x.html#gabc02597fc3f01033daf43ec0547a2f78">arm_math.h</a>
+: <a class="el" href="group__q7__to__x.html#ga1023c3832ca6be3a6d17ef338cafa28b">arm_q7_to_q15.c</a>
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-, <a class="el" href="group__q7__to__x.html#gad8958cd3cb7f521466168b46a25b7908">arm_q7_to_q31.c</a>
+: <a class="el" href="group__q7__to__x.html#ga3c73bfb98fc5a1b4f612264662d0549c">arm_math.h</a>
+, <a class="el" href="group__q7__to__x.html#ga3c73bfb98fc5a1b4f612264662d0549c">arm_q7_to_q31.c</a>
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@@ -201,7 +201,7 @@
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/globals_r.html b/docs/DSP/html/globals_r.html
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--- a/docs/DSP/html/globals_r.html
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@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -148,56 +148,88 @@
 
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+: <a class="el" href="arm__cfft__radix2__f32_8c.html#aa0577fd1717a219c08235967d877731d">arm_cfft_radix2_f32.c</a>
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+: <a class="el" href="arm__cfft__radix2__q15_8c.html#a972f4e810203402dcf4cafdba7554a36">arm_cfft_radix2_q15.c</a>
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+: <a class="el" href="arm__cfft__radix2__q31_8c.html#a07d1c0ad42637bee8be7482cab5c8956">arm_cfft_radix2_q31.c</a>
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+: <a class="el" href="arm__cfft__radix2__q15_8c.html#abd0991b879ae7baf479040f8fbf82289">arm_cfft_radix2_q15.c</a>
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+: <a class="el" href="arm__cfft__radix2__q31_8c.html#a36c1ec7fd1c2aa80d50979b6bf2a55ef">arm_cfft_radix2_q31.c</a>
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+: <a class="el" href="arm__cfft__radix4__f32_8c.html#ab3c001e14852633e343079f97cd96f44">arm_cfft_radix4_f32.c</a>
+, <a class="el" href="arm__rfft__f32_8c.html#ab3c001e14852633e343079f97cd96f44">arm_rfft_f32.c</a>
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+: <a class="el" href="arm__cfft__q31_8c.html#a053363aef7c6b41a61af7730c638c79b">arm_cfft_q31.c</a>
+, <a class="el" href="arm__cfft__radix4__q31_8c.html#a053363aef7c6b41a61af7730c638c79b">arm_cfft_radix4_q31.c</a>
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+: <a class="el" href="arm__cfft__radix4__q15_8c.html#af337f7275e22af2196f61c94a0ca079a">arm_cfft_radix4_q15.c</a>
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+: <a class="el" href="arm__cfft__q31_8c.html#af4d3481332146c3c703bf494baf23c45">arm_cfft_q31.c</a>
+, <a class="el" href="arm__cfft__radix4__q31_8c.html#af4d3481332146c3c703bf494baf23c45">arm_cfft_radix4_q31.c</a>
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 , <a class="el" href="arm__cfft__radix8__f32_8c.html#a72350c6eaa1eef8796ab43c1497c6b9c">arm_cfft_radix8_f32.c</a>
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-: <a class="el" href="arm__math_8h.html#a39e9e34c2784ff8cf026430d1d84f54e">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#a1e370c58e45bbe92bb7763fe59cf5e57">arm_math.h</a>
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-: <a class="el" href="arm__math_8h.html#a71f6bee1ce1bb896739401ce962a7e6a">arm_math.h</a>
+: <a class="el" href="arm__math_8h.html#a3cedcf5a91d6c722c64330ec97e0853e">arm_math.h</a>
+</li>
+<li>arm_rfft_1024_fast_init_f32()
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+, <a class="el" href="group__RealFFT.html#ga71547c601079d55c2525204aa00ef9c2">arm_rfft_fast_init_f32.c</a>
+</li>
+<li>arm_rfft_128_fast_init_f32()
+: <a class="el" href="group__RealFFT.html#gade8432f9318953234761e8e0f2c9e1d2">arm_math.h</a>
+, <a class="el" href="group__RealFFT.html#gade8432f9318953234761e8e0f2c9e1d2">arm_rfft_fast_init_f32.c</a>
+</li>
+<li>arm_rfft_2048_fast_init_f32()
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+, <a class="el" href="group__RealFFT.html#ga33724310a8360ac289d5a835282f778c">arm_rfft_fast_init_f32.c</a>
+</li>
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+, <a class="el" href="group__RealFFT.html#ga678afbb042d942c3dd5a33877ef66492">arm_rfft_fast_init_f32.c</a>
+</li>
+<li>arm_rfft_32_fast_init_f32()
+: <a class="el" href="group__RealFFT.html#ga153c8faa97b7ab8b1aef75fe6ac1b3a2">arm_math.h</a>
+, <a class="el" href="group__RealFFT.html#ga153c8faa97b7ab8b1aef75fe6ac1b3a2">arm_rfft_fast_init_f32.c</a>
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+<li>arm_rfft_4096_fast_init_f32()
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+, <a class="el" href="group__RealFFT.html#gaad50a08bb8191e1a138b5f72a268727a">arm_rfft_fast_init_f32.c</a>
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+<li>arm_rfft_512_fast_init_f32()
+: <a class="el" href="group__RealFFT.html#ga9a0e72918318f9d1c03973eab379e580">arm_math.h</a>
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+<li>arm_rfft_64_fast_init_f32()
+: <a class="el" href="group__RealFFT.html#ga0f67de6a0e5d87011f35426112d2d91b">arm_math.h</a>
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-, <a class="el" href="group__RMS.html#ga0e3ab1b57da32d45388d1fa90d7fd88c">arm_rms_f32.c</a>
+: <a class="el" href="group__RMS.html#gaeb487e726e3755a7614a29c9d16a93e7">arm_rms_f32.c</a>
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-, <a class="el" href="group__RMS.html#gaf5b836b72dda9e5dfbbd17c7906fd13f">arm_math.h</a>
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-, <a class="el" href="group__RMS.html#gae33015fda23fc44e7ead5e5ed7e8d314">arm_math.h</a>
+: <a class="el" href="group__RMS.html#ga20586bc59cabbfc38a935c2448833dd2">arm_rms_q31.c</a>
+, <a class="el" href="group__RMS.html#ga20586bc59cabbfc38a935c2448833dd2">arm_math.h</a>
+</li>
+<li>read_q15x2()
+: <a class="el" href="arm__math_8h.html#a1eba08f198f867711068918c45026564">arm_math.h</a>
+</li>
+<li>read_q15x2_da()
+: <a class="el" href="arm__math_8h.html#ae7ddd4049745db9c70a5cd7e8068d1bb">arm_math.h</a>
+</li>
+<li>read_q15x2_ia()
+: <a class="el" href="arm__math_8h.html#a63675cbbd75b0ba77f5bb21c3b808095">arm_math.h</a>
+</li>
+<li>read_q7x4_da()
+: <a class="el" href="arm__math_8h.html#a57dbc6933462fd03c5345c660e0b9e78">arm_math.h</a>
+</li>
+<li>read_q7x4_ia()
+: <a class="el" href="arm__math_8h.html#a969ec542d2035cd9289f68f932cb626a">arm_math.h</a>
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-: <a class="el" href="group__RealFFT__Table.html#ga8b1ad947c470596674fa3364e16045c6">arm_rfft_init_f32.c</a>
+: <a class="el" href="group__RealFFT__Table.html#ga8b1ad947c470596674fa3364e16045c6">arm_common_tables.c</a>
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-, <a class="el" href="group__RealFFT__Table.html#ga11e84d0ee257a547f749b37dd0078d36">arm_rfft_init_q15.c</a>
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-, <a class="el" href="group__RealFFT__Table.html#gaf1592a6cf0504675205074a43c3728a2">arm_rfft_init_q31.c</a>
+: <a class="el" href="group__RealFFT__Table.html#gaf1592a6cf0504675205074a43c3728a2">arm_common_tables.h</a>
+, <a class="el" href="group__RealFFT__Table.html#gaf1592a6cf0504675205074a43c3728a2">arm_common_tables.c</a>
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-: <a class="el" href="group__RealFFT__Table.html#gac52f98b52a1f03bfac8b57a67ba07397">arm_rfft_init_f32.c</a>
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+, <a class="el" href="group__RealFFT__Table.html#ga1eb5745728a61c3715755f5d69a4a960">arm_common_tables.h</a>
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 <h3><a class="anchor" id="index_s"></a>- s -</h3><ul>
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-, <a class="el" href="group__scale.html#ga3487af88b112f682ee90589cd419e123">arm_scale_f32.c</a>
+: <a class="el" href="group__BasicScale.html#ga5e769c8e22da173674c6abca7291e713">arm_math.h</a>
+, <a class="el" href="group__BasicScale.html#ga5e769c8e22da173674c6abca7291e713">arm_scale_f32.c</a>
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-, <a class="el" href="group__scale.html#gafaac0e1927daffeb68a42719b53ea780">arm_math.h</a>
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-, <a class="el" href="group__scale.html#ga83e36cd82bf51ce35406a199e477d47c">arm_scale_q31.c</a>
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-, <a class="el" href="group__scale.html#gabc9fd3d37904c58df56492b351d21fb0">arm_math.h</a>
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-, <a class="el" href="group__shift.html#gaa1757e53279780107acc92cf100adb61">arm_shift_q15.c</a>
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+, <a class="el" href="group__BasicShift.html#gab7a2f614c2fcee25cb8bae4c2a6bc3ab">arm_shift_q15.c</a>
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-, <a class="el" href="group__shift.html#ga387dd8b7b87377378280978f16cdb13d">arm_shift_q31.c</a>
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+: <a class="el" href="arm__rfft__f32_8c.html#a522656f688f96b46d74ecced3d641ba7">arm_rfft_f32.c</a>
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+: <a class="el" href="arm__rfft__q15_8c.html#aa7c916585af6035f064a4f53d85de00a">arm_rfft_q15.c</a>
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+: <a class="el" href="group__SQRT.html#ga5f37f479666ee8ff9711b334286c60ed">arm_math.h</a>
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-, <a class="el" href="group__STD.html#ga39495e74f96116178be085c9dc7742f5">arm_math.h</a>
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+: <a class="el" href="arm__rfft__fast__f32_8c.html#a2f74435c5e0b3ea1ca2335e9119be7cc">arm_rfft_fast_f32.c</a>
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diff --git a/docs/DSP/html/globals_t.html b/docs/DSP/html/globals_t.html
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/globals_type.html b/docs/DSP/html/globals_type.html
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/globals_u.html b/docs/DSP/html/globals_u.html
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/globals_v.html b/docs/DSP/html/globals_v.html
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-, <a class="el" href="arm__common__tables_8c.html#a162819f8903f8b65ff40adc195aec214">arm_common_tables.c</a>
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-, <a class="el" href="arm__common__tables_8h.html#a56d3642e4ee33e3ada57ff11ecda1498">arm_common_tables.h</a>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
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-, <a class="el" href="arm__const__structs_8h.html#a9a2fcdb54300f75ef1fafe02954e9a61">arm_const_structs.h</a>
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 </li>
 <li>wire2
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 <li>wire3
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-, <a class="el" href="arm__variance__example__f32_8c.html#af61f43ad332a2322e43ced590b6d9768">arm_variance_example_f32.c</a>
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+, <a class="el" href="arm__signal__converge__example__f32_8c.html#a7e2cceadf6ec7f0aa0f698a680fa3a4b">arm_signal_converge_example_f32.c</a>
+</li>
+<li>write_q15x2()
+: <a class="el" href="arm__math_8h.html#a1c6d46f43d41c6ca1b7d6a0d8ed95036">arm_math.h</a>
+</li>
+<li>write_q15x2_ia()
+: <a class="el" href="arm__math_8h.html#a576a0e2a4667277b42c478dfda753dc6">arm_math.h</a>
+</li>
+<li>write_q7x4_ia()
+: <a class="el" href="arm__math_8h.html#a05bde59a4c7dd866d0a2e3e6fcac17bd">arm_math.h</a>
 </li>
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@@ -201,7 +218,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/globals_x.html b/docs/DSP/html/globals_x.html
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@@ -162,7 +162,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__BasicAbs.html b/docs/DSP/html/group__BasicAbs.html
index db3cffa..0fbe288 100644
--- a/docs/DSP/html/group__BasicAbs.html
+++ b/docs/DSP/html/group__BasicAbs.html
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@@ -116,18 +116,18 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga421b6275f9d35f50286c0ff3beceff02"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAbs.html#ga421b6275f9d35f50286c0ff3beceff02">arm_abs_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga421b6275f9d35f50286c0ff3beceff02"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point vector absolute value.  <a href="#ga421b6275f9d35f50286c0ff3beceff02">More...</a><br/></td></tr>
-<tr class="separator:ga421b6275f9d35f50286c0ff3beceff02"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga39f92964c9b649ba252e26ebe7b95594"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAbs.html#ga39f92964c9b649ba252e26ebe7b95594">arm_abs_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga39f92964c9b649ba252e26ebe7b95594"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 vector absolute value.  <a href="#ga39f92964c9b649ba252e26ebe7b95594">More...</a><br/></td></tr>
-<tr class="separator:ga39f92964c9b649ba252e26ebe7b95594"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga59eafcdcdb52da60d37f20aec6ff4577"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAbs.html#ga59eafcdcdb52da60d37f20aec6ff4577">arm_abs_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga59eafcdcdb52da60d37f20aec6ff4577"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector absolute value.  <a href="#ga59eafcdcdb52da60d37f20aec6ff4577">More...</a><br/></td></tr>
-<tr class="separator:ga59eafcdcdb52da60d37f20aec6ff4577"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gadc30985e33fbf96802a5a7954dece3b1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAbs.html#gadc30985e33fbf96802a5a7954dece3b1">arm_abs_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gadc30985e33fbf96802a5a7954dece3b1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector absolute value.  <a href="#gadc30985e33fbf96802a5a7954dece3b1">More...</a><br/></td></tr>
-<tr class="separator:gadc30985e33fbf96802a5a7954dece3b1"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0e8fc7df3033cdbe9cda8a766a46e6d9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAbs.html#ga0e8fc7df3033cdbe9cda8a766a46e6d9">arm_abs_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga0e8fc7df3033cdbe9cda8a766a46e6d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point vector absolute value.  <a href="#ga0e8fc7df3033cdbe9cda8a766a46e6d9">More...</a><br/></td></tr>
+<tr class="separator:ga0e8fc7df3033cdbe9cda8a766a46e6d9"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5cd90f9490ba8711c86e6f4bd7154359"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAbs.html#ga5cd90f9490ba8711c86e6f4bd7154359">arm_abs_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga5cd90f9490ba8711c86e6f4bd7154359"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 vector absolute value.  <a href="#ga5cd90f9490ba8711c86e6f4bd7154359">More...</a><br/></td></tr>
+<tr class="separator:ga5cd90f9490ba8711c86e6f4bd7154359"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga494bd5db5e2686d96f5548e80ba8ca89"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAbs.html#ga494bd5db5e2686d96f5548e80ba8ca89">arm_abs_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga494bd5db5e2686d96f5548e80ba8ca89"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector absolute value.  <a href="#ga494bd5db5e2686d96f5548e80ba8ca89">More...</a><br/></td></tr>
+<tr class="separator:ga494bd5db5e2686d96f5548e80ba8ca89"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga097f1938c72471930b4e5647de40c505"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAbs.html#ga097f1938c72471930b4e5647de40c505">arm_abs_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga097f1938c72471930b4e5647de40c505"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector absolute value.  <a href="#ga097f1938c72471930b4e5647de40c505">More...</a><br/></td></tr>
+<tr class="separator:ga097f1938c72471930b4e5647de40c505"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>Computes the absolute value of a vector on an element-by-element basis.</p>
@@ -135,14 +135,14 @@
     pDst[n] = abs(pSrc[n]),   0 &lt;= n &lt; blockSize.
 </pre><p>The functions support in-place computation allowing the source and destination pointers to reference the same memory buffer. There are separate functions for floating-point, Q7, Q15, and Q31 data types. </p>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga421b6275f9d35f50286c0ff3beceff02"></a>
+<a class="anchor" id="ga0e8fc7df3033cdbe9cda8a766a46e6d9"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_abs_f32 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -166,28 +166,24 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input buffer </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__signal__converge__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga39f92964c9b649ba252e26ebe7b95594"></a>
+<a class="anchor" id="ga5cd90f9490ba8711c86e6f4bd7154359"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_abs_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -211,28 +207,25 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input buffer </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a6e4703dc08d1b82eab7f5ef96edb59bb">__QSUB16()</a>, <a class="el" href="arm__math_8h.html#a1185d670d798aaf52eec13f0403f3407">__SIMD32_CONST</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga59eafcdcdb52da60d37f20aec6ff4577"></a>
+<a class="anchor" id="ga494bd5db5e2686d96f5548e80ba8ca89"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_abs_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -256,28 +249,25 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input buffer </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a15e896d0146c280e600d00f609832350">__QSUB()</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gadc30985e33fbf96802a5a7954dece3b1"></a>
+<a class="anchor" id="ga097f1938c72471930b4e5647de40c505"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_abs_q7 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -301,18 +291,15 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input buffer </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Conditions for optimum performance</dt><dd>Input and output buffers should be aligned by 32-bit</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a4690314b420f463093f1a2f68b5fb143">__QSUB8()</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Conditions for optimum performance</dt><dd>Input and output buffers should be aligned by 32-bit </dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F. </dd></dl>
 
 </div>
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@@ -321,7 +308,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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index acf9b22..beca012 100644
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 var group__BasicAbs =
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-    [ "arm_abs_f32", "group__BasicAbs.html#ga421b6275f9d35f50286c0ff3beceff02", null ],
-    [ "arm_abs_q15", "group__BasicAbs.html#ga39f92964c9b649ba252e26ebe7b95594", null ],
-    [ "arm_abs_q31", "group__BasicAbs.html#ga59eafcdcdb52da60d37f20aec6ff4577", null ],
-    [ "arm_abs_q7", "group__BasicAbs.html#gadc30985e33fbf96802a5a7954dece3b1", null ]
+    [ "arm_abs_f32", "group__BasicAbs.html#ga0e8fc7df3033cdbe9cda8a766a46e6d9", null ],
+    [ "arm_abs_q15", "group__BasicAbs.html#ga5cd90f9490ba8711c86e6f4bd7154359", null ],
+    [ "arm_abs_q31", "group__BasicAbs.html#ga494bd5db5e2686d96f5548e80ba8ca89", null ],
+    [ "arm_abs_q7", "group__BasicAbs.html#ga097f1938c72471930b4e5647de40c505", null ]
 ];
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diff --git a/docs/DSP/html/group__BasicAdd.html b/docs/DSP/html/group__BasicAdd.html
index 5d66e99..3d83aa7 100644
--- a/docs/DSP/html/group__BasicAdd.html
+++ b/docs/DSP/html/group__BasicAdd.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,18 +116,18 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga6a904a547413b10565dd1d251c6bafbd"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAdd.html#ga6a904a547413b10565dd1d251c6bafbd">arm_add_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga6a904a547413b10565dd1d251c6bafbd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point vector addition.  <a href="#ga6a904a547413b10565dd1d251c6bafbd">More...</a><br/></td></tr>
-<tr class="separator:ga6a904a547413b10565dd1d251c6bafbd"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gabb51285a41f511670bbff62fc0e1bf62"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAdd.html#gabb51285a41f511670bbff62fc0e1bf62">arm_add_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gabb51285a41f511670bbff62fc0e1bf62"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 vector addition.  <a href="#gabb51285a41f511670bbff62fc0e1bf62">More...</a><br/></td></tr>
-<tr class="separator:gabb51285a41f511670bbff62fc0e1bf62"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga24d6c3f7f8b9fae4847c0c3f26a39a3b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAdd.html#ga24d6c3f7f8b9fae4847c0c3f26a39a3b">arm_add_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga24d6c3f7f8b9fae4847c0c3f26a39a3b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector addition.  <a href="#ga24d6c3f7f8b9fae4847c0c3f26a39a3b">More...</a><br/></td></tr>
-<tr class="separator:ga24d6c3f7f8b9fae4847c0c3f26a39a3b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaed633f415a7840a66861debca2dfb96b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAdd.html#gaed633f415a7840a66861debca2dfb96b">arm_add_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaed633f415a7840a66861debca2dfb96b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector addition.  <a href="#gaed633f415a7840a66861debca2dfb96b">More...</a><br/></td></tr>
-<tr class="separator:gaed633f415a7840a66861debca2dfb96b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gabfef1e86e458314a61f4baa441d9765e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAdd.html#gabfef1e86e458314a61f4baa441d9765e">arm_add_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gabfef1e86e458314a61f4baa441d9765e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point vector addition.  <a href="#gabfef1e86e458314a61f4baa441d9765e">More...</a><br/></td></tr>
+<tr class="separator:gabfef1e86e458314a61f4baa441d9765e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gacea7c052f62fdd71c8f1a14f0495cbed"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAdd.html#gacea7c052f62fdd71c8f1a14f0495cbed">arm_add_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gacea7c052f62fdd71c8f1a14f0495cbed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 vector addition.  <a href="#gacea7c052f62fdd71c8f1a14f0495cbed">More...</a><br/></td></tr>
+<tr class="separator:gacea7c052f62fdd71c8f1a14f0495cbed"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga63e5862d90971bff4181b22bfa6ac753"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAdd.html#ga63e5862d90971bff4181b22bfa6ac753">arm_add_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga63e5862d90971bff4181b22bfa6ac753"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector addition.  <a href="#ga63e5862d90971bff4181b22bfa6ac753">More...</a><br/></td></tr>
+<tr class="separator:ga63e5862d90971bff4181b22bfa6ac753"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafaecefa2be70b02118c8a317e183f247"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicAdd.html#gafaecefa2be70b02118c8a317e183f247">arm_add_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gafaecefa2be70b02118c8a317e183f247"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector addition.  <a href="#gafaecefa2be70b02118c8a317e183f247">More...</a><br/></td></tr>
+<tr class="separator:gafaecefa2be70b02118c8a317e183f247"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>Element-by-element addition of two vectors.</p>
@@ -135,20 +135,20 @@
     pDst[n] = pSrcA[n] + pSrcB[n],   0 &lt;= n &lt; blockSize.
 </pre><p>There are separate functions for floating-point, Q7, Q15, and Q31 data types. </p>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga6a904a547413b10565dd1d251c6bafbd"></a>
+<a class="anchor" id="gabfef1e86e458314a61f4baa441d9765e"></a>
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         <tr>
           <td class="memname">void arm_add_f32 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -172,35 +172,31 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to first input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to second input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output vector </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__dotproduct__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gabb51285a41f511670bbff62fc0e1bf62"></a>
+<a class="anchor" id="gacea7c052f62fdd71c8f1a14f0495cbed"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_add_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -224,35 +220,32 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a08bea9cb2c311d925224c0d6829edb8c">__QADD16()</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga24d6c3f7f8b9fae4847c0c3f26a39a3b"></a>
+<a class="anchor" id="ga63e5862d90971bff4181b22bfa6ac753"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
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           <td class="memname">void arm_add_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -276,35 +269,32 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#ab9f3cfbfb0f12975ab91ddb179160dcb">__QADD()</a>, <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, and <a class="el" href="arm__math_8h.html#a9a94b78de0f083bd8fadf3c3abe40431">clip_q63_to_q31()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gaed633f415a7840a66861debca2dfb96b"></a>
+<a class="anchor" id="gafaecefa2be70b02118c8a317e183f247"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_add_q7 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -328,18 +318,15 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] will be saturated. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a937a37e831677294ecde7195ec9d68ee">__QADD8()</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] are saturated. </dd></dl>
 
 </div>
 </div>
@@ -348,7 +335,7 @@
 <!-- start footer part -->
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>Vector Dot Product</title>
+<title>CMSIS-DSP: Vector Dot Product</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
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+  $(document).ready(function() { searchBox.OnSelectItem(0); });
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+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-DSP
+   &#160;<span id="projectnumber">Version 1.7.0</span>
+   </div>
+   <div id="projectbrief">CMSIS DSP Software Library</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
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+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li><a href="modules.html"><span>Reference</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
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+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('group__BasicDotProd.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="summary">
+<a href="#func-members">Functions</a>  </div>
+  <div class="headertitle">
+<div class="title">Vector Dot Product<div class="ingroups"><a class="el" href="group__groupMath.html">Basic Math Functions</a></div></div>  </div>
+</div><!--header-->
+<div class="contents">
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
+Functions</h2></td></tr>
+<tr class="memitem:gadf26f6bc62d6416528663ad3e46fbf67"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicDotProd.html#gadf26f6bc62d6416528663ad3e46fbf67">arm_dot_prod_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *result)</td></tr>
+<tr class="memdesc:gadf26f6bc62d6416528663ad3e46fbf67"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of floating-point vectors.  <a href="#gadf26f6bc62d6416528663ad3e46fbf67">More...</a><br/></td></tr>
+<tr class="separator:gadf26f6bc62d6416528663ad3e46fbf67"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac2314012fbbf73bfd95ce8c57bc9ba69"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicDotProd.html#gac2314012fbbf73bfd95ce8c57bc9ba69">arm_dot_prod_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *result)</td></tr>
+<tr class="memdesc:gac2314012fbbf73bfd95ce8c57bc9ba69"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of Q15 vectors.  <a href="#gac2314012fbbf73bfd95ce8c57bc9ba69">More...</a><br/></td></tr>
+<tr class="separator:gac2314012fbbf73bfd95ce8c57bc9ba69"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafe3f9ace6c4576847eabf44ed7ca7b96"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicDotProd.html#gafe3f9ace6c4576847eabf44ed7ca7b96">arm_dot_prod_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *result)</td></tr>
+<tr class="memdesc:gafe3f9ace6c4576847eabf44ed7ca7b96"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of Q31 vectors.  <a href="#gafe3f9ace6c4576847eabf44ed7ca7b96">More...</a><br/></td></tr>
+<tr class="separator:gafe3f9ace6c4576847eabf44ed7ca7b96"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaadd347d5f5adf902c63f0b90ffc19538"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicDotProd.html#gaadd347d5f5adf902c63f0b90ffc19538">arm_dot_prod_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *result)</td></tr>
+<tr class="memdesc:gaadd347d5f5adf902c63f0b90ffc19538"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of Q7 vectors.  <a href="#gaadd347d5f5adf902c63f0b90ffc19538">More...</a><br/></td></tr>
+<tr class="separator:gaadd347d5f5adf902c63f0b90ffc19538"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>Computes the dot product of two vectors. The vectors are multiplied element-by-element and then summed.</p>
+<pre>
+    sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1]
+</pre><p>There are separate functions for floating-point, Q7, Q15, and Q31 data types. </p>
+<h2 class="groupheader">Function Documentation</h2>
+<a class="anchor" id="gadf26f6bc62d6416528663ad3e46fbf67"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_dot_prod_f32 </td>
+          <td>(</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramname"><em>pSrcA</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramname"><em>pSrcB</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>blockSize</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramname"><em>result</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input vector. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input vector. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector. </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">result</td><td>output result returned here. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="gac2314012fbbf73bfd95ce8c57bc9ba69"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_dot_prod_q15 </td>
+          <td>(</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramname"><em>pSrcA</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramname"><em>pSrcB</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>blockSize</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *&#160;</td>
+          <td class="paramname"><em>result</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">result</td><td>output result returned here </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these results are added to a 64-bit accumulator in 34.30 format. Nonsaturating additions are used and given that there are 33 guard bits in the accumulator there is no risk of overflow. The return result is in 34.30 format. </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="gafe3f9ace6c4576847eabf44ed7ca7b96"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_dot_prod_q31 </td>
+          <td>(</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramname"><em>pSrcA</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramname"><em>pSrcB</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>blockSize</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *&#160;</td>
+          <td class="paramname"><em>result</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input vector. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input vector. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector. </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">result</td><td>output result returned here. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these are truncated to 2.48 format by discarding the lower 14 bits. The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. There are 15 guard bits in the accumulator and there is no risk of overflow as long as the length of the vectors is less than 2^16 elements. The return result is in 16.48 format. </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="gaadd347d5f5adf902c63f0b90ffc19538"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_dot_prod_q7 </td>
+          <td>(</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramname"><em>pSrcA</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramname"><em>pSrcB</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>blockSize</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramname"><em>result</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">result</td><td>output result returned here </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these results are added to an accumulator in 18.14 format. Nonsaturating additions are used and there is no danger of wrap around as long as the vectors are less than 2^18 elements long. The return result is in 18.14 format. </dd></dl>
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/DSP/html/group__BasicDotProd.js b/docs/DSP/html/group__BasicDotProd.js
new file mode 100644
index 0000000..6b501de
--- /dev/null
+++ b/docs/DSP/html/group__BasicDotProd.js
@@ -0,0 +1,7 @@
+var group__BasicDotProd =
+[
+    [ "arm_dot_prod_f32", "group__BasicDotProd.html#gadf26f6bc62d6416528663ad3e46fbf67", null ],
+    [ "arm_dot_prod_q15", "group__BasicDotProd.html#gac2314012fbbf73bfd95ce8c57bc9ba69", null ],
+    [ "arm_dot_prod_q31", "group__BasicDotProd.html#gafe3f9ace6c4576847eabf44ed7ca7b96", null ],
+    [ "arm_dot_prod_q7", "group__BasicDotProd.html#gaadd347d5f5adf902c63f0b90ffc19538", null ]
+];
\ No newline at end of file
diff --git a/docs/DSP/html/group__BasicMult.html b/docs/DSP/html/group__BasicMult.html
index c28163e..52d667e 100644
--- a/docs/DSP/html/group__BasicMult.html
+++ b/docs/DSP/html/group__BasicMult.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,18 +116,18 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gaca3f0b8227da431ab29225b88888aa32"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicMult.html#gaca3f0b8227da431ab29225b88888aa32">arm_mult_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaca3f0b8227da431ab29225b88888aa32"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point vector multiplication.  <a href="#gaca3f0b8227da431ab29225b88888aa32">More...</a><br/></td></tr>
-<tr class="separator:gaca3f0b8227da431ab29225b88888aa32"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gafb0778d27ed98a2a6f2ecb7d48cc8c75"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicMult.html#gafb0778d27ed98a2a6f2ecb7d48cc8c75">arm_mult_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gafb0778d27ed98a2a6f2ecb7d48cc8c75"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 vector multiplication.  <a href="#gafb0778d27ed98a2a6f2ecb7d48cc8c75">More...</a><br/></td></tr>
-<tr class="separator:gafb0778d27ed98a2a6f2ecb7d48cc8c75"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga3528c0f54a0607acc603f0490d3ca6c6"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicMult.html#ga3528c0f54a0607acc603f0490d3ca6c6">arm_mult_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga3528c0f54a0607acc603f0490d3ca6c6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector multiplication.  <a href="#ga3528c0f54a0607acc603f0490d3ca6c6">More...</a><br/></td></tr>
-<tr class="separator:ga3528c0f54a0607acc603f0490d3ca6c6"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga16677275ed83ff0878da531e875c27ef"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicMult.html#ga16677275ed83ff0878da531e875c27ef">arm_mult_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga16677275ed83ff0878da531e875c27ef"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector multiplication.  <a href="#ga16677275ed83ff0878da531e875c27ef">More...</a><br/></td></tr>
-<tr class="separator:ga16677275ed83ff0878da531e875c27ef"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gacf950935141cad927bea886e88fd9e9b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicMult.html#gacf950935141cad927bea886e88fd9e9b">arm_mult_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gacf950935141cad927bea886e88fd9e9b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point vector multiplication.  <a href="#gacf950935141cad927bea886e88fd9e9b">More...</a><br/></td></tr>
+<tr class="separator:gacf950935141cad927bea886e88fd9e9b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaeeda8cdc2c7e79c8a26e905342a0bb17"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicMult.html#gaeeda8cdc2c7e79c8a26e905342a0bb17">arm_mult_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaeeda8cdc2c7e79c8a26e905342a0bb17"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 vector multiplication.  <a href="#gaeeda8cdc2c7e79c8a26e905342a0bb17">More...</a><br/></td></tr>
+<tr class="separator:gaeeda8cdc2c7e79c8a26e905342a0bb17"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf12c75306edf16759bdedd849984324e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicMult.html#gaf12c75306edf16759bdedd849984324e">arm_mult_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaf12c75306edf16759bdedd849984324e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector multiplication.  <a href="#gaf12c75306edf16759bdedd849984324e">More...</a><br/></td></tr>
+<tr class="separator:gaf12c75306edf16759bdedd849984324e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga7b852d225dd7e91f19107fdcea38a3cb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicMult.html#ga7b852d225dd7e91f19107fdcea38a3cb">arm_mult_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga7b852d225dd7e91f19107fdcea38a3cb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector multiplication.  <a href="#ga7b852d225dd7e91f19107fdcea38a3cb">More...</a><br/></td></tr>
+<tr class="separator:ga7b852d225dd7e91f19107fdcea38a3cb"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>Element-by-element multiplication of two vectors.</p>
@@ -135,20 +135,20 @@
     pDst[n] = pSrcA[n] * pSrcB[n],   0 &lt;= n &lt; blockSize.
 </pre><p>There are separate functions for floating-point, Q7, Q15, and Q31 data types. </p>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="gaca3f0b8227da431ab29225b88888aa32"></a>
+<a class="anchor" id="gacf950935141cad927bea886e88fd9e9b"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_mult_f32 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -172,35 +172,31 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input vector. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input vector. </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#gafd538d68886848bc090ec2b0d364cc81">arm_dct4_f32()</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gafb0778d27ed98a2a6f2ecb7d48cc8c75"></a>
+<a class="anchor" id="gaeeda8cdc2c7e79c8a26e905342a0bb17"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_mult_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -224,37 +220,32 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to first input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to second input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output vector </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga114cb9635059f678df291fcc887aaf2b">arm_dct4_q15()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga3528c0f54a0607acc603f0490d3ca6c6"></a>
+<a class="anchor" id="gaf12c75306edf16759bdedd849984324e"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
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           <td class="memname">void arm_mult_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -278,37 +269,32 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input vector. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input vector. </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, and <a class="el" href="arm__math_8h.html#a9a94b78de0f083bd8fadf3c3abe40431">clip_q63_to_q31()</a>.</p>
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#gad04d0baab6ed081d8e8afe02538eb80b">arm_dct4_q31()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] are saturated. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga16677275ed83ff0878da531e875c27ef"></a>
+<a class="anchor" id="ga7b852d225dd7e91f19107fdcea38a3cb"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_mult_q7 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -332,18 +318,15 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] will be saturated. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a3ebff224ad44c217fde9f530342e2960">__PACKq7</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] are saturated. </dd></dl>
 
 </div>
 </div>
@@ -352,7 +335,7 @@
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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     <a href="http://www.doxygen.org/index.html">
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-    [ "arm_mult_q7", "group__BasicMult.html#ga16677275ed83ff0878da531e875c27ef", null ]
+    [ "arm_mult_f32", "group__BasicMult.html#gacf950935141cad927bea886e88fd9e9b", null ],
+    [ "arm_mult_q15", "group__BasicMult.html#gaeeda8cdc2c7e79c8a26e905342a0bb17", null ],
+    [ "arm_mult_q31", "group__BasicMult.html#gaf12c75306edf16759bdedd849984324e", null ],
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+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>Vector Negate</title>
+<title>CMSIS-DSP: Vector Negate</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
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+<body>
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+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-DSP
+   &#160;<span id="projectnumber">Version 1.7.0</span>
+   </div>
+   <div id="projectbrief">CMSIS DSP Software Library</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
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+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li><a href="modules.html"><span>Reference</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
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+       class="ui-resizable-handle">
+  </div>
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+<script type="text/javascript">
+$(document).ready(function(){initNavTree('group__BasicNegate.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
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+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="summary">
+<a href="#func-members">Functions</a>  </div>
+  <div class="headertitle">
+<div class="title">Vector Negate<div class="ingroups"><a class="el" href="group__groupMath.html">Basic Math Functions</a></div></div>  </div>
+</div><!--header-->
+<div class="contents">
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
+Functions</h2></td></tr>
+<tr class="memitem:ga7d9cfa32eafae01d3dbdcaf05052f431"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicNegate.html#ga7d9cfa32eafae01d3dbdcaf05052f431">arm_negate_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga7d9cfa32eafae01d3dbdcaf05052f431"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a floating-point vector.  <a href="#ga7d9cfa32eafae01d3dbdcaf05052f431">More...</a><br/></td></tr>
+<tr class="separator:ga7d9cfa32eafae01d3dbdcaf05052f431"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga55b8bbbcd318d5142925bc221db30186"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicNegate.html#ga55b8bbbcd318d5142925bc221db30186">arm_negate_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga55b8bbbcd318d5142925bc221db30186"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a Q15 vector.  <a href="#ga55b8bbbcd318d5142925bc221db30186">More...</a><br/></td></tr>
+<tr class="separator:ga55b8bbbcd318d5142925bc221db30186"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad5054d19c205eebab5f2c6e42d8cbb3c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicNegate.html#gad5054d19c205eebab5f2c6e42d8cbb3c">arm_negate_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gad5054d19c205eebab5f2c6e42d8cbb3c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a Q31 vector.  <a href="#gad5054d19c205eebab5f2c6e42d8cbb3c">More...</a><br/></td></tr>
+<tr class="separator:gad5054d19c205eebab5f2c6e42d8cbb3c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaea178c9f486ed4704f8723a2efee271c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicNegate.html#gaea178c9f486ed4704f8723a2efee271c">arm_negate_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaea178c9f486ed4704f8723a2efee271c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a Q7 vector.  <a href="#gaea178c9f486ed4704f8723a2efee271c">More...</a><br/></td></tr>
+<tr class="separator:gaea178c9f486ed4704f8723a2efee271c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>Negates the elements of a vector.</p>
+<pre>
+    pDst[n] = -pSrc[n],   0 &lt;= n &lt; blockSize.
+</pre><p>The functions support in-place computation allowing the source and destination pointers to reference the same memory buffer. There are separate functions for floating-point, Q7, Q15, and Q31 data types. </p>
+<h2 class="groupheader">Function Documentation</h2>
+<a class="anchor" id="ga7d9cfa32eafae01d3dbdcaf05052f431"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_negate_f32 </td>
+          <td>(</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramname"><em>pSrc</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramname"><em>pDst</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>blockSize</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input vector. </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output vector. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga55b8bbbcd318d5142925bc221db30186"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_negate_q15 </td>
+          <td>(</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramname"><em>pSrc</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramname"><em>pDst</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>blockSize</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector. </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Conditions for optimum performance</dt><dd>Input and output buffers should be aligned by 32-bit </dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. The Q15 value -1 (0x8000) is saturated to the maximum allowable positive value 0x7FFF. </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="gad5054d19c205eebab5f2c6e42d8cbb3c"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_negate_q31 </td>
+          <td>(</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramname"><em>pSrc</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramname"><em>pDst</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>blockSize</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector. </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. The Q31 value -1 (0x80000000) is saturated to the maximum allowable positive value 0x7FFFFFFF. </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="gaea178c9f486ed4704f8723a2efee271c"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_negate_q7 </td>
+          <td>(</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramname"><em>pSrc</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramname"><em>pDst</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>blockSize</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector. </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector. </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. The Q7 value -1 (0x80) is saturated to the maximum allowable positive value 0x7F. </dd></dl>
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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+    [ "arm_negate_f32", "group__BasicNegate.html#ga7d9cfa32eafae01d3dbdcaf05052f431", null ],
+    [ "arm_negate_q15", "group__BasicNegate.html#ga55b8bbbcd318d5142925bc221db30186", null ],
+    [ "arm_negate_q31", "group__BasicNegate.html#gad5054d19c205eebab5f2c6e42d8cbb3c", null ],
+    [ "arm_negate_q7", "group__BasicNegate.html#gaea178c9f486ed4704f8723a2efee271c", null ]
+];
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+<title>CMSIS-DSP: Vector Offset</title>
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+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-DSP
+   &#160;<span id="projectnumber">Version 1.7.0</span>
+   </div>
+   <div id="projectbrief">CMSIS DSP Software Library</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
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+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
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+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
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+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="summary">
+<a href="#func-members">Functions</a>  </div>
+  <div class="headertitle">
+<div class="title">Vector Offset<div class="ingroups"><a class="el" href="group__groupMath.html">Basic Math Functions</a></div></div>  </div>
+</div><!--header-->
+<div class="contents">
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
+Functions</h2></td></tr>
+<tr class="memitem:ga4ea8c9e1829e3b4d297f87e4a40478ad"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicOffset.html#ga4ea8c9e1829e3b4d297f87e4a40478ad">arm_offset_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> offset, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga4ea8c9e1829e3b4d297f87e4a40478ad"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a floating-point vector.  <a href="#ga4ea8c9e1829e3b4d297f87e4a40478ad">More...</a><br/></td></tr>
+<tr class="separator:ga4ea8c9e1829e3b4d297f87e4a40478ad"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaffc78c4cda3e39b518d79cef293532b7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicOffset.html#gaffc78c4cda3e39b518d79cef293532b7">arm_offset_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> offset, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaffc78c4cda3e39b518d79cef293532b7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a Q15 vector.  <a href="#gaffc78c4cda3e39b518d79cef293532b7">More...</a><br/></td></tr>
+<tr class="separator:gaffc78c4cda3e39b518d79cef293532b7"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga55604198ef59f391a96ec95c188fca85"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicOffset.html#ga55604198ef59f391a96ec95c188fca85">arm_offset_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> offset, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga55604198ef59f391a96ec95c188fca85"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a Q31 vector.  <a href="#ga55604198ef59f391a96ec95c188fca85">More...</a><br/></td></tr>
+<tr class="separator:ga55604198ef59f391a96ec95c188fca85"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga26adad00c10390145b02080a53e782b4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicOffset.html#ga26adad00c10390145b02080a53e782b4">arm_offset_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> offset, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga26adad00c10390145b02080a53e782b4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a Q7 vector.  <a href="#ga26adad00c10390145b02080a53e782b4">More...</a><br/></td></tr>
+<tr class="separator:ga26adad00c10390145b02080a53e782b4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>Adds a constant offset to each element of a vector.</p>
+<pre>
+    pDst[n] = pSrc[n] + offset,   0 &lt;= n &lt; blockSize.
+</pre><p>The functions support in-place computation allowing the source and destination pointers to reference the same memory buffer. There are separate functions for floating-point, Q7, Q15, and Q31 data types. </p>
+<h2 class="groupheader">Function Documentation</h2>
+<a class="anchor" id="ga4ea8c9e1829e3b4d297f87e4a40478ad"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_offset_f32 </td>
+          <td>(</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramname"><em>pSrc</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td>
+          <td class="paramname"><em>offset</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramname"><em>pDst</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>blockSize</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">offset</td><td>is the offset to be added </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="gaffc78c4cda3e39b518d79cef293532b7"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_offset_q15 </td>
+          <td>(</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramname"><em>pSrc</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td>
+          <td class="paramname"><em>offset</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramname"><em>pDst</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>blockSize</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">offset</td><td>is the offset to be added </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga55604198ef59f391a96ec95c188fca85"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_offset_q31 </td>
+          <td>(</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramname"><em>pSrc</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td>
+          <td class="paramname"><em>offset</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramname"><em>pDst</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>blockSize</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">offset</td><td>is the offset to be added </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated. </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga26adad00c10390145b02080a53e782b4"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_offset_q7 </td>
+          <td>(</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramname"><em>pSrc</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a>&#160;</td>
+          <td class="paramname"><em>offset</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramname"><em>pDst</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>blockSize</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">offset</td><td>is the offset to be added </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] are saturated. </dd></dl>
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
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+    [ "arm_offset_q15", "group__BasicOffset.html#gaffc78c4cda3e39b518d79cef293532b7", null ],
+    [ "arm_offset_q31", "group__BasicOffset.html#ga55604198ef59f391a96ec95c188fca85", null ],
+    [ "arm_offset_q7", "group__BasicOffset.html#ga26adad00c10390145b02080a53e782b4", null ]
+];
\ No newline at end of file
diff --git a/docs/DSP/html/group__BasicScale.html b/docs/DSP/html/group__BasicScale.html
new file mode 100644
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+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>Vector Scale</title>
+<title>CMSIS-DSP: Vector Scale</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
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+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-DSP
+   &#160;<span id="projectnumber">Version 1.7.0</span>
+   </div>
+   <div id="projectbrief">CMSIS DSP Software Library</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
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+var searchBox = new SearchBox("searchBox", "search",false,'Search');
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+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li><a href="modules.html"><span>Reference</span></a></li>
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+          <img id="MSearchSelect" src="search/mag_sel.png"
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+$(document).ready(function(){initNavTree('group__BasicScale.html','');});
+</script>
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+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
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+        name="MSearchResults" id="MSearchResults">
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+</div>
+
+<div class="header">
+  <div class="summary">
+<a href="#func-members">Functions</a>  </div>
+  <div class="headertitle">
+<div class="title">Vector Scale<div class="ingroups"><a class="el" href="group__groupMath.html">Basic Math Functions</a></div></div>  </div>
+</div><!--header-->
+<div class="contents">
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
+Functions</h2></td></tr>
+<tr class="memitem:ga5e769c8e22da173674c6abca7291e713"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicScale.html#ga5e769c8e22da173674c6abca7291e713">arm_scale_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> scale, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga5e769c8e22da173674c6abca7291e713"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a floating-point vector by a scalar.  <a href="#ga5e769c8e22da173674c6abca7291e713">More...</a><br/></td></tr>
+<tr class="separator:ga5e769c8e22da173674c6abca7291e713"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4663809f04249df5ea186ea09335e687"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicScale.html#ga4663809f04249df5ea186ea09335e687">arm_scale_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> scaleFract, int8_t shift, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga4663809f04249df5ea186ea09335e687"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a Q15 vector by a scalar.  <a href="#ga4663809f04249df5ea186ea09335e687">More...</a><br/></td></tr>
+<tr class="separator:ga4663809f04249df5ea186ea09335e687"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga8b2b6ea2e39ca464e8f2cfdd937c022b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicScale.html#ga8b2b6ea2e39ca464e8f2cfdd937c022b">arm_scale_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> scaleFract, int8_t shift, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga8b2b6ea2e39ca464e8f2cfdd937c022b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a Q31 vector by a scalar.  <a href="#ga8b2b6ea2e39ca464e8f2cfdd937c022b">More...</a><br/></td></tr>
+<tr class="separator:ga8b2b6ea2e39ca464e8f2cfdd937c022b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0d135086c6b813251b47a0d127b75eb8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicScale.html#ga0d135086c6b813251b47a0d127b75eb8">arm_scale_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> scaleFract, int8_t shift, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga0d135086c6b813251b47a0d127b75eb8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a Q7 vector by a scalar.  <a href="#ga0d135086c6b813251b47a0d127b75eb8">More...</a><br/></td></tr>
+<tr class="separator:ga0d135086c6b813251b47a0d127b75eb8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>Multiply a vector by a scalar value. For floating-point data, the algorithm used is:</p>
+<pre>
+    pDst[n] = pSrc[n] * scale,   0 &lt;= n &lt; blockSize.
+</pre><p>In the fixed-point Q7, Q15, and Q31 functions, <code>scale</code> is represented by a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>. The shift allows the gain of the scaling operation to exceed 1.0. The algorithm used with fixed-point data is:</p>
+<pre>
+    pDst[n] = (pSrc[n] * scaleFract) &lt;&lt; shift,   0 &lt;= n &lt; blockSize.
+</pre><p>The overall scale factor applied to the fixed-point data is </p>
+<pre>
+    scale = scaleFract * 2^shift.
+</pre><p>The functions support in-place computation allowing the source and destination pointers to reference the same memory buffer. </p>
+<h2 class="groupheader">Function Documentation</h2>
+<a class="anchor" id="ga5e769c8e22da173674c6abca7291e713"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_scale_f32 </td>
+          <td>(</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramname"><em>pSrc</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td>
+          <td class="paramname"><em>scale</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramname"><em>pDst</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>blockSize</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">scale</td><td>scale factor to be applied </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga4663809f04249df5ea186ea09335e687"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_scale_q15 </td>
+          <td>(</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramname"><em>pSrc</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td>
+          <td class="paramname"><em>scaleFract</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">int8_t&#160;</td>
+          <td class="paramname"><em>shift</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramname"><em>pDst</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>blockSize</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">scaleFract</td><td>fractional portion of the scale value </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">shift</td><td>number of bits to shift the result by </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format. These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format. </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga8b2b6ea2e39ca464e8f2cfdd937c022b"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_scale_q31 </td>
+          <td>(</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramname"><em>pSrc</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td>
+          <td class="paramname"><em>scaleFract</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">int8_t&#160;</td>
+          <td class="paramname"><em>shift</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramname"><em>pDst</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>blockSize</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">scaleFract</td><td>fractional portion of the scale value </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">shift</td><td>number of bits to shift the result by </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format. These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format. </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga0d135086c6b813251b47a0d127b75eb8"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_scale_q7 </td>
+          <td>(</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramname"><em>pSrc</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a>&#160;</td>
+          <td class="paramname"><em>scaleFract</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">int8_t&#160;</td>
+          <td class="paramname"><em>shift</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramname"><em>pDst</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>blockSize</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">scaleFract</td><td>fractional portion of the scale value </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">shift</td><td>number of bits to shift the result by </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.7 format. These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format. </dd></dl>
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
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+    [ "arm_scale_q15", "group__BasicScale.html#ga4663809f04249df5ea186ea09335e687", null ],
+    [ "arm_scale_q31", "group__BasicScale.html#ga8b2b6ea2e39ca464e8f2cfdd937c022b", null ],
+    [ "arm_scale_q7", "group__BasicScale.html#ga0d135086c6b813251b47a0d127b75eb8", null ]
+];
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+<html xmlns="http://www.w3.org/1999/xhtml">
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+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>Vector Shift</title>
+<title>CMSIS-DSP: Vector Shift</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
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+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-DSP
+   &#160;<span id="projectnumber">Version 1.7.0</span>
+   </div>
+   <div id="projectbrief">CMSIS DSP Software Library</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
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+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li><a href="modules.html"><span>Reference</span></a></li>
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+$(document).ready(function(){initNavTree('group__BasicShift.html','');});
+</script>
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+<!-- window showing the filter options -->
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+     onmouseover="return searchBox.OnSearchSelectShow()"
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+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
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+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="summary">
+<a href="#func-members">Functions</a>  </div>
+  <div class="headertitle">
+<div class="title">Vector Shift<div class="ingroups"><a class="el" href="group__groupMath.html">Basic Math Functions</a></div></div>  </div>
+</div><!--header-->
+<div class="contents">
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
+Functions</h2></td></tr>
+<tr class="memitem:gab7a2f614c2fcee25cb8bae4c2a6bc3ab"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicShift.html#gab7a2f614c2fcee25cb8bae4c2a6bc3ab">arm_shift_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, int8_t shiftBits, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gab7a2f614c2fcee25cb8bae4c2a6bc3ab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shifts the elements of a Q15 vector a specified number of bits.  <a href="#gab7a2f614c2fcee25cb8bae4c2a6bc3ab">More...</a><br/></td></tr>
+<tr class="separator:gab7a2f614c2fcee25cb8bae4c2a6bc3ab"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gabc69335d1cf2eba1c469c8c8291f3589"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicShift.html#gabc69335d1cf2eba1c469c8c8291f3589">arm_shift_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, int8_t shiftBits, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gabc69335d1cf2eba1c469c8c8291f3589"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shifts the elements of a Q31 vector a specified number of bits.  <a href="#gabc69335d1cf2eba1c469c8c8291f3589">More...</a><br/></td></tr>
+<tr class="separator:gabc69335d1cf2eba1c469c8c8291f3589"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga87bbb3db84f2af6c38f4fc17cbecfd2e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicShift.html#ga87bbb3db84f2af6c38f4fc17cbecfd2e">arm_shift_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, int8_t shiftBits, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga87bbb3db84f2af6c38f4fc17cbecfd2e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shifts the elements of a Q7 vector a specified number of bits.  <a href="#ga87bbb3db84f2af6c38f4fc17cbecfd2e">More...</a><br/></td></tr>
+<tr class="separator:ga87bbb3db84f2af6c38f4fc17cbecfd2e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>Shifts the elements of a fixed-point vector by a specified number of bits. There are separate functions for Q7, Q15, and Q31 data types. The underlying algorithm used is:</p>
+<pre>
+    pDst[n] = pSrc[n] &lt;&lt; shift,   0 &lt;= n &lt; blockSize.
+</pre><p>If <code>shift</code> is positive then the elements of the vector are shifted to the left. If <code>shift</code> is negative then the elements of the vector are shifted to the right.</p>
+<p>The functions support in-place computation allowing the source and destination pointers to reference the same memory buffer. </p>
+<h2 class="groupheader">Function Documentation</h2>
+<a class="anchor" id="gab7a2f614c2fcee25cb8bae4c2a6bc3ab"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_shift_q15 </td>
+          <td>(</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramname"><em>pSrc</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">int8_t&#160;</td>
+          <td class="paramname"><em>shiftBits</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramname"><em>pDst</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>blockSize</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">shiftBits</td><td>number of bits to shift. A positive value shifts left; a negative value shifts right. </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="gabc69335d1cf2eba1c469c8c8291f3589"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_shift_q31 </td>
+          <td>(</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramname"><em>pSrc</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">int8_t&#160;</td>
+          <td class="paramname"><em>shiftBits</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramname"><em>pDst</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>blockSize</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">shiftBits</td><td>number of bits to shift. A positive value shifts left; a negative value shifts right. </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in the vector </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated. </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga87bbb3db84f2af6c38f4fc17cbecfd2e"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_shift_q7 </td>
+          <td>(</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramname"><em>pSrc</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">int8_t&#160;</td>
+          <td class="paramname"><em>shiftBits</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramname"><em>pDst</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>blockSize</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">shiftBits</td><td>number of bits to shift. A positive value shifts left; a negative value shifts right. </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>onditions for optimum performance</dt><dd>Input and output buffers should be aligned by 32-bit </dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] are saturated. </dd></dl>
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/DSP/html/group__BasicShift.js b/docs/DSP/html/group__BasicShift.js
new file mode 100644
index 0000000..0e14dcb
--- /dev/null
+++ b/docs/DSP/html/group__BasicShift.js
@@ -0,0 +1,6 @@
+var group__BasicShift =
+[
+    [ "arm_shift_q15", "group__BasicShift.html#gab7a2f614c2fcee25cb8bae4c2a6bc3ab", null ],
+    [ "arm_shift_q31", "group__BasicShift.html#gabc69335d1cf2eba1c469c8c8291f3589", null ],
+    [ "arm_shift_q7", "group__BasicShift.html#ga87bbb3db84f2af6c38f4fc17cbecfd2e", null ]
+];
\ No newline at end of file
diff --git a/docs/DSP/html/group__BasicSub.html b/docs/DSP/html/group__BasicSub.html
index 848763c..3508828 100644
--- a/docs/DSP/html/group__BasicSub.html
+++ b/docs/DSP/html/group__BasicSub.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,18 +116,18 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga7f975a472de286331134227c08aad826"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicSub.html#ga7f975a472de286331134227c08aad826">arm_sub_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga7f975a472de286331134227c08aad826"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point vector subtraction.  <a href="#ga7f975a472de286331134227c08aad826">More...</a><br/></td></tr>
-<tr class="separator:ga7f975a472de286331134227c08aad826"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga997a8ee93088d15bda23c325d455b588"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicSub.html#ga997a8ee93088d15bda23c325d455b588">arm_sub_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga997a8ee93088d15bda23c325d455b588"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 vector subtraction.  <a href="#ga997a8ee93088d15bda23c325d455b588">More...</a><br/></td></tr>
-<tr class="separator:ga997a8ee93088d15bda23c325d455b588"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga28aa6908d092752144413e21933dc878"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicSub.html#ga28aa6908d092752144413e21933dc878">arm_sub_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga28aa6908d092752144413e21933dc878"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector subtraction.  <a href="#ga28aa6908d092752144413e21933dc878">More...</a><br/></td></tr>
-<tr class="separator:ga28aa6908d092752144413e21933dc878"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab09941de7dfeb247e5c29b406a435fcc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicSub.html#gab09941de7dfeb247e5c29b406a435fcc">arm_sub_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gab09941de7dfeb247e5c29b406a435fcc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector subtraction.  <a href="#gab09941de7dfeb247e5c29b406a435fcc">More...</a><br/></td></tr>
-<tr class="separator:gab09941de7dfeb247e5c29b406a435fcc"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga76b8b2aec34269c6de0b090cab00fb33"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicSub.html#ga76b8b2aec34269c6de0b090cab00fb33">arm_sub_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga76b8b2aec34269c6de0b090cab00fb33"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point vector subtraction.  <a href="#ga76b8b2aec34269c6de0b090cab00fb33">More...</a><br/></td></tr>
+<tr class="separator:ga76b8b2aec34269c6de0b090cab00fb33"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga33a096c2860eca18bbc4e6966409064f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicSub.html#ga33a096c2860eca18bbc4e6966409064f">arm_sub_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga33a096c2860eca18bbc4e6966409064f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 vector subtraction.  <a href="#ga33a096c2860eca18bbc4e6966409064f">More...</a><br/></td></tr>
+<tr class="separator:ga33a096c2860eca18bbc4e6966409064f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga913159f71589b56dbfb03ddc1210a59c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicSub.html#ga913159f71589b56dbfb03ddc1210a59c">arm_sub_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga913159f71589b56dbfb03ddc1210a59c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 vector subtraction.  <a href="#ga913159f71589b56dbfb03ddc1210a59c">More...</a><br/></td></tr>
+<tr class="separator:ga913159f71589b56dbfb03ddc1210a59c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga162990b82a18231c4e606ba0e6584c7e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicSub.html#ga162990b82a18231c4e606ba0e6584c7e">arm_sub_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga162990b82a18231c4e606ba0e6584c7e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector subtraction.  <a href="#ga162990b82a18231c4e606ba0e6584c7e">More...</a><br/></td></tr>
+<tr class="separator:ga162990b82a18231c4e606ba0e6584c7e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>Element-by-element subtraction of two vectors.</p>
@@ -135,20 +135,20 @@
     pDst[n] = pSrcA[n] - pSrcB[n],   0 &lt;= n &lt; blockSize.
 </pre><p>There are separate functions for floating-point, Q7, Q15, and Q31 data types. </p>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga7f975a472de286331134227c08aad826"></a>
+<a class="anchor" id="ga76b8b2aec34269c6de0b090cab00fb33"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_sub_f32 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -172,35 +172,31 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__signal__converge__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
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-<a class="anchor" id="ga997a8ee93088d15bda23c325d455b588"></a>
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           <td class="memname">void arm_sub_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -224,35 +220,32 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a6e4703dc08d1b82eab7f5ef96edb59bb">__QSUB16()</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. </dd></dl>
 
 </div>
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           <td class="memname">void arm_sub_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
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         <tr>
@@ -276,35 +269,32 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a15e896d0146c280e600d00f609832350">__QSUB()</a>, <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, and <a class="el" href="arm__math_8h.html#a9a94b78de0f083bd8fadf3c3abe40431">clip_q63_to_q31()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gab09941de7dfeb247e5c29b406a435fcc"></a>
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           <td class="memname">void arm_sub_q7 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
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@@ -328,18 +318,15 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] will be saturated. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a4690314b420f463093f1a2f68b5fb143">__QSUB8()</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] will be saturated. </dd></dl>
 
 </div>
 </div>
@@ -348,7 +335,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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index 2ea3f1e..8dc747f 100644
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-    [ "arm_sub_q31", "group__BasicSub.html#ga28aa6908d092752144413e21933dc878", null ],
-    [ "arm_sub_q7", "group__BasicSub.html#gab09941de7dfeb247e5c29b406a435fcc", null ]
+    [ "arm_sub_f32", "group__BasicSub.html#ga76b8b2aec34269c6de0b090cab00fb33", null ],
+    [ "arm_sub_q15", "group__BasicSub.html#ga33a096c2860eca18bbc4e6966409064f", null ],
+    [ "arm_sub_q31", "group__BasicSub.html#ga913159f71589b56dbfb03ddc1210a59c", null ],
+    [ "arm_sub_q7", "group__BasicSub.html#ga162990b82a18231c4e606ba0e6584c7e", null ]
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 <table class="memberdecls">
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-<tr class="memdesc:gaba67d2ba2acbd428832f106de29b8627"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point bilinear interpolation.  <a href="#gaba67d2ba2acbd428832f106de29b8627">More...</a><br/></td></tr>
-<tr class="separator:gaba67d2ba2acbd428832f106de29b8627"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga79d374eda5d39e220b0423ba3cb90c6e"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BilinearInterpolate.html#ga79d374eda5d39e220b0423ba3cb90c6e">arm_bilinear_interp_q31</a> (<a class="el" href="structarm__bilinear__interp__instance__q31.html">arm_bilinear_interp_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> X, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Y)</td></tr>
-<tr class="memdesc:ga79d374eda5d39e220b0423ba3cb90c6e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 bilinear interpolation.  <a href="#ga79d374eda5d39e220b0423ba3cb90c6e">More...</a><br/></td></tr>
-<tr class="separator:ga79d374eda5d39e220b0423ba3cb90c6e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga5f9b61bcae6d9295d926810cf398dd53"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BilinearInterpolate.html#ga5f9b61bcae6d9295d926810cf398dd53">arm_bilinear_interp_q15</a> (<a class="el" href="structarm__bilinear__interp__instance__q15.html">arm_bilinear_interp_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> X, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Y)</td></tr>
-<tr class="memdesc:ga5f9b61bcae6d9295d926810cf398dd53"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 bilinear interpolation.  <a href="#ga5f9b61bcae6d9295d926810cf398dd53">More...</a><br/></td></tr>
-<tr class="separator:ga5f9b61bcae6d9295d926810cf398dd53"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga0a986d4a01039914a9d6e81e9a4ccda0"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BilinearInterpolate.html#ga0a986d4a01039914a9d6e81e9a4ccda0">arm_bilinear_interp_q7</a> (<a class="el" href="structarm__bilinear__interp__instance__q7.html">arm_bilinear_interp_instance_q7</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> X, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Y)</td></tr>
-<tr class="memdesc:ga0a986d4a01039914a9d6e81e9a4ccda0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 bilinear interpolation.  <a href="#ga0a986d4a01039914a9d6e81e9a4ccda0">More...</a><br/></td></tr>
-<tr class="separator:ga0a986d4a01039914a9d6e81e9a4ccda0"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memdesc:ga887756dbbe013d0a15b987836a787677"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point bilinear interpolation.  <a href="#ga887756dbbe013d0a15b987836a787677">More...</a><br/></td></tr>
+<tr class="separator:ga887756dbbe013d0a15b987836a787677"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaefe4731017e8b9ac652e5fea57cb1fa5"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BilinearInterpolate.html#gaefe4731017e8b9ac652e5fea57cb1fa5">arm_bilinear_interp_q31</a> (<a class="el" href="structarm__bilinear__interp__instance__q31.html">arm_bilinear_interp_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> X, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Y)</td></tr>
+<tr class="memdesc:gaefe4731017e8b9ac652e5fea57cb1fa5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 bilinear interpolation.  <a href="#gaefe4731017e8b9ac652e5fea57cb1fa5">More...</a><br/></td></tr>
+<tr class="separator:gaefe4731017e8b9ac652e5fea57cb1fa5"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga56fe34273ffb422f428b1d9feeffe0ea"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BilinearInterpolate.html#ga56fe34273ffb422f428b1d9feeffe0ea">arm_bilinear_interp_q15</a> (<a class="el" href="structarm__bilinear__interp__instance__q15.html">arm_bilinear_interp_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> X, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Y)</td></tr>
+<tr class="memdesc:ga56fe34273ffb422f428b1d9feeffe0ea"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 bilinear interpolation.  <a href="#ga56fe34273ffb422f428b1d9feeffe0ea">More...</a><br/></td></tr>
+<tr class="separator:ga56fe34273ffb422f428b1d9feeffe0ea"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1230bb062f6d8614db10b37ba7c9a161"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BilinearInterpolate.html#ga1230bb062f6d8614db10b37ba7c9a161">arm_bilinear_interp_q7</a> (<a class="el" href="structarm__bilinear__interp__instance__q7.html">arm_bilinear_interp_instance_q7</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> X, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Y)</td></tr>
+<tr class="memdesc:ga1230bb062f6d8614db10b37ba7c9a161"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 bilinear interpolation.  <a href="#ga1230bb062f6d8614db10b37ba7c9a161">More...</a><br/></td></tr>
+<tr class="separator:ga1230bb062f6d8614db10b37ba7c9a161"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid. The underlying function <code>f(x, y)</code> is sampled on a regular grid and the interpolation process determines values between the grid points. Bilinear interpolation is equivalent to two step linear interpolation, first in the x-dimension and then in the y-dimension. Bilinear interpolation is often used in image processing to rescale images. The CMSIS DSP library provides bilinear interpolation functions for Q7, Q15, Q31, and floating-point data types.</p>
@@ -154,12 +153,12 @@
 </pre> Note that the coordinates (x, y) contain integer and fractional components. The integer components specify which portion of the table to use while the fractional components control the interpolation processor.</dd></dl>
 <dl class="section user"><dt></dt><dd>if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output. </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="gaba67d2ba2acbd428832f106de29b8627"></a>
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+          <td class="memname">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> arm_bilinear_interp_f32 </td>
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 </dl>
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-<p>References <a class="el" href="structarm__bilinear__interp__instance__f32.html#aede17bebfb1f835b61d71dd813eab3f8">arm_bilinear_interp_instance_f32::numCols</a>, <a class="el" href="structarm__bilinear__interp__instance__f32.html#a34f2b17cc57b95011960df9718af6ed6">arm_bilinear_interp_instance_f32::numRows</a>, and <a class="el" href="structarm__bilinear__interp__instance__f32.html#afd1e764591c991c212d56c893efb5ea4">arm_bilinear_interp_instance_f32::pData</a>.</p>
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+          <td class="memname">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> arm_bilinear_interp_q15 </td>
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 </dl>
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-<p>References <a class="el" href="structarm__bilinear__interp__instance__q15.html#a7fa8772d01583374ff8ac18205a26a37">arm_bilinear_interp_instance_q15::numCols</a>, <a class="el" href="structarm__bilinear__interp__instance__q15.html#a2130ae30a804995a9f5d0e2189e08565">arm_bilinear_interp_instance_q15::numRows</a>, and <a class="el" href="structarm__bilinear__interp__instance__q15.html#a50d75b1316cee3e0dfad6dcc4c9a2954">arm_bilinear_interp_instance_q15::pData</a>.</p>
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+          <td class="memname">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> arm_bilinear_interp_q31 </td>
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@@ -279,16 +274,14 @@
 </dl>
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-<p>References <a class="el" href="structarm__bilinear__interp__instance__q31.html#a6c3eff4eb17ff1d43f170efb84713a2d">arm_bilinear_interp_instance_q31::numCols</a>, <a class="el" href="structarm__bilinear__interp__instance__q31.html#a2082e3eac56354d75291f03e96ce4aa5">arm_bilinear_interp_instance_q31::numRows</a>, and <a class="el" href="structarm__bilinear__interp__instance__q31.html#a843eae0c9db5f815e77e1aaf9afea358">arm_bilinear_interp_instance_q31::pData</a>.</p>
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+          <td class="memname">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> arm_bilinear_interp_q7 </td>
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@@ -322,8 +315,6 @@
 </dl>
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-<p>References <a class="el" href="structarm__bilinear__interp__instance__q7.html#a860dd0d24380ea06cfbb348fb3b12c9a">arm_bilinear_interp_instance_q7::numCols</a>, <a class="el" href="structarm__bilinear__interp__instance__q7.html#ad5a8067cab5f9ea4688b11a623e16607">arm_bilinear_interp_instance_q7::numRows</a>, and <a class="el" href="structarm__bilinear__interp__instance__q7.html#af05194d691bbefb02c34bafb22ca9ef0">arm_bilinear_interp_instance_q7::pData</a>.</p>
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@@ -331,7 +322,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/group__BilinearInterpolate.js b/docs/DSP/html/group__BilinearInterpolate.js
index 5d1b9df..2319c68 100644
--- a/docs/DSP/html/group__BilinearInterpolate.js
+++ b/docs/DSP/html/group__BilinearInterpolate.js
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+    [ "arm_bilinear_interp_q31", "group__BilinearInterpolate.html#gaefe4731017e8b9ac652e5fea57cb1fa5", null ],
+    [ "arm_bilinear_interp_q7", "group__BilinearInterpolate.html#ga1230bb062f6d8614db10b37ba7c9a161", null ]
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diff --git a/docs/DSP/html/group__BiquadCascadeDF1.html b/docs/DSP/html/group__BiquadCascadeDF1.html
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   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
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@@ -116,33 +116,33 @@
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 Functions</h2></td></tr>
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-<tr class="memdesc:gaa0dbe330d763e3c1d8030b3ef12d5bdc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point Biquad cascade filter.  <a href="#gaa0dbe330d763e3c1d8030b3ef12d5bdc">More...</a><br/></td></tr>
-<tr class="separator:gaa0dbe330d763e3c1d8030b3ef12d5bdc"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaffb9792c0220882efd4c58f3c6a05fd7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#gaffb9792c0220882efd4c58f3c6a05fd7">arm_biquad_cascade_df1_fast_q15</a> (const <a class="el" href="structarm__biquad__casd__df1__inst__q15.html">arm_biquad_casd_df1_inst_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaffb9792c0220882efd4c58f3c6a05fd7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.  <a href="#gaffb9792c0220882efd4c58f3c6a05fd7">More...</a><br/></td></tr>
-<tr class="separator:gaffb9792c0220882efd4c58f3c6a05fd7"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:ga456390f5e448afad3a38bed7d6e380e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.  <a href="#ga456390f5e448afad3a38bed7d6e380e3">More...</a><br/></td></tr>
-<tr class="separator:ga456390f5e448afad3a38bed7d6e380e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:gadd66a0aefdc645031d607b0a5b37a942"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:ga27b0c54da702713976e5202d20b4473f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 Biquad cascade filter.  <a href="#ga27b0c54da702713976e5202d20b4473f">More...</a><br/></td></tr>
-<tr class="separator:ga27b0c54da702713976e5202d20b4473f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga812eb9769adde4fed6d5ff4968a011d3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#ga812eb9769adde4fed6d5ff4968a011d3">arm_biquad_cascade_df1_f32</a> (const <a class="el" href="structarm__biquad__casd__df1__inst__f32.html">arm_biquad_casd_df1_inst_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga812eb9769adde4fed6d5ff4968a011d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point Biquad cascade filter.  <a href="#ga812eb9769adde4fed6d5ff4968a011d3">More...</a><br/></td></tr>
+<tr class="separator:ga812eb9769adde4fed6d5ff4968a011d3"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5008df017b9ce4046f35b61482009cbc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#ga5008df017b9ce4046f35b61482009cbc">arm_biquad_cascade_df1_fast_q15</a> (const <a class="el" href="structarm__biquad__casd__df1__inst__q15.html">arm_biquad_casd_df1_inst_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga5008df017b9ce4046f35b61482009cbc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 Biquad cascade filter (fast variant).  <a href="#ga5008df017b9ce4046f35b61482009cbc">More...</a><br/></td></tr>
+<tr class="separator:ga5008df017b9ce4046f35b61482009cbc"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa09ea758c0b24eed9ef92b8d1e5c80c2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#gaa09ea758c0b24eed9ef92b8d1e5c80c2">arm_biquad_cascade_df1_fast_q31</a> (const <a class="el" href="structarm__biquad__casd__df1__inst__q31.html">arm_biquad_casd_df1_inst_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaa09ea758c0b24eed9ef92b8d1e5c80c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 Biquad cascade filter (fast variant).  <a href="#gaa09ea758c0b24eed9ef92b8d1e5c80c2">More...</a><br/></td></tr>
+<tr class="separator:gaa09ea758c0b24eed9ef92b8d1e5c80c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad0b680d1c529d941e939d265b3c6ae59"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#gad0b680d1c529d941e939d265b3c6ae59">arm_biquad_cascade_df1_init_f32</a> (<a class="el" href="structarm__biquad__casd__df1__inst__f32.html">arm_biquad_casd_df1_inst_f32</a> *S, uint8_t numStages, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState)</td></tr>
+<tr class="memdesc:gad0b680d1c529d941e939d265b3c6ae59"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point Biquad cascade filter.  <a href="#gad0b680d1c529d941e939d265b3c6ae59">More...</a><br/></td></tr>
+<tr class="separator:gad0b680d1c529d941e939d265b3c6ae59"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1115256c79a0e22a3a54f8e627ac256f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#ga1115256c79a0e22a3a54f8e627ac256f">arm_biquad_cascade_df1_init_q15</a> (<a class="el" href="structarm__biquad__casd__df1__inst__q15.html">arm_biquad_casd_df1_inst_q15</a> *S, uint8_t numStages, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState, int8_t postShift)</td></tr>
+<tr class="memdesc:ga1115256c79a0e22a3a54f8e627ac256f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q15 Biquad cascade filter.  <a href="#ga1115256c79a0e22a3a54f8e627ac256f">More...</a><br/></td></tr>
+<tr class="separator:ga1115256c79a0e22a3a54f8e627ac256f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5563b156af44d1be2a7548626988bf4e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#ga5563b156af44d1be2a7548626988bf4e">arm_biquad_cascade_df1_init_q31</a> (<a class="el" href="structarm__biquad__casd__df1__inst__q31.html">arm_biquad_casd_df1_inst_q31</a> *S, uint8_t numStages, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState, int8_t postShift)</td></tr>
+<tr class="memdesc:ga5563b156af44d1be2a7548626988bf4e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 Biquad cascade filter.  <a href="#ga5563b156af44d1be2a7548626988bf4e">More...</a><br/></td></tr>
+<tr class="separator:ga5563b156af44d1be2a7548626988bf4e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga27af5bfa40dad7c877e48eedc8d67558"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#ga27af5bfa40dad7c877e48eedc8d67558">arm_biquad_cascade_df1_q15</a> (const <a class="el" href="structarm__biquad__casd__df1__inst__q15.html">arm_biquad_casd_df1_inst_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga27af5bfa40dad7c877e48eedc8d67558"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 Biquad cascade filter.  <a href="#ga27af5bfa40dad7c877e48eedc8d67558">More...</a><br/></td></tr>
+<tr class="separator:ga27af5bfa40dad7c877e48eedc8d67558"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4e7dad0ee6949005909fd4fcf1249b79"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1.html#ga4e7dad0ee6949005909fd4fcf1249b79">arm_biquad_cascade_df1_q31</a> (const <a class="el" href="structarm__biquad__casd__df1__inst__q31.html">arm_biquad_casd_df1_inst_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga4e7dad0ee6949005909fd4fcf1249b79"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 Biquad cascade filter.  <a href="#ga4e7dad0ee6949005909fd4fcf1249b79">More...</a><br/></td></tr>
+<tr class="separator:ga4e7dad0ee6949005909fd4fcf1249b79"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>This set of functions implements arbitrary order recursive (IIR) filters. The filters are implemented as a cascade of second order Biquad sections. The functions support Q15, Q31 and floating-point data types. Fast version of Q15 and Q31 also supported on CortexM4 and Cortex-M3.</p>
+<p>This set of functions implements arbitrary order recursive (IIR) filters. The filters are implemented as a cascade of second order Biquad sections. The functions support Q15, Q31 and floating-point data types. Fast version of Q15 and Q31 also available.</p>
 <p>The functions operate on blocks of input and output data and each call to the function processes <code>blockSize</code> samples through the filter. <code>pSrc</code> points to the array of input data and <code>pDst</code> points to the array of output data. Both arrays contain <code>blockSize</code> values.</p>
 <dl class="section user"><dt>Algorithm</dt><dd>Each Biquad stage implements a second order filter using the difference equation: <pre>
     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
@@ -150,20 +150,20 @@
 <img src="Biquad.gif" alt="Biquad.gif"/>
 <div class="caption">
 Single Biquad filter stage</div></div>
-Coefficients <code>b0, b1 and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients. Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients. Pay careful attention to the sign of the feedback coefficients. Some design tools use the difference equation <pre>
+ Coefficients <code>b0, b1 and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients. Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients. Pay careful attention to the sign of the feedback coefficients. Some design tools use the difference equation <pre>
     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
 </pre> In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.</dd></dl>
 <dl class="section user"><dt></dt><dd>Higher order filters are realized as a cascade of second order sections. <code>numStages</code> refers to the number of second order stages used. For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages. <div class="image">
 <img src="BiquadCascade.gif" alt="BiquadCascade.gif"/>
 <div class="caption">
 8th order filter using a cascade of Biquad stages</div></div>
-A 9th order filter would be realized with <code>numStages=5</code> second order stages with the coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).</dd></dl>
+ A 9th order filter would be realized with <code>numStages=5</code> second order stages with the coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).</dd></dl>
 <dl class="section user"><dt></dt><dd>The <code>pState</code> points to state variables array. Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>. The state variables are arranged in the <code>pState</code> array as: <pre>
     {x[n-1], x[n-2], y[n-1], y[n-2]}
 </pre></dd></dl>
 <dl class="section user"><dt></dt><dd>The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of <code>4*numStages</code> values. The state variables are updated after each block of data is processed, the coefficients are untouched.</dd></dl>
 <dl class="section user"><dt>Instance Structure</dt><dd>The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. There are separate instance structure declarations for each of the 3 supported data types.</dd></dl>
-<dl class="section user"><dt>Init Functions</dt><dd>There is also an associated initialization function for each data type. The initialization function performs following operations:<ul>
+<dl class="section user"><dt>Init Function</dt><dd>There is also an associated initialization function for each data type. The initialization function performs following operations:<ul>
 <li>Sets the values of the internal structure fields.</li>
 <li>Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numStages, pCoeffs, pState. Also set all of the values in pState to zero.</li>
 </ul>
@@ -179,19 +179,19 @@
 <li>Overflow and saturation</li>
 </ul>
 </dd></dl>
-<dl class="section user"><dt></dt><dd><b>Scaling of coefficients: </b> Filter coefficients are represented as fractional values and coefficients are restricted to lie in the range <code>[-1 +1)</code>. The fixed-point functions have an additional scaling parameter <code>postShift</code> which allow the filter coefficients to exceed the range <code>[+1 -1)</code>. At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits. <div class="image">
+<dl class="section user"><dt>Scaling of coefficients</dt><dd>Filter coefficients are represented as fractional values and coefficients are restricted to lie in the range <code>[-1 +1)</code>. The fixed-point functions have an additional scaling parameter <code>postShift</code> which allow the filter coefficients to exceed the range <code>[+1 -1)</code>. At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits. <div class="image">
 <img src="BiquadPostshift.gif" alt="BiquadPostshift.gif"/>
 <div class="caption">
 Fixed-point Biquad with shift by postShift bits after accumulator</div></div>
-This essentially scales the filter coefficients by <code>2^postShift</code>. For example, to realize the coefficients <pre>
+ This essentially scales the filter coefficients by <code>2^postShift</code>. For example, to realize the coefficients <pre>
    {1.5, -0.8, 1.2, 1.6, -0.9}
 </pre> set the pCoeffs array to: <pre>
    {0.75, -0.4, 0.6, 0.8, -0.45}
 </pre> and set <code>postShift=1</code></dd></dl>
-<dl class="section user"><dt></dt><dd><b>Filter gain: </b> The frequency response of a Biquad filter is a function of its coefficients. It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies. This means that an input signal with amplitude &lt; 1.0 may result in an output &gt; 1.0 and these are saturated or overflowed based on the implementation of the filter. To avoid this behavior the filter needs to be scaled down such that its peak gain &lt; 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.</dd></dl>
-<dl class="section user"><dt></dt><dd><b>Overflow and saturation: </b> For Q15 and Q31 versions, it is described separately as part of the function specific documentation below. </dd></dl>
+<dl class="section user"><dt>Filter gain</dt><dd>The frequency response of a Biquad filter is a function of its coefficients. It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies. This means that an input signal with amplitude &lt; 1.0 may result in an output &gt; 1.0 and these are saturated or overflowed based on the implementation of the filter. To avoid this behavior the filter needs to be scaled down such that its peak gain &lt; 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.</dd></dl>
+<dl class="section user"><dt>Overflow and saturation</dt><dd>For Q15 and Q31 versions, it is described separately as part of the function specific documentation below. </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="gaa0dbe330d763e3c1d8030b3ef12d5bdc"></a>
+<a class="anchor" id="ga812eb9769adde4fed6d5ff4968a011d3"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
@@ -204,7 +204,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -228,20 +228,18 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the floating-point Biquad cascade structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the floating-point Biquad cascade structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="structarm__biquad__casd__df1__inst__f32.html#af69820c37a87252c46453e4cfe120585">arm_biquad_casd_df1_inst_f32::numStages</a>, <a class="el" href="structarm__biquad__casd__df1__inst__f32.html#af9df3820576fb921809d1462c9c6d16c">arm_biquad_casd_df1_inst_f32::pCoeffs</a>, and <a class="el" href="structarm__biquad__casd__df1__inst__f32.html#a8c245d79e0d8cfabc82409d4b54fb682">arm_biquad_casd_df1_inst_f32::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gaffb9792c0220882efd4c58f3c6a05fd7"></a>
+<a class="anchor" id="ga5008df017b9ce4046f35b61482009cbc"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
@@ -254,7 +252,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -276,25 +274,23 @@
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q15 Biquad cascade structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q15 Biquad cascade structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process per call </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). The 2.30 accumulator is then shifted by <code>postShift</code> bits and the result truncated to 1.15 format by discarding the low 16 bits.</dd></dl>
-<dl class="section user"><dt></dt><dd>Refer to the function <code><a class="el" href="group__BiquadCascadeDF1.html#gadd66a0aefdc645031d607b0a5b37a942" title="Processing function for the Q15 Biquad cascade filter. ">arm_biquad_cascade_df1_q15()</a></code> for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure. Use the function <code><a class="el" href="group__BiquadCascadeDF1.html#gad54c724132f6d742a444eb6df0e9c731" title="Initialization function for the Q15 Biquad cascade filter. ">arm_biquad_cascade_df1_init_q15()</a></code> to initialize the filter structure. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#aa611fdbf6c56c46553701d6596a79aaf">__SMLAD()</a>, <a class="el" href="arm__math_8h.html#a2eed05660fedbe3fbd0b6dbb1315cfc3">__SMUAD()</a>, <a class="el" href="arm__math_8h.html#a9c58d7b4648a973d91e27544bc190e60">__SMUADX()</a>, <a class="el" href="structarm__biquad__casd__df1__inst__q15.html#ad6d95e70abcf4ff1300181415ad92153">arm_biquad_casd_df1_inst_q15::numStages</a>, <a class="el" href="structarm__biquad__casd__df1__inst__q15.html#a1edaacdebb5b09d7635bf20c779855fc">arm_biquad_casd_df1_inst_q15::pCoeffs</a>, <a class="el" href="structarm__biquad__casd__df1__inst__q15.html#ada7e9d6269e6ed4eacf8f68729e9832d">arm_biquad_casd_df1_inst_q15::postShift</a>, and <a class="el" href="structarm__biquad__casd__df1__inst__q15.html#a5481104ef2f8f81360b80b47d69ae932">arm_biquad_casd_df1_inst_q15::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). The 2.30 accumulator is then shifted by <code>postShift</code> bits and the result truncated to 1.15 format by discarding the low 16 bits. </dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__BiquadCascadeDF1.html#ga27af5bfa40dad7c877e48eedc8d67558">arm_biquad_cascade_df1_q15()</a> for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure. Use the function <a class="el" href="group__BiquadCascadeDF1.html#ga1115256c79a0e22a3a54f8e627ac256f">arm_biquad_cascade_df1_init_q15()</a> to initialize the filter structure. </dd></dl>
 
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
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@@ -329,25 +325,23 @@
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q31 Biquad cascade structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q31 Biquad cascade structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process per call </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are added to a 2.30 accumulator. Finally, the accumulator is saturated and converted to a 1.31 result. The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). Use the intialization function <a class="el" href="group__BiquadCascadeDF1.html#gaf42a44f9b16d61e636418c83eefe577b" title="Initialization function for the Q31 Biquad cascade filter. ">arm_biquad_cascade_df1_init_q31()</a> to initialize filter structure.</dd></dl>
-<dl class="section user"><dt></dt><dd>Refer to the function <code><a class="el" href="group__BiquadCascadeDF1.html#ga27b0c54da702713976e5202d20b4473f" title="Processing function for the Q31 Biquad cascade filter. ">arm_biquad_cascade_df1_q31()</a></code> for a slower implementation of this function which uses 64-bit accumulation to provide higher precision. Both the slow and the fast versions use the same instance structure. Use the function <code><a class="el" href="group__BiquadCascadeDF1.html#gaf42a44f9b16d61e636418c83eefe577b" title="Initialization function for the Q31 Biquad cascade filter. ">arm_biquad_cascade_df1_init_q31()</a></code> to initialize the filter structure. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a960f210642058d2b3d5368729a6e8375">mult_32x32_keep32_R</a>, <a class="el" href="arm__math_8h.html#aba3e538352fc7f9d6d15f9a18d469399">multAcc_32x32_keep32_R</a>, <a class="el" href="structarm__biquad__casd__df1__inst__q31.html#a2c2b579f1df1d8273a5d9d945c27e1b2">arm_biquad_casd_df1_inst_q31::numStages</a>, <a class="el" href="structarm__biquad__casd__df1__inst__q31.html#aa62366c632f3b5305086f841f079dbd2">arm_biquad_casd_df1_inst_q31::pCoeffs</a>, <a class="el" href="structarm__biquad__casd__df1__inst__q31.html#a636c7fbe09ec4bef0bc0a4b4e2151cbe">arm_biquad_casd_df1_inst_q31::postShift</a>, and <a class="el" href="structarm__biquad__casd__df1__inst__q31.html#a5dcf4727f58eb4e8e8b392508d8657bb">arm_biquad_casd_df1_inst_q31::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are added to a 2.30 accumulator. Finally, the accumulator is saturated and converted to a 1.31 result. The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). Use the intialization function <a class="el" href="group__BiquadCascadeDF1.html#ga5563b156af44d1be2a7548626988bf4e" title="Initialization function for the Q31 Biquad cascade filter. ">arm_biquad_cascade_df1_init_q31()</a> to initialize filter structure. </dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__BiquadCascadeDF1.html#ga4e7dad0ee6949005909fd4fcf1249b79">arm_biquad_cascade_df1_q31()</a> for a slower implementation of this function which uses 64-bit accumulation to provide higher precision. Both the slow and the fast versions use the same instance structure. Use the function <a class="el" href="group__BiquadCascadeDF1.html#ga5563b156af44d1be2a7548626988bf4e">arm_biquad_cascade_df1_init_q31()</a> to initialize the filter structure. </dd></dl>
 
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-<a class="anchor" id="ga8e73b69a788e681a61bccc8959d823c5"></a>
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           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pCoeffs</em>, </td>
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         <tr>
@@ -384,28 +378,25 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the floating-point Biquad cascade structure. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the floating-point Biquad cascade structure. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">numStages</td><td>number of 2nd order stages in the filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the filter coefficients array. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state array. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the filter coefficients. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer. </td></tr>
   </table>
   </dd>
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
-<p><b>Coefficient and State Ordering:</b></p>
-<dl class="section user"><dt></dt><dd>The coefficients are stored in the array <code>pCoeffs</code> in the following order: <pre>
+<dl class="section user"><dt>Coefficient and State Ordering</dt><dd>The coefficients are stored in the array <code>pCoeffs</code> in the following order: <pre>
     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
 </pre></dd></dl>
-<dl class="section user"><dt></dt><dd>where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage, <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage, and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.</dd></dl>
+<dl class="section user"><dt></dt><dd>where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage, <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage, and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values. </dd></dl>
 <dl class="section user"><dt></dt><dd>The <code>pState</code> is a pointer to state array. Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>. The state variables are arranged in the <code>pState</code> array as: <pre>
     {x[n-1], x[n-2], y[n-1], y[n-2]}
 </pre> The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of <code>4*numStages</code> values. The state variables are updated after each block of data is processed; the coefficients are untouched. </dd></dl>
 
-<p>References <a class="el" href="structarm__biquad__casd__df1__inst__f32.html#af69820c37a87252c46453e4cfe120585">arm_biquad_casd_df1_inst_f32::numStages</a>, <a class="el" href="structarm__biquad__casd__df1__inst__f32.html#af9df3820576fb921809d1462c9c6d16c">arm_biquad_casd_df1_inst_f32::pCoeffs</a>, and <a class="el" href="structarm__biquad__casd__df1__inst__f32.html#a8c245d79e0d8cfabc82409d4b54fb682">arm_biquad_casd_df1_inst_f32::pState</a>.</p>
-
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           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pCoeffs</em>, </td>
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         <tr>
@@ -448,28 +439,26 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q15 Biquad cascade structure. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q15 Biquad cascade structure. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">numStages</td><td>number of 2nd order stages in the filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the filter coefficients. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the filter coefficients. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">postShift</td><td>Shift to be applied to the accumulator result. Varies according to the coefficients format </td></tr>
   </table>
   </dd>
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
-<p><b>Coefficient and State Ordering:</b></p>
-<dl class="section user"><dt></dt><dd>The coefficients are stored in the array <code>pCoeffs</code> in the following order: <pre>
+<dl class="section user"><dt>Coefficient and State Ordering</dt><dd>The coefficients are stored in the array <code>pCoeffs</code> in the following order: <pre>
     {b10, 0, b11, b12, a11, a12, b20, 0, b21, b22, a21, a22, ...}
-</pre> where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage, <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage, and so on. The <code>pCoeffs</code> array contains a total of <code>6*numStages</code> values. The zero coefficient between <code>b1</code> and <code>b2</code> facilities use of 16-bit SIMD instructions on the Cortex-M4.</dd></dl>
+</pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage, <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage, and so on. The <code>pCoeffs</code> array contains a total of <code>6*numStages</code> values. The zero coefficient between <code>b1</code> and <code>b2</code> facilities use of 16-bit SIMD instructions on the Cortex-M4. </dd></dl>
 <dl class="section user"><dt></dt><dd>The state variables are stored in the array <code>pState</code>. Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>. The state variables are arranged in the <code>pState</code> array as: <pre>
     {x[n-1], x[n-2], y[n-1], y[n-2]}
 </pre> The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of <code>4*numStages</code> values. The state variables are updated after each block of data is processed; the coefficients are untouched. </dd></dl>
 
-<p>References <a class="el" href="structarm__biquad__casd__df1__inst__q15.html#ad6d95e70abcf4ff1300181415ad92153">arm_biquad_casd_df1_inst_q15::numStages</a>, <a class="el" href="structarm__biquad__casd__df1__inst__q15.html#a1edaacdebb5b09d7635bf20c779855fc">arm_biquad_casd_df1_inst_q15::pCoeffs</a>, <a class="el" href="structarm__biquad__casd__df1__inst__q15.html#ada7e9d6269e6ed4eacf8f68729e9832d">arm_biquad_casd_df1_inst_q15::postShift</a>, and <a class="el" href="structarm__biquad__casd__df1__inst__q15.html#a5481104ef2f8f81360b80b47d69ae932">arm_biquad_casd_df1_inst_q15::pState</a>.</p>
-
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-<a class="anchor" id="gaf42a44f9b16d61e636418c83eefe577b"></a>
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           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pCoeffs</em>, </td>
         </tr>
         <tr>
@@ -512,30 +501,26 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q31 Biquad cascade structure. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q31 Biquad cascade structure. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">numStages</td><td>number of 2nd order stages in the filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the filter coefficients buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the filter coefficients. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">postShift</td><td>Shift to be applied after the accumulator. Varies according to the coefficients format </td></tr>
   </table>
   </dd>
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
-<p><b>Coefficient and State Ordering:</b></p>
-<dl class="section user"><dt></dt><dd>The coefficients are stored in the array <code>pCoeffs</code> in the following order: <pre>
+<dl class="section user"><dt>Coefficient and State Ordering</dt><dd>The coefficients are stored in the array <code>pCoeffs</code> in the following order: <pre>
     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
-</pre> where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage, <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage, and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.</dd></dl>
+</pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage, <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage, and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values. </dd></dl>
 <dl class="section user"><dt></dt><dd>The <code>pState</code> points to state variables array. Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>. The state variables are arranged in the <code>pState</code> array as: <pre>
     {x[n-1], x[n-2], y[n-1], y[n-2]}
 </pre> The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of <code>4*numStages</code> values. The state variables are updated after each block of data is processed; the coefficients are untouched. </dd></dl>
 
-<p>References <a class="el" href="structarm__biquad__casd__df1__inst__q31.html#a2c2b579f1df1d8273a5d9d945c27e1b2">arm_biquad_casd_df1_inst_q31::numStages</a>, <a class="el" href="structarm__biquad__casd__df1__inst__q31.html#aa62366c632f3b5305086f841f079dbd2">arm_biquad_casd_df1_inst_q31::pCoeffs</a>, <a class="el" href="structarm__biquad__casd__df1__inst__q31.html#a636c7fbe09ec4bef0bc0a4b4e2151cbe">arm_biquad_casd_df1_inst_q31::postShift</a>, and <a class="el" href="structarm__biquad__casd__df1__inst__q31.html#a5dcf4727f58eb4e8e8b392508d8657bb">arm_biquad_casd_df1_inst_q31::pState</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__graphic__equalizer__example__q31_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
-
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q15 Biquad cascade structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q15 Biquad cascade structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
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-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. The accumulator is then shifted by <code>postShift</code> bits to truncate the result to 1.15 format by discarding the low 16 bits. Finally, the result is saturated to 1.15 format.</dd></dl>
-<dl class="section user"><dt></dt><dd>Refer to the function <code><a class="el" href="group__BiquadCascadeDF1.html#gaffb9792c0220882efd4c58f3c6a05fd7" title="Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-...">arm_biquad_cascade_df1_fast_q15()</a></code> for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a7aed02041f489a4f65dbd7093073d94e">__SMLALD()</a>, <a class="el" href="arm__math_8h.html#a2eed05660fedbe3fbd0b6dbb1315cfc3">__SMUAD()</a>, <a class="el" href="arm__math_8h.html#a9c58d7b4648a973d91e27544bc190e60">__SMUADX()</a>, <a class="el" href="structarm__biquad__casd__df1__inst__q15.html#ad6d95e70abcf4ff1300181415ad92153">arm_biquad_casd_df1_inst_q15::numStages</a>, <a class="el" href="structarm__biquad__casd__df1__inst__q15.html#a1edaacdebb5b09d7635bf20c779855fc">arm_biquad_casd_df1_inst_q15::pCoeffs</a>, <a class="el" href="structarm__biquad__casd__df1__inst__q15.html#ada7e9d6269e6ed4eacf8f68729e9832d">arm_biquad_casd_df1_inst_q15::postShift</a>, and <a class="el" href="structarm__biquad__casd__df1__inst__q15.html#a5481104ef2f8f81360b80b47d69ae932">arm_biquad_casd_df1_inst_q15::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. The accumulator is then shifted by <code>postShift</code> bits to truncate the result to 1.15 format by discarding the low 16 bits. Finally, the result is saturated to 1.15 format. </dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__BiquadCascadeDF1.html#ga5008df017b9ce4046f35b61482009cbc">arm_biquad_cascade_df1_fast_q15()</a> for a faster but less precise implementation of this filter. </dd></dl>
 
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-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q31 Biquad cascade structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
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-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25). After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by <code>postShift</code> bits and the result truncated to 1.31 format by discarding the low 32 bits.</dd></dl>
-<dl class="section user"><dt></dt><dd>Refer to the function <code><a class="el" href="group__BiquadCascadeDF1.html#ga456390f5e448afad3a38bed7d6e380e3" title="Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-...">arm_biquad_cascade_df1_fast_q31()</a></code> for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="structarm__biquad__casd__df1__inst__q31.html#a2c2b579f1df1d8273a5d9d945c27e1b2">arm_biquad_casd_df1_inst_q31::numStages</a>, <a class="el" href="structarm__biquad__casd__df1__inst__q31.html#aa62366c632f3b5305086f841f079dbd2">arm_biquad_casd_df1_inst_q31::pCoeffs</a>, <a class="el" href="structarm__biquad__casd__df1__inst__q31.html#a636c7fbe09ec4bef0bc0a4b4e2151cbe">arm_biquad_casd_df1_inst_q31::postShift</a>, and <a class="el" href="structarm__biquad__casd__df1__inst__q31.html#a5dcf4727f58eb4e8e8b392508d8657bb">arm_biquad_casd_df1_inst_q31::pState</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__graphic__equalizer__example__q31_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25). After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by <code>postShift</code> bits and the result truncated to 1.31 format by discarding the low 32 bits. </dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__BiquadCascadeDF1.html#gaa09ea758c0b24eed9ef92b8d1e5c80c2">arm_biquad_cascade_df1_fast_q31()</a> for a faster but less precise implementation of this filter. </dd></dl>
 
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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 Functions</h2></td></tr>
-<tr class="memitem:ga44900cecb8083afcaabf905ffcd656bb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1__32x64.html#ga44900cecb8083afcaabf905ffcd656bb">arm_biquad_cas_df1_32x64_init_q31</a> (<a class="el" href="structarm__biquad__cas__df1__32x64__ins__q31.html">arm_biquad_cas_df1_32x64_ins_q31</a> *S, uint8_t numStages, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *pState, uint8_t postShift)</td></tr>
-<tr class="separator:ga44900cecb8083afcaabf905ffcd656bb"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga426cd78591a717e87d66d1eaa9a3d074"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1__32x64.html#ga426cd78591a717e87d66d1eaa9a3d074">arm_biquad_cas_df1_32x64_init_q31</a> (<a class="el" href="structarm__biquad__cas__df1__32x64__ins__q31.html">arm_biquad_cas_df1_32x64_ins_q31</a> *S, uint8_t numStages, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *pState, uint8_t postShift)</td></tr>
+<tr class="memdesc:ga426cd78591a717e87d66d1eaa9a3d074"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 Biquad cascade 32x64 filter.  <a href="#ga426cd78591a717e87d66d1eaa9a3d074">More...</a><br/></td></tr>
+<tr class="separator:ga426cd78591a717e87d66d1eaa9a3d074"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga953a83e69685de6575cff37feb358a93"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF1__32x64.html#ga953a83e69685de6575cff37feb358a93">arm_biquad_cas_df1_32x64_q31</a> (const <a class="el" href="structarm__biquad__cas__df1__32x64__ins__q31.html">arm_biquad_cas_df1_32x64_ins_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga953a83e69685de6575cff37feb358a93"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 Biquad cascade 32x64 filter.  <a href="#ga953a83e69685de6575cff37feb358a93">More...</a><br/></td></tr>
 <tr class="separator:ga953a83e69685de6575cff37feb358a93"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
@@ -130,18 +132,18 @@
 <img src="Biquad.gif" alt="Biquad.gif"/>
 <div class="caption">
 Single Biquad filter stage</div></div>
-Coefficients <code>b0, b1, and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients. Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients. Pay careful attention to the sign of the feedback coefficients. Some design tools use the difference equation <pre>
+ Coefficients <code>b0, b1 and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients. Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients. Pay careful attention to the sign of the feedback coefficients. Some design tools use the difference equation <pre>
     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
-</pre> In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.</dd></dl>
+</pre> In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library. </dd></dl>
 <dl class="section user"><dt></dt><dd>Higher order filters are realized as a cascade of second order sections. <code>numStages</code> refers to the number of second order stages used. For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages. <div class="image">
 <img src="BiquadCascade.gif" alt="BiquadCascade.gif"/>
 <div class="caption">
 8th order filter using a cascade of Biquad stages</div></div>
-A 9th order filter would be realized with <code>numStages=5</code> second order stages with the coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).</dd></dl>
-<dl class="section user"><dt></dt><dd>The <code>pState</code> points to state variables array . Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code> and each state variable in 1.63 format to improve precision. The state variables are arranged in the array as: <pre>
+ A 9th order filter would be realized with <code>numStages=5</code> second order stages with the coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>). </dd></dl>
+<dl class="section user"><dt></dt><dd>The <code>pState</code> points to state variables array. Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code> and each state variable in 1.63 format to improve precision. The state variables are arranged in the array as: <pre>
     {x[n-1], x[n-2], y[n-1], y[n-2]}
-</pre></dd></dl>
-<dl class="section user"><dt></dt><dd>The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of <code>4*numStages</code> values of data in 1.63 format. The state variables are updated after each block of data is processed; the coefficients are untouched.</dd></dl>
+</pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of <code>4*numStages</code> values of data in 1.63 format. The state variables are updated after each block of data is processed, the coefficients are untouched.</dd></dl>
 <dl class="section user"><dt>Instance Structure</dt><dd>The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.</dd></dl>
 <dl class="section user"><dt>Init Function</dt><dd>There is also an associated initialization function which performs the following operations:<ul>
 <li>Sets the values of the internal structure fields.</li>
@@ -161,15 +163,15 @@
 <img src="BiquadPostshift.gif" alt="BiquadPostshift.gif"/>
 <div class="caption">
 Fixed-point Biquad with shift by postShift bits after accumulator</div></div>
-This essentially scales the filter coefficients by <code>2^postShift</code>. For example, to realize the coefficients <pre>
+ This essentially scales the filter coefficients by <code>2^postShift</code>. For example, to realize the coefficients <pre>
    {1.5, -0.8, 1.2, 1.6, -0.9}
 </pre> set the Coefficient array to: <pre>
    {0.75, -0.4, 0.6, 0.8, -0.45}
-</pre> and set <code>postShift=1</code></dd></dl>
-<dl class="section user"><dt></dt><dd>The second thing to keep in mind is the gain through the filter. The frequency response of a Biquad filter is a function of its coefficients. It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies. This means that an input signal with amplitude &lt; 1.0 may result in an output &gt; 1.0 and these are saturated or overflowed based on the implementation of the filter. To avoid this behavior the filter needs to be scaled down such that its peak gain &lt; 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.</dd></dl>
+</pre> and set <code>postShift=1</code> </dd></dl>
+<dl class="section user"><dt></dt><dd>The second thing to keep in mind is the gain through the filter. The frequency response of a Biquad filter is a function of its coefficients. It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies. This means that an input signal with amplitude &lt; 1.0 may result in an output &gt; 1.0 and these are saturated or overflowed based on the implementation of the filter. To avoid this behavior the filter needs to be scaled down such that its peak gain &lt; 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed. </dd></dl>
 <dl class="section user"><dt></dt><dd>The third item to consider is the overflow and saturation behavior of the fixed-point Q31 version. This is described in the function specific documentation below. </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga44900cecb8083afcaabf905ffcd656bb"></a>
+<a class="anchor" id="ga426cd78591a717e87d66d1eaa9a3d074"></a>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pCoeffs</em>, </td>
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@@ -212,27 +214,22 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the high precision Q31 Biquad cascade filter structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numStages</td><td>number of 2nd order stages in the filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the filter coefficients. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">postShift</td><td>Shift to be applied after the accumulator. Varies according to the coefficients format. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the high precision Q31 Biquad cascade filter structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numStages</td><td>number of 2nd order stages in the filter </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the filter coefficients </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">postShift</td><td>Shift to be applied after the accumulator. Varies according to the coefficients format </td></tr>
   </table>
   </dd>
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
-<p><b>Coefficient and State Ordering:</b></p>
-<dl class="section user"><dt></dt><dd>The coefficients are stored in the array <code>pCoeffs</code> in the following order: <pre>
+<dl class="section user"><dt>Coefficient and State Ordering</dt><dd>The coefficients are stored in the array <code>pCoeffs</code> in the following order: <pre>
     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
-</pre> where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage, <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage, and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.</dd></dl>
+</pre> where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage, <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage, and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values. </dd></dl>
 <dl class="section user"><dt></dt><dd>The <code>pState</code> points to state variables array and size of each state variable is 1.63 format. Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>. The state variables are arranged in the state array as: <pre>
     {x[n-1], x[n-2], y[n-1], y[n-2]}
 </pre> The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of <code>4*numStages</code> values. The state variables are updated after each block of data is processed; the coefficients are untouched. </dd></dl>
 
-<p>References <a class="el" href="structarm__biquad__cas__df1__32x64__ins__q31.html#ad7cb9a9f5df8f4fcfc7a0b633672e574">arm_biquad_cas_df1_32x64_ins_q31::numStages</a>, <a class="el" href="structarm__biquad__cas__df1__32x64__ins__q31.html#a490462d6ebe0fecfb6acbf51bed22ecf">arm_biquad_cas_df1_32x64_ins_q31::pCoeffs</a>, <a class="el" href="structarm__biquad__cas__df1__32x64__ins__q31.html#a8e9d58e8dba5aa3b2fc4f36d2ed07996">arm_biquad_cas_df1_32x64_ins_q31::postShift</a>, and <a class="el" href="structarm__biquad__cas__df1__32x64__ins__q31.html#a4c899cdfaf2bb955323e93637bd662e0">arm_biquad_cas_df1_32x64_ins_q31::pState</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__graphic__equalizer__example__q31_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
-
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@@ -272,20 +269,20 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the high precision Q31 Biquad cascade filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the high precision Q31 Biquad cascade filter </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt></dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25). After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by <code>postShift</code> bits and the result truncated to 1.31 format by discarding the low 32 bits.</dd></dl>
-<dl class="section user"><dt></dt><dd>Two related functions are provided in the CMSIS DSP library. <code><a class="el" href="group__BiquadCascadeDF1.html#ga27b0c54da702713976e5202d20b4473f" title="Processing function for the Q31 Biquad cascade filter. ">arm_biquad_cascade_df1_q31()</a></code> implements a Biquad cascade with 32-bit coefficients and state variables with a Q63 accumulator. <code><a class="el" href="group__BiquadCascadeDF1.html#ga456390f5e448afad3a38bed7d6e380e3" title="Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-...">arm_biquad_cascade_df1_fast_q31()</a></code> implements a Biquad cascade with 32-bit coefficients and state variables with a Q31 accumulator. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a24ad1cc3560b89335ee15f5b7e69b1f9">mult32x64()</a>, <a class="el" href="structarm__biquad__cas__df1__32x64__ins__q31.html#ad7cb9a9f5df8f4fcfc7a0b633672e574">arm_biquad_cas_df1_32x64_ins_q31::numStages</a>, <a class="el" href="structarm__biquad__cas__df1__32x64__ins__q31.html#a490462d6ebe0fecfb6acbf51bed22ecf">arm_biquad_cas_df1_32x64_ins_q31::pCoeffs</a>, <a class="el" href="structarm__biquad__cas__df1__32x64__ins__q31.html#a8e9d58e8dba5aa3b2fc4f36d2ed07996">arm_biquad_cas_df1_32x64_ins_q31::postShift</a>, and <a class="el" href="structarm__biquad__cas__df1__32x64__ins__q31.html#a4c899cdfaf2bb955323e93637bd662e0">arm_biquad_cas_df1_32x64_ins_q31::pState</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__graphic__equalizer__example__q31_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Details</dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25). After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by <code>postShift</code> bits and the result truncated to 1.31 format by discarding the low 32 bits. </dd></dl>
+<dl class="section user"><dt></dt><dd>Two related functions are provided in the CMSIS DSP library.<ul>
+<li><a class="el" href="group__BiquadCascadeDF1.html#ga4e7dad0ee6949005909fd4fcf1249b79">arm_biquad_cascade_df1_q31()</a> implements a Biquad cascade with 32-bit coefficients and state variables with a Q63 accumulator.</li>
+<li><a class="el" href="group__BiquadCascadeDF1.html#gaa09ea758c0b24eed9ef92b8d1e5c80c2">arm_biquad_cascade_df1_fast_q31()</a> implements a Biquad cascade with 32-bit coefficients and state variables with a Q31 accumulator. </li>
+</ul>
+</dd></dl>
 
 </div>
 </div>
@@ -294,7 +291,7 @@
 <!-- start footer part -->
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-<tr class="memdesc:ga114f373fbc16a314e9f293c7c7649c7f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point transposed direct form II Biquad cascade filter.  <a href="#ga114f373fbc16a314e9f293c7c7649c7f">More...</a><br/></td></tr>
-<tr class="separator:ga114f373fbc16a314e9f293c7c7649c7f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaecf9b22907e89fc35f097b50589cf86a"><td class="memItemLeft" align="right" valign="top">LOW_OPTIMIZATION_ENTER void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF2T.html#gaecf9b22907e89fc35f097b50589cf86a">arm_biquad_cascade_df2T_f32</a> (const <a class="el" href="structarm__biquad__cascade__df2T__instance__f32.html">arm_biquad_cascade_df2T_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaecf9b22907e89fc35f097b50589cf86a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point transposed direct form II Biquad cascade filter.  <a href="#gaecf9b22907e89fc35f097b50589cf86a">More...</a><br/></td></tr>
+<tr class="separator:gaecf9b22907e89fc35f097b50589cf86a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gaa8735dda5f3f36d0936283794c2aa771"><td class="memItemLeft" align="right" valign="top">LOW_OPTIMIZATION_ENTER void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF2T.html#gaa8735dda5f3f36d0936283794c2aa771">arm_biquad_cascade_df2T_f64</a> (const <a class="el" href="structarm__biquad__cascade__df2T__instance__f64.html">arm_biquad_cascade_df2T_instance_f64</a> *S, <a class="el" href="arm__math_8h.html#ac55f3ae81b5bc9053760baacf57e47f4">float64_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ac55f3ae81b5bc9053760baacf57e47f4">float64_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
 <tr class="memdesc:gaa8735dda5f3f36d0936283794c2aa771"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point transposed direct form II Biquad cascade filter.  <a href="#gaa8735dda5f3f36d0936283794c2aa771">More...</a><br/></td></tr>
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-<tr class="separator:ga70eaddf317a4a8bde6bd6a97df67fedd"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:gafd8b4068de567e9012e444f1c2320e1c"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 <tr class="memdesc:ga12dc5d8e8892806ad70e79ca2ff9f86e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point transposed direct form II Biquad cascade filter.  <a href="#ga12dc5d8e8892806ad70e79ca2ff9f86e">More...</a><br/></td></tr>
 <tr class="separator:ga12dc5d8e8892806ad70e79ca2ff9f86e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac75de449c3e4f733477d81bd0ada5eec"><td class="memItemLeft" align="right" valign="top">LOW_OPTIMIZATION_ENTER void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF2T.html#gac75de449c3e4f733477d81bd0ada5eec">arm_biquad_cascade_stereo_df2T_f32</a> (const <a class="el" href="structarm__biquad__cascade__stereo__df2T__instance__f32.html">arm_biquad_cascade_stereo_df2T_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gac75de449c3e4f733477d81bd0ada5eec"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point transposed direct form II Biquad cascade filter.  <a href="#gac75de449c3e4f733477d81bd0ada5eec">More...</a><br/></td></tr>
-<tr class="separator:gac75de449c3e4f733477d81bd0ada5eec"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga405197c89fe4d34003efd23786296425"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF2T.html#ga405197c89fe4d34003efd23786296425">arm_biquad_cascade_stereo_df2T_init_f32</a> (<a class="el" href="structarm__biquad__cascade__stereo__df2T__instance__f32.html">arm_biquad_cascade_stereo_df2T_instance_f32</a> *S, uint8_t numStages, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState)</td></tr>
-<tr class="memdesc:ga405197c89fe4d34003efd23786296425"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point transposed direct form II Biquad cascade filter.  <a href="#ga405197c89fe4d34003efd23786296425">More...</a><br/></td></tr>
-<tr class="separator:ga405197c89fe4d34003efd23786296425"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaeb8334e64307e85de36db947da04a6eb"><td class="memItemLeft" align="right" valign="top">LOW_OPTIMIZATION_ENTER void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF2T.html#gaeb8334e64307e85de36db947da04a6eb">arm_biquad_cascade_stereo_df2T_f32</a> (const <a class="el" href="structarm__biquad__cascade__stereo__df2T__instance__f32.html">arm_biquad_cascade_stereo_df2T_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaeb8334e64307e85de36db947da04a6eb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point transposed direct form II Biquad cascade filter.  <a href="#gaeb8334e64307e85de36db947da04a6eb">More...</a><br/></td></tr>
+<tr class="separator:gaeb8334e64307e85de36db947da04a6eb"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga31a77581f3cba5f360c84b160d770d98"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BiquadCascadeDF2T.html#ga31a77581f3cba5f360c84b160d770d98">arm_biquad_cascade_stereo_df2T_init_f32</a> (<a class="el" href="structarm__biquad__cascade__stereo__df2T__instance__f32.html">arm_biquad_cascade_stereo_df2T_instance_f32</a> *S, uint8_t numStages, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState)</td></tr>
+<tr class="memdesc:ga31a77581f3cba5f360c84b160d770d98"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point transposed direct form II Biquad cascade filter.  <a href="#ga31a77581f3cba5f360c84b160d770d98">More...</a><br/></td></tr>
+<tr class="separator:ga31a77581f3cba5f360c84b160d770d98"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure. The filters are implemented as a cascade of second order Biquad sections. These functions provide a slight memory savings as compared to the direct form I Biquad filter functions. Only floating-point data is supported.</p>
@@ -142,62 +142,33 @@
    y[n] = b0 * x[n] + d1
    d1 = b1 * x[n] + a1 * y[n] + d2
    d2 = b2 * x[n] + a2 * y[n]
-</pre> where d1 and d2 represent the two state values.</dd></dl>
+</pre> where d1 and d2 represent the two state values. </dd></dl>
 <dl class="section user"><dt></dt><dd>A Biquad filter using a transposed Direct Form II structure is shown below. <div class="image">
 <img src="BiquadDF2Transposed.gif" alt="BiquadDF2Transposed.gif"/>
 <div class="caption">
 Single transposed Direct Form II Biquad</div></div>
-Coefficients <code>b0, b1, and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients. Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients. Pay careful attention to the sign of the feedback coefficients. Some design tools flip the sign of the feedback coefficients: <pre>
+ Coefficients <code>b0, b1, and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients. Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients. Pay careful attention to the sign of the feedback coefficients. Some design tools flip the sign of the feedback coefficients: <pre>
    y[n] = b0 * x[n] + d1;
    d1 = b1 * x[n] - a1 * y[n] + d2;
    d2 = b2 * x[n] - a2 * y[n];
-</pre> In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.</dd></dl>
-<dl class="section user"><dt></dt><dd>Higher order filters are realized as a cascade of second order sections. <code>numStages</code> refers to the number of second order stages used. For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages. A 9th order filter would be realized with <code>numStages=5</code> second order stages with the coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).</dd></dl>
+</pre> In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library. </dd></dl>
+<dl class="section user"><dt></dt><dd>Higher order filters are realized as a cascade of second order sections. <code>numStages</code> refers to the number of second order stages used. For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages. A 9th order filter would be realized with <code>numStages=5</code> second order stages with the coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>). </dd></dl>
 <dl class="section user"><dt></dt><dd><code>pState</code> points to the state variable array. Each Biquad stage has 2 state variables <code>d1</code> and <code>d2</code>. The state variables are arranged in the <code>pState</code> array as: <pre>
     {d11, d12, d21, d22, ...}
-</pre> where <code>d1x</code> refers to the state variables for the first Biquad and <code>d2x</code> refers to the state variables for the second Biquad. The state array has a total length of <code>2*numStages</code> values. The state variables are updated after each block of data is processed; the coefficients are untouched.</dd></dl>
+</pre> where <code>d1x</code> refers to the state variables for the first Biquad and <code>d2x</code> refers to the state variables for the second Biquad. The state array has a total length of <code>2*numStages</code> values. The state variables are updated after each block of data is processed; the coefficients are untouched. </dd></dl>
 <dl class="section user"><dt></dt><dd>The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II. The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types. That is why the Direct Form I structure supports Q15 and Q31 data types. The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables <code>d1</code> and <code>d2</code>. Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad. The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.</dd></dl>
 <dl class="section user"><dt>Instance Structure</dt><dd>The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.</dd></dl>
 <dl class="section user"><dt>Init Functions</dt><dd>There is also an associated initialization function. The initialization function performs following operations:<ul>
 <li>Sets the values of the internal structure fields.</li>
-<li>Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numStages, pCoeffs, pState. Also set all of the values in pState to zero.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. For example, to statically initialize the instance structure use <pre>
-    <a class="el" href="structarm__biquad__cascade__df2T__instance__f32.html" title="Instance structure for the floating-point transposed direct form II Biquad cascade filter...">arm_biquad_cascade_df2T_instance_f32</a> S1 = {numStages, pState, pCoeffs};
-</pre> where <code>numStages</code> is the number of Biquad stages in the filter; <code>pState</code> is the address of the state buffer. <code>pCoeffs</code> is the address of the coefficient buffer;</dd></dl>
-<p>This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure. The filters are implemented as a cascade of second order Biquad sections. These functions provide a slight memory savings as compared to the direct form I Biquad filter functions. Only floating-point data is supported.</p>
-<p>This function operate on blocks of input and output data and each call to the function processes <code>blockSize</code> samples through the filter. <code>pSrc</code> points to the array of input data and <code>pDst</code> points to the array of output data. Both arrays contain <code>blockSize</code> values.</p>
-<dl class="section user"><dt>Algorithm</dt><dd>Each Biquad stage implements a second order filter using the difference equation: <pre>
-   y[n] = b0 * x[n] + d1
-   d1 = b1 * x[n] + a1 * y[n] + d2
-   d2 = b2 * x[n] + a2 * y[n]
-</pre> where d1 and d2 represent the two state values.</dd></dl>
-<dl class="section user"><dt></dt><dd>A Biquad filter using a transposed Direct Form II structure is shown below. <div class="image">
-<img src="BiquadDF2Transposed.gif" alt="BiquadDF2Transposed.gif"/>
-<div class="caption">
-Single transposed Direct Form II Biquad</div></div>
-Coefficients <code>b0, b1, and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients. Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients. Pay careful attention to the sign of the feedback coefficients. Some design tools flip the sign of the feedback coefficients: <pre>
-   y[n] = b0 * x[n] + d1;
-   d1 = b1 * x[n] - a1 * y[n] + d2;
-   d2 = b2 * x[n] - a2 * y[n];
-</pre> In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.</dd></dl>
-<dl class="section user"><dt></dt><dd>Higher order filters are realized as a cascade of second order sections. <code>numStages</code> refers to the number of second order stages used. For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages. A 9th order filter would be realized with <code>numStages=5</code> second order stages with the coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).</dd></dl>
-<dl class="section user"><dt></dt><dd><code>pState</code> points to the state variable array. Each Biquad stage has 2 state variables <code>d1</code> and <code>d2</code>. The state variables are arranged in the <code>pState</code> array as: <pre>
-    {d11, d12, d21, d22, ...}
-</pre> where <code>d1x</code> refers to the state variables for the first Biquad and <code>d2x</code> refers to the state variables for the second Biquad. The state array has a total length of <code>2*numStages</code> values. The state variables are updated after each block of data is processed; the coefficients are untouched.</dd></dl>
-<dl class="section user"><dt></dt><dd>The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II. The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types. That is why the Direct Form I structure supports Q15 and Q31 data types. The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables <code>d1</code> and <code>d2</code>. Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad. The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.</dd></dl>
-<dl class="section user"><dt>Instance Structure</dt><dd>The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.</dd></dl>
-<dl class="section user"><dt>Init Functions</dt><dd>There is also an associated initialization function. The initialization function performs following operations:<ul>
-<li>Sets the values of the internal structure fields.</li>
-<li>Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numStages, pCoeffs, pState. Also set all of the values in pState to zero.</li>
+<li>Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numStages, pCoeffs, pState. Also set all of the values in pState to zero. </li>
 </ul>
 </dd></dl>
 <dl class="section user"><dt></dt><dd>Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. For example, to statically initialize the instance structure use <pre>
     <a class="el" href="structarm__biquad__cascade__df2T__instance__f64.html" title="Instance structure for the floating-point transposed direct form II Biquad cascade filter...">arm_biquad_cascade_df2T_instance_f64</a> S1 = {numStages, pState, pCoeffs};
+    <a class="el" href="structarm__biquad__cascade__df2T__instance__f32.html" title="Instance structure for the floating-point transposed direct form II Biquad cascade filter...">arm_biquad_cascade_df2T_instance_f32</a> S1 = {numStages, pState, pCoeffs};
 </pre> where <code>numStages</code> is the number of Biquad stages in the filter; <code>pState</code> is the address of the state buffer. <code>pCoeffs</code> is the address of the coefficient buffer; </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga114f373fbc16a314e9f293c7c7649c7f"></a>
+<a class="anchor" id="gaecf9b22907e89fc35f097b50589cf86a"></a>
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@@ -210,7 +181,7 @@
         <tr>
           <td class="paramkey"></td>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -234,16 +205,14 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the filter data structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the filter data structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="structarm__biquad__cascade__df2T__instance__f32.html#a4d17958c33c3d0a905f974bac50f033f">arm_biquad_cascade_df2T_instance_f32::numStages</a>, <a class="el" href="structarm__biquad__cascade__df2T__instance__f32.html#a49a24fe1b6ad3b0b26779c32d8d80b2e">arm_biquad_cascade_df2T_instance_f32::pCoeffs</a>, and <a class="el" href="structarm__biquad__cascade__df2T__instance__f32.html#a24d223addfd926a7177088cf2efe76b1">arm_biquad_cascade_df2T_instance_f32::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -284,20 +253,18 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the filter data structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the filter data structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="structarm__biquad__cascade__df2T__instance__f64.html#ad55380ff835b533aa5168f836db8a4de">arm_biquad_cascade_df2T_instance_f64::numStages</a>, <a class="el" href="structarm__biquad__cascade__df2T__instance__f64.html#ae2f0180f9038c0393e1d6921bb3b878b">arm_biquad_cascade_df2T_instance_f64::pCoeffs</a>, and <a class="el" href="structarm__biquad__cascade__df2T__instance__f64.html#a0bde57b618e3f9059b23b0de64e12ce3">arm_biquad_cascade_df2T_instance_f64::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga70eaddf317a4a8bde6bd6a97df67fedd"></a>
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           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pCoeffs</em>, </td>
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@@ -334,22 +301,28 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the filter data structure. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the filter data structure. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">numStages</td><td>number of 2nd order stages in the filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the filter coefficients. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the filter coefficients. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer. </td></tr>
   </table>
   </dd>
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
-<p><b>Coefficient and State Ordering:</b> </p>
-<dl class="section user"><dt></dt><dd>The coefficients are stored in the array <code>pCoeffs</code> in the following order: <pre>
+<dl class="section user"><dt>Coefficient and State Ordering</dt><dd>The coefficients are stored in the array <code>pCoeffs</code> in the following order in the not Neon version. <pre>
     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
 </pre></dd></dl>
 <dl class="section user"><dt></dt><dd>where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage, <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage, and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.</dd></dl>
-<dl class="section user"><dt></dt><dd>The <code>pState</code> is a pointer to state array. Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code>. The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on. The state array has a total length of <code>2*numStages</code> values. The state variables are updated after each block of data is processed; the coefficients are untouched. </dd></dl>
-
-<p>References <a class="el" href="structarm__biquad__cascade__df2T__instance__f32.html#a4d17958c33c3d0a905f974bac50f033f">arm_biquad_cascade_df2T_instance_f32::numStages</a>, <a class="el" href="structarm__biquad__cascade__df2T__instance__f32.html#a49a24fe1b6ad3b0b26779c32d8d80b2e">arm_biquad_cascade_df2T_instance_f32::pCoeffs</a>, and <a class="el" href="structarm__biquad__cascade__df2T__instance__f32.html#a24d223addfd926a7177088cf2efe76b1">arm_biquad_cascade_df2T_instance_f32::pState</a>.</p>
+<p>For Neon version, this array is bigger. If numstages = 4x + y, then the array has size: 32*x + 5*y and it must be initialized using the function arm_biquad_cascade_df2T_compute_coefs_f32 which is taking the standard array coefficient as parameters.</p>
+<p>But, an array of 8*numstages is a good approximation.</p>
+<p>Then, the initialization can be done with: </p>
+<pre>
+                 arm_biquad_cascade_df2T_init_f32(&amp;SNeon, nbCascade, neonCoefs, stateNeon);
+                 arm_biquad_cascade_df2T_compute_coefs_f32(&amp;SNeon,nbCascade,coefs);
+</pre><dl class="section user"><dt>In this example, neonCoefs is a bigger array of size 8 * numStages.</dt><dd>coefs is the standard array:</dd></dl>
+<pre>
+    {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+</pre><dl class="section user"><dt></dt><dd>The <code>pState</code> is a pointer to state array. Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code>. The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on. The state array has a total length of <code>2*numStages</code> values. The state variables are updated after each block of data is processed; the coefficients are untouched. </dd></dl>
 
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-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the filter data structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numStages</td><td>number of 2nd order stages in the filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the filter coefficients. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the filter data structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numStages</td><td>number of 2nd order stages in the filter </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the filter coefficients </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer </td></tr>
   </table>
   </dd>
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
-<p><b>Coefficient and State Ordering:</b> </p>
-<dl class="section user"><dt></dt><dd>The coefficients are stored in the array <code>pCoeffs</code> in the following order: <pre>
+<dl class="section user"><dt>Coefficient and State Ordering</dt><dd>The coefficients are stored in the array <code>pCoeffs</code> in the following order: <pre>
     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
-</pre></dd></dl>
-<dl class="section user"><dt></dt><dd>where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage, <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage, and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.</dd></dl>
+</pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage, <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage, and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values. </dd></dl>
 <dl class="section user"><dt></dt><dd>The <code>pState</code> is a pointer to state array. Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code>. The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on. The state array has a total length of <code>2*numStages</code> values. The state variables are updated after each block of data is processed; the coefficients are untouched. </dd></dl>
 
-<p>References <a class="el" href="structarm__biquad__cascade__df2T__instance__f64.html#ad55380ff835b533aa5168f836db8a4de">arm_biquad_cascade_df2T_instance_f64::numStages</a>, <a class="el" href="structarm__biquad__cascade__df2T__instance__f64.html#ae2f0180f9038c0393e1d6921bb3b878b">arm_biquad_cascade_df2T_instance_f64::pCoeffs</a>, and <a class="el" href="structarm__biquad__cascade__df2T__instance__f64.html#a0bde57b618e3f9059b23b0de64e12ce3">arm_biquad_cascade_df2T_instance_f64::pState</a>.</p>
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+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
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 <p>Processing function for the floating-point transposed direct form II Biquad cascade filter. 2 channels.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the filter data structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the filter data structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="structarm__biquad__cascade__stereo__df2T__instance__f32.html#a5655328252da5c2c2425ceed253bc4f1">arm_biquad_cascade_stereo_df2T_instance_f32::numStages</a>, <a class="el" href="structarm__biquad__cascade__stereo__df2T__instance__f32.html#a58b15644de62a632c5e9d4a563569dc6">arm_biquad_cascade_stereo_df2T_instance_f32::pCoeffs</a>, and <a class="el" href="structarm__biquad__cascade__stereo__df2T__instance__f32.html#a2cb00048bb1fe957a03c1ff56dfaf8f0">arm_biquad_cascade_stereo_df2T_instance_f32::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
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+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
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-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the filter data structure. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the filter data structure. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">numStages</td><td>number of 2nd order stages in the filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the filter coefficients. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the filter coefficients. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer. </td></tr>
   </table>
   </dd>
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
-<p><b>Coefficient and State Ordering:</b> </p>
-<dl class="section user"><dt></dt><dd>The coefficients are stored in the array <code>pCoeffs</code> in the following order: <pre>
+<dl class="section user"><dt>Coefficient and State Ordering</dt><dd>The coefficients are stored in the array <code>pCoeffs</code> in the following order: <pre>
     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
-</pre></dd></dl>
-<dl class="section user"><dt></dt><dd>where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage, <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage, and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.</dd></dl>
+</pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage, <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage, and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values. </dd></dl>
 <dl class="section user"><dt></dt><dd>The <code>pState</code> is a pointer to state array. Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code> for each channel. The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on. The state array has a total length of <code>2*numStages</code> values. The state variables are updated after each block of data is processed; the coefficients are untouched. </dd></dl>
 
-<p>References <a class="el" href="structarm__biquad__cascade__stereo__df2T__instance__f32.html#a5655328252da5c2c2425ceed253bc4f1">arm_biquad_cascade_stereo_df2T_instance_f32::numStages</a>, <a class="el" href="structarm__biquad__cascade__stereo__df2T__instance__f32.html#a58b15644de62a632c5e9d4a563569dc6">arm_biquad_cascade_stereo_df2T_instance_f32::pCoeffs</a>, and <a class="el" href="structarm__biquad__cascade__stereo__df2T__instance__f32.html#a2cb00048bb1fe957a03c1ff56dfaf8f0">arm_biquad_cascade_stereo_df2T_instance_f32::pState</a>.</p>
-
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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+<tr class="memdesc:gae247e83ad50d474107254e25b36ad42b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Table for bit reversal process.  <a href="#gae247e83ad50d474107254e25b36ad42b">More...</a><br/></td></tr>
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+<tr class="memdesc:gae75e243ec61706427314270f222e0c8e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point Twiddle factors Table Generation.  <a href="#gae75e243ec61706427314270f222e0c8e">More...</a><br/></td></tr>
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+<tr class="memdesc:gaef4697e1ba348c4ac9358f2b9e279e93"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 Twiddle factors Table.  <a href="#gaef4697e1ba348c4ac9358f2b9e279e93">More...</a><br/></td></tr>
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 <tr class="memitem:ga8e4e2e05f4a3112184c96cb3308d6c39"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CFFT__CIFFT.html#ga8e4e2e05f4a3112184c96cb3308d6c39">twiddleCoef_16_q15</a> [24]</td></tr>
+<tr class="memdesc:ga8e4e2e05f4a3112184c96cb3308d6c39"><td class="mdescLeft">&#160;</td><td class="mdescRight">q15 Twiddle factors Table  <a href="#ga8e4e2e05f4a3112184c96cb3308d6c39">More...</a><br/></td></tr>
 <tr class="separator:ga8e4e2e05f4a3112184c96cb3308d6c39"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gac194a4fe04a19051ae1811f69c6e5df2"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CFFT__CIFFT.html#gac194a4fe04a19051ae1811f69c6e5df2">twiddleCoef_32_q15</a> [48]</td></tr>
 <tr class="separator:gac194a4fe04a19051ae1811f69c6e5df2"><td class="memSeparator" colspan="2">&#160;</td></tr>
@@ -185,24 +189,22 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Pseudo code for Generation of Bit reversal Table is </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(l=1;l &lt;= N/4;l++)
+<dl class="section user"><dt></dt><dd><pre>for (l = 1; l &lt;= N/4; l++)
 {
-  for(i=0;i&lt;logN2;i++)
+  for (i = 0; i&lt; logN2; i++)
   {
-    a[i]=l&amp;(1&lt;&lt;i);
+    a[i] = l &amp; (1 &lt;&lt; i);
   }
-  for(j=0; j&lt;logN2; j++)
+  for (j = 0; j &lt; logN2; j++)
   {
-    if (a[j]!=0)
-    y[l]+=(1&lt;&lt;((logN2-1)-j));
+    if (a[j] != 0)
+    y[l] += (1 &lt;&lt; ((logN2 - 1) - j));
   }
   y[l] = y[l] &gt;&gt; 1;
  } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 4096 logN2 = 12 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 4096, logN2 = 12 </dd></dl>
 <dl class="section user"><dt></dt><dd>N is the maximum FFT Size supported </dd></dl>
 
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#gac9565e6bc7229577ecf5e090313cafd7">arm_cfft_radix2_init_f32()</a>, <a class="el" href="group__ComplexFFT.html#ga5c5b2127b3c4ea2d03692127f8543858">arm_cfft_radix2_init_q15()</a>, <a class="el" href="group__ComplexFFT.html#gabec9611e77382f31e152668bf6b4b638">arm_cfft_radix2_init_q31()</a>, <a class="el" href="group__ComplexFFT.html#gaf336459f684f0b17bfae539ef1b1b78a">arm_cfft_radix4_init_f32()</a>, <a class="el" href="group__ComplexFFT.html#ga0c2acfda3126c452e75b81669e8ad9ef">arm_cfft_radix4_init_q15()</a>, and <a class="el" href="group__ComplexFFT.html#gad5caaafeec900c8ff72321c01bbd462c">arm_cfft_radix4_init_q31()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="ga27c056eb130a4333d1cc5dd43ec738b1"></a>
@@ -215,16 +217,14 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for Floating-point Twiddle factors Generation: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; N/; i++)
+<dl class="section user"><dt></dt><dd><pre>for (i = 0; i&lt; N/; i++)
 {
-      twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-      twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
+      twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+      twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 1024 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 1024, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are in interleaved fashion </dd></dl>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="ga8a0ec95d866fe96b740e77d6e1356b59"></a>
@@ -237,12 +237,12 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for q15 Twiddle factors Generation:: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; 3N/4; i++)
+<dl class="section user"><dt></dt><dd><pre>for (i = 0; i&lt; 3N/4; i++)
 {
-   twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-   twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
+   twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+   twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 1024 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 1024, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are interleaved fashion </dd></dl>
 <dl class="section user"><dt></dt><dd>Convert Floating point to q15(Fixed point 1.15): round(twiddleCoefq15(i) * pow(2, 15)) </dd></dl>
 
@@ -258,12 +258,12 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for Q31 Twiddle factors Generation:: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; 3N/4; i++)
+<dl class="section user"><dt></dt><dd><pre>for (i = 0; i&lt; 3N/4; i++)
 {
-   twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-   twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
+   twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+   twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 1024 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 1024, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are interleaved fashion </dd></dl>
 <dl class="section user"><dt></dt><dd>Convert Floating point to Q31(Fixed point 1.31): round(twiddleCoefQ31(i) * pow(2, 31)) </dd></dl>
 
@@ -279,16 +279,14 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for Floating-point Twiddle factors Generation: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; N/; i++)
+<dl class="section user"><dt></dt><dd><pre>for (i = 0; i&lt; N/; i++)
 {
-      twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-      twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
+      twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+      twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 128 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 128, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are in interleaved fashion </dd></dl>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="gabfdd1c5cd2b3f96da5fe5f07c707a8e5"></a>
@@ -301,12 +299,12 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for q15 Twiddle factors Generation:: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; 3N/4; i++)
+<dl class="section user"><dt></dt><dd><pre>for (i = 0; i&lt; 3N/4; i++)
 {
-   twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-   twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
+   twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+   twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 128 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 128, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are interleaved fashion </dd></dl>
 <dl class="section user"><dt></dt><dd>Convert Floating point to q15(Fixed point 1.15): round(twiddleCoefq15(i) * pow(2, 15)) </dd></dl>
 
@@ -322,12 +320,12 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for Q31 Twiddle factors Generation:: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; 3N/4; i++)
+<dl class="section user"><dt></dt><dd><pre>for (i = 0; i &lt; 3N/4; i++)
 {
-   twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-   twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
+   twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+   twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 128 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 128, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are interleaved fashion </dd></dl>
 <dl class="section user"><dt></dt><dd>Convert Floating point to Q31(Fixed point 1.31): round(twiddleCoefQ31(i) * pow(2, 31)) </dd></dl>
 
@@ -343,16 +341,14 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for Floating-point Twiddle factors Generation: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; N/; i++)
+<dl class="section user"><dt></dt><dd><pre>for (i = 0; i &lt; N/; i++)
 {
-      twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-      twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
+      twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+      twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 16 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 16, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are in interleaved fashion </dd></dl>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="ga8e4e2e05f4a3112184c96cb3308d6c39"></a>
@@ -365,12 +361,12 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for q15 Twiddle factors Generation:: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; 3N/4; i++)
+<dl class="section user"><dt></dt><dd><pre>fori = 0; i&lt; 3N/4; i++)
 {
-   twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-   twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
+   twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+   twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 16 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 16, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are interleaved fashion </dd></dl>
 <dl class="section user"><dt></dt><dd>Convert Floating point to q15(Fixed point 1.15): round(twiddleCoefq15(i) * pow(2, 15)) </dd></dl>
 
@@ -386,12 +382,12 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for Q31 Twiddle factors Generation:: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; 3N/4; i++)
+<dl class="section user"><dt></dt><dd><pre> for(i = 0; i&lt; 3N/4; i++)
 {
-   twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-   twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
+   twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+   twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 16 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 16, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are interleaved fashion </dd></dl>
 <dl class="section user"><dt></dt><dd>Convert Floating point to Q31(Fixed point 1.31): round(twiddleCoefQ31(i) * pow(2, 31)) </dd></dl>
 
@@ -407,16 +403,14 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for Floating-point Twiddle factors Generation: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; N/; i++)
+<dl class="section user"><dt></dt><dd><pre>for (i = 0; i&lt; N/; i++)
 {
-      twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-      twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
+      twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+      twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 2048 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 2048, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are in interleaved fashion </dd></dl>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="gadd16ce08ffd1048c385e0534a3b19cbb"></a>
@@ -429,12 +423,12 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for q15 Twiddle factors Generation:: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; 3N/4; i++)
+<dl class="section user"><dt></dt><dd><pre>for (i = 0; i&lt; 3N/4; i++)
 {
-   twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-   twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
+   twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+   twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 2048 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 2048, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are interleaved fashion </dd></dl>
 <dl class="section user"><dt></dt><dd>Convert Floating point to q15(Fixed point 1.15): round(twiddleCoefq15(i) * pow(2, 15)) </dd></dl>
 
@@ -450,12 +444,12 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for Q31 Twiddle factors Generation:: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; 3N/4; i++)
+<dl class="section user"><dt></dt><dd><pre>for (i = 0; i&lt; 3N/4; i++)
 {
-   twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-   twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
+   twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+   twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 2048 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 2048, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are interleaved fashion </dd></dl>
 <dl class="section user"><dt></dt><dd>Convert Floating point to Q31(Fixed point 1.31): round(twiddleCoefQ31(i) * pow(2, 31)) </dd></dl>
 
@@ -473,14 +467,12 @@
 <dl class="section user"><dt></dt><dd>Example code for Floating-point Twiddle factors Generation: </dd></dl>
 <dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; N/; i++)
 {
-      twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-      twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
+      twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+      twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 256 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 256, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are in interleaved fashion </dd></dl>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="ga6099ae5262a0a3a8d9ce1e6da02f0c2e"></a>
@@ -493,12 +485,12 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for q15 Twiddle factors Generation:: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; 3N/4; i++)
+<dl class="section user"><dt></dt><dd><pre>for (i = 0; i&lt; 3N/4; i++)
 {
-   twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-   twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
+   twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+   twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 256 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 256, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are interleaved fashion </dd></dl>
 <dl class="section user"><dt></dt><dd>Convert Floating point to q15(Fixed point 1.15): round(twiddleCoefq15(i) * pow(2, 15)) </dd></dl>
 
@@ -514,12 +506,12 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for Q31 Twiddle factors Generation:: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; 3N/4; i++)
+<dl class="section user"><dt></dt><dd><pre>for (i = 0; i&lt; 3N/4; i++)
 {
-   twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-   twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
+   twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+   twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 256 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 256, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are interleaved fashion </dd></dl>
 <dl class="section user"><dt></dt><dd>Convert Floating point to Q31(Fixed point 1.31): round(twiddleCoefQ31(i) * pow(2, 31)) </dd></dl>
 
@@ -535,16 +527,14 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for Floating-point Twiddle factors Generation: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; N/; i++)
+<dl class="section user"><dt></dt><dd><pre>for (i = 0; i&lt; N/; i++)
 {
-      twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-      twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
+      twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+      twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 32 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 32, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are in interleaved fashion </dd></dl>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="gac194a4fe04a19051ae1811f69c6e5df2"></a>
@@ -557,12 +547,12 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for q15 Twiddle factors Generation:: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; 3N/4; i++)
+<dl class="section user"><dt></dt><dd><pre>for (i = 0; i&lt; 3N/4; i++)
 {
-   twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-   twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
+   twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+   twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 32 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 32, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are interleaved fashion </dd></dl>
 <dl class="section user"><dt></dt><dd>Convert Floating point to q15(Fixed point 1.15): round(twiddleCoefq15(i) * pow(2, 15)) </dd></dl>
 
@@ -578,12 +568,12 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for Q31 Twiddle factors Generation:: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; 3N/4; i++)
+<dl class="section user"><dt></dt><dd><pre>for (i = 0; i&lt; 3N/4; i++)
 {
-   twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-   twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
+   twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+   twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 32 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 32, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are interleaved fashion </dd></dl>
 <dl class="section user"><dt></dt><dd>Convert Floating point to Q31(Fixed point 1.31): round(twiddleCoefQ31(i) * pow(2, 31)) </dd></dl>
 
@@ -599,12 +589,12 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for Floating-point Twiddle factors Generation: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; N/; i++)
+<dl class="section user"><dt></dt><dd><pre>for (i = 0; i&lt; N/; i++)
 {
-      twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-      twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
+      twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+      twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 4096 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 4096, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are in interleaved fashion </dd></dl>
 
 </div>
@@ -619,17 +609,15 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for q15 Twiddle factors Generation:: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; 3N/4; i++)
+<dl class="section user"><dt></dt><dd><pre>for (i = 0; i&lt; 3N/4; i++)
 {
-   twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-   twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
+   twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+   twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 4096 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 4096, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are interleaved fashion </dd></dl>
 <dl class="section user"><dt></dt><dd>Convert Floating point to q15(Fixed point 1.15): round(twiddleCoefq15(i) * pow(2, 15)) </dd></dl>
 
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga5c5b2127b3c4ea2d03692127f8543858">arm_cfft_radix2_init_q15()</a>, and <a class="el" href="group__ComplexFFT.html#ga0c2acfda3126c452e75b81669e8ad9ef">arm_cfft_radix4_init_q15()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="ga67c0890317deab3391e276f22c1fc400"></a>
@@ -642,17 +630,15 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for Q31 Twiddle factors Generation:: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; 3N/4; i++)
+<dl class="section user"><dt></dt><dd><pre>for (i = 0; i&lt; 3N/4; i++)
 {
-   twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-   twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
+   twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+   twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 4096 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 4096, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are interleaved fashion </dd></dl>
 <dl class="section user"><dt></dt><dd>Convert Floating point to Q31(Fixed point 1.31): round(twiddleCoefQ31(i) * pow(2, 31)) </dd></dl>
 
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#gabec9611e77382f31e152668bf6b4b638">arm_cfft_radix2_init_q31()</a>, and <a class="el" href="group__ComplexFFT.html#gad5caaafeec900c8ff72321c01bbd462c">arm_cfft_radix4_init_q31()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="gad8830f0c068ab2cc19f2f87d220fa148"></a>
@@ -665,16 +651,14 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for Floating-point Twiddle factors Generation: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; N/; i++)
+<dl class="section user"><dt></dt><dd><pre>for (i = 0; i&lt; N/; i++)
 {
-      twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-      twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
+      twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+      twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 512 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 512, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are in interleaved fashion </dd></dl>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
 </div>
 </div>
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@@ -687,12 +671,12 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for q15 Twiddle factors Generation:: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; 3N/4; i++)
+<dl class="section user"><dt></dt><dd><pre>for (i = 0; i&lt; 3N/4; i++)
 {
-   twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-   twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
+   twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+   twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 512 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 512, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are interleaved fashion </dd></dl>
 <dl class="section user"><dt></dt><dd>Convert Floating point to q15(Fixed point 1.15): round(twiddleCoefq15(i) * pow(2, 15)) </dd></dl>
 
@@ -708,12 +692,12 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for Q31 Twiddle factors Generation:: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; 3N/4; i++)
+<dl class="section user"><dt></dt><dd><pre>for (i = 0; i&lt; 3N/4; i++)
 {
-   twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-   twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
+   twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+   twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 512 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 512, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are interleaved fashion </dd></dl>
 <dl class="section user"><dt></dt><dd>Convert Floating point to Q31(Fixed point 1.31): round(twiddleCoefQ31(i) * pow(2, 31)) </dd></dl>
 
@@ -729,16 +713,14 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for Floating-point Twiddle factors Generation: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; N/; i++)
+<dl class="section user"><dt></dt><dd><pre>for(i = 0; i &lt; N/; i++)
 {
-      twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-      twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
+      twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+      twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 64 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 64, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are in interleaved fashion </dd></dl>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="gaa0cc411e0b3c82078e85cfdf1b84290f"></a>
@@ -751,12 +733,12 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for q15 Twiddle factors Generation:: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; 3N/4; i++)
+<dl class="section user"><dt></dt><dd><pre>for (i = 0; i&lt; 3N/4; i++)
 {
-   twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);
-   twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);
+   twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+   twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 64 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 64, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are interleaved fashion </dd></dl>
 <dl class="section user"><dt></dt><dd>Convert Floating point to q15(Fixed point 1.15): round(twiddleCoefq15(i) * pow(2, 15)) </dd></dl>
 
@@ -772,12 +754,12 @@
       </table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Example code for Q31 Twiddle factors Generation:: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>for(i = 0; i&lt; 3N/4; i++)
+<dl class="section user"><dt></dt><dd><pre>for (i = 0; i&lt; 3N/4; i++)
 {
-   twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);
-   twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);
+   twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+   twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
 } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where N = 64 and PI = 3.14159265358979 </dd></dl>
+<dl class="section user"><dt></dt><dd>where N = 64, PI = 3.14159265358979 </dd></dl>
 <dl class="section user"><dt></dt><dd>Cos and Sin values are interleaved fashion </dd></dl>
 <dl class="section user"><dt></dt><dd>Convert Floating point to Q31(Fixed point 1.31): round(twiddleCoefQ31(i) * pow(2, 31)) </dd></dl>
 
@@ -788,7 +770,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__ClassMarks.html b/docs/DSP/html/group__ClassMarks.html
index 93902c6..8e9821e 100644
--- a/docs/DSP/html/group__ClassMarks.html
+++ b/docs/DSP/html/group__ClassMarks.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -129,11 +129,11 @@
 <dl class="section user"><dt></dt><dd><ul>
 <li><a class="el" href="group__MatrixInit.html#ga11e3dc41592a6401c13182fef9416a27" title="Floating-point matrix initialization. ">arm_mat_init_f32()</a></li>
 <li><a class="el" href="group__MatrixMult.html#ga917bf0270310c1d3f0eda1fc7c0026a0" title="Floating-point matrix multiplication. ">arm_mat_mult_f32()</a></li>
-<li><a class="el" href="group__Max.html#ga5b89d1b04575aeec494f678695fb87d8" title="Maximum value of a floating-point vector. ">arm_max_f32()</a></li>
-<li><a class="el" href="group__Min.html#gaf62b1673740fc516ea64daf777b7d74a" title="Minimum value of a floating-point vector. ">arm_min_f32()</a></li>
-<li><a class="el" href="group__mean.html#ga74ce08c49ab61e57bd50c3a0ca1fdb2b" title="Mean value of a floating-point vector. ">arm_mean_f32()</a></li>
-<li><a class="el" href="group__STD.html#ga4969b5b5f3d001377bc401a3ee99dfc2" title="Standard deviation of the elements of a floating-point vector. ">arm_std_f32()</a></li>
-<li><a class="el" href="group__variance.html#ga393f26c5a3bfa05624fb8d32232a6d96" title="Variance of the elements of a floating-point vector. ">arm_var_f32()</a></li>
+<li><a class="el" href="group__Max.html#gad1eabd31544fe59c414d9ce5bd0cc151" title="Maximum value of a floating-point vector. ">arm_max_f32()</a></li>
+<li><a class="el" href="group__Min.html#ga514e2c920c432e1a3df2cb03f01d2797" title="Minimum value of a floating-point vector. ">arm_min_f32()</a></li>
+<li><a class="el" href="group__mean.html#gae4fb7698771d7c24f536ed24347c1488" title="Mean value of a floating-point vector. ">arm_mean_f32()</a></li>
+<li><a class="el" href="group__STD.html#ga287b6ce703636c7e8cb9833b290ae4ce" title="Standard deviation of the elements of a floating-point vector. ">arm_std_f32()</a></li>
+<li><a class="el" href="group__variance.html#gaae455544f0c8ac92469a1e25d3906515" title="Variance of the elements of a floating-point vector. ">arm_var_f32()</a></li>
 </ul>
 </dd></dl>
 <p><b> Refer </b> <a class="el" href="arm_class_marks_example_f32_8c-example.html">arm_class_marks_example_f32.c</a> </p>
@@ -142,7 +142,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__CmplxByCmplxMult.html b/docs/DSP/html/group__CmplxByCmplxMult.html
index 05c9277..850f750 100644
--- a/docs/DSP/html/group__CmplxByCmplxMult.html
+++ b/docs/DSP/html/group__CmplxByCmplxMult.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,40 +116,40 @@
 <table class="memberdecls">
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 Functions</h2></td></tr>
-<tr class="memitem:ga14b47080054a1ba1250a86805be1ff6b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByCmplxMult.html#ga14b47080054a1ba1250a86805be1ff6b">arm_cmplx_mult_cmplx_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:ga14b47080054a1ba1250a86805be1ff6b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex-by-complex multiplication.  <a href="#ga14b47080054a1ba1250a86805be1ff6b">More...</a><br/></td></tr>
-<tr class="separator:ga14b47080054a1ba1250a86805be1ff6b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga67e96abfc9c3e30efb70a2ec9d0fe7e8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByCmplxMult.html#ga67e96abfc9c3e30efb70a2ec9d0fe7e8">arm_cmplx_mult_cmplx_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:ga67e96abfc9c3e30efb70a2ec9d0fe7e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex-by-complex multiplication.  <a href="#ga67e96abfc9c3e30efb70a2ec9d0fe7e8">More...</a><br/></td></tr>
-<tr class="separator:ga67e96abfc9c3e30efb70a2ec9d0fe7e8"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga1829e50993a90742de225a0ce4213838"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByCmplxMult.html#ga1829e50993a90742de225a0ce4213838">arm_cmplx_mult_cmplx_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:ga1829e50993a90742de225a0ce4213838"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex-by-complex multiplication.  <a href="#ga1829e50993a90742de225a0ce4213838">More...</a><br/></td></tr>
-<tr class="separator:ga1829e50993a90742de225a0ce4213838"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae221504b01e4abfe5f335eafd801b4ed"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByCmplxMult.html#gae221504b01e4abfe5f335eafd801b4ed">arm_cmplx_mult_cmplx_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:gae221504b01e4abfe5f335eafd801b4ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex-by-complex multiplication.  <a href="#gae221504b01e4abfe5f335eafd801b4ed">More...</a><br/></td></tr>
+<tr class="separator:gae221504b01e4abfe5f335eafd801b4ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga683b32a91cffbf021f58ace5a62904e8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByCmplxMult.html#ga683b32a91cffbf021f58ace5a62904e8">arm_cmplx_mult_cmplx_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:ga683b32a91cffbf021f58ace5a62904e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex-by-complex multiplication.  <a href="#ga683b32a91cffbf021f58ace5a62904e8">More...</a><br/></td></tr>
+<tr class="separator:ga683b32a91cffbf021f58ace5a62904e8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga7748c92e0922cf14e3d7bb257d77593f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByCmplxMult.html#ga7748c92e0922cf14e3d7bb257d77593f">arm_cmplx_mult_cmplx_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:ga7748c92e0922cf14e3d7bb257d77593f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex-by-complex multiplication.  <a href="#ga7748c92e0922cf14e3d7bb257d77593f">More...</a><br/></td></tr>
+<tr class="separator:ga7748c92e0922cf14e3d7bb257d77593f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>Multiplies a complex vector by another complex vector and generates a complex result. The data in the complex arrays is stored in an interleaved fashion (real, imag, real, imag, ...). The parameter <code>numSamples</code> represents the number of complex samples processed. The complex arrays have a total of <code>2*numSamples</code> real values.</p>
 <p>The underlying algorithm is used:</p>
 <pre>
-for(n=0; n&lt;numSamples; n++) {
+for (n = 0; n &lt; numSamples; n++) {
     pDst[(2*n)+0] = pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
     pDst[(2*n)+1] = pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
 }
 </pre><p>There are separate functions for floating-point, Q15, and Q31 data types. </p>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga14b47080054a1ba1250a86805be1ff6b"></a>
+<a class="anchor" id="gae221504b01e4abfe5f335eafd801b4ed"></a>
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           <td class="memname">void arm_cmplx_mult_cmplx_f32 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
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           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -173,33 +173,31 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numSamples</td><td>number of complex samples in each vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to first input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to second input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numSamples</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>Referenced by <a class="el" href="arm__convolution__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga67e96abfc9c3e30efb70a2ec9d0fe7e8"></a>
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           <td class="memname">void arm_cmplx_mult_cmplx_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
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           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
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@@ -223,33 +221,32 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numSamples</td><td>number of complex samples in each vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to first input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to second input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numSamples</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga1829e50993a90742de225a0ce4213838"></a>
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           <td class="memname">void arm_cmplx_mult_cmplx_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
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           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -273,18 +270,15 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numSamples</td><td>number of complex samples in each vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to first input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to second input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numSamples</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format. Input down scaling is not required. </dd></dl>
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#gad04d0baab6ed081d8e8afe02538eb80b">arm_dct4_q31()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format. Input down scaling is not required. </dd></dl>
 
 </div>
 </div>
@@ -293,7 +287,7 @@
 <!-- start footer part -->
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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 <table class="memberdecls">
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 Functions</h2></td></tr>
-<tr class="memitem:ga9c18616f56cb4d3c0889ce0b339221ca"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByRealMult.html#ga9c18616f56cb4d3c0889ce0b339221ca">arm_cmplx_mult_real_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcCmplx, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcReal, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCmplxDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:ga9c18616f56cb4d3c0889ce0b339221ca"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex-by-real multiplication.  <a href="#ga9c18616f56cb4d3c0889ce0b339221ca">More...</a><br/></td></tr>
-<tr class="separator:ga9c18616f56cb4d3c0889ce0b339221ca"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga3bd8889dcb45980e1d3e53344df54e85"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByRealMult.html#ga3bd8889dcb45980e1d3e53344df54e85">arm_cmplx_mult_real_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcCmplx, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcReal, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCmplxDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:ga3bd8889dcb45980e1d3e53344df54e85"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex-by-real multiplication.  <a href="#ga3bd8889dcb45980e1d3e53344df54e85">More...</a><br/></td></tr>
-<tr class="separator:ga3bd8889dcb45980e1d3e53344df54e85"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:ga715e4bb8e945b8ca51ec5237611697ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex-by-real multiplication.  <a href="#ga715e4bb8e945b8ca51ec5237611697ce">More...</a><br/></td></tr>
-<tr class="separator:ga715e4bb8e945b8ca51ec5237611697ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga903eb30a02343574e46cb123b52232f4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByRealMult.html#ga903eb30a02343574e46cb123b52232f4">arm_cmplx_mult_real_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcCmplx, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcReal, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCmplxDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:ga903eb30a02343574e46cb123b52232f4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex-by-real multiplication.  <a href="#ga903eb30a02343574e46cb123b52232f4">More...</a><br/></td></tr>
+<tr class="separator:ga903eb30a02343574e46cb123b52232f4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa41d60a567652bf6a783b916931bf20b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByRealMult.html#gaa41d60a567652bf6a783b916931bf20b">arm_cmplx_mult_real_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcCmplx, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcReal, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCmplxDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:gaa41d60a567652bf6a783b916931bf20b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex-by-real multiplication.  <a href="#gaa41d60a567652bf6a783b916931bf20b">More...</a><br/></td></tr>
+<tr class="separator:gaa41d60a567652bf6a783b916931bf20b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0fe1cd71d35b4481f8ab69d502c96ace"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CmplxByRealMult.html#ga0fe1cd71d35b4481f8ab69d502c96ace">arm_cmplx_mult_real_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcCmplx, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcReal, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCmplxDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:ga0fe1cd71d35b4481f8ab69d502c96ace"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex-by-real multiplication.  <a href="#ga0fe1cd71d35b4481f8ab69d502c96ace">More...</a><br/></td></tr>
+<tr class="separator:ga0fe1cd71d35b4481f8ab69d502c96ace"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>Multiplies a complex vector by a real vector and generates a complex result. The data in the complex arrays is stored in an interleaved fashion (real, imag, real, imag, ...). The parameter <code>numSamples</code> represents the number of complex samples processed. The complex arrays have a total of <code>2*numSamples</code> real values while the real array has a total of <code>numSamples</code> real values.</p>
 <p>The underlying algorithm is used:</p>
 <pre>
-for(n=0; n&lt;numSamples; n++) {
+for (n = 0; n &lt; numSamples; n++) {
     pCmplxDst[(2*n)+0] = pSrcCmplx[(2*n)+0] * pSrcReal[n];
     pCmplxDst[(2*n)+1] = pSrcCmplx[(2*n)+1] * pSrcReal[n];
 }
 </pre><p>There are separate functions for floating-point, Q15, and Q31 data types. </p>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga9c18616f56cb4d3c0889ce0b339221ca"></a>
+<a class="anchor" id="ga903eb30a02343574e46cb123b52232f4"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_cmplx_mult_real_f32 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcCmplx</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcReal</em>, </td>
         </tr>
         <tr>
@@ -173,31 +173,31 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcCmplx</td><td>points to the complex input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcReal</td><td>points to the real input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pCmplxDst</td><td>points to the complex output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcCmplx</td><td>points to complex input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcReal</td><td>points to real input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pCmplxDst</td><td>points to complex output vector </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">numSamples</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga3bd8889dcb45980e1d3e53344df54e85"></a>
+<a class="anchor" id="gaa41d60a567652bf6a783b916931bf20b"></a>
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           <td class="memname">void arm_cmplx_mult_real_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcCmplx</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcReal</em>, </td>
         </tr>
         <tr>
@@ -221,35 +221,32 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcCmplx</td><td>points to the complex input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcReal</td><td>points to the real input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pCmplxDst</td><td>points to the complex output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcCmplx</td><td>points to complex input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcReal</td><td>points to real input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pCmplxDst</td><td>points to complex output vector </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">numSamples</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, and <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga715e4bb8e945b8ca51ec5237611697ce"></a>
+<a class="anchor" id="ga0fe1cd71d35b4481f8ab69d502c96ace"></a>
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           <td class="memname">void arm_cmplx_mult_real_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcCmplx</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcReal</em>, </td>
         </tr>
         <tr>
@@ -273,18 +270,15 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcCmplx</td><td>points to the complex input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcReal</td><td>points to the real input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pCmplxDst</td><td>points to the complex output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcCmplx</td><td>points to complex input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcReal</td><td>points to real input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pCmplxDst</td><td>points to complex output vector </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">numSamples</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a9a94b78de0f083bd8fadf3c3abe40431">clip_q63_to_q31()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] are saturated. </dd></dl>
 
 </div>
 </div>
@@ -293,7 +287,7 @@
 <!-- start footer part -->
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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-    [ "arm_cmplx_mult_real_q31", "group__CmplxByRealMult.html#ga715e4bb8e945b8ca51ec5237611697ce", null ]
+    [ "arm_cmplx_mult_real_f32", "group__CmplxByRealMult.html#ga903eb30a02343574e46cb123b52232f4", null ],
+    [ "arm_cmplx_mult_real_q15", "group__CmplxByRealMult.html#gaa41d60a567652bf6a783b916931bf20b", null ],
+    [ "arm_cmplx_mult_real_q31", "group__CmplxByRealMult.html#ga0fe1cd71d35b4481f8ab69d502c96ace", null ]
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diff --git a/docs/DSP/html/group__CmplxMatrixMult.html b/docs/DSP/html/group__CmplxMatrixMult.html
index 8e11533..e7a253b 100644
--- a/docs/DSP/html/group__CmplxMatrixMult.html
+++ b/docs/DSP/html/group__CmplxMatrixMult.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -127,7 +127,12 @@
 <tr class="separator:gaaf3c0b171ca8412c77bab9fa90804737"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Complex Matrix multiplication is only defined if the number of columns of the first matrix equals the number of rows of the second matrix. Multiplying an <code>M x N</code> matrix with an <code>N x P</code> matrix results in an <code>M x P</code> matrix. When matrix size checking is enabled, the functions check: (1) that the inner dimensions of <code>pSrcA</code> and <code>pSrcB</code> are equal; and (2) that the size of the output matrix equals the outer dimensions of <code>pSrcA</code> and <code>pSrcB</code>. </p>
+<p>Complex Matrix multiplication is only defined if the number of columns of the first matrix equals the number of rows of the second matrix. Multiplying an <code>M x N</code> matrix with an <code>N x P</code> matrix results in an <code>M x P</code> matrix. </p>
+<dl class="section user"><dt></dt><dd>When matrix size checking is enabled, the functions check:<ul>
+<li>that the inner dimensions of <code>pSrcA</code> and <code>pSrcB</code> are equal;</li>
+<li>that the size of the output matrix equals the outer dimensions of <code>pSrcA</code> and <code>pSrcB</code>. </li>
+</ul>
+</dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
 <a class="anchor" id="ga1adb839ac84445b8c2f04efa43faef35"></a>
 <div class="memitem">
@@ -161,15 +166,17 @@
 <p>Floating-point, complex, matrix multiplication.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input complex matrix structure </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input complex matrix structure </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output complex matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to first input complex matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to second input complex matrix structure </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output complex matrix structure </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__matrix__instance__f32.html#acdd1fb73734df68b89565c54f1dd8ae2">arm_matrix_instance_f32::numCols</a>, <a class="el" href="structarm__matrix__instance__f32.html#a23f4e34d70a82c9cad7612add5640b7b">arm_matrix_instance_f32::numRows</a>, <a class="el" href="structarm__matrix__instance__f32.html#af3917c032600a9dfd5ed4a96f074910a">arm_matrix_instance_f32::pData</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a> : Matrix size check failed </li>
+</ul>
+</dd></dl>
 
 </div>
 </div>
@@ -211,21 +218,20 @@
 <p>Q15, complex, matrix multiplication.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input complex matrix structure </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input complex matrix structure </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output complex matrix structure </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pScratch</td><td>points to the array for storing intermediate results </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to first input complex matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to second input complex matrix structure </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output complex matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pScratch</td><td>points to an array for storing intermediate results </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.</dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a> : Matrix size check failed</li>
+</ul>
+</dd></dl>
 <dl class="section user"><dt>Conditions for optimum performance</dt><dd>Input, output and state buffers should be aligned by 32-bit</dd></dl>
-<dl class="section user"><dt>Restrictions</dt><dd>If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, scratch buffers should be aligned by 32-bit</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 64-bit internal accumulator. The inputs to the multiplications are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.</dd></dl>
-<dl class="section user"><dt></dt><dd>Refer to <code><a class="el" href="group__MatrixMult.html#ga08f37d93a5bfef0c5000dc5e0a411f93" title="Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4. ">arm_mat_mult_fast_q15()</a></code> for a faster but less precise version of this function. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a9c58d7b4648a973d91e27544bc190e60">__SMUADX()</a>, <a class="el" href="arm__math_8h.html#a6b293f62ad7eb225fa9ce0f39458eba3">__SMUSD()</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__matrix__instance__q15.html#acbbce67ba058d8e1c867c71d57288c97">arm_matrix_instance_q15::numCols</a>, <a class="el" href="structarm__matrix__instance__q15.html#a9bac6ed54be287c4d4f01a1a28be65f5">arm_matrix_instance_q15::numRows</a>, <a class="el" href="structarm__matrix__instance__q15.html#a6da33a5553e634787d0f515cf8d724af">arm_matrix_instance_q15::pData</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 64-bit accumulator. The inputs to the multiplications are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format. </dd></dl>
 
 </div>
 </div>
@@ -261,17 +267,18 @@
 <p>Q31, complex, matrix multiplication.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input complex matrix structure </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input complex matrix structure </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output complex matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to first input complex matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to second input complex matrix structure </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output complex matrix structure </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. The input is thus scaled down by log2(numColsA) bits to avoid overflows, as a total of numColsA additions are performed internally. The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="arm__math_8h.html#a9a94b78de0f083bd8fadf3c3abe40431">clip_q63_to_q31()</a>, <a class="el" href="structarm__matrix__instance__q31.html#abd161da7614eda927157f18b698074b1">arm_matrix_instance_q31::numCols</a>, <a class="el" href="structarm__matrix__instance__q31.html#a63bacac158a821c8cfc06088d251598c">arm_matrix_instance_q31::numRows</a>, <a class="el" href="structarm__matrix__instance__q31.html#a09a64267c0579fef086efc9059741e56">arm_matrix_instance_q31::pData</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a> : Matrix size check failed</li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. The input is thus scaled down by log2(numColsA) bits to avoid overflows, as a total of numColsA additions are performed internally. The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result. </dd></dl>
 
 </div>
 </div>
@@ -280,7 +287,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/DSP/html/group__ComplexFFT.html b/docs/DSP/html/group__ComplexFFT.html
index 6cd2383..e0e7191 100644
--- a/docs/DSP/html/group__ComplexFFT.html
+++ b/docs/DSP/html/group__ComplexFFT.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -126,10 +126,10 @@
 <tr class="memdesc:gade0f9c4ff157b6b9c72a1eafd86ebf80"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point complex FFT.  <a href="#gade0f9c4ff157b6b9c72a1eafd86ebf80">More...</a><br/></td></tr>
 <tr class="separator:gade0f9c4ff157b6b9c72a1eafd86ebf80"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga68cdacd2267a2967955e40e6b7ec1229"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15</a> (const <a class="el" href="structarm__cfft__instance__q15.html">arm_cfft_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *p1, uint8_t <a class="el" href="arm__fft__bin__example__f32_8c.html#a379ccb99013d369a41b49619083c16ef">ifftFlag</a>, uint8_t bitReverseFlag)</td></tr>
-<tr class="memdesc:ga68cdacd2267a2967955e40e6b7ec1229"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 complex FFT.  <a href="#ga68cdacd2267a2967955e40e6b7ec1229">More...</a><br/></td></tr>
+<tr class="memdesc:ga68cdacd2267a2967955e40e6b7ec1229"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q15 complex FFT.  <a href="#ga68cdacd2267a2967955e40e6b7ec1229">More...</a><br/></td></tr>
 <tr class="separator:ga68cdacd2267a2967955e40e6b7ec1229"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga5a0008bd997ab6e2e299ef2fb272fb4b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31</a> (const <a class="el" href="structarm__cfft__instance__q31.html">arm_cfft_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *p1, uint8_t <a class="el" href="arm__fft__bin__example__f32_8c.html#a379ccb99013d369a41b49619083c16ef">ifftFlag</a>, uint8_t bitReverseFlag)</td></tr>
-<tr class="memdesc:ga5a0008bd997ab6e2e299ef2fb272fb4b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the fixed-point complex FFT in Q31 format.  <a href="#ga5a0008bd997ab6e2e299ef2fb272fb4b">More...</a><br/></td></tr>
+<tr class="memdesc:ga5a0008bd997ab6e2e299ef2fb272fb4b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 complex FFT.  <a href="#ga5a0008bd997ab6e2e299ef2fb272fb4b">More...</a><br/></td></tr>
 <tr class="separator:ga5a0008bd997ab6e2e299ef2fb272fb4b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga9fadd650b802f612ae558ddaab789a6d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ComplexFFT.html#ga9fadd650b802f612ae558ddaab789a6d">arm_cfft_radix2_f32</a> (const <a class="el" href="structarm__cfft__radix2__instance__f32.html">arm_cfft_radix2_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc)</td></tr>
 <tr class="memdesc:ga9fadd650b802f612ae558ddaab789a6d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Radix-2 CFFT/CIFFT.  <a href="#ga9fadd650b802f612ae558ddaab789a6d">More...</a><br/></td></tr>
@@ -171,7 +171,7 @@
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <dl class="section user"><dt></dt><dd>The Fast Fourier Transform (FFT) is an efficient algorithm for computing the Discrete Fourier Transform (DFT). The FFT can be orders of magnitude faster than the DFT, especially for long lengths. The algorithms described in this section operate on complex data. A separate set of functions is devoted to handling of real sequences. </dd></dl>
 <dl class="section user"><dt></dt><dd>There are separate algorithms for handling floating-point, Q15, and Q31 data types. The algorithms available for each data type are described next. </dd></dl>
-<dl class="section user"><dt></dt><dd>The FFT functions operate in-place. That is, the array holding the input data will also be used to hold the corresponding result. The input data is complex and contains <code>2*fftLen</code> interleaved values as shown below. <pre> {real[0], imag[0], real[1], imag[1],..} </pre> The FFT result will be contained in the same array and the frequency domain values will have the same interleaving.</dd></dl>
+<dl class="section user"><dt></dt><dd>The FFT functions operate in-place. That is, the array holding the input data will also be used to hold the corresponding result. The input data is complex and contains <code>2*fftLen</code> interleaved values as shown below. <pre>{real[0], imag[0], real[1], imag[1], ...} </pre> The FFT result will be contained in the same array and the frequency domain values will have the same interleaving.</dd></dl>
 <dl class="section user"><dt>Floating-point</dt><dd>The floating-point complex FFT uses a mixed-radix algorithm. Multiple radix-8 stages are performed along with a single radix-2 or radix-4 stage, as needed. The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses a different twiddle factor table. </dd></dl>
 <dl class="section user"><dt></dt><dd>The function uses the standard FFT definition and output values may grow by a factor of <code>fftLen</code> when computing the forward transform. The inverse transform includes a scale of <code>1/fftLen</code> as part of the calculation and this matches the textbook definition of the inverse FFT. </dd></dl>
 <dl class="section user"><dt></dt><dd>Pre-initialized data structures containing twiddle factors and bit reversal tables are provided and defined in <code><a class="el" href="arm__const__structs_8h.html">arm_const_structs.h</a></code>. Include this header in your function and then pass one of the constant structures as an argument to arm_cfft_f32. For example: </dd></dl>
@@ -286,18 +286,22 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the floating-point CFFT structure. </td></tr>
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*p1</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the floating-point CFFT structure </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">p1</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects transform direction<ul>
+<li>value = 0: forward transform</li>
+<li>value = 1: inverse transform </li>
+</ul>
+</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables / disables bit reversal of output<ul>
+<li>value = 0: disables bit reversal of output</li>
+<li>value = 1: enables bit reversal of output </li>
+</ul>
+</td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__cfft__f32_8c.html#ac8e7ebe1cb131a5b0f55d0464640591f">arm_bitreversal_32()</a>, <a class="el" href="arm__cfft__f32_8c.html#ae99e2b173033e9910058869bdf0619d9">arm_cfft_radix8by2_f32()</a>, <a class="el" href="arm__cfft__f32_8c.html#a4bb346f59bca06cebe0defc8e15b69a6">arm_cfft_radix8by4_f32()</a>, <a class="el" href="arm__cfft__f32_8c.html#a72350c6eaa1eef8796ab43c1497c6b9c">arm_radix8_butterfly_f32()</a>, <a class="el" href="structarm__cfft__instance__f32.html#a3ba329ed153d182746376208e773d648">arm_cfft_instance_f32::bitRevLength</a>, <a class="el" href="structarm__cfft__instance__f32.html#acd8f9e9540e3dd348212726e5d6aaa95">arm_cfft_instance_f32::fftLen</a>, <a class="el" href="structarm__cfft__instance__f32.html#a21ceaf59a1bb8440af57c28d2dd9bbab">arm_cfft_instance_f32::pBitRevTable</a>, and <a class="el" href="structarm__cfft__instance__f32.html#a59cc6f753f1498716e1444ac054c06de">arm_cfft_instance_f32::pTwiddle</a>.</p>
-
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga180d8b764d59cbb85d37a2d5f7cd9799">arm_rfft_fast_f32()</a>, and <a class="el" href="arm__fft__bin__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -338,18 +342,22 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q15 CFFT structure. </td></tr>
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*p1</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of Q15 CFFT structure </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">p1</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects transform direction<ul>
+<li>value = 0: forward transform</li>
+<li>value = 1: inverse transform </li>
+</ul>
+</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables / disables bit reversal of output<ul>
+<li>value = 0: disables bit reversal of output</li>
+<li>value = 1: enables bit reversal of output </li>
+</ul>
+</td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__cfft__q15_8c.html#a773957c278f4d9e728711f27e8a6e278">arm_bitreversal_16()</a>, <a class="el" href="arm__cfft__q15_8c.html#abe669acc8db57d1fb9b1e2bba30f2224">arm_cfft_radix4by2_inverse_q15()</a>, <a class="el" href="arm__cfft__q15_8c.html#af1d4a751153857c173511e0c77ab4fa9">arm_cfft_radix4by2_q15()</a>, <a class="el" href="arm__cfft__q15_8c.html#a734ecff00f21a6a10e9ec437c8987eb1">arm_radix4_butterfly_inverse_q15()</a>, <a class="el" href="arm__cfft__q15_8c.html#abf1a2f9aa9f44ad5da1f0dbae8b54f2f">arm_radix4_butterfly_q15()</a>, <a class="el" href="structarm__cfft__instance__q15.html#a738907cf34bdbbaf724414ac2decbc3c">arm_cfft_instance_q15::bitRevLength</a>, <a class="el" href="structarm__cfft__instance__q15.html#a5f9e1d3a8c127ee323b5e6929aeb90df">arm_cfft_instance_q15::fftLen</a>, <a class="el" href="structarm__cfft__instance__q15.html#ac9160b80243b99a0b6e2f75ddb5cf0ae">arm_cfft_instance_q15::pBitRevTable</a>, and <a class="el" href="structarm__cfft__instance__q15.html#afdaf12ce4687cec021c5ae73d0987a3f">arm_cfft_instance_q15::pTwiddle</a>.</p>
-
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga00e615f5db21736ad5b27fb6146f3fc5">arm_rfft_q15()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -390,18 +398,22 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the fixed-point CFFT structure. </td></tr>
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*p1</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the fixed-point CFFT structure </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">p1</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects transform direction<ul>
+<li>value = 0: forward transform</li>
+<li>value = 1: inverse transform </li>
+</ul>
+</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables / disables bit reversal of output<ul>
+<li>value = 0: disables bit reversal of output</li>
+<li>value = 1: enables bit reversal of output </li>
+</ul>
+</td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__cfft__q31_8c.html#ac8e7ebe1cb131a5b0f55d0464640591f">arm_bitreversal_32()</a>, <a class="el" href="arm__cfft__q31_8c.html#a3f3ae10bc2057cc1360abfa25f224c8c">arm_cfft_radix4by2_inverse_q31()</a>, <a class="el" href="arm__cfft__q31_8c.html#af6df8bf714c30d44e6b871ea87d22b30">arm_cfft_radix4by2_q31()</a>, <a class="el" href="arm__cfft__q31_8c.html#ac9c7c553114c1201a3a987a11b8a6d01">arm_radix4_butterfly_inverse_q31()</a>, <a class="el" href="arm__cfft__q31_8c.html#ac12f1e7f159d5741358cdc36830a0395">arm_radix4_butterfly_q31()</a>, <a class="el" href="structarm__cfft__instance__q31.html#a2250fa6b8fe73292c5418c50c0549f87">arm_cfft_instance_q31::bitRevLength</a>, <a class="el" href="structarm__cfft__instance__q31.html#a4406f23e8fd0bff8d555225612e2a2a8">arm_cfft_instance_q31::fftLen</a>, <a class="el" href="structarm__cfft__instance__q31.html#a8a464461649f023325ced1e10470f5d0">arm_cfft_instance_q31::pBitRevTable</a>, and <a class="el" href="structarm__cfft__instance__q31.html#af751114feb91de3ace8600e91bdd0872">arm_cfft_instance_q31::pTwiddle</a>.</p>
-
-<p>Referenced by <a class="el" href="group__RealFFT.html#gabaeab5646aeea9844e6d42ca8c73fe3a">arm_rfft_q31()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -428,18 +440,16 @@
         </tr>
       </table>
 </div><div class="memdoc">
-<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000001">Deprecated:</a></b></dt><dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80">arm_cfft_f32</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
+<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000002">Deprecated:</a></b></dt><dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80">arm_cfft_f32</a> and will be removed in the future <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the floating-point Radix-2 CFFT/CIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*pSrc</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the floating-point Radix-2 CFFT/CIFFT structure </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 </dd></dl>
 
-<p>References <a class="el" href="arm__cfft__radix2__f32_8c.html#a3d4062fdfa6aaa3f51f41cab868e508b">arm_bitreversal_f32()</a>, <a class="el" href="arm__cfft__radix2__f32_8c.html#a04631e102b5209af3402b225b1abe868">arm_radix2_butterfly_f32()</a>, <a class="el" href="arm__cfft__radix2__f32_8c.html#abda34af152e515a95ac38470ac053b77">arm_radix2_butterfly_inverse_f32()</a>, <a class="el" href="structarm__cfft__radix2__instance__f32.html#af713b4ac5256a19bc965c89fe3005fa3">arm_cfft_radix2_instance_f32::bitReverseFlag</a>, <a class="el" href="structarm__cfft__radix2__instance__f32.html#ac1688dafa5177f6b1505abbfd0cf8b21">arm_cfft_radix2_instance_f32::bitRevFactor</a>, <a class="el" href="structarm__cfft__radix2__instance__f32.html#a2f915a1c29635c1623086aaaa726be8f">arm_cfft_radix2_instance_f32::fftLen</a>, <a class="el" href="structarm__cfft__radix2__instance__f32.html#a8dbe98d2c924e35e0a3fed2fe948176f">arm_cfft_radix2_instance_f32::ifftFlag</a>, <a class="el" href="structarm__cfft__radix2__instance__f32.html#a1d3d289d47443e597d88a40effd14b8f">arm_cfft_radix2_instance_f32::onebyfftLen</a>, <a class="el" href="structarm__cfft__radix2__instance__f32.html#a92b8fa0a151cd800436094903a5ca0a4">arm_cfft_radix2_instance_f32::pBitRevTable</a>, <a class="el" href="structarm__cfft__radix2__instance__f32.html#adb0c9d47dbfbd90a6f6ed0a05313a974">arm_cfft_radix2_instance_f32::pTwiddle</a>, and <a class="el" href="structarm__cfft__radix2__instance__f32.html#a411f75b6ed01690293f4f5988030ea42">arm_cfft_radix2_instance_f32::twidCoefModifier</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="gac9565e6bc7229577ecf5e090313cafd7"></a>
@@ -477,25 +487,34 @@
         </tr>
       </table>
 </div><div class="memdoc">
-<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000002">Deprecated:</a></b></dt><dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80">arm_cfft_f32</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
+<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000003">Deprecated:</a></b></dt><dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80">arm_cfft_f32</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the floating-point CFFT/CIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the floating-point CFFT/CIFFT structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects transform direction<ul>
+<li>value = 0: forward transform</li>
+<li>value = 1: inverse transform </li>
+</ul>
+</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables / disables bit reversal of output<ul>
+<li>value = 0: disables bit reversal of output</li>
+<li>value = 1: enables bit reversal of output </li>
+</ul>
+</td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.</dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : <code>fftLen</code> is not a supported length</li>
+</ul>
 </dd></dl>
-<dl class="section user"><dt>Description:</dt><dd></dd></dl>
-<dl class="section user"><dt></dt><dd>The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated </dd></dl>
+</dd></dl>
+<dl class="section user"><dt>Details</dt><dd>The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated </dd></dl>
 <dl class="section user"><dt></dt><dd>The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. </dd></dl>
 <dl class="section user"><dt></dt><dd>The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024. </dd></dl>
 <dl class="section user"><dt></dt><dd>This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. </dd></dl>
 
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="group__CFFT__CIFFT.html#gae247e83ad50d474107254e25b36ad42b">armBitRevTable</a>, <a class="el" href="structarm__cfft__radix2__instance__f32.html#af713b4ac5256a19bc965c89fe3005fa3">arm_cfft_radix2_instance_f32::bitReverseFlag</a>, <a class="el" href="structarm__cfft__radix2__instance__f32.html#ac1688dafa5177f6b1505abbfd0cf8b21">arm_cfft_radix2_instance_f32::bitRevFactor</a>, <a class="el" href="structarm__cfft__radix2__instance__f32.html#a2f915a1c29635c1623086aaaa726be8f">arm_cfft_radix2_instance_f32::fftLen</a>, <a class="el" href="arm__fft__bin__example__f32_8c.html#a379ccb99013d369a41b49619083c16ef">ifftFlag</a>, <a class="el" href="structarm__cfft__radix2__instance__f32.html#a8dbe98d2c924e35e0a3fed2fe948176f">arm_cfft_radix2_instance_f32::ifftFlag</a>, <a class="el" href="structarm__cfft__radix2__instance__f32.html#a1d3d289d47443e597d88a40effd14b8f">arm_cfft_radix2_instance_f32::onebyfftLen</a>, <a class="el" href="structarm__cfft__radix2__instance__f32.html#a92b8fa0a151cd800436094903a5ca0a4">arm_cfft_radix2_instance_f32::pBitRevTable</a>, <a class="el" href="structarm__cfft__radix2__instance__f32.html#adb0c9d47dbfbd90a6f6ed0a05313a974">arm_cfft_radix2_instance_f32::pTwiddle</a>, <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>, <a class="el" href="structarm__cfft__radix2__instance__f32.html#a411f75b6ed01690293f4f5988030ea42">arm_cfft_radix2_instance_f32::twidCoefModifier</a>, and <a class="el" href="arm__common__tables_8h.html#a9bf8c85e4c91b9b55818b3d650d2c761">twiddleCoef</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="ga5c5b2127b3c4ea2d03692127f8543858"></a>
@@ -533,25 +552,34 @@
         </tr>
       </table>
 </div><div class="memdoc">
-<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000003">Deprecated:</a></b></dt><dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15</a> and will be removed <dl class="params"><dt>Parameters</dt><dd>
+<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000004">Deprecated:</a></b></dt><dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15</a> and will be removed <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q15 CFFT/CIFFT structure. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q15 CFFT/CIFFT structure. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects transform direction<ul>
+<li>value = 0: forward transform</li>
+<li>value = 1: inverse transform </li>
+</ul>
+</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables / disables bit reversal of output<ul>
+<li>value = 0: disables bit reversal of output</li>
+<li>value = 1: enables bit reversal of output </li>
+</ul>
+</td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.</dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : <code>fftLen</code> is not a supported length</li>
+</ul>
 </dd></dl>
-<dl class="section user"><dt>Description:</dt><dd></dd></dl>
-<dl class="section user"><dt></dt><dd>The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated </dd></dl>
+</dd></dl>
+<dl class="section user"><dt>Details</dt><dd>The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated </dd></dl>
 <dl class="section user"><dt></dt><dd>The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. </dd></dl>
 <dl class="section user"><dt></dt><dd>The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024. </dd></dl>
 <dl class="section user"><dt></dt><dd>This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. </dd></dl>
 
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="group__CFFT__CIFFT.html#gae247e83ad50d474107254e25b36ad42b">armBitRevTable</a>, <a class="el" href="structarm__cfft__radix2__instance__q15.html#af8300c1f60caa21e6b44b9240ab5af19">arm_cfft_radix2_instance_q15::bitReverseFlag</a>, <a class="el" href="structarm__cfft__radix2__instance__q15.html#a8722720c542cabd41df83fe88ef4f4cb">arm_cfft_radix2_instance_q15::bitRevFactor</a>, <a class="el" href="structarm__cfft__radix2__instance__q15.html#a874085647351dcf3f0de39d2b1d49744">arm_cfft_radix2_instance_q15::fftLen</a>, <a class="el" href="arm__fft__bin__example__f32_8c.html#a379ccb99013d369a41b49619083c16ef">ifftFlag</a>, <a class="el" href="structarm__cfft__radix2__instance__q15.html#ab5c073286bdd2f6e2bf783ced36bf1de">arm_cfft_radix2_instance_q15::ifftFlag</a>, <a class="el" href="structarm__cfft__radix2__instance__q15.html#ab88afeff6493be3c8b5e4530efa82d51">arm_cfft_radix2_instance_q15::pBitRevTable</a>, <a class="el" href="structarm__cfft__radix2__instance__q15.html#a3809dd15e7cbf1a054c728cfbbb0cc5a">arm_cfft_radix2_instance_q15::pTwiddle</a>, <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>, <a class="el" href="structarm__cfft__radix2__instance__q15.html#a6f2ab87fb4c568656e1f92f687b5c850">arm_cfft_radix2_instance_q15::twidCoefModifier</a>, and <a class="el" href="group__CFFT__CIFFT.html#ga9b409d6995eab17805b1d1881d4bc652">twiddleCoef_4096_q15</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="gabec9611e77382f31e152668bf6b4b638"></a>
@@ -589,25 +617,34 @@
         </tr>
       </table>
 </div><div class="memdoc">
-<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000004">Deprecated:</a></b></dt><dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31</a> and will be removed <dl class="params"><dt>Parameters</dt><dd>
+<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000005">Deprecated:</a></b></dt><dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q31 CFFT/CIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q31 CFFT/CIFFT structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects transform direction<ul>
+<li>value = 0: forward transform</li>
+<li>value = 1: inverse transform </li>
+</ul>
+</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables / disables bit reversal of output<ul>
+<li>value = 0: disables bit reversal of output</li>
+<li>value = 1: enables bit reversal of output </li>
+</ul>
+</td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.</dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : <code>fftLen</code> is not a supported length</li>
+</ul>
 </dd></dl>
-<dl class="section user"><dt>Description:</dt><dd></dd></dl>
-<dl class="section user"><dt></dt><dd>The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated </dd></dl>
+</dd></dl>
+<dl class="section user"><dt>Details</dt><dd>The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated </dd></dl>
 <dl class="section user"><dt></dt><dd>The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. </dd></dl>
 <dl class="section user"><dt></dt><dd>The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024. </dd></dl>
 <dl class="section user"><dt></dt><dd>This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. </dd></dl>
 
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="group__CFFT__CIFFT.html#gae247e83ad50d474107254e25b36ad42b">armBitRevTable</a>, <a class="el" href="structarm__cfft__radix2__instance__q31.html#a6239b8d268285334e88c008c07d68616">arm_cfft_radix2_instance_q31::bitReverseFlag</a>, <a class="el" href="structarm__cfft__radix2__instance__q31.html#a9d17a87263953fe3559a007512c9f3a4">arm_cfft_radix2_instance_q31::bitRevFactor</a>, <a class="el" href="structarm__cfft__radix2__instance__q31.html#a960199f1373a192366878ef279eab00f">arm_cfft_radix2_instance_q31::fftLen</a>, <a class="el" href="arm__fft__bin__example__f32_8c.html#a379ccb99013d369a41b49619083c16ef">ifftFlag</a>, <a class="el" href="structarm__cfft__radix2__instance__q31.html#a2607378ce64be16698bb8a3b1af8d3c8">arm_cfft_radix2_instance_q31::ifftFlag</a>, <a class="el" href="structarm__cfft__radix2__instance__q31.html#ada8e5264f4b22ff4c621817978994674">arm_cfft_radix2_instance_q31::pBitRevTable</a>, <a class="el" href="structarm__cfft__radix2__instance__q31.html#a1d5bbe9a991e133f81652a77a7985d23">arm_cfft_radix2_instance_q31::pTwiddle</a>, <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>, <a class="el" href="structarm__cfft__radix2__instance__q31.html#ae63ca9193322cd477970c1d2086407d1">arm_cfft_radix2_instance_q31::twidCoefModifier</a>, and <a class="el" href="group__CFFT__CIFFT.html#ga67c0890317deab3391e276f22c1fc400">twiddleCoef_4096_q31</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="ga55b424341dc3efd3fa0bcaaff4bdbf40"></a>
@@ -633,18 +670,16 @@
         </tr>
       </table>
 </div><div class="memdoc">
-<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000005">Deprecated:</a></b></dt><dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15</a> and will be removed <dl class="params"><dt>Parameters</dt><dd>
+<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000006">Deprecated:</a></b></dt><dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the fixed-point CFFT/CIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*pSrc</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the fixed-point CFFT/CIFFT structure </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 </dd></dl>
 
-<p>References <a class="el" href="arm__cfft__radix2__q15_8c.html#a73f48eaea9297605705ae25d3405343e">arm_bitreversal_q15()</a>, <a class="el" href="arm__cfft__radix2__q15_8c.html#a91ff93fa10757b3872680fec4835c412">arm_radix2_butterfly_inverse_q15()</a>, <a class="el" href="arm__cfft__radix2__q15_8c.html#a521780ba2fd3450cbf02784e38859699">arm_radix2_butterfly_q15()</a>, <a class="el" href="structarm__cfft__radix2__instance__q15.html#a8722720c542cabd41df83fe88ef4f4cb">arm_cfft_radix2_instance_q15::bitRevFactor</a>, <a class="el" href="structarm__cfft__radix2__instance__q15.html#a874085647351dcf3f0de39d2b1d49744">arm_cfft_radix2_instance_q15::fftLen</a>, <a class="el" href="structarm__cfft__radix2__instance__q15.html#ab5c073286bdd2f6e2bf783ced36bf1de">arm_cfft_radix2_instance_q15::ifftFlag</a>, <a class="el" href="structarm__cfft__radix2__instance__q15.html#ab88afeff6493be3c8b5e4530efa82d51">arm_cfft_radix2_instance_q15::pBitRevTable</a>, <a class="el" href="structarm__cfft__radix2__instance__q15.html#a3809dd15e7cbf1a054c728cfbbb0cc5a">arm_cfft_radix2_instance_q15::pTwiddle</a>, and <a class="el" href="structarm__cfft__radix2__instance__q15.html#a6f2ab87fb4c568656e1f92f687b5c850">arm_cfft_radix2_instance_q15::twidCoefModifier</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="ga6321f703ec87a274aedaab33d3e766b4"></a>
@@ -670,18 +705,16 @@
         </tr>
       </table>
 </div><div class="memdoc">
-<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000006">Deprecated:</a></b></dt><dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31</a> and will be removed <dl class="params"><dt>Parameters</dt><dd>
+<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000007">Deprecated:</a></b></dt><dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the fixed-point CFFT/CIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*pSrc</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the fixed-point CFFT/CIFFT structure </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 </dd></dl>
 
-<p>References <a class="el" href="arm__cfft__radix2__q31_8c.html#a3fab577d25c3a517973c8c214f66f268">arm_bitreversal_q31()</a>, <a class="el" href="arm__cfft__radix2__q31_8c.html#a4d665f67080455b95cafec04009fd52d">arm_radix2_butterfly_inverse_q31()</a>, <a class="el" href="arm__cfft__radix2__q31_8c.html#a740f4fe69e6148d22fc99f374d304e7e">arm_radix2_butterfly_q31()</a>, <a class="el" href="structarm__cfft__radix2__instance__q31.html#a9d17a87263953fe3559a007512c9f3a4">arm_cfft_radix2_instance_q31::bitRevFactor</a>, <a class="el" href="structarm__cfft__radix2__instance__q31.html#a960199f1373a192366878ef279eab00f">arm_cfft_radix2_instance_q31::fftLen</a>, <a class="el" href="structarm__cfft__radix2__instance__q31.html#a2607378ce64be16698bb8a3b1af8d3c8">arm_cfft_radix2_instance_q31::ifftFlag</a>, <a class="el" href="structarm__cfft__radix2__instance__q31.html#ada8e5264f4b22ff4c621817978994674">arm_cfft_radix2_instance_q31::pBitRevTable</a>, <a class="el" href="structarm__cfft__radix2__instance__q31.html#a1d5bbe9a991e133f81652a77a7985d23">arm_cfft_radix2_instance_q31::pTwiddle</a>, and <a class="el" href="structarm__cfft__radix2__instance__q31.html#ae63ca9193322cd477970c1d2086407d1">arm_cfft_radix2_instance_q31::twidCoefModifier</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="ga521f670cd9c571bc61aff9bec89f4c26"></a>
@@ -707,20 +740,16 @@
         </tr>
       </table>
 </div><div class="memdoc">
-<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000007">Deprecated:</a></b></dt><dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80">arm_cfft_f32</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
+<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000008">Deprecated:</a></b></dt><dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80">arm_cfft_f32</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the floating-point Radix-4 CFFT/CIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*pSrc</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the floating-point Radix-4 CFFT/CIFFT structure </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 </dd></dl>
 
-<p>References <a class="el" href="arm__cfft__radix4__f32_8c.html#a3d4062fdfa6aaa3f51f41cab868e508b">arm_bitreversal_f32()</a>, <a class="el" href="arm__cfft__radix4__f32_8c.html#ae239ddf995d1607115f9e84d5c069b9c">arm_radix4_butterfly_f32()</a>, <a class="el" href="arm__cfft__radix4__f32_8c.html#a2a78df6e4bbf080624f2b6349224ec93">arm_radix4_butterfly_inverse_f32()</a>, <a class="el" href="structarm__cfft__radix4__instance__f32.html#ac10927a1620195a88649ce63dab66120">arm_cfft_radix4_instance_f32::bitReverseFlag</a>, <a class="el" href="structarm__cfft__radix4__instance__f32.html#acc8cb18a8b901b8321ab9d86491e41a3">arm_cfft_radix4_instance_f32::bitRevFactor</a>, <a class="el" href="structarm__cfft__radix4__instance__f32.html#a7e6a6d290ce158ce9a15a45e364b021a">arm_cfft_radix4_instance_f32::fftLen</a>, <a class="el" href="structarm__cfft__radix4__instance__f32.html#a25d1da64dd6487c291f04d226f9acc66">arm_cfft_radix4_instance_f32::ifftFlag</a>, <a class="el" href="structarm__cfft__radix4__instance__f32.html#ab9eed39e40b8d7c16381fbccf84467cd">arm_cfft_radix4_instance_f32::onebyfftLen</a>, <a class="el" href="structarm__cfft__radix4__instance__f32.html#a8da0d2ca69749fde8cbb95caeac6fe6a">arm_cfft_radix4_instance_f32::pBitRevTable</a>, <a class="el" href="structarm__cfft__radix4__instance__f32.html#a14860c7544911702ca1fa0bf78204ef3">arm_cfft_radix4_instance_f32::pTwiddle</a>, and <a class="el" href="structarm__cfft__radix4__instance__f32.html#abe31ea2157dfa233e389cdfd3b9993ee">arm_cfft_radix4_instance_f32::twidCoefModifier</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__convolution__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="gaf336459f684f0b17bfae539ef1b1b78a"></a>
@@ -758,27 +787,34 @@
         </tr>
       </table>
 </div><div class="memdoc">
-<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000008">Deprecated:</a></b></dt><dd>Do not use this function. It has been superceded by <a class="el" href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80">arm_cfft_f32</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
+<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000009">Deprecated:</a></b></dt><dd>Do not use this function. It has been superceded by <a class="el" href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80">arm_cfft_f32</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the floating-point CFFT/CIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the floating-point CFFT/CIFFT structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects transform direction<ul>
+<li>value = 0: forward transform</li>
+<li>value = 1: inverse transform </li>
+</ul>
+</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables / disables bit reversal of output<ul>
+<li>value = 0: disables bit reversal of output</li>
+<li>value = 1: enables bit reversal of output </li>
+</ul>
+</td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.</dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : <code>fftLen</code> is not a supported length</li>
+</ul>
 </dd></dl>
-<dl class="section user"><dt>Description:</dt><dd></dd></dl>
-<dl class="section user"><dt></dt><dd>The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated </dd></dl>
+</dd></dl>
+<dl class="section user"><dt>Details</dt><dd>The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated </dd></dl>
 <dl class="section user"><dt></dt><dd>The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. </dd></dl>
 <dl class="section user"><dt></dt><dd>The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024. </dd></dl>
 <dl class="section user"><dt></dt><dd>This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. </dd></dl>
 
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="group__CFFT__CIFFT.html#gae247e83ad50d474107254e25b36ad42b">armBitRevTable</a>, <a class="el" href="structarm__cfft__radix4__instance__f32.html#ac10927a1620195a88649ce63dab66120">arm_cfft_radix4_instance_f32::bitReverseFlag</a>, <a class="el" href="structarm__cfft__radix4__instance__f32.html#acc8cb18a8b901b8321ab9d86491e41a3">arm_cfft_radix4_instance_f32::bitRevFactor</a>, <a class="el" href="structarm__cfft__radix4__instance__f32.html#a7e6a6d290ce158ce9a15a45e364b021a">arm_cfft_radix4_instance_f32::fftLen</a>, <a class="el" href="arm__fft__bin__example__f32_8c.html#a379ccb99013d369a41b49619083c16ef">ifftFlag</a>, <a class="el" href="structarm__cfft__radix4__instance__f32.html#a25d1da64dd6487c291f04d226f9acc66">arm_cfft_radix4_instance_f32::ifftFlag</a>, <a class="el" href="structarm__cfft__radix4__instance__f32.html#ab9eed39e40b8d7c16381fbccf84467cd">arm_cfft_radix4_instance_f32::onebyfftLen</a>, <a class="el" href="structarm__cfft__radix4__instance__f32.html#a8da0d2ca69749fde8cbb95caeac6fe6a">arm_cfft_radix4_instance_f32::pBitRevTable</a>, <a class="el" href="structarm__cfft__radix4__instance__f32.html#a14860c7544911702ca1fa0bf78204ef3">arm_cfft_radix4_instance_f32::pTwiddle</a>, <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>, <a class="el" href="structarm__cfft__radix4__instance__f32.html#abe31ea2157dfa233e389cdfd3b9993ee">arm_cfft_radix4_instance_f32::twidCoefModifier</a>, and <a class="el" href="arm__common__tables_8h.html#a9bf8c85e4c91b9b55818b3d650d2c761">twiddleCoef</a>.</p>
-
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga10717ee326bf50832ef1c25b85a23068">arm_rfft_init_f32()</a>, and <a class="el" href="arm__convolution__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="ga0c2acfda3126c452e75b81669e8ad9ef"></a>
@@ -816,25 +852,34 @@
         </tr>
       </table>
 </div><div class="memdoc">
-<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000009">Deprecated:</a></b></dt><dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15</a> and will be removed <dl class="params"><dt>Parameters</dt><dd>
+<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000010">Deprecated:</a></b></dt><dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q15 CFFT/CIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q15 CFFT/CIFFT structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects transform direction<ul>
+<li>value = 0: forward transform</li>
+<li>value = 1: inverse transform </li>
+</ul>
+</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables / disables bit reversal of output<ul>
+<li>value = 0: disables bit reversal of output</li>
+<li>value = 1: enables bit reversal of output </li>
+</ul>
+</td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.</dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : <code>fftLen</code> is not a supported length</li>
+</ul>
 </dd></dl>
-<dl class="section user"><dt>Description:</dt><dd></dd></dl>
-<dl class="section user"><dt></dt><dd>The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated </dd></dl>
+</dd></dl>
+<dl class="section user"><dt>Details</dt><dd>The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated </dd></dl>
 <dl class="section user"><dt></dt><dd>The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. </dd></dl>
 <dl class="section user"><dt></dt><dd>The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024. </dd></dl>
 <dl class="section user"><dt></dt><dd>This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. </dd></dl>
 
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="group__CFFT__CIFFT.html#gae247e83ad50d474107254e25b36ad42b">armBitRevTable</a>, <a class="el" href="structarm__cfft__radix4__instance__q15.html#a101e3f7b0bd6b5b14cd5214f23df4133">arm_cfft_radix4_instance_q15::bitReverseFlag</a>, <a class="el" href="structarm__cfft__radix4__instance__q15.html#a6b010e5f02d1130c621e3d2e26b95df1">arm_cfft_radix4_instance_q15::bitRevFactor</a>, <a class="el" href="structarm__cfft__radix4__instance__q15.html#a5fc543e7d84ca8cb7cf6648970f21ca6">arm_cfft_radix4_instance_q15::fftLen</a>, <a class="el" href="arm__fft__bin__example__f32_8c.html#a379ccb99013d369a41b49619083c16ef">ifftFlag</a>, <a class="el" href="structarm__cfft__radix4__instance__q15.html#a2ecff6ea735cb4d22e922d0fd5736655">arm_cfft_radix4_instance_q15::ifftFlag</a>, <a class="el" href="structarm__cfft__radix4__instance__q15.html#a4acf704ae0cf30b53bf0fbfae8e34a59">arm_cfft_radix4_instance_q15::pBitRevTable</a>, <a class="el" href="structarm__cfft__radix4__instance__q15.html#a29dd693537e45421a36891f8439e1fba">arm_cfft_radix4_instance_q15::pTwiddle</a>, <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>, <a class="el" href="structarm__cfft__radix4__instance__q15.html#af32fdc78bcc27ca385f9b76a0a1f71c3">arm_cfft_radix4_instance_q15::twidCoefModifier</a>, and <a class="el" href="group__CFFT__CIFFT.html#ga9b409d6995eab17805b1d1881d4bc652">twiddleCoef_4096_q15</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="gad5caaafeec900c8ff72321c01bbd462c"></a>
@@ -872,25 +917,34 @@
         </tr>
       </table>
 </div><div class="memdoc">
-<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000010">Deprecated:</a></b></dt><dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31</a> and will be removed <dl class="params"><dt>Parameters</dt><dd>
+<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000011">Deprecated:</a></b></dt><dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q31 CFFT/CIFFT structure. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q31 CFFT/CIFFT structure. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>flag that selects transform direction<ul>
+<li>value = 0: forward transform</li>
+<li>value = 1: inverse transform </li>
+</ul>
+</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables / disables bit reversal of output<ul>
+<li>value = 0: disables bit reversal of output</li>
+<li>value = 1: enables bit reversal of output </li>
+</ul>
+</td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.</dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : <code>fftLen</code> is not a supported length</li>
+</ul>
 </dd></dl>
-<dl class="section user"><dt>Description:</dt><dd></dd></dl>
-<dl class="section user"><dt></dt><dd>The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated </dd></dl>
+</dd></dl>
+<dl class="section user"><dt>Details</dt><dd>The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated </dd></dl>
 <dl class="section user"><dt></dt><dd>The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. </dd></dl>
 <dl class="section user"><dt></dt><dd>The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024. </dd></dl>
 <dl class="section user"><dt></dt><dd>This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. </dd></dl>
 
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="group__CFFT__CIFFT.html#gae247e83ad50d474107254e25b36ad42b">armBitRevTable</a>, <a class="el" href="structarm__cfft__radix4__instance__q31.html#a5a7c4f4c7b3fb655cbb2bc11ef160a2a">arm_cfft_radix4_instance_q31::bitReverseFlag</a>, <a class="el" href="structarm__cfft__radix4__instance__q31.html#a94d2fead4efa4d5eaae142bbe30b0e15">arm_cfft_radix4_instance_q31::bitRevFactor</a>, <a class="el" href="structarm__cfft__radix4__instance__q31.html#ab413d2a5d3f45fa187d93813bf3bf81b">arm_cfft_radix4_instance_q31::fftLen</a>, <a class="el" href="arm__fft__bin__example__f32_8c.html#a379ccb99013d369a41b49619083c16ef">ifftFlag</a>, <a class="el" href="structarm__cfft__radix4__instance__q31.html#adc0a62ba669ad2282ecbe43d5d96abab">arm_cfft_radix4_instance_q31::ifftFlag</a>, <a class="el" href="structarm__cfft__radix4__instance__q31.html#a33a3bc774c97373261699463c05dfe54">arm_cfft_radix4_instance_q31::pBitRevTable</a>, <a class="el" href="structarm__cfft__radix4__instance__q31.html#a561c22dee4cbdcfa0fd5f15106ecc306">arm_cfft_radix4_instance_q31::pTwiddle</a>, <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>, <a class="el" href="structarm__cfft__radix4__instance__q31.html#a8cf8187b8232815cf17ee82bf572ecf9">arm_cfft_radix4_instance_q31::twidCoefModifier</a>, and <a class="el" href="group__CFFT__CIFFT.html#ga67c0890317deab3391e276f22c1fc400">twiddleCoef_4096_q31</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="ga8d66cdac41b8bf6cefdb895456eee84a"></a>
@@ -916,29 +970,26 @@
         </tr>
       </table>
 </div><div class="memdoc">
-<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000011">Deprecated:</a></b></dt><dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15</a> and will be removed <dl class="params"><dt>Parameters</dt><dd>
+<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000012">Deprecated:</a></b></dt><dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q15 CFFT/CIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*pSrc</td><td>points to the complex data buffer. Processing occurs in-place. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q15 CFFT/CIFFT structure. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to the complex data buffer. Processing occurs in-place. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
 </dd></dl>
-<dl class="section user"><dt>Input and output formats:</dt><dd></dd></dl>
-<dl class="section user"><dt></dt><dd>Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. Hence the output format is different for different FFT sizes. The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT: </dd></dl>
+<dl class="section user"><dt>Input and output formats:</dt><dd>Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. Hence the output format is different for different FFT sizes. The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT: </dd></dl>
 <dl class="section user"><dt></dt><dd><div class="image">
 <img src="CFFTQ15.gif" alt="CFFTQ15.gif"/>
 <div class="caption">
 Input and Output Formats for Q15 CFFT</div></div>
-<div class="image">
+ <div class="image">
 <img src="CIFFTQ15.gif" alt="CIFFTQ15.gif"/>
 <div class="caption">
 Input and Output Formats for Q15 CIFFT</div></div>
 </dd></dl>
 
-<p>References <a class="el" href="arm__cfft__radix4__q15_8c.html#a73f48eaea9297605705ae25d3405343e">arm_bitreversal_q15()</a>, <a class="el" href="arm__cfft__radix4__q15_8c.html#aad04e8439d17dab5617bf1be268bb391">arm_radix4_butterfly_inverse_q15()</a>, <a class="el" href="arm__cfft__radix4__q15_8c.html#a2d01d2045f280c32036da97d33c52440">arm_radix4_butterfly_q15()</a>, <a class="el" href="structarm__cfft__radix4__instance__q15.html#a101e3f7b0bd6b5b14cd5214f23df4133">arm_cfft_radix4_instance_q15::bitReverseFlag</a>, <a class="el" href="structarm__cfft__radix4__instance__q15.html#a6b010e5f02d1130c621e3d2e26b95df1">arm_cfft_radix4_instance_q15::bitRevFactor</a>, <a class="el" href="structarm__cfft__radix4__instance__q15.html#a5fc543e7d84ca8cb7cf6648970f21ca6">arm_cfft_radix4_instance_q15::fftLen</a>, <a class="el" href="structarm__cfft__radix4__instance__q15.html#a2ecff6ea735cb4d22e922d0fd5736655">arm_cfft_radix4_instance_q15::ifftFlag</a>, <a class="el" href="structarm__cfft__radix4__instance__q15.html#a4acf704ae0cf30b53bf0fbfae8e34a59">arm_cfft_radix4_instance_q15::pBitRevTable</a>, <a class="el" href="structarm__cfft__radix4__instance__q15.html#a29dd693537e45421a36891f8439e1fba">arm_cfft_radix4_instance_q15::pTwiddle</a>, and <a class="el" href="structarm__cfft__radix4__instance__q15.html#af32fdc78bcc27ca385f9b76a0a1f71c3">arm_cfft_radix4_instance_q15::twidCoefModifier</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="gafde3ee1f58cf393b45a9073174fff548"></a>
@@ -964,29 +1015,26 @@
         </tr>
       </table>
 </div><div class="memdoc">
-<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000012">Deprecated:</a></b></dt><dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31</a> and will be removed <dl class="params"><dt>Parameters</dt><dd>
+<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000013">Deprecated:</a></b></dt><dd>Do not use this function. It has been superseded by <a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q31 CFFT/CIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*pSrc</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q31 CFFT/CIFFT structure </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pSrc</td><td>points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
 </dd></dl>
-<dl class="section user"><dt>Input and output formats:</dt><dd></dd></dl>
-<dl class="section user"><dt></dt><dd>Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. Hence the output format is different for different FFT sizes. The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT: </dd></dl>
+<dl class="section user"><dt>Input and output formats:</dt><dd>Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. Hence the output format is different for different FFT sizes. The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT: </dd></dl>
 <dl class="section user"><dt></dt><dd><div class="image">
 <img src="CFFTQ31.gif" alt="CFFTQ31.gif"/>
 <div class="caption">
 Input and Output Formats for Q31 CFFT</div></div>
-<div class="image">
+ <div class="image">
 <img src="CIFFTQ31.gif" alt="CIFFTQ31.gif"/>
 <div class="caption">
 Input and Output Formats for Q31 CIFFT</div></div>
 </dd></dl>
 
-<p>References <a class="el" href="arm__cfft__radix4__q31_8c.html#a3fab577d25c3a517973c8c214f66f268">arm_bitreversal_q31()</a>, <a class="el" href="arm__cfft__radix4__q31_8c.html#ac9c7c553114c1201a3a987a11b8a6d01">arm_radix4_butterfly_inverse_q31()</a>, <a class="el" href="arm__cfft__radix4__q31_8c.html#ac12f1e7f159d5741358cdc36830a0395">arm_radix4_butterfly_q31()</a>, <a class="el" href="structarm__cfft__radix4__instance__q31.html#a5a7c4f4c7b3fb655cbb2bc11ef160a2a">arm_cfft_radix4_instance_q31::bitReverseFlag</a>, <a class="el" href="structarm__cfft__radix4__instance__q31.html#a94d2fead4efa4d5eaae142bbe30b0e15">arm_cfft_radix4_instance_q31::bitRevFactor</a>, <a class="el" href="structarm__cfft__radix4__instance__q31.html#ab413d2a5d3f45fa187d93813bf3bf81b">arm_cfft_radix4_instance_q31::fftLen</a>, <a class="el" href="structarm__cfft__radix4__instance__q31.html#adc0a62ba669ad2282ecbe43d5d96abab">arm_cfft_radix4_instance_q31::ifftFlag</a>, <a class="el" href="structarm__cfft__radix4__instance__q31.html#a33a3bc774c97373261699463c05dfe54">arm_cfft_radix4_instance_q31::pBitRevTable</a>, <a class="el" href="structarm__cfft__radix4__instance__q31.html#a561c22dee4cbdcfa0fd5f15106ecc306">arm_cfft_radix4_instance_q31::pTwiddle</a>, and <a class="el" href="structarm__cfft__radix4__instance__q31.html#a8cf8187b8232815cf17ee82bf572ecf9">arm_cfft_radix4_instance_q31::twidCoefModifier</a>.</p>
-
 </div>
 </div>
 </div><!-- contents -->
@@ -994,7 +1042,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__Conv.html b/docs/DSP/html/group__Conv.html
index dab311e..0b6f7f1 100644
--- a/docs/DSP/html/group__Conv.html
+++ b/docs/DSP/html/group__Conv.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,64 +116,61 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga3f860dc98c6fc4cafc421e4a2aed3c89"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga3f860dc98c6fc4cafc421e4a2aed3c89">arm_conv_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst)</td></tr>
-<tr class="memdesc:ga3f860dc98c6fc4cafc421e4a2aed3c89"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of floating-point sequences.  <a href="#ga3f860dc98c6fc4cafc421e4a2aed3c89">More...</a><br/></td></tr>
-<tr class="separator:ga3f860dc98c6fc4cafc421e4a2aed3c89"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf16f490d245391ec18a42adc73d6d749"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#gaf16f490d245391ec18a42adc73d6d749">arm_conv_fast_opt_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
-<tr class="memdesc:gaf16f490d245391ec18a42adc73d6d749"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.  <a href="#gaf16f490d245391ec18a42adc73d6d749">More...</a><br/></td></tr>
-<tr class="separator:gaf16f490d245391ec18a42adc73d6d749"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad75ca978ce906e04abdf86a8d76306d4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#gad75ca978ce906e04abdf86a8d76306d4">arm_conv_fast_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
-<tr class="memdesc:gad75ca978ce906e04abdf86a8d76306d4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.  <a href="#gad75ca978ce906e04abdf86a8d76306d4">More...</a><br/></td></tr>
-<tr class="separator:gad75ca978ce906e04abdf86a8d76306d4"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga51112dcdf9b3624eb05182cdc4da9ec0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga51112dcdf9b3624eb05182cdc4da9ec0">arm_conv_fast_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
-<tr class="memdesc:ga51112dcdf9b3624eb05182cdc4da9ec0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.  <a href="#ga51112dcdf9b3624eb05182cdc4da9ec0">More...</a><br/></td></tr>
-<tr class="separator:ga51112dcdf9b3624eb05182cdc4da9ec0"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac77dbcaef5c754cac27eab96c4753a3c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#gac77dbcaef5c754cac27eab96c4753a3c">arm_conv_opt_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
-<tr class="memdesc:gac77dbcaef5c754cac27eab96c4753a3c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q15 sequences.  <a href="#gac77dbcaef5c754cac27eab96c4753a3c">More...</a><br/></td></tr>
-<tr class="separator:gac77dbcaef5c754cac27eab96c4753a3c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga4c7cf073e89d6d57cc4e711f078c3f68"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga4c7cf073e89d6d57cc4e711f078c3f68">arm_conv_opt_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
-<tr class="memdesc:ga4c7cf073e89d6d57cc4e711f078c3f68"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q7 sequences.  <a href="#ga4c7cf073e89d6d57cc4e711f078c3f68">More...</a><br/></td></tr>
-<tr class="separator:ga4c7cf073e89d6d57cc4e711f078c3f68"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaccd6a89b0ff7a94df64610598e6e6893"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#gaccd6a89b0ff7a94df64610598e6e6893">arm_conv_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
-<tr class="memdesc:gaccd6a89b0ff7a94df64610598e6e6893"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q15 sequences.  <a href="#gaccd6a89b0ff7a94df64610598e6e6893">More...</a><br/></td></tr>
-<tr class="separator:gaccd6a89b0ff7a94df64610598e6e6893"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga946b58da734f1e4e78c91fcaab4b12b6"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga946b58da734f1e4e78c91fcaab4b12b6">arm_conv_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
-<tr class="memdesc:ga946b58da734f1e4e78c91fcaab4b12b6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q31 sequences.  <a href="#ga946b58da734f1e4e78c91fcaab4b12b6">More...</a><br/></td></tr>
-<tr class="separator:ga946b58da734f1e4e78c91fcaab4b12b6"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gae2070cb792a167e78dbad8d06b97cdab"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#gae2070cb792a167e78dbad8d06b97cdab">arm_conv_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst)</td></tr>
-<tr class="memdesc:gae2070cb792a167e78dbad8d06b97cdab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q7 sequences.  <a href="#gae2070cb792a167e78dbad8d06b97cdab">More...</a><br/></td></tr>
-<tr class="separator:gae2070cb792a167e78dbad8d06b97cdab"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga2e977f76e873bd47c6c41c7d940fdf7e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga2e977f76e873bd47c6c41c7d940fdf7e">arm_conv_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga2e977f76e873bd47c6c41c7d940fdf7e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of floating-point sequences.  <a href="#ga2e977f76e873bd47c6c41c7d940fdf7e">More...</a><br/></td></tr>
+<tr class="separator:ga2e977f76e873bd47c6c41c7d940fdf7e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga8ecd292b8e74c8f05b208e7948d05a90"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga8ecd292b8e74c8f05b208e7948d05a90">arm_conv_fast_opt_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
+<tr class="memdesc:ga8ecd292b8e74c8f05b208e7948d05a90"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q15 sequences (fast version).  <a href="#ga8ecd292b8e74c8f05b208e7948d05a90">More...</a><br/></td></tr>
+<tr class="separator:ga8ecd292b8e74c8f05b208e7948d05a90"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf6bc2c8d655ef8c9b66affdae489f366"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#gaf6bc2c8d655ef8c9b66affdae489f366">arm_conv_fast_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
+<tr class="memdesc:gaf6bc2c8d655ef8c9b66affdae489f366"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q15 sequences (fast version).  <a href="#gaf6bc2c8d655ef8c9b66affdae489f366">More...</a><br/></td></tr>
+<tr class="separator:gaf6bc2c8d655ef8c9b66affdae489f366"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga2d2b29b1f7f00a8651f1bc7f0560464b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga2d2b29b1f7f00a8651f1bc7f0560464b">arm_conv_fast_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga2d2b29b1f7f00a8651f1bc7f0560464b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q31 sequences (fast version).  <a href="#ga2d2b29b1f7f00a8651f1bc7f0560464b">More...</a><br/></td></tr>
+<tr class="separator:ga2d2b29b1f7f00a8651f1bc7f0560464b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0d60c7a8349c6235d88bf87b04172252"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga0d60c7a8349c6235d88bf87b04172252">arm_conv_opt_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
+<tr class="memdesc:ga0d60c7a8349c6235d88bf87b04172252"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q15 sequences.  <a href="#ga0d60c7a8349c6235d88bf87b04172252">More...</a><br/></td></tr>
+<tr class="separator:ga0d60c7a8349c6235d88bf87b04172252"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf23966af04840f17c26c93849986baeb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#gaf23966af04840f17c26c93849986baeb">arm_conv_opt_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
+<tr class="memdesc:gaf23966af04840f17c26c93849986baeb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q7 sequences.  <a href="#gaf23966af04840f17c26c93849986baeb">More...</a><br/></td></tr>
+<tr class="separator:gaf23966af04840f17c26c93849986baeb"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga372d3fd79b107dc6b12163a00c22da18"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga372d3fd79b107dc6b12163a00c22da18">arm_conv_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga372d3fd79b107dc6b12163a00c22da18"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q15 sequences.  <a href="#ga372d3fd79b107dc6b12163a00c22da18">More...</a><br/></td></tr>
+<tr class="separator:ga372d3fd79b107dc6b12163a00c22da18"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga08ce299fb5c3329505cb8ce4bf4f6e06"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga08ce299fb5c3329505cb8ce4bf4f6e06">arm_conv_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga08ce299fb5c3329505cb8ce4bf4f6e06"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q31 sequences.  <a href="#ga08ce299fb5c3329505cb8ce4bf4f6e06">More...</a><br/></td></tr>
+<tr class="separator:ga08ce299fb5c3329505cb8ce4bf4f6e06"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga625b30107443b6d145350bc242749764"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Conv.html#ga625b30107443b6d145350bc242749764">arm_conv_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga625b30107443b6d145350bc242749764"><td class="mdescLeft">&#160;</td><td class="mdescRight">Convolution of Q7 sequences.  <a href="#ga625b30107443b6d145350bc242749764">More...</a><br/></td></tr>
+<tr class="separator:ga625b30107443b6d145350bc242749764"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Convolution is a mathematical operation that operates on two finite length vectors to generate a finite length output vector. Convolution is similar to correlation and is frequently used in filtering and data analysis. The CMSIS DSP library contains functions for convolving Q7, Q15, Q31, and floating-point data types. The library also provides fast versions of the Q15 and Q31 functions on Cortex-M4 and Cortex-M3.</p>
-<dl class="section user"><dt>Algorithm</dt><dd>Let <code>a[n]</code> and <code>b[n]</code> be sequences of length <code>srcALen</code> and <code>srcBLen</code> samples respectively. Then the convolution</dd></dl>
-<pre>
-                  c[n] = a[n] * b[n]
-</pre><dl class="section user"><dt></dt><dd>is defined as <div class="image">
+<p>Convolution is a mathematical operation that operates on two finite length vectors to generate a finite length output vector. Convolution is similar to correlation and is frequently used in filtering and data analysis. The CMSIS DSP library contains functions for convolving Q7, Q15, Q31, and floating-point data types. The library also provides fast versions of the Q15 and Q31 functions.</p>
+<dl class="section user"><dt>Algorithm</dt><dd>Let <code>a[n]</code> and <code>b[n]</code> be sequences of length <code>srcALen</code> and <code>srcBLen</code> samples respectively. Then the convolution <pre>
+    c[n] = a[n] * b[n]
+ </pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>is defined as <div class="image">
 <img src="ConvolutionEquation.gif" alt="ConvolutionEquation.gif"/>
 </div>
  </dd></dl>
-<dl class="section user"><dt></dt><dd>Note that <code>c[n]</code> is of length <code>srcALen + srcBLen - 1</code> and is defined over the interval <code>n=0, 1, 2, ..., srcALen + srcBLen - 2</code>. <code>pSrcA</code> points to the first input vector of length <code>srcALen</code> and <code>pSrcB</code> points to the second input vector of length <code>srcBLen</code>. The output result is written to <code>pDst</code> and the calling function must allocate <code>srcALen+srcBLen-1</code> words for the result.</dd></dl>
-<dl class="section user"><dt></dt><dd>Conceptually, when two signals <code>a[n]</code> and <code>b[n]</code> are convolved, the signal <code>b[n]</code> slides over <code>a[n]</code>. For each offset <code>n</code>, the overlapping portions of a[n] and b[n] are multiplied and summed together.</dd></dl>
-<dl class="section user"><dt></dt><dd>Note that convolution is a commutative operation:</dd></dl>
-<pre>
-                  a[n] * b[n] = b[n] * a[n].
-</pre><dl class="section user"><dt></dt><dd>This means that switching the A and B arguments to the convolution functions has no effect.</dd></dl>
-<p><b>Fixed-Point Behavior</b></p>
-<dl class="section user"><dt></dt><dd>Convolution requires summing up a large number of intermediate products. As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation. Refer to the function specific documentation below for further details of the particular algorithm used.</dd></dl>
-<p><b>Fast Versions</b></p>
-<dl class="section user"><dt></dt><dd>Fast versions are supported for Q31 and Q15. Cycles for Fast versions are less compared to Q31 and Q15 of conv and the design requires the input signals should be scaled down to avoid intermediate overflows.</dd></dl>
-<p><b>Opt Versions</b></p>
-<dl class="section user"><dt></dt><dd>Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation. These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions </dd></dl>
+<dl class="section user"><dt></dt><dd>Note that <code>c[n]</code> is of length <code>srcALen + srcBLen - 1</code> and is defined over the interval <code>n=0, 1, 2, ..., srcALen + srcBLen - 2</code>. <code>pSrcA</code> points to the first input vector of length <code>srcALen</code> and <code>pSrcB</code> points to the second input vector of length <code>srcBLen</code>. The output result is written to <code>pDst</code> and the calling function must allocate <code>srcALen+srcBLen-1</code> words for the result. </dd></dl>
+<dl class="section user"><dt></dt><dd>Conceptually, when two signals <code>a[n]</code> and <code>b[n]</code> are convolved, the signal <code>b[n]</code> slides over <code>a[n]</code>. For each offset <code>n</code>, the overlapping portions of a[n] and b[n] are multiplied and summed together. </dd></dl>
+<dl class="section user"><dt></dt><dd>Note that convolution is a commutative operation: <pre>
+    a[n] * b[n] = b[n] * a[n].
+ </pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>This means that switching the A and B arguments to the convolution functions has no effect.</dd></dl>
+<dl class="section user"><dt>Fixed-Point Behavior</dt><dd>Convolution requires summing up a large number of intermediate products. As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation. Refer to the function specific documentation below for further details of the particular algorithm used.</dd></dl>
+<dl class="section user"><dt>Fast Versions</dt><dd>Fast versions are supported for Q31 and Q15. Cycles for Fast versions are less compared to Q31 and Q15 of conv and the design requires the input signals should be scaled down to avoid intermediate overflows.</dd></dl>
+<dl class="section user"><dt>Opt Versions</dt><dd>Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation. These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga3f860dc98c6fc4cafc421e4a2aed3c89"></a>
+<a class="anchor" id="ga2e977f76e873bd47c6c41c7d940fdf7e"></a>
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       <table class="memname">
         <tr>
           <td class="memname">void arm_conv_f32 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
@@ -185,7 +182,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -209,28 +206,26 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. Length srcALen+srcBLen-1. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written. Length srcALen+srcBLen-1. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, and <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gaf16f490d245391ec18a42adc73d6d749"></a>
+<a class="anchor" id="ga8ecd292b8e74c8f05b208e7948d05a90"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_conv_fast_opt_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
@@ -242,7 +237,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -276,36 +271,33 @@
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. Length srcALen+srcBLen-1. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pScratch1</td><td>points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pScratch2</td><td>points to scratch buffer of size min(srcALen, srcBLen). </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written. Length srcALen+srcBLen-1 </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pScratch1</td><td>points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2 </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pScratch2</td><td>points to scratch buffer of size min(srcALen, srcBLen </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Restrictions</dt><dd>If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally. The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.</dd></dl>
-<dl class="section user"><dt></dt><dd>See <code><a class="el" href="group__Conv.html#gaccd6a89b0ff7a94df64610598e6e6893" title="Convolution of Q15 sequences. ">arm_conv_q15()</a></code> for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#aa611fdbf6c56c46553701d6596a79aaf">__SMLAD()</a>, <a class="el" href="arm__math_8h.html#a7fc670277db1ad9ac34d52d771c7c305">__SMLADX()</a>, <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>, <a class="el" href="group__copy.html#ga872ca4cfc18c680b8991ccd569a5fda0">arm_copy_q15()</a>, <a class="el" href="group__Fill.html#ga76b21c32a3783a2b3334d930a646e5d8">arm_fill_q15()</a>, <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, and <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally. The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__Conv.html#ga372d3fd79b107dc6b12163a00c22da18">arm_conv_q15()</a> for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gad75ca978ce906e04abdf86a8d76306d4"></a>
+<a class="anchor" id="gaf6bc2c8d655ef8c9b66affdae489f366"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_conv_fast_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
@@ -317,7 +309,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -339,33 +331,31 @@
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. Length srcALen+srcBLen-1. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written. Length srcALen+srcBLen-1 </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally. The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.</dd></dl>
-<dl class="section user"><dt></dt><dd>See <code><a class="el" href="group__Conv.html#gaccd6a89b0ff7a94df64610598e6e6893" title="Convolution of Q15 sequences. ">arm_conv_q15()</a></code> for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#aa611fdbf6c56c46553701d6596a79aaf">__SMLAD()</a>, <a class="el" href="arm__math_8h.html#a7fc670277db1ad9ac34d52d771c7c305">__SMLADX()</a>, <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>, <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, and <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally. The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__Conv.html#ga372d3fd79b107dc6b12163a00c22da18">arm_conv_q15()</a> for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga51112dcdf9b3624eb05182cdc4da9ec0"></a>
+<a class="anchor" id="ga2d2b29b1f7f00a8651f1bc7f0560464b"></a>
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       <table class="memname">
         <tr>
           <td class="memname">void arm_conv_fast_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
@@ -377,7 +367,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -399,34 +389,32 @@
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. Length srcALen+srcBLen-1. </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written. Length srcALen+srcBLen-1. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 format. Finally, the accumulator is saturated and converted to a 1.31 result.</dd></dl>
-<dl class="section user"><dt></dt><dd>The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signals must be scaled down. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally.</dd></dl>
-<dl class="section user"><dt></dt><dd>See <code><a class="el" href="group__Conv.html#ga946b58da734f1e4e78c91fcaab4b12b6" title="Convolution of Q31 sequences. ">arm_conv_q31()</a></code> for a slower implementation of this function which uses 64-bit accumulation to provide higher precision. </dd></dl>
-
-<p>References <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, and <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 format. Finally, the accumulator is saturated and converted to a 1.31 result. </dd></dl>
+<dl class="section user"><dt></dt><dd>The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signals must be scaled down. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally. </dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__Conv.html#ga08ce299fb5c3329505cb8ce4bf4f6e06">arm_conv_q31()</a> for a slower implementation of this function which uses 64-bit accumulation to provide higher precision. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gac77dbcaef5c754cac27eab96c4753a3c"></a>
+<a class="anchor" id="ga0d60c7a8349c6235d88bf87b04172252"></a>
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 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_conv_opt_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
@@ -438,7 +426,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -474,34 +462,30 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. Length srcALen+srcBLen-1. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pScratch1</td><td>points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pScratch2</td><td>points to scratch buffer of size min(srcALen, srcBLen). </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written. Length srcALen+srcBLen-1. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pScratch1</td><td>points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pScratch2</td><td>points to scratch buffer of size min(srcALen, srcBLen). </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Restrictions</dt><dd>If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 64-bit internal accumulator. Both inputs are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.</dd></dl>
-<dl class="section user"><dt></dt><dd>Refer to <code><a class="el" href="group__Conv.html#gad75ca978ce906e04abdf86a8d76306d4" title="Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4. ">arm_conv_fast_q15()</a></code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a7aed02041f489a4f65dbd7093073d94e">__SMLALD()</a>, <a class="el" href="arm__math_8h.html#a3bdab9022ab56e30f6346a043050dfc4">__SMLALDX()</a>, <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>, <a class="el" href="group__copy.html#ga872ca4cfc18c680b8991ccd569a5fda0">arm_copy_q15()</a>, <a class="el" href="group__Fill.html#ga76b21c32a3783a2b3334d930a646e5d8">arm_fill_q15()</a>, <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, and <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 64-bit internal accumulator. Both inputs are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format. </dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__Conv.html#gaf6bc2c8d655ef8c9b66affdae489f366">arm_conv_fast_q15()</a> for a faster but less precise version of this function. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga4c7cf073e89d6d57cc4e711f078c3f68"></a>
+<a class="anchor" id="gaf23966af04840f17c26c93849986baeb"></a>
 <div class="memitem">
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       <table class="memname">
         <tr>
           <td class="memname">void arm_conv_opt_q7 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
@@ -513,7 +497,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -549,33 +533,29 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. Length srcALen+srcBLen-1. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pScratch1</td><td>points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pScratch2</td><td>points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written. Length srcALen+srcBLen-1. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pScratch1</td><td>points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pScratch2</td><td>points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Restrictions</dt><dd>If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 32-bit internal accumulator. Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)&lt;131072</code>. The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a3ebff224ad44c217fde9f530342e2960">__PACKq7</a>, <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#aa611fdbf6c56c46553701d6596a79aaf">__SMLAD()</a>, <a class="el" href="arm__math_8h.html#a7fc670277db1ad9ac34d52d771c7c305">__SMLADX()</a>, <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>, <a class="el" href="group__Fill.html#ga76b21c32a3783a2b3334d930a646e5d8">arm_fill_q15()</a>, <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, and <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 32-bit internal accumulator. Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)&lt;131072</code>. The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gaccd6a89b0ff7a94df64610598e6e6893"></a>
+<a class="anchor" id="ga372d3fd79b107dc6b12163a00c22da18"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_conv_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
@@ -587,7 +567,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -611,32 +591,30 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. Length srcALen+srcBLen-1. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written. Length srcALen+srcBLen-1. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 64-bit internal accumulator. Both inputs are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.</dd></dl>
-<dl class="section user"><dt></dt><dd>Refer to <code><a class="el" href="group__Conv.html#gad75ca978ce906e04abdf86a8d76306d4" title="Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4. ">arm_conv_fast_q15()</a></code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.</dd></dl>
-<dl class="section user"><dt></dt><dd>Refer the function <code><a class="el" href="group__Conv.html#gac77dbcaef5c754cac27eab96c4753a3c" title="Convolution of Q15 sequences. ">arm_conv_opt_q15()</a></code> for a faster implementation of this function using scratch buffers. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a7aed02041f489a4f65dbd7093073d94e">__SMLALD()</a>, <a class="el" href="arm__math_8h.html#a3bdab9022ab56e30f6346a043050dfc4">__SMLALDX()</a>, <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>, <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, and <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 64-bit internal accumulator. Both inputs are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__Conv.html#gaf6bc2c8d655ef8c9b66affdae489f366">arm_conv_fast_q15()</a> for a faster but less precise version of this function. </dd>
+<dd>
+Refer to <a class="el" href="group__Conv.html#ga0d60c7a8349c6235d88bf87b04172252">arm_conv_opt_q15()</a> for a faster implementation of this function using scratch buffers. </dd></dl>
 
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-<a class="anchor" id="ga946b58da734f1e4e78c91fcaab4b12b6"></a>
+<a class="anchor" id="ga08ce299fb5c3329505cb8ce4bf4f6e06"></a>
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 <div class="memproto">
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           <td class="memname">void arm_conv_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
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@@ -648,7 +626,7 @@
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           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -672,31 +650,28 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. Length srcALen+srcBLen-1. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written. Length srcALen+srcBLen-1. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally. The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.</dd></dl>
-<dl class="section user"><dt></dt><dd>See <code><a class="el" href="group__Conv.html#ga51112dcdf9b3624eb05182cdc4da9ec0" title="Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4. ">arm_conv_fast_q31()</a></code> for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4. </dd></dl>
-
-<p>References <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, and <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally. The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__Conv.html#ga2d2b29b1f7f00a8651f1bc7f0560464b">arm_conv_fast_q31()</a> for a faster but less precise implementation of this function. </dd></dl>
 
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-<a class="anchor" id="gae2070cb792a167e78dbad8d06b97cdab"></a>
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           <td class="memname">void arm_conv_q7 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
@@ -708,7 +683,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -732,20 +707,17 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. Length srcALen+srcBLen-1. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written. Length srcALen+srcBLen-1. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 32-bit internal accumulator. Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)&lt;131072</code>. The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.</dd></dl>
-<dl class="section user"><dt></dt><dd>Refer the function <code><a class="el" href="group__Conv.html#ga4c7cf073e89d6d57cc4e711f078c3f68" title="Convolution of Q7 sequences. ">arm_conv_opt_q7()</a></code> for a faster implementation of this function. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa611fdbf6c56c46553701d6596a79aaf">__SMLAD()</a>, <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, and <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 32-bit internal accumulator. Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)&lt;131072</code>. The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format. </dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__Conv.html#gaf23966af04840f17c26c93849986baeb">arm_conv_opt_q7()</a> for a faster implementation of this function. </dd></dl>
 
 </div>
 </div>
@@ -754,7 +726,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__Conv.js b/docs/DSP/html/group__Conv.js
index 37032c9..50f5e53 100644
--- a/docs/DSP/html/group__Conv.js
+++ b/docs/DSP/html/group__Conv.js
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-    [ "arm_conv_fast_opt_q15", "group__Conv.html#gaf16f490d245391ec18a42adc73d6d749", null ],
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+    [ "arm_conv_f32", "group__Conv.html#ga2e977f76e873bd47c6c41c7d940fdf7e", null ],
+    [ "arm_conv_fast_opt_q15", "group__Conv.html#ga8ecd292b8e74c8f05b208e7948d05a90", null ],
+    [ "arm_conv_fast_q15", "group__Conv.html#gaf6bc2c8d655ef8c9b66affdae489f366", null ],
+    [ "arm_conv_fast_q31", "group__Conv.html#ga2d2b29b1f7f00a8651f1bc7f0560464b", null ],
+    [ "arm_conv_opt_q15", "group__Conv.html#ga0d60c7a8349c6235d88bf87b04172252", null ],
+    [ "arm_conv_opt_q7", "group__Conv.html#gaf23966af04840f17c26c93849986baeb", null ],
+    [ "arm_conv_q15", "group__Conv.html#ga372d3fd79b107dc6b12163a00c22da18", null ],
+    [ "arm_conv_q31", "group__Conv.html#ga08ce299fb5c3329505cb8ce4bf4f6e06", null ],
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diff --git a/docs/DSP/html/group__ConvolutionExample.html b/docs/DSP/html/group__ConvolutionExample.html
index 5de2725..c0c4772 100644
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   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -137,10 +137,10 @@
 <dl class="section user"><dt>CMSIS DSP Software Library Functions Used:</dt><dd></dd></dl>
 <dl class="section user"><dt></dt><dd><ul>
 <li><a class="el" href="group__Fill.html#ga2248e8d3901b4afb7827163132baad94" title="Fills a constant value into a floating-point vector. ">arm_fill_f32()</a></li>
-<li><a class="el" href="group__copy.html#gadd1f737e677e0e6ca31767c7001417b3" title="Copies the elements of a floating-point vector. ">arm_copy_f32()</a></li>
+<li><a class="el" href="group__copy.html#gaa6dfe9554ca61eb3d1eee498396bce88" title="Copies the elements of a floating-point vector. ">arm_copy_f32()</a></li>
 <li><a class="el" href="group__ComplexFFT.html#gaf336459f684f0b17bfae539ef1b1b78a" title="Initialization function for the floating-point CFFT/CIFFT. ">arm_cfft_radix4_init_f32()</a></li>
 <li><a class="el" href="group__ComplexFFT.html#ga521f670cd9c571bc61aff9bec89f4c26" title="Processing function for the floating-point Radix-4 CFFT/CIFFT. ">arm_cfft_radix4_f32()</a></li>
-<li><a class="el" href="group__CmplxByCmplxMult.html#ga14b47080054a1ba1250a86805be1ff6b" title="Floating-point complex-by-complex multiplication. ">arm_cmplx_mult_cmplx_f32()</a></li>
+<li><a class="el" href="group__CmplxByCmplxMult.html#gae221504b01e4abfe5f335eafd801b4ed" title="Floating-point complex-by-complex multiplication. ">arm_cmplx_mult_cmplx_f32()</a></li>
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 <p><b> Refer </b> <a class="el" href="arm_convolution_example_f32_8c-example.html">arm_convolution_example_f32.c</a> </p>
@@ -149,7 +149,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/group__Corr.html b/docs/DSP/html/group__Corr.html
index f0f9353..bfb114e 100644
--- a/docs/DSP/html/group__Corr.html
+++ b/docs/DSP/html/group__Corr.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
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    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,63 +116,59 @@
 <table class="memberdecls">
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 Functions</h2></td></tr>
-<tr class="memitem:ga22021e4222773f01e9960358a531cfb8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga22021e4222773f01e9960358a531cfb8">arm_correlate_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst)</td></tr>
-<tr class="memdesc:ga22021e4222773f01e9960358a531cfb8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of floating-point sequences.  <a href="#ga22021e4222773f01e9960358a531cfb8">More...</a><br/></td></tr>
-<tr class="separator:ga22021e4222773f01e9960358a531cfb8"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga40a0236b17220e8e22a22b5bc1c53c6b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga40a0236b17220e8e22a22b5bc1c53c6b">arm_correlate_fast_opt_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch)</td></tr>
-<tr class="memdesc:ga40a0236b17220e8e22a22b5bc1c53c6b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.  <a href="#ga40a0236b17220e8e22a22b5bc1c53c6b">More...</a><br/></td></tr>
-<tr class="separator:ga40a0236b17220e8e22a22b5bc1c53c6b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac8de3da44f58e86c2c86156276ca154f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#gac8de3da44f58e86c2c86156276ca154f">arm_correlate_fast_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
-<tr class="memdesc:gac8de3da44f58e86c2c86156276ca154f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.  <a href="#gac8de3da44f58e86c2c86156276ca154f">More...</a><br/></td></tr>
-<tr class="separator:gac8de3da44f58e86c2c86156276ca154f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gabecd3d7b077dbbef43f93e9e037815ed"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#gabecd3d7b077dbbef43f93e9e037815ed">arm_correlate_fast_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
-<tr class="memdesc:gabecd3d7b077dbbef43f93e9e037815ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.  <a href="#gabecd3d7b077dbbef43f93e9e037815ed">More...</a><br/></td></tr>
-<tr class="separator:gabecd3d7b077dbbef43f93e9e037815ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad71c0ec70ec69edbc48563d9a5f68451"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#gad71c0ec70ec69edbc48563d9a5f68451">arm_correlate_opt_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch)</td></tr>
-<tr class="memdesc:gad71c0ec70ec69edbc48563d9a5f68451"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q15 sequences.  <a href="#gad71c0ec70ec69edbc48563d9a5f68451">More...</a><br/></td></tr>
-<tr class="separator:gad71c0ec70ec69edbc48563d9a5f68451"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga746e8857cafe33ec5d6780729c18c311"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga746e8857cafe33ec5d6780729c18c311">arm_correlate_opt_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
-<tr class="memdesc:ga746e8857cafe33ec5d6780729c18c311"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q7 sequences.  <a href="#ga746e8857cafe33ec5d6780729c18c311">More...</a><br/></td></tr>
-<tr class="separator:ga746e8857cafe33ec5d6780729c18c311"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga5ec96b8e420d68b0e626df0812274d46"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga5ec96b8e420d68b0e626df0812274d46">arm_correlate_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
-<tr class="memdesc:ga5ec96b8e420d68b0e626df0812274d46"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q15 sequences.  <a href="#ga5ec96b8e420d68b0e626df0812274d46">More...</a><br/></td></tr>
-<tr class="separator:ga5ec96b8e420d68b0e626df0812274d46"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga1367dc6c80476406c951e68d7fac4e8c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga1367dc6c80476406c951e68d7fac4e8c">arm_correlate_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
-<tr class="memdesc:ga1367dc6c80476406c951e68d7fac4e8c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q31 sequences.  <a href="#ga1367dc6c80476406c951e68d7fac4e8c">More...</a><br/></td></tr>
-<tr class="separator:ga1367dc6c80476406c951e68d7fac4e8c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga284ddcc49e4ac532d52a70d0383c5992"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga284ddcc49e4ac532d52a70d0383c5992">arm_correlate_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst)</td></tr>
-<tr class="memdesc:ga284ddcc49e4ac532d52a70d0383c5992"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q7 sequences.  <a href="#ga284ddcc49e4ac532d52a70d0383c5992">More...</a><br/></td></tr>
-<tr class="separator:ga284ddcc49e4ac532d52a70d0383c5992"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga371054f6e5fd78bec668908251f1b2f2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga371054f6e5fd78bec668908251f1b2f2">arm_correlate_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga371054f6e5fd78bec668908251f1b2f2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of floating-point sequences.  <a href="#ga371054f6e5fd78bec668908251f1b2f2">More...</a><br/></td></tr>
+<tr class="separator:ga371054f6e5fd78bec668908251f1b2f2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga3fc8d680844a3d24af25e45df96c82f3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga3fc8d680844a3d24af25e45df96c82f3">arm_correlate_fast_opt_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch)</td></tr>
+<tr class="memdesc:ga3fc8d680844a3d24af25e45df96c82f3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q15 sequences (fast version).  <a href="#ga3fc8d680844a3d24af25e45df96c82f3">More...</a><br/></td></tr>
+<tr class="separator:ga3fc8d680844a3d24af25e45df96c82f3"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab4dea2049c8a26118ee4de9b90f1b9bd"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#gab4dea2049c8a26118ee4de9b90f1b9bd">arm_correlate_fast_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
+<tr class="memdesc:gab4dea2049c8a26118ee4de9b90f1b9bd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q15 sequences (fast version).  <a href="#gab4dea2049c8a26118ee4de9b90f1b9bd">More...</a><br/></td></tr>
+<tr class="separator:gab4dea2049c8a26118ee4de9b90f1b9bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1e85a8ceac5c0f27007e6ba2c8f20686"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga1e85a8ceac5c0f27007e6ba2c8f20686">arm_correlate_fast_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga1e85a8ceac5c0f27007e6ba2c8f20686"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q31 sequences (fast version).  <a href="#ga1e85a8ceac5c0f27007e6ba2c8f20686">More...</a><br/></td></tr>
+<tr class="separator:ga1e85a8ceac5c0f27007e6ba2c8f20686"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga3cfae563b16fa3be577cab5acf63aeea"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga3cfae563b16fa3be577cab5acf63aeea">arm_correlate_opt_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch)</td></tr>
+<tr class="memdesc:ga3cfae563b16fa3be577cab5acf63aeea"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q15 sequences.  <a href="#ga3cfae563b16fa3be577cab5acf63aeea">More...</a><br/></td></tr>
+<tr class="separator:ga3cfae563b16fa3be577cab5acf63aeea"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga3c672e8ef8360c652d351097535f080d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga3c672e8ef8360c652d351097535f080d">arm_correlate_opt_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
+<tr class="memdesc:ga3c672e8ef8360c652d351097535f080d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q7 sequences.  <a href="#ga3c672e8ef8360c652d351097535f080d">More...</a><br/></td></tr>
+<tr class="separator:ga3c672e8ef8360c652d351097535f080d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga8fc4e632ab08b28435ff62e7eb65f508"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga8fc4e632ab08b28435ff62e7eb65f508">arm_correlate_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga8fc4e632ab08b28435ff62e7eb65f508"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q15 sequences.  <a href="#ga8fc4e632ab08b28435ff62e7eb65f508">More...</a><br/></td></tr>
+<tr class="separator:ga8fc4e632ab08b28435ff62e7eb65f508"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9e8ad8bae8400dac2afc995d38594744"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#ga9e8ad8bae8400dac2afc995d38594744">arm_correlate_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst)</td></tr>
+<tr class="memdesc:ga9e8ad8bae8400dac2afc995d38594744"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q31 sequences.  <a href="#ga9e8ad8bae8400dac2afc995d38594744">More...</a><br/></td></tr>
+<tr class="separator:ga9e8ad8bae8400dac2afc995d38594744"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab5d8acc830313be970de59c2d5a26c72"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Corr.html#gab5d8acc830313be970de59c2d5a26c72">arm_correlate_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst)</td></tr>
+<tr class="memdesc:gab5d8acc830313be970de59c2d5a26c72"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correlation of Q7 sequences.  <a href="#gab5d8acc830313be970de59c2d5a26c72">More...</a><br/></td></tr>
+<tr class="separator:gab5d8acc830313be970de59c2d5a26c72"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>Correlation is a mathematical operation that is similar to convolution. As with convolution, correlation uses two signals to produce a third signal. The underlying algorithms in correlation and convolution are identical except that one of the inputs is flipped in convolution. Correlation is commonly used to measure the similarity between two signals. It has applications in pattern recognition, cryptanalysis, and searching. The CMSIS library provides correlation functions for Q7, Q15, Q31 and floating-point data types. Fast versions of the Q15 and Q31 functions are also provided.</p>
 <dl class="section user"><dt>Algorithm</dt><dd>Let <code>a[n]</code> and <code>b[n]</code> be sequences of length <code>srcALen</code> and <code>srcBLen</code> samples respectively. The convolution of the two signals is denoted by <pre>
-                  c[n] = a[n] * b[n]
+    c[n] = a[n] * b[n]
 </pre> In correlation, one of the signals is flipped in time <pre>
-                  c[n] = a[n] * b[-n]
-</pre></dd></dl>
+     c[n] = a[n] * b[-n]
+</pre> </dd></dl>
 <dl class="section user"><dt></dt><dd>and this is mathematically defined as <div class="image">
 <img src="CorrelateEquation.gif" alt="CorrelateEquation.gif"/>
 </div>
  </dd></dl>
 <dl class="section user"><dt></dt><dd>The <code>pSrcA</code> points to the first input vector of length <code>srcALen</code> and <code>pSrcB</code> points to the second input vector of length <code>srcBLen</code>. The result <code>c[n]</code> is of length <code>2 * max(srcALen, srcBLen) - 1</code> and is defined over the interval <code>n=0, 1, 2, ..., (2 * max(srcALen, srcBLen) - 2)</code>. The output result is written to <code>pDst</code> and the calling function must allocate <code>2 * max(srcALen, srcBLen) - 1</code> words for the result.</dd></dl>
-<p><b>Note</b> </p>
-<dl class="section user"><dt></dt><dd>The <code>pDst</code> should be initialized to all zeros before being used.</dd></dl>
-<p><b>Fixed-Point Behavior</b> </p>
-<dl class="section user"><dt></dt><dd>Correlation requires summing up a large number of intermediate products. As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation. Refer to the function specific documentation below for further details of the particular algorithm used.</dd></dl>
-<p><b>Fast Versions</b></p>
-<dl class="section user"><dt></dt><dd>Fast versions are supported for Q31 and Q15. Cycles for Fast versions are less compared to Q31 and Q15 of correlate and the design requires the input signals should be scaled down to avoid intermediate overflows.</dd></dl>
-<p><b>Opt Versions</b></p>
-<dl class="section user"><dt></dt><dd>Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation. These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions of correlate </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>The <code>pDst</code> should be initialized to all zeros before being used.</dd></dl>
+<dl class="section user"><dt>Fixed-Point Behavior</dt><dd>Correlation requires summing up a large number of intermediate products. As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation. Refer to the function specific documentation below for further details of the particular algorithm used.</dd></dl>
+<dl class="section user"><dt>Fast Versions</dt><dd>Fast versions are supported for Q31 and Q15. Cycles for Fast versions are less compared to Q31 and Q15 of correlate and the design requires the input signals should be scaled down to avoid intermediate overflows.</dd></dl>
+<dl class="section user"><dt>Opt Versions</dt><dd>Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation. These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions of correlate </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga22021e4222773f01e9960358a531cfb8"></a>
+<a class="anchor" id="ga371054f6e5fd78bec668908251f1b2f2"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_correlate_f32 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
@@ -184,7 +180,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -208,28 +204,26 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, and <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga40a0236b17220e8e22a22b5bc1c53c6b"></a>
+<a class="anchor" id="ga3fc8d680844a3d24af25e45df96c82f3"></a>
 <div class="memitem">
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       <table class="memname">
         <tr>
           <td class="memname">void arm_correlate_fast_opt_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
@@ -241,7 +235,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -271,33 +265,29 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pScratch</td><td>points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pScratch</td><td>points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Restrictions</dt><dd>If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, scratch buffers should be aligned by 32-bit</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a maximum of min(srcALen, srcBLen) number of additions is carried internally. The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.</dd></dl>
-<dl class="section user"><dt></dt><dd>See <code><a class="el" href="group__Corr.html#ga5ec96b8e420d68b0e626df0812274d46" title="Correlation of Q15 sequences. ">arm_correlate_q15()</a></code> for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#aa611fdbf6c56c46553701d6596a79aaf">__SMLAD()</a>, <a class="el" href="arm__math_8h.html#a7fc670277db1ad9ac34d52d771c7c305">__SMLADX()</a>, <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>, <a class="el" href="group__copy.html#ga872ca4cfc18c680b8991ccd569a5fda0">arm_copy_q15()</a>, <a class="el" href="group__Fill.html#ga76b21c32a3783a2b3334d930a646e5d8">arm_fill_q15()</a>, <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, and <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a maximum of min(srcALen, srcBLen) number of additions is carried internally. The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__Corr.html#ga8fc4e632ab08b28435ff62e7eb65f508">arm_correlate_q15()</a> for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gac8de3da44f58e86c2c86156276ca154f"></a>
+<a class="anchor" id="gab4dea2049c8a26118ee4de9b90f1b9bd"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_correlate_fast_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
@@ -309,7 +299,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -333,31 +323,28 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a maximum of min(srcALen, srcBLen) number of additions is carried internally. The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.</dd></dl>
-<dl class="section user"><dt></dt><dd>See <code><a class="el" href="group__Corr.html#ga5ec96b8e420d68b0e626df0812274d46" title="Correlation of Q15 sequences. ">arm_correlate_q15()</a></code> for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#aa611fdbf6c56c46553701d6596a79aaf">__SMLAD()</a>, <a class="el" href="arm__math_8h.html#a7fc670277db1ad9ac34d52d771c7c305">__SMLADX()</a>, <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>, <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, and <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a maximum of min(srcALen, srcBLen) number of additions is carried internally. The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__Corr.html#ga8fc4e632ab08b28435ff62e7eb65f508">arm_correlate_q15()</a> for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gabecd3d7b077dbbef43f93e9e037815ed"></a>
+<a class="anchor" id="ga1e85a8ceac5c0f27007e6ba2c8f20686"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_correlate_fast_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
@@ -369,7 +356,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -393,32 +380,29 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 format. Finally, the accumulator is saturated and converted to a 1.31 result.</dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 format. Finally, the accumulator is saturated and converted to a 1.31 result. </dd></dl>
 <dl class="section user"><dt></dt><dd>The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signals must be scaled down. The input signals should be scaled down to avoid intermediate overflows. Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a maximum of min(srcALen, srcBLen) number of additions is carried internally.</dd></dl>
-<dl class="section user"><dt></dt><dd>See <code><a class="el" href="group__Corr.html#ga1367dc6c80476406c951e68d7fac4e8c" title="Correlation of Q31 sequences. ">arm_correlate_q31()</a></code> for a slower implementation of this function which uses 64-bit accumulation to provide higher precision. </dd></dl>
-
-<p>References <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, and <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>.</p>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__Corr.html#ga9e8ad8bae8400dac2afc995d38594744">arm_correlate_q31()</a> for a slower implementation of this function which uses 64-bit accumulation to provide higher precision. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gad71c0ec70ec69edbc48563d9a5f68451"></a>
+<a class="anchor" id="ga3cfae563b16fa3be577cab5acf63aeea"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_correlate_opt_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
@@ -430,7 +414,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -460,33 +444,29 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pScratch</td><td>points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pScratch</td><td>points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Restrictions</dt><dd>If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, scratch buffers should be aligned by 32-bit</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 64-bit internal accumulator. Both inputs are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.</dd></dl>
-<dl class="section user"><dt></dt><dd>Refer to <code><a class="el" href="group__Corr.html#gac8de3da44f58e86c2c86156276ca154f" title="Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4. ">arm_correlate_fast_q15()</a></code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a7aed02041f489a4f65dbd7093073d94e">__SMLALD()</a>, <a class="el" href="arm__math_8h.html#a3bdab9022ab56e30f6346a043050dfc4">__SMLALDX()</a>, <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>, <a class="el" href="group__copy.html#ga872ca4cfc18c680b8991ccd569a5fda0">arm_copy_q15()</a>, <a class="el" href="group__Fill.html#ga76b21c32a3783a2b3334d930a646e5d8">arm_fill_q15()</a>, <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, and <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 64-bit internal accumulator. Both inputs are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__Corr.html#gab4dea2049c8a26118ee4de9b90f1b9bd">arm_correlate_fast_q15()</a> for a faster but less precise version of this function. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga746e8857cafe33ec5d6780729c18c311"></a>
+<a class="anchor" id="ga3c672e8ef8360c652d351097535f080d"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_correlate_opt_q7 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
@@ -498,7 +478,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -534,33 +514,29 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pScratch1</td><td>points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pScratch2</td><td>points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pScratch1</td><td>points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pScratch2</td><td>points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Restrictions</dt><dd>If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 32-bit internal accumulator. Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)&lt;131072</code>. The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#aa611fdbf6c56c46553701d6596a79aaf">__SMLAD()</a>, <a class="el" href="arm__math_8h.html#a7fc670277db1ad9ac34d52d771c7c305">__SMLADX()</a>, <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>, <a class="el" href="group__Fill.html#ga76b21c32a3783a2b3334d930a646e5d8">arm_fill_q15()</a>, <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, and <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 32-bit internal accumulator. Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)&lt;131072</code>. The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga5ec96b8e420d68b0e626df0812274d46"></a>
+<a class="anchor" id="ga8fc4e632ab08b28435ff62e7eb65f508"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_correlate_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
@@ -572,7 +548,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -596,32 +572,30 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 64-bit internal accumulator. Both inputs are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.</dd></dl>
-<dl class="section user"><dt></dt><dd>Refer to <code><a class="el" href="group__Corr.html#gac8de3da44f58e86c2c86156276ca154f" title="Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4. ">arm_correlate_fast_q15()</a></code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.</dd></dl>
-<dl class="section user"><dt></dt><dd>Refer the function <code><a class="el" href="group__Corr.html#gad71c0ec70ec69edbc48563d9a5f68451" title="Correlation of Q15 sequences. ">arm_correlate_opt_q15()</a></code> for a faster implementation of this function using scratch buffers. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a7aed02041f489a4f65dbd7093073d94e">__SMLALD()</a>, <a class="el" href="arm__math_8h.html#a3bdab9022ab56e30f6346a043050dfc4">__SMLALDX()</a>, <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>, <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, and <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 64-bit internal accumulator. Both inputs are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__Corr.html#gab4dea2049c8a26118ee4de9b90f1b9bd">arm_correlate_fast_q15()</a> for a faster but less precise version of this function. </dd>
+<dd>
+Refer to <a class="el" href="group__Corr.html#ga3cfae563b16fa3be577cab5acf63aeea">arm_correlate_opt_q15()</a> for a faster implementation of this function using scratch buffers. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga1367dc6c80476406c951e68d7fac4e8c"></a>
+<a class="anchor" id="ga9e8ad8bae8400dac2afc995d38594744"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_correlate_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
@@ -633,7 +607,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -657,31 +631,28 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a maximum of min(srcALen, srcBLen) number of additions is carried internally. The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.</dd></dl>
-<dl class="section user"><dt></dt><dd>See <code><a class="el" href="group__Corr.html#gabecd3d7b077dbbef43f93e9e037815ed" title="Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4. ">arm_correlate_fast_q31()</a></code> for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4. </dd></dl>
-
-<p>References <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, and <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a maximum of min(srcALen, srcBLen) number of additions is carried internally. The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__Corr.html#ga1e85a8ceac5c0f27007e6ba2c8f20686">arm_correlate_fast_q31()</a> for a faster but less precise implementation of this function. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga284ddcc49e4ac532d52a70d0383c5992"></a>
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       <table class="memname">
         <tr>
           <td class="memname">void arm_correlate_q7 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
@@ -693,7 +664,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -717,20 +688,17 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 32-bit internal accumulator. Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)&lt;131072</code>. The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format.</dd></dl>
-<dl class="section user"><dt></dt><dd>Refer the function <code><a class="el" href="group__Corr.html#ga746e8857cafe33ec5d6780729c18c311" title="Correlation of Q7 sequences. ">arm_correlate_opt_q7()</a></code> for a faster implementation of this function. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa611fdbf6c56c46553701d6596a79aaf">__SMLAD()</a>, <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, and <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 32-bit internal accumulator. Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)&lt;131072</code>. The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format.</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__Corr.html#ga3c672e8ef8360c652d351097535f080d">arm_correlate_opt_q7()</a> for a faster implementation of this function. </dd></dl>
 
 </div>
 </div>
@@ -739,7 +707,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__Corr.js b/docs/DSP/html/group__Corr.js
index 3099fc1..b7a073c 100644
--- a/docs/DSP/html/group__Corr.js
+++ b/docs/DSP/html/group__Corr.js
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+    [ "arm_correlate_fast_q15", "group__Corr.html#gab4dea2049c8a26118ee4de9b90f1b9bd", null ],
+    [ "arm_correlate_fast_q31", "group__Corr.html#ga1e85a8ceac5c0f27007e6ba2c8f20686", null ],
+    [ "arm_correlate_opt_q15", "group__Corr.html#ga3cfae563b16fa3be577cab5acf63aeea", null ],
+    [ "arm_correlate_opt_q7", "group__Corr.html#ga3c672e8ef8360c652d351097535f080d", null ],
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diff --git a/docs/DSP/html/group__DCT4__IDCT4.html b/docs/DSP/html/group__DCT4__IDCT4.html
index 7a9a7b4..ee1f041 100644
--- a/docs/DSP/html/group__DCT4__IDCT4.html
+++ b/docs/DSP/html/group__DCT4__IDCT4.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -155,16 +155,16 @@
 <img src="DCT4.gif" alt="DCT4.gif"/>
 <div class="caption">
 Discrete Cosine Transform - type-IV</div></div>
- <dl class="section user"><dt>Algorithm:</dt><dd>The N-point type-IV DCT is defined as a real, linear transformation by the formula: <div class="image">
+ <dl class="section user"><dt>Algorithm</dt><dd>The N-point type-IV DCT is defined as a real, linear transformation by the formula: <div class="image">
 <img src="DCT4Equation.gif" alt="DCT4Equation.gif"/>
 </div>
- where <code>k = 0,1,2,.....N-1</code> </dd></dl>
+ where <code>k = 0, 1, 2, ..., N-1</code> </dd></dl>
 <dl class="section user"><dt></dt><dd>Its inverse is defined as follows: <div class="image">
 <img src="IDCT4Equation.gif" alt="IDCT4Equation.gif"/>
 </div>
- where <code>n = 0,1,2,.....N-1</code> </dd></dl>
+ where <code>n = 0, 1, 2, ..., N-1</code> </dd></dl>
 <dl class="section user"><dt></dt><dd>The DCT4 matrices become involutory (i.e. they are self-inverse) by multiplying with an overall scale factor of sqrt(2/N). The symmetry of the transform matrix indicates that the fast algorithms for the forward and inverse transform computation are identical. Note that the implementation of Inverse DCT4 and DCT4 is same, hence same process function can be used for both.</dd></dl>
-<dl class="section user"><dt>Lengths supported by the transform:</dt><dd>As DCT4 internally uses Real FFT, it supports all the lengths 128, 512, 2048 and 8192. The library provides separate functions for Q15, Q31, and floating-point data types. </dd></dl>
+<dl class="section user"><dt>Lengths supported by the transform:</dt><dd>As DCT4 internally uses Real FFT, it supports all the lengths 128, 512, 2048 and 8192. The library provides separate functions for Q15, Q31, and floating-point data types.</dd></dl>
 <dl class="section user"><dt>Instance Structure</dt><dd>The instances for Real FFT and FFT, cosine values table and twiddle factor table are stored in an instance data structure. A separate instance structure must be defined for each transform. There are separate instance structure declarations for each of the 3 supported data types.</dd></dl>
 <dl class="section user"><dt>Initialization Functions</dt><dd>There is also an associated initialization function for each data type. The initialization function performs the following operations:<ul>
 <li>Sets the values of the internal structure fields.</li>
@@ -172,12 +172,11 @@
 </ul>
 </dd></dl>
 <dl class="section user"><dt></dt><dd>Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Manually initialize the instance structure as follows: <pre>
-<a class="el" href="structarm__dct4__instance__f32.html" title="Instance structure for the floating-point DCT4/IDCT4 function. ">arm_dct4_instance_f32</a> S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
-<a class="el" href="structarm__dct4__instance__q31.html" title="Instance structure for the Q31 DCT4/IDCT4 function. ">arm_dct4_instance_q31</a> S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
-<a class="el" href="structarm__dct4__instance__q15.html" title="Instance structure for the Q15 DCT4/IDCT4 function. ">arm_dct4_instance_q15</a> S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
- </pre> where <code>N</code> is the length of the DCT4; <code>Nby2</code> is half of the length of the DCT4; <code>normalize</code> is normalizing factor used and is equal to <code>sqrt(2/N)</code>; <code>pTwiddle</code> points to the twiddle factor table; <code>pCosFactor</code> points to the cosFactor table; <code>pRfft</code> points to the real FFT instance; <code>pCfft</code> points to the complex FFT instance; The CFFT and RFFT structures also needs to be initialized, refer to <a class="el" href="group__ComplexFFT.html#ga521f670cd9c571bc61aff9bec89f4c26" title="Processing function for the floating-point Radix-4 CFFT/CIFFT. ">arm_cfft_radix4_f32()</a> and <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc" title="Processing function for the floating-point RFFT/RIFFT. ">arm_rfft_f32()</a> respectively for details regarding static initialization.</dd></dl>
-<dl class="section user"><dt>Fixed-Point Behavior</dt><dd>Care must be taken when using the fixed-point versions of the DCT4 transform functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.</dd></dl>
-<p>end of DCT4_IDCT4_Table group </p>
+    <a class="el" href="structarm__dct4__instance__f32.html" title="Instance structure for the floating-point DCT4/IDCT4 function. ">arm_dct4_instance_f32</a> S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
+    <a class="el" href="structarm__dct4__instance__q31.html" title="Instance structure for the Q31 DCT4/IDCT4 function. ">arm_dct4_instance_q31</a> S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
+    <a class="el" href="structarm__dct4__instance__q15.html" title="Instance structure for the Q15 DCT4/IDCT4 function. ">arm_dct4_instance_q15</a> S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
+</pre> where <code>N</code> is the length of the DCT4; <code>Nby2</code> is half of the length of the DCT4; <code>normalize</code> is normalizing factor used and is equal to <code>sqrt(2/N)</code>; <code>pTwiddle</code> points to the twiddle factor table; <code>pCosFactor</code> points to the cosFactor table; <code>pRfft</code> points to the real FFT instance; <code>pCfft</code> points to the complex FFT instance; The CFFT and RFFT structures also needs to be initialized, refer to <a class="el" href="group__ComplexFFT.html#ga521f670cd9c571bc61aff9bec89f4c26" title="Processing function for the floating-point Radix-4 CFFT/CIFFT. ">arm_cfft_radix4_f32()</a> and <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc" title="Processing function for the floating-point RFFT/RIFFT. ">arm_rfft_f32()</a> respectively for details regarding static initialization.</dd></dl>
+<dl class="section user"><dt>Fixed-Point Behavior</dt><dd>Care must be taken when using the fixed-point versions of the DCT4 transform functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines. </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
 <a class="anchor" id="gafd538d68886848bc090ec2b0d364cc81"></a>
 <div class="memitem">
@@ -210,15 +209,13 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the floating-point DCT4/IDCT4 structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to state buffer. </td></tr>
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*pInlineBuffer</td><td>points to the in-place input and output buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the floating-point DCT4/IDCT4 structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to state buffer </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pInlineBuffer</td><td>points to the in-place input and output buffer </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="group__BasicMult.html#gaca3f0b8227da431ab29225b88888aa32">arm_mult_f32()</a>, <a class="el" href="group__scale.html#ga3487af88b112f682ee90589cd419e123">arm_scale_f32()</a>, <a class="el" href="structarm__dct4__instance__f32.html#a262b29a51c371b46efc89120e31ccf37">arm_dct4_instance_f32::N</a>, <a class="el" href="structarm__dct4__instance__f32.html#adb1ef2739ddbe62e5cdadc47455a4147">arm_dct4_instance_f32::Nby2</a>, <a class="el" href="structarm__dct4__instance__f32.html#a6da1187e070801e011ce5e0582efa861">arm_dct4_instance_f32::pCosFactor</a>, and <a class="el" href="structarm__dct4__instance__f32.html#ad13544aafad268588c62e3eb35ae662c">arm_dct4_instance_f32::pTwiddle</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -271,23 +268,25 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of floating-point DCT4/IDCT4 structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S_RFFT</td><td>points to an instance of floating-point RFFT/RIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S_CFFT</td><td>points to an instance of floating-point CFFT/CIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">N</td><td>length of the DCT4. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">Nby2</td><td>half of the length of the DCT4. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of floating-point DCT4/IDCT4 structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S_RFFT</td><td>points to an instance of floating-point RFFT/RIFFT structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S_CFFT</td><td>points to an instance of floating-point CFFT/CIFFT structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">N</td><td>length of the DCT4 </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">Nby2</td><td>half of the length of the DCT4 </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">normalize</td><td>normalizing factor. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported transform length. </dd></dl>
-<dl class="section user"><dt>Normalizing factor:</dt><dd>The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>. Floating-point normalizing factors are mentioned in the table below for different DCT sizes: <div class="image">
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : <code>N</code> is not a supported transform length</li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Normalizing factor</dt><dd>The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>. Floating-point normalizing factors are mentioned in the table below for different DCT sizes:</dd></dl>
+<div class="image">
 <img src="dct4NormalizingF32Table.gif" alt="dct4NormalizingF32Table.gif"/>
 </div>
- </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="group__RealFFT.html#ga10717ee326bf50832ef1c25b85a23068">arm_rfft_init_f32()</a>, <a class="el" href="group__DCT4__IDCT4__Table.html#ga16248ed86161ef97538011b49f13e8b7">cos_factors_128</a>, <a class="el" href="group__DCT4__IDCT4__Table.html#ga1ba5306e0bc44730b40ab34cced45fd6">cos_factors_2048</a>, <a class="el" href="group__DCT4__IDCT4__Table.html#ga49fd288352ca5bb43f5cec52273b0d80">cos_factors_512</a>, <a class="el" href="group__DCT4__IDCT4__Table.html#gac12484542bc6aaecc754c855457411de">cos_factors_8192</a>, <a class="el" href="structarm__dct4__instance__f32.html#a262b29a51c371b46efc89120e31ccf37">arm_dct4_instance_f32::N</a>, <a class="el" href="structarm__dct4__instance__f32.html#adb1ef2739ddbe62e5cdadc47455a4147">arm_dct4_instance_f32::Nby2</a>, <a class="el" href="structarm__dct4__instance__f32.html#a61ce8c967b2e998a9c0041cca73cdef8">arm_dct4_instance_f32::normalize</a>, <a class="el" href="structarm__dct4__instance__f32.html#a018f7860b6e070af533fb7d76c7cdc32">arm_dct4_instance_f32::pCfft</a>, <a class="el" href="structarm__dct4__instance__f32.html#a6da1187e070801e011ce5e0582efa861">arm_dct4_instance_f32::pCosFactor</a>, <a class="el" href="structarm__dct4__instance__f32.html#a978f37fc19add31af243ab5c63ae502f">arm_dct4_instance_f32::pRfft</a>, <a class="el" href="structarm__dct4__instance__f32.html#ad13544aafad268588c62e3eb35ae662c">arm_dct4_instance_f32::pTwiddle</a>, <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>, <a class="el" href="group__DCT4__IDCT4__Table.html#gad00f29d896d64d6da7afbbb9d3e182a4">Weights_128</a>, <a class="el" href="group__DCT4__IDCT4__Table.html#gac3a2a00b3106dfcb5e0a582f50c65692">Weights_2048</a>, <a class="el" href="group__DCT4__IDCT4__Table.html#gaeb67b0be5b3c2139d660e02cedeed908">Weights_512</a>, and <a class="el" href="group__DCT4__IDCT4__Table.html#ga45a8ec91e5da91790566105bc7e6f0c2">Weights_8192</a>.</p>
-
+ 
 </div>
 </div>
 <a class="anchor" id="ga966fd1b66a80873964533703ab5dc054"></a>
@@ -339,23 +338,25 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of Q15 DCT4/IDCT4 structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S_RFFT</td><td>points to an instance of Q15 RFFT/RIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S_CFFT</td><td>points to an instance of Q15 CFFT/CIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">N</td><td>length of the DCT4. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">Nby2</td><td>half of the length of the DCT4. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">normalize</td><td>normalizing factor. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of Q15 DCT4/IDCT4 structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S_RFFT</td><td>points to an instance of Q15 RFFT/RIFFT structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S_CFFT</td><td>points to an instance of Q15 CFFT/CIFFT structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">N</td><td>length of the DCT4 </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">Nby2</td><td>half of the length of the DCT4 </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">normalize</td><td>normalizing factor </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length. </dd></dl>
-<dl class="section user"><dt>Normalizing factor:</dt><dd>The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>. Normalizing factors in 1.15 format are mentioned in the table below for different DCT sizes: <div class="image">
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : <code>N</code> is not a supported transform length</li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Normalizing factor</dt><dd>The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>. Normalizing factors in 1.15 format are mentioned in the table below for different DCT sizes:</dd></dl>
+<div class="image">
 <img src="dct4NormalizingQ15Table.gif" alt="dct4NormalizingQ15Table.gif"/>
 </div>
- </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="group__RealFFT.html#ga053450cc600a55410ba5b5605e96245d">arm_rfft_init_q15()</a>, <a class="el" href="group__DCT4__IDCT4__Table.html#ga1477edd21c7b08b0b59a564f6c24d6c5">cos_factorsQ15_128</a>, <a class="el" href="group__DCT4__IDCT4__Table.html#gaeee5df7c1be2374441868ecbbc6c7e5d">cos_factorsQ15_2048</a>, <a class="el" href="group__DCT4__IDCT4__Table.html#gac056c3d026058eab3ba650828ff5642f">cos_factorsQ15_512</a>, <a class="el" href="group__DCT4__IDCT4__Table.html#ga988ff0563cc9df7848c9348871ac6c07">cos_factorsQ15_8192</a>, <a class="el" href="structarm__dct4__instance__q15.html#a53d24009bb9b2e93d0aa07db7f1a6c25">arm_dct4_instance_q15::N</a>, <a class="el" href="structarm__dct4__instance__q15.html#af43dcbbc2fc661ffbc525afe3dcbd7da">arm_dct4_instance_q15::Nby2</a>, <a class="el" href="structarm__dct4__instance__q15.html#a197098140d68e89a08f7a249003a0b86">arm_dct4_instance_q15::normalize</a>, <a class="el" href="structarm__dct4__instance__q15.html#a7284932ee8c36107c33815eb62eadffc">arm_dct4_instance_q15::pCfft</a>, <a class="el" href="structarm__dct4__instance__q15.html#ac76df681b1bd502fb4874c06f055dded">arm_dct4_instance_q15::pCosFactor</a>, <a class="el" href="structarm__dct4__instance__q15.html#a11cf95c1cd9dd2dd5e4b81b8f88dc208">arm_dct4_instance_q15::pRfft</a>, <a class="el" href="structarm__dct4__instance__q15.html#abc6c847e9f906781e1d5da40e9aafa76">arm_dct4_instance_q15::pTwiddle</a>, <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>, <a class="el" href="group__DCT4__IDCT4__Table.html#gaa4ff5e6f062efb1d1ec8c6c2207c3727">WeightsQ15_128</a>, <a class="el" href="group__DCT4__IDCT4__Table.html#ga2235ec700d0d6925d9733f48541d46f5">WeightsQ15_2048</a>, <a class="el" href="group__DCT4__IDCT4__Table.html#gadc8ee250fc217d6cb5c84dd7c1eb6d31">WeightsQ15_512</a>, and <a class="el" href="group__DCT4__IDCT4__Table.html#ga4fdc60621eb306984a82ce8b2d645bb7">WeightsQ15_8192</a>.</p>
-
+ 
 </div>
 </div>
 <a class="anchor" id="ga631bb59c7c97c814ff7147ecba6a716a"></a>
@@ -407,23 +408,25 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of Q31 DCT4/IDCT4 structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S_RFFT</td><td>points to an instance of Q31 RFFT/RIFFT structure </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S_CFFT</td><td>points to an instance of Q31 CFFT/CIFFT structure </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of Q31 DCT4/IDCT4 structure. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S_RFFT</td><td>points to an instance of Q31 RFFT/RIFFT structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S_CFFT</td><td>points to an instance of Q31 CFFT/CIFFT structure </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">N</td><td>length of the DCT4. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">Nby2</td><td>half of the length of the DCT4. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">normalize</td><td>normalizing factor. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length. </dd></dl>
-<dl class="section user"><dt>Normalizing factor:</dt><dd>The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>. Normalizing factors in 1.31 format are mentioned in the table below for different DCT sizes: <div class="image">
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : <code>N</code> is not a supported transform length</li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Normalizing factor:</dt><dd>The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>. Normalizing factors in 1.31 format are mentioned in the table below for different DCT sizes:</dd></dl>
+<div class="image">
 <img src="dct4NormalizingQ31Table.gif" alt="dct4NormalizingQ31Table.gif"/>
 </div>
- </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="group__RealFFT.html#ga5abde938abbe72e95c5bab080eb33c45">arm_rfft_init_q31()</a>, <a class="el" href="group__DCT4__IDCT4__Table.html#gabb8ee2004a3520fd08388db637d43875">cos_factorsQ31_128</a>, <a class="el" href="group__DCT4__IDCT4__Table.html#gaa15fc3fb058482defda371113cd12e74">cos_factorsQ31_2048</a>, <a class="el" href="group__DCT4__IDCT4__Table.html#ga3559569e603cb918911074be88523d0e">cos_factorsQ31_512</a>, <a class="el" href="group__DCT4__IDCT4__Table.html#gaf687c4bbdbc700a3ad5d807d28de63e4">cos_factorsQ31_8192</a>, <a class="el" href="structarm__dct4__instance__q31.html#a46a9f136457350676e2bfd3768ff9d6d">arm_dct4_instance_q31::N</a>, <a class="el" href="structarm__dct4__instance__q31.html#a32d3268ba4629908dba056599f0a904d">arm_dct4_instance_q31::Nby2</a>, <a class="el" href="structarm__dct4__instance__q31.html#ac80ff7b28fca36aeef74dea12e8312dd">arm_dct4_instance_q31::normalize</a>, <a class="el" href="structarm__dct4__instance__q31.html#ac96579cfb28d08bb11dd2fe4c6303833">arm_dct4_instance_q31::pCfft</a>, <a class="el" href="structarm__dct4__instance__q31.html#af97204d1838925621fc82021a0c2d6c1">arm_dct4_instance_q31::pCosFactor</a>, <a class="el" href="structarm__dct4__instance__q31.html#af1487dab5e7963b85dc0fdc6bf492542">arm_dct4_instance_q31::pRfft</a>, <a class="el" href="structarm__dct4__instance__q31.html#a7db236e22673146bb1d2c962f0713f08">arm_dct4_instance_q31::pTwiddle</a>, <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>, <a class="el" href="group__DCT4__IDCT4__Table.html#ga02d7024538a87214296b01d83ba36b02">WeightsQ31_128</a>, <a class="el" href="group__DCT4__IDCT4__Table.html#ga725b65c25a02b3cad329e18bb832f65e">WeightsQ31_2048</a>, <a class="el" href="group__DCT4__IDCT4__Table.html#ga31a8217a96f7d3171921e98398f31596">WeightsQ31_512</a>, and <a class="el" href="group__DCT4__IDCT4__Table.html#ga16bf6bbe5c4c9b35f88253cf7bdcc435">WeightsQ31_8192</a>.</p>
-
+ 
 </div>
 </div>
 <a class="anchor" id="ga114cb9635059f678df291fcc887aaf2b"></a>
@@ -457,20 +460,18 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q15 DCT4 structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to state buffer. </td></tr>
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*pInlineBuffer</td><td>points to the in-place input and output buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q15 DCT4 structure. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to state buffer. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pInlineBuffer</td><td>points to the in-place input and output buffer. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Input an output formats:</dt><dd>Internally inputs are downscaled in the RFFT process function to avoid overflows. Number of bits downscaled, depends on the size of the transform. The input and output formats for different DCT sizes and number of bits to upscale are mentioned in the table below:</dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Input an output formats</dt><dd>Internally inputs are downscaled in the RFFT process function to avoid overflows. Number of bits downscaled, depends on the size of the transform. The input and output formats for different DCT sizes and number of bits to upscale are mentioned in the table below:</dd></dl>
 <div class="image">
 <img src="dct4FormatsQ15Table.gif" alt="dct4FormatsQ15Table.gif"/>
 </div>
  
-<p>References <a class="el" href="group__BasicMult.html#gafb0778d27ed98a2a6f2ecb7d48cc8c75">arm_mult_q15()</a>, <a class="el" href="group__shift.html#gaa1757e53279780107acc92cf100adb61">arm_shift_q15()</a>, <a class="el" href="structarm__dct4__instance__q15.html#a53d24009bb9b2e93d0aa07db7f1a6c25">arm_dct4_instance_q15::N</a>, <a class="el" href="structarm__dct4__instance__q15.html#af43dcbbc2fc661ffbc525afe3dcbd7da">arm_dct4_instance_q15::Nby2</a>, <a class="el" href="structarm__dct4__instance__q15.html#ac76df681b1bd502fb4874c06f055dded">arm_dct4_instance_q15::pCosFactor</a>, and <a class="el" href="structarm__dct4__instance__q15.html#abc6c847e9f906781e1d5da40e9aafa76">arm_dct4_instance_q15::pTwiddle</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="gad04d0baab6ed081d8e8afe02538eb80b"></a>
@@ -504,20 +505,18 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q31 DCT4 structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to state buffer. </td></tr>
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*pInlineBuffer</td><td>points to the in-place input and output buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q31 DCT4 structure. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to state buffer. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">pInlineBuffer</td><td>points to the in-place input and output buffer. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-<dl class="section user"><dt>Input an output formats:</dt><dd>Input samples need to be downscaled by 1 bit to avoid saturations in the Q31 DCT process, as the conversion from DCT2 to DCT4 involves one subtraction. Internally inputs are downscaled in the RFFT process function to avoid overflows. Number of bits downscaled, depends on the size of the transform. The input and output formats for different DCT sizes and number of bits to upscale are mentioned in the table below:</dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Input an output formats</dt><dd>Input samples need to be downscaled by 1 bit to avoid saturations in the Q31 DCT process, as the conversion from DCT2 to DCT4 involves one subtraction. Internally inputs are downscaled in the RFFT process function to avoid overflows. Number of bits downscaled, depends on the size of the transform. The input and output formats for different DCT sizes and number of bits to upscale are mentioned in the table below:</dd></dl>
 <div class="image">
 <img src="dct4FormatsQ31Table.gif" alt="dct4FormatsQ31Table.gif"/>
 </div>
  
-<p>References <a class="el" href="group__CmplxByCmplxMult.html#ga1829e50993a90742de225a0ce4213838">arm_cmplx_mult_cmplx_q31()</a>, <a class="el" href="group__BasicMult.html#ga3528c0f54a0607acc603f0490d3ca6c6">arm_mult_q31()</a>, <a class="el" href="group__RealFFT.html#gabaeab5646aeea9844e6d42ca8c73fe3a">arm_rfft_q31()</a>, <a class="el" href="group__shift.html#ga387dd8b7b87377378280978f16cdb13d">arm_shift_q31()</a>, <a class="el" href="structarm__dct4__instance__q31.html#a46a9f136457350676e2bfd3768ff9d6d">arm_dct4_instance_q31::N</a>, <a class="el" href="structarm__dct4__instance__q31.html#a32d3268ba4629908dba056599f0a904d">arm_dct4_instance_q31::Nby2</a>, <a class="el" href="structarm__dct4__instance__q31.html#ac80ff7b28fca36aeef74dea12e8312dd">arm_dct4_instance_q31::normalize</a>, <a class="el" href="structarm__dct4__instance__q31.html#af97204d1838925621fc82021a0c2d6c1">arm_dct4_instance_q31::pCosFactor</a>, <a class="el" href="structarm__dct4__instance__q31.html#af1487dab5e7963b85dc0fdc6bf492542">arm_dct4_instance_q31::pRfft</a>, and <a class="el" href="structarm__dct4__instance__q31.html#a7db236e22673146bb1d2c962f0713f08">arm_dct4_instance_q31::pTwiddle</a>.</p>
-
 </div>
 </div>
 </div><!-- contents -->
@@ -525,7 +524,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/group__DCT4__IDCT4__Table.html b/docs/DSP/html/group__DCT4__IDCT4__Table.html
index 0625c2e..54db790 100644
--- a/docs/DSP/html/group__DCT4__IDCT4__Table.html
+++ b/docs/DSP/html/group__DCT4__IDCT4__Table.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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+<tr class="memitem:ga31a8217a96f7d3171921e98398f31596"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#ga31a8217a96f7d3171921e98398f31596">WeightsQ31_512</a> [1024]</td></tr>
+<tr class="separator:ga31a8217a96f7d3171921e98398f31596"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga3559569e603cb918911074be88523d0e"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#ga3559569e603cb918911074be88523d0e">cos_factorsQ31_512</a> [512]</td></tr>
 <tr class="separator:ga3559569e603cb918911074be88523d0e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaa15fc3fb058482defda371113cd12e74"><td class="memItemLeft" align="right" valign="top">static const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#gaa15fc3fb058482defda371113cd12e74">cos_factorsQ31_2048</a> [2048]</td></tr>
+<tr class="memitem:ga725b65c25a02b3cad329e18bb832f65e"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#ga725b65c25a02b3cad329e18bb832f65e">WeightsQ31_2048</a> [4096]</td></tr>
+<tr class="separator:ga725b65c25a02b3cad329e18bb832f65e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa15fc3fb058482defda371113cd12e74"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#gaa15fc3fb058482defda371113cd12e74">cos_factorsQ31_2048</a> [2048]</td></tr>
 <tr class="separator:gaa15fc3fb058482defda371113cd12e74"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf687c4bbdbc700a3ad5d807d28de63e4"><td class="memItemLeft" align="right" valign="top">static const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#gaf687c4bbdbc700a3ad5d807d28de63e4">cos_factorsQ31_8192</a> [8192]</td></tr>
+<tr class="memitem:ga16bf6bbe5c4c9b35f88253cf7bdcc435"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#ga16bf6bbe5c4c9b35f88253cf7bdcc435">WeightsQ31_8192</a> [16384]</td></tr>
+<tr class="separator:ga16bf6bbe5c4c9b35f88253cf7bdcc435"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf687c4bbdbc700a3ad5d807d28de63e4"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__DCT4__IDCT4__Table.html#gaf687c4bbdbc700a3ad5d807d28de63e4">cos_factorsQ31_8192</a> [8192]</td></tr>
 <tr class="separator:gaf687c4bbdbc700a3ad5d807d28de63e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>end of RealFFT_Table group </p>
 <h2 class="groupheader">Variable Documentation</h2>
 <a class="anchor" id="ga16248ed86161ef97538011b49f13e8b7"></a>
 <div class="memitem">
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-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
       <table class="memname">
         <tr>
           <td class="memname">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> cos_factors_128[128]</td>
         </tr>
       </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
 </div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="ga1ba5306e0bc44730b40ab34cced45fd6"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> cos_factors_2048[2048]</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="ga49fd288352ca5bb43f5cec52273b0d80"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> cos_factors_512[512]</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="gac12484542bc6aaecc754c855457411de"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> cos_factors_8192[8192]</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="gabb8ee2004a3520fd08388db637d43875"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> cos_factorsQ31_128[128]</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="gaa15fc3fb058482defda371113cd12e74"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> cos_factorsQ31_2048[2048]</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="ga3559569e603cb918911074be88523d0e"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> cos_factorsQ31_512[512]</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="gaf687c4bbdbc700a3ad5d807d28de63e4"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> cos_factorsQ31_8192[8192]</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="gad00f29d896d64d6da7afbbb9d3e182a4"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Weights_128[256]</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="section user"><dt></dt><dd>Weights tables are generated using the formula : <pre>weights[n] = e^(-j*n*pi/(2*N))</pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>C command to generate the table <pre>
+for(i = 0; i&lt; N; i++)
+{
+  weights[(2*i)]   =  cos (i*c);
+  weights[(2*i)+1] = -sin (i*c);
+} </pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>where <code>N</code> is the Number of weights to be calculated and <code>c</code> is <code>pi/(2*N)</code> </dd></dl>
+<dl class="section user"><dt></dt><dd>In the tables below the real and imaginary values are placed alternatively, hence the array length is <code>2*N</code>. </dd></dl>
 <dl class="section user"><dt></dt><dd>cosFactor tables are generated using the formula : <pre>cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))</pre> </dd></dl>
 <dl class="section user"><dt></dt><dd>C command to generate the table </dd></dl>
 <dl class="section user"><dt></dt><dd><pre> for(i = 0; i&lt; N; i++)
@@ -192,559 +275,108 @@
 } </pre> </dd></dl>
 <dl class="section user"><dt></dt><dd>where <code>N</code> is the number of factors to generate and <code>c</code> is <code>pi/(2*N)</code> </dd></dl>
 
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#gab094ad3bc6fa1b84e8b12a24e1850a06">arm_dct4_init_f32()</a>.</p>
-
-</div>
-</div>
-<a class="anchor" id="ga1ba5306e0bc44730b40ab34cced45fd6"></a>
-<div class="memitem">
-<div class="memproto">
-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
-      <table class="memname">
-        <tr>
-          <td class="memname">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> cos_factors_2048[2048]</td>
-        </tr>
-      </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
-</div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#gab094ad3bc6fa1b84e8b12a24e1850a06">arm_dct4_init_f32()</a>.</p>
-
-</div>
-</div>
-<a class="anchor" id="ga49fd288352ca5bb43f5cec52273b0d80"></a>
-<div class="memitem">
-<div class="memproto">
-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
-      <table class="memname">
-        <tr>
-          <td class="memname">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> cos_factors_512[512]</td>
-        </tr>
-      </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
-</div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#gab094ad3bc6fa1b84e8b12a24e1850a06">arm_dct4_init_f32()</a>.</p>
-
-</div>
-</div>
-<a class="anchor" id="gac12484542bc6aaecc754c855457411de"></a>
-<div class="memitem">
-<div class="memproto">
-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
-      <table class="memname">
-        <tr>
-          <td class="memname">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> cos_factors_8192[8192]</td>
-        </tr>
-      </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
-</div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#gab094ad3bc6fa1b84e8b12a24e1850a06">arm_dct4_init_f32()</a>.</p>
-
-</div>
-</div>
-<a class="anchor" id="ga1477edd21c7b08b0b59a564f6c24d6c5"></a>
-<div class="memitem">
-<div class="memproto">
-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
-      <table class="memname">
-        <tr>
-          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> <a class="el" href="arm__math_8h.html#a280a402ab28c399fcc4168f2ed631acb">ALIGN4</a> cos_factorsQ15_128[128]</td>
-        </tr>
-      </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
-</div><div class="memdoc">
-<dl class="section user"><dt></dt><dd>cosFactor tables are generated using the formula : <pre> cos_factors[n] = 2 * cos((2n+1)*pi/(4*N)) </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>C command to generate the table <pre>
-for(i = 0; i&lt; N; i++)
-{
-  cos_factors[i]= 2 * cos((2*i+1)*c/2);
-} </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where <code>N</code> is the number of factors to generate and <code>c</code> is <code>pi/(2*N)</code> </dd></dl>
-<dl class="section user"><dt></dt><dd>Then converted to q15 format by multiplying with 2^31 and saturated if required. </dd></dl>
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga966fd1b66a80873964533703ab5dc054">arm_dct4_init_q15()</a>.</p>
-
-</div>
-</div>
-<a class="anchor" id="gaeee5df7c1be2374441868ecbbc6c7e5d"></a>
-<div class="memitem">
-<div class="memproto">
-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
-      <table class="memname">
-        <tr>
-          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> <a class="el" href="arm__math_8h.html#a280a402ab28c399fcc4168f2ed631acb">ALIGN4</a> cos_factorsQ15_2048[2048]</td>
-        </tr>
-      </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
-</div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga966fd1b66a80873964533703ab5dc054">arm_dct4_init_q15()</a>.</p>
-
-</div>
-</div>
-<a class="anchor" id="gac056c3d026058eab3ba650828ff5642f"></a>
-<div class="memitem">
-<div class="memproto">
-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
-      <table class="memname">
-        <tr>
-          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> <a class="el" href="arm__math_8h.html#a280a402ab28c399fcc4168f2ed631acb">ALIGN4</a> cos_factorsQ15_512[512]</td>
-        </tr>
-      </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
-</div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga966fd1b66a80873964533703ab5dc054">arm_dct4_init_q15()</a>.</p>
-
-</div>
-</div>
-<a class="anchor" id="ga988ff0563cc9df7848c9348871ac6c07"></a>
-<div class="memitem">
-<div class="memproto">
-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
-      <table class="memname">
-        <tr>
-          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> <a class="el" href="arm__math_8h.html#a280a402ab28c399fcc4168f2ed631acb">ALIGN4</a> cos_factorsQ15_8192[8192]</td>
-        </tr>
-      </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
-</div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga966fd1b66a80873964533703ab5dc054">arm_dct4_init_q15()</a>.</p>
-
-</div>
-</div>
-<a class="anchor" id="gabb8ee2004a3520fd08388db637d43875"></a>
-<div class="memitem">
-<div class="memproto">
-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
-      <table class="memname">
-        <tr>
-          <td class="memname">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> cos_factorsQ31_128[128]</td>
-        </tr>
-      </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
-</div><div class="memdoc">
-<dl class="section user"><dt></dt><dd>cosFactor tables are generated using the formula : <pre>cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))</pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>C command to generate the table <pre>
-for(i = 0; i&lt; N; i++)
-{
-  cos_factors[i]= 2 * cos((2*i+1)*c/2);
-} </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where <code>N</code> is the number of factors to generate and <code>c</code> is <code>pi/(2*N)</code> </dd></dl>
-<dl class="section user"><dt></dt><dd>Then converted to q31 format by multiplying with 2^31 and saturated if required. </dd></dl>
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga631bb59c7c97c814ff7147ecba6a716a">arm_dct4_init_q31()</a>.</p>
-
-</div>
-</div>
-<a class="anchor" id="gaa15fc3fb058482defda371113cd12e74"></a>
-<div class="memitem">
-<div class="memproto">
-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
-      <table class="memname">
-        <tr>
-          <td class="memname">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> cos_factorsQ31_2048[2048]</td>
-        </tr>
-      </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
-</div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga631bb59c7c97c814ff7147ecba6a716a">arm_dct4_init_q31()</a>.</p>
-
-</div>
-</div>
-<a class="anchor" id="ga3559569e603cb918911074be88523d0e"></a>
-<div class="memitem">
-<div class="memproto">
-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
-      <table class="memname">
-        <tr>
-          <td class="memname">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> cos_factorsQ31_512[512]</td>
-        </tr>
-      </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
-</div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga631bb59c7c97c814ff7147ecba6a716a">arm_dct4_init_q31()</a>.</p>
-
-</div>
-</div>
-<a class="anchor" id="gaf687c4bbdbc700a3ad5d807d28de63e4"></a>
-<div class="memitem">
-<div class="memproto">
-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
-      <table class="memname">
-        <tr>
-          <td class="memname">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> cos_factorsQ31_8192[8192]</td>
-        </tr>
-      </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
-</div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga631bb59c7c97c814ff7147ecba6a716a">arm_dct4_init_q31()</a>.</p>
-
-</div>
-</div>
-<a class="anchor" id="gad00f29d896d64d6da7afbbb9d3e182a4"></a>
-<div class="memitem">
-<div class="memproto">
-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
-      <table class="memname">
-        <tr>
-          <td class="memname">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Weights_128[256]</td>
-        </tr>
-      </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
-</div><div class="memdoc">
-<dl class="section user"><dt></dt><dd>Weights tables are generated using the formula : <pre>weights[n] = e^(-j*n*pi/(2*N))</pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>C command to generate the table <pre>
-for(i = 0; i&lt; N; i++)
-{
-   weights[2*i]= cos(i*c);
-   weights[(2*i)+1]= -sin(i * c);
-} </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>Where <code>N</code> is the Number of weights to be calculated and <code>c</code> is <code>pi/(2*N)</code> </dd></dl>
-<dl class="section user"><dt></dt><dd>In the tables below the real and imaginary values are placed alternatively, hence the array length is <code>2*N</code>. </dd></dl>
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#gab094ad3bc6fa1b84e8b12a24e1850a06">arm_dct4_init_f32()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="gac3a2a00b3106dfcb5e0a582f50c65692"></a>
 <div class="memitem">
 <div class="memproto">
-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
       <table class="memname">
         <tr>
           <td class="memname">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Weights_2048[4096]</td>
         </tr>
       </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#gab094ad3bc6fa1b84e8b12a24e1850a06">arm_dct4_init_f32()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="gaeb67b0be5b3c2139d660e02cedeed908"></a>
 <div class="memitem">
 <div class="memproto">
-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
       <table class="memname">
         <tr>
           <td class="memname">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Weights_512[1024]</td>
         </tr>
       </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#gab094ad3bc6fa1b84e8b12a24e1850a06">arm_dct4_init_f32()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="ga45a8ec91e5da91790566105bc7e6f0c2"></a>
 <div class="memitem">
 <div class="memproto">
-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
       <table class="memname">
         <tr>
           <td class="memname">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Weights_8192[16384]</td>
         </tr>
       </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#gab094ad3bc6fa1b84e8b12a24e1850a06">arm_dct4_init_f32()</a>.</p>
-
-</div>
-</div>
-<a class="anchor" id="gaa4ff5e6f062efb1d1ec8c6c2207c3727"></a>
-<div class="memitem">
-<div class="memproto">
-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
-      <table class="memname">
-        <tr>
-          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> <a class="el" href="arm__math_8h.html#a280a402ab28c399fcc4168f2ed631acb">ALIGN4</a> WeightsQ15_128[256]</td>
-        </tr>
-      </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
-</div><div class="memdoc">
-<dl class="section user"><dt></dt><dd>Weights tables are generated using the formula : <pre>weights[n] = e^(-j*n*pi/(2*N))</pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>C command to generate the table <pre>
-for(i = 0; i&lt; N; i++)
-{
-  weights[2*i]= cos(i*c);
-  weights[(2*i)+1]= -sin(i * c);
-} </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where <code>N</code> is the Number of weights to be calculated and <code>c</code> is <code>pi/(2*N)</code> </dd></dl>
-<dl class="section user"><dt></dt><dd>Converted the output to q15 format by multiplying with 2^31 and saturated if required. </dd></dl>
-<dl class="section user"><dt></dt><dd>In the tables below the real and imaginary values are placed alternatively, hence the array length is <code>2*N</code>. </dd></dl>
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga966fd1b66a80873964533703ab5dc054">arm_dct4_init_q15()</a>.</p>
-
-</div>
-</div>
-<a class="anchor" id="ga2235ec700d0d6925d9733f48541d46f5"></a>
-<div class="memitem">
-<div class="memproto">
-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
-      <table class="memname">
-        <tr>
-          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> <a class="el" href="arm__math_8h.html#a280a402ab28c399fcc4168f2ed631acb">ALIGN4</a> WeightsQ15_2048[4096]</td>
-        </tr>
-      </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
-</div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga966fd1b66a80873964533703ab5dc054">arm_dct4_init_q15()</a>.</p>
-
-</div>
-</div>
-<a class="anchor" id="gadc8ee250fc217d6cb5c84dd7c1eb6d31"></a>
-<div class="memitem">
-<div class="memproto">
-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
-      <table class="memname">
-        <tr>
-          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> <a class="el" href="arm__math_8h.html#a280a402ab28c399fcc4168f2ed631acb">ALIGN4</a> WeightsQ15_512[1024]</td>
-        </tr>
-      </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
-</div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga966fd1b66a80873964533703ab5dc054">arm_dct4_init_q15()</a>.</p>
-
-</div>
-</div>
-<a class="anchor" id="ga4fdc60621eb306984a82ce8b2d645bb7"></a>
-<div class="memitem">
-<div class="memproto">
-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
-      <table class="memname">
-        <tr>
-          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> <a class="el" href="arm__math_8h.html#a280a402ab28c399fcc4168f2ed631acb">ALIGN4</a> WeightsQ15_8192[16384]</td>
-        </tr>
-      </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
-</div><div class="memdoc">
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga966fd1b66a80873964533703ab5dc054">arm_dct4_init_q15()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="ga02d7024538a87214296b01d83ba36b02"></a>
 <div class="memitem">
 <div class="memproto">
-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
       <table class="memname">
         <tr>
           <td class="memname">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> WeightsQ31_128[256]</td>
         </tr>
       </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Weights tables are generated using the formula : <pre>weights[n] = e^(-j*n*pi/(2*N))</pre> </dd></dl>
 <dl class="section user"><dt></dt><dd>C command to generate the table <pre>
-for(i = 0; i&lt; N; i++)
+for (i = 0; i&lt; N; i++)
 {
-  weights[2*i]= cos(i*c);
-  weights[(2*i)+1]= -sin(i * c);
+  weights[(2*i)]   =  cos(i*c);
+  weights[(2*i)+1] = -sin(i*c);
 } </pre> </dd></dl>
 <dl class="section user"><dt></dt><dd>where <code>N</code> is the Number of weights to be calculated and <code>c</code> is <code>pi/(2*N)</code> </dd></dl>
 <dl class="section user"><dt></dt><dd>Convert the output to q31 format by multiplying with 2^31 and saturated if required. </dd></dl>
 <dl class="section user"><dt></dt><dd>In the tables below the real and imaginary values are placed alternatively, hence the array length is <code>2*N</code>. </dd></dl>
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga631bb59c7c97c814ff7147ecba6a716a">arm_dct4_init_q31()</a>.</p>
+<dl class="section user"><dt></dt><dd>cosFactor tables are generated using the formula : <pre>cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))</pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>C command to generate the table <pre>
+for (i = 0; i&lt; N; i++)
+{
+  cos_factors[i] = 2 * cos((2*i+1)*c/2);
+} </pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>where <code>N</code> is the number of factors to generate and <code>c</code> is <code>pi/(2*N)</code> </dd></dl>
+<dl class="section user"><dt></dt><dd>Then converted to q31 format by multiplying with 2^31 and saturated if required. </dd></dl>
 
 </div>
 </div>
 <a class="anchor" id="ga725b65c25a02b3cad329e18bb832f65e"></a>
 <div class="memitem">
 <div class="memproto">
-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
       <table class="memname">
         <tr>
           <td class="memname">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> WeightsQ31_2048[4096]</td>
         </tr>
       </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga631bb59c7c97c814ff7147ecba6a716a">arm_dct4_init_q31()</a>.</p>
-
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 <a class="anchor" id="ga31a8217a96f7d3171921e98398f31596"></a>
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-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
       <table class="memname">
         <tr>
           <td class="memname">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> WeightsQ31_512[1024]</td>
         </tr>
       </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga631bb59c7c97c814ff7147ecba6a716a">arm_dct4_init_q31()</a>.</p>
-
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 <a class="anchor" id="ga16bf6bbe5c4c9b35f88253cf7bdcc435"></a>
 <div class="memitem">
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-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
       <table class="memname">
         <tr>
           <td class="memname">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> WeightsQ31_8192[16384]</td>
         </tr>
       </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
 </div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga631bb59c7c97c814ff7147ecba6a716a">arm_dct4_init_q31()</a>.</p>
-
 </div>
 </div>
 </div><!-- contents -->
@@ -752,7 +384,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__DCT4__IDCT4__Table.js b/docs/DSP/html/group__DCT4__IDCT4__Table.js
index 484cb96..b68a721 100644
--- a/docs/DSP/html/group__DCT4__IDCT4__Table.js
+++ b/docs/DSP/html/group__DCT4__IDCT4__Table.js
@@ -4,10 +4,6 @@
     [ "cos_factors_2048", "group__DCT4__IDCT4__Table.html#ga1ba5306e0bc44730b40ab34cced45fd6", null ],
     [ "cos_factors_512", "group__DCT4__IDCT4__Table.html#ga49fd288352ca5bb43f5cec52273b0d80", null ],
     [ "cos_factors_8192", "group__DCT4__IDCT4__Table.html#gac12484542bc6aaecc754c855457411de", null ],
-    [ "cos_factorsQ15_128", "group__DCT4__IDCT4__Table.html#ga1477edd21c7b08b0b59a564f6c24d6c5", null ],
-    [ "cos_factorsQ15_2048", "group__DCT4__IDCT4__Table.html#gaeee5df7c1be2374441868ecbbc6c7e5d", null ],
-    [ "cos_factorsQ15_512", "group__DCT4__IDCT4__Table.html#gac056c3d026058eab3ba650828ff5642f", null ],
-    [ "cos_factorsQ15_8192", "group__DCT4__IDCT4__Table.html#ga988ff0563cc9df7848c9348871ac6c07", null ],
     [ "cos_factorsQ31_128", "group__DCT4__IDCT4__Table.html#gabb8ee2004a3520fd08388db637d43875", null ],
     [ "cos_factorsQ31_2048", "group__DCT4__IDCT4__Table.html#gaa15fc3fb058482defda371113cd12e74", null ],
     [ "cos_factorsQ31_512", "group__DCT4__IDCT4__Table.html#ga3559569e603cb918911074be88523d0e", null ],
@@ -16,10 +12,6 @@
     [ "Weights_2048", "group__DCT4__IDCT4__Table.html#gac3a2a00b3106dfcb5e0a582f50c65692", null ],
     [ "Weights_512", "group__DCT4__IDCT4__Table.html#gaeb67b0be5b3c2139d660e02cedeed908", null ],
     [ "Weights_8192", "group__DCT4__IDCT4__Table.html#ga45a8ec91e5da91790566105bc7e6f0c2", null ],
-    [ "WeightsQ15_128", "group__DCT4__IDCT4__Table.html#gaa4ff5e6f062efb1d1ec8c6c2207c3727", null ],
-    [ "WeightsQ15_2048", "group__DCT4__IDCT4__Table.html#ga2235ec700d0d6925d9733f48541d46f5", null ],
-    [ "WeightsQ15_512", "group__DCT4__IDCT4__Table.html#gadc8ee250fc217d6cb5c84dd7c1eb6d31", null ],
-    [ "WeightsQ15_8192", "group__DCT4__IDCT4__Table.html#ga4fdc60621eb306984a82ce8b2d645bb7", null ],
     [ "WeightsQ31_128", "group__DCT4__IDCT4__Table.html#ga02d7024538a87214296b01d83ba36b02", null ],
     [ "WeightsQ31_2048", "group__DCT4__IDCT4__Table.html#ga725b65c25a02b3cad329e18bb832f65e", null ],
     [ "WeightsQ31_512", "group__DCT4__IDCT4__Table.html#ga31a8217a96f7d3171921e98398f31596", null ],
diff --git a/docs/DSP/html/group__DotproductExample.html b/docs/DSP/html/group__DotproductExample.html
index 77d8584..b9cc017 100644
--- a/docs/DSP/html/group__DotproductExample.html
+++ b/docs/DSP/html/group__DotproductExample.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -130,8 +130,8 @@
 </dd></dl>
 <dl class="section user"><dt>CMSIS DSP Software Library Functions Used:</dt><dd></dd></dl>
 <dl class="section user"><dt></dt><dd><ul>
-<li><a class="el" href="group__BasicMult.html#gaca3f0b8227da431ab29225b88888aa32" title="Floating-point vector multiplication. ">arm_mult_f32()</a></li>
-<li><a class="el" href="group__BasicAdd.html#ga6a904a547413b10565dd1d251c6bafbd" title="Floating-point vector addition. ">arm_add_f32()</a></li>
+<li><a class="el" href="group__BasicMult.html#gacf950935141cad927bea886e88fd9e9b" title="Floating-point vector multiplication. ">arm_mult_f32()</a></li>
+<li><a class="el" href="group__BasicAdd.html#gabfef1e86e458314a61f4baa441d9765e" title="Floating-point vector addition. ">arm_add_f32()</a></li>
 </ul>
 </dd></dl>
 <p><b> Refer </b> <a class="el" href="arm_dotproduct_example_f32_8c-example.html">arm_dotproduct_example_f32.c</a> </p>
@@ -140,7 +140,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__FIR.html b/docs/DSP/html/group__FIR.html
index 8308a18..8c0e0d9 100644
--- a/docs/DSP/html/group__FIR.html
+++ b/docs/DSP/html/group__FIR.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,73 +116,72 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gae8fb334ea67eb6ecbd31824ddc14cd6a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gae8fb334ea67eb6ecbd31824ddc14cd6a">arm_fir_f32</a> (const <a class="el" href="structarm__fir__instance__f32.html">arm_fir_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gae8fb334ea67eb6ecbd31824ddc14cd6a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point FIR filter.  <a href="#gae8fb334ea67eb6ecbd31824ddc14cd6a">More...</a><br/></td></tr>
-<tr class="separator:gae8fb334ea67eb6ecbd31824ddc14cd6a"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac7d35e9472e49ccd88800f37f3476bd3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gac7d35e9472e49ccd88800f37f3476bd3">arm_fir_fast_q15</a> (const <a class="el" href="structarm__fir__instance__q15.html">arm_fir_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gac7d35e9472e49ccd88800f37f3476bd3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4.  <a href="#gac7d35e9472e49ccd88800f37f3476bd3">More...</a><br/></td></tr>
-<tr class="separator:gac7d35e9472e49ccd88800f37f3476bd3"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga70d11af009dcd25594c58c75cdb5d6e3"><td class="memItemLeft" align="right" valign="top">IAR_ONLY_LOW_OPTIMIZATION_ENTER <br class="typebreak"/>
-void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga70d11af009dcd25594c58c75cdb5d6e3">arm_fir_fast_q31</a> (const <a class="el" href="structarm__fir__instance__q31.html">arm_fir_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga70d11af009dcd25594c58c75cdb5d6e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4.  <a href="#ga70d11af009dcd25594c58c75cdb5d6e3">More...</a><br/></td></tr>
-<tr class="separator:ga70d11af009dcd25594c58c75cdb5d6e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga98d13def6427e29522829f945d0967db"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga98d13def6427e29522829f945d0967db">arm_fir_init_f32</a> (<a class="el" href="structarm__fir__instance__f32.html">arm_fir_instance_f32</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga98d13def6427e29522829f945d0967db"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point FIR filter.  <a href="#ga98d13def6427e29522829f945d0967db">More...</a><br/></td></tr>
-<tr class="separator:ga98d13def6427e29522829f945d0967db"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gae2a50f692f41ba57e44ed0719b1368bd"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gae2a50f692f41ba57e44ed0719b1368bd">arm_fir_init_q15</a> (<a class="el" href="structarm__fir__instance__q15.html">arm_fir_instance_q15</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gae2a50f692f41ba57e44ed0719b1368bd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q15 FIR filter.  <a href="#gae2a50f692f41ba57e44ed0719b1368bd">More...</a><br/></td></tr>
-<tr class="separator:gae2a50f692f41ba57e44ed0719b1368bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac00d53af87684cbbe135767b55e748a5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gac00d53af87684cbbe135767b55e748a5">arm_fir_init_q31</a> (<a class="el" href="structarm__fir__instance__q31.html">arm_fir_instance_q31</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gac00d53af87684cbbe135767b55e748a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 FIR filter.  <a href="#gac00d53af87684cbbe135767b55e748a5">More...</a><br/></td></tr>
-<tr class="separator:gac00d53af87684cbbe135767b55e748a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga88e48688224d42dc173dbcec702f0c1d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga88e48688224d42dc173dbcec702f0c1d">arm_fir_init_q7</a> (<a class="el" href="structarm__fir__instance__q7.html">arm_fir_instance_q7</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga88e48688224d42dc173dbcec702f0c1d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q7 FIR filter.  <a href="#ga88e48688224d42dc173dbcec702f0c1d">More...</a><br/></td></tr>
-<tr class="separator:ga88e48688224d42dc173dbcec702f0c1d"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga262d173058d6f80fdf60404ba262a8f5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga262d173058d6f80fdf60404ba262a8f5">arm_fir_q15</a> (const <a class="el" href="structarm__fir__instance__q15.html">arm_fir_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga262d173058d6f80fdf60404ba262a8f5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 FIR filter.  <a href="#ga262d173058d6f80fdf60404ba262a8f5">More...</a><br/></td></tr>
-<tr class="separator:ga262d173058d6f80fdf60404ba262a8f5"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaadd938c68ab08967cbb5fc696f384bb5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gaadd938c68ab08967cbb5fc696f384bb5">arm_fir_q31</a> (const <a class="el" href="structarm__fir__instance__q31.html">arm_fir_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaadd938c68ab08967cbb5fc696f384bb5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 FIR filter.  <a href="#gaadd938c68ab08967cbb5fc696f384bb5">More...</a><br/></td></tr>
-<tr class="separator:gaadd938c68ab08967cbb5fc696f384bb5"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga31c91a0bf0962327ef8f626fae68ea32"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga31c91a0bf0962327ef8f626fae68ea32">arm_fir_q7</a> (const <a class="el" href="structarm__fir__instance__q7.html">arm_fir_instance_q7</a> *S, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga31c91a0bf0962327ef8f626fae68ea32"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q7 FIR filter.  <a href="#ga31c91a0bf0962327ef8f626fae68ea32">More...</a><br/></td></tr>
-<tr class="separator:ga31c91a0bf0962327ef8f626fae68ea32"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0cf008f650a75f5e2cf82d10691b64d9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga0cf008f650a75f5e2cf82d10691b64d9">arm_fir_f32</a> (const <a class="el" href="structarm__fir__instance__f32.html">arm_fir_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga0cf008f650a75f5e2cf82d10691b64d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for floating-point FIR filter.  <a href="#ga0cf008f650a75f5e2cf82d10691b64d9">More...</a><br/></td></tr>
+<tr class="separator:ga0cf008f650a75f5e2cf82d10691b64d9"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf58eee6c38f0b666897b24ca02f9d58d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gaf58eee6c38f0b666897b24ca02f9d58d">arm_fir_fast_q15</a> (const <a class="el" href="structarm__fir__instance__q15.html">arm_fir_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaf58eee6c38f0b666897b24ca02f9d58d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 FIR filter (fast version).  <a href="#gaf58eee6c38f0b666897b24ca02f9d58d">More...</a><br/></td></tr>
+<tr class="separator:gaf58eee6c38f0b666897b24ca02f9d58d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga07051c8e9f0f228c9634b4a9ca2bcac3"><td class="memItemLeft" align="right" valign="top">IAR_ONLY_LOW_OPTIMIZATION_ENTER <br class="typebreak"/>
+void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga07051c8e9f0f228c9634b4a9ca2bcac3">arm_fir_fast_q31</a> (const <a class="el" href="structarm__fir__instance__q31.html">arm_fir_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga07051c8e9f0f228c9634b4a9ca2bcac3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 FIR filter (fast version).  <a href="#ga07051c8e9f0f228c9634b4a9ca2bcac3">More...</a><br/></td></tr>
+<tr class="separator:ga07051c8e9f0f228c9634b4a9ca2bcac3"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5afaa7b8e6735bbc19e582aa9755b0e1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga5afaa7b8e6735bbc19e582aa9755b0e1">arm_fir_init_f32</a> (<a class="el" href="structarm__fir__instance__f32.html">arm_fir_instance_f32</a> *S, uint16_t numTaps, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga5afaa7b8e6735bbc19e582aa9755b0e1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point FIR filter.  <a href="#ga5afaa7b8e6735bbc19e582aa9755b0e1">More...</a><br/></td></tr>
+<tr class="separator:ga5afaa7b8e6735bbc19e582aa9755b0e1"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf4bfa7e20520f3b6e9f03a52ad6d0e41"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gaf4bfa7e20520f3b6e9f03a52ad6d0e41">arm_fir_init_q15</a> (<a class="el" href="structarm__fir__instance__q15.html">arm_fir_instance_q15</a> *S, uint16_t numTaps, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaf4bfa7e20520f3b6e9f03a52ad6d0e41"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q15 FIR filter.  <a href="#gaf4bfa7e20520f3b6e9f03a52ad6d0e41">More...</a><br/></td></tr>
+<tr class="separator:gaf4bfa7e20520f3b6e9f03a52ad6d0e41"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga23ef4b2597aecc4d43cce7c4b456ae71"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga23ef4b2597aecc4d43cce7c4b456ae71">arm_fir_init_q31</a> (<a class="el" href="structarm__fir__instance__q31.html">arm_fir_instance_q31</a> *S, uint16_t numTaps, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga23ef4b2597aecc4d43cce7c4b456ae71"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 FIR filter.  <a href="#ga23ef4b2597aecc4d43cce7c4b456ae71">More...</a><br/></td></tr>
+<tr class="separator:ga23ef4b2597aecc4d43cce7c4b456ae71"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gabd62c4543b243c25e315e7acb57f726c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gabd62c4543b243c25e315e7acb57f726c">arm_fir_init_q7</a> (<a class="el" href="structarm__fir__instance__q7.html">arm_fir_instance_q7</a> *S, uint16_t numTaps, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gabd62c4543b243c25e315e7acb57f726c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q7 FIR filter.  <a href="#gabd62c4543b243c25e315e7acb57f726c">More...</a><br/></td></tr>
+<tr class="separator:gabd62c4543b243c25e315e7acb57f726c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad9f84fdadbb59292592c7fac81adb09c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gad9f84fdadbb59292592c7fac81adb09c">arm_fir_q15</a> (const <a class="el" href="structarm__fir__instance__q15.html">arm_fir_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gad9f84fdadbb59292592c7fac81adb09c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 FIR filter.  <a href="#gad9f84fdadbb59292592c7fac81adb09c">More...</a><br/></td></tr>
+<tr class="separator:gad9f84fdadbb59292592c7fac81adb09c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga2f6fc6582ab4491b3ea8c038c5247ecf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#ga2f6fc6582ab4491b3ea8c038c5247ecf">arm_fir_q31</a> (const <a class="el" href="structarm__fir__instance__q31.html">arm_fir_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga2f6fc6582ab4491b3ea8c038c5247ecf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q31 FIR filter.  <a href="#ga2f6fc6582ab4491b3ea8c038c5247ecf">More...</a><br/></td></tr>
+<tr class="separator:ga2f6fc6582ab4491b3ea8c038c5247ecf"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac333f1139ef35124e89b0ee7494ad0a2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR.html#gac333f1139ef35124e89b0ee7494ad0a2">arm_fir_q7</a> (const <a class="el" href="structarm__fir__instance__q7.html">arm_fir_instance_q7</a> *S, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gac333f1139ef35124e89b0ee7494ad0a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q7 FIR filter.  <a href="#gac333f1139ef35124e89b0ee7494ad0a2">More...</a><br/></td></tr>
+<tr class="separator:gac333f1139ef35124e89b0ee7494ad0a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>This set of functions implements Finite Impulse Response (FIR) filters for Q7, Q15, Q31, and floating-point data types. Fast versions of Q15 and Q31 are also provided. The functions operate on blocks of input and output data and each call to the function processes <code>blockSize</code> samples through the filter. <code>pSrc</code> and <code>pDst</code> points to input and output arrays containing <code>blockSize</code> values.</p>
-<dl class="section user"><dt>Algorithm:</dt><dd>The FIR filter algorithm is based upon a sequence of multiply-accumulate (MAC) operations. Each filter coefficient <code>b[n]</code> is multiplied by a state variable which equals a previous input sample <code>x[n]</code>. <pre>
+<dl class="section user"><dt>Algorithm</dt><dd>The FIR filter algorithm is based upon a sequence of multiply-accumulate (MAC) operations. Each filter coefficient <code>b[n]</code> is multiplied by a state variable which equals a previous input sample <code>x[n]</code>. <pre>
     y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
- </pre> </dd></dl>
+</pre> </dd></dl>
 <dl class="section user"><dt></dt><dd><div class="image">
-<img src="FIR.gif" alt="FIR.gif"/>
+<img src="FIR.GIF" alt="FIR.GIF"/>
 <div class="caption">
 Finite Impulse Response filter</div></div>
- </dd></dl>
+</dd></dl>
 <dl class="section user"><dt></dt><dd><code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>. Coefficients are stored in time reversed order. </dd></dl>
 <dl class="section user"><dt></dt><dd><pre>
     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- </pre> </dd></dl>
+</pre> </dd></dl>
 <dl class="section user"><dt></dt><dd><code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>. Samples in the state buffer are stored in the following order. </dd></dl>
 <dl class="section user"><dt></dt><dd><pre>
     {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
- </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code>. The increased state buffer length allows circular addressing, which is traditionally used in the FIR filters, to be avoided and yields a significant speed improvement. The state variables are updated after each block of data is processed; the coefficients are untouched. </dd></dl>
+</pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code>. The increased state buffer length allows circular addressing, which is traditionally used in the FIR filters, to be avoided and yields a significant speed improvement. The state variables are updated after each block of data is processed; the coefficients are untouched.</dd></dl>
 <dl class="section user"><dt>Instance Structure</dt><dd>The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. There are separate instance structure declarations for each of the 4 supported data types.</dd></dl>
 <dl class="section user"><dt>Initialization Functions</dt><dd>There is also an associated initialization function for each data type. The initialization function performs the following operations:<ul>
 <li>Sets the values of the internal structure fields.</li>
-<li>Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numTaps, pCoeffs, pState. Also set all of the values in pState to zero.</li>
+<li>Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numTaps, pCoeffs, pState. Also set all of the values in pState to zero. </li>
 </ul>
 </dd></dl>
 <dl class="section user"><dt></dt><dd>Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. The code below statically initializes each of the 4 different data type filter instance structures <pre>
-<a class="el" href="structarm__fir__instance__f32.html" title="Instance structure for the floating-point FIR filter. ">arm_fir_instance_f32</a> S = {numTaps, pState, pCoeffs};
-<a class="el" href="structarm__fir__instance__q31.html" title="Instance structure for the Q31 FIR filter. ">arm_fir_instance_q31</a> S = {numTaps, pState, pCoeffs};
-<a class="el" href="structarm__fir__instance__q15.html" title="Instance structure for the Q15 FIR filter. ">arm_fir_instance_q15</a> S = {numTaps, pState, pCoeffs};
-<a class="el" href="structarm__fir__instance__q7.html" title="Instance structure for the Q7 FIR filter. ">arm_fir_instance_q7</a> S =  {numTaps, pState, pCoeffs};
- </pre></dd></dl>
-<p>where <code>numTaps</code> is the number of filter coefficients in the filter; <code>pState</code> is the address of the state buffer; <code>pCoeffs</code> is the address of the coefficient buffer.</p>
+    <a class="el" href="structarm__fir__instance__f32.html" title="Instance structure for the floating-point FIR filter. ">arm_fir_instance_f32</a> S = {numTaps, pState, pCoeffs};
+    <a class="el" href="structarm__fir__instance__q31.html" title="Instance structure for the Q31 FIR filter. ">arm_fir_instance_q31</a> S = {numTaps, pState, pCoeffs};
+    <a class="el" href="structarm__fir__instance__q15.html" title="Instance structure for the Q15 FIR filter. ">arm_fir_instance_q15</a> S = {numTaps, pState, pCoeffs};
+    <a class="el" href="structarm__fir__instance__q7.html" title="Instance structure for the Q7 FIR filter. ">arm_fir_instance_q7</a> S =  {numTaps, pState, pCoeffs};
+</pre> where <code>numTaps</code> is the number of filter coefficients in the filter; <code>pState</code> is the address of the state buffer; <code>pCoeffs</code> is the address of the coefficient buffer.</dd></dl>
 <dl class="section user"><dt>Fixed-Point Behavior</dt><dd>Care must be taken when using the fixed-point versions of the FIR filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines. </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="gae8fb334ea67eb6ecbd31824ddc14cd6a"></a>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
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@@ -217,24 +216,21 @@
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       </table>
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+<p>Processing function for the floating-point FIR filter.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the floating-point FIR filter structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the floating-point FIR filter structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="structarm__fir__instance__f32.html#a20cf98c92b5323799b7881c9ff4d2f7c">arm_fir_instance_f32::numTaps</a>, <a class="el" href="structarm__fir__instance__f32.html#a1c9cfca901d5902afeb640f2831488f4">arm_fir_instance_f32::pCoeffs</a>, and <a class="el" href="structarm__fir__instance__f32.html#a7afcf4022e8560db9b8fd28b0d090a15">arm_fir_instance_f32::pState</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__fir__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
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-<a class="anchor" id="gac7d35e9472e49ccd88800f37f3476bd3"></a>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -269,25 +265,23 @@
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Processing function for the fast Q15 FIR filter (fast version).</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q15 FIR filter structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q15 FIR filter structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.</dd></dl>
-<dl class="section user"><dt></dt><dd>Refer to the function <code><a class="el" href="group__FIR.html#ga262d173058d6f80fdf60404ba262a8f5" title="Processing function for the Q15 FIR filter. ">arm_fir_q15()</a></code> for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure. Use the function <code><a class="el" href="group__FIR.html#gae2a50f692f41ba57e44ed0719b1368bd" title="Initialization function for the Q15 FIR filter. ">arm_fir_init_q15()</a></code> to initialize the filter structure. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#aa611fdbf6c56c46553701d6596a79aaf">__SMLAD()</a>, <a class="el" href="arm__math_8h.html#a7fc670277db1ad9ac34d52d771c7c305">__SMLADX()</a>, <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>, <a class="el" href="structarm__fir__instance__q15.html#a0e46f93cf51bfb18b1be808be9c5bfc9">arm_fir_instance_q15::numTaps</a>, <a class="el" href="structarm__fir__instance__q15.html#a6d16db16a5f8f0db54938f2967244d9e">arm_fir_instance_q15::pCoeffs</a>, and <a class="el" href="structarm__fir__instance__q15.html#aa8d25f44f45b6a6c4cf38c31569b8a01">arm_fir_instance_q15::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__FIR.html#gad9f84fdadbb59292592c7fac81adb09c">arm_fir_q15()</a> for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure. Use function <a class="el" href="group__FIR.html#gaf4bfa7e20520f3b6e9f03a52ad6d0e41">arm_fir_init_q15()</a> to initialize the filter structure. </dd></dl>
 
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
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@@ -322,25 +316,23 @@
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       </table>
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+<p>Processing function for the fast Q31 FIR filter (fast version).</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q31 structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block output data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q31 structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are added to a 2.30 accumulator. Finally, the accumulator is saturated and converted to a 1.31 result. The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.</dd></dl>
-<dl class="section user"><dt></dt><dd>Refer to the function <code><a class="el" href="group__FIR.html#gaadd938c68ab08967cbb5fc696f384bb5" title="Processing function for the Q31 FIR filter. ">arm_fir_q31()</a></code> for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision. Both the slow and the fast versions use the same instance structure. Use the function <code><a class="el" href="group__FIR.html#gac00d53af87684cbbe135767b55e748a5" title="Initialization function for the Q31 FIR filter. ">arm_fir_init_q31()</a></code> to initialize the filter structure. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aba3e538352fc7f9d6d15f9a18d469399">multAcc_32x32_keep32_R</a>, <a class="el" href="structarm__fir__instance__q31.html#a918fadd775b7a0482b21bf34dae2f094">arm_fir_instance_q31::numTaps</a>, <a class="el" href="structarm__fir__instance__q31.html#afaae4c884bdf11a4ec2f3b9bb2bb51d0">arm_fir_instance_q31::pCoeffs</a>, and <a class="el" href="structarm__fir__instance__q31.html#a409f39c93b744784648bdc365541444d">arm_fir_instance_q31::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are added to a 2.30 accumulator. Finally, the accumulator is saturated and converted to a 1.31 result. The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__FIR.html#ga2f6fc6582ab4491b3ea8c038c5247ecf">arm_fir_q31()</a> for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision. Both the slow and the fast versions use the same instance structure. Use function <a class="el" href="group__FIR.html#ga23ef4b2597aecc4d43cce7c4b456ae71">arm_fir_init_q31()</a> to initialize the filter structure. </dd></dl>
 
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 </div>
-<a class="anchor" id="ga98d13def6427e29522829f945d0967db"></a>
+<a class="anchor" id="ga5afaa7b8e6735bbc19e582aa9755b0e1"></a>
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         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pCoeffs</em>, </td>
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         <tr>
@@ -383,28 +375,23 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the floating-point FIR filter structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>Number of filter coefficients in the filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the filter coefficients buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples that are processed per call. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the floating-point FIR filter structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of filter coefficients in the filter </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the filter coefficients buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples processed per call </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Description:</b> </p>
-<dl class="section user"><dt></dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
-   {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Details</dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
+    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
 </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd><code>pState</code> points to the array of state variables. <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__FIR.html#gae8fb334ea67eb6ecbd31824ddc14cd6a" title="Processing function for the floating-point FIR filter. ">arm_fir_f32()</a></code>. </dd></dl>
-
-<p>References <a class="el" href="structarm__fir__instance__f32.html#a20cf98c92b5323799b7881c9ff4d2f7c">arm_fir_instance_f32::numTaps</a>, <a class="el" href="structarm__fir__instance__f32.html#a1c9cfca901d5902afeb640f2831488f4">arm_fir_instance_f32::pCoeffs</a>, and <a class="el" href="structarm__fir__instance__f32.html#a7afcf4022e8560db9b8fd28b0d090a15">arm_fir_instance_f32::pState</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__fir__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
+<dl class="section user"><dt></dt><dd><code>pState</code> points to the array of state variables. <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__FIR.html#ga0cf008f650a75f5e2cf82d10691b64d9" title="Processing function for the floating-point FIR filter. ">arm_fir_f32()</a></code>. </dd></dl>
 
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-<a class="anchor" id="gae2a50f692f41ba57e44ed0719b1368bd"></a>
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         <tr>
           <td class="paramkey"></td>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pCoeffs</em>, </td>
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         <tr>
@@ -447,18 +434,21 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q15 FIR filter structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>Number of filter coefficients in the filter. Must be even and greater than or equal to 4. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the filter coefficients buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>is number of samples processed per call. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q15 FIR filter structure. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of filter coefficients in the filter. Must be even and greater than or equal to 4. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the filter coefficients buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples processed per call. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>numTaps</code> is not greater than or equal to 4 and even.</dd></dl>
-<p><b>Description:</b> </p>
-<dl class="section user"><dt></dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
-   {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : <code>numTaps</code> is not greater than or equal to 4 and even</li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Details</dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
+    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
 </pre> Note that <code>numTaps</code> must be even and greater than or equal to 4. To implement an odd length filter simply increase <code>numTaps</code> by 1 and set the last coefficient to zero. For example, to implement a filter with <code>numTaps=3</code> and coefficients <pre>
     {0.3, -0.8, 0.3}
 </pre> set <code>numTaps=4</code> and use the coefficients: <pre>
@@ -467,14 +457,11 @@
     {0.3, -0.3}
 </pre> set <code>numTaps=4</code> and use the coefficients: <pre>
     {0.3, -0.3, 0, 0}.
-</pre> </dd></dl>
-<dl class="section user"><dt></dt><dd><code>pState</code> points to the array of state variables. <code>pState</code> is of length <code>numTaps+blockSize</code>, when running on Cortex-M4 and Cortex-M3 and is of length <code>numTaps+blockSize-1</code>, when running on Cortex-M0 where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__FIR.html#ga262d173058d6f80fdf60404ba262a8f5" title="Processing function for the Q15 FIR filter. ">arm_fir_q15()</a></code>. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__fir__instance__q15.html#a0e46f93cf51bfb18b1be808be9c5bfc9">arm_fir_instance_q15::numTaps</a>, <a class="el" href="structarm__fir__instance__q15.html#a6d16db16a5f8f0db54938f2967244d9e">arm_fir_instance_q15::pCoeffs</a>, <a class="el" href="structarm__fir__instance__q15.html#aa8d25f44f45b6a6c4cf38c31569b8a01">arm_fir_instance_q15::pState</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+</pre> <code>pState</code> points to the array of state variables. <code>pState</code> is of length <code>numTaps+blockSize</code>, when running on Cortex-M4 and Cortex-M3 and is of length <code>numTaps+blockSize-1</code>, when running on Cortex-M0 where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__FIR.html#gad9f84fdadbb59292592c7fac81adb09c" title="Processing function for the Q15 FIR filter. ">arm_fir_q15()</a></code>. </dd></dl>
 
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
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 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q31 FIR filter structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>Number of filter coefficients in the filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the filter coefficients buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples that are processed per call. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q31 FIR filter structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of filter coefficients in the filter </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the filter coefficients buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples processed </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Description:</b> </p>
-<dl class="section user"><dt></dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
-   {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-</pre> </dd></dl>
-<dl class="section user"><dt></dt><dd><code>pState</code> points to the array of state variables. <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__FIR.html#gaadd938c68ab08967cbb5fc696f384bb5" title="Processing function for the Q31 FIR filter. ">arm_fir_q31()</a></code>. </dd></dl>
-
-<p>References <a class="el" href="structarm__fir__instance__q31.html#a918fadd775b7a0482b21bf34dae2f094">arm_fir_instance_q31::numTaps</a>, <a class="el" href="structarm__fir__instance__q31.html#afaae4c884bdf11a4ec2f3b9bb2bb51d0">arm_fir_instance_q31::pCoeffs</a>, and <a class="el" href="structarm__fir__instance__q31.html#a409f39c93b744784648bdc365541444d">arm_fir_instance_q31::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Details</dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
+    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+</pre> <code>pState</code> points to the array of state variables. <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__FIR.html#ga2f6fc6582ab4491b3ea8c038c5247ecf" title="Processing function for the Q31 FIR filter. ">arm_fir_q31()</a></code>. </dd></dl>
 
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pCoeffs</em>, </td>
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 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q7 FIR filter structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>Number of filter coefficients in the filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the filter coefficients buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples that are processed per call. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q7 FIR filter structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of filter coefficients in the filter </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the filter coefficients buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples processed </td></tr>
   </table>
   </dd>
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
-<p><b>Description:</b> </p>
-<dl class="section user"><dt></dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
-   {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+<dl class="section user"><dt>Details</dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
+    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
 </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd><code>pState</code> points to the array of state variables. <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__FIR.html#ga31c91a0bf0962327ef8f626fae68ea32" title="Processing function for the Q7 FIR filter. ">arm_fir_q7()</a></code>. </dd></dl>
-
-<p>References <a class="el" href="structarm__fir__instance__q7.html#a9b50840e2c5ef5b17e1a584fb4cf0d06">arm_fir_instance_q7::numTaps</a>, <a class="el" href="structarm__fir__instance__q7.html#a0e45aedefc3fffad6cb315c5b6e5bd49">arm_fir_instance_q7::pCoeffs</a>, and <a class="el" href="structarm__fir__instance__q7.html#aaddea3b9c7e16ddfd9428b7bf9f9c200">arm_fir_instance_q7::pState</a>.</p>
+<dl class="section user"><dt></dt><dd><code>pState</code> points to the array of state variables. <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__FIR.html#gac333f1139ef35124e89b0ee7494ad0a2" title="Processing function for the Q7 FIR filter. ">arm_fir_q7()</a></code>. </dd></dl>
 
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
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         <tr>
@@ -635,24 +615,20 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q15 FIR structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q15 FIR filter structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Restrictions</dt><dd>If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, state buffers should be aligned by 32-bit</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.</dd></dl>
-<dl class="section user"><dt></dt><dd>Refer to the function <code><a class="el" href="group__FIR.html#gac7d35e9472e49ccd88800f37f3476bd3" title="Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4. ">arm_fir_fast_q15()</a></code> for a faster but less precise implementation of this function. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="structarm__fir__instance__q15.html#a0e46f93cf51bfb18b1be808be9c5bfc9">arm_fir_instance_q15::numTaps</a>, <a class="el" href="structarm__fir__instance__q15.html#a6d16db16a5f8f0db54938f2967244d9e">arm_fir_instance_q15::pCoeffs</a>, and <a class="el" href="structarm__fir__instance__q15.html#aa8d25f44f45b6a6c4cf38c31569b8a01">arm_fir_instance_q15::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__FIR.html#gaf58eee6c38f0b666897b24ca02f9d58d">arm_fir_fast_q15()</a> for a faster but less precise implementation of this function. </dd></dl>
 
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+<p>Processing function for the Q31 FIR filter.</p>
 <dl class="params"><dt>Parameters</dt><dd>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q31 FIR filter structure. </td></tr>
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-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q31 FIR filter structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
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+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. After all multiply-accumulates are performed, the 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__FIR.html#ga07051c8e9f0f228c9634b4a9ca2bcac3">arm_fir_fast_q31()</a> for a faster but less precise implementation of this filter. </dd></dl>
 
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+<p>Processing function for the Q7 FIR filter.</p>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q7 FIR filter structure. </td></tr>
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-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q7 FIR filter structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
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-<dl class="section user"><dt></dt><dd>The function is implemented using a 32-bit internal accumulator. Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. The accumulator is converted to 18.7 format by discarding the low 7 bits. Finally, the result is truncated to 1.7 format. </dd></dl>
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-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="structarm__fir__instance__q7.html#a9b50840e2c5ef5b17e1a584fb4cf0d06">arm_fir_instance_q7::numTaps</a>, <a class="el" href="structarm__fir__instance__q7.html#a0e45aedefc3fffad6cb315c5b6e5bd49">arm_fir_instance_q7::pCoeffs</a>, and <a class="el" href="structarm__fir__instance__q7.html#aaddea3b9c7e16ddfd9428b7bf9f9c200">arm_fir_instance_q7::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 32-bit internal accumulator. Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. The accumulator is converted to 18.7 format by discarding the low 7 bits. Finally, the result is truncated to 1.7 format. </dd></dl>
 
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-<tr class="memitem:ga9cae104c5cf60b4e7671c82264a8c12e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Interpolate.html#ga9cae104c5cf60b4e7671c82264a8c12e">arm_fir_interpolate_f32</a> (const <a class="el" href="structarm__fir__interpolate__instance__f32.html">arm_fir_interpolate_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga9cae104c5cf60b4e7671c82264a8c12e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point FIR interpolator.  <a href="#ga9cae104c5cf60b4e7671c82264a8c12e">More...</a><br/></td></tr>
-<tr class="separator:ga9cae104c5cf60b4e7671c82264a8c12e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga0f857457a815946f7e4dca989ebf6ff6"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Interpolate.html#ga0f857457a815946f7e4dca989ebf6ff6">arm_fir_interpolate_init_f32</a> (<a class="el" href="structarm__fir__interpolate__instance__f32.html">arm_fir_interpolate_instance_f32</a> *S, uint8_t L, uint16_t numTaps, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga0f857457a815946f7e4dca989ebf6ff6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point FIR interpolator.  <a href="#ga0f857457a815946f7e4dca989ebf6ff6">More...</a><br/></td></tr>
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-<tr class="memdesc:ga18e8c4a74ff1d0f88876cc63f675288f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q15 FIR interpolator.  <a href="#ga18e8c4a74ff1d0f88876cc63f675288f">More...</a><br/></td></tr>
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-<tr class="memdesc:ga9d0ba38ce9f12a850dd242731d307476"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 FIR interpolator.  <a href="#ga9d0ba38ce9f12a850dd242731d307476">More...</a><br/></td></tr>
-<tr class="separator:ga9d0ba38ce9f12a850dd242731d307476"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga7962b5f9636e54899f75d0c5936800b5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Interpolate.html#ga7962b5f9636e54899f75d0c5936800b5">arm_fir_interpolate_q15</a> (const <a class="el" href="structarm__fir__interpolate__instance__q15.html">arm_fir_interpolate_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga7962b5f9636e54899f75d0c5936800b5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 FIR interpolator.  <a href="#ga7962b5f9636e54899f75d0c5936800b5">More...</a><br/></td></tr>
-<tr class="separator:ga7962b5f9636e54899f75d0c5936800b5"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaac9c0f01ed91c53f7083995d7411f5ee"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Interpolate.html#gaac9c0f01ed91c53f7083995d7411f5ee">arm_fir_interpolate_q31</a> (const <a class="el" href="structarm__fir__interpolate__instance__q31.html">arm_fir_interpolate_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaac9c0f01ed91c53f7083995d7411f5ee"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 FIR interpolator.  <a href="#gaac9c0f01ed91c53f7083995d7411f5ee">More...</a><br/></td></tr>
-<tr class="separator:gaac9c0f01ed91c53f7083995d7411f5ee"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga62d0757246bbbe5bfaf67b9a95c16c51"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Interpolate.html#ga62d0757246bbbe5bfaf67b9a95c16c51">arm_fir_interpolate_f32</a> (const <a class="el" href="structarm__fir__interpolate__instance__f32.html">arm_fir_interpolate_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga62d0757246bbbe5bfaf67b9a95c16c51"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for floating-point FIR interpolator.  <a href="#ga62d0757246bbbe5bfaf67b9a95c16c51">More...</a><br/></td></tr>
+<tr class="separator:ga62d0757246bbbe5bfaf67b9a95c16c51"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1416bcc1bcf6e2b18ff15261b6e04345"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Interpolate.html#ga1416bcc1bcf6e2b18ff15261b6e04345">arm_fir_interpolate_init_f32</a> (<a class="el" href="structarm__fir__interpolate__instance__f32.html">arm_fir_interpolate_instance_f32</a> *S, uint8_t L, uint16_t numTaps, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga1416bcc1bcf6e2b18ff15261b6e04345"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point FIR interpolator.  <a href="#ga1416bcc1bcf6e2b18ff15261b6e04345">More...</a><br/></td></tr>
+<tr class="separator:ga1416bcc1bcf6e2b18ff15261b6e04345"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9d6a3c53991f1dca4da31dc400ed9eec"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Interpolate.html#ga9d6a3c53991f1dca4da31dc400ed9eec">arm_fir_interpolate_init_q15</a> (<a class="el" href="structarm__fir__interpolate__instance__q15.html">arm_fir_interpolate_instance_q15</a> *S, uint8_t L, uint16_t numTaps, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga9d6a3c53991f1dca4da31dc400ed9eec"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q15 FIR interpolator.  <a href="#ga9d6a3c53991f1dca4da31dc400ed9eec">More...</a><br/></td></tr>
+<tr class="separator:ga9d6a3c53991f1dca4da31dc400ed9eec"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga2f2288aa947fea3e8bcda3d5e01c1f6d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Interpolate.html#ga2f2288aa947fea3e8bcda3d5e01c1f6d">arm_fir_interpolate_init_q31</a> (<a class="el" href="structarm__fir__interpolate__instance__q31.html">arm_fir_interpolate_instance_q31</a> *S, uint8_t L, uint16_t numTaps, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga2f2288aa947fea3e8bcda3d5e01c1f6d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 FIR interpolator.  <a href="#ga2f2288aa947fea3e8bcda3d5e01c1f6d">More...</a><br/></td></tr>
+<tr class="separator:ga2f2288aa947fea3e8bcda3d5e01c1f6d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga026a02cda40616476e33b82e4eaf855d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Interpolate.html#ga026a02cda40616476e33b82e4eaf855d">arm_fir_interpolate_q15</a> (const <a class="el" href="structarm__fir__interpolate__instance__q15.html">arm_fir_interpolate_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga026a02cda40616476e33b82e4eaf855d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 FIR interpolator.  <a href="#ga026a02cda40616476e33b82e4eaf855d">More...</a><br/></td></tr>
+<tr class="separator:ga026a02cda40616476e33b82e4eaf855d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gadf65923ede13284c769b5621709e8135"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Interpolate.html#gadf65923ede13284c769b5621709e8135">arm_fir_interpolate_q31</a> (const <a class="el" href="structarm__fir__interpolate__instance__q31.html">arm_fir_interpolate_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gadf65923ede13284c769b5621709e8135"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 FIR interpolator.  <a href="#gadf65923ede13284c769b5621709e8135">More...</a><br/></td></tr>
+<tr class="separator:gadf65923ede13284c769b5621709e8135"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>These functions combine an upsampler (zero stuffer) and an FIR filter. They are used in multirate systems for increasing the sample rate of a signal without introducing high frequency images. Conceptually, the functions are equivalent to the block diagram below: </p>
@@ -144,35 +144,35 @@
 <p>After upsampling by a factor of <code>L</code>, the signal should be filtered by a lowpass filter with a normalized cutoff frequency of <code>1/L</code> in order to eliminate high frequency copies of the spectrum. The user of the function is responsible for providing the filter coefficients.</p>
 <p>The FIR interpolator functions provided in the CMSIS DSP Library combine the upsampler and FIR filter in an efficient manner. The upsampler inserts <code>L-1</code> zeros between each sample. Instead of multiplying by these zero values, the FIR filter is designed to skip them. This leads to an efficient implementation without any wasted effort. The functions operate on blocks of input and output data. <code>pSrc</code> points to an array of <code>blockSize</code> input values and <code>pDst</code> points to an array of <code>blockSize*L</code> output values.</p>
 <p>The library provides separate functions for Q15, Q31, and floating-point data types.</p>
-<dl class="section user"><dt>Algorithm:</dt><dd>The functions use a polyphase filter structure: <pre>
-   y[n] = b[0] * x[n] + b[L]   * x[n-1] + ... + b[L*(phaseLength-1)] * x[n-phaseLength+1]
-   y[n+1] = b[1] * x[n] + b[L+1] * x[n-1] + ... + b[L*(phaseLength-1)+1] * x[n-phaseLength+1]
-   ...
-   y[n+(L-1)] = b[L-1] * x[n] + b[2*L-1] * x[n-1] + ....+ b[L*(phaseLength-1)+(L-1)] * x[n-phaseLength+1]
+<dl class="section user"><dt>Algorithm</dt><dd>The functions use a polyphase filter structure: <pre>
+    y[n] = b[0] * x[n] + b[L]   * x[n-1] + ... + b[L*(phaseLength-1)] * x[n-phaseLength+1]
+    y[n+1] = b[1] * x[n] + b[L+1] * x[n-1] + ... + b[L*(phaseLength-1)+1] * x[n-phaseLength+1]
+    ...
+    y[n+(L-1)] = b[L-1] * x[n] + b[2*L-1] * x[n-1] + ....+ b[L*(phaseLength-1)+(L-1)] * x[n-phaseLength+1]
 </pre> This approach is more efficient than straightforward upsample-then-filter algorithms. With this method the computation is reduced by a factor of <code>1/L</code> when compared to using a standard FIR filter. </dd></dl>
-<dl class="section user"><dt></dt><dd><code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>. <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code> and this is checked by the initialization functions. Internally, the function divides the FIR filter's impulse response into shorter filters of length <code>phaseLength=numTaps/L</code>. Coefficients are stored in time reversed order. </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>
-   {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+<dl class="section user"><dt></dt><dd><code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>. <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code> and this is checked by the initialization functions. Internally, the function divides the FIR filter's impulse response into shorter filters of length <code>phaseLength=numTaps/L</code>. Coefficients are stored in time reversed order. <pre>
+    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
 </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd><code>pState</code> points to a state array of size <code>blockSize + phaseLength - 1</code>. Samples in the state buffer are stored in the order: </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>
+<dl class="section user"><dt></dt><dd><code>pState</code> points to a state array of size <code>blockSize + phaseLength - 1</code>. Samples in the state buffer are stored in the order: <pre>
    {x[n-phaseLength+1], x[n-phaseLength], x[n-phaseLength-1], x[n-phaseLength-2]....x[0], x[1], ..., x[blockSize-1]}
-</pre> The state variables are updated after each block of data is processed, the coefficients are untouched.</dd></dl>
+</pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>The state variables are updated after each block of data is processed, the coefficients are untouched.</dd></dl>
 <dl class="section user"><dt>Instance Structure</dt><dd>The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable array should be allocated separately. There are separate instance structure declarations for each of the 3 supported data types.</dd></dl>
 <dl class="section user"><dt>Initialization Functions</dt><dd>There is also an associated initialization function for each data type. The initialization function performs the following operations:<ul>
 <li>Sets the values of the internal structure fields.</li>
 <li>Zeros out the values in the state buffer.</li>
-<li>Checks to make sure that the length of the filter is a multiple of the interpolation factor. To do this manually without calling the init function, assign the follow subfields of the instance structure: L (interpolation factor), pCoeffs, phaseLength (numTaps / L), pState. Also set all of the values in pState to zero.</li>
+<li>Checks to make sure that the length of the filter is a multiple of the interpolation factor. To do this manually without calling the init function, assign the follow subfields of the instance structure: L (interpolation factor), pCoeffs, phaseLength (numTaps / L), pState. Also set all of the values in pState to zero. </li>
 </ul>
 </dd></dl>
 <dl class="section user"><dt></dt><dd>Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. The code below statically initializes each of the 3 different data type filter instance structures <pre>
-<a class="el" href="structarm__fir__interpolate__instance__f32.html" title="Instance structure for the floating-point FIR interpolator. ">arm_fir_interpolate_instance_f32</a> S = {L, phaseLength, pCoeffs, pState};
-<a class="el" href="structarm__fir__interpolate__instance__q31.html" title="Instance structure for the Q31 FIR interpolator. ">arm_fir_interpolate_instance_q31</a> S = {L, phaseLength, pCoeffs, pState};
-<a class="el" href="structarm__fir__interpolate__instance__q15.html" title="Instance structure for the Q15 FIR interpolator. ">arm_fir_interpolate_instance_q15</a> S = {L, phaseLength, pCoeffs, pState};
-</pre> where <code>L</code> is the interpolation factor; <code>phaseLength=numTaps/L</code> is the length of each of the shorter FIR filters used internally, <code>pCoeffs</code> is the address of the coefficient buffer; <code>pState</code> is the address of the state buffer. Be sure to set the values in the state buffer to zeros when doing static initialization.</dd></dl>
+    <a class="el" href="structarm__fir__interpolate__instance__f32.html" title="Instance structure for the floating-point FIR interpolator. ">arm_fir_interpolate_instance_f32</a> S = {L, phaseLength, pCoeffs, pState};
+    <a class="el" href="structarm__fir__interpolate__instance__q31.html" title="Instance structure for the Q31 FIR interpolator. ">arm_fir_interpolate_instance_q31</a> S = {L, phaseLength, pCoeffs, pState};
+    <a class="el" href="structarm__fir__interpolate__instance__q15.html" title="Instance structure for the Q15 FIR interpolator. ">arm_fir_interpolate_instance_q15</a> S = {L, phaseLength, pCoeffs, pState};
+</pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>where <code>L</code> is the interpolation factor; <code>phaseLength=numTaps/L</code> is the length of each of the shorter FIR filters used internally, <code>pCoeffs</code> is the address of the coefficient buffer; <code>pState</code> is the address of the state buffer. Be sure to set the values in the state buffer to zeros when doing static initialization.</dd></dl>
 <dl class="section user"><dt>Fixed-Point Behavior</dt><dd>Care must be taken when using the fixed-point versions of the FIR interpolate filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines. </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga9cae104c5cf60b4e7671c82264a8c12e"></a>
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         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -207,22 +207,21 @@
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Processing function for the floating-point FIR interpolator.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the floating-point FIR interpolator structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the floating-point FIR interpolator structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="structarm__fir__interpolate__instance__f32.html#ae6f94dcc0ccd8aa4bc699b20985d9df5">arm_fir_interpolate_instance_f32::L</a>, <a class="el" href="structarm__fir__interpolate__instance__f32.html#a86053b715980a93c9df630d6de5bb63c">arm_fir_interpolate_instance_f32::pCoeffs</a>, <a class="el" href="structarm__fir__interpolate__instance__f32.html#a389e669e13ec56292a70db8e92194b12">arm_fir_interpolate_instance_f32::phaseLength</a>, and <a class="el" href="structarm__fir__interpolate__instance__f32.html#a42a8ba1bda85fa86d7b6c84d3da4c75b">arm_fir_interpolate_instance_f32::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga0f857457a815946f7e4dca989ebf6ff6"></a>
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@@ -247,7 +246,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pCoeffs</em>, </td>
         </tr>
         <tr>
@@ -271,27 +270,29 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the floating-point FIR interpolator structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">L</td><td>upsample factor. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of filter coefficients in the filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the filter coefficient buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the floating-point FIR interpolator structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">L</td><td>upsample factor </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of filter coefficients in the filter </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the filter coefficient buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.</dd></dl>
-<p><b>Description:</b> </p>
-<dl class="section user"><dt></dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
-   {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
-</pre> The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>. </dd></dl>
-<dl class="section user"><dt></dt><dd><code>pState</code> points to the array of state variables. <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__FIR__Interpolate.html#ga9cae104c5cf60b4e7671c82264a8c12e" title="Processing function for the floating-point FIR interpolator. ">arm_fir_interpolate_f32()</a></code>. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9ae74d7f8a53aec0512ae8f0a421e0e1">ARM_MATH_LENGTH_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__fir__interpolate__instance__f32.html#ae6f94dcc0ccd8aa4bc699b20985d9df5">arm_fir_interpolate_instance_f32::L</a>, <a class="el" href="structarm__fir__interpolate__instance__f32.html#a86053b715980a93c9df630d6de5bb63c">arm_fir_interpolate_instance_f32::pCoeffs</a>, <a class="el" href="structarm__fir__interpolate__instance__f32.html#a389e669e13ec56292a70db8e92194b12">arm_fir_interpolate_instance_f32::phaseLength</a>, <a class="el" href="structarm__fir__interpolate__instance__f32.html#a42a8ba1bda85fa86d7b6c84d3da4c75b">arm_fir_interpolate_instance_f32::pState</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code></li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Details</dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
+    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
+</pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>. </dd></dl>
+<dl class="section user"><dt></dt><dd><code>pState</code> points to the array of state variables. <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__FIR__Interpolate.html#ga62d0757246bbbe5bfaf67b9a95c16c51" title="Processing function for the floating-point FIR interpolator. ">arm_fir_interpolate_f32()</a></code>. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga18e8c4a74ff1d0f88876cc63f675288f"></a>
+<a class="anchor" id="ga9d6a3c53991f1dca4da31dc400ed9eec"></a>
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@@ -316,7 +317,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pCoeffs</em>, </td>
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         <tr>
@@ -340,27 +341,28 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q15 FIR interpolator structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">L</td><td>upsample factor. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of filter coefficients in the filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the filter coefficient buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q15 FIR interpolator structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">L</td><td>upsample factor </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of filter coefficients in the filter </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the filter coefficient buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.</dd></dl>
-<p><b>Description:</b> </p>
-<dl class="section user"><dt></dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
-   {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code></li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Details</dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
+    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
 </pre> The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>. </dd></dl>
-<dl class="section user"><dt></dt><dd><code>pState</code> points to the array of state variables. <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__FIR__Interpolate.html#ga7962b5f9636e54899f75d0c5936800b5" title="Processing function for the Q15 FIR interpolator. ">arm_fir_interpolate_q15()</a></code>. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9ae74d7f8a53aec0512ae8f0a421e0e1">ARM_MATH_LENGTH_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__fir__interpolate__instance__q15.html#a5431bdc079e72a973b51d359f7f13603">arm_fir_interpolate_instance_q15::L</a>, <a class="el" href="structarm__fir__interpolate__instance__q15.html#a767d91d61d4c0beeddd4325d28d28e24">arm_fir_interpolate_instance_q15::pCoeffs</a>, <a class="el" href="structarm__fir__interpolate__instance__q15.html#ad5178a02a697a77e0d0e60705d9f0a19">arm_fir_interpolate_instance_q15::phaseLength</a>, <a class="el" href="structarm__fir__interpolate__instance__q15.html#a26b864363fa47954248f2590e3a82a3c">arm_fir_interpolate_instance_q15::pState</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section user"><dt></dt><dd><code>pState</code> points to the array of state variables. <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__FIR__Interpolate.html#ga026a02cda40616476e33b82e4eaf855d" title="Processing function for the Q15 FIR interpolator. ">arm_fir_interpolate_q15()</a></code>. </dd></dl>
 
 </div>
 </div>
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+<a class="anchor" id="ga2f2288aa947fea3e8bcda3d5e01c1f6d"></a>
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@@ -385,7 +387,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pCoeffs</em>, </td>
         </tr>
         <tr>
@@ -409,27 +411,28 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q31 FIR interpolator structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">L</td><td>upsample factor. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of filter coefficients in the filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the filter coefficient buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q31 FIR interpolator structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">L</td><td>upsample factor </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of filter coefficients in the filter </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the filter coefficient buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.</dd></dl>
-<p><b>Description:</b> </p>
-<dl class="section user"><dt></dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
-   {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code></li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Details</dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
+    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
 </pre> The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>. </dd></dl>
-<dl class="section user"><dt></dt><dd><code>pState</code> points to the array of state variables. <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__FIR__Interpolate.html#gaac9c0f01ed91c53f7083995d7411f5ee" title="Processing function for the Q31 FIR interpolator. ">arm_fir_interpolate_q31()</a></code>. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9ae74d7f8a53aec0512ae8f0a421e0e1">ARM_MATH_LENGTH_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__fir__interpolate__instance__q31.html#a5cdf0a631cb74e0e9588c388abe5235c">arm_fir_interpolate_instance_q31::L</a>, <a class="el" href="structarm__fir__interpolate__instance__q31.html#afa719433687e1936ec3403d0d32f06e6">arm_fir_interpolate_instance_q31::pCoeffs</a>, <a class="el" href="structarm__fir__interpolate__instance__q31.html#a5d243796584afc7cd6c557f00b7acca5">arm_fir_interpolate_instance_q31::phaseLength</a>, <a class="el" href="structarm__fir__interpolate__instance__q31.html#addde04514b6e6ac72be3d609f0398b1a">arm_fir_interpolate_instance_q31::pState</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section user"><dt></dt><dd><code>pState</code> points to the array of state variables. <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__FIR__Interpolate.html#gadf65923ede13284c769b5621709e8135" title="Processing function for the Q31 FIR interpolator. ">arm_fir_interpolate_q31()</a></code>. </dd></dl>
 
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-<a class="anchor" id="ga7962b5f9636e54899f75d0c5936800b5"></a>
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           <td class="paramkey"></td>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
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         <tr>
@@ -466,22 +469,19 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q15 FIR interpolator structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q15 FIR interpolator structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="structarm__fir__interpolate__instance__q15.html#a5431bdc079e72a973b51d359f7f13603">arm_fir_interpolate_instance_q15::L</a>, <a class="el" href="structarm__fir__interpolate__instance__q15.html#a767d91d61d4c0beeddd4325d28d28e24">arm_fir_interpolate_instance_q15::pCoeffs</a>, <a class="el" href="structarm__fir__interpolate__instance__q15.html#ad5178a02a697a77e0d0e60705d9f0a19">arm_fir_interpolate_instance_q15::phaseLength</a>, and <a class="el" href="structarm__fir__interpolate__instance__q15.html#a26b864363fa47954248f2590e3a82a3c">arm_fir_interpolate_instance_q15::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format. </dd></dl>
 
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
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@@ -518,18 +518,15 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q31 FIR interpolator structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q31 FIR interpolator structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by <code>1/(numTaps/L)</code>. since <code>numTaps/L</code> additions occur per output sample. After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="structarm__fir__interpolate__instance__q31.html#a5cdf0a631cb74e0e9588c388abe5235c">arm_fir_interpolate_instance_q31::L</a>, <a class="el" href="structarm__fir__interpolate__instance__q31.html#afa719433687e1936ec3403d0d32f06e6">arm_fir_interpolate_instance_q31::pCoeffs</a>, <a class="el" href="structarm__fir__interpolate__instance__q31.html#a5d243796584afc7cd6c557f00b7acca5">arm_fir_interpolate_instance_q31::phaseLength</a>, and <a class="el" href="structarm__fir__interpolate__instance__q31.html#addde04514b6e6ac72be3d609f0398b1a">arm_fir_interpolate_instance_q31::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by <code>1/(numTaps/L)</code>. since <code>numTaps/L</code> additions occur per output sample. After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format. </dd></dl>
 
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-<tr class="separator:gae63a45a63a11a65f2eae8b8b1fe370a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:ga86199a1590af2b8941c6532ee9d03229"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga1b22f30ce1cc19bf5a5d7c9fca154d72"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Lattice.html#ga1b22f30ce1cc19bf5a5d7c9fca154d72">arm_fir_lattice_init_q15</a> (<a class="el" href="structarm__fir__lattice__instance__q15.html">arm_fir_lattice_instance_q15</a> *S, uint16_t numStages, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState)</td></tr>
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-<tr class="separator:ga1b22f30ce1cc19bf5a5d7c9fca154d72"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac05a17a0188bb851b58d19e572870a54"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Lattice.html#gac05a17a0188bb851b58d19e572870a54">arm_fir_lattice_init_q31</a> (<a class="el" href="structarm__fir__lattice__instance__q31.html">arm_fir_lattice_instance_q31</a> *S, uint16_t numStages, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState)</td></tr>
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-<tr class="separator:ga2e36fd210e4a1a5dd333ce80dd6d9a88"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:ga62053bf9d04f9f97ee5f4ef831533d68"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:ga489e9fd4fed0037b5ed0947eaa12d68d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae4657ac1025b5b4294fd4acc1e49e7f8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Lattice.html#gae4657ac1025b5b4294fd4acc1e49e7f8">arm_fir_lattice_init_q15</a> (<a class="el" href="structarm__fir__lattice__instance__q15.html">arm_fir_lattice_instance_q15</a> *S, uint16_t numStages, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState)</td></tr>
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+<tr class="separator:gae4657ac1025b5b4294fd4acc1e49e7f8"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memdesc:gaf7723f451f6d4cf2586bb4b63d2029cb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 FIR lattice filter.  <a href="#gaf7723f451f6d4cf2586bb4b63d2029cb">More...</a><br/></td></tr>
+<tr class="separator:gaf7723f451f6d4cf2586bb4b63d2029cb"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafddb7fd49cb0e8a4b6d9546b58bf60fb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Lattice.html#gafddb7fd49cb0e8a4b6d9546b58bf60fb">arm_fir_lattice_q15</a> (const <a class="el" href="structarm__fir__lattice__instance__q15.html">arm_fir_lattice_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gafddb7fd49cb0e8a4b6d9546b58bf60fb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q15 FIR lattice filter.  <a href="#gafddb7fd49cb0e8a4b6d9546b58bf60fb">More...</a><br/></td></tr>
+<tr class="separator:gafddb7fd49cb0e8a4b6d9546b58bf60fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9ae2b76a2a1625d00f902919d0fdea05"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Lattice.html#ga9ae2b76a2a1625d00f902919d0fdea05">arm_fir_lattice_q31</a> (const <a class="el" href="structarm__fir__lattice__instance__q31.html">arm_fir_lattice_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga9ae2b76a2a1625d00f902919d0fdea05"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 FIR lattice filter.  <a href="#ga9ae2b76a2a1625d00f902919d0fdea05">More...</a><br/></td></tr>
+<tr class="separator:ga9ae2b76a2a1625d00f902919d0fdea05"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>This set of functions implements Finite Impulse Response (FIR) lattice filters for Q15, Q31 and floating-point data types. Lattice filters are used in a variety of adaptive filter applications. The filter structure is feedforward and the net impulse response is finite length. The functions operate on blocks of input and output data and each call to the function processes <code>blockSize</code> samples through the filter. <code>pSrc</code> and <code>pDst</code> point to input and output arrays containing <code>blockSize</code> values.</p>
-<dl class="section user"><dt>Algorithm:</dt><dd><div class="image">
+<dl class="section user"><dt>Algorithm</dt><dd><div class="image">
 <img src="FIRLattice.gif" alt="FIRLattice.gif"/>
 <div class="caption">
 Finite Impulse Response Lattice filter</div></div>
- The following difference equation is implemented: <pre>
+ The following difference equation is implemented: </dd></dl>
+<dl class="section user"><dt></dt><dd><pre>
     f0[n] = g0[n] = x[n]
     fm[n] = fm-1[n] + km * gm-1[n-1] for m = 1, 2, ...M
     gm[n] = km * fm-1[n] + gm-1[n-1] for m = 1, 2, ...M
     y[n] = fM[n]
- </pre> </dd></dl>
+</pre> </dd></dl>
 <dl class="section user"><dt></dt><dd><code>pCoeffs</code> points to tha array of reflection coefficients of size <code>numStages</code>. Reflection Coefficients are stored in the following order. </dd></dl>
 <dl class="section user"><dt></dt><dd><pre>
     {k1, k2, ..., kM}
- </pre> where M is number of stages </dd></dl>
+</pre> where M is number of stages </dd></dl>
 <dl class="section user"><dt></dt><dd><code>pState</code> points to a state array of size <code>numStages</code>. The state variables (g values) hold previous inputs and are stored in the following order. <pre>
-    {g0[n], g1[n], g2[n] ...gM-1[n]}
- </pre> The state variables are updated after each block of data is processed; the coefficients are untouched. </dd></dl>
+  {g0[n], g1[n], g2[n] ...gM-1[n]}
+</pre> The state variables are updated after each block of data is processed; the coefficients are untouched.</dd></dl>
 <dl class="section user"><dt>Instance Structure</dt><dd>The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. There are separate instance structure declarations for each of the 3 supported data types.</dd></dl>
 <dl class="section user"><dt>Initialization Functions</dt><dd>There is also an associated initialization function for each data type. The initialization function performs the following operations:<ul>
 <li>Sets the values of the internal structure fields.</li>
-<li>Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numStages, pCoeffs, pState. Also set all of the values in pState to zero.</li>
+<li>Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numStages, pCoeffs, pState. Also set all of the values in pState to zero. </li>
 </ul>
 </dd></dl>
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-<a class="el" href="structarm__fir__lattice__instance__f32.html" title="Instance structure for the floating-point FIR lattice filter. ">arm_fir_lattice_instance_f32</a> S = {numStages, pState, pCoeffs};
-<a class="el" href="structarm__fir__lattice__instance__q31.html" title="Instance structure for the Q31 FIR lattice filter. ">arm_fir_lattice_instance_q31</a> S = {numStages, pState, pCoeffs};
-<a class="el" href="structarm__fir__lattice__instance__q15.html" title="Instance structure for the Q15 FIR lattice filter. ">arm_fir_lattice_instance_q15</a> S = {numStages, pState, pCoeffs};
- </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where <code>numStages</code> is the number of stages in the filter; <code>pState</code> is the address of the state buffer; <code>pCoeffs</code> is the address of the coefficient buffer. </dd></dl>
+    <a class="el" href="structarm__fir__lattice__instance__f32.html" title="Instance structure for the floating-point FIR lattice filter. ">arm_fir_lattice_instance_f32</a> S = {numStages, pState, pCoeffs};
+    <a class="el" href="structarm__fir__lattice__instance__q31.html" title="Instance structure for the Q31 FIR lattice filter. ">arm_fir_lattice_instance_q31</a> S = {numStages, pState, pCoeffs};
+    <a class="el" href="structarm__fir__lattice__instance__q15.html" title="Instance structure for the Q15 FIR lattice filter. ">arm_fir_lattice_instance_q15</a> S = {numStages, pState, pCoeffs};
+</pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>where <code>numStages</code> is the number of stages in the filter; <code>pState</code> is the address of the state buffer; <code>pCoeffs</code> is the address of the coefficient buffer.</dd></dl>
 <dl class="section user"><dt>Fixed-Point Behavior</dt><dd>Care must be taken when using the fixed-point versions of the FIR Lattice filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines. </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the floating-point FIR lattice structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the floating-point FIR lattice structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="structarm__fir__lattice__instance__f32.html#ad369bd9997a250f195254df37408a38f">arm_fir_lattice_instance_f32::numStages</a>, <a class="el" href="structarm__fir__lattice__instance__f32.html#a33bf5948c947f9ef80a99717cb0a0a43">arm_fir_lattice_instance_f32::pCoeffs</a>, and <a class="el" href="structarm__fir__lattice__instance__f32.html#ae348884a1ba9b83fadccd5da640cbcaf">arm_fir_lattice_instance_f32::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
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-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the floating-point FIR lattice structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numStages</td><td>number of filter stages. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the coefficient buffer. The array is of length numStages. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. The array is of length numStages. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the floating-point FIR lattice structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numStages</td><td>number of filter stages </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the coefficient buffer. The array is of length numStages </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer. The array is of length numStages </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="structarm__fir__lattice__instance__f32.html#ad369bd9997a250f195254df37408a38f">arm_fir_lattice_instance_f32::numStages</a>, <a class="el" href="structarm__fir__lattice__instance__f32.html#a33bf5948c947f9ef80a99717cb0a0a43">arm_fir_lattice_instance_f32::pCoeffs</a>, and <a class="el" href="structarm__fir__lattice__instance__f32.html#ae348884a1ba9b83fadccd5da640cbcaf">arm_fir_lattice_instance_f32::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
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+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q15 FIR lattice structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numStages</td><td>number of filter stages. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the coefficient buffer. The array is of length numStages. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. The array is of length numStages. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q15 FIR lattice structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numStages</td><td>number of filter stages </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the coefficient buffer. The array is of length numStages </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer. The array is of length numStages </td></tr>
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-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="structarm__fir__lattice__instance__q15.html#a38b179138d6a6c9cac4f8f79b6fd5357">arm_fir_lattice_instance_q15::numStages</a>, <a class="el" href="structarm__fir__lattice__instance__q15.html#a78f872826140069cf67836fff87360bc">arm_fir_lattice_instance_q15::pCoeffs</a>, and <a class="el" href="structarm__fir__lattice__instance__q15.html#a37b90dea2bc3ee7c9951a9fe74db0cbb">arm_fir_lattice_instance_q15::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
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-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q31 FIR lattice structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numStages</td><td>number of filter stages. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the coefficient buffer. The array is of length numStages. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. The array is of length numStages. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q31 FIR lattice structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numStages</td><td>number of filter stages </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the coefficient buffer. The array is of length numStages </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer. The array is of length numStages </td></tr>
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-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="structarm__fir__lattice__instance__q31.html#a9f3773bbb76bc5a8a5ee9d37786bf478">arm_fir_lattice_instance_q31::numStages</a>, <a class="el" href="structarm__fir__lattice__instance__q31.html#a66c3364bf5863cd45e05f1652c3dc522">arm_fir_lattice_instance_q31::pCoeffs</a>, and <a class="el" href="structarm__fir__lattice__instance__q31.html#a08fe9494ab7cd336b791e9657adadcf6">arm_fir_lattice_instance_q31::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
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+<p>Processing function for the Q15 FIR lattice filter.</p>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q15 FIR lattice structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q15 FIR lattice structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
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-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="structarm__fir__lattice__instance__q15.html#a38b179138d6a6c9cac4f8f79b6fd5357">arm_fir_lattice_instance_q15::numStages</a>, <a class="el" href="structarm__fir__lattice__instance__q15.html#a78f872826140069cf67836fff87360bc">arm_fir_lattice_instance_q15::pCoeffs</a>, and <a class="el" href="structarm__fir__lattice__instance__q15.html#a37b90dea2bc3ee7c9951a9fe74db0cbb">arm_fir_lattice_instance_q15::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
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-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q31 FIR lattice structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
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-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> In order to avoid overflows the input signal must be scaled down by 2*log2(numStages) bits. </p>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="structarm__fir__lattice__instance__q31.html#a9f3773bbb76bc5a8a5ee9d37786bf478">arm_fir_lattice_instance_q31::numStages</a>, <a class="el" href="structarm__fir__lattice__instance__q31.html#a66c3364bf5863cd45e05f1652c3dc522">arm_fir_lattice_instance_q31::pCoeffs</a>, and <a class="el" href="structarm__fir__lattice__instance__q31.html#a08fe9494ab7cd336b791e9657adadcf6">arm_fir_lattice_instance_q31::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>In order to avoid overflows the input signal must be scaled down by 2*log2(numStages) bits. </dd></dl>
 
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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+<tr class="separator:ga5e74f8f4e4df85de5feb4e62125ff590"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac3e43b06bff38ac8e62e145f88e9dbc7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#gac3e43b06bff38ac8e62e145f88e9dbc7">arm_fir_sparse_q15</a> (<a class="el" href="structarm__fir__sparse__instance__q15.html">arm_fir_sparse_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratchIn, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pScratchOut, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gac3e43b06bff38ac8e62e145f88e9dbc7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 sparse FIR filter.  <a href="#gac3e43b06bff38ac8e62e145f88e9dbc7">More...</a><br/></td></tr>
+<tr class="separator:gac3e43b06bff38ac8e62e145f88e9dbc7"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaba9f7ef4acf293034af42baa2fd3df52"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#gaba9f7ef4acf293034af42baa2fd3df52">arm_fir_sparse_q31</a> (<a class="el" href="structarm__fir__sparse__instance__q31.html">arm_fir_sparse_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pScratchIn, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaba9f7ef4acf293034af42baa2fd3df52"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 sparse FIR filter.  <a href="#gaba9f7ef4acf293034af42baa2fd3df52">More...</a><br/></td></tr>
+<tr class="separator:gaba9f7ef4acf293034af42baa2fd3df52"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga319b3d9032ba723a8efb819b9d2a3676"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__Sparse.html#ga319b3d9032ba723a8efb819b9d2a3676">arm_fir_sparse_q7</a> (<a class="el" href="structarm__fir__sparse__instance__q7.html">arm_fir_sparse_instance_q7</a> *S, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pScratchIn, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pScratchOut, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga319b3d9032ba723a8efb819b9d2a3676"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q7 sparse FIR filter.  <a href="#ga319b3d9032ba723a8efb819b9d2a3676">More...</a><br/></td></tr>
+<tr class="separator:ga319b3d9032ba723a8efb819b9d2a3676"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>This group of functions implements sparse FIR filters. Sparse FIR filters are equivalent to standard FIR filters except that most of the coefficients are equal to zero. Sparse filters are used for simulating reflections in communications and audio applications.</p>
 <p>There are separate functions for Q7, Q15, Q31, and floating-point data types. The functions operate on blocks of input and output data and each call to the function processes <code>blockSize</code> samples through the filter. <code>pSrc</code> and <code>pDst</code> points to input and output arrays respectively containing <code>blockSize</code> values.</p>
-<dl class="section user"><dt>Algorithm:</dt><dd>The sparse filter instant structure contains an array of tap indices <code>pTapDelay</code> which specifies the locations of the non-zero coefficients. This is in addition to the coefficient array <code>b</code>. The implementation essentially skips the multiplications by zero and leads to an efficient realization. <pre>
-     y[n] = b[0] * x[n-pTapDelay[0]] + b[1] * x[n-pTapDelay[1]] + b[2] * x[n-pTapDelay[2]] + ...+ b[numTaps-1] * x[n-pTapDelay[numTaps-1]]
- </pre> </dd></dl>
+<dl class="section user"><dt>Algorithm</dt><dd>The sparse filter instant structure contains an array of tap indices <code>pTapDelay</code> which specifies the locations of the non-zero coefficients. This is in addition to the coefficient array <code>b</code>. The implementation essentially skips the multiplications by zero and leads to an efficient realization. <pre>
+    y[n] = b[0] * x[n-pTapDelay[0]] + b[1] * x[n-pTapDelay[1]] + b[2] * x[n-pTapDelay[2]] + ...+ b[numTaps-1] * x[n-pTapDelay[numTaps-1]]
+</pre> </dd></dl>
 <dl class="section user"><dt></dt><dd><div class="image">
 <img src="FIRSparse.gif" alt="FIRSparse.gif"/>
 <div class="caption">
 Sparse FIR filter. b[n] represents the filter coefficients</div></div>
- </dd></dl>
+</dd></dl>
 <dl class="section user"><dt></dt><dd><code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>; <code>pTapDelay</code> points to an array of nonzero indices and is also of size <code>numTaps</code>; <code>pState</code> points to a state array of size <code>maxDelay + blockSize</code>, where <code>maxDelay</code> is the largest offset value that is ever used in the <code>pTapDelay</code> array. Some of the processing functions also require temporary working buffers.</dd></dl>
 <dl class="section user"><dt>Instance Structure</dt><dd>The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient and offset arrays may be shared among several instances while state variable arrays cannot be shared. There are separate instance structure declarations for each of the 4 supported data types.</dd></dl>
 <dl class="section user"><dt>Initialization Functions</dt><dd>There is also an associated initialization function for each data type. The initialization function performs the following operations:<ul>
 <li>Sets the values of the internal structure fields.</li>
-<li>Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numTaps, pCoeffs, pTapDelay, maxDelay, stateIndex, pState. Also set all of the values in pState to zero.</li>
+<li>Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numTaps, pCoeffs, pTapDelay, maxDelay, stateIndex, pState. Also set all of the values in pState to zero. </li>
 </ul>
 </dd></dl>
 <dl class="section user"><dt></dt><dd>Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. The code below statically initializes each of the 4 different data type filter instance structures <pre>
-<a class="el" href="structarm__fir__sparse__instance__f32.html" title="Instance structure for the floating-point sparse FIR filter. ">arm_fir_sparse_instance_f32</a> S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
-<a class="el" href="structarm__fir__sparse__instance__q31.html" title="Instance structure for the Q31 sparse FIR filter. ">arm_fir_sparse_instance_q31</a> S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
-<a class="el" href="structarm__fir__sparse__instance__q15.html" title="Instance structure for the Q15 sparse FIR filter. ">arm_fir_sparse_instance_q15</a> S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
-<a class="el" href="structarm__fir__sparse__instance__q7.html" title="Instance structure for the Q7 sparse FIR filter. ">arm_fir_sparse_instance_q7</a> S =  {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
- </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd></dd></dl>
+    <a class="el" href="structarm__fir__sparse__instance__f32.html" title="Instance structure for the floating-point sparse FIR filter. ">arm_fir_sparse_instance_f32</a> S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
+    <a class="el" href="structarm__fir__sparse__instance__q31.html" title="Instance structure for the Q31 sparse FIR filter. ">arm_fir_sparse_instance_q31</a> S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
+    <a class="el" href="structarm__fir__sparse__instance__q15.html" title="Instance structure for the Q15 sparse FIR filter. ">arm_fir_sparse_instance_q15</a> S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
+    <a class="el" href="structarm__fir__sparse__instance__q7.html" title="Instance structure for the Q7 sparse FIR filter. ">arm_fir_sparse_instance_q7</a> S =  {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
+</pre></dd></dl>
 <dl class="section user"><dt>Fixed-Point Behavior</dt><dd>Care must be taken when using the fixed-point versions of the sparse FIR filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines. </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga23a9284de5ee39406713b91d18ac8838"></a>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
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 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the floating-point sparse FIR structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pScratchIn</td><td>points to a temporary buffer of size blockSize. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the floating-point sparse FIR structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pScratchIn</td><td>points to a temporary buffer of size blockSize </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#af4d2359037b7360329ef9dd6836d1353">arm_circularRead_f32()</a>, <a class="el" href="arm__math_8h.html#a87c6129c7f1a7e7b205339054d3ffed7">arm_circularWrite_f32()</a>, <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="structarm__fir__sparse__instance__f32.html#af8b8c775f4084c36774f06c082b4c078">arm_fir_sparse_instance_f32::maxDelay</a>, <a class="el" href="structarm__fir__sparse__instance__f32.html#a5e19e7f234ac30a3db843352bf2a8515">arm_fir_sparse_instance_f32::numTaps</a>, <a class="el" href="structarm__fir__sparse__instance__f32.html#a04af7c738dfb0882ad102fcad501d94a">arm_fir_sparse_instance_f32::pCoeffs</a>, <a class="el" href="structarm__fir__sparse__instance__f32.html#a794af0916666d11cc564d6df08553555">arm_fir_sparse_instance_f32::pState</a>, <a class="el" href="structarm__fir__sparse__instance__f32.html#aaa54ae67e5d10c6dd0d697945c638d31">arm_fir_sparse_instance_f32::pTapDelay</a>, and <a class="el" href="structarm__fir__sparse__instance__f32.html#a57585aeca9dc8686e08df2865375a86d">arm_fir_sparse_instance_f32::stateIndex</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pCoeffs</em>, </td>
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         <tr>
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 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the floating-point sparse FIR structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of nonzero coefficients in the filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the array of filter coefficients. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pTapDelay</td><td>points to the array of offset times. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">maxDelay</td><td>maximum offset time supported. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples that will be processed per block. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the floating-point sparse FIR structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of nonzero coefficients in the filter </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the array of filter coefficients </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pTapDelay</td><td>points to the array of offset times </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">maxDelay</td><td>maximum offset time supported </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples that will be processed per block </td></tr>
   </table>
   </dd>
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
-<p><b>Description:</b> </p>
-<dl class="section user"><dt></dt><dd><code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>. <code>pState</code> holds the filter's state variables and must be of length <code>maxDelay + blockSize</code>, where <code>maxDelay</code> is the maximum number of delay line values. <code>blockSize</code> is the number of samples processed by the <code><a class="el" href="group__FIR__Sparse.html#ga23a9284de5ee39406713b91d18ac8838" title="Processing function for the floating-point sparse FIR filter. ">arm_fir_sparse_f32()</a></code> function. </dd></dl>
-
-<p>References <a class="el" href="structarm__fir__sparse__instance__f32.html#af8b8c775f4084c36774f06c082b4c078">arm_fir_sparse_instance_f32::maxDelay</a>, <a class="el" href="structarm__fir__sparse__instance__f32.html#a5e19e7f234ac30a3db843352bf2a8515">arm_fir_sparse_instance_f32::numTaps</a>, <a class="el" href="structarm__fir__sparse__instance__f32.html#a04af7c738dfb0882ad102fcad501d94a">arm_fir_sparse_instance_f32::pCoeffs</a>, <a class="el" href="structarm__fir__sparse__instance__f32.html#a794af0916666d11cc564d6df08553555">arm_fir_sparse_instance_f32::pState</a>, <a class="el" href="structarm__fir__sparse__instance__f32.html#aaa54ae67e5d10c6dd0d697945c638d31">arm_fir_sparse_instance_f32::pTapDelay</a>, and <a class="el" href="structarm__fir__sparse__instance__f32.html#a57585aeca9dc8686e08df2865375a86d">arm_fir_sparse_instance_f32::stateIndex</a>.</p>
+<dl class="section user"><dt>Details</dt><dd><code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>. <code>pState</code> holds the filter's state variables and must be of length <code>maxDelay + blockSize</code>, where <code>maxDelay</code> is the maximum number of delay line values. <code>blockSize</code> is the number of samples processed by the <code><a class="el" href="group__FIR__Sparse.html#gac6817bc86974b7121c3288fce25dbc5f" title="Processing function for the floating-point sparse FIR filter. ">arm_fir_sparse_f32()</a></code> function. </dd></dl>
 
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pCoeffs</em>, </td>
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 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q15 sparse FIR structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of nonzero coefficients in the filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the array of filter coefficients. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pTapDelay</td><td>points to the array of offset times. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">maxDelay</td><td>maximum offset time supported. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples that will be processed per block. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q15 sparse FIR structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of nonzero coefficients in the filter </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the array of filter coefficients </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pTapDelay</td><td>points to the array of offset times </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">maxDelay</td><td>maximum offset time supported </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples that will be processed per block </td></tr>
   </table>
   </dd>
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
-<p><b>Description:</b> </p>
-<dl class="section user"><dt></dt><dd><code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>. <code>pState</code> holds the filter's state variables and must be of length <code>maxDelay + blockSize</code>, where <code>maxDelay</code> is the maximum number of delay line values. <code>blockSize</code> is the number of words processed by <code><a class="el" href="group__FIR__Sparse.html#ga2bffda2e156e72427e19276cd9c3d3cc" title="Processing function for the Q15 sparse FIR filter. ">arm_fir_sparse_q15()</a></code> function. </dd></dl>
-
-<p>References <a class="el" href="structarm__fir__sparse__instance__q15.html#ad14cc1070eecf7e1926d8f67a8273182">arm_fir_sparse_instance_q15::maxDelay</a>, <a class="el" href="structarm__fir__sparse__instance__q15.html#a0f66b126dd8b85f7467cfb01b7bc4d77">arm_fir_sparse_instance_q15::numTaps</a>, <a class="el" href="structarm__fir__sparse__instance__q15.html#a78a6565473b5f0b8c77c3f0f58a76069">arm_fir_sparse_instance_q15::pCoeffs</a>, <a class="el" href="structarm__fir__sparse__instance__q15.html#a98b92b0f5208110129b9a67b1db90408">arm_fir_sparse_instance_q15::pState</a>, <a class="el" href="structarm__fir__sparse__instance__q15.html#aeab2855176c6efdb231a73a3672837d5">arm_fir_sparse_instance_q15::pTapDelay</a>, and <a class="el" href="structarm__fir__sparse__instance__q15.html#a89487f28cab52637426024005e478985">arm_fir_sparse_instance_q15::stateIndex</a>.</p>
+<dl class="section user"><dt>Details</dt><dd><code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>. <code>pState</code> holds the filter's state variables and must be of length <code>maxDelay + blockSize</code>, where <code>maxDelay</code> is the maximum number of delay line values. <code>blockSize</code> is the number of words processed by <code><a class="el" href="group__FIR__Sparse.html#gac3e43b06bff38ac8e62e145f88e9dbc7" title="Processing function for the Q15 sparse FIR filter. ">arm_fir_sparse_q15()</a></code> function. </dd></dl>
 
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pCoeffs</em>, </td>
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 <dl class="params"><dt>Parameters</dt><dd>
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-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q31 sparse FIR structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of nonzero coefficients in the filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the array of filter coefficients. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pTapDelay</td><td>points to the array of offset times. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">maxDelay</td><td>maximum offset time supported. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples that will be processed per block. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q31 sparse FIR structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of nonzero coefficients in the filter </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the array of filter coefficients </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pTapDelay</td><td>points to the array of offset times </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">maxDelay</td><td>maximum offset time supported </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples that will be processed per block </td></tr>
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   </dd>
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 <dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
-<p><b>Description:</b> </p>
-<dl class="section user"><dt></dt><dd><code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>. <code>pState</code> holds the filter's state variables and must be of length <code>maxDelay + blockSize</code>, where <code>maxDelay</code> is the maximum number of delay line values. <code>blockSize</code> is the number of words processed by <code><a class="el" href="group__FIR__Sparse.html#ga03e9c2f0f35ad67d20bac66be9f920ec" title="Processing function for the Q31 sparse FIR filter. ">arm_fir_sparse_q31()</a></code> function. </dd></dl>
-
-<p>References <a class="el" href="structarm__fir__sparse__instance__q31.html#afdd3a1dc72132c854dc379154b68b674">arm_fir_sparse_instance_q31::maxDelay</a>, <a class="el" href="structarm__fir__sparse__instance__q31.html#a07b6c01e58ec6dde384719130d36b0dc">arm_fir_sparse_instance_q31::numTaps</a>, <a class="el" href="structarm__fir__sparse__instance__q31.html#a093d6227f0d1597982cd083fb126f4e0">arm_fir_sparse_instance_q31::pCoeffs</a>, <a class="el" href="structarm__fir__sparse__instance__q31.html#a830be89daa5a393b225048889aa045d1">arm_fir_sparse_instance_q31::pState</a>, <a class="el" href="structarm__fir__sparse__instance__q31.html#ab87ae457adec8f727afefaa2599fc983">arm_fir_sparse_instance_q31::pTapDelay</a>, and <a class="el" href="structarm__fir__sparse__instance__q31.html#a557ed9d477e76e4ad2019344f19f568a">arm_fir_sparse_instance_q31::stateIndex</a>.</p>
+<dl class="section user"><dt>Details</dt><dd><code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>. <code>pState</code> holds the filter's state variables and must be of length <code>maxDelay + blockSize</code>, where <code>maxDelay</code> is the maximum number of delay line values. <code>blockSize</code> is the number of words processed by <code><a class="el" href="group__FIR__Sparse.html#gaba9f7ef4acf293034af42baa2fd3df52" title="Processing function for the Q31 sparse FIR filter. ">arm_fir_sparse_q31()</a></code> function. </dd></dl>
 
 </div>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
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-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q7 sparse FIR structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of nonzero coefficients in the filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the array of filter coefficients. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pTapDelay</td><td>points to the array of offset times. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">maxDelay</td><td>maximum offset time supported. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples that will be processed per block. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q7 sparse FIR structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of nonzero coefficients in the filter </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the array of filter coefficients </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pTapDelay</td><td>points to the array of offset times </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">maxDelay</td><td>maximum offset time supported </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples that will be processed per block </td></tr>
   </table>
   </dd>
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
-<p><b>Description:</b> </p>
-<dl class="section user"><dt></dt><dd><code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>. <code>pState</code> holds the filter's state variables and must be of length <code>maxDelay + blockSize</code>, where <code>maxDelay</code> is the maximum number of delay line values. <code>blockSize</code> is the number of samples processed by the <code><a class="el" href="group__FIR__Sparse.html#gae86c145efc2d9ec32dc6d8c1ad2ccb3c" title="Processing function for the Q7 sparse FIR filter. ">arm_fir_sparse_q7()</a></code> function. </dd></dl>
-
-<p>References <a class="el" href="structarm__fir__sparse__instance__q7.html#af74dacc1d34c078283e50f2530eb91df">arm_fir_sparse_instance_q7::maxDelay</a>, <a class="el" href="structarm__fir__sparse__instance__q7.html#a54cdd27ca1c672b126c38763ce678b1c">arm_fir_sparse_instance_q7::numTaps</a>, <a class="el" href="structarm__fir__sparse__instance__q7.html#a3dac86f15e33553e8f3e19e0d712bae5">arm_fir_sparse_instance_q7::pCoeffs</a>, <a class="el" href="structarm__fir__sparse__instance__q7.html#a18072cf3ef3666d588f0d49512f2b28f">arm_fir_sparse_instance_q7::pState</a>, <a class="el" href="structarm__fir__sparse__instance__q7.html#ac625393c84bc0342ffdf26fc4eba1ac1">arm_fir_sparse_instance_q7::pTapDelay</a>, and <a class="el" href="structarm__fir__sparse__instance__q7.html#a2d2e65473fe3a3f2b953b4e0b60824df">arm_fir_sparse_instance_q7::stateIndex</a>.</p>
+<dl class="section user"><dt>Details</dt><dd><code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>. <code>pState</code> holds the filter's state variables and must be of length <code>maxDelay + blockSize</code>, where <code>maxDelay</code> is the maximum number of delay line values. <code>blockSize</code> is the number of samples processed by the <code><a class="el" href="group__FIR__Sparse.html#ga319b3d9032ba723a8efb819b9d2a3676" title="Processing function for the Q7 sparse FIR filter. ">arm_fir_sparse_q7()</a></code> function. </dd></dl>
 
 </div>
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-<a class="anchor" id="ga2bffda2e156e72427e19276cd9c3d3cc"></a>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
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 <dl class="params"><dt>Parameters</dt><dd>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q15 sparse FIR structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pScratchIn</td><td>points to a temporary buffer of size blockSize. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pScratchOut</td><td>points to a temporary buffer of size blockSize. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q15 sparse FIR structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pScratchIn</td><td>points to a temporary buffer of size blockSize </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pScratchOut</td><td>points to a temporary buffer of size blockSize </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call </td></tr>
   </table>
   </dd>
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-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using an internal 32-bit accumulator. The 1.15 x 1.15 multiplications yield a 2.30 result and these are added to a 2.30 accumulator. Thus the full precision of the multiplications is maintained but there is only a single guard bit in the accumulator. If the accumulator result overflows it will wrap around rather than saturate. After all multiply-accumulates are performed, the 2.30 accumulator is truncated to 2.15 format and then saturated to 1.15 format. In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a98eb923fe8c64909897c31d6b9f69bff">arm_circularRead_q15()</a>, <a class="el" href="arm__math_8h.html#a885325c33991f03743a9d9b06868a099">arm_circularWrite_q15()</a>, <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="structarm__fir__sparse__instance__q15.html#ad14cc1070eecf7e1926d8f67a8273182">arm_fir_sparse_instance_q15::maxDelay</a>, <a class="el" href="structarm__fir__sparse__instance__q15.html#a0f66b126dd8b85f7467cfb01b7bc4d77">arm_fir_sparse_instance_q15::numTaps</a>, <a class="el" href="structarm__fir__sparse__instance__q15.html#a78a6565473b5f0b8c77c3f0f58a76069">arm_fir_sparse_instance_q15::pCoeffs</a>, <a class="el" href="structarm__fir__sparse__instance__q15.html#a98b92b0f5208110129b9a67b1db90408">arm_fir_sparse_instance_q15::pState</a>, <a class="el" href="structarm__fir__sparse__instance__q15.html#aeab2855176c6efdb231a73a3672837d5">arm_fir_sparse_instance_q15::pTapDelay</a>, and <a class="el" href="structarm__fir__sparse__instance__q15.html#a89487f28cab52637426024005e478985">arm_fir_sparse_instance_q15::stateIndex</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 32-bit accumulator. The 1.15 x 1.15 multiplications yield a 2.30 result and these are added to a 2.30 accumulator. Thus the full precision of the multiplications is maintained but there is only a single guard bit in the accumulator. If the accumulator result overflows it will wrap around rather than saturate. After all multiply-accumulates are performed, the 2.30 accumulator is truncated to 2.15 format and then saturated to 1.15 format. In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits. </dd></dl>
 
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
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 <dl class="params"><dt>Parameters</dt><dd>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q31 sparse FIR structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pScratchIn</td><td>points to a temporary buffer of size blockSize. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q31 sparse FIR structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pScratchIn</td><td>points to a temporary buffer of size blockSize </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process </td></tr>
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   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using an internal 32-bit accumulator. The 1.31 x 1.31 multiplications are truncated to 2.30 format. This leads to loss of precision on the intermediate multiplications and provides only a single guard bit. If the accumulator result overflows, it wraps around rather than saturate. In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#af4d2359037b7360329ef9dd6836d1353">arm_circularRead_f32()</a>, <a class="el" href="arm__math_8h.html#a87c6129c7f1a7e7b205339054d3ffed7">arm_circularWrite_f32()</a>, <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="structarm__fir__sparse__instance__q31.html#afdd3a1dc72132c854dc379154b68b674">arm_fir_sparse_instance_q31::maxDelay</a>, <a class="el" href="structarm__fir__sparse__instance__q31.html#a07b6c01e58ec6dde384719130d36b0dc">arm_fir_sparse_instance_q31::numTaps</a>, <a class="el" href="structarm__fir__sparse__instance__q31.html#a093d6227f0d1597982cd083fb126f4e0">arm_fir_sparse_instance_q31::pCoeffs</a>, <a class="el" href="structarm__fir__sparse__instance__q31.html#a830be89daa5a393b225048889aa045d1">arm_fir_sparse_instance_q31::pState</a>, <a class="el" href="structarm__fir__sparse__instance__q31.html#ab87ae457adec8f727afefaa2599fc983">arm_fir_sparse_instance_q31::pTapDelay</a>, and <a class="el" href="structarm__fir__sparse__instance__q31.html#a557ed9d477e76e4ad2019344f19f568a">arm_fir_sparse_instance_q31::stateIndex</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 32-bit accumulator. The 1.31 x 1.31 multiplications are truncated to 2.30 format. This leads to loss of precision on the intermediate multiplications and provides only a single guard bit. If the accumulator result overflows, it wraps around rather than saturate. In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits. </dd></dl>
 
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-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q7 sparse FIR structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data </td></tr>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q7 sparse FIR structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pScratchIn</td><td>points to a temporary buffer of size blockSize </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pScratchOut</td><td>points to a temporary buffer of size blockSize </td></tr>
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-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 32-bit internal accumulator. Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. The accumulator is then converted to 18.7 format by discarding the low 7 bits. Finally, the result is truncated to 1.7 format. </dd></dl>
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+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 32-bit internal accumulator. Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. The accumulator is then converted to 18.7 format by discarding the low 7 bits. Finally, the result is truncated to 1.7 format. </dd></dl>
 
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-<tr class="memdesc:ga3f434c9a5d3b4e68061feac0714ea2ac"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.  <a href="#ga3f434c9a5d3b4e68061feac0714ea2ac">More...</a><br/></td></tr>
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+<tr class="separator:gab9402a0d9b0fffc0b50083a7d56c5905"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab43fa1edb45d3b2e875dc8cd381770cc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#gab43fa1edb45d3b2e875dc8cd381770cc">arm_fir_decimate_fast_q15</a> (const <a class="el" href="structarm__fir__decimate__instance__q15.html">arm_fir_decimate_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gab43fa1edb45d3b2e875dc8cd381770cc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 FIR decimator (fast variant).  <a href="#gab43fa1edb45d3b2e875dc8cd381770cc">More...</a><br/></td></tr>
+<tr class="separator:gab43fa1edb45d3b2e875dc8cd381770cc"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac03b837d289c8bc4a86a34a89e44afdf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#gac03b837d289c8bc4a86a34a89e44afdf">arm_fir_decimate_fast_q31</a> (const <a class="el" href="structarm__fir__decimate__instance__q31.html">arm_fir_decimate_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gac03b837d289c8bc4a86a34a89e44afdf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 FIR decimator (fast variant).  <a href="#gac03b837d289c8bc4a86a34a89e44afdf">More...</a><br/></td></tr>
+<tr class="separator:gac03b837d289c8bc4a86a34a89e44afdf"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga67c80582fc296552fef2bd1f208d853b"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#ga67c80582fc296552fef2bd1f208d853b">arm_fir_decimate_init_f32</a> (<a class="el" href="structarm__fir__decimate__instance__f32.html">arm_fir_decimate_instance_f32</a> *S, uint16_t numTaps, uint8_t M, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga67c80582fc296552fef2bd1f208d853b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point FIR decimator.  <a href="#ga67c80582fc296552fef2bd1f208d853b">More...</a><br/></td></tr>
+<tr class="separator:ga67c80582fc296552fef2bd1f208d853b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga3b01ec9df00d759f79c934b239cead73"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#ga3b01ec9df00d759f79c934b239cead73">arm_fir_decimate_init_q15</a> (<a class="el" href="structarm__fir__decimate__instance__q15.html">arm_fir_decimate_instance_q15</a> *S, uint16_t numTaps, uint8_t M, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga3b01ec9df00d759f79c934b239cead73"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q15 FIR decimator.  <a href="#ga3b01ec9df00d759f79c934b239cead73">More...</a><br/></td></tr>
+<tr class="separator:ga3b01ec9df00d759f79c934b239cead73"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga6a19d62083e85b3f5e34e8a8283c1ea0"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#ga6a19d62083e85b3f5e34e8a8283c1ea0">arm_fir_decimate_init_q31</a> (<a class="el" href="structarm__fir__decimate__instance__q31.html">arm_fir_decimate_instance_q31</a> *S, uint16_t numTaps, uint8_t M, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga6a19d62083e85b3f5e34e8a8283c1ea0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 FIR decimator.  <a href="#ga6a19d62083e85b3f5e34e8a8283c1ea0">More...</a><br/></td></tr>
+<tr class="separator:ga6a19d62083e85b3f5e34e8a8283c1ea0"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga262636462d9e24dab67ec792160afcbf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#ga262636462d9e24dab67ec792160afcbf">arm_fir_decimate_q15</a> (const <a class="el" href="structarm__fir__decimate__instance__q15.html">arm_fir_decimate_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga262636462d9e24dab67ec792160afcbf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 FIR decimator.  <a href="#ga262636462d9e24dab67ec792160afcbf">More...</a><br/></td></tr>
+<tr class="separator:ga262636462d9e24dab67ec792160afcbf"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga27c05d7892f8a327aab86fbfee9b0f29"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__FIR__decimate.html#ga27c05d7892f8a327aab86fbfee9b0f29">arm_fir_decimate_q31</a> (const <a class="el" href="structarm__fir__decimate__instance__q31.html">arm_fir_decimate_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga27c05d7892f8a327aab86fbfee9b0f29"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 FIR decimator.  <a href="#ga27c05d7892f8a327aab86fbfee9b0f29">More...</a><br/></td></tr>
+<tr class="separator:ga27c05d7892f8a327aab86fbfee9b0f29"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>These functions combine an FIR filter together with a decimator. They are used in multirate systems for reducing the sample rate of a signal without introducing aliasing distortion. Conceptually, the functions are equivalent to the block diagram below: </p>
@@ -151,31 +151,31 @@
 <p>The FIR decimator functions provided in the CMSIS DSP Library combine the FIR filter and the decimator in an efficient manner. Instead of calculating all of the FIR filter outputs and discarding <code>M-1</code> out of every <code>M</code>, only the samples output by the decimator are computed. The functions operate on blocks of input and output data. <code>pSrc</code> points to an array of <code>blockSize</code> input values and <code>pDst</code> points to an array of <code>blockSize/M</code> output values. In order to have an integer number of output samples <code>blockSize</code> must always be a multiple of the decimation factor <code>M</code>.</p>
 <p>The library provides separate functions for Q15, Q31 and floating-point data types.</p>
 <dl class="section user"><dt>Algorithm:</dt><dd>The FIR portion of the algorithm uses the standard form filter: <pre>
-    y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
+     y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
  </pre> where, <code>b[n]</code> are the filter coefficients. </dd></dl>
 <dl class="section user"><dt></dt><dd>The <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>. Coefficients are stored in time reversed order. </dd></dl>
 <dl class="section user"><dt></dt><dd><pre>
-    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
  </pre> </dd></dl>
 <dl class="section user"><dt></dt><dd><code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>. Samples in the state buffer are stored in the order: </dd></dl>
 <dl class="section user"><dt></dt><dd><pre>
-    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
+     {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
  </pre> The state variables are updated after each block of data is processed, the coefficients are untouched.</dd></dl>
 <dl class="section user"><dt>Instance Structure</dt><dd>The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable array should be allocated separately. There are separate instance structure declarations for each of the 3 supported data types.</dd></dl>
 <dl class="section user"><dt>Initialization Functions</dt><dd>There is also an associated initialization function for each data type. The initialization function performs the following operations:<ul>
 <li>Sets the values of the internal structure fields.</li>
 <li>Zeros out the values in the state buffer.</li>
-<li>Checks to make sure that the size of the input is a multiple of the decimation factor. To do this manually without calling the init function, assign the follow subfields of the instance structure: numTaps, pCoeffs, M (decimation factor), pState. Also set all of the values in pState to zero.</li>
+<li>Checks to make sure that the size of the input is a multiple of the decimation factor. To do this manually without calling the init function, assign the follow subfields of the instance structure: numTaps, pCoeffs, M (decimation factor), pState. Also set all of the values in pState to zero. </li>
 </ul>
 </dd></dl>
 <dl class="section user"><dt></dt><dd>Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. The code below statically initializes each of the 3 different data type filter instance structures <pre>
-<a class="el" href="structarm__fir__decimate__instance__f32.html" title="Instance structure for the floating-point FIR decimator. ">arm_fir_decimate_instance_f32</a> S = {M, numTaps, pCoeffs, pState};
-<a class="el" href="structarm__fir__decimate__instance__q31.html" title="Instance structure for the Q31 FIR decimator. ">arm_fir_decimate_instance_q31</a> S = {M, numTaps, pCoeffs, pState};
-<a class="el" href="structarm__fir__decimate__instance__q15.html" title="Instance structure for the Q15 FIR decimator. ">arm_fir_decimate_instance_q15</a> S = {M, numTaps, pCoeffs, pState};
+     <a class="el" href="structarm__fir__decimate__instance__f32.html" title="Instance structure for floating-point FIR decimator. ">arm_fir_decimate_instance_f32</a> S = {M, numTaps, pCoeffs, pState};
+     <a class="el" href="structarm__fir__decimate__instance__q31.html" title="Instance structure for the Q31 FIR decimator. ">arm_fir_decimate_instance_q31</a> S = {M, numTaps, pCoeffs, pState};
+     <a class="el" href="structarm__fir__decimate__instance__q15.html" title="Instance structure for the Q15 FIR decimator. ">arm_fir_decimate_instance_q15</a> S = {M, numTaps, pCoeffs, pState};
  </pre> where <code>M</code> is the decimation factor; <code>numTaps</code> is the number of filter coefficients in the filter; <code>pCoeffs</code> is the address of the coefficient buffer; <code>pState</code> is the address of the state buffer. Be sure to set the values in the state buffer to zeros when doing static initialization.</dd></dl>
 <dl class="section user"><dt>Fixed-Point Behavior</dt><dd>Care must be taken when using the fixed-point versions of the FIR decimate filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines. </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga25aa3d58a90bf91b6a82272a0bc518f7"></a>
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         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -212,20 +212,18 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the floating-point FIR decimator structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the floating-point FIR decimator structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="structarm__fir__decimate__instance__f32.html#a76a8b2161731638eb3d67f277919f95d">arm_fir_decimate_instance_f32::M</a>, <a class="el" href="structarm__fir__decimate__instance__f32.html#a2aa2986129db8affef03ede88dd45a03">arm_fir_decimate_instance_f32::numTaps</a>, <a class="el" href="structarm__fir__decimate__instance__f32.html#a268a8b0e80a3d9764baf33e4bc10dde2">arm_fir_decimate_instance_f32::pCoeffs</a>, and <a class="el" href="structarm__fir__decimate__instance__f32.html#a5bddf29aaaf2011d2e3bcec59a83f633">arm_fir_decimate_instance_f32::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga3f434c9a5d3b4e68061feac0714ea2ac"></a>
+<a class="anchor" id="gab43fa1edb45d3b2e875dc8cd381770cc"></a>
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@@ -238,7 +236,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -260,39 +258,36 @@
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q15 FIR decimator structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q15 FIR decimator structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call </td></tr>
   </table>
   </dd>
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
-<dl class="section user"><dt>Restrictions</dt><dd>If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, state buffers should be aligned by 32-bit</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (log2 is read as log to the base 2). The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.</dd></dl>
-<dl class="section user"><dt></dt><dd>Refer to the function <code><a class="el" href="group__FIR__decimate.html#gab8bef6d0f6a26fdbfce9485727713ce5" title="Processing function for the Q15 FIR decimator. ">arm_fir_decimate_q15()</a></code> for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure. Use the function <code><a class="el" href="group__FIR__decimate.html#gada660e54b93d5d32178c6f5e1c6f368d" title="Initialization function for the Q15 FIR decimator. ">arm_fir_decimate_init_q15()</a></code> to initialize the filter structure. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#aa611fdbf6c56c46553701d6596a79aaf">__SMLAD()</a>, <a class="el" href="structarm__fir__decimate__instance__q15.html#aad9320284218b3aa378527ea518cf093">arm_fir_decimate_instance_q15::M</a>, <a class="el" href="structarm__fir__decimate__instance__q15.html#ac1e9844488ec717da334fbd4c4f41990">arm_fir_decimate_instance_q15::numTaps</a>, <a class="el" href="structarm__fir__decimate__instance__q15.html#a01cacab67e73945e8289075598ede14d">arm_fir_decimate_instance_q15::pCoeffs</a>, and <a class="el" href="structarm__fir__decimate__instance__q15.html#a3f7b5184bb28853ef401b001df121047">arm_fir_decimate_instance_q15::pState</a>.</p>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (log2 is read as log to the base 2). The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result. </dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__FIR__decimate.html#ga262636462d9e24dab67ec792160afcbf">arm_fir_decimate_q15()</a> for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure. Use function <a class="el" href="group__FIR__decimate.html#ga3b01ec9df00d759f79c934b239cead73">arm_fir_decimate_init_q15()</a> to initialize the filter structure. </dd></dl>
 
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           <td class="memname">void arm_fir_decimate_fast_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="structarm__fir__decimate__instance__q31.html">arm_fir_decimate_instance_q31</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="structarm__fir__decimate__instance__q31.html">arm_fir_decimate_instance_q31</a> *&#160;</td>
           <td class="paramname"><em>S</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -314,25 +309,23 @@
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q31 FIR decimator structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q31 FIR decimator structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are added to a 2.30 accumulator. Finally, the accumulator is saturated and converted to a 1.31 result. The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).</dd></dl>
-<dl class="section user"><dt></dt><dd>Refer to the function <code><a class="el" href="group__FIR__decimate.html#gaef8e86add28f15fdc5ecc484e9dd7a4e" title="Processing function for the Q31 FIR decimator. ">arm_fir_decimate_q31()</a></code> for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision. Both the slow and the fast versions use the same instance structure. Use the function <code><a class="el" href="group__FIR__decimate.html#ga9ed47c4e0f58affa935d84e0508a7f39" title="Initialization function for the Q31 FIR decimator. ">arm_fir_decimate_init_q31()</a></code> to initialize the filter structure. </dd></dl>
-
-<p>References <a class="el" href="structarm__fir__decimate__instance__q31.html#ad3d6936c36303b30dd38f1eddf248ae5">arm_fir_decimate_instance_q31::M</a>, <a class="el" href="structarm__fir__decimate__instance__q31.html#a37915d42b0dc5e3057ebe83110798482">arm_fir_decimate_instance_q31::numTaps</a>, <a class="el" href="structarm__fir__decimate__instance__q31.html#a030d0391538c2481c5b348fd09a952ff">arm_fir_decimate_instance_q31::pCoeffs</a>, and <a class="el" href="structarm__fir__decimate__instance__q31.html#a0ef0ef9e265f7ab873cfc6daa7593fdb">arm_fir_decimate_instance_q31::pState</a>.</p>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are added to a 2.30 accumulator. Finally, the accumulator is saturated and converted to a 1.31 result. The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__FIR__decimate.html#ga27c05d7892f8a327aab86fbfee9b0f29">arm_fir_decimate_q31()</a> for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision. Both the slow and the fast versions use the same instance structure. Use function <a class="el" href="group__FIR__decimate.html#ga6a19d62083e85b3f5e34e8a8283c1ea0">arm_fir_decimate_init_q31()</a> to initialize the filter structure. </dd></dl>
 
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           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pCoeffs</em>, </td>
         </tr>
         <tr>
@@ -381,27 +374,28 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the floating-point FIR decimator structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of coefficients in the filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">M</td><td>decimation factor. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the filter coefficients. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the floating-point FIR decimator structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of coefficients in the filter </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">M</td><td>decimation factor </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the filter coefficients </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if <code>blockSize</code> is not a multiple of <code>M</code>.</dd></dl>
-<p><b>Description:</b> </p>
-<dl class="section user"><dt></dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
-   {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9ae74d7f8a53aec0512ae8f0a421e0e1">ARM_MATH_LENGTH_ERROR</a> : <code>blockSize</code> is not a multiple of <code>M</code></li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Details</dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
+    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
 </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd><code>pState</code> points to the array of state variables. <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples passed to <code><a class="el" href="group__FIR__decimate.html#ga25aa3d58a90bf91b6a82272a0bc518f7" title="Processing function for the floating-point FIR decimator. ">arm_fir_decimate_f32()</a></code>. <code>M</code> is the decimation factor. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9ae74d7f8a53aec0512ae8f0a421e0e1">ARM_MATH_LENGTH_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__fir__decimate__instance__f32.html#a76a8b2161731638eb3d67f277919f95d">arm_fir_decimate_instance_f32::M</a>, <a class="el" href="structarm__fir__decimate__instance__f32.html#a2aa2986129db8affef03ede88dd45a03">arm_fir_decimate_instance_f32::numTaps</a>, <a class="el" href="structarm__fir__decimate__instance__f32.html#a268a8b0e80a3d9764baf33e4bc10dde2">arm_fir_decimate_instance_f32::pCoeffs</a>, <a class="el" href="structarm__fir__decimate__instance__f32.html#a5bddf29aaaf2011d2e3bcec59a83f633">arm_fir_decimate_instance_f32::pState</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section user"><dt></dt><dd><code>pState</code> points to the array of state variables. <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples passed to <code><a class="el" href="group__FIR__decimate.html#gab9402a0d9b0fffc0b50083a7d56c5905" title="Processing function for floating-point FIR decimator. ">arm_fir_decimate_f32()</a></code>. <code>M</code> is the decimation factor. </dd></dl>
 
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           <td class="paramkey"></td>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pCoeffs</em>, </td>
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@@ -450,27 +444,28 @@
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 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q15 FIR decimator structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of coefficients in the filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">M</td><td>decimation factor. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the filter coefficients. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q15 FIR decimator structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of coefficients in the filter </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">M</td><td>decimation factor </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the filter coefficients </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if <code>blockSize</code> is not a multiple of <code>M</code>.</dd></dl>
-<p><b>Description:</b> </p>
-<dl class="section user"><dt></dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
-   {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9ae74d7f8a53aec0512ae8f0a421e0e1">ARM_MATH_LENGTH_ERROR</a> : <code>blockSize</code> is not a multiple of <code>M</code></li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Details</dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
+    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
 </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd><code>pState</code> points to the array of state variables. <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples to the call <code><a class="el" href="group__FIR__decimate.html#gab8bef6d0f6a26fdbfce9485727713ce5" title="Processing function for the Q15 FIR decimator. ">arm_fir_decimate_q15()</a></code>. <code>M</code> is the decimation factor. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9ae74d7f8a53aec0512ae8f0a421e0e1">ARM_MATH_LENGTH_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__fir__decimate__instance__q15.html#aad9320284218b3aa378527ea518cf093">arm_fir_decimate_instance_q15::M</a>, <a class="el" href="structarm__fir__decimate__instance__q15.html#ac1e9844488ec717da334fbd4c4f41990">arm_fir_decimate_instance_q15::numTaps</a>, <a class="el" href="structarm__fir__decimate__instance__q15.html#a01cacab67e73945e8289075598ede14d">arm_fir_decimate_instance_q15::pCoeffs</a>, <a class="el" href="structarm__fir__decimate__instance__q15.html#a3f7b5184bb28853ef401b001df121047">arm_fir_decimate_instance_q15::pState</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section user"><dt></dt><dd><code>pState</code> points to the array of state variables. <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples to the call <code><a class="el" href="group__FIR__decimate.html#ga262636462d9e24dab67ec792160afcbf" title="Processing function for the Q15 FIR decimator. ">arm_fir_decimate_q15()</a></code>. <code>M</code> is the decimation factor. </dd></dl>
 
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pCoeffs</em>, </td>
         </tr>
         <tr>
@@ -519,27 +514,28 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q31 FIR decimator structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of coefficients in the filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">M</td><td>decimation factor. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the filter coefficients. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q31 FIR decimator structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of coefficients in the filter </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">M</td><td>decimation factor </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to the filter coefficients </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the state buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if <code>blockSize</code> is not a multiple of <code>M</code>.</dd></dl>
-<p><b>Description:</b> </p>
-<dl class="section user"><dt></dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
-   {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9ae74d7f8a53aec0512ae8f0a421e0e1">ARM_MATH_LENGTH_ERROR</a> : <code>blockSize</code> is not a multiple of <code>M</code></li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Details</dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
+    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
 </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd><code>pState</code> points to the array of state variables. <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples passed to <code><a class="el" href="group__FIR__decimate.html#gaef8e86add28f15fdc5ecc484e9dd7a4e" title="Processing function for the Q31 FIR decimator. ">arm_fir_decimate_q31()</a></code>. <code>M</code> is the decimation factor. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9ae74d7f8a53aec0512ae8f0a421e0e1">ARM_MATH_LENGTH_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__fir__decimate__instance__q31.html#ad3d6936c36303b30dd38f1eddf248ae5">arm_fir_decimate_instance_q31::M</a>, <a class="el" href="structarm__fir__decimate__instance__q31.html#a37915d42b0dc5e3057ebe83110798482">arm_fir_decimate_instance_q31::numTaps</a>, <a class="el" href="structarm__fir__decimate__instance__q31.html#a030d0391538c2481c5b348fd09a952ff">arm_fir_decimate_instance_q31::pCoeffs</a>, <a class="el" href="structarm__fir__decimate__instance__q31.html#a0ef0ef9e265f7ab873cfc6daa7593fdb">arm_fir_decimate_instance_q31::pState</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section user"><dt></dt><dd><code>pState</code> points to the array of state variables. <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples passed to <code><a class="el" href="group__FIR__decimate.html#ga27c05d7892f8a327aab86fbfee9b0f29" title="Processing function for the Q31 FIR decimator. ">arm_fir_decimate_q31()</a></code>. <code>M</code> is the decimation factor. </dd></dl>
 
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 </div>
-<a class="anchor" id="gab8bef6d0f6a26fdbfce9485727713ce5"></a>
+<a class="anchor" id="ga262636462d9e24dab67ec792160afcbf"></a>
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 <div class="memproto">
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@@ -552,7 +548,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
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         <tr>
@@ -576,23 +572,20 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q15 FIR decimator structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q15 FIR decimator structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.</dd></dl>
-<dl class="section user"><dt></dt><dd>Refer to the function <code><a class="el" href="group__FIR__decimate.html#ga3f434c9a5d3b4e68061feac0714ea2ac" title="Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4. ">arm_fir_decimate_fast_q15()</a></code> for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4. </dd></dl>
-
-<p>References <a class="el" href="structarm__fir__decimate__instance__q15.html#aad9320284218b3aa378527ea518cf093">arm_fir_decimate_instance_q15::M</a>, <a class="el" href="structarm__fir__decimate__instance__q15.html#ac1e9844488ec717da334fbd4c4f41990">arm_fir_decimate_instance_q15::numTaps</a>, <a class="el" href="structarm__fir__decimate__instance__q15.html#a01cacab67e73945e8289075598ede14d">arm_fir_decimate_instance_q15::pCoeffs</a>, and <a class="el" href="structarm__fir__decimate__instance__q15.html#a3f7b5184bb28853ef401b001df121047">arm_fir_decimate_instance_q15::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__FIR__decimate.html#gab43fa1edb45d3b2e875dc8cd381770cc">arm_fir_decimate_fast_q15()</a> for a faster but less precise implementation of this function. </dd></dl>
 
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-<a class="anchor" id="gaef8e86add28f15fdc5ecc484e9dd7a4e"></a>
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         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -629,19 +622,16 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q31 FIR decimator structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of input samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q31 FIR decimator structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2). After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.</dd></dl>
-<dl class="section user"><dt></dt><dd>Refer to the function <code><a class="el" href="group__FIR__decimate.html#ga3c18cc3d0548a410c577f1bead9582b7" title="Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4. ">arm_fir_decimate_fast_q31()</a></code> for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4. </dd></dl>
-
-<p>References <a class="el" href="structarm__fir__decimate__instance__q31.html#ad3d6936c36303b30dd38f1eddf248ae5">arm_fir_decimate_instance_q31::M</a>, <a class="el" href="structarm__fir__decimate__instance__q31.html#a37915d42b0dc5e3057ebe83110798482">arm_fir_decimate_instance_q31::numTaps</a>, <a class="el" href="structarm__fir__decimate__instance__q31.html#a030d0391538c2481c5b348fd09a952ff">arm_fir_decimate_instance_q31::pCoeffs</a>, and <a class="el" href="structarm__fir__decimate__instance__q31.html#a0ef0ef9e265f7ab873cfc6daa7593fdb">arm_fir_decimate_instance_q31::pState</a>.</p>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2). After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__FIR__decimate.html#gac03b837d289c8bc4a86a34a89e44afdf">arm_fir_decimate_fast_q31()</a> for a faster but less precise implementation of this function. </dd></dl>
 
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 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/group__FIR__decimate.js b/docs/DSP/html/group__FIR__decimate.js
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+    [ "arm_fir_decimate_fast_q15", "group__FIR__decimate.html#gab43fa1edb45d3b2e875dc8cd381770cc", null ],
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   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -132,7 +132,7 @@
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>Fills the destination vector with a constant value.</p>
 <pre>
-        pDst[n] = value;   0 &lt;= n &lt; blockSize.
+    pDst[n] = value;   0 &lt;= n &lt; blockSize.
 </pre><p>There are separate functions for floating point, Q31, Q15, and Q7 data types. </p>
 <h2 class="groupheader">Function Documentation</h2>
 <a class="anchor" id="ga2248e8d3901b4afb7827163132baad94"></a>
@@ -167,16 +167,12 @@
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>input value to be filled </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the output vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__convolution__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -212,16 +208,12 @@
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>input value to be filled </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the output vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
-<p>Referenced by <a class="el" href="group__Conv.html#gaf16f490d245391ec18a42adc73d6d749">arm_conv_fast_opt_q15()</a>, <a class="el" href="group__Conv.html#gac77dbcaef5c754cac27eab96c4753a3c">arm_conv_opt_q15()</a>, <a class="el" href="group__Conv.html#ga4c7cf073e89d6d57cc4e711f078c3f68">arm_conv_opt_q7()</a>, <a class="el" href="group__PartialConv.html#ga3de9c4ddcc7886de25b70d875099a8d9">arm_conv_partial_fast_opt_q15()</a>, <a class="el" href="group__PartialConv.html#ga834b23b4ade8682beeb55778399101f8">arm_conv_partial_opt_q15()</a>, <a class="el" href="group__PartialConv.html#ga3707e16af1435b215840006a7ab0c98f">arm_conv_partial_opt_q7()</a>, <a class="el" href="group__Corr.html#ga40a0236b17220e8e22a22b5bc1c53c6b">arm_correlate_fast_opt_q15()</a>, <a class="el" href="group__Corr.html#gad71c0ec70ec69edbc48563d9a5f68451">arm_correlate_opt_q15()</a>, and <a class="el" href="group__Corr.html#ga746e8857cafe33ec5d6780729c18c311">arm_correlate_opt_q7()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -257,14 +249,12 @@
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>input value to be filled </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the output vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -300,14 +290,12 @@
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>input value to be filled </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the output vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a3ebff224ad44c217fde9f530342e2960">__PACKq7</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -316,7 +304,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__FrequencyBin.html b/docs/DSP/html/group__FrequencyBin.html
index f58c0b1..4e422cd 100644
--- a/docs/DSP/html/group__FrequencyBin.html
+++ b/docs/DSP/html/group__FrequencyBin.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -144,8 +144,8 @@
 <dl class="section user"><dt>CMSIS DSP Software Library Functions Used:</dt><dd></dd></dl>
 <dl class="section user"><dt></dt><dd><ul>
 <li><a class="el" href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80" title="Processing function for the floating-point complex FFT. ">arm_cfft_f32()</a></li>
-<li><a class="el" href="group__cmplx__mag.html#gae45024c497392cde2ae358a76d435213" title="Floating-point complex magnitude. ">arm_cmplx_mag_f32()</a></li>
-<li><a class="el" href="group__Max.html#ga5b89d1b04575aeec494f678695fb87d8" title="Maximum value of a floating-point vector. ">arm_max_f32()</a></li>
+<li><a class="el" href="group__cmplx__mag.html#gaba4e0eff7816fe80d01121fb4cf6c6bc" title="Floating-point complex magnitude. ">arm_cmplx_mag_f32()</a></li>
+<li><a class="el" href="group__Max.html#gad1eabd31544fe59c414d9ce5bd0cc151" title="Maximum value of a floating-point vector. ">arm_max_f32()</a></li>
 </ul>
 </dd></dl>
 <p><b> Refer </b> <a class="el" href="arm_fft_bin_example_f32_8c-example.html">arm_fft_bin_example_f32.c</a> </p>
@@ -154,7 +154,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__GEQ5Band.html b/docs/DSP/html/group__GEQ5Band.html
index e998013..d5b9aa4 100644
--- a/docs/DSP/html/group__GEQ5Band.html
+++ b/docs/DSP/html/group__GEQ5Band.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -158,14 +158,14 @@
 </dd></dl>
 <dl class="section user"><dt>CMSIS DSP Software Library Functions Used:</dt><dd></dd></dl>
 <dl class="section user"><dt></dt><dd><ul>
-<li><a class="el" href="group__BiquadCascadeDF1__32x64.html#ga44900cecb8083afcaabf905ffcd656bb">arm_biquad_cas_df1_32x64_init_q31()</a></li>
-<li><a class="el" href="group__BiquadCascadeDF1__32x64.html#ga953a83e69685de6575cff37feb358a93">arm_biquad_cas_df1_32x64_q31()</a></li>
-<li><a class="el" href="group__BiquadCascadeDF1.html#gaf42a44f9b16d61e636418c83eefe577b" title="Initialization function for the Q31 Biquad cascade filter. ">arm_biquad_cascade_df1_init_q31()</a></li>
-<li><a class="el" href="group__BiquadCascadeDF1.html#ga27b0c54da702713976e5202d20b4473f" title="Processing function for the Q31 Biquad cascade filter. ">arm_biquad_cascade_df1_q31()</a></li>
-<li><a class="el" href="group__scale.html#ga83e36cd82bf51ce35406a199e477d47c" title="Multiplies a Q31 vector by a scalar. ">arm_scale_q31()</a></li>
-<li><a class="el" href="group__scale.html#ga3487af88b112f682ee90589cd419e123" title="Multiplies a floating-point vector by a scalar. ">arm_scale_f32()</a></li>
-<li><a class="el" href="group__float__to__x.html#ga177704107f94564e9abe4daaa36f4554" title="Converts the elements of the floating-point vector to Q31 vector. ">arm_float_to_q31()</a></li>
-<li><a class="el" href="group__q31__to__x.html#gacf407b007a37da18e99dabd9023c56b4" title="Converts the elements of the Q31 vector to floating-point vector. ">arm_q31_to_float()</a></li>
+<li><a class="el" href="group__BiquadCascadeDF1__32x64.html#ga426cd78591a717e87d66d1eaa9a3d074" title="Initialization function for the Q31 Biquad cascade 32x64 filter. ">arm_biquad_cas_df1_32x64_init_q31()</a></li>
+<li><a class="el" href="group__BiquadCascadeDF1__32x64.html#ga953a83e69685de6575cff37feb358a93" title="Processing function for the Q31 Biquad cascade 32x64 filter. ">arm_biquad_cas_df1_32x64_q31()</a></li>
+<li><a class="el" href="group__BiquadCascadeDF1.html#ga5563b156af44d1be2a7548626988bf4e" title="Initialization function for the Q31 Biquad cascade filter. ">arm_biquad_cascade_df1_init_q31()</a></li>
+<li><a class="el" href="group__BiquadCascadeDF1.html#ga4e7dad0ee6949005909fd4fcf1249b79" title="Processing function for the Q31 Biquad cascade filter. ">arm_biquad_cascade_df1_q31()</a></li>
+<li><a class="el" href="group__BasicScale.html#ga8b2b6ea2e39ca464e8f2cfdd937c022b" title="Multiplies a Q31 vector by a scalar. ">arm_scale_q31()</a></li>
+<li><a class="el" href="group__BasicScale.html#ga5e769c8e22da173674c6abca7291e713" title="Multiplies a floating-point vector by a scalar. ">arm_scale_f32()</a></li>
+<li><a class="el" href="group__float__to__x.html#gaae21be47db707e79552f3e8221a48fb0" title="Converts the elements of the floating-point vector to Q31 vector. ">arm_float_to_q31()</a></li>
+<li><a class="el" href="group__q31__to__x.html#ga19a9d023aca1f99abd5da6f13a42b6cf" title="Converts the elements of the Q31 vector to floating-point vector. ">arm_q31_to_float()</a></li>
 </ul>
 </dd></dl>
 <p><b> Refer </b> <a class="el" href="arm_graphic_equalizer_example_q31_8c-example.html">arm_graphic_equalizer_example_q31.c</a> </p>
@@ -174,7 +174,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__IIR__Lattice.html b/docs/DSP/html/group__IIR__Lattice.html
index 2b804d1..83956d0 100644
--- a/docs/DSP/html/group__IIR__Lattice.html
+++ b/docs/DSP/html/group__IIR__Lattice.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga56164a0fe48619b8ceec160347bdd2ff"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__IIR__Lattice.html#ga56164a0fe48619b8ceec160347bdd2ff">arm_iir_lattice_f32</a> (const <a class="el" href="structarm__iir__lattice__instance__f32.html">arm_iir_lattice_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga56164a0fe48619b8ceec160347bdd2ff"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point IIR lattice filter.  <a href="#ga56164a0fe48619b8ceec160347bdd2ff">More...</a><br/></td></tr>
-<tr class="separator:ga56164a0fe48619b8ceec160347bdd2ff"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga754a44b604c386d132b4b05a3d9e0f44"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__IIR__Lattice.html#ga754a44b604c386d132b4b05a3d9e0f44">arm_iir_lattice_f32</a> (const <a class="el" href="structarm__iir__lattice__instance__f32.html">arm_iir_lattice_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga754a44b604c386d132b4b05a3d9e0f44"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point IIR lattice filter.  <a href="#ga754a44b604c386d132b4b05a3d9e0f44">More...</a><br/></td></tr>
+<tr class="separator:ga754a44b604c386d132b4b05a3d9e0f44"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gaed3b0230bb77439dc902daa625985e04"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__IIR__Lattice.html#gaed3b0230bb77439dc902daa625985e04">arm_iir_lattice_init_f32</a> (<a class="el" href="structarm__iir__lattice__instance__f32.html">arm_iir_lattice_instance_f32</a> *S, uint16_t numStages, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pkCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pvCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
 <tr class="memdesc:gaed3b0230bb77439dc902daa625985e04"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point IIR lattice filter.  <a href="#gaed3b0230bb77439dc902daa625985e04">More...</a><br/></td></tr>
 <tr class="separator:gaed3b0230bb77439dc902daa625985e04"><td class="memSeparator" colspan="2">&#160;</td></tr>
@@ -128,47 +128,49 @@
 <tr class="memitem:gab686c14175581797d9c3ad7bf1d5cc1e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__IIR__Lattice.html#gab686c14175581797d9c3ad7bf1d5cc1e">arm_iir_lattice_init_q31</a> (<a class="el" href="structarm__iir__lattice__instance__q31.html">arm_iir_lattice_instance_q31</a> *S, uint16_t numStages, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pkCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pvCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
 <tr class="memdesc:gab686c14175581797d9c3ad7bf1d5cc1e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q31 IIR lattice filter.  <a href="#gab686c14175581797d9c3ad7bf1d5cc1e">More...</a><br/></td></tr>
 <tr class="separator:gab686c14175581797d9c3ad7bf1d5cc1e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaeb9e9599a288832ed123183eaa8b294a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__IIR__Lattice.html#gaeb9e9599a288832ed123183eaa8b294a">arm_iir_lattice_q15</a> (const <a class="el" href="structarm__iir__lattice__instance__q15.html">arm_iir_lattice_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaeb9e9599a288832ed123183eaa8b294a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 IIR lattice filter.  <a href="#gaeb9e9599a288832ed123183eaa8b294a">More...</a><br/></td></tr>
-<tr class="separator:gaeb9e9599a288832ed123183eaa8b294a"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga123b26fa9156cd8d3622dd85931741ed"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__IIR__Lattice.html#ga123b26fa9156cd8d3622dd85931741ed">arm_iir_lattice_q31</a> (const <a class="el" href="structarm__iir__lattice__instance__q31.html">arm_iir_lattice_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga123b26fa9156cd8d3622dd85931741ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 IIR lattice filter.  <a href="#ga123b26fa9156cd8d3622dd85931741ed">More...</a><br/></td></tr>
-<tr class="separator:ga123b26fa9156cd8d3622dd85931741ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga49181562f33456fa979e474e2a657d19"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__IIR__Lattice.html#ga49181562f33456fa979e474e2a657d19">arm_iir_lattice_q15</a> (const <a class="el" href="structarm__iir__lattice__instance__q15.html">arm_iir_lattice_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga49181562f33456fa979e474e2a657d19"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q15 IIR lattice filter.  <a href="#ga49181562f33456fa979e474e2a657d19">More...</a><br/></td></tr>
+<tr class="separator:ga49181562f33456fa979e474e2a657d19"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga87d7df8f8787402d4331de156a82687f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__IIR__Lattice.html#ga87d7df8f8787402d4331de156a82687f">arm_iir_lattice_q31</a> (const <a class="el" href="structarm__iir__lattice__instance__q31.html">arm_iir_lattice_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga87d7df8f8787402d4331de156a82687f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the Q31 IIR lattice filter.  <a href="#ga87d7df8f8787402d4331de156a82687f">More...</a><br/></td></tr>
+<tr class="separator:ga87d7df8f8787402d4331de156a82687f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>This set of functions implements lattice filters for Q15, Q31 and floating-point data types. Lattice filters are used in a variety of adaptive filter applications. The filter structure has feedforward and feedback components and the net impulse response is infinite length. The functions operate on blocks of input and output data and each call to the function processes <code>blockSize</code> samples through the filter. <code>pSrc</code> and <code>pDst</code> point to input and output arrays containing <code>blockSize</code> values.</p>
-<dl class="section user"><dt>Algorithm:</dt><dd><div class="image">
+<dl class="section user"><dt>Algorithm</dt><dd><div class="image">
 <img src="IIRLattice.gif" alt="IIRLattice.gif"/>
 <div class="caption">
 Infinite Impulse Response Lattice filter</div></div>
- <pre>
-    fN(n)   =  x(n)
-    fm-1(n) = fm(n) - km * gm-1(n-1)   for m = N, N-1, ...1
-    gm(n)   = km * fm-1(n) + gm-1(n-1) for m = N, N-1, ...1
+</dd></dl>
+<dl class="section user"><dt></dt><dd><pre>
+    fN(n)   = x(n)
+    fm-1(n) = fm(n) - km * gm-1(n-1)   for m = N, N-1, ..., 1
+    gm(n)   = km * fm-1(n) + gm-1(n-1) for m = N, N-1, ..., 1
     y(n)    = vN * gN(n) + vN-1 * gN-1(n) + ...+ v0 * g0(n)
- </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd><code>pkCoeffs</code> points to array of reflection coefficients of size <code>numStages</code>. Reflection coefficients are stored in time-reversed order. </dd></dl>
+</pre> </dd></dl>
+<dl class="section user"><dt></dt><dd><code>pkCoeffs</code> points to array of reflection coefficients of size <code>numStages</code>. Reflection Coefficients are stored in time-reversed order. </dd></dl>
 <dl class="section user"><dt></dt><dd><pre>
-    {kN, kN-1, ....k1}
- </pre> <code>pvCoeffs</code> points to the array of ladder coefficients of size <code>(numStages+1)</code>. Ladder coefficients are stored in time-reversed order. </dd></dl>
-<dl class="section user"><dt></dt><dd><pre>
-    {vN, vN-1, ...v0}
- </pre> <code>pState</code> points to a state array of size <code>numStages + blockSize</code>. The state variables shown in the figure above (the g values) are stored in the <code>pState</code> array. The state variables are updated after each block of data is processed; the coefficients are untouched. </dd></dl>
+   {kN, kN-1, ..., k1}
+</pre> </dd></dl>
+<dl class="section user"><dt></dt><dd><code>pvCoeffs</code> points to the array of ladder coefficients of size <code>(numStages+1)</code>. Ladder coefficients are stored in time-reversed order. <pre>
+    {vN, vN-1, ..., v0}
+</pre> </dd></dl>
+<dl class="section user"><dt></dt><dd><code>pState</code> points to a state array of size <code>numStages + blockSize</code>. The state variables shown in the figure above (the g values) are stored in the <code>pState</code> array. The state variables are updated after each block of data is processed; the coefficients are untouched.</dd></dl>
 <dl class="section user"><dt>Instance Structure</dt><dd>The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. There are separate instance structure declarations for each of the 3 supported data types.</dd></dl>
 <dl class="section user"><dt>Initialization Functions</dt><dd>There is also an associated initialization function for each data type. The initialization function performs the following operations:<ul>
 <li>Sets the values of the internal structure fields.</li>
-<li>Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numStages, pkCoeffs, pvCoeffs, pState. Also set all of the values in pState to zero.</li>
+<li>Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numStages, pkCoeffs, pvCoeffs, pState. Also set all of the values in pState to zero. </li>
 </ul>
 </dd></dl>
 <dl class="section user"><dt></dt><dd>Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros and then manually initialize the instance structure as follows: <pre>
-<a class="el" href="structarm__iir__lattice__instance__f32.html" title="Instance structure for the floating-point IIR lattice filter. ">arm_iir_lattice_instance_f32</a> S = {numStages, pState, pkCoeffs, pvCoeffs};
-<a class="el" href="structarm__iir__lattice__instance__q31.html" title="Instance structure for the Q31 IIR lattice filter. ">arm_iir_lattice_instance_q31</a> S = {numStages, pState, pkCoeffs, pvCoeffs};
-<a class="el" href="structarm__iir__lattice__instance__q15.html" title="Instance structure for the Q15 IIR lattice filter. ">arm_iir_lattice_instance_q15</a> S = {numStages, pState, pkCoeffs, pvCoeffs};
- </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>where <code>numStages</code> is the number of stages in the filter; <code>pState</code> points to the state buffer array; <code>pkCoeffs</code> points to array of the reflection coefficients; <code>pvCoeffs</code> points to the array of ladder coefficients. </dd></dl>
+    <a class="el" href="structarm__iir__lattice__instance__f32.html" title="Instance structure for the floating-point IIR lattice filter. ">arm_iir_lattice_instance_f32</a> S = {numStages, pState, pkCoeffs, pvCoeffs};
+    <a class="el" href="structarm__iir__lattice__instance__q31.html" title="Instance structure for the Q31 IIR lattice filter. ">arm_iir_lattice_instance_q31</a> S = {numStages, pState, pkCoeffs, pvCoeffs};
+    <a class="el" href="structarm__iir__lattice__instance__q15.html" title="Instance structure for the Q15 IIR lattice filter. ">arm_iir_lattice_instance_q15</a> S = {numStages, pState, pkCoeffs, pvCoeffs};
+</pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>where <code>numStages</code> is the number of stages in the filter; <code>pState</code> points to the state buffer array; <code>pkCoeffs</code> points to array of the reflection coefficients; <code>pvCoeffs</code> points to the array of ladder coefficients.</dd></dl>
 <dl class="section user"><dt>Fixed-Point Behavior</dt><dd>Care must be taken when using the fixed-point versions of the IIR lattice filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines. </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga56164a0fe48619b8ceec160347bdd2ff"></a>
+<a class="anchor" id="ga754a44b604c386d132b4b05a3d9e0f44"></a>
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@@ -181,7 +183,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
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         <tr>
@@ -205,16 +207,14 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the floating-point IIR lattice structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the floating-point IIR lattice structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="structarm__iir__lattice__instance__f32.html#af8de449af5efe1f30be82f9ba35587ee">arm_iir_lattice_instance_f32::numStages</a>, <a class="el" href="structarm__iir__lattice__instance__f32.html#aa69fcdd3775e828d450ce1bbd978fa31">arm_iir_lattice_instance_f32::pkCoeffs</a>, <a class="el" href="structarm__iir__lattice__instance__f32.html#a30babe7815510219e6e3d28e6e4a5969">arm_iir_lattice_instance_f32::pState</a>, and <a class="el" href="structarm__iir__lattice__instance__f32.html#afc7c8f577e6f27d097fe55f57e707f72">arm_iir_lattice_instance_f32::pvCoeffs</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -267,18 +267,16 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the floating-point IIR lattice structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numStages</td><td>number of stages in the filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pkCoeffs</td><td>points to the reflection coefficient buffer. The array is of length numStages. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pvCoeffs</td><td>points to the ladder coefficient buffer. The array is of length numStages+1. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. The array is of length numStages+blockSize. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the floating-point IIR lattice structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numStages</td><td>number of stages in the filter </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pkCoeffs</td><td>points to reflection coefficient buffer. The array is of length numStages </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pvCoeffs</td><td>points to ladder coefficient buffer. The array is of length numStages+1 </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to state buffer. The array is of length numStages+blockSize </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="structarm__iir__lattice__instance__f32.html#af8de449af5efe1f30be82f9ba35587ee">arm_iir_lattice_instance_f32::numStages</a>, <a class="el" href="structarm__iir__lattice__instance__f32.html#aa69fcdd3775e828d450ce1bbd978fa31">arm_iir_lattice_instance_f32::pkCoeffs</a>, <a class="el" href="structarm__iir__lattice__instance__f32.html#a30babe7815510219e6e3d28e6e4a5969">arm_iir_lattice_instance_f32::pState</a>, and <a class="el" href="structarm__iir__lattice__instance__f32.html#afc7c8f577e6f27d097fe55f57e707f72">arm_iir_lattice_instance_f32::pvCoeffs</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -331,18 +329,16 @@
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 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q15 IIR lattice structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numStages</td><td>number of stages in the filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pkCoeffs</td><td>points to reflection coefficient buffer. The array is of length numStages. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pvCoeffs</td><td>points to ladder coefficient buffer. The array is of length numStages+1. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to state buffer. The array is of length numStages+blockSize. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process per call. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q15 IIR lattice structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numStages</td><td>number of stages in the filter </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pkCoeffs</td><td>points to reflection coefficient buffer. The array is of length numStages </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pvCoeffs</td><td>points to ladder coefficient buffer. The array is of length numStages+1 </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to state buffer. The array is of length numStages+blockSize </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="structarm__iir__lattice__instance__q15.html#a96fbed313bef01070409fa182d26ba3f">arm_iir_lattice_instance_q15::numStages</a>, <a class="el" href="structarm__iir__lattice__instance__q15.html#a41c214a1ec38d4a82fae8899d715dd29">arm_iir_lattice_instance_q15::pkCoeffs</a>, <a class="el" href="structarm__iir__lattice__instance__q15.html#afd0136ab917b529554d93f41a5e04618">arm_iir_lattice_instance_q15::pState</a>, and <a class="el" href="structarm__iir__lattice__instance__q15.html#a4c4f57f45b223abbe2a9fb727bd2cad9">arm_iir_lattice_instance_q15::pvCoeffs</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
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@@ -395,22 +391,20 @@
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 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q31 IIR lattice structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numStages</td><td>number of stages in the filter. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pkCoeffs</td><td>points to the reflection coefficient buffer. The array is of length numStages. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pvCoeffs</td><td>points to the ladder coefficient buffer. The array is of length numStages+1. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. The array is of length numStages+blockSize. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q31 IIR lattice structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numStages</td><td>number of stages in the filter </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pkCoeffs</td><td>points to reflection coefficient buffer. The array is of length numStages </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pvCoeffs</td><td>points to ladder coefficient buffer. The array is of length numStages+1 </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to state buffer. The array is of length numStages+blockSize </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="structarm__iir__lattice__instance__q31.html#a9df4570ed28c50fd9193ab654ff236ad">arm_iir_lattice_instance_q31::numStages</a>, <a class="el" href="structarm__iir__lattice__instance__q31.html#a1d30aa16aac7722936ea9dee59211863">arm_iir_lattice_instance_q31::pkCoeffs</a>, <a class="el" href="structarm__iir__lattice__instance__q31.html#a941282745effd26a889fbfadf4b95e6a">arm_iir_lattice_instance_q31::pState</a>, and <a class="el" href="structarm__iir__lattice__instance__q31.html#a04507e2b982b1dfa97b7b55752dea6b9">arm_iir_lattice_instance_q31::pvCoeffs</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gaeb9e9599a288832ed123183eaa8b294a"></a>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
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 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q15 IIR lattice structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q15 IIR lattice structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a7aed02041f489a4f65dbd7093073d94e">__SMLALD()</a>, <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="structarm__iir__lattice__instance__q15.html#a96fbed313bef01070409fa182d26ba3f">arm_iir_lattice_instance_q15::numStages</a>, <a class="el" href="structarm__iir__lattice__instance__q15.html#a41c214a1ec38d4a82fae8899d715dd29">arm_iir_lattice_instance_q15::pkCoeffs</a>, <a class="el" href="structarm__iir__lattice__instance__q15.html#afd0136ab917b529554d93f41a5e04618">arm_iir_lattice_instance_q15::pState</a>, and <a class="el" href="structarm__iir__lattice__instance__q15.html#a4c4f57f45b223abbe2a9fb727bd2cad9">arm_iir_lattice_instance_q15::pvCoeffs</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 64-bit accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format. </dd></dl>
 
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-<a class="anchor" id="ga123b26fa9156cd8d3622dd85931741ed"></a>
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           <td class="paramkey"></td>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
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         <tr>
@@ -499,18 +490,15 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q31 IIR lattice structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the block of output data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q31 IIR lattice structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by 2*log2(numStages) bits. After all multiply-accumulates are performed, the 2.62 accumulator is saturated to 1.32 format and then truncated to 1.31 format. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#ab9f3cfbfb0f12975ab91ddb179160dcb">__QADD()</a>, <a class="el" href="arm__math_8h.html#a15e896d0146c280e600d00f609832350">__QSUB()</a>, <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a9a94b78de0f083bd8fadf3c3abe40431">clip_q63_to_q31()</a>, <a class="el" href="structarm__iir__lattice__instance__q31.html#a9df4570ed28c50fd9193ab654ff236ad">arm_iir_lattice_instance_q31::numStages</a>, <a class="el" href="structarm__iir__lattice__instance__q31.html#a1d30aa16aac7722936ea9dee59211863">arm_iir_lattice_instance_q31::pkCoeffs</a>, <a class="el" href="structarm__iir__lattice__instance__q31.html#a941282745effd26a889fbfadf4b95e6a">arm_iir_lattice_instance_q31::pState</a>, and <a class="el" href="structarm__iir__lattice__instance__q31.html#a04507e2b982b1dfa97b7b55752dea6b9">arm_iir_lattice_instance_q31::pvCoeffs</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by 2*log2(numStages) bits. After all multiply-accumulates are performed, the 2.62 accumulator is saturated to 1.32 format and then truncated to 1.31 format. </dd></dl>
 
 </div>
 </div>
@@ -519,7 +507,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__IIR__Lattice.js b/docs/DSP/html/group__IIR__Lattice.js
index 5d632b3..aaf0965 100644
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index 3e33b75..b2e329d 100644
--- a/docs/DSP/html/group__LMS.html
+++ b/docs/DSP/html/group__LMS.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gae266d009e682180421601627c79a3843"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS.html#gae266d009e682180421601627c79a3843">arm_lms_f32</a> (const <a class="el" href="structarm__lms__instance__f32.html">arm_lms_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pRef, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pOut, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gae266d009e682180421601627c79a3843"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for floating-point LMS filter.  <a href="#gae266d009e682180421601627c79a3843">More...</a><br/></td></tr>
-<tr class="separator:gae266d009e682180421601627c79a3843"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac518f7acd1778a8ee90e81c421cfbb90"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS.html#gac518f7acd1778a8ee90e81c421cfbb90">arm_lms_f32</a> (const <a class="el" href="structarm__lms__instance__f32.html">arm_lms_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pRef, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pOut, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gac518f7acd1778a8ee90e81c421cfbb90"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for floating-point LMS filter.  <a href="#gac518f7acd1778a8ee90e81c421cfbb90">More...</a><br/></td></tr>
+<tr class="separator:gac518f7acd1778a8ee90e81c421cfbb90"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga9fc7adca0966ff2cec1746fca8364cee"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS.html#ga9fc7adca0966ff2cec1746fca8364cee">arm_lms_init_f32</a> (<a class="el" href="structarm__lms__instance__f32.html">arm_lms_instance_f32</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> mu, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
 <tr class="memdesc:ga9fc7adca0966ff2cec1746fca8364cee"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for floating-point LMS filter.  <a href="#ga9fc7adca0966ff2cec1746fca8364cee">More...</a><br/></td></tr>
 <tr class="separator:ga9fc7adca0966ff2cec1746fca8364cee"><td class="memSeparator" colspan="2">&#160;</td></tr>
@@ -128,12 +128,12 @@
 <tr class="memitem:ga8d4bc251169f4b102355097a9f7530d6"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS.html#ga8d4bc251169f4b102355097a9f7530d6">arm_lms_init_q31</a> (<a class="el" href="structarm__lms__instance__q31.html">arm_lms_instance_q31</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> mu, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, uint32_t postShift)</td></tr>
 <tr class="memdesc:ga8d4bc251169f4b102355097a9f7530d6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for Q31 LMS filter.  <a href="#ga8d4bc251169f4b102355097a9f7530d6">More...</a><br/></td></tr>
 <tr class="separator:ga8d4bc251169f4b102355097a9f7530d6"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gacde16c17eb75979f81b34e2e2a58c7ac"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS.html#gacde16c17eb75979f81b34e2e2a58c7ac">arm_lms_q15</a> (const <a class="el" href="structarm__lms__instance__q15.html">arm_lms_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pRef, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pOut, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gacde16c17eb75979f81b34e2e2a58c7ac"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q15 LMS filter.  <a href="#gacde16c17eb75979f81b34e2e2a58c7ac">More...</a><br/></td></tr>
-<tr class="separator:gacde16c17eb75979f81b34e2e2a58c7ac"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga6a0abfe6041253a6f91c63b383a64257"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS.html#ga6a0abfe6041253a6f91c63b383a64257">arm_lms_q31</a> (const <a class="el" href="structarm__lms__instance__q31.html">arm_lms_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pRef, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pOut, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga6a0abfe6041253a6f91c63b383a64257"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q31 LMS filter.  <a href="#ga6a0abfe6041253a6f91c63b383a64257">More...</a><br/></td></tr>
-<tr class="separator:ga6a0abfe6041253a6f91c63b383a64257"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga12fd93f61401b365789cdfd5dca07e5b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS.html#ga12fd93f61401b365789cdfd5dca07e5b">arm_lms_q15</a> (const <a class="el" href="structarm__lms__instance__q15.html">arm_lms_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pRef, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pOut, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga12fd93f61401b365789cdfd5dca07e5b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q15 LMS filter.  <a href="#ga12fd93f61401b365789cdfd5dca07e5b">More...</a><br/></td></tr>
+<tr class="separator:ga12fd93f61401b365789cdfd5dca07e5b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga69c9c64338c067f1fb4990dcdc8c143f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS.html#ga69c9c64338c067f1fb4990dcdc8c143f">arm_lms_q31</a> (const <a class="el" href="structarm__lms__instance__q31.html">arm_lms_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pRef, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pOut, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga69c9c64338c067f1fb4990dcdc8c143f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q31 LMS filter.  <a href="#ga69c9c64338c067f1fb4990dcdc8c143f">More...</a><br/></td></tr>
+<tr class="separator:ga69c9c64338c067f1fb4990dcdc8c143f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>LMS filters are a class of adaptive filters that are able to "learn" an unknown transfer functions. LMS filters use a gradient descent method in which the filter coefficients are updated based on the instantaneous error signal. Adaptive filters are often used in communication systems, equalizers, and noise removal. The CMSIS DSP Library contains LMS filter functions that operate on Q15, Q31, and floating-point data types. The library also contains normalized LMS filters in which the filter coefficient adaptation is indepedent of the level of the input signal.</p>
@@ -144,23 +144,23 @@
 Internal structure of the Least Mean Square filter</div></div>
 <p> The functions operate on blocks of data and each call to the function processes <code>blockSize</code> samples through the filter. <code>pSrc</code> points to input signal, <code>pRef</code> points to reference signal, <code>pOut</code> points to output signal and <code>pErr</code> points to error signal. All arrays contain <code>blockSize</code> values.</p>
 <p>The functions operate on a block-by-block basis. Internally, the filter coefficients <code>b[n]</code> are updated on a sample-by-sample basis. The convergence of the LMS filter is slower compared to the normalized LMS algorithm.</p>
-<dl class="section user"><dt>Algorithm:</dt><dd>The output signal <code>y[n]</code> is computed by a standard FIR filter: <pre>
-     y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
- </pre></dd></dl>
+<dl class="section user"><dt>Algorithm</dt><dd>The output signal <code>y[n]</code> is computed by a standard FIR filter: <pre>
+    y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
+</pre></dd></dl>
 <dl class="section user"><dt></dt><dd>The error signal equals the difference between the reference signal <code>d[n]</code> and the filter output: <pre>
-     e[n] = d[n] - y[n].
- </pre></dd></dl>
+    e[n] = d[n] - y[n].
+</pre></dd></dl>
 <dl class="section user"><dt></dt><dd>After each sample of the error signal is computed, the filter coefficients <code>b[k]</code> are updated on a sample-by-sample basis: <pre>
-     b[k] = b[k] + e[n] * mu * x[n-k],  for k=0, 1, ..., numTaps-1
- </pre> where <code>mu</code> is the step size and controls the rate of coefficient convergence. </dd></dl>
+    b[k] = b[k] + e[n] * mu * x[n-k],  for k=0, 1, ..., numTaps-1
+</pre> where <code>mu</code> is the step size and controls the rate of coefficient convergence. </dd></dl>
 <dl class="section user"><dt></dt><dd>In the APIs, <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>. Coefficients are stored in time reversed order. </dd></dl>
 <dl class="section user"><dt></dt><dd><pre>
-    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
- </pre> </dd></dl>
+   {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+</pre> </dd></dl>
 <dl class="section user"><dt></dt><dd><code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>. Samples in the state buffer are stored in the order: </dd></dl>
 <dl class="section user"><dt></dt><dd><pre>
-    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
- </pre> </dd></dl>
+   {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
+</pre> </dd></dl>
 <dl class="section user"><dt></dt><dd>Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code> samples. The increased state buffer length allows circular addressing, which is traditionally used in FIR filters, to be avoided and yields a significant speed improvement. The state variables are updated after each block of data is processed. </dd></dl>
 <dl class="section user"><dt>Instance Structure</dt><dd>The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter and coefficient and state arrays cannot be shared among instances. There are separate instance structure declarations for each of the 3 supported data types.</dd></dl>
 <dl class="section user"><dt>Initialization Functions</dt><dd>There is also an associated initialization function for each data type. The initialization function performs the following operations:<ul>
@@ -169,19 +169,19 @@
 </ul>
 </dd></dl>
 <dl class="section user"><dt></dt><dd>Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. The code below statically initializes each of the 3 different data type filter instance structures <pre>
-    <a class="el" href="structarm__lms__instance__f32.html" title="Instance structure for the floating-point LMS filter. ">arm_lms_instance_f32</a> S = {numTaps, pState, pCoeffs, mu};
-    <a class="el" href="structarm__lms__instance__q31.html" title="Instance structure for the Q31 LMS filter. ">arm_lms_instance_q31</a> S = {numTaps, pState, pCoeffs, mu, postShift};
-    <a class="el" href="structarm__lms__instance__q15.html" title="Instance structure for the Q15 LMS filter. ">arm_lms_instance_q15</a> S = {numTaps, pState, pCoeffs, mu, postShift};
- </pre> where <code>numTaps</code> is the number of filter coefficients in the filter; <code>pState</code> is the address of the state buffer; <code>pCoeffs</code> is the address of the coefficient buffer; <code>mu</code> is the step size parameter; and <code>postShift</code> is the shift applied to coefficients.</dd></dl>
-<dl class="section user"><dt>Fixed-Point Behavior:</dt><dd>Care must be taken when using the Q15 and Q31 versions of the LMS filter. The following issues must be considered:<ul>
+   <a class="el" href="structarm__lms__instance__f32.html" title="Instance structure for the floating-point LMS filter. ">arm_lms_instance_f32</a> S = {numTaps, pState, pCoeffs, mu};
+   <a class="el" href="structarm__lms__instance__q31.html" title="Instance structure for the Q31 LMS filter. ">arm_lms_instance_q31</a> S = {numTaps, pState, pCoeffs, mu, postShift};
+   <a class="el" href="structarm__lms__instance__q15.html" title="Instance structure for the Q15 LMS filter. ">arm_lms_instance_q15</a> S = {numTaps, pState, pCoeffs, mu, postShift};
+</pre> where <code>numTaps</code> is the number of filter coefficients in the filter; <code>pState</code> is the address of the state buffer; <code>pCoeffs</code> is the address of the coefficient buffer; <code>mu</code> is the step size parameter; and <code>postShift</code> is the shift applied to coefficients.</dd></dl>
+<dl class="section user"><dt>Fixed-Point Behavior</dt><dd>Care must be taken when using the Q15 and Q31 versions of the LMS filter. The following issues must be considered:<ul>
 <li>Scaling of coefficients</li>
 <li>Overflow and saturation</li>
 </ul>
 </dd></dl>
-<dl class="section user"><dt>Scaling of Coefficients:</dt><dd>Filter coefficients are represented as fractional values and coefficients are restricted to lie in the range <code>[-1 +1)</code>. The fixed-point functions have an additional scaling parameter <code>postShift</code>. At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits. This essentially scales the filter coefficients by <code>2^postShift</code> and allows the filter coefficients to exceed the range <code>[+1 -1)</code>. The value of <code>postShift</code> is set by the user based on the expected gain through the system being modeled.</dd></dl>
-<dl class="section user"><dt>Overflow and Saturation:</dt><dd>Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are described separately as part of the function specific documentation below. </dd></dl>
+<dl class="section user"><dt>Scaling of Coefficients</dt><dd>Filter coefficients are represented as fractional values and coefficients are restricted to lie in the range <code>[-1 +1)</code>. The fixed-point functions have an additional scaling parameter <code>postShift</code>. At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits. This essentially scales the filter coefficients by <code>2^postShift</code> and allows the filter coefficients to exceed the range <code>[+1 -1)</code>. The value of <code>postShift</code> is set by the user based on the expected gain through the system being modeled.</dd></dl>
+<dl class="section user"><dt>Overflow and Saturation</dt><dd>Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are described separately as part of the function specific documentation below. </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="gae266d009e682180421601627c79a3843"></a>
+<a class="anchor" id="gac518f7acd1778a8ee90e81c421cfbb90"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
@@ -194,7 +194,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -228,21 +228,18 @@
         </tr>
       </table>
 </div><div class="memdoc">
-<p>This function operates on floating-point data types.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the floating-point LMS filter structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pRef</td><td>points to the block of reference data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pOut</td><td>points to the block of output data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pErr</td><td>points to the block of error data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the floating-point LMS filter structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pRef</td><td>points to the block of reference data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pOut</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pErr</td><td>points to the block of error data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="structarm__lms__instance__f32.html#ae2af43d74c93dba16b876e10c97a5b99">arm_lms_instance_f32::mu</a>, <a class="el" href="structarm__lms__instance__f32.html#af73880d9009982f5d14529869494ec3d">arm_lms_instance_f32::numTaps</a>, <a class="el" href="structarm__lms__instance__f32.html#a4795c6f7d3f17cec15c2fd09f66edd1a">arm_lms_instance_f32::pCoeffs</a>, and <a class="el" href="structarm__lms__instance__f32.html#aaf94285be2f99b5b9af40bea8dcb14b9">arm_lms_instance_f32::pState</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -295,21 +292,19 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the floating-point LMS filter structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of filter coefficients. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the coefficient buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to state buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">mu</td><td>step size that controls filter coefficient updates. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the floating-point LMS filter structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of filter coefficients </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to coefficient buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to state buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">mu</td><td>step size that controls filter coefficient updates </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-<dl class="section user"><dt>Description:</dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Details</dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-</pre> The initial filter coefficients serve as a starting point for the adaptive filter. <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__LMS.html#gae266d009e682180421601627c79a3843" title="Processing function for floating-point LMS filter. ">arm_lms_f32()</a></code>. </dd></dl>
-
-<p>References <a class="el" href="structarm__lms__instance__f32.html#ae2af43d74c93dba16b876e10c97a5b99">arm_lms_instance_f32::mu</a>, <a class="el" href="structarm__lms__instance__f32.html#af73880d9009982f5d14529869494ec3d">arm_lms_instance_f32::numTaps</a>, <a class="el" href="structarm__lms__instance__f32.html#a4795c6f7d3f17cec15c2fd09f66edd1a">arm_lms_instance_f32::pCoeffs</a>, and <a class="el" href="structarm__lms__instance__f32.html#aaf94285be2f99b5b9af40bea8dcb14b9">arm_lms_instance_f32::pState</a>.</p>
+</pre> The initial filter coefficients serve as a starting point for the adaptive filter. <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__LMS.html#gac518f7acd1778a8ee90e81c421cfbb90" title="Processing function for floating-point LMS filter. ">arm_lms_f32()</a></code>. </dd></dl>
 
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@@ -368,22 +363,20 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q15 LMS filter structure. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q15 LMS filter structure. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of filter coefficients. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to the coefficient buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the state buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to coefficient buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to state buffer. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">mu</td><td>step size that controls filter coefficient updates. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">postShift</td><td>bit shift applied to coefficients. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Description:</dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Details</dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-</pre> The initial filter coefficients serve as a starting point for the adaptive filter. <code>pState</code> points to the array of state variables and size of array is <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__LMS.html#gacde16c17eb75979f81b34e2e2a58c7ac" title="Processing function for Q15 LMS filter. ">arm_lms_q15()</a></code>. </dd></dl>
-
-<p>References <a class="el" href="structarm__lms__instance__q15.html#aae46129d7cfd7f1c162cc502ed0a9d49">arm_lms_instance_q15::mu</a>, <a class="el" href="structarm__lms__instance__q15.html#a0078e894f805af1b360369e619fb57b3">arm_lms_instance_q15::numTaps</a>, <a class="el" href="structarm__lms__instance__q15.html#a42f95368b94898eb82608e1113d18cab">arm_lms_instance_q15::pCoeffs</a>, <a class="el" href="structarm__lms__instance__q15.html#acca5fbaef4a52ae411de24c9a0b929cf">arm_lms_instance_q15::postShift</a>, and <a class="el" href="structarm__lms__instance__q15.html#a9a575ff82c1e68cbb583083439260d08">arm_lms_instance_q15::pState</a>.</p>
+</pre> The initial filter coefficients serve as a starting point for the adaptive filter. <code>pState</code> points to the array of state variables and size of array is <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__LMS.html#ga12fd93f61401b365789cdfd5dca07e5b" title="Processing function for Q15 LMS filter. ">arm_lms_q15()</a></code>. </dd></dl>
 
 </div>
 </div>
@@ -442,26 +435,24 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q31 LMS filter structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of filter coefficients. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to coefficient buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to state buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">mu</td><td>step size that controls filter coefficient updates. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">postShift</td><td>bit shift applied to coefficients. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q31 LMS filter structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of filter coefficients </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to coefficient buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to state buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">mu</td><td>step size that controls filter coefficient updates </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">postShift</td><td>bit shift applied to coefficients </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Description:</dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Details</dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-</pre> The initial filter coefficients serve as a starting point for the adaptive filter. <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__LMS.html#ga6a0abfe6041253a6f91c63b383a64257" title="Processing function for Q31 LMS filter. ">arm_lms_q31()</a></code>. </dd></dl>
-
-<p>References <a class="el" href="structarm__lms__instance__q31.html#acb6ca9996b3c5f740d5d6c8e9f4f1d46">arm_lms_instance_q31::mu</a>, <a class="el" href="structarm__lms__instance__q31.html#ac0d84f7d054555931ef8a62511fbcb8a">arm_lms_instance_q31::numTaps</a>, <a class="el" href="structarm__lms__instance__q31.html#a4afe56e991a5416adfd462aa88bda500">arm_lms_instance_q31::pCoeffs</a>, <a class="el" href="structarm__lms__instance__q31.html#a4705a8f0011bb9166e09bf5bd51e595e">arm_lms_instance_q31::postShift</a>, and <a class="el" href="structarm__lms__instance__q31.html#a206d47b49de6f357f933ebe61520753c">arm_lms_instance_q31::pState</a>.</p>
+</pre> The initial filter coefficients serve as a starting point for the adaptive filter. <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__LMS.html#ga69c9c64338c067f1fb4990dcdc8c143f" title="Processing function for Q31 LMS filter. ">arm_lms_q31()</a></code>. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gacde16c17eb75979f81b34e2e2a58c7ac"></a>
+<a class="anchor" id="ga12fd93f61401b365789cdfd5dca07e5b"></a>
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       <table class="memname">
@@ -474,7 +465,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -510,24 +501,22 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q15 LMS filter structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pRef</td><td>points to the block of reference data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pOut</td><td>points to the block of output data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pErr</td><td>points to the block of error data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q15 LMS filter structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pRef</td><td>points to the block of reference data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pOut</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pErr</td><td>points to the block of error data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Scaling and Overflow Behavior:</dt><dd>The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.</dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 64-bit accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format. </dd></dl>
 <dl class="section user"><dt></dt><dd>In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted. </dd></dl>
 
-<p>References <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a7aed02041f489a4f65dbd7093073d94e">__SMLALD()</a>, <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="structarm__lms__instance__q15.html#aae46129d7cfd7f1c162cc502ed0a9d49">arm_lms_instance_q15::mu</a>, <a class="el" href="structarm__lms__instance__q15.html#a0078e894f805af1b360369e619fb57b3">arm_lms_instance_q15::numTaps</a>, <a class="el" href="structarm__lms__instance__q15.html#a42f95368b94898eb82608e1113d18cab">arm_lms_instance_q15::pCoeffs</a>, <a class="el" href="structarm__lms__instance__q15.html#acca5fbaef4a52ae411de24c9a0b929cf">arm_lms_instance_q15::postShift</a>, and <a class="el" href="structarm__lms__instance__q15.html#a9a575ff82c1e68cbb583083439260d08">arm_lms_instance_q15::pState</a>.</p>
-
 </div>
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-<a class="anchor" id="ga6a0abfe6041253a6f91c63b383a64257"></a>
+<a class="anchor" id="ga69c9c64338c067f1fb4990dcdc8c143f"></a>
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       <table class="memname">
@@ -540,7 +529,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -576,21 +565,19 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q15 LMS filter structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pRef</td><td>points to the block of reference data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pOut</td><td>points to the block of output data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pErr</td><td>points to the block of error data. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q31 LMS filter structure. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pRef</td><td>points to the block of reference data. </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pOut</td><td>points to the block of output data. </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pErr</td><td>points to the block of error data. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Scaling and Overflow Behavior:</dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clips. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. The reference signal should not be scaled down. After all multiply-accumulates are performed, the 2.62 accumulator is shifted and saturated to 1.31 format to yield the final result. The output signal and error signal are in 1.31 format.</dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clips. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. The reference signal should not be scaled down. After all multiply-accumulates are performed, the 2.62 accumulator is shifted and saturated to 1.31 format to yield the final result. The output signal and error signal are in 1.31 format. </dd></dl>
 <dl class="section user"><dt></dt><dd>In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted. </dd></dl>
 
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a9a94b78de0f083bd8fadf3c3abe40431">clip_q63_to_q31()</a>, <a class="el" href="structarm__lms__instance__q31.html#acb6ca9996b3c5f740d5d6c8e9f4f1d46">arm_lms_instance_q31::mu</a>, <a class="el" href="structarm__lms__instance__q31.html#ac0d84f7d054555931ef8a62511fbcb8a">arm_lms_instance_q31::numTaps</a>, <a class="el" href="structarm__lms__instance__q31.html#a4afe56e991a5416adfd462aa88bda500">arm_lms_instance_q31::pCoeffs</a>, <a class="el" href="structarm__lms__instance__q31.html#a4705a8f0011bb9166e09bf5bd51e595e">arm_lms_instance_q31::postShift</a>, and <a class="el" href="structarm__lms__instance__q31.html#a206d47b49de6f357f933ebe61520753c">arm_lms_instance_q31::pState</a>.</p>
-
 </div>
 </div>
 </div><!-- contents -->
@@ -598,7 +585,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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index f452664..b721c01 100644
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+++ b/docs/DSP/html/group__LMS__NORM.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,9 +116,9 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga2418c929087c6eba719758eaae3f3300"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS__NORM.html#ga2418c929087c6eba719758eaae3f3300">arm_lms_norm_f32</a> (<a class="el" href="structarm__lms__norm__instance__f32.html">arm_lms_norm_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pRef, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pOut, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga2418c929087c6eba719758eaae3f3300"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for floating-point normalized LMS filter.  <a href="#ga2418c929087c6eba719758eaae3f3300">More...</a><br/></td></tr>
-<tr class="separator:ga2418c929087c6eba719758eaae3f3300"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga72b3755ed1cf97622851cbbeff83c69e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS__NORM.html#ga72b3755ed1cf97622851cbbeff83c69e">arm_lms_norm_f32</a> (<a class="el" href="structarm__lms__norm__instance__f32.html">arm_lms_norm_instance_f32</a> *S, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pRef, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pOut, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga72b3755ed1cf97622851cbbeff83c69e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for floating-point normalized LMS filter.  <a href="#ga72b3755ed1cf97622851cbbeff83c69e">More...</a><br/></td></tr>
+<tr class="separator:ga72b3755ed1cf97622851cbbeff83c69e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gac7ccbaea863882056eee815456464670"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS__NORM.html#gac7ccbaea863882056eee815456464670">arm_lms_norm_init_f32</a> (<a class="el" href="structarm__lms__norm__instance__f32.html">arm_lms_norm_instance_f32</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pState, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> mu, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
 <tr class="memdesc:gac7ccbaea863882056eee815456464670"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for floating-point normalized LMS filter.  <a href="#gac7ccbaea863882056eee815456464670">More...</a><br/></td></tr>
 <tr class="separator:gac7ccbaea863882056eee815456464670"><td class="memSeparator" colspan="2">&#160;</td></tr>
@@ -128,12 +128,12 @@
 <tr class="memitem:ga1d9659dbbea4c89a7a9d14d5fc0dd490"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS__NORM.html#ga1d9659dbbea4c89a7a9d14d5fc0dd490">arm_lms_norm_init_q31</a> (<a class="el" href="structarm__lms__norm__instance__q31.html">arm_lms_norm_instance_q31</a> *S, uint16_t numTaps, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pCoeffs, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pState, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> mu, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, uint8_t postShift)</td></tr>
 <tr class="memdesc:ga1d9659dbbea4c89a7a9d14d5fc0dd490"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for Q31 normalized LMS filter.  <a href="#ga1d9659dbbea4c89a7a9d14d5fc0dd490">More...</a><br/></td></tr>
 <tr class="separator:ga1d9659dbbea4c89a7a9d14d5fc0dd490"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad47486a399dedb0bc85a5990ec5cf981"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS__NORM.html#gad47486a399dedb0bc85a5990ec5cf981">arm_lms_norm_q15</a> (<a class="el" href="structarm__lms__norm__instance__q15.html">arm_lms_norm_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pRef, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pOut, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gad47486a399dedb0bc85a5990ec5cf981"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q15 normalized LMS filter.  <a href="#gad47486a399dedb0bc85a5990ec5cf981">More...</a><br/></td></tr>
-<tr class="separator:gad47486a399dedb0bc85a5990ec5cf981"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga7128775e99817c183a7d7ad34e8b6e05"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS__NORM.html#ga7128775e99817c183a7d7ad34e8b6e05">arm_lms_norm_q31</a> (<a class="el" href="structarm__lms__norm__instance__q31.html">arm_lms_norm_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pRef, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pOut, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga7128775e99817c183a7d7ad34e8b6e05"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q31 normalized LMS filter.  <a href="#ga7128775e99817c183a7d7ad34e8b6e05">More...</a><br/></td></tr>
-<tr class="separator:ga7128775e99817c183a7d7ad34e8b6e05"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf03debfeb77ec5a9934e1b23f1ff6c48"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS__NORM.html#gaf03debfeb77ec5a9934e1b23f1ff6c48">arm_lms_norm_q15</a> (<a class="el" href="structarm__lms__norm__instance__q15.html">arm_lms_norm_instance_q15</a> *S, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pRef, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pOut, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaf03debfeb77ec5a9934e1b23f1ff6c48"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q15 normalized LMS filter.  <a href="#gaf03debfeb77ec5a9934e1b23f1ff6c48">More...</a><br/></td></tr>
+<tr class="separator:gaf03debfeb77ec5a9934e1b23f1ff6c48"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae12fc16232c8087345e5910fcb840be9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LMS__NORM.html#gae12fc16232c8087345e5910fcb840be9">arm_lms_norm_q31</a> (<a class="el" href="structarm__lms__norm__instance__q31.html">arm_lms_norm_instance_q31</a> *S, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pRef, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pOut, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pErr, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gae12fc16232c8087345e5910fcb840be9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for Q31 normalized LMS filter.  <a href="#gae12fc16232c8087345e5910fcb840be9">More...</a><br/></td></tr>
+<tr class="separator:gae12fc16232c8087345e5910fcb840be9"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>This set of functions implements a commonly used adaptive filter. It is related to the Least Mean Square (LMS) adaptive filter and includes an additional normalization factor which increases the adaptation rate of the filter. The CMSIS DSP Library contains normalized LMS filter functions that operate on Q15, Q31, and floating-point data types.</p>
@@ -144,7 +144,7 @@
 Internal structure of the NLMS adaptive filter</div></div>
 <p> The functions operate on blocks of data and each call to the function processes <code>blockSize</code> samples through the filter. <code>pSrc</code> points to input signal, <code>pRef</code> points to reference signal, <code>pOut</code> points to output signal and <code>pErr</code> points to error signal. All arrays contain <code>blockSize</code> values.</p>
 <p>The functions operate on a block-by-block basis. Internally, the filter coefficients <code>b[n]</code> are updated on a sample-by-sample basis. The convergence of the LMS filter is slower compared to the normalized LMS algorithm.</p>
-<dl class="section user"><dt>Algorithm:</dt><dd>The output signal <code>y[n]</code> is computed by a standard FIR filter: <pre>
+<dl class="section user"><dt>Algorithm</dt><dd>The output signal <code>y[n]</code> is computed by a standard FIR filter: <pre>
      y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
  </pre></dd></dl>
 <dl class="section user"><dt></dt><dd>The error signal equals the difference between the reference signal <code>d[n]</code> and the filter output: <pre>
@@ -163,23 +163,23 @@
 <dl class="section user"><dt></dt><dd><pre>
     {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
  </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code> samples. The increased state buffer length allows circular addressing, which is traditionally used in FIR filters, to be avoided and yields a significant speed improvement. The state variables are updated after each block of data is processed. </dd></dl>
+<dl class="section user"><dt></dt><dd>Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code> samples. The increased state buffer length allows circular addressing, which is traditionally used in FIR filters, to be avoided and yields a significant speed improvement. The state variables are updated after each block of data is processed.</dd></dl>
 <dl class="section user"><dt>Instance Structure</dt><dd>The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter and coefficient and state arrays cannot be shared among instances. There are separate instance structure declarations for each of the 3 supported data types.</dd></dl>
 <dl class="section user"><dt>Initialization Functions</dt><dd>There is also an associated initialization function for each data type. The initialization function performs the following operations:<ul>
 <li>Sets the values of the internal structure fields.</li>
-<li>Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numTaps, pCoeffs, mu, energy, x0, pState. Also set all of the values in pState to zero. For Q7, Q15, and Q31 the following fields must also be initialized; recipTable, postShift</li>
+<li>Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numTaps, pCoeffs, mu, energy, x0, pState. Also set all of the values in pState to zero. For Q7, Q15, and Q31 the following fields must also be initialized; recipTable, postShift </li>
 </ul>
 </dd></dl>
 <dl class="section user"><dt></dt><dd>Instance structure cannot be placed into a const data section and it is recommended to use the initialization function. </dd></dl>
-<dl class="section user"><dt>Fixed-Point Behavior:</dt><dd>Care must be taken when using the Q15 and Q31 versions of the normalised LMS filter. The following issues must be considered:<ul>
+<dl class="section user"><dt>Fixed-Point Behavior</dt><dd>Care must be taken when using the Q15 and Q31 versions of the normalised LMS filter. The following issues must be considered:<ul>
 <li>Scaling of coefficients</li>
 <li>Overflow and saturation</li>
 </ul>
 </dd></dl>
-<dl class="section user"><dt>Scaling of Coefficients:</dt><dd>Filter coefficients are represented as fractional values and coefficients are restricted to lie in the range <code>[-1 +1)</code>. The fixed-point functions have an additional scaling parameter <code>postShift</code>. At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits. This essentially scales the filter coefficients by <code>2^postShift</code> and allows the filter coefficients to exceed the range <code>[+1 -1)</code>. The value of <code>postShift</code> is set by the user based on the expected gain through the system being modeled.</dd></dl>
-<dl class="section user"><dt>Overflow and Saturation:</dt><dd>Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are described separately as part of the function specific documentation below. </dd></dl>
+<dl class="section user"><dt>Scaling of Coefficients</dt><dd>Filter coefficients are represented as fractional values and coefficients are restricted to lie in the range <code>[-1 +1)</code>. The fixed-point functions have an additional scaling parameter <code>postShift</code>. At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits. This essentially scales the filter coefficients by <code>2^postShift</code> and allows the filter coefficients to exceed the range <code>[+1 -1)</code>. The value of <code>postShift</code> is set by the user based on the expected gain through the system being modeled.</dd></dl>
+<dl class="section user"><dt>Overflow and Saturation</dt><dd>Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are described separately as part of the function specific documentation below. </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga2418c929087c6eba719758eaae3f3300"></a>
+<a class="anchor" id="ga72b3755ed1cf97622851cbbeff83c69e"></a>
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       <table class="memname">
@@ -192,7 +192,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -228,20 +228,16 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the floating-point normalized LMS filter structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pRef</td><td>points to the block of reference data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pOut</td><td>points to the block of output data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pErr</td><td>points to the block of error data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the floating-point normalized LMS filter structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pRef</td><td>points to the block of reference data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pOut</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pErr</td><td>points to the block of error data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="structarm__lms__norm__instance__f32.html#a6a4119e4f39447bbee31b066deafa16f">arm_lms_norm_instance_f32::energy</a>, <a class="el" href="structarm__lms__norm__instance__f32.html#a84401d3cfc6c40f69c08223cf341b886">arm_lms_norm_instance_f32::mu</a>, <a class="el" href="structarm__lms__norm__instance__f32.html#ac95f8ca3d816524c2070643852fac5e8">arm_lms_norm_instance_f32::numTaps</a>, <a class="el" href="structarm__lms__norm__instance__f32.html#a1ba688d90aba7de003ed4ad8e2e7ddda">arm_lms_norm_instance_f32::pCoeffs</a>, <a class="el" href="structarm__lms__norm__instance__f32.html#a0bc03338687002ed5f2e4a363eb095ec">arm_lms_norm_instance_f32::pState</a>, and <a class="el" href="structarm__lms__norm__instance__f32.html#aec958fe89b164a30f38bcca9f5d96218">arm_lms_norm_instance_f32::x0</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__signal__converge__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -294,23 +290,19 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the floating-point LMS filter structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of filter coefficients. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to coefficient buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to state buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">mu</td><td>step size that controls filter coefficient updates. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the floating-point LMS filter structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of filter coefficients </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to coefficient buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to state buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">mu</td><td>step size that controls filter coefficient updates </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Description:</dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Details</dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-</pre> The initial filter coefficients serve as a starting point for the adaptive filter. <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__LMS__NORM.html#ga2418c929087c6eba719758eaae3f3300" title="Processing function for floating-point normalized LMS filter. ">arm_lms_norm_f32()</a></code>. </dd></dl>
-
-<p>References <a class="el" href="structarm__lms__norm__instance__f32.html#a6a4119e4f39447bbee31b066deafa16f">arm_lms_norm_instance_f32::energy</a>, <a class="el" href="structarm__lms__norm__instance__f32.html#a84401d3cfc6c40f69c08223cf341b886">arm_lms_norm_instance_f32::mu</a>, <a class="el" href="structarm__lms__norm__instance__f32.html#ac95f8ca3d816524c2070643852fac5e8">arm_lms_norm_instance_f32::numTaps</a>, <a class="el" href="structarm__lms__norm__instance__f32.html#a1ba688d90aba7de003ed4ad8e2e7ddda">arm_lms_norm_instance_f32::pCoeffs</a>, <a class="el" href="structarm__lms__norm__instance__f32.html#a0bc03338687002ed5f2e4a363eb095ec">arm_lms_norm_instance_f32::pState</a>, and <a class="el" href="structarm__lms__norm__instance__f32.html#aec958fe89b164a30f38bcca9f5d96218">arm_lms_norm_instance_f32::x0</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__signal__converge__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
+</pre> The initial filter coefficients serve as a starting point for the adaptive filter. <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__LMS__NORM.html#ga72b3755ed1cf97622851cbbeff83c69e" title="Processing function for floating-point normalized LMS filter. ">arm_lms_norm_f32()</a></code>. </dd></dl>
 
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@@ -369,23 +361,20 @@
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 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q15 normalized LMS filter structure. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q15 normalized LMS filter structure. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of filter coefficients. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to coefficient buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to state buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to coefficient buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to state buffer. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">mu</td><td>step size that controls filter coefficient updates. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">postShift</td><td>bit shift applied to coefficients. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Description:</b> </p>
-<dl class="section user"><dt></dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Details</dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-</pre> The initial filter coefficients serve as a starting point for the adaptive filter. <code>pState</code> points to the array of state variables and size of array is <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__LMS__NORM.html#gad47486a399dedb0bc85a5990ec5cf981" title="Processing function for Q15 normalized LMS filter. ">arm_lms_norm_q15()</a></code>. </dd></dl>
-
-<p>References <a class="el" href="arm__common__tables_8h.html#a56d3642e4ee33e3ada57ff11ecda1498">armRecipTableQ15</a>, <a class="el" href="structarm__lms__norm__instance__q15.html#a1c81ded399919d8181026bc1c8602e7b">arm_lms_norm_instance_q15::energy</a>, <a class="el" href="structarm__lms__norm__instance__q15.html#a7ce00f21d11cfda6d963240641deea8c">arm_lms_norm_instance_q15::mu</a>, <a class="el" href="structarm__lms__norm__instance__q15.html#a9ee7a45f4f315d7996a969e25fdc7146">arm_lms_norm_instance_q15::numTaps</a>, <a class="el" href="structarm__lms__norm__instance__q15.html#ae7bca648c75a2ffa02d87852bb78bc8a">arm_lms_norm_instance_q15::pCoeffs</a>, <a class="el" href="structarm__lms__norm__instance__q15.html#aa0d435fbcf7dedb7179d4467e9b79e9f">arm_lms_norm_instance_q15::postShift</a>, <a class="el" href="structarm__lms__norm__instance__q15.html#aa4de490b3bdbd03561b76ee07901c8e3">arm_lms_norm_instance_q15::pState</a>, <a class="el" href="structarm__lms__norm__instance__q15.html#a9aabb0e4c79f3db807e7a441fa36f5f8">arm_lms_norm_instance_q15::recipTable</a>, and <a class="el" href="structarm__lms__norm__instance__q15.html#a3fc1d6f97d2c6d5324871de6895cb7e9">arm_lms_norm_instance_q15::x0</a>.</p>
+</pre> The initial filter coefficients serve as a starting point for the adaptive filter. <code>pState</code> points to the array of state variables and size of array is <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__LMS__NORM.html#gaf03debfeb77ec5a9934e1b23f1ff6c48" title="Processing function for Q15 normalized LMS filter. ">arm_lms_norm_q15()</a></code>. </dd></dl>
 
 </div>
 </div>
@@ -444,27 +433,24 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q31 normalized LMS filter structure. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q31 normalized LMS filter structure. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">numTaps</td><td>number of filter coefficients. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pCoeffs</td><td>points to coefficient buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to state buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pCoeffs</td><td>points to coefficient buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to state buffer. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">mu</td><td>step size that controls filter coefficient updates. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">postShift</td><td>bit shift applied to coefficients. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Description:</b> </p>
-<dl class="section user"><dt></dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Details</dt><dd><code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order: <pre>
    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-</pre> The initial filter coefficients serve as a starting point for the adaptive filter. <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__LMS__NORM.html#ga7128775e99817c183a7d7ad34e8b6e05" title="Processing function for Q31 normalized LMS filter. ">arm_lms_norm_q31()</a></code>. </dd></dl>
-
-<p>References <a class="el" href="arm__common__tables_8h.html#aae6056f6c4e8f7e494445196bf864479">armRecipTableQ31</a>, <a class="el" href="structarm__lms__norm__instance__q31.html#a3c0ae42869afec8555dc8e3a7ef9b386">arm_lms_norm_instance_q31::energy</a>, <a class="el" href="structarm__lms__norm__instance__q31.html#ad3dd2a2406e02fdaa7782ba6c3940a64">arm_lms_norm_instance_q31::mu</a>, <a class="el" href="structarm__lms__norm__instance__q31.html#a28e4c085af69c9c3e2e95dacf8004c3e">arm_lms_norm_instance_q31::numTaps</a>, <a class="el" href="structarm__lms__norm__instance__q31.html#a57a64c1ff102d033c1bd05043f1d9955">arm_lms_norm_instance_q31::pCoeffs</a>, <a class="el" href="structarm__lms__norm__instance__q31.html#a28d7b9e437817f83397e081967e90f3c">arm_lms_norm_instance_q31::postShift</a>, <a class="el" href="structarm__lms__norm__instance__q31.html#a6b25c96cf048b77078d62f4252a01ec4">arm_lms_norm_instance_q31::pState</a>, <a class="el" href="structarm__lms__norm__instance__q31.html#a85836d0907077b9ac660f7bbbaa9d694">arm_lms_norm_instance_q31::recipTable</a>, and <a class="el" href="structarm__lms__norm__instance__q31.html#a47c4466d644e0d8ba407995adfa9b917">arm_lms_norm_instance_q31::x0</a>.</p>
+</pre> The initial filter coefficients serve as a starting point for the adaptive filter. <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code><a class="el" href="group__LMS__NORM.html#gae12fc16232c8087345e5910fcb840be9" title="Processing function for Q31 normalized LMS filter. ">arm_lms_norm_q31()</a></code>. </dd></dl>
 
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 </div>
-<a class="anchor" id="gad47486a399dedb0bc85a5990ec5cf981"></a>
+<a class="anchor" id="gaf03debfeb77ec5a9934e1b23f1ff6c48"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
@@ -477,7 +463,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
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         <tr>
@@ -513,25 +499,22 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q15 normalized LMS filter structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pRef</td><td>points to the block of reference data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pOut</td><td>points to the block of output data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pErr</td><td>points to the block of error data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q15 normalized LMS filter structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pRef</td><td>points to the block of reference data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pOut</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pErr</td><td>points to the block of error data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.</dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format. </dd></dl>
 <dl class="section user"><dt></dt><dd>In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted. </dd></dl>
 
-<p>References <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a7aed02041f489a4f65dbd7093073d94e">__SMLALD()</a>, <a class="el" href="arm__math_8h.html#a39e9e34c2784ff8cf026430d1d84f54e">arm_recip_q15()</a>, <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a663277ff19ad0b409fb98b64b2c2750b">DELTA_Q15</a>, <a class="el" href="structarm__lms__norm__instance__q15.html#a1c81ded399919d8181026bc1c8602e7b">arm_lms_norm_instance_q15::energy</a>, <a class="el" href="structarm__lms__norm__instance__q15.html#a7ce00f21d11cfda6d963240641deea8c">arm_lms_norm_instance_q15::mu</a>, <a class="el" href="structarm__lms__norm__instance__q15.html#a9ee7a45f4f315d7996a969e25fdc7146">arm_lms_norm_instance_q15::numTaps</a>, <a class="el" href="structarm__lms__norm__instance__q15.html#ae7bca648c75a2ffa02d87852bb78bc8a">arm_lms_norm_instance_q15::pCoeffs</a>, <a class="el" href="structarm__lms__norm__instance__q15.html#aa0d435fbcf7dedb7179d4467e9b79e9f">arm_lms_norm_instance_q15::postShift</a>, <a class="el" href="structarm__lms__norm__instance__q15.html#aa4de490b3bdbd03561b76ee07901c8e3">arm_lms_norm_instance_q15::pState</a>, <a class="el" href="structarm__lms__norm__instance__q15.html#a9aabb0e4c79f3db807e7a441fa36f5f8">arm_lms_norm_instance_q15::recipTable</a>, and <a class="el" href="structarm__lms__norm__instance__q15.html#a3fc1d6f97d2c6d5324871de6895cb7e9">arm_lms_norm_instance_q15::x0</a>.</p>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q31 normalized LMS filter structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the block of input data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pRef</td><td>points to the block of reference data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pOut</td><td>points to the block of output data. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pErr</td><td>points to the block of error data. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples to process. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q31 normalized LMS filter structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the block of input data </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pRef</td><td>points to the block of reference data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pOut</td><td>points to the block of output data </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pErr</td><td>points to the block of error data </td></tr>
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-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. The reference signal should not be scaled down. After all multiply-accumulates are performed, the 2.62 accumulator is shifted and saturated to 1.31 format to yield the final result. The output signal and error signal are in 1.31 format.</dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. The reference signal should not be scaled down. After all multiply-accumulates are performed, the 2.62 accumulator is shifted and saturated to 1.31 format to yield the final result. The output signal and error signal are in 1.31 format. </dd></dl>
 <dl class="section user"><dt></dt><dd>In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted. </dd></dl>
 
-<p>References <a class="el" href="arm__math_8h.html#a71f6bee1ce1bb896739401ce962a7e6a">arm_recip_q31()</a>, <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a9a94b78de0f083bd8fadf3c3abe40431">clip_q63_to_q31()</a>, <a class="el" href="arm__math_8h.html#aad77ae594e95c5af6ae4129bd6a483c2">DELTA_Q31</a>, <a class="el" href="structarm__lms__norm__instance__q31.html#a3c0ae42869afec8555dc8e3a7ef9b386">arm_lms_norm_instance_q31::energy</a>, <a class="el" href="structarm__lms__norm__instance__q31.html#ad3dd2a2406e02fdaa7782ba6c3940a64">arm_lms_norm_instance_q31::mu</a>, <a class="el" href="structarm__lms__norm__instance__q31.html#a28e4c085af69c9c3e2e95dacf8004c3e">arm_lms_norm_instance_q31::numTaps</a>, <a class="el" href="structarm__lms__norm__instance__q31.html#a57a64c1ff102d033c1bd05043f1d9955">arm_lms_norm_instance_q31::pCoeffs</a>, <a class="el" href="structarm__lms__norm__instance__q31.html#a28d7b9e437817f83397e081967e90f3c">arm_lms_norm_instance_q31::postShift</a>, <a class="el" href="structarm__lms__norm__instance__q31.html#a6b25c96cf048b77078d62f4252a01ec4">arm_lms_norm_instance_q31::pState</a>, <a class="el" href="structarm__lms__norm__instance__q31.html#a85836d0907077b9ac660f7bbbaa9d694">arm_lms_norm_instance_q31::recipTable</a>, and <a class="el" href="structarm__lms__norm__instance__q31.html#a47c4466d644e0d8ba407995adfa9b917">arm_lms_norm_instance_q31::x0</a>.</p>
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@@ -603,7 +583,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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+<li><a class="el" href="group__LinearInterpolate.html#ga5335f60532bab8cee1e7c22f76a41805" title="Process function for the floating-point Linear Interpolation Function. ">arm_linear_interp_f32()</a></li>
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 <p><b> Refer </b> <a class="el" href="arm_linear_interp_example_f32_8c-example.html">arm_linear_interp_example_f32.c</a> </p>
@@ -146,7 +146,7 @@
 <!-- start footer part -->
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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-<tr class="separator:gaad59cea673ab358888075b040bacc71f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga7e5d633c26edd82e009517cd2347fb00"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LinearInterpolate.html#ga7e5d633c26edd82e009517cd2347fb00">arm_linear_interp_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pYData, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> x, uint32_t nValues)</td></tr>
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-<tr class="separator:gaab750789ec9230e65c3bf544029d246f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5335f60532bab8cee1e7c22f76a41805"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LinearInterpolate.html#ga5335f60532bab8cee1e7c22f76a41805">arm_linear_interp_f32</a> (<a class="el" href="structarm__linear__interp__instance__f32.html">arm_linear_interp_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> x)</td></tr>
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+<tr class="separator:ga5335f60532bab8cee1e7c22f76a41805"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:gaeaf31289367ac36c4727939e1ea73312"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:ga9a308a0de4d4e4fe4a262a99b17121cd"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafabd4124a8724055329b5c484419f936"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__LinearInterpolate.html#gafabd4124a8724055329b5c484419f936">arm_linear_interp_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pYData, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> x, uint32_t nValues)</td></tr>
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+<tr class="separator:gafabd4124a8724055329b5c484419f936"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>end of Inverse park group</p>
 <p>Linear interpolation is a method of curve fitting using linear polynomials. Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line</p>
 <dl class="section user"><dt></dt><dd><div class="image">
 <img src="LinearInterp.gif" alt="LinearInterp.gif"/>
@@ -146,12 +146,12 @@
 <dl class="section user"><dt></dt><dd>This set of functions implements Linear interpolation process for Q7, Q15, Q31, and floating-point data types. The functions operate on a single sample of data and each call to the function returns a single processed value. <code>S</code> points to an instance of the Linear Interpolate function data structure. <code>x</code> is the input sample value. The functions returns the output value.</dd></dl>
 <dl class="section user"><dt></dt><dd>if x is outside of the table boundary, Linear interpolation returns first value of the table if x is below input range and returns last value of table if x is above range. </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga790bbc697724ee432f840cfebbbae1f4"></a>
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+          <td class="memname">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> arm_linear_interp_f32 </td>
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 <dl class="section return"><dt>Returns</dt><dd>y processed output sample. </dd></dl>
 <dl><dt><b>Examples: </b></dt><dd><a class="el" href="arm_linear_interp_example_f32_8c-example.html#a13">arm_linear_interp_example_f32.c</a>.</dd>
 </dl>
-<p>References <a class="el" href="structarm__linear__interp__instance__f32.html#a95f02a926b16d35359aca5b31e813b11">arm_linear_interp_instance_f32::nValues</a>, <a class="el" href="structarm__linear__interp__instance__f32.html#ab373001f6afad0850359c344a4d7eee4">arm_linear_interp_instance_f32::pYData</a>, <a class="el" href="structarm__linear__interp__instance__f32.html#a08352dc6ea82fbc0827408e018535481">arm_linear_interp_instance_f32::x1</a>, and <a class="el" href="structarm__linear__interp__instance__f32.html#aa8e2d686b5434a406d390b347b183511">arm_linear_interp_instance_f32::xSpacing</a>.</p>
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-<p>Referenced by <a class="el" href="arm__linear__interp__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
-
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+          <td class="memname">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> arm_linear_interp_q15 </td>
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+          <td class="memname">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> arm_linear_interp_q31 </td>
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+          <td class="memname">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> arm_linear_interp_q7 </td>
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input matrix structure </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input matrix structure </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to first input matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to second input matrix structure </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output matrix structure </td></tr>
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-<dl class="section return"><dt>Returns</dt><dd>The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. </dd></dl>
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-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__matrix__instance__f32.html#acdd1fb73734df68b89565c54f1dd8ae2">arm_matrix_instance_f32::numCols</a>, <a class="el" href="structarm__matrix__instance__f32.html#a23f4e34d70a82c9cad7612add5640b7b">arm_matrix_instance_f32::numRows</a>, <a class="el" href="structarm__matrix__instance__f32.html#af3917c032600a9dfd5ed4a96f074910a">arm_matrix_instance_f32::pData</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a> : Matrix size check failed </li>
+</ul>
+</dd></dl>
 
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 <dl class="params"><dt>Parameters</dt><dd>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input matrix structure </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to first input matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to second input matrix structure </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output matrix structure </td></tr>
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 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a08bea9cb2c311d925224c0d6829edb8c">__QADD16()</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__matrix__instance__q15.html#acbbce67ba058d8e1c867c71d57288c97">arm_matrix_instance_q15::numCols</a>, <a class="el" href="structarm__matrix__instance__q15.html#a9bac6ed54be287c4d4f01a1a28be65f5">arm_matrix_instance_q15::numRows</a>, <a class="el" href="structarm__matrix__instance__q15.html#a6da33a5553e634787d0f515cf8d724af">arm_matrix_instance_q15::pData</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a> : Matrix size check failed</li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. </dd></dl>
 
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-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input matrix structure </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to first input matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to second input matrix structure </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output matrix structure </td></tr>
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-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated. </dd></dl>
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-<p>References <a class="el" href="arm__math_8h.html#ab9f3cfbfb0f12975ab91ddb179160dcb">__QADD()</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__matrix__instance__q31.html#abd161da7614eda927157f18b698074b1">arm_matrix_instance_q31::numCols</a>, <a class="el" href="structarm__matrix__instance__q31.html#a63bacac158a821c8cfc06088d251598c">arm_matrix_instance_q31::numRows</a>, <a class="el" href="structarm__matrix__instance__q31.html#a09a64267c0579fef086efc9059741e56">arm_matrix_instance_q31::pData</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a> : Matrix size check failed</li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated. </dd></dl>
 
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@@ -272,7 +276,7 @@
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/group__MatrixInit.html b/docs/DSP/html/group__MatrixInit.html
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-    <tr><td class="paramdir">[in]</td><td class="paramname">nRows</td><td>number of rows in the matrix. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">nColumns</td><td>number of columns in the matrix. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pData</td><td>points to the matrix data array. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the floating-point matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">nRows</td><td>number of rows in the matrix </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">nColumns</td><td>number of columns in the matrix </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pData</td><td>points to the matrix data array </td></tr>
   </table>
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 </dl>
 <dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
-<p>References <a class="el" href="structarm__matrix__instance__f32.html#acdd1fb73734df68b89565c54f1dd8ae2">arm_matrix_instance_f32::numCols</a>, <a class="el" href="structarm__matrix__instance__f32.html#a23f4e34d70a82c9cad7612add5640b7b">arm_matrix_instance_f32::numRows</a>, and <a class="el" href="structarm__matrix__instance__f32.html#af3917c032600a9dfd5ed4a96f074910a">arm_matrix_instance_f32::pData</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__class__marks__example__f32_8c.html#a196718f834091385d38586a0ce4009dc">main()</a>.</p>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">nRows</td><td>number of rows in the matrix. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">nColumns</td><td>number of columns in the matrix. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pData</td><td>points to the matrix data array. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the floating-point matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">nRows</td><td>number of rows in the matrix </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">nColumns</td><td>number of columns in the matrix </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pData</td><td>points to the matrix data array </td></tr>
   </table>
   </dd>
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
-<p>References <a class="el" href="structarm__matrix__instance__q15.html#acbbce67ba058d8e1c867c71d57288c97">arm_matrix_instance_q15::numCols</a>, <a class="el" href="structarm__matrix__instance__q15.html#a9bac6ed54be287c4d4f01a1a28be65f5">arm_matrix_instance_q15::numRows</a>, and <a class="el" href="structarm__matrix__instance__q15.html#a6da33a5553e634787d0f515cf8d724af">arm_matrix_instance_q15::pData</a>.</p>
-
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 <a class="anchor" id="ga48a5e5d37e1f062cc57fcfaf683343cc"></a>
@@ -268,17 +262,15 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the floating-point matrix structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">nRows</td><td>number of rows in the matrix. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">nColumns</td><td>number of columns in the matrix. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pData</td><td>points to the matrix data array. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q31 matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">nRows</td><td>number of rows in the matrix </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">nColumns</td><td>number of columns in the matrix </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pData</td><td>points to the matrix data array </td></tr>
   </table>
   </dd>
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
-<p>References <a class="el" href="structarm__matrix__instance__q31.html#abd161da7614eda927157f18b698074b1">arm_matrix_instance_q31::numCols</a>, <a class="el" href="structarm__matrix__instance__q31.html#a63bacac158a821c8cfc06088d251598c">arm_matrix_instance_q31::numRows</a>, and <a class="el" href="structarm__matrix__instance__q31.html#a09a64267c0579fef086efc9059741e56">arm_matrix_instance_q31::pData</a>.</p>
-
 </div>
 </div>
 </div><!-- contents -->
@@ -286,7 +278,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__MatrixInv.html b/docs/DSP/html/group__MatrixInv.html
index c7c86c5..17b154c 100644
--- a/docs/DSP/html/group__MatrixInv.html
+++ b/docs/DSP/html/group__MatrixInv.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -120,7 +120,7 @@
 <tr class="memdesc:ga542be7aabbf7a2297a4b62cf212910e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point matrix inverse.  <a href="#ga542be7aabbf7a2297a4b62cf212910e3">More...</a><br/></td></tr>
 <tr class="separator:ga542be7aabbf7a2297a4b62cf212910e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gaede2367c02df083cc915ddd5d8fae838"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MatrixInv.html#gaede2367c02df083cc915ddd5d8fae838">arm_mat_inverse_f64</a> (const <a class="el" href="structarm__matrix__instance__f64.html">arm_matrix_instance_f64</a> *pSrc, <a class="el" href="structarm__matrix__instance__f64.html">arm_matrix_instance_f64</a> *pDst)</td></tr>
-<tr class="memdesc:gaede2367c02df083cc915ddd5d8fae838"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point matrix inverse.  <a href="#gaede2367c02df083cc915ddd5d8fae838">More...</a><br/></td></tr>
+<tr class="memdesc:gaede2367c02df083cc915ddd5d8fae838"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point (64 bit) matrix inverse.  <a href="#gaede2367c02df083cc915ddd5d8fae838">More...</a><br/></td></tr>
 <tr class="separator:gaede2367c02df083cc915ddd5d8fae838"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
@@ -158,16 +158,17 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to input matrix structure </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input matrix structure </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output matrix structure </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns <code>ARM_MATH_SIZE_MISMATCH</code> if the input matrix is not square or if the size of the output matrix does not match the size of the input matrix. If the input matrix is found to be singular (non-invertible), then the function returns <code>ARM_MATH_SINGULAR</code>. Otherwise, the function returns <code>ARM_MATH_SUCCESS</code>. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a91509ea9c819dbd592ac13a6b05382dc">ARM_MATH_SINGULAR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__matrix__instance__f32.html#acdd1fb73734df68b89565c54f1dd8ae2">arm_matrix_instance_f32::numCols</a>, <a class="el" href="structarm__matrix__instance__f32.html#a23f4e34d70a82c9cad7612add5640b7b">arm_matrix_instance_f32::numRows</a>, <a class="el" href="structarm__matrix__instance__f32.html#af3917c032600a9dfd5ed4a96f074910a">arm_matrix_instance_f32::pData</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__matrix__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a> : Matrix size check failed</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a91509ea9c819dbd592ac13a6b05382dc">ARM_MATH_SINGULAR</a> : Input matrix is found to be singular (non-invertible) </li>
+</ul>
+</dd></dl>
 
 </div>
 </div>
@@ -194,16 +195,20 @@
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Floating-point matrix inverse.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to input matrix structure </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input matrix structure </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output matrix structure </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns <code>ARM_MATH_SIZE_MISMATCH</code> if the input matrix is not square or if the size of the output matrix does not match the size of the input matrix. If the input matrix is found to be singular (non-invertible), then the function returns <code>ARM_MATH_SINGULAR</code>. Otherwise, the function returns <code>ARM_MATH_SUCCESS</code>. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a91509ea9c819dbd592ac13a6b05382dc">ARM_MATH_SINGULAR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__matrix__instance__f64.html#ab0f0399aff3201880e2d8a447de9a7ee">arm_matrix_instance_f64::numCols</a>, <a class="el" href="structarm__matrix__instance__f64.html#a8b44d1e5003345047c4ead9e1593bf22">arm_matrix_instance_f64::numRows</a>, <a class="el" href="structarm__matrix__instance__f64.html#a5b2475f8ff1e4818955cdd18bc40a097">arm_matrix_instance_f64::pData</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a> : Matrix size check failed</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a91509ea9c819dbd592ac13a6b05382dc">ARM_MATH_SINGULAR</a> : Input matrix is found to be singular (non-invertible) </li>
+</ul>
+</dd></dl>
 
 </div>
 </div>
@@ -212,7 +217,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__MatrixMult.html b/docs/DSP/html/group__MatrixMult.html
index 49e3695..d8655e2 100644
--- a/docs/DSP/html/group__MatrixMult.html
+++ b/docs/DSP/html/group__MatrixMult.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -120,10 +120,10 @@
 <tr class="memdesc:ga917bf0270310c1d3f0eda1fc7c0026a0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point matrix multiplication.  <a href="#ga917bf0270310c1d3f0eda1fc7c0026a0">More...</a><br/></td></tr>
 <tr class="separator:ga917bf0270310c1d3f0eda1fc7c0026a0"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga08f37d93a5bfef0c5000dc5e0a411f93"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MatrixMult.html#ga08f37d93a5bfef0c5000dc5e0a411f93">arm_mat_mult_fast_q15</a> (const <a class="el" href="structarm__matrix__instance__q15.html">arm_matrix_instance_q15</a> *pSrcA, const <a class="el" href="structarm__matrix__instance__q15.html">arm_matrix_instance_q15</a> *pSrcB, <a class="el" href="structarm__matrix__instance__q15.html">arm_matrix_instance_q15</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState)</td></tr>
-<tr class="memdesc:ga08f37d93a5bfef0c5000dc5e0a411f93"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4.  <a href="#ga08f37d93a5bfef0c5000dc5e0a411f93">More...</a><br/></td></tr>
+<tr class="memdesc:ga08f37d93a5bfef0c5000dc5e0a411f93"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 matrix multiplication (fast variant).  <a href="#ga08f37d93a5bfef0c5000dc5e0a411f93">More...</a><br/></td></tr>
 <tr class="separator:ga08f37d93a5bfef0c5000dc5e0a411f93"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga2785e8c1b785348b0c439b56aaf585a3"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MatrixMult.html#ga2785e8c1b785348b0c439b56aaf585a3">arm_mat_mult_fast_q31</a> (const <a class="el" href="structarm__matrix__instance__q31.html">arm_matrix_instance_q31</a> *pSrcA, const <a class="el" href="structarm__matrix__instance__q31.html">arm_matrix_instance_q31</a> *pSrcB, <a class="el" href="structarm__matrix__instance__q31.html">arm_matrix_instance_q31</a> *pDst)</td></tr>
-<tr class="memdesc:ga2785e8c1b785348b0c439b56aaf585a3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4.  <a href="#ga2785e8c1b785348b0c439b56aaf585a3">More...</a><br/></td></tr>
+<tr class="memdesc:ga2785e8c1b785348b0c439b56aaf585a3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 matrix multiplication (fast variant).  <a href="#ga2785e8c1b785348b0c439b56aaf585a3">More...</a><br/></td></tr>
 <tr class="separator:ga2785e8c1b785348b0c439b56aaf585a3"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga7521d59196189bb6dde26e8cdfb66e21"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__MatrixMult.html#ga7521d59196189bb6dde26e8cdfb66e21">arm_mat_mult_q15</a> (const <a class="el" href="structarm__matrix__instance__q15.html">arm_matrix_instance_q15</a> *pSrcA, const <a class="el" href="structarm__matrix__instance__q15.html">arm_matrix_instance_q15</a> *pSrcB, <a class="el" href="structarm__matrix__instance__q15.html">arm_matrix_instance_q15</a> *pDst, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pState)</td></tr>
 <tr class="memdesc:ga7521d59196189bb6dde26e8cdfb66e21"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 matrix multiplication.  <a href="#ga7521d59196189bb6dde26e8cdfb66e21">More...</a><br/></td></tr>
@@ -179,10 +179,6 @@
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. </dd></dl>
 
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__matrix__instance__f32.html#acdd1fb73734df68b89565c54f1dd8ae2">arm_matrix_instance_f32::numCols</a>, <a class="el" href="structarm__matrix__instance__f32.html#a23f4e34d70a82c9cad7612add5640b7b">arm_matrix_instance_f32::numRows</a>, <a class="el" href="structarm__matrix__instance__f32.html#af3917c032600a9dfd5ed4a96f074910a">arm_matrix_instance_f32::pData</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__class__marks__example__f32_8c.html#a196718f834091385d38586a0ce4009dc">main()</a>.</p>
-
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 </div>
 <a class="anchor" id="ga08f37d93a5bfef0c5000dc5e0a411f93"></a>
@@ -220,22 +216,24 @@
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input matrix structure </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input matrix structure </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output matrix structure </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the array for storing intermediate results </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input matrix structure </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the array for storing intermediate results </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The difference between the function <a class="el" href="group__MatrixMult.html#ga7521d59196189bb6dde26e8cdfb66e21" title="Q15 matrix multiplication. ">arm_mat_mult_q15()</a> and this fast variant is that the fast variant use a 32-bit rather than a 64-bit accumulator. The result of each 1.15 x 1.15 multiplication is truncated to 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 format. Finally, the accumulator is saturated and converted to a 1.15 result.</dd></dl>
-<dl class="section user"><dt></dt><dd>The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 16 bits of each multiplication result. In order to avoid overflows completely the input signals must be scaled down. Scale down one of the input matrices by log2(numColsA) bits to avoid overflows, as a total of numColsA additions are computed internally for each output element.</dd></dl>
-<dl class="section user"><dt></dt><dd>See <code><a class="el" href="group__MatrixMult.html#ga7521d59196189bb6dde26e8cdfb66e21" title="Q15 matrix multiplication. ">arm_mat_mult_q15()</a></code> for a slower implementation of this function which uses 64-bit accumulation to provide higher precision. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#aa611fdbf6c56c46553701d6596a79aaf">__SMLAD()</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__matrix__instance__q15.html#acbbce67ba058d8e1c867c71d57288c97">arm_matrix_instance_q15::numCols</a>, <a class="el" href="structarm__matrix__instance__q15.html#a9bac6ed54be287c4d4f01a1a28be65f5">arm_matrix_instance_q15::numRows</a>, <a class="el" href="structarm__matrix__instance__q15.html#a6da33a5553e634787d0f515cf8d724af">arm_matrix_instance_q15::pData</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a> : Matrix size check failed</li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The difference between the function <a class="el" href="group__MatrixMult.html#ga7521d59196189bb6dde26e8cdfb66e21">arm_mat_mult_q15()</a> and this fast variant is that the fast variant use a 32-bit rather than a 64-bit accumulator. The result of each 1.15 x 1.15 multiplication is truncated to 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 format. Finally, the accumulator is saturated and converted to a 1.15 result. </dd></dl>
+<dl class="section user"><dt></dt><dd>The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 16 bits of each multiplication result. In order to avoid overflows completely the input signals must be scaled down. Scale down one of the input matrices by log2(numColsA) bits to avoid overflows, as a total of numColsA additions are computed internally for each output element. </dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__MatrixMult.html#ga7521d59196189bb6dde26e8cdfb66e21">arm_mat_mult_q15()</a> for a slower implementation of this function which uses 64-bit accumulation to provide higher precision. </dd></dl>
 
 </div>
 </div>
@@ -268,21 +266,23 @@
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input matrix structure </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input matrix structure </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input matrix structure </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output matrix structure </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The difference between the function <a class="el" href="group__MatrixMult.html#ga2ec612a8c2c4916477fb9bc1ab548a6e" title="Q31 matrix multiplication. ">arm_mat_mult_q31()</a> and this fast variant is that the fast variant use a 32-bit rather than a 64-bit accumulator. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 format. Finally, the accumulator is saturated and converted to a 1.31 result.</dd></dl>
-<dl class="section user"><dt></dt><dd>The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signals must be scaled down. Scale down one of the input matrices by log2(numColsA) bits to avoid overflows, as a total of numColsA additions are computed internally for each output element.</dd></dl>
-<dl class="section user"><dt></dt><dd>See <code><a class="el" href="group__MatrixMult.html#ga2ec612a8c2c4916477fb9bc1ab548a6e" title="Q31 matrix multiplication. ">arm_mat_mult_q31()</a></code> for a slower implementation of this function which uses 64-bit accumulation to provide higher precision. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a0162015f6d3458e2934a265481460ec4">__SMMLA()</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__matrix__instance__q31.html#abd161da7614eda927157f18b698074b1">arm_matrix_instance_q31::numCols</a>, <a class="el" href="structarm__matrix__instance__q31.html#a63bacac158a821c8cfc06088d251598c">arm_matrix_instance_q31::numRows</a>, <a class="el" href="structarm__matrix__instance__q31.html#a09a64267c0579fef086efc9059741e56">arm_matrix_instance_q31::pData</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a> : Matrix size check failed</li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The difference between the function <a class="el" href="group__MatrixMult.html#ga2ec612a8c2c4916477fb9bc1ab548a6e">arm_mat_mult_q31()</a> and this fast variant is that the fast variant use a 32-bit rather than a 64-bit accumulator. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 format. Finally, the accumulator is saturated and converted to a 1.31 result. </dd></dl>
+<dl class="section user"><dt></dt><dd>The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signals must be scaled down. Scale down one of the input matrices by log2(numColsA) bits to avoid overflows, as a total of numColsA additions are computed internally for each output element. </dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__MatrixMult.html#ga2ec612a8c2c4916477fb9bc1ab548a6e">arm_mat_mult_q31()</a> for a slower implementation of this function which uses 64-bit accumulation to provide higher precision. </dd></dl>
 
 </div>
 </div>
@@ -323,19 +323,20 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input matrix structure </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input matrix structure </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output matrix structure </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pState</td><td>points to the array for storing intermediate results (Unused) </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input matrix structure </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pState</td><td>points to the array for storing intermediate results (Unused) </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 64-bit internal accumulator. The inputs to the multiplications are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.</dd></dl>
-<dl class="section user"><dt></dt><dd>Refer to <code><a class="el" href="group__MatrixMult.html#ga08f37d93a5bfef0c5000dc5e0a411f93" title="Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4. ">arm_mat_mult_fast_q15()</a></code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a7aed02041f489a4f65dbd7093073d94e">__SMLALD()</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__matrix__instance__q15.html#acbbce67ba058d8e1c867c71d57288c97">arm_matrix_instance_q15::numCols</a>, <a class="el" href="structarm__matrix__instance__q15.html#a9bac6ed54be287c4d4f01a1a28be65f5">arm_matrix_instance_q15::numRows</a>, <a class="el" href="structarm__matrix__instance__q15.html#a6da33a5553e634787d0f515cf8d724af">arm_matrix_instance_q15::pData</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a> : Matrix size check failed</li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 64-bit accumulator. The inputs to the multiplications are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format. </dd></dl>
+<dl class="section user"><dt></dt><dd>Refer to <a class="el" href="group__MatrixMult.html#ga08f37d93a5bfef0c5000dc5e0a411f93">arm_mat_mult_fast_q15()</a> for a faster but less precise version of this function. </dd></dl>
 
 </div>
 </div>
@@ -370,18 +371,19 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input matrix structure </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input matrix structure </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input matrix structure </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output matrix structure </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. The input is thus scaled down by log2(numColsA) bits to avoid overflows, as a total of numColsA additions are performed internally. The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.</dd></dl>
-<dl class="section user"><dt></dt><dd>See <code><a class="el" href="group__MatrixMult.html#ga2785e8c1b785348b0c439b56aaf585a3" title="Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4. ">arm_mat_mult_fast_q31()</a></code> for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="arm__math_8h.html#a9a94b78de0f083bd8fadf3c3abe40431">clip_q63_to_q31()</a>, <a class="el" href="structarm__matrix__instance__q31.html#abd161da7614eda927157f18b698074b1">arm_matrix_instance_q31::numCols</a>, <a class="el" href="structarm__matrix__instance__q31.html#a63bacac158a821c8cfc06088d251598c">arm_matrix_instance_q31::numRows</a>, <a class="el" href="structarm__matrix__instance__q31.html#a09a64267c0579fef086efc9059741e56">arm_matrix_instance_q31::pData</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a> : Matrix size check failed</li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. The input is thus scaled down by log2(numColsA) bits to avoid overflows, as a total of numColsA additions are performed internally. The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result. </dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__MatrixMult.html#ga2785e8c1b785348b0c439b56aaf585a3">arm_mat_mult_fast_q31()</a> for a faster but less precise implementation of this function. </dd></dl>
 
 </div>
 </div>
@@ -390,7 +392,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__MatrixScale.html b/docs/DSP/html/group__MatrixScale.html
index 38b929c..f6b51b7 100644
--- a/docs/DSP/html/group__MatrixScale.html
+++ b/docs/DSP/html/group__MatrixScale.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -168,15 +168,17 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to input matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input matrix </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">scale</td><td>scale factor to be applied </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output matrix structure </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output matrix structure </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__matrix__instance__f32.html#acdd1fb73734df68b89565c54f1dd8ae2">arm_matrix_instance_f32::numCols</a>, <a class="el" href="structarm__matrix__instance__f32.html#a23f4e34d70a82c9cad7612add5640b7b">arm_matrix_instance_f32::numRows</a>, <a class="el" href="structarm__matrix__instance__f32.html#af3917c032600a9dfd5ed4a96f074910a">arm_matrix_instance_f32::pData</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a> : Matrix size check failed </li>
+</ul>
+</dd></dl>
 
 </div>
 </div>
@@ -217,18 +219,19 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to input matrix </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input matrix </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">scaleFract</td><td>fractional portion of the scale factor </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">shift</td><td>number of bits to shift the result by </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output matrix structure </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output matrix structure </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format. These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__matrix__instance__q15.html#acbbce67ba058d8e1c867c71d57288c97">arm_matrix_instance_q15::numCols</a>, <a class="el" href="structarm__matrix__instance__q15.html#a9bac6ed54be287c4d4f01a1a28be65f5">arm_matrix_instance_q15::numRows</a>, <a class="el" href="structarm__matrix__instance__q15.html#a6da33a5553e634787d0f515cf8d724af">arm_matrix_instance_q15::pData</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a> : Matrix size check failed</li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format. These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format. </dd></dl>
 
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@@ -269,18 +272,19 @@
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 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to input matrix </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input matrix </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">scaleFract</td><td>fractional portion of the scale factor </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">shift</td><td>number of bits to shift the result by </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output matrix structure </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output matrix structure </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format. These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__matrix__instance__q31.html#abd161da7614eda927157f18b698074b1">arm_matrix_instance_q31::numCols</a>, <a class="el" href="structarm__matrix__instance__q31.html#a63bacac158a821c8cfc06088d251598c">arm_matrix_instance_q31::numRows</a>, <a class="el" href="structarm__matrix__instance__q31.html#a09a64267c0579fef086efc9059741e56">arm_matrix_instance_q31::pData</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a> : Matrix size check failed</li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format. These are multiplied to yield a 2.62 intermediate result which is shifted with saturation to 1.31 format. </dd></dl>
 
 </div>
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@@ -289,7 +293,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__MatrixSub.html b/docs/DSP/html/group__MatrixSub.html
index f3559ea..3c4955a 100644
--- a/docs/DSP/html/group__MatrixSub.html
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   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
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 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input matrix structure </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input matrix structure </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input matrix structure </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output matrix structure </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__matrix__instance__f32.html#acdd1fb73734df68b89565c54f1dd8ae2">arm_matrix_instance_f32::numCols</a>, <a class="el" href="structarm__matrix__instance__f32.html#a23f4e34d70a82c9cad7612add5640b7b">arm_matrix_instance_f32::numRows</a>, <a class="el" href="structarm__matrix__instance__f32.html#af3917c032600a9dfd5ed4a96f074910a">arm_matrix_instance_f32::pData</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a> : Matrix size check failed </li>
+</ul>
+</dd></dl>
 
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 </div>
@@ -208,17 +210,18 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input matrix structure </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input matrix structure </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input matrix structure </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output matrix structure </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a6e4703dc08d1b82eab7f5ef96edb59bb">__QSUB16()</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__matrix__instance__q15.html#acbbce67ba058d8e1c867c71d57288c97">arm_matrix_instance_q15::numCols</a>, <a class="el" href="structarm__matrix__instance__q15.html#a9bac6ed54be287c4d4f01a1a28be65f5">arm_matrix_instance_q15::numRows</a>, <a class="el" href="structarm__matrix__instance__q15.html#a6da33a5553e634787d0f515cf8d724af">arm_matrix_instance_q15::pData</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a> : Matrix size check failed</li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. </dd></dl>
 
 </div>
 </div>
@@ -253,17 +256,18 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input matrix structure </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input matrix structure </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input matrix structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input matrix structure </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output matrix structure </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a15e896d0146c280e600d00f609832350">__QSUB()</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__matrix__instance__q31.html#abd161da7614eda927157f18b698074b1">arm_matrix_instance_q31::numCols</a>, <a class="el" href="structarm__matrix__instance__q31.html#a63bacac158a821c8cfc06088d251598c">arm_matrix_instance_q31::numRows</a>, <a class="el" href="structarm__matrix__instance__q31.html#a09a64267c0579fef086efc9059741e56">arm_matrix_instance_q31::pData</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a> : Matrix size check failed</li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated. </dd></dl>
 
 </div>
 </div>
@@ -272,7 +276,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__MatrixTrans.html b/docs/DSP/html/group__MatrixTrans.html
index 645d504..4ea40b0 100644
--- a/docs/DSP/html/group__MatrixTrans.html
+++ b/docs/DSP/html/group__MatrixTrans.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -127,7 +127,8 @@
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 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Tranposes a matrix. Transposing an <code>M x N</code> matrix flips it around the center diagonal and results in an <code>N x M</code> matrix. </p>
+<p>Tranposes a matrix.</p>
+<p>Transposing an <code>M x N</code> matrix flips it around the center diagonal and results in an <code>N x M</code> matrix. </p>
 <div class="image">
 <img src="MatrixTranspose.gif" alt="MatrixTranspose.gif"/>
 <div class="caption">
@@ -158,16 +159,16 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input matrix </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output matrix </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input matrix </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output matrix </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__matrix__instance__f32.html#acdd1fb73734df68b89565c54f1dd8ae2">arm_matrix_instance_f32::numCols</a>, <a class="el" href="structarm__matrix__instance__f32.html#a23f4e34d70a82c9cad7612add5640b7b">arm_matrix_instance_f32::numRows</a>, <a class="el" href="structarm__matrix__instance__f32.html#af3917c032600a9dfd5ed4a96f074910a">arm_matrix_instance_f32::pData</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__matrix__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a> : Matrix size check failed </li>
+</ul>
+</dd></dl>
 
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@@ -196,14 +197,16 @@
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 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input matrix </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output matrix </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input matrix </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output matrix </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__matrix__instance__q15.html#acbbce67ba058d8e1c867c71d57288c97">arm_matrix_instance_q15::numCols</a>, <a class="el" href="structarm__matrix__instance__q15.html#a9bac6ed54be287c4d4f01a1a28be65f5">arm_matrix_instance_q15::numRows</a>, <a class="el" href="structarm__matrix__instance__q15.html#a6da33a5553e634787d0f515cf8d724af">arm_matrix_instance_q15::pData</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a> : Matrix size check failed </li>
+</ul>
+</dd></dl>
 
 </div>
 </div>
@@ -232,14 +235,16 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input matrix </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output matrix </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input matrix </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output matrix </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__matrix__instance__q31.html#abd161da7614eda927157f18b698074b1">arm_matrix_instance_q31::numCols</a>, <a class="el" href="structarm__matrix__instance__q31.html#a63bacac158a821c8cfc06088d251598c">arm_matrix_instance_q31::numRows</a>, <a class="el" href="structarm__matrix__instance__q31.html#a09a64267c0579fef086efc9059741e56">arm_matrix_instance_q31::pData</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a7071b92f1f6bc3c5c312a237ea91105b">ARM_MATH_SIZE_MISMATCH</a> : Matrix size check failed </li>
+</ul>
+</dd></dl>
 
 </div>
 </div>
@@ -248,7 +253,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__Max.html b/docs/DSP/html/group__Max.html
index 2a15c32..c80955c 100644
--- a/docs/DSP/html/group__Max.html
+++ b/docs/DSP/html/group__Max.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,30 +116,30 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga5b89d1b04575aeec494f678695fb87d8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Max.html#ga5b89d1b04575aeec494f678695fb87d8">arm_max_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult, uint32_t *pIndex)</td></tr>
-<tr class="memdesc:ga5b89d1b04575aeec494f678695fb87d8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a floating-point vector.  <a href="#ga5b89d1b04575aeec494f678695fb87d8">More...</a><br/></td></tr>
-<tr class="separator:ga5b89d1b04575aeec494f678695fb87d8"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac132856c68f4bf2a056eaad5921c7880"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Max.html#gac132856c68f4bf2a056eaad5921c7880">arm_max_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult, uint32_t *pIndex)</td></tr>
-<tr class="memdesc:gac132856c68f4bf2a056eaad5921c7880"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a Q15 vector.  <a href="#gac132856c68f4bf2a056eaad5921c7880">More...</a><br/></td></tr>
-<tr class="separator:gac132856c68f4bf2a056eaad5921c7880"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaff7cbd4e955382def06724cc4cc85795"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Max.html#gaff7cbd4e955382def06724cc4cc85795">arm_max_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult, uint32_t *pIndex)</td></tr>
-<tr class="memdesc:gaff7cbd4e955382def06724cc4cc85795"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a Q31 vector.  <a href="#gaff7cbd4e955382def06724cc4cc85795">More...</a><br/></td></tr>
-<tr class="separator:gaff7cbd4e955382def06724cc4cc85795"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga6afd64d381b5c232de59163ebfe71e35"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Max.html#ga6afd64d381b5c232de59163ebfe71e35">arm_max_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pResult, uint32_t *pIndex)</td></tr>
-<tr class="memdesc:ga6afd64d381b5c232de59163ebfe71e35"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a Q7 vector.  <a href="#ga6afd64d381b5c232de59163ebfe71e35">More...</a><br/></td></tr>
-<tr class="separator:ga6afd64d381b5c232de59163ebfe71e35"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad1eabd31544fe59c414d9ce5bd0cc151"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Max.html#gad1eabd31544fe59c414d9ce5bd0cc151">arm_max_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult, uint32_t *pIndex)</td></tr>
+<tr class="memdesc:gad1eabd31544fe59c414d9ce5bd0cc151"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a floating-point vector.  <a href="#gad1eabd31544fe59c414d9ce5bd0cc151">More...</a><br/></td></tr>
+<tr class="separator:gad1eabd31544fe59c414d9ce5bd0cc151"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaea9ba2039faeca04b034989a2a2a9e36"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Max.html#gaea9ba2039faeca04b034989a2a2a9e36">arm_max_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult, uint32_t *pIndex)</td></tr>
+<tr class="memdesc:gaea9ba2039faeca04b034989a2a2a9e36"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a Q15 vector.  <a href="#gaea9ba2039faeca04b034989a2a2a9e36">More...</a><br/></td></tr>
+<tr class="separator:gaea9ba2039faeca04b034989a2a2a9e36"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga74015f9e9852c710a981c5b488417298"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Max.html#ga74015f9e9852c710a981c5b488417298">arm_max_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult, uint32_t *pIndex)</td></tr>
+<tr class="memdesc:ga74015f9e9852c710a981c5b488417298"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a Q31 vector.  <a href="#ga74015f9e9852c710a981c5b488417298">More...</a><br/></td></tr>
+<tr class="separator:ga74015f9e9852c710a981c5b488417298"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga504abf036854dc0c4a43bd9a27827863"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Max.html#ga504abf036854dc0c4a43bd9a27827863">arm_max_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pResult, uint32_t *pIndex)</td></tr>
+<tr class="memdesc:ga504abf036854dc0c4a43bd9a27827863"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum value of a Q7 vector.  <a href="#ga504abf036854dc0c4a43bd9a27827863">More...</a><br/></td></tr>
+<tr class="separator:ga504abf036854dc0c4a43bd9a27827863"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>Computes the maximum value of an array of data. The function returns both the maximum value and its position within the array. There are separate functions for floating-point, Q31, Q15, and Q7 data types. </p>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga5b89d1b04575aeec494f678695fb87d8"></a>
+<a class="anchor" id="gad1eabd31544fe59c414d9ce5bd0cc151"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_max_f32 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -169,27 +169,25 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>maximum value returned here </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pIndex</td><td>index of maximum value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>maximum value returned here </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pIndex</td><td>index of maximum value returned here </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>Referenced by <a class="el" href="arm__class__marks__example__f32_8c.html#a196718f834091385d38586a0ce4009dc">main()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gac132856c68f4bf2a056eaad5921c7880"></a>
+<a class="anchor" id="gaea9ba2039faeca04b034989a2a2a9e36"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_max_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -219,25 +217,25 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>maximum value returned here </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pIndex</td><td>index of maximum value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>maximum value returned here </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pIndex</td><td>index of maximum value returned here </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gaff7cbd4e955382def06724cc4cc85795"></a>
+<a class="anchor" id="ga74015f9e9852c710a981c5b488417298"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_max_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -267,25 +265,25 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>maximum value returned here </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pIndex</td><td>index of maximum value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>maximum value returned here </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pIndex</td><td>index of maximum value returned here </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga6afd64d381b5c232de59163ebfe71e35"></a>
+<a class="anchor" id="ga504abf036854dc0c4a43bd9a27827863"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_max_q7 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -315,14 +313,14 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>maximum value returned here </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pIndex</td><td>index of maximum value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>maximum value returned here </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pIndex</td><td>index of maximum value returned here </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -331,7 +329,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__Max.js b/docs/DSP/html/group__Max.js
index 1fb9e27..42fadb5 100644
--- a/docs/DSP/html/group__Max.js
+++ b/docs/DSP/html/group__Max.js
@@ -1,7 +1,7 @@
 var group__Max =
 [
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 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gaf62b1673740fc516ea64daf777b7d74a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Min.html#gaf62b1673740fc516ea64daf777b7d74a">arm_min_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult, uint32_t *pIndex)</td></tr>
-<tr class="memdesc:gaf62b1673740fc516ea64daf777b7d74a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum value of a floating-point vector.  <a href="#gaf62b1673740fc516ea64daf777b7d74a">More...</a><br/></td></tr>
-<tr class="separator:gaf62b1673740fc516ea64daf777b7d74a"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad065e37535ebb726750ac1545cb3fa6f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Min.html#gad065e37535ebb726750ac1545cb3fa6f">arm_min_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult, uint32_t *pIndex)</td></tr>
-<tr class="memdesc:gad065e37535ebb726750ac1545cb3fa6f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum value of a Q15 vector.  <a href="#gad065e37535ebb726750ac1545cb3fa6f">More...</a><br/></td></tr>
-<tr class="separator:gad065e37535ebb726750ac1545cb3fa6f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab20faeceb5ff5d2d9dd628c2ecf41303"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Min.html#gab20faeceb5ff5d2d9dd628c2ecf41303">arm_min_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult, uint32_t *pIndex)</td></tr>
-<tr class="memdesc:gab20faeceb5ff5d2d9dd628c2ecf41303"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum value of a Q31 vector.  <a href="#gab20faeceb5ff5d2d9dd628c2ecf41303">More...</a><br/></td></tr>
-<tr class="separator:gab20faeceb5ff5d2d9dd628c2ecf41303"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga3631d38ac8d715fc14f6f1b343f4c4ed"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Min.html#ga3631d38ac8d715fc14f6f1b343f4c4ed">arm_min_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pResult, uint32_t *pIndex)</td></tr>
-<tr class="memdesc:ga3631d38ac8d715fc14f6f1b343f4c4ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum value of a Q7 vector.  <a href="#ga3631d38ac8d715fc14f6f1b343f4c4ed">More...</a><br/></td></tr>
-<tr class="separator:ga3631d38ac8d715fc14f6f1b343f4c4ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga514e2c920c432e1a3df2cb03f01d2797"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Min.html#ga514e2c920c432e1a3df2cb03f01d2797">arm_min_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult, uint32_t *pIndex)</td></tr>
+<tr class="memdesc:ga514e2c920c432e1a3df2cb03f01d2797"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum value of a floating-point vector.  <a href="#ga514e2c920c432e1a3df2cb03f01d2797">More...</a><br/></td></tr>
+<tr class="separator:ga514e2c920c432e1a3df2cb03f01d2797"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9f163584c1131f37b1b22f59b976b822"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Min.html#ga9f163584c1131f37b1b22f59b976b822">arm_min_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult, uint32_t *pIndex)</td></tr>
+<tr class="memdesc:ga9f163584c1131f37b1b22f59b976b822"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum value of a Q15 vector.  <a href="#ga9f163584c1131f37b1b22f59b976b822">More...</a><br/></td></tr>
+<tr class="separator:ga9f163584c1131f37b1b22f59b976b822"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memdesc:ga1969bd12eb46b412104f463305871493"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum value of a Q31 vector.  <a href="#ga1969bd12eb46b412104f463305871493">More...</a><br/></td></tr>
+<tr class="separator:ga1969bd12eb46b412104f463305871493"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad66b651b1342c2411b4d8ca4955c03b3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Min.html#gad66b651b1342c2411b4d8ca4955c03b3">arm_min_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pResult, uint32_t *pIndex)</td></tr>
+<tr class="memdesc:gad66b651b1342c2411b4d8ca4955c03b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum value of a Q7 vector.  <a href="#gad66b651b1342c2411b4d8ca4955c03b3">More...</a><br/></td></tr>
+<tr class="separator:gad66b651b1342c2411b4d8ca4955c03b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>Computes the minimum value of an array of data. The function returns both the minimum value and its position within the array. There are separate functions for floating-point, Q31, Q15, and Q7 data types. </p>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="gaf62b1673740fc516ea64daf777b7d74a"></a>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
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@@ -169,27 +169,25 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>minimum value returned here </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pIndex</td><td>index of minimum value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>minimum value returned here </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pIndex</td><td>index of minimum value returned here </td></tr>
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-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>Referenced by <a class="el" href="arm__class__marks__example__f32_8c.html#a196718f834091385d38586a0ce4009dc">main()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
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 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>minimum value returned here </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pIndex</td><td>index of minimum value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>minimum value returned here </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pIndex</td><td>index of minimum value returned here </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gab20faeceb5ff5d2d9dd628c2ecf41303"></a>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
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 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>minimum value returned here </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pIndex</td><td>index of minimum value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>minimum value returned here </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pIndex</td><td>index of minimum value returned here </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
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+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>minimum value returned here </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pIndex</td><td>index of minimum value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>minimum value returned here </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pIndex</td><td>index of minimum value returned here </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -331,7 +329,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    [ "arm_min_q7", "group__Min.html#ga3631d38ac8d715fc14f6f1b343f4c4ed", null ]
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+    [ "arm_min_q31", "group__Min.html#ga1969bd12eb46b412104f463305871493", null ],
+    [ "arm_min_q7", "group__Min.html#gad66b651b1342c2411b4d8ca4955c03b3", null ]
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 Functions</h2></td></tr>
-<tr class="memitem:ga9380d08046dd7ec2f5015f569206b9ce"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
-<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PID.html#ga9380d08046dd7ec2f5015f569206b9ce">arm_pid_f32</a> (<a class="el" href="structarm__pid__instance__f32.html">arm_pid_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> in)</td></tr>
-<tr class="memdesc:ga9380d08046dd7ec2f5015f569206b9ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Process function for the floating-point PID Control.  <a href="#ga9380d08046dd7ec2f5015f569206b9ce">More...</a><br/></td></tr>
-<tr class="separator:ga9380d08046dd7ec2f5015f569206b9ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga82bc0813c007d50ce308b9b0bf3c76e2"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PID.html#ga82bc0813c007d50ce308b9b0bf3c76e2">arm_pid_q31</a> (<a class="el" href="structarm__pid__instance__q31.html">arm_pid_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> in)</td></tr>
-<tr class="memdesc:ga82bc0813c007d50ce308b9b0bf3c76e2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Process function for the Q31 PID Control.  <a href="#ga82bc0813c007d50ce308b9b0bf3c76e2">More...</a><br/></td></tr>
-<tr class="separator:ga82bc0813c007d50ce308b9b0bf3c76e2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad466471a6b0f8fc570b8b8fc34ac79fa"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PID.html#gad466471a6b0f8fc570b8b8fc34ac79fa">arm_pid_q15</a> (<a class="el" href="structarm__pid__instance__q15.html">arm_pid_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> in)</td></tr>
-<tr class="memdesc:gad466471a6b0f8fc570b8b8fc34ac79fa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Process function for the Q15 PID Control.  <a href="#gad466471a6b0f8fc570b8b8fc34ac79fa">More...</a><br/></td></tr>
-<tr class="separator:gad466471a6b0f8fc570b8b8fc34ac79fa"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5a6865ed706b7dd969ef0bd58a61f306"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PID.html#ga5a6865ed706b7dd969ef0bd58a61f306">arm_pid_f32</a> (<a class="el" href="structarm__pid__instance__f32.html">arm_pid_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> in)</td></tr>
+<tr class="memdesc:ga5a6865ed706b7dd969ef0bd58a61f306"><td class="mdescLeft">&#160;</td><td class="mdescRight">Process function for the floating-point PID Control.  <a href="#ga5a6865ed706b7dd969ef0bd58a61f306">More...</a><br/></td></tr>
+<tr class="separator:ga5a6865ed706b7dd969ef0bd58a61f306"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9ead8b3180125fb42879389477b99dc8"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PID.html#ga9ead8b3180125fb42879389477b99dc8">arm_pid_q31</a> (<a class="el" href="structarm__pid__instance__q31.html">arm_pid_instance_q31</a> *S, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> in)</td></tr>
+<tr class="memdesc:ga9ead8b3180125fb42879389477b99dc8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Process function for the Q31 PID Control.  <a href="#ga9ead8b3180125fb42879389477b99dc8">More...</a><br/></td></tr>
+<tr class="separator:ga9ead8b3180125fb42879389477b99dc8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga7ecc87208cb297fb9a31cec4f18bb54e"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PID.html#ga7ecc87208cb297fb9a31cec4f18bb54e">arm_pid_q15</a> (<a class="el" href="structarm__pid__instance__q15.html">arm_pid_instance_q15</a> *S, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> in)</td></tr>
+<tr class="memdesc:ga7ecc87208cb297fb9a31cec4f18bb54e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Process function for the Q15 PID Control.  <a href="#ga7ecc87208cb297fb9a31cec4f18bb54e">More...</a><br/></td></tr>
+<tr class="separator:ga7ecc87208cb297fb9a31cec4f18bb54e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gae31536b19b82b93ed184fb1ab73cfcb3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PID.html#gae31536b19b82b93ed184fb1ab73cfcb3">arm_pid_init_f32</a> (<a class="el" href="structarm__pid__instance__f32.html">arm_pid_instance_f32</a> *S, int32_t resetStateFlag)</td></tr>
 <tr class="memdesc:gae31536b19b82b93ed184fb1ab73cfcb3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point PID Control.  <a href="#gae31536b19b82b93ed184fb1ab73cfcb3">More...</a><br/></td></tr>
 <tr class="separator:gae31536b19b82b93ed184fb1ab73cfcb3"><td class="memSeparator" colspan="2">&#160;</td></tr>
@@ -152,7 +151,8 @@
    y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
    A0 = Kp + Ki + Kd
    A1 = (-Kp ) - (2 * Kd )
-   A2 = Kd  </pre></dd></dl>
+   A2 = Kd
+</pre></dd></dl>
 <dl class="section user"><dt></dt><dd>where <code>Kp</code> is proportional constant, <code>Ki</code> is Integral constant and <code>Kd</code> is Derivative constant</dd></dl>
 <dl class="section user"><dt></dt><dd><div class="image">
 <img src="PID.gif" alt="PID.gif"/>
@@ -170,12 +170,12 @@
 <dl class="section user"><dt></dt><dd>Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.</dd></dl>
 <dl class="section user"><dt>Fixed-Point Behavior</dt><dd>Care must be taken when using the fixed-point versions of the PID Controller functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines. </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga9380d08046dd7ec2f5015f569206b9ce"></a>
+<a class="anchor" id="ga5a6865ed706b7dd969ef0bd58a61f306"></a>
 <div class="memitem">
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       <table class="memname">
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-          <td class="memname">CMSIS_INLINE __STATIC_INLINE <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> arm_pid_f32 </td>
+          <td class="memname">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> arm_pid_f32 </td>
           <td>(</td>
           <td class="paramtype"><a class="el" href="structarm__pid__instance__f32.html">arm_pid_instance_f32</a> *&#160;</td>
           <td class="paramname"><em>S</em>, </td>
@@ -200,9 +200,7 @@
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>out processed output sample. </dd></dl>
-
-<p>References <a class="el" href="structarm__pid__instance__f32.html#ad7b0bed64915d0a25a3409fa2dc45556">arm_pid_instance_f32::A0</a>, <a class="el" href="structarm__pid__instance__f32.html#a7def89571c50f7137a213326a396e560">arm_pid_instance_f32::A1</a>, <a class="el" href="structarm__pid__instance__f32.html#a155acf642ba2f521869f19d694cd7fa0">arm_pid_instance_f32::A2</a>, and <a class="el" href="structarm__pid__instance__f32.html#afd394e1e52fb1d526aa472c83b8f2464">arm_pid_instance_f32::state</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>processed output sample. </dd></dl>
 
 </div>
 </div>
@@ -231,17 +229,18 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the PID structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">resetStateFlag</td><td>flag to reset the state. 0 = no change in state &amp; 1 = reset the state. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the PID structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">resetStateFlag</td><td><ul>
+<li>value = 0: no change in state</li>
+<li>value = 1: reset state </li>
+</ul>
+</td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-<dl class="section user"><dt>Description:</dt><dd></dd></dl>
-<dl class="section user"><dt></dt><dd>The <code>resetStateFlag</code> specifies whether to set state to zero or not. <br/>
-The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code> using the proportional gain( <code>Kp</code>), integral gain( <code>Ki</code>) and derivative gain( <code>Kd</code>) also sets the state variables to all zeros. </dd></dl>
-
-<p>References <a class="el" href="structarm__pid__instance__f32.html#ad7b0bed64915d0a25a3409fa2dc45556">arm_pid_instance_f32::A0</a>, <a class="el" href="structarm__pid__instance__f32.html#a7def89571c50f7137a213326a396e560">arm_pid_instance_f32::A1</a>, <a class="el" href="structarm__pid__instance__f32.html#a155acf642ba2f521869f19d694cd7fa0">arm_pid_instance_f32::A2</a>, <a class="el" href="structarm__pid__instance__f32.html#ad5b68fbf84d16188ae4747ff91f6f088">arm_pid_instance_f32::Kd</a>, <a class="el" href="structarm__pid__instance__f32.html#ac0feffde05fe391eeab3bf78e953830a">arm_pid_instance_f32::Ki</a>, <a class="el" href="structarm__pid__instance__f32.html#aa9b9aa9e413c6cec376a9dddc9f01ebe">arm_pid_instance_f32::Kp</a>, and <a class="el" href="structarm__pid__instance__f32.html#afd394e1e52fb1d526aa472c83b8f2464">arm_pid_instance_f32::state</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Details</dt><dd>The <code>resetStateFlag</code> specifies whether to set state to zero or not. <br/>
+ The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code> using the proportional gain( <code>Kp</code>), integral gain( <code>Ki</code>) and derivative gain( <code>Kd</code>) also sets the state variables to all zeros. </dd></dl>
 
 </div>
 </div>
@@ -270,17 +269,18 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q15 PID structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">resetStateFlag</td><td>flag to reset the state. 0 = no change in state 1 = reset the state. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q15 PID structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">resetStateFlag</td><td><ul>
+<li>value = 0: no change in state</li>
+<li>value = 1: reset state </li>
+</ul>
+</td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-<dl class="section user"><dt>Description:</dt><dd></dd></dl>
-<dl class="section user"><dt></dt><dd>The <code>resetStateFlag</code> specifies whether to set state to zero or not. <br/>
-The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code> using the proportional gain( <code>Kp</code>), integral gain( <code>Ki</code>) and derivative gain( <code>Kd</code>) also sets the state variables to all zeros. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a08bea9cb2c311d925224c0d6829edb8c">__QADD16()</a>, <a class="el" href="structarm__pid__instance__q15.html#ad77f3a2823c7f96de42c92a3fbf3246b">arm_pid_instance_q15::A0</a>, <a class="el" href="structarm__pid__instance__q15.html#ad8ac5ff736c0e51180398c31f777f18a">arm_pid_instance_q15::A1</a>, <a class="el" href="structarm__pid__instance__q15.html#a33e8b4c2d3e24b8b494f6edca6a89c1b">arm_pid_instance_q15::A2</a>, <a class="el" href="structarm__pid__instance__q15.html#af5d4b53091f19eff7536636b7cc43111">arm_pid_instance_q15::Kd</a>, <a class="el" href="structarm__pid__instance__q15.html#a0dcc19d5c8f7bc401acea9e8318cd777">arm_pid_instance_q15::Ki</a>, <a class="el" href="structarm__pid__instance__q15.html#ad228aae24a1b6d855c93a8b9bbc1c4f1">arm_pid_instance_q15::Kp</a>, and <a class="el" href="structarm__pid__instance__q15.html#a4a3f0a878b5b6b055e3478a2f244cd30">arm_pid_instance_q15::state</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Details</dt><dd>The <code>resetStateFlag</code> specifies whether to set state to zero or not. <br/>
+ The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code> using the proportional gain( <code>Kp</code>), integral gain( <code>Ki</code>) and derivative gain( <code>Kd</code>) also sets the state variables to all zeros. </dd></dl>
 
 </div>
 </div>
@@ -309,26 +309,27 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q31 PID structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">resetStateFlag</td><td>flag to reset the state. 0 = no change in state 1 = reset the state. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q31 PID structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">resetStateFlag</td><td><ul>
+<li>value = 0: no change in state</li>
+<li>value = 1: reset state </li>
+</ul>
+</td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-<dl class="section user"><dt>Description:</dt><dd></dd></dl>
-<dl class="section user"><dt></dt><dd>The <code>resetStateFlag</code> specifies whether to set state to zero or not. <br/>
-The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code> using the proportional gain( <code>Kp</code>), integral gain( <code>Ki</code>) and derivative gain( <code>Kd</code>) also sets the state variables to all zeros. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#ab9f3cfbfb0f12975ab91ddb179160dcb">__QADD()</a>, <a class="el" href="structarm__pid__instance__q31.html#aa5332635ce9c7078cdb4c1ecf442eadd">arm_pid_instance_q31::A0</a>, <a class="el" href="structarm__pid__instance__q31.html#a2f7492bd6fb92fae5e2de7fbbec39b0e">arm_pid_instance_q31::A1</a>, <a class="el" href="structarm__pid__instance__q31.html#a3e34537c53af4f9ad7bfffa4dff27c82">arm_pid_instance_q31::A2</a>, <a class="el" href="arm__math_8h.html#a9a94b78de0f083bd8fadf3c3abe40431">clip_q63_to_q31()</a>, <a class="el" href="structarm__pid__instance__q31.html#aab4ff371d14441df501f1169f71cbd17">arm_pid_instance_q31::Kd</a>, <a class="el" href="structarm__pid__instance__q31.html#aa861d69fd398f29aa0b4b455a823ed72">arm_pid_instance_q31::Ki</a>, <a class="el" href="structarm__pid__instance__q31.html#ac2410bf7f856d58dc1d773d4983cac8e">arm_pid_instance_q31::Kp</a>, and <a class="el" href="structarm__pid__instance__q31.html#a228e4a64da6014844a0a671a1fa391d4">arm_pid_instance_q31::state</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Details</dt><dd>The <code>resetStateFlag</code> specifies whether to set state to zero or not. <br/>
+ The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code> using the proportional gain( <code>Kp</code>), integral gain( <code>Ki</code>) and derivative gain( <code>Kd</code>) also sets the state variables to all zeros. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gad466471a6b0f8fc570b8b8fc34ac79fa"></a>
+<a class="anchor" id="ga7ecc87208cb297fb9a31cec4f18bb54e"></a>
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-          <td class="memname">CMSIS_INLINE __STATIC_INLINE <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> arm_pid_q15 </td>
+          <td class="memname">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> arm_pid_q15 </td>
           <td>(</td>
           <td class="paramtype"><a class="el" href="structarm__pid__instance__q15.html">arm_pid_instance_q15</a> *&#160;</td>
           <td class="paramname"><em>S</em>, </td>
@@ -353,20 +354,17 @@
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>out processed output sample.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 64-bit internal accumulator. Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a1185d670d798aaf52eec13f0403f3407">__SIMD32_CONST</a>, <a class="el" href="arm__math_8h.html#a7aed02041f489a4f65dbd7093073d94e">__SMLALD()</a>, <a class="el" href="arm__math_8h.html#a2eed05660fedbe3fbd0b6dbb1315cfc3">__SMUAD()</a>, <a class="el" href="structarm__pid__instance__q15.html#ad77f3a2823c7f96de42c92a3fbf3246b">arm_pid_instance_q15::A0</a>, <a class="el" href="structarm__pid__instance__q15.html#ad8ac5ff736c0e51180398c31f777f18a">arm_pid_instance_q15::A1</a>, <a class="el" href="structarm__pid__instance__q15.html#a33e8b4c2d3e24b8b494f6edca6a89c1b">arm_pid_instance_q15::A2</a>, and <a class="el" href="structarm__pid__instance__q15.html#a4a3f0a878b5b6b055e3478a2f244cd30">arm_pid_instance_q15::state</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>processed output sample.</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 64-bit internal accumulator. Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format. </dd></dl>
 
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-<a class="anchor" id="ga82bc0813c007d50ce308b9b0bf3c76e2"></a>
+<a class="anchor" id="ga9ead8b3180125fb42879389477b99dc8"></a>
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-<dl class="section user"><dt></dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions. After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format. </dd></dl>
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+<dl class="section return"><dt>Returns</dt><dd>processed output sample.</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions. After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format. </dd></dl>
 
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+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
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+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
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-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
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-<p>References <a class="el" href="structarm__pid__instance__q31.html#a228e4a64da6014844a0a671a1fa391d4">arm_pid_instance_q31::state</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
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@@ -482,7 +471,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-<tr class="separator:ga8567259fe18396dd972242c41741ebf4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4e65902884d148ebcbecc260e0dffdd9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#ga4e65902884d148ebcbecc260e0dffdd9">arm_conv_partial_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints)</td></tr>
+<tr class="memdesc:ga4e65902884d148ebcbecc260e0dffdd9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of floating-point sequences.  <a href="#ga4e65902884d148ebcbecc260e0dffdd9">More...</a><br/></td></tr>
+<tr class="separator:ga4e65902884d148ebcbecc260e0dffdd9"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0cdb871f952b8c1305342ae499affa41"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#ga0cdb871f952b8c1305342ae499affa41">arm_conv_partial_fast_opt_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
+<tr class="memdesc:ga0cdb871f952b8c1305342ae499affa41"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q15 sequences (fast version).  <a href="#ga0cdb871f952b8c1305342ae499affa41">More...</a><br/></td></tr>
+<tr class="separator:ga0cdb871f952b8c1305342ae499affa41"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga30eb5ce84581f2d0532a17cdf8a20fc5"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#ga30eb5ce84581f2d0532a17cdf8a20fc5">arm_conv_partial_fast_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints)</td></tr>
+<tr class="memdesc:ga30eb5ce84581f2d0532a17cdf8a20fc5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q15 sequences (fast version).  <a href="#ga30eb5ce84581f2d0532a17cdf8a20fc5">More...</a><br/></td></tr>
+<tr class="separator:ga30eb5ce84581f2d0532a17cdf8a20fc5"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaaf207e31aa081cea624713aec65d0e77"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#gaaf207e31aa081cea624713aec65d0e77">arm_conv_partial_fast_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints)</td></tr>
+<tr class="memdesc:gaaf207e31aa081cea624713aec65d0e77"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q31 sequences (fast version).  <a href="#gaaf207e31aa081cea624713aec65d0e77">More...</a><br/></td></tr>
+<tr class="separator:gaaf207e31aa081cea624713aec65d0e77"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa82f8213533529e9b9252b37fd3b39e4"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#gaa82f8213533529e9b9252b37fd3b39e4">arm_conv_partial_opt_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
+<tr class="memdesc:gaa82f8213533529e9b9252b37fd3b39e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q15 sequences.  <a href="#gaa82f8213533529e9b9252b37fd3b39e4">More...</a><br/></td></tr>
+<tr class="separator:gaa82f8213533529e9b9252b37fd3b39e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gadfc0cd0290793c790ccaa1c73eda0694"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#gadfc0cd0290793c790ccaa1c73eda0694">arm_conv_partial_opt_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch1, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pScratch2)</td></tr>
+<tr class="memdesc:gadfc0cd0290793c790ccaa1c73eda0694"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q7 sequences.  <a href="#gadfc0cd0290793c790ccaa1c73eda0694">More...</a><br/></td></tr>
+<tr class="separator:gadfc0cd0290793c790ccaa1c73eda0694"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga09b1f207980df75c2dcf01b1d3c2006f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#ga09b1f207980df75c2dcf01b1d3c2006f">arm_conv_partial_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints)</td></tr>
+<tr class="memdesc:ga09b1f207980df75c2dcf01b1d3c2006f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q15 sequences.  <a href="#ga09b1f207980df75c2dcf01b1d3c2006f">More...</a><br/></td></tr>
+<tr class="separator:ga09b1f207980df75c2dcf01b1d3c2006f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gadc48f14ae5ca8bf4b026916db0765afa"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#gadc48f14ae5ca8bf4b026916db0765afa">arm_conv_partial_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints)</td></tr>
+<tr class="memdesc:gadc48f14ae5ca8bf4b026916db0765afa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q31 sequences.  <a href="#gadc48f14ae5ca8bf4b026916db0765afa">More...</a><br/></td></tr>
+<tr class="separator:gadc48f14ae5ca8bf4b026916db0765afa"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa1bf3428dbe6beb5c9957bff0d00fa19"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__PartialConv.html#gaa1bf3428dbe6beb5c9957bff0d00fa19">arm_conv_partial_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t firstIndex, uint32_t numPoints)</td></tr>
+<tr class="memdesc:gaa1bf3428dbe6beb5c9957bff0d00fa19"><td class="mdescLeft">&#160;</td><td class="mdescRight">Partial convolution of Q7 sequences.  <a href="#gaa1bf3428dbe6beb5c9957bff0d00fa19">More...</a><br/></td></tr>
+<tr class="separator:gaa1bf3428dbe6beb5c9957bff0d00fa19"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>Partial Convolution is equivalent to Convolution except that a subset of the output samples is generated. Each function has two additional arguments. <code>firstIndex</code> specifies the starting index of the subset of output samples. <code>numPoints</code> is the number of output samples to compute. The function computes the output in the range <code>[firstIndex, ..., firstIndex+numPoints-1]</code>. The output array <code>pDst</code> contains <code>numPoints</code> values.</p>
 <p>The allowable range of output indices is [0 srcALen+srcBLen-2]. If the requested subset does not fall in this range then the functions return ARM_MATH_ARGUMENT_ERROR. Otherwise the functions return ARM_MATH_SUCCESS. </p>
-<dl class="section note"><dt>Note</dt><dd>Refer <a class="el" href="group__Conv.html#ga3f860dc98c6fc4cafc421e4a2aed3c89" title="Convolution of floating-point sequences. ">arm_conv_f32()</a> for details on fixed point behavior.</dd></dl>
-<p><b>Fast Versions</b></p>
-<dl class="section user"><dt></dt><dd>Fast versions are supported for Q31 and Q15 of partial convolution. Cycles for Fast versions are less compared to Q31 and Q15 of partial conv and the design requires the input signals should be scaled down to avoid intermediate overflows.</dd></dl>
-<p><b>Opt Versions</b></p>
-<dl class="section user"><dt></dt><dd>Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation. These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions of partial convolution </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>Refer to <a class="el" href="group__Conv.html#ga2e977f76e873bd47c6c41c7d940fdf7e">arm_conv_f32()</a> for details on fixed point behavior.</dd></dl>
+<dl class="section user"><dt>Fast Versions</dt><dd>Fast versions are supported for Q31 and Q15 of partial convolution. Cycles for Fast versions are less compared to Q31 and Q15 of partial conv and the design requires the input signals should be scaled down to avoid intermediate overflows.</dd></dl>
+<dl class="section user"><dt>Opt Versions</dt><dd>Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation. These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions of partial convolution </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga16d10f32072cd79fc5fb6e785df45f5e"></a>
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           <td class="memname"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a> arm_conv_partial_f32 </td>
           <td>(</td>
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+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
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+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
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@@ -208,30 +206,32 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">firstIndex</td><td>is the first output sample to start with. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numPoints</td><td>is the number of output points to be computed. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">firstIndex</td><td>is the first output sample to start with </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numPoints</td><td>is the number of output points to be computed </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : requested subset is not in the range [0 srcALen+srcBLen-2] </li>
+</ul>
+</dd></dl>
 
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           <td class="memname"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a> arm_conv_partial_fast_opt_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
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           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
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         <tr>
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         </tr>
       </table>
 </div><div class="memdoc">
+<p>Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">firstIndex</td><td>is the first output sample to start with. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numPoints</td><td>is the number of output points to be computed. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pScratch1</td><td>points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pScratch2</td><td>points to scratch buffer of size min(srcALen, srcBLen). </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">firstIndex</td><td>is the first output sample to start with </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numPoints</td><td>is the number of output points to be computed </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pScratch1</td><td>points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2 </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pScratch2</td><td>points to scratch buffer of size min(srcALen, srcBLen) </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].</dd></dl>
-<p>See <code><a class="el" href="group__PartialConv.html#ga209a2a913a0c5e5679c5988da8f46b03" title="Partial convolution of Q15 sequences. ">arm_conv_partial_q15()</a></code> for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.</p>
-<dl class="section user"><dt>Restrictions</dt><dd>If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#aa611fdbf6c56c46553701d6596a79aaf">__SMLAD()</a>, <a class="el" href="arm__math_8h.html#a7fc670277db1ad9ac34d52d771c7c305">__SMLADX()</a>, <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>, <a class="el" href="group__copy.html#ga872ca4cfc18c680b8991ccd569a5fda0">arm_copy_q15()</a>, <a class="el" href="group__Fill.html#ga76b21c32a3783a2b3334d930a646e5d8">arm_fill_q15()</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : requested subset is not in the range [0 srcALen+srcBLen-2]</li>
+</ul>
+</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__PartialConv.html#ga09b1f207980df75c2dcf01b1d3c2006f">arm_conv_partial_q15()</a> for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga1e4d43385cb62262a78c6752fe1fafb2"></a>
+<a class="anchor" id="ga30eb5ce84581f2d0532a17cdf8a20fc5"></a>
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           <td class="memname"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a> arm_conv_partial_fast_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
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           <td class="paramkey"></td>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -364,33 +366,36 @@
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">firstIndex</td><td>is the first output sample to start with. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numPoints</td><td>is the number of output points to be computed. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">firstIndex</td><td>is the first output sample to start with </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numPoints</td><td>is the number of output points to be computed </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].</dd></dl>
-<p>See <code><a class="el" href="group__PartialConv.html#ga209a2a913a0c5e5679c5988da8f46b03" title="Partial convolution of Q15 sequences. ">arm_conv_partial_q15()</a></code> for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion. </p>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#aa611fdbf6c56c46553701d6596a79aaf">__SMLAD()</a>, <a class="el" href="arm__math_8h.html#a7fc670277db1ad9ac34d52d771c7c305">__SMLADX()</a>, <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : requested subset is not in the range [0 srcALen+srcBLen-2] </li>
+</ul>
+</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__PartialConv.html#ga09b1f207980df75c2dcf01b1d3c2006f">arm_conv_partial_q15()</a> for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion. </dd></dl>
 
 </div>
 </div>
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           <td class="memname"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a> arm_conv_partial_fast_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
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           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -436,33 +441,36 @@
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">firstIndex</td><td>is the first output sample to start with. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numPoints</td><td>is the number of output points to be computed. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">firstIndex</td><td>is the first output sample to start with </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numPoints</td><td>is the number of output points to be computed </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].</dd></dl>
-<dl class="section user"><dt></dt><dd>See <code><a class="el" href="group__PartialConv.html#ga78e73a5f02d103168a09821fb461e77a" title="Partial convolution of Q31 sequences. ">arm_conv_partial_q31()</a></code> for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : requested subset is not in the range [0 srcALen+srcBLen-2]</li>
+</ul>
+</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__PartialConv.html#gadc48f14ae5ca8bf4b026916db0765afa">arm_conv_partial_q31()</a> for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga834b23b4ade8682beeb55778399101f8"></a>
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         <tr>
           <td class="memname"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a> arm_conv_partial_opt_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
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         <tr>
@@ -474,7 +482,7 @@
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
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 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">firstIndex</td><td>is the first output sample to start with. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numPoints</td><td>is the number of output points to be computed. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pScratch1</td><td>points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pScratch2</td><td>points to scratch buffer of size min(srcALen, srcBLen). </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">firstIndex</td><td>is the first output sample to start with </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numPoints</td><td>is the number of output points to be computed </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pScratch1</td><td>points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pScratch2</td><td>points to scratch buffer of size min(srcALen, srcBLen). </td></tr>
   </table>
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-<dl class="section return"><dt>Returns</dt><dd>Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].</dd></dl>
-<dl class="section user"><dt>Restrictions</dt><dd>If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, state buffers should be aligned by 32-bit</dd></dl>
-<p>Refer to <code><a class="el" href="group__PartialConv.html#ga1e4d43385cb62262a78c6752fe1fafb2" title="Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4. ">arm_conv_partial_fast_q15()</a></code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4. </p>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a7aed02041f489a4f65dbd7093073d94e">__SMLALD()</a>, <a class="el" href="arm__math_8h.html#a3bdab9022ab56e30f6346a043050dfc4">__SMLALDX()</a>, <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>, <a class="el" href="group__copy.html#ga872ca4cfc18c680b8991ccd569a5fda0">arm_copy_q15()</a>, <a class="el" href="group__Fill.html#ga76b21c32a3783a2b3334d930a646e5d8">arm_fill_q15()</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : requested subset is not in the range [0 srcALen+srcBLen-2]</li>
+</ul>
+</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__PartialConv.html#ga30eb5ce84581f2d0532a17cdf8a20fc5">arm_conv_partial_fast_q15()</a> for a faster but less precise version of this function. </dd></dl>
 
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+<a class="anchor" id="gadfc0cd0290793c790ccaa1c73eda0694"></a>
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           <td class="memname"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a> arm_conv_partial_opt_q7 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -609,33 +618,34 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">firstIndex</td><td>is the first output sample to start with. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numPoints</td><td>is the number of output points to be computed. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pScratch1</td><td>points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pScratch2</td><td>points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">firstIndex</td><td>is the first output sample to start with </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numPoints</td><td>is the number of output points to be computed </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pScratch1</td><td>points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pScratch2</td><td>points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].</dd></dl>
-<dl class="section user"><dt>Restrictions</dt><dd>If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a3ebff224ad44c217fde9f530342e2960">__PACKq7</a>, <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#aa611fdbf6c56c46553701d6596a79aaf">__SMLAD()</a>, <a class="el" href="arm__math_8h.html#a7fc670277db1ad9ac34d52d771c7c305">__SMLADX()</a>, <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>, <a class="el" href="group__Fill.html#ga76b21c32a3783a2b3334d930a646e5d8">arm_fill_q15()</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : requested subset is not in the range [0 srcALen+srcBLen-2] </li>
+</ul>
+</dd></dl>
 
 </div>
 </div>
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           <td class="memname"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a> arm_conv_partial_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
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           <td class="paramkey"></td>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
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 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">firstIndex</td><td>is the first output sample to start with. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numPoints</td><td>is the number of output points to be computed. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">firstIndex</td><td>is the first output sample to start with </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numPoints</td><td>is the number of output points to be computed </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].</dd></dl>
-<p>Refer to <code><a class="el" href="group__PartialConv.html#ga1e4d43385cb62262a78c6752fe1fafb2" title="Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4. ">arm_conv_partial_fast_q15()</a></code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.</p>
-<dl class="section user"><dt></dt><dd>Refer the function <code><a class="el" href="group__PartialConv.html#ga834b23b4ade8682beeb55778399101f8" title="Partial convolution of Q15 sequences. ">arm_conv_partial_opt_q15()</a></code> for a faster implementation of this function using scratch buffers. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a7aed02041f489a4f65dbd7093073d94e">__SMLALD()</a>, <a class="el" href="arm__math_8h.html#a3bdab9022ab56e30f6346a043050dfc4">__SMLALDX()</a>, <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : requested subset is not in the range [0 srcALen+srcBLen-2]</li>
+</ul>
+</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__PartialConv.html#ga30eb5ce84581f2d0532a17cdf8a20fc5">arm_conv_partial_fast_q15()</a> for a faster but less precise version of this function. </dd>
+<dd>
+Refer to <a class="el" href="group__PartialConv.html#gaa82f8213533529e9b9252b37fd3b39e4">arm_conv_partial_opt_q15()</a> for a faster implementation of this function using scratch buffers. </dd></dl>
 
 </div>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
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@@ -756,31 +769,33 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">firstIndex</td><td>is the first output sample to start with. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numPoints</td><td>is the number of output points to be computed. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">firstIndex</td><td>is the first output sample to start with </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numPoints</td><td>is the number of output points to be computed </td></tr>
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-<dl class="section return"><dt>Returns</dt><dd>Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].</dd></dl>
-<p>See <code><a class="el" href="group__PartialConv.html#ga10c5294cda8c4985386f4e3944be7650" title="Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4. ">arm_conv_partial_fast_q31()</a></code> for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4. </p>
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-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
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+</ul>
+</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__PartialConv.html#gaaf207e31aa081cea624713aec65d0e77">arm_conv_partial_fast_q31()</a> for a faster but less precise implementation of this function. </dd></dl>
 
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 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input sequence. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the location where the output result is written. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">firstIndex</td><td>is the first output sample to start with. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numPoints</td><td>is the number of output points to be computed. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcALen</td><td>length of the first input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input sequence </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">srcBLen</td><td>length of the second input sequence </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the location where the output result is written </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">firstIndex</td><td>is the first output sample to start with </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numPoints</td><td>is the number of output points to be computed </td></tr>
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   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].</dd></dl>
-<dl class="section user"><dt></dt><dd>Refer the function <code><a class="el" href="group__PartialConv.html#ga3707e16af1435b215840006a7ab0c98f" title="Partial convolution of Q7 sequences. ">arm_conv_partial_opt_q7()</a></code> for a faster implementation of this function. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa611fdbf6c56c46553701d6596a79aaf">__SMLAD()</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="arm__convolution__example__f32_8c.html#ace48ed566e2cd6a680f0681192e6af28">srcALen</a>, <a class="el" href="arm__convolution__example__f32_8c.html#aea71286f498978c5ed3775609b974fc8">srcBLen</a>, and <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : requested subset is not in the range [0 srcALen+srcBLen-2]</li>
+</ul>
+</dd></dl>
+<dl class="section remark"><dt>Remarks</dt><dd>Refer to <a class="el" href="group__PartialConv.html#gadfc0cd0290793c790ccaa1c73eda0694">arm_conv_partial_opt_q7()</a> for a faster implementation of this function. </dd></dl>
 
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga0e3ab1b57da32d45388d1fa90d7fd88c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RMS.html#ga0e3ab1b57da32d45388d1fa90d7fd88c">arm_rms_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
-<tr class="memdesc:ga0e3ab1b57da32d45388d1fa90d7fd88c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Root Mean Square of the elements of a floating-point vector.  <a href="#ga0e3ab1b57da32d45388d1fa90d7fd88c">More...</a><br/></td></tr>
-<tr class="separator:ga0e3ab1b57da32d45388d1fa90d7fd88c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf5b836b72dda9e5dfbbd17c7906fd13f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RMS.html#gaf5b836b72dda9e5dfbbd17c7906fd13f">arm_rms_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult)</td></tr>
-<tr class="memdesc:gaf5b836b72dda9e5dfbbd17c7906fd13f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Root Mean Square of the elements of a Q15 vector.  <a href="#gaf5b836b72dda9e5dfbbd17c7906fd13f">More...</a><br/></td></tr>
-<tr class="separator:gaf5b836b72dda9e5dfbbd17c7906fd13f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gae33015fda23fc44e7ead5e5ed7e8d314"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RMS.html#gae33015fda23fc44e7ead5e5ed7e8d314">arm_rms_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
-<tr class="memdesc:gae33015fda23fc44e7ead5e5ed7e8d314"><td class="mdescLeft">&#160;</td><td class="mdescRight">Root Mean Square of the elements of a Q31 vector.  <a href="#gae33015fda23fc44e7ead5e5ed7e8d314">More...</a><br/></td></tr>
-<tr class="separator:gae33015fda23fc44e7ead5e5ed7e8d314"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaeb487e726e3755a7614a29c9d16a93e7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RMS.html#gaeb487e726e3755a7614a29c9d16a93e7">arm_rms_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
+<tr class="memdesc:gaeb487e726e3755a7614a29c9d16a93e7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Root Mean Square of the elements of a floating-point vector.  <a href="#gaeb487e726e3755a7614a29c9d16a93e7">More...</a><br/></td></tr>
+<tr class="separator:gaeb487e726e3755a7614a29c9d16a93e7"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga8be796318d41c7cbb68f8f3c0b96020f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RMS.html#ga8be796318d41c7cbb68f8f3c0b96020f">arm_rms_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult)</td></tr>
+<tr class="memdesc:ga8be796318d41c7cbb68f8f3c0b96020f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Root Mean Square of the elements of a Q15 vector.  <a href="#ga8be796318d41c7cbb68f8f3c0b96020f">More...</a><br/></td></tr>
+<tr class="separator:ga8be796318d41c7cbb68f8f3c0b96020f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga20586bc59cabbfc38a935c2448833dd2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RMS.html#ga20586bc59cabbfc38a935c2448833dd2">arm_rms_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
+<tr class="memdesc:ga20586bc59cabbfc38a935c2448833dd2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Root Mean Square of the elements of a Q31 vector.  <a href="#ga20586bc59cabbfc38a935c2448833dd2">More...</a><br/></td></tr>
+<tr class="separator:ga20586bc59cabbfc38a935c2448833dd2"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Calculates the Root Mean Sqaure of the elements in the input vector. The underlying algorithm is used:</p>
+<p>Calculates the Root Mean Square of the elements in the input vector. The underlying algorithm is used:</p>
 <pre>
-        Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));
+    Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));
 </pre><p>There are separate functions for floating point, Q31, and Q15 data types. </p>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga0e3ab1b57da32d45388d1fa90d7fd88c"></a>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
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@@ -163,26 +163,24 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>rms value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>root mean square value returned here </td></tr>
   </table>
   </dd>
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-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="group__SQRT.html#ga697d82c2747a3302cf44e7c9583da2e8">arm_sqrt_f32()</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
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-<a class="anchor" id="gaf5b836b72dda9e5dfbbd17c7906fd13f"></a>
+<a class="anchor" id="ga8be796318d41c7cbb68f8f3c0b96020f"></a>
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         <tr>
           <td class="memname">void arm_rms_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -206,28 +204,25 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>rms value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>root mean square value returned here </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the 34.30 result is truncated to 34.15 format by discarding the lower 15 bits, and then saturated to yield a result in 1.15 format. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a7aed02041f489a4f65dbd7093073d94e">__SMLALD()</a>, <a class="el" href="group__SQRT.html#ga5abe5ca724f3e15849662b03752c1238">arm_sqrt_q15()</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the 34.30 result is truncated to 34.15 format by discarding the lower 15 bits, and then saturated to yield a result in 1.15 format. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gae33015fda23fc44e7ead5e5ed7e8d314"></a>
+<a class="anchor" id="ga20586bc59cabbfc38a935c2448833dd2"></a>
 <div class="memitem">
 <div class="memproto">
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           <td class="memname">void arm_rms_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -251,17 +246,14 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>rms value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>root mean square value returned here </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The function is implemented using an internal 64-bit accumulator. The input is represented in 1.31 format, and intermediate multiplication yields a 2.62 format. The accumulator maintains full precision of the intermediate multiplication results, but provides only a single guard bit. There is no saturation on intermediate additions. If the accumulator overflows, it wraps around and distorts the result. In order to avoid overflows completely, the input signal must be scaled down by log2(blockSize) bits, as a total of blockSize additions are performed internally. Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value. </dd></dl>
-
-<p>References <a class="el" href="group__SQRT.html#ga119e25831e141d734d7ef10636670058">arm_sqrt_q31()</a>, <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, and <a class="el" href="arm__math_8h.html#a9a94b78de0f083bd8fadf3c3abe40431">clip_q63_to_q31()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 64-bit accumulator. The input is represented in 1.31 format, and intermediate multiplication yields a 2.62 format. The accumulator maintains full precision of the intermediate multiplication results, but provides only a single guard bit. There is no saturation on intermediate additions. If the accumulator overflows, it wraps around and distorts the result. In order to avoid overflows completely, the input signal must be scaled down by log2(blockSize) bits, as a total of blockSize additions are performed internally. Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value. </dd></dl>
 
 </div>
 </div>
@@ -270,7 +262,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/group__RMS.js b/docs/DSP/html/group__RMS.js
index 4668a78..9bd5d53 100644
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-    [ "arm_rms_q15", "group__RMS.html#gaf5b836b72dda9e5dfbbd17c7906fd13f", null ],
-    [ "arm_rms_q31", "group__RMS.html#gae33015fda23fc44e7ead5e5ed7e8d314", null ]
+    [ "arm_rms_f32", "group__RMS.html#gaeb487e726e3755a7614a29c9d16a93e7", null ],
+    [ "arm_rms_q15", "group__RMS.html#ga8be796318d41c7cbb68f8f3c0b96020f", null ],
+    [ "arm_rms_q31", "group__RMS.html#ga20586bc59cabbfc38a935c2448833dd2", null ]
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diff --git a/docs/DSP/html/group__RealFFT.html b/docs/DSP/html/group__RealFFT.html
index 3f28e0d..d57ec40 100644
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@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -128,10 +128,35 @@
 <tr class="memitem:ga180d8b764d59cbb85d37a2d5f7cd9799"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#ga180d8b764d59cbb85d37a2d5f7cd9799">arm_rfft_fast_f32</a> (<a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *p, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pOut, uint8_t <a class="el" href="arm__fft__bin__example__f32_8c.html#a379ccb99013d369a41b49619083c16ef">ifftFlag</a>)</td></tr>
 <tr class="memdesc:ga180d8b764d59cbb85d37a2d5f7cd9799"><td class="mdescLeft">&#160;</td><td class="mdescRight">Processing function for the floating-point real FFT.  <a href="#ga180d8b764d59cbb85d37a2d5f7cd9799">More...</a><br/></td></tr>
 <tr class="separator:ga180d8b764d59cbb85d37a2d5f7cd9799"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga153c8faa97b7ab8b1aef75fe6ac1b3a2"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#ga153c8faa97b7ab8b1aef75fe6ac1b3a2">arm_rfft_32_fast_init_f32</a> (<a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S)</td></tr>
+<tr class="memdesc:ga153c8faa97b7ab8b1aef75fe6ac1b3a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the 32pt floating-point real FFT.  <a href="#ga153c8faa97b7ab8b1aef75fe6ac1b3a2">More...</a><br/></td></tr>
+<tr class="separator:ga153c8faa97b7ab8b1aef75fe6ac1b3a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0f67de6a0e5d87011f35426112d2d91b"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#ga0f67de6a0e5d87011f35426112d2d91b">arm_rfft_64_fast_init_f32</a> (<a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S)</td></tr>
+<tr class="memdesc:ga0f67de6a0e5d87011f35426112d2d91b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the 64pt floating-point real FFT.  <a href="#ga0f67de6a0e5d87011f35426112d2d91b">More...</a><br/></td></tr>
+<tr class="separator:ga0f67de6a0e5d87011f35426112d2d91b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gade8432f9318953234761e8e0f2c9e1d2"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#gade8432f9318953234761e8e0f2c9e1d2">arm_rfft_128_fast_init_f32</a> (<a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S)</td></tr>
+<tr class="memdesc:gade8432f9318953234761e8e0f2c9e1d2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the 128pt floating-point real FFT.  <a href="#gade8432f9318953234761e8e0f2c9e1d2">More...</a><br/></td></tr>
+<tr class="separator:gade8432f9318953234761e8e0f2c9e1d2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga678afbb042d942c3dd5a33877ef66492"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#ga678afbb042d942c3dd5a33877ef66492">arm_rfft_256_fast_init_f32</a> (<a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S)</td></tr>
+<tr class="memdesc:ga678afbb042d942c3dd5a33877ef66492"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the 256pt floating-point real FFT.  <a href="#ga678afbb042d942c3dd5a33877ef66492">More...</a><br/></td></tr>
+<tr class="separator:ga678afbb042d942c3dd5a33877ef66492"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9a0e72918318f9d1c03973eab379e580"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#ga9a0e72918318f9d1c03973eab379e580">arm_rfft_512_fast_init_f32</a> (<a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S)</td></tr>
+<tr class="memdesc:ga9a0e72918318f9d1c03973eab379e580"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the 512pt floating-point real FFT.  <a href="#ga9a0e72918318f9d1c03973eab379e580">More...</a><br/></td></tr>
+<tr class="separator:ga9a0e72918318f9d1c03973eab379e580"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga71547c601079d55c2525204aa00ef9c2"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#ga71547c601079d55c2525204aa00ef9c2">arm_rfft_1024_fast_init_f32</a> (<a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S)</td></tr>
+<tr class="memdesc:ga71547c601079d55c2525204aa00ef9c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the 1024pt floating-point real FFT.  <a href="#ga71547c601079d55c2525204aa00ef9c2">More...</a><br/></td></tr>
+<tr class="separator:ga71547c601079d55c2525204aa00ef9c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga33724310a8360ac289d5a835282f778c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#ga33724310a8360ac289d5a835282f778c">arm_rfft_2048_fast_init_f32</a> (<a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S)</td></tr>
+<tr class="memdesc:ga33724310a8360ac289d5a835282f778c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the 2048pt floating-point real FFT.  <a href="#ga33724310a8360ac289d5a835282f778c">More...</a><br/></td></tr>
+<tr class="separator:ga33724310a8360ac289d5a835282f778c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaad50a08bb8191e1a138b5f72a268727a"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#gaad50a08bb8191e1a138b5f72a268727a">arm_rfft_4096_fast_init_f32</a> (<a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S)</td></tr>
+<tr class="memdesc:gaad50a08bb8191e1a138b5f72a268727a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the 4096pt floating-point real FFT.  <a href="#gaad50a08bb8191e1a138b5f72a268727a">More...</a><br/></td></tr>
+<tr class="separator:gaad50a08bb8191e1a138b5f72a268727a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gac5fceb172551e7c11eb4d0e17ef15aa3"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32</a> (<a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *S, uint16_t fftLen)</td></tr>
 <tr class="memdesc:gac5fceb172551e7c11eb4d0e17ef15aa3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point real FFT.  <a href="#gac5fceb172551e7c11eb4d0e17ef15aa3">More...</a><br/></td></tr>
 <tr class="separator:gac5fceb172551e7c11eb4d0e17ef15aa3"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga10717ee326bf50832ef1c25b85a23068"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#ga10717ee326bf50832ef1c25b85a23068">arm_rfft_init_f32</a> (<a class="el" href="structarm__rfft__instance__f32.html">arm_rfft_instance_f32</a> *S, <a class="el" href="structarm__cfft__radix4__instance__f32.html">arm_cfft_radix4_instance_f32</a> *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)</td></tr>
+<tr class="memdesc:ga10717ee326bf50832ef1c25b85a23068"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the floating-point RFFT/RIFFT.  <a href="#ga10717ee326bf50832ef1c25b85a23068">More...</a><br/></td></tr>
 <tr class="separator:ga10717ee326bf50832ef1c25b85a23068"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga053450cc600a55410ba5b5605e96245d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT.html#ga053450cc600a55410ba5b5605e96245d">arm_rfft_init_q15</a> (<a class="el" href="structarm__rfft__instance__q15.html">arm_rfft_instance_q15</a> *S, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)</td></tr>
 <tr class="memdesc:ga053450cc600a55410ba5b5605e96245d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialization function for the Q15 RFFT/RIFFT.  <a href="#ga053450cc600a55410ba5b5605e96245d">More...</a><br/></td></tr>
@@ -154,16 +179,16 @@
 <img src="RFFT.gif" alt="RFFT.gif"/>
 <div class="caption">
 Real Fast Fourier Transform</div></div>
- </dd></dl>
+</dd></dl>
 <dl class="section user"><dt></dt><dd>The real sequence is initially treated as if it were complex to perform a CFFT. Later, a processing stage reshapes the data to obtain half of the frequency spectrum in complex format. Except the first complex number that contains the two real numbers X[0] and X[N/2] all the data is complex. In other words, the first complex sample contains two real values packed. </dd></dl>
 <dl class="section user"><dt></dt><dd>The input for the inverse RFFT should keep the same format as the output of the forward RFFT. A first processing stage pre-process the data to later perform an inverse CFFT. </dd></dl>
 <dl class="section user"><dt></dt><dd><div class="image">
 <img src="RIFFT.gif" alt="RIFFT.gif"/>
 <div class="caption">
 Real Inverse Fast Fourier Transform</div></div>
- </dd></dl>
+</dd></dl>
 <dl class="section user"><dt></dt><dd>The algorithms for floating-point, Q15, and Q31 data are slightly different and we describe each algorithm in turn. </dd></dl>
-<dl class="section user"><dt>Floating-point</dt><dd>The main functions are <a class="el" href="group__RealFFT.html#ga180d8b764d59cbb85d37a2d5f7cd9799" title="Processing function for the floating-point real FFT. ">arm_rfft_fast_f32()</a> and <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3" title="Initialization function for the floating-point real FFT. ">arm_rfft_fast_init_f32()</a>. The older functions <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc" title="Processing function for the floating-point RFFT/RIFFT. ">arm_rfft_f32()</a> and <a class="el" href="group__RealFFT.html#ga10717ee326bf50832ef1c25b85a23068">arm_rfft_init_f32()</a> have been deprecated but are still documented. </dd></dl>
+<dl class="section user"><dt>Floating-point</dt><dd>The main functions are <a class="el" href="group__RealFFT.html#ga180d8b764d59cbb85d37a2d5f7cd9799">arm_rfft_fast_f32()</a> and <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>. The older functions <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32()</a> and <a class="el" href="group__RealFFT.html#ga10717ee326bf50832ef1c25b85a23068">arm_rfft_init_f32()</a> have been deprecated but are still documented. </dd></dl>
 <dl class="section user"><dt></dt><dd>The FFT of a real N-point sequence has even symmetry in the frequency domain. The second half of the data equals the conjugate of the first half flipped in frequency. Looking at the data, we see that we can uniquely represent the FFT using only N/2 complex numbers. These are packed into the output array in alternating real and imaginary components: </dd></dl>
 <dl class="section user"><dt></dt><dd>X = { real[0], imag[0], real[1], imag[1], real[2], imag[2] ... real[(N/2)-1], imag[(N/2)-1 } </dd></dl>
 <dl class="section user"><dt></dt><dd>It happens that the first complex number (real[0], imag[0]) is actually all real. real[0] represents the DC offset, and imag[0] should be 0. (real[1], imag[1]) is the fundamental frequency, (real[2], imag[2]) is the first harmonic and so on. </dd></dl>
@@ -178,11 +203,226 @@
 </ul>
 </dd></dl>
 <dl class="section user"><dt></dt><dd>Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure should be manually initialized as follows: <pre>
-<a class="el" href="structarm__rfft__instance__q31.html" title="Instance structure for the Q31 RFFT/RIFFT function. ">arm_rfft_instance_q31</a> S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
-<a class="el" href="structarm__rfft__instance__q15.html" title="Instance structure for the Q15 RFFT/RIFFT function. ">arm_rfft_instance_q15</a> S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
- </pre> where <code>fftLenReal</code> is the length of the real transform; <code>fftLenBy2</code> length of the internal complex transform. <code>ifftFlagR</code> Selects forward (=0) or inverse (=1) transform. <code>bitReverseFlagR</code> Selects bit reversed output (=0) or normal order output (=1). <code>twidCoefRModifier</code> stride modifier for the twiddle factor table. The value is based on the FFT length; <code>pTwiddleAReal</code>points to the A array of twiddle coefficients; <code>pTwiddleBReal</code>points to the B array of twiddle coefficients; <code>pCfft</code> points to the CFFT Instance structure. The CFFT structure must also be initialized. Refer to <a class="el" href="group__ComplexFFT.html#ga521f670cd9c571bc61aff9bec89f4c26" title="Processing function for the floating-point Radix-4 CFFT/CIFFT. ">arm_cfft_radix4_f32()</a> for details regarding static initialization of the complex FFT instance structure.</dd></dl>
-<p>end of RealFFT_Table group </p>
+    <a class="el" href="structarm__rfft__instance__q31.html" title="Instance structure for the Q31 RFFT/RIFFT function. ">arm_rfft_instance_q31</a> S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
+    <a class="el" href="structarm__rfft__instance__q15.html" title="Instance structure for the Q15 RFFT/RIFFT function. ">arm_rfft_instance_q15</a> S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
+</pre> where <code>fftLenReal</code> is the length of the real transform; <code>fftLenBy2</code> length of the internal complex transform. <code>ifftFlagR</code> Selects forward (=0) or inverse (=1) transform. <code>bitReverseFlagR</code> Selects bit reversed output (=0) or normal order output (=1). <code>twidCoefRModifier</code> stride modifier for the twiddle factor table. The value is based on the FFT length; <code>pTwiddleAReal</code>points to the A array of twiddle coefficients; <code>pTwiddleBReal</code>points to the B array of twiddle coefficients; <code>pCfft</code> points to the CFFT Instance structure. The CFFT structure must also be initialized. Refer to <a class="el" href="group__ComplexFFT.html#ga521f670cd9c571bc61aff9bec89f4c26" title="Processing function for the floating-point Radix-4 CFFT/CIFFT. ">arm_cfft_radix4_f32()</a> for details regarding static initialization of the complex FFT instance structure. </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
+<a class="anchor" id="ga71547c601079d55c2525204aa00ef9c2"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a> arm_rfft_1024_fast_init_f32 </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *&#160;</td>
+          <td class="paramname"><em>S</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an <a class="el" href="structarm__rfft__fast__instance__f32.html" title="Instance structure for the floating-point RFFT/RIFFT function. ">arm_rfft_fast_instance_f32</a> structure </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : an error is detected </li>
+</ul>
+</dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="gade8432f9318953234761e8e0f2c9e1d2"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a> arm_rfft_128_fast_init_f32 </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *&#160;</td>
+          <td class="paramname"><em>S</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an <a class="el" href="structarm__rfft__fast__instance__f32.html" title="Instance structure for the floating-point RFFT/RIFFT function. ">arm_rfft_fast_instance_f32</a> structure </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : an error is detected </li>
+</ul>
+</dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga33724310a8360ac289d5a835282f778c"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a> arm_rfft_2048_fast_init_f32 </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *&#160;</td>
+          <td class="paramname"><em>S</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an <a class="el" href="structarm__rfft__fast__instance__f32.html" title="Instance structure for the floating-point RFFT/RIFFT function. ">arm_rfft_fast_instance_f32</a> structure </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : an error is detected </li>
+</ul>
+</dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga678afbb042d942c3dd5a33877ef66492"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a> arm_rfft_256_fast_init_f32 </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *&#160;</td>
+          <td class="paramname"><em>S</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an <a class="el" href="structarm__rfft__fast__instance__f32.html" title="Instance structure for the floating-point RFFT/RIFFT function. ">arm_rfft_fast_instance_f32</a> structure </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : an error is detected </li>
+</ul>
+</dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga153c8faa97b7ab8b1aef75fe6ac1b3a2"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a> arm_rfft_32_fast_init_f32 </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *&#160;</td>
+          <td class="paramname"><em>S</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an <a class="el" href="structarm__rfft__fast__instance__f32.html" title="Instance structure for the floating-point RFFT/RIFFT function. ">arm_rfft_fast_instance_f32</a> structure </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : an error is detected </li>
+</ul>
+</dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="gaad50a08bb8191e1a138b5f72a268727a"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a> arm_rfft_4096_fast_init_f32 </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *&#160;</td>
+          <td class="paramname"><em>S</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an <a class="el" href="structarm__rfft__fast__instance__f32.html" title="Instance structure for the floating-point RFFT/RIFFT function. ">arm_rfft_fast_instance_f32</a> structure </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : an error is detected </li>
+</ul>
+</dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga9a0e72918318f9d1c03973eab379e580"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a> arm_rfft_512_fast_init_f32 </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *&#160;</td>
+          <td class="paramname"><em>S</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an <a class="el" href="structarm__rfft__fast__instance__f32.html" title="Instance structure for the floating-point RFFT/RIFFT function. ">arm_rfft_fast_instance_f32</a> structure </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : an error is detected </li>
+</ul>
+</dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga0f67de6a0e5d87011f35426112d2d91b"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a> arm_rfft_64_fast_init_f32 </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="structarm__rfft__fast__instance__f32.html">arm_rfft_fast_instance_f32</a> *&#160;</td>
+          <td class="paramname"><em>S</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an <a class="el" href="structarm__rfft__fast__instance__f32.html" title="Instance structure for the floating-point RFFT/RIFFT function. ">arm_rfft_fast_instance_f32</a> structure </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : an error is detected </li>
+</ul>
+</dd></dl>
+
+</div>
+</div>
 <a class="anchor" id="ga3df1766d230532bc068fc4ed69d0fcdc"></a>
 <div class="memitem">
 <div class="memproto">
@@ -212,19 +452,17 @@
         </tr>
       </table>
 </div><div class="memdoc">
-<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000013">Deprecated:</a></b></dt><dd>Do not use this function. It has been superceded by <a class="el" href="group__RealFFT.html#ga180d8b764d59cbb85d37a2d5f7cd9799">arm_rfft_fast_f32</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
+<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000014">Deprecated:</a></b></dt><dd>Do not use this function. It has been superceded by <a class="el" href="group__RealFFT.html#ga180d8b764d59cbb85d37a2d5f7cd9799">arm_rfft_fast_f32</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the floating-point RFFT/RIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input buffer. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the floating-point RFFT/RIFFT structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input buffer </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output buffer </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 </dd></dl>
 
-<p>References <a class="el" href="arm__rfft__f32_8c.html#a3d4062fdfa6aaa3f51f41cab868e508b">arm_bitreversal_f32()</a>, <a class="el" href="arm__rfft__f32_8c.html#ae239ddf995d1607115f9e84d5c069b9c">arm_radix4_butterfly_f32()</a>, <a class="el" href="arm__rfft__f32_8c.html#a2a78df6e4bbf080624f2b6349224ec93">arm_radix4_butterfly_inverse_f32()</a>, <a class="el" href="arm__rfft__f32_8c.html#a6cfdb6bdc66b13732ef2351caf98fdbb">arm_split_rfft_f32()</a>, <a class="el" href="arm__rfft__f32_8c.html#a585bef78c103d150a116241a4feb6442">arm_split_rifft_f32()</a>, <a class="el" href="structarm__rfft__instance__f32.html#ac342f3248157cbbd2f04a3c8ec9fc9eb">arm_rfft_instance_f32::bitReverseFlagR</a>, <a class="el" href="structarm__cfft__radix4__instance__f32.html#acc8cb18a8b901b8321ab9d86491e41a3">arm_cfft_radix4_instance_f32::bitRevFactor</a>, <a class="el" href="structarm__cfft__radix4__instance__f32.html#a7e6a6d290ce158ce9a15a45e364b021a">arm_cfft_radix4_instance_f32::fftLen</a>, <a class="el" href="structarm__rfft__instance__f32.html#a075076e07ebb8521d8e3b49a31db6c57">arm_rfft_instance_f32::fftLenBy2</a>, <a class="el" href="structarm__rfft__instance__f32.html#a5ee6d10a934ab4b666e0bb286c3d633f">arm_rfft_instance_f32::ifftFlagR</a>, <a class="el" href="structarm__cfft__radix4__instance__f32.html#ab9eed39e40b8d7c16381fbccf84467cd">arm_cfft_radix4_instance_f32::onebyfftLen</a>, <a class="el" href="structarm__cfft__radix4__instance__f32.html#a8da0d2ca69749fde8cbb95caeac6fe6a">arm_cfft_radix4_instance_f32::pBitRevTable</a>, <a class="el" href="structarm__rfft__instance__f32.html#a9f47ba9f50c81e4445ae3827b981bc05">arm_rfft_instance_f32::pCfft</a>, <a class="el" href="structarm__cfft__radix4__instance__f32.html#a14860c7544911702ca1fa0bf78204ef3">arm_cfft_radix4_instance_f32::pTwiddle</a>, <a class="el" href="structarm__rfft__instance__f32.html#a534cc7e6e9b3e3dd022fad611c762142">arm_rfft_instance_f32::pTwiddleAReal</a>, <a class="el" href="structarm__rfft__instance__f32.html#a23543ecfd027fea2477fe1eea23c3c4d">arm_rfft_instance_f32::pTwiddleBReal</a>, <a class="el" href="structarm__cfft__radix4__instance__f32.html#abe31ea2157dfa233e389cdfd3b9993ee">arm_cfft_radix4_instance_f32::twidCoefModifier</a>, and <a class="el" href="structarm__rfft__instance__f32.html#aede85350fb5ae6baa1b3e8bfa15b18d6">arm_rfft_instance_f32::twidCoefRModifier</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="ga180d8b764d59cbb85d37a2d5f7cd9799"></a>
@@ -264,16 +502,18 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an <a class="el" href="structarm__rfft__fast__instance__f32.html" title="Instance structure for the floating-point RFFT/RIFFT function. ">arm_rfft_fast_instance_f32</a> structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*p</td><td>points to the input buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pOut</td><td>points to the output buffer. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td>RFFT if flag is 0, RIFFT if flag is 1 </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an <a class="el" href="structarm__rfft__fast__instance__f32.html" title="Instance structure for the floating-point RFFT/RIFFT function. ">arm_rfft_fast_instance_f32</a> structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">p</td><td>points to input buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pOut</td><td>points to output buffer </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlag</td><td><ul>
+<li>value = 0: RFFT</li>
+<li>value = 1: RIFFT </li>
+</ul>
+</td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80">arm_cfft_f32()</a>, <a class="el" href="structarm__cfft__instance__f32.html#acd8f9e9540e3dd348212726e5d6aaa95">arm_cfft_instance_f32::fftLen</a>, <a class="el" href="structarm__rfft__fast__instance__f32.html#aef06ab665041ec36f5b25d464f0cab14">arm_rfft_fast_instance_f32::fftLenRFFT</a>, <a class="el" href="arm__rfft__fast__f32_8c.html#a93258bc1e64a939a8ebd086367e459af">merge_rfft_f32()</a>, <a class="el" href="structarm__rfft__fast__instance__f32.html#a37419ababdfb3151b1891ae6bcd21012">arm_rfft_fast_instance_f32::Sint</a>, and <a class="el" href="arm__rfft__fast__f32_8c.html#a47157c5a53c8aac5e80fda31acf1f9cc">stage_rfft_f32()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -302,18 +542,19 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an <a class="el" href="structarm__rfft__fast__instance__f32.html" title="Instance structure for the floating-point RFFT/RIFFT function. ">arm_rfft_fast_instance_f32</a> structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the Real Sequence. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an <a class="el" href="structarm__rfft__fast__instance__f32.html" title="Instance structure for the floating-point RFFT/RIFFT function. ">arm_rfft_fast_instance_f32</a> structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLen</td><td>length of the Real Sequence </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.</dd></dl>
-<dl class="section user"><dt>Description:</dt><dd></dd></dl>
-<dl class="section user"><dt></dt><dd>The parameter <code>fftLen</code> Specifies length of RFFT/CIFFT process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : <code>fftLen</code> is not a supported length</li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Description</dt><dd>The parameter <code>fftLen</code> specifies the length of RFFT/CIFFT process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096. </dd></dl>
 <dl class="section user"><dt></dt><dd>This Function also initializes Twiddle factor table pointer and Bit reversal table pointer. </dd></dl>
 
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="arm__common__tables_8h.html#a08dd0b98fa4cc50cad0f48ce752f8149">armBitRevIndexTable1024</a>, <a class="el" href="arm__common__tables_8h.html#a04711bbb245f2ac7202db666eaaf10f2">armBitRevIndexTable128</a>, <a class="el" href="arm__common__tables_8h.html#a1d4574fdfbfd5698054602b26ad97575">armBitRevIndexTable16</a>, <a class="el" href="arm__common__tables_8h.html#adaa1b91f1cb7be2c5e236a3c3352caa0">armBitRevIndexTable2048</a>, <a class="el" href="arm__common__tables_8h.html#a77b17c8e7539af315c57de27610d8407">armBitRevIndexTable256</a>, <a class="el" href="arm__common__tables_8h.html#a5eee9bb0fadbf7753c02cfcff1226185">armBitRevIndexTable32</a>, <a class="el" href="arm__common__tables_8h.html#a297a311183fb6d17d7ee0152ad1e43f3">armBitRevIndexTable512</a>, <a class="el" href="arm__common__tables_8h.html#a07798450c81fc35b0e1b79359ee06ea1">armBitRevIndexTable64</a>, <a class="el" href="arm__common__tables_8h.html#a5f6f615f438c5134a9b7e746139705df">ARMBITREVINDEXTABLE_1024_TABLE_LENGTH</a>, <a class="el" href="arm__common__tables_8h.html#abb73376f7efda869394aab2acef4291c">ARMBITREVINDEXTABLE_128_TABLE_LENGTH</a>, <a class="el" href="arm__common__tables_8h.html#ae238c932ca2cc11cc8aebdfc953adb63">ARMBITREVINDEXTABLE_16_TABLE_LENGTH</a>, <a class="el" href="arm__common__tables_8h.html#a3c561d85c5fc37cf2e111123d32353c3">ARMBITREVINDEXTABLE_2048_TABLE_LENGTH</a>, <a class="el" href="arm__common__tables_8h.html#aa7dc18c3b4f8d76f5a29f7b182007934">ARMBITREVINDEXTABLE_256_TABLE_LENGTH</a>, <a class="el" href="arm__common__tables_8h.html#a53e4f11ab8b72fd91e9654efe1154ca5">ARMBITREVINDEXTABLE_32_TABLE_LENGTH</a>, <a class="el" href="arm__common__tables_8h.html#ab21231782baf177ef3edad11aeba5a4f">ARMBITREVINDEXTABLE_512_TABLE_LENGTH</a>, <a class="el" href="arm__common__tables_8h.html#aa4cbc689396d844f626d942ef28eb4ba">ARMBITREVINDEXTABLE_64_TABLE_LENGTH</a>, <a class="el" href="structarm__cfft__instance__f32.html#a3ba329ed153d182746376208e773d648">arm_cfft_instance_f32::bitRevLength</a>, <a class="el" href="structarm__cfft__instance__f32.html#acd8f9e9540e3dd348212726e5d6aaa95">arm_cfft_instance_f32::fftLen</a>, <a class="el" href="structarm__rfft__fast__instance__f32.html#aef06ab665041ec36f5b25d464f0cab14">arm_rfft_fast_instance_f32::fftLenRFFT</a>, <a class="el" href="structarm__cfft__instance__f32.html#a21ceaf59a1bb8440af57c28d2dd9bbab">arm_cfft_instance_f32::pBitRevTable</a>, <a class="el" href="structarm__cfft__instance__f32.html#a59cc6f753f1498716e1444ac054c06de">arm_cfft_instance_f32::pTwiddle</a>, <a class="el" href="structarm__rfft__fast__instance__f32.html#a9f30b04f163fabc1b24421d3c323d5fc">arm_rfft_fast_instance_f32::pTwiddleRFFT</a>, <a class="el" href="structarm__rfft__fast__instance__f32.html#a37419ababdfb3151b1891ae6bcd21012">arm_rfft_fast_instance_f32::Sint</a>, <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>, <a class="el" href="group__CFFT__CIFFT.html#ga27c056eb130a4333d1cc5dd43ec738b1">twiddleCoef_1024</a>, <a class="el" href="group__CFFT__CIFFT.html#ga948433536dafaac1381decfccf4e2d9c">twiddleCoef_128</a>, <a class="el" href="group__CFFT__CIFFT.html#gae75e243ec61706427314270f222e0c8e">twiddleCoef_16</a>, <a class="el" href="group__CFFT__CIFFT.html#ga23e7f30421a7905b21c2015429779633">twiddleCoef_2048</a>, <a class="el" href="group__CFFT__CIFFT.html#gafe813758a03a798e972359a092315be4">twiddleCoef_256</a>, <a class="el" href="group__CFFT__CIFFT.html#ga78a72c85d88185de98050c930cfc76e3">twiddleCoef_32</a>, <a class="el" href="group__CFFT__CIFFT.html#gad8830f0c068ab2cc19f2f87d220fa148">twiddleCoef_512</a>, <a class="el" href="group__CFFT__CIFFT.html#ga4f3c6d98c7e66393b4ef3ac63746e43d">twiddleCoef_64</a>, <a class="el" href="arm__common__tables_8h.html#aa7d8d3aa9898d557385748a13c959a4c">twiddleCoef_rfft_1024</a>, <a class="el" href="arm__common__tables_8h.html#af089dd2fe1a543d40a3325982bf45e7c">twiddleCoef_rfft_128</a>, <a class="el" href="arm__common__tables_8h.html#a749a5995ebd433a163f7adc474dabcaa">twiddleCoef_rfft_2048</a>, <a class="el" href="arm__common__tables_8h.html#a5c5c161dd469d8e6806664956dae31f9">twiddleCoef_rfft_256</a>, <a class="el" href="arm__common__tables_8h.html#a5992afe8574289cd71921651b80bd57d">twiddleCoef_rfft_32</a>, <a class="el" href="arm__common__tables_8h.html#a8013d68dd2476c86b77173bb98b87b29">twiddleCoef_rfft_4096</a>, <a class="el" href="arm__common__tables_8h.html#a94bd2fc98798f87003fef5cd0c04d1f5">twiddleCoef_rfft_512</a>, and <a class="el" href="arm__common__tables_8h.html#a2759d8789e1e6ae2ba7fb8d7f5e9c2ab">twiddleCoef_rfft_64</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="ga10717ee326bf50832ef1c25b85a23068"></a>
@@ -357,10 +598,34 @@
         </tr>
       </table>
 </div><div class="memdoc">
-
-<p>References <a class="el" href="group__ComplexFFT.html#gaf336459f684f0b17bfae539ef1b1b78a">arm_cfft_radix4_init_f32()</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__rfft__instance__f32.html#ac342f3248157cbbd2f04a3c8ec9fc9eb">arm_rfft_instance_f32::bitReverseFlagR</a>, <a class="el" href="structarm__rfft__instance__f32.html#a075076e07ebb8521d8e3b49a31db6c57">arm_rfft_instance_f32::fftLenBy2</a>, <a class="el" href="structarm__rfft__instance__f32.html#a4219d4669699e4efdcb150ed7a0d9a57">arm_rfft_instance_f32::fftLenReal</a>, <a class="el" href="structarm__rfft__instance__f32.html#a5ee6d10a934ab4b666e0bb286c3d633f">arm_rfft_instance_f32::ifftFlagR</a>, <a class="el" href="structarm__rfft__instance__f32.html#a9f47ba9f50c81e4445ae3827b981bc05">arm_rfft_instance_f32::pCfft</a>, <a class="el" href="structarm__rfft__instance__f32.html#a534cc7e6e9b3e3dd022fad611c762142">arm_rfft_instance_f32::pTwiddleAReal</a>, <a class="el" href="structarm__rfft__instance__f32.html#a23543ecfd027fea2477fe1eea23c3c4d">arm_rfft_instance_f32::pTwiddleBReal</a>, <a class="el" href="group__RealFFT__Table.html#ga8b1ad947c470596674fa3364e16045c6">realCoefA</a>, <a class="el" href="group__RealFFT__Table.html#gac52f98b52a1f03bfac8b57a67ba07397">realCoefB</a>, <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>, and <a class="el" href="structarm__rfft__instance__f32.html#aede85350fb5ae6baa1b3e8bfa15b18d6">arm_rfft_instance_f32::twidCoefRModifier</a>.</p>
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#gab094ad3bc6fa1b84e8b12a24e1850a06">arm_dct4_init_f32()</a>.</p>
+<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000015">Deprecated:</a></b></dt><dd>Do not use this function. It has been superceded by <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32</a> and will be removed in the future. <dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the floating-point RFFT/RIFFT structure </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S_CFFT</td><td>points to an instance of the floating-point CFFT/CIFFT structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLenReal</td><td>length of the FFT. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlagR</td><td>flag that selects transform direction<ul>
+<li>value = 0: forward transform</li>
+<li>value = 1: inverse transform </li>
+</ul>
+</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables / disables bit reversal of output<ul>
+<li>value = 0: disables bit reversal of output</li>
+<li>value = 1: enables bit reversal of output </li>
+</ul>
+</td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : <code>fftLenReal</code> is not a supported length</li>
+</ul>
+</dd></dl>
+</dd></dl>
+<dl class="section user"><dt>Description</dt><dd>The parameter <code>fftLenReal</code>specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048. </dd></dl>
+<dl class="section user"><dt></dt><dd>The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed. Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated. </dd></dl>
+<dl class="section user"><dt></dt><dd>The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. </dd></dl>
+<dl class="section user"><dt></dt><dd>This function also initializes Twiddle factor table. </dd></dl>
 
 </div>
 </div>
@@ -401,24 +666,31 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q15 RFFT/RIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">fftLenReal</td><td>length of the FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlagR</td><td>flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q15 RFFT/RIFFT structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLenReal</td><td>length of the FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlagR</td><td>flag that selects transform direction<ul>
+<li>value = 0: forward transform</li>
+<li>value = 1: inverse transform </li>
+</ul>
+</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables / disables bit reversal of output<ul>
+<li>value = 0: disables bit reversal of output</li>
+<li>value = 1: enables bit reversal of output </li>
+</ul>
+</td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.</dd></dl>
-<dl class="section user"><dt>Description:</dt><dd></dd></dl>
-<dl class="section user"><dt></dt><dd>The parameter <code>fftLenReal</code> Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : <code>fftLenReal</code> is not a supported length</li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Details</dt><dd>The parameter <code>fftLenReal</code> specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192. </dd></dl>
 <dl class="section user"><dt></dt><dd>The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed. Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated. </dd></dl>
 <dl class="section user"><dt></dt><dd>The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. </dd></dl>
 <dl class="section user"><dt></dt><dd>This function also initializes Twiddle factor table. </dd></dl>
 
-<p>References <a class="el" href="arm__const__structs_8h.html#ad343fb2e4cba826f092f9d72c4adc831">arm_cfft_sR_q15_len1024</a>, <a class="el" href="arm__const__structs_8h.html#a736a97efd37c6386dab8db730904f69b">arm_cfft_sR_q15_len128</a>, <a class="el" href="arm__const__structs_8h.html#a7ed661717c58b18f3e557daa72f2b91b">arm_cfft_sR_q15_len16</a>, <a class="el" href="arm__const__structs_8h.html#a92c94dc79c66ec66c95f793aedb964b9">arm_cfft_sR_q15_len2048</a>, <a class="el" href="arm__const__structs_8h.html#ad80be0db1ea40c66b079404c48d2dcf4">arm_cfft_sR_q15_len256</a>, <a class="el" href="arm__const__structs_8h.html#a8d5426a822a6017235b5e10119606a90">arm_cfft_sR_q15_len32</a>, <a class="el" href="arm__const__structs_8h.html#ab57c118edaa3260f7f16686152845b18">arm_cfft_sR_q15_len4096</a>, <a class="el" href="arm__const__structs_8h.html#a273b91ec86bb2bd8ac14e69252d487fb">arm_cfft_sR_q15_len512</a>, <a class="el" href="arm__const__structs_8h.html#a95c216e7dcfd59a8d40ef55ac223a749">arm_cfft_sR_q15_len64</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__rfft__instance__q15.html#a4c65cd40e0098ec2f5c0dc31488b9bc6">arm_rfft_instance_q15::bitReverseFlagR</a>, <a class="el" href="structarm__rfft__instance__q15.html#aac5cf9e825917cbb14f439e56bb86ab3">arm_rfft_instance_q15::fftLenReal</a>, <a class="el" href="structarm__rfft__instance__q15.html#a8051ffe268c147e431e1bea7bb4c4258">arm_rfft_instance_q15::ifftFlagR</a>, <a class="el" href="structarm__rfft__instance__q15.html#a4329c15b056444746d37ff082a24d31a">arm_rfft_instance_q15::pCfft</a>, <a class="el" href="structarm__rfft__instance__q15.html#affbf2de522ac029432d98e8373c0ec53">arm_rfft_instance_q15::pTwiddleAReal</a>, <a class="el" href="structarm__rfft__instance__q15.html#a937d815022adc557b435ba8c6cd58b0d">arm_rfft_instance_q15::pTwiddleBReal</a>, <a class="el" href="group__RealFFT__Table.html#ga11e84d0ee257a547f749b37dd0078d36">realCoefAQ15</a>, <a class="el" href="group__RealFFT__Table.html#gac871666f018b70938b2b98017628cb97">realCoefBQ15</a>, <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>, and <a class="el" href="structarm__rfft__instance__q15.html#afd444d05858c5f419980e94e8240d5c3">arm_rfft_instance_q15::twidCoefRModifier</a>.</p>
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga966fd1b66a80873964533703ab5dc054">arm_dct4_init_q15()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="ga5abde938abbe72e95c5bab080eb33c45"></a>
@@ -458,23 +730,30 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">*S</td><td>points to an instance of the Q31 RFFT/RIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">fftLenReal</td><td>length of the FFT. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlagR</td><td>flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">S</td><td>points to an instance of the Q31 RFFT/RIFFT structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">fftLenReal</td><td>length of the FFT </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ifftFlagR</td><td>flag that selects transform direction<ul>
+<li>value = 0: forward transform</li>
+<li>value = 1: inverse transform </li>
+</ul>
+</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bitReverseFlag</td><td>flag that enables / disables bit reversal of output<ul>
+<li>value = 0: disables bit reversal of output</li>
+<li>value = 1: enables bit reversal of output </li>
+</ul>
+</td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.</dd></dl>
-<dl class="section user"><dt>Description:</dt><dd></dd></dl>
-<dl class="section user"><dt></dt><dd>The parameter <code>fftLenReal</code> Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : Operation successful</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : <code>fftLenReal</code> is not a supported length</li>
+</ul>
+</dd></dl>
+<dl class="section user"><dt>Details</dt><dd>The parameter <code>fftLenReal</code> specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192. </dd></dl>
 <dl class="section user"><dt></dt><dd>The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed. Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated. </dd></dl>
 <dl class="section user"><dt></dt><dd>The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order. </dd></dl>
-<dl class="section user"><dt>7</dt><dd>This function also initializes Twiddle factor table. </dd></dl>
-
-<p>References <a class="el" href="arm__const__structs_8h.html#ada9813a027999f3cff066c9f7b5df51b">arm_cfft_sR_q31_len1024</a>, <a class="el" href="arm__const__structs_8h.html#a9a2fcdb54300f75ef1fafe02954e9a61">arm_cfft_sR_q31_len128</a>, <a class="el" href="arm__const__structs_8h.html#a1336431c4d2a88d32c42308cfe2defa1">arm_cfft_sR_q31_len16</a>, <a class="el" href="arm__const__structs_8h.html#a420622d75b277070784083ddd44b95fb">arm_cfft_sR_q31_len2048</a>, <a class="el" href="arm__const__structs_8h.html#a3f2de67938bd228918e40f60f18dd6b5">arm_cfft_sR_q31_len256</a>, <a class="el" href="arm__const__structs_8h.html#a4c083c013ef17920cf8f28dc6f139a39">arm_cfft_sR_q31_len32</a>, <a class="el" href="arm__const__structs_8h.html#abfc9595f40a1c7aaba85e1328d824b1c">arm_cfft_sR_q31_len4096</a>, <a class="el" href="arm__const__structs_8h.html#aa337272cf78aaf6075e7e19d0a097d6f">arm_cfft_sR_q31_len512</a>, <a class="el" href="arm__const__structs_8h.html#ad11668a5662334e0bc6a2811c9cb1047">arm_cfft_sR_q31_len64</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>, <a class="el" href="structarm__rfft__instance__q31.html#a3cb90cdc928a88b0203917dcb3dc1b71">arm_rfft_instance_q31::bitReverseFlagR</a>, <a class="el" href="structarm__rfft__instance__q31.html#af777b0cadd5abaf064323692c2e6693b">arm_rfft_instance_q31::fftLenReal</a>, <a class="el" href="structarm__rfft__instance__q31.html#af5c2615e6cde15524df38fa57ea32d94">arm_rfft_instance_q31::ifftFlagR</a>, <a class="el" href="structarm__rfft__instance__q31.html#a8fe10d425b59e096c23aa4bb5caa1974">arm_rfft_instance_q31::pCfft</a>, <a class="el" href="structarm__rfft__instance__q31.html#a2a0c944e66bab92fcbe19d1c29153250">arm_rfft_instance_q31::pTwiddleAReal</a>, <a class="el" href="structarm__rfft__instance__q31.html#ae5070be4c2e0327e618f5e1f4c5b9d80">arm_rfft_instance_q31::pTwiddleBReal</a>, <a class="el" href="group__RealFFT__Table.html#gaf1592a6cf0504675205074a43c3728a2">realCoefAQ31</a>, <a class="el" href="group__RealFFT__Table.html#ga1eb5745728a61c3715755f5d69a4a960">realCoefBQ31</a>, <a class="el" href="arm__dotproduct__example__f32_8c.html#a88ccb294236ab22b00310c47164c53c3">status</a>, and <a class="el" href="structarm__rfft__instance__q31.html#a6fc90252b579f7c29e01bd279334fc43">arm_rfft_instance_q31::twidCoefRModifier</a>.</p>
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga631bb59c7c97c814ff7147ecba6a716a">arm_dct4_init_q31()</a>.</p>
+<dl class="section user"><dt></dt><dd>This function also initializes Twiddle factor table. </dd></dl>
 
 </div>
 </div>
@@ -509,15 +788,14 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q15 RFFT/RIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input buffer. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q15 RFFT/RIFFT structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input buffer </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output buffer </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Input an output formats:</dt><dd></dd></dl>
-<dl class="section user"><dt></dt><dd>Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. Hence the output format is different for different RFFT sizes. The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT: </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Input an output formats</dt><dd>Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. Hence the output format is different for different RFFT sizes. The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT: </dd></dl>
 <dl class="section user"><dt></dt><dd><div class="image">
 <img src="RFFTQ15.gif" alt="RFFTQ15.gif"/>
 <div class="caption">
@@ -529,8 +807,6 @@
 Input and Output Formats for Q15 RIFFT</div></div>
 </dd></dl>
 
-<p>References <a class="el" href="group__ComplexFFT.html#ga68cdacd2267a2967955e40e6b7ec1229">arm_cfft_q15()</a>, <a class="el" href="arm__rfft__q15_8c.html#a7c2a21793586f9a69c42140665550e09">arm_split_rfft_q15()</a>, <a class="el" href="arm__rfft__q15_8c.html#aa72a531dd15a53570dddaf01b62158f4">arm_split_rifft_q15()</a>, <a class="el" href="structarm__rfft__instance__q15.html#a4c65cd40e0098ec2f5c0dc31488b9bc6">arm_rfft_instance_q15::bitReverseFlagR</a>, <a class="el" href="structarm__rfft__instance__q15.html#aac5cf9e825917cbb14f439e56bb86ab3">arm_rfft_instance_q15::fftLenReal</a>, <a class="el" href="structarm__rfft__instance__q15.html#a8051ffe268c147e431e1bea7bb4c4258">arm_rfft_instance_q15::ifftFlagR</a>, <a class="el" href="structarm__rfft__instance__q15.html#a4329c15b056444746d37ff082a24d31a">arm_rfft_instance_q15::pCfft</a>, <a class="el" href="structarm__rfft__instance__q15.html#affbf2de522ac029432d98e8373c0ec53">arm_rfft_instance_q15::pTwiddleAReal</a>, <a class="el" href="structarm__rfft__instance__q15.html#a937d815022adc557b435ba8c6cd58b0d">arm_rfft_instance_q15::pTwiddleBReal</a>, and <a class="el" href="structarm__rfft__instance__q15.html#afd444d05858c5f419980e94e8240d5c3">arm_rfft_instance_q15::twidCoefRModifier</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="gabaeab5646aeea9844e6d42ca8c73fe3a"></a>
@@ -564,30 +840,25 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*S</td><td>points to an instance of the Q31 RFFT/RIFFT structure. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input buffer. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output buffer. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">S</td><td>points to an instance of the Q31 RFFT/RIFFT structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input buffer </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output buffer </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Input an output formats:</dt><dd></dd></dl>
-<dl class="section user"><dt></dt><dd>Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. Hence the output format is different for different RFFT sizes. The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT: </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Input an output formats</dt><dd>Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. Hence the output format is different for different RFFT sizes. The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT: </dd></dl>
 <dl class="section user"><dt></dt><dd><div class="image">
 <img src="RFFTQ31.gif" alt="RFFTQ31.gif"/>
 <div class="caption">
 Input and Output Formats for Q31 RFFT</div></div>
- </dd></dl>
+</dd></dl>
 <dl class="section user"><dt></dt><dd><div class="image">
 <img src="RIFFTQ31.gif" alt="RIFFTQ31.gif"/>
 <div class="caption">
 Input and Output Formats for Q31 RIFFT</div></div>
 </dd></dl>
 
-<p>References <a class="el" href="group__ComplexFFT.html#ga5a0008bd997ab6e2e299ef2fb272fb4b">arm_cfft_q31()</a>, <a class="el" href="arm__rfft__q31_8c.html#a520e1c358d44fcd2724cb19d46eb5dfa">arm_split_rfft_q31()</a>, <a class="el" href="arm__rfft__q31_8c.html#acc62dd39a59091c4d6a80d4e55adeb13">arm_split_rifft_q31()</a>, <a class="el" href="structarm__rfft__instance__q31.html#a3cb90cdc928a88b0203917dcb3dc1b71">arm_rfft_instance_q31::bitReverseFlagR</a>, <a class="el" href="structarm__rfft__instance__q31.html#af777b0cadd5abaf064323692c2e6693b">arm_rfft_instance_q31::fftLenReal</a>, <a class="el" href="structarm__rfft__instance__q31.html#af5c2615e6cde15524df38fa57ea32d94">arm_rfft_instance_q31::ifftFlagR</a>, <a class="el" href="structarm__rfft__instance__q31.html#a8fe10d425b59e096c23aa4bb5caa1974">arm_rfft_instance_q31::pCfft</a>, <a class="el" href="structarm__rfft__instance__q31.html#a2a0c944e66bab92fcbe19d1c29153250">arm_rfft_instance_q31::pTwiddleAReal</a>, <a class="el" href="structarm__rfft__instance__q31.html#ae5070be4c2e0327e618f5e1f4c5b9d80">arm_rfft_instance_q31::pTwiddleBReal</a>, and <a class="el" href="structarm__rfft__instance__q31.html#a6fc90252b579f7c29e01bd279334fc43">arm_rfft_instance_q31::twidCoefRModifier</a>.</p>
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#gad04d0baab6ed081d8e8afe02538eb80b">arm_dct4_q31()</a>.</p>
-
 </div>
 </div>
 </div><!-- contents -->
@@ -595,7 +866,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__RealFFT.js b/docs/DSP/html/group__RealFFT.js
index 6eca40a..50019f0 100644
--- a/docs/DSP/html/group__RealFFT.js
+++ b/docs/DSP/html/group__RealFFT.js
@@ -1,6 +1,14 @@
 var group__RealFFT =
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     [ "Real FFT Tables", "group__RealFFT__Table.html", "group__RealFFT__Table" ],
+    [ "arm_rfft_1024_fast_init_f32", "group__RealFFT.html#ga71547c601079d55c2525204aa00ef9c2", null ],
+    [ "arm_rfft_128_fast_init_f32", "group__RealFFT.html#gade8432f9318953234761e8e0f2c9e1d2", null ],
+    [ "arm_rfft_2048_fast_init_f32", "group__RealFFT.html#ga33724310a8360ac289d5a835282f778c", null ],
+    [ "arm_rfft_256_fast_init_f32", "group__RealFFT.html#ga678afbb042d942c3dd5a33877ef66492", null ],
+    [ "arm_rfft_32_fast_init_f32", "group__RealFFT.html#ga153c8faa97b7ab8b1aef75fe6ac1b3a2", null ],
+    [ "arm_rfft_4096_fast_init_f32", "group__RealFFT.html#gaad50a08bb8191e1a138b5f72a268727a", null ],
+    [ "arm_rfft_512_fast_init_f32", "group__RealFFT.html#ga9a0e72918318f9d1c03973eab379e580", null ],
+    [ "arm_rfft_64_fast_init_f32", "group__RealFFT.html#ga0f67de6a0e5d87011f35426112d2d91b", null ],
     [ "arm_rfft_f32", "group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc", null ],
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+++ b/docs/DSP/html/group__RealFFT__Table.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -108,75 +108,98 @@
 
 <div class="header">
   <div class="summary">
+<a href="#func-members">Functions</a> &#124;
 <a href="#var-members">Variables</a>  </div>
   <div class="headertitle">
 <div class="title">Real FFT Tables<div class="ingroups"><a class="el" href="group__RealFFT.html">Real FFT Functions</a></div></div>  </div>
 </div><!--header-->
 <div class="contents">
 <table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
+Functions</h2></td></tr>
+<tr class="memitem:ga70c20a29dce002df289426d5b4f67fa8"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT__Table.html#ga70c20a29dce002df289426d5b4f67fa8">__ALIGNED</a> (4)</td></tr>
+<tr class="memdesc:ga70c20a29dce002df289426d5b4f67fa8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Weights Table.  <a href="#ga70c20a29dce002df289426d5b4f67fa8">More...</a><br/></td></tr>
+<tr class="separator:ga70c20a29dce002df289426d5b4f67fa8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table><table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="var-members"></a>
 Variables</h2></td></tr>
-<tr class="memitem:ga8b1ad947c470596674fa3364e16045c6"><td class="memItemLeft" align="right" valign="top">static const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT__Table.html#ga8b1ad947c470596674fa3364e16045c6">realCoefA</a> [8192]</td></tr>
+<tr class="memitem:ga8b1ad947c470596674fa3364e16045c6"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT__Table.html#ga8b1ad947c470596674fa3364e16045c6">realCoefA</a> [8192]</td></tr>
 <tr class="separator:ga8b1ad947c470596674fa3364e16045c6"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac52f98b52a1f03bfac8b57a67ba07397"><td class="memItemLeft" align="right" valign="top">static const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT__Table.html#gac52f98b52a1f03bfac8b57a67ba07397">realCoefB</a> [8192]</td></tr>
+<tr class="memitem:gac52f98b52a1f03bfac8b57a67ba07397"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT__Table.html#gac52f98b52a1f03bfac8b57a67ba07397">realCoefB</a> [8192]</td></tr>
 <tr class="separator:gac52f98b52a1f03bfac8b57a67ba07397"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga11e84d0ee257a547f749b37dd0078d36"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> <a class="el" href="arm__math_8h.html#a280a402ab28c399fcc4168f2ed631acb">ALIGN4</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT__Table.html#ga11e84d0ee257a547f749b37dd0078d36">realCoefAQ15</a> [8192]</td></tr>
-<tr class="separator:ga11e84d0ee257a547f749b37dd0078d36"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac871666f018b70938b2b98017628cb97"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> <a class="el" href="arm__math_8h.html#a280a402ab28c399fcc4168f2ed631acb">ALIGN4</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT__Table.html#gac871666f018b70938b2b98017628cb97">realCoefBQ15</a> [8192]</td></tr>
-<tr class="separator:gac871666f018b70938b2b98017628cb97"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gaf1592a6cf0504675205074a43c3728a2"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT__Table.html#gaf1592a6cf0504675205074a43c3728a2">realCoefAQ31</a> [8192]</td></tr>
 <tr class="separator:gaf1592a6cf0504675205074a43c3728a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga1eb5745728a61c3715755f5d69a4a960"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__RealFFT__Table.html#ga1eb5745728a61c3715755f5d69a4a960">realCoefBQ31</a> [8192]</td></tr>
 <tr class="separator:ga1eb5745728a61c3715755f5d69a4a960"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<h2 class="groupheader">Function Documentation</h2>
+<a class="anchor" id="ga70c20a29dce002df289426d5b4f67fa8"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> __ALIGNED </td>
+          <td>(</td>
+          <td class="paramtype">4&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Q15 table for reciprocal.</p>
+<dl class="section user"><dt></dt><dd>Generation fixed-point realCoefAQ15 array in Q15 format: </dd></dl>
+<dl class="section user"><dt></dt><dd>n = 4096 <pre>for (i = 0; i &lt; n; i++)
+{
+   pATable[2 * i]     = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
+   pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+}</pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>Convert to fixed point Q15 format round(pATable[i] * pow(2, 15))</dd></dl>
+<dl class="section user"><dt></dt><dd>Generation of real_CoefB array: </dd></dl>
+<dl class="section user"><dt></dt><dd>n = 4096 <pre>for (i = 0; i &lt; n; i++)
+{
+   pBTable[2 * i]     = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
+   pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+}</pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>Convert to fixed point Q15 format round(pBTable[i] * pow(2, 15))</dd></dl>
+<dl class="section user"><dt></dt><dd>Weights tables are generated using the formula : <pre>weights[n] = e^(-j*n*pi/(2*N))</pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>C command to generate the table <pre>
+for(i = 0; i&lt; N; i++)
+{ 
+  weights[(2*i)]   =  cos(i*c);
+  weights[(2*i)+1] = -sin(i*c);
+} </pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>where <code>N</code> is the Number of weights to be calculated and <code>c</code> is <code>pi/(2*N)</code> </dd></dl>
+<dl class="section user"><dt></dt><dd>Converted the output to q15 format by multiplying with 2^31 and saturated if required. </dd></dl>
+<dl class="section user"><dt></dt><dd>In the tables below the real and imaginary values are placed alternatively, hence the array length is <code>2*N</code>. </dd></dl>
+<dl class="section user"><dt></dt><dd>cosFactor tables are generated using the formula : <pre> cos_factors[n] = 2 * cos((2n+1)*pi/(4*N)) </pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>C command to generate the table <pre>
+for (i = 0; i&lt; N; i++)
+{
+  cos_factors[i] = 2 * cos((2*i+1)*c/2);
+} </pre> </dd></dl>
+<dl class="section user"><dt></dt><dd>where <code>N</code> is the number of factors to generate and <code>c</code> is <code>pi/(2*N)</code> </dd></dl>
+<dl class="section user"><dt></dt><dd>Then converted to q15 format by multiplying with 2^31 and saturated if required.</dd></dl>
+<p>end of DCT4_IDCT4_Table group </p>
+
+</div>
+</div>
 <h2 class="groupheader">Variable Documentation</h2>
 <a class="anchor" id="ga8b1ad947c470596674fa3364e16045c6"></a>
 <div class="memitem">
 <div class="memproto">
-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
       <table class="memname">
         <tr>
           <td class="memname">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> realCoefA[8192]</td>
         </tr>
       </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Generation of realCoefA array: </dd></dl>
 <dl class="section user"><dt></dt><dd>n = 4096 <pre>for (i = 0; i &lt; n; i++)
- {
-   pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
+{
+   pATable[2 * i]     = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
    pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
- } </pre> </dd></dl>
-
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga10717ee326bf50832ef1c25b85a23068">arm_rfft_init_f32()</a>.</p>
-
-</div>
-</div>
-<a class="anchor" id="ga11e84d0ee257a547f749b37dd0078d36"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> <a class="el" href="arm__math_8h.html#a280a402ab28c399fcc4168f2ed631acb">ALIGN4</a> realCoefAQ15[8192]</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<dl class="section user"><dt></dt><dd>Generation fixed-point realCoefAQ15 array in Q15 format: </dd></dl>
-<dl class="section user"><dt></dt><dd>n = 4096 <pre>for (i = 0; i &lt; n; i++)
- {
-   pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
-   pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
- } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>Convert to fixed point Q15 format round(pATable[i] * pow(2, 15)) </dd></dl>
-
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga053450cc600a55410ba5b5605e96245d">arm_rfft_init_q15()</a>.</p>
+}</pre> </dd></dl>
 
 </div>
 </div>
@@ -192,61 +215,28 @@
 <dl class="section user"><dt></dt><dd>Generation fixed-point realCoefAQ31 array in Q31 format: </dd></dl>
 <dl class="section user"><dt></dt><dd>n = 4096 <pre>for (i = 0; i &lt; n; i++)
 {
-   pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
+   pATable[2 * i]     = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
    pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
 }</pre> </dd></dl>
 <dl class="section user"><dt></dt><dd>Convert to fixed point Q31 format round(pATable[i] * pow(2, 31)) </dd></dl>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga5abde938abbe72e95c5bab080eb33c45">arm_rfft_init_q31()</a>.</p>
-
 </div>
 </div>
 <a class="anchor" id="gac52f98b52a1f03bfac8b57a67ba07397"></a>
 <div class="memitem">
 <div class="memproto">
-<table class="mlabels">
-  <tr>
-  <td class="mlabels-left">
       <table class="memname">
         <tr>
           <td class="memname">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> realCoefB[8192]</td>
         </tr>
       </table>
-  </td>
-  <td class="mlabels-right">
-<span class="mlabels"><span class="mlabel">static</span></span>  </td>
-  </tr>
-</table>
 </div><div class="memdoc">
 <dl class="section user"><dt></dt><dd>Generation of realCoefB array: </dd></dl>
 <dl class="section user"><dt></dt><dd>n = 4096 <pre>for (i = 0; i &lt; n; i++)
 {
-   pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
+   pBTable[2 * i]     = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
    pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
- } </pre> </dd></dl>
-
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga10717ee326bf50832ef1c25b85a23068">arm_rfft_init_f32()</a>.</p>
-
-</div>
-</div>
-<a class="anchor" id="gac871666f018b70938b2b98017628cb97"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> <a class="el" href="arm__math_8h.html#a280a402ab28c399fcc4168f2ed631acb">ALIGN4</a> realCoefBQ15[8192]</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<dl class="section user"><dt></dt><dd>Generation of real_CoefB array: </dd></dl>
-<dl class="section user"><dt></dt><dd>n = 4096 <pre>for (i = 0; i &lt; n; i++)
- {
-   pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
-   pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
- } </pre> </dd></dl>
-<dl class="section user"><dt></dt><dd>Convert to fixed point Q15 format round(pBTable[i] * pow(2, 15)) </dd></dl>
-
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga053450cc600a55410ba5b5605e96245d">arm_rfft_init_q15()</a>.</p>
+}</pre> </dd></dl>
 
 </div>
 </div>
@@ -262,13 +252,11 @@
 <dl class="section user"><dt></dt><dd>Generation of realCoefBQ31 array: </dd></dl>
 <dl class="section user"><dt></dt><dd>n = 4096 <pre>for (i = 0; i &lt; n; i++)
 {
-   pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
+   pBTable[2 * i]     = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
    pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
 } </pre> </dd></dl>
 <dl class="section user"><dt></dt><dd>Convert to fixed point Q31 format round(pBTable[i] * pow(2, 31)) </dd></dl>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga5abde938abbe72e95c5bab080eb33c45">arm_rfft_init_q31()</a>.</p>
-
 </div>
 </div>
 </div><!-- contents -->
@@ -276,7 +264,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__RealFFT__Table.js b/docs/DSP/html/group__RealFFT__Table.js
index 032bceb..ff3d576 100644
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+++ b/docs/DSP/html/group__RealFFT__Table.js
@@ -1,9 +1,8 @@
 var group__RealFFT__Table =
 [
+    [ "__ALIGNED", "group__RealFFT__Table.html#ga70c20a29dce002df289426d5b4f67fa8", null ],
     [ "realCoefA", "group__RealFFT__Table.html#ga8b1ad947c470596674fa3364e16045c6", null ],
-    [ "realCoefAQ15", "group__RealFFT__Table.html#ga11e84d0ee257a547f749b37dd0078d36", null ],
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     [ "realCoefB", "group__RealFFT__Table.html#gac52f98b52a1f03bfac8b57a67ba07397", null ],
-    [ "realCoefBQ15", "group__RealFFT__Table.html#gac871666f018b70938b2b98017628cb97", null ],
     [ "realCoefBQ31", "group__RealFFT__Table.html#ga1eb5745728a61c3715755f5d69a4a960", null ]
 ];
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@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,16 +116,22 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga697d82c2747a3302cf44e7c9583da2e8"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE <br class="typebreak"/>
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-<tr class="memdesc:ga697d82c2747a3302cf44e7c9583da2e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point square root function.  <a href="#ga697d82c2747a3302cf44e7c9583da2e8">More...</a><br/></td></tr>
-<tr class="separator:ga697d82c2747a3302cf44e7c9583da2e8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5f37f479666ee8ff9711b334286c60ed"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__SQRT.html#ga5f37f479666ee8ff9711b334286c60ed">arm_sqrt_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> in, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pOut)</td></tr>
+<tr class="memdesc:ga5f37f479666ee8ff9711b334286c60ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point square root function.  <a href="#ga5f37f479666ee8ff9711b334286c60ed">More...</a><br/></td></tr>
+<tr class="separator:ga5f37f479666ee8ff9711b334286c60ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga119e25831e141d734d7ef10636670058"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__SQRT.html#ga119e25831e141d734d7ef10636670058">arm_sqrt_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> in, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pOut)</td></tr>
 <tr class="memdesc:ga119e25831e141d734d7ef10636670058"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 square root function.  <a href="#ga119e25831e141d734d7ef10636670058">More...</a><br/></td></tr>
 <tr class="separator:ga119e25831e141d734d7ef10636670058"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga5abe5ca724f3e15849662b03752c1238"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__SQRT.html#ga5abe5ca724f3e15849662b03752c1238">arm_sqrt_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> in, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pOut)</td></tr>
 <tr class="memdesc:ga5abe5ca724f3e15849662b03752c1238"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 square root function.  <a href="#ga5abe5ca724f3e15849662b03752c1238">More...</a><br/></td></tr>
 <tr class="separator:ga5abe5ca724f3e15849662b03752c1238"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa9b8a2bea8a22489bfd968eb4687a7bd"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__SQRT.html#gaa9b8a2bea8a22489bfd968eb4687a7bd">arm_vsqrt_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pIn, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pOut, uint16_t len)</td></tr>
+<tr class="memdesc:gaa9b8a2bea8a22489bfd968eb4687a7bd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Vector Floating-point square root function.  <a href="#gaa9b8a2bea8a22489bfd968eb4687a7bd">More...</a><br/></td></tr>
+<tr class="separator:gaa9b8a2bea8a22489bfd968eb4687a7bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5955b76f2a60c1636ff507182000193d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__SQRT.html#ga5955b76f2a60c1636ff507182000193d">arm_vsqrt_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pIn, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pOut, uint16_t len)</td></tr>
+<tr class="separator:ga5955b76f2a60c1636ff507182000193d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga793f913a2b3a8f45577db36136954cdc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__SQRT.html#ga793f913a2b3a8f45577db36136954cdc">arm_vsqrt_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pIn, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pOut, uint16_t len)</td></tr>
+<tr class="separator:ga793f913a2b3a8f45577db36136954cdc"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>Computes the square root of a number. There are separate functions for Q15, Q31, and floating-point data types. The square root function is computed using the Newton-Raphson algorithm. This is an iterative algorithm of the form: </p>
@@ -136,12 +142,12 @@
     x0 = in/2                         [initial guess]
     x1 = 1/2 * ( x0 + in / x0)        [each iteration]
 </pre> <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga697d82c2747a3302cf44e7c9583da2e8"></a>
+<a class="anchor" id="ga5f37f479666ee8ff9711b334286c60ed"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a> arm_sqrt_f32 </td>
+          <td class="memname">__STATIC_FORCEINLINE <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6">arm_status</a> arm_sqrt_f32 </td>
           <td>(</td>
           <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td>
           <td class="paramname"><em>in</em>, </td>
@@ -161,16 +167,16 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">in</td><td>input value. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">pOut</td><td>square root of input value. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">in</td><td>input value </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pOut</td><td>square root of input value </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if <code>in</code> is negative value and returns zero output for negative values. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, and <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>.</p>
-
-<p>Referenced by <a class="el" href="group__cmplx__mag.html#gae45024c497392cde2ae358a76d435213">arm_cmplx_mag_f32()</a>, <a class="el" href="group__RMS.html#ga0e3ab1b57da32d45388d1fa90d7fd88c">arm_rms_f32()</a>, and <a class="el" href="group__STD.html#ga4969b5b5f3d001377bc401a3ee99dfc2">arm_std_f32()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : input value is positive</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : input value is negative; *pOut is set to 0 </li>
+</ul>
+</dd></dl>
 
 </div>
 </div>
@@ -199,24 +205,16 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">in</td><td>input value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">pOut</td><td>square root of input value. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">in</td><td>input value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pOut</td><td>points to square root of input value </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if <code>in</code> is negative value and returns zero output for negative values.</dd></dl>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">in</td><td>input value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pOut</td><td>square root of input value. </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if the input value is positive and ARM_MATH_ARGUMENT_ERROR if the input is negative. For negative inputs, the function returns *pOut = 0. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, and <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>.</p>
-
-<p>Referenced by <a class="el" href="group__cmplx__mag.html#ga0a4a8f77a6a51d9b3f3b9d729f85b7a4">arm_cmplx_mag_q15()</a>, <a class="el" href="group__RMS.html#gaf5b836b72dda9e5dfbbd17c7906fd13f">arm_rms_q15()</a>, and <a class="el" href="group__STD.html#gaf9d27afa9928ff28a63cd98ea9218a72">arm_std_q15()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : input value is positive</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : input value is negative; *pOut is set to 0 </li>
+</ul>
+</dd></dl>
 
 </div>
 </div>
@@ -245,24 +243,121 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">in</td><td>input value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">pOut</td><td>square root of input value. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">in</td><td>input value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pOut</td><td>points to square root of input value </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if <code>in</code> is negative value and returns zero output for negative values.</dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a> : input value is positive</li>
+<li><a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a> : input value is negative; *pOut is set to 0 </li>
+</ul>
+</dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="gaa9b8a2bea8a22489bfd968eb4687a7bd"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_vsqrt_f32 </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramname"><em>pIn</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramname"><em>pOut</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint16_t&#160;</td>
+          <td class="paramname"><em>len</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">in</td><td>input value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pOut</td><td>square root of input value. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pIn</td><td>input vector. </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pOut</td><td>vector of square roots of input elements. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">len</td><td>length of input vector. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if the input value is positive and ARM_MATH_ARGUMENT_ERROR if the input is negative. For negative inputs, the function returns *pOut = 0. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if <code>in</code> is negative value and returns zero output for negative values. </dd></dl>
 
-<p>References <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a74897e18d4b8f62b12a7d8a01dd2bb35">ARM_MATH_ARGUMENT_ERROR</a>, and <a class="el" href="arm__math_8h.html#a5e459c6409dfcd2927bb8a57491d7cf6a9f8b2a10bd827fb4600e77d455902eb0">ARM_MATH_SUCCESS</a>.</p>
+</div>
+</div>
+<a class="anchor" id="ga793f913a2b3a8f45577db36136954cdc"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_vsqrt_q15 </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramname"><em>pIn</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramname"><em>pOut</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint16_t&#160;</td>
+          <td class="paramname"><em>len</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
 
-<p>Referenced by <a class="el" href="group__cmplx__mag.html#ga14f82f9230e9d96d5b9774e2fefcb7be">arm_cmplx_mag_q31()</a>, <a class="el" href="group__RMS.html#gae33015fda23fc44e7ead5e5ed7e8d314">arm_rms_q31()</a>, and <a class="el" href="group__STD.html#ga39495e74f96116178be085c9dc7742f5">arm_std_q31()</a>.</p>
+</div>
+</div>
+<a class="anchor" id="ga5955b76f2a60c1636ff507182000193d"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void arm_vsqrt_q31 </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramname"><em>pIn</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramname"><em>pOut</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint16_t&#160;</td>
+          <td class="paramname"><em>len</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
 
 </div>
 </div>
@@ -271,7 +366,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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     <a href="http://www.doxygen.org/index.html">
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-    [ "arm_sqrt_f32", "group__SQRT.html#ga697d82c2747a3302cf44e7c9583da2e8", null ],
+    [ "arm_sqrt_f32", "group__SQRT.html#ga5f37f479666ee8ff9711b334286c60ed", null ],
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-    [ "arm_sqrt_q31", "group__SQRT.html#ga119e25831e141d734d7ef10636670058", null ]
+    [ "arm_sqrt_q31", "group__SQRT.html#ga119e25831e141d734d7ef10636670058", null ],
+    [ "arm_vsqrt_f32", "group__SQRT.html#gaa9b8a2bea8a22489bfd968eb4687a7bd", null ],
+    [ "arm_vsqrt_q15", "group__SQRT.html#ga793f913a2b3a8f45577db36136954cdc", null ],
+    [ "arm_vsqrt_q31", "group__SQRT.html#ga5955b76f2a60c1636ff507182000193d", null ]
 ];
\ No newline at end of file
diff --git a/docs/DSP/html/group__STD.html b/docs/DSP/html/group__STD.html
index 832f8d9..f860ed7 100644
--- a/docs/DSP/html/group__STD.html
+++ b/docs/DSP/html/group__STD.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,30 +116,31 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga4969b5b5f3d001377bc401a3ee99dfc2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__STD.html#ga4969b5b5f3d001377bc401a3ee99dfc2">arm_std_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
-<tr class="memdesc:ga4969b5b5f3d001377bc401a3ee99dfc2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Standard deviation of the elements of a floating-point vector.  <a href="#ga4969b5b5f3d001377bc401a3ee99dfc2">More...</a><br/></td></tr>
-<tr class="separator:ga4969b5b5f3d001377bc401a3ee99dfc2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf9d27afa9928ff28a63cd98ea9218a72"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__STD.html#gaf9d27afa9928ff28a63cd98ea9218a72">arm_std_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult)</td></tr>
-<tr class="memdesc:gaf9d27afa9928ff28a63cd98ea9218a72"><td class="mdescLeft">&#160;</td><td class="mdescRight">Standard deviation of the elements of a Q15 vector.  <a href="#gaf9d27afa9928ff28a63cd98ea9218a72">More...</a><br/></td></tr>
-<tr class="separator:gaf9d27afa9928ff28a63cd98ea9218a72"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga39495e74f96116178be085c9dc7742f5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__STD.html#ga39495e74f96116178be085c9dc7742f5">arm_std_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
-<tr class="memdesc:ga39495e74f96116178be085c9dc7742f5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Standard deviation of the elements of a Q31 vector.  <a href="#ga39495e74f96116178be085c9dc7742f5">More...</a><br/></td></tr>
-<tr class="separator:ga39495e74f96116178be085c9dc7742f5"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga287b6ce703636c7e8cb9833b290ae4ce"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__STD.html#ga287b6ce703636c7e8cb9833b290ae4ce">arm_std_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
+<tr class="memdesc:ga287b6ce703636c7e8cb9833b290ae4ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Standard deviation of the elements of a floating-point vector.  <a href="#ga287b6ce703636c7e8cb9833b290ae4ce">More...</a><br/></td></tr>
+<tr class="separator:ga287b6ce703636c7e8cb9833b290ae4ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4179a8150b161ce2c3d734d8cb19cebe"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__STD.html#ga4179a8150b161ce2c3d734d8cb19cebe">arm_std_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult)</td></tr>
+<tr class="memdesc:ga4179a8150b161ce2c3d734d8cb19cebe"><td class="mdescLeft">&#160;</td><td class="mdescRight">Standard deviation of the elements of a Q15 vector.  <a href="#ga4179a8150b161ce2c3d734d8cb19cebe">More...</a><br/></td></tr>
+<tr class="separator:ga4179a8150b161ce2c3d734d8cb19cebe"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafe382f5d8f3e7d310f2e2f2b5d873797"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__STD.html#gafe382f5d8f3e7d310f2e2f2b5d873797">arm_std_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
+<tr class="memdesc:gafe382f5d8f3e7d310f2e2f2b5d873797"><td class="mdescLeft">&#160;</td><td class="mdescRight">Standard deviation of the elements of a Q31 vector.  <a href="#gafe382f5d8f3e7d310f2e2f2b5d873797">More...</a><br/></td></tr>
+<tr class="separator:gafe382f5d8f3e7d310f2e2f2b5d873797"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>Calculates the standard deviation of the elements in the input vector. The underlying algorithm is used:</p>
 <pre>
-  Result = sqrt((sumOfSquares - sum<sup>2</sup> / blockSize) / (blockSize - 1))</pre><pre>    where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]</pre><pre>                    sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]
+    Result = sqrt((sumOfSquares - sum<sup>2</sup> / blockSize) / (blockSize - 1))</pre><pre>    sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]
+    sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]
 </pre><p>There are separate functions for floating point, Q31, and Q15 data types. </p>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga4969b5b5f3d001377bc401a3ee99dfc2"></a>
+<a class="anchor" id="ga287b6ce703636c7e8cb9833b290ae4ce"></a>
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 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_std_f32 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -163,28 +164,24 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>standard deviation value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>standard deviation value returned here </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="group__SQRT.html#ga697d82c2747a3302cf44e7c9583da2e8">arm_sqrt_f32()</a>, <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__class__marks__example__f32_8c.html#acc9290716b3c97381ce52d14b4b01681">mean</a>, and <a class="el" href="arm__class__marks__example__f32_8c.html#a3bd39c4335d84be071cc1eaa9b0a8642">var</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__class__marks__example__f32_8c.html#a196718f834091385d38586a0ce4009dc">main()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gaf9d27afa9928ff28a63cd98ea9218a72"></a>
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           <td class="memname">void arm_std_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -208,28 +205,25 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>standard deviation value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>standard deviation value returned here </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the 34.30 result is truncated to 34.15 format by discarding the lower 15 bits, and then saturated to yield a result in 1.15 format. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a7aed02041f489a4f65dbd7093073d94e">__SMLALD()</a>, <a class="el" href="group__SQRT.html#ga5abe5ca724f3e15849662b03752c1238">arm_sqrt_q15()</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the 34.30 result is truncated to 34.15 format by discarding the lower 15 bits, and then saturated to yield a result in 1.15 format. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga39495e74f96116178be085c9dc7742f5"></a>
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 <div class="memproto">
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         <tr>
           <td class="memname">void arm_std_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -253,17 +247,14 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>standard deviation value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector. </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>standard deviation value returned here. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The function is implemented using an internal 64-bit accumulator. The input is represented in 1.31 format, which is then downshifted by 8 bits which yields 1.23, and intermediate multiplication yields a 2.46 format. The accumulator maintains full precision of the intermediate multiplication results, but provides only a 16 guard bits. There is no saturation on intermediate additions. If the accumulator overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by log2(blockSize)-8 bits, as a total of blockSize additions are performed internally. After division, internal variables should be Q18.46 Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value. </dd></dl>
-
-<p>References <a class="el" href="group__SQRT.html#ga119e25831e141d734d7ef10636670058">arm_sqrt_q31()</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 64-bit accumulator. The input is represented in 1.31 format, which is then downshifted by 8 bits which yields 1.23, and intermediate multiplication yields a 2.46 format. The accumulator maintains full precision of the intermediate multiplication results, but provides only a 16 guard bits. There is no saturation on intermediate additions. If the accumulator overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by log2(blockSize)-8 bits, as a total of blockSize additions are performed internally. After division, internal variables should be Q18.46 Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value. </dd></dl>
 
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@@ -272,7 +263,7 @@
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
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-   &#160;<span id="projectnumber">Version 1.5.2</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -135,14 +135,14 @@
 <dl class="section user"><dt>CMSIS DSP Software Library Functions Used:</dt><dd></dd></dl>
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 <li><a class="el" href="group__LMS__NORM.html#gac7ccbaea863882056eee815456464670" title="Initialization function for floating-point normalized LMS filter. ">arm_lms_norm_init_f32()</a></li>
-<li><a class="el" href="group__FIR.html#ga98d13def6427e29522829f945d0967db" title="Initialization function for the floating-point FIR filter. ">arm_fir_init_f32()</a></li>
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-<li><a class="el" href="group__Min.html#gaf62b1673740fc516ea64daf777b7d74a" title="Minimum value of a floating-point vector. ">arm_min_f32()</a></li>
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+<li><a class="el" href="group__FIR.html#ga5afaa7b8e6735bbc19e582aa9755b0e1" title="Initialization function for the floating-point FIR filter. ">arm_fir_init_f32()</a></li>
+<li><a class="el" href="group__FIR.html#ga0cf008f650a75f5e2cf82d10691b64d9" title="Processing function for the floating-point FIR filter. ">arm_fir_f32()</a></li>
+<li><a class="el" href="group__LMS__NORM.html#ga72b3755ed1cf97622851cbbeff83c69e" title="Processing function for floating-point normalized LMS filter. ">arm_lms_norm_f32()</a></li>
+<li><a class="el" href="group__BasicScale.html#ga5e769c8e22da173674c6abca7291e713" title="Multiplies a floating-point vector by a scalar. ">arm_scale_f32()</a></li>
+<li><a class="el" href="group__BasicAbs.html#ga0e8fc7df3033cdbe9cda8a766a46e6d9" title="Floating-point vector absolute value. ">arm_abs_f32()</a></li>
+<li><a class="el" href="group__BasicSub.html#ga76b8b2aec34269c6de0b090cab00fb33" title="Floating-point vector subtraction. ">arm_sub_f32()</a></li>
+<li><a class="el" href="group__Min.html#ga514e2c920c432e1a3df2cb03f01d2797" title="Minimum value of a floating-point vector. ">arm_min_f32()</a></li>
+<li><a class="el" href="group__copy.html#gaa6dfe9554ca61eb3d1eee498396bce88" title="Copies the elements of a floating-point vector. ">arm_copy_f32()</a></li>
 </ul>
 </dd></dl>
 <p><b> Refer </b> <a class="el" href="arm_signal_converge_example_f32_8c-example.html">arm_signal_converge_example_f32.c</a> </p>
@@ -151,7 +151,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__SinCos.html b/docs/DSP/html/group__SinCos.html
index d4f812c..24e5d04 100644
--- a/docs/DSP/html/group__SinCos.html
+++ b/docs/DSP/html/group__SinCos.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -169,14 +169,12 @@
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">theta</td><td>input value in degrees </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pSinVal</td><td>points to the processed sine output. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pCosVal</td><td>points to the processed cos output. </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pSinVal</td><td>points to processed sine output </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pCosVal</td><td>points to processed cosine output </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#afcb9147c96853bea484cfc2dde07463d">FAST_MATH_TABLE_SIZE</a>, and <a class="el" href="arm__common__tables_8h.html#a1dec82d596780f1a66ef4f76f137c1d9">sinTable_f32</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -212,16 +210,14 @@
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">theta</td><td>scaled input value in degrees </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pSinVal</td><td>points to the processed sine output. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pCosVal</td><td>points to the processed cosine output. </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pSinVal</td><td>points to processed sine output </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pCosVal</td><td>points to processed cosine output </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
 <p>The Q31 input value is in the range [-1 0.999999] and is mapped to a degree value in the range [-180 179]. </p>
 
-<p>References <a class="el" href="arm__math_8h.html#a9a94b78de0f083bd8fadf3c3abe40431">clip_q63_to_q31()</a>, <a class="el" href="arm__math_8h.html#aaff6d2358c4ada8de838a279254ab550">CONTROLLER_Q31_SHIFT</a>, and <a class="el" href="arm__common__tables_8h.html#a8bfccee9e1c0042cf4a765f4b19d097d">sinTable_q31</a>.</p>
-
 </div>
 </div>
 </div><!-- contents -->
@@ -229,7 +225,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__SinCosExample.html b/docs/DSP/html/group__SinCosExample.html
index 0df69fd..541fa5f 100644
--- a/docs/DSP/html/group__SinCosExample.html
+++ b/docs/DSP/html/group__SinCosExample.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -130,8 +130,8 @@
 <dl class="section user"><dt></dt><dd><ul>
 <li><a class="el" href="group__cos.html#gace15287f9c64b9b4084d1c797d4c49d8" title="Fast approximation to the trigonometric cosine function for floating-point data. ">arm_cos_f32()</a></li>
 <li><a class="el" href="group__sin.html#gae164899c4a3fc0e946dc5d55555fe541" title="Fast approximation to the trigonometric sine function for floating-point data. ">arm_sin_f32()</a></li>
-<li><a class="el" href="group__BasicMult.html#gaca3f0b8227da431ab29225b88888aa32" title="Floating-point vector multiplication. ">arm_mult_f32()</a></li>
-<li><a class="el" href="group__BasicAdd.html#ga6a904a547413b10565dd1d251c6bafbd" title="Floating-point vector addition. ">arm_add_f32()</a></li>
+<li><a class="el" href="group__BasicMult.html#gacf950935141cad927bea886e88fd9e9b" title="Floating-point vector multiplication. ">arm_mult_f32()</a></li>
+<li><a class="el" href="group__BasicAdd.html#gabfef1e86e458314a61f4baa441d9765e" title="Floating-point vector addition. ">arm_add_f32()</a></li>
 </ul>
 </dd></dl>
 <p><b> Refer </b> <a class="el" href="arm_sin_cos_example_f32_8c-example.html">arm_sin_cos_example_f32.c</a> </p>
@@ -140,7 +140,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__VarianceExample.html b/docs/DSP/html/group__VarianceExample.html
index b151a82..dcfc332 100644
--- a/docs/DSP/html/group__VarianceExample.html
+++ b/docs/DSP/html/group__VarianceExample.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -132,11 +132,11 @@
 </dd></dl>
 <dl class="section user"><dt>CMSIS DSP Software Library Functions Used:</dt><dd></dd></dl>
 <dl class="section user"><dt></dt><dd><ul>
-<li><a class="el" href="group__dot__prod.html#ga55418d4362f6ba84c327f9b4f089a8c3" title="Dot product of floating-point vectors. ">arm_dot_prod_f32()</a></li>
-<li><a class="el" href="group__BasicMult.html#gaca3f0b8227da431ab29225b88888aa32" title="Floating-point vector multiplication. ">arm_mult_f32()</a></li>
-<li><a class="el" href="group__BasicSub.html#ga7f975a472de286331134227c08aad826" title="Floating-point vector subtraction. ">arm_sub_f32()</a></li>
+<li><a class="el" href="group__BasicDotProd.html#gadf26f6bc62d6416528663ad3e46fbf67" title="Dot product of floating-point vectors. ">arm_dot_prod_f32()</a></li>
+<li><a class="el" href="group__BasicMult.html#gacf950935141cad927bea886e88fd9e9b" title="Floating-point vector multiplication. ">arm_mult_f32()</a></li>
+<li><a class="el" href="group__BasicSub.html#ga76b8b2aec34269c6de0b090cab00fb33" title="Floating-point vector subtraction. ">arm_sub_f32()</a></li>
 <li><a class="el" href="group__Fill.html#ga2248e8d3901b4afb7827163132baad94" title="Fills a constant value into a floating-point vector. ">arm_fill_f32()</a></li>
-<li><a class="el" href="group__copy.html#gadd1f737e677e0e6ca31767c7001417b3" title="Copies the elements of a floating-point vector. ">arm_copy_f32()</a></li>
+<li><a class="el" href="group__copy.html#gaa6dfe9554ca61eb3d1eee498396bce88" title="Copies the elements of a floating-point vector. ">arm_copy_f32()</a></li>
 </ul>
 </dd></dl>
 <p><b> Refer </b> <a class="el" href="arm_variance_example_f32_8c-example.html">arm_variance_example_f32.c</a> </p>
@@ -145,7 +145,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__clarke.html b/docs/DSP/html/group__clarke.html
index 75c2cbf..edb1f94 100644
--- a/docs/DSP/html/group__clarke.html
+++ b/docs/DSP/html/group__clarke.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,12 +116,12 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gabbfa27c68837d22f03d6c6259569caa8"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__clarke.html#gabbfa27c68837d22f03d6c6259569caa8">arm_clarke_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Ia, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Ib, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pIalpha, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pIbeta)</td></tr>
-<tr class="memdesc:gabbfa27c68837d22f03d6c6259569caa8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point Clarke transform.  <a href="#gabbfa27c68837d22f03d6c6259569caa8">More...</a><br/></td></tr>
-<tr class="separator:gabbfa27c68837d22f03d6c6259569caa8"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga0c69ebd2855ce6d34008eff808881e78"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__clarke.html#ga0c69ebd2855ce6d34008eff808881e78">arm_clarke_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Ia, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Ib, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pIalpha, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pIbeta)</td></tr>
-<tr class="memdesc:ga0c69ebd2855ce6d34008eff808881e78"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clarke transform for Q31 version.  <a href="#ga0c69ebd2855ce6d34008eff808881e78">More...</a><br/></td></tr>
-<tr class="separator:ga0c69ebd2855ce6d34008eff808881e78"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga82d40c62bb48ef4d613f1f2f685b4084"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__clarke.html#ga82d40c62bb48ef4d613f1f2f685b4084">arm_clarke_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Ia, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Ib, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pIalpha, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pIbeta)</td></tr>
+<tr class="memdesc:ga82d40c62bb48ef4d613f1f2f685b4084"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point Clarke transform.  <a href="#ga82d40c62bb48ef4d613f1f2f685b4084">More...</a><br/></td></tr>
+<tr class="separator:ga82d40c62bb48ef4d613f1f2f685b4084"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga8d68db2a6e26e1caab677f5ab293c068"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__clarke.html#ga8d68db2a6e26e1caab677f5ab293c068">arm_clarke_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Ia, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Ib, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pIalpha, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pIbeta)</td></tr>
+<tr class="memdesc:ga8d68db2a6e26e1caab677f5ab293c068"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clarke transform for Q31 version.  <a href="#ga8d68db2a6e26e1caab677f5ab293c068">More...</a><br/></td></tr>
+<tr class="separator:ga8d68db2a6e26e1caab677f5ab293c068"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector. Generally the Clarke transform uses three-phase currents <code>Ia, Ib and Ic</code> to calculate currents in the two-phase orthogonal stator axis <code>Ialpha</code> and <code>Ibeta</code>. When <code>Ialpha</code> is superposed with <code>Ia</code> as shown in the figure below </p>
@@ -137,12 +137,12 @@
  where <code>Ia</code> and <code>Ib</code> are the instantaneous stator phases and <code>pIalpha</code> and <code>pIbeta</code> are the two coordinates of time invariant vector. </dd></dl>
 <dl class="section user"><dt>Fixed-Point Behavior</dt><dd>Care must be taken when using the Q31 version of the Clarke transform. In particular, the overflow and saturation behavior of the accumulator used must be considered. Refer to the function specific documentation below for usage guidelines. </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="gabbfa27c68837d22f03d6c6259569caa8"></a>
+<a class="anchor" id="ga82d40c62bb48ef4d613f1f2f685b4084"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE void arm_clarke_f32 </td>
+          <td class="memname">__STATIC_FORCEINLINE void arm_clarke_f32 </td>
           <td>(</td>
           <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td>
           <td class="paramname"><em>Ia</em>, </td>
@@ -181,15 +181,16 @@
   </table>
   </dd>
 </dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga0c69ebd2855ce6d34008eff808881e78"></a>
+<a class="anchor" id="ga8d68db2a6e26e1caab677f5ab293c068"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE void arm_clarke_q31 </td>
+          <td class="memname">__STATIC_FORCEINLINE void arm_clarke_q31 </td>
           <td>(</td>
           <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td>
           <td class="paramname"><em>Ia</em>, </td>
@@ -224,14 +225,12 @@
     <tr><td class="paramdir">[in]</td><td class="paramname">Ia</td><td>input three-phase coordinate <code>a</code> </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">Ib</td><td>input three-phase coordinate <code>b</code> </td></tr>
     <tr><td class="paramdir">[out]</td><td class="paramname">pIalpha</td><td>points to output two-phase orthogonal vector axis alpha </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">pIbeta</td><td>points to output two-phase orthogonal vector axis beta</td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pIbeta</td><td>points to output two-phase orthogonal vector axis beta </td></tr>
   </table>
   </dd>
 </dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using an internal 32-bit accumulator. The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. There is saturation on the addition, hence there is no risk of overflow. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#ab9f3cfbfb0f12975ab91ddb179160dcb">__QADD()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 32-bit accumulator. The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. There is saturation on the addition, hence there is no risk of overflow. </dd></dl>
 
 </div>
 </div>
@@ -240,7 +239,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__clarke.js b/docs/DSP/html/group__clarke.js
index 79a9d0e..9adb4d6 100644
--- a/docs/DSP/html/group__clarke.js
+++ b/docs/DSP/html/group__clarke.js
@@ -1,5 +1,5 @@
 var group__clarke =
 [
-    [ "arm_clarke_f32", "group__clarke.html#gabbfa27c68837d22f03d6c6259569caa8", null ],
-    [ "arm_clarke_q31", "group__clarke.html#ga0c69ebd2855ce6d34008eff808881e78", null ]
+    [ "arm_clarke_f32", "group__clarke.html#ga82d40c62bb48ef4d613f1f2f685b4084", null ],
+    [ "arm_clarke_q31", "group__clarke.html#ga8d68db2a6e26e1caab677f5ab293c068", null ]
 ];
\ No newline at end of file
diff --git a/docs/DSP/html/group__cmplx__conj.html b/docs/DSP/html/group__cmplx__conj.html
index 81176b7..5f9f696 100644
--- a/docs/DSP/html/group__cmplx__conj.html
+++ b/docs/DSP/html/group__cmplx__conj.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,34 +116,35 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga3a102aead6460ad9fcb0626f6b226ffb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__conj.html#ga3a102aead6460ad9fcb0626f6b226ffb">arm_cmplx_conj_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:ga3a102aead6460ad9fcb0626f6b226ffb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex conjugate.  <a href="#ga3a102aead6460ad9fcb0626f6b226ffb">More...</a><br/></td></tr>
-<tr class="separator:ga3a102aead6460ad9fcb0626f6b226ffb"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf47689ae07962acaecb8ddde556df4a4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__conj.html#gaf47689ae07962acaecb8ddde556df4a4">arm_cmplx_conj_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:gaf47689ae07962acaecb8ddde556df4a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex conjugate.  <a href="#gaf47689ae07962acaecb8ddde556df4a4">More...</a><br/></td></tr>
-<tr class="separator:gaf47689ae07962acaecb8ddde556df4a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gafecc94879a383c5208ec3ef99485e4b5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__conj.html#gafecc94879a383c5208ec3ef99485e4b5">arm_cmplx_conj_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:gafecc94879a383c5208ec3ef99485e4b5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex conjugate.  <a href="#gafecc94879a383c5208ec3ef99485e4b5">More...</a><br/></td></tr>
-<tr class="separator:gafecc94879a383c5208ec3ef99485e4b5"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1b5571244b051bb72db30886896da2da"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__conj.html#ga1b5571244b051bb72db30886896da2da">arm_cmplx_conj_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:ga1b5571244b051bb72db30886896da2da"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex conjugate.  <a href="#ga1b5571244b051bb72db30886896da2da">More...</a><br/></td></tr>
+<tr class="separator:ga1b5571244b051bb72db30886896da2da"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga2eef7dba99852d5f7ec3e025b2e5653b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__conj.html#ga2eef7dba99852d5f7ec3e025b2e5653b">arm_cmplx_conj_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:ga2eef7dba99852d5f7ec3e025b2e5653b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex conjugate.  <a href="#ga2eef7dba99852d5f7ec3e025b2e5653b">More...</a><br/></td></tr>
+<tr class="separator:ga2eef7dba99852d5f7ec3e025b2e5653b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga652edf2688aae9b2f53c5da73f6cc2bc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__conj.html#ga652edf2688aae9b2f53c5da73f6cc2bc">arm_cmplx_conj_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:ga652edf2688aae9b2f53c5da73f6cc2bc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex conjugate.  <a href="#ga652edf2688aae9b2f53c5da73f6cc2bc">More...</a><br/></td></tr>
+<tr class="separator:ga652edf2688aae9b2f53c5da73f6cc2bc"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>Conjugates the elements of a complex data vector.</p>
-<p>The <code>pSrc</code> points to the source data and <code>pDst</code> points to the where the result should be written. <code>numSamples</code> specifies the number of complex samples and the data in each array is stored in an interleaved fashion (real, imag, real, imag, ...). Each array has a total of <code>2*numSamples</code> values. The underlying algorithm is used:</p>
+<p>The <code>pSrc</code> points to the source data and <code>pDst</code> points to the destination data where the result should be written. <code>numSamples</code> specifies the number of complex samples and the data in each array is stored in an interleaved fashion (real, imag, real, imag, ...). Each array has a total of <code>2*numSamples</code> values.</p>
+<p>The underlying algorithm is used: </p>
 <pre>
-for(n=0; n&lt;numSamples; n++) {
-    pDst[(2*n)+0)] = pSrc[(2*n)+0];     // real part
-    pDst[(2*n)+1)] = -pSrc[(2*n)+1];    // imag part
+for (n = 0; n &lt; numSamples; n++) {
+    pDst[(2*n)  ] =  pSrc[(2*n)  ];    // real part
+    pDst[(2*n)+1] = -pSrc[(2*n)+1];    // imag part
 }
 </pre><p>There are separate functions for floating-point, Q15, and Q31 data types. </p>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga3a102aead6460ad9fcb0626f6b226ffb"></a>
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           <td class="memname">void arm_cmplx_conj_f32 </td>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -167,24 +168,24 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
-    <tr><td class="paramname">numSamples</td><td>number of complex samples in each vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numSamples</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gaf47689ae07962acaecb8ddde556df4a4"></a>
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           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
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         <tr>
@@ -208,28 +209,25 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
-    <tr><td class="paramname">numSamples</td><td>number of complex samples in each vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numSamples</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aad6f7afa72d784b95e6357c215a919bb">__QASX()</a>, <a class="el" href="arm__math_8h.html#a391f5f1d2e7cefaccfece0a49141ad47">__QSAX()</a>, and <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. The Q15 value -1 (0x8000) is saturated to the maximum allowable positive value 0x7FFF. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gafecc94879a383c5208ec3ef99485e4b5"></a>
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           <td class="memname">void arm_cmplx_conj_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
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@@ -253,17 +251,14 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
-    <tr><td class="paramname">numSamples</td><td>number of complex samples in each vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numSamples</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a15e896d0146c280e600d00f609832350">__QSUB()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. The Q31 value -1 (0x80000000) is saturated to the maximum allowable positive value 0x7FFFFFFF. </dd></dl>
 
 </div>
 </div>
@@ -272,7 +267,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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@@ -116,43 +116,43 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gadcfaf567a25eb641da4043eafb9bb076"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__dot__prod.html#gadcfaf567a25eb641da4043eafb9bb076">arm_cmplx_dot_prod_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, uint32_t numSamples, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *realResult, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *imagResult)</td></tr>
-<tr class="memdesc:gadcfaf567a25eb641da4043eafb9bb076"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex dot product.  <a href="#gadcfaf567a25eb641da4043eafb9bb076">More...</a><br/></td></tr>
-<tr class="separator:gadcfaf567a25eb641da4043eafb9bb076"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:ga2b08b5e8001d2c15204639d00893fc70"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex dot product.  <a href="#ga2b08b5e8001d2c15204639d00893fc70">More...</a><br/></td></tr>
-<tr class="separator:ga2b08b5e8001d2c15204639d00893fc70"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:ga5b731a59db062a9ad84562ef68a6c8af"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex dot product.  <a href="#ga5b731a59db062a9ad84562ef68a6c8af">More...</a><br/></td></tr>
-<tr class="separator:ga5b731a59db062a9ad84562ef68a6c8af"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memdesc:ga93796e73f02771cf6fe13de016e296ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex dot product.  <a href="#ga93796e73f02771cf6fe13de016e296ed">More...</a><br/></td></tr>
+<tr class="separator:ga93796e73f02771cf6fe13de016e296ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae712971379c461cfb8bef7e423bf8417"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__dot__prod.html#gae712971379c461cfb8bef7e423bf8417">arm_cmplx_dot_prod_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t numSamples, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *realResult, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *imagResult)</td></tr>
+<tr class="memdesc:gae712971379c461cfb8bef7e423bf8417"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex dot product.  <a href="#gae712971379c461cfb8bef7e423bf8417">More...</a><br/></td></tr>
+<tr class="separator:gae712971379c461cfb8bef7e423bf8417"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa90661b5eee3b6d83a149043ada0eb37"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__dot__prod.html#gaa90661b5eee3b6d83a149043ada0eb37">arm_cmplx_dot_prod_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t numSamples, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *realResult, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *imagResult)</td></tr>
+<tr class="memdesc:gaa90661b5eee3b6d83a149043ada0eb37"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex dot product.  <a href="#gaa90661b5eee3b6d83a149043ada0eb37">More...</a><br/></td></tr>
+<tr class="separator:gaa90661b5eee3b6d83a149043ada0eb37"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>Computes the dot product of two complex vectors. The vectors are multiplied element-by-element and then summed.</p>
 <p>The <code>pSrcA</code> points to the first complex input vector and <code>pSrcB</code> points to the second complex input vector. <code>numSamples</code> specifies the number of complex samples and the data in each array is stored in an interleaved fashion (real, imag, real, imag, ...). Each array has a total of <code>2*numSamples</code> values.</p>
-<p>The underlying algorithm is used: </p>
+<p>The underlying algorithm is used:</p>
 <pre>
-realResult=0;
-imagResult=0;
-for(n=0; n&lt;numSamples; n++) {
-    realResult += pSrcA[(2*n)+0]*pSrcB[(2*n)+0] - pSrcA[(2*n)+1]*pSrcB[(2*n)+1];
-    imagResult += pSrcA[(2*n)+0]*pSrcB[(2*n)+1] + pSrcA[(2*n)+1]*pSrcB[(2*n)+0];
+realResult = 0;
+imagResult = 0;
+for (n = 0; n &lt; numSamples; n++) {
+    realResult += pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
+    imagResult += pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
 }
 </pre><p>There are separate functions for floating-point, Q15, and Q31 data types. </p>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="gadcfaf567a25eb641da4043eafb9bb076"></a>
+<a class="anchor" id="ga93796e73f02771cf6fe13de016e296ed"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_cmplx_dot_prod_f32 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -182,32 +182,32 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramname">*pSrcA</td><td>points to the first input vector </td></tr>
-    <tr><td class="paramname">*pSrcB</td><td>points to the second input vector </td></tr>
-    <tr><td class="paramname">numSamples</td><td>number of complex samples in each vector </td></tr>
-    <tr><td class="paramname">*realResult</td><td>real part of the result returned here </td></tr>
-    <tr><td class="paramname">*imagResult</td><td>imaginary part of the result returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numSamples</td><td>number of samples in each vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">realResult</td><td>real part of the result returned here </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">imagResult</td><td>imaginary part of the result returned here </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga2b08b5e8001d2c15204639d00893fc70"></a>
+<a class="anchor" id="gae712971379c461cfb8bef7e423bf8417"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_cmplx_dot_prod_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -237,34 +237,33 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramname">*pSrcA</td><td>points to the first input vector </td></tr>
-    <tr><td class="paramname">*pSrcB</td><td>points to the second input vector </td></tr>
-    <tr><td class="paramname">numSamples</td><td>number of complex samples in each vector </td></tr>
-    <tr><td class="paramname">*realResult</td><td>real part of the result returned here </td></tr>
-    <tr><td class="paramname">*imagResult</td><td>imaginary part of the result returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numSamples</td><td>number of samples in each vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">realResult</td><td>real part of the result returned here </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">imagResult</td><td>imaginary part of the result returned her </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using an internal 64-bit accumulator. The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result. These are accumulated in a 64-bit accumulator with 34.30 precision. As a final step, the accumulators are converted to 8.24 format. The return results <code>realResult</code> and <code>imagResult</code> are in 8.24 format. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 64-bit accumulator. The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result. These are accumulated in a 64-bit accumulator with 34.30 precision. As a final step, the accumulators are converted to 8.24 format. The return results <code>realResult</code> and <code>imagResult</code> are in 8.24 format. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga5b731a59db062a9ad84562ef68a6c8af"></a>
+<a class="anchor" id="gaa90661b5eee3b6d83a149043ada0eb37"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_cmplx_dot_prod_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcA</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrcB</em>, </td>
         </tr>
         <tr>
@@ -294,17 +293,16 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramname">*pSrcA</td><td>points to the first input vector </td></tr>
-    <tr><td class="paramname">*pSrcB</td><td>points to the second input vector </td></tr>
-    <tr><td class="paramname">numSamples</td><td>number of complex samples in each vector </td></tr>
-    <tr><td class="paramname">*realResult</td><td>real part of the result returned here </td></tr>
-    <tr><td class="paramname">*imagResult</td><td>imaginary part of the result returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcA</td><td>points to the first input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrcB</td><td>points to the second input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numSamples</td><td>number of samples in each vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">realResult</td><td>real part of the result returned here </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">imagResult</td><td>imaginary part of the result returned here </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using an internal 64-bit accumulator. The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format. The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits. Additions are nonsaturating and no overflow will occur as long as <code>numSamples</code> is less than 32768. The return results <code>realResult</code> and <code>imagResult</code> are in 16.48 format. Input down scaling is not required. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 64-bit accumulator. The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format. The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits. Additions are nonsaturating and no overflow will occur as long as <code>numSamples</code> is less than 32768. The return results <code>realResult</code> and <code>imagResult</code> are in 16.48 format. Input down scaling is not required. </dd></dl>
 
 </div>
 </div>
@@ -313,7 +311,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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-    [ "arm_cmplx_dot_prod_q31", "group__cmplx__dot__prod.html#ga5b731a59db062a9ad84562ef68a6c8af", null ]
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    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,33 +116,34 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gae45024c497392cde2ae358a76d435213"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag.html#gae45024c497392cde2ae358a76d435213">arm_cmplx_mag_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:gae45024c497392cde2ae358a76d435213"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex magnitude.  <a href="#gae45024c497392cde2ae358a76d435213">More...</a><br/></td></tr>
-<tr class="separator:gae45024c497392cde2ae358a76d435213"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga0a4a8f77a6a51d9b3f3b9d729f85b7a4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag.html#ga0a4a8f77a6a51d9b3f3b9d729f85b7a4">arm_cmplx_mag_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:ga0a4a8f77a6a51d9b3f3b9d729f85b7a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex magnitude.  <a href="#ga0a4a8f77a6a51d9b3f3b9d729f85b7a4">More...</a><br/></td></tr>
-<tr class="separator:ga0a4a8f77a6a51d9b3f3b9d729f85b7a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:ga14f82f9230e9d96d5b9774e2fefcb7be"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex magnitude.  <a href="#ga14f82f9230e9d96d5b9774e2fefcb7be">More...</a><br/></td></tr>
-<tr class="separator:ga14f82f9230e9d96d5b9774e2fefcb7be"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaba4e0eff7816fe80d01121fb4cf6c6bc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag.html#gaba4e0eff7816fe80d01121fb4cf6c6bc">arm_cmplx_mag_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:gaba4e0eff7816fe80d01121fb4cf6c6bc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex magnitude.  <a href="#gaba4e0eff7816fe80d01121fb4cf6c6bc">More...</a><br/></td></tr>
+<tr class="separator:gaba4e0eff7816fe80d01121fb4cf6c6bc"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0488e185f4631ac029b02f1759b287cf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag.html#ga0488e185f4631ac029b02f1759b287cf">arm_cmplx_mag_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:ga0488e185f4631ac029b02f1759b287cf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex magnitude.  <a href="#ga0488e185f4631ac029b02f1759b287cf">More...</a><br/></td></tr>
+<tr class="separator:ga0488e185f4631ac029b02f1759b287cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab69ad9237469565958cce6b4555bbb6e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag.html#gab69ad9237469565958cce6b4555bbb6e">arm_cmplx_mag_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:gab69ad9237469565958cce6b4555bbb6e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex magnitude.  <a href="#gab69ad9237469565958cce6b4555bbb6e">More...</a><br/></td></tr>
+<tr class="separator:gab69ad9237469565958cce6b4555bbb6e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>Computes the magnitude of the elements of a complex data vector.</p>
-<p>The <code>pSrc</code> points to the source data and <code>pDst</code> points to the where the result should be written. <code>numSamples</code> specifies the number of complex samples in the input array and the data is stored in an interleaved fashion (real, imag, real, imag, ...). The input array has a total of <code>2*numSamples</code> values; the output array has a total of <code>numSamples</code> values. The underlying algorithm is used:</p>
+<p>The <code>pSrc</code> points to the source data and <code>pDst</code> points to the where the result should be written. <code>numSamples</code> specifies the number of complex samples in the input array and the data is stored in an interleaved fashion (real, imag, real, imag, ...). The input array has a total of <code>2*numSamples</code> values; the output array has a total of <code>numSamples</code> values.</p>
+<p>The underlying algorithm is used:</p>
 <pre>
-for(n=0; n&lt;numSamples; n++) {
+for (n = 0; n &lt; numSamples; n++) {
     pDst[n] = sqrt(pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2);
 }
 </pre><p>There are separate functions for floating-point, Q15, and Q31 data types. </p>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="gae45024c497392cde2ae358a76d435213"></a>
+<a class="anchor" id="gaba4e0eff7816fe80d01121fb4cf6c6bc"></a>
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 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_cmplx_mag_f32 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -166,28 +167,24 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to complex input buffer </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to real output buffer </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numSamples</td><td>number of complex samples in the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numSamples</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="group__SQRT.html#ga697d82c2747a3302cf44e7c9583da2e8">arm_sqrt_f32()</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__fft__bin__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga0a4a8f77a6a51d9b3f3b9d729f85b7a4"></a>
+<a class="anchor" id="ga0488e185f4631ac029b02f1759b287cf"></a>
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           <td class="memname">void arm_cmplx_mag_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -211,28 +208,25 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramname">*pSrc</td><td>points to the complex input vector </td></tr>
-    <tr><td class="paramname">*pDst</td><td>points to the real output vector </td></tr>
-    <tr><td class="paramname">numSamples</td><td>number of complex samples in the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numSamples</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a2eed05660fedbe3fbd0b6dbb1315cfc3">__SMUAD()</a>, and <a class="el" href="group__SQRT.html#ga5abe5ca724f3e15849662b03752c1238">arm_sqrt_q15()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga14f82f9230e9d96d5b9774e2fefcb7be"></a>
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           <td class="memname">void arm_cmplx_mag_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
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@@ -256,17 +250,14 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramname">*pSrc</td><td>points to the complex input vector </td></tr>
-    <tr><td class="paramname">*pDst</td><td>points to the real output vector </td></tr>
-    <tr><td class="paramname">numSamples</td><td>number of complex samples in the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numSamples</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function implements 1.31 by 1.31 multiplications and finally output is converted into 2.30 format. Input down scaling is not required. </dd></dl>
-
-<p>References <a class="el" href="group__SQRT.html#ga119e25831e141d734d7ef10636670058">arm_sqrt_q31()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function implements 1.31 by 1.31 multiplications and finally output is converted into 2.30 format. Input down scaling is not required. </dd></dl>
 
 </div>
 </div>
@@ -275,7 +266,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    [ "arm_cmplx_mag_q31", "group__cmplx__mag.html#ga14f82f9230e9d96d5b9774e2fefcb7be", null ]
+    [ "arm_cmplx_mag_f32", "group__cmplx__mag.html#gaba4e0eff7816fe80d01121fb4cf6c6bc", null ],
+    [ "arm_cmplx_mag_q15", "group__cmplx__mag.html#ga0488e185f4631ac029b02f1759b287cf", null ],
+    [ "arm_cmplx_mag_q31", "group__cmplx__mag.html#gab69ad9237469565958cce6b4555bbb6e", null ]
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diff --git a/docs/DSP/html/group__cmplx__mag__squared.html b/docs/DSP/html/group__cmplx__mag__squared.html
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+++ b/docs/DSP/html/group__cmplx__mag__squared.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -116,34 +116,34 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gaa7faccc0d96b061d8b7d0d7d82045074"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag__squared.html#gaa7faccc0d96b061d8b7d0d7d82045074">arm_cmplx_mag_squared_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:gaa7faccc0d96b061d8b7d0d7d82045074"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex magnitude squared.  <a href="#gaa7faccc0d96b061d8b7d0d7d82045074">More...</a><br/></td></tr>
-<tr class="separator:gaa7faccc0d96b061d8b7d0d7d82045074"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga45537f576102d960d467eb722b8431f2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag__squared.html#ga45537f576102d960d467eb722b8431f2">arm_cmplx_mag_squared_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:ga45537f576102d960d467eb722b8431f2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex magnitude squared.  <a href="#ga45537f576102d960d467eb722b8431f2">More...</a><br/></td></tr>
-<tr class="separator:ga45537f576102d960d467eb722b8431f2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga384b0538101e8c03fa4fa14271e63b04"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag__squared.html#ga384b0538101e8c03fa4fa14271e63b04">arm_cmplx_mag_squared_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t numSamples)</td></tr>
-<tr class="memdesc:ga384b0538101e8c03fa4fa14271e63b04"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex magnitude squared.  <a href="#ga384b0538101e8c03fa4fa14271e63b04">More...</a><br/></td></tr>
-<tr class="separator:ga384b0538101e8c03fa4fa14271e63b04"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga925ef5458a384f63d06f1c6997d1fb7d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag__squared.html#ga925ef5458a384f63d06f1c6997d1fb7d">arm_cmplx_mag_squared_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:ga925ef5458a384f63d06f1c6997d1fb7d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point complex magnitude squared.  <a href="#ga925ef5458a384f63d06f1c6997d1fb7d">More...</a><br/></td></tr>
+<tr class="separator:ga925ef5458a384f63d06f1c6997d1fb7d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafdd1e838db0aef7ec201611883bd444c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag__squared.html#gafdd1e838db0aef7ec201611883bd444c">arm_cmplx_mag_squared_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:gafdd1e838db0aef7ec201611883bd444c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 complex magnitude squared.  <a href="#gafdd1e838db0aef7ec201611883bd444c">More...</a><br/></td></tr>
+<tr class="separator:gafdd1e838db0aef7ec201611883bd444c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9d74dbc0a777cfcc75c1cae33ef4d44a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__cmplx__mag__squared.html#ga9d74dbc0a777cfcc75c1cae33ef4d44a">arm_cmplx_mag_squared_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t numSamples)</td></tr>
+<tr class="memdesc:ga9d74dbc0a777cfcc75c1cae33ef4d44a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q31 complex magnitude squared.  <a href="#ga9d74dbc0a777cfcc75c1cae33ef4d44a">More...</a><br/></td></tr>
+<tr class="separator:ga9d74dbc0a777cfcc75c1cae33ef4d44a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>Computes the magnitude squared of the elements of a complex data vector.</p>
 <p>The <code>pSrc</code> points to the source data and <code>pDst</code> points to the where the result should be written. <code>numSamples</code> specifies the number of complex samples in the input array and the data is stored in an interleaved fashion (real, imag, real, imag, ...). The input array has a total of <code>2*numSamples</code> values; the output array has a total of <code>numSamples</code> values.</p>
 <p>The underlying algorithm is used:</p>
 <pre>
-for(n=0; n&lt;numSamples; n++) {
+for (n = 0; n &lt; numSamples; n++) {
     pDst[n] = pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2;
 }
 </pre><p>There are separate functions for floating-point, Q15, and Q31 data types. </p>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="gaa7faccc0d96b061d8b7d0d7d82045074"></a>
+<a class="anchor" id="ga925ef5458a384f63d06f1c6997d1fb7d"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_cmplx_mag_squared_f32 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -167,24 +167,24 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the complex input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the real output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">numSamples</td><td>number of complex samples in the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numSamples</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga45537f576102d960d467eb722b8431f2"></a>
+<a class="anchor" id="gafdd1e838db0aef7ec201611883bd444c"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_cmplx_mag_squared_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -208,28 +208,25 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramname">*pSrc</td><td>points to the complex input vector </td></tr>
-    <tr><td class="paramname">*pDst</td><td>points to the real output vector </td></tr>
-    <tr><td class="paramname">numSamples</td><td>number of complex samples in the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numSamples</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__math_8h.html#a2eed05660fedbe3fbd0b6dbb1315cfc3">__SMUAD()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format. </dd></dl>
 
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-<a class="anchor" id="ga384b0538101e8c03fa4fa14271e63b04"></a>
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           <td class="memname">void arm_cmplx_mag_squared_q31 </td>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -253,15 +250,14 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramname">*pSrc</td><td>points to the complex input vector </td></tr>
-    <tr><td class="paramname">*pDst</td><td>points to the real output vector </td></tr>
-    <tr><td class="paramname">numSamples</td><td>number of complex samples in the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">numSamples</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format. Input down scaling is not required. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format. Input down scaling is not required. </dd></dl>
 
 </div>
 </div>
@@ -270,7 +266,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/group__cmplx__mag__squared.js b/docs/DSP/html/group__cmplx__mag__squared.js
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-    [ "arm_cmplx_mag_squared_q31", "group__cmplx__mag__squared.html#ga384b0538101e8c03fa4fa14271e63b04", null ]
+    [ "arm_cmplx_mag_squared_f32", "group__cmplx__mag__squared.html#ga925ef5458a384f63d06f1c6997d1fb7d", null ],
+    [ "arm_cmplx_mag_squared_q15", "group__cmplx__mag__squared.html#gafdd1e838db0aef7ec201611883bd444c", null ],
+    [ "arm_cmplx_mag_squared_q31", "group__cmplx__mag__squared.html#ga9d74dbc0a777cfcc75c1cae33ef4d44a", null ]
 ];
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index d2c83e0..f999381 100644
--- a/docs/DSP/html/group__copy.html
+++ b/docs/DSP/html/group__copy.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,33 +116,33 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gadd1f737e677e0e6ca31767c7001417b3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#gadd1f737e677e0e6ca31767c7001417b3">arm_copy_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gadd1f737e677e0e6ca31767c7001417b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a floating-point vector.  <a href="#gadd1f737e677e0e6ca31767c7001417b3">More...</a><br/></td></tr>
-<tr class="separator:gadd1f737e677e0e6ca31767c7001417b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga872ca4cfc18c680b8991ccd569a5fda0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#ga872ca4cfc18c680b8991ccd569a5fda0">arm_copy_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga872ca4cfc18c680b8991ccd569a5fda0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a Q15 vector.  <a href="#ga872ca4cfc18c680b8991ccd569a5fda0">More...</a><br/></td></tr>
-<tr class="separator:ga872ca4cfc18c680b8991ccd569a5fda0"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaddf70be7e3f87e535c324862b501f3f9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#gaddf70be7e3f87e535c324862b501f3f9">arm_copy_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaddf70be7e3f87e535c324862b501f3f9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a Q31 vector.  <a href="#gaddf70be7e3f87e535c324862b501f3f9">More...</a><br/></td></tr>
-<tr class="separator:gaddf70be7e3f87e535c324862b501f3f9"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga467579beda492aa92797529d794c88fb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#ga467579beda492aa92797529d794c88fb">arm_copy_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga467579beda492aa92797529d794c88fb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a Q7 vector.  <a href="#ga467579beda492aa92797529d794c88fb">More...</a><br/></td></tr>
-<tr class="separator:ga467579beda492aa92797529d794c88fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa6dfe9554ca61eb3d1eee498396bce88"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#gaa6dfe9554ca61eb3d1eee498396bce88">arm_copy_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaa6dfe9554ca61eb3d1eee498396bce88"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a floating-point vector.  <a href="#gaa6dfe9554ca61eb3d1eee498396bce88">More...</a><br/></td></tr>
+<tr class="separator:gaa6dfe9554ca61eb3d1eee498396bce88"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaeb9e8c16ec7fe1235e5610142400f15f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#gaeb9e8c16ec7fe1235e5610142400f15f">arm_copy_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaeb9e8c16ec7fe1235e5610142400f15f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a Q15 vector.  <a href="#gaeb9e8c16ec7fe1235e5610142400f15f">More...</a><br/></td></tr>
+<tr class="separator:gaeb9e8c16ec7fe1235e5610142400f15f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga94c51fe2e82560ade3803787309c1282"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#ga94c51fe2e82560ade3803787309c1282">arm_copy_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga94c51fe2e82560ade3803787309c1282"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a Q31 vector.  <a href="#ga94c51fe2e82560ade3803787309c1282">More...</a><br/></td></tr>
+<tr class="separator:ga94c51fe2e82560ade3803787309c1282"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9b947e38172ae7e5de780bed13a404fe"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__copy.html#ga9b947e38172ae7e5de780bed13a404fe">arm_copy_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga9b947e38172ae7e5de780bed13a404fe"><td class="mdescLeft">&#160;</td><td class="mdescRight">Copies the elements of a Q7 vector.  <a href="#ga9b947e38172ae7e5de780bed13a404fe">More...</a><br/></td></tr>
+<tr class="separator:ga9b947e38172ae7e5de780bed13a404fe"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>Copies sample by sample from source vector to destination vector.</p>
 <pre>
-        pDst[n] = pSrc[n];   0 &lt;= n &lt; blockSize.
+    pDst[n] = pSrc[n];   0 &lt;= n &lt; blockSize.
 </pre><p>There are separate functions for floating point, Q31, Q15, and Q7 data types. </p>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="gadd1f737e677e0e6ca31767c7001417b3"></a>
+<a class="anchor" id="gaa6dfe9554ca61eb3d1eee498396bce88"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_copy_f32 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -166,28 +166,24 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__convolution__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga872ca4cfc18c680b8991ccd569a5fda0"></a>
+<a class="anchor" id="gaeb9e8c16ec7fe1235e5610142400f15f"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_copy_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -211,28 +207,24 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
-<p>Referenced by <a class="el" href="group__Conv.html#gaf16f490d245391ec18a42adc73d6d749">arm_conv_fast_opt_q15()</a>, <a class="el" href="group__Conv.html#gac77dbcaef5c754cac27eab96c4753a3c">arm_conv_opt_q15()</a>, <a class="el" href="group__PartialConv.html#ga3de9c4ddcc7886de25b70d875099a8d9">arm_conv_partial_fast_opt_q15()</a>, <a class="el" href="group__PartialConv.html#ga834b23b4ade8682beeb55778399101f8">arm_conv_partial_opt_q15()</a>, <a class="el" href="group__Corr.html#ga40a0236b17220e8e22a22b5bc1c53c6b">arm_correlate_fast_opt_q15()</a>, and <a class="el" href="group__Corr.html#gad71c0ec70ec69edbc48563d9a5f68451">arm_correlate_opt_q15()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gaddf70be7e3f87e535c324862b501f3f9"></a>
+<a class="anchor" id="ga94c51fe2e82560ade3803787309c1282"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_copy_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -256,26 +248,24 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga467579beda492aa92797529d794c88fb"></a>
+<a class="anchor" id="ga9b947e38172ae7e5de780bed13a404fe"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_copy_q7 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -299,15 +289,13 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
@@ -316,7 +304,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/group__copy.js b/docs/DSP/html/group__copy.js
index a0c09b0..8b03ab2 100644
--- a/docs/DSP/html/group__copy.js
+++ b/docs/DSP/html/group__copy.js
@@ -1,7 +1,7 @@
 var group__copy =
 [
-    [ "arm_copy_f32", "group__copy.html#gadd1f737e677e0e6ca31767c7001417b3", null ],
-    [ "arm_copy_q15", "group__copy.html#ga872ca4cfc18c680b8991ccd569a5fda0", null ],
-    [ "arm_copy_q31", "group__copy.html#gaddf70be7e3f87e535c324862b501f3f9", null ],
-    [ "arm_copy_q7", "group__copy.html#ga467579beda492aa92797529d794c88fb", null ]
+    [ "arm_copy_f32", "group__copy.html#gaa6dfe9554ca61eb3d1eee498396bce88", null ],
+    [ "arm_copy_q15", "group__copy.html#gaeb9e8c16ec7fe1235e5610142400f15f", null ],
+    [ "arm_copy_q31", "group__copy.html#ga94c51fe2e82560ade3803787309c1282", null ],
+    [ "arm_copy_q7", "group__copy.html#ga9b947e38172ae7e5de780bed13a404fe", null ]
 ];
\ No newline at end of file
diff --git a/docs/DSP/html/group__cos.html b/docs/DSP/html/group__cos.html
index 70ad705..bdeb501 100644
--- a/docs/DSP/html/group__cos.html
+++ b/docs/DSP/html/group__cos.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -127,7 +127,7 @@
 <tr class="separator:gad80f121949ef885a77d83ab36e002567"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Computes the trigonometric cosine function using a combination of table lookup and linear interpolation. There are separate functions for Q15, Q31, and floating-point data types. The input to the floating-point version is in radians and in the range [0 2*pi) while the fixed-point Q15 and Q31 have a scaled input with the range [0 +0.9999] mapping to [0 2*pi). The fixed-point range is chosen so that a value of 2*pi wraps around to 0.</p>
+<p>Computes the trigonometric cosine function using a combination of table lookup and linear interpolation. There are separate functions for Q15, Q31, and floating-point data types. The input to the floating-point version is in radians while the fixed-point Q15 and Q31 have a scaled input with the range [0 +0.9999] mapping to [0 2*pi). The fixed-point range is chosen so that a value of 2*pi wraps around to 0.</p>
 <p>The implementation is based on table lookup using 256 values together with linear interpolation. The steps used are:</p>
 <ol type="1">
 <li>Calculation of the nearest integer table index</li>
@@ -136,8 +136,8 @@
 </ol>
 <p>where </p>
 <pre>
-   b=Table[index+0];
-   c=Table[index+1];
+   b = Table[index];
+   c = Table[index+1];
 </pre> <h2 class="groupheader">Function Documentation</h2>
 <a class="anchor" id="gace15287f9c64b9b4084d1c797d4c49d8"></a>
 <div class="memitem">
@@ -154,15 +154,11 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">x</td><td>input value in radians. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">x</td><td>input value in radians </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>cos(x). </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#afcb9147c96853bea484cfc2dde07463d">FAST_MATH_TABLE_SIZE</a>, and <a class="el" href="arm__common__tables_8h.html#a1dec82d596780f1a66ef4f76f137c1d9">sinTable_f32</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__sin__cos__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>cos(x) </dd></dl>
 
 </div>
 </div>
@@ -181,14 +177,12 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">x</td><td>Scaled input value in radians. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">x</td><td>Scaled input value in radians </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>cos(x).</dd></dl>
-<p>The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi). </p>
-
-<p>References <a class="el" href="arm__math_8h.html#a34716b73c631e65e8dd855e08384ecb2">FAST_MATH_Q15_SHIFT</a>, and <a class="el" href="arm__common__tables_8h.html#a9cbcfe313f61add745ebfeddb4fecd55">sinTable_q15</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>cos(x)</dd></dl>
+<p>The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI). </p>
 
 </div>
 </div>
@@ -207,14 +201,12 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">x</td><td>Scaled input value in radians. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">x</td><td>Scaled input value in radians </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>cos(x).</dd></dl>
-<p>The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi). </p>
-
-<p>References <a class="el" href="arm__math_8h.html#a4268f77b1811a0c7fc2532a0bf6108b0">FAST_MATH_Q31_SHIFT</a>, and <a class="el" href="arm__common__tables_8h.html#a8bfccee9e1c0042cf4a765f4b19d097d">sinTable_q31</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>cos(x)</dd></dl>
+<p>The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI). </p>
 
 </div>
 </div>
@@ -223,7 +215,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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-<title>CMSIS-DSP: Vector Dot Product</title>
-<link href="tabs.css" rel="stylesheet" type="text/css"/>
-<link href="cmsis.css" rel="stylesheet" type="text/css" />
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-  <td style="padding-left: 0.5em;">
-   <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
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-   <div id="projectbrief">CMSIS DSP Software Library</div>
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- </tr>
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-      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
-      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
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-<a href="#func-members">Functions</a>  </div>
-  <div class="headertitle">
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-Functions</h2></td></tr>
-<tr class="memitem:ga55418d4362f6ba84c327f9b4f089a8c3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dot__prod.html#ga55418d4362f6ba84c327f9b4f089a8c3">arm_dot_prod_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrcB, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *result)</td></tr>
-<tr class="memdesc:ga55418d4362f6ba84c327f9b4f089a8c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of floating-point vectors.  <a href="#ga55418d4362f6ba84c327f9b4f089a8c3">More...</a><br/></td></tr>
-<tr class="separator:ga55418d4362f6ba84c327f9b4f089a8c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga436d5bed28a4b73b24acbde436a3044b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dot__prod.html#ga436d5bed28a4b73b24acbde436a3044b">arm_dot_prod_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrcB, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *result)</td></tr>
-<tr class="memdesc:ga436d5bed28a4b73b24acbde436a3044b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of Q15 vectors.  <a href="#ga436d5bed28a4b73b24acbde436a3044b">More...</a><br/></td></tr>
-<tr class="separator:ga436d5bed28a4b73b24acbde436a3044b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab15d8fa060fc85b4d948d091b7deaa11"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dot__prod.html#gab15d8fa060fc85b4d948d091b7deaa11">arm_dot_prod_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrcB, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *result)</td></tr>
-<tr class="memdesc:gab15d8fa060fc85b4d948d091b7deaa11"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of Q31 vectors.  <a href="#gab15d8fa060fc85b4d948d091b7deaa11">More...</a><br/></td></tr>
-<tr class="separator:gab15d8fa060fc85b4d948d091b7deaa11"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga9c3293a50ac7ec8ba928bf8e3aaea6c1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dot__prod.html#ga9c3293a50ac7ec8ba928bf8e3aaea6c1">arm_dot_prod_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcA, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrcB, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *result)</td></tr>
-<tr class="memdesc:ga9c3293a50ac7ec8ba928bf8e3aaea6c1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dot product of Q7 vectors.  <a href="#ga9c3293a50ac7ec8ba928bf8e3aaea6c1">More...</a><br/></td></tr>
-<tr class="separator:ga9c3293a50ac7ec8ba928bf8e3aaea6c1"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input vector </td></tr>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input vector </td></tr>
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-</dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these results are added to a 64-bit accumulator in 34.30 format. Nonsaturating additions are used and given that there are 33 guard bits in the accumulator there is no risk of overflow. The return result is in 34.30 format. </dd></dl>
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-          <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
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-          <td></td>
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-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>blockSize</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *&#160;</td>
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-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*result</td><td>output result returned here </td></tr>
-  </table>
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-</dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these are truncated to 2.48 format by discarding the lower 14 bits. The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. There are 15 guard bits in the accumulator and there is no risk of overflow as long as the length of the vectors is less than 2^16 elements. The return result is in 16.48 format. </dd></dl>
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-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcA</td><td>points to the first input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrcB</td><td>points to the second input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*result</td><td>output result returned here </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these results are added to an accumulator in 18.14 format. Nonsaturating additions are used and there is no danger of wrap around as long as the vectors are less than 2^18 elements long. The return result is in 18.14 format. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#aa611fdbf6c56c46553701d6596a79aaf">__SMLAD()</a>, <a class="el" href="arm__math_8h.html#ac9f7f02a5e0ad5642026dbd0da7418db">__SXTB16()</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
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 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga215456e35a18db86882e1d3f0d24e1f2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__float__to__x.html#ga215456e35a18db86882e1d3f0d24e1f2">arm_float_to_q15</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga215456e35a18db86882e1d3f0d24e1f2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the floating-point vector to Q15 vector.  <a href="#ga215456e35a18db86882e1d3f0d24e1f2">More...</a><br/></td></tr>
-<tr class="separator:ga215456e35a18db86882e1d3f0d24e1f2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga177704107f94564e9abe4daaa36f4554"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__float__to__x.html#ga177704107f94564e9abe4daaa36f4554">arm_float_to_q31</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga177704107f94564e9abe4daaa36f4554"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the floating-point vector to Q31 vector.  <a href="#ga177704107f94564e9abe4daaa36f4554">More...</a><br/></td></tr>
-<tr class="separator:ga177704107f94564e9abe4daaa36f4554"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga44a393818cdee8dce80f2d66add25411"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__float__to__x.html#ga44a393818cdee8dce80f2d66add25411">arm_float_to_q7</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga44a393818cdee8dce80f2d66add25411"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the floating-point vector to Q7 vector.  <a href="#ga44a393818cdee8dce80f2d66add25411">More...</a><br/></td></tr>
-<tr class="separator:ga44a393818cdee8dce80f2d66add25411"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac7696e64963e5051ebb950c88c6ba186"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__float__to__x.html#gac7696e64963e5051ebb950c88c6ba186">arm_float_to_q15</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gac7696e64963e5051ebb950c88c6ba186"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the floating-point vector to Q15 vector.  <a href="#gac7696e64963e5051ebb950c88c6ba186">More...</a><br/></td></tr>
+<tr class="separator:gac7696e64963e5051ebb950c88c6ba186"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaae21be47db707e79552f3e8221a48fb0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__float__to__x.html#gaae21be47db707e79552f3e8221a48fb0">arm_float_to_q31</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gaae21be47db707e79552f3e8221a48fb0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the floating-point vector to Q31 vector.  <a href="#gaae21be47db707e79552f3e8221a48fb0">More...</a><br/></td></tr>
+<tr class="separator:gaae21be47db707e79552f3e8221a48fb0"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga63b7cef42a242f0be43376ba3380988d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__float__to__x.html#ga63b7cef42a242f0be43376ba3380988d">arm_float_to_q7</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga63b7cef42a242f0be43376ba3380988d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the floating-point vector to Q7 vector.  <a href="#ga63b7cef42a242f0be43376ba3380988d">More...</a><br/></td></tr>
+<tr class="separator:ga63b7cef42a242f0be43376ba3380988d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga215456e35a18db86882e1d3f0d24e1f2"></a>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
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@@ -159,33 +159,29 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the floating-point input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the Q15 output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the floating-point input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the Q15 output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Description:</dt><dd></dd></dl>
-<dl class="section user"><dt></dt><dd>The equation used for the conversion process is: <pre>
-        pDst[n] = (q15_t)(pSrc[n] * 32768);   0 &lt;= n &lt; blockSize.
-</pre> </dd></dl>
-<dl class="section user"><dt>Scaling and Overflow Behavior:</dt><dd></dd></dl>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. </dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Details</dt><dd>The equation used for the conversion process is: <pre>
+    pDst[n] = (q15_t)(pSrc[n] * 32768);   0 &lt;= n &lt; blockSize.
+</pre></dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.</dd></dl>
 <dl class="section note"><dt>Note</dt><dd>In order to apply rounding, the library should be rebuilt with the ROUNDING macro defined in the preprocessor section of project options. </dd></dl>
 
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
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           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -209,35 +205,29 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the floating-point input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the Q31 output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the floating-point input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the Q31 output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Description:</dt><dd></dd></dl>
-<dl class="section user"><dt></dt><dd>The equation used for the conversion process is:</dd></dl>
-<pre>
-        pDst[n] = (q31_t)(pSrc[n] * 2147483648);   0 &lt;= n &lt; blockSize.
- </pre><p> <b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.</dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Details</dt><dd>The equation used for the conversion process is: <pre>
+    pDst[n] = (q31_t)(pSrc[n] * 2147483648);   0 &lt;= n &lt; blockSize.
+</pre></dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] are saturated.</dd></dl>
 <dl class="section note"><dt>Note</dt><dd>In order to apply rounding, the library should be rebuilt with the ROUNDING macro defined in the preprocessor section of project options. </dd></dl>
 
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, and <a class="el" href="arm__math_8h.html#a9a94b78de0f083bd8fadf3c3abe40431">clip_q63_to_q31()</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__graphic__equalizer__example__q31_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
-
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 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_float_to_q7 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -276,8 +266,6 @@
 <dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] will be saturated. </dd></dl>
 <dl class="section note"><dt>Note</dt><dd>In order to apply rounding, the library should be rebuilt with the ROUNDING macro defined in the preprocessor section of project options. </dd></dl>
 
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
 </div>
 </div>
 </div><!-- contents -->
@@ -285,7 +273,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/group__float__to__x.js b/docs/DSP/html/group__float__to__x.js
index c312cd1..2bc0fa6 100644
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+++ b/docs/DSP/html/group__float__to__x.js
@@ -1,6 +1,6 @@
 var group__float__to__x =
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-    [ "arm_float_to_q15", "group__float__to__x.html#ga215456e35a18db86882e1d3f0d24e1f2", null ],
-    [ "arm_float_to_q31", "group__float__to__x.html#ga177704107f94564e9abe4daaa36f4554", null ],
-    [ "arm_float_to_q7", "group__float__to__x.html#ga44a393818cdee8dce80f2d66add25411", null ]
+    [ "arm_float_to_q15", "group__float__to__x.html#gac7696e64963e5051ebb950c88c6ba186", null ],
+    [ "arm_float_to_q31", "group__float__to__x.html#gaae21be47db707e79552f3e8221a48fb0", null ],
+    [ "arm_float_to_q7", "group__float__to__x.html#ga63b7cef42a242f0be43376ba3380988d", null ]
 ];
\ No newline at end of file
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index daae64f..5e058d5 100644
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+++ b/docs/DSP/html/group__groupCmplxMath.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
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+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -136,7 +136,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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index f6ab005..0b3597a 100644
--- a/docs/DSP/html/group__groupController.html
+++ b/docs/DSP/html/group__groupController.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -135,7 +135,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/group__groupExamples.html b/docs/DSP/html/group__groupExamples.html
index 344a45d..bb52c7e 100644
--- a/docs/DSP/html/group__groupExamples.html
+++ b/docs/DSP/html/group__groupExamples.html
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   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -145,7 +145,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__groupFastMath.html b/docs/DSP/html/group__groupFastMath.html
index daf808c..ce468f7 100644
--- a/docs/DSP/html/group__groupFastMath.html
+++ b/docs/DSP/html/group__groupFastMath.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -130,7 +130,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__groupFilters.html b/docs/DSP/html/group__groupFilters.html
index 0d9ea0d..960fc70 100644
--- a/docs/DSP/html/group__groupFilters.html
+++ b/docs/DSP/html/group__groupFilters.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -151,7 +151,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
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index f21bb47..f00ed99 100644
--- a/docs/DSP/html/group__groupInterpolation.html
+++ b/docs/DSP/html/group__groupInterpolation.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -128,7 +128,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__groupMath.html b/docs/DSP/html/group__groupMath.html
index b7ef3dd..513a351 100644
--- a/docs/DSP/html/group__groupMath.html
+++ b/docs/DSP/html/group__groupMath.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -120,17 +120,17 @@
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-<tr class="memitem:group__dot__prod"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dot__prod.html">Vector Dot Product</a></td></tr>
+<tr class="memitem:group__BasicDotProd"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__BasicDotProd.html">Vector Dot Product</a></td></tr>
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@@ -141,7 +141,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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index a354be2..59058b8 100644
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-    [ "Vector Dot Product", "group__dot__prod.html", "group__dot__prod" ],
+    [ "Vector Dot Product", "group__BasicDotProd.html", "group__BasicDotProd" ],
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+    [ "Vector Offset", "group__BasicOffset.html", "group__BasicOffset" ],
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index 357135d..9e15ecb 100644
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+++ b/docs/DSP/html/group__groupMatrix.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
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+   &#160;<span id="projectnumber">Version 1.7.0</span>
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@@ -146,7 +146,7 @@
 <p>The structure specifies the size of the matrix and then points to an array of data. The array is of size <code>numRows X numCols</code> and the values are arranged in row order. That is, the matrix element (i, j) is stored at: </p>
 <pre>
     pData[i*numCols + j]
-</pre><dl class="section user"><dt>Init Functions</dt><dd>There is an associated initialization function for each type of matrix data structure. The initialization function sets the values of the internal structure fields. Refer to the function <code><a class="el" href="group__MatrixInit.html#ga11e3dc41592a6401c13182fef9416a27" title="Floating-point matrix initialization. ">arm_mat_init_f32()</a></code>, <code><a class="el" href="group__MatrixInit.html#ga48a5e5d37e1f062cc57fcfaf683343cc" title="Q31 matrix initialization. ">arm_mat_init_q31()</a></code> and <code><a class="el" href="group__MatrixInit.html#ga31a7c2b991803d49719393eb2d53dc26" title="Q15 matrix initialization. ">arm_mat_init_q15()</a></code> for floating-point, Q31 and Q15 types, respectively.</dd></dl>
+</pre><dl class="section user"><dt>Init Functions</dt><dd>There is an associated initialization function for each type of matrix data structure. The initialization function sets the values of the internal structure fields. Refer to <a class="el" href="group__MatrixInit.html#ga11e3dc41592a6401c13182fef9416a27">arm_mat_init_f32()</a>, <a class="el" href="group__MatrixInit.html#ga48a5e5d37e1f062cc57fcfaf683343cc">arm_mat_init_q31()</a> and <a class="el" href="group__MatrixInit.html#ga31a7c2b991803d49719393eb2d53dc26">arm_mat_init_q15()</a> for floating-point, Q31 and Q15 types, respectively.</dd></dl>
 <dl class="section user"><dt></dt><dd>Use of the initialization function is optional. However, if initialization function is used then the instance structure cannot be placed into a const data section. To place the instance structure in a const data section, manually initialize the data structure. For example: <pre>
 <code><a class="el" href="structarm__matrix__instance__f32.html" title="Instance structure for the floating-point matrix structure. ">arm_matrix_instance_f32</a> S = {nRows, nColumns, pData};</code>
 <code><a class="el" href="structarm__matrix__instance__q31.html" title="Instance structure for the Q31 matrix structure. ">arm_matrix_instance_q31</a> S = {nRows, nColumns, pData};</code>
@@ -164,7 +164,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/group__groupSupport.html b/docs/DSP/html/group__groupSupport.html
index ba74c15..1b2ae3d 100644
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 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/group__groupTransforms.html b/docs/DSP/html/group__groupTransforms.html
index 4545be9..bedfe88 100644
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__inv__clarke.html b/docs/DSP/html/group__inv__clarke.html
index 3c79799..eb4bce9 100644
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 Functions</h2></td></tr>
-<tr class="memitem:ga945eb24e625a57c7c3be8a6e655646e3"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__inv__clarke.html#ga945eb24e625a57c7c3be8a6e655646e3">arm_inv_clarke_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Ialpha, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Ibeta, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pIa, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pIb)</td></tr>
-<tr class="memdesc:ga945eb24e625a57c7c3be8a6e655646e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point Inverse Clarke transform.  <a href="#ga945eb24e625a57c7c3be8a6e655646e3">More...</a><br/></td></tr>
-<tr class="separator:ga945eb24e625a57c7c3be8a6e655646e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga50768ebd8b71e8988dbb804cc03a742d"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__inv__clarke.html#ga50768ebd8b71e8988dbb804cc03a742d">arm_inv_clarke_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Ialpha, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Ibeta, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pIa, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pIb)</td></tr>
-<tr class="memdesc:ga50768ebd8b71e8988dbb804cc03a742d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Inverse Clarke transform for Q31 version.  <a href="#ga50768ebd8b71e8988dbb804cc03a742d">More...</a><br/></td></tr>
-<tr class="separator:ga50768ebd8b71e8988dbb804cc03a742d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1a73ce96f94b2124d02426690e587197"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__inv__clarke.html#ga1a73ce96f94b2124d02426690e587197">arm_inv_clarke_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Ialpha, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Ibeta, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pIa, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pIb)</td></tr>
+<tr class="memdesc:ga1a73ce96f94b2124d02426690e587197"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point Inverse Clarke transform.  <a href="#ga1a73ce96f94b2124d02426690e587197">More...</a><br/></td></tr>
+<tr class="separator:ga1a73ce96f94b2124d02426690e587197"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga3bab178431f22d13332a0dfae4390172"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__inv__clarke.html#ga3bab178431f22d13332a0dfae4390172">arm_inv_clarke_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Ialpha, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Ibeta, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pIa, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pIb)</td></tr>
+<tr class="memdesc:ga3bab178431f22d13332a0dfae4390172"><td class="mdescLeft">&#160;</td><td class="mdescRight">Inverse Clarke transform for Q31 version.  <a href="#ga3bab178431f22d13332a0dfae4390172">More...</a><br/></td></tr>
+<tr class="separator:ga3bab178431f22d13332a0dfae4390172"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>end of clarke group</p>
 <p>Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases.</p>
 <p>The function operates on a single sample of data and each call to the function returns the processed output. The library provides separate functions for Q31 and floating-point data types. </p>
 <dl class="section user"><dt>Algorithm</dt><dd><div class="image">
@@ -132,12 +133,12 @@
  where <code>pIa</code> and <code>pIb</code> are the instantaneous stator phases and <code>Ialpha</code> and <code>Ibeta</code> are the two coordinates of time invariant vector. </dd></dl>
 <dl class="section user"><dt>Fixed-Point Behavior</dt><dd>Care must be taken when using the Q31 version of the Clarke transform. In particular, the overflow and saturation behavior of the accumulator used must be considered. Refer to the function specific documentation below for usage guidelines. </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga945eb24e625a57c7c3be8a6e655646e3"></a>
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           <td>(</td>
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           <td class="paramname"><em>Ialpha</em>, </td>
@@ -176,15 +177,16 @@
   </table>
   </dd>
 </dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
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-          <td class="memname">CMSIS_INLINE __STATIC_INLINE void arm_inv_clarke_q31 </td>
+          <td class="memname">__STATIC_FORCEINLINE void arm_inv_clarke_q31 </td>
           <td>(</td>
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           <td class="paramname"><em>Ialpha</em>, </td>
@@ -219,14 +221,12 @@
     <tr><td class="paramdir">[in]</td><td class="paramname">Ialpha</td><td>input two-phase orthogonal vector axis alpha </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">Ibeta</td><td>input two-phase orthogonal vector axis beta </td></tr>
     <tr><td class="paramdir">[out]</td><td class="paramname">pIa</td><td>points to output three-phase coordinate <code>a</code> </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">pIb</td><td>points to output three-phase coordinate <code>b</code></td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pIb</td><td>points to output three-phase coordinate <code>b</code> </td></tr>
   </table>
   </dd>
 </dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using an internal 32-bit accumulator. The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. There is saturation on the subtraction, hence there is no risk of overflow. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a15e896d0146c280e600d00f609832350">__QSUB()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 32-bit accumulator. The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. There is saturation on the subtraction, hence there is no risk of overflow. </dd></dl>
 
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@@ -235,7 +235,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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index 61923e6..c911a54 100644
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 <table class="memberdecls">
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 Functions</h2></td></tr>
-<tr class="memitem:ga7ca3a87a0954ed8c9ed5a2e6f1c64f30"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__inv__park.html#ga7ca3a87a0954ed8c9ed5a2e6f1c64f30">arm_inv_park_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Id, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Iq, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pIalpha, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pIbeta, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> sinVal, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> cosVal)</td></tr>
-<tr class="memdesc:ga7ca3a87a0954ed8c9ed5a2e6f1c64f30"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point Inverse Park transform.  <a href="#ga7ca3a87a0954ed8c9ed5a2e6f1c64f30">More...</a><br/></td></tr>
-<tr class="separator:ga7ca3a87a0954ed8c9ed5a2e6f1c64f30"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:ga6e00d7320aa4a85686716af8b763e08a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Inverse Park transform for Q31 version.  <a href="#ga6e00d7320aa4a85686716af8b763e08a">More...</a><br/></td></tr>
-<tr class="separator:ga6e00d7320aa4a85686716af8b763e08a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga896b639ecd52c33d427bc7cdc8d303b2"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__inv__park.html#ga896b639ecd52c33d427bc7cdc8d303b2">arm_inv_park_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Id, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Iq, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pIalpha, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pIbeta, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> sinVal, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> cosVal)</td></tr>
+<tr class="memdesc:ga896b639ecd52c33d427bc7cdc8d303b2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point Inverse Park transform.  <a href="#ga896b639ecd52c33d427bc7cdc8d303b2">More...</a><br/></td></tr>
+<tr class="separator:ga896b639ecd52c33d427bc7cdc8d303b2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae7165779ef72e1f797d0c601d6d619b2"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__inv__park.html#gae7165779ef72e1f797d0c601d6d619b2">arm_inv_park_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Id, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Iq, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pIalpha, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pIbeta, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> sinVal, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> cosVal)</td></tr>
+<tr class="memdesc:gae7165779ef72e1f797d0c601d6d619b2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Inverse Park transform for Q31 version.  <a href="#gae7165779ef72e1f797d0c601d6d619b2">More...</a><br/></td></tr>
+<tr class="separator:gae7165779ef72e1f797d0c601d6d619b2"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>end of park group</p>
 <p>Inverse Park transform converts the input flux and torque components to two-coordinate vector.</p>
 <p>The function operates on a single sample of data and each call to the function returns the processed output. The library provides separate functions for Q31 and floating-point data types. </p>
 <dl class="section user"><dt>Algorithm</dt><dd><div class="image">
@@ -132,12 +133,12 @@
  where <code>pIalpha</code> and <code>pIbeta</code> are the stator vector components, <code>Id</code> and <code>Iq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the cosine and sine values of theta (rotor flux position). </dd></dl>
 <dl class="section user"><dt>Fixed-Point Behavior</dt><dd>Care must be taken when using the Q31 version of the Park transform. In particular, the overflow and saturation behavior of the accumulator used must be considered. Refer to the function specific documentation below for usage guidelines. </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga7ca3a87a0954ed8c9ed5a2e6f1c64f30"></a>
+<a class="anchor" id="ga896b639ecd52c33d427bc7cdc8d303b2"></a>
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 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE void arm_inv_park_f32 </td>
+          <td class="memname">__STATIC_FORCEINLINE void arm_inv_park_f32 </td>
           <td>(</td>
           <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td>
           <td class="paramname"><em>Id</em>, </td>
@@ -190,15 +191,16 @@
   </table>
   </dd>
 </dl>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga6e00d7320aa4a85686716af8b763e08a"></a>
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 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE void arm_inv_park_q31 </td>
+          <td class="memname">__STATIC_FORCEINLINE void arm_inv_park_q31 </td>
           <td>(</td>
           <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td>
           <td class="paramname"><em>Id</em>, </td>
@@ -247,14 +249,12 @@
     <tr><td class="paramdir">[out]</td><td class="paramname">pIalpha</td><td>points to output two-phase orthogonal vector axis alpha </td></tr>
     <tr><td class="paramdir">[out]</td><td class="paramname">pIbeta</td><td>points to output two-phase orthogonal vector axis beta </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">sinVal</td><td>sine value of rotation angle theta </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">cosVal</td><td>cosine value of rotation angle theta</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">cosVal</td><td>cosine value of rotation angle theta </td></tr>
   </table>
   </dd>
 </dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using an internal 32-bit accumulator. The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. There is saturation on the addition, hence there is no risk of overflow. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#ab9f3cfbfb0f12975ab91ddb179160dcb">__QADD()</a>, and <a class="el" href="arm__math_8h.html#a15e896d0146c280e600d00f609832350">__QSUB()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 32-bit accumulator. The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. There is saturation on the addition, hence there is no risk of overflow. </dd></dl>
 
 </div>
 </div>
@@ -263,7 +263,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/group__inv__park.js b/docs/DSP/html/group__inv__park.js
index 2d3e83f..07eb20c 100644
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+++ b/docs/DSP/html/group__inv__park.js
@@ -1,5 +1,5 @@
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-    [ "arm_inv_park_f32", "group__inv__park.html#ga7ca3a87a0954ed8c9ed5a2e6f1c64f30", null ],
-    [ "arm_inv_park_q31", "group__inv__park.html#ga6e00d7320aa4a85686716af8b763e08a", null ]
+    [ "arm_inv_park_f32", "group__inv__park.html#ga896b639ecd52c33d427bc7cdc8d303b2", null ],
+    [ "arm_inv_park_q31", "group__inv__park.html#gae7165779ef72e1f797d0c601d6d619b2", null ]
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diff --git a/docs/DSP/html/group__mean.html b/docs/DSP/html/group__mean.html
index 07b2ebd..2c621e5 100644
--- a/docs/DSP/html/group__mean.html
+++ b/docs/DSP/html/group__mean.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,33 +116,33 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga74ce08c49ab61e57bd50c3a0ca1fdb2b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#ga74ce08c49ab61e57bd50c3a0ca1fdb2b">arm_mean_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
-<tr class="memdesc:ga74ce08c49ab61e57bd50c3a0ca1fdb2b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a floating-point vector.  <a href="#ga74ce08c49ab61e57bd50c3a0ca1fdb2b">More...</a><br/></td></tr>
-<tr class="separator:ga74ce08c49ab61e57bd50c3a0ca1fdb2b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac882495d5f098819fd3939c1ef7795b3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#gac882495d5f098819fd3939c1ef7795b3">arm_mean_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult)</td></tr>
-<tr class="memdesc:gac882495d5f098819fd3939c1ef7795b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a Q15 vector.  <a href="#gac882495d5f098819fd3939c1ef7795b3">More...</a><br/></td></tr>
-<tr class="separator:gac882495d5f098819fd3939c1ef7795b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gacf2526d8c2d75e486e8f0b0e31877ad0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#gacf2526d8c2d75e486e8f0b0e31877ad0">arm_mean_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
-<tr class="memdesc:gacf2526d8c2d75e486e8f0b0e31877ad0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a Q31 vector.  <a href="#gacf2526d8c2d75e486e8f0b0e31877ad0">More...</a><br/></td></tr>
-<tr class="separator:gacf2526d8c2d75e486e8f0b0e31877ad0"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaebc707ee539020357c25da4c75b52eb7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#gaebc707ee539020357c25da4c75b52eb7">arm_mean_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pResult)</td></tr>
-<tr class="memdesc:gaebc707ee539020357c25da4c75b52eb7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a Q7 vector.  <a href="#gaebc707ee539020357c25da4c75b52eb7">More...</a><br/></td></tr>
-<tr class="separator:gaebc707ee539020357c25da4c75b52eb7"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae4fb7698771d7c24f536ed24347c1488"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#gae4fb7698771d7c24f536ed24347c1488">arm_mean_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
+<tr class="memdesc:gae4fb7698771d7c24f536ed24347c1488"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a floating-point vector.  <a href="#gae4fb7698771d7c24f536ed24347c1488">More...</a><br/></td></tr>
+<tr class="separator:gae4fb7698771d7c24f536ed24347c1488"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga55fc43607651123ffe3b967e30305734"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#ga55fc43607651123ffe3b967e30305734">arm_mean_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult)</td></tr>
+<tr class="memdesc:ga55fc43607651123ffe3b967e30305734"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a Q15 vector.  <a href="#ga55fc43607651123ffe3b967e30305734">More...</a><br/></td></tr>
+<tr class="separator:ga55fc43607651123ffe3b967e30305734"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab86ec60eba14c4bc4e2bd9b54ac4b487"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#gab86ec60eba14c4bc4e2bd9b54ac4b487">arm_mean_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
+<tr class="memdesc:gab86ec60eba14c4bc4e2bd9b54ac4b487"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a Q31 vector.  <a href="#gab86ec60eba14c4bc4e2bd9b54ac4b487">More...</a><br/></td></tr>
+<tr class="separator:gab86ec60eba14c4bc4e2bd9b54ac4b487"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa907ace253a82be0741a3203ac04601c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mean.html#gaa907ace253a82be0741a3203ac04601c">arm_mean_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pResult)</td></tr>
+<tr class="memdesc:gaa907ace253a82be0741a3203ac04601c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mean value of a Q7 vector.  <a href="#gaa907ace253a82be0741a3203ac04601c">More...</a><br/></td></tr>
+<tr class="separator:gaa907ace253a82be0741a3203ac04601c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>Calculates the mean of the input vector. Mean is defined as the average of the elements in the vector. The underlying algorithm is used:</p>
 <pre>
-        Result = (pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]) / blockSize;
+    Result = (pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]) / blockSize;
 </pre><p>There are separate functions for floating-point, Q31, Q15, and Q7 data types. </p>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga74ce08c49ab61e57bd50c3a0ca1fdb2b"></a>
+<a class="anchor" id="gae4fb7698771d7c24f536ed24347c1488"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_mean_f32 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -166,28 +166,24 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>mean value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector. </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>mean value returned here. </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__class__marks__example__f32_8c.html#a196718f834091385d38586a0ce4009dc">main()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gac882495d5f098819fd3939c1ef7795b3"></a>
+<a class="anchor" id="ga55fc43607651123ffe3b967e30305734"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_mean_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -211,28 +207,25 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>mean value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>mean value returned here </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 32-bit internal accumulator. The input is represented in 1.15 format and is accumulated in a 32-bit accumulator in 17.15 format. There is no risk of internal overflow with this approach, and the full precision of intermediate result is preserved. Finally, the accumulator is saturated and truncated to yield a result of 1.15 format. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 32-bit internal accumulator. The input is represented in 1.15 format and is accumulated in a 32-bit accumulator in 17.15 format. There is no risk of internal overflow with this approach, and the full precision of intermediate result is preserved. Finally, the accumulator is truncated to yield a result of 1.15 format. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gacf2526d8c2d75e486e8f0b0e31877ad0"></a>
+<a class="anchor" id="gab86ec60eba14c4bc4e2bd9b54ac4b487"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_mean_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -256,28 +249,25 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>mean value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>mean value returned here </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 64-bit internal accumulator. The input is represented in 1.31 format and is accumulated in a 64-bit accumulator in 33.31 format. There is no risk of internal overflow with this approach, and the full precision of intermediate result is preserved. Finally, the accumulator is truncated to yield a result of 1.31 format. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 64-bit internal accumulator. The input is represented in 1.31 format and is accumulated in a 64-bit accumulator in 33.31 format. There is no risk of internal overflow with this approach, and the full precision of intermediate result is preserved. Finally, the accumulator is truncated to yield a result of 1.31 format. </dd></dl>
 
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
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@@ -301,17 +291,14 @@
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 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>mean value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>mean value returned here </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 32-bit internal accumulator. The input is represented in 1.7 format and is accumulated in a 32-bit accumulator in 25.7 format. There is no risk of internal overflow with this approach, and the full precision of intermediate result is preserved. Finally, the accumulator is truncated to yield a result of 1.7 format. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 32-bit internal accumulator. The input is represented in 1.7 format and is accumulated in a 32-bit accumulator in 25.7 format. There is no risk of internal overflow with this approach, and the full precision of intermediate result is preserved. Finally, the accumulator is truncated to yield a result of 1.7 format. </dd></dl>
 
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-<div class="header">
-  <div class="summary">
-<a href="#func-members">Functions</a>  </div>
-  <div class="headertitle">
-<div class="title">Vector Negate<div class="ingroups"><a class="el" href="group__groupMath.html">Basic Math Functions</a></div></div>  </div>
-</div><!--header-->
-<div class="contents">
-<table class="memberdecls">
-<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
-Functions</h2></td></tr>
-<tr class="memitem:ga2e169c4de6cc6e3ba4be9473531e6657"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__negate.html#ga2e169c4de6cc6e3ba4be9473531e6657">arm_negate_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga2e169c4de6cc6e3ba4be9473531e6657"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a floating-point vector.  <a href="#ga2e169c4de6cc6e3ba4be9473531e6657">More...</a><br/></td></tr>
-<tr class="separator:ga2e169c4de6cc6e3ba4be9473531e6657"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga0239a833d72cf00290b9723c394e5042"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__negate.html#ga0239a833d72cf00290b9723c394e5042">arm_negate_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga0239a833d72cf00290b9723c394e5042"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a Q15 vector.  <a href="#ga0239a833d72cf00290b9723c394e5042">More...</a><br/></td></tr>
-<tr class="separator:ga0239a833d72cf00290b9723c394e5042"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga2784c6887686a73dc7c364e2e41c776c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__negate.html#ga2784c6887686a73dc7c364e2e41c776c">arm_negate_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga2784c6887686a73dc7c364e2e41c776c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a Q31 vector.  <a href="#ga2784c6887686a73dc7c364e2e41c776c">More...</a><br/></td></tr>
-<tr class="separator:ga2784c6887686a73dc7c364e2e41c776c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaae78fc079a43bdaa3055f9b32e2a1f4c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__negate.html#gaae78fc079a43bdaa3055f9b32e2a1f4c">arm_negate_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaae78fc079a43bdaa3055f9b32e2a1f4c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Negates the elements of a Q7 vector.  <a href="#gaae78fc079a43bdaa3055f9b32e2a1f4c">More...</a><br/></td></tr>
-<tr class="separator:gaae78fc079a43bdaa3055f9b32e2a1f4c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table>
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-<p>Negates the elements of a vector.</p>
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-    pDst[n] = -pSrc[n],   0 &lt;= n &lt; blockSize.
-</pre><p>The functions support in-place computation allowing the source and destination pointers to reference the same memory buffer. There are separate functions for floating-point, Q7, Q15, and Q31 data types. </p>
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-  <table class="params">
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-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
-          <td class="paramname"><em>pSrc</em>, </td>
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-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
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-          <td class="paramkey"></td>
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-  <table class="params">
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-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
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-<dl class="section user"><dt>Conditions for optimum performance</dt><dd>Input and output buffers should be aligned by 32-bit</dd></dl>
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-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF. </dd></dl>
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-<p>References <a class="el" href="arm__math_8h.html#a6e4703dc08d1b82eab7f5ef96edb59bb">__QSUB16()</a>, <a class="el" href="arm__math_8h.html#af0d54ec57b936994a34f073d0049ea3f">_SIMD32_OFFSET</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
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-          <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
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-          <td class="paramtype">uint32_t&#160;</td>
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-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
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-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in the vector </td></tr>
-  </table>
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-</dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a4690314b420f463093f1a2f68b5fb143">__QSUB8()</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
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-<div class="header">
-  <div class="summary">
-<a href="#func-members">Functions</a>  </div>
-  <div class="headertitle">
-<div class="title">Vector Offset<div class="ingroups"><a class="el" href="group__groupMath.html">Basic Math Functions</a></div></div>  </div>
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-<div class="contents">
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-Functions</h2></td></tr>
-<tr class="memitem:ga989dfae15235799d82f62ef9d356abb4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__offset.html#ga989dfae15235799d82f62ef9d356abb4">arm_offset_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> offset, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga989dfae15235799d82f62ef9d356abb4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a floating-point vector.  <a href="#ga989dfae15235799d82f62ef9d356abb4">More...</a><br/></td></tr>
-<tr class="separator:ga989dfae15235799d82f62ef9d356abb4"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab4c1d2391b599549e5a06fdfbc2747bf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__offset.html#gab4c1d2391b599549e5a06fdfbc2747bf">arm_offset_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> offset, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gab4c1d2391b599549e5a06fdfbc2747bf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a Q15 vector.  <a href="#gab4c1d2391b599549e5a06fdfbc2747bf">More...</a><br/></td></tr>
-<tr class="separator:gab4c1d2391b599549e5a06fdfbc2747bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac84ec42cbbebc5c197a87d0221819acf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__offset.html#gac84ec42cbbebc5c197a87d0221819acf">arm_offset_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> offset, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gac84ec42cbbebc5c197a87d0221819acf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a Q31 vector.  <a href="#gac84ec42cbbebc5c197a87d0221819acf">More...</a><br/></td></tr>
-<tr class="separator:gac84ec42cbbebc5c197a87d0221819acf"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga00bd9cc17c5bf905e76c91ad50886393"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__offset.html#ga00bd9cc17c5bf905e76c91ad50886393">arm_offset_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> offset, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga00bd9cc17c5bf905e76c91ad50886393"><td class="mdescLeft">&#160;</td><td class="mdescRight">Adds a constant offset to a Q7 vector.  <a href="#ga00bd9cc17c5bf905e76c91ad50886393">More...</a><br/></td></tr>
-<tr class="separator:ga00bd9cc17c5bf905e76c91ad50886393"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Adds a constant offset to each element of a vector.</p>
-<pre>
-    pDst[n] = pSrc[n] + offset,   0 &lt;= n &lt; blockSize.
-</pre><p>The functions support in-place computation allowing the source and destination pointers to reference the same memory buffer. There are separate functions for floating-point, Q7, Q15, and Q31 data types. </p>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
-          <td class="paramname"><em>pSrc</em>, </td>
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-          <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td>
-          <td class="paramname"><em>offset</em>, </td>
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-          <td class="paramname"><em>pDst</em>, </td>
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-        <tr>
-          <td class="paramkey"></td>
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-          <td class="paramtype">uint32_t&#160;</td>
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-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">offset</td><td>is the offset to be added </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in the vector </td></tr>
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-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
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-          <td class="memname">void arm_offset_q15 </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
-          <td class="paramname"><em>pSrc</em>, </td>
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-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>&#160;</td>
-          <td class="paramname"><em>offset</em>, </td>
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-          <td class="paramkey"></td>
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-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
-          <td class="paramname"><em>pDst</em>, </td>
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-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
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-        <tr>
-          <td></td>
-          <td>)</td>
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-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">offset</td><td>is the offset to be added </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
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-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated. </dd></dl>
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-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a08bea9cb2c311d925224c0d6829edb8c">__QADD16()</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
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-          <td class="memname">void arm_offset_q31 </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
-          <td class="paramname"><em>pSrc</em>, </td>
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-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
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-          <td class="paramname"><em>offset</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
-          <td class="paramname"><em>pDst</em>, </td>
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-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>blockSize</em>&#160;</td>
-        </tr>
-        <tr>
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-          <td>)</td>
-          <td></td><td></td>
-        </tr>
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-</div><div class="memdoc">
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">offset</td><td>is the offset to be added </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in the vector </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#ab9f3cfbfb0f12975ab91ddb179160dcb">__QADD()</a>, <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, and <a class="el" href="arm__math_8h.html#a9a94b78de0f083bd8fadf3c3abe40431">clip_q63_to_q31()</a>.</p>
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-          <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
-          <td class="paramname"><em>pSrc</em>, </td>
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-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>blockSize</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">offset</td><td>is the offset to be added </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in the vector </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] are saturated. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a3ebff224ad44c217fde9f530342e2960">__PACKq7</a>, <a class="el" href="arm__math_8h.html#a937a37e831677294ecde7195ec9d68ee">__QADD8()</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
-</div>
-</div>
-</div><!-- contents -->
-</div><!-- doc-content -->
-<!-- start footer part -->
-<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
-  <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
-	<!--
-    <a href="http://www.doxygen.org/index.html">
-    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
-	-->
-	</li>
-  </ul>
-</div>
-</body>
-</html>
diff --git a/docs/DSP/html/group__offset.js b/docs/DSP/html/group__offset.js
deleted file mode 100644
index 1c48653..0000000
--- a/docs/DSP/html/group__offset.js
+++ /dev/null
@@ -1,7 +0,0 @@
-var group__offset =
-[
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-    [ "arm_offset_q15", "group__offset.html#gab4c1d2391b599549e5a06fdfbc2747bf", null ],
-    [ "arm_offset_q31", "group__offset.html#gac84ec42cbbebc5c197a87d0221819acf", null ],
-    [ "arm_offset_q7", "group__offset.html#ga00bd9cc17c5bf905e76c91ad50886393", null ]
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diff --git a/docs/DSP/html/group__park.html b/docs/DSP/html/group__park.html
index e8330b5..a2b6a48 100644
--- a/docs/DSP/html/group__park.html
+++ b/docs/DSP/html/group__park.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -116,14 +116,15 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gae24bf07174d3b8dddcf30d8c8d8e7fbb"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__park.html#gae24bf07174d3b8dddcf30d8c8d8e7fbb">arm_park_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Ialpha, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Ibeta, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pId, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pIq, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> sinVal, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> cosVal)</td></tr>
-<tr class="memdesc:gae24bf07174d3b8dddcf30d8c8d8e7fbb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point Park transform.  <a href="#gae24bf07174d3b8dddcf30d8c8d8e7fbb">More...</a><br/></td></tr>
-<tr class="separator:gae24bf07174d3b8dddcf30d8c8d8e7fbb"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga5630ed3715091f2795ee10df34672523"><td class="memItemLeft" align="right" valign="top">CMSIS_INLINE __STATIC_INLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__park.html#ga5630ed3715091f2795ee10df34672523">arm_park_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Ialpha, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Ibeta, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pId, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pIq, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> sinVal, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> cosVal)</td></tr>
-<tr class="memdesc:ga5630ed3715091f2795ee10df34672523"><td class="mdescLeft">&#160;</td><td class="mdescRight">Park transform for Q31 version.  <a href="#ga5630ed3715091f2795ee10df34672523">More...</a><br/></td></tr>
-<tr class="separator:ga5630ed3715091f2795ee10df34672523"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga18f92d09e080edc98a00c01886b56b5d"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__park.html#ga18f92d09e080edc98a00c01886b56b5d">arm_park_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Ialpha, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> Ibeta, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pId, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pIq, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> sinVal, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> cosVal)</td></tr>
+<tr class="memdesc:ga18f92d09e080edc98a00c01886b56b5d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Floating-point Park transform.  <a href="#ga18f92d09e080edc98a00c01886b56b5d">More...</a><br/></td></tr>
+<tr class="separator:ga18f92d09e080edc98a00c01886b56b5d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga69be76685149b18f345f705aa8efaad0"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__park.html#ga69be76685149b18f345f705aa8efaad0">arm_park_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Ialpha, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> Ibeta, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pId, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pIq, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> sinVal, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> cosVal)</td></tr>
+<tr class="memdesc:ga69be76685149b18f345f705aa8efaad0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Park transform for Q31 version.  <a href="#ga69be76685149b18f345f705aa8efaad0">More...</a><br/></td></tr>
+<tr class="separator:ga69be76685149b18f345f705aa8efaad0"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>end of inv_clarke group</p>
 <p>Forward Park transform converts the input two-coordinate vector to flux and torque components. The Park transform can be used to realize the transformation of the <code>Ialpha</code> and the <code>Ibeta</code> currents from the stationary to the moving reference frame and control the spatial relationship between the stator vector current and rotor flux vector. If we consider the d axis aligned with the rotor flux, the diagram below shows the current vector and the relationship from the two reference frames: </p>
 <div class="image">
 <img src="park.gif" alt="park.gif"/>
@@ -136,12 +137,12 @@
  where <code>Ialpha</code> and <code>Ibeta</code> are the stator vector components, <code>pId</code> and <code>pIq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the cosine and sine values of theta (rotor flux position). </dd></dl>
 <dl class="section user"><dt>Fixed-Point Behavior</dt><dd>Care must be taken when using the Q31 version of the Park transform. In particular, the overflow and saturation behavior of the accumulator used must be considered. Refer to the function specific documentation below for usage guidelines. </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="gae24bf07174d3b8dddcf30d8c8d8e7fbb"></a>
+<a class="anchor" id="ga18f92d09e080edc98a00c01886b56b5d"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE void arm_park_f32 </td>
+          <td class="memname">__STATIC_FORCEINLINE void arm_park_f32 </td>
           <td>(</td>
           <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>&#160;</td>
           <td class="paramname"><em>Ialpha</em>, </td>
@@ -190,20 +191,21 @@
     <tr><td class="paramdir">[out]</td><td class="paramname">pId</td><td>points to output rotor reference frame d </td></tr>
     <tr><td class="paramdir">[out]</td><td class="paramname">pIq</td><td>points to output rotor reference frame q </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">sinVal</td><td>sine value of rotation angle theta </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">cosVal</td><td>cosine value of rotation angle theta</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">cosVal</td><td>cosine value of rotation angle theta </td></tr>
   </table>
   </dd>
 </dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
 <p>The function implements the forward Park transform. </p>
 
 </div>
 </div>
-<a class="anchor" id="ga5630ed3715091f2795ee10df34672523"></a>
+<a class="anchor" id="ga69be76685149b18f345f705aa8efaad0"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">CMSIS_INLINE __STATIC_INLINE void arm_park_q31 </td>
+          <td class="memname">__STATIC_FORCEINLINE void arm_park_q31 </td>
           <td>(</td>
           <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>&#160;</td>
           <td class="paramname"><em>Ialpha</em>, </td>
@@ -252,14 +254,12 @@
     <tr><td class="paramdir">[out]</td><td class="paramname">pId</td><td>points to output rotor reference frame d </td></tr>
     <tr><td class="paramdir">[out]</td><td class="paramname">pIq</td><td>points to output rotor reference frame q </td></tr>
     <tr><td class="paramdir">[in]</td><td class="paramname">sinVal</td><td>sine value of rotation angle theta </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">cosVal</td><td>cosine value of rotation angle theta</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">cosVal</td><td>cosine value of rotation angle theta </td></tr>
   </table>
   </dd>
 </dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function is implemented using an internal 32-bit accumulator. The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. There is saturation on the addition and subtraction, hence there is no risk of overflow. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#ab9f3cfbfb0f12975ab91ddb179160dcb">__QADD()</a>, and <a class="el" href="arm__math_8h.html#a15e896d0146c280e600d00f609832350">__QSUB()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 32-bit accumulator. The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. There is saturation on the addition and subtraction, hence there is no risk of overflow. </dd></dl>
 
 </div>
 </div>
@@ -268,7 +268,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__park.js b/docs/DSP/html/group__park.js
index 39c4f81..5daf4bf 100644
--- a/docs/DSP/html/group__park.js
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-    [ "arm_park_q31", "group__park.html#ga5630ed3715091f2795ee10df34672523", null ]
+    [ "arm_park_f32", "group__park.html#ga18f92d09e080edc98a00c01886b56b5d", null ],
+    [ "arm_park_q31", "group__park.html#ga69be76685149b18f345f705aa8efaad0", null ]
 ];
\ No newline at end of file
diff --git a/docs/DSP/html/group__power.html b/docs/DSP/html/group__power.html
index da0412d..6ea1d38 100644
--- a/docs/DSP/html/group__power.html
+++ b/docs/DSP/html/group__power.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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@@ -116,33 +116,33 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga993c00dd7f661d66bdb6e58426e893aa"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#ga993c00dd7f661d66bdb6e58426e893aa">arm_power_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
-<tr class="memdesc:ga993c00dd7f661d66bdb6e58426e893aa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a floating-point vector.  <a href="#ga993c00dd7f661d66bdb6e58426e893aa">More...</a><br/></td></tr>
-<tr class="separator:ga993c00dd7f661d66bdb6e58426e893aa"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga7050c04b7515e01a75c38f1abbaf71ba"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#ga7050c04b7515e01a75c38f1abbaf71ba">arm_power_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *pResult)</td></tr>
-<tr class="memdesc:ga7050c04b7515e01a75c38f1abbaf71ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a Q15 vector.  <a href="#ga7050c04b7515e01a75c38f1abbaf71ba">More...</a><br/></td></tr>
-<tr class="separator:ga7050c04b7515e01a75c38f1abbaf71ba"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga0b93d31bb5b5ed214c2b94d8a7744cd2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#ga0b93d31bb5b5ed214c2b94d8a7744cd2">arm_power_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *pResult)</td></tr>
-<tr class="memdesc:ga0b93d31bb5b5ed214c2b94d8a7744cd2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a Q31 vector.  <a href="#ga0b93d31bb5b5ed214c2b94d8a7744cd2">More...</a><br/></td></tr>
-<tr class="separator:ga0b93d31bb5b5ed214c2b94d8a7744cd2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf969c85c5655e3d72d7b99ff188f92c9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#gaf969c85c5655e3d72d7b99ff188f92c9">arm_power_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
-<tr class="memdesc:gaf969c85c5655e3d72d7b99ff188f92c9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a Q7 vector.  <a href="#gaf969c85c5655e3d72d7b99ff188f92c9">More...</a><br/></td></tr>
-<tr class="separator:gaf969c85c5655e3d72d7b99ff188f92c9"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad0630e3743da2b5aedbe2bb624a8532f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#gad0630e3743da2b5aedbe2bb624a8532f">arm_power_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
+<tr class="memdesc:gad0630e3743da2b5aedbe2bb624a8532f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a floating-point vector.  <a href="#gad0630e3743da2b5aedbe2bb624a8532f">More...</a><br/></td></tr>
+<tr class="separator:gad0630e3743da2b5aedbe2bb624a8532f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga6b87986c6a3617d4fc32c0572a07706c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#ga6b87986c6a3617d4fc32c0572a07706c">arm_power_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *pResult)</td></tr>
+<tr class="memdesc:ga6b87986c6a3617d4fc32c0572a07706c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a Q15 vector.  <a href="#ga6b87986c6a3617d4fc32c0572a07706c">More...</a><br/></td></tr>
+<tr class="separator:ga6b87986c6a3617d4fc32c0572a07706c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae490bf87084bcdb5dc9fd1d2ef4030b9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#gae490bf87084bcdb5dc9fd1d2ef4030b9">arm_power_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6">q63_t</a> *pResult)</td></tr>
+<tr class="memdesc:gae490bf87084bcdb5dc9fd1d2ef4030b9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a Q31 vector.  <a href="#gae490bf87084bcdb5dc9fd1d2ef4030b9">More...</a><br/></td></tr>
+<tr class="separator:gae490bf87084bcdb5dc9fd1d2ef4030b9"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaeb3b9b8e0a4c4bb2549ede074cf43f58"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__power.html#gaeb3b9b8e0a4c4bb2549ede074cf43f58">arm_power_q7</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
+<tr class="memdesc:gaeb3b9b8e0a4c4bb2549ede074cf43f58"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sum of the squares of the elements of a Q7 vector.  <a href="#gaeb3b9b8e0a4c4bb2549ede074cf43f58">More...</a><br/></td></tr>
+<tr class="separator:gaeb3b9b8e0a4c4bb2549ede074cf43f58"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>Calculates the sum of the squares of the elements in the input vector. The underlying algorithm is used:</p>
 <pre>
-        Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];
+    Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];
 </pre><p>There are separate functions for floating point, Q31, Q15, and Q7 data types. </p>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga993c00dd7f661d66bdb6e58426e893aa"></a>
+<a class="anchor" id="gad0630e3743da2b5aedbe2bb624a8532f"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_power_f32 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -166,26 +166,24 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>sum of the squares value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>sum of the squares value returned here </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga7050c04b7515e01a75c38f1abbaf71ba"></a>
+<a class="anchor" id="ga6b87986c6a3617d4fc32c0572a07706c"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_power_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -209,28 +207,25 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>sum of the squares value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>sum of the squares value returned here </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 34.30 format. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a7aed02041f489a4f65dbd7093073d94e">__SMLALD()</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 34.30 format. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga0b93d31bb5b5ed214c2b94d8a7744cd2"></a>
+<a class="anchor" id="gae490bf87084bcdb5dc9fd1d2ef4030b9"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_power_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -254,28 +249,25 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>sum of the squares value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>sum of the squares value returned here </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 64-bit internal accumulator. The input is represented in 1.31 format. Intermediate multiplication yields a 2.62 format, and this result is truncated to 2.48 format by discarding the lower 14 bits. The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. With 15 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 16.48 format. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 64-bit internal accumulator. The input is represented in 1.31 format. Intermediate multiplication yields a 2.62 format, and this result is truncated to 2.48 format by discarding the lower 14 bits. The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. With 15 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 16.48 format. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gaf969c85c5655e3d72d7b99ff188f92c9"></a>
+<a class="anchor" id="gaeb3b9b8e0a4c4bb2549ede074cf43f58"></a>
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 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_power_q7 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -299,17 +291,14 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>sum of the squares value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>sum of the squares value returned here </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 32-bit internal accumulator. The input is represented in 1.7 format. Intermediate multiplication yields a 2.14 format, and this result is added without saturation to an accumulator in 18.14 format. With 17 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 18.14 format. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#aa611fdbf6c56c46553701d6596a79aaf">__SMLAD()</a>, <a class="el" href="arm__math_8h.html#ac9f7f02a5e0ad5642026dbd0da7418db">__SXTB16()</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 32-bit internal accumulator. The input is represented in 1.7 format. Intermediate multiplication yields a 2.14 format, and this result is added without saturation to an accumulator in 18.14 format. With 17 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 18.14 format. </dd></dl>
 
 </div>
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@@ -318,7 +307,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    [ "arm_power_q31", "group__power.html#ga0b93d31bb5b5ed214c2b94d8a7744cd2", null ],
-    [ "arm_power_q7", "group__power.html#gaf969c85c5655e3d72d7b99ff188f92c9", null ]
+    [ "arm_power_f32", "group__power.html#gad0630e3743da2b5aedbe2bb624a8532f", null ],
+    [ "arm_power_q15", "group__power.html#ga6b87986c6a3617d4fc32c0572a07706c", null ],
+    [ "arm_power_q31", "group__power.html#gae490bf87084bcdb5dc9fd1d2ef4030b9", null ],
+    [ "arm_power_q7", "group__power.html#gaeb3b9b8e0a4c4bb2549ede074cf43f58", null ]
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    <div id="projectname">CMSIS-DSP
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 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gaf8b0d2324de273fc430b0e61ad4e9eb2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q15__to__x.html#gaf8b0d2324de273fc430b0e61ad4e9eb2">arm_q15_to_float</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaf8b0d2324de273fc430b0e61ad4e9eb2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q15 vector to floating-point vector.  <a href="#gaf8b0d2324de273fc430b0e61ad4e9eb2">More...</a><br/></td></tr>
-<tr class="separator:gaf8b0d2324de273fc430b0e61ad4e9eb2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga7ba2d87366990ad5380439e2b4a4c0a5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q15__to__x.html#ga7ba2d87366990ad5380439e2b4a4c0a5">arm_q15_to_q31</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga7ba2d87366990ad5380439e2b4a4c0a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q15 vector to Q31 vector.  <a href="#ga7ba2d87366990ad5380439e2b4a4c0a5">More...</a><br/></td></tr>
-<tr class="separator:ga7ba2d87366990ad5380439e2b4a4c0a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga8fb31855ff8cce09c2ec9308f48ded69"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q15__to__x.html#ga8fb31855ff8cce09c2ec9308f48ded69">arm_q15_to_q7</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga8fb31855ff8cce09c2ec9308f48ded69"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q15 vector to Q7 vector.  <a href="#ga8fb31855ff8cce09c2ec9308f48ded69">More...</a><br/></td></tr>
-<tr class="separator:ga8fb31855ff8cce09c2ec9308f48ded69"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5a75381e7d63ea3a3a315344615281cf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q15__to__x.html#ga5a75381e7d63ea3a3a315344615281cf">arm_q15_to_float</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga5a75381e7d63ea3a3a315344615281cf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q15 vector to floating-point vector.  <a href="#ga5a75381e7d63ea3a3a315344615281cf">More...</a><br/></td></tr>
+<tr class="separator:ga5a75381e7d63ea3a3a315344615281cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga39647b2109a5c64a067b776302c4a083"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q15__to__x.html#ga39647b2109a5c64a067b776302c4a083">arm_q15_to_q31</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga39647b2109a5c64a067b776302c4a083"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q15 vector to Q31 vector.  <a href="#ga39647b2109a5c64a067b776302c4a083">More...</a><br/></td></tr>
+<tr class="separator:ga39647b2109a5c64a067b776302c4a083"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga837ce281d0e2d5fc445c48334307db19"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q15__to__x.html#ga837ce281d0e2d5fc445c48334307db19">arm_q15_to_q7</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga837ce281d0e2d5fc445c48334307db19"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q15 vector to Q7 vector.  <a href="#ga837ce281d0e2d5fc445c48334307db19">More...</a><br/></td></tr>
+<tr class="separator:ga837ce281d0e2d5fc445c48334307db19"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="gaf8b0d2324de273fc430b0e61ad4e9eb2"></a>
+<a class="anchor" id="ga5a75381e7d63ea3a3a315344615281cf"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_q15_to_float </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -159,30 +159,27 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the Q15 input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the floating-point output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the Q15 input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the floating-point output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Description:</dt><dd></dd></dl>
-<p>The equation used for the conversion process is:</p>
-<pre>
-        pDst[n] = (float32_t) pSrc[n] / 32768;   0 &lt;= n &lt; blockSize.
-</pre> 
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Details</dt><dd>The equation used for the conversion process is: <pre>
+    pDst[n] = (float32_t) pSrc[n] / 32768;   0 &lt;= n &lt; blockSize.
+</pre> </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga7ba2d87366990ad5380439e2b4a4c0a5"></a>
+<a class="anchor" id="ga39647b2109a5c64a067b776302c4a083"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_q15_to_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -206,30 +203,27 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the Q15 input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the Q31 output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the Q15 input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the Q31 output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Description:</dt><dd></dd></dl>
-<p>The equation used for the conversion process is:</p>
-<pre>
-        pDst[n] = (q31_t) pSrc[n] &lt;&lt; 16;   0 &lt;= n &lt; blockSize.
-</pre> 
-<p>References <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Details</dt><dd>The equation used for the conversion process is: <pre>
+    pDst[n] = (q31_t) pSrc[n] &lt;&lt; 16;   0 &lt;= n &lt; blockSize.
+</pre> </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga8fb31855ff8cce09c2ec9308f48ded69"></a>
+<a class="anchor" id="ga837ce281d0e2d5fc445c48334307db19"></a>
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           <td class="memname">void arm_q15_to_q7 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -253,19 +247,16 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the Q15 input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the Q7 output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the Q15 input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the Q7 output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Description:</dt><dd></dd></dl>
-<p>The equation used for the conversion process is:</p>
-<pre>
-        pDst[n] = (q7_t) pSrc[n] &gt;&gt; 8;   0 &lt;= n &lt; blockSize.
-</pre> 
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#ac4be483b8d98e977a69baf4a292a76fe">__PKHTB</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Details</dt><dd>The equation used for the conversion process is: <pre>
+    pDst[n] = (q7_t) pSrc[n] &gt;&gt; 8;   0 &lt;= n &lt; blockSize.
+</pre> </dd></dl>
 
 </div>
 </div>
@@ -274,7 +265,7 @@
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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+    [ "arm_q15_to_float", "group__q15__to__x.html#ga5a75381e7d63ea3a3a315344615281cf", null ],
+    [ "arm_q15_to_q31", "group__q15__to__x.html#ga39647b2109a5c64a067b776302c4a083", null ],
+    [ "arm_q15_to_q7", "group__q15__to__x.html#ga837ce281d0e2d5fc445c48334307db19", null ]
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@@ -116,26 +116,26 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:gacf407b007a37da18e99dabd9023c56b4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q31__to__x.html#gacf407b007a37da18e99dabd9023c56b4">arm_q31_to_float</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gacf407b007a37da18e99dabd9023c56b4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q31 vector to floating-point vector.  <a href="#gacf407b007a37da18e99dabd9023c56b4">More...</a><br/></td></tr>
-<tr class="separator:gacf407b007a37da18e99dabd9023c56b4"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga901dede4661365c9e7c630d3eb31c32c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q31__to__x.html#ga901dede4661365c9e7c630d3eb31c32c">arm_q31_to_q15</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga901dede4661365c9e7c630d3eb31c32c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q31 vector to Q15 vector.  <a href="#ga901dede4661365c9e7c630d3eb31c32c">More...</a><br/></td></tr>
-<tr class="separator:ga901dede4661365c9e7c630d3eb31c32c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga7f297d1a7d776805395095fdb24a8071"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q31__to__x.html#ga7f297d1a7d776805395095fdb24a8071">arm_q31_to_q7</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga7f297d1a7d776805395095fdb24a8071"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q31 vector to Q7 vector.  <a href="#ga7f297d1a7d776805395095fdb24a8071">More...</a><br/></td></tr>
-<tr class="separator:ga7f297d1a7d776805395095fdb24a8071"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga19a9d023aca1f99abd5da6f13a42b6cf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q31__to__x.html#ga19a9d023aca1f99abd5da6f13a42b6cf">arm_q31_to_float</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga19a9d023aca1f99abd5da6f13a42b6cf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q31 vector to floating-point vector.  <a href="#ga19a9d023aca1f99abd5da6f13a42b6cf">More...</a><br/></td></tr>
+<tr class="separator:ga19a9d023aca1f99abd5da6f13a42b6cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga775f3a1996f00a8048c4b7acba2e0828"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q31__to__x.html#ga775f3a1996f00a8048c4b7acba2e0828">arm_q31_to_q15</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga775f3a1996f00a8048c4b7acba2e0828"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q31 vector to Q15 vector.  <a href="#ga775f3a1996f00a8048c4b7acba2e0828">More...</a><br/></td></tr>
+<tr class="separator:ga775f3a1996f00a8048c4b7acba2e0828"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gabef5357eb3348b3b5b38915fffce8f3d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q31__to__x.html#gabef5357eb3348b3b5b38915fffce8f3d">arm_q31_to_q7</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:gabef5357eb3348b3b5b38915fffce8f3d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q31 vector to Q7 vector.  <a href="#gabef5357eb3348b3b5b38915fffce8f3d">More...</a><br/></td></tr>
+<tr class="separator:gabef5357eb3348b3b5b38915fffce8f3d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="gacf407b007a37da18e99dabd9023c56b4"></a>
+<a class="anchor" id="ga19a9d023aca1f99abd5da6f13a42b6cf"></a>
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           <td class="memname">void arm_q31_to_float </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -159,32 +159,27 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the Q31 input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the floating-point output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the Q31 input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the floating-point output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Description:</dt><dd></dd></dl>
-<p>The equation used for the conversion process is:</p>
-<pre>
-        pDst[n] = (float32_t) pSrc[n] / 2147483648;   0 &lt;= n &lt; blockSize.
-</pre> 
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__graphic__equalizer__example__q31_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Details</dt><dd>The equation used for the conversion process is: <pre>
+    pDst[n] = (float32_t) pSrc[n] / 2147483648;   0 &lt;= n &lt; blockSize.
+</pre> </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga901dede4661365c9e7c630d3eb31c32c"></a>
+<a class="anchor" id="ga775f3a1996f00a8048c4b7acba2e0828"></a>
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           <td class="memname">void arm_q31_to_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
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@@ -208,30 +203,27 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the Q31 input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the Q15 output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the Q31 input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the Q15 output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Description:</dt><dd></dd></dl>
-<p>The equation used for the conversion process is:</p>
-<pre>
-        pDst[n] = (q15_t) pSrc[n] &gt;&gt; 16;   0 &lt;= n &lt; blockSize.
-</pre> 
-<p>References <a class="el" href="arm__math_8h.html#ac4be483b8d98e977a69baf4a292a76fe">__PKHTB</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Details</dt><dd>The equation used for the conversion process is: <pre>
+    pDst[n] = (q15_t) pSrc[n] &gt;&gt; 16;   0 &lt;= n &lt; blockSize.
+</pre> </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga7f297d1a7d776805395095fdb24a8071"></a>
+<a class="anchor" id="gabef5357eb3348b3b5b38915fffce8f3d"></a>
 <div class="memitem">
 <div class="memproto">
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           <td class="memname">void arm_q31_to_q7 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -255,19 +247,16 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the Q31 input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the Q7 output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the Q31 input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the Q7 output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Description:</dt><dd></dd></dl>
-<p>The equation used for the conversion process is:</p>
-<pre>
-        pDst[n] = (q7_t) pSrc[n] &gt;&gt; 24;   0 &lt;= n &lt; blockSize.
-</pre> 
-<p>References <a class="el" href="arm__math_8h.html#a3ebff224ad44c217fde9f530342e2960">__PACKq7</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Details</dt><dd>The equation used for the conversion process is: <pre>
+    pDst[n] = (q7_t) pSrc[n] &gt;&gt; 24;   0 &lt;= n &lt; blockSize.
+</pre> </dd></dl>
 
 </div>
 </div>
@@ -276,7 +265,7 @@
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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+    [ "arm_q31_to_float", "group__q31__to__x.html#ga19a9d023aca1f99abd5da6f13a42b6cf", null ],
+    [ "arm_q31_to_q15", "group__q31__to__x.html#ga775f3a1996f00a8048c4b7acba2e0828", null ],
+    [ "arm_q31_to_q7", "group__q31__to__x.html#gabef5357eb3348b3b5b38915fffce8f3d", null ]
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 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
 Functions</h2></td></tr>
-<tr class="memitem:ga656620f957b65512ed83db03fd455ec5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q7__to__x.html#ga656620f957b65512ed83db03fd455ec5">arm_q7_to_float</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga656620f957b65512ed83db03fd455ec5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q7 vector to floating-point vector.  <a href="#ga656620f957b65512ed83db03fd455ec5">More...</a><br/></td></tr>
-<tr class="separator:ga656620f957b65512ed83db03fd455ec5"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gabc02597fc3f01033daf43ec0547a2f78"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q7__to__x.html#gabc02597fc3f01033daf43ec0547a2f78">arm_q7_to_q15</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gabc02597fc3f01033daf43ec0547a2f78"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q7 vector to Q15 vector.  <a href="#gabc02597fc3f01033daf43ec0547a2f78">More...</a><br/></td></tr>
-<tr class="separator:gabc02597fc3f01033daf43ec0547a2f78"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad8958cd3cb7f521466168b46a25b7908"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q7__to__x.html#gad8958cd3cb7f521466168b46a25b7908">arm_q7_to_q31</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gad8958cd3cb7f521466168b46a25b7908"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q7 vector to Q31 vector.  <a href="#gad8958cd3cb7f521466168b46a25b7908">More...</a><br/></td></tr>
-<tr class="separator:gad8958cd3cb7f521466168b46a25b7908"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga840d8a0e8499d02a54f459bb29f5d63c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q7__to__x.html#ga840d8a0e8499d02a54f459bb29f5d63c">arm_q7_to_float</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga840d8a0e8499d02a54f459bb29f5d63c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q7 vector to floating-point vector.  <a href="#ga840d8a0e8499d02a54f459bb29f5d63c">More...</a><br/></td></tr>
+<tr class="separator:ga840d8a0e8499d02a54f459bb29f5d63c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1023c3832ca6be3a6d17ef338cafa28b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q7__to__x.html#ga1023c3832ca6be3a6d17ef338cafa28b">arm_q7_to_q15</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga1023c3832ca6be3a6d17ef338cafa28b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q7 vector to Q15 vector.  <a href="#ga1023c3832ca6be3a6d17ef338cafa28b">More...</a><br/></td></tr>
+<tr class="separator:ga1023c3832ca6be3a6d17ef338cafa28b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga3c73bfb98fc5a1b4f612264662d0549c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__q7__to__x.html#ga3c73bfb98fc5a1b4f612264662d0549c">arm_q7_to_q31</a> (const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
+<tr class="memdesc:ga3c73bfb98fc5a1b4f612264662d0549c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Converts the elements of the Q7 vector to Q31 vector.  <a href="#ga3c73bfb98fc5a1b4f612264662d0549c">More...</a><br/></td></tr>
+<tr class="separator:ga3c73bfb98fc5a1b4f612264662d0549c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga656620f957b65512ed83db03fd455ec5"></a>
+<a class="anchor" id="ga840d8a0e8499d02a54f459bb29f5d63c"></a>
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           <td class="memname">void arm_q7_to_float </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
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@@ -159,30 +159,27 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the Q7 input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the floating-point output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the Q7 input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the floating-point output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Description:</dt><dd></dd></dl>
-<p>The equation used for the conversion process is:</p>
-<pre>
-        pDst[n] = (float32_t) pSrc[n] / 128;   0 &lt;= n &lt; blockSize.
-</pre> 
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Details</dt><dd>The equation used for the conversion process is: <pre>
+     pDst[n] = (float32_t) pSrc[n] / 128;   0 &lt;= n &lt; blockSize.
+ </pre> </dd></dl>
 
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-<a class="anchor" id="gabc02597fc3f01033daf43ec0547a2f78"></a>
+<a class="anchor" id="ga1023c3832ca6be3a6d17ef338cafa28b"></a>
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           <td class="memname">void arm_q7_to_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
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@@ -206,30 +203,27 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the Q7 input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the Q15 output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the Q7 input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the Q15 output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Description:</dt><dd></dd></dl>
-<p>The equation used for the conversion process is:</p>
-<pre>
-        pDst[n] = (q15_t) pSrc[n] &lt;&lt; 8;   0 &lt;= n &lt; blockSize.
-</pre> 
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#ac4be483b8d98e977a69baf4a292a76fe">__PKHTB</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#ac9f7f02a5e0ad5642026dbd0da7418db">__SXTB16()</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Details</dt><dd>The equation used for the conversion process is: <pre>
+    pDst[n] = (q15_t) pSrc[n] &lt;&lt; 8;   0 &lt;= n &lt; blockSize.
+</pre> </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gad8958cd3cb7f521466168b46a25b7908"></a>
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           <td class="memname">void arm_q7_to_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
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@@ -253,19 +247,16 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the Q7 input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the Q31 output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the Q7 input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pDst</td><td>points to the Q31 output vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in each vector </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Description:</dt><dd></dd></dl>
-<p>The equation used for the conversion process is:</p>
-<pre>
-        pDst[n] = (q31_t) pSrc[n] &lt;&lt; 24;   0 &lt;= n &lt; blockSize.
-</pre> 
-<p>References <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Details</dt><dd>The equation used for the conversion process is: <pre>
+    pDst[n] = (q31_t) pSrc[n] &lt;&lt; 24;   0 &lt;= n &lt; blockSize.
+</pre> </dd></dl>
 
 </div>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-<div class="header">
-  <div class="summary">
-<a href="#func-members">Functions</a>  </div>
-  <div class="headertitle">
-<div class="title">Vector Scale<div class="ingroups"><a class="el" href="group__groupMath.html">Basic Math Functions</a></div></div>  </div>
-</div><!--header-->
-<div class="contents">
-<table class="memberdecls">
-<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
-Functions</h2></td></tr>
-<tr class="memitem:ga3487af88b112f682ee90589cd419e123"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__scale.html#ga3487af88b112f682ee90589cd419e123">arm_scale_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> scale, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga3487af88b112f682ee90589cd419e123"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a floating-point vector by a scalar.  <a href="#ga3487af88b112f682ee90589cd419e123">More...</a><br/></td></tr>
-<tr class="separator:ga3487af88b112f682ee90589cd419e123"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gafaac0e1927daffeb68a42719b53ea780"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__scale.html#gafaac0e1927daffeb68a42719b53ea780">arm_scale_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> scaleFract, int8_t shift, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gafaac0e1927daffeb68a42719b53ea780"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a Q15 vector by a scalar.  <a href="#gafaac0e1927daffeb68a42719b53ea780">More...</a><br/></td></tr>
-<tr class="separator:gafaac0e1927daffeb68a42719b53ea780"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga83e36cd82bf51ce35406a199e477d47c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__scale.html#ga83e36cd82bf51ce35406a199e477d47c">arm_scale_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> scaleFract, int8_t shift, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga83e36cd82bf51ce35406a199e477d47c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a Q31 vector by a scalar.  <a href="#ga83e36cd82bf51ce35406a199e477d47c">More...</a><br/></td></tr>
-<tr class="separator:ga83e36cd82bf51ce35406a199e477d47c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gabc9fd3d37904c58df56492b351d21fb0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__scale.html#gabc9fd3d37904c58df56492b351d21fb0">arm_scale_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> scaleFract, int8_t shift, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gabc9fd3d37904c58df56492b351d21fb0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplies a Q7 vector by a scalar.  <a href="#gabc9fd3d37904c58df56492b351d21fb0">More...</a><br/></td></tr>
-<tr class="separator:gabc9fd3d37904c58df56492b351d21fb0"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Multiply a vector by a scalar value. For floating-point data, the algorithm used is:</p>
-<pre>
-    pDst[n] = pSrc[n] * scale,   0 &lt;= n &lt; blockSize.
-</pre><p>In the fixed-point Q7, Q15, and Q31 functions, <code>scale</code> is represented by a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>. The shift allows the gain of the scaling operation to exceed 1.0. The algorithm used with fixed-point data is:</p>
-<pre>
-    pDst[n] = (pSrc[n] * scaleFract) &lt;&lt; shift,   0 &lt;= n &lt; blockSize.
-</pre><p>The overall scale factor applied to the fixed-point data is </p>
-<pre>
-    scale = scaleFract * 2^shift.
-</pre><p>The functions support in-place computation allowing the source and destination pointers to reference the same memory buffer. </p>
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-          <td class="paramname"><em>pDst</em>, </td>
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-          <td class="paramkey"></td>
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-          <td>)</td>
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-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">scale</td><td>scale factor to be applied </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
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-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#gafd538d68886848bc090ec2b0d364cc81">arm_dct4_f32()</a>, and <a class="el" href="arm__graphic__equalizer__example__q31_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
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-          <td></td>
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-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
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-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">scaleFract</td><td>fractional portion of the scale value </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">shift</td><td>number of bits to shift the result by </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
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-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
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-
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-    <tr><td class="paramdir">[in]</td><td class="paramname">scaleFract</td><td>fractional portion of the scale value </td></tr>
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-<dl class="section user"><dt></dt><dd>The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.7 format. These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a3ebff224ad44c217fde9f530342e2960">__PACKq7</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
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-<div class="header">
-  <div class="summary">
-<a href="#func-members">Functions</a>  </div>
-  <div class="headertitle">
-<div class="title">Vector Shift<div class="ingroups"><a class="el" href="group__groupMath.html">Basic Math Functions</a></div></div>  </div>
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-Functions</h2></td></tr>
-<tr class="memitem:gaa1757e53279780107acc92cf100adb61"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__shift.html#gaa1757e53279780107acc92cf100adb61">arm_shift_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, int8_t shiftBits, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:gaa1757e53279780107acc92cf100adb61"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shifts the elements of a Q15 vector a specified number of bits.  <a href="#gaa1757e53279780107acc92cf100adb61">More...</a><br/></td></tr>
-<tr class="separator:gaa1757e53279780107acc92cf100adb61"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga387dd8b7b87377378280978f16cdb13d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__shift.html#ga387dd8b7b87377378280978f16cdb13d">arm_shift_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, int8_t shiftBits, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga387dd8b7b87377378280978f16cdb13d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shifts the elements of a Q31 vector a specified number of bits.  <a href="#ga387dd8b7b87377378280978f16cdb13d">More...</a><br/></td></tr>
-<tr class="separator:ga387dd8b7b87377378280978f16cdb13d"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga47295d08a685f7de700a48dafb4db6fb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__shift.html#ga47295d08a685f7de700a48dafb4db6fb">arm_shift_q7</a> (<a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pSrc, int8_t shiftBits, <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *pDst, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>)</td></tr>
-<tr class="memdesc:ga47295d08a685f7de700a48dafb4db6fb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shifts the elements of a Q7 vector a specified number of bits.  <a href="#ga47295d08a685f7de700a48dafb4db6fb">More...</a><br/></td></tr>
-<tr class="separator:ga47295d08a685f7de700a48dafb4db6fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Shifts the elements of a fixed-point vector by a specified number of bits. There are separate functions for Q7, Q15, and Q31 data types. The underlying algorithm used is:</p>
-<pre>
-    pDst[n] = pSrc[n] &lt;&lt; shift,   0 &lt;= n &lt; blockSize.
-</pre><p>If <code>shift</code> is positive then the elements of the vector are shifted to the left. If <code>shift</code> is negative then the elements of the vector are shifted to the right.</p>
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-<h2 class="groupheader">Function Documentation</h2>
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-<div class="memitem">
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-      <table class="memname">
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-          <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
-          <td class="paramname"><em>pSrc</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">int8_t&#160;</td>
-          <td class="paramname"><em>shiftBits</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
-          <td class="paramname"><em>pDst</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>blockSize</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">shiftBits</td><td>number of bits to shift. A positive value shifts left; a negative value shifts right. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in the vector </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#aa505179349146cf6186640b4c8b47714">__PKHBT</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga114cb9635059f678df291fcc887aaf2b">arm_dct4_q15()</a>.</p>
-
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-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void arm_shift_q31 </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
-          <td class="paramname"><em>pSrc</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">int8_t&#160;</td>
-          <td class="paramname"><em>shiftBits</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
-          <td class="paramname"><em>pDst</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>blockSize</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">shiftBits</td><td>number of bits to shift. A positive value shifts left; a negative value shifts right. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in the vector </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, and <a class="el" href="arm__math_8h.html#a9a94b78de0f083bd8fadf3c3abe40431">clip_q63_to_q31()</a>.</p>
-
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#gad04d0baab6ed081d8e8afe02538eb80b">arm_dct4_q31()</a>.</p>
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-</div>
-</div>
-<a class="anchor" id="ga47295d08a685f7de700a48dafb4db6fb"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void arm_shift_q7 </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
-          <td class="paramname"><em>pSrc</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">int8_t&#160;</td>
-          <td class="paramname"><em>shiftBits</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td>
-          <td class="paramname"><em>pDst</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>blockSize</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">shiftBits</td><td>number of bits to shift. A positive value shifts left; a negative value shifts right. </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pDst</td><td>points to the output vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in the vector </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<dl class="section user"><dt>Conditions for optimum performance</dt><dd>Input and output buffers should be aligned by 32-bit</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b> </p>
-<dl class="section user"><dt></dt><dd>The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x8 0x7F] will be saturated. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a3ebff224ad44c217fde9f530342e2960">__PACKq7</a>, <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
-</div>
-</div>
-</div><!-- contents -->
-</div><!-- doc-content -->
-<!-- start footer part -->
-<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
-  <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
-	<!--
-    <a href="http://www.doxygen.org/index.html">
-    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
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diff --git a/docs/DSP/html/group__shift.js b/docs/DSP/html/group__shift.js
deleted file mode 100644
index 1b19868..0000000
--- a/docs/DSP/html/group__shift.js
+++ /dev/null
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-    [ "arm_shift_q31", "group__shift.html#ga387dd8b7b87377378280978f16cdb13d", null ],
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index 4406680..16369e6 100644
--- a/docs/DSP/html/group__sin.html
+++ b/docs/DSP/html/group__sin.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
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 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Computes the trigonometric sine function using a combination of table lookup and linear interpolation. There are separate functions for Q15, Q31, and floating-point data types. The input to the floating-point version is in radians and in the range [0 2*pi) while the fixed-point Q15 and Q31 have a scaled input with the range [0 +0.9999] mapping to [0 2*pi). The fixed-point range is chosen so that a value of 2*pi wraps around to 0.</p>
+<p>Computes the trigonometric sine function using a combination of table lookup and linear interpolation. There are separate functions for Q15, Q31, and floating-point data types. The input to the floating-point version is in radians while the fixed-point Q15 and Q31 have a scaled input with the range [0 +0.9999] mapping to [0 2*pi). The fixed-point range is chosen so that a value of 2*pi wraps around to 0.</p>
 <p>The implementation is based on table lookup using 256 values together with linear interpolation. The steps used are:</p>
 <ol type="1">
 <li>Calculation of the nearest integer table index</li>
@@ -136,8 +136,8 @@
 </ol>
 <p>where </p>
 <pre>
-   b=Table[index+0];
-   c=Table[index+1];
+   b = Table[index];
+   c = Table[index+1];
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 <a class="anchor" id="gae164899c4a3fc0e946dc5d55555fe541"></a>
 <div class="memitem">
@@ -158,11 +158,7 @@
   </table>
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-<dl class="section return"><dt>Returns</dt><dd>sin(x). </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#afcb9147c96853bea484cfc2dde07463d">FAST_MATH_TABLE_SIZE</a>, and <a class="el" href="arm__common__tables_8h.html#a1dec82d596780f1a66ef4f76f137c1d9">sinTable_f32</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__linear__interp__example__f32_8c.html#a52d2cba30e6946c95578be946ac12a65">main()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>sin(x) </dd></dl>
 
 </div>
 </div>
@@ -181,14 +177,12 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">x</td><td>Scaled input value in radians. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">x</td><td>Scaled input value in radians </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>sin(x).</dd></dl>
-<p>The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi). </p>
-
-<p>References <a class="el" href="arm__math_8h.html#a34716b73c631e65e8dd855e08384ecb2">FAST_MATH_Q15_SHIFT</a>, and <a class="el" href="arm__common__tables_8h.html#a9cbcfe313f61add745ebfeddb4fecd55">sinTable_q15</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>sin(x)</dd></dl>
+<p>The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI). </p>
 
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@@ -207,14 +201,12 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">x</td><td>Scaled input value in radians. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">x</td><td>Scaled input value in radians </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>sin(x).</dd></dl>
-<p>The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi). </p>
-
-<p>References <a class="el" href="arm__math_8h.html#a4268f77b1811a0c7fc2532a0bf6108b0">FAST_MATH_Q31_SHIFT</a>, and <a class="el" href="arm__common__tables_8h.html#a8bfccee9e1c0042cf4a765f4b19d097d">sinTable_q31</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>sin(x)</dd></dl>
+<p>The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI). </p>
 
 </div>
 </div>
@@ -223,7 +215,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/group__variance.html b/docs/DSP/html/group__variance.html
index f0a761a..7810a75 100644
--- a/docs/DSP/html/group__variance.html
+++ b/docs/DSP/html/group__variance.html
@@ -32,7 +32,7 @@
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    <div id="projectname">CMSIS-DSP
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+   &#160;<span id="projectnumber">Version 1.7.0</span>
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 Functions</h2></td></tr>
-<tr class="memitem:ga393f26c5a3bfa05624fb8d32232a6d96"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__variance.html#ga393f26c5a3bfa05624fb8d32232a6d96">arm_var_f32</a> (<a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
-<tr class="memdesc:ga393f26c5a3bfa05624fb8d32232a6d96"><td class="mdescLeft">&#160;</td><td class="mdescRight">Variance of the elements of a floating-point vector.  <a href="#ga393f26c5a3bfa05624fb8d32232a6d96">More...</a><br/></td></tr>
-<tr class="separator:ga393f26c5a3bfa05624fb8d32232a6d96"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga79dce009ed2de28a125aeb3f19631654"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__variance.html#ga79dce009ed2de28a125aeb3f19631654">arm_var_q15</a> (<a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult)</td></tr>
-<tr class="memdesc:ga79dce009ed2de28a125aeb3f19631654"><td class="mdescLeft">&#160;</td><td class="mdescRight">Variance of the elements of a Q15 vector.  <a href="#ga79dce009ed2de28a125aeb3f19631654">More...</a><br/></td></tr>
-<tr class="separator:ga79dce009ed2de28a125aeb3f19631654"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac02873f1c2cc80adfd799305f0e6465d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__variance.html#gac02873f1c2cc80adfd799305f0e6465d">arm_var_q31</a> (<a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
-<tr class="memdesc:gac02873f1c2cc80adfd799305f0e6465d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Variance of the elements of a Q31 vector.  <a href="#gac02873f1c2cc80adfd799305f0e6465d">More...</a><br/></td></tr>
-<tr class="separator:gac02873f1c2cc80adfd799305f0e6465d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaae455544f0c8ac92469a1e25d3906515"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__variance.html#gaae455544f0c8ac92469a1e25d3906515">arm_var_f32</a> (const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *pResult)</td></tr>
+<tr class="memdesc:gaae455544f0c8ac92469a1e25d3906515"><td class="mdescLeft">&#160;</td><td class="mdescRight">Variance of the elements of a floating-point vector.  <a href="#gaae455544f0c8ac92469a1e25d3906515">More...</a><br/></td></tr>
+<tr class="separator:gaae455544f0c8ac92469a1e25d3906515"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaef3ebc6401209c3f93749e08d341ab48"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__variance.html#gaef3ebc6401209c3f93749e08d341ab48">arm_var_q15</a> (const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *pResult)</td></tr>
+<tr class="memdesc:gaef3ebc6401209c3f93749e08d341ab48"><td class="mdescLeft">&#160;</td><td class="mdescRight">Variance of the elements of a Q15 vector.  <a href="#gaef3ebc6401209c3f93749e08d341ab48">More...</a><br/></td></tr>
+<tr class="separator:gaef3ebc6401209c3f93749e08d341ab48"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga87a07c87c1d85104de0ea4a3d017454c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__variance.html#ga87a07c87c1d85104de0ea4a3d017454c">arm_var_q31</a> (const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pSrc, uint32_t <a class="el" href="arm__variance__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>, <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *pResult)</td></tr>
+<tr class="memdesc:ga87a07c87c1d85104de0ea4a3d017454c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Variance of the elements of a Q31 vector.  <a href="#ga87a07c87c1d85104de0ea4a3d017454c">More...</a><br/></td></tr>
+<tr class="separator:ga87a07c87c1d85104de0ea4a3d017454c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>Calculates the variance of the elements in the input vector. The underlying algorithm used is the direct method sometimes referred to as the two-pass method:</p>
 <pre>
-  Result = sum(element - meanOfElements)^2) / numElement - 1</pre><pre>    where, meanOfElements = ( pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] ) / blockSize</pre><pre></pre><p>There are separate functions for floating point, Q31, and Q15 data types. </p>
+    Result = sum(element - meanOfElements)^2) / numElement - 1</pre><pre>    meanOfElements = ( pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] ) / blockSize
+</pre><p>There are separate functions for floating point, Q31, and Q15 data types. </p>
 <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga393f26c5a3bfa05624fb8d32232a6d96"></a>
+<a class="anchor" id="gaae455544f0c8ac92469a1e25d3906515"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_var_f32 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -162,28 +163,24 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>variance value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>variance value returned here </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
-
-<p>Referenced by <a class="el" href="arm__class__marks__example__f32_8c.html#a196718f834091385d38586a0ce4009dc">main()</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="ga79dce009ed2de28a125aeb3f19631654"></a>
+<a class="anchor" id="gaef3ebc6401209c3f93749e08d341ab48"></a>
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 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_var_q15 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -207,28 +204,25 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>variance value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>variance value returned here </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the 34.30 result is truncated to 34.15 format by discarding the lower 15 bits, and then saturated to yield a result in 1.15 format. </dd></dl>
-
-<p>References <a class="el" href="arm__math_8h.html#a9de2e0a5785be82866bcb96012282248">__SIMD32</a>, <a class="el" href="arm__math_8h.html#a7aed02041f489a4f65dbd7093073d94e">__SMLALD()</a>, and <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the 34.30 result is truncated to 34.15 format by discarding the lower 15 bits, and then saturated to yield a result in 1.15 format. </dd></dl>
 
 </div>
 </div>
-<a class="anchor" id="gac02873f1c2cc80adfd799305f0e6465d"></a>
+<a class="anchor" id="ga87a07c87c1d85104de0ea4a3d017454c"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void arm_var_q31 </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td>
           <td class="paramname"><em>pSrc</em>, </td>
         </tr>
         <tr>
@@ -252,17 +246,14 @@
 </div><div class="memdoc">
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*pSrc</td><td>points to the input vector </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>length of the input vector </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pResult</td><td>variance value returned here </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pSrc</td><td>points to the input vector </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">blockSize</td><td>number of samples in input vector </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">pResult</td><td>variance value returned here </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>none.</dd></dl>
-<p><b>Scaling and Overflow Behavior:</b></p>
-<dl class="section user"><dt></dt><dd>The function is implemented using an internal 64-bit accumulator. The input is represented in 1.31 format, which is then downshifted by 8 bits which yields 1.23, and intermediate multiplication yields a 2.46 format. The accumulator maintains full precision of the intermediate multiplication results, but provides only a 16 guard bits. There is no saturation on intermediate additions. If the accumulator overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by log2(blockSize)-8 bits, as a total of blockSize additions are performed internally. After division, internal variables should be Q18.46 Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value. </dd></dl>
-
-<p>References <a class="el" href="arm__fir__example__f32_8c.html#ab6558f40a619c2502fbc24c880fd4fb0">blockSize</a>.</p>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<dl class="section user"><dt>Scaling and Overflow Behavior</dt><dd>The function is implemented using an internal 64-bit accumulator. The input is represented in 1.31 format, which is then downshifted by 8 bits which yields 1.23, and intermediate multiplication yields a 2.46 format. The accumulator maintains full precision of the intermediate multiplication results, but provides only a 16 guard bits. There is no saturation on intermediate additions. If the accumulator overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by log2(blockSize)-8 bits, as a total of blockSize additions are performed internally. After division, internal variables should be Q18.46 Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value. </dd></dl>
 
 </div>
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@@ -271,7 +262,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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+    [ "arm_var_f32", "group__variance.html#gaae455544f0c8ac92469a1e25d3906515", null ],
+    [ "arm_var_q15", "group__variance.html#gaef3ebc6401209c3f93749e08d341ab48", null ],
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:21 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:39 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * @file     index.doxyidx
+ * @brief    Index file for MDK-ARM Help System
+ * @version  1.0
+ * @date     10. July 2019
+ * @note     Generated by DoxyIndex V1.2.3 on Wednesday, 10.07.2019 15:22:28
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+arm_correlate_fast_q15, group__Corr.html#gab4dea2049c8a26118ee4de9b90f1b9bd, arm_correlate_fast_q15(const q15_t *pSrcA, uint32_t srcALen, const q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst):&#160;arm_correlate_fast_q15.c
+arm_correlate_fast_q15.c, arm__correlate__fast__q15_8c.html, 
+arm_correlate_fast_q31, group__Corr.html#ga1e85a8ceac5c0f27007e6ba2c8f20686, arm_correlate_fast_q31(const q31_t *pSrcA, uint32_t srcALen, const q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst):&#160;arm_correlate_fast_q31.c
+arm_correlate_fast_q31.c, arm__correlate__fast__q31_8c.html, 
+arm_correlate_opt_q15, group__Corr.html#ga3cfae563b16fa3be577cab5acf63aeea, arm_correlate_opt_q15(const q15_t *pSrcA, uint32_t srcALen, const q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, q15_t *pScratch):&#160;arm_correlate_opt_q15.c
+arm_correlate_opt_q15.c, arm__correlate__opt__q15_8c.html, 
+arm_correlate_opt_q7, group__Corr.html#ga3c672e8ef8360c652d351097535f080d, arm_correlate_opt_q7(const q7_t *pSrcA, uint32_t srcALen, const q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst, q15_t *pScratch1, q15_t *pScratch2):&#160;arm_correlate_opt_q7.c
+arm_correlate_opt_q7.c, arm__correlate__opt__q7_8c.html, 
+arm_correlate_q15, group__Corr.html#ga8fc4e632ab08b28435ff62e7eb65f508, arm_correlate_q15(const q15_t *pSrcA, uint32_t srcALen, const q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst):&#160;arm_correlate_q15.c
+arm_correlate_q15.c, arm__correlate__q15_8c.html, 
+arm_correlate_q31, group__Corr.html#ga9e8ad8bae8400dac2afc995d38594744, arm_correlate_q31(const q31_t *pSrcA, uint32_t srcALen, const q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst):&#160;arm_correlate_q31.c
+arm_correlate_q31.c, arm__correlate__q31_8c.html, 
+arm_correlate_q7, group__Corr.html#gab5d8acc830313be970de59c2d5a26c72, arm_correlate_q7(const q7_t *pSrcA, uint32_t srcALen, const q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst):&#160;arm_correlate_q7.c
+arm_correlate_q7.c, arm__correlate__q7_8c.html, 
+arm_cos_f32, group__cos.html#gace15287f9c64b9b4084d1c797d4c49d8, arm_cos_f32(float32_t x):&#160;arm_cos_f32.c
+arm_cos_f32.c, arm__cos__f32_8c.html, 
+arm_cos_q15, group__cos.html#gadfd60c24def501638c0d5db20f4c869b, arm_cos_q15(q15_t x):&#160;arm_cos_q15.c
+arm_cos_q15.c, arm__cos__q15_8c.html, 
+arm_cos_q31, group__cos.html#gad80f121949ef885a77d83ab36e002567, arm_cos_q31(q31_t x):&#160;arm_cos_q31.c
+arm_cos_q31.c, arm__cos__q31_8c.html, 
+arm_dct4_f32, group__DCT4__IDCT4.html#gafd538d68886848bc090ec2b0d364cc81, arm_dct4_f32(const arm_dct4_instance_f32 *S, float32_t *pState, float32_t *pInlineBuffer):&#160;arm_dct4_f32.c
+arm_dct4_f32.c, arm__dct4__f32_8c.html, 
+arm_dct4_init_f32, group__DCT4__IDCT4.html#gab094ad3bc6fa1b84e8b12a24e1850a06, arm_dct4_init_f32(arm_dct4_instance_f32 *S, arm_rfft_instance_f32 *S_RFFT, arm_cfft_radix4_instance_f32 *S_CFFT, uint16_t N, uint16_t Nby2, float32_t normalize):&#160;arm_dct4_init_f32.c
+arm_dct4_init_f32.c, arm__dct4__init__f32_8c.html, 
+arm_dct4_init_q15, group__DCT4__IDCT4.html#ga966fd1b66a80873964533703ab5dc054, arm_dct4_init_q15(arm_dct4_instance_q15 *S, arm_rfft_instance_q15 *S_RFFT, arm_cfft_radix4_instance_q15 *S_CFFT, uint16_t N, uint16_t Nby2, q15_t normalize):&#160;arm_dct4_init_q15.c
+arm_dct4_init_q15.c, arm__dct4__init__q15_8c.html, 
+arm_dct4_init_q31, group__DCT4__IDCT4.html#ga631bb59c7c97c814ff7147ecba6a716a, arm_dct4_init_q31(arm_dct4_instance_q31 *S, arm_rfft_instance_q31 *S_RFFT, arm_cfft_radix4_instance_q31 *S_CFFT, uint16_t N, uint16_t Nby2, q31_t normalize):&#160;arm_dct4_init_q31.c
+arm_dct4_init_q31.c, arm__dct4__init__q31_8c.html, 
+arm_dct4_instance_f32, structarm__dct4__instance__f32.html, 
+arm_dct4_instance_q15, structarm__dct4__instance__q15.html, 
+arm_dct4_instance_q31, structarm__dct4__instance__q31.html, 
+arm_dct4_q15, group__DCT4__IDCT4.html#ga114cb9635059f678df291fcc887aaf2b, arm_dct4_q15(const arm_dct4_instance_q15 *S, q15_t *pState, q15_t *pInlineBuffer):&#160;arm_dct4_q15.c
+arm_dct4_q15.c, arm__dct4__q15_8c.html, 
+arm_dct4_q31, group__DCT4__IDCT4.html#gad04d0baab6ed081d8e8afe02538eb80b, arm_dct4_q31(const arm_dct4_instance_q31 *S, q31_t *pState, q31_t *pInlineBuffer):&#160;arm_dct4_q31.c
+arm_dct4_q31.c, arm__dct4__q31_8c.html, 
+arm_dot_prod_f32, group__BasicDotProd.html#gadf26f6bc62d6416528663ad3e46fbf67, arm_dot_prod_f32(const float32_t *pSrcA, const float32_t *pSrcB, uint32_t blockSize, float32_t *result):&#160;arm_dot_prod_f32.c
+arm_dot_prod_f32.c, arm__dot__prod__f32_8c.html, 
+arm_dot_prod_q15, group__BasicDotProd.html#gac2314012fbbf73bfd95ce8c57bc9ba69, arm_dot_prod_q15(const q15_t *pSrcA, const q15_t *pSrcB, uint32_t blockSize, q63_t *result):&#160;arm_dot_prod_q15.c
+arm_dot_prod_q15.c, arm__dot__prod__q15_8c.html, 
+arm_dot_prod_q31, group__BasicDotProd.html#gafe3f9ace6c4576847eabf44ed7ca7b96, arm_dot_prod_q31(const q31_t *pSrcA, const q31_t *pSrcB, uint32_t blockSize, q63_t *result):&#160;arm_dot_prod_q31.c
+arm_dot_prod_q31.c, arm__dot__prod__q31_8c.html, 
+arm_dot_prod_q7, group__BasicDotProd.html#gaadd347d5f5adf902c63f0b90ffc19538, arm_dot_prod_q7(const q7_t *pSrcA, const q7_t *pSrcB, uint32_t blockSize, q31_t *result):&#160;arm_dot_prod_q7.c
+arm_dot_prod_q7.c, arm__dot__prod__q7_8c.html, 
+arm_dotproduct_example_f32.c, arm__dotproduct__example__f32_8c.html, 
+arm_fft_bin_data.c, arm__fft__bin__data_8c.html, 
+arm_fft_bin_example_f32.c, arm__fft__bin__example__f32_8c.html, 
+arm_fill_f32, group__Fill.html#ga2248e8d3901b4afb7827163132baad94, arm_fill_f32(float32_t value, float32_t *pDst, uint32_t blockSize):&#160;arm_fill_f32.c
+arm_fill_f32.c, arm__fill__f32_8c.html, 
+arm_fill_q15, group__Fill.html#ga76b21c32a3783a2b3334d930a646e5d8, arm_fill_q15(q15_t value, q15_t *pDst, uint32_t blockSize):&#160;arm_fill_q15.c
+arm_fill_q15.c, arm__fill__q15_8c.html, 
+arm_fill_q31, group__Fill.html#ga69cc781cf337bd0a31bb85c772a35f7f, arm_fill_q31(q31_t value, q31_t *pDst, uint32_t blockSize):&#160;arm_fill_q31.c
+arm_fill_q31.c, arm__fill__q31_8c.html, 
+arm_fill_q7, group__Fill.html#ga0465cf326ada039ed792f94b033d9ec5, arm_fill_q7(q7_t value, q7_t *pDst, uint32_t blockSize):&#160;arm_fill_q7.c
+arm_fill_q7.c, arm__fill__q7_8c.html, 
+arm_fir_data.c, arm__fir__data_8c.html, 
+arm_fir_decimate_f32, group__FIR__decimate.html#gab9402a0d9b0fffc0b50083a7d56c5905, arm_fir_decimate_f32(const arm_fir_decimate_instance_f32 *S, const float32_t *pSrc, float32_t *pDst, uint32_t blockSize):&#160;arm_fir_decimate_f32.c
+arm_fir_decimate_f32.c, arm__fir__decimate__f32_8c.html, 
+arm_fir_decimate_fast_q15, group__FIR__decimate.html#gab43fa1edb45d3b2e875dc8cd381770cc, arm_fir_decimate_fast_q15(const arm_fir_decimate_instance_q15 *S, const q15_t *pSrc, q15_t *pDst, uint32_t blockSize):&#160;arm_fir_decimate_fast_q15.c
+arm_fir_decimate_fast_q15.c, arm__fir__decimate__fast__q15_8c.html, 
+arm_fir_decimate_fast_q31, group__FIR__decimate.html#gac03b837d289c8bc4a86a34a89e44afdf, arm_fir_decimate_fast_q31(const arm_fir_decimate_instance_q31 *S, const q31_t *pSrc, q31_t *pDst, uint32_t blockSize):&#160;arm_fir_decimate_fast_q31.c
+arm_fir_decimate_fast_q31.c, arm__fir__decimate__fast__q31_8c.html, 
+arm_fir_decimate_init_f32, group__FIR__decimate.html#ga67c80582fc296552fef2bd1f208d853b, arm_fir_decimate_init_f32(arm_fir_decimate_instance_f32 *S, uint16_t numTaps, uint8_t M, const float32_t *pCoeffs, float32_t *pState, uint32_t blockSize):&#160;arm_fir_decimate_init_f32.c
+arm_fir_decimate_init_f32.c, arm__fir__decimate__init__f32_8c.html, 
+arm_fir_decimate_init_q15, group__FIR__decimate.html#ga3b01ec9df00d759f79c934b239cead73, arm_fir_decimate_init_q15(arm_fir_decimate_instance_q15 *S, uint16_t numTaps, uint8_t M, const q15_t *pCoeffs, q15_t *pState, uint32_t blockSize):&#160;arm_fir_decimate_init_q15.c
+arm_fir_decimate_init_q15.c, arm__fir__decimate__init__q15_8c.html, 
+arm_fir_decimate_init_q31, group__FIR__decimate.html#ga6a19d62083e85b3f5e34e8a8283c1ea0, arm_fir_decimate_init_q31(arm_fir_decimate_instance_q31 *S, uint16_t numTaps, uint8_t M, const q31_t *pCoeffs, q31_t *pState, uint32_t blockSize):&#160;arm_fir_decimate_init_q31.c
+arm_fir_decimate_init_q31.c, arm__fir__decimate__init__q31_8c.html, 
+arm_fir_decimate_instance_f32, structarm__fir__decimate__instance__f32.html, 
+arm_fir_decimate_instance_q15, structarm__fir__decimate__instance__q15.html, 
+arm_fir_decimate_instance_q31, structarm__fir__decimate__instance__q31.html, 
+arm_fir_decimate_q15, group__FIR__decimate.html#ga262636462d9e24dab67ec792160afcbf, arm_fir_decimate_q15(const arm_fir_decimate_instance_q15 *S, const q15_t *pSrc, q15_t *pDst, uint32_t blockSize):&#160;arm_fir_decimate_q15.c
+arm_fir_decimate_q15.c, arm__fir__decimate__q15_8c.html, 
+arm_fir_decimate_q31, group__FIR__decimate.html#ga27c05d7892f8a327aab86fbfee9b0f29, arm_fir_decimate_q31(const arm_fir_decimate_instance_q31 *S, const q31_t *pSrc, q31_t *pDst, uint32_t blockSize):&#160;arm_fir_decimate_q31.c
+arm_fir_decimate_q31.c, arm__fir__decimate__q31_8c.html, 
+arm_fir_example_f32.c, arm__fir__example__f32_8c.html, 
+arm_fir_f32, group__FIR.html#ga0cf008f650a75f5e2cf82d10691b64d9, arm_fir_f32(const arm_fir_instance_f32 *S, const float32_t *pSrc, float32_t *pDst, uint32_t blockSize):&#160;arm_fir_f32.c
+arm_fir_f32.c, arm__fir__f32_8c.html, 
+arm_fir_fast_q15, group__FIR.html#gaf58eee6c38f0b666897b24ca02f9d58d, arm_fir_fast_q15(const arm_fir_instance_q15 *S, const q15_t *pSrc, q15_t *pDst, uint32_t blockSize):&#160;arm_fir_fast_q15.c
+arm_fir_fast_q15.c, arm__fir__fast__q15_8c.html, 
+arm_fir_fast_q31, group__FIR.html#ga07051c8e9f0f228c9634b4a9ca2bcac3, arm_fir_fast_q31(const arm_fir_instance_q31 *S, const q31_t *pSrc, q31_t *pDst, uint32_t blockSize):&#160;arm_fir_fast_q31.c
+arm_fir_fast_q31.c, arm__fir__fast__q31_8c.html, 
+arm_fir_init_f32, group__FIR.html#ga5afaa7b8e6735bbc19e582aa9755b0e1, arm_fir_init_f32(arm_fir_instance_f32 *S, uint16_t numTaps, const float32_t *pCoeffs, float32_t *pState, uint32_t blockSize):&#160;arm_fir_init_f32.c
+arm_fir_init_f32.c, arm__fir__init__f32_8c.html, 
+arm_fir_init_q15, group__FIR.html#gaf4bfa7e20520f3b6e9f03a52ad6d0e41, arm_fir_init_q15(arm_fir_instance_q15 *S, uint16_t numTaps, const q15_t *pCoeffs, q15_t *pState, uint32_t blockSize):&#160;arm_fir_init_q15.c
+arm_fir_init_q15.c, arm__fir__init__q15_8c.html, 
+arm_fir_init_q31, group__FIR.html#ga23ef4b2597aecc4d43cce7c4b456ae71, arm_fir_init_q31(arm_fir_instance_q31 *S, uint16_t numTaps, const q31_t *pCoeffs, q31_t *pState, uint32_t blockSize):&#160;arm_fir_init_q31.c
+arm_fir_init_q31.c, arm__fir__init__q31_8c.html, 
+arm_fir_init_q7, group__FIR.html#gabd62c4543b243c25e315e7acb57f726c, arm_fir_init_q7(arm_fir_instance_q7 *S, uint16_t numTaps, const q7_t *pCoeffs, q7_t *pState, uint32_t blockSize):&#160;arm_fir_init_q7.c
+arm_fir_init_q7.c, arm__fir__init__q7_8c.html, 
+arm_fir_instance_f32, structarm__fir__instance__f32.html, 
+arm_fir_instance_q15, structarm__fir__instance__q15.html, 
+arm_fir_instance_q31, structarm__fir__instance__q31.html, 
+arm_fir_instance_q7, structarm__fir__instance__q7.html, 
+arm_fir_interpolate_f32, group__FIR__Interpolate.html#ga62d0757246bbbe5bfaf67b9a95c16c51, arm_fir_interpolate_f32(const arm_fir_interpolate_instance_f32 *S, const float32_t *pSrc, float32_t *pDst, uint32_t blockSize):&#160;arm_fir_interpolate_f32.c
+arm_fir_interpolate_f32.c, arm__fir__interpolate__f32_8c.html, 
+arm_fir_interpolate_init_f32, group__FIR__Interpolate.html#ga1416bcc1bcf6e2b18ff15261b6e04345, arm_fir_interpolate_init_f32(arm_fir_interpolate_instance_f32 *S, uint8_t L, uint16_t numTaps, const float32_t *pCoeffs, float32_t *pState, uint32_t blockSize):&#160;arm_fir_interpolate_init_f32.c
+arm_fir_interpolate_init_f32.c, arm__fir__interpolate__init__f32_8c.html, 
+arm_fir_interpolate_init_q15, group__FIR__Interpolate.html#ga9d6a3c53991f1dca4da31dc400ed9eec, arm_fir_interpolate_init_q15(arm_fir_interpolate_instance_q15 *S, uint8_t L, uint16_t numTaps, const q15_t *pCoeffs, q15_t *pState, uint32_t blockSize):&#160;arm_fir_interpolate_init_q15.c
+arm_fir_interpolate_init_q15.c, arm__fir__interpolate__init__q15_8c.html, 
+arm_fir_interpolate_init_q31, group__FIR__Interpolate.html#ga2f2288aa947fea3e8bcda3d5e01c1f6d, arm_fir_interpolate_init_q31(arm_fir_interpolate_instance_q31 *S, uint8_t L, uint16_t numTaps, const q31_t *pCoeffs, q31_t *pState, uint32_t blockSize):&#160;arm_fir_interpolate_init_q31.c
+arm_fir_interpolate_init_q31.c, arm__fir__interpolate__init__q31_8c.html, 
+arm_fir_interpolate_instance_f32, structarm__fir__interpolate__instance__f32.html, 
+arm_fir_interpolate_instance_q15, structarm__fir__interpolate__instance__q15.html, 
+arm_fir_interpolate_instance_q31, structarm__fir__interpolate__instance__q31.html, 
+arm_fir_interpolate_q15, group__FIR__Interpolate.html#ga026a02cda40616476e33b82e4eaf855d, arm_fir_interpolate_q15(const arm_fir_interpolate_instance_q15 *S, const q15_t *pSrc, q15_t *pDst, uint32_t blockSize):&#160;arm_fir_interpolate_q15.c
+arm_fir_interpolate_q15.c, arm__fir__interpolate__q15_8c.html, 
+arm_fir_interpolate_q31, group__FIR__Interpolate.html#gadf65923ede13284c769b5621709e8135, arm_fir_interpolate_q31(const arm_fir_interpolate_instance_q31 *S, const q31_t *pSrc, q31_t *pDst, uint32_t blockSize):&#160;arm_fir_interpolate_q31.c
+arm_fir_interpolate_q31.c, arm__fir__interpolate__q31_8c.html, 
+arm_fir_lattice_f32, group__FIR__Lattice.html#ga62053bf9d04f9f97ee5f4ef831533d68, arm_fir_lattice_f32(const arm_fir_lattice_instance_f32 *S, const float32_t *pSrc, float32_t *pDst, uint32_t blockSize):&#160;arm_fir_lattice_f32.c
+arm_fir_lattice_f32.c, arm__fir__lattice__f32_8c.html, 
+arm_fir_lattice_init_f32, group__FIR__Lattice.html#ga489e9fd4fed0037b5ed0947eaa12d68d, arm_fir_lattice_init_f32(arm_fir_lattice_instance_f32 *S, uint16_t numStages, const float32_t *pCoeffs, float32_t *pState):&#160;arm_fir_lattice_init_f32.c
+arm_fir_lattice_init_f32.c, arm__fir__lattice__init__f32_8c.html, 
+arm_fir_lattice_init_q15, group__FIR__Lattice.html#gae4657ac1025b5b4294fd4acc1e49e7f8, arm_fir_lattice_init_q15(arm_fir_lattice_instance_q15 *S, uint16_t numStages, const q15_t *pCoeffs, q15_t *pState):&#160;arm_fir_lattice_init_q15.c
+arm_fir_lattice_init_q15.c, arm__fir__lattice__init__q15_8c.html, 
+arm_fir_lattice_init_q31, group__FIR__Lattice.html#gaf7723f451f6d4cf2586bb4b63d2029cb, arm_fir_lattice_init_q31(arm_fir_lattice_instance_q31 *S, uint16_t numStages, const q31_t *pCoeffs, q31_t *pState):&#160;arm_fir_lattice_init_q31.c
+arm_fir_lattice_init_q31.c, arm__fir__lattice__init__q31_8c.html, 
+arm_fir_lattice_instance_f32, structarm__fir__lattice__instance__f32.html, 
+arm_fir_lattice_instance_q15, structarm__fir__lattice__instance__q15.html, 
+arm_fir_lattice_instance_q31, structarm__fir__lattice__instance__q31.html, 
+arm_fir_lattice_q15, group__FIR__Lattice.html#gafddb7fd49cb0e8a4b6d9546b58bf60fb, arm_fir_lattice_q15(const arm_fir_lattice_instance_q15 *S, const q15_t *pSrc, q15_t *pDst, uint32_t blockSize):&#160;arm_fir_lattice_q15.c
+arm_fir_lattice_q15.c, arm__fir__lattice__q15_8c.html, 
+arm_fir_lattice_q31, group__FIR__Lattice.html#ga9ae2b76a2a1625d00f902919d0fdea05, arm_fir_lattice_q31(const arm_fir_lattice_instance_q31 *S, const q31_t *pSrc, q31_t *pDst, uint32_t blockSize):&#160;arm_fir_lattice_q31.c
+arm_fir_lattice_q31.c, arm__fir__lattice__q31_8c.html, 
+arm_fir_q15, group__FIR.html#gad9f84fdadbb59292592c7fac81adb09c, arm_fir_q15(const arm_fir_instance_q15 *S, const q15_t *pSrc, q15_t *pDst, uint32_t blockSize):&#160;arm_fir_q15.c
+arm_fir_q15.c, arm__fir__q15_8c.html, 
+arm_fir_q31, group__FIR.html#ga2f6fc6582ab4491b3ea8c038c5247ecf, arm_fir_q31(const arm_fir_instance_q31 *S, const q31_t *pSrc, q31_t *pDst, uint32_t blockSize):&#160;arm_fir_q31.c
+arm_fir_q31.c, arm__fir__q31_8c.html, 
+arm_fir_q7, group__FIR.html#gac333f1139ef35124e89b0ee7494ad0a2, arm_fir_q7(const arm_fir_instance_q7 *S, const q7_t *pSrc, q7_t *pDst, uint32_t blockSize):&#160;arm_fir_q7.c
+arm_fir_q7.c, arm__fir__q7_8c.html, 
+arm_fir_sparse_f32, group__FIR__Sparse.html#gac6817bc86974b7121c3288fce25dbc5f, arm_fir_sparse_f32(arm_fir_sparse_instance_f32 *S, const float32_t *pSrc, float32_t *pDst, float32_t *pScratchIn, uint32_t blockSize):&#160;arm_fir_sparse_f32.c
+arm_fir_sparse_f32.c, arm__fir__sparse__f32_8c.html, 
+arm_fir_sparse_init_f32, group__FIR__Sparse.html#ga967a0564d6d59f2b9e12f4a5b7a3f877, arm_fir_sparse_init_f32(arm_fir_sparse_instance_f32 *S, uint16_t numTaps, const float32_t *pCoeffs, float32_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize):&#160;arm_fir_sparse_init_f32.c
+arm_fir_sparse_init_f32.c, arm__fir__sparse__init__f32_8c.html, 
+arm_fir_sparse_init_q15, group__FIR__Sparse.html#gad1c7f891760e91301aac7e3a48aca449, arm_fir_sparse_init_q15(arm_fir_sparse_instance_q15 *S, uint16_t numTaps, const q15_t *pCoeffs, q15_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize):&#160;arm_fir_sparse_init_q15.c
+arm_fir_sparse_init_q15.c, arm__fir__sparse__init__q15_8c.html, 
+arm_fir_sparse_init_q31, group__FIR__Sparse.html#gade71e2e0432a0e6de36fa9f23b2c984c, arm_fir_sparse_init_q31(arm_fir_sparse_instance_q31 *S, uint16_t numTaps, const q31_t *pCoeffs, q31_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize):&#160;arm_fir_sparse_init_q31.c
+arm_fir_sparse_init_q31.c, arm__fir__sparse__init__q31_8c.html, 
+arm_fir_sparse_init_q7, group__FIR__Sparse.html#ga5e74f8f4e4df85de5feb4e62125ff590, arm_fir_sparse_init_q7(arm_fir_sparse_instance_q7 *S, uint16_t numTaps, const q7_t *pCoeffs, q7_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize):&#160;arm_fir_sparse_init_q7.c
+arm_fir_sparse_init_q7.c, arm__fir__sparse__init__q7_8c.html, 
+arm_fir_sparse_instance_f32, structarm__fir__sparse__instance__f32.html, 
+arm_fir_sparse_instance_q15, structarm__fir__sparse__instance__q15.html, 
+arm_fir_sparse_instance_q31, structarm__fir__sparse__instance__q31.html, 
+arm_fir_sparse_instance_q7, structarm__fir__sparse__instance__q7.html, 
+arm_fir_sparse_q15, group__FIR__Sparse.html#gac3e43b06bff38ac8e62e145f88e9dbc7, arm_fir_sparse_q15(arm_fir_sparse_instance_q15 *S, const q15_t *pSrc, q15_t *pDst, q15_t *pScratchIn, q31_t *pScratchOut, uint32_t blockSize):&#160;arm_fir_sparse_q15.c
+arm_fir_sparse_q15.c, arm__fir__sparse__q15_8c.html, 
+arm_fir_sparse_q31, group__FIR__Sparse.html#gaba9f7ef4acf293034af42baa2fd3df52, arm_fir_sparse_q31(arm_fir_sparse_instance_q31 *S, const q31_t *pSrc, q31_t *pDst, q31_t *pScratchIn, uint32_t blockSize):&#160;arm_fir_sparse_q31.c
+arm_fir_sparse_q31.c, arm__fir__sparse__q31_8c.html, 
+arm_fir_sparse_q7, group__FIR__Sparse.html#ga319b3d9032ba723a8efb819b9d2a3676, arm_fir_sparse_q7(arm_fir_sparse_instance_q7 *S, const q7_t *pSrc, q7_t *pDst, q7_t *pScratchIn, q31_t *pScratchOut, uint32_t blockSize):&#160;arm_fir_sparse_q7.c
+arm_fir_sparse_q7.c, arm__fir__sparse__q7_8c.html, 
+arm_float_to_q12_20, arm__signal__converge__example_2math__helper_8h.html#a23f94b0fbfed6d620f38e26bc64cf2f8, arm_float_to_q12_20(float *pIn, q31_t *pOut, uint32_t numSamples):&#160;math_helper.c
+arm_float_to_q14, arm__signal__converge__example_2math__helper_8h.html#a23cdb5202efd9233f4e92b5f22287eac, arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples):&#160;math_helper.c
+arm_float_to_q15, group__float__to__x.html#gac7696e64963e5051ebb950c88c6ba186, arm_float_to_q15(const float32_t *pSrc, q15_t *pDst, uint32_t blockSize):&#160;arm_float_to_q15.c
+arm_float_to_q15.c, arm__float__to__q15_8c.html, 
+arm_float_to_q28, arm__signal__converge__example_2math__helper_8h.html#aa1049b3adb14331612bb762237391625, arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples):&#160;math_helper.c
+arm_float_to_q29, arm__signal__converge__example_2math__helper_8h.html#a098c587b93469a7a6bcc521d42fdf6f9, arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples):&#160;math_helper.c
+arm_float_to_q30, arm__signal__converge__example_2math__helper_8h.html#a16764fdbc174a79f04b07032cf902079, arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples):&#160;math_helper.c
+arm_float_to_q31, group__float__to__x.html#gaae21be47db707e79552f3e8221a48fb0, arm_float_to_q31(const float32_t *pSrc, q31_t *pDst, uint32_t blockSize):&#160;arm_float_to_q31.c
+arm_float_to_q31.c, arm__float__to__q31_8c.html, 
+arm_float_to_q7, group__float__to__x.html#ga63b7cef42a242f0be43376ba3380988d, arm_float_to_q7(const float32_t *pSrc, q7_t *pDst, uint32_t blockSize):&#160;arm_float_to_q7.c
+arm_float_to_q7.c, arm__float__to__q7_8c.html, 
+arm_graphic_equalizer_data.c, arm__graphic__equalizer__data_8c.html, 
+arm_graphic_equalizer_example_q31.c, arm__graphic__equalizer__example__q31_8c.html, 
+arm_iir_lattice_f32, group__IIR__Lattice.html#ga754a44b604c386d132b4b05a3d9e0f44, arm_iir_lattice_f32(const arm_iir_lattice_instance_f32 *S, const float32_t *pSrc, float32_t *pDst, uint32_t blockSize):&#160;arm_iir_lattice_f32.c
+arm_iir_lattice_f32.c, arm__iir__lattice__f32_8c.html, 
+arm_iir_lattice_init_f32, group__IIR__Lattice.html#gaed3b0230bb77439dc902daa625985e04, arm_iir_lattice_init_f32(arm_iir_lattice_instance_f32 *S, uint16_t numStages, float32_t *pkCoeffs, float32_t *pvCoeffs, float32_t *pState, uint32_t blockSize):&#160;arm_iir_lattice_init_f32.c
+arm_iir_lattice_init_f32.c, arm__iir__lattice__init__f32_8c.html, 
+arm_iir_lattice_init_q15, group__IIR__Lattice.html#ga1f4bc2dd3d5641e96815d3a5aad58998, arm_iir_lattice_init_q15(arm_iir_lattice_instance_q15 *S, uint16_t numStages, q15_t *pkCoeffs, q15_t *pvCoeffs, q15_t *pState, uint32_t blockSize):&#160;arm_iir_lattice_init_q15.c
+arm_iir_lattice_init_q15.c, arm__iir__lattice__init__q15_8c.html, 
+arm_iir_lattice_init_q31, group__IIR__Lattice.html#gab686c14175581797d9c3ad7bf1d5cc1e, arm_iir_lattice_init_q31(arm_iir_lattice_instance_q31 *S, uint16_t numStages, q31_t *pkCoeffs, q31_t *pvCoeffs, q31_t *pState, uint32_t blockSize):&#160;arm_iir_lattice_init_q31.c
+arm_iir_lattice_init_q31.c, arm__iir__lattice__init__q31_8c.html, 
+arm_iir_lattice_instance_f32, structarm__iir__lattice__instance__f32.html, 
+arm_iir_lattice_instance_q15, structarm__iir__lattice__instance__q15.html, 
+arm_iir_lattice_instance_q31, structarm__iir__lattice__instance__q31.html, 
+arm_iir_lattice_q15, group__IIR__Lattice.html#ga49181562f33456fa979e474e2a657d19, arm_iir_lattice_q15(const arm_iir_lattice_instance_q15 *S, const q15_t *pSrc, q15_t *pDst, uint32_t blockSize):&#160;arm_iir_lattice_q15.c
+arm_iir_lattice_q15.c, arm__iir__lattice__q15_8c.html, 
+arm_iir_lattice_q31, group__IIR__Lattice.html#ga87d7df8f8787402d4331de156a82687f, arm_iir_lattice_q31(const arm_iir_lattice_instance_q31 *S, const q31_t *pSrc, q31_t *pDst, uint32_t blockSize):&#160;arm_iir_lattice_q31.c
+arm_iir_lattice_q31.c, arm__iir__lattice__q31_8c.html, 
+arm_inv_clarke_f32, group__inv__clarke.html#ga1a73ce96f94b2124d02426690e587197, arm_math.h
+arm_inv_clarke_q31, group__inv__clarke.html#ga3bab178431f22d13332a0dfae4390172, arm_math.h
+arm_inv_park_f32, group__inv__park.html#ga896b639ecd52c33d427bc7cdc8d303b2, arm_math.h
+arm_inv_park_q31, group__inv__park.html#gae7165779ef72e1f797d0c601d6d619b2, arm_math.h
+arm_linear_interep_table, arm__linear__interp__example__f32_8c.html#a1a5a6c95f39221fcf8129fe478f54696, arm_linear_interep_table():&#160;arm_linear_interp_data.c
+arm_linear_interp_data.c, arm__linear__interp__data_8c.html, 
+arm_linear_interp_example_f32.c, arm__linear__interp__example__f32_8c.html, 
+arm_linear_interp_f32, group__LinearInterpolate.html#ga5335f60532bab8cee1e7c22f76a41805, arm_math.h
+arm_linear_interp_instance_f32, structarm__linear__interp__instance__f32.html, 
+arm_linear_interp_q15, group__LinearInterpolate.html#ga9a308a0de4d4e4fe4a262a99b17121cd, arm_math.h
+arm_linear_interp_q31, group__LinearInterpolate.html#gaeaf31289367ac36c4727939e1ea73312, arm_math.h
+arm_linear_interp_q7, group__LinearInterpolate.html#gafabd4124a8724055329b5c484419f936, arm_math.h
+arm_lms_f32, group__LMS.html#gac518f7acd1778a8ee90e81c421cfbb90, arm_lms_f32(const arm_lms_instance_f32 *S, const float32_t *pSrc, float32_t *pRef, float32_t *pOut, float32_t *pErr, uint32_t blockSize):&#160;arm_lms_f32.c
+arm_lms_f32.c, arm__lms__f32_8c.html, 
+arm_lms_init_f32, group__LMS.html#ga9fc7adca0966ff2cec1746fca8364cee, arm_lms_init_f32(arm_lms_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, float32_t mu, uint32_t blockSize):&#160;arm_lms_init_f32.c
+arm_lms_init_f32.c, arm__lms__init__f32_8c.html, 
+arm_lms_init_q15, group__LMS.html#ga9544cc26f18cd4465cfbed371be822b3, arm_lms_init_q15(arm_lms_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, q15_t mu, uint32_t blockSize, uint32_t postShift):&#160;arm_lms_init_q15.c
+arm_lms_init_q15.c, arm__lms__init__q15_8c.html, 
+arm_lms_init_q31, group__LMS.html#ga8d4bc251169f4b102355097a9f7530d6, arm_lms_init_q31(arm_lms_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, q31_t mu, uint32_t blockSize, uint32_t postShift):&#160;arm_lms_init_q31.c
+arm_lms_init_q31.c, arm__lms__init__q31_8c.html, 
+arm_lms_instance_f32, structarm__lms__instance__f32.html, 
+arm_lms_instance_q15, structarm__lms__instance__q15.html, 
+arm_lms_instance_q31, structarm__lms__instance__q31.html, 
+arm_lms_norm_f32, group__LMS__NORM.html#ga72b3755ed1cf97622851cbbeff83c69e, arm_lms_norm_f32(arm_lms_norm_instance_f32 *S, const float32_t *pSrc, float32_t *pRef, float32_t *pOut, float32_t *pErr, uint32_t blockSize):&#160;arm_lms_norm_f32.c
+arm_lms_norm_f32.c, arm__lms__norm__f32_8c.html, 
+arm_lms_norm_init_f32, group__LMS__NORM.html#gac7ccbaea863882056eee815456464670, arm_lms_norm_init_f32(arm_lms_norm_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, float32_t mu, uint32_t blockSize):&#160;arm_lms_norm_init_f32.c
+arm_lms_norm_init_f32.c, arm__lms__norm__init__f32_8c.html, 
+arm_lms_norm_init_q15, group__LMS__NORM.html#ga213ab1ee2e154cc2fa30d667b1994b89, arm_lms_norm_init_q15(arm_lms_norm_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, q15_t mu, uint32_t blockSize, uint8_t postShift):&#160;arm_lms_norm_init_q15.c
+arm_lms_norm_init_q15.c, arm__lms__norm__init__q15_8c.html, 
+arm_lms_norm_init_q31, group__LMS__NORM.html#ga1d9659dbbea4c89a7a9d14d5fc0dd490, arm_lms_norm_init_q31(arm_lms_norm_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, q31_t mu, uint32_t blockSize, uint8_t postShift):&#160;arm_lms_norm_init_q31.c
+arm_lms_norm_init_q31.c, arm__lms__norm__init__q31_8c.html, 
+arm_lms_norm_instance_f32, structarm__lms__norm__instance__f32.html, 
+arm_lms_norm_instance_q15, structarm__lms__norm__instance__q15.html, 
+arm_lms_norm_instance_q31, structarm__lms__norm__instance__q31.html, 
+arm_lms_norm_q15, group__LMS__NORM.html#gaf03debfeb77ec5a9934e1b23f1ff6c48, arm_lms_norm_q15(arm_lms_norm_instance_q15 *S, const q15_t *pSrc, q15_t *pRef, q15_t *pOut, q15_t *pErr, uint32_t blockSize):&#160;arm_lms_norm_q15.c
+arm_lms_norm_q15.c, arm__lms__norm__q15_8c.html, 
+arm_lms_norm_q31, group__LMS__NORM.html#gae12fc16232c8087345e5910fcb840be9, arm_lms_norm_q31(arm_lms_norm_instance_q31 *S, const q31_t *pSrc, q31_t *pRef, q31_t *pOut, q31_t *pErr, uint32_t blockSize):&#160;arm_lms_norm_q31.c
+arm_lms_norm_q31.c, arm__lms__norm__q31_8c.html, 
+arm_lms_q15, group__LMS.html#ga12fd93f61401b365789cdfd5dca07e5b, arm_lms_q15(const arm_lms_instance_q15 *S, const q15_t *pSrc, q15_t *pRef, q15_t *pOut, q15_t *pErr, uint32_t blockSize):&#160;arm_lms_q15.c
+arm_lms_q15.c, arm__lms__q15_8c.html, 
+arm_lms_q31, group__LMS.html#ga69c9c64338c067f1fb4990dcdc8c143f, arm_lms_q31(const arm_lms_instance_q31 *S, const q31_t *pSrc, q31_t *pRef, q31_t *pOut, q31_t *pErr, uint32_t blockSize):&#160;arm_lms_q31.c
+arm_lms_q31.c, arm__lms__q31_8c.html, 
+arm_mat_add_f32, group__MatrixAdd.html#ga04bbf64a5f9c9e57dd1efb26a768aba1, arm_mat_add_f32(const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst):&#160;arm_mat_add_f32.c
+arm_mat_add_f32.c, arm__mat__add__f32_8c.html, 
+arm_mat_add_q15, group__MatrixAdd.html#ga147e90b7c12a162735ab8824127a33ee, arm_mat_add_q15(const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst):&#160;arm_mat_add_q15.c
+arm_mat_add_q15.c, arm__mat__add__q15_8c.html, 
+arm_mat_add_q31, group__MatrixAdd.html#ga7d9d7d81a0832a17b831aad1e4a5dc16, arm_mat_add_q31(const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst):&#160;arm_mat_add_q31.c
+arm_mat_add_q31.c, arm__mat__add__q31_8c.html, 
+arm_mat_cmplx_mult_f32, group__CmplxMatrixMult.html#ga1adb839ac84445b8c2f04efa43faef35, arm_mat_cmplx_mult_f32(const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst):&#160;arm_mat_cmplx_mult_f32.c
+arm_mat_cmplx_mult_f32.c, arm__mat__cmplx__mult__f32_8c.html, 
+arm_mat_cmplx_mult_q15, group__CmplxMatrixMult.html#ga63066615e7d6f6a44f4358725092419e, arm_mat_cmplx_mult_q15(const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pScratch):&#160;arm_mat_cmplx_mult_q15.c
+arm_mat_cmplx_mult_q15.c, arm__mat__cmplx__mult__q15_8c.html, 
+arm_mat_cmplx_mult_q31, group__CmplxMatrixMult.html#gaaf3c0b171ca8412c77bab9fa90804737, arm_mat_cmplx_mult_q31(const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst):&#160;arm_mat_cmplx_mult_q31.c
+arm_mat_cmplx_mult_q31.c, arm__mat__cmplx__mult__q31_8c.html, 
+arm_mat_init_f32, group__MatrixInit.html#ga11e3dc41592a6401c13182fef9416a27, arm_mat_init_f32(arm_matrix_instance_f32 *S, uint16_t nRows, uint16_t nColumns, float32_t *pData):&#160;arm_mat_init_f32.c
+arm_mat_init_f32.c, arm__mat__init__f32_8c.html, 
+arm_mat_init_q15, group__MatrixInit.html#ga31a7c2b991803d49719393eb2d53dc26, arm_mat_init_q15(arm_matrix_instance_q15 *S, uint16_t nRows, uint16_t nColumns, q15_t *pData):&#160;arm_mat_init_q15.c
+arm_mat_init_q15.c, arm__mat__init__q15_8c.html, 
+arm_mat_init_q31, group__MatrixInit.html#ga48a5e5d37e1f062cc57fcfaf683343cc, arm_mat_init_q31(arm_matrix_instance_q31 *S, uint16_t nRows, uint16_t nColumns, q31_t *pData):&#160;arm_mat_init_q31.c
+arm_mat_init_q31.c, arm__mat__init__q31_8c.html, 
+arm_mat_inverse_f32, group__MatrixInv.html#ga542be7aabbf7a2297a4b62cf212910e3, arm_mat_inverse_f32(const arm_matrix_instance_f32 *pSrc, arm_matrix_instance_f32 *pDst):&#160;arm_mat_inverse_f32.c
+arm_mat_inverse_f32.c, arm__mat__inverse__f32_8c.html, 
+arm_mat_inverse_f64, group__MatrixInv.html#gaede2367c02df083cc915ddd5d8fae838, arm_mat_inverse_f64(const arm_matrix_instance_f64 *pSrc, arm_matrix_instance_f64 *pDst):&#160;arm_mat_inverse_f64.c
+arm_mat_inverse_f64.c, arm__mat__inverse__f64_8c.html, 
+arm_mat_mult_f32, group__MatrixMult.html#ga917bf0270310c1d3f0eda1fc7c0026a0, arm_mat_mult_f32(const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst):&#160;arm_mat_mult_f32.c
+arm_mat_mult_f32.c, arm__mat__mult__f32_8c.html, 
+arm_mat_mult_fast_q15, group__MatrixMult.html#ga08f37d93a5bfef0c5000dc5e0a411f93, arm_mat_mult_fast_q15(const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pState):&#160;arm_mat_mult_fast_q15.c
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+arm_radix4_butterfly_q31, arm__cfft__radix4__q31_8c.html#af4d3481332146c3c703bf494baf23c45, arm_radix4_butterfly_q31(q31_t *pSrc, uint32_t fftLen, const q31_t *pCoef, uint32_t twidCoefModifier):&#160;arm_cfft_radix4_q31.c
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+arm_recip_q15, arm__math_8h.html#a1e370c58e45bbe92bb7763fe59cf5e57, arm_math.h
+arm_recip_q31, arm__math_8h.html#a3cedcf5a91d6c722c64330ec97e0853e, arm_math.h
+arm_rfft_1024_fast_init_f32, group__RealFFT.html#ga71547c601079d55c2525204aa00ef9c2, arm_rfft_1024_fast_init_f32(arm_rfft_fast_instance_f32 *S):&#160;arm_rfft_fast_init_f32.c
+arm_rfft_128_fast_init_f32, group__RealFFT.html#gade8432f9318953234761e8e0f2c9e1d2, arm_rfft_128_fast_init_f32(arm_rfft_fast_instance_f32 *S):&#160;arm_rfft_fast_init_f32.c
+arm_rfft_2048_fast_init_f32, group__RealFFT.html#ga33724310a8360ac289d5a835282f778c, arm_rfft_2048_fast_init_f32(arm_rfft_fast_instance_f32 *S):&#160;arm_rfft_fast_init_f32.c
+arm_rfft_256_fast_init_f32, group__RealFFT.html#ga678afbb042d942c3dd5a33877ef66492, arm_rfft_256_fast_init_f32(arm_rfft_fast_instance_f32 *S):&#160;arm_rfft_fast_init_f32.c
+arm_rfft_32_fast_init_f32, group__RealFFT.html#ga153c8faa97b7ab8b1aef75fe6ac1b3a2, arm_rfft_32_fast_init_f32(arm_rfft_fast_instance_f32 *S):&#160;arm_rfft_fast_init_f32.c
+arm_rfft_4096_fast_init_f32, group__RealFFT.html#gaad50a08bb8191e1a138b5f72a268727a, arm_rfft_4096_fast_init_f32(arm_rfft_fast_instance_f32 *S):&#160;arm_rfft_fast_init_f32.c
+arm_rfft_512_fast_init_f32, group__RealFFT.html#ga9a0e72918318f9d1c03973eab379e580, arm_rfft_512_fast_init_f32(arm_rfft_fast_instance_f32 *S):&#160;arm_rfft_fast_init_f32.c
+arm_rfft_64_fast_init_f32, group__RealFFT.html#ga0f67de6a0e5d87011f35426112d2d91b, arm_rfft_64_fast_init_f32(arm_rfft_fast_instance_f32 *S):&#160;arm_rfft_fast_init_f32.c
+arm_rfft_f32, group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc, arm_rfft_f32(const arm_rfft_instance_f32 *S, float32_t *pSrc, float32_t *pDst):&#160;arm_rfft_f32.c
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+arm_rfft_fast_f32.c, arm__rfft__fast__f32_8c.html, 
+arm_rfft_fast_init_f32, group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3, arm_rfft_fast_init_f32(arm_rfft_fast_instance_f32 *S, uint16_t fftLen):&#160;arm_rfft_fast_init_f32.c
+arm_rfft_fast_init_f32.c, arm__rfft__fast__init__f32_8c.html, 
+arm_rfft_fast_instance_f32, structarm__rfft__fast__instance__f32.html, 
+arm_rfft_fast_sR_f32_len1024, arm__const__structs_8c.html#ae81e5be1d74ff9100aa48ac2b7dbab6f, arm_const_structs.c
+arm_rfft_fast_sR_f32_len128, arm__const__structs_8c.html#a77485fa0f6c801e1bc9f3a5fe66fa7d8, arm_const_structs.c
+arm_rfft_fast_sR_f32_len2048, arm__const__structs_8c.html#a8785d492b38eebb7f6515e814cf2ec52, arm_const_structs.c
+arm_rfft_fast_sR_f32_len256, arm__const__structs_8c.html#a4134d8685008a79d2e0c31023b3bd3ab, arm_const_structs.c
+arm_rfft_fast_sR_f32_len32, arm__const__structs_8c.html#a834fa3f8905ca3d6e3b0fa667cbb5f43, arm_const_structs.c
+arm_rfft_fast_sR_f32_len4096, arm__const__structs_8c.html#aa093878ddd5162ca3c5aa34139ac2ee3, arm_const_structs.c
+arm_rfft_fast_sR_f32_len512, arm__const__structs_8c.html#aec88735d936c8e77dfd343dd9f9387b0, arm_const_structs.c
+arm_rfft_fast_sR_f32_len64, arm__const__structs_8c.html#ad410b104e51ee39d6456caa71f209b94, arm_const_structs.c
+arm_rfft_init_f32, group__RealFFT.html#ga10717ee326bf50832ef1c25b85a23068, arm_rfft_init_f32(arm_rfft_instance_f32 *S, arm_cfft_radix4_instance_f32 *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag):&#160;arm_rfft_init_f32.c
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+arm_rfft_init_q15.c, arm__rfft__init__q15_8c.html, 
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+arm_rfft_init_q31.c, arm__rfft__init__q31_8c.html, 
+arm_rfft_instance_f32, structarm__rfft__instance__f32.html, 
+arm_rfft_instance_q15, structarm__rfft__instance__q15.html, 
+arm_rfft_instance_q31, structarm__rfft__instance__q31.html, 
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+arm_rfft_sR_q31_len64, arm__const__structs_8c.html#a9a9c7e356f2b129f84c1921fdad33964, arm_const_structs.c
+arm_rfft_sR_q31_len8192, arm__const__structs_8c.html#ab0a47bce71cb6654702e52b166738af9, arm_const_structs.c
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+arm_rms_f32.c, arm__rms__f32_8c.html, 
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+arm_rms_q15.c, arm__rms__q15_8c.html, 
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+arm_scale_q15.c, arm__scale__q15_8c.html, 
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+arm_scale_q31.c, arm__scale__q31_8c.html, 
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+arm_shift_q15.c, arm__shift__q15_8c.html, 
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+arm_shift_q7.c, arm__shift__q7_8c.html, 
+arm_signal_converge_data.c, arm__signal__converge__data_8c.html, 
+arm_signal_converge_example_f32.c, arm__signal__converge__example__f32_8c.html, 
+arm_sin_cos_example_f32.c, arm__sin__cos__example__f32_8c.html, 
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CFFT_Q15_256 OR CFFT_Q15_512 OR CFFT_Q15_1024 OR CFFT_Q15_2048 OR CFFT_Q15_4096) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_q15.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR CFFT_Q31_16 OR CFFT_Q31_32 OR CFFT_Q31_64 OR CFFT_Q31_128 OR CFFT_Q31_256 OR CFFT_Q31_512 OR CFFT_Q31_1024 OR CFFT_Q31_2048 OR CFFT_Q31_4096) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_q31.c) endif() if(NOT CONFIGTABLE OR ALLFFT) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_init_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_init_q31.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR DCT4_F32_128 OR DCT4_F32_512 OR DCT4_F32_2048 OR DCT4_F32_8192) target_sources(CMSISDSPTransform PRIVATE arm_dct4_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_dct4_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_f32.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR DCT4_Q31_128 OR DCT4_Q31_512 OR DCT4_Q31_2048 OR DCT4_Q31_8192) target_sources(CMSISDSPTransform PRIVATE arm_dct4_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_dct4_init_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q31.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR ALLFFT OR DCT4_Q15_128 OR DCT4_Q15_512 OR DCT4_Q15_2048 OR DCT4_Q15_8192) target_sources(CMSISDSPTransform PRIVATE arm_dct4_init_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_dct4_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q15.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR RFFT_FAST_F32_32 OR RFFT_FAST_F32_64 OR RFFT_FAST_F32_128 OR RFFT_FAST_F32_256 OR RFFT_FAST_F32_512 OR RFFT_FAST_F32_1024 OR RFFT_FAST_F32_2048 OR RFFT_FAST_F32_4096) target_sources(CMSISDSPTransform PRIVATE arm_rfft_fast_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_fast_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix8_f32.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR RFFT_F32_128 OR RFFT_F32_512 OR RFFT_F32_2048 OR RFFT_F32_8192) target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_f32.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR RFFT_Q15_32 OR RFFT_Q15_64 OR RFFT_Q15_128 OR RFFT_Q15_256 OR RFFT_Q15_512 OR RFFT_Q15_1024 OR RFFT_Q15_2048 OR RFFT_Q15_4096 OR RFFT_Q15_8192) target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q15.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR RFFT_Q31_32 OR RFFT_Q31_64 OR RFFT_Q31_128 OR RFFT_Q31_256 OR RFFT_Q31_512 OR RFFT_Q31_1024 OR RFFT_Q31_2048 OR RFFT_Q31_4096 OR RFFT_Q31_8192) target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_q31.c) 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+Correlation, group__Corr.html, 
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+Convert 8-bit Integer value, group__q7__to__x.html, 
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+xRef_f32, arm__matrix__example__f32_8c.html#a6184758419722fa16bb883097c2f596b, arm_matrix_example_f32.c
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+
diff --git a/docs/DSP/html/index.html b/docs/DSP/html/index.html
index ac2a309..021c668 100644
--- a/docs/DSP/html/index.html
+++ b/docs/DSP/html/index.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -120,7 +120,7 @@
 <li>Complex math functions</li>
 <li>Filters</li>
 <li>Matrix functions</li>
-<li>Transforms</li>
+<li>Transform functions</li>
 <li>Motor control functions</li>
 <li>Statistical functions</li>
 <li>Support functions</li>
@@ -150,13 +150,13 @@
 <li>arm_ARMv8MMLld_math.lib (Armv8-M Mainline, Little endian, DSP instructions)</li>
 <li>arm_ARMv8MMLldfsp_math.lib (Armv8-M Mainline, Little endian, DSP instructions, Single Precision Floating Point Unit)</li>
 </ul>
-<p>The library functions are declared in the public file <code><a class="el" href="arm__math_8h.html">arm_math.h</a></code> which is placed in the <code>Include</code> folder. Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single public header file <code> <a class="el" href="arm__math_8h.html">arm_math.h</a></code> for Cortex-M cores with little endian and big endian. Same header file will be used for floating point unit(FPU) variants. Define the appropriate preprocessor macro ARM_MATH_CM7 or ARM_MATH_CM4 or ARM_MATH_CM3 or ARM_MATH_CM0 or ARM_MATH_CM0PLUS depending on the target processor in the application. For Armv8-M cores define preprocessor macro ARM_MATH_ARMV8MBL or ARM_MATH_ARMV8MML. Set preprocessor macro __DSP_PRESENT if Armv8-M Mainline core supports DSP instructions.</p>
+<p>The library functions are declared in the public file <code><a class="el" href="arm__math_8h.html">arm_math.h</a></code> which is placed in the <code>Include</code> folder. Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single public header file <code> <a class="el" href="arm__math_8h.html">arm_math.h</a></code> for Cortex-M cores with little endian and big endian. Same header file will be used for floating point unit(FPU) variants.</p>
 <h2>Examples </h2>
 <p>The library ships with a number of examples which demonstrate how to use the library functions.</p>
 <h2>Toolchain Support </h2>
 <p>The library has been developed and tested with MDK version 5.14.0.0 The library is being tested in GCC and IAR toolchains and updates on this activity will be made available shortly.</p>
 <h2>Building the Library </h2>
-<p>The library installer contains a project file to rebuild libraries on MDK toolchain in the <code>CMSIS\DSP_Lib\Source\ARM</code> folder.</p>
+<p>The library installer contains a project file to rebuild libraries on MDK toolchain in the <code>CMSIS\DSP\Projects\ARM</code> folder.</p>
 <ul>
 <li>arm_cortexM_math.uvprojx</li>
 </ul>
@@ -164,10 +164,6 @@
 <h2>Preprocessor Macros </h2>
 <p>Each library project have different preprocessor macros.</p>
 <ul>
-<li>UNALIGNED_SUPPORT_DISABLE:</li>
-</ul>
-<p>Define macro UNALIGNED_SUPPORT_DISABLE, If the silicon does not support unaligned memory access</p>
-<ul>
 <li>ARM_MATH_BIG_ENDIAN:</li>
 </ul>
 <p>Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets.</p>
@@ -180,21 +176,17 @@
 </ul>
 <p>Define macro ARM_MATH_ROUNDING for rounding on support functions</p>
 <ul>
-<li>ARM_MATH_CMx:</li>
+<li>ARM_MATH_LOOPUNROLL:</li>
 </ul>
-<p>Define macro ARM_MATH_CM4 for building the library on Cortex-M4 target, ARM_MATH_CM3 for building library on Cortex-M3 target and ARM_MATH_CM0 for building library on Cortex-M0 target, ARM_MATH_CM0PLUS for building library on Cortex-M0+ target, and ARM_MATH_CM7 for building the library on cortex-M7.</p>
+<p>Define macro ARM_MATH_LOOPUNROLL to enable manual loop unrolling in DSP functions</p>
 <ul>
-<li>ARM_MATH_ARMV8MxL:</li>
+<li>ARM_MATH_NEON:</li>
 </ul>
-<p>Define macro ARM_MATH_ARMV8MBL for building the library on Armv8-M Baseline target, ARM_MATH_ARMV8MML for building library on Armv8-M Mainline target.</p>
+<p>Define macro ARM_MATH_NEON to enable Neon versions of the DSP functions. It is not enabled by default when Neon is available because performances are dependent on the compiler and target architecture.</p>
 <ul>
-<li>__FPU_PRESENT:</li>
+<li>ARM_MATH_NEON_EXPERIMENTAL:</li>
 </ul>
-<p>Initialize macro __FPU_PRESENT = 1 when building on FPU supported Targets. Enable this macro for floating point libraries.</p>
-<ul>
-<li>__DSP_PRESENT:</li>
-</ul>
-<p>Initialize macro __DSP_PRESENT = 1 when Armv8-M Mainline core supports DSP instructions.</p>
+<p>Define macro ARM_MATH_NEON_EXPERIMENTAL to enable experimental Neon versions of of some DSP functions. Experimental Neon versions currently do not have better performances than the scalar versions.</p>
 <hr/>
  <h2>CMSIS-DSP in ARM::CMSIS Pack </h2>
 <p>The following files relevant to CMSIS-DSP are present in the <b>ARM::CMSIS</b> Pack directories: </p>
@@ -204,23 +196,27 @@
 <tr>
 <td><b>CMSIS\Documentation\DSP</b> </td><td>This documentation </td></tr>
 <tr>
-<td><b>CMSIS\DSP_Lib</b> </td><td>Software license agreement (license.txt) </td></tr>
+<td><b>CMSIS\DSP\DSP_Lib_TestSuite</b> </td><td>DSP_Lib test suite </td></tr>
 <tr>
-<td><b>CMSIS\DSP_Lib\Examples</b> </td><td>Example projects demonstrating the usage of the library functions </td></tr>
+<td><b>CMSIS\DSP\Examples</b> </td><td>Example projects demonstrating the usage of the library functions </td></tr>
 <tr>
-<td><b>CMSIS\DSP_Lib\Source</b> </td><td>Source files for rebuilding the library </td></tr>
+<td><b>CMSIS\DSP\Include</b> </td><td>DSP_Lib include files </td></tr>
+<tr>
+<td><b>CMSIS\DSP\Lib</b> </td><td>DSP_Lib binaries </td></tr>
+<tr>
+<td><b>CMSIS\DSP\Projects</b> </td><td>Projects to rebuild DSP_Lib binaries </td></tr>
+<tr>
+<td><b>CMSIS\DSP\Source</b> </td><td>DSP_Lib source files </td></tr>
 </table>
 <hr/>
  <h2>Revision History of CMSIS-DSP </h2>
-<p>Please refer to <a class="el" href="ChangeLog_pg.html">Revision History of CMSIS-DSP</a>.</p>
-<h2>Copyright Notice </h2>
-<p>Copyright (C) 2010-2015 Arm Limited. All rights reserved. </p>
+<p>Please refer to <a class="el" href="ChangeLog_pg.html">Revision History of CMSIS-DSP</a>. </p>
 </div></div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/modules.html b/docs/DSP/html/modules.html
index a2c7437..ac679fb 100644
--- a/docs/DSP/html/modules.html
+++ b/docs/DSP/html/modules.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
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+<tr id="row_0_7_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__BasicShift.html" target="_self">Vector Shift</a></td><td class="desc"></td></tr>
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 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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   ['bilinear_20interpolation',['Bilinear Interpolation',['../group__BilinearInterpolate.html',1,'']]],
   ['biquad_20cascade_20iir_20filters_20using_20direct_20form_20i_20structure',['Biquad Cascade IIR Filters Using Direct Form I Structure',['../group__BiquadCascadeDF1.html',1,'']]],
   ['biquad_20cascade_20iir_20filters_20using_20a_20direct_20form_20ii_20transposed_20structure',['Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure',['../group__BiquadCascadeDF2T.html',1,'']]],
diff --git a/docs/DSP/html/search/all_3.js b/docs/DSP/html/search/all_3.js
index 5c8efab..dec2e3e 100644
--- a/docs/DSP/html/search/all_3.js
+++ b/docs/DSP/html/search/all_3.js
@@ -2,10 +2,11 @@
 [
   ['complex_20fft_20tables',['Complex FFT Tables',['../group__CFFT__CIFFT.html',1,'']]],
   ['class_20marks_20example',['Class Marks Example',['../group__ClassMarks.html',1,'']]],
-  ['clip_5fq31_5fto_5fq15',['clip_q31_to_q15',['../arm__math_8h.html#a4604d1ebfef21e380c42fbe16b9724d1',1,'arm_math.h']]],
-  ['clip_5fq31_5fto_5fq7',['clip_q31_to_q7',['../arm__math_8h.html#af815ae1a72c9ef88b8ba0a4cb3b23eaa',1,'arm_math.h']]],
-  ['clip_5fq63_5fto_5fq15',['clip_q63_to_q15',['../arm__math_8h.html#a576c5c6286a37eb7f7ba1c5711a577a9',1,'arm_math.h']]],
-  ['clip_5fq63_5fto_5fq31',['clip_q63_to_q31',['../arm__math_8h.html#a9a94b78de0f083bd8fadf3c3abe40431',1,'arm_math.h']]],
+  ['clip_5fq31_5fto_5fq15',['clip_q31_to_q15',['../arm__math_8h.html#a8648908e55b9fd8893b36eb7050e69a8',1,'arm_math.h']]],
+  ['clip_5fq31_5fto_5fq7',['clip_q31_to_q7',['../arm__math_8h.html#afa69cfc57f04c36c2ba499525168fe0c',1,'arm_math.h']]],
+  ['clip_5fq63_5fto_5fq15',['clip_q63_to_q15',['../arm__math_8h.html#a027d446e8a72228f0a681779a7038a4e',1,'arm_math.h']]],
+  ['clip_5fq63_5fto_5fq31',['clip_q63_to_q31',['../arm__math_8h.html#ad3a8d07983196592f6edca8f84aec7c7',1,'arm_math.h']]],
+  ['cmake_5fminimum_5frequired',['cmake_minimum_required',['../Examples_2ARM_2arm__variance__example_2CMakeLists_8txt.html#aacae80504fd1beabc4cd793b87cbe4e2',1,'cmake_minimum_required(VERSION 3.6) project(arm_variance_example VERSION 0.1) list(APPEND CMAKE_MODULE_PATH $:&#160;CMakeLists.txt'],['../Source_2CMakeLists_8txt.html#a881c069b0c3dd34941126127656e23a1',1,'cmake_minimum_required(VERSION 3.6) project(CMSISDSP) list(APPEND CMAKE_MODULE_PATH $:&#160;CMakeLists.txt'],['../Source_2CommonTables_2CMakeLists_8txt.html#ab2ff652a443e047ef6441f2eeaae8048',1,'cmake_minimum_required(VERSION 3.6) project(CMSISDSPCommon) add_library(CMSISDSPCommon STATIC arm_common_tables.c) if(CONFIGTABLE AND ALLFFT) target_compile_definitions(CMSISDSPCommon PUBLIC ARM_ALL_FFT_TABLES) endif() if(CONFIGTABLE AND ALLFAST) target_compile_definitions(CMSISDSPCommon PUBLIC ARM_ALL_FAST_TABLES) endif() include(fft) fft(CMSISDSPCommon) include(interpol) interpol(CMSISDSPCommon) target_sources(CMSISDSPCommon PRIVATE arm_const_structs.c) configdsp(CMSISDSPCommon..) target_include_directories(CMSISDSPCommon PUBLIC&quot;$:&#160;CMakeLists.txt'],['../Source_2ControllerFunctions_2CMakeLists_8txt.html#a450cbc64f30b7f1182d8b66245ccd208',1,'cmake_minimum_required(VERSION 3.6) project(CMSISDSPController) add_library(CMSISDSPController STATIC) configdsp(CMSISDSPController..) include(interpol) interpol(CMSISDSPController) if(CONFIGTABLE AND ALLFAST) target_compile_definitions(CMSISDSPController PUBLIC ARM_ALL_FAST_TABLES) endif() target_sources(CMSISDSPController PRIVATE arm_pid_init_f32.c) target_sources(CMSISDSPController PRIVATE arm_pid_init_q15.c) target_sources(CMSISDSPController PRIVATE arm_pid_init_q31.c) target_sources(CMSISDSPController PRIVATE arm_pid_reset_f32.c) target_sources(CMSISDSPController PRIVATE arm_pid_reset_q15.c) target_sources(CMSISDSPController PRIVATE arm_pid_reset_q31.c) if(NOT CONFIGTABLE OR ALLFAST OR ARM_SIN_COS_F32) target_sources(CMSISDSPController PRIVATE arm_sin_cos_f32.c) endif() if(NOT CONFIGTABLE OR ALLFAST OR ARM_SIN_COS_Q31) target_sources(CMSISDSPController PRIVATE arm_sin_cos_q31.c) endif() target_include_directories(CMSISDSPController PUBLIC&quot;$:&#160;CMakeLists.txt'],['../Source_2FilteringFunctions_2CMakeLists_8txt.html#a459bd5973ca8abbfe2ffa2bd5ea5f0a8',1,'cmake_minimum_required(VERSION 3.6) project(CMSISDSPFiltering) add_library(CMSISDSPFiltering STATIC) include(interpol) interpol(CMSISDSPFiltering) configdsp(CMSISDSPFiltering..) if(CONFIGTABLE AND ALLFAST) target_compile_definitions(CMSISDSPFiltering PUBLIC ARM_ALL_FAST_TABLES) endif() if(NOT CONFIGTABLE OR ALLFAST OR ARM_LMS_NORM_Q31) target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_init_q31.c) endif() if(NOT CONFIGTABLE OR ALLFAST OR ARM_LMS_NORM_Q15) target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_init_q15.c) endif() target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_32x64_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_32x64_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_fast_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_fast_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_init_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_f64.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_init_f64.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_stereo_df2T_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_stereo_df2T_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_fast_opt_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_fast_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_fast_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_opt_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_opt_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_fast_opt_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_fast_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_fast_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_opt_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_opt_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_fast_opt_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_fast_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_fast_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_opt_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_opt_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_fast_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_fast_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_init_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_fast_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_fast_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_init_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_init_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_init_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_init_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_init_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_init_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_init_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_init_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_q31.c) target_include_directories(CMSISDSPFiltering PUBLIC&quot;$:&#160;CMakeLists.txt'],['../Source_2TransformFunctions_2CMakeLists_8txt.html#ac12f00f4dcad3283ec1ce05fb627d05e',1,'cmake_minimum_required(VERSION 3.6) project(CMSISDSPTransform) add_library(CMSISDSPTransform STATIC) include(fft) fft(CMSISDSPTransform) if(CONFIGTABLE AND ALLFFT) target_compile_definitions(CMSISDSPTransform PUBLIC ARM_ALL_FFT_TABLES) endif() target_sources(CMSISDSPTransform PRIVATE arm_bitreversal.c) target_sources(CMSISDSPTransform PRIVATE arm_bitreversal2.c) if(NOT CONFIGTABLE OR ALLFFT OR CFFT_F32_16 OR CFFT_F32_32 OR CFFT_F32_64 OR CFFT_F32_128 OR CFFT_F32_256 OR CFFT_F32_512 OR CFFT_F32_1024 OR CFFT_F32_2048 OR CFFT_F32_4096) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix8_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_f32.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR CFFT_Q15_16 OR CFFT_Q15_32 OR CFFT_Q15_64 OR CFFT_Q15_128 OR CFFT_Q15_256 OR CFFT_Q15_512 OR CFFT_Q15_1024 OR CFFT_Q15_2048 OR CFFT_Q15_4096) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_q15.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR CFFT_Q31_16 OR CFFT_Q31_32 OR CFFT_Q31_64 OR CFFT_Q31_128 OR CFFT_Q31_256 OR CFFT_Q31_512 OR CFFT_Q31_1024 OR CFFT_Q31_2048 OR CFFT_Q31_4096) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_q31.c) endif() if(NOT CONFIGTABLE OR ALLFFT) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_init_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_init_q31.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR DCT4_F32_128 OR DCT4_F32_512 OR DCT4_F32_2048 OR DCT4_F32_8192) target_sources(CMSISDSPTransform PRIVATE arm_dct4_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_dct4_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_f32.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR DCT4_Q31_128 OR DCT4_Q31_512 OR DCT4_Q31_2048 OR DCT4_Q31_8192) target_sources(CMSISDSPTransform PRIVATE arm_dct4_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_dct4_init_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q31.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR ALLFFT OR DCT4_Q15_128 OR DCT4_Q15_512 OR DCT4_Q15_2048 OR DCT4_Q15_8192) target_sources(CMSISDSPTransform PRIVATE arm_dct4_init_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_dct4_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q15.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR RFFT_FAST_F32_32 OR RFFT_FAST_F32_64 OR RFFT_FAST_F32_128 OR RFFT_FAST_F32_256 OR RFFT_FAST_F32_512 OR RFFT_FAST_F32_1024 OR RFFT_FAST_F32_2048 OR RFFT_FAST_F32_4096) target_sources(CMSISDSPTransform PRIVATE arm_rfft_fast_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_fast_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix8_f32.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR RFFT_F32_128 OR RFFT_F32_512 OR RFFT_F32_2048 OR RFFT_F32_8192) target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_f32.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR RFFT_Q15_32 OR RFFT_Q15_64 OR RFFT_Q15_128 OR RFFT_Q15_256 OR RFFT_Q15_512 OR RFFT_Q15_1024 OR RFFT_Q15_2048 OR RFFT_Q15_4096 OR RFFT_Q15_8192) target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q15.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR RFFT_Q31_32 OR RFFT_Q31_64 OR RFFT_Q31_128 OR RFFT_Q31_256 OR RFFT_Q31_512 OR RFFT_Q31_1024 OR RFFT_Q31_2048 OR RFFT_Q31_4096 OR RFFT_Q31_8192) target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q31.c) endif() configdsp(CMSISDSPTransform..) target_include_directories(CMSISDSPTransform PUBLIC&quot;$:&#160;CMakeLists.txt']]],
   ['complex_20conjugate',['Complex Conjugate',['../group__cmplx__conj.html',1,'']]],
   ['complex_20dot_20product',['Complex Dot Product',['../group__cmplx__dot__prod.html',1,'']]],
   ['complex_20magnitude',['Complex Magnitude',['../group__cmplx__mag.html',1,'']]],
@@ -14,24 +15,27 @@
   ['complex_2dby_2dreal_20multiplication',['Complex-by-Real Multiplication',['../group__CmplxByRealMult.html',1,'']]],
   ['complex_20matrix_20multiplication',['Complex Matrix Multiplication',['../group__CmplxMatrixMult.html',1,'']]],
   ['coefftable',['coeffTable',['../arm__graphic__equalizer__example__q31_8c.html#a024c59772b9603698b898721c1e8204e',1,'arm_graphic_equalizer_example_q31.c']]],
+  ['commontables_2ec',['CommonTables.c',['../CommonTables_8c.html',1,'']]],
   ['complex_20fft_20functions',['Complex FFT Functions',['../group__ComplexFFT.html',1,'']]],
+  ['complexmathfunctions_2ec',['ComplexMathFunctions.c',['../ComplexMathFunctions_8c.html',1,'']]],
   ['controller_5fq31_5fshift',['CONTROLLER_Q31_SHIFT',['../arm__math_8h.html#aaff6d2358c4ada8de838a279254ab550',1,'arm_math.h']]],
+  ['controllerfunctions_2ec',['ControllerFunctions.c',['../ControllerFunctions_8c.html',1,'']]],
   ['convolution',['Convolution',['../group__Conv.html',1,'']]],
   ['convolution_20example',['Convolution Example',['../group__ConvolutionExample.html',1,'']]],
   ['correlation',['Correlation',['../group__Corr.html',1,'']]],
   ['cosine',['Cosine',['../group__cos.html',1,'']]],
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-  ['cos_5ffactors_5f512',['cos_factors_512',['../group__DCT4__IDCT4__Table.html#ga49fd288352ca5bb43f5cec52273b0d80',1,'arm_dct4_init_f32.c']]],
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-  ['cos_5ffactorsq15_5f2048',['cos_factorsQ15_2048',['../group__DCT4__IDCT4__Table.html#gaeee5df7c1be2374441868ecbbc6c7e5d',1,'arm_dct4_init_q15.c']]],
-  ['cos_5ffactorsq15_5f512',['cos_factorsQ15_512',['../group__DCT4__IDCT4__Table.html#gac056c3d026058eab3ba650828ff5642f',1,'arm_dct4_init_q15.c']]],
-  ['cos_5ffactorsq15_5f8192',['cos_factorsQ15_8192',['../group__DCT4__IDCT4__Table.html#ga988ff0563cc9df7848c9348871ac6c07',1,'arm_dct4_init_q15.c']]],
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target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_fast_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_fast_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_init_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df1_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_f64.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_df2T_init_f64.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_stereo_df2T_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_biquad_cascade_stereo_df2T_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_fast_opt_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_fast_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_fast_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_opt_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_opt_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_fast_opt_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_fast_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_fast_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_opt_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_opt_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_partial_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_conv_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_fast_opt_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_fast_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_fast_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_opt_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_opt_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_correlate_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_fast_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_fast_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_init_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_decimate_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_fast_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_fast_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_init_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_init_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_init_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_interpolate_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_init_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_lattice_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_init_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_init_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_fir_sparse_q7.c) target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_init_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_iir_lattice_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_init_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_init_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_init_f32.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_norm_q31.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_q15.c) target_sources(CMSISDSPFiltering PRIVATE arm_lms_q31.c) target_include_directories(CMSISDSPFiltering PUBLIC&quot;$:&#160;CMakeLists.txt'],['../Source_2TransformFunctions_2CMakeLists_8txt.html#ac12f00f4dcad3283ec1ce05fb627d05e',1,'cmake_minimum_required(VERSION 3.6) project(CMSISDSPTransform) add_library(CMSISDSPTransform STATIC) include(fft) fft(CMSISDSPTransform) if(CONFIGTABLE AND ALLFFT) target_compile_definitions(CMSISDSPTransform PUBLIC ARM_ALL_FFT_TABLES) endif() target_sources(CMSISDSPTransform PRIVATE arm_bitreversal.c) target_sources(CMSISDSPTransform PRIVATE arm_bitreversal2.c) if(NOT CONFIGTABLE OR ALLFFT OR CFFT_F32_16 OR CFFT_F32_32 OR CFFT_F32_64 OR CFFT_F32_128 OR CFFT_F32_256 OR CFFT_F32_512 OR CFFT_F32_1024 OR CFFT_F32_2048 OR CFFT_F32_4096) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix8_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_f32.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR CFFT_Q15_16 OR CFFT_Q15_32 OR CFFT_Q15_64 OR CFFT_Q15_128 OR CFFT_Q15_256 OR CFFT_Q15_512 OR CFFT_Q15_1024 OR CFFT_Q15_2048 OR CFFT_Q15_4096) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_q15.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR CFFT_Q31_16 OR CFFT_Q31_32 OR CFFT_Q31_64 OR CFFT_Q31_128 OR CFFT_Q31_256 OR CFFT_Q31_512 OR CFFT_Q31_1024 OR CFFT_Q31_2048 OR CFFT_Q31_4096) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_q31.c) endif() if(NOT CONFIGTABLE OR ALLFFT) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_init_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix2_init_q31.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR DCT4_F32_128 OR DCT4_F32_512 OR DCT4_F32_2048 OR DCT4_F32_8192) target_sources(CMSISDSPTransform PRIVATE arm_dct4_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_dct4_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_f32.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR DCT4_Q31_128 OR DCT4_Q31_512 OR DCT4_Q31_2048 OR DCT4_Q31_8192) target_sources(CMSISDSPTransform PRIVATE arm_dct4_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_dct4_init_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q31.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR ALLFFT OR DCT4_Q15_128 OR DCT4_Q15_512 OR DCT4_Q15_2048 OR DCT4_Q15_8192) target_sources(CMSISDSPTransform PRIVATE arm_dct4_init_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_dct4_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q15.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR RFFT_FAST_F32_32 OR RFFT_FAST_F32_64 OR RFFT_FAST_F32_128 OR RFFT_FAST_F32_256 OR RFFT_FAST_F32_512 OR RFFT_FAST_F32_1024 OR RFFT_FAST_F32_2048 OR RFFT_FAST_F32_4096) target_sources(CMSISDSPTransform PRIVATE arm_rfft_fast_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_fast_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix8_f32.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR RFFT_F32_128 OR RFFT_F32_512 OR RFFT_F32_2048 OR RFFT_F32_8192) target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_init_f32.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_f32.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR RFFT_Q15_32 OR RFFT_Q15_64 OR RFFT_Q15_128 OR RFFT_Q15_256 OR RFFT_Q15_512 OR RFFT_Q15_1024 OR RFFT_Q15_2048 OR RFFT_Q15_4096 OR RFFT_Q15_8192) target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_q15.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q15.c) endif() if(NOT CONFIGTABLE OR ALLFFT OR RFFT_Q31_32 OR RFFT_Q31_64 OR RFFT_Q31_128 OR RFFT_Q31_256 OR RFFT_Q31_512 OR RFFT_Q31_1024 OR RFFT_Q31_2048 OR RFFT_Q31_4096 OR RFFT_Q31_8192) target_sources(CMSISDSPTransform PRIVATE arm_rfft_init_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_rfft_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_q31.c) target_sources(CMSISDSPTransform PRIVATE arm_cfft_radix4_q31.c) endif() configdsp(CMSISDSPTransform..) target_include_directories(CMSISDSPTransform PUBLIC&quot;$:&#160;CMakeLists.txt']]]
 ];
diff --git a/docs/DSP/html/search/functions_4.js b/docs/DSP/html/search/functions_4.js
index 0e1c662..c2f896e 100644
--- a/docs/DSP/html/search/functions_4.js
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diff --git a/docs/DSP/html/search/functions_5.js b/docs/DSP/html/search/functions_5.js
index 1061506..46dc7a6 100644
--- a/docs/DSP/html/search/functions_5.js
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diff --git a/docs/DSP/html/search/functions_6.js b/docs/DSP/html/search/functions_6.js
index e97b50c..b7d561d 100644
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new file mode 100644
index 0000000..ec330da
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+<link rel="stylesheet" type="text/css" href="search.css"/>
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+</head>
+<body class="SRPage">
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+<div id="SRResults"></div>
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+<script type="text/javascript"><!--
+document.getElementById("Loading").style.display="none";
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
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-<tr class="separator:a490462d6ebe0fecfb6acbf51bed22ecf"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 <tr class="memitem:a8e9d58e8dba5aa3b2fc4f36d2ed07996"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__biquad__cas__df1__32x64__ins__q31.html#a8e9d58e8dba5aa3b2fc4f36d2ed07996">postShift</a></td></tr>
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 <p>number of 2nd order stages in the filter. Overall order is 2*numStages. </p>
 
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-
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-<a class="anchor" id="a490462d6ebe0fecfb6acbf51bed22ecf"></a>
+<a class="anchor" id="a9cd8b5e514cd3af2537af13ae37125c4"></a>
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 <p>points to the array of coefficients. The array is of length 5*numStages. </p>
 
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 <p>additional shift, in bits, applied to each output sample. </p>
 
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 <p>points to the array of state coefficients. The array is of length 4*numStages. </p>
 
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index 994fb3e..051a24d 100644
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-    [ "pCoeffs", "structarm__biquad__cas__df1__32x64__ins__q31.html#a490462d6ebe0fecfb6acbf51bed22ecf", null ],
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diff --git a/docs/DSP/html/structarm__biquad__cascade__df2T__instance__f32.html b/docs/DSP/html/structarm__biquad__cascade__df2T__instance__f32.html
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--- a/docs/DSP/html/structarm__biquad__cascade__df2T__instance__f32.html
+++ b/docs/DSP/html/structarm__biquad__cascade__df2T__instance__f32.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
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-<tr class="separator:a49a24fe1b6ad3b0b26779c32d8d80b2e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a79de9be61b9e572e02f1774e9899cfb8"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__biquad__cascade__df2T__instance__f32.html#a79de9be61b9e572e02f1774e9899cfb8">pCoeffs</a></td></tr>
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-<a class="anchor" id="a49a24fe1b6ad3b0b26779c32d8d80b2e"></a>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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+<tr class="memitem:a68a22132ff134715ed2cc8d0f8225bc0"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__biquad__cascade__stereo__df2T__instance__f32.html#a68a22132ff134715ed2cc8d0f8225bc0">pCoeffs</a></td></tr>
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 <p>number of 2nd order stages in the filter. Overall order is 2*numStages. </p>
 
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    [ "pCoeffs", "structarm__biquad__cascade__stereo__df2T__instance__f32.html#a58b15644de62a632c5e9d4a563569dc6", null ],
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+   &#160;<span id="projectnumber">Version 1.7.0</span>
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+<tr class="memitem:a4e873ff8bb6273858481cfd4c7f8f6d5"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__biquad__casd__df1__inst__f32.html#a4e873ff8bb6273858481cfd4c7f8f6d5">pCoeffs</a></td></tr>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    [ "pCoeffs", "structarm__biquad__casd__df1__inst__f32.html#af9df3820576fb921809d1462c9c6d16c", null ],
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 <p>Points to the array of coefficients. The array is of length 5*numStages. </p>
 
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    [ "pCoeffs", "structarm__biquad__casd__df1__inst__q15.html#a1edaacdebb5b09d7635bf20c779855fc", null ],
+    [ "pCoeffs", "structarm__biquad__casd__df1__inst__q15.html#a9219b50b6ca227c92da85f2151ea362e", null ],
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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-<tr class="separator:aa62366c632f3b5305086f841f079dbd2"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-
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+          <td class="memname">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>* arm_biquad_casd_df1_inst_q31::pCoeffs</td>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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 <p>length of the FFT. </p>
 
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 <p>points to the bit reversal table. </p>
 
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#gade0f9c4ff157b6b9c72a1eafd86ebf80">arm_cfft_f32()</a>, and <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
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 <p>points to the Twiddle factor table. </p>
 
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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 <p>length of the FFT. </p>
 
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 <p>points to the Twiddle factor table. </p>
 
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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 <p>length of the FFT. </p>
 
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 <p>points to the Twiddle factor table. </p>
 
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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 <p>flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. </p>
 
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 <p>value of 1/fftLen. </p>
 
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 <p>points to the bit reversal table. </p>
 
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 <p>points to the Twiddle factor table. </p>
 
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 <p>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. </p>
 
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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 <p>flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. </p>
 
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 <p>points to the bit reversal table. </p>
 
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 <p>points to the Sin twiddle factor table. </p>
 
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    [ "pTwiddle", "structarm__cfft__radix2__instance__q15.html#a3809dd15e7cbf1a054c728cfbbb0cc5a", null ],
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 <p>length of the FFT. </p>
 
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 <p>flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. </p>
 
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 <p>points to the bit reversal table. </p>
 
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 <p>points to the Twiddle factor table. </p>
 
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    [ "pTwiddle", "structarm__cfft__radix2__instance__q31.html#a1d5bbe9a991e133f81652a77a7985d23", null ],
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 <p>flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. </p>
 
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 <p>bit reversal modifier that supports different size FFTs with the same bit reversal table. </p>
 
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 <p>length of the FFT. </p>
 
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga521f670cd9c571bc61aff9bec89f4c26">arm_cfft_radix4_f32()</a>, <a class="el" href="group__ComplexFFT.html#gaf336459f684f0b17bfae539ef1b1b78a">arm_cfft_radix4_init_f32()</a>, and <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32()</a>.</p>
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 <p>flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. </p>
 
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 <p>value of 1/fftLen. </p>
 
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga521f670cd9c571bc61aff9bec89f4c26">arm_cfft_radix4_f32()</a>, <a class="el" href="group__ComplexFFT.html#gaf336459f684f0b17bfae539ef1b1b78a">arm_cfft_radix4_init_f32()</a>, and <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32()</a>.</p>
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 <p>points to the bit reversal table. </p>
 
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga521f670cd9c571bc61aff9bec89f4c26">arm_cfft_radix4_f32()</a>, <a class="el" href="group__ComplexFFT.html#gaf336459f684f0b17bfae539ef1b1b78a">arm_cfft_radix4_init_f32()</a>, and <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32()</a>.</p>
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+          <td class="memname">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>* arm_cfft_radix4_instance_f32::pTwiddle</td>
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 <p>points to the Twiddle factor table. </p>
 
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga521f670cd9c571bc61aff9bec89f4c26">arm_cfft_radix4_f32()</a>, <a class="el" href="group__ComplexFFT.html#gaf336459f684f0b17bfae539ef1b1b78a">arm_cfft_radix4_init_f32()</a>, and <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32()</a>.</p>
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 <p>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. </p>
 
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga521f670cd9c571bc61aff9bec89f4c26">arm_cfft_radix4_f32()</a>, <a class="el" href="group__ComplexFFT.html#gaf336459f684f0b17bfae539ef1b1b78a">arm_cfft_radix4_init_f32()</a>, and <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32()</a>.</p>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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+    [ "pBitRevTable", "structarm__cfft__radix4__instance__f32.html#ab6e84ac830b6d413768dcafe271514a1", null ],
+    [ "pTwiddle", "structarm__cfft__radix4__instance__f32.html#ac1455c9894e7fc53c41f3806b13bd274", null ],
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    <div id="projectname">CMSIS-DSP
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-<tr class="memitem:a4acf704ae0cf30b53bf0fbfae8e34a59"><td class="memItemLeft" align="right" valign="top">uint16_t *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__cfft__radix4__instance__q15.html#a4acf704ae0cf30b53bf0fbfae8e34a59">pBitRevTable</a></td></tr>
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+<tr class="memitem:a69a91f93a3cae666b56c42d47beab1b4"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__cfft__radix4__instance__q15.html#a69a91f93a3cae666b56c42d47beab1b4">pTwiddle</a></td></tr>
+<tr class="separator:a69a91f93a3cae666b56c42d47beab1b4"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:a821544995ab3a0fd8f33bef3110cce0e"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 <p>flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. </p>
 
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 <p>bit reversal modifier that supports different size FFTs with the same bit reversal table. </p>
 
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 <p>length of the FFT. </p>
 
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga0c2acfda3126c452e75b81669e8ad9ef">arm_cfft_radix4_init_q15()</a>, and <a class="el" href="group__ComplexFFT.html#ga8d66cdac41b8bf6cefdb895456eee84a">arm_cfft_radix4_q15()</a>.</p>
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 <p>flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. </p>
 
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga0c2acfda3126c452e75b81669e8ad9ef">arm_cfft_radix4_init_q15()</a>, and <a class="el" href="group__ComplexFFT.html#ga8d66cdac41b8bf6cefdb895456eee84a">arm_cfft_radix4_q15()</a>.</p>
-
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 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">uint16_t* arm_cfft_radix4_instance_q15::pBitRevTable</td>
+          <td class="memname">const uint16_t* arm_cfft_radix4_instance_q15::pBitRevTable</td>
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 </div><div class="memdoc">
 <p>points to the bit reversal table. </p>
 
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga0c2acfda3126c452e75b81669e8ad9ef">arm_cfft_radix4_init_q15()</a>, and <a class="el" href="group__ComplexFFT.html#ga8d66cdac41b8bf6cefdb895456eee84a">arm_cfft_radix4_q15()</a>.</p>
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-<a class="anchor" id="a29dd693537e45421a36891f8439e1fba"></a>
+<a class="anchor" id="a69a91f93a3cae666b56c42d47beab1b4"></a>
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       <table class="memname">
         <tr>
-          <td class="memname"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>* arm_cfft_radix4_instance_q15::pTwiddle</td>
+          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>* arm_cfft_radix4_instance_q15::pTwiddle</td>
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 <p>points to the twiddle factor table. </p>
 
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga0c2acfda3126c452e75b81669e8ad9ef">arm_cfft_radix4_init_q15()</a>, and <a class="el" href="group__ComplexFFT.html#ga8d66cdac41b8bf6cefdb895456eee84a">arm_cfft_radix4_q15()</a>.</p>
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@@ -242,8 +230,6 @@
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 <p>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. </p>
 
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#ga0c2acfda3126c452e75b81669e8ad9ef">arm_cfft_radix4_init_q15()</a>, and <a class="el" href="group__ComplexFFT.html#ga8d66cdac41b8bf6cefdb895456eee84a">arm_cfft_radix4_q15()</a>.</p>
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@@ -252,7 +238,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/structarm__cfft__radix4__instance__q15.js b/docs/DSP/html/structarm__cfft__radix4__instance__q15.js
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-    [ "pTwiddle", "structarm__cfft__radix4__instance__q15.html#a29dd693537e45421a36891f8439e1fba", null ],
+    [ "pBitRevTable", "structarm__cfft__radix4__instance__q15.html#a821544995ab3a0fd8f33bef3110cce0e", null ],
+    [ "pTwiddle", "structarm__cfft__radix4__instance__q15.html#a69a91f93a3cae666b56c42d47beab1b4", null ],
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index 67e8851..a98a6b6 100644
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+++ b/docs/DSP/html/structarm__cfft__radix4__instance__q31.html
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
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-<tr class="separator:a33a3bc774c97373261699463c05dfe54"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a499e97268c131e20faea4b8565d4204c"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__cfft__radix4__instance__q31.html#a499e97268c131e20faea4b8565d4204c">pTwiddle</a></td></tr>
+<tr class="separator:a499e97268c131e20faea4b8565d4204c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a64b58f7643b0e27c7f2d66ec0ef2e3dc"><td class="memItemLeft" align="right" valign="top">const uint16_t *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__cfft__radix4__instance__q31.html#a64b58f7643b0e27c7f2d66ec0ef2e3dc">pBitRevTable</a></td></tr>
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 <p>flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. </p>
 
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 <p>bit reversal modifier that supports different size FFTs with the same bit reversal table. </p>
 
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 <p>length of the FFT. </p>
 
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 <p>flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. </p>
 
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-          <td class="memname">uint16_t* arm_cfft_radix4_instance_q31::pBitRevTable</td>
+          <td class="memname">const uint16_t* arm_cfft_radix4_instance_q31::pBitRevTable</td>
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 <p>points to the bit reversal table. </p>
 
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#gad5caaafeec900c8ff72321c01bbd462c">arm_cfft_radix4_init_q31()</a>, and <a class="el" href="group__ComplexFFT.html#gafde3ee1f58cf393b45a9073174fff548">arm_cfft_radix4_q31()</a>.</p>
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+          <td class="memname">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>* arm_cfft_radix4_instance_q31::pTwiddle</td>
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 <p>points to the twiddle factor table. </p>
 
-<p>Referenced by <a class="el" href="group__ComplexFFT.html#gad5caaafeec900c8ff72321c01bbd462c">arm_cfft_radix4_init_q31()</a>, and <a class="el" href="group__ComplexFFT.html#gafde3ee1f58cf393b45a9073174fff548">arm_cfft_radix4_q31()</a>.</p>
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 <p>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. </p>
 
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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-    [ "pTwiddle", "structarm__cfft__radix4__instance__q31.html#a561c22dee4cbdcfa0fd5f15106ecc306", null ],
+    [ "pBitRevTable", "structarm__cfft__radix4__instance__q31.html#a64b58f7643b0e27c7f2d66ec0ef2e3dc", null ],
+    [ "pTwiddle", "structarm__cfft__radix4__instance__q31.html#a499e97268c131e20faea4b8565d4204c", null ],
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
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+   &#160;<span id="projectnumber">Version 1.7.0</span>
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-<tr class="separator:ad13544aafad268588c62e3eb35ae662c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a6da1187e070801e011ce5e0582efa861"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__dct4__instance__f32.html#a6da1187e070801e011ce5e0582efa861">pCosFactor</a></td></tr>
-<tr class="separator:a6da1187e070801e011ce5e0582efa861"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a01fe45dbe46c782245832f2169622c29"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__dct4__instance__f32.html#a01fe45dbe46c782245832f2169622c29">pTwiddle</a></td></tr>
+<tr class="separator:a01fe45dbe46c782245832f2169622c29"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a7762296d8871c58f2ef0b6ce327b8f4e"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__dct4__instance__f32.html#a7762296d8871c58f2ef0b6ce327b8f4e">pCosFactor</a></td></tr>
+<tr class="separator:a7762296d8871c58f2ef0b6ce327b8f4e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a978f37fc19add31af243ab5c63ae502f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="structarm__rfft__instance__f32.html">arm_rfft_instance_f32</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__dct4__instance__f32.html#a978f37fc19add31af243ab5c63ae502f">pRfft</a></td></tr>
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 <p>length of the DCT4. </p>
 
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#gafd538d68886848bc090ec2b0d364cc81">arm_dct4_f32()</a>, and <a class="el" href="group__DCT4__IDCT4.html#gab094ad3bc6fa1b84e8b12a24e1850a06">arm_dct4_init_f32()</a>.</p>
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 <p>half of the length of the DCT4. </p>
 
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 <p>normalizing factor. </p>
 
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 <p>points to the complex FFT instance. </p>
 
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#gab094ad3bc6fa1b84e8b12a24e1850a06">arm_dct4_init_f32()</a>.</p>
-
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-<a class="anchor" id="a6da1187e070801e011ce5e0582efa861"></a>
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+          <td class="memname">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>* arm_dct4_instance_f32::pCosFactor</td>
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 <p>points to the cosFactor table. </p>
 
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 <p>points to the real FFT instance. </p>
 
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#gab094ad3bc6fa1b84e8b12a24e1850a06">arm_dct4_init_f32()</a>.</p>
-
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-<a class="anchor" id="ad13544aafad268588c62e3eb35ae662c"></a>
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+          <td class="memname">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>* arm_dct4_instance_f32::pTwiddle</td>
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 <p>points to the twiddle factor table. </p>
 
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    [ "pCosFactor", "structarm__dct4__instance__f32.html#a6da1187e070801e011ce5e0582efa861", null ],
+    [ "pCosFactor", "structarm__dct4__instance__f32.html#a7762296d8871c58f2ef0b6ce327b8f4e", null ],
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-    [ "pTwiddle", "structarm__dct4__instance__f32.html#ad13544aafad268588c62e3eb35ae662c", null ]
+    [ "pTwiddle", "structarm__dct4__instance__f32.html#a01fe45dbe46c782245832f2169622c29", null ]
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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-<tr class="memitem:ac76df681b1bd502fb4874c06f055dded"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__dct4__instance__q15.html#ac76df681b1bd502fb4874c06f055dded">pCosFactor</a></td></tr>
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+<tr class="memitem:aa1a1d7e957ca6af3f341721f5fa3b95b"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__dct4__instance__q15.html#aa1a1d7e957ca6af3f341721f5fa3b95b">pTwiddle</a></td></tr>
+<tr class="separator:aa1a1d7e957ca6af3f341721f5fa3b95b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:aad2097a5525c1a5b3f5cbd7235c06499"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__dct4__instance__q15.html#aad2097a5525c1a5b3f5cbd7235c06499">pCosFactor</a></td></tr>
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 <p>length of the DCT4. </p>
 
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 <p>half of the length of the DCT4. </p>
 
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga966fd1b66a80873964533703ab5dc054">arm_dct4_init_q15()</a>, and <a class="el" href="group__DCT4__IDCT4.html#ga114cb9635059f678df291fcc887aaf2b">arm_dct4_q15()</a>.</p>
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 <p>normalizing factor. </p>
 
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 <p>points to the complex FFT instance. </p>
 
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga966fd1b66a80873964533703ab5dc054">arm_dct4_init_q15()</a>.</p>
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-<a class="anchor" id="ac76df681b1bd502fb4874c06f055dded"></a>
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 <p>points to the cosFactor table. </p>
 
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga966fd1b66a80873964533703ab5dc054">arm_dct4_init_q15()</a>, and <a class="el" href="group__DCT4__IDCT4.html#ga114cb9635059f678df291fcc887aaf2b">arm_dct4_q15()</a>.</p>
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 <p>points to the real FFT instance. </p>
 
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-
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-<a class="anchor" id="abc6c847e9f906781e1d5da40e9aafa76"></a>
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+          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>* arm_dct4_instance_q15::pTwiddle</td>
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 <p>points to the twiddle factor table. </p>
 
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga966fd1b66a80873964533703ab5dc054">arm_dct4_init_q15()</a>, and <a class="el" href="group__DCT4__IDCT4.html#ga114cb9635059f678df291fcc887aaf2b">arm_dct4_q15()</a>.</p>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    [ "pCosFactor", "structarm__dct4__instance__q15.html#ac76df681b1bd502fb4874c06f055dded", null ],
+    [ "pCosFactor", "structarm__dct4__instance__q15.html#aad2097a5525c1a5b3f5cbd7235c06499", null ],
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-    [ "pTwiddle", "structarm__dct4__instance__q15.html#abc6c847e9f906781e1d5da40e9aafa76", null ]
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    <div id="projectname">CMSIS-DSP
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+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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-<tr class="memitem:af97204d1838925621fc82021a0c2d6c1"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__dct4__instance__q31.html#af97204d1838925621fc82021a0c2d6c1">pCosFactor</a></td></tr>
-<tr class="separator:af97204d1838925621fc82021a0c2d6c1"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a107b210eca05f0bd16246b28fd32c4e7"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__dct4__instance__q31.html#a107b210eca05f0bd16246b28fd32c4e7">pTwiddle</a></td></tr>
+<tr class="separator:a107b210eca05f0bd16246b28fd32c4e7"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a34241ee5930de99d4f22a040d32026e3"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__dct4__instance__q31.html#a34241ee5930de99d4f22a040d32026e3">pCosFactor</a></td></tr>
+<tr class="separator:a34241ee5930de99d4f22a040d32026e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 <p>length of the DCT4. </p>
 
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga631bb59c7c97c814ff7147ecba6a716a">arm_dct4_init_q31()</a>, and <a class="el" href="group__DCT4__IDCT4.html#gad04d0baab6ed081d8e8afe02538eb80b">arm_dct4_q31()</a>.</p>
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 <p>half of the length of the DCT4. </p>
 
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 <p>normalizing factor. </p>
 
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga631bb59c7c97c814ff7147ecba6a716a">arm_dct4_init_q31()</a>, and <a class="el" href="group__DCT4__IDCT4.html#gad04d0baab6ed081d8e8afe02538eb80b">arm_dct4_q31()</a>.</p>
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@@ -197,23 +191,19 @@
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 <p>points to the complex FFT instance. </p>
 
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga631bb59c7c97c814ff7147ecba6a716a">arm_dct4_init_q31()</a>.</p>
-
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 <p>points to the cosFactor table. </p>
 
-<p>Referenced by <a class="el" href="group__DCT4__IDCT4.html#ga631bb59c7c97c814ff7147ecba6a716a">arm_dct4_init_q31()</a>, and <a class="el" href="group__DCT4__IDCT4.html#gad04d0baab6ed081d8e8afe02538eb80b">arm_dct4_q31()</a>.</p>
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 <p>points to the real FFT instance. </p>
 
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-
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    [ "pTwiddle", "structarm__dct4__instance__q31.html#a7db236e22673146bb1d2c962f0713f08", null ]
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    <div id="projectname">CMSIS-DSP
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 <p>decimation factor. </p>
 
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 <p>number of coefficients in the filter. </p>
 
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+          <td class="memname">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>* arm_fir_decimate_instance_f32::pCoeffs</td>
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 <p>points to the coefficient array. The array is of length numTaps. </p>
 
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 <p>points to the state variable array. The array is of length numTaps+blockSize-1. </p>
 
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    [ "pCoeffs", "structarm__fir__decimate__instance__f32.html#a268a8b0e80a3d9764baf33e4bc10dde2", null ],
+    [ "pCoeffs", "structarm__fir__decimate__instance__f32.html#a1aef1d796b60749d87ff36e282284628", null ],
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 <p>decimation factor. </p>
 
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 <p>number of coefficients in the filter. </p>
 
-<p>Referenced by <a class="el" href="group__FIR__decimate.html#ga3f434c9a5d3b4e68061feac0714ea2ac">arm_fir_decimate_fast_q15()</a>, <a class="el" href="group__FIR__decimate.html#gada660e54b93d5d32178c6f5e1c6f368d">arm_fir_decimate_init_q15()</a>, and <a class="el" href="group__FIR__decimate.html#gab8bef6d0f6a26fdbfce9485727713ce5">arm_fir_decimate_q15()</a>.</p>
-
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-<a class="anchor" id="a01cacab67e73945e8289075598ede14d"></a>
+<a class="anchor" id="a44ba13cf8aa4425c34adc82dc468ad54"></a>
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 <p>points to the coefficient array. The array is of length numTaps. </p>
 
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 <p>points to the state variable array. The array is of length numTaps+blockSize-1. </p>
 
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-
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@@ -201,7 +193,7 @@
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    [ "pCoeffs", "structarm__fir__decimate__instance__q15.html#a01cacab67e73945e8289075598ede14d", null ],
+    [ "pCoeffs", "structarm__fir__decimate__instance__q15.html#a44ba13cf8aa4425c34adc82dc468ad54", null ],
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 <p>decimation factor. </p>
 
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 <p>number of coefficients in the filter. </p>
 
-<p>Referenced by <a class="el" href="group__FIR__decimate.html#ga3c18cc3d0548a410c577f1bead9582b7">arm_fir_decimate_fast_q31()</a>, <a class="el" href="group__FIR__decimate.html#ga9ed47c4e0f58affa935d84e0508a7f39">arm_fir_decimate_init_q31()</a>, and <a class="el" href="group__FIR__decimate.html#gaef8e86add28f15fdc5ecc484e9dd7a4e">arm_fir_decimate_q31()</a>.</p>
-
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+          <td class="memname">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>* arm_fir_decimate_instance_q31::pCoeffs</td>
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 <p>points to the coefficient array. The array is of length numTaps. </p>
 
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 <p>points to the state variable array. The array is of length numTaps+blockSize-1. </p>
 
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    [ "pCoeffs", "structarm__fir__decimate__instance__q31.html#a030d0391538c2481c5b348fd09a952ff", null ],
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+<tr class="memitem:aa590e6c845fcb19e027d77307c8ef016"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__fir__instance__f32.html#aa590e6c845fcb19e027d77307c8ef016">pCoeffs</a></td></tr>
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 <p>number of filter coefficients in the filter. </p>
 
-<p>Referenced by <a class="el" href="group__FIR.html#gae8fb334ea67eb6ecbd31824ddc14cd6a">arm_fir_f32()</a>, and <a class="el" href="group__FIR.html#ga98d13def6427e29522829f945d0967db">arm_fir_init_f32()</a>.</p>
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+          <td class="memname">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>* arm_fir_instance_f32::pCoeffs</td>
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 <p>points to the coefficient array. The array is of length numTaps. </p>
 
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 <p>points to the state variable array. The array is of length numTaps+blockSize-1. </p>
 
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    [ "pCoeffs", "structarm__fir__instance__f32.html#a1c9cfca901d5902afeb640f2831488f4", null ],
+    [ "pCoeffs", "structarm__fir__instance__f32.html#aa590e6c845fcb19e027d77307c8ef016", null ],
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    <div id="projectname">CMSIS-DSP
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+<tr class="memitem:ac7f6e5f1b0be8d07c4c35b4be07157b0"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__fir__instance__q15.html#ac7f6e5f1b0be8d07c4c35b4be07157b0">pCoeffs</a></td></tr>
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 <p>number of filter coefficients in the filter. </p>
 
-<p>Referenced by <a class="el" href="group__FIR.html#gac7d35e9472e49ccd88800f37f3476bd3">arm_fir_fast_q15()</a>, <a class="el" href="group__FIR.html#gae2a50f692f41ba57e44ed0719b1368bd">arm_fir_init_q15()</a>, and <a class="el" href="group__FIR.html#ga262d173058d6f80fdf60404ba262a8f5">arm_fir_q15()</a>.</p>
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 <p>points to the coefficient array. The array is of length numTaps. </p>
 
-<p>Referenced by <a class="el" href="group__FIR.html#gac7d35e9472e49ccd88800f37f3476bd3">arm_fir_fast_q15()</a>, <a class="el" href="group__FIR.html#gae2a50f692f41ba57e44ed0719b1368bd">arm_fir_init_q15()</a>, and <a class="el" href="group__FIR.html#ga262d173058d6f80fdf60404ba262a8f5">arm_fir_q15()</a>.</p>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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index 1493cc1..3aa1c8d 100644
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-    [ "pCoeffs", "structarm__fir__instance__q15.html#a6d16db16a5f8f0db54938f2967244d9e", null ],
+    [ "pCoeffs", "structarm__fir__instance__q15.html#ac7f6e5f1b0be8d07c4c35b4be07157b0", null ],
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index fcd4d8d..cac1c05 100644
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+++ b/docs/DSP/html/structarm__fir__instance__q31.html
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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 <p>number of filter coefficients in the filter. </p>
 
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 <p>points to the coefficient array. The array is of length numTaps. </p>
 
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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 <p>upsample factor. </p>
 
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+          <td class="memname">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>* arm_fir_interpolate_instance_f32::pCoeffs</td>
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 <p>points to the coefficient array. The array is of length L*phaseLength. </p>
 
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 <p>length of each polyphase filter component. </p>
 
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 <p>points to the state variable array. The array is of length phaseLength+numTaps-1. </p>
 
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    [ "pCoeffs", "structarm__fir__interpolate__instance__f32.html#a86053b715980a93c9df630d6de5bb63c", null ],
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
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+   &#160;<span id="projectnumber">Version 1.7.0</span>
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+          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>* arm_fir_interpolate_instance_q15::pCoeffs</td>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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 <p>number of filter stages. </p>
 
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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 <p>number of coefficients in the filter. </p>
 
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 <p>points to the coefficient array. The array is of length numTaps. </p>
 
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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 <p>number of coefficients in the filter. </p>
 
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 <p>points to the coefficient array. The array is of length numTaps. </p>
 
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 <p>points to the state buffer array. The array is of length maxDelay+blockSize-1. </p>
 
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 <p>points to the array of delay values. The array is of length numTaps. </p>
 
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 <p>state buffer index. Points to the oldest sample in the state buffer. </p>
 
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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 <p>maximum offset specified by the pTapDelay array. </p>
 
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 <p>number of coefficients in the filter. </p>
 
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 <p>points to the coefficient array. The array is of length numTaps. </p>
 
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 <p>points to the array of delay values. The array is of length numTaps. </p>
 
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 <p>state buffer index. Points to the oldest sample in the state buffer. </p>
 
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    [ "pCoeffs", "structarm__fir__sparse__instance__q31.html#a093d6227f0d1597982cd083fb126f4e0", null ],
+    [ "pCoeffs", "structarm__fir__sparse__instance__q31.html#af714d56f8fec4f93ad557abce6994d45", null ],
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    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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+<tr class="memitem:a7f0989ef34fdb5d08ce5a5abf917218f"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__fir__sparse__instance__q7.html#a7f0989ef34fdb5d08ce5a5abf917218f">pCoeffs</a></td></tr>
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 <p>maximum offset specified by the pTapDelay array. </p>
 
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 <p>number of coefficients in the filter. </p>
 
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-
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-<a class="anchor" id="a3dac86f15e33553e8f3e19e0d712bae5"></a>
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+          <td class="memname">const <a class="el" href="arm__math_8h.html#ae541b6f232c305361e9b416fc9eed263">q7_t</a>* arm_fir_sparse_instance_q7::pCoeffs</td>
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 <p>points to the coefficient array. The array is of length numTaps. </p>
 
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 <p>points to the state buffer array. The array is of length maxDelay+blockSize-1. </p>
 
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 <p>points to the array of delay values. The array is of length numTaps. </p>
 
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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 <p>step size that controls filter coefficient updates. </p>
 
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 <p>number of coefficients in the filter. </p>
 
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 <p>points to the coefficient array. The array is of length numTaps. </p>
 
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 <p>bit shift applied to coefficients. </p>
 
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 <p>points to the state variable array. The array is of length numTaps+blockSize-1. </p>
 
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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 <p>saves previous frame energy. </p>
 
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 <p>step size that control filter coefficient updates. </p>
 
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 <p>number of coefficients in the filter. </p>
 
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 <p>points to the coefficient array. The array is of length numTaps. </p>
 
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 <p>points to the state variable array. The array is of length numTaps+blockSize-1. </p>
 
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 <p>saves previous input sample. </p>
 
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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 <p>saves previous frame energy. </p>
 
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 <p>step size that controls filter coefficient updates. </p>
 
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 <p>Number of coefficients in the filter. </p>
 
-<p>Referenced by <a class="el" href="group__LMS__NORM.html#ga213ab1ee2e154cc2fa30d667b1994b89">arm_lms_norm_init_q15()</a>, and <a class="el" href="group__LMS__NORM.html#gad47486a399dedb0bc85a5990ec5cf981">arm_lms_norm_q15()</a>.</p>
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 <p>points to the coefficient array. The array is of length numTaps. </p>
 
-<p>Referenced by <a class="el" href="group__LMS__NORM.html#ga213ab1ee2e154cc2fa30d667b1994b89">arm_lms_norm_init_q15()</a>, and <a class="el" href="group__LMS__NORM.html#gad47486a399dedb0bc85a5990ec5cf981">arm_lms_norm_q15()</a>.</p>
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 <p>bit shift applied to coefficients. </p>
 
-<p>Referenced by <a class="el" href="group__LMS__NORM.html#ga213ab1ee2e154cc2fa30d667b1994b89">arm_lms_norm_init_q15()</a>, and <a class="el" href="group__LMS__NORM.html#gad47486a399dedb0bc85a5990ec5cf981">arm_lms_norm_q15()</a>.</p>
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 <p>points to the state variable array. The array is of length numTaps+blockSize-1. </p>
 
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+          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>* arm_lms_norm_instance_q15::recipTable</td>
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 <p>Points to the reciprocal initial value table. </p>
 
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 <p>saves previous input sample. </p>
 
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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 <p>saves previous frame energy. </p>
 
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 <p>step size that controls filter coefficient updates. </p>
 
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 <p>number of coefficients in the filter. </p>
 
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 <p>points to the coefficient array. The array is of length numTaps. </p>
 
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 <p>bit shift applied to coefficients. </p>
 
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 <p>points to the state variable array. The array is of length numTaps+blockSize-1. </p>
 
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+          <td class="memname">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>* arm_lms_norm_instance_q31::recipTable</td>
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 <p>points to the reciprocal initial value table. </p>
 
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 <p>saves previous input sample. </p>
 
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 <p>number of columns of the matrix. </p>
 
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 <p>number of rows of the matrix. </p>
 
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 <p>points to the data of the matrix. </p>
 
-<p>Referenced by <a class="el" href="group__MatrixAdd.html#ga04bbf64a5f9c9e57dd1efb26a768aba1">arm_mat_add_f32()</a>, <a class="el" href="group__CmplxMatrixMult.html#ga1adb839ac84445b8c2f04efa43faef35">arm_mat_cmplx_mult_f32()</a>, <a class="el" href="group__MatrixInit.html#ga11e3dc41592a6401c13182fef9416a27">arm_mat_init_f32()</a>, <a class="el" href="group__MatrixInv.html#ga542be7aabbf7a2297a4b62cf212910e3">arm_mat_inverse_f32()</a>, <a class="el" href="group__MatrixMult.html#ga917bf0270310c1d3f0eda1fc7c0026a0">arm_mat_mult_f32()</a>, <a class="el" href="group__MatrixScale.html#ga9cb4e385b18c9a0b9cbc940c1067ca12">arm_mat_scale_f32()</a>, <a class="el" href="group__MatrixSub.html#gac8b72fb70246ccfee3b372002345732c">arm_mat_sub_f32()</a>, and <a class="el" href="group__MatrixTrans.html#gad7dd9f108429da13d3864696ceeec789">arm_mat_trans_f32()</a>.</p>
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@@ -186,7 +180,7 @@
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   <ul>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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 <p>number of columns of the matrix. </p>
 
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 <p>number of rows of the matrix. </p>
 
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 <p>points to the data of the matrix. </p>
 
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/structarm__matrix__instance__q15.html b/docs/DSP/html/structarm__matrix__instance__q15.html
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 <p>number of columns of the matrix. </p>
 
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 <p>number of rows of the matrix. </p>
 
-<p>Referenced by <a class="el" href="group__MatrixAdd.html#ga147e90b7c12a162735ab8824127a33ee">arm_mat_add_q15()</a>, <a class="el" href="group__CmplxMatrixMult.html#ga63066615e7d6f6a44f4358725092419e">arm_mat_cmplx_mult_q15()</a>, <a class="el" href="group__MatrixInit.html#ga31a7c2b991803d49719393eb2d53dc26">arm_mat_init_q15()</a>, <a class="el" href="group__MatrixMult.html#ga08f37d93a5bfef0c5000dc5e0a411f93">arm_mat_mult_fast_q15()</a>, <a class="el" href="group__MatrixMult.html#ga7521d59196189bb6dde26e8cdfb66e21">arm_mat_mult_q15()</a>, <a class="el" href="group__MatrixScale.html#ga7521769e2cf1c3d9c4656138cd2ae2ca">arm_mat_scale_q15()</a>, <a class="el" href="group__MatrixSub.html#gaf647776a425b7f9dd0aca3e11d81f02f">arm_mat_sub_q15()</a>, and <a class="el" href="group__MatrixTrans.html#ga4f4f821cc695fd0ef9061d702e08050a">arm_mat_trans_q15()</a>.</p>
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 <p>points to the data of the matrix. </p>
 
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@@ -184,7 +178,7 @@
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   <ul>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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diff --git a/docs/DSP/html/structarm__matrix__instance__q31.html b/docs/DSP/html/structarm__matrix__instance__q31.html
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+   &#160;<span id="projectnumber">Version 1.7.0</span>
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 <p>number of columns of the matrix. </p>
 
-<p>Referenced by <a class="el" href="group__MatrixAdd.html#ga7d9d7d81a0832a17b831aad1e4a5dc16">arm_mat_add_q31()</a>, <a class="el" href="group__CmplxMatrixMult.html#gaaf3c0b171ca8412c77bab9fa90804737">arm_mat_cmplx_mult_q31()</a>, <a class="el" href="group__MatrixInit.html#ga48a5e5d37e1f062cc57fcfaf683343cc">arm_mat_init_q31()</a>, <a class="el" href="group__MatrixMult.html#ga2785e8c1b785348b0c439b56aaf585a3">arm_mat_mult_fast_q31()</a>, <a class="el" href="group__MatrixMult.html#ga2ec612a8c2c4916477fb9bc1ab548a6e">arm_mat_mult_q31()</a>, <a class="el" href="group__MatrixScale.html#ga609743821ee81fa8c34c4bcdc1ed9744">arm_mat_scale_q31()</a>, <a class="el" href="group__MatrixSub.html#ga39f42e0e3b7f115fbb909d6ff4e1329d">arm_mat_sub_q31()</a>, and <a class="el" href="group__MatrixTrans.html#ga30a4d49489ac67ff98a46b9f58f73bf1">arm_mat_trans_q31()</a>.</p>
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 <p>number of rows of the matrix. </p>
 
-<p>Referenced by <a class="el" href="group__MatrixAdd.html#ga7d9d7d81a0832a17b831aad1e4a5dc16">arm_mat_add_q31()</a>, <a class="el" href="group__CmplxMatrixMult.html#gaaf3c0b171ca8412c77bab9fa90804737">arm_mat_cmplx_mult_q31()</a>, <a class="el" href="group__MatrixInit.html#ga48a5e5d37e1f062cc57fcfaf683343cc">arm_mat_init_q31()</a>, <a class="el" href="group__MatrixMult.html#ga2785e8c1b785348b0c439b56aaf585a3">arm_mat_mult_fast_q31()</a>, <a class="el" href="group__MatrixMult.html#ga2ec612a8c2c4916477fb9bc1ab548a6e">arm_mat_mult_q31()</a>, <a class="el" href="group__MatrixScale.html#ga609743821ee81fa8c34c4bcdc1ed9744">arm_mat_scale_q31()</a>, <a class="el" href="group__MatrixSub.html#ga39f42e0e3b7f115fbb909d6ff4e1329d">arm_mat_sub_q31()</a>, and <a class="el" href="group__MatrixTrans.html#ga30a4d49489ac67ff98a46b9f58f73bf1">arm_mat_trans_q31()</a>.</p>
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 <p>points to the data of the matrix. </p>
 
-<p>Referenced by <a class="el" href="group__MatrixAdd.html#ga7d9d7d81a0832a17b831aad1e4a5dc16">arm_mat_add_q31()</a>, <a class="el" href="group__CmplxMatrixMult.html#gaaf3c0b171ca8412c77bab9fa90804737">arm_mat_cmplx_mult_q31()</a>, <a class="el" href="group__MatrixInit.html#ga48a5e5d37e1f062cc57fcfaf683343cc">arm_mat_init_q31()</a>, <a class="el" href="group__MatrixMult.html#ga2785e8c1b785348b0c439b56aaf585a3">arm_mat_mult_fast_q31()</a>, <a class="el" href="group__MatrixMult.html#ga2ec612a8c2c4916477fb9bc1ab548a6e">arm_mat_mult_q31()</a>, <a class="el" href="group__MatrixScale.html#ga609743821ee81fa8c34c4bcdc1ed9744">arm_mat_scale_q31()</a>, <a class="el" href="group__MatrixSub.html#ga39f42e0e3b7f115fbb909d6ff4e1329d">arm_mat_sub_q31()</a>, and <a class="el" href="group__MatrixTrans.html#ga30a4d49489ac67ff98a46b9f58f73bf1">arm_mat_trans_q31()</a>.</p>
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@@ -184,7 +178,7 @@
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   <ul>
     <li class="navelem"><a class="el" href="structarm__matrix__instance__q31.html">arm_matrix_instance_q31</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/DSP/html/structarm__pid__instance__f32.html b/docs/DSP/html/structarm__pid__instance__f32.html
index 04a5386..787c6ff 100644
--- a/docs/DSP/html/structarm__pid__instance__f32.html
+++ b/docs/DSP/html/structarm__pid__instance__f32.html
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   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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 <p>The derived gain, A0 = Kp + Ki + Kd . </p>
 
-<p>Referenced by <a class="el" href="group__PID.html#ga9380d08046dd7ec2f5015f569206b9ce">arm_pid_f32()</a>, and <a class="el" href="group__PID.html#gae31536b19b82b93ed184fb1ab73cfcb3">arm_pid_init_f32()</a>.</p>
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 <p>The derived gain, A1 = -Kp - 2Kd. </p>
 
-<p>Referenced by <a class="el" href="group__PID.html#ga9380d08046dd7ec2f5015f569206b9ce">arm_pid_f32()</a>, and <a class="el" href="group__PID.html#gae31536b19b82b93ed184fb1ab73cfcb3">arm_pid_init_f32()</a>.</p>
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 <p>The derived gain, A2 = Kd . </p>
 
-<p>Referenced by <a class="el" href="group__PID.html#ga9380d08046dd7ec2f5015f569206b9ce">arm_pid_f32()</a>, and <a class="el" href="group__PID.html#gae31536b19b82b93ed184fb1ab73cfcb3">arm_pid_init_f32()</a>.</p>
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 <p>The derivative gain. </p>
 
-<p>Referenced by <a class="el" href="group__PID.html#gae31536b19b82b93ed184fb1ab73cfcb3">arm_pid_init_f32()</a>.</p>
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 <p>The integral gain. </p>
 
-<p>Referenced by <a class="el" href="group__PID.html#gae31536b19b82b93ed184fb1ab73cfcb3">arm_pid_init_f32()</a>.</p>
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 <p>The proportional gain. </p>
 
-<p>Referenced by <a class="el" href="group__PID.html#gae31536b19b82b93ed184fb1ab73cfcb3">arm_pid_init_f32()</a>.</p>
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 <p>The state array of length 3. </p>
 
-<p>Referenced by <a class="el" href="group__PID.html#ga9380d08046dd7ec2f5015f569206b9ce">arm_pid_f32()</a>, <a class="el" href="group__PID.html#gae31536b19b82b93ed184fb1ab73cfcb3">arm_pid_init_f32()</a>, and <a class="el" href="group__PID.html#ga9ec860bcb6f8ca31205bf0f1b51ab723">arm_pid_reset_f32()</a>.</p>
-
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@@ -252,7 +238,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="structarm__pid__instance__f32.html">arm_pid_instance_f32</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/structarm__pid__instance__q15.html b/docs/DSP/html/structarm__pid__instance__q15.html
index 6d5bb67..8d2e3a6 100644
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+++ b/docs/DSP/html/structarm__pid__instance__q15.html
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   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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 <p>The derived gain, A0 = Kp + Ki + Kd . </p>
 
-<p>Referenced by <a class="el" href="group__PID.html#ga2cb1e3d3ebb167348fdabec74653d5c3">arm_pid_init_q15()</a>, and <a class="el" href="group__PID.html#gad466471a6b0f8fc570b8b8fc34ac79fa">arm_pid_q15()</a>.</p>
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       </table>
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-<p>Referenced by <a class="el" href="group__PID.html#ga2cb1e3d3ebb167348fdabec74653d5c3">arm_pid_init_q15()</a>, and <a class="el" href="group__PID.html#gad466471a6b0f8fc570b8b8fc34ac79fa">arm_pid_q15()</a>.</p>
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-<p>Referenced by <a class="el" href="group__PID.html#ga2cb1e3d3ebb167348fdabec74653d5c3">arm_pid_init_q15()</a>, and <a class="el" href="group__PID.html#gad466471a6b0f8fc570b8b8fc34ac79fa">arm_pid_q15()</a>.</p>
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 <p>The derivative gain. </p>
 
-<p>Referenced by <a class="el" href="group__PID.html#ga2cb1e3d3ebb167348fdabec74653d5c3">arm_pid_init_q15()</a>.</p>
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 <p>The integral gain. </p>
 
-<p>Referenced by <a class="el" href="group__PID.html#ga2cb1e3d3ebb167348fdabec74653d5c3">arm_pid_init_q15()</a>.</p>
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 <p>The proportional gain. </p>
 
-<p>Referenced by <a class="el" href="group__PID.html#ga2cb1e3d3ebb167348fdabec74653d5c3">arm_pid_init_q15()</a>.</p>
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 <p>The state array of length 3. </p>
 
-<p>Referenced by <a class="el" href="group__PID.html#ga2cb1e3d3ebb167348fdabec74653d5c3">arm_pid_init_q15()</a>, <a class="el" href="group__PID.html#gad466471a6b0f8fc570b8b8fc34ac79fa">arm_pid_q15()</a>, and <a class="el" href="group__PID.html#ga408566dacb4fa6e0458b2c75672e525f">arm_pid_reset_q15()</a>.</p>
-
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@@ -250,7 +236,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="structarm__pid__instance__q15.html">arm_pid_instance_q15</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/structarm__pid__instance__q31.html b/docs/DSP/html/structarm__pid__instance__q31.html
index 072c342..8ee162a 100644
--- a/docs/DSP/html/structarm__pid__instance__q31.html
+++ b/docs/DSP/html/structarm__pid__instance__q31.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -152,8 +152,6 @@
 </div><div class="memdoc">
 <p>The derived gain, A0 = Kp + Ki + Kd . </p>
 
-<p>Referenced by <a class="el" href="group__PID.html#gad9d88485234fa9460b1ce9e64989ac86">arm_pid_init_q31()</a>, and <a class="el" href="group__PID.html#ga82bc0813c007d50ce308b9b0bf3c76e2">arm_pid_q31()</a>.</p>
-
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@@ -167,8 +165,6 @@
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 <p>The derived gain, A1 = -Kp - 2Kd. </p>
 
-<p>Referenced by <a class="el" href="group__PID.html#gad9d88485234fa9460b1ce9e64989ac86">arm_pid_init_q31()</a>, and <a class="el" href="group__PID.html#ga82bc0813c007d50ce308b9b0bf3c76e2">arm_pid_q31()</a>.</p>
-
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@@ -182,8 +178,6 @@
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 <p>The derived gain, A2 = Kd . </p>
 
-<p>Referenced by <a class="el" href="group__PID.html#gad9d88485234fa9460b1ce9e64989ac86">arm_pid_init_q31()</a>, and <a class="el" href="group__PID.html#ga82bc0813c007d50ce308b9b0bf3c76e2">arm_pid_q31()</a>.</p>
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 <p>The derivative gain. </p>
 
-<p>Referenced by <a class="el" href="group__PID.html#gad9d88485234fa9460b1ce9e64989ac86">arm_pid_init_q31()</a>.</p>
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 <p>The integral gain. </p>
 
-<p>Referenced by <a class="el" href="group__PID.html#gad9d88485234fa9460b1ce9e64989ac86">arm_pid_init_q31()</a>.</p>
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 <p>The proportional gain. </p>
 
-<p>Referenced by <a class="el" href="group__PID.html#gad9d88485234fa9460b1ce9e64989ac86">arm_pid_init_q31()</a>.</p>
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 <p>The state array of length 3. </p>
 
-<p>Referenced by <a class="el" href="group__PID.html#gad9d88485234fa9460b1ce9e64989ac86">arm_pid_init_q31()</a>, <a class="el" href="group__PID.html#ga82bc0813c007d50ce308b9b0bf3c76e2">arm_pid_q31()</a>, and <a class="el" href="group__PID.html#gaeecbacd3fb37c608ec25474d3a0dffa9">arm_pid_reset_q31()</a>.</p>
-
 </div>
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 </div><!-- contents -->
@@ -252,7 +238,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="structarm__pid__instance__q31.html">arm_pid_instance_q31</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/DSP/html/structarm__rfft__fast__instance__f32.html b/docs/DSP/html/structarm__rfft__fast__instance__f32.html
index ec17c97..630ba0d 100644
--- a/docs/DSP/html/structarm__rfft__fast__instance__f32.html
+++ b/docs/DSP/html/structarm__rfft__fast__instance__f32.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
    </div>
    <div id="projectbrief">CMSIS DSP Software Library</div>
   </td>
@@ -129,8 +129,8 @@
 <tr class="separator:a37419ababdfb3151b1891ae6bcd21012"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:aef06ab665041ec36f5b25d464f0cab14"><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__rfft__fast__instance__f32.html#aef06ab665041ec36f5b25d464f0cab14">fftLenRFFT</a></td></tr>
 <tr class="separator:aef06ab665041ec36f5b25d464f0cab14"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a9f30b04f163fabc1b24421d3c323d5fc"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__rfft__fast__instance__f32.html#a9f30b04f163fabc1b24421d3c323d5fc">pTwiddleRFFT</a></td></tr>
-<tr class="separator:a9f30b04f163fabc1b24421d3c323d5fc"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ad1a1bd8b12b49eae674115308d324622"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__rfft__fast__instance__f32.html#ad1a1bd8b12b49eae674115308d324622">pTwiddleRFFT</a></td></tr>
+<tr class="separator:ad1a1bd8b12b49eae674115308d324622"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
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 <p>length of the real sequence </p>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga180d8b764d59cbb85d37a2d5f7cd9799">arm_rfft_fast_f32()</a>, and <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>.</p>
-
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-<a class="anchor" id="a9f30b04f163fabc1b24421d3c323d5fc"></a>
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-          <td class="memname"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>* arm_rfft_fast_instance_f32::pTwiddleRFFT</td>
+          <td class="memname">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>* arm_rfft_fast_instance_f32::pTwiddleRFFT</td>
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 <p>Twiddle factors real stage </p>
 
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 <p>Internal CFFT structure. </p>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga180d8b764d59cbb85d37a2d5f7cd9799">arm_rfft_fast_f32()</a>, <a class="el" href="group__RealFFT.html#gac5fceb172551e7c11eb4d0e17ef15aa3">arm_rfft_fast_init_f32()</a>, <a class="el" href="arm__rfft__fast__f32_8c.html#a93258bc1e64a939a8ebd086367e459af">merge_rfft_f32()</a>, and <a class="el" href="arm__rfft__fast__f32_8c.html#a47157c5a53c8aac5e80fda31acf1f9cc">stage_rfft_f32()</a>.</p>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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-    [ "pTwiddleRFFT", "structarm__rfft__fast__instance__f32.html#a9f30b04f163fabc1b24421d3c323d5fc", null ],
+    [ "pTwiddleRFFT", "structarm__rfft__fast__instance__f32.html#ad1a1bd8b12b49eae674115308d324622", null ],
     [ "Sint", "structarm__rfft__fast__instance__f32.html#a37419ababdfb3151b1891ae6bcd21012", null ]
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-<tr class="memitem:a23543ecfd027fea2477fe1eea23c3c4d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__rfft__instance__f32.html#a23543ecfd027fea2477fe1eea23c3c4d">pTwiddleBReal</a></td></tr>
-<tr class="separator:a23543ecfd027fea2477fe1eea23c3c4d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:aac5a79a077f3ecbca6e85ba582b33691"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__rfft__instance__f32.html#aac5a79a077f3ecbca6e85ba582b33691">pTwiddleAReal</a></td></tr>
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 <p>flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. </p>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32()</a>, and <a class="el" href="group__RealFFT.html#ga10717ee326bf50832ef1c25b85a23068">arm_rfft_init_f32()</a>.</p>
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 <p>length of the complex FFT. </p>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32()</a>, and <a class="el" href="group__RealFFT.html#ga10717ee326bf50832ef1c25b85a23068">arm_rfft_init_f32()</a>.</p>
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 <p>length of the real FFT. </p>
 
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 <p>flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. </p>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32()</a>, and <a class="el" href="group__RealFFT.html#ga10717ee326bf50832ef1c25b85a23068">arm_rfft_init_f32()</a>.</p>
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 <p>points to the complex FFT instance. </p>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32()</a>, and <a class="el" href="group__RealFFT.html#ga10717ee326bf50832ef1c25b85a23068">arm_rfft_init_f32()</a>.</p>
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+          <td class="memname">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>* arm_rfft_instance_f32::pTwiddleAReal</td>
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 <p>points to the real twiddle factor table. </p>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32()</a>, and <a class="el" href="group__RealFFT.html#ga10717ee326bf50832ef1c25b85a23068">arm_rfft_init_f32()</a>.</p>
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+          <td class="memname">const <a class="el" href="arm__math_8h.html#a4611b605e45ab401f02cab15c5e38715">float32_t</a>* arm_rfft_instance_f32::pTwiddleBReal</td>
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 <p>points to the imag twiddle factor table. </p>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32()</a>, and <a class="el" href="group__RealFFT.html#ga10717ee326bf50832ef1c25b85a23068">arm_rfft_init_f32()</a>.</p>
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 <p>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. </p>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga3df1766d230532bc068fc4ed69d0fcdc">arm_rfft_f32()</a>, and <a class="el" href="group__RealFFT.html#ga10717ee326bf50832ef1c25b85a23068">arm_rfft_init_f32()</a>.</p>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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     [ "ifftFlagR", "structarm__rfft__instance__f32.html#a5ee6d10a934ab4b666e0bb286c3d633f", null ],
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-    [ "pTwiddleBReal", "structarm__rfft__instance__f32.html#a23543ecfd027fea2477fe1eea23c3c4d", null ],
+    [ "pTwiddleAReal", "structarm__rfft__instance__f32.html#aac5a79a077f3ecbca6e85ba582b33691", null ],
+    [ "pTwiddleBReal", "structarm__rfft__instance__f32.html#a8c5c8de5d526d3bb9527954ec5c585c9", null ],
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-<tr class="memitem:affbf2de522ac029432d98e8373c0ec53"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__rfft__instance__q15.html#affbf2de522ac029432d98e8373c0ec53">pTwiddleAReal</a></td></tr>
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-<tr class="memitem:a937d815022adc557b435ba8c6cd58b0d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__rfft__instance__q15.html#a937d815022adc557b435ba8c6cd58b0d">pTwiddleBReal</a></td></tr>
-<tr class="separator:a937d815022adc557b435ba8c6cd58b0d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:aab9899263ada770283136d01985a524f"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__rfft__instance__q15.html#aab9899263ada770283136d01985a524f">pTwiddleAReal</a></td></tr>
+<tr class="separator:aab9899263ada770283136d01985a524f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a5b288a44a0ce0154b1fed9386627c4b5"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__rfft__instance__q15.html#a5b288a44a0ce0154b1fed9386627c4b5">pTwiddleBReal</a></td></tr>
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 <tr class="memitem:a4329c15b056444746d37ff082a24d31a"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="structarm__cfft__instance__q15.html">arm_cfft_instance_q15</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__rfft__instance__q15.html#a4329c15b056444746d37ff082a24d31a">pCfft</a></td></tr>
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 <p>flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. </p>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga053450cc600a55410ba5b5605e96245d">arm_rfft_init_q15()</a>, and <a class="el" href="group__RealFFT.html#ga00e615f5db21736ad5b27fb6146f3fc5">arm_rfft_q15()</a>.</p>
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 <p>length of the real FFT. </p>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga053450cc600a55410ba5b5605e96245d">arm_rfft_init_q15()</a>, and <a class="el" href="group__RealFFT.html#ga00e615f5db21736ad5b27fb6146f3fc5">arm_rfft_q15()</a>.</p>
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 <p>flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. </p>
 
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 <p>points to the complex FFT instance. </p>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga053450cc600a55410ba5b5605e96245d">arm_rfft_init_q15()</a>, and <a class="el" href="group__RealFFT.html#ga00e615f5db21736ad5b27fb6146f3fc5">arm_rfft_q15()</a>.</p>
-
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+<a class="anchor" id="aab9899263ada770283136d01985a524f"></a>
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+          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>* arm_rfft_instance_q15::pTwiddleAReal</td>
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 <p>points to the real twiddle factor table. </p>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga053450cc600a55410ba5b5605e96245d">arm_rfft_init_q15()</a>, and <a class="el" href="group__RealFFT.html#ga00e615f5db21736ad5b27fb6146f3fc5">arm_rfft_q15()</a>.</p>
-
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+          <td class="memname">const <a class="el" href="arm__math_8h.html#ab5a8fb21a5b3b983d5f54f31614052ea">q15_t</a>* arm_rfft_instance_q15::pTwiddleBReal</td>
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 <p>points to the imag twiddle factor table. </p>
 
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 <p>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. </p>
 
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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     [ "pCfft", "structarm__rfft__instance__q15.html#a4329c15b056444746d37ff082a24d31a", null ],
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-    [ "pTwiddleBReal", "structarm__rfft__instance__q15.html#a937d815022adc557b435ba8c6cd58b0d", null ],
+    [ "pTwiddleAReal", "structarm__rfft__instance__q15.html#aab9899263ada770283136d01985a524f", null ],
+    [ "pTwiddleBReal", "structarm__rfft__instance__q15.html#a5b288a44a0ce0154b1fed9386627c4b5", null ],
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index 44a91da..4f3febb 100644
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-DSP
-   &#160;<span id="projectnumber">Version 1.5.2</span>
+   &#160;<span id="projectnumber">Version 1.7.0</span>
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    <div id="projectbrief">CMSIS DSP Software Library</div>
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-<tr class="memitem:a2a0c944e66bab92fcbe19d1c29153250"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__rfft__instance__q31.html#a2a0c944e66bab92fcbe19d1c29153250">pTwiddleAReal</a></td></tr>
-<tr class="separator:a2a0c944e66bab92fcbe19d1c29153250"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ae5070be4c2e0327e618f5e1f4c5b9d80"><td class="memItemLeft" align="right" valign="top"><a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__rfft__instance__q31.html#ae5070be4c2e0327e618f5e1f4c5b9d80">pTwiddleBReal</a></td></tr>
-<tr class="separator:ae5070be4c2e0327e618f5e1f4c5b9d80"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a04eb56288cddc9a366d3af02c3f86792"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__rfft__instance__q31.html#a04eb56288cddc9a366d3af02c3f86792">pTwiddleAReal</a></td></tr>
+<tr class="separator:a04eb56288cddc9a366d3af02c3f86792"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a7d57376f7be4945011d3a4d5b1f646b8"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__rfft__instance__q31.html#a7d57376f7be4945011d3a4d5b1f646b8">pTwiddleBReal</a></td></tr>
+<tr class="separator:a7d57376f7be4945011d3a4d5b1f646b8"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a8fe10d425b59e096c23aa4bb5caa1974"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="structarm__cfft__instance__q31.html">arm_cfft_instance_q31</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structarm__rfft__instance__q31.html#a8fe10d425b59e096c23aa4bb5caa1974">pCfft</a></td></tr>
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 <p>flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. </p>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga5abde938abbe72e95c5bab080eb33c45">arm_rfft_init_q31()</a>, and <a class="el" href="group__RealFFT.html#gabaeab5646aeea9844e6d42ca8c73fe3a">arm_rfft_q31()</a>.</p>
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 <p>length of the real FFT. </p>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga5abde938abbe72e95c5bab080eb33c45">arm_rfft_init_q31()</a>, and <a class="el" href="group__RealFFT.html#gabaeab5646aeea9844e6d42ca8c73fe3a">arm_rfft_q31()</a>.</p>
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 <p>flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. </p>
 
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 <p>points to the complex FFT instance. </p>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga5abde938abbe72e95c5bab080eb33c45">arm_rfft_init_q31()</a>, and <a class="el" href="group__RealFFT.html#gabaeab5646aeea9844e6d42ca8c73fe3a">arm_rfft_q31()</a>.</p>
-
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 </div>
-<a class="anchor" id="a2a0c944e66bab92fcbe19d1c29153250"></a>
+<a class="anchor" id="a04eb56288cddc9a366d3af02c3f86792"></a>
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+          <td class="memname">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>* arm_rfft_instance_q31::pTwiddleAReal</td>
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 <p>points to the real twiddle factor table. </p>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga5abde938abbe72e95c5bab080eb33c45">arm_rfft_init_q31()</a>, and <a class="el" href="group__RealFFT.html#gabaeab5646aeea9844e6d42ca8c73fe3a">arm_rfft_q31()</a>.</p>
-
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-<a class="anchor" id="ae5070be4c2e0327e618f5e1f4c5b9d80"></a>
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+          <td class="memname">const <a class="el" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0">q31_t</a>* arm_rfft_instance_q31::pTwiddleBReal</td>
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 <p>points to the imag twiddle factor table. </p>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga5abde938abbe72e95c5bab080eb33c45">arm_rfft_init_q31()</a>, and <a class="el" href="group__RealFFT.html#gabaeab5646aeea9844e6d42ca8c73fe3a">arm_rfft_q31()</a>.</p>
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@@ -242,8 +230,6 @@
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 <p>twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. </p>
 
-<p>Referenced by <a class="el" href="group__RealFFT.html#ga5abde938abbe72e95c5bab080eb33c45">arm_rfft_init_q31()</a>, and <a class="el" href="group__RealFFT.html#gabaeab5646aeea9844e6d42ca8c73fe3a">arm_rfft_q31()</a>.</p>
-
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@@ -252,7 +238,7 @@
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   <ul>
     <li class="navelem"><a class="el" href="structarm__rfft__instance__q31.html">arm_rfft_instance_q31</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:22 for CMSIS-DSP by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:40 for CMSIS-DSP Version 1.7.0 by Arm Ltd. All rights reserved.
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index ac261d5..c545040 100644
--- a/docs/DSP/html/structarm__rfft__instance__q31.js
+++ b/docs/DSP/html/structarm__rfft__instance__q31.js
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     [ "pCfft", "structarm__rfft__instance__q31.html#a8fe10d425b59e096c23aa4bb5caa1974", null ],
-    [ "pTwiddleAReal", "structarm__rfft__instance__q31.html#a2a0c944e66bab92fcbe19d1c29153250", null ],
-    [ "pTwiddleBReal", "structarm__rfft__instance__q31.html#ae5070be4c2e0327e618f5e1f4c5b9d80", null ],
+    [ "pTwiddleAReal", "structarm__rfft__instance__q31.html#a04eb56288cddc9a366d3af02c3f86792", null ],
+    [ "pTwiddleBReal", "structarm__rfft__instance__q31.html#a7d57376f7be4945011d3a4d5b1f646b8", null ],
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
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+   &#160;<span id="projectnumber">Version 2.7.1</span>
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    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
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index 40bf8d3..bab0dbd 100644
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@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
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-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
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-   &#160;<span id="projectnumber">Version 2.6.0</span>
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    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
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index 353a2ee..d911a1e 100644
--- a/docs/Driver/html/Driver__ETH_8h.html
+++ b/docs/Driver/html/Driver__ETH_8h.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -242,7 +242,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_7151b3cc910409bb744bd274374c738d.html">Driver</a></li><li class="navelem"><a class="el" href="dir_9c39448ea46a8e15f1aabc7dec307fcf.html">Include</a></li><li class="navelem"><a class="el" href="Driver__ETH_8h.html">Driver_ETH.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__ETH__MAC_8c.html b/docs/Driver/html/Driver__ETH__MAC_8c.html
index 2b5e352..44154fe 100644
--- a/docs/Driver/html/Driver__ETH__MAC_8c.html
+++ b/docs/Driver/html/Driver__ETH__MAC_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -177,7 +177,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_041cc4048c8229d7729b502626227b03.html">src</a></li><li class="navelem"><a class="el" href="Driver__ETH__MAC_8c.html">Driver_ETH_MAC.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__ETH__MAC_8h.html b/docs/Driver/html/Driver__ETH__MAC_8h.html
index 2840b46..29a14a1 100644
--- a/docs/Driver/html/Driver__ETH__MAC_8h.html
+++ b/docs/Driver/html/Driver__ETH__MAC_8h.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -349,7 +349,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_7151b3cc910409bb744bd274374c738d.html">Driver</a></li><li class="navelem"><a class="el" href="dir_9c39448ea46a8e15f1aabc7dec307fcf.html">Include</a></li><li class="navelem"><a class="el" href="Driver__ETH__MAC_8h.html">Driver_ETH_MAC.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__ETH__PHY_8c.html b/docs/Driver/html/Driver__ETH__PHY_8c.html
index e3d7fbe..fd3ed69 100644
--- a/docs/Driver/html/Driver__ETH__PHY_8c.html
+++ b/docs/Driver/html/Driver__ETH__PHY_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -147,7 +147,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_041cc4048c8229d7729b502626227b03.html">src</a></li><li class="navelem"><a class="el" href="Driver__ETH__PHY_8c.html">Driver_ETH_PHY.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__ETH__PHY_8h.html b/docs/Driver/html/Driver__ETH__PHY_8h.html
index 202dc57..16ff61f 100644
--- a/docs/Driver/html/Driver__ETH__PHY_8h.html
+++ b/docs/Driver/html/Driver__ETH__PHY_8h.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -271,7 +271,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_7151b3cc910409bb744bd274374c738d.html">Driver</a></li><li class="navelem"><a class="el" href="dir_9c39448ea46a8e15f1aabc7dec307fcf.html">Include</a></li><li class="navelem"><a class="el" href="Driver__ETH__PHY_8h.html">Driver_ETH_PHY.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__Flash_8c.html b/docs/Driver/html/Driver__Flash_8c.html
index 9d32824..0b0ee2c 100644
--- a/docs/Driver/html/Driver__Flash_8c.html
+++ b/docs/Driver/html/Driver__Flash_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -159,7 +159,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_041cc4048c8229d7729b502626227b03.html">src</a></li><li class="navelem"><a class="el" href="Driver__Flash_8c.html">Driver_Flash.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__Flash_8h.html b/docs/Driver/html/Driver__Flash_8h.html
index 67ea671..271af97 100644
--- a/docs/Driver/html/Driver__Flash_8h.html
+++ b/docs/Driver/html/Driver__Flash_8h.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -234,7 +234,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_7151b3cc910409bb744bd274374c738d.html">Driver</a></li><li class="navelem"><a class="el" href="dir_9c39448ea46a8e15f1aabc7dec307fcf.html">Include</a></li><li class="navelem"><a class="el" href="Driver__Flash_8h.html">Driver_Flash.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__I2C_8c.html b/docs/Driver/html/Driver__I2C_8c.html
index 16654e3..2399ec6 100644
--- a/docs/Driver/html/Driver__I2C_8c.html
+++ b/docs/Driver/html/Driver__I2C_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -162,7 +162,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_041cc4048c8229d7729b502626227b03.html">src</a></li><li class="navelem"><a class="el" href="Driver__I2C_8c.html">Driver_I2C.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__I2C_8h.html b/docs/Driver/html/Driver__I2C_8h.html
index 30f46a9..e822d33 100644
--- a/docs/Driver/html/Driver__I2C_8h.html
+++ b/docs/Driver/html/Driver__I2C_8h.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -215,7 +215,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_7151b3cc910409bb744bd274374c738d.html">Driver</a></li><li class="navelem"><a class="el" href="dir_9c39448ea46a8e15f1aabc7dec307fcf.html">Include</a></li><li class="navelem"><a class="el" href="Driver__I2C_8h.html">Driver_I2C.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__MCI_8c.html b/docs/Driver/html/Driver__MCI_8c.html
index dba56be..2db966d 100644
--- a/docs/Driver/html/Driver__MCI_8c.html
+++ b/docs/Driver/html/Driver__MCI_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -165,7 +165,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_041cc4048c8229d7729b502626227b03.html">src</a></li><li class="navelem"><a class="el" href="Driver__MCI_8c.html">Driver_MCI.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__MCI_8h.html b/docs/Driver/html/Driver__MCI_8h.html
index c2a9035..96c1187 100644
--- a/docs/Driver/html/Driver__MCI_8h.html
+++ b/docs/Driver/html/Driver__MCI_8h.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -455,7 +455,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_7151b3cc910409bb744bd274374c738d.html">Driver</a></li><li class="navelem"><a class="el" href="dir_9c39448ea46a8e15f1aabc7dec307fcf.html">Include</a></li><li class="navelem"><a class="el" href="Driver__MCI_8h.html">Driver_MCI.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__NAND_8c.html b/docs/Driver/html/Driver__NAND_8c.html
index c00da8c..e5c61e8 100644
--- a/docs/Driver/html/Driver__NAND_8c.html
+++ b/docs/Driver/html/Driver__NAND_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -180,7 +180,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_041cc4048c8229d7729b502626227b03.html">src</a></li><li class="navelem"><a class="el" href="Driver__NAND_8c.html">Driver_NAND.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__NAND_8h.html b/docs/Driver/html/Driver__NAND_8h.html
index 1160716..6eea164 100644
--- a/docs/Driver/html/Driver__NAND_8h.html
+++ b/docs/Driver/html/Driver__NAND_8h.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -882,7 +882,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_7151b3cc910409bb744bd274374c738d.html">Driver</a></li><li class="navelem"><a class="el" href="dir_9c39448ea46a8e15f1aabc7dec307fcf.html">Include</a></li><li class="navelem"><a class="el" href="Driver__NAND_8h.html">Driver_NAND.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__SAI_8c.html b/docs/Driver/html/Driver__SAI_8c.html
index 8d5e05f..69732fc 100644
--- a/docs/Driver/html/Driver__SAI_8c.html
+++ b/docs/Driver/html/Driver__SAI_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -159,7 +159,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_041cc4048c8229d7729b502626227b03.html">src</a></li><li class="navelem"><a class="el" href="Driver__SAI_8c.html">Driver_SAI.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__SAI_8h.html b/docs/Driver/html/Driver__SAI_8h.html
index aa09ad3..9ca1995 100644
--- a/docs/Driver/html/Driver__SAI_8h.html
+++ b/docs/Driver/html/Driver__SAI_8h.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -228,7 +228,7 @@
 <tr class="memitem:a14371d4016e5863aa2033f47c213e271"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__SAI_8h.html#a14371d4016e5863aa2033f47c213e271">ARM_SAI_COMPANDING_Msk</a>&#160;&#160;&#160;(3U &lt;&lt; ARM_SAI_COMPANDING_Pos)</td></tr>
 <tr class="separator:a14371d4016e5863aa2033f47c213e271"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga185919d553cf9204e514136eb375ef08"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sai__companding__control.html#ga185919d553cf9204e514136eb375ef08">ARM_SAI_COMPANDING_NONE</a>&#160;&#160;&#160;(0U &lt;&lt; ARM_SAI_COMPANDING_Pos)</td></tr>
-<tr class="memdesc:ga185919d553cf9204e514136eb375ef08"><td class="mdescLeft">&#160;</td><td class="mdescRight">No compading (default)  <a href="group__sai__companding__control.html#ga185919d553cf9204e514136eb375ef08">More...</a><br/></td></tr>
+<tr class="memdesc:ga185919d553cf9204e514136eb375ef08"><td class="mdescLeft">&#160;</td><td class="mdescRight">No companding (default)  <a href="group__sai__companding__control.html#ga185919d553cf9204e514136eb375ef08">More...</a><br/></td></tr>
 <tr class="separator:ga185919d553cf9204e514136eb375ef08"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gacfd6c74148c0ae90aa6eaaf8e69da3a9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sai__companding__control.html#gacfd6c74148c0ae90aa6eaaf8e69da3a9">ARM_SAI_COMPANDING_A_LAW</a>&#160;&#160;&#160;(2U &lt;&lt; ARM_SAI_COMPANDING_Pos)</td></tr>
 <tr class="memdesc:gacfd6c74148c0ae90aa6eaaf8e69da3a9"><td class="mdescLeft">&#160;</td><td class="mdescRight">A-Law companding.  <a href="group__sai__companding__control.html#gacfd6c74148c0ae90aa6eaaf8e69da3a9">More...</a><br/></td></tr>
@@ -801,7 +801,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_7151b3cc910409bb744bd274374c738d.html">Driver</a></li><li class="navelem"><a class="el" href="dir_9c39448ea46a8e15f1aabc7dec307fcf.html">Include</a></li><li class="navelem"><a class="el" href="Driver__SAI_8h.html">Driver_SAI.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__SPI_8c.html b/docs/Driver/html/Driver__SPI_8c.html
index d5e51cf..8965cd9 100644
--- a/docs/Driver/html/Driver__SPI_8c.html
+++ b/docs/Driver/html/Driver__SPI_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -159,7 +159,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_041cc4048c8229d7729b502626227b03.html">src</a></li><li class="navelem"><a class="el" href="Driver__SPI_8c.html">Driver_SPI.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__SPI_8h.html b/docs/Driver/html/Driver__SPI_8h.html
index 52405ad..fbcc5b5 100644
--- a/docs/Driver/html/Driver__SPI_8h.html
+++ b/docs/Driver/html/Driver__SPI_8h.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -459,7 +459,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_7151b3cc910409bb744bd274374c738d.html">Driver</a></li><li class="navelem"><a class="el" href="dir_9c39448ea46a8e15f1aabc7dec307fcf.html">Include</a></li><li class="navelem"><a class="el" href="Driver__SPI_8h.html">Driver_SPI.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__Storage_8c.html b/docs/Driver/html/Driver__Storage_8c.html
index 696b4d1..814d7b6 100644
--- a/docs/Driver/html/Driver__Storage_8c.html
+++ b/docs/Driver/html/Driver__Storage_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -165,7 +165,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_041cc4048c8229d7729b502626227b03.html">src</a></li><li class="navelem"><a class="el" href="Driver__Storage_8c.html">Driver_Storage.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__Storage_8h.html b/docs/Driver/html/Driver__Storage_8h.html
index 9da2db5..dab525a 100644
--- a/docs/Driver/html/Driver__Storage_8h.html
+++ b/docs/Driver/html/Driver__Storage_8h.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -590,7 +590,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_7151b3cc910409bb744bd274374c738d.html">Driver</a></li><li class="navelem"><a class="el" href="dir_9c39448ea46a8e15f1aabc7dec307fcf.html">Include</a></li><li class="navelem"><a class="el" href="Driver__Storage_8h.html">Driver_Storage.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__USART_8c.html b/docs/Driver/html/Driver__USART_8c.html
index c2cdf82..6282807 100644
--- a/docs/Driver/html/Driver__USART_8c.html
+++ b/docs/Driver/html/Driver__USART_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -168,7 +168,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_041cc4048c8229d7729b502626227b03.html">src</a></li><li class="navelem"><a class="el" href="Driver__USART_8c.html">Driver_USART.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__USART_8h.html b/docs/Driver/html/Driver__USART_8h.html
index ebad428..bf16cc4 100644
--- a/docs/Driver/html/Driver__USART_8h.html
+++ b/docs/Driver/html/Driver__USART_8h.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -550,7 +550,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_7151b3cc910409bb744bd274374c738d.html">Driver</a></li><li class="navelem"><a class="el" href="dir_9c39448ea46a8e15f1aabc7dec307fcf.html">Include</a></li><li class="navelem"><a class="el" href="Driver__USART_8h.html">Driver_USART.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__USBD_8c.html b/docs/Driver/html/Driver__USBD_8c.html
index 398887b..71c686d 100644
--- a/docs/Driver/html/Driver__USBD_8c.html
+++ b/docs/Driver/html/Driver__USBD_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -183,7 +183,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_041cc4048c8229d7729b502626227b03.html">src</a></li><li class="navelem"><a class="el" href="Driver__USBD_8c.html">Driver_USBD.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__USBD_8h.html b/docs/Driver/html/Driver__USBD_8h.html
index f11cbdb..7ed3e16 100644
--- a/docs/Driver/html/Driver__USBD_8h.html
+++ b/docs/Driver/html/Driver__USBD_8h.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -188,7 +188,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_7151b3cc910409bb744bd274374c738d.html">Driver</a></li><li class="navelem"><a class="el" href="dir_9c39448ea46a8e15f1aabc7dec307fcf.html">Include</a></li><li class="navelem"><a class="el" href="Driver__USBD_8h.html">Driver_USBD.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__USBH_8c.html b/docs/Driver/html/Driver__USBH_8c.html
index 1980888..b3ae7ad 100644
--- a/docs/Driver/html/Driver__USBH_8c.html
+++ b/docs/Driver/html/Driver__USBH_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -204,7 +204,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_041cc4048c8229d7729b502626227b03.html">src</a></li><li class="navelem"><a class="el" href="Driver__USBH_8c.html">Driver_USBH.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__USBH_8h.html b/docs/Driver/html/Driver__USBH_8h.html
index 160dde2..24ebda0 100644
--- a/docs/Driver/html/Driver__USBH_8h.html
+++ b/docs/Driver/html/Driver__USBH_8h.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -363,7 +363,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_7151b3cc910409bb744bd274374c738d.html">Driver</a></li><li class="navelem"><a class="el" href="dir_9c39448ea46a8e15f1aabc7dec307fcf.html">Include</a></li><li class="navelem"><a class="el" href="Driver__USBH_8h.html">Driver_USBH.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__USB_8c.html b/docs/Driver/html/Driver__USB_8c.html
index 4c0ed73..71897ab 100644
--- a/docs/Driver/html/Driver__USB_8c.html
+++ b/docs/Driver/html/Driver__USB_8c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_041cc4048c8229d7729b502626227b03.html">src</a></li><li class="navelem"><a class="el" href="Driver__USB_8c.html">Driver_USB.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__USB_8h.html b/docs/Driver/html/Driver__USB_8h.html
index 979a090..410742f 100644
--- a/docs/Driver/html/Driver__USB_8h.html
+++ b/docs/Driver/html/Driver__USB_8h.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -608,7 +608,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_7151b3cc910409bb744bd274374c738d.html">Driver</a></li><li class="navelem"><a class="el" href="dir_9c39448ea46a8e15f1aabc7dec307fcf.html">Include</a></li><li class="navelem"><a class="el" href="Driver__USB_8h.html">Driver_USB.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/Driver__WiFi_8c.html b/docs/Driver/html/Driver__WiFi_8c.html
new file mode 100644
index 0000000..de88e93
--- /dev/null
+++ b/docs/Driver/html/Driver__WiFi_8c.html
@@ -0,0 +1,237 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>Driver_WiFi.c File Reference</title>
+<title>CMSIS-Driver: Driver_WiFi.c File Reference</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Driver
+   &#160;<span id="projectnumber">Version 2.7.1</span>
+   </div>
+   <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li><a href="modules.html"><span>Reference</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
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+<a href="#func-members">Functions</a>  </div>
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+<div class="title">Driver_WiFi.c File Reference</div>  </div>
+</div><!--header-->
+<div class="contents">
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
+Functions</h2></td></tr>
+<tr class="memitem:gad349fb835926a508e2a33501c0dff6a2"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__common__drv__gr.html#structARM__DRIVER__VERSION">ARM_DRIVER_VERSION</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__control__gr.html#gad349fb835926a508e2a33501c0dff6a2">ARM_WIFI_GetVersion</a> (void)</td></tr>
+<tr class="memdesc:gad349fb835926a508e2a33501c0dff6a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get driver version.  <a href="group__wifi__control__gr.html#gad349fb835926a508e2a33501c0dff6a2">More...</a><br/></td></tr>
+<tr class="separator:gad349fb835926a508e2a33501c0dff6a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga3496996799a4762e9958a8b6af683b4b"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__wifi__control__gr.html#structARM__WIFI__CAPABILITIES">ARM_WIFI_CAPABILITIES</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__control__gr.html#ga3496996799a4762e9958a8b6af683b4b">ARM_WIFI_GetCapabilities</a> (void)</td></tr>
+<tr class="memdesc:ga3496996799a4762e9958a8b6af683b4b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get driver capabilities.  <a href="group__wifi__control__gr.html#ga3496996799a4762e9958a8b6af683b4b">More...</a><br/></td></tr>
+<tr class="separator:ga3496996799a4762e9958a8b6af683b4b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gadc4b9aaae0fdf7d489b1d81e3c2f3474"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__control__gr.html#gadc4b9aaae0fdf7d489b1d81e3c2f3474">ARM_WIFI_Initialize</a> (<a class="el" href="group__wifi__control__gr.html#gac0f04bbdd431c87a680626154c3e0a41">ARM_WIFI_SignalEvent_t</a> cb_event)</td></tr>
+<tr class="memdesc:gadc4b9aaae0fdf7d489b1d81e3c2f3474"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize WiFi Module.  <a href="group__wifi__control__gr.html#gadc4b9aaae0fdf7d489b1d81e3c2f3474">More...</a><br/></td></tr>
+<tr class="separator:gadc4b9aaae0fdf7d489b1d81e3c2f3474"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae1e488d4ecc365e30712e6b1711a9c5d"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__control__gr.html#gae1e488d4ecc365e30712e6b1711a9c5d">ARM_WIFI_Uninitialize</a> (void)</td></tr>
+<tr class="memdesc:gae1e488d4ecc365e30712e6b1711a9c5d"><td class="mdescLeft">&#160;</td><td class="mdescRight">De-initialize WiFi Module.  <a href="group__wifi__control__gr.html#gae1e488d4ecc365e30712e6b1711a9c5d">More...</a><br/></td></tr>
+<tr class="separator:gae1e488d4ecc365e30712e6b1711a9c5d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga48d4cb7c00e96d2b928cc4468d4e623b"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__control__gr.html#ga48d4cb7c00e96d2b928cc4468d4e623b">ARM_WIFI_PowerControl</a> (<a class="el" href="group__common__drv__gr.html#ga47d6d7c31f88f3b8ae4aaf9d8444afa5">ARM_POWER_STATE</a> state)</td></tr>
+<tr class="memdesc:ga48d4cb7c00e96d2b928cc4468d4e623b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Control WiFi Module Power.  <a href="group__wifi__control__gr.html#ga48d4cb7c00e96d2b928cc4468d4e623b">More...</a><br/></td></tr>
+<tr class="separator:ga48d4cb7c00e96d2b928cc4468d4e623b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gabdc4c9966a3f22ac6e53119e71e67579"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__control__gr.html#gabdc4c9966a3f22ac6e53119e71e67579">ARM_WIFI_GetModuleInfo</a> (char *module_info, uint32_t max_len)</td></tr>
+<tr class="memdesc:gabdc4c9966a3f22ac6e53119e71e67579"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Module information.  <a href="group__wifi__control__gr.html#gabdc4c9966a3f22ac6e53119e71e67579">More...</a><br/></td></tr>
+<tr class="separator:gabdc4c9966a3f22ac6e53119e71e67579"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0c8243dee4bb161132692516f048bcec"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__control__gr.html#ga0c8243dee4bb161132692516f048bcec">ARM_WIFI_SignalEvent</a> (uint32_t event, void *arg)</td></tr>
+<tr class="memdesc:ga0c8243dee4bb161132692516f048bcec"><td class="mdescLeft">&#160;</td><td class="mdescRight">Signal WiFi Events.  <a href="group__wifi__control__gr.html#ga0c8243dee4bb161132692516f048bcec">More...</a><br/></td></tr>
+<tr class="separator:ga0c8243dee4bb161132692516f048bcec"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf38a7aeb470eec596febc850c8b69ccf"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__management__gr.html#gaf38a7aeb470eec596febc850c8b69ccf">ARM_WIFI_SetOption</a> (uint32_t interface, uint32_t option, const void *data, uint32_t len)</td></tr>
+<tr class="memdesc:gaf38a7aeb470eec596febc850c8b69ccf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set WiFi Module Options.  <a href="group__wifi__management__gr.html#gaf38a7aeb470eec596febc850c8b69ccf">More...</a><br/></td></tr>
+<tr class="separator:gaf38a7aeb470eec596febc850c8b69ccf"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga56910984e5068f6502e12f72e1f80edf"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__management__gr.html#ga56910984e5068f6502e12f72e1f80edf">ARM_WIFI_GetOption</a> (uint32_t interface, uint32_t option, void *data, uint32_t *len)</td></tr>
+<tr class="memdesc:ga56910984e5068f6502e12f72e1f80edf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get WiFi Module Options.  <a href="group__wifi__management__gr.html#ga56910984e5068f6502e12f72e1f80edf">More...</a><br/></td></tr>
+<tr class="separator:ga56910984e5068f6502e12f72e1f80edf"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga856972af36e51cf0c4112029332d529f"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__management__gr.html#ga856972af36e51cf0c4112029332d529f">ARM_WIFI_Scan</a> (<a class="el" href="group__wifi__management__gr.html#structARM__WIFI__SCAN__INFO__t">ARM_WIFI_SCAN_INFO_t</a> scan_info[], uint32_t max_num)</td></tr>
+<tr class="memdesc:ga856972af36e51cf0c4112029332d529f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Scan for available networks in range.  <a href="group__wifi__management__gr.html#ga856972af36e51cf0c4112029332d529f">More...</a><br/></td></tr>
+<tr class="separator:ga856972af36e51cf0c4112029332d529f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga7d545744a848702d75043de30ea5260a"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__management__gr.html#ga7d545744a848702d75043de30ea5260a">ARM_WIFI_Activate</a> (uint32_t interface, <a class="el" href="group__wifi__management__gr.html#structARM__WIFI__CONFIG__t">ARM_WIFI_CONFIG_t</a> *config)</td></tr>
+<tr class="memdesc:ga7d545744a848702d75043de30ea5260a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Activate interface (Connect to a wireless network or activate an access point).  <a href="group__wifi__management__gr.html#ga7d545744a848702d75043de30ea5260a">More...</a><br/></td></tr>
+<tr class="separator:ga7d545744a848702d75043de30ea5260a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1842127df60067481ac2f40d19153e3e"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__management__gr.html#ga1842127df60067481ac2f40d19153e3e">ARM_WIFI_Deactivate</a> (uint32_t interface)</td></tr>
+<tr class="memdesc:ga1842127df60067481ac2f40d19153e3e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Deactivate interface (Disconnect from a wireless network or deactivate an access point).  <a href="group__wifi__management__gr.html#ga1842127df60067481ac2f40d19153e3e">More...</a><br/></td></tr>
+<tr class="separator:ga1842127df60067481ac2f40d19153e3e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga3d641222defb5f52f6dae4ce1d540d0f"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__management__gr.html#ga3d641222defb5f52f6dae4ce1d540d0f">ARM_WIFI_IsConnected</a> (void)</td></tr>
+<tr class="memdesc:ga3d641222defb5f52f6dae4ce1d540d0f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get station connection status.  <a href="group__wifi__management__gr.html#ga3d641222defb5f52f6dae4ce1d540d0f">More...</a><br/></td></tr>
+<tr class="separator:ga3d641222defb5f52f6dae4ce1d540d0f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga29a5b0072470a8c56f0939f3c97ed08e"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__management__gr.html#ga29a5b0072470a8c56f0939f3c97ed08e">ARM_WIFI_GetNetInfo</a> (<a class="el" href="group__wifi__management__gr.html#structARM__WIFI__NET__INFO__t">ARM_WIFI_NET_INFO_t</a> *net_info)</td></tr>
+<tr class="memdesc:ga29a5b0072470a8c56f0939f3c97ed08e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get station Network Information.  <a href="group__wifi__management__gr.html#ga29a5b0072470a8c56f0939f3c97ed08e">More...</a><br/></td></tr>
+<tr class="separator:ga29a5b0072470a8c56f0939f3c97ed08e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga678fa1aa06ca6aaa67c7eb7a7660730e"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__bypass__gr.html#ga678fa1aa06ca6aaa67c7eb7a7660730e">ARM_WIFI_BypassControl</a> (uint32_t interface, uint32_t mode)</td></tr>
+<tr class="memdesc:ga678fa1aa06ca6aaa67c7eb7a7660730e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable or disable bypass (pass-through) mode. Transmit and receive Ethernet frames (IP layer bypassed and WiFi/Ethernet translation).  <a href="group__wifi__bypass__gr.html#ga678fa1aa06ca6aaa67c7eb7a7660730e">More...</a><br/></td></tr>
+<tr class="separator:ga678fa1aa06ca6aaa67c7eb7a7660730e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac1da4619feaf62d0cc90cfe44642d16b"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__bypass__gr.html#gac1da4619feaf62d0cc90cfe44642d16b">ARM_WIFI_EthSendFrame</a> (uint32_t interface, const uint8_t *frame, uint32_t len)</td></tr>
+<tr class="memdesc:gac1da4619feaf62d0cc90cfe44642d16b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Send Ethernet frame (in bypass mode only).  <a href="group__wifi__bypass__gr.html#gac1da4619feaf62d0cc90cfe44642d16b">More...</a><br/></td></tr>
+<tr class="separator:gac1da4619feaf62d0cc90cfe44642d16b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1dbeb5528095af31a60560e0c48321d4"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__bypass__gr.html#ga1dbeb5528095af31a60560e0c48321d4">ARM_WIFI_EthReadFrame</a> (uint32_t interface, uint8_t *frame, uint32_t len)</td></tr>
+<tr class="memdesc:ga1dbeb5528095af31a60560e0c48321d4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read data of received Ethernet frame (in bypass mode only).  <a href="group__wifi__bypass__gr.html#ga1dbeb5528095af31a60560e0c48321d4">More...</a><br/></td></tr>
+<tr class="separator:ga1dbeb5528095af31a60560e0c48321d4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab67442ff061d0c4311a7046bce8d0cd1"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__bypass__gr.html#gab67442ff061d0c4311a7046bce8d0cd1">ARM_WIFI_EthGetRxFrameSize</a> (uint32_t interface)</td></tr>
+<tr class="memdesc:gab67442ff061d0c4311a7046bce8d0cd1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get size of received Ethernet frame (in bypass mode only).  <a href="group__wifi__bypass__gr.html#gab67442ff061d0c4311a7046bce8d0cd1">More...</a><br/></td></tr>
+<tr class="separator:gab67442ff061d0c4311a7046bce8d0cd1"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1433b297315ab394f1544a18548ffcc6"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#ga1433b297315ab394f1544a18548ffcc6">ARM_WIFI_SocketCreate</a> (int32_t af, int32_t type, int32_t protocol)</td></tr>
+<tr class="memdesc:ga1433b297315ab394f1544a18548ffcc6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Create a communication socket.  <a href="group__wifi__socket__gr.html#ga1433b297315ab394f1544a18548ffcc6">More...</a><br/></td></tr>
+<tr class="separator:ga1433b297315ab394f1544a18548ffcc6"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae69f7822b658765f1cd3f74e9a50c246"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#gae69f7822b658765f1cd3f74e9a50c246">ARM_WIFI_SocketBind</a> (int32_t socket, const uint8_t *ip, uint32_t ip_len, uint16_t port)</td></tr>
+<tr class="memdesc:gae69f7822b658765f1cd3f74e9a50c246"><td class="mdescLeft">&#160;</td><td class="mdescRight">Assign a local address to a socket.  <a href="group__wifi__socket__gr.html#gae69f7822b658765f1cd3f74e9a50c246">More...</a><br/></td></tr>
+<tr class="separator:gae69f7822b658765f1cd3f74e9a50c246"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4929aab257781dcaae7197f917991779"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#ga4929aab257781dcaae7197f917991779">ARM_WIFI_SocketListen</a> (int32_t socket, int32_t backlog)</td></tr>
+<tr class="memdesc:ga4929aab257781dcaae7197f917991779"><td class="mdescLeft">&#160;</td><td class="mdescRight">Listen for socket connections.  <a href="group__wifi__socket__gr.html#ga4929aab257781dcaae7197f917991779">More...</a><br/></td></tr>
+<tr class="separator:ga4929aab257781dcaae7197f917991779"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga24e6a015e519373c3f108cc5aa764ef8"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#ga24e6a015e519373c3f108cc5aa764ef8">ARM_WIFI_SocketAccept</a> (int32_t socket, uint8_t *ip, uint32_t *ip_len, uint16_t *port)</td></tr>
+<tr class="memdesc:ga24e6a015e519373c3f108cc5aa764ef8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Accept a new connection on a socket.  <a href="group__wifi__socket__gr.html#ga24e6a015e519373c3f108cc5aa764ef8">More...</a><br/></td></tr>
+<tr class="separator:ga24e6a015e519373c3f108cc5aa764ef8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac0f189afbd35914d4c85e77b40672b16"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#gac0f189afbd35914d4c85e77b40672b16">ARM_WIFI_SocketConnect</a> (int32_t socket, const uint8_t *ip, uint32_t ip_len, uint16_t port)</td></tr>
+<tr class="memdesc:gac0f189afbd35914d4c85e77b40672b16"><td class="mdescLeft">&#160;</td><td class="mdescRight">Connect a socket to a remote host.  <a href="group__wifi__socket__gr.html#gac0f189afbd35914d4c85e77b40672b16">More...</a><br/></td></tr>
+<tr class="separator:gac0f189afbd35914d4c85e77b40672b16"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaecc9ba19491ed00c27da3f5677895d48"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#gaecc9ba19491ed00c27da3f5677895d48">ARM_WIFI_SocketRecv</a> (int32_t socket, void *buf, uint32_t len)</td></tr>
+<tr class="memdesc:gaecc9ba19491ed00c27da3f5677895d48"><td class="mdescLeft">&#160;</td><td class="mdescRight">Receive data on a connected socket.  <a href="group__wifi__socket__gr.html#gaecc9ba19491ed00c27da3f5677895d48">More...</a><br/></td></tr>
+<tr class="separator:gaecc9ba19491ed00c27da3f5677895d48"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga2b15232d69f2ae8e189512d6c68c8a81"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#ga2b15232d69f2ae8e189512d6c68c8a81">ARM_WIFI_SocketRecvFrom</a> (int32_t socket, void *buf, uint32_t len, uint8_t *ip, uint32_t *ip_len, uint16_t *port)</td></tr>
+<tr class="memdesc:ga2b15232d69f2ae8e189512d6c68c8a81"><td class="mdescLeft">&#160;</td><td class="mdescRight">Receive data on a socket.  <a href="group__wifi__socket__gr.html#ga2b15232d69f2ae8e189512d6c68c8a81">More...</a><br/></td></tr>
+<tr class="separator:ga2b15232d69f2ae8e189512d6c68c8a81"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memdesc:gaee8615b026e8525fb21ca45ba3778ac8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Send data on a connected socket.  <a href="group__wifi__socket__gr.html#gaee8615b026e8525fb21ca45ba3778ac8">More...</a><br/></td></tr>
+<tr class="separator:gaee8615b026e8525fb21ca45ba3778ac8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5ddd3dd5f863b8392e4281dd48a28d28"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#ga5ddd3dd5f863b8392e4281dd48a28d28">ARM_WIFI_SocketSendTo</a> (int32_t socket, const void *buf, uint32_t len, const uint8_t *ip, uint32_t ip_len, uint16_t port)</td></tr>
+<tr class="memdesc:ga5ddd3dd5f863b8392e4281dd48a28d28"><td class="mdescLeft">&#160;</td><td class="mdescRight">Send data on a socket.  <a href="group__wifi__socket__gr.html#ga5ddd3dd5f863b8392e4281dd48a28d28">More...</a><br/></td></tr>
+<tr class="separator:ga5ddd3dd5f863b8392e4281dd48a28d28"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac187e418893de33817e4fcbdd85dbaee"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#gac187e418893de33817e4fcbdd85dbaee">ARM_WIFI_SocketGetSockName</a> (int32_t socket, uint8_t *ip, uint32_t *ip_len, uint16_t *port)</td></tr>
+<tr class="memdesc:gac187e418893de33817e4fcbdd85dbaee"><td class="mdescLeft">&#160;</td><td class="mdescRight">Retrieve local IP address and port of a socket.  <a href="group__wifi__socket__gr.html#gac187e418893de33817e4fcbdd85dbaee">More...</a><br/></td></tr>
+<tr class="separator:gac187e418893de33817e4fcbdd85dbaee"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa484a931d55d163477920bc865dd9220"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#gaa484a931d55d163477920bc865dd9220">ARM_WIFI_SocketGetPeerName</a> (int32_t socket, uint8_t *ip, uint32_t *ip_len, uint16_t *port)</td></tr>
+<tr class="memdesc:gaa484a931d55d163477920bc865dd9220"><td class="mdescLeft">&#160;</td><td class="mdescRight">Retrieve remote IP address and port of a socket.  <a href="group__wifi__socket__gr.html#gaa484a931d55d163477920bc865dd9220">More...</a><br/></td></tr>
+<tr class="separator:gaa484a931d55d163477920bc865dd9220"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga6d69360e9774937b7bdc03b45fbc9075"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#ga6d69360e9774937b7bdc03b45fbc9075">ARM_WIFI_SocketGetOpt</a> (int32_t socket, int32_t opt_id, void *opt_val, uint32_t *opt_len)</td></tr>
+<tr class="memdesc:ga6d69360e9774937b7bdc03b45fbc9075"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get socket option.  <a href="group__wifi__socket__gr.html#ga6d69360e9774937b7bdc03b45fbc9075">More...</a><br/></td></tr>
+<tr class="separator:ga6d69360e9774937b7bdc03b45fbc9075"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5de80d6729d9504a21dd5d31dc504017"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#ga5de80d6729d9504a21dd5d31dc504017">ARM_WIFI_SocketSetOpt</a> (int32_t socket, int32_t opt_id, const void *opt_val, uint32_t opt_len)</td></tr>
+<tr class="memdesc:ga5de80d6729d9504a21dd5d31dc504017"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set socket option.  <a href="group__wifi__socket__gr.html#ga5de80d6729d9504a21dd5d31dc504017">More...</a><br/></td></tr>
+<tr class="separator:ga5de80d6729d9504a21dd5d31dc504017"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga391464de71b6a5d300fda9434fe87a87"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#ga391464de71b6a5d300fda9434fe87a87">ARM_WIFI_SocketClose</a> (int32_t socket)</td></tr>
+<tr class="memdesc:ga391464de71b6a5d300fda9434fe87a87"><td class="mdescLeft">&#160;</td><td class="mdescRight">Close and release a socket.  <a href="group__wifi__socket__gr.html#ga391464de71b6a5d300fda9434fe87a87">More...</a><br/></td></tr>
+<tr class="separator:ga391464de71b6a5d300fda9434fe87a87"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0c37435c6abc68ee0f1f4357b503e0bf"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#ga0c37435c6abc68ee0f1f4357b503e0bf">ARM_WIFI_SocketGetHostByName</a> (const char *name, int32_t af, uint8_t *ip, uint32_t *ip_len)</td></tr>
+<tr class="memdesc:ga0c37435c6abc68ee0f1f4357b503e0bf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Retrieve host IP address from host name.  <a href="group__wifi__socket__gr.html#ga0c37435c6abc68ee0f1f4357b503e0bf">More...</a><br/></td></tr>
+<tr class="separator:ga0c37435c6abc68ee0f1f4357b503e0bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac7a8abb9e23f3f52dabce4153a53c1ca"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#gac7a8abb9e23f3f52dabce4153a53c1ca">ARM_WIFI_Ping</a> (const uint8_t *ip, uint32_t ip_len)</td></tr>
+<tr class="memdesc:gac7a8abb9e23f3f52dabce4153a53c1ca"><td class="mdescLeft">&#160;</td><td class="mdescRight">Probe remote host with Ping command.  <a href="group__wifi__socket__gr.html#gac7a8abb9e23f3f52dabce4153a53c1ca">More...</a><br/></td></tr>
+<tr class="separator:gac7a8abb9e23f3f52dabce4153a53c1ca"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="dir_041cc4048c8229d7729b502626227b03.html">src</a></li><li class="navelem"><a class="el" href="Driver__WiFi_8c.html">Driver_WiFi.c</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
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+<title>Driver_WiFi.h File Reference</title>
+<title>CMSIS-Driver: Driver_WiFi.h File Reference</title>
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+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Driver
+   &#160;<span id="projectnumber">Version 2.7.1</span>
+   </div>
+   <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
+  </td>
+ </tr>
+ </tbody>
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+</div>
+<!-- end header part -->
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+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
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+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
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+<a href="#nested-classes">Data Structures</a> &#124;
+<a href="#define-members">Macros</a> &#124;
+<a href="#typedef-members">Typedefs</a>  </div>
+  <div class="headertitle">
+<div class="title">Driver_WiFi.h File Reference</div>  </div>
+</div><!--header-->
+<div class="contents">
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a>
+Data Structures</h2></td></tr>
+<tr class="memitem:structARM__WIFI__CONFIG__t"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__management__gr.html#structARM__WIFI__CONFIG__t">ARM_WIFI_CONFIG_t</a></td></tr>
+<tr class="memdesc:structARM__WIFI__CONFIG__t"><td class="mdescLeft">&#160;</td><td class="mdescRight">WiFi Configuration.  <a href="group__wifi__management__gr.html#structARM__WIFI__CONFIG__t">More...</a><br/></td></tr>
+<tr class="separator:structARM__WIFI__CONFIG__t"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:structARM__WIFI__SCAN__INFO__t"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__management__gr.html#structARM__WIFI__SCAN__INFO__t">ARM_WIFI_SCAN_INFO_t</a></td></tr>
+<tr class="memdesc:structARM__WIFI__SCAN__INFO__t"><td class="mdescLeft">&#160;</td><td class="mdescRight">WiFi Scan Information.  <a href="group__wifi__management__gr.html#structARM__WIFI__SCAN__INFO__t">More...</a><br/></td></tr>
+<tr class="separator:structARM__WIFI__SCAN__INFO__t"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:structARM__WIFI__NET__INFO__t"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__management__gr.html#structARM__WIFI__NET__INFO__t">ARM_WIFI_NET_INFO_t</a></td></tr>
+<tr class="memdesc:structARM__WIFI__NET__INFO__t"><td class="mdescLeft">&#160;</td><td class="mdescRight">WiFi Network Information.  <a href="group__wifi__management__gr.html#structARM__WIFI__NET__INFO__t">More...</a><br/></td></tr>
+<tr class="separator:structARM__WIFI__NET__INFO__t"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:structARM__WIFI__CAPABILITIES"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__control__gr.html#structARM__WIFI__CAPABILITIES">ARM_WIFI_CAPABILITIES</a></td></tr>
+<tr class="memdesc:structARM__WIFI__CAPABILITIES"><td class="mdescLeft">&#160;</td><td class="mdescRight">WiFi Driver Capabilities.  <a href="group__wifi__control__gr.html#structARM__WIFI__CAPABILITIES">More...</a><br/></td></tr>
+<tr class="separator:structARM__WIFI__CAPABILITIES"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:structARM__DRIVER__WIFI"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a></td></tr>
+<tr class="memdesc:structARM__DRIVER__WIFI"><td class="mdescLeft">&#160;</td><td class="mdescRight">Access structure of the WiFi Driver.  <a href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">More...</a><br/></td></tr>
+<tr class="separator:structARM__DRIVER__WIFI"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table><table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
+Macros</h2></td></tr>
+<tr class="memitem:aa6a3705716b58d58fdbf72d8308f1383"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__WiFi_8h.html#aa6a3705716b58d58fdbf72d8308f1383">ARM_WIFI_API_VERSION</a>&#160;&#160;&#160;<a class="el" href="Driver__Common_8h.html#a43c7ca1eb0786d818624246c09932a74">ARM_DRIVER_VERSION_MAJOR_MINOR</a>(1,0)  /* API version */</td></tr>
+<tr class="separator:aa6a3705716b58d58fdbf72d8308f1383"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ad092e18422a937dd1837ed4fa5751499"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__WiFi_8h.html#ad092e18422a937dd1837ed4fa5751499">_ARM_Driver_WiFi_</a>(n)&#160;&#160;&#160;Driver_WiFi##n</td></tr>
+<tr class="separator:ad092e18422a937dd1837ed4fa5751499"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a035999f5a44af74ed7c6576feacaa2ce"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__WiFi_8h.html#a035999f5a44af74ed7c6576feacaa2ce">ARM_Driver_WiFi_</a>(n)&#160;&#160;&#160;<a class="el" href="Driver__WiFi_8h.html#ad092e18422a937dd1837ed4fa5751499">_ARM_Driver_WiFi_</a>(n)</td></tr>
+<tr class="separator:a035999f5a44af74ed7c6576feacaa2ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae84cbf48cd5168371621fc5f78aac0a4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#gae84cbf48cd5168371621fc5f78aac0a4">ARM_WIFI_BSSID</a>&#160;&#160;&#160;1U</td></tr>
+<tr class="memdesc:gae84cbf48cd5168371621fc5f78aac0a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get BSSID of AP to connect or of AP; data = &amp;bssid, len = 6, uint8_t[6].  <a href="group__WiFi__option.html#gae84cbf48cd5168371621fc5f78aac0a4">More...</a><br/></td></tr>
+<tr class="separator:gae84cbf48cd5168371621fc5f78aac0a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1fbda584fe5750db6a04b1ed27730d95"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga1fbda584fe5750db6a04b1ed27730d95">ARM_WIFI_TX_POWER</a>&#160;&#160;&#160;2U</td></tr>
+<tr class="memdesc:ga1fbda584fe5750db6a04b1ed27730d95"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get transmit power; data = &amp;power, len = 4, uint32_t: 0 .. 20 [dBm].  <a href="group__WiFi__option.html#ga1fbda584fe5750db6a04b1ed27730d95">More...</a><br/></td></tr>
+<tr class="separator:ga1fbda584fe5750db6a04b1ed27730d95"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga77e38a3d5d2fe8c04aebaf8d24e1b8d4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga77e38a3d5d2fe8c04aebaf8d24e1b8d4">ARM_WIFI_LP_TIMER</a>&#160;&#160;&#160;3U</td></tr>
+<tr class="memdesc:ga77e38a3d5d2fe8c04aebaf8d24e1b8d4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station Set/Get low-power deep-sleep time; data = &amp;time, len = 4, uint32_t [seconds]: 0 = disable (default)  <a href="group__WiFi__option.html#ga77e38a3d5d2fe8c04aebaf8d24e1b8d4">More...</a><br/></td></tr>
+<tr class="separator:ga77e38a3d5d2fe8c04aebaf8d24e1b8d4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga947c297f1364993524bf515beba296f1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga947c297f1364993524bf515beba296f1">ARM_WIFI_DTIM</a>&#160;&#160;&#160;4U</td></tr>
+<tr class="memdesc:ga947c297f1364993524bf515beba296f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get DTIM interval; data = &amp;dtim, len = 4, uint32_t [beacons].  <a href="group__WiFi__option.html#ga947c297f1364993524bf515beba296f1">More...</a><br/></td></tr>
+<tr class="separator:ga947c297f1364993524bf515beba296f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga6171d24c661b54465ced2dae7980897c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga6171d24c661b54465ced2dae7980897c">ARM_WIFI_BEACON</a>&#160;&#160;&#160;5U</td></tr>
+<tr class="memdesc:ga6171d24c661b54465ced2dae7980897c"><td class="mdescLeft">&#160;</td><td class="mdescRight">AP Set/Get beacon interval; data = &amp;interval, len = 4, uint32_t [ms].  <a href="group__WiFi__option.html#ga6171d24c661b54465ced2dae7980897c">More...</a><br/></td></tr>
+<tr class="separator:ga6171d24c661b54465ced2dae7980897c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafefb0fe1e5cdfb71f7f8cc7606840865"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#gafefb0fe1e5cdfb71f7f8cc7606840865">ARM_WIFI_MAC</a>&#160;&#160;&#160;6U</td></tr>
+<tr class="memdesc:gafefb0fe1e5cdfb71f7f8cc7606840865"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get MAC; data = &amp;mac, len = 6, uint8_t[6].  <a href="group__WiFi__option.html#gafefb0fe1e5cdfb71f7f8cc7606840865">More...</a><br/></td></tr>
+<tr class="separator:gafefb0fe1e5cdfb71f7f8cc7606840865"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga50ee1ca627ebe536cae0ab7155ed1d17"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga50ee1ca627ebe536cae0ab7155ed1d17">ARM_WIFI_IP</a>&#160;&#160;&#160;7U</td></tr>
+<tr class="memdesc:ga50ee1ca627ebe536cae0ab7155ed1d17"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv4 static/assigned address; data = &amp;ip, len = 4, uint8_t[4].  <a href="group__WiFi__option.html#ga50ee1ca627ebe536cae0ab7155ed1d17">More...</a><br/></td></tr>
+<tr class="separator:ga50ee1ca627ebe536cae0ab7155ed1d17"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac2603479ebad0ed05413e1e01b8a649f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#gac2603479ebad0ed05413e1e01b8a649f">ARM_WIFI_IP_SUBNET_MASK</a>&#160;&#160;&#160;8U</td></tr>
+<tr class="memdesc:gac2603479ebad0ed05413e1e01b8a649f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv4 subnet mask; data = &amp;mask, len = 4, uint8_t[4].  <a href="group__WiFi__option.html#gac2603479ebad0ed05413e1e01b8a649f">More...</a><br/></td></tr>
+<tr class="separator:gac2603479ebad0ed05413e1e01b8a649f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad0c719fedd39d738ee7f6fd3c7317169"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#gad0c719fedd39d738ee7f6fd3c7317169">ARM_WIFI_IP_GATEWAY</a>&#160;&#160;&#160;9U</td></tr>
+<tr class="memdesc:gad0c719fedd39d738ee7f6fd3c7317169"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv4 gateway address; data = &amp;ip, len = 4, uint8_t[4].  <a href="group__WiFi__option.html#gad0c719fedd39d738ee7f6fd3c7317169">More...</a><br/></td></tr>
+<tr class="separator:gad0c719fedd39d738ee7f6fd3c7317169"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga657f5c6c504defe04422dbe468c6c134"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga657f5c6c504defe04422dbe468c6c134">ARM_WIFI_IP_DNS1</a>&#160;&#160;&#160;10U</td></tr>
+<tr class="memdesc:ga657f5c6c504defe04422dbe468c6c134"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv4 primary DNS address; data = &amp;ip, len = 4, uint8_t[4].  <a href="group__WiFi__option.html#ga657f5c6c504defe04422dbe468c6c134">More...</a><br/></td></tr>
+<tr class="separator:ga657f5c6c504defe04422dbe468c6c134"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5a5fa4c298b16d0acd0a71f873802d31"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga5a5fa4c298b16d0acd0a71f873802d31">ARM_WIFI_IP_DNS2</a>&#160;&#160;&#160;11U</td></tr>
+<tr class="memdesc:ga5a5fa4c298b16d0acd0a71f873802d31"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv4 secondary DNS address; data = &amp;ip, len = 4, uint8_t[4].  <a href="group__WiFi__option.html#ga5a5fa4c298b16d0acd0a71f873802d31">More...</a><br/></td></tr>
+<tr class="separator:ga5a5fa4c298b16d0acd0a71f873802d31"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad37e95b697872782973057ae94c085a9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#gad37e95b697872782973057ae94c085a9">ARM_WIFI_IP_DHCP</a>&#160;&#160;&#160;12U</td></tr>
+<tr class="memdesc:gad37e95b697872782973057ae94c085a9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv4 DHCP client/server enable/disable; data = &amp;dhcp, len = 4, uint32_t: 0 = disable, non-zero = enable (default)  <a href="group__WiFi__option.html#gad37e95b697872782973057ae94c085a9">More...</a><br/></td></tr>
+<tr class="separator:gad37e95b697872782973057ae94c085a9"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga10065d0d9cb7530e0747be83ba9e4c35"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga10065d0d9cb7530e0747be83ba9e4c35">ARM_WIFI_IP_DHCP_POOL_BEGIN</a>&#160;&#160;&#160;13U</td></tr>
+<tr class="memdesc:ga10065d0d9cb7530e0747be83ba9e4c35"><td class="mdescLeft">&#160;</td><td class="mdescRight">AP Set/Get IPv4 DHCP pool begin address; data = &amp;ip, len = 4, uint8_t[4].  <a href="group__WiFi__option.html#ga10065d0d9cb7530e0747be83ba9e4c35">More...</a><br/></td></tr>
+<tr class="separator:ga10065d0d9cb7530e0747be83ba9e4c35"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4054f0e4045a25928531be73fb9d6b45"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga4054f0e4045a25928531be73fb9d6b45">ARM_WIFI_IP_DHCP_POOL_END</a>&#160;&#160;&#160;14U</td></tr>
+<tr class="memdesc:ga4054f0e4045a25928531be73fb9d6b45"><td class="mdescLeft">&#160;</td><td class="mdescRight">AP Set/Get IPv4 DHCP pool end address; data = &amp;ip, len = 4, uint8_t[4].  <a href="group__WiFi__option.html#ga4054f0e4045a25928531be73fb9d6b45">More...</a><br/></td></tr>
+<tr class="separator:ga4054f0e4045a25928531be73fb9d6b45"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga78ec2d08d4f1d3ce486b40a329bd8713"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga78ec2d08d4f1d3ce486b40a329bd8713">ARM_WIFI_IP_DHCP_LEASE_TIME</a>&#160;&#160;&#160;15U</td></tr>
+<tr class="memdesc:ga78ec2d08d4f1d3ce486b40a329bd8713"><td class="mdescLeft">&#160;</td><td class="mdescRight">AP Set/Get IPv4 DHCP lease time; data = &amp;time, len = 4, uint32_t [seconds].  <a href="group__WiFi__option.html#ga78ec2d08d4f1d3ce486b40a329bd8713">More...</a><br/></td></tr>
+<tr class="separator:ga78ec2d08d4f1d3ce486b40a329bd8713"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaeac3fc297297b9bf5f2b5cf84788d77f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#gaeac3fc297297b9bf5f2b5cf84788d77f">ARM_WIFI_IP6_GLOBAL</a>&#160;&#160;&#160;16U</td></tr>
+<tr class="memdesc:gaeac3fc297297b9bf5f2b5cf84788d77f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv6 global address; data = &amp;ip6, len = 16, uint8_t[16].  <a href="group__WiFi__option.html#gaeac3fc297297b9bf5f2b5cf84788d77f">More...</a><br/></td></tr>
+<tr class="separator:gaeac3fc297297b9bf5f2b5cf84788d77f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga11fdcc3403a43187158434a87fdfb83c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga11fdcc3403a43187158434a87fdfb83c">ARM_WIFI_IP6_LINK_LOCAL</a>&#160;&#160;&#160;17U</td></tr>
+<tr class="memdesc:ga11fdcc3403a43187158434a87fdfb83c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv6 link local address; data = &amp;ip6, len = 16, uint8_t[16].  <a href="group__WiFi__option.html#ga11fdcc3403a43187158434a87fdfb83c">More...</a><br/></td></tr>
+<tr class="separator:ga11fdcc3403a43187158434a87fdfb83c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga545cb7e1da8715966bee7c7ff9d427d8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga545cb7e1da8715966bee7c7ff9d427d8">ARM_WIFI_IP6_SUBNET_PREFIX_LEN</a>&#160;&#160;&#160;18U</td></tr>
+<tr class="memdesc:ga545cb7e1da8715966bee7c7ff9d427d8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv6 subnet prefix length; data = &amp;len, len = 4, uint32_t: 1 .. 127.  <a href="group__WiFi__option.html#ga545cb7e1da8715966bee7c7ff9d427d8">More...</a><br/></td></tr>
+<tr class="separator:ga545cb7e1da8715966bee7c7ff9d427d8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga218d49572adcac8d678f7a8ae2f0c67e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga218d49572adcac8d678f7a8ae2f0c67e">ARM_WIFI_IP6_GATEWAY</a>&#160;&#160;&#160;19U</td></tr>
+<tr class="memdesc:ga218d49572adcac8d678f7a8ae2f0c67e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv6 gateway address; data = &amp;ip6, len = 16, uint8_t[16].  <a href="group__WiFi__option.html#ga218d49572adcac8d678f7a8ae2f0c67e">More...</a><br/></td></tr>
+<tr class="separator:ga218d49572adcac8d678f7a8ae2f0c67e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaeb86e25e3b7c6360c977b05b40ff7676"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#gaeb86e25e3b7c6360c977b05b40ff7676">ARM_WIFI_IP6_DNS1</a>&#160;&#160;&#160;20U</td></tr>
+<tr class="memdesc:gaeb86e25e3b7c6360c977b05b40ff7676"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv6 primary DNS address; data = &amp;ip6, len = 16, uint8_t[16].  <a href="group__WiFi__option.html#gaeb86e25e3b7c6360c977b05b40ff7676">More...</a><br/></td></tr>
+<tr class="separator:gaeb86e25e3b7c6360c977b05b40ff7676"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga24dee294436d575b47c7a314cba1654d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga24dee294436d575b47c7a314cba1654d">ARM_WIFI_IP6_DNS2</a>&#160;&#160;&#160;21U</td></tr>
+<tr class="memdesc:ga24dee294436d575b47c7a314cba1654d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv6 secondary DNS address; data = &amp;ip6, len = 16, uint8_t[16].  <a href="group__WiFi__option.html#ga24dee294436d575b47c7a314cba1654d">More...</a><br/></td></tr>
+<tr class="separator:ga24dee294436d575b47c7a314cba1654d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga6b864e923870ec473ee0c876d1a3b032"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga6b864e923870ec473ee0c876d1a3b032">ARM_WIFI_IP6_DHCP_MODE</a>&#160;&#160;&#160;22U</td></tr>
+<tr class="memdesc:ga6b864e923870ec473ee0c876d1a3b032"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv6 DHCPv6 client mode; data = &amp;mode, len = 4, uint32_t: ARM_WIFI_IP6_DHCP_xxx (default Off)  <a href="group__WiFi__option.html#ga6b864e923870ec473ee0c876d1a3b032">More...</a><br/></td></tr>
+<tr class="separator:ga6b864e923870ec473ee0c876d1a3b032"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab5b0d06b14b916c244c42ad8a3053d1d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__sec__type.html#gab5b0d06b14b916c244c42ad8a3053d1d">ARM_WIFI_SECURITY_OPEN</a>&#160;&#160;&#160;0U</td></tr>
+<tr class="memdesc:gab5b0d06b14b916c244c42ad8a3053d1d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Open.  <a href="group__wifi__sec__type.html#gab5b0d06b14b916c244c42ad8a3053d1d">More...</a><br/></td></tr>
+<tr class="separator:gab5b0d06b14b916c244c42ad8a3053d1d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga75d8f1830db25a9f0b1390397186ddd5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__sec__type.html#ga75d8f1830db25a9f0b1390397186ddd5">ARM_WIFI_SECURITY_WEP</a>&#160;&#160;&#160;1U</td></tr>
+<tr class="memdesc:ga75d8f1830db25a9f0b1390397186ddd5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Wired Equivalent Privacy (WEP) with Pre-Sheared Key (PSK)  <a href="group__wifi__sec__type.html#ga75d8f1830db25a9f0b1390397186ddd5">More...</a><br/></td></tr>
+<tr class="separator:ga75d8f1830db25a9f0b1390397186ddd5"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga40f2c6844d3d81bbfedaa96e72402b35"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__sec__type.html#ga40f2c6844d3d81bbfedaa96e72402b35">ARM_WIFI_SECURITY_WPA</a>&#160;&#160;&#160;2U</td></tr>
+<tr class="memdesc:ga40f2c6844d3d81bbfedaa96e72402b35"><td class="mdescLeft">&#160;</td><td class="mdescRight">WiFi Protected Access (WPA) with PSK.  <a href="group__wifi__sec__type.html#ga40f2c6844d3d81bbfedaa96e72402b35">More...</a><br/></td></tr>
+<tr class="separator:ga40f2c6844d3d81bbfedaa96e72402b35"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab4622ed5c27f910299ed6c3997d14b66"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__sec__type.html#gab4622ed5c27f910299ed6c3997d14b66">ARM_WIFI_SECURITY_WPA2</a>&#160;&#160;&#160;3U</td></tr>
+<tr class="memdesc:gab4622ed5c27f910299ed6c3997d14b66"><td class="mdescLeft">&#160;</td><td class="mdescRight">WiFi Protected Access II (WPA2) with PSK.  <a href="group__wifi__sec__type.html#gab4622ed5c27f910299ed6c3997d14b66">More...</a><br/></td></tr>
+<tr class="separator:gab4622ed5c27f910299ed6c3997d14b66"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1c0904e056c3f720fe38b903230d9f89"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__sec__type.html#ga1c0904e056c3f720fe38b903230d9f89">ARM_WIFI_SECURITY_UNKNOWN</a>&#160;&#160;&#160;255U</td></tr>
+<tr class="memdesc:ga1c0904e056c3f720fe38b903230d9f89"><td class="mdescLeft">&#160;</td><td class="mdescRight">Unknown.  <a href="group__wifi__sec__type.html#ga1c0904e056c3f720fe38b903230d9f89">More...</a><br/></td></tr>
+<tr class="separator:ga1c0904e056c3f720fe38b903230d9f89"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaade5c0e07cfee79973643b9f98a73438"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__wps__method.html#gaade5c0e07cfee79973643b9f98a73438">ARM_WIFI_WPS_METHOD_NONE</a>&#160;&#160;&#160;0U</td></tr>
+<tr class="memdesc:gaade5c0e07cfee79973643b9f98a73438"><td class="mdescLeft">&#160;</td><td class="mdescRight">Not used.  <a href="group__wifi__wps__method.html#gaade5c0e07cfee79973643b9f98a73438">More...</a><br/></td></tr>
+<tr class="separator:gaade5c0e07cfee79973643b9f98a73438"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafe4555319019fa722d2f2a8cc519af41"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__wps__method.html#gafe4555319019fa722d2f2a8cc519af41">ARM_WIFI_WPS_METHOD_PBC</a>&#160;&#160;&#160;1U</td></tr>
+<tr class="memdesc:gafe4555319019fa722d2f2a8cc519af41"><td class="mdescLeft">&#160;</td><td class="mdescRight">Push Button Configuration.  <a href="group__wifi__wps__method.html#gafe4555319019fa722d2f2a8cc519af41">More...</a><br/></td></tr>
+<tr class="separator:gafe4555319019fa722d2f2a8cc519af41"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga12a4e06347498f9765f339cdb5f391de"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__wps__method.html#ga12a4e06347498f9765f339cdb5f391de">ARM_WIFI_WPS_METHOD_PIN</a>&#160;&#160;&#160;2U</td></tr>
+<tr class="memdesc:ga12a4e06347498f9765f339cdb5f391de"><td class="mdescLeft">&#160;</td><td class="mdescRight">PIN.  <a href="group__wifi__wps__method.html#ga12a4e06347498f9765f339cdb5f391de">More...</a><br/></td></tr>
+<tr class="separator:ga12a4e06347498f9765f339cdb5f391de"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf200f735500dc647bc665f60a2df7552"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__dhcp__v6__mode.html#gaf200f735500dc647bc665f60a2df7552">ARM_WIFI_IP6_DHCP_OFF</a>&#160;&#160;&#160;0U</td></tr>
+<tr class="memdesc:gaf200f735500dc647bc665f60a2df7552"><td class="mdescLeft">&#160;</td><td class="mdescRight">Static Host Configuration (default)  <a href="group__wifi__dhcp__v6__mode.html#gaf200f735500dc647bc665f60a2df7552">More...</a><br/></td></tr>
+<tr class="separator:gaf200f735500dc647bc665f60a2df7552"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9d63d8029532c586703c77f1c8f990fc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__dhcp__v6__mode.html#ga9d63d8029532c586703c77f1c8f990fc">ARM_WIFI_IP6_DHCP_STATELESS</a>&#160;&#160;&#160;1U</td></tr>
+<tr class="memdesc:ga9d63d8029532c586703c77f1c8f990fc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dynamic Host Configuration stateless DHCPv6.  <a href="group__wifi__dhcp__v6__mode.html#ga9d63d8029532c586703c77f1c8f990fc">More...</a><br/></td></tr>
+<tr class="separator:ga9d63d8029532c586703c77f1c8f990fc"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga205f9604967e290c053952cab850841a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__dhcp__v6__mode.html#ga205f9604967e290c053952cab850841a">ARM_WIFI_IP6_DHCP_STATEFULL</a>&#160;&#160;&#160;2U</td></tr>
+<tr class="memdesc:ga205f9604967e290c053952cab850841a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dynamic Host Configuration statefull DHCPv6.  <a href="group__wifi__dhcp__v6__mode.html#ga205f9604967e290c053952cab850841a">More...</a><br/></td></tr>
+<tr class="separator:ga205f9604967e290c053952cab850841a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4a87b9a3c3a404e3917d54df98469a62"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__event.html#ga4a87b9a3c3a404e3917d54df98469a62">ARM_WIFI_EVENT_AP_CONNECT</a>&#160;&#160;&#160;(1UL &lt;&lt; 0)</td></tr>
+<tr class="memdesc:ga4a87b9a3c3a404e3917d54df98469a62"><td class="mdescLeft">&#160;</td><td class="mdescRight">Access Point: Station has connected; arg = &amp;mac, mac (uint8_t[6])  <a href="group__wifi__event.html#ga4a87b9a3c3a404e3917d54df98469a62">More...</a><br/></td></tr>
+<tr class="separator:ga4a87b9a3c3a404e3917d54df98469a62"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga271e73cda122e7ec3c5a5ca71d44eae3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__event.html#ga271e73cda122e7ec3c5a5ca71d44eae3">ARM_WIFI_EVENT_AP_DISCONNECT</a>&#160;&#160;&#160;(1UL &lt;&lt; 1)</td></tr>
+<tr class="memdesc:ga271e73cda122e7ec3c5a5ca71d44eae3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Access Point: Station has disconnected; arg = &amp;mac, mac (uint8_t[6])  <a href="group__wifi__event.html#ga271e73cda122e7ec3c5a5ca71d44eae3">More...</a><br/></td></tr>
+<tr class="separator:ga271e73cda122e7ec3c5a5ca71d44eae3"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga833f2c7a47bd2523d7a62ff6506a997f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__event.html#ga833f2c7a47bd2523d7a62ff6506a997f">ARM_WIFI_EVENT_ETH_RX_FRAME</a>&#160;&#160;&#160;(1UL &lt;&lt; 4)</td></tr>
+<tr class="memdesc:ga833f2c7a47bd2523d7a62ff6506a997f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ethernet Frame Received (in bypass mode only); arg = interface (0 = Station, 1 = Access Point)  <a href="group__wifi__event.html#ga833f2c7a47bd2523d7a62ff6506a997f">More...</a><br/></td></tr>
+<tr class="separator:ga833f2c7a47bd2523d7a62ff6506a997f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1a17023d92374b4f2d963aa7ac1c4e17"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__addr__family.html#ga1a17023d92374b4f2d963aa7ac1c4e17">ARM_SOCKET_AF_INET</a>&#160;&#160;&#160;1</td></tr>
+<tr class="memdesc:ga1a17023d92374b4f2d963aa7ac1c4e17"><td class="mdescLeft">&#160;</td><td class="mdescRight">IPv4.  <a href="group__wifi__addr__family.html#ga1a17023d92374b4f2d963aa7ac1c4e17">More...</a><br/></td></tr>
+<tr class="separator:ga1a17023d92374b4f2d963aa7ac1c4e17"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad50c95421ffbc6eec5f8458b2e170c26"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__addr__family.html#gad50c95421ffbc6eec5f8458b2e170c26">ARM_SOCKET_AF_INET6</a>&#160;&#160;&#160;2</td></tr>
+<tr class="memdesc:gad50c95421ffbc6eec5f8458b2e170c26"><td class="mdescLeft">&#160;</td><td class="mdescRight">IPv6.  <a href="group__wifi__addr__family.html#gad50c95421ffbc6eec5f8458b2e170c26">More...</a><br/></td></tr>
+<tr class="separator:gad50c95421ffbc6eec5f8458b2e170c26"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9567d5735856190b2ae9cc39f68637f1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__type.html#ga9567d5735856190b2ae9cc39f68637f1">ARM_SOCKET_SOCK_STREAM</a>&#160;&#160;&#160;1</td></tr>
+<tr class="memdesc:ga9567d5735856190b2ae9cc39f68637f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stream socket.  <a href="group__wifi__socket__type.html#ga9567d5735856190b2ae9cc39f68637f1">More...</a><br/></td></tr>
+<tr class="separator:ga9567d5735856190b2ae9cc39f68637f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaced5f33eda2fc38a8303cd11a0d76fab"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__type.html#gaced5f33eda2fc38a8303cd11a0d76fab">ARM_SOCKET_SOCK_DGRAM</a>&#160;&#160;&#160;2</td></tr>
+<tr class="memdesc:gaced5f33eda2fc38a8303cd11a0d76fab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Datagram socket.  <a href="group__wifi__socket__type.html#gaced5f33eda2fc38a8303cd11a0d76fab">More...</a><br/></td></tr>
+<tr class="separator:gaced5f33eda2fc38a8303cd11a0d76fab"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaf07cfcf1b65ea6c6be0629459a2ba781"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__protocol.html#gaf07cfcf1b65ea6c6be0629459a2ba781">ARM_SOCKET_IPPROTO_TCP</a>&#160;&#160;&#160;1</td></tr>
+<tr class="memdesc:gaf07cfcf1b65ea6c6be0629459a2ba781"><td class="mdescLeft">&#160;</td><td class="mdescRight">TCP.  <a href="group__wifi__protocol.html#gaf07cfcf1b65ea6c6be0629459a2ba781">More...</a><br/></td></tr>
+<tr class="separator:gaf07cfcf1b65ea6c6be0629459a2ba781"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gabacbead83c772f5737b25b4fc390e16d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__protocol.html#gabacbead83c772f5737b25b4fc390e16d">ARM_SOCKET_IPPROTO_UDP</a>&#160;&#160;&#160;2</td></tr>
+<tr class="memdesc:gabacbead83c772f5737b25b4fc390e16d"><td class="mdescLeft">&#160;</td><td class="mdescRight">UDP.  <a href="group__wifi__protocol.html#gabacbead83c772f5737b25b4fc390e16d">More...</a><br/></td></tr>
+<tr class="separator:gabacbead83c772f5737b25b4fc390e16d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac6fa12bbc640209a6b63f8cec282f961"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__opt.html#gac6fa12bbc640209a6b63f8cec282f961">ARM_SOCKET_IO_FIONBIO</a>&#160;&#160;&#160;1</td></tr>
+<tr class="memdesc:gac6fa12bbc640209a6b63f8cec282f961"><td class="mdescLeft">&#160;</td><td class="mdescRight">Non-blocking I/O (Set only, default = 0); opt_val = &amp;nbio, opt_len = sizeof(nbio), nbio (integer): 0=blocking, non-blocking otherwise.  <a href="group__wifi__soc__opt.html#gac6fa12bbc640209a6b63f8cec282f961">More...</a><br/></td></tr>
+<tr class="separator:gac6fa12bbc640209a6b63f8cec282f961"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga6f76374467b5580ab0e440da1c39024e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__opt.html#ga6f76374467b5580ab0e440da1c39024e">ARM_SOCKET_SO_RCVTIMEO</a>&#160;&#160;&#160;2</td></tr>
+<tr class="memdesc:ga6f76374467b5580ab0e440da1c39024e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Receive timeout in ms (default = 0); opt_val = &amp;timeout, opt_len = sizeof(timeout)  <a href="group__wifi__soc__opt.html#ga6f76374467b5580ab0e440da1c39024e">More...</a><br/></td></tr>
+<tr class="separator:ga6f76374467b5580ab0e440da1c39024e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad633987fb5b3478b54d3269b1b03497a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__opt.html#gad633987fb5b3478b54d3269b1b03497a">ARM_SOCKET_SO_SNDTIMEO</a>&#160;&#160;&#160;3</td></tr>
+<tr class="memdesc:gad633987fb5b3478b54d3269b1b03497a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Send timeout in ms (default = 0); opt_val = &amp;timeout, opt_len = sizeof(timeout)  <a href="group__wifi__soc__opt.html#gad633987fb5b3478b54d3269b1b03497a">More...</a><br/></td></tr>
+<tr class="separator:gad633987fb5b3478b54d3269b1b03497a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga925f699a931ccbfb87eb5f3d36cbe405"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__opt.html#ga925f699a931ccbfb87eb5f3d36cbe405">ARM_SOCKET_SO_KEEPALIVE</a>&#160;&#160;&#160;4</td></tr>
+<tr class="memdesc:ga925f699a931ccbfb87eb5f3d36cbe405"><td class="mdescLeft">&#160;</td><td class="mdescRight">Keep-alive messages (default = 0); opt_val = &amp;keepalive, opt_len = sizeof(keepalive), keepalive (integer): 0=disabled, enabled otherwise.  <a href="group__wifi__soc__opt.html#ga925f699a931ccbfb87eb5f3d36cbe405">More...</a><br/></td></tr>
+<tr class="separator:ga925f699a931ccbfb87eb5f3d36cbe405"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0466a14ce32b2cc28887735b632f3e63"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__opt.html#ga0466a14ce32b2cc28887735b632f3e63">ARM_SOCKET_SO_TYPE</a>&#160;&#160;&#160;5</td></tr>
+<tr class="memdesc:ga0466a14ce32b2cc28887735b632f3e63"><td class="mdescLeft">&#160;</td><td class="mdescRight">Socket Type (Get only); opt_val = &amp;socket_type, opt_len = sizeof(socket_type), socket_type (integer): ARM_SOCKET_SOCK_xxx.  <a href="group__wifi__soc__opt.html#ga0466a14ce32b2cc28887735b632f3e63">More...</a><br/></td></tr>
+<tr class="separator:ga0466a14ce32b2cc28887735b632f3e63"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga2f3db9fdae2366238054ff8a8e8ef97c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga2f3db9fdae2366238054ff8a8e8ef97c">ARM_SOCKET_ERROR</a>&#160;&#160;&#160;(-1)</td></tr>
+<tr class="memdesc:ga2f3db9fdae2366238054ff8a8e8ef97c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Unspecified error.  <a href="group__wifi__soc__func.html#ga2f3db9fdae2366238054ff8a8e8ef97c">More...</a><br/></td></tr>
+<tr class="separator:ga2f3db9fdae2366238054ff8a8e8ef97c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga535e069b83aafcf70dd089e6097bceef"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga535e069b83aafcf70dd089e6097bceef">ARM_SOCKET_ESOCK</a>&#160;&#160;&#160;(-2)</td></tr>
+<tr class="memdesc:ga535e069b83aafcf70dd089e6097bceef"><td class="mdescLeft">&#160;</td><td class="mdescRight">Invalid socket.  <a href="group__wifi__soc__func.html#ga535e069b83aafcf70dd089e6097bceef">More...</a><br/></td></tr>
+<tr class="separator:ga535e069b83aafcf70dd089e6097bceef"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga695aa5c5329602d9465fbc6c22fc9978"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga695aa5c5329602d9465fbc6c22fc9978">ARM_SOCKET_EINVAL</a>&#160;&#160;&#160;(-3)</td></tr>
+<tr class="memdesc:ga695aa5c5329602d9465fbc6c22fc9978"><td class="mdescLeft">&#160;</td><td class="mdescRight">Invalid argument.  <a href="group__wifi__soc__func.html#ga695aa5c5329602d9465fbc6c22fc9978">More...</a><br/></td></tr>
+<tr class="separator:ga695aa5c5329602d9465fbc6c22fc9978"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga95ab80319bfbc5413fc5334e3d5ce5d2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga95ab80319bfbc5413fc5334e3d5ce5d2">ARM_SOCKET_ENOTSUP</a>&#160;&#160;&#160;(-4)</td></tr>
+<tr class="memdesc:ga95ab80319bfbc5413fc5334e3d5ce5d2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Operation not supported.  <a href="group__wifi__soc__func.html#ga95ab80319bfbc5413fc5334e3d5ce5d2">More...</a><br/></td></tr>
+<tr class="separator:ga95ab80319bfbc5413fc5334e3d5ce5d2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga68e88e80822f779361407d005659fc6c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga68e88e80822f779361407d005659fc6c">ARM_SOCKET_ENOMEM</a>&#160;&#160;&#160;(-5)</td></tr>
+<tr class="memdesc:ga68e88e80822f779361407d005659fc6c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Not enough memory.  <a href="group__wifi__soc__func.html#ga68e88e80822f779361407d005659fc6c">More...</a><br/></td></tr>
+<tr class="separator:ga68e88e80822f779361407d005659fc6c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga699dbd55e543fd38d333cf1d4470d8db"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga699dbd55e543fd38d333cf1d4470d8db">ARM_SOCKET_EAGAIN</a>&#160;&#160;&#160;(-6)</td></tr>
+<tr class="memdesc:ga699dbd55e543fd38d333cf1d4470d8db"><td class="mdescLeft">&#160;</td><td class="mdescRight">Operation would block or timed out.  <a href="group__wifi__soc__func.html#ga699dbd55e543fd38d333cf1d4470d8db">More...</a><br/></td></tr>
+<tr class="separator:ga699dbd55e543fd38d333cf1d4470d8db"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad7f3e077f7721a202012378ddcefb83f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#gad7f3e077f7721a202012378ddcefb83f">ARM_SOCKET_EINPROGRESS</a>&#160;&#160;&#160;(-7)</td></tr>
+<tr class="memdesc:gad7f3e077f7721a202012378ddcefb83f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Operation in progress.  <a href="group__wifi__soc__func.html#gad7f3e077f7721a202012378ddcefb83f">More...</a><br/></td></tr>
+<tr class="separator:gad7f3e077f7721a202012378ddcefb83f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga320ffeeb44d583c0216b24d6e1009d9f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga320ffeeb44d583c0216b24d6e1009d9f">ARM_SOCKET_ETIMEDOUT</a>&#160;&#160;&#160;(-8)</td></tr>
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+<tr class="separator:ga320ffeeb44d583c0216b24d6e1009d9f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa1e456c6cea2f6579158818387557f1a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#gaa1e456c6cea2f6579158818387557f1a">ARM_SOCKET_EISCONN</a>&#160;&#160;&#160;(-9)</td></tr>
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+<tr class="separator:gaa1e456c6cea2f6579158818387557f1a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0bde95e313d907032074583bc06b24a1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga0bde95e313d907032074583bc06b24a1">ARM_SOCKET_ENOTCONN</a>&#160;&#160;&#160;(-10)</td></tr>
+<tr class="memdesc:ga0bde95e313d907032074583bc06b24a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Socket is not connected.  <a href="group__wifi__soc__func.html#ga0bde95e313d907032074583bc06b24a1">More...</a><br/></td></tr>
+<tr class="separator:ga0bde95e313d907032074583bc06b24a1"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaaf535c9d325172ff8ef02964af218cb0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#gaaf535c9d325172ff8ef02964af218cb0">ARM_SOCKET_ECONNREFUSED</a>&#160;&#160;&#160;(-11)</td></tr>
+<tr class="memdesc:gaaf535c9d325172ff8ef02964af218cb0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Connection rejected by the peer.  <a href="group__wifi__soc__func.html#gaaf535c9d325172ff8ef02964af218cb0">More...</a><br/></td></tr>
+<tr class="separator:gaaf535c9d325172ff8ef02964af218cb0"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga87fa238861921ba1b272019a83b04676"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga87fa238861921ba1b272019a83b04676">ARM_SOCKET_ECONNRESET</a>&#160;&#160;&#160;(-12)</td></tr>
+<tr class="memdesc:ga87fa238861921ba1b272019a83b04676"><td class="mdescLeft">&#160;</td><td class="mdescRight">Connection reset by the peer.  <a href="group__wifi__soc__func.html#ga87fa238861921ba1b272019a83b04676">More...</a><br/></td></tr>
+<tr class="separator:ga87fa238861921ba1b272019a83b04676"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga7e64d6bd00a2f6e30ece3ff0f02b5b27"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga7e64d6bd00a2f6e30ece3ff0f02b5b27">ARM_SOCKET_ECONNABORTED</a>&#160;&#160;&#160;(-13)</td></tr>
+<tr class="memdesc:ga7e64d6bd00a2f6e30ece3ff0f02b5b27"><td class="mdescLeft">&#160;</td><td class="mdescRight">Connection aborted locally.  <a href="group__wifi__soc__func.html#ga7e64d6bd00a2f6e30ece3ff0f02b5b27">More...</a><br/></td></tr>
+<tr class="separator:ga7e64d6bd00a2f6e30ece3ff0f02b5b27"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9df0d5bd422102d9d4ebddc869d358e0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga9df0d5bd422102d9d4ebddc869d358e0">ARM_SOCKET_EALREADY</a>&#160;&#160;&#160;(-14)</td></tr>
+<tr class="memdesc:ga9df0d5bd422102d9d4ebddc869d358e0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Connection already in progress.  <a href="group__wifi__soc__func.html#ga9df0d5bd422102d9d4ebddc869d358e0">More...</a><br/></td></tr>
+<tr class="separator:ga9df0d5bd422102d9d4ebddc869d358e0"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4fa475e41c3db0ada798249696e745a1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga4fa475e41c3db0ada798249696e745a1">ARM_SOCKET_EADDRINUSE</a>&#160;&#160;&#160;(-15)</td></tr>
+<tr class="memdesc:ga4fa475e41c3db0ada798249696e745a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Address in use.  <a href="group__wifi__soc__func.html#ga4fa475e41c3db0ada798249696e745a1">More...</a><br/></td></tr>
+<tr class="separator:ga4fa475e41c3db0ada798249696e745a1"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4d5d38e9a7d5907a3de4165476640cd4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga4d5d38e9a7d5907a3de4165476640cd4">ARM_SOCKET_EHOSTNOTFOUND</a>&#160;&#160;&#160;(-16)</td></tr>
+<tr class="memdesc:ga4d5d38e9a7d5907a3de4165476640cd4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Host not found.  <a href="group__wifi__soc__func.html#ga4d5d38e9a7d5907a3de4165476640cd4">More...</a><br/></td></tr>
+<tr class="separator:ga4d5d38e9a7d5907a3de4165476640cd4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table><table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
+Typedefs</h2></td></tr>
+<tr class="memitem:gac0f04bbdd431c87a680626154c3e0a41"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__control__gr.html#gac0f04bbdd431c87a680626154c3e0a41">ARM_WIFI_SignalEvent_t</a> )(uint32_t event, void *arg)</td></tr>
+<tr class="memdesc:gac0f04bbdd431c87a680626154c3e0a41"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer to <a class="el" href="group__wifi__control__gr.html#ga0c8243dee4bb161132692516f048bcec">ARM_WIFI_SignalEvent</a> : Signal WiFi Event.  <a href="group__wifi__control__gr.html#gac0f04bbdd431c87a680626154c3e0a41">More...</a><br/></td></tr>
+<tr class="separator:gac0f04bbdd431c87a680626154c3e0a41"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<h2 class="groupheader">Macro Definition Documentation</h2>
+<a class="anchor" id="aa6a3705716b58d58fdbf72d8308f1383"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_API_VERSION&#160;&#160;&#160;<a class="el" href="Driver__Common_8h.html#a43c7ca1eb0786d818624246c09932a74">ARM_DRIVER_VERSION_MAJOR_MINOR</a>(1,0)  /* API version */</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="ad092e18422a937dd1837ed4fa5751499"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define _ARM_Driver_WiFi_</td>
+          <td>(</td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">n</td><td>)</td>
+          <td>&#160;&#160;&#160;Driver_WiFi##n</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="a035999f5a44af74ed7c6576feacaa2ce"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_Driver_WiFi_</td>
+          <td>(</td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">n</td><td>)</td>
+          <td>&#160;&#160;&#160;<a class="el" href="Driver__WiFi_8h.html#ad092e18422a937dd1837ed4fa5751499">_ARM_Driver_WiFi_</a>(n)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="dir_7151b3cc910409bb744bd274374c738d.html">Driver</a></li><li class="navelem"><a class="el" href="dir_9c39448ea46a8e15f1aabc7dec307fcf.html">Include</a></li><li class="navelem"><a class="el" href="Driver__WiFi_8h.html">Driver_WiFi.h</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Driver/html/General_8txt.html b/docs/Driver/html/General_8txt.html
index 1b9dde9..638bcdf 100644
--- a/docs/Driver/html/General_8txt.html
+++ b/docs/Driver/html/General_8txt.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="General_8txt.html">General.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/WiFi.png b/docs/Driver/html/WiFi.png
new file mode 100644
index 0000000..380c2ab
--- /dev/null
+++ b/docs/Driver/html/WiFi.png
Binary files differ
diff --git a/docs/Driver/html/annotated.html b/docs/Driver/html/annotated.html
index cb00aa7..c334271 100644
--- a/docs/Driver/html/annotated.html
+++ b/docs/Driver/html/annotated.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
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 <tr id="row_18_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__common__drv__gr.html#structARM__DRIVER__VERSION" target="_self">ARM_DRIVER_VERSION</a></td><td class="desc">Driver Version </td></tr>
-<tr id="row_19_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__eth__interface__gr.html#structARM__ETH__LINK__INFO" target="_self">ARM_ETH_LINK_INFO</a></td><td class="desc">Ethernet link information </td></tr>
-<tr id="row_20_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__eth__interface__gr.html#structARM__ETH__MAC__ADDR" target="_self">ARM_ETH_MAC_ADDR</a></td><td class="desc">Ethernet MAC Address </td></tr>
-<tr id="row_21_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__eth__mac__interface__gr.html#structARM__ETH__MAC__CAPABILITIES" target="_self">ARM_ETH_MAC_CAPABILITIES</a></td><td class="desc">Ethernet MAC Capabilities </td></tr>
-<tr id="row_22_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__eth__mac__interface__gr.html#structARM__ETH__MAC__TIME" target="_self">ARM_ETH_MAC_TIME</a></td><td class="desc">Ethernet MAC Time </td></tr>
-<tr id="row_23_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__flash__interface__gr.html#structARM__FLASH__CAPABILITIES" target="_self">ARM_FLASH_CAPABILITIES</a></td><td class="desc">Flash Driver Capabilities </td></tr>
-<tr id="row_24_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__flash__interface__gr.html#structARM__FLASH__INFO" target="_self">ARM_FLASH_INFO</a></td><td class="desc">Flash information </td></tr>
-<tr id="row_25_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__flash__interface__gr.html#structARM__FLASH__SECTOR" target="_self">ARM_FLASH_SECTOR</a></td><td class="desc">Flash Sector information </td></tr>
-<tr id="row_26_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__flash__interface__gr.html#structARM__FLASH__STATUS" target="_self">ARM_FLASH_STATUS</a></td><td class="desc">Flash Status </td></tr>
-<tr id="row_27_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__i2c__interface__gr.html#structARM__I2C__CAPABILITIES" target="_self">ARM_I2C_CAPABILITIES</a></td><td class="desc">I2C Driver Capabilities </td></tr>
-<tr id="row_28_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__i2c__interface__gr.html#structARM__I2C__STATUS" target="_self">ARM_I2C_STATUS</a></td><td class="desc">I2C Status </td></tr>
-<tr id="row_29_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__mci__interface__gr.html#structARM__MCI__CAPABILITIES" target="_self">ARM_MCI_CAPABILITIES</a></td><td class="desc">MCI Driver Capabilities </td></tr>
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-<tr id="row_42_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="Driver__Storage_8h.html#structARM__STORAGE__SECURITY__FEATURES" target="_self">ARM_STORAGE_SECURITY_FEATURES</a></td><td class="desc"></td></tr>
-<tr id="row_43_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__storage__interface__gr.html#structARM__STORAGE__STATUS" target="_self">ARM_STORAGE_STATUS</a></td><td class="desc">Operating status of the storage controller </td></tr>
-<tr id="row_44_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__usart__interface__gr.html#structARM__USART__CAPABILITIES" target="_self">ARM_USART_CAPABILITIES</a></td><td class="desc">USART Device Driver Capabilities </td></tr>
-<tr id="row_45_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__usart__interface__gr.html#structARM__USART__MODEM__STATUS" target="_self">ARM_USART_MODEM_STATUS</a></td><td class="desc">USART Modem Status </td></tr>
-<tr id="row_46_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__usart__interface__gr.html#structARM__USART__STATUS" target="_self">ARM_USART_STATUS</a></td><td class="desc">USART Status </td></tr>
-<tr id="row_47_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__usbd__interface__gr.html#structARM__USBD__CAPABILITIES" target="_self">ARM_USBD_CAPABILITIES</a></td><td class="desc">USB Device Driver Capabilities </td></tr>
-<tr id="row_48_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__usbd__interface__gr.html#structARM__USBD__STATE" target="_self">ARM_USBD_STATE</a></td><td class="desc">USB Device State </td></tr>
-<tr id="row_49_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__usbh__host__gr.html#structARM__USBH__CAPABILITIES" target="_self">ARM_USBH_CAPABILITIES</a></td><td class="desc">USB Host Driver Capabilities </td></tr>
-<tr id="row_50_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__usbh__hci__gr.html#structARM__USBH__HCI__CAPABILITIES" target="_self">ARM_USBH_HCI_CAPABILITIES</a></td><td class="desc">USB Host HCI (OHCI/EHCI) Driver Capabilities </td></tr>
-<tr id="row_51_"><td class="entry"><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__usbh__host__gr.html#structARM__USBH__PORT__STATE" target="_self">ARM_USBH_PORT_STATE</a></td><td class="desc">USB Host Port State </td></tr>
+<tr id="row_19_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI" target="_self">ARM_DRIVER_WIFI</a></td><td class="desc">Access structure of the WiFi Driver </td></tr>
+<tr id="row_20_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__eth__interface__gr.html#structARM__ETH__LINK__INFO" target="_self">ARM_ETH_LINK_INFO</a></td><td class="desc">Ethernet link information </td></tr>
+<tr id="row_21_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__eth__interface__gr.html#structARM__ETH__MAC__ADDR" target="_self">ARM_ETH_MAC_ADDR</a></td><td class="desc">Ethernet MAC Address </td></tr>
+<tr id="row_22_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__eth__mac__interface__gr.html#structARM__ETH__MAC__CAPABILITIES" target="_self">ARM_ETH_MAC_CAPABILITIES</a></td><td class="desc">Ethernet MAC Capabilities </td></tr>
+<tr id="row_23_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__eth__mac__interface__gr.html#structARM__ETH__MAC__TIME" target="_self">ARM_ETH_MAC_TIME</a></td><td class="desc">Ethernet MAC Time </td></tr>
+<tr id="row_24_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__flash__interface__gr.html#structARM__FLASH__CAPABILITIES" target="_self">ARM_FLASH_CAPABILITIES</a></td><td class="desc">Flash Driver Capabilities </td></tr>
+<tr id="row_25_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__flash__interface__gr.html#structARM__FLASH__INFO" target="_self">ARM_FLASH_INFO</a></td><td class="desc">Flash information </td></tr>
+<tr id="row_26_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__flash__interface__gr.html#structARM__FLASH__SECTOR" target="_self">ARM_FLASH_SECTOR</a></td><td class="desc">Flash Sector information </td></tr>
+<tr id="row_27_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__flash__interface__gr.html#structARM__FLASH__STATUS" target="_self">ARM_FLASH_STATUS</a></td><td class="desc">Flash Status </td></tr>
+<tr id="row_28_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__i2c__interface__gr.html#structARM__I2C__CAPABILITIES" target="_self">ARM_I2C_CAPABILITIES</a></td><td class="desc">I2C Driver Capabilities </td></tr>
+<tr id="row_29_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__i2c__interface__gr.html#structARM__I2C__STATUS" target="_self">ARM_I2C_STATUS</a></td><td class="desc">I2C Status </td></tr>
+<tr id="row_30_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__mci__interface__gr.html#structARM__MCI__CAPABILITIES" target="_self">ARM_MCI_CAPABILITIES</a></td><td class="desc">MCI Driver Capabilities </td></tr>
+<tr id="row_31_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__mci__interface__gr.html#structARM__MCI__STATUS" target="_self">ARM_MCI_STATUS</a></td><td class="desc">MCI Status </td></tr>
+<tr id="row_32_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__nand__interface__gr.html#structARM__NAND__CAPABILITIES" target="_self">ARM_NAND_CAPABILITIES</a></td><td class="desc">NAND Driver Capabilities </td></tr>
+<tr id="row_33_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__nand__interface__gr.html#structARM__NAND__ECC__INFO" target="_self">ARM_NAND_ECC_INFO</a></td><td class="desc">NAND ECC (Error Correction Code) Information </td></tr>
+<tr id="row_34_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__nand__interface__gr.html#structARM__NAND__STATUS" target="_self">ARM_NAND_STATUS</a></td><td class="desc">NAND Status </td></tr>
+<tr id="row_35_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__sai__interface__gr.html#structARM__SAI__CAPABILITIES" target="_self">ARM_SAI_CAPABILITIES</a></td><td class="desc">SAI Driver Capabilities </td></tr>
+<tr id="row_36_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__sai__interface__gr.html#structARM__SAI__STATUS" target="_self">ARM_SAI_STATUS</a></td><td class="desc">SAI Status </td></tr>
+<tr id="row_37_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__spi__interface__gr.html#structARM__SPI__CAPABILITIES" target="_self">ARM_SPI_CAPABILITIES</a></td><td class="desc">SPI Driver Capabilities </td></tr>
+<tr id="row_38_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__spi__interface__gr.html#structARM__SPI__STATUS" target="_self">ARM_SPI_STATUS</a></td><td class="desc">SPI Status </td></tr>
+<tr id="row_39_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__storage__interface__gr.html#structARM__STORAGE__BLOCK" target="_self">ARM_STORAGE_BLOCK</a></td><td class="desc">A storage block is a range of memory with uniform attributes </td></tr>
+<tr id="row_40_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__storage__interface__gr.html#structARM__STORAGE__BLOCK__ATTRIBUTES" target="_self">ARM_STORAGE_BLOCK_ATTRIBUTES</a></td><td class="desc">Attributes of the storage range within a storage block </td></tr>
+<tr id="row_41_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__storage__interface__gr.html#structARM__STORAGE__CAPABILITIES" target="_self">ARM_STORAGE_CAPABILITIES</a></td><td class="desc">Storage Driver API Capabilities </td></tr>
+<tr id="row_42_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__storage__interface__gr.html#structARM__STORAGE__INFO" target="_self">ARM_STORAGE_INFO</a></td><td class="desc"></td></tr>
+<tr id="row_43_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="Driver__Storage_8h.html#structARM__STORAGE__SECURITY__FEATURES" target="_self">ARM_STORAGE_SECURITY_FEATURES</a></td><td class="desc"></td></tr>
+<tr id="row_44_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__storage__interface__gr.html#structARM__STORAGE__STATUS" target="_self">ARM_STORAGE_STATUS</a></td><td class="desc">Operating status of the storage controller </td></tr>
+<tr id="row_45_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__usart__interface__gr.html#structARM__USART__CAPABILITIES" target="_self">ARM_USART_CAPABILITIES</a></td><td class="desc">USART Device Driver Capabilities </td></tr>
+<tr id="row_46_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__usart__interface__gr.html#structARM__USART__MODEM__STATUS" target="_self">ARM_USART_MODEM_STATUS</a></td><td class="desc">USART Modem Status </td></tr>
+<tr id="row_47_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__usart__interface__gr.html#structARM__USART__STATUS" target="_self">ARM_USART_STATUS</a></td><td class="desc">USART Status </td></tr>
+<tr id="row_48_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__usbd__interface__gr.html#structARM__USBD__CAPABILITIES" target="_self">ARM_USBD_CAPABILITIES</a></td><td class="desc">USB Device Driver Capabilities </td></tr>
+<tr id="row_49_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__usbd__interface__gr.html#structARM__USBD__STATE" target="_self">ARM_USBD_STATE</a></td><td class="desc">USB Device State </td></tr>
+<tr id="row_50_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__usbh__host__gr.html#structARM__USBH__CAPABILITIES" target="_self">ARM_USBH_CAPABILITIES</a></td><td class="desc">USB Host Driver Capabilities </td></tr>
+<tr id="row_51_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__usbh__hci__gr.html#structARM__USBH__HCI__CAPABILITIES" target="_self">ARM_USBH_HCI_CAPABILITIES</a></td><td class="desc">USB Host HCI (OHCI/EHCI) Driver Capabilities </td></tr>
+<tr id="row_52_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__usbh__host__gr.html#structARM__USBH__PORT__STATE" target="_self">ARM_USBH_PORT_STATE</a></td><td class="desc">USB Host Port State </td></tr>
+<tr id="row_53_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__wifi__control__gr.html#structARM__WIFI__CAPABILITIES" target="_self">ARM_WIFI_CAPABILITIES</a></td><td class="desc">WiFi Driver Capabilities </td></tr>
+<tr id="row_54_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__wifi__management__gr.html#structARM__WIFI__CONFIG__t" target="_self">ARM_WIFI_CONFIG_t</a></td><td class="desc">WiFi Configuration </td></tr>
+<tr id="row_55_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__wifi__management__gr.html#structARM__WIFI__NET__INFO__t" target="_self">ARM_WIFI_NET_INFO_t</a></td><td class="desc">WiFi Network Information </td></tr>
+<tr id="row_56_" class="even"><td class="entry"><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="group__wifi__management__gr.html#structARM__WIFI__SCAN__INFO__t" target="_self">ARM_WIFI_SCAN_INFO_t</a></td><td class="desc">WiFi Scan Information </td></tr>
 </table>
 </div><!-- directory -->
 </div><!-- contents -->
@@ -179,7 +184,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/annotated.js b/docs/Driver/html/annotated.js
index 24544ae..04df96c 100644
--- a/docs/Driver/html/annotated.js
+++ b/docs/Driver/html/annotated.js
@@ -19,6 +19,7 @@
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     [ "ARM_DRIVER_USBH_HCI", "group__usbh__hci__gr.html#structARM__DRIVER__USBH__HCI", "group__usbh__hci__gr_structARM__DRIVER__USBH__HCI" ],
     [ "ARM_DRIVER_VERSION", "group__common__drv__gr.html#structARM__DRIVER__VERSION", "group__common__drv__gr_structARM__DRIVER__VERSION" ],
+    [ "ARM_DRIVER_WIFI", "group__wifi__interface__gr.html#structARM__DRIVER__WIFI", "group__wifi__interface__gr_structARM__DRIVER__WIFI" ],
     [ "ARM_ETH_LINK_INFO", "group__eth__interface__gr.html#structARM__ETH__LINK__INFO", "group__eth__interface__gr_structARM__ETH__LINK__INFO" ],
     [ "ARM_ETH_MAC_ADDR", "group__eth__interface__gr.html#structARM__ETH__MAC__ADDR", "group__eth__interface__gr_structARM__ETH__MAC__ADDR" ],
     [ "ARM_ETH_MAC_CAPABILITIES", "group__eth__mac__interface__gr.html#structARM__ETH__MAC__CAPABILITIES", "group__eth__mac__interface__gr_structARM__ETH__MAC__CAPABILITIES" ],
@@ -51,5 +52,9 @@
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     [ "ARM_USBH_CAPABILITIES", "group__usbh__host__gr.html#structARM__USBH__CAPABILITIES", "group__usbh__host__gr_structARM__USBH__CAPABILITIES" ],
     [ "ARM_USBH_HCI_CAPABILITIES", "group__usbh__hci__gr.html#structARM__USBH__HCI__CAPABILITIES", "group__usbh__hci__gr_structARM__USBH__HCI__CAPABILITIES" ],
-    [ "ARM_USBH_PORT_STATE", "group__usbh__host__gr.html#structARM__USBH__PORT__STATE", "group__usbh__host__gr_structARM__USBH__PORT__STATE" ]
+    [ "ARM_USBH_PORT_STATE", "group__usbh__host__gr.html#structARM__USBH__PORT__STATE", "group__usbh__host__gr_structARM__USBH__PORT__STATE" ],
+    [ "ARM_WIFI_CAPABILITIES", "group__wifi__control__gr.html#structARM__WIFI__CAPABILITIES", "group__wifi__control__gr_structARM__WIFI__CAPABILITIES" ],
+    [ "ARM_WIFI_CONFIG_t", "group__wifi__management__gr.html#structARM__WIFI__CONFIG__t", "group__wifi__management__gr_structARM__WIFI__CONFIG__t" ],
+    [ "ARM_WIFI_NET_INFO_t", "group__wifi__management__gr.html#structARM__WIFI__NET__INFO__t", "group__wifi__management__gr_structARM__WIFI__NET__INFO__t" ],
+    [ "ARM_WIFI_SCAN_INFO_t", "group__wifi__management__gr.html#structARM__WIFI__SCAN__INFO__t", "group__wifi__management__gr_structARM__WIFI__SCAN__INFO__t" ]
 ];
\ No newline at end of file
diff --git a/docs/Driver/html/classes.html b/docs/Driver/html/classes.html
index 8571440..e923f79 100644
--- a/docs/Driver/html/classes.html
+++ b/docs/Driver/html/classes.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -118,40 +118,44 @@
 <div class="title">Data Structure Index</div>  </div>
 </div><!--header-->
 <div class="contents">
-<div class="qindex"><a class="qindex" href="#letter_C">C</a>&#160;|&#160;<a class="qindex" href="#letter_D">D</a>&#160;|&#160;<a class="qindex" href="#letter_E">E</a>&#160;|&#160;<a class="qindex" href="#letter_F">F</a>&#160;|&#160;<a class="qindex" href="#letter_I">I</a>&#160;|&#160;<a class="qindex" href="#letter_M">M</a>&#160;|&#160;<a class="qindex" href="#letter_N">N</a>&#160;|&#160;<a class="qindex" href="#letter_S">S</a>&#160;|&#160;<a class="qindex" href="#letter_U">U</a></div>
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index bba1010..586d4d2 100644
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+++ b/docs/Driver/html/cmsis.css
@@ -1148,7 +1148,7 @@
 
 .image
 {
-        text-align: center;
+        text-align: left;
 }
 
 .dotgraph
diff --git a/docs/Driver/html/dir_041cc4048c8229d7729b502626227b03.html b/docs/Driver/html/dir_041cc4048c8229d7729b502626227b03.html
index cb28c14..8e8d538 100644
--- a/docs/Driver/html/dir_041cc4048c8229d7729b502626227b03.html
+++ b/docs/Driver/html/dir_041cc4048c8229d7729b502626227b03.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -146,6 +146,8 @@
 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:Driver__USBH_8c"><td class="memItemLeft" align="right" valign="top">file &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__USBH_8c.html">Driver_USBH.c</a></td></tr>
 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:Driver__WiFi_8c"><td class="memItemLeft" align="right" valign="top">file &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__WiFi_8c.html">Driver_WiFi.c</a></td></tr>
+<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -153,7 +155,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_041cc4048c8229d7729b502626227b03.html">src</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/dir_7151b3cc910409bb744bd274374c738d.html b/docs/Driver/html/dir_7151b3cc910409bb744bd274374c738d.html
index 920aceb..ddeda02 100644
--- a/docs/Driver/html/dir_7151b3cc910409bb744bd274374c738d.html
+++ b/docs/Driver/html/dir_7151b3cc910409bb744bd274374c738d.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -123,7 +123,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_7151b3cc910409bb744bd274374c738d.html">Driver</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/dir_9c39448ea46a8e15f1aabc7dec307fcf.html b/docs/Driver/html/dir_9c39448ea46a8e15f1aabc7dec307fcf.html
index c8a51f6..b922c1e 100644
--- a/docs/Driver/html/dir_9c39448ea46a8e15f1aabc7dec307fcf.html
+++ b/docs/Driver/html/dir_9c39448ea46a8e15f1aabc7dec307fcf.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -146,6 +146,8 @@
 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:Driver__USBH_8h"><td class="memItemLeft" align="right" valign="top">file &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__USBH_8h.html">Driver_USBH.h</a></td></tr>
 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:Driver__WiFi_8h"><td class="memItemLeft" align="right" valign="top">file &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__WiFi_8h.html">Driver_WiFi.h</a></td></tr>
+<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 </div><!-- contents -->
 </div><!-- doc-content -->
@@ -153,7 +155,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_7151b3cc910409bb744bd274374c738d.html">Driver</a></li><li class="navelem"><a class="el" href="dir_9c39448ea46a8e15f1aabc7dec307fcf.html">Include</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/driverValidation.html b/docs/Driver/html/driverValidation.html
index cb85f8f..62c7f87 100644
--- a/docs/Driver/html/driverValidation.html
+++ b/docs/Driver/html/driverValidation.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -183,7 +183,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/driver_revisionHistory.html b/docs/Driver/html/driver_revisionHistory.html
index b3635d2..ac201b3 100644
--- a/docs/Driver/html/driver_revisionHistory.html
+++ b/docs/Driver/html/driver_revisionHistory.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -115,7 +115,18 @@
 <tr>
 <th>Version </th><th>Description  </th></tr>
 <tr>
-<td>2.6.0 </td><td><ul>
+<td>2.7.1 </td><td>Modifications compared to Version 2.7.0:<ul>
+<li>Finalized WiFi Interface API 1.0.0.   </li>
+</ul>
+</td></tr>
+<tr>
+<td>2.7.0 </td><td>Modifications compared to Version 2.6.0:<ul>
+<li>Added WiFi Interface API 1.0.0-beta.</li>
+<li>Added custom driver selection to simplify implementation of new CMSIS-Driver.   </li>
+</ul>
+</td></tr>
+<tr>
+<td>2.6.0 </td><td>Modifications compared to Version 2.05:<ul>
 <li>Enhanced CAN-Driver API with explicit BUSOFF state.</li>
 <li>Enhanced NAND-Driver API for ECC handling.   </li>
 </ul>
@@ -153,7 +164,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/files.html b/docs/Driver/html/files.html
index a57dd05..16fdd6c 100644
--- a/docs/Driver/html/files.html
+++ b/docs/Driver/html/files.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -144,7 +144,9 @@
 <tr id="row_28_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2doc.png" alt="*" width="24" height="22" /><a class="el" href="Driver__USBD_8c.html" target="_self">Driver_USBD.c</a></td><td class="desc"></td></tr>
 <tr id="row_29_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2doc.png" alt="*" width="24" height="22" /><a class="el" href="Driver__USBD_8h.html" target="_self">Driver_USBD.h</a></td><td class="desc"></td></tr>
 <tr id="row_30_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2doc.png" alt="*" width="24" height="22" /><a class="el" href="Driver__USBH_8c.html" target="_self">Driver_USBH.c</a></td><td class="desc"></td></tr>
-<tr id="row_31_"><td class="entry"><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><img src="ftv2doc.png" alt="*" width="24" height="22" /><a class="el" href="Driver__USBH_8h.html" target="_self">Driver_USBH.h</a></td><td class="desc"></td></tr>
+<tr id="row_31_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2doc.png" alt="*" width="24" height="22" /><a class="el" href="Driver__USBH_8h.html" target="_self">Driver_USBH.h</a></td><td class="desc"></td></tr>
+<tr id="row_32_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2doc.png" alt="*" width="24" height="22" /><a class="el" href="Driver__WiFi_8c.html" target="_self">Driver_WiFi.c</a></td><td class="desc"></td></tr>
+<tr id="row_33_"><td class="entry"><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><img src="ftv2doc.png" alt="*" width="24" height="22" /><a class="el" href="Driver__WiFi_8h.html" target="_self">Driver_WiFi.h</a></td><td class="desc"></td></tr>
 </table>
 </div><!-- directory -->
 </div><!-- contents -->
@@ -152,7 +154,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions.html b/docs/Driver/html/functions.html
index 27765e8..9b36951 100644
--- a/docs/Driver/html/functions.html
+++ b/docs/Driver/html/functions.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -156,6 +156,9 @@
 <li>acls
 : <a class="el" href="Driver__Storage_8h.html#abbd64eb8edcf2263db5c8ac140dc0448">ARM_STORAGE_SECURITY_FEATURES</a>
 </li>
+<li>Activate
+: <a class="el" href="group__wifi__interface__gr.html#a444ea7bda2c45eab34050d2a895baeec">ARM_DRIVER_WIFI</a>
+</li>
 <li>active
 : <a class="el" href="group__usbd__interface__gr.html#ab22b96a3efad48f5a542f46c1b224800">ARM_USBD_STATE</a>
 </li>
@@ -165,6 +168,9 @@
 <li>address_10_bit
 : <a class="el" href="group__i2c__interface__gr.html#a4ffaaf168a9f43e98d710abff5861ed5">ARM_I2C_CAPABILITIES</a>
 </li>
+<li>ap
+: <a class="el" href="group__wifi__control__gr.html#ae980bcb85233b9c5904072246ac71dd7">ARM_WIFI_CAPABILITIES</a>
+</li>
 <li>api
 : <a class="el" href="group__common__drv__gr.html#ad180da20fbde1d3dafc074af87c19540">ARM_DRIVER_VERSION</a>
 </li>
@@ -190,7 +196,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_b.html b/docs/Driver/html/functions_b.html
index d94ede6..fa8cca7 100644
--- a/docs/Driver/html/functions_b.html
+++ b/docs/Driver/html/functions_b.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -156,6 +156,9 @@
 <li>brs
 : <a class="el" href="group__can__interface__gr.html#a3539c043c5868c59f76c736fe2bcadf4">ARM_CAN_MSG_INFO</a>
 </li>
+<li>bssid
+: <a class="el" href="group__wifi__management__gr.html#a19c52baafe5797c359c5e0f5776499d7">ARM_WIFI_SCAN_INFO_t</a>
+</li>
 <li>bus_error
 : <a class="el" href="group__i2c__interface__gr.html#a43b1d210c48f4361c5054ba69bcae702">ARM_I2C_STATUS</a>
 </li>
@@ -166,13 +169,19 @@
 , <a class="el" href="group__spi__interface__gr.html#a50c88f3c1d787773e2ac1b59533f034a">ARM_SPI_STATUS</a>
 , <a class="el" href="group__storage__interface__gr.html#a50c88f3c1d787773e2ac1b59533f034a">ARM_STORAGE_STATUS</a>
 </li>
+<li>bypass_mode
+: <a class="el" href="group__wifi__control__gr.html#adbcc47408fb8c50d262a3be535108186">ARM_WIFI_CAPABILITIES</a>
+</li>
+<li>BypassControl
+: <a class="el" href="group__wifi__interface__gr.html#a18c6762aa46cec65b65135eaeadebf23">ARM_DRIVER_WIFI</a>
+</li>
 </ul>
 </div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_c.html b/docs/Driver/html/functions_c.html
index 0e8cc26..865f99c 100644
--- a/docs/Driver/html/functions_c.html
+++ b/docs/Driver/html/functions_c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -169,6 +169,11 @@
 <li>ce_manual
 : <a class="el" href="group__nand__interface__gr.html#a2b8044d986995b183b057217643466bf">ARM_NAND_CAPABILITIES</a>
 </li>
+<li>ch
+: <a class="el" href="group__wifi__management__gr.html#acbcf5f8de7895ca456bb39fbcccde1d1">ARM_WIFI_CONFIG_t</a>
+, <a class="el" href="group__wifi__management__gr.html#acbcf5f8de7895ca456bb39fbcccde1d1">ARM_WIFI_NET_INFO_t</a>
+, <a class="el" href="group__wifi__management__gr.html#acbcf5f8de7895ca456bb39fbcccde1d1">ARM_WIFI_SCAN_INFO_t</a>
+</li>
 <li>checksum_offload_rx_icmp
 : <a class="el" href="group__eth__mac__interface__gr.html#a142179445bfdbaaaf0d451f277fb0e96">ARM_ETH_MAC_CAPABILITIES</a>
 </li>
@@ -255,7 +260,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_d.html b/docs/Driver/html/functions_d.html
index 2cbd491..154f9eb 100644
--- a/docs/Driver/html/functions_d.html
+++ b/docs/Driver/html/functions_d.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -184,6 +184,9 @@
 <li>ddr_timing_mode
 : <a class="el" href="group__nand__interface__gr.html#a00c1f5db7d7c4abe7556733c36da7783">ARM_NAND_CAPABILITIES</a>
 </li>
+<li>Deactivate
+: <a class="el" href="group__wifi__interface__gr.html#ae9a38e69c7b7face914560e872378ed1">ARM_DRIVER_WIFI</a>
+</li>
 <li>DeviceConnect
 : <a class="el" href="group__usbd__interface__gr.html#a71d312ce5c5335c6a035da55c25848e4">ARM_DRIVER_USBD</a>
 </li>
@@ -236,7 +239,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_e.html b/docs/Driver/html/functions_e.html
index d0f040b..0e7434f 100644
--- a/docs/Driver/html/functions_e.html
+++ b/docs/Driver/html/functions_e.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -218,6 +218,21 @@
 <li>esi
 : <a class="el" href="group__can__interface__gr.html#ada78e3124de6adf5a5d212f9ebc4bbe0">ARM_CAN_MSG_INFO</a>
 </li>
+<li>EthGetRxFrameSize
+: <a class="el" href="group__wifi__interface__gr.html#af7ecc54209ce3725037cb5c9629151cf">ARM_DRIVER_WIFI</a>
+</li>
+<li>EthReadFrame
+: <a class="el" href="group__wifi__interface__gr.html#a544ca40b7157efce5000cd83aa92f8a0">ARM_DRIVER_WIFI</a>
+</li>
+<li>EthSendFrame
+: <a class="el" href="group__wifi__interface__gr.html#a2648d7e0d1c10c48923d8d20d99311ab">ARM_DRIVER_WIFI</a>
+</li>
+<li>event_ap_connect
+: <a class="el" href="group__wifi__control__gr.html#a9fc191093a9bc356c3d85e9cbf185620">ARM_WIFI_CAPABILITIES</a>
+</li>
+<li>event_ap_disconnect
+: <a class="el" href="group__wifi__control__gr.html#a18a7e7fe3a4f48548af6db6c825cc427">ARM_WIFI_CAPABILITIES</a>
+</li>
 <li>event_connect
 : <a class="el" href="group__usbh__host__gr.html#ae76b779cb9fdf447b20c8b6beed2d534">ARM_USBH_CAPABILITIES</a>
 </li>
@@ -236,6 +251,9 @@
 <li>event_dsr
 : <a class="el" href="group__usart__interface__gr.html#aefdb61f16498d650b5a7f5f9b62779df">ARM_USART_CAPABILITIES</a>
 </li>
+<li>event_eth_rx_frame
+: <a class="el" href="group__wifi__control__gr.html#ac4c6eadec013cf8a11b8eca66b809431">ARM_WIFI_CAPABILITIES</a>
+</li>
 <li>event_frame_error
 : <a class="el" href="group__sai__interface__gr.html#acc06ba75f18af9862d171426abc3273e">ARM_SAI_CAPABILITIES</a>
 </li>
@@ -290,7 +308,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_f.html b/docs/Driver/html/functions_f.html
index 170ab01..5aea3ff 100644
--- a/docs/Driver/html/functions_f.html
+++ b/docs/Driver/html/functions_f.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -165,7 +165,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_g.html b/docs/Driver/html/functions_g.html
index 64413ba..ef1f9e9 100644
--- a/docs/Driver/html/functions_g.html
+++ b/docs/Driver/html/functions_g.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -167,6 +167,7 @@
 , <a class="el" href="group__usbd__interface__gr.html#a52045edf0f555a0f0ecdf37a5e169f7a">ARM_DRIVER_USBD</a>
 , <a class="el" href="group__usbh__host__gr.html#aaba1d9458e32389c21c3d899f9cb9313">ARM_DRIVER_USBH</a>
 , <a class="el" href="group__usbh__hci__gr.html#a7a41769405bb3bb4cc9eaba26cf220d4">ARM_DRIVER_USBH_HCI</a>
+, <a class="el" href="group__wifi__interface__gr.html#a1ced805656e067b5635f1af2292b69e1">ARM_DRIVER_WIFI</a>
 </li>
 <li>GetClock
 : <a class="el" href="group__can__interface__gr.html#a21063f38e762cf29dfd3f5991ee936e2">ARM_DRIVER_CAN</a>
@@ -198,9 +199,18 @@
 <li>GetModemStatus
 : <a class="el" href="group__usart__interface__gr.html#a517a7a98a444126734782beb4951a9db">ARM_DRIVER_USART</a>
 </li>
+<li>GetModuleInfo
+: <a class="el" href="group__wifi__interface__gr.html#aa78e745bbf8257a3438700e4e6a8d222">ARM_DRIVER_WIFI</a>
+</li>
+<li>GetNetInfo
+: <a class="el" href="group__wifi__interface__gr.html#ac17eb39c11b7797b88a1f6e0f8cc772d">ARM_DRIVER_WIFI</a>
+</li>
 <li>GetNextBlock
 : <a class="el" href="group__storage__interface__gr.html#adda93f4d74519247517f036c4551dd13">ARM_DRIVER_STORAGE</a>
 </li>
+<li>GetOption
+: <a class="el" href="group__wifi__interface__gr.html#af264a580d36c33a649b64be845458b03">ARM_DRIVER_WIFI</a>
+</li>
 <li>GetRxCount
 : <a class="el" href="group__sai__interface__gr.html#a758c7822edf6ac18f82eb33c9dc09d71">ARM_DRIVER_SAI</a>
 , <a class="el" href="group__usart__interface__gr.html#a758c7822edf6ac18f82eb33c9dc09d71">ARM_DRIVER_USART</a>
@@ -244,6 +254,7 @@
 , <a class="el" href="group__usbd__interface__gr.html#a8834b281da48583845c044a81566c1b3">ARM_DRIVER_USBD</a>
 , <a class="el" href="group__usbh__host__gr.html#a8834b281da48583845c044a81566c1b3">ARM_DRIVER_USBH</a>
 , <a class="el" href="group__usbh__hci__gr.html#a8834b281da48583845c044a81566c1b3">ARM_DRIVER_USBH_HCI</a>
+, <a class="el" href="group__wifi__interface__gr.html#a8834b281da48583845c044a81566c1b3">ARM_DRIVER_WIFI</a>
 </li>
 </ul>
 </div><!-- contents -->
@@ -251,7 +262,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_h.html b/docs/Driver/html/functions_h.html
index e1b558b..9206e82 100644
--- a/docs/Driver/html/functions_h.html
+++ b/docs/Driver/html/functions_h.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -156,7 +156,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_i.html b/docs/Driver/html/functions_i.html
index 4391840..d0c7860 100644
--- a/docs/Driver/html/functions_i.html
+++ b/docs/Driver/html/functions_i.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -165,6 +165,7 @@
 , <a class="el" href="group__usbd__interface__gr.html#a84439aa5677d330d257a4b43e48d6426">ARM_DRIVER_USBD</a>
 , <a class="el" href="group__usbh__host__gr.html#a5bf141e46b7ced3abe3466cae4d811fb">ARM_DRIVER_USBH</a>
 , <a class="el" href="group__usbh__hci__gr.html#a40cbaad9fd2458b1008d31e1469903bb">ARM_DRIVER_USBH_HCI</a>
+, <a class="el" href="group__wifi__interface__gr.html#a99e597db8e61d0ff834561cb710e61ad">ARM_DRIVER_WIFI</a>
 </li>
 <li>InquireECC
 : <a class="el" href="group__nand__interface__gr.html#aecd239806e9f08b77ce0d00f61e78cf8">ARM_DRIVER_NAND</a>
@@ -175,16 +176,25 @@
 <li>internal_loopback
 : <a class="el" href="group__can__interface__gr.html#af19cdbb26d3496ed7dd63a59a7c7711f">ARM_CAN_CAPABILITIES</a>
 </li>
+<li>ip
+: <a class="el" href="group__wifi__control__gr.html#a69ddb9c845da426f636d9dd0dbed4e7e">ARM_WIFI_CAPABILITIES</a>
+</li>
+<li>ip6
+: <a class="el" href="group__wifi__control__gr.html#aad13478539ad093fabafd1804acac4a2">ARM_WIFI_CAPABILITIES</a>
+</li>
 <li>irda
 : <a class="el" href="group__usart__interface__gr.html#a9a72c5f0209a9ccf840fc196e9a9dffa">ARM_USART_CAPABILITIES</a>
 </li>
+<li>IsConnected
+: <a class="el" href="group__wifi__interface__gr.html#ab9771e89a155d316e0b44d3ee89081d3">ARM_DRIVER_WIFI</a>
+</li>
 </ul>
 </div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_l.html b/docs/Driver/html/functions_l.html
index 5d9dd98..f2b5189 100644
--- a/docs/Driver/html/functions_l.html
+++ b/docs/Driver/html/functions_l.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -156,7 +156,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_m.html b/docs/Driver/html/functions_m.html
index 17d28d5..d4f58fb 100644
--- a/docs/Driver/html/functions_m.html
+++ b/docs/Driver/html/functions_m.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -207,7 +207,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_n.html b/docs/Driver/html/functions_n.html
index 45ccf20..a04efc4 100644
--- a/docs/Driver/html/functions_n.html
+++ b/docs/Driver/html/functions_n.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -159,7 +159,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_o.html b/docs/Driver/html/functions_o.html
index 8a2c021..5241472 100644
--- a/docs/Driver/html/functions_o.html
+++ b/docs/Driver/html/functions_o.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -168,7 +168,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_p.html b/docs/Driver/html/functions_p.html
index b102efa..b63cec7 100644
--- a/docs/Driver/html/functions_p.html
+++ b/docs/Driver/html/functions_p.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -157,12 +157,22 @@
 : <a class="el" href="group__flash__interface__gr.html#a9dd3e47e968a8f6beb5d88c6d1b7ebe9">ARM_FLASH_INFO</a>
 , <a class="el" href="group__nand__interface__gr.html#a9dd3e47e968a8f6beb5d88c6d1b7ebe9">ARM_NAND_ECC_INFO</a>
 </li>
+<li>pass
+: <a class="el" href="group__wifi__management__gr.html#a3bef28806edf8f4c8cb82584b7e8c3cb">ARM_WIFI_CONFIG_t</a>
+, <a class="el" href="group__wifi__management__gr.html#a97ae3ac37e362cf8e7e3a9e18b7c806f">ARM_WIFI_NET_INFO_t</a>
+</li>
 <li>PHY_Read
 : <a class="el" href="group__eth__mac__interface__gr.html#a0f2ddb734e4242077275761400b26e35">ARM_DRIVER_ETH_MAC</a>
 </li>
 <li>PHY_Write
 : <a class="el" href="group__eth__mac__interface__gr.html#ac3efe9bdc31c3b1d7fd8eb82bbfb4c13">ARM_DRIVER_ETH_MAC</a>
 </li>
+<li>Ping
+: <a class="el" href="group__wifi__interface__gr.html#ad8f218e434e2f327335b16cdb4f21f65">ARM_DRIVER_WIFI</a>
+</li>
+<li>ping
+: <a class="el" href="group__wifi__control__gr.html#aef01bbaa48bdb4fba71684d8f31eb0b1">ARM_WIFI_CAPABILITIES</a>
+</li>
 <li>PipeCreate
 : <a class="el" href="group__usbh__host__gr.html#a7ce5ca579a8c535434187ad05f596fbd">ARM_DRIVER_USBH</a>
 </li>
@@ -219,6 +229,7 @@
 , <a class="el" href="group__usbd__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef">ARM_DRIVER_USBD</a>
 , <a class="el" href="group__usbh__host__gr.html#aba8f1c8019af95ffe19c32403e3240ef">ARM_DRIVER_USBH</a>
 , <a class="el" href="group__usbh__hci__gr.html#aba8f1c8019af95ffe19c32403e3240ef">ARM_DRIVER_USBH_HCI</a>
+, <a class="el" href="group__wifi__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef">ARM_DRIVER_WIFI</a>
 </li>
 <li>precision_timer
 : <a class="el" href="group__eth__mac__interface__gr.html#a881a863974d32f95d7829f768ac47aa2">ARM_ETH_MAC_CAPABILITIES</a>
@@ -267,7 +278,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_r.html b/docs/Driver/html/functions_r.html
index dcaa309..970155f 100644
--- a/docs/Driver/html/functions_r.html
+++ b/docs/Driver/html/functions_r.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -215,6 +215,8 @@
 , <a class="el" href="group__usbh__host__gr.html#aa43c4c21b173ada1b6b7568956f0d650">ARM_USBH_CAPABILITIES</a>
 , <a class="el" href="group__usbh__hci__gr.html#aa43c4c21b173ada1b6b7568956f0d650">ARM_USBH_HCI_CAPABILITIES</a>
 , <a class="el" href="group__usbh__host__gr.html#aa43c4c21b173ada1b6b7568956f0d650">ARM_USBH_PORT_STATE</a>
+, <a class="el" href="group__wifi__control__gr.html#aa43c4c21b173ada1b6b7568956f0d650">ARM_WIFI_CAPABILITIES</a>
+, <a class="el" href="group__wifi__management__gr.html#acb7bc06bed6f6408d719334fc41698c7">ARM_WIFI_CONFIG_t</a>
 </li>
 <li>reserved1
 : <a class="el" href="Driver__Storage_8h.html#aef9bb556c1530f5d648fd57e73b9a105">ARM_STORAGE_SECURITY_FEATURES</a>
@@ -238,6 +240,10 @@
 <li>rollback_protection
 : <a class="el" href="Driver__Storage_8h.html#affe0253b35f41c44ea06ae1e87d91012">ARM_STORAGE_SECURITY_FEATURES</a>
 </li>
+<li>rssi
+: <a class="el" href="group__wifi__management__gr.html#afb67d818cd76cce8057affabcb1979a6">ARM_WIFI_NET_INFO_t</a>
+, <a class="el" href="group__wifi__management__gr.html#afb67d818cd76cce8057affabcb1979a6">ARM_WIFI_SCAN_INFO_t</a>
+</li>
 <li>rst_n
 : <a class="el" href="group__mci__interface__gr.html#a2e8bd27f2c5c3093c4fec557890b97d4">ARM_MCI_CAPABILITIES</a>
 </li>
@@ -279,7 +285,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_s.html b/docs/Driver/html/functions_s.html
index 86ff13c..a6e9e9f 100644
--- a/docs/Driver/html/functions_s.html
+++ b/docs/Driver/html/functions_s.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -147,6 +147,9 @@
 <div class="textblock">Here is a list of all struct and union fields with links to the structures/unions they belong to:</div>
 
 <h3><a class="anchor" id="index_s"></a>- s -</h3><ul>
+<li>Scan
+: <a class="el" href="group__wifi__interface__gr.html#a51d027ef7046c413372103aa952772fb">ARM_DRIVER_WIFI</a>
+</li>
 <li>sdio_interrupt
 : <a class="el" href="group__mci__interface__gr.html#a61e2a440b27d7d22c866ad4427f4b825">ARM_MCI_CAPABILITIES</a>
 , <a class="el" href="group__mci__interface__gr.html#a61e2a440b27d7d22c866ad4427f4b825">ARM_MCI_STATUS</a>
@@ -168,6 +171,9 @@
 </li>
 <li>security
 : <a class="el" href="group__storage__interface__gr.html#aee43dd20848f45fe05efc10a8198817a">ARM_STORAGE_INFO</a>
+, <a class="el" href="group__wifi__management__gr.html#a5cd97d88131cf38bcc75189f9569f9b7">ARM_WIFI_CONFIG_t</a>
+, <a class="el" href="group__wifi__management__gr.html#a5cd97d88131cf38bcc75189f9569f9b7">ARM_WIFI_NET_INFO_t</a>
+, <a class="el" href="group__wifi__management__gr.html#a5cd97d88131cf38bcc75189f9569f9b7">ARM_WIFI_SCAN_INFO_t</a>
 </li>
 <li>Send
 : <a class="el" href="group__sai__interface__gr.html#a44eedddf4428cf4b98883b6c27d31922">ARM_DRIVER_SAI</a>
@@ -206,6 +212,9 @@
 <li>SetModemControl
 : <a class="el" href="group__usart__interface__gr.html#af6703d4078818df27ab9f8a7a8ad7b7b">ARM_DRIVER_USART</a>
 </li>
+<li>SetOption
+: <a class="el" href="group__wifi__interface__gr.html#a6b5e1c7fcea96ff13f6fd16d57c8b68f">ARM_DRIVER_WIFI</a>
+</li>
 <li>SetupTransfer
 : <a class="el" href="group__mci__interface__gr.html#adc63bab660e8304d78faa1ac429e792b">ARM_DRIVER_MCI</a>
 </li>
@@ -233,6 +242,51 @@
 <li>smart_card_clock
 : <a class="el" href="group__usart__interface__gr.html#a7b3c14ea1b5e9ba0a37ebc05fcfd51a6">ARM_USART_CAPABILITIES</a>
 </li>
+<li>SocketAccept
+: <a class="el" href="group__wifi__interface__gr.html#a66bb43c1e713efe7758b6e100c13ed69">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketBind
+: <a class="el" href="group__wifi__interface__gr.html#afcbc0c2bb3639584521ffeaaffc5a475">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketClose
+: <a class="el" href="group__wifi__interface__gr.html#a471a1be6d9adbccb83ca1f268643031c">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketConnect
+: <a class="el" href="group__wifi__interface__gr.html#a45cbca28d9866f2ec2ad9df830787dd7">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketCreate
+: <a class="el" href="group__wifi__interface__gr.html#aa26f0cefe99161484741977a5443e92c">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketGetHostByName
+: <a class="el" href="group__wifi__interface__gr.html#a62b2512cbaef03d26eb9c1e3004c3364">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketGetOpt
+: <a class="el" href="group__wifi__interface__gr.html#a4771324fb6f39fb2837e98d9f0ed48ed">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketGetPeerName
+: <a class="el" href="group__wifi__interface__gr.html#ac45fbc58fd00742cbe712bf26d857359">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketGetSockName
+: <a class="el" href="group__wifi__interface__gr.html#ab7c3e0211c87bf99e9c42b17a2249f50">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketListen
+: <a class="el" href="group__wifi__interface__gr.html#a628706c754e1793ec864453a5b517d5c">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketRecv
+: <a class="el" href="group__wifi__interface__gr.html#aaad6683992e76e3dd9a16eb6b7d43cf4">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketRecvFrom
+: <a class="el" href="group__wifi__interface__gr.html#a4343cf48bbcfb2101a422d90c34f84e6">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketSend
+: <a class="el" href="group__wifi__interface__gr.html#a7ff47d391831d547d310dd66f22c2942">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketSendTo
+: <a class="el" href="group__wifi__interface__gr.html#a248a293faea6f6e1cb781b8153e468fa">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketSetOpt
+: <a class="el" href="group__wifi__interface__gr.html#a7019060d0869a7dfae8e31aedb46815d">ARM_DRIVER_WIFI</a>
+</li>
 <li>software_attacks
 : <a class="el" href="Driver__Storage_8h.html#a1b6a0329dd65f25a0ab22496ab708306">ARM_STORAGE_SECURITY_FEATURES</a>
 </li>
@@ -241,9 +295,20 @@
 , <a class="el" href="group__usbd__interface__gr.html#a220859a8b5da0232739a11cbe7f79fc5">ARM_USBD_STATE</a>
 , <a class="el" href="group__usbh__host__gr.html#a220859a8b5da0232739a11cbe7f79fc5">ARM_USBH_PORT_STATE</a>
 </li>
+<li>ssid
+: <a class="el" href="group__wifi__management__gr.html#a587ba0cb07f02913598610049a3bbb79">ARM_WIFI_CONFIG_t</a>
+, <a class="el" href="group__wifi__management__gr.html#ae7eccb3e4df8625b86b5572fc16c37c3">ARM_WIFI_NET_INFO_t</a>
+, <a class="el" href="group__wifi__management__gr.html#ae7eccb3e4df8625b86b5572fc16c37c3">ARM_WIFI_SCAN_INFO_t</a>
+</li>
 <li>start
 : <a class="el" href="group__flash__interface__gr.html#a61eb63d26b2fa6c2971603ceccffb14b">ARM_FLASH_SECTOR</a>
 </li>
+<li>station
+: <a class="el" href="group__wifi__control__gr.html#a3c9e76f6560429efd6dcc41ffd4b67b9">ARM_WIFI_CAPABILITIES</a>
+</li>
+<li>station_ap
+: <a class="el" href="group__wifi__control__gr.html#ad280904e2429375205c09e53fe8cdcb1">ARM_WIFI_CAPABILITIES</a>
+</li>
 <li>suspend_resume
 : <a class="el" href="group__mci__interface__gr.html#abb03f0187e4658f417b5a24cac33eed9">ARM_MCI_CAPABILITIES</a>
 </li>
@@ -262,7 +327,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_t.html b/docs/Driver/html/functions_t.html
index 851ef9a..1562c54 100644
--- a/docs/Driver/html/functions_t.html
+++ b/docs/Driver/html/functions_t.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -195,7 +195,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_u.html b/docs/Driver/html/functions_u.html
index 2ecfb73..1345bc3 100644
--- a/docs/Driver/html/functions_u.html
+++ b/docs/Driver/html/functions_u.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -186,6 +186,7 @@
 , <a class="el" href="group__usbd__interface__gr.html#adcf20681a1402869ecb5c6447fada17b">ARM_DRIVER_USBD</a>
 , <a class="el" href="group__usbh__host__gr.html#adcf20681a1402869ecb5c6447fada17b">ARM_DRIVER_USBH</a>
 , <a class="el" href="group__usbh__hci__gr.html#adcf20681a1402869ecb5c6447fada17b">ARM_DRIVER_USBH_HCI</a>
+, <a class="el" href="group__wifi__interface__gr.html#adcf20681a1402869ecb5c6447fada17b">ARM_DRIVER_WIFI</a>
 </li>
 <li>unit_state
 : <a class="el" href="group__can__interface__gr.html#a96ec94acab56690b3801e3c5fbd09fa2">ARM_CAN_STATUS</a>
@@ -196,7 +197,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_v.html b/docs/Driver/html/functions_v.html
index 7924954..c08c7c6 100644
--- a/docs/Driver/html/functions_v.html
+++ b/docs/Driver/html/functions_v.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -188,7 +188,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_vars.html b/docs/Driver/html/functions_vars.html
index 4dd7f1f..d9f5d70 100644
--- a/docs/Driver/html/functions_vars.html
+++ b/docs/Driver/html/functions_vars.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -156,6 +156,9 @@
 <li>acls
 : <a class="el" href="Driver__Storage_8h.html#abbd64eb8edcf2263db5c8ac140dc0448">ARM_STORAGE_SECURITY_FEATURES</a>
 </li>
+<li>Activate
+: <a class="el" href="group__wifi__interface__gr.html#a444ea7bda2c45eab34050d2a895baeec">ARM_DRIVER_WIFI</a>
+</li>
 <li>active
 : <a class="el" href="group__usbd__interface__gr.html#ab22b96a3efad48f5a542f46c1b224800">ARM_USBD_STATE</a>
 </li>
@@ -165,6 +168,9 @@
 <li>address_10_bit
 : <a class="el" href="group__i2c__interface__gr.html#a4ffaaf168a9f43e98d710abff5861ed5">ARM_I2C_CAPABILITIES</a>
 </li>
+<li>ap
+: <a class="el" href="group__wifi__control__gr.html#ae980bcb85233b9c5904072246ac71dd7">ARM_WIFI_CAPABILITIES</a>
+</li>
 <li>api
 : <a class="el" href="group__common__drv__gr.html#ad180da20fbde1d3dafc074af87c19540">ARM_DRIVER_VERSION</a>
 </li>
@@ -190,7 +196,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_vars_b.html b/docs/Driver/html/functions_vars_b.html
index 72a9db1..8ddb027 100644
--- a/docs/Driver/html/functions_vars_b.html
+++ b/docs/Driver/html/functions_vars_b.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -156,6 +156,9 @@
 <li>brs
 : <a class="el" href="group__can__interface__gr.html#a3539c043c5868c59f76c736fe2bcadf4">ARM_CAN_MSG_INFO</a>
 </li>
+<li>bssid
+: <a class="el" href="group__wifi__management__gr.html#a19c52baafe5797c359c5e0f5776499d7">ARM_WIFI_SCAN_INFO_t</a>
+</li>
 <li>bus_error
 : <a class="el" href="group__i2c__interface__gr.html#a43b1d210c48f4361c5054ba69bcae702">ARM_I2C_STATUS</a>
 </li>
@@ -166,13 +169,19 @@
 , <a class="el" href="group__spi__interface__gr.html#a50c88f3c1d787773e2ac1b59533f034a">ARM_SPI_STATUS</a>
 , <a class="el" href="group__storage__interface__gr.html#a50c88f3c1d787773e2ac1b59533f034a">ARM_STORAGE_STATUS</a>
 </li>
+<li>bypass_mode
+: <a class="el" href="group__wifi__control__gr.html#adbcc47408fb8c50d262a3be535108186">ARM_WIFI_CAPABILITIES</a>
+</li>
+<li>BypassControl
+: <a class="el" href="group__wifi__interface__gr.html#a18c6762aa46cec65b65135eaeadebf23">ARM_DRIVER_WIFI</a>
+</li>
 </ul>
 </div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_vars_c.html b/docs/Driver/html/functions_vars_c.html
index e220550..1f2dab7 100644
--- a/docs/Driver/html/functions_vars_c.html
+++ b/docs/Driver/html/functions_vars_c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -169,6 +169,11 @@
 <li>ce_manual
 : <a class="el" href="group__nand__interface__gr.html#a2b8044d986995b183b057217643466bf">ARM_NAND_CAPABILITIES</a>
 </li>
+<li>ch
+: <a class="el" href="group__wifi__management__gr.html#acbcf5f8de7895ca456bb39fbcccde1d1">ARM_WIFI_CONFIG_t</a>
+, <a class="el" href="group__wifi__management__gr.html#acbcf5f8de7895ca456bb39fbcccde1d1">ARM_WIFI_NET_INFO_t</a>
+, <a class="el" href="group__wifi__management__gr.html#acbcf5f8de7895ca456bb39fbcccde1d1">ARM_WIFI_SCAN_INFO_t</a>
+</li>
 <li>checksum_offload_rx_icmp
 : <a class="el" href="group__eth__mac__interface__gr.html#a142179445bfdbaaaf0d451f277fb0e96">ARM_ETH_MAC_CAPABILITIES</a>
 </li>
@@ -255,7 +260,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_vars_d.html b/docs/Driver/html/functions_vars_d.html
index d66cb44..bbbe073 100644
--- a/docs/Driver/html/functions_vars_d.html
+++ b/docs/Driver/html/functions_vars_d.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -184,6 +184,9 @@
 <li>ddr_timing_mode
 : <a class="el" href="group__nand__interface__gr.html#a00c1f5db7d7c4abe7556733c36da7783">ARM_NAND_CAPABILITIES</a>
 </li>
+<li>Deactivate
+: <a class="el" href="group__wifi__interface__gr.html#ae9a38e69c7b7face914560e872378ed1">ARM_DRIVER_WIFI</a>
+</li>
 <li>DeviceConnect
 : <a class="el" href="group__usbd__interface__gr.html#a71d312ce5c5335c6a035da55c25848e4">ARM_DRIVER_USBD</a>
 </li>
@@ -236,7 +239,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_vars_e.html b/docs/Driver/html/functions_vars_e.html
index 03f1980..3f0b429 100644
--- a/docs/Driver/html/functions_vars_e.html
+++ b/docs/Driver/html/functions_vars_e.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -218,6 +218,21 @@
 <li>esi
 : <a class="el" href="group__can__interface__gr.html#ada78e3124de6adf5a5d212f9ebc4bbe0">ARM_CAN_MSG_INFO</a>
 </li>
+<li>EthGetRxFrameSize
+: <a class="el" href="group__wifi__interface__gr.html#af7ecc54209ce3725037cb5c9629151cf">ARM_DRIVER_WIFI</a>
+</li>
+<li>EthReadFrame
+: <a class="el" href="group__wifi__interface__gr.html#a544ca40b7157efce5000cd83aa92f8a0">ARM_DRIVER_WIFI</a>
+</li>
+<li>EthSendFrame
+: <a class="el" href="group__wifi__interface__gr.html#a2648d7e0d1c10c48923d8d20d99311ab">ARM_DRIVER_WIFI</a>
+</li>
+<li>event_ap_connect
+: <a class="el" href="group__wifi__control__gr.html#a9fc191093a9bc356c3d85e9cbf185620">ARM_WIFI_CAPABILITIES</a>
+</li>
+<li>event_ap_disconnect
+: <a class="el" href="group__wifi__control__gr.html#a18a7e7fe3a4f48548af6db6c825cc427">ARM_WIFI_CAPABILITIES</a>
+</li>
 <li>event_connect
 : <a class="el" href="group__usbh__host__gr.html#ae76b779cb9fdf447b20c8b6beed2d534">ARM_USBH_CAPABILITIES</a>
 </li>
@@ -236,6 +251,9 @@
 <li>event_dsr
 : <a class="el" href="group__usart__interface__gr.html#aefdb61f16498d650b5a7f5f9b62779df">ARM_USART_CAPABILITIES</a>
 </li>
+<li>event_eth_rx_frame
+: <a class="el" href="group__wifi__control__gr.html#ac4c6eadec013cf8a11b8eca66b809431">ARM_WIFI_CAPABILITIES</a>
+</li>
 <li>event_frame_error
 : <a class="el" href="group__sai__interface__gr.html#acc06ba75f18af9862d171426abc3273e">ARM_SAI_CAPABILITIES</a>
 </li>
@@ -290,7 +308,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_vars_f.html b/docs/Driver/html/functions_vars_f.html
index 573b2e5..ae3a847 100644
--- a/docs/Driver/html/functions_vars_f.html
+++ b/docs/Driver/html/functions_vars_f.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -165,7 +165,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_vars_g.html b/docs/Driver/html/functions_vars_g.html
index 4223485..dd7b1be 100644
--- a/docs/Driver/html/functions_vars_g.html
+++ b/docs/Driver/html/functions_vars_g.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -167,6 +167,7 @@
 , <a class="el" href="group__usbd__interface__gr.html#a52045edf0f555a0f0ecdf37a5e169f7a">ARM_DRIVER_USBD</a>
 , <a class="el" href="group__usbh__host__gr.html#aaba1d9458e32389c21c3d899f9cb9313">ARM_DRIVER_USBH</a>
 , <a class="el" href="group__usbh__hci__gr.html#a7a41769405bb3bb4cc9eaba26cf220d4">ARM_DRIVER_USBH_HCI</a>
+, <a class="el" href="group__wifi__interface__gr.html#a1ced805656e067b5635f1af2292b69e1">ARM_DRIVER_WIFI</a>
 </li>
 <li>GetClock
 : <a class="el" href="group__can__interface__gr.html#a21063f38e762cf29dfd3f5991ee936e2">ARM_DRIVER_CAN</a>
@@ -198,9 +199,18 @@
 <li>GetModemStatus
 : <a class="el" href="group__usart__interface__gr.html#a517a7a98a444126734782beb4951a9db">ARM_DRIVER_USART</a>
 </li>
+<li>GetModuleInfo
+: <a class="el" href="group__wifi__interface__gr.html#aa78e745bbf8257a3438700e4e6a8d222">ARM_DRIVER_WIFI</a>
+</li>
+<li>GetNetInfo
+: <a class="el" href="group__wifi__interface__gr.html#ac17eb39c11b7797b88a1f6e0f8cc772d">ARM_DRIVER_WIFI</a>
+</li>
 <li>GetNextBlock
 : <a class="el" href="group__storage__interface__gr.html#adda93f4d74519247517f036c4551dd13">ARM_DRIVER_STORAGE</a>
 </li>
+<li>GetOption
+: <a class="el" href="group__wifi__interface__gr.html#af264a580d36c33a649b64be845458b03">ARM_DRIVER_WIFI</a>
+</li>
 <li>GetRxCount
 : <a class="el" href="group__sai__interface__gr.html#a758c7822edf6ac18f82eb33c9dc09d71">ARM_DRIVER_SAI</a>
 , <a class="el" href="group__usart__interface__gr.html#a758c7822edf6ac18f82eb33c9dc09d71">ARM_DRIVER_USART</a>
@@ -244,6 +254,7 @@
 , <a class="el" href="group__usbd__interface__gr.html#a8834b281da48583845c044a81566c1b3">ARM_DRIVER_USBD</a>
 , <a class="el" href="group__usbh__host__gr.html#a8834b281da48583845c044a81566c1b3">ARM_DRIVER_USBH</a>
 , <a class="el" href="group__usbh__hci__gr.html#a8834b281da48583845c044a81566c1b3">ARM_DRIVER_USBH_HCI</a>
+, <a class="el" href="group__wifi__interface__gr.html#a8834b281da48583845c044a81566c1b3">ARM_DRIVER_WIFI</a>
 </li>
 </ul>
 </div><!-- contents -->
@@ -251,7 +262,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_vars_h.html b/docs/Driver/html/functions_vars_h.html
index 872624b..3b244ef 100644
--- a/docs/Driver/html/functions_vars_h.html
+++ b/docs/Driver/html/functions_vars_h.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -156,7 +156,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_vars_i.html b/docs/Driver/html/functions_vars_i.html
index 552750a..50185b5 100644
--- a/docs/Driver/html/functions_vars_i.html
+++ b/docs/Driver/html/functions_vars_i.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -165,6 +165,7 @@
 , <a class="el" href="group__usbd__interface__gr.html#a84439aa5677d330d257a4b43e48d6426">ARM_DRIVER_USBD</a>
 , <a class="el" href="group__usbh__host__gr.html#a5bf141e46b7ced3abe3466cae4d811fb">ARM_DRIVER_USBH</a>
 , <a class="el" href="group__usbh__hci__gr.html#a40cbaad9fd2458b1008d31e1469903bb">ARM_DRIVER_USBH_HCI</a>
+, <a class="el" href="group__wifi__interface__gr.html#a99e597db8e61d0ff834561cb710e61ad">ARM_DRIVER_WIFI</a>
 </li>
 <li>InquireECC
 : <a class="el" href="group__nand__interface__gr.html#aecd239806e9f08b77ce0d00f61e78cf8">ARM_DRIVER_NAND</a>
@@ -175,16 +176,25 @@
 <li>internal_loopback
 : <a class="el" href="group__can__interface__gr.html#af19cdbb26d3496ed7dd63a59a7c7711f">ARM_CAN_CAPABILITIES</a>
 </li>
+<li>ip
+: <a class="el" href="group__wifi__control__gr.html#a69ddb9c845da426f636d9dd0dbed4e7e">ARM_WIFI_CAPABILITIES</a>
+</li>
+<li>ip6
+: <a class="el" href="group__wifi__control__gr.html#aad13478539ad093fabafd1804acac4a2">ARM_WIFI_CAPABILITIES</a>
+</li>
 <li>irda
 : <a class="el" href="group__usart__interface__gr.html#a9a72c5f0209a9ccf840fc196e9a9dffa">ARM_USART_CAPABILITIES</a>
 </li>
+<li>IsConnected
+: <a class="el" href="group__wifi__interface__gr.html#ab9771e89a155d316e0b44d3ee89081d3">ARM_DRIVER_WIFI</a>
+</li>
 </ul>
 </div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_vars_l.html b/docs/Driver/html/functions_vars_l.html
index 6f1b8b3..41be0bd 100644
--- a/docs/Driver/html/functions_vars_l.html
+++ b/docs/Driver/html/functions_vars_l.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -156,7 +156,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_vars_m.html b/docs/Driver/html/functions_vars_m.html
index f82fa06..294a281 100644
--- a/docs/Driver/html/functions_vars_m.html
+++ b/docs/Driver/html/functions_vars_m.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -207,7 +207,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_vars_n.html b/docs/Driver/html/functions_vars_n.html
index 1d845ab..4da91f3 100644
--- a/docs/Driver/html/functions_vars_n.html
+++ b/docs/Driver/html/functions_vars_n.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -159,7 +159,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_vars_o.html b/docs/Driver/html/functions_vars_o.html
index b178a90..4c8c188 100644
--- a/docs/Driver/html/functions_vars_o.html
+++ b/docs/Driver/html/functions_vars_o.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -168,7 +168,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_vars_p.html b/docs/Driver/html/functions_vars_p.html
index c43a198..ce4c4db 100644
--- a/docs/Driver/html/functions_vars_p.html
+++ b/docs/Driver/html/functions_vars_p.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -157,12 +157,22 @@
 : <a class="el" href="group__flash__interface__gr.html#a9dd3e47e968a8f6beb5d88c6d1b7ebe9">ARM_FLASH_INFO</a>
 , <a class="el" href="group__nand__interface__gr.html#a9dd3e47e968a8f6beb5d88c6d1b7ebe9">ARM_NAND_ECC_INFO</a>
 </li>
+<li>pass
+: <a class="el" href="group__wifi__management__gr.html#a3bef28806edf8f4c8cb82584b7e8c3cb">ARM_WIFI_CONFIG_t</a>
+, <a class="el" href="group__wifi__management__gr.html#a97ae3ac37e362cf8e7e3a9e18b7c806f">ARM_WIFI_NET_INFO_t</a>
+</li>
 <li>PHY_Read
 : <a class="el" href="group__eth__mac__interface__gr.html#a0f2ddb734e4242077275761400b26e35">ARM_DRIVER_ETH_MAC</a>
 </li>
 <li>PHY_Write
 : <a class="el" href="group__eth__mac__interface__gr.html#ac3efe9bdc31c3b1d7fd8eb82bbfb4c13">ARM_DRIVER_ETH_MAC</a>
 </li>
+<li>Ping
+: <a class="el" href="group__wifi__interface__gr.html#ad8f218e434e2f327335b16cdb4f21f65">ARM_DRIVER_WIFI</a>
+</li>
+<li>ping
+: <a class="el" href="group__wifi__control__gr.html#aef01bbaa48bdb4fba71684d8f31eb0b1">ARM_WIFI_CAPABILITIES</a>
+</li>
 <li>PipeCreate
 : <a class="el" href="group__usbh__host__gr.html#a7ce5ca579a8c535434187ad05f596fbd">ARM_DRIVER_USBH</a>
 </li>
@@ -219,6 +229,7 @@
 , <a class="el" href="group__usbd__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef">ARM_DRIVER_USBD</a>
 , <a class="el" href="group__usbh__host__gr.html#aba8f1c8019af95ffe19c32403e3240ef">ARM_DRIVER_USBH</a>
 , <a class="el" href="group__usbh__hci__gr.html#aba8f1c8019af95ffe19c32403e3240ef">ARM_DRIVER_USBH_HCI</a>
+, <a class="el" href="group__wifi__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef">ARM_DRIVER_WIFI</a>
 </li>
 <li>precision_timer
 : <a class="el" href="group__eth__mac__interface__gr.html#a881a863974d32f95d7829f768ac47aa2">ARM_ETH_MAC_CAPABILITIES</a>
@@ -267,7 +278,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_vars_r.html b/docs/Driver/html/functions_vars_r.html
index 1f98c8f..4aa27d9 100644
--- a/docs/Driver/html/functions_vars_r.html
+++ b/docs/Driver/html/functions_vars_r.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -215,6 +215,8 @@
 , <a class="el" href="group__usbh__host__gr.html#aa43c4c21b173ada1b6b7568956f0d650">ARM_USBH_CAPABILITIES</a>
 , <a class="el" href="group__usbh__hci__gr.html#aa43c4c21b173ada1b6b7568956f0d650">ARM_USBH_HCI_CAPABILITIES</a>
 , <a class="el" href="group__usbh__host__gr.html#aa43c4c21b173ada1b6b7568956f0d650">ARM_USBH_PORT_STATE</a>
+, <a class="el" href="group__wifi__control__gr.html#aa43c4c21b173ada1b6b7568956f0d650">ARM_WIFI_CAPABILITIES</a>
+, <a class="el" href="group__wifi__management__gr.html#acb7bc06bed6f6408d719334fc41698c7">ARM_WIFI_CONFIG_t</a>
 </li>
 <li>reserved1
 : <a class="el" href="Driver__Storage_8h.html#aef9bb556c1530f5d648fd57e73b9a105">ARM_STORAGE_SECURITY_FEATURES</a>
@@ -238,6 +240,10 @@
 <li>rollback_protection
 : <a class="el" href="Driver__Storage_8h.html#affe0253b35f41c44ea06ae1e87d91012">ARM_STORAGE_SECURITY_FEATURES</a>
 </li>
+<li>rssi
+: <a class="el" href="group__wifi__management__gr.html#afb67d818cd76cce8057affabcb1979a6">ARM_WIFI_NET_INFO_t</a>
+, <a class="el" href="group__wifi__management__gr.html#afb67d818cd76cce8057affabcb1979a6">ARM_WIFI_SCAN_INFO_t</a>
+</li>
 <li>rst_n
 : <a class="el" href="group__mci__interface__gr.html#a2e8bd27f2c5c3093c4fec557890b97d4">ARM_MCI_CAPABILITIES</a>
 </li>
@@ -279,7 +285,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_vars_s.html b/docs/Driver/html/functions_vars_s.html
index 605640a..08409a3 100644
--- a/docs/Driver/html/functions_vars_s.html
+++ b/docs/Driver/html/functions_vars_s.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -147,6 +147,9 @@
 &#160;
 
 <h3><a class="anchor" id="index_s"></a>- s -</h3><ul>
+<li>Scan
+: <a class="el" href="group__wifi__interface__gr.html#a51d027ef7046c413372103aa952772fb">ARM_DRIVER_WIFI</a>
+</li>
 <li>sdio_interrupt
 : <a class="el" href="group__mci__interface__gr.html#a61e2a440b27d7d22c866ad4427f4b825">ARM_MCI_CAPABILITIES</a>
 , <a class="el" href="group__mci__interface__gr.html#a61e2a440b27d7d22c866ad4427f4b825">ARM_MCI_STATUS</a>
@@ -168,6 +171,9 @@
 </li>
 <li>security
 : <a class="el" href="group__storage__interface__gr.html#aee43dd20848f45fe05efc10a8198817a">ARM_STORAGE_INFO</a>
+, <a class="el" href="group__wifi__management__gr.html#a5cd97d88131cf38bcc75189f9569f9b7">ARM_WIFI_CONFIG_t</a>
+, <a class="el" href="group__wifi__management__gr.html#a5cd97d88131cf38bcc75189f9569f9b7">ARM_WIFI_NET_INFO_t</a>
+, <a class="el" href="group__wifi__management__gr.html#a5cd97d88131cf38bcc75189f9569f9b7">ARM_WIFI_SCAN_INFO_t</a>
 </li>
 <li>Send
 : <a class="el" href="group__sai__interface__gr.html#a44eedddf4428cf4b98883b6c27d31922">ARM_DRIVER_SAI</a>
@@ -206,6 +212,9 @@
 <li>SetModemControl
 : <a class="el" href="group__usart__interface__gr.html#af6703d4078818df27ab9f8a7a8ad7b7b">ARM_DRIVER_USART</a>
 </li>
+<li>SetOption
+: <a class="el" href="group__wifi__interface__gr.html#a6b5e1c7fcea96ff13f6fd16d57c8b68f">ARM_DRIVER_WIFI</a>
+</li>
 <li>SetupTransfer
 : <a class="el" href="group__mci__interface__gr.html#adc63bab660e8304d78faa1ac429e792b">ARM_DRIVER_MCI</a>
 </li>
@@ -233,6 +242,51 @@
 <li>smart_card_clock
 : <a class="el" href="group__usart__interface__gr.html#a7b3c14ea1b5e9ba0a37ebc05fcfd51a6">ARM_USART_CAPABILITIES</a>
 </li>
+<li>SocketAccept
+: <a class="el" href="group__wifi__interface__gr.html#a66bb43c1e713efe7758b6e100c13ed69">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketBind
+: <a class="el" href="group__wifi__interface__gr.html#afcbc0c2bb3639584521ffeaaffc5a475">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketClose
+: <a class="el" href="group__wifi__interface__gr.html#a471a1be6d9adbccb83ca1f268643031c">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketConnect
+: <a class="el" href="group__wifi__interface__gr.html#a45cbca28d9866f2ec2ad9df830787dd7">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketCreate
+: <a class="el" href="group__wifi__interface__gr.html#aa26f0cefe99161484741977a5443e92c">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketGetHostByName
+: <a class="el" href="group__wifi__interface__gr.html#a62b2512cbaef03d26eb9c1e3004c3364">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketGetOpt
+: <a class="el" href="group__wifi__interface__gr.html#a4771324fb6f39fb2837e98d9f0ed48ed">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketGetPeerName
+: <a class="el" href="group__wifi__interface__gr.html#ac45fbc58fd00742cbe712bf26d857359">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketGetSockName
+: <a class="el" href="group__wifi__interface__gr.html#ab7c3e0211c87bf99e9c42b17a2249f50">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketListen
+: <a class="el" href="group__wifi__interface__gr.html#a628706c754e1793ec864453a5b517d5c">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketRecv
+: <a class="el" href="group__wifi__interface__gr.html#aaad6683992e76e3dd9a16eb6b7d43cf4">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketRecvFrom
+: <a class="el" href="group__wifi__interface__gr.html#a4343cf48bbcfb2101a422d90c34f84e6">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketSend
+: <a class="el" href="group__wifi__interface__gr.html#a7ff47d391831d547d310dd66f22c2942">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketSendTo
+: <a class="el" href="group__wifi__interface__gr.html#a248a293faea6f6e1cb781b8153e468fa">ARM_DRIVER_WIFI</a>
+</li>
+<li>SocketSetOpt
+: <a class="el" href="group__wifi__interface__gr.html#a7019060d0869a7dfae8e31aedb46815d">ARM_DRIVER_WIFI</a>
+</li>
 <li>software_attacks
 : <a class="el" href="Driver__Storage_8h.html#a1b6a0329dd65f25a0ab22496ab708306">ARM_STORAGE_SECURITY_FEATURES</a>
 </li>
@@ -241,9 +295,20 @@
 , <a class="el" href="group__usbd__interface__gr.html#a220859a8b5da0232739a11cbe7f79fc5">ARM_USBD_STATE</a>
 , <a class="el" href="group__usbh__host__gr.html#a220859a8b5da0232739a11cbe7f79fc5">ARM_USBH_PORT_STATE</a>
 </li>
+<li>ssid
+: <a class="el" href="group__wifi__management__gr.html#a587ba0cb07f02913598610049a3bbb79">ARM_WIFI_CONFIG_t</a>
+, <a class="el" href="group__wifi__management__gr.html#ae7eccb3e4df8625b86b5572fc16c37c3">ARM_WIFI_NET_INFO_t</a>
+, <a class="el" href="group__wifi__management__gr.html#ae7eccb3e4df8625b86b5572fc16c37c3">ARM_WIFI_SCAN_INFO_t</a>
+</li>
 <li>start
 : <a class="el" href="group__flash__interface__gr.html#a61eb63d26b2fa6c2971603ceccffb14b">ARM_FLASH_SECTOR</a>
 </li>
+<li>station
+: <a class="el" href="group__wifi__control__gr.html#a3c9e76f6560429efd6dcc41ffd4b67b9">ARM_WIFI_CAPABILITIES</a>
+</li>
+<li>station_ap
+: <a class="el" href="group__wifi__control__gr.html#ad280904e2429375205c09e53fe8cdcb1">ARM_WIFI_CAPABILITIES</a>
+</li>
 <li>suspend_resume
 : <a class="el" href="group__mci__interface__gr.html#abb03f0187e4658f417b5a24cac33eed9">ARM_MCI_CAPABILITIES</a>
 </li>
@@ -262,7 +327,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_vars_t.html b/docs/Driver/html/functions_vars_t.html
index 79e403c..d3a3a84 100644
--- a/docs/Driver/html/functions_vars_t.html
+++ b/docs/Driver/html/functions_vars_t.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -195,7 +195,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_vars_u.html b/docs/Driver/html/functions_vars_u.html
index ad3603d..7308b61 100644
--- a/docs/Driver/html/functions_vars_u.html
+++ b/docs/Driver/html/functions_vars_u.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -186,6 +186,7 @@
 , <a class="el" href="group__usbd__interface__gr.html#adcf20681a1402869ecb5c6447fada17b">ARM_DRIVER_USBD</a>
 , <a class="el" href="group__usbh__host__gr.html#adcf20681a1402869ecb5c6447fada17b">ARM_DRIVER_USBH</a>
 , <a class="el" href="group__usbh__hci__gr.html#adcf20681a1402869ecb5c6447fada17b">ARM_DRIVER_USBH_HCI</a>
+, <a class="el" href="group__wifi__interface__gr.html#adcf20681a1402869ecb5c6447fada17b">ARM_DRIVER_WIFI</a>
 </li>
 <li>unit_state
 : <a class="el" href="group__can__interface__gr.html#a96ec94acab56690b3801e3c5fbd09fa2">ARM_CAN_STATUS</a>
@@ -196,7 +197,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_vars_v.html b/docs/Driver/html/functions_vars_v.html
index 8a77cae..e7805a2 100644
--- a/docs/Driver/html/functions_vars_v.html
+++ b/docs/Driver/html/functions_vars_v.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -188,7 +188,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_vars_w.html b/docs/Driver/html/functions_vars_w.html
index 46f86d4..1bd2197 100644
--- a/docs/Driver/html/functions_vars_w.html
+++ b/docs/Driver/html/functions_vars_w.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -153,6 +153,18 @@
 <li>wp_state
 : <a class="el" href="group__mci__interface__gr.html#a02df0162d3a653c36158a7b6a76f6175">ARM_MCI_CAPABILITIES</a>
 </li>
+<li>wps_ap
+: <a class="el" href="group__wifi__control__gr.html#a7689c7dd824016b1962854a86d23d141">ARM_WIFI_CAPABILITIES</a>
+</li>
+<li>wps_method
+: <a class="el" href="group__wifi__management__gr.html#a5e263198499fb98f97d40a9b82579175">ARM_WIFI_CONFIG_t</a>
+</li>
+<li>wps_pin
+: <a class="el" href="group__wifi__management__gr.html#a2047d60666390ea4755ce22603969c4c">ARM_WIFI_CONFIG_t</a>
+</li>
+<li>wps_station
+: <a class="el" href="group__wifi__control__gr.html#a87476544767703fc9f45f81b16cd4429">ARM_WIFI_CAPABILITIES</a>
+</li>
 <li>WriteData
 : <a class="el" href="group__nand__interface__gr.html#a78393d355e539c6f845b33417da60a7e">ARM_DRIVER_NAND</a>
 </li>
@@ -165,7 +177,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/functions_w.html b/docs/Driver/html/functions_w.html
index b39ef56..ca99ac0 100644
--- a/docs/Driver/html/functions_w.html
+++ b/docs/Driver/html/functions_w.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -153,6 +153,18 @@
 <li>wp_state
 : <a class="el" href="group__mci__interface__gr.html#a02df0162d3a653c36158a7b6a76f6175">ARM_MCI_CAPABILITIES</a>
 </li>
+<li>wps_ap
+: <a class="el" href="group__wifi__control__gr.html#a7689c7dd824016b1962854a86d23d141">ARM_WIFI_CAPABILITIES</a>
+</li>
+<li>wps_method
+: <a class="el" href="group__wifi__management__gr.html#a5e263198499fb98f97d40a9b82579175">ARM_WIFI_CONFIG_t</a>
+</li>
+<li>wps_pin
+: <a class="el" href="group__wifi__management__gr.html#a2047d60666390ea4755ce22603969c4c">ARM_WIFI_CONFIG_t</a>
+</li>
+<li>wps_station
+: <a class="el" href="group__wifi__control__gr.html#a87476544767703fc9f45f81b16cd4429">ARM_WIFI_CAPABILITIES</a>
+</li>
 <li>WriteData
 : <a class="el" href="group__nand__interface__gr.html#a78393d355e539c6f845b33417da60a7e">ARM_DRIVER_NAND</a>
 </li>
@@ -165,7 +177,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals.html b/docs/Driver/html/globals.html
index 5800d39..b09ce8a 100644
--- a/docs/Driver/html/globals.html
+++ b/docs/Driver/html/globals.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -101,6 +101,7 @@
       <li><a href="globals_r.html#index_r"><span>r</span></a></li>
       <li><a href="globals_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -148,13 +149,16 @@
 <li>_ARM_Driver_Storage_
 : <a class="el" href="Driver__Storage_8h.html#a21777a6487158bdc1f113996e65ff0bd">Driver_Storage.h</a>
 </li>
+<li>_ARM_Driver_WiFi_
+: <a class="el" href="Driver__WiFi_8h.html#ad092e18422a937dd1837ed4fa5751499">Driver_WiFi.h</a>
+</li>
 </ul>
 </div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_c.html b/docs/Driver/html/globals_c.html
index d8c709c..ce5b94c 100644
--- a/docs/Driver/html/globals_c.html
+++ b/docs/Driver/html/globals_c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -101,6 +101,7 @@
       <li><a href="globals_r.html#index_r"><span>r</span></a></li>
       <li><a href="globals_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -412,7 +413,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_d.html b/docs/Driver/html/globals_d.html
index 0632cc6..1a5be8b 100644
--- a/docs/Driver/html/globals_d.html
+++ b/docs/Driver/html/globals_d.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -101,6 +101,7 @@
       <li><a href="globals_r.html#index_r"><span>r</span></a></li>
       <li><a href="globals_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -172,13 +173,16 @@
 <li>ARM_DRIVER_VERSION_MAJOR_MINOR
 : <a class="el" href="Driver__Common_8h.html#a43c7ca1eb0786d818624246c09932a74">Driver_Common.h</a>
 </li>
+<li>ARM_Driver_WiFi_
+: <a class="el" href="Driver__WiFi_8h.html#a035999f5a44af74ed7c6576feacaa2ce">Driver_WiFi.h</a>
+</li>
 </ul>
 </div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_defs.html b/docs/Driver/html/globals_defs.html
index 95226b6..dd86537 100644
--- a/docs/Driver/html/globals_defs.html
+++ b/docs/Driver/html/globals_defs.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -100,6 +100,7 @@
       <li><a href="globals_defs_r.html#index_r"><span>r</span></a></li>
       <li><a href="globals_defs_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_defs_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_defs_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -147,13 +148,16 @@
 <li>_ARM_Driver_Storage_
 : <a class="el" href="Driver__Storage_8h.html#a21777a6487158bdc1f113996e65ff0bd">Driver_Storage.h</a>
 </li>
+<li>_ARM_Driver_WiFi_
+: <a class="el" href="Driver__WiFi_8h.html#ad092e18422a937dd1837ed4fa5751499">Driver_WiFi.h</a>
+</li>
 </ul>
 </div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_defs_c.html b/docs/Driver/html/globals_defs_c.html
index 9bda5bb..264a0f0 100644
--- a/docs/Driver/html/globals_defs_c.html
+++ b/docs/Driver/html/globals_defs_c.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -100,6 +100,7 @@
       <li><a href="globals_defs_r.html#index_r"><span>r</span></a></li>
       <li><a href="globals_defs_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_defs_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_defs_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -285,7 +286,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_defs_d.html b/docs/Driver/html/globals_defs_d.html
index 60dcaa9..b8aff68 100644
--- a/docs/Driver/html/globals_defs_d.html
+++ b/docs/Driver/html/globals_defs_d.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -100,6 +100,7 @@
       <li><a href="globals_defs_r.html#index_r"><span>r</span></a></li>
       <li><a href="globals_defs_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_defs_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_defs_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -171,13 +172,16 @@
 <li>ARM_DRIVER_VERSION_MAJOR_MINOR
 : <a class="el" href="Driver__Common_8h.html#a43c7ca1eb0786d818624246c09932a74">Driver_Common.h</a>
 </li>
+<li>ARM_Driver_WiFi_
+: <a class="el" href="Driver__WiFi_8h.html#a035999f5a44af74ed7c6576feacaa2ce">Driver_WiFi.h</a>
+</li>
 </ul>
 </div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_defs_e.html b/docs/Driver/html/globals_defs_e.html
index 824eb6a..320fb51 100644
--- a/docs/Driver/html/globals_defs_e.html
+++ b/docs/Driver/html/globals_defs_e.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -100,6 +100,7 @@
       <li><a href="globals_defs_r.html#index_r"><span>r</span></a></li>
       <li><a href="globals_defs_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_defs_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_defs_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -318,7 +319,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_defs_f.html b/docs/Driver/html/globals_defs_f.html
index 48fc213..a16755e 100644
--- a/docs/Driver/html/globals_defs_f.html
+++ b/docs/Driver/html/globals_defs_f.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -100,6 +100,7 @@
       <li><a href="globals_defs_r.html#index_r"><span>r</span></a></li>
       <li><a href="globals_defs_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_defs_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_defs_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -153,7 +154,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_defs_i.html b/docs/Driver/html/globals_defs_i.html
index 1eb8b26..e047fa3 100644
--- a/docs/Driver/html/globals_defs_i.html
+++ b/docs/Driver/html/globals_defs_i.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -100,6 +100,7 @@
       <li><a href="globals_defs_r.html#index_r"><span>r</span></a></li>
       <li><a href="globals_defs_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_defs_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_defs_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -201,7 +202,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_defs_m.html b/docs/Driver/html/globals_defs_m.html
index b839c89..e1405a8 100644
--- a/docs/Driver/html/globals_defs_m.html
+++ b/docs/Driver/html/globals_defs_m.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -100,6 +100,7 @@
       <li><a href="globals_defs_r.html#index_r"><span>r</span></a></li>
       <li><a href="globals_defs_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_defs_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_defs_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -375,7 +376,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_defs_n.html b/docs/Driver/html/globals_defs_n.html
index 430f6b7..697f3c2 100644
--- a/docs/Driver/html/globals_defs_n.html
+++ b/docs/Driver/html/globals_defs_n.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -100,6 +100,7 @@
       <li><a href="globals_defs_r.html#index_r"><span>r</span></a></li>
       <li><a href="globals_defs_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_defs_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_defs_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -423,7 +424,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_defs_r.html b/docs/Driver/html/globals_defs_r.html
index 40f9fb8..dbb7e44 100644
--- a/docs/Driver/html/globals_defs_r.html
+++ b/docs/Driver/html/globals_defs_r.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -100,6 +100,7 @@
       <li class="current"><a href="globals_defs_r.html#index_r"><span>r</span></a></li>
       <li><a href="globals_defs_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_defs_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_defs_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -156,7 +157,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_defs_s.html b/docs/Driver/html/globals_defs_s.html
index 5b92c86..33494f5 100644
--- a/docs/Driver/html/globals_defs_s.html
+++ b/docs/Driver/html/globals_defs_s.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -100,6 +100,7 @@
       <li><a href="globals_defs_r.html#index_r"><span>r</span></a></li>
       <li class="current"><a href="globals_defs_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_defs_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_defs_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -426,6 +427,87 @@
 <li>ARM_SAI_SYNCHRONOUS
 : <a class="el" href="group__sai__sync__control.html#gad2ad5406c30c353e80f54b40b3de5db8">Driver_SAI.h</a>
 </li>
+<li>ARM_SOCKET_AF_INET
+: <a class="el" href="group__wifi__addr__family.html#ga1a17023d92374b4f2d963aa7ac1c4e17">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_AF_INET6
+: <a class="el" href="group__wifi__addr__family.html#gad50c95421ffbc6eec5f8458b2e170c26">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_EADDRINUSE
+: <a class="el" href="group__wifi__soc__func.html#ga4fa475e41c3db0ada798249696e745a1">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_EAGAIN
+: <a class="el" href="group__wifi__soc__func.html#ga699dbd55e543fd38d333cf1d4470d8db">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_EALREADY
+: <a class="el" href="group__wifi__soc__func.html#ga9df0d5bd422102d9d4ebddc869d358e0">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_ECONNABORTED
+: <a class="el" href="group__wifi__soc__func.html#ga7e64d6bd00a2f6e30ece3ff0f02b5b27">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_ECONNREFUSED
+: <a class="el" href="group__wifi__soc__func.html#gaaf535c9d325172ff8ef02964af218cb0">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_ECONNRESET
+: <a class="el" href="group__wifi__soc__func.html#ga87fa238861921ba1b272019a83b04676">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_EHOSTNOTFOUND
+: <a class="el" href="group__wifi__soc__func.html#ga4d5d38e9a7d5907a3de4165476640cd4">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_EINPROGRESS
+: <a class="el" href="group__wifi__soc__func.html#gad7f3e077f7721a202012378ddcefb83f">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_EINVAL
+: <a class="el" href="group__wifi__soc__func.html#ga695aa5c5329602d9465fbc6c22fc9978">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_EISCONN
+: <a class="el" href="group__wifi__soc__func.html#gaa1e456c6cea2f6579158818387557f1a">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_ENOMEM
+: <a class="el" href="group__wifi__soc__func.html#ga68e88e80822f779361407d005659fc6c">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_ENOTCONN
+: <a class="el" href="group__wifi__soc__func.html#ga0bde95e313d907032074583bc06b24a1">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_ENOTSUP
+: <a class="el" href="group__wifi__soc__func.html#ga95ab80319bfbc5413fc5334e3d5ce5d2">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_ERROR
+: <a class="el" href="group__wifi__soc__func.html#ga2f3db9fdae2366238054ff8a8e8ef97c">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_ESOCK
+: <a class="el" href="group__wifi__soc__func.html#ga535e069b83aafcf70dd089e6097bceef">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_ETIMEDOUT
+: <a class="el" href="group__wifi__soc__func.html#ga320ffeeb44d583c0216b24d6e1009d9f">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_IO_FIONBIO
+: <a class="el" href="group__wifi__soc__opt.html#gac6fa12bbc640209a6b63f8cec282f961">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_IPPROTO_TCP
+: <a class="el" href="group__wifi__protocol.html#gaf07cfcf1b65ea6c6be0629459a2ba781">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_IPPROTO_UDP
+: <a class="el" href="group__wifi__protocol.html#gabacbead83c772f5737b25b4fc390e16d">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_SO_KEEPALIVE
+: <a class="el" href="group__wifi__soc__opt.html#ga925f699a931ccbfb87eb5f3d36cbe405">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_SO_RCVTIMEO
+: <a class="el" href="group__wifi__soc__opt.html#ga6f76374467b5580ab0e440da1c39024e">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_SO_SNDTIMEO
+: <a class="el" href="group__wifi__soc__opt.html#gad633987fb5b3478b54d3269b1b03497a">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_SO_TYPE
+: <a class="el" href="group__wifi__soc__opt.html#ga0466a14ce32b2cc28887735b632f3e63">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_SOCK_DGRAM
+: <a class="el" href="group__wifi__socket__type.html#gaced5f33eda2fc38a8303cd11a0d76fab">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_SOCK_STREAM
+: <a class="el" href="group__wifi__socket__type.html#ga9567d5735856190b2ae9cc39f68637f1">Driver_WiFi.h</a>
+</li>
 <li>ARM_SPI_ABORT_TRANSFER
 : <a class="el" href="group__spi__misc__ctrls.html#ga44708b80e48984be099cd6eb11780dc3">Driver_SPI.h</a>
 </li>
@@ -612,7 +694,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_defs_u.html b/docs/Driver/html/globals_defs_u.html
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       <li class="current"><a href="globals_defs_u.html#index_u"><span>u</span></a></li>
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@@ -615,7 +616,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_defs_w.html b/docs/Driver/html/globals_defs_w.html
new file mode 100644
index 0000000..d27e8fe
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+++ b/docs/Driver/html/globals_defs_w.html
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+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>Globals</title>
+<title>CMSIS-Driver: Globals</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
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+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Driver
+   &#160;<span id="projectnumber">Version 2.7.1</span>
+   </div>
+   <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
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+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li><a href="modules.html"><span>Reference</span></a></li>
+      <li>
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+      </li>
+    </ul>
+  </div>
+  <div id="navrow3" class="tabs2">
+    <ul class="tablist">
+      <li><a href="globals.html"><span>All</span></a></li>
+      <li><a href="globals_func.html"><span>Functions</span></a></li>
+      <li><a href="globals_type.html"><span>Typedefs</span></a></li>
+      <li><a href="globals_enum.html"><span>Enumerations</span></a></li>
+      <li><a href="globals_eval.html"><span>Enumerator</span></a></li>
+      <li class="current"><a href="globals_defs.html"><span>Macros</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow4" class="tabs3">
+    <ul class="tablist">
+      <li><a href="globals_defs.html#index__"><span>_</span></a></li>
+      <li><a href="globals_defs_c.html#index_c"><span>c</span></a></li>
+      <li><a href="globals_defs_d.html#index_d"><span>d</span></a></li>
+      <li><a href="globals_defs_e.html#index_e"><span>e</span></a></li>
+      <li><a href="globals_defs_f.html#index_f"><span>f</span></a></li>
+      <li><a href="globals_defs_i.html#index_i"><span>i</span></a></li>
+      <li><a href="globals_defs_m.html#index_m"><span>m</span></a></li>
+      <li><a href="globals_defs_n.html#index_n"><span>n</span></a></li>
+      <li><a href="globals_defs_r.html#index_r"><span>r</span></a></li>
+      <li><a href="globals_defs_s.html#index_s"><span>s</span></a></li>
+      <li><a href="globals_defs_u.html#index_u"><span>u</span></a></li>
+      <li class="current"><a href="globals_defs_w.html#index_w"><span>w</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('globals_defs_w.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="contents">
+&#160;
+
+<h3><a class="anchor" id="index_w"></a>- w -</h3><ul>
+<li>ARM_WIFI_API_VERSION
+: <a class="el" href="Driver__WiFi_8h.html#aa6a3705716b58d58fdbf72d8308f1383">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_BEACON
+: <a class="el" href="group__WiFi__option.html#ga6171d24c661b54465ced2dae7980897c">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_BSSID
+: <a class="el" href="group__WiFi__option.html#gae84cbf48cd5168371621fc5f78aac0a4">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_DTIM
+: <a class="el" href="group__WiFi__option.html#ga947c297f1364993524bf515beba296f1">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_EVENT_AP_CONNECT
+: <a class="el" href="group__wifi__event.html#ga4a87b9a3c3a404e3917d54df98469a62">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_EVENT_AP_DISCONNECT
+: <a class="el" href="group__wifi__event.html#ga271e73cda122e7ec3c5a5ca71d44eae3">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_EVENT_ETH_RX_FRAME
+: <a class="el" href="group__wifi__event.html#ga833f2c7a47bd2523d7a62ff6506a997f">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP
+: <a class="el" href="group__WiFi__option.html#ga50ee1ca627ebe536cae0ab7155ed1d17">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP6_DHCP_MODE
+: <a class="el" href="group__WiFi__option.html#ga6b864e923870ec473ee0c876d1a3b032">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP6_DHCP_OFF
+: <a class="el" href="group__wifi__dhcp__v6__mode.html#gaf200f735500dc647bc665f60a2df7552">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP6_DHCP_STATEFULL
+: <a class="el" href="group__wifi__dhcp__v6__mode.html#ga205f9604967e290c053952cab850841a">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP6_DHCP_STATELESS
+: <a class="el" href="group__wifi__dhcp__v6__mode.html#ga9d63d8029532c586703c77f1c8f990fc">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP6_DNS1
+: <a class="el" href="group__WiFi__option.html#gaeb86e25e3b7c6360c977b05b40ff7676">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP6_DNS2
+: <a class="el" href="group__WiFi__option.html#ga24dee294436d575b47c7a314cba1654d">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP6_GATEWAY
+: <a class="el" href="group__WiFi__option.html#ga218d49572adcac8d678f7a8ae2f0c67e">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP6_GLOBAL
+: <a class="el" href="group__WiFi__option.html#gaeac3fc297297b9bf5f2b5cf84788d77f">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP6_LINK_LOCAL
+: <a class="el" href="group__WiFi__option.html#ga11fdcc3403a43187158434a87fdfb83c">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP6_SUBNET_PREFIX_LEN
+: <a class="el" href="group__WiFi__option.html#ga545cb7e1da8715966bee7c7ff9d427d8">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP_DHCP
+: <a class="el" href="group__WiFi__option.html#gad37e95b697872782973057ae94c085a9">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP_DHCP_LEASE_TIME
+: <a class="el" href="group__WiFi__option.html#ga78ec2d08d4f1d3ce486b40a329bd8713">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP_DHCP_POOL_BEGIN
+: <a class="el" href="group__WiFi__option.html#ga10065d0d9cb7530e0747be83ba9e4c35">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP_DHCP_POOL_END
+: <a class="el" href="group__WiFi__option.html#ga4054f0e4045a25928531be73fb9d6b45">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP_DNS1
+: <a class="el" href="group__WiFi__option.html#ga657f5c6c504defe04422dbe468c6c134">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP_DNS2
+: <a class="el" href="group__WiFi__option.html#ga5a5fa4c298b16d0acd0a71f873802d31">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP_GATEWAY
+: <a class="el" href="group__WiFi__option.html#gad0c719fedd39d738ee7f6fd3c7317169">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP_SUBNET_MASK
+: <a class="el" href="group__WiFi__option.html#gac2603479ebad0ed05413e1e01b8a649f">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_LP_TIMER
+: <a class="el" href="group__WiFi__option.html#ga77e38a3d5d2fe8c04aebaf8d24e1b8d4">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_MAC
+: <a class="el" href="group__WiFi__option.html#gafefb0fe1e5cdfb71f7f8cc7606840865">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_SECURITY_OPEN
+: <a class="el" href="group__wifi__sec__type.html#gab5b0d06b14b916c244c42ad8a3053d1d">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_SECURITY_UNKNOWN
+: <a class="el" href="group__wifi__sec__type.html#ga1c0904e056c3f720fe38b903230d9f89">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_SECURITY_WEP
+: <a class="el" href="group__wifi__sec__type.html#ga75d8f1830db25a9f0b1390397186ddd5">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_SECURITY_WPA
+: <a class="el" href="group__wifi__sec__type.html#ga40f2c6844d3d81bbfedaa96e72402b35">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_SECURITY_WPA2
+: <a class="el" href="group__wifi__sec__type.html#gab4622ed5c27f910299ed6c3997d14b66">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_TX_POWER
+: <a class="el" href="group__WiFi__option.html#ga1fbda584fe5750db6a04b1ed27730d95">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_WPS_METHOD_NONE
+: <a class="el" href="group__wifi__wps__method.html#gaade5c0e07cfee79973643b9f98a73438">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_WPS_METHOD_PBC
+: <a class="el" href="group__wifi__wps__method.html#gafe4555319019fa722d2f2a8cc519af41">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_WPS_METHOD_PIN
+: <a class="el" href="group__wifi__wps__method.html#ga12a4e06347498f9765f339cdb5f391de">Driver_WiFi.h</a>
+</li>
+</ul>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Driver/html/globals_e.html b/docs/Driver/html/globals_e.html
index 724a63b..6c91439 100644
--- a/docs/Driver/html/globals_e.html
+++ b/docs/Driver/html/globals_e.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -101,6 +101,7 @@
       <li><a href="globals_r.html#index_r"><span>r</span></a></li>
       <li><a href="globals_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -415,7 +416,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_enum.html b/docs/Driver/html/globals_enum.html
index 8337e8b..0d07d36 100644
--- a/docs/Driver/html/globals_enum.html
+++ b/docs/Driver/html/globals_enum.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -148,7 +148,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_eval.html b/docs/Driver/html/globals_eval.html
index e24a002..be0fc3b 100644
--- a/docs/Driver/html/globals_eval.html
+++ b/docs/Driver/html/globals_eval.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -277,7 +277,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_f.html b/docs/Driver/html/globals_f.html
index b4ea5b5..f69ce39 100644
--- a/docs/Driver/html/globals_f.html
+++ b/docs/Driver/html/globals_f.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
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+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
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@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
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+   &#160;<span id="projectnumber">Version 2.7.1</span>
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       <li><a href="globals_func_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_func_w.html#index_w"><span>w</span></a></li>
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@@ -189,7 +190,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
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   <td style="padding-left: 0.5em;">
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+      <li><a href="globals_func_w.html#index_w"><span>w</span></a></li>
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@@ -216,7 +217,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
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   <td style="padding-left: 0.5em;">
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@@ -174,7 +175,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
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index 651a5fb..133e187 100644
--- a/docs/Driver/html/globals_func_i.html
+++ b/docs/Driver/html/globals_func_i.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
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+   &#160;<span id="projectnumber">Version 2.7.1</span>
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       <li><a href="globals_func_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_func_w.html#index_w"><span>w</span></a></li>
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@@ -177,7 +178,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/Driver/html/globals_func_m.html b/docs/Driver/html/globals_func_m.html
index 3238a39..d4b86ac 100644
--- a/docs/Driver/html/globals_func_m.html
+++ b/docs/Driver/html/globals_func_m.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
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+      <li><a href="globals_func_w.html#index_w"><span>w</span></a></li>
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@@ -180,7 +181,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Driver/html/globals_func_n.html b/docs/Driver/html/globals_func_n.html
index dc1303d..7536077 100644
--- a/docs/Driver/html/globals_func_n.html
+++ b/docs/Driver/html/globals_func_n.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
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       <li><a href="globals_func_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_func_w.html#index_w"><span>w</span></a></li>
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   </div>
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@@ -195,7 +196,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Driver/html/globals_func_s.html b/docs/Driver/html/globals_func_s.html
index 53bfbf1..a9b6e60 100644
--- a/docs/Driver/html/globals_func_s.html
+++ b/docs/Driver/html/globals_func_s.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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+      <li><a href="globals_func_w.html#index_w"><span>w</span></a></li>
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@@ -252,7 +253,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Driver/html/globals_func_u.html b/docs/Driver/html/globals_func_u.html
index 37844d4..6cdd14a 100644
--- a/docs/Driver/html/globals_func_u.html
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@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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+      <li><a href="globals_func_w.html#index_w"><span>w</span></a></li>
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@@ -324,7 +325,7 @@
 <!-- start footer part -->
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
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new file mode 100644
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@@ -0,0 +1,253 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>Globals</title>
+<title>CMSIS-Driver: Globals</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Driver
+   &#160;<span id="projectnumber">Version 2.7.1</span>
+   </div>
+   <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
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+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
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+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li><a href="modules.html"><span>Reference</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
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+               onmouseout="return searchBox.OnSearchSelectHide()"
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+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
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+    </ul>
+  </div>
+  <div id="navrow3" class="tabs2">
+    <ul class="tablist">
+      <li><a href="globals.html"><span>All</span></a></li>
+      <li class="current"><a href="globals_func.html"><span>Functions</span></a></li>
+      <li><a href="globals_type.html"><span>Typedefs</span></a></li>
+      <li><a href="globals_enum.html"><span>Enumerations</span></a></li>
+      <li><a href="globals_eval.html"><span>Enumerator</span></a></li>
+      <li><a href="globals_defs.html"><span>Macros</span></a></li>
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+  <div id="navrow4" class="tabs3">
+    <ul class="tablist">
+      <li><a href="globals_func.html#index_c"><span>c</span></a></li>
+      <li><a href="globals_func_e.html#index_e"><span>e</span></a></li>
+      <li><a href="globals_func_f.html#index_f"><span>f</span></a></li>
+      <li><a href="globals_func_i.html#index_i"><span>i</span></a></li>
+      <li><a href="globals_func_m.html#index_m"><span>m</span></a></li>
+      <li><a href="globals_func_n.html#index_n"><span>n</span></a></li>
+      <li><a href="globals_func_s.html#index_s"><span>s</span></a></li>
+      <li><a href="globals_func_u.html#index_u"><span>u</span></a></li>
+      <li class="current"><a href="globals_func_w.html#index_w"><span>w</span></a></li>
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+<div id="side-nav" class="ui-resizable side-nav-resizable">
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+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
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+<script type="text/javascript">
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+<div class="contents">
+&#160;
+
+<h3><a class="anchor" id="index_w"></a>- w -</h3><ul>
+<li>ARM_WIFI_Activate()
+: <a class="el" href="group__wifi__management__gr.html#ga7d545744a848702d75043de30ea5260a">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_BypassControl()
+: <a class="el" href="group__wifi__bypass__gr.html#ga678fa1aa06ca6aaa67c7eb7a7660730e">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_Deactivate()
+: <a class="el" href="group__wifi__management__gr.html#ga1842127df60067481ac2f40d19153e3e">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_EthGetRxFrameSize()
+: <a class="el" href="group__wifi__bypass__gr.html#gab67442ff061d0c4311a7046bce8d0cd1">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_EthReadFrame()
+: <a class="el" href="group__wifi__bypass__gr.html#ga1dbeb5528095af31a60560e0c48321d4">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_EthSendFrame()
+: <a class="el" href="group__wifi__bypass__gr.html#gac1da4619feaf62d0cc90cfe44642d16b">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_GetCapabilities()
+: <a class="el" href="group__wifi__control__gr.html#ga3496996799a4762e9958a8b6af683b4b">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_GetModuleInfo()
+: <a class="el" href="group__wifi__control__gr.html#gabdc4c9966a3f22ac6e53119e71e67579">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_GetNetInfo()
+: <a class="el" href="group__wifi__management__gr.html#ga29a5b0072470a8c56f0939f3c97ed08e">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_GetOption()
+: <a class="el" href="group__wifi__management__gr.html#ga56910984e5068f6502e12f72e1f80edf">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_GetVersion()
+: <a class="el" href="group__wifi__control__gr.html#gad349fb835926a508e2a33501c0dff6a2">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_Initialize()
+: <a class="el" href="group__wifi__control__gr.html#gadc4b9aaae0fdf7d489b1d81e3c2f3474">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_IsConnected()
+: <a class="el" href="group__wifi__management__gr.html#ga3d641222defb5f52f6dae4ce1d540d0f">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_Ping()
+: <a class="el" href="group__wifi__socket__gr.html#gac7a8abb9e23f3f52dabce4153a53c1ca">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_PowerControl()
+: <a class="el" href="group__wifi__control__gr.html#ga48d4cb7c00e96d2b928cc4468d4e623b">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_Scan()
+: <a class="el" href="group__wifi__management__gr.html#ga856972af36e51cf0c4112029332d529f">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SetOption()
+: <a class="el" href="group__wifi__management__gr.html#gaf38a7aeb470eec596febc850c8b69ccf">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SignalEvent()
+: <a class="el" href="group__wifi__control__gr.html#ga0c8243dee4bb161132692516f048bcec">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketAccept()
+: <a class="el" href="group__wifi__socket__gr.html#ga24e6a015e519373c3f108cc5aa764ef8">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketBind()
+: <a class="el" href="group__wifi__socket__gr.html#gae69f7822b658765f1cd3f74e9a50c246">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketClose()
+: <a class="el" href="group__wifi__socket__gr.html#ga391464de71b6a5d300fda9434fe87a87">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketConnect()
+: <a class="el" href="group__wifi__socket__gr.html#gac0f189afbd35914d4c85e77b40672b16">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketCreate()
+: <a class="el" href="group__wifi__socket__gr.html#ga1433b297315ab394f1544a18548ffcc6">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketGetHostByName()
+: <a class="el" href="group__wifi__socket__gr.html#ga0c37435c6abc68ee0f1f4357b503e0bf">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketGetOpt()
+: <a class="el" href="group__wifi__socket__gr.html#ga6d69360e9774937b7bdc03b45fbc9075">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketGetPeerName()
+: <a class="el" href="group__wifi__socket__gr.html#gaa484a931d55d163477920bc865dd9220">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketGetSockName()
+: <a class="el" href="group__wifi__socket__gr.html#gac187e418893de33817e4fcbdd85dbaee">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketListen()
+: <a class="el" href="group__wifi__socket__gr.html#ga4929aab257781dcaae7197f917991779">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketRecv()
+: <a class="el" href="group__wifi__socket__gr.html#gaecc9ba19491ed00c27da3f5677895d48">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketRecvFrom()
+: <a class="el" href="group__wifi__socket__gr.html#ga2b15232d69f2ae8e189512d6c68c8a81">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketSend()
+: <a class="el" href="group__wifi__socket__gr.html#gaee8615b026e8525fb21ca45ba3778ac8">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketSendTo()
+: <a class="el" href="group__wifi__socket__gr.html#ga5ddd3dd5f863b8392e4281dd48a28d28">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketSetOpt()
+: <a class="el" href="group__wifi__socket__gr.html#ga5de80d6729d9504a21dd5d31dc504017">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_Uninitialize()
+: <a class="el" href="group__wifi__control__gr.html#gae1e488d4ecc365e30712e6b1711a9c5d">Driver_WiFi.c</a>
+</li>
+</ul>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Driver/html/globals_i.html b/docs/Driver/html/globals_i.html
index 166ccab..5b1e5da 100644
--- a/docs/Driver/html/globals_i.html
+++ b/docs/Driver/html/globals_i.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -101,6 +101,7 @@
       <li><a href="globals_r.html#index_r"><span>r</span></a></li>
       <li><a href="globals_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -244,7 +245,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_m.html b/docs/Driver/html/globals_m.html
index d8657a3..3de9e73 100644
--- a/docs/Driver/html/globals_m.html
+++ b/docs/Driver/html/globals_m.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -101,6 +101,7 @@
       <li><a href="globals_r.html#index_r"><span>r</span></a></li>
       <li><a href="globals_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -421,7 +422,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_n.html b/docs/Driver/html/globals_n.html
index 9302cc9..432111e 100644
--- a/docs/Driver/html/globals_n.html
+++ b/docs/Driver/html/globals_n.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -101,6 +101,7 @@
       <li><a href="globals_r.html#index_r"><span>r</span></a></li>
       <li><a href="globals_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -484,7 +485,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_p.html b/docs/Driver/html/globals_p.html
index 4add6b6..b8ee69c 100644
--- a/docs/Driver/html/globals_p.html
+++ b/docs/Driver/html/globals_p.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -101,6 +101,7 @@
       <li><a href="globals_r.html#index_r"><span>r</span></a></li>
       <li><a href="globals_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -154,7 +155,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_r.html b/docs/Driver/html/globals_r.html
index facfc50..8d5cf22 100644
--- a/docs/Driver/html/globals_r.html
+++ b/docs/Driver/html/globals_r.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -101,6 +101,7 @@
       <li class="current"><a href="globals_r.html#index_r"><span>r</span></a></li>
       <li><a href="globals_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -157,7 +158,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_s.html b/docs/Driver/html/globals_s.html
index f00a45a..2cbce99 100644
--- a/docs/Driver/html/globals_s.html
+++ b/docs/Driver/html/globals_s.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -101,6 +101,7 @@
       <li><a href="globals_r.html#index_r"><span>r</span></a></li>
       <li class="current"><a href="globals_s.html#index_s"><span>s</span></a></li>
       <li><a href="globals_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -466,6 +467,87 @@
 <li>ARM_SAI_Uninitialize()
 : <a class="el" href="group__sai__interface__gr.html#gabdefafaba6f072cfd7ed6f8f132422b6">Driver_SAI.c</a>
 </li>
+<li>ARM_SOCKET_AF_INET
+: <a class="el" href="group__wifi__addr__family.html#ga1a17023d92374b4f2d963aa7ac1c4e17">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_AF_INET6
+: <a class="el" href="group__wifi__addr__family.html#gad50c95421ffbc6eec5f8458b2e170c26">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_EADDRINUSE
+: <a class="el" href="group__wifi__soc__func.html#ga4fa475e41c3db0ada798249696e745a1">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_EAGAIN
+: <a class="el" href="group__wifi__soc__func.html#ga699dbd55e543fd38d333cf1d4470d8db">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_EALREADY
+: <a class="el" href="group__wifi__soc__func.html#ga9df0d5bd422102d9d4ebddc869d358e0">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_ECONNABORTED
+: <a class="el" href="group__wifi__soc__func.html#ga7e64d6bd00a2f6e30ece3ff0f02b5b27">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_ECONNREFUSED
+: <a class="el" href="group__wifi__soc__func.html#gaaf535c9d325172ff8ef02964af218cb0">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_ECONNRESET
+: <a class="el" href="group__wifi__soc__func.html#ga87fa238861921ba1b272019a83b04676">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_EHOSTNOTFOUND
+: <a class="el" href="group__wifi__soc__func.html#ga4d5d38e9a7d5907a3de4165476640cd4">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_EINPROGRESS
+: <a class="el" href="group__wifi__soc__func.html#gad7f3e077f7721a202012378ddcefb83f">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_EINVAL
+: <a class="el" href="group__wifi__soc__func.html#ga695aa5c5329602d9465fbc6c22fc9978">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_EISCONN
+: <a class="el" href="group__wifi__soc__func.html#gaa1e456c6cea2f6579158818387557f1a">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_ENOMEM
+: <a class="el" href="group__wifi__soc__func.html#ga68e88e80822f779361407d005659fc6c">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_ENOTCONN
+: <a class="el" href="group__wifi__soc__func.html#ga0bde95e313d907032074583bc06b24a1">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_ENOTSUP
+: <a class="el" href="group__wifi__soc__func.html#ga95ab80319bfbc5413fc5334e3d5ce5d2">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_ERROR
+: <a class="el" href="group__wifi__soc__func.html#ga2f3db9fdae2366238054ff8a8e8ef97c">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_ESOCK
+: <a class="el" href="group__wifi__soc__func.html#ga535e069b83aafcf70dd089e6097bceef">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_ETIMEDOUT
+: <a class="el" href="group__wifi__soc__func.html#ga320ffeeb44d583c0216b24d6e1009d9f">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_IO_FIONBIO
+: <a class="el" href="group__wifi__soc__opt.html#gac6fa12bbc640209a6b63f8cec282f961">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_IPPROTO_TCP
+: <a class="el" href="group__wifi__protocol.html#gaf07cfcf1b65ea6c6be0629459a2ba781">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_IPPROTO_UDP
+: <a class="el" href="group__wifi__protocol.html#gabacbead83c772f5737b25b4fc390e16d">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_SO_KEEPALIVE
+: <a class="el" href="group__wifi__soc__opt.html#ga925f699a931ccbfb87eb5f3d36cbe405">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_SO_RCVTIMEO
+: <a class="el" href="group__wifi__soc__opt.html#ga6f76374467b5580ab0e440da1c39024e">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_SO_SNDTIMEO
+: <a class="el" href="group__wifi__soc__opt.html#gad633987fb5b3478b54d3269b1b03497a">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_SO_TYPE
+: <a class="el" href="group__wifi__soc__opt.html#ga0466a14ce32b2cc28887735b632f3e63">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_SOCK_DGRAM
+: <a class="el" href="group__wifi__socket__type.html#gaced5f33eda2fc38a8303cd11a0d76fab">Driver_WiFi.h</a>
+</li>
+<li>ARM_SOCKET_SOCK_STREAM
+: <a class="el" href="group__wifi__socket__type.html#ga9567d5735856190b2ae9cc39f68637f1">Driver_WiFi.h</a>
+</li>
 <li>ARM_SPI_ABORT_TRANSFER
 : <a class="el" href="group__spi__misc__ctrls.html#ga44708b80e48984be099cd6eb11780dc3">Driver_SPI.h</a>
 </li>
@@ -781,7 +863,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_type.html b/docs/Driver/html/globals_type.html
index 2d3df7e..5e1a419 100644
--- a/docs/Driver/html/globals_type.html
+++ b/docs/Driver/html/globals_type.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -175,13 +175,16 @@
 <li>ARM_USBH_SignalPortEvent_t
 : <a class="el" href="group__usbh__host__gr.html#ga61edcbb6ee863fe87abee488d78e1051">Driver_USBH.h</a>
 </li>
+<li>ARM_WIFI_SignalEvent_t
+: <a class="el" href="group__wifi__control__gr.html#gac0f04bbdd431c87a680626154c3e0a41">Driver_WiFi.h</a>
+</li>
 </ul>
 </div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_u.html b/docs/Driver/html/globals_u.html
index b3bd1c5..4c3c184 100644
--- a/docs/Driver/html/globals_u.html
+++ b/docs/Driver/html/globals_u.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -101,6 +101,7 @@
       <li><a href="globals_r.html#index_r"><span>r</span></a></li>
       <li><a href="globals_s.html#index_s"><span>s</span></a></li>
       <li class="current"><a href="globals_u.html#index_u"><span>u</span></a></li>
+      <li><a href="globals_w.html#index_w"><span>w</span></a></li>
     </ul>
   </div>
 </div><!-- top -->
@@ -838,7 +839,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/globals_w.html b/docs/Driver/html/globals_w.html
new file mode 100644
index 0000000..fb95fc4
--- /dev/null
+++ b/docs/Driver/html/globals_w.html
@@ -0,0 +1,371 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>Globals</title>
+<title>CMSIS-Driver: Globals</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Driver
+   &#160;<span id="projectnumber">Version 2.7.1</span>
+   </div>
+   <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li><a href="modules.html"><span>Reference</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+  <div id="navrow3" class="tabs2">
+    <ul class="tablist">
+      <li class="current"><a href="globals.html"><span>All</span></a></li>
+      <li><a href="globals_func.html"><span>Functions</span></a></li>
+      <li><a href="globals_type.html"><span>Typedefs</span></a></li>
+      <li><a href="globals_enum.html"><span>Enumerations</span></a></li>
+      <li><a href="globals_eval.html"><span>Enumerator</span></a></li>
+      <li><a href="globals_defs.html"><span>Macros</span></a></li>
+    </ul>
+  </div>
+  <div id="navrow4" class="tabs3">
+    <ul class="tablist">
+      <li><a href="globals.html#index__"><span>_</span></a></li>
+      <li><a href="globals_c.html#index_c"><span>c</span></a></li>
+      <li><a href="globals_d.html#index_d"><span>d</span></a></li>
+      <li><a href="globals_e.html#index_e"><span>e</span></a></li>
+      <li><a href="globals_f.html#index_f"><span>f</span></a></li>
+      <li><a href="globals_i.html#index_i"><span>i</span></a></li>
+      <li><a href="globals_m.html#index_m"><span>m</span></a></li>
+      <li><a href="globals_n.html#index_n"><span>n</span></a></li>
+      <li><a href="globals_p.html#index_p"><span>p</span></a></li>
+      <li><a href="globals_r.html#index_r"><span>r</span></a></li>
+      <li><a href="globals_s.html#index_s"><span>s</span></a></li>
+      <li><a href="globals_u.html#index_u"><span>u</span></a></li>
+      <li class="current"><a href="globals_w.html#index_w"><span>w</span></a></li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('globals_w.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="contents">
+<div class="textblock">Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:</div>
+
+<h3><a class="anchor" id="index_w"></a>- w -</h3><ul>
+<li>ARM_WIFI_Activate()
+: <a class="el" href="group__wifi__management__gr.html#ga7d545744a848702d75043de30ea5260a">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_API_VERSION
+: <a class="el" href="Driver__WiFi_8h.html#aa6a3705716b58d58fdbf72d8308f1383">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_BEACON
+: <a class="el" href="group__WiFi__option.html#ga6171d24c661b54465ced2dae7980897c">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_BSSID
+: <a class="el" href="group__WiFi__option.html#gae84cbf48cd5168371621fc5f78aac0a4">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_BypassControl()
+: <a class="el" href="group__wifi__bypass__gr.html#ga678fa1aa06ca6aaa67c7eb7a7660730e">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_Deactivate()
+: <a class="el" href="group__wifi__management__gr.html#ga1842127df60067481ac2f40d19153e3e">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_DTIM
+: <a class="el" href="group__WiFi__option.html#ga947c297f1364993524bf515beba296f1">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_EthGetRxFrameSize()
+: <a class="el" href="group__wifi__bypass__gr.html#gab67442ff061d0c4311a7046bce8d0cd1">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_EthReadFrame()
+: <a class="el" href="group__wifi__bypass__gr.html#ga1dbeb5528095af31a60560e0c48321d4">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_EthSendFrame()
+: <a class="el" href="group__wifi__bypass__gr.html#gac1da4619feaf62d0cc90cfe44642d16b">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_EVENT_AP_CONNECT
+: <a class="el" href="group__wifi__event.html#ga4a87b9a3c3a404e3917d54df98469a62">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_EVENT_AP_DISCONNECT
+: <a class="el" href="group__wifi__event.html#ga271e73cda122e7ec3c5a5ca71d44eae3">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_EVENT_ETH_RX_FRAME
+: <a class="el" href="group__wifi__event.html#ga833f2c7a47bd2523d7a62ff6506a997f">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_GetCapabilities()
+: <a class="el" href="group__wifi__control__gr.html#ga3496996799a4762e9958a8b6af683b4b">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_GetModuleInfo()
+: <a class="el" href="group__wifi__control__gr.html#gabdc4c9966a3f22ac6e53119e71e67579">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_GetNetInfo()
+: <a class="el" href="group__wifi__management__gr.html#ga29a5b0072470a8c56f0939f3c97ed08e">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_GetOption()
+: <a class="el" href="group__wifi__management__gr.html#ga56910984e5068f6502e12f72e1f80edf">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_GetVersion()
+: <a class="el" href="group__wifi__control__gr.html#gad349fb835926a508e2a33501c0dff6a2">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_Initialize()
+: <a class="el" href="group__wifi__control__gr.html#gadc4b9aaae0fdf7d489b1d81e3c2f3474">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_IP
+: <a class="el" href="group__WiFi__option.html#ga50ee1ca627ebe536cae0ab7155ed1d17">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP6_DHCP_MODE
+: <a class="el" href="group__WiFi__option.html#ga6b864e923870ec473ee0c876d1a3b032">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP6_DHCP_OFF
+: <a class="el" href="group__wifi__dhcp__v6__mode.html#gaf200f735500dc647bc665f60a2df7552">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP6_DHCP_STATEFULL
+: <a class="el" href="group__wifi__dhcp__v6__mode.html#ga205f9604967e290c053952cab850841a">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP6_DHCP_STATELESS
+: <a class="el" href="group__wifi__dhcp__v6__mode.html#ga9d63d8029532c586703c77f1c8f990fc">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP6_DNS1
+: <a class="el" href="group__WiFi__option.html#gaeb86e25e3b7c6360c977b05b40ff7676">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP6_DNS2
+: <a class="el" href="group__WiFi__option.html#ga24dee294436d575b47c7a314cba1654d">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP6_GATEWAY
+: <a class="el" href="group__WiFi__option.html#ga218d49572adcac8d678f7a8ae2f0c67e">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP6_GLOBAL
+: <a class="el" href="group__WiFi__option.html#gaeac3fc297297b9bf5f2b5cf84788d77f">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP6_LINK_LOCAL
+: <a class="el" href="group__WiFi__option.html#ga11fdcc3403a43187158434a87fdfb83c">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP6_SUBNET_PREFIX_LEN
+: <a class="el" href="group__WiFi__option.html#ga545cb7e1da8715966bee7c7ff9d427d8">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP_DHCP
+: <a class="el" href="group__WiFi__option.html#gad37e95b697872782973057ae94c085a9">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP_DHCP_LEASE_TIME
+: <a class="el" href="group__WiFi__option.html#ga78ec2d08d4f1d3ce486b40a329bd8713">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP_DHCP_POOL_BEGIN
+: <a class="el" href="group__WiFi__option.html#ga10065d0d9cb7530e0747be83ba9e4c35">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP_DHCP_POOL_END
+: <a class="el" href="group__WiFi__option.html#ga4054f0e4045a25928531be73fb9d6b45">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP_DNS1
+: <a class="el" href="group__WiFi__option.html#ga657f5c6c504defe04422dbe468c6c134">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP_DNS2
+: <a class="el" href="group__WiFi__option.html#ga5a5fa4c298b16d0acd0a71f873802d31">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP_GATEWAY
+: <a class="el" href="group__WiFi__option.html#gad0c719fedd39d738ee7f6fd3c7317169">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IP_SUBNET_MASK
+: <a class="el" href="group__WiFi__option.html#gac2603479ebad0ed05413e1e01b8a649f">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_IsConnected()
+: <a class="el" href="group__wifi__management__gr.html#ga3d641222defb5f52f6dae4ce1d540d0f">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_LP_TIMER
+: <a class="el" href="group__WiFi__option.html#ga77e38a3d5d2fe8c04aebaf8d24e1b8d4">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_MAC
+: <a class="el" href="group__WiFi__option.html#gafefb0fe1e5cdfb71f7f8cc7606840865">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_Ping()
+: <a class="el" href="group__wifi__socket__gr.html#gac7a8abb9e23f3f52dabce4153a53c1ca">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_PowerControl()
+: <a class="el" href="group__wifi__control__gr.html#ga48d4cb7c00e96d2b928cc4468d4e623b">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_Scan()
+: <a class="el" href="group__wifi__management__gr.html#ga856972af36e51cf0c4112029332d529f">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SECURITY_OPEN
+: <a class="el" href="group__wifi__sec__type.html#gab5b0d06b14b916c244c42ad8a3053d1d">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_SECURITY_UNKNOWN
+: <a class="el" href="group__wifi__sec__type.html#ga1c0904e056c3f720fe38b903230d9f89">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_SECURITY_WEP
+: <a class="el" href="group__wifi__sec__type.html#ga75d8f1830db25a9f0b1390397186ddd5">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_SECURITY_WPA
+: <a class="el" href="group__wifi__sec__type.html#ga40f2c6844d3d81bbfedaa96e72402b35">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_SECURITY_WPA2
+: <a class="el" href="group__wifi__sec__type.html#gab4622ed5c27f910299ed6c3997d14b66">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_SetOption()
+: <a class="el" href="group__wifi__management__gr.html#gaf38a7aeb470eec596febc850c8b69ccf">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SignalEvent()
+: <a class="el" href="group__wifi__control__gr.html#ga0c8243dee4bb161132692516f048bcec">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SignalEvent_t
+: <a class="el" href="group__wifi__control__gr.html#gac0f04bbdd431c87a680626154c3e0a41">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_SocketAccept()
+: <a class="el" href="group__wifi__socket__gr.html#ga24e6a015e519373c3f108cc5aa764ef8">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketBind()
+: <a class="el" href="group__wifi__socket__gr.html#gae69f7822b658765f1cd3f74e9a50c246">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketClose()
+: <a class="el" href="group__wifi__socket__gr.html#ga391464de71b6a5d300fda9434fe87a87">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketConnect()
+: <a class="el" href="group__wifi__socket__gr.html#gac0f189afbd35914d4c85e77b40672b16">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketCreate()
+: <a class="el" href="group__wifi__socket__gr.html#ga1433b297315ab394f1544a18548ffcc6">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketGetHostByName()
+: <a class="el" href="group__wifi__socket__gr.html#ga0c37435c6abc68ee0f1f4357b503e0bf">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketGetOpt()
+: <a class="el" href="group__wifi__socket__gr.html#ga6d69360e9774937b7bdc03b45fbc9075">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketGetPeerName()
+: <a class="el" href="group__wifi__socket__gr.html#gaa484a931d55d163477920bc865dd9220">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketGetSockName()
+: <a class="el" href="group__wifi__socket__gr.html#gac187e418893de33817e4fcbdd85dbaee">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketListen()
+: <a class="el" href="group__wifi__socket__gr.html#ga4929aab257781dcaae7197f917991779">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketRecv()
+: <a class="el" href="group__wifi__socket__gr.html#gaecc9ba19491ed00c27da3f5677895d48">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketRecvFrom()
+: <a class="el" href="group__wifi__socket__gr.html#ga2b15232d69f2ae8e189512d6c68c8a81">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketSend()
+: <a class="el" href="group__wifi__socket__gr.html#gaee8615b026e8525fb21ca45ba3778ac8">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketSendTo()
+: <a class="el" href="group__wifi__socket__gr.html#ga5ddd3dd5f863b8392e4281dd48a28d28">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_SocketSetOpt()
+: <a class="el" href="group__wifi__socket__gr.html#ga5de80d6729d9504a21dd5d31dc504017">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_TX_POWER
+: <a class="el" href="group__WiFi__option.html#ga1fbda584fe5750db6a04b1ed27730d95">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_Uninitialize()
+: <a class="el" href="group__wifi__control__gr.html#gae1e488d4ecc365e30712e6b1711a9c5d">Driver_WiFi.c</a>
+</li>
+<li>ARM_WIFI_WPS_METHOD_NONE
+: <a class="el" href="group__wifi__wps__method.html#gaade5c0e07cfee79973643b9f98a73438">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_WPS_METHOD_PBC
+: <a class="el" href="group__wifi__wps__method.html#gafe4555319019fa722d2f2a8cc519af41">Driver_WiFi.h</a>
+</li>
+<li>ARM_WIFI_WPS_METHOD_PIN
+: <a class="el" href="group__wifi__wps__method.html#ga12a4e06347498f9765f339cdb5f391de">Driver_WiFi.h</a>
+</li>
+</ul>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Driver/html/group__CAN__events.html b/docs/Driver/html/group__CAN__events.html
index 59f3eb1..698786e 100644
--- a/docs/Driver/html/group__CAN__events.html
+++ b/docs/Driver/html/group__CAN__events.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -184,7 +184,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__CAN__unit__events.html b/docs/Driver/html/group__CAN__unit__events.html
index eaa47b3..c309633 100644
--- a/docs/Driver/html/group__CAN__unit__events.html
+++ b/docs/Driver/html/group__CAN__unit__events.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -220,7 +220,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__ETH__MAC__events.html b/docs/Driver/html/group__ETH__MAC__events.html
index dafe5c0..6a49c7c 100644
--- a/docs/Driver/html/group__ETH__MAC__events.html
+++ b/docs/Driver/html/group__ETH__MAC__events.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -198,7 +198,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__Flash__events.html b/docs/Driver/html/group__Flash__events.html
index b480ba2..53dbb27 100644
--- a/docs/Driver/html/group__Flash__events.html
+++ b/docs/Driver/html/group__Flash__events.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -164,7 +164,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__I2C__events.html b/docs/Driver/html/group__I2C__events.html
index 5ed356a..7e4d030 100644
--- a/docs/Driver/html/group__I2C__events.html
+++ b/docs/Driver/html/group__I2C__events.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -283,7 +283,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__NAND__events.html b/docs/Driver/html/group__NAND__events.html
index b9bf187..26e56e4 100644
--- a/docs/Driver/html/group__NAND__events.html
+++ b/docs/Driver/html/group__NAND__events.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -198,7 +198,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__SAI__events.html b/docs/Driver/html/group__SAI__events.html
index 539f2aa..34350b0 100644
--- a/docs/Driver/html/group__SAI__events.html
+++ b/docs/Driver/html/group__SAI__events.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -215,7 +215,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__SPI__control.html b/docs/Driver/html/group__SPI__control.html
index bdf5a4b..7a5ec74 100644
--- a/docs/Driver/html/group__SPI__control.html
+++ b/docs/Driver/html/group__SPI__control.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -155,7 +155,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__SPI__events.html b/docs/Driver/html/group__SPI__events.html
index eacb3f0..6ef0de2 100644
--- a/docs/Driver/html/group__SPI__events.html
+++ b/docs/Driver/html/group__SPI__events.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -181,7 +181,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__SampleUseOfStorageDriver.html b/docs/Driver/html/group__SampleUseOfStorageDriver.html
index 5761485..f4ac79a 100644
--- a/docs/Driver/html/group__SampleUseOfStorageDriver.html
+++ b/docs/Driver/html/group__SampleUseOfStorageDriver.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -267,7 +267,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__StorageDriverFunctions.html b/docs/Driver/html/group__StorageDriverFunctions.html
index 1c86a7d..e707531 100644
--- a/docs/Driver/html/group__StorageDriverFunctions.html
+++ b/docs/Driver/html/group__StorageDriverFunctions.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -157,7 +157,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__USART__control.html b/docs/Driver/html/group__USART__control.html
index 42eb948..6c2deb6 100644
--- a/docs/Driver/html/group__USART__control.html
+++ b/docs/Driver/html/group__USART__control.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -163,7 +163,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__USART__events.html b/docs/Driver/html/group__USART__events.html
index 4f079dc..978d71d 100644
--- a/docs/Driver/html/group__USART__events.html
+++ b/docs/Driver/html/group__USART__events.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -368,7 +368,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__USBD__dev__events.html b/docs/Driver/html/group__USBD__dev__events.html
index 3b747e9..90f15ca 100644
--- a/docs/Driver/html/group__USBD__dev__events.html
+++ b/docs/Driver/html/group__USBD__dev__events.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -232,7 +232,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__USBD__ep__events.html b/docs/Driver/html/group__USBD__ep__events.html
index 9c4b148..e15f46c 100644
--- a/docs/Driver/html/group__USBD__ep__events.html
+++ b/docs/Driver/html/group__USBD__ep__events.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -181,7 +181,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__USBH__packets.html b/docs/Driver/html/group__USBH__packets.html
index aa4a73e..8fd4391 100644
--- a/docs/Driver/html/group__USBH__packets.html
+++ b/docs/Driver/html/group__USBH__packets.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -346,7 +346,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__USBH__pipe__events.html b/docs/Driver/html/group__USBH__pipe__events.html
index 100950c..5a898cf 100644
--- a/docs/Driver/html/group__USBH__pipe__events.html
+++ b/docs/Driver/html/group__USBH__pipe__events.html
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   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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@@ -249,7 +249,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__USBH__port__events.html b/docs/Driver/html/group__USBH__port__events.html
index 0757a90..7b19e5b 100644
--- a/docs/Driver/html/group__USBH__port__events.html
+++ b/docs/Driver/html/group__USBH__port__events.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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@@ -249,7 +249,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__USB__endpoint__type.html b/docs/Driver/html/group__USB__endpoint__type.html
index f10e5e7..5ee05c3 100644
--- a/docs/Driver/html/group__USB__endpoint__type.html
+++ b/docs/Driver/html/group__USB__endpoint__type.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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@@ -197,7 +197,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__USB__speed.html b/docs/Driver/html/group__USB__speed.html
index 93c7a7c..7952099 100644
--- a/docs/Driver/html/group__USB__speed.html
+++ b/docs/Driver/html/group__USB__speed.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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@@ -180,7 +180,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__WiFi__option.html b/docs/Driver/html/group__WiFi__option.html
new file mode 100644
index 0000000..573e452
--- /dev/null
+++ b/docs/Driver/html/group__WiFi__option.html
@@ -0,0 +1,559 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>WiFi Option Codes</title>
+<title>CMSIS-Driver: WiFi Option Codes</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Driver
+   &#160;<span id="projectnumber">Version 2.7.1</span>
+   </div>
+   <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li><a href="modules.html"><span>Reference</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
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+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
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+          </span><span class="right">
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+<div id="side-nav" class="ui-resizable side-nav-resizable">
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+<script type="text/javascript">
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+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
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+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="summary">
+<a href="#define-members">Macros</a>  </div>
+  <div class="headertitle">
+<div class="title">WiFi Option Codes<div class="ingroups"><a class="el" href="group__wifi__management__gr.html">WiFi Management</a></div></div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>WiFi Option Codes for <a class="el" href="group__wifi__management__gr.html#gaf38a7aeb470eec596febc850c8b69ccf">ARM_WIFI_SetOption</a> or <a class="el" href="group__wifi__management__gr.html#ga56910984e5068f6502e12f72e1f80edf">ARM_WIFI_GetOption</a> function.  
+<a href="#details">More...</a></p>
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
+Macros</h2></td></tr>
+<tr class="memitem:gae84cbf48cd5168371621fc5f78aac0a4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#gae84cbf48cd5168371621fc5f78aac0a4">ARM_WIFI_BSSID</a>&#160;&#160;&#160;1U</td></tr>
+<tr class="memdesc:gae84cbf48cd5168371621fc5f78aac0a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get BSSID of AP to connect or of AP; data = &amp;bssid, len = 6, uint8_t[6].  <a href="#gae84cbf48cd5168371621fc5f78aac0a4">More...</a><br/></td></tr>
+<tr class="separator:gae84cbf48cd5168371621fc5f78aac0a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1fbda584fe5750db6a04b1ed27730d95"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga1fbda584fe5750db6a04b1ed27730d95">ARM_WIFI_TX_POWER</a>&#160;&#160;&#160;2U</td></tr>
+<tr class="memdesc:ga1fbda584fe5750db6a04b1ed27730d95"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get transmit power; data = &amp;power, len = 4, uint32_t: 0 .. 20 [dBm].  <a href="#ga1fbda584fe5750db6a04b1ed27730d95">More...</a><br/></td></tr>
+<tr class="separator:ga1fbda584fe5750db6a04b1ed27730d95"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga77e38a3d5d2fe8c04aebaf8d24e1b8d4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga77e38a3d5d2fe8c04aebaf8d24e1b8d4">ARM_WIFI_LP_TIMER</a>&#160;&#160;&#160;3U</td></tr>
+<tr class="memdesc:ga77e38a3d5d2fe8c04aebaf8d24e1b8d4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station Set/Get low-power deep-sleep time; data = &amp;time, len = 4, uint32_t [seconds]: 0 = disable (default)  <a href="#ga77e38a3d5d2fe8c04aebaf8d24e1b8d4">More...</a><br/></td></tr>
+<tr class="separator:ga77e38a3d5d2fe8c04aebaf8d24e1b8d4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga947c297f1364993524bf515beba296f1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga947c297f1364993524bf515beba296f1">ARM_WIFI_DTIM</a>&#160;&#160;&#160;4U</td></tr>
+<tr class="memdesc:ga947c297f1364993524bf515beba296f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get DTIM interval; data = &amp;dtim, len = 4, uint32_t [beacons].  <a href="#ga947c297f1364993524bf515beba296f1">More...</a><br/></td></tr>
+<tr class="separator:ga947c297f1364993524bf515beba296f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga6171d24c661b54465ced2dae7980897c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga6171d24c661b54465ced2dae7980897c">ARM_WIFI_BEACON</a>&#160;&#160;&#160;5U</td></tr>
+<tr class="memdesc:ga6171d24c661b54465ced2dae7980897c"><td class="mdescLeft">&#160;</td><td class="mdescRight">AP Set/Get beacon interval; data = &amp;interval, len = 4, uint32_t [ms].  <a href="#ga6171d24c661b54465ced2dae7980897c">More...</a><br/></td></tr>
+<tr class="separator:ga6171d24c661b54465ced2dae7980897c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafefb0fe1e5cdfb71f7f8cc7606840865"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#gafefb0fe1e5cdfb71f7f8cc7606840865">ARM_WIFI_MAC</a>&#160;&#160;&#160;6U</td></tr>
+<tr class="memdesc:gafefb0fe1e5cdfb71f7f8cc7606840865"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get MAC; data = &amp;mac, len = 6, uint8_t[6].  <a href="#gafefb0fe1e5cdfb71f7f8cc7606840865">More...</a><br/></td></tr>
+<tr class="separator:gafefb0fe1e5cdfb71f7f8cc7606840865"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga50ee1ca627ebe536cae0ab7155ed1d17"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga50ee1ca627ebe536cae0ab7155ed1d17">ARM_WIFI_IP</a>&#160;&#160;&#160;7U</td></tr>
+<tr class="memdesc:ga50ee1ca627ebe536cae0ab7155ed1d17"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv4 static/assigned address; data = &amp;ip, len = 4, uint8_t[4].  <a href="#ga50ee1ca627ebe536cae0ab7155ed1d17">More...</a><br/></td></tr>
+<tr class="separator:ga50ee1ca627ebe536cae0ab7155ed1d17"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac2603479ebad0ed05413e1e01b8a649f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#gac2603479ebad0ed05413e1e01b8a649f">ARM_WIFI_IP_SUBNET_MASK</a>&#160;&#160;&#160;8U</td></tr>
+<tr class="memdesc:gac2603479ebad0ed05413e1e01b8a649f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv4 subnet mask; data = &amp;mask, len = 4, uint8_t[4].  <a href="#gac2603479ebad0ed05413e1e01b8a649f">More...</a><br/></td></tr>
+<tr class="separator:gac2603479ebad0ed05413e1e01b8a649f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad0c719fedd39d738ee7f6fd3c7317169"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#gad0c719fedd39d738ee7f6fd3c7317169">ARM_WIFI_IP_GATEWAY</a>&#160;&#160;&#160;9U</td></tr>
+<tr class="memdesc:gad0c719fedd39d738ee7f6fd3c7317169"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv4 gateway address; data = &amp;ip, len = 4, uint8_t[4].  <a href="#gad0c719fedd39d738ee7f6fd3c7317169">More...</a><br/></td></tr>
+<tr class="separator:gad0c719fedd39d738ee7f6fd3c7317169"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga657f5c6c504defe04422dbe468c6c134"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga657f5c6c504defe04422dbe468c6c134">ARM_WIFI_IP_DNS1</a>&#160;&#160;&#160;10U</td></tr>
+<tr class="memdesc:ga657f5c6c504defe04422dbe468c6c134"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv4 primary DNS address; data = &amp;ip, len = 4, uint8_t[4].  <a href="#ga657f5c6c504defe04422dbe468c6c134">More...</a><br/></td></tr>
+<tr class="separator:ga657f5c6c504defe04422dbe468c6c134"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5a5fa4c298b16d0acd0a71f873802d31"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga5a5fa4c298b16d0acd0a71f873802d31">ARM_WIFI_IP_DNS2</a>&#160;&#160;&#160;11U</td></tr>
+<tr class="memdesc:ga5a5fa4c298b16d0acd0a71f873802d31"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv4 secondary DNS address; data = &amp;ip, len = 4, uint8_t[4].  <a href="#ga5a5fa4c298b16d0acd0a71f873802d31">More...</a><br/></td></tr>
+<tr class="separator:ga5a5fa4c298b16d0acd0a71f873802d31"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad37e95b697872782973057ae94c085a9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#gad37e95b697872782973057ae94c085a9">ARM_WIFI_IP_DHCP</a>&#160;&#160;&#160;12U</td></tr>
+<tr class="memdesc:gad37e95b697872782973057ae94c085a9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv4 DHCP client/server enable/disable; data = &amp;dhcp, len = 4, uint32_t: 0 = disable, non-zero = enable (default)  <a href="#gad37e95b697872782973057ae94c085a9">More...</a><br/></td></tr>
+<tr class="separator:gad37e95b697872782973057ae94c085a9"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga10065d0d9cb7530e0747be83ba9e4c35"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga10065d0d9cb7530e0747be83ba9e4c35">ARM_WIFI_IP_DHCP_POOL_BEGIN</a>&#160;&#160;&#160;13U</td></tr>
+<tr class="memdesc:ga10065d0d9cb7530e0747be83ba9e4c35"><td class="mdescLeft">&#160;</td><td class="mdescRight">AP Set/Get IPv4 DHCP pool begin address; data = &amp;ip, len = 4, uint8_t[4].  <a href="#ga10065d0d9cb7530e0747be83ba9e4c35">More...</a><br/></td></tr>
+<tr class="separator:ga10065d0d9cb7530e0747be83ba9e4c35"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4054f0e4045a25928531be73fb9d6b45"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga4054f0e4045a25928531be73fb9d6b45">ARM_WIFI_IP_DHCP_POOL_END</a>&#160;&#160;&#160;14U</td></tr>
+<tr class="memdesc:ga4054f0e4045a25928531be73fb9d6b45"><td class="mdescLeft">&#160;</td><td class="mdescRight">AP Set/Get IPv4 DHCP pool end address; data = &amp;ip, len = 4, uint8_t[4].  <a href="#ga4054f0e4045a25928531be73fb9d6b45">More...</a><br/></td></tr>
+<tr class="separator:ga4054f0e4045a25928531be73fb9d6b45"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga78ec2d08d4f1d3ce486b40a329bd8713"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga78ec2d08d4f1d3ce486b40a329bd8713">ARM_WIFI_IP_DHCP_LEASE_TIME</a>&#160;&#160;&#160;15U</td></tr>
+<tr class="memdesc:ga78ec2d08d4f1d3ce486b40a329bd8713"><td class="mdescLeft">&#160;</td><td class="mdescRight">AP Set/Get IPv4 DHCP lease time; data = &amp;time, len = 4, uint32_t [seconds].  <a href="#ga78ec2d08d4f1d3ce486b40a329bd8713">More...</a><br/></td></tr>
+<tr class="separator:ga78ec2d08d4f1d3ce486b40a329bd8713"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaeac3fc297297b9bf5f2b5cf84788d77f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#gaeac3fc297297b9bf5f2b5cf84788d77f">ARM_WIFI_IP6_GLOBAL</a>&#160;&#160;&#160;16U</td></tr>
+<tr class="memdesc:gaeac3fc297297b9bf5f2b5cf84788d77f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv6 global address; data = &amp;ip6, len = 16, uint8_t[16].  <a href="#gaeac3fc297297b9bf5f2b5cf84788d77f">More...</a><br/></td></tr>
+<tr class="separator:gaeac3fc297297b9bf5f2b5cf84788d77f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga11fdcc3403a43187158434a87fdfb83c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga11fdcc3403a43187158434a87fdfb83c">ARM_WIFI_IP6_LINK_LOCAL</a>&#160;&#160;&#160;17U</td></tr>
+<tr class="memdesc:ga11fdcc3403a43187158434a87fdfb83c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv6 link local address; data = &amp;ip6, len = 16, uint8_t[16].  <a href="#ga11fdcc3403a43187158434a87fdfb83c">More...</a><br/></td></tr>
+<tr class="separator:ga11fdcc3403a43187158434a87fdfb83c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga545cb7e1da8715966bee7c7ff9d427d8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga545cb7e1da8715966bee7c7ff9d427d8">ARM_WIFI_IP6_SUBNET_PREFIX_LEN</a>&#160;&#160;&#160;18U</td></tr>
+<tr class="memdesc:ga545cb7e1da8715966bee7c7ff9d427d8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv6 subnet prefix length; data = &amp;len, len = 4, uint32_t: 1 .. 127.  <a href="#ga545cb7e1da8715966bee7c7ff9d427d8">More...</a><br/></td></tr>
+<tr class="separator:ga545cb7e1da8715966bee7c7ff9d427d8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga218d49572adcac8d678f7a8ae2f0c67e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga218d49572adcac8d678f7a8ae2f0c67e">ARM_WIFI_IP6_GATEWAY</a>&#160;&#160;&#160;19U</td></tr>
+<tr class="memdesc:ga218d49572adcac8d678f7a8ae2f0c67e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv6 gateway address; data = &amp;ip6, len = 16, uint8_t[16].  <a href="#ga218d49572adcac8d678f7a8ae2f0c67e">More...</a><br/></td></tr>
+<tr class="separator:ga218d49572adcac8d678f7a8ae2f0c67e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaeb86e25e3b7c6360c977b05b40ff7676"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#gaeb86e25e3b7c6360c977b05b40ff7676">ARM_WIFI_IP6_DNS1</a>&#160;&#160;&#160;20U</td></tr>
+<tr class="memdesc:gaeb86e25e3b7c6360c977b05b40ff7676"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv6 primary DNS address; data = &amp;ip6, len = 16, uint8_t[16].  <a href="#gaeb86e25e3b7c6360c977b05b40ff7676">More...</a><br/></td></tr>
+<tr class="separator:gaeb86e25e3b7c6360c977b05b40ff7676"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga24dee294436d575b47c7a314cba1654d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga24dee294436d575b47c7a314cba1654d">ARM_WIFI_IP6_DNS2</a>&#160;&#160;&#160;21U</td></tr>
+<tr class="memdesc:ga24dee294436d575b47c7a314cba1654d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv6 secondary DNS address; data = &amp;ip6, len = 16, uint8_t[16].  <a href="#ga24dee294436d575b47c7a314cba1654d">More...</a><br/></td></tr>
+<tr class="separator:ga24dee294436d575b47c7a314cba1654d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga6b864e923870ec473ee0c876d1a3b032"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html#ga6b864e923870ec473ee0c876d1a3b032">ARM_WIFI_IP6_DHCP_MODE</a>&#160;&#160;&#160;22U</td></tr>
+<tr class="memdesc:ga6b864e923870ec473ee0c876d1a3b032"><td class="mdescLeft">&#160;</td><td class="mdescRight">Station/AP Set/Get IPv6 DHCPv6 client mode; data = &amp;mode, len = 4, uint32_t: ARM_WIFI_IP6_DHCP_xxx (default Off)  <a href="#ga6b864e923870ec473ee0c876d1a3b032">More...</a><br/></td></tr>
+<tr class="separator:ga6b864e923870ec473ee0c876d1a3b032"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>WiFi Option Codes for <a class="el" href="group__wifi__management__gr.html#gaf38a7aeb470eec596febc850c8b69ccf">ARM_WIFI_SetOption</a> or <a class="el" href="group__wifi__management__gr.html#ga56910984e5068f6502e12f72e1f80edf">ARM_WIFI_GetOption</a> function. </p>
+<p>Many parameters of the WiFi module are configured using the <a class="el" href="group__wifi__management__gr.html#gaf38a7aeb470eec596febc850c8b69ccf">ARM_WIFI_SetOption</a> or <a class="el" href="group__wifi__management__gr.html#ga56910984e5068f6502e12f72e1f80edf">ARM_WIFI_GetOption</a> function. </p>
+<h2 class="groupheader">Macro Definition Documentation</h2>
+<a class="anchor" id="gae84cbf48cd5168371621fc5f78aac0a4"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_BSSID&#160;&#160;&#160;1U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Station/AP Set/Get BSSID of AP to connect or of AP; data = &amp;bssid, len = 6, uint8_t[6]. </p>
+<p>Specifies the BSSID of the access point to connect or the access point itself. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__WiFi__option.html" title="WiFi Option Codes for ARM_WIFI_SetOption or ARM_WIFI_GetOption function. ">WiFi Option Codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga1fbda584fe5750db6a04b1ed27730d95"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_TX_POWER&#160;&#160;&#160;2U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Station/AP Set/Get transmit power; data = &amp;power, len = 4, uint32_t: 0 .. 20 [dBm]. </p>
+<p>Specifies the transmit power in dBm. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__WiFi__option.html" title="WiFi Option Codes for ARM_WIFI_SetOption or ARM_WIFI_GetOption function. ">WiFi Option Codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga77e38a3d5d2fe8c04aebaf8d24e1b8d4"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_LP_TIMER&#160;&#160;&#160;3U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Station Set/Get low-power deep-sleep time; data = &amp;time, len = 4, uint32_t [seconds]: 0 = disable (default) </p>
+<p>Specifies the low-power deep-sleep time in seconds for station (disabled when 0 - default). </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__WiFi__option.html" title="WiFi Option Codes for ARM_WIFI_SetOption or ARM_WIFI_GetOption function. ">WiFi Option Codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga947c297f1364993524bf515beba296f1"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_DTIM&#160;&#160;&#160;4U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Station/AP Set/Get DTIM interval; data = &amp;dtim, len = 4, uint32_t [beacons]. </p>
+<p>Specifies the DTIM interval in number of beacons. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__WiFi__option.html" title="WiFi Option Codes for ARM_WIFI_SetOption or ARM_WIFI_GetOption function. ">WiFi Option Codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga6171d24c661b54465ced2dae7980897c"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_BEACON&#160;&#160;&#160;5U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>AP Set/Get beacon interval; data = &amp;interval, len = 4, uint32_t [ms]. </p>
+<p>Specifies the beacon interval in milliseconds for access point. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__WiFi__option.html" title="WiFi Option Codes for ARM_WIFI_SetOption or ARM_WIFI_GetOption function. ">WiFi Option Codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="gafefb0fe1e5cdfb71f7f8cc7606840865"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_MAC&#160;&#160;&#160;6U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Station/AP Set/Get MAC; data = &amp;mac, len = 6, uint8_t[6]. </p>
+<p>Specifies the MAC address. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__WiFi__option.html" title="WiFi Option Codes for ARM_WIFI_SetOption or ARM_WIFI_GetOption function. ">WiFi Option Codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga50ee1ca627ebe536cae0ab7155ed1d17"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_IP&#160;&#160;&#160;7U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Station/AP Set/Get IPv4 static/assigned address; data = &amp;ip, len = 4, uint8_t[4]. </p>
+<p>Specifies the IP address. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__WiFi__option.html" title="WiFi Option Codes for ARM_WIFI_SetOption or ARM_WIFI_GetOption function. ">WiFi Option Codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="gac2603479ebad0ed05413e1e01b8a649f"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_IP_SUBNET_MASK&#160;&#160;&#160;8U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Station/AP Set/Get IPv4 subnet mask; data = &amp;mask, len = 4, uint8_t[4]. </p>
+<p>Specifies the subnet mask. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__WiFi__option.html" title="WiFi Option Codes for ARM_WIFI_SetOption or ARM_WIFI_GetOption function. ">WiFi Option Codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="gad0c719fedd39d738ee7f6fd3c7317169"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_IP_GATEWAY&#160;&#160;&#160;9U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Station/AP Set/Get IPv4 gateway address; data = &amp;ip, len = 4, uint8_t[4]. </p>
+<p>Specifies the gateway IP address. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__WiFi__option.html" title="WiFi Option Codes for ARM_WIFI_SetOption or ARM_WIFI_GetOption function. ">WiFi Option Codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga657f5c6c504defe04422dbe468c6c134"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_IP_DNS1&#160;&#160;&#160;10U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Station/AP Set/Get IPv4 primary DNS address; data = &amp;ip, len = 4, uint8_t[4]. </p>
+<p>Specifies the IP address of the primary DNS server. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__WiFi__option.html" title="WiFi Option Codes for ARM_WIFI_SetOption or ARM_WIFI_GetOption function. ">WiFi Option Codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga5a5fa4c298b16d0acd0a71f873802d31"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_IP_DNS2&#160;&#160;&#160;11U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Station/AP Set/Get IPv4 secondary DNS address; data = &amp;ip, len = 4, uint8_t[4]. </p>
+<p>Specifies the IP address of the secondary DNS server. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__WiFi__option.html" title="WiFi Option Codes for ARM_WIFI_SetOption or ARM_WIFI_GetOption function. ">WiFi Option Codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="gad37e95b697872782973057ae94c085a9"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_IP_DHCP&#160;&#160;&#160;12U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Station/AP Set/Get IPv4 DHCP client/server enable/disable; data = &amp;dhcp, len = 4, uint32_t: 0 = disable, non-zero = enable (default) </p>
+<p>Enables or disables the DHCP client for station or DHCP server for access point. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__WiFi__option.html" title="WiFi Option Codes for ARM_WIFI_SetOption or ARM_WIFI_GetOption function. ">WiFi Option Codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga10065d0d9cb7530e0747be83ba9e4c35"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_IP_DHCP_POOL_BEGIN&#160;&#160;&#160;13U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>AP Set/Get IPv4 DHCP pool begin address; data = &amp;ip, len = 4, uint8_t[4]. </p>
+<p>Specifies the start IP address for DHCP server (access point). </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__WiFi__option.html" title="WiFi Option Codes for ARM_WIFI_SetOption or ARM_WIFI_GetOption function. ">WiFi Option Codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga4054f0e4045a25928531be73fb9d6b45"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_IP_DHCP_POOL_END&#160;&#160;&#160;14U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>AP Set/Get IPv4 DHCP pool end address; data = &amp;ip, len = 4, uint8_t[4]. </p>
+<p>Specifies the end IP address for DHCP server (access point). </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__WiFi__option.html" title="WiFi Option Codes for ARM_WIFI_SetOption or ARM_WIFI_GetOption function. ">WiFi Option Codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga78ec2d08d4f1d3ce486b40a329bd8713"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_IP_DHCP_LEASE_TIME&#160;&#160;&#160;15U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>AP Set/Get IPv4 DHCP lease time; data = &amp;time, len = 4, uint32_t [seconds]. </p>
+<p>Specifies the lease time for DHCP server (access point). </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__WiFi__option.html" title="WiFi Option Codes for ARM_WIFI_SetOption or ARM_WIFI_GetOption function. ">WiFi Option Codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="gaeac3fc297297b9bf5f2b5cf84788d77f"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_IP6_GLOBAL&#160;&#160;&#160;16U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Station/AP Set/Get IPv6 global address; data = &amp;ip6, len = 16, uint8_t[16]. </p>
+<p>Specifies the global IPv6 address. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__WiFi__option.html" title="WiFi Option Codes for ARM_WIFI_SetOption or ARM_WIFI_GetOption function. ">WiFi Option Codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga11fdcc3403a43187158434a87fdfb83c"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_IP6_LINK_LOCAL&#160;&#160;&#160;17U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Station/AP Set/Get IPv6 link local address; data = &amp;ip6, len = 16, uint8_t[16]. </p>
+<p>Specifies the link-local IPv6 address. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__WiFi__option.html" title="WiFi Option Codes for ARM_WIFI_SetOption or ARM_WIFI_GetOption function. ">WiFi Option Codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga545cb7e1da8715966bee7c7ff9d427d8"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_IP6_SUBNET_PREFIX_LEN&#160;&#160;&#160;18U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Station/AP Set/Get IPv6 subnet prefix length; data = &amp;len, len = 4, uint32_t: 1 .. 127. </p>
+<p>Specifies the address prefix length. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__WiFi__option.html" title="WiFi Option Codes for ARM_WIFI_SetOption or ARM_WIFI_GetOption function. ">WiFi Option Codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga218d49572adcac8d678f7a8ae2f0c67e"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_IP6_GATEWAY&#160;&#160;&#160;19U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Station/AP Set/Get IPv6 gateway address; data = &amp;ip6, len = 16, uint8_t[16]. </p>
+<p>Specifies the gateway IPv6 address. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__WiFi__option.html" title="WiFi Option Codes for ARM_WIFI_SetOption or ARM_WIFI_GetOption function. ">WiFi Option Codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="gaeb86e25e3b7c6360c977b05b40ff7676"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_IP6_DNS1&#160;&#160;&#160;20U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Station/AP Set/Get IPv6 primary DNS address; data = &amp;ip6, len = 16, uint8_t[16]. </p>
+<p>Specifies the IPv6 address of the primary DNS server. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__WiFi__option.html" title="WiFi Option Codes for ARM_WIFI_SetOption or ARM_WIFI_GetOption function. ">WiFi Option Codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga24dee294436d575b47c7a314cba1654d"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_IP6_DNS2&#160;&#160;&#160;21U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Station/AP Set/Get IPv6 secondary DNS address; data = &amp;ip6, len = 16, uint8_t[16]. </p>
+<p>Specifies the IPv6 address of the secondary DNS server. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__WiFi__option.html" title="WiFi Option Codes for ARM_WIFI_SetOption or ARM_WIFI_GetOption function. ">WiFi Option Codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga6b864e923870ec473ee0c876d1a3b032"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_IP6_DHCP_MODE&#160;&#160;&#160;22U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Station/AP Set/Get IPv6 DHCPv6 client mode; data = &amp;mode, len = 4, uint32_t: ARM_WIFI_IP6_DHCP_xxx (default Off) </p>
+<p>Specifies the operation mode of the DHCPv6 client. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__WiFi__option.html" title="WiFi Option Codes for ARM_WIFI_SetOption or ARM_WIFI_GetOption function. ">WiFi Option Codes</a> </dd></dl>
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Driver/html/group__WiFi__option.js b/docs/Driver/html/group__WiFi__option.js
new file mode 100644
index 0000000..5441be2
--- /dev/null
+++ b/docs/Driver/html/group__WiFi__option.js
@@ -0,0 +1,25 @@
+var group__WiFi__option =
+[
+    [ "ARM_WIFI_BSSID", "group__WiFi__option.html#gae84cbf48cd5168371621fc5f78aac0a4", null ],
+    [ "ARM_WIFI_TX_POWER", "group__WiFi__option.html#ga1fbda584fe5750db6a04b1ed27730d95", null ],
+    [ "ARM_WIFI_LP_TIMER", "group__WiFi__option.html#ga77e38a3d5d2fe8c04aebaf8d24e1b8d4", null ],
+    [ "ARM_WIFI_DTIM", "group__WiFi__option.html#ga947c297f1364993524bf515beba296f1", null ],
+    [ "ARM_WIFI_BEACON", "group__WiFi__option.html#ga6171d24c661b54465ced2dae7980897c", null ],
+    [ "ARM_WIFI_MAC", "group__WiFi__option.html#gafefb0fe1e5cdfb71f7f8cc7606840865", null ],
+    [ "ARM_WIFI_IP", "group__WiFi__option.html#ga50ee1ca627ebe536cae0ab7155ed1d17", null ],
+    [ "ARM_WIFI_IP_SUBNET_MASK", "group__WiFi__option.html#gac2603479ebad0ed05413e1e01b8a649f", null ],
+    [ "ARM_WIFI_IP_GATEWAY", "group__WiFi__option.html#gad0c719fedd39d738ee7f6fd3c7317169", null ],
+    [ "ARM_WIFI_IP_DNS1", "group__WiFi__option.html#ga657f5c6c504defe04422dbe468c6c134", null ],
+    [ "ARM_WIFI_IP_DNS2", "group__WiFi__option.html#ga5a5fa4c298b16d0acd0a71f873802d31", null ],
+    [ "ARM_WIFI_IP_DHCP", "group__WiFi__option.html#gad37e95b697872782973057ae94c085a9", null ],
+    [ "ARM_WIFI_IP_DHCP_POOL_BEGIN", "group__WiFi__option.html#ga10065d0d9cb7530e0747be83ba9e4c35", null ],
+    [ "ARM_WIFI_IP_DHCP_POOL_END", "group__WiFi__option.html#ga4054f0e4045a25928531be73fb9d6b45", null ],
+    [ "ARM_WIFI_IP_DHCP_LEASE_TIME", "group__WiFi__option.html#ga78ec2d08d4f1d3ce486b40a329bd8713", null ],
+    [ "ARM_WIFI_IP6_GLOBAL", "group__WiFi__option.html#gaeac3fc297297b9bf5f2b5cf84788d77f", null ],
+    [ "ARM_WIFI_IP6_LINK_LOCAL", "group__WiFi__option.html#ga11fdcc3403a43187158434a87fdfb83c", null ],
+    [ "ARM_WIFI_IP6_SUBNET_PREFIX_LEN", "group__WiFi__option.html#ga545cb7e1da8715966bee7c7ff9d427d8", null ],
+    [ "ARM_WIFI_IP6_GATEWAY", "group__WiFi__option.html#ga218d49572adcac8d678f7a8ae2f0c67e", null ],
+    [ "ARM_WIFI_IP6_DNS1", "group__WiFi__option.html#gaeb86e25e3b7c6360c977b05b40ff7676", null ],
+    [ "ARM_WIFI_IP6_DNS2", "group__WiFi__option.html#ga24dee294436d575b47c7a314cba1654d", null ],
+    [ "ARM_WIFI_IP6_DHCP_MODE", "group__WiFi__option.html#ga6b864e923870ec473ee0c876d1a3b032", null ]
+];
\ No newline at end of file
diff --git a/docs/Driver/html/group__can__bus__mode__ctrls.html b/docs/Driver/html/group__can__bus__mode__ctrls.html
index 1c171f5..aa47ebc 100644
--- a/docs/Driver/html/group__can__bus__mode__ctrls.html
+++ b/docs/Driver/html/group__can__bus__mode__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
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    <div id="projectname">CMSIS-Driver
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+   &#160;<span id="projectnumber">Version 2.7.1</span>
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@@ -180,7 +180,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__can__control.html b/docs/Driver/html/group__can__control.html
index 325ff90..1062dbe 100644
--- a/docs/Driver/html/group__can__control.html
+++ b/docs/Driver/html/group__can__control.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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@@ -154,7 +154,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__can__filter__operation__ctrls.html b/docs/Driver/html/group__can__filter__operation__ctrls.html
index acd1079..a12bc7c 100644
--- a/docs/Driver/html/group__can__filter__operation__ctrls.html
+++ b/docs/Driver/html/group__can__filter__operation__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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@@ -180,7 +180,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__can__identifer__ctrls.html b/docs/Driver/html/group__can__identifer__ctrls.html
index 9e76720..3a239d6 100644
--- a/docs/Driver/html/group__can__identifer__ctrls.html
+++ b/docs/Driver/html/group__can__identifer__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -172,7 +172,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__can__interface__gr.html b/docs/Driver/html/group__can__interface__gr.html
index a10bd4e..797138c 100644
--- a/docs/Driver/html/group__can__interface__gr.html
+++ b/docs/Driver/html/group__can__interface__gr.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -1948,7 +1948,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__can__mode__ctrls.html b/docs/Driver/html/group__can__mode__ctrls.html
index 06e79b9..ab375e9 100644
--- a/docs/Driver/html/group__can__mode__ctrls.html
+++ b/docs/Driver/html/group__can__mode__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -201,7 +201,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__can__obj__config__ctrls.html b/docs/Driver/html/group__can__obj__config__ctrls.html
index 536194f..f45ef2e 100644
--- a/docs/Driver/html/group__can__obj__config__ctrls.html
+++ b/docs/Driver/html/group__can__obj__config__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -175,7 +175,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
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index e41b0d7..8bdc6bb 100644
--- a/docs/Driver/html/group__can__status__code__ctrls.html
+++ b/docs/Driver/html/group__can__status__code__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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@@ -299,7 +299,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__can__timeseg__ctrls.html b/docs/Driver/html/group__can__timeseg__ctrls.html
index 493c3e3..dd91768 100644
--- a/docs/Driver/html/group__can__timeseg__ctrls.html
+++ b/docs/Driver/html/group__can__timeseg__ctrls.html
@@ -32,7 +32,7 @@
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-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -245,7 +245,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__common__drv__gr.html b/docs/Driver/html/group__common__drv__gr.html
index ed11ff3..a547e44 100644
--- a/docs/Driver/html/group__common__drv__gr.html
+++ b/docs/Driver/html/group__common__drv__gr.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -220,7 +220,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Driver/html/group__eth__interface__gr.html b/docs/Driver/html/group__eth__interface__gr.html
index 9f29afe..9948d8f 100644
--- a/docs/Driver/html/group__eth__interface__gr.html
+++ b/docs/Driver/html/group__eth__interface__gr.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -351,7 +351,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
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index ab29047..396770a 100644
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+++ b/docs/Driver/html/group__eth__interface__types1.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
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+   &#160;<span id="projectnumber">Version 2.7.1</span>
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    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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@@ -188,7 +188,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
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index 9cd1474..e8b8123 100644
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+++ b/docs/Driver/html/group__eth__mac__configuration__ctrls.html
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -316,7 +316,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__eth__mac__control.html b/docs/Driver/html/group__eth__mac__control.html
index bfe4258..cfbc794 100644
--- a/docs/Driver/html/group__eth__mac__control.html
+++ b/docs/Driver/html/group__eth__mac__control.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -148,7 +148,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__eth__mac__ctrls.html b/docs/Driver/html/group__eth__mac__ctrls.html
index 8c585bc..1bab1c1 100644
--- a/docs/Driver/html/group__eth__mac__ctrls.html
+++ b/docs/Driver/html/group__eth__mac__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -236,7 +236,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__eth__mac__flush__flag__ctrls.html b/docs/Driver/html/group__eth__mac__flush__flag__ctrls.html
index 5e64db3..5e2f1d5 100644
--- a/docs/Driver/html/group__eth__mac__flush__flag__ctrls.html
+++ b/docs/Driver/html/group__eth__mac__flush__flag__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -163,7 +163,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__eth__mac__frame__transmit__ctrls.html b/docs/Driver/html/group__eth__mac__frame__transmit__ctrls.html
index f621f71..24ba743 100644
--- a/docs/Driver/html/group__eth__mac__frame__transmit__ctrls.html
+++ b/docs/Driver/html/group__eth__mac__frame__transmit__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -182,7 +182,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__eth__mac__interface__gr.html b/docs/Driver/html/group__eth__mac__interface__gr.html
index d4f2016..4d8a51f 100644
--- a/docs/Driver/html/group__eth__mac__interface__gr.html
+++ b/docs/Driver/html/group__eth__mac__interface__gr.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -1481,7 +1481,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__eth__mac__time__control.html b/docs/Driver/html/group__eth__mac__time__control.html
index 06d39df..cbec3c8 100644
--- a/docs/Driver/html/group__eth__mac__time__control.html
+++ b/docs/Driver/html/group__eth__mac__time__control.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -237,7 +237,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__eth__mac__vlan__filter__ctrls.html b/docs/Driver/html/group__eth__mac__vlan__filter__ctrls.html
index 4b158e5..6c5b95c 100644
--- a/docs/Driver/html/group__eth__mac__vlan__filter__ctrls.html
+++ b/docs/Driver/html/group__eth__mac__vlan__filter__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -148,7 +148,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__eth__phy__interface__gr.html b/docs/Driver/html/group__eth__phy__interface__gr.html
index b6e875b..22b117e 100644
--- a/docs/Driver/html/group__eth__phy__interface__gr.html
+++ b/docs/Driver/html/group__eth__phy__interface__gr.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -699,7 +699,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__eth__phy__mode__ctrls.html b/docs/Driver/html/group__eth__phy__mode__ctrls.html
index 3f32b67..4d1bd6b 100644
--- a/docs/Driver/html/group__eth__phy__mode__ctrls.html
+++ b/docs/Driver/html/group__eth__phy__mode__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -272,7 +272,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__execution__status.html b/docs/Driver/html/group__execution__status.html
index a5b9e95..6fbd5f0 100644
--- a/docs/Driver/html/group__execution__status.html
+++ b/docs/Driver/html/group__execution__status.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -159,7 +159,7 @@
 <p>Operation succeeded. </p>
 <p>The value 0 or positive values indicate that the function execution is completed without any errors. Note that positive values are used to provide for example the number of data items. </p>
 
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href="group__usart__interface__gr.html#ga96f31f07a6721cf75de2a7a0ab723d26">ARM_USART_Uninitialize()</a>, <a class="el" href="group__usbd__interface__gr.html#ga99207f7ff5e97a7f65754eab7f775fca">ARM_USBD_DeviceConnect()</a>, <a class="el" href="group__usbd__interface__gr.html#ga37234abecbb63e4e739f9676e489d2d1">ARM_USBD_DeviceDisconnect()</a>, <a class="el" href="group__usbd__interface__gr.html#ga7624d6b2cbe5e6ab5016206ce641eee2">ARM_USBD_DeviceGetState()</a>, <a class="el" href="group__usbd__interface__gr.html#ga7e149a4c6a0196da24a44f4fada75fb1">ARM_USBD_DeviceRemoteWakeup()</a>, <a class="el" href="group__usbd__interface__gr.html#gae66f696584e25fb2ddabe9070fa38670">ARM_USBD_DeviceSetAddress()</a>, <a class="el" href="group__usbd__interface__gr.html#ga62d7d5bdcf9ca7bf7e6d8434368abad8">ARM_USBD_EndpointConfigure()</a>, <a class="el" href="group__usbd__interface__gr.html#ga9502cd7b8e4c583920fccadc4ccf7975">ARM_USBD_EndpointStall()</a>, <a class="el" href="group__usbd__interface__gr.html#ga6e69ad097553125bb01a22dc719e0d30">ARM_USBD_EndpointTransfer()</a>, <a class="el" href="group__usbd__interface__gr.html#ga7cf3bcc105dbb8cbdc915e8caca8529e">ARM_USBD_EndpointTransferAbort()</a>, <a class="el" href="group__usbd__interface__gr.html#gaca913df5188dc0f0c4f707b57c2a88fc">ARM_USBD_EndpointUnconfigure()</a>, <a class="el" href="group__usbd__interface__gr.html#ga60b95c9c0c6767ff5938464cfd748f81">ARM_USBD_Initialize()</a>, <a class="el" href="group__usbd__interface__gr.html#gaa5bdaac19f6df30c6e569abef17cdb42">ARM_USBD_PowerControl()</a>, <a class="el" href="group__usbd__interface__gr.html#ga6bc0ebf699a0f28330f21cab83f85e9e">ARM_USBD_ReadSetupPacket()</a>, <a class="el" href="group__usbd__interface__gr.html#gafaead6713f141be1734de0110eda966b">ARM_USBD_Uninitialize()</a>, <a class="el" href="group__usbh__hci__gr.html#gabc1392a544cb64491b5ea5ce6590d832">ARM_USBH_HCI_Initialize()</a>, <a class="el" href="group__usbh__hci__gr.html#gade1e83403c6ea965fe3e6c4c21fbbded">ARM_USBH_HCI_PortVbusOnOff()</a>, <a class="el" href="group__usbh__hci__gr.html#ga27fa5ec8854cd9877bbef4abffe9a12b">ARM_USBH_HCI_PowerControl()</a>, <a class="el" href="group__usbh__hci__gr.html#gaacb68fdf201cdb1846b31642a760f041">ARM_USBH_HCI_Uninitialize()</a>, <a class="el" href="group__usbh__host__gr.html#gad1e73f778c95dd46d4396e7741a97f0b">ARM_USBH_Initialize()</a>, <a class="el" href="group__usbh__host__gr.html#gab2135041e6d481f186015f36fa0d0521">ARM_USBH_PipeDelete()</a>, <a class="el" href="group__usbh__host__gr.html#ga2076a7ae55f603859c726e57b061ac73">ARM_USBH_PipeModify()</a>, <a class="el" href="group__usbh__host__gr.html#ga7f5a605dbe98e450e6965d515fde65a7">ARM_USBH_PipeReset()</a>, <a class="el" href="group__usbh__host__gr.html#ga817d503a24ad8927fa362c8f6394920d">ARM_USBH_PipeTransfer()</a>, <a class="el" href="group__usbh__host__gr.html#ga1d4048a076aed71e585cea96a21f0afb">ARM_USBH_PipeTransferAbort()</a>, <a class="el" href="group__usbh__host__gr.html#gab99882e11ee03018da9ebe33797cc5ff">ARM_USBH_PortReset()</a>, <a class="el" href="group__usbh__host__gr.html#gab438b55ada37e2987e77e105f061f2de">ARM_USBH_PortResume()</a>, <a class="el" href="group__usbh__host__gr.html#ga620f8852a70a47a581001ed3050436d6">ARM_USBH_PortSuspend()</a>, <a class="el" href="group__usbh__host__gr.html#gaccca5ddd4a9d04388e7678a3aed3f6e4">ARM_USBH_PortVbusOnOff()</a>, <a class="el" href="group__usbh__host__gr.html#ga290a5e2e491da784e63be94699974d4a">ARM_USBH_PowerControl()</a>, and <a class="el" href="group__usbh__host__gr.html#gafc2f18bc12bb0019f9cd1836dcca408d">ARM_USBH_Uninitialize()</a>.</p>
+<p>Referenced by <a class="el" href="group__can__interface__gr.html#ga8d9f0c5f03a8a81ab062b5aa57e5dea4">ARM_CAN_Control()</a>, <a class="el" href="group__can__interface__gr.html#ga1fe6cc207415de604975ae251e269361">ARM_CAN_GetClock()</a>, <a class="el" href="group__can__interface__gr.html#ga676d6b567fc4ab3d44f5d7a50ec9419c">ARM_CAN_GetStatus()</a>, <a class="el" href="group__can__interface__gr.html#gaa72ceb25ba67e279d7432404632deb44">ARM_CAN_Initialize()</a>, <a class="el" href="group__can__interface__gr.html#gafc37084df5eab32f593c2744d35cf647">ARM_CAN_MessageRead()</a>, <a class="el" href="group__can__interface__gr.html#ga0dcffd362b4093043442a030eaebbcfe">ARM_CAN_MessageSend()</a>, <a class="el" href="group__can__interface__gr.html#ga00ec0715f6755a49dae5b60dca182630">ARM_CAN_ObjectConfigure()</a>, <a class="el" href="group__can__interface__gr.html#ga4f9bc7088704483388e14872c9d5385d">ARM_CAN_ObjectSetFilter()</a>, <a class="el" href="group__can__interface__gr.html#ga6f634f126ac97daef2f3115aa7bfed7c">ARM_CAN_PowerControl()</a>, <a class="el" href="group__can__interface__gr.html#ga88bb27a8525503a250cca7a2c4a5d07a">ARM_CAN_SetBitrate()</a>, <a class="el" href="group__can__interface__gr.html#ga28226a6e223f9b95b4dafb7c2f48a855">ARM_CAN_SetMode()</a>, <a class="el" href="group__can__interface__gr.html#ga1e3e364b64f2ab277399e3279cce5ef8">ARM_CAN_Uninitialize()</a>, <a class="el" href="group__i2c__interface__gr.html#ga828f5fa289d065675ef78a9a73d129dc">ARM_I2C_Control()</a>, <a class="el" href="group__i2c__interface__gr.html#ga79d2f7d01b3a681d1cf0d70ac6692696">ARM_I2C_Initialize()</a>, <a class="el" href="group__i2c__interface__gr.html#gafa22504bcf88a85584dfe6e0dd270ad5">ARM_I2C_MasterReceive()</a>, <a class="el" href="group__i2c__interface__gr.html#ga8bf4214580149d5a5d2360f71f0feb94">ARM_I2C_MasterTransmit()</a>, <a class="el" href="group__i2c__interface__gr.html#ga734a69200e063fdbfb5110062afe9329">ARM_I2C_PowerControl()</a>, <a class="el" href="group__i2c__interface__gr.html#gae3c9abccd1d377385d3d4cfe29035164">ARM_I2C_SlaveReceive()</a>, <a class="el" href="group__i2c__interface__gr.html#gafe164f30eba78f066272373b98a62cd4">ARM_I2C_SlaveTransmit()</a>, <a class="el" href="group__i2c__interface__gr.html#ga30d8bf600b6b3182a1f867407b3d6e75">ARM_I2C_Uninitialize()</a>, <a class="el" href="group__mci__interface__gr.html#ga3dfcf7b7186b711f9b63a096be816fe5">ARM_MCI_AbortTransfer()</a>, <a class="el" href="group__mci__interface__gr.html#gab161f80e0eda2815f3e0ebbba1314ff0">ARM_MCI_CardPower()</a>, <a class="el" href="group__mci__interface__gr.html#gaec0506a2aa4ae75cf6bc02528f36fe30">ARM_MCI_Control()</a>, <a class="el" href="group__mci__interface__gr.html#ga8d61aa42ce78d1864fa928c1f273cbd9">ARM_MCI_GetStatus()</a>, <a class="el" href="group__mci__interface__gr.html#ga6f34d4ab362e596ddaf23aac093268cf">ARM_MCI_Initialize()</a>, <a class="el" href="group__mci__interface__gr.html#ga19752749d04ed22dc91c4294645e0244">ARM_MCI_PowerControl()</a>, <a class="el" href="group__mci__interface__gr.html#ga5a431da89feabc2b4bc0c27943dff6f2">ARM_MCI_SendCommand()</a>, <a class="el" href="group__mci__interface__gr.html#gaaec681bcd8e6811c5743e33ee0f35ed1">ARM_MCI_SetupTransfer()</a>, <a class="el" href="group__mci__interface__gr.html#gaef8183e77797e74997551d03646d42c2">ARM_MCI_Uninitialize()</a>, <a class="el" href="group__sai__interface__gr.html#ga405a0769c33da6801055db0fb9b6c869">ARM_SAI_Control()</a>, <a class="el" href="group__sai__interface__gr.html#ga89622a02ca1e7affb1a01eefacb6f54c">ARM_SAI_Initialize()</a>, <a class="el" href="group__sai__interface__gr.html#gacdec50a3dd5902de601caa7397c1dabc">ARM_SAI_PowerControl()</a>, <a class="el" href="group__sai__interface__gr.html#ga2d55f506cef9d2849cbe418146086d98">ARM_SAI_Receive()</a>, <a class="el" href="group__sai__interface__gr.html#ga8bb6866c535adeb930bc4a847d476fcd">ARM_SAI_Send()</a>, <a class="el" href="group__sai__interface__gr.html#gabdefafaba6f072cfd7ed6f8f132422b6">ARM_SAI_Uninitialize()</a>, <a class="el" href="group__spi__interface__gr.html#gad18d229992598d6677bec250015e5d1a">ARM_SPI_Control()</a>, <a class="el" href="group__spi__interface__gr.html#ga1a3c11ed523a4355cd91069527945906">ARM_SPI_Initialize()</a>, <a class="el" href="group__spi__interface__gr.html#ga1a1e7e80ea32ae381b75213c32aa8067">ARM_SPI_PowerControl()</a>, <a class="el" href="group__spi__interface__gr.html#ga726aff54e782ed9b47f7ba1280a3d8f6">ARM_SPI_Receive()</a>, <a class="el" href="group__spi__interface__gr.html#gab2a303d1071e926280d50682f4808479">ARM_SPI_Send()</a>, <a class="el" href="group__spi__interface__gr.html#gaa24026b3822c10272e301f1505136ec2">ARM_SPI_Transfer()</a>, <a class="el" href="group__spi__interface__gr.html#ga0c480ee3eabb82fc746e89741ed2e03e">ARM_SPI_Uninitialize()</a>, <a class="el" href="group__usart__interface__gr.html#gad8ffdde2123b5412de3005c456da677d">ARM_USART_Control()</a>, <a class="el" href="group__usart__interface__gr.html#ga51f06805e9a6197c553fa9513ac7b9d6">ARM_USART_Initialize()</a>, <a class="el" href="group__usart__interface__gr.html#ga9bad012b28d544f3eeeea9c2f71a4086">ARM_USART_PowerControl()</a>, <a class="el" href="group__usart__interface__gr.html#gae9efabdabb5aaa17bce83339f8a58803">ARM_USART_Receive()</a>, <a class="el" href="group__usart__interface__gr.html#ga5cf758b0b9d03dca68846962f73c0b08">ARM_USART_Send()</a>, <a class="el" href="group__usart__interface__gr.html#gad8eb0eb1d1c24fc725584ab93214cfc7">ARM_USART_SetModemControl()</a>, <a class="el" href="group__usart__interface__gr.html#ga878899928d34a818edd3e97d67b65c2a">ARM_USART_Transfer()</a>, <a class="el" href="group__usart__interface__gr.html#ga96f31f07a6721cf75de2a7a0ab723d26">ARM_USART_Uninitialize()</a>, <a class="el" href="group__usbd__interface__gr.html#ga99207f7ff5e97a7f65754eab7f775fca">ARM_USBD_DeviceConnect()</a>, <a class="el" href="group__usbd__interface__gr.html#ga37234abecbb63e4e739f9676e489d2d1">ARM_USBD_DeviceDisconnect()</a>, <a class="el" href="group__usbd__interface__gr.html#ga7624d6b2cbe5e6ab5016206ce641eee2">ARM_USBD_DeviceGetState()</a>, <a class="el" href="group__usbd__interface__gr.html#ga7e149a4c6a0196da24a44f4fada75fb1">ARM_USBD_DeviceRemoteWakeup()</a>, <a class="el" href="group__usbd__interface__gr.html#gae66f696584e25fb2ddabe9070fa38670">ARM_USBD_DeviceSetAddress()</a>, <a class="el" href="group__usbd__interface__gr.html#ga62d7d5bdcf9ca7bf7e6d8434368abad8">ARM_USBD_EndpointConfigure()</a>, <a class="el" href="group__usbd__interface__gr.html#ga9502cd7b8e4c583920fccadc4ccf7975">ARM_USBD_EndpointStall()</a>, <a class="el" href="group__usbd__interface__gr.html#ga6e69ad097553125bb01a22dc719e0d30">ARM_USBD_EndpointTransfer()</a>, <a class="el" href="group__usbd__interface__gr.html#ga7cf3bcc105dbb8cbdc915e8caca8529e">ARM_USBD_EndpointTransferAbort()</a>, <a class="el" href="group__usbd__interface__gr.html#gaca913df5188dc0f0c4f707b57c2a88fc">ARM_USBD_EndpointUnconfigure()</a>, <a class="el" href="group__usbd__interface__gr.html#ga60b95c9c0c6767ff5938464cfd748f81">ARM_USBD_Initialize()</a>, <a class="el" href="group__usbd__interface__gr.html#gaa5bdaac19f6df30c6e569abef17cdb42">ARM_USBD_PowerControl()</a>, <a class="el" href="group__usbd__interface__gr.html#ga6bc0ebf699a0f28330f21cab83f85e9e">ARM_USBD_ReadSetupPacket()</a>, <a class="el" href="group__usbd__interface__gr.html#gafaead6713f141be1734de0110eda966b">ARM_USBD_Uninitialize()</a>, <a class="el" href="group__usbh__hci__gr.html#gabc1392a544cb64491b5ea5ce6590d832">ARM_USBH_HCI_Initialize()</a>, <a class="el" href="group__usbh__hci__gr.html#gade1e83403c6ea965fe3e6c4c21fbbded">ARM_USBH_HCI_PortVbusOnOff()</a>, <a class="el" href="group__usbh__hci__gr.html#ga27fa5ec8854cd9877bbef4abffe9a12b">ARM_USBH_HCI_PowerControl()</a>, <a class="el" href="group__usbh__hci__gr.html#gaacb68fdf201cdb1846b31642a760f041">ARM_USBH_HCI_Uninitialize()</a>, <a class="el" href="group__usbh__host__gr.html#gad1e73f778c95dd46d4396e7741a97f0b">ARM_USBH_Initialize()</a>, <a class="el" href="group__usbh__host__gr.html#gab2135041e6d481f186015f36fa0d0521">ARM_USBH_PipeDelete()</a>, <a class="el" href="group__usbh__host__gr.html#ga2076a7ae55f603859c726e57b061ac73">ARM_USBH_PipeModify()</a>, <a class="el" href="group__usbh__host__gr.html#ga7f5a605dbe98e450e6965d515fde65a7">ARM_USBH_PipeReset()</a>, <a class="el" href="group__usbh__host__gr.html#ga817d503a24ad8927fa362c8f6394920d">ARM_USBH_PipeTransfer()</a>, <a class="el" href="group__usbh__host__gr.html#ga1d4048a076aed71e585cea96a21f0afb">ARM_USBH_PipeTransferAbort()</a>, <a class="el" href="group__usbh__host__gr.html#gab99882e11ee03018da9ebe33797cc5ff">ARM_USBH_PortReset()</a>, <a class="el" href="group__usbh__host__gr.html#gab438b55ada37e2987e77e105f061f2de">ARM_USBH_PortResume()</a>, <a class="el" href="group__usbh__host__gr.html#ga620f8852a70a47a581001ed3050436d6">ARM_USBH_PortSuspend()</a>, <a class="el" href="group__usbh__host__gr.html#gaccca5ddd4a9d04388e7678a3aed3f6e4">ARM_USBH_PortVbusOnOff()</a>, <a class="el" href="group__usbh__host__gr.html#ga290a5e2e491da784e63be94699974d4a">ARM_USBH_PowerControl()</a>, <a class="el" href="group__usbh__host__gr.html#gafc2f18bc12bb0019f9cd1836dcca408d">ARM_USBH_Uninitialize()</a>, <a class="el" href="group__wifi__management__gr.html#ga7d545744a848702d75043de30ea5260a">ARM_WIFI_Activate()</a>, <a class="el" href="group__wifi__bypass__gr.html#ga678fa1aa06ca6aaa67c7eb7a7660730e">ARM_WIFI_BypassControl()</a>, <a class="el" href="group__wifi__management__gr.html#ga1842127df60067481ac2f40d19153e3e">ARM_WIFI_Deactivate()</a>, <a class="el" href="group__wifi__bypass__gr.html#ga1dbeb5528095af31a60560e0c48321d4">ARM_WIFI_EthReadFrame()</a>, <a class="el" href="group__wifi__bypass__gr.html#gac1da4619feaf62d0cc90cfe44642d16b">ARM_WIFI_EthSendFrame()</a>, <a class="el" href="group__wifi__control__gr.html#gabdc4c9966a3f22ac6e53119e71e67579">ARM_WIFI_GetModuleInfo()</a>, <a class="el" href="group__wifi__management__gr.html#ga29a5b0072470a8c56f0939f3c97ed08e">ARM_WIFI_GetNetInfo()</a>, <a class="el" href="group__wifi__management__gr.html#ga56910984e5068f6502e12f72e1f80edf">ARM_WIFI_GetOption()</a>, <a class="el" href="group__wifi__control__gr.html#gadc4b9aaae0fdf7d489b1d81e3c2f3474">ARM_WIFI_Initialize()</a>, <a class="el" href="group__wifi__socket__gr.html#gac7a8abb9e23f3f52dabce4153a53c1ca">ARM_WIFI_Ping()</a>, <a class="el" href="group__wifi__control__gr.html#ga48d4cb7c00e96d2b928cc4468d4e623b">ARM_WIFI_PowerControl()</a>, <a class="el" href="group__wifi__management__gr.html#ga856972af36e51cf0c4112029332d529f">ARM_WIFI_Scan()</a>, <a class="el" href="group__wifi__management__gr.html#gaf38a7aeb470eec596febc850c8b69ccf">ARM_WIFI_SetOption()</a>, and <a class="el" href="group__wifi__control__gr.html#gae1e488d4ecc365e30712e6b1711a9c5d">ARM_WIFI_Uninitialize()</a>.</p>
 
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@@ -259,7 +259,7 @@
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/Driver/html/group__flash__interface__gr.html b/docs/Driver/html/group__flash__interface__gr.html
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@@ -1081,7 +1081,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/Driver/html/group__i2c__address__flags.html b/docs/Driver/html/group__i2c__address__flags.html
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    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -169,7 +169,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__i2c__bus__speed__ctrls.html b/docs/Driver/html/group__i2c__bus__speed__ctrls.html
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@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -200,7 +200,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__i2c__control__codes.html b/docs/Driver/html/group__i2c__control__codes.html
index e000b20..5663608 100644
--- a/docs/Driver/html/group__i2c__control__codes.html
+++ b/docs/Driver/html/group__i2c__control__codes.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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   </td>
@@ -201,7 +201,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__i2c__control__gr.html b/docs/Driver/html/group__i2c__control__gr.html
index 97229d9..b099611 100644
--- a/docs/Driver/html/group__i2c__control__gr.html
+++ b/docs/Driver/html/group__i2c__control__gr.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -139,7 +139,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__i2c__interface__gr.html b/docs/Driver/html/group__i2c__interface__gr.html
index 53b75ba..66ce625 100644
--- a/docs/Driver/html/group__i2c__interface__gr.html
+++ b/docs/Driver/html/group__i2c__interface__gr.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -1354,7 +1354,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__mci__bus__data__width__ctrls.html b/docs/Driver/html/group__mci__bus__data__width__ctrls.html
index dab9a2a..275a263 100644
--- a/docs/Driver/html/group__mci__bus__data__width__ctrls.html
+++ b/docs/Driver/html/group__mci__bus__data__width__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -216,7 +216,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__mci__bus__speed__ctrls.html b/docs/Driver/html/group__mci__bus__speed__ctrls.html
index 1510aa8..e9b8b38 100644
--- a/docs/Driver/html/group__mci__bus__speed__ctrls.html
+++ b/docs/Driver/html/group__mci__bus__speed__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -255,7 +255,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__mci__card__power__ctrls.html b/docs/Driver/html/group__mci__card__power__ctrls.html
index 0587e2c..41d058d 100644
--- a/docs/Driver/html/group__mci__card__power__ctrls.html
+++ b/docs/Driver/html/group__mci__card__power__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -249,7 +249,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__mci__cmd__line__ctrls.html b/docs/Driver/html/group__mci__cmd__line__ctrls.html
index 1f8c06b..1756864 100644
--- a/docs/Driver/html/group__mci__cmd__line__ctrls.html
+++ b/docs/Driver/html/group__mci__cmd__line__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -163,7 +163,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__mci__control__gr.html b/docs/Driver/html/group__mci__control__gr.html
index 5ecb0fe..4ecf93e 100644
--- a/docs/Driver/html/group__mci__control__gr.html
+++ b/docs/Driver/html/group__mci__control__gr.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -152,7 +152,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__mci__driver__strength__ctrls.html b/docs/Driver/html/group__mci__driver__strength__ctrls.html
index 3378517..b72c81b 100644
--- a/docs/Driver/html/group__mci__driver__strength__ctrls.html
+++ b/docs/Driver/html/group__mci__driver__strength__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -202,7 +202,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__mci__event__gr.html b/docs/Driver/html/group__mci__event__gr.html
index f2ced56..31c24b5 100644
--- a/docs/Driver/html/group__mci__event__gr.html
+++ b/docs/Driver/html/group__mci__event__gr.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -328,7 +328,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__mci__interface__gr.html b/docs/Driver/html/group__mci__interface__gr.html
index 4f28689..c5d8a14 100644
--- a/docs/Driver/html/group__mci__interface__gr.html
+++ b/docs/Driver/html/group__mci__interface__gr.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -1233,13 +1233,13 @@
 <tr>
 <th align="left">Parameter <em>voltage</em> </th><th align="left">Description </th><th>supported when <a class="el" href="group__mci__interface__gr.html#structARM__MCI__CAPABILITIES" title="MCI Driver Capabilities. ">ARM_MCI_CAPABILITIES</a>  </th></tr>
 <tr>
-<td align="left"><a class="el" href="group__mci__card__power__ctrls.html#ga288fbd80b384739a80e8f3ec31205cf5">ARM_MCI_POWER_VDD_OFF</a> </td><td align="left">VDD (VCC) turned off </td><td><em>allways supported</em> </td></tr>
+<td align="left"><a class="el" href="group__mci__card__power__ctrls.html#ga288fbd80b384739a80e8f3ec31205cf5">ARM_MCI_POWER_VDD_OFF</a> </td><td align="left">VDD (VCC) turned off </td><td><em>always supported</em> </td></tr>
 <tr>
 <td align="left"><a class="el" href="group__mci__card__power__ctrls.html#ga565ecd36c8d0379fb4172da577cc540d">ARM_MCI_POWER_VDD_3V3</a> </td><td align="left">VDD (VCC) = <span class="XML-Token">3.3V</span> </td><td>data field <em>vdd</em> = <span class="XML-Token">1</span> </td></tr>
 <tr>
 <td align="left"><a class="el" href="group__mci__card__power__ctrls.html#ga2ce8e379c3691da3b51c9c97d61770ef">ARM_MCI_POWER_VDD_1V8</a> </td><td align="left">VDD (VCC) = <span class="XML-Token">1.8V</span> </td><td>data field <em>vdd_1v8</em> = <span class="XML-Token">1</span> </td></tr>
 <tr>
-<td align="left"><a class="el" href="group__mci__card__power__ctrls.html#ga6929c98a6bc8d898939a95111509220b">ARM_MCI_POWER_VCCQ_OFF</a> </td><td align="left">eMMC VCCQ turned off </td><td><em>allways supported</em> </td></tr>
+<td align="left"><a class="el" href="group__mci__card__power__ctrls.html#ga6929c98a6bc8d898939a95111509220b">ARM_MCI_POWER_VCCQ_OFF</a> </td><td align="left">eMMC VCCQ turned off </td><td><em>always supported</em> </td></tr>
 <tr>
 <td align="left"><a class="el" href="group__mci__card__power__ctrls.html#ga91a7201173cc092eaf7f0bcee028871e">ARM_MCI_POWER_VCCQ_3V3</a> </td><td align="left">eMMC VCCQ = <span class="XML-Token">3.3V</span> </td><td>data field <em>vccq</em> = <span class="XML-Token">1</span> </td></tr>
 <tr>
@@ -1764,7 +1764,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__mci__mode__ctrls.html b/docs/Driver/html/group__mci__mode__ctrls.html
index a796623..6d258b9 100644
--- a/docs/Driver/html/group__mci__mode__ctrls.html
+++ b/docs/Driver/html/group__mci__mode__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -384,7 +384,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__mci__send__command__flags__ctrls.html b/docs/Driver/html/group__mci__send__command__flags__ctrls.html
index 68969f8..6dd0846 100644
--- a/docs/Driver/html/group__mci__send__command__flags__ctrls.html
+++ b/docs/Driver/html/group__mci__send__command__flags__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -402,7 +402,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__mci__transfer__ctrls.html b/docs/Driver/html/group__mci__transfer__ctrls.html
index 257855f..4181acd 100644
--- a/docs/Driver/html/group__mci__transfer__ctrls.html
+++ b/docs/Driver/html/group__mci__transfer__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -198,7 +198,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__nand__bus__mode__codes.html b/docs/Driver/html/group__nand__bus__mode__codes.html
index 0fdadbc..d5a4af2 100644
--- a/docs/Driver/html/group__nand__bus__mode__codes.html
+++ b/docs/Driver/html/group__nand__bus__mode__codes.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -503,7 +503,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__nand__control__codes.html b/docs/Driver/html/group__nand__control__codes.html
index 82c654a..32f4eb4 100644
--- a/docs/Driver/html/group__nand__control__codes.html
+++ b/docs/Driver/html/group__nand__control__codes.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -214,7 +214,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__nand__control__gr.html b/docs/Driver/html/group__nand__control__gr.html
index fb9da67..be8163a 100644
--- a/docs/Driver/html/group__nand__control__gr.html
+++ b/docs/Driver/html/group__nand__control__gr.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -140,7 +140,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__nand__data__bus__width__codes.html b/docs/Driver/html/group__nand__data__bus__width__codes.html
index dbb849b..141bd00 100644
--- a/docs/Driver/html/group__nand__data__bus__width__codes.html
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Driver/html/group__nand__driver__ecc__codes.html b/docs/Driver/html/group__nand__driver__ecc__codes.html
index daa00fd..eab2cd2 100644
--- a/docs/Driver/html/group__nand__driver__ecc__codes.html
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   <td style="padding-left: 0.5em;">
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    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__nand__driver__flag__codes.html b/docs/Driver/html/group__nand__driver__flag__codes.html
index d2a0553..cab04f6 100644
--- a/docs/Driver/html/group__nand__driver__flag__codes.html
+++ b/docs/Driver/html/group__nand__driver__flag__codes.html
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
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+   &#160;<span id="projectnumber">Version 2.7.1</span>
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 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__nand__driver__seq__exec__codes.html b/docs/Driver/html/group__nand__driver__seq__exec__codes.html
index 70bd570..eede543 100644
--- a/docs/Driver/html/group__nand__driver__seq__exec__codes.html
+++ b/docs/Driver/html/group__nand__driver__seq__exec__codes.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__nand__driver__strength__codes.html b/docs/Driver/html/group__nand__driver__strength__codes.html
index 7130c1e..ad9bd51 100644
--- a/docs/Driver/html/group__nand__driver__strength__codes.html
+++ b/docs/Driver/html/group__nand__driver__strength__codes.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__nand__execution__status.html b/docs/Driver/html/group__nand__execution__status.html
index 0a3e0c9..a1a469f 100644
--- a/docs/Driver/html/group__nand__execution__status.html
+++ b/docs/Driver/html/group__nand__execution__status.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__nand__interface__gr.html b/docs/Driver/html/group__nand__interface__gr.html
index d6d8460..8533b34 100644
--- a/docs/Driver/html/group__nand__interface__gr.html
+++ b/docs/Driver/html/group__nand__interface__gr.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
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-   &#160;<span id="projectnumber">Version 2.6.0</span>
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 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__sai__bit__order__control.html b/docs/Driver/html/group__sai__bit__order__control.html
index 83e505a..a174d25 100644
--- a/docs/Driver/html/group__sai__bit__order__control.html
+++ b/docs/Driver/html/group__sai__bit__order__control.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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@@ -162,7 +162,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__sai__clock__pol__control.html b/docs/Driver/html/group__sai__clock__pol__control.html
index 8f996f6..1aa1e06 100644
--- a/docs/Driver/html/group__sai__clock__pol__control.html
+++ b/docs/Driver/html/group__sai__clock__pol__control.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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@@ -162,7 +162,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__sai__companding__control.html b/docs/Driver/html/group__sai__companding__control.html
index de41894..9c0f535 100644
--- a/docs/Driver/html/group__sai__companding__control.html
+++ b/docs/Driver/html/group__sai__companding__control.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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@@ -120,7 +120,7 @@
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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+<tr class="memdesc:ga185919d553cf9204e514136eb375ef08"><td class="mdescLeft">&#160;</td><td class="mdescRight">No companding (default)  <a href="#ga185919d553cf9204e514136eb375ef08">More...</a><br/></td></tr>
 <tr class="separator:ga185919d553cf9204e514136eb375ef08"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gacfd6c74148c0ae90aa6eaaf8e69da3a9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sai__companding__control.html#gacfd6c74148c0ae90aa6eaaf8e69da3a9">ARM_SAI_COMPANDING_A_LAW</a>&#160;&#160;&#160;(2U &lt;&lt; ARM_SAI_COMPANDING_Pos)</td></tr>
 <tr class="memdesc:gacfd6c74148c0ae90aa6eaaf8e69da3a9"><td class="mdescLeft">&#160;</td><td class="mdescRight">A-Law companding.  <a href="#gacfd6c74148c0ae90aa6eaaf8e69da3a9">More...</a><br/></td></tr>
@@ -142,7 +142,7 @@
       </table>
 </div><div class="memdoc">
 
-<p>No compading (default) </p>
+<p>No companding (default) </p>
 
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@@ -179,7 +179,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__sai__configure__control.html b/docs/Driver/html/group__sai__configure__control.html
index 7b490b8..4f5ca3f 100644
--- a/docs/Driver/html/group__sai__configure__control.html
+++ b/docs/Driver/html/group__sai__configure__control.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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@@ -185,7 +185,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__sai__control.html b/docs/Driver/html/group__sai__control.html
index daff04a..76d6585 100644
--- a/docs/Driver/html/group__sai__control.html
+++ b/docs/Driver/html/group__sai__control.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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@@ -139,7 +139,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__sai__controls.html b/docs/Driver/html/group__sai__controls.html
index 69f4076..0d073e8 100644
--- a/docs/Driver/html/group__sai__controls.html
+++ b/docs/Driver/html/group__sai__controls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -272,7 +272,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__sai__data__bits__control.html b/docs/Driver/html/group__sai__data__bits__control.html
index 2688db1..c856bc6 100644
--- a/docs/Driver/html/group__sai__data__bits__control.html
+++ b/docs/Driver/html/group__sai__data__bits__control.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -149,7 +149,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__sai__execution__status.html b/docs/Driver/html/group__sai__execution__status.html
index 7d1a260..76e8329 100644
--- a/docs/Driver/html/group__sai__execution__status.html
+++ b/docs/Driver/html/group__sai__execution__status.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -441,7 +441,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__sai__frame__control.html b/docs/Driver/html/group__sai__frame__control.html
index 9fe367b..d2a15e9 100644
--- a/docs/Driver/html/group__sai__frame__control.html
+++ b/docs/Driver/html/group__sai__frame__control.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
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    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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@@ -221,7 +221,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__sai__interface__gr.html b/docs/Driver/html/group__sai__interface__gr.html
index ac49204..e4b379c 100644
--- a/docs/Driver/html/group__sai__interface__gr.html
+++ b/docs/Driver/html/group__sai__interface__gr.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
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    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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@@ -1255,7 +1255,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__sai__mclk__pin__control.html b/docs/Driver/html/group__sai__mclk__pin__control.html
index 3932955..fcdea74 100644
--- a/docs/Driver/html/group__sai__mclk__pin__control.html
+++ b/docs/Driver/html/group__sai__mclk__pin__control.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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@@ -179,7 +179,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__sai__mclk__pres__control.html b/docs/Driver/html/group__sai__mclk__pres__control.html
index 6c022e3..5da0dc1 100644
--- a/docs/Driver/html/group__sai__mclk__pres__control.html
+++ b/docs/Driver/html/group__sai__mclk__pres__control.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -149,7 +149,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__sai__mode__control.html b/docs/Driver/html/group__sai__mode__control.html
index 8f0fd35..abdcf0e 100644
--- a/docs/Driver/html/group__sai__mode__control.html
+++ b/docs/Driver/html/group__sai__mode__control.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -162,7 +162,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__sai__mono__control.html b/docs/Driver/html/group__sai__mono__control.html
index cfabcd5..5f83011 100644
--- a/docs/Driver/html/group__sai__mono__control.html
+++ b/docs/Driver/html/group__sai__mono__control.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -145,7 +145,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__sai__protocol__control.html b/docs/Driver/html/group__sai__protocol__control.html
index 7a8d36f..5db2745 100644
--- a/docs/Driver/html/group__sai__protocol__control.html
+++ b/docs/Driver/html/group__sai__protocol__control.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -247,7 +247,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__sai__slot__control.html b/docs/Driver/html/group__sai__slot__control.html
index f70ae67..95d227f 100644
--- a/docs/Driver/html/group__sai__slot__control.html
+++ b/docs/Driver/html/group__sai__slot__control.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -221,7 +221,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__sai__sync__control.html b/docs/Driver/html/group__sai__sync__control.html
index 932070a..434677f 100644
--- a/docs/Driver/html/group__sai__sync__control.html
+++ b/docs/Driver/html/group__sai__sync__control.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -162,7 +162,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__spi__bit__order__ctrls.html b/docs/Driver/html/group__spi__bit__order__ctrls.html
index 50fdbea..febdb68 100644
--- a/docs/Driver/html/group__spi__bit__order__ctrls.html
+++ b/docs/Driver/html/group__spi__bit__order__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -164,7 +164,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__spi__data__bits__ctrls.html b/docs/Driver/html/group__spi__data__bits__ctrls.html
index 0a9c139..a56ba2c 100644
--- a/docs/Driver/html/group__spi__data__bits__ctrls.html
+++ b/docs/Driver/html/group__spi__data__bits__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -150,7 +150,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__spi__execution__status.html b/docs/Driver/html/group__spi__execution__status.html
index 3f9422a..e89d02c 100644
--- a/docs/Driver/html/group__spi__execution__status.html
+++ b/docs/Driver/html/group__spi__execution__status.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -219,7 +219,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__spi__frame__format__ctrls.html b/docs/Driver/html/group__spi__frame__format__ctrls.html
index 3d6f1b0..035743e 100644
--- a/docs/Driver/html/group__spi__frame__format__ctrls.html
+++ b/docs/Driver/html/group__spi__frame__format__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -236,7 +236,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__spi__interface__gr.html b/docs/Driver/html/group__spi__interface__gr.html
index ca046f8..209e545 100644
--- a/docs/Driver/html/group__spi__interface__gr.html
+++ b/docs/Driver/html/group__spi__interface__gr.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -1157,9 +1157,9 @@
 <tr>
 <th>Parameter <em>event</em> </th><th>Bit </th><th>Description  </th><th>supported when <a class="el" href="group__spi__interface__gr.html#structARM__SPI__CAPABILITIES" title="SPI Driver Capabilities. ">ARM_SPI_CAPABILITIES</a>   </th></tr>
 <tr>
-<td><a class="el" href="group__SPI__events.html#gaabdfc9e17641144cd50d36d15511a1b8">ARM_SPI_EVENT_TRANSFER_COMPLETE</a> </td><td>0 </td><td>Occurs after call to <a class="el" href="group__spi__interface__gr.html#gab2a303d1071e926280d50682f4808479">ARM_SPI_Send</a>, <a class="el" href="group__spi__interface__gr.html#ga726aff54e782ed9b47f7ba1280a3d8f6">ARM_SPI_Receive</a>, or <a class="el" href="group__spi__interface__gr.html#gaa24026b3822c10272e301f1505136ec2">ARM_SPI_Transfer</a> to indicate that all the data has been transferred. The driver is ready for the next transfer operation.  </td><td><em>allways supported</em>   </td></tr>
+<td><a class="el" href="group__SPI__events.html#gaabdfc9e17641144cd50d36d15511a1b8">ARM_SPI_EVENT_TRANSFER_COMPLETE</a> </td><td>0 </td><td>Occurs after call to <a class="el" href="group__spi__interface__gr.html#gab2a303d1071e926280d50682f4808479">ARM_SPI_Send</a>, <a class="el" href="group__spi__interface__gr.html#ga726aff54e782ed9b47f7ba1280a3d8f6">ARM_SPI_Receive</a>, or <a class="el" href="group__spi__interface__gr.html#gaa24026b3822c10272e301f1505136ec2">ARM_SPI_Transfer</a> to indicate that all the data has been transferred. The driver is ready for the next transfer operation.  </td><td><em>always supported</em>   </td></tr>
 <tr>
-<td><a class="el" href="group__SPI__events.html#ga8e63d99c80ea56de596a8d0a51fd8244">ARM_SPI_EVENT_DATA_LOST</a> </td><td>1 </td><td>Occurs in slave mode when data is requested/sent by master but send/receive/transfer operation has not been started and indicates that data is lost. Occurs also in master mode when driver cannot transfer data fast enough.  </td><td><em>allways supported</em>   </td></tr>
+<td><a class="el" href="group__SPI__events.html#ga8e63d99c80ea56de596a8d0a51fd8244">ARM_SPI_EVENT_DATA_LOST</a> </td><td>1 </td><td>Occurs in slave mode when data is requested/sent by master but send/receive/transfer operation has not been started and indicates that data is lost. Occurs also in master mode when driver cannot transfer data fast enough.  </td><td><em>always supported</em>   </td></tr>
 <tr>
 <td><a class="el" href="group__SPI__events.html#ga7eaa229003689aa18598273490b3e630">ARM_SPI_EVENT_MODE_FAULT</a> </td><td>2 </td><td>Occurs in master mode when Slave Select is deactivated and indicates Master Mode Fault. The driver is ready for the next transfer operation.  </td><td>data field <em>event_mode_fault</em> = <span class="XML-Token">1</span>   </td></tr>
 </table>
@@ -1171,7 +1171,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__spi__misc__ctrls.html b/docs/Driver/html/group__spi__misc__ctrls.html
index 56c2742..1a33b1b 100644
--- a/docs/Driver/html/group__spi__misc__ctrls.html
+++ b/docs/Driver/html/group__spi__misc__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -218,7 +218,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__spi__mode__ctrls.html b/docs/Driver/html/group__spi__mode__ctrls.html
index 851a95b..fe60369 100644
--- a/docs/Driver/html/group__spi__mode__ctrls.html
+++ b/docs/Driver/html/group__spi__mode__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -218,7 +218,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__spi__slave__select__mode__ctrls.html b/docs/Driver/html/group__spi__slave__select__mode__ctrls.html
index 93fcdc4..ec21bbd 100644
--- a/docs/Driver/html/group__spi__slave__select__mode__ctrls.html
+++ b/docs/Driver/html/group__spi__slave__select__mode__ctrls.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -243,7 +243,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__storage__interface__gr.html b/docs/Driver/html/group__storage__interface__gr.html
index 2a1a07f..666196f 100644
--- a/docs/Driver/html/group__storage__interface__gr.html
+++ b/docs/Driver/html/group__storage__interface__gr.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -1357,7 +1357,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__usart__clock__phase.html b/docs/Driver/html/group__usart__clock__phase.html
index e97e623..1bf841d 100644
--- a/docs/Driver/html/group__usart__clock__phase.html
+++ b/docs/Driver/html/group__usart__clock__phase.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -164,7 +164,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__usart__clock__polarity.html b/docs/Driver/html/group__usart__clock__polarity.html
index 749ced3..766c75b 100644
--- a/docs/Driver/html/group__usart__clock__polarity.html
+++ b/docs/Driver/html/group__usart__clock__polarity.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -164,7 +164,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__usart__data__bits.html b/docs/Driver/html/group__usart__data__bits.html
index 581c5cd..e23f58f 100644
--- a/docs/Driver/html/group__usart__data__bits.html
+++ b/docs/Driver/html/group__usart__data__bits.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -218,7 +218,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__usart__execution__status.html b/docs/Driver/html/group__usart__execution__status.html
index c288ae5..9e146b4 100644
--- a/docs/Driver/html/group__usart__execution__status.html
+++ b/docs/Driver/html/group__usart__execution__status.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -273,7 +273,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__usart__flow__control.html b/docs/Driver/html/group__usart__flow__control.html
index 672d38f..9a23814 100644
--- a/docs/Driver/html/group__usart__flow__control.html
+++ b/docs/Driver/html/group__usart__flow__control.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -200,7 +200,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__usart__interface__gr.html b/docs/Driver/html/group__usart__interface__gr.html
index d5b6a95..cf0d66f 100644
--- a/docs/Driver/html/group__usart__interface__gr.html
+++ b/docs/Driver/html/group__usart__interface__gr.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -1511,25 +1511,25 @@
 <tr>
 <th>Parameter <em>event</em> </th><th>Bit </th><th>Description  </th><th>supported when <a class="el" href="group__usart__interface__gr.html#structARM__USART__CAPABILITIES" title="USART Device Driver Capabilities. ">ARM_USART_CAPABILITIES</a>   </th></tr>
 <tr>
-<td><a class="el" href="group__USART__events.html#gaae1c626192b16ccace93f3546e7884bf">ARM_USART_EVENT_SEND_COMPLETE</a> </td><td>0 </td><td>Occurs after call to <a class="el" href="group__usart__interface__gr.html#ga5cf758b0b9d03dca68846962f73c0b08">ARM_USART_Send</a> to indicate that all the data to be sent was processed by the driver. All the data might have been already transmitted or parts of it are still queued in transmit buffers. The driver is ready for the next call to <a class="el" href="group__usart__interface__gr.html#ga5cf758b0b9d03dca68846962f73c0b08">ARM_USART_Send</a>; however USART may still transmit data.  </td><td><em>allways supported</em>   </td></tr>
+<td><a class="el" href="group__USART__events.html#gaae1c626192b16ccace93f3546e7884bf">ARM_USART_EVENT_SEND_COMPLETE</a> </td><td>0 </td><td>Occurs after call to <a class="el" href="group__usart__interface__gr.html#ga5cf758b0b9d03dca68846962f73c0b08">ARM_USART_Send</a> to indicate that all the data to be sent was processed by the driver. All the data might have been already transmitted or parts of it are still queued in transmit buffers. The driver is ready for the next call to <a class="el" href="group__usart__interface__gr.html#ga5cf758b0b9d03dca68846962f73c0b08">ARM_USART_Send</a>; however USART may still transmit data.  </td><td><em>always supported</em>   </td></tr>
 <tr>
-<td><a class="el" href="group__USART__events.html#ga08b165fd8525e44e3ce42ed6183cd30a">ARM_USART_EVENT_RECEIVE_COMPLETE</a> </td><td>1 </td><td>Occurs after call to <a class="el" href="group__usart__interface__gr.html#gae9efabdabb5aaa17bce83339f8a58803">ARM_USART_Receive</a> to indicate that all the data has been received. The driver is ready for the next call to <a class="el" href="group__usart__interface__gr.html#gae9efabdabb5aaa17bce83339f8a58803">ARM_USART_Receive</a>.  </td><td><em>allways supported</em>   </td></tr>
+<td><a class="el" href="group__USART__events.html#ga08b165fd8525e44e3ce42ed6183cd30a">ARM_USART_EVENT_RECEIVE_COMPLETE</a> </td><td>1 </td><td>Occurs after call to <a class="el" href="group__usart__interface__gr.html#gae9efabdabb5aaa17bce83339f8a58803">ARM_USART_Receive</a> to indicate that all the data has been received. The driver is ready for the next call to <a class="el" href="group__usart__interface__gr.html#gae9efabdabb5aaa17bce83339f8a58803">ARM_USART_Receive</a>.  </td><td><em>always supported</em>   </td></tr>
 <tr>
-<td><a class="el" href="group__USART__events.html#ga0599793e6aa531d56ff9f81ff12605d7">ARM_USART_EVENT_TRANSFER_COMPLETE</a> </td><td>2 </td><td>Occurs after call to <a class="el" href="group__usart__interface__gr.html#ga878899928d34a818edd3e97d67b65c2a">ARM_USART_Transfer</a> to indicate that all the data has been transferred. The driver is ready for the next call to <a class="el" href="group__usart__interface__gr.html#ga878899928d34a818edd3e97d67b65c2a">ARM_USART_Transfer</a>.  </td><td><em>allways supported</em>   </td></tr>
+<td><a class="el" href="group__USART__events.html#ga0599793e6aa531d56ff9f81ff12605d7">ARM_USART_EVENT_TRANSFER_COMPLETE</a> </td><td>2 </td><td>Occurs after call to <a class="el" href="group__usart__interface__gr.html#ga878899928d34a818edd3e97d67b65c2a">ARM_USART_Transfer</a> to indicate that all the data has been transferred. The driver is ready for the next call to <a class="el" href="group__usart__interface__gr.html#ga878899928d34a818edd3e97d67b65c2a">ARM_USART_Transfer</a>.  </td><td><em>always supported</em>   </td></tr>
 <tr>
 <td><a class="el" href="group__USART__events.html#ga12872a3b04343f97d9535b5b0d37286d">ARM_USART_EVENT_TX_COMPLETE</a> </td><td>3 </td><td>Occurs after call to <a class="el" href="group__usart__interface__gr.html#ga878899928d34a818edd3e97d67b65c2a">ARM_USART_Transfer</a> to indicate that all the data has been transferred. The driver is ready for the next call to <a class="el" href="group__usart__interface__gr.html#ga878899928d34a818edd3e97d67b65c2a">ARM_USART_Transfer</a>.  </td><td>data field <em>event_tx_complete</em> = <span class="XML-Token">1</span>   </td></tr>
 <tr>
-<td><a class="el" href="group__USART__events.html#gae57b9977bd338bf8bef86978843fa443">ARM_USART_EVENT_TX_UNDERFLOW</a> </td><td>4 </td><td>Occurs in synchronous slave mode when data is requested by the master but send/receive/transfer operation has not been started. Data field <em>rx_underflow</em> = <span class="XML-Token">1</span> of <a class="el" href="group__usart__interface__gr.html#structARM__USART__STATUS">ARM_USART_STATUS</a>.  </td><td><em>allways supported</em>   </td></tr>
+<td><a class="el" href="group__USART__events.html#gae57b9977bd338bf8bef86978843fa443">ARM_USART_EVENT_TX_UNDERFLOW</a> </td><td>4 </td><td>Occurs in synchronous slave mode when data is requested by the master but send/receive/transfer operation has not been started. Data field <em>rx_underflow</em> = <span class="XML-Token">1</span> of <a class="el" href="group__usart__interface__gr.html#structARM__USART__STATUS">ARM_USART_STATUS</a>.  </td><td><em>always supported</em>   </td></tr>
 <tr>
-<td><a class="el" href="group__USART__events.html#ga43a0869daf83abb3fea96926a97047ad">ARM_USART_EVENT_RX_OVERFLOW</a> </td><td>5 </td><td>Occurs when data is lost during receive/transfer operation or when data is lost because receive operation in asynchronous mode or receive/send/transfer operation in synchronous slave mode has not been started. Data field <em>rx_overflow</em> = <span class="XML-Token">1</span> of <a class="el" href="group__usart__interface__gr.html#structARM__USART__STATUS">ARM_USART_STATUS</a>.  </td><td><em>allways supported</em>   </td></tr>
+<td><a class="el" href="group__USART__events.html#ga43a0869daf83abb3fea96926a97047ad">ARM_USART_EVENT_RX_OVERFLOW</a> </td><td>5 </td><td>Occurs when data is lost during receive/transfer operation or when data is lost because receive operation in asynchronous mode or receive/send/transfer operation in synchronous slave mode has not been started. Data field <em>rx_overflow</em> = <span class="XML-Token">1</span> of <a class="el" href="group__usart__interface__gr.html#structARM__USART__STATUS">ARM_USART_STATUS</a>.  </td><td><em>always supported</em>   </td></tr>
 <tr>
 <td>ARM_USART_EVENT_RX_TIMEOUT </td><td>6 </td><td>Occurs during receive when idle time is detected between consecutive characters (idle time is hardware dependent). </td><td>data field <em>event_rx_timeout</em> = <span class="XML-Token">1</span>   </td></tr>
 <tr>
-<td><a class="el" href="group__USART__events.html#gaa1d19e48faf2bdc2a976de448928288e">ARM_USART_EVENT_RX_BREAK</a> </td><td>7 </td><td>Occurs when break is detected during receive. Data field <em>rx_break</em> = <span class="XML-Token">1</span> of <a class="el" href="group__usart__interface__gr.html#structARM__USART__STATUS">ARM_USART_STATUS</a>.  </td><td><em>allways supported</em>   </td></tr>
+<td><a class="el" href="group__USART__events.html#gaa1d19e48faf2bdc2a976de448928288e">ARM_USART_EVENT_RX_BREAK</a> </td><td>7 </td><td>Occurs when break is detected during receive. Data field <em>rx_break</em> = <span class="XML-Token">1</span> of <a class="el" href="group__usart__interface__gr.html#structARM__USART__STATUS">ARM_USART_STATUS</a>.  </td><td><em>always supported</em>   </td></tr>
 <tr>
-<td><a class="el" href="group__USART__events.html#ga2d97495c650220fbfe9d6977d0953127">ARM_USART_EVENT_RX_FRAMING_ERROR</a> </td><td>8 </td><td>Occurs when framing error is detected during receive. Data field <em>rx_framing_error</em> = <span class="XML-Token">1</span> of <a class="el" href="group__usart__interface__gr.html#structARM__USART__STATUS">ARM_USART_STATUS</a>.  </td><td><em>allways supported</em>   </td></tr>
+<td><a class="el" href="group__USART__events.html#ga2d97495c650220fbfe9d6977d0953127">ARM_USART_EVENT_RX_FRAMING_ERROR</a> </td><td>8 </td><td>Occurs when framing error is detected during receive. Data field <em>rx_framing_error</em> = <span class="XML-Token">1</span> of <a class="el" href="group__usart__interface__gr.html#structARM__USART__STATUS">ARM_USART_STATUS</a>.  </td><td><em>always supported</em>   </td></tr>
 <tr>
-<td><a class="el" href="group__USART__events.html#gadb4fec2530fc5ae3ad2b056741883451">ARM_USART_EVENT_RX_PARITY_ERROR</a> </td><td>9 </td><td>Occurs when parity error is detected during receive. Data field <em>rx_parity_error</em> = <span class="XML-Token">1</span> of <a class="el" href="group__usart__interface__gr.html#structARM__USART__STATUS">ARM_USART_STATUS</a>.  </td><td><em>allways supported</em>   </td></tr>
+<td><a class="el" href="group__USART__events.html#gadb4fec2530fc5ae3ad2b056741883451">ARM_USART_EVENT_RX_PARITY_ERROR</a> </td><td>9 </td><td>Occurs when parity error is detected during receive. Data field <em>rx_parity_error</em> = <span class="XML-Token">1</span> of <a class="el" href="group__usart__interface__gr.html#structARM__USART__STATUS">ARM_USART_STATUS</a>.  </td><td><em>always supported</em>   </td></tr>
 <tr>
 <td>ARM_USART_EVENT_CTS </td><td>10 </td><td>Indicates that CTS modem line state has changed. Data field <em>cts</em> = <span class="XML-Token">1</span> of <a class="el" href="group__usart__interface__gr.html#structARM__USART__MODEM__STATUS">ARM_USART_MODEM_STATUS</a>.  </td><td>data field <em>event_cts</em> = <span class="XML-Token">1</span> and <br/>
  data field <em>cts</em> = <span class="XML-Token">1</span>   </td></tr>
@@ -1551,7 +1551,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__usart__misc__control.html b/docs/Driver/html/group__usart__misc__control.html
index be932bd..2fb7857 100644
--- a/docs/Driver/html/group__usart__misc__control.html
+++ b/docs/Driver/html/group__usart__misc__control.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -326,7 +326,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__usart__mode__control.html b/docs/Driver/html/group__usart__mode__control.html
index 4a58b10..024f876 100644
--- a/docs/Driver/html/group__usart__mode__control.html
+++ b/docs/Driver/html/group__usart__mode__control.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -236,7 +236,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__usart__parity__bit.html b/docs/Driver/html/group__usart__parity__bit.html
index 5b65401..c8d118a 100644
--- a/docs/Driver/html/group__usart__parity__bit.html
+++ b/docs/Driver/html/group__usart__parity__bit.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -182,7 +182,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__usart__stop__bits.html b/docs/Driver/html/group__usart__stop__bits.html
index af91e6e..2466b44 100644
--- a/docs/Driver/html/group__usart__stop__bits.html
+++ b/docs/Driver/html/group__usart__stop__bits.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -201,7 +201,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:31 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__usb__interface__gr.html b/docs/Driver/html/group__usb__interface__gr.html
index b18f599..0eec786 100644
--- a/docs/Driver/html/group__usb__interface__gr.html
+++ b/docs/Driver/html/group__usb__interface__gr.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -165,7 +165,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/group__usbd__interface__gr.html b/docs/Driver/html/group__usbd__interface__gr.html
index 507e017..5fbd09b 100644
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+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>WiFi Socket Address Family definitions</title>
+<title>CMSIS-Driver: WiFi Socket Address Family definitions</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
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+<div class="title">WiFi Socket Address Family definitions<div class="ingroups"><a class="el" href="group__wifi__socket__gr.html">WiFi Socket</a></div></div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>WiFi Socket Address Family definitions.  
+<a href="#details">More...</a></p>
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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+<tr class="memitem:ga1a17023d92374b4f2d963aa7ac1c4e17"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__addr__family.html#ga1a17023d92374b4f2d963aa7ac1c4e17">ARM_SOCKET_AF_INET</a>&#160;&#160;&#160;1</td></tr>
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+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
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+<p>IPv4. </p>
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+<p>IPv6. </p>
+<p>Internet Address Family version 6. </p>
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
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+];
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+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>WiFi Bypass Mode</title>
+<title>CMSIS-Driver: WiFi Bypass Mode</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
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+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
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+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Driver
+   &#160;<span id="projectnumber">Version 2.7.1</span>
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+  </td>
+ </tr>
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+</table>
+</div>
+<!-- end header part -->
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+    <ul class="tablist">
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+<a href="#func-members">Functions</a>  </div>
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+</div><!--header-->
+<div class="contents">
+
+<p>Transfer Ethernet frames by WiFi module.  
+<a href="#details">More...</a></p>
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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+<tr class="memdesc:ga678fa1aa06ca6aaa67c7eb7a7660730e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable or disable bypass (pass-through) mode. Transmit and receive Ethernet frames (IP layer bypassed and WiFi/Ethernet translation).  <a href="#ga678fa1aa06ca6aaa67c7eb7a7660730e">More...</a><br/></td></tr>
+<tr class="separator:ga678fa1aa06ca6aaa67c7eb7a7660730e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac1da4619feaf62d0cc90cfe44642d16b"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__bypass__gr.html#gac1da4619feaf62d0cc90cfe44642d16b">ARM_WIFI_EthSendFrame</a> (uint32_t interface, const uint8_t *frame, uint32_t len)</td></tr>
+<tr class="memdesc:gac1da4619feaf62d0cc90cfe44642d16b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Send Ethernet frame (in bypass mode only).  <a href="#gac1da4619feaf62d0cc90cfe44642d16b">More...</a><br/></td></tr>
+<tr class="separator:gac1da4619feaf62d0cc90cfe44642d16b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1dbeb5528095af31a60560e0c48321d4"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__bypass__gr.html#ga1dbeb5528095af31a60560e0c48321d4">ARM_WIFI_EthReadFrame</a> (uint32_t interface, uint8_t *frame, uint32_t len)</td></tr>
+<tr class="memdesc:ga1dbeb5528095af31a60560e0c48321d4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read data of received Ethernet frame (in bypass mode only).  <a href="#ga1dbeb5528095af31a60560e0c48321d4">More...</a><br/></td></tr>
+<tr class="separator:ga1dbeb5528095af31a60560e0c48321d4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab67442ff061d0c4311a7046bce8d0cd1"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__bypass__gr.html#gab67442ff061d0c4311a7046bce8d0cd1">ARM_WIFI_EthGetRxFrameSize</a> (uint32_t interface)</td></tr>
+<tr class="memdesc:gab67442ff061d0c4311a7046bce8d0cd1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get size of received Ethernet frame (in bypass mode only).  <a href="#gab67442ff061d0c4311a7046bce8d0cd1">More...</a><br/></td></tr>
+<tr class="separator:gab67442ff061d0c4311a7046bce8d0cd1"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>Transfer Ethernet frames by WiFi module. </p>
+<p>The <a class="el" href="group__wifi__bypass__gr.html">WiFi Bypass Mode</a> functions are an optional interface and enable the transmission of Ethernet frames with WiFi modules. The use of this interface requires that the IP stack is running on the microcontroller. The internal IP stack of the WiFi module is therefore not used, and this usually means that the <a class="el" href="group__wifi__socket__gr.html">WiFi Socket</a> functions can not be used. </p>
+<h2 class="groupheader">Function Documentation</h2>
+<a class="anchor" id="ga678fa1aa06ca6aaa67c7eb7a7660730e"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_BypassControl </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>interface</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>mode</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Enable or disable bypass (pass-through) mode. Transmit and receive Ethernet frames (IP layer bypassed and WiFi/Ethernet translation). </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">interface</td><td>Interface (0 = Station, 1 = Access Point) </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">mode</td><td><ul>
+<li>value = 1: all packets bypass internal IP stack</li>
+<li>value = 0: all packets processed by internal IP stack </li>
+</ul>
+</td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="group__execution__status.html#ga85752c5de59e8adeb001e35ff5be6be7">ARM_DRIVER_OK</a> : Operation successful</li>
+<li><a class="el" href="group__execution__status.html#ga2f627075447749bb368d3b768be107cb">ARM_DRIVER_ERROR</a> : Operation failed</li>
+<li><a class="el" href="group__execution__status.html#ga2efa59e480d82697795439220e6884e4">ARM_DRIVER_ERROR_UNSUPPORTED</a> : Operation not supported</li>
+<li><a class="el" href="group__execution__status.html#gac781d4b70ce17c4c2efe2db045be751c">ARM_DRIVER_ERROR_PARAMETER</a> : Parameter error (invalid interface or mode)</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_BypassControl</b> enables or disables the WiFi bypass mode.</p>
+<p>The WiFi Bypass mode can only be enabled, if there is a bypass mode supported in the WiFi driver. You can check this by checking the driver's capabilities.</p>
+<dl class="section note"><dt>Note</dt><dd>Bypass mode is enabled by default if the module does not support the Socket interface.</dd></dl>
+<p>The argument <em>mode</em> specifies the desired state of the WiFi Bypass mode, which is enabled or disabled.</p>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line"><span class="keyword">extern</span> <a class="code" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a> Driver_WiFi0;</div>
+<div class="line"><span class="keyword">static</span> <a class="code" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a> *wifi;</div>
+<div class="line"><span class="keyword">static</span> <a class="code" href="group__eth__interface__gr.html#structARM__ETH__MAC__ADDR">ARM_ETH_MAC_ADDR</a> own_mac_address;</div>
+<div class="line"> </div>
+<div class="line"><span class="keyword">static</span> <span class="keywordtype">void</span> wifi_notify (uint32_t event, ,<span class="keywordtype">void</span> *arg) {</div>
+<div class="line">  <span class="keywordflow">switch</span> (event)  {</div>
+<div class="line">     :</div>
+<div class="line">  }  </div>
+<div class="line">}</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> initialize_wifi_bypass (<span class="keywordtype">void</span>) {</div>
+<div class="line">  <a class="code" href="group__wifi__control__gr.html#structARM__WIFI__CAPABILITIES">ARM_WIFI_CAPABILITIES</a> capabilities;</div>
+<div class="line"> </div>
+<div class="line">  wifi = &amp;Driver_WiFi0;</div>
+<div class="line">  capabilities = wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a1ced805656e067b5635f1af2292b69e1">GetCapabilities</a> ();</div>
+<div class="line">  <span class="keywordflow">if</span> (capabilities.<a class="code" href="group__wifi__control__gr.html#adbcc47408fb8c50d262a3be535108186">bypass_mode</a> == 0) {</div>
+<div class="line">    <span class="comment">// error handling </span></div>
+<div class="line">  } </div>
+<div class="line"> </div>
+<div class="line">  <span class="comment">// Initialize and Power-on WiFi Interface</span></div>
+<div class="line">  wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a99e597db8e61d0ff834561cb710e61ad">Initialize</a> ((capabilities.eth_rx_frame_event) ? wifi_notify : NULL);</div>
+<div class="line">  wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef">PowerControl</a> (<a class="code" href="Driver__Common_8h.html#ga47d6d7c31f88f3b8ae4aaf9d8444afa5abed52b77a9ce4775570e44a842b1295e">ARM_POWER_FULL</a>);</div>
+<div class="line"> </div>
+<div class="line">  <span class="comment">// populate own_mac_address with the address to use for station</span></div>
+<div class="line">  wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a6b5e1c7fcea96ff13f6fd16d57c8b68f">SetOption</a>(0U, <a class="code" href="group__WiFi__option.html#gafefb0fe1e5cdfb71f7f8cc7606840865">ARM_WIFI_MAC</a>, &amp;own_mac_address, 6U);</div>
+<div class="line"> </div>
+<div class="line">  wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a18c6762aa46cec65b65135eaeadebf23">BypassControl</a> (0U, 1U); <span class="comment">// Enable bypass mode for station</span></div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="gac1da4619feaf62d0cc90cfe44642d16b"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_EthSendFrame </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>interface</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint8_t *&#160;</td>
+          <td class="paramname"><em>frame</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>len</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Send Ethernet frame (in bypass mode only). </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">interface</td><td>Interface (0 = Station, 1 = Access Point) </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">frame</td><td>Pointer to frame buffer with data to send </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">len</td><td>Frame buffer length in bytes </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="group__execution__status.html#ga85752c5de59e8adeb001e35ff5be6be7">ARM_DRIVER_OK</a> : Operation successful</li>
+<li><a class="el" href="group__execution__status.html#ga2f627075447749bb368d3b768be107cb">ARM_DRIVER_ERROR</a> : Operation failed</li>
+<li><a class="el" href="group__execution__status.html#ga13c1123319c7b9a4735d63447f35116b">ARM_DRIVER_ERROR_BUSY</a> : Driver is busy</li>
+<li><a class="el" href="group__execution__status.html#ga2efa59e480d82697795439220e6884e4">ARM_DRIVER_ERROR_UNSUPPORTED</a> : Operation not supported</li>
+<li><a class="el" href="group__execution__status.html#gac781d4b70ce17c4c2efe2db045be751c">ARM_DRIVER_ERROR_PARAMETER</a> : Parameter error (invalid interface or NULL frame pointer)</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_EthSendFrame</b> writes an <b>Ethernet frame</b> to the WiFi transmit buffer.</p>
+<p>The WiFi bypass mode must be enabled by using the function <a class="el" href="group__wifi__bypass__gr.html#ga678fa1aa06ca6aaa67c7eb7a7660730e">ARM_WIFI_BypassControl</a> before a call to this function.</p>
+<p>The frame data addressed by <em>frame</em> starts with MAC destination and ends with the last Payload data byte. The frame data is copied into the transmit buffer of the WiFi interface.</p>
+<p>The maximum value for <em>len</em> is implied by the size restrictions of the Ethernet frame but is not verified. Using an invalid value for <em>len</em> may generate unpredicted results.</p>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line">status = wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a2648d7e0d1c10c48923d8d20d99311ab">EthSendFrame</a> (0U, &amp;frame_data[0], frame_length);</div>
+<div class="line"><span class="keywordflow">if</span> (status != <a class="code" href="group__execution__status.html#ga85752c5de59e8adeb001e35ff5be6be7">ARM_DRIVER_OK</a>)  {</div>
+<div class="line">  <span class="comment">// error handling</span></div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="ga1dbeb5528095af31a60560e0c48321d4"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_EthReadFrame </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>interface</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint8_t *&#160;</td>
+          <td class="paramname"><em>frame</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>len</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Read data of received Ethernet frame (in bypass mode only). </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">interface</td><td>Interface (0 = Station, 1 = Access Point) </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">frame</td><td>Pointer to frame buffer for data to read into </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">len</td><td>Frame buffer length in bytes </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>number of data bytes read or error code<ul>
+<li>value &gt;= 0 : Number of data bytes read</li>
+<li><a class="el" href="group__execution__status.html#ga2f627075447749bb368d3b768be107cb">ARM_DRIVER_ERROR</a> : Operation failed</li>
+<li><a class="el" href="group__execution__status.html#ga2efa59e480d82697795439220e6884e4">ARM_DRIVER_ERROR_UNSUPPORTED</a> : Operation not supported</li>
+<li><a class="el" href="group__execution__status.html#gac781d4b70ce17c4c2efe2db045be751c">ARM_DRIVER_ERROR_PARAMETER</a> : Parameter error (invalid interface or NULL frame pointer)</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_EthReadFrame</b> reads an <b>Ethernet frame</b> from the WiFi interface in the bypass mode.</p>
+<p>The <em>len</em> of the Ethernet frame can be checked using the function <a class="el" href="group__wifi__bypass__gr.html#gab67442ff061d0c4311a7046bce8d0cd1">ARM_WIFI_EthGetRxFrameSize</a>.</p>
+<p>The frame data addressed by <em>frame</em> starts with MAC destination and ends with the last Payload data byte. The frame data is read from the receive buffer of the WiFi interface and the number of bytes written into the memory addressed by <em>frame</em> is returned. A negative return value indicates an error whereby the status code is defined with driver common return codes.</p>
+<p>The function <a class="el" href="group__wifi__bypass__gr.html#ga1dbeb5528095af31a60560e0c48321d4">ARM_WIFI_EthReadFrame</a> may be called with <em>buf</em> = <span class="XML-Token">NULL</span> and <em>len</em> = <span class="XML-Token">0</span> to discard or release a frame. This is useful when an incorrect frame has been received or no memory is available to hold the Ethernet frame.</p>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line">size = wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#af7ecc54209ce3725037cb5c9629151cf">EthGetRxFrameSize</a> ();</div>
+<div class="line"><span class="keywordflow">if</span> ((size &lt; 14) || (size &gt; 1514)) {    <span class="comment">// frame excludes CRC</span></div>
+<div class="line">  wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a544ca40b7157efce5000cd83aa92f8a0">EthReadFrame</a> (NULL, 0);        <span class="comment">// Frame error, release it</span></div>
+<div class="line">}</div>
+<div class="line">len = wifi-&gt;ReadFrame (0U, &amp;frame_data[0], size);</div>
+<div class="line"><span class="keywordflow">if</span> (len &lt; 0)  {</div>
+<div class="line">  <span class="comment">// error handling</span></div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="gab67442ff061d0c4311a7046bce8d0cd1"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">uint32_t ARM_WIFI_EthGetRxFrameSize </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>interface</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Get size of received Ethernet frame (in bypass mode only). </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">interface</td><td>Interface (0 = Station, 1 = Access Point) </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>number of bytes in received frame</dd></dl>
+<p>The function <b>ARM_WIFI_EthGetRxFrameSize</b> returns the size of a received <b>Ethernet frame</b> in the bypass mode. This function can be called before <a class="el" href="group__wifi__bypass__gr.html#ga1dbeb5528095af31a60560e0c48321d4">ARM_WIFI_EthReadFrame</a> and retrieves the value <em>len</em>.</p>
+<p>The frame size includes MAC destination and ends with the last Payload data byte. Value <span class="XML-Token">0</span> indicates that no Ethernet frame is available in the receive buffer. Values smaller than minimum size of Ethernet frame or larger than maximum size of Ethernet frame indicate an invalid frame which needs to be discarded by calling <a class="el" href="group__wifi__bypass__gr.html#ga1dbeb5528095af31a60560e0c48321d4">ARM_WIFI_EthReadFrame</a>.</p>
+<p><b>Example:</b> </p>
+<ul>
+<li>see <a class="el" href="group__wifi__bypass__gr.html#ga1dbeb5528095af31a60560e0c48321d4">ARM_WIFI_EthReadFrame</a> </li>
+</ul>
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Driver/html/group__wifi__bypass__gr.js b/docs/Driver/html/group__wifi__bypass__gr.js
new file mode 100644
index 0000000..05ddec9
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+++ b/docs/Driver/html/group__wifi__bypass__gr.js
@@ -0,0 +1,7 @@
+var group__wifi__bypass__gr =
+[
+    [ "ARM_WIFI_BypassControl", "group__wifi__bypass__gr.html#ga678fa1aa06ca6aaa67c7eb7a7660730e", null ],
+    [ "ARM_WIFI_EthSendFrame", "group__wifi__bypass__gr.html#gac1da4619feaf62d0cc90cfe44642d16b", null ],
+    [ "ARM_WIFI_EthReadFrame", "group__wifi__bypass__gr.html#ga1dbeb5528095af31a60560e0c48321d4", null ],
+    [ "ARM_WIFI_EthGetRxFrameSize", "group__wifi__bypass__gr.html#gab67442ff061d0c4311a7046bce8d0cd1", null ]
+];
\ No newline at end of file
diff --git a/docs/Driver/html/group__wifi__control__gr.html b/docs/Driver/html/group__wifi__control__gr.html
new file mode 100644
index 0000000..f8a700a
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+++ b/docs/Driver/html/group__wifi__control__gr.html
@@ -0,0 +1,623 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>WiFi Control</title>
+<title>CMSIS-Driver: WiFi Control</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
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+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
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+   <div id="projectname">CMSIS-Driver
+   &#160;<span id="projectnumber">Version 2.7.1</span>
+   </div>
+   <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
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+<a href="#typedef-members">Typedefs</a> &#124;
+<a href="#func-members">Functions</a>  </div>
+  <div class="headertitle">
+<div class="title">WiFi Control<div class="ingroups"><a class="el" href="group__wifi__interface__gr.html">WiFi Interface</a></div></div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>Control functions for the WiFi module.  
+<a href="#details">More...</a></p>
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="groups"></a>
+Content</h2></td></tr>
+<tr class="memitem:group__wifi__event"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__event.html">WiFi Events</a></td></tr>
+<tr class="memdesc:group__wifi__event"><td class="mdescLeft">&#160;</td><td class="mdescRight">The WiFi driver generates call back events that are notified via the function <a class="el" href="group__wifi__control__gr.html#ga0c8243dee4bb161132692516f048bcec">ARM_WIFI_SignalEvent</a>. <br/></td></tr>
+<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table><table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a>
+Data Structures</h2></td></tr>
+<tr class="memitem:structARM__WIFI__CAPABILITIES"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__control__gr.html#structARM__WIFI__CAPABILITIES">ARM_WIFI_CAPABILITIES</a></td></tr>
+<tr class="memdesc:structARM__WIFI__CAPABILITIES"><td class="mdescLeft">&#160;</td><td class="mdescRight">WiFi Driver Capabilities.  <a href="group__wifi__control__gr.html#structARM__WIFI__CAPABILITIES">More...</a><br/></td></tr>
+<tr class="separator:structARM__WIFI__CAPABILITIES"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table><table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
+Typedefs</h2></td></tr>
+<tr class="memitem:gac0f04bbdd431c87a680626154c3e0a41"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__control__gr.html#gac0f04bbdd431c87a680626154c3e0a41">ARM_WIFI_SignalEvent_t</a> )(uint32_t event, void *arg)</td></tr>
+<tr class="memdesc:gac0f04bbdd431c87a680626154c3e0a41"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer to <a class="el" href="group__wifi__control__gr.html#ga0c8243dee4bb161132692516f048bcec">ARM_WIFI_SignalEvent</a> : Signal WiFi Event.  <a href="#gac0f04bbdd431c87a680626154c3e0a41">More...</a><br/></td></tr>
+<tr class="separator:gac0f04bbdd431c87a680626154c3e0a41"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table><table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
+Functions</h2></td></tr>
+<tr class="memitem:gad349fb835926a508e2a33501c0dff6a2"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__common__drv__gr.html#structARM__DRIVER__VERSION">ARM_DRIVER_VERSION</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__control__gr.html#gad349fb835926a508e2a33501c0dff6a2">ARM_WIFI_GetVersion</a> (void)</td></tr>
+<tr class="memdesc:gad349fb835926a508e2a33501c0dff6a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get driver version.  <a href="#gad349fb835926a508e2a33501c0dff6a2">More...</a><br/></td></tr>
+<tr class="separator:gad349fb835926a508e2a33501c0dff6a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga3496996799a4762e9958a8b6af683b4b"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__wifi__control__gr.html#structARM__WIFI__CAPABILITIES">ARM_WIFI_CAPABILITIES</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__control__gr.html#ga3496996799a4762e9958a8b6af683b4b">ARM_WIFI_GetCapabilities</a> (void)</td></tr>
+<tr class="memdesc:ga3496996799a4762e9958a8b6af683b4b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get driver capabilities.  <a href="#ga3496996799a4762e9958a8b6af683b4b">More...</a><br/></td></tr>
+<tr class="separator:ga3496996799a4762e9958a8b6af683b4b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gadc4b9aaae0fdf7d489b1d81e3c2f3474"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__control__gr.html#gadc4b9aaae0fdf7d489b1d81e3c2f3474">ARM_WIFI_Initialize</a> (<a class="el" href="group__wifi__control__gr.html#gac0f04bbdd431c87a680626154c3e0a41">ARM_WIFI_SignalEvent_t</a> cb_event)</td></tr>
+<tr class="memdesc:gadc4b9aaae0fdf7d489b1d81e3c2f3474"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize WiFi Module.  <a href="#gadc4b9aaae0fdf7d489b1d81e3c2f3474">More...</a><br/></td></tr>
+<tr class="separator:gadc4b9aaae0fdf7d489b1d81e3c2f3474"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae1e488d4ecc365e30712e6b1711a9c5d"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__control__gr.html#gae1e488d4ecc365e30712e6b1711a9c5d">ARM_WIFI_Uninitialize</a> (void)</td></tr>
+<tr class="memdesc:gae1e488d4ecc365e30712e6b1711a9c5d"><td class="mdescLeft">&#160;</td><td class="mdescRight">De-initialize WiFi Module.  <a href="#gae1e488d4ecc365e30712e6b1711a9c5d">More...</a><br/></td></tr>
+<tr class="separator:gae1e488d4ecc365e30712e6b1711a9c5d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga48d4cb7c00e96d2b928cc4468d4e623b"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__control__gr.html#ga48d4cb7c00e96d2b928cc4468d4e623b">ARM_WIFI_PowerControl</a> (<a class="el" href="group__common__drv__gr.html#ga47d6d7c31f88f3b8ae4aaf9d8444afa5">ARM_POWER_STATE</a> state)</td></tr>
+<tr class="memdesc:ga48d4cb7c00e96d2b928cc4468d4e623b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Control WiFi Module Power.  <a href="#ga48d4cb7c00e96d2b928cc4468d4e623b">More...</a><br/></td></tr>
+<tr class="separator:ga48d4cb7c00e96d2b928cc4468d4e623b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gabdc4c9966a3f22ac6e53119e71e67579"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__control__gr.html#gabdc4c9966a3f22ac6e53119e71e67579">ARM_WIFI_GetModuleInfo</a> (char *module_info, uint32_t max_len)</td></tr>
+<tr class="memdesc:gabdc4c9966a3f22ac6e53119e71e67579"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Module information.  <a href="#gabdc4c9966a3f22ac6e53119e71e67579">More...</a><br/></td></tr>
+<tr class="separator:gabdc4c9966a3f22ac6e53119e71e67579"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0c8243dee4bb161132692516f048bcec"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__control__gr.html#ga0c8243dee4bb161132692516f048bcec">ARM_WIFI_SignalEvent</a> (uint32_t event, void *arg)</td></tr>
+<tr class="memdesc:ga0c8243dee4bb161132692516f048bcec"><td class="mdescLeft">&#160;</td><td class="mdescRight">Signal WiFi Events.  <a href="#ga0c8243dee4bb161132692516f048bcec">More...</a><br/></td></tr>
+<tr class="separator:ga0c8243dee4bb161132692516f048bcec"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>Control functions for the WiFi module. </p>
+<p>The <a class="el" href="group__wifi__control__gr.html">WiFi Control</a> functions setup and control the WiFi module. </p>
+<hr/><h2 class="groupheader">Data Structure Documentation</h2>
+<a name="structARM__WIFI__CAPABILITIES" id="structARM__WIFI__CAPABILITIES"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">struct ARM_WIFI_CAPABILITIES</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<div class="textblock"><p>WiFi Driver Capabilities. </p>
+<p>A WiFi driver can be implemented with different capabilities. The data fields of this structure encode the capabilities implemented by this driver.</p>
+<p><b>Returned by:</b></p>
+<ul>
+<li><a class="el" href="group__wifi__control__gr.html#ga3496996799a4762e9958a8b6af683b4b">ARM_WIFI_GetCapabilities</a> </li>
+</ul>
+</div><table class="fieldtable">
+<tr><th colspan="3">Data Fields</th></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="a3c9e76f6560429efd6dcc41ffd4b67b9"></a>uint32_t</td>
+<td class="fieldname">
+station: 1</td>
+<td class="fielddoc">
+Station. </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="ae980bcb85233b9c5904072246ac71dd7"></a>uint32_t</td>
+<td class="fieldname">
+ap: 1</td>
+<td class="fielddoc">
+Access Point. </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="ad280904e2429375205c09e53fe8cdcb1"></a>uint32_t</td>
+<td class="fieldname">
+station_ap: 1</td>
+<td class="fielddoc">
+Concurrent Station and Access Point. </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="a87476544767703fc9f45f81b16cd4429"></a>uint32_t</td>
+<td class="fieldname">
+wps_station: 1</td>
+<td class="fielddoc">
+WiFi Protected Setup (WPS) for Station. </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="a7689c7dd824016b1962854a86d23d141"></a>uint32_t</td>
+<td class="fieldname">
+wps_ap: 1</td>
+<td class="fielddoc">
+WiFi Protected Setup (WPS) for Access Point. </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="a9fc191093a9bc356c3d85e9cbf185620"></a>uint32_t</td>
+<td class="fieldname">
+event_ap_connect: 1</td>
+<td class="fielddoc">
+Access Point: event generated on Station connect. </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="a18a7e7fe3a4f48548af6db6c825cc427"></a>uint32_t</td>
+<td class="fieldname">
+event_ap_disconnect: 1</td>
+<td class="fielddoc">
+Access Point: event generated on Station disconnect. </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="ac4c6eadec013cf8a11b8eca66b809431"></a>uint32_t</td>
+<td class="fieldname">
+event_eth_rx_frame: 1</td>
+<td class="fielddoc">
+Event generated on Ethernet frame reception in bypass mode. </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="adbcc47408fb8c50d262a3be535108186"></a>uint32_t</td>
+<td class="fieldname">
+bypass_mode: 1</td>
+<td class="fielddoc">
+Bypass or pass-through mode (Ethernet interface) </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="a69ddb9c845da426f636d9dd0dbed4e7e"></a>uint32_t</td>
+<td class="fieldname">
+ip: 1</td>
+<td class="fielddoc">
+IP (UDP/TCP) (Socket interface) </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="aad13478539ad093fabafd1804acac4a2"></a>uint32_t</td>
+<td class="fieldname">
+ip6: 1</td>
+<td class="fielddoc">
+IPv6 (Socket interface) </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="aef01bbaa48bdb4fba71684d8f31eb0b1"></a>uint32_t</td>
+<td class="fieldname">
+ping: 1</td>
+<td class="fielddoc">
+Ping (ICMP) </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="aa43c4c21b173ada1b6b7568956f0d650"></a>uint32_t</td>
+<td class="fieldname">
+reserved: 20</td>
+<td class="fielddoc">
+Reserved (must be zero) </td></tr>
+</table>
+
+</div>
+</div>
+<h2 class="groupheader">Typedef Documentation</h2>
+<a class="anchor" id="gac0f04bbdd431c87a680626154c3e0a41"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">ARM_WIFI_SignalEvent_t</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Pointer to <a class="el" href="group__wifi__control__gr.html#ga0c8243dee4bb161132692516f048bcec">ARM_WIFI_SignalEvent</a> : Signal WiFi Event. </p>
+<p>Provides the typedef for the callback function <a class="el" href="group__wifi__control__gr.html#ga0c8243dee4bb161132692516f048bcec">ARM_WIFI_SignalEvent</a>.</p>
+<p><b>Parameter for:</b></p>
+<ul>
+<li><a class="el" href="group__wifi__control__gr.html#gadc4b9aaae0fdf7d489b1d81e3c2f3474">ARM_WIFI_Initialize</a> </li>
+</ul>
+
+</div>
+</div>
+<h2 class="groupheader">Function Documentation</h2>
+<a class="anchor" id="gad349fb835926a508e2a33501c0dff6a2"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="group__common__drv__gr.html#structARM__DRIVER__VERSION">ARM_DRIVER_VERSION</a> ARM_WIFI_GetVersion </td>
+          <td>(</td>
+          <td class="paramtype">void&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Get driver version. </p>
+<dl class="section return"><dt>Returns</dt><dd><a class="el" href="group__common__drv__gr.html#structARM__DRIVER__VERSION">ARM_DRIVER_VERSION</a></dd></dl>
+<p>The function <b>ARM_WIFI_GetVersion</b> returns version information of the driver implementation in <a class="el" href="group__common__drv__gr.html#structARM__DRIVER__VERSION">ARM_DRIVER_VERSION</a>.</p>
+<p>API version is the version of the CMSIS-Driver specification used to implement this driver. Driver version is source code version of the actual driver implementation.</p>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line"><span class="keyword">extern</span> <a class="code" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a> Driver_WiFi0;</div>
+<div class="line"><span class="keyword">static</span> <a class="code" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a> *wifi;</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> get_wifi_version (<span class="keywordtype">void</span>)  {</div>
+<div class="line">  <a class="code" href="group__common__drv__gr.html#structARM__DRIVER__VERSION">ARM_DRIVER_VERSION</a> version;</div>
+<div class="line"> </div>
+<div class="line">  wifi= &amp;Driver_WiFi0;  </div>
+<div class="line">  version = wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a8834b281da48583845c044a81566c1b3">GetVersion</a> ();</div>
+<div class="line">  <span class="keywordflow">if</span> (version.<a class="code" href="group__common__drv__gr.html#ad180da20fbde1d3dafc074af87c19540">api</a> &lt; 0x100U) {        <span class="comment">// requires at minimum API version 1.0 or higher</span></div>
+<div class="line">    <span class="comment">// error handling</span></div>
+<div class="line">    <span class="keywordflow">return</span>;</div>
+<div class="line">  }</div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="ga3496996799a4762e9958a8b6af683b4b"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="group__wifi__control__gr.html#structARM__WIFI__CAPABILITIES">ARM_WIFI_CAPABILITIES</a> ARM_WIFI_GetCapabilities </td>
+          <td>(</td>
+          <td class="paramtype">void&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Get driver capabilities. </p>
+<dl class="section return"><dt>Returns</dt><dd><a class="el" href="group__wifi__control__gr.html#structARM__WIFI__CAPABILITIES">ARM_WIFI_CAPABILITIES</a></dd></dl>
+<p>The function <b>ARM_WIFI_GetCapabilities</b> retrieves information about capabilities in this driver implementation. The data fields of the struct <a class="el" href="group__wifi__control__gr.html#structARM__WIFI__CAPABILITIES">ARM_WIFI_CAPABILITIES</a> encode various capabilities, for example if a WiFi module supports the Access Point mode or the bypass mode, or is capable to signal events using the <a class="el" href="group__wifi__control__gr.html#ga0c8243dee4bb161132692516f048bcec">ARM_WIFI_SignalEvent</a> callback function.</p>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line"><span class="keyword">extern</span> <a class="code" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a> Driver_WiFi0;</div>
+<div class="line"><span class="keyword">static</span> <a class="code" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a> *wifi;</div>
+<div class="line">  </div>
+<div class="line"><span class="keywordtype">void</span> get_wifi_capabilities (<span class="keywordtype">void</span>)  {</div>
+<div class="line">  <a class="code" href="group__wifi__control__gr.html#structARM__WIFI__CAPABILITIES">ARM_WIFI_CAPABILITIES</a> capabilities;</div>
+<div class="line"> </div>
+<div class="line">  wifi = &amp;Driver_WiFi0;  </div>
+<div class="line">  capabilities = wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a1ced805656e067b5635f1af2292b69e1">GetCapabilities</a> ();</div>
+<div class="line">  <span class="comment">// interrogate capabilities</span></div>
+<div class="line">   :</div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="gadc4b9aaae0fdf7d489b1d81e3c2f3474"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_Initialize </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__wifi__control__gr.html#gac0f04bbdd431c87a680626154c3e0a41">ARM_WIFI_SignalEvent_t</a>&#160;</td>
+          <td class="paramname"><em>cb_event</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Initialize WiFi Module. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">cb_event</td><td>Pointer to <a class="el" href="group__wifi__control__gr.html#gac0f04bbdd431c87a680626154c3e0a41">ARM_WIFI_SignalEvent_t</a> </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="group__execution__status.html#ga85752c5de59e8adeb001e35ff5be6be7">ARM_DRIVER_OK</a> : Operation successful</li>
+<li><a class="el" href="group__execution__status.html#ga2f627075447749bb368d3b768be107cb">ARM_DRIVER_ERROR</a> : Operation failed</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_Initialize</b> initializes the WiFi module.</p>
+<p>It is called when the middleware component starts operation.</p>
+<p>The <a class="el" href="group__wifi__control__gr.html#gadc4b9aaae0fdf7d489b1d81e3c2f3474">ARM_WIFI_Initialize</a> function performs the following operations:</p>
+<ul>
+<li>Initializes the resources and peripherals required for the WiFi module.</li>
+<li>Registers the <a class="el" href="group__wifi__control__gr.html#ga0c8243dee4bb161132692516f048bcec">ARM_WIFI_SignalEvent</a> callback function.</li>
+</ul>
+<p>The parameter <em>cb_event</em> is a pointer to the <a class="el" href="group__wifi__control__gr.html#ga0c8243dee4bb161132692516f048bcec">ARM_WIFI_SignalEvent</a> callback function; use a <span class="XML-Token">NULL</span> pointer when no callback signals are required.</p>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line"><span class="keyword">extern</span> <a class="code" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a> Driver_WiFi0;</div>
+<div class="line"><span class="keyword">static</span> <a class="code" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a> *wifi;</div>
+<div class="line"><span class="keyword">static</span> <a class="code" href="group__eth__interface__gr.html#structARM__ETH__MAC__ADDR">ARM_ETH_MAC_ADDR</a> own_mac_address;</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> initialize_wifi (<span class="keywordtype">void</span>) {</div>
+<div class="line">  wifi = &amp;Driver_WiFi0;</div>
+<div class="line"> </div>
+<div class="line">  <span class="comment">// Initialize and Power-on WiFi Module</span></div>
+<div class="line">  wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a99e597db8e61d0ff834561cb710e61ad">Initialize</a> (NULL);</div>
+<div class="line">  wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef">PowerControl</a> (<a class="code" href="Driver__Common_8h.html#ga47d6d7c31f88f3b8ae4aaf9d8444afa5abed52b77a9ce4775570e44a842b1295e">ARM_POWER_FULL</a>);</div>
+<div class="line"> </div>
+<div class="line">  <span class="comment">// Populate own_mac_address with the address to use</span></div>
+<div class="line">  wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a6b5e1c7fcea96ff13f6fd16d57c8b68f">SetOption</a>(<a class="code" href="group__WiFi__option.html#gafefb0fe1e5cdfb71f7f8cc7606840865">ARM_WIFI_MAC</a>, &amp;own_mac_address, 6U);</div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="gae1e488d4ecc365e30712e6b1711a9c5d"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_Uninitialize </td>
+          <td>(</td>
+          <td class="paramtype">void&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>De-initialize WiFi Module. </p>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="group__execution__status.html#ga85752c5de59e8adeb001e35ff5be6be7">ARM_DRIVER_OK</a> : Operation successful</li>
+<li><a class="el" href="group__execution__status.html#ga2f627075447749bb368d3b768be107cb">ARM_DRIVER_ERROR</a> : Operation failed</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_Uninitialize</b> de-initializes the resources of the WiFi module.</p>
+<p>It is called when the middleware component stops operation and releases the software resources used by the module.</p>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line"><span class="keyword">extern</span> <a class="code" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a> Driver_WiFi0;</div>
+<div class="line"><span class="keyword">static</span> <a class="code" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a> *wifi;</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> uninitialize_wifi (<span class="keywordtype">void</span>) {</div>
+<div class="line">  wifi = &amp;Driver_WiFi0;</div>
+<div class="line"> </div>
+<div class="line">  <span class="comment">// Power off and De-initialize WiFi Module</span></div>
+<div class="line">  wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef">PowerControl</a> (<a class="code" href="Driver__Common_8h.html#ga47d6d7c31f88f3b8ae4aaf9d8444afa5ab6f5becc85ebd51c3dd2524a95d2ca35">ARM_POWER_OFF</a>);</div>
+<div class="line">  wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#adcf20681a1402869ecb5c6447fada17b">Uninitialize</a> ();</div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="ga48d4cb7c00e96d2b928cc4468d4e623b"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_PowerControl </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__common__drv__gr.html#ga47d6d7c31f88f3b8ae4aaf9d8444afa5">ARM_POWER_STATE</a>&#160;</td>
+          <td class="paramname"><em>state</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Control WiFi Module Power. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">state</td><td>Power state<ul>
+<li><a class="el" href="Driver__Common_8h.html#ga47d6d7c31f88f3b8ae4aaf9d8444afa5ab6f5becc85ebd51c3dd2524a95d2ca35">ARM_POWER_OFF</a> : Power off: no operation possible</li>
+<li><a class="el" href="Driver__Common_8h.html#ga47d6d7c31f88f3b8ae4aaf9d8444afa5a9ef9e57cbcc948d0e22314e73dc8c434">ARM_POWER_LOW</a> : Low-power mode: sleep or deep-sleep depending on <a class="el" href="group__WiFi__option.html#ga77e38a3d5d2fe8c04aebaf8d24e1b8d4">ARM_WIFI_LP_TIMER</a> option set</li>
+<li><a class="el" href="Driver__Common_8h.html#ga47d6d7c31f88f3b8ae4aaf9d8444afa5abed52b77a9ce4775570e44a842b1295e">ARM_POWER_FULL</a> : Power on: full operation at maximum performance </li>
+</ul>
+</td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="group__execution__status.html#ga85752c5de59e8adeb001e35ff5be6be7">ARM_DRIVER_OK</a> : Operation successful</li>
+<li><a class="el" href="group__execution__status.html#ga2f627075447749bb368d3b768be107cb">ARM_DRIVER_ERROR</a> : Operation failed</li>
+<li><a class="el" href="group__execution__status.html#ga2efa59e480d82697795439220e6884e4">ARM_DRIVER_ERROR_UNSUPPORTED</a> : Operation not supported</li>
+<li><a class="el" href="group__execution__status.html#gac781d4b70ce17c4c2efe2db045be751c">ARM_DRIVER_ERROR_PARAMETER</a> : Parameter error (invalid state)</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_PowerControl</b> allows you to configure the power modes of the WiFi module.</p>
+<p>The parameter <em>state</em> specifies the <a class="el" href="group__common__drv__gr.html#ga47d6d7c31f88f3b8ae4aaf9d8444afa5">ARM_POWER_STATE</a>.</p>
+<p>Low-power mode depends on additional options set by <a class="el" href="group__wifi__management__gr.html#gaf38a7aeb470eec596febc850c8b69ccf">ARM_WIFI_SetOption</a> :</p>
+<ul>
+<li>Deep-sleep mode is entered when <a class="el" href="group__WiFi__option.html#ga77e38a3d5d2fe8c04aebaf8d24e1b8d4">ARM_WIFI_LP_TIMER</a> option is set to a value different than 0</li>
+<li>Sleep mode is entered otherwise</li>
+</ul>
+<p><b>Deep-sleep</b> mode (only for station): Module turns off the radio and also internal CPU thus reducing power consumption to minimum, only the timer is running that wakes-up the module after specified time. When timer expires the module reconnects to the access point.</p>
+<p>This mode is used when power consumption is a priority (battery powered devices) and when WiFi is used in short intervals that do not occur very often (example: sending a temperature from a sensor to a cloud every 10 seconds).</p>
+<p><b>Sleep</b> mode (only for station): Module reduces power consumption by going into sleep and waking up periodically to listen for beacons.</p>
+<p>Delivery Traffic Indication Message (DTIM) interval can be configured with option <a class="el" href="group__WiFi__option.html#ga947c297f1364993524bf515beba296f1">ARM_WIFI_DTIM</a> (station and access point) and beacon interval with option <a class="el" href="group__WiFi__option.html#ga6171d24c661b54465ced2dae7980897c">ARM_WIFI_BEACON</a> (only for access point).</p>
+<p>Default module intervals are used when those options are not explicitly set.</p>
+<p>If power <em>state</em> specifies an unsupported mode, the function returns <a class="el" href="group__execution__status.html#ga2efa59e480d82697795439220e6884e4">ARM_DRIVER_ERROR_UNSUPPORTED</a> as status information and the previous power state of the peripheral is unchanged. Multiple calls with the same <em>state</em> generate no error.</p>
+<p><b>Example:</b> </p>
+<ul>
+<li>see <a class="el" href="group__wifi__control__gr.html#gadc4b9aaae0fdf7d489b1d81e3c2f3474">ARM_WIFI_Initialize</a></li>
+<li>see <a class="el" href="group__wifi__control__gr.html#gae1e488d4ecc365e30712e6b1711a9c5d">ARM_WIFI_Uninitialize</a> </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="gabdc4c9966a3f22ac6e53119e71e67579"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_GetModuleInfo </td>
+          <td>(</td>
+          <td class="paramtype">char *&#160;</td>
+          <td class="paramname"><em>module_info</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>max_len</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Get Module information. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[out]</td><td class="paramname">module_info</td><td>Pointer to character buffer were info string will be returned </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">max_len</td><td>Maximum length of string to return (including null terminator) </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="group__execution__status.html#ga85752c5de59e8adeb001e35ff5be6be7">ARM_DRIVER_OK</a> : Operation successful</li>
+<li><a class="el" href="group__execution__status.html#ga2f627075447749bb368d3b768be107cb">ARM_DRIVER_ERROR</a> : Operation failed</li>
+<li><a class="el" href="group__execution__status.html#ga2efa59e480d82697795439220e6884e4">ARM_DRIVER_ERROR_UNSUPPORTED</a> : Operation not supported</li>
+<li><a class="el" href="group__execution__status.html#gac781d4b70ce17c4c2efe2db045be751c">ARM_DRIVER_ERROR_PARAMETER</a> : Parameter error (NULL module_info pointer or max_len equals to 0)</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_GetModuleInfo</b> retrieves string containing information about the WiFi module.</p>
+<p>The information might include module name, firmware version, ...</p>
+<dl class="section note"><dt>Note</dt><dd>Module must be initialized and powered before module information can be retrieved.</dd></dl>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line"><span class="keyword">extern</span> <a class="code" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a> Driver_WiFi0;</div>
+<div class="line"><span class="keyword">static</span> <a class="code" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a> *wifi;</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> initialize_wifi (<span class="keywordtype">void</span>) {</div>
+<div class="line">  <span class="keywordtype">char</span> info[32];</div>
+<div class="line"> </div>
+<div class="line">  wifi = &amp;Driver_WiFi0;</div>
+<div class="line"> </div>
+<div class="line">  <span class="comment">// Initialize and Power-on WiFi Module</span></div>
+<div class="line">  wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a99e597db8e61d0ff834561cb710e61ad">Initialize</a> (NULL);</div>
+<div class="line">  wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef">PowerControl</a> (<a class="code" href="Driver__Common_8h.html#ga47d6d7c31f88f3b8ae4aaf9d8444afa5abed52b77a9ce4775570e44a842b1295e">ARM_POWER_FULL</a>);</div>
+<div class="line"> </div>
+<div class="line">  <span class="comment">// Retrieve module information</span></div>
+<div class="line">  wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#aa78e745bbf8257a3438700e4e6a8d222">GetModuleInfo</a>(&amp;info, <span class="keyword">sizeof</span>(info));</div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="ga0c8243dee4bb161132692516f048bcec"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void ARM_WIFI_SignalEvent </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>event</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">void *&#160;</td>
+          <td class="paramname"><em>arg</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Signal WiFi Events. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">event</td><td><a class="el" href="group__wifi__event.html">WiFi Events</a> notification mask </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">arg</td><td>Pointer to argument of signaled event </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>none</dd></dl>
+<p>The function <b>ARM_WIFI_SignalEvent</b> is a callback function registered by the function <a class="el" href="group__wifi__control__gr.html#gadc4b9aaae0fdf7d489b1d81e3c2f3474">ARM_WIFI_Initialize</a>. It is called by the WiFi driver to notify the application about WiFi Events occurred during operation.</p>
+<p>The parameter <em>event</em> indicates the event that occurred during driver operation.</p>
+<p>The parameter <em>arg</em> provides additional information about the event.</p>
+<p>The following events can be generated:</p>
+<table class="doxtable">
+<tr>
+<th align="left">Parameter <em>event</em> </th><th align="left">Description  </th></tr>
+<tr>
+<td align="left"><a class="el" href="group__wifi__event.html#ga4a87b9a3c3a404e3917d54df98469a62">ARM_WIFI_EVENT_AP_CONNECT</a> </td><td align="left">Occurs in access point mode when a station has connected to the access point. </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__wifi__event.html#ga271e73cda122e7ec3c5a5ca71d44eae3">ARM_WIFI_EVENT_AP_DISCONNECT</a> </td><td align="left">Occurs in access point mode when a station has disconnected from the access point. </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__wifi__event.html#ga833f2c7a47bd2523d7a62ff6506a997f">ARM_WIFI_EVENT_ETH_RX_FRAME</a> </td><td align="left">Occurs in <a class="el" href="group__wifi__bypass__gr.html">WiFi Bypass Mode</a> when an ethernet frame is received. </td></tr>
+</table>
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
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new file mode 100644
index 0000000..9d0e973
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+var group__wifi__control__gr =
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+   &#160;<span id="projectnumber">Version 2.7.1</span>
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+<div class="header">
+  <div class="summary">
+<a href="#define-members">Macros</a>  </div>
+  <div class="headertitle">
+<div class="title">WiFi DHCPv6 Mode<div class="ingroups"><a class="el" href="group__wifi__management__gr.html">WiFi Management</a></div></div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>Specifies IPv6 Dynamic Host Configuration Protocol (DHCP) Mode.  
+<a href="#details">More...</a></p>
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
+Macros</h2></td></tr>
+<tr class="memitem:gaf200f735500dc647bc665f60a2df7552"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__dhcp__v6__mode.html#gaf200f735500dc647bc665f60a2df7552">ARM_WIFI_IP6_DHCP_OFF</a>&#160;&#160;&#160;0U</td></tr>
+<tr class="memdesc:gaf200f735500dc647bc665f60a2df7552"><td class="mdescLeft">&#160;</td><td class="mdescRight">Static Host Configuration (default)  <a href="#gaf200f735500dc647bc665f60a2df7552">More...</a><br/></td></tr>
+<tr class="separator:gaf200f735500dc647bc665f60a2df7552"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9d63d8029532c586703c77f1c8f990fc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__dhcp__v6__mode.html#ga9d63d8029532c586703c77f1c8f990fc">ARM_WIFI_IP6_DHCP_STATELESS</a>&#160;&#160;&#160;1U</td></tr>
+<tr class="memdesc:ga9d63d8029532c586703c77f1c8f990fc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dynamic Host Configuration stateless DHCPv6.  <a href="#ga9d63d8029532c586703c77f1c8f990fc">More...</a><br/></td></tr>
+<tr class="separator:ga9d63d8029532c586703c77f1c8f990fc"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga205f9604967e290c053952cab850841a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__dhcp__v6__mode.html#ga205f9604967e290c053952cab850841a">ARM_WIFI_IP6_DHCP_STATEFULL</a>&#160;&#160;&#160;2U</td></tr>
+<tr class="memdesc:ga205f9604967e290c053952cab850841a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dynamic Host Configuration statefull DHCPv6.  <a href="#ga205f9604967e290c053952cab850841a">More...</a><br/></td></tr>
+<tr class="separator:ga205f9604967e290c053952cab850841a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>Specifies IPv6 Dynamic Host Configuration Protocol (DHCP) Mode. </p>
+<p>The WiFi DHCPv6 mode defines the DHCP mode in IPv6. </p>
+<h2 class="groupheader">Macro Definition Documentation</h2>
+<a class="anchor" id="gaf200f735500dc647bc665f60a2df7552"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
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+          <td class="memname">#define ARM_WIFI_IP6_DHCP_OFF&#160;&#160;&#160;0U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Static Host Configuration (default) </p>
+<p>In the static host configuration mode, the IPv6 address, the default gateway address, and the addresses of DNS servers are statically configured from the preset values. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__dhcp__v6__mode.html" title="Specifies IPv6 Dynamic Host Configuration Protocol (DHCP) Mode. ">WiFi DHCPv6 Mode</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga9d63d8029532c586703c77f1c8f990fc"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
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+          <td class="memname">#define ARM_WIFI_IP6_DHCP_STATELESS&#160;&#160;&#160;1U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Dynamic Host Configuration stateless DHCPv6. </p>
+<p>In the stateless DHCP configuration mode, the client obtains only extended information from a DHCPv6 server, such as DNS server addresses. Stateless auto-configuration of IPv6 allows the client device to self configure it's IPv6 addresses and routing based on the router advertisements. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__dhcp__v6__mode.html" title="Specifies IPv6 Dynamic Host Configuration Protocol (DHCP) Mode. ">WiFi DHCPv6 Mode</a> </dd></dl>
+
+</div>
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+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Dynamic Host Configuration statefull DHCPv6. </p>
+<p>In the stateful DHCP configuration mode, the client connects to a DHCPv6 server for a leased IPv6 address and DNS server addresses. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__dhcp__v6__mode.html" title="Specifies IPv6 Dynamic Host Configuration Protocol (DHCP) Mode. ">WiFi DHCPv6 Mode</a> </dd></dl>
+
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+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
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+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
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+</iframe>
+</div>
+
+<div class="header">
+  <div class="summary">
+<a href="#define-members">Macros</a>  </div>
+  <div class="headertitle">
+<div class="title">WiFi Events<div class="ingroups"><a class="el" href="group__wifi__control__gr.html">WiFi Control</a></div></div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>The WiFi driver generates call back events that are notified via the function <a class="el" href="group__wifi__control__gr.html#ga0c8243dee4bb161132692516f048bcec">ARM_WIFI_SignalEvent</a>.  
+<a href="#details">More...</a></p>
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
+Macros</h2></td></tr>
+<tr class="memitem:ga4a87b9a3c3a404e3917d54df98469a62"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__event.html#ga4a87b9a3c3a404e3917d54df98469a62">ARM_WIFI_EVENT_AP_CONNECT</a>&#160;&#160;&#160;(1UL &lt;&lt; 0)</td></tr>
+<tr class="memdesc:ga4a87b9a3c3a404e3917d54df98469a62"><td class="mdescLeft">&#160;</td><td class="mdescRight">Access Point: Station has connected; arg = &amp;mac, mac (uint8_t[6])  <a href="#ga4a87b9a3c3a404e3917d54df98469a62">More...</a><br/></td></tr>
+<tr class="separator:ga4a87b9a3c3a404e3917d54df98469a62"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga271e73cda122e7ec3c5a5ca71d44eae3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__event.html#ga271e73cda122e7ec3c5a5ca71d44eae3">ARM_WIFI_EVENT_AP_DISCONNECT</a>&#160;&#160;&#160;(1UL &lt;&lt; 1)</td></tr>
+<tr class="memdesc:ga271e73cda122e7ec3c5a5ca71d44eae3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Access Point: Station has disconnected; arg = &amp;mac, mac (uint8_t[6])  <a href="#ga271e73cda122e7ec3c5a5ca71d44eae3">More...</a><br/></td></tr>
+<tr class="separator:ga271e73cda122e7ec3c5a5ca71d44eae3"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga833f2c7a47bd2523d7a62ff6506a997f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__event.html#ga833f2c7a47bd2523d7a62ff6506a997f">ARM_WIFI_EVENT_ETH_RX_FRAME</a>&#160;&#160;&#160;(1UL &lt;&lt; 4)</td></tr>
+<tr class="memdesc:ga833f2c7a47bd2523d7a62ff6506a997f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ethernet Frame Received (in bypass mode only); arg = interface (0 = Station, 1 = Access Point)  <a href="#ga833f2c7a47bd2523d7a62ff6506a997f">More...</a><br/></td></tr>
+<tr class="separator:ga833f2c7a47bd2523d7a62ff6506a997f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>The WiFi driver generates call back events that are notified via the function <a class="el" href="group__wifi__control__gr.html#ga0c8243dee4bb161132692516f048bcec">ARM_WIFI_SignalEvent</a>. </p>
+<p>The following call back notification events are generated: </p>
+<h2 class="groupheader">Macro Definition Documentation</h2>
+<a class="anchor" id="ga4a87b9a3c3a404e3917d54df98469a62"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_EVENT_AP_CONNECT&#160;&#160;&#160;(1UL &lt;&lt; 0)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Access Point: Station has connected; arg = &amp;mac, mac (uint8_t[6]) </p>
+
+</div>
+</div>
+<a class="anchor" id="ga271e73cda122e7ec3c5a5ca71d44eae3"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_EVENT_AP_DISCONNECT&#160;&#160;&#160;(1UL &lt;&lt; 1)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Access Point: Station has disconnected; arg = &amp;mac, mac (uint8_t[6]) </p>
+
+</div>
+</div>
+<a class="anchor" id="ga833f2c7a47bd2523d7a62ff6506a997f"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_EVENT_ETH_RX_FRAME&#160;&#160;&#160;(1UL &lt;&lt; 4)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Ethernet Frame Received (in bypass mode only); arg = interface (0 = Station, 1 = Access Point) </p>
+
+</div>
+</div>
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+</div><!-- doc-content -->
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+	<!--
+    <a href="http://www.doxygen.org/index.html">
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+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>WiFi Interface</title>
+<title>CMSIS-Driver: WiFi Interface</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
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+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Driver
+   &#160;<span id="projectnumber">Version 2.7.1</span>
+   </div>
+   <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
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+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
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+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
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+
+<div class="header">
+  <div class="summary">
+<a href="#groups">Content</a> &#124;
+<a href="#nested-classes">Data Structures</a>  </div>
+  <div class="headertitle">
+<div class="title">WiFi Interface</div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>Driver API for WiFi (Driver_WiFi.h)  
+<a href="#details">More...</a></p>
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="groups"></a>
+Content</h2></td></tr>
+<tr class="memitem:group__wifi__control__gr"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__control__gr.html">WiFi Control</a></td></tr>
+<tr class="memdesc:group__wifi__control__gr"><td class="mdescLeft">&#160;</td><td class="mdescRight">Control functions for the WiFi module. <br/></td></tr>
+<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:group__wifi__management__gr"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__management__gr.html">WiFi Management</a></td></tr>
+<tr class="memdesc:group__wifi__management__gr"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configure and manage the connection to a WiFi access point (AP) or configure and manage the access point (AP). <br/></td></tr>
+<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:group__wifi__bypass__gr"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__bypass__gr.html">WiFi Bypass Mode</a></td></tr>
+<tr class="memdesc:group__wifi__bypass__gr"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transfer Ethernet frames by WiFi module. <br/></td></tr>
+<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:group__wifi__socket__gr"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html">WiFi Socket</a></td></tr>
+<tr class="memdesc:group__wifi__socket__gr"><td class="mdescLeft">&#160;</td><td class="mdescRight">Socket interface to IP stack running on WiFi module. <br/></td></tr>
+<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table><table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a>
+Data Structures</h2></td></tr>
+<tr class="memitem:structARM__DRIVER__WIFI"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a></td></tr>
+<tr class="memdesc:structARM__DRIVER__WIFI"><td class="mdescLeft">&#160;</td><td class="mdescRight">Access structure of the WiFi Driver.  <a href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">More...</a><br/></td></tr>
+<tr class="separator:structARM__DRIVER__WIFI"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>Driver API for WiFi (Driver_WiFi.h) </p>
+<p>Wi-Fi is technology for radio wireless local area networking of devices. Wi-Fi compatible devices typically connect to the Internet via a WLAN and a wireless access point (AP) also called hotspot.</p>
+<p>Wikipedia offers more information about the <a href="http://en.wikipedia.org/wiki/Ethernet" target="_blank"><b>WiFi</b></a>.</p>
+<p><b>Driver Block Diagram</b></p>
+<div class="image">
+<img src="WiFi.png" alt="WiFi.png"/>
+<div class="caption">
+Block Diagram of the WiFi interface</div></div>
+<p> <b>WiFi API</b></p>
+<p>The following header files define the Application Programming Interface (API) for the WiFi interface:</p>
+<ul>
+<li><b>Driver_WiFi.h</b> : Driver API for WiFi</li>
+</ul>
+<p>The CMSIS-Driver WiFi provides access to the following interfaces:</p>
+<ul>
+<li><a class="el" href="group__wifi__control__gr.html">Control interface</a>: setup and control the WiFi module.</li>
+<li><a class="el" href="group__wifi__management__gr.html">Management interface</a>: allows you to configure and manage the connection to the WiFi access point (AP) or configure and manage the access point (AP).</li>
+<li><a class="el" href="group__wifi__socket__gr.html">Socket interface</a>: provides the interface to an IP stack that is running on the WiFi module. This IP stack handles data communication.</li>
+<li><a class="el" href="group__wifi__bypass__gr.html">Bypass interface</a>: is an optional interface and enables the transmission of Ethernet frames with the WiFi module. Using this interface requires the IP stack running on the microcontroller.</li>
+</ul>
+<p>The WiFi interface usually requires CMSIS-RTOS features (i.e. mutex) and is often implemented with a peripheral device that is connected to the system using the SPI or UART interface. However, there are also some microcontroller devices with WiFi interface on the chip.</p>
+<p>The implementation of the WiFi CMSIS-Driver is therefore generally provided as a separate software pack. It is often implemented as wrapper to the SDK (Software Development Kit) of the WiFi chipset.</p>
+<p><b>Driver Functions</b></p>
+<p>The driver functions are published in the access struct as explained in <a class="el" href="theoryOperation.html#DriverFunctions">Common Driver Functions</a></p>
+<ul>
+<li><a class="el" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a> : access struct for WiFi driver functions</li>
+</ul>
+<p><b>Example Code</b> </p>
+<hr/><h2 class="groupheader">Data Structure Documentation</h2>
+<a name="structARM__DRIVER__WIFI" id="structARM__DRIVER__WIFI"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">struct ARM_DRIVER_WIFI</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<div class="textblock"><p>Access structure of the WiFi Driver. </p>
+<p>The functions of the WiFi driver are accessed by function pointers exposed by this structure. Refer to <a class="el" href="theoryOperation.html#DriverFunctions">Common Driver Functions</a> for overview information.</p>
+<p>Each instance of a WiFi interface provides such an access structure. The instance is identified by a postfix number in the symbol name of the access structure, for example:</p>
+<ul>
+<li><b>Driver_WiFi0</b> is the name of the access struct of the first instance (no. <span class="XML-Token">0</span>).</li>
+<li><b>Driver_WiFi1</b> is the name of the access struct of the second instance (no. <span class="XML-Token">1</span>).</li>
+</ul>
+<p>A middleware configuration setting allows connecting the middleware to a specific driver instance <b>Driver_WiFi<em>n</em></b>. The default is <span class="XML-Token">0</span>, which connects a middleware to the first instance of a driver. </p>
+</div><table class="memberdecls">
+<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
+<tr class="memitem:a8834b281da48583845c044a81566c1b3"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__common__drv__gr.html#structARM__DRIVER__VERSION">ARM_DRIVER_VERSION</a>(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__interface__gr.html#a8834b281da48583845c044a81566c1b3">GetVersion</a> )(void)</td></tr>
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+<tr class="memitem:a1ced805656e067b5635f1af2292b69e1"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__wifi__control__gr.html#structARM__WIFI__CAPABILITIES">ARM_WIFI_CAPABILITIES</a>(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__interface__gr.html#a1ced805656e067b5635f1af2292b69e1">GetCapabilities</a> )(void)</td></tr>
+<tr class="separator:a1ced805656e067b5635f1af2292b69e1"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+</div>
+</div>
+<a class="anchor" id="adcf20681a1402869ecb5c6447fada17b"></a>
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+</div>
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+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="a2648d7e0d1c10c48923d8d20d99311ab"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t(* EthSendFrame)(uint32_t interface, const uint8_t *frame, uint32_t len)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="a544ca40b7157efce5000cd83aa92f8a0"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t(* EthReadFrame)(uint32_t interface, uint8_t *frame, uint32_t len)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="af7ecc54209ce3725037cb5c9629151cf"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">uint32_t(* EthGetRxFrameSize)(uint32_t interface)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="aa26f0cefe99161484741977a5443e92c"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t(* SocketCreate)(int32_t af, int32_t type, int32_t protocol)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="afcbc0c2bb3639584521ffeaaffc5a475"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t(* SocketBind)(int32_t socket, const uint8_t *ip, uint32_t ip_len, uint16_t port)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="a628706c754e1793ec864453a5b517d5c"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t(* SocketListen)(int32_t socket, int32_t backlog)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="a66bb43c1e713efe7758b6e100c13ed69"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t(* SocketAccept)(int32_t socket, uint8_t *ip, uint32_t *ip_len, uint16_t *port)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="a45cbca28d9866f2ec2ad9df830787dd7"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t(* SocketConnect)(int32_t socket, const uint8_t *ip, uint32_t ip_len, uint16_t port)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="aaad6683992e76e3dd9a16eb6b7d43cf4"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t(* SocketRecv)(int32_t socket, void *buf, uint32_t len)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="a4343cf48bbcfb2101a422d90c34f84e6"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t(* SocketRecvFrom)(int32_t socket, void *buf, uint32_t len, uint8_t *ip, uint32_t *ip_len, uint16_t *port)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="a7ff47d391831d547d310dd66f22c2942"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t(* SocketSend)(int32_t socket, const void *buf, uint32_t len)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="a248a293faea6f6e1cb781b8153e468fa"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t(* SocketSendTo)(int32_t socket, const void *buf, uint32_t len, const uint8_t *ip, uint32_t ip_len, uint16_t port)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="ab7c3e0211c87bf99e9c42b17a2249f50"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t(* SocketGetSockName)(int32_t socket, uint8_t *ip, uint32_t *ip_len, uint16_t *port)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="ac45fbc58fd00742cbe712bf26d857359"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t(* SocketGetPeerName)(int32_t socket, uint8_t *ip, uint32_t *ip_len, uint16_t *port)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="a4771324fb6f39fb2837e98d9f0ed48ed"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t(* SocketGetOpt)(int32_t socket, int32_t opt_id, void *opt_val, uint32_t *opt_len)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="a7019060d0869a7dfae8e31aedb46815d"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t(* SocketSetOpt)(int32_t socket, int32_t opt_id, const void *opt_val, uint32_t opt_len)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="a471a1be6d9adbccb83ca1f268643031c"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t(* SocketClose)(int32_t socket)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="a62b2512cbaef03d26eb9c1e3004c3364"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t(* SocketGetHostByName)(const char *name, int32_t af, uint8_t *ip, uint32_t *ip_len)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="ad8f218e434e2f327335b16cdb4f21f65"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t(* Ping)(const uint8_t *ip, uint32_t ip_len)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Driver/html/group__wifi__interface__gr.js b/docs/Driver/html/group__wifi__interface__gr.js
new file mode 100644
index 0000000..9b50d3f
--- /dev/null
+++ b/docs/Driver/html/group__wifi__interface__gr.js
@@ -0,0 +1,42 @@
+var group__wifi__interface__gr =
+[
+    [ "WiFi Control", "group__wifi__control__gr.html", "group__wifi__control__gr" ],
+    [ "WiFi Management", "group__wifi__management__gr.html", "group__wifi__management__gr" ],
+    [ "WiFi Bypass Mode", "group__wifi__bypass__gr.html", "group__wifi__bypass__gr" ],
+    [ "WiFi Socket", "group__wifi__socket__gr.html", "group__wifi__socket__gr" ],
+    [ "ARM_DRIVER_WIFI", "group__wifi__interface__gr.html#structARM__DRIVER__WIFI", [
+      [ "GetVersion", "group__wifi__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ],
+      [ "GetCapabilities", "group__wifi__interface__gr.html#a1ced805656e067b5635f1af2292b69e1", null ],
+      [ "Initialize", "group__wifi__interface__gr.html#a99e597db8e61d0ff834561cb710e61ad", null ],
+      [ "Uninitialize", "group__wifi__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ],
+      [ "PowerControl", "group__wifi__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ],
+      [ "GetModuleInfo", "group__wifi__interface__gr.html#aa78e745bbf8257a3438700e4e6a8d222", null ],
+      [ "SetOption", "group__wifi__interface__gr.html#a6b5e1c7fcea96ff13f6fd16d57c8b68f", null ],
+      [ "GetOption", "group__wifi__interface__gr.html#af264a580d36c33a649b64be845458b03", null ],
+      [ "Scan", "group__wifi__interface__gr.html#a51d027ef7046c413372103aa952772fb", null ],
+      [ "Activate", "group__wifi__interface__gr.html#a444ea7bda2c45eab34050d2a895baeec", null ],
+      [ "Deactivate", "group__wifi__interface__gr.html#ae9a38e69c7b7face914560e872378ed1", null ],
+      [ "IsConnected", "group__wifi__interface__gr.html#ab9771e89a155d316e0b44d3ee89081d3", null ],
+      [ "GetNetInfo", "group__wifi__interface__gr.html#ac17eb39c11b7797b88a1f6e0f8cc772d", null ],
+      [ "BypassControl", "group__wifi__interface__gr.html#a18c6762aa46cec65b65135eaeadebf23", null ],
+      [ "EthSendFrame", "group__wifi__interface__gr.html#a2648d7e0d1c10c48923d8d20d99311ab", null ],
+      [ "EthReadFrame", "group__wifi__interface__gr.html#a544ca40b7157efce5000cd83aa92f8a0", null ],
+      [ "EthGetRxFrameSize", "group__wifi__interface__gr.html#af7ecc54209ce3725037cb5c9629151cf", null ],
+      [ "SocketCreate", "group__wifi__interface__gr.html#aa26f0cefe99161484741977a5443e92c", null ],
+      [ "SocketBind", "group__wifi__interface__gr.html#afcbc0c2bb3639584521ffeaaffc5a475", null ],
+      [ "SocketListen", "group__wifi__interface__gr.html#a628706c754e1793ec864453a5b517d5c", null ],
+      [ "SocketAccept", "group__wifi__interface__gr.html#a66bb43c1e713efe7758b6e100c13ed69", null ],
+      [ "SocketConnect", "group__wifi__interface__gr.html#a45cbca28d9866f2ec2ad9df830787dd7", null ],
+      [ "SocketRecv", "group__wifi__interface__gr.html#aaad6683992e76e3dd9a16eb6b7d43cf4", null ],
+      [ "SocketRecvFrom", "group__wifi__interface__gr.html#a4343cf48bbcfb2101a422d90c34f84e6", null ],
+      [ "SocketSend", "group__wifi__interface__gr.html#a7ff47d391831d547d310dd66f22c2942", null ],
+      [ "SocketSendTo", "group__wifi__interface__gr.html#a248a293faea6f6e1cb781b8153e468fa", null ],
+      [ "SocketGetSockName", "group__wifi__interface__gr.html#ab7c3e0211c87bf99e9c42b17a2249f50", null ],
+      [ "SocketGetPeerName", "group__wifi__interface__gr.html#ac45fbc58fd00742cbe712bf26d857359", null ],
+      [ "SocketGetOpt", "group__wifi__interface__gr.html#a4771324fb6f39fb2837e98d9f0ed48ed", null ],
+      [ "SocketSetOpt", "group__wifi__interface__gr.html#a7019060d0869a7dfae8e31aedb46815d", null ],
+      [ "SocketClose", "group__wifi__interface__gr.html#a471a1be6d9adbccb83ca1f268643031c", null ],
+      [ "SocketGetHostByName", "group__wifi__interface__gr.html#a62b2512cbaef03d26eb9c1e3004c3364", null ],
+      [ "Ping", "group__wifi__interface__gr.html#ad8f218e434e2f327335b16cdb4f21f65", null ]
+    ] ]
+];
\ No newline at end of file
diff --git a/docs/Driver/html/group__wifi__interface__gr_structARM__DRIVER__WIFI.js b/docs/Driver/html/group__wifi__interface__gr_structARM__DRIVER__WIFI.js
new file mode 100644
index 0000000..08062f0
--- /dev/null
+++ b/docs/Driver/html/group__wifi__interface__gr_structARM__DRIVER__WIFI.js
@@ -0,0 +1,36 @@
+var group__wifi__interface__gr_structARM__DRIVER__WIFI =
+[
+    [ "GetVersion", "group__wifi__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ],
+    [ "GetCapabilities", "group__wifi__interface__gr.html#a1ced805656e067b5635f1af2292b69e1", null ],
+    [ "Initialize", "group__wifi__interface__gr.html#a99e597db8e61d0ff834561cb710e61ad", null ],
+    [ "Uninitialize", "group__wifi__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ],
+    [ "PowerControl", "group__wifi__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ],
+    [ "GetModuleInfo", "group__wifi__interface__gr.html#aa78e745bbf8257a3438700e4e6a8d222", null ],
+    [ "SetOption", "group__wifi__interface__gr.html#a6b5e1c7fcea96ff13f6fd16d57c8b68f", null ],
+    [ "GetOption", "group__wifi__interface__gr.html#af264a580d36c33a649b64be845458b03", null ],
+    [ "Scan", "group__wifi__interface__gr.html#a51d027ef7046c413372103aa952772fb", null ],
+    [ "Activate", "group__wifi__interface__gr.html#a444ea7bda2c45eab34050d2a895baeec", null ],
+    [ "Deactivate", "group__wifi__interface__gr.html#ae9a38e69c7b7face914560e872378ed1", null ],
+    [ "IsConnected", "group__wifi__interface__gr.html#ab9771e89a155d316e0b44d3ee89081d3", null ],
+    [ "GetNetInfo", "group__wifi__interface__gr.html#ac17eb39c11b7797b88a1f6e0f8cc772d", null ],
+    [ "BypassControl", "group__wifi__interface__gr.html#a18c6762aa46cec65b65135eaeadebf23", null ],
+    [ "EthSendFrame", "group__wifi__interface__gr.html#a2648d7e0d1c10c48923d8d20d99311ab", null ],
+    [ "EthReadFrame", "group__wifi__interface__gr.html#a544ca40b7157efce5000cd83aa92f8a0", null ],
+    [ "EthGetRxFrameSize", "group__wifi__interface__gr.html#af7ecc54209ce3725037cb5c9629151cf", null ],
+    [ "SocketCreate", "group__wifi__interface__gr.html#aa26f0cefe99161484741977a5443e92c", null ],
+    [ "SocketBind", "group__wifi__interface__gr.html#afcbc0c2bb3639584521ffeaaffc5a475", null ],
+    [ "SocketListen", "group__wifi__interface__gr.html#a628706c754e1793ec864453a5b517d5c", null ],
+    [ "SocketAccept", "group__wifi__interface__gr.html#a66bb43c1e713efe7758b6e100c13ed69", null ],
+    [ "SocketConnect", "group__wifi__interface__gr.html#a45cbca28d9866f2ec2ad9df830787dd7", null ],
+    [ "SocketRecv", "group__wifi__interface__gr.html#aaad6683992e76e3dd9a16eb6b7d43cf4", null ],
+    [ "SocketRecvFrom", "group__wifi__interface__gr.html#a4343cf48bbcfb2101a422d90c34f84e6", null ],
+    [ "SocketSend", "group__wifi__interface__gr.html#a7ff47d391831d547d310dd66f22c2942", null ],
+    [ "SocketSendTo", "group__wifi__interface__gr.html#a248a293faea6f6e1cb781b8153e468fa", null ],
+    [ "SocketGetSockName", "group__wifi__interface__gr.html#ab7c3e0211c87bf99e9c42b17a2249f50", null ],
+    [ "SocketGetPeerName", "group__wifi__interface__gr.html#ac45fbc58fd00742cbe712bf26d857359", null ],
+    [ "SocketGetOpt", "group__wifi__interface__gr.html#a4771324fb6f39fb2837e98d9f0ed48ed", null ],
+    [ "SocketSetOpt", "group__wifi__interface__gr.html#a7019060d0869a7dfae8e31aedb46815d", null ],
+    [ "SocketClose", "group__wifi__interface__gr.html#a471a1be6d9adbccb83ca1f268643031c", null ],
+    [ "SocketGetHostByName", "group__wifi__interface__gr.html#a62b2512cbaef03d26eb9c1e3004c3364", null ],
+    [ "Ping", "group__wifi__interface__gr.html#ad8f218e434e2f327335b16cdb4f21f65", null ]
+];
\ No newline at end of file
diff --git a/docs/Driver/html/group__wifi__management__gr.html b/docs/Driver/html/group__wifi__management__gr.html
new file mode 100644
index 0000000..8beda18
--- /dev/null
+++ b/docs/Driver/html/group__wifi__management__gr.html
@@ -0,0 +1,804 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>WiFi Management</title>
+<title>CMSIS-Driver: WiFi Management</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
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+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Driver
+   &#160;<span id="projectnumber">Version 2.7.1</span>
+   </div>
+   <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
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+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li><a href="modules.html"><span>Reference</span></a></li>
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+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
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+        name="MSearchResults" id="MSearchResults">
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+
+<div class="header">
+  <div class="summary">
+<a href="#groups">Content</a> &#124;
+<a href="#nested-classes">Data Structures</a> &#124;
+<a href="#func-members">Functions</a>  </div>
+  <div class="headertitle">
+<div class="title">WiFi Management<div class="ingroups"><a class="el" href="group__wifi__interface__gr.html">WiFi Interface</a></div></div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>Configure and manage the connection to a WiFi access point (AP) or configure and manage the access point (AP).  
+<a href="#details">More...</a></p>
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="groups"></a>
+Content</h2></td></tr>
+<tr class="memitem:group__WiFi__option"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__WiFi__option.html">WiFi Option Codes</a></td></tr>
+<tr class="memdesc:group__WiFi__option"><td class="mdescLeft">&#160;</td><td class="mdescRight">WiFi Option Codes for <a class="el" href="group__wifi__management__gr.html#gaf38a7aeb470eec596febc850c8b69ccf">ARM_WIFI_SetOption</a> or <a class="el" href="group__wifi__management__gr.html#ga56910984e5068f6502e12f72e1f80edf">ARM_WIFI_GetOption</a> function. <br/></td></tr>
+<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:group__wifi__sec__type"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__sec__type.html">WiFi Security Type</a></td></tr>
+<tr class="memdesc:group__wifi__sec__type"><td class="mdescLeft">&#160;</td><td class="mdescRight">Specifies WiFi security type for <a class="el" href="group__wifi__management__gr.html#ga7d545744a848702d75043de30ea5260a">ARM_WIFI_Activate</a>. <br/></td></tr>
+<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:group__wifi__wps__method"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__wps__method.html">WiFi Protected Setup (WPS) Method</a></td></tr>
+<tr class="memdesc:group__wifi__wps__method"><td class="mdescLeft">&#160;</td><td class="mdescRight">Specifies WiFi WPS method for <a class="el" href="group__wifi__management__gr.html#ga7d545744a848702d75043de30ea5260a">ARM_WIFI_Activate</a>. <br/></td></tr>
+<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:group__wifi__dhcp__v6__mode"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__dhcp__v6__mode.html">WiFi DHCPv6 Mode</a></td></tr>
+<tr class="memdesc:group__wifi__dhcp__v6__mode"><td class="mdescLeft">&#160;</td><td class="mdescRight">Specifies IPv6 Dynamic Host Configuration Protocol (DHCP) Mode. <br/></td></tr>
+<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table><table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a>
+Data Structures</h2></td></tr>
+<tr class="memitem:structARM__WIFI__CONFIG__t"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__management__gr.html#structARM__WIFI__CONFIG__t">ARM_WIFI_CONFIG_t</a></td></tr>
+<tr class="memdesc:structARM__WIFI__CONFIG__t"><td class="mdescLeft">&#160;</td><td class="mdescRight">WiFi Configuration.  <a href="group__wifi__management__gr.html#structARM__WIFI__CONFIG__t">More...</a><br/></td></tr>
+<tr class="separator:structARM__WIFI__CONFIG__t"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:structARM__WIFI__SCAN__INFO__t"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__management__gr.html#structARM__WIFI__SCAN__INFO__t">ARM_WIFI_SCAN_INFO_t</a></td></tr>
+<tr class="memdesc:structARM__WIFI__SCAN__INFO__t"><td class="mdescLeft">&#160;</td><td class="mdescRight">WiFi Scan Information.  <a href="group__wifi__management__gr.html#structARM__WIFI__SCAN__INFO__t">More...</a><br/></td></tr>
+<tr class="separator:structARM__WIFI__SCAN__INFO__t"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:structARM__WIFI__NET__INFO__t"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__management__gr.html#structARM__WIFI__NET__INFO__t">ARM_WIFI_NET_INFO_t</a></td></tr>
+<tr class="memdesc:structARM__WIFI__NET__INFO__t"><td class="mdescLeft">&#160;</td><td class="mdescRight">WiFi Network Information.  <a href="group__wifi__management__gr.html#structARM__WIFI__NET__INFO__t">More...</a><br/></td></tr>
+<tr class="separator:structARM__WIFI__NET__INFO__t"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table><table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
+Functions</h2></td></tr>
+<tr class="memitem:gaf38a7aeb470eec596febc850c8b69ccf"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__management__gr.html#gaf38a7aeb470eec596febc850c8b69ccf">ARM_WIFI_SetOption</a> (uint32_t interface, uint32_t option, const void *data, uint32_t len)</td></tr>
+<tr class="memdesc:gaf38a7aeb470eec596febc850c8b69ccf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set WiFi Module Options.  <a href="#gaf38a7aeb470eec596febc850c8b69ccf">More...</a><br/></td></tr>
+<tr class="separator:gaf38a7aeb470eec596febc850c8b69ccf"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga56910984e5068f6502e12f72e1f80edf"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__management__gr.html#ga56910984e5068f6502e12f72e1f80edf">ARM_WIFI_GetOption</a> (uint32_t interface, uint32_t option, void *data, uint32_t *len)</td></tr>
+<tr class="memdesc:ga56910984e5068f6502e12f72e1f80edf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get WiFi Module Options.  <a href="#ga56910984e5068f6502e12f72e1f80edf">More...</a><br/></td></tr>
+<tr class="separator:ga56910984e5068f6502e12f72e1f80edf"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga856972af36e51cf0c4112029332d529f"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__management__gr.html#ga856972af36e51cf0c4112029332d529f">ARM_WIFI_Scan</a> (<a class="el" href="group__wifi__management__gr.html#structARM__WIFI__SCAN__INFO__t">ARM_WIFI_SCAN_INFO_t</a> scan_info[], uint32_t max_num)</td></tr>
+<tr class="memdesc:ga856972af36e51cf0c4112029332d529f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Scan for available networks in range.  <a href="#ga856972af36e51cf0c4112029332d529f">More...</a><br/></td></tr>
+<tr class="separator:ga856972af36e51cf0c4112029332d529f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga7d545744a848702d75043de30ea5260a"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__management__gr.html#ga7d545744a848702d75043de30ea5260a">ARM_WIFI_Activate</a> (uint32_t interface, <a class="el" href="group__wifi__management__gr.html#structARM__WIFI__CONFIG__t">ARM_WIFI_CONFIG_t</a> *config)</td></tr>
+<tr class="memdesc:ga7d545744a848702d75043de30ea5260a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Activate interface (Connect to a wireless network or activate an access point).  <a href="#ga7d545744a848702d75043de30ea5260a">More...</a><br/></td></tr>
+<tr class="separator:ga7d545744a848702d75043de30ea5260a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1842127df60067481ac2f40d19153e3e"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__management__gr.html#ga1842127df60067481ac2f40d19153e3e">ARM_WIFI_Deactivate</a> (uint32_t interface)</td></tr>
+<tr class="memdesc:ga1842127df60067481ac2f40d19153e3e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Deactivate interface (Disconnect from a wireless network or deactivate an access point).  <a href="#ga1842127df60067481ac2f40d19153e3e">More...</a><br/></td></tr>
+<tr class="separator:ga1842127df60067481ac2f40d19153e3e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga3d641222defb5f52f6dae4ce1d540d0f"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__management__gr.html#ga3d641222defb5f52f6dae4ce1d540d0f">ARM_WIFI_IsConnected</a> (void)</td></tr>
+<tr class="memdesc:ga3d641222defb5f52f6dae4ce1d540d0f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get station connection status.  <a href="#ga3d641222defb5f52f6dae4ce1d540d0f">More...</a><br/></td></tr>
+<tr class="separator:ga3d641222defb5f52f6dae4ce1d540d0f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga29a5b0072470a8c56f0939f3c97ed08e"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__management__gr.html#ga29a5b0072470a8c56f0939f3c97ed08e">ARM_WIFI_GetNetInfo</a> (<a class="el" href="group__wifi__management__gr.html#structARM__WIFI__NET__INFO__t">ARM_WIFI_NET_INFO_t</a> *net_info)</td></tr>
+<tr class="memdesc:ga29a5b0072470a8c56f0939f3c97ed08e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get station Network Information.  <a href="#ga29a5b0072470a8c56f0939f3c97ed08e">More...</a><br/></td></tr>
+<tr class="separator:ga29a5b0072470a8c56f0939f3c97ed08e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>Configure and manage the connection to a WiFi access point (AP) or configure and manage the access point (AP). </p>
+<p>The <a class="el" href="group__wifi__management__gr.html">WiFi Management</a> functions are used to configure and manage the connection to a WiFi access point (AP) also called hotspot when in station mode. They are also used to configure and manage the access point (AP) itself when in access point mode. </p>
+<hr/><h2 class="groupheader">Data Structure Documentation</h2>
+<a name="structARM__WIFI__CONFIG__t" id="structARM__WIFI__CONFIG__t"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">struct ARM_WIFI_CONFIG_t</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<div class="textblock"><p>WiFi Configuration. </p>
+<p>Provides information needed to connect to the WiFi network for station or how to configure the access point (AP).</p>
+<p><b>Used in:</b></p>
+<ul>
+<li><a class="el" href="group__wifi__management__gr.html#ga7d545744a848702d75043de30ea5260a">ARM_WIFI_Activate</a> </li>
+</ul>
+</div><table class="fieldtable">
+<tr><th colspan="3">Data Fields</th></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="a587ba0cb07f02913598610049a3bbb79"></a>const char *</td>
+<td class="fieldname">
+ssid</td>
+<td class="fielddoc">
+Pointer to Service Set Identifier (SSID) null-terminated string. </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="a3bef28806edf8f4c8cb82584b7e8c3cb"></a>const char *</td>
+<td class="fieldname">
+pass</td>
+<td class="fielddoc">
+Pointer to Password null-terminated string. </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="a5cd97d88131cf38bcc75189f9569f9b7"></a>uint8_t</td>
+<td class="fieldname">
+security</td>
+<td class="fielddoc">
+Security type (ARM_WIFI_SECURITY_xxx) </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="acbcf5f8de7895ca456bb39fbcccde1d1"></a>uint8_t</td>
+<td class="fieldname">
+ch</td>
+<td class="fielddoc">
+WiFi Channel (0 = auto, otherwise = exact channel) </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="acb7bc06bed6f6408d719334fc41698c7"></a>uint8_t</td>
+<td class="fieldname">
+reserved</td>
+<td class="fielddoc">
+Reserved. </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="a5e263198499fb98f97d40a9b82579175"></a>uint8_t</td>
+<td class="fieldname">
+wps_method</td>
+<td class="fielddoc">
+WiFi Protected Setup (WPS) method (ARM_WIFI_WPS_METHOD_xxx) </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="a2047d60666390ea4755ce22603969c4c"></a>const char *</td>
+<td class="fieldname">
+wps_pin</td>
+<td class="fielddoc">
+Pointer to WiFi Protected Setup (WPS) PIN null-terminated string. </td></tr>
+</table>
+
+</div>
+</div>
+<a name="structARM__WIFI__SCAN__INFO__t" id="structARM__WIFI__SCAN__INFO__t"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">struct ARM_WIFI_SCAN_INFO_t</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<div class="textblock"><p>WiFi Scan Information. </p>
+<p>Provides information about the wireless networks that were detected when searching for available WiFi networks. The structure contains the information needed to connect to the WiFi network. Of course, the access password is not included and must be provided separately.</p>
+<p><b>Used in:</b></p>
+<ul>
+<li><a class="el" href="group__wifi__management__gr.html#ga856972af36e51cf0c4112029332d529f">ARM_WIFI_Scan</a> </li>
+</ul>
+</div><table class="fieldtable">
+<tr><th colspan="3">Data Fields</th></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="ae7eccb3e4df8625b86b5572fc16c37c3"></a>char</td>
+<td class="fieldname">
+ssid[32+1]</td>
+<td class="fielddoc">
+Service Set Identifier (SSID) null-terminated string. </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="a19c52baafe5797c359c5e0f5776499d7"></a>uint8_t</td>
+<td class="fieldname">
+bssid[6]</td>
+<td class="fielddoc">
+Basic Service Set Identifier (BSSID) </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="a5cd97d88131cf38bcc75189f9569f9b7"></a>uint8_t</td>
+<td class="fieldname">
+security</td>
+<td class="fielddoc">
+Security type (ARM_WIFI_SECURITY_xxx) </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="acbcf5f8de7895ca456bb39fbcccde1d1"></a>uint8_t</td>
+<td class="fieldname">
+ch</td>
+<td class="fielddoc">
+WiFi Channel. </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="afb67d818cd76cce8057affabcb1979a6"></a>uint8_t</td>
+<td class="fieldname">
+rssi</td>
+<td class="fielddoc">
+Received Signal Strength Indicator. </td></tr>
+</table>
+
+</div>
+</div>
+<a name="structARM__WIFI__NET__INFO__t" id="structARM__WIFI__NET__INFO__t"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">struct ARM_WIFI_NET_INFO_t</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<div class="textblock"><p>WiFi Network Information. </p>
+<p>Provides information about the network that the station is connected to.</p>
+<p><b>Used in:</b></p>
+<ul>
+<li><a class="el" href="group__wifi__management__gr.html#ga29a5b0072470a8c56f0939f3c97ed08e">ARM_WIFI_GetNetInfo</a> </li>
+</ul>
+</div><table class="fieldtable">
+<tr><th colspan="3">Data Fields</th></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="ae7eccb3e4df8625b86b5572fc16c37c3"></a>char</td>
+<td class="fieldname">
+ssid[32+1]</td>
+<td class="fielddoc">
+Service Set Identifier (SSID) null-terminated string. </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="a97ae3ac37e362cf8e7e3a9e18b7c806f"></a>char</td>
+<td class="fieldname">
+pass[64+1]</td>
+<td class="fielddoc">
+Password null-terminated string. </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="a5cd97d88131cf38bcc75189f9569f9b7"></a>uint8_t</td>
+<td class="fieldname">
+security</td>
+<td class="fielddoc">
+Security type (ARM_WIFI_SECURITY_xxx) </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="acbcf5f8de7895ca456bb39fbcccde1d1"></a>uint8_t</td>
+<td class="fieldname">
+ch</td>
+<td class="fielddoc">
+WiFi Channel. </td></tr>
+<tr><td class="fieldtype">
+<a class="anchor" id="afb67d818cd76cce8057affabcb1979a6"></a>uint8_t</td>
+<td class="fieldname">
+rssi</td>
+<td class="fielddoc">
+Received Signal Strength Indicator. </td></tr>
+</table>
+
+</div>
+</div>
+<h2 class="groupheader">Function Documentation</h2>
+<a class="anchor" id="gaf38a7aeb470eec596febc850c8b69ccf"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_SetOption </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>interface</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>option</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const void *&#160;</td>
+          <td class="paramname"><em>data</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>len</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Set WiFi Module Options. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">interface</td><td>Interface (0 = Station, 1 = Access Point) </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">option</td><td>Option to set </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">data</td><td>Pointer to data relevant to selected option </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">len</td><td>Length of data (in bytes) </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="group__execution__status.html#ga85752c5de59e8adeb001e35ff5be6be7">ARM_DRIVER_OK</a> : Operation successful</li>
+<li><a class="el" href="group__execution__status.html#ga2f627075447749bb368d3b768be107cb">ARM_DRIVER_ERROR</a> : Operation failed</li>
+<li><a class="el" href="group__execution__status.html#ga2efa59e480d82697795439220e6884e4">ARM_DRIVER_ERROR_UNSUPPORTED</a> : Operation not supported</li>
+<li><a class="el" href="group__execution__status.html#gac781d4b70ce17c4c2efe2db045be751c">ARM_DRIVER_ERROR_PARAMETER</a> : Parameter error (invalid interface, NULL data pointer or len less than option specifies)</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_SetOption</b> sets the value of the specified option of the WiFi module.</p>
+<p>The argument <em>interface</em> specifies the interface (0 = Station, 1 = Access Point).</p>
+<p>The argument <em>option</em> specifies the option that is to be set (see below).</p>
+<p>The argument <em>data</em> points to a buffer containing the value of the option to be set and must be aligned to the data type of the corresponding option.</p>
+<p>The argument <em>len</em> specifies the length of the buffer <em>data</em> and must be equal (or higher) to the length of the corresponding option.</p>
+<table class="doxtable">
+<tr>
+<th align="left">Option </th><th align="left">Description </th><th align="left">Data </th><th align="left">Type/Length  </th></tr>
+<tr>
+<td align="left"><a class="el" href="group__WiFi__option.html#gae84cbf48cd5168371621fc5f78aac0a4">ARM_WIFI_BSSID</a> </td><td align="left">BSSID of AP to connect or AP </td><td align="left">bssid </td><td align="left">uint8_t[6] </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__WiFi__option.html#ga1fbda584fe5750db6a04b1ed27730d95">ARM_WIFI_TX_POWER</a> </td><td align="left">Transmit power </td><td align="left">power[dbm] </td><td align="left">uint32_t </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__WiFi__option.html#ga77e38a3d5d2fe8c04aebaf8d24e1b8d4">ARM_WIFI_LP_TIMER</a> </td><td align="left">Low-power deep-sleep time </td><td align="left">time[seconds] </td><td align="left">uint32_t </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__WiFi__option.html#ga947c297f1364993524bf515beba296f1">ARM_WIFI_DTIM</a> </td><td align="left">DTIM interval </td><td align="left">dtim[beacons] </td><td align="left">uint32_t </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__WiFi__option.html#ga6171d24c661b54465ced2dae7980897c">ARM_WIFI_BEACON</a> </td><td align="left">Beacon interval </td><td align="left">interval[ms] </td><td align="left">uint32_t </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__WiFi__option.html#gafefb0fe1e5cdfb71f7f8cc7606840865">ARM_WIFI_MAC</a> </td><td align="left">MAC address </td><td align="left">mac </td><td align="left">uint8_t[6] </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__WiFi__option.html#ga50ee1ca627ebe536cae0ab7155ed1d17">ARM_WIFI_IP</a> </td><td align="left">IPv4 address </td><td align="left">ip </td><td align="left">uint8_t[4] </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__WiFi__option.html#gac2603479ebad0ed05413e1e01b8a649f">ARM_WIFI_IP_SUBNET_MASK</a> </td><td align="left">IPv4 subnet mask </td><td align="left">mask </td><td align="left">uint8_t[4] </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__WiFi__option.html#gad0c719fedd39d738ee7f6fd3c7317169">ARM_WIFI_IP_GATEWAY</a> </td><td align="left">IPv4 gateway address </td><td align="left">ip </td><td align="left">uint8_t[4] </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__WiFi__option.html#ga657f5c6c504defe04422dbe468c6c134">ARM_WIFI_IP_DNS1</a> </td><td align="left">IPv4 primary DNS server address </td><td align="left">ip </td><td align="left">uint8_t[4] </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__WiFi__option.html#ga5a5fa4c298b16d0acd0a71f873802d31">ARM_WIFI_IP_DNS2</a> </td><td align="left">IPv4 secondary DNS server address </td><td align="left">ip </td><td align="left">uint8_t[4] </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__WiFi__option.html#gad37e95b697872782973057ae94c085a9">ARM_WIFI_IP_DHCP</a> </td><td align="left">IPv4 DHCP client/server enable/disable </td><td align="left">dhcp (0, 1) </td><td align="left">uint32_t </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__WiFi__option.html#ga10065d0d9cb7530e0747be83ba9e4c35">ARM_WIFI_IP_DHCP_POOL_BEGIN</a> </td><td align="left">IPv4 DHCP server begin address </td><td align="left">ip </td><td align="left">uint8_t[4] </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__WiFi__option.html#ga4054f0e4045a25928531be73fb9d6b45">ARM_WIFI_IP_DHCP_POOL_END</a> </td><td align="left">IPv4 DHCP server end address </td><td align="left">ip </td><td align="left">uint8_t[4] </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__WiFi__option.html#ga78ec2d08d4f1d3ce486b40a329bd8713">ARM_WIFI_IP_DHCP_LEASE_TIME</a> </td><td align="left">IPv4 DHCP server lease time </td><td align="left">time[seconds] </td><td align="left">uint32_t </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__WiFi__option.html#gaeac3fc297297b9bf5f2b5cf84788d77f">ARM_WIFI_IP6_GLOBAL</a> </td><td align="left">IPv6 global address </td><td align="left">ip6 </td><td align="left">uint8_t[16] </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__WiFi__option.html#ga11fdcc3403a43187158434a87fdfb83c">ARM_WIFI_IP6_LINK_LOCAL</a> </td><td align="left">IPv6 link-local address </td><td align="left">ip6 </td><td align="left">uint8_t[16] </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__WiFi__option.html#ga545cb7e1da8715966bee7c7ff9d427d8">ARM_WIFI_IP6_SUBNET_PREFIX_LEN</a> </td><td align="left">IPv6 subnet prefix length </td><td align="left">len (1..127) </td><td align="left">uint32_t </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__WiFi__option.html#ga218d49572adcac8d678f7a8ae2f0c67e">ARM_WIFI_IP6_GATEWAY</a> </td><td align="left">IPv6 gateway address </td><td align="left">ip6 </td><td align="left">uint8_t[16] </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__WiFi__option.html#gaeb86e25e3b7c6360c977b05b40ff7676">ARM_WIFI_IP6_DNS1</a> </td><td align="left">IPv6 primary DNS server address </td><td align="left">ip6 </td><td align="left">uint8_t[16] </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__WiFi__option.html#ga24dee294436d575b47c7a314cba1654d">ARM_WIFI_IP6_DNS2</a> </td><td align="left">IPv6 secondary DNS server address </td><td align="left">ip6 </td><td align="left">uint8_t[16] </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__WiFi__option.html#ga6b864e923870ec473ee0c876d1a3b032">ARM_WIFI_IP6_DHCP_MODE</a> </td><td align="left">IPv6 DHCP client mode </td><td align="left">mode </td><td align="left">uint32_t </td></tr>
+</table>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line">uint8_t ip[4];</div>
+<div class="line"> </div>
+<div class="line">ip[0] = 192U;</div>
+<div class="line">ip[1] = 168U;</div>
+<div class="line">ip[2] = 0U;</div>
+<div class="line">ip[3] = 1U;</div>
+<div class="line"> </div>
+<div class="line"><span class="comment">// Set IP static address of the Station</span></div>
+<div class="line">wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a6b5e1c7fcea96ff13f6fd16d57c8b68f">SetOption</a> (0U, <a class="code" href="group__WiFi__option.html#ga50ee1ca627ebe536cae0ab7155ed1d17">ARM_WIFI_IP</a>, &amp;ip, <span class="keyword">sizeof</span>(ip));</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="ga56910984e5068f6502e12f72e1f80edf"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_GetOption </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>interface</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>option</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">void *&#160;</td>
+          <td class="paramname"><em>data</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t *&#160;</td>
+          <td class="paramname"><em>len</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Get WiFi Module Options. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">interface</td><td>Interface (0 = Station, 1 = Access Point) </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">option</td><td>Option to get </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">data</td><td>Pointer to memory where data for selected option will be returned </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">len</td><td>Pointer to length of data (input/output)<ul>
+<li>input: maximum length of data that can be returned (in bytes)</li>
+<li>output: length of returned data (in bytes) </li>
+</ul>
+</td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="group__execution__status.html#ga85752c5de59e8adeb001e35ff5be6be7">ARM_DRIVER_OK</a> : Operation successful</li>
+<li><a class="el" href="group__execution__status.html#ga2f627075447749bb368d3b768be107cb">ARM_DRIVER_ERROR</a> : Operation failed</li>
+<li><a class="el" href="group__execution__status.html#ga2efa59e480d82697795439220e6884e4">ARM_DRIVER_ERROR_UNSUPPORTED</a> : Operation not supported</li>
+<li><a class="el" href="group__execution__status.html#gac781d4b70ce17c4c2efe2db045be751c">ARM_DRIVER_ERROR_PARAMETER</a> : Parameter error (invalid interface, NULL data or len pointer, or *len less than option specifies)</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_GetOption</b> retrieves the current value of the specified option of the WiFi module.</p>
+<p>The argument <em>interface</em> specifies the interface (0 = Station, 1 = Access Point).</p>
+<p>The argument <em>option</em> specifies the option that is to be retrieved (see <a class="el" href="group__wifi__management__gr.html#gaf38a7aeb470eec596febc850c8b69ccf">ARM_WIFI_SetOption</a>).</p>
+<p>The argument <em>data</em> points to a buffer that will be used to store the value of the <em>option</em> and must be aligned to the data type of the corresponding option.</p>
+<p>The argument <em>len</em> is a pointer to the length of the buffer at input and returns the length of the option information on the output.</p>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line">uint8_t ip[4];          <span class="comment">// IP address</span></div>
+<div class="line">uint8_t mask[4];        <span class="comment">// Subnet mask</span></div>
+<div class="line">uint8_t gateway[4];     <span class="comment">// Gateway address</span></div>
+<div class="line"> </div>
+<div class="line"><span class="comment">// Get IP address, Subnet mask and Gateway address of the Station</span></div>
+<div class="line">wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#af264a580d36c33a649b64be845458b03">GetOption</a> (0U, <a class="code" href="group__WiFi__option.html#ga50ee1ca627ebe536cae0ab7155ed1d17">ARM_WIFI_IP</a>, &amp;ip, <span class="keyword">sizeof</span>(ip));</div>
+<div class="line">wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#af264a580d36c33a649b64be845458b03">GetOption</a> (0U, <a class="code" href="group__WiFi__option.html#gac2603479ebad0ed05413e1e01b8a649f">ARM_WIFI_IP_SUBNET_MASK</a>, &amp;mask, <span class="keyword">sizeof</span>(mask));</div>
+<div class="line">wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#af264a580d36c33a649b64be845458b03">GetOption</a> (0U, <a class="code" href="group__WiFi__option.html#gad0c719fedd39d738ee7f6fd3c7317169">ARM_WIFI_IP_GATEWAY</a>, &amp;gateway, <span class="keyword">sizeof</span>(gateway));</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="ga856972af36e51cf0c4112029332d529f"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_Scan </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__wifi__management__gr.html#structARM__WIFI__SCAN__INFO__t">ARM_WIFI_SCAN_INFO_t</a>&#160;</td>
+          <td class="paramname"><em>scan_info</em>[], </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>max_num</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Scan for available networks in range. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[out]</td><td class="paramname">scan_info</td><td>Pointer to array of <a class="el" href="group__wifi__management__gr.html#structARM__WIFI__SCAN__INFO__t" title="WiFi Scan Information. ">ARM_WIFI_SCAN_INFO_t</a> structures where available Scan Information will be returned </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">max_num</td><td>Maximum number of Network Information structures to return </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>number of <a class="el" href="group__wifi__management__gr.html#structARM__WIFI__SCAN__INFO__t" title="WiFi Scan Information. ">ARM_WIFI_SCAN_INFO_t</a> structures returned or error code<ul>
+<li>value &gt;= 0 : Number of <a class="el" href="group__wifi__management__gr.html#structARM__WIFI__SCAN__INFO__t" title="WiFi Scan Information. ">ARM_WIFI_SCAN_INFO_t</a> structures returned</li>
+<li><a class="el" href="group__execution__status.html#ga2f627075447749bb368d3b768be107cb">ARM_DRIVER_ERROR</a> : Operation failed</li>
+<li><a class="el" href="group__execution__status.html#gac781d4b70ce17c4c2efe2db045be751c">ARM_DRIVER_ERROR_PARAMETER</a> : Parameter error (NULL scan_info pointer or max_num equal to 0)</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_Scan</b> searches for available WiFi networks. Using this function, you can determine which wireless networks are available for the connection. If the network is secured, you must also know the password to connect.</p>
+<p>The argument <em>scan_info</em> is a pointer to an array of network information structures, where the available network information will be returned.</p>
+<p>The argument <em>max_num</em> specifies maximum number of network information structures, that can be stored to the <em>scan_info</em>.</p>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line"><a class="code" href="group__wifi__management__gr.html#structARM__WIFI__SCAN__INFO__t">ARM_WIFI_SCAN_INFO_t</a> scan_info[8];</div>
+<div class="line"> </div>
+<div class="line">num = wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a51d027ef7046c413372103aa952772fb">Scan</a> (scan_info, 8U);</div>
+<div class="line"> </div>
+<div class="line"><span class="comment">// Print SSIDs of available WiFi networks</span></div>
+<div class="line"><span class="keywordflow">for</span> (i = 0; i &lt; num; i++) {</div>
+<div class="line">  printf (<span class="stringliteral">&quot;%d. ssid=%s\n&quot;</span>, i, scan_info[i].ssid);</div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="ga7d545744a848702d75043de30ea5260a"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_Activate </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>interface</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="group__wifi__management__gr.html#structARM__WIFI__CONFIG__t">ARM_WIFI_CONFIG_t</a> *&#160;</td>
+          <td class="paramname"><em>config</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Activate interface (Connect to a wireless network or activate an access point). </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">interface</td><td>Interface (0 = Station, 1 = Access Point) </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">config</td><td>Pointer to <a class="el" href="group__wifi__management__gr.html#structARM__WIFI__CONFIG__t" title="WiFi Configuration. ">ARM_WIFI_CONFIG_t</a> structure where Configuration parameters are located </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="group__execution__status.html#ga85752c5de59e8adeb001e35ff5be6be7">ARM_DRIVER_OK</a> : Operation successful</li>
+<li><a class="el" href="group__execution__status.html#ga2f627075447749bb368d3b768be107cb">ARM_DRIVER_ERROR</a> : Operation failed</li>
+<li><a class="el" href="group__execution__status.html#ga0bac892205bb2d586b822e8b178ab310">ARM_DRIVER_ERROR_TIMEOUT</a> : Timeout occurred</li>
+<li><a class="el" href="group__execution__status.html#ga2efa59e480d82697795439220e6884e4">ARM_DRIVER_ERROR_UNSUPPORTED</a> : Operation not supported (security type, channel autodetect or WPS not supported)</li>
+<li><a class="el" href="group__execution__status.html#gac781d4b70ce17c4c2efe2db045be751c">ARM_DRIVER_ERROR_PARAMETER</a> : Parameter error (invalid interface, NULL config pointer or invalid configuration)</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_Activate</b> activates the specified interface.</p>
+<p>The argument <em>interface</em> specifies the interface (0 = Station, 1 = Access Point).</p>
+<p>When station interface is specified, the WiFi module connects to a wireless network.</p>
+<p>The wireless network trying to connect to must be available, otherwise the operation will fail after a timeout.</p>
+<p>Available wireless networks can be scanned by using the function <a class="el" href="group__wifi__management__gr.html#ga856972af36e51cf0c4112029332d529f">ARM_WIFI_Scan</a>.</p>
+<p>When access point interface is specified, the WiFi module creates a wireless network by activating the access point.</p>
+<p>The argument <em>config</em> is a pointer to the configuration <a class="el" href="group__wifi__management__gr.html#structARM__WIFI__CONFIG__t">ARM_WIFI_CONFIG_t</a> which provides information needed to connect to a WiFi network for station interface or information used to configure the access point (AP) for access point interface.</p>
+<p><em>ssid</em> specifies the name of the network to connect to or the network to create.</p>
+<p><em>pass</em> specifies the password for accessing the wireless network.</p>
+<p><em>security</em> specifies the security type which will be used for the connection.</p>
+<p><em>ch</em> specifies the WiFi channel which will be used for the connection. Valid channels for 2.4 GHz frequency are from <span class="XML-Token">1</span> to <span class="XML-Token">13</span>. If the value for <em>ch</em> = <span class="XML-Token">0</span>, the system automatically selects the channel. For station interface the channel of the AP being connected to is used. For access point interface the module automatically selects the best channel for the WiFi connection.</p>
+<dl class="section note"><dt>Note</dt><dd>Optionally BSSID parameter can be also set using <a class="el" href="group__wifi__management__gr.html#gaf38a7aeb470eec596febc850c8b69ccf">ARM_WIFI_SetOption</a>. It allows connection to specific BSSID when connecting to an access point or specifies the BSSID of the access point.</dd></dl>
+<p><em>wps_method</em> specifies if WiFi Protected Setup (WPS) is used and which method.</p>
+<p><em>wps_pin</em> specifies the PIN used with WPS (<a class="el" href="group__wifi__wps__method.html#ga12a4e06347498f9765f339cdb5f391de">ARM_WIFI_WPS_METHOD_PIN</a>).</p>
+<p>With the <b>push-button</b> method, you typically press the button, either real or virtual, both at the access point and the station. No credentials are needed.</p>
+<p>With <b>PIN</b> method, you must provide the PIN code that you read from the label or screen on the wireless device.</p>
+<p>WPS configuration for station is used when station connects to an access point. It enables to connect without specifying SSID, Password, Security Type or WiFi Channel. The actual network information can be retrieved once connected with <a class="el" href="group__wifi__management__gr.html#ga29a5b0072470a8c56f0939f3c97ed08e">ARM_WIFI_GetNetInfo</a>.</p>
+<p>WPS configuration for access point is used when access point is activated. Subsequent activate calls re-trigger the WPS procedure.</p>
+<dl class="section note"><dt>Note</dt><dd>WPS is typically activated by pressing the WPS button at the access point. During the discovery mode (usually 2 minutes or less) any wireless device may connect to the access point (PIN needs to match when PIN method is selected).</dd></dl>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line"><a class="code" href="group__wifi__management__gr.html#structARM__WIFI__CONFIG__t">ARM_WIFI_CONFIG_t</a> wifi_config;</div>
+<div class="line"> </div>
+<div class="line">wifi_config.<a class="code" href="group__wifi__management__gr.html#a587ba0cb07f02913598610049a3bbb79">ssid</a> = <span class="stringliteral">&quot;GuestAccess&quot;</span>;</div>
+<div class="line">wifi_config.<a class="code" href="group__wifi__management__gr.html#a3bef28806edf8f4c8cb82584b7e8c3cb">pass</a> = <span class="stringliteral">&quot;guest&quot;</span>;</div>
+<div class="line">wifi_config.<a class="code" href="group__wifi__management__gr.html#a5cd97d88131cf38bcc75189f9569f9b7">security</a> = <a class="code" href="group__wifi__sec__type.html#gab4622ed5c27f910299ed6c3997d14b66">ARM_WIFI_SECURITY_WPA2</a>;</div>
+<div class="line">wifi_config.<a class="code" href="group__wifi__management__gr.html#acbcf5f8de7895ca456bb39fbcccde1d1">ch</a> = 0U;</div>
+<div class="line">wifi_config.<a class="code" href="group__wifi__management__gr.html#a5e263198499fb98f97d40a9b82579175">wps_method</a> = <a class="code" href="group__wifi__wps__method.html#gaade5c0e07cfee79973643b9f98a73438">ARM_WIFI_WPS_METHOD_NONE</a>;</div>
+<div class="line"> </div>
+<div class="line"><span class="comment">// Connect to wireless network</span></div>
+<div class="line">status = wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a444ea7bda2c45eab34050d2a895baeec">Activate</a> (0U, &amp;wifi_config);</div>
+<div class="line"><span class="keywordflow">if</span> (status != <a class="code" href="group__execution__status.html#ga85752c5de59e8adeb001e35ff5be6be7">ARM_DRIVER_OK</a>) {</div>
+<div class="line">  <span class="comment">// error handling</span></div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="ga1842127df60067481ac2f40d19153e3e"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_Deactivate </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>interface</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Deactivate interface (Disconnect from a wireless network or deactivate an access point). </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">interface</td><td>Interface (0 = Station, 1 = Access Point) </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="group__execution__status.html#ga85752c5de59e8adeb001e35ff5be6be7">ARM_DRIVER_OK</a> : Operation successful</li>
+<li><a class="el" href="group__execution__status.html#ga2f627075447749bb368d3b768be107cb">ARM_DRIVER_ERROR</a> : Operation failed</li>
+<li><a class="el" href="group__execution__status.html#gac781d4b70ce17c4c2efe2db045be751c">ARM_DRIVER_ERROR_PARAMETER</a> : Parameter error (invalid interface)</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_Deactivate</b> deactivates the specified interface.</p>
+<p>The argument <em>interface</em> specifies the interface (0 = Station, 1 = Access Point).</p>
+<p>When station interface is specified, the WiFi module disconnects from the wireless network.</p>
+<p>When access point interface is specified, the WiFi module deactivates the access point.</p>
+<p><b>Example:</b> </p>
+<ul>
+<li>see <a class="el" href="group__wifi__management__gr.html#ga29a5b0072470a8c56f0939f3c97ed08e">ARM_WIFI_GetNetInfo</a> </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="ga3d641222defb5f52f6dae4ce1d540d0f"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">uint32_t ARM_WIFI_IsConnected </td>
+          <td>(</td>
+          <td class="paramtype">void&#160;</td>
+          <td class="paramname"></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Get station connection status. </p>
+<dl class="section return"><dt>Returns</dt><dd>station connection status<ul>
+<li>value != 0: Station connected</li>
+<li>value = 0: Station not connected</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_IsConnected</b> checks if the station is connected to a wireless network and returns the connection status.</p>
+<p>The function returns a <span class="XML-Token">non-zero</span> value, if the station is connected. If the station is not connected, the function returns <span class="XML-Token">0</span>.</p>
+<p><b>Example:</b> </p>
+<ul>
+<li>see <a class="el" href="group__wifi__management__gr.html#ga29a5b0072470a8c56f0939f3c97ed08e">ARM_WIFI_GetNetInfo</a> </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="ga29a5b0072470a8c56f0939f3c97ed08e"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_GetNetInfo </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__wifi__management__gr.html#structARM__WIFI__NET__INFO__t">ARM_WIFI_NET_INFO_t</a> *&#160;</td>
+          <td class="paramname"><em>net_info</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Get station Network Information. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[out]</td><td class="paramname">net_info</td><td>Pointer to <a class="el" href="group__wifi__management__gr.html#structARM__WIFI__NET__INFO__t" title="WiFi Network Information. ">ARM_WIFI_NET_INFO_t</a> structure where station Network Information will be returned </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="group__execution__status.html#ga85752c5de59e8adeb001e35ff5be6be7">ARM_DRIVER_OK</a> : Operation successful</li>
+<li><a class="el" href="group__execution__status.html#ga2f627075447749bb368d3b768be107cb">ARM_DRIVER_ERROR</a> : Operation failed (station not connected)</li>
+<li><a class="el" href="group__execution__status.html#ga2efa59e480d82697795439220e6884e4">ARM_DRIVER_ERROR_UNSUPPORTED</a> : Operation not supported</li>
+<li><a class="el" href="group__execution__status.html#gac781d4b70ce17c4c2efe2db045be751c">ARM_DRIVER_ERROR_PARAMETER</a> : Parameter error (invalid interface or NULL net_info pointer)</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_GetNetInfo</b> retrieves wireless network information of a connected station.</p>
+<p>It can be used to retrieve network connection information for subsequent connections after initially connecting using WPS.</p>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line"><a class="code" href="group__wifi__management__gr.html#structARM__WIFI__CONFIG__t">ARM_WIFI_CONFIG_t</a> wifi_config;</div>
+<div class="line"><a class="code" href="group__wifi__management__gr.html#structARM__WIFI__NET__INFO__t">ARM_WIFI_NET_INFO_t</a> net_info;</div>
+<div class="line"> </div>
+<div class="line">memset(&amp;wifi_config, 0, <span class="keyword">sizeof</span>(wifi_config));</div>
+<div class="line"> </div>
+<div class="line">wifi_config.<a class="code" href="group__wifi__management__gr.html#a5e263198499fb98f97d40a9b82579175">wps_method</a> = <a class="code" href="group__wifi__wps__method.html#gafe4555319019fa722d2f2a8cc519af41">ARM_WIFI_WPS_METHOD_PBC</a>;</div>
+<div class="line"> </div>
+<div class="line"><span class="comment">// Connect to wireless network (WPS)</span></div>
+<div class="line">status = wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a444ea7bda2c45eab34050d2a895baeec">Activate</a> (0U, &amp;wifi_config);</div>
+<div class="line"><span class="keywordflow">if</span> (status != <a class="code" href="group__execution__status.html#ga85752c5de59e8adeb001e35ff5be6be7">ARM_DRIVER_OK</a>) {</div>
+<div class="line">  <span class="comment">// error handling</span></div>
+<div class="line">}</div>
+<div class="line"> </div>
+<div class="line"><span class="comment">// Retrieve network information</span></div>
+<div class="line"><span class="keywordflow">if</span> (wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#ab9771e89a155d316e0b44d3ee89081d3">IsConnected</a> ()) {</div>
+<div class="line">  status = wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#ac17eb39c11b7797b88a1f6e0f8cc772d">GetNetInfo</a> (&amp;net_info);</div>
+<div class="line">  <span class="keywordflow">if</span> (status != <a class="code" href="group__execution__status.html#ga85752c5de59e8adeb001e35ff5be6be7">ARM_DRIVER_OK</a>) {</div>
+<div class="line">    <span class="comment">// error handling</span></div>
+<div class="line">  }</div>
+<div class="line">  printf(<span class="stringliteral">&quot;SSID=%s, Password=%s&quot;</span>,net_info.<a class="code" href="group__wifi__management__gr.html#ae7eccb3e4df8625b86b5572fc16c37c3">ssid</a>, net_info.<a class="code" href="group__wifi__management__gr.html#a97ae3ac37e362cf8e7e3a9e18b7c806f">pass</a>);</div>
+<div class="line">}</div>
+<div class="line"> </div>
+<div class="line"><span class="comment">// Disconnect from wireless network</span></div>
+<div class="line">wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#ae9a38e69c7b7face914560e872378ed1">Deactivate</a> (0U);</div>
+</div><!-- fragment --> 
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
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new file mode 100644
index 0000000..e0e8910
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@@ -0,0 +1,37 @@
+var group__wifi__management__gr =
+[
+    [ "WiFi Option Codes", "group__WiFi__option.html", "group__WiFi__option" ],
+    [ "WiFi Security Type", "group__wifi__sec__type.html", "group__wifi__sec__type" ],
+    [ "WiFi Protected Setup (WPS) Method", "group__wifi__wps__method.html", "group__wifi__wps__method" ],
+    [ "WiFi DHCPv6 Mode", "group__wifi__dhcp__v6__mode.html", "group__wifi__dhcp__v6__mode" ],
+    [ "ARM_WIFI_CONFIG_t", "group__wifi__management__gr.html#structARM__WIFI__CONFIG__t", [
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+      [ "wps_pin", "group__wifi__management__gr.html#a2047d60666390ea4755ce22603969c4c", null ]
+    ] ],
+    [ "ARM_WIFI_SCAN_INFO_t", "group__wifi__management__gr.html#structARM__WIFI__SCAN__INFO__t", [
+      [ "ssid", "group__wifi__management__gr.html#ae7eccb3e4df8625b86b5572fc16c37c3", null ],
+      [ "bssid", "group__wifi__management__gr.html#a19c52baafe5797c359c5e0f5776499d7", null ],
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+      [ "ch", "group__wifi__management__gr.html#acbcf5f8de7895ca456bb39fbcccde1d1", null ],
+      [ "rssi", "group__wifi__management__gr.html#afb67d818cd76cce8057affabcb1979a6", null ]
+    ] ],
+    [ "ARM_WIFI_NET_INFO_t", "group__wifi__management__gr.html#structARM__WIFI__NET__INFO__t", [
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+      [ "pass", "group__wifi__management__gr.html#a97ae3ac37e362cf8e7e3a9e18b7c806f", null ],
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+      [ "ch", "group__wifi__management__gr.html#acbcf5f8de7895ca456bb39fbcccde1d1", null ],
+      [ "rssi", "group__wifi__management__gr.html#afb67d818cd76cce8057affabcb1979a6", null ]
+    ] ],
+    [ "ARM_WIFI_SetOption", "group__wifi__management__gr.html#gaf38a7aeb470eec596febc850c8b69ccf", null ],
+    [ "ARM_WIFI_GetOption", "group__wifi__management__gr.html#ga56910984e5068f6502e12f72e1f80edf", null ],
+    [ "ARM_WIFI_Scan", "group__wifi__management__gr.html#ga856972af36e51cf0c4112029332d529f", null ],
+    [ "ARM_WIFI_Activate", "group__wifi__management__gr.html#ga7d545744a848702d75043de30ea5260a", null ],
+    [ "ARM_WIFI_Deactivate", "group__wifi__management__gr.html#ga1842127df60067481ac2f40d19153e3e", null ],
+    [ "ARM_WIFI_IsConnected", "group__wifi__management__gr.html#ga3d641222defb5f52f6dae4ce1d540d0f", null ],
+    [ "ARM_WIFI_GetNetInfo", "group__wifi__management__gr.html#ga29a5b0072470a8c56f0939f3c97ed08e", null ]
+];
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diff --git a/docs/Driver/html/group__wifi__management__gr_structARM__WIFI__CONFIG__t.js b/docs/Driver/html/group__wifi__management__gr_structARM__WIFI__CONFIG__t.js
new file mode 100644
index 0000000..6afebbb
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@@ -0,0 +1,10 @@
+var group__wifi__management__gr_structARM__WIFI__CONFIG__t =
+[
+    [ "ssid", "group__wifi__management__gr.html#a587ba0cb07f02913598610049a3bbb79", null ],
+    [ "pass", "group__wifi__management__gr.html#a3bef28806edf8f4c8cb82584b7e8c3cb", null ],
+    [ "security", "group__wifi__management__gr.html#a5cd97d88131cf38bcc75189f9569f9b7", null ],
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+    [ "wps_method", "group__wifi__management__gr.html#a5e263198499fb98f97d40a9b82579175", null ],
+    [ "wps_pin", "group__wifi__management__gr.html#a2047d60666390ea4755ce22603969c4c", null ]
+];
\ No newline at end of file
diff --git a/docs/Driver/html/group__wifi__management__gr_structARM__WIFI__NET__INFO__t.js b/docs/Driver/html/group__wifi__management__gr_structARM__WIFI__NET__INFO__t.js
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+++ b/docs/Driver/html/group__wifi__management__gr_structARM__WIFI__NET__INFO__t.js
@@ -0,0 +1,8 @@
+var group__wifi__management__gr_structARM__WIFI__NET__INFO__t =
+[
+    [ "ssid", "group__wifi__management__gr.html#ae7eccb3e4df8625b86b5572fc16c37c3", null ],
+    [ "pass", "group__wifi__management__gr.html#a97ae3ac37e362cf8e7e3a9e18b7c806f", null ],
+    [ "security", "group__wifi__management__gr.html#a5cd97d88131cf38bcc75189f9569f9b7", null ],
+    [ "ch", "group__wifi__management__gr.html#acbcf5f8de7895ca456bb39fbcccde1d1", null ],
+    [ "rssi", "group__wifi__management__gr.html#afb67d818cd76cce8057affabcb1979a6", null ]
+];
\ No newline at end of file
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new file mode 100644
index 0000000..912e861
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+++ b/docs/Driver/html/group__wifi__management__gr_structARM__WIFI__SCAN__INFO__t.js
@@ -0,0 +1,8 @@
+var group__wifi__management__gr_structARM__WIFI__SCAN__INFO__t =
+[
+    [ "ssid", "group__wifi__management__gr.html#ae7eccb3e4df8625b86b5572fc16c37c3", null ],
+    [ "bssid", "group__wifi__management__gr.html#a19c52baafe5797c359c5e0f5776499d7", null ],
+    [ "security", "group__wifi__management__gr.html#a5cd97d88131cf38bcc75189f9569f9b7", null ],
+    [ "ch", "group__wifi__management__gr.html#acbcf5f8de7895ca456bb39fbcccde1d1", null ],
+    [ "rssi", "group__wifi__management__gr.html#afb67d818cd76cce8057affabcb1979a6", null ]
+];
\ No newline at end of file
diff --git a/docs/Driver/html/group__wifi__protocol.html b/docs/Driver/html/group__wifi__protocol.html
new file mode 100644
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+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>WiFi Socket Protocol definitions</title>
+<title>CMSIS-Driver: WiFi Socket Protocol definitions</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
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+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Driver
+   &#160;<span id="projectnumber">Version 2.7.1</span>
+   </div>
+   <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
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+      <li><a href="modules.html"><span>Reference</span></a></li>
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+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
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+</div>
+
+<div class="header">
+  <div class="summary">
+<a href="#define-members">Macros</a>  </div>
+  <div class="headertitle">
+<div class="title">WiFi Socket Protocol definitions<div class="ingroups"><a class="el" href="group__wifi__socket__gr.html">WiFi Socket</a></div></div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>WiFi Socket Protocol definitions.  
+<a href="#details">More...</a></p>
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
+Macros</h2></td></tr>
+<tr class="memitem:gaf07cfcf1b65ea6c6be0629459a2ba781"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__protocol.html#gaf07cfcf1b65ea6c6be0629459a2ba781">ARM_SOCKET_IPPROTO_TCP</a>&#160;&#160;&#160;1</td></tr>
+<tr class="memdesc:gaf07cfcf1b65ea6c6be0629459a2ba781"><td class="mdescLeft">&#160;</td><td class="mdescRight">TCP.  <a href="#gaf07cfcf1b65ea6c6be0629459a2ba781">More...</a><br/></td></tr>
+<tr class="separator:gaf07cfcf1b65ea6c6be0629459a2ba781"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gabacbead83c772f5737b25b4fc390e16d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__protocol.html#gabacbead83c772f5737b25b4fc390e16d">ARM_SOCKET_IPPROTO_UDP</a>&#160;&#160;&#160;2</td></tr>
+<tr class="memdesc:gabacbead83c772f5737b25b4fc390e16d"><td class="mdescLeft">&#160;</td><td class="mdescRight">UDP.  <a href="#gabacbead83c772f5737b25b4fc390e16d">More...</a><br/></td></tr>
+<tr class="separator:gabacbead83c772f5737b25b4fc390e16d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>WiFi Socket Protocol definitions. </p>
+<p>The WiFi Socket Protocol specifies the Internet Protocol Type that the socket is using. </p>
+<h2 class="groupheader">Macro Definition Documentation</h2>
+<a class="anchor" id="gaf07cfcf1b65ea6c6be0629459a2ba781"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_IPPROTO_TCP&#160;&#160;&#160;1</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>TCP. </p>
+<p>Transmission Control Protocol. </p>
+
+</div>
+</div>
+<a class="anchor" id="gabacbead83c772f5737b25b4fc390e16d"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_IPPROTO_UDP&#160;&#160;&#160;2</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>UDP. </p>
+<p>User Datagram Protocol. </p>
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
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+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
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+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>WiFi Security Type</title>
+<title>CMSIS-Driver: WiFi Security Type</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
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+   &#160;<span id="projectnumber">Version 2.7.1</span>
+   </div>
+   <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li><a href="modules.html"><span>Reference</span></a></li>
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+<div id="doc-content">
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+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
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+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
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+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="summary">
+<a href="#define-members">Macros</a>  </div>
+  <div class="headertitle">
+<div class="title">WiFi Security Type<div class="ingroups"><a class="el" href="group__wifi__management__gr.html">WiFi Management</a></div></div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>Specifies WiFi security type for <a class="el" href="group__wifi__management__gr.html#ga7d545744a848702d75043de30ea5260a">ARM_WIFI_Activate</a>.  
+<a href="#details">More...</a></p>
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
+Macros</h2></td></tr>
+<tr class="memitem:gab5b0d06b14b916c244c42ad8a3053d1d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__sec__type.html#gab5b0d06b14b916c244c42ad8a3053d1d">ARM_WIFI_SECURITY_OPEN</a>&#160;&#160;&#160;0U</td></tr>
+<tr class="memdesc:gab5b0d06b14b916c244c42ad8a3053d1d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Open.  <a href="#gab5b0d06b14b916c244c42ad8a3053d1d">More...</a><br/></td></tr>
+<tr class="separator:gab5b0d06b14b916c244c42ad8a3053d1d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga75d8f1830db25a9f0b1390397186ddd5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__sec__type.html#ga75d8f1830db25a9f0b1390397186ddd5">ARM_WIFI_SECURITY_WEP</a>&#160;&#160;&#160;1U</td></tr>
+<tr class="memdesc:ga75d8f1830db25a9f0b1390397186ddd5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Wired Equivalent Privacy (WEP) with Pre-Sheared Key (PSK)  <a href="#ga75d8f1830db25a9f0b1390397186ddd5">More...</a><br/></td></tr>
+<tr class="separator:ga75d8f1830db25a9f0b1390397186ddd5"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga40f2c6844d3d81bbfedaa96e72402b35"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__sec__type.html#ga40f2c6844d3d81bbfedaa96e72402b35">ARM_WIFI_SECURITY_WPA</a>&#160;&#160;&#160;2U</td></tr>
+<tr class="memdesc:ga40f2c6844d3d81bbfedaa96e72402b35"><td class="mdescLeft">&#160;</td><td class="mdescRight">WiFi Protected Access (WPA) with PSK.  <a href="#ga40f2c6844d3d81bbfedaa96e72402b35">More...</a><br/></td></tr>
+<tr class="separator:ga40f2c6844d3d81bbfedaa96e72402b35"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab4622ed5c27f910299ed6c3997d14b66"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__sec__type.html#gab4622ed5c27f910299ed6c3997d14b66">ARM_WIFI_SECURITY_WPA2</a>&#160;&#160;&#160;3U</td></tr>
+<tr class="memdesc:gab4622ed5c27f910299ed6c3997d14b66"><td class="mdescLeft">&#160;</td><td class="mdescRight">WiFi Protected Access II (WPA2) with PSK.  <a href="#gab4622ed5c27f910299ed6c3997d14b66">More...</a><br/></td></tr>
+<tr class="separator:gab4622ed5c27f910299ed6c3997d14b66"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga1c0904e056c3f720fe38b903230d9f89"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__sec__type.html#ga1c0904e056c3f720fe38b903230d9f89">ARM_WIFI_SECURITY_UNKNOWN</a>&#160;&#160;&#160;255U</td></tr>
+<tr class="memdesc:ga1c0904e056c3f720fe38b903230d9f89"><td class="mdescLeft">&#160;</td><td class="mdescRight">Unknown.  <a href="#ga1c0904e056c3f720fe38b903230d9f89">More...</a><br/></td></tr>
+<tr class="separator:ga1c0904e056c3f720fe38b903230d9f89"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>Specifies WiFi security type for <a class="el" href="group__wifi__management__gr.html#ga7d545744a848702d75043de30ea5260a">ARM_WIFI_Activate</a>. </p>
+<p>The WiFi security type defines the standard used to protect the wireless network from unauthorized access. </p>
+<h2 class="groupheader">Macro Definition Documentation</h2>
+<a class="anchor" id="gab5b0d06b14b916c244c42ad8a3053d1d"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_SECURITY_OPEN&#160;&#160;&#160;0U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Open. </p>
+<p>This is an open system which provides <b>no</b> security. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__sec__type.html" title="Specifies WiFi security type for ARM_WIFI_Activate. ">WiFi Security Type</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga75d8f1830db25a9f0b1390397186ddd5"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_SECURITY_WEP&#160;&#160;&#160;1U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Wired Equivalent Privacy (WEP) with Pre-Sheared Key (PSK) </p>
+<p>This security standard provides <b>weak</b> level of security. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__sec__type.html" title="Specifies WiFi security type for ARM_WIFI_Activate. ">WiFi Security Type</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga40f2c6844d3d81bbfedaa96e72402b35"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_SECURITY_WPA&#160;&#160;&#160;2U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>WiFi Protected Access (WPA) with PSK. </p>
+<p>This security standard provides <b>medium</b> level of security. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__sec__type.html" title="Specifies WiFi security type for ARM_WIFI_Activate. ">WiFi Security Type</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="gab4622ed5c27f910299ed6c3997d14b66"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_SECURITY_WPA2&#160;&#160;&#160;3U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>WiFi Protected Access II (WPA2) with PSK. </p>
+<p>This security standard provides <b>strong</b> level of security. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__sec__type.html" title="Specifies WiFi security type for ARM_WIFI_Activate. ">WiFi Security Type</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga1c0904e056c3f720fe38b903230d9f89"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_SECURITY_UNKNOWN&#160;&#160;&#160;255U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Unknown. </p>
+<p>Unknown security standard (reported by <a class="el" href="group__wifi__management__gr.html#ga856972af36e51cf0c4112029332d529f">ARM_WIFI_Scan</a>). </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__sec__type.html" title="Specifies WiFi security type for ARM_WIFI_Activate. ">WiFi Security Type</a> </dd></dl>
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
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+<title>WiFi Socket Function return codes</title>
+<title>CMSIS-Driver: WiFi Socket Function return codes</title>
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+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Driver
+   &#160;<span id="projectnumber">Version 2.7.1</span>
+   </div>
+   <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
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+<div id="CMSISnav" class="tabs1">
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+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
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+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
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+        name="MSearchResults" id="MSearchResults">
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+</div>
+
+<div class="header">
+  <div class="summary">
+<a href="#define-members">Macros</a>  </div>
+  <div class="headertitle">
+<div class="title">WiFi Socket Function return codes<div class="ingroups"><a class="el" href="group__wifi__socket__gr.html">WiFi Socket</a></div></div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>WiFi Socket Function return codes.  
+<a href="#details">More...</a></p>
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
+Macros</h2></td></tr>
+<tr class="memitem:ga2f3db9fdae2366238054ff8a8e8ef97c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga2f3db9fdae2366238054ff8a8e8ef97c">ARM_SOCKET_ERROR</a>&#160;&#160;&#160;(-1)</td></tr>
+<tr class="memdesc:ga2f3db9fdae2366238054ff8a8e8ef97c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Unspecified error.  <a href="#ga2f3db9fdae2366238054ff8a8e8ef97c">More...</a><br/></td></tr>
+<tr class="separator:ga2f3db9fdae2366238054ff8a8e8ef97c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga535e069b83aafcf70dd089e6097bceef"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga535e069b83aafcf70dd089e6097bceef">ARM_SOCKET_ESOCK</a>&#160;&#160;&#160;(-2)</td></tr>
+<tr class="memdesc:ga535e069b83aafcf70dd089e6097bceef"><td class="mdescLeft">&#160;</td><td class="mdescRight">Invalid socket.  <a href="#ga535e069b83aafcf70dd089e6097bceef">More...</a><br/></td></tr>
+<tr class="separator:ga535e069b83aafcf70dd089e6097bceef"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga695aa5c5329602d9465fbc6c22fc9978"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga695aa5c5329602d9465fbc6c22fc9978">ARM_SOCKET_EINVAL</a>&#160;&#160;&#160;(-3)</td></tr>
+<tr class="memdesc:ga695aa5c5329602d9465fbc6c22fc9978"><td class="mdescLeft">&#160;</td><td class="mdescRight">Invalid argument.  <a href="#ga695aa5c5329602d9465fbc6c22fc9978">More...</a><br/></td></tr>
+<tr class="separator:ga695aa5c5329602d9465fbc6c22fc9978"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga95ab80319bfbc5413fc5334e3d5ce5d2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga95ab80319bfbc5413fc5334e3d5ce5d2">ARM_SOCKET_ENOTSUP</a>&#160;&#160;&#160;(-4)</td></tr>
+<tr class="memdesc:ga95ab80319bfbc5413fc5334e3d5ce5d2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Operation not supported.  <a href="#ga95ab80319bfbc5413fc5334e3d5ce5d2">More...</a><br/></td></tr>
+<tr class="separator:ga95ab80319bfbc5413fc5334e3d5ce5d2"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga68e88e80822f779361407d005659fc6c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga68e88e80822f779361407d005659fc6c">ARM_SOCKET_ENOMEM</a>&#160;&#160;&#160;(-5)</td></tr>
+<tr class="memdesc:ga68e88e80822f779361407d005659fc6c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Not enough memory.  <a href="#ga68e88e80822f779361407d005659fc6c">More...</a><br/></td></tr>
+<tr class="separator:ga68e88e80822f779361407d005659fc6c"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga699dbd55e543fd38d333cf1d4470d8db"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga699dbd55e543fd38d333cf1d4470d8db">ARM_SOCKET_EAGAIN</a>&#160;&#160;&#160;(-6)</td></tr>
+<tr class="memdesc:ga699dbd55e543fd38d333cf1d4470d8db"><td class="mdescLeft">&#160;</td><td class="mdescRight">Operation would block or timed out.  <a href="#ga699dbd55e543fd38d333cf1d4470d8db">More...</a><br/></td></tr>
+<tr class="separator:ga699dbd55e543fd38d333cf1d4470d8db"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad7f3e077f7721a202012378ddcefb83f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#gad7f3e077f7721a202012378ddcefb83f">ARM_SOCKET_EINPROGRESS</a>&#160;&#160;&#160;(-7)</td></tr>
+<tr class="memdesc:gad7f3e077f7721a202012378ddcefb83f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Operation in progress.  <a href="#gad7f3e077f7721a202012378ddcefb83f">More...</a><br/></td></tr>
+<tr class="separator:gad7f3e077f7721a202012378ddcefb83f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga320ffeeb44d583c0216b24d6e1009d9f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga320ffeeb44d583c0216b24d6e1009d9f">ARM_SOCKET_ETIMEDOUT</a>&#160;&#160;&#160;(-8)</td></tr>
+<tr class="memdesc:ga320ffeeb44d583c0216b24d6e1009d9f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Operation timed out.  <a href="#ga320ffeeb44d583c0216b24d6e1009d9f">More...</a><br/></td></tr>
+<tr class="separator:ga320ffeeb44d583c0216b24d6e1009d9f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa1e456c6cea2f6579158818387557f1a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#gaa1e456c6cea2f6579158818387557f1a">ARM_SOCKET_EISCONN</a>&#160;&#160;&#160;(-9)</td></tr>
+<tr class="memdesc:gaa1e456c6cea2f6579158818387557f1a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Socket is connected.  <a href="#gaa1e456c6cea2f6579158818387557f1a">More...</a><br/></td></tr>
+<tr class="separator:gaa1e456c6cea2f6579158818387557f1a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0bde95e313d907032074583bc06b24a1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga0bde95e313d907032074583bc06b24a1">ARM_SOCKET_ENOTCONN</a>&#160;&#160;&#160;(-10)</td></tr>
+<tr class="memdesc:ga0bde95e313d907032074583bc06b24a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Socket is not connected.  <a href="#ga0bde95e313d907032074583bc06b24a1">More...</a><br/></td></tr>
+<tr class="separator:ga0bde95e313d907032074583bc06b24a1"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaaf535c9d325172ff8ef02964af218cb0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#gaaf535c9d325172ff8ef02964af218cb0">ARM_SOCKET_ECONNREFUSED</a>&#160;&#160;&#160;(-11)</td></tr>
+<tr class="memdesc:gaaf535c9d325172ff8ef02964af218cb0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Connection rejected by the peer.  <a href="#gaaf535c9d325172ff8ef02964af218cb0">More...</a><br/></td></tr>
+<tr class="separator:gaaf535c9d325172ff8ef02964af218cb0"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga87fa238861921ba1b272019a83b04676"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga87fa238861921ba1b272019a83b04676">ARM_SOCKET_ECONNRESET</a>&#160;&#160;&#160;(-12)</td></tr>
+<tr class="memdesc:ga87fa238861921ba1b272019a83b04676"><td class="mdescLeft">&#160;</td><td class="mdescRight">Connection reset by the peer.  <a href="#ga87fa238861921ba1b272019a83b04676">More...</a><br/></td></tr>
+<tr class="separator:ga87fa238861921ba1b272019a83b04676"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga7e64d6bd00a2f6e30ece3ff0f02b5b27"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga7e64d6bd00a2f6e30ece3ff0f02b5b27">ARM_SOCKET_ECONNABORTED</a>&#160;&#160;&#160;(-13)</td></tr>
+<tr class="memdesc:ga7e64d6bd00a2f6e30ece3ff0f02b5b27"><td class="mdescLeft">&#160;</td><td class="mdescRight">Connection aborted locally.  <a href="#ga7e64d6bd00a2f6e30ece3ff0f02b5b27">More...</a><br/></td></tr>
+<tr class="separator:ga7e64d6bd00a2f6e30ece3ff0f02b5b27"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9df0d5bd422102d9d4ebddc869d358e0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga9df0d5bd422102d9d4ebddc869d358e0">ARM_SOCKET_EALREADY</a>&#160;&#160;&#160;(-14)</td></tr>
+<tr class="memdesc:ga9df0d5bd422102d9d4ebddc869d358e0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Connection already in progress.  <a href="#ga9df0d5bd422102d9d4ebddc869d358e0">More...</a><br/></td></tr>
+<tr class="separator:ga9df0d5bd422102d9d4ebddc869d358e0"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4fa475e41c3db0ada798249696e745a1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga4fa475e41c3db0ada798249696e745a1">ARM_SOCKET_EADDRINUSE</a>&#160;&#160;&#160;(-15)</td></tr>
+<tr class="memdesc:ga4fa475e41c3db0ada798249696e745a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Address in use.  <a href="#ga4fa475e41c3db0ada798249696e745a1">More...</a><br/></td></tr>
+<tr class="separator:ga4fa475e41c3db0ada798249696e745a1"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4d5d38e9a7d5907a3de4165476640cd4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html#ga4d5d38e9a7d5907a3de4165476640cd4">ARM_SOCKET_EHOSTNOTFOUND</a>&#160;&#160;&#160;(-16)</td></tr>
+<tr class="memdesc:ga4d5d38e9a7d5907a3de4165476640cd4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Host not found.  <a href="#ga4d5d38e9a7d5907a3de4165476640cd4">More...</a><br/></td></tr>
+<tr class="separator:ga4d5d38e9a7d5907a3de4165476640cd4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>WiFi Socket Function return codes. </p>
+<p>This section lists all the return errors the WiFi socket functions will return. The error codes are negative. This makes it easy to check an error when the return code is less than <span class="XML-Token">0</span>. </p>
+<h2 class="groupheader">Macro Definition Documentation</h2>
+<a class="anchor" id="ga2f3db9fdae2366238054ff8a8e8ef97c"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_ERROR&#160;&#160;&#160;(-1)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Unspecified error. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__soc__func.html" title="WiFi Socket Function return codes. ">WiFi Socket Function return codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga535e069b83aafcf70dd089e6097bceef"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_ESOCK&#160;&#160;&#160;(-2)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Invalid socket. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__soc__func.html" title="WiFi Socket Function return codes. ">WiFi Socket Function return codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga695aa5c5329602d9465fbc6c22fc9978"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_EINVAL&#160;&#160;&#160;(-3)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Invalid argument. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__soc__func.html" title="WiFi Socket Function return codes. ">WiFi Socket Function return codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga95ab80319bfbc5413fc5334e3d5ce5d2"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_ENOTSUP&#160;&#160;&#160;(-4)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Operation not supported. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__soc__func.html" title="WiFi Socket Function return codes. ">WiFi Socket Function return codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga68e88e80822f779361407d005659fc6c"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_ENOMEM&#160;&#160;&#160;(-5)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Not enough memory. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__soc__func.html" title="WiFi Socket Function return codes. ">WiFi Socket Function return codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga699dbd55e543fd38d333cf1d4470d8db"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_EAGAIN&#160;&#160;&#160;(-6)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Operation would block or timed out. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__soc__func.html" title="WiFi Socket Function return codes. ">WiFi Socket Function return codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="gad7f3e077f7721a202012378ddcefb83f"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_EINPROGRESS&#160;&#160;&#160;(-7)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Operation in progress. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__soc__func.html" title="WiFi Socket Function return codes. ">WiFi Socket Function return codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga320ffeeb44d583c0216b24d6e1009d9f"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_ETIMEDOUT&#160;&#160;&#160;(-8)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Operation timed out. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__soc__func.html" title="WiFi Socket Function return codes. ">WiFi Socket Function return codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="gaa1e456c6cea2f6579158818387557f1a"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_EISCONN&#160;&#160;&#160;(-9)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Socket is connected. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__soc__func.html" title="WiFi Socket Function return codes. ">WiFi Socket Function return codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga0bde95e313d907032074583bc06b24a1"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_ENOTCONN&#160;&#160;&#160;(-10)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Socket is not connected. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__soc__func.html" title="WiFi Socket Function return codes. ">WiFi Socket Function return codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="gaaf535c9d325172ff8ef02964af218cb0"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_ECONNREFUSED&#160;&#160;&#160;(-11)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Connection rejected by the peer. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__soc__func.html" title="WiFi Socket Function return codes. ">WiFi Socket Function return codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga87fa238861921ba1b272019a83b04676"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_ECONNRESET&#160;&#160;&#160;(-12)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Connection reset by the peer. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__soc__func.html" title="WiFi Socket Function return codes. ">WiFi Socket Function return codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga7e64d6bd00a2f6e30ece3ff0f02b5b27"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_ECONNABORTED&#160;&#160;&#160;(-13)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Connection aborted locally. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__soc__func.html" title="WiFi Socket Function return codes. ">WiFi Socket Function return codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga9df0d5bd422102d9d4ebddc869d358e0"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_EALREADY&#160;&#160;&#160;(-14)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Connection already in progress. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__soc__func.html" title="WiFi Socket Function return codes. ">WiFi Socket Function return codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga4fa475e41c3db0ada798249696e745a1"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_EADDRINUSE&#160;&#160;&#160;(-15)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Address in use. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__soc__func.html" title="WiFi Socket Function return codes. ">WiFi Socket Function return codes</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga4d5d38e9a7d5907a3de4165476640cd4"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_EHOSTNOTFOUND&#160;&#160;&#160;(-16)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Host not found. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__soc__func.html" title="WiFi Socket Function return codes. ">WiFi Socket Function return codes</a> </dd></dl>
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
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new file mode 100644
index 0000000..33ed2e4
--- /dev/null
+++ b/docs/Driver/html/group__wifi__soc__func.js
@@ -0,0 +1,19 @@
+var group__wifi__soc__func =
+[
+    [ "ARM_SOCKET_ERROR", "group__wifi__soc__func.html#ga2f3db9fdae2366238054ff8a8e8ef97c", null ],
+    [ "ARM_SOCKET_ESOCK", "group__wifi__soc__func.html#ga535e069b83aafcf70dd089e6097bceef", null ],
+    [ "ARM_SOCKET_EINVAL", "group__wifi__soc__func.html#ga695aa5c5329602d9465fbc6c22fc9978", null ],
+    [ "ARM_SOCKET_ENOTSUP", "group__wifi__soc__func.html#ga95ab80319bfbc5413fc5334e3d5ce5d2", null ],
+    [ "ARM_SOCKET_ENOMEM", "group__wifi__soc__func.html#ga68e88e80822f779361407d005659fc6c", null ],
+    [ "ARM_SOCKET_EAGAIN", "group__wifi__soc__func.html#ga699dbd55e543fd38d333cf1d4470d8db", null ],
+    [ "ARM_SOCKET_EINPROGRESS", "group__wifi__soc__func.html#gad7f3e077f7721a202012378ddcefb83f", null ],
+    [ "ARM_SOCKET_ETIMEDOUT", "group__wifi__soc__func.html#ga320ffeeb44d583c0216b24d6e1009d9f", null ],
+    [ "ARM_SOCKET_EISCONN", "group__wifi__soc__func.html#gaa1e456c6cea2f6579158818387557f1a", null ],
+    [ "ARM_SOCKET_ENOTCONN", "group__wifi__soc__func.html#ga0bde95e313d907032074583bc06b24a1", null ],
+    [ "ARM_SOCKET_ECONNREFUSED", "group__wifi__soc__func.html#gaaf535c9d325172ff8ef02964af218cb0", null ],
+    [ "ARM_SOCKET_ECONNRESET", "group__wifi__soc__func.html#ga87fa238861921ba1b272019a83b04676", null ],
+    [ "ARM_SOCKET_ECONNABORTED", "group__wifi__soc__func.html#ga7e64d6bd00a2f6e30ece3ff0f02b5b27", null ],
+    [ "ARM_SOCKET_EALREADY", "group__wifi__soc__func.html#ga9df0d5bd422102d9d4ebddc869d358e0", null ],
+    [ "ARM_SOCKET_EADDRINUSE", "group__wifi__soc__func.html#ga4fa475e41c3db0ada798249696e745a1", null ],
+    [ "ARM_SOCKET_EHOSTNOTFOUND", "group__wifi__soc__func.html#ga4d5d38e9a7d5907a3de4165476640cd4", null ]
+];
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+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>WiFi Socket Option definitions</title>
+<title>CMSIS-Driver: WiFi Socket Option definitions</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
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+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
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+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Driver
+   &#160;<span id="projectnumber">Version 2.7.1</span>
+   </div>
+   <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
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+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li><a href="modules.html"><span>Reference</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
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+       class="ui-resizable-handle">
+  </div>
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+<script type="text/javascript">
+$(document).ready(function(){initNavTree('group__wifi__soc__opt.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="summary">
+<a href="#define-members">Macros</a>  </div>
+  <div class="headertitle">
+<div class="title">WiFi Socket Option definitions<div class="ingroups"><a class="el" href="group__wifi__socket__gr.html">WiFi Socket</a></div></div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>WiFi Socket Option definitions.  
+<a href="#details">More...</a></p>
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
+Macros</h2></td></tr>
+<tr class="memitem:gac6fa12bbc640209a6b63f8cec282f961"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__opt.html#gac6fa12bbc640209a6b63f8cec282f961">ARM_SOCKET_IO_FIONBIO</a>&#160;&#160;&#160;1</td></tr>
+<tr class="memdesc:gac6fa12bbc640209a6b63f8cec282f961"><td class="mdescLeft">&#160;</td><td class="mdescRight">Non-blocking I/O (Set only, default = 0); opt_val = &amp;nbio, opt_len = sizeof(nbio), nbio (integer): 0=blocking, non-blocking otherwise.  <a href="#gac6fa12bbc640209a6b63f8cec282f961">More...</a><br/></td></tr>
+<tr class="separator:gac6fa12bbc640209a6b63f8cec282f961"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga6f76374467b5580ab0e440da1c39024e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__opt.html#ga6f76374467b5580ab0e440da1c39024e">ARM_SOCKET_SO_RCVTIMEO</a>&#160;&#160;&#160;2</td></tr>
+<tr class="memdesc:ga6f76374467b5580ab0e440da1c39024e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Receive timeout in ms (default = 0); opt_val = &amp;timeout, opt_len = sizeof(timeout)  <a href="#ga6f76374467b5580ab0e440da1c39024e">More...</a><br/></td></tr>
+<tr class="separator:ga6f76374467b5580ab0e440da1c39024e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad633987fb5b3478b54d3269b1b03497a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__opt.html#gad633987fb5b3478b54d3269b1b03497a">ARM_SOCKET_SO_SNDTIMEO</a>&#160;&#160;&#160;3</td></tr>
+<tr class="memdesc:gad633987fb5b3478b54d3269b1b03497a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Send timeout in ms (default = 0); opt_val = &amp;timeout, opt_len = sizeof(timeout)  <a href="#gad633987fb5b3478b54d3269b1b03497a">More...</a><br/></td></tr>
+<tr class="separator:gad633987fb5b3478b54d3269b1b03497a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga925f699a931ccbfb87eb5f3d36cbe405"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__opt.html#ga925f699a931ccbfb87eb5f3d36cbe405">ARM_SOCKET_SO_KEEPALIVE</a>&#160;&#160;&#160;4</td></tr>
+<tr class="memdesc:ga925f699a931ccbfb87eb5f3d36cbe405"><td class="mdescLeft">&#160;</td><td class="mdescRight">Keep-alive messages (default = 0); opt_val = &amp;keepalive, opt_len = sizeof(keepalive), keepalive (integer): 0=disabled, enabled otherwise.  <a href="#ga925f699a931ccbfb87eb5f3d36cbe405">More...</a><br/></td></tr>
+<tr class="separator:ga925f699a931ccbfb87eb5f3d36cbe405"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0466a14ce32b2cc28887735b632f3e63"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__opt.html#ga0466a14ce32b2cc28887735b632f3e63">ARM_SOCKET_SO_TYPE</a>&#160;&#160;&#160;5</td></tr>
+<tr class="memdesc:ga0466a14ce32b2cc28887735b632f3e63"><td class="mdescLeft">&#160;</td><td class="mdescRight">Socket Type (Get only); opt_val = &amp;socket_type, opt_len = sizeof(socket_type), socket_type (integer): ARM_SOCKET_SOCK_xxx.  <a href="#ga0466a14ce32b2cc28887735b632f3e63">More...</a><br/></td></tr>
+<tr class="separator:ga0466a14ce32b2cc28887735b632f3e63"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>WiFi Socket Option definitions. </p>
+<p>The WiFi Socket Option specifies the socket option for which the value is to be set or obtained. </p>
+<h2 class="groupheader">Macro Definition Documentation</h2>
+<a class="anchor" id="gac6fa12bbc640209a6b63f8cec282f961"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_IO_FIONBIO&#160;&#160;&#160;1</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Non-blocking I/O (Set only, default = 0); opt_val = &amp;nbio, opt_len = sizeof(nbio), nbio (integer): 0=blocking, non-blocking otherwise. </p>
+<p>Enables or disables the non-blocking mode for the WiFi socket. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__soc__opt.html" title="WiFi Socket Option definitions. ">WiFi Socket Option definitions</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga6f76374467b5580ab0e440da1c39024e"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_SO_RCVTIMEO&#160;&#160;&#160;2</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Receive timeout in ms (default = 0); opt_val = &amp;timeout, opt_len = sizeof(timeout) </p>
+<p>Specifies the time limit for receiving in blocking mode. The time limit is in milliseconds. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__soc__opt.html" title="WiFi Socket Option definitions. ">WiFi Socket Option definitions</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="gad633987fb5b3478b54d3269b1b03497a"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_SO_SNDTIMEO&#160;&#160;&#160;3</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Send timeout in ms (default = 0); opt_val = &amp;timeout, opt_len = sizeof(timeout) </p>
+<p>Specifies the time limit for sending in blocking mode. The time limit is in milliseconds. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__soc__opt.html" title="WiFi Socket Option definitions. ">WiFi Socket Option definitions</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga925f699a931ccbfb87eb5f3d36cbe405"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_SO_KEEPALIVE&#160;&#160;&#160;4</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Keep-alive messages (default = 0); opt_val = &amp;keepalive, opt_len = sizeof(keepalive), keepalive (integer): 0=disabled, enabled otherwise. </p>
+<p>Enables or disables the keep-alive mode for the stream socket. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__soc__opt.html" title="WiFi Socket Option definitions. ">WiFi Socket Option definitions</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga0466a14ce32b2cc28887735b632f3e63"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_SO_TYPE&#160;&#160;&#160;5</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Socket Type (Get only); opt_val = &amp;socket_type, opt_len = sizeof(socket_type), socket_type (integer): ARM_SOCKET_SOCK_xxx. </p>
+<p>Obtains the type of the Wifi socket. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__soc__opt.html" title="WiFi Socket Option definitions. ">WiFi Socket Option definitions</a> </dd></dl>
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
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new file mode 100644
index 0000000..e2d241e
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+++ b/docs/Driver/html/group__wifi__soc__opt.js
@@ -0,0 +1,8 @@
+var group__wifi__soc__opt =
+[
+    [ "ARM_SOCKET_IO_FIONBIO", "group__wifi__soc__opt.html#gac6fa12bbc640209a6b63f8cec282f961", null ],
+    [ "ARM_SOCKET_SO_RCVTIMEO", "group__wifi__soc__opt.html#ga6f76374467b5580ab0e440da1c39024e", null ],
+    [ "ARM_SOCKET_SO_SNDTIMEO", "group__wifi__soc__opt.html#gad633987fb5b3478b54d3269b1b03497a", null ],
+    [ "ARM_SOCKET_SO_KEEPALIVE", "group__wifi__soc__opt.html#ga925f699a931ccbfb87eb5f3d36cbe405", null ],
+    [ "ARM_SOCKET_SO_TYPE", "group__wifi__soc__opt.html#ga0466a14ce32b2cc28887735b632f3e63", null ]
+];
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diff --git a/docs/Driver/html/group__wifi__socket__gr.html b/docs/Driver/html/group__wifi__socket__gr.html
new file mode 100644
index 0000000..a24ba8a
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+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>WiFi Socket</title>
+<title>CMSIS-Driver: WiFi Socket</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
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+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Driver
+   &#160;<span id="projectnumber">Version 2.7.1</span>
+   </div>
+   <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
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+		//-->
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+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li><a href="modules.html"><span>Reference</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
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+          </span><span class="right">
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+<div id="side-nav" class="ui-resizable side-nav-resizable">
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+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('group__wifi__socket__gr.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="summary">
+<a href="#groups">Content</a> &#124;
+<a href="#func-members">Functions</a>  </div>
+  <div class="headertitle">
+<div class="title">WiFi Socket<div class="ingroups"><a class="el" href="group__wifi__interface__gr.html">WiFi Interface</a></div></div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>Socket interface to IP stack running on WiFi module.  
+<a href="#details">More...</a></p>
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="groups"></a>
+Content</h2></td></tr>
+<tr class="memitem:group__wifi__addr__family"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__addr__family.html">WiFi Socket Address Family definitions</a></td></tr>
+<tr class="memdesc:group__wifi__addr__family"><td class="mdescLeft">&#160;</td><td class="mdescRight">WiFi Socket Address Family definitions. <br/></td></tr>
+<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:group__wifi__socket__type"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__type.html">WiFi Socket Type definitions</a></td></tr>
+<tr class="memdesc:group__wifi__socket__type"><td class="mdescLeft">&#160;</td><td class="mdescRight">WiFi Socket Type definitions. <br/></td></tr>
+<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:group__wifi__protocol"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__protocol.html">WiFi Socket Protocol definitions</a></td></tr>
+<tr class="memdesc:group__wifi__protocol"><td class="mdescLeft">&#160;</td><td class="mdescRight">WiFi Socket Protocol definitions. <br/></td></tr>
+<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:group__wifi__soc__opt"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__opt.html">WiFi Socket Option definitions</a></td></tr>
+<tr class="memdesc:group__wifi__soc__opt"><td class="mdescLeft">&#160;</td><td class="mdescRight">WiFi Socket Option definitions. <br/></td></tr>
+<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:group__wifi__soc__func"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__soc__func.html">WiFi Socket Function return codes</a></td></tr>
+<tr class="memdesc:group__wifi__soc__func"><td class="mdescLeft">&#160;</td><td class="mdescRight">WiFi Socket Function return codes. <br/></td></tr>
+<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table><table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
+Functions</h2></td></tr>
+<tr class="memitem:ga1433b297315ab394f1544a18548ffcc6"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#ga1433b297315ab394f1544a18548ffcc6">ARM_WIFI_SocketCreate</a> (int32_t af, int32_t type, int32_t protocol)</td></tr>
+<tr class="memdesc:ga1433b297315ab394f1544a18548ffcc6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Create a communication socket.  <a href="#ga1433b297315ab394f1544a18548ffcc6">More...</a><br/></td></tr>
+<tr class="separator:ga1433b297315ab394f1544a18548ffcc6"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae69f7822b658765f1cd3f74e9a50c246"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#gae69f7822b658765f1cd3f74e9a50c246">ARM_WIFI_SocketBind</a> (int32_t socket, const uint8_t *ip, uint32_t ip_len, uint16_t port)</td></tr>
+<tr class="memdesc:gae69f7822b658765f1cd3f74e9a50c246"><td class="mdescLeft">&#160;</td><td class="mdescRight">Assign a local address to a socket.  <a href="#gae69f7822b658765f1cd3f74e9a50c246">More...</a><br/></td></tr>
+<tr class="separator:gae69f7822b658765f1cd3f74e9a50c246"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga4929aab257781dcaae7197f917991779"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#ga4929aab257781dcaae7197f917991779">ARM_WIFI_SocketListen</a> (int32_t socket, int32_t backlog)</td></tr>
+<tr class="memdesc:ga4929aab257781dcaae7197f917991779"><td class="mdescLeft">&#160;</td><td class="mdescRight">Listen for socket connections.  <a href="#ga4929aab257781dcaae7197f917991779">More...</a><br/></td></tr>
+<tr class="separator:ga4929aab257781dcaae7197f917991779"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga24e6a015e519373c3f108cc5aa764ef8"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#ga24e6a015e519373c3f108cc5aa764ef8">ARM_WIFI_SocketAccept</a> (int32_t socket, uint8_t *ip, uint32_t *ip_len, uint16_t *port)</td></tr>
+<tr class="memdesc:ga24e6a015e519373c3f108cc5aa764ef8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Accept a new connection on a socket.  <a href="#ga24e6a015e519373c3f108cc5aa764ef8">More...</a><br/></td></tr>
+<tr class="separator:ga24e6a015e519373c3f108cc5aa764ef8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac0f189afbd35914d4c85e77b40672b16"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#gac0f189afbd35914d4c85e77b40672b16">ARM_WIFI_SocketConnect</a> (int32_t socket, const uint8_t *ip, uint32_t ip_len, uint16_t port)</td></tr>
+<tr class="memdesc:gac0f189afbd35914d4c85e77b40672b16"><td class="mdescLeft">&#160;</td><td class="mdescRight">Connect a socket to a remote host.  <a href="#gac0f189afbd35914d4c85e77b40672b16">More...</a><br/></td></tr>
+<tr class="separator:gac0f189afbd35914d4c85e77b40672b16"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaecc9ba19491ed00c27da3f5677895d48"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#gaecc9ba19491ed00c27da3f5677895d48">ARM_WIFI_SocketRecv</a> (int32_t socket, void *buf, uint32_t len)</td></tr>
+<tr class="memdesc:gaecc9ba19491ed00c27da3f5677895d48"><td class="mdescLeft">&#160;</td><td class="mdescRight">Receive data on a connected socket.  <a href="#gaecc9ba19491ed00c27da3f5677895d48">More...</a><br/></td></tr>
+<tr class="separator:gaecc9ba19491ed00c27da3f5677895d48"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga2b15232d69f2ae8e189512d6c68c8a81"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#ga2b15232d69f2ae8e189512d6c68c8a81">ARM_WIFI_SocketRecvFrom</a> (int32_t socket, void *buf, uint32_t len, uint8_t *ip, uint32_t *ip_len, uint16_t *port)</td></tr>
+<tr class="memdesc:ga2b15232d69f2ae8e189512d6c68c8a81"><td class="mdescLeft">&#160;</td><td class="mdescRight">Receive data on a socket.  <a href="#ga2b15232d69f2ae8e189512d6c68c8a81">More...</a><br/></td></tr>
+<tr class="separator:ga2b15232d69f2ae8e189512d6c68c8a81"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaee8615b026e8525fb21ca45ba3778ac8"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#gaee8615b026e8525fb21ca45ba3778ac8">ARM_WIFI_SocketSend</a> (int32_t socket, const void *buf, uint32_t len)</td></tr>
+<tr class="memdesc:gaee8615b026e8525fb21ca45ba3778ac8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Send data on a connected socket.  <a href="#gaee8615b026e8525fb21ca45ba3778ac8">More...</a><br/></td></tr>
+<tr class="separator:gaee8615b026e8525fb21ca45ba3778ac8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5ddd3dd5f863b8392e4281dd48a28d28"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#ga5ddd3dd5f863b8392e4281dd48a28d28">ARM_WIFI_SocketSendTo</a> (int32_t socket, const void *buf, uint32_t len, const uint8_t *ip, uint32_t ip_len, uint16_t port)</td></tr>
+<tr class="memdesc:ga5ddd3dd5f863b8392e4281dd48a28d28"><td class="mdescLeft">&#160;</td><td class="mdescRight">Send data on a socket.  <a href="#ga5ddd3dd5f863b8392e4281dd48a28d28">More...</a><br/></td></tr>
+<tr class="separator:ga5ddd3dd5f863b8392e4281dd48a28d28"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac187e418893de33817e4fcbdd85dbaee"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#gac187e418893de33817e4fcbdd85dbaee">ARM_WIFI_SocketGetSockName</a> (int32_t socket, uint8_t *ip, uint32_t *ip_len, uint16_t *port)</td></tr>
+<tr class="memdesc:gac187e418893de33817e4fcbdd85dbaee"><td class="mdescLeft">&#160;</td><td class="mdescRight">Retrieve local IP address and port of a socket.  <a href="#gac187e418893de33817e4fcbdd85dbaee">More...</a><br/></td></tr>
+<tr class="separator:gac187e418893de33817e4fcbdd85dbaee"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaa484a931d55d163477920bc865dd9220"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#gaa484a931d55d163477920bc865dd9220">ARM_WIFI_SocketGetPeerName</a> (int32_t socket, uint8_t *ip, uint32_t *ip_len, uint16_t *port)</td></tr>
+<tr class="memdesc:gaa484a931d55d163477920bc865dd9220"><td class="mdescLeft">&#160;</td><td class="mdescRight">Retrieve remote IP address and port of a socket.  <a href="#gaa484a931d55d163477920bc865dd9220">More...</a><br/></td></tr>
+<tr class="separator:gaa484a931d55d163477920bc865dd9220"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga6d69360e9774937b7bdc03b45fbc9075"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#ga6d69360e9774937b7bdc03b45fbc9075">ARM_WIFI_SocketGetOpt</a> (int32_t socket, int32_t opt_id, void *opt_val, uint32_t *opt_len)</td></tr>
+<tr class="memdesc:ga6d69360e9774937b7bdc03b45fbc9075"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get socket option.  <a href="#ga6d69360e9774937b7bdc03b45fbc9075">More...</a><br/></td></tr>
+<tr class="separator:ga6d69360e9774937b7bdc03b45fbc9075"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5de80d6729d9504a21dd5d31dc504017"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#ga5de80d6729d9504a21dd5d31dc504017">ARM_WIFI_SocketSetOpt</a> (int32_t socket, int32_t opt_id, const void *opt_val, uint32_t opt_len)</td></tr>
+<tr class="memdesc:ga5de80d6729d9504a21dd5d31dc504017"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set socket option.  <a href="#ga5de80d6729d9504a21dd5d31dc504017">More...</a><br/></td></tr>
+<tr class="separator:ga5de80d6729d9504a21dd5d31dc504017"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga391464de71b6a5d300fda9434fe87a87"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#ga391464de71b6a5d300fda9434fe87a87">ARM_WIFI_SocketClose</a> (int32_t socket)</td></tr>
+<tr class="memdesc:ga391464de71b6a5d300fda9434fe87a87"><td class="mdescLeft">&#160;</td><td class="mdescRight">Close and release a socket.  <a href="#ga391464de71b6a5d300fda9434fe87a87">More...</a><br/></td></tr>
+<tr class="separator:ga391464de71b6a5d300fda9434fe87a87"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga0c37435c6abc68ee0f1f4357b503e0bf"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#ga0c37435c6abc68ee0f1f4357b503e0bf">ARM_WIFI_SocketGetHostByName</a> (const char *name, int32_t af, uint8_t *ip, uint32_t *ip_len)</td></tr>
+<tr class="memdesc:ga0c37435c6abc68ee0f1f4357b503e0bf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Retrieve host IP address from host name.  <a href="#ga0c37435c6abc68ee0f1f4357b503e0bf">More...</a><br/></td></tr>
+<tr class="separator:ga0c37435c6abc68ee0f1f4357b503e0bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac7a8abb9e23f3f52dabce4153a53c1ca"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__gr.html#gac7a8abb9e23f3f52dabce4153a53c1ca">ARM_WIFI_Ping</a> (const uint8_t *ip, uint32_t ip_len)</td></tr>
+<tr class="memdesc:gac7a8abb9e23f3f52dabce4153a53c1ca"><td class="mdescLeft">&#160;</td><td class="mdescRight">Probe remote host with Ping command.  <a href="#gac7a8abb9e23f3f52dabce4153a53c1ca">More...</a><br/></td></tr>
+<tr class="separator:gac7a8abb9e23f3f52dabce4153a53c1ca"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>Socket interface to IP stack running on WiFi module. </p>
+<p>The <a class="el" href="group__wifi__socket__gr.html">WiFi Socket</a> functions provide the interface to an IP stack that is running on the WiFi module. This IP stack handles data communication with the network and provides the user with a communication endpoint called sockets. </p>
+<h2 class="groupheader">Function Documentation</h2>
+<a class="anchor" id="ga1433b297315ab394f1544a18548ffcc6"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_SocketCreate </td>
+          <td>(</td>
+          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramname"><em>af</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramname"><em>type</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramname"><em>protocol</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Create a communication socket. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">af</td><td>Address family </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">type</td><td>Socket type </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">protocol</td><td>Socket protocol </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>status information<ul>
+<li>Socket identification number (&gt;=0)</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga695aa5c5329602d9465fbc6c22fc9978">ARM_SOCKET_EINVAL</a> : Invalid argument</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga95ab80319bfbc5413fc5334e3d5ce5d2">ARM_SOCKET_ENOTSUP</a> : Operation not supported</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga68e88e80822f779361407d005659fc6c">ARM_SOCKET_ENOMEM</a> : Not enough memory</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga2f3db9fdae2366238054ff8a8e8ef97c">ARM_SOCKET_ERROR</a> : Unspecified error</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_SocketCreate</b> creates a communication endpoint called a socket.</p>
+<p>The argument <em>af</em> specifies the address family. The following values are supported: </p>
+<table class="doxtable">
+<tr>
+<th align="left">Family </th><th align="left">Description  </th></tr>
+<tr>
+<td align="left"><a class="el" href="group__wifi__addr__family.html#ga1a17023d92374b4f2d963aa7ac1c4e17">ARM_SOCKET_AF_INET</a> </td><td align="left">Address Family Internet </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__wifi__addr__family.html#gad50c95421ffbc6eec5f8458b2e170c26">ARM_SOCKET_AF_INET6</a> </td><td align="left">Address Family Internet version 6 </td></tr>
+</table>
+<p>The argument <em>type</em> specifies the communication semantics. The following are the currently supported types: </p>
+<table class="doxtable">
+<tr>
+<th align="left">Type </th><th align="left">Description  </th></tr>
+<tr>
+<td align="left"><a class="el" href="group__wifi__socket__type.html#ga9567d5735856190b2ae9cc39f68637f1">ARM_SOCKET_SOCK_STREAM</a> </td><td align="left">Provides a reliable connection based data stream that is full-duplex </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__wifi__socket__type.html#gaced5f33eda2fc38a8303cd11a0d76fab">ARM_SOCKET_SOCK_DGRAM</a> </td><td align="left">Provides connectionless communication that is unreliable </td></tr>
+</table>
+<p>The argument <em>protocol</em> specifies the protocol that must be used with the socket type: </p>
+<table class="doxtable">
+<tr>
+<th align="left">Protocol </th><th align="left">Description  </th></tr>
+<tr>
+<td align="left"><a class="el" href="group__wifi__protocol.html#gaf07cfcf1b65ea6c6be0629459a2ba781">ARM_SOCKET_IPPROTO_TCP</a> </td><td align="left">Must be used with ARM_SOCKET_SOCK_STREAM socket type </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__wifi__protocol.html#gabacbead83c772f5737b25b4fc390e16d">ARM_SOCKET_IPPROTO_UDP</a> </td><td align="left">Must be used with ARM_SOCKET_SOCK_DGRAM socket type </td></tr>
+</table>
+<p><b>Example:</b> </p>
+<ul>
+<li>see <a class="el" href="group__wifi__socket__gr.html#ga4929aab257781dcaae7197f917991779">ARM_WIFI_SocketListen</a>, <a class="el" href="group__wifi__socket__gr.html#gac0f189afbd35914d4c85e77b40672b16">ARM_WIFI_SocketConnect</a> </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="gae69f7822b658765f1cd3f74e9a50c246"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_SocketBind </td>
+          <td>(</td>
+          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramname"><em>socket</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint8_t *&#160;</td>
+          <td class="paramname"><em>ip</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>ip_len</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint16_t&#160;</td>
+          <td class="paramname"><em>port</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Assign a local address to a socket. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">socket</td><td>Socket identification number </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ip</td><td>Pointer to local IP address </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ip_len</td><td>Length of 'ip' address in bytes </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">port</td><td>Local port number </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>status information<ul>
+<li>0 : Operation successful</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga535e069b83aafcf70dd089e6097bceef">ARM_SOCKET_ESOCK</a> : Invalid socket</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga695aa5c5329602d9465fbc6c22fc9978">ARM_SOCKET_EINVAL</a> : Invalid argument (address or socket already bound)</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga4fa475e41c3db0ada798249696e745a1">ARM_SOCKET_EADDRINUSE</a> : Address already in use</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga2f3db9fdae2366238054ff8a8e8ef97c">ARM_SOCKET_ERROR</a> : Unspecified error</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_SocketBind</b> assigns a name to an unnamed socket. The name represents the local address and port of the communication endpoint.</p>
+<p>The argument <em>socket</em> specifies a socket identification number returned from a previous call to <a class="el" href="group__wifi__socket__gr.html#ga1433b297315ab394f1544a18548ffcc6">ARM_WIFI_SocketCreate</a>.</p>
+<p>The argument <em>ip</em> is a pointer to the buffer containing the IP address octets of the local IP address.</p>
+<p>The argument <em>ip_len</em> specifies the length of the local IP address. The length is <span class="XML-Token">4</span> bytes for the IPv4 address and <span class="XML-Token">16</span> bytes for the IPv6 address.</p>
+<p>The argument <em>port</em> specifies the local port. If the argument <em>port</em> is <span class="XML-Token">0</span>, the function returns error, because this port is reserved.</p>
+<p><b>Example:</b> </p>
+<ul>
+<li>see <a class="el" href="group__wifi__socket__gr.html#ga4929aab257781dcaae7197f917991779">ARM_WIFI_SocketListen</a> </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="ga4929aab257781dcaae7197f917991779"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_SocketListen </td>
+          <td>(</td>
+          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramname"><em>socket</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramname"><em>backlog</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Listen for socket connections. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">socket</td><td>Socket identification number </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">backlog</td><td>Number of connection requests that can be queued </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>status information<ul>
+<li>0 : Operation successful</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga535e069b83aafcf70dd089e6097bceef">ARM_SOCKET_ESOCK</a> : Invalid socket</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga695aa5c5329602d9465fbc6c22fc9978">ARM_SOCKET_EINVAL</a> : Invalid argument (socket not bound)</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga95ab80319bfbc5413fc5334e3d5ce5d2">ARM_SOCKET_ENOTSUP</a> : Operation not supported</li>
+<li><a class="el" href="group__wifi__soc__func.html#gaa1e456c6cea2f6579158818387557f1a">ARM_SOCKET_EISCONN</a> : Socket is already connected</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga2f3db9fdae2366238054ff8a8e8ef97c">ARM_SOCKET_ERROR</a> : Unspecified error</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_SocketListen</b> sets the specified socket to listening mode, that is to the server mode of operation. Before calling the <b>ARM_WIFI_SocketListen</b> function, the <a class="el" href="group__wifi__socket__gr.html#gae69f7822b658765f1cd3f74e9a50c246">ARM_WIFI_SocketBind</a> function must be called.</p>
+<p>The argument <em>socket</em> specifies a socket identification number returned from a previous call to <a class="el" href="group__wifi__socket__gr.html#ga1433b297315ab394f1544a18548ffcc6">ARM_WIFI_SocketCreate</a>.</p>
+<p>The argument <em>backlog</em> specifies a maximum number of connection requests that can be queued.</p>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line"><span class="keyword">extern</span> <a class="code" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a> Driver_WiFi0;</div>
+<div class="line"><span class="keyword">static</span> <a class="code" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a> *wifi;</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> Echo_Server_Thread (<span class="keywordtype">void</span> *arg) {</div>
+<div class="line">  uint8_t ip[4] = { 0U, 0U, 0U, 0U };</div>
+<div class="line">  int32_t sock, sd, res;</div>
+<div class="line">  <span class="keywordtype">char</span> dbuf[120];</div>
+<div class="line"> </div>
+<div class="line">  <span class="keywordflow">while</span> (1) {</div>
+<div class="line">    wifi = &amp;Driver_WiFi0;</div>
+<div class="line">    sock = wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#aa26f0cefe99161484741977a5443e92c">SocketCreate</a> (<a class="code" href="group__wifi__addr__family.html#ga1a17023d92374b4f2d963aa7ac1c4e17">ARM_SOCKET_AF_INET</a>, <a class="code" href="group__wifi__socket__type.html#ga9567d5735856190b2ae9cc39f68637f1">ARM_SOCKET_SOCK_STREAM</a>, <a class="code" href="group__wifi__protocol.html#gaf07cfcf1b65ea6c6be0629459a2ba781">ARM_SOCKET_IPPROTO_TCP</a>);</div>
+<div class="line"> </div>
+<div class="line">    wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#afcbc0c2bb3639584521ffeaaffc5a475">SocketBind</a> (sock, (uint8_t *)ip, <span class="keyword">sizeof</span>(ip), 7U);</div>
+<div class="line">    wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a628706c754e1793ec864453a5b517d5c">SocketListen</a> (sock, 1);</div>
+<div class="line">    sd = wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a66bb43c1e713efe7758b6e100c13ed69">SocketAccept</a> (sock, NULL, NULL, NULL);</div>
+<div class="line">    wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a471a1be6d9adbccb83ca1f268643031c">SocketClose</a> (sock);</div>
+<div class="line">    sock = sd;</div>
+<div class="line"> </div>
+<div class="line">    <span class="keywordflow">while</span> (1) {</div>
+<div class="line">      res = wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#aaad6683992e76e3dd9a16eb6b7d43cf4">SocketRecv</a> (sock, dbuf, <span class="keyword">sizeof</span>(dbuf));</div>
+<div class="line">      <span class="keywordflow">if</span> (res &lt; 0) {</div>
+<div class="line">        <span class="keywordflow">break</span>;                                      <span class="comment">// Error occurred</span></div>
+<div class="line">      }</div>
+<div class="line">      <span class="keywordflow">if</span> (res &gt; 0) {</div>
+<div class="line">        wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a7ff47d391831d547d310dd66f22c2942">SocketSend</a> (sock, dbuf, res);         <span class="comment">// Echo the data</span></div>
+<div class="line">      }    </div>
+<div class="line">    }</div>
+<div class="line">    wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a471a1be6d9adbccb83ca1f268643031c">SocketClose</a> (sock);</div>
+<div class="line">  }</div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="ga24e6a015e519373c3f108cc5aa764ef8"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_SocketAccept </td>
+          <td>(</td>
+          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramname"><em>socket</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint8_t *&#160;</td>
+          <td class="paramname"><em>ip</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t *&#160;</td>
+          <td class="paramname"><em>ip_len</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint16_t *&#160;</td>
+          <td class="paramname"><em>port</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Accept a new connection on a socket. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">socket</td><td>Socket identification number </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">ip</td><td>Pointer to buffer where address of connecting socket shall be returned (NULL for none) </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">ip_len</td><td>Pointer to length of 'ip' (or NULL if 'ip' is NULL)<ul>
+<li>length of supplied 'ip' on input</li>
+<li>length of stored 'ip' on output </li>
+</ul>
+</td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">port</td><td>Pointer to buffer where port of connecting socket shall be returned (NULL for none) </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>status information<ul>
+<li>socket identification number of accepted socket (&gt;=0)</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga535e069b83aafcf70dd089e6097bceef">ARM_SOCKET_ESOCK</a> : Invalid socket</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga695aa5c5329602d9465fbc6c22fc9978">ARM_SOCKET_EINVAL</a> : Invalid argument (socket not in listen mode)</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga95ab80319bfbc5413fc5334e3d5ce5d2">ARM_SOCKET_ENOTSUP</a> : Operation not supported (socket type does not support accepting connections)</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga87fa238861921ba1b272019a83b04676">ARM_SOCKET_ECONNRESET</a> : Connection reset by the peer</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga7e64d6bd00a2f6e30ece3ff0f02b5b27">ARM_SOCKET_ECONNABORTED</a> : Connection aborted locally</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga699dbd55e543fd38d333cf1d4470d8db">ARM_SOCKET_EAGAIN</a> : Operation would block or timed out (may be called again)</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga2f3db9fdae2366238054ff8a8e8ef97c">ARM_SOCKET_ERROR</a> : Unspecified error</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_SocketAccept</b> accepts a connection request queued for a listening socket. If a connection request is pending, <b>ARM_WIFI_SocketAccept</b> removes the request from the queue, and creates a new socket for the connection. The original listening socket remains open and continues to queue new connection requests. The <em>socket</em> must be a socket of type <b>ARM_SOCKET_SOCK_STREAM</b>.</p>
+<p>In blocking mode, which is enabled by default, this function waits for a connection request. In non blocking mode, you must call the <b>ARM_WIFI_SocketAccept</b> function again if the error code <code>ARM_SOCKET_EAGAIN</code> is returned.</p>
+<p>The argument <em>socket</em> specifies a socket identification number returned from a previous call to <a class="el" href="group__wifi__socket__gr.html#ga1433b297315ab394f1544a18548ffcc6">ARM_WIFI_SocketCreate</a>.</p>
+<p>The argument <em>ip</em> is a pointer to the buffer that will receive the IP address of the connection node. If the <em>ip</em> is <span class="XML-Token">NULL</span>, the IP address is not returned.</p>
+<p>The argument <em>ip_len</em> is a pointer to the IP address length. It should initially contain the amount of space pointed to by <em>ip</em>. On return it contains the actual length of the address returned in bytes.</p>
+<p>The argument <em>port</em> is a pointer to the buffer, that will receive the port number of the connection node. If the <em>port</em> is <span class="XML-Token">NULL</span>, the port number is not returned.</p>
+<p><b>Example:</b> </p>
+<ul>
+<li>see <a class="el" href="group__wifi__socket__gr.html#ga4929aab257781dcaae7197f917991779">ARM_WIFI_SocketListen</a> </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="gac0f189afbd35914d4c85e77b40672b16"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_SocketConnect </td>
+          <td>(</td>
+          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramname"><em>socket</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint8_t *&#160;</td>
+          <td class="paramname"><em>ip</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>ip_len</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint16_t&#160;</td>
+          <td class="paramname"><em>port</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Connect a socket to a remote host. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">socket</td><td>Socket identification number </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ip</td><td>Pointer to remote IP address </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ip_len</td><td>Length of 'ip' address in bytes </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">port</td><td>Remote port number </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>status information<ul>
+<li>0 : Operation successful</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga535e069b83aafcf70dd089e6097bceef">ARM_SOCKET_ESOCK</a> : Invalid socket</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga695aa5c5329602d9465fbc6c22fc9978">ARM_SOCKET_EINVAL</a> : Invalid argument</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga9df0d5bd422102d9d4ebddc869d358e0">ARM_SOCKET_EALREADY</a> : Connection already in progress</li>
+<li><a class="el" href="group__wifi__soc__func.html#gad7f3e077f7721a202012378ddcefb83f">ARM_SOCKET_EINPROGRESS</a> : Operation in progress</li>
+<li><a class="el" href="group__wifi__soc__func.html#gaa1e456c6cea2f6579158818387557f1a">ARM_SOCKET_EISCONN</a> : Socket is connected</li>
+<li><a class="el" href="group__wifi__soc__func.html#gaaf535c9d325172ff8ef02964af218cb0">ARM_SOCKET_ECONNREFUSED</a> : Connection rejected by the peer</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga7e64d6bd00a2f6e30ece3ff0f02b5b27">ARM_SOCKET_ECONNABORTED</a> : Connection aborted locally</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga4fa475e41c3db0ada798249696e745a1">ARM_SOCKET_EADDRINUSE</a> : Address already in use</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga320ffeeb44d583c0216b24d6e1009d9f">ARM_SOCKET_ETIMEDOUT</a> : Operation timed out</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga2f3db9fdae2366238054ff8a8e8ef97c">ARM_SOCKET_ERROR</a> : Unspecified error</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_SocketConnect</b> assigns the address of the peer communication endpoint. The function behaves differently according to the type of socket:</p>
+<ul>
+<li><p class="startli"><b>ARM_SOCKET_SOCK_STREAM:</b> A connection is established between the endpoints.</p>
+<p class="startli">In blocking mode, which is enabled by default, this function waits for a connection to be established.</p>
+<p class="startli">In non blocking mode, the function returns the error code <code>ARM_SOCKET_EINPROGRESS</code> and the connection is established asynchronously. Subsequent calls to <b>ARM_WIFI_SocketConnect</b> for the same socket, before the connection is established, return the error code <code>ARM_SOCKET_EALREADY</code>. When the connection is established, the call to <b>ARM_WIFI_SocketConnect</b> returns the error code <code>ARM_SOCKET_EISCONN</code>.</p>
+</li>
+<li><p class="startli"><b>ARM_SOCKET_SOCK_DGRAM:</b> An address filter is established between the endpoints.</p>
+<p class="startli">The address filter is changed with another <b>ARM_WIFI_SocketConnect</b> function call. If the socket is not yet bound, the system implicitly binds to a random dynamic port.</p>
+</li>
+</ul>
+<p>The argument <em>socket</em> specifies a socket identification number returned from a previous call to <a class="el" href="group__wifi__socket__gr.html#ga1433b297315ab394f1544a18548ffcc6">ARM_WIFI_SocketCreate</a>.</p>
+<p>The argument <em>ip</em> is a pointer to the buffer containing the IP address octets of the endpoint node.</p>
+<p>The argument <em>ip_len</em> specifies the length of the IP address. The length is <span class="XML-Token">4</span> bytes for the IPv4 address and <span class="XML-Token">16</span> bytes for the IPv6 address.</p>
+<p>The argument <em>port</em> specifies the port of the endpoint node. If the argument <em>port</em> is <span class="XML-Token">0</span>, the function returns error, because this port is reserved.</p>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line"><span class="keyword">extern</span> <a class="code" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a> Driver_WiFi0;</div>
+<div class="line"><span class="keyword">static</span> <a class="code" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a> *wifi;</div>
+<div class="line"> </div>
+<div class="line"><span class="keyword">static</span> <span class="keyword">const</span> <span class="keywordtype">char</span> message[] = { <span class="stringliteral">&quot;The quick brown fox jumps over the lazy dog.&quot;</span> };</div>
+<div class="line">  </div>
+<div class="line"><span class="keywordtype">void</span> Echo_Client_Thread (<span class="keywordtype">void</span> *arg) {</div>
+<div class="line">  uint8_t ip[4] = { 192U, 168U, 0U, 100U };</div>
+<div class="line">  int32_t sock, res;</div>
+<div class="line">  <span class="keywordtype">char</span> dbuf[120];</div>
+<div class="line"> </div>
+<div class="line">  <span class="keywordflow">while</span> (1) {</div>
+<div class="line">    wifi = &amp;Driver_WiFi0;</div>
+<div class="line">    sock = wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#aa26f0cefe99161484741977a5443e92c">SocketCreate</a> (<a class="code" href="group__wifi__addr__family.html#ga1a17023d92374b4f2d963aa7ac1c4e17">ARM_SOCKET_AF_INET</a>, <a class="code" href="group__wifi__socket__type.html#ga9567d5735856190b2ae9cc39f68637f1">ARM_SOCKET_SOCK_STREAM</a>, <a class="code" href="group__wifi__protocol.html#gaf07cfcf1b65ea6c6be0629459a2ba781">ARM_SOCKET_IPPROTO_TCP</a>);</div>
+<div class="line"> </div>
+<div class="line">    res = wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a45cbca28d9866f2ec2ad9df830787dd7">SocketConnect</a> (sock, (uint8_t *)ip, <span class="keyword">sizeof</span>(ip), 7U);</div>
+<div class="line">    <span class="keywordflow">if</span> (res == 0) {</div>
+<div class="line">      wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a7ff47d391831d547d310dd66f22c2942">SocketSend</a> (sock, message, <span class="keyword">sizeof</span>(message));</div>
+<div class="line">      res = wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#aaad6683992e76e3dd9a16eb6b7d43cf4">SocketRecv</a> (sock, dbuf, <span class="keyword">sizeof</span>(dbuf));</div>
+<div class="line">      <span class="keywordflow">if</span> (res &lt; 0) {</div>
+<div class="line">        <span class="keywordflow">break</span>;               <span class="comment">// Error occured</span></div>
+<div class="line">      }</div>
+<div class="line">      <span class="keywordflow">if</span> (res &gt; 0) {</div>
+<div class="line">        <span class="keywordflow">if</span> (memcmp (dbuf, message, res) != 0) {</div>
+<div class="line">          <span class="comment">// error handling, message is not the same as sent</span></div>
+<div class="line">        }</div>
+<div class="line">      }    </div>
+<div class="line">    }</div>
+<div class="line">    wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a471a1be6d9adbccb83ca1f268643031c">SocketClose</a> (sock);</div>
+<div class="line">    osDelay (1000U);</div>
+<div class="line">  }</div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="gaecc9ba19491ed00c27da3f5677895d48"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_SocketRecv </td>
+          <td>(</td>
+          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramname"><em>socket</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">void *&#160;</td>
+          <td class="paramname"><em>buf</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>len</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Receive data on a connected socket. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">socket</td><td>Socket identification number </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">buf</td><td>Pointer to buffer where data should be stored </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">len</td><td>Length of buffer (in bytes) </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>status information<ul>
+<li>number of bytes received (&gt;0)</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga535e069b83aafcf70dd089e6097bceef">ARM_SOCKET_ESOCK</a> : Invalid socket</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga695aa5c5329602d9465fbc6c22fc9978">ARM_SOCKET_EINVAL</a> : Invalid argument (pointer to buffer or length)</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga0bde95e313d907032074583bc06b24a1">ARM_SOCKET_ENOTCONN</a> : Socket is not connected</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga87fa238861921ba1b272019a83b04676">ARM_SOCKET_ECONNRESET</a> : Connection reset by the peer</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga7e64d6bd00a2f6e30ece3ff0f02b5b27">ARM_SOCKET_ECONNABORTED</a> : Connection aborted locally</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga699dbd55e543fd38d333cf1d4470d8db">ARM_SOCKET_EAGAIN</a> : Operation would block or timed out (may be called again)</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga2f3db9fdae2366238054ff8a8e8ef97c">ARM_SOCKET_ERROR</a> : Unspecified error</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_SocketRecv</b> receives incoming data that has been queued for the socket. You can use this function with both, the stream and the datagram socket. It reads as much information as currently available up to the size of the buffer specified.</p>
+<p>In blocking mode, which is enabled by default, this function waits for received data. In non blocking mode, you must call the <b>ARM_WIFI_SocketRecv</b> function again if the error code <code>ARM_SOCKET_EAGAIN</code> is returned.</p>
+<p>The argument <em>socket</em> specifies a socket identification number returned from a previous call to <a class="el" href="group__wifi__socket__gr.html#ga1433b297315ab394f1544a18548ffcc6">ARM_WIFI_SocketCreate</a>.</p>
+<p>The argument <em>buf</em> is a pointer to the application data buffer for storing the data to. If the available data is too large to fit in the supplied application buffer <em>buf</em>, excess bytes are discarded in case of a datagram sockets. For stream sockets, the data is buffered internally so the application can retrieve all data by multiple calls of <b>ARM_WIFI_SocketRecv</b> function.</p>
+<p>The argument <em>len</em> specifies the size of the application data buffer.</p>
+<p><b>Example:</b> </p>
+<ul>
+<li>see <a class="el" href="group__wifi__socket__gr.html#ga4929aab257781dcaae7197f917991779">ARM_WIFI_SocketListen</a> </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="ga2b15232d69f2ae8e189512d6c68c8a81"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_SocketRecvFrom </td>
+          <td>(</td>
+          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramname"><em>socket</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">void *&#160;</td>
+          <td class="paramname"><em>buf</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>len</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint8_t *&#160;</td>
+          <td class="paramname"><em>ip</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t *&#160;</td>
+          <td class="paramname"><em>ip_len</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint16_t *&#160;</td>
+          <td class="paramname"><em>port</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Receive data on a socket. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">socket</td><td>Socket identification number </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">buf</td><td>Pointer to buffer where data should be stored </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">len</td><td>Length of buffer (in bytes) </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">ip</td><td>Pointer to buffer where remote source address shall be returned (NULL for none) </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">ip_len</td><td>Pointer to length of 'ip' (or NULL if 'ip' is NULL)<ul>
+<li>length of supplied 'ip' on input</li>
+<li>length of stored 'ip' on output </li>
+</ul>
+</td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">port</td><td>Pointer to buffer where remote source port shall be returned (NULL for none) </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>status information<ul>
+<li>number of bytes received (&gt;0)</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga535e069b83aafcf70dd089e6097bceef">ARM_SOCKET_ESOCK</a> : Invalid socket</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga695aa5c5329602d9465fbc6c22fc9978">ARM_SOCKET_EINVAL</a> : Invalid argument (pointer to buffer or length)</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga0bde95e313d907032074583bc06b24a1">ARM_SOCKET_ENOTCONN</a> : Socket is not connected</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga87fa238861921ba1b272019a83b04676">ARM_SOCKET_ECONNRESET</a> : Connection reset by the peer</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga7e64d6bd00a2f6e30ece3ff0f02b5b27">ARM_SOCKET_ECONNABORTED</a> : Connection aborted locally</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga699dbd55e543fd38d333cf1d4470d8db">ARM_SOCKET_EAGAIN</a> : Operation would block or timed out (may be called again)</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga2f3db9fdae2366238054ff8a8e8ef97c">ARM_SOCKET_ERROR</a> : Unspecified error</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_SocketRecvFrom</b> is used to receive data that has been queued for a socket. It is normally used to receive messages on datagram sockets, but can also be used to receive a reliable, ordered stream of data on a connected stream sockets. It reads as much information as currently available up to the size of the buffer specified.</p>
+<p>In blocking mode, which is enabled by default, this function waits for received data. In non blocking mode, you must call the <b>ARM_WIFI_SocketRecv</b> function again if the error code <code>ARM_SOCKET_EAGAIN</code> is returned.</p>
+<p>The argument <em>socket</em> specifies a socket identification number returned from a previous call to <a class="el" href="group__wifi__socket__gr.html#ga1433b297315ab394f1544a18548ffcc6">ARM_WIFI_SocketCreate</a>.</p>
+<p>The argument <em>buf</em> is a pointer to the application data buffer for storing the data to. If the available data is too large to fit in the supplied application buffer <em>buf</em>, excess bytes are discarded in case of a datagram sockets. For stream sockets, the data is buffered internally so the application can retrieve all data by multiple calls of <b>ARM_WIFI_SocketRecv</b> function.</p>
+<p>The argument <em>len</em> specifies the size of the application data buffer.</p>
+<p>The argument <em>ip</em> is a pointer to the buffer that will receive the IP address of the sender. If the <em>ip</em> is <span class="XML-Token">NULL</span>, the IP address is not returned.</p>
+<p>The argument <em>ip_len</em> is a pointer to the IP address length. It should initially contain the amount of space pointed to by <em>ip</em>. On return it contains the actual length of the address returned in bytes.</p>
+<p>The argument <em>port</em> is a pointer to the buffer, that will receive the port number of the sender. If the <em>port</em> is <span class="XML-Token">NULL</span>, the port number is not returned.</p>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line"><span class="keyword">extern</span> <a class="code" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a> Driver_WiFi0;</div>
+<div class="line"><span class="keyword">static</span> <a class="code" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a> *wifi;</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> Echo_Server_Thread (<span class="keywordtype">void</span> *arg) {</div>
+<div class="line">  uint8_t ip[4];</div>
+<div class="line">  uint16_t port;</div>
+<div class="line">  int32_t sock, res;</div>
+<div class="line">  uint32_t ip_len;</div>
+<div class="line">  <span class="keywordtype">char</span> dbuf[120];</div>
+<div class="line"> </div>
+<div class="line">  <span class="keywordflow">while</span> (1) {</div>
+<div class="line">    wifi = &amp;Driver_WiFi0;</div>
+<div class="line">    sock = wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#aa26f0cefe99161484741977a5443e92c">SocketCreate</a> (<a class="code" href="group__wifi__addr__family.html#ga1a17023d92374b4f2d963aa7ac1c4e17">ARM_SOCKET_AF_INET</a>, <a class="code" href="group__wifi__socket__type.html#gaced5f33eda2fc38a8303cd11a0d76fab">ARM_SOCKET_SOCK_DGRAM</a>, <a class="code" href="group__wifi__protocol.html#gabacbead83c772f5737b25b4fc390e16d">ARM_SOCKET_IPPROTO_UDP</a>);</div>
+<div class="line"> </div>
+<div class="line">    ip[0] = 0U;                 <span class="comment">// Unspecified address</span></div>
+<div class="line">    ip[1] = 0U;</div>
+<div class="line">    ip[2] = 0U;</div>
+<div class="line">    ip[3] = 0U;</div>
+<div class="line">    port  = 7U;                 <span class="comment">// Standard port for Echo service</span></div>
+<div class="line"> </div>
+<div class="line">    wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#afcbc0c2bb3639584521ffeaaffc5a475">SocketBind</a> (sock, (uint8_t *)ip, <span class="keyword">sizeof</span>(ip), port);</div>
+<div class="line"> </div>
+<div class="line">    <span class="keywordflow">while</span> (1) {</div>
+<div class="line">      ip_len = <span class="keyword">sizeof</span>(ip);</div>
+<div class="line">      res = wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a4343cf48bbcfb2101a422d90c34f84e6">SocketRecvFrom</a> (sock, dbuf, <span class="keyword">sizeof</span>(dbuf), (uint8_t *)ip, &amp;ip_len, &amp;port);</div>
+<div class="line">      <span class="keywordflow">if</span> (res &lt; 0) {</div>
+<div class="line">        <span class="keywordflow">break</span>;                  <span class="comment">// Error occurred</span></div>
+<div class="line">      }</div>
+<div class="line">      <span class="keywordflow">if</span> (res &gt; 0) {            <span class="comment">// Echo the data</span></div>
+<div class="line">        wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a248a293faea6f6e1cb781b8153e468fa">SocketSendTo</a> (sock, dbuf, res, (uint8_t *)ip, ip_len, port);</div>
+<div class="line">      }    </div>
+<div class="line">    }</div>
+<div class="line">    wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a471a1be6d9adbccb83ca1f268643031c">SocketClose</a> (sock);</div>
+<div class="line">  }</div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="gaee8615b026e8525fb21ca45ba3778ac8"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_SocketSend </td>
+          <td>(</td>
+          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramname"><em>socket</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const void *&#160;</td>
+          <td class="paramname"><em>buf</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>len</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Send data on a connected socket. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">socket</td><td>Socket identification number </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">buf</td><td>Pointer to buffer containing data to send </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">len</td><td>Length of data (in bytes) </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>status information<ul>
+<li>number of bytes sent (&gt;0)</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga535e069b83aafcf70dd089e6097bceef">ARM_SOCKET_ESOCK</a> : Invalid socket</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga695aa5c5329602d9465fbc6c22fc9978">ARM_SOCKET_EINVAL</a> : Invalid argument (pointer to buffer or length)</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga0bde95e313d907032074583bc06b24a1">ARM_SOCKET_ENOTCONN</a> : Socket is not connected</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga87fa238861921ba1b272019a83b04676">ARM_SOCKET_ECONNRESET</a> : Connection reset by the peer</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga7e64d6bd00a2f6e30ece3ff0f02b5b27">ARM_SOCKET_ECONNABORTED</a> : Connection aborted locally</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga699dbd55e543fd38d333cf1d4470d8db">ARM_SOCKET_EAGAIN</a> : Operation would block or timed out (may be called again)</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga2f3db9fdae2366238054ff8a8e8ef97c">ARM_SOCKET_ERROR</a> : Unspecified error</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_SocketSend</b> is used to send data on an already connected socket. This function is normally used to send a reliable, ordered stream of data bytes on a stream sockets. It can also be used to send messages on datagram sockets.</p>
+<p>The argument <em>socket</em> specifies a socket identification number returned from a previous call to <a class="el" href="group__wifi__socket__gr.html#ga1433b297315ab394f1544a18548ffcc6">ARM_WIFI_SocketCreate</a>.</p>
+<p>The argument <em>buf</em> is a pointer to the application data buffer containing data to transmit. The buffer data length is not limited in size. If the data length is too large for one packet, the <b>ARM_WIFI_SocketSend</b> function will fragment the data and send it in several successive data packets:</p>
+<ul>
+<li>In blocking mode, which is enabled by default, this function returns after the data has been successfully queued for transmission.</li>
+<li>In non blocking mode, the function returns immediately without blocking the system.</li>
+</ul>
+<p>The argument <em>len</em> specifies the length of data in bytes.</p>
+<p>Return value, when positive, represents the number of bytes sent, which can be less than <em>len</em>.</p>
+<p><b>Example:</b> </p>
+<ul>
+<li>see <a class="el" href="group__wifi__socket__gr.html#ga4929aab257781dcaae7197f917991779">ARM_WIFI_SocketListen</a> </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="ga5ddd3dd5f863b8392e4281dd48a28d28"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_SocketSendTo </td>
+          <td>(</td>
+          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramname"><em>socket</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const void *&#160;</td>
+          <td class="paramname"><em>buf</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>len</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint8_t *&#160;</td>
+          <td class="paramname"><em>ip</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>ip_len</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint16_t&#160;</td>
+          <td class="paramname"><em>port</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Send data on a socket. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">socket</td><td>Socket identification number </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">buf</td><td>Pointer to buffer containing data to send </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">len</td><td>Length of data (in bytes) </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ip</td><td>Pointer to remote destination IP address </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ip_len</td><td>Length of 'ip' address in bytes </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">port</td><td>Remote destination port number </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>status information<ul>
+<li>number of bytes sent (&gt;0)</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga535e069b83aafcf70dd089e6097bceef">ARM_SOCKET_ESOCK</a> : Invalid socket</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga695aa5c5329602d9465fbc6c22fc9978">ARM_SOCKET_EINVAL</a> : Invalid argument (pointer to buffer or length)</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga0bde95e313d907032074583bc06b24a1">ARM_SOCKET_ENOTCONN</a> : Socket is not connected</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga87fa238861921ba1b272019a83b04676">ARM_SOCKET_ECONNRESET</a> : Connection reset by the peer</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga7e64d6bd00a2f6e30ece3ff0f02b5b27">ARM_SOCKET_ECONNABORTED</a> : Connection aborted locally</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga699dbd55e543fd38d333cf1d4470d8db">ARM_SOCKET_EAGAIN</a> : Operation would block or timed out (may be called again)</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga2f3db9fdae2366238054ff8a8e8ef97c">ARM_SOCKET_ERROR</a> : Unspecified error</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_SocketSendTo</b> is used to send data. It is normally used to send messages on a datagram sockets, but can also be used to send data on a connected stream sockets.</p>
+<p>If the datagram socket is not yet bound, the system implicitly binds to a random dynamic port.</p>
+<p>The argument <em>socket</em> specifies a socket identification number returned from a previous call to <a class="el" href="group__wifi__socket__gr.html#ga1433b297315ab394f1544a18548ffcc6">ARM_WIFI_SocketCreate</a>.</p>
+<p>The argument <em>buf</em> is a pointer to the application data buffer containing data to transmit. The buffer data length is not limited in size. If the data length is too large for one packet, the <b>ARM_WIFI_SocketSend</b> function will fragment the data and send it in several successive data packets:</p>
+<ul>
+<li>In blocking mode, which is enabled by default, this function returns after the data has been successfully queued for transmission.</li>
+<li>In non blocking mode, the function returns immediately without blocking the system.</li>
+</ul>
+<p>The argument <em>len</em> specifies the length of data in bytes.</p>
+<p>The argument <em>ip</em> is a pointer to the buffer containing the IP address octets of the endpoint node.</p>
+<p>The argument <em>ip_len</em> specifies the length of the IP address. The length is <span class="XML-Token">4</span> bytes for the IPv4 address and <span class="XML-Token">16</span> bytes for the IPv6 address.</p>
+<p>The argument <em>port</em> specifies the port of the endpoint node. If the argument <em>port</em> is <span class="XML-Token">0</span>, the function returns error, because this port is reserved.</p>
+<p>For the stream sockets, arguments <em>ip</em>, <em>ip_len</em> and <em>port</em> are ignored.</p>
+<p>Return value, when positive, represents the number of bytes sent, which can be less than <em>len</em>.</p>
+<p><b>Example:</b> </p>
+<ul>
+<li>see <a class="el" href="group__wifi__socket__gr.html#ga2b15232d69f2ae8e189512d6c68c8a81">ARM_WIFI_SocketRecvFrom</a> </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="gac187e418893de33817e4fcbdd85dbaee"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_SocketGetSockName </td>
+          <td>(</td>
+          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramname"><em>socket</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint8_t *&#160;</td>
+          <td class="paramname"><em>ip</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t *&#160;</td>
+          <td class="paramname"><em>ip_len</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint16_t *&#160;</td>
+          <td class="paramname"><em>port</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Retrieve local IP address and port of a socket. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">socket</td><td>Socket identification number </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">ip</td><td>Pointer to buffer where local address shall be returned (NULL for none) </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">ip_len</td><td>Pointer to length of 'ip' (or NULL if 'ip' is NULL)<ul>
+<li>length of supplied 'ip' on input</li>
+<li>length of stored 'ip' on output </li>
+</ul>
+</td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">port</td><td>Pointer to buffer where local port shall be returned (NULL for none) </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>status information<ul>
+<li>0 : Operation successful</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga535e069b83aafcf70dd089e6097bceef">ARM_SOCKET_ESOCK</a> : Invalid socket</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga695aa5c5329602d9465fbc6c22fc9978">ARM_SOCKET_EINVAL</a> : Invalid argument (pointer to buffer or length)</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga2f3db9fdae2366238054ff8a8e8ef97c">ARM_SOCKET_ERROR</a> : Unspecified error</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_SocketGetSockName</b> retrieves the local IP address and port for a socket.</p>
+<p>The argument <em>socket</em> specifies a socket identification number returned from a previous call to <a class="el" href="group__wifi__socket__gr.html#ga1433b297315ab394f1544a18548ffcc6">ARM_WIFI_SocketCreate</a>.</p>
+<p>The argument <em>ip</em> is a pointer to the buffer that will receive the local IP address. If the <em>ip</em> is <span class="XML-Token">NULL</span>, the local IP address is not returned.</p>
+<p>The argument <em>ip_len</em> is a pointer to the IP address length. It should initially contain the amount of space pointed to by <em>ip</em>. On return it contains the actual length of the address returned in bytes.</p>
+<p>The argument <em>port</em> is a pointer to the buffer, that will receive the local port number. If the <em>port</em> is <span class="XML-Token">NULL</span>, the local port number is not returned.</p>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line"><span class="keyword">static</span> uint8_t  local_ip[4];    <span class="comment">// Socket address and port</span></div>
+<div class="line"><span class="keyword">static</span> uint16_t local_port;</div>
+<div class="line"> </div>
+<div class="line"><span class="keyword">static</span> <span class="keywordtype">void</span> get_socket_local_info (<span class="keywordtype">void</span>) {</div>
+<div class="line">  uint32_t ip_len;</div>
+<div class="line"> </div>
+<div class="line">  ip_len = <span class="keyword">sizeof</span>(local_ip);</div>
+<div class="line">  wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#ab7c3e0211c87bf99e9c42b17a2249f50">SocketGetSockName</a> (sock, (uint8_t *)local_ip, &amp;ip_len, &amp;local_port);</div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="gaa484a931d55d163477920bc865dd9220"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_SocketGetPeerName </td>
+          <td>(</td>
+          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramname"><em>socket</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint8_t *&#160;</td>
+          <td class="paramname"><em>ip</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t *&#160;</td>
+          <td class="paramname"><em>ip_len</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint16_t *&#160;</td>
+          <td class="paramname"><em>port</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Retrieve remote IP address and port of a socket. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">socket</td><td>Socket identification number </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">ip</td><td>Pointer to buffer where remote address shall be returned (NULL for none) </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">ip_len</td><td>Pointer to length of 'ip' (or NULL if 'ip' is NULL)<ul>
+<li>length of supplied 'ip' on input</li>
+<li>length of stored 'ip' on output </li>
+</ul>
+</td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">port</td><td>Pointer to buffer where remote port shall be returned (NULL for none) </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>status information<ul>
+<li>0 : Operation successful</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga535e069b83aafcf70dd089e6097bceef">ARM_SOCKET_ESOCK</a> : Invalid socket</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga695aa5c5329602d9465fbc6c22fc9978">ARM_SOCKET_EINVAL</a> : Invalid argument (pointer to buffer or length)</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga0bde95e313d907032074583bc06b24a1">ARM_SOCKET_ENOTCONN</a> : Socket is not connected</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga2f3db9fdae2366238054ff8a8e8ef97c">ARM_SOCKET_ERROR</a> : Unspecified error</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_SocketGetPeerName</b> retrieves the IP address and port of the peer to which a socket is connected.</p>
+<p>The argument <em>socket</em> specifies a socket identification number returned from a previous call to <a class="el" href="group__wifi__socket__gr.html#ga1433b297315ab394f1544a18548ffcc6">ARM_WIFI_SocketCreate</a>.</p>
+<p>The argument <em>ip</em> is a pointer to the buffer that will receive the IP address of the peer. If the <em>ip</em> is <span class="XML-Token">NULL</span>, the IP address is not returned.</p>
+<p>The argument <em>ip_len</em> is a pointer to the IP address length. It should initially contain the amount of space pointed to by <em>ip</em>. On return it contains the actual length of the address returned in bytes.</p>
+<p>The argument <em>port</em> is a pointer to the buffer, that will receive the port number of the peer. If the <em>port</em> is <span class="XML-Token">NULL</span>, the port number is not returned.</p>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line"><span class="keyword">static</span> uint8_t  peer_ip[4];    <span class="comment">// Socket address and port</span></div>
+<div class="line"><span class="keyword">static</span> uint16_t peer_port;</div>
+<div class="line"> </div>
+<div class="line"><span class="keyword">static</span> <span class="keywordtype">void</span> get_socket_peer_info (<span class="keywordtype">void</span>) {</div>
+<div class="line">  uint32_t ip_len;</div>
+<div class="line"> </div>
+<div class="line">  ip_len = <span class="keyword">sizeof</span>(peer_ip);</div>
+<div class="line">  wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#ac45fbc58fd00742cbe712bf26d857359">SocketGetPeerName</a> (sock, (uint8_t *)peer_ip, &amp;ip_len, &amp;peer_port);</div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="ga6d69360e9774937b7bdc03b45fbc9075"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_SocketGetOpt </td>
+          <td>(</td>
+          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramname"><em>socket</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramname"><em>opt_id</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">void *&#160;</td>
+          <td class="paramname"><em>opt_val</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t *&#160;</td>
+          <td class="paramname"><em>opt_len</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Get socket option. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">socket</td><td>Socket identification number </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">opt_id</td><td>Option identifier </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">opt_val</td><td>Pointer to the buffer that will receive the option value </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">opt_len</td><td>Pointer to length of the option value<ul>
+<li>length of buffer on input</li>
+<li>length of data on output </li>
+</ul>
+</td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>status information<ul>
+<li>0 : Operation successful</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga535e069b83aafcf70dd089e6097bceef">ARM_SOCKET_ESOCK</a> : Invalid socket</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga695aa5c5329602d9465fbc6c22fc9978">ARM_SOCKET_EINVAL</a> : Invalid argument</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga95ab80319bfbc5413fc5334e3d5ce5d2">ARM_SOCKET_ENOTSUP</a> : Operation not supported</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga2f3db9fdae2366238054ff8a8e8ef97c">ARM_SOCKET_ERROR</a> : Unspecified error</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_SocketGetOpt</b> retrieves options for a socket.</p>
+<p>The argument <em>socket</em> specifies a socket identification number returned from a previous call to <a class="el" href="group__wifi__socket__gr.html#ga1433b297315ab394f1544a18548ffcc6">ARM_WIFI_SocketCreate</a>.</p>
+<p>The argument <em>opt_id</em> is the socket option for which the value is to be retrieved. The following socket options are supported: </p>
+<table class="doxtable">
+<tr>
+<th align="left">Option </th><th align="left">Description  </th></tr>
+<tr>
+<td align="left"><a class="el" href="group__wifi__soc__opt.html#ga6f76374467b5580ab0e440da1c39024e">ARM_SOCKET_SO_RCVTIMEO</a> </td><td align="left">Timeout for receiving in blocking mode </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__wifi__soc__opt.html#gad633987fb5b3478b54d3269b1b03497a">ARM_SOCKET_SO_SNDTIMEO</a> </td><td align="left">Timeout for sending in blocking mode </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__wifi__soc__opt.html#ga925f699a931ccbfb87eb5f3d36cbe405">ARM_SOCKET_SO_KEEPALIVE</a> </td><td align="left">Keep-alive mode for the stream socket </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__wifi__soc__opt.html#ga0466a14ce32b2cc28887735b632f3e63">ARM_SOCKET_SO_TYPE</a> </td><td align="left">Type of the socket (stream or datagram) </td></tr>
+</table>
+<p>The argument <em>opt_val</em> points to the buffer that will receive the value of the <em>opt_id</em>.</p>
+<p>The argument <em>opt_len</em> contains the length of the buffer at the input and returns the length of the option information on the output.</p>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line">uint32_t type;</div>
+<div class="line"> </div>
+<div class="line">wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a4771324fb6f39fb2837e98d9f0ed48ed">SocketGetOpt</a> (sock, <a class="code" href="group__wifi__soc__opt.html#ga0466a14ce32b2cc28887735b632f3e63">ARM_SOCKET_SO_TYPE</a>, &amp;type, <span class="keyword">sizeof</span>(type));</div>
+<div class="line"><span class="keywordflow">if</span> (type == <a class="code" href="group__wifi__socket__type.html#ga9567d5735856190b2ae9cc39f68637f1">ARM_SOCKET_SOCK_STREAM</a>) {</div>
+<div class="line">  <span class="comment">// Stream socket</span></div>
+<div class="line">}</div>
+<div class="line"><span class="keywordflow">if</span> (type == <a class="code" href="group__wifi__socket__type.html#gaced5f33eda2fc38a8303cd11a0d76fab">ARM_SOCKET_SOCK_DGRAM</a>) {</div>
+<div class="line">  <span class="comment">// Datagram socket</span></div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="ga5de80d6729d9504a21dd5d31dc504017"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_SocketSetOpt </td>
+          <td>(</td>
+          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramname"><em>socket</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramname"><em>opt_id</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const void *&#160;</td>
+          <td class="paramname"><em>opt_val</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>opt_len</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Set socket option. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">socket</td><td>Socket identification number </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">opt_id</td><td>Option identifier </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">opt_val</td><td>Pointer to the option value </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">opt_len</td><td>Length of the option value in bytes </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>status information<ul>
+<li>0 : Operation successful</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga535e069b83aafcf70dd089e6097bceef">ARM_SOCKET_ESOCK</a> : Invalid socket</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga695aa5c5329602d9465fbc6c22fc9978">ARM_SOCKET_EINVAL</a> : Invalid argument</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga95ab80319bfbc5413fc5334e3d5ce5d2">ARM_SOCKET_ENOTSUP</a> : Operation not supported</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga2f3db9fdae2366238054ff8a8e8ef97c">ARM_SOCKET_ERROR</a> : Unspecified error</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_SocketSetOpt</b> sets options for a socket.</p>
+<p>The argument <em>socket</em> specifies a socket identification number returned from a previous call to <a class="el" href="group__wifi__socket__gr.html#ga1433b297315ab394f1544a18548ffcc6">ARM_WIFI_SocketCreate</a>.</p>
+<p>The argument <em>opt_id</em> is the socket option for which the value is to be set. The following socket options are supported: </p>
+<table class="doxtable">
+<tr>
+<th align="left">Option </th><th align="left">Description  </th></tr>
+<tr>
+<td align="left"><a class="el" href="group__wifi__soc__opt.html#gac6fa12bbc640209a6b63f8cec282f961">ARM_SOCKET_IO_FIONBIO</a> </td><td align="left">Non-blocking mode for the socket </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__wifi__soc__opt.html#ga6f76374467b5580ab0e440da1c39024e">ARM_SOCKET_SO_RCVTIMEO</a> </td><td align="left">Timeout for receiving in blocking mode </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__wifi__soc__opt.html#gad633987fb5b3478b54d3269b1b03497a">ARM_SOCKET_SO_SNDTIMEO</a> </td><td align="left">Timeout for sending in blocking mode </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__wifi__soc__opt.html#ga925f699a931ccbfb87eb5f3d36cbe405">ARM_SOCKET_SO_KEEPALIVE</a> </td><td align="left">Keep-alive mode for the stream socket </td></tr>
+</table>
+<p>The argument <em>opt_val</em> points to the buffer containing the value of the <em>opt_id</em>.</p>
+<p>The argument <em>opt_len</em> tells the exact length of the option.</p>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line">uint32_t nonblocking = 0U;    <span class="comment">// Blocking mode</span></div>
+<div class="line">uint32_t timeout = 10000U;    <span class="comment">// Timeout 10 seconds</span></div>
+<div class="line"> </div>
+<div class="line">wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a7019060d0869a7dfae8e31aedb46815d">SocketSetOpt</a> (sock, <a class="code" href="group__wifi__soc__opt.html#gac6fa12bbc640209a6b63f8cec282f961">ARM_SOCKET_IO_FIONBIO</a>, &amp;nonblocking, <span class="keyword">sizeof</span>(nonblocking));</div>
+<div class="line">wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a7019060d0869a7dfae8e31aedb46815d">SocketSetOpt</a> (sock, <a class="code" href="group__wifi__soc__opt.html#ga6f76374467b5580ab0e440da1c39024e">ARM_SOCKET_SO_RCVTIMEO</a>, &amp;timeout, <span class="keyword">sizeof</span>(timeout)); </div>
+<div class="line">wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a7019060d0869a7dfae8e31aedb46815d">SocketSetOpt</a> (sock, <a class="code" href="group__wifi__soc__opt.html#gad633987fb5b3478b54d3269b1b03497a">ARM_SOCKET_SO_SNDTIMEO</a>, &amp;timeout, <span class="keyword">sizeof</span>(timeout));</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="ga391464de71b6a5d300fda9434fe87a87"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_SocketClose </td>
+          <td>(</td>
+          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramname"><em>socket</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Close and release a socket. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">socket</td><td>Socket identification number </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>status information<ul>
+<li>0 : Operation successful</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga535e069b83aafcf70dd089e6097bceef">ARM_SOCKET_ESOCK</a> : Invalid socket</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga699dbd55e543fd38d333cf1d4470d8db">ARM_SOCKET_EAGAIN</a> : Operation would block (may be called again)</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga2f3db9fdae2366238054ff8a8e8ef97c">ARM_SOCKET_ERROR</a> : Unspecified error</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_SocketClose</b> closes an existing socket and releases the socket descriptor. Further references to <em>socket</em> fail with <code>ARM_SOCKET_EINVAL</code> error code.</p>
+<p>The argument <em>socket</em> specifies a socket identification number returned from a previous call to <a class="el" href="group__wifi__socket__gr.html#ga1433b297315ab394f1544a18548ffcc6">ARM_WIFI_SocketCreate</a>.</p>
+<p>In blocking mode, which is enabled by default, this function will wait until a socket is closed. In non blocking mode, you must call the <b>ARM_WIFI_SocketClose</b> function again if the error code <code>ARM_SOCKET_EAGAIN</code> is returned.</p>
+<p><b>Example:</b> </p>
+<ul>
+<li>see <a class="el" href="group__wifi__socket__gr.html#ga4929aab257781dcaae7197f917991779">ARM_WIFI_SocketListen</a> </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="ga0c37435c6abc68ee0f1f4357b503e0bf"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_SocketGetHostByName </td>
+          <td>(</td>
+          <td class="paramtype">const char *&#160;</td>
+          <td class="paramname"><em>name</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramname"><em>af</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint8_t *&#160;</td>
+          <td class="paramname"><em>ip</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t *&#160;</td>
+          <td class="paramname"><em>ip_len</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Retrieve host IP address from host name. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">name</td><td>Host name </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">af</td><td>Address family </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">ip</td><td>Pointer to buffer where resolved IP address shall be returned </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">ip_len</td><td>Pointer to length of 'ip'<ul>
+<li>length of supplied 'ip' on input</li>
+<li>length of stored 'ip' on output </li>
+</ul>
+</td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>status information<ul>
+<li>0 : Operation successful</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga695aa5c5329602d9465fbc6c22fc9978">ARM_SOCKET_EINVAL</a> : Invalid argument</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga95ab80319bfbc5413fc5334e3d5ce5d2">ARM_SOCKET_ENOTSUP</a> : Operation not supported</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga320ffeeb44d583c0216b24d6e1009d9f">ARM_SOCKET_ETIMEDOUT</a> : Operation timed out</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga4d5d38e9a7d5907a3de4165476640cd4">ARM_SOCKET_EHOSTNOTFOUND</a> : Host not found</li>
+<li><a class="el" href="group__wifi__soc__func.html#ga2f3db9fdae2366238054ff8a8e8ef97c">ARM_SOCKET_ERROR</a> : Unspecified error</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_SocketGetHostByName</b> retrieves host information corresponding to a host name from a host database. It does this by sending DNS requests to the DNS server. The IP address of the DNS server is specified in the network interface configuration or can be obtained from the DHCP server for the local area network.</p>
+<p>The argument <em>name</em> is a pointer to the <span class="XML-Token">null</span>-terminated name of the host to resolve.</p>
+<p>The argument <em>af</em> specifies the address family, that is, which type of IP address you want to resolve. The following values are supported: </p>
+<table class="doxtable">
+<tr>
+<th align="left">Family </th><th align="left">Description  </th></tr>
+<tr>
+<td align="left"><a class="el" href="group__wifi__addr__family.html#ga1a17023d92374b4f2d963aa7ac1c4e17">ARM_SOCKET_AF_INET</a> </td><td align="left">Resolve the IPv4 address </td></tr>
+<tr>
+<td align="left"><a class="el" href="group__wifi__addr__family.html#gad50c95421ffbc6eec5f8458b2e170c26">ARM_SOCKET_AF_INET6</a> </td><td align="left">Resolve the IPv6 address </td></tr>
+</table>
+<p>The argument <em>ip</em> is a pointer to the buffer that will receive the resolved IP address of the host. If the argument <em>ip</em> is <span class="XML-Token">NULL</span>, the function returns error.</p>
+<p>The argument <em>ip_len</em> is a pointer to the IP address length. It should initially contain the amount of space pointed to by <em>ip</em>. On return it contains the actual length of the address returned in bytes.</p>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line"><span class="keyword">extern</span> <a class="code" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a> Driver_WiFi0;</div>
+<div class="line"><span class="keyword">static</span> <a class="code" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a> *wifi;</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> ping_arm_com (<span class="keywordtype">void</span>) {</div>
+<div class="line">  uint8_t ip[4];</div>
+<div class="line">  uint32_t ip_len;</div>
+<div class="line">  int32_t res;</div>
+<div class="line"> </div>
+<div class="line">  wifi = &amp;Driver_WiFi0;</div>
+<div class="line">  ip_len = <span class="keyword">sizeof</span>(ip);</div>
+<div class="line">  res = wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#a62b2512cbaef03d26eb9c1e3004c3364">SocketGetHostByName</a> (<span class="stringliteral">&quot;www.arm.com&quot;</span>, <a class="code" href="group__wifi__addr__family.html#ga1a17023d92374b4f2d963aa7ac1c4e17">ARM_SOCKET_AF_INET</a>, (uint8_t *)ip, &amp;ip_len);</div>
+<div class="line">  <span class="keywordflow">if</span> (res == <a class="code" href="group__execution__status.html#ga85752c5de59e8adeb001e35ff5be6be7">ARM_DRIVER_OK</a>) {</div>
+<div class="line">    res = wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#ad8f218e434e2f327335b16cdb4f21f65">Ping</a> ((uint8_t *)ip, <span class="keyword">sizeof</span>(ip));</div>
+<div class="line">    <span class="keywordflow">if</span> (res == <a class="code" href="group__execution__status.html#ga85752c5de59e8adeb001e35ff5be6be7">ARM_DRIVER_OK</a>) {</div>
+<div class="line">      <span class="comment">// &quot;www.arm.com&quot; responded to ping  </span></div>
+<div class="line">    }</div>
+<div class="line">  }</div>
+<div class="line">  <span class="keywordflow">else</span> {</div>
+<div class="line">    <span class="comment">// &quot;www.arm.com&quot; not resolved</span></div>
+<div class="line">  }</div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+<a class="anchor" id="gac7a8abb9e23f3f52dabce4153a53c1ca"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">int32_t ARM_WIFI_Ping </td>
+          <td>(</td>
+          <td class="paramtype">const uint8_t *&#160;</td>
+          <td class="paramname"><em>ip</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>ip_len</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Probe remote host with Ping command. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">ip</td><td>Pointer to remote host IP address </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ip_len</td><td>Length of 'ip' address in bytes </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>execution status<ul>
+<li><a class="el" href="group__execution__status.html#ga85752c5de59e8adeb001e35ff5be6be7">ARM_DRIVER_OK</a> : Operation successful</li>
+<li><a class="el" href="group__execution__status.html#ga2f627075447749bb368d3b768be107cb">ARM_DRIVER_ERROR</a> : Operation failed</li>
+<li><a class="el" href="group__execution__status.html#ga0bac892205bb2d586b822e8b178ab310">ARM_DRIVER_ERROR_TIMEOUT</a> : Timeout occurred</li>
+<li><a class="el" href="group__execution__status.html#ga2efa59e480d82697795439220e6884e4">ARM_DRIVER_ERROR_UNSUPPORTED</a> : Operation not supported</li>
+<li><a class="el" href="group__execution__status.html#gac781d4b70ce17c4c2efe2db045be751c">ARM_DRIVER_ERROR_PARAMETER</a> : Parameter error (NULL ip pointer or ip_len different than 4 or 16)</li>
+</ul>
+</dd></dl>
+<p>The function <b>ARM_WIFI_Ping</b> checks if the remote host is reachable. It does this by sending an echo request and waiting for an echo response. The function then returns the result of the operation. Check the <a class="el" href="group__wifi__control__gr.html#structARM__WIFI__CAPABILITIES">ARM_WIFI_CAPABILITIES</a> of the driver, if this function is supported in the driver implementation.</p>
+<p>The argument <em>ip</em> is a pointer to the buffer containing the IP address octets of the host to ping.</p>
+<p>The argument <em>ip_len</em> specifies the length of the IP address. The length is <span class="XML-Token">4</span> bytes for the IPv4 address and <span class="XML-Token">16</span> bytes for the IPv6 address.</p>
+<dl class="section note"><dt>Note</dt><dd>The host availability check fails, if the remote host does not respond to echo requests, or intermediate routers do not forward the echo requests or echo responses.</dd></dl>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line"><span class="keyword">extern</span> <a class="code" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a> Driver_WiFi0;</div>
+<div class="line"><span class="keyword">static</span> <a class="code" href="group__wifi__interface__gr.html#structARM__DRIVER__WIFI">ARM_DRIVER_WIFI</a> *wifi;</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> ping_host (<span class="keywordtype">void</span>) {</div>
+<div class="line">  uint8_t ip[4] = { 192U, 168U, 0U, 100U };</div>
+<div class="line">  int32_t res;</div>
+<div class="line"> </div>
+<div class="line">  wifi = &amp;Driver_WiFi0;</div>
+<div class="line">  res = wifi-&gt;<a class="code" href="group__wifi__interface__gr.html#ad8f218e434e2f327335b16cdb4f21f65">Ping</a> ((uint8_t *)ip, <span class="keyword">sizeof</span>(ip));</div>
+<div class="line">  <span class="keywordflow">if</span> (res == <a class="code" href="group__execution__status.html#ga85752c5de59e8adeb001e35ff5be6be7">ARM_DRIVER_OK</a>) {</div>
+<div class="line">    <span class="comment">// Host responded</span></div>
+<div class="line">  }</div>
+<div class="line">}</div>
+</div><!-- fragment --> 
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
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+</html>
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new file mode 100644
index 0000000..ddbefa5
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+var group__wifi__socket__gr =
+[
+    [ "WiFi Socket Address Family definitions", "group__wifi__addr__family.html", "group__wifi__addr__family" ],
+    [ "WiFi Socket Type definitions", "group__wifi__socket__type.html", "group__wifi__socket__type" ],
+    [ "WiFi Socket Protocol definitions", "group__wifi__protocol.html", "group__wifi__protocol" ],
+    [ "WiFi Socket Option definitions", "group__wifi__soc__opt.html", "group__wifi__soc__opt" ],
+    [ "WiFi Socket Function return codes", "group__wifi__soc__func.html", "group__wifi__soc__func" ],
+    [ "ARM_WIFI_SocketCreate", "group__wifi__socket__gr.html#ga1433b297315ab394f1544a18548ffcc6", null ],
+    [ "ARM_WIFI_SocketBind", "group__wifi__socket__gr.html#gae69f7822b658765f1cd3f74e9a50c246", null ],
+    [ "ARM_WIFI_SocketListen", "group__wifi__socket__gr.html#ga4929aab257781dcaae7197f917991779", null ],
+    [ "ARM_WIFI_SocketAccept", "group__wifi__socket__gr.html#ga24e6a015e519373c3f108cc5aa764ef8", null ],
+    [ "ARM_WIFI_SocketConnect", "group__wifi__socket__gr.html#gac0f189afbd35914d4c85e77b40672b16", null ],
+    [ "ARM_WIFI_SocketRecv", "group__wifi__socket__gr.html#gaecc9ba19491ed00c27da3f5677895d48", null ],
+    [ "ARM_WIFI_SocketRecvFrom", "group__wifi__socket__gr.html#ga2b15232d69f2ae8e189512d6c68c8a81", null ],
+    [ "ARM_WIFI_SocketSend", "group__wifi__socket__gr.html#gaee8615b026e8525fb21ca45ba3778ac8", null ],
+    [ "ARM_WIFI_SocketSendTo", "group__wifi__socket__gr.html#ga5ddd3dd5f863b8392e4281dd48a28d28", null ],
+    [ "ARM_WIFI_SocketGetSockName", "group__wifi__socket__gr.html#gac187e418893de33817e4fcbdd85dbaee", null ],
+    [ "ARM_WIFI_SocketGetPeerName", "group__wifi__socket__gr.html#gaa484a931d55d163477920bc865dd9220", null ],
+    [ "ARM_WIFI_SocketGetOpt", "group__wifi__socket__gr.html#ga6d69360e9774937b7bdc03b45fbc9075", null ],
+    [ "ARM_WIFI_SocketSetOpt", "group__wifi__socket__gr.html#ga5de80d6729d9504a21dd5d31dc504017", null ],
+    [ "ARM_WIFI_SocketClose", "group__wifi__socket__gr.html#ga391464de71b6a5d300fda9434fe87a87", null ],
+    [ "ARM_WIFI_SocketGetHostByName", "group__wifi__socket__gr.html#ga0c37435c6abc68ee0f1f4357b503e0bf", null ],
+    [ "ARM_WIFI_Ping", "group__wifi__socket__gr.html#gac7a8abb9e23f3f52dabce4153a53c1ca", null ]
+];
\ No newline at end of file
diff --git a/docs/Driver/html/group__wifi__socket__type.html b/docs/Driver/html/group__wifi__socket__type.html
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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>WiFi Socket Type definitions</title>
+<title>CMSIS-Driver: WiFi Socket Type definitions</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
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+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
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+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
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+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Driver
+   &#160;<span id="projectnumber">Version 2.7.1</span>
+   </div>
+   <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
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+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li><a href="modules.html"><span>Reference</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
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+<div id="doc-content">
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+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
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+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="summary">
+<a href="#define-members">Macros</a>  </div>
+  <div class="headertitle">
+<div class="title">WiFi Socket Type definitions<div class="ingroups"><a class="el" href="group__wifi__socket__gr.html">WiFi Socket</a></div></div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>WiFi Socket Type definitions.  
+<a href="#details">More...</a></p>
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
+Macros</h2></td></tr>
+<tr class="memitem:ga9567d5735856190b2ae9cc39f68637f1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__type.html#ga9567d5735856190b2ae9cc39f68637f1">ARM_SOCKET_SOCK_STREAM</a>&#160;&#160;&#160;1</td></tr>
+<tr class="memdesc:ga9567d5735856190b2ae9cc39f68637f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stream socket.  <a href="#ga9567d5735856190b2ae9cc39f68637f1">More...</a><br/></td></tr>
+<tr class="separator:ga9567d5735856190b2ae9cc39f68637f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaced5f33eda2fc38a8303cd11a0d76fab"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__socket__type.html#gaced5f33eda2fc38a8303cd11a0d76fab">ARM_SOCKET_SOCK_DGRAM</a>&#160;&#160;&#160;2</td></tr>
+<tr class="memdesc:gaced5f33eda2fc38a8303cd11a0d76fab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Datagram socket.  <a href="#gaced5f33eda2fc38a8303cd11a0d76fab">More...</a><br/></td></tr>
+<tr class="separator:gaced5f33eda2fc38a8303cd11a0d76fab"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>WiFi Socket Type definitions. </p>
+<p>The WiFi Socket Type specifies the type of the WiFi socket. </p>
+<h2 class="groupheader">Macro Definition Documentation</h2>
+<a class="anchor" id="ga9567d5735856190b2ae9cc39f68637f1"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_SOCK_STREAM&#160;&#160;&#160;1</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Stream socket. </p>
+<p>Stream Socket is connection-oriented, sequenced and reliable, implemented on top of the TCP protocol. </p>
+
+</div>
+</div>
+<a class="anchor" id="gaced5f33eda2fc38a8303cd11a0d76fab"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_SOCKET_SOCK_DGRAM&#160;&#160;&#160;2</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Datagram socket. </p>
+<p>Datagram Socket is connectionless, unreliable, using the UDP protocol. </p>
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
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+var group__wifi__socket__type =
+[
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+    [ "ARM_SOCKET_SOCK_DGRAM", "group__wifi__socket__type.html#gaced5f33eda2fc38a8303cd11a0d76fab", null ]
+];
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diff --git a/docs/Driver/html/group__wifi__wps__method.html b/docs/Driver/html/group__wifi__wps__method.html
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+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>WiFi Protected Setup (WPS) Method</title>
+<title>CMSIS-Driver: WiFi Protected Setup (WPS) Method</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Driver
+   &#160;<span id="projectnumber">Version 2.7.1</span>
+   </div>
+   <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
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+      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
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+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="summary">
+<a href="#define-members">Macros</a>  </div>
+  <div class="headertitle">
+<div class="title">WiFi Protected Setup (WPS) Method<div class="ingroups"><a class="el" href="group__wifi__management__gr.html">WiFi Management</a></div></div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>Specifies WiFi WPS method for <a class="el" href="group__wifi__management__gr.html#ga7d545744a848702d75043de30ea5260a">ARM_WIFI_Activate</a>.  
+<a href="#details">More...</a></p>
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
+Macros</h2></td></tr>
+<tr class="memitem:gaade5c0e07cfee79973643b9f98a73438"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__wps__method.html#gaade5c0e07cfee79973643b9f98a73438">ARM_WIFI_WPS_METHOD_NONE</a>&#160;&#160;&#160;0U</td></tr>
+<tr class="memdesc:gaade5c0e07cfee79973643b9f98a73438"><td class="mdescLeft">&#160;</td><td class="mdescRight">Not used.  <a href="#gaade5c0e07cfee79973643b9f98a73438">More...</a><br/></td></tr>
+<tr class="separator:gaade5c0e07cfee79973643b9f98a73438"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafe4555319019fa722d2f2a8cc519af41"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__wps__method.html#gafe4555319019fa722d2f2a8cc519af41">ARM_WIFI_WPS_METHOD_PBC</a>&#160;&#160;&#160;1U</td></tr>
+<tr class="memdesc:gafe4555319019fa722d2f2a8cc519af41"><td class="mdescLeft">&#160;</td><td class="mdescRight">Push Button Configuration.  <a href="#gafe4555319019fa722d2f2a8cc519af41">More...</a><br/></td></tr>
+<tr class="separator:gafe4555319019fa722d2f2a8cc519af41"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga12a4e06347498f9765f339cdb5f391de"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__wifi__wps__method.html#ga12a4e06347498f9765f339cdb5f391de">ARM_WIFI_WPS_METHOD_PIN</a>&#160;&#160;&#160;2U</td></tr>
+<tr class="memdesc:ga12a4e06347498f9765f339cdb5f391de"><td class="mdescLeft">&#160;</td><td class="mdescRight">PIN.  <a href="#ga12a4e06347498f9765f339cdb5f391de">More...</a><br/></td></tr>
+<tr class="separator:ga12a4e06347498f9765f339cdb5f391de"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<p>Specifies WiFi WPS method for <a class="el" href="group__wifi__management__gr.html#ga7d545744a848702d75043de30ea5260a">ARM_WIFI_Activate</a>. </p>
+<p>The WiFi WPS method defines which WPS method is used. </p>
+<h2 class="groupheader">Macro Definition Documentation</h2>
+<a class="anchor" id="gaade5c0e07cfee79973643b9f98a73438"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_WPS_METHOD_NONE&#160;&#160;&#160;0U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Not used. </p>
+<p>WPS not used. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__wps__method.html" title="Specifies WiFi WPS method for ARM_WIFI_Activate. ">WiFi Protected Setup (WPS) Method</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="gafe4555319019fa722d2f2a8cc519af41"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_WPS_METHOD_PBC&#160;&#160;&#160;1U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Push Button Configuration. </p>
+<p>WPS with Push Button Configuration. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__wps__method.html" title="Specifies WiFi WPS method for ARM_WIFI_Activate. ">WiFi Protected Setup (WPS) Method</a> </dd></dl>
+
+</div>
+</div>
+<a class="anchor" id="ga12a4e06347498f9765f339cdb5f391de"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define ARM_WIFI_WPS_METHOD_PIN&#160;&#160;&#160;2U</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>PIN. </p>
+<p>WPS with PIN. </p>
+<dl class="section see"><dt>See Also</dt><dd><a class="el" href="group__wifi__wps__method.html" title="Specifies WiFi WPS method for ARM_WIFI_Activate. ">WiFi Protected Setup (WPS) Method</a> </dd></dl>
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Driver/html/group__wifi__wps__method.js b/docs/Driver/html/group__wifi__wps__method.js
new file mode 100644
index 0000000..509ec95
--- /dev/null
+++ b/docs/Driver/html/group__wifi__wps__method.js
@@ -0,0 +1,6 @@
+var group__wifi__wps__method =
+[
+    [ "ARM_WIFI_WPS_METHOD_NONE", "group__wifi__wps__method.html#gaade5c0e07cfee79973643b9f98a73438", null ],
+    [ "ARM_WIFI_WPS_METHOD_PBC", "group__wifi__wps__method.html#gafe4555319019fa722d2f2a8cc519af41", null ],
+    [ "ARM_WIFI_WPS_METHOD_PIN", "group__wifi__wps__method.html#ga12a4e06347498f9765f339cdb5f391de", null ]
+];
\ No newline at end of file
diff --git a/docs/Driver/html/index.doxyidx b/docs/Driver/html/index.doxyidx
new file mode 100644
index 0000000..712f9a2
--- /dev/null
+++ b/docs/Driver/html/index.doxyidx
@@ -0,0 +1,1602 @@
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * @file     index.doxyidx
+ * @brief    Index file for MDK-ARM Help System
+ * @version  1.0
+ * @date     10. July 2019
+ * @note     Generated by DoxyIndex V1.2.3 on Wednesday, 10.07.2019 15:22:29
+ *           from Path 'C:\tools\PACK\ARM\CMSIS\5.6.0\\CMSIS\Documentation\Driver\html',
+ */
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+ARM_CAN_Initialize, group__can__interface__gr.html#gaa72ceb25ba67e279d7432404632deb44, Driver_CAN.c
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+ARM_CAN_NO_MESSAGE_AVAILABLE, Driver__CAN_8h.html#aab7a77388b250367f7e38844485bc513, Driver_CAN.h
+ARM_CAN_OBJ_CAPABILITIES, group__can__interface__gr.html#structARM__CAN__OBJ__CAPABILITIES, 
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+ARM_USB_ENDPOINT_DIRECTION_MASK, Driver__USB_8h.html#afc3be8e98be7a242c81cd677996f21d8, Driver_USB.h
+ARM_USB_ENDPOINT_INTERRUPT, group__USB__endpoint__type.html#ga9375cd3a2735e7d5c8c359a1cdbc7d95, Driver_USB.c
+ARM_USB_ENDPOINT_ISOCHRONOUS, group__USB__endpoint__type.html#gabb5913e9d1434240588ec43722d3eb16, Driver_USB.c
+ARM_USB_ENDPOINT_MAX_PACKET_SIZE_MASK, Driver__USB_8h.html#acdacc3b2d7854566a90f0fe265a96f9d, Driver_USB.h
+ARM_USB_ENDPOINT_MICROFRAME_TRANSACTIONS_1, Driver__USB_8h.html#aff3c2adf06d5dc8ccb3622b5860b380c, Driver_USB.h
+ARM_USB_ENDPOINT_MICROFRAME_TRANSACTIONS_2, Driver__USB_8h.html#afd061484f2de3a75e89b126f6ed21226, Driver_USB.h
+ARM_USB_ENDPOINT_MICROFRAME_TRANSACTIONS_3, Driver__USB_8h.html#a7c23bf8680f3feaf444d289df3603c38, Driver_USB.h
+ARM_USB_ENDPOINT_MICROFRAME_TRANSACTIONS_MASK, Driver__USB_8h.html#a72544ba674dc6d32c9caffcf9083fdfd, Driver_USB.h
+ARM_USB_ENDPOINT_NUMBER_MASK, Driver__USB_8h.html#a6ef3e2cf16ee3b1356947a17e5d42a6c, Driver_USB.h
+ARM_USB_PID_ACK, Driver__USB_8h.html#a27505b779f79c82f3d7e63f7841b9c98, Driver_USB.h
+ARM_USB_PID_DATA0, Driver__USB_8h.html#a047d50d8c7ffa89fb75608cce2756ac6, Driver_USB.h
+ARM_USB_PID_DATA1, Driver__USB_8h.html#ab46f4fe90edf21e8e88f21a07876d88d, Driver_USB.h
+ARM_USB_PID_DATA2, Driver__USB_8h.html#af3462fb5987bcda04963c7fd02461ced, Driver_USB.h
+ARM_USB_PID_ERR, Driver__USB_8h.html#a56e57da4c1665866bf48a4bff4fa36b7, Driver_USB.h
+ARM_USB_PID_IN, Driver__USB_8h.html#adb2459ddd000755c1ea52183bb8c55bb, Driver_USB.h
+ARM_USB_PID_MDATA, Driver__USB_8h.html#ad78b3806a0963b041135a76eaf2fcd73, Driver_USB.h
+ARM_USB_PID_NAK, Driver__USB_8h.html#a3a0de1078536cc459dd21d9b87b952f5, Driver_USB.h
+ARM_USB_PID_NYET, Driver__USB_8h.html#ab4f0fb1af1b2257eef132a684a58b62b, Driver_USB.h
+ARM_USB_PID_OUT, Driver__USB_8h.html#a828674d5225de2aadf7fb764a22e74f3, Driver_USB.h
+ARM_USB_PID_PING, Driver__USB_8h.html#a2249b4907c4e9fa63a9d5685a6525ae6, Driver_USB.h
+ARM_USB_PID_PRE, Driver__USB_8h.html#aa044bae2705c08f38d6cc40bc32d0323, Driver_USB.h
+ARM_USB_PID_RESERVED, Driver__USB_8h.html#a8a8e917e48e97820b08e36b3da87f678, Driver_USB.h
+ARM_USB_PID_SETUP, Driver__USB_8h.html#a08d69b2a1e3d5ef4ef1a36f591ea0df6, Driver_USB.h
+ARM_USB_PID_SOF, Driver__USB_8h.html#ab8945ae385d3e7d0da9ba9ff461e09c1, Driver_USB.h
+ARM_USB_PID_SPLIT, Driver__USB_8h.html#a136c540358ff3ec0007a7fee6ddcf308, Driver_USB.h
+ARM_USB_PID_STALL, Driver__USB_8h.html#ab7f3d6c2acab8b6b607ff7c063c11444, Driver_USB.h
+ARM_USB_PIN_DM, Driver__USB_8h.html#a5a5348d08c911233e4e9d81d1c42a367, Driver_USB.h
+ARM_USB_PIN_DP, Driver__USB_8h.html#a7f42a0ff2d6e9187428a0126cc140c5b, Driver_USB.h
+ARM_USB_PIN_ID, Driver__USB_8h.html#a03a103d754d9751485b748cd144cbfd7, Driver_USB.h
+ARM_USB_PIN_OC, Driver__USB_8h.html#a03ae07428733660d5e187fec1aede075, Driver_USB.h
+ARM_USB_PIN_VBUS, Driver__USB_8h.html#a390491e93356426de470ae41302dd547, Driver_USB.h
+ARM_USB_ROLE_DEVICE, Driver__USB_8h.html#ab67eb404d64392b8910d7fdaef01aa0d, Driver_USB.h
+ARM_USB_ROLE_HOST, Driver__USB_8h.html#ab21de5df4cadf9bc4381c8c1066205d8, Driver_USB.h
+ARM_USB_ROLE_NONE, Driver__USB_8h.html#a2cb4a6a3dc939c3b13021be266f23e76, Driver_USB.h
+ARM_USB_SPEED_FULL, group__USB__speed.html#ga0d1b465db654b651dcf588c8b59899d5, Driver_USB.c
+ARM_USB_SPEED_HIGH, group__USB__speed.html#ga13fa1e1934021f744dba837776205c89, Driver_USB.c
+ARM_USB_SPEED_LOW, group__USB__speed.html#gae44fe8958474cd90f2288ea27752df27, Driver_USB.c
+ARM_USBD_API_VERSION, Driver__USBD_8h.html#a71df406694e557f19cae5e43ff1960ba, Driver_USBD.h
+ARM_USBD_CAPABILITIES, group__usbd__interface__gr.html#structARM__USBD__CAPABILITIES, 
+ARM_USBD_DeviceConnect, group__usbd__interface__gr.html#ga99207f7ff5e97a7f65754eab7f775fca, Driver_USBD.c
+ARM_USBD_DeviceDisconnect, group__usbd__interface__gr.html#ga37234abecbb63e4e739f9676e489d2d1, Driver_USBD.c
+ARM_USBD_DeviceGetState, group__usbd__interface__gr.html#ga7624d6b2cbe5e6ab5016206ce641eee2, Driver_USBD.c
+ARM_USBD_DeviceRemoteWakeup, group__usbd__interface__gr.html#ga7e149a4c6a0196da24a44f4fada75fb1, Driver_USBD.c
+ARM_USBD_DeviceSetAddress, group__usbd__interface__gr.html#gae66f696584e25fb2ddabe9070fa38670, Driver_USBD.c
+ARM_USBD_EndpointConfigure, group__usbd__interface__gr.html#ga62d7d5bdcf9ca7bf7e6d8434368abad8, Driver_USBD.c
+ARM_USBD_EndpointStall, group__usbd__interface__gr.html#ga9502cd7b8e4c583920fccadc4ccf7975, Driver_USBD.c
+ARM_USBD_EndpointTransfer, group__usbd__interface__gr.html#ga6e69ad097553125bb01a22dc719e0d30, Driver_USBD.c
+ARM_USBD_EndpointTransferAbort, group__usbd__interface__gr.html#ga7cf3bcc105dbb8cbdc915e8caca8529e, Driver_USBD.c
+ARM_USBD_EndpointTransferGetResult, group__usbd__interface__gr.html#gab81fac01522a4d504edcb7b7d3abba6c, Driver_USBD.c
+ARM_USBD_EndpointUnconfigure, group__usbd__interface__gr.html#gaca913df5188dc0f0c4f707b57c2a88fc, Driver_USBD.c
+ARM_USBD_EVENT_HIGH_SPEED, group__USBD__dev__events.html#ga689d1e031013d0e66aeef4243490d843, Driver_USBD.c
+ARM_USBD_EVENT_IN, group__USBD__ep__events.html#ga375d3d8f363a056ff607c5ab3b92a864, Driver_USBD.c
+ARM_USBD_EVENT_OUT, group__USBD__ep__events.html#ga35f7340508acb5fe7a5f43bbcac1887a, Driver_USBD.c
+ARM_USBD_EVENT_RESET, group__USBD__dev__events.html#ga489e1b88f7b0361494ca3a8dc73c227a, Driver_USBD.c
+ARM_USBD_EVENT_RESUME, group__USBD__dev__events.html#ga5b1c9884b237ba7778f79761e5db9f45, Driver_USBD.c
+ARM_USBD_EVENT_SETUP, group__USBD__ep__events.html#gaa0814f6880f4c0ac302ac9ebc8170739, Driver_USBD.c
+ARM_USBD_EVENT_SUSPEND, group__USBD__dev__events.html#ga74dc7c0ba71baf285400d5a555224653, Driver_USBD.c
+ARM_USBD_EVENT_VBUS_OFF, group__USBD__dev__events.html#ga6810c08a6e6a46ba443899e5ba9c3aec, Driver_USBD.c
+ARM_USBD_EVENT_VBUS_ON, group__USBD__dev__events.html#ga32546413cfe55154351f74fb56de1045, Driver_USBD.c
+ARM_USBD_GetCapabilities, group__usbd__interface__gr.html#ga178d01ab7896e1c675b90bbccfe8ea7d, Driver_USBD.c
+ARM_USBD_GetFrameNumber, group__usbd__interface__gr.html#ga4cd050b8343407fe465a27ad1cb7c264, Driver_USBD.c
+ARM_USBD_GetVersion, group__usbd__interface__gr.html#ga1dcb8b7790f0e3613ee3da77e5fd18fc, Driver_USBD.c
+ARM_USBD_Initialize, group__usbd__interface__gr.html#ga60b95c9c0c6767ff5938464cfd748f81, Driver_USBD.c
+ARM_USBD_PowerControl, group__usbd__interface__gr.html#gaa5bdaac19f6df30c6e569abef17cdb42, Driver_USBD.c
+ARM_USBD_ReadSetupPacket, group__usbd__interface__gr.html#ga6bc0ebf699a0f28330f21cab83f85e9e, Driver_USBD.c
+ARM_USBD_SignalDeviceEvent, group__usbd__interface__gr.html#gafe58a4db1d26b21ca5d418ee49e103a5, Driver_USBD.c
+ARM_USBD_SignalDeviceEvent_t, group__usbd__interface__gr.html#ga7c1878799699ddd34cec696da499f7bd, Driver_USBD.h
+ARM_USBD_SignalEndpointEvent, group__usbd__interface__gr.html#ga9aa5bc5cb45084194a77fae1457f6575, Driver_USBD.c
+ARM_USBD_SignalEndpointEvent_t, group__usbd__interface__gr.html#gaae754763700fc5059a6bde57ea2d4e2c, Driver_USBD.h
+ARM_USBD_STATE, group__usbd__interface__gr.html#structARM__USBD__STATE, 
+ARM_USBD_Uninitialize, group__usbd__interface__gr.html#gafaead6713f141be1734de0110eda966b, Driver_USBD.c
+ARM_USBH_API_VERSION, Driver__USBH_8h.html#a032e1e5caca3235109e2d2d6bf2e34bb, Driver_USBH.h
+ARM_USBH_CAPABILITIES, group__usbh__host__gr.html#structARM__USBH__CAPABILITIES, 
+ARM_USBH_EP_HANDLE, Driver__USBH_8h.html#ab2c57d8ea726b331b891167aa4a201c9, Driver_USBH.h
+ARM_USBH_EVENT_BUS_ERROR, group__USBH__pipe__events.html#ga7bd871b1e5c059bee398c32429370724, Driver_USBH.c
+ARM_USBH_EVENT_CONNECT, group__USBH__port__events.html#ga71bfd8b8cd41b8aa6303d5d3a91597e6, Driver_USBH.c
+ARM_USBH_EVENT_DISCONNECT, group__USBH__port__events.html#gaba67919f64e9a08ba1264363b2710d20, Driver_USBH.c
+ARM_USBH_EVENT_HANDSHAKE_ERR, group__USBH__pipe__events.html#gac7cc573f879fbab678dc7d1347c68614, Driver_USBH.c
+ARM_USBH_EVENT_HANDSHAKE_MDATA, group__USBH__pipe__events.html#ga681ce0983f8c77c41f3cc5df1af8d010, Driver_USBH.c
+ARM_USBH_EVENT_HANDSHAKE_NAK, group__USBH__pipe__events.html#ga3895b82193855d9a6f0b7e8a9b65e2c0, Driver_USBH.c
+ARM_USBH_EVENT_HANDSHAKE_NYET, group__USBH__pipe__events.html#ga62ae214576c923ce737a16098e9836e5, Driver_USBH.c
+ARM_USBH_EVENT_HANDSHAKE_STALL, group__USBH__pipe__events.html#ga4fdc44fc78f342576dd11ad7cb84b4b8, Driver_USBH.c
+ARM_USBH_EVENT_OVERCURRENT, group__USBH__port__events.html#ga0955fdc2aedd2c5aa2be6cd782b3f2a8, Driver_USBH.c
+ARM_USBH_EVENT_REMOTE_WAKEUP, group__USBH__port__events.html#ga2b61e9df3c63fd78fc08f79280a7066e, Driver_USBH.c
+ARM_USBH_EVENT_RESET, group__USBH__port__events.html#ga70ae1e0a7872556d302a7f7840843c4a, Driver_USBH.c
+ARM_USBH_EVENT_RESUME, group__USBH__port__events.html#ga42f62bdf6dd639f9f3dffc6c127456e3, Driver_USBH.c
+ARM_USBH_EVENT_SUSPEND, group__USBH__port__events.html#gae1f91db7d31bcebbf60a23fb04cf7eb5, Driver_USBH.c
+ARM_USBH_EVENT_TRANSFER_COMPLETE, group__USBH__pipe__events.html#gab161955b1ab0b7928befe446ef78634b, Driver_USBH.c
+ARM_USBH_GetCapabilities, group__usbh__host__gr.html#gadb509db50fdccfc7198dfd7ac54530d7, Driver_USBH.c
+ARM_USBH_GetFrameNumber, group__usbh__host__gr.html#ga9dc305fc234c9987b9efd679b5042cc9, Driver_USBH.c
+ARM_USBH_GetVersion, group__usbh__host__gr.html#gab11e67e11e7a0edbc8a1afa86b971784, Driver_USBH.c
+ARM_USBH_HCI_CAPABILITIES, group__usbh__hci__gr.html#structARM__USBH__HCI__CAPABILITIES, 
+ARM_USBH_HCI_GetCapabilities, group__usbh__hci__gr.html#gae607c49ca97202500631473a901e8c2b, Driver_USBH.c
+ARM_USBH_HCI_GetVersion, group__usbh__hci__gr.html#ga10109d0c2a9a128225b5e893d3f72d08, Driver_USBH.c
+ARM_USBH_HCI_Initialize, group__usbh__hci__gr.html#gabc1392a544cb64491b5ea5ce6590d832, Driver_USBH.c
+ARM_USBH_HCI_Interrupt, group__usbh__hci__gr.html#ga79d3c2509ed869c8d7d1485acad7b6c6, Driver_USBH.c
+ARM_USBH_HCI_Interrupt_t, group__usbh__hci__gr.html#gac60df9d1f2b3a769f2c30141800a9806, Driver_USBH.h
+ARM_USBH_HCI_PortVbusOnOff, group__usbh__hci__gr.html#gade1e83403c6ea965fe3e6c4c21fbbded, Driver_USBH.c
+ARM_USBH_HCI_PowerControl, group__usbh__hci__gr.html#ga27fa5ec8854cd9877bbef4abffe9a12b, Driver_USBH.c
+ARM_USBH_HCI_Uninitialize, group__usbh__hci__gr.html#gaacb68fdf201cdb1846b31642a760f041, Driver_USBH.c
+ARM_USBH_Initialize, group__usbh__host__gr.html#gad1e73f778c95dd46d4396e7741a97f0b, Driver_USBH.c
+ARM_USBH_PACKET_CSPLIT, group__USBH__packets.html#gadbfbbf7b4709f3ee4c3610da8402cfec, Driver_USBH.c
+ARM_USBH_PACKET_DATA0, group__USBH__packets.html#ga40075aa1d3eff6d4b94dfe28d7745873, Driver_USBH.c
+ARM_USBH_PACKET_DATA1, group__USBH__packets.html#ga34014ff212b26e3ee8c8670a180846e2, Driver_USBH.c
+ARM_USBH_PACKET_DATA_Msk, Driver__USBH_8h.html#a979e5c7ad6bae9b5eb42eb9ee1b6a843, Driver_USBH.h
+ARM_USBH_PACKET_DATA_Pos, Driver__USBH_8h.html#a2b28435952abaeea6fd29480f10e56eb, Driver_USBH.h
+ARM_USBH_PACKET_IN, group__USBH__packets.html#ga08d60ec20c091b5e7e252d137268cb76, Driver_USBH.c
+ARM_USBH_PACKET_OUT, group__USBH__packets.html#ga409b2ae6503e738eb86e35652f9ebf8d, Driver_USBH.c
+ARM_USBH_PACKET_PING, group__USBH__packets.html#ga2eeab58cebb4556214c021ff02c36b16, Driver_USBH.c
+ARM_USBH_PACKET_PRE, group__USBH__packets.html#ga6dd82c7b96bc1339d725a6133a32a62f, Driver_USBH.c
+ARM_USBH_PACKET_SETUP, group__USBH__packets.html#gafb0bcfee8abd4ada7f789aec2993048a, Driver_USBH.c
+ARM_USBH_PACKET_SPLIT_Msk, Driver__USBH_8h.html#ad0c886d7d97a8ad2c343eab0552a09db, Driver_USBH.h
+ARM_USBH_PACKET_SPLIT_Pos, Driver__USBH_8h.html#a41e5706fcf6e028c5c86751b37a27dd6, Driver_USBH.h
+ARM_USBH_PACKET_SSPLIT, group__USBH__packets.html#gaf47930d994c53fc1772caed129aee921, Driver_USBH.c
+ARM_USBH_PACKET_SSPLIT_E, group__USBH__packets.html#gaf99ee84befc6522fef56b21df870df72, Driver_USBH.c
+ARM_USBH_PACKET_SSPLIT_S, group__USBH__packets.html#ga3b8fa0d3aa083718b4f5d60e92394b47, Driver_USBH.c
+ARM_USBH_PACKET_SSPLIT_S_E, group__USBH__packets.html#ga8d2b46fbc04d871abe0661f8acd18a94, Driver_USBH.c
+ARM_USBH_PACKET_TOKEN_Msk, Driver__USBH_8h.html#a366b3541934b74772eba60e6332923ad, Driver_USBH.h
+ARM_USBH_PACKET_TOKEN_Pos, Driver__USBH_8h.html#a8139a9c76ea4a062795130196d3b6ed9, Driver_USBH.h
+ARM_USBH_PIPE_HANDLE, group__usbh__host__gr.html#ga2e4d0ebd0851ba7bf364ae1d8948672c, Driver_USBH.h
+ARM_USBH_PipeCreate, group__usbh__host__gr.html#ga30dcc05151a98c5a8f6fe17e83777fe0, Driver_USBH.c
+ARM_USBH_PipeDelete, group__usbh__host__gr.html#gab2135041e6d481f186015f36fa0d0521, Driver_USBH.c
+ARM_USBH_PipeModify, group__usbh__host__gr.html#ga2076a7ae55f603859c726e57b061ac73, Driver_USBH.c
+ARM_USBH_PipeReset, group__usbh__host__gr.html#ga7f5a605dbe98e450e6965d515fde65a7, Driver_USBH.c
+ARM_USBH_PipeTransfer, group__usbh__host__gr.html#ga817d503a24ad8927fa362c8f6394920d, Driver_USBH.c
+ARM_USBH_PipeTransferAbort, group__usbh__host__gr.html#ga1d4048a076aed71e585cea96a21f0afb, Driver_USBH.c
+ARM_USBH_PipeTransferGetResult, group__usbh__host__gr.html#ga85baa421345a5b92881ad190d72ca47f, Driver_USBH.c
+ARM_USBH_PORT_STATE, group__usbh__host__gr.html#structARM__USBH__PORT__STATE, 
+ARM_USBH_PortGetState, group__usbh__host__gr.html#gaea4ec5453c1d5fe37a2507d3cb4713bc, Driver_USBH.c
+ARM_USBH_PortReset, group__usbh__host__gr.html#gab99882e11ee03018da9ebe33797cc5ff, Driver_USBH.c
+ARM_USBH_PortResume, group__usbh__host__gr.html#gab438b55ada37e2987e77e105f061f2de, Driver_USBH.c
+ARM_USBH_PortSuspend, group__usbh__host__gr.html#ga620f8852a70a47a581001ed3050436d6, Driver_USBH.c
+ARM_USBH_PortVbusOnOff, group__usbh__host__gr.html#gaccca5ddd4a9d04388e7678a3aed3f6e4, Driver_USBH.c
+ARM_USBH_PowerControl, group__usbh__host__gr.html#ga290a5e2e491da784e63be94699974d4a, Driver_USBH.c
+ARM_USBH_SignalEndpointEvent_t, Driver__USBH_8h.html#ab66601b4c31f638479d7ab6efa515dcc, Driver_USBH.h
+ARM_USBH_SignalPipeEvent, group__usbh__host__gr.html#gae58d36afd83a0e32b07e89fb7145c9de, Driver_USBH.c
+ARM_USBH_SignalPipeEvent_t, group__usbh__host__gr.html#ga1a32ebfe0db4a002aae2b0c0f8ece30c, Driver_USBH.h
+ARM_USBH_SignalPortEvent, group__usbh__host__gr.html#ga53619da2a3d56934629084b0d5c4700c, Driver_USBH.c
+ARM_USBH_SignalPortEvent_t, group__usbh__host__gr.html#ga61edcbb6ee863fe87abee488d78e1051, Driver_USBH.h
+ARM_USBH_Uninitialize, group__usbh__host__gr.html#gafc2f18bc12bb0019f9cd1836dcca408d, Driver_USBH.c
+ARM_WIFI_Activate, group__wifi__management__gr.html#ga7d545744a848702d75043de30ea5260a, Driver_WiFi.c
+ARM_WIFI_API_VERSION, Driver__WiFi_8h.html#aa6a3705716b58d58fdbf72d8308f1383, Driver_WiFi.h
+ARM_WIFI_BEACON, group__WiFi__option.html#ga6171d24c661b54465ced2dae7980897c, Driver_WiFi.c
+ARM_WIFI_BSSID, group__WiFi__option.html#gae84cbf48cd5168371621fc5f78aac0a4, Driver_WiFi.c
+ARM_WIFI_BypassControl, group__wifi__bypass__gr.html#ga678fa1aa06ca6aaa67c7eb7a7660730e, Driver_WiFi.c
+ARM_WIFI_CAPABILITIES, group__wifi__control__gr.html#structARM__WIFI__CAPABILITIES, 
+ARM_WIFI_CONFIG_t, group__wifi__management__gr.html#structARM__WIFI__CONFIG__t, 
+ARM_WIFI_Deactivate, group__wifi__management__gr.html#ga1842127df60067481ac2f40d19153e3e, Driver_WiFi.c
+ARM_WIFI_DTIM, group__WiFi__option.html#ga947c297f1364993524bf515beba296f1, Driver_WiFi.c
+ARM_WIFI_EthGetRxFrameSize, group__wifi__bypass__gr.html#gab67442ff061d0c4311a7046bce8d0cd1, Driver_WiFi.c
+ARM_WIFI_EthReadFrame, group__wifi__bypass__gr.html#ga1dbeb5528095af31a60560e0c48321d4, Driver_WiFi.c
+ARM_WIFI_EthSendFrame, group__wifi__bypass__gr.html#gac1da4619feaf62d0cc90cfe44642d16b, Driver_WiFi.c
+ARM_WIFI_EVENT_AP_CONNECT, group__wifi__event.html#ga4a87b9a3c3a404e3917d54df98469a62, Driver_WiFi.c
+ARM_WIFI_EVENT_AP_DISCONNECT, group__wifi__event.html#ga271e73cda122e7ec3c5a5ca71d44eae3, Driver_WiFi.c
+ARM_WIFI_EVENT_ETH_RX_FRAME, group__wifi__event.html#ga833f2c7a47bd2523d7a62ff6506a997f, Driver_WiFi.c
+ARM_WIFI_GetCapabilities, group__wifi__control__gr.html#ga3496996799a4762e9958a8b6af683b4b, Driver_WiFi.c
+ARM_WIFI_GetModuleInfo, group__wifi__control__gr.html#gabdc4c9966a3f22ac6e53119e71e67579, Driver_WiFi.c
+ARM_WIFI_GetNetInfo, group__wifi__management__gr.html#ga29a5b0072470a8c56f0939f3c97ed08e, Driver_WiFi.c
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+SAI Master Clock Prescaler, group__sai__mclk__pres__control.html, 
+SAI Mode, group__sai__mode__control.html, 
+SAI Mono Mode, group__sai__mono__control.html, 
+SAI Protocol, group__sai__protocol__control.html, 
+SAI Slot, group__sai__slot__control.html, 
+SAI Synchronization, group__sai__sync__control.html, 
+Sample Use of Storage Driver, group__SampleUseOfStorageDriver.html, 
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+SetBitrate, group__can__interface__gr.html#a360a314665607fc2d866c24e1608fd06, ARM_DRIVER_CAN
+SetInterface, group__eth__phy__interface__gr.html#a7dfc7cf346c80e7fdb2fe4cea2c61161, ARM_DRIVER_ETH_PHY
+SetMacAddress, group__eth__mac__interface__gr.html#ac640f929dc4d5bde3e4282c75b25c00d, ARM_DRIVER_ETH_MAC
+SetMode, group__eth__phy__interface__gr.html#ae6686344f4d6afa0881d1e545c898a3d, ARM_DRIVER_ETH_PHY::SetMode()
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+SlaveTransmit, group__i2c__interface__gr.html#ae9e3b81b352d4564fd2337fdf0e5488c, ARM_DRIVER_I2C
+smart_card, group__usart__interface__gr.html#aa78e1ee1726d1db2cfa83fd7b5acc8bd, ARM_USART_CAPABILITIES
+smart_card_clock, group__usart__interface__gr.html#a7b3c14ea1b5e9ba0a37ebc05fcfd51a6, ARM_USART_CAPABILITIES
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+SocketClose, group__wifi__interface__gr.html#a471a1be6d9adbccb83ca1f268643031c, ARM_DRIVER_WIFI
+SocketConnect, group__wifi__interface__gr.html#a45cbca28d9866f2ec2ad9df830787dd7, ARM_DRIVER_WIFI
+SocketCreate, group__wifi__interface__gr.html#aa26f0cefe99161484741977a5443e92c, ARM_DRIVER_WIFI
+SocketGetHostByName, group__wifi__interface__gr.html#a62b2512cbaef03d26eb9c1e3004c3364, ARM_DRIVER_WIFI
+SocketGetOpt, group__wifi__interface__gr.html#a4771324fb6f39fb2837e98d9f0ed48ed, ARM_DRIVER_WIFI
+SocketGetPeerName, group__wifi__interface__gr.html#ac45fbc58fd00742cbe712bf26d857359, ARM_DRIVER_WIFI
+SocketGetSockName, group__wifi__interface__gr.html#ab7c3e0211c87bf99e9c42b17a2249f50, ARM_DRIVER_WIFI
+SocketListen, group__wifi__interface__gr.html#a628706c754e1793ec864453a5b517d5c, ARM_DRIVER_WIFI
+SocketRecv, group__wifi__interface__gr.html#aaad6683992e76e3dd9a16eb6b7d43cf4, ARM_DRIVER_WIFI
+SocketRecvFrom, group__wifi__interface__gr.html#a4343cf48bbcfb2101a422d90c34f84e6, ARM_DRIVER_WIFI
+SocketSend, group__wifi__interface__gr.html#a7ff47d391831d547d310dd66f22c2942, ARM_DRIVER_WIFI
+SocketSendTo, group__wifi__interface__gr.html#a248a293faea6f6e1cb781b8153e468fa, ARM_DRIVER_WIFI
+SocketSetOpt, group__wifi__interface__gr.html#a7019060d0869a7dfae8e31aedb46815d, ARM_DRIVER_WIFI
+software_attacks, Driver__Storage_8h.html#a1b6a0329dd65f25a0ab22496ab708306, ARM_STORAGE_SECURITY_FEATURES
+speed, group__usbh__host__gr.html#a220859a8b5da0232739a11cbe7f79fc5, ARM_USBH_PORT_STATE::speed()
+SPI Bit Order, group__spi__bit__order__ctrls.html, 
+SPI Control Codes, group__SPI__control.html, 
+SPI Data Bits, group__spi__data__bits__ctrls.html, 
+SPI Events, group__SPI__events.html, 
+Status Error Codes, group__spi__execution__status.html, 
+SPI Frame Format, group__spi__frame__format__ctrls.html, 
+SPI Interface, group__spi__interface__gr.html, 
+SPI Miscellaneous Controls, group__spi__misc__ctrls.html, 
+SPI Mode Controls, group__spi__mode__ctrls.html, 
+SPI Slave Select Mode, group__spi__slave__select__mode__ctrls.html, 
+ssid, group__wifi__management__gr.html#ae7eccb3e4df8625b86b5572fc16c37c3, ARM_WIFI_NET_INFO_t::ssid()
+start, group__flash__interface__gr.html#a61eb63d26b2fa6c2971603ceccffb14b, ARM_FLASH_SECTOR
+station, group__wifi__control__gr.html#a3c9e76f6560429efd6dcc41ffd4b67b9, ARM_WIFI_CAPABILITIES
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+Storage Interface, group__storage__interface__gr.html, 
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+Status Error Codes, group__usart__execution__status.html, 
+tamper_proof, Driver__Storage_8h.html#ac6f64a064cb84e29a631706586d6000c, ARM_STORAGE_SECURITY_FEATURES
+Theory of Operation, theoryOperation.html, 
+ti_ssi, group__spi__interface__gr.html#a8053c540e5d531b692224bdc2463f36a, ARM_SPI_CAPABILITIES
+total_storage, group__storage__interface__gr.html#a4b14ce1ca2ceea5ce49e81348c5b38f6, ARM_STORAGE_INFO
+Transfer, group__usart__interface__gr.html#ad88b63ed74c03ba06b0599ab06ad4cf7, ARM_DRIVER_USART::Transfer()
+transfer_active, group__mci__interface__gr.html#a2655d3422b720097b091a28e8bbcea8f, ARM_MCI_STATUS
+transfer_error, group__mci__interface__gr.html#a21d4bc1a03e161bd33693619039a6afa, ARM_MCI_STATUS
+transfer_timeout, group__mci__interface__gr.html#a598ae4a196316d6dcb97d07fd337ecdd, ARM_MCI_STATUS
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+tx_rtr_rx_data, group__can__interface__gr.html#a1debac19545140bdfe3c5fa8d53f1863, ARM_CAN_OBJ_CAPABILITIES
+tx_underflow, group__usart__interface__gr.html#a048f45e9d2257a21821f81d9edd17b72, ARM_USART_STATUS::tx_underflow()
+type, group__nand__interface__gr.html#ad44b615021ed3ccb734fcaf583ef4a03, ARM_NAND_ECC_INFO
+Use of Storage APIs, group__StorageDriverFunctions.html, 
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+uhs_driver_type_c, group__mci__interface__gr.html#a3c3df9641e7216dd20d3bc395dc4948f, ARM_MCI_CAPABILITIES
+uhs_driver_type_d, group__mci__interface__gr.html#a639bebbcb9a3a743f4f232fec82e2bfc, ARM_MCI_CAPABILITIES
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+Uninitialize, group__wifi__interface__gr.html#adcf20681a1402869ecb5c6447fada17b, ARM_DRIVER_WIFI::Uninitialize()
+unit_state, group__can__interface__gr.html#a96ec94acab56690b3801e3c5fbd09fa2, ARM_CAN_STATUS
+USART Clock Phase, group__usart__clock__phase.html, 
+USART Clock Polarity, group__usart__clock__polarity.html, 
+USART Control Codes, group__USART__control.html, 
+USART Data Bits, group__usart__data__bits.html, 
+USART Events, group__USART__events.html, 
+USART Flow Control, group__usart__flow__control.html, 
+USART Interface, group__usart__interface__gr.html, 
+USART Miscellaneous Control, group__usart__misc__control.html, 
+USART Mode Control, group__usart__mode__control.html, 
+USART Parity Bit, group__usart__parity__bit.html, 
+USART Stop Bits, group__usart__stop__bits.html, 
+USB Endpoint Type, group__USB__endpoint__type.html, 
+USB Interface, group__usb__interface__gr.html, 
+USB Speed, group__USB__speed.html, 
+USBD Device Events, group__USBD__dev__events.html, 
+USBD Endpoint Events, group__USBD__ep__events.html, 
+USB Device Interface, group__usbd__interface__gr.html, 
+USB OHCI/EHCI, group__usbh__hci__gr.html, 
+USB Host, group__usbh__host__gr.html, 
+USB Host Interface, group__usbh__interface__gr.html, 
+USBH Packet Information, group__USBH__packets.html, 
+USBH Pipe Events, group__USBH__pipe__events.html, 
+USBH Port Events, group__USBH__port__events.html, 
+vbus, group__usbd__interface__gr.html#aa961d5fb2bd3d2960578f1ac3b903070, ARM_USBD_STATE
+vbus_detection, group__usbd__interface__gr.html#a6673fc1aa13f62122ecf51e52a605c6e, ARM_USBD_CAPABILITIES
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+vccq_1v8, group__nand__interface__gr.html#a1896a7548bb6fab285f23cc0d0b23d7d, ARM_NAND_CAPABILITIES::vccq_1v8()
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+vpp, group__nand__interface__gr.html#a75b97f7c917bba90b2f5c747d6857d23, ARM_NAND_CAPABILITIES
+WiFi Socket Address Family definitions, group__wifi__addr__family.html, 
+WiFi Bypass Mode, group__wifi__bypass__gr.html, 
+WiFi Control, group__wifi__control__gr.html, 
+WiFi DHCPv6 Mode, group__wifi__dhcp__v6__mode.html, 
+WiFi Events, group__wifi__event.html, 
+WiFi Interface, group__wifi__interface__gr.html, 
+WiFi Management, group__wifi__management__gr.html, 
+WiFi Option Codes, group__WiFi__option.html, 
+WiFi Socket Protocol definitions, group__wifi__protocol.html, 
+WiFi Security Type, group__wifi__sec__type.html, 
+WiFi Socket Function return codes, group__wifi__soc__func.html, 
+WiFi Socket Option definitions, group__wifi__soc__opt.html, 
+WiFi Socket, group__wifi__socket__gr.html, 
+WiFi Socket Type definitions, group__wifi__socket__type.html, 
+WiFi Protected Setup (WPS) Method, group__wifi__wps__method.html, 
+wp, group__nand__interface__gr.html#afe7f5b149b8d92859398315b1ad31ddc, ARM_NAND_CAPABILITIES
+wp_state, group__mci__interface__gr.html#a02df0162d3a653c36158a7b6a76f6175, ARM_MCI_CAPABILITIES
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+wps_method, group__wifi__management__gr.html#a5e263198499fb98f97d40a9b82579175, ARM_WIFI_CONFIG_t
+wps_pin, group__wifi__management__gr.html#a2047d60666390ea4755ce22603969c4c, ARM_WIFI_CONFIG_t
+wps_station, group__wifi__control__gr.html#a87476544767703fc9f45f81b16cd4429, ARM_WIFI_CAPABILITIES
+WriteData, group__nand__interface__gr.html#a78393d355e539c6f845b33417da60a7e, ARM_DRIVER_NAND
+WriteProtect, group__nand__interface__gr.html#add6fa19a729c42303581214bc9dec819, ARM_DRIVER_NAND
+
diff --git a/docs/Driver/html/index.html b/docs/Driver/html/index.html
index 71348ae..5de08c7 100644
--- a/docs/Driver/html/index.html
+++ b/docs/Driver/html/index.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -131,6 +131,7 @@
 <li><a class="el" href="group__storage__interface__gr.html">Storage</a>: Storage device interface driver.</li>
 <li><a class="el" href="group__usart__interface__gr.html">USART</a>: Universal Synchronous and Asynchronous Receiver/Transmitter interface driver.</li>
 <li><a class="el" href="group__usb__interface__gr.html">USB</a>: Interface driver for USB Host and USB Device communication.</li>
+<li><a class="el" href="group__wifi__interface__gr.html">WiFi</a>: Interface driver for wireless communication.</li>
 </ul>
 <hr/>
 <h2>CMSIS-Driver in ARM::CMSIS Pack </h2>
@@ -151,7 +152,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/modules.html b/docs/Driver/html/modules.html
index aba474a..ee56ac7 100644
--- a/docs/Driver/html/modules.html
+++ b/docs/Driver/html/modules.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Driver
-   &#160;<span id="projectnumber">Version 2.6.0</span>
+   &#160;<span id="projectnumber">Version 2.7.1</span>
    </div>
    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
   </td>
@@ -119,40 +119,40 @@
 <tr id="row_1_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__can__status__code__ctrls.html" target="_self">Status Error Codes</a></td><td class="desc">Status codes of the CAN driver </td></tr>
 <tr id="row_1_1_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__CAN__unit__events.html" target="_self">CAN Unit Events</a></td><td class="desc">Callback unit events notified via <a class="el" href="group__can__interface__gr.html#ga38795d1ed135ce3bd87f31ef1596bccf">ARM_CAN_SignalUnitEvent</a> </td></tr>
 <tr id="row_1_2_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__CAN__events.html" target="_self">CAN Object Events</a></td><td class="desc">Callback objects events notified via <a class="el" href="group__can__interface__gr.html#gabfcaeac9e2ca25936ba5a29f2d594e7e">ARM_CAN_SignalObjectEvent</a> </td></tr>
-<tr id="row_1_3_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_1_3_" src="ftv2mlastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('1_3_')"/><a class="el" href="group__can__control.html" target="_self">CAN Control Codes</a></td><td class="desc">Codes to configure the CAN driver </td></tr>
-<tr id="row_1_3_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__can__identifer__ctrls.html" target="_self">CAN Identifier</a></td><td class="desc">Set object to standard or extended </td></tr>
-<tr id="row_1_3_1_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__can__mode__ctrls.html" target="_self">CAN Operation Codes</a></td><td class="desc">Set CAN operation modes </td></tr>
-<tr id="row_1_3_2_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__can__bus__mode__ctrls.html" target="_self">CAN Bus Communication Mode</a></td><td class="desc">Set or initialize the CAN bus </td></tr>
-<tr id="row_1_3_3_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__can__timeseg__ctrls.html" target="_self">CAN Bit Timing Codes</a></td><td class="desc">Set bit timing </td></tr>
-<tr id="row_1_3_4_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__can__filter__operation__ctrls.html" target="_self">CAN Filter Operation Codes</a></td><td class="desc">Set CAN filter manipulation codes </td></tr>
-<tr id="row_1_3_5_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__can__obj__config__ctrls.html" target="_self">CAN Object Configuration Codes</a></td><td class="desc">CAN Object Configuration codes </td></tr>
+<tr id="row_1_3_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_1_3_" src="ftv2plastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('1_3_')"/><a class="el" href="group__can__control.html" target="_self">CAN Control Codes</a></td><td class="desc">Codes to configure the CAN driver </td></tr>
+<tr id="row_1_3_0_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__can__identifer__ctrls.html" target="_self">CAN Identifier</a></td><td class="desc">Set object to standard or extended </td></tr>
+<tr id="row_1_3_1_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__can__mode__ctrls.html" target="_self">CAN Operation Codes</a></td><td class="desc">Set CAN operation modes </td></tr>
+<tr id="row_1_3_2_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__can__bus__mode__ctrls.html" target="_self">CAN Bus Communication Mode</a></td><td class="desc">Set or initialize the CAN bus </td></tr>
+<tr id="row_1_3_3_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__can__timeseg__ctrls.html" target="_self">CAN Bit Timing Codes</a></td><td class="desc">Set bit timing </td></tr>
+<tr id="row_1_3_4_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__can__filter__operation__ctrls.html" target="_self">CAN Filter Operation Codes</a></td><td class="desc">Set CAN filter manipulation codes </td></tr>
+<tr id="row_1_3_5_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__can__obj__config__ctrls.html" target="_self">CAN Object Configuration Codes</a></td><td class="desc">CAN Object Configuration codes </td></tr>
 <tr id="row_2_"><td class="entry"><img id="arr_2_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('2_')"/><a class="el" href="group__eth__interface__gr.html" target="_self">Ethernet Interface</a></td><td class="desc">Ethernet common definitions (Driver_ETH.h) </td></tr>
 <tr id="row_2_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__eth__interface__types1.html" target="_self">Media Interface Types</a></td><td class="desc">Ethernet Media Interface type </td></tr>
-<tr id="row_2_1_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_2_1_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('2_1_')"/><a class="el" href="group__eth__mac__interface__gr.html" target="_self">Ethernet MAC Interface</a></td><td class="desc">Driver API for Ethernet MAC Peripheral (Driver_ETH_MAC.h) </td></tr>
-<tr id="row_2_1_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__ETH__MAC__events.html" target="_self">Ethernet MAC Events</a></td><td class="desc">The Ethernet MAC driver generates call back events that are notified via the function <a class="el" href="group__eth__mac__interface__gr.html#gae0697be4c4229601f3bfc17e2978ada6">ARM_ETH_MAC_SignalEvent</a> </td></tr>
-<tr id="row_2_1_1_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_2_1_1_" src="ftv2pnode.png" alt="o" width="16" height="22" onclick="toggleFolder('2_1_1_')"/><a class="el" href="group__eth__mac__control.html" target="_self">Ethernet MAC Control Codes</a></td><td class="desc">Configure and control the Ethernet MAC using the <a class="el" href="group__eth__mac__interface__gr.html#gac3e90c66058d20077f04ac8e8b8d0536">ARM_ETH_MAC_Control</a> </td></tr>
+<tr id="row_2_1_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_2_1_" src="ftv2pnode.png" alt="o" width="16" height="22" onclick="toggleFolder('2_1_')"/><a class="el" href="group__eth__mac__interface__gr.html" target="_self">Ethernet MAC Interface</a></td><td class="desc">Driver API for Ethernet MAC Peripheral (Driver_ETH_MAC.h) </td></tr>
+<tr id="row_2_1_0_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__ETH__MAC__events.html" target="_self">Ethernet MAC Events</a></td><td class="desc">The Ethernet MAC driver generates call back events that are notified via the function <a class="el" href="group__eth__mac__interface__gr.html#gae0697be4c4229601f3bfc17e2978ada6">ARM_ETH_MAC_SignalEvent</a> </td></tr>
+<tr id="row_2_1_1_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_2_1_1_" src="ftv2pnode.png" alt="o" width="16" height="22" onclick="toggleFolder('2_1_1_')"/><a class="el" href="group__eth__mac__control.html" target="_self">Ethernet MAC Control Codes</a></td><td class="desc">Configure and control the Ethernet MAC using the <a class="el" href="group__eth__mac__interface__gr.html#gac3e90c66058d20077f04ac8e8b8d0536">ARM_ETH_MAC_Control</a> </td></tr>
 <tr id="row_2_1_1_0_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__eth__mac__ctrls.html" target="_self">Ethernet MAC Controls</a></td><td class="desc">Configure and control the Ethernet MAC interface </td></tr>
 <tr id="row_2_1_1_1_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__eth__mac__configuration__ctrls.html" target="_self">Ethernet MAC Configuration</a></td><td class="desc">Specifies speed mode, link mode, checksum, and frame filtering modes </td></tr>
 <tr id="row_2_1_1_2_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__eth__mac__flush__flag__ctrls.html" target="_self">Ethernet MAC Flush Flags</a></td><td class="desc">Specify controls to flush a buffer </td></tr>
 <tr id="row_2_1_1_3_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__eth__mac__vlan__filter__ctrls.html" target="_self">Ethernet MAC VLAN Filter Flag</a></td><td class="desc">Specify whether to compare only the VLAN Identifier </td></tr>
-<tr id="row_2_1_2_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__eth__mac__time__control.html" target="_self">Ethernet MAC Timer Control Codes</a></td><td class="desc">Control codes for <a class="el" href="group__eth__mac__interface__gr.html#ga85d9dc865af3702b71a514b18a588643">ARM_ETH_MAC_ControlTimer</a> function </td></tr>
-<tr id="row_2_1_3_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__eth__mac__frame__transmit__ctrls.html" target="_self">Ethernet MAC Frame Transmit Flags</a></td><td class="desc">Specify frame transmit flags </td></tr>
-<tr id="row_2_2_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_2_2_" src="ftv2mlastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('2_2_')"/><a class="el" href="group__eth__phy__interface__gr.html" target="_self">Ethernet PHY Interface</a></td><td class="desc">Driver API for Ethernet PHY Peripheral (Driver_ETH_PHY.h) </td></tr>
-<tr id="row_2_2_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__eth__phy__mode__ctrls.html" target="_self">Ethernet PHY Mode</a></td><td class="desc">Specify operation modes of the Ethernet PHY interface </td></tr>
-<tr id="row_3_" class="even"><td class="entry"><img id="arr_3_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('3_')"/><a class="el" href="group__i2c__interface__gr.html" target="_self">I2C Interface</a></td><td class="desc">Driver API for I2C Bus Peripheral (Driver_I2C.h) </td></tr>
-<tr id="row_3_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__I2C__events.html" target="_self">I2C Events</a></td><td class="desc">The I2C driver generates call back events that are notified via the function <a class="el" href="group__i2c__interface__gr.html#gad4f93d2895794b416dc8d8e9de91c05e">ARM_I2C_SignalEvent</a> </td></tr>
-<tr id="row_3_1_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_3_1_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('3_1_')"/><a class="el" href="group__i2c__control__gr.html" target="_self">I2C Control Codes</a></td><td class="desc">Many parameters of the I2C driver are configured using the <a class="el" href="group__i2c__interface__gr.html#ga828f5fa289d065675ef78a9a73d129dc">ARM_I2C_Control</a> function </td></tr>
-<tr id="row_3_1_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__i2c__control__codes.html" target="_self">I2C Control Codes</a></td><td class="desc">Specify operation parameters and various controls </td></tr>
-<tr id="row_3_1_1_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__i2c__bus__speed__ctrls.html" target="_self">I2C Bus Speed</a></td><td class="desc">Specify the I2C bus speed </td></tr>
-<tr id="row_3_2_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__i2c__address__flags.html" target="_self">I2C Address Flags</a></td><td class="desc">Specify address flags </td></tr>
-<tr id="row_4_" class="even"><td class="entry"><img id="arr_4_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('4_')"/><a class="el" href="group__mci__interface__gr.html" target="_self">MCI Interface</a></td><td class="desc">Driver API for Memory Card Interface using SD/MMC interface (Driver_MCI.h) </td></tr>
-<tr id="row_4_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__mci__event__gr.html" target="_self">MCI Events</a></td><td class="desc">The MCI driver generates call back events that are notified via the function <a class="el" href="group__mci__interface__gr.html#gaac2dbd1c1a98436938c5d0d6248cb700">ARM_MCI_SignalEvent</a> </td></tr>
-<tr id="row_4_1_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_4_1_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('4_1_')"/><a class="el" href="group__mci__control__gr.html" target="_self">MCI Control Codes</a></td><td class="desc">Configure and control the MCI using the <a class="el" href="group__mci__interface__gr.html#gaec0506a2aa4ae75cf6bc02528f36fe30">ARM_MCI_Control</a> </td></tr>
-<tr id="row_4_1_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__mci__mode__ctrls.html" target="_self">MCI Controls</a></td><td class="desc">Configure and control the MCI interface </td></tr>
-<tr id="row_4_1_1_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__mci__bus__speed__ctrls.html" target="_self">MCI Bus Speed Mode</a></td><td class="desc">Specify the bus speed mode </td></tr>
-<tr id="row_4_1_2_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__mci__bus__data__width__ctrls.html" target="_self">MCI Bus Data Width</a></td><td class="desc">Specify the data bus width </td></tr>
-<tr id="row_4_1_3_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__mci__cmd__line__ctrls.html" target="_self">MCI CMD Line Mode</a></td><td class="desc">Specify the CMD line mode (Push-Pull or Open Drain) </td></tr>
-<tr id="row_4_1_4_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__mci__driver__strength__ctrls.html" target="_self">MCI Driver Strength</a></td><td class="desc">Specify the driver strength </td></tr>
+<tr id="row_2_1_2_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__eth__mac__time__control.html" target="_self">Ethernet MAC Timer Control Codes</a></td><td class="desc">Control codes for <a class="el" href="group__eth__mac__interface__gr.html#ga85d9dc865af3702b71a514b18a588643">ARM_ETH_MAC_ControlTimer</a> function </td></tr>
+<tr id="row_2_1_3_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__eth__mac__frame__transmit__ctrls.html" target="_self">Ethernet MAC Frame Transmit Flags</a></td><td class="desc">Specify frame transmit flags </td></tr>
+<tr id="row_2_2_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_2_2_" src="ftv2plastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('2_2_')"/><a class="el" href="group__eth__phy__interface__gr.html" target="_self">Ethernet PHY Interface</a></td><td class="desc">Driver API for Ethernet PHY Peripheral (Driver_ETH_PHY.h) </td></tr>
+<tr id="row_2_2_0_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__eth__phy__mode__ctrls.html" target="_self">Ethernet PHY Mode</a></td><td class="desc">Specify operation modes of the Ethernet PHY interface </td></tr>
+<tr id="row_3_"><td class="entry"><img id="arr_3_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('3_')"/><a class="el" href="group__i2c__interface__gr.html" target="_self">I2C Interface</a></td><td class="desc">Driver API for I2C Bus Peripheral (Driver_I2C.h) </td></tr>
+<tr id="row_3_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__I2C__events.html" target="_self">I2C Events</a></td><td class="desc">The I2C driver generates call back events that are notified via the function <a class="el" href="group__i2c__interface__gr.html#gad4f93d2895794b416dc8d8e9de91c05e">ARM_I2C_SignalEvent</a> </td></tr>
+<tr id="row_3_1_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_3_1_" src="ftv2pnode.png" alt="o" width="16" height="22" onclick="toggleFolder('3_1_')"/><a class="el" href="group__i2c__control__gr.html" target="_self">I2C Control Codes</a></td><td class="desc">Many parameters of the I2C driver are configured using the <a class="el" href="group__i2c__interface__gr.html#ga828f5fa289d065675ef78a9a73d129dc">ARM_I2C_Control</a> function </td></tr>
+<tr id="row_3_1_0_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__i2c__control__codes.html" target="_self">I2C Control Codes</a></td><td class="desc">Specify operation parameters and various controls </td></tr>
+<tr id="row_3_1_1_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__i2c__bus__speed__ctrls.html" target="_self">I2C Bus Speed</a></td><td class="desc">Specify the I2C bus speed </td></tr>
+<tr id="row_3_2_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__i2c__address__flags.html" target="_self">I2C Address Flags</a></td><td class="desc">Specify address flags </td></tr>
+<tr id="row_4_"><td class="entry"><img id="arr_4_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('4_')"/><a class="el" href="group__mci__interface__gr.html" target="_self">MCI Interface</a></td><td class="desc">Driver API for Memory Card Interface using SD/MMC interface (Driver_MCI.h) </td></tr>
+<tr id="row_4_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__mci__event__gr.html" target="_self">MCI Events</a></td><td class="desc">The MCI driver generates call back events that are notified via the function <a class="el" href="group__mci__interface__gr.html#gaac2dbd1c1a98436938c5d0d6248cb700">ARM_MCI_SignalEvent</a> </td></tr>
+<tr id="row_4_1_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_4_1_" src="ftv2pnode.png" alt="o" width="16" height="22" onclick="toggleFolder('4_1_')"/><a class="el" href="group__mci__control__gr.html" target="_self">MCI Control Codes</a></td><td class="desc">Configure and control the MCI using the <a class="el" href="group__mci__interface__gr.html#gaec0506a2aa4ae75cf6bc02528f36fe30">ARM_MCI_Control</a> </td></tr>
+<tr id="row_4_1_0_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__mci__mode__ctrls.html" target="_self">MCI Controls</a></td><td class="desc">Configure and control the MCI interface </td></tr>
+<tr id="row_4_1_1_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__mci__bus__speed__ctrls.html" target="_self">MCI Bus Speed Mode</a></td><td class="desc">Specify the bus speed mode </td></tr>
+<tr id="row_4_1_2_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__mci__bus__data__width__ctrls.html" target="_self">MCI Bus Data Width</a></td><td class="desc">Specify the data bus width </td></tr>
+<tr id="row_4_1_3_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__mci__cmd__line__ctrls.html" target="_self">MCI CMD Line Mode</a></td><td class="desc">Specify the CMD line mode (Push-Pull or Open Drain) </td></tr>
+<tr id="row_4_1_4_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__mci__driver__strength__ctrls.html" target="_self">MCI Driver Strength</a></td><td class="desc">Specify the driver strength </td></tr>
 <tr id="row_4_2_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__mci__send__command__flags__ctrls.html" target="_self">MCI Send Command Flags</a></td><td class="desc">Specify various options for sending commands to the card and the expected response </td></tr>
 <tr id="row_4_3_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__mci__transfer__ctrls.html" target="_self">MCI Transfer Controls</a></td><td class="desc">Specify data transfer mode </td></tr>
 <tr id="row_4_4_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__mci__card__power__ctrls.html" target="_self">MCI Card Power Controls</a></td><td class="desc">Specify Memory Card Power supply voltage </td></tr>
@@ -160,11 +160,11 @@
 <tr id="row_5_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__nand__execution__status.html" target="_self">Status Error Codes</a></td><td class="desc">Negative values indicate errors (NAND has specific codes in addition to common <a class="el" href="group__execution__status.html">Status Error Codes</a>) </td></tr>
 <tr id="row_5_1_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__NAND__events.html" target="_self">NAND Events</a></td><td class="desc">The NAND driver generates call back events that are notified via the function <a class="el" href="group__nand__interface__gr.html#gaf4ce80b0fd6717de7ddfb1cfaf7dd754">ARM_NAND_SignalEvent</a> </td></tr>
 <tr id="row_5_2_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__nand__driver__flag__codes.html" target="_self">NAND Flags</a></td><td class="desc">Specify Flag codes </td></tr>
-<tr id="row_5_3_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_5_3_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('5_3_')"/><a class="el" href="group__nand__control__gr.html" target="_self">NAND Control Codes</a></td><td class="desc">Many parameters of the NAND driver are configured using the <a class="el" href="group__nand__interface__gr.html#ga83061d6d53ffb148853efbc87a864607">ARM_NAND_Control</a> function </td></tr>
-<tr id="row_5_3_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__nand__control__codes.html" target="_self">NAND Mode Controls</a></td><td class="desc">Specify operation modes of the NAND interface </td></tr>
-<tr id="row_5_3_1_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__nand__bus__mode__codes.html" target="_self">NAND Bus Modes</a></td><td class="desc">Specify bus mode of the NAND interface </td></tr>
-<tr id="row_5_3_2_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__nand__data__bus__width__codes.html" target="_self">NAND Data Bus Width</a></td><td class="desc">Specify data bus width of the NAND interface </td></tr>
-<tr id="row_5_3_3_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__nand__driver__strength__codes.html" target="_self">NAND Driver Strength</a></td><td class="desc">Specify driver strength of the NAND interface </td></tr>
+<tr id="row_5_3_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_5_3_" src="ftv2pnode.png" alt="o" width="16" height="22" onclick="toggleFolder('5_3_')"/><a class="el" href="group__nand__control__gr.html" target="_self">NAND Control Codes</a></td><td class="desc">Many parameters of the NAND driver are configured using the <a class="el" href="group__nand__interface__gr.html#ga83061d6d53ffb148853efbc87a864607">ARM_NAND_Control</a> function </td></tr>
+<tr id="row_5_3_0_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__nand__control__codes.html" target="_self">NAND Mode Controls</a></td><td class="desc">Specify operation modes of the NAND interface </td></tr>
+<tr id="row_5_3_1_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__nand__bus__mode__codes.html" target="_self">NAND Bus Modes</a></td><td class="desc">Specify bus mode of the NAND interface </td></tr>
+<tr id="row_5_3_2_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__nand__data__bus__width__codes.html" target="_self">NAND Data Bus Width</a></td><td class="desc">Specify data bus width of the NAND interface </td></tr>
+<tr id="row_5_3_3_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__nand__driver__strength__codes.html" target="_self">NAND Driver Strength</a></td><td class="desc">Specify driver strength of the NAND interface </td></tr>
 <tr id="row_5_4_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__nand__driver__ecc__codes.html" target="_self">NAND ECC Codes</a></td><td class="desc">Specify ECC codes </td></tr>
 <tr id="row_5_5_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__nand__driver__seq__exec__codes.html" target="_self">NAND Sequence Execution Codes</a></td><td class="desc">Specify execution codes </td></tr>
 <tr id="row_6_" class="even"><td class="entry"><img id="arr_6_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('6_')"/><a class="el" href="group__flash__interface__gr.html" target="_self">Flash Interface</a></td><td class="desc">Driver API for Flash Device Interface (Driver_Flash.h) </td></tr>
@@ -172,58 +172,73 @@
 <tr id="row_7_" class="even"><td class="entry"><img id="arr_7_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('7_')"/><a class="el" href="group__sai__interface__gr.html" target="_self">SAI Interface</a></td><td class="desc">Driver API for Serial Audio Interface (Driver_SAI.h) </td></tr>
 <tr id="row_7_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sai__execution__status.html" target="_self">Status Error Codes</a></td><td class="desc">Negative values indicate errors (SAI has specific codes in addition to common <a class="el" href="group__execution__status.html">Status Error Codes</a>) </td></tr>
 <tr id="row_7_1_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__SAI__events.html" target="_self">SAI Events</a></td><td class="desc">The SAI driver generates call back events that are notified via the function <a class="el" href="group__sai__interface__gr.html#gaedf3347cb25d6bf2faad1bbb35ad79f4">ARM_SAI_SignalEvent</a> </td></tr>
-<tr id="row_7_2_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_7_2_" src="ftv2mlastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('7_2_')"/><a class="el" href="group__sai__control.html" target="_self">SAI Control Codes</a></td><td class="desc">Many parameters of the SAI driver are configured using the <a class="el" href="group__sai__interface__gr.html#ga405a0769c33da6801055db0fb9b6c869">ARM_SAI_Control</a> function </td></tr>
-<tr id="row_7_2_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img id="arr_7_2_0_" src="ftv2pnode.png" alt="o" width="16" height="22" onclick="toggleFolder('7_2_0_')"/><a class="el" href="group__sai__configure__control.html" target="_self">SAI Configuration</a></td><td class="desc">Specify Transmitter/Receiver configuration </td></tr>
-<tr id="row_7_2_0_0_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sai__mode__control.html" target="_self">SAI Mode</a></td><td class="desc">Defines Transmitter/Receiver mode </td></tr>
-<tr id="row_7_2_0_1_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sai__sync__control.html" target="_self">SAI Synchronization</a></td><td class="desc">Defines Transmitter/Receiver synchronization </td></tr>
-<tr id="row_7_2_0_2_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sai__protocol__control.html" target="_self">SAI Protocol</a></td><td class="desc">Defines Transmitter/Receiver protocol </td></tr>
-<tr id="row_7_2_0_3_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sai__data__bits__control.html" target="_self">SAI Data Size</a></td><td class="desc">Defines data size in bits (per channel/slot) </td></tr>
-<tr id="row_7_2_0_4_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sai__bit__order__control.html" target="_self">SAI Bit Order</a></td><td class="desc">Defines the bit order </td></tr>
-<tr id="row_7_2_0_5_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sai__mono__control.html" target="_self">SAI Mono Mode</a></td><td class="desc">Defines mono mode </td></tr>
-<tr id="row_7_2_0_6_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sai__companding__control.html" target="_self">SAI Companding</a></td><td class="desc">Defines companding </td></tr>
-<tr id="row_7_2_0_7_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sai__clock__pol__control.html" target="_self">SAI Clock Polarity</a></td><td class="desc">Defines clock polarity </td></tr>
-<tr id="row_7_2_0_8_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sai__frame__control.html" target="_self">SAI Frame</a></td><td class="desc">Defines frame </td></tr>
-<tr id="row_7_2_0_9_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sai__slot__control.html" target="_self">SAI Slot</a></td><td class="desc">Defines data slots </td></tr>
-<tr id="row_7_2_0_10_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sai__mclk__pin__control.html" target="_self">SAI Master Clock Pin</a></td><td class="desc">Defines MCLK pin </td></tr>
-<tr id="row_7_2_0_11_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__sai__mclk__pres__control.html" target="_self">SAI Master Clock Prescaler</a></td><td class="desc">Defines MCLK prescaler </td></tr>
-<tr id="row_7_2_1_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__sai__controls.html" target="_self">SAI Controls</a></td><td class="desc">Specifies controls </td></tr>
+<tr id="row_7_2_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_7_2_" src="ftv2plastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('7_2_')"/><a class="el" href="group__sai__control.html" target="_self">SAI Control Codes</a></td><td class="desc">Many parameters of the SAI driver are configured using the <a class="el" href="group__sai__interface__gr.html#ga405a0769c33da6801055db0fb9b6c869">ARM_SAI_Control</a> function </td></tr>
+<tr id="row_7_2_0_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img id="arr_7_2_0_" src="ftv2pnode.png" alt="o" width="16" height="22" onclick="toggleFolder('7_2_0_')"/><a class="el" href="group__sai__configure__control.html" target="_self">SAI Configuration</a></td><td class="desc">Specify Transmitter/Receiver configuration </td></tr>
+<tr id="row_7_2_0_0_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sai__mode__control.html" target="_self">SAI Mode</a></td><td class="desc">Defines Transmitter/Receiver mode </td></tr>
+<tr id="row_7_2_0_1_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sai__sync__control.html" target="_self">SAI Synchronization</a></td><td class="desc">Defines Transmitter/Receiver synchronization </td></tr>
+<tr id="row_7_2_0_2_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sai__protocol__control.html" target="_self">SAI Protocol</a></td><td class="desc">Defines Transmitter/Receiver protocol </td></tr>
+<tr id="row_7_2_0_3_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sai__data__bits__control.html" target="_self">SAI Data Size</a></td><td class="desc">Defines data size in bits (per channel/slot) </td></tr>
+<tr id="row_7_2_0_4_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sai__bit__order__control.html" target="_self">SAI Bit Order</a></td><td class="desc">Defines the bit order </td></tr>
+<tr id="row_7_2_0_5_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sai__mono__control.html" target="_self">SAI Mono Mode</a></td><td class="desc">Defines mono mode </td></tr>
+<tr id="row_7_2_0_6_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sai__companding__control.html" target="_self">SAI Companding</a></td><td class="desc">Defines companding </td></tr>
+<tr id="row_7_2_0_7_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sai__clock__pol__control.html" target="_self">SAI Clock Polarity</a></td><td class="desc">Defines clock polarity </td></tr>
+<tr id="row_7_2_0_8_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sai__frame__control.html" target="_self">SAI Frame</a></td><td class="desc">Defines frame </td></tr>
+<tr id="row_7_2_0_9_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sai__slot__control.html" target="_self">SAI Slot</a></td><td class="desc">Defines data slots </td></tr>
+<tr id="row_7_2_0_10_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sai__mclk__pin__control.html" target="_self">SAI Master Clock Pin</a></td><td class="desc">Defines MCLK pin </td></tr>
+<tr id="row_7_2_0_11_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__sai__mclk__pres__control.html" target="_self">SAI Master Clock Prescaler</a></td><td class="desc">Defines MCLK prescaler </td></tr>
+<tr id="row_7_2_1_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__sai__controls.html" target="_self">SAI Controls</a></td><td class="desc">Specifies controls </td></tr>
 <tr id="row_8_" class="even"><td class="entry"><img id="arr_8_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('8_')"/><a class="el" href="group__spi__interface__gr.html" target="_self">SPI Interface</a></td><td class="desc">Driver API for SPI Bus Peripheral (Driver_SPI.h) </td></tr>
 <tr id="row_8_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__spi__execution__status.html" target="_self">Status Error Codes</a></td><td class="desc">Negative values indicate errors (SPI has specific codes in addition to common <a class="el" href="group__execution__status.html">Status Error Codes</a>) </td></tr>
 <tr id="row_8_1_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__SPI__events.html" target="_self">SPI Events</a></td><td class="desc">The SPI driver generates call back events that are notified via the function <a class="el" href="group__spi__interface__gr.html#ga505b2d787348d51351d38fee98ccba7e">ARM_SPI_SignalEvent</a> </td></tr>
-<tr id="row_8_2_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_8_2_" src="ftv2mlastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('8_2_')"/><a class="el" href="group__SPI__control.html" target="_self">SPI Control Codes</a></td><td class="desc">Many parameters of the SPI driver are configured using the <a class="el" href="group__spi__interface__gr.html#gad18d229992598d6677bec250015e5d1a">ARM_SPI_Control</a> function </td></tr>
-<tr id="row_8_2_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__spi__mode__ctrls.html" target="_self">SPI Mode Controls</a></td><td class="desc">Specifies SPI mode </td></tr>
-<tr id="row_8_2_1_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__spi__frame__format__ctrls.html" target="_self">SPI Frame Format</a></td><td class="desc">Defines the frame format </td></tr>
-<tr id="row_8_2_2_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__spi__data__bits__ctrls.html" target="_self">SPI Data Bits</a></td><td class="desc">Defines the number of data bits </td></tr>
-<tr id="row_8_2_3_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__spi__bit__order__ctrls.html" target="_self">SPI Bit Order</a></td><td class="desc">Defines the bit order </td></tr>
-<tr id="row_8_2_4_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__spi__slave__select__mode__ctrls.html" target="_self">SPI Slave Select Mode</a></td><td class="desc">Specifies SPI slave select mode </td></tr>
-<tr id="row_8_2_5_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__spi__misc__ctrls.html" target="_self">SPI Miscellaneous Controls</a></td><td class="desc">Specifies additional miscellaneous controls </td></tr>
+<tr id="row_8_2_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_8_2_" src="ftv2plastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('8_2_')"/><a class="el" href="group__SPI__control.html" target="_self">SPI Control Codes</a></td><td class="desc">Many parameters of the SPI driver are configured using the <a class="el" href="group__spi__interface__gr.html#gad18d229992598d6677bec250015e5d1a">ARM_SPI_Control</a> function </td></tr>
+<tr id="row_8_2_0_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__spi__mode__ctrls.html" target="_self">SPI Mode Controls</a></td><td class="desc">Specifies SPI mode </td></tr>
+<tr id="row_8_2_1_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__spi__frame__format__ctrls.html" target="_self">SPI Frame Format</a></td><td class="desc">Defines the frame format </td></tr>
+<tr id="row_8_2_2_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__spi__data__bits__ctrls.html" target="_self">SPI Data Bits</a></td><td class="desc">Defines the number of data bits </td></tr>
+<tr id="row_8_2_3_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__spi__bit__order__ctrls.html" target="_self">SPI Bit Order</a></td><td class="desc">Defines the bit order </td></tr>
+<tr id="row_8_2_4_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__spi__slave__select__mode__ctrls.html" target="_self">SPI Slave Select Mode</a></td><td class="desc">Specifies SPI slave select mode </td></tr>
+<tr id="row_8_2_5_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__spi__misc__ctrls.html" target="_self">SPI Miscellaneous Controls</a></td><td class="desc">Specifies additional miscellaneous controls </td></tr>
 <tr id="row_9_" class="even"><td class="entry"><img id="arr_9_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('9_')"/><a class="el" href="group__storage__interface__gr.html" target="_self">Storage Interface</a></td><td class="desc">Driver API for Storage Device Interface (Driver_Storage.h) </td></tr>
 <tr id="row_9_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__StorageDriverFunctions.html" target="_self">Use of Storage APIs</a></td><td class="desc"></td></tr>
 <tr id="row_9_1_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__SampleUseOfStorageDriver.html" target="_self">Sample Use of Storage Driver</a></td><td class="desc"></td></tr>
 <tr id="row_10_"><td class="entry"><img id="arr_10_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('10_')"/><a class="el" href="group__usart__interface__gr.html" target="_self">USART Interface</a></td><td class="desc">Driver API for Universal Synchronous Asynchronous Receiver/Transmitter (Driver_USART.h) </td></tr>
 <tr id="row_10_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__usart__execution__status.html" target="_self">Status Error Codes</a></td><td class="desc">Negative values indicate errors (USART has specific codes in addition to common <a class="el" href="group__execution__status.html">Status Error Codes</a>) </td></tr>
 <tr id="row_10_1_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__USART__events.html" target="_self">USART Events</a></td><td class="desc">The USART driver generates call back events that are notified via the function <a class="el" href="group__usart__interface__gr.html#gad796cd023f8f6300a6caadcc39d43cbf">ARM_USART_SignalEvent</a> </td></tr>
-<tr id="row_10_2_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_10_2_" src="ftv2mlastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('10_2_')"/><a class="el" href="group__USART__control.html" target="_self">USART Control Codes</a></td><td class="desc">Many parameters of the USART driver are configured using the <a class="el" href="group__usart__interface__gr.html#gad8ffdde2123b5412de3005c456da677d">ARM_USART_Control</a> function </td></tr>
-<tr id="row_10_2_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__usart__mode__control.html" target="_self">USART Mode Control</a></td><td class="desc">Specify USART mode </td></tr>
-<tr id="row_10_2_1_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__usart__misc__control.html" target="_self">USART Miscellaneous Control</a></td><td class="desc">Specifies additional miscellaneous controls </td></tr>
-<tr id="row_10_2_2_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__usart__data__bits.html" target="_self">USART Data Bits</a></td><td class="desc">Defines the number of data bits </td></tr>
-<tr id="row_10_2_3_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__usart__parity__bit.html" target="_self">USART Parity Bit</a></td><td class="desc">Defines the parity bit </td></tr>
-<tr id="row_10_2_4_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__usart__stop__bits.html" target="_self">USART Stop Bits</a></td><td class="desc">Defines the number of stop bits </td></tr>
-<tr id="row_10_2_5_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__usart__flow__control.html" target="_self">USART Flow Control</a></td><td class="desc">Specifies RTS/CTS flow control </td></tr>
-<tr id="row_10_2_6_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__usart__clock__polarity.html" target="_self">USART Clock Polarity</a></td><td class="desc">Defines the clock polarity for the synchronous mode </td></tr>
-<tr id="row_10_2_7_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__usart__clock__phase.html" target="_self">USART Clock Phase</a></td><td class="desc">Defines the clock phase for the synchronous mode </td></tr>
-<tr id="row_11_"><td class="entry"><img id="arr_11_" src="ftv2mlastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('11_')"/><a class="el" href="group__usb__interface__gr.html" target="_self">USB Interface</a></td><td class="desc">USB common definitions (Driver_USB.h) </td></tr>
-<tr id="row_11_0_" class="even"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img id="arr_11_0_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('11_0_')"/><a class="el" href="group__usbd__interface__gr.html" target="_self">USB Device Interface</a></td><td class="desc">Driver API for USB Device Peripheral (Driver_USBD.h) </td></tr>
-<tr id="row_11_0_0_"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__USBD__dev__events.html" target="_self">USBD Device Events</a></td><td class="desc">The USB Device driver generates Device call back events that are notified via the function <a class="el" href="group__usbd__interface__gr.html#gafe58a4db1d26b21ca5d418ee49e103a5">ARM_USBD_SignalDeviceEvent</a> </td></tr>
-<tr id="row_11_0_1_" class="even"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__USBD__ep__events.html" target="_self">USBD Endpoint Events</a></td><td class="desc">The USB Device driver generates Endpoint call back events that are notified via the function <a class="el" href="group__usbd__interface__gr.html#ga9aa5bc5cb45084194a77fae1457f6575">ARM_USBD_SignalEndpointEvent</a> </td></tr>
-<tr id="row_11_1_"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img id="arr_11_1_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('11_1_')"/><a class="el" href="group__usbh__interface__gr.html" target="_self">USB Host Interface</a></td><td class="desc">Driver API for USB Host Peripheral (Driver_USBH.h) </td></tr>
-<tr id="row_11_1_0_" class="even"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_11_1_0_" src="ftv2pnode.png" alt="o" width="16" height="22" onclick="toggleFolder('11_1_0_')"/><a class="el" href="group__usbh__host__gr.html" target="_self">USB Host</a></td><td class="desc">Driver API for USB Host </td></tr>
-<tr id="row_11_1_0_0_" style="display:none;"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__USBH__port__events.html" target="_self">USBH Port Events</a></td><td class="desc">The USB Host driver generates Port call back events that are notified via the function <a class="el" href="group__usbh__host__gr.html#ga53619da2a3d56934629084b0d5c4700c">ARM_USBH_SignalPortEvent</a> </td></tr>
-<tr id="row_11_1_0_1_" style="display:none;"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__USBH__pipe__events.html" target="_self">USBH Pipe Events</a></td><td class="desc">The USB Host driver generates Pipe call back events that are notified via the function <a class="el" href="group__usbh__host__gr.html#gae58d36afd83a0e32b07e89fb7145c9de">ARM_USBH_SignalPipeEvent</a> </td></tr>
-<tr id="row_11_1_0_2_" style="display:none;"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__USBH__packets.html" target="_self">USBH Packet Information</a></td><td class="desc">Specify USB packet information used by the function <a class="el" href="group__usbh__host__gr.html#ga817d503a24ad8927fa362c8f6394920d">ARM_USBH_PipeTransfer</a> </td></tr>
-<tr id="row_11_1_1_"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__usbh__hci__gr.html" target="_self">USB OHCI/EHCI</a></td><td class="desc">Driver API for USB OHCI/EHCI </td></tr>
-<tr id="row_11_2_" class="even"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__USB__speed.html" target="_self">USB Speed</a></td><td class="desc">USB Speed definitions </td></tr>
-<tr id="row_11_3_"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__USB__endpoint__type.html" target="_self">USB Endpoint Type</a></td><td class="desc">USB Endpoint Type definitions </td></tr>
+<tr id="row_10_2_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_10_2_" src="ftv2plastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('10_2_')"/><a class="el" href="group__USART__control.html" target="_self">USART Control Codes</a></td><td class="desc">Many parameters of the USART driver are configured using the <a class="el" href="group__usart__interface__gr.html#gad8ffdde2123b5412de3005c456da677d">ARM_USART_Control</a> function </td></tr>
+<tr id="row_10_2_0_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__usart__mode__control.html" target="_self">USART Mode Control</a></td><td class="desc">Specify USART mode </td></tr>
+<tr id="row_10_2_1_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__usart__misc__control.html" target="_self">USART Miscellaneous Control</a></td><td class="desc">Specifies additional miscellaneous controls </td></tr>
+<tr id="row_10_2_2_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__usart__data__bits.html" target="_self">USART Data Bits</a></td><td class="desc">Defines the number of data bits </td></tr>
+<tr id="row_10_2_3_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__usart__parity__bit.html" target="_self">USART Parity Bit</a></td><td class="desc">Defines the parity bit </td></tr>
+<tr id="row_10_2_4_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__usart__stop__bits.html" target="_self">USART Stop Bits</a></td><td class="desc">Defines the number of stop bits </td></tr>
+<tr id="row_10_2_5_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__usart__flow__control.html" target="_self">USART Flow Control</a></td><td class="desc">Specifies RTS/CTS flow control </td></tr>
+<tr id="row_10_2_6_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__usart__clock__polarity.html" target="_self">USART Clock Polarity</a></td><td class="desc">Defines the clock polarity for the synchronous mode </td></tr>
+<tr id="row_10_2_7_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__usart__clock__phase.html" target="_self">USART Clock Phase</a></td><td class="desc">Defines the clock phase for the synchronous mode </td></tr>
+<tr id="row_11_"><td class="entry"><img id="arr_11_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('11_')"/><a class="el" href="group__usb__interface__gr.html" target="_self">USB Interface</a></td><td class="desc">USB common definitions (Driver_USB.h) </td></tr>
+<tr id="row_11_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_11_0_" src="ftv2pnode.png" alt="o" width="16" height="22" onclick="toggleFolder('11_0_')"/><a class="el" href="group__usbd__interface__gr.html" target="_self">USB Device Interface</a></td><td class="desc">Driver API for USB Device Peripheral (Driver_USBD.h) </td></tr>
+<tr id="row_11_0_0_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__USBD__dev__events.html" target="_self">USBD Device Events</a></td><td class="desc">The USB Device driver generates Device call back events that are notified via the function <a class="el" href="group__usbd__interface__gr.html#gafe58a4db1d26b21ca5d418ee49e103a5">ARM_USBD_SignalDeviceEvent</a> </td></tr>
+<tr id="row_11_0_1_" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__USBD__ep__events.html" target="_self">USBD Endpoint Events</a></td><td class="desc">The USB Device driver generates Endpoint call back events that are notified via the function <a class="el" href="group__usbd__interface__gr.html#ga9aa5bc5cb45084194a77fae1457f6575">ARM_USBD_SignalEndpointEvent</a> </td></tr>
+<tr id="row_11_1_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_11_1_" src="ftv2pnode.png" alt="o" width="16" height="22" onclick="toggleFolder('11_1_')"/><a class="el" href="group__usbh__interface__gr.html" target="_self">USB Host Interface</a></td><td class="desc">Driver API for USB Host Peripheral (Driver_USBH.h) </td></tr>
+<tr id="row_11_1_0_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_11_1_0_" src="ftv2pnode.png" alt="o" width="16" height="22" onclick="toggleFolder('11_1_0_')"/><a class="el" href="group__usbh__host__gr.html" target="_self">USB Host</a></td><td class="desc">Driver API for USB Host </td></tr>
+<tr id="row_11_1_0_0_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__USBH__port__events.html" target="_self">USBH Port Events</a></td><td class="desc">The USB Host driver generates Port call back events that are notified via the function <a class="el" href="group__usbh__host__gr.html#ga53619da2a3d56934629084b0d5c4700c">ARM_USBH_SignalPortEvent</a> </td></tr>
+<tr id="row_11_1_0_1_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__USBH__pipe__events.html" target="_self">USBH Pipe Events</a></td><td class="desc">The USB Host driver generates Pipe call back events that are notified via the function <a class="el" href="group__usbh__host__gr.html#gae58d36afd83a0e32b07e89fb7145c9de">ARM_USBH_SignalPipeEvent</a> </td></tr>
+<tr id="row_11_1_0_2_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__USBH__packets.html" target="_self">USBH Packet Information</a></td><td class="desc">Specify USB packet information used by the function <a class="el" href="group__usbh__host__gr.html#ga817d503a24ad8927fa362c8f6394920d">ARM_USBH_PipeTransfer</a> </td></tr>
+<tr id="row_11_1_1_" class="even" style="display:none;"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__usbh__hci__gr.html" target="_self">USB OHCI/EHCI</a></td><td class="desc">Driver API for USB OHCI/EHCI </td></tr>
+<tr id="row_11_2_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__USB__speed.html" target="_self">USB Speed</a></td><td class="desc">USB Speed definitions </td></tr>
+<tr id="row_11_3_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__USB__endpoint__type.html" target="_self">USB Endpoint Type</a></td><td class="desc">USB Endpoint Type definitions </td></tr>
+<tr id="row_12_" class="even"><td class="entry"><img id="arr_12_" src="ftv2mlastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('12_')"/><a class="el" href="group__wifi__interface__gr.html" target="_self">WiFi Interface</a></td><td class="desc">Driver API for WiFi (Driver_WiFi.h) </td></tr>
+<tr id="row_12_0_"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img id="arr_12_0_" src="ftv2pnode.png" alt="o" width="16" height="22" onclick="toggleFolder('12_0_')"/><a class="el" href="group__wifi__control__gr.html" target="_self">WiFi Control</a></td><td class="desc">Control functions for the WiFi module </td></tr>
+<tr id="row_12_0_0_" class="even" style="display:none;"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__wifi__event.html" target="_self">WiFi Events</a></td><td class="desc">The WiFi driver generates call back events that are notified via the function <a class="el" href="group__wifi__control__gr.html#ga0c8243dee4bb161132692516f048bcec">ARM_WIFI_SignalEvent</a> </td></tr>
+<tr id="row_12_1_" class="even"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img id="arr_12_1_" src="ftv2pnode.png" alt="o" width="16" height="22" onclick="toggleFolder('12_1_')"/><a class="el" href="group__wifi__management__gr.html" target="_self">WiFi Management</a></td><td class="desc">Configure and manage the connection to a WiFi access point (AP) or configure and manage the access point (AP) </td></tr>
+<tr id="row_12_1_0_" style="display:none;"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__WiFi__option.html" target="_self">WiFi Option Codes</a></td><td class="desc">WiFi Option Codes for <a class="el" href="group__wifi__management__gr.html#gaf38a7aeb470eec596febc850c8b69ccf">ARM_WIFI_SetOption</a> or <a class="el" href="group__wifi__management__gr.html#ga56910984e5068f6502e12f72e1f80edf">ARM_WIFI_GetOption</a> function </td></tr>
+<tr id="row_12_1_1_" style="display:none;"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__wifi__sec__type.html" target="_self">WiFi Security Type</a></td><td class="desc">Specifies WiFi security type for <a class="el" href="group__wifi__management__gr.html#ga7d545744a848702d75043de30ea5260a">ARM_WIFI_Activate</a> </td></tr>
+<tr id="row_12_1_2_" style="display:none;"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__wifi__wps__method.html" target="_self">WiFi Protected Setup (WPS) Method</a></td><td class="desc">Specifies WiFi WPS method for <a class="el" href="group__wifi__management__gr.html#ga7d545744a848702d75043de30ea5260a">ARM_WIFI_Activate</a> </td></tr>
+<tr id="row_12_1_3_" style="display:none;"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__wifi__dhcp__v6__mode.html" target="_self">WiFi DHCPv6 Mode</a></td><td class="desc">Specifies IPv6 Dynamic Host Configuration Protocol (DHCP) Mode </td></tr>
+<tr id="row_12_2_"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__wifi__bypass__gr.html" target="_self">WiFi Bypass Mode</a></td><td class="desc">Transfer Ethernet frames by WiFi module </td></tr>
+<tr id="row_12_3_" class="even"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img id="arr_12_3_" src="ftv2plastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('12_3_')"/><a class="el" href="group__wifi__socket__gr.html" target="_self">WiFi Socket</a></td><td class="desc">Socket interface to IP stack running on WiFi module </td></tr>
+<tr id="row_12_3_0_" style="display:none;"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__wifi__addr__family.html" target="_self">WiFi Socket Address Family definitions</a></td><td class="desc">WiFi Socket Address Family definitions </td></tr>
+<tr id="row_12_3_1_" style="display:none;"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__wifi__socket__type.html" target="_self">WiFi Socket Type definitions</a></td><td class="desc">WiFi Socket Type definitions </td></tr>
+<tr id="row_12_3_2_" style="display:none;"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__wifi__protocol.html" target="_self">WiFi Socket Protocol definitions</a></td><td class="desc">WiFi Socket Protocol definitions </td></tr>
+<tr id="row_12_3_3_" style="display:none;"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__wifi__soc__opt.html" target="_self">WiFi Socket Option definitions</a></td><td class="desc">WiFi Socket Option definitions </td></tr>
+<tr id="row_12_3_4_" style="display:none;"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__wifi__soc__func.html" target="_self">WiFi Socket Function return codes</a></td><td class="desc">WiFi Socket Function return codes </td></tr>
 </table>
 </div><!-- directory -->
 </div><!-- contents -->
@@ -231,7 +246,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Driver/html/modules.js b/docs/Driver/html/modules.js
index e42f728..f9db6c8 100644
--- a/docs/Driver/html/modules.js
+++ b/docs/Driver/html/modules.js
@@ -11,5 +11,6 @@
     [ "SPI Interface", "group__spi__interface__gr.html", "group__spi__interface__gr" ],
     [ "Storage Interface", "group__storage__interface__gr.html", "group__storage__interface__gr" ],
     [ "USART Interface", "group__usart__interface__gr.html", "group__usart__interface__gr" ],
-    [ "USB Interface", "group__usb__interface__gr.html", "group__usb__interface__gr" ]
+    [ "USB Interface", "group__usb__interface__gr.html", "group__usb__interface__gr" ],
+    [ "WiFi Interface", "group__wifi__interface__gr.html", "group__wifi__interface__gr" ]
 ];
\ No newline at end of file
diff --git a/docs/Driver/html/navtree.js b/docs/Driver/html/navtree.js
index 5929b3b..47265f2 100644
--- a/docs/Driver/html/navtree.js
+++ b/docs/Driver/html/navtree.js
@@ -41,11 +41,12 @@
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@@ -124,7 +124,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:14 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:32 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
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     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Driver/html/referenceImplementation.html b/docs/Driver/html/referenceImplementation.html
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+   &#160;<span id="projectnumber">Version 2.7.1</span>
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    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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 <tr>
 <td>Driver_USBH.h </td><td><a class="el" href="group__usbh__interface__gr.html">USB Host Interface</a> </td></tr>
+<tr>
+<td>Driver_WiFi.h </td><td><a class="el" href="group__wifi__interface__gr.html">WiFi Interface</a> </td></tr>
 </table>
 <h1><a class="anchor" id="DriverTemplates"></a>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
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diff --git a/docs/Driver/html/search/all_14.js b/docs/Driver/html/search/all_14.js
index 32003e2..172cea2 100644
--- a/docs/Driver/html/search/all_14.js
+++ b/docs/Driver/html/search/all_14.js
@@ -1,7 +1,26 @@
 var searchData=
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+  ['wifi_20bypass_20mode',['WiFi Bypass Mode',['../group__wifi__bypass__gr.html',1,'']]],
+  ['wifi_20control',['WiFi Control',['../group__wifi__control__gr.html',1,'']]],
+  ['wifi_20dhcpv6_20mode',['WiFi DHCPv6 Mode',['../group__wifi__dhcp__v6__mode.html',1,'']]],
+  ['wifi_20events',['WiFi Events',['../group__wifi__event.html',1,'']]],
+  ['wifi_20interface',['WiFi Interface',['../group__wifi__interface__gr.html',1,'']]],
+  ['wifi_20management',['WiFi Management',['../group__wifi__management__gr.html',1,'']]],
+  ['wifi_20option_20codes',['WiFi Option Codes',['../group__WiFi__option.html',1,'']]],
+  ['wifi_20socket_20protocol_20definitions',['WiFi Socket Protocol definitions',['../group__wifi__protocol.html',1,'']]],
+  ['wifi_20security_20type',['WiFi Security Type',['../group__wifi__sec__type.html',1,'']]],
+  ['wifi_20socket_20function_20return_20codes',['WiFi Socket Function return codes',['../group__wifi__soc__func.html',1,'']]],
+  ['wifi_20socket_20option_20definitions',['WiFi Socket Option definitions',['../group__wifi__soc__opt.html',1,'']]],
+  ['wifi_20socket',['WiFi Socket',['../group__wifi__socket__gr.html',1,'']]],
+  ['wifi_20socket_20type_20definitions',['WiFi Socket Type definitions',['../group__wifi__socket__type.html',1,'']]],
+  ['wifi_20protected_20setup_20_28wps_29_20method',['WiFi Protected Setup (WPS) Method',['../group__wifi__wps__method.html',1,'']]],
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+  ['wps_5fpin',['wps_pin',['../group__wifi__management__gr.html#a2047d60666390ea4755ce22603969c4c',1,'ARM_WIFI_CONFIG_t']]],
+  ['wps_5fstation',['wps_station',['../group__wifi__control__gr.html#a87476544767703fc9f45f81b16cd4429',1,'ARM_WIFI_CAPABILITIES']]],
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index afd1590..78f9752 100644
--- a/docs/Driver/html/search/all_2.js
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+  ['bssid',['bssid',['../group__wifi__management__gr.html#a19c52baafe5797c359c5e0f5776499d7',1,'ARM_WIFI_SCAN_INFO_t']]],
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+  ['bypass_5fmode',['bypass_mode',['../group__wifi__control__gr.html#adbcc47408fb8c50d262a3be535108186',1,'ARM_WIFI_CAPABILITIES']]],
+  ['bypasscontrol',['BypassControl',['../group__wifi__interface__gr.html#a18c6762aa46cec65b65135eaeadebf23',1,'ARM_DRIVER_WIFI']]]
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diff --git a/docs/Driver/html/search/all_3.js b/docs/Driver/html/search/all_3.js
index d47fa61..d02a044 100644
--- a/docs/Driver/html/search/all_3.js
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index d253bd1..4d05e95 100644
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+  ['deactivate',['Deactivate',['../group__wifi__interface__gr.html#ae9a38e69c7b7face914560e872378ed1',1,'ARM_DRIVER_WIFI']]],
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   ['driver_5fusbh_2eh',['Driver_USBH.h',['../Driver__USBH_8h.html',1,'']]],
+  ['driver_5fwifi_2ec',['Driver_WiFi.c',['../Driver__WiFi_8c.html',1,'']]],
+  ['driver_5fwifi_2eh',['Driver_WiFi.h',['../Driver__WiFi_8h.html',1,'']]],
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index 235b99f..ca7a7b5 100644
--- a/docs/Driver/html/search/all_5.js
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   ['ethernet_20phy_20mode',['Ethernet PHY Mode',['../group__eth__phy__mode__ctrls.html',1,'']]],
+  ['ethgetrxframesize',['EthGetRxFrameSize',['../group__wifi__interface__gr.html#af7ecc54209ce3725037cb5c9629151cf',1,'ARM_DRIVER_WIFI']]],
+  ['ethreadframe',['EthReadFrame',['../group__wifi__interface__gr.html#a544ca40b7157efce5000cd83aa92f8a0',1,'ARM_DRIVER_WIFI']]],
+  ['ethsendframe',['EthSendFrame',['../group__wifi__interface__gr.html#a2648d7e0d1c10c48923d8d20d99311ab',1,'ARM_DRIVER_WIFI']]],
+  ['event_5fap_5fconnect',['event_ap_connect',['../group__wifi__control__gr.html#a9fc191093a9bc356c3d85e9cbf185620',1,'ARM_WIFI_CAPABILITIES']]],
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   ['arm_5feth_5fmac_5fapi_5fversion',['ARM_ETH_MAC_API_VERSION',['../Driver__ETH__MAC_8h.html#a89ade7fd7f91b1b6e21883a8f823a8cc',1,'Driver_ETH_MAC.h']]],
@@ -210,5 +211,6 @@
   ['arm_5fusbh_5fpacket_5fsplit_5fpos',['ARM_USBH_PACKET_SPLIT_Pos',['../Driver__USBH_8h.html#a41e5706fcf6e028c5c86751b37a27dd6',1,'Driver_USBH.h']]],
   ['arm_5fusbh_5fpacket_5ftoken_5fmsk',['ARM_USBH_PACKET_TOKEN_Msk',['../Driver__USBH_8h.html#a366b3541934b74772eba60e6332923ad',1,'Driver_USBH.h']]],
   ['arm_5fusbh_5fpacket_5ftoken_5fpos',['ARM_USBH_PACKET_TOKEN_Pos',['../Driver__USBH_8h.html#a8139a9c76ea4a062795130196d3b6ed9',1,'Driver_USBH.h']]],
-  ['arm_5fusbh_5fsignalendpointevent_5ft',['ARM_USBH_SignalEndpointEvent_t',['../Driver__USBH_8h.html#ab66601b4c31f638479d7ab6efa515dcc',1,'Driver_USBH.h']]]
+  ['arm_5fusbh_5fsignalendpointevent_5ft',['ARM_USBH_SignalEndpointEvent_t',['../Driver__USBH_8h.html#ab66601b4c31f638479d7ab6efa515dcc',1,'Driver_USBH.h']]],
+  ['arm_5fwifi_5fapi_5fversion',['ARM_WIFI_API_VERSION',['../Driver__WiFi_8h.html#aa6a3705716b58d58fdbf72d8308f1383',1,'Driver_WiFi.h']]]
 ];
diff --git a/docs/Driver/html/search/files_0.js b/docs/Driver/html/search/files_0.js
index 1cd779a..2ebaa7f 100644
--- a/docs/Driver/html/search/files_0.js
+++ b/docs/Driver/html/search/files_0.js
@@ -31,5 +31,7 @@
   ['driver_5fusbd_2ec',['Driver_USBD.c',['../Driver__USBD_8c.html',1,'']]],
   ['driver_5fusbd_2eh',['Driver_USBD.h',['../Driver__USBD_8h.html',1,'']]],
   ['driver_5fusbh_2ec',['Driver_USBH.c',['../Driver__USBH_8c.html',1,'']]],
-  ['driver_5fusbh_2eh',['Driver_USBH.h',['../Driver__USBH_8h.html',1,'']]]
+  ['driver_5fusbh_2eh',['Driver_USBH.h',['../Driver__USBH_8h.html',1,'']]],
+  ['driver_5fwifi_2ec',['Driver_WiFi.c',['../Driver__WiFi_8c.html',1,'']]],
+  ['driver_5fwifi_2eh',['Driver_WiFi.h',['../Driver__WiFi_8h.html',1,'']]]
 ];
diff --git a/docs/Driver/html/search/functions_0.js b/docs/Driver/html/search/functions_0.js
index 5cf49d3..3ad2232 100644
--- a/docs/Driver/html/search/functions_0.js
+++ b/docs/Driver/html/search/functions_0.js
@@ -200,5 +200,39 @@
   ['arm_5fusbh_5fpowercontrol',['ARM_USBH_PowerControl',['../group__usbh__host__gr.html#ga290a5e2e491da784e63be94699974d4a',1,'Driver_USBH.c']]],
   ['arm_5fusbh_5fsignalpipeevent',['ARM_USBH_SignalPipeEvent',['../group__usbh__host__gr.html#gae58d36afd83a0e32b07e89fb7145c9de',1,'Driver_USBH.c']]],
   ['arm_5fusbh_5fsignalportevent',['ARM_USBH_SignalPortEvent',['../group__usbh__host__gr.html#ga53619da2a3d56934629084b0d5c4700c',1,'Driver_USBH.c']]],
-  ['arm_5fusbh_5funinitialize',['ARM_USBH_Uninitialize',['../group__usbh__host__gr.html#gafc2f18bc12bb0019f9cd1836dcca408d',1,'Driver_USBH.c']]]
+  ['arm_5fusbh_5funinitialize',['ARM_USBH_Uninitialize',['../group__usbh__host__gr.html#gafc2f18bc12bb0019f9cd1836dcca408d',1,'Driver_USBH.c']]],
+  ['arm_5fwifi_5factivate',['ARM_WIFI_Activate',['../group__wifi__management__gr.html#ga7d545744a848702d75043de30ea5260a',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fbypasscontrol',['ARM_WIFI_BypassControl',['../group__wifi__bypass__gr.html#ga678fa1aa06ca6aaa67c7eb7a7660730e',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fdeactivate',['ARM_WIFI_Deactivate',['../group__wifi__management__gr.html#ga1842127df60067481ac2f40d19153e3e',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fethgetrxframesize',['ARM_WIFI_EthGetRxFrameSize',['../group__wifi__bypass__gr.html#gab67442ff061d0c4311a7046bce8d0cd1',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fethreadframe',['ARM_WIFI_EthReadFrame',['../group__wifi__bypass__gr.html#ga1dbeb5528095af31a60560e0c48321d4',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fethsendframe',['ARM_WIFI_EthSendFrame',['../group__wifi__bypass__gr.html#gac1da4619feaf62d0cc90cfe44642d16b',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fgetcapabilities',['ARM_WIFI_GetCapabilities',['../group__wifi__control__gr.html#ga3496996799a4762e9958a8b6af683b4b',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fgetmoduleinfo',['ARM_WIFI_GetModuleInfo',['../group__wifi__control__gr.html#gabdc4c9966a3f22ac6e53119e71e67579',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fgetnetinfo',['ARM_WIFI_GetNetInfo',['../group__wifi__management__gr.html#ga29a5b0072470a8c56f0939f3c97ed08e',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fgetoption',['ARM_WIFI_GetOption',['../group__wifi__management__gr.html#ga56910984e5068f6502e12f72e1f80edf',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fgetversion',['ARM_WIFI_GetVersion',['../group__wifi__control__gr.html#gad349fb835926a508e2a33501c0dff6a2',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5finitialize',['ARM_WIFI_Initialize',['../group__wifi__control__gr.html#gadc4b9aaae0fdf7d489b1d81e3c2f3474',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fisconnected',['ARM_WIFI_IsConnected',['../group__wifi__management__gr.html#ga3d641222defb5f52f6dae4ce1d540d0f',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fping',['ARM_WIFI_Ping',['../group__wifi__socket__gr.html#gac7a8abb9e23f3f52dabce4153a53c1ca',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fpowercontrol',['ARM_WIFI_PowerControl',['../group__wifi__control__gr.html#ga48d4cb7c00e96d2b928cc4468d4e623b',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fscan',['ARM_WIFI_Scan',['../group__wifi__management__gr.html#ga856972af36e51cf0c4112029332d529f',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fsetoption',['ARM_WIFI_SetOption',['../group__wifi__management__gr.html#gaf38a7aeb470eec596febc850c8b69ccf',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fsignalevent',['ARM_WIFI_SignalEvent',['../group__wifi__control__gr.html#ga0c8243dee4bb161132692516f048bcec',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fsocketaccept',['ARM_WIFI_SocketAccept',['../group__wifi__socket__gr.html#ga24e6a015e519373c3f108cc5aa764ef8',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fsocketbind',['ARM_WIFI_SocketBind',['../group__wifi__socket__gr.html#gae69f7822b658765f1cd3f74e9a50c246',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fsocketclose',['ARM_WIFI_SocketClose',['../group__wifi__socket__gr.html#ga391464de71b6a5d300fda9434fe87a87',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fsocketconnect',['ARM_WIFI_SocketConnect',['../group__wifi__socket__gr.html#gac0f189afbd35914d4c85e77b40672b16',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fsocketcreate',['ARM_WIFI_SocketCreate',['../group__wifi__socket__gr.html#ga1433b297315ab394f1544a18548ffcc6',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fsocketgethostbyname',['ARM_WIFI_SocketGetHostByName',['../group__wifi__socket__gr.html#ga0c37435c6abc68ee0f1f4357b503e0bf',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fsocketgetopt',['ARM_WIFI_SocketGetOpt',['../group__wifi__socket__gr.html#ga6d69360e9774937b7bdc03b45fbc9075',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fsocketgetpeername',['ARM_WIFI_SocketGetPeerName',['../group__wifi__socket__gr.html#gaa484a931d55d163477920bc865dd9220',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fsocketgetsockname',['ARM_WIFI_SocketGetSockName',['../group__wifi__socket__gr.html#gac187e418893de33817e4fcbdd85dbaee',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fsocketlisten',['ARM_WIFI_SocketListen',['../group__wifi__socket__gr.html#ga4929aab257781dcaae7197f917991779',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fsocketrecv',['ARM_WIFI_SocketRecv',['../group__wifi__socket__gr.html#gaecc9ba19491ed00c27da3f5677895d48',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fsocketrecvfrom',['ARM_WIFI_SocketRecvFrom',['../group__wifi__socket__gr.html#ga2b15232d69f2ae8e189512d6c68c8a81',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fsocketsend',['ARM_WIFI_SocketSend',['../group__wifi__socket__gr.html#gaee8615b026e8525fb21ca45ba3778ac8',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fsocketsendto',['ARM_WIFI_SocketSendTo',['../group__wifi__socket__gr.html#ga5ddd3dd5f863b8392e4281dd48a28d28',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5fsocketsetopt',['ARM_WIFI_SocketSetOpt',['../group__wifi__socket__gr.html#ga5de80d6729d9504a21dd5d31dc504017',1,'Driver_WiFi.c']]],
+  ['arm_5fwifi_5funinitialize',['ARM_WIFI_Uninitialize',['../group__wifi__control__gr.html#gae1e488d4ecc365e30712e6b1711a9c5d',1,'Driver_WiFi.c']]]
 ];
diff --git a/docs/Driver/html/search/groups_8.html b/docs/Driver/html/search/groups_8.html
new file mode 100644
index 0000000..863d136
--- /dev/null
+++ b/docs/Driver/html/search/groups_8.html
@@ -0,0 +1,26 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html><head><title></title>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta name="generator" content="Doxygen 1.8.6">
+<link rel="stylesheet" type="text/css" href="search.css"/>
+<script type="text/javascript" src="groups_8.js"></script>
+<script type="text/javascript" src="search.js"></script>
+</head>
+<body class="SRPage">
+<div id="SRIndex">
+<div class="SRStatus" id="Loading">Loading...</div>
+<div id="SRResults"></div>
+<script type="text/javascript"><!--
+createResults();
+--></script>
+<div class="SRStatus" id="Searching">Searching...</div>
+<div class="SRStatus" id="NoMatches">No Matches</div>
+<script type="text/javascript"><!--
+document.getElementById("Loading").style.display="none";
+document.getElementById("NoMatches").style.display="none";
+var searchResults = new SearchResults("searchResults");
+searchResults.Search();
+--></script>
+</div>
+</body>
+</html>
diff --git a/docs/Driver/html/search/groups_8.js b/docs/Driver/html/search/groups_8.js
new file mode 100644
index 0000000..b994902
--- /dev/null
+++ b/docs/Driver/html/search/groups_8.js
@@ -0,0 +1,18 @@
+var searchData=
+[
+  ['wifi_20socket_20address_20family_20definitions',['WiFi Socket Address Family definitions',['../group__wifi__addr__family.html',1,'']]],
+  ['wifi_20bypass_20mode',['WiFi Bypass Mode',['../group__wifi__bypass__gr.html',1,'']]],
+  ['wifi_20control',['WiFi Control',['../group__wifi__control__gr.html',1,'']]],
+  ['wifi_20dhcpv6_20mode',['WiFi DHCPv6 Mode',['../group__wifi__dhcp__v6__mode.html',1,'']]],
+  ['wifi_20events',['WiFi Events',['../group__wifi__event.html',1,'']]],
+  ['wifi_20interface',['WiFi Interface',['../group__wifi__interface__gr.html',1,'']]],
+  ['wifi_20management',['WiFi Management',['../group__wifi__management__gr.html',1,'']]],
+  ['wifi_20option_20codes',['WiFi Option Codes',['../group__WiFi__option.html',1,'']]],
+  ['wifi_20socket_20protocol_20definitions',['WiFi Socket Protocol definitions',['../group__wifi__protocol.html',1,'']]],
+  ['wifi_20security_20type',['WiFi Security Type',['../group__wifi__sec__type.html',1,'']]],
+  ['wifi_20socket_20function_20return_20codes',['WiFi Socket Function return codes',['../group__wifi__soc__func.html',1,'']]],
+  ['wifi_20socket_20option_20definitions',['WiFi Socket Option definitions',['../group__wifi__soc__opt.html',1,'']]],
+  ['wifi_20socket',['WiFi Socket',['../group__wifi__socket__gr.html',1,'']]],
+  ['wifi_20socket_20type_20definitions',['WiFi Socket Type definitions',['../group__wifi__socket__type.html',1,'']]],
+  ['wifi_20protected_20setup_20_28wps_29_20method',['WiFi Protected Setup (WPS) Method',['../group__wifi__wps__method.html',1,'']]]
+];
diff --git a/docs/Driver/html/search/search.css b/docs/Driver/html/search/search.css
index 1746d13..4d7612f 100644
--- a/docs/Driver/html/search/search.css
+++ b/docs/Driver/html/search/search.css
@@ -4,22 +4,16 @@
     float: left;
 }
 
-#searchli {
-    float: right;
-    display: block;
-    width: 170px;
-    height: 24px;
-}
-
 #MSearchBox {
     white-space : nowrap;
     position: absolute;
     float: none;
     display: inline;
-    margin-top: 3px;
+    margin-top: 8px;
     right: 0px;
     width: 170px;
     z-index: 102;
+    background-color: white;
 }
 
 #MSearchBox .left
@@ -54,7 +48,7 @@
     height:19px;
     background:url('search_m.png') repeat-x;
     border:none;
-    width:116px;
+    width:111px;
     margin-left:20px;
     padding-left:4px;
     color: #909090;
@@ -224,6 +218,10 @@
     text-decoration: underline;
 }
 
+span.SRScope {
+    padding-left: 4px;
+}
+
 .SRPage .SRStatus {
     padding: 2px 5px;
     font-size: 8pt;
@@ -238,3 +236,36 @@
     margin-left: 10px;
     margin-right: 10px;
 }
+
+/*---------------- External search page results */
+
+.searchresult {
+    background-color: #F0F3F8;
+}
+
+.pages b {
+   color: white;
+   padding: 5px 5px 3px 5px;
+   background-image: url("../tab_a.png");
+   background-repeat: repeat-x;
+   text-shadow: 0 1px 1px #000000;
+}
+
+.pages {
+    line-height: 17px;
+    margin-left: 4px;
+    text-decoration: none;
+}
+
+.hl {
+    font-weight: bold;
+}
+
+#searchresults {
+    margin-bottom: 20px;
+}
+
+.searchpages {
+    margin-top: 10px;
+}
+
diff --git a/docs/Driver/html/search/search.js b/docs/Driver/html/search/search.js
index 71d7393..31a13cb 100644
--- a/docs/Driver/html/search/search.js
+++ b/docs/Driver/html/search/search.js
@@ -16,7 +16,7 @@
   6: "a",
   7: "a",
   8: "_a",
-  9: "cefimnsu",
+  9: "cefimnsuw",
   10: "dort"
 };
 
diff --git a/docs/Driver/html/search/typedefs_0.js b/docs/Driver/html/search/typedefs_0.js
index 91cced6..7833f3f 100644
--- a/docs/Driver/html/search/typedefs_0.js
+++ b/docs/Driver/html/search/typedefs_0.js
@@ -18,5 +18,6 @@
   ['arm_5fusbh_5fhci_5finterrupt_5ft',['ARM_USBH_HCI_Interrupt_t',['../group__usbh__hci__gr.html#gac60df9d1f2b3a769f2c30141800a9806',1,'Driver_USBH.h']]],
   ['arm_5fusbh_5fpipe_5fhandle',['ARM_USBH_PIPE_HANDLE',['../group__usbh__host__gr.html#ga2e4d0ebd0851ba7bf364ae1d8948672c',1,'Driver_USBH.h']]],
   ['arm_5fusbh_5fsignalpipeevent_5ft',['ARM_USBH_SignalPipeEvent_t',['../group__usbh__host__gr.html#ga1a32ebfe0db4a002aae2b0c0f8ece30c',1,'Driver_USBH.h']]],
-  ['arm_5fusbh_5fsignalportevent_5ft',['ARM_USBH_SignalPortEvent_t',['../group__usbh__host__gr.html#ga61edcbb6ee863fe87abee488d78e1051',1,'Driver_USBH.h']]]
+  ['arm_5fusbh_5fsignalportevent_5ft',['ARM_USBH_SignalPortEvent_t',['../group__usbh__host__gr.html#ga61edcbb6ee863fe87abee488d78e1051',1,'Driver_USBH.h']]],
+  ['arm_5fwifi_5fsignalevent_5ft',['ARM_WIFI_SignalEvent_t',['../group__wifi__control__gr.html#gac0f04bbdd431c87a680626154c3e0a41',1,'Driver_WiFi.h']]]
 ];
diff --git a/docs/Driver/html/search/variables_0.js b/docs/Driver/html/search/variables_0.js
index 7cfec07..aebdc02 100644
--- a/docs/Driver/html/search/variables_0.js
+++ b/docs/Driver/html/search/variables_0.js
@@ -3,9 +3,11 @@
   ['abortsequence',['AbortSequence',['../group__nand__interface__gr.html#ad6e1d53e9028baff856899f795c0d0c8',1,'ARM_DRIVER_NAND']]],
   ['aborttransfer',['AbortTransfer',['../group__mci__interface__gr.html#afa8103cc20ba96420b7471455bbb87e4',1,'ARM_DRIVER_MCI']]],
   ['acls',['acls',['../Driver__Storage_8h.html#abbd64eb8edcf2263db5c8ac140dc0448',1,'ARM_STORAGE_SECURITY_FEATURES']]],
+  ['activate',['Activate',['../group__wifi__interface__gr.html#a444ea7bda2c45eab34050d2a895baeec',1,'ARM_DRIVER_WIFI']]],
   ['active',['active',['../group__usbd__interface__gr.html#ab22b96a3efad48f5a542f46c1b224800',1,'ARM_USBD_STATE']]],
   ['addr',['addr',['../group__storage__interface__gr.html#a0e89cf6b9f6cd3125470b1bed2b823df',1,'ARM_STORAGE_BLOCK']]],
   ['address_5f10_5fbit',['address_10_bit',['../group__i2c__interface__gr.html#a4ffaaf168a9f43e98d710abff5861ed5',1,'ARM_I2C_CAPABILITIES']]],
+  ['ap',['ap',['../group__wifi__control__gr.html#ae980bcb85233b9c5904072246ac71dd7',1,'ARM_WIFI_CAPABILITIES']]],
   ['api',['api',['../group__common__drv__gr.html#ad180da20fbde1d3dafc074af87c19540',1,'ARM_DRIVER_VERSION']]],
   ['arbitration_5flost',['arbitration_lost',['../group__i2c__interface__gr.html#ab3e3c8eeeae7fbe3c51dcb3d4104af24',1,'ARM_I2C_STATUS']]],
   ['asynchronous',['asynchronous',['../group__sai__interface__gr.html#a75ba2507ea29601a309393e794f4413d',1,'ARM_SAI_CAPABILITIES::asynchronous()'],['../group__usart__interface__gr.html#a75ba2507ea29601a309393e794f4413d',1,'ARM_USART_CAPABILITIES::asynchronous()']]],
diff --git a/docs/Driver/html/search/variables_1.js b/docs/Driver/html/search/variables_1.js
index afd1590..78f9752 100644
--- a/docs/Driver/html/search/variables_1.js
+++ b/docs/Driver/html/search/variables_1.js
@@ -3,6 +3,9 @@
   ['b',['b',['../group__eth__interface__gr.html#ab590318ac859d0e57e15c3dd6c62a605',1,'ARM_ETH_MAC_ADDR']]],
   ['board_5flevel_5fattacks',['board_level_attacks',['../Driver__Storage_8h.html#a3981b8fafe1520f11518f2b6e12ef644',1,'ARM_STORAGE_SECURITY_FEATURES']]],
   ['brs',['brs',['../group__can__interface__gr.html#a3539c043c5868c59f76c736fe2bcadf4',1,'ARM_CAN_MSG_INFO']]],
+  ['bssid',['bssid',['../group__wifi__management__gr.html#a19c52baafe5797c359c5e0f5776499d7',1,'ARM_WIFI_SCAN_INFO_t']]],
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index 76026a1..6ae99af 100644
--- a/docs/Driver/html/search/variables_f.js
+++ b/docs/Driver/html/search/variables_f.js
@@ -1,12 +1,13 @@
 var searchData=
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:13 for CMSIS-Driver by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved.
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diff --git a/docs/General/html/Overview.png b/docs/General/html/Overview.png
index 764232e..51236d2 100644
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diff --git a/docs/General/html/cm_revisionHistory.html b/docs/General/html/cm_revisionHistory.html
index c5641d4..8587359 100644
--- a/docs/General/html/cm_revisionHistory.html
+++ b/docs/General/html/cm_revisionHistory.html
@@ -27,9 +27,9 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS
-   &#160;<span id="projectnumber">Version 5.4.0</span>
+   &#160;<span id="projectnumber">Version 5.6.0</span>
    </div>
-   <div id="projectbrief">Cortex Microcontroller Software Interface Standard</div>
+   <div id="projectbrief">Software Interface Standard for Arm Cortex-based Microcontrollers</div>
   </td>
  </tr>
  </tbody>
@@ -90,6 +90,130 @@
 <tr>
 <th>Version </th><th>Description  </th></tr>
 <tr>
+<td>5.6.0 </td><td><ul>
+<li>CMSIS-Core (Cortex-M) 5.3.0<ul>
+<li>Added provisions for compiler-independent C startup code.</li>
+</ul>
+</li>
+<li>CMSIS-Core (Cortex-A) 1.1.4<ul>
+<li>Fixed __FPU_Enable.</li>
+</ul>
+</li>
+<li>CMSIS-Driver 2.7.1<ul>
+<li>Finalized WiFi Interface API 1.0.0</li>
+</ul>
+</li>
+<li>CMSIS-DSP 1.7.0 (see revision history for details)<ul>
+<li>New Neon versions of f32 functions</li>
+<li>Compilation flags for FFTs</li>
+</ul>
+</li>
+<li>CMSIS-NN 1.2.0 (unchanged)</li>
+<li>CMSIS-RTOS 1.03 (unchanged)<ul>
+<li>RTX 4.82.0 (see revision history for details)</li>
+</ul>
+</li>
+<li>CMSIS-RTOS 2.1.3 (unchanged)<ul>
+<li>RTX 5.5.1 (see revision history for details)</li>
+</ul>
+</li>
+<li>CMSIS-Pack 1.6.0 (unchanged)</li>
+<li>CMSIS-SVD 1.3.3 (unchanged)</li>
+<li>CMSIS-DAP 2.0.0 (unchanged)</li>
+<li>CMSIS-Zone 0.12.0 (preview)<ul>
+<li>Completely reworked</li>
+</ul>
+</li>
+<li>Devices<ul>
+<li>Generalized C startup code for all Cortex-M family devices.</li>
+<li>Updated Cortex-A memory regions and system configuration files.</li>
+</ul>
+</li>
+<li>Utilities<ul>
+<li>SVDConv 3.3.27</li>
+<li>PackChk 1.3.82 (unchanged)   </li>
+</ul>
+</li>
+</ul>
+</td></tr>
+<tr>
+<td>5.5.1 </td><td><ul>
+<li>CMSIS-Core (Cortex-M) 5.2.1<ul>
+<li>Fixed compilation issue in cmsis_armclang_ltm.h</li>
+</ul>
+</li>
+<li>CMSIS-Core (Cortex-A) 1.1.3 (unchanged)</li>
+<li>CMSIS-Driver 2.7.0 (unchanged)</li>
+<li>CMSIS-DSP 1.6.0 (unchanged)</li>
+<li>CMSIS-NN 1.1.0 (unchanged)</li>
+<li>CMSIS-RTOS 2.1.3 (unchanged)<ul>
+<li>RTX 5.5.0 (unchanged)</li>
+</ul>
+</li>
+<li>CMSIS-Pack 1.6.0 (unchanged)</li>
+<li>CMSIS-SVD 1.3.3 (unchanged)</li>
+<li>CMSIS-DAP 2.0.0 (unchanged)</li>
+<li>CMSIS-Zone 0.9.0 (unchanged)   </li>
+</ul>
+</td></tr>
+<tr>
+<td>5.5.0 </td><td><ul>
+<li>CMSIS-Core (Cortex-M) 5.2.0<ul>
+<li>Reworked Stack/Heap configuration for ARM startup files.</li>
+<li>Added Cortex-M35P device support.</li>
+<li>Added generic Armv8.1-M Mainline device support.</li>
+</ul>
+</li>
+<li>CMSIS-Core (Cortex-A) 1.1.3 Minor fixes.</li>
+<li>CMSIS-DSP 1.6.0<ul>
+<li>reworked DSP library source files<ul>
+<li>added macro ARM_MATH_LOOPUNROLL</li>
+<li>removed macro UNALIGNED_SUPPORT_DISABLE</li>
+<li>added const-correctness</li>
+<li>replaced SIMD pointer construct with memcopy solution</li>
+<li>replaced macro combination "CMSIS_INLINE __STATIC_INLINE with "__STATIC_FORCEINLINE"</li>
+</ul>
+</li>
+<li>reworked DSP library documentation</li>
+<li>Changed DSP folder structure<ul>
+<li>moved DSP libraries to ./DSP/Lib</li>
+</ul>
+</li>
+<li>moved DSP libraries to folder ./DSP/Lib</li>
+<li>ARM DSP Libraries are built with ARMCLANG</li>
+<li>Added DSP Libraries Source variant</li>
+</ul>
+</li>
+<li>CMSIS-NN 1.1.0 (unchanged)</li>
+<li>CMSIS-Driver 2.7.0<ul>
+<li>Added WiFi Interface API 1.0.0-beta</li>
+<li>Added custom driver selection to simplify implementation of new CMSIS-Driver</li>
+</ul>
+</li>
+<li>CMSIS-RTOS 2.1.3<ul>
+<li>RTX 5.5.0 (see revision history)</li>
+</ul>
+</li>
+<li>CMSIS-Pack 1.6.0</li>
+<li>CMSIS-SVD 1.3.3 (unchanged)</li>
+<li>CMSIS-DAP 2.0.0 (unchanged)</li>
+<li>CMSIS-Zone 0.9.0 (Preview)</li>
+<li>Devices<ul>
+<li>Added Cortex-M35P and ARMv81MML device templates.</li>
+<li>Fixed C-Startup Code for GCC (aligned with other compilers)<ul>
+<li>Moved call to SystemInit before memory initialization.</li>
+</ul>
+</li>
+</ul>
+</li>
+<li>Utilities<ul>
+<li>SVDConv 3.3.25</li>
+<li>PackChk 1.3.82   </li>
+</ul>
+</li>
+</ul>
+</td></tr>
+<tr>
 <td>5.4.0 </td><td><ul>
 <li>CMSIS-Core (Cortex-M) 5.1.2 Minor fixes and slight enhancements, e.g. beta for Cortex-M1.</li>
 <li>CMSIS-Core (Cortex-A) 1.1.2 Minor fixes.</li>
@@ -248,7 +372,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:23 for CMSIS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:41 for CMSIS Version 5.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/General/html/cmsis.css b/docs/General/html/cmsis.css
index bba1010..586d4d2 100644
--- a/docs/General/html/cmsis.css
+++ b/docs/General/html/cmsis.css
@@ -1148,7 +1148,7 @@
 
 .image
 {
-        text-align: center;
+        text-align: left;
 }
 
 .dotgraph
diff --git a/docs/General/html/index.html b/docs/General/html/index.html
index 6815664..ee7454c 100644
--- a/docs/General/html/index.html
+++ b/docs/General/html/index.html
@@ -27,9 +27,9 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS
-   &#160;<span id="projectnumber">Version 5.4.0</span>
+   &#160;<span id="projectnumber">Version 5.6.0</span>
    </div>
-   <div id="projectbrief">Cortex Microcontroller Software Interface Standard</div>
+   <div id="projectbrief">Software Interface Standard for Arm Cortex-based Microcontrollers</div>
   </td>
  </tr>
  </tbody>
@@ -72,38 +72,50 @@
 <div class="title">Introduction </div>  </div>
 </div><!--header-->
 <div class="contents">
-<div class="textblock"><p>The <b>Cortex Microcontroller Software Interface Standard</b> (CMSIS) is a vendor-independent hardware abstraction layer for the Cortex&reg;-M processor series and defines generic tool interfaces. The CMSIS enables consistent device support and simple software interfaces to the processor and the peripherals, simplifying software re-use, reducing the learning curve for microcontroller developers, and reducing the time to market for new devices.</p>
+<div class="textblock"><p>The <b>CMSIS</b> is a vendor-independent hardware abstraction layer for microcontrollers that are based on Arm&reg; Cortex&reg; processors. The CMSIS defines generic tool interfaces and enables consistent device support. It provides simple software interfaces to the processor and the peripherals, simplifying software re-use, reducing the learning curve for microcontroller developers, and reducing the time to market for new devices.</p>
 <p>The CMSIS is defined in close cooperation with various silicon and software vendors and provides a common approach to interface to peripherals, real-time operating systems, and middleware components. The CMSIS is intended to enable the combination of software components from multiple middleware vendors.</p>
-<p>CMSIS Version 5 supports also the <a href="http://www.arm.com/products/processors/instruction-set-architectures/armv8-m-architecture.php" class="el" target="_blank">Armv8-M architecture</a> including <a href="http://www.arm.com/products/processors/technologies/trustzone/index.php" class="el" target="_blank">TrustZone&reg; for Armv8-M</a> hardware security extensions and the <a href="http://www.arm.com/products/processors/cortex-m/cortex-m23-processor.php" class="el" target="_blank">Cortex-M23</a> and <a href="http://www.arm.com/products/processors/cortex-m/cortex-m33-processor.php" class="el" target="_blank">Cortex-M33</a> processors.</p>
-<p><a class="anchor" id="CM_Components"></a>The CMSIS components are:</p>
-<ul>
-<li><a href="../../Core/html/index.html"><b>CMSIS-Core (Cortex-M)</b></a>: API for the Cortex-M processor core and peripherals. It provides a standardized interface for Cortex-M0, Cortex-M0+, Cortex-M3, Cortex-M4, Cortex-M7, Cortex-M23, Cortex-M33, SC000, and SC300. Also included are SIMD intrinsic functions for Cortex-M4, Cortex-M7, and Cortex-M33 SIMD instructions.</li>
-<li><a href="../../Core_A/html/index.html"><b>CMSIS-Core (Cortex-A)</b></a>: API and basic run-time system for the Cortex-A5/A7/A9 processor core and peripherals.</li>
-<li><a href="../../Driver/html/index.html"><b>CMSIS-Driver</b></a>: defines generic peripheral driver interfaces for middleware making it reusable across supported devices. The API is RTOS independent and connects microcontroller peripherals with middleware that implements for example communication stacks, file systems, or graphic user interfaces.</li>
-<li><a href="../../DSP/html/index.html"><b>CMSIS-DSP</b></a>: DSP Library Collection with over 60 Functions for various data types: fixed-point (fractional q7, q15, q31) and single precision floating-point (32-bit). The library is available for all Cortex-M cores. Implementations that are optimized for the SIMD instruction set are available for Cortex-M4, Cortex-M7, and Cortex-M33.</li>
-<li><a href="../../NN/html/index.html"><b>CMSIS-NN</b></a>: CMSIS-NN is a collection of efficient neural network kernels developed to maximize the performance and minimize the memory footprint of neural networks on Cortex-M processor cores.</li>
-<li><a href="../../RTOS/html/index.html"><b>CMSIS-RTOS v1</b></a>: Common API for Real-Time Operating Systems along with reference implementation based on RTX. It provides a standardized programming interface that is portable to many RTOS and enables software components that can work across multiple RTOS systems.</li>
-<li><a href="../../RTOS2/html/index.html"><b>CMSIS-RTOS v2</b></a>: extends CMSIS-RTOS v1 with support for Armv8-M architecture, dynamic object creation, provisions for multi-core systems, and binary compatible interface across ABI compliant compilers.</li>
-<li><a href="../../Pack/html/index.html"><b>CMSIS-Pack</b></a>: describes with an XML-based package description (PDSC) file the user and device relevant parts of a file collection (called a software pack) that includes source, header and library files, documentation, Flash programming algorithms, source code templates, and example projects. Development tools and web infrastructures use the PDSC file to extract device parameters, software components, and evaluation board configurations.</li>
-<li><a href="../../SVD/html/index.html"><b>CMSIS-SVD</b></a>: System View Description for Peripherals. Describes the peripherals of a device in an XML file and can be used to create peripheral awareness in debuggers or header files with peripheral register and interrupt definitions.</li>
-<li><a href="../../DAP/html/index.html"><b>CMSIS-DAP</b></a>: Debug Access Port. Standardized firmware for a Debug Unit that connects to the CoreSight Debug Access Port. CMSIS-DAP is distributed as a separate package and is well suited for integration on evaluation boards. This component is provided as separate download.</li>
-<li><a href="../../Zone/html/index.html"><b>CMSIS-Zone</b></a>: System resource definition and partitioning. Defines methods to describe system resources and to partition these resources into multiple projects and execution areas.</li>
-</ul>
-<dl class="section note"><dt>Note</dt><dd>Refer to <a class="el" href="index.html#CM_Pack_Content">ARM::CMSIS Pack</a> for more information on the content of the Software Pack.</dd></dl>
+<h1><a class="anchor" id="CM_Components"></a>
+CMSIS Components</h1>
+<table class="doxtable">
+<tr>
+<th align="left">CMSIS-... </th><th align="left">Target Processors </th><th align="left">Description  </th></tr>
+<tr>
+<td align="left"><a href="../../Core/html/index.html"><b>Core(M)</b></a></td><td align="left">All Cortex-M, SecurCore </td><td align="left">Standardized API for the Cortex-M processor core and peripherals. Includes intrinsic functions for Cortex-M4/M7/M33/M35P SIMD instructions. </td></tr>
+<tr>
+<td align="left"><a href="../../Core_A/html/index.html"><b>Core(A)</b></a></td><td align="left">Cortex-A5/A7/A9 </td><td align="left">Standardized API and basic run-time system for the Cortex-A5/A7/A9 processor core and peripherals. </td></tr>
+<tr>
+<td align="left"><a href="../../Driver/html/index.html"><b>Driver</b></a></td><td align="left">All Cortex </td><td align="left">Generic peripheral driver interfaces for middleware. Connects microcontroller peripherals with middleware that implements for example communication stacks, file systems, or graphic user interfaces. </td></tr>
+<tr>
+<td align="left"><a href="../../DSP/html/index.html"><b>DSP</b></a></td><td align="left">All Cortex-M </td><td align="left">DSP library collection with over 60 Functions for various data types: fixed-point (fractional q7, q15, q31) and single precision floating-point (32-bit). Implementations optimized for the SIMD instruction set are available for Cortex-M4/M7/M33/M35P. </td></tr>
+<tr>
+<td align="left"><a href="../../NN/html/index.html"><b>NN</b></a></td><td align="left">All Cortex-M </td><td align="left">Collection of efficient neural network kernels developed to maximize the performance and minimize the memory footprint on Cortex-M processor cores. </td></tr>
+<tr>
+<td align="left"><a href="../../RTOS/html/index.html"><b>RTOS v1</b></a></td><td align="left">Cortex-M0/M0+/M3/M4/M7 </td><td align="left">Common API for real-time operating systems along with a reference implementation based on RTX. It enables software components that can work across multiple RTOS systems. </td></tr>
+<tr>
+<td align="left"><a href="../../RTOS2/html/index.html"><b>RTOS v2</b></a></td><td align="left">All Cortex-M, Cortex-A5/A7/A9 </td><td align="left">Extends CMSIS-RTOS v1 with Armv8-M support, dynamic object creation, provisions for multi-core systems, binary compatible interface. </td></tr>
+<tr>
+<td align="left"><a href="../../Pack/html/index.html"><b>Pack</b></a></td><td align="left">All Cortex-M, SecurCore, Cortex-A5/A7/A9 </td><td align="left">Describes a delivery mechanism for software components, device parameters, and evaluation board support. It simplifies software re-use and product life-cycle management (PLM). </td></tr>
+<tr>
+<td align="left"><a href="../../SVD/html/index.html"><b>SVD</b></a></td><td align="left">All Cortex-M, SecurCore </td><td align="left">Peripheral description of a device that can be used to create peripheral awareness in debuggers or CMSIS-Core header files. </td></tr>
+<tr>
+<td align="left"><a href="../../DAP/html/index.html"><b>DAP</b></a></td><td align="left">All Cortex </td><td align="left">Firmware for a debug unit that interfaces to the CoreSight Debug Access Port. </td></tr>
+<tr>
+<td align="left"><a href="../../Zone/html/index.html"><b>Zone</b></a></td><td align="left">All Cortex </td><td align="left">Defines methods to describe system resources and to partition these resources into multiple projects and execution areas. </td></tr>
+</table>
+<h1><a class="anchor" id="Motivation"></a>
+Motivation</h1>
+<p>CMSIS has been created to help the industry in standardization. It enables consistent software layers and device support across a wide range of development tools and microcontrollers. CMSIS is not a huge software layer that introduces overhead and does not define standard peripherals. The silicon industry can therefore support the wide variations of Cortex-M processor-based devices with this common standard.</p>
 <div class="image">
 <img src="Overview.png" alt="Overview.png"/>
 <div class="caption">
 CMSIS Structure</div></div>
- <h1><a class="anchor" id="Motivation"></a>
-Motivation</h1>
-<p>CMSIS has been created to help the industry in standardization. It enables consistent software layers and device support across a wide range of development tools and microcontrollers. CMSIS is not a huge software layer that introduces overhead and does not define standard peripherals. The silicon industry can therefore support the wide variations of Cortex-M processor-based devices with this common standard.</p>
-<p>In detail the benefits of the CMSIS are:</p>
+<p> The benefits of the CMSIS are:</p>
 <ul>
-<li>Overall CMSIS reduces the learning curve, development costs, and time-to-market. Developers can write software quicker through a variety of easy-to-use, standardized software interfaces.</li>
+<li>CMSIS reduces the learning curve, development costs, and time-to-market. Developers can write software quicker through a variety of easy-to-use, standardized software interfaces.</li>
 <li>Consistent software interfaces improve the software portability and re-usability. Generic software libraries and interfaces provide consistent software framework.</li>
-<li>Provides interfaces for debug connectivity, debug peripheral views, software delivery, and device support to reduce time-to-market for new microcontroller deployment.</li>
-<li>Provides a compiler independent layer that allows using different compilers. CMSIS is supported by mainstream compilers.</li>
-<li>Enhances program debugging with peripheral information for debuggers and ITM channels for printf-style output and RTOS kernel awareness.</li>
+<li>It provides interfaces for debug connectivity, debug peripheral views, software delivery, and device support to reduce time-to-market for new microcontroller deployment.</li>
+<li>Being a compiler independent layer, it allows to use the compiler of your choice. Thus, it is supported by mainstream compilers.</li>
+<li>It enhances program debugging with peripheral information for debuggers and ITM channels for printf-style output.</li>
 <li>CMSIS is delivered in CMSIS-Pack format which enables fast software delivery, simplifies updates, and enables consistent integration into development tools.</li>
 <li>CMSIS-Zone will simplify system resource and partitioning as it manages the configuration of multiple processors, memory areas, and peripherals.</li>
 </ul>
@@ -126,7 +138,7 @@
 <p>The CMSIS is documented within the source files with: </p>
 <ul>
 <li>Comments that use the C or C++ style. </li>
-<li>Doxygen compliant <b>function comments</b> that provide:<ul>
+<li><a href="http://www.doxygen.nl/" target="_blank">Doxygen</a> compliant <b>function comments</b> that provide:<ul>
 <li>brief function overview.</li>
 <li>detailed description of the function.</li>
 <li>detailed parameter explanation.</li>
@@ -150,10 +162,10 @@
 <p>The CMSIS source code is checked for MISRA C:2012 conformance using PC-Lint. MISRA deviations are documented with reasonable effort, however Arm does not claim MISRA compliance as there is today for example no guideline enforcement plan. The CMSIS source code is not checked for MISRA C++:2008 conformance as there is a risk that it is incompatible with C language standards, specifically warnings that may be generated by the various C compilers.</p>
 <h1><a class="anchor" id="License"></a>
 License</h1>
-<p>The CMSIS is provided free of charge by Arm under Apache 2.0 license. View the <a href="LICENSE.txt">Apache 2.0 License</a>.</p>
+<p>The CMSIS is provided free of charge by Arm under the <a href="LICENSE.txt">Apache 2.0 License</a>.</p>
 <h1><a class="anchor" id="CM_Pack_Content"></a>
-ARM::CMSIS Pack</h1>
-<p>The <b>ARM::CMSIS</b> Pack contains the following:</p>
+CMSIS Software Pack</h1>
+<p>The CMSIS software components are delivered in CMSIS-Pack format. The <b>ARM::CMSIS</b> Pack contains the following:</p>
 <table class="doxtable">
 <tr>
 <th align="left">File/Directory </th><th align="left">Content  </th></tr>
@@ -162,7 +174,7 @@
 <tr>
 <td align="left"><b>LICENSE.txt</b> </td><td align="left">CMSIS License Agreement (Apache 2.0) </td></tr>
 <tr>
-<td align="left"><b>CMSIS</b> </td><td align="left"><a class="el" href="index.html#CM_Components">CMSIS components</a> (see below) </td></tr>
+<td align="left"><b>CMSIS</b> </td><td align="left"><a class="el" href="index.html#CM_Components">CMSIS components</a> (see also table below) </td></tr>
 <tr>
 <td align="left"><b>Device</b> </td><td align="left">CMSIS reference implementations of Arm Cortex-M processor based devices </td></tr>
 </table>
@@ -191,9 +203,9 @@
 <tr>
 <td align="left"><b>Pack</b> </td><td align="left"><a href="../../Pack/html/pack_Example.html"><b>CMSIS-Pack</b></a> example </td></tr>
 <tr>
-<td align="left"><b>RTOS</b> </td><td align="left"><a href="../../RTOS/html/index.html"><b>CMSIS-RTOS Version 1</b></a> along with RTX reference implementation </td></tr>
+<td align="left"><b>RTOS</b> </td><td align="left"><a href="../../RTOS/html/index.html"><b>CMSIS-RTOS Version 1</b></a> along with RTX4 reference implementation </td></tr>
 <tr>
-<td align="left"><b>RTOS2</b> </td><td align="left"><a href="../../RTOS/html/index.html"><b>CMSIS-RTOS Version 2</b></a> along with RTX reference implementation </td></tr>
+<td align="left"><b>RTOS2</b> </td><td align="left"><a href="../../RTOS/html/index.html"><b>CMSIS-RTOS Version 2</b></a> along with RTX5 reference implementation </td></tr>
 <tr>
 <td align="left"><b>SVD</b> </td><td align="left"><a href="../../SVD/html/index.html"><b>CMSIS-SVD</b></a> example </td></tr>
 <tr>
@@ -206,7 +218,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:23 for CMSIS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:41 for CMSIS Version 5.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/General/html/navtree.js b/docs/General/html/navtree.js
index 4de4e0a..40f2b9e 100644
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+++ b/docs/General/html/navtree.js
@@ -2,11 +2,12 @@
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   [ "CMSIS", "index.html", [
     [ "Introduction", "index.html", [
+      [ "CMSIS Components", "index.html#CM_Components", null ],
       [ "Motivation", "index.html#Motivation", null ],
       [ "Coding Rules", "index.html#CodingRules", null ],
       [ "Validation", "index.html#Validation", null ],
       [ "License", "index.html#License", null ],
-      [ "ARM::CMSIS Pack", "index.html#CM_Pack_Content", null ]
+      [ "CMSIS Software Pack", "index.html#CM_Pack_Content", null ]
     ] ],
     [ "Revision History", "cm_revisionHistory.html", null ]
   ] ]
diff --git a/docs/General/html/navtreeindex0.js b/docs/General/html/navtreeindex0.js
index 5a338a4..d1ced12 100644
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+<a href="#define-members">Macros</a> &#124;
+<a href="#func-members">Functions</a>  </div>
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+<div class="title">arm_depthwise_conv_u8_basic_ver1.c File Reference</div>  </div>
+</div><!--header-->
+<div class="contents">
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
+Macros</h2></td></tr>
+<tr class="memitem:aeb98996ffa34fb40d8e91919d2ebdc56"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__depthwise__conv__u8__basic__ver1_8c.html#aeb98996ffa34fb40d8e91919d2ebdc56">DILATION_X</a></td></tr>
+<tr class="separator:aeb98996ffa34fb40d8e91919d2ebdc56"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a9371ac7b5689f9e74a18a2d548c32033"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__depthwise__conv__u8__basic__ver1_8c.html#a9371ac7b5689f9e74a18a2d548c32033">DILATION_Y</a></td></tr>
+<tr class="separator:a9371ac7b5689f9e74a18a2d548c32033"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table><table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
+Functions</h2></td></tr>
+<tr class="memitem:ga02a296cb4f6361a70c3ecf1ef1238292"><td class="memItemLeft" align="right" valign="top">arm_status&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NNConv.html#ga02a296cb4f6361a70c3ecf1ef1238292">arm_depthwise_conv_u8_basic_ver1</a> (const uint8_t *input, const uint16_t input_x, const uint16_t input_y, const uint16_t input_ch, const uint8_t *kernel, const uint16_t kernel_x, const uint16_t kernel_y, const int16_t ch_mult, const int16_t pad_x, const int16_t pad_y, const int16_t stride_x, const int16_t stride_y, const int16_t dilation_x, const int16_t dilation_y, const int32_t *bias, const int32_t input_offset, const int32_t filter_offset, const int32_t output_offset, uint8_t *output, const uint16_t output_x, const uint16_t output_y, const int32_t output_activation_min, const int32_t output_activation_max, const int32_t out_shift, const int32_t out_mult)</td></tr>
+<tr class="memdesc:ga02a296cb4f6361a70c3ecf1ef1238292"><td class="mdescLeft">&#160;</td><td class="mdescRight">uint8 depthwise convolution function with asymmetric quantization for even number of channel multiplier and input channels. Unless specified otherwise, arguments are mandatory. Both square and non-square inputs are accepted.  <a href="group__NNConv.html#ga02a296cb4f6361a70c3ecf1ef1238292">More...</a><br/></td></tr>
+<tr class="separator:ga02a296cb4f6361a70c3ecf1ef1238292"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<h2 class="groupheader">Macro Definition Documentation</h2>
+<a class="anchor" id="aeb98996ffa34fb40d8e91919d2ebdc56"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define DILATION_X</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Referenced by <a class="el" href="group__NNConv.html#ga02a296cb4f6361a70c3ecf1ef1238292">arm_depthwise_conv_u8_basic_ver1()</a>.</p>
+
+</div>
+</div>
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+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define DILATION_Y</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Referenced by <a class="el" href="group__NNConv.html#ga02a296cb4f6361a70c3ecf1ef1238292">arm_depthwise_conv_u8_basic_ver1()</a>.</p>
+
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:50 for CMSIS-NN Version 1.2.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/NN/html/arm__nnexamples__cifar10__weights_8h.html b/docs/NN/html/arm__nnexamples__cifar10__weights_8h.html
index c37187e..314afc2 100644
--- a/docs/NN/html/arm__nnexamples__cifar10__weights_8h.html
+++ b/docs/NN/html/arm__nnexamples__cifar10__weights_8h.html
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    <div id="projectname">CMSIS-NN
-   &#160;<span id="projectnumber">Version 1.1.0</span>
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@@ -396,7 +396,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_06560e3359c5da94845158f0031c08e8.html">NN</a></li><li class="navelem"><a class="el" href="dir_42ee8ba91ca7a55df66538ce31ddec49.html">Examples</a></li><li class="navelem"><a class="el" href="dir_1c6ec18b156ae6affcf9513e9ed30cbf.html">ARM</a></li><li class="navelem"><a class="el" href="dir_b7d5e60e0ec4c139f7aa9a155c284f70.html">arm_nn_examples</a></li><li class="navelem"><a class="el" href="dir_21d6d99be497a80d1e903a1ff5a6bb5a.html">cifar10</a></li><li class="navelem"><a class="el" href="arm__nnexamples__cifar10__weights_8h.html">arm_nnexamples_cifar10_weights.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:32 for CMSIS-NN by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:50 for CMSIS-NN Version 1.2.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/NN/html/arm__nnexamples__gru_8cpp.html b/docs/NN/html/arm__nnexamples__gru_8cpp.html
index 1b43700..b579894 100644
--- a/docs/NN/html/arm__nnexamples__gru_8cpp.html
+++ b/docs/NN/html/arm__nnexamples__gru_8cpp.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-NN
-   &#160;<span id="projectnumber">Version 1.1.0</span>
+   &#160;<span id="projectnumber">Version 1.2.0</span>
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   </td>
@@ -519,7 +519,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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     <li class="navelem"><a class="el" href="dir_06560e3359c5da94845158f0031c08e8.html">NN</a></li><li class="navelem"><a class="el" href="dir_42ee8ba91ca7a55df66538ce31ddec49.html">Examples</a></li><li class="navelem"><a class="el" href="dir_1c6ec18b156ae6affcf9513e9ed30cbf.html">ARM</a></li><li class="navelem"><a class="el" href="dir_b7d5e60e0ec4c139f7aa9a155c284f70.html">arm_nn_examples</a></li><li class="navelem"><a class="el" href="dir_a3a0a3f0894883b6608166441e8c3ad3.html">gru</a></li><li class="navelem"><a class="el" href="arm__nnexamples__gru_8cpp.html">arm_nnexamples_gru.cpp</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:32 for CMSIS-NN by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:50 for CMSIS-NN Version 1.2.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/NN/html/arm__nnexamples__gru__test__data_8h.html b/docs/NN/html/arm__nnexamples__gru__test__data_8h.html
index 8552564..fdeef50 100644
--- a/docs/NN/html/arm__nnexamples__gru__test__data_8h.html
+++ b/docs/NN/html/arm__nnexamples__gru__test__data_8h.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-NN
-   &#160;<span id="projectnumber">Version 1.1.0</span>
+   &#160;<span id="projectnumber">Version 1.2.0</span>
    </div>
    <div id="projectbrief">CMSIS NN Software Library</div>
   </td>
@@ -292,7 +292,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_06560e3359c5da94845158f0031c08e8.html">NN</a></li><li class="navelem"><a class="el" href="dir_42ee8ba91ca7a55df66538ce31ddec49.html">Examples</a></li><li class="navelem"><a class="el" href="dir_1c6ec18b156ae6affcf9513e9ed30cbf.html">ARM</a></li><li class="navelem"><a class="el" href="dir_b7d5e60e0ec4c139f7aa9a155c284f70.html">arm_nn_examples</a></li><li class="navelem"><a class="el" href="dir_a3a0a3f0894883b6608166441e8c3ad3.html">gru</a></li><li class="navelem"><a class="el" href="arm__nnexamples__gru__test__data_8h.html">arm_nnexamples_gru_test_data.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:32 for CMSIS-NN by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:50 for CMSIS-NN Version 1.2.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/NN/html/arm__nnfunctions_8h.html b/docs/NN/html/arm__nnfunctions_8h.html
index 53ec347..85c269c 100644
--- a/docs/NN/html/arm__nnfunctions_8h.html
+++ b/docs/NN/html/arm__nnfunctions_8h.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-NN
-   &#160;<span id="projectnumber">Version 1.1.0</span>
+   &#160;<span id="projectnumber">Version 1.2.0</span>
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@@ -203,6 +203,9 @@
 <tr class="memitem:ga1cacd8b84b8363079311987d0016ebe5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Softmax.html#ga1cacd8b84b8363079311987d0016ebe5">arm_softmax_q15</a> (const q15_t *vec_in, const uint16_t dim_vec, q15_t *p_out)</td></tr>
 <tr class="memdesc:ga1cacd8b84b8363079311987d0016ebe5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q15 softmax function.  <a href="group__Softmax.html#ga1cacd8b84b8363079311987d0016ebe5">More...</a><br/></td></tr>
 <tr class="separator:ga1cacd8b84b8363079311987d0016ebe5"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga02a296cb4f6361a70c3ecf1ef1238292"><td class="memItemLeft" align="right" valign="top">arm_status&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NNConv.html#ga02a296cb4f6361a70c3ecf1ef1238292">arm_depthwise_conv_u8_basic_ver1</a> (const uint8_t *input, const uint16_t input_x, const uint16_t input_y, const uint16_t input_ch, const uint8_t *kernel, const uint16_t kernel_x, const uint16_t kernel_y, const int16_t ch_mult, const int16_t pad_x, const int16_t pad_y, const int16_t stride_x, const int16_t stride_y, const int16_t dilation_x, const int16_t dilation_y, const int32_t *bias, const int32_t input_offset, const int32_t filter_offset, const int32_t output_offset, uint8_t *output, const uint16_t output_x, const uint16_t output_y, const int32_t output_activation_min, const int32_t output_activation_max, const int32_t out_shift, const int32_t out_mult)</td></tr>
+<tr class="memdesc:ga02a296cb4f6361a70c3ecf1ef1238292"><td class="mdescLeft">&#160;</td><td class="mdescRight">uint8 depthwise convolution function with asymmetric quantization for even number of channel multiplier and input channels. Unless specified otherwise, arguments are mandatory.  <a href="group__NNConv.html#ga02a296cb4f6361a70c3ecf1ef1238292">More...</a><br/></td></tr>
+<tr class="separator:ga02a296cb4f6361a70c3ecf1ef1238292"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <h2 class="groupheader">Macro Definition Documentation</h2>
 <a class="anchor" id="a710b6e009261290c6151f329cf409530"></a>
@@ -417,7 +420,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_06560e3359c5da94845158f0031c08e8.html">NN</a></li><li class="navelem"><a class="el" href="dir_17aeddf785065efc95337b880bac512b.html">Include</a></li><li class="navelem"><a class="el" href="arm__nnfunctions_8h.html">arm_nnfunctions.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:32 for CMSIS-NN by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:50 for CMSIS-NN Version 1.2.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/NN/html/arm__nnsupportfunctions_8h.html b/docs/NN/html/arm__nnsupportfunctions_8h.html
index 6d4f025..6513b78 100644
--- a/docs/NN/html/arm__nnsupportfunctions_8h.html
+++ b/docs/NN/html/arm__nnsupportfunctions_8h.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-NN
-   &#160;<span id="projectnumber">Version 1.1.0</span>
+   &#160;<span id="projectnumber">Version 1.2.0</span>
    </div>
    <div id="projectbrief">CMSIS NN Software Library</div>
   </td>
@@ -125,8 +125,16 @@
 </table><table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
 Macros</h2></td></tr>
+<tr class="memitem:a2953f124ae444ebdd2b2a0873ac36b7e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__nnsupportfunctions_8h.html#a2953f124ae444ebdd2b2a0873ac36b7e">LEFT_SHIFT</a>(_shift)</td></tr>
+<tr class="separator:a2953f124ae444ebdd2b2a0873ac36b7e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a26af54489c1401b91595bf0c92ef87c4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__nnsupportfunctions_8h.html#a26af54489c1401b91595bf0c92ef87c4">RIGHT_SHIFT</a>(_shift)</td></tr>
+<tr class="separator:a26af54489c1401b91595bf0c92ef87c4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a1eb725c94dbb052aa24b62321be0445b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__nnsupportfunctions_8h.html#a1eb725c94dbb052aa24b62321be0445b">Q31_MIN</a></td></tr>
+<tr class="separator:a1eb725c94dbb052aa24b62321be0445b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a468734b237f1c95a31715aa2b60a576e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__nnsupportfunctions_8h.html#a468734b237f1c95a31715aa2b60a576e">Q31_MAX</a></td></tr>
+<tr class="separator:a468734b237f1c95a31715aa2b60a576e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a4cbd428a2b4a4f6b2a6e4219520c7ce0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__nnsupportfunctions_8h.html#a4cbd428a2b4a4f6b2a6e4219520c7ce0">NN_ROUND</a>(out_shift)</td></tr>
-<tr class="memdesc:a4cbd428a2b4a4f6b2a6e4219520c7ce0"><td class="mdescLeft">&#160;</td><td class="mdescRight">defition to adding rouding offset  <a href="#a4cbd428a2b4a4f6b2a6e4219520c7ce0">More...</a><br/></td></tr>
+<tr class="memdesc:a4cbd428a2b4a4f6b2a6e4219520c7ce0"><td class="mdescLeft">&#160;</td><td class="mdescRight">macro for adding rounding offset  <a href="#a4cbd428a2b4a4f6b2a6e4219520c7ce0">More...</a><br/></td></tr>
 <tr class="separator:a4cbd428a2b4a4f6b2a6e4219520c7ce0"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table><table class="memberdecls">
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@@ -149,8 +157,32 @@
 <tr class="memitem:gad46c9ab012cceda8ce6681c687a58c70"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NNBasicMath.html#gad46c9ab012cceda8ce6681c687a58c70">arm_nn_mult_q7</a> (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, const uint16_t out_shift, uint32_t blockSize)</td></tr>
 <tr class="memdesc:gad46c9ab012cceda8ce6681c687a58c70"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 vector multiplication with variable output shifts.  <a href="group__NNBasicMath.html#gad46c9ab012cceda8ce6681c687a58c70">More...</a><br/></td></tr>
 <tr class="separator:gad46c9ab012cceda8ce6681c687a58c70"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a51721c10f116c9f5b8d9908367989d44"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE q31_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__nnsupportfunctions_8h.html#a51721c10f116c9f5b8d9908367989d44">arm_nn_sat_doubling_high_mult</a> (const q31_t m1, const q31_t m2)</td></tr>
+<tr class="memdesc:a51721c10f116c9f5b8d9908367989d44"><td class="mdescLeft">&#160;</td><td class="mdescRight">Saturating doubling high multiply. Result matches NEON instruction VQRDMULH.  <a href="#a51721c10f116c9f5b8d9908367989d44">More...</a><br/></td></tr>
+<tr class="separator:a51721c10f116c9f5b8d9908367989d44"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ab6dbc2fd53fae3ccdd1d0d70c8d3b491"><td class="memItemLeft" align="right" valign="top">__STATIC_FORCEINLINE q31_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="arm__nnsupportfunctions_8h.html#ab6dbc2fd53fae3ccdd1d0d70c8d3b491">arm_nn_divide_by_power_of_two</a> (const q31_t dividend, const q31_t exponent)</td></tr>
+<tr class="memdesc:ab6dbc2fd53fae3ccdd1d0d70c8d3b491"><td class="mdescLeft">&#160;</td><td class="mdescRight">Rounding divide by power of two.  <a href="#ab6dbc2fd53fae3ccdd1d0d70c8d3b491">More...</a><br/></td></tr>
+<tr class="separator:ab6dbc2fd53fae3ccdd1d0d70c8d3b491"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <h2 class="groupheader">Macro Definition Documentation</h2>
+<a class="anchor" id="a2953f124ae444ebdd2b2a0873ac36b7e"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define LEFT_SHIFT</td>
+          <td>(</td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">_shift</td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Referenced by <a class="el" href="group__NNConv.html#ga02a296cb4f6361a70c3ecf1ef1238292">arm_depthwise_conv_u8_basic_ver1()</a>.</p>
+
+</div>
+</div>
 <a class="anchor" id="a4cbd428a2b4a4f6b2a6e4219520c7ce0"></a>
 <div class="memitem">
 <div class="memproto">
@@ -169,6 +201,52 @@
 
 </div>
 </div>
+<a class="anchor" id="a468734b237f1c95a31715aa2b60a576e"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define Q31_MAX</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Referenced by <a class="el" href="arm__nnsupportfunctions_8h.html#a51721c10f116c9f5b8d9908367989d44">arm_nn_sat_doubling_high_mult()</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="a1eb725c94dbb052aa24b62321be0445b"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define Q31_MIN</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Referenced by <a class="el" href="arm__nnsupportfunctions_8h.html#a51721c10f116c9f5b8d9908367989d44">arm_nn_sat_doubling_high_mult()</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="a26af54489c1401b91595bf0c92ef87c4"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define RIGHT_SHIFT</td>
+          <td>(</td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">_shift</td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Referenced by <a class="el" href="group__NNConv.html#ga02a296cb4f6361a70c3ecf1ef1238292">arm_depthwise_conv_u8_basic_ver1()</a>.</p>
+
+</div>
+</div>
 <h2 class="groupheader">Enumeration Type Documentation</h2>
 <a class="anchor" id="a7f41aa78cd9a0552fae9b348ee4831a0"></a>
 <div class="memitem">
@@ -190,13 +268,88 @@
 
 </div>
 </div>
+<h2 class="groupheader">Function Documentation</h2>
+<a class="anchor" id="ab6dbc2fd53fae3ccdd1d0d70c8d3b491"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__STATIC_FORCEINLINE q31_t arm_nn_divide_by_power_of_two </td>
+          <td>(</td>
+          <td class="paramtype">const q31_t&#160;</td>
+          <td class="paramname"><em>dividend</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const q31_t&#160;</td>
+          <td class="paramname"><em>exponent</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">dividend</td><td>- Dividend </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">exponent</td><td>- Divisor = power(2, exponent) Range: [0, 31] </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>Rounded result of division. Midpoint is rounded away from zero. </dd></dl>
+
+<p>Referenced by <a class="el" href="group__NNConv.html#ga02a296cb4f6361a70c3ecf1ef1238292">arm_depthwise_conv_u8_basic_ver1()</a>.</p>
+
+</div>
+</div>
+<a class="anchor" id="a51721c10f116c9f5b8d9908367989d44"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__STATIC_FORCEINLINE q31_t arm_nn_sat_doubling_high_mult </td>
+          <td>(</td>
+          <td class="paramtype">const q31_t&#160;</td>
+          <td class="paramname"><em>m1</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const q31_t&#160;</td>
+          <td class="paramname"><em>m2</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">m1</td><td>Multiplicand </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">m2</td><td>Multiplier </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>Result of multiplication. </dd></dl>
+
+<p>References <a class="el" href="arm__nnsupportfunctions_8h.html#a468734b237f1c95a31715aa2b60a576e">Q31_MAX</a>, and <a class="el" href="arm__nnsupportfunctions_8h.html#a1eb725c94dbb052aa24b62321be0445b">Q31_MIN</a>.</p>
+
+<p>Referenced by <a class="el" href="group__NNConv.html#ga02a296cb4f6361a70c3ecf1ef1238292">arm_depthwise_conv_u8_basic_ver1()</a>.</p>
+
+</div>
+</div>
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:32 for CMSIS-NN by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:50 for CMSIS-NN Version 1.2.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/NN/html/globals.html b/docs/NN/html/globals.html
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+<li>conv1_wt
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+: <a class="el" href="group__NNConv.html#gad3d21b3bc6dbd6f3b97d01104349cb0a">arm_depthwise_separable_conv_HWC_q7.c</a>
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-, <a class="el" href="group__FC.html#ga062912078da113f5dd2004fd919a0ff2">arm_fully_connected_q15_opt.c</a>
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+<li>hidden_state_bias
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+<li>ip1_bias
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+</li>
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+<h3><a class="anchor" id="index_l"></a>- l -</h3><ul>
+<li>LEFT_SHIFT
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+</li>
+</ul>
+
+
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+<li>arm_nn_divide_by_power_of_two()
+: <a class="el" href="arm__nnsupportfunctions_8h.html#ab6dbc2fd53fae3ccdd1d0d70c8d3b491">arm_nnsupportfunctions.h</a>
+</li>
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+: <a class="el" href="arm__nn__mat__mult__kernel__q7__q15_8c.html#abc4fb258cfe8500ee68e812a293a80a3">arm_nn_mat_mult_kernel_q7_q15.c</a>
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+<li>arm_nn_sat_doubling_high_mult()
+: <a class="el" href="arm__nnsupportfunctions_8h.html#a51721c10f116c9f5b8d9908367989d44">arm_nnsupportfunctions.h</a>
+</li>
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+<li>Q31_MAX
+: <a class="el" href="arm__nnsupportfunctions_8h.html#a468734b237f1c95a31715aa2b60a576e">arm_nnsupportfunctions.h</a>
+</li>
+<li>Q31_MIN
+: <a class="el" href="arm__nnsupportfunctions_8h.html#a1eb725c94dbb052aa24b62321be0445b">arm_nnsupportfunctions.h</a>
+</li>
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-, <a class="el" href="group__Acti.html#ga638e803b4fe00426f401783a6255ca30">arm_relu_q7.c</a>
+: <a class="el" href="group__Acti.html#ga638e803b4fe00426f401783a6255ca30">arm_relu_q7.c</a>
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 </li>
+<li>RIGHT_SHIFT
+: <a class="el" href="arm__nnsupportfunctions_8h.html#a26af54489c1401b91595bf0c92ef87c4">arm_nnsupportfunctions.h</a>
+</li>
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-, <a class="el" href="group__Softmax.html#ga89aff212a97a3cf32d9d7ddf11a8f43e">arm_nnfunctions.h</a>
+: <a class="el" href="group__Softmax.html#ga89aff212a97a3cf32d9d7ddf11a8f43e">arm_nnfunctions.h</a>
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+: <a class="el" href="arm__nntables_8c.html#a107a16eaa36f4392fa3ed3792ad6c2cb">arm_nntables.c</a>
+, <a class="el" href="arm__nn__tables_8h.html#a107a16eaa36f4392fa3ed3792ad6c2cb">arm_nn_tables.h</a>
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-: <a class="el" href="arm__nn__tables_8h.html#add5ca535701805d3cb61287219975838">arm_nn_tables.h</a>
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+: <a class="el" href="arm__nntables_8c.html#ae2ff3f4e7014f535358167150bdd544f">arm_nntables.c</a>
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+</li>
+<li>DILATION_Y
+: <a class="el" href="arm__depthwise__conv__u8__basic__ver1_8c.html#a9371ac7b5689f9e74a18a2d548c32033">arm_depthwise_conv_u8_basic_ver1.c</a>
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+</li>
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+
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:50 for CMSIS-NN Version 1.2.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:32 for CMSIS-NN by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:50 for CMSIS-NN Version 1.2.0 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/NN/html/globals_func.html b/docs/NN/html/globals_func.html
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@@ -182,6 +182,10 @@
 
 
 <h3><a class="anchor" id="index_d"></a>- d -</h3><ul>
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+, <a class="el" href="group__NNConv.html#ga02a296cb4f6361a70c3ecf1ef1238292">arm_depthwise_conv_u8_basic_ver1.c</a>
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+</li>
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+: <a class="el" href="arm__nnsupportfunctions_8h.html#a51721c10f116c9f5b8d9908367989d44">arm_nnsupportfunctions.h</a>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:32 for CMSIS-NN by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:32 for CMSIS-NN by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:32 for CMSIS-NN by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:50 for CMSIS-NN Version 1.2.0 by Arm Ltd. All rights reserved.
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 <tr class="separator:ga98f2ead67d7cbdf558b0cd8a3b8fc148"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memdesc:ga02a296cb4f6361a70c3ecf1ef1238292"><td class="mdescLeft">&#160;</td><td class="mdescRight">uint8 depthwise convolution function with asymmetric quantization for even number of channel multiplier and input channels. Unless specified otherwise, arguments are mandatory. Both square and non-square inputs are accepted.  <a href="#ga02a296cb4f6361a70c3ecf1ef1238292">More...</a><br/></td></tr>
+<tr class="separator:ga02a296cb4f6361a70c3ecf1ef1238292"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 <tr class="memdesc:gad3d21b3bc6dbd6f3b97d01104349cb0a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q7 depthwise separable convolution function.  <a href="#gad3d21b3bc6dbd6f3b97d01104349cb0a">More...</a><br/></td></tr>
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+        <tr>
+          <td class="memname">arm_status arm_depthwise_conv_u8_basic_ver1 </td>
+          <td>(</td>
+          <td class="paramtype">const uint8_t *&#160;</td>
+          <td class="paramname"><em>input</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint16_t&#160;</td>
+          <td class="paramname"><em>input_x</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint16_t&#160;</td>
+          <td class="paramname"><em>input_y</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint16_t&#160;</td>
+          <td class="paramname"><em>input_ch</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint8_t *&#160;</td>
+          <td class="paramname"><em>kernel</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint16_t&#160;</td>
+          <td class="paramname"><em>kernel_x</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint16_t&#160;</td>
+          <td class="paramname"><em>kernel_y</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const int16_t&#160;</td>
+          <td class="paramname"><em>ch_mult</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const int16_t&#160;</td>
+          <td class="paramname"><em>pad_x</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const int16_t&#160;</td>
+          <td class="paramname"><em>pad_y</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const int16_t&#160;</td>
+          <td class="paramname"><em>stride_x</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const int16_t&#160;</td>
+          <td class="paramname"><em>stride_y</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const int16_t&#160;</td>
+          <td class="paramname"><em>dilation_x</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const int16_t&#160;</td>
+          <td class="paramname"><em>dilation_y</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const int32_t *&#160;</td>
+          <td class="paramname"><em>bias</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const int32_t&#160;</td>
+          <td class="paramname"><em>input_offset</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const int32_t&#160;</td>
+          <td class="paramname"><em>filter_offset</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const int32_t&#160;</td>
+          <td class="paramname"><em>output_offset</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint8_t *&#160;</td>
+          <td class="paramname"><em>output</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint16_t&#160;</td>
+          <td class="paramname"><em>output_x</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint16_t&#160;</td>
+          <td class="paramname"><em>output_y</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const int32_t&#160;</td>
+          <td class="paramname"><em>output_activation_min</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const int32_t&#160;</td>
+          <td class="paramname"><em>output_activation_max</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const int32_t&#160;</td>
+          <td class="paramname"><em>out_shift</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const int32_t&#160;</td>
+          <td class="paramname"><em>out_mult</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>uint8 depthwise convolution function with asymmetric quantization for even number of channel multiplier and input channels. Unless specified otherwise, arguments are mandatory.</p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">input</td><td>Pointer to input tensor </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">input_x</td><td>Width of input tensor </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">input_y</td><td>Height of input tensor </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">input_ch</td><td>Channels in input tensor </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">kernel</td><td>Pointer to kernel weights </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">kernel_x</td><td>Width of kernel </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">kernel_y</td><td>Height of kernel </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ch_mult</td><td>Number of channel multiplier </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pad_x</td><td>Padding sizes x </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pad_y</td><td>Padding sizes y </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">stride_x</td><td>Convolution stride along the width </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">stride_y</td><td>Convolution stride along the height </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">dilation_x</td><td>Dilation along width. Not used and intended for future enhancement. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">dilation_y</td><td>Dilation along height. Not used and intended for future enhancement. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">bias</td><td>Pointer to optional bias values. If no bias is availble, NULL is expected </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">input_offset</td><td>Input tensor zero offset </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">filter_offset</td><td>Kernel tensor zero offset </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">output_offset</td><td>Output tensor zero offset </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">output</td><td>Pointer to output tensor </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">output_x</td><td>Width of output tensor </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">output_y</td><td>Height of output tensor </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">output_activation_min</td><td>Minimum value to clamp the output to. Range : {0, 255} </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">output_activation_max</td><td>Minimum value to clamp the output to. Range : {0, 255} </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">out_shift</td><td>Amount of right-shift for output </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">out_mult</td><td>Output multiplier for requantization </td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>The function returns one of the following <code>ARM_MATH_SIZE_MISMATCH</code> - Not supported dimension of tensors <code>ARM_MATH_SUCCESS</code> - Successful operation <code>ARM_MATH_ARGUMENT_ERROR</code> - Implementation not available</dd></dl>
+<p><b> Input constraints</b> ch_mult is multiple of 2 kernel_x is multiple of 2 </p>
+
+<p>References <a class="el" href="arm__nnsupportfunctions_8h.html#ab6dbc2fd53fae3ccdd1d0d70c8d3b491">arm_nn_divide_by_power_of_two()</a>, <a class="el" href="arm__nnsupportfunctions_8h.html#a51721c10f116c9f5b8d9908367989d44">arm_nn_sat_doubling_high_mult()</a>, <a class="el" href="arm__depthwise__conv__u8__basic__ver1_8c.html#aeb98996ffa34fb40d8e91919d2ebdc56">DILATION_X</a>, <a class="el" href="arm__depthwise__conv__u8__basic__ver1_8c.html#a9371ac7b5689f9e74a18a2d548c32033">DILATION_Y</a>, <a class="el" href="arm__nnsupportfunctions_8h.html#a2953f124ae444ebdd2b2a0873ac36b7e">LEFT_SHIFT</a>, and <a class="el" href="arm__nnsupportfunctions_8h.html#a26af54489c1401b91595bf0c92ef87c4">RIGHT_SHIFT</a>.</p>
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:50 for CMSIS-NN Version 1.2.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:32 for CMSIS-NN by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:50 for CMSIS-NN Version 1.2.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:32 for CMSIS-NN by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:50 for CMSIS-NN Version 1.2.0 by Arm Ltd. All rights reserved.
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+    <li class="footer">Generated on Wed Jul 10 2019 15:20:50 for CMSIS-NN Version 1.2.0 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:32 for CMSIS-NN by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:50 for CMSIS-NN Version 1.2.0 by Arm Ltd. All rights reserved.
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   </td>
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="gru_2readme_8txt.html">readme.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:32 for CMSIS-NN by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:50 for CMSIS-NN Version 1.2.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/NN/html/history_8txt.html b/docs/NN/html/history_8txt.html
index 749f351..0d99a01 100644
--- a/docs/NN/html/history_8txt.html
+++ b/docs/NN/html/history_8txt.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-NN
-   &#160;<span id="projectnumber">Version 1.1.0</span>
+   &#160;<span id="projectnumber">Version 1.2.0</span>
    </div>
    <div id="projectbrief">CMSIS NN Software Library</div>
   </td>
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="history_8txt.html">history.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:32 for CMSIS-NN by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:50 for CMSIS-NN Version 1.2.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/NN/html/index.doxyidx b/docs/NN/html/index.doxyidx
new file mode 100644
index 0000000..8efcb05
--- /dev/null
+++ b/docs/NN/html/index.doxyidx
@@ -0,0 +1,225 @@
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * @file     index.doxyidx
+ * @brief    Index file for MDK-ARM Help System
+ * @version  1.0
+ * @date     10. July 2019
+ * @note     Generated by DoxyIndex V1.2.3 on Wednesday, 10.07.2019 15:22:29
+ *           from Path 'C:\tools\PACK\ARM\CMSIS\5.6.0\\CMSIS\Documentation\NN\html',
+ */
+
+'ABCDFGHILNPQRSUabcghimnoprstuvw'
+arm_avepool_q7_HWC, group__Pooling.html#gae4a7b07f97ec4313524c9fb9fbcb1f6a, arm_avepool_q7_HWC(q7_t *Im_in, const uint16_t dim_im_in, const uint16_t ch_im_in, const uint16_t dim_kernel, const uint16_t padding, const uint16_t stride, const uint16_t dim_im_out, q7_t *bufferA, q7_t *Im_out):&#160;arm_pool_q7_HWC.c
+arm_convolve_1x1_HWC_q7_fast_nonsquare, group__NNConv.html#ga110adcfdaab356c750c6270aa5e05f29, arm_convolve_1x1_HWC_q7_fast_nonsquare(const q7_t *Im_in, const uint16_t dim_im_in_x, const uint16_t dim_im_in_y, const uint16_t ch_im_in, const q7_t *wt, const uint16_t ch_im_out, const uint16_t dim_kernel_x, const uint16_t dim_kernel_y, const uint16_t padding_x, const uint16_t padding_y, const uint16_t stride_x, const uint16_t stride_y, const q7_t *bias, const uint16_t bias_shift, const uint16_t out_shift, q7_t *Im_out, const uint16_t dim_im_out_x, const uint16_t dim_im_out_y, q15_t *bufferA, q7_t *bufferB):&#160;arm_convolve_1x1_HWC_q7_fast_nonsquare.c
+arm_convolve_1x1_HWC_q7_fast_nonsquare.c, arm__convolve__1x1__HWC__q7__fast__nonsquare_8c.html, 
+arm_convolve_HWC_q15_basic, group__NNConv.html#ga55701f213b198084b52eab53097f1f58, arm_convolve_HWC_q15_basic(const q15_t *Im_in, const uint16_t dim_im_in, const uint16_t ch_im_in, const q15_t *wt, const uint16_t ch_im_out, const uint16_t dim_kernel, const uint16_t padding, const uint16_t stride, const q15_t *bias, const uint16_t bias_shift, const uint16_t out_shift, q15_t *Im_out, const uint16_t dim_im_out, q15_t *bufferA, q7_t *bufferB):&#160;arm_convolve_HWC_q15_basic.c
+arm_convolve_HWC_q15_basic.c, arm__convolve__HWC__q15__basic_8c.html, 
+arm_convolve_HWC_q15_fast, group__NNConv.html#ga4efb1ccbbaa7dd936961989dcb443f50, arm_convolve_HWC_q15_fast(const q15_t *Im_in, const uint16_t dim_im_in, const uint16_t ch_im_in, const q15_t *wt, const uint16_t ch_im_out, const uint16_t dim_kernel, const uint16_t padding, const uint16_t stride, const q15_t *bias, const uint16_t bias_shift, const uint16_t out_shift, q15_t *Im_out, const uint16_t dim_im_out, q15_t *bufferA, q7_t *bufferB):&#160;arm_convolve_HWC_q15_fast.c
+arm_convolve_HWC_q15_fast.c, arm__convolve__HWC__q15__fast_8c.html, 
+arm_convolve_HWC_q15_fast_nonsquare, group__NNConv.html#ga614ec3b71eb96e29952ec3f09e7b9c3c, arm_convolve_HWC_q15_fast_nonsquare(const q15_t *Im_in, const uint16_t dim_im_in_x, const uint16_t dim_im_in_y, const uint16_t ch_im_in, const q15_t *wt, const uint16_t ch_im_out, const uint16_t dim_kernel_x, const uint16_t dim_kernel_y, const uint16_t padding_x, const uint16_t padding_y, const uint16_t stride_x, const uint16_t stride_y, const q15_t *bias, const uint16_t bias_shift, const uint16_t out_shift, q15_t *Im_out, const uint16_t dim_im_out_x, const uint16_t dim_im_out_y, q15_t *bufferA, q7_t *bufferB):&#160;arm_convolve_HWC_q15_fast_nonsquare.c
+arm_convolve_HWC_q15_fast_nonsquare.c, arm__convolve__HWC__q15__fast__nonsquare_8c.html, 
+arm_convolve_HWC_q7_basic, group__NNConv.html#ga210ae8d8fc1d12ee15b41f1fa6947681, arm_convolve_HWC_q7_basic(const q7_t *Im_in, const uint16_t dim_im_in, const uint16_t ch_im_in, const q7_t *wt, const uint16_t ch_im_out, const uint16_t dim_kernel, const uint16_t padding, const uint16_t stride, const q7_t *bias, const uint16_t bias_shift, const uint16_t out_shift, q7_t *Im_out, const uint16_t dim_im_out, q15_t *bufferA, q7_t *bufferB):&#160;arm_convolve_HWC_q7_basic.c
+arm_convolve_HWC_q7_basic.c, arm__convolve__HWC__q7__basic_8c.html, 
+arm_convolve_HWC_q7_basic_nonsquare, group__NNConv.html#ga4501fa22c0836002aa47ccc313dce252, arm_convolve_HWC_q7_basic_nonsquare(const q7_t *Im_in, const uint16_t dim_im_in_x, const uint16_t dim_im_in_y, const uint16_t ch_im_in, const q7_t *wt, const uint16_t ch_im_out, const uint16_t dim_kernel_x, const uint16_t dim_kernel_y, const uint16_t padding_x, const uint16_t padding_y, const uint16_t stride_x, const uint16_t stride_y, const q7_t *bias, const uint16_t bias_shift, const uint16_t out_shift, q7_t *Im_out, const uint16_t dim_im_out_x, const uint16_t dim_im_out_y, q15_t *bufferA, q7_t *bufferB):&#160;arm_convolve_HWC_q7_basic_nonsquare.c
+arm_convolve_HWC_q7_basic_nonsquare.c, arm__convolve__HWC__q7__basic__nonsquare_8c.html, 
+arm_convolve_HWC_q7_fast, group__NNConv.html#gae00d3c1285907d59657369fc98bcc83f, arm_convolve_HWC_q7_fast(const q7_t *Im_in, const uint16_t dim_im_in, const uint16_t ch_im_in, const q7_t *wt, const uint16_t ch_im_out, const uint16_t dim_kernel, const uint16_t padding, const uint16_t stride, const q7_t *bias, const uint16_t bias_shift, const uint16_t out_shift, q7_t *Im_out, const uint16_t dim_im_out, q15_t *bufferA, q7_t *bufferB):&#160;arm_convolve_HWC_q7_fast.c
+arm_convolve_HWC_q7_fast.c, arm__convolve__HWC__q7__fast_8c.html, 
+arm_convolve_HWC_q7_fast_nonsquare, group__NNConv.html#gabc6d6b991024e9e5c5cdbd7489de88ef, arm_convolve_HWC_q7_fast_nonsquare(const q7_t *Im_in, const uint16_t dim_im_in_x, const uint16_t dim_im_in_y, const uint16_t ch_im_in, const q7_t *wt, const uint16_t ch_im_out, const uint16_t dim_kernel_x, const uint16_t dim_kernel_y, const uint16_t padding_x, const uint16_t padding_y, const uint16_t stride_x, const uint16_t stride_y, const q7_t *bias, const uint16_t bias_shift, const uint16_t out_shift, q7_t *Im_out, const uint16_t dim_im_out_x, const uint16_t dim_im_out_y, q15_t *bufferA, q7_t *bufferB):&#160;arm_convolve_HWC_q7_fast_nonsquare.c
+arm_convolve_HWC_q7_fast_nonsquare.c, arm__convolve__HWC__q7__fast__nonsquare_8c.html, 
+arm_convolve_HWC_q7_RGB, group__NNConv.html#ga98f2ead67d7cbdf558b0cd8a3b8fc148, arm_convolve_HWC_q7_RGB(const q7_t *Im_in, const uint16_t dim_im_in, const uint16_t ch_im_in, const q7_t *wt, const uint16_t ch_im_out, const uint16_t dim_kernel, const uint16_t padding, const uint16_t stride, const q7_t *bias, const uint16_t bias_shift, const uint16_t out_shift, q7_t *Im_out, const uint16_t dim_im_out, q15_t *bufferA, q7_t *bufferB):&#160;arm_convolve_HWC_q7_RGB.c
+arm_convolve_HWC_q7_RGB.c, arm__convolve__HWC__q7__RGB_8c.html, 
+arm_depthwise_conv_u8_basic_ver1, group__NNConv.html#ga02a296cb4f6361a70c3ecf1ef1238292, arm_depthwise_conv_u8_basic_ver1(const uint8_t *input, const uint16_t input_x, const uint16_t input_y, const uint16_t input_ch, const uint8_t *kernel, const uint16_t kernel_x, const uint16_t kernel_y, const int16_t ch_mult, const int16_t pad_x, const int16_t pad_y, const int16_t stride_x, const int16_t stride_y, const int16_t dilation_x, const int16_t dilation_y, const int32_t *bias, const int32_t input_offset, const int32_t filter_offset, const int32_t output_offset, uint8_t *output, const uint16_t output_x, const uint16_t output_y, const int32_t output_activation_min, const int32_t output_activation_max, const int32_t out_shift, const int32_t out_mult):&#160;arm_depthwise_conv_u8_basic_ver1.c
+arm_depthwise_conv_u8_basic_ver1.c, arm__depthwise__conv__u8__basic__ver1_8c.html, 
+arm_depthwise_separable_conv_HWC_q7, group__NNConv.html#gad3d21b3bc6dbd6f3b97d01104349cb0a, arm_depthwise_separable_conv_HWC_q7(const q7_t *Im_in, const uint16_t dim_im_in, const uint16_t ch_im_in, const q7_t *wt, const uint16_t ch_im_out, const uint16_t dim_kernel, const uint16_t padding, const uint16_t stride, const q7_t *bias, const uint16_t bias_shift, const uint16_t out_shift, q7_t *Im_out, const uint16_t dim_im_out, q15_t *bufferA, q7_t *bufferB):&#160;arm_depthwise_separable_conv_HWC_q7.c
+arm_depthwise_separable_conv_HWC_q7.c, arm__depthwise__separable__conv__HWC__q7_8c.html, 
+arm_depthwise_separable_conv_HWC_q7_nonsquare, group__NNConv.html#ga32ac508c5467813a84f74f96655dc697, arm_depthwise_separable_conv_HWC_q7_nonsquare(const q7_t *Im_in, const uint16_t dim_im_in_x, const uint16_t dim_im_in_y, const uint16_t ch_im_in, const q7_t *wt, const uint16_t ch_im_out, const uint16_t dim_kernel_x, const uint16_t dim_kernel_y, const uint16_t padding_x, const uint16_t padding_y, const uint16_t stride_x, const uint16_t stride_y, const q7_t *bias, const uint16_t bias_shift, const uint16_t out_shift, q7_t *Im_out, const uint16_t dim_im_out_x, const uint16_t dim_im_out_y, q15_t *bufferA, q7_t *bufferB):&#160;arm_depthwise_separable_conv_HWC_q7_nonsquare.c
+arm_depthwise_separable_conv_HWC_q7_nonsquare.c, arm__depthwise__separable__conv__HWC__q7__nonsquare_8c.html, 
+arm_fully_connected_mat_q7_vec_q15, group__FC.html#ga4a1521e7532a1e62d71f3b12762016e2, arm_fully_connected_mat_q7_vec_q15(const q15_t *pV, const q7_t *pM, const uint16_t dim_vec, const uint16_t num_of_rows, const uint16_t bias_shift, const uint16_t out_shift, const q7_t *bias, q15_t *pOut, q15_t *vec_buffer):&#160;arm_fully_connected_mat_q7_vec_q15.c
+arm_fully_connected_mat_q7_vec_q15.c, arm__fully__connected__mat__q7__vec__q15_8c.html, 
+arm_fully_connected_mat_q7_vec_q15_opt, group__FC.html#gae3857bb6375692e81dde8cbd70adec08, arm_fully_connected_mat_q7_vec_q15_opt(const q15_t *pV, const q7_t *pM, const uint16_t dim_vec, const uint16_t num_of_rows, const uint16_t bias_shift, const uint16_t out_shift, const q7_t *bias, q15_t *pOut, q15_t *vec_buffer):&#160;arm_fully_connected_mat_q7_vec_q15_opt.c
+arm_fully_connected_mat_q7_vec_q15_opt.c, arm__fully__connected__mat__q7__vec__q15__opt_8c.html, 
+arm_fully_connected_q15, group__FC.html#gaac666c212b209e636c2369dd5c75d0dc, arm_fully_connected_q15(const q15_t *pV, const q15_t *pM, const uint16_t dim_vec, const uint16_t num_of_rows, const uint16_t bias_shift, const uint16_t out_shift, const q15_t *bias, q15_t *pOut, q15_t *vec_buffer):&#160;arm_fully_connected_q15.c
+arm_fully_connected_q15.c, arm__fully__connected__q15_8c.html, 
+arm_fully_connected_q15_opt, group__FC.html#ga062912078da113f5dd2004fd919a0ff2, arm_fully_connected_q15_opt(const q15_t *pV, const q15_t *pM, const uint16_t dim_vec, const uint16_t num_of_rows, const uint16_t bias_shift, const uint16_t out_shift, const q15_t *bias, q15_t *pOut, q15_t *vec_buffer):&#160;arm_fully_connected_q15_opt.c
+arm_fully_connected_q15_opt.c, arm__fully__connected__q15__opt_8c.html, 
+arm_fully_connected_q7, group__FC.html#ga8b7e0c2e989e8c75f0dc789f3115323d, arm_fully_connected_q7(const q7_t *pV, const q7_t *pM, const uint16_t dim_vec, const uint16_t num_of_rows, const uint16_t bias_shift, const uint16_t out_shift, const q7_t *bias, q7_t *pOut, q15_t *vec_buffer):&#160;arm_fully_connected_q7.c
+arm_fully_connected_q7.c, arm__fully__connected__q7_8c.html, 
+arm_fully_connected_q7_opt, group__FC.html#gaf82b71ef472a38f8fc9ac414d9d07e67, arm_fully_connected_q7_opt(const q7_t *pV, const q7_t *pM, const uint16_t dim_vec, const uint16_t num_of_rows, const uint16_t bias_shift, const uint16_t out_shift, const q7_t *bias, q7_t *pOut, q15_t *vec_buffer):&#160;arm_fully_connected_q7_opt.c
+arm_fully_connected_q7_opt.c, arm__fully__connected__q7__opt_8c.html, 
+arm_maxpool_q7_HWC, group__Pooling.html#ga99afcdcc61eaf429ab3ee823702e44ce, arm_maxpool_q7_HWC(q7_t *Im_in, const uint16_t dim_im_in, const uint16_t ch_im_in, const uint16_t dim_kernel, const uint16_t padding, const uint16_t stride, const uint16_t dim_im_out, q7_t *bufferA, q7_t *Im_out):&#160;arm_pool_q7_HWC.c
+arm_nn_activation_type, arm__nnsupportfunctions_8h.html#a7f41aa78cd9a0552fae9b348ee4831a0, arm_nnsupportfunctions.h
+arm_nn_activations_direct_q15, group__Acti.html#ga8932b57c8d0ee757511af2d40dcc11e7, arm_nn_activations_direct_q15(q15_t *data, uint16_t size, uint16_t int_width, arm_nn_activation_type type):&#160;arm_nn_activations_q15.c
+arm_nn_activations_direct_q7, group__Acti.html#ga79f11131ae6767d60e03b1f6506b1af8, arm_nn_activations_direct_q7(q7_t *data, uint16_t size, uint16_t int_width, arm_nn_activation_type type):&#160;arm_nn_activations_q7.c
+arm_nn_activations_q15.c, arm__nn__activations__q15_8c.html, 
+arm_nn_activations_q7.c, arm__nn__activations__q7_8c.html, 
+arm_nn_divide_by_power_of_two, arm__nnsupportfunctions_8h.html#ab6dbc2fd53fae3ccdd1d0d70c8d3b491, arm_nnsupportfunctions.h
+arm_nn_mat_mult_kernel_q7_q15, arm__nn__mat__mult__kernel__q7__q15_8c.html#abc4fb258cfe8500ee68e812a293a80a3, arm_nn_mat_mult_kernel_q7_q15(const q7_t *pA, const q15_t *pInBuffer, const uint16_t ch_im_out, const uint16_t numCol_A, const uint16_t bias_shift, const uint16_t out_shift, const q7_t *bias, q7_t *pOut):&#160;arm_nn_mat_mult_kernel_q7_q15.c
+arm_nn_mat_mult_kernel_q7_q15.c, arm__nn__mat__mult__kernel__q7__q15_8c.html, 
+arm_nn_mat_mult_kernel_q7_q15_reordered, arm__nn__mat__mult__kernel__q7__q15__reordered_8c.html#aefe9c7ce9a65060a244b06dffe74c4b3, arm_nn_mat_mult_kernel_q7_q15_reordered(const q7_t *pA, const q15_t *pInBuffer, const uint16_t ch_im_out, const uint16_t numCol_A, const uint16_t bias_shift, const uint16_t out_shift, const q7_t *bias, q7_t *pOut):&#160;arm_nn_mat_mult_kernel_q7_q15_reordered.c
+arm_nn_mat_mult_kernel_q7_q15_reordered.c, arm__nn__mat__mult__kernel__q7__q15__reordered_8c.html, 
+arm_nn_mult_q15, group__NNBasicMath.html#ga08f8340aa6533271b3aa6d211614fe22, arm_nn_mult_q15(q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, const uint16_t out_shift, uint32_t blockSize):&#160;arm_nn_mult_q15.c
+arm_nn_mult_q15.c, arm__nn__mult__q15_8c.html, 
+arm_nn_mult_q7, group__NNBasicMath.html#gad46c9ab012cceda8ce6681c687a58c70, arm_nn_mult_q7(q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, const uint16_t out_shift, uint32_t blockSize):&#160;arm_nn_mult_q7.c
+arm_nn_mult_q7.c, arm__nn__mult__q7_8c.html, 
+arm_nn_sat_doubling_high_mult, arm__nnsupportfunctions_8h.html#a51721c10f116c9f5b8d9908367989d44, arm_nnsupportfunctions.h
+arm_nn_tables.h, arm__nn__tables_8h.html, 
+arm_nnexamples_cifar10.cpp, arm__nnexamples__cifar10_8cpp.html, 
+arm_nnexamples_cifar10_inputs.h, arm__nnexamples__cifar10__inputs_8h.html, 
+arm_nnexamples_cifar10_parameter.h, arm__nnexamples__cifar10__parameter_8h.html, 
+arm_nnexamples_cifar10_weights.h, arm__nnexamples__cifar10__weights_8h.html, 
+arm_nnexamples_gru.cpp, arm__nnexamples__gru_8cpp.html, 
+arm_nnexamples_gru_test_data.h, arm__nnexamples__gru__test__data_8h.html, 
+arm_nnfunctions.h, arm__nnfunctions_8h.html, 
+arm_nnsupportfunctions.h, arm__nnsupportfunctions_8h.html, 
+arm_nntables.c, arm__nntables_8c.html, 
+arm_nnword, unionarm__nnword.html, 
+arm_pool_q7_HWC.c, arm__pool__q7__HWC_8c.html, 
+arm_q7_to_q15_no_shift, group__nndata__convert.html#gae349de4dba8d253c89d45794ccf05680, arm_q7_to_q15_no_shift(const q7_t *pSrc, q15_t *pDst, uint32_t blockSize):&#160;arm_q7_to_q15_no_shift.c
+arm_q7_to_q15_no_shift.c, arm__q7__to__q15__no__shift_8c.html, 
+arm_q7_to_q15_reordered_no_shift, group__nndata__convert.html#gaba8fd446d5f54760b406ee63b25d1aee, arm_q7_to_q15_reordered_no_shift(const q7_t *pSrc, q15_t *pDst, uint32_t blockSize):&#160;arm_q7_to_q15_reordered_no_shift.c
+arm_q7_to_q15_reordered_no_shift.c, arm__q7__to__q15__reordered__no__shift_8c.html, 
+arm_relu_q15, group__Acti.html#ga53bcc00e54b802919bb3c89c143ee5ba, arm_relu_q15(q15_t *data, uint16_t size):&#160;arm_relu_q15.c
+arm_relu_q15.c, arm__relu__q15_8c.html, 
+arm_relu_q7, group__Acti.html#ga638e803b4fe00426f401783a6255ca30, arm_relu_q7(q7_t *data, uint16_t size):&#160;arm_relu_q7.c
+arm_relu_q7.c, arm__relu__q7_8c.html, 
+ARM_SIGMOID, arm__nnsupportfunctions_8h.html#a7f41aa78cd9a0552fae9b348ee4831a0a49b307e029715fbaa6f3101c806b8c54, arm_nnsupportfunctions.h
+arm_softmax_q15, group__Softmax.html#ga1cacd8b84b8363079311987d0016ebe5, arm_softmax_q15(const q15_t *vec_in, const uint16_t dim_vec, q15_t *p_out):&#160;arm_softmax_q15.c
+arm_softmax_q15.c, arm__softmax__q15_8c.html, 
+arm_softmax_q7, group__Softmax.html#ga89aff212a97a3cf32d9d7ddf11a8f43e, arm_softmax_q7(const q7_t *vec_in, const uint16_t dim_vec, q7_t *p_out):&#160;arm_softmax_q7.c
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+  ['arm_5fnn_5fsat_5fdoubling_5fhigh_5fmult',['arm_nn_sat_doubling_high_mult',['../arm__nnsupportfunctions_8h.html#a51721c10f116c9f5b8d9908367989d44',1,'arm_nnsupportfunctions.h']]],
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index 1746d13..4d7612f 100644
--- a/docs/NN/html/search/search.css
+++ b/docs/NN/html/search/search.css
@@ -4,22 +4,16 @@
     float: left;
 }
 
-#searchli {
-    float: right;
-    display: block;
-    width: 170px;
-    height: 24px;
-}
-
 #MSearchBox {
     white-space : nowrap;
     position: absolute;
     float: none;
     display: inline;
-    margin-top: 3px;
+    margin-top: 8px;
     right: 0px;
     width: 170px;
     z-index: 102;
+    background-color: white;
 }
 
 #MSearchBox .left
@@ -54,7 +48,7 @@
     height:19px;
     background:url('search_m.png') repeat-x;
     border:none;
-    width:116px;
+    width:111px;
     margin-left:20px;
     padding-left:4px;
     color: #909090;
@@ -224,6 +218,10 @@
     text-decoration: underline;
 }
 
+span.SRScope {
+    padding-left: 4px;
+}
+
 .SRPage .SRStatus {
     padding: 2px 5px;
     font-size: 8pt;
@@ -238,3 +236,36 @@
     margin-left: 10px;
     margin-right: 10px;
 }
+
+/*---------------- External search page results */
+
+.searchresult {
+    background-color: #F0F3F8;
+}
+
+.pages b {
+   color: white;
+   padding: 5px 5px 3px 5px;
+   background-image: url("../tab_a.png");
+   background-repeat: repeat-x;
+   text-shadow: 0 1px 1px #000000;
+}
+
+.pages {
+    line-height: 17px;
+    margin-left: 4px;
+    text-decoration: none;
+}
+
+.hl {
+    font-weight: bold;
+}
+
+#searchresults {
+    margin-bottom: 20px;
+}
+
+.searchpages {
+    margin-top: 10px;
+}
+
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index 8917d65..86de31e 100644
--- a/docs/NN/html/search/search.js
+++ b/docs/NN/html/search/search.js
@@ -7,7 +7,7 @@
 
 var indexSectionsWithContent =
 {
-  0: "abcdfghimnoprstuvw",
+  0: "abcdfghilmnopqrstuvw",
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   3: "acghp",
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   5: "bchinorstuvw",
   6: "a",
   7: "a",
-  8: "cdhinpru",
+  8: "cdhilnpqru",
   9: "bcfgns",
   10: "cr"
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diff --git a/docs/NN/html/search/variables_7.js b/docs/NN/html/search/variables_7.js
index 7429444..9e1754e 100644
--- a/docs/NN/html/search/variables_7.js
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+  ['sigmoidhtable_5fq15',['sigmoidHTable_q15',['../arm__nn__tables_8h.html#a107a16eaa36f4392fa3ed3792ad6c2cb',1,'sigmoidHTable_q15():&#160;arm_nntables.c'],['../arm__nntables_8c.html#a107a16eaa36f4392fa3ed3792ad6c2cb',1,'sigmoidHTable_q15():&#160;arm_nntables.c']]],
+  ['sigmoidltable_5fq15',['sigmoidLTable_q15',['../arm__nn__tables_8h.html#a69dc528cb377690d5b37accfdfd226b1',1,'sigmoidLTable_q15():&#160;arm_nntables.c'],['../arm__nntables_8c.html#a69dc528cb377690d5b37accfdfd226b1',1,'sigmoidLTable_q15():&#160;arm_nntables.c']]],
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diff --git a/docs/NN/html/unionarm__nnword.html b/docs/NN/html/unionarm__nnword.html
index ec54dee..1eea800 100644
--- a/docs/NN/html/unionarm__nnword.html
+++ b/docs/NN/html/unionarm__nnword.html
@@ -32,7 +32,7 @@
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   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-NN
-   &#160;<span id="projectnumber">Version 1.1.0</span>
+   &#160;<span id="projectnumber">Version 1.2.0</span>
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    <div id="projectbrief">CMSIS NN Software Library</div>
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@@ -184,7 +184,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:32 for CMSIS-NN by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:20:50 for CMSIS-NN Version 1.2.0 by Arm Ltd. All rights reserved.
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index 656edd3..a4f8645 100644
--- a/docs/Pack/html/DebugConnect.png
+++ b/docs/Pack/html/DebugConnect.png
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diff --git a/docs/Pack/html/algorithmFunc.html b/docs/Pack/html/algorithmFunc.html
index 5a23864..0f4d486 100644
--- a/docs/Pack/html/algorithmFunc.html
+++ b/docs/Pack/html/algorithmFunc.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
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    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
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@@ -314,10 +314,11 @@
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-<p>The argument <em>adr</em> specifies the start address of the page that is to be programmed.</p>
-<p>The argument <em>sz</em> specifies the size of the page that is to be programmed.</p>
-<p>The argument <em>buf</em> points to the buffer containing the data to be programmed.</p>
+<p>The function <b>ProgramPage</b> is used to write code into the Flash memory. It is invoked to download a program to Flash. As Flash memory is typically organized in blocks or pages, the parameters to the function <b>ProgramPage</b> must not cross alignment boundaries of these flash pages. The page size is specified in the struct FlashDevice with the value <b>Program Page Size</b>.</p>
+<p>The argument <em>adr</em> specifies the start address of the page that is to be programmed. It is aligned by the host programming system to a start address of a flash page.</p>
+<p>The argument <em>sz</em> specifies the data size in the data buffer. The host programming system ensures that page boundaries are not crossed.</p>
+<p>The argument <em>buf</em> points to the data buffer containing the data to be programmed.</p>
+<dl class="section note"><dt>Note</dt><dd>The host programming system ensures that the argument <em>adr</em> + <em>sz</em> never crosses any page boundary. The function <b>ProgramPage</b> does therefore not require any provisions for that.</dd></dl>
 <p><b>Code Example</b> </p>
 <div class="fragment"><div class="line"><span class="keywordtype">int</span> ProgramPage (<span class="keywordtype">unsigned</span> <span class="keywordtype">long</span> adr, <span class="keywordtype">unsigned</span> <span class="keywordtype">long</span> sz, <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> *buf) {</div>
 <div class="line"> </div>
@@ -426,7 +427,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="flashAlgorithm.html">Flash Programming</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/api.png b/docs/Pack/html/api.png
new file mode 100644
index 0000000..6264ebc
--- /dev/null
+++ b/docs/Pack/html/api.png
Binary files differ
diff --git a/docs/Pack/html/cmsis.css b/docs/Pack/html/cmsis.css
index bba1010..586d4d2 100644
--- a/docs/Pack/html/cmsis.css
+++ b/docs/Pack/html/cmsis.css
@@ -1148,7 +1148,7 @@
 
 .image
 {
-        text-align: center;
+        text-align: left;
 }
 
 .dotgraph
diff --git a/docs/Pack/html/conditions.png b/docs/Pack/html/conditions.png
new file mode 100644
index 0000000..fd4d698
--- /dev/null
+++ b/docs/Pack/html/conditions.png
Binary files differ
diff --git a/docs/Pack/html/configWizard.html b/docs/Pack/html/configWizard.html
index 7352e6c..c0d6664 100644
--- a/docs/Pack/html/configWizard.html
+++ b/docs/Pack/html/configWizard.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -459,7 +459,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/coresight_setup.html b/docs/Pack/html/coresight_setup.html
index f1a8733..8716086 100644
--- a/docs/Pack/html/coresight_setup.html
+++ b/docs/Pack/html/coresight_setup.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -120,7 +120,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:01 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/cp_Editors.html b/docs/Pack/html/cp_Editors.html
index eb62eb2..9426c06 100644
--- a/docs/Pack/html/cp_Editors.html
+++ b/docs/Pack/html/cp_Editors.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -122,7 +122,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="createPackUtil.html">Utilities for Creating Packs</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/cp_Packs.html b/docs/Pack/html/cp_Packs.html
index d730a8f..30ab87c 100644
--- a/docs/Pack/html/cp_Packs.html
+++ b/docs/Pack/html/cp_Packs.html
@@ -3,8 +3,8 @@
 <head>
 <meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
 <meta http-equiv="X-UA-Compatible" content="IE=9"/>
-<title>Software Packs Overview</title>
-<title>CMSIS-Pack: Software Packs Overview</title>
+<title>Overview</title>
+<title>CMSIS-Pack: Overview</title>
 <link href="tabs.css" rel="stylesheet" type="text/css"/>
 <link href="cmsis.css" rel="stylesheet" type="text/css" />
 <script type="text/javascript" src="jquery.js"></script>
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -107,10 +107,10 @@
 
 <div class="header">
   <div class="headertitle">
-<div class="title">Software Packs Overview </div>  </div>
+<div class="title">Overview </div>  </div>
 </div><!--header-->
 <div class="contents">
-<div class="textblock"><p>The <b>CMSIS-Pack</b> format is used to deliver a Software Pack and is aimed to be scalable for future requirements. It provides a management process and supports a tool independent distribution for:</p>
+<div class="textblock"><p>The <b>CMSIS-Pack</b> format is used to deliver a software package and is aimed to be scalable for future requirements. It provides a management process and supports a tool independent distribution for:</p>
 <ul>
 <li><a class="el" href="createPack_DFP.html">Device Support</a> for tool chains and software applications to target a specific device:<ul>
 <li>Information about the processor and it's features.</li>
@@ -141,58 +141,145 @@
 </li>
 <li><a class="el" href="cp_SWComponents.html#cp_CodeTemplates">User Code Templates</a> help to understand the basic concepts of a software component better and to give the user a good starting point for implementing his application.</li>
 </ul>
-<h1><a class="anchor" id="PackFilenames"></a>
-Pack Conventions</h1>
-<p>A <a class="el" href="cp_SWComponents.html">Software Pack</a> is a collection of files located in directories that are archived in a file with the extension *.pack using the standard <a href="http://en.wikipedia.org/wiki/Zip_%28file_format%29" target="_blank">ZIP file format</a>. The Pack Description file (PDSC) with the file extension *.pdsc contains the <a class="el" href="packFormat.html">meta information</a>, describing the content of a pack based on <a href="https://en.wikipedia.org/wiki/XML" target="_blank">XML</a>. The PDSC file must be:</p>
+<h1><a class="anchor" id="cp_Components"></a>
+Software Components</h1>
+<p>A software component encapsulates a set of related functions. Software components can contain C/C++ source files, object code, assembler files, header files, or libraries. The interfaces of software components should be defined with <a class="el" href="cp_SWComponents.html#cp_API">API</a>headers" to make them substitutable by other compatible components at design time. In addition, CMSIS software components should contain documentation for the software component. They may provide user code templates that give a starting point for the application developer, and can have optional debug view descriptions for debuggers.</p>
+<p>CMSIS software components can also refer to multiple interfaces of other software components. This could be also a hardware abstraction layer for a device peripheral.</p>
+<p>Configuration files contain application specific parameters for a software component. These files are typically copied to the user project workspace; all other files are not modified by the user and can remain in a separate location which avoids that a project workspace is polluted by many source files that should be considered as “black-box” elements by the application programmer.</p>
+<div class="image">
+<img src="software_component.png" alt="software_component.png"/>
+</div>
+<p><a class="anchor" id="cp_CompDetails"></a></p>
+<h2>Technical Details </h2>
+<p>A component lists the files that belong to it and that are relevant for a project. The component itself or each individual file may refer to a <a class="el" href="pdsc_conditions_pg.html#element_condition">condition</a> that must resolve to true; if it is false, the component or file is not applicable in the given context.</p>
+<p>Each software component must have the following attributes that are used to identify the component:</p>
 <ul>
-<li>included in the <a class="el" href="cp_SWComponents.html">Software Pack</a></li>
-<li>located in the base folder of the archive</li>
-<li>compliant with the <a class="el" href="cp_SWComponents.html">Software Pack</a> file <a class="el" href="cp_Packs.html#pack_filename">naming convention</a></li>
+<li>Component Class (<code>Cclass</code>): A component class which is a top-level component name, for example <b>CMSIS</b>, <b>Device</b>, <b>File</b> <b>System</b> </li>
+<li>Component Group (<code>Cgroup</code>): A component group name, for example <b>CMSIS:RTOS</b>, <b>Device:Startup</b>, <b>File</b> <b>System:CORE</b> </li>
+<li>Component Version (<code>Cversion</code>): the version number of the software component.</li>
 </ul>
-<dl class="section note"><dt>Note</dt><dd><ul>
-<li>The <em>base folder</em> is defined to be the root folder './' of a zip archive and it is imperative that the whole <a class="el" href="cp_SWComponents.html">Software Pack</a> only contains a single PDSC file.</li>
-<li>Future tools shall support this case: if the PDSC file is located in an immediate subdirectory, then the subdirectory becomes the base folder. The <a class="el" href="cp_SWComponents.html">Software Pack</a> is installed as if the subdirectory does not exist. All files and directories located in the root folder are ignored and do not get installed.</li>
-</ul>
-</dd></dl>
-<h2><a class="anchor" id="pack_filename"></a>
-Pack File Name</h2>
-<p>A <a class="el" href="cp_SWComponents.html">Software Pack</a> must have a unique filename. Therefore it is constructed from vendor, packname and version and the file extension *.pack.</p>
-<p><b>&lt;vendor&gt;.&lt;name&gt;.&lt;version&gt;.pack</b>.</p>
-<p>Where:</p>
+<p>Optionally, a software component may have additional attributes:</p>
 <ul>
-<li><b>&lt;vendor&gt;</b> is the name of the supplier or vendor of the <a class="el" href="cp_SWComponents.html">Software Pack</a>.</li>
-<li><b>&lt;name&gt;</b> is the name of the <a class="el" href="cp_SWComponents.html">Software Pack</a>. All packs that are published by a vendor must have a unique packname.</li>
-<li><b>&lt;release version="X.Y.Z"&gt;</b>specifies the <a class="el" href="pdsc_package_pg.html#VersionType">version number</a> of the release for the <a class="el" href="cp_SWComponents.html">Software Pack</a>.</li>
-<li><b>.pack</b> is the file extension identifying a <a class="el" href="cp_SWComponents.html">Software Pack</a>.</li>
+<li>Component Sub-Group (<code>Csub</code>): A component sub-group that is used when multiple compatible implementations of a component are be available. For example <b>CMSIS:RTOS:MyRTOS</b>, <b>Device:Driver</b> <b>USBD:Full-speed</b> </li>
+<li>Component Variant (<code>Cvariant</code>): A variant of the software component is typically used when the same implementation has multiple top-level configurations, like debug and release.</li>
+<li>Component Vendor (<code>Cvendor</code>): the supplier of the software component.</li>
+<li>Cbundle: allows to combine multiple software components into a software bundle. For example if a network stack is used, all interfaces must match to that component.</li>
+<li>Instances: allow to deploy multiple instances of a software component. Each instance can have a separate configuration file.</li>
 </ul>
-<dl class="section note"><dt>Note</dt><dd><ul>
-<li>The XML elements <b>&lt;vendor&gt;</b>, <b>&lt;name&gt;</b>, and the version attribute of the <b>&lt;release&gt;</b> are specified in the <a class="el" href="packFormat.html#Filenames">PDSC</a> file. PDSC, Pack filenames are case sensitive and need to match exactly.</li>
-<li><b>&lt;vendor&gt;</b> and <b>&lt;name&gt;</b> <em>must</em> <em>not</em> contain spaces.</li>
-<li>The PDSC file needs to reside in the base folder of the Pack. All file references are relative to the location of the PDSC file.</li>
-</ul>
-</dd></dl>
-<h2><a class="anchor" id="pack_Cclass"></a>
-Software Component Cclasses</h2>
-<p>If you add a software component in the PDSC file, you have to specify a component class (CClass), component group (Cgroup), and the component's version number (Cversion). For more information refer to <a class="el" href="cp_SWComponents.html#cp_Components">Software Components</a>.</p>
-<p>If applicable, try to map the <b>Cclass</b> of your software component to one of the following predefined or already well established classes:</p>
+<p>The <code>Cclass</code>, <code>Cgroup</code>, <code>Csub</code>, <code>Cvariant</code> and <code>Cversion</code> attributes are used together with the vendor specified by the pack to identify a component. A component vendor must ensure that the combination <code>Cclass</code>, <code>Cgroup</code>, <code>Csub</code> and <code>Cversion</code> is unique and not used by multiple components within the same Pack. Advertise a set of attributes to be used by other software components using the <a class="el" href="element_taxonomy.html">/package/taxonomy element</a>.</p>
+<p>For a list of established Cclasses, refer to <a class="el" href="cp_Packs.html#pack_Cclass">Software Component Cclasses</a>.</p>
+<p>In case multiple interdependent components (belonging to the same <code>Cclass</code>) form part of a solution, these can be grouped in a so called <a class="el" href="cp_SWComponents.html#cp_Bundles">bundle</a>.</p>
+<p>Use the following syntax to reference to software components and APIs:<br/>
+<b>&lt;Vendor&gt;::&lt;Cclass&gt;:&lt;Cgroup&gt;:&lt;Csub&gt;</b></p>
+<p><b>Examples:</b> </p>
 <ul>
-<li>Board Support: Generic interfaces for evaluation and development boards</li>
-<li>CMSIS: <em>Cortex Microcontroller Software Interface Standard</em> components</li>
-<li>CMSIS Driver: Unified device drivers compliant to the CMSIS-Driver specification</li>
-<li>Compiler: Arm Compiler software extensions</li>
-<li>Data Exchange: Software components for data exchange</li>
-<li>Device: Startup and system setup components</li>
-<li>File System*: File drive support and file system</li>
-<li>Graphics*: Graphical libraries for user interfaces</li>
-<li>Network*: Network stack using Internet protocols</li>
-<li>RTOS*: Real-time operating systems</li>
-<li>Safety: Components for testing application software against safety standards</li>
-<li>Security*: Encryption for secure communication or storage</li>
-<li>USB*: Universal Serial Bus stack</li>
-<li>Wireless*: Communication stacks such as Bluetooth, WiFi, and ZigBee</li>
+<li><b>::CMSIS:RTOS (API)</b> - the CMSIS-RTOS API.</li>
+<li><b>ARM::CMSIS:DSP</b> - the CMSIS-DSP Library.</li>
+<li><b>::File System:Drive:NOR</b> - the NOR Flash Drive of a file system.</li>
 </ul>
-<p>Classes with a * should always be used together with a <a class="el" href="pdsc_components_pg.html#Component_Bundle">bundle</a> to avoid conflicts with other software components.</p>
-<p>If you wish to standardize a new Cclass, please send an inquiry to <a href="#" onclick="location.href='mai'+'lto:'+'cms'+'is'+'@ar'+'m.'+'com'; return false;">cmsis<span style="display: none;">.nosp@m.</span>@arm<span style="display: none;">.nosp@m.</span>.com</a> or raise an issue on the public <a href="https://github.com/ARM-software/CMSIS_5/issues">CMSIS GitHub development repository</a>.</p>
+<p>Here is an example for the display of software components in a development tool:</p>
+<div class="image">
+<img src="ComponentDisplay.png" alt="ComponentDisplay.png"/>
+<div class="caption">
+Display of a software component in development tools</div></div>
+ <h2>Software Component Files </h2>
+<p>Each software component consists of a certain number of files. Each file has at least the following attributes:</p>
+<ul>
+<li><code>name:</code> File path, file name, and file extension in the format path/name.extension. The file path is relative to the root directory of the Pack.</li>
+<li><code>category:</code> Defines the purpose of the file. Select the predefined value as listed in the table <a class="el" href="pdsc_components_pg.html#FileCategoryEnum">File Categories</a>.</li>
+</ul>
+<p>Optionally, every file may have the following attributes:</p>
+<ul>
+<li><code>attr:</code> Defines the special use and handling of a file. Select a predefined value as defined in the table <a class="el" href="pdsc_components_pg.html#FileAttributeEnum">File Attributes</a>.</li>
+<li><code>condition:</code> Enter the identifier (attribute <em><b>id</b></em>) of a <a class="el" href="pdsc_conditions_pg.html#element_condition">condition</a>. The element is used if the condition resolves to <span class="XML-Token">true</span>.</li>
+<li><code>select:</code> Brief description and purpose of the file. The <b><em>select</em></b> attribute is <b>required</b> when <b><em>attr</em></b> is set to <span class="XML-Token">template</span> or <span class="XML-Token">interface</span>. When multiple template files of a component have the same <b><em>select</em></b> string, they are treated as a single selectable template. This way, multiple template or interface files can be bundled.</li>
+<li><code>src:</code> Path information. The path is specified relative to the Pack Description File (PDSC).</li>
+<li><code>version:</code> File-specific version information. This is used particularly for files copied into the project workspace. Before a file gets copied, a version check avoids unnecessary copy actions. If a file does not have a version, then the component version is used.</li>
+</ul>
+<h1><a class="anchor" id="cp_Cond"></a>
+References to other software components</h1>
+<p>Software components can reference other software components (either within the same pack or in other packs) using conditions:</p>
+<div class="image">
+<img src="conditions.png" alt="conditions.png"/>
+</div>
+<p>A condition describes dependencies on:</p>
+<ul>
+<li>a specific device</li>
+<li>a certain processor</li>
+<li>tool attributes</li>
+<li>the presence of other components (pcak internal or external)</li>
+</ul>
+<p>Conditions can be used to ensure that specific software components are either present in the system or can prevent that illegal combinations of software components are chosen by the user.</p>
+<p>Conditions are used to define <b>AND/OR</b> rules that make components conditional and therefore only available under certain circumstances, for example for specific devices or processors. Conditions are also used to express dependencies between software components.</p>
+<p>Each condition has an <b>id</b> that is unique within the scope of a the PDSC file. An id can be referenced in the <code>condition</code> attribute of components, APIs, examples, files and other conditions. All attributes set in a <b>accept</b>, <b>require</b>, or <b>deny</b> element must resolve to true for the element to become true. A condition becomes true when:</p>
+<ul>
+<li>At least one <b>accept</b> element is true, <em>AND</em> </li>
+<li>all <b>require</b> elements are true, <em>AND</em> </li>
+<li>no <b>deny</b> element is true.</li>
+</ul>
+<p>If a condition resolves to false during processing, the respective element will be ignored.</p>
+<h1><a class="anchor" id="cp_Requirements"></a>
+Requirements</h1>
+<p>Packs can require other packs to be available (and can even ask for a specific version of a pack):</p>
+<div class="image">
+<img src="requirements.png" alt="requirements.png"/>
+</div>
+<p>There are three different requirement types:</p>
+<ul>
+<li>The <code>packages</code> section lists CMSIS Packs that have been used to configure the project. This includes the specification of a version range to ensure compatibility. If no version is provided, the latest installed version is used. If not yet installed, the latest available version will be installed before resolving the configuration.</li>
+<li>The <code>compilers</code> section specifies the toolchains that are supported by this example. The required compiler version is specified using the version element. If no compiler is specified, it is assumed that any toolchain will work.</li>
+<li>The <code>languages</code> section allows to specify requirements regarding the programming language, for example C99 standard. If no language requirements are set, ANSI C is assumed.</li>
+</ul>
+<h1><a class="anchor" id="cp_APIDef"></a>
+Central API definition</h1>
+<p>The CMSIS-Pack system allows a central API definition that shares header file information and documentation of an <a class="el" href="pdsc_apis_pg.html#element_api">API interface</a>.</p>
+<div class="image">
+<img src="api.png" alt="api.png"/>
+</div>
+<p>This single API interface definition ensures consistency when it is used across multiple implementations that consume the interface. The API interface definition can be distributed separately or as part of the software component that consumes this interface.</p>
+<p>An example is the <b>CMSIS-Driver</b> pack that contains various hardware interface drivers that all compatible with the CMSIS-Driver APIs (that are published in the CMSIS Pack).</p>
+<h1><a class="anchor" id="cp_RTECompH"></a>
+Inventory header file: RTE_Components.h</h1>
+<p>Frequently, the behavior or features of a software component depend on the presence of other software components in the application. For example, a network stack can interface to Ethernet or serial PPP (UART). Depending on the presence of interface components, the implementation may behave differently.</p>
+<p>To simplify application configuration, the file <b>RTE_Components.h</b> is generated before the project build step. It contains the inventory of all selected components. For each selected software component, it contains #define statements that are specified by the component meta data. The following example shows an RTE_Components.h file:</p>
+<div class="fragment"><div class="line"><span class="comment">/* </span></div>
+<div class="line"><span class="comment">   Auto generated Run-Time-Environment Component Configuration File </span></div>
+<div class="line"><span class="comment">          * Do not modify ! *** </span></div>
+<div class="line"><span class="comment"> */</span> </div>
+<div class="line"></div>
+<div class="line"><span class="preprocessor">#ifndef RTE_COMPONENTS_H </span></div>
+<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define RTE_COMPONENTS_H </span></div>
+<div class="line"><span class="preprocessor"></span></div>
+<div class="line"><span class="comment">/* </span></div>
+<div class="line"><span class="comment">   Define the Device Header File: </span></div>
+<div class="line"><span class="comment"> */</span> </div>
+<div class="line"></div>
+<div class="line"><span class="preprocessor">#define CMSIS_device_header &quot;stm32f10x.h&quot; </span></div>
+<div class="line"><span class="preprocessor"></span></div>
+<div class="line"><span class="preprocessor">#define RTE_Network_Interface_ETH_0     </span><span class="comment">/* Network Interface ETH 0 */</span><span class="preprocessor"> </span></div>
+<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define RTE_Network_Socket_BSD          </span><span class="comment">/* Network Socket BSD */</span><span class="preprocessor"> </span></div>
+<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define RTE_Network_Socket_TCP          </span><span class="comment">/* Network Socket TCP */</span><span class="preprocessor"> </span></div>
+<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define RTE_Network_Socket_UDP          </span><span class="comment">/* Network Socket UDP */</span><span class="preprocessor"> </span></div>
+<div class="line"><span class="preprocessor"></span></div>
+<div class="line"><span class="preprocessor">#endif </span><span class="comment">/* RTE_COMPONENTS_H */</span><span class="preprocessor"></span></div>
+</div><!-- fragment --><p>Use this information in other header files to control features that depend on the inclusion to other software components. For example:</p>
+<div class="fragment"><div class="line"><span class="preprocessor">#include &quot;RTE_Components.h&quot;</span> </div>
+<div class="line"><span class="preprocessor">#ifdef  RTE_Network_Interface_ETH_0  // if component is included </span></div>
+<div class="line"><span class="preprocessor"></span><span class="preprocessor">#include &quot;Net_Config_ETH_0.h&quot;</span>        <span class="comment">// add related configuration file </span></div>
+<div class="line"><span class="preprocessor">#endif</span></div>
+</div><!-- fragment --><h1><a class="anchor" id="cp_Combine"></a>
+Combining software components</h1>
+<p>When using software components, you can use the conditions to automatically resolve dependencies on other components. Use this to combine components for a project in a certain way, while combining them differently for another project. In the following example, a network stack transfers data via Ethernet. The network stack requires a MAC and PHY to do this. The selected device from silicon vendor A that contains an on-chip MAC, thus only requiring a PHY to be selected:</p>
+<div class="image">
+<img src="internal_mac_example.png" alt="internal_mac_example.png"/>
+<div class="caption">
+Example with internal MAC</div></div>
+<p> You can copy the project, select a different device from silicon vendor B for example and let the run-time environment manager do the exchange of the components. As the new devices do not have an on-chip MAC, you need to select a different component to fulfill the requirement for the network stack:</p>
+<div class="image">
+<img src="external_mac_example.png" alt="external_mac_example.png"/>
+<div class="caption">
+Example with external MAC and PHY</div></div>
+<p> This reduces the development time drastically, as the developer does not need to care for the correct dependency between software components, but can concentrate on the implementation of his own application code.</p>
 <h1><a class="anchor" id="cp_PackSteps"></a>
 Steps to Create a Pack</h1>
 <p>The following image shows the basic steps that are required to create a Software Pack:</p>
@@ -219,12 +306,88 @@
 <tr>
 <td>Pack_with_Board_Support.zip </td><td><a class="el" href="createPackBoard.html">Pack with Board Support</a> </td></tr>
 </table>
+<h1><a class="anchor" id="PackFilenames"></a>
+Pack Conventions</h1>
+<p>A <a class="el" href="cp_SWComponents.html">Software Pack</a> is a collection of files located in directories that are archived in a file with the extension *.pack using the standard <a href="http://en.wikipedia.org/wiki/Zip_%28file_format%29" target="_blank">ZIP file format</a>. The Pack Description file (PDSC) with the file extension *.pdsc contains the <a class="el" href="packFormat.html">meta information</a>, describing the content of a pack based on <a href="https://en.wikipedia.org/wiki/XML" target="_blank">XML</a>. The PDSC file must be:</p>
+<ul>
+<li>included in the <a class="el" href="cp_SWComponents.html">Software Pack</a></li>
+<li>located in the base folder of the archive</li>
+<li>compliant with the <a class="el" href="cp_SWComponents.html">Software Pack</a> file <a class="el" href="cp_Packs.html#pack_filename">naming convention</a></li>
+</ul>
+<dl class="section note"><dt>Note</dt><dd><ul>
+<li>The <em>base folder</em> is defined to be the root folder './' of a zip archive and it is imperative that the whole <a class="el" href="cp_SWComponents.html">Software Pack</a> only contains a single PDSC file.</li>
+<li>Future tools shall support this case: if the PDSC file is located in an immediate subdirectory, then the subdirectory becomes the base folder. The <a class="el" href="cp_SWComponents.html">Software Pack</a> is installed as if the subdirectory does not exist. All files and directories located in the root folder are ignored and do not get installed.</li>
+</ul>
+</dd></dl>
+<h2><a class="anchor" id="pack_filename"></a>
+Pack File Name</h2>
+<p>A <a class="el" href="cp_SWComponents.html">Software Pack</a> must have a unique filename. Therefore it is constructed from vendor, packname and version and the file extension *.pack.</p>
+<p><b>&lt;vendor&gt;.&lt;name&gt;.&lt;version&gt;.pack</b>.</p>
+<p>Where:</p>
+<ul>
+<li><b>&lt;vendor&gt;</b> is the name of the supplier or vendor of the <a class="el" href="cp_SWComponents.html">Software Pack</a>.</li>
+<li><b>&lt;name&gt;</b> is the name of the <a class="el" href="cp_SWComponents.html">Software Pack</a>. All packs that are published by a vendor must have a unique pack name.</li>
+<li><b>&lt;release version="X.Y.Z"&gt;</b>specifies the <a class="el" href="pdsc_package_pg.html#VersionType">version number</a> of the release for the <a class="el" href="cp_SWComponents.html">Software Pack</a>.</li>
+<li><b>.pack</b> is the file extension identifying a <a class="el" href="cp_SWComponents.html">Software Pack</a>.</li>
+</ul>
+<dl class="section note"><dt>Note</dt><dd><ul>
+<li>The XML elements <b>&lt;vendor&gt;</b>, <b>&lt;name&gt;</b>, and the version attribute of the <b>&lt;release&gt;</b> are specified in the <a class="el" href="packFormat.html#Filenames">PDSC</a> file. PDSC, Pack filenames are case sensitive and need to match exactly.</li>
+<li><b>&lt;vendor&gt;</b> and <b>&lt;name&gt;</b> <em>must</em> <em>not</em> contain spaces.</li>
+<li>The PDSC file needs to reside in the base folder of the Pack. All file references are relative to the location of the PDSC file.</li>
+</ul>
+</dd></dl>
+<h2><a class="anchor" id="pack_Cclass"></a>
+Software Component Cclasses</h2>
+<p>If you add a software component in the PDSC file, you have to specify a component class (CClass), component group (Cgroup), and the component's version number (Cversion). For more information refer to <a class="el" href="cp_SWComponents.html#cp_Components">Software Components</a>.</p>
+<p>If applicable, try to map the <b>Cclass</b> of your software component to one of the following predefined or already well established classes listed below. These <b>Cclass</b> names are pre-defined in the CMSIS pack using the <a class="el" href="element_taxonomy.html">taxonomy</a> element.</p>
+<table class="doxtable">
+<tr>
+<th align="left">Cclass </th><th align="left">Description  </th></tr>
+<tr>
+<td align="left">Audio </td><td align="left">Software components for audio processing </td></tr>
+<tr>
+<td align="left">Board Support </td><td align="left">Generic interfaces for evaluation and development boards </td></tr>
+<tr>
+<td align="left">Board Part * </td><td align="left">Drivers that support an external component available on an evaluation board </td></tr>
+<tr>
+<td align="left">CMSIS </td><td align="left"><em>Cortex Microcontroller Software Interface Standard</em> components </td></tr>
+<tr>
+<td align="left">CMSIS Driver </td><td align="left">Unified device drivers compliant to the CMSIS-Driver specification </td></tr>
+<tr>
+<td align="left">Compiler </td><td align="left">Arm Compiler software extensions </td></tr>
+<tr>
+<td align="left">Data Exchange </td><td align="left">Data exchange components or data formatter, for example JSON </td></tr>
+<tr>
+<td align="left">Device </td><td align="left">Startup and system setup components </td></tr>
+<tr>
+<td align="left">Extension Board * </td><td align="left">Drivers that support an extension boards or shield </td></tr>
+<tr>
+<td align="left">File System* </td><td align="left">File drive support and file system </td></tr>
+<tr>
+<td align="left">Graphics* </td><td align="left">Graphical libraries for user interfaces </td></tr>
+<tr>
+<td align="left">IoT Client * </td><td align="left">IoT cloud client connectors </td></tr>
+<tr>
+<td align="left">IoT Utility * </td><td align="left">IoT specific utilities, i.e. a socket interface </td></tr>
+<tr>
+<td align="left">Network* </td><td align="left">Network stack using Internet protocols </td></tr>
+<tr>
+<td align="left">RTOS* </td><td align="left">Real-time operating systems </td></tr>
+<tr>
+<td align="left">Security* </td><td align="left">Encryption for secure communication or storage </td></tr>
+<tr>
+<td align="left">USB* </td><td align="left">Universal Serial Bus stack </td></tr>
+<tr>
+<td align="left">Utility </td><td align="left">Generic software utility components </td></tr>
+</table>
+<p>Classes with a * should always be used together with a <a class="el" href="pdsc_components_pg.html#Component_Bundle">bundle</a> to avoid conflicts with other software components.</p>
+<p>If you wish to standardize a new Cclass, please send an inquiry to <a href="#" onclick="location.href='mai'+'lto:'+'cms'+'is'+'@ar'+'m.'+'com'; return false;">cmsis<span style="display: none;">.nosp@m.</span>@arm<span style="display: none;">.nosp@m.</span>.com</a> or raise an issue on the public <a href="https://github.com/ARM-software/CMSIS_5/issues">CMSIS GitHub development repository</a>. </p>
 </div></div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/cp_SWComponents.html b/docs/Pack/html/cp_SWComponents.html
index 0783053..5cf2a0a 100644
--- a/docs/Pack/html/cp_SWComponents.html
+++ b/docs/Pack/html/cp_SWComponents.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -526,7 +526,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/cp_ZIPTool.html b/docs/Pack/html/cp_ZIPTool.html
index ea57c45..243fc1f 100644
--- a/docs/Pack/html/cp_ZIPTool.html
+++ b/docs/Pack/html/cp_ZIPTool.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -118,7 +118,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="createPackUtil.html">Utilities for Creating Packs</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/cpdsc_pg.html b/docs/Pack/html/cpdsc_pg.html
index d650397..46abb8f 100644
--- a/docs/Pack/html/cpdsc_pg.html
+++ b/docs/Pack/html/cpdsc_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -741,7 +741,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:01 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/createPackBoard.html b/docs/Pack/html/createPackBoard.html
index c3532ae..33aa415 100644
--- a/docs/Pack/html/createPackBoard.html
+++ b/docs/Pack/html/createPackBoard.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -244,7 +244,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/createPackPublish.html b/docs/Pack/html/createPackPublish.html
index 4a5207a..466f7fb 100644
--- a/docs/Pack/html/createPackPublish.html
+++ b/docs/Pack/html/createPackPublish.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -111,6 +111,22 @@
 </div><!--header-->
 <div class="contents">
 <div class="textblock"><p>There are multiple ways to distribute a software pack:</p>
+<h1><a class="anchor" id="cp_prerequisites"></a>
+Prerequisites</h1>
+<p>Before you start to distribute a software pack, you need to make sure that it does not contain errors. An error- and warning-free run of the <code>gen_pack.bat</code> script from the <a class="el" href="cp_Packs.html#PackTutorials">Pack Tutorial</a> is a good start. but you also need to make sure that the schema has been validated. Pack Installer provides an easy mechanism to check the XML schema:</p>
+<ul>
+<li>Install the pack using Pack Installer.</li>
+<li>Right-click on the pack version number and select <b>Schema Check</b>: <br/>
+ <div class="image">
+<img src="schema_check.png" alt="schema_check.png"/>
+</div>
+</li>
+<li>The <b>Output</b> window shows the result. If errors are reported, please make sure to fix them before continuing.<br/>
+ <div class="image">
+<img src="schema_check_output.png" alt="schema_check_output.png"/>
+</div>
+ This is especially important when handing in the pack to be indexed by <a class="el" href="createPackPublish.html#cp_KeilComPack">Arm's pack index service</a>. The pack importer will ignore all PDSC files that do not pass the check against the most recently published PACK.xsd schema file and thus your pack will not be available for download.</li>
+</ul>
 <h1><a class="anchor" id="cp_LocalInstallation"></a>
 Local Installation</h1>
 <p>The easiest way to distribute a software pack is attaching it to an email or using other means of electronic distribution (for example using a company internal file server). The installation of a software pack is usually triggered by double-clicking the Pack file. The pack management tool is invoked and the Pack is installed on the local machine. After installation, the Pack will be shown in the list of installed packs (tool dependent). If the PDSC file does not contain a valid <code>&lt;url&gt;</code> element, a manual installation is required to update a software pack. Otherwise, pack management tools can check for updates on the server or the local machine that is specified by <code>&lt;url&gt;</code>.</p>
@@ -145,8 +161,8 @@
 </ul>
 </dd></dl>
 <h1><a class="anchor" id="cp_KeilComPack"></a>
-Publishing on www.keil.com/pack</h1>
-<p>Arm maintains a list of available software packs. If you wish to add your packs to that list, send either your vendor.pidx file or your PDSC file to the following email address: <a href="#" onclick="location.href='mai'+'lto:'+'CMS'+'IS'+'@ar'+'m.'+'com'; return false;">CMSIS@arm.com</a>. The PIDX file will be processed and all referenced PDSC files will be validated. The following content will be processed in order to generate the web site (<a href="http://www.keil.com/dd2/pack">www.keil.com/dd2/pack</a>) and index file (<a href="http://www.keil.com/pack/index.pidx">www.keil.com/pack/index.pidx</a>):</p>
+Publishing using Arm's Pack Index Service</h1>
+<p>Arm maintains a list of available software packs. If you wish to add your packs to that list, send either your vendor.pidx file or your PDSC file to the following email address: <a href="#" onclick="location.href='mai'+'lto:'+'CMS'+'IS'+'@ar'+'m.'+'com'; return false;">CMSIS@arm.com</a>. The PIDX file will be processed and all referenced PDSC files will be validated. The following content will be processed in order to generate the web site (<a href="https://developer.arm.com/embedded/cmsis/cmsis-packs">https://developer.arm.com/embedded/cmsis/cmsis-packs</a>):</p>
 <ul>
 <li>Version</li>
 <li>Release Notes</li>
@@ -180,7 +196,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/createPackUtil.html b/docs/Pack/html/createPackUtil.html
index 4dde94c..0ce756c 100644
--- a/docs/Pack/html/createPackUtil.html
+++ b/docs/Pack/html/createPackUtil.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -122,7 +122,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/createPack_DFP.html b/docs/Pack/html/createPack_DFP.html
index eea9e37..4e0a87c 100644
--- a/docs/Pack/html/createPack_DFP.html
+++ b/docs/Pack/html/createPack_DFP.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -524,7 +524,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/debug_description.html b/docs/Pack/html/debug_description.html
index 7085c9a..0f584a7 100644
--- a/docs/Pack/html/debug_description.html
+++ b/docs/Pack/html/debug_description.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -729,9 +729,9 @@
 <p>To override a default sequence or to create a custom (default) sequence, you need to write <a class="el" href="pdsc_family_pg.html#element_sequence">sequence</a> elements. The following sections show how to use the built-in debug access syntax, expressions, and debug access functions to create custom sequences.</p>
 <h2><a class="anchor" id="DebugSyntaxRules"></a>
 Debug access syntax rules</h2>
-<p>Debug accesses are described in <b>block</b> elements of a debug access sequence (<b>sequence</b> element). The following syntax is used for this purpose:</p>
+<p>Debug accesses are described in <b>block</b> elements (within a debug access <b>sequence</b> or <b>control</b> element). The following syntax is used for this purpose:</p>
 <ul>
-<li>The contents of a <b>block</b> element is a series of statements.</li>
+<li>One or more statements have to be encapsulated in a <b>block</b> element.</li>
 <li>Each statement must begin in a new line and is terminated by a <span class="XML-Token">;</span> character.</li>
 <li>A typical statement consists of variable, followed by a <span class="XML-Token">=</span> character and an expression, where the <span class="XML-Token">=</span> character is an assignment of the <a class="el" href="debug_description.html#ExpressionType">expression</a> result to the variable: <div class="fragment"><div class="line">variable = expression;</div>
 </div><!-- fragment --></li>
@@ -1613,7 +1613,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="coresight_setup.html">Debug Setup with CMSIS-Pack</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:01 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/element_dominate.html b/docs/Pack/html/element_dominate.html
new file mode 100644
index 0000000..103fb8d
--- /dev/null
+++ b/docs/Pack/html/element_dominate.html
@@ -0,0 +1,152 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>/package/dominate element</title>
+<title>CMSIS-Pack: /package/dominate element</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Pack
+   &#160;<span id="projectnumber">Version 1.6.0</span>
+   </div>
+   <div id="projectbrief">Delivery Mechanism for Software Packs</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('element_dominate.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">/package/dominate element </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="element_dominate.html">/package/dominate element</a> specifies that the Pack contains one or more <a class="el" href="pdsc_devices_pg.html#element_devices">device</a>, <a class="el" href="pdsc_apis_pg.html#element_apis">API</a>, or <a class="el" href="pdsc_components_pg.html#element_components">component</a> that overrules other packs that contain identical named <a class="el" href="pdsc_devices_pg.html#element_devices">device</a>, <a class="el" href="pdsc_apis_pg.html#element_apis">API</a>, or <a class="el" href="pdsc_components_pg.html#element_components">component</a>.</p>
+<p>This attribute is useful for framing packs that:</p>
+<ul>
+<li>Contain <em>certified</em> software components which should overrule software components with identical name of other packs.</li>
+<li>Contain new device definitions of devices that were previously defined in different packs.</li>
+</ul>
+<p><b>Example:</b> </p>
+<div class="fragment"><div class="line">&lt;package&gt;</div>
+<div class="line">  ...</div>
+<div class="line">  &lt;dominate info=<span class="stringliteral">&quot;CMSIS-Core, RTOS2, RTX5, Event Recorder, C Library certified for Cortex-M3&quot;</span>/&gt;</div>
+<div class="line">  ...</div>
+<div class="line">&lt;/package&gt;</div>
+</div><!-- fragment --><p>&#160;</p>
+<table  class="cmtable" summary="Element: dominate">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="pdsc_package_pg.html#element_package">package</a> </td><td colspan="3"><a class="el" href="pdsc_package_pg.html#element_package">/package</a>  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>info </td><td>Descriptive text that explains the reason for the overwrite using dominate. </td><td>xs:string </td><td>optional  </td></tr>
+</table>
+<hr/>
+ </div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="packFormat.html">Pack Description (*.pdsc) Format</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Pack/html/element_keywords.html b/docs/Pack/html/element_keywords.html
index 22c58c3..4f8962e 100644
--- a/docs/Pack/html/element_keywords.html
+++ b/docs/Pack/html/element_keywords.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -140,7 +140,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="packFormat.html">Pack Description (*.pdsc) Format</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/element_releases.html b/docs/Pack/html/element_releases.html
index 1890844..614818a 100644
--- a/docs/Pack/html/element_releases.html
+++ b/docs/Pack/html/element_releases.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -187,7 +187,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="packFormat.html">Pack Description (*.pdsc) Format</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/element_repository.html b/docs/Pack/html/element_repository.html
index 4e10a26..20ff6e7 100644
--- a/docs/Pack/html/element_repository.html
+++ b/docs/Pack/html/element_repository.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -136,7 +136,7 @@
 <li>Open the URL specified by the <code>&lt;repository&gt;</code> element in a browser.</li>
 <li>Create a fork of the repository.</li>
 <li>Clone the fork on your machine (you may want to checkout the <code>tag</code> specified in the <a class="el" href="element_releases.html">&lt;release&gt;</a> element).</li>
-<li>Create a branch for you modifications.</li>
+<li>Create a branch for your modifications.</li>
 <li>Develop and test the modifications of your branch and push the branch to GitHub.</li>
 <li>Create a pull request of your branch into the upstream repository.</li>
 </ul>
@@ -147,7 +147,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="packFormat.html">Pack Description (*.pdsc) Format</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/element_requirements_pg.html b/docs/Pack/html/element_requirements_pg.html
index 99fbe69..a958a23 100644
--- a/docs/Pack/html/element_requirements_pg.html
+++ b/docs/Pack/html/element_requirements_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -250,7 +250,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="packFormat.html">Pack Description (*.pdsc) Format</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/element_taxonomy.html b/docs/Pack/html/element_taxonomy.html
index f2b99e2..b450107 100644
--- a/docs/Pack/html/element_taxonomy.html
+++ b/docs/Pack/html/element_taxonomy.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -201,25 +201,41 @@
 <tr>
 <th>Cclass= </th><th>Description  </th></tr>
 <tr>
-<td class="XML-Token">Board Support </td><td>Components providing interfaces for Evaluation and Development Boards </td></tr>
+<td class="XML-Token">Audio </td><td>Software components for audio processing  </td></tr>
+<tr>
+<td class="XML-Token">Board Support </td><td>Components providing interfaces for Evaluation and Development Boards  </td></tr>
+<tr>
+<td class="XML-Token">Board Part </td><td>Drivers that support an external component available on an evaluation board  </td></tr>
+<tr>
+<td class="XML-Token">Compiler </td><td>Components implementing compiler specific interfaces (e.g. Retargeting)  </td></tr>
 <tr>
 <td class="XML-Token">CMSIS </td><td>Components defined by Cortex Microcontroller Software Interface Standard (e.g. <a href="../../Core/html/index.html" class="el">CMSIS-Core(M)</a>, <a href="../../Core_A/html/index.html" class="el">CMSIS-Core(A)</a>, <a href="../../DSP/html/index.html" class="el">CMSIS-DSP</a> and <a href="../../RTOS/html/index.html" class="el">CMSIS-RTOS</a>)  </td></tr>
 <tr>
+<td class="XML-Token">CMSIS Driver </td><td>Components implementing unified device drivers compliant to <a href="../../Driver/html/index.html" class="el">CMSIS-Driver</a> (e.g. UART, SPI, USB, etc.)   </td></tr>
+<tr>
 <td class="XML-Token">Device </td><td>Components containing device specific implementations of non-standard APIs (e.g. HAL drivers, CMSIS Startup files)  </td></tr>
 <tr>
-<td class="XML-Token">CMSIS Driver </td><td>Components implementing unified device drivers compliant to <a href="../../Driver/html/index.html" class="el">CMSIS-Driver</a> (e.g. UART, SPI, USB, etc.)   </td></tr>
+<td class="XML-Token">Data Exchange </td><td>Components implementing some kind of data exchange or data formatter  </td></tr>
+<tr>
+<td class="XML-Token">Extension Board </td><td>Drivers that support an extension board or shield  </td></tr>
 <tr>
 <td class="XML-Token">File System </td><td>Components implementing some kind of File Systems (e.g. Flash or RAM based file systems)  </td></tr>
 <tr>
 <td class="XML-Token">Graphics </td><td>Components implementing some kind of Display and Graphics Software  </td></tr>
 <tr>
-<td class="XML-Token">Network </td><td>Components implementing some kind of Network Communications (e.g. TCP/IP Stack)  </td></tr>
+<td class="XML-Token">IoT Client </td><td>Components implementing some kind of IoT cloud client connector  </td></tr>
+<tr>
+<td class="XML-Token">IoT Utility </td><td>IoT specific software utility  </td></tr>
+<tr>
+<td class="XML-Token">Network </td><td>Components implementing some kind of network communications (e.g. TCP/IP Stack)  </td></tr>
+<tr>
+<td class="XML-Token">RTOS </td><td>Components implementing some kind of real-time operating system (e.g. FreeRTOS, Micrium Real Time Kernel)  </td></tr>
+<tr>
+<td class="XML-Token">Security </td><td>Components implementing some kind of encryption for secure communication or storage  </td></tr>
 <tr>
 <td class="XML-Token">USB </td><td>Components implementing some kind of USB interfaces (e.g. Host and Device interfaces)  </td></tr>
 <tr>
-<td class="XML-Token">Compiler </td><td>Components implementing Compiler specific interfaces (e.g. Retargeting)  </td></tr>
-<tr>
-<td class="XML-Token">RTOS </td><td>Components implementing some kind of Real-time Operating System (e.g. FreeRTOS, Micrium Real Time Kernel)  </td></tr>
+<td class="XML-Token">Utility </td><td>Generic software utility components  </td></tr>
 </table>
 <p>&#160;</p>
 <p><a class="anchor" id="CgroupType"></a><b>Table: Component Groups</b></p>
@@ -247,7 +263,11 @@
 <tr>
 <td class="XML-Token">DSP </td><td>A component implementing the <a href="../../DSP/html/index.html" class="el">CMSIS-DSP</a> API specification.  </td></tr>
 <tr>
+<td class="XML-Token">NN Lib </td><td>A component implementing the <a href="../../NN/html/index.html" class="el">CMSIS-NN</a> API specification.  </td></tr>
+<tr>
 <td class="XML-Token">RTOS </td><td>A component implementing the <a href="../../RTOS/html/index.html" class="el">CMSIS-RTOS</a> API specification.  </td></tr>
+<tr>
+<td class="XML-Token">RTOS2 </td><td>A component implementing the <a href="../../RTOS2/html/index.html" class="el">CMSIS-RTOS v2</a> API specification.  </td></tr>
 </table>
 <p>&#160;</p>
 </div></div><!-- contents -->
@@ -256,7 +276,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="packFormat.html">Pack Description (*.pdsc) Format</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/external_mac_example.png b/docs/Pack/html/external_mac_example.png
new file mode 100644
index 0000000..3cf3c23
--- /dev/null
+++ b/docs/Pack/html/external_mac_example.png
Binary files differ
diff --git a/docs/Pack/html/flashAlgorithm.html b/docs/Pack/html/flashAlgorithm.html
index a76a8f8..d454cf6 100644
--- a/docs/Pack/html/flashAlgorithm.html
+++ b/docs/Pack/html/flashAlgorithm.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -158,7 +158,9 @@
 <div class="line">};</div>
 </div><!-- fragment --></li>
 </ol>
-<dl class="section note"><dt>Note</dt><dd>The <b>Device Name</b> will usually be shown in tools to identify the Flash algorithm. Make sure that this is changed to the correct device name from the DFP.</dd></dl>
+<dl class="section note"><dt>Note</dt><dd>The <b>Device Name</b> is usually be shown in tools to identify the Flash algorithm. Make sure that this name reflects the device name.</dd>
+<dd>
+The <b>Programming Page Size</b> specifies the block size for programming using the function <a class="el" href="algorithmFunc.html#ProgramPage">ProgramPage</a>. For devices with small block sizes it might be better to specify a multiple of the physical block size as this reduces the communication overhead to the target. An optimal block size for fast programming is 1024 bytes, however the system itself does not restrict this size value.</dd></dl>
 <h1><a class="anchor" id="AddFPA"></a>
 Adding an Algorithm to a Pack</h1>
 <p>The generated <b>*.FLM</b> file needs to be added to the <a class="el" href="createPack_DFP.html">Pack with Device Support</a>, so that it is available to the tool user for programming his device. Usually, a directory <b>Flash</b> is created and the algorithm is saved in this directory.</p>
@@ -183,7 +185,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/index.html b/docs/Pack/html/index.html
index 76898c5..f2c4fbe 100644
--- a/docs/Pack/html/index.html
+++ b/docs/Pack/html/index.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -117,11 +117,19 @@
 <li>Device parameters along with startup code and programming algorithms</li>
 <li>Example projects</li>
 </ul>
-<p>The complete file collection along with the PDSC file is shipped in ZIP-format as a Software Pack. The PDSC file is designed for software development environments and describes the user and device relevant context for the files supplied within such a Software Pack. A Software Pack can be used for multiple purposes (see below).</p>
+<p>The complete file collection along with the PDSC file is shipped in ZIP-format (renamed to *.pack). The PDSC file is designed for software development environments and describes the user and device relevant context for the files supplied within such a pack file.</p>
+<p>The CMSIS-Pack system solves several problems:</p>
+<ul>
+<li>It provides meta-data of files that relate to a software component. All files that belong to a software component can be identified and information about the original provider is preserved.</li>
+<li>It enables consistent software component upgrade and identifies incompatible configuration files that may be part of the user application.</li>
+<li>Software component providers can specify the interfaces and relationship to other software components.</li>
+<li>The meta-data of a software component can include dependency information for toolchains, devices, and processors which simplifies the integration into application programs.</li>
+</ul>
 <p>After installing a <a class="el" href="cp_SWComponents.html">Software Pack</a>, all included software components are available to the development tools. <a class="el" href="cp_SWComponents.html#cp_Components">Software components</a> are a collection of source modules, header and configuration files as well as libraries. Packs containing software components can also include <a class="el" href="cp_SWComponents.html#cp_Examples">Example Projects</a> and <a class="el" href="cp_SWComponents.html#cp_CodeTemplates">User Code Templates</a>.</p>
 <p>The <a class="el" href="pack_revisionHistory.html">Revision History of CMSIS-Pack</a> lists the main changes between versions.</p>
 <h1><a class="anchor" id="SWPackVariants"></a>
 Software Pack Use Cases</h1>
+<p>A pack can be used for multiple purposes:</p>
 <div class="image">
 <img src="SPVariants_small.png" alt="SPVariants_small.png"/>
 <div class="caption">
@@ -135,21 +143,21 @@
 <li><b>In-house Software Packs:</b> usually contain software components that can be distributed within a company or engineering group.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>A Software Pack can address multiple use cases at the same time!</dd></dl>
-<p>The following sections give you more details on the basics:</p>
+<p>The following sections provide more information:</p>
 <ul>
-<li><a class="el" href="cp_Packs.html">Software Packs Overview</a> explains the steps required for creating a Software Pack in general.</li>
-<li><a class="el" href="cp_SWComponents.html">Pack with Software Components</a> gives detailed information on the contents of the PDSC file.</li>
-<li><a class="el" href="createPack_DFP.html">Pack with Device Support</a> describes additional requirements of Device Family Packs (DFPs).</li>
+<li>In the <a class="el" href="cp_Packs.html">Overview</a>, learn the basics and the required steps for creating a pack.</li>
+<li><a class="el" href="cp_SWComponents.html">Pack with Software Components</a> shows how to start a pack from scratch.</li>
+<li><a class="el" href="createPack_DFP.html">Pack with Device Support</a> describes how to enable device support in a DFP.</li>
 <li><a class="el" href="createPackBoard.html">Pack with Board Support</a> covers the creation of Board Support Packs (BSPs).</li>
-<li><a class="el" href="pack_Example.html">Pack Example</a> explains the Software Pack example that is part of the CMSIS Pack in more detail.</li>
-<li><a class="el" href="createPackPublish.html">Publish a Pack</a> shows the options for publishing a Pack.</li>
-<li><a class="el" href="createPackUtil.html">Utilities for Creating Packs</a> caters to programs that are useful during the creation of a Pack.</li>
+<li><a class="el" href="pack_Example.html">Pack Example</a> explains the available example pack in more detail.</li>
+<li>Learn how to <a class="el" href="createPackPublish.html">Publish a Pack</a>.</li>
+<li><a class="el" href="createPackUtil.html">Utilities for Creating Packs</a> are available that are useful during the creation of a pack.</li>
 <li><a class="el" href="packFormat.html">Pack Description (*.pdsc) Format</a> describes all XML elements that can be used in a PDSC file.</li>
 <li><a class="el" href="configWizard.html">Configuration Wizard Annotations</a> can be used to create GUI-like elements in development tools for configuration files.</li>
-<li><a class="el" href="flashAlgorithm.html">Flash Programming</a> are used to erase or download applications to Flash devices.</li>
-<li><a class="el" href="coresight_setup.html">Debug Setup with CMSIS-Pack</a> allow to create tool-agnostic debug and trace configurations</li>
+<li><a class="el" href="flashAlgorithm.html">Flash Programming</a> algorithms are used to erase or download applications to Flash devices.</li>
+<li><a class="el" href="coresight_setup.html">Debug Setup with CMSIS-Pack</a> allows to create tool-agnostic debug and trace configurations</li>
 <li><a class="el" href="cpdsc_pg.html">Project Description (*.cpdsc) Format</a> is a environment/tool independent definition of a software project. This helps to create only one set of example projects that can be used by many different tool vendors.</li>
-<li><a class="el" href="packIndexFile.html">CMSIS-Pack Index Files</a></li>
+<li><a class="el" href="packIndexFile.html">CMSIS-Pack Index Files</a> are used to generate a catalog of available packs.</li>
 </ul>
 <hr/>
 <h2>CMSIS-Pack in ARM::CMSIS Pack </h2>
@@ -170,7 +178,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:01 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/internal_mac_example.png b/docs/Pack/html/internal_mac_example.png
new file mode 100644
index 0000000..8ffd39e
--- /dev/null
+++ b/docs/Pack/html/internal_mac_example.png
Binary files differ
diff --git a/docs/Pack/html/navtree.js b/docs/Pack/html/navtree.js
index e7950c2..4c6eae9 100644
--- a/docs/Pack/html/navtree.js
+++ b/docs/Pack/html/navtree.js
@@ -3,13 +3,19 @@
   [ "CMSIS-Pack", "index.html", [
     [ "Software Pack Use Cases", "index.html#SWPackVariants", null ],
     [ "Revision History of CMSIS-Pack", "pack_revisionHistory.html", null ],
-    [ "Software Packs Overview", "cp_Packs.html", [
+    [ "Overview", "cp_Packs.html", [
+      [ "Software Components", "cp_Packs.html#cp_Components", null ],
+      [ "References to other software components", "cp_Packs.html#cp_Cond", null ],
+      [ "Requirements", "cp_Packs.html#cp_Requirements", null ],
+      [ "Central API definition", "cp_Packs.html#cp_APIDef", null ],
+      [ "Inventory header file: RTE_Components.h", "cp_Packs.html#cp_RTECompH", null ],
+      [ "Combining software components", "cp_Packs.html#cp_Combine", null ],
+      [ "Steps to Create a Pack", "cp_Packs.html#cp_PackSteps", null ],
+      [ "Pack Tutorial", "cp_Packs.html#PackTutorials", null ],
       [ "Pack Conventions", "cp_Packs.html#PackFilenames", [
         [ "Pack File Name", "cp_Packs.html#pack_filename", null ],
         [ "Software Component Cclasses", "cp_Packs.html#pack_Cclass", null ]
-      ] ],
-      [ "Steps to Create a Pack", "cp_Packs.html#cp_PackSteps", null ],
-      [ "Pack Tutorial", "cp_Packs.html#PackTutorials", null ]
+      ] ]
     ] ],
     [ "Pack with Software Components", "cp_SWComponents.html", [
       [ "Create PDSC File", "cp_SWComponents.html#cp_CreatePDSC", null ],
@@ -41,9 +47,10 @@
     [ "Pack Example", "pack_Example.html", null ],
     [ "Utilities for Creating Packs", "createPackUtil.html", "createPackUtil" ],
     [ "Publish a Pack", "createPackPublish.html", [
+      [ "Prerequisites", "createPackPublish.html#cp_prerequisites", null ],
       [ "Local Installation", "createPackPublish.html#cp_LocalInstallation", null ],
       [ "Web Download", "createPackPublish.html#cp_WebDownload", null ],
-      [ "Publishing on www.keil.com/pack", "createPackPublish.html#cp_KeilComPack", null ],
+      [ "Publishing using Arm's Pack Index Service", "createPackPublish.html#cp_KeilComPack", null ],
       [ "Moving a pack from one URL to another", "createPackPublish.html#cp_PackRehosting", null ]
     ] ],
     [ "Pack Description (*.pdsc) Format", "packFormat.html", "packFormat" ],
diff --git a/docs/Pack/html/navtreeindex0.js b/docs/Pack/html/navtreeindex0.js
index 6b64d6f..cd4b210 100644
--- a/docs/Pack/html/navtreeindex0.js
+++ b/docs/Pack/html/navtreeindex0.js
@@ -15,11 +15,17 @@
 "coresight_setup.html":[12],
 "cp_Editors.html":[7,1],
 "cp_Packs.html":[2],
-"cp_Packs.html#PackFilenames":[2,0],
-"cp_Packs.html#PackTutorials":[2,2],
-"cp_Packs.html#cp_PackSteps":[2,1],
-"cp_Packs.html#pack_Cclass":[2,0,1],
-"cp_Packs.html#pack_filename":[2,0,0],
+"cp_Packs.html#PackFilenames":[2,8],
+"cp_Packs.html#PackTutorials":[2,7],
+"cp_Packs.html#cp_APIDef":[2,3],
+"cp_Packs.html#cp_Combine":[2,5],
+"cp_Packs.html#cp_Components":[2,0],
+"cp_Packs.html#cp_Cond":[2,1],
+"cp_Packs.html#cp_PackSteps":[2,6],
+"cp_Packs.html#cp_RTECompH":[2,4],
+"cp_Packs.html#cp_Requirements":[2,2],
+"cp_Packs.html#pack_Cclass":[2,8,1],
+"cp_Packs.html#pack_filename":[2,8,0],
 "cp_SWComponents.html":[3],
 "cp_SWComponents.html#cp_API":[3,8],
 "cp_SWComponents.html#cp_Bundles":[3,6],
@@ -54,10 +60,11 @@
 "createPackBoard.html#cp_BundleExample":[5,1],
 "createPackBoard.html#cp_SpecDevBoard":[5,0],
 "createPackPublish.html":[8],
-"createPackPublish.html#cp_KeilComPack":[8,2],
-"createPackPublish.html#cp_LocalInstallation":[8,0],
-"createPackPublish.html#cp_PackRehosting":[8,3],
-"createPackPublish.html#cp_WebDownload":[8,1],
+"createPackPublish.html#cp_KeilComPack":[8,3],
+"createPackPublish.html#cp_LocalInstallation":[8,1],
+"createPackPublish.html#cp_PackRehosting":[8,4],
+"createPackPublish.html#cp_WebDownload":[8,2],
+"createPackPublish.html#cp_prerequisites":[8,0],
 "createPackUtil.html":[7],
 "createPack_DFP.html":[4],
 "createPack_DFP.html#cp_BasicDFP":[4,0],
@@ -96,16 +103,17 @@
 "debug_description.html#traceStart":[12,0,5,0],
 "debug_description.html#usage_of_sequences":[12,0,3],
 "debug_description.html#writing_sequences":[12,0,6],
+"element_dominate.html":[9,6],
 "element_keywords.html":[9,4],
-"element_releases.html":[9,6],
-"element_releases.html#element_release":[9,6,0],
+"element_releases.html":[9,7],
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 "element_repository.html":[9,5],
-"element_requirements_pg.html":[9,7],
-"element_requirements_pg.html#element_compilers":[9,7,1],
-"element_requirements_pg.html#element_languages":[9,7,2],
-"element_requirements_pg.html#element_packages":[9,7,0],
-"element_taxonomy.html":[9,8],
-"element_taxonomy.html#element_taxonomyDescription":[9,8,0],
+"element_requirements_pg.html":[9,8],
+"element_requirements_pg.html#element_compilers":[9,8,1],
+"element_requirements_pg.html#element_languages":[9,8,2],
+"element_requirements_pg.html#element_packages":[9,8,0],
+"element_taxonomy.html":[9,9],
+"element_taxonomy.html#element_taxonomyDescription":[9,9,0],
 "flashAlgorithm.html":[11],
 "flashAlgorithm.html#AddFPA":[11,1],
 "flashAlgorithm.html#CreateFPA":[11,0],
@@ -124,90 +132,92 @@
 "pack_Example.html":[6],
 "pack_revisionHistory.html":[1],
 "pages.html":[],
-"pdsc_apis_pg.html":[9,9],
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diff --git a/docs/Pack/html/packChk.html b/docs/Pack/html/packChk.html
index 8276775..ff23eea 100644
--- a/docs/Pack/html/packChk.html
+++ b/docs/Pack/html/packChk.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -404,7 +404,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="createPackUtil.html">Utilities for Creating Packs</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/packFormat.html b/docs/Pack/html/packFormat.html
index 4889917..c5d5c95 100644
--- a/docs/Pack/html/packFormat.html
+++ b/docs/Pack/html/packFormat.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -158,6 +158,7 @@
 <li><a class="el" href="pdsc_package_pg.html">&lt;package&gt;</a>: describes package related information like vendor, package name, description, version. Is the root element.</li>
 <li><a class="el" href="element_keywords.html">&lt;keywords&gt;</a>: lists keywords to search for packages. Can be used for search engines.</li>
 <li><a class="el" href="element_repository.html">&lt;repository&gt;</a>: specifies the URL and repository type of a public repository where the pack originates from.</li>
+<li><a class="el" href="element_dominate.html">&lt;dominate&gt;</a>: the pack contains one or more device, API, or component that overrules other packs with identical items.</li>
 <li><a class="el" href="element_releases.html">&lt;releases&gt;</a>: lists release versions with descriptions.</li>
 <li><a class="el" href="element_requirements_pg.html">&lt;requirements&gt;</a>: lists required packs, compiler, programming language standards and their version or version range.</li>
 <li><a class="el" href="element_taxonomy.html">&lt;taxonomy&gt;</a>: lists description elements that define component classes and component group names.</li>
@@ -184,7 +185,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/packFormat.js b/docs/Pack/html/packFormat.js
index b69e1fd..81bec35 100644
--- a/docs/Pack/html/packFormat.js
+++ b/docs/Pack/html/packFormat.js
@@ -8,6 +8,7 @@
     ] ],
     [ "/package/keywords element", "element_keywords.html", null ],
     [ "/package/repository element", "element_repository.html", null ],
+    [ "/package/dominate element", "element_dominate.html", null ],
     [ "/package/releases element", "element_releases.html", [
       [ "/package/releases/release", "element_releases.html#element_release", null ]
     ] ],
@@ -59,6 +60,8 @@
       [ "Component Files", "pdsc_components_pg.html#Component_Files", null ],
       [ "Component Instances", "pdsc_components_pg.html#Component_Instances", null ],
       [ "RTE_Components.h", "pdsc_components_pg.html#RTE_Components_h", null ],
+      [ "Pre_Include_Global_h", "pdsc_components_pg.html#Pre_Include_Global_h", null ],
+      [ "Pre_Include_Local_h", "pdsc_components_pg.html#Pre_Include_Local_h", null ],
       [ "/package/components", "pdsc_components_pg.html#element_components", null ],
       [ "/package/components/bundle", "pdsc_components_pg.html#element_bundle", null ],
       [ "/package/components/.../component", "pdsc_components_pg.html#element_component", null ],
diff --git a/docs/Pack/html/packIndexFile.html b/docs/Pack/html/packIndexFile.html
index c46e667..cbcf5ff 100644
--- a/docs/Pack/html/packIndexFile.html
+++ b/docs/Pack/html/packIndexFile.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -208,12 +208,10 @@
     &lt;/xs:restriction&gt;
   &lt;/xs:simpleType&gt;
 
-  &lt;!-- a basic string of letters and numbers plus a dash and underbar, no leading nor trailing spaces and a minimum of 3 characters and a maximum of 32 --&gt;
+  &lt;!-- some strings are used to construct filenames (e.g. package name). Such names can contain only subset of characters and must not contain neither spaces nor dots. --&gt;
   &lt;xs:simpleType name="RestrictedString"&gt;
     &lt;xs:restriction base="xs:string"&gt;
-      &lt;xs:minLength value="3"/&gt;
-      &lt;xs:maxLength value="32"/&gt;
-      &lt;xs:pattern value="[-_A-Za-z0-9]+"/&gt;
+      &lt;xs:pattern value="[\-_A-Za-z0-9]+"/&gt;
       &lt;xs:pattern value="\S(.*\S)?"&gt;&lt;/xs:pattern&gt;
     &lt;/xs:restriction&gt;
   &lt;/xs:simpleType&gt;
@@ -274,7 +272,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:01 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/pack_Example.html b/docs/Pack/html/pack_Example.html
index 41274c0..9b7b0fb 100644
--- a/docs/Pack/html/pack_Example.html
+++ b/docs/Pack/html/pack_Example.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -225,7 +225,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/pack_revisionHistory.html b/docs/Pack/html/pack_revisionHistory.html
index 0169172..24eb356 100644
--- a/docs/Pack/html/pack_revisionHistory.html
+++ b/docs/Pack/html/pack_revisionHistory.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -114,6 +114,18 @@
 <tr>
 <th>Version </th><th>Description  </th></tr>
 <tr>
+<td>1.6.0 </td><td>Modifications compared to Version 1.5.0<ul>
+<li>added Armv8.1-M MVE processor feature attribute 'Dmve'.</li>
+<li>added local and global pre-include section <a class="el" href="pdsc_components_pg.html#Pre_Include_Local_h">Pre_Include_Local_h</a>, <a class="el" href="pdsc_components_pg.html#Pre_Include_Global_h">Pre_Include_Global_h</a>.</li>
+<li>added file categories 'preIncludeLocal' and 'preIncludeGlobal' to the <a class="el" href="pdsc_components_pg.html#FileCategoryEnum">FileCategoryEnum</a>.</li>
+<li>added file attribute 'path' for file category 'header' to add support for relative include paths.</li>
+<li>added to <a class="el" href="pdsc_package_pg.html#element_package">package</a> element the possibility to restrict the usage of the with attributes Dcore, Dname, Dvendor, and Tcompiler.</li>
+<li>added <a class="el" href="element_dominate.html">dominate</a> element to overwrites identical <a class="el" href="pdsc_devices_pg.html#element_devices">devices</a>, <a class="el" href="pdsc_apis_pg.html#element_apis">APIs</a>, or <a class="el" href="pdsc_components_pg.html#element_components">components</a>.</li>
+<li>added attribute 'condition' to the <a class="el" href="pdsc_apis_pg.html#element_api">api</a> element so that an API can be excluded based on a condition.</li>
+<li>added new <a class="el" href="cp_Packs.html#pack_Cclass">Software Component Cclasses</a> : "Audio", "Board Part", "Data Exchange", "Extension Board", "IoT Client", "IoT Utility", "Security", "Utility".   </li>
+</ul>
+</td></tr>
+<tr>
 <td>1.5.0 </td><td>Modifications compared to Version 1.4.9<ul>
 <li>added <a class="el" href="sdf_pg.html">System Description File (*.SDF) Format</a></li>
 <li>updates to <a class="el" href="pdsc_family_pg.html#DeviceVendorEnum">Device Vendor</a></li>
@@ -121,7 +133,8 @@
 <li>added <a class="el" href="pdsc_family_pg.html#element_flashinfo">flashinfo</a> with children &lt;block&gt; and &lt;gap&gt; to describe flash devices for sequence-based flash download</li>
 <li>new <a class="el" href="debug_description.html#DebugFunctions">debug access functions</a> and <a class="el" href="debug_description.html#DebugVars">global debug variables</a> for sequence-based flash download</li>
 <li>added <a class="el" href="element_repository.html">repository</a> element for specifying origin of public repositories</li>
-<li>added attributes to <a class="el" href="element_releases.html#element_release">release</a> element specifying repository tag and url for downloading repository content   </li>
+<li>added attributes to <a class="el" href="element_releases.html#element_release">release</a> element specifying repository tag and url for downloading repository content</li>
+<li>added new processor Cortex-M35P   </li>
 </ul>
 </td></tr>
 <tr>
@@ -265,7 +278,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/pages.html b/docs/Pack/html/pages.html
index 638ecab..b8ef15e 100644
--- a/docs/Pack/html/pages.html
+++ b/docs/Pack/html/pages.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -112,7 +112,7 @@
 <div class="contents">
 <div class="textblock">Here is a list of all related documentation pages:</div><div class="directory">
 <div class="levels">[detail level <span onclick="javascript:toggleLevel(1);">1</span><span onclick="javascript:toggleLevel(2);">2</span><span onclick="javascript:toggleLevel(3);">3</span>]</div><table class="directory">
-<tr id="row_0_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="cp_Packs.html" target="_self">Software Packs Overview</a></td><td class="desc"></td></tr>
+<tr id="row_0_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="cp_Packs.html" target="_self">Overview</a></td><td class="desc"></td></tr>
 <tr id="row_1_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="cp_SWComponents.html" target="_self">Pack with Software Components</a></td><td class="desc"></td></tr>
 <tr id="row_2_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="createPack_DFP.html" target="_self">Pack with Device Support</a></td><td class="desc"></td></tr>
 <tr id="row_3_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="createPackBoard.html" target="_self">Pack with Board Support</a></td><td class="desc"></td></tr>
@@ -126,25 +126,26 @@
 <tr id="row_7_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="pdsc_package_pg.html" target="_self">/package element</a></td><td class="desc"></td></tr>
 <tr id="row_7_1_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="element_keywords.html" target="_self">/package/keywords element</a></td><td class="desc"></td></tr>
 <tr id="row_7_2_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="element_repository.html" target="_self">/package/repository element</a></td><td class="desc"></td></tr>
-<tr id="row_7_3_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="element_releases.html" target="_self">/package/releases element</a></td><td class="desc"></td></tr>
-<tr id="row_7_4_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="element_requirements_pg.html" target="_self">/package/requirements</a></td><td class="desc"></td></tr>
-<tr id="row_7_5_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="element_taxonomy.html" target="_self">/package/taxonomy element</a></td><td class="desc"></td></tr>
-<tr id="row_7_6_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="pdsc_apis_pg.html" target="_self">/package/apis element</a></td><td class="desc"></td></tr>
-<tr id="row_7_7_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="pdsc_generators_pg.html" target="_self">/package/generators element</a></td><td class="desc"></td></tr>
-<tr id="row_7_8_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_7_8_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('7_8_')"/><a class="el" href="pdsc_devices_pg.html" target="_self">/package/devices element</a></td><td class="desc"></td></tr>
-<tr id="row_7_8_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="pdsc_family_pg.html" target="_self">/package/devices/family element</a></td><td class="desc"></td></tr>
-<tr id="row_7_9_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="pdsc_boards_pg.html" target="_self">/package/boards element</a></td><td class="desc"></td></tr>
-<tr id="row_7_10_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="pdsc_conditions_pg.html" target="_self">/package/conditions element</a></td><td class="desc"></td></tr>
-<tr id="row_7_11_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="pdsc_components_pg.html" target="_self">/package/components element</a></td><td class="desc"></td></tr>
-<tr id="row_7_12_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="pdsc_examples_pg.html" target="_self">/package/examples element</a></td><td class="desc"></td></tr>
-<tr id="row_8_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="configWizard.html" target="_self">Configuration Wizard Annotations</a></td><td class="desc"></td></tr>
-<tr id="row_9_" class="even"><td class="entry"><img id="arr_9_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('9_')"/><a class="el" href="flashAlgorithm.html" target="_self">Flash Programming</a></td><td class="desc"></td></tr>
-<tr id="row_9_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="algorithmFunc.html" target="_self">Algorithm Functions</a></td><td class="desc">Blank Check </td></tr>
-<tr id="row_10_" class="even"><td class="entry"><img id="arr_10_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('10_')"/><a class="el" href="coresight_setup.html" target="_self">Debug Setup with CMSIS-Pack</a></td><td class="desc"></td></tr>
-<tr id="row_10_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="debug_description.html" target="_self">Debug Description</a></td><td class="desc"></td></tr>
-<tr id="row_11_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="cpdsc_pg.html" target="_self">Project Description (*.cpdsc) Format</a></td><td class="desc"></td></tr>
-<tr id="row_12_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="sdf_pg.html" target="_self">System Description File (*.SDF) Format</a></td><td class="desc"></td></tr>
-<tr id="row_13_" class="even"><td class="entry"><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="packIndexFile.html" target="_self">CMSIS-Pack Index Files</a></td><td class="desc"></td></tr>
+<tr id="row_7_3_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="element_dominate.html" target="_self">/package/dominate element</a></td><td class="desc"></td></tr>
+<tr id="row_7_4_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="element_releases.html" target="_self">/package/releases element</a></td><td class="desc"></td></tr>
+<tr id="row_7_5_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="element_requirements_pg.html" target="_self">/package/requirements</a></td><td class="desc"></td></tr>
+<tr id="row_7_6_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="element_taxonomy.html" target="_self">/package/taxonomy element</a></td><td class="desc"></td></tr>
+<tr id="row_7_7_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="pdsc_apis_pg.html" target="_self">/package/apis element</a></td><td class="desc"></td></tr>
+<tr id="row_7_8_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="pdsc_generators_pg.html" target="_self">/package/generators element</a></td><td class="desc"></td></tr>
+<tr id="row_7_9_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_7_9_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('7_9_')"/><a class="el" href="pdsc_devices_pg.html" target="_self">/package/devices element</a></td><td class="desc"></td></tr>
+<tr id="row_7_9_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="pdsc_family_pg.html" target="_self">/package/devices/family element</a></td><td class="desc"></td></tr>
+<tr id="row_7_10_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="pdsc_boards_pg.html" target="_self">/package/boards element</a></td><td class="desc"></td></tr>
+<tr id="row_7_11_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="pdsc_conditions_pg.html" target="_self">/package/conditions element</a></td><td class="desc"></td></tr>
+<tr id="row_7_12_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="pdsc_components_pg.html" target="_self">/package/components element</a></td><td class="desc"></td></tr>
+<tr id="row_7_13_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="pdsc_examples_pg.html" target="_self">/package/examples element</a></td><td class="desc"></td></tr>
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-<div class="title">Debug access sequences </div>  </div>
-</div><!--header-->
-<div class="contents">
-<div class="textblock"><p>Debug access sequences define the activities of development tools to connect to a device using the debug channel for debugging, tracing, or flash programming. Several debug access sequences are pre-defined and executed in specific context. Refer to <a class="el" href="pdsc_family_pg.html#element_sequences">sequences</a> for details.</p>
-<p>Software development tools should implement <a class="el" href="pdsc_SequenceNameEnum_pg.html#default_sequences">Default debug access sequences</a>. These default sequences can be overwritten by device specific sequences using the <a class="el" href="pdsc_family_pg.html#element_sequence">sequence</a> element in the <a class="el" href="pdsc_family_pg.html#element_sequences">sequences</a> section of the PDSC file. Additionally, a PDSC file can contain user-defined sequences, for example to reuse access sequence fragments:</p>
-<ul>
-<li><a class="el" href="pdsc_SequenceNameEnum_pg.html#usage_of_sequences">Usage of debug access sequences</a> explains how the sequences are used from a development tool point of view.</li>
-<li><a class="el" href="pdsc_SequenceNameEnum_pg.html#default_sequences">Default debug access sequences</a> lists all debug access sequences that are pre-defined by the CMSIS-Pack standard and shows the details of the default debug access sequences.</li>
-<li><a class="el" href="pdsc_SequenceNameEnum_pg.html#writing_sequences">Writing debug access sequences</a> explains how to write custom debug access sequences. These can be used to either override default sequences or to define device specific sequences.</li>
-</ul>
-<h1><a class="anchor" id="usage_of_sequences"></a>
-Usage of debug access sequences</h1>
-<p>Pre-defined Debug Access Sequences are used in the following context:</p>
-<ul>
-<li><b>Connect Debugger to Device</b> is executed when debugging or flash programming with the target starts.</li>
-<li><b>Reset Device</b> is executed to reset the target.</li>
-<li><b>Verify Code</b> is executed to verify the content after flash programming.</li>
-<li><b>Disconnect Debugger</b> is executed when debugging or flash programming with the target stops.</li>
-</ul>
-<p>The following diagrams show how the Debug Access Sequences are executed by a development tool.</p>
-<p><b>Connect Debugger to Device</b> is executed when debugging or flash programming with the target starts.</p>
-<div class="image">
-<img src="DebugConnect.png" alt="DebugConnect.png"/>
-</div>
-<p><b>Reset Device</b> is executed to reset the target.</p>
-<div class="image">
-<img src="Reset.png" alt="Reset.png"/>
-</div>
-<p><b>Verify Code</b> is executed to verify the content after flash programming.</p>
-<div class="image">
-<img src="CodeVerify.png" alt="CodeVerify.png"/>
-</div>
-<p><b>Disconnect Debugger</b> is executed when debugging or flash programming with the target stops.</p>
-<div class="image">
-<img src="DebugDisconnect.png" alt="DebugDisconnect.png"/>
-</div>
-<h1><a class="anchor" id="default_sequences"></a>
-Default debug access sequences</h1>
-<p>Debug access sequences get defined in the <a class="el" href="pdsc_family_pg.html#element_sequence">sequence</a> element. The following table lists the available pre-defined debug access sequences. <a class="el" href="pdsc_SequenceNameEnum_pg.html#default_sequences">Default debug access sequences</a> are executed if they are not overwritten using a <a class="el" href="pdsc_family_pg.html#element_sequence">sequence</a> element. Refer to <a class="el" href="pdsc_SequenceNameEnum_pg.html#usage_of_sequences">Usage of debug access sequences</a> for more information about the execution of these sequences.</p>
-<p>For debug access sequences marked in <span class="XML-Token">ItalicRed</span>, no default sequence exists. The usage in a debug description requires a related <a class="el" href="pdsc_family_pg.html#element_sequence">sequence</a> element to be present. The other sequences should be implemented in a development tool. They are executed when no sequence definition exists in the PDSC file.</p>
-<dl class="section note"><dt>Note</dt><dd>Default debug access sequences read the System Control Space (SCS) of the processor and assume that the SCS offset is implemented as defined in the ARMv6-M/ARMv7-M/ARMv8-M architecture reference manual.</dd></dl>
-<table  class="cmtable" summary="Enumeration: SequenceNameEnum">
-<tr>
-<th>name= </th><th>Description  </th></tr>
-<tr>
-<td class="XML-Token"><a class="el" href="pdsc_SequenceNameEnum_pg.html#debugPortSetup">DebugPortSetup</a> </td><td>Prepare the target debug port for connection; is executed before acquiring access to the debug port.<br/>
- May include for example an SWJ-DP switch sequence as defined in the ARM Debug Interface (ADI) Architecture Specification.<br/>
- <b>This sequence must not contain debug port/access port register and target memory accesses other than:</b><ul>
-<li><b>Reading the <em>DPIDR</em> debug port register to release an SWD connection from its line reset.</b></li>
-<li><b>Writing the <em>TARGETSEL</em> debug port register (SWD protocol v2).</b>   </li>
-</ul>
-</td></tr>
-<tr>
-<td class="XML-Token"><a class="el" href="pdsc_SequenceNameEnum_pg.html#debugPortStart">DebugPortStart</a> </td><td>Connect to the target debug port and power it up; is executed after DebugPortSetup.<br/>
- The parent <b>debugport</b> is default debug port for this sequence.<br/>
- <b>This sequence must not contain access port register and target memory accesses.</b>  </td></tr>
-<tr>
-<td class="XML-Token"><a class="el" href="pdsc_SequenceNameEnum_pg.html#debugPortStop">DebugPortStop</a> </td><td>Power down and disconnect from target debug port.<br/>
- Executed as last step during target disconnect unless another debugger connection to this port is active. The parent <b>debugport</b> is default debug port for this sequence.<br/>
- <b>This sequence must not contain access port register and target memory accesses.</b>  </td></tr>
-<tr>
-<td class="XML-Token">DebugDeviceUnlock </td><td>Check if the device is in a locked state and unlock it. Use <b>query</b> command elements for user confirmation.<br/>
- Executed after having powered up the debug port.  </td></tr>
-<tr>
-<td class="XML-Token"><a class="el" href="pdsc_SequenceNameEnum_pg.html#debugCoreStart">DebugCoreStart</a> </td><td>Initialize core debug system.<br/>
- Executed after having connected and powered up the default debug port for the connection.  </td></tr>
-<tr>
-<td class="XML-Token"><a class="el" href="pdsc_SequenceNameEnum_pg.html#debugCoreStop">DebugCoreStop</a> </td><td>Uninitialize core debug system.<br/>
- Executed as last step during disconnect before powering down any debug ports no longer required for concurrent connections.  </td></tr>
-<tr>
-<td class="XML-Token">DebugCodeMemRemap </td><td>Remap memory to execution location.<br/>
- Executed before verifying memory content after flash programming. This is required to replicate a memory remap of a device bootloader (that is not executed during debug connection).   </td></tr>
-<tr>
-<td class="XML-Token"><a class="el" href="pdsc_SequenceNameEnum_pg.html#resetSystem">ResetSystem</a> </td><td>Execute a system-wide reset via software mechanisms.   </td></tr>
-<tr>
-<td class="XML-Token"><a class="el" href="pdsc_SequenceNameEnum_pg.html#resetProcessor">ResetProcessor</a> </td><td>Execute a processor reset via software mechanisms.   </td></tr>
-<tr>
-<td class="XML-Token"><a class="el" href="pdsc_SequenceNameEnum_pg.html#resetHardware">ResetHardware</a> </td><td>Execute a system-wide reset via the dedicated debugger reset line, e.g. nRST.  </td></tr>
-<tr>
-<td class="XML-Token"><a class="el" href="pdsc_SequenceNameEnum_pg.html#resetHardwareAssert">ResetHardwareAssert</a> </td><td>Assert a system-wide reset via the dedicated debugger reset line, e.g. nRST.   </td></tr>
-<tr>
-<td class="XML-Token"><a class="el" href="pdsc_SequenceNameEnum_pg.html#resetHardwareDeassert">ResetHardwareDeassert</a> </td><td>Deassert a system-wide reset via the dedicated debugger reset line, e.g. nRST.   </td></tr>
-<tr>
-<td class="XML-Token"><a class="el" href="pdsc_SequenceNameEnum_pg.html#resetCatchSet">ResetCatchSet</a> </td><td>Executed before a target reset to configure the vector catch to stop code execution after the reset.<br/>
- The implementation of <b>ResetCatchSet</b> requires an implementation of <b>ResetCatchClear</b> to free any hardware resources used for stopping the core.   </td></tr>
-<tr>
-<td class="XML-Token"><a class="el" href="pdsc_SequenceNameEnum_pg.html#resetCatchClear">ResetCatchClear</a> </td><td>Executed after a target reset to free hardware resources allocated by <b>ResetCatchSet</b>.   </td></tr>
-<tr>
-<td class="XML-Token">FlashEraseDone </td><td>Executed after erasing flash memory.   </td></tr>
-<tr>
-<td class="XML-Token">FlashProgramDone </td><td>Eexecuted after programming flash memory.   </td></tr>
-<tr>
-<td class="XML-Token">TraceStart </td><td>Enable target trace capture.<br/>
- Executed before the debugger powers up and configures standard CoreSight trace components, e.g. after the initial target connection as well as after a system-wide reset.   </td></tr>
-<tr>
-<td class="XML-Token">TraceStop </td><td>Disable target trace capture.<br/>
- Executed after the debugger disabled and powered down standard CoreSight trace components.   </td></tr>
-<tr>
-<td class="XML-Token">RecoverySupportStart </td><td>Executed before step or run command to support recovery from a lost target connection, e.g. after a low power mode.   </td></tr>
-<tr>
-<td class="XML-Token">RecoverySupportStop </td><td>Executed after step or run command in context of the <b>RecoverySupportStart</b> sequence.   </td></tr>
-<tr>
-<td class="XML-Token">RecoveryAcknowledge </td><td>Debugger acknowledge after recovering from a lost target connection. Can be executed independently from a <b>RecoverySupportStart</b> sequence.   </td></tr>
-</table>
-<h2>Pre-defined default debug access sequences </h2>
-<p>The following sections the show the details of the pre-defined default debug access sequences.</p>
-<h2><a class="anchor" id="debugPortSetup"></a>
-DebugPortSetup</h2>
-<p>Prepare the target debug port for connection.</p>
-<div class="fragment"><div class="line">&lt;sequence name=<span class="stringliteral">&quot;DebugPortSetup&quot;</span>&gt;</div>
-<div class="line">  &lt;block&gt;</div>
-<div class="line">    __var isSWJ    = ((__protocol &amp;amp; 0x00010000) != 0);</div>
-<div class="line">    __var protType = __protocol &amp;amp; 0x0000FFFF;</div>
-<div class="line">  &lt;/block&gt;</div>
-<div class="line"></div>
-<div class="line">  &lt;!-- JTAG Protocol --&gt;</div>
-<div class="line">  &lt;control <span class="keywordflow">if</span>=<span class="stringliteral">&quot;protType == 1&quot;</span>&gt;</div>
-<div class="line">  </div>
-<div class="line">    &lt;control <span class="keywordflow">if</span>=<span class="stringliteral">&quot;isSWJ&quot;</span>&gt;</div>
-<div class="line">    </div>
-<div class="line">      &lt;block atomic=<span class="stringliteral">&quot;1&quot;</span>&gt;</div>
-<div class="line">        <span class="comment">// Ensure current debug interface is in reset state</span></div>
-<div class="line">        DAP_SWJ_Sequence(51, 0x0007FFFFFFFFFFFF);</div>
-<div class="line">        </div>
-<div class="line">        <span class="comment">// Execute SWJ-DP Switch Sequence SWD to JTAG (0xE73C)</span></div>
-<div class="line">        <span class="comment">// Change if SWJ-DP uses deprecated switch code (0xAEAE)</span></div>
-<div class="line">        DAP_SWJ_Sequence(16, 0xE73C);</div>
-<div class="line">        </div>
-<div class="line">        <span class="comment">// Ensure JTAG interface is reset</span></div>
-<div class="line">        DAP_SWJ_Sequence(6, 0x3F);</div>
-<div class="line">      &lt;/block&gt;</div>
-<div class="line">      </div>
-<div class="line">    &lt;/control&gt;</div>
-<div class="line">  </div>
-<div class="line">    &lt;block atomic=<span class="stringliteral">&quot;1&quot;</span>&gt;</div>
-<div class="line">      <span class="comment">// JTAG &quot;Soft&quot; Reset</span></div>
-<div class="line">      DAP_JTAG_Sequence(6, 1, 0x3F);</div>
-<div class="line">      DAP_JTAG_Sequence(1, 0, 0x01);</div>
-<div class="line">    &lt;/block&gt;</div>
-<div class="line"></div>
-<div class="line">  &lt;/control&gt;</div>
-<div class="line">  </div>
-<div class="line">  &lt;!-- SWD Protocol --&gt;</div>
-<div class="line">  &lt;control <span class="keywordflow">if</span>=<span class="stringliteral">&quot;protType == 2&quot;</span>&gt;</div>
-<div class="line">  </div>
-<div class="line">    &lt;control <span class="keywordflow">if</span>=<span class="stringliteral">&quot;isSWJ&quot;</span>&gt;</div>
-<div class="line">      </div>
-<div class="line">      &lt;block atomic=<span class="stringliteral">&quot;1&quot;</span>&gt;</div>
-<div class="line">        <span class="comment">// Ensure current debug interface is in reset state</span></div>
-<div class="line">        DAP_SWJ_Sequence(51, 0x0007FFFFFFFFFFFF);</div>
-<div class="line">        </div>
-<div class="line">        <span class="comment">// Execute SWJ-DP Switch Sequence JTAG to SWD (0xE79E)</span></div>
-<div class="line">        <span class="comment">// Change if SWJ-DP uses deprecated switch code (0xEDB6)</span></div>
-<div class="line">        DAP_SWJ_Sequence(16, 0xE79E);</div>
-<div class="line">        </div>
-<div class="line">        <span class="comment">// Enter SWD Line Reset State</span></div>
-<div class="line">        DAP_SWJ_Sequence(51, 0x0007FFFFFFFFFFFF);  <span class="comment">// &amp;gt; 50 cycles SWDIO/TMS High</span></div>
-<div class="line">        DAP_SWJ_Sequence(3,  0x00);                <span class="comment">// At least 2 idle cycles (SWDIO/TMS Low)</span></div>
-<div class="line">      &lt;/block&gt;</div>
-<div class="line">    </div>
-<div class="line">    &lt;/control&gt;</div>
-<div class="line">  </div>
-<div class="line">    &lt;control <span class="keywordflow">if</span>=<span class="stringliteral">&quot;!isSWJ&quot;</span>&gt;</div>
-<div class="line">    </div>
-<div class="line">      &lt;block atomic=<span class="stringliteral">&quot;1&quot;</span>&gt;</div>
-<div class="line">        <span class="comment">// Enter SWD Line Reset State</span></div>
-<div class="line">        DAP_SWJ_Sequence(51, 0x0007FFFFFFFFFFFF);  <span class="comment">// &amp;gt; 50 cycles SWDIO/TMS High</span></div>
-<div class="line">        DAP_SWJ_Sequence(3,  0x00);                <span class="comment">// At least 2 idle cycles (SWDIO/TMS Low)</span></div>
-<div class="line">      &lt;/block&gt;</div>
-<div class="line">      </div>
-<div class="line">    &lt;/control&gt;</div>
-<div class="line">    </div>
-<div class="line">    &lt;block&gt;</div>
-<div class="line">      <span class="comment">// Read DPIDR to enable SWD interface (SW-DPv1 and SW-DPv2)</span></div>
-<div class="line">      ReadDP(0x0);</div>
-<div class="line">    &lt;/block&gt;</div>
-<div class="line"></div>
-<div class="line">  &lt;/control&gt;</div>
-<div class="line">  </div>
-<div class="line">&lt;/sequence&gt;</div>
-</div><!-- fragment --><h2><a class="anchor" id="debugPortStart"></a>
-DebugPortStart</h2>
-<p>Connect to the target debug port and power it up.</p>
-<div class="fragment"><div class="line">&lt;sequence name=<span class="stringliteral">&quot;DebugPortStart&quot;</span>&gt;</div>
-<div class="line">  </div>
-<div class="line">  &lt;block&gt;</div>
-<div class="line">    __var SW_DP_ABORT  = 0x0;</div>
-<div class="line">    __var DP_CTRL_STAT = 0x4;</div>
-<div class="line">    __var DP_SELECT    = 0x8;</div>
-<div class="line">    __var powered_down = 0;</div>
-<div class="line"></div>
-<div class="line">    <span class="comment">// Switch to DP Register Bank 0</span></div>
-<div class="line">    WriteDP(DP_SELECT, 0x00000000);</div>
-<div class="line">  </div>
-<div class="line">    <span class="comment">// Read DP CTRL/STAT Register and check if CSYSPWRUPACK and CDBGPWRUPACK bits are set</span></div>
-<div class="line">    powered_down = ((ReadDP(DP_CTRL_STAT) &amp;amp; 0xA0000000) != 0xA0000000);</div>
-<div class="line">  &lt;/block&gt;</div>
-<div class="line">  </div>
-<div class="line">  &lt;control <span class="keywordflow">if</span>=<span class="stringliteral">&quot;powered_down&quot;</span>&gt;</div>
-<div class="line">  </div>
-<div class="line">    &lt;block&gt;</div>
-<div class="line">      <span class="comment">// Request Debug/System Power-Up</span></div>
-<div class="line">      WriteDP(DP_CTRL_STAT, 0x50000000);</div>
-<div class="line">    &lt;/block&gt;</div>
-<div class="line">    </div>
-<div class="line">    &lt;!-- Wait <span class="keywordflow">for</span> Power-Up Request to be acknowledged --&gt;</div>
-<div class="line">    &lt;control <span class="keywordflow">while</span>=<span class="stringliteral">&quot;(ReadDP(DP_CTRL_STAT) &amp;amp; 0xA0000000) != 0xA0000000&quot;</span> timeout=<span class="stringliteral">&quot;1000000&quot;</span>/&gt;</div>
-<div class="line">    </div>
-<div class="line">    &lt;block&gt;</div>
-<div class="line">      <span class="comment">// Request Debug Reset</span></div>
-<div class="line">      WriteDP(DP_CTRL_STAT, 0x54000000);</div>
-<div class="line">    &lt;/block&gt;</div>
-<div class="line">    </div>
-<div class="line">    &lt;!-- Wait <span class="keywordflow">for</span> Debug Reset to be acknowledged, don<span class="stringliteral">&#39;t issue error on timeout to deal with improperly connected Debug Reset --&gt;</span></div>
-<div class="line"><span class="stringliteral">    &lt;control while=&quot;(ReadDP(DP_CTRL_STAT) &amp;amp; 0xA8000000) != 0xA8000000&quot; timeout=&quot;300000&quot;/&gt;</span></div>
-<div class="line"><span class="stringliteral">    </span></div>
-<div class="line"><span class="stringliteral">    &lt;!-- JTAG Specific Part of sequence --&gt;</span></div>
-<div class="line"><span class="stringliteral">    &lt;control if=&quot;__protocol == 1&quot;&gt;</span></div>
-<div class="line"><span class="stringliteral">    </span></div>
-<div class="line"><span class="stringliteral">      &lt;block&gt;</span></div>
-<div class="line"><span class="stringliteral">        // Init AP Transfer Mode, Transaction Counter, and Lane Mask (Normal Transfer Mode, Include all Byte Lanes)</span></div>
-<div class="line"><span class="stringliteral">        // Additionally clear STICKYORUN, STICKYCMP, and STICKYERR bits by writing &#39;</span>1<span class="stringliteral">&#39;</span></div>
-<div class="line"><span class="stringliteral">        WriteDP(DP_CTRL_STAT, 0x50000F32);</span></div>
-<div class="line"><span class="stringliteral">      &lt;/block&gt;</span></div>
-<div class="line"><span class="stringliteral">      </span></div>
-<div class="line"><span class="stringliteral">    &lt;/control&gt;</span></div>
-<div class="line"><span class="stringliteral">    </span></div>
-<div class="line"><span class="stringliteral">    &lt;!-- SWD Specific Part of sequence --&gt;</span></div>
-<div class="line"><span class="stringliteral">    &lt;control if=&quot;__protocol == 2&quot;&gt;</span></div>
-<div class="line"><span class="stringliteral">    </span></div>
-<div class="line"><span class="stringliteral">      &lt;block&gt;</span></div>
-<div class="line"><span class="stringliteral">        // Init AP Transfer Mode, Transaction Counter, and Lane Mask (Normal Transfer Mode, Include all Byte Lanes)</span></div>
-<div class="line"><span class="stringliteral">        WriteDP(DP_CTRL_STAT, 0x50000F00);</span></div>
-<div class="line"><span class="stringliteral">        </span></div>
-<div class="line"><span class="stringliteral">        // Clear WDATAERR, STICKYORUN, STICKYCMP, and STICKYERR bits of CTRL/STAT Register by write to ABORT register</span></div>
-<div class="line"><span class="stringliteral">        WriteDP(SW_DP_ABORT, 0x0000001E);</span></div>
-<div class="line"><span class="stringliteral">      &lt;/block&gt;</span></div>
-<div class="line"><span class="stringliteral"></span></div>
-<div class="line"><span class="stringliteral">    &lt;/control&gt;</span></div>
-<div class="line"><span class="stringliteral">    </span></div>
-<div class="line"><span class="stringliteral">  &lt;/control&gt;</span></div>
-<div class="line"><span class="stringliteral">  </span></div>
-<div class="line"><span class="stringliteral">&lt;/sequence&gt;</span></div>
-</div><!-- fragment --><h2><a class="anchor" id="debugPortStop"></a>
-DebugPortStop</h2>
-<p>Power down and disconnect from target debug port.</p>
-<div class="fragment"><div class="line">&lt;sequence name=<span class="stringliteral">&quot;DebugPortStop&quot;</span>&gt;</div>
-<div class="line"></div>
-<div class="line">  &lt;block&gt;</div>
-<div class="line">    __var DP_CTRL_STAT = 0x4;</div>
-<div class="line">    __var DP_SELECT    = 0x8;</div>
-<div class="line">    </div>
-<div class="line">    <span class="comment">// Switch to DP Register Bank 0</span></div>
-<div class="line">    WriteDP(DP_SELECT, 0x00000000);</div>
-<div class="line">    </div>
-<div class="line">    <span class="comment">// Power Down Debug port</span></div>
-<div class="line">    WriteDP(DP_CTRL_STAT, 0x00000000);</div>
-<div class="line">  &lt;/block&gt;</div>
-<div class="line"></div>
-<div class="line">&lt;/sequence&gt;</div>
-</div><!-- fragment --><h2><a class="anchor" id="debugCoreStart"></a>
-DebugCoreStart</h2>
-<p>Initialize core debug system.</p>
-<div class="fragment"><div class="line">&lt;sequence name=<span class="stringliteral">&quot;DebugCoreStart&quot;</span>&gt;</div>
-<div class="line"></div>
-<div class="line">  &lt;block&gt;</div>
-<div class="line">    <span class="comment">// System Control Space (SCS) offset as defined in ARMv6-M/ARMv7-M.</span></div>
-<div class="line">  </div>
-<div class="line">    __var SCS_Addr   = 0xE000E000;</div>
-<div class="line">    __var DHCSR_Addr = SCS_Addr + 0xDF0;</div>
-<div class="line"></div>
-<div class="line">    <span class="comment">// Enable Core Debug via DHCSR</span></div>
-<div class="line">    Write32(DHCSR_Addr, 0xA05F0001);</div>
-<div class="line">  &lt;/block&gt;</div>
-<div class="line">  </div>
-<div class="line">&lt;/sequence&gt;</div>
-</div><!-- fragment --><h2><a class="anchor" id="debugCoreStop"></a>
-DebugCoreStop</h2>
-<p>Un-initialize core debug system.</p>
-<div class="fragment"><div class="line">&lt;sequence name=<span class="stringliteral">&quot;DebugCoreStop&quot;</span>&gt;</div>
-<div class="line"></div>
-<div class="line">  &lt;block&gt;</div>
-<div class="line">    <span class="comment">// System Control Space (SCS) offset as defined in ARMv6-M/ARMv7-M.</span></div>
-<div class="line">    </div>
-<div class="line">    __var SCS_Addr   = 0xE000E000;</div>
-<div class="line">    __var DHCSR_Addr = SCS_Addr + 0xDF0;</div>
-<div class="line">    __var DEMCR_Addr = SCS_Addr + 0xDFC;</div>
-<div class="line">    </div>
-<div class="line">    <span class="comment">// Disable Core Debug via DHCSR</span></div>
-<div class="line">    Write32(DHCSR_Addr, 0xA05F0000);</div>
-<div class="line">    </div>
-<div class="line">    <span class="comment">// Disable DWT and ITM blocks, DebugMonitor handler,</span></div>
-<div class="line">    <span class="comment">// halting debug traps, and Reset Vector Catch.</span></div>
-<div class="line">    Write32(DEMCR_Addr, 0x00000000);</div>
-<div class="line">  &lt;/block&gt;</div>
-<div class="line">  </div>
-<div class="line">&lt;/sequence&gt;</div>
-</div><!-- fragment --><h2><a class="anchor" id="resetSystem"></a>
-ResetSystem</h2>
-<p>Execute a system-wide reset via software mechanisms.</p>
-<div class="fragment"><div class="line">&lt;sequence name=<span class="stringliteral">&quot;ResetSystem&quot;</span>&gt;</div>
-<div class="line"></div>
-<div class="line">  &lt;block&gt;</div>
-<div class="line">    <span class="comment">// System Control Space (SCS) offset as defined in ARMv6-M/ARMv7-M.</span></div>
-<div class="line"></div>
-<div class="line">    __var SCS_Addr   = 0xE000E000;</div>
-<div class="line">    __var AIRCR_Addr = SCS_Addr + 0xD0C;</div>
-<div class="line">    __var DHCSR_Addr = SCS_Addr + 0xDF0;</div>
-<div class="line">  </div>
-<div class="line">    <span class="comment">// Execute SYSRESETREQ via AIRCR</span></div>
-<div class="line">    Write32(AIRCR_Addr, 0x05FA0004);</div>
-<div class="line">  &lt;/block&gt;</div>
-<div class="line"></div>
-<div class="line">  &lt;!-- Reset Recovery: Wait <span class="keywordflow">for</span> DHCSR.S_RESET_ST bit to clear on read --&gt;</div>
-<div class="line">  &lt;control <span class="keywordflow">while</span>=<span class="stringliteral">&quot;(Read32(DHCSR_Addr) &amp;amp; 0x02000000) == 0&quot;</span> timeout=<span class="stringliteral">&quot;500000&quot;</span>/&gt;</div>
-<div class="line">  </div>
-<div class="line">&lt;/sequence&gt;</div>
-</div><!-- fragment --><h2><a class="anchor" id="resetProcessor"></a>
-ResetProcessor</h2>
-<p>Execute a processor reset via software mechanisms.</p>
-<dl class="section note"><dt>Note</dt><dd>This Default Debug Access Sequence is empty for ARMv6-M based processors.</dd></dl>
-<div class="fragment"><div class="line">&lt;sequence name=<span class="stringliteral">&quot;ResetProcessor&quot;</span>&gt;</div>
-<div class="line"></div>
-<div class="line">  &lt;block&gt;</div>
-<div class="line">    <span class="comment">// System Control Space (SCS) offset as defined in ARMv7-M.</span></div>
-<div class="line"></div>
-<div class="line">    __var SCS_Addr   = 0xE000E000;</div>
-<div class="line">    __var AIRCR_Addr = SCS_Addr + 0xD0C;</div>
-<div class="line">    __var DHCSR_Addr = SCS_Addr + 0xDF0;</div>
-<div class="line">  </div>
-<div class="line">    <span class="comment">// Execute VECTRESET via AIRCR</span></div>
-<div class="line">    Write32(AIRCR_Addr, 0x05FA0001);</div>
-<div class="line">  &lt;/block&gt;</div>
-<div class="line">  </div>
-<div class="line">  &lt;!-- Reset Recovery: Wait <span class="keywordflow">for</span> DHCSR.S_RESET_ST bit to clear on read --&gt;</div>
-<div class="line">  &lt;control <span class="keywordflow">while</span>=<span class="stringliteral">&quot;(Read32(DHCSR_Addr) &amp;amp; 0x02000000) == 0&quot;</span> timeout=<span class="stringliteral">&quot;500000&quot;</span>/&gt;</div>
-<div class="line"></div>
-<div class="line">&lt;/sequence&gt;</div>
-</div><!-- fragment --><h2><a class="anchor" id="resetHardware"></a>
-ResetHardware</h2>
-<p>Execute a system-wide reset via the dedicated debugger reset line nRST.</p>
-<div class="fragment"><div class="line">&lt;sequence name=<span class="stringliteral">&quot;ResetHardware&quot;</span>&gt;</div>
-<div class="line">  </div>
-<div class="line">  &lt;block&gt;</div>
-<div class="line">    __var nReset      = 0x80;</div>
-<div class="line">    __var canReadPins = 0;</div>
-<div class="line">  </div>
-<div class="line">    <span class="comment">// Deassert nRESET line</span></div>
-<div class="line">    canReadPins = (DAP_SWJ_Pins(0x00, nReset, 0) != 0xFFFFFFFF);</div>
-<div class="line">  &lt;/block&gt;</div>
-<div class="line">  </div>
-<div class="line">  &lt;!-- Keep reset active <span class="keywordflow">for</span> 50 ms --&gt;</div>
-<div class="line">  &lt;control <span class="keywordflow">while</span>=<span class="stringliteral">&quot;1&quot;</span> timeout=<span class="stringliteral">&quot;50000&quot;</span>/&gt;</div>
-<div class="line"></div>
-<div class="line">  &lt;control <span class="keywordflow">if</span>=<span class="stringliteral">&quot;canReadPins&quot;</span>&gt;</div>
-<div class="line">  </div>
-<div class="line">    &lt;!-- Assert nRESET line and wait max. 1s <span class="keywordflow">for</span> recovery --&gt;</div>
-<div class="line">    &lt;control <span class="keywordflow">while</span>=<span class="stringliteral">&quot;(DAP_SWJ_Pins(nReset, nReset, 0) &amp;amp; nReset) == 0&quot;</span> timeout=<span class="stringliteral">&quot;1000000&quot;</span>/&gt;</div>
-<div class="line">    </div>
-<div class="line">  &lt;/control&gt;</div>
-<div class="line">  </div>
-<div class="line">  &lt;control <span class="keywordflow">if</span>=<span class="stringliteral">&quot;!canReadPins&quot;</span>&gt;</div>
-<div class="line">  </div>
-<div class="line">    &lt;block&gt;</div>
-<div class="line">      <span class="comment">// Assert nRESET line</span></div>
-<div class="line">      DAP_SWJ_Pins(nReset, nReset, 0);</div>
-<div class="line">    &lt;/block&gt;</div>
-<div class="line">    </div>
-<div class="line">    &lt;!-- Wait 100ms <span class="keywordflow">for</span> recovery <span class="keywordflow">if</span> nRESET not readable --&gt;</div>
-<div class="line">    &lt;control <span class="keywordflow">while</span>=<span class="stringliteral">&quot;1&quot;</span> timeout=<span class="stringliteral">&quot;100000&quot;</span>/&gt;</div>
-<div class="line">    </div>
-<div class="line">  &lt;/control&gt;</div>
-<div class="line">  </div>
-<div class="line">&lt;/sequence&gt;</div>
-</div><!-- fragment --><h2><a class="anchor" id="resetHardwareAssert"></a>
-ResetHardwareAssert</h2>
-<p>Assert a system-wide reset line nRST.</p>
-<div class="fragment"><div class="line">&lt;sequence name=<span class="stringliteral">&quot;ResetHardwareAssert&quot;</span>&gt;</div>
-<div class="line"></div>
-<div class="line">  &lt;block&gt;</div>
-<div class="line">      __var nReset = 0x80;</div>
-<div class="line">    </div>
-<div class="line">      <span class="comment">// Deassert nRESET line to activate the hardware reset</span></div>
-<div class="line">      DAP_SWJ_Pins(0, nReset, 0);</div>
-<div class="line">  &lt;/block&gt;</div>
-<div class="line">  </div>
-<div class="line">&lt;/sequence&gt;</div>
-</div><!-- fragment --><h2><a class="anchor" id="resetHardwareDeassert"></a>
-ResetHardwareDeassert</h2>
-<p>De-Assert a system-wide reset line nRST.</p>
-<div class="fragment"><div class="line">&lt;sequence name=<span class="stringliteral">&quot;ResetHardwareDeassert&quot;</span>&gt;</div>
-<div class="line"></div>
-<div class="line">  &lt;block&gt;</div>
-<div class="line">    __var nReset      = 0x80;</div>
-<div class="line">    __var canReadPins = 0;</div>
-<div class="line">    </div>
-<div class="line">    <span class="comment">// Assert nRESET line and check if nRESET is readable</span></div>
-<div class="line">    canReadPins = (DAP_SWJ_Pins(nReset, nReset, 0) != 0xFFFFFFFF);</div>
-<div class="line">  &lt;/block&gt;</div>
-<div class="line"></div>
-<div class="line">  &lt;!-- Wait max. 1s <span class="keywordflow">for</span> nRESET to recover from reset <span class="keywordflow">if</span> readable--&gt;</div>
-<div class="line">  &lt;control <span class="keywordflow">if</span>=<span class="stringliteral">&quot;canReadPins&quot;</span> <span class="keywordflow">while</span>=<span class="stringliteral">&quot;(DAP_SWJ_Pins(nReset, nReset, 0) &amp;amp; nReset) == 0&quot;</span> timeout=<span class="stringliteral">&quot;1000000&quot;</span>/&gt;</div>
-<div class="line">  </div>
-<div class="line">  &lt;!-- Wait 100ms <span class="keywordflow">for</span> recovery <span class="keywordflow">if</span> nRESET not readable --&gt;</div>
-<div class="line">  &lt;control <span class="keywordflow">if</span>=<span class="stringliteral">&quot;!canReadPins&quot;</span> <span class="keywordflow">while</span>=<span class="stringliteral">&quot;1&quot;</span> timeout=<span class="stringliteral">&quot;100000&quot;</span>/&gt;</div>
-<div class="line"></div>
-<div class="line">&lt;/sequence&gt;</div>
-</div><!-- fragment --><h2><a class="anchor" id="resetCatchSet"></a>
-ResetCatchSet</h2>
-<p>Configure the target to stop code execution after a reset.</p>
-<div class="fragment"><div class="line">&lt;sequence name=<span class="stringliteral">&quot;ResetCatchSet&quot;</span>&gt;</div>
-<div class="line"></div>
-<div class="line">  &lt;block&gt;</div>
-<div class="line">    <span class="comment">// System Control Space (SCS) offset as defined</span></div>
-<div class="line">    <span class="comment">// in ARMv6-M/ARMv7-M. Reimplement this sequence</span></div>
-<div class="line">    <span class="comment">// if the SCS is located at a different offset.</span></div>
-<div class="line"></div>
-<div class="line">    __var SCS_Addr   = 0xE000E000;</div>
-<div class="line">    __var DHCSR_Addr = SCS_Addr + 0xDF0;</div>
-<div class="line">    __var DEMCR_Addr = SCS_Addr + 0xDFC;</div>
-<div class="line">    __var value      = 0;</div>
-<div class="line">  </div>
-<div class="line">    <span class="comment">// Enable Reset Vector Catch in DEMCR</span></div>
-<div class="line">    value = Read32(DEMCR_Addr);</div>
-<div class="line">    Write32(DEMCR_Addr, (value | 0x00000001));</div>
-<div class="line"></div>
-<div class="line">    <span class="comment">// Read DHCSR to clear potentially set DHCSR.S_RESET_ST bit</span></div>
-<div class="line">    Read32(DHCSR_Addr);</div>
-<div class="line">  &lt;/block&gt;</div>
-<div class="line"></div>
-<div class="line">&lt;/sequence&gt;</div>
-</div><!-- fragment --><h2><a class="anchor" id="resetCatchClear"></a>
-ResetCatchClear</h2>
-<p>Free hardware resources allocated by ResetCatchSet.</p>
-<div class="fragment"><div class="line">&lt;sequence name=<span class="stringliteral">&quot;ResetCatchClear&quot;</span>&gt;</div>
-<div class="line"></div>
-<div class="line">  &lt;block&gt;</div>
-<div class="line">    <span class="comment">// System Control Space (SCS) offset as defined</span></div>
-<div class="line">    <span class="comment">// in ARMv6-M/ARMv7-M. Reimplement this sequence</span></div>
-<div class="line">    <span class="comment">// if the SCS is located at a different offset.</span></div>
-<div class="line">    </div>
-<div class="line">    __var SCS_Addr   = 0xE000E000;</div>
-<div class="line">    __var DEMCR_Addr = SCS_Addr + 0xDFC;</div>
-<div class="line">    __var value      = 0;</div>
-<div class="line">    </div>
-<div class="line">    <span class="comment">// Disable Reset Vector Catch in DEMCR</span></div>
-<div class="line">    value = Read32(DEMCR_Addr);</div>
-<div class="line">    Write32(DEMCR_Addr, (value &amp;amp; (~0x00000001)));</div>
-<div class="line">  &lt;/block&gt;</div>
-<div class="line">  </div>
-<div class="line">&lt;/sequence&gt;</div>
-</div><!-- fragment --><h1><a class="anchor" id="writing_sequences"></a>
-Writing debug access sequences</h1>
-<p>To override a default sequence or to create a custom (default) sequence, you need to write <a class="el" href="pdsc_family_pg.html#element_sequence">sequence</a> elements. The following sections show how to use the built-in debug access syntax, expressions, and debug access functions to create custom sequences.</p>
-<h2><a class="anchor" id="DebugSyntaxRules"></a>
-Debug access syntax rules</h2>
-<p>Debug accesses are described in <b>block</b> elements of a debug access sequence (<b>sequence</b> element). The following syntax is used for this purpose:</p>
-<ul>
-<li>The contents of a <b>block</b> element is a series of statements.</li>
-<li>Each statement must begin in a new line and is terminated by a <span class="XML-Token">;</span> character.</li>
-<li>A typical statement consists of variable, followed by a <span class="XML-Token">=</span> character and an expression, where the <span class="XML-Token">=</span> character is an assignment of the <a class="el" href="pdsc_SequenceNameEnum_pg.html#ExpressionType">expression</a> result to the variable: <div class="fragment"><div class="line">variable = expression;</div>
-</div><!-- fragment --></li>
-<li>Alternatively, a statement can be a sole <a class="el" href="pdsc_SequenceNameEnum_pg.html#ExpressionType">expression</a> without storing its result to a variable. <div class="fragment"><div class="line">expression;</div>
-</div><!-- fragment --></li>
-<li>Comments begin with two slashes (<span class="XML-Token">//</span>) and end with a linebreak: <div class="fragment"><div class="line"><span class="comment">// Whole line is a comment</span></div>
-<div class="line">variable = expression;  <span class="comment">// Comment appended to statement</span></div>
-</div><!-- fragment --></li>
-<li>Variables must be defined using the keyword <span class="XML-Token">__var</span>. The definition must include an initalization of the variable: <div class="fragment"><div class="line">__var variable = 0;</div>
-</div><!-- fragment --></li>
-<li>Variables can be defined only once within a scope. Scopes beging with entering a debug access sequence or a <b>control</b> element. They are extended to child <b>control</b> elements. Variables of a parent scope can be modified. Leaving a scope destroys all variables defined in it.<br/>
- <b><em>block</em> elements do not begin a new scope.</b> <div class="fragment"><div class="line">&lt;sequence name=<span class="stringliteral">&quot;MySequence&quot;</span>&gt;</div>
-<div class="line">  </div>
-<div class="line">  &lt;block info=<span class="stringliteral">&quot;Block 1&quot;</span>&gt;</div>
-<div class="line">    __var condvar = 1;</div>
-<div class="line">    __var myvar1  = 5;</div>
-<div class="line">    __var myvar2  = 0;</div>
-<div class="line">  &lt;/block&gt;</div>
-<div class="line">  </div>
-<div class="line">  &lt;control <span class="keywordflow">if</span>=<span class="stringliteral">&quot;condvar&quot;</span>&gt;</div>
-<div class="line">    &lt;block&gt;</div>
-<div class="line">      <span class="comment">// __var myvar1 = 2;      // Redefinition, not allowed!</span></div>
-<div class="line">      __var myvar3 = 2;</div>
-<div class="line">      myvar2 = myvar1 + myvar3; <span class="comment">// Assign value (5+2) = 7</span></div>
-<div class="line">    &lt;/block&gt;</div>
-<div class="line">  &lt;/control&gt;</div>
-<div class="line">  </div>
-<div class="line">  &lt;block info=<span class="stringliteral">&quot;Block 2&quot;</span>&gt;</div>
-<div class="line">    myvar1 = myvar2 + 1;  <span class="comment">// Variable myvar1 holds the value &#39;8&#39; after this statement</span></div>
-<div class="line">    <span class="comment">// myvar2 = myvar3;   // myvar3 does not exist in this scope, not allowed!</span></div>
-<div class="line">  &lt;/block&gt;</div>
-<div class="line">  </div>
-<div class="line">&lt;/sequence&gt;</div>
-</div><!-- fragment --></li>
-<li>The debug access variables <b>__dp</b>, <b>__ap</b>, and <b>__errorcontrol</b> can be modified within a debug access sequence. An assigned value is held until leaving the sequence. Calling another sequence by the <b>Sequence</b> debug access function will push their values on a sequence execution stack. The values are restored when returning from such a call.</li>
-</ul>
-<h2><a class="anchor" id="ExpressionType"></a>
-Expression rules</h2>
-<p>Expressions are used in various places to describe one of the following:</p>
-<ul>
-<li>A value as assigned in a <a class="el" href="pdsc_SequenceNameEnum_pg.html#DebugSyntaxRules">debug access statement</a>.</li>
-<li>A condition to use in the <b>if</b> attribute of a <b>control</b> element.</li>
-<li>A condition to use in the <b>while</b> attribute of a <b>control</b> element.</li>
-<li>A parameter to a debug access function as described below.</li>
-</ul>
-<p>An expression may consist of the following:</p>
-<ul>
-<li>Constant numbers in decimal and hexadecimal representation (prefix <span class="XML-Token">0x</span>).</li>
-<li>Arithmetic operators such as <span class="XML-Token">+</span>, <span class="XML-Token">-</span>, <span class="XML-Token">*</span>, <span class="XML-Token">/</span>, and <span class="XML-Token">%</span>.</li>
-<li>Bit-arithmetic operators such as <span class="XML-Token">&amp;</span>, <span class="XML-Token">|</span>, <span class="XML-Token">~</span>, <span class="XML-Token">^</span>, <span class="XML-Token">&gt;&gt;</span>, and <span class="XML-Token">&lt;&lt;</span>.</li>
-<li>Comparison-operators such as <span class="XML-Token">==</span>, <span class="XML-Token">!=</span>, <span class="XML-Token">&lt;</span>, <span class="XML-Token">&gt;</span>, <span class="XML-Token">&lt;=</span>, and <span class="XML-Token">&gt;=</span>.</li>
-<li>Logic operators such as <span class="XML-Token">!</span>, <span class="XML-Token">&amp;&amp;</span>, <span class="XML-Token">||</span>, and <span class="XML-Token">==</span>.</li>
-<li>Conditional expression operations like:<div class="fragment"><div class="line">(x &lt; y) ? a : b </div>
-</div><!-- fragment --></li>
-<li>Precedence of sub-expressions is indicated by brackets (<span class="XML-Token">(</span>, <span class="XML-Token">)</span>). C-like precedence applies if brackets are omitted.</li>
-<li>References to <a class="el" href="pdsc_family_pg.html#DebugVars">debug access variables</a> for evaluating debug settings.</li>
-<li>Calls to <a class="el" href="pdsc_SequenceNameEnum_pg.html#DebugFunctions">debug access functions</a>.</li>
-</ul>
-<dl class="section note"><dt>Note</dt><dd><ul>
-<li>All values used in expressions resolve to 64-bit unsigned integer values.</li>
-<li>All logic-operations and comparisons resolve to the value <span class="XML-Token">1</span> if true, to <span class="XML-Token">0</span> otherwise.</li>
-<li>XML prohibits the use of the characters <span class="XML-Token">&amp;</span>, <span class="XML-Token">&lt;</span>, and <span class="XML-Token">&gt;</span>. Use the corresponding XML entity names instead: <span class="XML-Token">&amp;amp;</span>, <span class="XML-Token">&amp;lt;</span>, and <span class="XML-Token">&amp;gt;</span>.</li>
-</ul>
-</dd></dl>
-<p>&#160;</p>
-<h2><a class="anchor" id="DebugFunctions"></a>
-Debug access functions</h2>
-<p>Debug access functions can be called in expressions in order to interact with the target device and the user. Parameters to functions can again be expressions.<br/>
- By default, a debugger must abort the execution of a debug access sequence if a function call fails. However, this behavior can be controlled from a sequence by the <b>__errorcontrol</b> <a class="el" href="pdsc_family_pg.html#DebugVars">debug access variable</a>.<br/>
- <br/>
- The following table describes the existing debug access functions, their parameters and the debug access variables which are evaluated for the function call.</p>
-<table  class="cmtable" summary="ExpressionType: debug access functions">
-<tr>
-<th>Function </th><th>Description  </th></tr>
-<tr>
-<td style="white-space: nowrap"><pre>Sequence("name")</pre> </td><td><p class="starttd">Execute a debug access sequence. Calling a sequence by this function causes the modifiable debug access variables <b>__dp</b>, <b>__ap</b>, and <b>__errorcontrol</b> to be pushed on a sequence execution stack. Returning from such a call will restore the state of these variables.<br/>
- <br/>
- <b>Parameters:</b><br/>
-</p>
-<ul>
-<li>name: Name of the sequence to execute. It must be enclosed by quotes.</li>
-</ul>
-<p class="endtd"><b>Return Value:</b><br/>
- Always returns <span class="XML-Token">0</span>.   </p>
-</td></tr>
-<tr>
-<td style="white-space: nowrap"><pre>Read8(addr)</pre> </td><td><p class="starttd">Read an 8-bit value from target memory. <b>A device must support native 8-bit memory accesses for this function to succeed.</b><br/>
- <br/>
- <b>Parameters:</b><br/>
-</p>
-<ul>
-<li>addr: Memory address to read from.</li>
-</ul>
-<p><b>Debug Access Variables:</b><br/>
-</p>
-<ul>
-<li>__dp: The debug port to use for this memory access.</li>
-<li>__ap: The access port to use for this memory access.</li>
-</ul>
-<p class="endtd"><b>Return Value:</b><br/>
- The 8-bit value as read from target memory.   </p>
-</td></tr>
-<tr>
-<td style="white-space: nowrap"><pre>Read16(addr)</pre> </td><td><p class="starttd">Read an 16-bit value from target memory. <b>A device must support native 16-bit memory accesses for this function to succeed.</b><br/>
- <br/>
- <b>Parameters:</b><br/>
-</p>
-<ul>
-<li>addr: Memory address to read from.</li>
-</ul>
-<p><b>Debug Access Variables:</b><br/>
-</p>
-<ul>
-<li>__dp: The debug port to use for this memory access.</li>
-<li>__ap: The access port to use for this memory access.</li>
-</ul>
-<p class="endtd"><b>Return Value:</b><br/>
- The 16-bit value as read from target memory.   </p>
-</td></tr>
-<tr>
-<td style="white-space: nowrap"><pre>Read32(addr)</pre> </td><td><p class="starttd">Read an 32-bit value from target memory. <b>A device must support native 32-bit memory accesses for this function to succeed.</b><br/>
- <br/>
- <b>Parameters:</b><br/>
-</p>
-<ul>
-<li>addr: Memory address to read from.</li>
-</ul>
-<p><b>Debug Access Variables:</b><br/>
-</p>
-<ul>
-<li>__dp: The debug port to use for this memory access.</li>
-<li>__ap: The access port to use for this memory access.</li>
-</ul>
-<p><b>Return Value:</b><br/>
- The 32-bit value as read from target memory.</p>
-<p class="endtd"><b>Code Example:</b><br/>
- Refer to <a class="el" href="pdsc_SequenceNameEnum_pg.html#resetSystem">ResetSystem</a>   </p>
-</td></tr>
-<tr>
-<td style="white-space: nowrap"><pre>Read64(addr)</pre> </td><td><p class="starttd">Read an 64-bit value from target memory. <b>A device must support native 64-bit memory accesses for this function to succeed.</b><br/>
- <br/>
- <b>Parameters:</b><br/>
-</p>
-<ul>
-<li>addr: Memory address to read from.</li>
-</ul>
-<p><b>Debug Access Variables:</b><br/>
-</p>
-<ul>
-<li>__dp: The debug port to use for this memory access.</li>
-<li>__ap: The access port to use for this memory access.</li>
-</ul>
-<p class="endtd"><b>Return Value:</b><br/>
- The 64-bit value as read from target memory.   </p>
-</td></tr>
-<tr>
-<td style="white-space: nowrap"><pre>ReadAP(addr)</pre> </td><td><p class="starttd">Read a 32-bit value from an access port register.<br/>
- <br/>
- <b>Parameters:</b><br/>
-</p>
-<ul>
-<li>addr: AP register address to read from. Addresses larger than <span class="XML-Token">0xF</span> automatically cause an AP register bank switch.</li>
-</ul>
-<p><b>Debug Access Variables:</b><br/>
-</p>
-<ul>
-<li>__dp: The debug port to use for this memory access.</li>
-<li>__ap: The access port to use for this memory access.</li>
-</ul>
-<p class="endtd"><b>Return Value:</b><br/>
- The 32-bit value as read from the AP register.   </p>
-</td></tr>
-<tr>
-<td style="white-space: nowrap"><pre>ReadDP(addr)</pre> </td><td><p class="starttd">Read a 32-bit value from a debug port register.<br/>
- <br/>
- <b>Parameters:</b><br/>
-</p>
-<ul>
-<li>addr: DP register address to read from.</li>
-</ul>
-<p><b>Debug Access Variables:</b><br/>
-</p>
-<ul>
-<li>__dp: The debug port to use for this memory access.</li>
-</ul>
-<p><b>Return Value:</b><br/>
- The 32-bit value as read from the DP register.</p>
-<p class="endtd"><b>Code Example:</b><br/>
- Refer to <a class="el" href="pdsc_SequenceNameEnum_pg.html#debugPortSetup">DebugPortSetup</a>   </p>
-</td></tr>
-<tr>
-<td style="white-space: nowrap"><pre>Write8(addr, val)</pre> </td><td><p class="starttd">Write an 8-bit value to target memory. <b>A device must support native 8-bit memory accesses for this function to succeed.</b><br/>
- <br/>
- <b>Parameters:</b><br/>
-</p>
-<ul>
-<li>addr: Memory address to write to.</li>
-<li>val: Value to write.</li>
-</ul>
-<p><b>Debug Access Variables:</b><br/>
-</p>
-<ul>
-<li>__dp: The debug port to use for this memory access.</li>
-<li>__ap: The access port to use for this memory access.</li>
-</ul>
-<p class="endtd"><b>Return Value:</b><br/>
- Always returns <span class="XML-Token">0</span>.   </p>
-</td></tr>
-<tr>
-<td style="white-space: nowrap"><pre>Write16(addr, val)</pre> </td><td><p class="starttd">Write a 16-bit value to target memory. <b>A device must support native 16-bit memory accesses for this function to succeed.</b><br/>
- <br/>
- <b>Parameters:</b><br/>
-</p>
-<ul>
-<li>addr: Memory address to write to.</li>
-<li>val: Value to write.</li>
-</ul>
-<p><b>Debug Access Variables:</b><br/>
-</p>
-<ul>
-<li>__dp: The debug port to use for this memory access.</li>
-<li>__ap: The access port to use for this memory access.</li>
-</ul>
-<p class="endtd"><b>Return Value:</b><br/>
- Always returns <span class="XML-Token">0</span>.   </p>
-</td></tr>
-<tr>
-<td style="white-space: nowrap"><pre>Write32(addr, val)</pre> </td><td><p class="starttd">Write a 32-bit value to target memory. <b>A device must support native 32-bit memory accesses for this function to succeed.</b><br/>
- <br/>
- <b>Parameters:</b><br/>
-</p>
-<ul>
-<li>addr: Memory address to write to.</li>
-<li>val: Value to write.</li>
-</ul>
-<p><b>Debug Access Variables:</b><br/>
-</p>
-<ul>
-<li>__dp: The debug port to use for this memory access.</li>
-<li>__ap: The access port to use for this memory access.</li>
-</ul>
-<p><b>Return Value:</b><br/>
- Always returns <span class="XML-Token">0</span>.</p>
-<p class="endtd"><b>Code Example:</b><br/>
- Refer to <a class="el" href="pdsc_SequenceNameEnum_pg.html#debugCoreStart">DebugCoreStart</a>   </p>
-</td></tr>
-<tr>
-<td style="white-space: nowrap"><pre>Write64(addr, val)</pre> </td><td><p class="starttd">Write a 64-bit value to target memory. <b>A device must support native 64-bit memory accesses for this function to succeed.</b><br/>
- <br/>
- <b>Parameters:</b><br/>
-</p>
-<ul>
-<li>addr: Memory address to write to.</li>
-<li>val: Value to write.</li>
-</ul>
-<p><b>Debug Access Variables:</b><br/>
-</p>
-<ul>
-<li>__dp: The debug port to use for this memory access.</li>
-<li>__ap: The access port to use for this memory access.</li>
-</ul>
-<p class="endtd"><b>Return Value:</b><br/>
- Always returns <span class="XML-Token">0</span>.   </p>
-</td></tr>
-<tr>
-<td style="white-space: nowrap"><pre>WriteAP(addr, val)</pre> </td><td><p class="starttd">Write a 32-bit value to an access port register. Addresses larger than 0xF automatically cause an AP register bank switch.<br/>
- <br/>
- <b>Parameters:</b><br/>
-</p>
-<ul>
-<li>addr: Memory address to write to.</li>
-<li>val: Value to write.</li>
-</ul>
-<p><b>Debug Access Variables:</b><br/>
-</p>
-<ul>
-<li>__dp: The debug port to use for this memory access.</li>
-<li>__ap: The access port to use for this memory access.</li>
-</ul>
-<p class="endtd"><b>Return Value:</b><br/>
- Always returns <span class="XML-Token">0</span>.   </p>
-</td></tr>
-<tr>
-<td style="white-space: nowrap"><pre>WriteDP(addr, val)</pre> </td><td><p class="starttd">Write a 32-bit value to a debug port register.<br/>
- <br/>
- <b>Parameters:</b><br/>
-</p>
-<ul>
-<li>addr: Memory address to write to.</li>
-<li>val: Value to write.</li>
-</ul>
-<p><b>Debug Access Variables:</b><br/>
-</p>
-<ul>
-<li>__dp: The debug port to use for this memory access.</li>
-</ul>
-<p><b>Return Value:</b><br/>
- Always returns <span class="XML-Token">0</span>.</p>
-<p class="endtd"><b>Code Example:</b><br/>
- Refer to <a class="el" href="pdsc_SequenceNameEnum_pg.html#debugPortStart">DebugPortStart</a>   </p>
-</td></tr>
-<tr>
-<td style="white-space: nowrap"><pre>DAP_Delay(delay)</pre> </td><td><p class="starttd">Debug probe command to wait for a specific delay.<br/>
- <br/>
- <b>Parameters:</b><br/>
-</p>
-<ul>
-<li>delay: Wait time in microseconds.</li>
-</ul>
-<p class="endtd"><b>Return Value:</b><br/>
- Always returns <span class="XML-Token">0</span>.   </p>
-</td></tr>
-<tr>
-<td style="white-space: nowrap"><pre>DAP_WriteABORT(value)</pre> </td><td><p class="starttd">Debug probe command to write an abort request to the CoreSight ABORT register of the target debug port.<br/>
- <br/>
- <b>Parameters:</b><br/>
-</p>
-<ul>
-<li>value: 32-bit value to write into the CoreSight ABORT register.</li>
-</ul>
-<p><b>Debug Access Variables:</b><br/>
-</p>
-<ul>
-<li>__dp: The debug port to use for this memory access.</li>
-</ul>
-<p class="endtd"><b>Return Value:</b><br/>
- Always returns <span class="XML-Token">0</span>.   </p>
-</td></tr>
-<tr>
-<td style="white-space: nowrap"><pre>DAP_SWJ_Pins(pinout, pinselect, pinwait)</pre> </td><td><p class="starttd">Debug proble command to monitor and control the I/O Pins including the nRESET device reset line.<br/>
- <b>I/O Pin Mapping</b> for <b>pinout</b>, <b>pinselect</b>, and <b>pinwait</b>:</p>
-<ul>
-<li>Bit 0: SWCLK/TCK</li>
-<li>Bit 1: SWDIO/TMS</li>
-<li>Bit 2: TDI</li>
-<li>Bit 3: TDO</li>
-<li>Bit 5: nTRST</li>
-<li>Bit 7: nRESET</li>
-</ul>
-<p><br/>
- The <b>pinwait</b> time is useful in systems where the nRESET pin is implemented as open-drain output. After nRESET is de-asserted by the debugger, external circuit may still hold the target Device under reset for a time. Using the <b>pinwait</b> time, the debugger may monitor selected I/O Pins and wait until they the expected value appears or a timeout expires.<br/>
- <br/>
- <b>Parameters:</b><br/>
-</p>
-<ul>
-<li>pinout: Value for selected output pins.</li>
-<li>pinselect: Selects which output pins will be modified.</li>
-<li>pinwait: Wait timeout for the selected output to stabilize. A debugger must extend this timeout to the closest possible time granularity.<ul>
-<li>0 = no wait</li>
-<li>1 .. 3000000 = time in microseconds (max 3s)</li>
-</ul>
-</li>
-</ul>
-<p class="endtd"><b>Return Value:</b><br/>
- The state of the I/O Pins at the end of this operation. If a debugger is not capable of monitoring the I/O Pins, it must return a value of <span class="XML-Token">0xFFFFFFFF</span>.   </p>
-</td></tr>
-<tr>
-<td style="white-space: nowrap"><pre>DAP_SWJ_Clock(val)</pre> </td><td><p class="starttd">Debug probe command to set the clock frequency for JTAG and SWD communication mode.<br/>
- <br/>
- <b>Parameters:</b><br/>
-</p>
-<ul>
-<li>val: Maximum SWD/JTAG Clock (SWCLK/TCK) value in Hz.</li>
-</ul>
-<p><b>Return Value:</b><br/>
- Always returns <span class="XML-Token">0</span>.</p>
-<p class="endtd"><b>Code Example:</b><br/>
- Refer to <a class="el" href="pdsc_SequenceNameEnum_pg.html#resetHardware">ResetHardware</a>   </p>
-</td></tr>
-<tr>
-<td style="white-space: nowrap"><pre>DAP_SWJ_Sequence(cnt, val)</pre> </td><td><p class="starttd">Debug probe command to generate required SWJ sequences, e.g. for SWD/JTAG Reset, SWD&lt;-&gt;JTAG switch and Dormant operation.<br/>
- <br/>
- <b>Parameters:</b><br/>
-</p>
-<ul>
-<li>cnt: Number of bits in sequence: 1..64. Larger sequences need to be implemented by multiple subsequent <b>DAP_SWJ_Sequence</b> calls. Such a sequence of <b>DAP_SWJ_Sequence</b> commands must be encapsulated in an atomic <b>block</b> to ensure correct execution.</li>
-<li>val: Sequence generated on SWDIO/TMS (with clock @SWCLK/TCK), LSB transmitted first.</li>
-</ul>
-<p><b>Return Value:</b><br/>
- Always returns <span class="XML-Token">0</span>.</p>
-<p class="endtd"><b>Code Example:</b><br/>
- Refer to <a class="el" href="pdsc_SequenceNameEnum_pg.html#debugPortSetup">DebugPortSetup</a>   </p>
-</td></tr>
-<tr>
-<td style="white-space: nowrap"><pre>DAP_JTAG_Sequence(cnt, tms, tdi)</pre> </td><td><p class="starttd">Debug probe command to generate a JTAG sequence with fixed TMS value and capture TDO.<br/>
- <br/>
- <b>Parameters:</b><br/>
-</p>
-<ul>
-<li>cnt: Length of the JTAG sequence (number of TCK cycles and TDI bits): 1..64</li>
-<li>tms: Fixed TMS value: 0..1</li>
-<li>tdi: Data generated on TDI with one bit per TCK cycle, LSB transmitted first.</li>
-</ul>
-<p class="endtd"><b>Return Value:</b><br/>
- Data captured from TDO with one bit per TCK cycle, LSB captured first and padded with <span class="XML-Token">0</span>s.   </p>
-</td></tr>
-<tr>
-<td style="white-space: nowrap"><pre>Query(type, "message", default)</pre> </td><td><p class="starttd">Query user input. The sequence execution stalls depending on the used <b>type</b>. If the debugger runs in a batch mode, this function returns the value <b>default</b>.<br/>
- <br/>
- <b>Parameters:</b><br/>
-</p>
-<ul>
-<li>type: Query type. Can be one of:<ul>
-<li><span class="XML-Token">0</span> : <b>Query_Ok</b>, displays an informative message which has to be confirmed by the user. This type allows the result <b>OK</b>.</li>
-<li><span class="XML-Token">1</span> : <b>Query_YesNo</b>, displays a query with the allowed results <b>Yes</b> and <b>No</b>.</li>
-<li><span class="XML-Token">2</span> : <b>Query_YesNoCancel</b>, displays a query with the allowed results <b>Yes</b>, <b>No</b>, and <b>Cancel</b>.</li>
-<li><span class="XML-Token">3</span> : <b>Query_OkCancel</b>, displays a query with the allowed results <b>OK</b> and <b>Cancel</b>.</li>
-</ul>
-</li>
-<li>message: A constant string with the query message to display. It must not be an expression and it must be enclosed by quotes.</li>
-<li>default: The default value to return if the debugger runs in batch mode. See <b>Return Values</b> for a list of allowed values.</li>
-</ul>
-<p><b>Return Value:</b><br/>
- The result of the query. The user input maps to the following numbers:</p>
-<ul>
-<li>Error : <span class="XML-Token">0</span></li>
-<li>OK : <span class="XML-Token">1</span></li>
-<li>Cancel : <span class="XML-Token">2</span></li>
-<li>Yes : <span class="XML-Token">3</span></li>
-<li>No : <span class="XML-Token">4</span></li>
-</ul>
-<p class="endtd"><b>Code Example:</b><br/>
- Refer to <a class="el" href="pdsc_SequenceNameEnum_pg.html#debugPortSetup">DebugPortSetup</a>   </p>
-</td></tr>
-<tr>
-<td style="white-space: nowrap"><pre>QueryValue("message", default)</pre> </td><td><p class="starttd">Query input value from user. The sequence execution stalls until the user has entered a value or canceled the query. This function returns the <b>default</b> value if the user canceled the query or if the debugger runs in a batch mode.<br/>
- <br/>
- <b>Parameters:</b><br/>
-</p>
-<ul>
-<li>message: A constant string with the query message to display. It must not be an expression and it must be enclosed by quotes.</li>
-<li>default: The default value to return if the user cancels the query or if the debugger runs in batch mode.</li>
-</ul>
-<p><b>Return Value:</b><br/>
- The queried value.</p>
-<p class="endtd"></p>
-</td></tr>
-<tr>
-<td style="white-space: nowrap"><pre>Message(type, "format", ...)</pre> </td><td><p class="starttd">Outputs a message to a log window.<br/>
- <br/>
- <b>Parameters:</b><br/>
-</p>
-<ul>
-<li>type: Message type. Can be one of:<ul>
-<li><span class="XML-Token">0</span> : <b>Info</b>, outputs an informative message.</li>
-<li><span class="XML-Token">1</span> : <b>Warning</b>, outputs a warning.</li>
-<li><span class="XML-Token">2</span> : <b>Error</b>, outputs an error. Sequence execution aborts.</li>
-</ul>
-</li>
-<li>format: A constant string with the message format. It must not be an expression and it must be enclosed by quotes. The string has the following format:<br/>
- <div class="fragment"><div class="line">%[flags][width][.precision]specifier</div>
-</div><!-- fragment --><ul>
-<li>Specifiers:<ul>
-<li><span class="XML-Token">%u</span>: 32-bit unsigned decimal integer.</li>
-<li><span class="XML-Token">%llu</span>: 64-bit unsigned decimal integer.</li>
-<li><span class="XML-Token">%x</span>: 32-bit unsigned hexadecimal integer, lower case letters.</li>
-<li><span class="XML-Token">%llx</span>: 64-bit unsigned hexadecimal integer, lower case letters.</li>
-<li><span class="XML-Token">%X</span>: 32-bit unsigned hexadecimal integer, upper case letters.</li>
-<li><span class="XML-Token">%llX</span>: 64-bit unsigned hexadecimal integer, upper case letters.</li>
-<li><span class="XML-Token">%o</span>: 32-bit unsigned octal integer.</li>
-<li><span class="XML-Token">%llo</span>: 64-bit unsigned octal integer.</li>
-<li><span class="XML-Token">%b</span>: 32-bit unsigned binary integer.</li>
-<li><span class="XML-Token">%llb</span>: 64-bit unsigned binary integer.</li>
-<li><span class="XML-Token">%f</span>: Single-precision (32-bit) floating point value.</li>
-<li><span class="XML-Token">%Lf</span>: Double-precision (64-bit) floating point value.</li>
-<li><span class="XML-Token">%s</span>: Constant character string. Must not be an expression.</li>
-<li><span class="XML-Token">%%</span>: Print <span class="XML-Token">%</span> character.</li>
-</ul>
-</li>
-<li>Flags:<ul>
-<li><span class="XML-Token">0</span>: Pad the displayed value with zeros instead of spaces if padding is required by the <span class="XML-Token">width</span> option.</li>
-</ul>
-</li>
-<li>Width: Minimum number of displayed characters. If <span class="XML-Token">width</span> is less than the number of characters of the value, then the value is padded with spaces to the left.</li>
-<li>.Precision:<ul>
-<li><b>Integer</b>: Minimum number of displayed digits. Padded with zeros to the left if the value has less digits than specified with <span class="XML-Token">.precision</span>.</li>
-<li><b>Floating Point</b>: Number of displayed digits after decimal point. Defaults to <span class="XML-Token">6</span> if not specified.</li>
-<li><b>Constant String</b>: Maximum number of displayed characters.</li>
-</ul>
-</li>
-</ul>
-</li>
-<li>... : Additional function parameters to replace format string specifiers. Each parameter can be a constant string, or an expression that resolves to an unsigned 64-bit integer. A parameter type must match the corresponding specifier type.</li>
-</ul>
-<p><b>Return Value:</b><br/>
- Always returns <span class="XML-Token">0</span>.</p>
-<dl class="section note"><dt>Note</dt><dd>For 32-bit specifiers the <b>Message</b> command must print the lower 32 Bit of a 64 Bit debug access variable.</dd></dl>
-</td></tr>
-<tr>
-<td style="white-space: nowrap"><pre>LoadDebugInfo("file")</pre> </td><td><p class="starttd">Loads DWARF debug information from an application executable.<br/>
- <br/>
- <b>Parameters:</b><br/>
-</p>
-<ul>
-<li>file: A constant string with the path to the executable. The path must be relative to the root folder of the pack and use the format <b>path/name.extension</b>. It must not be an expression and it must be enclosed by quotes.</li>
-</ul>
-<p><b>Return Value:</b><br/>
- Returns <span class="XML-Token">0</span> after successful debug information load.<br/>
- Returns <span class="XML-Token">1</span> if debug information load failed.</p>
-<p class="endtd"></p>
-</td></tr>
-</table>
-<dl class="section note"><dt>Note</dt><dd><ul>
-<li>Target memory access functions must perform a debug access of the size indicated by their name. The target system must support debug accesses of this size.</li>
-<li>Results of all functions are casted to 64-bit unsigned integer values.</li>
-<li>Some target access functions determine the used debug and access port by the current values of the <b>__dp</b> and <b>__ap</b> debug access variables. If a target access requires a different debug or access port than the default ones, it must change these values. This change is held until finishing the sequence the change has occurred in. </li>
-</ul>
-</dd></dl>
-</div></div><!-- contents -->
-</div><!-- doc-content -->
-<!-- start footer part -->
-<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
-  <ul>
-    <li class="navelem"><a class="el" href="coresight_setup.html">Simplifying debug setup using debug descriptions</a></li>
-    <li class="footer">Generated on Wed Feb 8 2017 10:21:01 for CMSIS-Pack by ARM Ltd. All rights reserved.
-	<!--
-    <a href="http://www.doxygen.org/index.html">
-    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
-	-->
-	</li>
-  </ul>
-</div>
-</body>
-</html>
diff --git a/docs/Pack/html/pdsc_apis_pg.html b/docs/Pack/html/pdsc_apis_pg.html
index 900631f..94e91b1 100644
--- a/docs/Pack/html/pdsc_apis_pg.html
+++ b/docs/Pack/html/pdsc_apis_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -173,6 +173,8 @@
 <tr>
 <td>exclusive </td><td>Makes the selection of a component implementing the API exclusive. If set to <span class="XML-Token">0</span>, then multiple components implementing the API can be selected. Default is <span class="XML-Token">1</span>. </td><td>xs:boolean </td><td>optional  </td></tr>
 <tr>
+<td>condition </td><td>Enter the identifier (attribute <em><b>id</b></em>) of a <a class="el" href="pdsc_conditions_pg.html#element_condition">condition</a>. The element is used if the condition resolves to <span class="XML-Token">true</span>. If the condition resolves to <span class="XML-Token">false</span>, then the element will be ignored. For example, an API might be specific for a certain toolchain or processor instruction set. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
 <td>Capiversion </td><td>Version of this component. Is a mandatory part of the component ID. The version format is described in <a class="el" href="pdsc_package_pg.html#VersionType">Version Type</a>.  </td><td>VersionType </td><td>optional  </td></tr>
 <tr>
 <th>Child&#160;Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
@@ -188,7 +190,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="packFormat.html">Pack Description (*.pdsc) Format</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/pdsc_boards_pg.html b/docs/Pack/html/pdsc_boards_pg.html
index 274f14e..47dd9ad 100644
--- a/docs/Pack/html/pdsc_boards_pg.html
+++ b/docs/Pack/html/pdsc_boards_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -495,7 +495,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="packFormat.html">Pack Description (*.pdsc) Format</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:01 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/pdsc_components_pg.html b/docs/Pack/html/pdsc_components_pg.html
index ac5c62e..a4732e8 100644
--- a/docs/Pack/html/pdsc_components_pg.html
+++ b/docs/Pack/html/pdsc_components_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -245,7 +245,15 @@
 <div class="line"><span class="preprocessor"></span><span class="preprocessor">#define RTE_Network_Socket_UDP          </span><span class="comment">/* Network Socket UDP */</span><span class="preprocessor"></span></div>
 <div class="line"><span class="preprocessor"></span> </div>
 <div class="line"><span class="preprocessor">#endif </span><span class="comment">/* RTE_COMPONENTS_H */</span><span class="preprocessor"></span></div>
-</div><!-- fragment --><p>The typical usage of the <b>RTE_Components.h</b> file is in header files to control for example the inclusion of files that are related to other components for the same Software Pack.</p>
+</div><!-- fragment --><p>The <b>RTE_Components.h</b> file allows to create software that works with any supported device as it gives access to the <b>CMSIS_device_header</b>. The <b>CMSIS_device_header</b> reflects the current selected device and gives you for example access to the processor configuration. Refer to <b>"Device Header File &lt;device.h&gt;"</b> in <a href="../../Core/html/device_h_pg.html"><b>CMSIS-Core(M)</b></a> or <a href="../../Core_A/html/device_h_pg.html"><b>CMSIS-Core(A)</b></a> for more information.</p>
+<div class="fragment"><div class="line"><span class="preprocessor">#include CMSIS_device_header            </span><span class="comment">/* header file of the selected device in the project */</span><span class="preprocessor"></span></div>
+<div class="line"><span class="preprocessor"></span></div>
+<div class="line"><span class="preprocessor">#if (defined (__MPU_PRESENT)) &amp;&amp; (__MPU_PRESENT == 1)</span></div>
+<div class="line"><span class="preprocessor"></span>  <span class="comment">// device has MPU, start the related code</span></div>
+<div class="line"><span class="preprocessor">#else</span></div>
+<div class="line"><span class="preprocessor"></span><span class="preprocessor">  #error &quot;Software Component requires a device with MPU&quot;</span></div>
+<div class="line"><span class="preprocessor">#endif</span></div>
+</div><!-- fragment --><p>Another typical usage of the <b>RTE_Components.h</b> file is in header files to control for example the inclusion of files that are related to other components for the same Software Pack.</p>
 <div class="fragment"><div class="line"><span class="preprocessor">#include &quot;RTE_Components.h&quot;</span></div>
 <div class="line"> </div>
 <div class="line"><span class="preprocessor">#ifdef  RTE_Network_Interface_ETH_0    // generated when software component Network Interface ETH 0 is included</span></div>
@@ -253,6 +261,45 @@
 <div class="line"><span class="preprocessor">#endif</span></div>
 </div><!-- fragment --><p>&#160;</p>
 <hr/>
+<h1><a class="anchor" id="Pre_Include_Global_h"></a>
+Pre_Include_Global_h</h1>
+<p>The build environment shall generate a C/C++ header file with the name <b>Pre_Include_Global.h</b> from all selected components and add this file to the command line as a pre-include file for the build of all modules in the project. Note: the file shall be generated into the RTE/&lt;target&gt; subdirectory.</p>
+<div class="fragment"><div class="line">&lt;component Cclass=<span class="stringliteral">&quot;Other&quot;</span> Cgroup=<span class="stringliteral">&quot;Alpha&quot;</span> ...&gt;</div>
+<div class="line">  &lt;Pre_Include_Global_h&gt;</div>
+<div class="line">    <span class="comment">// enabling global pre include</span></div>
+<div class="line"><span class="preprocessor">    #define GLOBAL_Component_Alpha 0x4</span></div>
+<div class="line"><span class="preprocessor"></span>  &lt;/Pre_Include_Global_h&gt;</div>
+<div class="line">&lt;/component&gt;</div>
+<div class="line"></div>
+<div class="line">&lt;component Cclass=<span class="stringliteral">&quot;Other&quot;</span> Cgroup=<span class="stringliteral">&quot;Beta&quot;</span> ...&gt;</div>
+<div class="line">  &lt;Pre_Include_Global_h&gt;</div>
+<div class="line">    <span class="comment">// enabling global pre include</span></div>
+<div class="line"><span class="preprocessor">    #define GLOBAL_Component_Beta 0x8</span></div>
+<div class="line"><span class="preprocessor"></span>  &lt;/Pre_Include_Global_h&gt;</div>
+<div class="line">&lt;/component&gt;</div>
+</div><!-- fragment --><p>results in .../RTE/target_1/Pre_Include_Global.h: </p>
+<div class="fragment"><div class="line"><span class="comment">// enabling global pre include</span></div>
+<div class="line"><span class="preprocessor">#define GLOBAL_Component_Alpha 0x4</span></div>
+<div class="line"><span class="preprocessor"></span><span class="comment">// enabling global pre include</span></div>
+<div class="line"><span class="preprocessor">#define GLOBAL_Component_Beta 0x8</span></div>
+</div><!-- fragment --><p>No need to explicitly include this file as it is automatically added as pre-include into the build for all modules.</p>
+<p>&#160;</p>
+<hr/>
+<h1><a class="anchor" id="Pre_Include_Local_h"></a>
+Pre_Include_Local_h</h1>
+<p>The build environment shall generate a C/C++ header file with the name <b>Pre_Include_&lt;Cclass&gt;_&lt;component&gt;.h</b> from the selected component and add this file to the command line as a pre-include file for the build of all modules of this component. The same is done for each component containing a "Pre_Include_Local_h" element. Note: files shall be generated into the RTE/&lt;target&gt; subdirectory.</p>
+<div class="fragment"><div class="line">&lt;component Cclass=<span class="stringliteral">&quot;Other&quot;</span> Cgroup=<span class="stringliteral">&quot;Alpha&quot;</span> ...&gt;</div>
+<div class="line">  &lt;Pre_Include_Local_h&gt;</div>
+<div class="line">    <span class="comment">// enabling local pre include</span></div>
+<div class="line"><span class="preprocessor">    #define Local_Component_Alpha 1</span></div>
+<div class="line"><span class="preprocessor"></span>  &lt;/Pre_Include_Local_h&gt;</div>
+<div class="line">&lt;/component&gt;</div>
+</div><!-- fragment --><p>results in .../RTE/target_1/Pre_Include_Other_Alpha.h: </p>
+<div class="fragment"><div class="line"><span class="comment">// enabling local pre include</span></div>
+<div class="line"><span class="preprocessor">#define Local_Component_Alpha 1</span></div>
+</div><!-- fragment --><p>No need to explicitly include this file as it is automatically added as pre-include into the build for all modules of component Other:Alpha.</p>
+<p>&#160;</p>
+<hr/>
 <h1><a class="anchor" id="element_components"></a>
 /package/components</h1>
 <p>Grouping element containing a choice of at least one bundle or component. No more than one element <em>components</em> can exist in a Pack.</p>
@@ -349,7 +396,13 @@
 <tr>
 <td>description </td><td>Brief description of the component. </td><td>xs:string  </td><td>1..1  </td></tr>
 <tr>
-<td>RTE_Components_h </td><td>Source code that is copied into the file <a class="el" href="pdsc_components_pg.html#RTE_Components_h">RTE_Components.h</a> when the component is included into a software project. </td><td>xs:string  </td><td>0..1   </td></tr>
+<td>RTE_Components_h </td><td>Source code that is copied into the file <a class="el" href="pdsc_components_pg.html#RTE_Components_h">RTE_Components.h</a> when the component is selected by the run time environment configuration. </td><td>xs:string  </td><td>0..1   </td></tr>
+<tr>
+<td>Pre_Include_Global_h </td><td>Source code that is copied into the file <a class="el" href="pdsc_components_pg.html#Pre_Include_Global_h">Pre_Include_Global_h</a> when the component is selected by the run time environment configuration. </td><td>xs:string  </td><td>0..1   </td></tr>
+<tr>
+<td>Pre_Include_Local_Component_h </td><td>Source code that is copied into the file <a class="el" href="pdsc_components_pg.html#Pre_Include_Local_h">Pre_Include_Local_h</a> &lt;Cclass&gt;_&lt;Component_name&gt;.h when the component is selected by the run time environment configuration. </td><td>xs:string  </td><td><p class="starttd">0..1  </p>
+<p class="endtd"></p>
+</td></tr>
 <tr>
 <td><a class="el" href="pdsc_components_pg.html#element_files">files</a> </td><td>Grouping element for all files that are part of this component. </td><td>group </td><td>1  </td></tr>
 </table>
@@ -451,9 +504,11 @@
 <tr>
 <td>name </td><td>File path, file name, and file extension in the format <b>path/name.extension</b>. The file path is relative to the root directory of the Pack. </td><td>xs:string </td><td>required  </td></tr>
 <tr>
-<td>category </td><td>Defines the purpose of the file. Select the predefined value as listed in the table <a class="el" href="pdsc_components_pg.html#FileCategoryEnum">File Categories</a>. </td><td>FileCategoryEnum </td><td>required  </td></tr>
+<td>path </td><td>for <b>category="header"</b> the path attribute explicitly can be used to specify the include path to be added to the commandline of the build tools, specifying an imcomplete path. This way the include file requires the specification of the subdirectory (e.g. #include "sub_dir/includeFile.h") which can act as acting as namespace for header files which otherwise have the same name. </td><td>xs:string </td><td>optional  </td></tr>
 <tr>
-<td>attr </td><td>Defines the special use and handling of a file. Select a predefined value as defined in the table <a class="el" href="pdsc_components_pg.html#FileAttributeEnum">File Attributes</a>.  </td><td>FileAttributeEnum </td><td>optional  </td></tr>
+<td>category </td><td>Defines the purpose of the file. Select the predefined value as listed in the table <a class="el" href="pdsc_components_pg.html#FileCategoryEnum">File Categories</a>. </td><td><a class="el" href="pdsc_components_pg.html#FileCategoryEnum">FileCategoryEnum</a> </td><td>required  </td></tr>
+<tr>
+<td>attr </td><td>Defines the special use and handling of a file. Select a predefined value as defined in the table <a class="el" href="pdsc_components_pg.html#FileAttributeEnum">File Attributes</a>.  </td><td><a class="el" href="pdsc_components_pg.html#FileAttributeEnum">FileAttributeEnum</a> </td><td>optional  </td></tr>
 <tr>
 <td>condition </td><td>Enter the identifier (attribute <em><b>id</b></em>) of a <a class="el" href="pdsc_conditions_pg.html#element_condition">condition</a>. The element is used if the condition resolves to <span class="XML-Token">true</span>. If the condition resolves to <span class="XML-Token">false</span>, then the element will be ignored. For example, a library might be specific for a certain toolchain or processor instruction set. </td><td>xs:string </td><td>optional  </td></tr>
 <tr>
@@ -472,7 +527,7 @@
 <tr>
 <th>attr= </th><th>Description  </th></tr>
 <tr>
-<td class="XML-Token">config </td><td>The file is a configuration file of the component. It is expected that only configuration options are modified. The file is managed as part of the component, as a project-specific file typically copied into the component section of the project.   </td></tr>
+<td class="XML-Token">config </td><td>The file is a configuration file of the component. It is expected that only configuration options are modified. The file is managed as part of the component, as a project-specific file typically copied into the component section of the project.s  </td></tr>
 <tr>
 <td class="XML-Token">template </td><td><p class="starttd">The file is used as a source code template file. It is expected to be edited and extended by the software developer. The file can be copied into a user section of the project. </p>
 <p class="endtd"></p>
@@ -496,9 +551,9 @@
 <tr>
 <td class="XML-Token">doc </td><td>Documentation  </td></tr>
 <tr>
-<td class="XML-Token">header </td><td>Header file used in the component. Sets an include file path.  </td></tr>
+<td class="XML-Token">header </td><td>Header file used in the component. Sets an include file path and adds the file name attribute to the list of files to be added to a module using the <b>#include</b> statement. Note: specify only those files as header files that form part of the API of the component, required to use the component  </td></tr>
 <tr>
-<td class="XML-Token">include </td><td>Sets an include file path.  </td></tr>
+<td class="XML-Token">include </td><td>Sets an include file path. Note: ensure that the name attribute specifies a directory and ends with a '/'.  </td></tr>
 <tr>
 <td class="XML-Token">library </td><td>Library file  </td></tr>
 <tr>
@@ -518,6 +573,10 @@
 <tr>
 <td class="XML-Token">image </td><td>Files of image type are marked for special processing into a File System Image embedded into the application. This category requires the <em>attr</em> being set to <em>template</em>.   </td></tr>
 <tr>
+<td class="XML-Token">preIncludeGlobal </td><td>The specified file is added as a pre-include file to the compiler command line for all modules of the whole <b>project</b> (globally).  </td></tr>
+<tr>
+<td class="XML-Token">preIncludeLocal </td><td>The specified file is added as a pre-include file to the compiler command line for all modules of the <b>component</b> (locally).  </td></tr>
+<tr>
 <td class="XML-Token">other </td><td>Other file types not covered in the list above  </td></tr>
 </table>
 <p>&#160;</p>
@@ -528,7 +587,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="packFormat.html">Pack Description (*.pdsc) Format</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:01 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/pdsc_conditions_pg.html b/docs/Pack/html/pdsc_conditions_pg.html
index c89587c..90e79c1 100644
--- a/docs/Pack/html/pdsc_conditions_pg.html
+++ b/docs/Pack/html/pdsc_conditions_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -218,16 +218,16 @@
 <tr>
 <th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
 <tr>
-<td>Dfamily<b>*</b> </td><td>Specifies the device family name (for example: STM32F2 Series). </td><td>xs:string </td><td>optional  </td></tr>
-<tr>
-<td>DsubFamily<b>*</b> </td><td>Specifies the device sub-family name (for example: STM32F205 Series). </td><td>xs:string </td><td>optional  </td></tr>
-<tr>
-<td>Dvariant<b>*</b> </td><td>Specifies the variant name of a device (for example: Step A). </td><td>xs:string </td><td>optional  </td></tr>
-<tr>
 <td>Dvendor </td><td>Specifies the silicon vendor of the device. Use predefined values as listed in the table <a class="el" href="pdsc_family_pg.html#DeviceVendorEnum">Device Vendor</a>. </td><td>DeviceVendorEnum </td><td>optional  </td></tr>
 <tr>
+<td>Dfamily<b>*</b> </td><td><b>DEPRECATED**</b> Specifies the device family name (for example: STM32F2 Series). </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>DsubFamily<b>*</b> </td><td><b>DEPRECATED**</b>Specifies the device sub-family name (for example: STM32F205 Series). </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
 <td>Dname<b>*</b> </td><td>Specifies the name of the device.  </td><td>xs:string </td><td>optional  </td></tr>
 <tr>
+<td>Dvariant<b>*</b> </td><td><b>DEPRECATED**</b>Specifies the variant name of a device (for example: Step A). </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
 <td>Pname </td><td>Specifies the processor instance in case of multi processor devices. This allows to describe distinct conditions for a specific processor. </td><td>xs:string </td><td>optional  </td></tr>
 <tr>
 <td>Dcore </td><td>Specifies a processor core. Use predefined values as listed in the table <a class="el" href="pdsc_family_pg.html#DcoreEnum">Device Cores</a>. </td><td>DcoreEnum </td><td>optional  </td></tr>
@@ -289,6 +289,11 @@
 <li>'?' matches any single character</li>
 <li>[abc] matches any character in the set (a,b,c)</li>
 </ul>
+<p><b>**)</b> These attributes must not be used in conditions because</p>
+<ul>
+<li>'Dfamily' and 'DsubFamily' turn out to be volatile.</li>
+<li>conditions shall only filter for selectable devices. 'Dvariant'effectively is just an alias for 'Dname'. Once a &lt;variant&gt; tag exists, the &lt;device&gt; tag no longer represents a selectable device.</li>
+</ul>
 <p>&#160;</p>
 <p><a class="anchor" id="CompilerEnumType"></a><b>Table: Compiler Types</b></p>
 <p>The tale list values representing a C/C++ compiler toolchains from a specific tool vendor. The tokens can be used in the elements:</p>
@@ -321,7 +326,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="packFormat.html">Pack Description (*.pdsc) Format</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/pdsc_devices_pg.html b/docs/Pack/html/pdsc_devices_pg.html
index 19ddc5e..02a7ab7 100644
--- a/docs/Pack/html/pdsc_devices_pg.html
+++ b/docs/Pack/html/pdsc_devices_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -240,7 +240,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="packFormat.html">Pack Description (*.pdsc) Format</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/pdsc_examples_pg.html b/docs/Pack/html/pdsc_examples_pg.html
index 2d4cc6a..4ee2c73 100644
--- a/docs/Pack/html/pdsc_examples_pg.html
+++ b/docs/Pack/html/pdsc_examples_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -324,7 +324,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="packFormat.html">Pack Description (*.pdsc) Format</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:01 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/pdsc_family_pg.html b/docs/Pack/html/pdsc_family_pg.html
index c06e92f..1485d16 100644
--- a/docs/Pack/html/pdsc_family_pg.html
+++ b/docs/Pack/html/pdsc_family_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -845,6 +845,40 @@
 <td>Touch</td><td>Number of Touch Channels</td><td>N/A</td><td>Capacitive Touch Inputs</td><td>&lt;feature type="Touch" n="10" name="Capacitive Touch Inputs"/&gt;</td><td>10 x Capacitive Touch Inputs </td></tr>
 <tr>
 <td>Other</td><td>Number of Features</td><td>N/A</td><td>Other Feature</td><td>&lt;feature type="Other" n="2" name="My other Interface"/&gt;</td><td>2 x My other Interface </td></tr>
+<tr>
+<td>GPU</td><td>IP Name</td><td>Number of Shaders</td><td>GPU</td><td>&lt;feature type="GPU" n="Mali G71" m="1024"/&gt;</td><td>Mali G71 GPU with 1024 Shaders </td></tr>
+<tr>
+<td>AI</td><td>N/A</td><td>N/A</td><td>AI</td><td>&lt;feature type="AI"/&gt;</td><td>AI accelerator </td></tr>
+<tr>
+<td>FPGA</td><td>Number of Logic Elements</td><td>N/A</td><td>FPGA Array</td><td>&lt;feature type="FPGA" n="100000"/&gt;</td><td>FPGA with 100000 Logic Elements </td></tr>
+<tr>
+<td>Application</td><td>Automotive, Industrial, Medical, MilAero</td><td>Standard Name</td><td>N/A</td><td>&lt;feature type="Application" n="Automotive" m="ISO 26262"/&gt;</td><td>Automotive ISO 26262 Applications </td></tr>
+<tr>
+<td>IrDA</td><td>Standard Version</td><td>Data Rate in Bit/s</td><td>Infrared</td><td>&lt;feature type="IrDA" n="" m="1000000"/&gt;</td><td>IrDA 1 Mbit/s </td></tr>
+<tr>
+<td>HDMI</td><td>Standard Version</td><td>N/A</td><td>HDMI</td><td>&lt;feature type="HDMI" n="1.3"/&gt;</td><td>HDMI 1.3 </td></tr>
+<tr>
+<td>MIPI</td><td>Standard Version</td><td>Data Rate in Bit/s</td><td>MIPI</td><td>&lt;feature type="MIPI" n="CSI" m="5000000000"/&gt;</td><td>MIPI CSI 5 Gbit/s </td></tr>
+<tr>
+<td>PCIe</td><td>Standard Version</td><td>Maximum Data Rate in Bit/s</td><td>PCIe</td><td>&lt;feature type="PCIe" n="3.0" m="3000000000"/&gt;</td><td>PCIe 3.0 3 GT/s </td></tr>
+<tr>
+<td>Bluetooth</td><td>Standard Version</td><td>Maximum Data Rate in Bit/s</td><td>Bluetooth</td><td>&lt;feature type="Bluetooth" n="4.2" name="Bluetooth Low Energy"/&gt;</td><td>Bluetooth Low Energy 4.2 </td></tr>
+<tr>
+<td>ZigBee</td><td>Application Profile</td><td>Data Rate in Bit/s</td><td>ZigBee</td><td>&lt;feature type="Zigbee" n="Home Automation 2.1"/&gt;</td><td>ZigBee Home Automation 1.2 </td></tr>
+<tr>
+<td>802.15.4</td><td>Standard Version</td><td>N/A</td><td>802.15.4</td><td>&lt;feature type="802.15.4" n="802.15.4d"/&gt;</td><td>802.15.4d </td></tr>
+<tr>
+<td>WiFi</td><td>Standard Version</td><td>Maximum Data Rate in Bit/s</td><td>WiFi</td><td>&lt;feature type="WiFi" n="802.11ac"/&gt;</td><td>802.11ac WiFi </td></tr>
+<tr>
+<td>LoRa</td><td>Standard Version</td><td>Maximum Data Rate in Bit/s</td><td>LoRa</td><td>&lt;feature type="LoRa"/&gt;</td><td>LoRa </td></tr>
+<tr>
+<td>LTE Cat-M</td><td>Standard Version</td><td>Maximum Data Rate in Bit/s</td><td>LTE Cat-M</td><td>&lt;feature type="LTE-M" n="M1" m="1000000"/&gt;</td><td>LTE-M M1 1 Mbit/s </td></tr>
+<tr>
+<td>NB-IoT</td><td>Standard Version</td><td>Maximum Data Rate in Bit/s</td><td>NB IoT</td><td>&lt;feature type="NB-IoT" n="NB1" m="250000"/&gt;</td><td>NB-IoT NB1 250 kbit/s </td></tr>
+<tr>
+<td>NFC</td><td>Standard Version</td><td>Maximum Data Rate in Bit/s</td><td>NFC</td><td>&lt;feature type="NFC" n="ISO 18092"/&gt;</td><td>NFC ISO 18092 </td></tr>
+<tr>
+<td>WirelessOther</td><td>Standard Version</td><td>Maximum Data Rate in Bit/s</td><td>Other Wireless Connectivity</td><td>&lt;feature type="WirelessOther" n="MyStandard" m="1000000"/&gt;</td><td>MyStandard 1 Mbit/s Wireless Connectivity </td></tr>
 </table>
 <p>&#160;</p>
 <hr/>
@@ -1001,7 +1035,9 @@
 <tr>
 <td>Dtz </td><td>Specifies whether an Armv8-M based device implements TrustZone. Use predefined values as listed in the table <a class="el" href="pdsc_family_pg.html#DtzEnum">Device TZ</a>. </td><td>DtzEnum </td><td>required for ARMv8-M based devices  </td></tr>
 <tr>
-<td>Ddsp </td><td>Specifies whether a device supports the DSP instructions set. Use predefined values as listed in the table <a class="el" href="pdsc_family_pg.html#DdspEnum">Device DSP</a>. </td><td>DdspEnum </td><td>required  </td></tr>
+<td>Ddsp </td><td>Specifies whether a device supports the DSP instructions set. Use predefined values as listed in the table <a class="el" href="pdsc_family_pg.html#DdspEnum">Device DSP</a>. </td><td><a class="el" href="pdsc_family_pg.html#DdspEnum">DdspEnum</a> DdspEnum </td><td>required  </td></tr>
+<tr>
+<td>Dmve </td><td>Specifies whether a device supports the M-Profile Vector instruction set extension. Use predefined values as listed in the table <a class="el" href="pdsc_family_pg.html#DmveEnum">Device MVE</a>. </td><td><a class="el" href="pdsc_family_pg.html#DmveEnum">DmveEnum</a> DmveEnum </td><td>required for ARMv8.1-M based devices  </td></tr>
 <tr>
 <td>Dendian </td><td>Specifies the endianess of the processor. Use predefined values as listed in the table <a class="el" href="pdsc_family_pg.html#DendianEnum">Endinaness</a>. </td><td>DendianEnum </td><td>required  </td></tr>
 <tr>
@@ -1036,13 +1072,15 @@
 <tr>
 <td class="XML-Token">Analog Devices:1 </td><td>Analog Devices </td><td><a href="http://www.analog.com">http://www.analog.com</a>  </td></tr>
 <tr>
+<td class="XML-Token">APEXMIC:153 </td><td>Apex Microeletronics Co., Ltd. </td><td><a href="http://www.apexmic.com">http://www.apexmic.com</a>  </td></tr>
+<tr>
 <td class="XML-Token">ARM:82 </td><td>ARM Ltd. </td><td><a href="http://www.arm.com">http://www.arm.com</a>  </td></tr>
 <tr>
 <td class="XML-Token">ArteryTek:143 </td><td>ArteryTek </td><td><a href="http://www.arterytek.com">http://www.arterytek.com</a>  </td></tr>
 <tr>
 <td class="XML-Token">Atmel:3 </td><td>Atmel Corporation (now Microchip) </td><td><a href="http://www.microchip.com">http://www.microchip.com</a>  </td></tr>
 <tr>
-<td class="XML-Token">Autochips:150 </td><td>Autochips Inc. </td><td><a href="http://www.autochips.com/en/index.php">http://www.autochips.com/en/index.php</a>  </td></tr>
+<td class="XML-Token">Autochips:150 </td><td>Autochips Inc. </td><td><a href="http://www.autochips.com/index_en.aspx">http://www.autochips.com/index_en.aspx</a>  </td></tr>
 <tr>
 <td class="XML-Token">CSR:118 </td><td>CSR </td><td><a href="http://www.csr.com">http://www.csr.com</a>  </td></tr>
 <tr>
@@ -1058,6 +1096,8 @@
 <tr>
 <td class="XML-Token">GigaDevice:123 </td><td>GigaDevice </td><td><a href="http://www.gigadevice.com">http://www.gigadevice.com</a>  </td></tr>
 <tr>
+<td class="XML-Token">Goodix:155 </td><td>Goodix </td><td><a href="https://www.goodix.com">https://www.goodix.com</a>  </td></tr>
+<tr>
 <td class="XML-Token">HDSC:145 </td><td>HUADA Semiconductor </td><td><a href="http://www.hdsc.com.cn">http://www.hdsc.com.cn</a>  </td></tr>
 <tr>
 <td class="XML-Token">Hilscher:88 </td><td>Hilscher Gesellschaft für Systemautomation mbH </td><td><a href="http://www.hilscher.com">http://www.hilscher.com</a>  </td></tr>
@@ -1114,6 +1154,8 @@
 <tr>
 <td class="XML-Token">Sinowealth:149 </td><td>Sino Wealth Electronic Ltd. </td><td><a href="http://www.sinowealth.com">http://www.sinowealth.com</a>  </td></tr>
 <tr>
+<td class="XML-Token">SmartChip:156 </td><td>SmartChip </td><td></td></tr>
+<tr>
 <td class="XML-Token">Spansion:100 </td><td>Spansion (previously Fujitsu) </td><td><a href="http://www.spansion.com">http://www.spansion.com</a>  </td></tr>
 <tr>
 <td class="XML-Token">STMicroelectronics:13 </td><td>STMicroelectronics </td><td><a href="http://www.st.com">http://www.st.com</a>  </td></tr>
@@ -1126,11 +1168,15 @@
 <tr>
 <td class="XML-Token">Triad Semiconductor:104 </td><td>Triad Semiconductor </td><td><a href="http://www.triadsemi.com">http://www.triadsemi.com</a>  </td></tr>
 <tr>
+<td class="XML-Token">Unisoc:152 </td><td>Unisoc Communications, Inc. </td><td><a href="http://www.unisoc.com">http://www.unisoc.com</a>  </td></tr>
+<tr>
 <td class="XML-Token">Vorago:137 </td><td>Vorago Technologies </td><td><a href="http://www.voragotech.com">http://www.voragotech.com</a>  </td></tr>
 <tr>
+<td class="XML-Token">Weltrend:148 </td><td>Weltrend </td><td><a href="http://www.weltrend.com.tw">http://www.weltrend.com.tw</a>  </td></tr>
+<tr>
 <td class="XML-Token">WIZnet:122 </td><td>WIZnet </td><td><a href="http://www.wiznet.co.kr">http://www.wiznet.co.kr</a>  </td></tr>
 <tr>
-<td class="XML-Token">Xinnova:135 </td><td>Xinnova Technology </td><td><a href="http://www.xinnovatech.com/en">http://www.xinnovatech.com/en</a>  </td></tr>
+<td class="XML-Token">Xinnova:135 </td><td>Xinnova Technology </td><td>(n/a)  </td></tr>
 <tr>
 <td class="XML-Token">Zilog:89 </td><td>Zilog </td><td><a href="http://zilog.com/">http://zilog.com/</a>  </td></tr>
 </table>
@@ -1182,6 +1228,8 @@
 <tr>
 <td class="XML-Token">Cortex-M33 </td><td><a href="http://developer.arm.com/products/processors/cortex-m/cortex-m33" target="_blank">Arm Cortex-M33</a> processor based device  </td></tr>
 <tr>
+<td class="XML-Token">Cortex-M35P </td><td><a href="http://developer.arm.com/products/processors/cortex-m/cortex-m35p" target="_blank">Arm Cortex-M35P</a> processor based device  </td></tr>
+<tr>
 <td class="XML-Token">SC000 </td><td>SecurCore <a href="http://developer.arm.com/products/processors/cortex-m/sc000-processor" target="_blank">SC000</a> based on technology of Cortex-M0.  </td></tr>
 <tr>
 <td class="XML-Token">SC300 </td><td>SecurCore <a href="http://developer.arm.com/products/processors/cortex-m/sc300-processor" target="_blank">SC300</a> based on technology of Cortex-M3.  </td></tr>
@@ -1316,6 +1364,25 @@
 <td class="XML-Token">NO_DSP </td><td>No DSP instructions supported  </td></tr>
 </table>
 <p>&#160;</p>
+<p><a class="anchor" id="DmveEnum"></a><b>Table: Device implements M-Profile Vector Extension Instructions</b></p>
+<p>The table shows predefined values that identify whether a CPU implements MVE instructions (MVE). The values can be used in the elements:</p>
+<ul>
+<li><a class="el" href="pdsc_conditions_pg.html#element_accept">/package/conditions/condition/accept</a></li>
+<li><a class="el" href="pdsc_conditions_pg.html#element_require">/package/conditions/condition/require</a></li>
+<li><a class="el" href="pdsc_conditions_pg.html#element_deny">/package/conditions/condition/deny</a></li>
+<li><a class="el" href="pdsc_family_pg.html#element_processor">/package/devices/family/.../processor</a></li>
+</ul>
+<table  class="cmtable" summary="Enumeration: DmveEnum">
+<tr>
+<th>Dmve= </th><th>Description  </th></tr>
+<tr>
+<td class="XML-Token">NO_MVE </td><td>No MVE instructions supported  </td></tr>
+<tr>
+<td class="XML-Token">MVE </td><td>Integer MVE instructions supported  </td></tr>
+<tr>
+<td class="XML-Token">FP_MVE </td><td>Floating point and Integer MVE instructions supported  </td></tr>
+</table>
+<p>&#160;</p>
 <p><a class="anchor" id="DendianEnum"></a><b>Table: Endianness</b></p>
 <p>The table lists values representing the endianness of a device. The values can be used in the elements:</p>
 <ul>
@@ -2211,7 +2278,9 @@
 <tr>
 <th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
 <tr>
-<td>Dvariant </td><td>Name of the device variant. Only alphabetical characters, decimal digits, '-' and '_' are allowed </td><td>RestrictedStringDname </td><td>required  </td></tr>
+<td>Dvariant </td><td><b>May get replaced by 'Dname' in the future</b>. Name of the device on the variant level. This effectively overwrites the device name specified on the device level. Once a device section contains a variant section, only the variant elements describe a 'selectable' device which can be selected in the tools. The Dname of the device level effectively becomes a group name like the Dfamily and DsubFamily attributes. Only alphabetical characters, decimal digits, '-' and '_' are allowed </td><td>RestrictedStringDname </td><td>required  </td></tr>
+<tr>
+<td>Dname </td><td><b>future</b>. Name of the device on the variant level. Only alphabetical characters, decimal digits, '-' and '_' are allowed </td><td>RestrictedStringDname </td><td>required  </td></tr>
 <tr>
 <th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
 <tr>
@@ -2251,7 +2320,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="packFormat.html">Pack Description (*.pdsc) Format</a></li><li class="navelem"><a class="el" href="pdsc_devices_pg.html">/package/devices element</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:01 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/pdsc_generators_pg.html b/docs/Pack/html/pdsc_generators_pg.html
index 1832180..4dc8508 100644
--- a/docs/Pack/html/pdsc_generators_pg.html
+++ b/docs/Pack/html/pdsc_generators_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -542,7 +542,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="packFormat.html">Pack Description (*.pdsc) Format</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:01 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/pdsc_package_pg.html b/docs/Pack/html/pdsc_package_pg.html
index 6e0df64..a3bab08 100644
--- a/docs/Pack/html/pdsc_package_pg.html
+++ b/docs/Pack/html/pdsc_package_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -160,6 +160,14 @@
 <tr>
 <td>xs:noNamespaceSchemaLocation </td><td>Path and file name of the PACK.xsd Schema. For example, <span class="XML-Token">"PACK.xsd"</span>. </td><td>xs:string </td><td>required  </td></tr>
 <tr>
+<td>Dcore </td><td>Pack only used for a specific processor core. Use predefined values as listed in the table <a class="el" href="pdsc_family_pg.html#DcoreEnum">Device Cores</a>. Note: do not apply for packs that define a device </td><td>DcoreEnum </td><td>optional  </td></tr>
+<tr>
+<td>Dvendor </td><td>Pack only used for a specific silicon vendor of the device. Use predefined values as listed in the table <a class="el" href="pdsc_family_pg.html#DeviceVendorEnum">Device Vendor</a>. Note: do not apply for packs that define a device </td><td>DeviceVendorEnum </td><td>optional  </td></tr>
+<tr>
+<td>Dname<b>*</b> </td><td>Pack only used for a specific name of the device. Note: do not apply for packs that define a device </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>Tcompiler </td><td>Pack only used for a specific compiler toolchain (ARMCC, GCC, IAR, Tasking, ...). Use predefined values as listed in table <a class="el" href="pdsc_conditions_pg.html#CompilerEnumType">Compiler Types</a>. </td><td>CompilerEnumType </td><td>optional  </td></tr>
+<tr>
 <th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
 <tr>
 <td>name </td><td>Name of the <a class="el" href="cp_SWComponents.html">Software Pack</a>. Could be displayed by an installer. </td><td>xs:string  </td><td>1..1   </td></tr>
@@ -174,6 +182,8 @@
 <tr>
 <td>license </td><td>Path to a license document. </td><td>xs:string  </td><td>0..1   </td></tr>
 <tr>
+<td><a class="el" href="element_dominate.html">dominate</a> </td><td>dominate </td><td>A pack that has <a class="el" href="element_dominate.html">dominate</a> attribute overrules other packs that provide devices, APIs, or software components with the same name. </td><td><em>empty</em>   </td></tr>
+<tr>
 <td><a class="el" href="element_requirements_pg.html#element_requirements">requirements</a> </td><td>Specifies other CMSIS-Packs, programming languages and compiler as well as their respective version or version range required by the components in this pack.  </td><td>RequirementsType </td><td>0..1   </td></tr>
 <tr>
 <td>create </td><td>Use only when creating CMSIS software projects. Refer to <a class="el" href="cpdsc_pg.html">Project Description (*.cpdsc) Format</a> for details. </td><td>CreateType </td><td>0..1   </td></tr>
@@ -202,6 +212,12 @@
 <tr>
 <td><a class="el" href="pdsc_components_pg.html#element_components">components</a> </td><td>Lists the software components that are included in the Pack. </td><td>group </td><td>0..1   </td></tr>
 </table>
+<p><b>*)</b> Wild-cards can be used to match names with the following definitions:</p>
+<ul>
+<li>'*' matches any substring</li>
+<li>'?' matches any single character</li>
+<li>[abc] matches any character in the set (a,b,c)</li>
+</ul>
 <p>&#160;</p>
 <p><a class="anchor" id="VersionType"></a><b>Version Type</b></p>
 <p>CMSIS-Pack version specification is inspired by the <a href="http://semver.org" target="_blank">Semantic Versioning 2.0.0</a>. Under this scheme, version numbers and the way they are incremented convey a meaning about the underlying content quality and the significance of changes from one version to the next. A version consists of 3 mandatory and 2 optional sections:</p>
@@ -259,7 +275,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="packFormat.html">Pack Description (*.pdsc) Format</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:42 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:00 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/requirements.png b/docs/Pack/html/requirements.png
new file mode 100644
index 0000000..d7f233f
--- /dev/null
+++ b/docs/Pack/html/requirements.png
Binary files differ
diff --git a/docs/Pack/html/schema_check.png b/docs/Pack/html/schema_check.png
new file mode 100644
index 0000000..3ddbb1c
--- /dev/null
+++ b/docs/Pack/html/schema_check.png
Binary files differ
diff --git a/docs/Pack/html/schema_check_output.png b/docs/Pack/html/schema_check_output.png
new file mode 100644
index 0000000..ad6599f
--- /dev/null
+++ b/docs/Pack/html/schema_check_output.png
Binary files differ
diff --git a/docs/Pack/html/sdf_pg.html b/docs/Pack/html/sdf_pg.html
index d4d118a..a6d6140 100644
--- a/docs/Pack/html/sdf_pg.html
+++ b/docs/Pack/html/sdf_pg.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Pack
-   &#160;<span id="projectnumber">Version 1.5.0</span>
+   &#160;<span id="projectnumber">Version 1.6.0</span>
    </div>
    <div id="projectbrief">Delivery Mechanism for Software Packs</div>
   </td>
@@ -711,7 +711,7 @@
 <p>Depending on the context, a device type can be one of the following types:</p>
 <ol type="1">
 <li>A core device, where the type is usually specified as "Cortex-xx" (such as Cortex-A72,Cortex-M0+, Cortex-R5). It can also be a vendor-specific core type, or an older JTAG ARM core. Current cores are: <br/>
- "Cortex-A5", "Cortex-A7", "Cortex-A8", "Cortex-A9", "Cortex-A12", "Cortex-A15", "Cortex-A17", "Cortex-A32", "Cortex-A35", "Cortex-A53", "Cortex-A57", "Cortex-A72", "Cortex-A73", "Cortex-M0", "Cortex-M0+", "Cortex-M0+_JTAG-AP", "Cortex-M1", "Cortex-M23", "Cortex-M3", "Cortex-M33", "Cortex-M3_JTAG-AP", "Cortex-M4", "Cortex-M7", "Cortex-R4", "Cortex-R5", "Cortex-R7", "Cortex-R8", "Cortex-R52", "SC000", "SC100D", "SC200D", "SC300", "ThunderX", "ThunderX-r2", "ARMV8MBL", "ARMV8MML", "88FR101", "88FR111", "88FR331", "88SV581x-v7_PJ4", "88SV581x-v7_PJ4_TZ", "ARM1136JF-S", "ARM1136JF-S_JTAG-AP", "ARM1156T2F-S", "ARM1156T2F-S_JTAG-AP", "ARM1176JZF-S", "ARM1176JZF-S_JTAG-AP", "ARM11MPCore", "ARM11MPCore_JTAG-AP", "ARM710T", "ARM720T", "ARM720T_r4", "ARM740T", "ARM7EJ-S", "ARM7EJ-S_JTAG-AP", "ARM7TDMI", "ARM7TDMI_JTAG-AP", "ARM7TDMI_r4", "ARM7TDMI_r4_JTAG-AP", "ARM920T", "ARM922T", "ARM925T", "ARM926EJ-S", "ARM926EJ-S_JTAG-AP", "ARM940T", "ARM946E-S", "ARM946E-S_JTAG-AP", "ARM966E-S", "ARM966E-S_JTAG-AP", "ARM968E-S", "ARM968E-S_JTAG-AP", "ARM968E-Srd", "ARM996HS", "ARM9E-S", "ARM9EJ-S", "ARM9EJ-S_JTAG-AP", "ARM9TDMI", "V7A-Generic", "V8-Generic", "V8M-Generic", "V8R-Generic", "V8_1-Generic", "V8_2-Generic".</li>
+ "Cortex-A5", "Cortex-A7", "Cortex-A8", "Cortex-A9", "Cortex-A12", "Cortex-A15", "Cortex-A17", "Cortex-A32", "Cortex-A35", "Cortex-A53", "Cortex-A57", "Cortex-A72", "Cortex-A73", "Cortex-M0", "Cortex-M0+", "Cortex-M0+_JTAG-AP", "Cortex-M1", "Cortex-M23", "Cortex-M3", "Cortex-M33", "Cortex-M35P", "Cortex-M3_JTAG-AP", "Cortex-M4", "Cortex-M7", "Cortex-R4", "Cortex-R5", "Cortex-R7", "Cortex-R8", "Cortex-R52", "SC000", "SC100D", "SC200D", "SC300", "ThunderX", "ThunderX-r2", "ARMV8MBL", "ARMV8MML", "88FR101", "88FR111", "88FR331", "88SV581x-v7_PJ4", "88SV581x-v7_PJ4_TZ", "ARM1136JF-S", "ARM1136JF-S_JTAG-AP", "ARM1156T2F-S", "ARM1156T2F-S_JTAG-AP", "ARM1176JZF-S", "ARM1176JZF-S_JTAG-AP", "ARM11MPCore", "ARM11MPCore_JTAG-AP", "ARM710T", "ARM720T", "ARM720T_r4", "ARM740T", "ARM7EJ-S", "ARM7EJ-S_JTAG-AP", "ARM7TDMI", "ARM7TDMI_JTAG-AP", "ARM7TDMI_r4", "ARM7TDMI_r4_JTAG-AP", "ARM920T", "ARM922T", "ARM925T", "ARM926EJ-S", "ARM926EJ-S_JTAG-AP", "ARM940T", "ARM946E-S", "ARM946E-S_JTAG-AP", "ARM966E-S", "ARM966E-S_JTAG-AP", "ARM968E-S", "ARM968E-S_JTAG-AP", "ARM968E-Srd", "ARM996HS", "ARM9E-S", "ARM9EJ-S", "ARM9EJ-S_JTAG-AP", "ARM9TDMI", "V7A-Generic", "V8-Generic", "V8M-Generic", "V8R-Generic", "V8_1-Generic", "V8_2-Generic".</li>
 <li>An Access Port (AP) type such as "CSAUTHAP", "CSJTAGAP" or "CSMEMAP".</li>
 <li>A CoreSight device type that can be one of "CSCTI", "CSETM", "CSITM", "CSMTB", "CSPMU", "CSPTM", "CSTFunnel", "CSTMC", "CSTPIU","CSSTM", "CSSWO", "CSELA", "CSATBReplicator", "CSGPR", "CSETB", "CSDWT", "CSETB", "CSTSGEN", "CSHTM", "CSFPB"</li>
 <li>A JTAG device, which is directly on the scanchain (e.g. ARM11).</li>
@@ -975,7 +975,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-Pack by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:01 for CMSIS-Pack Version 1.6.0 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Pack/html/search/all_4.js b/docs/Pack/html/search/all_4.js
index a7d98d6..3905264 100644
--- a/docs/Pack/html/search/all_4.js
+++ b/docs/Pack/html/search/all_4.js
@@ -1,11 +1,4 @@
 var searchData=
 [
-  ['pack_20with_20software_20components',['Pack with Software Components',['../cp_SWComponents.html',1,'']]],
-  ['project_20description_20_28_2a_2ecpdsc_29_20format',['Project Description (*.cpdsc) Format',['../cpdsc_pg.html',1,'']]],
-  ['pack_20with_20device_20support',['Pack with Device Support',['../createPack_DFP.html',1,'']]],
-  ['pack_20with_20board_20support',['Pack with Board Support',['../createPackBoard.html',1,'']]],
-  ['publish_20a_20pack',['Publish a Pack',['../createPackPublish.html',1,'']]],
-  ['pack_20example',['Pack Example',['../pack_Example.html',1,'']]],
-  ['packchk_2eexe',['packChk.exe',['../packChk.html',1,'createPackUtil']]],
-  ['pack_20description_20_28_2a_2epdsc_29_20format',['Pack Description (*.pdsc) Format',['../packFormat.html',1,'']]]
+  ['overview',['Overview',['../cp_Packs.html',1,'']]]
 ];
diff --git a/docs/Pack/html/search/all_5.js b/docs/Pack/html/search/all_5.js
index 3e18830..a7d98d6 100644
--- a/docs/Pack/html/search/all_5.js
+++ b/docs/Pack/html/search/all_5.js
@@ -1,4 +1,11 @@
 var searchData=
 [
-  ['revision_20history_20of_20cmsis_2dpack',['Revision History of CMSIS-Pack',['../pack_revisionHistory.html',1,'index']]]
+  ['pack_20with_20software_20components',['Pack with Software Components',['../cp_SWComponents.html',1,'']]],
+  ['project_20description_20_28_2a_2ecpdsc_29_20format',['Project Description (*.cpdsc) Format',['../cpdsc_pg.html',1,'']]],
+  ['pack_20with_20device_20support',['Pack with Device Support',['../createPack_DFP.html',1,'']]],
+  ['pack_20with_20board_20support',['Pack with Board Support',['../createPackBoard.html',1,'']]],
+  ['publish_20a_20pack',['Publish a Pack',['../createPackPublish.html',1,'']]],
+  ['pack_20example',['Pack Example',['../pack_Example.html',1,'']]],
+  ['packchk_2eexe',['packChk.exe',['../packChk.html',1,'createPackUtil']]],
+  ['pack_20description_20_28_2a_2epdsc_29_20format',['Pack Description (*.pdsc) Format',['../packFormat.html',1,'']]]
 ];
diff --git a/docs/Pack/html/search/all_6.js b/docs/Pack/html/search/all_6.js
index 14fed29..3e18830 100644
--- a/docs/Pack/html/search/all_6.js
+++ b/docs/Pack/html/search/all_6.js
@@ -1,5 +1,4 @@
 var searchData=
 [
-  ['software_20packs_20overview',['Software Packs Overview',['../cp_Packs.html',1,'']]],
-  ['system_20description_20file_20_28_2a_2esdf_29_20format',['System Description File (*.SDF) Format',['../sdf_pg.html',1,'']]]
+  ['revision_20history_20of_20cmsis_2dpack',['Revision History of CMSIS-Pack',['../pack_revisionHistory.html',1,'index']]]
 ];
diff --git a/docs/Pack/html/search/all_7.js b/docs/Pack/html/search/all_7.js
index dd07669..a34ea53 100644
--- a/docs/Pack/html/search/all_7.js
+++ b/docs/Pack/html/search/all_7.js
@@ -1,4 +1,4 @@
 var searchData=
 [
-  ['utilities_20for_20creating_20packs',['Utilities for Creating Packs',['../createPackUtil.html',1,'']]]
+  ['system_20description_20file_20_28_2a_2esdf_29_20format',['System Description File (*.SDF) Format',['../sdf_pg.html',1,'']]]
 ];
diff --git a/docs/Pack/html/search/all_8.js b/docs/Pack/html/search/all_8.js
index 4bda4c3..dd07669 100644
--- a/docs/Pack/html/search/all_8.js
+++ b/docs/Pack/html/search/all_8.js
@@ -1,4 +1,4 @@
 var searchData=
 [
-  ['xml_20editors',['XML Editors',['../cp_Editors.html',1,'createPackUtil']]]
+  ['utilities_20for_20creating_20packs',['Utilities for Creating Packs',['../createPackUtil.html',1,'']]]
 ];
diff --git a/docs/Pack/html/search/all_9.js b/docs/Pack/html/search/all_9.js
index 01cd4b4..4bda4c3 100644
--- a/docs/Pack/html/search/all_9.js
+++ b/docs/Pack/html/search/all_9.js
@@ -1,4 +1,4 @@
 var searchData=
 [
-  ['zip_20compression_20tools',['ZIP Compression Tools',['../cp_ZIPTool.html',1,'createPackUtil']]]
+  ['xml_20editors',['XML Editors',['../cp_Editors.html',1,'createPackUtil']]]
 ];
diff --git a/docs/Pack/html/search/all_a.html b/docs/Pack/html/search/all_a.html
new file mode 100644
index 0000000..eab6553
--- /dev/null
+++ b/docs/Pack/html/search/all_a.html
@@ -0,0 +1,26 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html><head><title></title>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta name="generator" content="Doxygen 1.8.6">
+<link rel="stylesheet" type="text/css" href="search.css"/>
+<script type="text/javascript" src="all_a.js"></script>
+<script type="text/javascript" src="search.js"></script>
+</head>
+<body class="SRPage">
+<div id="SRIndex">
+<div class="SRStatus" id="Loading">Loading...</div>
+<div id="SRResults"></div>
+<script type="text/javascript"><!--
+createResults();
+--></script>
+<div class="SRStatus" id="Searching">Searching...</div>
+<div class="SRStatus" id="NoMatches">No Matches</div>
+<script type="text/javascript"><!--
+document.getElementById("Loading").style.display="none";
+document.getElementById("NoMatches").style.display="none";
+var searchResults = new SearchResults("searchResults");
+searchResults.Search();
+--></script>
+</div>
+</body>
+</html>
diff --git a/docs/Pack/html/search/all_a.js b/docs/Pack/html/search/all_a.js
new file mode 100644
index 0000000..01cd4b4
--- /dev/null
+++ b/docs/Pack/html/search/all_a.js
@@ -0,0 +1,4 @@
+var searchData=
+[
+  ['zip_20compression_20tools',['ZIP Compression Tools',['../cp_ZIPTool.html',1,'createPackUtil']]]
+];
diff --git a/docs/Pack/html/search/pages_4.js b/docs/Pack/html/search/pages_4.js
index a7d98d6..3905264 100644
--- a/docs/Pack/html/search/pages_4.js
+++ b/docs/Pack/html/search/pages_4.js
@@ -1,11 +1,4 @@
 var searchData=
 [
-  ['pack_20with_20software_20components',['Pack with Software Components',['../cp_SWComponents.html',1,'']]],
-  ['project_20description_20_28_2a_2ecpdsc_29_20format',['Project Description (*.cpdsc) Format',['../cpdsc_pg.html',1,'']]],
-  ['pack_20with_20device_20support',['Pack with Device Support',['../createPack_DFP.html',1,'']]],
-  ['pack_20with_20board_20support',['Pack with Board Support',['../createPackBoard.html',1,'']]],
-  ['publish_20a_20pack',['Publish a Pack',['../createPackPublish.html',1,'']]],
-  ['pack_20example',['Pack Example',['../pack_Example.html',1,'']]],
-  ['packchk_2eexe',['packChk.exe',['../packChk.html',1,'createPackUtil']]],
-  ['pack_20description_20_28_2a_2epdsc_29_20format',['Pack Description (*.pdsc) Format',['../packFormat.html',1,'']]]
+  ['overview',['Overview',['../cp_Packs.html',1,'']]]
 ];
diff --git a/docs/Pack/html/search/pages_5.js b/docs/Pack/html/search/pages_5.js
index 3e18830..a7d98d6 100644
--- a/docs/Pack/html/search/pages_5.js
+++ b/docs/Pack/html/search/pages_5.js
@@ -1,4 +1,11 @@
 var searchData=
 [
-  ['revision_20history_20of_20cmsis_2dpack',['Revision History of CMSIS-Pack',['../pack_revisionHistory.html',1,'index']]]
+  ['pack_20with_20software_20components',['Pack with Software Components',['../cp_SWComponents.html',1,'']]],
+  ['project_20description_20_28_2a_2ecpdsc_29_20format',['Project Description (*.cpdsc) Format',['../cpdsc_pg.html',1,'']]],
+  ['pack_20with_20device_20support',['Pack with Device Support',['../createPack_DFP.html',1,'']]],
+  ['pack_20with_20board_20support',['Pack with Board Support',['../createPackBoard.html',1,'']]],
+  ['publish_20a_20pack',['Publish a Pack',['../createPackPublish.html',1,'']]],
+  ['pack_20example',['Pack Example',['../pack_Example.html',1,'']]],
+  ['packchk_2eexe',['packChk.exe',['../packChk.html',1,'createPackUtil']]],
+  ['pack_20description_20_28_2a_2epdsc_29_20format',['Pack Description (*.pdsc) Format',['../packFormat.html',1,'']]]
 ];
diff --git a/docs/Pack/html/search/pages_6.js b/docs/Pack/html/search/pages_6.js
index 14fed29..3e18830 100644
--- a/docs/Pack/html/search/pages_6.js
+++ b/docs/Pack/html/search/pages_6.js
@@ -1,5 +1,4 @@
 var searchData=
 [
-  ['software_20packs_20overview',['Software Packs Overview',['../cp_Packs.html',1,'']]],
-  ['system_20description_20file_20_28_2a_2esdf_29_20format',['System Description File (*.SDF) Format',['../sdf_pg.html',1,'']]]
+  ['revision_20history_20of_20cmsis_2dpack',['Revision History of CMSIS-Pack',['../pack_revisionHistory.html',1,'index']]]
 ];
diff --git a/docs/Pack/html/search/pages_7.js b/docs/Pack/html/search/pages_7.js
index dd07669..a34ea53 100644
--- a/docs/Pack/html/search/pages_7.js
+++ b/docs/Pack/html/search/pages_7.js
@@ -1,4 +1,4 @@
 var searchData=
 [
-  ['utilities_20for_20creating_20packs',['Utilities for Creating Packs',['../createPackUtil.html',1,'']]]
+  ['system_20description_20file_20_28_2a_2esdf_29_20format',['System Description File (*.SDF) Format',['../sdf_pg.html',1,'']]]
 ];
diff --git a/docs/Pack/html/search/pages_8.js b/docs/Pack/html/search/pages_8.js
index 4bda4c3..dd07669 100644
--- a/docs/Pack/html/search/pages_8.js
+++ b/docs/Pack/html/search/pages_8.js
@@ -1,4 +1,4 @@
 var searchData=
 [
-  ['xml_20editors',['XML Editors',['../cp_Editors.html',1,'createPackUtil']]]
+  ['utilities_20for_20creating_20packs',['Utilities for Creating Packs',['../createPackUtil.html',1,'']]]
 ];
diff --git a/docs/Pack/html/search/pages_9.js b/docs/Pack/html/search/pages_9.js
index 01cd4b4..4bda4c3 100644
--- a/docs/Pack/html/search/pages_9.js
+++ b/docs/Pack/html/search/pages_9.js
@@ -1,4 +1,4 @@
 var searchData=
 [
-  ['zip_20compression_20tools',['ZIP Compression Tools',['../cp_ZIPTool.html',1,'createPackUtil']]]
+  ['xml_20editors',['XML Editors',['../cp_Editors.html',1,'createPackUtil']]]
 ];
diff --git a/docs/Pack/html/search/pages_a.html b/docs/Pack/html/search/pages_a.html
new file mode 100644
index 0000000..1c097e5
--- /dev/null
+++ b/docs/Pack/html/search/pages_a.html
@@ -0,0 +1,26 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html><head><title></title>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta name="generator" content="Doxygen 1.8.6">
+<link rel="stylesheet" type="text/css" href="search.css"/>
+<script type="text/javascript" src="pages_a.js"></script>
+<script type="text/javascript" src="search.js"></script>
+</head>
+<body class="SRPage">
+<div id="SRIndex">
+<div class="SRStatus" id="Loading">Loading...</div>
+<div id="SRResults"></div>
+<script type="text/javascript"><!--
+createResults();
+--></script>
+<div class="SRStatus" id="Searching">Searching...</div>
+<div class="SRStatus" id="NoMatches">No Matches</div>
+<script type="text/javascript"><!--
+document.getElementById("Loading").style.display="none";
+document.getElementById("NoMatches").style.display="none";
+var searchResults = new SearchResults("searchResults");
+searchResults.Search();
+--></script>
+</div>
+</body>
+</html>
diff --git a/docs/Pack/html/search/pages_a.js b/docs/Pack/html/search/pages_a.js
new file mode 100644
index 0000000..01cd4b4
--- /dev/null
+++ b/docs/Pack/html/search/pages_a.js
@@ -0,0 +1,4 @@
+var searchData=
+[
+  ['zip_20compression_20tools',['ZIP Compression Tools',['../cp_ZIPTool.html',1,'createPackUtil']]]
+];
diff --git a/docs/Pack/html/search/search.css b/docs/Pack/html/search/search.css
index 1746d13..4d7612f 100644
--- a/docs/Pack/html/search/search.css
+++ b/docs/Pack/html/search/search.css
@@ -4,22 +4,16 @@
     float: left;
 }
 
-#searchli {
-    float: right;
-    display: block;
-    width: 170px;
-    height: 24px;
-}
-
 #MSearchBox {
     white-space : nowrap;
     position: absolute;
     float: none;
     display: inline;
-    margin-top: 3px;
+    margin-top: 8px;
     right: 0px;
     width: 170px;
     z-index: 102;
+    background-color: white;
 }
 
 #MSearchBox .left
@@ -54,7 +48,7 @@
     height:19px;
     background:url('search_m.png') repeat-x;
     border:none;
-    width:116px;
+    width:111px;
     margin-left:20px;
     padding-left:4px;
     color: #909090;
@@ -224,6 +218,10 @@
     text-decoration: underline;
 }
 
+span.SRScope {
+    padding-left: 4px;
+}
+
 .SRPage .SRStatus {
     padding: 2px 5px;
     font-size: 8pt;
@@ -238,3 +236,36 @@
     margin-left: 10px;
     margin-right: 10px;
 }
+
+/*---------------- External search page results */
+
+.searchresult {
+    background-color: #F0F3F8;
+}
+
+.pages b {
+   color: white;
+   padding: 5px 5px 3px 5px;
+   background-image: url("../tab_a.png");
+   background-repeat: repeat-x;
+   text-shadow: 0 1px 1px #000000;
+}
+
+.pages {
+    line-height: 17px;
+    margin-left: 4px;
+    text-decoration: none;
+}
+
+.hl {
+    font-weight: bold;
+}
+
+#searchresults {
+    margin-bottom: 20px;
+}
+
+.searchpages {
+    margin-top: 10px;
+}
+
diff --git a/docs/Pack/html/search/search.js b/docs/Pack/html/search/search.js
index 2fe3a78..a2a2009 100644
--- a/docs/Pack/html/search/search.js
+++ b/docs/Pack/html/search/search.js
@@ -7,8 +7,8 @@
 
 var indexSectionsWithContent =
 {
-  0: "acdfprsuxz",
-  1: "acdfprsuxz"
+  0: "acdfoprsuxz",
+  1: "acdfoprsuxz"
 };
 
 var indexSectionNames =
diff --git a/docs/Pack/html/software_component.png b/docs/Pack/html/software_component.png
new file mode 100644
index 0000000..f20ac78
--- /dev/null
+++ b/docs/Pack/html/software_component.png
Binary files differ
diff --git a/docs/RTOS/html/RTX__Conf__CM_8c.html b/docs/RTOS/html/RTX__Conf__CM_8c.html
index 5481dd1..e16a443 100644
--- a/docs/RTOS/html/RTX__Conf__CM_8c.html
+++ b/docs/RTOS/html/RTX__Conf__CM_8c.html
@@ -487,7 +487,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_67baed4ff719a838d401a6dc7774cf41.html">RTOS</a></li><li class="navelem"><a class="el" href="dir_8ecbca576638d6cf096e42200a0f53dc.html">RTX</a></li><li class="navelem"><a class="el" href="dir_899ec648bfef5b77e4c17b1ad40af9f5.html">Templates</a></li><li class="navelem"><a class="el" href="RTX__Conf__CM_8c.html">RTX_Conf_CM.c</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:01 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/annotated.html b/docs/RTOS/html/annotated.html
index 7b447e9..65a48a6 100644
--- a/docs/RTOS/html/annotated.html
+++ b/docs/RTOS/html/annotated.html
@@ -138,7 +138,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/classes.html b/docs/RTOS/html/classes.html
index 991a434..0050940 100644
--- a/docs/RTOS/html/classes.html
+++ b/docs/RTOS/html/classes.html
@@ -132,7 +132,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/cmsis.css b/docs/RTOS/html/cmsis.css
index bba1010..586d4d2 100644
--- a/docs/RTOS/html/cmsis.css
+++ b/docs/RTOS/html/cmsis.css
@@ -1148,7 +1148,7 @@
 
 .image
 {
-        text-align: center;
+        text-align: left;
 }
 
 .dotgraph
diff --git a/docs/RTOS/html/cmsis__os_8h.html b/docs/RTOS/html/cmsis__os_8h.html
index 2641239..6a74369 100644
--- a/docs/RTOS/html/cmsis__os_8h.html
+++ b/docs/RTOS/html/cmsis__os_8h.html
@@ -883,7 +883,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_67baed4ff719a838d401a6dc7774cf41.html">RTOS</a></li><li class="navelem"><a class="el" href="dir_9afdeffb8e409a4e0df5c5bf9ab1a7d2.html">Template</a></li><li class="navelem"><a class="el" href="cmsis__os_8h.html">cmsis_os.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:01 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/cmsis__os_8txt.html b/docs/RTOS/html/cmsis__os_8txt.html
index f8c28d5..1240d30 100644
--- a/docs/RTOS/html/cmsis__os_8txt.html
+++ b/docs/RTOS/html/cmsis__os_8txt.html
@@ -163,7 +163,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="cmsis__os_8txt.html">cmsis_os.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:01 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/cmsis__os__rtx__extensions_8h.html b/docs/RTOS/html/cmsis__os__rtx__extensions_8h.html
index bdf1824..a133f2d 100644
--- a/docs/RTOS/html/cmsis__os__rtx__extensions_8h.html
+++ b/docs/RTOS/html/cmsis__os__rtx__extensions_8h.html
@@ -135,7 +135,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_b0448b4e45a55bca3a46fdbabd848ed7.html">src</a></li><li class="navelem"><a class="el" href="dir_c0ad159d7acfc6a66622c7bec0ee8a21.html">RTX</a></li><li class="navelem"><a class="el" href="cmsis__os__rtx__extensions_8h.html">cmsis_os_rtx_extensions.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:01 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/configure.html b/docs/RTOS/html/configure.html
index 2e2d556..63345a9 100644
--- a/docs/RTOS/html/configure.html
+++ b/docs/RTOS/html/configure.html
@@ -134,7 +134,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li><li class="navelem"><a class="el" href="rtxImplementation.html">RTX Implementation</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/creating_RTX_LIB.html b/docs/RTOS/html/creating_RTX_LIB.html
index c54c90e..ef85684 100644
--- a/docs/RTOS/html/creating_RTX_LIB.html
+++ b/docs/RTOS/html/creating_RTX_LIB.html
@@ -130,7 +130,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li><li class="navelem"><a class="el" href="rtxImplementation.html">RTX Implementation</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/dir_67baed4ff719a838d401a6dc7774cf41.html b/docs/RTOS/html/dir_67baed4ff719a838d401a6dc7774cf41.html
index a604885..c9e9328 100644
--- a/docs/RTOS/html/dir_67baed4ff719a838d401a6dc7774cf41.html
+++ b/docs/RTOS/html/dir_67baed4ff719a838d401a6dc7774cf41.html
@@ -125,7 +125,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_67baed4ff719a838d401a6dc7774cf41.html">RTOS</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/dir_899ec648bfef5b77e4c17b1ad40af9f5.html b/docs/RTOS/html/dir_899ec648bfef5b77e4c17b1ad40af9f5.html
index e877b29..0031ac5 100644
--- a/docs/RTOS/html/dir_899ec648bfef5b77e4c17b1ad40af9f5.html
+++ b/docs/RTOS/html/dir_899ec648bfef5b77e4c17b1ad40af9f5.html
@@ -123,7 +123,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_67baed4ff719a838d401a6dc7774cf41.html">RTOS</a></li><li class="navelem"><a class="el" href="dir_8ecbca576638d6cf096e42200a0f53dc.html">RTX</a></li><li class="navelem"><a class="el" href="dir_899ec648bfef5b77e4c17b1ad40af9f5.html">Templates</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/dir_8ecbca576638d6cf096e42200a0f53dc.html b/docs/RTOS/html/dir_8ecbca576638d6cf096e42200a0f53dc.html
index 42263ce..e41c05c 100644
--- a/docs/RTOS/html/dir_8ecbca576638d6cf096e42200a0f53dc.html
+++ b/docs/RTOS/html/dir_8ecbca576638d6cf096e42200a0f53dc.html
@@ -123,7 +123,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_67baed4ff719a838d401a6dc7774cf41.html">RTOS</a></li><li class="navelem"><a class="el" href="dir_8ecbca576638d6cf096e42200a0f53dc.html">RTX</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/dir_9afdeffb8e409a4e0df5c5bf9ab1a7d2.html b/docs/RTOS/html/dir_9afdeffb8e409a4e0df5c5bf9ab1a7d2.html
index 1019110..5f7c2c6 100644
--- a/docs/RTOS/html/dir_9afdeffb8e409a4e0df5c5bf9ab1a7d2.html
+++ b/docs/RTOS/html/dir_9afdeffb8e409a4e0df5c5bf9ab1a7d2.html
@@ -123,7 +123,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_67baed4ff719a838d401a6dc7774cf41.html">RTOS</a></li><li class="navelem"><a class="el" href="dir_9afdeffb8e409a4e0df5c5bf9ab1a7d2.html">Template</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/dir_b0448b4e45a55bca3a46fdbabd848ed7.html b/docs/RTOS/html/dir_b0448b4e45a55bca3a46fdbabd848ed7.html
index aaf24e7..97b6455 100644
--- a/docs/RTOS/html/dir_b0448b4e45a55bca3a46fdbabd848ed7.html
+++ b/docs/RTOS/html/dir_b0448b4e45a55bca3a46fdbabd848ed7.html
@@ -123,7 +123,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_b0448b4e45a55bca3a46fdbabd848ed7.html">src</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/dir_c0ad159d7acfc6a66622c7bec0ee8a21.html b/docs/RTOS/html/dir_c0ad159d7acfc6a66622c7bec0ee8a21.html
index 85b3ec5..b8a3b08 100644
--- a/docs/RTOS/html/dir_c0ad159d7acfc6a66622c7bec0ee8a21.html
+++ b/docs/RTOS/html/dir_c0ad159d7acfc6a66622c7bec0ee8a21.html
@@ -123,7 +123,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_b0448b4e45a55bca3a46fdbabd848ed7.html">src</a></li><li class="navelem"><a class="el" href="dir_c0ad159d7acfc6a66622c7bec0ee8a21.html">RTX</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/dirstructfiles.html b/docs/RTOS/html/dirstructfiles.html
index fd51c8c..74187b5 100644
--- a/docs/RTOS/html/dirstructfiles.html
+++ b/docs/RTOS/html/dirstructfiles.html
@@ -484,7 +484,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li><li class="navelem"><a class="el" href="rtxImplementation.html">RTX Implementation</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/exampleRTX_Tutorial.html b/docs/RTOS/html/exampleRTX_Tutorial.html
index 6da8b92..2c1ae52 100644
--- a/docs/RTOS/html/exampleRTX_Tutorial.html
+++ b/docs/RTOS/html/exampleRTX_Tutorial.html
@@ -119,7 +119,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li><li class="navelem"><a class="el" href="rtxImplementation.html">RTX Implementation</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/files.html b/docs/RTOS/html/files.html
index 106fef9..18a2c94 100644
--- a/docs/RTOS/html/files.html
+++ b/docs/RTOS/html/files.html
@@ -123,7 +123,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/functionOverview.html b/docs/RTOS/html/functionOverview.html
index fb4f485..650f07f 100644
--- a/docs/RTOS/html/functionOverview.html
+++ b/docs/RTOS/html/functionOverview.html
@@ -225,7 +225,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/functions.html b/docs/RTOS/html/functions.html
index d802f01..ec59b82 100644
--- a/docs/RTOS/html/functions.html
+++ b/docs/RTOS/html/functions.html
@@ -172,7 +172,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/functions_vars.html b/docs/RTOS/html/functions_vars.html
index 3bc4a26..f4ece38 100644
--- a/docs/RTOS/html/functions_vars.html
+++ b/docs/RTOS/html/functions_vars.html
@@ -172,7 +172,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/genRTOSIF.html b/docs/RTOS/html/genRTOSIF.html
index be4fa94..49e7e2c 100644
--- a/docs/RTOS/html/genRTOSIF.html
+++ b/docs/RTOS/html/genRTOSIF.html
@@ -163,7 +163,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/globals.html b/docs/RTOS/html/globals.html
index d272808..5211458 100644
--- a/docs/RTOS/html/globals.html
+++ b/docs/RTOS/html/globals.html
@@ -551,7 +551,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/globals_defs.html b/docs/RTOS/html/globals_defs.html
index 495788a..169ed53 100644
--- a/docs/RTOS/html/globals_defs.html
+++ b/docs/RTOS/html/globals_defs.html
@@ -284,7 +284,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/globals_enum.html b/docs/RTOS/html/globals_enum.html
index d124fa3..ff91a0e 100644
--- a/docs/RTOS/html/globals_enum.html
+++ b/docs/RTOS/html/globals_enum.html
@@ -135,7 +135,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/globals_eval.html b/docs/RTOS/html/globals_eval.html
index 2db2328..8a5ceb7 100644
--- a/docs/RTOS/html/globals_eval.html
+++ b/docs/RTOS/html/globals_eval.html
@@ -199,7 +199,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/globals_func.html b/docs/RTOS/html/globals_func.html
index 65a88be..2e5d3e7 100644
--- a/docs/RTOS/html/globals_func.html
+++ b/docs/RTOS/html/globals_func.html
@@ -285,7 +285,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/globals_type.html b/docs/RTOS/html/globals_type.html
index b724ae8..8b869d9 100644
--- a/docs/RTOS/html/globals_type.html
+++ b/docs/RTOS/html/globals_type.html
@@ -151,7 +151,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/group__CMSIS__RTOS.html b/docs/RTOS/html/group__CMSIS__RTOS.html
index 0e9a6f4..9fe19ee 100644
--- a/docs/RTOS/html/group__CMSIS__RTOS.html
+++ b/docs/RTOS/html/group__CMSIS__RTOS.html
@@ -148,7 +148,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/group__CMSIS__RTOS__Definitions.html b/docs/RTOS/html/group__CMSIS__RTOS__Definitions.html
index c5281f9..fbf4426 100644
--- a/docs/RTOS/html/group__CMSIS__RTOS__Definitions.html
+++ b/docs/RTOS/html/group__CMSIS__RTOS__Definitions.html
@@ -245,7 +245,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/group__CMSIS__RTOS__InterThread.html b/docs/RTOS/html/group__CMSIS__RTOS__InterThread.html
index a7c21d1..08d99fd 100644
--- a/docs/RTOS/html/group__CMSIS__RTOS__InterThread.html
+++ b/docs/RTOS/html/group__CMSIS__RTOS__InterThread.html
@@ -159,7 +159,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/group__CMSIS__RTOS__KernelCtrl.html b/docs/RTOS/html/group__CMSIS__RTOS__KernelCtrl.html
index 482b0b4..660b0aa 100644
--- a/docs/RTOS/html/group__CMSIS__RTOS__KernelCtrl.html
+++ b/docs/RTOS/html/group__CMSIS__RTOS__KernelCtrl.html
@@ -457,7 +457,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/group__CMSIS__RTOS__Mail.html b/docs/RTOS/html/group__CMSIS__RTOS__Mail.html
index e744ff6..af88e05 100644
--- a/docs/RTOS/html/group__CMSIS__RTOS__Mail.html
+++ b/docs/RTOS/html/group__CMSIS__RTOS__Mail.html
@@ -622,7 +622,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/group__CMSIS__RTOS__Message.html b/docs/RTOS/html/group__CMSIS__RTOS__Message.html
index 083aeae..fa61baf 100644
--- a/docs/RTOS/html/group__CMSIS__RTOS__Message.html
+++ b/docs/RTOS/html/group__CMSIS__RTOS__Message.html
@@ -477,7 +477,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/group__CMSIS__RTOS__MutexMgmt.html b/docs/RTOS/html/group__CMSIS__RTOS__MutexMgmt.html
index ad64a6a..d52188f 100644
--- a/docs/RTOS/html/group__CMSIS__RTOS__MutexMgmt.html
+++ b/docs/RTOS/html/group__CMSIS__RTOS__MutexMgmt.html
@@ -432,7 +432,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/group__CMSIS__RTOS__PoolMgmt.html b/docs/RTOS/html/group__CMSIS__RTOS__PoolMgmt.html
index 91e0af7..1801c31 100644
--- a/docs/RTOS/html/group__CMSIS__RTOS__PoolMgmt.html
+++ b/docs/RTOS/html/group__CMSIS__RTOS__PoolMgmt.html
@@ -483,7 +483,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/group__CMSIS__RTOS__SemaphoreMgmt.html b/docs/RTOS/html/group__CMSIS__RTOS__SemaphoreMgmt.html
index 7977dcd..845e07a 100644
--- a/docs/RTOS/html/group__CMSIS__RTOS__SemaphoreMgmt.html
+++ b/docs/RTOS/html/group__CMSIS__RTOS__SemaphoreMgmt.html
@@ -451,7 +451,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/group__CMSIS__RTOS__SignalMgmt.html b/docs/RTOS/html/group__CMSIS__RTOS__SignalMgmt.html
index e8797f4..2fab752 100644
--- a/docs/RTOS/html/group__CMSIS__RTOS__SignalMgmt.html
+++ b/docs/RTOS/html/group__CMSIS__RTOS__SignalMgmt.html
@@ -364,7 +364,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/group__CMSIS__RTOS__Status.html b/docs/RTOS/html/group__CMSIS__RTOS__Status.html
index 49b4213..59806de 100644
--- a/docs/RTOS/html/group__CMSIS__RTOS__Status.html
+++ b/docs/RTOS/html/group__CMSIS__RTOS__Status.html
@@ -222,7 +222,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/group__CMSIS__RTOS__ThreadMgmt.html b/docs/RTOS/html/group__CMSIS__RTOS__ThreadMgmt.html
index 2f0d2dd..593320e 100644
--- a/docs/RTOS/html/group__CMSIS__RTOS__ThreadMgmt.html
+++ b/docs/RTOS/html/group__CMSIS__RTOS__ThreadMgmt.html
@@ -635,7 +635,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/group__CMSIS__RTOS__TimerMgmt.html b/docs/RTOS/html/group__CMSIS__RTOS__TimerMgmt.html
index 944b5b6..d7991ba 100644
--- a/docs/RTOS/html/group__CMSIS__RTOS__TimerMgmt.html
+++ b/docs/RTOS/html/group__CMSIS__RTOS__TimerMgmt.html
@@ -522,7 +522,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/group__CMSIS__RTOS__Wait.html b/docs/RTOS/html/group__CMSIS__RTOS__Wait.html
index 76a772d..afa3dac 100644
--- a/docs/RTOS/html/group__CMSIS__RTOS__Wait.html
+++ b/docs/RTOS/html/group__CMSIS__RTOS__Wait.html
@@ -281,7 +281,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/group__RTX__Global__Functions.html b/docs/RTOS/html/group__RTX__Global__Functions.html
index 88deadd..ba767da 100644
--- a/docs/RTOS/html/group__RTX__Global__Functions.html
+++ b/docs/RTOS/html/group__RTX__Global__Functions.html
@@ -456,7 +456,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS/html/index.doxyidx b/docs/RTOS/html/index.doxyidx
new file mode 100644
index 0000000..c3c6edb
--- /dev/null
+++ b/docs/RTOS/html/index.doxyidx
@@ -0,0 +1,212 @@
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * @file     index.doxyidx
+ * @brief    Index file for MDK-ARM Help System
+ * @version  1.0
+ * @date     10. July 2019
+ * @note     Generated by DoxyIndex V1.2.3 on Wednesday, 10.07.2019 15:22:29
+ *           from Path 'C:\tools\PACK\ARM\CMSIS\5.6.0\\CMSIS\Documentation\RTOS\html',
+ */
+
+'BCDFGIKMORSTUcdiopqstv'
+Building the RTX Library, creating_RTX_LIB.html, rtxImplementation
+cmsis_os.h, cmsis__os_8h.html, 
+cmsis_os.txt, cmsis__os_8txt.html, 
+cmsis_os_rtx_extensions.h, cmsis__os__rtx__extensions_8h.html, 
+CMSIS-RTOS API, group__CMSIS__RTOS.html, 
+Configure RTX, configure.html, rtxImplementation
+Configuration for Low-Power Modes, lowPower.html, configure
+Create an RTX Project, using.html, rtxImplementation
+def, group__CMSIS__RTOS__Definitions.html#a596b6d55c3321db19239256bbe403df6, osEvent
+Directory Structure and File Overview, dirstructfiles.html, rtxImplementation
+dummy, cmsis__os_8h.html#a44b7a3baf02bac7ad707e8f2f5eca1ca, osSemaphoreDef_t::dummy()
+Function Overview, functionOverview.html, index
+Generic Data Types and Definitions, group__CMSIS__RTOS__Definitions.html, 
+Generic Wait Functions, group__CMSIS__RTOS__Wait.html, 
+Generic RTOS Interface, genRTOSIF.html, index
+Inter-Thread Communication and Resource Sharing, group__CMSIS__RTOS__InterThread.html, 
+instances, cmsis__os_8h.html#aa4c4115851a098c0b87358ab6c025603, osThreadDef_t
+item_sz, cmsis__os_8h.html#a4c2a0c691de3365c00ecd22d8102811f, osMailQDef_t::item_sz()
+Kernel Information and Control, group__CMSIS__RTOS__KernelCtrl.html, 
+Mail Queue, group__CMSIS__RTOS__Mail.html, 
+Message Queue, group__CMSIS__RTOS__Message.html, 
+Mutexes, group__CMSIS__RTOS__MutexMgmt.html, 
+Memory Pool, group__CMSIS__RTOS__PoolMgmt.html, 
+MISRA-C:2004 Compliance Exceptions, misraCompliance.html, rtxImplementation
+OS_CLOCK, RTX__Conf__CM_8c.html#adff23afdf544a322a38314870f8848b9, RTX_Conf_CM.c
+os_error, group__RTX__Global__Functions.html#ga651ae76b3acf45f80bf0e0487b51d6e6, os_error(uint32_t error_code):&#160;RTX_Conf_CM.c
+OS_ERROR_FIFO_OVF, RTX__Conf__CM_8c.html#a075d54df14c85a6afe32b7f5c99c9c29, RTX_Conf_CM.c
+OS_ERROR_MBX_OVF, RTX__Conf__CM_8c.html#ab715d7d66c341c067ef0a97b55db8a10, RTX_Conf_CM.c
+OS_ERROR_STACK_OVF, RTX__Conf__CM_8c.html#abf8311a7a239ec56c6d725f926ba766d, RTX_Conf_CM.c
+OS_ERROR_TIMER_OVF, RTX__Conf__CM_8c.html#a79d7e388d951f11bd0dabd13f722cea8, RTX_Conf_CM.c
+OS_FIFOSZ, RTX__Conf__CM_8c.html#a93c8e36d441750016f9f72e102f68d66, RTX_Conf_CM.c
+os_idle_demon, group__RTX__Global__Functions.html#gafb4dc4d3dff8343a393726d2860282e4, os_idle_demon(void):&#160;RTX_Conf_CM.c
+os_mailQ, group__CMSIS__RTOS__Definitions.html#structos__mailQ, 
+OS_MAINSTKSIZE, RTX__Conf__CM_8c.html#a95362a96f44d4314f148ae24edd52f7c, RTX_Conf_CM.c
+OS_MUTEXCNT, RTX__Conf__CM_8c.html#ad11cf133eea28b601f9a63cd9af9b786, RTX_Conf_CM.c
+OS_PRIVCNT, RTX__Conf__CM_8c.html#a7cfcbf2c4f9d0a63424a2a48592955b1, RTX_Conf_CM.c
+OS_PRIVSTKSIZE, RTX__Conf__CM_8c.html#a6e0d30986e4ae0df44f449a4b3b0fbec, RTX_Conf_CM.c
+os_pthread, cmsis__os_8h.html#aee631e5ea1b700fc35695cc7bc574cf7, cmsis_os.h
+os_ptimer, cmsis__os_8h.html#aa2d85e49bde9f6951ff3545cd323f065, cmsis_os.h
+os_resume, group__RTX__Global__Functions.html#ga1b85a217d43e6b971ffcf24f8aae1c33, cmsis_os_rtx_extensions.h
+OS_ROBIN, RTX__Conf__CM_8c.html#ae34f3058383d9fa9280bbf595618ab0a, RTX_Conf_CM.c
+OS_ROBINTOUT, RTX__Conf__CM_8c.html#ad89fdd7232cfba74d400080b6bcc0012, RTX_Conf_CM.c
+OS_RUNPRIV, RTX__Conf__CM_8c.html#a786924d58be54e943a7e73458cebc51b, RTX_Conf_CM.c
+os_status_reserved, group__CMSIS__RTOS__Status.html#gae2e091fefc4c767117727bd5aba4d99eac7a77f5fe18a15a357790c36a4aca1b1, cmsis_os.h
+OS_STKCHECK, RTX__Conf__CM_8c.html#a6ef9e00396f881f0fa9ac877150e5962, RTX_Conf_CM.c
+OS_STKINIT, RTX__Conf__CM_8c.html#ac820623da739e4219ee86f15bdcd9752, RTX_Conf_CM.c
+OS_STKSIZE, RTX__Conf__CM_8c.html#a16495c133349f3e7c27ac933857c1a8c, RTX_Conf_CM.c
+os_suspend, group__RTX__Global__Functions.html#ga3e9c57746ccbdfe90464ad50513c569e, cmsis_os_rtx_extensions.h
+OS_TASKCNT, RTX__Conf__CM_8c.html#a309353d912327b7f4a2300711ee1b349, RTX_Conf_CM.c
+OS_TICK, RTX__Conf__CM_8c.html#ab6b10bd6d60e95ab28c775757f6bfbcc, RTX_Conf_CM.c
+os_tick_init, group__RTX__Global__Functions.html#ga145e7eafdd042bb522020cbb3b469d9c, RTX_Conf_CM.c
+os_tick_irqack, group__RTX__Global__Functions.html#ga85dab8408f27236c7341a69feb6258c7, RTX_Conf_CM.c
+os_tick_ovf, group__RTX__Global__Functions.html#gad5deddec3fea0fb31798f571afc3c692, RTX_Conf_CM.c
+os_tick_val, group__RTX__Global__Functions.html#ga567543bf38239a91f09751686c23017b, RTX_Conf_CM.c
+os_timer_type, cmsis__os_8h.html#adac860eb9e1b4b0619271e6595ed83d9, os_timer_type():&#160;cmsis_os.h
+OS_TIMERCBQS, RTX__Conf__CM_8c.html#a29701cff84a42494279367ad018f252d, RTX_Conf_CM.c
+OS_TIMERPRIO, RTX__Conf__CM_8c.html#a90af874f1df4dfb0f8821cc2d860dae6, RTX_Conf_CM.c
+OS_TIMERS, RTX__Conf__CM_8c.html#a23b0f1095632e58b5ac0d8f7dcfdfded, RTX_Conf_CM.c
+OS_TIMERSTKSZ, RTX__Conf__CM_8c.html#a76d1b01799981a753fc528e600015627, RTX_Conf_CM.c
+OS_TRV, RTX__Conf__CM_8c.html#a9d55a070ddb219165bd4287f08318d51, RTX_Conf_CM.c
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/RTOS/html/lowPower.html b/docs/RTOS/html/lowPower.html
index 0434c98..2b521d4 100644
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
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diff --git a/docs/RTOS/html/misraCompliance.html b/docs/RTOS/html/misraCompliance.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
 	<!--
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
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diff --git a/docs/RTOS/html/pages.html b/docs/RTOS/html/pages.html
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+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
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diff --git a/docs/RTOS/html/rtosValidation.html b/docs/RTOS/html/rtosValidation.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:43 for CMSIS-RTOS by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:02 for CMSIS-RTOS Version 1.03 by Arm Ltd. All rights reserved.
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/cmsis.css b/docs/RTOS2/html/cmsis.css
index bba1010..586d4d2 100644
--- a/docs/RTOS2/html/cmsis.css
+++ b/docs/RTOS2/html/cmsis.css
@@ -1148,7 +1148,7 @@
 
 .image
 {
-        text-align: center;
+        text-align: left;
 }
 
 .dotgraph
diff --git a/docs/RTOS2/html/cmsis__os2_8h.html b/docs/RTOS2/html/cmsis__os2_8h.html
index 10f6a66..88afe71 100644
--- a/docs/RTOS2/html/cmsis__os2_8h.html
+++ b/docs/RTOS2/html/cmsis__os2_8h.html
@@ -712,7 +712,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_a43355fbfff7212ac2193223a73d577c.html">RTOS2</a></li><li class="navelem"><a class="el" href="dir_f5870d36a7061bb81e1a64a750696f2d.html">Include</a></li><li class="navelem"><a class="el" href="cmsis__os2_8h.html">cmsis_os2.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/cmsis__os2_8txt.html b/docs/RTOS2/html/cmsis__os2_8txt.html
index 62767ca..1bee800 100644
--- a/docs/RTOS2/html/cmsis__os2_8txt.html
+++ b/docs/RTOS2/html/cmsis__os2_8txt.html
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="cmsis__os2_8txt.html">cmsis_os2.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/cmsis__os2__Event_8txt.html b/docs/RTOS2/html/cmsis__os2__Event_8txt.html
index a865790..30c6333 100644
--- a/docs/RTOS2/html/cmsis__os2__Event_8txt.html
+++ b/docs/RTOS2/html/cmsis__os2__Event_8txt.html
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="cmsis__os2__Event_8txt.html">cmsis_os2_Event.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/cmsis__os2__Kernel_8txt.html b/docs/RTOS2/html/cmsis__os2__Kernel_8txt.html
index d380730..f607890 100644
--- a/docs/RTOS2/html/cmsis__os2__Kernel_8txt.html
+++ b/docs/RTOS2/html/cmsis__os2__Kernel_8txt.html
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="cmsis__os2__Kernel_8txt.html">cmsis_os2_Kernel.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/cmsis__os2__MemPool_8txt.html b/docs/RTOS2/html/cmsis__os2__MemPool_8txt.html
index d78a1e8..010161a 100644
--- a/docs/RTOS2/html/cmsis__os2__MemPool_8txt.html
+++ b/docs/RTOS2/html/cmsis__os2__MemPool_8txt.html
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="cmsis__os2__MemPool_8txt.html">cmsis_os2_MemPool.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/cmsis__os2__Message_8txt.html b/docs/RTOS2/html/cmsis__os2__Message_8txt.html
index 36e08de..a704470 100644
--- a/docs/RTOS2/html/cmsis__os2__Message_8txt.html
+++ b/docs/RTOS2/html/cmsis__os2__Message_8txt.html
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="cmsis__os2__Message_8txt.html">cmsis_os2_Message.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/cmsis__os2__MigrationGuide_8txt.html b/docs/RTOS2/html/cmsis__os2__MigrationGuide_8txt.html
index 3c444b0..8d11e7f 100644
--- a/docs/RTOS2/html/cmsis__os2__MigrationGuide_8txt.html
+++ b/docs/RTOS2/html/cmsis__os2__MigrationGuide_8txt.html
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="cmsis__os2__MigrationGuide_8txt.html">cmsis_os2_MigrationGuide.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/cmsis__os2__Migration_8txt.html b/docs/RTOS2/html/cmsis__os2__Migration_8txt.html
index dea4d94..6d43fa1 100644
--- a/docs/RTOS2/html/cmsis__os2__Migration_8txt.html
+++ b/docs/RTOS2/html/cmsis__os2__Migration_8txt.html
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="cmsis__os2__Migration_8txt.html">cmsis_os2_Migration.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/cmsis__os2__Mutex_8txt.html b/docs/RTOS2/html/cmsis__os2__Mutex_8txt.html
index 4fce0f5..1cd8ab5 100644
--- a/docs/RTOS2/html/cmsis__os2__Mutex_8txt.html
+++ b/docs/RTOS2/html/cmsis__os2__Mutex_8txt.html
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="cmsis__os2__Mutex_8txt.html">cmsis_os2_Mutex.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/cmsis__os2__Sema_8txt.html b/docs/RTOS2/html/cmsis__os2__Sema_8txt.html
index bb6bf2c..8d35c7c 100644
--- a/docs/RTOS2/html/cmsis__os2__Sema_8txt.html
+++ b/docs/RTOS2/html/cmsis__os2__Sema_8txt.html
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="cmsis__os2__Sema_8txt.html">cmsis_os2_Sema.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/cmsis__os2__Status_8txt.html b/docs/RTOS2/html/cmsis__os2__Status_8txt.html
index 3566c2a..0817ceb 100644
--- a/docs/RTOS2/html/cmsis__os2__Status_8txt.html
+++ b/docs/RTOS2/html/cmsis__os2__Status_8txt.html
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="cmsis__os2__Status_8txt.html">cmsis_os2_Status.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/cmsis__os2__ThreadFlags_8txt.html b/docs/RTOS2/html/cmsis__os2__ThreadFlags_8txt.html
index ae1fbf4..0f10d2e 100644
--- a/docs/RTOS2/html/cmsis__os2__ThreadFlags_8txt.html
+++ b/docs/RTOS2/html/cmsis__os2__ThreadFlags_8txt.html
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="cmsis__os2__ThreadFlags_8txt.html">cmsis_os2_ThreadFlags.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/cmsis__os2__Thread_8txt.html b/docs/RTOS2/html/cmsis__os2__Thread_8txt.html
index 383c001..bf5101c 100644
--- a/docs/RTOS2/html/cmsis__os2__Thread_8txt.html
+++ b/docs/RTOS2/html/cmsis__os2__Thread_8txt.html
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="cmsis__os2__Thread_8txt.html">cmsis_os2_Thread.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/cmsis__os2__Timer_8txt.html b/docs/RTOS2/html/cmsis__os2__Timer_8txt.html
index 1ac965e..471f248 100644
--- a/docs/RTOS2/html/cmsis__os2__Timer_8txt.html
+++ b/docs/RTOS2/html/cmsis__os2__Timer_8txt.html
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="cmsis__os2__Timer_8txt.html">cmsis_os2_Timer.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/cmsis__os2__Wait_8txt.html b/docs/RTOS2/html/cmsis__os2__Wait_8txt.html
index 4666fc5..535cdba 100644
--- a/docs/RTOS2/html/cmsis__os2__Wait_8txt.html
+++ b/docs/RTOS2/html/cmsis__os2__Wait_8txt.html
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="cmsis__os2__Wait_8txt.html">cmsis_os2_Wait.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/cmsis__os2__tick_8txt.html b/docs/RTOS2/html/cmsis__os2__tick_8txt.html
index db6bcc1..a7973ba 100644
--- a/docs/RTOS2/html/cmsis__os2__tick_8txt.html
+++ b/docs/RTOS2/html/cmsis__os2__tick_8txt.html
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="cmsis__os2__tick_8txt.html">cmsis_os2_tick.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/config_rtx5.html b/docs/RTOS2/html/config_rtx5.html
index 4a2340d..64ddfc2 100644
--- a/docs/RTOS2/html/config_rtx5.html
+++ b/docs/RTOS2/html/config_rtx5.html
@@ -388,7 +388,7 @@
 <div class="image">
 <img src="config_wizard_evtrecGlobIni.png" alt="config_wizard_evtrecGlobIni.png"/>
 <div class="caption">
-RTX_Config.h: Initialization and filter setup configuration</div></div>
+RTX_Config.h: Global Configuration</div></div>
 <p> <br/>
 </p>
 <table class="doxtable">
@@ -444,23 +444,27 @@
 <tr>
 <th>Name </th><th>#define </th><th>Description  </th></tr>
 <tr>
-<td>Memory Management </td><td><code>OS_EVR_MEMORY_FILTER</code> </td><td>Filter enable for Memory Management events. </td></tr>
+<td>Memory Management </td><td><code>OS_EVR_MEMORY_LEVEL</code> </td><td>Recording level for Memory Management events. </td></tr>
 <tr>
-<td>Kernel </td><td><code>OS_EVR_KERNEL_FILTER</code> </td><td>Filter enable for Kernel events. </td></tr>
+<td>Kernel </td><td><code>OS_EVR_KERNEL_LEVEL</code> </td><td>Recording level for Kernel events. </td></tr>
 <tr>
-<td>Thread </td><td><code>OS_EVR_THREAD_FILTER</code> </td><td>Filter enable for Thread events. </td></tr>
+<td>Thread </td><td><code>OS_EVR_THREAD_LEVEL</code> </td><td>Recording level for Thread events. </td></tr>
 <tr>
-<td>Timer </td><td><code>OS_EVR_TIMER_FILTER</code> </td><td>Filter enable for Timer events. </td></tr>
+<td>Generic Wait </td><td><code>OS_EVR_WAIT_LEVEL</code> </td><td>Recording level for Generic Wait events. </td></tr>
 <tr>
-<td>Event Flags </td><td><code>OS_EVR_EVFLAGS_FILTER</code> </td><td>Filter enable for Event Flags events. </td></tr>
+<td>Thread Flags </td><td><code>OS_EVR_THFLAGS_LEVEL</code> </td><td>Recording level for Thread Flags events. </td></tr>
 <tr>
-<td>Mutex </td><td><code>OS_EVR_MUTEX_FILTER</code> </td><td>Filter enable for Mutex events. </td></tr>
+<td>Event Flags </td><td><code>OS_EVR_EVFLAGS_LEVEL</code> </td><td>Recording level for Event Flags events. </td></tr>
 <tr>
-<td>Semaphore </td><td><code>OS_EVR_SEMAPHORE_FILTER</code> </td><td>Filter enable for Semaphore events. </td></tr>
+<td>Timer </td><td><code>OS_EVR_TIMER_LEVEL</code> </td><td>Recording level for Timer events. </td></tr>
 <tr>
-<td>Memory Pool </td><td><code>OS_EVR_MEMPOOL_FILTER</code> </td><td>Filter enable for Memory Pool events. </td></tr>
+<td>Mutex </td><td><code>OS_EVR_MUTEX_LEVEL</code> </td><td>Recording level for Mutex events. </td></tr>
 <tr>
-<td>Message Queue </td><td><code>OS_EVR_MSGQUEUE_FILTER</code> </td><td>Filter enable for Message Queue events. </td></tr>
+<td>Semaphore </td><td><code>OS_EVR_SEMAPHORE_LEVEL</code> </td><td>Recording level for Semaphore events. </td></tr>
+<tr>
+<td>Memory Pool </td><td><code>OS_EVR_MEMPOOL_LEVEL</code> </td><td>Recording level for Memory Pool events. </td></tr>
+<tr>
+<td>Message Queue </td><td><code>OS_EVR_MSGQUEUE_LEVEL</code> </td><td>Recording level for Message Queue events. </td></tr>
 </table>
 <h2><a class="anchor" id="evtrecConfigEvtGen"></a>
 RTOS Event Generation</h2>
@@ -475,23 +479,27 @@
 <tr>
 <th>Name </th><th>#define </th><th>Description  </th></tr>
 <tr>
-<td>Memory Management </td><td><code>OS_EVR_MEMORY</code> </td><td>Enables Memory Management events recording. </td></tr>
+<td>Memory Management </td><td><code>OS_EVR_MEMORY</code> </td><td>Enables Memory Management events generation. </td></tr>
 <tr>
-<td>Kernel </td><td><code>OS_EVR_KERNEL</code> </td><td>Enables Kernel events recording. </td></tr>
+<td>Kernel </td><td><code>OS_EVR_KERNEL</code> </td><td>Enables Kernel events generation. </td></tr>
 <tr>
-<td>Thread </td><td><code>OS_EVR_THREAD</code> </td><td>Enables Thread events recording. </td></tr>
+<td>Thread </td><td><code>OS_EVR_THREAD</code> </td><td>Enables Thread events generation. </td></tr>
 <tr>
-<td>Timer </td><td><code>OS_EVR_TIMER</code> </td><td>Enables Timer events recording. </td></tr>
+<td>Generic Wait </td><td><code>OS_EVR_WAIT</code> </td><td>Enables Generic Wait events generation. </td></tr>
 <tr>
-<td>Event Flags </td><td><code>OS_EVR_EVFLAGS</code> </td><td>Enables Event Flags events recording. </td></tr>
+<td>Thread Flags </td><td><code>OS_EVR_THFLAGS</code> </td><td>Enables Thread Flags events generation. </td></tr>
 <tr>
-<td>Mutex </td><td><code>OS_EVR_MUTEX</code> </td><td>Enables Mutex events recording. </td></tr>
+<td>Event Flags </td><td><code>OS_EVR_EVFLAGS</code> </td><td>Enables Event Flags events generation. </td></tr>
 <tr>
-<td>Semaphore </td><td><code>OS_EVR_SEMAPHORE</code> </td><td>Enables Semaphore events recording. </td></tr>
+<td>Timer </td><td><code>OS_EVR_TIMER</code> </td><td>Enables Timer events generation. </td></tr>
 <tr>
-<td>Memory Pool </td><td><code>OS_EVR_MEMPOOL</code> </td><td>Enables Memory Pool events recording. </td></tr>
+<td>Mutex </td><td><code>OS_EVR_MUTEX</code> </td><td>Enables Mutex events generation. </td></tr>
 <tr>
-<td>Message Queue </td><td><code>OS_EVR_MSGQUEUE</code> </td><td>Enables Message Queue events recording. </td></tr>
+<td>Semaphore </td><td><code>OS_EVR_SEMAPHORE</code> </td><td>Enables Semaphore events generation. </td></tr>
+<tr>
+<td>Memory Pool </td><td><code>OS_EVR_MEMPOOL</code> </td><td>Enables Memory Pool events generation. </td></tr>
+<tr>
+<td>Message Queue </td><td><code>OS_EVR_MSGQUEUE</code> </td><td>Enables Message Queue events generation. </td></tr>
 </table>
 <dl class="section note"><dt>Note</dt><dd>If event generation for a component is disabled, the code that generates the related events is not included. Thus, <a class="el" href="config_rtx5.html#evtrecConfigGlobIni">filters</a> for this component will have no effect and the debugger is unable to display any events for the related component group.</dd></dl>
 <h2><a class="anchor" id="systemConfig_event_recording"></a>
@@ -502,15 +510,15 @@
 <p><b>Kernel</b> <b>events</b> <br/>
 <code>EVR_RTX_KERNEL_ERROR_DISABLE</code>, <code>EVR_RTX_KERNEL_INITIALIZE_DISABLE</code>, <code>EVR_RTX_KERNEL_INITIALIZED_DISABLE</code>, <code>EVR_RTX_KERNEL_GET_INFO_DISABLE</code>, <code>EVR_RTX_KERNEL_INFO_RETRIEVED_DISABLE</code>, <code>EVR_RTX_KERNEL_GET_STATE_DISABLE</code>, <code>EVR_RTX_KERNEL_START_DISABLE</code>, <code>EVR_RTX_KERNEL_STARTED_DISABLE</code>, <code>EVR_RTX_KERNEL_LOCK_DISABLE</code>, <code>EVR_RTX_KERNEL_LOCKED_DISABLE</code>, <code>EVR_RTX_KERNEL_UNLOCK_DISABLE</code>, <code>EVR_RTX_KERNEL_UNLOCKED_DISABLE</code>, <code>EVR_RTX_KERNEL_RESTORE_LOCK_DISABLE</code>, <code>EVR_RTX_KERNEL_LOCK_RESTORED_DISABLE</code>, <code>EVR_RTX_KERNEL_SUSPEND_DISABLE</code>, <code>EVR_RTX_KERNEL_SUSPENDED_DISABLE</code>, <code>EVR_RTX_KERNEL_RESUME_DISABLE</code>, <code>EVR_RTX_KERNEL_RESUMED_DISABLE</code>, <code>EVR_RTX_KERNEL_GET_TICK_COUNT_DISABLE</code>, <code>EVR_RTX_KERNEL_GET_TICK_FREQ_DISABLE</code>, <code>EVR_RTX_KERNEL_GET_SYS_TIMER_COUNT_DISABLE</code>, <code>EVR_RTX_KERNEL_GET_SYS_TIMER_FREQ_DISABLE</code> </p>
 <p><b>Thread</b> <b>events</b> <br/>
-<code>EVR_RTX_THREAD_ERROR_DISABLE</code>, <code>EVR_RTX_THREAD_NEW_DISABLE</code>, <code>EVR_RTX_THREAD_CREATED_DISABLE</code>, <code>EVR_RTX_THREAD_GET_NAME_DISABLE</code>, <code>EVR_RTX_THREAD_GET_ID_DISABLE</code>, <code>EVR_RTX_THREAD_GET_STATE_DISABLE</code>, <code>EVR_RTX_THREAD_GET_STACK_SIZE_DISABLE</code>, <code>EVR_RTX_THREAD_GET_STACK_SPACE_DISABLE</code>, <code>EVR_RTX_THREAD_SET_PRIORITY_DISABLE</code>, <code>EVR_RTX_THREAD_GET_PRIORITY_DISABLE</code>, <code>EVR_RTX_THREAD_YIELD_DISABLE</code>, <code>EVR_RTX_THREAD_SUSPEND_DISABLE</code>, <code>EVR_RTX_THREAD_SUSPENDED_DISABLE</code>, <code>EVR_RTX_THREAD_RESUME_DISABLE</code>, <code>EVR_RTX_THREAD_RESUMED_DISABLE</code>, <code>EVR_RTX_THREAD_DETACH_DISABLE</code>, <code>EVR_RTX_THREAD_DETACHED_DISABLE</code>, <code>EVR_RTX_THREAD_JOIN_DISABLE</code>, <code>EVR_RTX_THREAD_JOIN_PENDING_DISABLE</code>, <code>EVR_RTX_THREAD_JOINED_DISABLE</code>, <code>EVR_RTX_THREAD_BLOCKED_DISABLE</code>, <code>EVR_RTX_THREAD_UNBLOCKED_DISABLE</code>, <code>EVR_RTX_THREAD_PREEMPTED_DISABLE</code>, <code>EVR_RTX_THREAD_SWITCHED_DISABLE</code>, <code>EVR_RTX_THREAD_EXIT_DISABLE</code>, <code>EVR_RTX_THREAD_TERMINATE_DISABLE</code>, <code>EVR_RTX_THREAD_DESTROYED_DISABLE</code>, <code>EVR_RTX_THREAD_GET_COUNT_DISABLE</code>, <code>EVR_RTX_THREAD_ENUMERATE_DISABLE</code> </p>
-<p><b>Thread</b> <b>flag</b> <b>events</b> <br/>
-<code>EVR_RTX_THREAD_FLAGS_SET_DISABLE</code>, <code>EVR_RTX_THREAD_FLAGS_SET_DONE_DISABLE</code>, <code>EVR_RTX_THREAD_FLAGS_CLEAR_DISABLE</code>, <code>EVR_RTX_THREAD_FLAGS_CLEAR_DONE_DISABLE</code>, <code>EVR_RTX_THREAD_FLAGS_GET_DISABLE</code>, <code>EVR_RTX_THREAD_FLAGS_WAIT_DISABLE</code>, <code>EVR_RTX_THREAD_FLAGS_WAIT_PENDING_DISABLE</code>, <code>EVR_RTX_THREAD_FLAGS_WAIT_TIMEOUT_DISABLE</code>, <code>EVR_RTX_THREAD_FLAGS_WAIT_COMPLETED_DISABLE</code>, <code>EVR_RTX_THREAD_FLAGS_WAIT_NOT_COMPLETED_DISABLE</code> </p>
+<code>EVR_RTX_THREAD_ERROR_DISABLE</code>, <code>EVR_RTX_THREAD_NEW_DISABLE</code>, <code>EVR_RTX_THREAD_CREATED_DISABLE</code>, <code>EVR_RTX_THREAD_GET_NAME_DISABLE</code>, <code>EVR_RTX_THREAD_GET_ID_DISABLE</code>, <code>EVR_RTX_THREAD_GET_STATE_DISABLE</code>, <code>EVR_RTX_THREAD_GET_STACK_SIZE_DISABLE</code>, <code>EVR_RTX_THREAD_GET_STACK_SPACE_DISABLE</code>, <code>EVR_RTX_THREAD_SET_PRIORITY_DISABLE</code>, <code>EVR_RTX_THREAD_PRIORITY_UPDATED_DISABLE</code>, <code>EVR_RTX_THREAD_GET_PRIORITY_DISABLE</code>, <code>EVR_RTX_THREAD_YIELD_DISABLE</code>, <code>EVR_RTX_THREAD_SUSPEND_DISABLE</code>, <code>EVR_RTX_THREAD_SUSPENDED_DISABLE</code>, <code>EVR_RTX_THREAD_RESUME_DISABLE</code>, <code>EVR_RTX_THREAD_RESUMED_DISABLE</code>, <code>EVR_RTX_THREAD_DETACH_DISABLE</code>, <code>EVR_RTX_THREAD_DETACHED_DISABLE</code>, <code>EVR_RTX_THREAD_JOIN_DISABLE</code>, <code>EVR_RTX_THREAD_JOIN_PENDING_DISABLE</code>, <code>EVR_RTX_THREAD_JOINED_DISABLE</code>, <code>EVR_RTX_THREAD_BLOCKED_DISABLE</code>, <code>EVR_RTX_THREAD_UNBLOCKED_DISABLE</code>, <code>EVR_RTX_THREAD_PREEMPTED_DISABLE</code>, <code>EVR_RTX_THREAD_SWITCHED_DISABLE</code>, <code>EVR_RTX_THREAD_EXIT_DISABLE</code>, <code>EVR_RTX_THREAD_TERMINATE_DISABLE</code>, <code>EVR_RTX_THREAD_DESTROYED_DISABLE</code>, <code>EVR_RTX_THREAD_GET_COUNT_DISABLE</code>, <code>EVR_RTX_THREAD_ENUMERATE_DISABLE</code> </p>
 <p><b>Generic</b> <b>wait</b> <b>events</b> <br/>
-<code>EVR_RTX_THREAD_DELAY_DISABLE</code>, <code>EVR_RTX_THREAD_DELAY_UNTIL_DISABLE</code>, <code>EVR_RTX_THREAD_DELAY_COMPLETED_DISABLE</code> </p>
-<p><b>Timer</b> <b>events</b> <br/>
-<code>EVR_RTX_TIMER_ERROR_DISABLE</code>, <code>EVR_RTX_TIMER_CALLBACK_DISABLE</code>, <code>EVR_RTX_TIMER_NEW_DISABLE</code>, <code>EVR_RTX_TIMER_CREATED_DISABLE</code>, <code>EVR_RTX_TIMER_GET_NAME_DISABLE</code>, <code>EVR_RTX_TIMER_START_DISABLE</code>, <code>EVR_RTX_TIMER_STARTED_DISABLE</code>, <code>EVR_RTX_TIMER_STOP_DISABLE</code>, <code>EVR_RTX_TIMER_STOPPED_DISABLE</code>, <code>EVR_RTX_TIMER_IS_RUNNING_DISABLE</code>, <code>EVR_RTX_TIMER_DELETE_DISABLE</code>, <code>EVR_RTX_TIMER_DESTROYED_DISABLE</code> </p>
+<code>EVR_RTX_DELAY_ERROR_DISABLE</code>, <code>EVR_RTX_DELAY_DISABLE</code>, <code>EVR_RTX_DELAY_UNTIL_DISABLE</code>, <code>EVR_RTX_DELAY_STARTED_DISABLE</code>, <code>EVR_RTX_DELAY_UNTIL_STARTED_DISABLE</code>, <code>EVR_RTX_DELAY_COMPLETED_DISABLE</code> </p>
+<p><b>Thread</b> <b>flag</b> <b>events</b> <br/>
+<code>EVR_RTX_THREAD_FLAGS_ERROR_DISABLE</code>, <code>EVR_RTX_THREAD_FLAGS_SET_DISABLE</code>, <code>EVR_RTX_THREAD_FLAGS_SET_DONE_DISABLE</code>, <code>EVR_RTX_THREAD_FLAGS_CLEAR_DISABLE</code>, <code>EVR_RTX_THREAD_FLAGS_CLEAR_DONE_DISABLE</code>, <code>EVR_RTX_THREAD_FLAGS_GET_DISABLE</code>, <code>EVR_RTX_THREAD_FLAGS_WAIT_DISABLE</code>, <code>EVR_RTX_THREAD_FLAGS_WAIT_PENDING_DISABLE</code>, <code>EVR_RTX_THREAD_FLAGS_WAIT_TIMEOUT_DISABLE</code>, <code>EVR_RTX_THREAD_FLAGS_WAIT_COMPLETED_DISABLE</code>, <code>EVR_RTX_THREAD_FLAGS_WAIT_NOT_COMPLETED_DISABLE</code> </p>
 <p><b>Event</b> <b>flag</b> <b>events</b> <br/>
 <code>EVR_RTX_EVENT_FLAGS_ERROR_DISABLE</code>, <code>EVR_RTX_EVENT_FLAGS_NEW_DISABLE</code>, <code>EVR_RTX_EVENT_FLAGS_CREATED_DISABLE</code>, <code>EVR_RTX_EVENT_FLAGS_GET_NAME_DISABLE</code>, <code>EVR_RTX_EVENT_FLAGS_SET_DISABLE</code>, <code>EVR_RTX_EVENT_FLAGS_SET_DONE_DISABLE</code>, <code>EVR_RTX_EVENT_FLAGS_CLEAR_DISABLE</code>, <code>EVR_RTX_EVENT_FLAGS_CLEAR_DONE_DISABLE</code>, <code>EVR_RTX_EVENT_FLAGS_GET_DISABLE</code>, <code>EVR_RTX_EVENT_FLAGS_WAIT_DISABLE</code>, <code>EVR_RTX_EVENT_FLAGS_WAIT_PENDING_DISABLE</code>, <code>EVR_RTX_EVENT_FLAGS_WAIT_TIMEOUT_DISABLE</code>, <code>EVR_RTX_EVENT_FLAGS_WAIT_COMPLETED_DISABLE</code>, <code>EVR_RTX_EVENT_FLAGS_WAIT_NOT_COMPLETED_DISABLE</code>, <code>EVR_RTX_EVENT_FLAGS_DELETE_DISABLE</code>, <code>EVR_RTX_EVENT_FLAGS_DESTROYED_DISABLE</code> </p>
+<p><b>Timer</b> <b>events</b> <br/>
+<code>EVR_RTX_TIMER_ERROR_DISABLE</code>, <code>EVR_RTX_TIMER_CALLBACK_DISABLE</code>, <code>EVR_RTX_TIMER_NEW_DISABLE</code>, <code>EVR_RTX_TIMER_CREATED_DISABLE</code>, <code>EVR_RTX_TIMER_GET_NAME_DISABLE</code>, <code>EVR_RTX_TIMER_START_DISABLE</code>, <code>EVR_RTX_TIMER_STARTED_DISABLE</code>, <code>EVR_RTX_TIMER_STOP_DISABLE</code>, <code>EVR_RTX_TIMER_STOPPED_DISABLE</code>, <code>EVR_RTX_TIMER_IS_RUNNING_DISABLE</code>, <code>EVR_RTX_TIMER_DELETE_DISABLE</code>, <code>EVR_RTX_TIMER_DESTROYED_DISABLE</code> </p>
 <p><b>Mutex</b> <b>events</b> <br/>
 <code>EVR_RTX_MUTEX_ERROR_DISABLE</code>, <code>EVR_RTX_MUTEX_NEW_DISABLE</code>, <code>EVR_RTX_MUTEX_CREATED_DISABLE</code>, <code>EVR_RTX_MUTEX_GET_NAME_DISABLE</code>, <code>EVR_RTX_MUTEX_ACQUIRE_DISABLE</code>, <code>EVR_RTX_MUTEX_ACQUIRE_PENDING_DISABLE</code>, <code>EVR_RTX_MUTEX_ACQUIRE_TIMEOUT_DISABLE</code>, <code>EVR_RTX_MUTEX_ACQUIRED_DISABLE</code>, <code>EVR_RTX_MUTEX_NOT_ACQUIRED_DISABLE</code>, <code>EVR_RTX_MUTEX_RELEASE_DISABLE</code>, <code>EVR_RTX_MUTEX_RELEASED_DISABLE</code>, <code>EVR_RTX_MUTEX_GET_OWNER_DISABLE</code>, <code>EVR_RTX_MUTEX_DELETE_DISABLE</code>, <code>EVR_RTX_MUTEX_DESTROYED_DISABLE</code> </p>
 <p><b>Semaphore</b> <b>events</b> <br/>
@@ -525,7 +533,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li><li class="navelem"><a class="el" href="rtx5_impl.html">RTX v5 Implementation</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/config_wizard_evtrecGeneration.png b/docs/RTOS2/html/config_wizard_evtrecGeneration.png
index f5bd1d7..f58888a 100644
--- a/docs/RTOS2/html/config_wizard_evtrecGeneration.png
+++ b/docs/RTOS2/html/config_wizard_evtrecGeneration.png
Binary files differ
diff --git a/docs/RTOS2/html/config_wizard_evtrecRTOSEvtFilterSetup.png b/docs/RTOS2/html/config_wizard_evtrecRTOSEvtFilterSetup.png
index dab696f..007ad4c 100644
--- a/docs/RTOS2/html/config_wizard_evtrecRTOSEvtFilterSetup.png
+++ b/docs/RTOS2/html/config_wizard_evtrecRTOSEvtFilterSetup.png
Binary files differ
diff --git a/docs/RTOS2/html/cre_rtx_proj.html b/docs/RTOS2/html/cre_rtx_proj.html
index 97a0115..94d919c 100644
--- a/docs/RTOS2/html/cre_rtx_proj.html
+++ b/docs/RTOS2/html/cre_rtx_proj.html
@@ -125,7 +125,7 @@
 <img src="project_window.png" alt="project_window.png"/>
 </div>
 </li>
-<li>If using the Variant: <b>Source</b> as statet above, you have to assure to use at least C99 compiler mode (Project Options -&gt; C/C++ -&gt; C99 Mode).</li>
+<li>If using the Variant: <b>Source</b> as stated above, you have to assure to use at least C99 compiler mode (Project Options -&gt; C/C++ -&gt; C99 Mode).</li>
 <li><p class="startli">You can add template files to the project by right-clicking on <b>Source Group 1</b> and selecting <b>Add New Item to 'Source Group 1'</b>. In the new window, click on <b>User Code Template</b>. On the right-hand side you will see all available template files for CMSIS-RTOS RTX:</p>
 <div class="image">
 <img src="add_item.png" alt="add_item.png"/>
@@ -157,9 +157,9 @@
 <tr>
 <td align="left">PendSV </td><td align="left">lowest </td><td align="left">PendSV (request for system-level service) when calling certain RTX functions from <b>Handler</b> mode </td></tr>
 <tr>
-<td align="left">SCV </td><td align="left">lowest+1 </td><td align="left">Supervisor Call used to enter the RTOS kernel from <b>Thread</b> mode </td></tr>
+<td align="left">SVC </td><td align="left">lowest+1 </td><td align="left">Supervisor Call used to enter the RTOS kernel from <b>Thread</b> mode </td></tr>
 </table>
-<p>Other device interrupts can be used without limitation. For Arm Cortex-M3/M4/M7/M23/M33 processors, interrupts are never disabled by RTX Kernel.</p>
+<p>Other device interrupts can be used without limitation. For Arm Cortex-M3/M4/M7 /M23/M33/M35P processors, interrupts are never disabled by RTX Kernel.</p>
 <p><b>Usage of interrupt priority grouping</b></p>
 <ul>
 <li>The interrupt priority grouping should be configured using the CMSIS-Core function NVIC_SetPriorityGrouping before calling the function <a class="el" href="group__CMSIS__RTOS__KernelCtrl.html#ga9ae2cc00f0d89d7b6a307bba942b5221">osKernelStart()</a>. The RTX kernel uses the priority group value to setup the priority for SysTick and PendSV interrupts.</li>
@@ -181,22 +181,22 @@
 <p>RTX5 interfaces to the <a href="http://www.keil.com/pack/doc/compiler/EventRecorder/html/index.html" target="_blank"><b>Event Recorder</b></a> to provide event information which helps you to understand and analyze the operation.</p>
 <ul>
 <li>To use the Event Recorder together with RTX5, select the software component <b>Compiler:Event Recorder</b>.</li>
-<li>Select the <b>Source</b> variant of the software component <b>CMSIS:RTOS2 (API):Keil RTX5</b>. <div class="image">
+<li><p class="startli">Select the <b>Source</b> variant of the software component <b>CMSIS:RTOS2 (API):Keil RTX5</b>.</p>
+<div class="image">
 <img src="event_recorder_rte.png" alt="event_recorder_rte.png"/>
 <div class="caption">
 Component selection for Event Recorder</div></div>
 </li>
 <li>Enable the related settings under <a class="el" href="config_rtx5.html#evtrecConfig">Event Recorder Configuration</a>.</li>
-<li>Build the application code and download it to the debug hardware.</li>
+<li>Build the application code and download it to the debug hardware. Once the target application generates event information, it can be viewed in the µVision debugger using the <b>Event</b> <b>Recorder</b>. </li>
 </ul>
-<p>Once the target application generates event information, it can be viewed in the µVision debugger using the <b>Event</b> <b>Recorder</b>. </p>
 </div></div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li><li class="navelem"><a class="el" href="rtx5_impl.html">RTX v5 Implementation</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/creating_RTX5_LIB.html b/docs/RTOS2/html/creating_RTX5_LIB.html
index f1fdc95..44ab589 100644
--- a/docs/RTOS2/html/creating_RTX5_LIB.html
+++ b/docs/RTOS2/html/creating_RTX5_LIB.html
@@ -130,7 +130,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li><li class="navelem"><a class="el" href="rtx5_impl.html">RTX v5 Implementation</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/dir_002cf2dd0f795cc97a8d08cc3fa6e516.html b/docs/RTOS2/html/dir_002cf2dd0f795cc97a8d08cc3fa6e516.html
index 45811c2..6aa8661 100644
--- a/docs/RTOS2/html/dir_002cf2dd0f795cc97a8d08cc3fa6e516.html
+++ b/docs/RTOS2/html/dir_002cf2dd0f795cc97a8d08cc3fa6e516.html
@@ -123,7 +123,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_a43355fbfff7212ac2193223a73d577c.html">RTOS2</a></li><li class="navelem"><a class="el" href="dir_002cf2dd0f795cc97a8d08cc3fa6e516.html">RTX</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/dir_061ad8d12aa7dc7d03c29112cd6e086d.html b/docs/RTOS2/html/dir_061ad8d12aa7dc7d03c29112cd6e086d.html
index 9f9645a..5044c74 100644
--- a/docs/RTOS2/html/dir_061ad8d12aa7dc7d03c29112cd6e086d.html
+++ b/docs/RTOS2/html/dir_061ad8d12aa7dc7d03c29112cd6e086d.html
@@ -125,7 +125,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_a43355fbfff7212ac2193223a73d577c.html">RTOS2</a></li><li class="navelem"><a class="el" href="dir_002cf2dd0f795cc97a8d08cc3fa6e516.html">RTX</a></li><li class="navelem"><a class="el" href="dir_061ad8d12aa7dc7d03c29112cd6e086d.html">Include</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/dir_899d076620cccde5757c1c1ca5de63cc.html b/docs/RTOS2/html/dir_899d076620cccde5757c1c1ca5de63cc.html
deleted file mode 100644
index 9147c80..0000000
--- a/docs/RTOS2/html/dir_899d076620cccde5757c1c1ca5de63cc.html
+++ /dev/null
@@ -1,136 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
-<meta http-equiv="X-UA-Compatible" content="IE=9"/>
-<title>Source Directory Reference</title>
-<title>CMSIS-RTOS2: Source Directory Reference</title>
-<link href="tabs.css" rel="stylesheet" type="text/css"/>
-<link href="cmsis.css" rel="stylesheet" type="text/css" />
-<script type="text/javascript" src="jquery.js"></script>
-<script type="text/javascript" src="dynsections.js"></script>
-<script type="text/javascript" src="printComponentTabs.js"></script>
-<link href="navtree.css" rel="stylesheet" type="text/css"/>
-<script type="text/javascript" src="resize.js"></script>
-<script type="text/javascript" src="navtree.js"></script>
-<script type="text/javascript">
-  $(document).ready(initResizable);
-  $(window).load(resizeHeight);
-</script>
-<link href="search/search.css" rel="stylesheet" type="text/css"/>
-<script type="text/javascript" src="search/search.js"></script>
-<script type="text/javascript">
-  $(document).ready(function() { searchBox.OnSelectItem(0); });
-</script>
-</head>
-<body>
-<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
-<div id="titlearea">
-<table cellspacing="0" cellpadding="0">
- <tbody>
- <tr style="height: 46px;">
-  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
-  <td style="padding-left: 0.5em;">
-   <div id="projectname">CMSIS-RTOS2
-   &#160;<span id="projectnumber">Version 2.1.2</span>
-   </div>
-   <div id="projectbrief">Real-Time Operating System: API and RTX Reference Implementation</div>
-  </td>
- </tr>
- </tbody>
-</table>
-</div>
-<!-- end header part -->
-<div id="CMSISnav" class="tabs1">
-    <ul class="tablist">
-      <script type="text/javascript">
-		<!--
-		writeComponentTabs.call(this);
-		//-->
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-	  </ul>
-</div>
-<!-- Generated by Doxygen 1.8.6 -->
-<script type="text/javascript">
-var searchBox = new SearchBox("searchBox", "search",false,'Search');
-</script>
-  <div id="navrow1" class="tabs">
-    <ul class="tablist">
-      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
-      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
-      <li><a href="modules.html"><span>Reference</span></a></li>
-      <li>
-        <div id="MSearchBox" class="MSearchBoxInactive">
-        <span class="left">
-          <img id="MSearchSelect" src="search/mag_sel.png"
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-<div class="textblock"><p>The following section provides an overview of the directory structure and the files that are relevant for the user's for CMSIS-RTOS RTX v5. The following directory references start below the CMSIS pack installation path, for example ARM/CMSIS/<em>version</em>/CMSIS/RTOS2.</p>
-<h1><a class="anchor" id="Folders"></a>
-RTX v5 Directory Structure</h1>
-<p>The CMSIS-RTOS RTX v5 is delivered in source code and several examples are provided.</p>
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-<tr>
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-<tr>
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-<tr>
-<td>RTX/Include1 </td><td>CMSIS-RTOS v1 API header file.  </td></tr>
-<tr>
-<td>RTX/Library </td><td>Pre-built libraries (see next table for details).  </td></tr>
-<tr>
-<td>RTX/Source </td><td>Source code that can be used with ARMCC and GCC.  </td></tr>
-<tr>
-<td>RTX/Template </td><td>User code templates for creating application projects with CMSIS-RTOS RTX v5.  </td></tr>
-</table>
-<h1><a class="anchor" id="libFiles"></a>
-RTX v5 Library Files</h1>
-<p>The CMSIS-RTOS RTX Library is available pre-compiled for ARMCC and GCC compilers and supports all Cortex-M processor variants in every configuration, including ARM Cortex-M23 and Cortex-M33.</p>
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-<tr>
-<th>Library File </th><th>Processor Configuration  </th></tr>
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-<td>Library/ARM/RTX_CM0.lib </td><td>CMSIS-RTOS RTX Library for ARMCC Compiler, Cortex-M0 and M1, little-endian.  </td></tr>
-<tr>
-<td>Library/ARM/RTX_CM3.lib </td><td>CMSIS-RTOS RTX Library for ARMCC Compiler, Cortex-M3, M4, and M7 without FPU, little-endian.  </td></tr>
-<tr>
-<td>Library/ARM/RTX_CM4F.lib </td><td>CMSIS-RTOS RTX Library for ARMCC Compiler, Cortex-M4 and M7 with FPU, little-endian.  </td></tr>
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diff --git a/docs/RTOS2/html/files.html b/docs/RTOS2/html/files.html
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
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 <div class="title">Function Overview </div>  </div>
 </div><!--header-->
 <div class="contents">
-<div class="textblock"><p>CMSIS-RTOS2 provides multiple API interfaces:</p>
+<div class="textblock"><p>CMSIS-RTOS2 provides following API interfaces:</p>
 <ul>
-<li><a class="el" href="rtos_api2.html">CMSIS-RTOS C API v2</a> is the new C function interface that supports dynamic object creation and Armv8-M (Arm Cortex-M23 and Cortex-M33).</li>
+<li><a class="el" href="rtos_api2.html">CMSIS-RTOS C API v2</a> is the C function interface that supports dynamic object creation and Armv8-M (Arm Cortex-M23, Cortex-M33 and Cortex-M35P) .</li>
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   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/genRTOS2IF.html b/docs/RTOS2/html/genRTOS2IF.html
index 33583aa..da8619c 100644
--- a/docs/RTOS2/html/genRTOS2IF.html
+++ b/docs/RTOS2/html/genRTOS2IF.html
@@ -183,11 +183,7 @@
 <div class="line"> </div>
 <div class="line">  <span class="comment">// System Initialization</span></div>
 <div class="line">  SystemCoreClockUpdate();</div>
-<div class="line"><span class="preprocessor">#ifdef RTE_Compiler_EventRecorder</span></div>
-<div class="line"><span class="preprocessor"></span>  <span class="comment">// Initialize and start Event Recorder</span></div>
-<div class="line">  EventRecorderInitialize(EventRecordError, 1U);</div>
-<div class="line"><span class="preprocessor">#endif</span></div>
-<div class="line"><span class="preprocessor"></span>  <span class="comment">// ...</span></div>
+<div class="line">  <span class="comment">// ...</span></div>
 <div class="line"> </div>
 <div class="line">  <a class="code" href="group__CMSIS__RTOS__KernelCtrl.html#gae818f6611d25ba3140bede410a52d659">osKernelInitialize</a>();                 <span class="comment">// Initialize CMSIS-RTOS</span></div>
 <div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>(app_main, NULL, NULL);    <span class="comment">// Create application main thread</span></div>
@@ -200,7 +196,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/globals.html b/docs/RTOS2/html/globals.html
index 30315f6..85dbfd1 100644
--- a/docs/RTOS2/html/globals.html
+++ b/docs/RTOS2/html/globals.html
@@ -141,7 +141,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/globals_defs.html b/docs/RTOS2/html/globals_defs.html
index d71ae6f..7ac3efb 100644
--- a/docs/RTOS2/html/globals_defs.html
+++ b/docs/RTOS2/html/globals_defs.html
@@ -143,6 +143,12 @@
 
 
 <h3><a class="anchor" id="index_o"></a>- o -</h3><ul>
+<li>OS_EVR_THFLAGS
+: <a class="el" href="rtx__evr_8h.html#a8e1abf0403e5aabff14bffa28c0bf14b">rtx_evr.h</a>
+</li>
+<li>OS_EVR_WAIT
+: <a class="el" href="rtx__evr_8h.html#aad9052994e484a85e2ea7c34b3957f29">rtx_evr.h</a>
+</li>
 <li>osFlagsError
 : <a class="el" href="cmsis__os2_8h.html#a01c1359c3a5640bff6e08f09bf94ce3a">cmsis_os2.h</a>
 </li>
@@ -435,7 +441,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/globals_e.html b/docs/RTOS2/html/globals_e.html
index 02defbf..44807e9 100644
--- a/docs/RTOS2/html/globals_e.html
+++ b/docs/RTOS2/html/globals_e.html
@@ -132,53 +132,71 @@
 <div class="textblock">Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:</div>
 
 <h3><a class="anchor" id="index_e"></a>- e -</h3><ul>
+<li>EvrRtxDelay()
+: <a class="el" href="group__rtx__evr__wait.html#gaec642f6e093f6c1c9b9d7609c4b0d174">rtx_evr.h</a>
+</li>
+<li>EvrRtxDelayCompleted()
+: <a class="el" href="group__rtx__evr__wait.html#gaff18b7b13dc1fe87d1c9d3b23ed55208">rtx_evr.h</a>
+</li>
+<li>EvrRtxDelayError()
+: <a class="el" href="group__rtx__evr__wait.html#ga9ca2a1f7c2231057dcdb9df400284c0a">rtx_evr.h</a>
+</li>
+<li>EvrRtxDelayStarted()
+: <a class="el" href="group__rtx__evr__wait.html#gad489decd779491c1f247214e541cd4e8">rtx_evr.h</a>
+</li>
+<li>EvrRtxDelayUntil()
+: <a class="el" href="group__rtx__evr__wait.html#ga16728292de4e2665248693fff603a2c3">rtx_evr.h</a>
+</li>
+<li>EvrRtxDelayUntilStarted()
+: <a class="el" href="group__rtx__evr__wait.html#ga46ffa7cb290130a3b0d10dbd6c3faddd">rtx_evr.h</a>
+</li>
 <li>EvrRtxEventFlagsClear()
-: <a class="el" href="rtx__evr_8h.html#ab31f9da565b0170d8e89edf0e848f28b">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#gab31f9da565b0170d8e89edf0e848f28b">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsClearDone()
-: <a class="el" href="rtx__evr_8h.html#a9e4c4e5d45bc721439c1919621a49d5a">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#ga9e4c4e5d45bc721439c1919621a49d5a">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsCreated()
-: <a class="el" href="group__rtx__evr__event__flasg.html#gaa1f48b9787e3a7d4f56449ed1dd12f26">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#gaa1f48b9787e3a7d4f56449ed1dd12f26">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsDelete()
-: <a class="el" href="group__rtx__evr__event__flasg.html#ga10e98e35999350e9e337c716ba4dc079">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#ga10e98e35999350e9e337c716ba4dc079">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsDestroyed()
-: <a class="el" href="group__rtx__evr__event__flasg.html#ga2ef153a6ee7a8d72375f81128454ede9">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#ga2ef153a6ee7a8d72375f81128454ede9">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsError()
-: <a class="el" href="group__rtx__evr__event__flasg.html#gaa281b7380c0fa725faa722badbeb2e5f">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#gaa281b7380c0fa725faa722badbeb2e5f">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsGet()
-: <a class="el" href="rtx__evr_8h.html#a113c32ff195c612ec2fb6a9dd5740184">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#ga113c32ff195c612ec2fb6a9dd5740184">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsGetName()
-: <a class="el" href="group__rtx__evr__event__flasg.html#gae9ebcbc09a1c15c719d95fe7b8c2ee18">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#gae9ebcbc09a1c15c719d95fe7b8c2ee18">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsNew()
-: <a class="el" href="group__rtx__evr__event__flasg.html#gae798cdc4cb10ada732e592318037cba7">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#gae798cdc4cb10ada732e592318037cba7">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsSet()
-: <a class="el" href="rtx__evr_8h.html#a5e5c9bd8a0522fc9301782edd6e5ec1f">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#ga5e5c9bd8a0522fc9301782edd6e5ec1f">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsSetDone()
-: <a class="el" href="rtx__evr_8h.html#a5b1b471923918ad294d16255d43ab306">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#ga5b1b471923918ad294d16255d43ab306">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsWait()
-: <a class="el" href="rtx__evr_8h.html#ac8361874ffdd854e3778f21d070fed24">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#gac8361874ffdd854e3778f21d070fed24">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsWaitCompleted()
-: <a class="el" href="rtx__evr_8h.html#a7b446f241c971db432ebac5d176bd9de">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#ga7b446f241c971db432ebac5d176bd9de">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsWaitNotCompleted()
-: <a class="el" href="rtx__evr_8h.html#a66f32e4dddc68cdfd56c32b88b7f13ff">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#ga66f32e4dddc68cdfd56c32b88b7f13ff">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsWaitPending()
-: <a class="el" href="rtx__evr_8h.html#afd598e0b02a31083fb41626d68fa489e">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#gafd598e0b02a31083fb41626d68fa489e">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsWaitTimeout()
-: <a class="el" href="group__rtx__evr__event__flasg.html#ga877235cbe04188b831b70a3c2237c827">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#ga877235cbe04188b831b70a3c2237c827">rtx_evr.h</a>
 </li>
 <li>EvrRtxKernelError()
 : <a class="el" href="group__rtx__evr__kernel.html#ga2a38154886e6293e127bafcfb6f7d609">rtx_evr.h</a>
@@ -202,7 +220,7 @@
 : <a class="el" href="group__rtx__evr__kernel.html#ga7404f3a22af84ad4091c24811fc1bf87">rtx_evr.h</a>
 </li>
 <li>EvrRtxKernelInfoRetrieved()
-: <a class="el" href="group__rtx__evr__kernel.html#gaf09b8cd94ad2384e3ab518f0df94a651">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__kernel.html#ga85f9569d363a9a8f9677041405d0935f">rtx_evr.h</a>
 </li>
 <li>EvrRtxKernelInitialize()
 : <a class="el" href="group__rtx__evr__kernel.html#ga7e84d337b452f647c3a3d6937abd6292">rtx_evr.h</a>
@@ -477,15 +495,6 @@
 <li>EvrRtxThreadCreated()
 : <a class="el" href="group__rtx__evr__thread.html#ga5bfa3bc241aea59ebe9bc1edcf6b78d8">rtx_evr.h</a>
 </li>
-<li>EvrRtxThreadDelay()
-: <a class="el" href="group__rtx__evr__thread.html#gadd45d32305aa45668a36f2c9f0f4c758">rtx_evr.h</a>
-</li>
-<li>EvrRtxThreadDelayCompleted()
-: <a class="el" href="group__rtx__evr__thread.html#gab46562848142ce5ea806d629fd000168">rtx_evr.h</a>
-</li>
-<li>EvrRtxThreadDelayUntil()
-: <a class="el" href="group__rtx__evr__thread.html#gaf59defd6c171d2c3d3508e7136278db2">rtx_evr.h</a>
-</li>
 <li>EvrRtxThreadDestroyed()
 : <a class="el" href="group__rtx__evr__thread.html#gaa5aa707fc2d6b44bfcb86bce2e2e90f3">rtx_evr.h</a>
 </li>
@@ -505,34 +514,37 @@
 : <a class="el" href="group__rtx__evr__thread.html#gaa557f9732a8a2120f08cfb2694aa26fb">rtx_evr.h</a>
 </li>
 <li>EvrRtxThreadFlagsClear()
-: <a class="el" href="rtx__evr_8h.html#ac8ddc747c72f7fc5cfa58edcee56b82d">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__thread__flags.html#gac8ddc747c72f7fc5cfa58edcee56b82d">rtx_evr.h</a>
 </li>
 <li>EvrRtxThreadFlagsClearDone()
-: <a class="el" href="rtx__evr_8h.html#aad13b17507cc07a4a1e37a5653489943">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__thread__flags.html#gaad13b17507cc07a4a1e37a5653489943">rtx_evr.h</a>
+</li>
+<li>EvrRtxThreadFlagsError()
+: <a class="el" href="group__rtx__evr__thread__flags.html#gad3609bfc41e1bee23b41973281096ed6">rtx_evr.h</a>
 </li>
 <li>EvrRtxThreadFlagsGet()
-: <a class="el" href="rtx__evr_8h.html#aab1a30a0ac3dfa588ededbfad52bae30">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__thread__flags.html#gaab1a30a0ac3dfa588ededbfad52bae30">rtx_evr.h</a>
 </li>
 <li>EvrRtxThreadFlagsSet()
-: <a class="el" href="rtx__evr_8h.html#ac356c777af86c2d8d9250cbffc516e1d">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__thread__flags.html#gac356c777af86c2d8d9250cbffc516e1d">rtx_evr.h</a>
 </li>
 <li>EvrRtxThreadFlagsSetDone()
-: <a class="el" href="rtx__evr_8h.html#abd447773c02e235a8d0bb96dd9bb1c4f">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__thread__flags.html#gabd447773c02e235a8d0bb96dd9bb1c4f">rtx_evr.h</a>
 </li>
 <li>EvrRtxThreadFlagsWait()
-: <a class="el" href="rtx__evr_8h.html#aad860c571b9b083ff2889fb76fb619f1">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__thread__flags.html#gaad860c571b9b083ff2889fb76fb619f1">rtx_evr.h</a>
 </li>
 <li>EvrRtxThreadFlagsWaitCompleted()
-: <a class="el" href="rtx__evr_8h.html#a01396074495b21270c75185f63c497d7">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__thread__flags.html#ga5e00be70234d0ca3b0d4d99fb58295bc">rtx_evr.h</a>
 </li>
 <li>EvrRtxThreadFlagsWaitNotCompleted()
-: <a class="el" href="rtx__evr_8h.html#adf6b9f4882f62a65b4e06e1b3e5c9c5b">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__thread__flags.html#gadf6b9f4882f62a65b4e06e1b3e5c9c5b">rtx_evr.h</a>
 </li>
 <li>EvrRtxThreadFlagsWaitPending()
-: <a class="el" href="rtx__evr_8h.html#ad09ec9317a4440e5228870b750e9860e">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__thread__flags.html#gad09ec9317a4440e5228870b750e9860e">rtx_evr.h</a>
 </li>
 <li>EvrRtxThreadFlagsWaitTimeout()
-: <a class="el" href="group__rtx__evr__thread.html#gadbbee398f4fab418c9b8115fc7392ff8">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__thread__flags.html#gae45ec48e082608d2ba72ce7c695899c6">rtx_evr.h</a>
 </li>
 <li>EvrRtxThreadGetCount()
 : <a class="el" href="group__rtx__evr__thread.html#ga6d5932965736e0f2f35fe2d87bd622e7">rtx_evr.h</a>
@@ -570,6 +582,9 @@
 <li>EvrRtxThreadPreempted()
 : <a class="el" href="group__rtx__evr__thread.html#gabe470d5bb1373c59c51470fd20b55bcb">rtx_evr.h</a>
 </li>
+<li>EvrRtxThreadPriorityUpdated()
+: <a class="el" href="group__rtx__evr__thread.html#ga831b3e64d459a325fbc13033caa39f05">rtx_evr.h</a>
+</li>
 <li>EvrRtxThreadResume()
 : <a class="el" href="group__rtx__evr__thread.html#gaf41ff549329cf2feb4a1efe49c518e30">rtx_evr.h</a>
 </li>
@@ -639,7 +654,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/globals_enum.html b/docs/RTOS2/html/globals_enum.html
index 7d59388..43029ee 100644
--- a/docs/RTOS2/html/globals_enum.html
+++ b/docs/RTOS2/html/globals_enum.html
@@ -140,7 +140,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/globals_eval.html b/docs/RTOS2/html/globals_eval.html
index 0428d0c..f524793 100644
--- a/docs/RTOS2/html/globals_eval.html
+++ b/docs/RTOS2/html/globals_eval.html
@@ -363,7 +363,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/globals_func.html b/docs/RTOS2/html/globals_func.html
index b1bc66f..f6a5051 100644
--- a/docs/RTOS2/html/globals_func.html
+++ b/docs/RTOS2/html/globals_func.html
@@ -129,53 +129,71 @@
 &#160;
 
 <h3><a class="anchor" id="index_e"></a>- e -</h3><ul>
+<li>EvrRtxDelay()
+: <a class="el" href="group__rtx__evr__wait.html#gaec642f6e093f6c1c9b9d7609c4b0d174">rtx_evr.h</a>
+</li>
+<li>EvrRtxDelayCompleted()
+: <a class="el" href="group__rtx__evr__wait.html#gaff18b7b13dc1fe87d1c9d3b23ed55208">rtx_evr.h</a>
+</li>
+<li>EvrRtxDelayError()
+: <a class="el" href="group__rtx__evr__wait.html#ga9ca2a1f7c2231057dcdb9df400284c0a">rtx_evr.h</a>
+</li>
+<li>EvrRtxDelayStarted()
+: <a class="el" href="group__rtx__evr__wait.html#gad489decd779491c1f247214e541cd4e8">rtx_evr.h</a>
+</li>
+<li>EvrRtxDelayUntil()
+: <a class="el" href="group__rtx__evr__wait.html#ga16728292de4e2665248693fff603a2c3">rtx_evr.h</a>
+</li>
+<li>EvrRtxDelayUntilStarted()
+: <a class="el" href="group__rtx__evr__wait.html#ga46ffa7cb290130a3b0d10dbd6c3faddd">rtx_evr.h</a>
+</li>
 <li>EvrRtxEventFlagsClear()
-: <a class="el" href="rtx__evr_8h.html#ab31f9da565b0170d8e89edf0e848f28b">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#gab31f9da565b0170d8e89edf0e848f28b">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsClearDone()
-: <a class="el" href="rtx__evr_8h.html#a9e4c4e5d45bc721439c1919621a49d5a">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#ga9e4c4e5d45bc721439c1919621a49d5a">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsCreated()
-: <a class="el" href="group__rtx__evr__event__flasg.html#gaa1f48b9787e3a7d4f56449ed1dd12f26">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#gaa1f48b9787e3a7d4f56449ed1dd12f26">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsDelete()
-: <a class="el" href="group__rtx__evr__event__flasg.html#ga10e98e35999350e9e337c716ba4dc079">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#ga10e98e35999350e9e337c716ba4dc079">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsDestroyed()
-: <a class="el" href="group__rtx__evr__event__flasg.html#ga2ef153a6ee7a8d72375f81128454ede9">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#ga2ef153a6ee7a8d72375f81128454ede9">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsError()
-: <a class="el" href="group__rtx__evr__event__flasg.html#gaa281b7380c0fa725faa722badbeb2e5f">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#gaa281b7380c0fa725faa722badbeb2e5f">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsGet()
-: <a class="el" href="rtx__evr_8h.html#a113c32ff195c612ec2fb6a9dd5740184">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#ga113c32ff195c612ec2fb6a9dd5740184">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsGetName()
-: <a class="el" href="group__rtx__evr__event__flasg.html#gae9ebcbc09a1c15c719d95fe7b8c2ee18">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#gae9ebcbc09a1c15c719d95fe7b8c2ee18">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsNew()
-: <a class="el" href="group__rtx__evr__event__flasg.html#gae798cdc4cb10ada732e592318037cba7">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#gae798cdc4cb10ada732e592318037cba7">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsSet()
-: <a class="el" href="rtx__evr_8h.html#a5e5c9bd8a0522fc9301782edd6e5ec1f">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#ga5e5c9bd8a0522fc9301782edd6e5ec1f">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsSetDone()
-: <a class="el" href="rtx__evr_8h.html#a5b1b471923918ad294d16255d43ab306">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#ga5b1b471923918ad294d16255d43ab306">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsWait()
-: <a class="el" href="rtx__evr_8h.html#ac8361874ffdd854e3778f21d070fed24">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#gac8361874ffdd854e3778f21d070fed24">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsWaitCompleted()
-: <a class="el" href="rtx__evr_8h.html#a7b446f241c971db432ebac5d176bd9de">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#ga7b446f241c971db432ebac5d176bd9de">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsWaitNotCompleted()
-: <a class="el" href="rtx__evr_8h.html#a66f32e4dddc68cdfd56c32b88b7f13ff">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#ga66f32e4dddc68cdfd56c32b88b7f13ff">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsWaitPending()
-: <a class="el" href="rtx__evr_8h.html#afd598e0b02a31083fb41626d68fa489e">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#gafd598e0b02a31083fb41626d68fa489e">rtx_evr.h</a>
 </li>
 <li>EvrRtxEventFlagsWaitTimeout()
-: <a class="el" href="group__rtx__evr__event__flasg.html#ga877235cbe04188b831b70a3c2237c827">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__event__flags.html#ga877235cbe04188b831b70a3c2237c827">rtx_evr.h</a>
 </li>
 <li>EvrRtxKernelError()
 : <a class="el" href="group__rtx__evr__kernel.html#ga2a38154886e6293e127bafcfb6f7d609">rtx_evr.h</a>
@@ -199,7 +217,7 @@
 : <a class="el" href="group__rtx__evr__kernel.html#ga7404f3a22af84ad4091c24811fc1bf87">rtx_evr.h</a>
 </li>
 <li>EvrRtxKernelInfoRetrieved()
-: <a class="el" href="group__rtx__evr__kernel.html#gaf09b8cd94ad2384e3ab518f0df94a651">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__kernel.html#ga85f9569d363a9a8f9677041405d0935f">rtx_evr.h</a>
 </li>
 <li>EvrRtxKernelInitialize()
 : <a class="el" href="group__rtx__evr__kernel.html#ga7e84d337b452f647c3a3d6937abd6292">rtx_evr.h</a>
@@ -474,15 +492,6 @@
 <li>EvrRtxThreadCreated()
 : <a class="el" href="group__rtx__evr__thread.html#ga5bfa3bc241aea59ebe9bc1edcf6b78d8">rtx_evr.h</a>
 </li>
-<li>EvrRtxThreadDelay()
-: <a class="el" href="group__rtx__evr__thread.html#gadd45d32305aa45668a36f2c9f0f4c758">rtx_evr.h</a>
-</li>
-<li>EvrRtxThreadDelayCompleted()
-: <a class="el" href="group__rtx__evr__thread.html#gab46562848142ce5ea806d629fd000168">rtx_evr.h</a>
-</li>
-<li>EvrRtxThreadDelayUntil()
-: <a class="el" href="group__rtx__evr__thread.html#gaf59defd6c171d2c3d3508e7136278db2">rtx_evr.h</a>
-</li>
 <li>EvrRtxThreadDestroyed()
 : <a class="el" href="group__rtx__evr__thread.html#gaa5aa707fc2d6b44bfcb86bce2e2e90f3">rtx_evr.h</a>
 </li>
@@ -502,34 +511,37 @@
 : <a class="el" href="group__rtx__evr__thread.html#gaa557f9732a8a2120f08cfb2694aa26fb">rtx_evr.h</a>
 </li>
 <li>EvrRtxThreadFlagsClear()
-: <a class="el" href="rtx__evr_8h.html#ac8ddc747c72f7fc5cfa58edcee56b82d">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__thread__flags.html#gac8ddc747c72f7fc5cfa58edcee56b82d">rtx_evr.h</a>
 </li>
 <li>EvrRtxThreadFlagsClearDone()
-: <a class="el" href="rtx__evr_8h.html#aad13b17507cc07a4a1e37a5653489943">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__thread__flags.html#gaad13b17507cc07a4a1e37a5653489943">rtx_evr.h</a>
+</li>
+<li>EvrRtxThreadFlagsError()
+: <a class="el" href="group__rtx__evr__thread__flags.html#gad3609bfc41e1bee23b41973281096ed6">rtx_evr.h</a>
 </li>
 <li>EvrRtxThreadFlagsGet()
-: <a class="el" href="rtx__evr_8h.html#aab1a30a0ac3dfa588ededbfad52bae30">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__thread__flags.html#gaab1a30a0ac3dfa588ededbfad52bae30">rtx_evr.h</a>
 </li>
 <li>EvrRtxThreadFlagsSet()
-: <a class="el" href="rtx__evr_8h.html#ac356c777af86c2d8d9250cbffc516e1d">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__thread__flags.html#gac356c777af86c2d8d9250cbffc516e1d">rtx_evr.h</a>
 </li>
 <li>EvrRtxThreadFlagsSetDone()
-: <a class="el" href="rtx__evr_8h.html#abd447773c02e235a8d0bb96dd9bb1c4f">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__thread__flags.html#gabd447773c02e235a8d0bb96dd9bb1c4f">rtx_evr.h</a>
 </li>
 <li>EvrRtxThreadFlagsWait()
-: <a class="el" href="rtx__evr_8h.html#aad860c571b9b083ff2889fb76fb619f1">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__thread__flags.html#gaad860c571b9b083ff2889fb76fb619f1">rtx_evr.h</a>
 </li>
 <li>EvrRtxThreadFlagsWaitCompleted()
-: <a class="el" href="rtx__evr_8h.html#a01396074495b21270c75185f63c497d7">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__thread__flags.html#ga5e00be70234d0ca3b0d4d99fb58295bc">rtx_evr.h</a>
 </li>
 <li>EvrRtxThreadFlagsWaitNotCompleted()
-: <a class="el" href="rtx__evr_8h.html#adf6b9f4882f62a65b4e06e1b3e5c9c5b">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__thread__flags.html#gadf6b9f4882f62a65b4e06e1b3e5c9c5b">rtx_evr.h</a>
 </li>
 <li>EvrRtxThreadFlagsWaitPending()
-: <a class="el" href="rtx__evr_8h.html#ad09ec9317a4440e5228870b750e9860e">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__thread__flags.html#gad09ec9317a4440e5228870b750e9860e">rtx_evr.h</a>
 </li>
 <li>EvrRtxThreadFlagsWaitTimeout()
-: <a class="el" href="group__rtx__evr__thread.html#gadbbee398f4fab418c9b8115fc7392ff8">rtx_evr.h</a>
+: <a class="el" href="group__rtx__evr__thread__flags.html#gae45ec48e082608d2ba72ce7c695899c6">rtx_evr.h</a>
 </li>
 <li>EvrRtxThreadGetCount()
 : <a class="el" href="group__rtx__evr__thread.html#ga6d5932965736e0f2f35fe2d87bd622e7">rtx_evr.h</a>
@@ -567,6 +579,9 @@
 <li>EvrRtxThreadPreempted()
 : <a class="el" href="group__rtx__evr__thread.html#gabe470d5bb1373c59c51470fd20b55bcb">rtx_evr.h</a>
 </li>
+<li>EvrRtxThreadPriorityUpdated()
+: <a class="el" href="group__rtx__evr__thread.html#ga831b3e64d459a325fbc13033caa39f05">rtx_evr.h</a>
+</li>
 <li>EvrRtxThreadResume()
 : <a class="el" href="group__rtx__evr__thread.html#gaf41ff549329cf2feb4a1efe49c518e30">rtx_evr.h</a>
 </li>
@@ -636,7 +651,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/globals_func_o.html b/docs/RTOS2/html/globals_func_o.html
index e2de554..43405ef 100644
--- a/docs/RTOS2/html/globals_func_o.html
+++ b/docs/RTOS2/html/globals_func_o.html
@@ -408,7 +408,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/globals_func_p.html b/docs/RTOS2/html/globals_func_p.html
index 75430dd..4296913 100644
--- a/docs/RTOS2/html/globals_func_p.html
+++ b/docs/RTOS2/html/globals_func_p.html
@@ -138,7 +138,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/globals_func_s.html b/docs/RTOS2/html/globals_func_s.html
index 8bc8268..6b497b6 100644
--- a/docs/RTOS2/html/globals_func_s.html
+++ b/docs/RTOS2/html/globals_func_s.html
@@ -141,7 +141,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/globals_i.html b/docs/RTOS2/html/globals_i.html
index d7eddf4..49080ae 100644
--- a/docs/RTOS2/html/globals_i.html
+++ b/docs/RTOS2/html/globals_i.html
@@ -144,7 +144,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/globals_o.html b/docs/RTOS2/html/globals_o.html
index 0427010..6ab7ab9 100644
--- a/docs/RTOS2/html/globals_o.html
+++ b/docs/RTOS2/html/globals_o.html
@@ -132,6 +132,12 @@
 <div class="textblock">Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:</div>
 
 <h3><a class="anchor" id="index_o"></a>- o -</h3><ul>
+<li>OS_EVR_THFLAGS
+: <a class="el" href="rtx__evr_8h.html#a8e1abf0403e5aabff14bffa28c0bf14b">rtx_evr.h</a>
+</li>
+<li>OS_EVR_WAIT
+: <a class="el" href="rtx__evr_8h.html#aad9052994e484a85e2ea7c34b3957f29">rtx_evr.h</a>
+</li>
 <li>OS_Tick_AcknowledgeIRQ()
 : <a class="el" href="group__CMSIS__RTOS__TickAPI.html#ga57065ec4b281504ad4de13a419870b4f">os_tick.h</a>
 </li>
@@ -990,7 +996,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/globals_p.html b/docs/RTOS2/html/globals_p.html
index 1afcca5..866555c 100644
--- a/docs/RTOS2/html/globals_p.html
+++ b/docs/RTOS2/html/globals_p.html
@@ -141,7 +141,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/globals_s.html b/docs/RTOS2/html/globals_s.html
index 09aabf4..9090606 100644
--- a/docs/RTOS2/html/globals_s.html
+++ b/docs/RTOS2/html/globals_s.html
@@ -144,7 +144,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/globals_t.html b/docs/RTOS2/html/globals_t.html
index a1a0a75..7f59930 100644
--- a/docs/RTOS2/html/globals_t.html
+++ b/docs/RTOS2/html/globals_t.html
@@ -144,7 +144,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/globals_type.html b/docs/RTOS2/html/globals_type.html
index 8e2c4c4..1fe6484 100644
--- a/docs/RTOS2/html/globals_type.html
+++ b/docs/RTOS2/html/globals_type.html
@@ -158,7 +158,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/globals_vars.html b/docs/RTOS2/html/globals_vars.html
index edb7f43..6f05b81 100644
--- a/docs/RTOS2/html/globals_vars.html
+++ b/docs/RTOS2/html/globals_vars.html
@@ -152,7 +152,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/group__CMSIS__RTOS.html b/docs/RTOS2/html/group__CMSIS__RTOS.html
index e547e40..17fa444 100644
--- a/docs/RTOS2/html/group__CMSIS__RTOS.html
+++ b/docs/RTOS2/html/group__CMSIS__RTOS.html
@@ -166,7 +166,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/group__CMSIS__RTOS__Definitions.html b/docs/RTOS2/html/group__CMSIS__RTOS__Definitions.html
index 6ad3530..2404a01 100644
--- a/docs/RTOS2/html/group__CMSIS__RTOS__Definitions.html
+++ b/docs/RTOS2/html/group__CMSIS__RTOS__Definitions.html
@@ -285,7 +285,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/group__CMSIS__RTOS__EventFlags.html b/docs/RTOS2/html/group__CMSIS__RTOS__EventFlags.html
index 9d7271b..cfc501e 100644
--- a/docs/RTOS2/html/group__CMSIS__RTOS__EventFlags.html
+++ b/docs/RTOS2/html/group__CMSIS__RTOS__EventFlags.html
@@ -174,50 +174,62 @@
 Simple event communication</div></div>
 <p> The following steps are required to use event flags:</p>
 <ol type="1">
-<li>In the thread that is supposed to send a event with id sig1_id, call the set function: <div class="fragment"><div class="line"><a class="code" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a> (1000);                                           <span class="comment">// wait for 1 second</span></div>
-<div class="line"><a class="code" href="group__CMSIS__RTOS__EventFlags.html#ga33b71d14cecf90b4e72639dd19f23a5e">osEventFlagsSet</a> (sig1_id, 0x0001U);                       <span class="comment">// set the flag 0x0001U for event sig1_id</span></div>
+<li>In the thread that is supposed to send a event with id sig1_id, call the set function: <div class="fragment"><div class="line"><a class="code" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a>(1000U);                                           <span class="comment">// wait for 1 second</span></div>
+<div class="line"><a class="code" href="group__CMSIS__RTOS__EventFlags.html#ga33b71d14cecf90b4e72639dd19f23a5e">osEventFlagsSet</a>(sig1_id, 0x0001U);                        <span class="comment">// set the flag 0x0001U for event sig1_id</span></div>
 </div><!-- fragment --></li>
-<li>In another thread (or threads) that are supposed to wait for the event, call the wait function: <div class="fragment"><div class="line"><a class="code" href="group__CMSIS__RTOS__EventFlags.html#ga52acb34a8322e58020227344fe662b4e">osEventFlagsWait</a> (sig1_id, 0x0001U, NULL, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga9eb9a7a797a42e4b55eb171ecc609ddb">osWaitForever</a>); <span class="comment">// wait forever for any flag</span></div>
+<li>In another thread (or threads) that are supposed to wait for the event, call the wait function: <div class="fragment"><div class="line"><a class="code" href="group__CMSIS__RTOS__EventFlags.html#ga52acb34a8322e58020227344fe662b4e">osEventFlagsWait</a>(sig1_id, 0x0001U, NULL, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga9eb9a7a797a42e4b55eb171ecc609ddb">osWaitForever</a>);  <span class="comment">// wait forever for any flag</span></div>
 </div><!-- fragment --></li>
 </ol>
 <p>The following complete example code can be directly used with the "CMSIS-RTOS2 main template" and is also provided as a stand-alone template for RTX5:</p>
 <p><b>Code Example</b> </p>
-<div class="fragment"><div class="line"><span class="keywordtype">void</span> Thread_EventSender   (<span class="keywordtype">void</span> *argument);                   <span class="comment">// thread function 1</span></div>
-<div class="line"><span class="keywordtype">void</span> Thread_EventReceiver (<span class="keywordtype">void</span> *argument);                   <span class="comment">// thread function 2</span></div>
-<div class="line"><a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> tid_Thread_EventSender;                          <span class="comment">// thread id 1</span></div>
-<div class="line"><a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> tid_Thread_EventReceiver;                        <span class="comment">// thread id 2</span></div>
+<div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span>                          <span class="comment">// CMSIS RTOS header file</span></div>
 <div class="line"> </div>
-<div class="line"><a class="code" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> evt_id;                                      <span class="comment">// message queue id</span></div>
+<div class="line"><span class="comment">/*----------------------------------------------------------------------------</span></div>
+<div class="line"><span class="comment"> *  Event Flags creation &amp; usage</span></div>
+<div class="line"><span class="comment"> *---------------------------------------------------------------------------*/</span></div>
 <div class="line"> </div>
-<div class="line"><span class="preprocessor">#define FLAGS_MSK1 0x00000001ul</span></div>
+<div class="line"><span class="preprocessor">#define FLAGS_MSK1 0x00000001U</span></div>
 <div class="line"><span class="preprocessor"></span> </div>
-<div class="line"><span class="keywordtype">void</span> app_main (<span class="keywordtype">void</span>)</div>
-<div class="line">{</div>
-<div class="line">  tid_Thread_EventSender = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a> (Thread_EventSender, NULL, NULL);</div>
+<div class="line"><a class="code" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> evt_id;                        <span class="comment">// event flags id</span></div>
+<div class="line"> </div>
+<div class="line"><a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> tid_Thread_EventSender;            <span class="comment">// thread id 1</span></div>
+<div class="line"><a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> tid_Thread_EventReceiver;          <span class="comment">// thread id 2</span></div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> Thread_EventSender   (<span class="keywordtype">void</span> *argument);     <span class="comment">// thread function 1</span></div>
+<div class="line"><span class="keywordtype">void</span> Thread_EventReceiver (<span class="keywordtype">void</span> *argument);     <span class="comment">// thread function 2</span></div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">int</span> Init_Events (<span class="keywordtype">void</span>) {</div>
+<div class="line"> </div>
+<div class="line">  evt_id = <a class="code" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>(NULL);</div>
+<div class="line">  <span class="keywordflow">if</span> (evt_id == NULL) {</div>
+<div class="line">    ; <span class="comment">// Event Flags object not created, handle failure</span></div>
+<div class="line">  }</div>
+<div class="line"> </div>
+<div class="line">  tid_Thread_EventSender = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>(Thread_EventSender, NULL, NULL);</div>
 <div class="line">  <span class="keywordflow">if</span> (tid_Thread_EventSender == NULL) {</div>
-<div class="line">    ;                                                         <span class="comment">// do something</span></div>
+<div class="line">    <span class="keywordflow">return</span>(-1);</div>
 <div class="line">  }</div>
-<div class="line">  tid_Thread_EventReceiver = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a> (Thread_EventReceiver, NULL, NULL);</div>
+<div class="line">  tid_Thread_EventReceiver = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>(Thread_EventReceiver, NULL, NULL);</div>
 <div class="line">  <span class="keywordflow">if</span> (tid_Thread_EventReceiver == NULL) {</div>
-<div class="line">    ;                                                         <span class="comment">// do something</span></div>
+<div class="line">    <span class="keywordflow">return</span>(-1);</div>
 <div class="line">  }</div>
-<div class="line">  ;                                                           <span class="comment">// do something</span></div>
+<div class="line"></div>
+<div class="line">  <span class="keywordflow">return</span>(0);</div>
 <div class="line">}</div>
 <div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> Thread_EventSender (<span class="keywordtype">void</span> *argument)</div>
-<div class="line">{</div>
-<div class="line">  evt_id = <a class="code" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>(NULL);</div>
+<div class="line"><span class="keywordtype">void</span> Thread_EventSender (<span class="keywordtype">void</span> *argument) {</div>
+<div class="line"> </div>
 <div class="line">  <span class="keywordflow">while</span> (1) {    </div>
 <div class="line">    <a class="code" href="group__CMSIS__RTOS__EventFlags.html#ga33b71d14cecf90b4e72639dd19f23a5e">osEventFlagsSet</a>(evt_id, FLAGS_MSK1);</div>
-<div class="line">    <a class="code" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a> (1000);                                           <span class="comment">// suspend thread</span></div>
+<div class="line">    <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gad01c7ec26535b1de6b018bb9466720e2">osThreadYield</a>();                            <span class="comment">// suspend thread</span></div>
 <div class="line">  }</div>
 <div class="line">}</div>
 <div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> Thread_EventReceiver (<span class="keywordtype">void</span> *argument)</div>
-<div class="line">{</div>
+<div class="line"><span class="keywordtype">void</span> Thread_EventReceiver (<span class="keywordtype">void</span> *argument) {</div>
 <div class="line">  uint32_t flags;</div>
+<div class="line"> </div>
 <div class="line">  <span class="keywordflow">while</span> (1) {</div>
-<div class="line">    flags = <a class="code" href="group__CMSIS__RTOS__EventFlags.html#ga52acb34a8322e58020227344fe662b4e">osEventFlagsWait</a> (evt_id,FLAGS_MSK1,<a class="code" href="group__CMSIS__RTOS__Definitions.html#ga18e63587b8450d5b8798b6f6ec04e012">osFlagsWaitAny</a>, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga9eb9a7a797a42e4b55eb171ecc609ddb">osWaitForever</a>);</div>
+<div class="line">    flags = <a class="code" href="group__CMSIS__RTOS__EventFlags.html#ga52acb34a8322e58020227344fe662b4e">osEventFlagsWait</a>(evt_id, FLAGS_MSK1, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga18e63587b8450d5b8798b6f6ec04e012">osFlagsWaitAny</a>, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga9eb9a7a797a42e4b55eb171ecc609ddb">osWaitForever</a>);</div>
 <div class="line">    <span class="comment">//handle event</span></div>
 <div class="line">  }</div>
 <div class="line">}</div>
@@ -244,31 +256,31 @@
 <td class="fieldname">
 name</td>
 <td class="fielddoc">
-name of the event flags <p>Pointer to a string with a human readable name of the event object.<br/>
-Default: <span class="XML-Token">NULL</span>. </p>
+name of the event flags <p>Pointer to a constant string with a human readable name (displayed during debugging) of the event flag object.</p>
+<p>Default: <span class="XML-Token">NULL</span> no name specified. </p>
 </td></tr>
 <tr><td class="fieldtype">
 <a class="anchor" id="a6e93b49cb79c12f768d72580c7731f30"></a>uint32_t</td>
 <td class="fieldname">
 attr_bits</td>
 <td class="fielddoc">
-attribute bits <p>Reserved for future use (set to '0').<br/>
-Default: <span class="XML-Token">0</span>. </p>
+attribute bits <p>Reserved for future use (must be set to '0' for future compatibility). </p>
 </td></tr>
 <tr><td class="fieldtype">
 <a class="anchor" id="a1e100dc33d403841ed3c344e3397868e"></a>void *</td>
 <td class="fieldname">
 cb_mem</td>
 <td class="fielddoc">
-memory for control block <p>Pointer to a memory location for the event control block object. This can optionally be used for custom memory management systems.<br/>
-Default: <span class="XML-Token">NULL</span> (uses kernel memory management). </p>
+memory for control block <p>Pointer to a memory for the event flag control block object. Refer to <a class="el" href="theory_of_operation.html#StaticObjectMemory">Static Object Memory</a> for more information.</p>
+<p>Default: <span class="XML-Token">NULL</span> to use <a class="el" href="group__CMSIS__RTOS__MemoryMgmt.html#CMSIS_RTOS_MemoryMgmt_Automatic">Automatic Dynamic Allocation</a> for the event flag control block. </p>
 </td></tr>
 <tr><td class="fieldtype">
 <a class="anchor" id="aa55a4335d12dc2785dc00fdc292d1159"></a>uint32_t</td>
 <td class="fieldname">
 cb_size</td>
 <td class="fielddoc">
-size of provided memory for control block <p>The size of the memory block passed with <a class="el" href="group__CMSIS__RTOS__EventFlags.html#a1e100dc33d403841ed3c344e3397868e">cb_mem</a>. Must be the size of an event control block object or larger. </p>
+size of provided memory for control block <p>The size (in bytes) of memory block passed with <a class="el" href="group__CMSIS__RTOS__EventFlags.html#a1e100dc33d403841ed3c344e3397868e">cb_mem</a>. For RTX, the minimum value is defined with <a class="el" href="group__rtx5__specific__defines.html#ga68100c8c44931f03547973294c433075">osRtxEventFlagsCbSize</a> (higher values are permitted).</p>
+<p>Default: <span class="XML-Token">0</span> as the default is no memory provided with <a class="el" href="group__CMSIS__RTOS__EventFlags.html#a1e100dc33d403841ed3c344e3397868e">cb_mem</a>. </p>
 </td></tr>
 </table>
 
@@ -317,27 +329,19 @@
 <p>The parameter <em>attr</em> sets the event flags attributes (refer to <a class="el" href="group__CMSIS__RTOS__EventFlags.html#structosEventFlagsAttr__t">osEventFlagsAttr_t</a>). Default attributes will be used if set to <span class="XML-Token">NULL</span>, i.e. kernel memory allocation is used for the event control block.</p>
 <dl class="section note"><dt>Note</dt><dd>Cannot be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>.</dd></dl>
 <p><b>Code Example</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span>                                        <span class="comment">// CMSIS RTOS header file</span></div>
+<div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span>                          <span class="comment">// CMSIS RTOS header file</span></div>
 <div class="line"> </div>
-<div class="line"><a class="code" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> evt_id;                                      <span class="comment">// message queue id</span></div>
+<div class="line"><a class="code" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> evt_id;                        <span class="comment">// message queue id</span></div>
 <div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> Thread_EventSender (<span class="keywordtype">void</span> *argument)</div>
-<div class="line">{</div>
+<div class="line"><span class="keywordtype">int</span> Init_Events (<span class="keywordtype">void</span>) {</div>
+<div class="line"> </div>
 <div class="line">  evt_id = <a class="code" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>(NULL);</div>
-<div class="line">  <span class="keywordflow">while</span> (1) {    </div>
-<div class="line">    <a class="code" href="group__CMSIS__RTOS__EventFlags.html#ga33b71d14cecf90b4e72639dd19f23a5e">osEventFlagsSet</a>(evt_id, FLAGS_MSK1);</div>
-<div class="line">    <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gad01c7ec26535b1de6b018bb9466720e2">osThreadYield</a> ();                                         <span class="comment">// suspend thread</span></div>
+<div class="line">  <span class="keywordflow">if</span> (evt_id == NULL) {</div>
+<div class="line">    ; <span class="comment">// Event Flags object not created, handle failure</span></div>
+<div class="line">    <span class="keywordflow">return</span>(-1);</div>
 <div class="line">  }</div>
-<div class="line">}</div>
-<div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> Thread_EventReceiver (<span class="keywordtype">void</span> *argument)</div>
-<div class="line">{</div>
-<div class="line">  uint32_t  flags;</div>
-<div class="line"> </div>
-<div class="line">  <span class="keywordflow">while</span> (1) {</div>
-<div class="line">    flags = <a class="code" href="group__CMSIS__RTOS__EventFlags.html#ga52acb34a8322e58020227344fe662b4e">osEventFlagsWait</a> (evt_id,FLAGS_MSK1,<a class="code" href="group__CMSIS__RTOS__Definitions.html#ga18e63587b8450d5b8798b6f6ec04e012">osFlagsWaitAny</a>, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga9eb9a7a797a42e4b55eb171ecc609ddb">osWaitForever</a>);</div>
-<div class="line">    <span class="comment">//handle event</span></div>
-<div class="line">  }</div>
+<div class="line"></div>
+<div class="line">  <span class="keywordflow">return</span>(0);</div>
 <div class="line">}</div>
 </div><!-- fragment --> 
 </div>
@@ -376,32 +380,21 @@
 <p>The function <b>osEventFlagsSet</b> sets the event flags specified by the parameter <em>flags</em> in an event flags object specified by parameter <em>ef_id</em>. All threads waiting for the flag set will be notified to resume from <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ThreadStates">BLOCKED</a> state. The function returns the event flags after setting or an error code (highest bit is set, refer to <a class="el" href="group__flags__error__codes.html">Flags Functions Error Codes</a>).</p>
 <p>Possible <a class="el" href="group__flags__error__codes.html">Flags Functions Error Codes</a> return values:</p>
 <ul>
-<li><em>osFlagsErrorUnknown:</em> Unspecified error.</li>
-<li><em>osFlagsErrorResource:</em> Event flags object specified by parameter <em>ef_id</em> is not ready to be used.</li>
-<li><em>osFlagsErrorParameter:</em> Parameter <em>ef_id</em> does not identify a valid event flags object or <em>flags</em> has highest bit set.</li>
+<li><em>osFlagsErrorUnknown:</em> unspecified error.</li>
+<li><em>osFlagsErrorParameter:</em> parameter <em>ef_id</em> does not identify a valid event flags object or <em>flags</em> has highest bit set.</li>
+<li><em>osFlagsErrorResource:</em> the event flags object is in an invalid state.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>This function may be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>.</dd></dl>
 <p><b>Code Example</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span>                                        <span class="comment">// CMSIS RTOS header file</span></div>
+<div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span>                          <span class="comment">// CMSIS RTOS header file</span></div>
 <div class="line"> </div>
-<div class="line"><a class="code" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> evt_id;                                      <span class="comment">// message queue id</span></div>
+<div class="line"><a class="code" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> evt_id;                        <span class="comment">// event flasg id</span></div>
 <div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> Thread_EventSender (<span class="keywordtype">void</span> *argument)</div>
-<div class="line">{</div>
-<div class="line">  evt_id = <a class="code" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>(NULL);</div>
+<div class="line"><span class="keywordtype">void</span> Thread_EventSender (<span class="keywordtype">void</span> *argument) {</div>
+<div class="line"> </div>
 <div class="line">  <span class="keywordflow">while</span> (1) {    </div>
-<div class="line">    <a class="code" href="group__CMSIS__RTOS__EventFlags.html#ga33b71d14cecf90b4e72639dd19f23a5e">osEventFlagsSet</a>(evt_id, FLAGS_MSK1);</div>
-<div class="line">    <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gad01c7ec26535b1de6b018bb9466720e2">osThreadYield</a> ();                                         <span class="comment">// suspend thread</span></div>
-<div class="line">  }</div>
-<div class="line">}</div>
-<div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> Thread_EventReceiver (<span class="keywordtype">void</span> *argument)</div>
-<div class="line">{</div>
-<div class="line">  uint32_t  flags;</div>
-<div class="line"> </div>
-<div class="line">  <span class="keywordflow">while</span> (1) {</div>
-<div class="line">    flags = <a class="code" href="group__CMSIS__RTOS__EventFlags.html#ga52acb34a8322e58020227344fe662b4e">osEventFlagsWait</a> (evt_id,FLAGS_MSK1,<a class="code" href="group__CMSIS__RTOS__Definitions.html#ga18e63587b8450d5b8798b6f6ec04e012">osFlagsWaitAny</a>, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga9eb9a7a797a42e4b55eb171ecc609ddb">osWaitForever</a>);</div>
-<div class="line">    <span class="comment">//handle event</span></div>
+<div class="line">    <a class="code" href="group__CMSIS__RTOS__EventFlags.html#ga33b71d14cecf90b4e72639dd19f23a5e">osEventFlagsSet</a>(evt_id, 0x00000001U);</div>
+<div class="line">    <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gad01c7ec26535b1de6b018bb9466720e2">osThreadYield</a>();                            <span class="comment">// suspend thread</span></div>
 <div class="line">  }</div>
 <div class="line">}</div>
 </div><!-- fragment --> 
@@ -441,9 +434,9 @@
 <p>The function <b>osEventFlagsClear</b> clears the event flags specified by the parameter <em>flags</em> in an event flags object specified by parameter <em>ef_id</em>. The function returns the event flags before clearing or an error code (highest bit is set, refer to <a class="el" href="group__flags__error__codes.html">Flags Functions Error Codes</a>).</p>
 <p>Possible <a class="el" href="group__flags__error__codes.html">Flags Functions Error Codes</a> return values:</p>
 <ul>
-<li><em>osFlagsErrorUnknown:</em> Unspecified error.</li>
-<li><em>osFlagsErrorResource:</em> Event flags object specified by parameter <em>ef_id</em> is not ready to be used.</li>
-<li><em>osFlagsErrorParameter:</em> Parameter <em>ef_id</em> does not identify a valid event flags object or <em>flags</em> has highest bit set.</li>
+<li><em>osFlagsErrorUnknown:</em> unspecified error.</li>
+<li><em>osFlagsErrorParameter:</em> parameter <em>ef_id</em> does not identify a valid event flags object or <em>flags</em> has highest bit set.</li>
+<li><em>osFlagsErrorResource:</em> the event flags object is in an invalid state.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>This function may be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>. </dd></dl>
 
@@ -541,32 +534,22 @@
 <p>The function returns the event flags before clearing or an error code (highest bit is set, refer to <a class="el" href="group__flags__error__codes.html">Flags Functions Error Codes</a>).</p>
 <p>Possible <a class="el" href="group__flags__error__codes.html">Flags Functions Error Codes</a> return values:</p>
 <ul>
-<li><em>osFlagsErrorUnknown:</em> Unspecified error.</li>
-<li><em>osFlagsErrorTimeout:</em> The awaited flags has not been set during given timeout.</li>
-<li><em>osFlagsErrorResource:</em> Event flags object specified by parameter <em>ef_id</em> is not ready to be used.</li>
-<li><em>osFlagsErrorParameter:</em> Parameter <em>ef_id</em> does not identify a valid event flags object or <em>flags</em> has highest bit set.</li>
+<li><em>osFlagsErrorUnknown:</em> unspecified error.</li>
+<li><em>osFlagsErrorTimeout:</em> awaited flags have not been set in the given time.</li>
+<li><em>osFlagsErrorResource:</em> awaited flags have not been set when no <em>timeout</em> was specified.</li>
+<li><em>osFlagsErrorParameter:</em> parameter <em>ef_id</em> does not identify a valid event flags object or <em>flags</em> has highest bit set.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>May be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a> if the parameter <em>timeout</em> is set to <span class="XML-Token">0</span>.</dd></dl>
 <p><b>Code</b> <b>Example</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span>                                        <span class="comment">// CMSIS RTOS header file</span></div>
+<div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span>                          <span class="comment">// CMSIS RTOS header file</span></div>
 <div class="line"> </div>
-<div class="line"><a class="code" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> evt_id;                                      <span class="comment">// message queue id</span></div>
+<div class="line"><a class="code" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> evt_id;                        <span class="comment">// event flasg id</span></div>
 <div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> Thread_EventSender (<span class="keywordtype">void</span> *argument)</div>
-<div class="line">{</div>
-<div class="line">  evt_id = <a class="code" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>(NULL);</div>
-<div class="line">  <span class="keywordflow">while</span> (1) {    </div>
-<div class="line">    <a class="code" href="group__CMSIS__RTOS__EventFlags.html#ga33b71d14cecf90b4e72639dd19f23a5e">osEventFlagsSet</a>(evt_id, FLAGS_MSK1);</div>
-<div class="line">    <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gad01c7ec26535b1de6b018bb9466720e2">osThreadYield</a> ();                                         <span class="comment">// suspend thread</span></div>
-<div class="line">  }</div>
-<div class="line">}</div>
-<div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> Thread_EventReceiver (<span class="keywordtype">void</span> *argument)</div>
-<div class="line">{</div>
-<div class="line">  uint32_t  flags;</div>
+<div class="line"><span class="keywordtype">void</span> Thread_EventReceiver (<span class="keywordtype">void</span> *argument) {</div>
+<div class="line">  uint32_t flags;</div>
 <div class="line"> </div>
 <div class="line">  <span class="keywordflow">while</span> (1) {</div>
-<div class="line">    flags = <a class="code" href="group__CMSIS__RTOS__EventFlags.html#ga52acb34a8322e58020227344fe662b4e">osEventFlagsWait</a> (evt_id,FLAGS_MSK1,<a class="code" href="group__CMSIS__RTOS__Definitions.html#ga18e63587b8450d5b8798b6f6ec04e012">osFlagsWaitAny</a>, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga9eb9a7a797a42e4b55eb171ecc609ddb">osWaitForever</a>);</div>
+<div class="line">    flags = <a class="code" href="group__CMSIS__RTOS__EventFlags.html#ga52acb34a8322e58020227344fe662b4e">osEventFlagsWait</a>(evt_id, 0x00000001U, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga18e63587b8450d5b8798b6f6ec04e012">osFlagsWaitAny</a>, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga9eb9a7a797a42e4b55eb171ecc609ddb">osWaitForever</a>);</div>
 <div class="line">    <span class="comment">//handle event</span></div>
 <div class="line">  }</div>
 <div class="line">}</div>
@@ -598,8 +581,8 @@
 <ul>
 <li><em>osOK:</em> the specified event flags object has been deleted.</li>
 <li><em>osErrorISR:</em> <b>osEventFlagsDelete</b> cannot be called from interrupt service routines.</li>
-<li><em>osErrorParameter:</em> the value of the parameter <em>ef_id</em> is incorrect.</li>
-<li><em>osErrorResource:</em> parameter <em>ef_id</em> is <span class="XML-Token">NULL</span> or wrong.</li>
+<li><em>osErrorParameter:</em> parameter <em>ef_id</em> is <span class="XML-Token">NULL</span> or invalid.</li>
+<li><em>osErrorResource:</em> the event flags object is in an invalid state.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>. </dd></dl>
 
@@ -628,11 +611,15 @@
 <p>The function <b>osEventFlagsGetName</b> returns the pointer to the name string of the event flags object identified by parameter <em>ef_id</em> or <span class="XML-Token">NULL</span> in case of an error.</p>
 <dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>.</dd></dl>
 <p><b>Code Example</b> </p>
-<div class="fragment"><div class="line"><span class="keywordtype">void</span> EvtFlagsGetName_example (<span class="keywordtype">void</span>)  {</div>
-<div class="line">  <span class="keywordtype">char</span> id;                                           <span class="comment">// id of the event flags object</span></div>
+<div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span>                          <span class="comment">// CMSIS RTOS header file</span></div>
+<div class="line"> </div>
+<div class="line"><a class="code" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> evt_id;                        <span class="comment">// event flasg id</span></div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> EvtFlagsGetName_example (<span class="keywordtype">void</span>)  {</div>
+<div class="line">  <span class="keywordtype">char</span> *name;</div>
 <div class="line">   </div>
-<div class="line">  <span class="keywordtype">id</span> = <a class="code" href="group__CMSIS__RTOS__EventFlags.html#ga59f4ddf0ee8c395b1672bb978d1cfc88">osEventFlagsGetName</a> ();</div>
-<div class="line">  <span class="keywordflow">if</span> (<span class="keywordtype">id</span> == NULL) {</div>
+<div class="line">  name = <a class="code" href="group__CMSIS__RTOS__EventFlags.html#ga59f4ddf0ee8c395b1672bb978d1cfc88">osEventFlagsGetName</a>(evt_id);</div>
+<div class="line">  <span class="keywordflow">if</span> (name == NULL) {</div>
 <div class="line">    <span class="comment">// Failed to get the event flags object name</span></div>
 <div class="line">  }</div>
 <div class="line">}</div>
@@ -644,7 +631,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/group__CMSIS__RTOS__KernelCtrl.html b/docs/RTOS2/html/group__CMSIS__RTOS__KernelCtrl.html
index 7f2075b..a7f46c8 100644
--- a/docs/RTOS2/html/group__CMSIS__RTOS__KernelCtrl.html
+++ b/docs/RTOS2/html/group__CMSIS__RTOS__KernelCtrl.html
@@ -214,11 +214,7 @@
 <div class="line"> </div>
 <div class="line">  <span class="comment">// System Initialization</span></div>
 <div class="line">  SystemCoreClockUpdate();</div>
-<div class="line"><span class="preprocessor">#ifdef RTE_Compiler_EventRecorder</span></div>
-<div class="line"><span class="preprocessor"></span>  <span class="comment">// Initialize and start Event Recorder</span></div>
-<div class="line">  EventRecorderInitialize(EventRecordError, 1U);</div>
-<div class="line"><span class="preprocessor">#endif</span></div>
-<div class="line"><span class="preprocessor"></span>  <span class="comment">// ...</span></div>
+<div class="line">  <span class="comment">// ...</span></div>
 <div class="line"> </div>
 <div class="line">  <a class="code" href="group__CMSIS__RTOS__KernelCtrl.html#gae818f6611d25ba3140bede410a52d659">osKernelInitialize</a>();                 <span class="comment">// Initialize CMSIS-RTOS</span></div>
 <div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>(app_main, NULL, NULL);    <span class="comment">// Create application main thread</span></div>
@@ -801,7 +797,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/group__CMSIS__RTOS__MemoryMgmt.html b/docs/RTOS2/html/group__CMSIS__RTOS__MemoryMgmt.html
index be44ec0..ca165b2 100644
--- a/docs/RTOS2/html/group__CMSIS__RTOS__MemoryMgmt.html
+++ b/docs/RTOS2/html/group__CMSIS__RTOS__MemoryMgmt.html
@@ -152,12 +152,12 @@
 <div class="line">  </div>
 <div class="line"><a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#ga313801836c62deb23055efb55a420e42">osMutexId_t</a> mutex_id;</div>
 <div class="line">  </div>
-<div class="line"><span class="keyword">static</span> uint32_t mutex_cb[<a class="code" href="group__rtx5__specific__defines.html#ga188bfaaf7477cf24cbc9f207feaeb53a">osRtxMutexCbSize</a>/4U];  <span class="comment">// implementation specific</span></div>
+<div class="line"><span class="keyword">static</span> <a class="code" href="rtx__os_8h.html#structosRtxMutex__t">osRtxMutex_t</a> mutex_cb __attribute__((section(<span class="stringliteral">&quot;.bss.os.mutex.cb&quot;</span>)));  <span class="comment">// Placed on .bss.os.mutex.cb section for RTX5 aware debugging</span></div>
 <div class="line">  </div>
 <div class="line"><span class="keyword">const</span> <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#structosMutexAttr__t">osMutexAttr_t</a> Thread_Mutex_attr = {</div>
 <div class="line">  <span class="stringliteral">&quot;myThreadMutex&quot;</span>,                              <span class="comment">// human readable mutex name</span></div>
 <div class="line">  <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#ga65c2482cc64a35d03871f3180f305926">osMutexRecursive</a> | <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#ga40fba270cb31a977b3bd551d41eb9599">osMutexPrioInherit</a>,        <span class="comment">// attr_bits</span></div>
-<div class="line">  mutex_cb,                                     <span class="comment">// memory for control block (user-defined)</span></div>
+<div class="line">  &amp;mutex_cb,                                    <span class="comment">// memory for control block (user-defined)</span></div>
 <div class="line">  <span class="keyword">sizeof</span>(mutex_cb)                              <span class="comment">// size for control block (user-defined)</span></div>
 <div class="line">};</div>
 <div class="line">  </div>
@@ -171,7 +171,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/group__CMSIS__RTOS__Message.html b/docs/RTOS2/html/group__CMSIS__RTOS__Message.html
index 3684b6d..bfc5f42 100644
--- a/docs/RTOS2/html/group__CMSIS__RTOS__Message.html
+++ b/docs/RTOS2/html/group__CMSIS__RTOS__Message.html
@@ -362,67 +362,71 @@
 <li><em>osOK:</em> the message has been put into the queue.</li>
 <li><em>osErrorTimeout:</em> the message could not be put into the queue in the given time (wait-timed semantics).</li>
 <li><em>osErrorResource:</em> not enough space in the queue (try semantics).</li>
-<li><em>osErrorParameter:</em> the parameter <em>mq_id</em> is incorrect, non-zero timeout specified in an ISR.</li>
+<li><em>osErrorParameter:</em> parameter <em>mq_id</em> is <span class="XML-Token">NULL</span> or invalid, non-zero timeout specified in an ISR.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>May be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a> if the parameter <em>timeout</em> is set to <span class="XML-Token">0</span>.</dd></dl>
 <p><b>Code Example:</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span>                                             <span class="comment">// CMSIS RTOS header file</span></div>
+<div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span>                          <span class="comment">// CMSIS RTOS header file</span></div>
 <div class="line"> </div>
 <div class="line"><span class="comment">/*----------------------------------------------------------------------------</span></div>
 <div class="line"><span class="comment"> *      Message Queue creation &amp; usage</span></div>
 <div class="line"><span class="comment"> *---------------------------------------------------------------------------*/</span></div>
-<div class="line">  </div>
-<div class="line"><span class="keywordtype">void</span> Thread_MsgQueue1 (<span class="keywordtype">void</span> *argument);                            <span class="comment">// thread function 1</span></div>
-<div class="line"><span class="keywordtype">void</span> Thread_MsgQueue2 (<span class="keywordtype">void</span> *argument);                            <span class="comment">// thread function 2</span></div>
-<div class="line"><a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> tid_Thread_MsgQueue1;                                 <span class="comment">// thread id 1</span></div>
-<div class="line"><a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> tid_Thread_MsgQueue2;                                 <span class="comment">// thread id 2</span></div>
 <div class="line"> </div>
-<div class="line"><span class="preprocessor">#define MSGQUEUE_OBJECTS      16                                   // number of Message Queue Objects</span></div>
+<div class="line"><span class="preprocessor">#define MSGQUEUE_OBJECTS 16                     // number of Message Queue Objects</span></div>
 <div class="line"><span class="preprocessor"></span> </div>
-<div class="line"><span class="keyword">typedef</span> <span class="keyword">struct </span>{                                                   <span class="comment">// object data type</span></div>
+<div class="line"><span class="keyword">typedef</span> <span class="keyword">struct </span>{                                <span class="comment">// object data type</span></div>
 <div class="line">  uint8_t Buf[32];</div>
 <div class="line">  uint8_t Idx;</div>
 <div class="line">} MSGQUEUE_OBJ_t;</div>
 <div class="line"> </div>
-<div class="line"><a class="code" href="cmsis__os2_8h.html#a206dbc05367e03c39fc6d4d1ebcff317">osMessageQueueId_t</a> mid_MsgQueue;                                   <span class="comment">// message queue id</span></div>
+<div class="line"><a class="code" href="cmsis__os2_8h.html#a206dbc05367e03c39fc6d4d1ebcff317">osMessageQueueId_t</a> mid_MsgQueue;                <span class="comment">// message queue id</span></div>
+<div class="line"> </div>
+<div class="line"><a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> tid_Thread_MsgQueue1;              <span class="comment">// thread id 1</span></div>
+<div class="line"><a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> tid_Thread_MsgQueue2;              <span class="comment">// thread id 2</span></div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> Thread_MsgQueue1 (<span class="keywordtype">void</span> *argument);         <span class="comment">// thread function 1</span></div>
+<div class="line"><span class="keywordtype">void</span> Thread_MsgQueue2 (<span class="keywordtype">void</span> *argument);         <span class="comment">// thread function 2</span></div>
 <div class="line"> </div>
 <div class="line"><span class="keywordtype">int</span> Init_MsgQueue (<span class="keywordtype">void</span>) {</div>
-<div class="line">  </div>
+<div class="line"> </div>
 <div class="line">  mid_MsgQueue = <a class="code" href="group__CMSIS__RTOS__Message.html#ga24e895a00f9d484db33aaf784c57bfed">osMessageQueueNew</a>(MSGQUEUE_OBJECTS, <span class="keyword">sizeof</span>(MSGQUEUE_OBJ_t), NULL);</div>
-<div class="line">  <span class="keywordflow">if</span> (!mid_MsgQueue) {</div>
+<div class="line">  <span class="keywordflow">if</span> (mid_MsgQueue == NULL) {</div>
 <div class="line">    ; <span class="comment">// Message Queue object not created, handle failure</span></div>
 <div class="line">  }</div>
-<div class="line">  </div>
-<div class="line">  tid_Thread_MsgQueue1 = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a> (Thread_MsgQueue1, NULL, NULL);</div>
-<div class="line">  <span class="keywordflow">if</span> (!tid_Thread_MsgQueue1) <span class="keywordflow">return</span>(-1);</div>
-<div class="line">  tid_Thread_MsgQueue2 = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a> (Thread_MsgQueue2, NULL, NULL);</div>
-<div class="line">  <span class="keywordflow">if</span> (!tid_Thread_MsgQueue2) <span class="keywordflow">return</span>(-1);</div>
-<div class="line">  </div>
+<div class="line"> </div>
+<div class="line">  tid_Thread_MsgQueue1 = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>(Thread_MsgQueue1, NULL, NULL);</div>
+<div class="line">  <span class="keywordflow">if</span> (tid_Thread_MsgQueue1 == NULL) {</div>
+<div class="line">    <span class="keywordflow">return</span>(-1);</div>
+<div class="line">  }</div>
+<div class="line">  tid_Thread_MsgQueue2 = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>(Thread_MsgQueue2, NULL, NULL);</div>
+<div class="line">  <span class="keywordflow">if</span> (tid_Thread_MsgQueue2 == NULL) {</div>
+<div class="line">    <span class="keywordflow">return</span>(-1);</div>
+<div class="line">  }</div>
+<div class="line"> </div>
 <div class="line">  <span class="keywordflow">return</span>(0);</div>
 <div class="line">}</div>
 <div class="line"> </div>
 <div class="line"><span class="keywordtype">void</span> Thread_MsgQueue1 (<span class="keywordtype">void</span> *argument) {</div>
 <div class="line">  MSGQUEUE_OBJ_t msg;</div>
-<div class="line"></div>
+<div class="line"> </div>
 <div class="line">  <span class="keywordflow">while</span> (1) {</div>
 <div class="line">    ; <span class="comment">// Insert thread code here...</span></div>
-<div class="line">    msg.Buf[0] = 0x55;                                           <span class="comment">// do some work...</span></div>
-<div class="line">    msg.Idx    = 0;</div>
-<div class="line">    <a class="code" href="group__CMSIS__RTOS__Message.html#gaa515fc8b956f721a8f72b2c505813bfc">osMessageQueuePut</a> (mid_MsgQueue, &amp;msg, 0, NULL);</div>
-<div class="line">    <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gad01c7ec26535b1de6b018bb9466720e2">osThreadYield</a> ();                                              <span class="comment">// suspend thread</span></div>
+<div class="line">    msg.Buf[0] = 0x55U;                                         <span class="comment">// do some work...</span></div>
+<div class="line">    msg.Idx    = 0U;</div>
+<div class="line">    <a class="code" href="group__CMSIS__RTOS__Message.html#gaa515fc8b956f721a8f72b2c505813bfc">osMessageQueuePut</a>(mid_MsgQueue, &amp;msg, 0U, 0U);</div>
+<div class="line">    <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gad01c7ec26535b1de6b018bb9466720e2">osThreadYield</a>();                                            <span class="comment">// suspend thread</span></div>
 <div class="line">  }</div>
 <div class="line">}</div>
 <div class="line"> </div>
 <div class="line"><span class="keywordtype">void</span> Thread_MsgQueue2 (<span class="keywordtype">void</span> *argument) {</div>
-<div class="line"></div>
 <div class="line">  MSGQUEUE_OBJ_t msg;</div>
 <div class="line">  osStatus_t status;</div>
-<div class="line"></div>
+<div class="line"> </div>
 <div class="line">  <span class="keywordflow">while</span> (1) {</div>
 <div class="line">    ; <span class="comment">// Insert thread code here...</span></div>
-<div class="line">    status = <a class="code" href="group__CMSIS__RTOS__Message.html#gad90d4959466a7a65105061da8256ab9e">osMessageQueueGet</a> (mid_MsgQueue, &amp;msg, NULL, NULL);  <span class="comment">// wait for message</span></div>
+<div class="line">    status = <a class="code" href="group__CMSIS__RTOS__Message.html#gad90d4959466a7a65105061da8256ab9e">osMessageQueueGet</a>(mid_MsgQueue, &amp;msg, NULL, 0U);   <span class="comment">// wait for message</span></div>
 <div class="line">    <span class="keywordflow">if</span> (status == <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813ea9e1c9e2550bb4de8969a935acffc968f">osOK</a>) {</div>
-<div class="line">        ; <span class="comment">// process data</span></div>
+<div class="line">      ; <span class="comment">// process data</span></div>
 <div class="line">    }</div>
 <div class="line">  }</div>
 <div class="line">}</div>
@@ -486,7 +490,7 @@
 <li><em>osOK:</em> the message has been retrieved from the queue.</li>
 <li><em>osErrorTimeout:</em> the message could not be retrieved from the queue in the given time (timed-wait semantics).</li>
 <li><em>osErrorResource:</em> nothing to get from the queue (try semantics).</li>
-<li><em>osErrorParameter:</em> the parameter <em>mq_id</em> is incorrect, non-zero timeout specified in an ISR.</li>
+<li><em>osErrorParameter:</em> parameter <em>mq_id</em> is <span class="XML-Token">NULL</span> or invalid, non-zero timeout specified in an ISR.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>May be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a> if the parameter <em>timeout</em> is set to <span class="XML-Token">0</span>.</dd></dl>
 <p><b>Code Example</b></p>
@@ -619,7 +623,7 @@
 <ul>
 <li><em>osOK:</em> the message queue has been rest.</li>
 <li><em>osErrorParameter:</em> parameter <em>mq_id</em> is <span class="XML-Token">NULL</span> or invalid.</li>
-<li><em>osErrorResource:</em> the message queue specified by parameter <em>mq_id</em> is in an invalid message queue state.</li>
+<li><em>osErrorResource:</em> the message queue is in an invalid state.</li>
 <li><em>osErrorISR:</em> <b>osMessageQueueReset</b> cannot be called from interrupt service routines.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>. </dd></dl>
@@ -651,7 +655,7 @@
 <ul>
 <li><em>osOK:</em> the message queue object has been deleted.</li>
 <li><em>osErrorParameter:</em> parameter <em>mq_id</em> is <span class="XML-Token">NULL</span> or invalid.</li>
-<li><em>osErrorResource:</em> the message queue specified by parameter <em>mq_id</em> is in an invalid message queue state.</li>
+<li><em>osErrorResource:</em> the message queue is in an invalid state.</li>
 <li><em>osErrorISR:</em> <b>osMessageQueueDelete</b> cannot be called from interrupt service routines.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>. </dd></dl>
@@ -663,7 +667,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/group__CMSIS__RTOS__MutexMgmt.html b/docs/RTOS2/html/group__CMSIS__RTOS__MutexMgmt.html
index 9b6d2ee..e094921 100644
--- a/docs/RTOS2/html/group__CMSIS__RTOS__MutexMgmt.html
+++ b/docs/RTOS2/html/group__CMSIS__RTOS__MutexMgmt.html
@@ -254,18 +254,18 @@
 <dl class="section note"><dt>Note</dt><dd>The maximum amount of recursive locks possible is implementation specific, i.e. the type size used for the lock count. If the maximum amount of recursive locks is depleted mutex acquire might fail.</dd></dl>
 <p><b>Code Example</b> </p>
 <div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span></div>
-<div class="line">  </div>
-<div class="line"><a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#ga313801836c62deb23055efb55a420e42">osMutexId_t</a> mutex_id;  </div>
-<div class="line">  </div>
+<div class="line"> </div>
+<div class="line"><a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#ga313801836c62deb23055efb55a420e42">osMutexId_t</a> mutex_id; </div>
+<div class="line"> </div>
 <div class="line"><span class="keyword">const</span> <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#structosMutexAttr__t">osMutexAttr_t</a> Thread_Mutex_attr = {</div>
 <div class="line">  <span class="stringliteral">&quot;myThreadMutex&quot;</span>,     <span class="comment">// human readable mutex name</span></div>
 <div class="line">  <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#ga65c2482cc64a35d03871f3180f305926">osMutexRecursive</a>,    <span class="comment">// attr_bits</span></div>
 <div class="line">  NULL,                <span class="comment">// memory for control block   </span></div>
 <div class="line">  0U                   <span class="comment">// size for control block</span></div>
 <div class="line">};</div>
-<div class="line">  </div>
+<div class="line"> </div>
 <div class="line"><span class="comment">// must be called from a thread context</span></div>
-<div class="line"><span class="keywordtype">void</span> UseMutexRecursively(<span class="keywordtype">int</span> count)  {</div>
+<div class="line"><span class="keywordtype">void</span> UseMutexRecursively(<span class="keywordtype">int</span> count) {</div>
 <div class="line">  osStatus_t result = <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#gabc54686ea0fc281823b1763422d2a924">osMutexAcquire</a>(mutex_id, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga9eb9a7a797a42e4b55eb171ecc609ddb">osWaitForever</a>);  <span class="comment">// lock count is incremented, might fail when lock count is depleted</span></div>
 <div class="line">  <span class="keywordflow">if</span> (result == <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813ea9e1c9e2550bb4de8969a935acffc968f">osOK</a>) {</div>
 <div class="line">    <span class="keywordflow">if</span> (count &lt; 10) {</div>
@@ -292,38 +292,38 @@
 <p><b>Code Example</b></p>
 <p>This example reveals a blocked high priority thread if <a class="el" href="group__CMSIS__RTOS__MutexMgmt.html#ga40fba270cb31a977b3bd551d41eb9599">osMutexPrioInherit</a> is removed.</p>
 <div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span></div>
-<div class="line">  </div>
+<div class="line"> </div>
 <div class="line"><a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#ga313801836c62deb23055efb55a420e42">osMutexId_t</a> mutex_id;  </div>
-<div class="line">  </div>
+<div class="line"> </div>
 <div class="line"><span class="keyword">const</span> <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#structosMutexAttr__t">osMutexAttr_t</a> Thread_Mutex_attr = {</div>
 <div class="line">  <span class="stringliteral">&quot;myThreadMutex&quot;</span>,     <span class="comment">// human readable mutex name</span></div>
 <div class="line">  <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#ga40fba270cb31a977b3bd551d41eb9599">osMutexPrioInherit</a>,  <span class="comment">// attr_bits</span></div>
 <div class="line">  NULL,                <span class="comment">// memory for control block   </span></div>
 <div class="line">  0U                   <span class="comment">// size for control block</span></div>
 <div class="line">};</div>
-<div class="line">  </div>
+<div class="line"> </div>
 <div class="line"><span class="keywordtype">void</span> HighPrioThread(<span class="keywordtype">void</span> *argument) {</div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a>(1000); <span class="comment">// wait 1s until start actual work</span></div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a>(1000U); <span class="comment">// wait 1s until start actual work</span></div>
 <div class="line">  <span class="keywordflow">while</span>(1) {</div>
 <div class="line">    <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#gabc54686ea0fc281823b1763422d2a924">osMutexAcquire</a>(mutex_id, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga9eb9a7a797a42e4b55eb171ecc609ddb">osWaitForever</a>); <span class="comment">// try to acquire mutex</span></div>
 <div class="line">    <span class="comment">// do stuff</span></div>
 <div class="line">    <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#gaea629705703580ff58776bf73c8db915">osMutexRelease</a>(mutex_id);</div>
 <div class="line">  }</div>
 <div class="line">}</div>
-<div class="line">  </div>
+<div class="line"> </div>
 <div class="line"><span class="keywordtype">void</span> MidPrioThread(<span class="keywordtype">void</span> *argument) {</div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a>(1000); <span class="comment">// wait 1s until start actual work</span></div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a>(1000U); <span class="comment">// wait 1s until start actual work</span></div>
 <div class="line">  <span class="keywordflow">while</span>(1) {</div>
 <div class="line">    <span class="comment">// do non blocking stuff</span></div>
 <div class="line">  }</div>
 <div class="line">}</div>
-<div class="line">  </div>
+<div class="line"> </div>
 <div class="line"><span class="keywordtype">void</span> LowPrioThread(<span class="keywordtype">void</span> *argument) {</div>
 <div class="line">  <span class="keywordflow">while</span>(1) {</div>
 <div class="line">    <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#gabc54686ea0fc281823b1763422d2a924">osMutexAcquire</a>(mutex_id, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga9eb9a7a797a42e4b55eb171ecc609ddb">osWaitForever</a>);</div>
-<div class="line">    <a class="code" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a>(5000); <span class="comment">// block mutex for 5s</span></div>
+<div class="line">    <a class="code" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a>(5000U); <span class="comment">// block mutex for 5s</span></div>
 <div class="line">    <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#gaea629705703580ff58776bf73c8db915">osMutexRelease</a>(mutex_id);</div>
-<div class="line">    <a class="code" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a>(5000); <span class="comment">// sleep for 5s</span></div>
+<div class="line">    <a class="code" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a>(5000U); <span class="comment">// sleep for 5s</span></div>
 <div class="line">  }</div>
 <div class="line">}</div>
 </div><!-- fragment --><p>During the first second the high and mid priority threads are delayed. Thus the low priority thread can start its work, acquires the mutex and delays while holding it.</p>
@@ -348,16 +348,16 @@
 <p><b>Code Example</b></p>
 <p>This example reveals a blocked mutex if osMutexRobust is removed.</p>
 <div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span></div>
-<div class="line">  </div>
-<div class="line"><a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#ga313801836c62deb23055efb55a420e42">osMutexId_t</a> mutex_id;  </div>
-<div class="line">  </div>
+<div class="line"> </div>
+<div class="line"><a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#ga313801836c62deb23055efb55a420e42">osMutexId_t</a> mutex_id;</div>
+<div class="line"> </div>
 <div class="line"><span class="keyword">const</span> <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#structosMutexAttr__t">osMutexAttr_t</a> Thread_Mutex_attr = {</div>
 <div class="line">  <span class="stringliteral">&quot;myThreadMutex&quot;</span>,     <span class="comment">// human readable mutex name</span></div>
 <div class="line">  <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#gaf0e1dee376798b4d516d164981526780">osMutexRobust</a>,       <span class="comment">// attr_bits</span></div>
 <div class="line">  NULL,                <span class="comment">// memory for control block   </span></div>
 <div class="line">  0U                   <span class="comment">// size for control block</span></div>
 <div class="line">};</div>
-<div class="line">  </div>
+<div class="line"> </div>
 <div class="line"><span class="keywordtype">void</span> Thread(<span class="keywordtype">void</span> *argument) {</div>
 <div class="line">  <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#gabc54686ea0fc281823b1763422d2a924">osMutexAcquire</a>(mutex_id, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga9eb9a7a797a42e4b55eb171ecc609ddb">osWaitForever</a>);</div>
 <div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaddaa452dd7610e4096647a566d3556fc">osThreadExit</a>();</div>
@@ -410,21 +410,21 @@
 <dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>.</dd></dl>
 <p><b>Code Example</b> </p>
 <div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span></div>
-<div class="line">  </div>
+<div class="line"> </div>
 <div class="line"><a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#ga313801836c62deb23055efb55a420e42">osMutexId_t</a> mutex_id;  </div>
-<div class="line">  </div>
+<div class="line"> </div>
 <div class="line"><span class="keyword">const</span> <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#structosMutexAttr__t">osMutexAttr_t</a> Thread_Mutex_attr = {</div>
 <div class="line">  <span class="stringliteral">&quot;myThreadMutex&quot;</span>,                          <span class="comment">// human readable mutex name</span></div>
 <div class="line">  <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#ga65c2482cc64a35d03871f3180f305926">osMutexRecursive</a> | <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#ga40fba270cb31a977b3bd551d41eb9599">osMutexPrioInherit</a>,    <span class="comment">// attr_bits</span></div>
 <div class="line">  NULL,                                     <span class="comment">// memory for control block   </span></div>
 <div class="line">  0U                                        <span class="comment">// size for control block</span></div>
-<div class="line">  };</div>
-<div class="line">  </div>
+<div class="line">};</div>
+<div class="line"> </div>
 <div class="line"><span class="keywordtype">void</span> CreateMutex (<span class="keywordtype">void</span>)  {</div>
 <div class="line">  mutex_id = <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#gab90920022ab944296821368ef6bb52f8">osMutexNew</a>(&amp;Thread_Mutex_attr);</div>
 <div class="line">  <span class="keywordflow">if</span> (mutex_id != NULL)  {</div>
 <div class="line">    <span class="comment">// Mutex object created</span></div>
-<div class="line">  }   </div>
+<div class="line">  }</div>
 <div class="line">}</div>
 </div><!-- fragment --> 
 </div>
@@ -496,21 +496,21 @@
 <ul>
 <li><em>osOK:</em> the mutex has been obtained.</li>
 <li><em>osErrorTimeout:</em> the mutex could not be obtained in the given time.</li>
+<li><em>osErrorResource:</em> the mutex could not be obtained when no <em>timeout</em> was specified.</li>
 <li><em>osErrorParameter:</em> parameter <em>mutex_id</em> is <span class="XML-Token">NULL</span> or invalid.</li>
-<li><em>osErrorResource:</em> the mutex specified by parameter <em>mutex_id</em> is in an invalid mutex state or the mutex could not be obtained when no <em>timeout</em> was specified.</li>
 <li><em>osErrorISR:</em> cannot be called from interrupt service routines.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>.</dd></dl>
 <p><b>Code Example</b> </p>
 <div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span></div>
-<div class="line">  </div>
-<div class="line"><span class="keywordtype">void</span> WaitMutex (<span class="keywordtype">void</span>)  {</div>
-<div class="line"><a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#ga313801836c62deb23055efb55a420e42">osMutexId_t</a> mutex_id;   </div>
-<div class="line">osStatus_t  status;</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> WaitMutex (<span class="keywordtype">void</span>) {</div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#ga313801836c62deb23055efb55a420e42">osMutexId_t</a> mutex_id;</div>
+<div class="line">  osStatus_t  status;</div>
 <div class="line"> </div>
 <div class="line">  mutex_id = <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#gab90920022ab944296821368ef6bb52f8">osMutexNew</a>(NULL);</div>
-<div class="line">  <span class="keywordflow">if</span> (mutex_id != NULL)  {</div>
-<div class="line">    status  = <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#gabc54686ea0fc281823b1763422d2a924">osMutexAcquire</a>(mutex_id, 0);</div>
+<div class="line">  <span class="keywordflow">if</span> (mutex_id != NULL) {</div>
+<div class="line">    status = <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#gabc54686ea0fc281823b1763422d2a924">osMutexAcquire</a>(mutex_id, 0U);</div>
 <div class="line">    <span class="keywordflow">if</span> (status != <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813ea9e1c9e2550bb4de8969a935acffc968f">osOK</a>)  {</div>
 <div class="line">      <span class="comment">// handle failure code</span></div>
 <div class="line">    }</div>
@@ -543,19 +543,19 @@
 <p>Possible <a class="el" href="group__CMSIS__RTOS__Definitions.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813e">osStatus_t</a> return values:</p>
 <ul>
 <li><em>osOK:</em> the mutex has been correctly released.</li>
+<li><em>osErrorResource:</em> the mutex could not be released (mutex was not acquired or running thread is not the owner).</li>
 <li><em>osErrorParameter:</em> parameter <em>mutex_id</em> is <span class="XML-Token">NULL</span> or invalid.</li>
-<li><em>osErrorResource:</em> the mutex specified by parameter <em>mutex_id</em> is in an invalid mutex state or the mutex was not obtained before/the current thread is not the owner of the mutex.</li>
 <li><em>osErrorISR:</em> <b>osMutexRelease</b> cannot be called from interrupt service routines.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>.</dd></dl>
 <p><b>Code Example</b> </p>
 <div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span></div>
-<div class="line">  </div>
+<div class="line"> </div>
 <div class="line"><a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#ga313801836c62deb23055efb55a420e42">osMutexId_t</a> mutex_id;                                        <span class="comment">// Mutex id populated by the function osMutexNew()</span></div>
 <div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> ReleaseMutex (<a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#ga313801836c62deb23055efb55a420e42">osMutexId_t</a> mutex_id)  {</div>
+<div class="line"><span class="keywordtype">void</span> ReleaseMutex (<a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#ga313801836c62deb23055efb55a420e42">osMutexId_t</a> mutex_id) {</div>
 <div class="line">  osStatus_t status;</div>
-<div class="line">  </div>
+<div class="line"> </div>
 <div class="line">  <span class="keywordflow">if</span> (mutex_id != NULL)  {</div>
 <div class="line">    status = <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#gaea629705703580ff58776bf73c8db915">osMutexRelease</a>(mutex_id);</div>
 <div class="line">    <span class="keywordflow">if</span> (status != <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813ea9e1c9e2550bb4de8969a935acffc968f">osOK</a>)  {</div>
@@ -616,18 +616,18 @@
 <ul>
 <li><em>osOK:</em> the mutex object has been deleted.</li>
 <li><em>osErrorParameter:</em> parameter <em>mutex_id</em> is <span class="XML-Token">NULL</span> or invalid.</li>
-<li><em>osErrorResource:</em> the mutex specified by parameter <em>mutex_id</em> is in an invalid mutex state.</li>
+<li><em>osErrorResource:</em> the mutex is in an invalid state.</li>
 <li><em>osErrorISR:</em> <b>osMutexDelete</b> cannot be called from interrupt service routines.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>.</dd></dl>
 <p><b>Code Example</b> </p>
 <div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span></div>
-<div class="line">  </div>
-<div class="line"><a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#ga313801836c62deb23055efb55a420e42">osMutexId_t</a> mutex_id;                            <span class="comment">// Mutex id populated by the function osMutexNew()</span></div>
+<div class="line"> </div>
+<div class="line"><a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#ga313801836c62deb23055efb55a420e42">osMutexId_t</a> mutex_id;                           <span class="comment">// Mutex id populated by the function osMutexNew()</span></div>
 <div class="line"> </div>
 <div class="line"><span class="keywordtype">void</span> DeleteMutex (<a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#ga313801836c62deb23055efb55a420e42">osMutexId_t</a> mutex_id)  {</div>
 <div class="line">  osStatus_t status;</div>
-<div class="line">  </div>
+<div class="line"> </div>
 <div class="line">  <span class="keywordflow">if</span> (mutex_id != NULL)  {</div>
 <div class="line">    status = <a class="code" href="group__CMSIS__RTOS__MutexMgmt.html#gabee73ad227ba4587d3db12ef9bd582bc">osMutexDelete</a>(mutex_id);</div>
 <div class="line">    <span class="keywordflow">if</span> (status != <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813ea9e1c9e2550bb4de8969a935acffc968f">osOK</a>)  {</div>
@@ -643,7 +643,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/group__CMSIS__RTOS__PoolMgmt.html b/docs/RTOS2/html/group__CMSIS__RTOS__PoolMgmt.html
index aacfbb5..b7c9827 100644
--- a/docs/RTOS2/html/group__CMSIS__RTOS__PoolMgmt.html
+++ b/docs/RTOS2/html/group__CMSIS__RTOS__PoolMgmt.html
@@ -303,33 +303,33 @@
 <p>The total amount of memory needed is at least <code>block_count * block_size</code>. Memory from the pool can only be allocated/freed in fixed portions of <code>block_size</code>.</p>
 <dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>.</dd></dl>
 <p><b>Code</b> <b>Example</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span>                                        <span class="comment">// CMSIS RTOS header file</span></div>
+<div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span>                          <span class="comment">// CMSIS RTOS header file</span></div>
 <div class="line"> </div>
 <div class="line"><span class="comment">/*----------------------------------------------------------------------------</span></div>
 <div class="line"><span class="comment"> *      Memory Pool creation &amp; usage</span></div>
 <div class="line"><span class="comment"> *---------------------------------------------------------------------------*/</span></div>
 <div class="line"> </div>
-<div class="line"><span class="preprocessor">#define MEMPOOL_OBJECTS      16                               // number of Memory Pool Objects</span></div>
+<div class="line"><span class="preprocessor">#define MEMPOOL_OBJECTS 16                      // number of Memory Pool Objects</span></div>
 <div class="line"><span class="preprocessor"></span> </div>
-<div class="line"><span class="keyword">typedef</span> <span class="keyword">struct </span>{                                              <span class="comment">// object data type</span></div>
+<div class="line"><span class="keyword">typedef</span> <span class="keyword">struct </span>{                                <span class="comment">// object data type</span></div>
 <div class="line">  uint8_t Buf[32];</div>
 <div class="line">  uint8_t Idx;</div>
 <div class="line">} MEM_BLOCK_t;</div>
 <div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> Thread_MemPool (<span class="keywordtype">void</span> *argument);                         <span class="comment">// thread function</span></div>
-<div class="line"><a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> tid_Thread_MemPool;                              <span class="comment">// thread id</span></div>
+<div class="line"><a class="code" href="group__CMSIS__RTOS__PoolMgmt.html#ga2e44473caf338266f56800960294f960">osMemoryPoolId_t</a> mpid_MemPool;                  <span class="comment">// memory pool id</span></div>
 <div class="line"> </div>
-<div class="line"><a class="code" href="group__CMSIS__RTOS__PoolMgmt.html#ga2e44473caf338266f56800960294f960">osMemoryPoolId_t</a> mpid_MemPool;                                <span class="comment">// memory pool id</span></div>
+<div class="line"><a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> tid_Thread_MemPool;                <span class="comment">// thread id</span></div>
 <div class="line"> </div>
-<div class="line"><span class="keywordtype">int</span> Init_MemPool (<span class="keywordtype">void</span>)</div>
-<div class="line">{</div>
+<div class="line"><span class="keywordtype">void</span> Thread_MemPool (<span class="keywordtype">void</span> *argument);           <span class="comment">// thread function</span></div>
 <div class="line"> </div>
-<div class="line">  mpid_MemPool = <a class="code" href="group__CMSIS__RTOS__PoolMgmt.html#ga497ced5d72dc5cd405c4c418516220dc">osMemoryPoolNew</a>(MEMPOOL_OBJECTS,<span class="keyword">sizeof</span>(MEM_BLOCK_t), NULL);</div>
+<div class="line"><span class="keywordtype">int</span> Init_MemPool (<span class="keywordtype">void</span>) {</div>
+<div class="line"> </div>
+<div class="line">  mpid_MemPool = <a class="code" href="group__CMSIS__RTOS__PoolMgmt.html#ga497ced5d72dc5cd405c4c418516220dc">osMemoryPoolNew</a>(MEMPOOL_OBJECTS, <span class="keyword">sizeof</span>(MEM_BLOCK_t), NULL);</div>
 <div class="line">  <span class="keywordflow">if</span> (mpid_MemPool == NULL) {</div>
 <div class="line">    ; <span class="comment">// MemPool object not created, handle failure</span></div>
 <div class="line">  }</div>
 <div class="line"> </div>
-<div class="line">  tid_Thread_MemPool = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a> (Thread_MemPool,NULL , NULL);</div>
+<div class="line">  tid_Thread_MemPool = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>(Thread_MemPool, NULL, NULL);</div>
 <div class="line">  <span class="keywordflow">if</span> (tid_Thread_MemPool == NULL) {</div>
 <div class="line">    <span class="keywordflow">return</span>(-1);</div>
 <div class="line">  }</div>
@@ -337,33 +337,32 @@
 <div class="line">  <span class="keywordflow">return</span>(0);</div>
 <div class="line">}</div>
 <div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> Thread_MemPool (<span class="keywordtype">void</span> *argument)</div>
-<div class="line">{</div>
-<div class="line">  osStatus_t     status;</div>
-<div class="line">  MEM_BLOCK_t *pMem = 0;</div>
+<div class="line"><span class="keywordtype">void</span> Thread_MemPool (<span class="keywordtype">void</span> *argument) {</div>
+<div class="line">  MEM_BLOCK_t *pMem;</div>
+<div class="line">  osStatus_t status;</div>
 <div class="line"> </div>
 <div class="line">  <span class="keywordflow">while</span> (1) {</div>
 <div class="line">    ; <span class="comment">// Insert thread code here...</span></div>
 <div class="line"> </div>
-<div class="line">    pMem = (MEM_BLOCK_t *)<a class="code" href="group__CMSIS__RTOS__PoolMgmt.html#ga8ead54e99ccb8f112356c88f99d38fbe">osMemoryPoolAlloc</a> (mpid_MemPool, NULL);    <span class="comment">// get Mem Block</span></div>
-<div class="line">    <span class="keywordflow">if</span> (pMem) {                                                      <span class="comment">// Mem Block was available</span></div>
-<div class="line">      pMem-&gt;Buf[0] = 0x55;                                           <span class="comment">// do some work...</span></div>
-<div class="line">      pMem-&gt;Idx    = 0;</div>
+<div class="line">    pMem = (MEM_BLOCK_t *)<a class="code" href="group__CMSIS__RTOS__PoolMgmt.html#ga8ead54e99ccb8f112356c88f99d38fbe">osMemoryPoolAlloc</a>(mpid_MemPool, 0U);  <span class="comment">// get Mem Block</span></div>
+<div class="line">    <span class="keywordflow">if</span> (pMem != NULL) {                                         <span class="comment">// Mem Block was available</span></div>
+<div class="line">      pMem-&gt;Buf[0] = 0x55U;                                     <span class="comment">// do some work...</span></div>
+<div class="line">      pMem-&gt;Idx    = 0U;</div>
 <div class="line"> </div>
-<div class="line">      status = <a class="code" href="group__CMSIS__RTOS__PoolMgmt.html#gabb4f4560daa6d1f8c8789082ee186d16">osMemoryPoolFree</a> (mpid_MemPool, pMem);                <span class="comment">// free mem block</span></div>
+<div class="line">      status = <a class="code" href="group__CMSIS__RTOS__PoolMgmt.html#gabb4f4560daa6d1f8c8789082ee186d16">osMemoryPoolFree</a>(mpid_MemPool, pMem);            <span class="comment">// free mem block</span></div>
 <div class="line">      <span class="keywordflow">switch</span> (status)  {</div>
-<div class="line">      <span class="keywordflow">case</span> <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813ea9e1c9e2550bb4de8969a935acffc968f">osOK</a>:</div>
-<div class="line">        <span class="keywordflow">break</span>;</div>
-<div class="line">      <span class="keywordflow">case</span> <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813eac24adca6a5d072c9f01c32178ba0d109">osErrorParameter</a>:</div>
-<div class="line">        <span class="keywordflow">break</span>;</div>
-<div class="line">      <span class="keywordflow">case</span> <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813eaf1fac0240218e51eb30a13da2f8aae81">osErrorNoMemory</a>:</div>
-<div class="line">        <span class="keywordflow">break</span>;</div>
-<div class="line">      <span class="keywordflow">default</span>:</div>
-<div class="line">        <span class="keywordflow">break</span>;</div>
+<div class="line">        <span class="keywordflow">case</span> <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813ea9e1c9e2550bb4de8969a935acffc968f">osOK</a>:</div>
+<div class="line">          <span class="keywordflow">break</span>;</div>
+<div class="line">        <span class="keywordflow">case</span> <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813eac24adca6a5d072c9f01c32178ba0d109">osErrorParameter</a>:</div>
+<div class="line">          <span class="keywordflow">break</span>;</div>
+<div class="line">        <span class="keywordflow">case</span> <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813eaf1fac0240218e51eb30a13da2f8aae81">osErrorNoMemory</a>:</div>
+<div class="line">          <span class="keywordflow">break</span>;</div>
+<div class="line">        <span class="keywordflow">default</span>:</div>
+<div class="line">          <span class="keywordflow">break</span>;</div>
 <div class="line">      }</div>
 <div class="line">    }</div>
 <div class="line"> </div>
-<div class="line">    <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gad01c7ec26535b1de6b018bb9466720e2">osThreadYield</a> ();                                                <span class="comment">// suspend thread</span></div>
+<div class="line">    <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gad01c7ec26535b1de6b018bb9466720e2">osThreadYield</a>();                                            <span class="comment">// suspend thread</span></div>
 <div class="line">  }</div>
 <div class="line">}</div>
 </div><!-- fragment --> 
@@ -479,7 +478,7 @@
 <ul>
 <li><em>osOK:</em> the memory has been freed.</li>
 <li><em>osErrorParameter:</em> parameter <em>mp_id</em> is <span class="XML-Token">NULL</span> or invalid, <em>block</em> points to invalid memory.</li>
-<li><em>osErrorResource:</em> the memory pool specified by parameter <em>mp_id</em> is in an invalid memory pool state.</li>
+<li><em>osErrorResource:</em> the memory pool is in an invalid state.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd><b>osMemoryPoolFree</b> may perform certain checks on the <em>block</em> pointer given. But using <b>osMemoryPoolFree</b> with a pointer other than one received from <a class="el" href="group__CMSIS__RTOS__PoolMgmt.html#ga8ead54e99ccb8f112356c88f99d38fbe">osMemoryPoolAlloc</a> has <b>UNPREDICTED</b> behaviour.</dd>
 <dd>
@@ -614,7 +613,7 @@
 <ul>
 <li><em>osOK:</em> the memory pool object has been deleted.</li>
 <li><em>osErrorParameter:</em> parameter <em>mp_id</em> is <span class="XML-Token">NULL</span> or invalid.</li>
-<li><em>osErrorResource:</em> the memory pool specified by parameter <em>mp_id</em> is in an invalid memory pool state.</li>
+<li><em>osErrorResource:</em> the memory pool is in an invalid state.</li>
 <li><em>osErrorISR:</em> <b>osMemoryPoolDelete</b> cannot be called from interrupt service routines.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>. </dd></dl>
@@ -626,7 +625,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/group__CMSIS__RTOS__SemaphoreMgmt.html b/docs/RTOS2/html/group__CMSIS__RTOS__SemaphoreMgmt.html
index 38d76d2..8434253 100644
--- a/docs/RTOS2/html/group__CMSIS__RTOS__SemaphoreMgmt.html
+++ b/docs/RTOS2/html/group__CMSIS__RTOS__SemaphoreMgmt.html
@@ -172,39 +172,36 @@
 <p>To allow multiple threads to run the function, initialize a semaphore to the maximum number of threads that can be allowed. The number of tokens in the semaphore represents the number of additional threads that may enter. If this number is zero, then the next thread trying to access the function will have to wait until one of the other threads exits and releases its token. When all threads have exited the token number is back to n. The following example shows the code for one of the threads that might access the resource:</p>
 <div class="fragment"><div class="line"><a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga6e1c1c4b04175bb92b013c8f37249f40">osSemaphoreId_t</a> multiplex_id;</div>
 <div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> thread_n (<span class="keywordtype">void</span>)</div>
-<div class="line">{</div>
-<div class="line">  multiplex_id = <a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga2a39806ace781a0008a4374ca701b14a">osSemaphoreNew</a>(3, 3, NULL);</div>
-<div class="line">  <span class="keywordflow">while</span>(1)</div>
-<div class="line">    {</div>
-<div class="line">      <a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga7e94c8b242a0c81f2cc79ec22895c87b">osSemaphoreAcquire</a>(multiplex_id, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga9eb9a7a797a42e4b55eb171ecc609ddb">osWaitForever</a>);</div>
-<div class="line">      <span class="comment">// do something</span></div>
-<div class="line">      <a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga0abcee1b5449d7a6928fb9248c690bb6">osSemaphoreRelease</a>(multiplex_id);</div>
-<div class="line">    }</div>
+<div class="line"><span class="keywordtype">void</span> thread_n (<span class="keywordtype">void</span>) {</div>
+<div class="line"> </div>
+<div class="line">  multiplex_id = <a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga2a39806ace781a0008a4374ca701b14a">osSemaphoreNew</a>(3U, 3U, NULL);</div>
+<div class="line">  <span class="keywordflow">while</span>(1) {</div>
+<div class="line">    <a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga7e94c8b242a0c81f2cc79ec22895c87b">osSemaphoreAcquire</a>(multiplex_id, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga9eb9a7a797a42e4b55eb171ecc609ddb">osWaitForever</a>);</div>
+<div class="line">    <span class="comment">// do something</span></div>
+<div class="line">    <a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga0abcee1b5449d7a6928fb9248c690bb6">osSemaphoreRelease</a>(multiplex_id);</div>
+<div class="line">  }</div>
 <div class="line">}</div>
 </div><!-- fragment --><p><b>Producer/Consumer Semaphore</b></p>
 <p>The producer-consumer problem can be solved using two semaphores.</p>
 <p>A first semaphore (<span class="XML-Token">empty_id</span>) counts down the available (empty) buffers, i.e. the producer thread can wait for available buffer slots by acquiring from this one.</p>
 <p>A second semaphore (<span class="XML-Token">filled_id</span>) counts up the used (filled) buffers, i.e. the consumer thread can wait for available data by acquiring from this one.</p>
 <p>It is crucial for the correct behaviour that the threads acquire and release on both semaphores in the given sequence. According to this example one can have multiple producer and/or consumer threads running concurrently.</p>
-<div class="fragment"><div class="line"><span class="preprocessor">#define BUFFER_SIZE 10</span></div>
-<div class="line"><span class="preprocessor"></span><a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga6e1c1c4b04175bb92b013c8f37249f40">osSemaphoreId_t</a> empty_id = <a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga2a39806ace781a0008a4374ca701b14a">osSemaphoreNew</a>(BUFFER_SIZE, BUFFER_SIZE, NULL);</div>
-<div class="line"><a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga6e1c1c4b04175bb92b013c8f37249f40">osSemaphoreId_t</a> filled_id = <a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga2a39806ace781a0008a4374ca701b14a">osSemaphoreNew</a>(BUFFER_SIZE, 0, NULL);</div>
-<div class="line"></div>
-<div class="line"><span class="keywordtype">void</span> producer_thread (<span class="keywordtype">void</span>)</div>
-<div class="line">{</div>
-<div class="line">  <span class="keywordflow">while</span>(1)</div>
-<div class="line">  {</div>
+<div class="fragment"><div class="line"><span class="preprocessor">#define BUFFER_SIZE 10U</span></div>
+<div class="line"><span class="preprocessor"></span> </div>
+<div class="line"><a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga6e1c1c4b04175bb92b013c8f37249f40">osSemaphoreId_t</a> empty_id = <a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga2a39806ace781a0008a4374ca701b14a">osSemaphoreNew</a>(BUFFER_SIZE, BUFFER_SIZE, NULL);</div>
+<div class="line"><a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga6e1c1c4b04175bb92b013c8f37249f40">osSemaphoreId_t</a> filled_id = <a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga2a39806ace781a0008a4374ca701b14a">osSemaphoreNew</a>(BUFFER_SIZE, 0U, NULL);</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> producer_thread (<span class="keywordtype">void</span>) {</div>
+<div class="line">  <span class="keywordflow">while</span>(1) {</div>
 <div class="line">    <a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga7e94c8b242a0c81f2cc79ec22895c87b">osSemaphoreAcquire</a>(empty_id, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga9eb9a7a797a42e4b55eb171ecc609ddb">osWaitForever</a>);</div>
 <div class="line">    <span class="comment">// produce data</span></div>
 <div class="line">    <a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga0abcee1b5449d7a6928fb9248c690bb6">osSemaphoreRelease</a>(filled_id);</div>
 <div class="line">  }</div>
 <div class="line">}</div>
 <div class="line"></div>
-<div class="line"><span class="keywordtype">void</span> consumer_thread (<span class="keywordtype">void</span>)</div>
-<div class="line">{</div>
-<div class="line">  <span class="keywordflow">while</span>(1)</div>
-<div class="line">  {</div>
+<div class="line"><span class="keywordtype">void</span> consumer_thread (<span class="keywordtype">void</span>) {</div>
+<div class="line"> </div>
+<div class="line">  <span class="keywordflow">while</span>(1){</div>
 <div class="line">    <a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga7e94c8b242a0c81f2cc79ec22895c87b">osSemaphoreAcquire</a>(filled_id, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga9eb9a7a797a42e4b55eb171ecc609ddb">osWaitForever</a>);</div>
 <div class="line">    <span class="comment">// consume data</span></div>
 <div class="line">    <a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga0abcee1b5449d7a6928fb9248c690bb6">osSemaphoreRelease</a>(empty_id);</div>
@@ -321,51 +318,50 @@
 <p>The parameter <em>attr</em> specifies additional semaphore attributes. Default attributes will be used if set to <span class="XML-Token">NULL</span>.</p>
 <dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>.</dd></dl>
 <p><b>Code Example</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span>                                     <span class="comment">// CMSIS RTOS header file</span></div>
+<div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span>                          <span class="comment">// CMSIS RTOS header file</span></div>
 <div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> Thread_Semaphore (<span class="keywordtype">void</span> *argument);                    <span class="comment">// thread function</span></div>
-<div class="line"><a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> tid_Thread_Semaphore;                         <span class="comment">// thread id</span></div>
+<div class="line"><a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga6e1c1c4b04175bb92b013c8f37249f40">osSemaphoreId_t</a> sid_Semaphore;                  <span class="comment">// semaphore id</span></div>
 <div class="line"> </div>
-<div class="line"><a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga6e1c1c4b04175bb92b013c8f37249f40">osSemaphoreId_t</a> sid_Thread_Semaphore;                      <span class="comment">// semaphore id</span></div>
+<div class="line"><a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> tid_Thread_Semaphore;              <span class="comment">// thread id</span></div>
 <div class="line"> </div>
-<div class="line"><span class="keywordtype">int</span> Init_Semaphore (<span class="keywordtype">void</span>)</div>
-<div class="line">{</div>
+<div class="line"><span class="keywordtype">void</span> Thread_Semaphore (<span class="keywordtype">void</span> *argument);         <span class="comment">// thread function</span></div>
 <div class="line"> </div>
-<div class="line">  sid_Thread_Semaphore = <a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga2a39806ace781a0008a4374ca701b14a">osSemaphoreNew</a>(2, 2, NULL);</div>
-<div class="line">  <span class="keywordflow">if</span> (!sid_Thread_Semaphore) {</div>
+<div class="line"><span class="keywordtype">int</span> Init_Semaphore (<span class="keywordtype">void</span>) {</div>
+<div class="line"> </div>
+<div class="line">  sid_Semaphore = <a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga2a39806ace781a0008a4374ca701b14a">osSemaphoreNew</a>(2U, 2U, NULL);</div>
+<div class="line">  <span class="keywordflow">if</span> (sid_Semaphore == NULL) {</div>
 <div class="line">    ; <span class="comment">// Semaphore object not created, handle failure</span></div>
 <div class="line">  }</div>
 <div class="line"> </div>
-<div class="line">  tid_Thread_Semaphore = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a> (Thread_Semaphore, NULL, NULL);</div>
-<div class="line">  <span class="keywordflow">if</span> (!tid_Thread_Semaphore) {</div>
+<div class="line">  tid_Thread_Semaphore = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>(Thread_Semaphore, NULL, NULL);</div>
+<div class="line">  <span class="keywordflow">if</span> (tid_Thread_Semaphore == NULL) {</div>
 <div class="line">    <span class="keywordflow">return</span>(-1);</div>
 <div class="line">  }</div>
 <div class="line"> </div>
 <div class="line">  <span class="keywordflow">return</span>(0);</div>
 <div class="line">}</div>
-<div class="line">  </div>
-<div class="line"><span class="keywordtype">void</span> Thread_Semaphore (<span class="keywordtype">void</span> *argument)</div>
-<div class="line">{</div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> Thread_Semaphore (<span class="keywordtype">void</span> *argument) {</div>
 <div class="line">  osStatus_t val;</div>
 <div class="line"> </div>
 <div class="line">  <span class="keywordflow">while</span> (1) {</div>
 <div class="line">    ; <span class="comment">// Insert thread code here...</span></div>
 <div class="line"> </div>
-<div class="line">    val = <a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga7e94c8b242a0c81f2cc79ec22895c87b">osSemaphoreAcquire</a> (sid_Thread_Semaphore, 10);   <span class="comment">// wait for max. 10 ticks for semaphore token to get available</span></div>
+<div class="line">    val = <a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga7e94c8b242a0c81f2cc79ec22895c87b">osSemaphoreAcquire</a>(sid_Semaphore, 10U);       <span class="comment">// wait for max. 10 ticks for semaphore token to get available</span></div>
 <div class="line">    <span class="keywordflow">switch</span> (val) {</div>
-<div class="line">    <span class="keywordflow">case</span> <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813ea9e1c9e2550bb4de8969a935acffc968f">osOK</a>:</div>
-<div class="line">      ; <span class="comment">// Use protected code here...</span></div>
-<div class="line">      <a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga0abcee1b5449d7a6928fb9248c690bb6">osSemaphoreRelease</a> (sid_Thread_Semaphore);           <span class="comment">// Return a token back to a semaphore</span></div>
-<div class="line">      <span class="keywordflow">break</span>;</div>
-<div class="line">    <span class="keywordflow">case</span> <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813ea8fc5801e8b0482bdf22ad63a77f0155d">osErrorResource</a>:</div>
-<div class="line">      <span class="keywordflow">break</span>;</div>
-<div class="line">    <span class="keywordflow">case</span> <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813eac24adca6a5d072c9f01c32178ba0d109">osErrorParameter</a>:</div>
-<div class="line">      <span class="keywordflow">break</span>;</div>
-<div class="line">    <span class="keywordflow">default</span>:</div>
-<div class="line">      <span class="keywordflow">break</span>;</div>
+<div class="line">      <span class="keywordflow">case</span> <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813ea9e1c9e2550bb4de8969a935acffc968f">osOK</a>:</div>
+<div class="line">        ; <span class="comment">// Use protected code here...</span></div>
+<div class="line">        <a class="code" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga0abcee1b5449d7a6928fb9248c690bb6">osSemaphoreRelease</a>(sid_Semaphore);              <span class="comment">// return a token back to a semaphore</span></div>
+<div class="line">        <span class="keywordflow">break</span>;</div>
+<div class="line">      <span class="keywordflow">case</span> <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813ea8fc5801e8b0482bdf22ad63a77f0155d">osErrorResource</a>:</div>
+<div class="line">        <span class="keywordflow">break</span>;</div>
+<div class="line">      <span class="keywordflow">case</span> <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813eac24adca6a5d072c9f01c32178ba0d109">osErrorParameter</a>:</div>
+<div class="line">        <span class="keywordflow">break</span>;</div>
+<div class="line">      <span class="keywordflow">default</span>:</div>
+<div class="line">        <span class="keywordflow">break</span>;</div>
 <div class="line">    }</div>
 <div class="line"> </div>
-<div class="line">    <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gad01c7ec26535b1de6b018bb9466720e2">osThreadYield</a> ();                                      <span class="comment">// suspend thread</span></div>
+<div class="line">    <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gad01c7ec26535b1de6b018bb9466720e2">osThreadYield</a>();                                    <span class="comment">// suspend thread</span></div>
 <div class="line">  }</div>
 <div class="line">}</div>
 </div><!-- fragment --> 
@@ -436,10 +432,10 @@
 </ul>
 <p>Possible <a class="el" href="group__CMSIS__RTOS__Definitions.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813e">osStatus_t</a> return values:</p>
 <ul>
-<li><em>osOK:</em> the token has been obtained.</li>
+<li><em>osOK:</em> the token has been obtained and the token count decremented.</li>
 <li><em>osErrorTimeout:</em> the token could not be obtained in the given time.</li>
 <li><em>osErrorResource:</em> the token could not be obtained when no <em>timeout</em> was specified.</li>
-<li><em>osErrorParameter:</em> the parameter <em>semaphore_id</em> is incorrect.</li>
+<li><em>osErrorParameter:</em> the parameter <em>semaphore_id</em> is <span class="XML-Token">NULL</span> or invalid.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>May be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a> if the parameter <em>timeout</em> is set to <span class="XML-Token">0</span>.</dd></dl>
 <p><b>Code Example</b></p>
@@ -470,9 +466,9 @@
 <p>The function <b>osSemaphoreRelease</b> releases a token of the semaphore object specified by parameter <em>semaphore_id</em>. Tokens can only be released up to the maximum count specified at creation time, see <a class="el" href="group__CMSIS__RTOS__SemaphoreMgmt.html#ga2a39806ace781a0008a4374ca701b14a">osSemaphoreNew</a>. Other threads that currently wait for a token of this semaphore object will be put into the <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ThreadStates">READY</a> state.</p>
 <p>Possible <a class="el" href="group__CMSIS__RTOS__Definitions.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813e">osStatus_t</a> return values:</p>
 <ul>
-<li><em>osOK:</em> the token has been correctly released and the count increased.</li>
-<li><em>osErrorResource:</em> the maximum token count has been reached.</li>
-<li><em>osErrorParameter:</em> the parameter <em>semaphore_id</em> is incorrect.</li>
+<li><em>osOK:</em> the token has been released and the count incremented.</li>
+<li><em>osErrorResource:</em> the token could not be released (maximum token count has been reached).</li>
+<li><em>osErrorParameter:</em> the parameter <em>semaphore_id</em> is <span class="XML-Token">NULL</span> or invalid.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>This function may be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>.</dd></dl>
 <p><b>Code Example</b></p>
@@ -530,7 +526,7 @@
 <ul>
 <li><em>osOK:</em> the semaphore object has been deleted.</li>
 <li><em>osErrorParameter:</em> the parameter <em>semaphore_id</em> is <span class="XML-Token">NULL</span> or invalid.</li>
-<li><em>osErrorResource:</em> the semaphore specified by parameter <em>semaphore_id</em> is in an invalid semaphore state.</li>
+<li><em>osErrorResource:</em> the semaphore is in an invalid state.</li>
 <li><em>osErrorISR:</em> <b>osSemaphoreDelete</b> cannot be called from interrupt service routines.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>. </dd></dl>
@@ -542,7 +538,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/group__CMSIS__RTOS__ThreadFlagsMgmt.html b/docs/RTOS2/html/group__CMSIS__RTOS__ThreadFlagsMgmt.html
index 5c25af2..03f3622 100644
--- a/docs/RTOS2/html/group__CMSIS__RTOS__ThreadFlagsMgmt.html
+++ b/docs/RTOS2/html/group__CMSIS__RTOS__ThreadFlagsMgmt.html
@@ -212,9 +212,9 @@
 <p>The function <b>osThreadFlagsSet</b> sets the thread flags for a thread specified by parameter <em>thread_id</em>. It returns the flags set, or an error code if highest bit is set (refer to <a class="el" href="group__flags__error__codes.html">Flags Functions Error Codes</a>). This function may be used also within interrupt service routines. Threads waiting for a flag to be set will resume from <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ThreadStates">BLOCKED</a> state.</p>
 <p>Possible <a class="el" href="group__flags__error__codes.html">Flags Functions Error Codes</a> return values:</p>
 <ul>
-<li><em>osFlagsErrorUnknown:</em> Unspecified error.</li>
-<li><em>osFlagsErrorResource:</em> Thread specified by parameter <em>thread_id</em> is not active to receive flags.</li>
-<li><em>osFlagsErrorParameter:</em> Parameter <em>thread_id</em> is not a valid thread or <em>flags</em> has highest bit set.</li>
+<li><em>osFlagsErrorUnknown:</em> unspecified error.</li>
+<li><em>osFlagsErrorParameter:</em> parameter <em>thread_id</em> is not a valid thread or <em>flags</em> has highest bit set.</li>
+<li><em>osFlagsErrorResource:</em> the thread is in invalid state.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>This function may be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>.</dd></dl>
 <p><b>Code</b> <b>Example</b> </p>
@@ -222,12 +222,12 @@
 <div class="line"><span class="comment"> *      Function &#39;signal_func&#39; called from multiple threads</span></div>
 <div class="line"><span class="comment"> *---------------------------------------------------------------------------*/</span></div>
 <div class="line"><span class="keywordtype">void</span> signal_func (<a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> tid)  {</div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#ga6f89ef9caded1d9963c7b12b0f6412c9">osThreadFlagsSet</a>(tid_clock, 0x0100);      <span class="comment">/* set signal to clock thread    */</span></div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a>(500);                             <span class="comment">/* delay 500ms                   */</span></div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#ga6f89ef9caded1d9963c7b12b0f6412c9">osThreadFlagsSet</a>(tid_clock, 0x0100);      <span class="comment">/* set signal to clock thread    */</span></div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a>(500);                             <span class="comment">/* delay 500ms                   */</span></div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#ga6f89ef9caded1d9963c7b12b0f6412c9">osThreadFlagsSet</a>(tid, 0x0001);            <span class="comment">/* set signal to thread &#39;thread&#39; */</span></div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a>(500);                             <span class="comment">/* delay 500ms                   */</span></div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#ga6f89ef9caded1d9963c7b12b0f6412c9">osThreadFlagsSet</a>(tid_clock, 0x0100U);     <span class="comment">/* set signal to clock thread    */</span></div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a>(500U);                            <span class="comment">/* delay 500ms                   */</span></div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#ga6f89ef9caded1d9963c7b12b0f6412c9">osThreadFlagsSet</a>(tid_clock, 0x0100U);     <span class="comment">/* set signal to clock thread    */</span></div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a>(500U);                            <span class="comment">/* delay 500ms                   */</span></div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#ga6f89ef9caded1d9963c7b12b0f6412c9">osThreadFlagsSet</a>(tid, 0x0001U);           <span class="comment">/* set signal to thread &#39;thread&#39; */</span></div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a>(500U);                            <span class="comment">/* delay 500ms                   */</span></div>
 <div class="line">}</div>
 </div><!-- fragment --> 
 </div>
@@ -255,9 +255,8 @@
 <p>The function <b>osThreadFlagsClear</b> clears the specified flags for the currently running thread. It returns the flags before clearing, or an error code if highest bit is set (refer to <a class="el" href="group__flags__error__codes.html">Flags Functions Error Codes</a>).</p>
 <p>Possible <a class="el" href="group__flags__error__codes.html">Flags Functions Error Codes</a> return values:</p>
 <ul>
-<li><em>osFlagsErrorUnknown:</em> Unspecified error, i.e. not called from a running threads context.</li>
-<li><em>osFlagsErrorResource:</em> Running thread is not active to receive flags.</li>
-<li><em>osFlagsErrorParameter:</em> Parameter <em>flags</em> has highest bit set.</li>
+<li><em>osFlagsErrorUnknown:</em> unspecified error, i.e. not called from a running threads context.</li>
+<li><em>osFlagsErrorParameter:</em> parameter <em>flags</em> has highest bit set.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>. </dd></dl>
 
@@ -337,9 +336,9 @@
 <p>The function returns the flags before clearing, or an error code if highest bit is set (refer to <a class="el" href="group__flags__error__codes.html">Flags Functions Error Codes</a>).</p>
 <p>Possible <a class="el" href="group__flags__error__codes.html">Flags Functions Error Codes</a> return values:</p>
 <ul>
-<li><em>osFlagsErrorUnknown:</em> Unspecified error, i.e. not called from a running threads context.</li>
-<li><em>osFlagsErrorTimeout:</em> The awaited flags has not been set during given timeout.</li>
-<li><em>osFlagsErrorResource:</em> Running thread is not active to receive flags.</li>
+<li><em>osFlagsErrorUnknown:</em> unspecified error, i.e. not called from a running threads context.</li>
+<li><em>osFlagsErrorTimeout:</em> awaited flags have not been set in the given time.</li>
+<li><em>osFlagsErrorResource:</em> awaited flags have not been set when no <em>timeout</em> was specified.</li>
 <li><em>osFlagsErrorParameter:</em> Parameter <em>flags</em> has highest bit set.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>.</dd></dl>
@@ -348,13 +347,13 @@
 <div class="line"> </div>
 <div class="line"><span class="keywordtype">void</span> Thread (<span class="keywordtype">void</span>* arg) {</div>
 <div class="line">  ;</div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#gac11542ad6300b600f872fc96e340ec2b">osThreadFlagsWait</a> (0x00000001U, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga18e63587b8450d5b8798b6f6ec04e012">osFlagsWaitAny</a>, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga9eb9a7a797a42e4b55eb171ecc609ddb">osWaitForever</a>); <span class="comment">// Wait forever until thread flag 1 is set.</span></div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#gac11542ad6300b600f872fc96e340ec2b">osThreadFlagsWait</a>(0x00000001U, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga18e63587b8450d5b8798b6f6ec04e012">osFlagsWaitAny</a>, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga9eb9a7a797a42e4b55eb171ecc609ddb">osWaitForever</a>); <span class="comment">// Wait forever until thread flag 1 is set.</span></div>
 <div class="line">  ;</div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#gac11542ad6300b600f872fc96e340ec2b">osThreadFlagsWait</a> (0x00000003U, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga18e63587b8450d5b8798b6f6ec04e012">osFlagsWaitAny</a>, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga9eb9a7a797a42e4b55eb171ecc609ddb">osWaitForever</a>); <span class="comment">// Wait forever until either thread flag 0 or 1 is set.</span></div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#gac11542ad6300b600f872fc96e340ec2b">osThreadFlagsWait</a>(0x00000003U, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga18e63587b8450d5b8798b6f6ec04e012">osFlagsWaitAny</a>, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga9eb9a7a797a42e4b55eb171ecc609ddb">osWaitForever</a>); <span class="comment">// Wait forever until either thread flag 0 or 1 is set.</span></div>
 <div class="line">  ;</div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#gac11542ad6300b600f872fc96e340ec2b">osThreadFlagsWait</a> (0x00000003U, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga8b6f562736fbfb5428940e0c017dec24">osFlagsWaitAll</a>, 10); <span class="comment">// Wait for 10 timer ticks until thread flags 0 and 1 are set. Timeout afterwards.</span></div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#gac11542ad6300b600f872fc96e340ec2b">osThreadFlagsWait</a>(0x00000003U, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga8b6f562736fbfb5428940e0c017dec24">osFlagsWaitAll</a>, 10U); <span class="comment">// Wait for 10 timer ticks until thread flags 0 and 1 are set. Timeout afterwards.</span></div>
 <div class="line">  ;</div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#gac11542ad6300b600f872fc96e340ec2b">osThreadFlagsWait</a> (0x00000003U, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga8b6f562736fbfb5428940e0c017dec24">osFlagsWaitAll</a> | <a class="code" href="group__CMSIS__RTOS__Definitions.html#gaade844a42237d8c37569d4d9b16b9f1c">osFlagsNoClear</a>, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga9eb9a7a797a42e4b55eb171ecc609ddb">osWaitForever</a>); <span class="comment">// Same as the above, but the flags will not be cleared.</span></div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#gac11542ad6300b600f872fc96e340ec2b">osThreadFlagsWait</a>(0x00000003U, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga8b6f562736fbfb5428940e0c017dec24">osFlagsWaitAll</a> | <a class="code" href="group__CMSIS__RTOS__Definitions.html#gaade844a42237d8c37569d4d9b16b9f1c">osFlagsNoClear</a>, <a class="code" href="group__CMSIS__RTOS__Definitions.html#ga9eb9a7a797a42e4b55eb171ecc609ddb">osWaitForever</a>); <span class="comment">// Same as the above, but the flags will not be cleared.</span></div>
 <div class="line">}</div>
 </div><!-- fragment --> 
 </div>
@@ -364,7 +363,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/group__CMSIS__RTOS__ThreadMgmt.html b/docs/RTOS2/html/group__CMSIS__RTOS__ThreadMgmt.html
index dba38af..810da53 100644
--- a/docs/RTOS2/html/group__CMSIS__RTOS__ThreadMgmt.html
+++ b/docs/RTOS2/html/group__CMSIS__RTOS__ThreadMgmt.html
@@ -340,7 +340,7 @@
 <li><b>RUNNING:</b> The thread that is currently running is in the <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ThreadStates">RUNNING</a> state. Only one thread at a time can be in this state.</li>
 <li><b>READY:</b> Threads which are ready to run are in the <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ThreadStates">READY</a> state. Once the <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ThreadStates">RUNNING</a> thread has terminated, or is <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ThreadStates">BLOCKED</a>, the next <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ThreadStates">READY</a> thread with the highest priority becomes the <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ThreadStates">RUNNING</a> thread.</li>
 <li><b>BLOCKED:</b> Threads that are blocked either delayed, waiting for an event to occur or suspended are in the <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ThreadStates">BLOCKED</a> state.</li>
-<li><b>TERMINATED:</b> When <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga2f8ba6dba6e9c065a6e236ffd410d74a">osThreadTerminate</a> is called, threads are <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ThreadStates">TERMINATED</a> with resources not yet released.</li>
+<li><b>TERMINATED:</b> When <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga2f8ba6dba6e9c065a6e236ffd410d74a">osThreadTerminate</a> is called, threads are <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ThreadStates">TERMINATED</a> with resources not yet released (applies to <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#joinable_threads">joinable threads).</a></li>
 <li><b>INACTIVE:</b> Threads that are not created or have been terminated with all resources released are in the <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ThreadStates">INACTIVE</a> state.</li>
 </ul>
 <div class="image">
@@ -368,7 +368,7 @@
 <div class="line"><span class="keywordtype">int</span> main (<span class="keywordtype">void</span>) {</div>
 <div class="line">  <a class="code" href="group__CMSIS__RTOS__KernelCtrl.html#gae818f6611d25ba3140bede410a52d659">osKernelInitialize</a>();</div>
 <div class="line">  ;</div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>(thread1, NULL, NULL);    <span class="comment">// Create thread with default settings</span></div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>(thread1, NULL, NULL);     <span class="comment">// Create thread with default settings</span></div>
 <div class="line">  ;</div>
 <div class="line">  <a class="code" href="group__CMSIS__RTOS__KernelCtrl.html#ga9ae2cc00f0d89d7b6a307bba942b5221">osKernelStart</a>(); </div>
 <div class="line">}</div>
@@ -381,12 +381,12 @@
 <div class="line">}</div>
 <div class="line"> </div>
 <div class="line"><span class="keyword">const</span> <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#structosThreadAttr__t">osThreadAttr_t</a> thread1_attr = {</div>
-<div class="line">  .<a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#aacbc9a219f2d6870e9ce89bb93f975c9">stack_size</a> = 1024                             <span class="comment">// Create the thread stack with a size of 1024 bytes</span></div>
+<div class="line">  .<a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#aacbc9a219f2d6870e9ce89bb93f975c9">stack_size</a> = 1024                            <span class="comment">// Create the thread stack with a size of 1024 bytes</span></div>
 <div class="line">};</div>
 <div class="line"> </div>
 <div class="line"><span class="keywordtype">int</span> main (<span class="keywordtype">void</span>) {</div>
 <div class="line">  ;  </div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>(thread1, NULL, &amp;thread1_attr);     <span class="comment">// Create thread with custom sized stack memory</span></div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>(thread1, NULL, &amp;thread1_attr);    <span class="comment">// Create thread with custom sized stack memory</span></div>
 <div class="line">  ;</div>
 <div class="line">}</div>
 </div><!-- fragment --><p><b>Example 3 - Create thread with statically allocated stack</b></p>
@@ -442,20 +442,20 @@
 <div class="line">}</div>
 <div class="line"> </div>
 <div class="line"><span class="keyword">const</span> <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#structosThreadAttr__t">osThreadAttr_t</a> thread1_attr = {</div>
-<div class="line">  .<a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#a6a5183df4c54c3e28dc8dc704f2487d5">priority</a> = <a class="code" href="cmsis__os2_8h.html#gad4e3e0971b41f2d17584a8c6837342eca914433934143a9ba767e59577c56e6c2">osPriorityHigh</a>            <span class="comment">//Set initial thread priority to high   </span></div>
+<div class="line">  .<a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#a6a5183df4c54c3e28dc8dc704f2487d5">priority</a> = <a class="code" href="cmsis__os2_8h.html#gad4e3e0971b41f2d17584a8c6837342eca914433934143a9ba767e59577c56e6c2">osPriorityHigh</a>                    <span class="comment">//Set initial thread priority to high   </span></div>
 <div class="line">};</div>
 <div class="line"> </div>
 <div class="line"><span class="keywordtype">int</span> main (<span class="keywordtype">void</span>) {</div>
 <div class="line">  ;</div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>(thread1, NULL, &amp;thread1_attr);   </div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>(thread1, NULL, &amp;thread1_attr);</div>
 <div class="line">  ;</div>
 <div class="line">}</div>
 </div><!-- fragment --><p><a class="anchor" id="joinable_threads"></a><b>Example 6 - Joinable threads</b></p>
 <p>In this example a master thread creates four threads with the <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga249499c519f3f8eef5673009ab6cfcbe">osThreadJoinable</a> attribute. These will do some work and return using the <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaddaa452dd7610e4096647a566d3556fc">osThreadExit</a> call after finished. <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga3fca90fb0679afeb968aa8c3d5874487">osThreadJoin</a> is used to synchronize the thread termination.</p>
-<div class="fragment"><div class="line"><a class="code" href="cmsis__os2_8h.html#a153a4a31b276a9758959580538720a51">__NO_RETURN</a> <span class="keywordtype">void</span> worker (<span class="keywordtype">void</span> *argument) {     </div>
-<div class="line">    ; <span class="comment">// work a lot on data[] </span></div>
-<div class="line">    <a class="code" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a>(1000);       </div>
-<div class="line">    <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaddaa452dd7610e4096647a566d3556fc">osThreadExit</a>();</div>
+<div class="fragment"><div class="line"><a class="code" href="cmsis__os2_8h.html#a153a4a31b276a9758959580538720a51">__NO_RETURN</a> <span class="keywordtype">void</span> worker (<span class="keywordtype">void</span> *argument) {</div>
+<div class="line">  ; <span class="comment">// work a lot on data[] </span></div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a>(1000U);</div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaddaa452dd7610e4096647a566d3556fc">osThreadExit</a>();</div>
 <div class="line">}</div>
 <div class="line"> </div>
 <div class="line"><a class="code" href="cmsis__os2_8h.html#a153a4a31b276a9758959580538720a51">__NO_RETURN</a> <span class="keywordtype">void</span> thread1 (<span class="keywordtype">void</span> *argument) {</div>
@@ -465,11 +465,11 @@
 <div class="line"></div>
 <div class="line">  memset(&amp;worker_attr, 0, <span class="keyword">sizeof</span>(worker_attr));</div>
 <div class="line">  worker_attr.<a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#a6e93b49cb79c12f768d72580c7731f30">attr_bits</a> = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga249499c519f3f8eef5673009ab6cfcbe">osThreadJoinable</a>;</div>
-<div class="line">  </div>
-<div class="line">  worker_ids[0] = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>(worker, &amp;data[0][0], &amp;worker_attr);    </div>
-<div class="line">  worker_ids[1] = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>(worker, &amp;data[1][0], &amp;worker_attr);    </div>
-<div class="line">  worker_ids[2] = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>(worker, &amp;data[2][0], &amp;worker_attr);    </div>
-<div class="line">  worker_ids[3] = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>(worker, &amp;data[3][0], &amp;worker_attr);    </div>
+<div class="line"> </div>
+<div class="line">  worker_ids[0] = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>(worker, &amp;data[0][0], &amp;worker_attr);</div>
+<div class="line">  worker_ids[1] = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>(worker, &amp;data[1][0], &amp;worker_attr);</div>
+<div class="line">  worker_ids[2] = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>(worker, &amp;data[2][0], &amp;worker_attr);</div>
+<div class="line">  worker_ids[3] = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>(worker, &amp;data[3][0], &amp;worker_attr);</div>
 <div class="line"> </div>
 <div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga3fca90fb0679afeb968aa8c3d5874487">osThreadJoin</a>(worker_ids[0]);</div>
 <div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga3fca90fb0679afeb968aa8c3d5874487">osThreadJoin</a>(worker_ids[1]);</div>
@@ -540,7 +540,8 @@
 stack_size</td>
 <td class="fielddoc">
 size of stack <p>The size (in bytes) of the stack specified by <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ad7c9b42355a4c8b9467130ab3fb19e43">stack_mem</a>.</p>
-<p>Default: <span class="XML-Token">0</span> as the default is no memory provided with <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ad7c9b42355a4c8b9467130ab3fb19e43">stack_mem</a>. </p>
+<p>Default: <span class="XML-Token">0</span> as the default is no memory provided with <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ad7c9b42355a4c8b9467130ab3fb19e43">stack_mem</a>.</p>
+<p>/** </p>
 </td></tr>
 <tr><td class="fieldtype">
 <a class="anchor" id="a6a5183df4c54c3e28dc8dc704f2487d5"></a><a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gad4e3e0971b41f2d17584a8c6837342ec">osPriority_t</a></td>
@@ -556,7 +557,8 @@
 tz_module</td>
 <td class="fielddoc">
 TrustZone module identifier. <p>TrustZone Thread Context Management Identifier to allocate context memory for threads. The RTOS kernel that runs in non-secure state calls the interface functions defined by the header file TZ_context.h. Can safely be set to zero for threads not using secure calls at all. See <a href="../../Core/html/group__context__trustzone__functions.html">TrustZone RTOS Context Management</a>.</p>
-<p>Default: token{0} not thread context specified. </p>
+<p>Default: <span class="XML-Token">0</span> not thread context specified.</p>
+<p>/** </p>
 </td></tr>
 <tr><td class="fieldtype">
 <a class="anchor" id="a66f538babc389986738ec70104e0562b"></a>uint32_t</td>
@@ -650,7 +652,7 @@
 <table class="fieldtable">
 <tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggad3dc89e942e38d9f3af858a0269a820dae9d77830b6866e287417b6e1d983e971"></a>osThreadInactive</em>&#160;</td><td class="fielddoc">
 <p>Inactive. </p>
-<p>The thread is created but not actively used, or has been terminated. </p>
+<p>The thread is created but not actively used, or has been terminated (returned for static control block allocation, when memory pools are used <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ggad3dc89e942e38d9f3af858a0269a820da339313e26613bc12f66a852e2ff8745e">osThreadError</a> is returned as the control block is no longer valid) </p>
 </td></tr>
 <tr><td class="fieldname"><em><a class="anchor" id="ggad3dc89e942e38d9f3af858a0269a820da59e286915944fe0e4d1ffdb1f2946f14"></a>osThreadReady</em>&#160;</td><td class="fielddoc">
 <p>Ready. </p>
@@ -666,11 +668,11 @@
 </td></tr>
 <tr><td class="fieldname"><em><a class="anchor" id="ggad3dc89e942e38d9f3af858a0269a820dad5b2726c2d0228f4f1a76cf6b630963c"></a>osThreadTerminated</em>&#160;</td><td class="fielddoc">
 <p>Terminated. </p>
-<p>The thread is terminated and all its resources are freed. </p>
+<p>The thread is terminated and all its resources are not yet freed (applies to <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#joinable_threads">joinable threads).</a></p>
 </td></tr>
 <tr><td class="fieldname"><em><a class="anchor" id="ggad3dc89e942e38d9f3af858a0269a820da339313e26613bc12f66a852e2ff8745e"></a>osThreadError</em>&#160;</td><td class="fielddoc">
 <p>Error. </p>
-<p>The thread thread has raised an error condition and cannot be scheduled. </p>
+<p>The thread does not exist (has raised an error condition) and cannot be scheduled. </p>
 </td></tr>
 <tr><td class="fieldname"><em><a class="anchor" id="gad3dc89e942e38d9f3af858a0269a820da8872f7e352370eb11ee772c7dcca6e6c"></a>osThreadReserved</em>&#160;</td><td class="fielddoc">
 <p>Prevents enum down-size compiler optimization. </p>
@@ -928,9 +930,9 @@
 <p>The function <b>osThreadGetName</b> returns the pointer to the name string of the thread identified by parameter <em>thread_id</em> or <span class="XML-Token">NULL</span> in case of an error.</p>
 <dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>.</dd></dl>
 <p><b>Code Example</b> </p>
-<div class="fragment"><div class="line"><span class="keywordtype">void</span> ThreadGetName_example (<span class="keywordtype">void</span>)  {</div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga8df03548e89fbc56402a5cd584a505da">osThreadGetId</a> ();</div>
-<div class="line">  <span class="keyword">const</span> <span class="keywordtype">char</span>* name = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gac3230f3a55a297514b013ebf38f27e0a">osThreadGetName</a> (thread_id);</div>
+<div class="fragment"><div class="line"><span class="keywordtype">void</span> ThreadGetName_example (<span class="keywordtype">void</span>) {</div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga8df03548e89fbc56402a5cd584a505da">osThreadGetId</a>();</div>
+<div class="line">  <span class="keyword">const</span> <span class="keywordtype">char</span>* name = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gac3230f3a55a297514b013ebf38f27e0a">osThreadGetName</a>(thread_id);</div>
 <div class="line">  <span class="keywordflow">if</span> (name == NULL) {</div>
 <div class="line">    <span class="comment">// Failed to get the thread name; not in a thread</span></div>
 <div class="line">  }</div>
@@ -955,10 +957,10 @@
 <p>The function <b>osThreadGetId</b> returns the thread object ID of the currently running thread or NULL in case of an error.</p>
 <dl class="section note"><dt>Note</dt><dd>This function may be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>.</dd></dl>
 <p><b>Code Example</b> </p>
-<div class="fragment"><div class="line"><span class="keywordtype">void</span> ThreadGetId_example (<span class="keywordtype">void</span>)  {</div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> id;                                           <span class="comment">// id for the currently running thread</span></div>
+<div class="fragment"><div class="line"><span class="keywordtype">void</span> ThreadGetId_example (<span class="keywordtype">void</span>) {</div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> id;                              <span class="comment">// id for the currently running thread</span></div>
 <div class="line">   </div>
-<div class="line">  <span class="keywordtype">id</span> = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga8df03548e89fbc56402a5cd584a505da">osThreadGetId</a> ();</div>
+<div class="line">  <span class="keywordtype">id</span> = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga8df03548e89fbc56402a5cd584a505da">osThreadGetId</a>();</div>
 <div class="line">  <span class="keywordflow">if</span> (<span class="keywordtype">id</span> == NULL) {</div>
 <div class="line">    <span class="comment">// Failed to get the id</span></div>
 <div class="line">  }</div>
@@ -1027,28 +1029,28 @@
 <ul>
 <li><em>osOK:</em> the priority of the specified thread has been changed successfully.</li>
 <li><em>osErrorParameter:</em> <em>thread_id</em> is <span class="XML-Token">NULL</span> or invalid or <em>priority</em> is incorrect.</li>
-<li><em>osErrorResource:</em> thread specified by parameter <em>thread_id</em> is in an invalid thread state.</li>
+<li><em>osErrorResource:</em> the thread is in an invalid state.</li>
 <li><em>osErrorISR:</em> the function <b>osThreadSetPriority</b> cannot be called from interrupt service routines.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>.</dd></dl>
 <p><b>Code Example</b> </p>
 <div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span></div>
 <div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> Thread_1 (<span class="keywordtype">void</span> <span class="keyword">const</span> *arg)  {                          <span class="comment">// Thread function</span></div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> id;                                          <span class="comment">// id for the currently running thread</span></div>
-<div class="line">  osStatus_t   status;                                      <span class="comment">// status of the executed function</span></div>
-<div class="line">   </div>
-<div class="line">  :  </div>
-<div class="line">  <span class="keywordtype">id</span> = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga8df03548e89fbc56402a5cd584a505da">osThreadGetId</a> ();                                    <span class="comment">// Obtain ID of current running thread</span></div>
-<div class="line">   </div>
-<div class="line">  status = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga861a420fb2d643115b06622903fb3bfb">osThreadSetPriority</a> (<span class="keywordtype">id</span>, <a class="code" href="cmsis__os2_8h.html#gad4e3e0971b41f2d17584a8c6837342eca193b650117c209b4a203954542bcc3e6">osPriorityBelowNormal</a>); <span class="comment">// Set thread priority</span></div>
-<div class="line">  <span class="keywordflow">if</span> (status == <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813ea9e1c9e2550bb4de8969a935acffc968f">osOK</a>)  {</div>
+<div class="line"><span class="keywordtype">void</span> Thread_1 (<span class="keywordtype">void</span> <span class="keyword">const</span> *arg) {               <span class="comment">// Thread function</span></div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> id;                              <span class="comment">// id for the currently running thread</span></div>
+<div class="line">  osStatus_t   status;                          <span class="comment">// status of the executed function</span></div>
+<div class="line"> </div>
+<div class="line">  :</div>
+<div class="line">  <span class="keywordtype">id</span> = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga8df03548e89fbc56402a5cd584a505da">osThreadGetId</a>();                         <span class="comment">// Obtain ID of current running thread</span></div>
+<div class="line"> </div>
+<div class="line">  status = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga861a420fb2d643115b06622903fb3bfb">osThreadSetPriority</a>(<span class="keywordtype">id</span>, <a class="code" href="cmsis__os2_8h.html#gad4e3e0971b41f2d17584a8c6837342eca193b650117c209b4a203954542bcc3e6">osPriorityBelowNormal</a>);  <span class="comment">// Set thread priority</span></div>
+<div class="line">  <span class="keywordflow">if</span> (status == <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813ea9e1c9e2550bb4de8969a935acffc968f">osOK</a>) {</div>
 <div class="line">    <span class="comment">// Thread priority changed to BelowNormal</span></div>
 <div class="line">  }</div>
 <div class="line">  <span class="keywordflow">else</span> {</div>
 <div class="line">    <span class="comment">// Failed to set the priority</span></div>
 <div class="line">  }</div>
-<div class="line">  :  </div>
+<div class="line">  :</div>
 <div class="line">}</div>
 </div><!-- fragment --> 
 </div>
@@ -1083,12 +1085,12 @@
 <p><b>Code Example</b> </p>
 <div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span></div>
 <div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> Thread_1 (<span class="keywordtype">void</span> <span class="keyword">const</span> *arg)  {                         <span class="comment">// Thread function</span></div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> id;                                         <span class="comment">// id for the currently running thread</span></div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gad4e3e0971b41f2d17584a8c6837342ec">osPriority_t</a> priority;                                   <span class="comment">// thread priority</span></div>
+<div class="line"><span class="keywordtype">void</span> Thread_1 (<span class="keywordtype">void</span> <span class="keyword">const</span> *arg) {               <span class="comment">// Thread function</span></div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> id;                              <span class="comment">// id for the currently running thread</span></div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gad4e3e0971b41f2d17584a8c6837342ec">osPriority_t</a> priority;                        <span class="comment">// thread priority</span></div>
 <div class="line">   </div>
-<div class="line">  <span class="keywordtype">id</span> = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga8df03548e89fbc56402a5cd584a505da">osThreadGetId</a> ();                                   <span class="comment">// Obtain ID of current running thread</span></div>
-<div class="line">  priority = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga0aeaf349604f456e68e78f9d3b42e44b">osThreadGetPriority</a> (<span class="keywordtype">id</span>);                     <span class="comment">// Obtain the thread priority</span></div>
+<div class="line">  <span class="keywordtype">id</span> = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga8df03548e89fbc56402a5cd584a505da">osThreadGetId</a>();                         <span class="comment">// Obtain ID of current running thread</span></div>
+<div class="line">  priority = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga0aeaf349604f456e68e78f9d3b42e44b">osThreadGetPriority</a>(<span class="keywordtype">id</span>);           <span class="comment">// Obtain the thread priority</span></div>
 <div class="line">}</div>
 </div><!-- fragment --> 
 </div>
@@ -1120,12 +1122,12 @@
 <p><b>Code Example</b> </p>
 <div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span></div>
 <div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> Thread_1 (<span class="keywordtype">void</span> <span class="keyword">const</span> *arg)  {                         <span class="comment">// Thread function</span></div>
-<div class="line">  osStatus_t   status;                                     <span class="comment">// status of the executed function</span></div>
+<div class="line"><span class="keywordtype">void</span> Thread_1 (<span class="keywordtype">void</span> <span class="keyword">const</span> *arg) {               <span class="comment">// Thread function</span></div>
+<div class="line">  osStatus_t status;                            <span class="comment">// status of the executed function</span></div>
 <div class="line">  :</div>
-<div class="line">  <span class="keywordflow">while</span> (1)  {</div>
-<div class="line">    status = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gad01c7ec26535b1de6b018bb9466720e2">osThreadYield</a>();                              <span class="comment">// </span></div>
-<div class="line">    <span class="keywordflow">if</span> (status != <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813ea9e1c9e2550bb4de8969a935acffc968f">osOK</a>)  {</div>
+<div class="line">  <span class="keywordflow">while</span> (1) {</div>
+<div class="line">    status = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gad01c7ec26535b1de6b018bb9466720e2">osThreadYield</a>();</div>
+<div class="line">    <span class="keywordflow">if</span> (status != <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813ea9e1c9e2550bb4de8969a935acffc968f">osOK</a>) {</div>
 <div class="line">      <span class="comment">// an error occurred</span></div>
 <div class="line">    }</div>
 <div class="line">  }</div>
@@ -1159,7 +1161,7 @@
 <ul>
 <li><em>osOK:</em> the thread has been suspended successfully.</li>
 <li><em>osErrorParameter:</em> <em>thread_id</em> is <span class="XML-Token">NULL</span> or invalid.</li>
-<li><em>osErrorResource:</em> thread specified by parameter <em>thread_id</em> is in an invalid thread state.</li>
+<li><em>osErrorResource:</em> the thread is in an invalid state.</li>
 <li><em>osErrorISR:</em> the function <b>osThreadSuspend</b> cannot be called from interrupt service routines.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>. </dd>
@@ -1195,7 +1197,7 @@
 <ul>
 <li><em>osOK:</em> the thread has been resumed successfully.</li>
 <li><em>osErrorParameter:</em> <em>thread_id</em> is <span class="XML-Token">NULL</span> or invalid.</li>
-<li><em>osErrorResource:</em> thread specified by parameter <em>thread_id</em> is in an invalid thread state.</li>
+<li><em>osErrorResource:</em> the thread is in an invalid state.</li>
 <li><em>osErrorISR:</em> the function <b>osThreadResume</b> cannot be called from interrupt service routines.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>. </dd>
@@ -1229,7 +1231,7 @@
 <ul>
 <li><em>osOK:</em> the attribute of the specified thread has been changed to detached successfully.</li>
 <li><em>osErrorParameter:</em> <em>thread_id</em> is <span class="XML-Token">NULL</span> or invalid.</li>
-<li><em>osErrorResource:</em> thread specified by parameter <em>thread_id</em> is in an invalid thread state.</li>
+<li><em>osErrorResource:</em> the thread is in an invalid state.</li>
 <li><em>osErrorISR:</em> the function <b>osThreadDetach</b> cannot be called from interrupt service routines.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>. </dd></dl>
@@ -1261,10 +1263,13 @@
 <ul>
 <li><em>osOK:</em> if the thread has already been terminated and joined or once the thread has been terminated and the join operations succeeds.</li>
 <li><em>osErrorParameter:</em> <em>thread_id</em> is <span class="XML-Token">NULL</span> or invalid.</li>
-<li><em>osErrorResource:</em> parameter <em>thread_id</em> is <span class="XML-Token">NULL</span> or refers to a thread that is not an active thread or the thread is not joinable.</li>
+<li><em>osErrorResource:</em> the thread is in an invalid state (ex: not joinable).</li>
 <li><em>osErrorISR:</em> the function <b>osThreadJoin</b> cannot be called from interrupt service routines.</li>
 </ul>
-<dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>. </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>. <br/>
+ </dd>
+<dd>
+Only one thread shall call <b>osThreadJoin</b> to join the target thread. If multiple threads try to join simultaneously with the same thread, the results are undefined. </dd></dl>
 
 </div>
 </div>
@@ -1286,7 +1291,7 @@
 <p><b>Code</b> <b>Example</b> </p>
 <div class="fragment"><div class="line"><a class="code" href="cmsis__os2_8h.html#a153a4a31b276a9758959580538720a51">__NO_RETURN</a> <span class="keywordtype">void</span> worker (<span class="keywordtype">void</span> *argument) {</div>
 <div class="line">  <span class="comment">// do something</span></div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a>(1000);</div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a>(1000U);</div>
 <div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaddaa452dd7610e4096647a566d3556fc">osThreadExit</a>();</div>
 <div class="line">}</div>
 </div><!-- fragment --> 
@@ -1317,30 +1322,32 @@
 <ul>
 <li><em>osOK:</em> the specified thread has been removed from the active thread list successfully.</li>
 <li><em>osErrorParameter:</em> <em>thread_id</em> is <span class="XML-Token">NULL</span> or invalid.</li>
-<li><em>osErrorResource:</em> thread specified by parameter <em>thread_id</em> is in an invalid thread state or no other <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ThreadStates">READY</a> thread exists.</li>
+<li><em>osErrorResource:</em> the thread is in an invalid state or no other <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ThreadStates">READY</a> thread exists.</li>
 <li><em>osErrorISR:</em> the function <b>osThreadTerminate</b> cannot be called from interrupt service routines.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>. </dd>
 <dd>
-Avoid calling the function with a <em>thread_id</em> that does not exist or has been terminated already.</dd></dl>
+Avoid calling the function with a <em>thread_id</em> that does not exist or has been terminated already. </dd>
+<dd>
+<b>osThreadTerminate</b> destroys non-joinable threads and removes their thread_id from the system. Subsequent access to the thread_id (for example <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gacc0a98b42f0a5928e12dc91dc76866b9">osThreadGetState</a>) will return an <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ggad3dc89e942e38d9f3af858a0269a820da339313e26613bc12f66a852e2ff8745e">osThreadError</a>. Joinable threads will not be destroyed and return the status <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ggad3dc89e942e38d9f3af858a0269a820dad5b2726c2d0228f4f1a76cf6b630963c">osThreadTerminated</a> until they are joined with <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga3fca90fb0679afeb968aa8c3d5874487">osThreadJoin</a>.</dd></dl>
 <p><b>Code Example</b> </p>
 <div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span></div>
 <div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> Thread_1 (<span class="keywordtype">void</span> *arg);                             <span class="comment">// function prototype for Thread_1</span></div>
+<div class="line"><span class="keywordtype">void</span> Thread_1 (<span class="keywordtype">void</span> *arg);                      <span class="comment">// function prototype for Thread_1</span></div>
 <div class="line"> </div>
 <div class="line"><span class="keywordtype">void</span> ThreadTerminate_example (<span class="keywordtype">void</span>) {</div>
 <div class="line">  osStatus_t status;</div>
 <div class="line">  <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> id;</div>
 <div class="line"> </div>
-<div class="line">  <span class="keywordtype">id</span> = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a> (Thread_1, NULL, NULL);             <span class="comment">// create the thread</span></div>
-<div class="line">                                                       <span class="comment">// do something</span></div>
-<div class="line">  status = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga2f8ba6dba6e9c065a6e236ffd410d74a">osThreadTerminate</a> (<span class="keywordtype">id</span>);                     <span class="comment">// stop the thread</span></div>
+<div class="line">  <span class="keywordtype">id</span> = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>(Thread_1, NULL, NULL);       <span class="comment">// create the thread</span></div>
+<div class="line">                                                <span class="comment">// do something</span></div>
+<div class="line">  status = <a class="code" href="group__CMSIS__RTOS__ThreadMgmt.html#ga2f8ba6dba6e9c065a6e236ffd410d74a">osThreadTerminate</a>(<span class="keywordtype">id</span>);               <span class="comment">// stop the thread</span></div>
 <div class="line">  <span class="keywordflow">if</span> (status == <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813ea9e1c9e2550bb4de8969a935acffc968f">osOK</a>) {</div>
-<div class="line">                                                       <span class="comment">// Thread was terminated successfully</span></div>
-<div class="line">    }</div>
+<div class="line">                                                <span class="comment">// Thread was terminated successfully</span></div>
+<div class="line">  }</div>
 <div class="line">  <span class="keywordflow">else</span> {</div>
-<div class="line">                                                       <span class="comment">// Failed to terminate a thread</span></div>
-<div class="line">    }</div>
+<div class="line">                                                <span class="comment">// Failed to terminate a thread</span></div>
+<div class="line">  }</div>
 <div class="line">}</div>
 </div><!-- fragment --> 
 </div>
@@ -1455,7 +1462,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/group__CMSIS__RTOS__TickAPI.html b/docs/RTOS2/html/group__CMSIS__RTOS__TickAPI.html
index 0a55e13..87a686a 100644
--- a/docs/RTOS2/html/group__CMSIS__RTOS__TickAPI.html
+++ b/docs/RTOS2/html/group__CMSIS__RTOS__TickAPI.html
@@ -434,7 +434,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/group__CMSIS__RTOS__TimerMgmt.html b/docs/RTOS2/html/group__CMSIS__RTOS__TimerMgmt.html
index 4ef2b0b..a425ce2 100644
--- a/docs/RTOS2/html/group__CMSIS__RTOS__TimerMgmt.html
+++ b/docs/RTOS2/html/group__CMSIS__RTOS__TimerMgmt.html
@@ -183,12 +183,12 @@
 <li>Define the timers: <div class="fragment"><div class="line"><a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gaad5409379689ee27bb0a0b56ea4a4b34">osTimerId_t</a> one_shot_id, periodic_id;</div>
 </div><!-- fragment --></li>
 <li>Define callback functions: <div class="fragment"><div class="line"><span class="keyword">static</span> <span class="keywordtype">void</span> one_shot_Callback (<span class="keywordtype">void</span> *argument) {</div>
-<div class="line">    int32_t arg = (int32_t)argument; <span class="comment">// cast back argument &#39;0&#39; </span></div>
-<div class="line">    <span class="comment">// do something, i.e. set thread/event flags</span></div>
+<div class="line">  int32_t arg = (int32_t)argument; <span class="comment">// cast back argument &#39;0&#39; </span></div>
+<div class="line">  <span class="comment">// do something, i.e. set thread/event flags</span></div>
 <div class="line">}</div>
 <div class="line"><span class="keyword">static</span> <span class="keywordtype">void</span> periodic_Callback (<span class="keywordtype">void</span> *argument) {</div>
-<div class="line">    int32_t arg = (int32_t)argument; <span class="comment">// cast back argument &#39;5&#39;</span></div>
-<div class="line">    <span class="comment">// do something, i.e. set thread/event flags</span></div>
+<div class="line">  int32_t arg = (int32_t)argument; <span class="comment">// cast back argument &#39;5&#39;</span></div>
+<div class="line">  <span class="comment">// do something, i.e. set thread/event flags</span></div>
 <div class="line">}</div>
 </div><!-- fragment --></li>
 <li>Instantiate and start the timers: <div class="fragment"><div class="line"><span class="comment">// creates a one-shot timer:</span></div>
@@ -197,11 +197,11 @@
 <div class="line"><span class="comment">// creates a periodic timer:</span></div>
 <div class="line">periodic_id = <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gad4e7f785c5f700a509f55a3bf6a62bec">osTimerNew</a>(periodic_Callback, <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gga7dc24a4c2b90334427081c3da7a71915ab3463d921dc310938094745c230f2b35">osTimerPeriodic</a>, (<span class="keywordtype">void</span> *)5, NULL); <span class="comment">// (void*)5 is passed as an argument</span></div>
 <div class="line">                                                                               <span class="comment">// to the callback function</span></div>
-<div class="line"><a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gab6ee2859ea657641b7adfac599b8121d">osTimerStart</a>(one_shot_id, 500);</div>
-<div class="line"><a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gab6ee2859ea657641b7adfac599b8121d">osTimerStart</a>(periodic_id, 1500);</div>
+<div class="line"><a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gab6ee2859ea657641b7adfac599b8121d">osTimerStart</a>(one_shot_id, 500U);</div>
+<div class="line"><a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gab6ee2859ea657641b7adfac599b8121d">osTimerStart</a>(periodic_id, 1500U);</div>
 <div class="line"> </div>
 <div class="line"><span class="comment">// start the one-shot timer again after it has triggered the first time:</span></div>
-<div class="line"><a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gab6ee2859ea657641b7adfac599b8121d">osTimerStart</a>(one_shot_id, 500);</div>
+<div class="line"><a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gab6ee2859ea657641b7adfac599b8121d">osTimerStart</a>(one_shot_id, 500U);</div>
 <div class="line"> </div>
 <div class="line"><span class="comment">// when timers are not needed any longer free the resources:</span></div>
 <div class="line"><a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gad0001dd74721ab461789324806db2453">osTimerDelete</a>(one_shot_id);</div>
@@ -371,27 +371,27 @@
 <p><b>Code Example</b> </p>
 <div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span></div>
 <div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> Timer1_Callback (<span class="keywordtype">void</span> *arg);                          <span class="comment">// prototypes for timer callback function</span></div>
-<div class="line"><span class="keywordtype">void</span> Timer2_Callback (<span class="keywordtype">void</span> *arg);                   </div>
+<div class="line"><span class="keywordtype">void</span> Timer1_Callback (<span class="keywordtype">void</span> *arg);               <span class="comment">// prototypes for timer callback function</span></div>
+<div class="line"><span class="keywordtype">void</span> Timer2_Callback (<span class="keywordtype">void</span> *arg);               <span class="comment">// prototypes for timer callback function</span></div>
 <div class="line"> </div>
-<div class="line">uint32_t  exec1;                                           <span class="comment">// argument for the timer call back function</span></div>
-<div class="line">uint32_t  exec2;                                           <span class="comment">// argument for the timer call back function</span></div>
+<div class="line">uint32_t exec1;                                 <span class="comment">// argument for the timer call back function</span></div>
+<div class="line">uint32_t exec2;                                 <span class="comment">// argument for the timer call back function</span></div>
 <div class="line"> </div>
 <div class="line"><span class="keywordtype">void</span> TimerCreate_example (<span class="keywordtype">void</span>)  {</div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gaad5409379689ee27bb0a0b56ea4a4b34">osTimerId_t</a> id1;                                         <span class="comment">// timer id</span></div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gaad5409379689ee27bb0a0b56ea4a4b34">osTimerId_t</a> id2;                                         <span class="comment">// timer id</span></div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gaad5409379689ee27bb0a0b56ea4a4b34">osTimerId_t</a> id1;                              <span class="comment">// timer id</span></div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gaad5409379689ee27bb0a0b56ea4a4b34">osTimerId_t</a> id2;                              <span class="comment">// timer id</span></div>
 <div class="line"> </div>
 <div class="line">  <span class="comment">// Create one-shoot timer</span></div>
-<div class="line">  exec1 = 1;</div>
-<div class="line">  id1 = <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gad4e7f785c5f700a509f55a3bf6a62bec">osTimerNew</a> (Timer1_Callback, <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gga7dc24a4c2b90334427081c3da7a71915a2e0e1f31c742c84b497c4d7143357bdb">osTimerOnce</a>, &amp;exec1, NULL);</div>
-<div class="line">  <span class="keywordflow">if</span> (id1 != NULL)  {</div>
+<div class="line">  exec1 = 1U;</div>
+<div class="line">  id1 = <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gad4e7f785c5f700a509f55a3bf6a62bec">osTimerNew</a>(Timer1_Callback, <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gga7dc24a4c2b90334427081c3da7a71915a2e0e1f31c742c84b497c4d7143357bdb">osTimerOnce</a>, &amp;exec1, NULL);</div>
+<div class="line">  <span class="keywordflow">if</span> (id1 != NULL) {</div>
 <div class="line">    <span class="comment">// One-shoot timer created</span></div>
 <div class="line">  }</div>
 <div class="line"> </div>
 <div class="line">  <span class="comment">// Create periodic timer</span></div>
-<div class="line">  exec2 = 2;</div>
-<div class="line">  id2 = <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gad4e7f785c5f700a509f55a3bf6a62bec">osTimerNew</a> (Timer2_Callback, <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gga7dc24a4c2b90334427081c3da7a71915ab3463d921dc310938094745c230f2b35">osTimerPeriodic</a>, &amp;exec2, NULL);</div>
-<div class="line">  <span class="keywordflow">if</span> (id2 != NULL)  {</div>
+<div class="line">  exec2 = 2U;</div>
+<div class="line">  id2 = <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gad4e7f785c5f700a509f55a3bf6a62bec">osTimerNew</a>(Timer2_Callback, <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gga7dc24a4c2b90334427081c3da7a71915ab3463d921dc310938094745c230f2b35">osTimerPeriodic</a>, &amp;exec2, NULL);</div>
+<div class="line">  <span class="keywordflow">if</span> (id2 != NULL) {</div>
 <div class="line">    <span class="comment">// Periodic timer created</span></div>
 <div class="line">  }</div>
 <div class="line">  :</div>
@@ -461,33 +461,33 @@
 <li><em>osOK:</em> the specified timer has been started or restarted.</li>
 <li><em>osErrorISR:</em> <b>osTimerStart</b> cannot be called from interrupt service routines.</li>
 <li><em>osErrorParameter:</em> parameter <em>timer_id</em> is either <span class="XML-Token">NULL</span> or invalid or <em>ticks</em> is incorrect.</li>
-<li><em>osErrorResource:</em> the timer specified by parameter <em>timer_id</em> is in an invalid timer state.</li>
+<li><em>osErrorResource:</em> the timer is in an invalid state.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>.</dd></dl>
 <p><b>Code Example</b> </p>
 <div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span></div>
-<div class="line">  </div>
-<div class="line"><span class="keywordtype">void</span> Timer_Callback (<span class="keywordtype">void</span> *arg)  {                          <span class="comment">// timer callback function</span></div>
-<div class="line">                                                            <span class="comment">// arg contains &amp;exec</span></div>
-<div class="line">                                                            <span class="comment">// called every second after osTimerStart</span></div>
-<div class="line">} </div>
 <div class="line"> </div>
-<div class="line">uint32_t  exec;                                             <span class="comment">// argument for the timer call back function</span></div>
+<div class="line"><span class="keywordtype">void</span> Timer_Callback (<span class="keywordtype">void</span> *arg) {               <span class="comment">// timer callback function</span></div>
+<div class="line">                                                <span class="comment">// arg contains &amp;exec</span></div>
+<div class="line">                                                <span class="comment">// called every second after osTimerStart</span></div>
+<div class="line">}</div>
 <div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> TimerStart_example (<span class="keywordtype">void</span>)  {</div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gaad5409379689ee27bb0a0b56ea4a4b34">osTimerId_t</a> id;                                           <span class="comment">// timer id</span></div>
-<div class="line">  uint32_t    timerDelay;                                   <span class="comment">// timer value</span></div>
-<div class="line">  osStatus_t  status;                                       <span class="comment">// function return status</span></div>
+<div class="line">uint32_t exec;                                  <span class="comment">// argument for the timer call back function</span></div>
+<div class="line"> </div>
+<div class="line"><span class="keywordtype">void</span> TimerStart_example (<span class="keywordtype">void</span>) {</div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gaad5409379689ee27bb0a0b56ea4a4b34">osTimerId_t</a> id;                               <span class="comment">// timer id</span></div>
+<div class="line">  uint32_t    timerDelay;                       <span class="comment">// timer value</span></div>
+<div class="line">  osStatus_t  status;                           <span class="comment">// function return status</span></div>
 <div class="line"> </div>
 <div class="line">  <span class="comment">// Create periodic timer</span></div>
-<div class="line">  exec = 1;</div>
-<div class="line">  <span class="keywordtype">id</span> = <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gad4e7f785c5f700a509f55a3bf6a62bec">osTimerNew</a> (Timer_Callback, <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gga7dc24a4c2b90334427081c3da7a71915ab3463d921dc310938094745c230f2b35">osTimerPeriodic</a>, &amp;exec, NULL);</div>
-<div class="line">  <span class="keywordflow">if</span> (<span class="keywordtype">id</span>)  {</div>
-<div class="line">    timerDelay = 1000;</div>
-<div class="line">    status = <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gab6ee2859ea657641b7adfac599b8121d">osTimerStart</a> (<span class="keywordtype">id</span>, timerDelay);                 <span class="comment">// start timer</span></div>
-<div class="line">    <span class="keywordflow">if</span> (status != <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813ea9e1c9e2550bb4de8969a935acffc968f">osOK</a>)  {</div>
+<div class="line">  exec = 1U;</div>
+<div class="line">  <span class="keywordtype">id</span> = <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gad4e7f785c5f700a509f55a3bf6a62bec">osTimerNew</a>(Timer_Callback, <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gga7dc24a4c2b90334427081c3da7a71915ab3463d921dc310938094745c230f2b35">osTimerPeriodic</a>, &amp;exec, NULL);</div>
+<div class="line">  <span class="keywordflow">if</span> (<span class="keywordtype">id</span> != NULL)  {</div>
+<div class="line">    timerDelay = 1000U;</div>
+<div class="line">    status = <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gab6ee2859ea657641b7adfac599b8121d">osTimerStart</a>(<span class="keywordtype">id</span>, timerDelay);       <span class="comment">// start timer</span></div>
+<div class="line">    <span class="keywordflow">if</span> (status != <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813ea9e1c9e2550bb4de8969a935acffc968f">osOK</a>) {</div>
 <div class="line">      <span class="comment">// Timer could not be started</span></div>
-<div class="line">    } </div>
+<div class="line">    }</div>
 <div class="line">  }</div>
 <div class="line">  ;</div>
 <div class="line">}</div>
@@ -520,31 +520,31 @@
 <li><em>osOK:</em> the specified timer has been stopped.</li>
 <li><em>osErrorISR:</em> <b>osTimerStop</b> cannot be called from interrupt service routines.</li>
 <li><em>osErrorParameter:</em> parameter <em>timer_id</em> is either <span class="XML-Token">NULL</span> or invalid.</li>
-<li><em>osErrorResource:</em> the timer specified by parameter <em>timer_id</em> is not running (you can only stop a running timer).</li>
+<li><em>osErrorResource:</em> the timer is not running (you can only stop a running timer).</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>.</dd></dl>
 <p><b>Code Example</b> </p>
 <div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span></div>
 <div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> Timer_Callback (<span class="keywordtype">void</span> *arg);                           <span class="comment">// prototype for timer callback function</span></div>
+<div class="line"><span class="keywordtype">void</span> Timer_Callback (<span class="keywordtype">void</span> *arg);                <span class="comment">// prototype for timer callback function</span></div>
 <div class="line"> </div>
-<div class="line">uint32_t  exec;                                            <span class="comment">// argument for the timer call back function</span></div>
-<div class="line"></div>
+<div class="line">uint32_t exec;                                  <span class="comment">// argument for the timer call back function</span></div>
+<div class="line"> </div>
 <div class="line"><span class="keywordtype">void</span> TimerStop_example (<span class="keywordtype">void</span>) {</div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gaad5409379689ee27bb0a0b56ea4a4b34">osTimerId_t</a> id;                                          <span class="comment">// timer id</span></div>
-<div class="line">  osStatus_t  status;                                      <span class="comment">// function return status</span></div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gaad5409379689ee27bb0a0b56ea4a4b34">osTimerId_t</a> id;                               <span class="comment">// timer id</span></div>
+<div class="line">  osStatus_t  status;                           <span class="comment">// function return status</span></div>
 <div class="line"> </div>
 <div class="line">  <span class="comment">// Create periodic timer</span></div>
-<div class="line">  exec = 1;</div>
-<div class="line">  <span class="keywordtype">id</span> = <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gad4e7f785c5f700a509f55a3bf6a62bec">osTimerNew</a> (Timer_Callback, <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gga7dc24a4c2b90334427081c3da7a71915ab3463d921dc310938094745c230f2b35">osTimerPeriodic</a>, &amp;exec, NULL);</div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gab6ee2859ea657641b7adfac599b8121d">osTimerStart</a> (<span class="keywordtype">id</span>, 1000);                                 <span class="comment">// start timer</span></div>
+<div class="line">  exec = 1U;</div>
+<div class="line">  <span class="keywordtype">id</span> = <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gad4e7f785c5f700a509f55a3bf6a62bec">osTimerNew</a>(Timer_Callback, <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gga7dc24a4c2b90334427081c3da7a71915ab3463d921dc310938094745c230f2b35">osTimerPeriodic</a>, &amp;exec, NULL);</div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gab6ee2859ea657641b7adfac599b8121d">osTimerStart</a>(<span class="keywordtype">id</span>, 1000U);                      <span class="comment">// start timer</span></div>
 <div class="line">  :</div>
-<div class="line">  status = <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gabd7a89356da7717293eb0bc5d87b8ac9">osTimerStop</a> (<span class="keywordtype">id</span>);                               <span class="comment">// stop timer</span></div>
+<div class="line">  status = <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gabd7a89356da7717293eb0bc5d87b8ac9">osTimerStop</a>(<span class="keywordtype">id</span>);                     <span class="comment">// stop timer</span></div>
 <div class="line">  <span class="keywordflow">if</span> (status != <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813ea9e1c9e2550bb4de8969a935acffc968f">osOK</a>) {</div>
 <div class="line">    <span class="comment">// Timer could not be stopped</span></div>
-<div class="line">  } </div>
+<div class="line">  }</div>
 <div class="line">  ;</div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gab6ee2859ea657641b7adfac599b8121d">osTimerStart</a> (<span class="keywordtype">id</span>, 1000);                                 <span class="comment">// start timer again</span></div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gab6ee2859ea657641b7adfac599b8121d">osTimerStart</a>(<span class="keywordtype">id</span>, 1000U);                      <span class="comment">// start timer again</span></div>
 <div class="line">  ;</div>
 <div class="line">}</div>
 </div><!-- fragment --> 
@@ -601,26 +601,26 @@
 <li><em>osOK:</em> the specified timer has been deleted.</li>
 <li><em>osErrorISR:</em> <b>osTimerDelete</b> cannot be called from interrupt service routines.</li>
 <li><em>osErrorParameter:</em> parameter <em>timer_id</em> is either <span class="XML-Token">NULL</span> or invalid.</li>
-<li><em>osErrorResource:</em> the timer specified by parameter <em>timer_id</em> is in an invalid timer state.</li>
+<li><em>osErrorResource:</em> the timer is in an invalid state.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd>This function <b>cannot</b> be called from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a>.</dd></dl>
 <p><b>Code Example</b> </p>
 <div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span></div>
-<div class="line"></div>
-<div class="line"><span class="keywordtype">void</span> Timer_Callback (<span class="keywordtype">void</span> *arg);                           <span class="comment">// prototype for timer callback function</span></div>
 <div class="line"> </div>
-<div class="line">uint32_t  exec;                                            <span class="comment">// argument for the timer call back function</span></div>
-<div class="line"></div>
+<div class="line"><span class="keywordtype">void</span> Timer_Callback (<span class="keywordtype">void</span> *arg);                <span class="comment">// prototype for timer callback function</span></div>
+<div class="line"> </div>
+<div class="line">uint32_t exec;                                  <span class="comment">// argument for the timer call back function</span></div>
+<div class="line"> </div>
 <div class="line"><span class="keywordtype">void</span> TimerDelete_example (<span class="keywordtype">void</span>) {</div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gaad5409379689ee27bb0a0b56ea4a4b34">osTimerId_t</a> id;                                          <span class="comment">// timer id</span></div>
-<div class="line">  osStatus_t  status;                                      <span class="comment">// function return status  </span></div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gaad5409379689ee27bb0a0b56ea4a4b34">osTimerId_t</a> id;                               <span class="comment">// timer id</span></div>
+<div class="line">  osStatus_t  status;                           <span class="comment">// function return status  </span></div>
 <div class="line"> </div>
 <div class="line">  <span class="comment">// Create periodic timer</span></div>
-<div class="line">  exec = 1;</div>
-<div class="line">  <span class="keywordtype">id</span> = <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gad4e7f785c5f700a509f55a3bf6a62bec">osTimerNew</a> (Timer_Callback, <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gga7dc24a4c2b90334427081c3da7a71915ab3463d921dc310938094745c230f2b35">osTimerPeriodic</a>, &amp;exec, NULL);</div>
-<div class="line">  <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gab6ee2859ea657641b7adfac599b8121d">osTimerStart</a> (<span class="keywordtype">id</span>, 1000UL);                               <span class="comment">// start timer</span></div>
+<div class="line">  exec = 1U;</div>
+<div class="line">  <span class="keywordtype">id</span> = <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gad4e7f785c5f700a509f55a3bf6a62bec">osTimerNew</a>(Timer_Callback, <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gga7dc24a4c2b90334427081c3da7a71915ab3463d921dc310938094745c230f2b35">osTimerPeriodic</a>, &amp;exec, NULL);</div>
+<div class="line">  <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gab6ee2859ea657641b7adfac599b8121d">osTimerStart</a>(<span class="keywordtype">id</span>, 1000U);                      <span class="comment">// start timer</span></div>
 <div class="line">  ;</div>
-<div class="line">  status = <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gad0001dd74721ab461789324806db2453">osTimerDelete</a> (<span class="keywordtype">id</span>);                             <span class="comment">// stop and delete timer</span></div>
+<div class="line">  status = <a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#gad0001dd74721ab461789324806db2453">osTimerDelete</a>(<span class="keywordtype">id</span>);                   <span class="comment">// stop and delete timer</span></div>
 <div class="line">  <span class="keywordflow">if</span> (status != <a class="code" href="cmsis__os2_8h.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813ea9e1c9e2550bb4de8969a935acffc968f">osOK</a>) {</div>
 <div class="line">    <span class="comment">// Timer could not be deleted</span></div>
 <div class="line">  } </div>
@@ -634,7 +634,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/RTOS2/html/group__CMSIS__RTOS__Wait.html b/docs/RTOS2/html/group__CMSIS__RTOS__Wait.html
index e9cd3e5..2c678e1 100644
--- a/docs/RTOS2/html/group__CMSIS__RTOS__Wait.html
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 <p><b>Code Example</b> </p>
 <div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span></div>
 <div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> Thread_1 (<span class="keywordtype">void</span> *arg)  {                <span class="comment">// Thread function</span></div>
-<div class="line">  osStatus_t status;                        <span class="comment">// capture the return status</span></div>
-<div class="line">  uint32_t   delayTime;                     <span class="comment">// delay time in milliseconds</span></div>
+<div class="line"><span class="keywordtype">void</span> Thread_1 (<span class="keywordtype">void</span> *arg) {             <span class="comment">// Thread function</span></div>
+<div class="line">  osStatus_t status;                    <span class="comment">// capture the return status</span></div>
+<div class="line">  uint32_t   delayTime;                 <span class="comment">// delay time in milliseconds</span></div>
 <div class="line"> </div>
-<div class="line">  delayTime = 1000;                         <span class="comment">// delay 1 second</span></div>
-<div class="line">  status = <a class="code" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a> (delayTime);             <span class="comment">// suspend thread execution</span></div>
+<div class="line">  delayTime = 1000U;                    <span class="comment">// delay 1 second</span></div>
+<div class="line">  status = <a class="code" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a>(delayTime);          <span class="comment">// suspend thread execution</span></div>
 <div class="line">}</div>
 </div><!-- fragment --> 
 </div>
@@ -204,12 +204,12 @@
 <p><b>Code Example</b> </p>
 <div class="fragment"><div class="line"><span class="preprocessor">#include &quot;<a class="code" href="cmsis__os2_8h.html">cmsis_os2.h</a>&quot;</span></div>
 <div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> Thread_1 (<span class="keywordtype">void</span> *arg)  {                <span class="comment">// Thread function</span></div>
+<div class="line"><span class="keywordtype">void</span> Thread_1 (<span class="keywordtype">void</span> *arg) {             <span class="comment">// Thread function</span></div>
 <div class="line">  uint32_t tick;</div>
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-<div class="line">  tick = <a class="code" href="group__CMSIS__RTOS__KernelCtrl.html#ga84bcdbf2fb76b10c8df4e439f0c7e11b">osKernelGetTickCount</a>();            <span class="comment">// retrieve the number of system ticks</span></div>
+<div class="line"> </div>
+<div class="line">  tick = <a class="code" href="group__CMSIS__RTOS__KernelCtrl.html#ga84bcdbf2fb76b10c8df4e439f0c7e11b">osKernelGetTickCount</a>();        <span class="comment">// retrieve the number of system ticks</span></div>
 <div class="line">  <span class="keywordflow">for</span> (;;) {</div>
-<div class="line">    tick += 1000;                           <span class="comment">// delay 1000 ticks periodically</span></div>
+<div class="line">    tick += 1000U;                      <span class="comment">// delay 1000 ticks periodically</span></div>
 <div class="line">    <a class="code" href="group__CMSIS__RTOS__Wait.html#ga3c807924c2d6d43bc2ffb49da3f7f3a1">osDelayUntil</a>(tick);</div>
 <div class="line">    <span class="comment">// ...</span></div>
 <div class="line">  }</div>
@@ -222,7 +222,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
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 <!-- start footer part -->
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   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
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index 6fdcbd7..571fee7 100644
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@@ -141,7 +141,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
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@@ -445,7 +445,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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@@ -253,7 +253,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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-<link href="cmsis.css" rel="stylesheet" type="text/css" />
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-   &#160;<span id="projectnumber">Version 2.1.2</span>
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-   <div id="projectbrief">Real-Time Operating System: API and RTX Reference Implementation</div>
-  </td>
- </tr>
- </tbody>
-</table>
-</div>
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-      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
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-<p>RTX5 structs.  
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-<tr class="separator:structosRtxTimer__t"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:structosRtxSemaphore__t"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:structosRtxMemoryPool__t"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-</table>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
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-<a name="structosRtxThread__t" id="structosRtxThread__t"></a>
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-Object State. </td></tr>
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-Object Flags. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a28478ea2856f6286899bc90b2c6a1ec4"></a>uint8_t</td>
-<td class="fieldname">
-attr</td>
-<td class="fielddoc">
-Object Attributes. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a8f8f80d37794cde9472343e4487ba3eb"></a>const char *</td>
-<td class="fieldname">
-name</td>
-<td class="fielddoc">
-Object Name. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a421971e8ae94fe0bd86b85a90445e71e"></a>struct osRtxThread_s *</td>
-<td class="fieldname">
-thread_next</td>
-<td class="fielddoc">
-Link pointer to next Thread in Object list. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="aa230a0d899f6c0750e6d454af3ef9b05"></a>struct osRtxThread_s *</td>
-<td class="fieldname">
-thread_prev</td>
-<td class="fielddoc">
-Link pointer to previous Thread in Object list. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a21a74cedec66715cd5d7422797035868"></a>struct osRtxThread_s *</td>
-<td class="fieldname">
-delay_next</td>
-<td class="fielddoc">
-Link pointer to next Thread in Delay list. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="adcfea33cc536708db8a3419ba0295551"></a>struct osRtxThread_s *</td>
-<td class="fieldname">
-delay_prev</td>
-<td class="fielddoc">
-Link pointer to previous Thread in Delay list. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a83ec0540c50d4e79bed99f1b384bd2b9"></a>struct osRtxThread_s *</td>
-<td class="fieldname">
-thread_join</td>
-<td class="fielddoc">
-Thread waiting to Join. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a458421a43d4f6dc515faf427bf579d00"></a>uint32_t</td>
-<td class="fieldname">
-delay</td>
-<td class="fielddoc">
-Delay Time. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a81659cc4c01e54e2424022728d9effc7"></a>int8_t</td>
-<td class="fieldname">
-priority</td>
-<td class="fielddoc">
-Thread Priority. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="ac67f8858081fb7a6e5a4ee8d2de3b348"></a>int8_t</td>
-<td class="fieldname">
-priority_base</td>
-<td class="fielddoc">
-Base Priority. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a1071334ebd46d95b9ab1dcad788b2adc"></a>uint8_t</td>
-<td class="fieldname">
-stack_frame</td>
-<td class="fielddoc">
-Stack Frame (EXC_RETURN[7..0]) </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a87c898585d0aeffdcf67c9e1b3befefe"></a>uint8_t</td>
-<td class="fieldname">
-flags_options</td>
-<td class="fielddoc">
-Thread/Event Flags Options. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a3c7b4f24d9527394f4b5a1135d117691"></a>uint32_t</td>
-<td class="fieldname">
-wait_flags</td>
-<td class="fielddoc">
-Waiting Thread/Event Flags. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="ae757685e50b875e953f4aff67ac24b1b"></a>uint32_t</td>
-<td class="fieldname">
-thread_flags</td>
-<td class="fielddoc">
-Thread Flags. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a70b3153655adaf42687fe250983f6c95"></a>struct osRtxMutex_s *</td>
-<td class="fieldname">
-mutex_list</td>
-<td class="fielddoc">
-Link pointer to list of owned Mutexes. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a447dbb69b4c036e118b3b1b8bd22fe60"></a>void *</td>
-<td class="fieldname">
-stack_mem</td>
-<td class="fielddoc">
-Stack Memory. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="ad63716408aae5b50857ca8ce74e3a3ff"></a>uint32_t</td>
-<td class="fieldname">
-stack_size</td>
-<td class="fielddoc">
-Stack Size. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a382a07e24a852d580d7548b8d517384c"></a>uint32_t</td>
-<td class="fieldname">
-sp</td>
-<td class="fielddoc">
-Current Stack Pointer. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="adf2ebf46aa7018845582f1c70de83598"></a>uint32_t</td>
-<td class="fieldname">
-thread_addr</td>
-<td class="fielddoc">
-Thread entry address. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="adaa6c424a231e5f6c788532675f33e16"></a>uint32_t</td>
-<td class="fieldname">
-tz_memory</td>
-<td class="fielddoc">
-TrustZone Memory Identifier. </td></tr>
-</table>
-
-</div>
-</div>
-<a name="structosRtxTimerFinfo__t" id="structosRtxTimerFinfo__t"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">struct osRtxTimerFinfo_t</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<div class="textblock"></div><table class="fieldtable">
-<tr><th colspan="3">Data Fields</th></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a9587c8102d13ec6b8df5dd068e221125"></a>void *</td>
-<td class="fieldname">
-fp</td>
-<td class="fielddoc">
-Function Pointer. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a9ce2ec4812a92cb6ab39f6e81e9173a9"></a>void *</td>
-<td class="fieldname">
-arg</td>
-<td class="fielddoc">
-Function Argument. </td></tr>
-</table>
-
-</div>
-</div>
-<a name="structosRtxTimer__t" id="structosRtxTimer__t"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">struct osRtxTimer_t</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<div class="textblock"></div><table class="fieldtable">
-<tr><th colspan="3">Data Fields</th></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a1e6927fa1486224044e568f9c370519b"></a>uint8_t</td>
-<td class="fieldname">
-id</td>
-<td class="fielddoc">
-Object Identifier. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a0b57aa10271a66f3dc936bba1d2f3830"></a>uint8_t</td>
-<td class="fieldname">
-state</td>
-<td class="fielddoc">
-Object State. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="aa2585d779da0ab21273a8d92de9a0ebe"></a>uint8_t</td>
-<td class="fieldname">
-flags</td>
-<td class="fielddoc">
-Object Flags. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a1d127017fb298b889f4ba24752d08b8e"></a>uint8_t</td>
-<td class="fieldname">
-type</td>
-<td class="fielddoc">
-Timer Type (Periodic/One-shot) </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a8f8f80d37794cde9472343e4487ba3eb"></a>const char *</td>
-<td class="fieldname">
-name</td>
-<td class="fielddoc">
-Object Name. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="ac8953ebf7df8aaf724cb12876ac8fb1a"></a>struct osRtxTimer_s *</td>
-<td class="fieldname">
-prev</td>
-<td class="fielddoc">
-Pointer to previous active Timer. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a8b9ac161a613448926b2c2b2c8dbe259"></a>struct osRtxTimer_s *</td>
-<td class="fieldname">
-next</td>
-<td class="fielddoc">
-Pointer to next active Timer. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a260e06ce96c2e4deebccaedeb059dc0b"></a>uint32_t</td>
-<td class="fieldname">
-tick</td>
-<td class="fielddoc">
-Timer current Tick. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="aee4a6239f04d660fc90663dd6b39ca95"></a>uint32_t</td>
-<td class="fieldname">
-load</td>
-<td class="fielddoc">
-Timer Load value. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="ab415a6615c5ddf5365ed86e58a1e1809"></a><a class="el" href="group__rtx5__specific__structs.html#structosRtxTimerFinfo__t">osRtxTimerFinfo_t</a></td>
-<td class="fieldname">
-finfo</td>
-<td class="fielddoc">
-Timer Function Info. </td></tr>
-</table>
-
-</div>
-</div>
-<a name="structosRtxEventFlags__t" id="structosRtxEventFlags__t"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">struct osRtxEventFlags_t</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<div class="textblock"></div><table class="fieldtable">
-<tr><th colspan="3">Data Fields</th></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a1e6927fa1486224044e568f9c370519b"></a>uint8_t</td>
-<td class="fieldname">
-id</td>
-<td class="fielddoc">
-Object Identifier. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a0b57aa10271a66f3dc936bba1d2f3830"></a>uint8_t</td>
-<td class="fieldname">
-state</td>
-<td class="fielddoc">
-Object State. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="aa2585d779da0ab21273a8d92de9a0ebe"></a>uint8_t</td>
-<td class="fieldname">
-flags</td>
-<td class="fielddoc">
-Object Flags. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="acb7bc06bed6f6408d719334fc41698c7"></a>uint8_t</td>
-<td class="fieldname">
-reserved</td>
-<td class="fielddoc">
-</td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a8f8f80d37794cde9472343e4487ba3eb"></a>const char *</td>
-<td class="fieldname">
-name</td>
-<td class="fielddoc">
-Object Name. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a8afd5feb676df99867375957b0587451"></a><a class="el" href="group__rtx5__specific__structs.html#structosRtxThread__t">osRtxThread_t</a> *</td>
-<td class="fieldname">
-thread_list</td>
-<td class="fielddoc">
-Waiting Threads List. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a7044be0679894b5daf72f19f9dd06e03"></a>uint32_t</td>
-<td class="fieldname">
-event_flags</td>
-<td class="fielddoc">
-Event Flags. </td></tr>
-</table>
-
-</div>
-</div>
-<a name="structosRtxMutex__t" id="structosRtxMutex__t"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">struct osRtxMutex_t</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<div class="textblock"></div><table class="fieldtable">
-<tr><th colspan="3">Data Fields</th></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a1e6927fa1486224044e568f9c370519b"></a>uint8_t</td>
-<td class="fieldname">
-id</td>
-<td class="fielddoc">
-Object Identifier. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a0b57aa10271a66f3dc936bba1d2f3830"></a>uint8_t</td>
-<td class="fieldname">
-state</td>
-<td class="fielddoc">
-Object State. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="aa2585d779da0ab21273a8d92de9a0ebe"></a>uint8_t</td>
-<td class="fieldname">
-flags</td>
-<td class="fielddoc">
-Object Flags. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a28478ea2856f6286899bc90b2c6a1ec4"></a>uint8_t</td>
-<td class="fieldname">
-attr</td>
-<td class="fielddoc">
-Object Attributes. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a8f8f80d37794cde9472343e4487ba3eb"></a>const char *</td>
-<td class="fieldname">
-name</td>
-<td class="fielddoc">
-Object Name. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a8afd5feb676df99867375957b0587451"></a><a class="el" href="group__rtx5__specific__structs.html#structosRtxThread__t">osRtxThread_t</a> *</td>
-<td class="fieldname">
-thread_list</td>
-<td class="fielddoc">
-Waiting Threads List. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a987889d464cb2925029e135b76aa0dc9"></a><a class="el" href="group__rtx5__specific__structs.html#structosRtxThread__t">osRtxThread_t</a> *</td>
-<td class="fieldname">
-owner_thread</td>
-<td class="fielddoc">
-Owner Thread. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a50b315b9b80bafdba54a7a731be1cc30"></a>struct osRtxMutex_s *</td>
-<td class="fieldname">
-owner_prev</td>
-<td class="fielddoc">
-Pointer to previous owned Mutex. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a54be7ae32f627ee70e1af8c54203ee5a"></a>struct osRtxMutex_s *</td>
-<td class="fieldname">
-owner_next</td>
-<td class="fielddoc">
-Pointer to next owned Mutex. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a92435efb84d6814afd444fd462802e9c"></a>uint8_t</td>
-<td class="fieldname">
-lock</td>
-<td class="fielddoc">
-Lock counter. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a735ef00341a84c02ba561c66de3d20af"></a>uint8_t</td>
-<td class="fieldname">
-padding[3]</td>
-<td class="fielddoc">
-</td></tr>
-</table>
-
-</div>
-</div>
-<a name="structosRtxSemaphore__t" id="structosRtxSemaphore__t"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">struct osRtxSemaphore_t</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<div class="textblock"></div><table class="fieldtable">
-<tr><th colspan="3">Data Fields</th></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a1e6927fa1486224044e568f9c370519b"></a>uint8_t</td>
-<td class="fieldname">
-id</td>
-<td class="fielddoc">
-Object Identifier. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a0b57aa10271a66f3dc936bba1d2f3830"></a>uint8_t</td>
-<td class="fieldname">
-state</td>
-<td class="fielddoc">
-Object State. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="aa2585d779da0ab21273a8d92de9a0ebe"></a>uint8_t</td>
-<td class="fieldname">
-flags</td>
-<td class="fielddoc">
-Object Flags. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="acb7bc06bed6f6408d719334fc41698c7"></a>uint8_t</td>
-<td class="fieldname">
-reserved</td>
-<td class="fielddoc">
-</td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a8f8f80d37794cde9472343e4487ba3eb"></a>const char *</td>
-<td class="fieldname">
-name</td>
-<td class="fielddoc">
-Object Name. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a8afd5feb676df99867375957b0587451"></a><a class="el" href="group__rtx5__specific__structs.html#structosRtxThread__t">osRtxThread_t</a> *</td>
-<td class="fieldname">
-thread_list</td>
-<td class="fielddoc">
-Waiting Threads List. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a4e2e4e1126848f81d9e943147e07f0e0"></a>uint16_t</td>
-<td class="fieldname">
-tokens</td>
-<td class="fielddoc">
-Current number of tokens. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="aa793f0e9a46e8b59b6d351535ee18a7d"></a>uint16_t</td>
-<td class="fieldname">
-max_tokens</td>
-<td class="fielddoc">
-Maximum number of tokens. </td></tr>
-</table>
-
-</div>
-</div>
-<a name="structosRtxMemoryPool__t" id="structosRtxMemoryPool__t"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">struct osRtxMemoryPool_t</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<div class="textblock"></div><table class="fieldtable">
-<tr><th colspan="3">Data Fields</th></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a1e6927fa1486224044e568f9c370519b"></a>uint8_t</td>
-<td class="fieldname">
-id</td>
-<td class="fielddoc">
-Object Identifier. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a0b57aa10271a66f3dc936bba1d2f3830"></a>uint8_t</td>
-<td class="fieldname">
-state</td>
-<td class="fielddoc">
-Object State. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="aa2585d779da0ab21273a8d92de9a0ebe"></a>uint8_t</td>
-<td class="fieldname">
-flags</td>
-<td class="fielddoc">
-Object Flags. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="acb7bc06bed6f6408d719334fc41698c7"></a>uint8_t</td>
-<td class="fieldname">
-reserved</td>
-<td class="fielddoc">
-</td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a8f8f80d37794cde9472343e4487ba3eb"></a>const char *</td>
-<td class="fieldname">
-name</td>
-<td class="fielddoc">
-Object Name. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a8afd5feb676df99867375957b0587451"></a><a class="el" href="group__rtx5__specific__structs.html#structosRtxThread__t">osRtxThread_t</a> *</td>
-<td class="fieldname">
-thread_list</td>
-<td class="fielddoc">
-Waiting Threads List. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="ac1cf67a8631962a42fa2da46f20a1a39"></a><a class="el" href="rtx__os_8h.html#structosRtxMpInfo__t">osRtxMpInfo_t</a></td>
-<td class="fieldname">
-mp_info</td>
-<td class="fielddoc">
-Memory Pool Info. </td></tr>
-</table>
-
-</div>
-</div>
-<a name="structosRtxMessageQueue__t" id="structosRtxMessageQueue__t"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">struct osRtxMessageQueue_t</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<div class="textblock"></div><table class="fieldtable">
-<tr><th colspan="3">Data Fields</th></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a1e6927fa1486224044e568f9c370519b"></a>uint8_t</td>
-<td class="fieldname">
-id</td>
-<td class="fielddoc">
-Object Identifier. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a0b57aa10271a66f3dc936bba1d2f3830"></a>uint8_t</td>
-<td class="fieldname">
-state</td>
-<td class="fielddoc">
-Object State. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="aa2585d779da0ab21273a8d92de9a0ebe"></a>uint8_t</td>
-<td class="fieldname">
-flags</td>
-<td class="fielddoc">
-Object Flags. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="acb7bc06bed6f6408d719334fc41698c7"></a>uint8_t</td>
-<td class="fieldname">
-reserved</td>
-<td class="fielddoc">
-</td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a8f8f80d37794cde9472343e4487ba3eb"></a>const char *</td>
-<td class="fieldname">
-name</td>
-<td class="fielddoc">
-Object Name. </td></tr>
-<tr><td class="fieldtype">
-<a class="anchor" id="a8afd5feb676df99867375957b0587451"></a><a class="el" href="group__rtx5__specific__structs.html#structosRtxThread__t">osRtxThread_t</a> *</td>
-<td class="fieldname">
-thread_list</td>
-<td class="fielddoc">
-Waiting Threads List. </td></tr>
-<tr><td class="fieldtype">
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+<p>Events generated by event flag functions.  
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+<tr class="separator:gaa281b7380c0fa725faa722badbeb2e5f"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:gaa1f48b9787e3a7d4f56449ed1dd12f26"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="memdesc:ga5b1b471923918ad294d16255d43ab306"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful event flags set (Op)  <a href="#ga5b1b471923918ad294d16255d43ab306">More...</a><br/></td></tr>
+<tr class="separator:ga5b1b471923918ad294d16255d43ab306"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab31f9da565b0170d8e89edf0e848f28b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#gab31f9da565b0170d8e89edf0e848f28b">EvrRtxEventFlagsClear</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t flags)</td></tr>
+<tr class="memdesc:gab31f9da565b0170d8e89edf0e848f28b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on event flags clear (API)  <a href="#gab31f9da565b0170d8e89edf0e848f28b">More...</a><br/></td></tr>
+<tr class="separator:gab31f9da565b0170d8e89edf0e848f28b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9e4c4e5d45bc721439c1919621a49d5a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#ga9e4c4e5d45bc721439c1919621a49d5a">EvrRtxEventFlagsClearDone</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t event_flags)</td></tr>
+<tr class="memdesc:ga9e4c4e5d45bc721439c1919621a49d5a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful event flags clear (Op)  <a href="#ga9e4c4e5d45bc721439c1919621a49d5a">More...</a><br/></td></tr>
+<tr class="separator:ga9e4c4e5d45bc721439c1919621a49d5a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga113c32ff195c612ec2fb6a9dd5740184"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#ga113c32ff195c612ec2fb6a9dd5740184">EvrRtxEventFlagsGet</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t event_flags)</td></tr>
+<tr class="memdesc:ga113c32ff195c612ec2fb6a9dd5740184"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on event flags retrieve (API)  <a href="#ga113c32ff195c612ec2fb6a9dd5740184">More...</a><br/></td></tr>
+<tr class="separator:ga113c32ff195c612ec2fb6a9dd5740184"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac8361874ffdd854e3778f21d070fed24"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#gac8361874ffdd854e3778f21d070fed24">EvrRtxEventFlagsWait</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t flags, uint32_t options, uint32_t timeout)</td></tr>
+<tr class="memdesc:gac8361874ffdd854e3778f21d070fed24"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on wait for event flags (API)  <a href="#gac8361874ffdd854e3778f21d070fed24">More...</a><br/></td></tr>
+<tr class="separator:gac8361874ffdd854e3778f21d070fed24"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafd598e0b02a31083fb41626d68fa489e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#gafd598e0b02a31083fb41626d68fa489e">EvrRtxEventFlagsWaitPending</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t flags, uint32_t options, uint32_t timeout)</td></tr>
+<tr class="memdesc:gafd598e0b02a31083fb41626d68fa489e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on pending wait for event flags (Op)  <a href="#gafd598e0b02a31083fb41626d68fa489e">More...</a><br/></td></tr>
+<tr class="separator:gafd598e0b02a31083fb41626d68fa489e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga877235cbe04188b831b70a3c2237c827"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#ga877235cbe04188b831b70a3c2237c827">EvrRtxEventFlagsWaitTimeout</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id)</td></tr>
+<tr class="memdesc:ga877235cbe04188b831b70a3c2237c827"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on wait timeout for event flags (Op)  <a href="#ga877235cbe04188b831b70a3c2237c827">More...</a><br/></td></tr>
+<tr class="separator:ga877235cbe04188b831b70a3c2237c827"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga7b446f241c971db432ebac5d176bd9de"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#ga7b446f241c971db432ebac5d176bd9de">EvrRtxEventFlagsWaitCompleted</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t flags, uint32_t options, uint32_t event_flags)</td></tr>
+<tr class="memdesc:ga7b446f241c971db432ebac5d176bd9de"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful wait for event flags (Op)  <a href="#ga7b446f241c971db432ebac5d176bd9de">More...</a><br/></td></tr>
+<tr class="separator:ga7b446f241c971db432ebac5d176bd9de"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga66f32e4dddc68cdfd56c32b88b7f13ff"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#ga66f32e4dddc68cdfd56c32b88b7f13ff">EvrRtxEventFlagsWaitNotCompleted</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t flags, uint32_t options)</td></tr>
+<tr class="memdesc:ga66f32e4dddc68cdfd56c32b88b7f13ff"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on unsuccessful wait for event flags (Op)  <a href="#ga66f32e4dddc68cdfd56c32b88b7f13ff">More...</a><br/></td></tr>
+<tr class="separator:ga66f32e4dddc68cdfd56c32b88b7f13ff"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga10e98e35999350e9e337c716ba4dc079"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#ga10e98e35999350e9e337c716ba4dc079">EvrRtxEventFlagsDelete</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id)</td></tr>
+<tr class="memdesc:ga10e98e35999350e9e337c716ba4dc079"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on event flags delete (API)  <a href="#ga10e98e35999350e9e337c716ba4dc079">More...</a><br/></td></tr>
+<tr class="separator:ga10e98e35999350e9e337c716ba4dc079"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga2ef153a6ee7a8d72375f81128454ede9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#ga2ef153a6ee7a8d72375f81128454ede9">EvrRtxEventFlagsDestroyed</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id)</td></tr>
+<tr class="memdesc:ga2ef153a6ee7a8d72375f81128454ede9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful event flags delete (Op)  <a href="#ga2ef153a6ee7a8d72375f81128454ede9">More...</a><br/></td></tr>
+<tr class="separator:ga2ef153a6ee7a8d72375f81128454ede9"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<h2 class="groupheader">Function Documentation</h2>
+<a class="anchor" id="gaa281b7380c0fa725faa722badbeb2e5f"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxEventFlagsError </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
+          <td class="paramname"><em>ef_id</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramname"><em>status</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">ef_id</td><td>event flags ID obtained by <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a> or NULL when ID is unknown. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">status</td><td>extended execution status.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>EventFlagsError</b> is generated when <a class="el" href="group__CMSIS__RTOS__EventFlags.html">Event Flags</a> routines complete their execution due to an error.</p>
+<p>The status parameter indicates the execution status and can be one of the <a class="el" href="group__CMSIS__RTOS__Definitions.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813e">osStatus_t codes</a> or one of the extended execution status codes which are summarized in the table below.</p>
+<table class="doxtable">
+<tr>
+<th align="left">Extended Status Code </th><th align="left">Description  </th></tr>
+<tr>
+<td align="left">osRtxErrorKernelNotReady </td><td align="left">Kernel scheduler is not in Ready state. </td></tr>
+<tr>
+<td align="left">osRtxErrorKernelNotRunning </td><td align="left">Kernel scheduler is not executing - there is no running thread. </td></tr>
+<tr>
+<td align="left">osRtxErrorInvalidControlBlock </td><td align="left">Object control block with invalid alignment or size was specified. </td></tr>
+<tr>
+<td align="left">osRtxErrorInvalidDataMemory </td><td align="left">Object data memory with invalid alignment or size was specified. </td></tr>
+<tr>
+<td align="left">osRtxErrorInvalidThreadStack </td><td align="left">Thread stack memory with invalid alignment or size was specified. </td></tr>
+<tr>
+<td align="left">osRtxErrorInvalidPriority </td><td align="left">Invalid thread priority was specified. </td></tr>
+<tr>
+<td align="left">osRtxErrorThreadNotJoinable </td><td align="left">Specified thread is not joinable. </td></tr>
+<tr>
+<td align="left">osRtxErrorMutexNotOwned </td><td align="left">Specified mutex is not owned by the current running thread. </td></tr>
+<tr>
+<td align="left">osRtxErrorMutexNotLocked </td><td align="left">Specified mutex is not locked. </td></tr>
+<tr>
+<td align="left">osRtxErrorMutexLockLimit </td><td align="left">Maximum number of recursive mutex locks reached. </td></tr>
+<tr>
+<td align="left">osRtxErrorSemaphoreCountLimit </td><td align="left">Semaphore count limit reached. </td></tr>
+<tr>
+<td align="left">osRtxErrorTZ_InitContext_S </td><td align="left">Secure context memory system initialization failed. </td></tr>
+<tr>
+<td align="left">osRtxErrorTZ_AllocContext_S </td><td align="left">Secure context memory allocation failed. </td></tr>
+<tr>
+<td align="left">osRtxErrorTZ_FreeContext_S </td><td align="left">Secure context memory deallocation failed. </td></tr>
+<tr>
+<td align="left">osRtxErrorTZ_LoadContext_S </td><td align="left">Secure context load failed. </td></tr>
+<tr>
+<td align="left">osRtxErrorTZ_SaveContext_S </td><td align="left">Secure context save failed. </td></tr>
+</table>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>ef_id</b> : event flags ID.</li>
+<li><b>status</b> : execution status code. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="gae798cdc4cb10ada732e592318037cba7"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxEventFlagsNew </td>
+          <td>(</td>
+          <td class="paramtype">const <a class="el" href="group__CMSIS__RTOS__EventFlags.html#structosEventFlagsAttr__t">osEventFlagsAttr_t</a> *&#160;</td>
+          <td class="paramname"><em>attr</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">attr</td><td>event flags attributes.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>EventFlagsNew</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a> is called.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>attr</b> : memory address of Event Flags attributes or 0 when they are not specified. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="gaa1f48b9787e3a7d4f56449ed1dd12f26"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxEventFlagsCreated </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
+          <td class="paramname"><em>ef_id</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const char *&#160;</td>
+          <td class="paramname"><em>name</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">ef_id</td><td>event flags ID obtained by <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">name</td><td>pointer to event flags object name.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>EventFlagsCreated</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a> successfully creates a event flags object.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>ef_id</b> : event flags ID. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="gae9ebcbc09a1c15c719d95fe7b8c2ee18"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxEventFlagsGetName </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
+          <td class="paramname"><em>ef_id</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const char *&#160;</td>
+          <td class="paramname"><em>name</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">ef_id</td><td>event flags ID obtained by <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">name</td><td>pointer to event flags object name.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>EventFlagsGetName</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__EventFlags.html#ga59f4ddf0ee8c395b1672bb978d1cfc88">osEventFlagsGetName</a> is called and its execution result is known.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>ef_id</b> : event flags ID.</li>
+<li><b>name</b> : retrieved memory address of name string (0 in case of a failure). </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="ga5e5c9bd8a0522fc9301782edd6e5ec1f"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxEventFlagsSet </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
+          <td class="paramname"><em>ef_id</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>flags</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">ef_id</td><td>event flags ID obtained by <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">flags</td><td>flags that shall be set.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>EventFlagsSet</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__EventFlags.html#ga33b71d14cecf90b4e72639dd19f23a5e">osEventFlagsSet</a> is called.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>ef_id</b> : event flags ID.</li>
+<li><b>flags</b> : flags that shall be set. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="ga5b1b471923918ad294d16255d43ab306"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxEventFlagsSetDone </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
+          <td class="paramname"><em>ef_id</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>event_flags</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">ef_id</td><td>event flags ID obtained by <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">event_flags</td><td>event flags after setting.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>EventFlagsSetDone</b> is generated when event flags are successfully set.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>ef_id</b> : event flags ID.</li>
+<li><b>event_flags</b> : event flags after setting. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="gab31f9da565b0170d8e89edf0e848f28b"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxEventFlagsClear </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
+          <td class="paramname"><em>ef_id</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>flags</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">ef_id</td><td>event flags ID obtained by <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">flags</td><td>flags that shall be cleared.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>EventFlagsClear</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__EventFlags.html#ga93bf258ca0007c6641fbe8e4f2b8a1e5">osEventFlagsClear</a> is called.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>ef_id</b> : event flags ID.</li>
+<li><b>flags</b> : flags that shall be cleared. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="ga9e4c4e5d45bc721439c1919621a49d5a"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxEventFlagsClearDone </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
+          <td class="paramname"><em>ef_id</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>event_flags</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">ef_id</td><td>event flags ID obtained by <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">event_flags</td><td>event flags before clearing.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>EventFlagsClearDone</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__EventFlags.html#ga93bf258ca0007c6641fbe8e4f2b8a1e5">osEventFlagsClear</a> successfully clears the event flags.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>ef_id</b> : event flags ID.</li>
+<li><b>event_flags</b> : event flags before clearing. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="ga113c32ff195c612ec2fb6a9dd5740184"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxEventFlagsGet </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
+          <td class="paramname"><em>ef_id</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>event_flags</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">ef_id</td><td>event flags ID obtained by <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">event_flags</td><td>current event flags.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>EventFlagsGet</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__EventFlags.html#ga8bda3185f46bfd278cea8a6cf357677d">osEventFlagsGet</a> is called and its execution result is known.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>ef_id</b> : event flags ID.</li>
+<li><b>event_flags</b> : retrieved current event flags. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="gac8361874ffdd854e3778f21d070fed24"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxEventFlagsWait </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
+          <td class="paramname"><em>ef_id</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>flags</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>options</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>timeout</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">ef_id</td><td>event flags ID obtained by <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">flags</td><td>flags to wait for. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">options</td><td>flags options (osFlagsXxxx). </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">timeout</td><td><a class="el" href="theory_of_operation.html#CMSIS_RTOS_TimeOutValue">Timeout Value</a> or 0 in case of no time-out.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>EventFlagsWait</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__EventFlags.html#ga52acb34a8322e58020227344fe662b4e">osEventFlagsWait</a> is called.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>ef_id</b> : event flags ID.</li>
+<li><b>flags</b> : flags to wait for.</li>
+<li><b>options</b> : flags options (refer to <a class="el" href="group__CMSIS__RTOS__EventFlags.html#ga52acb34a8322e58020227344fe662b4e">event flags options</a>).</li>
+<li><b>timeout</b> : <a class="el" href="theory_of_operation.html#CMSIS_RTOS_TimeOutValue">Timeout Value</a>. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="gafd598e0b02a31083fb41626d68fa489e"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxEventFlagsWaitPending </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
+          <td class="paramname"><em>ef_id</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>flags</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>options</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>timeout</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">ef_id</td><td>event flags ID obtained by <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">flags</td><td>flags to wait for. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">options</td><td>flags options (osFlagsXxxx). </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">timeout</td><td><a class="el" href="theory_of_operation.html#CMSIS_RTOS_TimeOutValue">Timeout Value</a> or 0 in case of no time-out.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>EventFlagsWaitPending</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__EventFlags.html#ga52acb34a8322e58020227344fe662b4e">osEventFlagsWait</a> starts waiting for event flags to become signaled.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>ef_id</b> : event flags ID.</li>
+<li><b>flags</b> : flags to wait for.</li>
+<li><b>options</b> : flags options (refer to <a class="el" href="group__CMSIS__RTOS__EventFlags.html#ga52acb34a8322e58020227344fe662b4e">event flags options</a>).</li>
+<li><b>timeout</b> : <a class="el" href="theory_of_operation.html#CMSIS_RTOS_TimeOutValue">Timeout Value</a>. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="ga877235cbe04188b831b70a3c2237c827"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxEventFlagsWaitTimeout </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
+          <td class="paramname"><em>ef_id</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">ef_id</td><td>event flags ID obtained by <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>EventFlagsWaitTimeout</b> is generated when wait for event flags to become signaled is aborted due to expired wait timeout.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>ef_id</b> : event flags ID. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="ga7b446f241c971db432ebac5d176bd9de"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxEventFlagsWaitCompleted </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
+          <td class="paramname"><em>ef_id</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>flags</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>options</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>event_flags</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">ef_id</td><td>event flags ID obtained by <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">flags</td><td>flags to wait for. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">options</td><td>flags options (osFlagsXxxx). </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">event_flags</td><td>event flags before clearing or 0 if specified flags have not been set.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>EventFlagsWaitCompleted</b> is generated when waiting for event flags ends because requested flags were signaled.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>ef_id</b> : event flags ID.</li>
+<li><b>flags</b> : flags to wait for.</li>
+<li><b>options</b> : flags option (refer to <a class="el" href="group__CMSIS__RTOS__EventFlags.html#ga52acb34a8322e58020227344fe662b4e">event flags options</a>).</li>
+<li><b>event_flags</b> : event flags before clearing or 0 if specified flags have not been set. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="ga66f32e4dddc68cdfd56c32b88b7f13ff"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxEventFlagsWaitNotCompleted </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
+          <td class="paramname"><em>ef_id</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>flags</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>options</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">ef_id</td><td>event flags ID obtained by <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">flags</td><td>flags to wait for. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">options</td><td>flags options (osFlagsXxxx).</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>EventFlagsWaitNotCompleted</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__EventFlags.html#ga52acb34a8322e58020227344fe662b4e">osEventFlagsWait</a> returns without timeout and specified event flags were not signaled.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>ef_id</b> : event flags ID.</li>
+<li><b>flags</b> : flags to wait for.</li>
+<li><b>options</b> : flags options (refer to <a class="el" href="group__CMSIS__RTOS__EventFlags.html#ga52acb34a8322e58020227344fe662b4e">event flags options</a>). </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="ga10e98e35999350e9e337c716ba4dc079"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxEventFlagsDelete </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
+          <td class="paramname"><em>ef_id</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">ef_id</td><td>event flags ID obtained by <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>EventFlagsDelete</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__EventFlags.html#ga7c4acf2fb0d506ec82905dee53fb5435">osEventFlagsDelete</a> is called.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>ef_id</b> : event flags ID. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="ga2ef153a6ee7a8d72375f81128454ede9"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxEventFlagsDestroyed </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
+          <td class="paramname"><em>ef_id</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">ef_id</td><td>event flags ID obtained by <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>EventFlagsDestroyed</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__EventFlags.html#ga7c4acf2fb0d506ec82905dee53fb5435">osEventFlagsDelete</a> successfully deletes the event flags object.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>ef_id</b> : event flags ID. </li>
+</ul>
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/RTOS2/html/group__rtx__evr__event__flags.js b/docs/RTOS2/html/group__rtx__evr__event__flags.js
new file mode 100644
index 0000000..f9e386f
--- /dev/null
+++ b/docs/RTOS2/html/group__rtx__evr__event__flags.js
@@ -0,0 +1,19 @@
+var group__rtx__evr__event__flags =
+[
+    [ "EvrRtxEventFlagsError", "group__rtx__evr__event__flags.html#gaa281b7380c0fa725faa722badbeb2e5f", null ],
+    [ "EvrRtxEventFlagsNew", "group__rtx__evr__event__flags.html#gae798cdc4cb10ada732e592318037cba7", null ],
+    [ "EvrRtxEventFlagsCreated", "group__rtx__evr__event__flags.html#gaa1f48b9787e3a7d4f56449ed1dd12f26", null ],
+    [ "EvrRtxEventFlagsGetName", "group__rtx__evr__event__flags.html#gae9ebcbc09a1c15c719d95fe7b8c2ee18", null ],
+    [ "EvrRtxEventFlagsSet", "group__rtx__evr__event__flags.html#ga5e5c9bd8a0522fc9301782edd6e5ec1f", null ],
+    [ "EvrRtxEventFlagsSetDone", "group__rtx__evr__event__flags.html#ga5b1b471923918ad294d16255d43ab306", null ],
+    [ "EvrRtxEventFlagsClear", "group__rtx__evr__event__flags.html#gab31f9da565b0170d8e89edf0e848f28b", null ],
+    [ "EvrRtxEventFlagsClearDone", "group__rtx__evr__event__flags.html#ga9e4c4e5d45bc721439c1919621a49d5a", null ],
+    [ "EvrRtxEventFlagsGet", "group__rtx__evr__event__flags.html#ga113c32ff195c612ec2fb6a9dd5740184", null ],
+    [ "EvrRtxEventFlagsWait", "group__rtx__evr__event__flags.html#gac8361874ffdd854e3778f21d070fed24", null ],
+    [ "EvrRtxEventFlagsWaitPending", "group__rtx__evr__event__flags.html#gafd598e0b02a31083fb41626d68fa489e", null ],
+    [ "EvrRtxEventFlagsWaitTimeout", "group__rtx__evr__event__flags.html#ga877235cbe04188b831b70a3c2237c827", null ],
+    [ "EvrRtxEventFlagsWaitCompleted", "group__rtx__evr__event__flags.html#ga7b446f241c971db432ebac5d176bd9de", null ],
+    [ "EvrRtxEventFlagsWaitNotCompleted", "group__rtx__evr__event__flags.html#ga66f32e4dddc68cdfd56c32b88b7f13ff", null ],
+    [ "EvrRtxEventFlagsDelete", "group__rtx__evr__event__flags.html#ga10e98e35999350e9e337c716ba4dc079", null ],
+    [ "EvrRtxEventFlagsDestroyed", "group__rtx__evr__event__flags.html#ga2ef153a6ee7a8d72375f81128454ede9", null ]
+];
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-<a href="#func-members">Functions</a>  </div>
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-<div class="title">Event Flags Functions<div class="ingroups"><a class="el" href="group__rtx__evr.html">Event functions</a></div></div>  </div>
-</div><!--header-->
-<div class="contents">
-
-<p>Events generated by event flag functions.  
-<a href="#details">More...</a></p>
-<table class="memberdecls">
-<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
-Functions</h2></td></tr>
-<tr class="memitem:gaa281b7380c0fa725faa722badbeb2e5f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flasg.html#gaa281b7380c0fa725faa722badbeb2e5f">EvrRtxEventFlagsError</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, int32_t status)</td></tr>
-<tr class="memdesc:gaa281b7380c0fa725faa722badbeb2e5f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on event flags error (Error)  <a href="#gaa281b7380c0fa725faa722badbeb2e5f">More...</a><br/></td></tr>
-<tr class="separator:gaa281b7380c0fa725faa722badbeb2e5f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gae798cdc4cb10ada732e592318037cba7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flasg.html#gae798cdc4cb10ada732e592318037cba7">EvrRtxEventFlagsNew</a> (const <a class="el" href="group__CMSIS__RTOS__EventFlags.html#structosEventFlagsAttr__t">osEventFlagsAttr_t</a> *attr)</td></tr>
-<tr class="memdesc:gae798cdc4cb10ada732e592318037cba7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on event flags create and initialize (API)  <a href="#gae798cdc4cb10ada732e592318037cba7">More...</a><br/></td></tr>
-<tr class="separator:gae798cdc4cb10ada732e592318037cba7"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaa1f48b9787e3a7d4f56449ed1dd12f26"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flasg.html#gaa1f48b9787e3a7d4f56449ed1dd12f26">EvrRtxEventFlagsCreated</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, const char *name)</td></tr>
-<tr class="memdesc:gaa1f48b9787e3a7d4f56449ed1dd12f26"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful event flags create (Op)  <a href="#gaa1f48b9787e3a7d4f56449ed1dd12f26">More...</a><br/></td></tr>
-<tr class="separator:gaa1f48b9787e3a7d4f56449ed1dd12f26"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gae9ebcbc09a1c15c719d95fe7b8c2ee18"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flasg.html#gae9ebcbc09a1c15c719d95fe7b8c2ee18">EvrRtxEventFlagsGetName</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, const char *name)</td></tr>
-<tr class="memdesc:gae9ebcbc09a1c15c719d95fe7b8c2ee18"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on event flags name retrieve (API)  <a href="#gae9ebcbc09a1c15c719d95fe7b8c2ee18">More...</a><br/></td></tr>
-<tr class="separator:gae9ebcbc09a1c15c719d95fe7b8c2ee18"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga877235cbe04188b831b70a3c2237c827"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flasg.html#ga877235cbe04188b831b70a3c2237c827">EvrRtxEventFlagsWaitTimeout</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id)</td></tr>
-<tr class="memdesc:ga877235cbe04188b831b70a3c2237c827"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on wait timeout for event flags (Op)  <a href="#ga877235cbe04188b831b70a3c2237c827">More...</a><br/></td></tr>
-<tr class="separator:ga877235cbe04188b831b70a3c2237c827"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga10e98e35999350e9e337c716ba4dc079"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flasg.html#ga10e98e35999350e9e337c716ba4dc079">EvrRtxEventFlagsDelete</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id)</td></tr>
-<tr class="memdesc:ga10e98e35999350e9e337c716ba4dc079"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on event flags delete (API)  <a href="#ga10e98e35999350e9e337c716ba4dc079">More...</a><br/></td></tr>
-<tr class="separator:ga10e98e35999350e9e337c716ba4dc079"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga2ef153a6ee7a8d72375f81128454ede9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flasg.html#ga2ef153a6ee7a8d72375f81128454ede9">EvrRtxEventFlagsDestroyed</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id)</td></tr>
-<tr class="memdesc:ga2ef153a6ee7a8d72375f81128454ede9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful event flags delete (Op)  <a href="#ga2ef153a6ee7a8d72375f81128454ede9">More...</a><br/></td></tr>
-<tr class="separator:ga2ef153a6ee7a8d72375f81128454ede9"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="gaa281b7380c0fa725faa722badbeb2e5f"></a>
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-          <td class="memname">void EvrRtxEventFlagsError </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
-          <td class="paramname"><em>ef_id</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">int32_t&#160;</td>
-          <td class="paramname"><em>status</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
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-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">ef_id</td><td>event flags ID obtained by <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a> or NULL when ID is unknown. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">status</td><td>extended execution status.</td></tr>
-  </table>
-  </dd>
-</dl>
-<p>The event <b>EventFlagsError</b> is generated when <a class="el" href="group__CMSIS__RTOS__EventFlags.html">Event Flags</a> routines complete their execution due to an error.</p>
-<p>The status parameter indicates the execution status and can be one of the <a class="el" href="group__CMSIS__RTOS__Definitions.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813e">osStatus_t codes</a> or one of the extended execution status codes which are summarized in the table below.</p>
-<table class="doxtable">
-<tr>
-<th align="left">Extended Status Code </th><th align="left">Description  </th></tr>
-<tr>
-<td align="left">osRtxErrorKernelNotReady </td><td align="left">Kernel scheduler is not in Ready state. </td></tr>
-<tr>
-<td align="left">osRtxErrorKernelNotRunning </td><td align="left">Kernel scheduler is not executing - there is no running thread. </td></tr>
-<tr>
-<td align="left">osRtxErrorInvalidControlBlock </td><td align="left">Object control block with invalid alignment or size was specified. </td></tr>
-<tr>
-<td align="left">osRtxErrorInvalidDataMemory </td><td align="left">Object data memory with invalid alignment or size was specified. </td></tr>
-<tr>
-<td align="left">osRtxErrorInvalidThreadStack </td><td align="left">Thread stack memory with invalid alignment or size was specified. </td></tr>
-<tr>
-<td align="left">osRtxErrorInvalidPriority </td><td align="left">Invalid thread priority was specified. </td></tr>
-<tr>
-<td align="left">osRtxErrorThreadNotJoinable </td><td align="left">Specified thread is not joinable. </td></tr>
-<tr>
-<td align="left">osRtxErrorMutexNotOwned </td><td align="left">Specified mutex is not owned by the current running thread. </td></tr>
-<tr>
-<td align="left">osRtxErrorMutexNotLocked </td><td align="left">Specified mutex is not locked. </td></tr>
-<tr>
-<td align="left">osRtxErrorMutexLockLimit </td><td align="left">Maximum number of recursive mutex locks reached. </td></tr>
-<tr>
-<td align="left">osRtxErrorSemaphoreCountLimit </td><td align="left">Semaphore count limit reached. </td></tr>
-<tr>
-<td align="left">osRtxErrorTZ_InitContext_S </td><td align="left">Secure context memory system initialization failed. </td></tr>
-<tr>
-<td align="left">osRtxErrorTZ_AllocContext_S </td><td align="left">Secure context memory allocation failed. </td></tr>
-<tr>
-<td align="left">osRtxErrorTZ_FreeContext_S </td><td align="left">Secure context memory deallocation failed. </td></tr>
-<tr>
-<td align="left">osRtxErrorTZ_LoadContext_S </td><td align="left">Secure context load failed. </td></tr>
-<tr>
-<td align="left">osRtxErrorTZ_SaveContext_S </td><td align="left">Secure context save failed. </td></tr>
-</table>
-<p><b>Value</b> in the Event Recorder shows:</p>
-<ul>
-<li><b>ef_id</b> : event flags ID.</li>
-<li><b>status</b> : execution status code. </li>
-</ul>
-
-</div>
-</div>
-<a class="anchor" id="gae798cdc4cb10ada732e592318037cba7"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void EvrRtxEventFlagsNew </td>
-          <td>(</td>
-          <td class="paramtype">const <a class="el" href="group__CMSIS__RTOS__EventFlags.html#structosEventFlagsAttr__t">osEventFlagsAttr_t</a> *&#160;</td>
-          <td class="paramname"><em>attr</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">attr</td><td>event flags attributes.</td></tr>
-  </table>
-  </dd>
-</dl>
-<p>The event <b>EventFlagsNew</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a> is called.</p>
-<p><b>Value</b> in the Event Recorder shows:</p>
-<ul>
-<li><b>attr</b> : memory address of Event Flags attributes or 0 when they are not specified.</li>
-</ul>
-<p>In case when <a class="el" href="group__CMSIS__RTOS__EventFlags.html#structosEventFlagsAttr__t">event flags attributes</a> are provided in the API call they are also detailed in the Event Recorder. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaa1f48b9787e3a7d4f56449ed1dd12f26"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void EvrRtxEventFlagsCreated </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
-          <td class="paramname"><em>ef_id</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">const char *&#160;</td>
-          <td class="paramname"><em>name</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">ef_id</td><td>event flags ID obtained by <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">name</td><td>pointer to event flags object name.</td></tr>
-  </table>
-  </dd>
-</dl>
-<p>The event <b>EventFlagsCreated</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a> successfully creates a event flags object.</p>
-<p><b>Value</b> in the Event Recorder shows:</p>
-<ul>
-<li><b>ef_id</b> : event flags ID. </li>
-</ul>
-
-</div>
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-<a class="anchor" id="gae9ebcbc09a1c15c719d95fe7b8c2ee18"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void EvrRtxEventFlagsGetName </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
-          <td class="paramname"><em>ef_id</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">const char *&#160;</td>
-          <td class="paramname"><em>name</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">ef_id</td><td>event flags ID obtained by <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">name</td><td>pointer to event flags object name.</td></tr>
-  </table>
-  </dd>
-</dl>
-<p>The event <b>EventFlagsGetName</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__EventFlags.html#ga59f4ddf0ee8c395b1672bb978d1cfc88">osEventFlagsGetName</a> is called and its execution result is known.</p>
-<p><b>Value</b> in the Event Recorder shows:</p>
-<ul>
-<li><b>ef_id</b> : event flags ID.</li>
-<li><b>name</b> : retrieved memory address of name string (0 in case of a failure). </li>
-</ul>
-
-</div>
-</div>
-<a class="anchor" id="ga877235cbe04188b831b70a3c2237c827"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void EvrRtxEventFlagsWaitTimeout </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
-          <td class="paramname"><em>ef_id</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">ef_id</td><td>event flags ID obtained by <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>.</td></tr>
-  </table>
-  </dd>
-</dl>
-<p>The event <b>EventFlagsWaitTimeout</b> is generated when wait for event flags to become signaled is aborted due to expired wait timeout.</p>
-<p><b>Value</b> in the Event Recorder shows:</p>
-<ul>
-<li><b>ef_id</b> : event flags ID. </li>
-</ul>
-
-</div>
-</div>
-<a class="anchor" id="ga10e98e35999350e9e337c716ba4dc079"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void EvrRtxEventFlagsDelete </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
-          <td class="paramname"><em>ef_id</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">ef_id</td><td>event flags ID obtained by <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>.</td></tr>
-  </table>
-  </dd>
-</dl>
-<p>The event <b>EventFlagsDelete</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__EventFlags.html#ga7c4acf2fb0d506ec82905dee53fb5435">osEventFlagsDelete</a> is called.</p>
-<p><b>Value</b> in the Event Recorder shows:</p>
-<ul>
-<li><b>ef_id</b> : event flags ID. </li>
-</ul>
-
-</div>
-</div>
-<a class="anchor" id="ga2ef153a6ee7a8d72375f81128454ede9"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void EvrRtxEventFlagsDestroyed </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
-          <td class="paramname"><em>ef_id</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">ef_id</td><td>event flags ID obtained by <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>.</td></tr>
-  </table>
-  </dd>
-</dl>
-<p>The event <b>EventFlagsDestroyed</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__EventFlags.html#ga7c4acf2fb0d506ec82905dee53fb5435">osEventFlagsDelete</a> successfully deletes the event flags object.</p>
-<p><b>Value</b> in the Event Recorder shows:</p>
-<ul>
-<li><b>ef_id</b> : event flags ID. </li>
-</ul>
-
-</div>
-</div>
-</div><!-- contents -->
-</div><!-- doc-content -->
-<!-- start footer part -->
-<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
-  <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
-	<!--
-    <a href="http://www.doxygen.org/index.html">
-    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
-	-->
-	</li>
-  </ul>
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-</html>
diff --git a/docs/RTOS2/html/group__rtx__evr__event__flasg.js b/docs/RTOS2/html/group__rtx__evr__event__flasg.js
deleted file mode 100644
index 2b90d6e..0000000
--- a/docs/RTOS2/html/group__rtx__evr__event__flasg.js
+++ /dev/null
@@ -1,10 +0,0 @@
-var group__rtx__evr__event__flasg =
-[
-    [ "EvrRtxEventFlagsError", "group__rtx__evr__event__flasg.html#gaa281b7380c0fa725faa722badbeb2e5f", null ],
-    [ "EvrRtxEventFlagsNew", "group__rtx__evr__event__flasg.html#gae798cdc4cb10ada732e592318037cba7", null ],
-    [ "EvrRtxEventFlagsCreated", "group__rtx__evr__event__flasg.html#gaa1f48b9787e3a7d4f56449ed1dd12f26", null ],
-    [ "EvrRtxEventFlagsGetName", "group__rtx__evr__event__flasg.html#gae9ebcbc09a1c15c719d95fe7b8c2ee18", null ],
-    [ "EvrRtxEventFlagsWaitTimeout", "group__rtx__evr__event__flasg.html#ga877235cbe04188b831b70a3c2237c827", null ],
-    [ "EvrRtxEventFlagsDelete", "group__rtx__evr__event__flasg.html#ga10e98e35999350e9e337c716ba4dc079", null ],
-    [ "EvrRtxEventFlagsDestroyed", "group__rtx__evr__event__flasg.html#ga2ef153a6ee7a8d72375f81128454ede9", null ]
-];
\ No newline at end of file
diff --git a/docs/RTOS2/html/group__rtx__evr__kernel.html b/docs/RTOS2/html/group__rtx__evr__kernel.html
index 0842158..afa6ce3 100644
--- a/docs/RTOS2/html/group__rtx__evr__kernel.html
+++ b/docs/RTOS2/html/group__rtx__evr__kernel.html
@@ -131,9 +131,9 @@
 <tr class="memitem:ga4c2a175b79d39d70a4a5112e270d03f2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__kernel.html#ga4c2a175b79d39d70a4a5112e270d03f2">EvrRtxKernelGetInfo</a> (<a class="el" href="group__CMSIS__RTOS__KernelCtrl.html#structosVersion__t">osVersion_t</a> *version, char *id_buf, uint32_t id_size)</td></tr>
 <tr class="memdesc:ga4c2a175b79d39d70a4a5112e270d03f2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on RTOS kernel information retrieve (API)  <a href="#ga4c2a175b79d39d70a4a5112e270d03f2">More...</a><br/></td></tr>
 <tr class="separator:ga4c2a175b79d39d70a4a5112e270d03f2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf09b8cd94ad2384e3ab518f0df94a651"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__kernel.html#gaf09b8cd94ad2384e3ab518f0df94a651">EvrRtxKernelInfoRetrieved</a> (<a class="el" href="group__CMSIS__RTOS__KernelCtrl.html#structosVersion__t">osVersion_t</a> *version, char *id_buf)</td></tr>
-<tr class="memdesc:gaf09b8cd94ad2384e3ab518f0df94a651"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful RTOS kernel information retrieve (Op)  <a href="#gaf09b8cd94ad2384e3ab518f0df94a651">More...</a><br/></td></tr>
-<tr class="separator:gaf09b8cd94ad2384e3ab518f0df94a651"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga85f9569d363a9a8f9677041405d0935f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__kernel.html#ga85f9569d363a9a8f9677041405d0935f">EvrRtxKernelInfoRetrieved</a> (const <a class="el" href="group__CMSIS__RTOS__KernelCtrl.html#structosVersion__t">osVersion_t</a> *version, const char *id_buf, uint32_t id_size)</td></tr>
+<tr class="memdesc:ga85f9569d363a9a8f9677041405d0935f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful RTOS kernel information retrieve (Op)  <a href="#ga85f9569d363a9a8f9677041405d0935f">More...</a><br/></td></tr>
+<tr class="separator:ga85f9569d363a9a8f9677041405d0935f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gad6407e9ff0910629b041866bd801075a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__kernel.html#gad6407e9ff0910629b041866bd801075a">EvrRtxKernelGetState</a> (<a class="el" href="group__CMSIS__RTOS__KernelCtrl.html#ga08326469274b668140ca934b168a5ad4">osKernelState_t</a> state)</td></tr>
 <tr class="memdesc:gad6407e9ff0910629b041866bd801075a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on current RTOS Kernel state retrieve (API)  <a href="#gad6407e9ff0910629b041866bd801075a">More...</a><br/></td></tr>
 <tr class="separator:gad6407e9ff0910629b041866bd801075a"><td class="memSeparator" colspan="2">&#160;</td></tr>
@@ -333,21 +333,27 @@
 
 </div>
 </div>
-<a class="anchor" id="gaf09b8cd94ad2384e3ab518f0df94a651"></a>
+<a class="anchor" id="ga85f9569d363a9a8f9677041405d0935f"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
           <td class="memname">void EvrRtxKernelInfoRetrieved </td>
           <td>(</td>
-          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__KernelCtrl.html#structosVersion__t">osVersion_t</a> *&#160;</td>
+          <td class="paramtype">const <a class="el" href="group__CMSIS__RTOS__KernelCtrl.html#structosVersion__t">osVersion_t</a> *&#160;</td>
           <td class="paramname"><em>version</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype">char *&#160;</td>
-          <td class="paramname"><em>id_buf</em>&#160;</td>
+          <td class="paramtype">const char *&#160;</td>
+          <td class="paramname"><em>id_buf</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>id_size</em>&#160;</td>
         </tr>
         <tr>
           <td></td>
@@ -359,15 +365,17 @@
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">version</td><td>pointer to buffer for retrieving version information. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">id_buf</td><td>pointer to buffer for retrieving kernel identification string.</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">id_buf</td><td>pointer to buffer for retrieving kernel identification string. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">id_size</td><td>size of buffer for kernel identification string.</td></tr>
   </table>
   </dd>
 </dl>
 <p>The event <b>KernelInfoRetrieved</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__KernelCtrl.html#ga6f7764e7250c5c5364c00c45a5d1d199">osKernelGetInfo</a> successfully retrieves kernel information.</p>
 <p><b>Value</b> in the Event Recorder shows:</p>
 <ul>
-<li><b>version</b> : memory address of buffer for retrieving version information.</li>
-<li><b>id_buf</b> : memory address of buffer for retrieving kernel identification string. </li>
+<li><b>ver_api</b> : API version.</li>
+<li><b>ver_kernel</b> : kernel version.</li>
+<li><b>id</b> : kernel identification string (Detail). </li>
 </ul>
 
 </div>
@@ -776,7 +784,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/group__rtx__evr__kernel.js b/docs/RTOS2/html/group__rtx__evr__kernel.js
index 282e306..d6e1385 100644
--- a/docs/RTOS2/html/group__rtx__evr__kernel.js
+++ b/docs/RTOS2/html/group__rtx__evr__kernel.js
@@ -4,7 +4,7 @@
     [ "EvrRtxKernelInitialize", "group__rtx__evr__kernel.html#ga7e84d337b452f647c3a3d6937abd6292", null ],
     [ "EvrRtxKernelInitialized", "group__rtx__evr__kernel.html#ga5db8d306617656bfec12638e17584d66", null ],
     [ "EvrRtxKernelGetInfo", "group__rtx__evr__kernel.html#ga4c2a175b79d39d70a4a5112e270d03f2", null ],
-    [ "EvrRtxKernelInfoRetrieved", "group__rtx__evr__kernel.html#gaf09b8cd94ad2384e3ab518f0df94a651", null ],
+    [ "EvrRtxKernelInfoRetrieved", "group__rtx__evr__kernel.html#ga85f9569d363a9a8f9677041405d0935f", null ],
     [ "EvrRtxKernelGetState", "group__rtx__evr__kernel.html#gad6407e9ff0910629b041866bd801075a", null ],
     [ "EvrRtxKernelStart", "group__rtx__evr__kernel.html#ga75937a761dd488600d2525a532808d2b", null ],
     [ "EvrRtxKernelStarted", "group__rtx__evr__kernel.html#ga28043ffc76fec09e6c8763a9a71b7f2a", null ],
diff --git a/docs/RTOS2/html/group__rtx__evr__memory.html b/docs/RTOS2/html/group__rtx__evr__memory.html
index d71d791..6471622 100644
--- a/docs/RTOS2/html/group__rtx__evr__memory.html
+++ b/docs/RTOS2/html/group__rtx__evr__memory.html
@@ -435,7 +435,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/group__rtx__evr__memory__pool.html b/docs/RTOS2/html/group__rtx__evr__memory__pool.html
index 7384060..2171eb0 100644
--- a/docs/RTOS2/html/group__rtx__evr__memory__pool.html
+++ b/docs/RTOS2/html/group__rtx__evr__memory__pool.html
@@ -294,9 +294,8 @@
 <ul>
 <li><b>block_count</b> : maximum number of memory blocks in memory pool.</li>
 <li><b>block_size</b> : memory block size in bytes.</li>
-<li><b>attr</b> : memory address of Memory Pool attributes or 0 when they are not specified.</li>
+<li><b>attr</b> : memory address of Memory Pool attributes or 0 when they are not specified. </li>
 </ul>
-<p>In case when <a class="el" href="group__CMSIS__RTOS__PoolMgmt.html#structosMemoryPoolAttr__t">memory pool attributes</a> are provided in the API call they are also detailed in the Event Recorder. </p>
 
 </div>
 </div>
@@ -880,7 +879,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/group__rtx__evr__message__queue.html b/docs/RTOS2/html/group__rtx__evr__message__queue.html
index e3edde3..110fb06 100644
--- a/docs/RTOS2/html/group__rtx__evr__message__queue.html
+++ b/docs/RTOS2/html/group__rtx__evr__message__queue.html
@@ -309,9 +309,8 @@
 <ul>
 <li><b>msg_count</b> : maximum number of messages in queue.</li>
 <li><b>msg_size</b> : maximum message size in bytes.</li>
-<li><b>attr</b> : memory address of Message Queue attributes or 0 when they are not specified.</li>
+<li><b>attr</b> : memory address of Message Queue attributes or 0 when they are not specified. </li>
 </ul>
-<p>In case when <a class="el" href="group__CMSIS__RTOS__Message.html#structosMessageQueueAttr__t">message queue attributes</a> are provided in the API call they are also detailed in the Event Recorder. </p>
 
 </div>
 </div>
@@ -1114,7 +1113,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/group__rtx__evr__mutex.html b/docs/RTOS2/html/group__rtx__evr__mutex.html
index 324ba98..7913334 100644
--- a/docs/RTOS2/html/group__rtx__evr__mutex.html
+++ b/docs/RTOS2/html/group__rtx__evr__mutex.html
@@ -262,9 +262,8 @@
 <p>The event <b>MutexNew</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__MutexMgmt.html#gab90920022ab944296821368ef6bb52f8">osMutexNew</a> is called.</p>
 <p><b>Value</b> in the Event Recorder shows:</p>
 <ul>
-<li><b>attr</b> : memory address of Mutex attributes or 0 when they are not specified.</li>
+<li><b>attr</b> : memory address of Mutex attributes or 0 when they are not specified. </li>
 </ul>
-<p>In case when <a class="el" href="group__CMSIS__RTOS__MutexMgmt.html#structosMutexAttr__t">mutex attributes</a> are provided in the API call they are also detailed in the Event Recorder. </p>
 
 </div>
 </div>
@@ -680,7 +679,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/group__rtx__evr__semaphore.html b/docs/RTOS2/html/group__rtx__evr__semaphore.html
index 9e7c0e0..a4ad12d 100644
--- a/docs/RTOS2/html/group__rtx__evr__semaphore.html
+++ b/docs/RTOS2/html/group__rtx__evr__semaphore.html
@@ -282,9 +282,8 @@
 <ul>
 <li><b>max_count</b> : maximum number of available tokens.</li>
 <li><b>initial_count</b> : initial number of available tokens.</li>
-<li><b>attr</b> : memory address of Semaphore attributes or 0 when they are not specified.</li>
+<li><b>attr</b> : memory address of Semaphore attributes or 0 when they are not specified. </li>
 </ul>
-<p>In case when <a class="el" href="group__CMSIS__RTOS__SemaphoreMgmt.html#structosSemaphoreAttr__t">semaphore attributes</a> are provided in the API call they are also detailed in the Event Recorder. </p>
 
 </div>
 </div>
@@ -700,7 +699,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/group__rtx__evr__thread.html b/docs/RTOS2/html/group__rtx__evr__thread.html
index 52b7242..ba7dbec 100644
--- a/docs/RTOS2/html/group__rtx__evr__thread.html
+++ b/docs/RTOS2/html/group__rtx__evr__thread.html
@@ -146,6 +146,9 @@
 <tr class="memitem:gabf4a015bd3fb2a33c0d105a871aaba72"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#gabf4a015bd3fb2a33c0d105a871aaba72">EvrRtxThreadSetPriority</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id, <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gad4e3e0971b41f2d17584a8c6837342ec">osPriority_t</a> priority)</td></tr>
 <tr class="memdesc:gabf4a015bd3fb2a33c0d105a871aaba72"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread priority set (API)  <a href="#gabf4a015bd3fb2a33c0d105a871aaba72">More...</a><br/></td></tr>
 <tr class="separator:gabf4a015bd3fb2a33c0d105a871aaba72"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga831b3e64d459a325fbc13033caa39f05"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#ga831b3e64d459a325fbc13033caa39f05">EvrRtxThreadPriorityUpdated</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id, <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gad4e3e0971b41f2d17584a8c6837342ec">osPriority_t</a> priority)</td></tr>
+<tr class="memdesc:ga831b3e64d459a325fbc13033caa39f05"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread priority updated (Op)  <a href="#ga831b3e64d459a325fbc13033caa39f05">More...</a><br/></td></tr>
+<tr class="separator:ga831b3e64d459a325fbc13033caa39f05"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gada73306deca99987b104aa9840fdd4e2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#gada73306deca99987b104aa9840fdd4e2">EvrRtxThreadGetPriority</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id, <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gad4e3e0971b41f2d17584a8c6837342ec">osPriority_t</a> priority)</td></tr>
 <tr class="memdesc:gada73306deca99987b104aa9840fdd4e2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread priority retrieve (API)  <a href="#gada73306deca99987b104aa9840fdd4e2">More...</a><br/></td></tr>
 <tr class="separator:gada73306deca99987b104aa9840fdd4e2"><td class="memSeparator" colspan="2">&#160;</td></tr>
@@ -180,13 +183,13 @@
 <tr class="memdesc:ga86ac910ac88d8fe54206a12d7ed69a27"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful thread join (Op)  <a href="#ga86ac910ac88d8fe54206a12d7ed69a27">More...</a><br/></td></tr>
 <tr class="separator:ga86ac910ac88d8fe54206a12d7ed69a27"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gab9efd66ed2edb439c5081806c9b63cf9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#gab9efd66ed2edb439c5081806c9b63cf9">EvrRtxThreadBlocked</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id, uint32_t timeout)</td></tr>
-<tr class="memdesc:gab9efd66ed2edb439c5081806c9b63cf9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread execution block (Op)  <a href="#gab9efd66ed2edb439c5081806c9b63cf9">More...</a><br/></td></tr>
+<tr class="memdesc:gab9efd66ed2edb439c5081806c9b63cf9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread execution block (Detail)  <a href="#gab9efd66ed2edb439c5081806c9b63cf9">More...</a><br/></td></tr>
 <tr class="separator:gab9efd66ed2edb439c5081806c9b63cf9"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga3faae4d941ddecfe773ef9f3efe8b901"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#ga3faae4d941ddecfe773ef9f3efe8b901">EvrRtxThreadUnblocked</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id, uint32_t ret_val)</td></tr>
-<tr class="memdesc:ga3faae4d941ddecfe773ef9f3efe8b901"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread execution unblock (Op)  <a href="#ga3faae4d941ddecfe773ef9f3efe8b901">More...</a><br/></td></tr>
+<tr class="memdesc:ga3faae4d941ddecfe773ef9f3efe8b901"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread execution unblock (Detail)  <a href="#ga3faae4d941ddecfe773ef9f3efe8b901">More...</a><br/></td></tr>
 <tr class="separator:ga3faae4d941ddecfe773ef9f3efe8b901"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gabe470d5bb1373c59c51470fd20b55bcb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#gabe470d5bb1373c59c51470fd20b55bcb">EvrRtxThreadPreempted</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id)</td></tr>
-<tr class="memdesc:gabe470d5bb1373c59c51470fd20b55bcb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on running thread pre-emption (Op)  <a href="#gabe470d5bb1373c59c51470fd20b55bcb">More...</a><br/></td></tr>
+<tr class="memdesc:gabe470d5bb1373c59c51470fd20b55bcb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on running thread pre-emption (Detail)  <a href="#gabe470d5bb1373c59c51470fd20b55bcb">More...</a><br/></td></tr>
 <tr class="separator:gabe470d5bb1373c59c51470fd20b55bcb"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gae3bc50d5f154463c7f6647544bb5ecab"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#gae3bc50d5f154463c7f6647544bb5ecab">EvrRtxThreadSwitched</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id)</td></tr>
 <tr class="memdesc:gae3bc50d5f154463c7f6647544bb5ecab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on running thread switch (Op)  <a href="#gae3bc50d5f154463c7f6647544bb5ecab">More...</a><br/></td></tr>
@@ -206,18 +209,6 @@
 <tr class="memitem:ga1999d77992b03347abdca7ec17f91cca"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#ga1999d77992b03347abdca7ec17f91cca">EvrRtxThreadEnumerate</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> *thread_array, uint32_t array_items, uint32_t count)</td></tr>
 <tr class="memdesc:ga1999d77992b03347abdca7ec17f91cca"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on active threads enumerate (API)  <a href="#ga1999d77992b03347abdca7ec17f91cca">More...</a><br/></td></tr>
 <tr class="separator:ga1999d77992b03347abdca7ec17f91cca"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gadbbee398f4fab418c9b8115fc7392ff8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#gadbbee398f4fab418c9b8115fc7392ff8">EvrRtxThreadFlagsWaitTimeout</a> (void)</td></tr>
-<tr class="memdesc:gadbbee398f4fab418c9b8115fc7392ff8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on wait timeout for thread flags (Op)  <a href="#gadbbee398f4fab418c9b8115fc7392ff8">More...</a><br/></td></tr>
-<tr class="separator:gadbbee398f4fab418c9b8115fc7392ff8"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gadd45d32305aa45668a36f2c9f0f4c758"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#gadd45d32305aa45668a36f2c9f0f4c758">EvrRtxThreadDelay</a> (uint32_t ticks)</td></tr>
-<tr class="memdesc:gadd45d32305aa45668a36f2c9f0f4c758"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on wait for timeout (API)  <a href="#gadd45d32305aa45668a36f2c9f0f4c758">More...</a><br/></td></tr>
-<tr class="separator:gadd45d32305aa45668a36f2c9f0f4c758"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf59defd6c171d2c3d3508e7136278db2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#gaf59defd6c171d2c3d3508e7136278db2">EvrRtxThreadDelayUntil</a> (uint32_t ticks)</td></tr>
-<tr class="memdesc:gaf59defd6c171d2c3d3508e7136278db2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on wait until specified time (API)  <a href="#gaf59defd6c171d2c3d3508e7136278db2">More...</a><br/></td></tr>
-<tr class="separator:gaf59defd6c171d2c3d3508e7136278db2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab46562848142ce5ea806d629fd000168"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#gab46562848142ce5ea806d629fd000168">EvrRtxThreadDelayCompleted</a> (void)</td></tr>
-<tr class="memdesc:gab46562848142ce5ea806d629fd000168"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on completed wait (Op)  <a href="#gab46562848142ce5ea806d629fd000168">More...</a><br/></td></tr>
-<tr class="separator:gab46562848142ce5ea806d629fd000168"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <h2 class="groupheader">Function Documentation</h2>
@@ -251,7 +242,7 @@
   </table>
   </dd>
 </dl>
-<p>The event <b>ThreadError</b> is generated when <a class="el" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html">Thread Flags</a> and <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html">Thread Management</a> routines complete their execution due to an error.</p>
+<p>The event <b>ThreadError</b> is generated when <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html">Thread Management</a> routines complete their execution due to an error.</p>
 <p>The status parameter indicates the execution status and can be one of the <a class="el" href="group__CMSIS__RTOS__Definitions.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813e">osStatus_t codes</a> or one of the extended execution status codes which are summarized in the table below.</p>
 <table class="doxtable">
 <tr>
@@ -339,9 +330,8 @@
 <ul>
 <li><b>func</b> : memory address of thread function.</li>
 <li><b>argument</b> : memory address of thread function start argument.</li>
-<li><b>attr</b> : memory address of Thread attributes or 0 when they are not specified.</li>
+<li><b>attr</b> : memory address of Thread attributes or 0 when they are not specified. </li>
 </ul>
-<p>In case when <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#structosThreadAttr__t">thread attributes</a> are provided in the API call they are also detailed in the Event Recorder. </p>
 
 </div>
 </div>
@@ -612,6 +602,45 @@
 
 </div>
 </div>
+<a class="anchor" id="ga831b3e64d459a325fbc13033caa39f05"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxThreadPriorityUpdated </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a>&#160;</td>
+          <td class="paramname"><em>thread_id</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gad4e3e0971b41f2d17584a8c6837342ec">osPriority_t</a>&#160;</td>
+          <td class="paramname"><em>priority</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">thread_id</td><td>thread ID obtained by <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a> or <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga8df03548e89fbc56402a5cd584a505da">osThreadGetId</a>. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">priority</td><td>new priority value for the thread function.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>ThreadPriorityUpdated</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga861a420fb2d643115b06622903fb3bfb">osThreadSetPriority</a> successfully updated the specified thread priority.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>thread_id</b> : thread ID.</li>
+<li><b>priority</b> : new priority value for the thread function. </li>
+</ul>
+
+</div>
+</div>
 <a class="anchor" id="gada73306deca99987b104aa9840fdd4e2"></a>
 <div class="memitem">
 <div class="memproto">
@@ -1188,100 +1217,12 @@
 
 </div>
 </div>
-<a class="anchor" id="gadbbee398f4fab418c9b8115fc7392ff8"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void EvrRtxThreadFlagsWaitTimeout </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>The event <b>ThreadFlagsWaitTimeout</b> is generated when wait for thread flags to become signaled is aborted due to expired wait timeout. </p>
-
-</div>
-</div>
-<a class="anchor" id="gadd45d32305aa45668a36f2c9f0f4c758"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void EvrRtxThreadDelay </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>ticks</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">ticks</td><td><a class="el" href="theory_of_operation.html#CMSIS_RTOS_TimeOutValue">time ticks</a> value.</td></tr>
-  </table>
-  </dd>
-</dl>
-<p>The event <b>ThreadDelay</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a> is called.</p>
-<p><b>Value</b> in the Event Recorder shows:</p>
-<ul>
-<li><b>ticks</b> : <a class="el" href="theory_of_operation.html#CMSIS_RTOS_TimeOutValue">time ticks</a> value. </li>
-</ul>
-
-</div>
-</div>
-<a class="anchor" id="gaf59defd6c171d2c3d3508e7136278db2"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void EvrRtxThreadDelayUntil </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>ticks</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">ticks</td><td>absolute time in ticks.</td></tr>
-  </table>
-  </dd>
-</dl>
-<p>The event <b>ThreadDelayUntil</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__Wait.html#ga3c807924c2d6d43bc2ffb49da3f7f3a1">osDelayUntil</a> is called.</p>
-<p><b>Value</b> in the Event Recorder shows:</p>
-<ul>
-<li><b>ticks</b> : absolute delay time in ticks. </li>
-</ul>
-
-</div>
-</div>
-<a class="anchor" id="gab46562848142ce5ea806d629fd000168"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void EvrRtxThreadDelayCompleted </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>The event <b>ThreadDelayCompleted</b> is generated when thread delay expires. </p>
-
-</div>
-</div>
 </div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/group__rtx__evr__thread.js b/docs/RTOS2/html/group__rtx__evr__thread.js
index ca40a57..b48ef89 100644
--- a/docs/RTOS2/html/group__rtx__evr__thread.js
+++ b/docs/RTOS2/html/group__rtx__evr__thread.js
@@ -9,6 +9,7 @@
     [ "EvrRtxThreadGetStackSize", "group__rtx__evr__thread.html#ga1200f51e9152810e76386e241904427c", null ],
     [ "EvrRtxThreadGetStackSpace", "group__rtx__evr__thread.html#ga4fd48ef48eefb01a6252cfc02ea169ab", null ],
     [ "EvrRtxThreadSetPriority", "group__rtx__evr__thread.html#gabf4a015bd3fb2a33c0d105a871aaba72", null ],
+    [ "EvrRtxThreadPriorityUpdated", "group__rtx__evr__thread.html#ga831b3e64d459a325fbc13033caa39f05", null ],
     [ "EvrRtxThreadGetPriority", "group__rtx__evr__thread.html#gada73306deca99987b104aa9840fdd4e2", null ],
     [ "EvrRtxThreadYield", "group__rtx__evr__thread.html#gafed41f1b6bcdde658ca306f8a6d7ac7e", null ],
     [ "EvrRtxThreadSuspend", "group__rtx__evr__thread.html#gaa268fe19f933b8d2a830063560694561", null ],
@@ -28,9 +29,5 @@
     [ "EvrRtxThreadTerminate", "group__rtx__evr__thread.html#ga6abe7d167bd5bb91c3d6bf6d2bb417aa", null ],
     [ "EvrRtxThreadDestroyed", "group__rtx__evr__thread.html#gaa5aa707fc2d6b44bfcb86bce2e2e90f3", null ],
     [ "EvrRtxThreadGetCount", "group__rtx__evr__thread.html#ga6d5932965736e0f2f35fe2d87bd622e7", null ],
-    [ "EvrRtxThreadEnumerate", "group__rtx__evr__thread.html#ga1999d77992b03347abdca7ec17f91cca", null ],
-    [ "EvrRtxThreadFlagsWaitTimeout", "group__rtx__evr__thread.html#gadbbee398f4fab418c9b8115fc7392ff8", null ],
-    [ "EvrRtxThreadDelay", "group__rtx__evr__thread.html#gadd45d32305aa45668a36f2c9f0f4c758", null ],
-    [ "EvrRtxThreadDelayUntil", "group__rtx__evr__thread.html#gaf59defd6c171d2c3d3508e7136278db2", null ],
-    [ "EvrRtxThreadDelayCompleted", "group__rtx__evr__thread.html#gab46562848142ce5ea806d629fd000168", null ]
+    [ "EvrRtxThreadEnumerate", "group__rtx__evr__thread.html#ga1999d77992b03347abdca7ec17f91cca", null ]
 ];
\ No newline at end of file
diff --git a/docs/RTOS2/html/group__rtx__evr__thread__flags.html b/docs/RTOS2/html/group__rtx__evr__thread__flags.html
new file mode 100644
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+++ b/docs/RTOS2/html/group__rtx__evr__thread__flags.html
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+<title>Thread Flags Functions</title>
+<title>CMSIS-RTOS2: Thread Flags Functions</title>
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+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-RTOS2
+   &#160;<span id="projectnumber">Version 2.1.3</span>
+   </div>
+   <div id="projectbrief">Real-Time Operating System: API and RTX Reference Implementation</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
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+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
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+
+<div class="header">
+  <div class="summary">
+<a href="#func-members">Functions</a>  </div>
+  <div class="headertitle">
+<div class="title">Thread Flags Functions<div class="ingroups"><a class="el" href="group__rtx__evr.html">Event functions</a></div></div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>Events generated by thread flags functions.  
+<a href="#details">More...</a></p>
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
+Functions</h2></td></tr>
+<tr class="memitem:gad3609bfc41e1bee23b41973281096ed6"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread__flags.html#gad3609bfc41e1bee23b41973281096ed6">EvrRtxThreadFlagsError</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id, int32_t status)</td></tr>
+<tr class="memdesc:gad3609bfc41e1bee23b41973281096ed6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread flags error (Error)  <a href="#gad3609bfc41e1bee23b41973281096ed6">More...</a><br/></td></tr>
+<tr class="separator:gad3609bfc41e1bee23b41973281096ed6"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac356c777af86c2d8d9250cbffc516e1d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread__flags.html#gac356c777af86c2d8d9250cbffc516e1d">EvrRtxThreadFlagsSet</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id, uint32_t flags)</td></tr>
+<tr class="memdesc:gac356c777af86c2d8d9250cbffc516e1d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread flags set (API)  <a href="#gac356c777af86c2d8d9250cbffc516e1d">More...</a><br/></td></tr>
+<tr class="separator:gac356c777af86c2d8d9250cbffc516e1d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gabd447773c02e235a8d0bb96dd9bb1c4f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread__flags.html#gabd447773c02e235a8d0bb96dd9bb1c4f">EvrRtxThreadFlagsSetDone</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id, uint32_t thread_flags)</td></tr>
+<tr class="memdesc:gabd447773c02e235a8d0bb96dd9bb1c4f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful thread flags set (Op)  <a href="#gabd447773c02e235a8d0bb96dd9bb1c4f">More...</a><br/></td></tr>
+<tr class="separator:gabd447773c02e235a8d0bb96dd9bb1c4f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac8ddc747c72f7fc5cfa58edcee56b82d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread__flags.html#gac8ddc747c72f7fc5cfa58edcee56b82d">EvrRtxThreadFlagsClear</a> (uint32_t flags)</td></tr>
+<tr class="memdesc:gac8ddc747c72f7fc5cfa58edcee56b82d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread flags clear (API)  <a href="#gac8ddc747c72f7fc5cfa58edcee56b82d">More...</a><br/></td></tr>
+<tr class="separator:gac8ddc747c72f7fc5cfa58edcee56b82d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaad13b17507cc07a4a1e37a5653489943"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread__flags.html#gaad13b17507cc07a4a1e37a5653489943">EvrRtxThreadFlagsClearDone</a> (uint32_t thread_flags)</td></tr>
+<tr class="memdesc:gaad13b17507cc07a4a1e37a5653489943"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful thread flags clear (Op)  <a href="#gaad13b17507cc07a4a1e37a5653489943">More...</a><br/></td></tr>
+<tr class="separator:gaad13b17507cc07a4a1e37a5653489943"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaab1a30a0ac3dfa588ededbfad52bae30"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread__flags.html#gaab1a30a0ac3dfa588ededbfad52bae30">EvrRtxThreadFlagsGet</a> (uint32_t thread_flags)</td></tr>
+<tr class="memdesc:gaab1a30a0ac3dfa588ededbfad52bae30"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread flags retrieve (API)  <a href="#gaab1a30a0ac3dfa588ededbfad52bae30">More...</a><br/></td></tr>
+<tr class="separator:gaab1a30a0ac3dfa588ededbfad52bae30"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaad860c571b9b083ff2889fb76fb619f1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread__flags.html#gaad860c571b9b083ff2889fb76fb619f1">EvrRtxThreadFlagsWait</a> (uint32_t flags, uint32_t options, uint32_t timeout)</td></tr>
+<tr class="memdesc:gaad860c571b9b083ff2889fb76fb619f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on wait for thread flags (API)  <a href="#gaad860c571b9b083ff2889fb76fb619f1">More...</a><br/></td></tr>
+<tr class="separator:gaad860c571b9b083ff2889fb76fb619f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad09ec9317a4440e5228870b750e9860e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread__flags.html#gad09ec9317a4440e5228870b750e9860e">EvrRtxThreadFlagsWaitPending</a> (uint32_t flags, uint32_t options, uint32_t timeout)</td></tr>
+<tr class="memdesc:gad09ec9317a4440e5228870b750e9860e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on pending wait for thread flags (Op)  <a href="#gad09ec9317a4440e5228870b750e9860e">More...</a><br/></td></tr>
+<tr class="separator:gad09ec9317a4440e5228870b750e9860e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae45ec48e082608d2ba72ce7c695899c6"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread__flags.html#gae45ec48e082608d2ba72ce7c695899c6">EvrRtxThreadFlagsWaitTimeout</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id)</td></tr>
+<tr class="memdesc:gae45ec48e082608d2ba72ce7c695899c6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on wait timeout for thread flags (Op)  <a href="#gae45ec48e082608d2ba72ce7c695899c6">More...</a><br/></td></tr>
+<tr class="separator:gae45ec48e082608d2ba72ce7c695899c6"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5e00be70234d0ca3b0d4d99fb58295bc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread__flags.html#ga5e00be70234d0ca3b0d4d99fb58295bc">EvrRtxThreadFlagsWaitCompleted</a> (uint32_t flags, uint32_t options, uint32_t thread_flags, <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id)</td></tr>
+<tr class="memdesc:ga5e00be70234d0ca3b0d4d99fb58295bc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful wait for thread flags (Op)  <a href="#ga5e00be70234d0ca3b0d4d99fb58295bc">More...</a><br/></td></tr>
+<tr class="separator:ga5e00be70234d0ca3b0d4d99fb58295bc"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gadf6b9f4882f62a65b4e06e1b3e5c9c5b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread__flags.html#gadf6b9f4882f62a65b4e06e1b3e5c9c5b">EvrRtxThreadFlagsWaitNotCompleted</a> (uint32_t flags, uint32_t options)</td></tr>
+<tr class="memdesc:gadf6b9f4882f62a65b4e06e1b3e5c9c5b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on unsuccessful wait for thread flags (Op)  <a href="#gadf6b9f4882f62a65b4e06e1b3e5c9c5b">More...</a><br/></td></tr>
+<tr class="separator:gadf6b9f4882f62a65b4e06e1b3e5c9c5b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<h2 class="groupheader">Function Documentation</h2>
+<a class="anchor" id="gad3609bfc41e1bee23b41973281096ed6"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxThreadFlagsError </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a>&#160;</td>
+          <td class="paramname"><em>thread_id</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramname"><em>status</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">thread_id</td><td>thread ID obtained by <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a> or <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga8df03548e89fbc56402a5cd584a505da">osThreadGetId</a> or NULL when ID is unknown. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">status</td><td>extended execution status.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>ThreadFlagsError</b> is generated when <a class="el" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html">Thread Flags</a> routines complete their execution due to an error.</p>
+<p>The status parameter indicates the execution status and can be one of the <a class="el" href="group__CMSIS__RTOS__Definitions.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813e">osStatus_t codes</a> or one of the extended execution status codes which are summarized in the table below.</p>
+<table class="doxtable">
+<tr>
+<th align="left">Extended Status Code </th><th align="left">Description  </th></tr>
+<tr>
+<td align="left">osRtxErrorKernelNotReady </td><td align="left">Kernel scheduler is not in Ready state. </td></tr>
+<tr>
+<td align="left">osRtxErrorKernelNotRunning </td><td align="left">Kernel scheduler is not executing - there is no running thread. </td></tr>
+<tr>
+<td align="left">osRtxErrorInvalidControlBlock </td><td align="left">Object control block with invalid alignment or size was specified. </td></tr>
+<tr>
+<td align="left">osRtxErrorInvalidDataMemory </td><td align="left">Object data memory with invalid alignment or size was specified. </td></tr>
+<tr>
+<td align="left">osRtxErrorInvalidThreadStack </td><td align="left">Thread stack memory with invalid alignment or size was specified. </td></tr>
+<tr>
+<td align="left">osRtxErrorInvalidPriority </td><td align="left">Invalid thread priority was specified. </td></tr>
+<tr>
+<td align="left">osRtxErrorThreadNotJoinable </td><td align="left">Specified thread is not joinable. </td></tr>
+<tr>
+<td align="left">osRtxErrorMutexNotOwned </td><td align="left">Specified mutex is not owned by the current running thread. </td></tr>
+<tr>
+<td align="left">osRtxErrorMutexNotLocked </td><td align="left">Specified mutex is not locked. </td></tr>
+<tr>
+<td align="left">osRtxErrorMutexLockLimit </td><td align="left">Maximum number of recursive mutex locks reached. </td></tr>
+<tr>
+<td align="left">osRtxErrorSemaphoreCountLimit </td><td align="left">Semaphore count limit reached. </td></tr>
+<tr>
+<td align="left">osRtxErrorTZ_InitContext_S </td><td align="left">Secure context memory system initialization failed. </td></tr>
+<tr>
+<td align="left">osRtxErrorTZ_AllocContext_S </td><td align="left">Secure context memory allocation failed. </td></tr>
+<tr>
+<td align="left">osRtxErrorTZ_FreeContext_S </td><td align="left">Secure context memory deallocation failed. </td></tr>
+<tr>
+<td align="left">osRtxErrorTZ_LoadContext_S </td><td align="left">Secure context load failed. </td></tr>
+<tr>
+<td align="left">osRtxErrorTZ_SaveContext_S </td><td align="left">Secure context save failed. </td></tr>
+</table>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>thread_id</b> : thread ID.</li>
+<li><b>status</b> : execution status code. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="gac356c777af86c2d8d9250cbffc516e1d"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxThreadFlagsSet </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a>&#160;</td>
+          <td class="paramname"><em>thread_id</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>flags</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">thread_id</td><td>thread ID obtained by <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a> or <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga8df03548e89fbc56402a5cd584a505da">osThreadGetId</a>. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">flags</td><td>flags of the thread that shall be set.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>ThreadFlagsSet</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#ga6f89ef9caded1d9963c7b12b0f6412c9">osThreadFlagsSet</a> is called.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>thread_id</b> : thread ID.</li>
+<li><b>flags</b> : flags that shall be set. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="gabd447773c02e235a8d0bb96dd9bb1c4f"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxThreadFlagsSetDone </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a>&#160;</td>
+          <td class="paramname"><em>thread_id</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>thread_flags</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">thread_id</td><td>thread ID obtained by <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a> or <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga8df03548e89fbc56402a5cd584a505da">osThreadGetId</a>. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">thread_flags</td><td>thread flags after setting.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>ThreadFlagsSetDone</b> is generated when thread flags are successfully set.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>thread_id</b> : thread ID.</li>
+<li><b>thread_flags</b> : thread flags after setting. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="gac8ddc747c72f7fc5cfa58edcee56b82d"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxThreadFlagsClear </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>flags</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">flags</td><td>flags of the thread that shall be cleared.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>ThreadFlagsClear</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#ga656abc1c862c5b9a2b13584c42cc0bfa">osThreadFlagsClear</a> is called.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>flags</b> : flags that shall be cleared. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="gaad13b17507cc07a4a1e37a5653489943"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxThreadFlagsClearDone </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>thread_flags</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">thread_flags</td><td>thread flags before clearing.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>ThreadFlagsClearDone</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#ga656abc1c862c5b9a2b13584c42cc0bfa">osThreadFlagsClear</a> successfully clears thread flags.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>thread_flags</b> : thread flags before clearing. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="gaab1a30a0ac3dfa588ededbfad52bae30"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxThreadFlagsGet </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>thread_flags</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">thread_flags</td><td>current thread flags.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>ThreadFlagsGet</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#ga85c8d2c89466e25abbcb545d9ddd71ba">osThreadFlagsGet</a> is called and its execution result is known.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>thread_flags</b> : current thread flags. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="gaad860c571b9b083ff2889fb76fb619f1"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxThreadFlagsWait </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>flags</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>options</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>timeout</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">flags</td><td>flags to wait for. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">options</td><td>flags options (osFlagsXxxx). </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">timeout</td><td><a class="el" href="theory_of_operation.html#CMSIS_RTOS_TimeOutValue">Timeout Value</a> or 0 in case of no time-out.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>ThreadFlagsWait</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#gac11542ad6300b600f872fc96e340ec2b">osThreadFlagsWait</a> is called.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>flags</b> : flags to wait for.</li>
+<li><b>options</b> : flags options (refer to <a class="el" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#gac11542ad6300b600f872fc96e340ec2b">thread flags options</a>).</li>
+<li><b>timeout</b> : <a class="el" href="theory_of_operation.html#CMSIS_RTOS_TimeOutValue">Timeout Value</a>. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="gad09ec9317a4440e5228870b750e9860e"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxThreadFlagsWaitPending </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>flags</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>options</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>timeout</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">flags</td><td>flags to wait for. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">options</td><td>flags options (osFlagsXxxx). </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">timeout</td><td><a class="el" href="theory_of_operation.html#CMSIS_RTOS_TimeOutValue">Timeout Value</a> or 0 in case of no time-out.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>ThreadFlagsWaitPending</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#gac11542ad6300b600f872fc96e340ec2b">osThreadFlagsWait</a> starts waiting for thread flags to become signaled.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>flags</b> : flags to wait for.</li>
+<li><b>options</b> : flags options (refer to <a class="el" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#gac11542ad6300b600f872fc96e340ec2b">thread flags options</a>).</li>
+<li><b>timeout</b> : <a class="el" href="theory_of_operation.html#CMSIS_RTOS_TimeOutValue">Timeout Value</a>. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="gae45ec48e082608d2ba72ce7c695899c6"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxThreadFlagsWaitTimeout </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a>&#160;</td>
+          <td class="paramname"><em>thread_id</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">thread_id</td><td>thread ID obtained by <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a> or <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga8df03548e89fbc56402a5cd584a505da">osThreadGetId</a>.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>ThreadFlagsWaitTimeout</b> is generated when wait for thread flags to become signaled is aborted due to expired wait timeout.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>thread_id</b> : thread ID. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="ga5e00be70234d0ca3b0d4d99fb58295bc"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxThreadFlagsWaitCompleted </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>flags</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>options</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>thread_flags</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a>&#160;</td>
+          <td class="paramname"><em>thread_id</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">flags</td><td>flags to wait for. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">options</td><td>flags options (osFlagsXxxx). </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">thread_flags</td><td>thread flags before clearing. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">thread_id</td><td>thread ID obtained by <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a> or <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga8df03548e89fbc56402a5cd584a505da">osThreadGetId</a>.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>ThreadFlagsWaitCompleted</b> is generated when waiting for thread flags ends because requested flags were signaled.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>flags</b> : flags thread was waiting for.</li>
+<li><b>option</b> : flags options (refer to <a class="el" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#gac11542ad6300b600f872fc96e340ec2b">thread flags options</a>).</li>
+<li><b>thread_flags</b> : thread flags before clearing.</li>
+<li><b>thread_id</b> : thread ID. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="gadf6b9f4882f62a65b4e06e1b3e5c9c5b"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxThreadFlagsWaitNotCompleted </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>flags</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>options</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">flags</td><td>flags to wait for. </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">options</td><td>flags options (osFlagsXxxx).</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>ThreadFlagsWaitNotCompleted</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#gac11542ad6300b600f872fc96e340ec2b">osThreadFlagsWait</a> returns without timeout and specified thread flags were not signaled.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>flags</b> : flags thread was waiting for.</li>
+<li><b>options</b> : flags options (refer to <a class="el" href="group__CMSIS__RTOS__ThreadFlagsMgmt.html#gac11542ad6300b600f872fc96e340ec2b">thread flags options</a>). </li>
+</ul>
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/RTOS2/html/group__rtx__evr__thread__flags.js b/docs/RTOS2/html/group__rtx__evr__thread__flags.js
new file mode 100644
index 0000000..adb4027
--- /dev/null
+++ b/docs/RTOS2/html/group__rtx__evr__thread__flags.js
@@ -0,0 +1,14 @@
+var group__rtx__evr__thread__flags =
+[
+    [ "EvrRtxThreadFlagsError", "group__rtx__evr__thread__flags.html#gad3609bfc41e1bee23b41973281096ed6", null ],
+    [ "EvrRtxThreadFlagsSet", "group__rtx__evr__thread__flags.html#gac356c777af86c2d8d9250cbffc516e1d", null ],
+    [ "EvrRtxThreadFlagsSetDone", "group__rtx__evr__thread__flags.html#gabd447773c02e235a8d0bb96dd9bb1c4f", null ],
+    [ "EvrRtxThreadFlagsClear", "group__rtx__evr__thread__flags.html#gac8ddc747c72f7fc5cfa58edcee56b82d", null ],
+    [ "EvrRtxThreadFlagsClearDone", "group__rtx__evr__thread__flags.html#gaad13b17507cc07a4a1e37a5653489943", null ],
+    [ "EvrRtxThreadFlagsGet", "group__rtx__evr__thread__flags.html#gaab1a30a0ac3dfa588ededbfad52bae30", null ],
+    [ "EvrRtxThreadFlagsWait", "group__rtx__evr__thread__flags.html#gaad860c571b9b083ff2889fb76fb619f1", null ],
+    [ "EvrRtxThreadFlagsWaitPending", "group__rtx__evr__thread__flags.html#gad09ec9317a4440e5228870b750e9860e", null ],
+    [ "EvrRtxThreadFlagsWaitTimeout", "group__rtx__evr__thread__flags.html#gae45ec48e082608d2ba72ce7c695899c6", null ],
+    [ "EvrRtxThreadFlagsWaitCompleted", "group__rtx__evr__thread__flags.html#ga5e00be70234d0ca3b0d4d99fb58295bc", null ],
+    [ "EvrRtxThreadFlagsWaitNotCompleted", "group__rtx__evr__thread__flags.html#gadf6b9f4882f62a65b4e06e1b3e5c9c5b", null ]
+];
\ No newline at end of file
diff --git a/docs/RTOS2/html/group__rtx__evr__timer.html b/docs/RTOS2/html/group__rtx__evr__timer.html
index 869c7e9..52f416d 100644
--- a/docs/RTOS2/html/group__rtx__evr__timer.html
+++ b/docs/RTOS2/html/group__rtx__evr__timer.html
@@ -323,9 +323,8 @@
 <li><b>func</b> : start address of a timer call back function.</li>
 <li><b>type</b> : timer type: osTimerOnce for one-shot or osTimerPeriodic for periodic behavior.</li>
 <li><b>argument</b> : memory address of argument to the timer call back function.</li>
-<li><b>attr</b> : memory address of Timer attributes or 0 when they are not specified.</li>
+<li><b>attr</b> : memory address of Timer attributes or 0 when they are not specified. </li>
 </ul>
-<p>In case when <a class="el" href="group__CMSIS__RTOS__TimerMgmt.html#structosTimerAttr__t">timer attributes</a> are provided in the API call they are also detailed in the Event Recorder. </p>
 
 </div>
 </div>
@@ -624,7 +623,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/group__rtx__evr__wait.html b/docs/RTOS2/html/group__rtx__evr__wait.html
new file mode 100644
index 0000000..ff65683
--- /dev/null
+++ b/docs/RTOS2/html/group__rtx__evr__wait.html
@@ -0,0 +1,356 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>Generic Wait Functions</title>
+<title>CMSIS-RTOS2: Generic Wait Functions</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
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+   <div id="projectname">CMSIS-RTOS2
+   &#160;<span id="projectnumber">Version 2.1.3</span>
+   </div>
+   <div id="projectbrief">Real-Time Operating System: API and RTX Reference Implementation</div>
+  </td>
+ </tr>
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+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
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+        name="MSearchResults" id="MSearchResults">
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+
+<div class="header">
+  <div class="summary">
+<a href="#func-members">Functions</a>  </div>
+  <div class="headertitle">
+<div class="title">Generic Wait Functions<div class="ingroups"><a class="el" href="group__rtx__evr.html">Event functions</a></div></div>  </div>
+</div><!--header-->
+<div class="contents">
+
+<p>Events generated by generic wait functions.  
+<a href="#details">More...</a></p>
+<table class="memberdecls">
+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
+Functions</h2></td></tr>
+<tr class="memitem:ga9ca2a1f7c2231057dcdb9df400284c0a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__wait.html#ga9ca2a1f7c2231057dcdb9df400284c0a">EvrRtxDelayError</a> (int32_t status)</td></tr>
+<tr class="memdesc:ga9ca2a1f7c2231057dcdb9df400284c0a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on delay error (Error)  <a href="#ga9ca2a1f7c2231057dcdb9df400284c0a">More...</a><br/></td></tr>
+<tr class="separator:ga9ca2a1f7c2231057dcdb9df400284c0a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaec642f6e093f6c1c9b9d7609c4b0d174"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__wait.html#gaec642f6e093f6c1c9b9d7609c4b0d174">EvrRtxDelay</a> (uint32_t ticks)</td></tr>
+<tr class="memdesc:gaec642f6e093f6c1c9b9d7609c4b0d174"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on delay for specified time (API)  <a href="#gaec642f6e093f6c1c9b9d7609c4b0d174">More...</a><br/></td></tr>
+<tr class="separator:gaec642f6e093f6c1c9b9d7609c4b0d174"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga16728292de4e2665248693fff603a2c3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__wait.html#ga16728292de4e2665248693fff603a2c3">EvrRtxDelayUntil</a> (uint32_t ticks)</td></tr>
+<tr class="memdesc:ga16728292de4e2665248693fff603a2c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on delay until specified time (API)  <a href="#ga16728292de4e2665248693fff603a2c3">More...</a><br/></td></tr>
+<tr class="separator:ga16728292de4e2665248693fff603a2c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad489decd779491c1f247214e541cd4e8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__wait.html#gad489decd779491c1f247214e541cd4e8">EvrRtxDelayStarted</a> (uint32_t ticks)</td></tr>
+<tr class="memdesc:gad489decd779491c1f247214e541cd4e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on delay started (Op)  <a href="#gad489decd779491c1f247214e541cd4e8">More...</a><br/></td></tr>
+<tr class="separator:gad489decd779491c1f247214e541cd4e8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga46ffa7cb290130a3b0d10dbd6c3faddd"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__wait.html#ga46ffa7cb290130a3b0d10dbd6c3faddd">EvrRtxDelayUntilStarted</a> (uint32_t ticks)</td></tr>
+<tr class="memdesc:ga46ffa7cb290130a3b0d10dbd6c3faddd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on delay until specified time started (Op)  <a href="#ga46ffa7cb290130a3b0d10dbd6c3faddd">More...</a><br/></td></tr>
+<tr class="separator:ga46ffa7cb290130a3b0d10dbd6c3faddd"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaff18b7b13dc1fe87d1c9d3b23ed55208"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__wait.html#gaff18b7b13dc1fe87d1c9d3b23ed55208">EvrRtxDelayCompleted</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id)</td></tr>
+<tr class="memdesc:gaff18b7b13dc1fe87d1c9d3b23ed55208"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on delay completed (Op)  <a href="#gaff18b7b13dc1fe87d1c9d3b23ed55208">More...</a><br/></td></tr>
+<tr class="separator:gaff18b7b13dc1fe87d1c9d3b23ed55208"><td class="memSeparator" colspan="2">&#160;</td></tr>
+</table>
+<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
+<h2 class="groupheader">Function Documentation</h2>
+<a class="anchor" id="ga9ca2a1f7c2231057dcdb9df400284c0a"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxDelayError </td>
+          <td>(</td>
+          <td class="paramtype">int32_t&#160;</td>
+          <td class="paramname"><em>status</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">status</td><td>extended execution status.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>DelayError</b> is generated when <a class="el" href="group__CMSIS__RTOS__Wait.html">Generic Wait Functions</a> routines complete their execution due to an error.</p>
+<p>The status parameter indicates the execution status and can be one of the <a class="el" href="group__CMSIS__RTOS__Definitions.html#ga6c0dbe6069e4e7f47bb4cd32ae2b813e">osStatus_t codes</a> or one of the extended execution status codes which are summarized in the table below.</p>
+<table class="doxtable">
+<tr>
+<th align="left">Extended Status Code </th><th align="left">Description  </th></tr>
+<tr>
+<td align="left">osRtxErrorKernelNotReady </td><td align="left">Kernel scheduler is not in Ready state. </td></tr>
+<tr>
+<td align="left">osRtxErrorKernelNotRunning </td><td align="left">Kernel scheduler is not executing - there is no running thread. </td></tr>
+<tr>
+<td align="left">osRtxErrorInvalidControlBlock </td><td align="left">Object control block with invalid alignment or size was specified. </td></tr>
+<tr>
+<td align="left">osRtxErrorInvalidDataMemory </td><td align="left">Object data memory with invalid alignment or size was specified. </td></tr>
+<tr>
+<td align="left">osRtxErrorInvalidThreadStack </td><td align="left">Thread stack memory with invalid alignment or size was specified. </td></tr>
+<tr>
+<td align="left">osRtxErrorInvalidPriority </td><td align="left">Invalid thread priority was specified. </td></tr>
+<tr>
+<td align="left">osRtxErrorThreadNotJoinable </td><td align="left">Specified thread is not joinable. </td></tr>
+<tr>
+<td align="left">osRtxErrorMutexNotOwned </td><td align="left">Specified mutex is not owned by the current running thread. </td></tr>
+<tr>
+<td align="left">osRtxErrorMutexNotLocked </td><td align="left">Specified mutex is not locked. </td></tr>
+<tr>
+<td align="left">osRtxErrorMutexLockLimit </td><td align="left">Maximum number of recursive mutex locks reached. </td></tr>
+<tr>
+<td align="left">osRtxErrorSemaphoreCountLimit </td><td align="left">Semaphore count limit reached. </td></tr>
+<tr>
+<td align="left">osRtxErrorTZ_InitContext_S </td><td align="left">Secure context memory system initialization failed. </td></tr>
+<tr>
+<td align="left">osRtxErrorTZ_AllocContext_S </td><td align="left">Secure context memory allocation failed. </td></tr>
+<tr>
+<td align="left">osRtxErrorTZ_FreeContext_S </td><td align="left">Secure context memory deallocation failed. </td></tr>
+<tr>
+<td align="left">osRtxErrorTZ_LoadContext_S </td><td align="left">Secure context load failed. </td></tr>
+<tr>
+<td align="left">osRtxErrorTZ_SaveContext_S </td><td align="left">Secure context save failed. </td></tr>
+</table>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>status</b> : execution status code. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="gaec642f6e093f6c1c9b9d7609c4b0d174"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxDelay </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>ticks</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">ticks</td><td><a class="el" href="theory_of_operation.html#CMSIS_RTOS_TimeOutValue">time ticks</a> value.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>Delay</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a> is called.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>ticks</b> : <a class="el" href="theory_of_operation.html#CMSIS_RTOS_TimeOutValue">time ticks</a> value. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="ga16728292de4e2665248693fff603a2c3"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxDelayUntil </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>ticks</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">ticks</td><td>absolute time in ticks.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>DelayUntil</b> is generated when the function <a class="el" href="group__CMSIS__RTOS__Wait.html#ga3c807924c2d6d43bc2ffb49da3f7f3a1">osDelayUntil</a> is called.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>ticks</b> : absolute delay time in ticks. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="gad489decd779491c1f247214e541cd4e8"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxDelayStarted </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>ticks</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">ticks</td><td><a class="el" href="theory_of_operation.html#CMSIS_RTOS_TimeOutValue">time ticks</a> value.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>DelayStarted</b> is generated when <a class="el" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a> delay starts.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>ticks</b> : <a class="el" href="theory_of_operation.html#CMSIS_RTOS_TimeOutValue">time ticks</a> value. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="ga46ffa7cb290130a3b0d10dbd6c3faddd"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxDelayUntilStarted </td>
+          <td>(</td>
+          <td class="paramtype">uint32_t&#160;</td>
+          <td class="paramname"><em>ticks</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">ticks</td><td><a class="el" href="theory_of_operation.html#CMSIS_RTOS_TimeOutValue">time ticks</a> value.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>DelayUntilStarted</b> is generated when <a class="el" href="group__CMSIS__RTOS__Wait.html#ga3c807924c2d6d43bc2ffb49da3f7f3a1">osDelayUntil</a> delay starts.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>ticks</b> : <a class="el" href="theory_of_operation.html#CMSIS_RTOS_TimeOutValue">time ticks</a> value. </li>
+</ul>
+
+</div>
+</div>
+<a class="anchor" id="gaff18b7b13dc1fe87d1c9d3b23ed55208"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">void EvrRtxDelayCompleted </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a>&#160;</td>
+          <td class="paramname"><em>thread_id</em></td><td>)</td>
+          <td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">thread_id</td><td>thread ID obtained by <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a> or <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga8df03548e89fbc56402a5cd584a505da">osThreadGetId</a>.</td></tr>
+  </table>
+  </dd>
+</dl>
+<p>The event <b>DelayCompleted</b> is generated when <a class="el" href="group__CMSIS__RTOS__Wait.html#gaf6055a51390ef65b6b6edc28bf47322e">osDelay</a> or <a class="el" href="group__CMSIS__RTOS__Wait.html#ga3c807924c2d6d43bc2ffb49da3f7f3a1">osDelayUntil</a> delay expires.</p>
+<p><b>Value</b> in the Event Recorder shows:</p>
+<ul>
+<li><b>thread_id</b> : thread ID. </li>
+</ul>
+
+</div>
+</div>
+</div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/RTOS2/html/group__rtx__evr__wait.js b/docs/RTOS2/html/group__rtx__evr__wait.js
new file mode 100644
index 0000000..52724f6
--- /dev/null
+++ b/docs/RTOS2/html/group__rtx__evr__wait.js
@@ -0,0 +1,9 @@
+var group__rtx__evr__wait =
+[
+    [ "EvrRtxDelayError", "group__rtx__evr__wait.html#ga9ca2a1f7c2231057dcdb9df400284c0a", null ],
+    [ "EvrRtxDelay", "group__rtx__evr__wait.html#gaec642f6e093f6c1c9b9d7609c4b0d174", null ],
+    [ "EvrRtxDelayUntil", "group__rtx__evr__wait.html#ga16728292de4e2665248693fff603a2c3", null ],
+    [ "EvrRtxDelayStarted", "group__rtx__evr__wait.html#gad489decd779491c1f247214e541cd4e8", null ],
+    [ "EvrRtxDelayUntilStarted", "group__rtx__evr__wait.html#ga46ffa7cb290130a3b0d10dbd6c3faddd", null ],
+    [ "EvrRtxDelayCompleted", "group__rtx__evr__wait.html#gaff18b7b13dc1fe87d1c9d3b23ed55208", null ]
+];
\ No newline at end of file
diff --git a/docs/RTOS2/html/history_8txt.html b/docs/RTOS2/html/history_8txt.html
index 8efc10c..9e532c2 100644
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 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="history_8txt.html">history.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/index.doxyidx b/docs/RTOS2/html/index.doxyidx
new file mode 100644
index 0000000..9a66125
--- /dev/null
+++ b/docs/RTOS2/html/index.doxyidx
@@ -0,0 +1,670 @@
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * @file     index.doxyidx
+ * @brief    Index file for MDK-ARM Help System
+ * @version  1.0
+ * @date     10. July 2019
+ * @note     Generated by DoxyIndex V1.2.3 on Wednesday, 10.07.2019 15:22:29
+ *           from Path 'C:\tools\PACK\ARM\CMSIS\5.6.0\\CMSIS\Documentation\RTOS2\html',
+ */
+
+'BCDEFGHIKMOPRST_abcdefhiklmnoprstuvw'
+__NO_RETURN, cmsis__os2_8h.html#a153a4a31b276a9758959580538720a51, cmsis_os2.h
+api, group__CMSIS__RTOS__KernelCtrl.html#a76a1ef1a4d3d9bd3e70783051f22a6d3, osVersion_t
+arg, rtx__os_8h.html#a9ce2ec4812a92cb6ab39f6e81e9173a9, osRtxTimerFinfo_t
+attr, rtx__os_8h.html#a28478ea2856f6286899bc90b2c6a1ec4, osRtxMutex_t::attr()
+attr_bits, group__CMSIS__RTOS__Message.html#a6e93b49cb79c12f768d72580c7731f30, osMessageQueueAttr_t::attr_bits()
+block_base, rtx__os_8h.html#a4a598d941460a6d8ebfbd9c622e2876a, osRtxMpInfo_t
+block_free, rtx__os_8h.html#aa111194ee30ea4e76b9dfcac8a03a8d9, osRtxMpInfo_t
+block_lim, rtx__os_8h.html#aba0fcdc6eda7e9f65c1d1904b2fff919, osRtxMpInfo_t
+block_size, rtx__os_8h.html#a9e3fb1e50a1c71b2337df296222d9553, osRtxMpInfo_t
+Building the RTX5 Library, creating_RTX5_LIB.html, rtx5_impl
+cb_mem, group__CMSIS__RTOS__Message.html#a1e100dc33d403841ed3c344e3397868e, osMessageQueueAttr_t::cb_mem()
+cb_size, group__CMSIS__RTOS__Message.html#aa55a4335d12dc2785dc00fdc292d1159, osMessageQueueAttr_t::cb_size()
+cmsis_os2.h, cmsis__os2_8h.html, 
+cmsis_os2.txt, cmsis__os2_8txt.html, 
+cmsis_os2_Event.txt, cmsis__os2__Event_8txt.html, 
+cmsis_os2_Kernel.txt, cmsis__os2__Kernel_8txt.html, 
+cmsis_os2_MemPool.txt, cmsis__os2__MemPool_8txt.html, 
+cmsis_os2_Message.txt, cmsis__os2__Message_8txt.html, 
+cmsis_os2_Migration.txt, cmsis__os2__Migration_8txt.html, 
+cmsis_os2_MigrationGuide.txt, cmsis__os2__MigrationGuide_8txt.html, 
+cmsis_os2_Mutex.txt, cmsis__os2__Mutex_8txt.html, 
+cmsis_os2_Sema.txt, cmsis__os2__Sema_8txt.html, 
+cmsis_os2_Status.txt, cmsis__os2__Status_8txt.html, 
+cmsis_os2_Thread.txt, cmsis__os2__Thread_8txt.html, 
+cmsis_os2_ThreadFlags.txt, cmsis__os2__ThreadFlags_8txt.html, 
+cmsis_os2_tick.txt, cmsis__os2__tick_8txt.html, 
+cmsis_os2_Timer.txt, cmsis__os2__Timer_8txt.html, 
+cmsis_os2_Wait.txt, cmsis__os2__Wait_8txt.html, 
+CMSIS-RTOS API v2, group__CMSIS__RTOS.html, 
+cnt_alloc, rtx__os_8h.html#a6bc379cb485caaa1bd9b63abbc79a4ec, osRtxObjectMemUsage_t
+cnt_free, rtx__os_8h.html#a5916fa670084fea56a52ba450565da4b, osRtxObjectMemUsage_t
+Coding Rules, CodingRules.html, 
+Configure RTX v5, config_rtx5.html, rtx5_impl
+Create an RTX5 Project, cre_rtx_proj.html, rtx5_impl
+Control Block Sizes, pControlBlockSizes.html, technicalData5
+CMSIS-RTOS C API v2, rtos_api2.html, functionOverview
+CMSIS-RTOS C++ API, rtos_apicpp.html, functionOverview
+Definitions, group__CMSIS__RTOS__Definitions.html, 
+delay, rtx__os_8h.html#a458421a43d4f6dc515faf427bf579d00, osRtxThread_t
+delay_next, rtx__os_8h.html#a21a74cedec66715cd5d7422797035868, osRtxThread_t
+delay_prev, rtx__os_8h.html#adcfea33cc536708db8a3419ba0295551, osRtxThread_t
+Detailed API Function Differences, os2MigrationFunctions.html, os2Migration
+Directory Structure and File Overview, pDirectory_Files.html, technicalData5
+Event Flags, group__CMSIS__RTOS__EventFlags.html, 
+event_flags, rtx__os_8h.html#a7044be0679894b5daf72f19f9dd06e03, osRtxEventFlags_t
+EvrRtxDelay, group__rtx__evr__wait.html#gaec642f6e093f6c1c9b9d7609c4b0d174, rtx_evr.h
+EvrRtxDelayCompleted, group__rtx__evr__wait.html#gaff18b7b13dc1fe87d1c9d3b23ed55208, rtx_evr.h
+EvrRtxDelayError, group__rtx__evr__wait.html#ga9ca2a1f7c2231057dcdb9df400284c0a, rtx_evr.h
+EvrRtxDelayStarted, group__rtx__evr__wait.html#gad489decd779491c1f247214e541cd4e8, rtx_evr.h
+EvrRtxDelayUntil, group__rtx__evr__wait.html#ga16728292de4e2665248693fff603a2c3, rtx_evr.h
+EvrRtxDelayUntilStarted, group__rtx__evr__wait.html#ga46ffa7cb290130a3b0d10dbd6c3faddd, rtx_evr.h
+EvrRtxEventFlagsClear, group__rtx__evr__event__flags.html#gab31f9da565b0170d8e89edf0e848f28b, rtx_evr.h
+EvrRtxEventFlagsClearDone, group__rtx__evr__event__flags.html#ga9e4c4e5d45bc721439c1919621a49d5a, rtx_evr.h
+EvrRtxEventFlagsCreated, group__rtx__evr__event__flags.html#gaa1f48b9787e3a7d4f56449ed1dd12f26, rtx_evr.h
+EvrRtxEventFlagsDelete, group__rtx__evr__event__flags.html#ga10e98e35999350e9e337c716ba4dc079, rtx_evr.h
+EvrRtxEventFlagsDestroyed, group__rtx__evr__event__flags.html#ga2ef153a6ee7a8d72375f81128454ede9, rtx_evr.h
+EvrRtxEventFlagsError, group__rtx__evr__event__flags.html#gaa281b7380c0fa725faa722badbeb2e5f, rtx_evr.h
+EvrRtxEventFlagsGet, group__rtx__evr__event__flags.html#ga113c32ff195c612ec2fb6a9dd5740184, rtx_evr.h
+EvrRtxEventFlagsGetName, group__rtx__evr__event__flags.html#gae9ebcbc09a1c15c719d95fe7b8c2ee18, rtx_evr.h
+EvrRtxEventFlagsNew, group__rtx__evr__event__flags.html#gae798cdc4cb10ada732e592318037cba7, rtx_evr.h
+EvrRtxEventFlagsSet, group__rtx__evr__event__flags.html#ga5e5c9bd8a0522fc9301782edd6e5ec1f, rtx_evr.h
+EvrRtxEventFlagsSetDone, group__rtx__evr__event__flags.html#ga5b1b471923918ad294d16255d43ab306, rtx_evr.h
+EvrRtxEventFlagsWait, group__rtx__evr__event__flags.html#gac8361874ffdd854e3778f21d070fed24, rtx_evr.h
+EvrRtxEventFlagsWaitCompleted, group__rtx__evr__event__flags.html#ga7b446f241c971db432ebac5d176bd9de, rtx_evr.h
+EvrRtxEventFlagsWaitNotCompleted, group__rtx__evr__event__flags.html#ga66f32e4dddc68cdfd56c32b88b7f13ff, rtx_evr.h
+EvrRtxEventFlagsWaitPending, group__rtx__evr__event__flags.html#gafd598e0b02a31083fb41626d68fa489e, rtx_evr.h
+EvrRtxEventFlagsWaitTimeout, group__rtx__evr__event__flags.html#ga877235cbe04188b831b70a3c2237c827, rtx_evr.h
+EvrRtxKernelError, group__rtx__evr__kernel.html#ga2a38154886e6293e127bafcfb6f7d609, rtx_evr.h
+EvrRtxKernelGetInfo, group__rtx__evr__kernel.html#ga4c2a175b79d39d70a4a5112e270d03f2, rtx_evr.h
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+EvrRtxKernelGetSysTimerCount, group__rtx__evr__kernel.html#gafb6530be8201b119015a3f45d66c2f09, rtx_evr.h
+EvrRtxKernelGetSysTimerFreq, group__rtx__evr__kernel.html#gaf2bdfcb7b099295c7b0123abe88e10a3, rtx_evr.h
+EvrRtxKernelGetTickCount, group__rtx__evr__kernel.html#ga64431a63437506a6f7fe22637d4891c5, rtx_evr.h
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+EvrRtxKernelInfoRetrieved, group__rtx__evr__kernel.html#ga85f9569d363a9a8f9677041405d0935f, rtx_evr.h
+EvrRtxKernelInitialize, group__rtx__evr__kernel.html#ga7e84d337b452f647c3a3d6937abd6292, rtx_evr.h
+EvrRtxKernelInitialized, group__rtx__evr__kernel.html#ga5db8d306617656bfec12638e17584d66, rtx_evr.h
+EvrRtxKernelLock, group__rtx__evr__kernel.html#ga1d0340812c29274c6150fa72288e0612, rtx_evr.h
+EvrRtxKernelLocked, group__rtx__evr__kernel.html#gac18ea91ffcae01e893304609a3c6cdc3, rtx_evr.h
+EvrRtxKernelLockRestored, group__rtx__evr__kernel.html#gaf7be1022a33c13fb44f4059f5636b75a, rtx_evr.h
+EvrRtxKernelRestoreLock, group__rtx__evr__kernel.html#ga812fdd14d6c40072cc40aec742d4869e, rtx_evr.h
+EvrRtxKernelResume, group__rtx__evr__kernel.html#ga9a8cac0fed8d3cf06f7301c944ad26d1, rtx_evr.h
+EvrRtxKernelResumed, group__rtx__evr__kernel.html#ga26e0a22f49576824d853fb434cf6b079, rtx_evr.h
+EvrRtxKernelStart, group__rtx__evr__kernel.html#ga75937a761dd488600d2525a532808d2b, rtx_evr.h
+EvrRtxKernelStarted, group__rtx__evr__kernel.html#ga28043ffc76fec09e6c8763a9a71b7f2a, rtx_evr.h
+EvrRtxKernelSuspend, group__rtx__evr__kernel.html#gac3abd78a9d3f3a6adc698e2929e1c32c, rtx_evr.h
+EvrRtxKernelSuspended, group__rtx__evr__kernel.html#gabdaa26d7774111af4913b5d6669d0f85, rtx_evr.h
+EvrRtxKernelUnlock, group__rtx__evr__kernel.html#gabe14acf14ed2611a3ba1f3b280fbfd8c, rtx_evr.h
+EvrRtxKernelUnlocked, group__rtx__evr__kernel.html#ga5cc909465e8df09c9231782e0c45e374, rtx_evr.h
+EvrRtxMemoryAlloc, group__rtx__evr__memory.html#gae1818917a5e085f92a03039ffaf2bad4, rtx_evr.h
+EvrRtxMemoryBlockAlloc, group__rtx__evr__memory.html#ga71c0df6f932436b54d7d641a440586db, rtx_evr.h
+EvrRtxMemoryBlockFree, group__rtx__evr__memory.html#ga69c2139620def7c5e59f6b1249857949, rtx_evr.h
+EvrRtxMemoryBlockInit, group__rtx__evr__memory.html#gac71421bbf537f2f8c9255f9f51cf7d54, rtx_evr.h
+EvrRtxMemoryFree, group__rtx__evr__memory.html#ga9227b18f5ea44d7caa8fadd4d539af9c, rtx_evr.h
+EvrRtxMemoryInit, group__rtx__evr__memory.html#ga15078f1251744140d90761e05c0fe1f2, rtx_evr.h
+EvrRtxMemoryPoolAlloc, group__rtx__evr__memory__pool.html#ga425c8a0e13c6fb13262d99a4dcabd507, rtx_evr.h
+EvrRtxMemoryPoolAllocated, group__rtx__evr__memory__pool.html#gad05246ee7e1f95e7f9496716515daeed, rtx_evr.h
+EvrRtxMemoryPoolAllocFailed, group__rtx__evr__memory__pool.html#gaf511fce5389dde6fd3277e3469c72fd9, rtx_evr.h
+EvrRtxMemoryPoolAllocPending, group__rtx__evr__memory__pool.html#ga2fbd33e3d84b4f37e9f9b80576b26907, rtx_evr.h
+EvrRtxMemoryPoolAllocTimeout, group__rtx__evr__memory__pool.html#ga0e144530d45959126018ad74bae7a6ed, rtx_evr.h
+EvrRtxMemoryPoolCreated, group__rtx__evr__memory__pool.html#gadad71c7b04493c03647ca0929ea087b1, rtx_evr.h
+EvrRtxMemoryPoolDeallocated, group__rtx__evr__memory__pool.html#ga3e8e700baea20b88c3d13678fe7a7fb4, rtx_evr.h
+EvrRtxMemoryPoolDelete, group__rtx__evr__memory__pool.html#ga64ae703ad556f25b105e3eae85b582b8, rtx_evr.h
+EvrRtxMemoryPoolDestroyed, group__rtx__evr__memory__pool.html#ga853e1867a4b65aff3f12f7be1aee5ce4, rtx_evr.h
+EvrRtxMemoryPoolError, group__rtx__evr__memory__pool.html#ga7e1a37b0c5dd0a97507c025ab1a62ec8, rtx_evr.h
+EvrRtxMemoryPoolFree, group__rtx__evr__memory__pool.html#ga46bc3ef3b1ca2e4cfb914f58d0efe92e, rtx_evr.h
+EvrRtxMemoryPoolFreeFailed, group__rtx__evr__memory__pool.html#gad75c377c00ae23caf7b4c3b77a0b46d1, rtx_evr.h
+EvrRtxMemoryPoolGetBlockSize, group__rtx__evr__memory__pool.html#gaf79f0e1eb41d42566ba9023be7e442c5, rtx_evr.h
+EvrRtxMemoryPoolGetCapacity, group__rtx__evr__memory__pool.html#gaed36f26a548d40e2a3d5b81c8695f287, rtx_evr.h
+EvrRtxMemoryPoolGetCount, group__rtx__evr__memory__pool.html#ga668bc3e627d9b74b6e8259a667e05846, rtx_evr.h
+EvrRtxMemoryPoolGetName, group__rtx__evr__memory__pool.html#gaeface1ee4957cdb59292e13c38a672d7, rtx_evr.h
+EvrRtxMemoryPoolGetSpace, group__rtx__evr__memory__pool.html#ga4bee4e3e41bdef94046dc059f16ca7ce, rtx_evr.h
+EvrRtxMemoryPoolNew, group__rtx__evr__memory__pool.html#gaf2fd4c91acf1379e93cd9886c515b9c5, rtx_evr.h
+EvrRtxMessageQueueCreated, group__rtx__evr__message__queue.html#ga36d6982377c1f54a227ba6fbb9458b79, rtx_evr.h
+EvrRtxMessageQueueDelete, group__rtx__evr__message__queue.html#gad11606ef82f5b82f291bf64adfc805e4, rtx_evr.h
+EvrRtxMessageQueueDestroyed, group__rtx__evr__message__queue.html#ga3bbf02128c31e5cc7ef4c78cdbec508c, rtx_evr.h
+EvrRtxMessageQueueError, group__rtx__evr__message__queue.html#ga8ded1d43703e0885a81e65251c6df405, rtx_evr.h
+EvrRtxMessageQueueGet, group__rtx__evr__message__queue.html#ga0826c1d05d3a99afb8682f0ca3f7fd62, rtx_evr.h
+EvrRtxMessageQueueGetCapacity, group__rtx__evr__message__queue.html#gad423a0be13d65e98d9ae08de9c399615, rtx_evr.h
+EvrRtxMessageQueueGetCount, group__rtx__evr__message__queue.html#ga145f0c464382dc71ff3b1c624b8bd570, rtx_evr.h
+EvrRtxMessageQueueGetMsgSize, group__rtx__evr__message__queue.html#ga3d6348bed3937de29765ed4d7d07fac8, rtx_evr.h
+EvrRtxMessageQueueGetName, group__rtx__evr__message__queue.html#gad0ef8ee59d2ec189351c5884f5f8e945, rtx_evr.h
+EvrRtxMessageQueueGetPending, group__rtx__evr__message__queue.html#ga11e3df32a66d5240b277375cbb5d3c83, rtx_evr.h
+EvrRtxMessageQueueGetSpace, group__rtx__evr__message__queue.html#ga6cfce7336f58505a2379a8a71f477d2f, rtx_evr.h
+EvrRtxMessageQueueGetTimeout, group__rtx__evr__message__queue.html#ga5e699de7401c46fd0e8bc19e398dc5a8, rtx_evr.h
+EvrRtxMessageQueueInserted, group__rtx__evr__message__queue.html#gaa30c5b375d4050ad7d99ba094821bf52, rtx_evr.h
+EvrRtxMessageQueueInsertPending, group__rtx__evr__message__queue.html#ga8440223b9d48145df5505489e7c6f7d9, rtx_evr.h
+EvrRtxMessageQueueNew, group__rtx__evr__message__queue.html#gaa7b18f18f3f53d6afb39ac1abe257000, rtx_evr.h
+EvrRtxMessageQueueNotInserted, group__rtx__evr__message__queue.html#ga2922125d8ac63fd800dc3b7888fd3f3c, rtx_evr.h
+EvrRtxMessageQueueNotRetrieved, group__rtx__evr__message__queue.html#ga22bfb7d1c2f6e3e9fea9d3267b2d6988, rtx_evr.h
+EvrRtxMessageQueuePut, group__rtx__evr__message__queue.html#ga401536a603e5a805cc6089b4de11d3d3, rtx_evr.h
+EvrRtxMessageQueuePutPending, group__rtx__evr__message__queue.html#ga4b1b6191c6ca87dff4714e25b5845828, rtx_evr.h
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+EvrRtxMessageQueueReset, group__rtx__evr__message__queue.html#ga91b8c8630c7d89b6b6dbb74d4fc81ba4, rtx_evr.h
+EvrRtxMessageQueueResetDone, group__rtx__evr__message__queue.html#ga3947d4a7ac86ee7a50052c9eb4cd5432, rtx_evr.h
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+EvrRtxMutexAcquire, group__rtx__evr__mutex.html#ga913c46223d91000fedab624d0f4e53f8, rtx_evr.h
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+EvrRtxMutexCreated, group__rtx__evr__mutex.html#ga712b32609cfb3ceded746ee6a86d2442, rtx_evr.h
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+EvrRtxMutexError, group__rtx__evr__mutex.html#ga47388f06c025938facfddd95851d666f, rtx_evr.h
+EvrRtxMutexGetName, group__rtx__evr__mutex.html#ga457302507cedf0ea969cbb110af606b8, rtx_evr.h
+EvrRtxMutexGetOwner, group__rtx__evr__mutex.html#ga89284c1927aa646535ff804f1aeda720, rtx_evr.h
+EvrRtxMutexNew, group__rtx__evr__mutex.html#ga51f59bf99b315f016ca752eddd1911d5, rtx_evr.h
+EvrRtxMutexNotAcquired, group__rtx__evr__mutex.html#ga5d2b957c02fcdcc0617479b93a56f6af, rtx_evr.h
+EvrRtxMutexRelease, group__rtx__evr__mutex.html#ga3fe98bfc9cbea52f578aa5a202305442, rtx_evr.h
+EvrRtxMutexReleased, group__rtx__evr__mutex.html#ga561c8898b912ea8eace4e6ba606210e5, rtx_evr.h
+EvrRtxSemaphoreAcquire, group__rtx__evr__semaphore.html#gafd91c9bb268a48b394571a9fc1809019, rtx_evr.h
+EvrRtxSemaphoreAcquired, group__rtx__evr__semaphore.html#ga4d1f85595cc0802cf8cac89fd8f88b5d, rtx_evr.h
+EvrRtxSemaphoreAcquirePending, group__rtx__evr__semaphore.html#gabbaaf85deaf4645414987fc1c3289343, rtx_evr.h
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+Revision History, rtos_revisionHistory.html, index
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+rtx_os.h, rtx__os_8h.html, 
+rtx_os.txt, rtx__os_8txt.html, 
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+Thread Management, group__CMSIS__RTOS__ThreadMgmt.html, 
+Timer Management, group__CMSIS__RTOS__TimerMgmt.html, 
+Thread Functions, group__rtx__evr__thread.html, 
+Thread Flags Functions, group__rtx__evr__thread__flags.html, 
+Timer Functions, group__rtx__evr__timer.html, 
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+thread_list, rtx__os_8h.html#a8afd5feb676df99867375957b0587451, osRtxObject_t::thread_list()
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+tick_freq, rtx__os_8h.html#a5973e7102782a9936a5e0d1417863675, osRtxConfig_t
+tick_irqn, rtx__os_8h.html#ad88a39594ffe6ab1016cf59517219e21, osRtxInfo_t
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+timer_mq_attr, rtx__os_8h.html#a3e07bcf21ce5250f3dc0f1ec4ebc938d, osRtxConfig_t
+timer_mq_mcnt, rtx__os_8h.html#a3d6d4ee231cd6db41ee358a5676b1a9d, osRtxConfig_t
+timer_thread_attr, rtx__os_8h.html#a310b3e01cc8e274529353210db5a78c3, osRtxConfig_t
+tokens, rtx__os_8h.html#a4e2e4e1126848f81d9e943147e07f0e0, osRtxSemaphore_t
+type, rtx__os_8h.html#a1d127017fb298b889f4ba24752d08b8e, osRtxTimer_t
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+tz_module, group__CMSIS__RTOS__ThreadMgmt.html#a697f2aad6119d655d212ea10245ae394, osThreadAttr_t
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+used_blocks, rtx__os_8h.html#a444139ba664bc8c262139a9addddb48c, osRtxMpInfo_t
+validation.txt, validation_8txt.html, 
+version, rtx__os_8h.html#acd99bb05ca015e7d74448acb1deba7ca, osRtxInfo_t
+wait_flags, rtx__os_8h.html#a3c7b4f24d9527394f4b5a1135d117691, osRtxThread_t
+
diff --git a/docs/RTOS2/html/index.html b/docs/RTOS2/html/index.html
index 97e96b7..2b41d96 100644
--- a/docs/RTOS2/html/index.html
+++ b/docs/RTOS2/html/index.html
@@ -169,7 +169,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/mainpage_8txt.html b/docs/RTOS2/html/mainpage_8txt.html
index 2b30907..66d4f2b 100644
--- a/docs/RTOS2/html/mainpage_8txt.html
+++ b/docs/RTOS2/html/mainpage_8txt.html
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="mainpage_8txt.html">mainpage.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/misraCompliance5.html b/docs/RTOS2/html/misraCompliance5.html
index 575ebf7..d439821 100644
--- a/docs/RTOS2/html/misraCompliance5.html
+++ b/docs/RTOS2/html/misraCompliance5.html
@@ -138,10 +138,10 @@
 <li>includes definition file: au-misra3.lnt (12-Jun-2014)</li>
 </ul>
 </li>
-<li>Additional Lint Commands (for both single and mutiple files): <div class="fragment"><div class="line">- emacro(835,<a class="code" href="rtx__os_8h.html#a0eb4da5bed45820d732e23483b870152">osRtxConfigPrivilegedMode</a>)</div>
+<li>Additional Lint Commands (for both single and multiple files): <div class="fragment"><div class="line">- emacro(835,<a class="code" href="rtx__os_8h.html#a0eb4da5bed45820d732e23483b870152">osRtxConfigPrivilegedMode</a>)</div>
 </div><!-- fragment --></li>
 </ul>
-<p>The C source code is annotated with PC-Lint control comments to allows MISRA deviations. These deviations with the underlaying design decisions are described in the following.</p>
+<p>The C source code is annotated with PC-Lint control comments to allows MISRA deviations. These deviations with the underlying design decisions are described in the following.</p>
 <h2>Deviations </h2>
 <p>The RTX source code has the following deviations from MISRA:</p>
 <ul>
@@ -185,10 +185,10 @@
 <div class="fragment"><div class="line"><span class="comment">//lint -e{904} &quot;Return statement before end of function&quot; [MISRA Note 1]</span></div>
 </div><!-- fragment --><h1><a class="anchor" id="MISRA_2"></a>
 [MISRA Note 2]: Object identifiers are void pointers</h1>
-<p>CMSIS-RTOS is independant of an underlying RTOS implementation. The object idenifiers are therefore defined as void pointers to:</p>
+<p>CMSIS-RTOS is independent of an underlying RTOS implementation. The object identifiers are therefore defined as void pointers to:</p>
 <ul>
 <li>allow application programs that are agnostic from an underlying RTOS implementation.</li>
-<li>avoid accidently accesses an RTOS control block from an application program.</li>
+<li>avoid accidentally accesses an RTOS control block from an application program.</li>
 </ul>
 <p>This design decisions imply the following MISRA deviations:</p>
 <ul>
@@ -197,7 +197,7 @@
 </ul>
 <p>All locations in the source code are marked with: </p>
 <div class="fragment"><div class="line"><span class="comment">//lint -e{9079} -e{9087} &quot;cast from pointer to void to pointer to object type&quot; [MISRA Note 2]</span></div>
-</div><!-- fragment --><p>In the RTX5 implementation the requried pointer conversions are implemented in the header file rtx_lib.h with the following inline functions:</p>
+</div><!-- fragment --><p>In the RTX5 implementation the required pointer conversions are implemented in the header file rtx_lib.h with the following inline functions:</p>
 <div class="fragment"><div class="line"><a class="code" href="rtx__os_8h.html#structosRtxThread__t">osRtxThread_t</a>       *osRtxThreadId (osThread_t thread_id);</div>
 <div class="line"><a class="code" href="rtx__os_8h.html#structosRtxTimer__t">osRtxTimer_t</a>        *osRtxTimerId (osTimer_t timer_id);</div>
 <div class="line"><a class="code" href="rtx__os_8h.html#structosRtxEventFlags__t">osRtxEventFlags_t</a>   *osRtxEventFlagsId (osEventFlags_t ef_id);</div>
@@ -207,7 +207,7 @@
 <div class="line"><a class="code" href="rtx__os_8h.html#structosRtxMessageQueue__t">osRtxMessageQueue_t</a> *osRtxMessageQueueId(<a class="code" href="cmsis__os2_8h.html#a206dbc05367e03c39fc6d4d1ebcff317">osMessageQueueId_t</a> mq_id);</div>
 </div><!-- fragment --><h1><a class="anchor" id="MISRA_3"></a>
 [MISRA Note 3]: Conversion to unified object control blocks</h1>
-<p>RTX uses a unified object control block structure that contains common object members. The unified control blocks use a fixed layout at the beginning of the sturcture and starts always with an object identifier. This allows common object functions that receive a pointer to a unified object control block and reference only the pointer or the members in the fixed layout. Using common object functions and data (for example the ISR queue) reduces code complexity and keeps the source code better structured. Refer also to <a class="el" href="misraCompliance5.html#MISRA_4">[MISRA Note 4]: Conversion from unified object control blocks</a></p>
+<p>RTX uses a unified object control block structure that contains common object members. The unified control blocks use a fixed layout at the beginning of the structure and starts always with an object identifier. This allows common object functions that receive a pointer to a unified object control block and reference only the pointer or the members in the fixed layout. Using common object functions and data (for example the ISR queue) reduces code complexity and keeps the source code better structured. Refer also to <a class="el" href="misraCompliance5.html#MISRA_4">[MISRA Note 4]: Conversion from unified object control blocks</a></p>
 <p>This design decisions imply the following MISRA deviations:</p>
 <ul>
 <li>[MISRA 2012 Rule 11.3, required]: A cast shall not be performed between a pointer to object type and a pointer to a different object type</li>
@@ -215,11 +215,11 @@
 </ul>
 <p>All locations in the source code are marked with: </p>
 <div class="fragment"><div class="line"><span class="comment">//lint -e{9079} -e{9087} &quot;cast from pointer to void to pointer to object type&quot; [MISRA Note 3]</span></div>
-</div><!-- fragment --><p>In the RTX5 implementation the requried pointer conversions are implemented in the header file <em>rtx_lib.h</em> with the following inline function:</p>
+</div><!-- fragment --><p>In the RTX5 implementation the required pointer conversions are implemented in the header file <em>rtx_lib.h</em> with the following inline function:</p>
 <div class="fragment"><div class="line"><a class="code" href="rtx__os_8h.html#structosRtxObject__t">osRtxObject_t</a> *osRtxObject (<span class="keywordtype">void</span> *<span class="keywordtype">object</span>);</div>
 </div><!-- fragment --><h1><a class="anchor" id="MISRA_4"></a>
 [MISRA Note 4]: Conversion from unified object control blocks</h1>
-<p>RTX uses a unified object control block structure that contains common object members. Refer to <a class="el" href="misraCompliance5.html#MISRA_3">[MISRA Note 3]: Conversion to unified object control blocks</a> for more information. To process specifc control block data, pointer conversions are required.</p>
+<p>RTX uses a unified object control block structure that contains common object members. Refer to <a class="el" href="misraCompliance5.html#MISRA_3">[MISRA Note 3]: Conversion to unified object control blocks</a> for more information. To process specific control block data, pointer conversions are required.</p>
 <p>This design decisions imply the following MISRA deviations:</p>
 <ul>
 <li>[MISRA 2012 Rule 1.3, required]: There shall be no occurrence of undefined or critical unspecified behavior</li>
@@ -228,7 +228,7 @@
 </ul>
 <p>All locations in the source code are marked with: </p>
 <div class="fragment"><div class="line"><span class="comment">//lint -e{740} -e{826} -e{9087} &quot;cast from pointer to generic object to specific object&quot; [MISRA Note 4]</span></div>
-</div><!-- fragment --><p>In the RTX5 source code the requried pointer conversions are implemented in the header file <em>rtx_lib.h</em> with the following inline functions:</p>
+</div><!-- fragment --><p>In the RTX5 source code the required pointer conversions are implemented in the header file <em>rtx_lib.h</em> with the following inline functions:</p>
 <div class="fragment"><div class="line"><a class="code" href="rtx__os_8h.html#structosRtxThread__t">osRtxThread_t</a>       *osRtxThreadObject (<a class="code" href="rtx__os_8h.html#structosRtxObject__t">osRtxObject_t</a> *<span class="keywordtype">object</span>);</div>
 <div class="line"><a class="code" href="rtx__os_8h.html#structosRtxTimer__t">osRtxTimer_t</a>        *osRtxTimerObject (<a class="code" href="rtx__os_8h.html#structosRtxObject__t">osRtxObject_t</a> *<span class="keywordtype">object</span>);</div>
 <div class="line"><a class="code" href="rtx__os_8h.html#structosRtxEventFlags__t">osRtxEventFlags_t</a>   *osRtxEventFlagsObject (<a class="code" href="rtx__os_8h.html#structosRtxObject__t">osRtxObject_t</a> *<span class="keywordtype">object</span>);</div>
@@ -239,7 +239,7 @@
 <div class="line"><a class="code" href="rtx__os_8h.html#structosRtxMessage__t">osRtxMessage_t</a>      *osRtxMessageObject (<a class="code" href="rtx__os_8h.html#structosRtxObject__t">osRtxObject_t</a> *<span class="keywordtype">object</span>);</div>
 </div><!-- fragment --><h1><a class="anchor" id="MISRA_5"></a>
 [MISRA Note 5]: Conversion to object types</h1>
-<p>The RTX5 kernel has common memory management functions that use void pointers. These memory allocation fuctions returns a void pointer which is correctly aligned for object types.</p>
+<p>The RTX5 kernel has common memory management functions that use void pointers. These memory allocation functions return a void pointer which is correctly aligned for object types.</p>
 <p>This design decision implies the following MISRA deviations:</p>
 <ul>
 <li>[MISRA 2012 Rule 11.5, advisory]: A conversion should not be performed from pointer to void into pointer to object</li>
@@ -269,7 +269,7 @@
 <div class="line">    :</div>
 <div class="line">    <span class="comment">//lint -e{9079} &quot;conversion from pointer to void to pointer to other type&quot; [MISRA Note 6]</span></div>
 <div class="line">    timer = attr-&gt;<a class="code" href="group__CMSIS__RTOS__TimerMgmt.html#a1e100dc33d403841ed3c344e3397868e">cb_mem</a>;</div>
-<div class="line">        :</div>
+<div class="line">    :</div>
 </div><!-- fragment --><h1><a class="anchor" id="MISRA_7"></a>
 [MISRA Note 7]: Check for proper pointer alignment</h1>
 <p>RTX5 verifies the alignment of user provided storage for object control blocks, stack, and data storage. Refer also to <a class="el" href="misraCompliance5.html#MISRA_6">[MISRA Note 6]: Conversion from user provided storage</a> for more information.</p>
@@ -341,7 +341,7 @@
 [MISRA Note 11]: SVC calls use assembly code</h1>
 <p>The SVC (Service Call) functions are constructed as a mix of C and inline assembly as it is required to access CPU registers for parameter passing. The function parameters are mapped to the CPU registers R0..R3 and SVC function number to CPU register R12 (or R7). For assembly inter-working the function parameters are casted to unsigned int values.</p>
 <p>The function return value after SVC call is mapped to the CPU register R0. Return value is casted from unsigned int to the target value.</p>
-<p>It has been verified that this method has has no side-effects and is well defined.</p>
+<p>It has been verified that this method has no side-effects and is well defined.</p>
 <p>This design decision implies the following MISRA deviations:</p>
 <ul>
 <li>[MISRA 2012 Rule 10.3, required]: Expression assigned to a narrower or different essential type</li>
@@ -367,7 +367,8 @@
 </ul>
 <h1><a class="anchor" id="MISRA_12"></a>
 [MISRA Note 12]: Usage of exclusive access instructions</h1>
-<p>The RTX5 implementation uses the CPU instructions LDREX and STREX (when supported by the processor) to implement atomic operations. This atomic operations elimite the requirement for interrupt lock-outs. The atomic operations are implemented using inline assembly.</p>
+<p>The RTX5 implementation uses the CPU instructions LDREX and STREX (when supported by the processor) to implement atomic operations.</p>
+<p>These atomic operations eliminate the requirement for interrupt lock-outs. The atomic operations are implemented using inline assembly.</p>
 <p>PC-lint cannot process assembler instructions including the input/output operand lists and therefore falsely identifies issues:</p>
 <ul>
 <li>Symbol not initialized</li>
@@ -382,8 +383,8 @@
 <div class="line"><span class="comment">//lint --flb &quot;Library End&quot;</span></div>
 </div><!-- fragment --><h1><a class="anchor" id="MISRA_13"></a>
 [MISRA Note 13]: Usage of Event Recorder</h1>
-<p>The Event Recorder is a generic event logger and the related functions are called to record an event. The function parameters are 32-bit id, 32-bit values, pointer to void (data) and are recorded as 32-bit numbers. The parameters for the Event Recorder may require cast opertions to unsigned int which however has no side-effects and is well defined.</p>
-<p>The return value indicates success or failure. There is no need to check the return value since no action is taken when a Event Recorder function fail. The EventID macro (part of external Event Recorder) constructs the ID based on input parameters which are shifted, masked with '&amp;' and combined with '|'. Zero value input parameters are valid and cause zero used with '&amp;' and '|'.</p>
+<p>The Event Recorder is a generic event logger and the related functions are called to record an event. The function parameters are 32-bit id, 32-bit values, pointer to void (data) and are recorded as 32-bit numbers. The parameters for the Event Recorder may require cast operations to unsigned int which however has no side-effects and is well defined.</p>
+<p>The return value indicates success or failure. There is no need to check the return value since no action is taken when an Event Recorder function fail. The EventID macro (part of external Event Recorder) constructs the ID based on input parameters which are shifted, masked with '&amp;' and combined with '|'. Zero value input parameters are valid and cause zero used with '&amp;' and '|'.</p>
 <p>The usage of the Event Recorder implies the following MISRA deviations:</p>
 <ul>
 <li>[MISRA 2012 Rule 11.1, required]: Conversions shall not be performed between a pointer to a function and any other type</li>
@@ -400,7 +401,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li><li class="navelem"><a class="el" href="rtx5_impl.html">RTX v5 Implementation</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/modules.html b/docs/RTOS2/html/modules.html
index 4e54e91..4e2e76a 100644
--- a/docs/RTOS2/html/modules.html
+++ b/docs/RTOS2/html/modules.html
@@ -135,12 +135,14 @@
 <tr id="row_2_2_0_"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__rtx__evr__memory.html" target="_self">Memory Functions</a></td><td class="desc">Events generated memory functions </td></tr>
 <tr id="row_2_2_1_" class="even"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__rtx__evr__kernel.html" target="_self">Kernel Functions</a></td><td class="desc">Events generated by kernel functions </td></tr>
 <tr id="row_2_2_2_"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__rtx__evr__thread.html" target="_self">Thread Functions</a></td><td class="desc">Events generated by thread functions </td></tr>
-<tr id="row_2_2_3_" class="even"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__rtx__evr__timer.html" target="_self">Timer Functions</a></td><td class="desc">Events generated by timer functions </td></tr>
-<tr id="row_2_2_4_"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__rtx__evr__event__flasg.html" target="_self">Event Flags Functions</a></td><td class="desc">Events generated by event flag functions </td></tr>
-<tr id="row_2_2_5_" class="even"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__rtx__evr__mutex.html" target="_self">Mutex Functions</a></td><td class="desc">Events generated by mutex functions </td></tr>
-<tr id="row_2_2_6_"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__rtx__evr__semaphore.html" target="_self">Semaphore Functions</a></td><td class="desc">Events generated by semaphore functions </td></tr>
-<tr id="row_2_2_7_" class="even"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__rtx__evr__memory__pool.html" target="_self">Memory Pool Functions</a></td><td class="desc">Events generated by memory pool functions </td></tr>
-<tr id="row_2_2_8_"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__rtx__evr__message__queue.html" target="_self">Message Queue Functions</a></td><td class="desc">Events generated by message queue functions </td></tr>
+<tr id="row_2_2_3_" class="even"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__rtx__evr__wait.html" target="_self">Generic Wait Functions</a></td><td class="desc">Events generated by generic wait functions </td></tr>
+<tr id="row_2_2_4_"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__rtx__evr__thread__flags.html" target="_self">Thread Flags Functions</a></td><td class="desc">Events generated by thread flags functions </td></tr>
+<tr id="row_2_2_5_" class="even"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__rtx__evr__event__flags.html" target="_self">Event Flags Functions</a></td><td class="desc">Events generated by event flag functions </td></tr>
+<tr id="row_2_2_6_"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__rtx__evr__timer.html" target="_self">Timer Functions</a></td><td class="desc">Events generated by timer functions </td></tr>
+<tr id="row_2_2_7_" class="even"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__rtx__evr__mutex.html" target="_self">Mutex Functions</a></td><td class="desc">Events generated by mutex functions </td></tr>
+<tr id="row_2_2_8_"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__rtx__evr__semaphore.html" target="_self">Semaphore Functions</a></td><td class="desc">Events generated by semaphore functions </td></tr>
+<tr id="row_2_2_9_" class="even"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__rtx__evr__memory__pool.html" target="_self">Memory Pool Functions</a></td><td class="desc">Events generated by memory pool functions </td></tr>
+<tr id="row_2_2_10_"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__rtx__evr__message__queue.html" target="_self">Message Queue Functions</a></td><td class="desc">Events generated by message queue functions </td></tr>
 </table>
 </div><!-- directory -->
 </div><!-- contents -->
@@ -148,7 +150,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/navtree.js b/docs/RTOS2/html/navtree.js
index 6e17c94..ce5ba10 100644
--- a/docs/RTOS2/html/navtree.js
+++ b/docs/RTOS2/html/navtree.js
@@ -30,8 +30,8 @@
 [
 "CodingRules.html",
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-"misraCompliance5.html#MISRA_9",
-"structosRtxInfo__t_8timer.html"
+"group__rtx__evr__timer.html#gaccd59c7ae2351e0a1bf96cdb749c049f",
+"rtx__os_8h.html#structosRtxEventFlags__t"
 ];
 
 var SYNCONMSG = 'click to disable panel synchronisation';
diff --git a/docs/RTOS2/html/navtreeindex1.js b/docs/RTOS2/html/navtreeindex1.js
index 406646c..1467929 100644
--- a/docs/RTOS2/html/navtreeindex1.js
+++ b/docs/RTOS2/html/navtreeindex1.js
@@ -78,14 +78,23 @@
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  Get name of a Memory Pool object. <br/>
@@ -670,7 +670,7 @@
  <br/>
  Get maximum message size in a Memory Pool. <br/>
  New function. </div><hr/>
-<div class="new"> <code>const char *<a class="el" href="group__CMSIS__RTOS__Message.html#gae7cf7bf2b97a5ae481fb60fcce99247a" title="Get name of a Message Queue object. ">osMessageQueueGetName</a> ((osMessageQueueId_t mq_id)</code> <br/>
+<div class="new"> <code>const char *<a class="el" href="group__CMSIS__RTOS__Message.html#gae7cf7bf2b97a5ae481fb60fcce99247a" title="Get name of a Message Queue object. ">osMessageQueueGetName</a> (osMessageQueueId_t mq_id)</code> <br/>
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  <br/>
  Get name of a Message Queue object. <br/>
@@ -754,7 +754,7 @@
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   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li><li class="navelem"><a class="el" href="os2Migration.html">Migration from API v1 to API v2</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/RTOS2/html/os2MigrationGuide.html b/docs/RTOS2/html/os2MigrationGuide.html
index d1b662b..07e556c 100644
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+++ b/docs/RTOS2/html/os2MigrationGuide.html
@@ -270,7 +270,7 @@
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   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li><li class="navelem"><a class="el" href="os2Migration.html">Migration from API v1 to API v2</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/RTOS2/html/os__systick_8c.html b/docs/RTOS2/html/os__systick_8c.html
deleted file mode 100644
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-<meta http-equiv="X-UA-Compatible" content="IE=9"/>
-<title>os_systick.c File Reference</title>
-<title>CMSIS-RTOS2: os_systick.c File Reference</title>
-<link href="tabs.css" rel="stylesheet" type="text/css"/>
-<link href="cmsis.css" rel="stylesheet" type="text/css" />
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-  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
-  <td style="padding-left: 0.5em;">
-   <div id="projectname">CMSIS-RTOS2
-   &#160;<span id="projectnumber">Version 2.1.2</span>
-   </div>
-   <div id="projectbrief">Real-Time Operating System: API and RTX Reference Implementation</div>
-  </td>
- </tr>
- </tbody>
-</table>
-</div>
-<!-- end header part -->
-<div id="CMSISnav" class="tabs1">
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-  <div id="navrow1" class="tabs">
-    <ul class="tablist">
-      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
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-      <li><a href="modules.html"><span>Reference</span></a></li>
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-<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
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-<div class="header">
-  <div class="headertitle">
-<div class="title">os_systick.c File Reference</div>  </div>
-</div><!--header-->
-<div class="contents">
-
-<p>CMSIS OS Tick SysTick implementation.  
-<a href="#details">More...</a></p>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<div class="textblock"><dl class="section version"><dt>Version</dt><dd>V1.0.0 </dd></dl>
-<dl class="section date"><dt>Date</dt><dd>05. June 2017 </dd></dl>
-</div></div><!-- contents -->
-</div><!-- doc-content -->
-<!-- start footer part -->
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-  <ul>
-    <li class="navelem"><a class="el" href="dir_a43355fbfff7212ac2193223a73d577c.html">RTOS2</a></li><li class="navelem"><a class="el" href="dir_899d076620cccde5757c1c1ca5de63cc.html">Source</a></li><li class="navelem"><a class="el" href="os__systick_8c.html">os_systick.c</a></li>
-    <li class="footer">Generated on Thu Nov 16 2017 17:06:23 for CMSIS-RTOS2 by ARM Ltd. All rights reserved.
-	<!--
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-    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
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diff --git a/docs/RTOS2/html/os__tick_8h.html b/docs/RTOS2/html/os__tick_8h.html
index dcc5d52..05ee12e 100644
--- a/docs/RTOS2/html/os__tick_8h.html
+++ b/docs/RTOS2/html/os__tick_8h.html
@@ -195,7 +195,7 @@
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   <ul>
     <li class="navelem"><a class="el" href="dir_a43355fbfff7212ac2193223a73d577c.html">RTOS2</a></li><li class="navelem"><a class="el" href="dir_f5870d36a7061bb81e1a64a750696f2d.html">Include</a></li><li class="navelem"><a class="el" href="os__tick_8h.html">os_tick.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/pControlBlockSizes.html b/docs/RTOS2/html/pControlBlockSizes.html
index fcb61c7..1476cad 100644
--- a/docs/RTOS2/html/pControlBlockSizes.html
+++ b/docs/RTOS2/html/pControlBlockSizes.html
@@ -139,7 +139,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li><li class="navelem"><a class="el" href="rtx5_impl.html">RTX v5 Implementation</a></li><li class="navelem"><a class="el" href="technicalData5.html">Technical Data</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/pDirectory_Files.html b/docs/RTOS2/html/pDirectory_Files.html
index b865db1..b3e7aa9 100644
--- a/docs/RTOS2/html/pDirectory_Files.html
+++ b/docs/RTOS2/html/pDirectory_Files.html
@@ -143,7 +143,7 @@
 </table>
 <h1><a class="anchor" id="libFiles"></a>
 RTX v5 Library Files</h1>
-<p>The CMSIS-RTOS RTX Library is available pre-compiled for ARMCC and GCC compilers and supports all Cortex-M processor variants in every configuration, including Arm Cortex-M23 and Cortex-M33.</p>
+<p>The CMSIS-RTOS RTX Library is available pre-compiled for ARMCC and GCC compilers and supports all Cortex-M processor variants in every configuration , including Arm Cortex-M23, Cortex-M33 and Cortex-M35P.</p>
 <table  class="cmtable" summary="CMSIS-RTOS RTX Library Files">
 <tr>
 <th>Library File </th><th>Processor Configuration  </th></tr>
@@ -190,7 +190,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li><li class="navelem"><a class="el" href="rtx5_impl.html">RTX v5 Implementation</a></li><li class="navelem"><a class="el" href="technicalData5.html">Technical Data</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/pHardwareRequirements.html b/docs/RTOS2/html/pHardwareRequirements.html
index fac09bb..275e23d 100644
--- a/docs/RTOS2/html/pHardwareRequirements.html
+++ b/docs/RTOS2/html/pHardwareRequirements.html
@@ -114,7 +114,7 @@
 <div class="textblock"><p>The following section lists the hardware requirements for RTX v5 on the various supported target processors:</p>
 <h1><a class="anchor" id="tpProcessor"></a>
 Processor Requirements</h1>
-<p>RTX assumes a fully function-able processor and uses the following hardware features. It does not implement any confidence test for processor validation which should be provided by an user-supplied software test library.</p>
+<p>RTX assumes a fully functionable processor and uses the following hardware features. It does not implement any confidence test for processor validation which should be provided by an user-supplied software test library.</p>
 <h2><a class="anchor" id="tpCortexM0_M0P_M23"></a>
 Cortex-M0/M0+/M23 target processor</h2>
 <table class="doxtable">
@@ -131,7 +131,7 @@
 <tr>
 <td align="left">Interrupt Control </td><td align="left">The CMSIS-Core functions __disable_irq and __enable_irq to control the interrupt system via the CPSR core register. </td></tr>
 </table>
-<p>The interface files to the processor hardware are:</p>
+<p>The RTX implements interfaces to the processor hardware in following files:</p>
 <ul>
 <li><b>irq_cm0.s</b> defines exception handlers for Cortex-M0/M0+</li>
 <li><b>irq_armv8mbl_common.s</b> defines exception handlers for Cortex-M23</li>
@@ -139,37 +139,38 @@
 <li><b>os_tick.h</b> is the <a class="el" href="group__CMSIS__RTOS__TickAPI.html">OS Tick API</a> that defines the interface functions to the SysTick timer.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd><ul>
-<li>The CMSIS-Core variable <code>SystemCoreClock</code> is used to configure the SysTick timer.</li>
+<li>The CMSIS-Core variable <code>SystemCoreClock</code> is used by RTX to configure the SysTick timer.</li>
 </ul>
 </dd></dl>
-<h2><a class="anchor" id="tpCortexM3_M4_M7_M33"></a>
-Cortex-M3/M4/M7/M33 target processor</h2>
+<h2><a class="anchor" id="tpCortexM3_M4_M7_M33_M35P"></a>
+Cortex-M3/M4/M7/M33/M35P target processor</h2>
+<p>RTX assumes a fully function-able processor and uses the following hardware features:</p>
 <table class="doxtable">
 <tr>
-<th align="left">Hardware Requirement </th><th align="left">Description  </th></tr>
+<th align="left">Hardware Item </th><th align="left">Requirement Description  </th></tr>
 <tr>
-<td align="left">SysTick timer </td><td align="left">The SysTick timer generates the kernel tick interrupts and the interface is implemented in os_systick.c using the <a class="el" href="group__CMSIS__RTOS__TickAPI.html">OS Tick API</a> </td></tr>
+<td align="left">SysTick timer </td><td align="left">The <b>SysTick</b> timer shall be available in the processor. </td></tr>
 <tr>
-<td align="left">Exception Handler </td><td align="left">RTX implements exception handlers for SVC, PendSV, and SysTick interrupt </td></tr>
+<td align="left">System Exceptions </td><td align="left">The RTX requires <b>SVC</b>, <b>PendSV</b>, and <b>SysTick</b> exceptions and implements corresponding exception handlers. </td></tr>
 <tr>
-<td align="left">Core Registers </td><td align="left">The processor status is read using the following core registers: CONTROL, IPSR, PRIMASK, BASEPRI </td></tr>
+<td align="left">Core Registers </td><td align="left">The RTX uses <b>CONTROL</b>, <b>IPSR</b> , <b>PRIMASK</b> and <b>BASEPRI</b> core registers for reading processor status. </td></tr>
 <tr>
-<td align="left">System Control Block (SBC) </td><td align="left">To control and setup the processor exceptions including PendSV and SVC </td></tr>
+<td align="left">System Control Block (SCB) </td><td align="left">The RTX uses <b>SCB</b> registers to control and setup the processor system exceptions including PendSV and SVC. </td></tr>
 <tr>
-<td align="left">NVIC Interface </td><td align="left">The CMSIS-Core function NVIC_GetPriorityGrouping to setup interrupt priorities. </td></tr>
+<td align="left">NVIC Interface </td><td align="left">CMSIS-Core function <b>NVIC_GetPriorityGrouping</b> is used by the RTX to setup interrupt priorities. </td></tr>
 <tr>
-<td align="left">LDREX, STREX instruction </td><td align="left">Atomic execution avoids the requirement to disable interrupts and is implemented via exclusive access instructions. </td></tr>
+<td align="left">LDREX, STREX instructions </td><td align="left">Exclusive access instructions <b>LDREX</b> and <b>STREX</b> are used to implement atomic execution without disabling interrupts. </td></tr>
 </table>
 <p>The interface files to the processor hardware are:</p>
 <ul>
 <li><b>irq_cm3.s</b> defines exception handlers for Cortex-M3 and Cortex-M4/M7 without floating point unit.</li>
 <li><b>irq_cm4f.s</b> defines exception handlers for Cortex-M4/M7 with floating point unit.</li>
-<li><b>irq_armv8mml_common.s</b> defines exception handlers for Cortex-M33</li>
+<li><b>irq_armv8mml_common.s</b> defines exception handlers for Cortex-M33/M35P</li>
 <li><b>rtx_core_cm.h</b> defines processor specific helper functions and the interfaces to Core Registers and Core Peripherals.</li>
 <li><b>os_tick.h</b> is the <a class="el" href="group__CMSIS__RTOS__TickAPI.html">OS Tick API</a> that defines the interface functions to the SysTick timer.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd><ul>
-<li>The CMSIS-Core variable <code>SystemCoreClock</code> is used to configure the SysTick timer.</li>
+<li>The CMSIS-Core variable <code>SystemCoreClock</code> is used by RTX to configure the SysTick timer.</li>
 </ul>
 </dd></dl>
 <h2><a class="anchor" id="tpCortexA5_A7_A9"></a>
@@ -196,7 +197,7 @@
 <li><b>irq_ctrl.h</b> is the <a href="../../Core_A/html/group__irq__ctrl__gr.html" class="el">IRQ Controller API</a> that defines the interface functions to the interrupt controller.</li>
 </ul>
 <dl class="section note"><dt>Note</dt><dd><ul>
-<li>The CMSIS-Core variable <code>SystemCoreClock</code> is used to configure the timer peripheral.</li>
+<li>The CMSIS-Core variable <code>SystemCoreClock</code> is used by RTX to configure the timer peripheral.</li>
 </ul>
 </dd></dl>
 <h1><a class="anchor" id="rMemory"></a>
@@ -209,7 +210,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li><li class="navelem"><a class="el" href="rtx5_impl.html">RTX v5 Implementation</a></li><li class="navelem"><a class="el" href="technicalData5.html">Technical Data</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
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     <a href="http://www.doxygen.org/index.html">
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+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>Stack Requirements</title>
+<title>CMSIS-RTOS2: Stack Requirements</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
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+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-RTOS2
+   &#160;<span id="projectnumber">Version 2.1.3</span>
+   </div>
+   <div id="projectbrief">Real-Time Operating System: API and RTX Reference Implementation</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
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+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li><a href="modules.html"><span>Reference</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
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+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
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+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
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+      <div id="nav-sync" class="sync"></div>
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+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('pStackRequirements.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
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+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Macros</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(9)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(10)"><span class="SelectionMark">&#160;</span>Pages</a></div>
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+<div class="header">
+  <div class="headertitle">
+<div class="title">Stack Requirements </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>Keil RTX v5 kernel functions are executed in handler mode (using PendSV/SysTick/SVC) and the tables below lists the maximum stack requirements for the Main Stack (MSP) that the user should consider.</p>
+<p>The stack for the <a class="el" href="group__CMSIS__RTOS__KernelCtrl.html#ga9ae2cc00f0d89d7b6a307bba942b5221">osKernelStart</a> function is referred as "Startup" and RTX v5 uses 32 bytes (with Arm Compiler). However the user should also consider additional stack that might be allocated by the 'main' function of the embedded application. The following picture shows a worst-case memory allocation of the Main Stack.</p>
+<div class="image">
+<img src="KernelStackUsage.png" alt="KernelStackUsage.png"/>
+<div class="caption">
+Main Stack usage of RTX v5 applications</div></div>
+<p> The stack requirements depend on the compiler and the optimization level. RTX v5 supports event annotations and this configuration impacts also the stack requirement.</p>
+<p><b>Arm Compiler ARMCC V6.10</b>: Main Stack requirements for PendSV/SysTick/SVC</p>
+<table class="doxtable">
+<tr>
+<th align="left">Optimization </th><th align="left">RTX Kernel </th><th align="left">RTX Kernel + Event Recorder  </th></tr>
+<tr>
+<td align="left">-O1 (Debug) </td><td align="left">152 bytes </td><td align="left">280 bytes </td></tr>
+<tr>
+<td align="left">-Os (Balanced) </td><td align="left">120 bytes </td><td align="left">256 bytes </td></tr>
+<tr>
+<td align="left">-Oz (Size) </td><td align="left">112 bytes </td><td align="left">248 bytes </td></tr>
+</table>
+<p><b>Arm Compiler ARMCC V5.06</b>: Main Stack requirements for PendSV/SysTick/SVC</p>
+<table class="doxtable">
+<tr>
+<th align="left">Optimization </th><th align="left">RTX Kernel </th><th align="left">RTX Kernel + Event Recorder  </th></tr>
+<tr>
+<td align="left">-O0 (Debug) </td><td align="left">176 bytes </td><td align="left">360 bytes </td></tr>
+<tr>
+<td align="left">-O1 </td><td align="left">112 bytes </td><td align="left">248 bytes </td></tr>
+<tr>
+<td align="left">-O2 </td><td align="left">112 bytes </td><td align="left">256 bytes </td></tr>
+<tr>
+<td align="left">-O3 </td><td align="left">112 bytes </td><td align="left">248 bytes </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="index.html">index</a></li><li class="navelem"><a class="el" href="rtx5_impl.html">RTX v5 Implementation</a></li><li class="navelem"><a class="el" href="technicalData5.html">Technical Data</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/RTOS2/html/pToolchains.html b/docs/RTOS2/html/pToolchains.html
index 7f260b6..55af257 100644
--- a/docs/RTOS2/html/pToolchains.html
+++ b/docs/RTOS2/html/pToolchains.html
@@ -149,7 +149,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li><li class="navelem"><a class="el" href="rtx5_impl.html">RTX v5 Implementation</a></li><li class="navelem"><a class="el" href="technicalData5.html">Technical Data</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/pages.html b/docs/RTOS2/html/pages.html
index a819afc..c70082f 100644
--- a/docs/RTOS2/html/pages.html
+++ b/docs/RTOS2/html/pages.html
@@ -121,7 +121,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:46 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/rtosValidation.html b/docs/RTOS2/html/rtosValidation.html
index a909f61..1f1cfd2 100644
--- a/docs/RTOS2/html/rtosValidation.html
+++ b/docs/RTOS2/html/rtosValidation.html
@@ -160,7 +160,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/rtos_api2.html b/docs/RTOS2/html/rtos_api2.html
index 31420e6..062d9a7 100644
--- a/docs/RTOS2/html/rtos_api2.html
+++ b/docs/RTOS2/html/rtos_api2.html
@@ -129,7 +129,7 @@
 <p><b>Object Usage</b></p>
 <p>After an object has been created successfully it can be used until it is destroyed. The actions defined for an object depends on its type. Commonly all the <code>osXxxDoSomething</code> access function require the reference to the object to work with as the first <code>xxx_id</code> parameter.</p>
 <p>The access function can be assumed to apply some sort of sanity checking on the id parameter. So that it is assured one cannot accidentally call an access function with a <span class="XML-Token">NULL</span> object reference. Furthermore the concrete object type is verified, i.e. one cannot call access functions of one object type with a reference to another object type.</p>
-<p>All further parameter checks applied are either object and action specific or may even be implementation specific. Thus one should always check action function return values for <code>osErrorParameter</code> to asure the provided arguments were accepted.</p>
+<p>All further parameter checks applied are either object and action specific or may even be implementation specific. Thus one should always check action function return values for <code>osErrorParameter</code> to assure the provided arguments were accepted.</p>
 <p>As a rule of thumb only non-blocking access function can be used from <a class="el" href="theory_of_operation.html#CMSIS_RTOS_ISR_Calls">Interrupt Service Routines</a> (ISR). This incorporates <code>osXxxWait</code> functions (and similar) limited to be called with parameter <code>timeout</code> set to <span class="XML-Token">0</span>, i.e. usage of try-semantics.</p>
 <p><b>Object Destruction</b></p>
 <p>Objects that are not needed anymore can be destructed on demand to free the control block memory. Objects are not destructed implicitly. Thus one can assume an object id to be valid until <code>osXxxDelete</code> is called explicitly. The delete function finally frees the control block memory. In case of user provided control block memory, see above, the memory must be freed manually as well.</p>
@@ -263,7 +263,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li><li class="navelem"><a class="el" href="functionOverview.html">Function Overview</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/RTOS2/html/rtos_apicpp.html b/docs/RTOS2/html/rtos_apicpp.html
index d6cf733..82d3bb2 100644
--- a/docs/RTOS2/html/rtos_apicpp.html
+++ b/docs/RTOS2/html/rtos_apicpp.html
@@ -118,7 +118,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li><li class="navelem"><a class="el" href="functionOverview.html">Function Overview</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/rtos_os_tick_api.html b/docs/RTOS2/html/rtos_os_tick_api.html
index a2dfaca..8a05083 100644
--- a/docs/RTOS2/html/rtos_os_tick_api.html
+++ b/docs/RTOS2/html/rtos_os_tick_api.html
@@ -132,7 +132,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li><li class="navelem"><a class="el" href="functionOverview.html">Function Overview</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/rtos_revisionHistory.html b/docs/RTOS2/html/rtos_revisionHistory.html
index bde1a04..a0246b0 100644
--- a/docs/RTOS2/html/rtos_revisionHistory.html
+++ b/docs/RTOS2/html/rtos_revisionHistory.html
@@ -180,6 +180,20 @@
 <tr>
 <th>Version </th><th>Description  </th></tr>
 <tr>
+<td>V5.5.1 </td><td><ul>
+<li>Fixed osMutexRelease issue (thread owning multiple mutexes).</li>
+<li>Improved osThreadJoin robustness (user programing errors).   </li>
+</ul>
+</td></tr>
+<tr>
+<td>V5.5.0 </td><td><ul>
+<li>Updated and enhanced generated events (reorganized components).</li>
+<li>Updated configuration (Event Recorder).</li>
+<li>Updated Component Viewer (improved performance).</li>
+<li>Minor code optimizations.   </li>
+</ul>
+</td></tr>
+<tr>
 <td>V5.4.0 </td><td><ul>
 <li>Based on CMSIS-RTOS API V2.1.3.</li>
 <li>Added support for Event Recorder initialization and filter setup.</li>
@@ -253,7 +267,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/RTOS2/html/rtx5_impl.html b/docs/RTOS2/html/rtx5_impl.html
index de1d804..bd03fbd 100644
--- a/docs/RTOS2/html/rtx5_impl.html
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@@ -127,7 +127,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/rtx5_impl.js b/docs/RTOS2/html/rtx5_impl.js
index 2fa6c97..cc50948 100644
--- a/docs/RTOS2/html/rtx5_impl.js
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@@ -21,7 +21,8 @@
       ] ],
       [ "RTX5 Header File", "theory_of_operation.html#rtx_os_h", null ],
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-      [ "Calls from Interrupt Service Routines", "theory_of_operation.html#CMSIS_RTOS_ISR_Calls", null ]
+      [ "Calls from Interrupt Service Routines", "theory_of_operation.html#CMSIS_RTOS_ISR_Calls", null ],
+      [ "SVC Functions", "theory_of_operation.html#CMSIS_RTOS_svcFunctions", null ]
     ] ],
     [ "Configure RTX v5", "config_rtx5.html", [
       [ "System Configuration", "config_rtx5.html#systemConfig", [
diff --git a/docs/RTOS2/html/rtx__evr_8h.html b/docs/RTOS2/html/rtx__evr_8h.html
index d34903a..9fdf190 100644
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@@ -117,6 +117,10 @@
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
 Macros</h2></td></tr>
+<tr class="memitem:a8e1abf0403e5aabff14bffa28c0bf14b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__evr_8h.html#a8e1abf0403e5aabff14bffa28c0bf14b">OS_EVR_THFLAGS</a>&#160;&#160;&#160;OS_EVR_THREAD</td></tr>
+<tr class="separator:a8e1abf0403e5aabff14bffa28c0bf14b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:aad9052994e484a85e2ea7c34b3957f29"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__evr_8h.html#aad9052994e484a85e2ea7c34b3957f29">OS_EVR_WAIT</a>&#160;&#160;&#160;OS_EVR_THREAD</td></tr>
+<tr class="separator:aad9052994e484a85e2ea7c34b3957f29"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a168269d3a1264ac7a7427f8642e358a4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__evr_8h.html#a168269d3a1264ac7a7427f8642e358a4">osRtxErrorKernelNotReady</a>&#160;&#160;&#160;(-7)</td></tr>
 <tr class="memdesc:a168269d3a1264ac7a7427f8642e358a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Extended Status codes.  <a href="#a168269d3a1264ac7a7427f8642e358a4">More...</a><br/></td></tr>
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 <tr class="memdesc:ga4c2a175b79d39d70a4a5112e270d03f2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on RTOS kernel information retrieve (API)  <a href="group__rtx__evr__kernel.html#ga4c2a175b79d39d70a4a5112e270d03f2">More...</a><br/></td></tr>
 <tr class="separator:ga4c2a175b79d39d70a4a5112e270d03f2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf09b8cd94ad2384e3ab518f0df94a651"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__kernel.html#gaf09b8cd94ad2384e3ab518f0df94a651">EvrRtxKernelInfoRetrieved</a> (<a class="el" href="group__CMSIS__RTOS__KernelCtrl.html#structosVersion__t">osVersion_t</a> *version, char *id_buf)</td></tr>
-<tr class="memdesc:gaf09b8cd94ad2384e3ab518f0df94a651"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful RTOS kernel information retrieve (Op)  <a href="group__rtx__evr__kernel.html#gaf09b8cd94ad2384e3ab518f0df94a651">More...</a><br/></td></tr>
-<tr class="separator:gaf09b8cd94ad2384e3ab518f0df94a651"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga85f9569d363a9a8f9677041405d0935f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__kernel.html#ga85f9569d363a9a8f9677041405d0935f">EvrRtxKernelInfoRetrieved</a> (const <a class="el" href="group__CMSIS__RTOS__KernelCtrl.html#structosVersion__t">osVersion_t</a> *version, const char *id_buf, uint32_t id_size)</td></tr>
+<tr class="memdesc:ga85f9569d363a9a8f9677041405d0935f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful RTOS kernel information retrieve (Op)  <a href="group__rtx__evr__kernel.html#ga85f9569d363a9a8f9677041405d0935f">More...</a><br/></td></tr>
+<tr class="separator:ga85f9569d363a9a8f9677041405d0935f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gad6407e9ff0910629b041866bd801075a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__kernel.html#gad6407e9ff0910629b041866bd801075a">EvrRtxKernelGetState</a> (<a class="el" href="group__CMSIS__RTOS__KernelCtrl.html#ga08326469274b668140ca934b168a5ad4">osKernelState_t</a> state)</td></tr>
 <tr class="memdesc:gad6407e9ff0910629b041866bd801075a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on current RTOS Kernel state retrieve (API)  <a href="group__rtx__evr__kernel.html#gad6407e9ff0910629b041866bd801075a">More...</a><br/></td></tr>
 <tr class="separator:gad6407e9ff0910629b041866bd801075a"><td class="memSeparator" colspan="2">&#160;</td></tr>
@@ -264,6 +268,9 @@
 <tr class="memitem:gabf4a015bd3fb2a33c0d105a871aaba72"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#gabf4a015bd3fb2a33c0d105a871aaba72">EvrRtxThreadSetPriority</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id, <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gad4e3e0971b41f2d17584a8c6837342ec">osPriority_t</a> priority)</td></tr>
 <tr class="memdesc:gabf4a015bd3fb2a33c0d105a871aaba72"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread priority set (API)  <a href="group__rtx__evr__thread.html#gabf4a015bd3fb2a33c0d105a871aaba72">More...</a><br/></td></tr>
 <tr class="separator:gabf4a015bd3fb2a33c0d105a871aaba72"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga831b3e64d459a325fbc13033caa39f05"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#ga831b3e64d459a325fbc13033caa39f05">EvrRtxThreadPriorityUpdated</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id, <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gad4e3e0971b41f2d17584a8c6837342ec">osPriority_t</a> priority)</td></tr>
+<tr class="memdesc:ga831b3e64d459a325fbc13033caa39f05"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread priority updated (Op)  <a href="group__rtx__evr__thread.html#ga831b3e64d459a325fbc13033caa39f05">More...</a><br/></td></tr>
+<tr class="separator:ga831b3e64d459a325fbc13033caa39f05"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gada73306deca99987b104aa9840fdd4e2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#gada73306deca99987b104aa9840fdd4e2">EvrRtxThreadGetPriority</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id, <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gad4e3e0971b41f2d17584a8c6837342ec">osPriority_t</a> priority)</td></tr>
 <tr class="memdesc:gada73306deca99987b104aa9840fdd4e2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread priority retrieve (API)  <a href="group__rtx__evr__thread.html#gada73306deca99987b104aa9840fdd4e2">More...</a><br/></td></tr>
 <tr class="separator:gada73306deca99987b104aa9840fdd4e2"><td class="memSeparator" colspan="2">&#160;</td></tr>
@@ -298,13 +305,13 @@
 <tr class="memdesc:ga86ac910ac88d8fe54206a12d7ed69a27"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful thread join (Op)  <a href="group__rtx__evr__thread.html#ga86ac910ac88d8fe54206a12d7ed69a27">More...</a><br/></td></tr>
 <tr class="separator:ga86ac910ac88d8fe54206a12d7ed69a27"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gab9efd66ed2edb439c5081806c9b63cf9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#gab9efd66ed2edb439c5081806c9b63cf9">EvrRtxThreadBlocked</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id, uint32_t timeout)</td></tr>
-<tr class="memdesc:gab9efd66ed2edb439c5081806c9b63cf9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread execution block (Op)  <a href="group__rtx__evr__thread.html#gab9efd66ed2edb439c5081806c9b63cf9">More...</a><br/></td></tr>
+<tr class="memdesc:gab9efd66ed2edb439c5081806c9b63cf9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread execution block (Detail)  <a href="group__rtx__evr__thread.html#gab9efd66ed2edb439c5081806c9b63cf9">More...</a><br/></td></tr>
 <tr class="separator:gab9efd66ed2edb439c5081806c9b63cf9"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga3faae4d941ddecfe773ef9f3efe8b901"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#ga3faae4d941ddecfe773ef9f3efe8b901">EvrRtxThreadUnblocked</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id, uint32_t ret_val)</td></tr>
-<tr class="memdesc:ga3faae4d941ddecfe773ef9f3efe8b901"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread execution unblock (Op)  <a href="group__rtx__evr__thread.html#ga3faae4d941ddecfe773ef9f3efe8b901">More...</a><br/></td></tr>
+<tr class="memdesc:ga3faae4d941ddecfe773ef9f3efe8b901"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread execution unblock (Detail)  <a href="group__rtx__evr__thread.html#ga3faae4d941ddecfe773ef9f3efe8b901">More...</a><br/></td></tr>
 <tr class="separator:ga3faae4d941ddecfe773ef9f3efe8b901"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gabe470d5bb1373c59c51470fd20b55bcb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#gabe470d5bb1373c59c51470fd20b55bcb">EvrRtxThreadPreempted</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id)</td></tr>
-<tr class="memdesc:gabe470d5bb1373c59c51470fd20b55bcb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on running thread pre-emption (Op)  <a href="group__rtx__evr__thread.html#gabe470d5bb1373c59c51470fd20b55bcb">More...</a><br/></td></tr>
+<tr class="memdesc:gabe470d5bb1373c59c51470fd20b55bcb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on running thread pre-emption (Detail)  <a href="group__rtx__evr__thread.html#gabe470d5bb1373c59c51470fd20b55bcb">More...</a><br/></td></tr>
 <tr class="separator:gabe470d5bb1373c59c51470fd20b55bcb"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gae3bc50d5f154463c7f6647544bb5ecab"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#gae3bc50d5f154463c7f6647544bb5ecab">EvrRtxThreadSwitched</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id)</td></tr>
 <tr class="memdesc:gae3bc50d5f154463c7f6647544bb5ecab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on running thread switch (Op)  <a href="group__rtx__evr__thread.html#gae3bc50d5f154463c7f6647544bb5ecab">More...</a><br/></td></tr>
@@ -324,45 +331,57 @@
 <tr class="memitem:ga1999d77992b03347abdca7ec17f91cca"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#ga1999d77992b03347abdca7ec17f91cca">EvrRtxThreadEnumerate</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> *thread_array, uint32_t array_items, uint32_t count)</td></tr>
 <tr class="memdesc:ga1999d77992b03347abdca7ec17f91cca"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on active threads enumerate (API)  <a href="group__rtx__evr__thread.html#ga1999d77992b03347abdca7ec17f91cca">More...</a><br/></td></tr>
 <tr class="separator:ga1999d77992b03347abdca7ec17f91cca"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ac356c777af86c2d8d9250cbffc516e1d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__evr_8h.html#ac356c777af86c2d8d9250cbffc516e1d">EvrRtxThreadFlagsSet</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id, uint32_t flags)</td></tr>
-<tr class="memdesc:ac356c777af86c2d8d9250cbffc516e1d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread flags set (API)  <a href="#ac356c777af86c2d8d9250cbffc516e1d">More...</a><br/></td></tr>
-<tr class="separator:ac356c777af86c2d8d9250cbffc516e1d"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:abd447773c02e235a8d0bb96dd9bb1c4f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__evr_8h.html#abd447773c02e235a8d0bb96dd9bb1c4f">EvrRtxThreadFlagsSetDone</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id, uint32_t thread_flags)</td></tr>
-<tr class="memdesc:abd447773c02e235a8d0bb96dd9bb1c4f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful thread flags set (Op)  <a href="#abd447773c02e235a8d0bb96dd9bb1c4f">More...</a><br/></td></tr>
-<tr class="separator:abd447773c02e235a8d0bb96dd9bb1c4f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ac8ddc747c72f7fc5cfa58edcee56b82d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__evr_8h.html#ac8ddc747c72f7fc5cfa58edcee56b82d">EvrRtxThreadFlagsClear</a> (uint32_t flags)</td></tr>
-<tr class="memdesc:ac8ddc747c72f7fc5cfa58edcee56b82d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread flags clear (API)  <a href="#ac8ddc747c72f7fc5cfa58edcee56b82d">More...</a><br/></td></tr>
-<tr class="separator:ac8ddc747c72f7fc5cfa58edcee56b82d"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:aad13b17507cc07a4a1e37a5653489943"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__evr_8h.html#aad13b17507cc07a4a1e37a5653489943">EvrRtxThreadFlagsClearDone</a> (uint32_t thread_flags)</td></tr>
-<tr class="memdesc:aad13b17507cc07a4a1e37a5653489943"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful thread flags clear (Op)  <a href="#aad13b17507cc07a4a1e37a5653489943">More...</a><br/></td></tr>
-<tr class="separator:aad13b17507cc07a4a1e37a5653489943"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:aab1a30a0ac3dfa588ededbfad52bae30"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__evr_8h.html#aab1a30a0ac3dfa588ededbfad52bae30">EvrRtxThreadFlagsGet</a> (uint32_t thread_flags)</td></tr>
-<tr class="memdesc:aab1a30a0ac3dfa588ededbfad52bae30"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread flags retrieve (API)  <a href="#aab1a30a0ac3dfa588ededbfad52bae30">More...</a><br/></td></tr>
-<tr class="separator:aab1a30a0ac3dfa588ededbfad52bae30"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:aad860c571b9b083ff2889fb76fb619f1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__evr_8h.html#aad860c571b9b083ff2889fb76fb619f1">EvrRtxThreadFlagsWait</a> (uint32_t flags, uint32_t options, uint32_t timeout)</td></tr>
-<tr class="memdesc:aad860c571b9b083ff2889fb76fb619f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on wait for thread flags (API)  <a href="#aad860c571b9b083ff2889fb76fb619f1">More...</a><br/></td></tr>
-<tr class="separator:aad860c571b9b083ff2889fb76fb619f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ad09ec9317a4440e5228870b750e9860e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__evr_8h.html#ad09ec9317a4440e5228870b750e9860e">EvrRtxThreadFlagsWaitPending</a> (uint32_t flags, uint32_t options, uint32_t timeout)</td></tr>
-<tr class="memdesc:ad09ec9317a4440e5228870b750e9860e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on pending wait for thread flags (Op)  <a href="#ad09ec9317a4440e5228870b750e9860e">More...</a><br/></td></tr>
-<tr class="separator:ad09ec9317a4440e5228870b750e9860e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gadbbee398f4fab418c9b8115fc7392ff8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#gadbbee398f4fab418c9b8115fc7392ff8">EvrRtxThreadFlagsWaitTimeout</a> (void)</td></tr>
-<tr class="memdesc:gadbbee398f4fab418c9b8115fc7392ff8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on wait timeout for thread flags (Op)  <a href="group__rtx__evr__thread.html#gadbbee398f4fab418c9b8115fc7392ff8">More...</a><br/></td></tr>
-<tr class="separator:gadbbee398f4fab418c9b8115fc7392ff8"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a01396074495b21270c75185f63c497d7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__evr_8h.html#a01396074495b21270c75185f63c497d7">EvrRtxThreadFlagsWaitCompleted</a> (uint32_t flags, uint32_t options, uint32_t thread_flags)</td></tr>
-<tr class="memdesc:a01396074495b21270c75185f63c497d7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful wait for thread flags (Op)  <a href="#a01396074495b21270c75185f63c497d7">More...</a><br/></td></tr>
-<tr class="separator:a01396074495b21270c75185f63c497d7"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:adf6b9f4882f62a65b4e06e1b3e5c9c5b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__evr_8h.html#adf6b9f4882f62a65b4e06e1b3e5c9c5b">EvrRtxThreadFlagsWaitNotCompleted</a> (uint32_t flags, uint32_t options)</td></tr>
-<tr class="memdesc:adf6b9f4882f62a65b4e06e1b3e5c9c5b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on unsuccessful wait for thread flags (Op)  <a href="#adf6b9f4882f62a65b4e06e1b3e5c9c5b">More...</a><br/></td></tr>
-<tr class="separator:adf6b9f4882f62a65b4e06e1b3e5c9c5b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gadd45d32305aa45668a36f2c9f0f4c758"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#gadd45d32305aa45668a36f2c9f0f4c758">EvrRtxThreadDelay</a> (uint32_t ticks)</td></tr>
-<tr class="memdesc:gadd45d32305aa45668a36f2c9f0f4c758"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on wait for timeout (API)  <a href="group__rtx__evr__thread.html#gadd45d32305aa45668a36f2c9f0f4c758">More...</a><br/></td></tr>
-<tr class="separator:gadd45d32305aa45668a36f2c9f0f4c758"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf59defd6c171d2c3d3508e7136278db2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#gaf59defd6c171d2c3d3508e7136278db2">EvrRtxThreadDelayUntil</a> (uint32_t ticks)</td></tr>
-<tr class="memdesc:gaf59defd6c171d2c3d3508e7136278db2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on wait until specified time (API)  <a href="group__rtx__evr__thread.html#gaf59defd6c171d2c3d3508e7136278db2">More...</a><br/></td></tr>
-<tr class="separator:gaf59defd6c171d2c3d3508e7136278db2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab46562848142ce5ea806d629fd000168"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread.html#gab46562848142ce5ea806d629fd000168">EvrRtxThreadDelayCompleted</a> (void)</td></tr>
-<tr class="memdesc:gab46562848142ce5ea806d629fd000168"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on completed wait (Op)  <a href="group__rtx__evr__thread.html#gab46562848142ce5ea806d629fd000168">More...</a><br/></td></tr>
-<tr class="separator:gab46562848142ce5ea806d629fd000168"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad3609bfc41e1bee23b41973281096ed6"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread__flags.html#gad3609bfc41e1bee23b41973281096ed6">EvrRtxThreadFlagsError</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id, int32_t status)</td></tr>
+<tr class="memdesc:gad3609bfc41e1bee23b41973281096ed6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread flags error (Error)  <a href="group__rtx__evr__thread__flags.html#gad3609bfc41e1bee23b41973281096ed6">More...</a><br/></td></tr>
+<tr class="separator:gad3609bfc41e1bee23b41973281096ed6"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac356c777af86c2d8d9250cbffc516e1d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread__flags.html#gac356c777af86c2d8d9250cbffc516e1d">EvrRtxThreadFlagsSet</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id, uint32_t flags)</td></tr>
+<tr class="memdesc:gac356c777af86c2d8d9250cbffc516e1d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread flags set (API)  <a href="group__rtx__evr__thread__flags.html#gac356c777af86c2d8d9250cbffc516e1d">More...</a><br/></td></tr>
+<tr class="separator:gac356c777af86c2d8d9250cbffc516e1d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gabd447773c02e235a8d0bb96dd9bb1c4f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread__flags.html#gabd447773c02e235a8d0bb96dd9bb1c4f">EvrRtxThreadFlagsSetDone</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id, uint32_t thread_flags)</td></tr>
+<tr class="memdesc:gabd447773c02e235a8d0bb96dd9bb1c4f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful thread flags set (Op)  <a href="group__rtx__evr__thread__flags.html#gabd447773c02e235a8d0bb96dd9bb1c4f">More...</a><br/></td></tr>
+<tr class="separator:gabd447773c02e235a8d0bb96dd9bb1c4f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac8ddc747c72f7fc5cfa58edcee56b82d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread__flags.html#gac8ddc747c72f7fc5cfa58edcee56b82d">EvrRtxThreadFlagsClear</a> (uint32_t flags)</td></tr>
+<tr class="memdesc:gac8ddc747c72f7fc5cfa58edcee56b82d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread flags clear (API)  <a href="group__rtx__evr__thread__flags.html#gac8ddc747c72f7fc5cfa58edcee56b82d">More...</a><br/></td></tr>
+<tr class="separator:gac8ddc747c72f7fc5cfa58edcee56b82d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaad13b17507cc07a4a1e37a5653489943"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread__flags.html#gaad13b17507cc07a4a1e37a5653489943">EvrRtxThreadFlagsClearDone</a> (uint32_t thread_flags)</td></tr>
+<tr class="memdesc:gaad13b17507cc07a4a1e37a5653489943"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful thread flags clear (Op)  <a href="group__rtx__evr__thread__flags.html#gaad13b17507cc07a4a1e37a5653489943">More...</a><br/></td></tr>
+<tr class="separator:gaad13b17507cc07a4a1e37a5653489943"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaab1a30a0ac3dfa588ededbfad52bae30"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread__flags.html#gaab1a30a0ac3dfa588ededbfad52bae30">EvrRtxThreadFlagsGet</a> (uint32_t thread_flags)</td></tr>
+<tr class="memdesc:gaab1a30a0ac3dfa588ededbfad52bae30"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on thread flags retrieve (API)  <a href="group__rtx__evr__thread__flags.html#gaab1a30a0ac3dfa588ededbfad52bae30">More...</a><br/></td></tr>
+<tr class="separator:gaab1a30a0ac3dfa588ededbfad52bae30"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaad860c571b9b083ff2889fb76fb619f1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread__flags.html#gaad860c571b9b083ff2889fb76fb619f1">EvrRtxThreadFlagsWait</a> (uint32_t flags, uint32_t options, uint32_t timeout)</td></tr>
+<tr class="memdesc:gaad860c571b9b083ff2889fb76fb619f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on wait for thread flags (API)  <a href="group__rtx__evr__thread__flags.html#gaad860c571b9b083ff2889fb76fb619f1">More...</a><br/></td></tr>
+<tr class="separator:gaad860c571b9b083ff2889fb76fb619f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad09ec9317a4440e5228870b750e9860e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread__flags.html#gad09ec9317a4440e5228870b750e9860e">EvrRtxThreadFlagsWaitPending</a> (uint32_t flags, uint32_t options, uint32_t timeout)</td></tr>
+<tr class="memdesc:gad09ec9317a4440e5228870b750e9860e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on pending wait for thread flags (Op)  <a href="group__rtx__evr__thread__flags.html#gad09ec9317a4440e5228870b750e9860e">More...</a><br/></td></tr>
+<tr class="separator:gad09ec9317a4440e5228870b750e9860e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gae45ec48e082608d2ba72ce7c695899c6"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread__flags.html#gae45ec48e082608d2ba72ce7c695899c6">EvrRtxThreadFlagsWaitTimeout</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id)</td></tr>
+<tr class="memdesc:gae45ec48e082608d2ba72ce7c695899c6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on wait timeout for thread flags (Op)  <a href="group__rtx__evr__thread__flags.html#gae45ec48e082608d2ba72ce7c695899c6">More...</a><br/></td></tr>
+<tr class="separator:gae45ec48e082608d2ba72ce7c695899c6"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5e00be70234d0ca3b0d4d99fb58295bc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread__flags.html#ga5e00be70234d0ca3b0d4d99fb58295bc">EvrRtxThreadFlagsWaitCompleted</a> (uint32_t flags, uint32_t options, uint32_t thread_flags, <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id)</td></tr>
+<tr class="memdesc:ga5e00be70234d0ca3b0d4d99fb58295bc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful wait for thread flags (Op)  <a href="group__rtx__evr__thread__flags.html#ga5e00be70234d0ca3b0d4d99fb58295bc">More...</a><br/></td></tr>
+<tr class="separator:ga5e00be70234d0ca3b0d4d99fb58295bc"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gadf6b9f4882f62a65b4e06e1b3e5c9c5b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__thread__flags.html#gadf6b9f4882f62a65b4e06e1b3e5c9c5b">EvrRtxThreadFlagsWaitNotCompleted</a> (uint32_t flags, uint32_t options)</td></tr>
+<tr class="memdesc:gadf6b9f4882f62a65b4e06e1b3e5c9c5b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on unsuccessful wait for thread flags (Op)  <a href="group__rtx__evr__thread__flags.html#gadf6b9f4882f62a65b4e06e1b3e5c9c5b">More...</a><br/></td></tr>
+<tr class="separator:gadf6b9f4882f62a65b4e06e1b3e5c9c5b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9ca2a1f7c2231057dcdb9df400284c0a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__wait.html#ga9ca2a1f7c2231057dcdb9df400284c0a">EvrRtxDelayError</a> (int32_t status)</td></tr>
+<tr class="memdesc:ga9ca2a1f7c2231057dcdb9df400284c0a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on delay error (Error)  <a href="group__rtx__evr__wait.html#ga9ca2a1f7c2231057dcdb9df400284c0a">More...</a><br/></td></tr>
+<tr class="separator:ga9ca2a1f7c2231057dcdb9df400284c0a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaec642f6e093f6c1c9b9d7609c4b0d174"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__wait.html#gaec642f6e093f6c1c9b9d7609c4b0d174">EvrRtxDelay</a> (uint32_t ticks)</td></tr>
+<tr class="memdesc:gaec642f6e093f6c1c9b9d7609c4b0d174"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on delay for specified time (API)  <a href="group__rtx__evr__wait.html#gaec642f6e093f6c1c9b9d7609c4b0d174">More...</a><br/></td></tr>
+<tr class="separator:gaec642f6e093f6c1c9b9d7609c4b0d174"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga16728292de4e2665248693fff603a2c3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__wait.html#ga16728292de4e2665248693fff603a2c3">EvrRtxDelayUntil</a> (uint32_t ticks)</td></tr>
+<tr class="memdesc:ga16728292de4e2665248693fff603a2c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on delay until specified time (API)  <a href="group__rtx__evr__wait.html#ga16728292de4e2665248693fff603a2c3">More...</a><br/></td></tr>
+<tr class="separator:ga16728292de4e2665248693fff603a2c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gad489decd779491c1f247214e541cd4e8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__wait.html#gad489decd779491c1f247214e541cd4e8">EvrRtxDelayStarted</a> (uint32_t ticks)</td></tr>
+<tr class="memdesc:gad489decd779491c1f247214e541cd4e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on delay started (Op)  <a href="group__rtx__evr__wait.html#gad489decd779491c1f247214e541cd4e8">More...</a><br/></td></tr>
+<tr class="separator:gad489decd779491c1f247214e541cd4e8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga46ffa7cb290130a3b0d10dbd6c3faddd"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__wait.html#ga46ffa7cb290130a3b0d10dbd6c3faddd">EvrRtxDelayUntilStarted</a> (uint32_t ticks)</td></tr>
+<tr class="memdesc:ga46ffa7cb290130a3b0d10dbd6c3faddd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on delay until specified time started (Op)  <a href="group__rtx__evr__wait.html#ga46ffa7cb290130a3b0d10dbd6c3faddd">More...</a><br/></td></tr>
+<tr class="separator:ga46ffa7cb290130a3b0d10dbd6c3faddd"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gaff18b7b13dc1fe87d1c9d3b23ed55208"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__wait.html#gaff18b7b13dc1fe87d1c9d3b23ed55208">EvrRtxDelayCompleted</a> (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a> thread_id)</td></tr>
+<tr class="memdesc:gaff18b7b13dc1fe87d1c9d3b23ed55208"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on delay completed (Op)  <a href="group__rtx__evr__wait.html#gaff18b7b13dc1fe87d1c9d3b23ed55208">More...</a><br/></td></tr>
+<tr class="separator:gaff18b7b13dc1fe87d1c9d3b23ed55208"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gaf1b516bf697288e67fe797662b1873b0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__timer.html#gaf1b516bf697288e67fe797662b1873b0">EvrRtxTimerError</a> (<a class="el" href="group__CMSIS__RTOS__TimerMgmt.html#gaad5409379689ee27bb0a0b56ea4a4b34">osTimerId_t</a> timer_id, int32_t status)</td></tr>
 <tr class="memdesc:gaf1b516bf697288e67fe797662b1873b0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on timer error (Error)  <a href="group__rtx__evr__timer.html#gaf1b516bf697288e67fe797662b1873b0">More...</a><br/></td></tr>
 <tr class="separator:gaf1b516bf697288e67fe797662b1873b0"><td class="memSeparator" colspan="2">&#160;</td></tr>
@@ -399,53 +418,53 @@
 <tr class="memitem:ga474f3bd3ed38945b087f37fd709560b7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__timer.html#ga474f3bd3ed38945b087f37fd709560b7">EvrRtxTimerDestroyed</a> (<a class="el" href="group__CMSIS__RTOS__TimerMgmt.html#gaad5409379689ee27bb0a0b56ea4a4b34">osTimerId_t</a> timer_id)</td></tr>
 <tr class="memdesc:ga474f3bd3ed38945b087f37fd709560b7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful timer delete (Op)  <a href="group__rtx__evr__timer.html#ga474f3bd3ed38945b087f37fd709560b7">More...</a><br/></td></tr>
 <tr class="separator:ga474f3bd3ed38945b087f37fd709560b7"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaa281b7380c0fa725faa722badbeb2e5f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flasg.html#gaa281b7380c0fa725faa722badbeb2e5f">EvrRtxEventFlagsError</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, int32_t status)</td></tr>
-<tr class="memdesc:gaa281b7380c0fa725faa722badbeb2e5f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on event flags error (Error)  <a href="group__rtx__evr__event__flasg.html#gaa281b7380c0fa725faa722badbeb2e5f">More...</a><br/></td></tr>
+<tr class="memitem:gaa281b7380c0fa725faa722badbeb2e5f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#gaa281b7380c0fa725faa722badbeb2e5f">EvrRtxEventFlagsError</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, int32_t status)</td></tr>
+<tr class="memdesc:gaa281b7380c0fa725faa722badbeb2e5f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on event flags error (Error)  <a href="group__rtx__evr__event__flags.html#gaa281b7380c0fa725faa722badbeb2e5f">More...</a><br/></td></tr>
 <tr class="separator:gaa281b7380c0fa725faa722badbeb2e5f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gae798cdc4cb10ada732e592318037cba7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flasg.html#gae798cdc4cb10ada732e592318037cba7">EvrRtxEventFlagsNew</a> (const <a class="el" href="group__CMSIS__RTOS__EventFlags.html#structosEventFlagsAttr__t">osEventFlagsAttr_t</a> *attr)</td></tr>
-<tr class="memdesc:gae798cdc4cb10ada732e592318037cba7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on event flags create and initialize (API)  <a href="group__rtx__evr__event__flasg.html#gae798cdc4cb10ada732e592318037cba7">More...</a><br/></td></tr>
+<tr class="memitem:gae798cdc4cb10ada732e592318037cba7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#gae798cdc4cb10ada732e592318037cba7">EvrRtxEventFlagsNew</a> (const <a class="el" href="group__CMSIS__RTOS__EventFlags.html#structosEventFlagsAttr__t">osEventFlagsAttr_t</a> *attr)</td></tr>
+<tr class="memdesc:gae798cdc4cb10ada732e592318037cba7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on event flags create and initialize (API)  <a href="group__rtx__evr__event__flags.html#gae798cdc4cb10ada732e592318037cba7">More...</a><br/></td></tr>
 <tr class="separator:gae798cdc4cb10ada732e592318037cba7"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaa1f48b9787e3a7d4f56449ed1dd12f26"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flasg.html#gaa1f48b9787e3a7d4f56449ed1dd12f26">EvrRtxEventFlagsCreated</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, const char *name)</td></tr>
-<tr class="memdesc:gaa1f48b9787e3a7d4f56449ed1dd12f26"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful event flags create (Op)  <a href="group__rtx__evr__event__flasg.html#gaa1f48b9787e3a7d4f56449ed1dd12f26">More...</a><br/></td></tr>
+<tr class="memitem:gaa1f48b9787e3a7d4f56449ed1dd12f26"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#gaa1f48b9787e3a7d4f56449ed1dd12f26">EvrRtxEventFlagsCreated</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, const char *name)</td></tr>
+<tr class="memdesc:gaa1f48b9787e3a7d4f56449ed1dd12f26"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful event flags create (Op)  <a href="group__rtx__evr__event__flags.html#gaa1f48b9787e3a7d4f56449ed1dd12f26">More...</a><br/></td></tr>
 <tr class="separator:gaa1f48b9787e3a7d4f56449ed1dd12f26"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gae9ebcbc09a1c15c719d95fe7b8c2ee18"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flasg.html#gae9ebcbc09a1c15c719d95fe7b8c2ee18">EvrRtxEventFlagsGetName</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, const char *name)</td></tr>
-<tr class="memdesc:gae9ebcbc09a1c15c719d95fe7b8c2ee18"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on event flags name retrieve (API)  <a href="group__rtx__evr__event__flasg.html#gae9ebcbc09a1c15c719d95fe7b8c2ee18">More...</a><br/></td></tr>
+<tr class="memitem:gae9ebcbc09a1c15c719d95fe7b8c2ee18"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#gae9ebcbc09a1c15c719d95fe7b8c2ee18">EvrRtxEventFlagsGetName</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, const char *name)</td></tr>
+<tr class="memdesc:gae9ebcbc09a1c15c719d95fe7b8c2ee18"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on event flags name retrieve (API)  <a href="group__rtx__evr__event__flags.html#gae9ebcbc09a1c15c719d95fe7b8c2ee18">More...</a><br/></td></tr>
 <tr class="separator:gae9ebcbc09a1c15c719d95fe7b8c2ee18"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a5e5c9bd8a0522fc9301782edd6e5ec1f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__evr_8h.html#a5e5c9bd8a0522fc9301782edd6e5ec1f">EvrRtxEventFlagsSet</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t flags)</td></tr>
-<tr class="memdesc:a5e5c9bd8a0522fc9301782edd6e5ec1f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on event flags set (API)  <a href="#a5e5c9bd8a0522fc9301782edd6e5ec1f">More...</a><br/></td></tr>
-<tr class="separator:a5e5c9bd8a0522fc9301782edd6e5ec1f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a5b1b471923918ad294d16255d43ab306"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__evr_8h.html#a5b1b471923918ad294d16255d43ab306">EvrRtxEventFlagsSetDone</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t event_flags)</td></tr>
-<tr class="memdesc:a5b1b471923918ad294d16255d43ab306"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful event flags set (Op)  <a href="#a5b1b471923918ad294d16255d43ab306">More...</a><br/></td></tr>
-<tr class="separator:a5b1b471923918ad294d16255d43ab306"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ab31f9da565b0170d8e89edf0e848f28b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__evr_8h.html#ab31f9da565b0170d8e89edf0e848f28b">EvrRtxEventFlagsClear</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t flags)</td></tr>
-<tr class="memdesc:ab31f9da565b0170d8e89edf0e848f28b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on event flags clear (API)  <a href="#ab31f9da565b0170d8e89edf0e848f28b">More...</a><br/></td></tr>
-<tr class="separator:ab31f9da565b0170d8e89edf0e848f28b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a9e4c4e5d45bc721439c1919621a49d5a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__evr_8h.html#a9e4c4e5d45bc721439c1919621a49d5a">EvrRtxEventFlagsClearDone</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t event_flags)</td></tr>
-<tr class="memdesc:a9e4c4e5d45bc721439c1919621a49d5a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful event flags clear (Op)  <a href="#a9e4c4e5d45bc721439c1919621a49d5a">More...</a><br/></td></tr>
-<tr class="separator:a9e4c4e5d45bc721439c1919621a49d5a"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a113c32ff195c612ec2fb6a9dd5740184"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__evr_8h.html#a113c32ff195c612ec2fb6a9dd5740184">EvrRtxEventFlagsGet</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t event_flags)</td></tr>
-<tr class="memdesc:a113c32ff195c612ec2fb6a9dd5740184"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on event flags retrieve (API)  <a href="#a113c32ff195c612ec2fb6a9dd5740184">More...</a><br/></td></tr>
-<tr class="separator:a113c32ff195c612ec2fb6a9dd5740184"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ac8361874ffdd854e3778f21d070fed24"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__evr_8h.html#ac8361874ffdd854e3778f21d070fed24">EvrRtxEventFlagsWait</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t flags, uint32_t options, uint32_t timeout)</td></tr>
-<tr class="memdesc:ac8361874ffdd854e3778f21d070fed24"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on wait for event flags (API)  <a href="#ac8361874ffdd854e3778f21d070fed24">More...</a><br/></td></tr>
-<tr class="separator:ac8361874ffdd854e3778f21d070fed24"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:afd598e0b02a31083fb41626d68fa489e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__evr_8h.html#afd598e0b02a31083fb41626d68fa489e">EvrRtxEventFlagsWaitPending</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t flags, uint32_t options, uint32_t timeout)</td></tr>
-<tr class="memdesc:afd598e0b02a31083fb41626d68fa489e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on pending wait for event flags (Op)  <a href="#afd598e0b02a31083fb41626d68fa489e">More...</a><br/></td></tr>
-<tr class="separator:afd598e0b02a31083fb41626d68fa489e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga877235cbe04188b831b70a3c2237c827"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flasg.html#ga877235cbe04188b831b70a3c2237c827">EvrRtxEventFlagsWaitTimeout</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id)</td></tr>
-<tr class="memdesc:ga877235cbe04188b831b70a3c2237c827"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on wait timeout for event flags (Op)  <a href="group__rtx__evr__event__flasg.html#ga877235cbe04188b831b70a3c2237c827">More...</a><br/></td></tr>
+<tr class="memitem:ga5e5c9bd8a0522fc9301782edd6e5ec1f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#ga5e5c9bd8a0522fc9301782edd6e5ec1f">EvrRtxEventFlagsSet</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t flags)</td></tr>
+<tr class="memdesc:ga5e5c9bd8a0522fc9301782edd6e5ec1f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on event flags set (API)  <a href="group__rtx__evr__event__flags.html#ga5e5c9bd8a0522fc9301782edd6e5ec1f">More...</a><br/></td></tr>
+<tr class="separator:ga5e5c9bd8a0522fc9301782edd6e5ec1f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga5b1b471923918ad294d16255d43ab306"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#ga5b1b471923918ad294d16255d43ab306">EvrRtxEventFlagsSetDone</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t event_flags)</td></tr>
+<tr class="memdesc:ga5b1b471923918ad294d16255d43ab306"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful event flags set (Op)  <a href="group__rtx__evr__event__flags.html#ga5b1b471923918ad294d16255d43ab306">More...</a><br/></td></tr>
+<tr class="separator:ga5b1b471923918ad294d16255d43ab306"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gab31f9da565b0170d8e89edf0e848f28b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#gab31f9da565b0170d8e89edf0e848f28b">EvrRtxEventFlagsClear</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t flags)</td></tr>
+<tr class="memdesc:gab31f9da565b0170d8e89edf0e848f28b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on event flags clear (API)  <a href="group__rtx__evr__event__flags.html#gab31f9da565b0170d8e89edf0e848f28b">More...</a><br/></td></tr>
+<tr class="separator:gab31f9da565b0170d8e89edf0e848f28b"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga9e4c4e5d45bc721439c1919621a49d5a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#ga9e4c4e5d45bc721439c1919621a49d5a">EvrRtxEventFlagsClearDone</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t event_flags)</td></tr>
+<tr class="memdesc:ga9e4c4e5d45bc721439c1919621a49d5a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful event flags clear (Op)  <a href="group__rtx__evr__event__flags.html#ga9e4c4e5d45bc721439c1919621a49d5a">More...</a><br/></td></tr>
+<tr class="separator:ga9e4c4e5d45bc721439c1919621a49d5a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga113c32ff195c612ec2fb6a9dd5740184"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#ga113c32ff195c612ec2fb6a9dd5740184">EvrRtxEventFlagsGet</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t event_flags)</td></tr>
+<tr class="memdesc:ga113c32ff195c612ec2fb6a9dd5740184"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on event flags retrieve (API)  <a href="group__rtx__evr__event__flags.html#ga113c32ff195c612ec2fb6a9dd5740184">More...</a><br/></td></tr>
+<tr class="separator:ga113c32ff195c612ec2fb6a9dd5740184"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gac8361874ffdd854e3778f21d070fed24"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#gac8361874ffdd854e3778f21d070fed24">EvrRtxEventFlagsWait</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t flags, uint32_t options, uint32_t timeout)</td></tr>
+<tr class="memdesc:gac8361874ffdd854e3778f21d070fed24"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on wait for event flags (API)  <a href="group__rtx__evr__event__flags.html#gac8361874ffdd854e3778f21d070fed24">More...</a><br/></td></tr>
+<tr class="separator:gac8361874ffdd854e3778f21d070fed24"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:gafd598e0b02a31083fb41626d68fa489e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#gafd598e0b02a31083fb41626d68fa489e">EvrRtxEventFlagsWaitPending</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t flags, uint32_t options, uint32_t timeout)</td></tr>
+<tr class="memdesc:gafd598e0b02a31083fb41626d68fa489e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on pending wait for event flags (Op)  <a href="group__rtx__evr__event__flags.html#gafd598e0b02a31083fb41626d68fa489e">More...</a><br/></td></tr>
+<tr class="separator:gafd598e0b02a31083fb41626d68fa489e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga877235cbe04188b831b70a3c2237c827"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#ga877235cbe04188b831b70a3c2237c827">EvrRtxEventFlagsWaitTimeout</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id)</td></tr>
+<tr class="memdesc:ga877235cbe04188b831b70a3c2237c827"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on wait timeout for event flags (Op)  <a href="group__rtx__evr__event__flags.html#ga877235cbe04188b831b70a3c2237c827">More...</a><br/></td></tr>
 <tr class="separator:ga877235cbe04188b831b70a3c2237c827"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a7b446f241c971db432ebac5d176bd9de"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__evr_8h.html#a7b446f241c971db432ebac5d176bd9de">EvrRtxEventFlagsWaitCompleted</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t flags, uint32_t options, uint32_t event_flags)</td></tr>
-<tr class="memdesc:a7b446f241c971db432ebac5d176bd9de"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful wait for event flags (Op)  <a href="#a7b446f241c971db432ebac5d176bd9de">More...</a><br/></td></tr>
-<tr class="separator:a7b446f241c971db432ebac5d176bd9de"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a66f32e4dddc68cdfd56c32b88b7f13ff"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__evr_8h.html#a66f32e4dddc68cdfd56c32b88b7f13ff">EvrRtxEventFlagsWaitNotCompleted</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t flags, uint32_t options)</td></tr>
-<tr class="memdesc:a66f32e4dddc68cdfd56c32b88b7f13ff"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on unsuccessful wait for event flags (Op)  <a href="#a66f32e4dddc68cdfd56c32b88b7f13ff">More...</a><br/></td></tr>
-<tr class="separator:a66f32e4dddc68cdfd56c32b88b7f13ff"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga10e98e35999350e9e337c716ba4dc079"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flasg.html#ga10e98e35999350e9e337c716ba4dc079">EvrRtxEventFlagsDelete</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id)</td></tr>
-<tr class="memdesc:ga10e98e35999350e9e337c716ba4dc079"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on event flags delete (API)  <a href="group__rtx__evr__event__flasg.html#ga10e98e35999350e9e337c716ba4dc079">More...</a><br/></td></tr>
+<tr class="memitem:ga7b446f241c971db432ebac5d176bd9de"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#ga7b446f241c971db432ebac5d176bd9de">EvrRtxEventFlagsWaitCompleted</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t flags, uint32_t options, uint32_t event_flags)</td></tr>
+<tr class="memdesc:ga7b446f241c971db432ebac5d176bd9de"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful wait for event flags (Op)  <a href="group__rtx__evr__event__flags.html#ga7b446f241c971db432ebac5d176bd9de">More...</a><br/></td></tr>
+<tr class="separator:ga7b446f241c971db432ebac5d176bd9de"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga66f32e4dddc68cdfd56c32b88b7f13ff"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#ga66f32e4dddc68cdfd56c32b88b7f13ff">EvrRtxEventFlagsWaitNotCompleted</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id, uint32_t flags, uint32_t options)</td></tr>
+<tr class="memdesc:ga66f32e4dddc68cdfd56c32b88b7f13ff"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on unsuccessful wait for event flags (Op)  <a href="group__rtx__evr__event__flags.html#ga66f32e4dddc68cdfd56c32b88b7f13ff">More...</a><br/></td></tr>
+<tr class="separator:ga66f32e4dddc68cdfd56c32b88b7f13ff"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ga10e98e35999350e9e337c716ba4dc079"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#ga10e98e35999350e9e337c716ba4dc079">EvrRtxEventFlagsDelete</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id)</td></tr>
+<tr class="memdesc:ga10e98e35999350e9e337c716ba4dc079"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on event flags delete (API)  <a href="group__rtx__evr__event__flags.html#ga10e98e35999350e9e337c716ba4dc079">More...</a><br/></td></tr>
 <tr class="separator:ga10e98e35999350e9e337c716ba4dc079"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga2ef153a6ee7a8d72375f81128454ede9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flasg.html#ga2ef153a6ee7a8d72375f81128454ede9">EvrRtxEventFlagsDestroyed</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id)</td></tr>
-<tr class="memdesc:ga2ef153a6ee7a8d72375f81128454ede9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful event flags delete (Op)  <a href="group__rtx__evr__event__flasg.html#ga2ef153a6ee7a8d72375f81128454ede9">More...</a><br/></td></tr>
+<tr class="memitem:ga2ef153a6ee7a8d72375f81128454ede9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__event__flags.html#ga2ef153a6ee7a8d72375f81128454ede9">EvrRtxEventFlagsDestroyed</a> (<a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a> ef_id)</td></tr>
+<tr class="memdesc:ga2ef153a6ee7a8d72375f81128454ede9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on successful event flags delete (Op)  <a href="group__rtx__evr__event__flags.html#ga2ef153a6ee7a8d72375f81128454ede9">More...</a><br/></td></tr>
 <tr class="separator:ga2ef153a6ee7a8d72375f81128454ede9"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga47388f06c025938facfddd95851d666f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__rtx__evr__mutex.html#ga47388f06c025938facfddd95851d666f">EvrRtxMutexError</a> (<a class="el" href="group__CMSIS__RTOS__MutexMgmt.html#ga313801836c62deb23055efb55a420e42">osMutexId_t</a> mutex_id, int32_t status)</td></tr>
 <tr class="memdesc:ga47388f06c025938facfddd95851d666f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Event on mutex error (Error)  <a href="group__rtx__evr__mutex.html#ga47388f06c025938facfddd95851d666f">More...</a><br/></td></tr>
@@ -656,6 +675,30 @@
 <tr class="separator:ga3bbf02128c31e5cc7ef4c78cdbec508c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <h2 class="groupheader">Macro Definition Documentation</h2>
+<a class="anchor" id="a8e1abf0403e5aabff14bffa28c0bf14b"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define OS_EVR_THFLAGS&#160;&#160;&#160;OS_EVR_THREAD</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a class="anchor" id="aad9052994e484a85e2ea7c34b3957f29"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define OS_EVR_WAIT&#160;&#160;&#160;OS_EVR_THREAD</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
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@@ -848,645 +891,13 @@
 
 </div>
 </div>
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-        <tr>
-          <td class="memname">void EvrRtxThreadFlagsSet </td>
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-          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a>&#160;</td>
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-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>flags</em>&#160;</td>
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-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">thread_id</td><td>thread ID obtained by <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a> or <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga8df03548e89fbc56402a5cd584a505da">osThreadGetId</a>. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">flags</td><td>flags of the thread that shall be set. </td></tr>
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-  </dd>
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-      <table class="memname">
-        <tr>
-          <td class="memname">void EvrRtxThreadFlagsSetDone </td>
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-          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#gaa6c32fe2a3e0a2e01f212d55b02e51c7">osThreadId_t</a>&#160;</td>
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-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>thread_flags</em>&#160;</td>
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-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">thread_id</td><td>thread ID obtained by <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a> or <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga8df03548e89fbc56402a5cd584a505da">osThreadGetId</a>. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">thread_flags</td><td>thread flags after setting. </td></tr>
-  </table>
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-
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void EvrRtxThreadFlagsClear </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>flags</em></td><td>)</td>
-          <td></td>
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-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">flags</td><td>flags of the thread that shall be cleared. </td></tr>
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-          <td class="memname">void EvrRtxThreadFlagsClearDone </td>
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-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>thread_flags</em></td><td>)</td>
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-<dl class="params"><dt>Parameters</dt><dd>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">thread_flags</td><td>thread flags before clearing. </td></tr>
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-          <td class="memname">void EvrRtxThreadFlagsGet </td>
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-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>thread_flags</em></td><td>)</td>
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-<dl class="params"><dt>Parameters</dt><dd>
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-          <td class="memname">void EvrRtxThreadFlagsWait </td>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">options</td><td>flags options (osFlagsXxxx). </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">timeout</td><td><a class="el" href="theory_of_operation.html#CMSIS_RTOS_TimeOutValue">Timeout Value</a> or 0 in case of no time-out. </td></tr>
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-          <td class="paramname"><em>flags</em>, </td>
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-          <td class="paramkey"></td>
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-          <td class="paramtype">uint32_t&#160;</td>
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-          <td class="paramtype">uint32_t&#160;</td>
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-          <td class="paramname"><em>flags</em>, </td>
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-          <td class="paramkey"></td>
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-          <td class="paramtype">uint32_t&#160;</td>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">options</td><td>flags options (osFlagsXxxx). </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">thread_flags</td><td>thread flags before clearing. </td></tr>
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-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>flags</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">options</td><td>flags options (osFlagsXxxx). </td></tr>
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-        <tr>
-          <td class="paramkey"></td>
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-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>flags</em>&#160;</td>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">flags</td><td>flags that shall be set. </td></tr>
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-        <tr>
-          <td class="paramkey"></td>
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-          <td class="paramtype">uint32_t&#160;</td>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">event_flags</td><td>event flags after setting. </td></tr>
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-          <td class="paramkey"></td>
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-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>flags</em>&#160;</td>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">flags</td><td>flags that shall be cleared. </td></tr>
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-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>event_flags</em>&#160;</td>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">event_flags</td><td>event flags before clearing. </td></tr>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">event_flags</td><td>current event flags. </td></tr>
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-          <td class="paramtype">uint32_t&#160;</td>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">flags</td><td>flags to wait for. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">options</td><td>flags options (osFlagsXxxx). </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">timeout</td><td><a class="el" href="theory_of_operation.html#CMSIS_RTOS_TimeOutValue">Timeout Value</a> or 0 in case of no time-out. </td></tr>
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-          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
-          <td class="paramname"><em>ef_id</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
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-          <td class="paramname"><em>flags</em>, </td>
-        </tr>
-        <tr>
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-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>options</em>, </td>
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-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
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-    <tr><td class="paramdir">[in]</td><td class="paramname">flags</td><td>flags to wait for. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">options</td><td>flags options (osFlagsXxxx). </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">timeout</td><td><a class="el" href="theory_of_operation.html#CMSIS_RTOS_TimeOutValue">Timeout Value</a> or 0 in case of no time-out. </td></tr>
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void EvrRtxEventFlagsWaitCompleted </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
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-        <tr>
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-          <td class="paramname"><em>flags</em>, </td>
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-          <td class="paramtype">uint32_t&#160;</td>
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-          <td>)</td>
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-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">ef_id</td><td>event flags ID obtained by <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">flags</td><td>flags to wait for. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">options</td><td>flags options (osFlagsXxxx). </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">event_flags</td><td>event flags before clearing or 0 if specified flags have not been set. </td></tr>
-  </table>
-  </dd>
-</dl>
-
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-<a class="anchor" id="a66f32e4dddc68cdfd56c32b88b7f13ff"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void EvrRtxEventFlagsWaitNotCompleted </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__CMSIS__RTOS__EventFlags.html#gafdbab933146d6d81d7cca7287e267a50">osEventFlagsId_t</a>&#160;</td>
-          <td class="paramname"><em>ef_id</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>flags</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>options</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">ef_id</td><td>event flags ID obtained by <a class="el" href="group__CMSIS__RTOS__EventFlags.html#gab14b1caeb12ffa42cce1bfe889cd07df">osEventFlagsNew</a>. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">flags</td><td>flags to wait for. </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">options</td><td>flags options (osFlagsXxxx). </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
 </div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="dir_a43355fbfff7212ac2193223a73d577c.html">RTOS2</a></li><li class="navelem"><a class="el" href="dir_002cf2dd0f795cc97a8d08cc3fa6e516.html">RTX</a></li><li class="navelem"><a class="el" href="dir_061ad8d12aa7dc7d03c29112cd6e086d.html">Include</a></li><li class="navelem"><a class="el" href="rtx__evr_8h.html">rtx_evr.h</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/rtx__evr_8txt.html b/docs/RTOS2/html/rtx__evr_8txt.html
index 6d1c3c8..daf6589 100644
--- a/docs/RTOS2/html/rtx__evr_8txt.html
+++ b/docs/RTOS2/html/rtx__evr_8txt.html
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="rtx__evr_8txt.html">rtx_evr.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/rtx__os_8h.html b/docs/RTOS2/html/rtx__os_8h.html
index 0ec2356..fdee6f0 100644
--- a/docs/RTOS2/html/rtx__os_8h.html
+++ b/docs/RTOS2/html/rtx__os_8h.html
@@ -192,30 +192,30 @@
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 <tr class="memdesc:aea20a2b373e98ae88a7cf7e4a56b118f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Kernel Information.  <a href="#aea20a2b373e98ae88a7cf7e4a56b118f">More...</a><br/></td></tr>
 <tr class="separator:aea20a2b373e98ae88a7cf7e4a56b118f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ad854168120979e8c60630e0140e104e8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__os_8h.html#ad854168120979e8c60630e0140e104e8">osRtxVersionKernel</a>&#160;&#160;&#160;50040000</td></tr>
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+<tr class="memitem:ad854168120979e8c60630e0140e104e8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__os_8h.html#ad854168120979e8c60630e0140e104e8">osRtxVersionKernel</a>&#160;&#160;&#160;50050001</td></tr>
+<tr class="memdesc:ad854168120979e8c60630e0140e104e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Kernel version (5.5.1)  <a href="#ad854168120979e8c60630e0140e104e8">More...</a><br/></td></tr>
 <tr class="separator:ad854168120979e8c60630e0140e104e8"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a47e0637d30eed2357b238cbb19dbb058"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__os_8h.html#a47e0637d30eed2357b238cbb19dbb058">osRtxKernelId</a>&#160;&#160;&#160;&quot;RTX V5.4.0&quot;</td></tr>
+<tr class="memitem:a47e0637d30eed2357b238cbb19dbb058"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__os_8h.html#a47e0637d30eed2357b238cbb19dbb058">osRtxKernelId</a>&#160;&#160;&#160;&quot;RTX V5.5.1&quot;</td></tr>
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 <tr class="separator:a47e0637d30eed2357b238cbb19dbb058"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ad78a646169b7b4bfa2a278d08fe21fa5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__os_8h.html#ad78a646169b7b4bfa2a278d08fe21fa5">osRtxIdInvalid</a>&#160;&#160;&#160;0x00U</td></tr>
 <tr class="memdesc:ad78a646169b7b4bfa2a278d08fe21fa5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Object Identifier definitions.  <a href="#ad78a646169b7b4bfa2a278d08fe21fa5">More...</a><br/></td></tr>
 <tr class="separator:ad78a646169b7b4bfa2a278d08fe21fa5"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ad6f0f1f1b4e1b8c2615429d6a24ca8f5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__os_8h.html#ad6f0f1f1b4e1b8c2615429d6a24ca8f5">osRtxIdThread</a>&#160;&#160;&#160;0x01U</td></tr>
+<tr class="memitem:ad6f0f1f1b4e1b8c2615429d6a24ca8f5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__os_8h.html#ad6f0f1f1b4e1b8c2615429d6a24ca8f5">osRtxIdThread</a>&#160;&#160;&#160;0xF1U</td></tr>
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-<tr class="memitem:a5e8dd6b61e9b09d20aeea8434861950e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__os_8h.html#a5e8dd6b61e9b09d20aeea8434861950e">osRtxIdTimer</a>&#160;&#160;&#160;0x02U</td></tr>
+<tr class="memitem:a5e8dd6b61e9b09d20aeea8434861950e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__os_8h.html#a5e8dd6b61e9b09d20aeea8434861950e">osRtxIdTimer</a>&#160;&#160;&#160;0xF2U</td></tr>
 <tr class="separator:a5e8dd6b61e9b09d20aeea8434861950e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:aa9b41f7b0dc38018a7db915df5e716cc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__os_8h.html#aa9b41f7b0dc38018a7db915df5e716cc">osRtxIdEventFlags</a>&#160;&#160;&#160;0x03U</td></tr>
+<tr class="memitem:aa9b41f7b0dc38018a7db915df5e716cc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__os_8h.html#aa9b41f7b0dc38018a7db915df5e716cc">osRtxIdEventFlags</a>&#160;&#160;&#160;0xF3U</td></tr>
 <tr class="separator:aa9b41f7b0dc38018a7db915df5e716cc"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a086574b10e90122f5228decea0a5d3dc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__os_8h.html#a086574b10e90122f5228decea0a5d3dc">osRtxIdMutex</a>&#160;&#160;&#160;0x04U</td></tr>
+<tr class="memitem:a086574b10e90122f5228decea0a5d3dc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__os_8h.html#a086574b10e90122f5228decea0a5d3dc">osRtxIdMutex</a>&#160;&#160;&#160;0xF5U</td></tr>
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-<tr class="memitem:a4778b8ce61af3d942501bb4ff28c18f1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__os_8h.html#a4778b8ce61af3d942501bb4ff28c18f1">osRtxIdSemaphore</a>&#160;&#160;&#160;0x05U</td></tr>
+<tr class="memitem:a4778b8ce61af3d942501bb4ff28c18f1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__os_8h.html#a4778b8ce61af3d942501bb4ff28c18f1">osRtxIdSemaphore</a>&#160;&#160;&#160;0xF6U</td></tr>
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-<tr class="memitem:a3cddbd1d03aedae758445d17db319fec"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__os_8h.html#a3cddbd1d03aedae758445d17db319fec">osRtxIdMemoryPool</a>&#160;&#160;&#160;0x06U</td></tr>
+<tr class="memitem:a3cddbd1d03aedae758445d17db319fec"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__os_8h.html#a3cddbd1d03aedae758445d17db319fec">osRtxIdMemoryPool</a>&#160;&#160;&#160;0xF7U</td></tr>
 <tr class="separator:a3cddbd1d03aedae758445d17db319fec"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a84bb69c0a0d02b2adc4d499803ccb063"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__os_8h.html#a84bb69c0a0d02b2adc4d499803ccb063">osRtxIdMessage</a>&#160;&#160;&#160;0x07U</td></tr>
+<tr class="memitem:a84bb69c0a0d02b2adc4d499803ccb063"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__os_8h.html#a84bb69c0a0d02b2adc4d499803ccb063">osRtxIdMessage</a>&#160;&#160;&#160;0xF9U</td></tr>
 <tr class="separator:a84bb69c0a0d02b2adc4d499803ccb063"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a260226a1f72b4a333f01573430b60b17"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__os_8h.html#a260226a1f72b4a333f01573430b60b17">osRtxIdMessageQueue</a>&#160;&#160;&#160;0x08U</td></tr>
+<tr class="memitem:a260226a1f72b4a333f01573430b60b17"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__os_8h.html#a260226a1f72b4a333f01573430b60b17">osRtxIdMessageQueue</a>&#160;&#160;&#160;0xFAU</td></tr>
 <tr class="separator:a260226a1f72b4a333f01573430b60b17"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a797c4d97bb5e216e6901c1e30e96cb34"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="rtx__os_8h.html#a797c4d97bb5e216e6901c1e30e96cb34">osRtxFlagSystemObject</a>&#160;&#160;&#160;0x01U</td></tr>
 <tr class="memdesc:a797c4d97bb5e216e6901c1e30e96cb34"><td class="mdescLeft">&#160;</td><td class="mdescRight">Object Flags definitions.  <a href="#a797c4d97bb5e216e6901c1e30e96cb34">More...</a><br/></td></tr>
@@ -1822,7 +1822,7 @@
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define osRtxVersionKernel&#160;&#160;&#160;50040000</td>
+          <td class="memname">#define osRtxVersionKernel&#160;&#160;&#160;50050001</td>
         </tr>
       </table>
 </div><div class="memdoc">
@@ -1834,7 +1834,7 @@
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define osRtxKernelId&#160;&#160;&#160;&quot;RTX V5.4.0&quot;</td>
+          <td class="memname">#define osRtxKernelId&#160;&#160;&#160;&quot;RTX V5.5.1&quot;</td>
         </tr>
       </table>
 </div><div class="memdoc">
@@ -1858,7 +1858,7 @@
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define osRtxIdThread&#160;&#160;&#160;0x01U</td>
+          <td class="memname">#define osRtxIdThread&#160;&#160;&#160;0xF1U</td>
         </tr>
       </table>
 </div><div class="memdoc">
@@ -1870,7 +1870,7 @@
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define osRtxIdTimer&#160;&#160;&#160;0x02U</td>
+          <td class="memname">#define osRtxIdTimer&#160;&#160;&#160;0xF2U</td>
         </tr>
       </table>
 </div><div class="memdoc">
@@ -1882,7 +1882,7 @@
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define osRtxIdEventFlags&#160;&#160;&#160;0x03U</td>
+          <td class="memname">#define osRtxIdEventFlags&#160;&#160;&#160;0xF3U</td>
         </tr>
       </table>
 </div><div class="memdoc">
@@ -1894,7 +1894,7 @@
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define osRtxIdMutex&#160;&#160;&#160;0x04U</td>
+          <td class="memname">#define osRtxIdMutex&#160;&#160;&#160;0xF5U</td>
         </tr>
       </table>
 </div><div class="memdoc">
@@ -1906,7 +1906,7 @@
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define osRtxIdSemaphore&#160;&#160;&#160;0x05U</td>
+          <td class="memname">#define osRtxIdSemaphore&#160;&#160;&#160;0xF6U</td>
         </tr>
       </table>
 </div><div class="memdoc">
@@ -1918,7 +1918,7 @@
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define osRtxIdMemoryPool&#160;&#160;&#160;0x06U</td>
+          <td class="memname">#define osRtxIdMemoryPool&#160;&#160;&#160;0xF7U</td>
         </tr>
       </table>
 </div><div class="memdoc">
@@ -1930,7 +1930,7 @@
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define osRtxIdMessage&#160;&#160;&#160;0x07U</td>
+          <td class="memname">#define osRtxIdMessage&#160;&#160;&#160;0xF9U</td>
         </tr>
       </table>
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@@ -1942,7 +1942,7 @@
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define osRtxIdMessageQueue&#160;&#160;&#160;0x08U</td>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
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index 82b4018..e1bff31 100644
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@@ -1,6 +1,7 @@
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index d4d22a6..1e25951 100644
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index f5d2dd5..0885a95 100644
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+  ['evrrtxdelayuntil',['EvrRtxDelayUntil',['../group__rtx__evr__wait.html#ga16728292de4e2665248693fff603a2c3',1,'rtx_evr.h']]],
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+  ['evrrtxthreadpriorityupdated',['EvrRtxThreadPriorityUpdated',['../group__rtx__evr__thread.html#ga831b3e64d459a325fbc13033caa39f05',1,'rtx_evr.h']]],
   ['evrrtxthreadresume',['EvrRtxThreadResume',['../group__rtx__evr__thread.html#gaf41ff549329cf2feb4a1efe49c518e30',1,'rtx_evr.h']]],
   ['evrrtxthreadresumed',['EvrRtxThreadResumed',['../group__rtx__evr__thread.html#ga8b25f2548a9f3c069431131169d170ac',1,'rtx_evr.h']]],
   ['evrrtxthreadsetpriority',['EvrRtxThreadSetPriority',['../group__rtx__evr__thread.html#gabf4a015bd3fb2a33c0d105a871aaba72',1,'rtx_evr.h']]],
diff --git a/docs/RTOS2/html/search/groups_2.js b/docs/RTOS2/html/search/groups_2.js
index 28660ad..1f55628 100644
--- a/docs/RTOS2/html/search/groups_2.js
+++ b/docs/RTOS2/html/search/groups_2.js
@@ -2,5 +2,5 @@
 [
   ['event_20flags',['Event Flags',['../group__CMSIS__RTOS__EventFlags.html',1,'']]],
   ['event_20functions',['Event functions',['../group__rtx__evr.html',1,'']]],
-  ['event_20flags_20functions',['Event Flags Functions',['../group__rtx__evr__event__flasg.html',1,'']]]
+  ['event_20flags_20functions',['Event Flags Functions',['../group__rtx__evr__event__flags.html',1,'']]]
 ];
diff --git a/docs/RTOS2/html/search/groups_4.js b/docs/RTOS2/html/search/groups_4.js
index d43a456..6d5c1e6 100644
--- a/docs/RTOS2/html/search/groups_4.js
+++ b/docs/RTOS2/html/search/groups_4.js
@@ -1,4 +1,5 @@
 var searchData=
 [
-  ['generic_20wait_20functions',['Generic Wait Functions',['../group__CMSIS__RTOS__Wait.html',1,'']]]
+  ['generic_20wait_20functions',['Generic Wait Functions',['../group__CMSIS__RTOS__Wait.html',1,'']]],
+  ['generic_20wait_20functions',['Generic Wait Functions',['../group__rtx__evr__wait.html',1,'']]]
 ];
diff --git a/docs/RTOS2/html/search/groups_a.js b/docs/RTOS2/html/search/groups_a.js
index b4f2a98..e42f8a0 100644
--- a/docs/RTOS2/html/search/groups_a.js
+++ b/docs/RTOS2/html/search/groups_a.js
@@ -4,5 +4,6 @@
   ['thread_20management',['Thread Management',['../group__CMSIS__RTOS__ThreadMgmt.html',1,'']]],
   ['timer_20management',['Timer Management',['../group__CMSIS__RTOS__TimerMgmt.html',1,'']]],
   ['thread_20functions',['Thread Functions',['../group__rtx__evr__thread.html',1,'']]],
+  ['thread_20flags_20functions',['Thread Flags Functions',['../group__rtx__evr__thread__flags.html',1,'']]],
   ['timer_20functions',['Timer Functions',['../group__rtx__evr__timer.html',1,'']]]
 ];
diff --git a/docs/RTOS2/html/search/pages_9.js b/docs/RTOS2/html/search/pages_9.js
index 165e23d..9d398b4 100644
--- a/docs/RTOS2/html/search/pages_9.js
+++ b/docs/RTOS2/html/search/pages_9.js
@@ -1,4 +1,5 @@
 var searchData=
 [
+  ['stack_20requirements',['Stack Requirements',['../pStackRequirements.html',1,'technicalData5']]],
   ['supported_20toolchains',['Supported Toolchains',['../pToolchains.html',1,'technicalData5']]]
 ];
diff --git a/docs/RTOS2/html/structosRtxInfo__t_8post__process.html b/docs/RTOS2/html/structosRtxInfo__t_8post__process.html
index 791f3b9..718538d 100644
--- a/docs/RTOS2/html/structosRtxInfo__t_8post__process.html
+++ b/docs/RTOS2/html/structosRtxInfo__t_8post__process.html
@@ -207,7 +207,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="structosRtxInfo__t_8post__process.html">osRtxInfo_t.post_process</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/structosRtxInfo__t_8timer.html b/docs/RTOS2/html/structosRtxInfo__t_8timer.html
index e5a320e..6e0c007 100644
--- a/docs/RTOS2/html/structosRtxInfo__t_8timer.html
+++ b/docs/RTOS2/html/structosRtxInfo__t_8timer.html
@@ -192,7 +192,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="structosRtxInfo__t_8timer.html">osRtxInfo_t.timer</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/technicalData5.html b/docs/RTOS2/html/technicalData5.html
index 08331f8..7ad4e2c 100644
--- a/docs/RTOS2/html/technicalData5.html
+++ b/docs/RTOS2/html/technicalData5.html
@@ -114,6 +114,7 @@
 <div class="textblock"><p>The following section contains technical information about RTX v5.</p>
 <ul>
 <li><a class="el" href="pHardwareRequirements.html">Hardware Requirements</a> lists the resource requirements of the RTX v5 kernel along with hardware dependencies.</li>
+<li><a class="el" href="pStackRequirements.html">Stack Requirements</a> lists the memory requirements for the main stack when running the RTX v5 kernel.</li>
 <li><a class="el" href="pControlBlockSizes.html">Control Block Sizes</a> provides memory size information for <a class="el" href="theory_of_operation.html#StaticObjectMemory">object-specific control block memory allocation</a>.</li>
 <li><a class="el" href="pDirectory_Files.html">Directory Structure and File Overview</a> is an overview of the supplied files that belong to RTX v5</li>
 <li><a class="el" href="pToolchains.html">Supported Toolchains</a> details about the compiler support which includes ArmCC (MDK, DS-5), IAR EW-ARM, and GCC. </li>
@@ -124,7 +125,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li><li class="navelem"><a class="el" href="rtx5_impl.html">RTX v5 Implementation</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:04 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/technicalData5.js b/docs/RTOS2/html/technicalData5.js
index b4c41f2..b179964 100644
--- a/docs/RTOS2/html/technicalData5.js
+++ b/docs/RTOS2/html/technicalData5.js
@@ -3,11 +3,12 @@
     [ "Hardware Requirements", "pHardwareRequirements.html", [
       [ "Processor Requirements", "pHardwareRequirements.html#tpProcessor", [
         [ "Cortex-M0/M0+/M23 target processor", "pHardwareRequirements.html#tpCortexM0_M0P_M23", null ],
-        [ "Cortex-M3/M4/M7/M33 target processor", "pHardwareRequirements.html#tpCortexM3_M4_M7_M33", null ],
+        [ "Cortex-M3/M4/M7/M33/M35P target processor", "pHardwareRequirements.html#tpCortexM3_M4_M7_M33_M35P", null ],
         [ "Cortex-A5/A7/A9 target processor", "pHardwareRequirements.html#tpCortexA5_A7_A9", null ]
       ] ],
       [ "Memory Requirements", "pHardwareRequirements.html#rMemory", null ]
     ] ],
+    [ "Stack Requirements", "pStackRequirements.html", null ],
     [ "Control Block Sizes", "pControlBlockSizes.html", null ],
     [ "Directory Structure and File Overview", "pDirectory_Files.html", [
       [ "RTX v5 Directory Structure", "pDirectory_Files.html#Folders", null ],
diff --git a/docs/RTOS2/html/theory_of_operation.html b/docs/RTOS2/html/theory_of_operation.html
index aaa8e5c..a285476 100644
--- a/docs/RTOS2/html/theory_of_operation.html
+++ b/docs/RTOS2/html/theory_of_operation.html
@@ -120,12 +120,14 @@
 <li>Initialization and configuration of hardware including peripherals, memory, pins, clocks and the interrupt system.</li>
 <li>Update the system core clock using the respective <a href="../../Core/html/group__system__init__gr.html">CMSIS-Core (Cortex-M)</a> or <a href="../../Core_A/html/group__system__init__gr.html">CMSIS-Core (Cortex-A)</a> function.</li>
 <li>Initialize the CMSIS-RTOS kernel using <a class="el" href="group__CMSIS__RTOS__KernelCtrl.html#gae818f6611d25ba3140bede410a52d659">osKernelInitialize</a>.</li>
-<li>Optionally, create a new thread <code>app_main</code>, which is used as a main thread using <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>. Alternatively, threads can be created in <code>main()</code> directly.</li>
-<li>Start the RTOS scheduler using <a class="el" href="group__CMSIS__RTOS__KernelCtrl.html#ga9ae2cc00f0d89d7b6a307bba942b5221">osKernelStart</a> which also configure system tick timer and RTOS specific interrupts. This function does not return in case of successful execution. Any application code after <b>osKernelStart</b> will therefore not be executed.</li>
+<li>Optionally, create one thread (for example <code>app_main</code>), which is used as a main thread using <a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#ga48d68b8666d99d28fa646ee1d2182b8f">osThreadNew</a>. This thread should take care of creating and starting objects, once it is run by the scheduler. Alternatively, threads can be created in <code>main()</code> directly.</li>
+<li>Start the RTOS scheduler using <a class="el" href="group__CMSIS__RTOS__KernelCtrl.html#ga9ae2cc00f0d89d7b6a307bba942b5221">osKernelStart</a> which also configures the system tick timer and initializes RTOS specific interrupts. This function does not return in case of successful execution. Therefore, any application code after <b>osKernelStart</b> will not be executed.</li>
 </ol>
-<dl class="section note"><dt>Note</dt><dd>Interrupts are initialized in <a class="el" href="group__CMSIS__RTOS__KernelCtrl.html#ga9ae2cc00f0d89d7b6a307bba942b5221">osKernelStart</a>. Modifying basic In case priorities and groupings in the NVIC are altered by the application after the above sequence it might be necessary to call <a class="el" href="group__CMSIS__RTOS__KernelCtrl.html#gae818f6611d25ba3140bede410a52d659">osKernelInitialize</a> again. Incorrect ossibly catched by <a class="el" href="group__rtx5__specific__functions.html#gaf1745a88f9cc60b609ab1c8076bd346d">osRtxErrorNotify</a> or causing a hard fault.</dd>
-<dd>
-The tick timer is configured during <a class="el" href="group__CMSIS__RTOS__KernelCtrl.html#ga9ae2cc00f0d89d7b6a307bba942b5221">osKernelStart</a>. </dd></dl>
+<dl class="section note"><dt>Note</dt><dd><ul>
+<li>Modifying priorities and groupings in the NVIC by the application after the above sequence is not recommended.</li>
+<li>Before executing <a class="el" href="group__CMSIS__RTOS__KernelCtrl.html#ga9ae2cc00f0d89d7b6a307bba942b5221">osKernelStart</a>, only the functions <a class="el" href="group__CMSIS__RTOS__KernelCtrl.html#ga6f7764e7250c5c5364c00c45a5d1d199">osKernelGetInfo</a>, <a class="el" href="group__CMSIS__RTOS__KernelCtrl.html#ga48b69b81012fce051f639be288b243ba">osKernelGetState</a>, and object creation functions (osXxxNew) may be called.</li>
+</ul>
+</dd></dl>
 <h1><a class="anchor" id="Scheduler"></a>
 Scheduler</h1>
 <p>RTX5 implements a low-latency preemptive scheduler. Major parts of RTX5 are executed in handler mode such as</p>
@@ -140,7 +142,7 @@
 <div class="caption">
 Thread scheduling and interrupt execution</div></div>
 <p> The scheduler combines priority and round-robin based context switches. The example depicted in the image above contains four threads (1, 2, 3, and 4). Threads 1 and 2 share the same priority, thread 3 has a higher one and thread 4 the highest (<a class="el" href="group__CMSIS__RTOS__ThreadMgmt.html#a6a5183df4c54c3e28dc8dc704f2487d5">osThreadAttr_t::priority</a>). As long as threads 3 and 4 are blocked the scheduler switches between thread 1 and 2 on a time-slice basis (round-robin). The time-slice for round-robin scheduling can be configured, see Round-Robin Timeout in <a class="el" href="config_rtx5.html#systemConfig">System Configuration</a>.</p>
-<p>Thread 2 unblocks thread 3 by an arbitrary RTOS-call (executed in SVC handler mode) at time index 2. The scheduler switches to thread 3 immediately because thread 3 has the highest priority. Thread 4 is still blocked.</p>
+<p>Thread 2 unblocks thread 3 by an arbitrary RTOS-call (executed in <a class="el" href="theory_of_operation.html#CMSIS_RTOS_svcFunctions">SVC</a> handler mode) at time index 2. The scheduler switches to thread 3 immediately because thread 3 has the highest priority. Thread 4 is still blocked.</p>
 <p>At time index 4 an interrupt (ISR) occurs and preempts the SysTick_Handler. RTX does not add any latency to the interrupt service execution. The ISR routine uses an RTOS-call that unblocks thread 4. Instead of switching to thread 4 immediately the PendSV flag is set to defer the context switching. The PendSV_Handler is executed right after the SysTick_Handler returns and the deferred context switch to thread 4 is carried out. As soon as highest priority thread 4 blocks again by using a blocking RTOS-call execution is switched back to thread 3 immediately during time index 5.</p>
 <p>At time index 5 thread 3 uses a blocking RTOS-call as well. Thus the scheduler switches back to thread 2 for time index 6. At time index 7 the scheduler uses the round-robin mechanism to switch to thread 1 and so on.</p>
 <h1><a class="anchor" id="MemoryAllocation"></a>
@@ -219,6 +221,7 @@
 <tr>
 <td>Message Queue </td><td><code>.bss.os.msgqueue.cb</code> </td></tr>
 </table>
+<p>It must be assured that these sections are placed into contiguous memory. This can fail, i.e. sections end up being split over multiple memory segments, when assigning compilation units to memory segments, manually.</p>
 <p>The following code example shows how to create an OS object using static memory.</p>
 <p><b> Code Example:</b> </p>
 <div class="fragment"><div class="line"><span class="comment">/*----------------------------------------------------------------------------</span></div>
@@ -313,7 +316,7 @@
 RTX Kernel Timer Tick</h1>
 <p>RTX uses the generic <a class="el" href="group__CMSIS__RTOS__TickAPI.html">OS Tick API</a> to configure and control its periodic Kernel Tick.</p>
 <p>To use an alternative timer as the Kernel Tick Timer one simply needs to implement a custom version of the <a class="el" href="group__CMSIS__RTOS__TickAPI.html">OS Tick API</a>.</p>
-<dl class="section note"><dt>Note</dt><dd>The OS Tick implementation provided must asure that the used timer interrupt uses the same (low) priority group as the service interrupts, i.e. interrupts used by RTX must not preempt each other. Refer to the <a class="el" href="theory_of_operation.html#Scheduler">Scheduler</a> section for more details.</dd></dl>
+<dl class="section note"><dt>Note</dt><dd>The OS Tick implementation provided must assure that the used timer interrupt uses the same (low) priority group as the service interrupts, i.e. interrupts used by RTX must not preempt each other. Refer to the <a class="el" href="theory_of_operation.html#Scheduler">Scheduler</a> section for more details.</dd></dl>
 <h2><a class="anchor" id="TickLess"></a>
 Tick-less Low-Power Operation</h2>
 <p>RTX5 provides extension for tick-less operation which is useful for applications that use extensively low-power modes where the SysTick timer is also disabled. To provide a time-tick in such power-saving modes, a wake-up timer is used to derive timer intervals. The CMSIS-RTOS2 functions <a class="el" href="group__CMSIS__RTOS__KernelCtrl.html#gae26683e1606ec633354a2876c68f0c1f">osKernelSuspend</a> and <a class="el" href="group__CMSIS__RTOS__KernelCtrl.html#ga8c4b4d7ed34cab73c001665d9176aced">osKernelResume</a> control the tick-less operation.</p>
@@ -383,7 +386,7 @@
 <p>Every implementation of the CMSIS-RTOS2 API can bring its own additional features. RTX5 adds a couple of <a class="el" href="group__rtx5__specific.html">functions</a> for the idle more, for error notifications, and special system timer functions. It also is using macros for control block and memory sizes.</p>
 <p>If you require some of the RTX specific functions in your application code, #include the header file <b>rtx_os.h</b>:</p>
 <div class="fragment"><div class="line"><span class="comment">/*</span></div>
-<div class="line"><span class="comment"> * Copyright (c) 2013-2018 Arm Limited. All rights reserved.</span></div>
+<div class="line"><span class="comment"> * Copyright (c) 2013-2019 Arm Limited. All rights reserved.</span></div>
 <div class="line"><span class="comment"> *</span></div>
 <div class="line"><span class="comment"> * SPDX-License-Identifier: Apache-2.0</span></div>
 <div class="line"><span class="comment"> *</span></div>
@@ -422,22 +425,22 @@
 <div class="line"> <span class="comment"></span></div>
 <div class="line"><span class="comment">/// Kernel Information</span></div>
 <div class="line"><span class="comment"></span><span class="preprocessor">#define osRtxVersionAPI      20010003   </span><span class="comment">///&lt; API version (2.1.3)</span></div>
-<div class="line"><span class="comment"></span>#define osRtxVersionKernel   50040000   <span class="comment">///&lt; Kernel version (5.4.0)</span></div>
-<div class="line"><span class="comment"></span>#define osRtxKernelId     &quot;RTX V5.4.0&quot;  <span class="comment">///&lt; Kernel identification string</span></div>
+<div class="line"><span class="comment"></span>#define osRtxVersionKernel   50050001   <span class="comment">///&lt; Kernel version (5.5.1)</span></div>
+<div class="line"><span class="comment"></span>#define osRtxKernelId     &quot;RTX V5.5.1&quot;  <span class="comment">///&lt; Kernel identification string</span></div>
 <div class="line"><span class="comment"></span> </div>
 <div class="line"> </div>
 <div class="line"><span class="comment">//  ==== Common definitions ====</span></div>
 <div class="line"> <span class="comment"></span></div>
 <div class="line"><span class="comment">/// Object Identifier definitions</span></div>
 <div class="line"><span class="comment"></span><span class="preprocessor">#define osRtxIdInvalid          0x00U</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define osRtxIdThread           0x01U</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define osRtxIdTimer            0x02U</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define osRtxIdEventFlags       0x03U</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define osRtxIdMutex            0x04U</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define osRtxIdSemaphore        0x05U</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define osRtxIdMemoryPool       0x06U</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define osRtxIdMessage          0x07U</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define osRtxIdMessageQueue     0x08U</span></div>
+<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define osRtxIdThread           0xF1U</span></div>
+<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define osRtxIdTimer            0xF2U</span></div>
+<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define osRtxIdEventFlags       0xF3U</span></div>
+<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define osRtxIdMutex            0xF5U</span></div>
+<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define osRtxIdSemaphore        0xF6U</span></div>
+<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define osRtxIdMemoryPool       0xF7U</span></div>
+<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define osRtxIdMessage          0xF9U</span></div>
+<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define osRtxIdMessageQueue     0xFAU</span></div>
 <div class="line"><span class="preprocessor"></span> <span class="comment"></span></div>
 <div class="line"><span class="comment">/// Object Flags definitions</span></div>
 <div class="line"><span class="comment"></span><span class="preprocessor">#define osRtxFlagSystemObject   0x01U</span></div>
@@ -880,14 +883,63 @@
 <li><a class="el" href="group__CMSIS__RTOS__PoolMgmt.html#ga8ead54e99ccb8f112356c88f99d38fbe">osMemoryPoolAlloc</a>, <a class="el" href="group__CMSIS__RTOS__PoolMgmt.html#gabb4f4560daa6d1f8c8789082ee186d16">osMemoryPoolFree</a>, <a class="el" href="group__CMSIS__RTOS__PoolMgmt.html#gad696e94bfbe28f0b6613f9303fdf6a37">osMemoryPoolGetCapacity</a>, <a class="el" href="group__CMSIS__RTOS__PoolMgmt.html#gab2bf059b7fa7679c3cccdaeec60b6c0e">osMemoryPoolGetBlockSize</a>, <a class="el" href="group__CMSIS__RTOS__PoolMgmt.html#ga958a9449bff8c95ce213de98eef5739d">osMemoryPoolGetCount</a>, <a class="el" href="group__CMSIS__RTOS__PoolMgmt.html#ga0394cffa9479a7994e3b03c79c1cb909">osMemoryPoolGetSpace</a></li>
 <li><a class="el" href="group__CMSIS__RTOS__Message.html#gaa515fc8b956f721a8f72b2c505813bfc">osMessageQueuePut</a>, <a class="el" href="group__CMSIS__RTOS__Message.html#gad90d4959466a7a65105061da8256ab9e">osMessageQueueGet</a>, <a class="el" href="group__CMSIS__RTOS__Message.html#gac24f87d4f395e9e9c900c320e45ade8a">osMessageQueueGetCapacity</a>, <a class="el" href="group__CMSIS__RTOS__Message.html#ga96d3d84069b20359de48109e28a1a89e">osMessageQueueGetMsgSize</a>, <a class="el" href="group__CMSIS__RTOS__Message.html#ga6a32ac394fcff568b251c160cc3014b2">osMessageQueueGetCount</a>, <a class="el" href="group__CMSIS__RTOS__Message.html#gaddf0904427436dd3880d46263c2dc9fa">osMessageQueueGetSpace</a></li>
 </ul>
-<p>Functions that cannot be called from an ISR are verifying the interrupt status and return the status code <b>osErrorISR</b>, in case they are called from an ISR context. In some implementations, this condition might be caught using the HARD_FAULT vector. </p>
+<p>Functions that cannot be called from an ISR are verifying the interrupt status and return the status code <b>osErrorISR</b>, in case they are called from an ISR context. In some implementations, this condition might be caught using the HARD_FAULT vector.</p>
+<h1><a class="anchor" id="CMSIS_RTOS_svcFunctions"></a>
+SVC Functions</h1>
+<p>Supervisor Calls (SVC) are exceptions targeted at software and operating systems for generating system function calls. They are sometimes called software interrupts. For example, instead of allowing user programs to directly access hardware, an operating system may provide access to hardware through an SVC. So when a user program wants to use certain hardware, it generates the exception using SVC instructions. The software exception handler in the operating system executes and provides the requested service to the user application. In this way, access to hardware is under the control of the OS, which can provide a more robust system by preventing the user applications from directly accessing the hardware.</p>
+<p>SVCs can also make software more portable because the user application does not need to know the programming details of the underlying hardware. The user program will only need to know the application programming interface (API) function ID and parameters; the actual hardware-level programming is handled by device drivers.</p>
+<p>SVCs run in <b>privileged</b> <b>handler</b> mode of the Arm Cortex-M core. SVC functions accept arguments and can return values. The functions are used in the same way as other functions; however, they are executed indirectly through the SVC instruction. When executing SVC instructions, the controller changes to the privileged handler mode.</p>
+<p>Interrupts are <b>not</b> <b>disabled</b> in this mode. To protect SVC functions from interrupts, you need to include the disable/enable intrinsic functions <code>__disable_irq()</code> and <code>__enable_irq()</code> in your code.</p>
+<p>You can use SVC functions to access <b>protected</b> <b>peripherals</b>, for example, to configure NVIC and interrupts. This is required if you run threads in unprivileged (protected) mode and you need to change interrupts from the within the thread.</p>
+<p>To implement SVC functions in your Keil RTX5 project, you need to:</p>
+<ol type="1">
+<li>Add the SVC User Table file <b>svc_user.c</b> to your project folder and include it into your project. This file is available as a user code template.</li>
+<li>Write a function implementation. Example: <div class="fragment"><div class="line">uint32_t svc_atomic_inc32 (uint32_t *mem) {</div>
+<div class="line">  <span class="comment">// A protected function to increment a counter. </span></div>
+<div class="line">  uint32_t val;</div>
+<div class="line">   </div>
+<div class="line">  __disable_irq();</div>
+<div class="line">  val  = *mem;</div>
+<div class="line">  (*mem) = val + 1U;</div>
+<div class="line">  __enable_irq();</div>
+<div class="line">   </div>
+<div class="line">  <span class="keywordflow">return</span> (val);</div>
+<div class="line">}</div>
+</div><!-- fragment --></li>
+<li>Add the function to the SVC function table in the <b>svc_user.c</b> module: <div class="fragment"><div class="line"><span class="keywordtype">void</span> * <span class="keyword">const</span> osRtxUserSVC[1+USER_SVC_COUNT] = {</div>
+<div class="line">  (<span class="keywordtype">void</span> *)USER_SVC_COUNT,</div>
+<div class="line">  (<span class="keywordtype">void</span> *)svc_atomic_inc32,</div>
+<div class="line">};</div>
+</div><!-- fragment --></li>
+<li>Increment the number of user SVC functions: <div class="fragment"><div class="line"><span class="preprocessor">#define USER_SVC_COUNT  1       // Number of user SVC functions</span></div>
+</div><!-- fragment --></li>
+<li><p class="startli">Declare a function wrapper to be called by the user to execute the SVC call.<br/>
+ <b>Code</b> <b>Example</b> (Arm Compiler 6) </p>
+<div class="fragment"><div class="line">__STATIC_FORCEINLINE uint32_t atomic_inc32 (uint32_t *mem) {</div>
+<div class="line">  <span class="keyword">register</span> uint32_t val;</div>
+<div class="line">       </div>
+<div class="line">  __ASM <span class="keyword">volatile</span> (</div>
+<div class="line">    <span class="stringliteral">&quot;svc 1&quot;</span> : <span class="stringliteral">&quot;=l&quot;</span> (val) : <span class="stringliteral">&quot;l&quot;</span> (mem) : <span class="stringliteral">&quot;cc&quot;</span>, <span class="stringliteral">&quot;memory&quot;</span></div>
+<div class="line">  );</div>
+<div class="line">  <span class="keywordflow">return</span> (val);</div>
+<div class="line">}</div>
+</div><!-- fragment --><p class="startli"><b>Code</b> <b>Example</b> (Arm Compiler 5 using <code>__svc(x)</code> attribute) </p>
+<div class="fragment"><div class="line">uint32_t atomic_inc32 (uint32_t *mem) __svc(1);</div>
+</div><!-- fragment --></li>
+</ol>
+<dl class="section note"><dt>Note</dt><dd><ul>
+<li>The SVC function <span class="XML-Token">0</span> is <b>reserved</b> for the Keil RTX5 kernel.</li>
+<li>Do not leave gaps when numbering SVC functions. They must occupy a <b>continuous</b> range of numbers starting from 1.</li>
+<li>SVC functions can still be interrupted. </li>
+</ul>
+</dd></dl>
 </div></div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="index.html">index</a></li><li class="navelem"><a class="el" href="rtx5_impl.html">RTX v5 Implementation</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/RTOS2/html/validation_8txt.html b/docs/RTOS2/html/validation_8txt.html
index 1f1b046..d7fde6b 100644
--- a/docs/RTOS2/html/validation_8txt.html
+++ b/docs/RTOS2/html/validation_8txt.html
@@ -117,7 +117,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="validation_8txt.html">validation.txt</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:45 for CMSIS-RTOS2 by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:03 for CMSIS-RTOS2 Version 2.1.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/SVD/html/CMSIS-SVD.xsd b/docs/SVD/html/CMSIS-SVD.xsd
index 413ce0d..33b3173 100644
--- a/docs/SVD/html/CMSIS-SVD.xsd
+++ b/docs/SVD/html/CMSIS-SVD.xsd
@@ -1,41 +1,47 @@
 <?xml version="1.0" encoding="UTF-8"?>
-<!-- 
- 
+<!--
+
   Copyright (c) 2013-2016 ARM Limited. All rights reserved.
- 
+
   SPDX-License-Identifier: Apache-2.0
- 
+
   Licensed under the Apache License, Version 2.0 (the License); you may
   not use this file except in compliance with the License.
   You may obtain a copy of the License at
- 
+
   www.apache.org/licenses/LICENSE-2.0
- 
+
   Unless required by applicable law or agreed to in writing, software
   distributed under the License is distributed on an AS IS BASIS, WITHOUT
   WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
   See the License for the specific language governing permissions and
   limitations under the License.
- 
-  $Date:         23. September 2016
-  $Revision:     1.3.3
+
+  $Date:         04. September 2018
+  $Revision:     1.3.5
+
+  Version 1.3.5:
+  - add CM35P as enumeration value for cpuNameType.
+
+  Version 1.3.4:
+  - add dspPresent element to cpuType as SIMD instructions became optional for new processors.
 
   Version 1.3.3:
   - update file header to Apache 2.0 License
   - add dimableIdentifierType, as a copy of previous identifierType adding "%s",
   - update identifierType to only allow names without %s included.
   - remove enumerationNameType.
-  - add headerEnumName to enumerationType and to dimArrayIndexType for peripheral arrays 
+  - add headerEnumName to enumerationType and to dimArrayIndexType for peripheral arrays
     overwriting hierarchically generated names
   - add dimName to dimElementGroup. Only valid in <cluster> context, ignored otherwise.
-  
+
   Version 1.3.2:
   adding dimIndexArray to peripheral-, cluster- and register-array to describe
   enumeration of array indices.
 
   Version 1.3.1:
   fixed peripheral name element type to identifierType to support %s for peripheral arrays
-  added optional protection element to addressBlockType and added p=privileged 
+  added optional protection element to addressBlockType and added p=privileged
 
   Version 1.3:
   added dim to peripherals to describe an array of peripherals.
@@ -43,16 +49,16 @@
   added protection element as part of the registerPropertiesGroup indicating
   special permissions are required for accessing a register.
   CPU Section extended with description of the Secure Attribution Unit.
-  
+
   Version 1.2:
   Cortex-M7 support items have been added as optional tags for the device header file generation:
   fpuDP, icachePresent, dcachePresent, itcmPresent, dtcmPresent
-  
+
   Version 1.1:
   For backward compatibility all additional tags have been made optional.
   Extensions may be mandatory for successful device header file generation
   Other changes are related to some restructuring of the schema.
-  
+
   Note that the memory section has been removed since this would limit the
   reuse of descriptions for a series of devices.
  -->
@@ -70,7 +76,7 @@
       <xs:pattern value="[\p{IsBasicLatin}\p{IsLatin-1Supplement}]*" />
     </xs:restriction>
   </xs:simpleType>
-  
+
   <!-- cpuType specifies a selection of Cortex-M and Secure-Cores. This list will get extended as new processors are released -->
   <xs:simpleType name="cpuNameType">
     <xs:restriction base="xs:token">
@@ -82,6 +88,7 @@
       <xs:enumeration value="CM23"/>
       <xs:enumeration value="CM3"/>
       <xs:enumeration value="CM33"/>
+      <xs:enumeration value="CM35P"/>
       <xs:enumeration value="SC300"/>
       <xs:enumeration value="CM4"/>
       <xs:enumeration value="CM7"/>
@@ -280,8 +287,8 @@
       <xs:element name="value" type="xs:integer"/>
     </xs:sequence>
   </xs:complexType>
-  <!-- register properties group specifies register size, access permission and reset value 
-       this is used in multiple locations. Settings are inherited downstream. -->  
+  <!-- register properties group specifies register size, access permission and reset value
+       this is used in multiple locations. Settings are inherited downstream. -->
   <xs:group name="registerPropertiesGroup">
     <xs:sequence>
       <xs:element name="size" type="scaledNonNegativeInteger" minOccurs="0"/>
@@ -292,7 +299,7 @@
       <xs:element name="resetMask" type="scaledNonNegativeInteger" minOccurs="0"/>
     </xs:sequence>
   </xs:group>
-  <!-- bitRangeLsbMsbStyle specifies the bit position of a field within a register 
+  <!-- bitRangeLsbMsbStyle specifies the bit position of a field within a register
        by specifying the least significant and the most significant bit position -->
   <xs:group name="bitRangeLsbMsbStyle">
     <xs:sequence>
@@ -305,12 +312,12 @@
   <xs:group name="bitRangeOffsetWidthStyle">
     <xs:sequence>
       <xs:element name="bitOffset" type="scaledNonNegativeInteger"/>
-      <xs:element name="bitWidth" type="scaledNonNegativeInteger" minOccurs="0"/>   
-    </xs:sequence> 
+      <xs:element name="bitWidth" type="scaledNonNegativeInteger" minOccurs="0"/>
+    </xs:sequence>
   </xs:group>
-  
+
   <!-- dimElementGroup specifies the number of array elements (dim), the address offset
-       between to consecutive array elements and an a comma seperated list of strings 
+       between to consecutive array elements and an a comma seperated list of strings
        being used for identifying each element in the array -->
   <xs:group name="dimElementGroup">
     <xs:sequence>
@@ -336,6 +343,8 @@
       <xs:element name="fpuPresent" type="xs:boolean" minOccurs="0"/>
       <!-- V1.2: fpuDP specifies a double precision floating point hardware unit is physically present-->
       <xs:element name="fpuDP" type="xs:boolean" minOccurs="0"/>
+      <!-- V1.3: dspPresent specifies whether the optional SIMD instructions are supported by processor -->
+      <xs:element name="dspPresent" type="xs:boolean" minOccurs="0"/>
       <!-- V1.2: icachePresent specifies that an instruction cache is physically present-->
       <xs:element name="icachePresent" type="xs:boolean" minOccurs="0"/>
       <!-- V1.2: dcachePresent specifies that a data cache is physically present-->
@@ -396,7 +405,7 @@
       </xs:choice>
     </xs:sequence>
   </xs:complexType>
-  
+
   <xs:complexType name="enumerationType">
     <xs:sequence>
       <!-- name specfies a reference to this enumeratedValues section for reuse purposes
@@ -404,7 +413,7 @@
       <xs:element name="name" type="identifierType" minOccurs="0"/>
       <!-- overrides the hierarchical enumeration type in the device header file. User is responsible for uniqueness across description -->
       <xs:element name="headerEnumName" type="identifierType" minOccurs="0"/>
-      <!-- usage specifies whether this enumeration is to be used for read or write or 
+      <!-- usage specifies whether this enumeration is to be used for read or write or
                                                        (read and write) accesses -->
       <xs:element name="usage" type="enumUsageType" minOccurs="0"/>
       <!-- enumeratedValue derivedFrom=<identifierType> -->
@@ -426,7 +435,7 @@
       <!-- name specifies a field's name. The System Viewer and the device header file will
            use the name of the field as identifier -->
       <xs:element name="name" type="dimableIdentifierType"/>
-      <!-- description contains reference manual level information about the function and 
+      <!-- description contains reference manual level information about the function and
            options of a field -->
       <xs:element name="description" type="stringType" minOccurs="0"/>
       <!-- alternative specifications of the bit position of the field within the register -->
@@ -549,16 +558,16 @@
       <xs:element name="alternatePeripheral" type="dimableIdentifierType" minOccurs="0"/>
       <!-- groupName assigns this peripheral to a group of peripherals. This is only used bye the System View -->
       <xs:element name="groupName" type="xs:Name" minOccurs="0"/>
-      <!-- prependToName specifies a prefix that is placed in front of each register name of this peripheral. 
+      <!-- prependToName specifies a prefix that is placed in front of each register name of this peripheral.
                          The device header file will show the registers in a C-Struct of the peripheral without the prefix. -->
       <xs:element name="prependToName" type="identifierType" minOccurs="0"/>
-      <!-- appendToName is a postfix that is appended to each register name of this peripheral. The device header 
+      <!-- appendToName is a postfix that is appended to each register name of this peripheral. The device header
                          file will sho the registers in a C-Struct of the peripheral without the postfix -->
       <xs:element name="appendToName" type="identifierType" minOccurs="0"/>
       <!-- V1.1: headerStructName specifies the name for the peripheral structure typedef
                          used in the device header generation instead of the peripheral name -->
       <xs:element name="headerStructName" type="dimableIdentifierType" minOccurs="0"/>
-      <!-- disableCondition contains a logical expression based on constants and register or bit-field values 
+      <!-- disableCondition contains a logical expression based on constants and register or bit-field values
                          if the condition is evaluated to true, the peripheral display will be disabled -->
       <xs:element name="disableCondition" type="stringType" minOccurs="0"/>
       <!-- baseAddress specifies the absolute base address of a peripheral. For derived peripherals it is mandatory
@@ -567,21 +576,21 @@
       <!-- registerPropertiesGroup elements specify the default values for register size, access permission and
                          reset value. These default values are inherited to all registers contained in this peripheral -->
       <xs:group ref="registerPropertiesGroup" minOccurs="0"/>
-      <!-- addressBlock specifies one or more address ranges that are assigned exclusively to this peripheral. 
+      <!-- addressBlock specifies one or more address ranges that are assigned exclusively to this peripheral.
                          derived peripherals may have no addressBlock, however none-derived peripherals are required to specify
                          at least one address block -->
       <xs:element name="addressBlock" type="addressBlockType" minOccurs="0" maxOccurs="unbounded"/>
       <!-- interrupt specifies can specify one or more interrtupts by name, description and value -->
       <xs:element name="interrupt" type="interruptType" minOccurs="0" maxOccurs="unbounded"/>
       <!-- registers section contains all registers owned by the peripheral. In case a peripheral gets derived it does
-                        not have its own registers section, hence this section is optional. A unique peripheral without a 
+                        not have its own registers section, hence this section is optional. A unique peripheral without a
                         registers section is not allowed -->
       <xs:element name="registers" type="registersType" minOccurs="0" maxOccurs="1">
       </xs:element>
     </xs:sequence>
     <xs:attribute name="derivedFrom" type="dimableIdentifierType" use="optional"/>
   </xs:complexType>
-  
+
   <!-- ==================================================== -->
   <!-- The top level element of a description is the device -->
   <!-- ==================================================== -->
@@ -607,7 +616,7 @@
         <!-- V1.1: the tag specifies the filename without extension of the CMSIS System Device include file.
              This tag is used by the header file generator for customizing the include statement referencing the
              CMSIS system file within the CMSIS device header file. By default the filename is "system_<device.name>"
-             In cases a device series shares a single system header file, the name of the series shall be used 
+             In cases a device series shares a single system header file, the name of the series shall be used
              instead of the individual device name. -->
         <xs:element name="headerSystemFilename" type="identifierType" minOccurs="0"/>
         <!-- V1.1: headerDefinitionPrefix specifies the string being prepended to all names of types defined in
diff --git a/docs/SVD/html/cmsis.css b/docs/SVD/html/cmsis.css
index bba1010..586d4d2 100644
--- a/docs/SVD/html/cmsis.css
+++ b/docs/SVD/html/cmsis.css
@@ -1148,7 +1148,7 @@
 
 .image
 {
-        text-align: center;
+        text-align: left;
 }
 
 .dotgraph
diff --git a/docs/SVD/html/elem_cpu.html b/docs/SVD/html/elem_cpu.html
index af2a026..0ca7304 100644
--- a/docs/SVD/html/elem_cpu.html
+++ b/docs/SVD/html/elem_cpu.html
@@ -152,6 +152,7 @@
 <li><span class="XML-Token">CM23</span>: Arm Cortex-M23</li>
 <li><span class="XML-Token">CM3</span>: Arm Cortex-M3</li>
 <li><span class="XML-Token">CM33</span>: Arm Cortex-M33</li>
+<li><span class="XML-Token">CM35P</span>: Arm Cortex-M35P</li>
 <li><span class="XML-Token">SC300</span>: Arm Secure Core SC300</li>
 <li><span class="XML-Token">CM4</span>: Arm Cortex-M4</li>
 <li><span class="XML-Token">CM7</span>: Arm Cortex-M7</li>
@@ -180,10 +181,12 @@
 <tr>
 <td>mpuPresent  </td><td>Indicate whether the processor is equipped with a memory protection unit (MPU). This tag is either set to <span class="XML-Token">true</span> or <span class="XML-Token">false</span>, <span class="XML-Token">1</span> or <span class="XML-Token">0</span>. </td><td>boolean  </td><td>1..1   </td></tr>
 <tr>
-<td>fpuPresent  </td><td>Indicate whether the processor is equipped with a hardware floating point unit (FPU). Cortex-M4, Cortex-M7 and Cortex-M33 are the only available Cortex-M processor with an optional FPU. This tag is either set to <span class="XML-Token">true</span> or <span class="XML-Token">false</span>, <span class="XML-Token">1</span> or <span class="XML-Token">0</span>. </td><td>boolean  </td><td>1..1   </td></tr>
+<td>fpuPresent  </td><td>Indicate whether the processor is equipped with a hardware floating point unit (FPU). Cortex-M4, Cortex-M7, Cortex-M33 and Cortex-M35P are the only available Cortex-M processor with an optional FPU. This tag is either set to <span class="XML-Token">true</span> or <span class="XML-Token">false</span>, <span class="XML-Token">1</span> or <span class="XML-Token">0</span>. </td><td>boolean  </td><td>1..1   </td></tr>
 <tr>
 <td>fpuDP  </td><td>Indicate whether the processor is equipped with a double precision floating point unit. This element is valid only when <em>&lt;fpuPresent&gt;</em> is set to <span class="XML-Token">true</span>. Currently, only Cortex-M7 processors can have a double precision floating point unit. </td><td>boolean </td><td>0..1   </td></tr>
 <tr>
+<td>dspPresent  </td><td>Indicates whether the processor implements the optional SIMD DSP extensions (DSP). Cortex-M33 and Cortex-M35P are the only available Cortex-M processor with an optional DSP extension. For ARMv7M SIMD DSP extensions are a mandatory part of Cortex-M4 and Cortex-M7. This tag is either set to <span class="XML-Token">true</span> or <span class="XML-Token">false</span>, <span class="XML-Token">1</span> or <span class="XML-Token">0</span>.. This element is mandatory for Cortex-M33, Cortex-M35P and future processors with optional SIMD DSP instruction set. </td><td>boolean  </td><td>0..1   </td></tr>
+<tr>
 <td>icachePresent </td><td>Indicate whether the processor has an instruction cache. Note: only for Cortex-M7-based devices.  </td><td>boolean  </td><td>0..1   </td></tr>
 <tr>
 <td>dcachePresent </td><td>Indicate whether the processor has a data cache. Note: only for Cortex-M7-based devices.  </td><td>boolean  </td><td>0..1   </td></tr>
@@ -289,7 +292,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="svd_Format_pg.html">SVD Description (*.svd) Format</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-SVD by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:05 for CMSIS-SVD Version 1.3.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/SVD/html/elem_device.html b/docs/SVD/html/elem_device.html
index cf66a15..0f306ef 100644
--- a/docs/SVD/html/elem_device.html
+++ b/docs/SVD/html/elem_device.html
@@ -213,7 +213,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="svd_Format_pg.html">SVD Description (*.svd) Format</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-SVD by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:05 for CMSIS-SVD Version 1.3.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/SVD/html/elem_peripherals.html b/docs/SVD/html/elem_peripherals.html
index 93f6093..b9c9e45 100644
--- a/docs/SVD/html/elem_peripherals.html
+++ b/docs/SVD/html/elem_peripherals.html
@@ -289,7 +289,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="svd_Format_pg.html">SVD Description (*.svd) Format</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-SVD by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:05 for CMSIS-SVD Version 1.3.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/SVD/html/elem_registers.html b/docs/SVD/html/elem_registers.html
index 6139185..63613a3 100644
--- a/docs/SVD/html/elem_registers.html
+++ b/docs/SVD/html/elem_registers.html
@@ -434,7 +434,6 @@
 <div class="line">    &lt;bitOffset&gt;1&lt;/bitOffset&gt;</div>
 <div class="line">    &lt;bitWidth&gt;3&lt;/bitWidth&gt;</div>
 <div class="line">    &lt;access&gt;read-write&lt;/access&gt;</div>
-<div class="line">    &lt;resetValue&gt;0x0&lt;/resetValue&gt;</div>
 <div class="line">    &lt;modifiedWriteValues&gt;oneToSet&lt;/modifiedWriteValues&gt;</div>
 <div class="line">    &lt;writeConstraint&gt;</div>
 <div class="line">      &lt;range&gt;</div>
@@ -660,7 +659,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="svd_Format_pg.html">SVD Description (*.svd) Format</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-SVD by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:05 for CMSIS-SVD Version 1.3.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/SVD/html/elem_special.html b/docs/SVD/html/elem_special.html
index b05624a..7dfc4d8 100644
--- a/docs/SVD/html/elem_special.html
+++ b/docs/SVD/html/elem_special.html
@@ -290,7 +290,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="svd_Format_pg.html">SVD Description (*.svd) Format</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-SVD by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:05 for CMSIS-SVD Version 1.3.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/SVD/html/index.html b/docs/SVD/html/index.html
index 8792ca9..459b6a3 100644
--- a/docs/SVD/html/index.html
+++ b/docs/SVD/html/index.html
@@ -157,7 +157,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-SVD by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:05 for CMSIS-SVD Version 1.3.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/SVD/html/pages.html b/docs/SVD/html/pages.html
index 44a432d..a1c6a6c 100644
--- a/docs/SVD/html/pages.html
+++ b/docs/SVD/html/pages.html
@@ -131,7 +131,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-SVD by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:05 for CMSIS-SVD Version 1.3.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/SVD/html/schema_1_2_gr.html b/docs/SVD/html/schema_1_2_gr.html
index faff623..99c32ae 100644
--- a/docs/SVD/html/schema_1_2_gr.html
+++ b/docs/SVD/html/schema_1_2_gr.html
@@ -111,43 +111,49 @@
 </div><!--header-->
 <div class="contents">
 <div class="textblock"><pre class="fragment">&lt;?xml version="1.0" encoding="UTF-8"?&gt;
-&lt;!-- 
- 
+&lt;!--
+
   Copyright (c) 2013-2016 ARM Limited. All rights reserved.
- 
+
   SPDX-License-Identifier: Apache-2.0
- 
+
   Licensed under the Apache License, Version 2.0 (the License); you may
   not use this file except in compliance with the License.
   You may obtain a copy of the License at
- 
+
   www.apache.org/licenses/LICENSE-2.0
- 
+
   Unless required by applicable law or agreed to in writing, software
   distributed under the License is distributed on an AS IS BASIS, WITHOUT
   WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
   See the License for the specific language governing permissions and
   limitations under the License.
- 
-  $Date:         23. September 2016
-  $Revision:     1.3.3
+
+  $Date:         04. September 2018
+  $Revision:     1.3.5
+
+  Version 1.3.5:
+  - add CM35P as enumeration value for cpuNameType.
+
+  Version 1.3.4:
+  - add dspPresent element to cpuType as SIMD instructions became optional for new processors.
 
   Version 1.3.3:
   - update file header to Apache 2.0 License
   - add dimableIdentifierType, as a copy of previous identifierType adding "%s",
   - update identifierType to only allow names without %s included.
   - remove enumerationNameType.
-  - add headerEnumName to enumerationType and to dimArrayIndexType for peripheral arrays 
+  - add headerEnumName to enumerationType and to dimArrayIndexType for peripheral arrays
     overwriting hierarchically generated names
   - add dimName to dimElementGroup. Only valid in &lt;cluster&gt; context, ignored otherwise.
-  
+
   Version 1.3.2:
   adding dimIndexArray to peripheral-, cluster- and register-array to describe
   enumeration of array indices.
 
   Version 1.3.1:
   fixed peripheral name element type to identifierType to support %s for peripheral arrays
-  added optional protection element to addressBlockType and added p=privileged 
+  added optional protection element to addressBlockType and added p=privileged
 
   Version 1.3:
   added dim to peripherals to describe an array of peripherals.
@@ -155,16 +161,16 @@
   added protection element as part of the registerPropertiesGroup indicating
   special permissions are required for accessing a register.
   CPU Section extended with description of the Secure Attribution Unit.
-  
+
   Version 1.2:
   Cortex-M7 support items have been added as optional tags for the device header file generation:
   fpuDP, icachePresent, dcachePresent, itcmPresent, dtcmPresent
-  
+
   Version 1.1:
   For backward compatibility all additional tags have been made optional.
   Extensions may be mandatory for successful device header file generation
   Other changes are related to some restructuring of the schema.
-  
+
   Note that the memory section has been removed since this would limit the
   reuse of descriptions for a series of devices.
  --&gt;
@@ -182,7 +188,7 @@
       &lt;xs:pattern value="[\p{IsBasicLatin}\p{IsLatin-1Supplement}]*" /&gt;
     &lt;/xs:restriction&gt;
   &lt;/xs:simpleType&gt;
-  
+
   &lt;!-- cpuType specifies a selection of Cortex-M and Secure-Cores. This list will get extended as new processors are released --&gt;
   &lt;xs:simpleType name="cpuNameType"&gt;
     &lt;xs:restriction base="xs:token"&gt;
@@ -194,6 +200,7 @@
       &lt;xs:enumeration value="CM23"/&gt;
       &lt;xs:enumeration value="CM3"/&gt;
       &lt;xs:enumeration value="CM33"/&gt;
+      &lt;xs:enumeration value="CM35P"/&gt;
       &lt;xs:enumeration value="SC300"/&gt;
       &lt;xs:enumeration value="CM4"/&gt;
       &lt;xs:enumeration value="CM7"/&gt;
@@ -392,8 +399,8 @@
       &lt;xs:element name="value" type="xs:integer"/&gt;
     &lt;/xs:sequence&gt;
   &lt;/xs:complexType&gt;
-  &lt;!-- register properties group specifies register size, access permission and reset value 
-       this is used in multiple locations. Settings are inherited downstream. --&gt;  
+  &lt;!-- register properties group specifies register size, access permission and reset value
+       this is used in multiple locations. Settings are inherited downstream. --&gt;
   &lt;xs:group name="registerPropertiesGroup"&gt;
     &lt;xs:sequence&gt;
       &lt;xs:element name="size" type="scaledNonNegativeInteger" minOccurs="0"/&gt;
@@ -404,7 +411,7 @@
       &lt;xs:element name="resetMask" type="scaledNonNegativeInteger" minOccurs="0"/&gt;
     &lt;/xs:sequence&gt;
   &lt;/xs:group&gt;
-  &lt;!-- bitRangeLsbMsbStyle specifies the bit position of a field within a register 
+  &lt;!-- bitRangeLsbMsbStyle specifies the bit position of a field within a register
        by specifying the least significant and the most significant bit position --&gt;
   &lt;xs:group name="bitRangeLsbMsbStyle"&gt;
     &lt;xs:sequence&gt;
@@ -417,12 +424,12 @@
   &lt;xs:group name="bitRangeOffsetWidthStyle"&gt;
     &lt;xs:sequence&gt;
       &lt;xs:element name="bitOffset" type="scaledNonNegativeInteger"/&gt;
-      &lt;xs:element name="bitWidth" type="scaledNonNegativeInteger" minOccurs="0"/&gt;   
-    &lt;/xs:sequence&gt; 
+      &lt;xs:element name="bitWidth" type="scaledNonNegativeInteger" minOccurs="0"/&gt;
+    &lt;/xs:sequence&gt;
   &lt;/xs:group&gt;
-  
+
   &lt;!-- dimElementGroup specifies the number of array elements (dim), the address offset
-       between to consecutive array elements and an a comma seperated list of strings 
+       between to consecutive array elements and an a comma seperated list of strings
        being used for identifying each element in the array --&gt;
   &lt;xs:group name="dimElementGroup"&gt;
     &lt;xs:sequence&gt;
@@ -448,6 +455,8 @@
       &lt;xs:element name="fpuPresent" type="xs:boolean" minOccurs="0"/&gt;
       &lt;!-- V1.2: fpuDP specifies a double precision floating point hardware unit is physically present--&gt;
       &lt;xs:element name="fpuDP" type="xs:boolean" minOccurs="0"/&gt;
+      &lt;!-- V1.3: dspPresent specifies whether the optional SIMD instructions are supported by processor --&gt;
+      &lt;xs:element name="dspPresent" type="xs:boolean" minOccurs="0"/&gt;
       &lt;!-- V1.2: icachePresent specifies that an instruction cache is physically present--&gt;
       &lt;xs:element name="icachePresent" type="xs:boolean" minOccurs="0"/&gt;
       &lt;!-- V1.2: dcachePresent specifies that a data cache is physically present--&gt;
@@ -508,7 +517,7 @@
       &lt;/xs:choice&gt;
     &lt;/xs:sequence&gt;
   &lt;/xs:complexType&gt;
-  
+
   &lt;xs:complexType name="enumerationType"&gt;
     &lt;xs:sequence&gt;
       &lt;!-- name specfies a reference to this enumeratedValues section for reuse purposes
@@ -516,7 +525,7 @@
       &lt;xs:element name="name" type="identifierType" minOccurs="0"/&gt;
       &lt;!-- overrides the hierarchical enumeration type in the device header file. User is responsible for uniqueness across description --&gt;
       &lt;xs:element name="headerEnumName" type="identifierType" minOccurs="0"/&gt;
-      &lt;!-- usage specifies whether this enumeration is to be used for read or write or 
+      &lt;!-- usage specifies whether this enumeration is to be used for read or write or
                                                        (read and write) accesses --&gt;
       &lt;xs:element name="usage" type="enumUsageType" minOccurs="0"/&gt;
       &lt;!-- enumeratedValue derivedFrom=&lt;identifierType&gt; --&gt;
@@ -538,7 +547,7 @@
       &lt;!-- name specifies a field's name. The System Viewer and the device header file will
            use the name of the field as identifier --&gt;
       &lt;xs:element name="name" type="dimableIdentifierType"/&gt;
-      &lt;!-- description contains reference manual level information about the function and 
+      &lt;!-- description contains reference manual level information about the function and
            options of a field --&gt;
       &lt;xs:element name="description" type="stringType" minOccurs="0"/&gt;
       &lt;!-- alternative specifications of the bit position of the field within the register --&gt;
@@ -661,16 +670,16 @@
       &lt;xs:element name="alternatePeripheral" type="dimableIdentifierType" minOccurs="0"/&gt;
       &lt;!-- groupName assigns this peripheral to a group of peripherals. This is only used bye the System View --&gt;
       &lt;xs:element name="groupName" type="xs:Name" minOccurs="0"/&gt;
-      &lt;!-- prependToName specifies a prefix that is placed in front of each register name of this peripheral. 
+      &lt;!-- prependToName specifies a prefix that is placed in front of each register name of this peripheral.
                          The device header file will show the registers in a C-Struct of the peripheral without the prefix. --&gt;
       &lt;xs:element name="prependToName" type="identifierType" minOccurs="0"/&gt;
-      &lt;!-- appendToName is a postfix that is appended to each register name of this peripheral. The device header 
+      &lt;!-- appendToName is a postfix that is appended to each register name of this peripheral. The device header
                          file will sho the registers in a C-Struct of the peripheral without the postfix --&gt;
       &lt;xs:element name="appendToName" type="identifierType" minOccurs="0"/&gt;
       &lt;!-- V1.1: headerStructName specifies the name for the peripheral structure typedef
                          used in the device header generation instead of the peripheral name --&gt;
       &lt;xs:element name="headerStructName" type="dimableIdentifierType" minOccurs="0"/&gt;
-      &lt;!-- disableCondition contains a logical expression based on constants and register or bit-field values 
+      &lt;!-- disableCondition contains a logical expression based on constants and register or bit-field values
                          if the condition is evaluated to true, the peripheral display will be disabled --&gt;
       &lt;xs:element name="disableCondition" type="stringType" minOccurs="0"/&gt;
       &lt;!-- baseAddress specifies the absolute base address of a peripheral. For derived peripherals it is mandatory
@@ -679,21 +688,21 @@
       &lt;!-- registerPropertiesGroup elements specify the default values for register size, access permission and
                          reset value. These default values are inherited to all registers contained in this peripheral --&gt;
       &lt;xs:group ref="registerPropertiesGroup" minOccurs="0"/&gt;
-      &lt;!-- addressBlock specifies one or more address ranges that are assigned exclusively to this peripheral. 
+      &lt;!-- addressBlock specifies one or more address ranges that are assigned exclusively to this peripheral.
                          derived peripherals may have no addressBlock, however none-derived peripherals are required to specify
                          at least one address block --&gt;
       &lt;xs:element name="addressBlock" type="addressBlockType" minOccurs="0" maxOccurs="unbounded"/&gt;
       &lt;!-- interrupt specifies can specify one or more interrtupts by name, description and value --&gt;
       &lt;xs:element name="interrupt" type="interruptType" minOccurs="0" maxOccurs="unbounded"/&gt;
       &lt;!-- registers section contains all registers owned by the peripheral. In case a peripheral gets derived it does
-                        not have its own registers section, hence this section is optional. A unique peripheral without a 
+                        not have its own registers section, hence this section is optional. A unique peripheral without a
                         registers section is not allowed --&gt;
       &lt;xs:element name="registers" type="registersType" minOccurs="0" maxOccurs="1"&gt;
       &lt;/xs:element&gt;
     &lt;/xs:sequence&gt;
     &lt;xs:attribute name="derivedFrom" type="dimableIdentifierType" use="optional"/&gt;
   &lt;/xs:complexType&gt;
-  
+
   &lt;!-- ==================================================== --&gt;
   &lt;!-- The top level element of a description is the device --&gt;
   &lt;!-- ==================================================== --&gt;
@@ -719,7 +728,7 @@
         &lt;!-- V1.1: the tag specifies the filename without extension of the CMSIS System Device include file.
              This tag is used by the header file generator for customizing the include statement referencing the
              CMSIS system file within the CMSIS device header file. By default the filename is "system_&lt;device.name&gt;"
-             In cases a device series shares a single system header file, the name of the series shall be used 
+             In cases a device series shares a single system header file, the name of the series shall be used
              instead of the individual device name. --&gt;
         &lt;xs:element name="headerSystemFilename" type="identifierType" minOccurs="0"/&gt;
         &lt;!-- V1.1: headerDefinitionPrefix specifies the string being prepended to all names of types defined in
@@ -763,7 +772,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-SVD by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:05 for CMSIS-SVD Version 1.3.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/SVD/html/svd_Example_pg.html b/docs/SVD/html/svd_Example_pg.html
index 26e9cba..0304c4e 100644
--- a/docs/SVD/html/svd_Example_pg.html
+++ b/docs/SVD/html/svd_Example_pg.html
@@ -904,7 +904,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="svd_Format_pg.html">SVD Description (*.svd) Format</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-SVD by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:05 for CMSIS-SVD Version 1.3.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/SVD/html/svd_Format_pg.html b/docs/SVD/html/svd_Format_pg.html
index 4515335..674cd8b 100644
--- a/docs/SVD/html/svd_Format_pg.html
+++ b/docs/SVD/html/svd_Format_pg.html
@@ -163,7 +163,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-SVD by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:05 for CMSIS-SVD Version 1.3.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/SVD/html/svd_SVDConv_pg.html b/docs/SVD/html/svd_SVDConv_pg.html
index 1c33724..50fb1d9 100644
--- a/docs/SVD/html/svd_SVDConv_pg.html
+++ b/docs/SVD/html/svd_SVDConv_pg.html
@@ -268,7 +268,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-SVD by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:05 for CMSIS-SVD Version 1.3.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/SVD/html/svd_revisionHistory.html b/docs/SVD/html/svd_revisionHistory.html
index ca2a44b..49c9632 100644
--- a/docs/SVD/html/svd_revisionHistory.html
+++ b/docs/SVD/html/svd_revisionHistory.html
@@ -168,7 +168,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-SVD by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:05 for CMSIS-SVD Version 1.3.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/SVD/html/svd_validate_file_pg.html b/docs/SVD/html/svd_validate_file_pg.html
index db144b8..778daf6 100644
--- a/docs/SVD/html/svd_validate_file_pg.html
+++ b/docs/SVD/html/svd_validate_file_pg.html
@@ -145,7 +145,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-SVD by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:05 for CMSIS-SVD Version 1.3.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/SVD/html/svd_xml_conventions_gr.html b/docs/SVD/html/svd_xml_conventions_gr.html
index af40a27..5739c9a 100644
--- a/docs/SVD/html/svd_xml_conventions_gr.html
+++ b/docs/SVD/html/svd_xml_conventions_gr.html
@@ -143,7 +143,7 @@
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="svd_Format_pg.html">SVD Description (*.svd) Format</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-SVD by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:05 for CMSIS-SVD Version 1.3.3 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Zone/genmodel/allclasses-frame.html b/docs/Zone/genmodel/allclasses-frame.html
deleted file mode 100644
index 06dfede..0000000
--- a/docs/Zone/genmodel/allclasses-frame.html
+++ /dev/null
@@ -1,25 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
-<!-- NewPage -->
-<html lang="en">
-<head>
-<!-- Generated by javadoc (1.8.0_131) on Thu Jul 06 18:02:39 CEST 2017 -->
-<title>All Classes</title>
-<meta name="date" content="2017-07-06">
-<link rel="stylesheet" type="text/css" href="stylesheet.css" title="Style">
-<script type="text/javascript" src="script.js"></script>
-</head>
-<body>
-<h1 class="bar">All&nbsp;Classes</h1>
-<div class="indexContainer">
-<ul>
-<li><a href="com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data" target="classFrame">FmBlock</a></li>
-<li><a href="com/arm/cmsis/zone/gen/data/FmCapture.html" title="class in com.arm.cmsis.zone.gen.data" target="classFrame">FmCapture</a></li>
-<li><a href="com/arm/cmsis/zone/gen/data/FmDevice.html" title="class in com.arm.cmsis.zone.gen.data" target="classFrame">FmDevice</a></li>
-<li><a href="com/arm/cmsis/zone/gen/data/FmInterrupt.html" title="class in com.arm.cmsis.zone.gen.data" target="classFrame">FmInterrupt</a></li>
-<li><a href="com/arm/cmsis/zone/gen/data/FmProcess.html" title="class in com.arm.cmsis.zone.gen.data" target="classFrame">FmProcess</a></li>
-<li><a href="com/arm/cmsis/zone/gen/data/FmProcessor.html" title="class in com.arm.cmsis.zone.gen.data" target="classFrame">FmProcessor</a></li>
-<li><a href="com/arm/cmsis/zone/gen/data/FmZone.html" title="class in com.arm.cmsis.zone.gen.data" target="classFrame">FmZone</a></li>
-</ul>
-</div>
-</body>
-</html>
diff --git a/docs/Zone/genmodel/allclasses-noframe.html b/docs/Zone/genmodel/allclasses-noframe.html
deleted file mode 100644
index 3804b6d..0000000
--- a/docs/Zone/genmodel/allclasses-noframe.html
+++ /dev/null
@@ -1,25 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
-<!-- NewPage -->
-<html lang="en">
-<head>
-<!-- Generated by javadoc (1.8.0_131) on Thu Jul 06 18:02:39 CEST 2017 -->
-<title>All Classes</title>
-<meta name="date" content="2017-07-06">
-<link rel="stylesheet" type="text/css" href="stylesheet.css" title="Style">
-<script type="text/javascript" src="script.js"></script>
-</head>
-<body>
-<h1 class="bar">All&nbsp;Classes</h1>
-<div class="indexContainer">
-<ul>
-<li><a href="com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a></li>
-<li><a href="com/arm/cmsis/zone/gen/data/FmCapture.html" title="class in com.arm.cmsis.zone.gen.data">FmCapture</a></li>
-<li><a href="com/arm/cmsis/zone/gen/data/FmDevice.html" title="class in com.arm.cmsis.zone.gen.data">FmDevice</a></li>
-<li><a href="com/arm/cmsis/zone/gen/data/FmInterrupt.html" title="class in com.arm.cmsis.zone.gen.data">FmInterrupt</a></li>
-<li><a href="com/arm/cmsis/zone/gen/data/FmProcess.html" title="class in com.arm.cmsis.zone.gen.data">FmProcess</a></li>
-<li><a href="com/arm/cmsis/zone/gen/data/FmProcessor.html" title="class in com.arm.cmsis.zone.gen.data">FmProcessor</a></li>
-<li><a href="com/arm/cmsis/zone/gen/data/FmZone.html" title="class in com.arm.cmsis.zone.gen.data">FmZone</a></li>
-</ul>
-</div>
-</body>
-</html>
diff --git a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/FmBlock.html b/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/FmBlock.html
deleted file mode 100644
index 5e49489..0000000
--- a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/FmBlock.html
+++ /dev/null
@@ -1,623 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
-<!-- NewPage -->
-<html lang="en">
-<head>
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-<title>FmBlock</title>
-<meta name="date" content="2017-07-06">
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-<!-- ======== START OF CLASS DATA ======== -->
-<div class="header">
-<div class="subTitle">com.arm.cmsis.zone.gen.data</div>
-<h2 title="Class FmBlock" class="title">Class FmBlock</h2>
-</div>
-<div class="contentContainer">
-<ul class="inheritance">
-<li>java.lang.Object</li>
-<li>
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-<pre>public class <span class="typeNameLabel">FmBlock</span>
-extends java.lang.Object</pre>
-<div class="block">Block - Generator Data Model Element
- 
- A block specifies the properties for a certain area of logical memory.</div>
-<dl>
-<dt><span class="simpleTagLabel">Author:</span></dt>
-<dd>Jonatan Antoni</dd>
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-<tr>
-<th class="colOne" scope="col">Constructor and Description</th>
-</tr>
-<tr class="altColor">
-<td class="colOne"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html#FmBlock-com.arm.cmsis.zone.data.ICpMemoryBlock-">FmBlock</a></span>(com.arm.cmsis.zone.data.ICpMemoryBlock&nbsp;block)</code>
-<div class="block">Create a Block generator data model element.</div>
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-<th class="colLast" scope="col">Method and Description</th>
-</tr>
-<tr id="i0" class="altColor">
-<td class="colFirst"><code>java.util.Collection&lt;<a href="../../../../../../com/arm/cmsis/zone/gen/data/FmCapture.html" title="class in com.arm.cmsis.zone.gen.data">FmCapture</a>&gt;</code></td>
-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html#getCaptureList--">getCaptureList</a></span>()</code>
-<div class="block">Get a collection of capture elements for this block.</div>
-</td>
-</tr>
-<tr id="i1" class="rowColor">
-<td class="colFirst"><code>java.lang.String</code></td>
-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html#getInfo--">getInfo</a></span>()</code>
-<div class="block">Get the brief description for this block.</div>
-</td>
-</tr>
-<tr id="i2" class="altColor">
-<td class="colFirst"><code>java.util.Map&lt;java.lang.Long,<a href="../../../../../../com/arm/cmsis/zone/gen/data/FmInterrupt.html" title="class in com.arm.cmsis.zone.gen.data">FmInterrupt</a>&gt;</code></td>
-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html#getInterrupts--">getInterrupts</a></span>()</code>
-<div class="block">Get a hash with available interrupts.</div>
-</td>
-</tr>
-<tr id="i3" class="rowColor">
-<td class="colFirst"><code>java.lang.String</code></td>
-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html#getName--">getName</a></span>()</code>
-<div class="block">Get the blocks name.</div>
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-<td class="colFirst"><code>java.util.Map&lt;java.lang.String,java.lang.String&gt;</code></td>
-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html#getProperties--">getProperties</a></span>()</code>
-<div class="block">Get a hash with associated key-values-properties.</div>
-</td>
-</tr>
-<tr id="i5" class="rowColor">
-<td class="colFirst"><code>long</code></td>
-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html#getSize--">getSize</a></span>()</code>
-<div class="block">Get the size of this block in bytes.</div>
-</td>
-</tr>
-<tr id="i6" class="altColor">
-<td class="colFirst"><code>long</code></td>
-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html#getStart--">getStart</a></span>()</code>
-<div class="block">Get the start address of this block.</div>
-</td>
-</tr>
-<tr id="i7" class="rowColor">
-<td class="colFirst"><code>java.util.Collection&lt;<a href="../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a>&gt;</code></td>
-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html#getSubBlocks--">getSubBlocks</a></span>()</code>
-<div class="block">Get a collection of blocks this one is divided into.</div>
-</td>
-</tr>
-<tr id="i8" class="altColor">
-<td class="colFirst"><code>boolean</code></td>
-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html#isCallable--">isCallable</a></span>()</code>
-<div class="block">Get non-secure-callable access attribute.</div>
-</td>
-</tr>
-<tr id="i9" class="rowColor">
-<td class="colFirst"><code>boolean</code></td>
-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html#isExecutable--">isExecutable</a></span>()</code>
-<div class="block">Get executable access attribute.</div>
-</td>
-</tr>
-<tr id="i10" class="altColor">
-<td class="colFirst"><code>boolean</code></td>
-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html#isNonSecure--">isNonSecure</a></span>()</code>
-<div class="block">Get non-secure access attribute.</div>
-</td>
-</tr>
-<tr id="i11" class="rowColor">
-<td class="colFirst"><code>boolean</code></td>
-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html#isPeripheral--">isPeripheral</a></span>()</code>
-<div class="block">Get peripheral access attribute.</div>
-</td>
-</tr>
-<tr id="i12" class="altColor">
-<td class="colFirst"><code>boolean</code></td>
-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html#isPrivileged--">isPrivileged</a></span>()</code>
-<div class="block">Get privileged access attribute.</div>
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-</tr>
-<tr id="i13" class="rowColor">
-<td class="colFirst"><code>boolean</code></td>
-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html#isReadable--">isReadable</a></span>()</code>
-<div class="block">Get readable access attribute.</div>
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-</tr>
-<tr id="i14" class="altColor">
-<td class="colFirst"><code>boolean</code></td>
-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html#isSecure--">isSecure</a></span>()</code>
-<div class="block">Get secure access attribute.</div>
-</td>
-</tr>
-<tr id="i15" class="rowColor">
-<td class="colFirst"><code>boolean</code></td>
-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html#isUnprivileged--">isUnprivileged</a></span>()</code>
-<div class="block">Get unprivileged access attribute.</div>
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-</tr>
-<tr id="i16" class="altColor">
-<td class="colFirst"><code>boolean</code></td>
-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html#isWriteable--">isWriteable</a></span>()</code>
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-<dl>
-<dt><span class="paramLabel">Parameters:</span></dt>
-<dd><code>block</code> - The storage data model element to wrap.</dd>
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-<div class="block">Get the blocks name.</div>
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-<dd>Block name.</dd>
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-<div class="block">Get secure access attribute.</div>
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-<dd>True if block is used as secure access.</dd>
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-<div class="block">Get non-secure-callable access attribute.</div>
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-<dd>True if block is used as non-secure-callable access.</dd>
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-<div class="block">Get non-secure access attribute.</div>
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-<div class="block">Get peripheral access attribute.
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- register access.</div>
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-<dd>True if block is used as peripheral access.</dd>
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-<div class="block">Get readable access attribute.</div>
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-<dd>True if block is readable.</dd>
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-<div class="block">Get writeable access attribute.</div>
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-<dd>True if block is writeable.</dd>
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-<div class="block">Get executable access attribute.</div>
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-<dt><span class="returnLabel">Returns:</span></dt>
-<dd>True if block is executable.</dd>
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-<div class="block">Get unprivileged access attribute.</div>
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-<dt><span class="returnLabel">Returns:</span></dt>
-<dd>True if block can be accessed unprivileged.</dd>
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-<div class="block">Get privileged access attribute.</div>
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-<dd>True if block can only be accessed privileged.</dd>
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-<div class="block">Get a hash with available interrupts.
- 
- The hash associates available interrupt numbers with model elements
- specifying their properties.</div>
-<dl>
-<dt><span class="returnLabel">Returns:</span></dt>
-<dd>Hash of available interrupts</dd>
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-<div class="block">Get the start address of this block.</div>
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-<dd>Start address</dd>
-</dl>
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-<div class="block">Get the size of this block in bytes.</div>
-<dl>
-<dt><span class="returnLabel">Returns:</span></dt>
-<dd>Size in bytes</dd>
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-<pre>public&nbsp;java.lang.String&nbsp;getInfo()</pre>
-<div class="block">Get the brief description for this block.</div>
-<dl>
-<dt><span class="returnLabel">Returns:</span></dt>
-<dd>Brief description, may be empty.</dd>
-</dl>
-</li>
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-<div class="block">Get a collection of capture elements for this block.
- 
- The capture elements define the set of linker symbols
- that should be placed to the block.</div>
-<dl>
-<dt><span class="returnLabel">Returns:</span></dt>
-<dd>Collection of capture elements</dd>
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-<pre>public&nbsp;java.util.Map&lt;java.lang.String,java.lang.String&gt;&nbsp;getProperties()</pre>
-<div class="block">Get a hash with associated key-values-properties.
- 
- The hash associates arbitrary property-keys with their
- values (represented as strings). The properties are
- extracted directly from the storage data model.</div>
-<dl>
-<dt><span class="returnLabel">Returns:</span></dt>
-<dd>Hash of arbitrary properties as key-value-pairs</dd>
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-<h4>getSubBlocks</h4>
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-<div class="block">Get a collection of blocks this one is divided into.</div>
-<dl>
-<dt><span class="returnLabel">Returns:</span></dt>
-<dd>Collection of sub-blocks.</dd>
-</dl>
-</li>
-</ul>
-</li>
-</ul>
-</li>
-</ul>
-</div>
-</div>
-<!-- ========= END OF CLASS DATA ========= -->
-<!-- ======= START OF BOTTOM NAVBAR ====== -->
-<div class="bottomNav"><a name="navbar.bottom">
-<!--   -->
-</a>
-<div class="skipNav"><a href="#skip.navbar.bottom" title="Skip navigation links">Skip navigation links</a></div>
-<a name="navbar.bottom.firstrow">
-<!--   -->
-</a>
-<ul class="navList" title="Navigation">
-<li><a href="../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
-<li class="navBarCell1Rev">Class</li>
-<li><a href="class-use/FmBlock.html">Use</a></li>
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deleted file mode 100644
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-<!-- ======== START OF CLASS DATA ======== -->
-<div class="header">
-<div class="subTitle">com.arm.cmsis.zone.gen.data</div>
-<h2 title="Class FmCapture" class="title">Class FmCapture</h2>
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-<li>java.lang.Object</li>
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-<pre>public class <span class="typeNameLabel">FmCapture</span>
-extends java.lang.Object</pre>
-<div class="block">Capture Item - Generator Data Model Element
- 
- A capture item specifies a set of symbols, filtered
- by compilation unit, which should be used.</div>
-<dl>
-<dt><span class="simpleTagLabel">Author:</span></dt>
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-<td class="colOne"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmCapture.html#FmCapture-com.arm.cmsis.zone.data.ICpCaptureItem-">FmCapture</a></span>(com.arm.cmsis.zone.data.ICpCaptureItem&nbsp;captureItem)</code>
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-<div class="block">Get the filter string for the compilation units to be taken
- into account by this capture.</div>
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-<dl>
-<dt><span class="paramLabel">Parameters:</span></dt>
-<dd><code>captureItem</code> - Storage model element to wrap.</dd>
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-<div class="block">Get the filter string for the compilation units to be taken
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-<dl>
-<dt><span class="returnLabel">Returns:</span></dt>
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-<dl>
-<dt><span class="returnLabel">Returns:</span></dt>
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diff --git a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/FmDevice.html b/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/FmDevice.html
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-<title>FmDevice</title>
-<meta name="date" content="2017-07-06">
-<link rel="stylesheet" type="text/css" href="../../../../../../stylesheet.css" title="Style">
-<script type="text/javascript" src="../../../../../../script.js"></script>
-</head>
-<body>
-<script type="text/javascript"><!--
-    try {
-        if (location.href.indexOf('is-external=true') == -1) {
-            parent.document.title="FmDevice";
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-<noscript>
-<div>JavaScript is disabled on your browser.</div>
-</noscript>
-<!-- ========= START OF TOP NAVBAR ======= -->
-<div class="topNav"><a name="navbar.top">
-<!--   -->
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-<div class="skipNav"><a href="#skip.navbar.top" title="Skip navigation links">Skip navigation links</a></div>
-<a name="navbar.top.firstrow">
-<!--   -->
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-<ul class="navList" title="Navigation">
-<li><a href="../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
-<li class="navBarCell1Rev">Class</li>
-<li><a href="class-use/FmDevice.html">Use</a></li>
-<li><a href="package-tree.html">Tree</a></li>
-<li><a href="../../../../../../deprecated-list.html">Deprecated</a></li>
-<li><a href="../../../../../../index-files/index-1.html">Index</a></li>
-<li><a href="../../../../../../help-doc.html">Help</a></li>
-</ul>
-</div>
-<div class="subNav">
-<ul class="navList">
-<li><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmCapture.html" title="class in com.arm.cmsis.zone.gen.data"><span class="typeNameLink">Prev&nbsp;Class</span></a></li>
-<li><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmInterrupt.html" title="class in com.arm.cmsis.zone.gen.data"><span class="typeNameLink">Next&nbsp;Class</span></a></li>
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-</ul>
-</div>
-<a name="skip.navbar.top">
-<!--   -->
-</a></div>
-<!-- ========= END OF TOP NAVBAR ========= -->
-<!-- ======== START OF CLASS DATA ======== -->
-<div class="header">
-<div class="subTitle">com.arm.cmsis.zone.gen.data</div>
-<h2 title="Class FmDevice" class="title">Class FmDevice</h2>
-</div>
-<div class="contentContainer">
-<ul class="inheritance">
-<li>java.lang.Object</li>
-<li>
-<ul class="inheritance">
-<li>com.arm.cmsis.zone.gen.data.FmDevice</li>
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-<pre>public class <span class="typeNameLabel">FmDevice</span>
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-<div class="block">Device - Generator Data Model Element
- 
- Implements access to detailed informations about a device
- available in the system.</div>
-<dl>
-<dt><span class="simpleTagLabel">Author:</span></dt>
-<dd>Jonatan Antoni</dd>
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-<caption><span>Constructors</span><span class="tabEnd">&nbsp;</span></caption>
-<tr>
-<th class="colOne" scope="col">Constructor and Description</th>
-</tr>
-<tr class="altColor">
-<td class="colOne"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmDevice.html#FmDevice-com.arm.cmsis.zone.data.ICpDeviceResource-">FmDevice</a></span>(com.arm.cmsis.zone.data.ICpDeviceResource&nbsp;device)</code>
-<div class="block">Create Device generator data model element.</div>
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-<th class="colFirst" scope="col">Modifier and Type</th>
-<th class="colLast" scope="col">Method and Description</th>
-</tr>
-<tr id="i0" class="altColor">
-<td class="colFirst"><code>java.util.Collection&lt;<a href="../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a>&gt;</code></td>
-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmDevice.html#getBlocks--">getBlocks</a></span>()</code>
-<div class="block">Get a collection of blocks for this device.</div>
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-<td class="colFirst"><code>java.lang.String</code></td>
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-<div class="block">Get the device name.</div>
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-<tr id="i2" class="altColor">
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-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmDevice.html#getPackageName--">getPackageName</a></span>()</code>
-<div class="block">Get the pack name support for this device is provided by,
- might be empty if no device family pack is available.</div>
-</td>
-</tr>
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-<div class="block">Interrupt - Generator Data Model Element
- 
- A interrupt element gives information about an interrupt
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-<div class="block">Get the interrupt name.</div>
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-<div class="block">Get non-secure usage of this interrupt.</div>
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-<div class="block">Create Interrupt generator data model element.</div>
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-<dt><span class="paramLabel">Parameters:</span></dt>
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- A process (or execution zone) defines a group of threads
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- 
- A processor defines specific informations about individual
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diff --git a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/FmZone.html b/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/FmZone.html
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-<!-- ======== START OF CLASS DATA ======== -->
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-<div class="subTitle">com.arm.cmsis.zone.gen.data</div>
-<h2 title="Class FmZone" class="title">Class FmZone</h2>
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- 
- Implements the root element for the generator data model.
- Gives access to the definition of a single project zone.</div>
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-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmZone.html#getProcesses--">getProcesses</a></span>()</code>
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-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmZone.html#getProcessor--">getProcessor</a></span>()</code>
-<div class="block">Get the processor this zone is linked to.</div>
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-<tr id="i5" class="rowColor">
-<td class="colFirst"><code>java.util.Collection&lt;<a href="../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a>&gt;</code></td>
-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmZone.html#getVisibleBlocks--">getVisibleBlocks</a></span>()</code>
-<div class="block">Get a collection with all leaf blocks visible to this zone.</div>
-</td>
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-<tr id="i6" class="altColor">
-<td class="colFirst"><code>java.util.Collection&lt;<a href="../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a>&gt;</code></td>
-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmZone.html#getVisibleResources--">getVisibleResources</a></span>()</code>
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-<div class="block">Create a Zone generator data model element.</div>
-<dl>
-<dt><span class="paramLabel">Parameters:</span></dt>
-<dd><code>zone</code> - The storage data model element to wrap.</dd>
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-<div class="block">Get the zones name.</div>
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-<div class="block">Get a collection with all blocks assigned to this zone.</div>
-<dl>
-<dt><span class="returnLabel">Returns:</span></dt>
-<dd>Collection of assigned blocks.</dd>
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-<!--   -->
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-<div class="block">Get a collection with all leaf blocks visible to this zone.
- 
- A block is considered to be visible if it is mapped at least once
- into the logical address space of the zones linked processor.</div>
-<dl>
-<dt><span class="returnLabel">Returns:</span></dt>
-<dd>Collection of visible blocks.</dd>
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-<div class="block">Get a collection with all resources visible to this zone.
- 
- A resource is considered to be visible if it is mapped at least once
- into the logical address space of the zones linked processor.</div>
-<dl>
-<dt><span class="returnLabel">Returns:</span></dt>
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-<div class="block">Get the device this zone is linked to.</div>
-<dl>
-<dt><span class="returnLabel">Returns:</span></dt>
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-<div class="block">Get the processor this zone is linked to.</div>
-<dl>
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-<div class="block">Get a collection of all processes defined in this zone.</div>
-<dl>
-<dt><span class="returnLabel">Returns:</span></dt>
-<dd>Collection of processes.</dd>
-</dl>
-</li>
-</ul>
-</li>
-</ul>
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-<!--   -->
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-<ul class="navList" title="Navigation">
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-<li><a href="../../../../../../deprecated-list.html">Deprecated</a></li>
-<li><a href="../../../../../../index-files/index-1.html">Index</a></li>
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-<div class="subNav">
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diff --git a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/class-use/FmBlock.html b/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/class-use/FmBlock.html
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index 35477b1..0000000
--- a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/class-use/FmBlock.html
+++ /dev/null
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-<link rel="stylesheet" type="text/css" href="../../../../../../../stylesheet.css" title="Style">
-<script type="text/javascript" src="../../../../../../../script.js"></script>
-</head>
-<body>
-<script type="text/javascript"><!--
-    try {
-        if (location.href.indexOf('is-external=true') == -1) {
-            parent.document.title="Uses of Class com.arm.cmsis.zone.gen.data.FmBlock";
-        }
-    }
-    catch(err) {
-    }
-//-->
-</script>
-<noscript>
-<div>JavaScript is disabled on your browser.</div>
-</noscript>
-<!-- ========= START OF TOP NAVBAR ======= -->
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-<a name="navbar.top.firstrow">
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-<ul class="navList" title="Navigation">
-<li><a href="../../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
-<li><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">Class</a></li>
-<li class="navBarCell1Rev">Use</li>
-<li><a href="../package-tree.html">Tree</a></li>
-<li><a href="../../../../../../../deprecated-list.html">Deprecated</a></li>
-<li><a href="../../../../../../../index-files/index-1.html">Index</a></li>
-<li><a href="../../../../../../../help-doc.html">Help</a></li>
-</ul>
-</div>
-<div class="subNav">
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-<li>Next</li>
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-<ul class="navList">
-<li><a href="../../../../../../../index.html?com/arm/cmsis/zone/gen/data/class-use/FmBlock.html" target="_top">Frames</a></li>
-<li><a href="FmBlock.html" target="_top">No&nbsp;Frames</a></li>
-</ul>
-<ul class="navList" id="allclasses_navbar_top">
-<li><a href="../../../../../../../allclasses-noframe.html">All&nbsp;Classes</a></li>
-</ul>
-<div>
-<script type="text/javascript"><!--
-  allClassesLink = document.getElementById("allclasses_navbar_top");
-  if(window==top) {
-    allClassesLink.style.display = "block";
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-<!-- ========= END OF TOP NAVBAR ========= -->
-<div class="header">
-<h2 title="Uses of Class com.arm.cmsis.zone.gen.data.FmBlock" class="title">Uses of Class<br>com.arm.cmsis.zone.gen.data.FmBlock</h2>
-</div>
-<div class="classUseContainer">
-<ul class="blockList">
-<li class="blockList">
-<ul class="blockList">
-<li class="blockList"><a name="com.arm.cmsis.zone.gen.data">
-<!--   -->
-</a>
-<h3>Uses of <a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a> in <a href="../../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">com.arm.cmsis.zone.gen.data</a></h3>
-<table class="useSummary" border="0" cellpadding="3" cellspacing="0" summary="Use table, listing methods, and an explanation">
-<caption><span>Methods in <a href="../../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">com.arm.cmsis.zone.gen.data</a> that return types with arguments of type <a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a></span><span class="tabEnd">&nbsp;</span></caption>
-<tr>
-<th class="colFirst" scope="col">Modifier and Type</th>
-<th class="colLast" scope="col">Method and Description</th>
-</tr>
-<tbody>
-<tr class="altColor">
-<td class="colFirst"><code>java.util.Collection&lt;<a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a>&gt;</code></td>
-<td class="colLast"><span class="typeNameLabel">FmZone.</span><code><span class="memberNameLink"><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmZone.html#getBlocks--">getBlocks</a></span>()</code>
-<div class="block">Get a collection with all blocks assigned to this zone.</div>
-</td>
-</tr>
-<tr class="rowColor">
-<td class="colFirst"><code>java.util.Collection&lt;<a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a>&gt;</code></td>
-<td class="colLast"><span class="typeNameLabel">FmProcessor.</span><code><span class="memberNameLink"><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmProcessor.html#getBlocks--">getBlocks</a></span>()</code>
-<div class="block">Get a collection of leaf blocks visible to this processor.</div>
-</td>
-</tr>
-<tr class="altColor">
-<td class="colFirst"><code>java.util.Collection&lt;<a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a>&gt;</code></td>
-<td class="colLast"><span class="typeNameLabel">FmProcess.</span><code><span class="memberNameLink"><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmProcess.html#getBlocks--">getBlocks</a></span>()</code>
-<div class="block">Get a collection of blocks assigned to this process.</div>
-</td>
-</tr>
-<tr class="rowColor">
-<td class="colFirst"><code>java.util.Collection&lt;<a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a>&gt;</code></td>
-<td class="colLast"><span class="typeNameLabel">FmDevice.</span><code><span class="memberNameLink"><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmDevice.html#getBlocks--">getBlocks</a></span>()</code>
-<div class="block">Get a collection of blocks for this device.</div>
-</td>
-</tr>
-<tr class="altColor">
-<td class="colFirst"><code>java.util.Collection&lt;<a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a>&gt;</code></td>
-<td class="colLast"><span class="typeNameLabel">FmBlock.</span><code><span class="memberNameLink"><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html#getSubBlocks--">getSubBlocks</a></span>()</code>
-<div class="block">Get a collection of blocks this one is divided into.</div>
-</td>
-</tr>
-<tr class="rowColor">
-<td class="colFirst"><code>java.util.Collection&lt;<a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a>&gt;</code></td>
-<td class="colLast"><span class="typeNameLabel">FmZone.</span><code><span class="memberNameLink"><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmZone.html#getVisibleBlocks--">getVisibleBlocks</a></span>()</code>
-<div class="block">Get a collection with all leaf blocks visible to this zone.</div>
-</td>
-</tr>
-<tr class="altColor">
-<td class="colFirst"><code>java.util.Collection&lt;<a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a>&gt;</code></td>
-<td class="colLast"><span class="typeNameLabel">FmZone.</span><code><span class="memberNameLink"><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmZone.html#getVisibleResources--">getVisibleResources</a></span>()</code>
-<div class="block">Get a collection with all resources visible to this zone.</div>
-</td>
-</tr>
-</tbody>
-</table>
-<table class="useSummary" border="0" cellpadding="3" cellspacing="0" summary="Use table, listing constructors, and an explanation">
-<caption><span>Constructors in <a href="../../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">com.arm.cmsis.zone.gen.data</a> with parameters of type <a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a></span><span class="tabEnd">&nbsp;</span></caption>
-<tr>
-<th class="colOne" scope="col">Constructor and Description</th>
-</tr>
-<tbody>
-<tr class="altColor">
-<td class="colLast"><code><span class="memberNameLink"><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmInterrupt.html#FmInterrupt-com.arm.cmsis.zone.data.ICpInterrupt-com.arm.cmsis.zone.gen.data.FmBlock-">FmInterrupt</a></span>(com.arm.cmsis.zone.data.ICpInterrupt&nbsp;interrupt,
-           <a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a>&nbsp;block)</code>
-<div class="block">Create Interrupt generator data model element.</div>
-</td>
-</tr>
-</tbody>
-</table>
-</li>
-</ul>
-</li>
-</ul>
-</div>
-<!-- ======= START OF BOTTOM NAVBAR ====== -->
-<div class="bottomNav"><a name="navbar.bottom">
-<!--   -->
-</a>
-<div class="skipNav"><a href="#skip.navbar.bottom" title="Skip navigation links">Skip navigation links</a></div>
-<a name="navbar.bottom.firstrow">
-<!--   -->
-</a>
-<ul class="navList" title="Navigation">
-<li><a href="../../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
-<li><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">Class</a></li>
-<li class="navBarCell1Rev">Use</li>
-<li><a href="../package-tree.html">Tree</a></li>
-<li><a href="../../../../../../../deprecated-list.html">Deprecated</a></li>
-<li><a href="../../../../../../../index-files/index-1.html">Index</a></li>
-<li><a href="../../../../../../../help-doc.html">Help</a></li>
-</ul>
-</div>
-<div class="subNav">
-<ul class="navList">
-<li>Prev</li>
-<li>Next</li>
-</ul>
-<ul class="navList">
-<li><a href="../../../../../../../index.html?com/arm/cmsis/zone/gen/data/class-use/FmBlock.html" target="_top">Frames</a></li>
-<li><a href="FmBlock.html" target="_top">No&nbsp;Frames</a></li>
-</ul>
-<ul class="navList" id="allclasses_navbar_bottom">
-<li><a href="../../../../../../../allclasses-noframe.html">All&nbsp;Classes</a></li>
-</ul>
-<div>
-<script type="text/javascript"><!--
-  allClassesLink = document.getElementById("allclasses_navbar_bottom");
-  if(window==top) {
-    allClassesLink.style.display = "block";
-  }
-  else {
-    allClassesLink.style.display = "none";
-  }
-  //-->
-</script>
-</div>
-<a name="skip.navbar.bottom">
-<!--   -->
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-<!-- ======== END OF BOTTOM NAVBAR ======= -->
-</body>
-</html>
diff --git a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/class-use/FmCapture.html b/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/class-use/FmCapture.html
deleted file mode 100644
index c17447a..0000000
--- a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/class-use/FmCapture.html
+++ /dev/null
@@ -1,149 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
-<!-- NewPage -->
-<html lang="en">
-<head>
-<!-- Generated by javadoc (1.8.0_131) on Thu Jul 06 18:02:39 CEST 2017 -->
-<title>Uses of Class com.arm.cmsis.zone.gen.data.FmCapture</title>
-<meta name="date" content="2017-07-06">
-<link rel="stylesheet" type="text/css" href="../../../../../../../stylesheet.css" title="Style">
-<script type="text/javascript" src="../../../../../../../script.js"></script>
-</head>
-<body>
-<script type="text/javascript"><!--
-    try {
-        if (location.href.indexOf('is-external=true') == -1) {
-            parent.document.title="Uses of Class com.arm.cmsis.zone.gen.data.FmCapture";
-        }
-    }
-    catch(err) {
-    }
-//-->
-</script>
-<noscript>
-<div>JavaScript is disabled on your browser.</div>
-</noscript>
-<!-- ========= START OF TOP NAVBAR ======= -->
-<div class="topNav"><a name="navbar.top">
-<!--   -->
-</a>
-<div class="skipNav"><a href="#skip.navbar.top" title="Skip navigation links">Skip navigation links</a></div>
-<a name="navbar.top.firstrow">
-<!--   -->
-</a>
-<ul class="navList" title="Navigation">
-<li><a href="../../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
-<li><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmCapture.html" title="class in com.arm.cmsis.zone.gen.data">Class</a></li>
-<li class="navBarCell1Rev">Use</li>
-<li><a href="../package-tree.html">Tree</a></li>
-<li><a href="../../../../../../../deprecated-list.html">Deprecated</a></li>
-<li><a href="../../../../../../../index-files/index-1.html">Index</a></li>
-<li><a href="../../../../../../../help-doc.html">Help</a></li>
-</ul>
-</div>
-<div class="subNav">
-<ul class="navList">
-<li>Prev</li>
-<li>Next</li>
-</ul>
-<ul class="navList">
-<li><a href="../../../../../../../index.html?com/arm/cmsis/zone/gen/data/class-use/FmCapture.html" target="_top">Frames</a></li>
-<li><a href="FmCapture.html" target="_top">No&nbsp;Frames</a></li>
-</ul>
-<ul class="navList" id="allclasses_navbar_top">
-<li><a href="../../../../../../../allclasses-noframe.html">All&nbsp;Classes</a></li>
-</ul>
-<div>
-<script type="text/javascript"><!--
-  allClassesLink = document.getElementById("allclasses_navbar_top");
-  if(window==top) {
-    allClassesLink.style.display = "block";
-  }
-  else {
-    allClassesLink.style.display = "none";
-  }
-  //-->
-</script>
-</div>
-<a name="skip.navbar.top">
-<!--   -->
-</a></div>
-<!-- ========= END OF TOP NAVBAR ========= -->
-<div class="header">
-<h2 title="Uses of Class com.arm.cmsis.zone.gen.data.FmCapture" class="title">Uses of Class<br>com.arm.cmsis.zone.gen.data.FmCapture</h2>
-</div>
-<div class="classUseContainer">
-<ul class="blockList">
-<li class="blockList">
-<ul class="blockList">
-<li class="blockList"><a name="com.arm.cmsis.zone.gen.data">
-<!--   -->
-</a>
-<h3>Uses of <a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmCapture.html" title="class in com.arm.cmsis.zone.gen.data">FmCapture</a> in <a href="../../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">com.arm.cmsis.zone.gen.data</a></h3>
-<table class="useSummary" border="0" cellpadding="3" cellspacing="0" summary="Use table, listing methods, and an explanation">
-<caption><span>Methods in <a href="../../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">com.arm.cmsis.zone.gen.data</a> that return types with arguments of type <a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmCapture.html" title="class in com.arm.cmsis.zone.gen.data">FmCapture</a></span><span class="tabEnd">&nbsp;</span></caption>
-<tr>
-<th class="colFirst" scope="col">Modifier and Type</th>
-<th class="colLast" scope="col">Method and Description</th>
-</tr>
-<tbody>
-<tr class="altColor">
-<td class="colFirst"><code>java.util.Collection&lt;<a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmCapture.html" title="class in com.arm.cmsis.zone.gen.data">FmCapture</a>&gt;</code></td>
-<td class="colLast"><span class="typeNameLabel">FmBlock.</span><code><span class="memberNameLink"><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html#getCaptureList--">getCaptureList</a></span>()</code>
-<div class="block">Get a collection of capture elements for this block.</div>
-</td>
-</tr>
-</tbody>
-</table>
-</li>
-</ul>
-</li>
-</ul>
-</div>
-<!-- ======= START OF BOTTOM NAVBAR ====== -->
-<div class="bottomNav"><a name="navbar.bottom">
-<!--   -->
-</a>
-<div class="skipNav"><a href="#skip.navbar.bottom" title="Skip navigation links">Skip navigation links</a></div>
-<a name="navbar.bottom.firstrow">
-<!--   -->
-</a>
-<ul class="navList" title="Navigation">
-<li><a href="../../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
-<li><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmCapture.html" title="class in com.arm.cmsis.zone.gen.data">Class</a></li>
-<li class="navBarCell1Rev">Use</li>
-<li><a href="../package-tree.html">Tree</a></li>
-<li><a href="../../../../../../../deprecated-list.html">Deprecated</a></li>
-<li><a href="../../../../../../../index-files/index-1.html">Index</a></li>
-<li><a href="../../../../../../../help-doc.html">Help</a></li>
-</ul>
-</div>
-<div class="subNav">
-<ul class="navList">
-<li>Prev</li>
-<li>Next</li>
-</ul>
-<ul class="navList">
-<li><a href="../../../../../../../index.html?com/arm/cmsis/zone/gen/data/class-use/FmCapture.html" target="_top">Frames</a></li>
-<li><a href="FmCapture.html" target="_top">No&nbsp;Frames</a></li>
-</ul>
-<ul class="navList" id="allclasses_navbar_bottom">
-<li><a href="../../../../../../../allclasses-noframe.html">All&nbsp;Classes</a></li>
-</ul>
-<div>
-<script type="text/javascript"><!--
-  allClassesLink = document.getElementById("allclasses_navbar_bottom");
-  if(window==top) {
-    allClassesLink.style.display = "block";
-  }
-  else {
-    allClassesLink.style.display = "none";
-  }
-  //-->
-</script>
-</div>
-<a name="skip.navbar.bottom">
-<!--   -->
-</a></div>
-<!-- ======== END OF BOTTOM NAVBAR ======= -->
-</body>
-</html>
diff --git a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/class-use/FmDevice.html b/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/class-use/FmDevice.html
deleted file mode 100644
index 873e7fd..0000000
--- a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/class-use/FmDevice.html
+++ /dev/null
@@ -1,155 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
-<!-- NewPage -->
-<html lang="en">
-<head>
-<!-- Generated by javadoc (1.8.0_131) on Thu Jul 06 18:02:39 CEST 2017 -->
-<title>Uses of Class com.arm.cmsis.zone.gen.data.FmDevice</title>
-<meta name="date" content="2017-07-06">
-<link rel="stylesheet" type="text/css" href="../../../../../../../stylesheet.css" title="Style">
-<script type="text/javascript" src="../../../../../../../script.js"></script>
-</head>
-<body>
-<script type="text/javascript"><!--
-    try {
-        if (location.href.indexOf('is-external=true') == -1) {
-            parent.document.title="Uses of Class com.arm.cmsis.zone.gen.data.FmDevice";
-        }
-    }
-    catch(err) {
-    }
-//-->
-</script>
-<noscript>
-<div>JavaScript is disabled on your browser.</div>
-</noscript>
-<!-- ========= START OF TOP NAVBAR ======= -->
-<div class="topNav"><a name="navbar.top">
-<!--   -->
-</a>
-<div class="skipNav"><a href="#skip.navbar.top" title="Skip navigation links">Skip navigation links</a></div>
-<a name="navbar.top.firstrow">
-<!--   -->
-</a>
-<ul class="navList" title="Navigation">
-<li><a href="../../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
-<li><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmDevice.html" title="class in com.arm.cmsis.zone.gen.data">Class</a></li>
-<li class="navBarCell1Rev">Use</li>
-<li><a href="../package-tree.html">Tree</a></li>
-<li><a href="../../../../../../../deprecated-list.html">Deprecated</a></li>
-<li><a href="../../../../../../../index-files/index-1.html">Index</a></li>
-<li><a href="../../../../../../../help-doc.html">Help</a></li>
-</ul>
-</div>
-<div class="subNav">
-<ul class="navList">
-<li>Prev</li>
-<li>Next</li>
-</ul>
-<ul class="navList">
-<li><a href="../../../../../../../index.html?com/arm/cmsis/zone/gen/data/class-use/FmDevice.html" target="_top">Frames</a></li>
-<li><a href="FmDevice.html" target="_top">No&nbsp;Frames</a></li>
-</ul>
-<ul class="navList" id="allclasses_navbar_top">
-<li><a href="../../../../../../../allclasses-noframe.html">All&nbsp;Classes</a></li>
-</ul>
-<div>
-<script type="text/javascript"><!--
-  allClassesLink = document.getElementById("allclasses_navbar_top");
-  if(window==top) {
-    allClassesLink.style.display = "block";
-  }
-  else {
-    allClassesLink.style.display = "none";
-  }
-  //-->
-</script>
-</div>
-<a name="skip.navbar.top">
-<!--   -->
-</a></div>
-<!-- ========= END OF TOP NAVBAR ========= -->
-<div class="header">
-<h2 title="Uses of Class com.arm.cmsis.zone.gen.data.FmDevice" class="title">Uses of Class<br>com.arm.cmsis.zone.gen.data.FmDevice</h2>
-</div>
-<div class="classUseContainer">
-<ul class="blockList">
-<li class="blockList">
-<ul class="blockList">
-<li class="blockList"><a name="com.arm.cmsis.zone.gen.data">
-<!--   -->
-</a>
-<h3>Uses of <a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmDevice.html" title="class in com.arm.cmsis.zone.gen.data">FmDevice</a> in <a href="../../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">com.arm.cmsis.zone.gen.data</a></h3>
-<table class="useSummary" border="0" cellpadding="3" cellspacing="0" summary="Use table, listing methods, and an explanation">
-<caption><span>Methods in <a href="../../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">com.arm.cmsis.zone.gen.data</a> that return <a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmDevice.html" title="class in com.arm.cmsis.zone.gen.data">FmDevice</a></span><span class="tabEnd">&nbsp;</span></caption>
-<tr>
-<th class="colFirst" scope="col">Modifier and Type</th>
-<th class="colLast" scope="col">Method and Description</th>
-</tr>
-<tbody>
-<tr class="altColor">
-<td class="colFirst"><code><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmDevice.html" title="class in com.arm.cmsis.zone.gen.data">FmDevice</a></code></td>
-<td class="colLast"><span class="typeNameLabel">FmZone.</span><code><span class="memberNameLink"><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmZone.html#getDevice--">getDevice</a></span>()</code>
-<div class="block">Get the device this zone is linked to.</div>
-</td>
-</tr>
-<tr class="rowColor">
-<td class="colFirst"><code><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmDevice.html" title="class in com.arm.cmsis.zone.gen.data">FmDevice</a></code></td>
-<td class="colLast"><span class="typeNameLabel">FmProcessor.</span><code><span class="memberNameLink"><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmProcessor.html#getDevice--">getDevice</a></span>()</code>
-<div class="block">Get the device this processor is contained in.</div>
-</td>
-</tr>
-</tbody>
-</table>
-</li>
-</ul>
-</li>
-</ul>
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diff --git a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/class-use/FmInterrupt.html b/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/class-use/FmInterrupt.html
deleted file mode 100644
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--- a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/class-use/FmInterrupt.html
+++ /dev/null
@@ -1,149 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
-<!-- NewPage -->
-<html lang="en">
-<head>
-<!-- Generated by javadoc (1.8.0_131) on Thu Jul 06 18:02:39 CEST 2017 -->
-<title>Uses of Class com.arm.cmsis.zone.gen.data.FmInterrupt</title>
-<meta name="date" content="2017-07-06">
-<link rel="stylesheet" type="text/css" href="../../../../../../../stylesheet.css" title="Style">
-<script type="text/javascript" src="../../../../../../../script.js"></script>
-</head>
-<body>
-<script type="text/javascript"><!--
-    try {
-        if (location.href.indexOf('is-external=true') == -1) {
-            parent.document.title="Uses of Class com.arm.cmsis.zone.gen.data.FmInterrupt";
-        }
-    }
-    catch(err) {
-    }
-//-->
-</script>
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-<li class="navBarCell1Rev">Use</li>
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-<div class="header">
-<h2 title="Uses of Class com.arm.cmsis.zone.gen.data.FmInterrupt" class="title">Uses of Class<br>com.arm.cmsis.zone.gen.data.FmInterrupt</h2>
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-<h3>Uses of <a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmInterrupt.html" title="class in com.arm.cmsis.zone.gen.data">FmInterrupt</a> in <a href="../../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">com.arm.cmsis.zone.gen.data</a></h3>
-<table class="useSummary" border="0" cellpadding="3" cellspacing="0" summary="Use table, listing methods, and an explanation">
-<caption><span>Methods in <a href="../../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">com.arm.cmsis.zone.gen.data</a> that return types with arguments of type <a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmInterrupt.html" title="class in com.arm.cmsis.zone.gen.data">FmInterrupt</a></span><span class="tabEnd">&nbsp;</span></caption>
-<tr>
-<th class="colFirst" scope="col">Modifier and Type</th>
-<th class="colLast" scope="col">Method and Description</th>
-</tr>
-<tbody>
-<tr class="altColor">
-<td class="colFirst"><code>java.util.Map&lt;java.lang.Long,<a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmInterrupt.html" title="class in com.arm.cmsis.zone.gen.data">FmInterrupt</a>&gt;</code></td>
-<td class="colLast"><span class="typeNameLabel">FmBlock.</span><code><span class="memberNameLink"><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html#getInterrupts--">getInterrupts</a></span>()</code>
-<div class="block">Get a hash with available interrupts.</div>
-</td>
-</tr>
-</tbody>
-</table>
-</li>
-</ul>
-</li>
-</ul>
-</div>
-<!-- ======= START OF BOTTOM NAVBAR ====== -->
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-<li><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmInterrupt.html" title="class in com.arm.cmsis.zone.gen.data">Class</a></li>
-<li class="navBarCell1Rev">Use</li>
-<li><a href="../package-tree.html">Tree</a></li>
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diff --git a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/class-use/FmProcess.html b/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/class-use/FmProcess.html
deleted file mode 100644
index fa84abd..0000000
--- a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/class-use/FmProcess.html
+++ /dev/null
@@ -1,149 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
-<!-- NewPage -->
-<html lang="en">
-<head>
-<!-- Generated by javadoc (1.8.0_131) on Thu Jul 06 18:02:39 CEST 2017 -->
-<title>Uses of Class com.arm.cmsis.zone.gen.data.FmProcess</title>
-<meta name="date" content="2017-07-06">
-<link rel="stylesheet" type="text/css" href="../../../../../../../stylesheet.css" title="Style">
-<script type="text/javascript" src="../../../../../../../script.js"></script>
-</head>
-<body>
-<script type="text/javascript"><!--
-    try {
-        if (location.href.indexOf('is-external=true') == -1) {
-            parent.document.title="Uses of Class com.arm.cmsis.zone.gen.data.FmProcess";
-        }
-    }
-    catch(err) {
-    }
-//-->
-</script>
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-<div>JavaScript is disabled on your browser.</div>
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-<li class="navBarCell1Rev">Use</li>
-<li><a href="../package-tree.html">Tree</a></li>
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-<!-- ========= END OF TOP NAVBAR ========= -->
-<div class="header">
-<h2 title="Uses of Class com.arm.cmsis.zone.gen.data.FmProcess" class="title">Uses of Class<br>com.arm.cmsis.zone.gen.data.FmProcess</h2>
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-<h3>Uses of <a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmProcess.html" title="class in com.arm.cmsis.zone.gen.data">FmProcess</a> in <a href="../../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">com.arm.cmsis.zone.gen.data</a></h3>
-<table class="useSummary" border="0" cellpadding="3" cellspacing="0" summary="Use table, listing methods, and an explanation">
-<caption><span>Methods in <a href="../../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">com.arm.cmsis.zone.gen.data</a> that return types with arguments of type <a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmProcess.html" title="class in com.arm.cmsis.zone.gen.data">FmProcess</a></span><span class="tabEnd">&nbsp;</span></caption>
-<tr>
-<th class="colFirst" scope="col">Modifier and Type</th>
-<th class="colLast" scope="col">Method and Description</th>
-</tr>
-<tbody>
-<tr class="altColor">
-<td class="colFirst"><code>java.util.Collection&lt;<a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmProcess.html" title="class in com.arm.cmsis.zone.gen.data">FmProcess</a>&gt;</code></td>
-<td class="colLast"><span class="typeNameLabel">FmZone.</span><code><span class="memberNameLink"><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmZone.html#getProcesses--">getProcesses</a></span>()</code>
-<div class="block">Get a collection of all processes defined in this zone.</div>
-</td>
-</tr>
-</tbody>
-</table>
-</li>
-</ul>
-</li>
-</ul>
-</div>
-<!-- ======= START OF BOTTOM NAVBAR ====== -->
-<div class="bottomNav"><a name="navbar.bottom">
-<!--   -->
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-<div class="skipNav"><a href="#skip.navbar.bottom" title="Skip navigation links">Skip navigation links</a></div>
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-<!--   -->
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-<ul class="navList" title="Navigation">
-<li><a href="../../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
-<li><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmProcess.html" title="class in com.arm.cmsis.zone.gen.data">Class</a></li>
-<li class="navBarCell1Rev">Use</li>
-<li><a href="../package-tree.html">Tree</a></li>
-<li><a href="../../../../../../../deprecated-list.html">Deprecated</a></li>
-<li><a href="../../../../../../../index-files/index-1.html">Index</a></li>
-<li><a href="../../../../../../../help-doc.html">Help</a></li>
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-</div>
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diff --git a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/class-use/FmProcessor.html b/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/class-use/FmProcessor.html
deleted file mode 100644
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--- a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/class-use/FmProcessor.html
+++ /dev/null
@@ -1,149 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
-<!-- NewPage -->
-<html lang="en">
-<head>
-<!-- Generated by javadoc (1.8.0_131) on Thu Jul 06 18:02:39 CEST 2017 -->
-<title>Uses of Class com.arm.cmsis.zone.gen.data.FmProcessor</title>
-<meta name="date" content="2017-07-06">
-<link rel="stylesheet" type="text/css" href="../../../../../../../stylesheet.css" title="Style">
-<script type="text/javascript" src="../../../../../../../script.js"></script>
-</head>
-<body>
-<script type="text/javascript"><!--
-    try {
-        if (location.href.indexOf('is-external=true') == -1) {
-            parent.document.title="Uses of Class com.arm.cmsis.zone.gen.data.FmProcessor";
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-    }
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-    }
-//-->
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-<li><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmProcessor.html" title="class in com.arm.cmsis.zone.gen.data">Class</a></li>
-<li class="navBarCell1Rev">Use</li>
-<li><a href="../package-tree.html">Tree</a></li>
-<li><a href="../../../../../../../deprecated-list.html">Deprecated</a></li>
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-</ul>
-<ul class="navList" id="allclasses_navbar_top">
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-</ul>
-<div>
-<script type="text/javascript"><!--
-  allClassesLink = document.getElementById("allclasses_navbar_top");
-  if(window==top) {
-    allClassesLink.style.display = "block";
-  }
-  else {
-    allClassesLink.style.display = "none";
-  }
-  //-->
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-<!-- ========= END OF TOP NAVBAR ========= -->
-<div class="header">
-<h2 title="Uses of Class com.arm.cmsis.zone.gen.data.FmProcessor" class="title">Uses of Class<br>com.arm.cmsis.zone.gen.data.FmProcessor</h2>
-</div>
-<div class="classUseContainer">
-<ul class="blockList">
-<li class="blockList">
-<ul class="blockList">
-<li class="blockList"><a name="com.arm.cmsis.zone.gen.data">
-<!--   -->
-</a>
-<h3>Uses of <a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmProcessor.html" title="class in com.arm.cmsis.zone.gen.data">FmProcessor</a> in <a href="../../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">com.arm.cmsis.zone.gen.data</a></h3>
-<table class="useSummary" border="0" cellpadding="3" cellspacing="0" summary="Use table, listing methods, and an explanation">
-<caption><span>Methods in <a href="../../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">com.arm.cmsis.zone.gen.data</a> that return <a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmProcessor.html" title="class in com.arm.cmsis.zone.gen.data">FmProcessor</a></span><span class="tabEnd">&nbsp;</span></caption>
-<tr>
-<th class="colFirst" scope="col">Modifier and Type</th>
-<th class="colLast" scope="col">Method and Description</th>
-</tr>
-<tbody>
-<tr class="altColor">
-<td class="colFirst"><code><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmProcessor.html" title="class in com.arm.cmsis.zone.gen.data">FmProcessor</a></code></td>
-<td class="colLast"><span class="typeNameLabel">FmZone.</span><code><span class="memberNameLink"><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmZone.html#getProcessor--">getProcessor</a></span>()</code>
-<div class="block">Get the processor this zone is linked to.</div>
-</td>
-</tr>
-</tbody>
-</table>
-</li>
-</ul>
-</li>
-</ul>
-</div>
-<!-- ======= START OF BOTTOM NAVBAR ====== -->
-<div class="bottomNav"><a name="navbar.bottom">
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-<div class="skipNav"><a href="#skip.navbar.bottom" title="Skip navigation links">Skip navigation links</a></div>
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-<li><a href="../../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
-<li><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmProcessor.html" title="class in com.arm.cmsis.zone.gen.data">Class</a></li>
-<li class="navBarCell1Rev">Use</li>
-<li><a href="../package-tree.html">Tree</a></li>
-<li><a href="../../../../../../../deprecated-list.html">Deprecated</a></li>
-<li><a href="../../../../../../../index-files/index-1.html">Index</a></li>
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-<div>
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-  allClassesLink = document.getElementById("allclasses_navbar_bottom");
-  if(window==top) {
-    allClassesLink.style.display = "block";
-  }
-  else {
-    allClassesLink.style.display = "none";
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diff --git a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/class-use/FmZone.html b/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/class-use/FmZone.html
deleted file mode 100644
index 844413f..0000000
--- a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/class-use/FmZone.html
+++ /dev/null
@@ -1,122 +0,0 @@
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-<!-- NewPage -->
-<html lang="en">
-<head>
-<!-- Generated by javadoc (1.8.0_131) on Thu Jul 06 18:02:39 CEST 2017 -->
-<title>Uses of Class com.arm.cmsis.zone.gen.data.FmZone</title>
-<meta name="date" content="2017-07-06">
-<link rel="stylesheet" type="text/css" href="../../../../../../../stylesheet.css" title="Style">
-<script type="text/javascript" src="../../../../../../../script.js"></script>
-</head>
-<body>
-<script type="text/javascript"><!--
-    try {
-        if (location.href.indexOf('is-external=true') == -1) {
-            parent.document.title="Uses of Class com.arm.cmsis.zone.gen.data.FmZone";
-        }
-    }
-    catch(err) {
-    }
-//-->
-</script>
-<noscript>
-<div>JavaScript is disabled on your browser.</div>
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-<div class="topNav"><a name="navbar.top">
-<!--   -->
-</a>
-<div class="skipNav"><a href="#skip.navbar.top" title="Skip navigation links">Skip navigation links</a></div>
-<a name="navbar.top.firstrow">
-<!--   -->
-</a>
-<ul class="navList" title="Navigation">
-<li><a href="../../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
-<li><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmZone.html" title="class in com.arm.cmsis.zone.gen.data">Class</a></li>
-<li class="navBarCell1Rev">Use</li>
-<li><a href="../package-tree.html">Tree</a></li>
-<li><a href="../../../../../../../deprecated-list.html">Deprecated</a></li>
-<li><a href="../../../../../../../index-files/index-1.html">Index</a></li>
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-</ul>
-<ul class="navList">
-<li><a href="../../../../../../../index.html?com/arm/cmsis/zone/gen/data/class-use/FmZone.html" target="_top">Frames</a></li>
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-</ul>
-<ul class="navList" id="allclasses_navbar_top">
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-<!-- ========= END OF TOP NAVBAR ========= -->
-<div class="header">
-<h2 title="Uses of Class com.arm.cmsis.zone.gen.data.FmZone" class="title">Uses of Class<br>com.arm.cmsis.zone.gen.data.FmZone</h2>
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-<!-- ======= START OF BOTTOM NAVBAR ====== -->
-<div class="bottomNav"><a name="navbar.bottom">
-<!--   -->
-</a>
-<div class="skipNav"><a href="#skip.navbar.bottom" title="Skip navigation links">Skip navigation links</a></div>
-<a name="navbar.bottom.firstrow">
-<!--   -->
-</a>
-<ul class="navList" title="Navigation">
-<li><a href="../../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
-<li><a href="../../../../../../../com/arm/cmsis/zone/gen/data/FmZone.html" title="class in com.arm.cmsis.zone.gen.data">Class</a></li>
-<li class="navBarCell1Rev">Use</li>
-<li><a href="../package-tree.html">Tree</a></li>
-<li><a href="../../../../../../../deprecated-list.html">Deprecated</a></li>
-<li><a href="../../../../../../../index-files/index-1.html">Index</a></li>
-<li><a href="../../../../../../../help-doc.html">Help</a></li>
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-<li>Prev</li>
-<li>Next</li>
-</ul>
-<ul class="navList">
-<li><a href="../../../../../../../index.html?com/arm/cmsis/zone/gen/data/class-use/FmZone.html" target="_top">Frames</a></li>
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-<ul class="navList" id="allclasses_navbar_bottom">
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diff --git a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/package-frame.html b/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/package-frame.html
deleted file mode 100644
index 8c55fa4..0000000
--- a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/package-frame.html
+++ /dev/null
@@ -1,26 +0,0 @@
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-<!-- Generated by javadoc (1.8.0_131) on Thu Jul 06 18:02:39 CEST 2017 -->
-<title>com.arm.cmsis.zone.gen.data</title>
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-<link rel="stylesheet" type="text/css" href="../../../../../../stylesheet.css" title="Style">
-<script type="text/javascript" src="../../../../../../script.js"></script>
-</head>
-<body>
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-<li><a href="FmInterrupt.html" title="class in com.arm.cmsis.zone.gen.data" target="classFrame">FmInterrupt</a></li>
-<li><a href="FmProcess.html" title="class in com.arm.cmsis.zone.gen.data" target="classFrame">FmProcess</a></li>
-<li><a href="FmProcessor.html" title="class in com.arm.cmsis.zone.gen.data" target="classFrame">FmProcessor</a></li>
-<li><a href="FmZone.html" title="class in com.arm.cmsis.zone.gen.data" target="classFrame">FmZone</a></li>
-</ul>
-</div>
-</body>
-</html>
diff --git a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/package-summary.html b/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/package-summary.html
deleted file mode 100644
index 8e95c78..0000000
--- a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/package-summary.html
+++ /dev/null
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-<!-- Generated by javadoc (1.8.0_131) on Thu Jul 06 18:02:39 CEST 2017 -->
-<title>com.arm.cmsis.zone.gen.data</title>
-<meta name="date" content="2017-07-06">
-<link rel="stylesheet" type="text/css" href="../../../../../../stylesheet.css" title="Style">
-<script type="text/javascript" src="../../../../../../script.js"></script>
-</head>
-<body>
-<script type="text/javascript"><!--
-    try {
-        if (location.href.indexOf('is-external=true') == -1) {
-            parent.document.title="com.arm.cmsis.zone.gen.data";
-        }
-    }
-    catch(err) {
-    }
-//-->
-</script>
-<noscript>
-<div>JavaScript is disabled on your browser.</div>
-</noscript>
-<!-- ========= START OF TOP NAVBAR ======= -->
-<div class="topNav"><a name="navbar.top">
-<!--   -->
-</a>
-<div class="skipNav"><a href="#skip.navbar.top" title="Skip navigation links">Skip navigation links</a></div>
-<a name="navbar.top.firstrow">
-<!--   -->
-</a>
-<ul class="navList" title="Navigation">
-<li><a href="../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
-<li>Class</li>
-<li><a href="package-use.html">Use</a></li>
-<li><a href="package-tree.html">Tree</a></li>
-<li><a href="../../../../../../deprecated-list.html">Deprecated</a></li>
-<li><a href="../../../../../../index-files/index-1.html">Index</a></li>
-<li><a href="../../../../../../help-doc.html">Help</a></li>
-</ul>
-</div>
-<div class="subNav">
-<ul class="navList">
-<li>Prev&nbsp;Package</li>
-<li>Next&nbsp;Package</li>
-</ul>
-<ul class="navList">
-<li><a href="../../../../../../index.html?com/arm/cmsis/zone/gen/data/package-summary.html" target="_top">Frames</a></li>
-<li><a href="package-summary.html" target="_top">No&nbsp;Frames</a></li>
-</ul>
-<ul class="navList" id="allclasses_navbar_top">
-<li><a href="../../../../../../allclasses-noframe.html">All&nbsp;Classes</a></li>
-</ul>
-<div>
-<script type="text/javascript"><!--
-  allClassesLink = document.getElementById("allclasses_navbar_top");
-  if(window==top) {
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-  else {
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-  //-->
-</script>
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-<a name="skip.navbar.top">
-<!--   -->
-</a></div>
-<!-- ========= END OF TOP NAVBAR ========= -->
-<div class="header">
-<h1 title="Package" class="title">Package&nbsp;com.arm.cmsis.zone.gen.data</h1>
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-<tbody>
-<tr class="altColor">
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-<td class="colLast">
-<div class="block">Block - Generator Data Model Element
- 
- A block specifies the properties for a certain area of logical memory.</div>
-</td>
-</tr>
-<tr class="rowColor">
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-<td class="colLast">
-<div class="block">Capture Item - Generator Data Model Element
- 
- A capture item specifies a set of symbols, filtered
- by compilation unit, which should be used.</div>
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-</tr>
-<tr class="altColor">
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-<td class="colLast">
-<div class="block">Device - Generator Data Model Element
- 
- Implements access to detailed informations about a device
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-</tr>
-<tr class="rowColor">
-<td class="colFirst"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmInterrupt.html" title="class in com.arm.cmsis.zone.gen.data">FmInterrupt</a></td>
-<td class="colLast">
-<div class="block">Interrupt - Generator Data Model Element
- 
- A interrupt element gives information about an interrupt
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-</tr>
-<tr class="altColor">
-<td class="colFirst"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmProcess.html" title="class in com.arm.cmsis.zone.gen.data">FmProcess</a></td>
-<td class="colLast">
-<div class="block">Process - Generator Data Model Element
- 
- A process (or execution zone) defines a group of threads
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-</td>
-</tr>
-<tr class="rowColor">
-<td class="colFirst"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmProcessor.html" title="class in com.arm.cmsis.zone.gen.data">FmProcessor</a></td>
-<td class="colLast">
-<div class="block">Processor - Generator Data Model Element
- 
- A processor defines specific informations about individual
- processing elements embodied on a device.</div>
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-</tr>
-<tr class="altColor">
-<td class="colFirst"><a href="../../../../../../com/arm/cmsis/zone/gen/data/FmZone.html" title="class in com.arm.cmsis.zone.gen.data">FmZone</a></td>
-<td class="colLast">
-<div class="block">Project Zone - Generator Data Model Root Element
- 
- Implements the root element for the generator data model.</div>
-</td>
-</tr>
-</tbody>
-</table>
-</li>
-</ul>
-</div>
-<!-- ======= START OF BOTTOM NAVBAR ====== -->
-<div class="bottomNav"><a name="navbar.bottom">
-<!--   -->
-</a>
-<div class="skipNav"><a href="#skip.navbar.bottom" title="Skip navigation links">Skip navigation links</a></div>
-<a name="navbar.bottom.firstrow">
-<!--   -->
-</a>
-<ul class="navList" title="Navigation">
-<li><a href="../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
-<li>Class</li>
-<li><a href="package-use.html">Use</a></li>
-<li><a href="package-tree.html">Tree</a></li>
-<li><a href="../../../../../../deprecated-list.html">Deprecated</a></li>
-<li><a href="../../../../../../index-files/index-1.html">Index</a></li>
-<li><a href="../../../../../../help-doc.html">Help</a></li>
-</ul>
-</div>
-<div class="subNav">
-<ul class="navList">
-<li>Prev&nbsp;Package</li>
-<li>Next&nbsp;Package</li>
-</ul>
-<ul class="navList">
-<li><a href="../../../../../../index.html?com/arm/cmsis/zone/gen/data/package-summary.html" target="_top">Frames</a></li>
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-</ul>
-<ul class="navList" id="allclasses_navbar_bottom">
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-</ul>
-<div>
-<script type="text/javascript"><!--
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-</script>
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-<a name="skip.navbar.bottom">
-<!--   -->
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-<!-- ======== END OF BOTTOM NAVBAR ======= -->
-</body>
-</html>
diff --git a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/package-tree.html b/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/package-tree.html
deleted file mode 100644
index a962f6c..0000000
--- a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/package-tree.html
+++ /dev/null
@@ -1,137 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
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-<head>
-<!-- Generated by javadoc (1.8.0_131) on Thu Jul 06 18:02:39 CEST 2017 -->
-<title>com.arm.cmsis.zone.gen.data Class Hierarchy</title>
-<meta name="date" content="2017-07-06">
-<link rel="stylesheet" type="text/css" href="../../../../../../stylesheet.css" title="Style">
-<script type="text/javascript" src="../../../../../../script.js"></script>
-</head>
-<body>
-<script type="text/javascript"><!--
-    try {
-        if (location.href.indexOf('is-external=true') == -1) {
-            parent.document.title="com.arm.cmsis.zone.gen.data Class Hierarchy";
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-    }
-    catch(err) {
-    }
-//-->
-</script>
-<noscript>
-<div>JavaScript is disabled on your browser.</div>
-</noscript>
-<!-- ========= START OF TOP NAVBAR ======= -->
-<div class="topNav"><a name="navbar.top">
-<!--   -->
-</a>
-<div class="skipNav"><a href="#skip.navbar.top" title="Skip navigation links">Skip navigation links</a></div>
-<a name="navbar.top.firstrow">
-<!--   -->
-</a>
-<ul class="navList" title="Navigation">
-<li><a href="../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
-<li>Class</li>
-<li>Use</li>
-<li class="navBarCell1Rev">Tree</li>
-<li><a href="../../../../../../deprecated-list.html">Deprecated</a></li>
-<li><a href="../../../../../../index-files/index-1.html">Index</a></li>
-<li><a href="../../../../../../help-doc.html">Help</a></li>
-</ul>
-</div>
-<div class="subNav">
-<ul class="navList">
-<li>Prev</li>
-<li>Next</li>
-</ul>
-<ul class="navList">
-<li><a href="../../../../../../index.html?com/arm/cmsis/zone/gen/data/package-tree.html" target="_top">Frames</a></li>
-<li><a href="package-tree.html" target="_top">No&nbsp;Frames</a></li>
-</ul>
-<ul class="navList" id="allclasses_navbar_top">
-<li><a href="../../../../../../allclasses-noframe.html">All&nbsp;Classes</a></li>
-</ul>
-<div>
-<script type="text/javascript"><!--
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-  //-->
-</script>
-</div>
-<a name="skip.navbar.top">
-<!--   -->
-</a></div>
-<!-- ========= END OF TOP NAVBAR ========= -->
-<div class="header">
-<h1 class="title">Hierarchy For Package com.arm.cmsis.zone.gen.data</h1>
-</div>
-<div class="contentContainer">
-<h2 title="Class Hierarchy">Class Hierarchy</h2>
-<ul>
-<li type="circle">java.lang.Object
-<ul>
-<li type="circle">com.arm.cmsis.zone.gen.data.<a href="../../../../../../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data"><span class="typeNameLink">FmBlock</span></a></li>
-<li type="circle">com.arm.cmsis.zone.gen.data.<a href="../../../../../../com/arm/cmsis/zone/gen/data/FmCapture.html" title="class in com.arm.cmsis.zone.gen.data"><span class="typeNameLink">FmCapture</span></a></li>
-<li type="circle">com.arm.cmsis.zone.gen.data.<a href="../../../../../../com/arm/cmsis/zone/gen/data/FmDevice.html" title="class in com.arm.cmsis.zone.gen.data"><span class="typeNameLink">FmDevice</span></a></li>
-<li type="circle">com.arm.cmsis.zone.gen.data.<a href="../../../../../../com/arm/cmsis/zone/gen/data/FmInterrupt.html" title="class in com.arm.cmsis.zone.gen.data"><span class="typeNameLink">FmInterrupt</span></a></li>
-<li type="circle">com.arm.cmsis.zone.gen.data.<a href="../../../../../../com/arm/cmsis/zone/gen/data/FmProcess.html" title="class in com.arm.cmsis.zone.gen.data"><span class="typeNameLink">FmProcess</span></a></li>
-<li type="circle">com.arm.cmsis.zone.gen.data.<a href="../../../../../../com/arm/cmsis/zone/gen/data/FmProcessor.html" title="class in com.arm.cmsis.zone.gen.data"><span class="typeNameLink">FmProcessor</span></a></li>
-<li type="circle">com.arm.cmsis.zone.gen.data.<a href="../../../../../../com/arm/cmsis/zone/gen/data/FmZone.html" title="class in com.arm.cmsis.zone.gen.data"><span class="typeNameLink">FmZone</span></a></li>
-</ul>
-</li>
-</ul>
-</div>
-<!-- ======= START OF BOTTOM NAVBAR ====== -->
-<div class="bottomNav"><a name="navbar.bottom">
-<!--   -->
-</a>
-<div class="skipNav"><a href="#skip.navbar.bottom" title="Skip navigation links">Skip navigation links</a></div>
-<a name="navbar.bottom.firstrow">
-<!--   -->
-</a>
-<ul class="navList" title="Navigation">
-<li><a href="../../../../../../com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
-<li>Class</li>
-<li>Use</li>
-<li class="navBarCell1Rev">Tree</li>
-<li><a href="../../../../../../deprecated-list.html">Deprecated</a></li>
-<li><a href="../../../../../../index-files/index-1.html">Index</a></li>
-<li><a href="../../../../../../help-doc.html">Help</a></li>
-</ul>
-</div>
-<div class="subNav">
-<ul class="navList">
-<li>Prev</li>
-<li>Next</li>
-</ul>
-<ul class="navList">
-<li><a href="../../../../../../index.html?com/arm/cmsis/zone/gen/data/package-tree.html" target="_top">Frames</a></li>
-<li><a href="package-tree.html" target="_top">No&nbsp;Frames</a></li>
-</ul>
-<ul class="navList" id="allclasses_navbar_bottom">
-<li><a href="../../../../../../allclasses-noframe.html">All&nbsp;Classes</a></li>
-</ul>
-<div>
-<script type="text/javascript"><!--
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-</script>
-</div>
-<a name="skip.navbar.bottom">
-<!--   -->
-</a></div>
-<!-- ======== END OF BOTTOM NAVBAR ======= -->
-</body>
-</html>
diff --git a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/package-use.html b/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/package-use.html
deleted file mode 100644
index d33f5c7..0000000
--- a/docs/Zone/genmodel/com/arm/cmsis/zone/gen/data/package-use.html
+++ /dev/null
@@ -1,184 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
-<!-- NewPage -->
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-<th class="colOne" scope="col">Class and Description</th>
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-<tbody>
-<tr class="altColor">
-<td class="colOne"><a href="../../../../../../com/arm/cmsis/zone/gen/data/class-use/FmBlock.html#com.arm.cmsis.zone.gen.data">FmBlock</a>
-<div class="block">Block - Generator Data Model Element
- 
- A block specifies the properties for a certain area of logical memory.</div>
-</td>
-</tr>
-<tr class="rowColor">
-<td class="colOne"><a href="../../../../../../com/arm/cmsis/zone/gen/data/class-use/FmCapture.html#com.arm.cmsis.zone.gen.data">FmCapture</a>
-<div class="block">Capture Item - Generator Data Model Element
- 
- A capture item specifies a set of symbols, filtered
- by compilation unit, which should be used.</div>
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-</tr>
-<tr class="altColor">
-<td class="colOne"><a href="../../../../../../com/arm/cmsis/zone/gen/data/class-use/FmDevice.html#com.arm.cmsis.zone.gen.data">FmDevice</a>
-<div class="block">Device - Generator Data Model Element
- 
- Implements access to detailed informations about a device
- available in the system.</div>
-</td>
-</tr>
-<tr class="rowColor">
-<td class="colOne"><a href="../../../../../../com/arm/cmsis/zone/gen/data/class-use/FmInterrupt.html#com.arm.cmsis.zone.gen.data">FmInterrupt</a>
-<div class="block">Interrupt - Generator Data Model Element
- 
- A interrupt element gives information about an interrupt
- and its declared usage.</div>
-</td>
-</tr>
-<tr class="altColor">
-<td class="colOne"><a href="../../../../../../com/arm/cmsis/zone/gen/data/class-use/FmProcess.html#com.arm.cmsis.zone.gen.data">FmProcess</a>
-<div class="block">Process - Generator Data Model Element
- 
- A process (or execution zone) defines a group of threads
- sharing common access privileges.</div>
-</td>
-</tr>
-<tr class="rowColor">
-<td class="colOne"><a href="../../../../../../com/arm/cmsis/zone/gen/data/class-use/FmProcessor.html#com.arm.cmsis.zone.gen.data">FmProcessor</a>
-<div class="block">Processor - Generator Data Model Element
- 
- A processor defines specific informations about individual
- processing elements embodied on a device.</div>
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-<li class="blockList">
-<h2>Prev/Next</h2>
-<p>These links take you to the next or previous class, interface, package, or related page.</p>
-</li>
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-<p>These links show and hide the HTML frames.  All pages are available with or without frames.</p>
-</li>
-<li class="blockList">
-<h2>All Classes</h2>
-<p>The <a href="allclasses-noframe.html">All Classes</a> link shows all classes and interfaces except non-static nested types.</p>
-</li>
-<li class="blockList">
-<h2>Serialized Form</h2>
-<p>Each serializable or externalizable class has a description of its serialization fields and methods. This information is of interest to re-implementors, not to developers using the API. While there is no link in the navigation bar, you can get to this information by going to any serialized class and clicking "Serialized Form" in the "See also" section of the class description.</p>
-</li>
-<li class="blockList">
-<h2>Constant Field Values</h2>
-<p>The <a href="constant-values.html">Constant Field Values</a> page lists the static final fields and their values.</p>
-</li>
-</ul>
-<span class="emphasizedPhrase">This help file applies to API documentation generated using the standard doclet.</span></div>
-<!-- ======= START OF BOTTOM NAVBAR ====== -->
-<div class="bottomNav"><a name="navbar.bottom">
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-<div class="skipNav"><a href="#skip.navbar.bottom" title="Skip navigation links">Skip navigation links</a></div>
-<a name="navbar.bottom.firstrow">
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-</a>
-<ul class="navList" title="Navigation">
-<li><a href="com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
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diff --git a/docs/Zone/genmodel/index-files/index-1.html b/docs/Zone/genmodel/index-files/index-1.html
deleted file mode 100644
index 036c5cf..0000000
--- a/docs/Zone/genmodel/index-files/index-1.html
+++ /dev/null
@@ -1,127 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
-<!-- NewPage -->
-<html lang="en">
-<head>
-<!-- Generated by javadoc (1.8.0_131) on Thu Jul 06 18:02:39 CEST 2017 -->
-<title>C-Index</title>
-<meta name="date" content="2017-07-06">
-<link rel="stylesheet" type="text/css" href="../stylesheet.css" title="Style">
-<script type="text/javascript" src="../script.js"></script>
-</head>
-<body>
-<script type="text/javascript"><!--
-    try {
-        if (location.href.indexOf('is-external=true') == -1) {
-            parent.document.title="C-Index";
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-    }
-//-->
-</script>
-<noscript>
-<div>JavaScript is disabled on your browser.</div>
-</noscript>
-<!-- ========= START OF TOP NAVBAR ======= -->
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-<div class="skipNav"><a href="#skip.navbar.top" title="Skip navigation links">Skip navigation links</a></div>
-<a name="navbar.top.firstrow">
-<!--   -->
-</a>
-<ul class="navList" title="Navigation">
-<li><a href="../com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
-<li>Class</li>
-<li>Use</li>
-<li><a href="../com/arm/cmsis/zone/gen/data/package-tree.html">Tree</a></li>
-<li><a href="../deprecated-list.html">Deprecated</a></li>
-<li class="navBarCell1Rev">Index</li>
-<li><a href="../help-doc.html">Help</a></li>
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-<li>Prev Letter</li>
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-  if(window==top) {
-    allClassesLink.style.display = "block";
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-  }
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-</script>
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-<!--   -->
-</a>
-<h2 class="title">C</h2>
-<dl>
-<dt><a href="../com/arm/cmsis/zone/gen/data/package-summary.html">com.arm.cmsis.zone.gen.data</a> - package com.arm.cmsis.zone.gen.data</dt>
-<dd>&nbsp;</dd>
-</dl>
-<a href="index-1.html">C</a>&nbsp;<a href="index-2.html">F</a>&nbsp;<a href="index-3.html">G</a>&nbsp;<a href="index-4.html">I</a>&nbsp;</div>
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-<ul class="navList" title="Navigation">
-<li><a href="../com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
-<li>Class</li>
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-<li class="navBarCell1Rev">Index</li>
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diff --git a/docs/Zone/genmodel/index-files/index-2.html b/docs/Zone/genmodel/index-files/index-2.html
deleted file mode 100644
index 85ab23e..0000000
--- a/docs/Zone/genmodel/index-files/index-2.html
+++ /dev/null
@@ -1,200 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
-<!-- NewPage -->
-<html lang="en">
-<head>
-<!-- Generated by javadoc (1.8.0_131) on Thu Jul 06 18:02:39 CEST 2017 -->
-<title>F-Index</title>
-<meta name="date" content="2017-07-06">
-<link rel="stylesheet" type="text/css" href="../stylesheet.css" title="Style">
-<script type="text/javascript" src="../script.js"></script>
-</head>
-<body>
-<script type="text/javascript"><!--
-    try {
-        if (location.href.indexOf('is-external=true') == -1) {
-            parent.document.title="F-Index";
-        }
-    }
-    catch(err) {
-    }
-//-->
-</script>
-<noscript>
-<div>JavaScript is disabled on your browser.</div>
-</noscript>
-<!-- ========= START OF TOP NAVBAR ======= -->
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-<!--   -->
-</a>
-<div class="skipNav"><a href="#skip.navbar.top" title="Skip navigation links">Skip navigation links</a></div>
-<a name="navbar.top.firstrow">
-<!--   -->
-</a>
-<ul class="navList" title="Navigation">
-<li><a href="../com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
-<li>Class</li>
-<li>Use</li>
-<li><a href="../com/arm/cmsis/zone/gen/data/package-tree.html">Tree</a></li>
-<li><a href="../deprecated-list.html">Deprecated</a></li>
-<li class="navBarCell1Rev">Index</li>
-<li><a href="../help-doc.html">Help</a></li>
-</ul>
-</div>
-<div class="subNav">
-<ul class="navList">
-<li><a href="index-1.html">Prev Letter</a></li>
-<li><a href="index-3.html">Next Letter</a></li>
-</ul>
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-<li><a href="index-2.html" target="_top">No&nbsp;Frames</a></li>
-</ul>
-<ul class="navList" id="allclasses_navbar_top">
-<li><a href="../allclasses-noframe.html">All&nbsp;Classes</a></li>
-</ul>
-<div>
-<script type="text/javascript"><!--
-  allClassesLink = document.getElementById("allclasses_navbar_top");
-  if(window==top) {
-    allClassesLink.style.display = "block";
-  }
-  else {
-    allClassesLink.style.display = "none";
-  }
-  //-->
-</script>
-</div>
-<a name="skip.navbar.top">
-<!--   -->
-</a></div>
-<!-- ========= END OF TOP NAVBAR ========= -->
-<div class="contentContainer"><a href="index-1.html">C</a>&nbsp;<a href="index-2.html">F</a>&nbsp;<a href="index-3.html">G</a>&nbsp;<a href="index-4.html">I</a>&nbsp;<a name="I:F">
-<!--   -->
-</a>
-<h2 class="title">F</h2>
-<dl>
-<dt><a href="../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data"><span class="typeNameLink">FmBlock</span></a> - Class in <a href="../com/arm/cmsis/zone/gen/data/package-summary.html">com.arm.cmsis.zone.gen.data</a></dt>
-<dd>
-<div class="block">Block - Generator Data Model Element
- 
- A block specifies the properties for a certain area of logical memory.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmBlock.html#FmBlock-com.arm.cmsis.zone.data.ICpMemoryBlock-">FmBlock(ICpMemoryBlock)</a></span> - Constructor for class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a></dt>
-<dd>
-<div class="block">Create a Block generator data model element.</div>
-</dd>
-<dt><a href="../com/arm/cmsis/zone/gen/data/FmCapture.html" title="class in com.arm.cmsis.zone.gen.data"><span class="typeNameLink">FmCapture</span></a> - Class in <a href="../com/arm/cmsis/zone/gen/data/package-summary.html">com.arm.cmsis.zone.gen.data</a></dt>
-<dd>
-<div class="block">Capture Item - Generator Data Model Element
- 
- A capture item specifies a set of symbols, filtered
- by compilation unit, which should be used.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmCapture.html#FmCapture-com.arm.cmsis.zone.data.ICpCaptureItem-">FmCapture(ICpCaptureItem)</a></span> - Constructor for class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmCapture.html" title="class in com.arm.cmsis.zone.gen.data">FmCapture</a></dt>
-<dd>
-<div class="block">Create Capture generator data model element.</div>
-</dd>
-<dt><a href="../com/arm/cmsis/zone/gen/data/FmDevice.html" title="class in com.arm.cmsis.zone.gen.data"><span class="typeNameLink">FmDevice</span></a> - Class in <a href="../com/arm/cmsis/zone/gen/data/package-summary.html">com.arm.cmsis.zone.gen.data</a></dt>
-<dd>
-<div class="block">Device - Generator Data Model Element
- 
- Implements access to detailed informations about a device
- available in the system.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmDevice.html#FmDevice-com.arm.cmsis.zone.data.ICpDeviceResource-">FmDevice(ICpDeviceResource)</a></span> - Constructor for class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmDevice.html" title="class in com.arm.cmsis.zone.gen.data">FmDevice</a></dt>
-<dd>
-<div class="block">Create Device generator data model element.</div>
-</dd>
-<dt><a href="../com/arm/cmsis/zone/gen/data/FmInterrupt.html" title="class in com.arm.cmsis.zone.gen.data"><span class="typeNameLink">FmInterrupt</span></a> - Class in <a href="../com/arm/cmsis/zone/gen/data/package-summary.html">com.arm.cmsis.zone.gen.data</a></dt>
-<dd>
-<div class="block">Interrupt - Generator Data Model Element
- 
- A interrupt element gives information about an interrupt
- and its declared usage.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmInterrupt.html#FmInterrupt-com.arm.cmsis.zone.data.ICpInterrupt-com.arm.cmsis.zone.gen.data.FmBlock-">FmInterrupt(ICpInterrupt, FmBlock)</a></span> - Constructor for class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmInterrupt.html" title="class in com.arm.cmsis.zone.gen.data">FmInterrupt</a></dt>
-<dd>
-<div class="block">Create Interrupt generator data model element.</div>
-</dd>
-<dt><a href="../com/arm/cmsis/zone/gen/data/FmProcess.html" title="class in com.arm.cmsis.zone.gen.data"><span class="typeNameLink">FmProcess</span></a> - Class in <a href="../com/arm/cmsis/zone/gen/data/package-summary.html">com.arm.cmsis.zone.gen.data</a></dt>
-<dd>
-<div class="block">Process - Generator Data Model Element
- 
- A process (or execution zone) defines a group of threads
- sharing common access privileges.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmProcess.html#FmProcess-com.arm.cmsis.zone.data.ICpProcess-">FmProcess(ICpProcess)</a></span> - Constructor for class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmProcess.html" title="class in com.arm.cmsis.zone.gen.data">FmProcess</a></dt>
-<dd>
-<div class="block">Create Process generator data model element.</div>
-</dd>
-<dt><a href="../com/arm/cmsis/zone/gen/data/FmProcessor.html" title="class in com.arm.cmsis.zone.gen.data"><span class="typeNameLink">FmProcessor</span></a> - Class in <a href="../com/arm/cmsis/zone/gen/data/package-summary.html">com.arm.cmsis.zone.gen.data</a></dt>
-<dd>
-<div class="block">Processor - Generator Data Model Element
- 
- A processor defines specific informations about individual
- processing elements embodied on a device.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmProcessor.html#FmProcessor-com.arm.cmsis.zone.data.ICpProcessorResource-">FmProcessor(ICpProcessorResource)</a></span> - Constructor for class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmProcessor.html" title="class in com.arm.cmsis.zone.gen.data">FmProcessor</a></dt>
-<dd>
-<div class="block">Create Processor generator data model element.</div>
-</dd>
-<dt><a href="../com/arm/cmsis/zone/gen/data/FmZone.html" title="class in com.arm.cmsis.zone.gen.data"><span class="typeNameLink">FmZone</span></a> - Class in <a href="../com/arm/cmsis/zone/gen/data/package-summary.html">com.arm.cmsis.zone.gen.data</a></dt>
-<dd>
-<div class="block">Project Zone - Generator Data Model Root Element
- 
- Implements the root element for the generator data model.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmZone.html#FmZone-com.arm.cmsis.zone.data.ICpZone-">FmZone(ICpZone)</a></span> - Constructor for class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmZone.html" title="class in com.arm.cmsis.zone.gen.data">FmZone</a></dt>
-<dd>
-<div class="block">Create a Zone generator data model element.</div>
-</dd>
-</dl>
-<a href="index-1.html">C</a>&nbsp;<a href="index-2.html">F</a>&nbsp;<a href="index-3.html">G</a>&nbsp;<a href="index-4.html">I</a>&nbsp;</div>
-<!-- ======= START OF BOTTOM NAVBAR ====== -->
-<div class="bottomNav"><a name="navbar.bottom">
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-<div class="skipNav"><a href="#skip.navbar.bottom" title="Skip navigation links">Skip navigation links</a></div>
-<a name="navbar.bottom.firstrow">
-<!--   -->
-</a>
-<ul class="navList" title="Navigation">
-<li><a href="../com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
-<li>Class</li>
-<li>Use</li>
-<li><a href="../com/arm/cmsis/zone/gen/data/package-tree.html">Tree</a></li>
-<li><a href="../deprecated-list.html">Deprecated</a></li>
-<li class="navBarCell1Rev">Index</li>
-<li><a href="../help-doc.html">Help</a></li>
-</ul>
-</div>
-<div class="subNav">
-<ul class="navList">
-<li><a href="index-1.html">Prev Letter</a></li>
-<li><a href="index-3.html">Next Letter</a></li>
-</ul>
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-<li><a href="../index.html?index-files/index-2.html" target="_top">Frames</a></li>
-<li><a href="index-2.html" target="_top">No&nbsp;Frames</a></li>
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-<ul class="navList" id="allclasses_navbar_bottom">
-<li><a href="../allclasses-noframe.html">All&nbsp;Classes</a></li>
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-  if(window==top) {
-    allClassesLink.style.display = "block";
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-<a name="skip.navbar.bottom">
-<!--   -->
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-<!-- ======== END OF BOTTOM NAVBAR ======= -->
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diff --git a/docs/Zone/genmodel/index-files/index-3.html b/docs/Zone/genmodel/index-files/index-3.html
deleted file mode 100644
index fe4879a..0000000
--- a/docs/Zone/genmodel/index-files/index-3.html
+++ /dev/null
@@ -1,248 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
-<!-- NewPage -->
-<html lang="en">
-<head>
-<!-- Generated by javadoc (1.8.0_131) on Thu Jul 06 18:02:39 CEST 2017 -->
-<title>G-Index</title>
-<meta name="date" content="2017-07-06">
-<link rel="stylesheet" type="text/css" href="../stylesheet.css" title="Style">
-<script type="text/javascript" src="../script.js"></script>
-</head>
-<body>
-<script type="text/javascript"><!--
-    try {
-        if (location.href.indexOf('is-external=true') == -1) {
-            parent.document.title="G-Index";
-        }
-    }
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-    }
-//-->
-</script>
-<noscript>
-<div>JavaScript is disabled on your browser.</div>
-</noscript>
-<!-- ========= START OF TOP NAVBAR ======= -->
-<div class="topNav"><a name="navbar.top">
-<!--   -->
-</a>
-<div class="skipNav"><a href="#skip.navbar.top" title="Skip navigation links">Skip navigation links</a></div>
-<a name="navbar.top.firstrow">
-<!--   -->
-</a>
-<ul class="navList" title="Navigation">
-<li><a href="../com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
-<li>Class</li>
-<li>Use</li>
-<li><a href="../com/arm/cmsis/zone/gen/data/package-tree.html">Tree</a></li>
-<li><a href="../deprecated-list.html">Deprecated</a></li>
-<li class="navBarCell1Rev">Index</li>
-<li><a href="../help-doc.html">Help</a></li>
-</ul>
-</div>
-<div class="subNav">
-<ul class="navList">
-<li><a href="index-2.html">Prev Letter</a></li>
-<li><a href="index-4.html">Next Letter</a></li>
-</ul>
-<ul class="navList">
-<li><a href="../index.html?index-files/index-3.html" target="_top">Frames</a></li>
-<li><a href="index-3.html" target="_top">No&nbsp;Frames</a></li>
-</ul>
-<ul class="navList" id="allclasses_navbar_top">
-<li><a href="../allclasses-noframe.html">All&nbsp;Classes</a></li>
-</ul>
-<div>
-<script type="text/javascript"><!--
-  allClassesLink = document.getElementById("allclasses_navbar_top");
-  if(window==top) {
-    allClassesLink.style.display = "block";
-  }
-  else {
-    allClassesLink.style.display = "none";
-  }
-  //-->
-</script>
-</div>
-<a name="skip.navbar.top">
-<!--   -->
-</a></div>
-<!-- ========= END OF TOP NAVBAR ========= -->
-<div class="contentContainer"><a href="index-1.html">C</a>&nbsp;<a href="index-2.html">F</a>&nbsp;<a href="index-3.html">G</a>&nbsp;<a href="index-4.html">I</a>&nbsp;<a name="I:G">
-<!--   -->
-</a>
-<h2 class="title">G</h2>
-<dl>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmDevice.html#getBlocks--">getBlocks()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmDevice.html" title="class in com.arm.cmsis.zone.gen.data">FmDevice</a></dt>
-<dd>
-<div class="block">Get a collection of blocks for this device.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmProcess.html#getBlocks--">getBlocks()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmProcess.html" title="class in com.arm.cmsis.zone.gen.data">FmProcess</a></dt>
-<dd>
-<div class="block">Get a collection of blocks assigned to this process.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmProcessor.html#getBlocks--">getBlocks()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmProcessor.html" title="class in com.arm.cmsis.zone.gen.data">FmProcessor</a></dt>
-<dd>
-<div class="block">Get a collection of leaf blocks visible to this processor.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmZone.html#getBlocks--">getBlocks()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmZone.html" title="class in com.arm.cmsis.zone.gen.data">FmZone</a></dt>
-<dd>
-<div class="block">Get a collection with all blocks assigned to this zone.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmBlock.html#getCaptureList--">getCaptureList()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a></dt>
-<dd>
-<div class="block">Get a collection of capture elements for this block.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmCapture.html#getCunit--">getCunit()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmCapture.html" title="class in com.arm.cmsis.zone.gen.data">FmCapture</a></dt>
-<dd>
-<div class="block">Get the filter string for the compilation units to be taken
- into account by this capture.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmProcessor.html#getDevice--">getDevice()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmProcessor.html" title="class in com.arm.cmsis.zone.gen.data">FmProcessor</a></dt>
-<dd>
-<div class="block">Get the device this processor is contained in.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmZone.html#getDevice--">getDevice()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmZone.html" title="class in com.arm.cmsis.zone.gen.data">FmZone</a></dt>
-<dd>
-<div class="block">Get the device this zone is linked to.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmBlock.html#getInfo--">getInfo()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a></dt>
-<dd>
-<div class="block">Get the brief description for this block.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmInterrupt.html#getInfo--">getInfo()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmInterrupt.html" title="class in com.arm.cmsis.zone.gen.data">FmInterrupt</a></dt>
-<dd>
-<div class="block">Get brief interrupt description.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmBlock.html#getInterrupts--">getInterrupts()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a></dt>
-<dd>
-<div class="block">Get a hash with available interrupts.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmBlock.html#getName--">getName()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a></dt>
-<dd>
-<div class="block">Get the blocks name.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmDevice.html#getName--">getName()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmDevice.html" title="class in com.arm.cmsis.zone.gen.data">FmDevice</a></dt>
-<dd>
-<div class="block">Get the device name.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmInterrupt.html#getName--">getName()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmInterrupt.html" title="class in com.arm.cmsis.zone.gen.data">FmInterrupt</a></dt>
-<dd>
-<div class="block">Get the interrupt name.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmProcess.html#getName--">getName()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmProcess.html" title="class in com.arm.cmsis.zone.gen.data">FmProcess</a></dt>
-<dd>
-<div class="block">Get the processes name.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmProcessor.html#getName--">getName()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmProcessor.html" title="class in com.arm.cmsis.zone.gen.data">FmProcessor</a></dt>
-<dd>
-<div class="block">Get processors name.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmZone.html#getName--">getName()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmZone.html" title="class in com.arm.cmsis.zone.gen.data">FmZone</a></dt>
-<dd>
-<div class="block">Get the zones name.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmInterrupt.html#getNumber--">getNumber()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmInterrupt.html" title="class in com.arm.cmsis.zone.gen.data">FmInterrupt</a></dt>
-<dd>
-<div class="block">Get interrupt number.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmDevice.html#getPackageName--">getPackageName()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmDevice.html" title="class in com.arm.cmsis.zone.gen.data">FmDevice</a></dt>
-<dd>
-<div class="block">Get the pack name support for this device is provided by,
- might be empty if no device family pack is available.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmDevice.html#getPackageVendor--">getPackageVendor()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmDevice.html" title="class in com.arm.cmsis.zone.gen.data">FmDevice</a></dt>
-<dd>
-<div class="block">Get the device family pack vendor name.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmZone.html#getProcesses--">getProcesses()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmZone.html" title="class in com.arm.cmsis.zone.gen.data">FmZone</a></dt>
-<dd>
-<div class="block">Get a collection of all processes defined in this zone.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmZone.html#getProcessor--">getProcessor()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmZone.html" title="class in com.arm.cmsis.zone.gen.data">FmZone</a></dt>
-<dd>
-<div class="block">Get the processor this zone is linked to.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmBlock.html#getProperties--">getProperties()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a></dt>
-<dd>
-<div class="block">Get a hash with associated key-values-properties.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmBlock.html#getSize--">getSize()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a></dt>
-<dd>
-<div class="block">Get the size of this block in bytes.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmBlock.html#getStart--">getStart()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a></dt>
-<dd>
-<div class="block">Get the start address of this block.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmBlock.html#getSubBlocks--">getSubBlocks()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a></dt>
-<dd>
-<div class="block">Get a collection of blocks this one is divided into.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmCapture.html#getSymbol--">getSymbol()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmCapture.html" title="class in com.arm.cmsis.zone.gen.data">FmCapture</a></dt>
-<dd>
-<div class="block">Get the filter string for the linker symbols to be taken
- into account by this capture.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmDevice.html#getVendor--">getVendor()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmDevice.html" title="class in com.arm.cmsis.zone.gen.data">FmDevice</a></dt>
-<dd>
-<div class="block">Get the vendor name of the device.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmZone.html#getVisibleBlocks--">getVisibleBlocks()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmZone.html" title="class in com.arm.cmsis.zone.gen.data">FmZone</a></dt>
-<dd>
-<div class="block">Get a collection with all leaf blocks visible to this zone.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmZone.html#getVisibleResources--">getVisibleResources()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmZone.html" title="class in com.arm.cmsis.zone.gen.data">FmZone</a></dt>
-<dd>
-<div class="block">Get a collection with all resources visible to this zone.</div>
-</dd>
-</dl>
-<a href="index-1.html">C</a>&nbsp;<a href="index-2.html">F</a>&nbsp;<a href="index-3.html">G</a>&nbsp;<a href="index-4.html">I</a>&nbsp;</div>
-<!-- ======= START OF BOTTOM NAVBAR ====== -->
-<div class="bottomNav"><a name="navbar.bottom">
-<!--   -->
-</a>
-<div class="skipNav"><a href="#skip.navbar.bottom" title="Skip navigation links">Skip navigation links</a></div>
-<a name="navbar.bottom.firstrow">
-<!--   -->
-</a>
-<ul class="navList" title="Navigation">
-<li><a href="../com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
-<li>Class</li>
-<li>Use</li>
-<li><a href="../com/arm/cmsis/zone/gen/data/package-tree.html">Tree</a></li>
-<li><a href="../deprecated-list.html">Deprecated</a></li>
-<li class="navBarCell1Rev">Index</li>
-<li><a href="../help-doc.html">Help</a></li>
-</ul>
-</div>
-<div class="subNav">
-<ul class="navList">
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-<li><a href="index-3.html" target="_top">No&nbsp;Frames</a></li>
-</ul>
-<ul class="navList" id="allclasses_navbar_bottom">
-<li><a href="../allclasses-noframe.html">All&nbsp;Classes</a></li>
-</ul>
-<div>
-<script type="text/javascript"><!--
-  allClassesLink = document.getElementById("allclasses_navbar_bottom");
-  if(window==top) {
-    allClassesLink.style.display = "block";
-  }
-  else {
-    allClassesLink.style.display = "none";
-  }
-  //-->
-</script>
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-<a name="skip.navbar.bottom">
-<!--   -->
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diff --git a/docs/Zone/genmodel/index-files/index-4.html b/docs/Zone/genmodel/index-files/index-4.html
deleted file mode 100644
index 85ad64b..0000000
--- a/docs/Zone/genmodel/index-files/index-4.html
+++ /dev/null
@@ -1,169 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
-<!-- NewPage -->
-<html lang="en">
-<head>
-<!-- Generated by javadoc (1.8.0_131) on Thu Jul 06 18:02:39 CEST 2017 -->
-<title>I-Index</title>
-<meta name="date" content="2017-07-06">
-<link rel="stylesheet" type="text/css" href="../stylesheet.css" title="Style">
-<script type="text/javascript" src="../script.js"></script>
-</head>
-<body>
-<script type="text/javascript"><!--
-    try {
-        if (location.href.indexOf('is-external=true') == -1) {
-            parent.document.title="I-Index";
-        }
-    }
-    catch(err) {
-    }
-//-->
-</script>
-<noscript>
-<div>JavaScript is disabled on your browser.</div>
-</noscript>
-<!-- ========= START OF TOP NAVBAR ======= -->
-<div class="topNav"><a name="navbar.top">
-<!--   -->
-</a>
-<div class="skipNav"><a href="#skip.navbar.top" title="Skip navigation links">Skip navigation links</a></div>
-<a name="navbar.top.firstrow">
-<!--   -->
-</a>
-<ul class="navList" title="Navigation">
-<li><a href="../com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
-<li>Class</li>
-<li>Use</li>
-<li><a href="../com/arm/cmsis/zone/gen/data/package-tree.html">Tree</a></li>
-<li><a href="../deprecated-list.html">Deprecated</a></li>
-<li class="navBarCell1Rev">Index</li>
-<li><a href="../help-doc.html">Help</a></li>
-</ul>
-</div>
-<div class="subNav">
-<ul class="navList">
-<li><a href="index-3.html">Prev Letter</a></li>
-<li>Next Letter</li>
-</ul>
-<ul class="navList">
-<li><a href="../index.html?index-files/index-4.html" target="_top">Frames</a></li>
-<li><a href="index-4.html" target="_top">No&nbsp;Frames</a></li>
-</ul>
-<ul class="navList" id="allclasses_navbar_top">
-<li><a href="../allclasses-noframe.html">All&nbsp;Classes</a></li>
-</ul>
-<div>
-<script type="text/javascript"><!--
-  allClassesLink = document.getElementById("allclasses_navbar_top");
-  if(window==top) {
-    allClassesLink.style.display = "block";
-  }
-  else {
-    allClassesLink.style.display = "none";
-  }
-  //-->
-</script>
-</div>
-<a name="skip.navbar.top">
-<!--   -->
-</a></div>
-<!-- ========= END OF TOP NAVBAR ========= -->
-<div class="contentContainer"><a href="index-1.html">C</a>&nbsp;<a href="index-2.html">F</a>&nbsp;<a href="index-3.html">G</a>&nbsp;<a href="index-4.html">I</a>&nbsp;<a name="I:I">
-<!--   -->
-</a>
-<h2 class="title">I</h2>
-<dl>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmBlock.html#isCallable--">isCallable()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a></dt>
-<dd>
-<div class="block">Get non-secure-callable access attribute.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmBlock.html#isExecutable--">isExecutable()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a></dt>
-<dd>
-<div class="block">Get executable access attribute.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmBlock.html#isNonSecure--">isNonSecure()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a></dt>
-<dd>
-<div class="block">Get non-secure access attribute.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmInterrupt.html#isNonSecure--">isNonSecure()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmInterrupt.html" title="class in com.arm.cmsis.zone.gen.data">FmInterrupt</a></dt>
-<dd>
-<div class="block">Get non-secure usage of this interrupt.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmBlock.html#isPeripheral--">isPeripheral()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a></dt>
-<dd>
-<div class="block">Get peripheral access attribute.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmBlock.html#isPrivileged--">isPrivileged()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a></dt>
-<dd>
-<div class="block">Get privileged access attribute.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmBlock.html#isReadable--">isReadable()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a></dt>
-<dd>
-<div class="block">Get readable access attribute.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmBlock.html#isSecure--">isSecure()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a></dt>
-<dd>
-<div class="block">Get secure access attribute.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmInterrupt.html#isSecure--">isSecure()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmInterrupt.html" title="class in com.arm.cmsis.zone.gen.data">FmInterrupt</a></dt>
-<dd>
-<div class="block">Get secure usage of this interrupt.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmBlock.html#isUnprivileged--">isUnprivileged()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a></dt>
-<dd>
-<div class="block">Get unprivileged access attribute.</div>
-</dd>
-<dt><span class="memberNameLink"><a href="../com/arm/cmsis/zone/gen/data/FmBlock.html#isWriteable--">isWriteable()</a></span> - Method in class com.arm.cmsis.zone.gen.data.<a href="../com/arm/cmsis/zone/gen/data/FmBlock.html" title="class in com.arm.cmsis.zone.gen.data">FmBlock</a></dt>
-<dd>
-<div class="block">Get writeable access attribute.</div>
-</dd>
-</dl>
-<a href="index-1.html">C</a>&nbsp;<a href="index-2.html">F</a>&nbsp;<a href="index-3.html">G</a>&nbsp;<a href="index-4.html">I</a>&nbsp;</div>
-<!-- ======= START OF BOTTOM NAVBAR ====== -->
-<div class="bottomNav"><a name="navbar.bottom">
-<!--   -->
-</a>
-<div class="skipNav"><a href="#skip.navbar.bottom" title="Skip navigation links">Skip navigation links</a></div>
-<a name="navbar.bottom.firstrow">
-<!--   -->
-</a>
-<ul class="navList" title="Navigation">
-<li><a href="../com/arm/cmsis/zone/gen/data/package-summary.html">Package</a></li>
-<li>Class</li>
-<li>Use</li>
-<li><a href="../com/arm/cmsis/zone/gen/data/package-tree.html">Tree</a></li>
-<li><a href="../deprecated-list.html">Deprecated</a></li>
-<li class="navBarCell1Rev">Index</li>
-<li><a href="../help-doc.html">Help</a></li>
-</ul>
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diff --git a/docs/Zone/html/AddMemoryBlock.png b/docs/Zone/html/AddMemoryBlock.png
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diff --git a/docs/Zone/html/AddNewZoneButton.png b/docs/Zone/html/AddNewZoneButton.png
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diff --git a/docs/Zone/html/Buttons.png b/docs/Zone/html/Buttons.png
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diff --git a/docs/Zone/html/CMSISPacksPreferences.png b/docs/Zone/html/CMSISPacksPreferences.png
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diff --git a/docs/Zone/html/DevelopmentFlow.png b/docs/Zone/html/DevelopmentFlow.png
deleted file mode 100644
index ccf2462..0000000
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diff --git a/docs/Zone/html/GUI.png b/docs/Zone/html/GUI.png
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diff --git a/docs/Zone/html/GenCodeButton.png b/docs/Zone/html/GenCodeButton.png
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diff --git a/docs/Zone/html/GenDataModel.html b/docs/Zone/html/GenDataModel.html
index 3e2c40f..5cff952 100644
--- a/docs/Zone/html/GenDataModel.html
+++ b/docs/Zone/html/GenDataModel.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Zone (Preview)
-   &#160;<span id="projectnumber">Version 0.0.1</span>
+   &#160;<span id="projectnumber">Version 0.9.2</span>
    </div>
    <div id="projectbrief">System Resource Management</div>
   </td>
@@ -110,61 +110,45 @@
 <div class="title">Generator Data Model </div>  </div>
 </div><!--header-->
 <div class="contents">
-<div class="textblock"><p>The <b>Generator Data Model</b> defines the view on the <b>Zone Description</b> for code generators. By defining a common data model code generators can be developed independendly from actual CMSIS Zone Projects and vendor tools.</p>
-<p>The CMSIS-Zone data (structured according to the Generator Data Model) is combined with file templates using the FreeMarker template engine to generate arbitrary project files, see picture below..</p>
+<div class="textblock"><p>The <b>Generator Data Model</b> defines the resource and partition data structure for code generators. This data structure is connected to a FreeMarker template engine and file templates allow to generate various files that can be used to configure development tools or hardware components.</p>
 <div class="image">
 <img src="generator.png" alt="generator.png"/>
 <div class="caption">
 FreeMarker Template Engine</div></div>
- <h1><a class="anchor" id="GenDataModel_Structure"></a>
-Data Model Structure</h1>
-<p>The class diagram below visualizes the overall structure of the <b>Generator Data Model</b>. The root element visible to the templates is FmZone.</p>
-<div class="image">
-<img src="genmodel.png" alt="genmodel.png"/>
-<div class="caption">
-Generator Data Model Class Diagram</div></div>
-<p> According to <a href="http://freemarker.org/docs/index.html" target="_blank">FreeMarker Documentation</a> one can access the named attributes like <a href="http://freemarker.org/docs/dgui_template_exp.html#dgui_template_exp_var_hash" target="_blank">retrieving data from a hash</a>. The reference implementation documented in detail below make use of the default FreeMarker <a href="http://freemarker.org/docs/pgui_misc_beanwrapper.html" target="_blank">Bean wrapper</a>. This leads to all Java methods named like <em>get&lt;Attribute&gt;</em> or <em>is&lt;Attribute&gt;</em> to be visible just as <em>&lt;Attribute&gt;</em> to the template.</p>
-<p>Please take note about the multiplicities stated in the diagram:</p>
+ <h1><a class="anchor" id="fp_toplevel"></a>
+FreeMarker top-level format</h1>
+<p><a class="el" href="fm_system.html">system element</a> provides memory layout and TrustZone configuration of the complete system. <a class="el" href="fm_zone.html">zone element</a> setup information of a zone (or system partition) along with related peripherals.</p>
+<h1><a class="anchor" id="fm_basics"></a>
+FreeMarker basics</h1>
+<p>The variable types relevant for CMSIS-Zone are:</p>
+<p><b>scalar:</b> variable that stores a single value of a scalar type scalar-types:</p>
 <ul>
-<li>0..1 indicates an optional value which might be unavailable, consider using <a href="http://freemarker.org/docs/dgui_template_exp.html#dgui_template_exp_missing" target="_blank">missing value handler operators</a>.</li>
-<li>1 indicates a mandatory value which is guaranteed to be valid.</li>
-<li>0..* indicates a collection or hash of values which might be empty.</li>
-<li>1..* indicates a collection or hash of values which is guaranteed to contain at least one element.</li>
+<li>string</li>
+<li>int</li>
+<li>bool</li>
 </ul>
-<p>For detailed descriptions of the data model elements please refere to the <a href="../genmodel/index.html" target="_blank">JavaDoc</a> documentation for</p>
-<ul>
-<li><a href="../genmodel/com/arm/cmsis/zone/gen/data/FmZone.html" target="_blank">FmZone</a></li>
-<li><a href="../genmodel/com/arm/cmsis/zone/gen/data/FmProcess.html" target="_blank">FmProcess</a></li>
-<li><a href="../genmodel/com/arm/cmsis/zone/gen/data/FmDevice.html" target="_blank">FmDevice</a></li>
-<li><a href="../genmodel/com/arm/cmsis/zone/gen/data/FmProcessor.html" target="_blank">FmProcesor</a></li>
-<li><a href="../genmodel/com/arm/cmsis/zone/gen/data/FmBlock.html" target="_blank">FmBlock</a></li>
-</ul>
-<h1><a class="anchor" id="GenDataModel_Examples"></a>
-Template Examples</h1>
-<p>To get an impression of how template files might look like please refere to the simplyfied examples in this section.</p>
-<h2><a class="anchor" id="GenDataModel_Examples_AssignedBlocks"></a>
-HTML table of all assigned memory blocks</h2>
-<p>This examples demonstrates how to iterate over the collection of memory blocks assigned to the project zone currently evaluated. The result of the template below is a HTML table with three columns listing block name, start address and size, respectively.</p>
-<div class="fragment"><div class="line">&lt;table&gt;</div>
-<div class="line">  &lt;th&gt;</div>
-<div class="line">    &lt;td&gt;Name&lt;/td&gt;</div>
-<div class="line">    &lt;td&gt;Start&lt;/td&gt;</div>
-<div class="line">    &lt;td&gt;Size&lt;/td&gt;</div>
-<div class="line">  &lt;/th&gt;</div>
-<div class="line">&lt;#list blocks as block&gt;</div>
-<div class="line">  &lt;tr&gt;</div>
-<div class="line">    &lt;td&gt;${block.name}&lt;/td&gt;</div>
-<div class="line">    &lt;td&gt;${block.start}&lt;/td&gt;</div>
-<div class="line">    &lt;td&gt;${block.size}&lt;/td&gt;</div>
-<div class="line">  &lt;/tr&gt;</div>
+<p><b>hash:</b> variable that that stores one or more variables with a unique lookup name</p>
+<p><b>sequence:</b> variable that stores sub-variables without names but instead are selected via index (myVariable[index])</p>
+<p>A variable is accessed using the dollar character followed by a variable or expression in brackets: </p>
+<div class="fragment"><div class="line">${...}</div>
+</div><!-- fragment --><p> Output the name of the zone: </p>
+<div class="fragment"><div class="line">${zone.name}</div>
+</div><!-- fragment --><p>A sequence gets iterated: </p>
+<div class="fragment"><div class="line">&lt;#list zone.memory as mem&gt;</div>
+<div class="line">   Memory region name $mem.name</div>
+<div class="line">&lt;/#list</div>
+<div class="line"></div>
+<div class="line">Printing a sorted list of all available memory entries by start address</div>
+<div class="line">\code</div>
+<div class="line">&lt;#list zone.memory?sort_by(<span class="stringliteral">&quot;start&quot;</span>) as mem&gt;</div>
+<div class="line">  ${mem.start} ${mem.name}</div>
 <div class="line">&lt;/#list&gt;</div>
-<div class="line">&lt;/table&gt;</div>
 </div><!-- fragment --> </div></div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-Zone (Preview) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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new file mode 100644
index 0000000..8eadf5c
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+var GenDataModel =
+[
+    [ "FreeMarker top-level format", "GenDataModel.html#fp_toplevel", null ],
+    [ "FreeMarker basics", "GenDataModel.html#fm_basics", null ],
+    [ "system element", "fm_system.html", "fm_system" ],
+    [ "zone element", "fm_zone.html", "fm_zone" ]
+];
\ No newline at end of file
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index 0000000..cc1c5b3
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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>CMSIS-Zone Use Cases</title>
+<title>CMSIS-Zone (Preview): CMSIS-Zone Use Cases</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
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+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
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+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
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+<div id="side-nav" class="ui-resizable side-nav-resizable">
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+    </div>
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+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
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+<script type="text/javascript">
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+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
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+        name="MSearchResults" id="MSearchResults">
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+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">CMSIS-Zone Use Cases </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p><b>CMSIS-Zone</b> simplifies to manage the complexity and the configuration of modern embedded systems that frequently include multiple processors and/or memory protection hardware. It helps to split the embedded application various projects which creates the need to partition system resources. And it simplifies the consistent configuration of access rights across the system, for example when using an MPU (memory protection unit).</p>
+<p>The following section describes several uses cases that benefit from <b>CMSIS-Zone</b>.</p>
+<h1><a class="anchor" id="UseCase_MPU"></a>
+MPU Protection</h1>
+<p>Focused on a single core microcontroller one might want to utilize the memory protection unit (MPU) capabilities to segregate parts of an application. Thus the need to partition the system resources accordingly arises.</p>
+<div class="image">
+<img src="mpu.png" alt="mpu.png"/>
+<div class="caption">
+MPU Protection</div></div>
+<h1><a class="anchor" id="UseCase_TrustZone"></a>
+TrustZone Partitioning</h1>
+<p>TrustZone extensions add another degree of segregation which must be handled consistently. In this case one has to handle MPU settings per security context and SAU configuration.</p>
+<div class="image">
+<img src="trustzone.png" alt="trustzone.png"/>
+<div class="caption">
+TrustZone Partitioning and MPU Protection</div></div>
+<h1><a class="anchor" id="UseCase_MultiCore"></a>
+Multi-Core Partitioning</h1>
+<p>Beside traditional single cores asymmetric and hybrid multi-core devices contribute to increasing development complexity for embedded systems. Having multiple cores running different parts of an application concurrently needs a well defined resource assignment to prevent undesired misbehavior.</p>
+<div class="image">
+<img src="multicore.png" alt="multicore.png"/>
+<div class="caption">
+Multi-Core Partitioning</div></div>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
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+</html>
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-<head>
-<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
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-<title>Zone Description Format</title>
-<title>CMSIS-Zone (Preview): Zone Description Format</title>
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-<link href="cmsis.css" rel="stylesheet" type="text/css" />
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-<script type="text/javascript" src="navtree.js"></script>
-<script type="text/javascript">
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-  $(window).load(resizeHeight);
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-<link href="search/search.css" rel="stylesheet" type="text/css"/>
-<script type="text/javascript" src="search/search.js"></script>
-<script type="text/javascript">
-  $(document).ready(function() { searchBox.OnSelectItem(0); });
-</script>
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-<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
-<div id="titlearea">
-<table cellspacing="0" cellpadding="0">
- <tbody>
- <tr style="height: 46px;">
-  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
-  <td style="padding-left: 0.5em;">
-   <div id="projectname">CMSIS-Zone (Preview)
-   &#160;<span id="projectnumber">Version 0.0.1</span>
-   </div>
-   <div id="projectbrief">System Resource Management</div>
-  </td>
- </tr>
- </tbody>
-</table>
-</div>
-<!-- end header part -->
-<div id="CMSISnav" class="tabs1">
-    <ul class="tablist">
-      <script type="text/javascript">
-		<!--
-		writeComponentTabs.call(this);
-		//-->
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-</div>
-<!-- Generated by Doxygen 1.8.6 -->
-<script type="text/javascript">
-var searchBox = new SearchBox("searchBox", "search",false,'Search');
-</script>
-  <div id="navrow1" class="tabs">
-    <ul class="tablist">
-      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
-      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
-      <li>
-        <div id="MSearchBox" class="MSearchBoxInactive">
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-        name="MSearchResults" id="MSearchResults">
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-
-<div class="header">
-  <div class="headertitle">
-<div class="title">Zone Description Format </div>  </div>
-</div><!--header-->
-<div class="contents">
-<div class="textblock"><p>The <b>Zone Description Format</b> uses standard XML annotations and is defined in the schema file <b>ZONE.xsd</b>. It is intended to provide a tool vendor agnostic storage format for</p>
-<ul>
-<li>describing embedded system resource capabilities<ul>
-<li>specific <a class="el" href="format_device.html">device</a> and <a class="el" href="format_processor.html">processor</a> properties</li>
-<li>available <a class="el" href="format_memory.html">memory</a> and <a class="el" href="format_peripheral.html">peripheral</a> resources</li>
-</ul>
-</li>
-<li>specifying resource partitioning across<ul>
-<li><a class="el" href="format_pzone.html">project zones</a>, e.g. for secure and non-secure firmware parts</li>
-<li><a class="el" href="format_xzone.html">execution zones</a>, e.g. for functional segregation</li>
-</ul>
-</li>
-</ul>
-<h1><a class="anchor" id="XML_Format_Model"></a>
-Storage Data Model</h1>
-<p>In the following diagram the overall structure of the <b>Storage Data Model</b> is depicted. The <a class="el" href="XML_Format.html#XML_Format_Schema">storage format</a> is derived from the model.</p>
-<div class="image">
-<img src="storagemodel.png" alt="storagemodel.png"/>
-<div class="caption">
-Storage Data Model Class Diagram</div></div>
-<p> The storage model is developed based on the domain and can be seen as the domain model as well. Its main purpose is to capture all information about presumable embedded systems and microcontroller devices.</p>
-<h2><a class="anchor" id="XML_Format_Model_Decomp"></a>
-Embedded Microcontroller System Decomposition</h2>
-<p>Todays available system-on-modules (SoM) and system-on-chips (SoC) already physically outlines the overall composition. It seems to be viable to stick with todays system structures. It's not likely that this structure will change drastically.</p>
-<p>A detailed view on the decomposition of an arbitrary SoM is given in the diagram below.</p>
-<div class="image">
-<img src="som-decomposition.png" alt="som-decomposition.png"/>
-<div class="caption">
-System-on-Module Decomposition</div></div>
-<p> The SoM itself (System) can be seen as a composition of one or more SoCs (Device) combined with an arbitrary amount of board-level resources, i.e. off-chip memory (Memory) and peripheral (Peripheral). In turn each SoC is a composition of one or more processor elements (Processor, PE) with chip-level resources, i.e. on-chip memory and peripheral.</p>
-<p>Private memory and peripheral resources local to a dedicated PE has been simplified. These can also be seen as chip-level resources.</p>
-<p>The grouping (ResourceGroup) is intended to allow structural grouping of resources elements, i.e. by type or bus structure.</p>
-<dl class="section note"><dt>Note</dt><dd>The names (i.e. <code>name</code> attributes) are typically used as references and hence must be unique per class. Duplicate names are allowed if object hierarchies do not overlap. I.e. resources contained on two separate SoCs may have the same name but the name of a SoM level resource must not be reused on SoC level.</dd></dl>
-<h2><a class="anchor" id="XML_Format_Model_MemMap"></a>
-Microcontroller Memory Map Specification</h2>
-<p>Most of the Multi-Core-SoCs available today show uniform memory maps. But in principle the logical memory address used to address a certain resource may vary between multiple PEs on the same SoC. Taking this into account leads to memory map specification on both SoC and PE level, see diagram below.</p>
-<div class="image">
-<img src="soc-memorymap.png" alt="soc-memorymap.png"/>
-<div class="caption">
-System-on-Chip Memory Map Specification</div></div>
-<p> The memory maps specified on SoC and PE level are additive, i.e. the PEs actual memory map is the combination of both. This split allow the specification of uniform memory maps without duplication. Only the non-uniform parts need to be specified on PE level.</p>
-<p>Each resource can be mapped as often as needed, i.e. to reflect multiple memory aliases. By default the <code>name</code> attribute is used to identify the resource to be mapped. In order to map the same resource multiple times into a PEs memory space the <code>alias</code> attribute must be given to identify the resource instead. The mapping names must be unique per PE because they are used as references later.</p>
-<p>The attributes of the mapping are merged with those of the resource mapped. This allows the mapping of an individual PE to enhance the basic attributes of a resource. For example a memory resource that is basically readable/writeable/executable might be mapped to a PE as readonly memory.</p>
-<h2><a class="anchor" id="XML_Format_Model_Assign"></a>
-Zone Resource Assignments</h2>
-<p>A system can be split into an arbitrary amount of project zones (PZone). And each PZone can be further split into execution zones (XZone). Resources used by an individual zone are represented using assignments (Assignment). Refer to the diagram below.</p>
-<div class="image">
-<img src="zone-assignment.png" alt="zone-assignment.png"/>
-<div class="caption">
-Zone Resource Assignments</div></div>
-<p> Each PZone is assigned to a dedicated PE which is selected to execute the resulting software part. The PE is referenced by the unique combination of <code>Dname</code> and <code>Pname</code> attributes. The XZones are contained in the PZone they belong to.</p>
-<p>Both PZones and XZones can have arbitrary assignments to available resources visible to the assigned PE. Assignments to SoC level resources not part of the SoC the PE is located on are illegal. Such assignments cannot be represented because the unique reference is built from <code>PZone::Dname</code> and <code>Assignment::name</code>.</p>
-<p>As a resource may be visible to the enclosing PE using multiple mappings the <code>as</code> attribute can be used to distinguish which alias is used for access. Selecting the correct alias is significant because of the effective access attributes resulting from merging <code>Resource.access</code>, <code>MemoryMapping.access</code>/<code>PeripheralMapping.access</code> and <code>Assignment.access</code>.</p>
-<p>Whilst peripheral resources can be assigned directly memory resources need to be split into blocks (MemoryBlock). A block can be seen as an arbitrary part of the physical memory. Individual blocks can be defined using modified access attributes, e.g. for having dedicated executable or readonly regions in RAM.</p>
-<h1><a class="anchor" id="XML_Format_Schema"></a>
-Zone Schema</h1>
-<p>The XML schema is defined hierarchically with the following top-level elements:</p>
-<p><a class="el" href="format_system.html">/system element</a></p>
-<ul>
-<li><a class="el" href="format_device.html">/device element</a></li>
-<li><a class="el" href="format_resources.html">/resources element</a></li>
-<li><a class="el" href="format_zones.html">/zones element</a></li>
-</ul>
-<div class="fragment"><div class="line">&lt;system&gt;</div>
-<div class="line">  </div>
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-<div class="line">  &lt;/zones&gt;</div>
-<div class="line">  </div>
-<div class="line">&lt;/system&gt;</div>
-</div><!-- fragment --><h1><a class="anchor" id="Example"></a>
-Example</h1>
-</div></div><!-- contents -->
-</div><!-- doc-content -->
-<!-- start footer part -->
-<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
-  <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-Zone (Preview) by Arm Ltd. All rights reserved.
-	<!--
-    <a href="http://www.doxygen.org/index.html">
-    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
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-      [ "Microcontroller Memory Map Specification", "XML_Format.html#XML_Format_Model_MemMap", null ],
-      [ "Zone Resource Assignments", "XML_Format.html#XML_Format_Model_Assign", null ]
-    ] ],
-    [ "Zone Schema", "XML_Format.html#XML_Format_Schema", null ],
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@@ -1148,7 +1148,7 @@
 
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-        text-align: center;
+        text-align: left;
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new file mode 100644
index 0000000..e4dc967
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+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>interrupt[n] sequence element</title>
+<title>CMSIS-Zone (Preview): interrupt[n] sequence element</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
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+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
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+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
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+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
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+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
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+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
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+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('fm_interrupt.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">interrupt[n] sequence element </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="fm_interrupt.html">interrupt[n] sequence element</a> lists all interrupt sources available in the system.</p>
+<table  class="cmtable" summary="Element: interrupt[n]">
+<tr>
+<th>Parent Element </th><th colspan="2">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="fm_system.html">system</a> </td><td colspan="3"><a class="el" href="fm_system.html">system element</a> s </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type  </th></tr>
+<tr>
+<td>.interrupt[<em>n</em>].name </td><td>The name of this interrupt. </td><td>xs:string  </td></tr>
+<tr>
+<td>.interrupt[<em>n</em>].irqn </td><td>The interrupt number. </td><td>NonNegativeInteger  </td></tr>
+<tr>
+<td>.interrupt[<em>n</em>].security </td><td>The <a class="el" href="zoneFormat.html#security">security</a> setting for this interrupt. </td><td>SecurityTypeEnum/xs:string  </td></tr>
+<tr>
+<td>.interrupt[<em>n</em>].security.s </td><td>Peripheral with related interrupt is assigned to <em>"secure"</em> state. </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.interrupt[<em>n</em>].security.n </td><td>Peripheral with related interrupt is assigned to <em>"non-secure"</em> state. </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.interrupt[<em>n</em>].info </td><td>Brief description of the interrupt source. </td><td>xs:string  </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="GenDataModel.html">Generator Data Model</a></li><li class="navelem"><a class="el" href="fm_system.html">system element</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/fm_memory.html b/docs/Zone/html/fm_memory.html
new file mode 100644
index 0000000..e3ef3ed
--- /dev/null
+++ b/docs/Zone/html/fm_memory.html
@@ -0,0 +1,183 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>../memory[n] sequence element</title>
+<title>CMSIS-Zone (Preview): ../memory[n] sequence element</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('fm_memory.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">../memory[n] sequence element </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="fm_memory.html">../memory[n] sequence element</a> provides a sequence of memory information.</p>
+<table  class="cmtable" summary="Element: memory[n]">
+<tr>
+<th>Parent Element </th><th colspan="2">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="fm_system.html">system</a> </td><td colspan="3"><a class="el" href="fm_system.html">system element</a>  </td></tr>
+<tr>
+<td><a class="el" href="fm_zone.html">zone</a> </td><td colspan="3"><a class="el" href="fm_zone.html">zone element</a>  </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type  </th></tr>
+<tr>
+<td>.memory[<em>n</em>] </td><td>Sequence of memory region information. </td><td>sequence  </td></tr>
+<tr>
+<td>.memory[<em>n</em>].name </td><td>The name of this memory region. </td><td>xs:string  </td></tr>
+<tr>
+<td>.memory[<em>n</em>].type </td><td>The type of memory in this region ("RAM" or "ROM"). </td><td>MemoryTypeEnum  </td></tr>
+<tr>
+<td>.memory[<em>n</em>].start </td><td>The logical start address of the memory region in the address map. </td><td>NonNegativeInteger  </td></tr>
+<tr>
+<td>.memory[<em>n</em>].size </td><td>The size (in bytes) of the memory region. </td><td>NonNegativeInteger  </td></tr>
+<tr>
+<td>.memory[<em>n</em>].security </td><td>The <a class="el" href="zoneFormat.html#security">security</a> setting for this memory region. </td><td>SecurityType  </td></tr>
+<tr>
+<td>.memory[<em>n</em>].security.c </td><td>Memory has non-secure callable attribute set. </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.memory[<em>n</em>].security.s </td><td>Memory is access from <em>"secure"</em> state. </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.memory[<em>n</em>].security.n </td><td>Memory is access from <em>"non-secure"</em> state. </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.memory[<em>n</em>].access </td><td>The <a class="el" href="zoneFormat.html#access">access</a> permissions for this memory region in the following separate fields. </td><td>AccessType  </td></tr>
+<tr>
+<td>.memory[<em>n</em>].access.r </td><td>The <em>read</em> <a class="el" href="zoneFormat.html#access">access</a> permission. </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.memory[<em>n</em>].access.w </td><td>The <em>write</em> <a class="el" href="zoneFormat.html#access">access</a> permission. </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.memory[<em>n</em>].access.x </td><td>The <em>execution</em> <a class="el" href="zoneFormat.html#access">access</a> permission. </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.memory[<em>n</em>].access.p </td><td>The <em>peripheral</em> <a class="el" href="zoneFormat.html#access">access</a> information. </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.memory[<em>n</em>].privilege </td><td>The <a class="el" href="zoneFormat.html#privilege">privilege type</a> settings for this memory region in the following separate fields. </td><td>PrivilegeType  </td></tr>
+<tr>
+<td>.memory[<em>n</em>].privilege.p </td><td>The <em>privileged</em> <em>level</em> setting of <a class="el" href="zoneFormat.html#privilege">privilege type</a>. </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.memory[<em>n</em>].privilege.u </td><td>The <em>unprivileged</em> <em>level</em> setting of <a class="el" href="zoneFormat.html#privilege">privilege type</a>. </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.memory[<em>n</em>].startup </td><td>"1" specifies that this region is used for the startup code of the application. Default value is "0". </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.memory[<em>n</em>].uninit </td><td>"1" specifies that this region is not zero initialized during startup. Default value is "0". </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.memory[<em>n</em>].shared </td><td>"1" specifies that this region is used by multiple zones. Default value is "0". </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.memory[<em>n</em>].dma </td><td>"1" specifies that this region is accessed by a DMA controller. Default value is "0". </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.memory[<em>n</em>].info </td><td>Brief description of the memory region. </td><td>xs:string  </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="GenDataModel.html">Generator Data Model</a></li><li class="navelem"><a class="el" href="fm_zone.html">zone element</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/fm_mpc_setup.html b/docs/Zone/html/fm_mpc_setup.html
new file mode 100644
index 0000000..1a306e1
--- /dev/null
+++ b/docs/Zone/html/fm_mpc_setup.html
@@ -0,0 +1,149 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>mpc_setup[n] element</title>
+<title>CMSIS-Zone (Preview): mpc_setup[n] element</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('fm_mpc_setup.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">mpc_setup[n] element </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="fm_mpc_setup.html">mpc_setup[n] element</a> contains a sequence of device specific configuration for the setup of the Memory Protection Controller (MPC).</p>
+<table  class="cmtable" summary="Element: mpc_setup[n]">
+<tr>
+<th>Parent Element </th><th colspan="2">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="fm_system.html">system</a> </td><td colspan="3"><a class="el" href="fm_system.html">system element</a>  </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type  </th></tr>
+<tr>
+<td>.mpc_setup[<em>n</em>].name </td><td>The name of the base register that controls the MPC. </td><td>xs:string  </td></tr>
+<tr>
+<td>.mpc_setup[<em>n</em>].memory </td><td>The name of the physical memory region that is connected via the MPC. </td><td>xs:string  </td></tr>
+<tr>
+<td>.mpc_setup[<em>n</em>].blk_size </td><td>The block size information that CMSIS-Zone used for LUT generation. </td><td>NonNegativeInteger  </td></tr>
+<tr>
+<td>.mpc_setup[<em>n</em>].S_bit[<em>m</em>] </td><td>A list of bit values for Secure attribute that are used to compose the LUT. </td><td>NonNegativeInteger  </td></tr>
+<tr>
+<td>.mpc_setup[<em>n</em>].P_bit[<em>m</em>] </td><td>A list of bit values for Privileged attribute that are used to compose the LUT. </td><td>NonNegativeInteger  </td></tr>
+<tr>
+<td>.mpc_setup[<em>n</em>].bits_comment[<em>m</em>] </td><td>The memory region information for source code comments that relate to S_bits or P_bits. </td><td>xs:string  </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="GenDataModel.html">Generator Data Model</a></li><li class="navelem"><a class="el" href="fm_system.html">system element</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/fm_mpu_setup.html b/docs/Zone/html/fm_mpu_setup.html
new file mode 100644
index 0000000..42f9e10
--- /dev/null
+++ b/docs/Zone/html/fm_mpu_setup.html
@@ -0,0 +1,147 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>mpu_setup element</title>
+<title>CMSIS-Zone (Preview): mpu_setup element</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
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+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('fm_mpu_setup.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">mpu_setup element </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="fm_mpu_setup.html">mpu_setup element</a> contains the configuration information for the Memory Protection Unit (MPU).</p>
+<table  class="cmtable" summary="Element: mpu_setup">
+<tr>
+<th>Parent Element </th><th colspan="2">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="fm_system.html">zone</a> </td><td colspan="3"><a class="el" href="fm_zone.html">zone element</a>  </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type  </th></tr>
+<tr>
+<td>mpu_setup.type </td><td>Implementation of the MPU ("v7M" or "v8M"). </td><td>xs:string  </td></tr>
+<tr>
+<td>mpu_setup.region[<em>n</em>] </td><td>Sequence of MPU region settings. </td><td>sequence  </td></tr>
+<tr>
+<td>mpu_setup.region[<em>n</em>].no </td><td>Number of the region. </td><td>xs:string  </td></tr>
+<tr>
+<td>mpu_setup.region[<em>n</em>].BaseAddress </td><td>The base address of the region. </td><td>xs:string  </td></tr>
+<tr>
+<td>mpu_setup.region[<em>n</em>].RASR </td><td>The MPU region attribute and size register value. </td><td>xs:string  </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="GenDataModel.html">Generator Data Model</a></li><li class="navelem"><a class="el" href="fm_zone.html">zone element</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/fm_peripheral.html b/docs/Zone/html/fm_peripheral.html
new file mode 100644
index 0000000..4cd513e
--- /dev/null
+++ b/docs/Zone/html/fm_peripheral.html
@@ -0,0 +1,175 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>../peripheral[n] element</title>
+<title>CMSIS-Zone (Preview): ../peripheral[n] element</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('fm_peripheral.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">../peripheral[n] element </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="fm_peripheral.html">../peripheral[n] element</a> contains a sequence of all peripherals that are accessible in the zone (or system partition).</p>
+<table  class="cmtable" summary="Element: peripheral[n]">
+<tr>
+<th>Parent Element </th><th colspan="2">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="fm_system.html">system</a> </td><td colspan="2"><a class="el" href="fm_system.html">system element</a>  </td></tr>
+<tr>
+<td><a class="el" href="fm_zone.html">zone</a> </td><td colspan="2"><a class="el" href="fm_zone.html">zone element</a>  </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type  </th></tr>
+<tr>
+<td>.peripheral[<em>n</em>].name </td><td>The name of the peripheral. </td><td>xs:string  </td></tr>
+<tr>
+<td>.peripheral[<em>n</em>].group </td><td>The name of the peripheral group that this peripheral belongs too. </td><td>xs:string  </td></tr>
+<tr>
+<td>.peripheral[<em>n</em>].start </td><td>The logical start address of the peripheral in the address map. </td><td>NonNegativeInteger  </td></tr>
+<tr>
+<td>.peripheral[<em>n</em>].size </td><td>The size (in bytes) of the peripheral. </td><td>NonNegativeInteger  </td></tr>
+<tr>
+<td>.peripheral[<em>n</em>].security </td><td>The <a class="el" href="zoneFormat.html#security">security</a> setting for this peripheral. </td><td>SecurityType  </td></tr>
+<tr>
+<td>.peripheral[<em>n</em>].security.s </td><td>Peripheral is assigned to <em>"secure"</em> state. </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.peripheral[<em>n</em>].security.n </td><td>Peripheral is assigned to <em>"non-secure"</em> state. </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.peripheral[<em>n</em>].access </td><td>The <a class="el" href="zoneFormat.html#access">access</a> permissions for this peripheral in the following separate fields. </td><td>AccessType  </td></tr>
+<tr>
+<td>.peripheral[<em>n</em>].access.r </td><td>The <em>read</em> <a class="el" href="zoneFormat.html#access">access</a> permission. </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.peripheral[<em>n</em>].access.w </td><td>The <em>write</em> <a class="el" href="zoneFormat.html#access">access</a> permission. </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.peripheral[<em>n</em>].access.x </td><td>The <em>execution</em> <a class="el" href="zoneFormat.html#access">access</a> permission. </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.peripheral[<em>n</em>].access.p </td><td>The <em>peripheral</em> <a class="el" href="zoneFormat.html#access">access</a> information. </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.peripheral[<em>n</em>].privilege </td><td>The <a class="el" href="zoneFormat.html#privilege">privilege type</a> settings for this peripheral in the following separate fields. </td><td>PrivilegeType  </td></tr>
+<tr>
+<td>.peripheral[<em>n</em>].privilege.p </td><td>The <em>privileged</em> <em>level</em> setting of <a class="el" href="zoneFormat.html#privilege">privilege type</a>. </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.peripheral[<em>n</em>].privilege.u </td><td>The <em>unprivileged</em> <em>level</em> setting of <a class="el" href="zoneFormat.html#privilege">privilege type</a>. </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.peripheral[<em>n</em>].shared </td><td>"1" specifies that this peripheral is used by multiple zones. Default value is "0". </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.peripheral[<em>n</em>].dma </td><td>"1" specifies that this peripheral is accessed by a DMA controller. Default value is "0". </td><td>xs:boolean  </td></tr>
+<tr>
+<td>.peripheral[<em>n</em>].info </td><td>Brief description of the peripheral region. </td><td>xs:string  </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="GenDataModel.html">Generator Data Model</a></li><li class="navelem"><a class="el" href="fm_zone.html">zone element</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/fm_processor.html b/docs/Zone/html/fm_processor.html
new file mode 100644
index 0000000..52abdf6
--- /dev/null
+++ b/docs/Zone/html/fm_processor.html
@@ -0,0 +1,143 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>processor[n] sequence element</title>
+<title>CMSIS-Zone (Preview): processor[n] sequence element</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('fm_processor.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">processor[n] sequence element </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="fm_processor.html">processor[n] sequence element</a> provides a sequence of processor elements that are in the system.</p>
+<table  class="cmtable" summary="Element: processor[n]">
+<tr>
+<th>Parent Element </th><th colspan="2">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="fm_system.html">system</a> </td><td colspan="3"><a class="el" href="fm_system.html">system element</a>  </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type  </th></tr>
+<tr>
+<td>.processor[<em>n</em>].Pname </td><td>Name of the processor core. </td><td>RestrictedString  </td></tr>
+<tr>
+<td>.processor[<em>n</em>].DnumInterrupts </td><td>Number of NVIC interrupts sources available to the processor core (excludes exception vectors). </td><td>NonNegativeInteger  </td></tr>
+<tr>
+<td>.processor[<em>n</em>].DnumSauRegions </td><td>Number of regions in the Security Attribution Unit (SAU) of the processor core. </td><td>NonNegativeInteger  </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="GenDataModel.html">Generator Data Model</a></li><li class="navelem"><a class="el" href="fm_system.html">system element</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/fm_reg_setup.html b/docs/Zone/html/fm_reg_setup.html
new file mode 100644
index 0000000..e98ade6
--- /dev/null
+++ b/docs/Zone/html/fm_reg_setup.html
@@ -0,0 +1,145 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>reg_setup[n] element</title>
+<title>CMSIS-Zone (Preview): reg_setup[n] element</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
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+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
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+    </ul>
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+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('fm_reg_setup.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">reg_setup[n] element </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="fm_reg_setup.html">reg_setup[n] element</a> contains a sequence of device specific configuration for the setup of the interrupts.</p>
+<table  class="cmtable" summary="Element: reg_setup[n]">
+<tr>
+<th>Parent Element </th><th colspan="2">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="fm_system.html">system</a> </td><td colspan="3"><a class="el" href="fm_system.html">system element</a>  </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type  </th></tr>
+<tr>
+<td>.reg_setup[<em>n</em>].name </td><td>The name of the register or array that holds the configuration information. </td><td>xs:string  </td></tr>
+<tr>
+<td>.reg_setup[<em>n</em>].index </td><td>The index value for the register array. </td><td>NonNegativeInteger  </td></tr>
+<tr>
+<td>.reg_setup[<em>n</em>].value[<em>m</em>] </td><td>An array with register setup values (corresponds to .peripheral[<em>m</em>] below. </td><td>NonNegativeInteger  </td></tr>
+<tr>
+<td>.reg_setup[<em>n</em>].peripheral[<em>m</em>] </td><td>An array with the peripheral names that setup belongs too. </td><td>xs:string  </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="GenDataModel.html">Generator Data Model</a></li><li class="navelem"><a class="el" href="fm_system.html">system element</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/fm_sau.html b/docs/Zone/html/fm_sau.html
new file mode 100644
index 0000000..56eeaa6
--- /dev/null
+++ b/docs/Zone/html/fm_sau.html
@@ -0,0 +1,151 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>sau[n] sequence element</title>
+<title>CMSIS-Zone (Preview): sau[n] sequence element</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
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+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('fm_sau.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">sau[n] sequence element </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="fm_sau.html">sau[n] sequence element</a> lists all SAU regions for initialization in this system.</p>
+<p>It lists all SAU regions that require either non-secure access or non-secure callable attribute. The SAU region list is generated from:</p>
+<ul>
+<li>setup information from <a class="el" href="xml_sau_init.html#xml_si_region">/rzone/sau_init/region element</a></li>
+<li>memory regions that are assigned to zones with non-secure domain.</li>
+<li>memory regions that are configured as secure, non-secure callable.</li>
+</ul>
+<table  class="cmtable" summary="Element: sau[n]">
+<tr>
+<th>Parent Element </th><th colspan="2">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="fm_system.html">system</a> </td><td colspan="3"><a class="el" href="fm_system.html">system element</a>  </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type  </th></tr>
+<tr>
+<td>.sau[<em>n</em>].start </td><td>The logical start address for the region. </td><td>xs:string  </td></tr>
+<tr>
+<td>.sau[<em>n</em>].end </td><td>The logical end address for the region. </td><td>xs:string  </td></tr>
+<tr>
+<td>.sau[<em>n</em>].nsc </td><td>If set to 1 the region is secure, non-secure callable. </td><td>SecurityTypeEnum/xs:string  </td></tr>
+<tr>
+<td>.sau[<em>n</em>].info </td><td>List of memory regions or info from <a class="el" href="xml_sau_init.html#xml_si_region">/rzone/sau_init/region element</a>. </td><td>xs:string  </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="GenDataModel.html">Generator Data Model</a></li><li class="navelem"><a class="el" href="fm_system.html">system element</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/fm_system.html b/docs/Zone/html/fm_system.html
new file mode 100644
index 0000000..b9c853b
--- /dev/null
+++ b/docs/Zone/html/fm_system.html
@@ -0,0 +1,147 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>system element</title>
+<title>CMSIS-Zone (Preview): system element</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('fm_system.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">system element </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="fm_system.html">system element</a> provides the memory layout and the TrustZone configuration of the complete system. This information can be used for example, to create a linker script that defines the memory setup of the SoC system.</p>
+<table  class="cmtable" summary="Element: system">
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type  </th></tr>
+<tr>
+<td><a class="el" href="fm_processor.html">.processor</a> </td><td>A sequence of all processor elements available in the system resource file. </td><td>sequence  </td></tr>
+<tr>
+<td><a class="el" href="fm_memory.html">.memory</a> </td><td>A sequence of all memory regions available in the system resource file. </td><td>sequence  </td></tr>
+<tr>
+<td><a class="el" href="fm_peripheral.html">.peripheral</a> </td><td>A sequence of all peripherals available in the system resource file. </td><td>sequence  </td></tr>
+<tr>
+<td><a class="el" href="fm_sau.html">.sau</a> </td><td>A sequence of all SAU regions for initialization. </td><td>sequence  </td></tr>
+<tr>
+<td><a class="el" href="fm_interrupt.html">.interrupt</a> </td><td>A sequence of all interrupt sources available. </td><td>sequence  </td></tr>
+<tr>
+<td><a class="el" href="fm_mpc_setup.html">.mpc_setup</a> </td><td>Contains the device specific configuration registers for the setup of the Memory Protection Controller (MPC). </td><td>sequence  </td></tr>
+<tr>
+<td><a class="el" href="fm_reg_setup.html">.reg_setup</a> </td><td>Contains the device specific configuration registers for the setup of the peripherals. </td><td>sequence  </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="GenDataModel.html">Generator Data Model</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/fm_system.js b/docs/Zone/html/fm_system.js
new file mode 100644
index 0000000..16fb3ef
--- /dev/null
+++ b/docs/Zone/html/fm_system.js
@@ -0,0 +1,10 @@
+var fm_system =
+[
+    [ "processor[n] sequence element", "fm_processor.html", null ],
+    [ "../memory[n] sequence element", "fm_memory.html", null ],
+    [ "../peripheral[n] element", "fm_peripheral.html", null ],
+    [ "sau[n] sequence element", "fm_sau.html", null ],
+    [ "interrupt[n] sequence element", "fm_interrupt.html", null ],
+    [ "mpc_setup[n] element", "fm_mpc_setup.html", null ],
+    [ "reg_setup[n] element", "fm_reg_setup.html", null ]
+];
\ No newline at end of file
diff --git a/docs/Zone/html/fm_zone.html b/docs/Zone/html/fm_zone.html
new file mode 100644
index 0000000..d9d30bb
--- /dev/null
+++ b/docs/Zone/html/fm_zone.html
@@ -0,0 +1,141 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>zone element</title>
+<title>CMSIS-Zone (Preview): zone element</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
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+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('fm_zone.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">zone element </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="fm_zone.html">zone element</a> provides the setup information of a zone (or system partition) along with related peripherals. This information can be used for example, to create the MPU setup that is required for various execution zones along with the related linker setup.</p>
+<table  class="cmtable" summary="Element: zone">
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type  </th></tr>
+<tr>
+<td>.name </td><td>The name of the zone (or system partition). </td><td>string  </td></tr>
+<tr>
+<td><a class="el" href="fm_memory.html">.memory</a> </td><td>A sequence of all memory regions that are accessible in the zone (or system partition). </td><td>sequence  </td></tr>
+<tr>
+<td><a class="el" href="fm_peripheral.html">.peripheral</a> </td><td>A sequence of all peripherals that are accessible in the zone (or system partition). </td><td>sequence  </td></tr>
+<tr>
+<td><a class="el" href="fm_mpu_setup.html">.mpu_setup</a> </td><td>A sequence of configuration information for the Memory Protection Unit (MPU). </td><td>sequence  </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="GenDataModel.html">Generator Data Model</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/fm_zone.js b/docs/Zone/html/fm_zone.js
new file mode 100644
index 0000000..422aebd
--- /dev/null
+++ b/docs/Zone/html/fm_zone.js
@@ -0,0 +1,6 @@
+var fm_zone =
+[
+    [ "../memory[n] sequence element", "fm_memory.html", null ],
+    [ "../peripheral[n] element", "fm_peripheral.html", null ],
+    [ "mpu_setup element", "fm_mpu_setup.html", null ]
+];
\ No newline at end of file
diff --git a/docs/Zone/html/format_assign.html b/docs/Zone/html/format_assign.html
deleted file mode 100644
index 99e1e99..0000000
--- a/docs/Zone/html/format_assign.html
+++ /dev/null
@@ -1,163 +0,0 @@
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-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
-<meta http-equiv="X-UA-Compatible" content="IE=9"/>
-<title>/assign element</title>
-<title>CMSIS-Zone (Preview): /assign element</title>
-<link href="tabs.css" rel="stylesheet" type="text/css"/>
-<link href="cmsis.css" rel="stylesheet" type="text/css" />
-<script type="text/javascript" src="jquery.js"></script>
-<script type="text/javascript" src="dynsections.js"></script>
-<script type="text/javascript" src="printComponentTabs.js"></script>
-<link href="navtree.css" rel="stylesheet" type="text/css"/>
-<script type="text/javascript" src="resize.js"></script>
-<script type="text/javascript" src="navtree.js"></script>
-<script type="text/javascript">
-  $(document).ready(initResizable);
-  $(window).load(resizeHeight);
-</script>
-<link href="search/search.css" rel="stylesheet" type="text/css"/>
-<script type="text/javascript" src="search/search.js"></script>
-<script type="text/javascript">
-  $(document).ready(function() { searchBox.OnSelectItem(0); });
-</script>
-</head>
-<body>
-<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
-<div id="titlearea">
-<table cellspacing="0" cellpadding="0">
- <tbody>
- <tr style="height: 46px;">
-  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
-  <td style="padding-left: 0.5em;">
-   <div id="projectname">CMSIS-Zone (Preview)
-   &#160;<span id="projectnumber">Version 0.0.1</span>
-   </div>
-   <div id="projectbrief">System Resource Management</div>
-  </td>
- </tr>
- </tbody>
-</table>
-</div>
-<!-- end header part -->
-<div id="CMSISnav" class="tabs1">
-    <ul class="tablist">
-      <script type="text/javascript">
-		<!--
-		writeComponentTabs.call(this);
-		//-->
-      </script>
-	  </ul>
-</div>
-<!-- Generated by Doxygen 1.8.6 -->
-<script type="text/javascript">
-var searchBox = new SearchBox("searchBox", "search",false,'Search');
-</script>
-  <div id="navrow1" class="tabs">
-    <ul class="tablist">
-      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
-      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
-      <li>
-        <div id="MSearchBox" class="MSearchBoxInactive">
-        <span class="left">
-          <img id="MSearchSelect" src="search/mag_sel.png"
-               onmouseover="return searchBox.OnSearchSelectShow()"
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-               alt=""/>
-          <input type="text" id="MSearchField" value="Search" accesskey="S"
-               onfocus="searchBox.OnSearchFieldFocus(true)" 
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-          </span><span class="right">
-            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
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-    </ul>
-  </div>
-</div><!-- top -->
-<div id="side-nav" class="ui-resizable side-nav-resizable">
-  <div id="nav-tree">
-    <div id="nav-tree-contents">
-      <div id="nav-sync" class="sync"></div>
-    </div>
-  </div>
-  <div id="splitbar" style="-moz-user-select:none;" 
-       class="ui-resizable-handle">
-  </div>
-</div>
-<script type="text/javascript">
-$(document).ready(function(){initNavTree('format_assign.html','');});
-</script>
-<div id="doc-content">
-<!-- window showing the filter options -->
-<div id="MSearchSelectWindow"
-     onmouseover="return searchBox.OnSearchSelectShow()"
-     onmouseout="return searchBox.OnSearchSelectHide()"
-     onkeydown="return searchBox.OnSearchSelectKey(event)">
-<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
-
-<!-- iframe showing the search results (closed by default) -->
-<div id="MSearchResultsWindow">
-<iframe src="javascript:void(0)" frameborder="0" 
-        name="MSearchResults" id="MSearchResults">
-</iframe>
-</div>
-
-<div class="header">
-  <div class="headertitle">
-<div class="title">/assign element </div>  </div>
-</div><!--header-->
-<div class="contents">
-<div class="textblock"><p>The <b>assign</b> element defines the resources used by a zone.</p>
-<p><b>Example</b> </p>
-<div class="fragment"><div class="line">&lt;zones&gt;</div>
-<div class="line">  &lt;pzone name=<span class="stringliteral">&quot;App&quot;</span> Dname=<span class="stringliteral">&quot;ARM32CM4128x&quot;</span> Pname=<span class="stringliteral">&quot;Cortex-M4&quot;</span>&gt;</div>
-<div class="line">    &lt;assign name=<span class="stringliteral">&quot;SHARED&quot;</span> as=<span class="stringliteral">&quot;SRAM&quot;</span> access=<span class="stringliteral">&quot;rwu&quot;</span>&gt;</div>
-<div class="line">      &lt;capture symbol=<span class="stringliteral">&quot;.bss.shared&quot;</span>/&gt;</div>
-<div class="line">      &lt;capture symbol=<span class="stringliteral">&quot;.data.shared&quot;</span>/&gt;</div>
-<div class="line">      :</div>
-<div class="line">    &lt;/assign&gt;</div>
-<div class="line">    &lt;assign name=<span class="stringliteral">&quot;ADC0&quot;</span>             access=<span class="stringliteral">&quot;rw&quot;</span> /&gt;</div>
-<div class="line">    :</div>
-<div class="line">  &lt;/pzone&gt;</div>
-<div class="line">  :</div>
-<div class="line">&lt;/zones&gt;</div>
-</div><!-- fragment --><p><b>Schema Description</b></p>
-<table  class="cmtable" summary="Element: Assign">
-<tr>
-<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
-<tr>
-<td><a class="el" href="format_pzone.html">pzone</a> </td><td colspan="3"><a class="el" href="format_pzone.html">/pzone element</a>  </td></tr>
-<tr>
-<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
-<tr>
-<td>name </td><td>The name of a resource (mapped to the processor) to be used by this zone. </td><td>xs:string </td><td>required  </td></tr>
-<tr>
-<td>as </td><td>The name of the mapping (alias) to be used to address the referenced resource. </td><td>xs:string </td><td>optional  </td></tr>
-<tr>
-<td>access </td><td>Additional access attributes to be used. </td><td>xs:string </td><td>optional  </td></tr>
-<tr>
-<td>info </td><td>Brief description of the resource assignment. </td><td>xs:string </td><td>optional  </td></tr>
-<tr>
-<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
-<tr>
-<td><a class="el" href="format_capture.html">/capture element</a> </td><td>Linker usage </td><td>complexType </td><td>0..*  </td></tr>
-</table>
-</div></div><!-- contents -->
-</div><!-- doc-content -->
-<!-- start footer part -->
-<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
-  <ul>
-    <li class="navelem"><a class="el" href="XML_Format.html">Zone Description Format</a></li><li class="navelem"><a class="el" href="format_system.html">/system element</a></li><li class="navelem"><a class="el" href="format_zones.html">/zones element</a></li><li class="navelem"><a class="el" href="format_pzone.html">/pzone element</a></li><li class="navelem"><a class="el" href="format_xzone.html">/xzone element</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-Zone (Preview) by Arm Ltd. All rights reserved.
-	<!--
-    <a href="http://www.doxygen.org/index.html">
-    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
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-	</li>
-  </ul>
-</div>
-</body>
-</html>
diff --git a/docs/Zone/html/format_assign.js b/docs/Zone/html/format_assign.js
deleted file mode 100644
index cbda2c2..0000000
--- a/docs/Zone/html/format_assign.js
+++ /dev/null
@@ -1,4 +0,0 @@
-var format_assign =
-[
-    [ "/capture element", "format_capture.html", null ]
-];
\ No newline at end of file
diff --git a/docs/Zone/html/format_block.html b/docs/Zone/html/format_block.html
deleted file mode 100644
index 727098f..0000000
--- a/docs/Zone/html/format_block.html
+++ /dev/null
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-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
-<meta http-equiv="X-UA-Compatible" content="IE=9"/>
-<title>/block element</title>
-<title>CMSIS-Zone (Preview): /block element</title>
-<link href="tabs.css" rel="stylesheet" type="text/css"/>
-<link href="cmsis.css" rel="stylesheet" type="text/css" />
-<script type="text/javascript" src="jquery.js"></script>
-<script type="text/javascript" src="dynsections.js"></script>
-<script type="text/javascript" src="printComponentTabs.js"></script>
-<link href="navtree.css" rel="stylesheet" type="text/css"/>
-<script type="text/javascript" src="resize.js"></script>
-<script type="text/javascript" src="navtree.js"></script>
-<script type="text/javascript">
-  $(document).ready(initResizable);
-  $(window).load(resizeHeight);
-</script>
-<link href="search/search.css" rel="stylesheet" type="text/css"/>
-<script type="text/javascript" src="search/search.js"></script>
-<script type="text/javascript">
-  $(document).ready(function() { searchBox.OnSelectItem(0); });
-</script>
-</head>
-<body>
-<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
-<div id="titlearea">
-<table cellspacing="0" cellpadding="0">
- <tbody>
- <tr style="height: 46px;">
-  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
-  <td style="padding-left: 0.5em;">
-   <div id="projectname">CMSIS-Zone (Preview)
-   &#160;<span id="projectnumber">Version 0.0.1</span>
-   </div>
-   <div id="projectbrief">System Resource Management</div>
-  </td>
- </tr>
- </tbody>
-</table>
-</div>
-<!-- end header part -->
-<div id="CMSISnav" class="tabs1">
-    <ul class="tablist">
-      <script type="text/javascript">
-		<!--
-		writeComponentTabs.call(this);
-		//-->
-      </script>
-	  </ul>
-</div>
-<!-- Generated by Doxygen 1.8.6 -->
-<script type="text/javascript">
-var searchBox = new SearchBox("searchBox", "search",false,'Search');
-</script>
-  <div id="navrow1" class="tabs">
-    <ul class="tablist">
-      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
-      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
-      <li>
-        <div id="MSearchBox" class="MSearchBoxInactive">
-        <span class="left">
-          <img id="MSearchSelect" src="search/mag_sel.png"
-               onmouseover="return searchBox.OnSearchSelectShow()"
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-               alt=""/>
-          <input type="text" id="MSearchField" value="Search" accesskey="S"
-               onfocus="searchBox.OnSearchFieldFocus(true)" 
-               onblur="searchBox.OnSearchFieldFocus(false)" 
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-          </span><span class="right">
-            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
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-    </ul>
-  </div>
-</div><!-- top -->
-<div id="side-nav" class="ui-resizable side-nav-resizable">
-  <div id="nav-tree">
-    <div id="nav-tree-contents">
-      <div id="nav-sync" class="sync"></div>
-    </div>
-  </div>
-  <div id="splitbar" style="-moz-user-select:none;" 
-       class="ui-resizable-handle">
-  </div>
-</div>
-<script type="text/javascript">
-$(document).ready(function(){initNavTree('format_block.html','');});
-</script>
-<div id="doc-content">
-<!-- window showing the filter options -->
-<div id="MSearchSelectWindow"
-     onmouseover="return searchBox.OnSearchSelectShow()"
-     onmouseout="return searchBox.OnSearchSelectHide()"
-     onkeydown="return searchBox.OnSearchSelectKey(event)">
-<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
-
-<!-- iframe showing the search results (closed by default) -->
-<div id="MSearchResultsWindow">
-<iframe src="javascript:void(0)" frameborder="0" 
-        name="MSearchResults" id="MSearchResults">
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-</div>
-
-<div class="header">
-  <div class="headertitle">
-<div class="title">/block element </div>  </div>
-</div><!--header-->
-<div class="contents">
-<div class="textblock"><p>The <b>block</b> element is used to subdived a physical <a class="el" href="format_memory.html">memory region</a> into segregated logical blocks.</p>
-<p><b>Example</b> </p>
-<div class="fragment"><div class="line">&lt;resources&gt;</div>
-<div class="line">  &lt;memory&gt;</div>
-<div class="line">    &lt;!-- 512KB SRAM integrated on the SoC --&gt;</div>
-<div class="line">    &lt;region name=<span class="stringliteral">&quot;SRAM&quot;</span> size=<span class="stringliteral">&quot;0x80000&quot;</span> access=<span class="stringliteral">&quot;rwx&quot;</span> info=<span class="stringliteral">&quot;Internal SRAM (512KB)&quot;</span>&gt;</div>
-<div class="line">      &lt;block name=<span class="stringliteral">&quot;SHARED&quot;</span> offset=<span class="stringliteral">&quot;0x00000&quot;</span> size=<span class="stringliteral">&quot;0x08000&quot;</span> access=<span class="stringliteral">&quot;rwu&quot;</span> info=<span class="stringliteral">&quot;Shared memory area for inter process communication.&quot;</span>/&gt;</div>
-<div class="line">      :</div>
-<div class="line">    &lt;/region&gt;</div>
-<div class="line">    :</div>
-<div class="line">  &lt;/memory&gt;</div>
-<div class="line">  :</div>
-<div class="line">&lt;/resources&gt;</div>
-</div><!-- fragment --><p><b>Schema Description</b></p>
-<table  class="cmtable" summary="Element: Block">
-<tr>
-<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
-<tr>
-<td><a class="el" href="format_region.html">region</a> </td><td colspan="3"><a class="el" href="format_region.html">/region element</a>  </td></tr>
-<tr>
-<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
-<tr>
-<td>name </td><td>The name this memory block can be referenced by. Must be unique within a single device. </td><td>xs:string </td><td>required  </td></tr>
-<tr>
-<td>size </td><td>The physical memory size this block allocates. </td><td>xs:string </td><td>required  </td></tr>
-<tr>
-<td>access </td><td>The access attributes for this memory block. </td><td>xs:string </td><td>optional  </td></tr>
-<tr>
-<td>info </td><td>Brief description of the memory block. </td><td>xs:string </td><td>optional  </td></tr>
-<tr>
-<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
-<tr>
-<td><a class="el" href="format_block.html">/block element</a> </td><td>Memory block definitions. </td><td>complexType </td><td>0..*  </td></tr>
-</table>
-</div></div><!-- contents -->
-</div><!-- doc-content -->
-<!-- start footer part -->
-<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
-  <ul>
-    <li class="navelem"><a class="el" href="XML_Format.html">Zone Description Format</a></li><li class="navelem"><a class="el" href="format_system.html">/system element</a></li><li class="navelem"><a class="el" href="format_device.html">/device element</a></li><li class="navelem"><a class="el" href="format_resources.html">/resources element</a></li><li class="navelem"><a class="el" href="format_memory.html">/memory element</a></li><li class="navelem"><a class="el" href="format_region.html">/region element</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-Zone (Preview) by Arm Ltd. All rights reserved.
-	<!--
-    <a href="http://www.doxygen.org/index.html">
-    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
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diff --git a/docs/Zone/html/format_capture.html b/docs/Zone/html/format_capture.html
deleted file mode 100644
index 350db77..0000000
--- a/docs/Zone/html/format_capture.html
+++ /dev/null
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-<html xmlns="http://www.w3.org/1999/xhtml">
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-<div class="textblock"><p>The <b>capture</b> element can be used to specify linker symbol patterns to be placed into the enclosing memory assignment.</p>
-<p><b>Example</b> </p>
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-<div class="line">  &lt;pzone name=<span class="stringliteral">&quot;App&quot;</span> Dname=<span class="stringliteral">&quot;ARM32CM4128x&quot;</span> Pname=<span class="stringliteral">&quot;Cortex-M4&quot;</span>&gt;</div>
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-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-Zone (Preview) by Arm Ltd. All rights reserved.
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diff --git a/docs/Zone/html/format_device.html b/docs/Zone/html/format_device.html
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-<td><a class="el" href="format_memory_map.html">memory_map</a> </td><td>All <em>physical</em> resources are accessible using <em>logical</em> memory addresses, i.e. typically called memory map. Common logical addresses valid for all processing elements can be defined at device level memory map, i.e. devices with an uniform memory map. Refer to the individual processor memory map for devices with non-uniform memory maps. </td><td>complexType </td><td>0..1  </td></tr>
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index b0057f4..0000000
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diff --git a/docs/Zone/html/format_memory_map.html b/docs/Zone/html/format_memory_map.html
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diff --git a/docs/Zone/html/format_package.html b/docs/Zone/html/format_package.html
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-<td>vendor </td><td>The pack vendor name. </td><td>xs:string </td><td>required  </td></tr>
-<tr>
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-<div class="line">  :</div>
-<div class="line">&lt;/processor&gt;</div>
-</div><!-- fragment --><p><b>Schema Description</b></p>
-<table  class="cmtable" summary="Element: Processor">
-<tr>
-<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
-<tr>
-<td><a class="el" href="format_device.html">device</a> </td><td colspan="3"><a class="el" href="format_device.html">/device element</a>  </td></tr>
-<tr>
-<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
-<tr>
-<td>Pname </td><td>Processor identifier. This attribute <b>is mandatory for devices that embed multiple processors</b>. Each processor needs a per device unique identifier and must be used consistently in the <b>Pname</b> attribute. Only alphabetical characters, decimal digits, '-' and '_' are allowed.  </td><td>RestrictedString </td><td>optional  </td></tr>
-<tr>
-<td>Dcore </td><td>Specifies the processor core. </td><td>DcoreEnum </td><td>optional  </td></tr>
-<tr>
-<td>Dfpu </td><td>Specifies whether a hardware Floating Point Unit is present in the processor. </td><td>DfpuEnum </td><td>optional  </td></tr>
-<tr>
-<td>Dmpu </td><td>Specifies whether a Memory Protection Unit is present in the processor. </td><td>DmpuEnum </td><td>optional  </td></tr>
-<tr>
-<td>Dtz </td><td>Specifies whether an Armv8-M based device implements TrustZone. </td><td>DtzEnum </td><td>optional  </td></tr>
-<tr>
-<td>Ddsp </td><td>Specifies whether an Armv8-M based device supports the DSP instructions set. </td><td>DdspEnum </td><td>optional  </td></tr>
-<tr>
-<td>Dendian </td><td>Specifies the endianess of the processor. </td><td>DendianEnum </td><td>optional  </td></tr>
-<tr>
-<td>Dclock </td><td>Specifies the max clock frequency of the processor subsystem </td><td>xs:unsignedInt </td><td>optional  </td></tr>
-<tr>
-<td>DcoreVersion </td><td>Hardware revision of the processor core </td><td>xs:string </td><td>required  </td></tr>
-<tr>
-<td>info </td><td>Brief description of the processor. </td><td>xs:string </td><td>optional  </td></tr>
-<tr>
-<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
-<tr>
-<td><a class="el" href="format_memory_map.html">memory_map</a> </td><td>Processor specific (non-uniform) memory map. The effective memory map of the processor is derived as the union of device and processor level mappings. </td><td>complexType </td><td>0..1  </td></tr>
-</table>
-</div></div><!-- contents -->
-</div><!-- doc-content -->
-<!-- start footer part -->
-<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
-  <ul>
-    <li class="navelem"><a class="el" href="XML_Format.html">Zone Description Format</a></li><li class="navelem"><a class="el" href="format_system.html">/system element</a></li><li class="navelem"><a class="el" href="format_device.html">/device element</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-Zone (Preview) by Arm Ltd. All rights reserved.
-	<!--
-    <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Zone/html/format_processor.js b/docs/Zone/html/format_processor.js
deleted file mode 100644
index dac7317..0000000
--- a/docs/Zone/html/format_processor.js
+++ /dev/null
@@ -1,4 +0,0 @@
-var format_processor =
-[
-    [ "/memory_map element", "format_memory_map.html", "format_memory_map" ]
-];
\ No newline at end of file
diff --git a/docs/Zone/html/format_pzone.html b/docs/Zone/html/format_pzone.html
deleted file mode 100644
index 049388d..0000000
--- a/docs/Zone/html/format_pzone.html
+++ /dev/null
@@ -1,166 +0,0 @@
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-<head>
-<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
-<meta http-equiv="X-UA-Compatible" content="IE=9"/>
-<title>/pzone element</title>
-<title>CMSIS-Zone (Preview): /pzone element</title>
-<link href="tabs.css" rel="stylesheet" type="text/css"/>
-<link href="cmsis.css" rel="stylesheet" type="text/css" />
-<script type="text/javascript" src="jquery.js"></script>
-<script type="text/javascript" src="dynsections.js"></script>
-<script type="text/javascript" src="printComponentTabs.js"></script>
-<link href="navtree.css" rel="stylesheet" type="text/css"/>
-<script type="text/javascript" src="resize.js"></script>
-<script type="text/javascript" src="navtree.js"></script>
-<script type="text/javascript">
-  $(document).ready(initResizable);
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-<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
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-<table cellspacing="0" cellpadding="0">
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-   <div id="projectname">CMSIS-Zone (Preview)
-   &#160;<span id="projectnumber">Version 0.0.1</span>
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-   <div id="projectbrief">System Resource Management</div>
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- </tr>
- </tbody>
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-<!-- end header part -->
-<div id="CMSISnav" class="tabs1">
-    <ul class="tablist">
-      <script type="text/javascript">
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-<script type="text/javascript">
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-  <div id="navrow1" class="tabs">
-    <ul class="tablist">
-      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
-      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
-      <li>
-        <div id="MSearchBox" class="MSearchBoxInactive">
-        <span class="left">
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-
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-<div class="title">/pzone element </div>  </div>
-</div><!--header-->
-<div class="contents">
-<div class="textblock"><p>The <b>pzone</b> element defines a single project zone.</p>
-<p><b>Example</b> </p>
-<div class="fragment"><div class="line">&lt;zones&gt;</div>
-<div class="line">  &lt;pzone name=<span class="stringliteral">&quot;App&quot;</span> Dname=<span class="stringliteral">&quot;ARM32CM4128x&quot;</span> Pname=<span class="stringliteral">&quot;Cortex-M4&quot;</span>&gt;</div>
-<div class="line">    &lt;assign name=<span class="stringliteral">&quot;SHARED&quot;</span> as=<span class="stringliteral">&quot;SRAM&quot;</span> access=<span class="stringliteral">&quot;rwu&quot;</span>&gt;</div>
-<div class="line">      &lt;capture symbol=<span class="stringliteral">&quot;.bss.shared&quot;</span>/&gt;</div>
-<div class="line">      :</div>
-<div class="line">    &lt;/assign&gt;</div>
-<div class="line">    &lt;assign name=<span class="stringliteral">&quot;ADC0&quot;</span>             access=<span class="stringliteral">&quot;rw&quot;</span> /&gt;</div>
-<div class="line">    :</div>
-<div class="line">    &lt;xzone name=<span class="stringliteral">&quot;process&quot;</span>/&gt;</div>
-<div class="line">    :</div>
-<div class="line">  &lt;/pzone&gt;</div>
-<div class="line">  :</div>
-<div class="line">&lt;/zones&gt;</div>
-</div><!-- fragment --><p><b>Schema Description</b></p>
-<table  class="cmtable" summary="Element: PZone">
-<tr>
-<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
-<tr>
-<td><a class="el" href="format_zones.html">zones</a> </td><td colspan="3"><a class="el" href="format_zones.html">/zones element</a>  </td></tr>
-<tr>
-<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
-<tr>
-<td>name </td><td>The unique name for this project zone. </td><td>xs:string </td><td>required  </td></tr>
-<tr>
-<td>Dname </td><td>The name of the device this project zone is assigned to. </td><td>xs:string </td><td>required  </td></tr>
-<tr>
-<td>Pname </td><td>The name of the processor (on the device) this project is assigned to. </td><td>xs:string </td><td>required  </td></tr>
-<tr>
-<td>info </td><td>Brief description of the project zone. </td><td>xs:string </td><td>optional  </td></tr>
-<tr>
-<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
-<tr>
-<td><a class="el" href="format_assign.html">/assign element</a> </td><td>Resource Assignments </td><td>complexType </td><td>0..*  </td></tr>
-<tr>
-<td><a class="el" href="format_xzone.html">/xzone element</a> </td><td>Execution Zones </td><td>complexType </td><td>0..*  </td></tr>
-</table>
-</div></div><!-- contents -->
-</div><!-- doc-content -->
-<!-- start footer part -->
-<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
-  <ul>
-    <li class="navelem"><a class="el" href="XML_Format.html">Zone Description Format</a></li><li class="navelem"><a class="el" href="format_system.html">/system element</a></li><li class="navelem"><a class="el" href="format_zones.html">/zones element</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-Zone (Preview) by Arm Ltd. All rights reserved.
-	<!--
-    <a href="http://www.doxygen.org/index.html">
-    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
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-	</li>
-  </ul>
-</div>
-</body>
-</html>
diff --git a/docs/Zone/html/format_pzone.js b/docs/Zone/html/format_pzone.js
deleted file mode 100644
index ac178ac..0000000
--- a/docs/Zone/html/format_pzone.js
+++ /dev/null
@@ -1,5 +0,0 @@
-var format_pzone =
-[
-    [ "/assign element", "format_assign.html", "format_assign" ],
-    [ "/xzone element", "format_xzone.html", "format_xzone" ]
-];
\ No newline at end of file
diff --git a/docs/Zone/html/format_region.html b/docs/Zone/html/format_region.html
deleted file mode 100644
index db3b2ef..0000000
--- a/docs/Zone/html/format_region.html
+++ /dev/null
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-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
-<meta http-equiv="X-UA-Compatible" content="IE=9"/>
-<title>/region element</title>
-<title>CMSIS-Zone (Preview): /region element</title>
-<link href="tabs.css" rel="stylesheet" type="text/css"/>
-<link href="cmsis.css" rel="stylesheet" type="text/css" />
-<script type="text/javascript" src="jquery.js"></script>
-<script type="text/javascript" src="dynsections.js"></script>
-<script type="text/javascript" src="printComponentTabs.js"></script>
-<link href="navtree.css" rel="stylesheet" type="text/css"/>
-<script type="text/javascript" src="resize.js"></script>
-<script type="text/javascript" src="navtree.js"></script>
-<script type="text/javascript">
-  $(document).ready(initResizable);
-  $(window).load(resizeHeight);
-</script>
-<link href="search/search.css" rel="stylesheet" type="text/css"/>
-<script type="text/javascript" src="search/search.js"></script>
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-<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
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-   &#160;<span id="projectnumber">Version 0.0.1</span>
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-</div>
-<!-- end header part -->
-<div id="CMSISnav" class="tabs1">
-    <ul class="tablist">
-      <script type="text/javascript">
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-      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
-      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
-      <li>
-        <div id="MSearchBox" class="MSearchBoxInactive">
-        <span class="left">
-          <img id="MSearchSelect" src="search/mag_sel.png"
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-               onfocus="searchBox.OnSearchFieldFocus(true)" 
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-       class="ui-resizable-handle">
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-
-<!-- iframe showing the search results (closed by default) -->
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-<div class="title">/region element </div>  </div>
-</div><!--header-->
-<div class="contents">
-<div class="textblock"><p>The <b>region</b> element is used to define individual physical memory regions.</p>
-<p><b>Example</b> </p>
-<div class="fragment"><div class="line">&lt;resources&gt;</div>
-<div class="line">  &lt;memory&gt;</div>
-<div class="line">    &lt;!-- 512KB SRAM integrated on the SoC --&gt;</div>
-<div class="line">    &lt;region name=<span class="stringliteral">&quot;SRAM&quot;</span> size=<span class="stringliteral">&quot;0x80000&quot;</span> access=<span class="stringliteral">&quot;rwx&quot;</span> info=<span class="stringliteral">&quot;Internal SRAM (512KB)&quot;</span>&gt;</div>
-<div class="line">      &lt;block name=<span class="stringliteral">&quot;SHARED&quot;</span> offset=<span class="stringliteral">&quot;0x00000&quot;</span> size=<span class="stringliteral">&quot;0x08000&quot;</span> access=<span class="stringliteral">&quot;rwu&quot;</span> info=<span class="stringliteral">&quot;Shared memory area for inter process communication.&quot;</span>/&gt;</div>
-<div class="line">      :</div>
-<div class="line">    &lt;/region&gt;</div>
-<div class="line">    :</div>
-<div class="line">  &lt;/memory&gt;</div>
-<div class="line">  :</div>
-<div class="line">&lt;/resources&gt;</div>
-</div><!-- fragment --><p><b>Schema Description</b></p>
-<table  class="cmtable" summary="Element: Region">
-<tr>
-<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
-<tr>
-<td><a class="el" href="format_memory.html">memory</a> </td><td colspan="3"><a class="el" href="format_memory.html">/memory element</a>  </td></tr>
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-<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
-<tr>
-<td>name </td><td>The name this memory region can be referenced by. Must be unique within a single device. </td><td>xs:string </td><td>required  </td></tr>
-<tr>
-<td>size </td><td>The physical memory size this region provides. </td><td>xs:string </td><td>required  </td></tr>
-<tr>
-<td>access </td><td>The access attributes for this memory region. </td><td>xs:string </td><td>required  </td></tr>
-<tr>
-<td>info </td><td>Brief description of the physical memory resource. </td><td>xs:string </td><td>optional  </td></tr>
-<tr>
-<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
-<tr>
-<td><a class="el" href="format_block.html">/block element</a> </td><td>Memory block definitions. </td><td>complexType </td><td>0..*  </td></tr>
-</table>
-</div></div><!-- contents -->
-</div><!-- doc-content -->
-<!-- start footer part -->
-<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
-  <ul>
-    <li class="navelem"><a class="el" href="XML_Format.html">Zone Description Format</a></li><li class="navelem"><a class="el" href="format_system.html">/system element</a></li><li class="navelem"><a class="el" href="format_device.html">/device element</a></li><li class="navelem"><a class="el" href="format_resources.html">/resources element</a></li><li class="navelem"><a class="el" href="format_memory.html">/memory element</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-Zone (Preview) by Arm Ltd. All rights reserved.
-	<!--
-    <a href="http://www.doxygen.org/index.html">
-    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
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-	</li>
-  </ul>
-</div>
-</body>
-</html>
diff --git a/docs/Zone/html/format_region.js b/docs/Zone/html/format_region.js
deleted file mode 100644
index 7e215fd..0000000
--- a/docs/Zone/html/format_region.js
+++ /dev/null
@@ -1,4 +0,0 @@
-var format_region =
-[
-    [ "/block element", "format_block.html", null ]
-];
\ No newline at end of file
diff --git a/docs/Zone/html/format_resources.html b/docs/Zone/html/format_resources.html
deleted file mode 100644
index ed60721..0000000
--- a/docs/Zone/html/format_resources.html
+++ /dev/null
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-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
-<meta http-equiv="X-UA-Compatible" content="IE=9"/>
-<title>/resources element</title>
-<title>CMSIS-Zone (Preview): /resources element</title>
-<link href="tabs.css" rel="stylesheet" type="text/css"/>
-<link href="cmsis.css" rel="stylesheet" type="text/css" />
-<script type="text/javascript" src="jquery.js"></script>
-<script type="text/javascript" src="dynsections.js"></script>
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-<div class="line">  &lt;pzone name=<span class="stringliteral">&quot;App&quot;</span> Dname=<span class="stringliteral">&quot;ARM32CM4128x&quot;</span> Pname=<span class="stringliteral">&quot;Cortex-M4&quot;</span>&gt;</div>
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-<div class="line">    &lt;assign name=<span class="stringliteral">&quot;ADC0&quot;</span>             access=<span class="stringliteral">&quot;rw&quot;</span> /&gt;</div>
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-<div class="line">    :</div>
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-<div class="line">  :</div>
-<div class="line">&lt;/zones&gt;</div>
-</div><!-- fragment --><p><b>Schema Description</b></p>
-<table  class="cmtable" summary="Element: XZone">
-<tr>
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-<tr>
-<td><a class="el" href="format_pzone.html">pzone</a> </td><td colspan="3"><a class="el" href="format_pzone.html">/pzone element</a>  </td></tr>
-<tr>
-<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
-<tr>
-<td>name </td><td>The name of a resource (mapped to the processor) to be used by this zone. </td><td>xs:string </td><td>required  </td></tr>
-<tr>
-<td>info </td><td>Brief description of the resource assignment. </td><td>xs:string </td><td>optional  </td></tr>
-<tr>
-<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
-<tr>
-<td><a class="el" href="format_assign.html">/assign element</a> </td><td>Resource assignments </td><td>complexType </td><td>0..*  </td></tr>
-</table>
-</div></div><!-- contents -->
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-  <ul>
-    <li class="navelem"><a class="el" href="XML_Format.html">Zone Description Format</a></li><li class="navelem"><a class="el" href="format_system.html">/system element</a></li><li class="navelem"><a class="el" href="format_zones.html">/zones element</a></li><li class="navelem"><a class="el" href="format_pzone.html">/pzone element</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-Zone (Preview) by Arm Ltd. All rights reserved.
-	<!--
-    <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Zone/html/format_xzone.js b/docs/Zone/html/format_xzone.js
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-[
-    [ "/assign element", "format_assign.html", "format_assign" ]
-];
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-<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
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-<title>/zones element</title>
-<title>CMSIS-Zone (Preview): /zones element</title>
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-   &#160;<span id="projectnumber">Version 0.0.1</span>
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-      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
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-  <div class="headertitle">
-<div class="title">/zones element </div>  </div>
-</div><!--header-->
-<div class="contents">
-<div class="textblock"><p>The <b>zones</b> element groups all zone definitions.</p>
-<p><b>Example</b> </p>
-<div class="fragment"><div class="line">&lt;zones&gt;</div>
-<div class="line">  &lt;pzone name=<span class="stringliteral">&quot;App&quot;</span> Dname=<span class="stringliteral">&quot;ARM32CM4128x&quot;</span> Pname=<span class="stringliteral">&quot;Cortex-M4&quot;</span>&gt;</div>
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-<div class="line">  &lt;/pzone&gt;</div>
-<div class="line">  :</div>
-<div class="line">&lt;/zones&gt;</div>
-</div><!-- fragment --><p><b>Schema Description</b></p>
-<table  class="cmtable" summary="Element: Zones">
-<tr>
-<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
-<tr>
-<td><a class="el" href="format_system.html">system</a> </td><td colspan="3"><a class="el" href="format_system.html">/system element</a>  </td></tr>
-<tr>
-<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
-<tr>
-<td><a class="el" href="format_pzone.html">/pzone element</a> </td><td>Project zone definitions </td><td>complexType </td><td>0..*  </td></tr>
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-  <ul>
-    <li class="navelem"><a class="el" href="XML_Format.html">Zone Description Format</a></li><li class="navelem"><a class="el" href="format_system.html">/system element</a></li>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-Zone (Preview) by Arm Ltd. All rights reserved.
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diff --git a/docs/Zone/html/format_zones.js b/docs/Zone/html/format_zones.js
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-   &#160;<span id="projectnumber">Version 0.0.1</span>
+   &#160;<span id="projectnumber">Version 0.9.2</span>
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@@ -110,60 +110,44 @@
 <div class="title">CMSIS-Zone (Preview) Documentation</div>  </div>
 </div><!--header-->
 <div class="contents">
-<div class="textblock"><p>This is a preview of <b>CMSIS-Zone</b> which is scheduled for release in Q1'2018. The final release of CMSIS-Zone will provide:</p>
+<div class="textblock"><p><b>CMSIS-Zone</b> defines methods to describe system resources and to partition these resources into multiple projects and execution areas. The system resources may include multiple processors, memory areas, peripherals and related interrupts. The system resources and partition assignments are stored in <a class="el" href="zoneFormat.html">Zone Description Format</a> (XML based).</p>
+<p><b>CMSIS-Zone</b> includes a utility that manages these XML files. This utility:</p>
 <ul>
-<li><a class="el" href="XML_Format.html">Zone Description Format</a> (XML based) which stores consistent system setup information.</li>
-<li>CMSIS-Zone configuration utility for system partitioning. The <a class="el" href="GenDataModel.html">data</a> captured can be exported to various project and configuration files using file templates.</li>
+<li>displays all available system resources including memory and peripherals</li>
+<li>allows to partition memory and assign resources to sub-systems.</li>
+<li>supports the setup of secure, non-secure, and MPU protected execution zones with assignment of memory, peripherals, and interrupts.</li>
+<li>provides a data model for generation of configuration files for tool and hardware setup.</li>
 </ul>
-<p><b>CMSIS-Zone</b> defines methods to describe system resources and to partition these resources into multiple projects and execution areas. The system resources may include multiple processors, memory areas, and peripherals. The system resource and partitioning information is stored in <a class="el" href="XML_Format.html">Zone Description Format</a> (XML based).</p>
-<p><b>CMSIS-Zone</b> includes an interactive tool that manages files in the <a class="el" href="XML_Format.html">Zone Description Format</a> which allows to:</p>
+<p>The following diagram explains the development work flow when using the <b>CMSIS-Zone</b> management tool.</p>
+<div class="image">
+<img src="Partitioning_Workflow.png" alt="Partitioning_Workflow.png"/>
+<div class="caption">
+CMSIS-Zone development workflow</div></div>
+<p> The CMSIS-Zone utility reads a <a class="el" href="zoneFormat.html#rzone">.rzone</a> file that defines the overall system resources of an SoC system. An interactive GUI supports the system partitioning. The assignments of the various partitions (also called zones) saved in the <a class="el" href="zoneFormat.html#azone">.azone</a> file.</p>
+<p>The combined information of resources and assignments can be exported to multiple <a class="el" href="zoneFormat.html#rzone">.rzone</a> files that represent a sub-system. By using file templates the CMSIS-Zone utility can create tool or hardware configuration files.</p>
+<p>It is possible to uses these steps multiple times which allows to split a complex SoC design with multiple processors into smaller sub-systems. For example a multi-core device can be partitioned in steps:</p>
 <ul>
-<li>create system resource information from existing CMSIS-SVD and CMSIS-Pack descriptions.</li>
-<li>partition system resources into various project zones.</li>
-<li>partition a project zone into multiple execution zones.</li>
-<li>generate various configuration files for tool set-up and hardware initialization.</li>
+<li>Step 1: split the multi-processor system into single processor sub-systems.</li>
+<li>Step 2: create the partitions for secure and non-secure execution.</li>
+<li>Step 3: configure MPU protected execution zones.</li>
 </ul>
-<p>The following diagram explains the development flow when using the <b>CMSIS-Zone</b> management tool.</p>
+<p>The following SoC diagram exemplifies step 1 and step 2 of this workflow.</p>
 <div class="image">
-<img src="DevelopmentFlow.png" alt="DevelopmentFlow.png"/>
+<img src="Partitioning_Hardware.png" alt="Partitioning_Hardware.png"/>
 <div class="caption">
-CMSIS-Zone Development Flow</div></div>
-<p> The following sections explain:</p>
+Hardware partitioning in multiple steps</div></div>
+<p>The following sections explain:</p>
 <ul>
-<li><a class="el" href="XML_Format.html">Zone Description Format</a> (XML based) that stores system resource information and the configuration of project zones and execution zones.</li>
-<li><a class="el" href="GenDataModel.html">Generator Data Model</a> which is used to create tool set-up files and hardware configuration files.</li>
+<li><a class="el" href="zoneToolUsage.html">CMSIS-Zone Utility</a> shows hot to use the CMSIS-Zone stand-alone tool to generate the relevant project information to be used in integrated development environments (IDEs).</li>
+<li><a class="el" href="zoneFormat.html">Zone Description Format</a> (XML based) that stores system resource information and the configuration of project zones and execution zones.</li>
+<li><a class="el" href="GenDataModel.html">Generator Data Model</a> which is used to create tool set-up files and hardware configuration files. </li>
 </ul>
-<h1><a class="anchor" id="UseCases"></a>
-CMSIS-Zone Use Cases</h1>
-<p><b>CMSIS-Zone</b> simplifies to manage the complexity and the configuration of modern embedded systems that frequently include multiple processors and/or memory protection hardware. It helps to split the embedded application various projects which creates the need to partition system resources. And it simplifies the consistent configuration of access rights across the system, for example when using an MPU (memory protection unit).</p>
-<p>The following section describes several uses cases that benefit from <b>CMSIS-Zone</b>.</p>
-<h2><a class="anchor" id="UseCase_MPU"></a>
-MPU Protection</h2>
-<p>Focused on a single core microcontroller one might want to utilize the memory protection unit (MPU) capabilities to segregate parts of an application. Thus the need to partition the system resources accordingly arises.</p>
-<div class="image">
-<img src="mpu.png" alt="mpu.png"/>
-<div class="caption">
-MPU Protection</div></div>
- <h2><a class="anchor" id="UseCase_TrustZone"></a>
-TrustZone Partitioning</h2>
-<p>TrustZone extensions add another degree of segregation which must be handled consistently. In this case one has to handle MPU settings per security context and SAU configuration.</p>
-<div class="image">
-<img src="trustzone.png" alt="trustzone.png"/>
-<div class="caption">
-TrustZone Partitioning and MPU Protection</div></div>
- <h2><a class="anchor" id="UseCase_MultiCore"></a>
-Multi-Core Partitioning</h2>
-<p>Beside traditional single cores asymetric and hybrid multi-core devices contribute to increasing development complexity for embedded systems. Having multiple cores running different parts of an application concurrently needs a well defined resource assignment to prevent undesired misbehaviour.</p>
-<div class="image">
-<img src="multicore.png" alt="multicore.png"/>
-<div class="caption">
-Multi-Core Partitioning</div></div>
 </div></div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-Zone (Preview) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
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diff --git a/docs/Zone/html/navtree.js b/docs/Zone/html/navtree.js
index 94c745b..a2883a2 100644
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@@ -1,19 +1,16 @@
 var NAVTREE =
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-    [ "CMSIS-Zone Use Cases", "index.html#UseCases", [
-      [ "MPU Protection", "index.html#UseCase_MPU", null ],
-      [ "TrustZone Partitioning", "index.html#UseCase_TrustZone", null ],
-      [ "Multi-Core Partitioning", "index.html#UseCase_MultiCore", null ]
-    ] ],
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-    [ "Zone Description Format", "XML_Format.html", "XML_Format" ],
-    [ "Generator Data Model", "GenDataModel.html", [
-      [ "Data Model Structure", "GenDataModel.html#GenDataModel_Structure", null ],
-      [ "Template Examples", "GenDataModel.html#GenDataModel_Examples", [
-        [ "HTML table of all assigned memory blocks", "GenDataModel.html#GenDataModel_Examples_AssignedBlocks", null ]
-      ] ]
-    ] ]
+    [ "CMSIS-Zone Use Cases", "UseCases.html", [
+      [ "MPU Protection", "UseCases.html#UseCase_MPU", null ],
+      [ "TrustZone Partitioning", "UseCases.html#UseCase_TrustZone", null ],
+      [ "Multi-Core Partitioning", "UseCases.html#UseCase_MultiCore", null ]
+    ] ],
+    [ "CMSIS-Zone Utility", "zoneToolUsage.html", "zoneToolUsage" ],
+    [ "Zone Description Format", "zoneFormat.html", "zoneFormat" ],
+    [ "Generator Data Model", "GenDataModel.html", "GenDataModel" ],
+    [ "Todo List", "todo.html", null ]
   ] ]
 ];
 
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index d4a345b..b17630e 100644
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+++ b/docs/Zone/html/navtreeindex0.js
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-"XML_Format.html#XML_Format_Model":[2,0],
-"XML_Format.html#XML_Format_Model_Assign":[2,0,2],
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diff --git a/docs/Zone/html/pages.html b/docs/Zone/html/pages.html
index 07b3cfd..02d8304 100644
--- a/docs/Zone/html/pages.html
+++ b/docs/Zone/html/pages.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Zone (Preview)
-   &#160;<span id="projectnumber">Version 0.0.1</span>
+   &#160;<span id="projectnumber">Version 0.9.2</span>
    </div>
    <div id="projectbrief">System Resource Management</div>
   </td>
@@ -111,43 +111,49 @@
 </div><!--header-->
 <div class="contents">
 <div class="textblock">Here is a list of all related documentation pages:</div><div class="directory">
-<div class="levels">[detail level <span onclick="javascript:toggleLevel(1);">1</span><span onclick="javascript:toggleLevel(2);">2</span><span onclick="javascript:toggleLevel(3);">3</span><span onclick="javascript:toggleLevel(4);">4</span><span onclick="javascript:toggleLevel(5);">5</span><span onclick="javascript:toggleLevel(6);">6</span><span onclick="javascript:toggleLevel(7);">7</span>]</div><table class="directory">
+<div class="levels">[detail level <span onclick="javascript:toggleLevel(1);">1</span><span onclick="javascript:toggleLevel(2);">2</span><span onclick="javascript:toggleLevel(3);">3</span><span onclick="javascript:toggleLevel(4);">4</span>]</div><table class="directory">
 <tr id="row_0_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="zone_revisionHistory.html" target="_self">Revision History of CMSIS-Zone</a></td><td class="desc"></td></tr>
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-<tr id="row_1_0_0_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="format_package.html" target="_self">/package element</a></td><td class="desc"></td></tr>
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-<tr id="row_1_0_0_2_1_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_1_0_0_2_1_" src="ftv2mlastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('1_0_0_2_1_')"/><a class="el" href="format_peripherals.html" target="_self">/peripherals element</a></td><td class="desc"></td></tr>
-<tr id="row_1_0_0_2_1_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img id="arr_1_0_0_2_1_0_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('1_0_0_2_1_0_')"/><a class="el" href="format_group.html" target="_self">/group element</a></td><td class="desc"></td></tr>
-<tr id="row_1_0_0_2_1_0_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="format_peripheral.html" target="_self">/peripheral element</a></td><td class="desc"></td></tr>
-<tr id="row_1_0_0_2_1_1_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="format_peripheral.html" target="_self">/peripheral element</a></td><td class="desc"></td></tr>
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-<tr id="row_1_0_1_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_1_0_1_0_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('1_0_1_0_')"/><a class="el" href="format_memory.html" target="_self">/memory element</a></td><td class="desc"></td></tr>
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-<tr id="row_1_0_1_1_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_1_0_1_1_" src="ftv2mlastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('1_0_1_1_')"/><a class="el" href="format_peripherals.html" target="_self">/peripherals element</a></td><td class="desc"></td></tr>
-<tr id="row_1_0_1_1_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img id="arr_1_0_1_1_0_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('1_0_1_1_0_')"/><a class="el" href="format_group.html" target="_self">/group element</a></td><td class="desc"></td></tr>
-<tr id="row_1_0_1_1_0_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="format_peripheral.html" target="_self">/peripheral element</a></td><td class="desc"></td></tr>
-<tr id="row_1_0_1_1_1_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="format_peripheral.html" target="_self">/peripheral element</a></td><td class="desc"></td></tr>
-<tr id="row_1_0_2_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img id="arr_1_0_2_" src="ftv2mlastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('1_0_2_')"/><a class="el" href="format_zones.html" target="_self">/zones element</a></td><td class="desc"></td></tr>
-<tr id="row_1_0_2_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img id="arr_1_0_2_0_" src="ftv2mlastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('1_0_2_0_')"/><a class="el" href="format_pzone.html" target="_self">/pzone element</a></td><td class="desc"></td></tr>
-<tr id="row_1_0_2_0_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img id="arr_1_0_2_0_0_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('1_0_2_0_0_')"/><a class="el" href="format_assign.html" target="_self">/assign element</a></td><td class="desc"></td></tr>
-<tr id="row_1_0_2_0_0_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="format_capture.html" target="_self">/capture element</a></td><td class="desc"></td></tr>
-<tr id="row_1_0_2_0_1_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img id="arr_1_0_2_0_1_" src="ftv2mlastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('1_0_2_0_1_')"/><a class="el" href="format_xzone.html" target="_self">/xzone element</a></td><td class="desc"></td></tr>
-<tr id="row_1_0_2_0_1_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img id="arr_1_0_2_0_1_0_" src="ftv2mlastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('1_0_2_0_1_0_')"/><a class="el" href="format_assign.html" target="_self">/assign element</a></td><td class="desc"></td></tr>
-<tr id="row_1_0_2_0_1_0_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="format_capture.html" target="_self">/capture element</a></td><td class="desc"></td></tr>
-<tr id="row_2_"><td class="entry"><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="GenDataModel.html" target="_self">Generator Data Model</a></td><td class="desc"></td></tr>
+<tr id="row_1_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="UseCases.html" target="_self">CMSIS-Zone Use Cases</a></td><td class="desc"></td></tr>
+<tr id="row_2_" class="even"><td class="entry"><img id="arr_2_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('2_')"/><a class="el" href="zoneToolUsage.html" target="_self">CMSIS-Zone Utility</a></td><td class="desc"></td></tr>
+<tr id="row_2_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="zTInstall.html" target="_self">Installation</a></td><td class="desc"></td></tr>
+<tr id="row_2_1_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="zTUI.html" target="_self">User Interface</a></td><td class="desc"></td></tr>
+<tr id="row_2_2_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_2_2_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('2_2_')"/><a class="el" href="zTInteractiveMode.html" target="_self">Interactive Mode</a></td><td class="desc"></td></tr>
+<tr id="row_2_2_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="zTUICreateProject.html" target="_self">Create a CMSIS-Zone Project</a></td><td class="desc"></td></tr>
+<tr id="row_2_2_1_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="zTUIMemPerRes.html" target="_self">Memory and Peripheral Resources</a></td><td class="desc"></td></tr>
+<tr id="row_2_2_2_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="zTUIZonePart.html" target="_self">Zone Partitioning</a></td><td class="desc"></td></tr>
+<tr id="row_2_2_3_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="zTUIGenerate.html" target="_self">Generate output files</a></td><td class="desc"></td></tr>
+<tr id="row_2_3_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="zTCLI.html" target="_self">Command Line Mode</a></td><td class="desc"></td></tr>
+<tr id="row_2_4_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_2_4_" src="ftv2mlastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('2_4_')"/><a class="el" href="zTExamples.html" target="_self">Examples</a></td><td class="desc"></td></tr>
+<tr id="row_2_4_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="zTEMusca.html" target="_self">Arm Musca-A1</a></td><td class="desc"></td></tr>
+<tr id="row_2_4_1_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="zTELPC55.html" target="_self">NXP LPC55S69</a></td><td class="desc"></td></tr>
+<tr id="row_2_4_2_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="zTESTM32L5.html" target="_self">STMicroelectronics STM32L5</a></td><td class="desc"></td></tr>
+<tr id="row_3_"><td class="entry"><img id="arr_3_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('3_')"/><a class="el" href="zoneFormat.html" target="_self">Zone Description Format</a></td><td class="desc"></td></tr>
+<tr id="row_3_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_3_0_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('3_0_')"/><a class="el" href="xml_rzone_pg.html" target="_self">/rzone element</a></td><td class="desc"></td></tr>
+<tr id="row_3_0_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="xml_creator.html" target="_self">/rzone/creator element</a></td><td class="desc"></td></tr>
+<tr id="row_3_0_1_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="xml_device.html" target="_self">/rzone/device element</a></td><td class="desc"></td></tr>
+<tr id="row_3_0_2_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_3_0_2_" src="ftv2mlastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('3_0_2_')"/><a class="el" href="xml_resources.html" target="_self">/rzone/resources element</a></td><td class="desc"></td></tr>
+<tr id="row_3_0_2_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="xml_sau_init.html" target="_self">/rzone/resources/sau_init element</a></td><td class="desc"></td></tr>
+<tr id="row_3_0_2_1_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="xml_memories.html" target="_self">/rzone/resources/memories element</a></td><td class="desc"></td></tr>
+<tr id="row_3_0_2_2_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="xml_peripherals.html" target="_self">/rzone/resources/peripherals element</a></td><td class="desc"></td></tr>
+<tr id="row_3_1_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_3_1_" src="ftv2mlastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('3_1_')"/><a class="el" href="xml_azone_pg.html" target="_self">/azone element</a></td><td class="desc"></td></tr>
+<tr id="row_3_1_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="xml_arzone.html" target="_self">/azone/rzone element</a></td><td class="desc"></td></tr>
+<tr id="row_3_1_1_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="xml_configure.html" target="_self">/azone/configure element</a></td><td class="desc"></td></tr>
+<tr id="row_3_1_2_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="xml_partition.html" target="_self">/azone/partition element</a></td><td class="desc"></td></tr>
+<tr id="row_3_1_3_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="xml_zones.html" target="_self">/azone/zones element</a></td><td class="desc"></td></tr>
+<tr id="row_4_" class="even"><td class="entry"><img id="arr_4_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('4_')"/><a class="el" href="GenDataModel.html" target="_self">Generator Data Model</a></td><td class="desc"></td></tr>
+<tr id="row_4_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_4_0_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('4_0_')"/><a class="el" href="fm_system.html" target="_self">system element</a></td><td class="desc"></td></tr>
+<tr id="row_4_0_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="fm_processor.html" target="_self">processor[n] sequence element</a></td><td class="desc"></td></tr>
+<tr id="row_4_0_1_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="fm_memory.html" target="_self">../memory[n] sequence element</a></td><td class="desc"></td></tr>
+<tr id="row_4_0_2_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="fm_peripheral.html" target="_self">../peripheral[n] element</a></td><td class="desc"></td></tr>
+<tr id="row_4_0_3_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="fm_sau.html" target="_self">sau[n] sequence element</a></td><td class="desc"></td></tr>
+<tr id="row_4_0_4_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="fm_interrupt.html" target="_self">interrupt[n] sequence element</a></td><td class="desc"></td></tr>
+<tr id="row_4_0_5_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="fm_mpc_setup.html" target="_self">mpc_setup[n] element</a></td><td class="desc"></td></tr>
+<tr id="row_4_0_6_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="fm_reg_setup.html" target="_self">reg_setup[n] element</a></td><td class="desc"></td></tr>
+<tr id="row_4_1_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img id="arr_4_1_" src="ftv2mlastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('4_1_')"/><a class="el" href="fm_zone.html" target="_self">zone element</a></td><td class="desc"></td></tr>
+<tr id="row_4_1_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="fm_memory.html" target="_self">../memory[n] sequence element</a></td><td class="desc"></td></tr>
+<tr id="row_4_1_1_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="fm_peripheral.html" target="_self">../peripheral[n] element</a></td><td class="desc"></td></tr>
+<tr id="row_4_1_2_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="fm_mpu_setup.html" target="_self">mpu_setup element</a></td><td class="desc"></td></tr>
+<tr id="row_5_"><td class="entry"><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="todo.html" target="_self">Todo List</a></td><td class="desc"></td></tr>
 </table>
 </div><!-- directory -->
 </div><!-- contents -->
@@ -155,7 +161,7 @@
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-Zone (Preview) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
diff --git a/docs/Zone/html/partition_h_l5.png b/docs/Zone/html/partition_h_l5.png
new file mode 100644
index 0000000..b3773a9
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diff --git a/docs/Zone/html/peripheral_properties.png b/docs/Zone/html/peripheral_properties.png
new file mode 100644
index 0000000..e193149
--- /dev/null
+++ b/docs/Zone/html/peripheral_properties.png
Binary files differ
diff --git a/docs/Zone/html/res_prop.png b/docs/Zone/html/res_prop.png
new file mode 100644
index 0000000..fc1502e
--- /dev/null
+++ b/docs/Zone/html/res_prop.png
Binary files differ
diff --git a/docs/Zone/html/resource_map.png b/docs/Zone/html/resource_map.png
new file mode 100644
index 0000000..6e3a23b
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diff --git a/docs/Zone/html/search/all_0.js b/docs/Zone/html/search/all_0.js
index e27690c..4c0dfb6 100644
--- a/docs/Zone/html/search/all_0.js
+++ b/docs/Zone/html/search/all_0.js
@@ -1,5 +1,4 @@
 var searchData=
 [
-  ['generator_20data_20model',['Generator Data Model',['../GenDataModel.html',1,'']]],
-  ['gendatamodel_2etxt',['GenDataModel.txt',['../GenDataModel_8txt.html',1,'']]]
+  ['arm_20musca_2da1',['Arm Musca-A1',['../zTEMusca.html',1,'zTExamples']]]
 ];
diff --git a/docs/Zone/html/search/all_1.js b/docs/Zone/html/search/all_1.js
index c7c9724..1a480ce 100644
--- a/docs/Zone/html/search/all_1.js
+++ b/docs/Zone/html/search/all_1.js
@@ -1,4 +1,7 @@
 var searchData=
 [
-  ['overview_2etxt',['Overview.txt',['../Overview_8txt.html',1,'']]]
+  ['cmsis_2dzone_20use_20cases',['CMSIS-Zone Use Cases',['../UseCases.html',1,'']]],
+  ['cmsis_2dzone_20utility',['CMSIS-Zone Utility',['../zoneToolUsage.html',1,'']]],
+  ['command_20line_20mode',['Command Line Mode',['../zTCLI.html',1,'zoneToolUsage']]],
+  ['create_20a_20cmsis_2dzone_20project',['Create a CMSIS-Zone Project',['../zTUICreateProject.html',1,'zTInteractiveMode']]]
 ];
diff --git a/docs/Zone/html/search/all_2.js b/docs/Zone/html/search/all_2.js
index 43732cd..60aa4cc 100644
--- a/docs/Zone/html/search/all_2.js
+++ b/docs/Zone/html/search/all_2.js
@@ -1,4 +1,4 @@
 var searchData=
 [
-  ['revision_20history_20of_20cmsis_2dzone',['Revision History of CMSIS-Zone',['../zone_revisionHistory.html',1,'']]]
+  ['examples',['Examples',['../zTExamples.html',1,'zoneToolUsage']]]
 ];
diff --git a/docs/Zone/html/search/all_3.js b/docs/Zone/html/search/all_3.js
index 5d73130..4f5b5fe 100644
--- a/docs/Zone/html/search/all_3.js
+++ b/docs/Zone/html/search/all_3.js
@@ -1,4 +1,6 @@
 var searchData=
 [
-  ['xml_5fformat_2etxt',['XML_Format.txt',['../XML__Format_8txt.html',1,'']]]
+  ['generator_20data_20model',['Generator Data Model',['../GenDataModel.html',1,'']]],
+  ['gendatamodel_2etxt',['GenDataModel.txt',['../GenDataModel_8txt.html',1,'']]],
+  ['generate_20output_20files',['Generate output files',['../zTUIGenerate.html',1,'zTInteractiveMode']]]
 ];
diff --git a/docs/Zone/html/search/all_4.js b/docs/Zone/html/search/all_4.js
index 0d3dff4..62c5efa 100644
--- a/docs/Zone/html/search/all_4.js
+++ b/docs/Zone/html/search/all_4.js
@@ -1,4 +1,6 @@
 var searchData=
 [
-  ['zone_20description_20format',['Zone Description Format',['../XML_Format.html',1,'']]]
+  ['interrupt_5bn_5d_20sequence_20element',['interrupt[n] sequence element',['../fm_interrupt.html',1,'fm_system']]],
+  ['installation',['Installation',['../zTInstall.html',1,'zoneToolUsage']]],
+  ['interactive_20mode',['Interactive Mode',['../zTInteractiveMode.html',1,'zoneToolUsage']]]
 ];
diff --git a/docs/Zone/html/search/all_5.html b/docs/Zone/html/search/all_5.html
new file mode 100644
index 0000000..99ef726
--- /dev/null
+++ b/docs/Zone/html/search/all_5.html
@@ -0,0 +1,26 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html><head><title></title>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta name="generator" content="Doxygen 1.8.6">
+<link rel="stylesheet" type="text/css" href="search.css"/>
+<script type="text/javascript" src="all_5.js"></script>
+<script type="text/javascript" src="search.js"></script>
+</head>
+<body class="SRPage">
+<div id="SRIndex">
+<div class="SRStatus" id="Loading">Loading...</div>
+<div id="SRResults"></div>
+<script type="text/javascript"><!--
+createResults();
+--></script>
+<div class="SRStatus" id="Searching">Searching...</div>
+<div class="SRStatus" id="NoMatches">No Matches</div>
+<script type="text/javascript"><!--
+document.getElementById("Loading").style.display="none";
+document.getElementById("NoMatches").style.display="none";
+var searchResults = new SearchResults("searchResults");
+searchResults.Search();
+--></script>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/search/all_5.js b/docs/Zone/html/search/all_5.js
new file mode 100644
index 0000000..434078c
--- /dev/null
+++ b/docs/Zone/html/search/all_5.js
@@ -0,0 +1,6 @@
+var searchData=
+[
+  ['mpc_5fsetup_5bn_5d_20element',['mpc_setup[n] element',['../fm_mpc_setup.html',1,'fm_system']]],
+  ['mpu_5fsetup_20element',['mpu_setup element',['../fm_mpu_setup.html',1,'fm_zone']]],
+  ['memory_20and_20peripheral_20resources',['Memory and Peripheral Resources',['../zTUIMemPerRes.html',1,'zTInteractiveMode']]]
+];
diff --git a/docs/Zone/html/search/all_6.html b/docs/Zone/html/search/all_6.html
new file mode 100644
index 0000000..6133ab3
--- /dev/null
+++ b/docs/Zone/html/search/all_6.html
@@ -0,0 +1,26 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html><head><title></title>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta name="generator" content="Doxygen 1.8.6">
+<link rel="stylesheet" type="text/css" href="search.css"/>
+<script type="text/javascript" src="all_6.js"></script>
+<script type="text/javascript" src="search.js"></script>
+</head>
+<body class="SRPage">
+<div id="SRIndex">
+<div class="SRStatus" id="Loading">Loading...</div>
+<div id="SRResults"></div>
+<script type="text/javascript"><!--
+createResults();
+--></script>
+<div class="SRStatus" id="Searching">Searching...</div>
+<div class="SRStatus" id="NoMatches">No Matches</div>
+<script type="text/javascript"><!--
+document.getElementById("Loading").style.display="none";
+document.getElementById("NoMatches").style.display="none";
+var searchResults = new SearchResults("searchResults");
+searchResults.Search();
+--></script>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/search/all_6.js b/docs/Zone/html/search/all_6.js
new file mode 100644
index 0000000..9b45f0d
--- /dev/null
+++ b/docs/Zone/html/search/all_6.js
@@ -0,0 +1,4 @@
+var searchData=
+[
+  ['nxp_20lpc55s69',['NXP LPC55S69',['../zTELPC55.html',1,'zTExamples']]]
+];
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new file mode 100644
index 0000000..5748125
--- /dev/null
+++ b/docs/Zone/html/search/all_7.html
@@ -0,0 +1,26 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html><head><title></title>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta name="generator" content="Doxygen 1.8.6">
+<link rel="stylesheet" type="text/css" href="search.css"/>
+<script type="text/javascript" src="all_7.js"></script>
+<script type="text/javascript" src="search.js"></script>
+</head>
+<body class="SRPage">
+<div id="SRIndex">
+<div class="SRStatus" id="Loading">Loading...</div>
+<div id="SRResults"></div>
+<script type="text/javascript"><!--
+createResults();
+--></script>
+<div class="SRStatus" id="Searching">Searching...</div>
+<div class="SRStatus" id="NoMatches">No Matches</div>
+<script type="text/javascript"><!--
+document.getElementById("Loading").style.display="none";
+document.getElementById("NoMatches").style.display="none";
+var searchResults = new SearchResults("searchResults");
+searchResults.Search();
+--></script>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/search/all_7.js b/docs/Zone/html/search/all_7.js
new file mode 100644
index 0000000..c7c9724
--- /dev/null
+++ b/docs/Zone/html/search/all_7.js
@@ -0,0 +1,4 @@
+var searchData=
+[
+  ['overview_2etxt',['Overview.txt',['../Overview_8txt.html',1,'']]]
+];
diff --git a/docs/Zone/html/search/all_8.html b/docs/Zone/html/search/all_8.html
new file mode 100644
index 0000000..0179bdd
--- /dev/null
+++ b/docs/Zone/html/search/all_8.html
@@ -0,0 +1,26 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html><head><title></title>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta name="generator" content="Doxygen 1.8.6">
+<link rel="stylesheet" type="text/css" href="search.css"/>
+<script type="text/javascript" src="all_8.js"></script>
+<script type="text/javascript" src="search.js"></script>
+</head>
+<body class="SRPage">
+<div id="SRIndex">
+<div class="SRStatus" id="Loading">Loading...</div>
+<div id="SRResults"></div>
+<script type="text/javascript"><!--
+createResults();
+--></script>
+<div class="SRStatus" id="Searching">Searching...</div>
+<div class="SRStatus" id="NoMatches">No Matches</div>
+<script type="text/javascript"><!--
+document.getElementById("Loading").style.display="none";
+document.getElementById("NoMatches").style.display="none";
+var searchResults = new SearchResults("searchResults");
+searchResults.Search();
+--></script>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/search/all_8.js b/docs/Zone/html/search/all_8.js
new file mode 100644
index 0000000..7b434a1
--- /dev/null
+++ b/docs/Zone/html/search/all_8.js
@@ -0,0 +1,4 @@
+var searchData=
+[
+  ['processor_5bn_5d_20sequence_20element',['processor[n] sequence element',['../fm_processor.html',1,'fm_system']]]
+];
diff --git a/docs/Zone/html/search/all_9.html b/docs/Zone/html/search/all_9.html
new file mode 100644
index 0000000..cd46d44
--- /dev/null
+++ b/docs/Zone/html/search/all_9.html
@@ -0,0 +1,26 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html><head><title></title>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta name="generator" content="Doxygen 1.8.6">
+<link rel="stylesheet" type="text/css" href="search.css"/>
+<script type="text/javascript" src="all_9.js"></script>
+<script type="text/javascript" src="search.js"></script>
+</head>
+<body class="SRPage">
+<div id="SRIndex">
+<div class="SRStatus" id="Loading">Loading...</div>
+<div id="SRResults"></div>
+<script type="text/javascript"><!--
+createResults();
+--></script>
+<div class="SRStatus" id="Searching">Searching...</div>
+<div class="SRStatus" id="NoMatches">No Matches</div>
+<script type="text/javascript"><!--
+document.getElementById("Loading").style.display="none";
+document.getElementById("NoMatches").style.display="none";
+var searchResults = new SearchResults("searchResults");
+searchResults.Search();
+--></script>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/search/all_9.js b/docs/Zone/html/search/all_9.js
new file mode 100644
index 0000000..d3b1947
--- /dev/null
+++ b/docs/Zone/html/search/all_9.js
@@ -0,0 +1,5 @@
+var searchData=
+[
+  ['reg_5fsetup_5bn_5d_20element',['reg_setup[n] element',['../fm_reg_setup.html',1,'fm_system']]],
+  ['revision_20history_20of_20cmsis_2dzone',['Revision History of CMSIS-Zone',['../zone_revisionHistory.html',1,'']]]
+];
diff --git a/docs/Zone/html/search/all_a.html b/docs/Zone/html/search/all_a.html
new file mode 100644
index 0000000..eab6553
--- /dev/null
+++ b/docs/Zone/html/search/all_a.html
@@ -0,0 +1,26 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html><head><title></title>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta name="generator" content="Doxygen 1.8.6">
+<link rel="stylesheet" type="text/css" href="search.css"/>
+<script type="text/javascript" src="all_a.js"></script>
+<script type="text/javascript" src="search.js"></script>
+</head>
+<body class="SRPage">
+<div id="SRIndex">
+<div class="SRStatus" id="Loading">Loading...</div>
+<div id="SRResults"></div>
+<script type="text/javascript"><!--
+createResults();
+--></script>
+<div class="SRStatus" id="Searching">Searching...</div>
+<div class="SRStatus" id="NoMatches">No Matches</div>
+<script type="text/javascript"><!--
+document.getElementById("Loading").style.display="none";
+document.getElementById("NoMatches").style.display="none";
+var searchResults = new SearchResults("searchResults");
+searchResults.Search();
+--></script>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/search/all_a.js b/docs/Zone/html/search/all_a.js
new file mode 100644
index 0000000..6ac9872
--- /dev/null
+++ b/docs/Zone/html/search/all_a.js
@@ -0,0 +1,6 @@
+var searchData=
+[
+  ['sau_5bn_5d_20sequence_20element',['sau[n] sequence element',['../fm_sau.html',1,'fm_system']]],
+  ['system_20element',['system element',['../fm_system.html',1,'GenDataModel']]],
+  ['stmicroelectronics_20stm32l5',['STMicroelectronics STM32L5',['../zTESTM32L5.html',1,'zTExamples']]]
+];
diff --git a/docs/Zone/html/search/all_b.html b/docs/Zone/html/search/all_b.html
new file mode 100644
index 0000000..a2c161e
--- /dev/null
+++ b/docs/Zone/html/search/all_b.html
@@ -0,0 +1,26 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html><head><title></title>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta name="generator" content="Doxygen 1.8.6">
+<link rel="stylesheet" type="text/css" href="search.css"/>
+<script type="text/javascript" src="all_b.js"></script>
+<script type="text/javascript" src="search.js"></script>
+</head>
+<body class="SRPage">
+<div id="SRIndex">
+<div class="SRStatus" id="Loading">Loading...</div>
+<div id="SRResults"></div>
+<script type="text/javascript"><!--
+createResults();
+--></script>
+<div class="SRStatus" id="Searching">Searching...</div>
+<div class="SRStatus" id="NoMatches">No Matches</div>
+<script type="text/javascript"><!--
+document.getElementById("Loading").style.display="none";
+document.getElementById("NoMatches").style.display="none";
+var searchResults = new SearchResults("searchResults");
+searchResults.Search();
+--></script>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/search/all_b.js b/docs/Zone/html/search/all_b.js
new file mode 100644
index 0000000..441b2de
--- /dev/null
+++ b/docs/Zone/html/search/all_b.js
@@ -0,0 +1,4 @@
+var searchData=
+[
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+];
diff --git a/docs/Zone/html/search/all_c.html b/docs/Zone/html/search/all_c.html
new file mode 100644
index 0000000..bdd3ee2
--- /dev/null
+++ b/docs/Zone/html/search/all_c.html
@@ -0,0 +1,26 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html><head><title></title>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta name="generator" content="Doxygen 1.8.6">
+<link rel="stylesheet" type="text/css" href="search.css"/>
+<script type="text/javascript" src="all_c.js"></script>
+<script type="text/javascript" src="search.js"></script>
+</head>
+<body class="SRPage">
+<div id="SRIndex">
+<div class="SRStatus" id="Loading">Loading...</div>
+<div id="SRResults"></div>
+<script type="text/javascript"><!--
+createResults();
+--></script>
+<div class="SRStatus" id="Searching">Searching...</div>
+<div class="SRStatus" id="NoMatches">No Matches</div>
+<script type="text/javascript"><!--
+document.getElementById("Loading").style.display="none";
+document.getElementById("NoMatches").style.display="none";
+var searchResults = new SearchResults("searchResults");
+searchResults.Search();
+--></script>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/search/all_c.js b/docs/Zone/html/search/all_c.js
new file mode 100644
index 0000000..2f8c4aa
--- /dev/null
+++ b/docs/Zone/html/search/all_c.js
@@ -0,0 +1,4 @@
+var searchData=
+[
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+];
diff --git a/docs/Zone/html/search/all_d.html b/docs/Zone/html/search/all_d.html
new file mode 100644
index 0000000..d510933
--- /dev/null
+++ b/docs/Zone/html/search/all_d.html
@@ -0,0 +1,26 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html><head><title></title>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta name="generator" content="Doxygen 1.8.6">
+<link rel="stylesheet" type="text/css" href="search.css"/>
+<script type="text/javascript" src="all_d.js"></script>
+<script type="text/javascript" src="search.js"></script>
+</head>
+<body class="SRPage">
+<div id="SRIndex">
+<div class="SRStatus" id="Loading">Loading...</div>
+<div id="SRResults"></div>
+<script type="text/javascript"><!--
+createResults();
+--></script>
+<div class="SRStatus" id="Searching">Searching...</div>
+<div class="SRStatus" id="NoMatches">No Matches</div>
+<script type="text/javascript"><!--
+document.getElementById("Loading").style.display="none";
+document.getElementById("NoMatches").style.display="none";
+var searchResults = new SearchResults("searchResults");
+searchResults.Search();
+--></script>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/search/all_d.js b/docs/Zone/html/search/all_d.js
new file mode 100644
index 0000000..5d73130
--- /dev/null
+++ b/docs/Zone/html/search/all_d.js
@@ -0,0 +1,4 @@
+var searchData=
+[
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+];
diff --git a/docs/Zone/html/search/all_e.html b/docs/Zone/html/search/all_e.html
new file mode 100644
index 0000000..3cda017
--- /dev/null
+++ b/docs/Zone/html/search/all_e.html
@@ -0,0 +1,26 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html><head><title></title>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta name="generator" content="Doxygen 1.8.6">
+<link rel="stylesheet" type="text/css" href="search.css"/>
+<script type="text/javascript" src="all_e.js"></script>
+<script type="text/javascript" src="search.js"></script>
+</head>
+<body class="SRPage">
+<div id="SRIndex">
+<div class="SRStatus" id="Loading">Loading...</div>
+<div id="SRResults"></div>
+<script type="text/javascript"><!--
+createResults();
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+<div class="SRStatus" id="Searching">Searching...</div>
+<div class="SRStatus" id="NoMatches">No Matches</div>
+<script type="text/javascript"><!--
+document.getElementById("Loading").style.display="none";
+document.getElementById("NoMatches").style.display="none";
+var searchResults = new SearchResults("searchResults");
+searchResults.Search();
+--></script>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/search/all_e.js b/docs/Zone/html/search/all_e.js
new file mode 100644
index 0000000..7607faf
--- /dev/null
+++ b/docs/Zone/html/search/all_e.js
@@ -0,0 +1,6 @@
+var searchData=
+[
+  ['zone_20element',['zone element',['../fm_zone.html',1,'GenDataModel']]],
+  ['zone_20description_20format',['Zone Description Format',['../zoneFormat.html',1,'']]],
+  ['zone_20partitioning',['Zone Partitioning',['../zTUIZonePart.html',1,'zTInteractiveMode']]]
+];
diff --git a/docs/Zone/html/search/pages_0.js b/docs/Zone/html/search/pages_0.js
index 7c0dd0e..4c0dfb6 100644
--- a/docs/Zone/html/search/pages_0.js
+++ b/docs/Zone/html/search/pages_0.js
@@ -1,4 +1,4 @@
 var searchData=
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-  ['generator_20data_20model',['Generator Data Model',['../GenDataModel.html',1,'']]]
+  ['arm_20musca_2da1',['Arm Musca-A1',['../zTEMusca.html',1,'zTExamples']]]
 ];
diff --git a/docs/Zone/html/search/pages_1.js b/docs/Zone/html/search/pages_1.js
index 43732cd..1a480ce 100644
--- a/docs/Zone/html/search/pages_1.js
+++ b/docs/Zone/html/search/pages_1.js
@@ -1,4 +1,7 @@
 var searchData=
 [
-  ['revision_20history_20of_20cmsis_2dzone',['Revision History of CMSIS-Zone',['../zone_revisionHistory.html',1,'']]]
+  ['cmsis_2dzone_20use_20cases',['CMSIS-Zone Use Cases',['../UseCases.html',1,'']]],
+  ['cmsis_2dzone_20utility',['CMSIS-Zone Utility',['../zoneToolUsage.html',1,'']]],
+  ['command_20line_20mode',['Command Line Mode',['../zTCLI.html',1,'zoneToolUsage']]],
+  ['create_20a_20cmsis_2dzone_20project',['Create a CMSIS-Zone Project',['../zTUICreateProject.html',1,'zTInteractiveMode']]]
 ];
diff --git a/docs/Zone/html/search/pages_2.js b/docs/Zone/html/search/pages_2.js
index 0d3dff4..60aa4cc 100644
--- a/docs/Zone/html/search/pages_2.js
+++ b/docs/Zone/html/search/pages_2.js
@@ -1,4 +1,4 @@
 var searchData=
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-  ['zone_20description_20format',['Zone Description Format',['../XML_Format.html',1,'']]]
+  ['examples',['Examples',['../zTExamples.html',1,'zoneToolUsage']]]
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diff --git a/docs/Zone/html/search/pages_3.html b/docs/Zone/html/search/pages_3.html
new file mode 100644
index 0000000..4310311
--- /dev/null
+++ b/docs/Zone/html/search/pages_3.html
@@ -0,0 +1,26 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html><head><title></title>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta name="generator" content="Doxygen 1.8.6">
+<link rel="stylesheet" type="text/css" href="search.css"/>
+<script type="text/javascript" src="pages_3.js"></script>
+<script type="text/javascript" src="search.js"></script>
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+<div id="SRIndex">
+<div class="SRStatus" id="Loading">Loading...</div>
+<div id="SRResults"></div>
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+</body>
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new file mode 100644
index 0000000..555a782
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@@ -0,0 +1,5 @@
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new file mode 100644
index 0000000..ae5ce18
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+</head>
+<body class="SRPage">
+<div id="SRIndex">
+<div class="SRStatus" id="Loading">Loading...</div>
+<div id="SRResults"></div>
+<script type="text/javascript"><!--
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+<div class="SRStatus" id="Searching">Searching...</div>
+<div class="SRStatus" id="NoMatches">No Matches</div>
+<script type="text/javascript"><!--
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+</html>
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new file mode 100644
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@@ -0,0 +1,6 @@
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new file mode 100644
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+<link rel="stylesheet" type="text/css" href="search.css"/>
+<script type="text/javascript" src="pages_6.js"></script>
+<script type="text/javascript" src="search.js"></script>
+</head>
+<body class="SRPage">
+<div id="SRIndex">
+<div class="SRStatus" id="Loading">Loading...</div>
+<div id="SRResults"></div>
+<script type="text/javascript"><!--
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+<div class="SRStatus" id="Searching">Searching...</div>
+<div class="SRStatus" id="NoMatches">No Matches</div>
+<script type="text/javascript"><!--
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+searchResults.Search();
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+</div>
+</body>
+</html>
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new file mode 100644
index 0000000..9b45f0d
--- /dev/null
+++ b/docs/Zone/html/search/pages_6.js
@@ -0,0 +1,4 @@
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new file mode 100644
index 0000000..9d7ba25
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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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+<link rel="stylesheet" type="text/css" href="search.css"/>
+<script type="text/javascript" src="pages_7.js"></script>
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+</head>
+<body class="SRPage">
+<div id="SRIndex">
+<div class="SRStatus" id="Loading">Loading...</div>
+<div id="SRResults"></div>
+<script type="text/javascript"><!--
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+<div class="SRStatus" id="Searching">Searching...</div>
+<div class="SRStatus" id="NoMatches">No Matches</div>
+<script type="text/javascript"><!--
+document.getElementById("Loading").style.display="none";
+document.getElementById("NoMatches").style.display="none";
+var searchResults = new SearchResults("searchResults");
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+</body>
+</html>
diff --git a/docs/Zone/html/search/pages_7.js b/docs/Zone/html/search/pages_7.js
new file mode 100644
index 0000000..7b434a1
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+++ b/docs/Zone/html/search/pages_7.js
@@ -0,0 +1,4 @@
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new file mode 100644
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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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+<body class="SRPage">
+<div id="SRIndex">
+<div class="SRStatus" id="Loading">Loading...</div>
+<div id="SRResults"></div>
+<script type="text/javascript"><!--
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+--></script>
+<div class="SRStatus" id="Searching">Searching...</div>
+<div class="SRStatus" id="NoMatches">No Matches</div>
+<script type="text/javascript"><!--
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+</body>
+</html>
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new file mode 100644
index 0000000..d3b1947
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+++ b/docs/Zone/html/search/pages_8.js
@@ -0,0 +1,5 @@
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diff --git a/docs/Zone/html/search/pages_9.html b/docs/Zone/html/search/pages_9.html
new file mode 100644
index 0000000..203934e
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+++ b/docs/Zone/html/search/pages_9.html
@@ -0,0 +1,26 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html><head><title></title>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta name="generator" content="Doxygen 1.8.6">
+<link rel="stylesheet" type="text/css" href="search.css"/>
+<script type="text/javascript" src="pages_9.js"></script>
+<script type="text/javascript" src="search.js"></script>
+</head>
+<body class="SRPage">
+<div id="SRIndex">
+<div class="SRStatus" id="Loading">Loading...</div>
+<div id="SRResults"></div>
+<script type="text/javascript"><!--
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+--></script>
+<div class="SRStatus" id="Searching">Searching...</div>
+<div class="SRStatus" id="NoMatches">No Matches</div>
+<script type="text/javascript"><!--
+document.getElementById("Loading").style.display="none";
+document.getElementById("NoMatches").style.display="none";
+var searchResults = new SearchResults("searchResults");
+searchResults.Search();
+--></script>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/search/pages_9.js b/docs/Zone/html/search/pages_9.js
new file mode 100644
index 0000000..6ac9872
--- /dev/null
+++ b/docs/Zone/html/search/pages_9.js
@@ -0,0 +1,6 @@
+var searchData=
+[
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+  ['system_20element',['system element',['../fm_system.html',1,'GenDataModel']]],
+  ['stmicroelectronics_20stm32l5',['STMicroelectronics STM32L5',['../zTESTM32L5.html',1,'zTExamples']]]
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diff --git a/docs/Zone/html/search/pages_a.html b/docs/Zone/html/search/pages_a.html
new file mode 100644
index 0000000..1c097e5
--- /dev/null
+++ b/docs/Zone/html/search/pages_a.html
@@ -0,0 +1,26 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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+<link rel="stylesheet" type="text/css" href="search.css"/>
+<script type="text/javascript" src="pages_a.js"></script>
+<script type="text/javascript" src="search.js"></script>
+</head>
+<body class="SRPage">
+<div id="SRIndex">
+<div class="SRStatus" id="Loading">Loading...</div>
+<div id="SRResults"></div>
+<script type="text/javascript"><!--
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+<div class="SRStatus" id="NoMatches">No Matches</div>
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diff --git a/docs/Zone/html/search/pages_a.js b/docs/Zone/html/search/pages_a.js
new file mode 100644
index 0000000..441b2de
--- /dev/null
+++ b/docs/Zone/html/search/pages_a.js
@@ -0,0 +1,4 @@
+var searchData=
+[
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+];
diff --git a/docs/Zone/html/search/pages_b.html b/docs/Zone/html/search/pages_b.html
new file mode 100644
index 0000000..f01d44a
--- /dev/null
+++ b/docs/Zone/html/search/pages_b.html
@@ -0,0 +1,26 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html><head><title></title>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta name="generator" content="Doxygen 1.8.6">
+<link rel="stylesheet" type="text/css" href="search.css"/>
+<script type="text/javascript" src="pages_b.js"></script>
+<script type="text/javascript" src="search.js"></script>
+</head>
+<body class="SRPage">
+<div id="SRIndex">
+<div class="SRStatus" id="Loading">Loading...</div>
+<div id="SRResults"></div>
+<script type="text/javascript"><!--
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+--></script>
+<div class="SRStatus" id="Searching">Searching...</div>
+<div class="SRStatus" id="NoMatches">No Matches</div>
+<script type="text/javascript"><!--
+document.getElementById("Loading").style.display="none";
+document.getElementById("NoMatches").style.display="none";
+var searchResults = new SearchResults("searchResults");
+searchResults.Search();
+--></script>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/search/pages_b.js b/docs/Zone/html/search/pages_b.js
new file mode 100644
index 0000000..2f8c4aa
--- /dev/null
+++ b/docs/Zone/html/search/pages_b.js
@@ -0,0 +1,4 @@
+var searchData=
+[
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diff --git a/docs/Zone/html/search/pages_c.html b/docs/Zone/html/search/pages_c.html
new file mode 100644
index 0000000..34e3caf
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+++ b/docs/Zone/html/search/pages_c.html
@@ -0,0 +1,26 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
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+<link rel="stylesheet" type="text/css" href="search.css"/>
+<script type="text/javascript" src="pages_c.js"></script>
+<script type="text/javascript" src="search.js"></script>
+</head>
+<body class="SRPage">
+<div id="SRIndex">
+<div class="SRStatus" id="Loading">Loading...</div>
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diff --git a/docs/Zone/html/search/pages_c.js b/docs/Zone/html/search/pages_c.js
new file mode 100644
index 0000000..7607faf
--- /dev/null
+++ b/docs/Zone/html/search/pages_c.js
@@ -0,0 +1,6 @@
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+  ['zone_20partitioning',['Zone Partitioning',['../zTUIZonePart.html',1,'zTInteractiveMode']]]
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diff --git a/docs/Zone/html/search/search.js b/docs/Zone/html/search/search.js
index f3b5309..20f97cf 100644
--- a/docs/Zone/html/search/search.js
+++ b/docs/Zone/html/search/search.js
@@ -7,9 +7,9 @@
 
 var indexSectionsWithContent =
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diff --git a/docs/Zone/html/todo.html b/docs/Zone/html/todo.html
new file mode 100644
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--- /dev/null
+++ b/docs/Zone/html/todo.html
@@ -0,0 +1,134 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>Todo List</title>
+<title>CMSIS-Zone (Preview): Todo List</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
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+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
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+   <div id="projectbrief">System Resource Management</div>
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+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
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+<div id="side-nav" class="ui-resizable side-nav-resizable">
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+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">Todo List </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><dl class="reflist">
+<dt><a class="anchor" id="_todo000001"></a>Page <a class="el" href="xml_partition.html">/azone/partition element</a>  </dt>
+<dd><p class="startdd">this needs verification</p>
+<p>this needs verification</p>
+<p class="enddd">this needs verification</p>
+</dd>
+</dl>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/xml_arzone.html b/docs/Zone/html/xml_arzone.html
new file mode 100644
index 0000000..81669da
--- /dev/null
+++ b/docs/Zone/html/xml_arzone.html
@@ -0,0 +1,142 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>/azone/rzone element</title>
+<title>CMSIS-Zone (Preview): /azone/rzone element</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('xml_arzone.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">/azone/rzone element </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="xml_arzone.html">/azone/rzone element</a> specifies the filename of the related *.rzone file. If this element is omitted the *.azone and *.rzone file have the same base name.</p>
+<p><b>Example</b> </p>
+<div class="fragment"><div class="line">&lt;rzone name=<span class="stringliteral">&quot;MySystem.rzone&quot;</span>&gt;</div>
+</div><!-- fragment --><p> &#160;</p>
+<table  class="cmtable" summary="Element: rzone">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_azone_pg.html">azone</a> </td><td colspan="3"><a class="el" href="xml_azone_pg.html">/azone element</a>  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>name </td><td>Name of the related *.rzone file </td><td>xs:string </td><td>required  </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneFormat.html">Zone Description Format</a></li><li class="navelem"><a class="el" href="xml_azone_pg.html">/azone element</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/xml_azone_pg.html b/docs/Zone/html/xml_azone_pg.html
new file mode 100644
index 0000000..69655f9
--- /dev/null
+++ b/docs/Zone/html/xml_azone_pg.html
@@ -0,0 +1,153 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>/azone element</title>
+<title>CMSIS-Zone (Preview): /azone element</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('xml_azone_pg.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">/azone element </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="xml_azone_pg.html">/azone element</a> element is the root element of the .azone file which stores partitioning of the system or the configuration of a MPU.</p>
+<table  class="cmtable" summary="Root Element: azone">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td>root </td><td colspan="3">Document root  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>schemaVersion </td><td>CMSIS-Zone schema version used for describing the azone file. </td><td>VersionType </td><td>required  </td></tr>
+<tr>
+<td>xmlns:xs </td><td>Is set to: <span class="XML-Token">"http://www.w3.org/2001/XMLSchema-instance"</span> to indicate compliance to the XML format. </td><td>xs:decimal </td><td>required  </td></tr>
+<tr>
+<td>xs:noNamespaceSchemaLocation </td><td>File name of the schema file. For example, <span class="XML-Token">"azone.xsd"</span>. </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
+<tr>
+<td><a class="el" href="xml_arzone.html">rzone</a> </td><td>Reference to rzone file </td><td>RZoneType </td><td>0..1  </td></tr>
+<tr>
+<td><a class="el" href="xml_configure.html">configure</a> </td><td>Control the operation of the CMSIS-Zone utility </td><td>ConfigureType </td><td>0..1   </td></tr>
+<tr>
+<td><a class="el" href="xml_partition.html">partition</a> </td><td>Partition information for memory block splits </td><td>RegionsType </td><td>0..1   </td></tr>
+<tr>
+<td><a class="el" href="xml_zones.html">zones</a> </td><td>Zone assignments of processor, memory, and peripheral resources </td><td>ZonesType </td><td>0..1   </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneFormat.html">Zone Description Format</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/xml_azone_pg.js b/docs/Zone/html/xml_azone_pg.js
new file mode 100644
index 0000000..8120ac5
--- /dev/null
+++ b/docs/Zone/html/xml_azone_pg.js
@@ -0,0 +1,17 @@
+var xml_azone_pg =
+[
+    [ "/azone/rzone element", "xml_arzone.html", null ],
+    [ "/azone/configure element", "xml_configure.html", [
+      [ "/azone/configure/type element", "xml_configure.html#xml_ctype", null ]
+    ] ],
+    [ "/azone/partition element", "xml_partition.html", [
+      [ "/azone/partition/memory element", "xml_partition.html#xml_amemory", null ],
+      [ "/azone/partition/peripheral element", "xml_partition.html#xml_aperipheral", null ],
+      [ "/azone/partition/peripheral/slot element", "xml_partition.html#xml_aslot", null ]
+    ] ],
+    [ "/azone/zones element", "xml_zones.html", [
+      [ "/azone/zones/zone element", "xml_zones.html#xml_zone", null ],
+      [ "/azone/zones/zone/assign element", "xml_zones.html#xml_assign", null ],
+      [ "/azone/zones/zone/assign/interrupt element", "xml_zones.html#xml_ainterrupt", null ]
+    ] ]
+];
\ No newline at end of file
diff --git a/docs/Zone/html/xml_configure.html b/docs/Zone/html/xml_configure.html
new file mode 100644
index 0000000..eabb91a
--- /dev/null
+++ b/docs/Zone/html/xml_configure.html
@@ -0,0 +1,167 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>/azone/configure element</title>
+<title>CMSIS-Zone (Preview): /azone/configure element</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('xml_configure.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">/azone/configure element </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="xml_configure.html">/azone/configure element</a> allows to control the operation of the CMSIS-Zone utility.</p>
+<p><b>Example</b> </p>
+<div class="fragment"><div class="line">&lt;configure mode=<span class="stringliteral">&quot;MPU&quot;</span>&gt;     <span class="comment">// CMSIS-Zone utility UI behavior</span></div>
+<div class="line">  &lt;type name=<span class="stringliteral">&quot;RAM&quot;</span>        hide=<span class="stringliteral">&quot;0&quot;</span> select=<span class="stringliteral">&quot;0&quot;</span> /&gt;</div>
+<div class="line">  &lt;type name=<span class="stringliteral">&quot;ROM&quot;</span>        hide=<span class="stringliteral">&quot;1&quot;</span> select=<span class="stringliteral">&quot;1&quot;</span> /&gt;</div>
+<div class="line">  &lt;type name=<span class="stringliteral">&quot;Peripheral&quot;</span> hide=<span class="stringliteral">&quot;1&quot;</span> select=<span class="stringliteral">&quot;0&quot;</span> /&gt;</div>
+<div class="line">&lt;/configure&gt;</div>
+</div><!-- fragment --><p> &#160;</p>
+<table  class="cmtable" summary="Element: configure">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_azone_pg.html">azone</a> </td><td colspan="3"><a class="el" href="xml_azone_pg.html">/azone element</a>  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>mode </td><td>Operation mode ("Project" or "MPU") </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
+<tr>
+<td><a class="el" href="xml_configure.html#xml_ctype">type</a> </td><td>UI behavior for memory or peripheral selection depending on the operation <em>mode</em>  </td><td>complexType </td><td>0..*  </td></tr>
+</table>
+<h1><a class="anchor" id="xml_ctype"></a>
+/azone/configure/type element</h1>
+<p>The <a class="el" href="xml_configure.html#xml_ctype">/azone/configure/type element</a> defines UI behavior of the CMSIS-Zone utility for a memory or peripheral selection depending on the operation <em>mode</em>.</p>
+<table  class="cmtable" summary="Element: type">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_configure.html">configure</a> </td><td colspan="3"><a class="el" href="xml_configure.html">/azone/configure element</a>  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>name </td><td>Refers item type ("RAM", "ROM", or "Peripheral") that this element specifies. </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>hide </td><td>"1" specifies that the item type is hidden during configuration in the UI of the CMSIS-Zone utility (default is "0"). </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<td>select </td><td>"1" specifies that all resources with the item type are selected (default is "0"). </td><td>xs:boolean </td><td>optional  </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneFormat.html">Zone Description Format</a></li><li class="navelem"><a class="el" href="xml_azone_pg.html">/azone element</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/xml_creator.html b/docs/Zone/html/xml_creator.html
new file mode 100644
index 0000000..80cc737
--- /dev/null
+++ b/docs/Zone/html/xml_creator.html
@@ -0,0 +1,151 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>/rzone/creator element</title>
+<title>CMSIS-Zone (Preview): /rzone/creator element</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('xml_creator.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">/rzone/creator element </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="xml_creator.html">/rzone/creator element</a> specifies how a derived .rzone file was created.</p>
+<table  class="cmtable" summary="Element: device">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_rzone_pg.html">rzone</a> </td><td colspan="3"><a class="el" href="xml_rzone_pg.html">/rzone element</a>  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>tool </td><td>Identification of the tool that generated this *.rzone file. (i.e. "CMSIS-Zone V1.1.0") </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>rzone </td><td>Name of the .rzone file which contained top level resources. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>azone </td><td>Name of the .azone file which contained related assignments. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>zone </td><td>Name of the zone that is represented in this derived .rzone file. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>zone_info </td><td>Brief description of the zone. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>security </td><td><a class="el" href="zoneFormat.html#security">Security</a> setting for this *.rzone file. </td><td><a class="el" href="zoneFormat.html#security">SecurityType</a> </td><td><p class="starttd">optional </p>
+<p class="endtd"></p>
+</td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneFormat.html">Zone Description Format</a></li><li class="navelem"><a class="el" href="xml_rzone_pg.html">/rzone element</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/xml_device.html b/docs/Zone/html/xml_device.html
new file mode 100644
index 0000000..f470748
--- /dev/null
+++ b/docs/Zone/html/xml_device.html
@@ -0,0 +1,207 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>/rzone/device element</title>
+<title>CMSIS-Zone (Preview): /rzone/device element</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('xml_device.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">/rzone/device element </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="xml_device.html">/rzone/device element</a> specifies the device of the system that integrates the processors.</p>
+<table  class="cmtable" summary="Element: device">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_rzone_pg.html">rzone</a> </td><td colspan="3"><a class="el" href="xml_rzone_pg.html">/rzone element</a>  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>Dvendor </td><td>The devices vendor identifier. </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>Dname </td><td>Specifies the name of the device. Only alphabetical characters, decimal digits, '-' and '_' are allowed. </td><td>RestrictedString </td><td>required  </td></tr>
+<tr>
+<td>info </td><td>Brief description of the device. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
+<tr>
+<td><a class="el" href="xml_device.html#xml_package">package</a> </td><td>Optional reference to the Software Pack this device is provided by. </td><td>complexType </td><td>0..1  </td></tr>
+<tr>
+<td><a class="el" href="xml_device.html#xml_processor">processor</a> </td><td>Processing elements and associated features embedded in the device. </td><td>complexType </td><td>1..*  </td></tr>
+</table>
+<h1><a class="anchor" id="xml_package"></a>
+/rzone/device/package element</h1>
+<p>The <a class="el" href="xml_device.html#xml_package">/rzone/device/package element</a> refers to the Software Pack that provides the Device Family Pack (DFP) for the <a class="el" href="xml_device.html">device</a>.</p>
+<table  class="cmtable" summary="Element: package">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_device.html">device</a> </td><td colspan="3"><a class="el" href="xml_device.html">/rzone/device element</a>  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>name </td><td>The unique pack name. </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>url </td><td>The URL the pack can be obtained from. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>vendor </td><td>The pack vendor name. </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>version </td><td>The pack version. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>info </td><td>Brief description of the Software Pack. </td><td>xs:string </td><td>optional  </td></tr>
+</table>
+<h1><a class="anchor" id="xml_processor"></a>
+/rzone/device/processor element</h1>
+<p>The <a class="el" href="xml_device.html#xml_processor">/rzone/device/processor element</a> defines the processing elements integrated in the <a class="el" href="xml_device.html">device</a>. The information in this element is identical with CMSIS-Pack, except that it provides an additional 'info' attribute.</p>
+<table  class="cmtable" summary="Element: processor">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_device.html">device</a> </td><td colspan="3"><a class="el" href="xml_device.html">/rzone/device element</a>  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>Pname </td><td>Processor identifier. This attribute <b>is mandatory for devices that embed multiple processors</b>.  </td><td>RestrictedString </td><td>required for all multi-core devices  </td></tr>
+<tr>
+<td>Punits </td><td>Specifies the number of processor units in a symmetric multi-processor core (MPCore). Defaults to single-core CPU (<span class="XML-Token">1</span>) when left empty. </td><td>InstancesType </td><td>required for all multi-core devices  </td></tr>
+<tr>
+<td>Dcore </td><td>Specifies the processor core. </td><td>DcoreEnum </td><td>required  </td></tr>
+<tr>
+<td>Dfpu </td><td>Specifies whether a hardware Floating Point Unit is present in the processor. </td><td>DfpuEnum </td><td>required  </td></tr>
+<tr>
+<td>Dmpu </td><td>Specifies whether a Memory Protection Unit is present in the processor. </td><td>DmpuEnum </td><td>required  </td></tr>
+<tr>
+<td>Dtz </td><td>Specifies whether an Armv8-M based device implements TrustZone. </td><td>DtzEnum </td><td>required for ARMv8-M based devices  </td></tr>
+<tr>
+<td>Ddsp </td><td>Specifies whether a device supports the DSP instructions set. </td><td>DdspEnum </td><td>required  </td></tr>
+<tr>
+<td>Dendian </td><td>Specifies the endianess of the processor. </td><td>DendianEnum </td><td>required  </td></tr>
+<tr>
+<td>Dclock </td><td>Specifies the max clock frequency of the processor subsystem </td><td>xs:unsignedInt </td><td>required  </td></tr>
+<tr>
+<td>DcoreVersion </td><td>Hardware revision of the processor core </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>DnumInterrupts </td><td>Number of NVIC interrupt sources available to the processor core (excludes exception vectors). </td><td>NonNegativeInteger </td><td>optional  </td></tr>
+<tr>
+<td>DnumSauRegions </td><td>Number of regions in the Security Attribution Unit (SAU) of the processor core. </td><td>NonNegativeInteger </td><td>optional  </td></tr>
+<tr>
+<td>info </td><td>Brief description of the processor. </td><td>xs:string </td><td>optional  </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneFormat.html">Zone Description Format</a></li><li class="navelem"><a class="el" href="xml_rzone_pg.html">/rzone element</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/xml_memories.html b/docs/Zone/html/xml_memories.html
new file mode 100644
index 0000000..ec2cb96
--- /dev/null
+++ b/docs/Zone/html/xml_memories.html
@@ -0,0 +1,232 @@
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+     onmouseover="return searchBox.OnSearchSelectShow()"
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+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
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+<div class="header">
+  <div class="headertitle">
+<div class="title">/rzone/resources/memories element </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="xml_memories.html">/rzone/resources/memories element</a> contains:</p>
+<ul>
+<li>a list of all memory regions available in this system.</li>
+<li>a list of all Memory Protection Controllers (MPC) in this system. Some memory region or MPC might restrict the availability to specific processors.</li>
+</ul>
+<p><b>Example</b> </p>
+<div class="fragment"><div class="line">&lt;resources&gt;</div>
+<div class="line">  &lt;memories&gt;</div>
+<div class="line">    &lt;memory name=<span class="stringliteral">&quot;ExtMem1&quot;</span>    start=<span class="stringliteral">&quot;0x00000000&quot;</span> physical=<span class="stringliteral">&quot;0x00000000&quot;</span> size=<span class="stringliteral">&quot;0x00010000&quot;</span> access=<span class="stringliteral">&quot;rwx&quot;</span> security=<span class="stringliteral">&quot;&quot;</span>  type=<span class="stringliteral">&quot;RAM&quot;</span> info=<span class="stringliteral">&quot;External memory 1 / remap&quot;</span> external=<span class="stringliteral">&quot;true&quot;</span> /&gt;</div>
+<div class="line">    &lt;memory name=<span class="stringliteral">&quot;Flash_NS&quot;</span>   start=<span class="stringliteral">&quot;0x08000000&quot;</span>                       size=<span class="stringliteral">&quot;0x00080000&quot;</span> access=<span class="stringliteral">&quot;rx&quot;</span>  security=<span class="stringliteral">&quot;&quot;</span>  type=<span class="stringliteral">&quot;ROM&quot;</span> info=<span class="stringliteral">&quot;Flash Memory (non secure)&quot;</span>                 /&gt;</div>
+<div class="line">    &lt;mpc    name=<span class="stringliteral">&quot;IOTKIT_MPCSSRAM0&quot;</span> start=<span class="stringliteral">&quot;0x08000000&quot;</span>                 size=<span class="stringliteral">&quot;0x00100000&quot;</span> type=<span class="stringliteral">&quot;sp&quot;</span>    blk_size=<span class="stringliteral">&quot;0x20000&quot;</span>      info=<span class="stringliteral">&quot;MPC for extended Flash&quot;</span>                    /&gt;</div>
+<div class="line">    &lt;memory name=<span class="stringliteral">&quot;Flash_S&quot;</span>    start=<span class="stringliteral">&quot;0x0c000000&quot;</span> physical=<span class="stringliteral">&quot;0x08001000&quot;</span> size=<span class="stringliteral">&quot;0x00080000&quot;</span> access=<span class="stringliteral">&quot;rx&quot;</span>  security=<span class="stringliteral">&quot;c&quot;</span> type=<span class="stringliteral">&quot;ROM&quot;</span> info=<span class="stringliteral">&quot;Flash Memory (secure)&quot;</span>                     /&gt;</div>
+<div class="line"></div>
+<div class="line">    &lt;memory name=<span class="stringliteral">&quot;SRAM1_C_NS&quot;</span> start=<span class="stringliteral">&quot;0x0A000000&quot;</span>                       size=<span class="stringliteral">&quot;0x00030000&quot;</span> access=<span class="stringliteral">&quot;rwx&quot;</span> security=<span class="stringliteral">&quot;&quot;</span>  type=<span class="stringliteral">&quot;RAM&quot;</span> info=<span class="stringliteral">&quot;SRAM1 Code (non secure)&quot;</span>   /&gt;</div>
+<div class="line">    &lt;memory name=<span class="stringliteral">&quot;SRAM1_C_S&quot;</span>  start=<span class="stringliteral">&quot;0x0E000000&quot;</span> physical=<span class="stringliteral">&quot;0x0A000000&quot;</span> size=<span class="stringliteral">&quot;0x00030000&quot;</span> access=<span class="stringliteral">&quot;rwx&quot;</span> security=<span class="stringliteral">&quot;c&quot;</span> type=<span class="stringliteral">&quot;RAM&quot;</span> info=<span class="stringliteral">&quot;SRAM1 Code (secure)&quot;</span>       /&gt;</div>
+<div class="line">    &lt;memory name=<span class="stringliteral">&quot;SRAM1_S&quot;</span>    start=<span class="stringliteral">&quot;0x30000000&quot;</span> physical=<span class="stringliteral">&quot;0x0A000000&quot;</span> size=<span class="stringliteral">&quot;0x00030000&quot;</span> access=<span class="stringliteral">&quot;rw&quot;</span>  security=<span class="stringliteral">&quot;s&quot;</span> type=<span class="stringliteral">&quot;RAM&quot;</span> info=<span class="stringliteral">&quot;SRAM1 (secure)&quot;</span>            /&gt;</div>
+<div class="line">    &lt;memory name=<span class="stringliteral">&quot;SRAM1_NS&quot;</span>   start=<span class="stringliteral">&quot;0x20000000&quot;</span> physical=<span class="stringliteral">&quot;0x0A000000&quot;</span> size=<span class="stringliteral">&quot;0x00030000&quot;</span> access=<span class="stringliteral">&quot;rw&quot;</span>  security=<span class="stringliteral">&quot;&quot;</span>  type=<span class="stringliteral">&quot;RAM&quot;</span> info=<span class="stringliteral">&quot;SRAM1 (non secure)&quot;</span>        /&gt;</div>
+<div class="line"></div>
+<div class="line">    &lt;memory name=<span class="stringliteral">&quot;FMC_Bank1&quot;</span>  start=<span class="stringliteral">&quot;0x60000000&quot;</span>                       size=<span class="stringliteral">&quot;0x00000000&quot;</span> access=<span class="stringliteral">&quot;rw&quot;</span> security=<span class="stringliteral">&quot;&quot;</span>   type=<span class="stringliteral">&quot;RAM&quot;</span> info=<span class="stringliteral">&quot;Memory Controller bank 1&quot;</span>  /&gt;</div>
+<div class="line">  &lt;/memories&gt;</div>
+<div class="line">  :</div>
+<div class="line">&lt;/resources&gt;</div>
+</div><!-- fragment --><table  class="cmtable" summary="Element: memories">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_resources.html">resources</a> </td><td colspan="3"><a class="el" href="xml_resources.html">/rzone/resources element</a>  </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
+<tr>
+<td><a class="el" href="xml_memories.html#xml_rmemory">memory</a> </td><td>Lists a logical memory region with physical mapping. Memory might restricted to processors, access, or security modes. </td><td>complexType </td><td>0..1  </td></tr>
+<tr>
+<td><a class="el" href="xml_memories.html#xml_rmpc">mpc</a> </td><td>Specifies a Memory Protection Controller (MPC) for a physical address range. </td><td>complexType </td><td>0..1  </td></tr>
+</table>
+<h1><a class="anchor" id="xml_rmemory"></a>
+/rzone/resources/memories/memory element</h1>
+<p>The <a class="el" href="xml_memories.html#xml_rmemory">/rzone/resources/memories/memory element</a> lists a logical memory region with physical mapping. Memory might restricted to processors, access, or security modes.</p>
+<table  class="cmtable" summary="Element: memory">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_memories.html">memories</a> </td><td colspan="3"><a class="el" href="xml_memories.html">/rzone/resources/memories element</a>  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>name </td><td>The name of this memory region which must be unique in this *.rzone file. </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>type </td><td>The type of memory in this region ("RAM" or "ROM"). </td><td>PhysicalTypeEnum </td><td>required  </td></tr>
+<tr>
+<td>start </td><td>The logical start address of the memory region in the address map. </td><td>NonNegativeInteger </td><td>required  </td></tr>
+<tr>
+<td>physical </td><td>The physical start address of the memory region in the address map. If physical is not specified the start address value is used. </td><td>NonNegativeInteger </td><td>optional  </td></tr>
+<tr>
+<td>size </td><td>The size of the memory region in bytes. </td><td>NonNegativeInteger </td><td>required  </td></tr>
+<tr>
+<td>access </td><td><a class="el" href="zoneFormat.html#access">Access</a> permissions for this memory region. </td><td><a class="el" href="zoneFormat.html#access">AccessType</a> </td><td>optional  </td></tr>
+<tr>
+<td>security </td><td><a class="el" href="zoneFormat.html#security">Security</a> attributes for this memory region. </td><td><a class="el" href="zoneFormat.html#security">SecurityType</a> </td><td>optional  </td></tr>
+<tr>
+<td>privilege </td><td><a class="el" href="zoneFormat.html#privilege">Privilege level</a> for this memory region. </td><td><a class="el" href="zoneFormat.html#privilege">PrivilegeType</a> </td><td>optional  </td></tr>
+<tr>
+<td>startup </td><td>"1" specifies that this region is used for the startup code of the application. Default value is "0". </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<td>uninit </td><td>"1" specifies that this region is not zero initialized during startup. Default value is "0". </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<td>shared </td><td>"1" specifies that this region is used by multiple zones. Default value is "0". </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<td>dma </td><td>"1" specifies that this region is accessed by a DMA controller. Default value is "0". </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<td>external </td><td>"1" specifies that this region is provided by an external component that is not part of the device. Default value is "0". </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<td>Pname </td><td>The processor that can access this memory region. If omitted all processors of the system have access. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>info </td><td>Brief description of the memory region. </td><td>xs:string </td><td>optional  </td></tr>
+</table>
+<h1><a class="anchor" id="xml_rmpc"></a>
+/rzone/resources/memories/mpc element</h1>
+<p>The <a class="el" href="xml_memories.html#xml_rmpc">/rzone/resources/memories/mpc element</a> element specifies a Memory Protection Controller (MPC) for a physical memory address region. The MPC region must not necessarily overlap a physical memory space which means it can be larger or smaller.</p>
+<table  class="cmtable" summary="Element: mpc">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_memories.html">memories</a> </td><td colspan="3"><a class="el" href="xml_memories.html">/rzone/resources/memories element</a>  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>name </td><td>The base register name of the MPC. </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>start </td><td>The physical start address of the memory address region that is protected by the MPC. </td><td>NonNegativeInteger </td><td>required  </td></tr>
+<tr>
+<td>size </td><td>The size of the memory address region in bytes. </td><td>NonNegativeInteger </td><td>required  </td></tr>
+<tr>
+<td>blk_size </td><td>The size (in bytes) of each memory block. This value is also the alignment requirement for the memory blocks. The number of LUT bits is: <em>memory size</em> / <em>blk_size</em>. </td><td>NonNegativeInteger </td><td>required  </td></tr>
+<tr>
+<td>type </td><td>Specifies the permissions that the MPC verifies for the memory access:<br/>
+<ul>
+<li>type="s" : (default) only the Secure attribute is verified.</li>
+<li>type="p" : only the Privileged attribute is verified.</li>
+<li>type="sp" : both the Secure are Privileged attribute are verified. </li>
+</ul>
+</td><td>MpcTypeEnum </td><td>optional  </td></tr>
+<tr>
+<td>info </td><td>Brief description of the memory region. </td><td>xs:string </td><td>optional  </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneFormat.html">Zone Description Format</a></li><li class="navelem"><a class="el" href="xml_rzone_pg.html">/rzone element</a></li><li class="navelem"><a class="el" href="xml_resources.html">/rzone/resources element</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
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diff --git a/docs/Zone/html/xml_partition.html b/docs/Zone/html/xml_partition.html
new file mode 100644
index 0000000..5fae297
--- /dev/null
+++ b/docs/Zone/html/xml_partition.html
@@ -0,0 +1,245 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>/azone/partition element</title>
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+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
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+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
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+
+<div class="header">
+  <div class="headertitle">
+<div class="title">/azone/partition element </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="xml_partition.html">/azone/partition element</a> contains a list of memory partitions that are created with the CMSIS-Zone utility. These memory partitions are based on parent memory definitions specified by <a class="el" href="xml_memories.html">/rzone/resources/memories element</a>.</p>
+<p><b>Example</b> </p>
+<div class="fragment"><div class="line">&lt;partition&gt;</div>
+<div class="line">  &lt;memory parent=<span class="stringliteral">&quot;Flash_NS&quot;</span> name=<span class="stringliteral">&quot;ROM_NS&quot;</span> offset=<span class="stringliteral">&quot;0x00000000&quot;</span> size=<span class="stringliteral">&quot;0x40000&quot;</span> fixed=<span class="stringliteral">&quot;1&quot;</span> access=<span class="stringliteral">&quot;rx&quot;</span> info=<span class="stringliteral">&quot;application code&quot;</span> /&gt;</div>
+<div class="line">  &lt;memory parent=<span class="stringliteral">&quot;Flash_S&quot;</span>  name=<span class="stringliteral">&quot;ROM_S&quot;</span>  offset=<span class="stringliteral">&quot;0x00040000&quot;</span> size=<span class="stringliteral">&quot;0x40000&quot;</span> access=<span class="stringliteral">&quot;x&quot;</span>  info=<span class="stringliteral">&quot;boot code /&gt;</span></div>
+<div class="line"><span class="stringliteral">  &lt;memory parent=&quot;</span>SRAM1_NS<span class="stringliteral">&quot; name=&quot;</span>RAM_NS<span class="stringliteral">&quot; offset=&quot;</span>0x00000000<span class="stringliteral">&quot; size=&quot;</span>0x20000<span class="stringliteral">&quot; /&gt;</span></div>
+<div class="line"><span class="stringliteral">  &lt;memory parent=&quot;</span>SRAM1_S<span class="stringliteral">&quot;  name=&quot;</span>RAM_S<span class="stringliteral">&quot;  offset=&quot;</span>0x00010000<span class="stringliteral">&quot; size=&quot;</span>0x20000<span class="stringliteral">&quot; /&gt;</span></div>
+<div class="line"><span class="stringliteral">&lt;/partition&gt;</span></div>
+</div><!-- fragment --><p> &#160;</p>
+<table  class="cmtable" summary="Element: partition">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_azone_pg.html">azone</a> </td><td colspan="3"><a class="el" href="xml_azone_pg.html">/azone element</a>  </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
+<tr>
+<td><a class="el" href="xml_partition.html#xml_amemory">memory</a> </td><td>Defines a new memory sub-region that is related to a parent region in the *.rzone file. </td><td>complexType </td><td>0..*  </td></tr>
+<tr>
+<td><a class="el" href="xml_partition.html#xml_aperipheral">peripheral</a> </td><td>Defines a settings for a peripheral. </td><td>complexType </td><td>0..*  </td></tr>
+</table>
+<h1><a class="anchor" id="xml_amemory"></a>
+/azone/partition/memory element</h1>
+<p>The <a class="el" href="xml_partition.html#xml_amemory">/azone/partition/memory element</a> defines a new memory sub-region that is related to a parent region in the *.rzone file.</p>
+<dl class="todo"><dt><b><a class="el" href="todo.html#_todo000001">Todo:</a></b></dt><dd>this needs verification</dd></dl>
+<table  class="cmtable" summary="Element: memory">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_partition.html">partition</a> </td><td colspan="3"><a class="el" href="xml_partition.html">/azone/partition element</a>  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>parent </td><td>The name of the parent region in the related *.rzone file. </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>name </td><td>The name of a new memory partition. </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>size </td><td>The physical memory size this block allocates. </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>offset </td><td>The address offset of this memory partition. If fixed="1" the memory block cannot be re-ordered within the region. </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>access </td><td><a class="el" href="zoneFormat.html#access">Access</a> permissions for this memory block. </td><td><a class="el" href="zoneFormat.html#access">AccessType</a> </td><td>optional  </td></tr>
+<tr>
+<td>security </td><td><a class="el" href="zoneFormat.html#security">Security</a> attributes for this memory block. </td><td><a class="el" href="zoneFormat.html#security">SecurityType</a> </td><td>optional  </td></tr>
+<tr>
+<td>privilege </td><td><a class="el" href="zoneFormat.html#privilege">Privilege level</a> for this memory block. </td><td><a class="el" href="zoneFormat.html#privilege">PrivilegeType</a> </td><td>optional  </td></tr>
+<tr>
+<td>startup </td><td>"1" specifies that this region is used for the startup code of the application. Default value is "0". </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<td>fixed </td><td>"1" indicates a fixed offset within that region. "0" (default) allows to re-arrange the block within the region. </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<td>uninit </td><td>"1" specifies that this region is not zero initialized during startup. Default value is "0". </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<td>shared </td><td>"1" specifies that this region is used by multiple zones. Default value is "0". </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<td>dma </td><td>"1" specifies that this region is accessed by a DMA controller. Default value is "0". </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<td>Pname </td><td>The processor that can access this memory region. If omitted all processors of the system have access. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>info </td><td>Brief description of the memory block. </td><td>xs:string </td><td>optional  </td></tr>
+</table>
+<h1><a class="anchor" id="xml_aperipheral"></a>
+/azone/partition/peripheral element</h1>
+<p>The <a class="el" href="xml_partition.html#xml_aperipheral">/azone/partition/peripheral element</a> defines settings for a peripheral in a related *.rzone file.</p>
+<dl class="todo"><dt><b><a class="el" href="todo.html#_todo000002">Todo:</a></b></dt><dd>this needs verification</dd></dl>
+<table  class="cmtable" summary="Element: peripheral">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_partition.html">partition</a> </td><td colspan="3"><a class="el" href="xml_partition.html">/azone/partition element</a>  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>name </td><td>The name of the peripheral. The combination group / name must be be unique within a processor (specified by Pname). </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>group </td><td>The group name of the peripheral. The combination group / name must be be unique within a processor (specified by Pname). </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>start </td><td>The logical start address of the peripheral in both secure and non-secure mode. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>start_s </td><td>The logical start address of the peripheral in secure mode. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>start_ns </td><td>The logical start address of the peripheral in non-secure mode. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>shared </td><td>"1" specifies that this peripheral group is used by multiple zones. Default value is "0". </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<td>dma </td><td>"1" specifies that this peripheral group is accessed by a DMA controller. Default value is "0". </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<td>external </td><td>"1" specifies that this peripheral is provided by an external component that is not part of the device. Default value is "0". </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<td>access </td><td><a class="el" href="zoneFormat.html#access">Access</a> permissions for this peripheral. </td><td><a class="el" href="zoneFormat.html#access">AccessType</a> </td><td>optional  </td></tr>
+<tr>
+<td>security </td><td><a class="el" href="zoneFormat.html#security">Security</a> attributes for this peripheral. </td><td><a class="el" href="zoneFormat.html#security">SecurityType</a> </td><td>optional  </td></tr>
+<tr>
+<td>privilege </td><td><a class="el" href="zoneFormat.html#privilege">Privilege level</a> for this peripheral. </td><td><a class="el" href="zoneFormat.html#privilege">PrivilegeType</a> </td><td>optional  </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
+<tr>
+<td><a class="el" href="xml_partition.html#xml_aslot">slot</a> </td><td>Defines a settings for a slot. </td><td>complexType </td><td>0..*  </td></tr>
+</table>
+<h1><a class="anchor" id="xml_aslot"></a>
+/azone/partition/peripheral/slot element</h1>
+<p>The <a class="el" href="xml_partition.html#xml_aslot">/azone/partition/peripheral/slot element</a> defines settings for a slot in a related *.rzone file.</p>
+<dl class="todo"><dt><b><a class="el" href="todo.html#_todo000003">Todo:</a></b></dt><dd>this needs verification</dd></dl>
+<table  class="cmtable" summary="Element: slot">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_partition.html#xml_aperipheral">peripheral</a> </td><td colspan="3"><a class="el" href="xml_partition.html#xml_aperipheral">/azone/partition/peripheral element</a>  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>name </td><td>The name of the slot. The combination group / peripheral / name must be be unique within a processor (specified by Pname). </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>secure </td><td>Overwrites the setting of the secure attribute in the *.rzone file. </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<td>privilege </td><td>Overwrites the setting of the privilege attribute in the *.rzone file. </td><td>xs:boolean </td><td>optional  </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneFormat.html">Zone Description Format</a></li><li class="navelem"><a class="el" href="xml_azone_pg.html">/azone element</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
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+</html>
diff --git a/docs/Zone/html/xml_peripherals.html b/docs/Zone/html/xml_peripherals.html
new file mode 100644
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+++ b/docs/Zone/html/xml_peripherals.html
@@ -0,0 +1,332 @@
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+<title>/rzone/resources/peripherals element</title>
+<title>CMSIS-Zone (Preview): /rzone/resources/peripherals element</title>
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+   &#160;<span id="projectnumber">Version 0.9.2</span>
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+   <div id="projectbrief">System Resource Management</div>
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+  <div class="headertitle">
+<div class="title">/rzone/resources/peripherals element </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="xml_peripherals.html">/rzone/resources/peripherals element</a> contains a list of all peripherals available in the system. It also restricts the availability to specific processors or security modes.</p>
+<p><b>Example</b> </p>
+<div class="fragment"><div class="line">&lt;resources&gt;</div>
+<div class="line">  :</div>
+<div class="line">  &lt;peripherals&gt;</div>
+<div class="line">    &lt;peripheral name=<span class="stringliteral">&quot;ADC0&quot;</span> start=<span class="stringliteral">&quot;0x40080000&quot;</span> size=<span class="stringliteral">&quot;0x1000&quot;</span> access=<span class="stringliteral">&quot;rwp&quot;</span> info=<span class="stringliteral">&quot;Analog/Digital Converter 0 (12-bit)&quot;</span>/&gt;</div>
+<div class="line">    :</div>
+<div class="line">    &lt;group name=<span class="stringliteral">&quot;TIM&quot;</span> info=<span class="stringliteral">&quot;Timer Group&quot;</span>&gt;</div>
+<div class="line">      &lt;peripheral name=<span class="stringliteral">&quot;TIM1&quot;</span>      start_ns=<span class="stringliteral">&quot;0x40012c00&quot;</span> start_s=<span class="stringliteral">&quot;0x50012c00&quot;</span> size=<span class="stringliteral">&quot;0x400&quot;</span> access=<span class="stringliteral">&quot;rw&quot;</span>&gt;</div>
+<div class="line">        &lt;interrupt name=<span class="stringliteral">&quot;TIM1_BRK&quot;</span> irqn=<span class="stringliteral">&quot;41&quot;</span> info=<span class="stringliteral">&quot;Timer 1 Break&quot;</span>/&gt;</div>
+<div class="line">        &lt;interrupt name=<span class="stringliteral">&quot;TIM1_UP&quot;</span>  irqn=<span class="stringliteral">&quot;42&quot;</span> info=<span class="stringliteral">&quot;Timer 1 Update&quot;</span>/&gt;</div>
+<div class="line">        &lt;interrupt name=<span class="stringliteral">&quot;TIM1_BRK&quot;</span> irqn=<span class="stringliteral">&quot;43&quot;</span> info=<span class="stringliteral">&quot;Timer 1 Trigger and Commutation&quot;</span>/&gt;</div>
+<div class="line">        &lt;interrupt name=<span class="stringliteral">&quot;TIM1_CC&quot;</span>  irqn=<span class="stringliteral">&quot;44&quot;</span> info=<span class="stringliteral">&quot;Timer 1 Capture and Compare&quot;</span>/&gt;</div>
+<div class="line">      &lt;/peripheral&gt;</div>
+<div class="line">      &lt;peripheral  name=<span class="stringliteral">&quot;TIM2&quot;</span>    start_ns=<span class="stringliteral">&quot;0x40000000&quot;</span> start_s=<span class="stringliteral">&quot;0x50000000&quot;</span> size=<span class="stringliteral">&quot;0x400&quot;</span> access=<span class="stringliteral">&quot;rw&quot;</span>&gt;</div>
+<div class="line">        &lt;interrupt name=<span class="stringliteral">&quot;TIM2&quot;</span>    irqn=<span class="stringliteral">&quot;45&quot;</span> info=<span class="stringliteral">&quot;Timer2 Global Interrupt&quot;</span>/&gt;</div>
+<div class="line">      &lt;/peripheral&gt;</div>
+<div class="line">    &lt;/group&gt;</div>
+<div class="line">  &lt;/peripherals&gt;</div>
+<div class="line">&lt;/resources&gt;</div>
+</div><!-- fragment --><p> &#160;</p>
+<table  class="cmtable" summary="Element: peripherals">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_resources.html">resources</a> </td><td colspan="3"><a class="el" href="xml_resources.html">/rzone/resources element</a>  </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
+<tr>
+<td><a class="el" href="xml_peripherals.html#xml_group">group</a> </td><td>Logical grouping of peripherals. </td><td>complexType </td><td>0..*  </td></tr>
+<tr>
+<td><a class="el" href="xml_peripherals.html#xml_peripheral">peripheral</a> </td><td>Peripheral definitions. </td><td>complexType </td><td>0..*  </td></tr>
+</table>
+<h1><a class="anchor" id="xml_group"></a>
+/rzone/resources/peripherals/group element</h1>
+<p>The <a class="el" href="xml_peripherals.html#xml_group">/rzone/resources/peripherals/group element</a> can be used to logically group peripherals according to functionality or bus topology.</p>
+<table  class="cmtable" summary="Element: group">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_peripherals.html">peripherals</a> </td><td colspan="3"><a class="el" href="xml_peripherals.html">/rzone/resources/peripherals element</a>  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>name </td><td>The name for the peripheral group must be be unique within a processor (specified by Pname). </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>start </td><td>The logical start address of the peripheral group in both secure and non-secure mode. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>start_s </td><td>The logical start address of the peripheral group in secure mode. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>start_ns </td><td>The logical start address of the peripheral group in non-secure mode. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>physical </td><td>The physical start address of the peripheral group. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>size </td><td>The physical size of the peripheral group in bytes. </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>shared </td><td>"1" specifies that this peripheral group is used by multiple zones. Default value is "0". </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<td>dma </td><td>"1" specifies that this peripheral group is accessed by a DMA controller. Default value is "0". </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<td>external </td><td>"1" specifies that this peripheral group is provided by an external component that is not part of the device. Default value is "0". </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<td>Pname </td><td>The processor that can access this peripheral group. If omitted all processors of the system have access. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>access </td><td><a class="el" href="zoneFormat.html#access">Access</a> permissions for this peripheral group. </td><td><a class="el" href="zoneFormat.html#access">AccessType</a> </td><td>optional  </td></tr>
+<tr>
+<td>security </td><td><a class="el" href="zoneFormat.html#security">Security</a> attributes for this peripheral group. </td><td><a class="el" href="zoneFormat.html#security">SecurityType</a> </td><td>optional  </td></tr>
+<tr>
+<td>privilege </td><td><a class="el" href="zoneFormat.html#privilege">Privilege level</a> for this peripheral group. </td><td><a class="el" href="zoneFormat.html#privilege">PrivilegeType</a> </td><td>optional  </td></tr>
+<tr>
+<td>info </td><td>Brief description of the peripheral group. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
+<tr>
+<td><a class="el" href="xml_peripherals.html#xml_peripheral">peripheral</a> </td><td>Peripheral definitions. </td><td>complexType </td><td>0..*  </td></tr>
+<tr>
+<td><a class="el" href="xml_peripherals.html#xml_p_setup">setup</a> </td><td>Setup information for the peripheral group. </td><td>complexType </td><td>0..*  </td></tr>
+</table>
+<h1><a class="anchor" id="xml_peripheral"></a>
+/rzone/resources/peripherals/.../peripheral element</h1>
+<p>The <a class="el" href="xml_peripherals.html#xml_peripheral">/rzone/resources/peripherals/.../peripheral element</a> is used to define an address mapping for one peripheral.</p>
+<table  class="cmtable" summary="Element: peripheral">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_peripherals.html">peripherals</a> </td><td colspan="3"><a class="el" href="xml_peripherals.html">/rzone/resources/peripherals element</a>  </td></tr>
+<tr>
+<td><a class="el" href="xml_peripherals.html#xml_group">group</a> </td><td colspan="3"><a class="el" href="xml_peripherals.html#xml_group">/rzone/resources/peripherals/group element</a>  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>name </td><td>The name of the peripheral. The combination group / name must be be unique within a processor (specified by Pname). </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>start </td><td>The logical start address of the peripheral in both secure and non-secure mode. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>start_s </td><td>The logical start address of the peripheral in secure mode. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>start_ns </td><td>The logical start address of the peripheral in non-secure mode. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>physcial </td><td>The physical start address of the peripheral. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>offset </td><td>Specifies an offset for the peripheral for the <a class="el" href="xml_peripherals.html#xml_group">/rzone/resources/peripherals/group element</a> values. The values <em>start</em>, <em>start_s</em>, <em>start_ns</em>, <em>physical</em> are taken from the <a class="el" href="xml_peripherals.html#xml_group">/rzone/resources/peripherals/group element</a> element if not overwritten. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>size </td><td>The physical size of the peripheral in bytes. </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>shared </td><td>"1" specifies that this peripheral group is used by multiple zones. Default value is "0". </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<td>dma </td><td>"1" specifies that this peripheral group is accessed by a DMA controller. Default value is "0". </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<td>external </td><td>"1" specifies that this peripheral is provided by an external component that is not part of the device. Default value is "0". </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<td>Pname </td><td>The processor that can access this peripheral. If omitted all processors of the system have access. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>access </td><td><a class="el" href="zoneFormat.html#access">Access</a> permissions for this peripheral. </td><td><a class="el" href="zoneFormat.html#access">AccessType</a> </td><td>optional  </td></tr>
+<tr>
+<td>security </td><td><a class="el" href="zoneFormat.html#security">Security</a> attributes for this peripheral. </td><td><a class="el" href="zoneFormat.html#security">SecurityType</a> </td><td>optional  </td></tr>
+<tr>
+<td>privilege </td><td><a class="el" href="zoneFormat.html#privilege">Privilege level</a> for this peripheral. </td><td><a class="el" href="zoneFormat.html#privilege">PrivilegeType</a> </td><td>optional  </td></tr>
+<tr>
+<td>info </td><td>Brief description of the peripheral. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>slot_name </td><td>Attribute name of the slot (i.e. Pins or Channels). Used in context menu or dialog heading. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>slot_type </td><td>Specifies the values that are configured for the slots:<br/>
+<ul>
+<li>type="s" : (default) only the secure attribute is configured.</li>
+<li>type="p" : only the Privileged attribute is configured.</li>
+<li>type="sp" : both the Secure are Privileged attribute are configured. </li>
+</ul>
+</td><td>SlotTypeEnum </td><td>optional  </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
+<tr>
+<td><a class="el" href="xml_peripherals.html#xml_slot">slot</a> </td><td>Configuration of security or privileged attribute for slots (typically channels or pins). </td><td>complexType </td><td>0..*  </td></tr>
+<tr>
+<td><a class="el" href="xml_peripherals.html#xml_interrupt">interrupt</a> </td><td>Interrupts generated by this peripheral. </td><td>complexType </td><td>0..*  </td></tr>
+<tr>
+<td><a class="el" href="xml_peripherals.html#xml_p_setup">setup</a> </td><td>Setup information for the peripheral. </td><td>complexType </td><td>0..*  </td></tr>
+</table>
+<h1><a class="anchor" id="xml_slot"></a>
+/rzone/resources/peripherals/.../peripheral/slot element</h1>
+<p>The <a class="el" href="xml_peripherals.html#xml_slot">/rzone/resources/peripherals/.../peripheral/slot element</a> is specific to a channel or pin of a peripheral. It specifies the configuration for interrupts or setup registers that belong to that slot (which is typically a channels or pins).</p>
+<table  class="cmtable" summary="Element: interrupt">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_peripherals.html#xml_peripheral">peripheral</a> </td><td colspan="3"><a class="el" href="xml_peripherals.html#xml_peripheral">/rzone/resources/peripherals/.../peripheral element</a>  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>name </td><td>The name of the slot (typically channel or pin name). </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>secure </td><td>Setting of the secure attribute (default="0"). </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<td>privilege </td><td>Setting of the privilege attribute (default="0"). </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
+<tr>
+<td><a class="el" href="xml_peripherals.html#xml_interrupt">interrupt</a> </td><td>Interrupts generated by this peripheral. </td><td>complexType </td><td>0..*  </td></tr>
+<tr>
+<td><a class="el" href="xml_peripherals.html#xml_p_setup">setup</a> </td><td>Setup information for the peripheral. </td><td>complexType </td><td>0..*  </td></tr>
+</table>
+<h1><a class="anchor" id="xml_interrupt"></a>
+/rzone/resources/peripherals/.../interrupt element</h1>
+<p>The <a class="el" href="xml_peripherals.html#xml_interrupt">/rzone/resources/peripherals/.../interrupt element</a> defines the interrupts that are generated by a peripheral or slot.</p>
+<table  class="cmtable" summary="Element: interrupt">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_peripherals.html#xml_peripheral">peripheral</a> </td><td colspan="3"><a class="el" href="xml_peripherals.html#xml_peripheral">/rzone/resources/peripherals/.../peripheral element</a>  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>name </td><td>The name of the interrupt. </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>irqn </td><td>The interrupt number. </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>info </td><td>Brief description of the peripheral. </td><td>xs:string </td><td>optional  </td></tr>
+</table>
+<h1><a class="anchor" id="xml_p_setup"></a>
+/rzone/resources/peripherals/.../setup element</h1>
+<p>The <a class="el" href="xml_peripherals.html#xml_p_setup">/rzone/resources/peripherals/.../setup element</a> defines the setup information for this peripheral, slot, or peripheral group. The attributes <em>security</em> and <em>privilege</em> specifies conditions. When the peripheral is specified for on the the conditions, the <em>value</em> is assigned to the <em>register</em> name (with an optional <em>index</em>).</p>
+<table  class="cmtable" summary="Element: peripheral">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_peripherals.html#xml_peripheral">peripheral</a> </td><td colspan="3"><a class="el" href="xml_peripherals.html#xml_peripheral">/rzone/resources/peripherals/.../peripheral element</a>  </td></tr>
+<tr>
+<td><a class="el" href="xml_peripherals.html#xml_group">group</a> </td><td colspan="3"><a class="el" href="xml_peripherals.html#xml_group">/rzone/resources/peripherals/group element</a>  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>name </td><td>The name of the register. </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>index </td><td>An index value for the register. </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>value </td><td>The value that should be written to the register when the <em>security</em> or <em>privilege</em> condition matches with the peripheral configuration. </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>security </td><td><a class="el" href="zoneFormat.html#security">Security</a> condition for this setup value. Security can be "s" or "n". When a peripheral matches that security setting the value will be written. </td><td><a class="el" href="zoneFormat.html#security">SecurityType</a> </td><td>optional  </td></tr>
+<tr>
+<td>privilege </td><td><a class="el" href="zoneFormat.html#privilege">Privilege level</a> condition for this setup value. Privilege can be "u" or "p". When a peripheral matches that privilege setting the value will be written. When both Security and Privilege is specified, both conditions must match. </td><td><a class="el" href="zoneFormat.html#privilege">PrivilegeType</a> </td><td>optional  </td></tr>
+<tr>
+<td>info </td><td>Brief description of the setup value. </td><td>xs:string </td><td>optional  </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneFormat.html">Zone Description Format</a></li><li class="navelem"><a class="el" href="xml_rzone_pg.html">/rzone element</a></li><li class="navelem"><a class="el" href="xml_resources.html">/rzone/resources element</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
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+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/xml_resources.html b/docs/Zone/html/xml_resources.html
new file mode 100644
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@@ -0,0 +1,143 @@
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+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>/rzone/resources element</title>
+<title>CMSIS-Zone (Preview): /rzone/resources element</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
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+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
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+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
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+  $(document).ready(function() { searchBox.OnSelectItem(0); });
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+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
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+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
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+var searchBox = new SearchBox("searchBox", "search",false,'Search');
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+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
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+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
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+      <div id="nav-sync" class="sync"></div>
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+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('xml_resources.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
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+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">/rzone/resources element </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="xml_resources.html">/rzone/resources element</a> defines the memory and peripheral regions that are available.</p>
+<table  class="cmtable" summary="Element: resources">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_rzone_pg.html">rzone</a> </td><td colspan="3"><a class="el" href="xml_rzone_pg.html">/rzone element</a>  </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
+<tr>
+<td><a class="el" href="xml_sau_init.html">sau_init</a> </td><td>Fixed SAU settings required for this system, i.e. to access peripherals. </td><td>SauInitType </td><td>0..1   </td></tr>
+<tr>
+<td><a class="el" href="xml_memories.html">memories</a> </td><td>List of all memory regions available in this system. Some memory region might restrict the availability to specific processors. </td><td>complexType </td><td>0..1  </td></tr>
+<tr>
+<td><a class="el" href="xml_peripherals.html">peripherals</a> </td><td>List of all peripherals available for this system. </td><td>complexType </td><td>0..1  </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneFormat.html">Zone Description Format</a></li><li class="navelem"><a class="el" href="xml_rzone_pg.html">/rzone element</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/xml_resources.js b/docs/Zone/html/xml_resources.js
new file mode 100644
index 0000000..0c85782
--- /dev/null
+++ b/docs/Zone/html/xml_resources.js
@@ -0,0 +1,17 @@
+var xml_resources =
+[
+    [ "/rzone/resources/sau_init element", "xml_sau_init.html", [
+      [ "/rzone/sau_init/region element", "xml_sau_init.html#xml_si_region", null ]
+    ] ],
+    [ "/rzone/resources/memories element", "xml_memories.html", [
+      [ "/rzone/resources/memories/memory element", "xml_memories.html#xml_rmemory", null ],
+      [ "/rzone/resources/memories/mpc element", "xml_memories.html#xml_rmpc", null ]
+    ] ],
+    [ "/rzone/resources/peripherals element", "xml_peripherals.html", [
+      [ "/rzone/resources/peripherals/group element", "xml_peripherals.html#xml_group", null ],
+      [ "/rzone/resources/peripherals/.../peripheral element", "xml_peripherals.html#xml_peripheral", null ],
+      [ "/rzone/resources/peripherals/.../peripheral/slot element", "xml_peripherals.html#xml_slot", null ],
+      [ "/rzone/resources/peripherals/.../interrupt element", "xml_peripherals.html#xml_interrupt", null ],
+      [ "/rzone/resources/peripherals/.../setup element", "xml_peripherals.html#xml_p_setup", null ]
+    ] ]
+];
\ No newline at end of file
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+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>/rzone element</title>
+<title>CMSIS-Zone (Preview): /rzone element</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
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+<script type="text/javascript" src="dynsections.js"></script>
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+<link href="navtree.css" rel="stylesheet" type="text/css"/>
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+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
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+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
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+   </div>
+   <div id="projectbrief">System Resource Management</div>
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+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
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+</div>
+<!-- Generated by Doxygen 1.8.6 -->
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+var searchBox = new SearchBox("searchBox", "search",false,'Search');
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+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('xml_rzone_pg.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">/rzone element </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="xml_rzone_pg.html">/rzone element</a> element is the root element of the .rzone file which describes the resources (processors, memory, peripherals) available.</p>
+<table  class="cmtable" summary="Element: rzone">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td>root </td><td colspan="3">Document root  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>schemaVersion </td><td>CMSIS-Zone schema version used for describing the *.rzone file. </td><td>VersionType </td><td>required  </td></tr>
+<tr>
+<td>xmlns:xs </td><td>Is set to: <span class="XML-Token">"http://www.w3.org/2001/XMLSchema-instance"</span> to indicate compliance to the XML format. </td><td>xs:decimal </td><td>required  </td></tr>
+<tr>
+<td>xs:noNamespaceSchemaLocation </td><td>File name of the schema file. For example, <span class="XML-Token">"rzone.xsd"</span>. </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
+<tr>
+<td><a class="el" href="xml_creator.html">creator</a> </td><td>Specifies how a derived .rzone file was created. </td><td>CreatorType </td><td>0..1  </td></tr>
+<tr>
+<td><a class="el" href="xml_device.html">device</a> </td><td>Device that includes one or more processing element (PE). </td><td>DeviceType </td><td>1..1   </td></tr>
+<tr>
+<td><a class="el" href="xml_resources.html">resources</a> </td><td>Physical resources (memory and peripherals) that are available in the system. </td><td>SResourceType </td><td>1..1   </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneFormat.html">Zone Description Format</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/xml_rzone_pg.js b/docs/Zone/html/xml_rzone_pg.js
new file mode 100644
index 0000000..511b822
--- /dev/null
+++ b/docs/Zone/html/xml_rzone_pg.js
@@ -0,0 +1,9 @@
+var xml_rzone_pg =
+[
+    [ "/rzone/creator element", "xml_creator.html", null ],
+    [ "/rzone/device element", "xml_device.html", [
+      [ "/rzone/device/package element", "xml_device.html#xml_package", null ],
+      [ "/rzone/device/processor element", "xml_device.html#xml_processor", null ]
+    ] ],
+    [ "/rzone/resources element", "xml_resources.html", "xml_resources" ]
+];
\ No newline at end of file
diff --git a/docs/Zone/html/xml_sau_init.html b/docs/Zone/html/xml_sau_init.html
new file mode 100644
index 0000000..33dce57
--- /dev/null
+++ b/docs/Zone/html/xml_sau_init.html
@@ -0,0 +1,160 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>/rzone/resources/sau_init element</title>
+<title>CMSIS-Zone (Preview): /rzone/resources/sau_init element</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('xml_sau_init.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">/rzone/resources/sau_init element </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="xml_sau_init.html">/rzone/resources/sau_init element</a> specifies fixed Secure Attribute Unit (SAU) settings required for this system, for example a configuration that is required to access peripherals.</p>
+<table  class="cmtable" summary="Element: sau_init">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_resources.html">resources</a> </td><td colspan="3"><a class="el" href="xml_resources.html">/rzone/resources element</a>  </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
+<tr>
+<td><a class="el" href="xml_sau_init.html#xml_si_region">region</a> </td><td>Region settings for the SAU. </td><td>complexType </td><td>1..*  </td></tr>
+</table>
+<h1><a class="anchor" id="xml_si_region"></a>
+/rzone/sau_init/region element</h1>
+<p>The <a class="el" href="xml_sau_init.html#xml_si_region">/rzone/sau_init/region element</a> contains the region setting for SAU initialization.</p>
+<table  class="cmtable" summary="Element: region">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_sau_init.html">sau_init</a> </td><td colspan="3"><a class="el" href="xml_sau_init.html">/rzone/resources/sau_init element</a>  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>Pname </td><td>The processor that requires this setting. If omitted all processors get this setting. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>start </td><td>The logical start address for the region. </td><td>NonNegativeInteger </td><td>required  </td></tr>
+<tr>
+<td>size </td><td>The size for the region. </td><td>NonNegativeInteger </td><td>required  </td></tr>
+<tr>
+<td>security </td><td><a class="el" href="zoneFormat.html#security">Security</a> attributes for this memory region. </td><td><a class="el" href="zoneFormat.html#security">SecurityType</a> </td><td>optional  </td></tr>
+<tr>
+<td>info </td><td>Brief description of region setting (for comments in source code). </td><td>xs:string </td><td>optional  </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneFormat.html">Zone Description Format</a></li><li class="navelem"><a class="el" href="xml_rzone_pg.html">/rzone element</a></li><li class="navelem"><a class="el" href="xml_resources.html">/rzone/resources element</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/xml_zones.html b/docs/Zone/html/xml_zones.html
new file mode 100644
index 0000000..9c75536
--- /dev/null
+++ b/docs/Zone/html/xml_zones.html
@@ -0,0 +1,228 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>/azone/zones element</title>
+<title>CMSIS-Zone (Preview): /azone/zones element</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('xml_zones.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">/azone/zones element </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <a class="el" href="xml_zones.html">/azone/zones element</a> contains all zone definitions.</p>
+<p><b>Example</b> </p>
+<div class="fragment"><div class="line">&lt;zones&gt;</div>
+<div class="line">  &lt;zone name=<span class="stringliteral">&quot;Network&quot;</span>&gt;</div>
+<div class="line">    &lt;assign region=<span class="stringliteral">&quot;RAM1&quot;</span> block=<span class="stringliteral">&quot;Network&quot;</span>        access=<span class="stringliteral">&quot;rw&quot;</span>/&gt;</div>
+<div class="line">    &lt;assign group=<span class="stringliteral">&quot;UART&quot;</span> peripheral=<span class="stringliteral">&quot;USART0&quot;</span>     access=<span class="stringliteral">&quot;rw&quot;</span> /&gt;</div>
+<div class="line">    :</div>
+<div class="line">  &lt;/zone&gt;</div>
+<div class="line">  :</div>
+<div class="line">&lt;/zones&gt;</div>
+</div><!-- fragment --><p> &#160;</p>
+<table  class="cmtable" summary="Element: zones">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_azone_pg.html">azone</a> </td><td colspan="3"><a class="el" href="xml_azone_pg.html">/azone element</a>  </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
+<tr>
+<td><a class="el" href="xml_zones.html#xml_zone">zone</a> </td><td>Zone definitions </td><td>complexType </td><td>1..*  </td></tr>
+</table>
+<h1><a class="anchor" id="xml_zone"></a>
+/azone/zones/zone element</h1>
+<p>The <a class="el" href="xml_zones.html#xml_zone">/azone/zones/zone element</a> defines the name of a zone.</p>
+<table  class="cmtable" summary="Element: zone">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_zones.html">zones</a> </td><td colspan="3"><a class="el" href="xml_zones.html">/azone/zones element</a>  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>name </td><td>The unique name for this zone. </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>info </td><td>Brief description of the zone. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>Pname </td><td>The processor that can access the memory and peripherals of this zone. If omitted all processors of the system have access. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>security </td><td><a class="el" href="zoneFormat.html#security">Security level</a> for code execution in this zone. </td><td><a class="el" href="zoneFormat.html#security">SecurityType</a> </td><td>optional  </td></tr>
+<tr>
+<td>privilege </td><td><a class="el" href="zoneFormat.html#privilege">Privilege level</a> for code execution in this zone. </td><td><a class="el" href="zoneFormat.html#privilege">PrivilegeType</a> </td><td>optional  </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
+<tr>
+<td><a class="el" href="xml_zones.html#xml_assign">assign</a> </td><td>Resource Assignments </td><td>complexType </td><td>1..*  </td></tr>
+</table>
+<h1><a class="anchor" id="xml_assign"></a>
+/azone/zones/zone/assign element</h1>
+<p>The <a class="el" href="xml_zones.html#xml_assign">/azone/zones/zone/assign element</a> defines the resource assignments of that zone.</p>
+<table  class="cmtable" summary="Element: assign">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_zones.html#xml_zone">zone</a> </td><td colspan="3"><a class="el" href="xml_zones.html#xml_zone">/azone/zones/zone element</a>  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>memory </td><td>Name of a memory region or memory partition. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>group </td><td>Name of a peripheral group. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>peripheral </td><td>Name of a peripheral. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>access </td><td><a class="el" href="zoneFormat.html#access">Access</a> permissions for this assignment. </td><td><a class="el" href="zoneFormat.html#access">AccessType</a> </td><td>optional  </td></tr>
+<tr>
+<td>Pname </td><td>The processor that can access this assignment. If omitted the processors of the zone have access. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>security </td><td><a class="el" href="zoneFormat.html#security">Security</a> attributes for this assignment. </td><td><a class="el" href="zoneFormat.html#security">SecurityType</a> </td><td>optional  </td></tr>
+<tr>
+<td>privilege </td><td><a class="el" href="zoneFormat.html#privilege">Privilege level</a> for this assignment. </td><td><a class="el" href="zoneFormat.html#privilege">PrivilegeType</a> </td><td>optional  </td></tr>
+<tr>
+<td>uninit </td><td>"1" specifies that this region is not zero initialized during startup. Default value is "0". </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<td>dma </td><td>"1" specifies that this region is accessed by a DMA controller. Default value is "0". </td><td>xs:boolean </td><td>optional  </td></tr>
+<tr>
+<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence  </th></tr>
+<tr>
+<td><a class="el" href="xml_zones.html#xml_ainterrupt">interrupt</a> </td><td>Interrupt assignments for peripherals. </td><td>complexType </td><td>0..*  </td></tr>
+</table>
+<h1><a class="anchor" id="xml_ainterrupt"></a>
+/azone/zones/zone/assign/interrupt element</h1>
+<p>The <a class="el" href="xml_zones.html#xml_ainterrupt">/azone/zones/zone/assign/interrupt element</a> defines the interrupt execution for a peripheral.</p>
+<table  class="cmtable" summary="Element: interrupt">
+<tr>
+<th>Parent Element </th><th colspan="3">Element Chain  </th></tr>
+<tr>
+<td><a class="el" href="xml_zones.html#xml_zone">assign</a> </td><td colspan="3"><a class="el" href="xml_zones.html#xml_assign">/azone/zones/zone/assign element</a>  </td></tr>
+<tr>
+<th>Attributes </th><th>Description </th><th>Type </th><th>Use  </th></tr>
+<tr>
+<td>name </td><td>The name of the interrupt. </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>value </td><td>The interrupt number. </td><td>xs:string </td><td>required  </td></tr>
+<tr>
+<td>info </td><td>Brief description for this setting. </td><td>xs:string </td><td>optional  </td></tr>
+<tr>
+<td>security </td><td><a class="el" href="zoneFormat.html#security">Security</a> setting for the interrupt. </td><td><a class="el" href="zoneFormat.html#security">SecurityType</a> </td><td>optional  </td></tr>
+<tr>
+<td>privilege </td><td><a class="el" href="zoneFormat.html#privilege">Privilege level</a> setting for the interrupt. </td><td><a class="el" href="zoneFormat.html#privilege">PrivilegeType</a> </td><td>optional  </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneFormat.html">Zone Description Format</a></li><li class="navelem"><a class="el" href="xml_azone_pg.html">/azone element</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/zTCLI.html b/docs/Zone/html/zTCLI.html
new file mode 100644
index 0000000..3ab11cf
--- /dev/null
+++ b/docs/Zone/html/zTCLI.html
@@ -0,0 +1,151 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>Command Line Mode</title>
+<title>CMSIS-Zone (Preview): Command Line Mode</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('zTCLI.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">Command Line Mode </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>As the <a class="el" href="zoneFormat.html#rzone">.rzone</a> and <a class="el" href="zoneFormat.html#azone">.azone</a> files are XML based, it is possible to create or modify the files in external tools without using the <a class="el" href="zTInteractiveMode.html">Interactive Mode</a>. To generate output files the CMSIS-Zone Utility can be started in headless mode. The command line format is:</p>
+<p><code>eclipsec.exe -noSplash -consoleLog &ndash;launcher.suppressErrors -application com.arm.cmsis.zone.ui.headlessgen -azone FILENME.azone -ftl FTL_DIR -ftl_gen FTL_GEN_DIR</code></p>
+<p><b>Where</b> </p>
+<table class="doxtable">
+<tr>
+<th align="left">Parameter </th><th align="left">Description </th><th align="left">Required  </th></tr>
+<tr>
+<td align="left"><code>-noSplash</code> </td><td align="left">Suppresses Eclipse's splash screen </td><td align="left">[required] </td></tr>
+<tr>
+<td align="left"><code>-launcher.suppressErrors</code> </td><td align="left">Suppresses error dialog </td><td align="left">[optional] </td></tr>
+<tr>
+<td align="left"><code>-consoleLog</code> </td><td align="left">Suppresses diagnostic messages </td><td align="left">[optional] </td></tr>
+<tr>
+<td align="left"><code>-application</code> <code>com.arm.cmsis.zone.ui.headlessgen</code> </td><td align="left">Specifies the plug-in to be called </td><td align="left">[required] </td></tr>
+<tr>
+<td align="left"><code>-azone</code> <code>FILNAME.azone</code> </td><td align="left">Specifies the .azone file to be processed </td><td align="left">[required] </td></tr>
+<tr>
+<td align="left"><code>-ftl</code> <code>FTL_DIR</code> </td><td align="left">Relative or absolute directory with templates to process </td><td align="left">[optional - by default, <code>ftl</code> directory under the azone's file path is used] </td></tr>
+<tr>
+<td align="left"><code>-ftl_gen</code> <code>FTL_GEN_DIR</code> </td><td align="left">Relative or absolute output directory to write generated files </td><td align="left">[optional - by default, <code>ftl_gen</code> directory under the azone's file path is used] </td></tr>
+<tr>
+<td align="left"><code>-help</code> </td><td align="left">Shows command line parameter information </td><td align="left">[optional] </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneToolUsage.html">CMSIS-Zone Utility</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/zTELPC55.html b/docs/Zone/html/zTELPC55.html
new file mode 100644
index 0000000..ac05fbf
--- /dev/null
+++ b/docs/Zone/html/zTELPC55.html
@@ -0,0 +1,263 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>NXP LPC55S69</title>
+<title>CMSIS-Zone (Preview): NXP LPC55S69</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('zTELPC55.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">NXP LPC55S69 </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>This single processor demo application shows how to do the <a class="el" href="UseCases.html#UseCase_TrustZone">TrustZone Partitioning</a>. It is split into a secure and non-secure part. Using CMSIS-Zone, it generates:</p>
+<ul>
+<li>A header file that contains #defines to control the various linker scatter files (and might be used in other parts of the application).</li>
+<li>Memory protection controller (MPC) setup.</li>
+<li>Peripheral protection controller (PPC) and related interrupt setup.</li>
+<li>Secure attribution unit (SAU) setup.</li>
+</ul>
+<p>The application itself shows how to implement calls between the secure and the non-secure part.</p>
+<h1><a class="anchor" id="zTELPC55_Eclipse"></a>
+Using the CMSIS-Zone project</h1>
+<ul>
+<li><a class="el" href="zTExamples.html#zTExImport">Import</a> the project "Examples\LPC55S69\Zone" into the CMSIS-Zone utility</li>
+<li><a class="el" href="zTUI.html#zTProjEx">Open</a> the LPC55S69.azone file</li>
+<li><a class="el" href="zTUIGenerate.html">Generate</a> the related output files</li>
+</ul>
+<p>The LPC55S69.azone file of that project has the following configuration settings:</p>
+<ul>
+<li><a class="el" href="zTUIZonePart.html#zTUICreate">Added the zones</a> <code>hello_world_s</code> and <code>hello_worls_ns</code> </li>
+<li><a class="el" href="zTUIMemPerRes.html#zTUIMemAdd">Created the memory regions</a> <code>CODE_NS</code>, <code>Config</code>, <code>CODE_S</code>, <code>Veneer</code>, <code>DATA_NS</code>, and <code>DATA_S</code> </li>
+<li>Selected various memory regions and peripherals for using in the different zones.</li>
+</ul>
+<div class="image">
+<img src="lpc55_zones.png" alt="lpc55_zones.png"/>
+</div>
+<p>The zones use different Flash and SRAM regions for code and data, but share Flash configuration registers. Peripherals, such as the system and IO configuration, as well as an UART are available in the secure world only. To generate the output, click on the <a class="el" href="zTUIGenerate.html">Generate</a> button in the Zone Editor tool bar. This creates the following files in the <code>ftl_gen</code> directory:</p>
+<table class="doxtable">
+<tr>
+<th align="left">Template File </th><th align="left">Generated File </th><th align="left">Description  </th></tr>
+<tr>
+<td align="left">dump_fzone.txt.ftl </td><td align="left">dump_fzone.txt </td><td align="left">Contains the complete model </td></tr>
+<tr>
+<td align="left">helper.ftlinc </td><td align="left">N/A </td><td align="left">Helper template file with FTL functions. </td></tr>
+<tr>
+<td align="left">mem_layout.h.ftl </td><td align="left">mem_layout.h </td><td align="left">Header file that contains the memory region definitions, for example for the linker scatter file. </td></tr>
+<tr>
+<td align="left">scatter_ns.sct.ftl </td><td align="left">scatter_ns.sct </td><td align="left">Example scatter file for the non-secure zone (currently not used in MDK). </td></tr>
+<tr>
+<td align="left">scatter_s.sct.ftl </td><td align="left">scatter_s.sct </td><td align="left">Example scatter file for the secure zone (currently not used in MDK). </td></tr>
+<tr>
+<td align="left">tzm_config_mpc.c.ftl </td><td align="left">tzm_config_mpc.c </td><td align="left">Setup of the memory protection controller (MPC). </td></tr>
+<tr>
+<td align="left">tzm_config_ppc.c.ftl </td><td align="left">tzm_config_ppc.c </td><td align="left">Setup of the peripheral protection controller (PPC). </td></tr>
+<tr>
+<td align="left">tzm_config_sau.c.ftl </td><td align="left">tzm_config_sau.c </td><td align="left">Configuration of the secure attribution unit (SAU) and the NVIC interrupt assignment. </td></tr>
+</table>
+<p>These files can be used in any IDE to create the final application. In the following, the usage in Arm Keil MDK is described.</p>
+<h1><a class="anchor" id="zTELPC55_MDK"></a>
+Using the MDK project</h1>
+<p>The example project can be loaded, built and debugged in µVision by performing the following steps:</p>
+<ol type="1">
+<li>Navigate to Examples/LPC55S69/MDK</li>
+<li>Open the multi-project workspace hello_world.uvmpw</li>
+<li>Optional: Update the generated files by executing the copy_gen.bat scripts in hello_world_s\mdk and hello_world_ns\mdk folders.</li>
+<li>Run the batch build in MDK. Both projects, hello_world_s and hello_world_ns need to be compiled in order.</li>
+<li>Set hello_world_s as active project.</li>
+<li>Connect the LPC55S69-EVK using a Micro-USB cable at Debug Link (P6).</li>
+<li>Open <b>Options for Target - Debug</b> and make sure that the CMSIS-DAP ARMv8-M Debugger is selected and the LPC-LINK2 is used.</li>
+<li>Optional: Open a serial terminal program (i.e. PuTTY) on the virtual serial port provided in parallel to the debugger (e.g. USB Serial Device). Configure the port to 115200/8N1.</li>
+<li>Launch a debug session and watch the serial console output: <div class="image">
+<img src="hello_world_output.png" alt="hello_world_output.png"/>
+</div>
+</li>
+</ol>
+<h1><a class="anchor" id="zTELPC55_MDK_Setup"></a>
+MDK project setup</h1>
+<p>The multiproject workspace contains the secure <code>hello_world_s</code> project and the non-secure <code>hello_world_ns</code> project:</p>
+<div class="image">
+<img src="hello_world_proj_window.png" alt="hello_world_proj_window.png"/>
+</div>
+<p>The projects use the files generated in CMSIS-Zone as follows:</p>
+<table class="doxtable">
+<tr>
+<th align="left">File </th><th align="left">Used in </th><th align="left">Description  </th></tr>
+<tr>
+<td align="left">mem_layout.h </td><td align="left">hello_world_s, hello_world_ns </td><td align="left">Input for the scatter files. </td></tr>
+<tr>
+<td align="left">tzm_config_mpc.c </td><td align="left">hello_world_s </td><td align="left">Functions called from tzm_config.c </td></tr>
+<tr>
+<td align="left">tzm_config_ppc.c </td><td align="left">hello_world_s </td><td align="left">Functions called from tzm_config.c </td></tr>
+<tr>
+<td align="left">tzm_config_sau.c </td><td align="left">hello_world_s </td><td align="left">Functions called from tzm_config.c </td></tr>
+</table>
+<p>The scatter files <code>hello_world_s.sct</code> and <code>hello_world_ns.sct</code> are based on the original scatter files from NXP and are using a preinclude to mem_layout.h to get the information about the different memory regions.</p>
+<dl class="section note"><dt>Note</dt><dd>If you want to learn more about the general project layout for an Armv8-M project using TrustZone, refer to <a href="https://www.keil.com/appnotes/docs/apnt_291.asp" target="_blank">Application Note 291</a>.</dd></dl>
+<h2><a class="anchor" id="zTELPC55_hwsScatter"></a>
+hello_world_s.sct</h2>
+<p>As explained previously, the #defines in <code>mem_layout.h</code> can be used to create generic scatter files that are easy to update once changes in the CMSIS-Zone project happen. Using the <b>mem_layout.h</b> file from CMSIS-Zone, the following scatter file is used in the secure <code>hello_world</code> project:</p>
+<div class="fragment"><div class="line">; Use Arm compiler 6 to pre-process the scatter file and pull in the defines from the mem_layout.h file:</div>
+<div class="line"><span class="preprocessor">#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m33 -I../ -xc</span></div>
+<div class="line"><span class="preprocessor"></span> </div>
+<div class="line"><span class="preprocessor">#include &quot;mem_layout.h&quot;</span></div>
+<div class="line"> </div>
+<div class="line">; *------- &lt;&lt;&lt; Use Configuration Wizard in Context Menu &gt;&gt;&gt; ------------------</div>
+<div class="line"> </div>
+<div class="line">;&lt;h&gt; Stack Configuration</div>
+<div class="line">;  &lt;o&gt; Stack Size (in Bytes) &lt;0x0-0xFFFFFFFF:8&gt;</div>
+<div class="line">;&lt;/h&gt;</div>
+<div class="line"><span class="preprocessor">#define STACK_SIZE 0x400</span></div>
+<div class="line"><span class="preprocessor"></span> </div>
+<div class="line">;&lt;h&gt; Heap Configuration</div>
+<div class="line">;  &lt;o&gt; Heap Size (in Bytes) &lt;0x0-0xFFFFFFFF:8&gt;</div>
+<div class="line">;&lt;/h&gt;</div>
+<div class="line"><span class="preprocessor">#define HEAP_SIZE 0xC00</span></div>
+<div class="line"><span class="preprocessor"></span> </div>
+<div class="line">; *-------------- &lt;&lt;&lt; end of configuration section &gt;&gt;&gt; -----------------------</div>
+<div class="line"></div>
+<div class="line">LR_CODE_S REGION_CODE_S_START REGION_CODE_S_SIZE {</div>
+<div class="line">  ER_CODE_S REGION_CODE_S_START REGION_CODE_S_SIZE {</div>
+<div class="line">          (RESET,+FIRST)</div>
+<div class="line">      (InRoot$$Sections)</div>
+<div class="line">    .ANY (+RO, +XO)</div>
+<div class="line">  }</div>
+<div class="line">  RW_DATA_S REGION_DATA_S_START REGION_DATA_S_SIZE-HEAP_SIZE-STACK_SIZE {</div>
+<div class="line">    .ANY (+RW +ZI)</div>
+<div class="line">  }</div>
+<div class="line"><span class="preprocessor">#if HEAP_SIZE&gt;0</span></div>
+<div class="line"><span class="preprocessor"></span>  ARM_LIB_HEAP REGION_DATA_S_START+REGION_DATA_S_SIZE-HEAP_SIZE-STACK_SIZE EMPTY HEAP_SIZE {</div>
+<div class="line">  }</div>
+<div class="line"><span class="preprocessor">#endif</span></div>
+<div class="line"><span class="preprocessor"></span><span class="preprocessor">#if STACK_SIZE&gt;0</span></div>
+<div class="line"><span class="preprocessor"></span>  ARM_LIB_STACK REGION_DATA_S_START+REGION_DATA_S_SIZE-STACK_SIZE EMPTY STACK_SIZE {</div>
+<div class="line">  }</div>
+<div class="line"><span class="preprocessor">#endif</span></div>
+<div class="line"><span class="preprocessor"></span>}</div>
+<div class="line">LR_VENEER REGION_VENEER_START REGION_VENEER_SIZE {</div>
+<div class="line">  ER_VENEER REGION_VENEER_START REGION_VENEER_SIZE {</div>
+<div class="line">         (Veneer$$CMSE)</div>
+<div class="line">  }</div>
+<div class="line">}</div>
+</div><!-- fragment --><h2><a class="anchor" id="zTELPC55_TZSetup"></a>
+TrustZone Setup at Startup</h2>
+<p>During the system initialization, the function <b>SystemInitHook</b> is called. This is used when application specific code needs to be called as close to the reset entry as possible. In this example, this function calls <b>BOARD_InitTrustZone</b>, which calls the three TZM_Config_* functions:</p>
+<div class="image">
+<img src="lpc55_system_startup.png" alt="lpc55_system_startup.png"/>
+</div>
+ </div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneToolUsage.html">CMSIS-Zone Utility</a></li><li class="navelem"><a class="el" href="zTExamples.html">Examples</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/zTEMusca.html b/docs/Zone/html/zTEMusca.html
new file mode 100644
index 0000000..cf823b3
--- /dev/null
+++ b/docs/Zone/html/zTEMusca.html
@@ -0,0 +1,128 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>Arm Musca-A1</title>
+<title>CMSIS-Zone (Preview): Arm Musca-A1</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
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+</script>
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+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
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+      </li>
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+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
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+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('zTEMusca.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">Arm Musca-A1 </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"></div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneToolUsage.html">CMSIS-Zone Utility</a></li><li class="navelem"><a class="el" href="zTExamples.html">Examples</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/zTESTM32L5.html b/docs/Zone/html/zTESTM32L5.html
new file mode 100644
index 0000000..552b093
--- /dev/null
+++ b/docs/Zone/html/zTESTM32L5.html
@@ -0,0 +1,250 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>STMicroelectronics STM32L5</title>
+<title>CMSIS-Zone (Preview): STMicroelectronics STM32L5</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
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+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
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+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('zTESTM32L5.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">STMicroelectronics STM32L5 </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>This single processor demo application shows how to do the <a class="el" href="UseCases.html#UseCase_TrustZone">TrustZone Partitioning</a>. It is split into a secure and non-secure part. Using CMSIS-Zone, it generates:</p>
+<ul>
+<li>A header file that contains #defines to control the various linker scatter files (and might be used in other parts of the application).</li>
+<li>The SystemIsolation_Config.c header file that contains memory protection controller (MPC) and peripheral protection controller (PPC) and related interrupt setup.</li>
+<li>The partition_gen.h header file that contains the secure attribution unit (SAU) setup and the NVIC configuration for secure/non-secure.</li>
+</ul>
+<p>The application itself shows how to implement calls between the secure and the non-secure part.</p>
+<h1><a class="anchor" id="zTESTM32L5_Eclipse"></a>
+Using the CMSIS-Zone project</h1>
+<ul>
+<li><a class="el" href="zTExamples.html#zTExImport">Import</a> the project "Examples\STM32L5\Zone" into the CMSIS-Zone utility</li>
+<li><a class="el" href="zTUI.html#zTProjEx">Open</a> the STM32L5.azone file</li>
+<li><a class="el" href="zTUIGenerate.html">Generate</a> the related output files</li>
+</ul>
+<p>The STM32L5.azone file of that project has the following configuration settings:</p>
+<ul>
+<li><a class="el" href="zTUIZonePart.html#zTUICreate">Added the zones</a> <code>blinky_s</code> and <code>blinky_ns</code> </li>
+<li><a class="el" href="zTUIMemPerRes.html#zTUIMemAdd">Created the memory regions</a> <code>CODE_NS</code>, <code>CODE_S</code>, <code>Veneer</code>, <code>DATA_NS</code>, and <code>DATA_S</code> </li>
+<li>Selected various memory regions and peripherals for using in the different zones.</li>
+</ul>
+<div class="image">
+<img src="STM32L5_zones.png" alt="STM32L5_zones.png"/>
+</div>
+<p>The zones use different Flash and SRAM regions for code and data, but share Flash configuration registers. Peripherals, such as the system and IO configuration, as well as an UART are available in the secure world only. To generate the output, click on the <a class="el" href="zTUIGenerate.html">Generate</a> button in the Zone Editor tool bar. This creates the following files in the <code>ftl_gen</code> directory:</p>
+<table class="doxtable">
+<tr>
+<th align="left">Template File </th><th align="left">Generated File </th><th align="left">Description  </th></tr>
+<tr>
+<td align="left">dump_fzone.txt.ftl </td><td align="left">dump_fzone.txt </td><td align="left">Contains the complete model </td></tr>
+<tr>
+<td align="left">helper.ftlinc </td><td align="left">N/A </td><td align="left">Helper template file with FTL functions. </td></tr>
+<tr>
+<td align="left">mem_layout.h.ftl </td><td align="left">mem_layout.h </td><td align="left">Header file that contains the memory region definitions, for example for the linker scatter file. </td></tr>
+<tr>
+<td align="left">partition_gen.h.ftl </td><td align="left">partition_gen.h </td><td align="left">Configuration of the secure attribution unit (SAU) and the NVIC interrupt assignment. </td></tr>
+<tr>
+<td align="left">SystemIsolation_Config.c.ftl </td><td align="left">SystemIsolation_Config.c </td><td align="left">Setup of the MPC and PPC. </td></tr>
+<tr>
+<td align="left">blinky_ns.sct.ftl </td><td align="left">blinky_ns.sct </td><td align="left">Scatter file for non-secure zone. </td></tr>
+<tr>
+<td align="left">blinky_s.sct.ftl </td><td align="left">blinky_s.sct </td><td align="left">Scatter file for secure zone. </td></tr>
+</table>
+<p>These files can be used in any IDE to create the final application. In the following, the usage in Arm Keil MDK is described.</p>
+<h1><a class="anchor" id="zTESTM32L5_MDK"></a>
+Using the MDK project</h1>
+<p>The example project can be loaded, built and debugged in µVision by performing the following steps:</p>
+<ol type="1">
+<li>Navigate to Examples/STM32L5/MDK</li>
+<li>Open the multi-project workspace blinky.uvmpw</li>
+<li>Optional: Update the generated files by executing the copy_gen.bat scripts in blinky_s\mdk and blinky_ns\mdk folders.</li>
+<li>Run the batch build in MDK. Both projects, blinky_s and blinky_ns need to be compiled in order.</li>
+</ol>
+<h1><a class="anchor" id="zTESTM32L5_MDK_Setup"></a>
+MDK project setup</h1>
+<p>The multiproject workspace contains the secure <code>blinky_s</code> project and the non-secure <code>blinky_ns</code> project:</p>
+<div class="image">
+<img src="blinky_window.png" alt="blinky_window.png"/>
+</div>
+<p>The projects use the files generated in CMSIS-Zone as follows:</p>
+<table class="doxtable">
+<tr>
+<th align="left">File </th><th align="left">Used in </th><th align="left">Description  </th></tr>
+<tr>
+<td align="left">mem_layout.h </td><td align="left">blinky_s, blinky_ns </td><td align="left">Input for the linker scatter files. </td></tr>
+<tr>
+<td align="left">partition_gen.h </td><td align="left">blinky_s </td><td align="left">Configuration of the secure attribution unit (SAU) and the NVIC interrupt assignment. This file is included in the partition_stm32l5xx.h header file. </td></tr>
+<tr>
+<td align="left">SystemIsolation_Config.c </td><td align="left">blinky_s </td><td align="left">Setup of the MPC and PPC. </td></tr>
+<tr>
+<td align="left">blinky_ns.sct </td><td align="left">blinky_ns </td><td align="left">Scatter file for non-secure zone (initally based on generated file). </td></tr>
+<tr>
+<td align="left">blinky_s.sct </td><td align="left">blinky_s </td><td align="left">Scatter file for secure zone (initally based on generated file). </td></tr>
+</table>
+<dl class="section note"><dt>Note</dt><dd>If you want to learn more about the general project layout for an Armv8-M project using TrustZone, refer to <a href="https://www.keil.com/appnotes/docs/apnt_291.asp" target="_blank">Application Note 291</a>.</dd></dl>
+<h2><a class="anchor" id="zTESTM32L5_hwsScatter"></a>
+blinky_s.sct</h2>
+<p>As explained previously, the #defines in <code>mem_layout.h</code> can be used to create generic scatter files that are easy to update once changes in the CMSIS-Zone project happen. Using the <b>mem_layout.h</b> file from CMSIS-Zone, the following scatter file is used in the secure <code>blinky</code> project, which is based on the generated scatterf file (scatter_s.sct):</p>
+<div class="fragment"><div class="line">; Use Arm compiler 6 to pre-process the scatter file and pull in the defines from the mem_layout.h file:</div>
+<div class="line"><span class="preprocessor">#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m33 -I../ -xc</span></div>
+<div class="line"><span class="preprocessor"></span></div>
+<div class="line"><span class="preprocessor">#include &quot;mem_layout.h&quot;</span></div>
+<div class="line"></div>
+<div class="line">; *------- &lt;&lt;&lt; Use Configuration Wizard in Context Menu &gt;&gt;&gt; ------------------</div>
+<div class="line"></div>
+<div class="line">;&lt;h&gt; Stack Configuration</div>
+<div class="line">;  &lt;o&gt; Stack Size (in Bytes) &lt;0x0-0xFFFFFFFF:8&gt;</div>
+<div class="line">;&lt;/h&gt;</div>
+<div class="line"><span class="preprocessor">#define STACK_SIZE 0x400</span></div>
+<div class="line"><span class="preprocessor"></span></div>
+<div class="line">;&lt;h&gt; Heap Configuration</div>
+<div class="line">;  &lt;o&gt; Heap Size (in Bytes) &lt;0x0-0xFFFFFFFF:8&gt;</div>
+<div class="line">;&lt;/h&gt;</div>
+<div class="line"><span class="preprocessor">#define HEAP_SIZE 0xC00</span></div>
+<div class="line"><span class="preprocessor"></span></div>
+<div class="line">; *-------------- &lt;&lt;&lt; end of configuration section &gt;&gt;&gt; -----------------------</div>
+<div class="line">LR_CODE_S REGION_CODE_S_START REGION_CODE_S_SIZE {</div>
+<div class="line">  ER_CODE_S REGION_CODE_S_START REGION_CODE_S_SIZE {</div>
+<div class="line">          (RESET,+FIRST)</div>
+<div class="line">      (InRoot$$Sections)</div>
+<div class="line">    .ANY (+RO +XO)</div>
+<div class="line">  }</div>
+<div class="line">  RW_DATA_S REGION_DATA_S_START REGION_DATA_S_SIZE-HEAP_SIZE-STACK_SIZE {</div>
+<div class="line">    .ANY (+RW +ZI)</div>
+<div class="line">  }</div>
+<div class="line"><span class="preprocessor">#if HEAP_SIZE&gt;0</span></div>
+<div class="line"><span class="preprocessor"></span>  ARM_LIB_HEAP REGION_DATA_S_START+REGION_DATA_S_SIZE-HEAP_SIZE-STACK_SIZE EMPTY HEAP_SIZE {</div>
+<div class="line">  }</div>
+<div class="line"><span class="preprocessor">#endif</span></div>
+<div class="line"><span class="preprocessor"></span><span class="preprocessor">#if STACK_SIZE&gt;0</span></div>
+<div class="line"><span class="preprocessor"></span>  ARM_LIB_STACK REGION_DATA_S_START+REGION_DATA_S_SIZE-STACK_SIZE EMPTY STACK_SIZE {</div>
+<div class="line">  }</div>
+<div class="line"><span class="preprocessor">#endif  </span></div>
+<div class="line"><span class="preprocessor"></span>}</div>
+<div class="line">LR_Veneer REGION_VENEER_START REGION_VENEER_SIZE {</div>
+<div class="line">  ER_Veneer REGION_VENEER_START REGION_VENEER_SIZE {</div>
+<div class="line">         (Veneer$$CMSE)</div>
+<div class="line">  }</div>
+<div class="line">}</div>
+</div><!-- fragment --><p>The partition_gen.h header file contains Configuration Wizard annotation so that it can be viewed in a graphical window:</p>
+<div class="image">
+<img src="partition_h_l5.png" alt="partition_h_l5.png"/>
+</div>
+ </div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneToolUsage.html">CMSIS-Zone Utility</a></li><li class="navelem"><a class="el" href="zTExamples.html">Examples</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/zTExamples.html b/docs/Zone/html/zTExamples.html
new file mode 100644
index 0000000..cffccb5
--- /dev/null
+++ b/docs/Zone/html/zTExamples.html
@@ -0,0 +1,154 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>Examples</title>
+<title>CMSIS-Zone (Preview): Examples</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('zTExamples.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">Examples </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The following projects are available in the CMSIS-Zone repository on GitHub: <a href="https://github.com/ARM-software/CMSIS-Zone/tree/master/Examples">https://github.com/ARM-software/CMSIS-Zone/tree/master/Examples</a>. These examples demonstrate the usage of the CMSIS-Zone utility.</p>
+<table class="doxtable">
+<tr>
+<th align="left">Example </th><th align="left">Description  </th></tr>
+<tr>
+<td align="left"><a class="el" href="zTEMusca.html">Arm Musca-A1</a> </td><td align="left">Musca project </td></tr>
+<tr>
+<td align="left"><a class="el" href="zTELPC55.html">NXP LPC55S69</a> </td><td align="left">Single processor Cortex-M33 project with TrustZone setup </td></tr>
+<tr>
+<td align="left"><a class="el" href="zTESTM32L5.html">STMicroelectronics STM32L5</a> </td><td align="left">Single processor Cortex-M33 project with TrustZone setup </td></tr>
+</table>
+<h1><a class="anchor" id="zTExImport"></a>
+Import examples</h1>
+<p>Import the examples to Eclipse using the following flow:</p>
+<ul>
+<li>Go to <b>File - Import</b> and select <b>General - Existing Projects into Workspace</b>:</li>
+</ul>
+<div class="image">
+<img src="import_from_file.png" alt="import_from_file.png"/>
+</div>
+<p>Click <b>Next</b>.</p>
+<p>Browse to the root directory, for example "Examples\LPC55S69\Zone", and select the project that you want to import. The import projects window shows the available projects:</p>
+<div class="image">
+<img src="import_projects.png" alt="import_projects.png"/>
+</div>
+<p>Click <b>Finish</b>. The project is imported and opened in the <a class="el" href="zTUI.html#zTProjEx">Project Explorer</a>. </p>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneToolUsage.html">CMSIS-Zone Utility</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/zTExamples.js b/docs/Zone/html/zTExamples.js
new file mode 100644
index 0000000..f0c7eaf
--- /dev/null
+++ b/docs/Zone/html/zTExamples.js
@@ -0,0 +1,20 @@
+var zTExamples =
+[
+    [ "Import examples", "zTExamples.html#zTExImport", null ],
+    [ "Arm Musca-A1", "zTEMusca.html", null ],
+    [ "NXP LPC55S69", "zTELPC55.html", [
+      [ "Using the CMSIS-Zone project", "zTELPC55.html#zTELPC55_Eclipse", null ],
+      [ "Using the MDK project", "zTELPC55.html#zTELPC55_MDK", null ],
+      [ "MDK project setup", "zTELPC55.html#zTELPC55_MDK_Setup", [
+        [ "hello_world_s.sct", "zTELPC55.html#zTELPC55_hwsScatter", null ],
+        [ "TrustZone Setup at Startup", "zTELPC55.html#zTELPC55_TZSetup", null ]
+      ] ]
+    ] ],
+    [ "STMicroelectronics STM32L5", "zTESTM32L5.html", [
+      [ "Using the CMSIS-Zone project", "zTESTM32L5.html#zTESTM32L5_Eclipse", null ],
+      [ "Using the MDK project", "zTESTM32L5.html#zTESTM32L5_MDK", null ],
+      [ "MDK project setup", "zTESTM32L5.html#zTESTM32L5_MDK_Setup", [
+        [ "blinky_s.sct", "zTESTM32L5.html#zTESTM32L5_hwsScatter", null ]
+      ] ]
+    ] ]
+];
\ No newline at end of file
diff --git a/docs/Zone/html/zTInstall.html b/docs/Zone/html/zTInstall.html
new file mode 100644
index 0000000..b206179
--- /dev/null
+++ b/docs/Zone/html/zTInstall.html
@@ -0,0 +1,135 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>Installation</title>
+<title>CMSIS-Zone (Preview): Installation</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('zTInstall.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">Installation </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>CMSIS-Zone is currently available as an executable Eclipse environment. Download the zipped archive from <a href="" target="_blank">here</a> and save it to your computer. Unzip it and run CDT_2019_3\eclipse\eclipse.exe.</p>
+<p>Before creating the first project, you have to point the tool to your pack repository so that it can pick up relevant device information. Go to <b>Window - Preferences</b> and select <b>CMSIS Packs</b>:</p>
+<div class="image">
+<img src="CMSISPacksPreferences.png" alt="CMSISPacksPreferences.png"/>
+</div>
+<p>Browse to your pack root folder, usually <code>C:\users\username\AppData\Local\Arm\Packs</code>. Click <b>Apply and Close</b>.</p>
+<p>This concludes the installation and setup of the Eclipse environment. </p>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneToolUsage.html">CMSIS-Zone Utility</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/zTInteractiveMode.html b/docs/Zone/html/zTInteractiveMode.html
new file mode 100644
index 0000000..3228cd6
--- /dev/null
+++ b/docs/Zone/html/zTInteractiveMode.html
@@ -0,0 +1,135 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>Interactive Mode</title>
+<title>CMSIS-Zone (Preview): Interactive Mode</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('zTInteractiveMode.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">Interactive Mode </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The following section explains the interactive mode of the CMSIS-Zone Utility. The following steps are explained:</p>
+<ul>
+<li><a class="el" href="zTUICreateProject.html">Create a CMSIS-Zone Project</a> that allows to manage system resources.</li>
+<li><a class="el" href="zTUIMemPerRes.html">Memory and Peripheral Resources</a> allows to create sub-memory regions and defines properties such as access permissions.</li>
+<li><a class="el" href="zTUIZonePart.html">Zone Partitioning</a> that assigns available resources to sub-projects or execution compartments.</li>
+<li><a class="el" href="zTUIGenerate.html">Generate output files</a> for device configuration and linker settings. </li>
+</ul>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneToolUsage.html">CMSIS-Zone Utility</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/zTInteractiveMode.js b/docs/Zone/html/zTInteractiveMode.js
new file mode 100644
index 0000000..34d1833
--- /dev/null
+++ b/docs/Zone/html/zTInteractiveMode.js
@@ -0,0 +1,15 @@
+var zTInteractiveMode =
+[
+    [ "Create a CMSIS-Zone Project", "zTUICreateProject.html", null ],
+    [ "Memory and Peripheral Resources", "zTUIMemPerRes.html", [
+      [ "View memory and peripheral resources", "zTUIMemPerRes.html#zTUIMemView", null ],
+      [ "Create Memory Regions", "zTUIMemPerRes.html#zTUIMemAdd", null ],
+      [ "Delete Memory Regions", "zTUIMemPerRes.html#zTUIMemDel", null ],
+      [ "Resource Properties", "zTUIMemPerRes.html#zTUIPerProp", null ],
+      [ "Configure peripheral slot access rights", "zTUIMemPerRes.html#zTUIPerSlotConf", null ]
+    ] ],
+    [ "Zone Partitioning", "zTUIZonePart.html", [
+      [ "Create Zones", "zTUIZonePart.html#zTUICreate", null ]
+    ] ],
+    [ "Generate output files", "zTUIGenerate.html", null ]
+];
\ No newline at end of file
diff --git a/docs/Zone/html/zTUI.html b/docs/Zone/html/zTUI.html
new file mode 100644
index 0000000..1fa455c
--- /dev/null
+++ b/docs/Zone/html/zTUI.html
@@ -0,0 +1,201 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>User Interface</title>
+<title>CMSIS-Zone (Preview): User Interface</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('zTUI.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">User Interface </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The CMSIS-Zone Utility user interface offers menus, toolbars, dialog boxes, and windows to manage the various aspects of your project.</p>
+<h1><a class="anchor" id="zTGUI"></a>
+CMSIS-Zone GUI</h1>
+<p>The utility's GUI provides menus for selecting commands and toolbar buttons in the <a class="el" href="zTUI.html#zTGUIZoneEditor">Zone Editor</a> window:</p>
+<div class="image">
+<img src="GUI.png" alt="GUI.png"/>
+</div>
+<h1><a class="anchor" id="zTProjEx"></a>
+Project Explorer</h1>
+<p>Projects that are currently available in the Eclipse workspace are shown in the <b>Project Explorer</b>. When creating a new project, you will first find the <a class="el" href="zoneFormat.html#rzone">.rzone</a> and the <a class="el" href="zoneFormat.html#azone">.azone</a> files here. Later, generator files and generated files are shown as well:</p>
+<div class="image">
+<img src="ProjectExplorerWindow.png" alt="ProjectExplorerWindow.png"/>
+<div class="caption">
+Project Explorer window showing a complex project</div></div>
+<p> In the <b>Project Explorer</b> window, you manage the project files. The following files are shown:</p>
+<table class="doxtable">
+<tr>
+<th>File name </th><th>Description  </th></tr>
+<tr>
+<td><code>project.azone</code> </td><td>Project-level <a class="el" href="zoneFormat.html#azone">.azone</a> file </td></tr>
+<tr>
+<td><code>project.rzone</code> </td><td>Project-level <a class="el" href="zoneFormat.html#rzone">.rzone</a> file </td></tr>
+<tr>
+<td><code>zone.azone</code> </td><td>Zone-level <a class="el" href="zoneFormat.html#azone">.azone</a> file </td></tr>
+<tr>
+<td><code>zone.rzone</code> </td><td>Zone-level <a class="el" href="zoneFormat.html#rzone">.rzone</a> file </td></tr>
+<tr>
+<td><code>*.ftl</code> </td><td>Freemarker template file used to <a class="el" href="GenDataModel.html">generate</a> output </td></tr>
+<tr>
+<td><code>helper.ftlinc</code> </td><td>Helper file to generate Freemarker output </td></tr>
+<tr>
+<td><code>*.sct,</code> <code>partition_*</code>.h </td><td>Generated output files </td></tr>
+</table>
+<h1><a class="anchor" id="zTGUIZoneEditor"></a>
+Zone Editor</h1>
+<p>The <b>Zone Editor</b> shows <a class="el" href="zoneFormat.html#azone">.azone</a> files in two different views: <b>Resource</b> <b>map</b> and <b>Zone</b> <b>map</b>.</p>
+<p>The <b>Resource</b> <b>map</b> shows all resources available to that system or sub-system. By default, it shows the selected device, as well as lists of memories and peripherals:</p>
+<div class="image">
+<img src="resource_map.png" alt="resource_map.png"/>
+</div>
+<p>The <b>Zone</b> <b>map</b> shows the same resources, but mapped to zones that have been created for the device:</p>
+<div class="image">
+<img src="zone_map.png" alt="zone_map.png"/>
+</div>
+<p>Resources assigned to a zone are marked with colors: </p>
+<table class="doxtable">
+<tr>
+<th>Color </th><th>Meaning  </th></tr>
+<tr>
+<td>Green </td><td>Resource is assigned to one zone </td></tr>
+<tr>
+<td>Amber </td><td>Resource is assigned to multiple zones </td></tr>
+</table>
+<h2><a class="anchor" id="zTGUIButtons"></a>
+Toolbar Buttons</h2>
+<p>The <b>Zone Editor</b> window contains toolbar buttons that offer direct access to functionality of the utility:</p>
+<div class="image">
+<img src="Buttons.png" alt="Buttons.png"/>
+</div>
+<table class="doxtable">
+<tr>
+<th>Button </th><th>Description  </th></tr>
+<tr>
+<td>Tree View </td><td>Shows the resources as a tree </td></tr>
+<tr>
+<td>List View </td><td>Shows the resources as a simple list </td></tr>
+<tr>
+<td>Arrange memory regions </td><td>Arranges memory regions according to their sizes </td></tr>
+<tr>
+<td><a class="el" href="zTUIZonePart.html#zTUICreate">Add new zone</a> </td><td>Adds a new zone to the zone map </td></tr>
+<tr>
+<td><a class="el" href="zTUIGenerate.html">Generate</a> </td><td>Generates CMSIS-Zone output files </td></tr>
+</table>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneToolUsage.html">CMSIS-Zone Utility</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/zTUICreateProject.html b/docs/Zone/html/zTUICreateProject.html
new file mode 100644
index 0000000..19a17c5
--- /dev/null
+++ b/docs/Zone/html/zTUICreateProject.html
@@ -0,0 +1,141 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>Create a CMSIS-Zone Project</title>
+<title>CMSIS-Zone (Preview): Create a CMSIS-Zone Project</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('zTUICreateProject.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">Create a CMSIS-Zone Project </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>Go to <b>File - New - Project</b> and select <b>CMSIS - CMSIS-Zone Project</b>:</p>
+<div class="image">
+<img src="zone_project.png" alt="zone_project.png"/>
+</div>
+<p>Click <b>Next</b>. In the next window, enter a <b>Project</b> <b>name:</b> </p>
+<div class="image">
+<img src="SetProjectName.png" alt="SetProjectName.png"/>
+</div>
+<p>Click <b>Next</b>. In the next window, select <b>Use existing resource file (*.rzone)</b> and browse to the location of the .rzone file:</p>
+<div class="image">
+<img src="SpecifyRzoneFile.png" alt="SpecifyRzoneFile.png"/>
+</div>
+<p>Click <b>Finish</b>. The new project is created and an empty *.azone file is added. </p>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneToolUsage.html">CMSIS-Zone Utility</a></li><li class="navelem"><a class="el" href="zTInteractiveMode.html">Interactive Mode</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/zTUIGenerate.html b/docs/Zone/html/zTUIGenerate.html
new file mode 100644
index 0000000..e50fb83
--- /dev/null
+++ b/docs/Zone/html/zTUIGenerate.html
@@ -0,0 +1,142 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>Generate output files</title>
+<title>CMSIS-Zone (Preview): Generate output files</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('zTUIGenerate.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">Generate output files </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The CMSIS-Zone utility can generate files that represent the configuration of the system. These files can be used in the project source files or tool configuration files.</p>
+<p>other toolchains for further development. The generator process creates:</p>
+<ul>
+<li>Configuration files for tool and hardware setup, that are defined by <a class="el" href="GenDataModel.html">.ftl files</a> in the project <code>ftl</code> directory.</li>
+<li>Files that represent <a class="el" href="zTUIZonePart.html#zTUICreate">sub-systems</a> (<a class="el" href="zoneFormat.html#rzone">.rzone</a> and <a class="el" href="zoneFormat.html#azone">.azone</a>) that can be partitioned further (restart the process).</li>
+</ul>
+<p>To start the generation, press the <b>Generate</b> button or use the menu item <b>CMSIS Zone - Generate</b>:</p>
+<div class="image">
+<img src="GenCodeButton.png" alt="GenCodeButton.png"/>
+</div>
+<p>Check <a class="el" href="zTUI.html#zTProjEx">Project Explorer</a> to observe the changes. In the project, the generated <code></code>.azone and <code></code>.rzone files appear and the <code>ftl_gen</code> directory contains the files defined by the <code>ftl</code> template files:</p>
+<div class="image">
+<img src="gen_output.png" alt="gen_output.png"/>
+</div>
+ </div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneToolUsage.html">CMSIS-Zone Utility</a></li><li class="navelem"><a class="el" href="zTInteractiveMode.html">Interactive Mode</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/zTUIMemPerRes.html b/docs/Zone/html/zTUIMemPerRes.html
new file mode 100644
index 0000000..73c6096
--- /dev/null
+++ b/docs/Zone/html/zTUIMemPerRes.html
@@ -0,0 +1,211 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>Memory and Peripheral Resources</title>
+<title>CMSIS-Zone (Preview): Memory and Peripheral Resources</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('zTUIMemPerRes.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">Memory and Peripheral Resources </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The available memory can be further divided into <a class="el" href="zTUIMemPerRes.html#zTUIMemAdd">smaller regions</a> that are later assigned to zones, for example a zone for loader and zone for application.</p>
+<p>For memory and peripherals <a class="el" href="zTUIMemPerRes.html#zTUIPerProp">properties</a> such as access permission, privilege, and security level can be configured. These settings can be for example used to generate source code files that configure the device at run-time.</p>
+<h1><a class="anchor" id="zTUIMemView"></a>
+View memory and peripheral resources</h1>
+<p>Initially, this uses the information in the *.rzone file which defines the generic access permissions for memory and peripherals. The CMSIS-Zone Editor shows the <b>Resource</b> <b>Map</b> of the given device:</p>
+<div class="image">
+<img src="lpc55_resource_map.png" alt="lpc55_resource_map.png"/>
+</div>
+<p>Here, you can see all resources that are available on the device.You see <b>Memory</b>, <b>Peripherals</b>, <b>Cores</b>, and <b>Info</b> related to the resources. <a class="el" href="zTUI.html#zTGUIZoneEditor">Colored resources</a> are assigned to a zone.</p>
+<h1><a class="anchor" id="zTUIMemAdd"></a>
+Create Memory Regions</h1>
+<p>To create a new memory region, right-click on the memory that you want to divide and select <b>Add memory region</b>:</p>
+<div class="image">
+<img src="AddMemoryBlock.png" alt="AddMemoryBlock.png"/>
+</div>
+<p>In the dialog a name derived from the parent memory region is provided. Change this region name as needed and specify the size. In this dialog, you change permissions, privilege, or security level for the memory region. When done, click <b>Finish:</b> </p>
+<div class="image">
+<img src="NewMemoryBlockWiz.png" alt="NewMemoryBlockWiz.png"/>
+</div>
+<p>The new memory region is immediately shown in the zone map. Depending on the security level, you may be able to assign this new region only to certain zones. For example, secure memory regions cannot be assigned to a non-secure zone.</p>
+<div class="image">
+<img src="IRAM1_1Display.png" alt="IRAM1_1Display.png"/>
+</div>
+<p>The information about the memory regions is stored in the <a class="el" href="xml_partition.html#xml_amemory">/azone/partition/memory element</a> element of the *.azone file.</p>
+<h1><a class="anchor" id="zTUIMemDel"></a>
+Delete Memory Regions</h1>
+<p>To delete a memory region, right-click on the memory region select <b>Delete memory region</b>:</p>
+<div class="image">
+<img src="DelMemoryRegion.png" alt="DelMemoryRegion.png"/>
+</div>
+<h1><a class="anchor" id="zTUIPerProp"></a>
+Resource Properties</h1>
+<p>To change the properties of a resource, such as a peripheral for example, right-click the resource and select <b>Properties:</b> </p>
+<div class="image">
+<img src="res_prop.png" alt="res_prop.png"/>
+</div>
+<p>Then, you can set these properties:</p>
+<div class="image">
+<img src="peripheral_properties.png" alt="peripheral_properties.png"/>
+</div>
+<p><b>General</b> </p>
+<ul>
+<li><code>Shared:</code> the resource can be accessed by more than one zone</li>
+<li><code>Startup:</code> locate the vector table to this region</li>
+<li><code>No</code> zero init: preserve RAM content at startup</li>
+<li><code>DMA:</code> enable direct memory access</li>
+</ul>
+<p><b>Permissions</b> </p>
+<ul>
+<li><code>peripheral:</code> mark this as a peripheral</li>
+<li><code>read</code> </li>
+<li><code>write</code> </li>
+<li><code>execute</code> </li>
+</ul>
+<p><b>Privilege</b> </p>
+<ul>
+<li><code>not</code> specified</li>
+<li><code>privileged</code> </li>
+<li><code>unprivileged</code> </li>
+</ul>
+<p><b>Security</b> </p>
+<ul>
+<li><code>not</code> specified</li>
+<li><code>non-secure</code> </li>
+<li><code>non-secure</code> callable</li>
+<li><code>secure</code> </li>
+</ul>
+<p>The information about the peripherals is stored in the <a class="el" href="xml_partition.html#xml_aperipheral">/azone/partition/peripheral element</a> element of the *.azone file.</p>
+<h1><a class="anchor" id="zTUIPerSlotConf"></a>
+Configure peripheral slot access rights</h1>
+<p>Peripherals can have so called slots that can be configured separately. Depending on the peripheral, the slots have different names in the Zone Editor. For example, for DMA they are called <b>Channels:</b> </p>
+<div class="image">
+<img src="dma_channel_config.png" alt="dma_channel_config.png"/>
+</div>
+<p>For GPIOs, they are called <b>Pins:</b> </p>
+<div class="image">
+<img src="gpio_pins_config.png" alt="gpio_pins_config.png"/>
+</div>
+<p>In the dialog, you can set security and privilege levels:</p>
+<div class="image">
+<img src="dma_gpio_config.png" alt="dma_gpio_config.png"/>
+</div>
+<p>The information about the slots is stored in the <a class="el" href="xml_partition.html#xml_aslot">/azone/partition/peripheral/slot element</a> element of the *.azone file. </p>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneToolUsage.html">CMSIS-Zone Utility</a></li><li class="navelem"><a class="el" href="zTInteractiveMode.html">Interactive Mode</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/zTUIZonePart.html b/docs/Zone/html/zTUIZonePart.html
new file mode 100644
index 0000000..169556b
--- /dev/null
+++ b/docs/Zone/html/zTUIZonePart.html
@@ -0,0 +1,151 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>Zone Partitioning</title>
+<title>CMSIS-Zone (Preview): Zone Partitioning</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('zTUIZonePart.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">Zone Partitioning </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>Every CMSIS-Zone project consists of one or more zones. The basic flow to create zones is as follows:</p>
+<ul>
+<li>In case of multi-core devices, create a zone for each processor.</li>
+<li>Then create at least one zone for each processor to be able to assign memories and peripherals. If your device contains Arm Cortex-M cores supporting TrustZone for Armv8-M, create a secure and a non-secure partition for each of these cores.</li>
+</ul>
+<h1><a class="anchor" id="zTUICreate"></a>
+Create Zones</h1>
+<p>To split a multi-processor system into single-processor sub-systems, you need to create new zones. Switch to the <b>Zones</b> tab and click the <b>Add new zone</b> button:</p>
+<div class="image">
+<img src="AddNewZoneButton.png" alt="AddNewZoneButton.png"/>
+</div>
+<p>In the new window, you need to specify a name for the zone, select the applicable core, and choose the security level (secure/non-secure).</p>
+<p>In the <a class="el" href="zTEMusca.html">Musca</a> example, a new zone called "CM33_0" was created and attached to processor core 0 without any security attribute (not specified):</p>
+<div class="image">
+<img src="NewZoneCM33_0.png" alt="NewZoneCM33_0.png"/>
+</div>
+<p>Similarly, an additional zone called "CM33_1" was created and attached to processor core 1, without security attribute.</p>
+<p><b>Save</b> your settings:</p>
+<div class="image">
+<img src="SaveButton.png" alt="SaveButton.png"/>
+</div>
+<dl class="section note"><dt>Note</dt><dd></dd></dl>
+<p>Adding zones only works for the currently opened <a class="el" href="zoneFormat.html#azone">.azone</a> file. The information about the zones is stored in the <a class="el" href="xml_zones.html">/azone/zones element</a> element of the *.azone file. </p>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="navelem"><a class="el" href="zoneToolUsage.html">CMSIS-Zone Utility</a></li><li class="navelem"><a class="el" href="zTInteractiveMode.html">Interactive Mode</a></li>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/zone-assignment.png b/docs/Zone/html/zone-assignment.png
deleted file mode 100644
index 30d373b..0000000
--- a/docs/Zone/html/zone-assignment.png
+++ /dev/null
Binary files differ
diff --git a/docs/Zone/html/zoneFormat.html b/docs/Zone/html/zoneFormat.html
new file mode 100644
index 0000000..0b68597
--- /dev/null
+++ b/docs/Zone/html/zoneFormat.html
@@ -0,0 +1,249 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>Zone Description Format</title>
+<title>CMSIS-Zone (Preview): Zone Description Format</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('zoneFormat.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">Zone Description Format </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The <b>Zone Description Format</b> is a tool agnostic storage format and is split into:</p>
+<ul>
+<li><b>Resource File (*.rzone)</b> that describes the system resources available.</li>
+<li><b>Assignment File (*.azone)</b> that describes the resource partitioning.</li>
+</ul>
+<p>The combination of both <b>Resource File</b> and <b>Assignment File</b> can be used to create a new derived <b>Resource File</b> that only contains the resources available for this project. It is therefore possible to split the resources incrementally as needed.</p>
+<p>A <b>Resource File (*.rzone)</b> can therefore describe:</p>
+<ul>
+<li>A complete embedded system including device with one or more processors, external memory and/or external peripheral components.</li>
+<li>TrustZone definition and initial setting for Secure Attribute Unit</li>
+<li>A resource partition for an independent software project (i.e. boot loader, user application, secure partition) that implement the application for the system.</li>
+</ul>
+<p>An <b>Assignment File (*.azone)</b> allows to specify either:</p>
+<ul>
+<li>The partitioning of a system into multiple independent software projects.</li>
+<li>The configuration of a Memory Protection Unit (MPU) for functional segregation of a software project.</li>
+</ul>
+<dl class="section note"><dt>Note</dt><dd>It is impossible to use a single <b>Assignment File</b> for both, partitioning of software projects and MPU configuration.</dd></dl>
+<h1><a class="anchor" id="XML_Format_Schema"></a>
+Overall XML structure</h1>
+<p>The CMSIS-Zone utility uses two XML files to store system and configuration information. The structure these XML files is described with schema files that are located in the ARM.CMSIS pack in the directory .\CMSIS\Utilities.</p>
+<table class="doxtable">
+<tr>
+<th align="left">File type </th><th align="left">Schema file </th><th align="left">Description  </th></tr>
+<tr>
+<td align="left"><a class="el" href="zoneFormat.html#rzone">*.rzone</a> </td><td align="left">rzone.xsd </td><td align="left">Stores the system resources (processors, memory, peripherals) available. </td></tr>
+<tr>
+<td align="left"><a class="el" href="zoneFormat.html#azone">*.azone</a> </td><td align="left">azone.xsd </td><td align="left">Stores the system partitioning which includes assignments and memory splits for a related .rzone file. </td></tr>
+<tr>
+<td align="left">.fzone </td><td align="left">fzone.xsd </td><td align="left">CMSIS-Zone data input file for FreeMarker as explained in <a class="el" href="GenDataModel.html">Generator Data Model</a>. </td></tr>
+</table>
+<dl class="section note"><dt>Note</dt><dd>It is important to understand the relationship between *.rzone and *.azone files. While the *.rzone file contains all the information about the available resources in a system or sub-system, the *.azone file contains all the information about the system partitioning. If the *.rzone file changes (for example because the partitioning of a sub-system has changed), you will not loose the work done on the partitioning of that sub-system. If resources are removed, the <a class="el" href="zTUI.html#zTGUI">CMSIS-Zone GUI</a> will notify you about this and you can make the required changes.</dd></dl>
+<p><a class="anchor" id="rzone"></a></p>
+<h1>Top-level .rzone XML elements </h1>
+<ul>
+<li><a class="el" href="xml_rzone_pg.html">&lt;rzone&gt;</a> is the root element of the *.rzone file.</li>
+<li><a class="el" href="xml_creator.html">&lt;creator&gt;</a> describes the creation for this *.rzone file.</li>
+<li><a class="el" href="xml_device.html">&lt;device&gt;</a> describes the device that is part of the system. It may contain one or more processors.</li>
+<li><a class="el" href="xml_resources.html">&lt;resources&gt;</a> describes the memory and peripheral resources of the system.</li>
+</ul>
+<h2>Structure of .rzone XML file </h2>
+<div class="fragment"><div class="line">&lt;rzone&gt;                  <span class="comment">// root element of system zone file</span></div>
+<div class="line">  &lt;creator&gt;              <span class="comment">// describes how this rzone file was created</span></div>
+<div class="line">  </div>
+<div class="line">  &lt;device&gt;               <span class="comment">// device information</span></div>
+<div class="line">    &lt;package/&gt;           <span class="comment">// software pack that defines device</span></div>
+<div class="line">    &lt;processor/&gt;         <span class="comment">// processor information</span></div>
+<div class="line">  &lt;/device&gt;</div>
+<div class="line"></div>
+<div class="line">  </div>
+<div class="line">  &lt;resources&gt;            <span class="comment">// physical resources off-chip </span></div>
+<div class="line">    &lt;sau_init&gt;           <span class="comment">// fixed SAU settings required for system</span></div>
+<div class="line">      &lt;region/&gt;          <span class="comment">// region setting for SAU</span></div>
+<div class="line">    &lt;/sau_init&gt;</div>
+<div class="line">        </div>
+<div class="line">    &lt;memories&gt;           <span class="comment">// memories section  </span></div>
+<div class="line">      &lt;memory&gt;           <span class="comment">// memory resource</span></div>
+<div class="line">      &lt;mpc&gt;              <span class="comment">// memory protection controller information</span></div>
+<div class="line">    &lt;/memories&gt;</div>
+<div class="line">    </div>
+<div class="line">    &lt;peripherals&gt;        <span class="comment">// peripheral resources off-chip</span></div>
+<div class="line">      { &lt;group&gt; }        <span class="comment">// peripheral group (optional)</span></div>
+<div class="line">      &lt;peripheral&gt;       <span class="comment">// peripheral description</span></div>
+<div class="line">            { &lt;slot&gt; }       <span class="comment">// slot description (optional)</span></div>
+<div class="line">         &lt;interrupt/&gt;    <span class="comment">// optional interrupts for peripheral</span></div>
+<div class="line">         &lt;setup/&gt;        <span class="comment">// optional register setup for peripheral</span></div>
+<div class="line">                { &lt;slot&gt; }</div>
+<div class="line">      &lt;/peripheral&gt;</div>
+<div class="line">      { &lt;/group&gt; }       <span class="comment">// peripheral group (optional)</span></div>
+<div class="line">    &lt;/peripherals&gt;</div>
+<div class="line">  &lt;/resources&gt;</div>
+<div class="line">&lt;/rzone&gt;</div>
+</div><!-- fragment --><p><a class="anchor" id="azone"></a></p>
+<h1>Top-level .azone XML elements </h1>
+<ul>
+<li><a class="el" href="xml_azone_pg.html">&lt;azone&gt;</a> is the root element of the *.azone file.</li>
+<li><a class="el" href="xml_configure.html">&lt;configure&gt;</a> controls the behavior of the CMSIS-Zone utility (project or MPU assignments).</li>
+<li><a class="el" href="xml_partition.html">&lt;partition&gt;</a> defines memory partitions that split available system memory.</li>
+<li><a class="el" href="xml_zones.html">&lt;zones&gt;</a> defines the assignment of memory, block, and peripherals.</li>
+</ul>
+<div class="fragment"><div class="line">&lt;azone&gt;</div>
+<div class="line">  &lt;rzone&gt;                <span class="comment">// Refers related .rzone file</span></div>
+<div class="line">  &lt;configure&gt;            <span class="comment">// CMSIS-Zone utility UI behavior</span></div>
+<div class="line">  </div>
+<div class="line">  &lt;partition&gt;            <span class="comment">// memory partition information</span></div>
+<div class="line">    &lt;memory&gt;             <span class="comment">// memory split information </span></div>
+<div class="line">  &lt;/partition&gt;</div>
+<div class="line">  </div>
+<div class="line">  &lt;zones&gt;                <span class="comment">// zone assignments</span></div>
+<div class="line">    &lt;zone&gt;               <span class="comment">// project zone name</span></div>
+<div class="line">      &lt;assign&gt;           <span class="comment">// used peripheral or memory</span></div>
+<div class="line">        &lt;interrupt/&gt;     <span class="comment">// for peripherals optional interrupt usage</span></div>
+<div class="line">      &lt;/assign&gt;</div>
+<div class="line">    &lt;/zone&gt;</div>
+<div class="line">  &lt;/zones&gt;</div>
+<div class="line">&lt;/azone&gt;</div>
+</div><!-- fragment --><p><a class="anchor" id="security"></a></p>
+<h1>Security Type </h1>
+<p>The attribute <em>security</em> defines the security setting for a memory or peripheral region. Only one of the settings is allow:</p>
+<ul>
+<li>&lt;empty&gt; security not defined (default)</li>
+<li>'n' non-secure</li>
+<li>'c' secure on non-secure callable</li>
+<li>'s' secure</li>
+</ul>
+<p><a class="anchor" id="access"></a></p>
+<h1>Access Type </h1>
+<p>The attribute <em>access</em> defines the access permission for a memory or peripheral region. Multiple settings are allow:</p>
+<ul>
+<li>'r' read</li>
+<li>'w' write</li>
+<li>'x' execute</li>
+<li>'p' peripheral</li>
+</ul>
+<p><a class="anchor" id="privilege"></a></p>
+<h1>Privilege Type </h1>
+<p>The attribute <em>privilege</em> defines the privilege level that is required for memory/peripheral access or code execution in a MPU zone. Only one of the settings is allow:</p>
+<ul>
+<li>&lt;empty&gt; privilege level not specified</li>
+<li>'u' unprivileged level</li>
+<li>'p' privileged level </li>
+</ul>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/zoneFormat.js b/docs/Zone/html/zoneFormat.js
new file mode 100644
index 0000000..feaa7bf
--- /dev/null
+++ b/docs/Zone/html/zoneFormat.js
@@ -0,0 +1,6 @@
+var zoneFormat =
+[
+    [ "Overall XML structure", "zoneFormat.html#XML_Format_Schema", null ],
+    [ "/rzone element", "xml_rzone_pg.html", "xml_rzone_pg" ],
+    [ "/azone element", "xml_azone_pg.html", "xml_azone_pg" ]
+];
\ No newline at end of file
diff --git a/docs/Zone/html/zoneToolUsage.html b/docs/Zone/html/zoneToolUsage.html
new file mode 100644
index 0000000..a6f7af6
--- /dev/null
+++ b/docs/Zone/html/zoneToolUsage.html
@@ -0,0 +1,147 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<meta http-equiv="X-UA-Compatible" content="IE=9"/>
+<title>CMSIS-Zone Utility</title>
+<title>CMSIS-Zone (Preview): CMSIS-Zone Utility</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="dynsections.js"></script>
+<script type="text/javascript" src="printComponentTabs.js"></script>
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="resize.js"></script>
+<script type="text/javascript" src="navtree.js"></script>
+<script type="text/javascript">
+  $(document).ready(initResizable);
+  $(window).load(resizeHeight);
+</script>
+<link href="search/search.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="search/search.js"></script>
+<script type="text/javascript">
+  $(document).ready(function() { searchBox.OnSelectItem(0); });
+</script>
+</head>
+<body>
+<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
+  <td style="padding-left: 0.5em;">
+   <div id="projectname">CMSIS-Zone (Preview)
+   &#160;<span id="projectnumber">Version 0.9.2</span>
+   </div>
+   <div id="projectbrief">System Resource Management</div>
+  </td>
+ </tr>
+ </tbody>
+</table>
+</div>
+<!-- end header part -->
+<div id="CMSISnav" class="tabs1">
+    <ul class="tablist">
+      <script type="text/javascript">
+		<!--
+		writeComponentTabs.call(this);
+		//-->
+      </script>
+	  </ul>
+</div>
+<!-- Generated by Doxygen 1.8.6 -->
+<script type="text/javascript">
+var searchBox = new SearchBox("searchBox", "search",false,'Search');
+</script>
+  <div id="navrow1" class="tabs">
+    <ul class="tablist">
+      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
+      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
+      <li>
+        <div id="MSearchBox" class="MSearchBoxInactive">
+        <span class="left">
+          <img id="MSearchSelect" src="search/mag_sel.png"
+               onmouseover="return searchBox.OnSearchSelectShow()"
+               onmouseout="return searchBox.OnSearchSelectHide()"
+               alt=""/>
+          <input type="text" id="MSearchField" value="Search" accesskey="S"
+               onfocus="searchBox.OnSearchFieldFocus(true)" 
+               onblur="searchBox.OnSearchFieldFocus(false)" 
+               onkeyup="searchBox.OnSearchFieldChange(event)"/>
+          </span><span class="right">
+            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
+          </span>
+        </div>
+      </li>
+    </ul>
+  </div>
+</div><!-- top -->
+<div id="side-nav" class="ui-resizable side-nav-resizable">
+  <div id="nav-tree">
+    <div id="nav-tree-contents">
+      <div id="nav-sync" class="sync"></div>
+    </div>
+  </div>
+  <div id="splitbar" style="-moz-user-select:none;" 
+       class="ui-resizable-handle">
+  </div>
+</div>
+<script type="text/javascript">
+$(document).ready(function(){initNavTree('zoneToolUsage.html','');});
+</script>
+<div id="doc-content">
+<!-- window showing the filter options -->
+<div id="MSearchSelectWindow"
+     onmouseover="return searchBox.OnSearchSelectShow()"
+     onmouseout="return searchBox.OnSearchSelectHide()"
+     onkeydown="return searchBox.OnSearchSelectKey(event)">
+<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Pages</a></div>
+
+<!-- iframe showing the search results (closed by default) -->
+<div id="MSearchResultsWindow">
+<iframe src="javascript:void(0)" frameborder="0" 
+        name="MSearchResults" id="MSearchResults">
+</iframe>
+</div>
+
+<div class="header">
+  <div class="headertitle">
+<div class="title">CMSIS-Zone Utility </div>  </div>
+</div><!--header-->
+<div class="contents">
+<div class="textblock"><p>The section describes the CMSIS-Zone Utility which is currently a stand-alone Eclipse implementation that allows you to:</p>
+<ul>
+<li><a class="el" href="zTUIMemPerRes.html#zTUIMemView">View the memory and peripheral resources</a> of a complete system or sub-system.</li>
+<li><a class="el" href="zTUIMemPerRes.html#zTUIMemAdd">Partition memory blocks</a> into smaller regions and define access permissions for these regions.</li>
+<li><a class="el" href="zTUIMemPerRes.html#zTUIPerProp">Define access permissions</a> for peripherals.</li>
+<li><a class="el" href="zTUIMemPerRes.html#zTUIPerSlotConf">Configure access rights of peripheral slots</a> (for example for DMA channels or I/O pins).</li>
+<li><a class="el" href="zTUIZonePart.html">Split memory and peripheral resources into zones</a> (used for sub-projects or process separation in RTOS systems).</li>
+<li><a class="el" href="zTUIGenerate.html">Generate</a> configuration files for tool and hardware setup, as well as</li>
+<li><a class="el" href="zTUIGenerate.html">Generate</a> resource files for sub-systems that allow further partitioning.</li>
+</ul>
+<p>This section describes:</p>
+<ul>
+<li><a class="el" href="zTInstall.html">Installation</a> shows how to install the utility.</li>
+<li><a class="el" href="zTUI.html">User Interface</a> introduces the GUI of the CMSIS-Zone Utility.</li>
+<li><a class="el" href="zTInteractiveMode.html">Interactive Mode</a> explains how to create projects and zones using the GUI.</li>
+<li><a class="el" href="zTCLI.html">Command Line Mode</a> demonstrates how to work with the command line interface.</li>
+<li><a class="el" href="zTExamples.html">Examples</a> contains ready-to-use projects for various devices.</li>
+</ul>
+<dl class="section note"><dt>Note</dt><dd></dd></dl>
+<p>It is assumed that you are familiar with Eclipse and <a href="https://arm-software.github.io/CMSIS_5/Pack/html/index.html" target="_blank">CMSIS-Packs</a>. The relevant device family pcks for your target device need to be installed on your computer. </p>
+</div></div><!-- contents -->
+</div><!-- doc-content -->
+<!-- start footer part -->
+<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
+  <ul>
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
+	<!--
+    <a href="http://www.doxygen.org/index.html">
+    <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 
+	-->
+	</li>
+  </ul>
+</div>
+</body>
+</html>
diff --git a/docs/Zone/html/zoneToolUsage.js b/docs/Zone/html/zoneToolUsage.js
new file mode 100644
index 0000000..824a307
--- /dev/null
+++ b/docs/Zone/html/zoneToolUsage.js
@@ -0,0 +1,14 @@
+var zoneToolUsage =
+[
+    [ "Installation", "zTInstall.html", null ],
+    [ "User Interface", "zTUI.html", [
+      [ "CMSIS-Zone GUI", "zTUI.html#zTGUI", null ],
+      [ "Project Explorer", "zTUI.html#zTProjEx", null ],
+      [ "Zone Editor", "zTUI.html#zTGUIZoneEditor", [
+        [ "Toolbar Buttons", "zTUI.html#zTGUIButtons", null ]
+      ] ]
+    ] ],
+    [ "Interactive Mode", "zTInteractiveMode.html", "zTInteractiveMode" ],
+    [ "Command Line Mode", "zTCLI.html", null ],
+    [ "Examples", "zTExamples.html", "zTExamples" ]
+];
\ No newline at end of file
diff --git a/docs/Zone/html/zone_map.png b/docs/Zone/html/zone_map.png
new file mode 100644
index 0000000..a58104a
--- /dev/null
+++ b/docs/Zone/html/zone_map.png
Binary files differ
diff --git a/docs/Zone/html/zone_project.png b/docs/Zone/html/zone_project.png
new file mode 100644
index 0000000..2b3877f
--- /dev/null
+++ b/docs/Zone/html/zone_project.png
Binary files differ
diff --git a/docs/Zone/html/zone_revisionHistory.html b/docs/Zone/html/zone_revisionHistory.html
index 30e6e30..d19cbfb 100644
--- a/docs/Zone/html/zone_revisionHistory.html
+++ b/docs/Zone/html/zone_revisionHistory.html
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Zone (Preview)
-   &#160;<span id="projectnumber">Version 0.0.1</span>
+   &#160;<span id="projectnumber">Version 0.9.2</span>
    </div>
    <div id="projectbrief">System Resource Management</div>
   </td>
@@ -114,14 +114,14 @@
 <tr>
 <th>Version </th><th>Description  </th></tr>
 <tr>
-<td>0.0.1 (Preview) </td><td>Initial specification draft  </td></tr>
+<td>0.0.3 (Preview 3) </td><td>Initial specification draft  </td></tr>
 </table>
 </div></div><!-- contents -->
 </div><!-- doc-content -->
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-Zone (Preview) by Arm Ltd. All rights reserved.
+    <li class="footer">Generated on Wed Jul 10 2019 15:21:06 for CMSIS-Zone (Preview) Version 0.9.2 by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6